diff -uNra linux-3.0.82/arch/mips/boot/compressed/decompress.c linux-3.0.82x/arch/mips/boot/compressed/decompress.c
--- linux-3.0.82/arch/mips/boot/compressed/decompress.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/boot/compressed/decompress.c	2017-09-23 03:42:49.346677117 +0800
@@ -43,7 +43,7 @@
 /* activate the code for pre-boot environment */
 #define STATIC static
 
-#ifdef CONFIG_KERNEL_GZIP
+#if defined(CONFIG_KERNEL_GZIP) || defined(CONFIG_KERNEL_LZO)
 void *memcpy(void *dest, const void *src, size_t n)
 {
 	int i;
diff -uNra linux-3.0.82/arch/mips/configs/ls1a_cloud_config linux-3.0.82x/arch/mips/configs/ls1a_cloud_config
--- linux-3.0.82/arch/mips/configs/ls1a_cloud_config	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/configs/ls1a_cloud_config	2017-09-23 03:42:49.346677117 +0800
@@ -0,0 +1,1607 @@
+#
+# Automatically generated make config: don't edit
+# Linux/mips 3.0.0 Kernel Configuration
+#
+CONFIG_MIPS=y
+
+#
+# Machine selection
+#
+# CONFIG_MIPS_ALCHEMY is not set
+# CONFIG_AR7 is not set
+# CONFIG_ATH79 is not set
+# CONFIG_BCM47XX is not set
+# CONFIG_BCM63XX is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_MACH_JZ4740 is not set
+# CONFIG_LANTIQ is not set
+# CONFIG_LASAT is not set
+CONFIG_MACH_LOONGSON=y
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SIM is not set
+# CONFIG_NEC_MARKEINS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_NXP_STB220 is not set
+# CONFIG_NXP_STB225 is not set
+# CONFIG_PNX8550_JBS is not set
+# CONFIG_PNX8550_STB810 is not set
+# CONFIG_PMC_MSP is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_POWERTV is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP28 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_CRHINE is not set
+# CONFIG_SIBYTE_CARMEL is not set
+# CONFIG_SIBYTE_CRHONE is not set
+# CONFIG_SIBYTE_RHONE is not set
+# CONFIG_SIBYTE_SWARM is not set
+# CONFIG_SIBYTE_LITTLESUR is not set
+# CONFIG_SIBYTE_SENTOSA is not set
+# CONFIG_SIBYTE_BIGSUR is not set
+# CONFIG_SNI_RM is not set
+# CONFIG_MACH_TX39XX is not set
+# CONFIG_MACH_TX49XX is not set
+# CONFIG_MIKROTIK_RB532 is not set
+# CONFIG_WR_PPMC is not set
+# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
+# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
+# CONFIG_NLM_XLR_BOARD is not set
+# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
+# CONFIG_HAVE_PWM is not set
+CONFIG_LS1A_MACH=y
+# CONFIG_LS1B_MACH is not set
+# CONFIG_LEMOTE_FULOONG2E is not set
+# CONFIG_LEMOTE_MACH2F is not set
+# CONFIG_LS1A_CORE_BOARD is not set
+CONFIG_LS1A_CLOUD_TERMIAL=y
+CONFIG_LOONGSON_UART_BASE=y
+# CONFIG_LOONGSON_MC146818 is not set
+CONFIG_PCI_AUTO=y
+# CONFIG_DISABLE_PCI is not set
+# CONFIG_LOONGSON_BIGPCI is not set
+# CONFIG_LS1X_EXTERN_TIMER is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+CONFIG_CEVT_R4K_LIB=y
+CONFIG_CEVT_R4K=y
+CONFIG_CSRC_R4K_LIB=y
+CONFIG_CSRC_R4K=y
+# CONFIG_ARCH_DMA_ADDR_T_64BIT is not set
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+CONFIG_I8259=y
+# CONFIG_MIPS_MACHINE is not set
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_GPIO=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_BOOT_ELF32=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+
+#
+# CPU selection
+#
+CONFIG_CPU_LOONGSON1A=y
+CONFIG_SYS_SUPPORTS_ZBOOT=y
+CONFIG_CPU_LS232=y
+CONFIG_SYS_HAS_CPU_LOONGSON1A=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_CPUFREQ=y
+
+#
+# Kernel type
+#
+CONFIG_32BIT=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_FORCE_MAX_ZONEORDER=12
+CONFIG_MIPS_MT_DISABLED=y
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_CPU_HAS_WB=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_HIGHMEM is not set
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_SYS_SUPPORTS_HIGHMEM=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_COMPACTION=y
+CONFIG_MIGRATION=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_KSM=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
+CONFIG_NEED_PER_CPU_KM=y
+CONFIG_CLEANCACHE=y
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_256 is not set
+# CONFIG_HZ_1000 is not set
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=250
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+# CONFIG_PREEMPT is not set
+# CONFIG_KEXEC is not set
+CONFIG_SECCOMP=y
+CONFIG_USE_OF=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_HAVE_IRQ_WORK=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_CROSS_COMPILE=""
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_DEFAULT_HOSTNAME="loongson"
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_FHANDLE is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+CONFIG_HAVE_GENERIC_HARDIRQS=y
+
+#
+# IRQ subsystem
+#
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_IRQ_SHOW=y
+
+#
+# RCU Subsystem
+#
+CONFIG_TINY_RCU=y
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_CGROUPS is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_SCHED_AUTOGROUP is not set
+# CONFIG_SYSFS_DEPRECATED is not set
+# CONFIG_RELAY is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EXPERT=y
+CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_KALLSYMS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+# CONFIG_BUG is not set
+# CONFIG_ELF_CORE is not set
+# CONFIG_PCSPKR_PLATFORM is not set
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_EMBEDDED=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
+
+#
+# Kernel Performance Events And Counters
+#
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_COMPAT_BRK is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_JUMP_LABEL=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+
+#
+# GCOV-based kernel profiling
+#
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+# CONFIG_MODULES is not set
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+CONFIG_BLK_DEV_BSG=y
+CONFIG_BLK_DEV_INTEGRITY=y
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+CONFIG_INLINE_SPIN_UNLOCK=y
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+CONFIG_INLINE_READ_UNLOCK=y
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+CONFIG_INLINE_READ_UNLOCK_IRQ=y
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+CONFIG_INLINE_WRITE_UNLOCK=y
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_FREEZER is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_HW_HAS_PCI=y
+# CONFIG_PCI is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_MMU=y
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_HAVE_AOUT is not set
+CONFIG_BINFMT_MISC=y
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Power management options
+#
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_SUSPEND is not set
+# CONFIG_PM_RUNTIME is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE_DEMUX is not set
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_LRO=y
+# CONFIG_INET_DIAG is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+CONFIG_NETWORK_SECMARK=y
+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_L2TP is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+CONFIG_DCB=y
+# CONFIG_BATMAN_ADV is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_WIRELESS=y
+CONFIG_WEXT_CORE=y
+CONFIG_WEXT_PROC=y
+CONFIG_CFG80211=y
+CONFIG_NL80211_TESTMODE=y
+# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
+CONFIG_CFG80211_REG_DEBUG=y
+CONFIG_CFG80211_DEFAULT_PS=y
+# CONFIG_CFG80211_INTERNAL_REGDB is not set
+CONFIG_CFG80211_WEXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+CONFIG_LIB80211=y
+# CONFIG_LIB80211_DEBUG is not set
+CONFIG_MAC80211=y
+CONFIG_MAC80211_HAS_RC=y
+CONFIG_MAC80211_RC_PID=y
+CONFIG_MAC80211_RC_MINSTREL=y
+CONFIG_MAC80211_RC_MINSTREL_HT=y
+# CONFIG_MAC80211_RC_DEFAULT_PID is not set
+CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
+CONFIG_MAC80211_RC_DEFAULT="minstrel_ht"
+CONFIG_MAC80211_MESH=y
+# CONFIG_MAC80211_DEBUG_MENU is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+# CONFIG_CAIF is not set
+# CONFIG_CEPH_LIB is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/mdev"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_OF_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_SM_FTL is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+CONFIG_MTD_M25P80=y
+CONFIG_M25PXX_USE_FAST_READ=y
+# CONFIG_MTD_SST25L is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND_ECC=y
+# CONFIG_MTD_NAND_ECC_SMC is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_BCH is not set
+# CONFIG_MTD_SM_COMMON is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+CONFIG_MTD_NAND_LS1X=y
+# CONFIG_NAND_USE_LPC_PWM01 is not set
+CONFIG_NAND_USE_SPI1_PWM23=y
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+# CONFIG_MTD_UBI is not set
+CONFIG_DTC=y
+CONFIG_OF=y
+
+#
+# Device Tree and Open Firmware support
+#
+# CONFIG_PROC_DEVICETREE is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_DEVICE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_I2C=y
+CONFIG_OF_NET=y
+CONFIG_OF_SPI=y
+CONFIG_OF_MDIO=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_BLK_DEV_RBD is not set
+# CONFIG_SENSORS_LIS3LV02D is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI_MOD=y
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_TARGET_CORE is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_MII=y
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+CONFIG_REALTEK_PHY=y
+# CONFIG_NATIONAL_PHY is not set
+CONFIG_STE10XP=y
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_MICREL_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+# CONFIG_NET_ETHERNET is not set
+CONFIG_NETDEV_1000=y
+CONFIG_STMMAC_ETH=y
+CONFIG_LS1X_GMAC0=y
+CONFIG_LS1X_GMAC0_100M=y
+# CONFIG_LS1X_GMAC0_1000M is not set
+# CONFIG_LS1X_GMAC1 is not set
+# CONFIG_RTL8305SC is not set
+CONFIG_STMMAC_DA=y
+# CONFIG_STMMAC_DUAL_MAC is not set
+# CONFIG_NETDEV_10000 is not set
+CONFIG_WLAN=y
+# CONFIG_LIBERTAS_THINFIRM is not set
+# CONFIG_AT76C50X_USB is not set
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_USB_NET_RNDIS_WLAN is not set
+# CONFIG_RTL8192CU is not set
+# CONFIG_MAC80211_HWSIM is not set
+# CONFIG_ATH_COMMON is not set
+# CONFIG_B43 is not set
+# CONFIG_B43LEGACY is not set
+# CONFIG_HOSTAP is not set
+# CONFIG_LIBERTAS is not set
+# CONFIG_P54_COMMON is not set
+# CONFIG_RT2X00 is not set
+# CONFIG_RT3070_LS1B is not set
+# CONFIG_WL1251 is not set
+# CONFIG_WL12XX_MENU is not set
+# CONFIG_ZD1211RW is not set
+# CONFIG_MWIFIEX is not set
+# CONFIG_WM8782_LS1X is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_USB_IPHETH is not set
+# CONFIG_WAN is not set
+
+#
+# CAIF transport drivers
+#
+CONFIG_PPP=y
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=y
+CONFIG_PPP_SYNC_TTY=y
+CONFIG_PPP_DEFLATE=y
+CONFIG_PPP_BSDCOMP=y
+CONFIG_PPP_MPPE=y
+CONFIG_PPPOE=y
+# CONFIG_SLIP is not set
+CONFIG_SLHC=y
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+# CONFIG_UNIX98_PTYS is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_N_GSM is not set
+# CONFIG_TRACE_SINK is not set
+# CONFIG_DEVKMEM is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=3
+CONFIG_SERIAL_8250_RUNTIME_UARTS=3
+# CONFIG_SERIAL_8250_EXTENDED is not set
+# CONFIG_MULTIFUNC_CONFIG_SERAIL0 is not set
+# CONFIG_MULTIFUNC_CONFIG_SERAIL1 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+# CONFIG_SERIAL_MAX3107 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+# CONFIG_SERIAL_IFX6X60 is not set
+# CONFIG_SERIAL_XILINX_PS_UART is not set
+# CONFIG_TTY_PRINTK is not set
+# CONFIG_LS1B_BUZZER is not set
+# CONFIG_LS1B_PWM_DRIVER is not set
+# CONFIG_LS1B_BBDIO is not set
+# CONFIG_LS1B_IR is not set
+# CONFIG_LS1B_STEPMOTOR is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_RAMOOPS is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+# CONFIG_I2C_CHARDEV is not set
+# CONFIG_I2C_MUX is not set
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOBIT=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_LS1X is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_PXA_PCI is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_DIOLAN_U2C is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_LS1B_SPI=y
+CONFIG_LS1B_SPI0=y
+# CONFIG_LS1B_SPI1 is not set
+# CONFIG_SPI_ALTERA is not set
+CONFIG_SPI_BITBANG=y
+# CONFIG_SPI_GPIO is not set
+# CONFIG_SPI_OC_TINY is not set
+# CONFIG_SPI_PXA2XX_PCI is not set
+# CONFIG_SPI_XILINX is not set
+# CONFIG_SPI_DESIGNWARE is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+
+#
+# PPS generators support
+#
+
+#
+# PTP clock support
+#
+
+#
+# Enable Device Drivers -> PPS to see the PTP clock options.
+#
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO drivers:
+#
+# CONFIG_GPIO_BASIC_MMIO is not set
+# CONFIG_GPIO_IT8761E is not set
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX7300 is not set
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_SX150X is not set
+# CONFIG_GPIO_ADP5588 is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+# CONFIG_GPIO_74X164 is not set
+
+#
+# AC97 GPIO expanders:
+#
+
+#
+# MODULbus GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_LS1X_WDT=y
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+CONFIG_BCMA_POSSIBLE=y
+
+#
+# Broadcom specific AMBA
+#
+# CONFIG_BCMA is not set
+# CONFIG_MFD_SUPPORT is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+CONFIG_FB_DDC=y
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_WMT_GE_ROPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+CONFIG_FB_MODE_HELPERS=y
+CONFIG_FB_TILEBLITTING=y
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_SSD1305 is not set
+# CONFIG_FB_ST7920 is not set
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_LOONGSON1=y
+# CONFIG_LS1X_FB0 is not set
+CONFIG_LS1X_FB1=y
+CONFIG_FB_LS1X_I2C=y
+# CONFIG_FB_UDL is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_BROADSHEET is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LINUX_CLUT224=y
+CONFIG_SOUND=y
+CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
+# CONFIG_SND is not set
+CONFIG_SOUND_PRIME=y
+CONFIG_SOUND_LS1X_AC97=y
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_ACRUX is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_HID_DRAGONRISE is not set
+# CONFIG_HID_EMS_FF is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_KEYTOUCH is not set
+# CONFIG_HID_KYE is not set
+# CONFIG_HID_UCLOGIC is not set
+# CONFIG_HID_WALTOP is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_TWINHAN is not set
+# CONFIG_HID_KENSINGTON is not set
+# CONFIG_HID_LCPOWER is not set
+# CONFIG_HID_LOGITECH is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_MULTITOUCH is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_PICOLCD is not set
+# CONFIG_HID_QUANTA is not set
+# CONFIG_HID_ROCCAT is not set
+# CONFIG_HID_ROCCAT_ARVO is not set
+# CONFIG_HID_ROCCAT_KONE is not set
+# CONFIG_HID_ROCCAT_KONEPLUS is not set
+# CONFIG_HID_ROCCAT_KOVAPLUS is not set
+# CONFIG_HID_ROCCAT_PYRA is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_HID_GREENASIA is not set
+# CONFIG_HID_SMARTJOYPLUS is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_HID_THRUSTMASTER is not set
+# CONFIG_HID_ZEROPLUS is not set
+# CONFIG_HID_ZYDACRON is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+CONFIG_USB_DYNAMIC_MINORS=y
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_EHCI_TT_NEWSCHED=y
+CONFIG_USB_EHCI_HCD_LS1B=y
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_LS1B=y
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+CONFIG_USB_STORAGE_REALTEK=y
+CONFIG_USB_STORAGE_DATAFAB=y
+CONFIG_USB_STORAGE_FREECOM=y
+CONFIG_USB_STORAGE_ISD200=y
+CONFIG_USB_STORAGE_USBAT=y
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_STORAGE_JUMPSHOT=y
+CONFIG_USB_STORAGE_ALAUDA=y
+CONFIG_USB_STORAGE_ONETOUCH=y
+CONFIG_USB_STORAGE_KARMA=y
+CONFIG_USB_STORAGE_CYPRESS_ATACB=y
+CONFIG_USB_STORAGE_ENE_UB6250=y
+CONFIG_USB_UAS=y
+CONFIG_USB_LIBUSUAL=y
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_YUREX is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_NFC_DEVICES is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+# CONFIG_RTC_INTF_PROC is not set
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_DS3232 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_ISL12022 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+# CONFIG_RTC_DRV_EM3027 is not set
+# CONFIG_RTC_DRV_RV3029C2 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T93 is not set
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_LOONGSON1=y
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+CONFIG_EXT2_FS_XIP=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_DEFAULTS_TO_ORDERED=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+# CONFIG_EXT4_FS is not set
+CONFIG_FS_XIP=y
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_FANOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_QUOTACTL is not set
+CONFIG_AUTOFS4_FS=y
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# Caches
+#
+CONFIG_FSCACHE=y
+CONFIG_FSCACHE_STATS=y
+CONFIG_FSCACHE_HISTOGRAM=y
+# CONFIG_FSCACHE_DEBUG is not set
+# CONFIG_FSCACHE_OBJECT_LIST is not set
+CONFIG_CACHEFILES=y
+# CONFIG_CACHEFILES_DEBUG is not set
+# CONFIG_CACHEFILES_HISTOGRAM is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=936
+CONFIG_FAT_DEFAULT_IOCHARSET="cp936"
+CONFIG_NTFS_FS=y
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_TMPFS_XATTR=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_CONFIGFS_FS=y
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_YAFFS_FS=y
+CONFIG_YAFFS_YAFFS1=y
+# CONFIG_YAFFS_9BYTE_TAGS is not set
+# CONFIG_YAFFS_DOES_ECC is not set
+CONFIG_YAFFS_YAFFS2=y
+CONFIG_YAFFS_AUTO_YAFFS2=y
+CONFIG_YAFFS_DISABLE_TAGS_ECC=y
+# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
+# CONFIG_YAFFS_EMPTY_LOST_AND_FOUND is not set
+# CONFIG_YAFFS_DISABLE_BLOCK_REFRESHING is not set
+# CONFIG_YAFFS_DISABLE_BACKGROUND is not set
+CONFIG_YAFFS_XATTR=y
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+# CONFIG_JFFS2_RTIME is not set
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_JFFS2_CMODE_NONE is not set
+CONFIG_JFFS2_CMODE_PRIORITY=y
+# CONFIG_JFFS2_CMODE_SIZE is not set
+# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
+# CONFIG_LOGFS is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_MINIX_FS_NATIVE_ENDIAN is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_PSTORE is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_NETWORK_FILESYSTEMS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="cp936"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+CONFIG_NLS_CODEPAGE_936=y
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_SECTION_MISMATCH is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_HARDLOCKUP_DETECTOR is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_SPARSE_RCU_POINTER is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
+# CONFIG_ATOMIC64_SELFTEST is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_TEST_KSTRTOX is not set
+CONFIG_EARLY_PRINTK=y
+# CONFIG_CMDLINE_BOOL is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY_DMESG_RESTRICT is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_PCOMP2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=y
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=y
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_ZLIB=y
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_USER_API_HASH is not set
+# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_VIRTUALIZATION is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+CONFIG_CRC_T10DIF=y
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+# CONFIG_XZ_DEC is not set
+# CONFIG_XZ_DEC_BCJ is not set
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_AVERAGE=y
diff -uNra linux-3.0.82/arch/mips/configs/ls1a_defconfig linux-3.0.82x/arch/mips/configs/ls1a_defconfig
--- linux-3.0.82/arch/mips/configs/ls1a_defconfig	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/configs/ls1a_defconfig	2017-09-23 03:42:49.350677105 +0800
@@ -0,0 +1,1809 @@
+#
+# Automatically generated make config: don't edit
+# Linux/mips 3.0.0 Kernel Configuration
+#
+CONFIG_MIPS=y
+
+#
+# Machine selection
+#
+# CONFIG_MIPS_ALCHEMY is not set
+# CONFIG_AR7 is not set
+# CONFIG_ATH79 is not set
+# CONFIG_BCM47XX is not set
+# CONFIG_BCM63XX is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_MACH_JZ4740 is not set
+# CONFIG_LANTIQ is not set
+# CONFIG_LASAT is not set
+CONFIG_MACH_LOONGSON=y
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SIM is not set
+# CONFIG_NEC_MARKEINS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_NXP_STB220 is not set
+# CONFIG_NXP_STB225 is not set
+# CONFIG_PNX8550_JBS is not set
+# CONFIG_PNX8550_STB810 is not set
+# CONFIG_PMC_MSP is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_POWERTV is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP28 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_CRHINE is not set
+# CONFIG_SIBYTE_CARMEL is not set
+# CONFIG_SIBYTE_CRHONE is not set
+# CONFIG_SIBYTE_RHONE is not set
+# CONFIG_SIBYTE_SWARM is not set
+# CONFIG_SIBYTE_LITTLESUR is not set
+# CONFIG_SIBYTE_SENTOSA is not set
+# CONFIG_SIBYTE_BIGSUR is not set
+# CONFIG_SNI_RM is not set
+# CONFIG_MACH_TX39XX is not set
+# CONFIG_MACH_TX49XX is not set
+# CONFIG_MIKROTIK_RB532 is not set
+# CONFIG_WR_PPMC is not set
+# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
+# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
+# CONFIG_NLM_XLR_BOARD is not set
+# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
+# CONFIG_HAVE_PWM is not set
+CONFIG_LS1A_MACH=y
+# CONFIG_LS1B_MACH is not set
+# CONFIG_LEMOTE_FULOONG2E is not set
+# CONFIG_LEMOTE_MACH2F is not set
+CONFIG_LS1A_CORE_BOARD=y
+# CONFIG_LS1A_CLOUD_TERMIAL is not set
+CONFIG_LOONGSON_UART_BASE=y
+# CONFIG_LOONGSON_MC146818 is not set
+CONFIG_PCI_AUTO=y
+# CONFIG_DISABLE_PCI is not set
+# CONFIG_LOONGSON_BIGPCI is not set
+# CONFIG_LS1X_EXTERN_TIMER is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+CONFIG_CEVT_R4K_LIB=y
+CONFIG_CEVT_R4K=y
+CONFIG_CSRC_R4K_LIB=y
+CONFIG_CSRC_R4K=y
+# CONFIG_ARCH_DMA_ADDR_T_64BIT is not set
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+CONFIG_I8259=y
+# CONFIG_MIPS_MACHINE is not set
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_GPIO=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_BOOT_ELF32=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+
+#
+# CPU selection
+#
+CONFIG_CPU_LOONGSON1A=y
+CONFIG_SYS_SUPPORTS_ZBOOT=y
+CONFIG_CPU_LS232=y
+CONFIG_SYS_HAS_CPU_LOONGSON1A=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_CPUFREQ=y
+
+#
+# Kernel type
+#
+CONFIG_32BIT=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_FORCE_MAX_ZONEORDER=12
+CONFIG_MIPS_MT_DISABLED=y
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_CPU_HAS_WB=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_HIGHMEM is not set
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_SYS_SUPPORTS_HIGHMEM=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_COMPACTION=y
+CONFIG_MIGRATION=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_KSM=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
+CONFIG_NEED_PER_CPU_KM=y
+CONFIG_CLEANCACHE=y
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_256 is not set
+# CONFIG_HZ_1000 is not set
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=250
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+# CONFIG_PREEMPT is not set
+# CONFIG_KEXEC is not set
+CONFIG_SECCOMP=y
+CONFIG_USE_OF=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_HAVE_IRQ_WORK=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_CROSS_COMPILE=""
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_DEFAULT_HOSTNAME="loongson"
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_FHANDLE is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+CONFIG_HAVE_GENERIC_HARDIRQS=y
+
+#
+# IRQ subsystem
+#
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_IRQ_SHOW=y
+
+#
+# RCU Subsystem
+#
+CONFIG_TINY_RCU=y
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_CGROUPS is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_SCHED_AUTOGROUP is not set
+# CONFIG_SYSFS_DEPRECATED is not set
+# CONFIG_RELAY is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EXPERT=y
+CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_KALLSYMS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+# CONFIG_BUG is not set
+# CONFIG_ELF_CORE is not set
+# CONFIG_PCSPKR_PLATFORM is not set
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_EMBEDDED=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
+
+#
+# Kernel Performance Events And Counters
+#
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_COMPAT_BRK is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_JUMP_LABEL=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+
+#
+# GCOV-based kernel profiling
+#
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+CONFIG_BLK_DEV_BSG=y
+CONFIG_BLK_DEV_INTEGRITY=y
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+CONFIG_INLINE_SPIN_UNLOCK=y
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+CONFIG_INLINE_READ_UNLOCK=y
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+CONFIG_INLINE_READ_UNLOCK_IRQ=y
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+CONFIG_INLINE_WRITE_UNLOCK=y
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_FREEZER is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_HW_HAS_PCI=y
+# CONFIG_PCI is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_MMU=y
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_HAVE_AOUT is not set
+CONFIG_BINFMT_MISC=y
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Power management options
+#
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_SUSPEND is not set
+# CONFIG_PM_RUNTIME is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE_DEMUX is not set
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_LRO=y
+# CONFIG_INET_DIAG is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+CONFIG_NETWORK_SECMARK=y
+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_L2TP is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+CONFIG_DCB=y
+# CONFIG_BATMAN_ADV is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_WIRELESS=y
+CONFIG_WEXT_CORE=y
+CONFIG_WEXT_PROC=y
+CONFIG_CFG80211=y
+CONFIG_NL80211_TESTMODE=y
+# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
+CONFIG_CFG80211_REG_DEBUG=y
+CONFIG_CFG80211_DEFAULT_PS=y
+# CONFIG_CFG80211_INTERNAL_REGDB is not set
+CONFIG_CFG80211_WEXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+CONFIG_LIB80211=y
+# CONFIG_LIB80211_DEBUG is not set
+CONFIG_MAC80211=y
+CONFIG_MAC80211_HAS_RC=y
+CONFIG_MAC80211_RC_PID=y
+CONFIG_MAC80211_RC_MINSTREL=y
+CONFIG_MAC80211_RC_MINSTREL_HT=y
+# CONFIG_MAC80211_RC_DEFAULT_PID is not set
+CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
+CONFIG_MAC80211_RC_DEFAULT="minstrel_ht"
+CONFIG_MAC80211_MESH=y
+# CONFIG_MAC80211_DEBUG_MENU is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+# CONFIG_CAIF is not set
+# CONFIG_CEPH_LIB is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/mdev"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_OF_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_SM_FTL is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+CONFIG_MTD_M25P80=y
+CONFIG_M25PXX_USE_FAST_READ=y
+# CONFIG_MTD_SST25L is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND_ECC=y
+# CONFIG_MTD_NAND_ECC_SMC is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_BCH is not set
+# CONFIG_MTD_SM_COMMON is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+CONFIG_MTD_NAND_LS1X=y
+CONFIG_NAND_USE_LPC_PWM01=y
+# CONFIG_NAND_USE_SPI1_PWM23 is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+# CONFIG_MTD_UBI is not set
+CONFIG_DTC=y
+CONFIG_OF=y
+
+#
+# Device Tree and Open Firmware support
+#
+# CONFIG_PROC_DEVICETREE is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_DEVICE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_I2C=y
+CONFIG_OF_NET=y
+CONFIG_OF_SPI=y
+CONFIG_OF_MDIO=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=65536
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_BLK_DEV_RBD is not set
+# CONFIG_SENSORS_LIS3LV02D is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI_MOD=y
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+CONFIG_ATA=y
+# CONFIG_ATA_NONSTANDARD is not set
+# CONFIG_ATA_VERBOSE_ERROR is not set
+CONFIG_SATA_PMP=y
+
+#
+# Controllers with non-SFF native interface
+#
+CONFIG_SATA_AHCI_PLATFORM=y
+# CONFIG_ATA_SFF is not set
+# CONFIG_MD is not set
+# CONFIG_TARGET_CORE is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_MII=y
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+CONFIG_REALTEK_PHY=y
+# CONFIG_NATIONAL_PHY is not set
+CONFIG_STE10XP=y
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_MICREL_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+# CONFIG_NET_ETHERNET is not set
+CONFIG_NETDEV_1000=y
+CONFIG_STMMAC_ETH=y
+CONFIG_LS1X_GMAC0=y
+# CONFIG_LS1X_GMAC0_100M is not set
+CONFIG_LS1X_GMAC0_1000M=y
+# CONFIG_LS1X_GMAC1 is not set
+# CONFIG_RTL8305SC is not set
+CONFIG_STMMAC_DA=y
+# CONFIG_STMMAC_DUAL_MAC is not set
+# CONFIG_NETDEV_10000 is not set
+CONFIG_WLAN=y
+# CONFIG_LIBERTAS_THINFIRM is not set
+# CONFIG_AT76C50X_USB is not set
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_USB_NET_RNDIS_WLAN is not set
+# CONFIG_RTL8192CU is not set
+# CONFIG_MAC80211_HWSIM is not set
+# CONFIG_ATH_COMMON is not set
+# CONFIG_B43 is not set
+# CONFIG_B43LEGACY is not set
+# CONFIG_HOSTAP is not set
+# CONFIG_IWM is not set
+# CONFIG_LIBERTAS is not set
+# CONFIG_P54_COMMON is not set
+# CONFIG_RT2X00 is not set
+# CONFIG_RT3070_LS1B is not set
+# CONFIG_WL1251 is not set
+# CONFIG_WL12XX_MENU is not set
+# CONFIG_ZD1211RW is not set
+# CONFIG_MWIFIEX is not set
+# CONFIG_WM8782_LS1X is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_USB_IPHETH is not set
+# CONFIG_WAN is not set
+
+#
+# CAIF transport drivers
+#
+CONFIG_PPP=y
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=y
+CONFIG_PPP_SYNC_TTY=y
+CONFIG_PPP_DEFLATE=y
+CONFIG_PPP_BSDCOMP=y
+CONFIG_PPP_MPPE=y
+CONFIG_PPPOE=y
+# CONFIG_SLIP is not set
+CONFIG_SLHC=y
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+CONFIG_INPUT_POLLDEV=y
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
+# CONFIG_KEYBOARD_ADP5589 is not set
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_QT1070 is not set
+# CONFIG_KEYBOARD_QT2160 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_GPIO_POLLED is not set
+# CONFIG_KEYBOARD_74X165_GPIO_POLLED is not set
+# CONFIG_KEYBOARD_TCA6416 is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_MCS is not set
+# CONFIG_KEYBOARD_MPR121 is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_ELANTECH is not set
+# CONFIG_MOUSE_PS2_SENTELIC is not set
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_BCM5974 is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_MOUSE_GPIO is not set
+# CONFIG_MOUSE_SYNAPTICS_I2C is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_FT5X0X is not set
+# CONFIG_TOUCHSCREEN_FT5X06 is not set
+# CONFIG_FT5X0X_MULTITOUCH is not set
+CONFIG_TOUCHSCREEN_ADS7846=y
+# CONFIG_TOUCHSCREEN_AD7877 is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set
+# CONFIG_TOUCHSCREEN_BU21013 is not set
+# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
+# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
+# CONFIG_TOUCHSCREEN_EETI is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MAX11801 is not set
+# CONFIG_TOUCHSCREEN_MCS5000 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2005 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_TOUCHSCREEN_ST1232 is not set
+# CONFIG_TOUCHSCREEN_TPS6507X is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_SERIO_PS2MULT is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+# CONFIG_UNIX98_PTYS is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_N_GSM is not set
+# CONFIG_TRACE_SINK is not set
+# CONFIG_DEVKMEM is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+# CONFIG_MULTIFUNC_CONFIG_SERAIL0 is not set
+# CONFIG_MULTIFUNC_CONFIG_SERAIL1 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+# CONFIG_SERIAL_MAX3107 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+# CONFIG_SERIAL_IFX6X60 is not set
+# CONFIG_SERIAL_XILINX_PS_UART is not set
+# CONFIG_TTY_PRINTK is not set
+# CONFIG_LS1B_BUZZER is not set
+# CONFIG_LS1B_PWM_DRIVER is not set
+# CONFIG_LS1B_BBDIO is not set
+# CONFIG_LS1B_IR is not set
+# CONFIG_LS1B_STEPMOTOR is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_RAMOOPS is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+CONFIG_I2C_CHARDEV=y
+# CONFIG_I2C_MUX is not set
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOBIT=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_LS1X=y
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_PXA_PCI is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_DIOLAN_U2C is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_LS1B_SPI=y
+CONFIG_LS1B_SPI0=y
+CONFIG_LS1B_SPI1=y
+# CONFIG_SPI_ALTERA is not set
+CONFIG_SPI_BITBANG=y
+# CONFIG_SPI_GPIO is not set
+# CONFIG_SPI_OC_TINY is not set
+# CONFIG_SPI_PXA2XX_PCI is not set
+# CONFIG_SPI_XILINX is not set
+# CONFIG_SPI_DESIGNWARE is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+
+#
+# PPS generators support
+#
+
+#
+# PTP clock support
+#
+
+#
+# Enable Device Drivers -> PPS to see the PTP clock options.
+#
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO drivers:
+#
+# CONFIG_GPIO_BASIC_MMIO is not set
+# CONFIG_GPIO_IT8761E is not set
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX7300 is not set
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_SX150X is not set
+# CONFIG_GPIO_ADP5588 is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+# CONFIG_GPIO_74X164 is not set
+
+#
+# AC97 GPIO expanders:
+#
+
+#
+# MODULbus GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_LS1X_WDT=y
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+CONFIG_BCMA_POSSIBLE=y
+
+#
+# Broadcom specific AMBA
+#
+# CONFIG_BCMA is not set
+# CONFIG_MFD_SUPPORT is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+CONFIG_FB_DDC=y
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_WMT_GE_ROPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+CONFIG_FB_MODE_HELPERS=y
+CONFIG_FB_TILEBLITTING=y
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_SSD1305 is not set
+# CONFIG_FB_ST7920 is not set
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_LOONGSON1=y
+# CONFIG_LS1X_FB0 is not set
+CONFIG_LS1X_FB1=y
+CONFIG_FB_LS1X_I2C=y
+# CONFIG_FB_UDL is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_BROADSHEET is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+# CONFIG_LCD_L4F00242T03 is not set
+# CONFIG_LCD_LMS283GF05 is not set
+# CONFIG_LCD_LTV350QV is not set
+# CONFIG_LCD_TDO24M is not set
+# CONFIG_LCD_VGG2432A4 is not set
+# CONFIG_LCD_PLATFORM is not set
+# CONFIG_LCD_S6E63M0 is not set
+# CONFIG_LCD_LD9040 is not set
+# CONFIG_LCD_JBT6K74 is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_GENERIC=y
+# CONFIG_BACKLIGHT_ADP8860 is not set
+# CONFIG_BACKLIGHT_ADP8870 is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LINUX_CLUT224=y
+CONFIG_SOUND=y
+CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
+# CONFIG_SND is not set
+CONFIG_SOUND_PRIME=y
+CONFIG_SOUND_LS1X_AC97=y
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_ACRUX is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_HID_DRAGONRISE is not set
+# CONFIG_HID_EMS_FF is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_KEYTOUCH is not set
+# CONFIG_HID_KYE is not set
+# CONFIG_HID_UCLOGIC is not set
+# CONFIG_HID_WALTOP is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_TWINHAN is not set
+# CONFIG_HID_KENSINGTON is not set
+# CONFIG_HID_LCPOWER is not set
+# CONFIG_HID_LOGITECH is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_MULTITOUCH is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_PICOLCD is not set
+# CONFIG_HID_QUANTA is not set
+# CONFIG_HID_ROCCAT is not set
+# CONFIG_HID_ROCCAT_ARVO is not set
+# CONFIG_HID_ROCCAT_KONE is not set
+# CONFIG_HID_ROCCAT_KONEPLUS is not set
+# CONFIG_HID_ROCCAT_KOVAPLUS is not set
+# CONFIG_HID_ROCCAT_PYRA is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_HID_GREENASIA is not set
+# CONFIG_HID_SMARTJOYPLUS is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_HID_THRUSTMASTER is not set
+# CONFIG_HID_ZEROPLUS is not set
+# CONFIG_HID_ZYDACRON is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+CONFIG_USB_DYNAMIC_MINORS=y
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_EHCI_TT_NEWSCHED=y
+CONFIG_USB_EHCI_HCD_LS1B=y
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_LS1B=y
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+CONFIG_USB_STORAGE_REALTEK=y
+CONFIG_USB_STORAGE_DATAFAB=y
+CONFIG_USB_STORAGE_FREECOM=y
+CONFIG_USB_STORAGE_ISD200=y
+CONFIG_USB_STORAGE_USBAT=y
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_STORAGE_JUMPSHOT=y
+CONFIG_USB_STORAGE_ALAUDA=y
+CONFIG_USB_STORAGE_ONETOUCH=y
+CONFIG_USB_STORAGE_KARMA=y
+CONFIG_USB_STORAGE_CYPRESS_ATACB=y
+CONFIG_USB_STORAGE_ENE_UB6250=y
+CONFIG_USB_UAS=y
+CONFIG_USB_LIBUSUAL=y
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+CONFIG_USB_SERIAL=y
+# CONFIG_USB_SERIAL_CONSOLE is not set
+# CONFIG_USB_EZUSB is not set
+CONFIG_USB_SERIAL_GENERIC=y
+# CONFIG_USB_SERIAL_AIRCABLE is not set
+# CONFIG_USB_SERIAL_ARK3116 is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_CH341 is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_CP210X is not set
+# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_FUNSOFT is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_IPAQ is not set
+# CONFIG_USB_SERIAL_IR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
+# CONFIG_USB_SERIAL_GARMIN is not set
+# CONFIG_USB_SERIAL_IPW is not set
+# CONFIG_USB_SERIAL_IUU is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KLSI is not set
+# CONFIG_USB_SERIAL_KOBIL_SCT is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_MOS7720 is not set
+# CONFIG_USB_SERIAL_MOS7840 is not set
+# CONFIG_USB_SERIAL_MOTOROLA is not set
+# CONFIG_USB_SERIAL_NAVMAN is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_OTI6858 is not set
+# CONFIG_USB_SERIAL_QCAUX is not set
+CONFIG_USB_SERIAL_QUALCOMM=y
+# CONFIG_USB_SERIAL_SPCP8X5 is not set
+# CONFIG_USB_SERIAL_HP4X is not set
+# CONFIG_USB_SERIAL_SAFE is not set
+# CONFIG_USB_SERIAL_SIEMENS_MPI is not set
+# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
+# CONFIG_USB_SERIAL_SYMBOL is not set
+# CONFIG_USB_SERIAL_TI is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_XIRCOM is not set
+CONFIG_USB_SERIAL_WWAN=y
+CONFIG_USB_SERIAL_OPTION=y
+# CONFIG_USB_SERIAL_OMNINET is not set
+# CONFIG_USB_SERIAL_OPTICON is not set
+# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set
+# CONFIG_USB_SERIAL_ZIO is not set
+# CONFIG_USB_SERIAL_SSU100 is not set
+# CONFIG_USB_SERIAL_DEBUG is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_YUREX is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+# CONFIG_MMC_CLKGATE is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_MINORS=8
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+# CONFIG_MMC_SDHCI is not set
+CONFIG_MMC_SPI=y
+# CONFIG_MMC_VUB300 is not set
+# CONFIG_MMC_USHC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_NFC_DEVICES is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+# CONFIG_RTC_INTF_PROC is not set
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_DS3232 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_ISL12022 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+# CONFIG_RTC_DRV_EM3027 is not set
+# CONFIG_RTC_DRV_RV3029C2 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T93 is not set
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_LOONGSON1=y
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+CONFIG_EXT2_FS_XIP=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_DEFAULTS_TO_ORDERED=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+# CONFIG_EXT4_FS is not set
+CONFIG_FS_XIP=y
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_FANOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_QUOTACTL is not set
+CONFIG_AUTOFS4_FS=y
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# Caches
+#
+CONFIG_FSCACHE=y
+CONFIG_FSCACHE_STATS=y
+CONFIG_FSCACHE_HISTOGRAM=y
+# CONFIG_FSCACHE_DEBUG is not set
+# CONFIG_FSCACHE_OBJECT_LIST is not set
+CONFIG_CACHEFILES=y
+# CONFIG_CACHEFILES_DEBUG is not set
+# CONFIG_CACHEFILES_HISTOGRAM is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=936
+CONFIG_FAT_DEFAULT_IOCHARSET="cp936"
+CONFIG_NTFS_FS=y
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_TMPFS_XATTR=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_CONFIGFS_FS=y
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_YAFFS_FS=y
+CONFIG_YAFFS_YAFFS1=y
+# CONFIG_YAFFS_9BYTE_TAGS is not set
+# CONFIG_YAFFS_DOES_ECC is not set
+CONFIG_YAFFS_YAFFS2=y
+CONFIG_YAFFS_AUTO_YAFFS2=y
+CONFIG_YAFFS_DISABLE_TAGS_ECC=y
+# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
+# CONFIG_YAFFS_EMPTY_LOST_AND_FOUND is not set
+# CONFIG_YAFFS_DISABLE_BLOCK_REFRESHING is not set
+# CONFIG_YAFFS_DISABLE_BACKGROUND is not set
+CONFIG_YAFFS_XATTR=y
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+# CONFIG_JFFS2_RTIME is not set
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_JFFS2_CMODE_NONE is not set
+CONFIG_JFFS2_CMODE_PRIORITY=y
+# CONFIG_JFFS2_CMODE_SIZE is not set
+# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
+# CONFIG_LOGFS is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_MINIX_FS_NATIVE_ENDIAN is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_PSTORE is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_V4_1=y
+CONFIG_PNFS_FILE_LAYOUT=y
+CONFIG_ROOT_NFS=y
+CONFIG_NFS_FSCACHE=y
+CONFIG_NFS_USE_LEGACY_DNS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+# CONFIG_CEPH_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="cp936"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+CONFIG_NLS_CODEPAGE_936=y
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_SECTION_MISMATCH is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_HARDLOCKUP_DETECTOR is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_SPARSE_RCU_POINTER is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
+# CONFIG_ATOMIC64_SELFTEST is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_TEST_KSTRTOX is not set
+CONFIG_EARLY_PRINTK=y
+# CONFIG_CMDLINE_BOOL is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY_DMESG_RESTRICT is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_PCOMP2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=y
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=y
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_ZLIB=y
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_USER_API_HASH is not set
+# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_VIRTUALIZATION is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC_ITU_T=y
+CONFIG_CRC32=y
+CONFIG_CRC7=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+# CONFIG_XZ_DEC is not set
+# CONFIG_XZ_DEC_BCJ is not set
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_AVERAGE=y
diff -uNra linux-3.0.82/arch/mips/configs/ls1b_cloud_defconfig linux-3.0.82x/arch/mips/configs/ls1b_cloud_defconfig
--- linux-3.0.82/arch/mips/configs/ls1b_cloud_defconfig	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/configs/ls1b_cloud_defconfig	2017-09-23 03:42:49.350677105 +0800
@@ -0,0 +1,1462 @@
+#
+# Automatically generated make config: don't edit
+# Linux/mips 3.0.0 Kernel Configuration
+#
+CONFIG_MIPS=y
+
+#
+# Machine selection
+#
+# CONFIG_MIPS_ALCHEMY is not set
+# CONFIG_AR7 is not set
+# CONFIG_ATH79 is not set
+# CONFIG_BCM47XX is not set
+# CONFIG_BCM63XX is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_MACH_JZ4740 is not set
+# CONFIG_LANTIQ is not set
+# CONFIG_LASAT is not set
+CONFIG_MACH_LOONGSON=y
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SIM is not set
+# CONFIG_NEC_MARKEINS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_NXP_STB220 is not set
+# CONFIG_NXP_STB225 is not set
+# CONFIG_PNX8550_JBS is not set
+# CONFIG_PNX8550_STB810 is not set
+# CONFIG_PMC_MSP is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_POWERTV is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP28 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_CRHINE is not set
+# CONFIG_SIBYTE_CARMEL is not set
+# CONFIG_SIBYTE_CRHONE is not set
+# CONFIG_SIBYTE_RHONE is not set
+# CONFIG_SIBYTE_SWARM is not set
+# CONFIG_SIBYTE_LITTLESUR is not set
+# CONFIG_SIBYTE_SENTOSA is not set
+# CONFIG_SIBYTE_BIGSUR is not set
+# CONFIG_SNI_RM is not set
+# CONFIG_MACH_TX39XX is not set
+# CONFIG_MACH_TX49XX is not set
+# CONFIG_MIKROTIK_RB532 is not set
+# CONFIG_WR_PPMC is not set
+# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
+# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
+# CONFIG_NLM_XLR_BOARD is not set
+# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
+# CONFIG_HAVE_PWM is not set
+# CONFIG_LS1A_MACH is not set
+CONFIG_LS1B_MACH=y
+# CONFIG_LEMOTE_FULOONG2E is not set
+# CONFIG_LEMOTE_MACH2F is not set
+CONFIG_LS1B_BOARD=y
+# CONFIG_LS1B_CORE_BOARD is not set
+CONFIG_LOONGSON_UART_BASE=y
+# CONFIG_LOONGSON_MC146818 is not set
+# CONFIG_LS1X_EXTERN_TIMER is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+CONFIG_CEVT_R4K_LIB=y
+CONFIG_CEVT_R4K=y
+CONFIG_CSRC_R4K_LIB=y
+CONFIG_CSRC_R4K=y
+# CONFIG_ARCH_DMA_ADDR_T_64BIT is not set
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+# CONFIG_MIPS_MACHINE is not set
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_GPIO=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_BOOT_ELF32=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+
+#
+# CPU selection
+#
+CONFIG_CPU_LOONGSON1B=y
+CONFIG_SYS_SUPPORTS_ZBOOT=y
+CONFIG_CPU_LS232=y
+CONFIG_SYS_HAS_CPU_LOONGSON1B=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_CPUFREQ=y
+
+#
+# Kernel type
+#
+CONFIG_32BIT=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_FORCE_MAX_ZONEORDER=12
+CONFIG_MIPS_MT_DISABLED=y
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_CPU_HAS_WB=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_HIGHMEM is not set
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_SYS_SUPPORTS_HIGHMEM=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_COMPACTION is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
+CONFIG_NEED_PER_CPU_KM=y
+# CONFIG_CLEANCACHE is not set
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_256 is not set
+# CONFIG_HZ_1000 is not set
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=250
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+# CONFIG_PREEMPT is not set
+# CONFIG_KEXEC is not set
+# CONFIG_SECCOMP is not set
+# CONFIG_USE_OF is not set
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_HAVE_IRQ_WORK=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_CROSS_COMPILE=""
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_DEFAULT_HOSTNAME="loongson"
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_FHANDLE is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+CONFIG_HAVE_GENERIC_HARDIRQS=y
+
+#
+# IRQ subsystem
+#
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_IRQ_SHOW=y
+
+#
+# RCU Subsystem
+#
+CONFIG_TINY_RCU=y
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_CGROUPS is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_SCHED_AUTOGROUP is not set
+# CONFIG_SYSFS_DEPRECATED is not set
+# CONFIG_RELAY is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EXPERT=y
+CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_KALLSYMS is not set
+CONFIG_HOTPLUG=y
+# CONFIG_PRINTK is not set
+# CONFIG_BUG is not set
+# CONFIG_ELF_CORE is not set
+# CONFIG_PCSPKR_PLATFORM is not set
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_EMBEDDED=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
+
+#
+# Kernel Performance Events And Counters
+#
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
+# CONFIG_VM_EVENT_COUNTERS is not set
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_COMPAT_BRK is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_JUMP_LABEL=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+
+#
+# GCOV-based kernel profiling
+#
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+# CONFIG_MODULES is not set
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+CONFIG_BLK_DEV_BSG=y
+CONFIG_BLK_DEV_INTEGRITY=y
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+CONFIG_INLINE_SPIN_UNLOCK=y
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+CONFIG_INLINE_READ_UNLOCK=y
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+CONFIG_INLINE_READ_UNLOCK_IRQ=y
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+CONFIG_INLINE_WRITE_UNLOCK=y
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_FREEZER is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_MMU=y
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_HAVE_AOUT is not set
+CONFIG_BINFMT_MISC=y
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Power management options
+#
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_SUSPEND is not set
+# CONFIG_PM_RUNTIME is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE_DEMUX is not set
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_LRO=y
+# CONFIG_INET_DIAG is not set
+CONFIG_TCP_CONG_ADVANCED=y
+CONFIG_TCP_CONG_BIC=y
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_TCP_CONG_WESTWOOD=y
+CONFIG_TCP_CONG_HTCP=y
+# CONFIG_TCP_CONG_HSTCP is not set
+# CONFIG_TCP_CONG_HYBLA is not set
+# CONFIG_TCP_CONG_VEGAS is not set
+# CONFIG_TCP_CONG_SCALABLE is not set
+# CONFIG_TCP_CONG_LP is not set
+# CONFIG_TCP_CONG_VENO is not set
+# CONFIG_TCP_CONG_YEAH is not set
+# CONFIG_TCP_CONG_ILLINOIS is not set
+# CONFIG_DEFAULT_BIC is not set
+CONFIG_DEFAULT_CUBIC=y
+# CONFIG_DEFAULT_HTCP is not set
+# CONFIG_DEFAULT_WESTWOOD is not set
+# CONFIG_DEFAULT_RENO is not set
+CONFIG_DEFAULT_TCP_CONG="cubic"
+CONFIG_TCP_MD5SIG=y
+# CONFIG_IPV6 is not set
+CONFIG_NETWORK_SECMARK=y
+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_L2TP is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+CONFIG_DCB=y
+# CONFIG_BATMAN_ADV is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+# CONFIG_CAIF is not set
+# CONFIG_CEPH_LIB is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/mdev"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_SM_FTL is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+CONFIG_MTD_M25P80=y
+CONFIG_M25PXX_USE_FAST_READ=y
+# CONFIG_MTD_SST25L is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND_ECC=y
+# CONFIG_MTD_NAND_ECC_SMC is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_BCH is not set
+# CONFIG_MTD_SM_COMMON is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+CONFIG_MTD_NAND_LS1X=y
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_BLK_DEV_RBD is not set
+# CONFIG_SENSORS_LIS3LV02D is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI_MOD=y
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_TARGET_CORE is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_MII=y
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+CONFIG_REALTEK_PHY=y
+# CONFIG_NATIONAL_PHY is not set
+CONFIG_STE10XP=y
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_MICREL_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+# CONFIG_NET_ETHERNET is not set
+CONFIG_NETDEV_1000=y
+CONFIG_STMMAC_ETH=y
+CONFIG_LS1X_GMAC0=y
+CONFIG_LS1X_GMAC0_100M=y
+# CONFIG_LS1X_GMAC0_1000M is not set
+# CONFIG_LS1X_GMAC1 is not set
+# CONFIG_RTL8305SC is not set
+CONFIG_STMMAC_DA=y
+# CONFIG_STMMAC_DUAL_MAC is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_WLAN is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_USB_IPHETH is not set
+# CONFIG_WAN is not set
+
+#
+# CAIF transport drivers
+#
+CONFIG_PPP=y
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=y
+CONFIG_PPP_SYNC_TTY=y
+CONFIG_PPP_DEFLATE=y
+CONFIG_PPP_BSDCOMP=y
+CONFIG_PPP_MPPE=y
+CONFIG_PPPOE=y
+# CONFIG_SLIP is not set
+CONFIG_SLHC=y
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_N_GSM is not set
+# CONFIG_TRACE_SINK is not set
+# CONFIG_DEVKMEM is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+# CONFIG_MULTIFUNC_CONFIG_SERAIL0 is not set
+# CONFIG_MULTIFUNC_CONFIG_SERAIL1 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+# CONFIG_SERIAL_MAX3107 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+# CONFIG_SERIAL_IFX6X60 is not set
+# CONFIG_SERIAL_XILINX_PS_UART is not set
+# CONFIG_TTY_PRINTK is not set
+# CONFIG_LS1B_BUZZER is not set
+# CONFIG_LS1B_PWM_DRIVER is not set
+# CONFIG_LS1B_BBDIO is not set
+# CONFIG_LS1B_IR is not set
+# CONFIG_LS1B_STEPMOTOR is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_RAMOOPS is not set
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_LS1B_SPI=y
+CONFIG_LS1B_SPI0=y
+# CONFIG_LS1B_SPI1 is not set
+# CONFIG_SPI_ALTERA is not set
+CONFIG_SPI_BITBANG=y
+# CONFIG_SPI_GPIO is not set
+# CONFIG_SPI_OC_TINY is not set
+# CONFIG_SPI_PXA2XX_PCI is not set
+# CONFIG_SPI_XILINX is not set
+# CONFIG_SPI_DESIGNWARE is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+
+#
+# PPS generators support
+#
+
+#
+# PTP clock support
+#
+
+#
+# Enable Device Drivers -> PPS to see the PTP clock options.
+#
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO drivers:
+#
+# CONFIG_GPIO_BASIC_MMIO is not set
+# CONFIG_GPIO_IT8761E is not set
+
+#
+# I2C GPIO expanders:
+#
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+# CONFIG_GPIO_74X164 is not set
+
+#
+# AC97 GPIO expanders:
+#
+
+#
+# MODULbus GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+CONFIG_BCMA_POSSIBLE=y
+
+#
+# Broadcom specific AMBA
+#
+# CONFIG_BCMA is not set
+# CONFIG_MFD_SUPPORT is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_WMT_GE_ROPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+CONFIG_FB_MODE_HELPERS=y
+CONFIG_FB_TILEBLITTING=y
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_SSD1305 is not set
+# CONFIG_FB_ST7920 is not set
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_LOONGSON1=y
+CONFIG_LS1X_FB0=y
+# CONFIG_FB_LS1X_I2C is not set
+# CONFIG_FB_UDL is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_BROADSHEET is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LINUX_CLUT224=y
+CONFIG_SOUND=y
+CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
+# CONFIG_SND is not set
+CONFIG_SOUND_PRIME=y
+CONFIG_SOUND_LS1X_AC97=y
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_ACRUX is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_HID_DRAGONRISE is not set
+# CONFIG_HID_EMS_FF is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_KEYTOUCH is not set
+# CONFIG_HID_KYE is not set
+# CONFIG_HID_UCLOGIC is not set
+# CONFIG_HID_WALTOP is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_TWINHAN is not set
+# CONFIG_HID_KENSINGTON is not set
+# CONFIG_HID_LCPOWER is not set
+# CONFIG_HID_LOGITECH is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_MULTITOUCH is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_PICOLCD is not set
+# CONFIG_HID_QUANTA is not set
+# CONFIG_HID_ROCCAT is not set
+# CONFIG_HID_ROCCAT_ARVO is not set
+# CONFIG_HID_ROCCAT_KONE is not set
+# CONFIG_HID_ROCCAT_KONEPLUS is not set
+# CONFIG_HID_ROCCAT_KOVAPLUS is not set
+# CONFIG_HID_ROCCAT_PYRA is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_HID_GREENASIA is not set
+# CONFIG_HID_SMARTJOYPLUS is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_HID_THRUSTMASTER is not set
+# CONFIG_HID_ZEROPLUS is not set
+# CONFIG_HID_ZYDACRON is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+CONFIG_USB_DYNAMIC_MINORS=y
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_EHCI_TT_NEWSCHED=y
+CONFIG_USB_EHCI_HCD_LS1B=y
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_LS1B=y
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+CONFIG_USB_STORAGE_REALTEK=y
+CONFIG_USB_STORAGE_DATAFAB=y
+CONFIG_USB_STORAGE_FREECOM=y
+CONFIG_USB_STORAGE_ISD200=y
+CONFIG_USB_STORAGE_USBAT=y
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_STORAGE_JUMPSHOT=y
+CONFIG_USB_STORAGE_ALAUDA=y
+CONFIG_USB_STORAGE_ONETOUCH=y
+CONFIG_USB_STORAGE_KARMA=y
+CONFIG_USB_STORAGE_CYPRESS_ATACB=y
+CONFIG_USB_STORAGE_ENE_UB6250=y
+CONFIG_USB_UAS=y
+CONFIG_USB_LIBUSUAL=y
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_YUREX is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_NFC_DEVICES is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+# CONFIG_RTC_INTF_PROC is not set
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T93 is not set
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_LOONGSON1=y
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_FANOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_QUOTACTL is not set
+CONFIG_AUTOFS4_FS=y
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# Caches
+#
+CONFIG_FSCACHE=y
+CONFIG_FSCACHE_STATS=y
+CONFIG_FSCACHE_HISTOGRAM=y
+# CONFIG_FSCACHE_DEBUG is not set
+# CONFIG_FSCACHE_OBJECT_LIST is not set
+CONFIG_CACHEFILES=y
+# CONFIG_CACHEFILES_DEBUG is not set
+# CONFIG_CACHEFILES_HISTOGRAM is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=936
+CONFIG_FAT_DEFAULT_IOCHARSET="cp936"
+CONFIG_NTFS_FS=y
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_TMPFS_XATTR=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_CONFIGFS_FS=y
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_YAFFS_FS=y
+CONFIG_YAFFS_YAFFS1=y
+# CONFIG_YAFFS_9BYTE_TAGS is not set
+# CONFIG_YAFFS_DOES_ECC is not set
+CONFIG_YAFFS_YAFFS2=y
+CONFIG_YAFFS_AUTO_YAFFS2=y
+CONFIG_YAFFS_DISABLE_TAGS_ECC=y
+# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
+# CONFIG_YAFFS_EMPTY_LOST_AND_FOUND is not set
+# CONFIG_YAFFS_DISABLE_BLOCK_REFRESHING is not set
+# CONFIG_YAFFS_DISABLE_BACKGROUND is not set
+CONFIG_YAFFS_XATTR=y
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+# CONFIG_JFFS2_RTIME is not set
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_JFFS2_CMODE_NONE is not set
+CONFIG_JFFS2_CMODE_PRIORITY=y
+# CONFIG_JFFS2_CMODE_SIZE is not set
+# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
+# CONFIG_LOGFS is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_MINIX_FS_NATIVE_ENDIAN is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_PSTORE is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_NETWORK_FILESYSTEMS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="cp936"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+CONFIG_NLS_CODEPAGE_936=y
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_SECTION_MISMATCH is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_HARDLOCKUP_DETECTOR is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_SPARSE_RCU_POINTER is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
+# CONFIG_ATOMIC64_SELFTEST is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_TEST_KSTRTOX is not set
+# CONFIG_EARLY_PRINTK is not set
+# CONFIG_CMDLINE_BOOL is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY_DMESG_RESTRICT is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_PCOMP2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=y
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=y
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_ZLIB=y
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_USER_API_HASH is not set
+# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_VIRTUALIZATION is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+CONFIG_CRC_T10DIF=y
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+# CONFIG_XZ_DEC is not set
+# CONFIG_XZ_DEC_BCJ is not set
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
+CONFIG_GENERIC_ATOMIC64=y
+# CONFIG_AVERAGE is not set
diff -uNra linux-3.0.82/arch/mips/configs/ls1b_core_defconfig linux-3.0.82x/arch/mips/configs/ls1b_core_defconfig
--- linux-3.0.82/arch/mips/configs/ls1b_core_defconfig	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/configs/ls1b_core_defconfig	2017-09-23 03:42:49.354677092 +0800
@@ -0,0 +1,1505 @@
+#
+# Automatically generated make config: don't edit
+# Linux/mips 3.0.0 Kernel Configuration
+#
+CONFIG_MIPS=y
+
+#
+# Machine selection
+#
+# CONFIG_MIPS_ALCHEMY is not set
+# CONFIG_AR7 is not set
+# CONFIG_ATH79 is not set
+# CONFIG_BCM47XX is not set
+# CONFIG_BCM63XX is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_MACH_JZ4740 is not set
+# CONFIG_LANTIQ is not set
+# CONFIG_LASAT is not set
+CONFIG_MACH_LOONGSON=y
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SIM is not set
+# CONFIG_NEC_MARKEINS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_NXP_STB220 is not set
+# CONFIG_NXP_STB225 is not set
+# CONFIG_PNX8550_JBS is not set
+# CONFIG_PNX8550_STB810 is not set
+# CONFIG_PMC_MSP is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_POWERTV is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP28 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_CRHINE is not set
+# CONFIG_SIBYTE_CARMEL is not set
+# CONFIG_SIBYTE_CRHONE is not set
+# CONFIG_SIBYTE_RHONE is not set
+# CONFIG_SIBYTE_SWARM is not set
+# CONFIG_SIBYTE_LITTLESUR is not set
+# CONFIG_SIBYTE_SENTOSA is not set
+# CONFIG_SIBYTE_BIGSUR is not set
+# CONFIG_SNI_RM is not set
+# CONFIG_MACH_TX39XX is not set
+# CONFIG_MACH_TX49XX is not set
+# CONFIG_MIKROTIK_RB532 is not set
+# CONFIG_WR_PPMC is not set
+# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
+# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
+# CONFIG_NLM_XLR_BOARD is not set
+# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
+# CONFIG_HAVE_PWM is not set
+# CONFIG_LS1A_MACH is not set
+CONFIG_LS1B_MACH=y
+# CONFIG_LS1C_MACH is not set
+# CONFIG_LEMOTE_FULOONG2E is not set
+# CONFIG_LEMOTE_MACH2F is not set
+# CONFIG_LS1B_BOARD is not set
+CONFIG_LS1B_CORE_BOARD=y
+CONFIG_LOONGSON_UART_BASE=y
+# CONFIG_LOONGSON_MC146818 is not set
+# CONFIG_LS1X_EXTERN_TIMER is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+CONFIG_CEVT_R4K_LIB=y
+CONFIG_CEVT_R4K=y
+CONFIG_CSRC_R4K_LIB=y
+CONFIG_CSRC_R4K=y
+# CONFIG_ARCH_DMA_ADDR_T_64BIT is not set
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+# CONFIG_MIPS_MACHINE is not set
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_GPIO=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_BOOT_ELF32=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+
+#
+# CPU selection
+#
+CONFIG_CPU_LOONGSON1B=y
+CONFIG_SYS_SUPPORTS_ZBOOT=y
+CONFIG_CPU_LS232=y
+CONFIG_SYS_HAS_CPU_LOONGSON1B=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_CPUFREQ=y
+
+#
+# Kernel type
+#
+CONFIG_32BIT=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_FORCE_MAX_ZONEORDER=12
+CONFIG_MIPS_MT_DISABLED=y
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_CPU_HAS_WB=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_HIGHMEM is not set
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_SYS_SUPPORTS_HIGHMEM=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_COMPACTION=y
+CONFIG_MIGRATION=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_KSM=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
+CONFIG_NEED_PER_CPU_KM=y
+CONFIG_CLEANCACHE=y
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_256 is not set
+# CONFIG_HZ_1000 is not set
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=250
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+# CONFIG_PREEMPT is not set
+CONFIG_KEXEC=y
+CONFIG_SECCOMP=y
+# CONFIG_USE_OF is not set
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_HAVE_IRQ_WORK=y
+CONFIG_IRQ_WORK=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_CROSS_COMPILE=""
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_DEFAULT_HOSTNAME="(none)"
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_FHANDLE=y
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+CONFIG_HAVE_GENERIC_HARDIRQS=y
+
+#
+# IRQ subsystem
+#
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_IRQ_SHOW=y
+
+#
+# RCU Subsystem
+#
+CONFIG_TINY_RCU=y
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=16
+CONFIG_CGROUPS=y
+# CONFIG_CGROUP_DEBUG is not set
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CPUSETS=y
+CONFIG_PROC_PID_CPUSET=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_RESOURCE_COUNTERS=y
+CONFIG_CGROUP_MEM_RES_CTLR=y
+CONFIG_CGROUP_PERF=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_BLK_CGROUP=y
+# CONFIG_DEBUG_BLK_CGROUP is not set
+CONFIG_NAMESPACES=y
+CONFIG_UTS_NS=y
+CONFIG_IPC_NS=y
+CONFIG_USER_NS=y
+CONFIG_PID_NS=y
+CONFIG_NET_NS=y
+CONFIG_SCHED_AUTOGROUP=y
+CONFIG_MM_OWNER=y
+# CONFIG_SYSFS_DEPRECATED is not set
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_XZ=y
+CONFIG_RD_LZO=y
+# CONFIG_INITRAMFS_COMPRESSION_NONE is not set
+# CONFIG_INITRAMFS_COMPRESSION_GZIP is not set
+# CONFIG_INITRAMFS_COMPRESSION_BZIP2 is not set
+# CONFIG_INITRAMFS_COMPRESSION_LZMA is not set
+# CONFIG_INITRAMFS_COMPRESSION_XZ is not set
+# CONFIG_INITRAMFS_COMPRESSION_LZO is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EXPERT=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+# CONFIG_BUG is not set
+CONFIG_ELF_CORE=y
+# CONFIG_PCSPKR_PLATFORM is not set
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_EMBEDDED=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_PERF_EVENTS=y
+CONFIG_PERF_COUNTERS=y
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_COMPAT_BRK is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+CONFIG_PROFILING=y
+# CONFIG_OPROFILE is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_KPROBES=y
+CONFIG_JUMP_LABEL=y
+CONFIG_KRETPROBES=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+
+#
+# GCOV-based kernel profiling
+#
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+CONFIG_BLK_DEV_BSG=y
+CONFIG_BLK_DEV_INTEGRITY=y
+CONFIG_BLK_DEV_THROTTLING=y
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_CFQ_GROUP_IOSCHED=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+CONFIG_INLINE_SPIN_UNLOCK=y
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+CONFIG_INLINE_READ_UNLOCK=y
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+CONFIG_INLINE_READ_UNLOCK_IRQ=y
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+CONFIG_INLINE_WRITE_UNLOCK=y
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+CONFIG_FREEZER=y
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_MMU=y
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+CONFIG_BINFMT_MISC=y
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Power management options
+#
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_SUSPEND is not set
+# CONFIG_PM_RUNTIME is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE_DEMUX is not set
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_LRO=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+CONFIG_TCP_CONG_ADVANCED=y
+CONFIG_TCP_CONG_BIC=y
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_TCP_CONG_WESTWOOD=y
+CONFIG_TCP_CONG_HTCP=y
+# CONFIG_TCP_CONG_HSTCP is not set
+# CONFIG_TCP_CONG_HYBLA is not set
+# CONFIG_TCP_CONG_VEGAS is not set
+# CONFIG_TCP_CONG_SCALABLE is not set
+# CONFIG_TCP_CONG_LP is not set
+# CONFIG_TCP_CONG_VENO is not set
+# CONFIG_TCP_CONG_YEAH is not set
+# CONFIG_TCP_CONG_ILLINOIS is not set
+# CONFIG_DEFAULT_BIC is not set
+CONFIG_DEFAULT_CUBIC=y
+# CONFIG_DEFAULT_HTCP is not set
+# CONFIG_DEFAULT_WESTWOOD is not set
+# CONFIG_DEFAULT_RENO is not set
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+CONFIG_NETWORK_SECMARK=y
+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_L2TP is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+CONFIG_DCB=y
+CONFIG_DNS_RESOLVER=y
+# CONFIG_BATMAN_ADV is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_NET_TCPPROBE is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+# CONFIG_CAIF is not set
+# CONFIG_CEPH_LIB is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH=""
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_STANDALONE is not set
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+# CONFIG_MTD_CHAR is not set
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_SM_FTL is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+CONFIG_MTD_M25P80=y
+CONFIG_M25PXX_USE_FAST_READ=y
+# CONFIG_MTD_SST25L is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND_ECC=y
+# CONFIG_MTD_NAND_ECC_SMC is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_BCH is not set
+# CONFIG_MTD_SM_COMMON is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+CONFIG_MTD_NAND_LS1X=y
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_BLK_DEV_RBD is not set
+# CONFIG_SENSORS_LIS3LV02D is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI_MOD=y
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_TARGET_CORE is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_MII=y
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_MICREL_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+# CONFIG_NET_ETHERNET is not set
+CONFIG_NETDEV_1000=y
+CONFIG_STMMAC_ETH=y
+CONFIG_LS1X_GMAC0=y
+CONFIG_LS1X_GMAC0_100M=y
+# CONFIG_LS1X_GMAC0_1000M is not set
+# CONFIG_LS1X_GMAC1 is not set
+# CONFIG_RTL8305SC is not set
+CONFIG_STMMAC_DA=y
+CONFIG_STMMAC_DUAL_MAC=y
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_WLAN is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_USB_IPHETH is not set
+# CONFIG_WAN is not set
+
+#
+# CAIF transport drivers
+#
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+CONFIG_INPUT_POLLDEV=y
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_ADS7846=y
+# CONFIG_TOUCHSCREEN_AD7877 is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
+# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2005 is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_N_GSM is not set
+# CONFIG_TRACE_SINK is not set
+# CONFIG_DEVKMEM is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=6
+CONFIG_SERIAL_8250_RUNTIME_UARTS=6
+# CONFIG_SERIAL_8250_EXTENDED is not set
+# CONFIG_MULTIFUNC_CONFIG_SERAIL0 is not set
+# CONFIG_MULTIFUNC_CONFIG_SERAIL1 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+# CONFIG_SERIAL_MAX3107 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+# CONFIG_SERIAL_IFX6X60 is not set
+# CONFIG_SERIAL_XILINX_PS_UART is not set
+# CONFIG_TTY_PRINTK is not set
+# CONFIG_LS1B_BUZZER is not set
+# CONFIG_LS1B_PWM_DRIVER is not set
+# CONFIG_LS1B_BBDIO is not set
+# CONFIG_LS1B_IR is not set
+# CONFIG_LS1B_STEPMOTOR is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_RAMOOPS is not set
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_LS1B_SPI=y
+CONFIG_LS1B_SPI0=y
+CONFIG_LS1B_SPI1=y
+# CONFIG_SPI_ALTERA is not set
+CONFIG_SPI_BITBANG=y
+# CONFIG_SPI_GPIO is not set
+# CONFIG_SPI_OC_TINY is not set
+# CONFIG_SPI_PXA2XX_PCI is not set
+# CONFIG_SPI_XILINX is not set
+# CONFIG_SPI_DESIGNWARE is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+
+#
+# PPS generators support
+#
+
+#
+# PTP clock support
+#
+
+#
+# Enable Device Drivers -> PPS to see the PTP clock options.
+#
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO drivers:
+#
+# CONFIG_GPIO_BASIC_MMIO is not set
+# CONFIG_GPIO_IT8761E is not set
+
+#
+# I2C GPIO expanders:
+#
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+# CONFIG_GPIO_74X164 is not set
+
+#
+# AC97 GPIO expanders:
+#
+
+#
+# MODULbus GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_LS1X_WDT=y
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+CONFIG_BCMA_POSSIBLE=y
+
+#
+# Broadcom specific AMBA
+#
+# CONFIG_BCMA is not set
+# CONFIG_MFD_SUPPORT is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_WMT_GE_ROPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_SSD1305 is not set
+# CONFIG_FB_ST7565 is not set
+# CONFIG_FB_ST7920 is not set
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_LOONGSON1=y
+CONFIG_LS1X_FB0=y
+# CONFIG_FB_LS1X_I2C is not set
+# CONFIG_FB_UDL is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_BROADSHEET is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LINUX_CLUT224=y
+CONFIG_SOUND=y
+CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
+# CONFIG_SND is not set
+CONFIG_SOUND_PRIME=y
+CONFIG_SOUND_LS1X_AC97=y
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+CONFIG_HID_PID=y
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_ACRUX is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_HID_DRAGONRISE is not set
+# CONFIG_HID_EMS_FF is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_KEYTOUCH is not set
+# CONFIG_HID_KYE is not set
+# CONFIG_HID_UCLOGIC is not set
+# CONFIG_HID_WALTOP is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_TWINHAN is not set
+# CONFIG_HID_KENSINGTON is not set
+# CONFIG_HID_LCPOWER is not set
+# CONFIG_HID_LOGITECH is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_MULTITOUCH is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_PICOLCD is not set
+# CONFIG_HID_QUANTA is not set
+# CONFIG_HID_ROCCAT is not set
+# CONFIG_HID_ROCCAT_ARVO is not set
+# CONFIG_HID_ROCCAT_KONE is not set
+# CONFIG_HID_ROCCAT_KONEPLUS is not set
+# CONFIG_HID_ROCCAT_KOVAPLUS is not set
+# CONFIG_HID_ROCCAT_PYRA is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_HID_GREENASIA is not set
+# CONFIG_HID_SMARTJOYPLUS is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_HID_THRUSTMASTER is not set
+# CONFIG_HID_ZEROPLUS is not set
+# CONFIG_HID_ZYDACRON is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
+CONFIG_USB_EHCI_TT_NEWSCHED=y
+CONFIG_USB_EHCI_HCD_LS1X=y
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_HCD_LS1X is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+CONFIG_USB_OHCI_HCD_PLATFORM=y
+# CONFIG_USB_EHCI_HCD_PLATFORM is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+CONFIG_USB_STORAGE_REALTEK=y
+CONFIG_USB_STORAGE_DATAFAB=y
+CONFIG_USB_STORAGE_FREECOM=y
+CONFIG_USB_STORAGE_ISD200=y
+CONFIG_USB_STORAGE_USBAT=y
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_STORAGE_JUMPSHOT=y
+CONFIG_USB_STORAGE_ALAUDA=y
+CONFIG_USB_STORAGE_ONETOUCH=y
+CONFIG_USB_STORAGE_KARMA=y
+CONFIG_USB_STORAGE_CYPRESS_ATACB=y
+CONFIG_USB_STORAGE_ENE_UB6250=y
+CONFIG_USB_UAS=y
+CONFIG_USB_LIBUSUAL=y
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_YUREX is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+# CONFIG_MMC_CLKGATE is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_MINORS=8
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+# CONFIG_MMC_SDHCI is not set
+CONFIG_MMC_SPI=y
+# CONFIG_MMC_VUB300 is not set
+# CONFIG_MMC_USHC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_NFC_DEVICES is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T93 is not set
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_LOONGSON1=y
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_EXPORTFS=y
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY_USER=y
+CONFIG_FANOTIFY=y
+CONFIG_QUOTA=y
+# CONFIG_QUOTA_NETLINK_INTERFACE is not set
+# CONFIG_PRINT_QUOTA_WARNING is not set
+# CONFIG_QUOTA_DEBUG is not set
+# CONFIG_QFMT_V1 is not set
+# CONFIG_QFMT_V2 is not set
+CONFIG_QUOTACTL=y
+CONFIG_AUTOFS4_FS=y
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# Caches
+#
+CONFIG_FSCACHE=y
+CONFIG_FSCACHE_STATS=y
+CONFIG_FSCACHE_HISTOGRAM=y
+# CONFIG_FSCACHE_DEBUG is not set
+# CONFIG_FSCACHE_OBJECT_LIST is not set
+CONFIG_CACHEFILES=y
+# CONFIG_CACHEFILES_DEBUG is not set
+CONFIG_CACHEFILES_HISTOGRAM=y
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_NTFS_FS=y
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_TMPFS_XATTR=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_CONFIGFS_FS=y
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_YAFFS_FS=y
+CONFIG_YAFFS_YAFFS1=y
+# CONFIG_YAFFS_9BYTE_TAGS is not set
+# CONFIG_YAFFS_DOES_ECC is not set
+CONFIG_YAFFS_YAFFS2=y
+CONFIG_YAFFS_AUTO_YAFFS2=y
+# CONFIG_YAFFS_DISABLE_TAGS_ECC is not set
+# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
+# CONFIG_YAFFS_EMPTY_LOST_AND_FOUND is not set
+# CONFIG_YAFFS_DISABLE_BLOCK_REFRESHING is not set
+# CONFIG_YAFFS_DISABLE_BACKGROUND is not set
+CONFIG_YAFFS_XATTR=y
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+CONFIG_JFFS2_FS_WBUF_VERIFY=y
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_JFFS2_CMODE_NONE is not set
+CONFIG_JFFS2_CMODE_PRIORITY=y
+# CONFIG_JFFS2_CMODE_SIZE is not set
+# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
+# CONFIG_LOGFS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_MINIX_FS_NATIVE_ENDIAN is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_PSTORE is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_V4_1=y
+CONFIG_PNFS_FILE_LAYOUT=y
+CONFIG_ROOT_NFS=y
+# CONFIG_NFS_FSCACHE is not set
+# CONFIG_NFS_USE_LEGACY_DNS is not set
+CONFIG_NFS_USE_KERNEL_DNS=y
+CONFIG_NFS_USE_NEW_IDMAPPER=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+# CONFIG_CEPH_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="utf8"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+CONFIG_NLS_CODEPAGE_936=y
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=y
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=y
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_SECTION_MISMATCH is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_HARDLOCKUP_DETECTOR is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_SPARSE_RCU_POINTER is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
+# CONFIG_ATOMIC64_SELFTEST is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_TEST_KSTRTOX is not set
+CONFIG_EARLY_PRINTK=y
+# CONFIG_CMDLINE_BOOL is not set
+
+#
+# Security options
+#
+CONFIG_KEYS=y
+# CONFIG_KEYS_DEBUG_PROC_KEYS is not set
+# CONFIG_SECURITY_DMESG_RESTRICT is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+# CONFIG_CRYPTO is not set
+# CONFIG_VIRTUALIZATION is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC_ITU_T=y
+CONFIG_CRC32=y
+CONFIG_CRC7=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_XZ_DEC=y
+# CONFIG_XZ_DEC_X86 is not set
+# CONFIG_XZ_DEC_POWERPC is not set
+# CONFIG_XZ_DEC_IA64 is not set
+# CONFIG_XZ_DEC_ARM is not set
+# CONFIG_XZ_DEC_ARMTHUMB is not set
+# CONFIG_XZ_DEC_SPARC is not set
+# CONFIG_XZ_DEC_BCJ is not set
+# CONFIG_XZ_DEC_TEST is not set
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_XZ=y
+CONFIG_DECOMPRESS_LZO=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
+CONFIG_GENERIC_ATOMIC64=y
+# CONFIG_AVERAGE is not set
diff -uNra linux-3.0.82/arch/mips/configs/ls1b_defconfig linux-3.0.82x/arch/mips/configs/ls1b_defconfig
--- linux-3.0.82/arch/mips/configs/ls1b_defconfig	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/configs/ls1b_defconfig	2017-09-23 03:42:49.354677092 +0800
@@ -0,0 +1,1635 @@
+#
+# Automatically generated make config: don't edit
+# Linux/mips 3.0.82 Kernel Configuration
+#
+CONFIG_MIPS=y
+
+#
+# Machine selection
+#
+# CONFIG_MIPS_ALCHEMY is not set
+# CONFIG_AR7 is not set
+# CONFIG_ATH79 is not set
+# CONFIG_BCM47XX is not set
+# CONFIG_BCM63XX is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_MACH_JZ4740 is not set
+# CONFIG_LANTIQ is not set
+# CONFIG_LASAT is not set
+CONFIG_MACH_LOONGSON=y
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SIM is not set
+# CONFIG_NEC_MARKEINS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_NXP_STB220 is not set
+# CONFIG_NXP_STB225 is not set
+# CONFIG_PNX8550_JBS is not set
+# CONFIG_PNX8550_STB810 is not set
+# CONFIG_PMC_MSP is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_POWERTV is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP28 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_CRHINE is not set
+# CONFIG_SIBYTE_CARMEL is not set
+# CONFIG_SIBYTE_CRHONE is not set
+# CONFIG_SIBYTE_RHONE is not set
+# CONFIG_SIBYTE_SWARM is not set
+# CONFIG_SIBYTE_LITTLESUR is not set
+# CONFIG_SIBYTE_SENTOSA is not set
+# CONFIG_SIBYTE_BIGSUR is not set
+# CONFIG_SNI_RM is not set
+# CONFIG_MACH_TX39XX is not set
+# CONFIG_MACH_TX49XX is not set
+# CONFIG_MIKROTIK_RB532 is not set
+# CONFIG_WR_PPMC is not set
+# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
+# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
+# CONFIG_NLM_XLR_BOARD is not set
+# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
+CONFIG_HAVE_PWM=y
+# CONFIG_LS1A_MACH is not set
+CONFIG_LS1B_MACH=y
+# CONFIG_LS1C_MACH is not set
+# CONFIG_LEMOTE_FULOONG2E is not set
+# CONFIG_LEMOTE_MACH2F is not set
+CONFIG_LS1B_BOARD=y
+# CONFIG_LS1B_CORE_BOARD is not set
+CONFIG_LOONGSON_UART_BASE=y
+# CONFIG_LOONGSON_MC146818 is not set
+# CONFIG_LS1X_EXTERN_TIMER is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+CONFIG_CEVT_R4K_LIB=y
+CONFIG_CEVT_R4K=y
+CONFIG_CSRC_R4K_LIB=y
+CONFIG_CSRC_R4K=y
+# CONFIG_ARCH_DMA_ADDR_T_64BIT is not set
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+# CONFIG_MIPS_MACHINE is not set
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_GPIO=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_BOOT_ELF32=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+
+#
+# CPU selection
+#
+CONFIG_CPU_LOONGSON1B=y
+CONFIG_SYS_SUPPORTS_ZBOOT=y
+CONFIG_CPU_LS232=y
+CONFIG_SYS_HAS_CPU_LOONGSON1B=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_CPUFREQ=y
+
+#
+# Kernel type
+#
+CONFIG_32BIT=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_FORCE_MAX_ZONEORDER=12
+CONFIG_MIPS_MT_DISABLED=y
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_CPU_HAS_WB=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_HIGHMEM is not set
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_SYS_SUPPORTS_HIGHMEM=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_COMPACTION=y
+CONFIG_MIGRATION=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_KSM=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
+CONFIG_NEED_PER_CPU_KM=y
+CONFIG_CLEANCACHE=y
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_256 is not set
+# CONFIG_HZ_1000 is not set
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=250
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+# CONFIG_PREEMPT is not set
+CONFIG_KEXEC=y
+CONFIG_SECCOMP=y
+# CONFIG_USE_OF is not set
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_HAVE_IRQ_WORK=y
+CONFIG_IRQ_WORK=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_CROSS_COMPILE=""
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_DEFAULT_HOSTNAME="(none)"
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_FHANDLE=y
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+CONFIG_HAVE_GENERIC_HARDIRQS=y
+
+#
+# IRQ subsystem
+#
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_IRQ_SHOW=y
+
+#
+# RCU Subsystem
+#
+CONFIG_TINY_RCU=y
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=16
+CONFIG_CGROUPS=y
+# CONFIG_CGROUP_DEBUG is not set
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CPUSETS=y
+CONFIG_PROC_PID_CPUSET=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_RESOURCE_COUNTERS=y
+CONFIG_CGROUP_MEM_RES_CTLR=y
+CONFIG_CGROUP_PERF=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_BLK_CGROUP=y
+# CONFIG_DEBUG_BLK_CGROUP is not set
+CONFIG_NAMESPACES=y
+CONFIG_UTS_NS=y
+CONFIG_IPC_NS=y
+CONFIG_USER_NS=y
+CONFIG_PID_NS=y
+CONFIG_NET_NS=y
+CONFIG_SCHED_AUTOGROUP=y
+CONFIG_MM_OWNER=y
+# CONFIG_SYSFS_DEPRECATED is not set
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_XZ=y
+CONFIG_RD_LZO=y
+# CONFIG_INITRAMFS_COMPRESSION_NONE is not set
+# CONFIG_INITRAMFS_COMPRESSION_GZIP is not set
+# CONFIG_INITRAMFS_COMPRESSION_BZIP2 is not set
+# CONFIG_INITRAMFS_COMPRESSION_LZMA is not set
+# CONFIG_INITRAMFS_COMPRESSION_XZ is not set
+# CONFIG_INITRAMFS_COMPRESSION_LZO is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EXPERT=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+# CONFIG_BUG is not set
+CONFIG_ELF_CORE=y
+# CONFIG_PCSPKR_PLATFORM is not set
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_EMBEDDED=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_PERF_EVENTS=y
+CONFIG_PERF_COUNTERS=y
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_COMPAT_BRK is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+CONFIG_PROFILING=y
+# CONFIG_OPROFILE is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_KPROBES=y
+CONFIG_JUMP_LABEL=y
+CONFIG_KRETPROBES=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+
+#
+# GCOV-based kernel profiling
+#
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+CONFIG_BLK_DEV_BSG=y
+CONFIG_BLK_DEV_INTEGRITY=y
+CONFIG_BLK_DEV_THROTTLING=y
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_CFQ_GROUP_IOSCHED=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+CONFIG_INLINE_SPIN_UNLOCK=y
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+CONFIG_INLINE_READ_UNLOCK=y
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+CONFIG_INLINE_READ_UNLOCK_IRQ=y
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+CONFIG_INLINE_WRITE_UNLOCK=y
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+CONFIG_FREEZER=y
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_MMU=y
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+CONFIG_BINFMT_MISC=y
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Power management options
+#
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_SUSPEND is not set
+# CONFIG_PM_RUNTIME is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE_DEMUX is not set
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_LRO=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+CONFIG_TCP_CONG_ADVANCED=y
+CONFIG_TCP_CONG_BIC=y
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_TCP_CONG_WESTWOOD=y
+CONFIG_TCP_CONG_HTCP=y
+# CONFIG_TCP_CONG_HSTCP is not set
+# CONFIG_TCP_CONG_HYBLA is not set
+# CONFIG_TCP_CONG_VEGAS is not set
+# CONFIG_TCP_CONG_SCALABLE is not set
+# CONFIG_TCP_CONG_LP is not set
+# CONFIG_TCP_CONG_VENO is not set
+# CONFIG_TCP_CONG_YEAH is not set
+# CONFIG_TCP_CONG_ILLINOIS is not set
+# CONFIG_DEFAULT_BIC is not set
+CONFIG_DEFAULT_CUBIC=y
+# CONFIG_DEFAULT_HTCP is not set
+# CONFIG_DEFAULT_WESTWOOD is not set
+# CONFIG_DEFAULT_RENO is not set
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+CONFIG_NETWORK_SECMARK=y
+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_L2TP is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+CONFIG_DCB=y
+CONFIG_DNS_RESOLVER=y
+# CONFIG_BATMAN_ADV is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_NET_TCPPROBE is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+# CONFIG_CAIF is not set
+# CONFIG_CEPH_LIB is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH=""
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_STANDALONE is not set
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+# CONFIG_MTD_CHAR is not set
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_SM_FTL is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+CONFIG_MTD_M25P80=y
+CONFIG_M25PXX_USE_FAST_READ=y
+# CONFIG_MTD_SST25L is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND_ECC=y
+# CONFIG_MTD_NAND_ECC_SMC is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_BCH is not set
+# CONFIG_MTD_SM_COMMON is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+CONFIG_MTD_NAND_LS1X=y
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_CRYPTOLOOP=y
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_BLK_DEV_RBD is not set
+# CONFIG_SENSORS_LIS3LV02D is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI_MOD=y
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_TARGET_CORE is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_MII=y
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+CONFIG_REALTEK_PHY=y
+# CONFIG_NATIONAL_PHY is not set
+CONFIG_STE10XP=y
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_MICREL_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+# CONFIG_NET_ETHERNET is not set
+CONFIG_NETDEV_1000=y
+CONFIG_STMMAC_ETH=y
+CONFIG_LS1X_GMAC0=y
+CONFIG_LS1X_GMAC0_100M=y
+# CONFIG_LS1X_GMAC0_1000M is not set
+# CONFIG_LS1X_GMAC1 is not set
+# CONFIG_RTL8305SC is not set
+CONFIG_STMMAC_DA=y
+CONFIG_STMMAC_DUAL_MAC=y
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_WLAN is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_USB_IPHETH is not set
+# CONFIG_WAN is not set
+
+#
+# CAIF transport drivers
+#
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+CONFIG_INPUT_POLLDEV=y
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_ADS7846=y
+# CONFIG_TOUCHSCREEN_AD7877 is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
+# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2005 is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_N_GSM is not set
+# CONFIG_TRACE_SINK is not set
+# CONFIG_DEVKMEM is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=6
+CONFIG_SERIAL_8250_RUNTIME_UARTS=6
+# CONFIG_SERIAL_8250_EXTENDED is not set
+# CONFIG_MULTIFUNC_CONFIG_SERAIL0 is not set
+# CONFIG_MULTIFUNC_CONFIG_SERAIL1 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+# CONFIG_SERIAL_MAX3107 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+# CONFIG_SERIAL_IFX6X60 is not set
+# CONFIG_SERIAL_XILINX_PS_UART is not set
+# CONFIG_TTY_PRINTK is not set
+# CONFIG_LS1B_BUZZER is not set
+# CONFIG_LS1B_PWM_DRIVER is not set
+# CONFIG_LS1B_BBDIO is not set
+# CONFIG_LS1B_IR is not set
+# CONFIG_LS1B_STEPMOTOR is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_RAMOOPS is not set
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_LS1B_SPI=y
+CONFIG_LS1B_SPI0=y
+# CONFIG_LS1B_SPI1 is not set
+# CONFIG_SPI_ALTERA is not set
+CONFIG_SPI_BITBANG=y
+# CONFIG_SPI_GPIO is not set
+# CONFIG_SPI_OC_TINY is not set
+# CONFIG_SPI_PXA2XX_PCI is not set
+# CONFIG_SPI_XILINX is not set
+# CONFIG_SPI_DESIGNWARE is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+
+#
+# PPS generators support
+#
+
+#
+# PTP clock support
+#
+
+#
+# Enable Device Drivers -> PPS to see the PTP clock options.
+#
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO drivers:
+#
+# CONFIG_GPIO_BASIC_MMIO is not set
+# CONFIG_GPIO_IT8761E is not set
+
+#
+# I2C GPIO expanders:
+#
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+# CONFIG_GPIO_74X164 is not set
+# CONFIG_GPIO_74X165 is not set
+
+#
+# AC97 GPIO expanders:
+#
+
+#
+# MODULbus GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
+CONFIG_SPI_MCP3201=y
+# CONFIG_SENSORS_ADCXX is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_GPIO_FAN is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM70 is not set
+# CONFIG_SENSORS_MAX1111 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_SHT15 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_SCH5627 is not set
+# CONFIG_SENSORS_ADS7871 is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_THERMAL is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_LS1X_WDT=y
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+CONFIG_BCMA_POSSIBLE=y
+
+#
+# Broadcom specific AMBA
+#
+# CONFIG_BCMA is not set
+# CONFIG_MFD_SUPPORT is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_WMT_GE_ROPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+CONFIG_FB_MODE_HELPERS=y
+CONFIG_FB_TILEBLITTING=y
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_SSD1305 is not set
+# CONFIG_FB_ST7565 is not set
+# CONFIG_FB_ST7920 is not set
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_LOONGSON1=y
+CONFIG_LS1X_FB0=y
+# CONFIG_FB_LS1X_I2C is not set
+# CONFIG_FB_UDL is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_BROADSHEET is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LINUX_CLUT224=y
+CONFIG_SOUND=y
+CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
+# CONFIG_SND is not set
+CONFIG_SOUND_PRIME=y
+CONFIG_SOUND_LS1X_AC97=y
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+CONFIG_HID_PID=y
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_ACRUX is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_HID_DRAGONRISE is not set
+# CONFIG_HID_EMS_FF is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_KEYTOUCH is not set
+# CONFIG_HID_KYE is not set
+# CONFIG_HID_UCLOGIC is not set
+# CONFIG_HID_WALTOP is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_TWINHAN is not set
+# CONFIG_HID_KENSINGTON is not set
+# CONFIG_HID_LCPOWER is not set
+# CONFIG_HID_LOGITECH is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_MULTITOUCH is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_PICOLCD is not set
+# CONFIG_HID_QUANTA is not set
+# CONFIG_HID_ROCCAT is not set
+# CONFIG_HID_ROCCAT_ARVO is not set
+# CONFIG_HID_ROCCAT_KONE is not set
+# CONFIG_HID_ROCCAT_KONEPLUS is not set
+# CONFIG_HID_ROCCAT_KOVAPLUS is not set
+# CONFIG_HID_ROCCAT_PYRA is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_HID_GREENASIA is not set
+# CONFIG_HID_SMARTJOYPLUS is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_HID_THRUSTMASTER is not set
+# CONFIG_HID_ZEROPLUS is not set
+# CONFIG_HID_ZYDACRON is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
+CONFIG_USB_EHCI_TT_NEWSCHED=y
+CONFIG_USB_EHCI_HCD_LS1X=y
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_HCD_LS1X is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+CONFIG_USB_OHCI_HCD_PLATFORM=y
+# CONFIG_USB_EHCI_HCD_PLATFORM is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+CONFIG_USB_STORAGE_REALTEK=y
+CONFIG_USB_STORAGE_DATAFAB=y
+CONFIG_USB_STORAGE_FREECOM=y
+CONFIG_USB_STORAGE_ISD200=y
+CONFIG_USB_STORAGE_USBAT=y
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_STORAGE_JUMPSHOT=y
+CONFIG_USB_STORAGE_ALAUDA=y
+CONFIG_USB_STORAGE_ONETOUCH=y
+CONFIG_USB_STORAGE_KARMA=y
+CONFIG_USB_STORAGE_CYPRESS_ATACB=y
+CONFIG_USB_STORAGE_ENE_UB6250=y
+CONFIG_USB_LIBUSUAL=y
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_YUREX is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+# CONFIG_MMC_CLKGATE is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_MINORS=8
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+# CONFIG_MMC_SDHCI is not set
+CONFIG_MMC_SPI=y
+# CONFIG_MMC_VUB300 is not set
+# CONFIG_MMC_USHC is not set
+# CONFIG_MEMSTICK is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+# CONFIG_LEDS_GPIO is not set
+# CONFIG_LEDS_DAC124S085 is not set
+CONFIG_LEDS_PWM=y
+# CONFIG_LEDS_LT3593 is not set
+# CONFIG_LEDS_TRIGGERS is not set
+
+#
+# LED Triggers
+#
+# CONFIG_NFC_DEVICES is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T93 is not set
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_LOONGSON1=y
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_EXPORTFS=y
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY_USER=y
+CONFIG_FANOTIFY=y
+CONFIG_QUOTA=y
+# CONFIG_QUOTA_NETLINK_INTERFACE is not set
+# CONFIG_PRINT_QUOTA_WARNING is not set
+# CONFIG_QUOTA_DEBUG is not set
+# CONFIG_QFMT_V1 is not set
+# CONFIG_QFMT_V2 is not set
+CONFIG_QUOTACTL=y
+CONFIG_AUTOFS4_FS=y
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_NTFS_FS=y
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_TMPFS_XATTR=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_CONFIGFS_FS=y
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_ECRYPT_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_YAFFS_FS=y
+CONFIG_YAFFS_YAFFS1=y
+# CONFIG_YAFFS_9BYTE_TAGS is not set
+# CONFIG_YAFFS_DOES_ECC is not set
+CONFIG_YAFFS_YAFFS2=y
+CONFIG_YAFFS_AUTO_YAFFS2=y
+# CONFIG_YAFFS_DISABLE_TAGS_ECC is not set
+# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
+# CONFIG_YAFFS_EMPTY_LOST_AND_FOUND is not set
+# CONFIG_YAFFS_DISABLE_BLOCK_REFRESHING is not set
+# CONFIG_YAFFS_DISABLE_BACKGROUND is not set
+CONFIG_YAFFS_XATTR=y
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+CONFIG_JFFS2_FS_WBUF_VERIFY=y
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_JFFS2_CMODE_NONE is not set
+CONFIG_JFFS2_CMODE_PRIORITY=y
+# CONFIG_JFFS2_CMODE_SIZE is not set
+# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
+# CONFIG_LOGFS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_MINIX_FS_NATIVE_ENDIAN is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_PSTORE is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_V4_1=y
+CONFIG_PNFS_FILE_LAYOUT=y
+CONFIG_ROOT_NFS=y
+# CONFIG_NFS_USE_LEGACY_DNS is not set
+CONFIG_NFS_USE_KERNEL_DNS=y
+CONFIG_NFS_USE_NEW_IDMAPPER=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+# CONFIG_CEPH_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="utf8"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+CONFIG_NLS_CODEPAGE_936=y
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=y
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=y
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_SECTION_MISMATCH is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_HARDLOCKUP_DETECTOR is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_SPARSE_RCU_POINTER is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
+# CONFIG_ATOMIC64_SELFTEST is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_TEST_KSTRTOX is not set
+CONFIG_EARLY_PRINTK=y
+# CONFIG_CMDLINE_BOOL is not set
+
+#
+# Security options
+#
+CONFIG_KEYS=y
+# CONFIG_KEYS_DEBUG_PROC_KEYS is not set
+# CONFIG_SECURITY_DMESG_RESTRICT is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG=m
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=m
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+CONFIG_CRYPTO_ANSI_CPRNG=m
+# CONFIG_CRYPTO_USER_API_HASH is not set
+# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_VIRTUALIZATION is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC_ITU_T=y
+CONFIG_CRC32=y
+CONFIG_CRC7=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_XZ_DEC=y
+# CONFIG_XZ_DEC_X86 is not set
+# CONFIG_XZ_DEC_POWERPC is not set
+# CONFIG_XZ_DEC_IA64 is not set
+# CONFIG_XZ_DEC_ARM is not set
+# CONFIG_XZ_DEC_ARMTHUMB is not set
+# CONFIG_XZ_DEC_SPARC is not set
+# CONFIG_XZ_DEC_BCJ is not set
+# CONFIG_XZ_DEC_TEST is not set
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_XZ=y
+CONFIG_DECOMPRESS_LZO=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
+CONFIG_GENERIC_ATOMIC64=y
+# CONFIG_AVERAGE is not set
diff -uNra linux-3.0.82/arch/mips/configs/ls1c_defconfig linux-3.0.82x/arch/mips/configs/ls1c_defconfig
--- linux-3.0.82/arch/mips/configs/ls1c_defconfig	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/configs/ls1c_defconfig	2017-09-23 03:42:49.358677080 +0800
@@ -0,0 +1,1253 @@
+#
+# Automatically generated make config: don't edit
+# Linux/mips 3.0.82 Kernel Configuration
+#
+CONFIG_MIPS=y
+
+#
+# Machine selection
+#
+# CONFIG_MIPS_ALCHEMY is not set
+# CONFIG_AR7 is not set
+# CONFIG_ATH79 is not set
+# CONFIG_BCM47XX is not set
+# CONFIG_BCM63XX is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_MACH_JZ4740 is not set
+# CONFIG_LANTIQ is not set
+# CONFIG_LASAT is not set
+CONFIG_MACH_LOONGSON=y
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SIM is not set
+# CONFIG_NEC_MARKEINS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_NXP_STB220 is not set
+# CONFIG_NXP_STB225 is not set
+# CONFIG_PNX8550_JBS is not set
+# CONFIG_PNX8550_STB810 is not set
+# CONFIG_PMC_MSP is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_POWERTV is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP28 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_CRHINE is not set
+# CONFIG_SIBYTE_CARMEL is not set
+# CONFIG_SIBYTE_CRHONE is not set
+# CONFIG_SIBYTE_RHONE is not set
+# CONFIG_SIBYTE_SWARM is not set
+# CONFIG_SIBYTE_LITTLESUR is not set
+# CONFIG_SIBYTE_SENTOSA is not set
+# CONFIG_SIBYTE_BIGSUR is not set
+# CONFIG_SNI_RM is not set
+# CONFIG_MACH_TX39XX is not set
+# CONFIG_MACH_TX49XX is not set
+# CONFIG_MIKROTIK_RB532 is not set
+# CONFIG_WR_PPMC is not set
+# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
+# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
+# CONFIG_NLM_XLR_BOARD is not set
+# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
+# CONFIG_HAVE_PWM is not set
+# CONFIG_LS1A_MACH is not set
+# CONFIG_LS1B_MACH is not set
+CONFIG_LS1C_MACH=y
+# CONFIG_LEMOTE_FULOONG2E is not set
+# CONFIG_LEMOTE_MACH2F is not set
+CONFIG_LOONGSON_UART_BASE=y
+# CONFIG_LOONGSON_MC146818 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+CONFIG_CEVT_R4K_LIB=y
+CONFIG_CEVT_R4K=y
+CONFIG_CSRC_R4K_LIB=y
+CONFIG_CSRC_R4K=y
+# CONFIG_ARCH_DMA_ADDR_T_64BIT is not set
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+# CONFIG_MIPS_MACHINE is not set
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_GPIO=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_BOOT_ELF32=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+
+#
+# CPU selection
+#
+CONFIG_CPU_LOONGSON1C=y
+CONFIG_SYS_SUPPORTS_ZBOOT=y
+CONFIG_CPU_LS232=y
+CONFIG_SYS_HAS_CPU_LOONGSON1C=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_CPUFREQ=y
+
+#
+# Kernel type
+#
+CONFIG_32BIT=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_MIPS_MT_DISABLED=y
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_CPU_HAS_WB=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_HIGHMEM is not set
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_SYS_SUPPORTS_HIGHMEM=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_COMPACTION=y
+CONFIG_MIGRATION=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_KSM=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
+CONFIG_NEED_PER_CPU_KM=y
+CONFIG_CLEANCACHE=y
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_256 is not set
+# CONFIG_HZ_1000 is not set
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=250
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+# CONFIG_PREEMPT is not set
+CONFIG_KEXEC=y
+CONFIG_SECCOMP=y
+# CONFIG_USE_OF is not set
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_HAVE_IRQ_WORK=y
+CONFIG_IRQ_WORK=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_CROSS_COMPILE=""
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_DEFAULT_HOSTNAME="(none)"
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_FHANDLE=y
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+CONFIG_HAVE_GENERIC_HARDIRQS=y
+
+#
+# IRQ subsystem
+#
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_IRQ_SHOW=y
+
+#
+# RCU Subsystem
+#
+CONFIG_TINY_RCU=y
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=16
+CONFIG_CGROUPS=y
+# CONFIG_CGROUP_DEBUG is not set
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CPUSETS=y
+CONFIG_PROC_PID_CPUSET=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_RESOURCE_COUNTERS=y
+CONFIG_CGROUP_MEM_RES_CTLR=y
+CONFIG_CGROUP_PERF=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_BLK_CGROUP=y
+# CONFIG_DEBUG_BLK_CGROUP is not set
+CONFIG_NAMESPACES=y
+CONFIG_UTS_NS=y
+CONFIG_IPC_NS=y
+CONFIG_USER_NS=y
+CONFIG_PID_NS=y
+CONFIG_NET_NS=y
+CONFIG_SCHED_AUTOGROUP=y
+CONFIG_MM_OWNER=y
+# CONFIG_SYSFS_DEPRECATED is not set
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_XZ=y
+CONFIG_RD_LZO=y
+# CONFIG_INITRAMFS_COMPRESSION_NONE is not set
+# CONFIG_INITRAMFS_COMPRESSION_GZIP is not set
+# CONFIG_INITRAMFS_COMPRESSION_BZIP2 is not set
+# CONFIG_INITRAMFS_COMPRESSION_LZMA is not set
+# CONFIG_INITRAMFS_COMPRESSION_XZ is not set
+# CONFIG_INITRAMFS_COMPRESSION_LZO is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EXPERT=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+# CONFIG_BUG is not set
+CONFIG_ELF_CORE=y
+# CONFIG_PCSPKR_PLATFORM is not set
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_EMBEDDED=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_PERF_EVENTS=y
+CONFIG_PERF_COUNTERS=y
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_COMPAT_BRK is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+CONFIG_PROFILING=y
+# CONFIG_OPROFILE is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_KPROBES=y
+CONFIG_JUMP_LABEL=y
+CONFIG_KRETPROBES=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+
+#
+# GCOV-based kernel profiling
+#
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+CONFIG_BLK_DEV_BSG=y
+CONFIG_BLK_DEV_INTEGRITY=y
+CONFIG_BLK_DEV_THROTTLING=y
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_CFQ_GROUP_IOSCHED=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+CONFIG_INLINE_SPIN_UNLOCK=y
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+CONFIG_INLINE_READ_UNLOCK=y
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+CONFIG_INLINE_READ_UNLOCK_IRQ=y
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+CONFIG_INLINE_WRITE_UNLOCK=y
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+CONFIG_FREEZER=y
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_MMU=y
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+CONFIG_BINFMT_MISC=y
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Power management options
+#
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_SUSPEND is not set
+# CONFIG_PM_RUNTIME is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE_DEMUX is not set
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_LRO=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+CONFIG_TCP_CONG_ADVANCED=y
+CONFIG_TCP_CONG_BIC=y
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_TCP_CONG_WESTWOOD=y
+CONFIG_TCP_CONG_HTCP=y
+# CONFIG_TCP_CONG_HSTCP is not set
+# CONFIG_TCP_CONG_HYBLA is not set
+# CONFIG_TCP_CONG_VEGAS is not set
+# CONFIG_TCP_CONG_SCALABLE is not set
+# CONFIG_TCP_CONG_LP is not set
+# CONFIG_TCP_CONG_VENO is not set
+# CONFIG_TCP_CONG_YEAH is not set
+# CONFIG_TCP_CONG_ILLINOIS is not set
+# CONFIG_DEFAULT_BIC is not set
+CONFIG_DEFAULT_CUBIC=y
+# CONFIG_DEFAULT_HTCP is not set
+# CONFIG_DEFAULT_WESTWOOD is not set
+# CONFIG_DEFAULT_RENO is not set
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+CONFIG_NETWORK_SECMARK=y
+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_L2TP is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+CONFIG_DCB=y
+# CONFIG_BATMAN_ADV is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_NET_TCPPROBE is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+# CONFIG_CAIF is not set
+# CONFIG_CEPH_LIB is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH=""
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_STANDALONE is not set
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_BLK_DEV_RBD is not set
+# CONFIG_SENSORS_LIS3LV02D is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI_MOD=y
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_TARGET_CORE is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_MII=y
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+CONFIG_REALTEK_PHY=y
+# CONFIG_NATIONAL_PHY is not set
+CONFIG_STE10XP=y
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_MICREL_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+# CONFIG_NET_ETHERNET is not set
+CONFIG_NETDEV_1000=y
+CONFIG_STMMAC_ETH=y
+CONFIG_LS1X_GMAC0=y
+# CONFIG_LS1X_GMAC0_100M is not set
+# CONFIG_LS1X_GMAC0_1000M is not set
+CONFIG_LS1X_GMAC0_RMII=y
+# CONFIG_RTL8305SC is not set
+CONFIG_STMMAC_DA=y
+CONFIG_STMMAC_DUAL_MAC=y
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_WLAN is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_USB_IPHETH is not set
+# CONFIG_WAN is not set
+
+#
+# CAIF transport drivers
+#
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+CONFIG_INPUT_POLLDEV=y
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_N_GSM is not set
+# CONFIG_TRACE_SINK is not set
+# CONFIG_DEVKMEM is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+# CONFIG_SERIAL_XILINX_PS_UART is not set
+# CONFIG_TTY_PRINTK is not set
+# CONFIG_LS1B_BUZZER is not set
+# CONFIG_LS1B_PWM_DRIVER is not set
+# CONFIG_LS1B_BBDIO is not set
+# CONFIG_LS1B_IR is not set
+# CONFIG_LS1B_STEPMOTOR is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_RAMOOPS is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+
+#
+# PPS generators support
+#
+
+#
+# PTP clock support
+#
+
+#
+# Enable Device Drivers -> PPS to see the PTP clock options.
+#
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO drivers:
+#
+# CONFIG_GPIO_BASIC_MMIO is not set
+# CONFIG_GPIO_IT8761E is not set
+
+#
+# I2C GPIO expanders:
+#
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+
+#
+# AC97 GPIO expanders:
+#
+
+#
+# MODULbus GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_LS1X_WDT=y
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+CONFIG_BCMA_POSSIBLE=y
+
+#
+# Broadcom specific AMBA
+#
+# CONFIG_BCMA is not set
+# CONFIG_MFD_SUPPORT is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_WMT_GE_ROPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+CONFIG_FB_MODE_HELPERS=y
+CONFIG_FB_TILEBLITTING=y
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_SSD1305 is not set
+# CONFIG_FB_ST7565 is not set
+# CONFIG_FB_ST7920 is not set
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_LOONGSON1=y
+CONFIG_LS1X_FB0=y
+# CONFIG_FB_LS1X_I2C is not set
+# CONFIG_FB_UDL is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_BROADSHEET is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LINUX_CLUT224=y
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+CONFIG_HID_PID=y
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_ACRUX is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_HID_DRAGONRISE is not set
+# CONFIG_HID_EMS_FF is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_KEYTOUCH is not set
+# CONFIG_HID_KYE is not set
+# CONFIG_HID_UCLOGIC is not set
+# CONFIG_HID_WALTOP is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_TWINHAN is not set
+# CONFIG_HID_KENSINGTON is not set
+# CONFIG_HID_LCPOWER is not set
+# CONFIG_HID_LOGITECH is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_MULTITOUCH is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_PICOLCD is not set
+# CONFIG_HID_QUANTA is not set
+# CONFIG_HID_ROCCAT is not set
+# CONFIG_HID_ROCCAT_ARVO is not set
+# CONFIG_HID_ROCCAT_KONE is not set
+# CONFIG_HID_ROCCAT_KONEPLUS is not set
+# CONFIG_HID_ROCCAT_KOVAPLUS is not set
+# CONFIG_HID_ROCCAT_PYRA is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_HID_GREENASIA is not set
+# CONFIG_HID_SMARTJOYPLUS is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_HID_THRUSTMASTER is not set
+# CONFIG_HID_ZEROPLUS is not set
+# CONFIG_HID_ZYDACRON is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
+CONFIG_USB_EHCI_TT_NEWSCHED=y
+CONFIG_USB_EHCI_HCD_LS1X=y
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_HCD_LS1X is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+CONFIG_USB_OHCI_HCD_PLATFORM=y
+# CONFIG_USB_EHCI_HCD_PLATFORM is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+CONFIG_USB_STORAGE_REALTEK=y
+CONFIG_USB_STORAGE_DATAFAB=y
+CONFIG_USB_STORAGE_FREECOM=y
+CONFIG_USB_STORAGE_ISD200=y
+CONFIG_USB_STORAGE_USBAT=y
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_STORAGE_JUMPSHOT=y
+CONFIG_USB_STORAGE_ALAUDA=y
+CONFIG_USB_STORAGE_ONETOUCH=y
+CONFIG_USB_STORAGE_KARMA=y
+CONFIG_USB_STORAGE_CYPRESS_ATACB=y
+CONFIG_USB_STORAGE_ENE_UB6250=y
+CONFIG_USB_LIBUSUAL=y
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_YUREX is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_NFC_DEVICES is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_LOONGSON1=y
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_EXPORTFS=y
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY_USER=y
+CONFIG_FANOTIFY=y
+CONFIG_QUOTA=y
+# CONFIG_QUOTA_NETLINK_INTERFACE is not set
+# CONFIG_PRINT_QUOTA_WARNING is not set
+# CONFIG_QUOTA_DEBUG is not set
+# CONFIG_QFMT_V1 is not set
+# CONFIG_QFMT_V2 is not set
+CONFIG_QUOTACTL=y
+CONFIG_AUTOFS4_FS=y
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_NTFS_FS=y
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_TMPFS_XATTR=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_CONFIGFS_FS=y
+# CONFIG_MISC_FILESYSTEMS is not set
+# CONFIG_NETWORK_FILESYSTEMS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="utf8"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=y
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=y
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_SECTION_MISMATCH is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_HARDLOCKUP_DETECTOR is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_SPARSE_RCU_POINTER is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
+# CONFIG_ATOMIC64_SELFTEST is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_TEST_KSTRTOX is not set
+CONFIG_EARLY_PRINTK=y
+# CONFIG_CMDLINE_BOOL is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY_DMESG_RESTRICT is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+# CONFIG_CRYPTO is not set
+# CONFIG_VIRTUALIZATION is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+CONFIG_CRC_T10DIF=y
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_XZ_DEC=y
+# CONFIG_XZ_DEC_X86 is not set
+# CONFIG_XZ_DEC_POWERPC is not set
+# CONFIG_XZ_DEC_IA64 is not set
+# CONFIG_XZ_DEC_ARM is not set
+# CONFIG_XZ_DEC_ARMTHUMB is not set
+# CONFIG_XZ_DEC_SPARC is not set
+# CONFIG_XZ_DEC_BCJ is not set
+# CONFIG_XZ_DEC_TEST is not set
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_XZ=y
+CONFIG_DECOMPRESS_LZO=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
+CONFIG_GENERIC_ATOMIC64=y
+# CONFIG_AVERAGE is not set
diff -uNra linux-3.0.82/arch/mips/include/asm/bootinfo.h linux-3.0.82x/arch/mips/include/asm/bootinfo.h
--- linux-3.0.82/arch/mips/include/asm/bootinfo.h	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/include/asm/bootinfo.h	2017-09-23 03:42:49.362677068 +0800
@@ -69,7 +69,8 @@
 #define MACH_DEXXON_GDIUM2F10  5
 #define MACH_LEMOTE_NAS        6
 #define MACH_LEMOTE_LL2F       7
-#define MACH_LOONGSON_END      8
+#define MACH_LS232             8		//lxy
+#define MACH_LOONGSON_END      9
 
 /*
  * Valid machtype for group INGENIC
diff -uNra linux-3.0.82/arch/mips/include/asm/cpu.h linux-3.0.82x/arch/mips/include/asm/cpu.h
--- linux-3.0.82/arch/mips/include/asm/cpu.h	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/include/asm/cpu.h	2017-09-23 03:42:49.362677068 +0800
@@ -191,6 +191,7 @@
 #define PRID_REV_34K_V1_0_2	0x0022
 #define PRID_REV_LOONGSON2E	0x0002
 #define PRID_REV_LOONGSON2F	0x0003
+#define PRID_REV_LS232		0x0020
 
 /*
  * Older processors used to encode processor version and revision in two
@@ -258,7 +259,7 @@
 	/*
 	 * MIPS64 class processors
 	 */
-	CPU_5KC, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2,
+	CPU_5KC, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2, CPU_LOONGSON1, CPU_LS232,
 	CPU_CAVIUM_OCTEON, CPU_CAVIUM_OCTEON_PLUS, CPU_CAVIUM_OCTEON2,
 	CPU_XLR,
 
diff -uNra linux-3.0.82/arch/mips/include/asm/gpio.h linux-3.0.82x/arch/mips/include/asm/gpio.h
--- linux-3.0.82/arch/mips/include/asm/gpio.h	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/include/asm/gpio.h	2017-09-23 03:42:49.362677068 +0800
@@ -1,6 +1,6 @@
 #ifndef __ASM_MIPS_GPIO_H
 #define __ASM_MIPS_GPIO_H
 
+#include <asm/mach-loongson/ls1x/ls1x_gpio.h>
 #include <gpio.h>
-
 #endif /* __ASM_MIPS_GPIO_H */
diff -uNra linux-3.0.82/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h linux-3.0.82x/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h
--- linux-3.0.82/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h	2017-09-23 03:42:49.362677068 +0800
@@ -18,9 +18,9 @@
 
 #define cpu_dcache_line_size()	32
 #define cpu_icache_line_size()	32
-#define cpu_scache_line_size()	32
-
+//#define cpu_scache_line_size()	32
 
+#if 0
 #define cpu_has_32fpr		1
 #define cpu_has_3k_cache	0
 #define cpu_has_4k_cache	1
@@ -33,7 +33,7 @@
 #define cpu_has_divec		0
 #define cpu_has_dsp		0
 #define cpu_has_ejtag		0
-#define cpu_has_fpu		1
+//#define cpu_has_fpu		1
 #define cpu_has_ic_fills_f_dc	0
 #define cpu_has_inclusive_pcaches	1
 #define cpu_has_llsc 		1
@@ -56,5 +56,7 @@
 #define cpu_has_vint		0
 #define cpu_has_vtag_icache	0
 #define cpu_has_watch		1
+#endif
+
 
 #endif /* __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H */
diff -uNra linux-3.0.82/arch/mips/include/asm/mach-loongson/dma-coherence.h linux-3.0.82x/arch/mips/include/asm/mach-loongson/dma-coherence.h
--- linux-3.0.82/arch/mips/include/asm/mach-loongson/dma-coherence.h	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/include/asm/mach-loongson/dma-coherence.h	2017-09-23 03:42:49.362677068 +0800
@@ -11,6 +11,7 @@
 #ifndef __ASM_MACH_LOONGSON_DMA_COHERENCE_H
 #define __ASM_MACH_LOONGSON_DMA_COHERENCE_H
 
+#ifdef CONFIG_CPU_LOONGSON2
 struct device;
 
 static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr,
@@ -68,5 +69,63 @@
 {
 	return 0;
 }
+#elif	defined(CONFIG_LS1B_MACH) || defined(CONFIG_LS1C_MACH)
+#include <asm/mach-generic/dma-coherence.h>
+
+#elif	defined(CONFIG_LS1A_MACH)
+struct device;
+
+static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr,
+					  size_t size)
+{
+	return virt_to_phys(addr) | 0x40000000;
+}
+
+static inline dma_addr_t plat_map_dma_mem_page(struct device *dev,
+					       struct page *page)
+{
+	return page_to_phys(page) | 0x40000000;
+}
+
+static inline unsigned long plat_dma_addr_to_phys(struct device *dev,
+	dma_addr_t dma_addr)
+{
+	return dma_addr & 0x7fffffff;
+}
+
+static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr,
+	size_t size, enum dma_data_direction direction)
+{
+}
+
+static inline int plat_dma_supported(struct device *dev, u64 mask)
+{
+	/*
+	 * we fall back to GFP_DMA when the mask isn't all 1s,
+	 * so we can't guarantee allocations that must be
+	 * within a tighter range than GFP_DMA..
+	 */
+	if (mask < DMA_BIT_MASK(24))
+		return 0;
+
+	return 1;
+}
+
+static inline void plat_extra_sync_for_device(struct device *dev)
+{
+	return;
+}
+
+static inline int plat_dma_mapping_error(struct device *dev,
+					 dma_addr_t dma_addr)
+{
+	return 0;
+}
+
+static inline int plat_device_is_coherent(struct device *dev)
+{
+	return 0;
+}
+#endif
 
 #endif /* __ASM_MACH_LOONGSON_DMA_COHERENCE_H */
diff -uNra linux-3.0.82/arch/mips/include/asm/mach-loongson/gpio.h linux-3.0.82x/arch/mips/include/asm/mach-loongson/gpio.h
--- linux-3.0.82/arch/mips/include/asm/mach-loongson/gpio.h	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/include/asm/mach-loongson/gpio.h	1970-01-01 08:00:00.000000000 +0800
@@ -1,35 +0,0 @@
-/*
- * STLS2F GPIO Support
- *
- * Copyright (c) 2008  Richard Liu, STMicroelectronics <richard.liu@st.com>
- * Copyright (c) 2008-2010  Arnaud Patard <apatard@mandriva.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef	__STLS2F_GPIO_H
-#define	__STLS2F_GPIO_H
-
-#include <asm-generic/gpio.h>
-
-extern void gpio_set_value(unsigned gpio, int value);
-extern int gpio_get_value(unsigned gpio);
-extern int gpio_cansleep(unsigned gpio);
-
-/* The chip can do interrupt
- * but it has not been tested and doc not clear
- */
-static inline int gpio_to_irq(int gpio)
-{
-	return -EINVAL;
-}
-
-static inline int irq_to_gpio(int gpio)
-{
-	return -EINVAL;
-}
-
-#endif				/* __STLS2F_GPIO_H */
diff -uNra linux-3.0.82/arch/mips/include/asm/mach-loongson/gpio.h- linux-3.0.82x/arch/mips/include/asm/mach-loongson/gpio.h-
--- linux-3.0.82/arch/mips/include/asm/mach-loongson/gpio.h-	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/include/asm/mach-loongson/gpio.h-	2017-09-23 03:42:49.362677068 +0800
@@ -0,0 +1,42 @@
+/*
+ * STLS2F GPIO Support
+ *
+ * Copyright (c) 2008  Richard Liu, STMicroelectronics <richard.liu@st.com>
+ * Copyright (c) 2008-2010  Arnaud Patard <apatard@mandriva.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef	__STLS2F_GPIO_H
+#define	__STLS2F_GPIO_H
+
+#include <irq.h>
+#include <asm-generic/gpio.h>
+
+extern void gpio_set_value(unsigned gpio, int value);
+extern int gpio_get_value(unsigned gpio);
+extern int gpio_cansleep(unsigned gpio);
+extern int ls1b_gpio_direction_input(struct gpio_chip *chip, unsigned gpio);
+extern int ls1b_gpio_direction_output(struct gpio_chip *chip,
+		unsigned gpio, int level);
+extern void ls1b_gpio_free(struct gpio_chip *chip, unsigned gpio);
+
+/* The chip can do interrupt
+ * but it has not been tested and doc not clear
+ */
+static inline int gpio_to_irq(int gpio)
+{
+//	return -EINVAL;
+	return LS1X_GPIO_FIRST_IRQ + gpio;
+}
+
+static inline int irq_to_gpio(int irq)
+{
+//	return -EINVAL;
+	return irq - LS1X_GPIO_FIRST_IRQ;
+}
+
+#endif				/* __STLS2F_GPIO_H */
diff -uNra linux-3.0.82/arch/mips/include/asm/mach-loongson/ls1x/clock.h linux-3.0.82x/arch/mips/include/asm/mach-loongson/ls1x/clock.h
--- linux-3.0.82/arch/mips/include/asm/mach-loongson/ls1x/clock.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/include/asm/mach-loongson/ls1x/clock.h	2017-09-23 03:42:49.366677056 +0800
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2012 Tang, Haifeng <tanghaifeng-gz@loongson.cn>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __ASM_MACH_LOONGSON1_CLOCK_H
+#define __ASM_MACH_LOONGSON1_CLOCK_H
+
+#include <linux/kref.h>
+#include <linux/list.h>
+#include <linux/seq_file.h>
+#include <linux/clk.h>
+
+extern void (*cpu_wait) (void);
+
+struct clk;
+
+struct clk_ops {
+	void (*init) (struct clk *clk);
+	void (*enable) (struct clk *clk);
+	void (*disable) (struct clk *clk);
+	void (*recalc) (struct clk *clk);
+	int (*set_rate) (struct clk *clk, unsigned long rate, int algo_id);
+	long (*round_rate) (struct clk *clk, unsigned long rate);
+};
+
+struct clk {
+	struct list_head node;
+	const char *name;
+	int id;
+	struct module *owner;
+
+	struct clk *parent;
+	struct clk_ops *ops;
+
+	struct kref kref;
+
+	unsigned long rate;
+	unsigned long flags;
+};
+
+#define CLK_ALWAYS_ENABLED	(1 << 0)
+#define CLK_RATE_PROPAGATES	(1 << 1)
+
+/* Should be defined by processor-specific code */
+void arch_init_clk_ops(struct clk_ops **, int type);
+
+int clk_init(void);
+
+int __clk_enable(struct clk *);
+void __clk_disable(struct clk *);
+
+void clk_recalc_rate(struct clk *);
+
+int clk_register(struct clk *);
+void clk_unregister(struct clk *);
+
+/* the exported API, in addition to clk_set_rate */
+/**
+ * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
+ * @clk: clock source
+ * @rate: desired clock rate in Hz
+ * @algo_id: algorithm id to be passed down to ops->set_rate
+ *
+ * Returns success (0) or negative errno.
+ */
+int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);
+
+#endif				/* __ASM_MACH_LOONGSON1_CLOCK_H */
diff -uNra linux-3.0.82/arch/mips/include/asm/mach-loongson/ls1x/gpio_keys.h linux-3.0.82x/arch/mips/include/asm/mach-loongson/ls1x/gpio_keys.h
--- linux-3.0.82/arch/mips/include/asm/mach-loongson/ls1x/gpio_keys.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/include/asm/mach-loongson/ls1x/gpio_keys.h	2017-09-23 03:42:49.366677056 +0800
@@ -0,0 +1,17 @@
+#ifndef _GPIO_KEYS_H
+#define _GPIO_KEYS_H
+
+struct gpio_keys_button {
+	/* Configuration parameters */
+	int keycode;
+	int gpio;
+	int active_low;
+	char *desc;
+};
+
+struct gpio_keys_platform_data {
+	struct gpio_keys_button *buttons;
+	int nbuttons;
+};
+
+#endif
diff -uNra linux-3.0.82/arch/mips/include/asm/mach-loongson/ls1x/irq.h linux-3.0.82x/arch/mips/include/asm/mach-loongson/ls1x/irq.h
--- linux-3.0.82/arch/mips/include/asm/mach-loongson/ls1x/irq.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/include/asm/mach-loongson/ls1x/irq.h	2017-09-23 03:42:49.366677056 +0800
@@ -0,0 +1,127 @@
+#ifndef __LS1B_IRQ_H
+#define __LS1B_IRQ_H
+
+#define LS1B_BOARD_ACPI_IRQ		0
+#define LS1A_BOARD_HPET_IRQ		1
+
+#if defined(CONFIG_LS1C_MACH)
+#define LS1X_UART0_IRQ	2
+#define LS1X_UART1_IRQ	4
+#define LS1X_UART2_IRQ	5
+#define LS1X_UART3_IRQ	29
+#else 
+#define LS1X_UART0_IRQ	2
+#define LS1X_UART1_IRQ  3
+#define LS1X_UART2_IRQ	4
+#define LS1X_UART3_IRQ	5
+#endif 
+
+
+#define LS1X_BOARD_CAN0_IRQ	6
+#define LS1X_BOARD_CAN1_IRQ	7
+#define LS1B_BOARD_SPI0_IRQ	8
+#define LS1B_BOARD_SPI1_IRQ	9
+#define LS1B_BOARD_AC97_IRQ	10
+#define LS1B_BOARD_MS_IRQ	11
+#define LS1B_BOARD_KB_IRQ	12
+#define LS1B_BOARD_DMA0_IRQ	13
+#define LS1B_BOARD_DMA1_IRQ	14
+#define LS1B_BOARD_DMA2_IRQ	15
+
+#define SB2F_BOARD_DMA1_IRQ	14
+#define SB2F_BOARD_DMA2_IRQ	15
+
+#define LS1A_LPC_INT_IRQ	16
+
+#define LS1B_BOARD_PWM0_IRQ	17
+#define LS1B_BOARD_PWM1_IRQ	18
+#define LS1B_BOARD_PWM2_IRQ	19
+#define LS1B_BOARD_PWM3_IRQ	20
+
+#define LS1X_RTC_INT0_IRQ	21
+#define LS1X_RTC_INT1_IRQ	22
+#define LS1X_RTC_INT2_IRQ	23
+#define LS1X_TOY_INT0_IRQ	24
+#define LS1X_TOY_INT1_IRQ	25
+#define LS1X_TOY_INT2_IRQ	26
+#define LS1X_RTC_TICK_IRQ	27
+#define LS1X_TOY_TICK_IRQ	28
+
+#ifdef	CONFIG_LS1B_MACH
+#define LS1X_UART4_IRQ	29
+#define LS1X_UART5_IRQ	30
+#endif
+
+#define LS1C_SDIO_IRQ   31
+
+#define LS1X_EHCI_IRQ	32
+#define LS1X_OHCI_IRQ	33
+
+#if defined(CONFIG_LS1C_MACH)
+#define LS1X_OTG_IRQ	34
+#define LS1X_GMAC0_IRQ	35
+#define LS1X_CAM_IRQ	36
+#else
+#define LS1X_GMAC0_IRQ	34
+#define LS1X_GMAC1_IRQ	35
+#define LS1A_BOARD_SATA_IRQ	36
+#define LS1X_GPU_IRQ	37
+#endif
+
+#define LS1A_BOARD_PCI_INTA_IRQ LS1X_GPIO_FIRST_IRQ
+#define LS1A_BOARD_PCI_INTB_IRQ (LS1X_GPIO_FIRST_IRQ + 1)
+//#define LS1A_BOARD_PCI_INTA_IRQ 38
+//#define LS1A_BOARD_PCI_INTB_IRQ 39
+//#define LS1A_BOARD_PCI_INTC_IRQ 40
+//#define LS1A_BOARD_PCI_INTD_IRQ 41
+
+#define INT_PCI_INTA	(1<<0)
+#define INT_PCI_INTB	(1<<1)
+#define INT_PCI_INTC	(1<<2)
+#define INT_PCI_INTD	(1<<3)
+//#define INT_PCI_INTA	(1<<6)
+//#define INT_PCI_INTB	(1<<7)
+//#define INT_PCI_INTC	(1<<8)
+//#define INT_PCI_INTD	(1<<9)
+
+#define LS1X_GPIO_FIRST_IRQ 64
+
+#if defined(CONFIG_LS1A_MACH)
+#define LS1X_LAST_IRQ 159
+#define INTN 5
+#elif defined(CONFIG_LS1B_MACH)
+#define LS1X_LAST_IRQ 127
+#define INTN 4
+#elif defined(CONFIG_LS1C_MACH)
+#define LS1X_LAST_IRQ 159
+#define INTN 5
+#endif
+
+/*
+ * CPU core Interrupt Numbers
+ */
+#define MIPS_CPU_IRQ_BASE		(LS1X_LAST_IRQ + 1)
+#define MIPS_CPU_IRQ(x)			(MIPS_CPU_IRQ_BASE + (x))
+
+#define SOFTINT0_IRQ			MIPS_CPU_IRQ(0)
+#define SOFTINT1_IRQ			MIPS_CPU_IRQ(1)
+#define INT0_IRQ			MIPS_CPU_IRQ(2)
+#define INT1_IRQ			MIPS_CPU_IRQ(3)
+#define INT2_IRQ			MIPS_CPU_IRQ(4)
+#define INT3_IRQ			MIPS_CPU_IRQ(5)
+#define INT4_IRQ			MIPS_CPU_IRQ(6)
+#define TIMER_IRQ			MIPS_CPU_IRQ(7)		/* cpu timer */
+
+#define NR_IRQS 	  320
+
+struct ls1x_intc_regs
+{
+	volatile unsigned int int_isr;
+	volatile unsigned int int_en;
+	volatile unsigned int int_set;
+	volatile unsigned int int_clr;		/* offset 0x10*/
+	volatile unsigned int int_pol;
+   	volatile unsigned int int_edge;		/* offset 0 */
+};
+
+#endif	/* __LS1B_IRQ_H */
diff -uNra linux-3.0.82/arch/mips/include/asm/mach-loongson/ls1x/ls1b_board.h linux-3.0.82x/arch/mips/include/asm/mach-loongson/ls1x/ls1b_board.h
--- linux-3.0.82/arch/mips/include/asm/mach-loongson/ls1x/ls1b_board.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/include/asm/mach-loongson/ls1x/ls1b_board.h	2017-09-23 03:42:49.366677056 +0800
@@ -0,0 +1,189 @@
+/*
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ */
+
+#ifndef __LS1B_BOARD__H__
+#define __LS1B_BOARD__H__
+
+#include <asm/addrspace.h>
+#include <asm/types.h>
+
+/* å®šä¹‰æ™¶æŒ¯é¢‘çŽ‡å’ŒEarly printk UARTåœ°å�€ */
+#if defined(CONFIG_LS1A_CORE_BOARD)
+	#define AHB_CLK			33000000
+	#define PORT(offset)	(u8 *)(KSEG1ADDR(LS1X_UART2_BASE + offset))
+#elif defined(CONFIG_LS1A_CLOUD_TERMIAL)
+	#define AHB_CLK			25000000
+	#define PORT(offset)	(u8 *)(KSEG1ADDR(LS1X_UART2_BASE + offset))
+#elif defined(CONFIG_LS1B_BOARD)
+	#define AHB_CLK			33000000
+	#define PORT(offset)	(u8 *)(KSEG1ADDR(LS1X_UART2_BASE + offset))
+#elif defined(CONFIG_LS1B_CORE_BOARD)
+	#define AHB_CLK			25000000
+	#define PORT(offset)	(u8 *)(KSEG1ADDR(LS1X_UART5_BASE + offset))
+#elif defined(CONFIG_LS1C_MACH)
+	#define AHB_CLK			24000000
+	#define PORT(offset)	(u8 *)(KSEG1ADDR(LS1X_UART3_BASE + offset))
+#endif	//#ifdef	CONFIG_LS1A_CORE_BOARD
+
+#define APB_CLK			AHB_CLK
+
+#define LS1X_MUX_BASE			0x1fd00420
+
+/* Interrupt register */
+#define LS1X_INTREG_BASE 0x1fd01040
+#define REG_INT_EDGE	0x04
+#define REG_INT_STEER	0x08
+#define REG_INT_POL		0x0c
+#define REG_INT_SET		0x10
+#define REG_INT_CLR		0x14
+#define REG_INT_EN		0x18
+#define REG_INT_ISR		0x1c
+
+#define LS1X_GPIO_BASE	0x1fd010c0
+
+/* SPI regs */
+#define LS1B_BOARD_SPI_BASE	0x1f000000 
+#define REG_SPCR			0x00
+#define REG_SPSR			0x01
+#define REG_SPDR			0x02
+#define REG_SPER			0x03
+#define	REG_SPPR			0x04
+#define	REG_SPCSR			0x05
+#define	REG_SPTR			0x06
+
+#define LS1B_BOARD_SPI0_BASE	0x1fe80000
+#define LS1B_BOARD_SPI1_BASE	0x1fec0000
+#define REG_SPCR				0x00	//æŽ§åˆ¶å¯„å­˜å™¨
+#define REG_SPSR				0x01	//çŠ¶æ€�å¯„å­˜å™¨
+#define REG_SPDR				0x02	//æ•°æ�®å¯„å­˜å™¨ï¼ˆTxFIFOï¼‰
+#define REG_TXFIFO    			0x02	//æ•°æ�®ä¼ è¾“å¯„å­˜å™¨ è¾“å‡º
+#define REG_RXFIFO    			0x02	//æ•°æ�®ä¼ è¾“å¯„å­˜å™¨ è¾“å…¥
+#define REG_SPER				0x03	//å¤–éƒ¨å¯„å­˜å™¨
+#define REG_PARAM     			0x04	//SPI Flashå�‚æ•°æŽ§åˆ¶å¯„å­˜å™¨
+#define REG_SOFTCS    			0x05	//SPI Flashç‰‡é€‰æŽ§åˆ¶å¯„å­˜å™¨
+#define REG_PARAM2    			0x06	//SPI Flashæ—¶åº�æŽ§åˆ¶å¯„å­˜å™¨
+
+#define SPI0_CS0				0
+#define SPI0_CS1				1
+#define SPI0_CS2				2
+#define SPI0_CS3				3
+
+#define SPI1_CS0				0
+#define SPI1_CS1				1
+#define SPI1_CS2				2
+
+/* pwm regs */
+#define LS1B_PWM0_BASE	0x1fe5c000
+#define LS1B_PWM1_BASE	0x1fe5c010
+#define LS1B_PWM2_BASE	0x1fe5c020
+#define LS1B_PWM3_BASE	0x1fe5c030
+
+/* gamc regs */
+#define LS1X_GMAC0_BASE		0x1fe10000
+#define LS1X_GMAC1_BASE		0x1fe20000
+
+/* UART regs */
+#define LS1X_UART0_BASE		0x1fe40000
+#define LS1X_UART1_BASE		0x1fe44000
+#define LS1X_UART2_BASE		0x1fe48000
+#define LS1X_UART3_BASE		0x1fe4c000
+#ifdef	CONFIG_LS1B_MACH	/* Loongson 1Bæœ€å¤šå�¯æ‰©å±•12ä¸ª3çº¿UARTä¸²å�£ 1Aå�ªèƒ½æœ‰4ä¸ª */
+#define LS1X_UART4_BASE		0x1fe6c000
+#define LS1X_UART5_BASE		0x1fe7c000
+#define LS1X_UART6_BASE		0x1fe41000
+#define LS1X_UART7_BASE		0x1fe42000
+#define LS1X_UART8_BASE		0x1fe43000
+#define LS1X_UART9_BASE		0x1fe45000
+#define LS1X_UART10_BASE		0x1fe46000
+#define LS1X_UART11_BASE		0x1fe47000
+#endif
+
+#define LS1B_UART_SPLIT				0xbfe78038
+
+#define LS1X_PS2_BASE			0x1fe60000
+
+/* watchdog */
+#if	defined(CONFIG_LS1A_MACH)
+#define LS1X_WDT_BASE				0x1fe7c060
+#elif	defined(CONFIG_LS1B_MACH) || defined(CONFIG_LS1C_MACH)
+#define LS1X_WDT_BASE				0x1fe5c060
+#endif
+#define WDT_EN						0x00
+#define WDT_TIMER					0x04
+#define WDT_SET						0x08
+
+/* RTC */
+#define LS1X_RTC_BASE				0x1fe64000
+
+/* I2C */
+#define LS1X_I2C0_BASE			0x1fe58000
+#define LS1X_I2C1_BASE			0x1fe68000
+#define LS1X_I2C2_BASE			0x1fe70000
+
+/*	HPET timer	*/
+#define	LS1A_HPET_BASE			0x1fe6c000
+
+/* APB BUS control regs */
+#define LS1X_CLK_BASE				0x1fe78030
+#define LS1B_BOARD_APB_MISC_BASE	0x1f004100
+#define REG_APB_MISC_CTL	0x40
+
+/* CAN */
+#define LS1X_CAN0_BASE	0x1fe50000
+#define LS1X_CAN1_BASE	0x1fe54000
+
+/* AC97 */
+#define LS1X_AC97_BASE 0x1fe74000
+
+/* PCI */
+#define LS1B_BOARD_PCI_REGS_BASE		 0x1f002000
+
+/* CAMERA */
+#define LS1C_CAMERA_BASE                0x1c280000 
+
+/* SDIO */
+#define LS1C_SDIO_REG_BASE				0xbfe6c000
+
+#include <regs-clk.h>
+#include <regs-mux.h>
+#include <regs-gpio.h>
+
+struct ls1c_camera_pdata {                                                                             
+        unsigned long mclk_24MHz;                                                               
+        unsigned long flags;                                              
+}; 
+
+struct ls1b_usbh_data {
+    u8      ports;      /* number of ports on root hub */
+    u8      vbus_pin[]; /* port power-control pin */
+}; 
+
+#if defined(CONFIG_LS1C_MACH)
+#define	LS1X_OTG_BASE			0x1fe00000
+#define LS1X_EHCI_BASE			0x1fe20000
+#define LS1X_OHCI_BASE			0x1fe28000
+#else
+#define LS1X_EHCI_BASE 	0x1fe00000
+#define LS1X_OHCI_BASE 	0x1fe08000
+#endif
+
+/* LCD */
+#define LS1X_DC0_BASE	0x1c301240
+#ifdef CONFIG_LS1A_MACH
+#define LS1X_DC1_BASE	0x1c301250
+#define LS1X_GPU_PLL_CTRL	0x1fd00414
+#define LS1X_PIX1_PLL_CTRL	0x1fd00410
+#define LS1X_PIX2_PLL_CTRL	0x1fd00424
+#endif
+
+#define LS1A_PCICFG_BASE 	0x1c100000
+#define	LS1A_PCI_HEADER_CFG	0x1c180000
+#define LS1A_PCIMAP (*(volatile int *)0xbfd01114)
+#define LS1A_PCIMAP_CFG  (*(volatile int *)0xbfd01120)
+
+#endif	/* __LS1B_BOARD__H__ */
+
diff -uNra linux-3.0.82/arch/mips/include/asm/mach-loongson/ls1x/ls1x_gpio.h linux-3.0.82x/arch/mips/include/asm/mach-loongson/ls1x/ls1x_gpio.h
--- linux-3.0.82/arch/mips/include/asm/mach-loongson/ls1x/ls1x_gpio.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/include/asm/mach-loongson/ls1x/ls1x_gpio.h	2017-09-23 03:42:49.366677056 +0800
@@ -0,0 +1,218 @@
+/*
+ * Copyright (C) 1999 ARM Limited
+ * Copyright (C) 2009-2010 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+#ifndef __ASM_ARCH_GPIO_H__
+#define __ASM_ARCH_GPIO_H__
+
+//#define ARCH_NR_GPIOS		105
+#include <asm-generic/gpio.h>
+
+#define	GPIO_ID_NAME		"gpio"
+/* use gpiolib dispatchers */
+#if 0
+#define gpio_get_value          __gpio_get_value
+#define gpio_set_value          __gpio_set_value
+#define gpio_cansleep           __gpio_cansleep
+#endif
+#define gpio_to_irq				__gpio_to_irq
+
+/******* define by yg******************************************************/
+//#ifdef CONFIG_CPU_LS1C  
+
+#define GPIO_REG_CFG		0x0
+#define GPIO_REG_DIR		0x10
+#define GPIO_REG_EN			GPIO_REG_DIR  /*æ‰‹å†Œé‡ŒæŠŠè¾“å…¥è¾“å‡ºå¯„å­˜å™¨ã€€å�«å�šGPIO_EN,ä¸�ç›´ç™½*/
+#define GPIO_REG_IN			0x20
+#define GPIO_REG_OUT		0x30
+
+#define GPIO_00     0
+#define GPIO_01     1
+#define GPIO_02     2
+#define GPIO_03     3
+#define GPIO_04     4
+#define GPIO_05     5
+#define GPIO_06     6
+#define GPIO_07     7
+#define GPIO_08     8
+#define GPIO_09     9
+#define GPIO_10    10 
+#define GPIO_11    11 
+#define GPIO_12    12
+#define GPIO_13    13
+#define GPIO_14    14
+#define GPIO_15    15
+#define GPIO_16    16
+#define GPIO_17    17
+#define GPIO_18    18
+#define GPIO_19    19
+#define GPIO_20    20
+#define GPIO_21    21
+#define GPIO_22    22
+#define GPIO_23    23
+#define GPIO_24    24
+#define GPIO_25    25
+#define GPIO_26    26
+#define GPIO_27    27
+#define GPIO_28    28
+#define GPIO_29    29
+#define GPIO_30    30
+#define GPIO_31    31
+#define GPIO_32    32
+#define GPIO_33    33
+#define GPIO_34    34
+#define GPIO_35    35
+#define GPIO_36    36
+#define GPIO_37    37
+#define GPIO_38    38
+#define GPIO_39    39
+#define GPIO_40    40
+#define GPIO_41    41
+#define GPIO_42    42
+#define GPIO_43    43
+#define GPIO_44    44
+#define GPIO_45    45
+#define GPIO_46    46
+#define GPIO_47    47
+#define GPIO_48    48
+#define GPIO_49    49
+#define GPIO_50    50
+#define GPIO_51    51
+#define GPIO_52    52
+#define GPIO_53    53
+#define GPIO_54    54
+#define GPIO_55    55
+#define GPIO_56    56
+#define GPIO_57    57
+#define GPIO_58    58
+#define GPIO_59    59
+#define GPIO_60    60
+#define GPIO_61    61
+#define GPIO_62    62
+#define GPIO_63    63
+#define GPIO_64    64
+#define GPIO_65    65
+#define GPIO_66    66
+#define GPIO_67    67
+#define GPIO_68    68
+#define GPIO_69    69
+#define GPIO_70	   70
+#define GPIO_71    71
+#define GPIO_72    72
+#define GPIO_73    73
+#define GPIO_74    74
+#define GPIO_75    75
+#define GPIO_76    76
+#define GPIO_77    77
+#define GPIO_78    78
+#define GPIO_79    79
+#define GPIO_80    80
+#define GPIO_81    81
+#define GPIO_82    82
+#define GPIO_83    83
+#define GPIO_84    84
+#define GPIO_85    85
+#define GPIO_86	   86
+#define GPIO_87    87
+#define GPIO_88    88
+#define GPIO_89    89
+#define GPIO_90    90
+#define GPIO_91    91
+#define GPIO_92    92
+#define GPIO_93    93
+#define GPIO_94    94
+#define GPIO_95    95
+
+
+#define GPIO_MAX  GPIO_95
+
+
+#define GPIO_MIN  GPIO_00
+#define GPIO_OUTPUT     0
+#define GPIO_INPUT      1
+#define GPIO_HIGH       1
+#define GPIO_LOW        0
+
+
+#define PIN_IDX(pin)        ((pin)/32)
+#define PIN_OFFSET(pin)     ((pin)%32)
+#define PIN_BITSET(pin)     (0x1<<((pin)%32))
+//#define GPIO_BIT(x)    (1<<(x))
+ 
+
+#define LS1C_BANK0_BASE				0xbfd010c0
+#define LS1C_BANK1_BASE				0xbfd010c4
+#define LS1C_BANK2_BASE				0xbfd010c8
+//#define LS1C_BANK3_BASE				0xbfd010cc
+
+#define LS1X_PAD_FUNC_MAX0_BASE	0xbfd011c0
+#define LS1X_PAD_FUNC_MAX1_BASE	0xbfd011c4
+#define LS1X_PAD_FUNC_MAX2_BASE	0xbfd011c8
+//#define LS1X_PAD_FUNC_MAX3_BASE	0xbfd011cc
+
+#define LS1C_BANK0_IRQ_START	64
+#define LS1C_BANK1_IRQ_START	96
+#define LS1C_BANK2_IRQ_START	128
+//#define LS1C_BANK3_IRQ_START	54
+
+
+#define GPIO_BANK_COUNT			3
+#define GPIO_IRQ_START			64
+#define GPIO_IRQ_END			159
+
+enum PAD_FUNC_TYPE
+{
+	PAD_FUNC_1 = 1,
+	PAD_FUNC_2,
+	PAD_FUNC_3,
+	PAD_FUNC_4,
+	PAD_FUNC_5,
+	PAD_FUNC_GPIO,
+	PAD_FUNC_DEFAULT,
+};
+
+
+struct gpio_bank {
+	unsigned long pbase;	//bank base = gpio base
+	u32 pad_muxfunc_base;	//pad mux func base
+	u32 virtual_irq_start;
+	spinlock_t lock;
+	struct gpio_chip chip;
+	u32 mod_usage;
+};
+#if 0
+struct gpio_bank gpio_bank_ls1c[GPIO_BANK_COUNT] = {
+	{ LS1C_BANK0_BASE,  LS1X_PAD_FUNC_MAX0_BASE, LS1C_BANK0_IRQ_START},
+	{ LS1C_BANK1_BASE,  LS1X_PAD_FUNC_MAX1_BASE, LS1C_BANK1_IRQ_START},
+	{ LS1C_BANK2_BASE,  LS1X_PAD_FUNC_MAX2_BASE, LS1C_BANK2_IRQ_START},
+//	{ LS1C_BANK3_BASE,  LS1X_PAD_FUNC_MAX3_BASE, LS1C_BANK3_IRQ_START}, 
+};
+#endif
+
+int gpio_2irq(struct gpio_chip *chip, unsigned offset);
+int gpio_output(struct gpio_chip *chip, unsigned offset, int value);
+void gpio_set(struct gpio_chip *chip, unsigned offset, int value);
+int gpio_input(struct gpio_chip *chip, unsigned offset);
+int gpio_is_input(struct gpio_bank *bank, int offset);
+int ls1c_gpio_request(struct gpio_chip *chip, unsigned offset);
+void ls1c_gpio_free(struct gpio_chip *chip, unsigned offset);
+int gpio_irq_type(unsigned irq, unsigned type);
+void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int enable);
+void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio);
+
+#endif /* __ASM_ARCH_GPIO_H__ */
diff -uNra linux-3.0.82/arch/mips/include/asm/mach-loongson/ls1x/ls1x_time.h linux-3.0.82x/arch/mips/include/asm/mach-loongson/ls1x/ls1x_time.h
--- linux-3.0.82/arch/mips/include/asm/mach-loongson/ls1x/ls1x_time.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/include/asm/mach-loongson/ls1x/ls1x_time.h	2017-09-23 03:42:49.366677056 +0800
@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2012 Tang, Haifeng <tanghaifeng-gz@loongson.cn>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#ifndef _LS1X_TIME_H
+#define _LS1X_TIME_H
+
+#ifdef CONFIG_LS1X_TIMER
+extern void setup_ls1x_timer(void);
+extern void disable_ls1x_counter(void);
+extern void enable_ls1x_counter(void);
+#else
+static inline void __maybe_unused setup_ls1x_timer(void)
+{
+}
+static inline void __maybe_unused disable_ls1x_counter(void)
+{
+}
+static inline void __maybe_unused enable_ls1x_counter(void)
+{
+}
+#endif
+
+#endif /*!_LS1X_TIME_H */
diff -uNra linux-3.0.82/arch/mips/include/asm/mach-loongson/ls1x/prom.h linux-3.0.82x/arch/mips/include/asm/mach-loongson/ls1x/prom.h
--- linux-3.0.82/arch/mips/include/asm/mach-loongson/ls1x/prom.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/include/asm/mach-loongson/ls1x/prom.h	2017-09-23 03:42:49.366677056 +0800
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2011 Zhang, Keguang <keguang.zhang@gmail.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __ASM_MACH_LOONGSON1_PROM_H
+#define __ASM_MACH_LOONGSON1_PROM_H
+
+#include <linux/io.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+
+/* environment arguments from bootloader */
+extern unsigned long memsize, highmemsize;
+
+/* loongson-specific command line, env and memory initialization */
+extern char *prom_getenv(char *name);
+extern void __init prom_init_cmdline(void);
+
+#endif /* __ASM_MACH_LOONGSON1_PROM_H */
diff -uNra linux-3.0.82/arch/mips/include/asm/mach-loongson/ls1x/regs-clk.h linux-3.0.82x/arch/mips/include/asm/mach-loongson/ls1x/regs-clk.h
--- linux-3.0.82/arch/mips/include/asm/mach-loongson/ls1x/regs-clk.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/include/asm/mach-loongson/ls1x/regs-clk.h	2017-09-23 03:42:49.366677056 +0800
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2011 Zhang, Keguang <keguang.zhang@gmail.com>
+ *
+ * Loongson1 Clock Register Definitions.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __ASM_MACH_LOONGSON1_REGS_CLK_H
+#define __ASM_MACH_LOONGSON1_REGS_CLK_H
+
+#define LS1X_CLK_REG(x)		(ioremap(LS1X_CLK_BASE + (x), 4))
+
+#define LS1X_CLK_PLL_FREQ		LS1X_CLK_REG(0x0)
+#define LS1X_CLK_PLL_DIV		LS1X_CLK_REG(0x4)
+
+/* Clock PLL Divisor Register Bits */
+#if defined(CONFIG_LS1C_MACH)
+#define DIV_DC_EN			(0x1 << 31)
+#define DIV_DC				(0x7f << 24)
+#define DIV_CAM_EN			(0x1 << 23)
+#define DIV_CAM			(0x7f << 16)
+#define DIV_CPU_EN			(0x1 << 15)
+#define DIV_CPU				(0x7f << 8)
+#define DIV_DC_SEL_EN			(0x1 << 5)
+#define DIV_DC_SEL				(0x1 << 4)
+#define DIV_CAM_SEL_EN			(0x1 << 3)
+#define DIV_CAM_SEL				(0x1 << 2)
+#define DIV_CPU_SEL_EN			(0x1 << 1)
+#define DIV_CPU_SEL				(0x1 << 0)
+
+#define DIV_DC_SHIFT			24
+#define DIV_CAM_SHIFT			16
+#define DIV_CPU_SHIFT			8
+
+#else
+#define DIV_DC_EN			(0x1 << 31)
+#define DIV_DC				(0x1f << 26)
+#define DIV_CPU_EN			(0x1 << 25)
+#define DIV_CPU				(0x1f << 20)
+#define DIV_DDR_EN			(0x1 << 19)
+#define DIV_DDR				(0x1f << 14)
+
+#define DIV_DC_SHIFT			26
+#define DIV_CPU_SHIFT			20
+#define DIV_DDR_SHIFT			14
+#endif
+
+#endif /* __ASM_MACH_LOONGSON1_REGS_CLK_H */
diff -uNra linux-3.0.82/arch/mips/include/asm/mach-loongson/ls1x/regs-gpio.h linux-3.0.82x/arch/mips/include/asm/mach-loongson/ls1x/regs-gpio.h
--- linux-3.0.82/arch/mips/include/asm/mach-loongson/ls1x/regs-gpio.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/include/asm/mach-loongson/ls1x/regs-gpio.h	2017-09-23 03:42:49.366677056 +0800
@@ -0,0 +1,91 @@
+/*
+ * Copyright (c) 2012 Tang, Haifeng <tanghaifeng-gz@loongson.cn>
+ * Loongson 1 GPIO Register Definitions.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __ASM_MACH_LOONGSON1_REGS_GPIO_H
+#define __ASM_MACH_LOONGSON1_REGS_GPIO_H
+
+#define LS1X_GPIO_REG(x) \
+		((void __iomem *)KSEG1ADDR(LS1X_GPIO_BASE + (x)))
+
+/* GPIO 0-31 */
+#define LS1X_GPIO_CFG0		LS1X_GPIO_REG(0x0)	/* é…�ç½®å¯„å­˜å™¨ */
+#define LS1X_GPIO_OE0		LS1X_GPIO_REG(0x10)	/* è¾“å…¥ä½¿èƒ½å¯„å­˜å™¨ */
+#define LS1X_GPIO_IN0		LS1X_GPIO_REG(0x20)	/* è¾“å…¥å¯„å­˜å™¨ */
+#define LS1X_GPIO_OUT0		LS1X_GPIO_REG(0x30)	/* è¾“å‡ºå¯„å­˜å™¨ */
+/* å¤�ç”¨PAD */
+#if defined(CONFIG_LS1A_MACH)
+	#define INIT0_OFFSET	(0)
+	#define INIT1_OFFSET	(1)
+	#define LCD_OFFSET	(2)
+	#define INIT0_MASK	(0x1)
+	#define INIT1_MASK	(0x1)
+	#define LCD_MASK	(0x3fffffff)
+#elif	defined(CONFIG_LS1B_MACH)
+
+#endif
+
+/* GPIO 32-63 */
+#define LS1X_GPIO_CFG1		LS1X_GPIO_REG(0x4)
+#define LS1X_GPIO_OE1		LS1X_GPIO_REG(0x14)
+#define LS1X_GPIO_IN1		LS1X_GPIO_REG(0x24)
+#define LS1X_GPIO_OUT1		LS1X_GPIO_REG(0x34)
+/* å¤�ç”¨PAD */
+#if defined(CONFIG_LS1A_MACH)
+	#define KB_OFFSET	(0)
+	#define MB_OFFSET	(2)
+	#define AC97_OFFSET	(4)
+	#define SPI0_OFFSET	(8)
+	#define SPI1_OFFSET	(12)
+	#define UART0_OFFSET	(16)
+	#define UART1_OFFSET	(24)
+	#define UART2_OFFSET	(28)
+	#define UART3_OFFSET	(30)
+	#define KB_MASK	(0x3)
+	#define MB_MASK	(0x3)
+	#define AC97_MASK	(0xf)
+	#define SPI0_MASK	(0xf)
+	#define SPI1_MASK	(0xf)
+	#define UART0_MASK	(0xff)
+	#define UART1_MASK	(0xf)
+	#define UART2_MASK	(0x3)
+	#define UART3_MASK	(0x3)
+#elif	defined(CONFIG_LS1B_MACH)
+
+#endif
+
+#ifdef CONFIG_LS1A_MACH
+/* GPIO 63-87 */
+#define LS1X_GPIO_CFG2		LS1X_GPIO_REG(0x8)
+#define LS1X_GPIO_OE2		LS1X_GPIO_REG(0x18)
+#define LS1X_GPIO_IN2		LS1X_GPIO_REG(0x28)
+#define LS1X_GPIO_OUT2		LS1X_GPIO_REG(0x38)
+	#define I2C_OFFSET	(0)
+	#define CAN0_OFFSET	(2)
+	#define CAN1_OFFSET	(4)
+	#define LPC_OFFSET	(6)
+	#define NAND_OFFSET	(12)
+	#define PWM_OFFSET	(20)
+	#define I2C_MASK	(0x3)
+	#define CAN0_MASK	(0x3)
+	#define CAN1_MASK	(0x3)
+	#define LPC_MASK	(0x3f)
+	#define NAND_MASK	(0xff)
+	#define PWM_MASK	(0xf)
+#endif
+
+#ifdef CONFIG_LS1C_MACH
+/* GPIO 63-87 */
+#define LS1X_GPIO_CFG3		LS1X_GPIO_REG(0x8)
+#define LS1X_GPIO_OE3		LS1X_GPIO_REG(0x18)
+#define LS1X_GPIO_IN3		LS1X_GPIO_REG(0x28)
+#define LS1X_GPIO_OUT3		LS1X_GPIO_REG(0x38)
+#endif
+
+#endif
diff -uNra linux-3.0.82/arch/mips/include/asm/mach-loongson/ls1x/regs-mux.h linux-3.0.82x/arch/mips/include/asm/mach-loongson/ls1x/regs-mux.h
--- linux-3.0.82/arch/mips/include/asm/mach-loongson/ls1x/regs-mux.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/include/asm/mach-loongson/ls1x/regs-mux.h	2017-09-23 03:42:49.366677056 +0800
@@ -0,0 +1,157 @@
+/*
+ * Copyright (c) 2012 Tang, Haifeng <tanghaifeng-gz@loongson.cn>
+ * Loongson 1 MUX Register Definitions.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __ASM_MACH_LOONGSON1_REGS_MUX_H
+#define __ASM_MACH_LOONGSON1_REGS_MUX_H
+
+#define LS1X_MUX_REG(x) \
+		((void __iomem *)KSEG1ADDR(LS1X_MUX_BASE + (x)))
+
+#define LS1X_MUX_CTRL0		LS1X_MUX_REG(0x0)
+
+#if	defined(CONFIG_LS1A_MACH)
+/* MUX_CTRL0 Register Bits */
+#define NAND3_USE_CAN1			(0x1 << 31)
+#define NAND2_USE_MS			(0x1 << 30)
+#define NAND1_USE_PWM01			(0x1 << 29)
+#define NAND_D45_USE_PWM23			(0x1 << 28)
+#define NAND_D45_USE_LPC			(0x1 << 27)
+#define NAND_D03_USE_SPI1			(0x1 << 26)
+#define NAND_D03_USE_LPC			(0x1 << 25)
+#define GMAC1_SHUT			(0x1 << 24)
+#define GMAC0_SHUT			(0x1 << 23)
+#define SATA_SHUT			(0x1 << 22)
+#define USB_SHUT			(0x1 << 21)
+#define GPU_SHUT			(0x1 << 20)
+#define DDR2_SHUT			(0x1 << 19)
+#define VGA_USE_PCI			(0x1 << 18)
+#define I2C3_USE_CAN0			(0x1 << 17)
+#define I2C2_USE_CAN1			(0x1 << 16)
+#define SPI0_USE_CAN0_TX			(0x1 << 15)
+#define SPI0_USE_CAN0_RX			(0x1 << 14)
+#define SPI1_USE_CAN1_TX			(0x1 << 13)
+#define SPI1_USE_CAN1_RX			(0x1 << 12)
+#define GMAC1_USE_TXCLK			(0x1 << 11)
+#define GMAC0_USE_TXCLK			(0x1 << 10)
+#define GMAC1_USE_PWM23			(0x1 << 9)
+#define GMAC0_USE_PWM01			(0x1 << 8)
+#define GMAC1_USE_UART1			(0x1 << 7)
+#define GMAC1_USE_UART0			(0x1 << 6)
+#define PCI_REQ2_USE_GMAC1			(0x1 << 2)
+#define DISABLE_DDR2_CONFSPACE			(0x1 << 1)
+#define DDR32TO16EN			(0x1 << 0)
+
+#define LS1X_MUX_CTRL1		((void __iomem *)KSEG1ADDR(0x1ff10204))
+#define USB_RESET			(0x1 << 30)
+
+#elif	defined(CONFIG_LS1B_MACH)
+#define LS1X_MUX_CTRL1		LS1X_MUX_REG(0x4)
+
+/* MUX_CTRL0 Register Bits */
+#define UART0_USE_PWM23			(0x1 << 28)
+#define UART0_USE_PWM01			(0x1 << 27)
+#define UART1_USE_LCD0_5_6_11	(0x1 << 26)
+#define I2C2_USE_CAN1			(0x1 << 25)
+#define I2C1_USE_CAN0			(0x1 << 24)
+#define NAND3_USE_UART5			(0x1 << 23)
+#define NAND3_USE_UART4			(0x1 << 22)
+#define NAND3_USE_UART1_DAT		(0x1 << 21)
+#define NAND3_USE_UART1_CTS		(0x1 << 20)
+#define NAND3_USE_PWM23			(0x1 << 19)
+#define NAND3_USE_PWM01			(0x1 << 18)
+#define NAND2_USE_UART5			(0x1 << 17)
+#define NAND2_USE_UART4			(0x1 << 16)
+#define NAND2_USE_UART1_DAT		(0x1 << 15)
+#define NAND2_USE_UART1_CTS		(0x1 << 14)
+#define NAND2_USE_PWM23			(0x1 << 13)
+#define NAND2_USE_PWM01			(0x1 << 12)
+#define NAND1_USE_UART5			(0x1 << 11)
+#define NAND1_USE_UART4			(0x1 << 10)
+#define NAND1_USE_UART1_DAT		(0x1 << 9)
+#define NAND1_USE_UART1_CTS		(0x1 << 8)
+#define NAND1_USE_PWM23			(0x1 << 7)
+#define NAND1_USE_PWM01			(0x1 << 6)
+#define GMAC1_USE_UART1			(0x1 << 4)
+#define GMAC1_USE_UART0			(0x1 << 3)
+#define LCD_USE_UART0_DAT		(0x1 << 2)
+#define LCD_USE_UART15			(0x1 << 1)
+#define LCD_USE_UART0			(0x1 << 0)
+
+/* MUX_CTRL1 Register Bits */
+#define USB_RESET				(0x1 << 31)
+#define SPI1_CS_USE_PWM01		(0x1 << 24)
+#define SPI1_USE_CAN			(0x1 << 23)
+#define DISABLE_DDR_CONFSPACE	(0x1 << 20)
+#define DDR32TO16EN				(0x1 << 16)
+#define GMAC1_SHUT				(0x1 << 13)
+#define GMAC0_SHUT				(0x1 << 12)
+#define USB_SHUT				(0x1 << 11)
+#define UART1_3_USE_CAN1		(0x1 << 5)
+#define UART1_2_USE_CAN0		(0x1 << 4)
+#define GMAC1_USE_TXCLK			(0x1 << 3)
+#define GMAC0_USE_TXCLK			(0x1 << 2)
+#define GMAC1_USE_PWM23			(0x1 << 1)
+#define GMAC0_USE_PWM01			(0x1 << 0)
+
+#define UART_SPLIT \
+		((void __iomem *)KSEG1ADDR(LS1B_UART_SPLIT))
+
+#elif	defined(CONFIG_LS1C_MACH)
+#define LS1X_MUX_CTRL1		LS1X_MUX_REG(0x4)
+/* MUX_CTRL0 Register Bits */
+#define UART_SPLIT	(0x3 << 30)
+#define OUTPUT_CLK	(0xf << 26)
+#define ADC_SHUT	(0x1 << 25)
+#define SDIO_SHUT	(0x1 << 24)
+#define DMA2_SHUT	(0x1 << 23)
+#define DMA1_SHUT	(0x1 << 22)
+#define DMA0_SHUT	(0x1 << 21)
+#define SPI1_SHUT	(0x1 << 20)
+#define SPI0_SHUT	(0x1 << 19)
+#define I2C2_SHUT	(0x1 << 18)
+#define I2C1_SHUT	(0x1 << 17)
+#define I2C0_SHUT	(0x1 << 16)
+#define AC97_SHUT	(0x1 << 15)
+#define I2S_SHUT	(0x1 << 14)
+#define UART3_SHUT	(0x1 << 13)
+#define UART2_SHUT	(0x1 << 12)
+#define UART1_SHUT	(0x1 << 11)
+#define UART0_SHUT	(0x1 << 10)
+#define CAN1_SHUT	(0x1 << 9)
+#define CAN0_SHUT	(0x1 << 8)
+#define ECC_SHUT	(0x1 << 7)
+#define GMAC_SHUT	(0x1 << 6)
+#define USBHOST_SHUT	(0x1 << 5)
+#define USBOTG_SHUT	(0x1 << 4)
+#define SDRAM_SHUT	(0x1 << 3)
+#define SRAM_SHUT	(0x1 << 2)
+#define CAM_SHUT	(0x1 << 1)
+#define LCD_SHUT	(0x1 << 0)
+
+#define UART_SPLIT_SHIFT			30
+#define OUTPUT_CLK_SHIFT			26
+
+/* MUX_CTRL1 Register Bits */
+#define USBHOST_RSTN	(0x1 << 31)
+#define PHY_INTF_SELI	(0x7 << 28)
+#define AC97_EN	(0x1 << 25)
+#define SDIO_DMA_EN	(0x3 << 23)
+#define ADC_DMA_EN	(0x1 << 22)
+#define SDIO_USE_SPI1	(0x1 << 17)
+#define SDIO_USE_SPI0	(0x1 << 16)
+#define SRAM_CTRL	(0xffff << 0)
+
+#define PHY_INTF_SELI_SHIFT			28
+#define SDIO_DMA_EN_SHIFT			23
+#define SRAM_CTRL_SHIFT			0
+
+#endif	//#ifdef	CONFIG_LS1A_MACH
+
+#endif /* __ASM_MACH_LOONGSON1_REGS_MUX_H */
diff -uNra linux-3.0.82/arch/mips/include/asm/mach-loongson/ls1x/spi.h linux-3.0.82x/arch/mips/include/asm/mach-loongson/ls1x/spi.h
--- linux-3.0.82/arch/mips/include/asm/mach-loongson/ls1x/spi.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/include/asm/mach-loongson/ls1x/spi.h	2017-09-23 03:42:49.366677056 +0800
@@ -0,0 +1,19 @@
+/* linux/include/asm-mips/sb2f-board/spi.h
+*/
+
+#ifndef __ASM_ARCH_SPI_H
+#define __ASM_ARCH_SPI_H __FILE__
+struct ls1b_spi_info;
+struct spi_board_info;
+
+struct ls1b_spi_info {
+//	unsigned int		 pin_cs;	/* simple gpio cs */
+	unsigned int		 num_cs;	/* total chipselects */
+	int			 bus_num;       /* bus number to use. */
+	unsigned int		 board_size;
+	struct spi_board_info	*board_info;
+
+//	void (*set_cs)(struct ls1b_spi_info *spi, int cs, int pol);
+};
+
+#endif /* __ASM_ARCH_SPI_H */
diff -uNra linux-3.0.82/arch/mips/include/asm/module.h linux-3.0.82x/arch/mips/include/asm/module.h
--- linux-3.0.82/arch/mips/include/asm/module.h	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/include/asm/module.h	2017-09-23 03:42:49.370677043 +0800
@@ -120,6 +120,8 @@
 #define MODULE_PROC_FAMILY "OCTEON "
 #elif defined CONFIG_CPU_XLR
 #define MODULE_PROC_FAMILY "XLR "
+#elif defined CONFIG_CPU_LS232
+#define	MODULE_PROC_FAMILY "LOONGSON1 "
 #else
 #error MODULE_PROC_FAMILY undefined for your processor configuration
 #endif
diff -uNra linux-3.0.82/arch/mips/Kconfig linux-3.0.82x/arch/mips/Kconfig
--- linux-3.0.82/arch/mips/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/Kconfig	2017-09-23 03:42:49.370677043 +0800
@@ -1188,6 +1188,36 @@
 	  have a similar programming interface with FPGA northbridge used in
 	  Loongson2E.
 
+config CPU_LOONGSON1A
+	bool "Loongson 1A"
+	depends on SYS_HAS_CPU_LOONGSON1A
+	select CPU_LS232
+	select GENERIC_GPIO
+	select ARCH_REQUIRE_GPIOLIB
+	help
+	  The Loongson 1A is a 32-bit SoC, which implements the MIPS32
+	  release 2 instruction set.
+	  
+config CPU_LOONGSON1B
+	bool "Loongson 1B"
+	depends on SYS_HAS_CPU_LOONGSON1B
+	select CPU_LS232
+	select GENERIC_GPIO
+	select ARCH_REQUIRE_GPIOLIB
+	help
+	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
+	  release 2 instruction set.
+
+config CPU_LOONGSON1C
+	bool "Loongson 1C"
+	depends on SYS_HAS_CPU_LOONGSON1C
+	select CPU_LS232
+	select GENERIC_GPIO
+	select ARCH_REQUIRE_GPIOLIB
+	help
+	  The Loongson 1C is a 32-bit SoC, which implements the MIPS32
+	  release 2 instruction set.
+
 config CPU_MIPS32_R1
 	bool "MIPS32 Release 1"
 	depends on SYS_HAS_CPU_MIPS32_R1
@@ -1524,6 +1554,22 @@
 	select CPU_SUPPORTS_CPUFREQ
 	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
 	select CPU_SUPPORTS_UNCACHED_ACCELERATED
+	
+config CPU_LS232
+	bool
+	select CPU_SUPPORTS_CPUFREQ
+	select CPU_HAS_LLSC
+	select CPU_SUPPORTS_32BIT_KERNEL
+	select CPU_SUPPORTS_HIGHMEM
+
+config SYS_HAS_CPU_LOONGSON1A
+	bool
+
+config SYS_HAS_CPU_LOONGSON1B
+	bool
+
+config SYS_HAS_CPU_LOONGSON1C
+	bool
 
 config SYS_HAS_CPU_MIPS32_R1
 	bool
diff -uNra linux-3.0.82/arch/mips/kernel/cpufreq/Kconfig linux-3.0.82x/arch/mips/kernel/cpufreq/Kconfig
--- linux-3.0.82/arch/mips/kernel/cpufreq/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/kernel/cpufreq/Kconfig	2017-09-23 03:42:49.370677043 +0800
@@ -34,6 +34,11 @@
 
 	  If in doubt, say N.
 
+config LOONGSON1_CPUFREQ
+	tristate "Loongson 1A/1B CPUFreq Driver"
+	select CPU_FREQ_TABLE
+	depends on MIPS_CPUFREQ
+
 endif	# CPU_FREQ
 
 endmenu
diff -uNra linux-3.0.82/arch/mips/kernel/cpufreq/loongson1_cpufreq.c linux-3.0.82x/arch/mips/kernel/cpufreq/loongson1_cpufreq.c
--- linux-3.0.82/arch/mips/kernel/cpufreq/loongson1_cpufreq.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/kernel/cpufreq/loongson1_cpufreq.c	2017-09-23 03:42:49.370677043 +0800
@@ -0,0 +1,243 @@
+/*
+ * Cpufreq driver for the loongson-2 processors
+ *
+ * The 2E revision of loongson processor not support this feature.
+ *
+ * Copyright (C) 2006 - 2008 Lemote Inc. & Insititute of Computing Technology
+ * Author: Yanhua, yanh@lemote.com
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/cpufreq.h>
+#include <linux/module.h>
+#include <linux/err.h>
+#include <linux/sched.h>	/* set_cpus_allowed() */
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <linux/io.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+
+#include <asm/clock.h>
+#include <asm/mach-loongson/ls1x/ls1b_board.h>
+
+extern unsigned long cpu_clock_freq;
+extern void loongson1_cpu_wait(void);
+extern struct cpufreq_frequency_table loongson1_clockmod_table[];
+
+static uint nowait;
+
+static struct clk *cpuclk;
+
+static void (*saved_cpu_wait) (void);
+
+static int loongson1_cpu_freq_notifier(struct notifier_block *nb,
+					unsigned long val, void *data);
+
+static struct notifier_block loongson1_cpufreq_notifier_block = {
+	.notifier_call = loongson1_cpu_freq_notifier
+};
+
+static int loongson1_cpu_freq_notifier(struct notifier_block *nb,
+					unsigned long val, void *data)
+{
+	if (val == CPUFREQ_POSTCHANGE)
+		current_cpu_data.udelay_val = loops_per_jiffy;
+
+	return 0;
+}
+
+static unsigned int loongson1_cpufreq_get(unsigned int cpu)
+{
+	return clk_get_rate(cpuclk);
+}
+
+/*
+ * Here we notify other drivers of the proposed change and the final change.
+ */
+static int loongson1_cpufreq_target(struct cpufreq_policy *policy,
+				     unsigned int target_freq,
+				     unsigned int relation)
+{
+	unsigned int cpu = policy->cpu;
+	unsigned int newstate = 0;
+	cpumask_t cpus_allowed;
+	struct cpufreq_freqs freqs;
+	unsigned int freq;
+
+	if (!cpu_online(cpu))
+		return -ENODEV;
+
+	cpus_allowed = current->cpus_allowed;
+	set_cpus_allowed_ptr(current, cpumask_of(cpu));
+
+	if (cpufreq_frequency_table_target
+	    (policy, &loongson1_clockmod_table[0], target_freq, relation,
+	     &newstate))
+		return -EINVAL;
+
+#ifdef CONFIG_LS1B_MACH
+	freq =
+	    ((cpu_clock_freq / 1000) /
+	     loongson1_clockmod_table[newstate].index) * 2;
+#else
+	freq = (APB_CLK / 1000) * (loongson1_clockmod_table[newstate].index + 2) ;
+#endif
+	if (freq < policy->min || freq > policy->max)
+		return -EINVAL;
+
+	pr_debug("cpufreq: requested frequency %u Hz\n", target_freq * 1000);
+
+	freqs.cpu = cpu;
+	freqs.old = loongson1_cpufreq_get(cpu);
+	freqs.new = freq;
+	freqs.flags = 0;
+
+	if (freqs.new == freqs.old)
+		return 0;
+
+	/* notifiers */
+	cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
+
+	set_cpus_allowed_ptr(current, &cpus_allowed);
+
+	/* setting the cpu frequency */
+	clk_set_rate(cpuclk, freq);
+
+	/* notifiers */
+	cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
+
+	pr_debug("cpufreq: set frequency %u kHz\n", freq);
+
+	return 0;
+}
+
+static int loongson1_cpufreq_cpu_init(struct cpufreq_policy *policy)
+{
+	int i;
+
+	if (!cpu_online(policy->cpu))
+		return -ENODEV;
+
+	cpuclk = clk_get(NULL, "cpu");
+	if (IS_ERR(cpuclk)) {
+		printk(KERN_ERR "cpufreq: couldn't get CPU clk\n");
+		return PTR_ERR(cpuclk);
+	}
+
+	cpuclk->rate = cpu_clock_freq / 1000;
+	if (!cpuclk->rate)
+		return -EINVAL;
+
+#ifdef CONFIG_LS1B_MACH
+	/* clock table init */
+	for (i = 2;
+	     (loongson1_clockmod_table[i].frequency != CPUFREQ_TABLE_END);
+	     i++)
+		loongson1_clockmod_table[i].frequency = (cpuclk->rate / i) * 2;
+#else
+	for (i = 2; (loongson1_clockmod_table[i].frequency != CPUFREQ_TABLE_END); i++)
+		loongson1_clockmod_table[i].frequency = (APB_CLK / 1000) * (2 + i);
+#endif
+
+	policy->cur = loongson1_cpufreq_get(policy->cpu);
+
+	cpufreq_frequency_table_get_attr(&loongson1_clockmod_table[0],
+					 policy->cpu);
+
+	return cpufreq_frequency_table_cpuinfo(policy,
+					    &loongson1_clockmod_table[0]);
+}
+
+static int loongson1_cpufreq_verify(struct cpufreq_policy *policy)
+{
+	return cpufreq_frequency_table_verify(policy,
+					      &loongson1_clockmod_table[0]);
+}
+
+static int loongson1_cpufreq_exit(struct cpufreq_policy *policy)
+{
+	clk_put(cpuclk);
+	return 0;
+}
+
+static struct freq_attr *loongson1_table_attr[] = {
+	&cpufreq_freq_attr_scaling_available_freqs,
+	NULL,
+};
+
+static struct cpufreq_driver loongson1_cpufreq_driver = {
+	.owner = THIS_MODULE,
+	.name = "loongson1",
+	.init = loongson1_cpufreq_cpu_init,
+	.verify = loongson1_cpufreq_verify,
+	.target = loongson1_cpufreq_target,
+	.get = loongson1_cpufreq_get,
+	.exit = loongson1_cpufreq_exit,
+	.attr = loongson1_table_attr,
+};
+
+static struct platform_device_id platform_device_ids[] = {
+	{
+		.name = "loongson1_cpufreq",
+	},
+	{}
+};
+
+MODULE_DEVICE_TABLE(platform, platform_device_ids);
+
+static struct platform_driver platform_driver = {
+	.driver = {
+		.name = "loongson1_cpufreq",
+		.owner = THIS_MODULE,
+	},
+	.id_table = platform_device_ids,
+};
+
+static int __init cpufreq_init(void)
+{
+	int ret;
+
+	/* Register platform stuff */
+	ret = platform_driver_register(&platform_driver);
+	if (ret)
+		return ret;
+
+	pr_info("cpufreq: Loongson 1A/1B CPU frequency driver.\n");
+
+	cpufreq_register_notifier(&loongson1_cpufreq_notifier_block,
+				  CPUFREQ_TRANSITION_NOTIFIER);
+
+	ret = cpufreq_register_driver(&loongson1_cpufreq_driver);
+
+	if (!ret && !nowait) {
+		saved_cpu_wait = cpu_wait;
+//		cpu_wait = loongson1_cpu_wait;
+	}
+
+	return ret;
+}
+
+static void __exit cpufreq_exit(void)
+{
+	if (!nowait && saved_cpu_wait)
+		cpu_wait = saved_cpu_wait;
+	cpufreq_unregister_driver(&loongson1_cpufreq_driver);
+	cpufreq_unregister_notifier(&loongson1_cpufreq_notifier_block,
+				    CPUFREQ_TRANSITION_NOTIFIER);
+
+	platform_driver_unregister(&platform_driver);
+}
+
+module_init(cpufreq_init);
+module_exit(cpufreq_exit);
+
+module_param(nowait, uint, 0644);
+MODULE_PARM_DESC(nowait, "Disable Loongson 1A/1B specific wait");
+
+MODULE_AUTHOR("Yanhua <yanh@lemote.com>");
+MODULE_DESCRIPTION("cpufreq driver for loongson1F");
+MODULE_LICENSE("GPL");
diff -uNra linux-3.0.82/arch/mips/kernel/cpufreq/Makefile linux-3.0.82x/arch/mips/kernel/cpufreq/Makefile
--- linux-3.0.82/arch/mips/kernel/cpufreq/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/kernel/cpufreq/Makefile	2017-09-23 03:42:49.370677043 +0800
@@ -3,3 +3,4 @@
 #
 
 obj-$(CONFIG_LOONGSON2_CPUFREQ) += loongson2_cpufreq.o loongson2_clock.o
+obj-$(CONFIG_LOONGSON1_CPUFREQ) += loongson1_cpufreq.o
diff -uNra linux-3.0.82/arch/mips/kernel/cpu-probe.c linux-3.0.82x/arch/mips/kernel/cpu-probe.c
--- linux-3.0.82/arch/mips/kernel/cpu-probe.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/kernel/cpu-probe.c	2017-09-23 03:42:49.374677031 +0800
@@ -35,6 +35,7 @@
  * the CPU very much.
  */
 void (*cpu_wait)(void);
+static void __cpuinit decode_configs(struct cpuinfo_mips *c);
 EXPORT_SYMBOL(cpu_wait);
 
 static void r3081_wait(void)
@@ -191,6 +192,7 @@
 	case CPU_CAVIUM_OCTEON_PLUS:
 	case CPU_CAVIUM_OCTEON2:
 	case CPU_JZRISC:
+	case CPU_LS232:
 		cpu_wait = r4k_wait;
 		break;
 
@@ -617,6 +619,19 @@
 		             MIPS_CPU_LLSC;
 		c->tlbsize = 64;
 		break;
+
+	case PRID_IMP_LOONGSON1:
+		decode_configs(c);
+
+		switch (c->processor_id & PRID_REV_MASK) {
+		case PRID_REV_LS232:
+			c->cputype = CPU_LS232;
+			__cpu_name[cpu] = "Loongson LS1X";
+			set_elf_platform(cpu, "loongson1x");
+			break;
+		}
+		break;
+
 	case PRID_IMP_LOONGSON2:
 		c->cputype = CPU_LOONGSON2;
 		__cpu_name[cpu] = "ICT Loongson-2";
diff -uNra linux-3.0.82/arch/mips/kernel/irq.c linux-3.0.82x/arch/mips/kernel/irq.c
--- linux-3.0.82/arch/mips/kernel/irq.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/kernel/irq.c	2017-09-23 03:42:49.374677031 +0800
@@ -142,6 +142,7 @@
  */
 void __irq_entry do_IRQ(unsigned int irq)
 {
+//	printk("do_IRQ::irq==%x\n",irq);
 	irq_enter();
 	check_stack_overflow();
 	if (!smtc_handle_on_other_cpu(irq))
diff -uNra linux-3.0.82/arch/mips/kernel/Makefile linux-3.0.82x/arch/mips/kernel/Makefile
--- linux-3.0.82/arch/mips/kernel/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/kernel/Makefile	2017-09-23 03:42:49.374677031 +0800
@@ -32,6 +32,7 @@
 
 obj-$(CONFIG_FUNCTION_TRACER)	+= mcount.o ftrace.o
 
+obj-$(CONFIG_CPU_LS232)		+= r4k_fpu.o r4k_switch.o	#lxy
 obj-$(CONFIG_CPU_LOONGSON2)	+= r4k_fpu.o r4k_switch.o
 obj-$(CONFIG_CPU_MIPS32)	+= r4k_fpu.o r4k_switch.o
 obj-$(CONFIG_CPU_MIPS64)	+= r4k_fpu.o r4k_switch.o
diff -uNra linux-3.0.82/arch/mips/kernel/r4k_switch.S linux-3.0.82x/arch/mips/kernel/r4k_switch.S
--- linux-3.0.82/arch/mips/kernel/r4k_switch.S	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/kernel/r4k_switch.S	2017-09-23 03:42:49.374677031 +0800
@@ -196,7 +196,7 @@
 1:
 #endif
 
-#ifdef CONFIG_CPU_MIPS32
+#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_LS232)
 	mtc1	t1, $f0
 	mtc1	t1, $f1
 	mtc1	t1, $f2
diff -uNra linux-3.0.82/arch/mips/kernel/traps.c linux-3.0.82x/arch/mips/kernel/traps.c
--- linux-3.0.82/arch/mips/kernel/traps.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/kernel/traps.c	2017-09-23 03:42:49.378677019 +0800
@@ -1241,6 +1241,7 @@
 		break;
 
 	case CPU_5KC:
+//	case CPU_LS232:
 		write_c0_ecc(0x80000000);
 		back_to_back_c0_hazard();
 		/* Set the PE bit (bit 31) in the c0_errctl register. */
@@ -1283,7 +1284,7 @@
 	       reg_val & (1<<22) ? "E0 " : "");
 	printk("IDX: 0x%08x\n", reg_val & ((1<<22)-1));
 
-#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
+#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) || defined(CONFIG_CPU_LS232)
 	if (reg_val & (1<<22))
 		printk("DErrAddr0: 0x%0*lx\n", field, read_c0_derraddr0());
 
@@ -1534,7 +1535,10 @@
 		status_set |= ST0_XX;
 	if (cpu_has_dsp)
 		status_set |= ST0_MX;
-
+	/*add by yg , add fpu support*/
+	if (cpu_has_fpu)
+		status_set |= ST0_CU1;
+	/*  add end */
 	change_c0_status(ST0_CU|ST0_MX|ST0_RE|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX,
 			 status_set);
 
@@ -1675,7 +1679,7 @@
 	}
 
 	per_cpu_trap_init();
-
+	
 	/*
 	 * Copy the generic exception handlers to their final destination.
 	 * This will be overriden later as suitable for a particular
diff -uNra linux-3.0.82/arch/mips/lib/Makefile linux-3.0.82x/arch/mips/lib/Makefile
--- linux-3.0.82/arch/mips/lib/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/lib/Makefile	2017-09-23 03:42:49.378677019 +0800
@@ -9,6 +9,7 @@
 obj-$(CONFIG_PCI)	+= iomap-pci.o
 
 obj-$(CONFIG_CPU_LOONGSON2)	+= dump_tlb.o
+obj-$(CONFIG_CPU_LS232)		+= dump_tlb.o		#lxy
 obj-$(CONFIG_CPU_MIPS32)	+= dump_tlb.o
 obj-$(CONFIG_CPU_MIPS64)	+= dump_tlb.o
 obj-$(CONFIG_CPU_NEVADA)	+= dump_tlb.o
diff -uNra linux-3.0.82/arch/mips/lib/memcpy-inatomic.S linux-3.0.82x/arch/mips/lib/memcpy-inatomic.S
--- linux-3.0.82/arch/mips/lib/memcpy-inatomic.S	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/lib/memcpy-inatomic.S	2017-09-23 03:42:49.378677019 +0800
@@ -21,7 +21,9 @@
  * end of memory on some systems.  It's also a seriously bad idea on non
  * dma-coherent systems.
  */
+//thf
 #ifdef CONFIG_DMA_NONCOHERENT
+//#if (!defined(CONFIG_DMA_COHERENT) || !defined(CONFIG_DMA_IP27)) && !defined(CONFIG_CPU_LS232)
 #undef CONFIG_CPU_HAS_PREFETCH
 #endif
 #ifdef CONFIG_MIPS_MALTA
diff -uNra linux-3.0.82/arch/mips/lib/memcpy.S linux-3.0.82x/arch/mips/lib/memcpy.S
--- linux-3.0.82/arch/mips/lib/memcpy.S	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/lib/memcpy.S	2017-09-23 03:42:49.378677019 +0800
@@ -21,7 +21,9 @@
  * end of memory on some systems.  It's also a seriously bad idea on non
  * dma-coherent systems.
  */
+//thf
 #ifdef CONFIG_DMA_NONCOHERENT
+//#if (!defined(CONFIG_DMA_COHERENT) || !defined(CONFIG_DMA_IP27)) && !defined(CONFIG_CPU_LS232)
 #undef CONFIG_CPU_HAS_PREFETCH
 #endif
 #ifdef CONFIG_MIPS_MALTA
diff -uNra linux-3.0.82/arch/mips/loongson/Kconfig linux-3.0.82x/arch/mips/loongson/Kconfig
--- linux-3.0.82/arch/mips/loongson/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/Kconfig	2017-09-23 03:42:49.378677019 +0800
@@ -3,6 +3,59 @@
 choice
 	prompt "Machine Type"
 
+config LS1A_MACH
+	bool "Loongson 1A board"
+	select BOOT_ELF32
+	select CEVT_R4K if ! MIPS_EXTERNAL_TIMER
+	select CSRC_R4K if ! MIPS_EXTERNAL_TIMER
+	select SYS_HAS_CPU_LOONGSON1A
+	select CPU_HAS_WB
+	select DMA_NONCOHERENT
+	select HW_HAS_PCI
+	select IRQ_CPU
+	select SYS_HAS_EARLY_PRINTK
+	select SYS_SUPPORTS_32BIT_KERNEL
+	select SYS_SUPPORTS_HIGHMEM
+	select SYS_SUPPORTS_LITTLE_ENDIAN
+	help
+	  GZ Loongson 1A family machines utilize the ls232 revision of
+	  Loongson processor.
+
+config LS1B_MACH
+	bool "Loongson 1B board"
+	select BOOT_ELF32
+	select CEVT_R4K if ! MIPS_EXTERNAL_TIMER
+	select CSRC_R4K if ! MIPS_EXTERNAL_TIMER
+	select SYS_HAS_CPU_LOONGSON1B
+	select CPU_HAS_WB
+	select DMA_NONCOHERENT
+	select IRQ_CPU
+	select SYS_HAS_EARLY_PRINTK
+	select SYS_SUPPORTS_32BIT_KERNEL
+	select SYS_SUPPORTS_HIGHMEM
+	select SYS_SUPPORTS_LITTLE_ENDIAN
+	help
+	  GZ Loongson 1B family machines utilize the ls232 revision of
+	  Loongson processor.
+
+config LS1C_MACH
+	bool "Loongson 1C board"
+	select BOOT_ELF32
+	select CEVT_R4K if ! MIPS_EXTERNAL_TIMER
+	select CSRC_R4K if ! MIPS_EXTERNAL_TIMER
+	select SYS_HAS_CPU_LOONGSON1C
+	select CPU_HAS_WB
+	select DMA_NONCOHERENT
+	select IRQ_CPU
+	select SYS_HAS_EARLY_PRINTK
+	select SYS_SUPPORTS_32BIT_KERNEL
+	select SYS_SUPPORTS_HIGHMEM
+	select SYS_SUPPORTS_LITTLE_ENDIAN
+	select ARCH_REQUIRE_GPIOLIB
+	help
+	  GZ Loongson 1C family machines utilize the ls232 revision of
+	  Loongson processor.
+
 config LEMOTE_FULOONG2E
 	bool "Lemote Fuloong(2e) mini-PC"
 	select ARCH_SPARSEMEM_ENABLE
@@ -60,6 +113,32 @@
 	  LingLoong allinone PC and so forth.
 endchoice
 
+choice
+	prompt "LS1A board configure"
+	depends on LS1A_MACH
+	default LS1A_CORE_BOARD
+
+config	LS1A_CORE_BOARD
+	bool "ls1a_core_board"
+
+config	LS1A_CLOUD_TERMIAL
+	bool "ls1a_cloud_termial"
+endchoice
+
+choice
+	prompt "LS1B board configure"
+	depends on LS1B_MACH
+	default LS1B_BOARD
+
+config	LS1B_BOARD
+	bool "ls1b_board"
+
+config	LS1B_CORE_BOARD
+	bool "ls1b_core_board"
+endchoice
+
+
+
 config CS5536
 	bool
 
@@ -89,4 +168,80 @@
 	bool
 	default n
 
+config PCI_AUTO
+	bool "auto asign pci resource"
+	default y
+	depends on LS1A_MACH
+
+config DISABLE_PCI
+	bool "disable pci"
+	default n
+	depends on LS1A_MACH
+
+config LOONGSON_BIGPCI
+	bool 'use large pci memory'
+	default n
+	depends on LS1A_MACH
+
+config HAVE_PWM
+	bool "Enable PWM"
+	default n
+	depends on LS1A_MACH || LS1B_MACH || LS1C_MACH
+	help
+	  This option enable loongson 1a/1b cpu's pwm controller.
+	  Be careful, some module's Pin multiplexing with the pwm,
+	  as NAND GMAC and SPI.
+
+config LS1X_EXTERN_TIMER
+	bool "loongson 1A/1B Extern Timer"
+	default n
+	depends on LS1A_MACH || LS1B_MACH
+	help
+	  If you want to enable the Loongson1 CPUFreq Driver, Please enable
+	  this option at first, otherwise, You will get wrong system time.
+
+choice
+	prompt "Extern timer instead of mips timer for systerm"
+	depends on LS1X_EXTERN_TIMER
+	default LS1X_TIMER
+
+config	LS1X_HPET
+	bool "hpet timer of LS1A for system"
+	select MIPS_EXTERNAL_TIMER
+	depends on LS1A_MACH
+	help
+	  If you want to enable the Loongson1A CPUFreq Driver, Please enable
+	  this option at first, otherwise, You will get wrong system time.
+	  only for ls1a.
+
+config LS1X_TIMER
+	bool "loongson 1A/1B PWM Timer"
+	select MIPS_EXTERNAL_TIMER
+	depends on LS1A_MACH || LS1B_MACH
+	help
+	  If you want to enable the Loongson1 CPUFreq Driver, Please enable
+	  this option at first, otherwise, You will get wrong system time.
+
+	  If unsure, say Yes.
+endchoice
+
+choice
+	prompt  "system timer select for pwm-timer"
+	depends on LS1X_EXTERN_TIMER
+	depends on LS1X_TIMER
+	default TIMER_USE_PWM0
+
+config TIMER_USE_PWM0
+	bool "used pwm0 timer controller"
+
+config TIMER_USE_PWM1
+	bool "used pwm1 timer controller"
+
+config TIMER_USE_PWM2
+	bool "used pwm2 timer controller"
+
+config TIMER_USE_PWM3
+	bool "used pwm3 timer controller"
+endchoice
+
 endif # MACH_LOONGSON
diff -uNra linux-3.0.82/arch/mips/loongson/ls1x/clock.c linux-3.0.82x/arch/mips/loongson/ls1x/clock.c
--- linux-3.0.82/arch/mips/loongson/ls1x/clock.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/ls1x/clock.c	2017-09-23 03:42:49.382677007 +0800
@@ -0,0 +1,384 @@
+/*
+ * Copyright (c) 2011 Zhang, Keguang <keguang.zhang@gmail.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/cpufreq.h>
+#include <linux/module.h>
+#include <linux/list.h>
+#include <linux/mutex.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <asm/time.h>
+
+#include <asm/mach-loongson/ls1x/clock.h>
+#include <asm/mach-loongson/ls1x/ls1b_board.h>
+#include <asm/mach-loongson/ls1x/ls1x_time.h>
+
+static LIST_HEAD(clocks);
+static DEFINE_MUTEX(clocks_mutex);
+static DEFINE_SPINLOCK(clock_lock);
+
+#ifdef	CONFIG_LS1A_MACH
+extern unsigned long cpu_clock_freq;
+extern unsigned long ls1x_bus_clock;
+#endif
+
+/* Minimum CLK support */
+enum {
+	DC_ZERO, DC_25PT = 2, DC_37PT, DC_50PT, DC_62PT, DC_75PT,
+	DC_87PT, DC_DISABLE, DC_RESV
+};
+
+struct cpufreq_frequency_table loongson1_clockmod_table[] = {
+	{DC_RESV, CPUFREQ_ENTRY_INVALID},
+	{DC_ZERO, CPUFREQ_ENTRY_INVALID},
+	{DC_25PT, 0},
+	{DC_37PT, 0},
+	{DC_50PT, 0},
+	{DC_62PT, 0},
+	{DC_75PT, 0},
+	{DC_87PT, 0},
+	{DC_DISABLE, 0},
+	{DC_RESV, CPUFREQ_TABLE_END},
+};
+EXPORT_SYMBOL_GPL(loongson1_clockmod_table);
+
+struct clk *clk_get(struct device *dev, const char *name)
+{
+	struct clk *c;
+	struct clk *ret = NULL;
+
+	mutex_lock(&clocks_mutex);
+	list_for_each_entry(c, &clocks, node) {
+		if (!strcmp(c->name, name)) {
+			ret = c;
+			break;
+		}
+	}
+	mutex_unlock(&clocks_mutex);
+
+	return ret;
+}
+EXPORT_SYMBOL(clk_get);
+
+static void propagate_rate(struct clk *clk)
+{
+	struct clk *clkp;
+
+	list_for_each_entry(clkp, &clocks, node) {
+		if (likely(clkp->parent != clk))
+			continue;
+		if (likely(clkp->ops && clkp->ops->recalc))
+			clkp->ops->recalc(clkp);
+		if (unlikely(clkp->flags & CLK_RATE_PROPAGATES))
+			propagate_rate(clkp);
+	}
+}
+
+int clk_enable(struct clk *clk)
+{
+	return 0;
+}
+EXPORT_SYMBOL(clk_enable);
+
+void clk_disable(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_disable);
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+	return clk->rate;
+}
+EXPORT_SYMBOL(clk_get_rate);
+
+void clk_put(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_put);
+
+int clk_set_rate(struct clk *clk, unsigned long rate)
+{
+	return clk_set_rate_ex(clk, rate, 0);
+}
+EXPORT_SYMBOL_GPL(clk_set_rate);
+
+int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id)
+{
+	int ret = 0;
+	int regval __maybe_unused;
+	int i;
+
+	if (likely(clk->ops && clk->ops->set_rate)) {
+		unsigned long flags;
+
+		spin_lock_irqsave(&clock_lock, flags);
+		ret = clk->ops->set_rate(clk, rate, algo_id);
+		spin_unlock_irqrestore(&clock_lock, flags);
+	}
+
+	if (unlikely(clk->flags & CLK_RATE_PROPAGATES))
+		propagate_rate(clk);
+
+	for (i = 0; loongson1_clockmod_table[i].frequency != CPUFREQ_TABLE_END;
+	     i++) {
+		if (loongson1_clockmod_table[i].frequency ==
+		    CPUFREQ_ENTRY_INVALID)
+			continue;
+		if (rate == loongson1_clockmod_table[i].frequency)
+			break;
+	}
+	if (rate != loongson1_clockmod_table[i].frequency)
+		return -ENOTSUPP;
+
+	clk->rate = rate;
+
+#if defined(CONFIG_LS1B_MACH)
+	regval = __raw_readl(LS1X_CLK_PLL_DIV);
+	regval |= 0x00000300;	//cpu_bypass ç½®1
+	regval &= ~0x0000003;	//cpu_rst ç½®0
+	regval &= ~(0x1f<<20);	//cpu_div æ¸…é›¶
+	regval |= (loongson1_clockmod_table[i].index) << 20;
+	__raw_writel(regval, LS1X_CLK_PLL_DIV);
+	regval &= ~0x00000100;	//cpu_bypass ç½®0
+	__raw_writel(regval, LS1X_CLK_PLL_DIV);
+#elif defined(CONFIG_LS1A_MACH)
+	regval = (ls1x_bus_clock / APB_CLK - 3) << 8;
+	regval |= 0x8888;
+	regval |= (loongson1_clockmod_table[i].index + 2);
+	__raw_writel(regval, LS1X_CLK_PLL_DIV);
+#endif
+
+	return ret;
+}
+EXPORT_SYMBOL_GPL(clk_set_rate_ex);
+
+long clk_round_rate(struct clk *clk, unsigned long rate)
+{
+	if (likely(clk->ops && clk->ops->round_rate)) {
+		unsigned long flags, rounded;
+
+		spin_lock_irqsave(&clock_lock, flags);
+		rounded = clk->ops->round_rate(clk, rate);
+		spin_unlock_irqrestore(&clock_lock, flags);
+
+		return rounded;
+	}
+
+	return rate;
+}
+EXPORT_SYMBOL_GPL(clk_round_rate);
+
+/*
+ * This is the simple version of Loongson-2 wait, Maybe we need do this in
+ * interrupt disabled content
+ */
+
+DEFINE_SPINLOCK(loongson1_wait_lock);
+void loongson1_cpu_wait(void)
+{
+//	u32 cpu_freq;
+	unsigned long flags;
+
+	spin_lock_irqsave(&loongson1_wait_lock, flags);
+//	cpu_freq = LOONGSON_CHIPCFG0;
+//	LOONGSON_CHIPCFG0 &= ~0x7;	/* Put CPU into wait mode */
+//	LOONGSON_CHIPCFG0 = cpu_freq;	/* Restore CPU state */
+	spin_unlock_irqrestore(&loongson1_wait_lock, flags);
+}
+EXPORT_SYMBOL_GPL(loongson1_cpu_wait);
+
+static void pll_clk_init(struct clk *clk)
+{
+	u32 pll;
+
+	pll = __raw_readl(LS1X_CLK_PLL_FREQ);
+#if defined(CONFIG_LS1C_MACH)
+	clk->rate = (((pll >> 8) & 0xff) + ((pll >> 16) & 0xff)) * APB_CLK / 4;
+#else
+	clk->rate = (12 + (pll & 0x3f)) * APB_CLK / 2
+			+ ((pll >> 8) & 0x3ff) * APB_CLK / 1024 / 2;
+#endif
+}
+
+static void cpu_clk_init(struct clk *clk)
+{
+	u32 pll, ctrl;
+
+	pll = clk_get_rate(clk->parent);
+	ctrl = __raw_readl(LS1X_CLK_PLL_DIV);
+#if defined(CONFIG_LS1A_MACH)
+	/* ç”±äºŽç›®å‰�loongson 1A CPUè¯»å�–0xbfe78030 PLLå¯„å­˜å™¨æœ‰é—®é¢˜ï¼Œ
+	   æ‰€ä»¥CPUçš„é¢‘çŽ‡æ˜¯é€šè¿‡PMONä¼ è¿›æ�¥çš„ */
+	clk->rate = cpu_clock_freq;
+#elif defined(CONFIG_LS1B_MACH)
+	clk->rate = pll / ((ctrl & DIV_CPU) >> DIV_CPU_SHIFT);
+#else
+	if (ctrl & DIV_CPU_SEL) {
+		if(ctrl & DIV_CPU_EN) {
+			clk->rate = pll / ((ctrl & DIV_CPU) >> DIV_CPU_SHIFT);
+		} else {
+			clk->rate = pll / 2;
+		}
+	} else {
+		clk->rate = APB_CLK;
+	}
+#endif
+	pr_info("cpuclock=%ldHz\n", clk->rate);
+}
+
+static void ddr_clk_init(struct clk *clk)
+{
+	u32 pll, ctrl;
+
+	pll = clk_get_rate(clk->parent);
+	ctrl = __raw_readl(LS1X_CLK_PLL_DIV);
+#if defined(CONFIG_LS1A_MACH)
+	/* ç”±äºŽç›®å‰�loongson 1A CPUè¯»å�–0xbfe78030 PLLå¯„å­˜å™¨æœ‰é—®é¢˜ï¼Œ
+	   æ‰€ä»¥BUS(DDR)çš„é¢‘çŽ‡æ˜¯é€šè¿‡PMONä¼ è¿›æ�¥çš„ */
+	clk->rate = ls1x_bus_clock;
+#elif defined(CONFIG_LS1B_MACH)
+	clk->rate = pll / ((ctrl & DIV_DDR) >> DIV_DDR_SHIFT);
+#else
+	ctrl = __raw_readl(LS1X_CLK_PLL_FREQ) & 0x3;
+	switch	 (ctrl) {
+		case 0:
+			clk->rate = pll / 2;
+		break;
+		case 1:
+			clk->rate = pll / 4;
+		break;
+		case 2:
+		case 3:
+			clk->rate = pll / 3;
+		break;
+	}
+#endif
+	pr_info("busclock=%ldHz\n", clk->rate);
+}
+
+static void apb_clk_init(struct clk *clk)
+{
+	u32 pll;
+
+	pll = clk_get_rate(clk->parent);
+#if defined(CONFIG_LS1C_MACH)
+	clk->rate = pll;
+#else
+	clk->rate = pll / 2;
+#endif
+}
+
+static void dc_clk_init(struct clk *clk)
+{
+	u32 pll, ctrl;
+
+	pll = clk_get_rate(clk->parent);
+	ctrl = __raw_readl(LS1X_CLK_PLL_DIV) & DIV_DC;
+	clk->rate = pll / (ctrl >> DIV_DC_SHIFT);
+}
+
+static struct clk_ops pll_clk_ops = {
+	.init	= pll_clk_init,
+};
+
+static struct clk_ops cpu_clk_ops = {
+	.init	= cpu_clk_init,
+};
+
+static struct clk_ops ddr_clk_ops = {
+	.init	= ddr_clk_init,
+};
+
+static struct clk_ops apb_clk_ops = {
+	.init	= apb_clk_init,
+};
+
+static struct clk_ops dc_clk_ops = {
+	.init	= dc_clk_init,
+};
+
+static struct clk pll_clk = {
+	.name	= "pll",
+	.ops	= &pll_clk_ops,
+};
+
+static struct clk cpu_clk = {
+	.name	= "cpu",
+	.flags	= CLK_ALWAYS_ENABLED | CLK_RATE_PROPAGATES,
+	.parent = &pll_clk,
+	.ops	= &cpu_clk_ops,
+};
+
+static struct clk ddr_clk = {
+	.name	= "ddr",
+#if defined(CONFIG_LS1C_MACH)
+	.parent = &cpu_clk,
+#else
+	.parent = &pll_clk,
+#endif
+	.ops	= &ddr_clk_ops,
+};
+
+static struct clk apb_clk = {
+	.name	= "apb",
+	.parent = &ddr_clk,
+	.ops	= &apb_clk_ops,
+};
+
+static struct clk dc_clk = {
+	.name	= "dc",
+	.parent = &pll_clk,
+	.ops	= &dc_clk_ops,
+};
+
+int clk_register(struct clk *clk)
+{
+	mutex_lock(&clocks_mutex);
+	list_add(&clk->node, &clocks);
+	if (clk->ops->init)
+		clk->ops->init(clk);
+	mutex_unlock(&clocks_mutex);
+
+	return 0;
+}
+EXPORT_SYMBOL(clk_register);
+
+static struct clk *ls1x_clks[] = {
+	&pll_clk,
+	&cpu_clk,
+	&ddr_clk,
+	&apb_clk,
+	&dc_clk,
+};
+
+int __init ls1x_clock_init(void)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(ls1x_clks); i++)
+		clk_register(ls1x_clks[i]);
+
+	return 0;
+}
+
+void __init plat_time_init(void)
+{
+	struct clk *clk;
+
+	/* Initialize LS1X clocks */
+	ls1x_clock_init();
+
+	/* setup mips r4k timer */
+	clk = clk_get(NULL, "cpu");
+	if (IS_ERR(clk))
+		panic("unable to get dc clock, err=%ld", PTR_ERR(clk));
+
+	mips_hpt_frequency = clk_get_rate(clk) / 2;
+	setup_ls1x_timer();
+}
diff -uNra linux-3.0.82/arch/mips/loongson/ls1x/hpet-time.c linux-3.0.82x/arch/mips/loongson/ls1x/hpet-time.c
--- linux-3.0.82/arch/mips/loongson/ls1x/hpet-time.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/ls1x/hpet-time.c	2017-09-23 03:42:49.382677007 +0800
@@ -0,0 +1,221 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under  the terms of the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the License, or (at your
+ *  option) any later version.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/time.h>
+#include <linux/clockchips.h>
+
+#include <asm/time.h>
+
+#include <ls1b_board.h>
+#include <irq.h>
+//#include <asm/mach-loongson/ls1x/ls1x_time.h>
+
+#define TIMER_CLOCKEVENT 0
+#define TIMER_CLOCKSOURCE 1
+
+#if 0
+#define TIMER_CNTR	0x00
+#define TIMER_HRC	0x04
+#define TIMER_LRC	0x08
+#define TIMER_CTRL	0x0c
+#endif
+
+#define	GEN_CAP_L	0x0
+#define	GEN_CAP_H	0x4
+#define	GEN_CONF	0x10
+#define	GEN_INTN_STATUS	0x20
+#define	GEN_MAIN_COUNT	0xf0
+#define	T0_CONF_CAP	0x100
+#define	T0_COM_VAL	0x108
+#define	T1_CONF_CAP	0x120
+#define	T1_COM_VAL	0x128
+#define	T2_CONF_CAP	0x140
+#define	T2_COM_VAL	0x148
+
+void __iomem *ls1x_timer_base;
+extern unsigned long ls1x_bus_clock;
+static uint32_t ls1x_jiffies_per_tick;
+
+DEFINE_SPINLOCK(ls1x_lock);
+EXPORT_SYMBOL(ls1x_lock);
+
+static cycle_t ls1x_clocksource_read(struct clocksource *cs)
+{
+	unsigned long flags;
+	int count;
+	u32 jifs;
+	static int old_count;
+	static u32 old_jifs;
+
+	spin_lock_irqsave(&ls1x_lock, flags);
+	/*
+	 * Although our caller may have the read side of xtime_lock,
+	 * this is now a seqlock, and we are cheating in this routine
+	 * by having side effects on state that we cannot undo if
+	 * there is a collision on the seqlock and our caller has to
+	 * retry.  (Namely, old_jifs and old_count.)  So we must treat
+	 * jiffies as volatile despite the lock.  We read jiffies
+	 * before latching the timer count to guarantee that although
+	 * the jiffies value might be older than the count (that is,
+	 * the counter may underflow between the last point where
+	 * jiffies was incremented and the point where we latch the
+	 * count), it cannot be newer.
+	 */
+	jifs = jiffies;
+	/* read the count */
+	count = readl(ls1x_timer_base + GEN_MAIN_COUNT);
+
+	/*
+	 * It's possible for count to appear to go the wrong way for this
+	 * reason:
+	 *
+	 *  The timer counter underflows, but we haven't handled the resulting
+	 *  interrupt and incremented jiffies yet.
+	 *
+	 * Previous attempts to handle these cases intelligently were buggy, so
+	 * we just do the simple thing now.
+	 */
+	if (count < old_count && jifs == old_jifs)
+		count = old_count;
+
+	old_count = count;
+	old_jifs = jifs;
+
+	spin_unlock_irqrestore(&ls1x_lock, flags);
+
+	return (cycle_t) (jifs * ls1x_jiffies_per_tick) + count;
+
+//	return readl(ls1x_timer_base + TIMER_CNTR);
+}
+
+static struct clocksource ls1x_clocksource = {
+	.name = "ls1x-timer",
+	.rating = 200,
+	.read = ls1x_clocksource_read,
+//	.mask = CLOCKSOURCE_MASK(24),
+	.mask = CLOCKSOURCE_MASK(32),
+	.flags = CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
+static irqreturn_t ls1x_clockevent_irq(int irq, void *devid)
+{
+	struct clock_event_device *cd = devid;
+
+//	writel(readl(ls1x_timer_base+TIMER_CTRL) | 0x40, ls1x_timer_base + TIMER_CTRL);
+//	if (cd->mode != CLOCK_EVT_MODE_PERIODIC)
+//		writel(readl(ls1x_timer_base+TIMER_CTRL) & 0xfe, ls1x_timer_base + TIMER_CTRL);
+
+	writel(0x00, ls1x_timer_base + GEN_CONF);
+	writel(0x00, ls1x_timer_base + GEN_MAIN_COUNT);
+	writel(0x01, ls1x_timer_base + GEN_CONF);
+
+	cd->event_handler(cd);
+
+	return IRQ_HANDLED;
+}
+
+static void ls1x_clockevent_set_mode(enum clock_event_mode mode,
+	struct clock_event_device *cd)
+{
+	spin_lock(&ls1x_lock);
+	switch (mode) {
+	case CLOCK_EVT_MODE_PERIODIC:
+		writel(0x00, ls1x_timer_base + GEN_CONF);
+		writel(ls1x_jiffies_per_tick, ls1x_timer_base + T0_COM_VAL);
+		writel(0x00, ls1x_timer_base + GEN_MAIN_COUNT);
+		writel(0x01, ls1x_timer_base + GEN_CONF);
+	case CLOCK_EVT_MODE_RESUME:
+		writel(0x01, ls1x_timer_base + GEN_CONF);
+		break;
+	case CLOCK_EVT_MODE_ONESHOT:
+		break;
+	case CLOCK_EVT_MODE_SHUTDOWN:
+		writel(0x00, ls1x_timer_base + GEN_CONF);
+		break;
+	default:
+		break;
+	}
+	spin_unlock(&ls1x_lock);
+}
+
+static int ls1x_clockevent_set_next(unsigned long evt,
+	struct clock_event_device *cd)
+{
+	writel(0x00, ls1x_timer_base + GEN_CONF);
+	writel(evt, ls1x_timer_base + T0_COM_VAL);
+	
+	writel(0x00, ls1x_timer_base + GEN_MAIN_COUNT);
+	writel(0x01, ls1x_timer_base + GEN_CONF);
+
+	return 0;
+}
+
+static struct clock_event_device ls1x_clockevent = {
+	.name = "ls1a-hpet",
+	.features = CLOCK_EVT_FEAT_PERIODIC,	// | CLOCK_EVT_FEAT_ONESHOT,
+	.set_next_event = ls1x_clockevent_set_next,
+	.set_mode = ls1x_clockevent_set_mode,
+	.rating = 200,
+	.irq = LS1A_BOARD_HPET_IRQ,
+};
+
+static struct irqaction timer_irqaction = {
+	.handler	= ls1x_clockevent_irq,
+	.flags		= IRQF_PERCPU | IRQF_TIMER,
+	.name		= "ls1a-hpetirq",
+	.dev_id		= &ls1x_clockevent,
+};
+
+void __init ls1x_timer_init(void)
+{
+	ls1x_timer_base = ioremap(LS1A_HPET_BASE, 0x15f);
+	if (!ls1x_timer_base)
+		panic("Failed to ioremap timer registers");
+}
+
+void __init setup_ls1x_timer(void)
+{
+	int ret;
+	uint32_t clk_rate;
+
+	ls1x_timer_init();
+
+//	clk_rate = ls1x_bus_clock / 2;
+	clk_rate = 47683716;
+	ls1x_jiffies_per_tick = DIV_ROUND_CLOSEST(clk_rate, HZ);
+
+	clockevent_set_clock(&ls1x_clockevent, clk_rate);
+	ls1x_clockevent.min_delta_ns = clockevent_delta2ns(0x4, &ls1x_clockevent);
+	ls1x_clockevent.max_delta_ns = clockevent_delta2ns(0xffff, &ls1x_clockevent);
+	ls1x_clockevent.cpumask = cpumask_of(0);
+
+	clockevents_register_device(&ls1x_clockevent);
+
+	ret = clocksource_register_hz(&ls1x_clocksource, clk_rate);
+
+	if (ret)
+		printk(KERN_ERR "Failed to register clocksource: %d\n", ret);
+
+	setup_irq(LS1A_BOARD_HPET_IRQ, &timer_irqaction);
+
+	writel(0x00, ls1x_timer_base + GEN_CONF);
+	writel(0x00, ls1x_timer_base + GEN_MAIN_COUNT);
+
+	writel(ls1x_jiffies_per_tick, ls1x_timer_base + T0_COM_VAL);
+	writel(0x04, ls1x_timer_base + T0_CONF_CAP);
+	writel(0x00, ls1x_timer_base + T1_CONF_CAP);
+	writel(0x00, ls1x_timer_base + T2_CONF_CAP);
+
+	writel(0x01, ls1x_timer_base + GEN_CONF);
+}
diff -uNra linux-3.0.82/arch/mips/loongson/ls1x/irq.c linux-3.0.82x/arch/mips/loongson/ls1x/irq.c
--- linux-3.0.82/arch/mips/loongson/ls1x/irq.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/ls1x/irq.c	2017-09-23 03:42:49.382677007 +0800
@@ -0,0 +1,188 @@
+/*
+ * Copyright (c) 2012 Tang, Haifeng <tanghaifeng-gz@loongson.cn>
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ */
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <asm/irq_cpu.h>
+
+#include <ls1b_board.h>
+#include <irq.h>
+
+static struct ls1x_intc_regs volatile *ls1x_icregs
+	= (struct ls1x_intc_regs volatile *)(KSEG1ADDR(LS1X_INTREG_BASE));
+
+static int ls1x_irq_set_type(struct irq_data *irq_data, unsigned int flow_type);
+
+static void ls1x_irq_ack(struct irq_data *irq_data)
+{
+	(ls1x_icregs + (irq_data->irq >> 5))->int_clr |= 
+		(1 << (irq_data->irq & 0x1f));
+}
+
+static void ls1x_irq_mask(struct irq_data *irq_data)
+{
+	(ls1x_icregs + (irq_data->irq >> 5))->int_en &= 
+		~(1 << (irq_data->irq & 0x1f));
+}
+
+static void ls1x_irq_mask_ack(struct irq_data *irq_data)
+{
+	(ls1x_icregs + (irq_data->irq >> 5))->int_clr |= 
+		(1 << (irq_data->irq & 0x1f));
+	(ls1x_icregs + (irq_data->irq >> 5))->int_en &= 
+		~(1 << (irq_data->irq & 0x1f));
+}
+
+static void ls1x_irq_unmask(struct irq_data *irq_data)
+{
+
+	(ls1x_icregs + (irq_data->irq >> 5))->int_en |= 
+		(1 << (irq_data->irq & 0x1f));
+}
+/*
+static void ls1x_irq_disable(struct irq_data *irq_data)
+{
+	(ls1x_icregs + (irq_data->irq >> 5))->int_en &= 
+		~(1 << (irq_data->irq & 0x1f));
+}
+
+static void ls1x_irq_enable(struct irq_data *irq_data)
+{
+	(ls1x_icregs + (irq_data->irq >> 5))->int_en |= 
+		(1 << (irq_data->irq & 0x1f));
+}
+*/
+
+static struct irq_chip ls1x_irq_chip = {
+	.name 		= "LS1X-INTC",
+	.irq_ack 	= ls1x_irq_ack,
+	.irq_mask 	= ls1x_irq_mask,
+	.irq_unmask 	= ls1x_irq_unmask,
+	.irq_mask_ack	= ls1x_irq_mask_ack,
+	.irq_set_type 	= ls1x_irq_set_type,
+//	.irq_enable		= ls1x_irq_enable,
+//	.irq_disable	= ls1x_irq_disable,
+};
+
+static int ls1x_irq_set_type(struct irq_data *irq_data, unsigned int flow_type)
+{
+	switch (flow_type) {
+	case IRQ_TYPE_EDGE_RISING:
+		(ls1x_icregs + (irq_data->irq >> 5))->int_pol |= (1 << (irq_data->irq & 0x1f));
+		(ls1x_icregs + (irq_data->irq >> 5))->int_edge |= (1 << (irq_data->irq & 0x1f));
+		break;
+	case IRQ_TYPE_EDGE_FALLING:
+		(ls1x_icregs + (irq_data->irq >> 5))->int_pol &= ~(1 << (irq_data->irq & 0x1f));
+		(ls1x_icregs + (irq_data->irq >> 5))->int_edge |= (1 << (irq_data->irq & 0x1f));
+		break;
+	case IRQ_TYPE_LEVEL_HIGH:
+		(ls1x_icregs + (irq_data->irq >> 5))->int_pol |= (1 << (irq_data->irq & 0x1f));
+		(ls1x_icregs + (irq_data->irq >> 5))->int_edge &= ~(1 << (irq_data->irq & 0x1f));
+		break;
+	case IRQ_TYPE_LEVEL_LOW:
+		(ls1x_icregs + (irq_data->irq >> 5))->int_pol &= ~(1 << (irq_data->irq & 0x1f));
+		(ls1x_icregs + (irq_data->irq >> 5))->int_edge &= ~(1 << (irq_data->irq & 0x1f));
+		break;
+	case IRQ_TYPE_EDGE_BOTH:
+//		printk(KERN_WARNING "No edge_both irq type %d", flow_type);
+		/* Loongson1 ä¸Šå�‡æ²¿å’Œä¸‹é™�æ²¿éƒ½ä¼šè§¦å�‘ï¼Ÿ */
+		(ls1x_icregs + (irq_data->irq >> 5))->int_pol &= ~(1 << (irq_data->irq & 0x1f));
+		(ls1x_icregs + (irq_data->irq >> 5))->int_edge |= (1 << (irq_data->irq & 0x1f));
+		break;
+	case IRQ_TYPE_NONE:
+		printk(KERN_WARNING "No irq type setting!\n");
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static void ls1x_irq_dispatch(int n)
+{
+	u32 intstatus, irq;
+
+	/* Receive interrupt signal, compute the irq */
+	intstatus = (ls1x_icregs+n)->int_isr & (ls1x_icregs+n)->int_en;
+	if (intstatus) {
+		irq = ffs(intstatus);
+		do_IRQ((n<<5) + irq - 1);
+	}
+}
+
+asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+{
+	unsigned int pending;
+
+	pending = read_c0_cause() & read_c0_status() & ST0_IM;
+
+	if (pending & CAUSEF_IP7) {
+		do_IRQ(TIMER_IRQ);
+	}
+	else if (pending & CAUSEF_IP2) {
+		ls1x_irq_dispatch(0);
+	}
+	else if (pending & CAUSEF_IP3) {
+		ls1x_irq_dispatch(1);
+	}
+	else if (pending & CAUSEF_IP4) {
+		ls1x_irq_dispatch(2);
+	}
+	else if (pending & CAUSEF_IP5) {
+		ls1x_irq_dispatch(3);
+	}
+	else if (pending & CAUSEF_IP6) {
+		ls1x_irq_dispatch(4);
+	} else {
+		spurious_interrupt();
+	}
+}
+
+static struct irqaction cascade_irqaction = {
+	.handler = no_action,
+	.name    = "cascade",
+	.flags   = IRQF_NO_THREAD,
+};
+
+void __init arch_init_irq(void)
+{
+	u32 i;
+
+	mips_cpu_irq_init();
+
+	/* Disable interrupts and clear pending,
+	 * setup all IRQs as high level triggered
+	 */
+	for (i=0; i<INTN; i++) {
+		(ls1x_icregs+i)->int_en = 0x0;
+		(ls1x_icregs+i)->int_clr = 0xffffffff;
+		if (i == 2)
+			(ls1x_icregs+i)->int_pol = ~((INT_PCI_INTA)|(INT_PCI_INTB)|(INT_PCI_INTC)|(INT_PCI_INTD));
+		else
+			(ls1x_icregs+i)->int_pol = 0xffffffff;
+		/* set DMA0, DMA1 and DMA2 to edge trigger */
+		if (i == 0)
+			(ls1x_icregs+i)->int_edge = 0x0000e000;
+		else
+			(ls1x_icregs+i)->int_edge = 0x00000000;
+	}
+
+	for (i=0; i<=LS1X_LAST_IRQ; i++) {
+		irq_set_chip_and_handler(i, &ls1x_irq_chip, handle_level_irq);
+	}
+
+	setup_irq(INT0_IRQ, &cascade_irqaction);
+	setup_irq(INT1_IRQ, &cascade_irqaction);
+	setup_irq(INT2_IRQ, &cascade_irqaction);
+	setup_irq(INT3_IRQ, &cascade_irqaction);
+#ifdef CONFIG_LS1A_MACH
+	setup_irq(INT4_IRQ, &cascade_irqaction);
+#endif
+}
+
diff -uNra linux-3.0.82/arch/mips/loongson/ls1x/ls1a-cloud/Makefile linux-3.0.82x/arch/mips/loongson/ls1x/ls1a-cloud/Makefile
--- linux-3.0.82/arch/mips/loongson/ls1x/ls1a-cloud/Makefile	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/ls1x/ls1a-cloud/Makefile	2017-09-23 03:42:49.382677007 +0800
@@ -0,0 +1,4 @@
+#
+#
+
+obj-$(CONFIG_LS1A_CLOUD_TERMIAL) += platform.o
diff -uNra linux-3.0.82/arch/mips/loongson/ls1x/ls1a-cloud/platform.c linux-3.0.82x/arch/mips/loongson/ls1x/ls1a-cloud/platform.c
--- linux-3.0.82/arch/mips/loongson/ls1x/ls1a-cloud/platform.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/ls1x/ls1a-cloud/platform.c	2017-09-23 03:42:49.382677007 +0800
@@ -0,0 +1,1592 @@
+/*
+ * Copyright (c) 2012 Tang, Haifeng <tanghaifeng-gz@loongson.cn>
+ * Platform device support for GS232 SoCs.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/resource.h>
+#include <linux/serial_8250.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/delay.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/flash.h>
+#include <linux/spi/ads7846.h>
+#include <linux/spi/mmc_spi.h>
+#include <linux/spi/spi_gpio.h>
+#include <linux/mmc/host.h>
+#include <linux/phy.h>
+#include <linux/stmmac.h>
+#include <linux/i2c.h>
+#include <linux/i2c/tsc2007.h>
+#include <linux/i2c/ft5x06_ts.h>
+#include <linux/videodev2.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <linux/input/matrix_keypad.h>
+#include <linux/input/74x165_gpio_keys_polled.h>
+#include <linux/rotary_encoder.h>
+#include <linux/ssd1305.h>
+#include <linux/st7920.h>
+#include <linux/clk.h>
+#include <linux/jbt6k74.h>
+#include <linux/leds.h>
+#include <linux/leds_pwm.h>
+#include <linux/ahci_platform.h>
+
+#include <video/ls1xfb.h>
+#include <media/gc0308_platform.h>
+
+#include <ls1b_board.h>
+#include <irq.h>
+#include <spi.h>
+#include <asm/gpio.h>
+#include <asm-generic/sizes.h>
+
+#ifdef CONFIG_MTD_NAND_LS1X
+struct ls1b_nand_platform_data{
+    int enable_arbiter;
+    struct mtd_partition *parts;
+    unsigned int nr_parts;
+};
+
+#define	SZ_100M	(100*1024*1024)
+
+static struct mtd_partition ls1b_nand_partitions[]={
+#if 1
+	[0] = {
+		.name   ="kernel",
+		.offset =MTDPART_OFS_APPEND,
+		.size   =0xe00000,
+//	        .mask_flags =   MTD_WRITEABLE,
+	},
+	[1] = {
+		.name   ="os",
+		.offset = MTDPART_OFS_APPEND,
+		.size   = SZ_100M,
+
+	},
+	[2] = {
+		.name   ="data",
+		.offset = MTDPART_OFS_APPEND,
+		.size   = MTDPART_SIZ_FULL,
+	},
+#else
+    [0] = {
+        .name   ="kernel",
+        .offset =0,
+        .size   =0xe00000,
+//        .mask_flags =   MTD_WRITEABLE,
+    },
+    [1] = {
+        .name   ="os",
+        .offset = 0xe00000,
+        .size   = 0x7100000,
+    
+    },
+#endif
+};
+
+static struct ls1b_nand_platform_data ls1b_nand_parts = {
+	.enable_arbiter =   1,
+	.parts          =   ls1b_nand_partitions,
+	.nr_parts       =   ARRAY_SIZE(ls1b_nand_partitions),
+};
+
+static struct resource ls1b_nand_resources[] = {
+    [0] = {
+        .start      =0,
+        .end        =0,
+        .flags      =IORESOURCE_DMA,    
+    },
+    [1] = {
+        .start      =0x1fe78000,
+        .end        =0x1fe78020,
+        .flags      =IORESOURCE_MEM,
+    },
+    [2] = {
+        .start      =0x1fd01160,
+        .end        =0x1fd01160,
+        .flags      =IORESOURCE_MEM,
+    },
+    [3] = {
+        .start      =LS1B_BOARD_DMA0_IRQ,
+        .end        =LS1B_BOARD_DMA0_IRQ,
+        .flags      =IORESOURCE_IRQ,
+    },
+};
+
+struct platform_device ls1b_nand_device = {
+    .name       ="ls1b-nand",
+    .id         =-1,
+    .dev        ={
+        .platform_data = &ls1b_nand_parts,
+    },
+    .num_resources  =ARRAY_SIZE(ls1b_nand_resources),
+    .resource       =ls1b_nand_resources,
+};
+#endif //CONFIG_MTD_NAND_LS1X
+
+#define LS1X_UART(_id)						\
+	{							\
+		.mapbase	= LS1X_UART ## _id ## _BASE,	\
+		.irq		= LS1X_UART ## _id ## _IRQ,	\
+		.iotype		= UPIO_MEM,			\
+		.flags		= UPF_IOREMAP | UPF_FIXED_TYPE,	\
+		.type		= PORT_16550A,			\
+	}
+
+static struct plat_serial8250_port ls1x_serial8250_port[] = {
+	LS1X_UART(0),
+	LS1X_UART(1),
+	LS1X_UART(2),
+	LS1X_UART(3),
+	{},
+};
+
+struct platform_device ls1x_uart_device = {
+	.name		= "serial8250",
+	.id		= PLAT8250_DEV_PLATFORM,
+	.dev		= {
+		.platform_data = ls1x_serial8250_port,
+	},
+};
+
+void __init ls1x_serial_setup(void)
+{
+	struct clk *clk;
+	struct plat_serial8250_port *p;
+
+	clk = clk_get(NULL, "apb");
+	if (IS_ERR(clk))
+		panic("unable to get apb clock, err=%ld", PTR_ERR(clk));
+
+	for (p = ls1x_serial8250_port; p->flags != 0; ++p)
+		p->uartclk = clk_get_rate(clk);
+}
+
+#if defined(CONFIG_LS1A_MACH)
+#define        LOONGSON_AHCI
+#endif
+
+#ifdef LOONGSON_AHCI
+#define	AHCI_CLOCK_25MHZ	0x34682650
+#define	AHCI_CLOCK_50MHZ	0x30682650
+#define	AHCI_CLOCK_100MHZ	0x38682650
+#define	AHCI_CLOCK_125MHZ	0x38502650
+
+static struct resource ls1a_ahci_resources[] = {
+	[0] = {
+		.start	= 0x1fe30000,
+		.end	= 0x1fe30000+0x1ff,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= LS1A_BOARD_SATA_IRQ,
+		.end	= LS1A_BOARD_SATA_IRQ,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+//static void __iomem *ls1a_ahci_map_table[6];
+
+#if 0
+static struct platform_device ls1a_ahci_device = {
+	.name           = "ls1b-ahci",
+	.id             = -1,
+	.dev = {
+		.platform_data = ls1a_ahci_map_table,
+	},
+	.num_resources  = ARRAY_SIZE(ls1a_ahci_resources),
+	.resource       = ls1a_ahci_resources,
+};
+#else
+static int ls1a_ahci_init(struct device *dev, void __iomem *mmio)
+{
+	/*ls1a adjust sata phy clock added by menghaibo*/
+//	*(volatile int *)0xbfd00424 |= 0x80000000;
+//	*(volatile int *)0xbfd00418  = 0x38682650;
+	*(volatile int *)0xbfd00418  = AHCI_CLOCK_125MHZ;
+	*(volatile int *)0xbfe30000 &= 0x0;
+
+	return 0;
+}
+
+static struct ahci_platform_data ls1a_ahci_pdata = {
+	.init = ls1a_ahci_init,
+};
+
+static u64 ls1a_ahci_dmamask = DMA_BIT_MASK(32);
+static struct platform_device ls1a_ahci_device = {
+	.name           = "ahci",
+	.id             = -1,
+	.dev = {
+		.platform_data 		= &ls1a_ahci_pdata,
+		.dma_mask		= &ls1a_ahci_dmamask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+	},
+	.num_resources  = ARRAY_SIZE(ls1a_ahci_resources),
+	.resource       = ls1a_ahci_resources,
+};
+#endif
+#endif //#ifdef LOONGSON_AHCI
+
+/* OHCI */
+#ifdef CONFIG_USB_OHCI_HCD_LS1X
+static u64 ls1x_ohci_dma_mask = DMA_BIT_MASK(32);
+static struct resource ls1x_ohci_resources[] = {
+	[0] = {
+		.start          = LS1X_OHCI_BASE,
+		.end            = LS1X_OHCI_BASE + SZ_32K - 1,
+		.flags          = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start          = LS1X_OHCI_IRQ,
+		.end            = LS1X_OHCI_IRQ,
+		.flags          = IORESOURCE_IRQ,
+	},
+};
+/*
+static struct ls1x_usbh_data  ls1x_ohci_platform_data={
+#ifdef CONFIG_LS1A_MACH
+	.ports=4,
+#else
+	.ports=1,
+#endif
+};
+*/
+static struct platform_device ls1x_ohci_device = {
+	.name           = "ls1x-ohci",
+	.id             = 0,
+	.dev = {
+//		.platform_data = &ls1x_ohci_platform_data,
+		.dma_mask = &ls1x_ohci_dma_mask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+	},
+	.num_resources  = ARRAY_SIZE(ls1x_ohci_resources),
+	.resource       = ls1x_ohci_resources,
+};
+#endif //#ifdef CONFIG_USB_OHCI_HCD_LS1X
+
+/* EHCI */
+#ifdef CONFIG_USB_EHCI_HCD_LS1X
+static u64 ls1x_ehci_dma_mask = DMA_BIT_MASK(32);
+static struct resource ls1x_ehci_resources[] = { 
+	[0] = {
+		.start          = LS1X_EHCI_BASE,
+		.end            = LS1X_EHCI_BASE + SZ_32K - 1,
+		.flags          = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start          = LS1X_EHCI_IRQ,
+		.end            = LS1X_EHCI_IRQ,
+		.flags          = IORESOURCE_IRQ,
+	},
+};
+/*
+static struct ls1x_usbh_data  ls1x_ehci_platform_data={
+#ifdef CONFIG_LS1A_MACH
+	.ports=4,
+#else
+	.ports=1,
+#endif
+};
+*/
+static struct platform_device ls1x_ehci_device = {
+	.name           = "ls1x-ehci",
+	.id             = 0,
+	.dev = {
+//		.platform_data = &ls1x_ehci_platform_data,
+		.dma_mask = &ls1x_ehci_dma_mask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+	},
+	.num_resources  = ARRAY_SIZE(ls1x_ehci_resources),
+	.resource       = ls1x_ehci_resources,
+};
+#endif //#ifdef CONFIG_USB_EHCI_HCD_LS1X
+
+/*
+* watchdog
+*/
+#ifdef CONFIG_LS1X_WDT
+static struct resource ls1x_wdt_resource[] = {
+	[0]={
+		.start      = LS1X_WDT_BASE,
+		.end        = (LS1X_WDT_BASE + 0x8),
+		.flags      = IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device ls1x_wdt_device = {
+	.name       = "ls1x-wdt",
+	.id         = -1,
+	.num_resources  = ARRAY_SIZE(ls1x_wdt_resource),
+	.resource   = ls1x_wdt_resource,
+};
+#endif //#ifdef CONFIG_LS1X_WDT
+
+/*
+*RTC
+*/
+#ifdef CONFIG_RTC_DRV_LOONGSON1
+static struct platform_device ls1x_rtc_device = {
+	.name       = "ls1x-rtc",
+	.id         = -1,
+};
+#endif //#ifdef CONFIG_RTC_DRV_LOONGSON1
+
+/*
+*I2C
+*/
+/* I2C devices fitted. */
+#ifdef CONFIG_TOUCHSCREEN_TSC2007
+#define TSC2007_GPIO_IRQ	60
+static int ts_get_pendown_state(void)
+{
+	return !gpio_get_value(TSC2007_GPIO_IRQ);
+}
+
+int ts_init(void)
+{
+	gpio_request(TSC2007_GPIO_IRQ, "tsc2007 gpio irq");
+	gpio_direction_input(TSC2007_GPIO_IRQ);
+	return 0;
+}
+
+static struct tsc2007_platform_data tsc2007_info = {
+	.model				= 2007,
+	.x_plate_ohms		= 180,
+	.get_pendown_state	= ts_get_pendown_state,
+	.init_platform_hw	= ts_init,
+};
+#endif //#ifdef CONFIG_TOUCHSCREEN_TSC2007
+
+#ifdef CONFIG_TOUCHSCREEN_FT5X0X
+#define FT5X0X_GPIO_IRQ		38
+#define FT5X0X_GPIO_WAUP	39
+int ft5x0x_irq_init(void)
+{
+	gpio_request(FT5X0X_GPIO_IRQ, "ft5x0x gpio irq");
+	gpio_direction_input(FT5X0X_GPIO_IRQ);
+	return 0;
+}
+
+int ft5x0x_wake_up(void)
+{
+	gpio_direction_output(FT5X0X_GPIO_WAUP, 0);
+	msleep(10);
+	gpio_set_value(FT5X0X_GPIO_WAUP, 1);
+	msleep(10);
+	return 0;
+}
+
+static struct ft5x0x_ts_platform_data ft5x0x_info = {
+	.init_platform_hw	= ft5x0x_irq_init,
+	.wake_platform_hw	= ft5x0x_wake_up,
+};
+#endif //#ifdef CONFIG_TOUCHSCREEN_FT5X0X
+
+#ifdef CONFIG_VIDEO_GC0308
+static struct gc0308_platform_data gc0308_plat = {
+	.default_width = 640,
+	.default_height = 480,
+	.pixelformat = V4L2_PIX_FMT_YUYV,
+	.freq = 24000000,
+	.is_mipi = 0,
+};
+#endif //#ifdef CONFIG_VIDEO_GC0308
+
+#ifdef CONFIG_I2C_LS1X
+static struct i2c_board_info __initdata ls1x_i2c0_devs[] = {
+#ifdef CONFIG_TOUCHSCREEN_TSC2007
+	{
+		I2C_BOARD_INFO("tsc2007", 0x48),
+		.irq = LS1X_GPIO_FIRST_IRQ + TSC2007_GPIO_IRQ,
+		.platform_data	= &tsc2007_info,
+	},
+#endif
+#ifdef CONFIG_TOUCHSCREEN_FT5X0X
+	{
+		I2C_BOARD_INFO(FT5X0X_NAME, 0x38),
+		.irq = LS1X_GPIO_FIRST_IRQ + FT5X0X_GPIO_IRQ,
+		.platform_data	= &ft5x0x_info,
+	},
+#endif
+#ifdef CONFIG_VIDEO_GC0308
+	{
+		I2C_BOARD_INFO("GC0308", 0x42 >> 1),
+		.platform_data = &gc0308_plat,
+	},
+#endif
+};
+
+static struct resource ls1x_i2c0_resource[] = {
+	[0]={
+		.start	= LS1X_I2C0_BASE,
+		.end	= LS1X_I2C0_BASE + SZ_16K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device ls1x_i2c0_device = {
+	.name		= "ls1x-i2c",
+	.id			= 0,
+	.num_resources	= ARRAY_SIZE(ls1x_i2c0_resource),
+	.resource	= ls1x_i2c0_resource,
+};
+#endif //#ifdef CONFIG_I2C_LS1X
+
+/*
+ * lcd
+ */
+#if defined(CONFIG_FB_LOONGSON1)
+#include "../video_modes.c"
+#ifdef CONFIG_LS1X_FB0
+static struct resource ls1x_fb0_resource[] = {
+	[0] = {
+		.start = LS1X_DC0_BASE,
+		.end   = LS1X_DC0_BASE + 0x0010 - 1,	/* 1M? */
+		.flags = IORESOURCE_MEM,
+	},
+};
+
+struct ls1xfb_mach_info ls1x_lcd0_info = {
+	.id			= "Graphic lcd",
+	.modes			= video_modes,
+	.num_modes		= ARRAY_SIZE(video_modes),
+	.pix_fmt		= PIX_FMT_RGB565,
+	.active			= 1,
+	.invert_pixclock	= 0,
+	.invert_pixde	= 0,
+};
+
+struct platform_device ls1x_fb0_device = {
+	.name			= "ls1x-fb",
+	.id				= 0,
+	.num_resources	= ARRAY_SIZE(ls1x_fb0_resource),
+	.resource		= ls1x_fb0_resource,
+	.dev			= {
+		.platform_data = &ls1x_lcd0_info,
+	}
+};
+#endif	//#ifdef CONFIG_LS1X_FB0
+
+#ifdef CONFIG_LS1X_FB1
+static struct resource ls1x_fb1_resource[] = {
+	[0] = {
+		.start = LS1X_DC1_BASE,
+		.end   = LS1X_DC1_BASE + 0x0010 - 1,	/* 1M? */
+		.flags = IORESOURCE_MEM,
+	},
+};
+
+struct ls1xfb_mach_info ls1x_lcd1_info = {
+	.id			= "Graphic vga",
+	.modes			= video_modes,
+	.num_modes		= ARRAY_SIZE(video_modes),
+	.pix_fmt		= PIX_FMT_RGB565,
+	.active			= 1,
+	.invert_pixclock	= 0,
+	.invert_pixde	= 0,
+};
+
+struct platform_device ls1x_fb1_device = {
+	.name			= "ls1x-fb",
+	.id				= 1,
+	.num_resources	= ARRAY_SIZE(ls1x_fb1_resource),
+	.resource		= ls1x_fb1_resource,
+	.dev			= {
+		.platform_data = &ls1x_lcd1_info,
+	}
+};
+#endif	//#ifdef CONFIG_LS1X_FB1
+#endif	//#if defined(CONFIG_FB_LOONGSON1)
+
+//gmac
+#ifdef CONFIG_STMMAC_ETH
+void __init ls1x_gmac_setup(void)
+{
+#ifdef CONFIG_LS1X_GMAC0
+{
+	u32 x;
+	x = __raw_readl(LS1X_MUX_CTRL0);
+	#if defined(CONFIG_LS1X_GMAC0_100M)
+	x = x | GMAC0_USE_TXCLK | GMAC0_USE_PWM01;
+	#elif defined(CONFIG_LS1X_GMAC0_1000M)
+	x = x & (~GMAC0_USE_TXCLK) & (~GMAC0_USE_PWM01);
+	#endif
+	__raw_writel(x & (~GMAC0_SHUT), LS1X_MUX_CTRL0);
+}
+#endif
+#ifdef CONFIG_LS1X_GMAC1
+{
+	u32 x;
+	x = __raw_readl(LS1X_MUX_CTRL0);
+	x = x | GMAC1_USE_UART1 | GMAC1_USE_UART0;	/* å¤�ç”¨UART0&1 */
+	#if defined(CONFIG_LS1X_GMAC1_100M)
+	x = x | GMAC1_USE_TXCLK | GMAC1_USE_PWM23;
+	#elif defined(CONFIG_LS1X_GMAC1_1000M)
+	x = x & (~GMAC1_USE_TXCLK) & (~GMAC1_USE_PWM23);
+	#endif
+	__raw_writel(x & (~GMAC1_SHUT), LS1X_MUX_CTRL0);
+}
+#endif
+}
+
+#ifdef CONFIG_LS1X_GMAC0
+static struct resource ls1x_mac0_resources[] = {
+	[0] = {
+		.start  = LS1X_GMAC0_BASE,
+		.end    = LS1X_GMAC0_BASE + SZ_8K - 1,
+		.flags  = IORESOURCE_MEM,
+	},
+	[1] = {
+		.name   = "macirq",
+		.start  = LS1X_GMAC0_IRQ,
+		.flags  = IORESOURCE_IRQ,
+	},
+};
+
+static struct plat_stmmacenet_data ls1x_mac0_data = {
+	.bus_id = 0,
+	.pbl = 0,
+	.has_gmac = 1,
+	.enh_desc = 0,
+};
+
+struct platform_device ls1x_gmac0_mac = {
+	.name           = "stmmaceth",
+	.id             = 0,
+	.num_resources  = ARRAY_SIZE(ls1x_mac0_resources),
+	.resource       = ls1x_mac0_resources,
+	.dev            = {
+		.platform_data = &ls1x_mac0_data,
+	},
+};
+
+static struct plat_stmmacphy_data  phy0_private_data = {
+	.bus_id = 0,
+#ifdef CONFIG_RTL8305SC
+	.phy_addr = 4,
+#else
+	.phy_addr = 0,
+#endif
+	.phy_mask = 0,
+	.interface = PHY_INTERFACE_MODE_MII,
+	
+};
+
+struct platform_device ls1x_gmac0_phy = {
+	.name = "stmmacphy",
+	.id = 0,
+	.num_resources = 1,
+	.resource = (struct resource[]){
+		{
+			.name = "phyirq",
+			.start = PHY_POLL,
+			.end = PHY_POLL,
+			.flags = IORESOURCE_IRQ,
+		},
+	},
+	.dev = {
+		.platform_data = &phy0_private_data,
+	},
+};
+#endif //#ifdef CONFIG_LS1X_GMAC0
+
+#ifdef CONFIG_LS1X_GMAC1
+static struct resource ls1x_mac1_resources[] = {
+	[0] = {
+		.start  = LS1X_GMAC1_BASE,
+		.end    = LS1X_GMAC1_BASE + SZ_8K - 1,
+		.flags  = IORESOURCE_MEM,
+	},
+	[1] = {
+		.name   = "macirq",
+		.start  = LS1X_GMAC1_IRQ,
+		.flags  = IORESOURCE_IRQ,
+	},
+};
+
+static struct plat_stmmacenet_data ls1x_mac1_data = {
+	.bus_id = 1,
+	.pbl = 0,
+	.has_gmac = 1,
+	.enh_desc = 0,
+};
+
+struct platform_device ls1x_gmac1_mac = {
+	.name           = "stmmaceth",
+	.id             = 1,
+	.num_resources  = ARRAY_SIZE(ls1x_mac1_resources),
+	.resource       = ls1x_mac1_resources,
+	.dev            = {
+		.platform_data = &ls1x_mac1_data,
+	},
+};
+
+static struct plat_stmmacphy_data  phy1_private_data = {
+	.bus_id = 1,
+	.phy_addr = 1,
+	.phy_mask = 0,
+	.interface = PHY_INTERFACE_MODE_MII,
+	
+};
+
+struct platform_device ls1x_gmac1_phy = {
+	.name = "stmmacphy",
+	.id = 1,
+	.num_resources = 1,
+	.resource = (struct resource[]){
+		{
+			.name = "phyirq",
+			.start = PHY_POLL,
+			.end = PHY_POLL,
+			.flags = IORESOURCE_IRQ,
+		},
+	},
+	.dev = {
+		.platform_data = &phy1_private_data,
+	},
+};
+#endif //#ifdef CONFIG_LS1X_GMAC1
+#endif //#ifdef CONFIG_STMMAC_ETH
+
+#ifdef CONFIG_SOUND_LS1X_AC97
+static struct resource ls1x_ac97_resource[] = {
+	[0]={
+		.start	= LS1X_AC97_BASE,
+		.end	= LS1X_AC97_BASE + SZ_16K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device ls1x_audio_device = {
+	.name           = "ls1x-audio",
+	.id             = -1,
+	.num_resources	= ARRAY_SIZE(ls1x_ac97_resource),
+	.resource		= ls1x_ac97_resource,
+};
+#endif
+
+#ifdef CONFIG_MTD_M25P80
+static struct mtd_partition partitions[] = {
+/*
+	//W25Q128 16MB SPI Flash
+	[0] = {
+		.name		= "pmon",
+		.offset		= 0,
+		.size		= 512 * 1024,	//512KB
+	}, 
+	[1] = {
+		.name		= "kernel",	
+		.offset		= 512 * 1024,
+		.size		= (512+7*1024)*1024,	//7.5MB
+	},
+	[2] = {
+		.name		= "fs",
+		.offset		= 8*1024*1024,
+		.size		= 8*1024*1024, //MTDPART_SIZ_FULL
+	},
+*/
+	[0] = {
+		.name		= "pmon",
+		.offset		= 0,
+		.size		= 512 * 1024,	//512KB
+	//	.mask_flags	= MTD_WRITEABLE,
+	},
+};
+
+static struct flash_platform_data flash = {
+	.name		= "LS1A_NOR_Flash",
+	.parts		= partitions,
+	.nr_parts	= ARRAY_SIZE(partitions),
+	.type		= "w25x40",
+};
+#endif /* CONFIG_MTD_M25P80 */
+
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+/* å¼€å�‘æ�¿ä½¿ç”¨GPIO40(CAN1_RX)å¼•è„šä½œä¸ºMMC/SDå�¡çš„æ�’æ‹”æŽ¢æµ‹å¼•è„š */
+#define DETECT_GPIO  69
+#if 1
+/* è½®è¯¢æ–¹å¼�æŽ¢æµ‹cardçš„æ�’æ‹” */
+static int mmc_spi_get_cd(struct device *dev)
+{
+	return !gpio_get_value(DETECT_GPIO);
+}
+#else
+#define MMC_SPI_CARD_DETECT_INT  (LS1X_GPIO_FIRST_IRQ + DETECT_GPIO)
+/* ä¸­æ–­æ–¹å¼�æ–¹å¼�æŽ¢æµ‹cardçš„æ�’æ‹” */
+static int ls1b_mmc_spi_init(struct device *dev,
+	irqreturn_t (*detect_int)(int, void *), void *data)
+{
+	return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
+		IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
+}
+/* é‡Šæ”¾ä¸­æ–­ */
+static void ls1b_mmc_spi_exit(struct device *dev, void *data)
+{
+	free_irq(MMC_SPI_CARD_DETECT_INT, data);
+}
+#endif
+
+static struct mmc_spi_platform_data mmc_spi = {
+	/* ä¸­æ–­æ–¹å¼�æ–¹å¼�æŽ¢æµ‹cardçš„æ�’æ‹” */
+//	.init = ls1b_mmc_spi_init,
+//	.exit = ls1b_mmc_spi_exit,
+//	.detect_delay = 1200,	/* msecs */
+	/* è½®è¯¢æ–¹å¼�æ–¹å¼�æŽ¢æµ‹cardçš„æ�’æ‹” */
+	.get_cd = mmc_spi_get_cd,
+	.caps = MMC_CAP_NEEDS_POLL,
+};	
+#endif  /* defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) */
+
+#ifdef CONFIG_TOUCHSCREEN_ADS7846
+#define ADS7846_GPIO_IRQ 60 /* å¼€å�‘æ�¿è§¦æ‘¸å±�ä½¿ç”¨çš„å¤–éƒ¨ä¸­æ–­ */
+int ads7846_pendown_state(void)
+{
+	return !gpio_get_value(ADS7846_GPIO_IRQ);
+}
+
+static void ads7846_detect_penirq(void)
+{
+	/* GPIOè¾“å…¥ä½¿èƒ½ */
+	gpio_request(ADS7846_GPIO_IRQ, "ads7846 gpio irq");
+	gpio_direction_input(ADS7846_GPIO_IRQ);
+	/* SPI0 CS1ç‰‡é€‰ */
+	__raw_writel(__raw_readl(LS1X_MUX_CTRL0) | SPI0_USE_CAN0_TX, LS1X_MUX_CTRL0);
+}
+	
+static struct ads7846_platform_data ads_info = {
+	.model				= 7846,
+	.vref_delay_usecs	= 1,
+	.keep_vref_on		= 0,
+	.settle_delay_usecs	= 10,
+//	.x_plate_ohms		= 800,
+	.pressure_min		= 0,
+	.pressure_max		= 1024,
+	.debounce_rep		= 3,
+	.debounce_max		= 10,
+	.debounce_tol		= 50,
+	.get_pendown_state	= ads7846_pendown_state,
+	.filter_init		= NULL,
+	.filter 			= NULL,
+	.filter_cleanup 	= NULL,
+};
+#endif /* TOUCHSCREEN_ADS7846 */
+
+#ifdef CONFIG_LCD_JBT6K74
+/* JBT6k74 display controller */
+static void gta02_jbt6k74_probe_completed(struct device *dev)
+{
+//	pcf50633_bl_set_brightness_limit(gta02_pcf, 0x3f);
+}
+
+const struct jbt6k74_platform_data jbt6k74_pdata = {
+//	.gpio_reset = 41,
+};
+#endif
+
+#ifdef CONFIG_LS1B_SPI0
+static struct spi_board_info ls1b_spi0_devices[] = {
+#ifdef CONFIG_MTD_M25P80
+	{	/* DataFlash chip */
+		.modalias	= "w25q64",		//"m25p80",
+		.bus_num 		= 0,
+		.chip_select	= SPI0_CS0,
+		.max_speed_hz	= 80000000,
+		.platform_data	= &flash,
+	},
+#endif
+#ifdef CONFIG_TOUCHSCREEN_ADS7846
+	{
+		.modalias = "ads7846",
+		.platform_data = &ads_info,
+		.bus_num 		= 0,
+		.chip_select 	= SPI0_CS1,
+		.max_speed_hz 	= 2500000,
+		.mode 			= SPI_MODE_1,
+		.irq			= LS1X_GPIO_FIRST_IRQ + ADS7846_GPIO_IRQ,
+	},
+#endif
+};
+	
+static struct resource ls1b_spi0_resource[] = {
+	[0]={
+		.start	= LS1B_BOARD_SPI0_BASE,
+		.end	= (LS1B_BOARD_SPI0_BASE + 0x6),
+		.flags	= IORESOURCE_MEM,
+	},
+	[1]={
+		.start	= LS1B_BOARD_SPI0_IRQ,
+		.end	= LS1B_BOARD_SPI0_IRQ,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct ls1b_spi_info ls1b_spi0_platdata = {
+	.board_size = ARRAY_SIZE(ls1b_spi0_devices),
+	.board_info = ls1b_spi0_devices,
+	.bus_num	= 0,
+	.num_cs		= SPI0_CS3 + 1,
+};
+
+static struct platform_device ls1b_spi0_device = {
+	.name		= "ls1b-spi",
+	.id 		= 0,
+	.num_resources	= ARRAY_SIZE(ls1b_spi0_resource),
+	.resource	= ls1b_spi0_resource,
+	.dev		= {
+		.platform_data	= &ls1b_spi0_platdata,//&ls1b_spi_devices,
+	},
+};
+#endif //#ifdef CONFIG_LS1B_SPI0
+
+#ifdef CONFIG_LS1B_SPI1 /* SPI1 æŽ§åˆ¶å™¨ */
+static struct spi_board_info ls1b_spi1_devices[] = {
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+	{	/* mmc/sd card */
+		.modalias		= "mmc_spi",		//mmc spi,
+		.bus_num 		= 1,
+		.chip_select	= SPI1_CS0,
+		.max_speed_hz	= 25000000,
+		.platform_data	= &mmc_spi,
+	},
+#endif
+
+#if defined(CONFIG_EASY_DAB_AUDIO)
+	{	
+		.modalias		= "easy_dab",
+		.bus_num 		= 1,
+		.chip_select	= SPI1_CS1,
+		.max_speed_hz	= 10000000,
+	},
+#endif
+};
+
+static struct resource ls1b_spi1_resource[] = {
+	[0]={
+		.start	= LS1B_BOARD_SPI1_BASE,
+		.end	= (LS1B_BOARD_SPI1_BASE + 0x6),
+		.flags	= IORESOURCE_MEM,
+	},
+	[1]={
+		.start	= LS1B_BOARD_SPI1_IRQ,
+		.end	= LS1B_BOARD_SPI1_IRQ,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct ls1b_spi_info ls1b_spi1_platdata = {
+	.board_size = ARRAY_SIZE(ls1b_spi1_devices),
+	.board_info = ls1b_spi1_devices,
+	.bus_num	= 1,
+	.num_cs		= 3,
+};
+
+static struct platform_device ls1b_spi1_device = {
+	.name		= "ls1b-spi",
+	.id 		= 1,
+	.num_resources	= ARRAY_SIZE(ls1b_spi1_resource),
+	.resource	= ls1b_spi1_resource,
+	.dev		= {
+		.platform_data	= &ls1b_spi1_platdata,//&ls1b_spi_devices,
+	},
+};
+#endif	//#ifdef CONFIG_LS1B_SPI1
+
+#ifdef CONFIG_SPI_GPIO
+struct spi_gpio_platform_data spigpio_platform_data = {
+	.sck = 40,	/*gpio40*/
+	.mosi = 42,	/*gpio42*/
+	.miso = 41,	/*gpio41*/
+	.num_chipselect = 3,
+};
+
+static struct platform_device spigpio_device = {
+	.name = "spi_gpio",
+	.id   = 2,	/* ç”¨äºŽåŒºåˆ†spi0å’Œspi1 */
+	.dev = {
+		.platform_data = &spigpio_platform_data,
+	},
+};
+
+static struct spi_board_info spi_gpio_devices[] = {
+#ifdef CONFIG_MTD_M25P80
+	{	/* DataFlash chip */
+		.modalias	= "w25q64",		//"m25p80",
+		.bus_num 		= 2,	/* å¯¹åº”spigpio_deviceçš„.id=2 */
+		.controller_data = (void *)43,	/*gpio43*/
+		.chip_select	= 0,
+		.max_speed_hz	= 80000000,
+		.platform_data	= &flash,
+	},
+#endif
+#ifdef CONFIG_TOUCHSCREEN_ADS7846
+	{
+		.modalias = "ads7846",
+		.platform_data = &ads_info,
+		.bus_num 		= 2,	/* å¯¹åº”spigpio_deviceçš„.id=2 */
+		.controller_data = (void *)67,	/*gpio67*/
+		.chip_select 	= 1,
+		.max_speed_hz 	= 2500000,
+		.mode 			= SPI_MODE_1,
+		.irq			= LS1X_GPIO_FIRST_IRQ + ADS7846_GPIO_IRQ,
+	},
+#endif
+#ifdef CONFIG_LCD_JBT6K74
+	{
+		.modalias	= "jbt6k74",
+		.platform_data	= &jbt6k74_pdata,
+		.bus_num	= 2,		/* å¯¹åº”spigpio_deviceçš„.id=2 */
+		.controller_data = (void *)43,	/*gpio43*/
+		.chip_select = 2,
+		/* irq */
+		.max_speed_hz	= 100 * 1000,
+	},
+#endif
+};
+#endif //#ifdef CONFIG_SPI_GPIO
+
+/************************************************/	//GPIO && buzzer && button
+#ifdef CONFIG_KEYBOARD_GPIO_POLLED
+static struct gpio_keys_button ls1b_gpio_button[] = {
+	[0] = {
+		.code		= 'A',
+		.gpio	 	= 37,
+		.desc		= "SW1",
+	},
+	[1] = {
+		.code		= 'B',
+		.gpio	 	= 38,
+		.desc		= "SW2",
+	},
+	[2] = {
+		.code		= 'C',
+		.gpio	 	= 39,
+		.desc		= "SW3",
+	},
+	[3] = {
+		.code		= 'D',
+		.gpio	 	= 40,
+		.desc		= "SW4",
+	},
+	[4] = {
+		.code		= 'E',
+		.gpio	 	= 41,
+		.desc		= "SW5",
+	},
+};
+
+static struct gpio_keys_platform_data ls1b_gpio_key_dat = {
+	.buttons 		= ls1b_gpio_button,
+	.nbuttons 		= 5, 
+	.poll_interval	= 200,
+};
+
+static struct platform_device ls1b_gpio_key_device = {
+	.name 	= "gpio-keys-polled",
+	.id	= -1,
+	.dev	= {
+		.platform_data = &ls1b_gpio_key_dat,
+	},
+};
+#endif //#ifdef CONFIG_KEYBOARD_GPIO_POLLED
+
+#ifdef CONFIG_LS1B_BUZZER
+static struct gpio_keys_button ls1b_gpio_buzzer[] = {
+	[0] = {
+		.gpio	= 40,	//57
+		.type	= EV_LED,
+	},	
+/*
+	[1] = {
+		.gpio	= 34,
+	},	
+	[2] = {
+		.gpio	= 35,
+	},	*/
+};
+
+static struct gpio_keys_platform_data ls1b_gpio_buzzer_data = {
+	.buttons	= ls1b_gpio_buzzer,
+	.nbuttons	= 1,
+};
+
+static struct platform_device ls1b_gpio_buzzer_device = {
+	.name	= "buzzer_gpio",
+	.id	= -1,
+	.dev	= {
+		.platform_data = &ls1b_gpio_buzzer_data,
+	},
+};
+#endif //#ifdef CONFIG_LS1B_BUZZER
+
+#ifdef CONFIG_LS1B_PWM_DRIVER
+static struct resource ls1b_pwm0_resource[] = {
+	[0]={
+		.start	= LS1B_PWM0_BASE,
+		.end	= (LS1B_PWM0_BASE + 0x0f),
+		.flags	= IORESOURCE_MEM,
+	},
+	[1]={
+		.start	= LS1B_PWM1_BASE,
+		.end	= (LS1B_PWM1_BASE + 0x0f),
+		.flags	= IORESOURCE_MEM,
+	},
+	[2]={
+		.start	= LS1B_PWM2_BASE,
+		.end	= (LS1B_PWM2_BASE + 0x0f),
+		.flags	= IORESOURCE_MEM,
+	},
+	[3]={
+		.start	= LS1B_PWM3_BASE,
+		.end	= (LS1B_PWM3_BASE + 0x0f),
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device ls1b_pwm_device = {
+	.name	= "ls1b-pwm",
+	.id	= -1,
+	.num_resources	= ARRAY_SIZE(ls1b_pwm0_resource),
+	.resource	= ls1b_pwm0_resource,
+};
+#endif //#ifdef CONFIG_LS1B_PWM_DRIVER
+
+/**
+ * Rotary encoder input device
+ */
+#ifdef CONFIG_INPUT_GPIO_ROTARY_ENCODER
+#define GPIO_ROTARY_A 59
+#define GPIO_ROTARY_B 51
+#define GPIO_KEY_C 53
+
+static struct rotary_encoder_platform_data raumfeld_rotary_encoder_info = {
+	.steps		= 30,
+	.axis		= REL_X,
+	.relative_axis	= 1,
+	.rollover	= false,
+	.gpio_a		= GPIO_ROTARY_A,
+	.gpio_b		= GPIO_ROTARY_B,
+	.gpio_c		= GPIO_KEY_C,
+	.debounce_ms	= 10,
+	.active_low		= 1,
+	.key		= KEY_ENTER,
+	.inverted_a	= 0,
+	.inverted_b	= 0,
+	.half_period	= 1,
+};
+
+static struct platform_device rotary_encoder_device = {
+	.name		= "rotary-encoder",
+	.id		= 0,
+	.dev		= {
+		.platform_data = &raumfeld_rotary_encoder_info,
+	}
+};
+#endif //#ifdef CONFIG_INPUT_GPIO_ROTARY_ENCODER
+
+/* matrix keypad */
+#if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE)
+/*
+static const uint32_t ls1bkbd_keymap[] = {
+	KEY(0, 0, KEY_A),
+	KEY(0, 1, KEY_B),
+	KEY(0, 2, KEY_C),
+	KEY(0, 3, KEY_D),
+
+	KEY(1, 0, KEY_E),
+	KEY(1, 1, KEY_F),
+	KEY(1, 2, KEY_G),
+	KEY(1, 3, KEY_H),
+};
+*/
+static const uint32_t ls1bkbd_keymap[] = {
+	KEY(0, 0, KEY_1),
+	KEY(0, 1, KEY_2),
+	KEY(0, 2, KEY_3),
+	KEY(0, 3, KEY_4),
+
+	KEY(1, 0, KEY_5),
+	KEY(1, 1, KEY_6),
+	KEY(1, 2, KEY_7),
+	KEY(1, 3, KEY_8),
+	
+	KEY(2, 0, KEY_9),
+	KEY(2, 1, KEY_0),
+	KEY(2, 2, KEY_A),
+	KEY(2, 3, KEY_B),
+	
+	KEY(3, 0, KEY_C),
+	KEY(3, 1, KEY_D),
+	KEY(3, 2, KEY_E),
+	KEY(3, 3, KEY_F),
+};
+
+static struct matrix_keymap_data ls1bkbd_keymap_data = {
+	.keymap			= ls1bkbd_keymap,
+	.keymap_size	= ARRAY_SIZE(ls1bkbd_keymap),
+};
+/*
+static const int ls1bkbd_row_gpios[] =
+	{ 30, 28 };
+static const int ls1bkbd_col_gpios[] =
+	{ 29, 58, 50, 52 };
+*/
+static const int ls1bkbd_row_gpios[] =
+	{ 16, 17, 18, 19 };	//gpio 16 17 18 19
+static const int ls1bkbd_col_gpios[] =
+	{ 20, 21, 22, 23 };	//gpio 20 21 22 23
+
+static struct matrix_keypad_platform_data ls1bkbd_pdata = {
+	.keymap_data		= &ls1bkbd_keymap_data,
+	.row_gpios			= ls1bkbd_row_gpios,
+	.col_gpios			= ls1bkbd_col_gpios,
+	.num_row_gpios		= ARRAY_SIZE(ls1bkbd_row_gpios),
+	.num_col_gpios		= ARRAY_SIZE(ls1bkbd_col_gpios),
+	.col_scan_delay_us	= 5,
+	.debounce_ms		= 25,
+	.active_low			= 1,
+	.wakeup				= 1,
+	.no_autorepeat		= 0,
+};
+
+static struct platform_device ls1bkbd_device = {
+	.name	= "matrix-keypad",
+	.id		= -1,
+	.dev	= {
+		.platform_data = &ls1bkbd_pdata,
+	},
+};
+#endif	//#if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE)
+
+#ifdef CONFIG_FB_SSD1305
+static struct ssd1305_platform_data ssd1305_pdata = {
+	.gpio_outpu = REG_GPIO_OUT0,
+	.gpios_res = 17,
+	.gpios_cs = 16,
+	.gpios_dc = 18,
+	.gpios_rd = 20,
+	.gpios_wr = 19,
+	
+	.gpios_d0 = 8,
+	.gpios_d1 = 9,
+	.gpios_d2 = 10,
+	.gpios_d3 = 11,
+	.gpios_d4 = 12,
+	.gpios_d5 = 13,
+	.gpios_d6 = 14,
+	.gpios_d7 = 15,
+	.datas_offset = 8,
+};
+
+struct platform_device ssd1305fb_device = {
+	.name	= "ssd1305fb",
+	.id		= -1,
+	.dev	= {
+		.platform_data = &ssd1305_pdata,
+	},
+};
+#endif //#ifdef CONFIG_FB_SSD1305
+
+#ifdef CONFIG_FB_ST7920
+static struct st7920_platform_data st7920_pdata = {
+	.gpio_outpu = REG_GPIO_OUT0,
+	.gpios_res = 8,
+	.gpios_cs = 11,
+	.gpios_sid = 9,
+	.gpios_sck = 10,
+
+	.datas_offset = 8,
+};
+
+struct platform_device st7920fb_device = {
+	.name	= "st7920fb",
+	.id		= -1,
+	.dev	= {
+		.platform_data = &st7920_pdata,
+	},
+};
+#endif //#ifdef CONFIG_FB_ST7920
+
+#ifdef CONFIG_KEYBOARD_74X165_GPIO_POLLED
+static struct gpio_keys_button gen74x165_gpio_keys_table[] = {
+	{
+		.code		= KEY_0,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_1,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_2,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_3,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_4,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_5,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_6,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_7,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_8,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_9,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_A,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_B,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_C,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_D,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_E,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_F,
+		.active_low	= 1,
+	},
+};
+
+static struct gen_74x165_platform_data gen74x165_gpio_keys_info = {
+	.q7 = 41,
+	.cp = 39,
+	.pl = 38,
+	.debounce_interval = 1,
+	.buttons	= gen74x165_gpio_keys_table,
+	.nbuttons	= ARRAY_SIZE(gen74x165_gpio_keys_table),
+	.poll_interval	= 50, /* default to 50ms */
+};
+
+static struct platform_device gen74x165_gpio_keys_device = {
+	.name		= "gen74x165_gpio-keys-polled",
+	.dev		= {
+		.platform_data	= &gen74x165_gpio_keys_info,
+	},
+};
+#endif //#ifdef CONFIG_KEYBOARD_74X165_GPIO_POLLED
+
+#ifdef CONFIG_LEDS_PWM
+static struct led_pwm ls1x_pwm_leds[] = {
+	{
+		.name		= "ls1x_pwm_led1",
+		.pwm_id		= 2,
+		.max_brightness	= 255,
+		.pwm_period_ns	= 7812500,
+	},
+	{
+		.name		= "ls1x_pwm_led2",
+		.pwm_id		= 3,
+		.max_brightness	= 255,
+		.pwm_period_ns	= 7812500,
+	},
+};
+
+static struct led_pwm_platform_data ls1x_pwm_data = {
+	.num_leds	= ARRAY_SIZE(ls1x_pwm_leds),
+	.leds		= ls1x_pwm_leds,
+};
+
+static struct platform_device ls1x_leds_pwm = {
+	.name	= "leds_pwm",
+	.id		= -1,
+	.dev	= {
+		.platform_data = &ls1x_pwm_data,
+	},
+};
+#endif //#ifdef CONFIG_LEDS_PWM
+
+#ifdef CONFIG_CAN_SJA1000_PLATFORM
+#include <linux/can/platform/sja1000.h>
+#ifdef CONFIG_LS1X_CAN0
+static struct resource ls1x_sja1000_resources_0[] = {
+	{
+		.start   = LS1X_CAN0_BASE,
+		.end     = LS1X_CAN0_BASE + 0x100 - 1,
+		.flags   = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
+	}, {
+		.start   = LS1X_BOARD_CAN0_IRQ,
+		.end     = LS1X_BOARD_CAN0_IRQ,
+		.flags   = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
+	},
+};
+
+static struct sja1000_platform_data ls1x_sja1000_platform_data_0 = {
+//	.osc_freq	= 16000000,
+	.ocr		= OCR_TX1_PULLDOWN | OCR_TX0_PUSHPULL,
+	.cdr		= CDR_CBP,
+};
+
+static struct platform_device ls1x_sja1000_0 = {
+	.name = "sja1000_platform",
+	.id = 0,
+	.dev = {
+		.platform_data = &ls1x_sja1000_platform_data_0,
+	},
+	.resource = ls1x_sja1000_resources_0,
+	.num_resources = ARRAY_SIZE(ls1x_sja1000_resources_0),
+};
+#endif	//#ifdef CONFIG_LS1X_CAN0
+#ifdef CONFIG_LS1X_CAN1
+static struct resource ls1x_sja1000_resources_1[] = {
+	{
+		.start   = LS1X_CAN1_BASE,
+		.end     = LS1X_CAN1_BASE + 0x100 - 1,
+		.flags   = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
+	}, {
+		.start   = LS1X_BOARD_CAN1_IRQ,
+		.end     = LS1X_BOARD_CAN1_IRQ,
+		.flags   = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
+	},
+};
+
+static struct sja1000_platform_data ls1x_sja1000_platform_data_1 = {
+//	.osc_freq	= 16000000,
+	.ocr		= OCR_TX1_PULLDOWN | OCR_TX0_PUSHPULL,
+	.cdr		= CDR_CBP,
+};
+
+static struct platform_device ls1x_sja1000_1 = {
+	.name = "sja1000_platform",
+	.id = 1,
+	.dev = {
+		.platform_data = &ls1x_sja1000_platform_data_1,
+	},
+	.resource = ls1x_sja1000_resources_1,
+	.num_resources = ARRAY_SIZE(ls1x_sja1000_resources_1),
+};
+#endif //#ifdef CONFIG_LS1X_CAN1
+#endif //#ifdef CONFIG_CAN_SJA1000_PLATFORM
+
+
+/***********************************************/
+static struct platform_device *ls1b_platform_devices[] __initdata = {
+	&ls1x_uart_device,
+
+#ifdef CONFIG_LS1X_FB1
+	&ls1x_fb1_device,
+#endif
+#ifdef CONFIG_LS1X_FB0
+	&ls1x_fb0_device,
+#endif
+
+#ifdef CONFIG_MTD_NAND_LS1X
+	&ls1b_nand_device,
+#endif
+
+#ifdef LOONGSON_AHCI
+	&ls1a_ahci_device,
+#endif
+
+#ifdef CONFIG_USB_OHCI_HCD_LS1X
+	&ls1x_ohci_device,
+#endif
+#ifdef CONFIG_USB_EHCI_HCD_LS1X
+	&ls1x_ehci_device,
+#endif
+
+#ifdef CONFIG_STMMAC_ETH
+#ifdef CONFIG_LS1X_GMAC0
+	&ls1x_gmac0_mac,
+	&ls1x_gmac0_phy,
+#endif
+#ifdef CONFIG_LS1X_GMAC1
+	&ls1x_gmac1_mac,
+	&ls1x_gmac1_phy,
+#endif
+#endif
+
+#ifdef CONFIG_LS1X_WDT
+	&ls1x_wdt_device,
+#endif
+
+#ifdef CONFIG_RTC_DRV_LOONGSON1
+	&ls1x_rtc_device,
+#endif
+
+#ifdef CONFIG_I2C_LS1X
+	&ls1x_i2c0_device,
+#endif
+
+#ifdef CONFIG_SOUND_LS1X_AC97
+	&ls1x_audio_device,
+#endif
+
+#ifdef CONFIG_LS1B_SPI0
+	&ls1b_spi0_device,
+#endif
+#ifdef CONFIG_LS1B_SPI1
+	&ls1b_spi1_device,
+#endif
+
+#ifdef CONFIG_SPI_GPIO
+	&spigpio_device,
+#endif
+
+#ifdef CONFIG_KEYBOARD_GPIO_POLLED
+	&ls1b_gpio_key_device,
+#endif
+	
+#ifdef CONFIG_LS1B_BUZZER
+	&ls1b_gpio_buzzer_device,
+#endif
+
+#ifdef CONFIG_LS1B_PWM_DRIVER
+	&ls1b_pwm_device,
+#endif
+
+#ifdef CONFIG_INPUT_GPIO_ROTARY_ENCODER
+	&rotary_encoder_device,
+#endif
+
+#if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE)
+	&ls1bkbd_device,
+#endif
+
+#ifdef CONFIG_FB_SSD1305
+	&ssd1305fb_device,
+#endif
+
+#ifdef CONFIG_FB_ST7920
+	&st7920fb_device,
+#endif
+
+#ifdef CONFIG_KEYBOARD_74X165_GPIO_POLLED
+	&gen74x165_gpio_keys_device,
+#endif
+
+#ifdef CONFIG_LEDS_PWM
+	&ls1x_leds_pwm,
+#endif
+
+#ifdef CONFIG_CAN_SJA1000_PLATFORM
+#ifdef CONFIG_LS1X_CAN0
+	&ls1x_sja1000_0,
+#endif
+#ifdef CONFIG_LS1X_CAN1
+	&ls1x_sja1000_1,
+#endif
+#endif
+
+};
+
+int __init ls1b_platform_init(void)
+{
+	u32 x __maybe_unused;
+
+	ls1x_serial_setup();
+
+#ifdef CONFIG_STMMAC_ETH
+	ls1x_gmac_setup();
+#endif
+
+#ifdef CONFIG_CAN_SJA1000_PLATFORM
+	{
+	#ifdef CONFIG_LS1X_CAN0
+	struct sja1000_platform_data *sja1000_pdata = &ls1x_sja1000_platform_data_0;
+	sja1000_pdata->osc_freq = clk_get_rate(clk);
+	#endif
+	#ifdef CONFIG_LS1X_CAN1
+	sja1000_pdata = &ls1x_sja1000_platform_data_1;
+	sja1000_pdata->osc_freq = clk_get_rate(clk);
+	#endif
+
+#ifdef	CONFIG_LS1A_MACH
+	#ifdef CONFIG_LS1X_CAN0
+	/* CAN0å¤�ç”¨è®¾ç½® */
+//	ls1b_gpio_free(NULL, 66);	/* å¼•è„šè®¾ç½®ä¸ºCANæ¨¡å¼� */
+//	ls1b_gpio_free(NULL, 67);
+	*(volatile int *)0xbfd00420 &= ~(1<<17 | 3<<14 );	/* ä¸ŽI2C3 SPI0å¤�ç”¨ */
+	#endif
+	#ifdef CONFIG_LS1X_CAN1
+	/* CAN1å¤�ç”¨è®¾ç½® */
+//	ls1b_gpio_free(NULL, 68);	/* å¼•è„šè®¾ç½®ä¸ºCANæ¨¡å¼� */
+//	ls1b_gpio_free(NULL, 69);
+	*(volatile int *)0xbfd00420 &= ~(1<<31 | 1<<16 | 3<<12);	/* ä¸ŽNAND I2C2 SPI1å¤�ç”¨ */
+	#endif
+#elif	CONFIG_LS1B_MACH
+	*(volatile int *)0xbfd00424 &= ~(1<<23);	/* ä¸ŽSPI1å¤�ç”¨ */
+	#ifdef CONFIG_LS1X_CAN0
+	/* CAN0å¤�ç”¨è®¾ç½® */
+//	ls1b_gpio_free(NULL, 38);	/* å¼•è„šè®¾ç½®ä¸ºCANæ¨¡å¼� */
+//	ls1b_gpio_free(NULL, 39);
+	*(volatile int *)0xbfd00420 &= ~(1<<24);	/* ä¸ŽI2C1å¤�ç”¨ */
+	*(volatile int *)0xbfd00424 &= ~(1<<4);	/* ä¸ŽUART1_2å¤�ç”¨ */
+	#endif
+	#ifdef CONFIG_LS1X_CAN1
+	/* CAN1å¤�ç”¨è®¾ç½® */
+//	ls1b_gpio_free(NULL, 40);	/* å¼•è„šè®¾ç½®ä¸ºCANæ¨¡å¼� */
+//	ls1b_gpio_free(NULL, 41);
+	*(volatile int *)0xbfd00420 &= ~(1<<25);	/* ä¸ŽI2C2å¤�ç”¨ */
+	*(volatile int *)0xbfd00424 &= ~(1<<5);	/* ä¸ŽUART1_3å¤�ç”¨ */
+	#endif
+#endif
+	}
+#endif	//#ifdef CONFIG_CAN_SJA1000_PLATFORM
+
+#ifdef CONFIG_I2C_LS1X
+	i2c_register_board_info(0, ls1x_i2c0_devs, ARRAY_SIZE(ls1x_i2c0_devs));
+#endif
+
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+	/* è½®è¯¢æ–¹å¼�æˆ–ä¸­æ–­æ–¹å¼�æŽ¢æµ‹cardçš„æ�’æ‹” */
+	gpio_request(DETECT_GPIO, "MMC_SPI GPIO detect");
+	gpio_direction_input(DETECT_GPIO);		/* è¾“å…¥ä½¿èƒ½ */
+#endif
+
+#ifdef CONFIG_TOUCHSCREEN_ADS7846
+	ads7846_detect_penirq();
+#endif
+
+#ifdef CONFIG_LS1B_SPI0
+	/* disable gpio40-43 */
+	__raw_writel(__raw_readl(LS1X_GPIO_CFG1) & ~(SPI0_MASK << SPI0_OFFSET), 
+			LS1X_GPIO_CFG1);
+	x = __raw_readl(LS1X_MUX_CTRL0);
+//	x |= SPI0_USE_CAN0_TX;	/* è§£é™¤CANç‰‡é€‰å¤�ç”¨ */
+//	x |= SPI0_USE_CAN0_RX;	/* è§£é™¤CANç‰‡é€‰å¤�ç”¨ */
+	__raw_writel(x, LS1X_MUX_CTRL0);
+	spi_register_board_info(ls1b_spi0_devices, ARRAY_SIZE(ls1b_spi0_devices));
+#endif
+
+#ifdef CONFIG_LS1B_SPI1
+	/* LS1Açš„SPI1æŽ§åˆ¶å™¨ä¸ŽNANDå¤�ç”¨ï¼Œç¼–ç¨‹éœ€è¦�æ³¨æ„� */
+	__raw_writel(__raw_readl(LS1X_GPIO_CFG1) & ~(SPI1_MASK << SPI1_OFFSET), 
+			LS1X_GPIO_CFG1);	/* disable gpio44-47 */
+//	x = __raw_readl(LS1X_MUX_CTRL0) & ~NAND_D03_USE_SPI1;	/* è§£é™¤NANDå¤�ç”¨ */
+//	x |= SPI1_USE_CAN1_TX;	/* è§£é™¤CANç‰‡é€‰å¤�ç”¨ */
+//	x |= SPI1_USE_CAN1_RX;	/* è§£é™¤CANç‰‡é€‰å¤�ç”¨ */
+//	__raw_writel(x, LS1X_MUX_CTRL0);
+	spi_register_board_info(ls1b_spi1_devices, ARRAY_SIZE(ls1b_spi1_devices));
+#endif
+
+#ifdef CONFIG_SPI_GPIO
+	spi_register_board_info(spi_gpio_devices, ARRAY_SIZE(spi_gpio_devices));
+#endif
+
+	return platform_add_devices(ls1b_platform_devices, ARRAY_SIZE(ls1b_platform_devices));
+}
+
+arch_initcall(ls1b_platform_init);
+
diff -uNra linux-3.0.82/arch/mips/loongson/ls1x/ls1a-core/Makefile linux-3.0.82x/arch/mips/loongson/ls1x/ls1a-core/Makefile
--- linux-3.0.82/arch/mips/loongson/ls1x/ls1a-core/Makefile	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/ls1x/ls1a-core/Makefile	2017-09-23 03:42:49.386676994 +0800
@@ -0,0 +1,4 @@
+#
+#
+
+obj-$(CONFIG_LS1A_CORE_BOARD) += platform.o
diff -uNra linux-3.0.82/arch/mips/loongson/ls1x/ls1a-core/platform.c linux-3.0.82x/arch/mips/loongson/ls1x/ls1a-core/platform.c
--- linux-3.0.82/arch/mips/loongson/ls1x/ls1a-core/platform.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/ls1x/ls1a-core/platform.c	2017-09-23 03:42:49.390676982 +0800
@@ -0,0 +1,1768 @@
+/*
+ * Copyright (c) 2012 Tang, Haifeng <tanghaifeng-gz@loongson.cn>
+ * Platform device support for GS232 SoCs.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/resource.h>
+#include <linux/serial_8250.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/delay.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/flash.h>
+#include <linux/spi/ads7846.h>
+#include <linux/spi/mmc_spi.h>
+#include <linux/spi/spi_gpio.h>
+#include <linux/mmc/host.h>
+#include <linux/phy.h>
+#include <linux/stmmac.h>
+#include <linux/i2c.h>
+#include <linux/i2c/tsc2007.h>
+#include <linux/i2c/ft5x06_ts.h>
+#include <linux/videodev2.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <linux/input/matrix_keypad.h>
+#include <linux/input/74x165_gpio_keys_polled.h>
+#include <linux/rotary_encoder.h>
+#include <linux/ssd1305.h>
+#include <linux/st7920.h>
+#include <linux/clk.h>
+#include <linux/jbt6k74.h>
+#include <linux/leds.h>
+#include <linux/leds_pwm.h>
+#include <linux/ahci_platform.h>
+
+#include <video/ls1xfb.h>
+#include <media/gc0308_platform.h>
+
+#include <ls1b_board.h>
+#include <irq.h>
+#include <spi.h>
+#include <asm/gpio.h>
+#include <asm-generic/sizes.h>
+
+#ifdef CONFIG_MTD_NAND_LS1X
+struct ls1b_nand_platform_data{
+    int enable_arbiter;
+    struct mtd_partition *parts;
+    unsigned int nr_parts;
+};
+
+#define	SZ_100M	(100*1024*1024)
+
+static struct mtd_partition ls1b_nand_partitions[]={
+#if 1
+	[0] = {
+		.name   ="kernel",
+		.offset =MTDPART_OFS_APPEND,
+		.size   =0xe00000,
+//	        .mask_flags =   MTD_WRITEABLE,
+	},
+	[1] = {
+		.name   ="os",
+		.offset = MTDPART_OFS_APPEND,
+		.size   = SZ_100M,
+
+	},
+	[2] = {
+		.name   ="data",
+		.offset = MTDPART_OFS_APPEND,
+		.size   = MTDPART_SIZ_FULL,
+	},
+#else
+    [0] = {
+        .name   ="kernel",
+        .offset =0,
+        .size   =0xe00000,
+//        .mask_flags =   MTD_WRITEABLE,
+    },
+    [1] = {
+        .name   ="os",
+        .offset = 0xe00000,
+        .size   = 0x7100000,
+    
+    },
+#endif
+};
+
+static struct ls1b_nand_platform_data ls1b_nand_parts = {
+	.enable_arbiter =   1,
+	.parts          =   ls1b_nand_partitions,
+	.nr_parts       =   ARRAY_SIZE(ls1b_nand_partitions),
+};
+
+static struct resource ls1b_nand_resources[] = {
+    [0] = {
+        .start      =0,
+        .end        =0,
+        .flags      =IORESOURCE_DMA,    
+    },
+    [1] = {
+        .start      =0x1fe78000,
+        .end        =0x1fe78020,
+        .flags      =IORESOURCE_MEM,
+    },
+    [2] = {
+        .start      =0x1fd01160,
+        .end        =0x1fd01160,
+        .flags      =IORESOURCE_MEM,
+    },
+    [3] = {
+        .start      =LS1B_BOARD_DMA0_IRQ,
+        .end        =LS1B_BOARD_DMA0_IRQ,
+        .flags      =IORESOURCE_IRQ,
+    },
+};
+
+struct platform_device ls1b_nand_device = {
+    .name       ="ls1b-nand",
+    .id         =-1,
+    .dev        ={
+        .platform_data = &ls1b_nand_parts,
+    },
+    .num_resources  =ARRAY_SIZE(ls1b_nand_resources),
+    .resource       =ls1b_nand_resources,
+};
+#endif //CONFIG_MTD_NAND_LS1X
+
+#define LS1X_UART(_id)						\
+	{							\
+		.mapbase	= LS1X_UART ## _id ## _BASE,	\
+		.irq		= LS1X_UART ## _id ## _IRQ,	\
+		.iotype		= UPIO_MEM,			\
+		.flags		= UPF_IOREMAP | UPF_FIXED_TYPE,	\
+		.type		= PORT_16550A,			\
+	}
+
+static struct plat_serial8250_port ls1x_serial8250_port[] = {
+	LS1X_UART(0),
+	LS1X_UART(1),
+	LS1X_UART(2),
+	LS1X_UART(3),
+	{},
+};
+
+struct platform_device ls1x_uart_device = {
+	.name		= "serial8250",
+	.id		= PLAT8250_DEV_PLATFORM,
+	.dev		= {
+		.platform_data = ls1x_serial8250_port,
+	},
+};
+
+void __init ls1x_serial_setup(void)
+{
+	struct clk *clk;
+	struct plat_serial8250_port *p;
+
+	clk = clk_get(NULL, "apb");
+	if (IS_ERR(clk))
+		panic("unable to get apb clock, err=%ld", PTR_ERR(clk));
+
+	for (p = ls1x_serial8250_port; p->flags != 0; ++p)
+		p->uartclk = clk_get_rate(clk);
+}
+
+#if defined(CONFIG_LS1A_MACH)
+#define        LOONGSON_AHCI
+#endif
+
+#ifdef LOONGSON_AHCI
+#define	AHCI_CLOCK_25MHZ	0x34682650
+#define	AHCI_CLOCK_50MHZ	0x30682650
+#define	AHCI_CLOCK_100MHZ	0x38682650
+#define	AHCI_CLOCK_125MHZ	0x38502650
+
+static struct resource ls1a_ahci_resources[] = {
+	[0] = {
+		.start	= 0x1fe30000,
+		.end	= 0x1fe30000+0x1ff,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= LS1A_BOARD_SATA_IRQ,
+		.end	= LS1A_BOARD_SATA_IRQ,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+//static void __iomem *ls1a_ahci_map_table[6];
+
+#if 0
+static struct platform_device ls1a_ahci_device = {
+	.name           = "ls1b-ahci",
+	.id             = -1,
+	.dev = {
+		.platform_data = ls1a_ahci_map_table,
+	},
+	.num_resources  = ARRAY_SIZE(ls1a_ahci_resources),
+	.resource       = ls1a_ahci_resources,
+};
+#else
+static int ls1a_ahci_init(struct device *dev, void __iomem *mmio)
+{
+	/*ls1a adjust sata phy clock added by menghaibo*/
+//	*(volatile int *)0xbfd00424 |= 0x80000000;
+//	*(volatile int *)0xbfd00418  = 0x38682650;
+	*(volatile int *)0xbfd00418  = AHCI_CLOCK_125MHZ;
+	*(volatile int *)0xbfe30000 &= 0x0;
+
+	return 0;
+}
+
+static struct ahci_platform_data ls1a_ahci_pdata = {
+	.init = ls1a_ahci_init,
+};
+
+static u64 ls1a_ahci_dmamask = DMA_BIT_MASK(32);
+static struct platform_device ls1a_ahci_device = {
+	.name           = "ahci",
+	.id             = -1,
+	.dev = {
+		.platform_data 		= &ls1a_ahci_pdata,
+		.dma_mask		= &ls1a_ahci_dmamask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+	},
+	.num_resources  = ARRAY_SIZE(ls1a_ahci_resources),
+	.resource       = ls1a_ahci_resources,
+};
+#endif
+#endif //#ifdef LOONGSON_AHCI
+
+/* OHCI */
+#ifdef CONFIG_USB_OHCI_HCD_LS1X
+static u64 ls1x_ohci_dma_mask = DMA_BIT_MASK(32);
+static struct resource ls1x_ohci_resources[] = {
+	[0] = {
+		.start          = LS1X_OHCI_BASE,
+		.end            = LS1X_OHCI_BASE + SZ_32K - 1,
+		.flags          = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start          = LS1X_OHCI_IRQ,
+		.end            = LS1X_OHCI_IRQ,
+		.flags          = IORESOURCE_IRQ,
+	},
+};
+/*
+static struct ls1x_usbh_data  ls1x_ohci_platform_data={
+#ifdef CONFIG_LS1A_MACH
+	.ports=4,
+#else
+	.ports=1,
+#endif
+};
+*/
+static struct platform_device ls1x_ohci_device = {
+	.name           = "ls1x-ohci",
+	.id             = 0,
+	.dev = {
+//		.platform_data = &ls1x_ohci_platform_data,
+		.dma_mask = &ls1x_ohci_dma_mask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+	},
+	.num_resources  = ARRAY_SIZE(ls1x_ohci_resources),
+	.resource       = ls1x_ohci_resources,
+};
+#endif //#ifdef CONFIG_USB_OHCI_HCD_LS1X
+
+/* EHCI */
+#ifdef CONFIG_USB_EHCI_HCD_LS1X
+static u64 ls1x_ehci_dma_mask = DMA_BIT_MASK(32);
+static struct resource ls1x_ehci_resources[] = { 
+	[0] = {
+		.start          = LS1X_EHCI_BASE,
+		.end            = LS1X_EHCI_BASE + SZ_32K - 1,
+		.flags          = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start          = LS1X_EHCI_IRQ,
+		.end            = LS1X_EHCI_IRQ,
+		.flags          = IORESOURCE_IRQ,
+	},
+};
+/*
+static struct ls1x_usbh_data  ls1x_ehci_platform_data={
+#ifdef CONFIG_LS1A_MACH
+	.ports=4,
+#else
+	.ports=1,
+#endif
+};
+*/
+static struct platform_device ls1x_ehci_device = {
+	.name           = "ls1x-ehci",
+	.id             = 0,
+	.dev = {
+//		.platform_data = &ls1x_ehci_platform_data,
+		.dma_mask = &ls1x_ehci_dma_mask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+	},
+	.num_resources  = ARRAY_SIZE(ls1x_ehci_resources),
+	.resource       = ls1x_ehci_resources,
+};
+#endif //#ifdef CONFIG_USB_EHCI_HCD_LS1X
+
+/*
+* watchdog
+*/
+#ifdef CONFIG_LS1X_WDT
+static struct resource ls1x_wdt_resource[] = {
+	[0]={
+		.start      = LS1X_WDT_BASE,
+		.end        = (LS1X_WDT_BASE + 0x8),
+		.flags      = IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device ls1x_wdt_device = {
+	.name       = "ls1x-wdt",
+	.id         = -1,
+	.num_resources  = ARRAY_SIZE(ls1x_wdt_resource),
+	.resource   = ls1x_wdt_resource,
+};
+#endif //#ifdef CONFIG_LS1X_WDT
+
+/*
+*RTC
+*/
+#ifdef CONFIG_RTC_DRV_LOONGSON1
+static struct platform_device ls1x_rtc_device = {
+	.name       = "ls1x-rtc",
+	.id         = -1,
+};
+#endif //#ifdef CONFIG_RTC_DRV_LOONGSON1
+
+/*
+*I2C
+*/
+/* I2C devices fitted. */
+#ifdef CONFIG_TOUCHSCREEN_TSC2007
+#define TSC2007_GPIO_IRQ	60
+static int ts_get_pendown_state(void)
+{
+	return !gpio_get_value(TSC2007_GPIO_IRQ);
+}
+
+int ts_init(void)
+{
+	gpio_request(TSC2007_GPIO_IRQ, "tsc2007 gpio irq");
+	gpio_direction_input(TSC2007_GPIO_IRQ);
+	return 0;
+}
+
+static struct tsc2007_platform_data tsc2007_info = {
+	.model				= 2007,
+	.x_plate_ohms		= 180,
+	.get_pendown_state	= ts_get_pendown_state,
+	.init_platform_hw	= ts_init,
+};
+#endif //#ifdef CONFIG_TOUCHSCREEN_TSC2007
+
+#ifdef CONFIG_TOUCHSCREEN_FT5X0X
+#define FT5X0X_GPIO_IRQ		38
+#define FT5X0X_GPIO_WAUP	39
+int ft5x0x_irq_init(void)
+{
+	gpio_request(FT5X0X_GPIO_IRQ, "ft5x0x gpio irq");
+	gpio_direction_input(FT5X0X_GPIO_IRQ);
+	return 0;
+}
+
+int ft5x0x_wake_up(void)
+{
+	gpio_direction_output(FT5X0X_GPIO_WAUP, 0);
+	msleep(10);
+	gpio_set_value(FT5X0X_GPIO_WAUP, 1);
+	msleep(10);
+	return 0;
+}
+
+static struct ft5x0x_ts_platform_data ft5x0x_info = {
+	.init_platform_hw	= ft5x0x_irq_init,
+	.wake_platform_hw	= ft5x0x_wake_up,
+};
+#endif //#ifdef CONFIG_TOUCHSCREEN_FT5X0X
+
+#ifdef CONFIG_VIDEO_GC0308
+static struct gc0308_platform_data gc0308_plat = {
+	.default_width = 640,
+	.default_height = 480,
+	.pixelformat = V4L2_PIX_FMT_YUYV,
+	.freq = 24000000,
+	.is_mipi = 0,
+};
+#endif //#ifdef CONFIG_VIDEO_GC0308
+
+#ifdef CONFIG_I2C_LS1X
+static struct i2c_board_info __initdata ls1x_i2c0_devs[] = {
+#ifdef CONFIG_TOUCHSCREEN_TSC2007
+	{
+		I2C_BOARD_INFO("tsc2007", 0x48),
+		.irq = LS1X_GPIO_FIRST_IRQ + TSC2007_GPIO_IRQ,
+		.platform_data	= &tsc2007_info,
+	},
+#endif
+#ifdef CONFIG_TOUCHSCREEN_FT5X0X
+	{
+		I2C_BOARD_INFO(FT5X0X_NAME, 0x38),
+		.irq = LS1X_GPIO_FIRST_IRQ + FT5X0X_GPIO_IRQ,
+		.platform_data	= &ft5x0x_info,
+	},
+#endif
+#ifdef CONFIG_VIDEO_GC0308
+	{
+		I2C_BOARD_INFO("GC0308", 0x42 >> 1),
+		.platform_data = &gc0308_plat,
+	},
+#endif
+};
+
+static struct resource ls1x_i2c0_resource[] = {
+	[0]={
+		.start	= LS1X_I2C0_BASE,
+		.end	= LS1X_I2C0_BASE + SZ_16K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device ls1x_i2c0_device = {
+	.name		= "ls1x-i2c",
+	.id			= 0,
+	.num_resources	= ARRAY_SIZE(ls1x_i2c0_resource),
+	.resource	= ls1x_i2c0_resource,
+};
+#endif //#ifdef CONFIG_I2C_LS1X
+
+/*
+ * lcd
+ */
+#if defined(CONFIG_FB_LOONGSON1)
+#include "../video_modes.c"
+#ifdef CONFIG_LS1X_FB0
+static struct resource ls1x_fb0_resource[] = {
+	[0] = {
+		.start = LS1X_DC0_BASE,
+		.end   = LS1X_DC0_BASE + 0x0010 - 1,	/* 1M? */
+		.flags = IORESOURCE_MEM,
+	},
+};
+
+struct ls1xfb_mach_info ls1x_lcd0_info = {
+	.id			= "Graphic lcd",
+	.modes			= video_modes,
+	.num_modes		= ARRAY_SIZE(video_modes),
+	.pix_fmt		= PIX_FMT_RGB565,
+	.active			= 1,
+	.invert_pixclock	= 0,
+	.invert_pixde	= 0,
+};
+
+struct platform_device ls1x_fb0_device = {
+	.name			= "ls1x-fb",
+	.id				= 0,
+	.num_resources	= ARRAY_SIZE(ls1x_fb0_resource),
+	.resource		= ls1x_fb0_resource,
+	.dev			= {
+		.platform_data = &ls1x_lcd0_info,
+	}
+};
+#endif	//#ifdef CONFIG_LS1X_FB0
+
+#ifdef CONFIG_LS1X_FB1
+static struct resource ls1x_fb1_resource[] = {
+	[0] = {
+		.start = LS1X_DC1_BASE,
+		.end   = LS1X_DC1_BASE + 0x0010 - 1,	/* 1M? */
+		.flags = IORESOURCE_MEM,
+	},
+};
+
+struct ls1xfb_mach_info ls1x_lcd1_info = {
+	.id			= "Graphic vga",
+	.modes			= video_modes,
+	.num_modes		= ARRAY_SIZE(video_modes),
+	.pix_fmt		= PIX_FMT_RGB565,
+	.active			= 1,
+	.invert_pixclock	= 0,
+	.invert_pixde	= 0,
+};
+
+struct platform_device ls1x_fb1_device = {
+	.name			= "ls1x-fb",
+	.id				= 1,
+	.num_resources	= ARRAY_SIZE(ls1x_fb1_resource),
+	.resource		= ls1x_fb1_resource,
+	.dev			= {
+		.platform_data = &ls1x_lcd1_info,
+	}
+};
+#endif	//#ifdef CONFIG_LS1X_FB1
+#endif	//#if defined(CONFIG_FB_LOONGSON1)
+
+#define GPIO_BACKLIGHT_CTRL	59
+#ifdef CONFIG_BACKLIGHT_GENERIC
+#include <linux/backlight.h>
+static void ls1x_bl_set_intensity(int intensity)
+{
+	if (intensity)
+		gpio_direction_output(GPIO_BACKLIGHT_CTRL, 1);
+	else
+		gpio_direction_output(GPIO_BACKLIGHT_CTRL, 0);
+}
+
+static struct generic_bl_info ls1x_bl_info = {
+	.name			= "ls1x-bl",
+	.max_intensity		= 0xff,
+	.default_intensity	= 0xff,
+	.set_bl_intensity	= ls1x_bl_set_intensity,
+};
+
+static struct platform_device ls1x_bl_dev = {
+	.name			= "generic-bl",
+	.id			= 1,
+	.dev = {
+		.platform_data	= &ls1x_bl_info,
+	},
+};
+#endif //#ifdef CONFIG_BACKLIGHT_GENERIC
+
+#ifdef CONFIG_LCD_PLATFORM
+#include <video/platform_lcd.h>
+static void ls1x_lcd_power_set(struct plat_lcd_data *pd,
+				   unsigned int power)
+{
+	if (power)
+		gpio_direction_output(GPIO_BACKLIGHT_CTRL, 1);
+	else
+		gpio_direction_output(GPIO_BACKLIGHT_CTRL, 0);
+}
+
+static struct plat_lcd_data ls1x_lcd_power_data = {
+	.set_power		= ls1x_lcd_power_set,
+};
+
+static struct platform_device ls1x_lcd_powerdev = {
+	.name			= "platform-lcd",
+	.dev.parent		= &ls1x_fb0_device.dev,
+	.dev.platform_data	= &ls1x_lcd_power_data,
+};
+#endif //#ifdef CONFIG_LCD_PLATFORM
+
+#ifdef CONFIG_BACKLIGHT_PWM
+#include <linux/pwm_backlight.h>
+static struct platform_pwm_backlight_data ls1x_backlight_data = {
+	.pwm_id		= 2,
+	.max_brightness	= 255,
+	.dft_brightness	= 100,
+	.pwm_period_ns	= 7812500,
+};
+
+static struct platform_device ls1x_pwm_backlight = {
+	.name = "pwm-backlight",
+	.dev = {
+		.platform_data = &ls1x_backlight_data,
+	},
+};
+#endif //#ifdef CONFIG_BACKLIGHT_PWM
+
+//gmac
+#ifdef CONFIG_STMMAC_ETH
+void __init ls1x_gmac_setup(void)
+{
+#ifdef CONFIG_LS1X_GMAC0
+{
+	u32 x;
+	x = __raw_readl(LS1X_MUX_CTRL0);
+	#if defined(CONFIG_LS1X_GMAC0_100M)
+	x = x | GMAC0_USE_TXCLK | GMAC0_USE_PWM01;
+	#elif defined(CONFIG_LS1X_GMAC0_1000M)
+	x = x & (~GMAC0_USE_TXCLK) & (~GMAC0_USE_PWM01);
+	#endif
+	__raw_writel(x & (~GMAC0_SHUT), LS1X_MUX_CTRL0);
+}
+#endif
+#ifdef CONFIG_LS1X_GMAC1
+{
+	u32 x;
+	x = __raw_readl(LS1X_MUX_CTRL0);
+	x = x | GMAC1_USE_UART1 | GMAC1_USE_UART0;	/* å¤�ç”¨UART0&1 */
+	#if defined(CONFIG_LS1X_GMAC1_100M)
+	x = x | GMAC1_USE_TXCLK | GMAC1_USE_PWM23;
+	#elif defined(CONFIG_LS1X_GMAC1_1000M)
+	x = x & (~GMAC1_USE_TXCLK) & (~GMAC1_USE_PWM23);
+	#endif
+	__raw_writel(x & (~GMAC1_SHUT), LS1X_MUX_CTRL0);
+}
+#endif
+}
+
+#ifdef CONFIG_LS1X_GMAC0
+static struct resource ls1x_mac0_resources[] = {
+	[0] = {
+		.start  = LS1X_GMAC0_BASE,
+		.end    = LS1X_GMAC0_BASE + SZ_8K - 1,
+		.flags  = IORESOURCE_MEM,
+	},
+	[1] = {
+		.name   = "macirq",
+		.start  = LS1X_GMAC0_IRQ,
+		.flags  = IORESOURCE_IRQ,
+	},
+};
+
+static struct plat_stmmacenet_data ls1x_mac0_data = {
+	.bus_id = 0,
+	.pbl = 0,
+	.has_gmac = 1,
+	.enh_desc = 0,
+};
+
+struct platform_device ls1x_gmac0_mac = {
+	.name           = "stmmaceth",
+	.id             = 0,
+	.num_resources  = ARRAY_SIZE(ls1x_mac0_resources),
+	.resource       = ls1x_mac0_resources,
+	.dev            = {
+		.platform_data = &ls1x_mac0_data,
+	},
+};
+
+static struct plat_stmmacphy_data  phy0_private_data = {
+	.bus_id = 0,
+#ifdef CONFIG_RTL8305SC
+	.phy_addr = 4,
+#else
+	.phy_addr = 0,
+#endif
+	.phy_mask = 0,
+	.interface = PHY_INTERFACE_MODE_MII,
+	
+};
+
+struct platform_device ls1x_gmac0_phy = {
+	.name = "stmmacphy",
+	.id = 0,
+	.num_resources = 1,
+	.resource = (struct resource[]){
+		{
+			.name = "phyirq",
+			.start = PHY_POLL,
+			.end = PHY_POLL,
+			.flags = IORESOURCE_IRQ,
+		},
+	},
+	.dev = {
+		.platform_data = &phy0_private_data,
+	},
+};
+#endif //#ifdef CONFIG_LS1X_GMAC0
+
+#ifdef CONFIG_LS1X_GMAC1
+static struct resource ls1x_mac1_resources[] = {
+	[0] = {
+		.start  = LS1X_GMAC1_BASE,
+		.end    = LS1X_GMAC1_BASE + SZ_8K - 1,
+		.flags  = IORESOURCE_MEM,
+	},
+	[1] = {
+		.name   = "macirq",
+		.start  = LS1X_GMAC1_IRQ,
+		.flags  = IORESOURCE_IRQ,
+	},
+};
+
+static struct plat_stmmacenet_data ls1x_mac1_data = {
+	.bus_id = 1,
+	.pbl = 0,
+	.has_gmac = 1,
+	.enh_desc = 0,
+};
+
+struct platform_device ls1x_gmac1_mac = {
+	.name           = "stmmaceth",
+	.id             = 1,
+	.num_resources  = ARRAY_SIZE(ls1x_mac1_resources),
+	.resource       = ls1x_mac1_resources,
+	.dev            = {
+		.platform_data = &ls1x_mac1_data,
+	},
+};
+
+static struct plat_stmmacphy_data  phy1_private_data = {
+	.bus_id = 1,
+	.phy_addr = 1,
+	.phy_mask = 0,
+	.interface = PHY_INTERFACE_MODE_MII,
+	
+};
+
+struct platform_device ls1x_gmac1_phy = {
+	.name = "stmmacphy",
+	.id = 1,
+	.num_resources = 1,
+	.resource = (struct resource[]){
+		{
+			.name = "phyirq",
+			.start = PHY_POLL,
+			.end = PHY_POLL,
+			.flags = IORESOURCE_IRQ,
+		},
+	},
+	.dev = {
+		.platform_data = &phy1_private_data,
+	},
+};
+#endif //#ifdef CONFIG_LS1X_GMAC1
+#endif //#ifdef CONFIG_STMMAC_ETH
+
+
+#ifdef CONFIG_SOUND_LS1X_AC97
+static struct resource ls1x_ac97_resource[] = {
+	[0]={
+		.start	= LS1X_AC97_BASE,
+		.end	= LS1X_AC97_BASE + SZ_16K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device ls1x_audio_device = {
+	.name           = "ls1x-audio",
+	.id             = -1,
+	.num_resources	= ARRAY_SIZE(ls1x_ac97_resource),
+	.resource		= ls1x_ac97_resource,
+};
+#endif
+
+#ifdef CONFIG_MTD_M25P80
+static struct mtd_partition partitions[] = {
+/*
+	//W25Q128 16MB SPI Flash
+	[0] = {
+		.name		= "pmon",
+		.offset		= 0,
+		.size		= 512 * 1024,	//512KB
+	}, 
+	[1] = {
+		.name		= "kernel",	
+		.offset		= 512 * 1024,
+		.size		= (512+7*1024)*1024,	//7.5MB
+	},
+	[2] = {
+		.name		= "fs",
+		.offset		= 8*1024*1024,
+		.size		= 8*1024*1024, //MTDPART_SIZ_FULL
+	},
+*/
+	[0] = {
+		.name		= "pmon",
+		.offset		= 0,
+		.size		= 512 * 1024,	//512KB
+	//	.mask_flags	= MTD_WRITEABLE,
+	},
+};
+
+static struct flash_platform_data flash = {
+	.name		= "LS1A_NOR_Flash",
+	.parts		= partitions,
+	.nr_parts	= ARRAY_SIZE(partitions),
+	.type		= "w25x40",
+};
+#endif /* CONFIG_MTD_M25P80 */
+
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+/* å¼€å�‘æ�¿ä½¿ç”¨GPIO40(CAN1_RX)å¼•è„šä½œä¸ºMMC/SDå�¡çš„æ�’æ‹”æŽ¢æµ‹å¼•è„š */
+#define DETECT_GPIO  69
+#if 1
+/* è½®è¯¢æ–¹å¼�æŽ¢æµ‹cardçš„æ�’æ‹” */
+static int mmc_spi_get_cd(struct device *dev)
+{
+	return !gpio_get_value(DETECT_GPIO);
+}
+#else
+#define MMC_SPI_CARD_DETECT_INT  (LS1X_GPIO_FIRST_IRQ + DETECT_GPIO)
+/* ä¸­æ–­æ–¹å¼�æ–¹å¼�æŽ¢æµ‹cardçš„æ�’æ‹” */
+static int ls1b_mmc_spi_init(struct device *dev,
+	irqreturn_t (*detect_int)(int, void *), void *data)
+{
+	return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
+		IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
+}
+/* é‡Šæ”¾ä¸­æ–­ */
+static void ls1b_mmc_spi_exit(struct device *dev, void *data)
+{
+	free_irq(MMC_SPI_CARD_DETECT_INT, data);
+}
+#endif
+
+static struct mmc_spi_platform_data mmc_spi = {
+	/* ä¸­æ–­æ–¹å¼�æ–¹å¼�æŽ¢æµ‹cardçš„æ�’æ‹” */
+//	.init = ls1b_mmc_spi_init,
+//	.exit = ls1b_mmc_spi_exit,
+//	.detect_delay = 1200,	/* msecs */
+	/* è½®è¯¢æ–¹å¼�æ–¹å¼�æŽ¢æµ‹cardçš„æ�’æ‹” */
+	.get_cd = mmc_spi_get_cd,
+	.caps = MMC_CAP_NEEDS_POLL,
+};	
+#endif  /* defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) */
+
+#ifdef CONFIG_TOUCHSCREEN_ADS7846
+#define ADS7846_GPIO_IRQ 66
+int ads7846_pendown_state(void)
+{
+	return !gpio_get_value(ADS7846_GPIO_IRQ);
+}
+	
+static void ads7846_detect_penirq(void)
+{
+	/* GPIOè¾“å…¥ä½¿èƒ½ */
+	gpio_request(ADS7846_GPIO_IRQ, "ads7846 gpio irq");
+	gpio_direction_input(ADS7846_GPIO_IRQ);
+	/* SPI0 CS1ç‰‡é€‰ */
+	__raw_writel(__raw_readl(LS1X_MUX_CTRL0) | SPI0_USE_CAN0_TX, LS1X_MUX_CTRL0);
+}
+	
+static struct ads7846_platform_data ads_info = {
+	.model				= 7846,
+	.vref_delay_usecs	= 1,
+	.keep_vref_on		= 0,
+	.settle_delay_usecs	= 10,
+//	.x_plate_ohms		= 800,
+	.pressure_min		= 0,
+	.pressure_max		= 1024,
+	.debounce_rep		= 3,
+	.debounce_max		= 10,
+	.debounce_tol		= 50,
+	.get_pendown_state	= ads7846_pendown_state,
+	.filter_init		= NULL,
+	.filter 			= NULL,
+	.filter_cleanup 	= NULL,
+};
+#endif /* TOUCHSCREEN_ADS7846 */
+
+#ifdef CONFIG_LCD_JBT6K74
+/* JBT6k74 display controller */
+static void gta02_jbt6k74_probe_completed(struct device *dev)
+{
+//	pcf50633_bl_set_brightness_limit(gta02_pcf, 0x3f);
+}
+
+const struct jbt6k74_platform_data jbt6k74_pdata = {
+//	.gpio_reset = 41,
+};
+#endif
+
+#ifdef CONFIG_LS1B_SPI0
+static struct spi_board_info ls1b_spi0_devices[] = {
+#ifdef CONFIG_MTD_M25P80
+	{	/* DataFlash chip */
+		.modalias	= "w25q64",		//"m25p80",
+		.bus_num 		= 0,
+		.chip_select	= SPI0_CS0,
+		.max_speed_hz	= 80000000,
+		.platform_data	= &flash,
+	},
+#endif
+#ifdef CONFIG_TOUCHSCREEN_ADS7846
+	{
+		.modalias = "ads7846",
+		.platform_data = &ads_info,
+		.bus_num 		= 0,
+		.chip_select 	= SPI0_CS1,
+		.max_speed_hz 	= 2500000,
+		.mode 			= SPI_MODE_1,
+		.irq			= LS1X_GPIO_FIRST_IRQ + ADS7846_GPIO_IRQ,
+	},
+#endif
+};
+	
+static struct resource ls1b_spi0_resource[] = {
+	[0]={
+		.start	= LS1B_BOARD_SPI0_BASE,
+		.end	= (LS1B_BOARD_SPI0_BASE + 0x6),
+		.flags	= IORESOURCE_MEM,
+	},
+	[1]={
+		.start	= LS1B_BOARD_SPI0_IRQ,
+		.end	= LS1B_BOARD_SPI0_IRQ,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct ls1b_spi_info ls1b_spi0_platdata = {
+	.board_size = ARRAY_SIZE(ls1b_spi0_devices),
+	.board_info = ls1b_spi0_devices,
+	.bus_num	= 0,
+	.num_cs		= SPI0_CS3 + 1,
+};
+
+static struct platform_device ls1b_spi0_device = {
+	.name		= "ls1b-spi",
+	.id 		= 0,
+	.num_resources	= ARRAY_SIZE(ls1b_spi0_resource),
+	.resource	= ls1b_spi0_resource,
+	.dev		= {
+		.platform_data	= &ls1b_spi0_platdata,//&ls1b_spi_devices,
+	},
+};
+#endif //#ifdef CONFIG_LS1B_SPI0
+
+#ifdef CONFIG_LS1B_SPI1 /* SPI1 æŽ§åˆ¶å™¨ */
+static struct spi_board_info ls1b_spi1_devices[] = {
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+	{	/* mmc/sd card */
+		.modalias		= "mmc_spi",		//mmc spi,
+		.bus_num 		= 1,
+		.chip_select	= SPI1_CS0,
+		.max_speed_hz	= 25000000,
+		.platform_data	= &mmc_spi,
+	},
+#endif
+
+#if defined(CONFIG_EASY_DAB_AUDIO)
+	{	
+		.modalias		= "easy_dab",
+		.bus_num 		= 1,
+		.chip_select	= SPI1_CS1,
+		.max_speed_hz	= 10000000,
+	},
+#endif
+};
+
+static struct resource ls1b_spi1_resource[] = {
+	[0]={
+		.start	= LS1B_BOARD_SPI1_BASE,
+		.end	= (LS1B_BOARD_SPI1_BASE + 0x6),
+		.flags	= IORESOURCE_MEM,
+	},
+	[1]={
+		.start	= LS1B_BOARD_SPI1_IRQ,
+		.end	= LS1B_BOARD_SPI1_IRQ,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct ls1b_spi_info ls1b_spi1_platdata = {
+	.board_size = ARRAY_SIZE(ls1b_spi1_devices),
+	.board_info = ls1b_spi1_devices,
+	.bus_num	= 1,
+	.num_cs		= 3,
+};
+
+static struct platform_device ls1b_spi1_device = {
+	.name		= "ls1b-spi",
+	.id 		= 1,
+	.num_resources	= ARRAY_SIZE(ls1b_spi1_resource),
+	.resource	= ls1b_spi1_resource,
+	.dev		= {
+		.platform_data	= &ls1b_spi1_platdata,//&ls1b_spi_devices,
+	},
+};
+#endif	//#ifdef CONFIG_LS1B_SPI1
+
+#ifdef CONFIG_SPI_GPIO
+struct spi_gpio_platform_data spigpio_platform_data = {
+	.sck = 40,	/*gpio40*/
+	.mosi = 42,	/*gpio42*/
+	.miso = 41,	/*gpio41*/
+	.num_chipselect = 3,
+};
+
+static struct platform_device spigpio_device = {
+	.name = "spi_gpio",
+	.id   = 2,	/* ç”¨äºŽåŒºåˆ†spi0å’Œspi1 */
+	.dev = {
+		.platform_data = &spigpio_platform_data,
+	},
+};
+
+static struct spi_board_info spi_gpio_devices[] = {
+#ifdef CONFIG_MTD_M25P80
+	{	/* DataFlash chip */
+		.modalias	= "w25q64",		//"m25p80",
+		.bus_num 		= 2,	/* å¯¹åº”spigpio_deviceçš„.id=2 */
+		.controller_data = (void *)43,	/*gpio43*/
+		.chip_select	= 0,
+		.max_speed_hz	= 80000000,
+		.platform_data	= &flash,
+	},
+#endif
+#ifdef CONFIG_TOUCHSCREEN_ADS7846
+	{
+		.modalias = "ads7846",
+		.platform_data = &ads_info,
+		.bus_num 		= 2,	/* å¯¹åº”spigpio_deviceçš„.id=2 */
+		.controller_data = (void *)67,	/*gpio67*/
+		.chip_select 	= 1,
+		.max_speed_hz 	= 2500000,
+		.mode 			= SPI_MODE_1,
+		.irq			= LS1X_GPIO_FIRST_IRQ + ADS7846_GPIO_IRQ,
+	},
+#endif
+#ifdef CONFIG_LCD_JBT6K74
+	{
+		.modalias	= "jbt6k74",
+		.platform_data	= &jbt6k74_pdata,
+		.bus_num	= 2,		/* å¯¹åº”spigpio_deviceçš„.id=2 */
+		.controller_data = (void *)43,	/*gpio43*/
+		.chip_select = 2,
+		/* irq */
+		.max_speed_hz	= 100 * 1000,
+	},
+#endif
+};
+#endif //#ifdef CONFIG_SPI_GPIO
+
+/************************************************/	//GPIO && buzzer && button
+#ifdef CONFIG_KEYBOARD_GPIO_POLLED
+static struct gpio_keys_button ls1b_gpio_button[] = {
+	[0] = {
+		.code		= 'A',
+		.gpio	 	= 37,
+		.desc		= "SW1",
+	},
+	[1] = {
+		.code		= 'B',
+		.gpio	 	= 38,
+		.desc		= "SW2",
+	},
+	[2] = {
+		.code		= 'C',
+		.gpio	 	= 39,
+		.desc		= "SW3",
+	},
+	[3] = {
+		.code		= 'D',
+		.gpio	 	= 40,
+		.desc		= "SW4",
+	},
+	[4] = {
+		.code		= 'E',
+		.gpio	 	= 41,
+		.desc		= "SW5",
+	},
+};
+
+static struct gpio_keys_platform_data ls1b_gpio_key_dat = {
+	.buttons 		= ls1b_gpio_button,
+	.nbuttons 		= 5, 
+	.poll_interval	= 200,
+};
+
+static struct platform_device ls1b_gpio_key_device = {
+	.name 	= "gpio-keys-polled",
+	.id	= -1,
+	.dev	= {
+		.platform_data = &ls1b_gpio_key_dat,
+	},
+};
+#endif //#ifdef CONFIG_KEYBOARD_GPIO_POLLED
+
+#ifdef CONFIG_LS1B_PWM_DRIVER
+static struct resource ls1b_pwm0_resource[] = {
+	[0]={
+		.start	= LS1B_PWM0_BASE,
+		.end	= (LS1B_PWM0_BASE + 0x0f),
+		.flags	= IORESOURCE_MEM,
+	},
+	[1]={
+		.start	= LS1B_PWM1_BASE,
+		.end	= (LS1B_PWM1_BASE + 0x0f),
+		.flags	= IORESOURCE_MEM,
+	},
+	[2]={
+		.start	= LS1B_PWM2_BASE,
+		.end	= (LS1B_PWM2_BASE + 0x0f),
+		.flags	= IORESOURCE_MEM,
+	},
+	[3]={
+		.start	= LS1B_PWM3_BASE,
+		.end	= (LS1B_PWM3_BASE + 0x0f),
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device ls1b_pwm_device = {
+	.name	= "ls1b-pwm",
+	.id	= -1,
+	.num_resources	= ARRAY_SIZE(ls1b_pwm0_resource),
+	.resource	= ls1b_pwm0_resource,
+};
+#endif //#ifdef CONFIG_LS1B_PWM_DRIVER
+
+/**
+ * Rotary encoder input device
+ */
+#ifdef CONFIG_INPUT_GPIO_ROTARY_ENCODER
+#define GPIO_ROTARY_A 59
+#define GPIO_ROTARY_B 51
+#define GPIO_KEY_C 53
+
+static struct rotary_encoder_platform_data raumfeld_rotary_encoder_info = {
+	.steps		= 30,
+	.axis		= REL_X,
+	.relative_axis	= 1,
+	.rollover	= false,
+	.gpio_a		= GPIO_ROTARY_A,
+	.gpio_b		= GPIO_ROTARY_B,
+	.gpio_c		= GPIO_KEY_C,
+	.debounce_ms	= 10,
+	.active_low		= 1,
+	.key		= KEY_ENTER,
+	.inverted_a	= 0,
+	.inverted_b	= 0,
+	.half_period	= 1,
+};
+
+static struct platform_device rotary_encoder_device = {
+	.name		= "rotary-encoder",
+	.id		= 0,
+	.dev		= {
+		.platform_data = &raumfeld_rotary_encoder_info,
+	}
+};
+#endif //#ifdef CONFIG_INPUT_GPIO_ROTARY_ENCODER
+
+/* matrix keypad */
+#if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE)
+/*
+static const uint32_t ls1bkbd_keymap[] = {
+	KEY(0, 0, KEY_A),
+	KEY(0, 1, KEY_B),
+	KEY(0, 2, KEY_C),
+	KEY(0, 3, KEY_D),
+
+	KEY(1, 0, KEY_E),
+	KEY(1, 1, KEY_F),
+	KEY(1, 2, KEY_G),
+	KEY(1, 3, KEY_H),
+};
+*/
+static const uint32_t ls1bkbd_keymap[] = {
+	KEY(0, 0, KEY_1),
+	KEY(0, 1, KEY_2),
+	KEY(0, 2, KEY_3),
+	KEY(0, 3, KEY_4),
+
+	KEY(1, 0, KEY_5),
+	KEY(1, 1, KEY_6),
+	KEY(1, 2, KEY_7),
+	KEY(1, 3, KEY_8),
+	
+	KEY(2, 0, KEY_9),
+	KEY(2, 1, KEY_0),
+	KEY(2, 2, KEY_A),
+	KEY(2, 3, KEY_B),
+	
+	KEY(3, 0, KEY_C),
+	KEY(3, 1, KEY_D),
+	KEY(3, 2, KEY_E),
+	KEY(3, 3, KEY_F),
+};
+
+static struct matrix_keymap_data ls1bkbd_keymap_data = {
+	.keymap			= ls1bkbd_keymap,
+	.keymap_size	= ARRAY_SIZE(ls1bkbd_keymap),
+};
+/*
+static const int ls1bkbd_row_gpios[] =
+	{ 30, 28 };
+static const int ls1bkbd_col_gpios[] =
+	{ 29, 58, 50, 52 };
+*/
+static const int ls1bkbd_row_gpios[] =
+	{ 16, 17, 18, 19 };	//gpio 16 17 18 19
+static const int ls1bkbd_col_gpios[] =
+	{ 20, 21, 22, 23 };	//gpio 20 21 22 23
+
+static struct matrix_keypad_platform_data ls1bkbd_pdata = {
+	.keymap_data		= &ls1bkbd_keymap_data,
+	.row_gpios			= ls1bkbd_row_gpios,
+	.col_gpios			= ls1bkbd_col_gpios,
+	.num_row_gpios		= ARRAY_SIZE(ls1bkbd_row_gpios),
+	.num_col_gpios		= ARRAY_SIZE(ls1bkbd_col_gpios),
+	.col_scan_delay_us	= 5,
+	.debounce_ms		= 25,
+	.active_low			= 1,
+	.wakeup				= 1,
+	.no_autorepeat		= 0,
+};
+
+static struct platform_device ls1bkbd_device = {
+	.name	= "matrix-keypad",
+	.id		= -1,
+	.dev	= {
+		.platform_data = &ls1bkbd_pdata,
+	},
+};
+#endif	//#if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE)
+
+#ifdef CONFIG_FB_SSD1305
+static struct ssd1305_platform_data ssd1305_pdata = {
+	.gpio_outpu = REG_GPIO_OUT0,
+	.gpios_res = 17,
+	.gpios_cs = 16,
+	.gpios_dc = 18,
+	.gpios_rd = 20,
+	.gpios_wr = 19,
+	
+	.gpios_d0 = 8,
+	.gpios_d1 = 9,
+	.gpios_d2 = 10,
+	.gpios_d3 = 11,
+	.gpios_d4 = 12,
+	.gpios_d5 = 13,
+	.gpios_d6 = 14,
+	.gpios_d7 = 15,
+	.datas_offset = 8,
+};
+
+struct platform_device ssd1305fb_device = {
+	.name	= "ssd1305fb",
+	.id		= -1,
+	.dev	= {
+		.platform_data = &ssd1305_pdata,
+	},
+};
+#endif //#ifdef CONFIG_FB_SSD1305
+
+#ifdef CONFIG_FB_ST7920
+static struct st7920_platform_data st7920_pdata = {
+	.gpio_outpu = REG_GPIO_OUT0,
+	.gpios_res = 8,
+	.gpios_cs = 11,
+	.gpios_sid = 9,
+	.gpios_sck = 10,
+
+	.datas_offset = 8,
+};
+
+struct platform_device st7920fb_device = {
+	.name	= "st7920fb",
+	.id		= -1,
+	.dev	= {
+		.platform_data = &st7920_pdata,
+	},
+};
+#endif //#ifdef CONFIG_FB_ST7920
+
+#ifdef CONFIG_KEYBOARD_74X165_GPIO_POLLED
+static struct gpio_keys_button gen74x165_gpio_keys_table[] = {
+	{
+		.code		= KEY_0,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_1,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_2,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_3,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_4,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_5,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_6,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_7,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_8,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_9,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_A,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_B,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_C,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_D,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_E,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_F,
+		.active_low	= 1,
+	},
+};
+
+static struct gen_74x165_platform_data gen74x165_gpio_keys_info = {
+	.q7 = 41,
+	.cp = 39,
+	.pl = 38,
+	.debounce_interval = 1,
+	.buttons	= gen74x165_gpio_keys_table,
+	.nbuttons	= ARRAY_SIZE(gen74x165_gpio_keys_table),
+	.poll_interval	= 50, /* default to 50ms */
+};
+
+static struct platform_device gen74x165_gpio_keys_device = {
+	.name		= "gen74x165_gpio-keys-polled",
+	.dev		= {
+		.platform_data	= &gen74x165_gpio_keys_info,
+	},
+};
+#endif //#ifdef CONFIG_KEYBOARD_74X165_GPIO_POLLED
+
+#ifdef	CONFIG_SOC_CAMERA_LS1C
+#if 0
+static struct soc_camera_platform_info camera_info = {
+	.format_name = "UYVY",
+	.format_depth = 16,
+	.format = {
+		.code = V4L2_MBUS_FMT_UYVY8_2X8,
+		.colorspace = V4L2_COLORSPACE_SMPTE170M,
+		.field = V4L2_FIELD_NONE,
+		.width = 640,
+		.height = 480,
+	},
+	.bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
+	SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8 |
+	SOCAM_DATA_ACTIVE_HIGH,
+//	.set_capture = camera_set_capture,
+};
+
+static int ls1c_camera_add(struct soc_camera_link *icl, struct device *dev);
+static void ls1c_camera_del(struct soc_camera_link *icl);
+
+static struct soc_camera_link camera_link = {
+	.bus_id		= 0,
+	.add_device	= ls1c_camera_add,
+	.del_device	= ls1c_camera_del,
+	.module_name	= "soc_camera_platform",
+	.priv		= &camera_info,
+};
+
+static struct platform_device *camera_device;
+
+static void ap325rxa_camera_release(struct device *dev)
+{
+	soc_camera_platform_release(&camera_device);
+}
+
+static int ls1c_camera_add(struct soc_camera_link *icl,
+			       struct device *dev)
+{
+	int ret = soc_camera_platform_add(icl, dev, &camera_device, &camera_link,
+					  ls1c_camera_release, 0);
+	if (ret < 0)
+		return ret;
+
+	ret = camera_probe();
+	if (ret < 0)
+		soc_camera_platform_del(icl, camera_device, &camera_link);
+
+	return ret;
+}
+
+static void ls1c_camera_del(struct soc_camera_link *icl)
+{
+	soc_camera_platform_del(icl, camera_device, &camera_link);
+}
+#endif
+
+static struct i2c_board_info gc0308_i2c_camera = {
+	I2C_BOARD_INFO("GC0308", 0x42 >> 1),
+};
+
+static struct soc_camera_link gc0308_link = {
+	.bus_id         = 0,
+	.i2c_adapter_id = 0,
+	.board_info     = &gc0308_i2c_camera,
+//	.power          = ls1c_camera_power,
+//	.reset          = ls1c_camera_reset,
+};
+
+static struct platform_device ls1c_camera = 
+	{
+		.name	= "soc-camera-pdrv",
+		.id	= 0,
+		.dev	= {
+			.platform_data = &gc0308_link,
+		},
+	//}, 
+#if 0
+	{
+		.name	= "soc-camera-pdrv",
+		.id	= 1,
+		.dev	= {
+			.platform_data = &camera_link,
+		},
+	},
+#endif
+};
+
+static struct resource ls1c_camera_resources[] = {
+	{
+		.start   = LS1C_CAMERA_BASE,
+		.end     = LS1C_CAMERA_BASE + 0x38 - 1,
+		.flags   = IORESOURCE_MEM,
+	}, {
+		.start   = LS1C_CAMERA_IRQ,
+		.end     = LS1C_CAMERA_IRQ,
+		.flags   = IORESOURCE_IRQ,
+	},
+};
+
+static struct ls1c_camera_pdata ls1c_camera_platform_data = {
+	.mclk_24MHz = 24000000,
+};
+
+static struct platform_device ls1c_camera_host = {
+	.name	= "ls1c-camera",
+	.id		= 0,
+	.dev	= {
+		.platform_data = &ls1c_camera_platform_data,
+	},
+	.resource		= ls1c_camera_resources,
+	.num_resources	= ARRAY_SIZE(ls1c_camera_resources),
+};
+#endif	//End of CONFIG_SOC_CAMERA_LS1C
+
+#ifdef CONFIG_LEDS_PWM
+static struct led_pwm ls1x_pwm_leds[] = {
+	{
+		.name		= "ls1x_pwm_led1",
+		.pwm_id		= 2,
+		.max_brightness	= 255,
+		.pwm_period_ns	= 7812500,
+	},
+	{
+		.name		= "ls1x_pwm_led2",
+		.pwm_id		= 3,
+		.max_brightness	= 255,
+		.pwm_period_ns	= 7812500,
+	},
+};
+
+static struct led_pwm_platform_data ls1x_pwm_data = {
+	.num_leds	= ARRAY_SIZE(ls1x_pwm_leds),
+	.leds		= ls1x_pwm_leds,
+};
+
+static struct platform_device ls1x_leds_pwm = {
+	.name	= "leds_pwm",
+	.id		= -1,
+	.dev	= {
+		.platform_data = &ls1x_pwm_data,
+	},
+};
+#endif //#ifdef CONFIG_LEDS_PWM
+
+#ifdef CONFIG_CAN_SJA1000_PLATFORM
+#include <linux/can/platform/sja1000.h>
+#ifdef CONFIG_LS1X_CAN0
+static struct resource ls1x_sja1000_resources_0[] = {
+	{
+		.start   = LS1X_CAN0_BASE,
+		.end     = LS1X_CAN0_BASE + 0x100 - 1,
+		.flags   = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
+	}, {
+		.start   = LS1X_BOARD_CAN0_IRQ,
+		.end     = LS1X_BOARD_CAN0_IRQ,
+		.flags   = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
+	},
+};
+
+static struct sja1000_platform_data ls1x_sja1000_platform_data_0 = {
+//	.osc_freq	= 16000000,
+	.ocr		= OCR_TX1_PULLDOWN | OCR_TX0_PUSHPULL,
+	.cdr		= CDR_CBP,
+};
+
+static struct platform_device ls1x_sja1000_0 = {
+	.name = "sja1000_platform",
+	.id = 0,
+	.dev = {
+		.platform_data = &ls1x_sja1000_platform_data_0,
+	},
+	.resource = ls1x_sja1000_resources_0,
+	.num_resources = ARRAY_SIZE(ls1x_sja1000_resources_0),
+};
+#endif	//#ifdef CONFIG_LS1X_CAN0
+#ifdef CONFIG_LS1X_CAN1
+static struct resource ls1x_sja1000_resources_1[] = {
+	{
+		.start   = LS1X_CAN1_BASE,
+		.end     = LS1X_CAN1_BASE + 0x100 - 1,
+		.flags   = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
+	}, {
+		.start   = LS1X_BOARD_CAN1_IRQ,
+		.end     = LS1X_BOARD_CAN1_IRQ,
+		.flags   = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
+	},
+};
+
+static struct sja1000_platform_data ls1x_sja1000_platform_data_1 = {
+//	.osc_freq	= 16000000,
+	.ocr		= OCR_TX1_PULLDOWN | OCR_TX0_PUSHPULL,
+	.cdr		= CDR_CBP,
+};
+
+static struct platform_device ls1x_sja1000_1 = {
+	.name = "sja1000_platform",
+	.id = 1,
+	.dev = {
+		.platform_data = &ls1x_sja1000_platform_data_1,
+	},
+	.resource = ls1x_sja1000_resources_1,
+	.num_resources = ARRAY_SIZE(ls1x_sja1000_resources_1),
+};
+#endif //#ifdef CONFIG_LS1X_CAN1
+#endif //#ifdef CONFIG_CAN_SJA1000_PLATFORM
+
+
+/***********************************************/
+static struct platform_device *ls1b_platform_devices[] __initdata = {
+	&ls1x_uart_device,
+
+#ifdef CONFIG_LS1X_FB1
+	&ls1x_fb1_device,
+#endif
+#ifdef CONFIG_LS1X_FB0
+	&ls1x_fb0_device,
+#endif
+
+#ifdef CONFIG_MTD_NAND_LS1X
+	&ls1b_nand_device,
+#endif
+
+#ifdef LOONGSON_AHCI
+	&ls1a_ahci_device,
+#endif
+
+#ifdef CONFIG_USB_OHCI_HCD_LS1X
+	&ls1x_ohci_device,
+#endif
+#ifdef CONFIG_USB_EHCI_HCD_LS1X
+	&ls1x_ehci_device,
+#endif
+
+#ifdef CONFIG_STMMAC_ETH
+#ifdef CONFIG_LS1X_GMAC0
+	&ls1x_gmac0_mac,
+	&ls1x_gmac0_phy,
+#endif
+#ifdef CONFIG_LS1X_GMAC1
+	&ls1x_gmac1_mac,
+	&ls1x_gmac1_phy,
+#endif
+#endif
+
+#ifdef CONFIG_LS1X_WDT
+	&ls1x_wdt_device,
+#endif
+
+#ifdef CONFIG_RTC_DRV_LOONGSON1
+	&ls1x_rtc_device,
+#endif
+
+#ifdef	CONFIG_SOC_CAMERA_LS1C
+	&ls1c_camera,
+#endif
+
+#ifdef CONFIG_I2C_LS1X
+	&ls1x_i2c0_device,
+#endif
+
+#ifdef	CONFIG_SOC_CAMERA_LS1C
+	&ls1c_camera_host,
+#endif
+
+#ifdef CONFIG_SOUND_LS1X_AC97
+	&ls1x_audio_device,
+#endif
+
+#ifdef CONFIG_LS1B_SPI0
+	&ls1b_spi0_device,
+#endif
+#ifdef CONFIG_LS1B_SPI1
+	&ls1b_spi1_device,
+#endif
+
+#ifdef CONFIG_SPI_GPIO
+	&spigpio_device,
+#endif
+
+#ifdef CONFIG_KEYBOARD_GPIO_POLLED
+	&ls1b_gpio_key_device,
+#endif
+	
+#ifdef CONFIG_LS1B_BUZZER
+	&ls1b_gpio_buzzer_device,
+#endif
+
+#ifdef CONFIG_LS1B_PWM_DRIVER
+	&ls1b_pwm_device,
+#endif
+
+#ifdef CONFIG_INPUT_GPIO_ROTARY_ENCODER
+	&rotary_encoder_device,
+#endif
+
+#if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE)
+	&ls1bkbd_device,
+#endif
+
+#ifdef CONFIG_FB_SSD1305
+	&ssd1305fb_device,
+#endif
+
+#ifdef CONFIG_FB_ST7920
+	&st7920fb_device,
+#endif
+
+#ifdef CONFIG_KEYBOARD_74X165_GPIO_POLLED
+	&gen74x165_gpio_keys_device,
+#endif
+
+#ifdef CONFIG_LEDS_PWM
+	&ls1x_leds_pwm,
+#endif
+
+#ifdef CONFIG_CAN_SJA1000_PLATFORM
+#ifdef CONFIG_LS1X_CAN0
+	&ls1x_sja1000_0,
+#endif
+#ifdef CONFIG_LS1X_CAN1
+	&ls1x_sja1000_1,
+#endif
+#endif
+
+#ifdef CONFIG_BACKLIGHT_GENERIC
+	&ls1x_bl_dev
+#endif
+#ifdef CONFIG_LCD_PLATFORM
+	&ls1x_lcd_powerdev,
+#endif
+#ifdef CONFIG_BACKLIGHT_PWM
+	&ls1x_pwm_backlight,
+#endif
+};
+
+int __init ls1b_platform_init(void)
+{
+	u32 x __maybe_unused;
+
+	ls1x_serial_setup();
+
+#ifdef CONFIG_STMMAC_ETH
+	ls1x_gmac_setup();
+#endif
+
+#ifdef CONFIG_CAN_SJA1000_PLATFORM
+	{
+	#ifdef CONFIG_LS1X_CAN0
+	struct sja1000_platform_data *sja1000_pdata = &ls1x_sja1000_platform_data_0;
+	sja1000_pdata->osc_freq = clk_get_rate(clk);
+	#endif
+	#ifdef CONFIG_LS1X_CAN1
+	sja1000_pdata = &ls1x_sja1000_platform_data_1;
+	sja1000_pdata->osc_freq = clk_get_rate(clk);
+	#endif
+
+#ifdef	CONFIG_LS1A_MACH
+	#ifdef CONFIG_LS1X_CAN0
+	/* CAN0å¤�ç”¨è®¾ç½® */
+//	ls1b_gpio_free(NULL, 66);	/* å¼•è„šè®¾ç½®ä¸ºCANæ¨¡å¼� */
+//	ls1b_gpio_free(NULL, 67);
+	*(volatile int *)0xbfd00420 &= ~(1<<17 | 3<<14 );	/* ä¸ŽI2C3 SPI0å¤�ç”¨ */
+	#endif
+	#ifdef CONFIG_LS1X_CAN1
+	/* CAN1å¤�ç”¨è®¾ç½® */
+//	ls1b_gpio_free(NULL, 68);	/* å¼•è„šè®¾ç½®ä¸ºCANæ¨¡å¼� */
+//	ls1b_gpio_free(NULL, 69);
+	*(volatile int *)0xbfd00420 &= ~(1<<31 | 1<<16 | 3<<12);	/* ä¸ŽNAND I2C2 SPI1å¤�ç”¨ */
+	#endif
+#elif	CONFIG_LS1B_MACH
+	*(volatile int *)0xbfd00424 &= ~(1<<23);	/* ä¸ŽSPI1å¤�ç”¨ */
+	#ifdef CONFIG_LS1X_CAN0
+	/* CAN0å¤�ç”¨è®¾ç½® */
+//	ls1b_gpio_free(NULL, 38);	/* å¼•è„šè®¾ç½®ä¸ºCANæ¨¡å¼� */
+//	ls1b_gpio_free(NULL, 39);
+	*(volatile int *)0xbfd00420 &= ~(1<<24);	/* ä¸ŽI2C1å¤�ç”¨ */
+	*(volatile int *)0xbfd00424 &= ~(1<<4);	/* ä¸ŽUART1_2å¤�ç”¨ */
+	#endif
+	#ifdef CONFIG_LS1X_CAN1
+	/* CAN1å¤�ç”¨è®¾ç½® */
+//	ls1b_gpio_free(NULL, 40);	/* å¼•è„šè®¾ç½®ä¸ºCANæ¨¡å¼� */
+//	ls1b_gpio_free(NULL, 41);
+	*(volatile int *)0xbfd00420 &= ~(1<<25);	/* ä¸ŽI2C2å¤�ç”¨ */
+	*(volatile int *)0xbfd00424 &= ~(1<<5);	/* ä¸ŽUART1_3å¤�ç”¨ */
+	#endif
+#endif
+	}
+#endif	//#ifdef CONFIG_CAN_SJA1000_PLATFORM
+
+#ifdef CONFIG_I2C_LS1X
+	i2c_register_board_info(0, ls1x_i2c0_devs, ARRAY_SIZE(ls1x_i2c0_devs));
+#endif
+
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+	/* è½®è¯¢æ–¹å¼�æˆ–ä¸­æ–­æ–¹å¼�æŽ¢æµ‹cardçš„æ�’æ‹” */
+	gpio_request(DETECT_GPIO, "MMC_SPI GPIO detect");
+	gpio_direction_input(DETECT_GPIO);		/* è¾“å…¥ä½¿èƒ½ */
+#endif
+
+#ifdef CONFIG_TOUCHSCREEN_ADS7846
+	ads7846_detect_penirq();
+#endif
+
+#ifdef CONFIG_LS1B_SPI0
+	/* disable gpio40-43 */
+	__raw_writel(__raw_readl(LS1X_GPIO_CFG1) & ~(SPI0_MASK << SPI0_OFFSET), 
+			LS1X_GPIO_CFG1);
+	x = __raw_readl(LS1X_MUX_CTRL0);
+//	x |= SPI0_USE_CAN0_TX;	/* è§£é™¤CANç‰‡é€‰å¤�ç”¨ */
+//	x |= SPI0_USE_CAN0_RX;	/* è§£é™¤CANç‰‡é€‰å¤�ç”¨ */
+	__raw_writel(x, LS1X_MUX_CTRL0);
+	spi_register_board_info(ls1b_spi0_devices, ARRAY_SIZE(ls1b_spi0_devices));
+#endif
+
+#ifdef CONFIG_LS1B_SPI1
+	/* LS1Açš„SPI1æŽ§åˆ¶å™¨ä¸ŽNANDå¤�ç”¨ï¼Œç¼–ç¨‹éœ€è¦�æ³¨æ„� */
+	__raw_writel(__raw_readl(LS1X_GPIO_CFG1) & ~(SPI1_MASK << SPI1_OFFSET), 
+			LS1X_GPIO_CFG1);	/* disable gpio44-47 */
+//	x = __raw_readl(LS1X_MUX_CTRL0) & ~NAND_D03_USE_SPI1;	/* è§£é™¤NANDå¤�ç”¨ */
+//	x |= SPI1_USE_CAN1_TX;	/* è§£é™¤CANç‰‡é€‰å¤�ç”¨ */
+//	x |= SPI1_USE_CAN1_RX;	/* è§£é™¤CANç‰‡é€‰å¤�ç”¨ */
+//	__raw_writel(x, LS1X_MUX_CTRL0);
+	spi_register_board_info(ls1b_spi1_devices, ARRAY_SIZE(ls1b_spi1_devices));
+#endif
+
+#ifdef CONFIG_SPI_GPIO
+	spi_register_board_info(spi_gpio_devices, ARRAY_SIZE(spi_gpio_devices));
+#endif
+
+#ifdef CONFIG_BACKLIGHT_GENERIC
+	gpio_request(GPIO_BACKLIGHT_CTRL, "backlight");
+#endif
+#ifdef CONFIG_LCD_PLATFORM
+	gpio_request(GPIO_BACKLIGHT_CTRL, "lcd_enable");
+#endif
+	return platform_add_devices(ls1b_platform_devices, ARRAY_SIZE(ls1b_platform_devices));
+}
+
+arch_initcall(ls1b_platform_init);
+
diff -uNra linux-3.0.82/arch/mips/loongson/ls1x/ls1b-board/Makefile linux-3.0.82x/arch/mips/loongson/ls1x/ls1b-board/Makefile
--- linux-3.0.82/arch/mips/loongson/ls1x/ls1b-board/Makefile	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/ls1x/ls1b-board/Makefile	2017-09-23 03:42:49.390676982 +0800
@@ -0,0 +1,4 @@
+#
+#
+
+obj-$(CONFIG_LS1B_BOARD) += platform.o
diff -uNra linux-3.0.82/arch/mips/loongson/ls1x/ls1b-board/platform.c linux-3.0.82x/arch/mips/loongson/ls1x/ls1b-board/platform.c
--- linux-3.0.82/arch/mips/loongson/ls1x/ls1b-board/platform.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/ls1x/ls1b-board/platform.c	2017-09-23 03:42:49.394676970 +0800
@@ -0,0 +1,2029 @@
+/*
+ * Copyright (c) 2012 Tang, Haifeng <tanghaifeng-gz@loongson.cn>
+ * Platform device support for GS232 SoCs.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/resource.h>
+#include <linux/serial_8250.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/delay.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/flash.h>
+#include <linux/spi/ads7846.h>
+#include <linux/spi/mmc_spi.h>
+#include <linux/spi/spi_gpio.h>
+#include <linux/mmc/host.h>
+#include <linux/phy.h>
+#include <linux/stmmac.h>
+#include <linux/i2c.h>
+#include <linux/i2c/tsc2007.h>
+#include <linux/i2c/ft5x06_ts.h>
+#include <linux/videodev2.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <linux/input/matrix_keypad.h>
+#include <linux/input/74x165_gpio_keys_polled.h>
+#include <linux/rotary_encoder.h>
+#include <linux/ssd1305.h>
+#include <linux/st7920.h>
+#include <linux/clk.h>
+#include <linux/jbt6k74.h>
+#include <linux/leds.h>
+#include <linux/leds_pwm.h>
+
+#include <video/ls1xfb.h>
+#include <media/gc0308_platform.h>
+
+#include <ls1b_board.h>
+#include <irq.h>
+#include <spi.h>
+#include <asm/gpio.h>
+#include <asm-generic/sizes.h>
+
+#ifdef CONFIG_MTD_NAND_LS1X
+struct ls1b_nand_platform_data{
+    int enable_arbiter;
+    struct mtd_partition *parts;
+    unsigned int nr_parts;
+};
+
+#define	SZ_100M	(100*1024*1024)
+
+static struct mtd_partition ls1b_nand_partitions[]={
+#if 1
+	[0] = {
+		.name   ="kernel",
+		.offset =MTDPART_OFS_APPEND,
+		.size   =0xe00000,
+//	        .mask_flags =   MTD_WRITEABLE,
+	},
+	[1] = {
+		.name   ="os",
+		.offset = MTDPART_OFS_APPEND,
+		.size   = SZ_100M,
+
+	},
+	[2] = {
+		.name   ="data",
+		.offset = MTDPART_OFS_APPEND,
+		.size   = MTDPART_SIZ_FULL,
+	},
+#else
+    [0] = {
+        .name   ="kernel",
+        .offset =0,
+        .size   =0xe00000,
+//        .mask_flags =   MTD_WRITEABLE,
+    },
+    [1] = {
+        .name   ="os",
+        .offset = 0xe00000,
+        .size   = 0x7100000,
+    
+    },
+#endif
+};
+
+static struct ls1b_nand_platform_data ls1b_nand_parts = {
+	.enable_arbiter =   1,
+	.parts          =   ls1b_nand_partitions,
+	.nr_parts       =   ARRAY_SIZE(ls1b_nand_partitions),
+};
+
+static struct resource ls1b_nand_resources[] = {
+    [0] = {
+        .start      =0,
+        .end        =0,
+        .flags      =IORESOURCE_DMA,    
+    },
+    [1] = {
+        .start      =0x1fe78000,
+        .end        =0x1fe78020,
+        .flags      =IORESOURCE_MEM,
+    },
+    [2] = {
+        .start      =0x1fd01160,
+        .end        =0x1fd01160,
+        .flags      =IORESOURCE_MEM,
+    },
+    [3] = {
+        .start      =LS1B_BOARD_DMA0_IRQ,
+        .end        =LS1B_BOARD_DMA0_IRQ,
+        .flags      =IORESOURCE_IRQ,
+    },
+};
+
+struct platform_device ls1b_nand_device = {
+    .name       ="ls1b-nand",
+    .id         =-1,
+    .dev        ={
+        .platform_data = &ls1b_nand_parts,
+    },
+    .num_resources  =ARRAY_SIZE(ls1b_nand_resources),
+    .resource       =ls1b_nand_resources,
+};
+#endif //CONFIG_MTD_NAND_LS1X
+
+#define LS1X_UART(_id)						\
+	{							\
+		.mapbase	= LS1X_UART ## _id ## _BASE,	\
+		.irq		= LS1X_UART ## _id ## _IRQ,	\
+		.iotype		= UPIO_MEM,			\
+		.flags		= UPF_IOREMAP | UPF_FIXED_TYPE,	\
+		.type		= PORT_16550A,			\
+	}
+
+#define LS1X_UART_SHARE(_id, _irq)						\
+	{							\
+		.mapbase	= LS1X_UART ## _id ## _BASE,	\
+		.irq		= LS1X_UART ## _irq ## _IRQ,	\
+		.iotype		= UPIO_MEM,			\
+		.flags		= UPF_IOREMAP | UPF_FIXED_TYPE | UPF_SHARE_IRQ,	\
+		.type		= PORT_16550A,			\
+	}
+
+static struct plat_serial8250_port ls1x_serial8250_port[] = {
+	LS1X_UART(0),
+	LS1X_UART(1),
+	LS1X_UART(2),
+	LS1X_UART(3),
+#ifdef CONFIG_LS1B_MACH
+	LS1X_UART(4),
+	LS1X_UART(5),
+#ifdef CONFIG_MULTIFUNC_CONFIG_SERAIL0
+	LS1X_UART_SHARE(6, 0),
+	LS1X_UART_SHARE(7, 0),
+	LS1X_UART_SHARE(8, 0),
+#endif
+#ifdef CONFIG_MULTIFUNC_CONFIG_SERAIL1
+	LS1X_UART_SHARE(9, 1),
+	LS1X_UART_SHARE(10, 1),
+	LS1X_UART_SHARE(11, 1),
+#endif
+#endif
+	{},
+};
+
+struct platform_device ls1x_uart_device = {
+	.name		= "serial8250",
+	.id		= PLAT8250_DEV_PLATFORM,
+	.dev		= {
+		.platform_data = ls1x_serial8250_port,
+	},
+};
+
+void __init ls1x_serial_setup(void)
+{
+	struct clk *clk;
+	struct plat_serial8250_port *p;
+
+#ifdef CONFIG_MULTIFUNC_CONFIG_SERAIL0
+	__raw_writeb(__raw_readb(UART_SPLIT) | 0x01, UART_SPLIT);
+#endif
+#ifdef CONFIG_MULTIFUNC_CONFIG_SERAIL1
+	__raw_writeb(__raw_readb(UART_SPLIT) | 0x02, UART_SPLIT);
+	__raw_writel(__raw_readl(LS1X_MUX_CTRL1) | UART1_3_USE_CAN1 | UART1_2_USE_CAN0, 
+				LS1X_MUX_CTRL1);
+#endif
+
+	clk = clk_get(NULL, "apb");
+	if (IS_ERR(clk))
+		panic("unable to get apb clock, err=%ld", PTR_ERR(clk));
+
+	for (p = ls1x_serial8250_port; p->flags != 0; ++p)
+		p->uartclk = clk_get_rate(clk);
+}
+
+/* OHCI */
+#ifdef CONFIG_USB_OHCI_HCD_LS1X
+static u64 ls1x_ohci_dma_mask = DMA_BIT_MASK(32);
+static struct resource ls1x_ohci_resources[] = {
+	[0] = {
+		.start          = LS1X_OHCI_BASE,
+		.end            = LS1X_OHCI_BASE + SZ_32K - 1,
+		.flags          = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start          = LS1X_OHCI_IRQ,
+		.end            = LS1X_OHCI_IRQ,
+		.flags          = IORESOURCE_IRQ,
+	},
+};
+/*
+static struct ls1x_usbh_data  ls1x_ohci_platform_data={
+#ifdef CONFIG_LS1A_MACH
+	.ports=4,
+#else
+	.ports=1,
+#endif
+};
+*/
+static struct platform_device ls1x_ohci_device = {
+	.name           = "ls1x-ohci",
+	.id             = 0,
+	.dev = {
+//		.platform_data = &ls1x_ohci_platform_data,
+		.dma_mask = &ls1x_ohci_dma_mask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+	},
+	.num_resources  = ARRAY_SIZE(ls1x_ohci_resources),
+	.resource       = ls1x_ohci_resources,
+};
+#endif //#ifdef CONFIG_USB_OHCI_HCD_LS1X
+
+/* EHCI */
+#ifdef CONFIG_USB_EHCI_HCD_LS1X
+static u64 ls1x_ehci_dma_mask = DMA_BIT_MASK(32);
+static struct resource ls1x_ehci_resources[] = { 
+	[0] = {
+		.start          = LS1X_EHCI_BASE,
+		.end            = LS1X_EHCI_BASE + SZ_32K - 1,
+		.flags          = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start          = LS1X_EHCI_IRQ,
+		.end            = LS1X_EHCI_IRQ,
+		.flags          = IORESOURCE_IRQ,
+	},
+};
+/*
+static struct ls1x_usbh_data  ls1x_ehci_platform_data={
+#ifdef CONFIG_LS1A_MACH
+	.ports=4,
+#else
+	.ports=1,
+#endif
+};
+*/
+static struct platform_device ls1x_ehci_device = {
+	.name           = "ls1x-ehci",
+	.id             = 0,
+	.dev = {
+//		.platform_data = &ls1x_ehci_platform_data,
+		.dma_mask = &ls1x_ehci_dma_mask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+	},
+	.num_resources  = ARRAY_SIZE(ls1x_ehci_resources),
+	.resource       = ls1x_ehci_resources,
+};
+#endif //#ifdef CONFIG_USB_EHCI_HCD_LS1X
+
+/*
+* watchdog
+*/
+#ifdef CONFIG_LS1X_WDT
+static struct resource ls1x_wdt_resource[] = {
+	[0]={
+		.start      = LS1X_WDT_BASE,
+		.end        = (LS1X_WDT_BASE + 0x8),
+		.flags      = IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device ls1x_wdt_device = {
+	.name       = "ls1x-wdt",
+	.id         = -1,
+	.num_resources  = ARRAY_SIZE(ls1x_wdt_resource),
+	.resource   = ls1x_wdt_resource,
+};
+#endif //#ifdef CONFIG_LS1X_WDT
+
+/*
+*RTC
+*/
+#ifdef CONFIG_RTC_DRV_LOONGSON1
+static struct platform_device ls1x_rtc_device = {
+	.name       = "ls1x-rtc",
+	.id         = -1,
+};
+#endif //#ifdef CONFIG_RTC_DRV_LOONGSON1
+
+/*
+*I2C
+*/
+/* I2C devices fitted. */
+#ifdef CONFIG_TOUCHSCREEN_TSC2007
+#define TSC2007_GPIO_IRQ	60
+static int ts_get_pendown_state(void)
+{
+	return !gpio_get_value(TSC2007_GPIO_IRQ);
+}
+
+int ts_init(void)
+{
+	gpio_request(TSC2007_GPIO_IRQ, "tsc2007 gpio irq");
+	gpio_direction_input(TSC2007_GPIO_IRQ);
+	return 0;
+}
+
+static struct tsc2007_platform_data tsc2007_info = {
+	.model				= 2007,
+	.x_plate_ohms		= 180,
+	.get_pendown_state	= ts_get_pendown_state,
+	.init_platform_hw	= ts_init,
+};
+#endif //#ifdef CONFIG_TOUCHSCREEN_TSC2007
+
+#ifdef CONFIG_TOUCHSCREEN_FT5X0X
+#define FT5X0X_GPIO_IRQ		38
+#define FT5X0X_GPIO_WAUP	39
+int ft5x0x_irq_init(void)
+{
+	gpio_request(FT5X0X_GPIO_IRQ, "ft5x0x gpio irq");
+	gpio_direction_input(FT5X0X_GPIO_IRQ);		/* è¾“å…¥ä½¿èƒ½ */
+	return 0;
+}
+
+int ft5x0x_wake_up(void)
+{
+	gpio_direction_output(FT5X0X_GPIO_WAUP, 0);		/* è¾“å‡ºä½¿èƒ½ */
+	msleep(10);
+	gpio_set_value(FT5X0X_GPIO_WAUP, 1);
+	msleep(10);
+	return 0;
+}
+
+static struct ft5x0x_ts_platform_data ft5x0x_info = {
+	.init_platform_hw	= ft5x0x_irq_init,
+	.wake_platform_hw	= ft5x0x_wake_up,
+};
+#endif //#ifdef CONFIG_TOUCHSCREEN_FT5X0X
+
+#ifdef CONFIG_VIDEO_GC0308
+static struct gc0308_platform_data gc0308_plat = {
+	.default_width = 640,
+	.default_height = 480,
+	.pixelformat = V4L2_PIX_FMT_YUYV,
+	.freq = 24000000,
+	.is_mipi = 0,
+};
+#endif //#ifdef CONFIG_VIDEO_GC0308
+
+#ifdef CONFIG_GPIO_PCA953X
+#include <linux/i2c/pca953x.h>
+#define PCA9555_GPIO_BASE 170
+#define PCA9555_IRQ_BASE 170
+#define PCA9555_GPIO_IRQ 8
+
+#define PCA9555_DO0 (PCA9555_GPIO_BASE+0)
+#define PCA9555_DO1 (PCA9555_GPIO_BASE+1)
+#define PCA9555_DO2 (PCA9555_GPIO_BASE+2)
+#define PCA9555_DO3 (PCA9555_GPIO_BASE+3)
+#define PCA9555_DO4 (PCA9555_GPIO_BASE+4)
+#define PCA9555_DO5 (PCA9555_GPIO_BASE+5)
+#define PCA9555_DO6 (PCA9555_GPIO_BASE+6)
+#define PCA9555_DO7 (PCA9555_GPIO_BASE+7)
+
+#define PCA9555_EMERG_OFF (PCA9555_GPIO_BASE+10)
+#define PCA9555_PWRKEY (PCA9555_GPIO_BASE+11)
+
+#define PCA9555_LED0 (PCA9555_GPIO_BASE+8)
+#define PCA9555_LED1 (PCA9555_GPIO_BASE+12)
+#define PCA9555_LED2 (PCA9555_GPIO_BASE+13)
+#define PCA9555_LED3 (PCA9555_GPIO_BASE+14)
+#define PCA9555_LED4 (PCA9555_GPIO_BASE+15)
+
+static int ls1x_pca9555_setup(struct i2c_client *client,
+			       unsigned gpio_base, unsigned ngpio,
+			       void *context)
+{
+#if 0
+	static int ls1x_gpio_value[] = {
+		1, 1, 1, 1, 1, 1, 1, 1, 0, -1, -1, 0, 0, 0, 0, 0
+	};
+	int n;
+
+	gpio_request(PCA9555_GPIO_IRQ, "pca9555 gpio irq");
+	gpio_direction_input(PCA9555_GPIO_IRQ);		/* è¾“å…¥ä½¿èƒ½ */
+
+	for (n = 0; n < ARRAY_SIZE(ls1x_gpio_value); ++n) {
+		gpio_request(gpio_base + n, "ACS-5000 GPIO Expander");
+		if (ls1x_gpio_value[n] < 0)
+			gpio_direction_input(gpio_base + n);
+		else
+			gpio_direction_output(gpio_base + n,
+					      ls1x_gpio_value[n]);
+		gpio_export(gpio_base + n, 0); /* Export, direction locked down */
+	}
+#endif
+	gpio_request(PCA9555_GPIO_IRQ, "pca9555 gpio irq");
+	gpio_direction_input(PCA9555_GPIO_IRQ);
+	return 0;
+}
+
+static struct pca953x_platform_data ls1x_i2c_pca9555_platdata = {
+	.gpio_base	= PCA9555_GPIO_BASE, /* Start directly after the CPU's GPIO */
+	.irq_base = PCA9555_IRQ_BASE,
+//	.invert		= 0, /* Do not invert */
+	.setup		= ls1x_pca9555_setup,
+};
+
+#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
+#include <linux/leds.h>
+struct gpio_led pca9555_gpio_leds[] = {
+	/* gpio for 7 relay purposes */
+	{
+		.name			= "DO0",
+		.gpio			= PCA9555_DO0,
+		.active_low		= 0,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	},{
+		.name			= "DO1",
+		.gpio			= PCA9555_DO1,
+		.active_low		= 0,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	},{
+		.name			= "DO2",
+		.gpio			= PCA9555_DO2,
+		.active_low		= 0,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	},{
+		.name			= "DO3",
+		.gpio			= PCA9555_DO3,
+		.active_low		= 0,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	},{
+		.name			= "DO4",
+		.gpio			= PCA9555_DO4,
+		.active_low		= 0,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	}, {
+		.name			= "DO5",
+		.gpio			= PCA9555_DO5,
+		.active_low		= 0,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	},{
+		.name			= "DO6",
+		.gpio			= PCA9555_DO6,
+		.active_low		= 0,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	},{
+		.name			= "DO7",
+		.gpio			= PCA9555_DO7,
+		.active_low		= 0,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	},
+
+	/* ctrl GPRS */
+	{
+		.name			= "emerg_off",
+		.gpio			= PCA9555_EMERG_OFF,
+		.active_low		= 0,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	}, {
+		.name			= "pwrkey",
+		.gpio			= PCA9555_PWRKEY,
+		.active_low		= 0,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	},
+
+	/* 5 leds */
+	{
+		.name			= "green:run",
+		.gpio			= PCA9555_LED0,
+		.active_low		= 1,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_ON,
+	}, {
+		.name			= "red:channel1",
+		.gpio			= PCA9555_LED1,
+		.active_low		= 1,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	}, {
+		.name			= "red:channel2",
+		.gpio			= PCA9555_LED2,
+		.active_low		= 1,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	}, {
+		.name			= "red:channel3",
+		.gpio			= PCA9555_LED3,
+		.active_low		= 1,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	}, {
+		.name			= "red:channel4",
+		.gpio			= PCA9555_LED4,
+		.active_low		= 1,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	},
+};
+
+static struct gpio_led_platform_data pca9555_gpio_led_info = {
+	.leds		= pca9555_gpio_leds,
+	.num_leds	= ARRAY_SIZE(pca9555_gpio_leds),
+};
+
+static struct platform_device pca9555_leds = {
+	.name	= "leds-gpio",
+	.id	= 0,
+	.dev	= {
+		.platform_data	= &pca9555_gpio_led_info,
+	}
+};
+#endif //#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
+#endif //#ifdef CONFIG_GPIO_PCA953X
+
+#ifdef CONFIG_I2C_LS1X
+static struct i2c_board_info __initdata ls1x_i2c0_devs[] = {
+#ifdef CONFIG_TOUCHSCREEN_TSC2007
+	{
+		I2C_BOARD_INFO("tsc2007", 0x48),
+		.irq = LS1X_GPIO_FIRST_IRQ + TSC2007_GPIO_IRQ,
+		.platform_data	= &tsc2007_info,
+	},
+#endif
+#ifdef CONFIG_TOUCHSCREEN_FT5X0X
+	{
+		I2C_BOARD_INFO(FT5X0X_NAME, 0x38),
+		.irq = LS1X_GPIO_FIRST_IRQ + FT5X0X_GPIO_IRQ,
+		.platform_data	= &ft5x0x_info,
+	},
+#endif
+#ifdef CONFIG_VIDEO_GC0308
+	{
+		I2C_BOARD_INFO("GC0308", 0x42 >> 1),
+		.platform_data = &gc0308_plat,
+	},
+#endif
+#ifdef CONFIG_GPIO_PCA953X
+	{
+		I2C_BOARD_INFO("pca9555", 0x27),
+		.irq = LS1X_GPIO_FIRST_IRQ + PCA9555_GPIO_IRQ,
+		.platform_data = &ls1x_i2c_pca9555_platdata,
+	},
+#endif
+};
+
+static struct resource ls1x_i2c0_resource[] = {
+	[0]={
+		.start	= LS1X_I2C0_BASE,
+		.end	= LS1X_I2C0_BASE + SZ_16K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device ls1x_i2c0_device = {
+	.name		= "ls1x-i2c",
+	.id			= 0,
+	.num_resources	= ARRAY_SIZE(ls1x_i2c0_resource),
+	.resource	= ls1x_i2c0_resource,
+};
+
+static struct resource ls1x_i2c1_resource[] = {
+	[0]={
+		.start	= LS1X_I2C1_BASE,
+		.end	= LS1X_I2C1_BASE + SZ_16K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device ls1x_i2c1_device = {
+	.name		= "ls1x-i2c",
+	.id			= 1,
+	.num_resources	= ARRAY_SIZE(ls1x_i2c1_resource),
+	.resource	= ls1x_i2c1_resource,
+};
+
+static struct resource ls1x_i2c2_resource[] = {
+	[0]={
+		.start	= LS1X_I2C2_BASE,
+		.end	= LS1X_I2C2_BASE + SZ_16K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device ls1x_i2c2_device = {
+	.name		= "ls1x-i2c",
+	.id			= 2,
+	.num_resources	= ARRAY_SIZE(ls1x_i2c2_resource),
+	.resource	= ls1x_i2c2_resource,
+};
+#endif //#ifdef CONFIG_I2C_LS1X
+
+#ifdef CONFIG_SENSORS_SHT15
+#include <linux/sht15.h>
+static struct sht15_platform_data platform_data_sht15 = {
+	.gpio_data =  2,	/* æ³¨æ„�:å�¯èƒ½éœ€è¦�ä¿®æ”¹sht15.cé©±åŠ¨ä¸­çš„gpioå»¶æ—¶å�‚æ•° */
+	.gpio_sck  =  3,
+	.supply_mv = 5000, /* 5000mV */
+	.checksum = 1,
+};
+
+static struct platform_device sht15 = {
+	.name = "sht10",
+	.id = -1,
+	.dev = {
+		.platform_data = &platform_data_sht15,
+	},
+};
+#endif
+
+/*
+ * lcd
+ */
+#if defined(CONFIG_FB_LOONGSON1)
+#include "../video_modes.c"
+#ifdef CONFIG_LS1X_FB0
+static struct resource ls1x_fb0_resource[] = {
+	[0] = {
+		.start = LS1X_DC0_BASE,
+		.end   = LS1X_DC0_BASE + 0x0010 - 1,	/* 1M? */
+		.flags = IORESOURCE_MEM,
+	},
+};
+
+struct ls1xfb_mach_info ls1x_lcd0_info = {
+	.id			= "Graphic lcd",
+	.modes			= video_modes,
+	.num_modes		= ARRAY_SIZE(video_modes),
+	.pix_fmt		= PIX_FMT_RGB565,
+	.active			= 1,
+	/* æ ¹æ�®lcdå±�ä¿®æ”¹invert_pixclockå’Œinvert_pixdeå�‚æ•°(0æˆ–1)ï¼Œéƒ¨åˆ†lcdå�¯èƒ½æ˜¾ç¤ºä¸�æ­£å¸¸ */
+	.invert_pixclock	= 0,
+	.invert_pixde	= 0,
+};
+
+struct platform_device ls1x_fb0_device = {
+	.name			= "ls1x-fb",
+	.id				= 0,
+	.num_resources	= ARRAY_SIZE(ls1x_fb0_resource),
+	.resource		= ls1x_fb0_resource,
+	.dev			= {
+		.platform_data = &ls1x_lcd0_info,
+	}
+};
+#endif	//#ifdef CONFIG_LS1X_FB0
+#endif	//#if defined(CONFIG_FB_LOONGSON1)
+
+#define GPIO_BACKLIGHT_CTRL	53
+#ifdef CONFIG_BACKLIGHT_GENERIC
+#include <linux/backlight.h>
+static void ls1x_bl_set_intensity(int intensity)
+{
+	if (intensity)
+		gpio_direction_output(GPIO_BACKLIGHT_CTRL, 1);
+	else
+		gpio_direction_output(GPIO_BACKLIGHT_CTRL, 0);
+}
+
+static struct generic_bl_info ls1x_bl_info = {
+	.name			= "ls1x-bl",
+	.max_intensity		= 0xff,
+	.default_intensity	= 0xff,
+	.set_bl_intensity	= ls1x_bl_set_intensity,
+};
+
+static struct platform_device ls1x_bl_dev = {
+	.name			= "generic-bl",
+	.id			= 1,
+	.dev = {
+		.platform_data	= &ls1x_bl_info,
+	},
+};
+#endif //#ifdef CONFIG_BACKLIGHT_GENERIC
+
+#ifdef CONFIG_LCD_PLATFORM
+#include <video/platform_lcd.h>
+static void ls1x_lcd_power_set(struct plat_lcd_data *pd,
+				   unsigned int power)
+{
+	if (power)
+		gpio_direction_output(GPIO_BACKLIGHT_CTRL, 1);
+	else
+		gpio_direction_output(GPIO_BACKLIGHT_CTRL, 0);
+}
+
+static struct plat_lcd_data ls1x_lcd_power_data = {
+	.set_power		= ls1x_lcd_power_set,
+};
+
+static struct platform_device ls1x_lcd_powerdev = {
+	.name			= "platform-lcd",
+	.dev.parent		= &ls1x_fb0_device.dev,
+	.dev.platform_data	= &ls1x_lcd_power_data,
+};
+#endif //#ifdef CONFIG_LCD_PLATFORM
+
+#ifdef CONFIG_BACKLIGHT_PWM
+#include <linux/pwm_backlight.h>
+static struct platform_pwm_backlight_data ls1x_backlight_data = {
+	.pwm_id		= 2,
+	.max_brightness	= 255,
+	.dft_brightness	= 100,
+	.pwm_period_ns	= 7812500,
+};
+
+static struct platform_device ls1x_pwm_backlight = {
+	.name = "pwm-backlight",
+	.dev = {
+		.platform_data = &ls1x_backlight_data,
+	},
+};
+#endif //#ifdef CONFIG_BACKLIGHT_PWM
+
+//gmac
+#ifdef CONFIG_STMMAC_ETH
+void __init ls1x_gmac_setup(void)
+{
+#ifdef CONFIG_LS1X_GMAC0
+{
+	u32 x;
+	x = __raw_readl(LS1X_MUX_CTRL1);
+	#if defined(CONFIG_LS1X_GMAC0_100M)
+	x = x | GMAC0_USE_TXCLK | GMAC0_USE_PWM01;
+	#elif defined(CONFIG_LS1X_GMAC0_1000M)
+	x = x & (~GMAC0_USE_TXCLK) & (~GMAC0_USE_PWM01);
+	#endif
+	__raw_writel(x & (~GMAC0_SHUT), LS1X_MUX_CTRL1);
+}
+#endif
+#ifdef CONFIG_LS1X_GMAC1
+{
+	u32 x;
+	x = __raw_readl(LS1X_MUX_CTRL0);
+	x = x | GMAC1_USE_UART1 | GMAC1_USE_UART0;	/* å¤�ç”¨UART0&1 */
+	__raw_writel(x, LS1X_MUX_CTRL0);
+	x = __raw_readl(LS1X_MUX_CTRL1);
+	#if defined(CONFIG_LS1X_GMAC1_100M)
+	x = x | GMAC1_USE_TXCLK | GMAC1_USE_PWM23;
+	#elif defined(CONFIG_LS1X_GMAC1_1000M)
+	x = x & (~GMAC1_USE_TXCLK) & (~GMAC1_USE_PWM23);
+	#endif
+	__raw_writel(x & (~GMAC1_SHUT), LS1X_MUX_CTRL1);
+}
+#endif
+}
+
+#ifdef CONFIG_LS1X_GMAC0
+static struct resource ls1x_mac0_resources[] = {
+	[0] = {
+		.start  = LS1X_GMAC0_BASE,
+		.end    = LS1X_GMAC0_BASE + SZ_8K - 1,
+		.flags  = IORESOURCE_MEM,
+	},
+	[1] = {
+		.name   = "macirq",
+		.start  = LS1X_GMAC0_IRQ,
+		.flags  = IORESOURCE_IRQ,
+	},
+};
+
+static struct plat_stmmacenet_data ls1x_mac0_data = {
+	.bus_id = 0,
+	.pbl = 0,
+	.has_gmac = 1,
+	.enh_desc = 0,
+};
+
+struct platform_device ls1x_gmac0_mac = {
+	.name           = "stmmaceth",
+	.id             = 0,
+	.num_resources  = ARRAY_SIZE(ls1x_mac0_resources),
+	.resource       = ls1x_mac0_resources,
+	.dev            = {
+		.platform_data = &ls1x_mac0_data,
+	},
+};
+
+static struct plat_stmmacphy_data  phy0_private_data = {
+	.bus_id = 0,
+#ifdef CONFIG_RTL8305SC
+	.phy_addr = 4,
+#else
+	.phy_addr = 0,
+#endif
+	.phy_mask = 0,
+	.interface = PHY_INTERFACE_MODE_MII,
+	
+};
+
+struct platform_device ls1x_gmac0_phy = {
+	.name = "stmmacphy",
+	.id = 0,
+	.num_resources = 1,
+	.resource = (struct resource[]){
+		{
+			.name = "phyirq",
+			.start = PHY_POLL,
+			.end = PHY_POLL,
+			.flags = IORESOURCE_IRQ,
+		},
+	},
+	.dev = {
+		.platform_data = &phy0_private_data,
+	},
+};
+#endif //#ifdef CONFIG_LS1X_GMAC0
+
+#ifdef CONFIG_LS1X_GMAC1
+static struct resource ls1x_mac1_resources[] = {
+	[0] = {
+		.start  = LS1X_GMAC1_BASE,
+		.end    = LS1X_GMAC1_BASE + SZ_8K - 1,
+		.flags  = IORESOURCE_MEM,
+	},
+	[1] = {
+		.name   = "macirq",
+		.start  = LS1X_GMAC1_IRQ,
+		.flags  = IORESOURCE_IRQ,
+	},
+};
+
+static struct plat_stmmacenet_data ls1x_mac1_data = {
+	.bus_id = 1,
+	.pbl = 0,
+	.has_gmac = 1,
+	.enh_desc = 0,
+};
+
+struct platform_device ls1x_gmac1_mac = {
+	.name           = "stmmaceth",
+	.id             = 1,
+	.num_resources  = ARRAY_SIZE(ls1x_mac1_resources),
+	.resource       = ls1x_mac1_resources,
+	.dev            = {
+		.platform_data = &ls1x_mac1_data,
+	},
+};
+
+static struct plat_stmmacphy_data  phy1_private_data = {
+	.bus_id = 1,
+	.phy_addr = 1,
+	.phy_mask = 0,
+	.interface = PHY_INTERFACE_MODE_MII,
+	
+};
+
+struct platform_device ls1x_gmac1_phy = {
+	.name = "stmmacphy",
+	.id = 1,
+	.num_resources = 1,
+	.resource = (struct resource[]){
+		{
+			.name = "phyirq",
+			.start = PHY_POLL,
+			.end = PHY_POLL,
+			.flags = IORESOURCE_IRQ,
+		},
+	},
+	.dev = {
+		.platform_data = &phy1_private_data,
+	},
+};
+#endif //#ifdef CONFIG_LS1X_GMAC1
+#endif //#ifdef CONFIG_STMMAC_ETH
+
+#ifdef CONFIG_SOUND_LS1X_AC97
+static struct resource ls1x_ac97_resource[] = {
+	[0]={
+		.start	= LS1X_AC97_BASE,
+		.end	= LS1X_AC97_BASE + SZ_16K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device ls1x_audio_device = {
+	.name           = "ls1x-audio",
+	.id             = -1,
+	.num_resources	= ARRAY_SIZE(ls1x_ac97_resource),
+	.resource		= ls1x_ac97_resource,
+};
+#endif
+
+#ifdef CONFIG_MTD_M25P80
+static struct mtd_partition partitions[] = {
+	[0] = {
+		.name		= "pmon_spi",
+		.offset		= 0,
+		.size		= 512 * 1024,	//512KB
+	//	.mask_flags	= MTD_WRITEABLE,
+	},
+};
+
+static struct flash_platform_data flash __maybe_unused = {
+	.name		= "ls1b_norflash",
+	.parts		= partitions,
+	.nr_parts	= ARRAY_SIZE(partitions),
+	.type		= "w25q64",
+};
+#endif /* CONFIG_MTD_M25P80 */
+
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+/* å¼€å�‘æ�¿ä½¿ç”¨GPIO40(CAN1_RX)å¼•è„šä½œä¸ºMMC/SDå�¡çš„æ�’æ‹”æŽ¢æµ‹å¼•è„š */
+#define DETECT_GPIO  41
+#if 1
+/* è½®è¯¢æ–¹å¼�æŽ¢æµ‹cardçš„æ�’æ‹” */
+static int mmc_spi_get_cd(struct device *dev)
+{
+	return !gpio_get_value(DETECT_GPIO);
+}
+#else
+#define MMC_SPI_CARD_DETECT_INT  (LS1X_GPIO_FIRST_IRQ + DETECT_GPIO)
+/* ä¸­æ–­æ–¹å¼�æ–¹å¼�æŽ¢æµ‹cardçš„æ�’æ‹”ï¼Œç”±äºŽloongson1 CPUä¸�æ”¯æŒ�å�Œè¾¹æ²¿è§¦å�‘ æ‰€ä»¥ä¸�å»ºè®®ä½¿ç”¨ä¸­æ–­æ–¹å¼� */
+static int ls1b_mmc_spi_init(struct device *dev,
+	irqreturn_t (*detect_int)(int, void *), void *data)
+{
+	return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
+		IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
+}
+/* é‡Šæ”¾ä¸­æ–­ */
+static void ls1b_mmc_spi_exit(struct device *dev, void *data)
+{
+	free_irq(MMC_SPI_CARD_DETECT_INT, data);
+}
+#endif
+
+static struct mmc_spi_platform_data mmc_spi __maybe_unused = {
+	/* ä¸­æ–­æ–¹å¼�æ–¹å¼�æŽ¢æµ‹cardçš„æ�’æ‹” */
+//	.init = ls1b_mmc_spi_init,
+//	.exit = ls1b_mmc_spi_exit,
+//	.detect_delay = 1200,	/* msecs */
+	/* è½®è¯¢æ–¹å¼�æ–¹å¼�æŽ¢æµ‹cardçš„æ�’æ‹” */
+	.get_cd = mmc_spi_get_cd,
+	.caps = MMC_CAP_NEEDS_POLL,
+};	
+#endif  /* defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) */
+
+#ifdef CONFIG_TOUCHSCREEN_ADS7846
+#define ADS7846_GPIO_IRQ 60 /* å¼€å�‘æ�¿è§¦æ‘¸å±�ä½¿ç”¨çš„å¤–éƒ¨ä¸­æ–­ */
+int ads7846_pendown_state(void)
+{
+	return !gpio_get_value(ADS7846_GPIO_IRQ);
+}
+	
+static void ads7846_detect_penirq(void)
+{
+	gpio_request(ADS7846_GPIO_IRQ, "ads7846 gpio irq");
+	gpio_direction_input(ADS7846_GPIO_IRQ);
+}
+	
+static struct ads7846_platform_data ads_info __maybe_unused = {
+	.model				= 7846,
+	.vref_delay_usecs	= 1,
+	.keep_vref_on		= 0,
+	.settle_delay_usecs	= 20,
+//	.x_plate_ohms		= 800,
+	.pressure_min		= 0,
+	.pressure_max		= 2048,
+	.debounce_rep		= 3,
+	.debounce_max		= 10,
+	.debounce_tol		= 50,
+	.get_pendown_state	= ads7846_pendown_state,
+	.filter_init		= NULL,
+	.filter 			= NULL,
+	.filter_cleanup 	= NULL,
+};
+#endif /* TOUCHSCREEN_ADS7846 */
+
+#ifdef CONFIG_LCD_JBT6K74
+/* JBT6k74 display controller */
+static void gta02_jbt6k74_probe_completed(struct device *dev)
+{
+//	pcf50633_bl_set_brightness_limit(gta02_pcf, 0x3f);
+}
+
+const struct jbt6k74_platform_data jbt6k74_pdata = {
+//	.gpio_reset = 41,
+};
+#endif
+
+#ifdef CONFIG_LS1B_SPI0
+static struct spi_board_info ls1b_spi0_devices[] = {
+#ifdef CONFIG_MTD_M25P80
+	{
+		.modalias	= "w25q64",
+		.bus_num 		= 0,
+		.chip_select	= SPI0_CS0,
+		.max_speed_hz	= 80000000,
+		.platform_data	= &flash,
+	},
+#endif
+#ifdef CONFIG_SPI_MCP3201
+	{
+		.modalias	= "mcp3201",
+		.bus_num 	= 0,
+		.chip_select	= SPI0_CS3,
+		.max_speed_hz	= 1000000,
+	},
+#endif
+#ifdef CONFIG_TOUCHSCREEN_ADS7846
+	{
+		.modalias = "ads7846",
+		.platform_data = &ads_info,
+		.bus_num 		= 0,
+		.chip_select 	= SPI0_CS1,
+		.max_speed_hz 	= 2500000,
+		.mode 			= SPI_MODE_1,
+		.irq				= LS1X_GPIO_FIRST_IRQ + ADS7846_GPIO_IRQ,
+	},
+#endif
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+	{
+		.modalias		= "mmc_spi",
+		.bus_num 		= 0,
+		.chip_select	= SPI0_CS2,
+		.max_speed_hz	= 25000000,
+		.platform_data	= &mmc_spi,
+		.mode = SPI_MODE_3,
+	},
+#endif
+};
+	
+static struct resource ls1b_spi0_resource[] = {
+	[0]={
+		.start	= LS1B_BOARD_SPI0_BASE,
+		.end	= (LS1B_BOARD_SPI0_BASE + 0x6),
+		.flags	= IORESOURCE_MEM,
+	},
+	[1]={
+		.start	= LS1B_BOARD_SPI0_IRQ,
+		.end	= LS1B_BOARD_SPI0_IRQ,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct ls1b_spi_info ls1b_spi0_platdata = {
+	.board_size = ARRAY_SIZE(ls1b_spi0_devices),
+	.board_info = ls1b_spi0_devices,
+	.bus_num	= 0,
+	.num_cs		= SPI0_CS3 + 1,
+};
+
+static struct platform_device ls1b_spi0_device = {
+	.name		= "ls1b-spi",
+	.id 		= 0,
+	.num_resources	= ARRAY_SIZE(ls1b_spi0_resource),
+	.resource	= ls1b_spi0_resource,
+	.dev		= {
+		.platform_data	= &ls1b_spi0_platdata,//&ls1b_spi_devices,
+	},
+};
+
+#elif defined(CONFIG_SPI_GPIO)	/* ä½¿ç”¨GPIOæ¨¡æ‹ŸSPIä»£æ›¿ */
+struct spi_gpio_platform_data spi0_gpio_platform_data = {
+	.sck = 24,	/*gpio24*/
+	.mosi = 26,	/*gpio26*/
+	.miso = 25,	/*gpio25*/
+	.num_chipselect = 4,
+};
+
+static struct platform_device spi0_gpio_device = {
+	.name = "spi_gpio",
+	.id   = 2,	/* ç”¨äºŽåŒºåˆ†spi0å’Œspi1 */
+	.dev = {
+		.platform_data = &spi0_gpio_platform_data,
+	},
+};
+
+static struct spi_board_info spi0_gpio_devices[] = {
+#ifdef CONFIG_MTD_M25P80
+	{
+		.modalias	= "w25q64",
+		.bus_num 		= 2,	/* å¯¹åº”spigpio_deviceçš„.id=2 */
+		.controller_data = (void *)27,	/*gpio27*/
+		.chip_select	= 0,
+		.max_speed_hz	= 80000000,
+		.platform_data	= &flash,
+	},
+#endif
+#ifdef CONFIG_SPI_MCP3201
+	{
+		.modalias	= "mcp3201",
+		.bus_num 	= 2,
+		.controller_data = (void *)30,	/*gpio30*/
+		.chip_select	= 3, /*SPI0_CS2*/
+		.max_speed_hz	= 1000000,
+	},
+#endif
+#ifdef CONFIG_TOUCHSCREEN_ADS7846
+	{
+		.modalias = "ads7846",
+		.platform_data = &ads_info,
+		.bus_num 		= 2,	/* å¯¹åº”spigpio_deviceçš„.id=2 */
+		.controller_data = (void *)28,	/*gpio28*/
+		.chip_select 	= 1,
+		.max_speed_hz 	= 2500000,
+		.mode 			= SPI_MODE_1,
+		.irq			= LS1X_GPIO_FIRST_IRQ + ADS7846_GPIO_IRQ,
+	},
+#endif
+#ifdef CONFIG_LCD_JBT6K74
+	{
+		.modalias	= "jbt6k74",
+		.platform_data	= &jbt6k74_pdata,
+		.bus_num	= 2,		/* å¯¹åº”spigpio_deviceçš„.id=2 */
+		.controller_data = (void *)43,	/*gpio43*/
+		.chip_select = 2,
+		/* irq */
+		.max_speed_hz	= 100 * 1000,
+	},
+#endif
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+	{
+		.modalias		= "mmc_spi",
+		.bus_num 		= 2,
+		.controller_data = (void *)29,	/*gpio29*/
+		.chip_select	= 2,
+		.max_speed_hz	= 25000000,
+		.platform_data	= &mmc_spi,
+		.mode = SPI_MODE_3,
+	},
+#endif
+};
+#endif //#ifdef CONFIG_LS1B_SPI0
+
+#if defined(CONFIG_LS1B_SPI1) /* SPI1 æŽ§åˆ¶å™¨ */
+static struct spi_board_info ls1b_spi1_devices[] = {
+	{
+		.modalias		= "spidev",
+		.bus_num 		= 1,
+		.chip_select	= SPI1_CS0,
+		.max_speed_hz	= 25000000,
+		.mode = SPI_MODE_0,
+	},
+	{
+		.modalias		= "spidev",
+		.bus_num 		= 1,
+		.chip_select	= SPI1_CS1,
+		.max_speed_hz	= 25000000,
+		.mode = SPI_MODE_0,
+	},
+	{
+		.modalias		= "spidev",
+		.bus_num 		= 1,
+		.chip_select	= SPI1_CS2,
+		.max_speed_hz	= 25000000,
+		.mode = SPI_MODE_0,
+	},
+/*#if defined(CONFIG_EASY_DAB_AUDIO)
+	{	
+		.modalias		= "easy_dab",
+		.bus_num 		= 1,
+		.chip_select	= SPI1_CS1,
+		.max_speed_hz	= 10000000,
+	},
+#endif*/
+};
+
+static struct resource ls1b_spi1_resource[] = {
+	[0]={
+		.start	= LS1B_BOARD_SPI1_BASE,
+		.end	= (LS1B_BOARD_SPI1_BASE + 0x6),
+		.flags	= IORESOURCE_MEM,
+	},
+	[1]={
+		.start	= LS1B_BOARD_SPI1_IRQ,
+		.end	= LS1B_BOARD_SPI1_IRQ,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct ls1b_spi_info ls1b_spi1_platdata = {
+	.board_size = ARRAY_SIZE(ls1b_spi1_devices),
+	.board_info = ls1b_spi1_devices,
+	.bus_num	= 1,
+	.num_cs		= 3,
+};
+
+static struct platform_device ls1b_spi1_device = {
+	.name		= "ls1b-spi",
+	.id 		= 1,
+	.num_resources	= ARRAY_SIZE(ls1b_spi1_resource),
+	.resource	= ls1b_spi1_resource,
+	.dev		= {
+		.platform_data	= &ls1b_spi1_platdata,//&ls1b_spi_devices,
+	},
+};
+//#elif defined(CONFIG_SPI_GPIO)	/* ä½¿ç”¨GPIOæ¨¡æ‹ŸSPIä»£æ›¿ */
+#elif 0
+struct spi_gpio_platform_data spi1_gpio_platform_data = {
+	.sck = 39,	/*gpio39*/
+	.mosi = 40,	/*gpio40*/
+	.miso = 41,	/*gpio41*/
+	.num_chipselect = 3,
+};
+
+static struct platform_device spi1_gpio_device = {
+	.name = "spi_gpio",
+//	.name = "spi_gpio_delay",
+	.id   = 3,
+	.dev = {
+		.platform_data = &spi1_gpio_platform_data,
+	},
+};
+
+static struct spi_board_info spi1_gpio_devices[] = {
+	{
+		.modalias		= "spidev",
+		.bus_num 		= 3,
+		.controller_data = (void *)38,	/*gpio38*/
+		.chip_select	= 0,	/* SPI1_CS0 */
+		.max_speed_hz	= 25000000,
+		.mode = SPI_MODE_0,
+	}, {
+		.modalias		= "spidev",
+		.bus_num 		= 3,
+		.controller_data = (void *)0,	/*gpio0*/
+		.chip_select	= 1,	/* SPI1_CS1 */
+		.max_speed_hz	= 25000000,
+		.mode = SPI_MODE_0,
+	}, {
+		.modalias		= "spidev",
+		.bus_num 		= 3,
+		.controller_data = (void *)1,	/*gpio1*/
+		.chip_select	= 2,	/* SPI1_CS2 */
+		.max_speed_hz	= 25000000,
+		.mode = SPI_MODE_0,
+	},
+};
+#endif	//#ifdef CONFIG_LS1B_SPI1
+
+#if defined(CONFIG_SPI_GPIO) && defined(CONFIG_GPIO_74X165)
+struct spi_gpio_platform_data spigpio_74x165_data = {
+	.sck = 39,	/*gpio39 cp*/
+	.mosi = SPI_GPIO_NO_MOSI,
+	.miso = 41,	/*gpio41 q7*/
+	.num_chipselect = 1,
+};
+
+static struct platform_device spigpio_74x165_device = {
+	.name = "spi_gpio",
+	.id   = 4,
+	.dev = {
+		.platform_data = &spigpio_74x165_data,
+	},
+};
+
+#include <linux/spi/74x165.h>
+static struct nxp_74x165_chip_platform_data nxp_74x165_info = {
+	.base = 188,	/* è‡ªå®šä¹‰çš„74x165 gpioèµ·å§‹å�· */
+	.latch = 38,	/*gpio38 pl*/
+	.daisy_chained = 2,
+};
+
+static struct spi_board_info spi3_gpio_devices[] __maybe_unused = {
+	{
+		.modalias	= "74x165",
+		.bus_num 		= 4,	/* å¯¹åº”spigpio_74x165_deviceçš„ .id=2 */
+		.controller_data = (void *)SPI_GPIO_NO_CHIPSELECT,
+		.chip_select	= 0,
+		.max_speed_hz	= 1000000,
+		.platform_data	= &nxp_74x165_info,
+		.mode = SPI_MODE_2,
+	},
+};
+#endif	//#if defined(CONFIG_SPI_GPIO) && defined(CONFIG_GPIO_74X165)
+
+/************************************************/	//GPIO && buzzer && button
+#ifdef CONFIG_KEYBOARD_GPIO_POLLED
+static struct gpio_keys_button ls1b_gpio_button[] = {
+	[0] = {
+		.code		= 'A',
+		.gpio	 	= 37,
+		.desc		= "SW1",
+	},
+	[1] = {
+		.code		= 'B',
+		.gpio	 	= 38,
+		.desc		= "SW2",
+	},
+	[2] = {
+		.code		= 'C',
+		.gpio	 	= 39,
+		.desc		= "SW3",
+	},
+	[3] = {
+		.code		= 'D',
+		.gpio	 	= 40,
+		.desc		= "SW4",
+	},
+	[4] = {
+		.code		= 'E',
+		.gpio	 	= 41,
+		.desc		= "SW5",
+	},
+};
+
+static struct gpio_keys_platform_data ls1b_gpio_key_dat = {
+	.buttons 		= ls1b_gpio_button,
+	.nbuttons 		= 5, 
+	.poll_interval	= 200,
+};
+
+static struct platform_device ls1b_gpio_key_device = {
+	.name 	= "gpio-keys-polled",
+	.id	= -1,
+	.dev	= {
+		.platform_data = &ls1b_gpio_key_dat,
+	},
+};
+#endif //#ifdef CONFIG_KEYBOARD_GPIO_POLLED
+
+#ifdef CONFIG_LS1B_BUZZER
+static struct gpio_keys_button ls1b_gpio_buzzer[] = {
+	[0] = {
+		.gpio	= 40,	//57
+		.type	= EV_LED,
+	},	
+/*
+	[1] = {
+		.gpio	= 34,
+	},	
+	[2] = {
+		.gpio	= 35,
+	},	*/
+};
+
+static struct gpio_keys_platform_data ls1b_gpio_buzzer_data = {
+	.buttons	= ls1b_gpio_buzzer,
+	.nbuttons	= 1,
+};
+
+static struct platform_device ls1b_gpio_buzzer_device = {
+	.name	= "buzzer_gpio",
+	.id	= -1,
+	.dev	= {
+		.platform_data = &ls1b_gpio_buzzer_data,
+	},
+};
+#endif //#ifdef CONFIG_LS1B_BUZZER
+
+//xhm
+#ifdef CONFIG_LS1B_BBDIO
+static struct gpio_keys_button ls1b_bobodogio_button[] = {
+#if 0
+	[0]  = { .gpio = 4, .type = EV_LED},	
+	[1]  = { .gpio = 5, .type = EV_LED},
+	[2]  = { .gpio = 6, .type = EV_LED},
+	[3]  = { .gpio = 7, .type = EV_LED},
+	[4]  = { .gpio = 8, .type = EV_LED},
+	[5]  = { .gpio = 9, .type = EV_LED},
+	[6]  = { .gpio = 10, .type = EV_LED},
+	[7]  = { .gpio = 11, .type = EV_LED},
+	[8]  = { .gpio = 12, .type = EV_LED},
+	[9]  = { .gpio = 13, .type = EV_LED},
+	[10] = { .gpio = 14, .type = EV_LED},
+	[11] = { .gpio = 15, .type = EV_LED},
+	[12] = { .gpio = 16, .type = EV_LED},
+	[13] = { .gpio = 17, .type = EV_LED},
+	[14] = { .gpio = 18, .type = EV_LED},
+#endif
+	[0] = { .gpio = 48, .type = EV_KEY},
+	[1] = { .gpio = 49, .type = EV_LED},
+};
+
+static struct gpio_keys_platform_data ls1b_bobodogio_dog_data = {
+	.buttons	= ls1b_bobodogio_button,
+	.nbuttons	= 15,
+};
+
+static struct platform_device ls1b_bobodogio_dog = {
+	.name	= "bobodog_io_control",
+	.id	= -1,
+	.dev	= {
+		.platform_data = &ls1b_bobodogio_dog_data,
+	},
+};
+#endif //#ifdef CONFIG_LS1B_BBDIO
+
+#ifdef CONFIG_LS1B_PWM_DRIVER
+static struct resource ls1b_pwm0_resource[] = {
+	[0]={
+		.start	= LS1B_PWM0_BASE,
+		.end	= (LS1B_PWM0_BASE + 0x0f),
+		.flags	= IORESOURCE_MEM,
+	},
+	[1]={
+		.start	= LS1B_PWM1_BASE,
+		.end	= (LS1B_PWM1_BASE + 0x0f),
+		.flags	= IORESOURCE_MEM,
+	},
+	[2]={
+		.start	= LS1B_PWM2_BASE,
+		.end	= (LS1B_PWM2_BASE + 0x0f),
+		.flags	= IORESOURCE_MEM,
+	},
+	[3]={
+		.start	= LS1B_PWM3_BASE,
+		.end	= (LS1B_PWM3_BASE + 0x0f),
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device ls1b_pwm_device = {
+	.name	= "ls1b-pwm",
+	.id	= -1,
+	.num_resources	= ARRAY_SIZE(ls1b_pwm0_resource),
+	.resource	= ls1b_pwm0_resource,
+};
+#endif //#ifdef CONFIG_LS1B_PWM_DRIVER
+
+/**
+ * Rotary encoder input device
+ */
+#ifdef CONFIG_INPUT_GPIO_ROTARY_ENCODER
+#define GPIO_ROTARY_A 59
+#define GPIO_ROTARY_B 51
+#define GPIO_KEY_C 53
+
+static struct rotary_encoder_platform_data raumfeld_rotary_encoder_info = {
+	.steps		= 30,
+	.axis		= REL_X,
+	.relative_axis	= 1,
+	.rollover	= false,
+	.gpio_a		= GPIO_ROTARY_A,
+	.gpio_b		= GPIO_ROTARY_B,
+	.gpio_c		= GPIO_KEY_C,
+	.debounce_ms	= 10,
+	.active_low		= 1,
+	.key		= KEY_ENTER,
+	.inverted_a	= 0,
+	.inverted_b	= 0,
+	.half_period	= 1,
+};
+
+static struct platform_device rotary_encoder_device = {
+	.name		= "rotary-encoder",
+	.id		= 0,
+	.dev		= {
+		.platform_data = &raumfeld_rotary_encoder_info,
+	}
+};
+#endif //#ifdef CONFIG_INPUT_GPIO_ROTARY_ENCODER
+
+/* matrix keypad */
+#if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE)
+/*
+static const uint32_t ls1bkbd_keymap[] = {
+	KEY(0, 0, KEY_A),
+	KEY(0, 1, KEY_B),
+	KEY(0, 2, KEY_C),
+	KEY(0, 3, KEY_D),
+
+	KEY(1, 0, KEY_E),
+	KEY(1, 1, KEY_F),
+	KEY(1, 2, KEY_G),
+	KEY(1, 3, KEY_H),
+};
+*/
+static const uint32_t ls1bkbd_keymap[] = {
+	KEY(0, 0, KEY_1),
+	KEY(0, 1, KEY_2),
+	KEY(0, 2, KEY_3),
+	KEY(0, 3, KEY_4),
+
+	KEY(1, 0, KEY_5),
+	KEY(1, 1, KEY_6),
+	KEY(1, 2, KEY_7),
+	KEY(1, 3, KEY_8),
+	
+	KEY(2, 0, KEY_9),
+	KEY(2, 1, KEY_0),
+	KEY(2, 2, KEY_A),
+	KEY(2, 3, KEY_B),
+	
+	KEY(3, 0, KEY_C),
+	KEY(3, 1, KEY_D),
+	KEY(3, 2, KEY_E),
+	KEY(3, 3, KEY_F),
+};
+
+static struct matrix_keymap_data ls1bkbd_keymap_data = {
+	.keymap			= ls1bkbd_keymap,
+	.keymap_size	= ARRAY_SIZE(ls1bkbd_keymap),
+};
+/*
+static const int ls1bkbd_row_gpios[] =
+	{ 30, 28 };
+static const int ls1bkbd_col_gpios[] =
+	{ 29, 58, 50, 52 };
+*/
+static const int ls1bkbd_row_gpios[] =
+	{ 16, 17, 18, 19 };	//gpio 16 17 18 19
+static const int ls1bkbd_col_gpios[] =
+	{ 20, 21, 22, 23 };	//gpio 20 21 22 23
+
+static struct matrix_keypad_platform_data ls1bkbd_pdata = {
+	.keymap_data		= &ls1bkbd_keymap_data,
+	.row_gpios			= ls1bkbd_row_gpios,
+	.col_gpios			= ls1bkbd_col_gpios,
+	.num_row_gpios		= ARRAY_SIZE(ls1bkbd_row_gpios),
+	.num_col_gpios		= ARRAY_SIZE(ls1bkbd_col_gpios),
+	.col_scan_delay_us	= 2,
+	.debounce_ms		= 24,
+	.active_low			= 1,
+	.wakeup				= 1,
+	.no_autorepeat		= 0,
+};
+
+static struct platform_device ls1bkbd_device = {
+	.name	= "matrix-keypad",
+	.id		= -1,
+	.dev	= {
+		.platform_data = &ls1bkbd_pdata,
+	},
+};
+#endif	//#if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE)
+
+#ifdef CONFIG_FB_SSD1305
+static struct ssd1305_platform_data ssd1305_pdata = {
+	.gpio_outpu = (unsigned int)LS1X_GPIO_OUT0,
+	.gpios_res = 17,
+	.gpios_cs = 16,
+	.gpios_dc = 18,
+	.gpios_rd = 20,
+	.gpios_wr = 19,
+	
+	.gpios_d0 = 8,
+	.gpios_d1 = 9,
+	.gpios_d2 = 10,
+	.gpios_d3 = 11,
+	.gpios_d4 = 12,
+	.gpios_d5 = 13,
+	.gpios_d6 = 14,
+	.gpios_d7 = 15,
+	.datas_offset = 8,
+};
+
+struct platform_device ssd1305fb_device = {
+	.name	= "ssd1305fb",
+	.id		= -1,
+	.dev	= {
+		.platform_data = &ssd1305_pdata,
+	},
+};
+#endif //#ifdef CONFIG_FB_SSD1305
+
+#ifdef CONFIG_FB_ST7565
+#include <linux/st7565.h>
+static struct st7565_platform_data st7565_pdata = {
+	.gpio_outpu = (unsigned int)LS1X_GPIO_OUT0,
+	.gpios_res = 17,
+	.gpios_cs = 16,
+	.gpios_dc = 18,
+	.gpios_rd = 20,
+	.gpios_wr = 19,
+	
+	.gpios_d0 = 8,
+	.gpios_d1 = 9,
+	.gpios_d2 = 10,
+	.gpios_d3 = 11,
+	.gpios_d4 = 12,
+	.gpios_d5 = 13,
+	.gpios_d6 = 14,
+	.gpios_d7 = 15,
+	.datas_offset = 8,
+};
+
+struct platform_device st7565fb_device = {
+	.name	= "st7565fb",
+	.id		= -1,
+	.dev	= {
+		.platform_data = &st7565_pdata,
+	},
+};
+#endif //#ifdef CONFIG_FB_ST7565
+
+#ifdef CONFIG_FB_ST7920
+static struct st7920_platform_data st7920_pdata = {
+	.gpio_outpu = (unsigned int)LS1X_GPIO_OUT0,
+	.gpios_res = 8,
+	.gpios_cs = 11,
+	.gpios_sid = 9,
+	.gpios_sck = 10,
+
+	.datas_offset = 8,
+};
+
+struct platform_device st7920fb_device = {
+	.name	= "st7920fb",
+	.id		= -1,
+	.dev	= {
+		.platform_data = &st7920_pdata,
+	},
+};
+#endif //#ifdef CONFIG_FB_ST7920
+
+#ifdef CONFIG_KEYBOARD_74X165_GPIO_POLLED
+static struct gpio_keys_button gen74x165_gpio_keys_table[] = {
+	{
+		.code		= KEY_0,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_1,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_2,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_3,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_4,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_5,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_6,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_7,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_8,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_9,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_A,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_B,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_C,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_D,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_E,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_F,
+		.active_low	= 1,
+	},
+};
+
+static struct gen_74x165_platform_data gen74x165_gpio_keys_info = {
+	.q7 = 41,
+	.cp = 39,
+	.pl = 38,
+	.debounce_interval = 1,
+	.buttons	= gen74x165_gpio_keys_table,
+	.nbuttons	= ARRAY_SIZE(gen74x165_gpio_keys_table),
+	.poll_interval	= 50, /* default to 50ms */
+};
+
+static struct platform_device gen74x165_gpio_keys_device = {
+	.name		= "gen74x165_gpio-keys-polled",
+	.dev		= {
+		.platform_data	= &gen74x165_gpio_keys_info,
+	},
+};
+#endif //#ifdef CONFIG_KEYBOARD_74X165_GPIO_POLLED
+
+#ifdef CONFIG_LEDS_PWM
+static struct led_pwm ls1x_pwm_leds[] = {
+	{
+		.name		= "ls1x_pwm_led1",
+		.pwm_id		= 2,
+		.max_brightness	= 255,
+		.pwm_period_ns	= 7812500,
+	},
+	{
+		.name		= "ls1x_pwm_led2",
+		.pwm_id		= 3,
+		.max_brightness	= 255,
+		.pwm_period_ns	= 7812500,
+	},
+};
+
+static struct led_pwm_platform_data ls1x_pwm_data = {
+	.num_leds	= ARRAY_SIZE(ls1x_pwm_leds),
+	.leds		= ls1x_pwm_leds,
+};
+
+static struct platform_device ls1x_leds_pwm = {
+	.name	= "leds_pwm",
+	.id		= -1,
+	.dev	= {
+		.platform_data = &ls1x_pwm_data,
+	},
+};
+#endif //#ifdef CONFIG_LEDS_PWM
+
+#ifdef CONFIG_CAN_SJA1000_PLATFORM
+#include <linux/can/platform/sja1000.h>
+#ifdef CONFIG_LS1X_CAN0
+static struct resource ls1x_sja1000_resources_0[] = {
+	{
+		.start   = LS1X_CAN0_BASE,
+		.end     = LS1X_CAN0_BASE + 0x100 - 1,
+		.flags   = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
+	}, {
+		.start   = LS1X_BOARD_CAN0_IRQ,
+		.end     = LS1X_BOARD_CAN0_IRQ,
+		.flags   = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
+	},
+};
+
+static struct sja1000_platform_data ls1x_sja1000_platform_data_0 = {
+//	.osc_freq	= 16000000,
+	.ocr		= OCR_TX1_PULLDOWN | OCR_TX0_PUSHPULL,
+	.cdr		= CDR_CBP,
+};
+
+static struct platform_device ls1x_sja1000_0 = {
+	.name = "sja1000_platform",
+	.id = 0,
+	.dev = {
+		.platform_data = &ls1x_sja1000_platform_data_0,
+	},
+	.resource = ls1x_sja1000_resources_0,
+	.num_resources = ARRAY_SIZE(ls1x_sja1000_resources_0),
+};
+#endif	//#ifdef CONFIG_LS1X_CAN0
+#ifdef CONFIG_LS1X_CAN1
+static struct resource ls1x_sja1000_resources_1[] = {
+	{
+		.start   = LS1X_CAN1_BASE,
+		.end     = LS1X_CAN1_BASE + 0x100 - 1,
+		.flags   = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
+	}, {
+		.start   = LS1X_BOARD_CAN1_IRQ,
+		.end     = LS1X_BOARD_CAN1_IRQ,
+		.flags   = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
+	},
+};
+
+static struct sja1000_platform_data ls1x_sja1000_platform_data_1 = {
+//	.osc_freq	= 16000000,
+	.ocr		= OCR_TX1_PULLDOWN | OCR_TX0_PUSHPULL,
+	.cdr		= CDR_CBP,
+};
+
+static struct platform_device ls1x_sja1000_1 = {
+	.name = "sja1000_platform",
+	.id = 1,
+	.dev = {
+		.platform_data = &ls1x_sja1000_platform_data_1,
+	},
+	.resource = ls1x_sja1000_resources_1,
+	.num_resources = ARRAY_SIZE(ls1x_sja1000_resources_1),
+};
+#endif //#ifdef CONFIG_LS1X_CAN1
+#endif //#ifdef CONFIG_CAN_SJA1000_PLATFORM
+
+
+/***********************************************/
+static struct platform_device *ls1b_platform_devices[] __initdata = {
+	&ls1x_uart_device,
+
+#ifdef CONFIG_LS1X_FB0
+	&ls1x_fb0_device,
+#endif
+
+#ifdef CONFIG_MTD_NAND_LS1X
+	&ls1b_nand_device,
+#endif
+
+#ifdef CONFIG_USB_OHCI_HCD_LS1X
+	&ls1x_ohci_device,
+#endif
+#ifdef CONFIG_USB_EHCI_HCD_LS1X
+	&ls1x_ehci_device,
+#endif
+
+#ifdef CONFIG_STMMAC_ETH
+#ifdef CONFIG_LS1X_GMAC0
+	&ls1x_gmac0_mac,
+	&ls1x_gmac0_phy,
+#endif
+#ifdef CONFIG_LS1X_GMAC1
+	&ls1x_gmac1_mac,
+	&ls1x_gmac1_phy,
+#endif
+#endif
+
+#ifdef CONFIG_SOUND_LS1X_AC97
+	&ls1x_audio_device,
+#endif
+
+#if defined(CONFIG_LS1B_SPI0)
+	&ls1b_spi0_device,
+#elif defined(CONFIG_SPI_GPIO)
+	&spi0_gpio_device,
+#endif
+
+#if defined(CONFIG_LS1B_SPI1)
+	&ls1b_spi1_device,
+//elif defined(CONFIG_SPI_GPIO)
+#elif 0
+	&spi1_gpio_device,
+#endif
+
+#if defined(CONFIG_SPI_GPIO) && defined(CONFIG_GPIO_74X165)
+	&spigpio_74x165_device,
+#endif
+
+#ifdef CONFIG_LS1X_WDT
+	&ls1x_wdt_device,
+#endif
+
+#ifdef CONFIG_RTC_DRV_LOONGSON1
+	&ls1x_rtc_device,
+#endif
+
+#ifdef CONFIG_I2C_LS1X
+	&ls1x_i2c0_device,
+	&ls1x_i2c1_device,
+	&ls1x_i2c2_device,
+#endif
+
+#ifdef CONFIG_SENSORS_SHT15
+	&sht15,
+#endif
+
+#ifdef CONFIG_GPIO_PCA953X
+#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
+	&pca9555_leds,
+#endif
+#endif
+
+#ifdef CONFIG_KEYBOARD_GPIO_POLLED
+	&ls1b_gpio_key_device,
+#endif
+	
+#ifdef CONFIG_LS1B_BUZZER
+	&ls1b_gpio_buzzer_device,
+#endif
+
+#ifdef CONFIG_LS1B_PWM_DRIVER
+	&ls1b_pwm_device,
+#endif
+
+#ifdef CONFIG_LS1B_BBDIO
+	&ls1b_bobodogio_dog,
+#endif
+
+#ifdef CONFIG_INPUT_GPIO_ROTARY_ENCODER
+	&rotary_encoder_device,
+#endif
+
+#if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE)
+	&ls1bkbd_device,
+#endif
+
+#ifdef CONFIG_FB_SSD1305
+	&ssd1305fb_device,
+#endif
+#ifdef CONFIG_FB_ST7565
+	&st7565fb_device,
+#endif
+#ifdef CONFIG_FB_ST7920
+	&st7920fb_device,
+#endif
+
+#ifdef CONFIG_KEYBOARD_74X165_GPIO_POLLED
+	&gen74x165_gpio_keys_device,
+#endif
+
+#ifdef CONFIG_LEDS_PWM
+	&ls1x_leds_pwm,
+#endif
+
+#ifdef CONFIG_CAN_SJA1000_PLATFORM
+#ifdef CONFIG_LS1X_CAN0
+	&ls1x_sja1000_0,
+#endif
+#ifdef CONFIG_LS1X_CAN1
+	&ls1x_sja1000_1,
+#endif
+#endif
+
+#ifdef CONFIG_BACKLIGHT_GENERIC
+	&ls1x_bl_dev
+#endif
+#ifdef CONFIG_LCD_PLATFORM
+	&ls1x_lcd_powerdev,
+#endif
+#ifdef CONFIG_BACKLIGHT_PWM
+	&ls1x_pwm_backlight,
+#endif
+};
+
+int __init ls1b_platform_init(void)
+{
+	ls1x_serial_setup();
+
+#ifdef CONFIG_STMMAC_ETH
+	ls1x_gmac_setup();
+#endif
+
+#ifdef CONFIG_CAN_SJA1000_PLATFORM
+	{
+	#ifdef CONFIG_LS1X_CAN0
+	struct sja1000_platform_data *sja1000_pdata = &ls1x_sja1000_platform_data_0;
+	sja1000_pdata->osc_freq = clk_get_rate(clk);
+	#endif
+	#ifdef CONFIG_LS1X_CAN1
+	sja1000_pdata = &ls1x_sja1000_platform_data_1;
+	sja1000_pdata->osc_freq = clk_get_rate(clk);
+	#endif
+
+#ifdef	CONFIG_LS1A_MACH
+	#ifdef CONFIG_LS1X_CAN0
+	/* CAN0å¤�ç”¨è®¾ç½® */
+//	ls1b_gpio_free(NULL, 66);	/* å¼•è„šè®¾ç½®ä¸ºCANæ¨¡å¼� */
+//	ls1b_gpio_free(NULL, 67);
+	*(volatile int *)0xbfd00420 &= ~(1<<17 | 3<<14 );	/* ä¸ŽI2C3 SPI0å¤�ç”¨ */
+	#endif
+	#ifdef CONFIG_LS1X_CAN1
+	/* CAN1å¤�ç”¨è®¾ç½® */
+//	ls1b_gpio_free(NULL, 68);	/* å¼•è„šè®¾ç½®ä¸ºCANæ¨¡å¼� */
+//	ls1b_gpio_free(NULL, 69);
+	*(volatile int *)0xbfd00420 &= ~(1<<31 | 1<<16 | 3<<12);	/* ä¸ŽNAND I2C2 SPI1å¤�ç”¨ */
+	#endif
+#elif	CONFIG_LS1B_MACH
+	*(volatile int *)0xbfd00424 &= ~(1<<23);	/* ä¸ŽSPI1å¤�ç”¨ */
+	#ifdef CONFIG_LS1X_CAN0
+	/* CAN0å¤�ç”¨è®¾ç½® */
+//	ls1b_gpio_free(NULL, 38);	/* å¼•è„šè®¾ç½®ä¸ºCANæ¨¡å¼� */
+//	ls1b_gpio_free(NULL, 39);
+	*(volatile int *)0xbfd00420 &= ~(1<<24);	/* ä¸ŽI2C1å¤�ç”¨ */
+	*(volatile int *)0xbfd00424 &= ~(1<<4);	/* ä¸ŽUART1_2å¤�ç”¨ */
+	#endif
+	#ifdef CONFIG_LS1X_CAN1
+	/* CAN1å¤�ç”¨è®¾ç½® */
+//	ls1b_gpio_free(NULL, 40);	/* å¼•è„šè®¾ç½®ä¸ºCANæ¨¡å¼� */
+//	ls1b_gpio_free(NULL, 41);
+	*(volatile int *)0xbfd00420 &= ~(1<<25);	/* ä¸ŽI2C2å¤�ç”¨ */
+	*(volatile int *)0xbfd00424 &= ~(1<<5);	/* ä¸ŽUART1_3å¤�ç”¨ */
+	#endif
+#endif
+	}
+#endif	//#ifdef CONFIG_CAN_SJA1000_PLATFORM
+
+#ifdef CONFIG_I2C_LS1X
+	i2c_register_board_info(0, ls1x_i2c0_devs, ARRAY_SIZE(ls1x_i2c0_devs));
+#endif
+
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+	/* è½®è¯¢æ–¹å¼�æˆ–ä¸­æ–­æ–¹å¼�æŽ¢æµ‹cardçš„æ�’æ‹” */
+	gpio_request(DETECT_GPIO, "MMC_SPI GPIO detect");
+	gpio_direction_input(DETECT_GPIO);		/* è¾“å…¥ä½¿èƒ½ */
+#endif
+
+#ifdef CONFIG_TOUCHSCREEN_ADS7846
+	ads7846_detect_penirq();
+#endif
+
+#if defined(CONFIG_LS1B_SPI0)
+	/* disable gpio24-27 */
+	*(volatile unsigned int *)0xbfd010c0 &= ~(0xf << 24);
+	spi_register_board_info(ls1b_spi0_devices, ARRAY_SIZE(ls1b_spi0_devices));
+#elif defined(CONFIG_SPI_GPIO)
+	spi_register_board_info(spi0_gpio_devices, ARRAY_SIZE(spi0_gpio_devices));
+#endif
+
+#if defined(CONFIG_LS1B_SPI1)
+	/* ä½¿èƒ½SPI1æŽ§åˆ¶å™¨ï¼Œä¸ŽCAN0 CAN1 GPIO38-GPIO41å¤�ç”¨,å�Œæ—¶å� ç”¨PWM0 PWM1ç”¨äºŽç‰‡é€‰. */
+	/* ç¼–ç¨‹éœ€è¦�æ³¨æ„� */
+	*(volatile unsigned int *)0xbfd00424 |= (0x3 << 23);
+	/* disable gpio38-41 */
+	*(volatile unsigned int *)0xbfd010c4 &= ~(0xf << 6);
+	spi_register_board_info(ls1b_spi1_devices, ARRAY_SIZE(ls1b_spi1_devices));
+//#elif defined(CONFIG_SPI_GPIO)
+#elif 0
+	spi_register_board_info(spi1_gpio_devices, ARRAY_SIZE(spi1_gpio_devices));
+#endif
+
+#if defined(CONFIG_SPI_GPIO) && defined(CONFIG_GPIO_74X165)
+	spi_register_board_info(spi3_gpio_devices, ARRAY_SIZE(spi3_gpio_devices));
+#endif
+
+#ifdef CONFIG_BACKLIGHT_GENERIC
+	gpio_request(GPIO_BACKLIGHT_CTRL, "backlight");
+#endif
+#ifdef CONFIG_LCD_PLATFORM
+	gpio_request(GPIO_BACKLIGHT_CTRL, "lcd_enable");
+#endif
+	return platform_add_devices(ls1b_platform_devices, ARRAY_SIZE(ls1b_platform_devices));
+}
+
+arch_initcall(ls1b_platform_init);
+
diff -uNra linux-3.0.82/arch/mips/loongson/ls1x/ls1b-core/Makefile linux-3.0.82x/arch/mips/loongson/ls1x/ls1b-core/Makefile
--- linux-3.0.82/arch/mips/loongson/ls1x/ls1b-core/Makefile	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/ls1x/ls1b-core/Makefile	2017-09-23 03:42:49.394676970 +0800
@@ -0,0 +1,4 @@
+#
+#
+
+obj-$(CONFIG_LS1B_CORE_BOARD) += platform.o
diff -uNra linux-3.0.82/arch/mips/loongson/ls1x/ls1b-core/platform.c linux-3.0.82x/arch/mips/loongson/ls1x/ls1b-core/platform.c
--- linux-3.0.82/arch/mips/loongson/ls1x/ls1b-core/platform.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/ls1x/ls1b-core/platform.c	2017-09-23 03:42:49.394676970 +0800
@@ -0,0 +1,1857 @@
+/*
+ * Copyright (c) 2012 Tang, Haifeng <tanghaifeng-gz@loongson.cn>
+ * Platform device support for GS232 SoCs.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/resource.h>
+#include <linux/serial_8250.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/delay.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/flash.h>
+#include <linux/spi/ads7846.h>
+#include <linux/spi/mmc_spi.h>
+#include <linux/spi/spi_gpio.h>
+#include <linux/mmc/host.h>
+#include <linux/phy.h>
+#include <linux/stmmac.h>
+#include <linux/i2c.h>
+#include <linux/i2c/tsc2007.h>
+#include <linux/i2c/ft5x06_ts.h>
+#include <linux/videodev2.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <linux/input/matrix_keypad.h>
+#include <linux/input/74x165_gpio_keys_polled.h>
+#include <linux/rotary_encoder.h>
+#include <linux/ssd1305.h>
+#include <linux/st7920.h>
+#include <linux/clk.h>
+#include <linux/jbt6k74.h>
+#include <linux/leds.h>
+#include <linux/leds_pwm.h>
+
+#include <video/ls1xfb.h>
+#include <media/gc0308_platform.h>
+
+#include <ls1b_board.h>
+#include <irq.h>
+#include <spi.h>
+#include <asm/gpio.h>
+#include <asm-generic/sizes.h>
+
+#ifdef CONFIG_MTD_NAND_LS1X
+struct ls1b_nand_platform_data{
+    int enable_arbiter;
+    struct mtd_partition *parts;
+    unsigned int nr_parts;
+};
+
+#define	SZ_100M	(100*1024*1024)
+
+static struct mtd_partition ls1b_nand_partitions[]={
+#if 1
+	[0] = {
+		.name   ="kernel",
+		.offset =MTDPART_OFS_APPEND,
+		.size   =0xe00000,
+//	        .mask_flags =   MTD_WRITEABLE,
+	},
+	[1] = {
+		.name   ="os",
+		.offset = MTDPART_OFS_APPEND,
+		.size   = SZ_100M,
+
+	},
+	[2] = {
+		.name   ="data",
+		.offset = MTDPART_OFS_APPEND,
+		.size   = MTDPART_SIZ_FULL,
+	},
+#else
+    [0] = {
+        .name   ="kernel",
+        .offset =0,
+        .size   =0xe00000,
+//        .mask_flags =   MTD_WRITEABLE,
+    },
+    [1] = {
+        .name   ="os",
+        .offset = 0xe00000,
+        .size   = 0x7100000,
+    
+    },
+#endif
+};
+
+static struct ls1b_nand_platform_data ls1b_nand_parts = {
+	.enable_arbiter =   1,
+	.parts          =   ls1b_nand_partitions,
+	.nr_parts       =   ARRAY_SIZE(ls1b_nand_partitions),
+};
+
+static struct resource ls1b_nand_resources[] = {
+    [0] = {
+        .start      =0,
+        .end        =0,
+        .flags      =IORESOURCE_DMA,    
+    },
+    [1] = {
+        .start      =0x1fe78000,
+        .end        =0x1fe78020,
+        .flags      =IORESOURCE_MEM,
+    },
+    [2] = {
+        .start      =0x1fd01160,
+        .end        =0x1fd01160,
+        .flags      =IORESOURCE_MEM,
+    },
+    [3] = {
+        .start      =LS1B_BOARD_DMA0_IRQ,
+        .end        =LS1B_BOARD_DMA0_IRQ,
+        .flags      =IORESOURCE_IRQ,
+    },
+};
+
+struct platform_device ls1b_nand_device = {
+    .name       ="ls1b-nand",
+    .id         =-1,
+    .dev        ={
+        .platform_data = &ls1b_nand_parts,
+    },
+    .num_resources  =ARRAY_SIZE(ls1b_nand_resources),
+    .resource       =ls1b_nand_resources,
+};
+#endif //CONFIG_MTD_NAND_LS1X
+
+#define LS1X_UART(_id)						\
+	{							\
+		.mapbase	= LS1X_UART ## _id ## _BASE,	\
+		.irq		= LS1X_UART ## _id ## _IRQ,	\
+		.iotype		= UPIO_MEM,			\
+		.flags		= UPF_IOREMAP | UPF_FIXED_TYPE,	\
+		.type		= PORT_16550A,			\
+	}
+
+#define LS1X_UART_SHARE(_id, _irq)						\
+	{							\
+		.mapbase	= LS1X_UART ## _id ## _BASE,	\
+		.irq		= LS1X_UART ## _irq ## _IRQ,	\
+		.iotype		= UPIO_MEM,			\
+		.flags		= UPF_IOREMAP | UPF_FIXED_TYPE | UPF_SHARE_IRQ,	\
+		.type		= PORT_16550A,			\
+	}
+
+static struct plat_serial8250_port ls1x_serial8250_port[] = {
+	LS1X_UART(0),
+	LS1X_UART(1),
+	LS1X_UART(2),
+	LS1X_UART(3),
+#ifdef CONFIG_LS1B_MACH
+	LS1X_UART(4),
+	LS1X_UART(5),
+#ifdef CONFIG_MULTIFUNC_CONFIG_SERAIL0
+	LS1X_UART_SHARE(6, 0),
+	LS1X_UART_SHARE(7, 0),
+	LS1X_UART_SHARE(8, 0),
+#endif
+#ifdef CONFIG_MULTIFUNC_CONFIG_SERAIL1
+	LS1X_UART_SHARE(9, 1),
+	LS1X_UART_SHARE(10, 1),
+	LS1X_UART_SHARE(11, 1),
+#endif
+#endif
+	{},
+};
+
+struct platform_device ls1x_uart_device = {
+	.name		= "serial8250",
+	.id		= PLAT8250_DEV_PLATFORM,
+	.dev		= {
+		.platform_data = ls1x_serial8250_port,
+	},
+};
+
+void __init ls1x_serial_setup(void)
+{
+	struct clk *clk;
+	struct plat_serial8250_port *p;
+
+#ifdef CONFIG_MULTIFUNC_CONFIG_SERAIL0
+	__raw_writeb(__raw_readb(UART_SPLIT) | 0x01, UART_SPLIT);
+#endif
+#ifdef CONFIG_MULTIFUNC_CONFIG_SERAIL1
+	__raw_writeb(__raw_readb(UART_SPLIT) | 0x02, UART_SPLIT);
+	__raw_writel(__raw_readl(LS1X_MUX_CTRL1) | UART1_3_USE_CAN1 | UART1_2_USE_CAN0, 
+				LS1X_MUX_CTRL1);
+#endif
+
+	clk = clk_get(NULL, "apb");
+	if (IS_ERR(clk))
+		panic("unable to get apb clock, err=%ld", PTR_ERR(clk));
+
+	for (p = ls1x_serial8250_port; p->flags != 0; ++p)
+		p->uartclk = clk_get_rate(clk);
+}
+
+/* OHCI */
+#ifdef CONFIG_USB_OHCI_HCD_LS1X
+static u64 ls1x_ohci_dma_mask = DMA_BIT_MASK(32);
+static struct resource ls1x_ohci_resources[] = {
+	[0] = {
+		.start          = LS1X_OHCI_BASE,
+		.end            = LS1X_OHCI_BASE + SZ_32K - 1,
+		.flags          = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start          = LS1X_OHCI_IRQ,
+		.end            = LS1X_OHCI_IRQ,
+		.flags          = IORESOURCE_IRQ,
+	},
+};
+/*
+static struct ls1x_usbh_data  ls1x_ohci_platform_data={
+#ifdef CONFIG_LS1A_MACH
+	.ports=4,
+#else
+	.ports=1,
+#endif
+};
+*/
+static struct platform_device ls1x_ohci_device = {
+	.name           = "ls1x-ohci",
+	.id             = 0,
+	.dev = {
+//		.platform_data = &ls1x_ohci_platform_data,
+		.dma_mask = &ls1x_ohci_dma_mask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+	},
+	.num_resources  = ARRAY_SIZE(ls1x_ohci_resources),
+	.resource       = ls1x_ohci_resources,
+};
+#endif //#ifdef CONFIG_USB_OHCI_HCD_LS1X
+
+/* EHCI */
+#ifdef CONFIG_USB_EHCI_HCD_LS1X
+static u64 ls1x_ehci_dma_mask = DMA_BIT_MASK(32);
+static struct resource ls1x_ehci_resources[] = { 
+	[0] = {
+		.start          = LS1X_EHCI_BASE,
+		.end            = LS1X_EHCI_BASE + SZ_32K - 1,
+		.flags          = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start          = LS1X_EHCI_IRQ,
+		.end            = LS1X_EHCI_IRQ,
+		.flags          = IORESOURCE_IRQ,
+	},
+};
+/*
+static struct ls1x_usbh_data  ls1x_ehci_platform_data={
+#ifdef CONFIG_LS1A_MACH
+	.ports=4,
+#else
+	.ports=1,
+#endif
+};
+*/
+static struct platform_device ls1x_ehci_device = {
+	.name           = "ls1x-ehci",
+	.id             = 0,
+	.dev = {
+//		.platform_data = &ls1x_ehci_platform_data,
+		.dma_mask = &ls1x_ehci_dma_mask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+	},
+	.num_resources  = ARRAY_SIZE(ls1x_ehci_resources),
+	.resource       = ls1x_ehci_resources,
+};
+#endif //#ifdef CONFIG_USB_EHCI_HCD_LS1X
+
+/*
+* watchdog
+*/
+#ifdef CONFIG_LS1X_WDT
+static struct resource ls1x_wdt_resource[] = {
+	[0]={
+		.start      = LS1X_WDT_BASE,
+		.end        = (LS1X_WDT_BASE + 0x8),
+		.flags      = IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device ls1x_wdt_device = {
+	.name       = "ls1x-wdt",
+	.id         = -1,
+	.num_resources  = ARRAY_SIZE(ls1x_wdt_resource),
+	.resource   = ls1x_wdt_resource,
+};
+#endif //#ifdef CONFIG_LS1X_WDT
+
+/*
+*RTC
+*/
+#ifdef CONFIG_RTC_DRV_LOONGSON1
+static struct platform_device ls1x_rtc_device = {
+	.name       = "ls1x-rtc",
+	.id         = -1,
+};
+#endif //#ifdef CONFIG_RTC_DRV_LOONGSON1
+
+/*
+*I2C
+*/
+/* I2C devices fitted. */
+#ifdef CONFIG_TOUCHSCREEN_TSC2007
+#define TSC2007_GPIO_IRQ	60
+static int ts_get_pendown_state(void)
+{
+	return !gpio_get_value(TSC2007_GPIO_IRQ);
+}
+
+int ts_init(void)
+{
+	gpio_request(TSC2007_GPIO_IRQ, "tsc2007 gpio irq");
+	gpio_direction_input(TSC2007_GPIO_IRQ);
+	return 0;
+}
+
+static struct tsc2007_platform_data tsc2007_info = {
+	.model				= 2007,
+	.x_plate_ohms		= 180,
+	.get_pendown_state	= ts_get_pendown_state,
+	.init_platform_hw	= ts_init,
+};
+#endif //#ifdef CONFIG_TOUCHSCREEN_TSC2007
+
+#ifdef CONFIG_TOUCHSCREEN_FT5X0X
+#define FT5X0X_GPIO_IRQ		38
+#define FT5X0X_GPIO_WAUP	39
+int ft5x0x_irq_init(void)
+{
+	gpio_request(FT5X0X_GPIO_IRQ, "ft5x0x gpio irq");
+	gpio_direction_input(FT5X0X_GPIO_IRQ);		/* è¾“å…¥ä½¿èƒ½ */
+	return 0;
+}
+
+int ft5x0x_wake_up(void)
+{
+	gpio_direction_output(FT5X0X_GPIO_WAUP, 0);		/* è¾“å‡ºä½¿èƒ½ */
+	msleep(10);
+	gpio_set_value(FT5X0X_GPIO_WAUP, 1);
+	msleep(10);
+	return 0;
+}
+
+static struct ft5x0x_ts_platform_data ft5x0x_info = {
+	.init_platform_hw	= ft5x0x_irq_init,
+	.wake_platform_hw	= ft5x0x_wake_up,
+};
+#endif //#ifdef CONFIG_TOUCHSCREEN_FT5X0X
+
+#ifdef CONFIG_VIDEO_GC0308
+static struct gc0308_platform_data gc0308_plat = {
+	.default_width = 640,
+	.default_height = 480,
+	.pixelformat = V4L2_PIX_FMT_YUYV,
+	.freq = 24000000,
+	.is_mipi = 0,
+};
+#endif //#ifdef CONFIG_VIDEO_GC0308
+
+#ifdef CONFIG_GPIO_PCA953X
+#include <linux/i2c/pca953x.h>
+#define PCA9555_GPIO_BASE 170
+#define PCA9555_IRQ_BASE 170
+#define PCA9555_GPIO_IRQ 8
+
+#define PCA9555_DO0 (PCA9555_GPIO_BASE+0)
+#define PCA9555_DO1 (PCA9555_GPIO_BASE+1)
+#define PCA9555_DO2 (PCA9555_GPIO_BASE+2)
+#define PCA9555_DO3 (PCA9555_GPIO_BASE+3)
+#define PCA9555_DO4 (PCA9555_GPIO_BASE+4)
+#define PCA9555_DO5 (PCA9555_GPIO_BASE+5)
+#define PCA9555_DO6 (PCA9555_GPIO_BASE+6)
+#define PCA9555_DO7 (PCA9555_GPIO_BASE+7)
+
+#define PCA9555_EMERG_OFF (PCA9555_GPIO_BASE+10)
+#define PCA9555_PWRKEY (PCA9555_GPIO_BASE+11)
+
+#define PCA9555_LED0 (PCA9555_GPIO_BASE+8)
+#define PCA9555_LED1 (PCA9555_GPIO_BASE+12)
+#define PCA9555_LED2 (PCA9555_GPIO_BASE+13)
+#define PCA9555_LED3 (PCA9555_GPIO_BASE+14)
+#define PCA9555_LED4 (PCA9555_GPIO_BASE+15)
+
+static int ls1x_pca9555_setup(struct i2c_client *client,
+			       unsigned gpio_base, unsigned ngpio,
+			       void *context)
+{
+#if 0
+	static int ls1x_gpio_value[] = {
+		1, 1, 1, 1, 1, 1, 1, 1, 0, -1, -1, 0, 0, 0, 0, 0
+	};
+	int n;
+
+	gpio_request(PCA9555_GPIO_IRQ, "pca9555 gpio irq");
+	gpio_direction_input(PCA9555_GPIO_IRQ);		/* è¾“å…¥ä½¿èƒ½ */
+
+	for (n = 0; n < ARRAY_SIZE(ls1x_gpio_value); ++n) {
+		gpio_request(gpio_base + n, "ACS-5000 GPIO Expander");
+		if (ls1x_gpio_value[n] < 0)
+			gpio_direction_input(gpio_base + n);
+		else
+			gpio_direction_output(gpio_base + n,
+					      ls1x_gpio_value[n]);
+		gpio_export(gpio_base + n, 0); /* Export, direction locked down */
+	}
+#endif
+	gpio_request(PCA9555_GPIO_IRQ, "pca9555 gpio irq");
+	gpio_direction_input(PCA9555_GPIO_IRQ);
+	return 0;
+}
+
+static struct pca953x_platform_data ls1x_i2c_pca9555_platdata = {
+	.gpio_base	= PCA9555_GPIO_BASE, /* Start directly after the CPU's GPIO */
+	.irq_base = PCA9555_IRQ_BASE,
+//	.invert		= 0, /* Do not invert */
+	.setup		= ls1x_pca9555_setup,
+};
+
+#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
+#include <linux/leds.h>
+struct gpio_led pca9555_gpio_leds[] = {
+	/* gpio for 7 relay purposes */
+	{
+		.name			= "DO0",
+		.gpio			= PCA9555_DO0,
+		.active_low		= 0,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	},{
+		.name			= "DO1",
+		.gpio			= PCA9555_DO1,
+		.active_low		= 0,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	},{
+		.name			= "DO2",
+		.gpio			= PCA9555_DO2,
+		.active_low		= 0,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	},{
+		.name			= "DO3",
+		.gpio			= PCA9555_DO3,
+		.active_low		= 0,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	},{
+		.name			= "DO4",
+		.gpio			= PCA9555_DO4,
+		.active_low		= 0,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	}, {
+		.name			= "DO5",
+		.gpio			= PCA9555_DO5,
+		.active_low		= 0,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	},{
+		.name			= "DO6",
+		.gpio			= PCA9555_DO6,
+		.active_low		= 0,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	},{
+		.name			= "DO7",
+		.gpio			= PCA9555_DO7,
+		.active_low		= 0,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	},
+
+	/* ctrl GPRS */
+	{
+		.name			= "emerg_off",
+		.gpio			= PCA9555_EMERG_OFF,
+		.active_low		= 0,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	}, {
+		.name			= "pwrkey",
+		.gpio			= PCA9555_PWRKEY,
+		.active_low		= 0,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	},
+
+	/* 5 leds */
+	{
+		.name			= "green:run",
+		.gpio			= PCA9555_LED0,
+		.active_low		= 1,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_ON,
+	}, {
+		.name			= "red:channel1",
+		.gpio			= PCA9555_LED1,
+		.active_low		= 1,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	}, {
+		.name			= "red:channel2",
+		.gpio			= PCA9555_LED2,
+		.active_low		= 1,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	}, {
+		.name			= "red:channel3",
+		.gpio			= PCA9555_LED3,
+		.active_low		= 1,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	}, {
+		.name			= "red:channel4",
+		.gpio			= PCA9555_LED4,
+		.active_low		= 1,
+		.default_trigger	= "none",
+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
+	},
+};
+
+static struct gpio_led_platform_data pca9555_gpio_led_info = {
+	.leds		= pca9555_gpio_leds,
+	.num_leds	= ARRAY_SIZE(pca9555_gpio_leds),
+};
+
+static struct platform_device pca9555_leds = {
+	.name	= "leds-gpio",
+	.id	= 0,
+	.dev	= {
+		.platform_data	= &pca9555_gpio_led_info,
+	}
+};
+#endif //#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
+#endif //#ifdef CONFIG_GPIO_PCA953X
+
+#ifdef CONFIG_I2C_LS1X
+static struct i2c_board_info __initdata ls1x_i2c0_devs[] = {
+#ifdef CONFIG_TOUCHSCREEN_TSC2007
+	{
+		I2C_BOARD_INFO("tsc2007", 0x48),
+		.irq = LS1X_GPIO_FIRST_IRQ + TSC2007_GPIO_IRQ,
+		.platform_data	= &tsc2007_info,
+	},
+#endif
+#ifdef CONFIG_TOUCHSCREEN_FT5X0X
+	{
+		I2C_BOARD_INFO(FT5X0X_NAME, 0x38),
+		.irq = LS1X_GPIO_FIRST_IRQ + FT5X0X_GPIO_IRQ,
+		.platform_data	= &ft5x0x_info,
+	},
+#endif
+#ifdef CONFIG_VIDEO_GC0308
+	{
+		I2C_BOARD_INFO("GC0308", 0x42 >> 1),
+		.platform_data = &gc0308_plat,
+	},
+#endif
+#ifdef CONFIG_GPIO_PCA953X
+	{
+		I2C_BOARD_INFO("pca9555", 0x27),
+		.irq = LS1X_GPIO_FIRST_IRQ + PCA9555_GPIO_IRQ,
+		.platform_data = &ls1x_i2c_pca9555_platdata,
+	},
+#endif
+};
+
+static struct resource ls1x_i2c0_resource[] = {
+	[0]={
+		.start	= LS1X_I2C0_BASE,
+		.end	= LS1X_I2C0_BASE + SZ_16K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device ls1x_i2c0_device = {
+	.name		= "ls1x-i2c",
+	.id			= 0,
+	.num_resources	= ARRAY_SIZE(ls1x_i2c0_resource),
+	.resource	= ls1x_i2c0_resource,
+};
+
+static struct resource ls1x_i2c1_resource[] = {
+	[0]={
+		.start	= LS1X_I2C1_BASE,
+		.end	= LS1X_I2C1_BASE + SZ_16K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device ls1x_i2c1_device = {
+	.name		= "ls1x-i2c",
+	.id			= 1,
+	.num_resources	= ARRAY_SIZE(ls1x_i2c1_resource),
+	.resource	= ls1x_i2c1_resource,
+};
+
+static struct resource ls1x_i2c2_resource[] = {
+	[0]={
+		.start	= LS1X_I2C2_BASE,
+		.end	= LS1X_I2C2_BASE + SZ_16K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device ls1x_i2c2_device = {
+	.name		= "ls1x-i2c",
+	.id			= 2,
+	.num_resources	= ARRAY_SIZE(ls1x_i2c2_resource),
+	.resource	= ls1x_i2c2_resource,
+};
+#endif //#ifdef CONFIG_I2C_LS1X
+
+/*
+ * lcd
+ */
+#if defined(CONFIG_FB_LOONGSON1)
+#include "../video_modes.c"
+#ifdef CONFIG_LS1X_FB0
+static struct resource ls1x_fb0_resource[] = {
+	[0] = {
+		.start = LS1X_DC0_BASE,
+		.end   = LS1X_DC0_BASE + 0x0010 - 1,	/* 1M? */
+		.flags = IORESOURCE_MEM,
+	},
+};
+
+struct ls1xfb_mach_info ls1x_lcd0_info = {
+	.id			= "Graphic lcd",
+	.modes			= video_modes,
+	.num_modes		= ARRAY_SIZE(video_modes),
+	.pix_fmt		= PIX_FMT_RGB565,
+	.active			= 1,
+	/* æ ¹æ�®lcdå±�ä¿®æ”¹invert_pixclockå’Œinvert_pixdeå�‚æ•°(0æˆ–1)ï¼Œéƒ¨åˆ†lcdå�¯èƒ½æ˜¾ç¤ºä¸�æ­£å¸¸ */
+	.invert_pixclock	= 0,
+	.invert_pixde	= 0,
+};
+
+struct platform_device ls1x_fb0_device = {
+	.name			= "ls1x-fb",
+	.id				= 0,
+	.num_resources	= ARRAY_SIZE(ls1x_fb0_resource),
+	.resource		= ls1x_fb0_resource,
+	.dev			= {
+		.platform_data = &ls1x_lcd0_info,
+	}
+};
+#endif	//#ifdef CONFIG_LS1X_FB0
+#endif	//#if defined(CONFIG_FB_LOONGSON1)
+
+#define GPIO_BACKLIGHT_CTRL	53
+#ifdef CONFIG_BACKLIGHT_GENERIC
+#include <linux/backlight.h>
+static void ls1x_bl_set_intensity(int intensity)
+{
+	if (intensity)
+		gpio_direction_output(GPIO_BACKLIGHT_CTRL, 1);
+	else
+		gpio_direction_output(GPIO_BACKLIGHT_CTRL, 0);
+}
+
+static struct generic_bl_info ls1x_bl_info = {
+	.name			= "ls1x-bl",
+	.max_intensity		= 0xff,
+	.default_intensity	= 0xff,
+	.set_bl_intensity	= ls1x_bl_set_intensity,
+};
+
+static struct platform_device ls1x_bl_dev = {
+	.name			= "generic-bl",
+	.id			= 1,
+	.dev = {
+		.platform_data	= &ls1x_bl_info,
+	},
+};
+#endif //#ifdef CONFIG_BACKLIGHT_GENERIC
+
+#ifdef CONFIG_LCD_PLATFORM
+#include <video/platform_lcd.h>
+static void ls1x_lcd_power_set(struct plat_lcd_data *pd,
+				   unsigned int power)
+{
+	if (power)
+		gpio_direction_output(GPIO_BACKLIGHT_CTRL, 1);
+	else
+		gpio_direction_output(GPIO_BACKLIGHT_CTRL, 0);
+}
+
+static struct plat_lcd_data ls1x_lcd_power_data = {
+	.set_power		= ls1x_lcd_power_set,
+};
+
+static struct platform_device ls1x_lcd_powerdev = {
+	.name			= "platform-lcd",
+	.dev.parent		= &ls1x_fb0_device.dev,
+	.dev.platform_data	= &ls1x_lcd_power_data,
+};
+#endif //#ifdef CONFIG_LCD_PLATFORM
+
+#ifdef CONFIG_BACKLIGHT_PWM
+#include <linux/pwm_backlight.h>
+static struct platform_pwm_backlight_data ls1x_backlight_data = {
+	.pwm_id		= 2,
+	.max_brightness	= 255,
+	.dft_brightness	= 100,
+	.pwm_period_ns	= 7812500,
+};
+
+static struct platform_device ls1x_pwm_backlight = {
+	.name = "pwm-backlight",
+	.dev = {
+		.platform_data = &ls1x_backlight_data,
+	},
+};
+#endif //#ifdef CONFIG_BACKLIGHT_PWM
+
+//gmac
+#ifdef CONFIG_STMMAC_ETH
+void __init ls1x_gmac_setup(void)
+{
+#ifdef CONFIG_LS1X_GMAC0
+{
+	u32 x;
+	x = __raw_readl(LS1X_MUX_CTRL1);
+	#if defined(CONFIG_LS1X_GMAC0_100M)
+	x = x | GMAC0_USE_TXCLK | GMAC0_USE_PWM01;
+	#elif defined(CONFIG_LS1X_GMAC0_1000M)
+	x = x & (~GMAC0_USE_TXCLK) & (~GMAC0_USE_PWM01);
+	#endif
+	__raw_writel(x & (~GMAC0_SHUT), LS1X_MUX_CTRL1);
+}
+#endif
+#ifdef CONFIG_LS1X_GMAC1
+{
+	u32 x;
+	x = __raw_readl(LS1X_MUX_CTRL0);
+	x = x | GMAC1_USE_UART1 | GMAC1_USE_UART0;	/* å¤�ç”¨UART0&1 */
+	__raw_writel(x, LS1X_MUX_CTRL0);
+	x = __raw_readl(LS1X_MUX_CTRL1);
+	#if defined(CONFIG_LS1X_GMAC1_100M)
+	x = x | GMAC1_USE_TXCLK | GMAC1_USE_PWM23;
+	#elif defined(CONFIG_LS1X_GMAC1_1000M)
+	x = x & (~GMAC1_USE_TXCLK) & (~GMAC1_USE_PWM23);
+	#endif
+	__raw_writel(x & (~GMAC1_SHUT), LS1X_MUX_CTRL1);
+}
+#endif
+}
+
+#ifdef CONFIG_LS1X_GMAC0
+static struct resource ls1x_mac0_resources[] = {
+	[0] = {
+		.start  = LS1X_GMAC0_BASE,
+		.end    = LS1X_GMAC0_BASE + SZ_8K - 1,
+		.flags  = IORESOURCE_MEM,
+	},
+	[1] = {
+		.name   = "macirq",
+		.start  = LS1X_GMAC0_IRQ,
+		.flags  = IORESOURCE_IRQ,
+	},
+};
+
+static struct plat_stmmacenet_data ls1x_mac0_data = {
+	.bus_id = 0,
+	.pbl = 0,
+	.has_gmac = 1,
+	.enh_desc = 0,
+};
+
+struct platform_device ls1x_gmac0_mac = {
+	.name           = "stmmaceth",
+	.id             = 0,
+	.num_resources  = ARRAY_SIZE(ls1x_mac0_resources),
+	.resource       = ls1x_mac0_resources,
+	.dev            = {
+		.platform_data = &ls1x_mac0_data,
+	},
+};
+
+static struct plat_stmmacphy_data  phy0_private_data = {
+	.bus_id = 0,
+#ifdef CONFIG_RTL8305SC
+	.phy_addr = 4,
+#else
+	.phy_addr = 0,
+#endif
+	.phy_mask = 0,
+	.interface = PHY_INTERFACE_MODE_MII,
+	
+};
+
+struct platform_device ls1x_gmac0_phy = {
+	.name = "stmmacphy",
+	.id = 0,
+	.num_resources = 1,
+	.resource = (struct resource[]){
+		{
+			.name = "phyirq",
+			.start = PHY_POLL,
+			.end = PHY_POLL,
+			.flags = IORESOURCE_IRQ,
+		},
+	},
+	.dev = {
+		.platform_data = &phy0_private_data,
+	},
+};
+#endif //#ifdef CONFIG_LS1X_GMAC0
+
+#ifdef CONFIG_LS1X_GMAC1
+static struct resource ls1x_mac1_resources[] = {
+	[0] = {
+		.start  = LS1X_GMAC1_BASE,
+		.end    = LS1X_GMAC1_BASE + SZ_8K - 1,
+		.flags  = IORESOURCE_MEM,
+	},
+	[1] = {
+		.name   = "macirq",
+		.start  = LS1X_GMAC1_IRQ,
+		.flags  = IORESOURCE_IRQ,
+	},
+};
+
+static struct plat_stmmacenet_data ls1x_mac1_data = {
+	.bus_id = 1,
+	.pbl = 0,
+	.has_gmac = 1,
+	.enh_desc = 0,
+};
+
+struct platform_device ls1x_gmac1_mac = {
+	.name           = "stmmaceth",
+	.id             = 1,
+	.num_resources  = ARRAY_SIZE(ls1x_mac1_resources),
+	.resource       = ls1x_mac1_resources,
+	.dev            = {
+		.platform_data = &ls1x_mac1_data,
+	},
+};
+
+static struct plat_stmmacphy_data  phy1_private_data = {
+	.bus_id = 1,
+	.phy_addr = 1,
+	.phy_mask = 0,
+	.interface = PHY_INTERFACE_MODE_MII,
+	
+};
+
+struct platform_device ls1x_gmac1_phy = {
+	.name = "stmmacphy",
+	.id = 1,
+	.num_resources = 1,
+	.resource = (struct resource[]){
+		{
+			.name = "phyirq",
+			.start = PHY_POLL,
+			.end = PHY_POLL,
+			.flags = IORESOURCE_IRQ,
+		},
+	},
+	.dev = {
+		.platform_data = &phy1_private_data,
+	},
+};
+#endif //#ifdef CONFIG_LS1X_GMAC1
+#endif //#ifdef CONFIG_STMMAC_ETH
+
+#ifdef CONFIG_SOUND_LS1X_AC97
+static struct resource ls1x_ac97_resource[] = {
+	[0]={
+		.start	= LS1X_AC97_BASE,
+		.end	= LS1X_AC97_BASE + SZ_16K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device ls1x_audio_device = {
+	.name           = "ls1x-audio",
+	.id             = -1,
+	.num_resources	= ARRAY_SIZE(ls1x_ac97_resource),
+	.resource		= ls1x_ac97_resource,
+};
+#endif
+
+#ifdef CONFIG_MTD_M25P80
+static struct mtd_partition partitions[] = {
+	[0] = {
+		.name		= "pmon_spi",
+		.offset		= 0,
+		.size		= 512 * 1024,	//512KB
+	//	.mask_flags	= MTD_WRITEABLE,
+	},
+};
+
+static struct flash_platform_data flash __maybe_unused = {
+	.name		= "ls1b_norflash",
+	.parts		= partitions,
+	.nr_parts	= ARRAY_SIZE(partitions),
+	.type		= "w25q64",
+};
+#endif /* CONFIG_MTD_M25P80 */
+
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+/* å¼€å�‘æ�¿ä½¿ç”¨GPIO40(CAN1_RX)å¼•è„šä½œä¸ºMMC/SDå�¡çš„æ�’æ‹”æŽ¢æµ‹å¼•è„š */
+#define DETECT_GPIO	3
+#if 1
+/* è½®è¯¢æ–¹å¼�æŽ¢æµ‹cardçš„æ�’æ‹” */
+static int mmc_spi_get_cd(struct device *dev)
+{
+	return !gpio_get_value(DETECT_GPIO);
+}
+#else
+#define MMC_SPI_CARD_DETECT_INT  (LS1X_GPIO_FIRST_IRQ + DETECT_GPIO)
+/* ä¸­æ–­æ–¹å¼�æ–¹å¼�æŽ¢æµ‹cardçš„æ�’æ‹”ï¼Œç”±äºŽloongson1 CPUä¸�æ”¯æŒ�å�Œè¾¹æ²¿è§¦å�‘ æ‰€ä»¥ä¸�å»ºè®®ä½¿ç”¨ä¸­æ–­æ–¹å¼� */
+static int ls1b_mmc_spi_init(struct device *dev,
+	irqreturn_t (*detect_int)(int, void *), void *data)
+{
+	return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
+		IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
+}
+/* é‡Šæ”¾ä¸­æ–­ */
+static void ls1b_mmc_spi_exit(struct device *dev, void *data)
+{
+	free_irq(MMC_SPI_CARD_DETECT_INT, data);
+}
+#endif
+
+static struct mmc_spi_platform_data mmc_spi __maybe_unused = {
+	/* ä¸­æ–­æ–¹å¼�æ–¹å¼�æŽ¢æµ‹cardçš„æ�’æ‹” */
+//	.init = ls1b_mmc_spi_init,
+//	.exit = ls1b_mmc_spi_exit,
+//	.detect_delay = 1200,	/* msecs */
+	/* è½®è¯¢æ–¹å¼�æ–¹å¼�æŽ¢æµ‹cardçš„æ�’æ‹” */
+	.get_cd = mmc_spi_get_cd,
+	.caps = MMC_CAP_NEEDS_POLL,
+};	
+#endif  /* defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) */
+
+#ifdef CONFIG_TOUCHSCREEN_ADS7846
+#define ADS7846_GPIO_IRQ 29 /* å¼€å�‘æ�¿è§¦æ‘¸å±�ä½¿ç”¨çš„å¤–éƒ¨ä¸­æ–­ */
+int ads7846_pendown_state(void)
+{
+	return !gpio_get_value(ADS7846_GPIO_IRQ);
+}
+	
+static void ads7846_detect_penirq(void)
+{
+	gpio_request(ADS7846_GPIO_IRQ, "ads7846 gpio irq");
+	gpio_direction_input(ADS7846_GPIO_IRQ);
+}
+	
+static struct ads7846_platform_data ads_info __maybe_unused = {
+	.model				= 7846,
+	.vref_delay_usecs	= 1,
+	.keep_vref_on		= 0,
+	.settle_delay_usecs	= 20,
+//	.x_plate_ohms		= 800,
+	.pressure_min		= 0,
+	.pressure_max		= 2048,
+	.debounce_rep		= 3,
+	.debounce_max		= 10,
+	.debounce_tol		= 50,
+	.get_pendown_state	= ads7846_pendown_state,
+	.filter_init		= NULL,
+	.filter 			= NULL,
+	.filter_cleanup 	= NULL,
+};
+#endif /* TOUCHSCREEN_ADS7846 */
+
+#ifdef CONFIG_LCD_JBT6K74
+/* JBT6k74 display controller */
+static void gta02_jbt6k74_probe_completed(struct device *dev)
+{
+//	pcf50633_bl_set_brightness_limit(gta02_pcf, 0x3f);
+}
+
+const struct jbt6k74_platform_data jbt6k74_pdata = {
+//	.gpio_reset = 41,
+};
+#endif
+
+#if defined(CONFIG_LS1B_SPI0)
+static struct spi_board_info ls1b_spi0_devices[] = {
+#ifdef CONFIG_MTD_M25P80
+	{
+		.modalias	= "w25q64",
+		.bus_num 		= 0,
+		.chip_select	= SPI0_CS0,
+		.max_speed_hz	= 80000000,
+		.platform_data	= &flash,
+	},
+#endif
+#ifdef CONFIG_SPI_MCP3201
+	{
+		.modalias	= "mcp3201",
+		.bus_num 	= 0,
+		.chip_select	= SPI0_CS3,
+		.max_speed_hz	= 1000000,
+	},
+#endif
+#ifdef CONFIG_TOUCHSCREEN_ADS7846
+	{
+		.modalias = "ads7846",
+		.platform_data = &ads_info,
+		.bus_num 		= 0,
+		.chip_select 	= SPI0_CS1,
+		.max_speed_hz 	= 2500000,
+		.mode 			= SPI_MODE_1,
+		.irq				= LS1X_GPIO_FIRST_IRQ + ADS7846_GPIO_IRQ,
+	},
+#endif
+};
+	
+static struct resource ls1b_spi0_resource[] = {
+	[0]={
+		.start	= LS1B_BOARD_SPI0_BASE,
+		.end	= (LS1B_BOARD_SPI0_BASE + 0x6),
+		.flags	= IORESOURCE_MEM,
+	},
+	[1]={
+		.start	= LS1B_BOARD_SPI0_IRQ,
+		.end	= LS1B_BOARD_SPI0_IRQ,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct ls1b_spi_info ls1b_spi0_platdata = {
+	.board_size = ARRAY_SIZE(ls1b_spi0_devices),
+	.board_info = ls1b_spi0_devices,
+	.bus_num	= 0,
+	.num_cs		= SPI0_CS3 + 1,
+};
+
+static struct platform_device ls1b_spi0_device = {
+	.name		= "ls1b-spi",
+	.id 		= 0,
+	.num_resources	= ARRAY_SIZE(ls1b_spi0_resource),
+	.resource	= ls1b_spi0_resource,
+	.dev		= {
+		.platform_data	= &ls1b_spi0_platdata,//&ls1b_spi_devices,
+	},
+};
+
+#elif defined(CONFIG_SPI_GPIO)	/* ä½¿ç”¨GPIOæ¨¡æ‹ŸSPIä»£æ›¿ */
+struct spi_gpio_platform_data spi0_gpio_platform_data = {
+	.sck = 24,	/*gpio24*/
+	.mosi = 26,	/*gpio26*/
+	.miso = 25,	/*gpio25*/
+	.num_chipselect = 3,
+};
+
+static struct platform_device spi0_gpio_device = {
+	.name = "spi_gpio",
+	.id   = 2,	/* ç”¨äºŽåŒºåˆ†spi0å’Œspi1 */
+	.dev = {
+		.platform_data = &spi0_gpio_platform_data,
+	},
+};
+
+static struct spi_board_info spi0_gpio_devices[] = {
+#ifdef CONFIG_MTD_M25P80
+	{
+		.modalias	= "w25q64",
+		.bus_num 		= 2,	/* å¯¹åº”spigpio_deviceçš„.id=2 */
+		.controller_data = (void *)27,	/*gpio27*/
+		.chip_select	= 0,
+		.max_speed_hz	= 80000000,
+		.platform_data	= &flash,
+	},
+#endif
+#ifdef CONFIG_TOUCHSCREEN_ADS7846
+	{
+		.modalias = "ads7846",
+		.platform_data = &ads_info,
+		.bus_num 		= 2,	/* å¯¹åº”spigpio_deviceçš„.id=2 */
+		.controller_data = (void *)28,	/*gpio28*/
+		.chip_select 	= 1,
+		.max_speed_hz 	= 2500000,
+		.mode 			= SPI_MODE_1,
+		.irq			= LS1X_GPIO_FIRST_IRQ + ADS7846_GPIO_IRQ,
+	},
+#endif
+#ifdef CONFIG_LCD_JBT6K74
+	{
+		.modalias	= "jbt6k74",
+		.platform_data	= &jbt6k74_pdata,
+		.bus_num	= 2,		/* å¯¹åº”spigpio_deviceçš„.id=2 */
+		.controller_data = (void *)43,	/*gpio43*/
+		.chip_select = 2,
+		/* irq */
+		.max_speed_hz	= 100 * 1000,
+	},
+#endif
+};
+#endif //#ifdef CONFIG_LS1B_SPI0
+
+#if defined(CONFIG_LS1B_SPI1) /* SPI1 æŽ§åˆ¶å™¨ */
+static struct spi_board_info ls1b_spi1_devices[] = {
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+	{
+		.modalias		= "mmc_spi",
+		.bus_num 		= 1,
+		.chip_select	= SPI1_CS0,
+		.max_speed_hz	= 25000000,
+		.platform_data	= &mmc_spi,
+	},
+#endif
+	{
+		.modalias		= "spidev",
+		.bus_num 		= 1,
+		.chip_select	= SPI1_CS1,
+		.max_speed_hz	= 25000000,
+		.mode = SPI_MODE_0,
+	}, {
+		.modalias		= "spidev",
+		.bus_num 		= 1,
+		.chip_select	= SPI1_CS2,
+		.max_speed_hz	= 25000000,
+		.mode = SPI_MODE_0,
+	},
+};
+
+static struct resource ls1b_spi1_resource[] = {
+	[0]={
+		.start	= LS1B_BOARD_SPI1_BASE,
+		.end	= (LS1B_BOARD_SPI1_BASE + 0x6),
+		.flags	= IORESOURCE_MEM,
+	},
+	[1]={
+		.start	= LS1B_BOARD_SPI1_IRQ,
+		.end	= LS1B_BOARD_SPI1_IRQ,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct ls1b_spi_info ls1b_spi1_platdata = {
+	.board_size = ARRAY_SIZE(ls1b_spi1_devices),
+	.board_info = ls1b_spi1_devices,
+	.bus_num	= 1,
+	.num_cs		= 3,
+};
+
+static struct platform_device ls1b_spi1_device = {
+	.name		= "ls1b-spi",
+	.id 		= 1,
+	.num_resources	= ARRAY_SIZE(ls1b_spi1_resource),
+	.resource	= ls1b_spi1_resource,
+	.dev		= {
+		.platform_data	= &ls1b_spi1_platdata,//&ls1b_spi_devices,
+	},
+};
+#elif defined(CONFIG_SPI_GPIO)	/* ä½¿ç”¨GPIOæ¨¡æ‹ŸSPIä»£æ›¿ */
+struct spi_gpio_platform_data spi1_gpio_platform_data = {
+	.sck = 39,	/*gpio39*/
+	.mosi = 40,	/*gpio40*/
+	.miso = 41,	/*gpio41*/
+	.num_chipselect = 3,
+};
+
+static struct platform_device spi1_gpio_device = {
+	.name = "spi_gpio",
+	.id   = 3,
+	.dev = {
+		.platform_data = &spi1_gpio_platform_data,
+	},
+};
+
+static struct spi_board_info spi1_gpio_devices[] = {
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+	{
+		.modalias		= "mmc_spi",
+		.bus_num 		= 3,
+		.controller_data = (void *)38,	/*gpio38*/
+		.chip_select	= 0,	/* SPI1_CS0 */
+		.max_speed_hz	= 25000000,
+		.platform_data	= &mmc_spi,
+		.mode = SPI_MODE_3,
+	},
+#endif
+	{
+		.modalias		= "spidev",
+		.bus_num 		= 3,
+		.controller_data = (void *)0,	/*gpio0*/
+		.chip_select	= 1,	/* SPI1_CS1 */
+		.max_speed_hz	= 25000000,
+		.mode = SPI_MODE_0,
+	}, {
+		.modalias		= "spidev",
+		.bus_num 		= 3,
+		.controller_data = (void *)1,	/*gpio1*/
+		.chip_select	= 2,	/* SPI1_CS2 */
+		.max_speed_hz	= 25000000,
+		.mode = SPI_MODE_0,
+	},
+};
+#endif	//#ifdef CONFIG_LS1B_SPI1
+
+#if defined(CONFIG_SPI_GPIO) && defined(CONFIG_GPIO_74X165)
+struct spi_gpio_platform_data spigpio_74x165_data = {
+	.sck = 39,	/*gpio39 cp*/
+	.mosi = SPI_GPIO_NO_MOSI,
+	.miso = 41,	/*gpio41 q7*/
+	.num_chipselect = 1,
+};
+
+static struct platform_device spigpio_74x165_device = {
+	.name = "spi_gpio",
+	.id   = 4,
+	.dev = {
+		.platform_data = &spigpio_74x165_data,
+	},
+};
+
+#include <linux/spi/74x165.h>
+static struct nxp_74x165_chip_platform_data nxp_74x165_info = {
+	.base = 188,	/* è‡ªå®šä¹‰çš„74x165 gpioèµ·å§‹å�· */
+	.latch = 38,	/*gpio38 pl*/
+	.daisy_chained = 2,
+};
+
+static struct spi_board_info spi3_gpio_devices[] __maybe_unused = {
+	{
+		.modalias	= "74x165",
+		.bus_num 		= 4,	/* å¯¹åº”spigpio_74x165_deviceçš„ .id=2 */
+		.controller_data = (void *)SPI_GPIO_NO_CHIPSELECT,
+		.chip_select	= 0,
+		.max_speed_hz	= 1000000,
+		.platform_data	= &nxp_74x165_info,
+		.mode = SPI_MODE_2,
+	},
+};
+#endif	//#if defined(CONFIG_SPI_GPIO) && defined(CONFIG_GPIO_74X165)
+
+/************************************************/	//GPIO && buzzer && button
+#ifdef CONFIG_KEYBOARD_GPIO_POLLED
+static struct gpio_keys_button ls1b_gpio_button[] = {
+	[0] = {
+		.code		= 'A',
+		.gpio	 	= 37,
+		.desc		= "SW1",
+	},
+	[1] = {
+		.code		= 'B',
+		.gpio	 	= 38,
+		.desc		= "SW2",
+	},
+	[2] = {
+		.code		= 'C',
+		.gpio	 	= 39,
+		.desc		= "SW3",
+	},
+	[3] = {
+		.code		= 'D',
+		.gpio	 	= 40,
+		.desc		= "SW4",
+	},
+	[4] = {
+		.code		= 'E',
+		.gpio	 	= 41,
+		.desc		= "SW5",
+	},
+};
+
+static struct gpio_keys_platform_data ls1b_gpio_key_dat = {
+	.buttons 		= ls1b_gpio_button,
+	.nbuttons 		= 5, 
+	.poll_interval	= 200,
+};
+
+static struct platform_device ls1b_gpio_key_device = {
+	.name 	= "gpio-keys-polled",
+	.id	= -1,
+	.dev	= {
+		.platform_data = &ls1b_gpio_key_dat,
+	},
+};
+#endif //#ifdef CONFIG_KEYBOARD_GPIO_POLLED
+
+/**
+ * Rotary encoder input device
+ */
+#ifdef CONFIG_INPUT_GPIO_ROTARY_ENCODER
+#define GPIO_ROTARY_A 59
+#define GPIO_ROTARY_B 51
+#define GPIO_KEY_C 53
+
+static struct rotary_encoder_platform_data raumfeld_rotary_encoder_info = {
+	.steps		= 30,
+	.axis		= REL_X,
+	.relative_axis	= 1,
+	.rollover	= false,
+	.gpio_a		= GPIO_ROTARY_A,
+	.gpio_b		= GPIO_ROTARY_B,
+	.gpio_c		= GPIO_KEY_C,
+	.debounce_ms	= 10,
+	.active_low		= 1,
+	.key		= KEY_ENTER,
+	.inverted_a	= 0,
+	.inverted_b	= 0,
+	.half_period	= 1,
+};
+
+static struct platform_device rotary_encoder_device = {
+	.name		= "rotary-encoder",
+	.id		= 0,
+	.dev		= {
+		.platform_data = &raumfeld_rotary_encoder_info,
+	}
+};
+#endif //#ifdef CONFIG_INPUT_GPIO_ROTARY_ENCODER
+
+/* matrix keypad */
+#if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE)
+/*
+static const uint32_t ls1bkbd_keymap[] = {
+	KEY(0, 0, KEY_A),
+	KEY(0, 1, KEY_B),
+	KEY(0, 2, KEY_C),
+	KEY(0, 3, KEY_D),
+
+	KEY(1, 0, KEY_E),
+	KEY(1, 1, KEY_F),
+	KEY(1, 2, KEY_G),
+	KEY(1, 3, KEY_H),
+};
+*/
+static const uint32_t ls1bkbd_keymap[] = {
+	KEY(0, 0, KEY_1),
+	KEY(0, 1, KEY_2),
+	KEY(0, 2, KEY_3),
+	KEY(0, 3, KEY_4),
+
+	KEY(1, 0, KEY_5),
+	KEY(1, 1, KEY_6),
+	KEY(1, 2, KEY_7),
+	KEY(1, 3, KEY_8),
+	
+	KEY(2, 0, KEY_9),
+	KEY(2, 1, KEY_0),
+	KEY(2, 2, KEY_A),
+	KEY(2, 3, KEY_B),
+	
+	KEY(3, 0, KEY_C),
+	KEY(3, 1, KEY_D),
+	KEY(3, 2, KEY_E),
+	KEY(3, 3, KEY_F),
+};
+
+static struct matrix_keymap_data ls1bkbd_keymap_data = {
+	.keymap			= ls1bkbd_keymap,
+	.keymap_size	= ARRAY_SIZE(ls1bkbd_keymap),
+};
+/*
+static const int ls1bkbd_row_gpios[] =
+	{ 30, 28 };
+static const int ls1bkbd_col_gpios[] =
+	{ 29, 58, 50, 52 };
+*/
+static const int ls1bkbd_row_gpios[] =
+	{ 16, 17, 18, 19 };	//gpio 16 17 18 19
+static const int ls1bkbd_col_gpios[] =
+	{ 20, 21, 22, 23 };	//gpio 20 21 22 23
+
+static struct matrix_keypad_platform_data ls1bkbd_pdata = {
+	.keymap_data		= &ls1bkbd_keymap_data,
+	.row_gpios			= ls1bkbd_row_gpios,
+	.col_gpios			= ls1bkbd_col_gpios,
+	.num_row_gpios		= ARRAY_SIZE(ls1bkbd_row_gpios),
+	.num_col_gpios		= ARRAY_SIZE(ls1bkbd_col_gpios),
+	.col_scan_delay_us	= 2,
+	.debounce_ms		= 24,
+	.active_low			= 1,
+	.wakeup				= 1,
+	.no_autorepeat		= 0,
+};
+
+static struct platform_device ls1bkbd_device = {
+	.name	= "matrix-keypad",
+	.id		= -1,
+	.dev	= {
+		.platform_data = &ls1bkbd_pdata,
+	},
+};
+#endif	//#if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE)
+
+#ifdef CONFIG_FB_SSD1305
+static struct ssd1305_platform_data ssd1305_pdata = {
+	.gpio_outpu = REG_GPIO_OUT0,
+	.gpios_res = 17,
+	.gpios_cs = 16,
+	.gpios_dc = 18,
+	.gpios_rd = 20,
+	.gpios_wr = 19,
+	
+	.gpios_d0 = 8,
+	.gpios_d1 = 9,
+	.gpios_d2 = 10,
+	.gpios_d3 = 11,
+	.gpios_d4 = 12,
+	.gpios_d5 = 13,
+	.gpios_d6 = 14,
+	.gpios_d7 = 15,
+	.datas_offset = 8,
+};
+
+struct platform_device ssd1305fb_device = {
+	.name	= "ssd1305fb",
+	.id		= -1,
+	.dev	= {
+		.platform_data = &ssd1305_pdata,
+	},
+};
+#endif //#ifdef CONFIG_FB_SSD1305
+
+#ifdef CONFIG_FB_ST7565
+#include <linux/st7565.h>
+static struct st7565_platform_data st7565_pdata = {
+	.gpio_outpu = REG_GPIO_OUT0,
+	.gpios_res = 17,
+	.gpios_cs = 16,
+	.gpios_dc = 18,
+	.gpios_rd = 20,
+	.gpios_wr = 19,
+	
+	.gpios_d0 = 8,
+	.gpios_d1 = 9,
+	.gpios_d2 = 10,
+	.gpios_d3 = 11,
+	.gpios_d4 = 12,
+	.gpios_d5 = 13,
+	.gpios_d6 = 14,
+	.gpios_d7 = 15,
+	.datas_offset = 8,
+};
+
+struct platform_device st7565fb_device = {
+	.name	= "st7565fb",
+	.id		= -1,
+	.dev	= {
+		.platform_data = &st7565_pdata,
+	},
+};
+#endif //#ifdef CONFIG_FB_ST7565
+
+#ifdef CONFIG_FB_ST7920
+static struct st7920_platform_data st7920_pdata = {
+	.gpio_outpu = REG_GPIO_OUT0,
+	.gpios_res = 8,
+	.gpios_cs = 11,
+	.gpios_sid = 9,
+	.gpios_sck = 10,
+
+	.datas_offset = 8,
+};
+
+struct platform_device st7920fb_device = {
+	.name	= "st7920fb",
+	.id		= -1,
+	.dev	= {
+		.platform_data = &st7920_pdata,
+	},
+};
+#endif //#ifdef CONFIG_FB_ST7920
+
+#ifdef CONFIG_KEYBOARD_74X165_GPIO_POLLED
+static struct gpio_keys_button gen74x165_gpio_keys_table[] = {
+	{
+		.code		= KEY_0,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_1,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_2,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_3,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_4,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_5,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_6,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_7,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_8,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_9,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_A,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_B,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_C,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_D,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_E,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_F,
+		.active_low	= 1,
+	},
+};
+
+static struct gen_74x165_platform_data gen74x165_gpio_keys_info = {
+	.q7 = 41,
+	.cp = 39,
+	.pl = 38,
+	.debounce_interval = 1,
+	.buttons	= gen74x165_gpio_keys_table,
+	.nbuttons	= ARRAY_SIZE(gen74x165_gpio_keys_table),
+	.poll_interval	= 50, /* default to 50ms */
+};
+
+static struct platform_device gen74x165_gpio_keys_device = {
+	.name		= "gen74x165_gpio-keys-polled",
+	.dev		= {
+		.platform_data	= &gen74x165_gpio_keys_info,
+	},
+};
+#endif //#ifdef CONFIG_KEYBOARD_74X165_GPIO_POLLED
+
+#ifdef CONFIG_LEDS_PWM
+static struct led_pwm ls1x_pwm_leds[] = {
+	{
+		.name		= "ls1x_pwm_led1",
+		.pwm_id		= 2,
+		.max_brightness	= 255,
+		.pwm_period_ns	= 7812500,
+	},
+	{
+		.name		= "ls1x_pwm_led2",
+		.pwm_id		= 3,
+		.max_brightness	= 255,
+		.pwm_period_ns	= 7812500,
+	},
+};
+
+static struct led_pwm_platform_data ls1x_pwm_data = {
+	.num_leds	= ARRAY_SIZE(ls1x_pwm_leds),
+	.leds		= ls1x_pwm_leds,
+};
+
+static struct platform_device ls1x_leds_pwm = {
+	.name	= "leds_pwm",
+	.id		= -1,
+	.dev	= {
+		.platform_data = &ls1x_pwm_data,
+	},
+};
+#endif //#ifdef CONFIG_LEDS_PWM
+
+#ifdef CONFIG_CAN_SJA1000_PLATFORM
+#include <linux/can/platform/sja1000.h>
+#ifdef CONFIG_LS1X_CAN0
+static struct resource ls1x_sja1000_resources_0[] = {
+	{
+		.start   = LS1X_CAN0_BASE,
+		.end     = LS1X_CAN0_BASE + 0x100 - 1,
+		.flags   = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
+	}, {
+		.start   = LS1X_BOARD_CAN0_IRQ,
+		.end     = LS1X_BOARD_CAN0_IRQ,
+		.flags   = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
+	},
+};
+
+static struct sja1000_platform_data ls1x_sja1000_platform_data_0 = {
+//	.osc_freq	= 16000000,
+	.ocr		= OCR_TX1_PULLDOWN | OCR_TX0_PUSHPULL,
+	.cdr		= CDR_CBP,
+};
+
+static struct platform_device ls1x_sja1000_0 = {
+	.name = "sja1000_platform",
+	.id = 0,
+	.dev = {
+		.platform_data = &ls1x_sja1000_platform_data_0,
+	},
+	.resource = ls1x_sja1000_resources_0,
+	.num_resources = ARRAY_SIZE(ls1x_sja1000_resources_0),
+};
+#endif	//#ifdef CONFIG_LS1X_CAN0
+#ifdef CONFIG_LS1X_CAN1
+static struct resource ls1x_sja1000_resources_1[] = {
+	{
+		.start   = LS1X_CAN1_BASE,
+		.end     = LS1X_CAN1_BASE + 0x100 - 1,
+		.flags   = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
+	}, {
+		.start   = LS1X_BOARD_CAN1_IRQ,
+		.end     = LS1X_BOARD_CAN1_IRQ,
+		.flags   = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
+	},
+};
+
+static struct sja1000_platform_data ls1x_sja1000_platform_data_1 = {
+//	.osc_freq	= 16000000,
+	.ocr		= OCR_TX1_PULLDOWN | OCR_TX0_PUSHPULL,
+	.cdr		= CDR_CBP,
+};
+
+static struct platform_device ls1x_sja1000_1 = {
+	.name = "sja1000_platform",
+	.id = 1,
+	.dev = {
+		.platform_data = &ls1x_sja1000_platform_data_1,
+	},
+	.resource = ls1x_sja1000_resources_1,
+	.num_resources = ARRAY_SIZE(ls1x_sja1000_resources_1),
+};
+#endif //#ifdef CONFIG_LS1X_CAN1
+#endif //#ifdef CONFIG_CAN_SJA1000_PLATFORM
+
+/***********************************************/
+static struct platform_device *ls1b_platform_devices[] __initdata = {
+	&ls1x_uart_device,
+
+#ifdef CONFIG_LS1X_FB0
+	&ls1x_fb0_device,
+#endif
+
+#ifdef CONFIG_MTD_NAND_LS1X
+	&ls1b_nand_device,
+#endif
+
+#ifdef CONFIG_USB_OHCI_HCD_LS1X
+	&ls1x_ohci_device,
+#endif
+#ifdef CONFIG_USB_EHCI_HCD_LS1X
+	&ls1x_ehci_device,
+#endif
+
+#ifdef CONFIG_STMMAC_ETH
+#ifdef CONFIG_LS1X_GMAC0
+	&ls1x_gmac0_mac,
+	&ls1x_gmac0_phy,
+#endif
+#ifdef CONFIG_LS1X_GMAC1
+	&ls1x_gmac1_mac,
+	&ls1x_gmac1_phy,
+#endif
+#endif
+
+#ifdef CONFIG_SOUND_LS1X_AC97
+	&ls1x_audio_device,
+#endif
+
+#if defined(CONFIG_LS1B_SPI0)
+	&ls1b_spi0_device,
+#elif defined(CONFIG_SPI_GPIO)
+	&spi0_gpio_device,
+#endif
+
+#if defined(CONFIG_LS1B_SPI1)
+	&ls1b_spi1_device,
+#elif defined(CONFIG_SPI_GPIO)
+	&spi1_gpio_device,
+#endif
+
+#if defined(CONFIG_SPI_GPIO) && defined(CONFIG_GPIO_74X165)
+	&spigpio_74x165_device,
+#endif
+
+#ifdef CONFIG_LS1X_WDT
+	&ls1x_wdt_device,
+#endif
+
+#ifdef CONFIG_RTC_DRV_LOONGSON1
+	&ls1x_rtc_device,
+#endif
+
+#ifdef CONFIG_I2C_LS1X
+	&ls1x_i2c0_device,
+	&ls1x_i2c1_device,
+	&ls1x_i2c2_device,
+#endif
+
+#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
+	&pca9555_leds,
+#endif
+
+#ifdef CONFIG_KEYBOARD_GPIO_POLLED
+	&ls1b_gpio_key_device,
+#endif
+
+#ifdef CONFIG_INPUT_GPIO_ROTARY_ENCODER
+	&rotary_encoder_device,
+#endif
+
+#if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE)
+	&ls1bkbd_device,
+#endif
+
+#ifdef CONFIG_FB_SSD1305
+	&ssd1305fb_device,
+#endif
+#ifdef CONFIG_FB_ST7565
+	&st7565fb_device,
+#endif
+#ifdef CONFIG_FB_ST7920
+	&st7920fb_device,
+#endif
+
+#ifdef CONFIG_KEYBOARD_74X165_GPIO_POLLED
+	&gen74x165_gpio_keys_device,
+#endif
+
+#ifdef CONFIG_LEDS_PWM
+	&ls1x_leds_pwm,
+#endif
+
+#ifdef CONFIG_CAN_SJA1000_PLATFORM
+#ifdef CONFIG_LS1X_CAN0
+	&ls1x_sja1000_0,
+#endif
+#ifdef CONFIG_LS1X_CAN1
+	&ls1x_sja1000_1,
+#endif
+#endif
+
+#ifdef CONFIG_BACKLIGHT_GENERIC
+	&ls1x_bl_dev
+#endif
+#ifdef CONFIG_LCD_PLATFORM
+	&ls1x_lcd_powerdev,
+#endif
+#ifdef CONFIG_BACKLIGHT_PWM
+	&ls1x_pwm_backlight,
+#endif
+};
+
+int __init ls1b_platform_init(void)
+{
+	ls1x_serial_setup();
+
+#ifdef CONFIG_STMMAC_ETH
+	ls1x_gmac_setup();
+#endif
+
+#ifdef CONFIG_CAN_SJA1000_PLATFORM
+	{
+	#ifdef CONFIG_LS1X_CAN0
+	struct sja1000_platform_data *sja1000_pdata = &ls1x_sja1000_platform_data_0;
+	sja1000_pdata->osc_freq = clk_get_rate(clk);
+	#endif
+	#ifdef CONFIG_LS1X_CAN1
+	sja1000_pdata = &ls1x_sja1000_platform_data_1;
+	sja1000_pdata->osc_freq = clk_get_rate(clk);
+	#endif
+
+#ifdef	CONFIG_LS1A_MACH
+	#ifdef CONFIG_LS1X_CAN0
+	/* CAN0å¤�ç”¨è®¾ç½® */
+//	ls1b_gpio_free(NULL, 66);	/* å¼•è„šè®¾ç½®ä¸ºCANæ¨¡å¼� */
+//	ls1b_gpio_free(NULL, 67);
+	*(volatile int *)0xbfd00420 &= ~(1<<17 | 3<<14 );	/* ä¸ŽI2C3 SPI0å¤�ç”¨ */
+	#endif
+	#ifdef CONFIG_LS1X_CAN1
+	/* CAN1å¤�ç”¨è®¾ç½® */
+//	ls1b_gpio_free(NULL, 68);	/* å¼•è„šè®¾ç½®ä¸ºCANæ¨¡å¼� */
+//	ls1b_gpio_free(NULL, 69);
+	*(volatile int *)0xbfd00420 &= ~(1<<31 | 1<<16 | 3<<12);	/* ä¸ŽNAND I2C2 SPI1å¤�ç”¨ */
+	#endif
+#elif	CONFIG_LS1B_MACH
+	*(volatile int *)0xbfd00424 &= ~(1<<23);	/* ä¸ŽSPI1å¤�ç”¨ */
+	#ifdef CONFIG_LS1X_CAN0
+	/* CAN0å¤�ç”¨è®¾ç½® */
+//	ls1b_gpio_free(NULL, 38);	/* å¼•è„šè®¾ç½®ä¸ºCANæ¨¡å¼� */
+//	ls1b_gpio_free(NULL, 39);
+	*(volatile int *)0xbfd00420 &= ~(1<<24);	/* ä¸ŽI2C1å¤�ç”¨ */
+	*(volatile int *)0xbfd00424 &= ~(1<<4);	/* ä¸ŽUART1_2å¤�ç”¨ */
+	#endif
+	#ifdef CONFIG_LS1X_CAN1
+	/* CAN1å¤�ç”¨è®¾ç½® */
+//	ls1b_gpio_free(NULL, 40);	/* å¼•è„šè®¾ç½®ä¸ºCANæ¨¡å¼� */
+//	ls1b_gpio_free(NULL, 41);
+	*(volatile int *)0xbfd00420 &= ~(1<<25);	/* ä¸ŽI2C2å¤�ç”¨ */
+	*(volatile int *)0xbfd00424 &= ~(1<<5);	/* ä¸ŽUART1_3å¤�ç”¨ */
+	#endif
+#endif
+	}
+#endif	//#ifdef CONFIG_CAN_SJA1000_PLATFORM
+
+#ifdef CONFIG_I2C_LS1X
+	i2c_register_board_info(0, ls1x_i2c0_devs, ARRAY_SIZE(ls1x_i2c0_devs));
+#endif
+
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+	/* è½®è¯¢æ–¹å¼�æˆ–ä¸­æ–­æ–¹å¼�æŽ¢æµ‹cardçš„æ�’æ‹” */
+	gpio_request(DETECT_GPIO, "MMC_SPI GPIO detect");
+	gpio_direction_input(DETECT_GPIO);		/* è¾“å…¥ä½¿èƒ½ */
+#endif
+
+#ifdef CONFIG_TOUCHSCREEN_ADS7846
+	ads7846_detect_penirq();
+#endif
+
+#if defined(CONFIG_LS1B_SPI0)
+	/* disable gpio24-27 */
+	*(volatile unsigned int *)0xbfd010c0 &= ~(0xf << 24);
+	spi_register_board_info(ls1b_spi0_devices, ARRAY_SIZE(ls1b_spi0_devices));
+#elif defined(CONFIG_SPI_GPIO)
+	spi_register_board_info(spi0_gpio_devices, ARRAY_SIZE(spi0_gpio_devices));
+#endif
+
+#if defined(CONFIG_LS1B_SPI1)
+	/* ä½¿èƒ½SPI1æŽ§åˆ¶å™¨ï¼Œä¸ŽCAN0 CAN1 GPIO38-GPIO41å¤�ç”¨,å�Œæ—¶å� ç”¨PWM0 PWM1ç”¨äºŽç‰‡é€‰. */
+	/* ç¼–ç¨‹éœ€è¦�æ³¨æ„� */
+	*(volatile unsigned int *)0xbfd00424 |= (0x3 << 23);
+	/* disable gpio38-41 */
+	*(volatile unsigned int *)0xbfd010c4 &= ~(0xf << 6);
+	spi_register_board_info(ls1b_spi1_devices, ARRAY_SIZE(ls1b_spi1_devices));
+#elif defined(CONFIG_SPI_GPIO)
+	spi_register_board_info(spi1_gpio_devices, ARRAY_SIZE(spi1_gpio_devices));
+#endif
+
+#if defined(CONFIG_SPI_GPIO) && defined(CONFIG_GPIO_74X165)
+	spi_register_board_info(spi3_gpio_devices, ARRAY_SIZE(spi3_gpio_devices));
+#endif
+
+#ifdef CONFIG_BACKLIGHT_GENERIC
+	gpio_request(GPIO_BACKLIGHT_CTRL, "backlight");
+#endif
+#ifdef CONFIG_LCD_PLATFORM
+	gpio_request(GPIO_BACKLIGHT_CTRL, "lcd_enable");
+#endif
+
+	return platform_add_devices(ls1b_platform_devices, ARRAY_SIZE(ls1b_platform_devices));
+}
+
+arch_initcall(ls1b_platform_init);
+
diff -uNra linux-3.0.82/arch/mips/loongson/ls1x/ls1c/Makefile linux-3.0.82x/arch/mips/loongson/ls1x/ls1c/Makefile
--- linux-3.0.82/arch/mips/loongson/ls1x/ls1c/Makefile	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/ls1x/ls1c/Makefile	2017-09-23 03:42:49.394676970 +0800
@@ -0,0 +1,4 @@
+#
+#
+
+obj-$(CONFIG_LS1C_MACH) += platform.o
diff -uNra linux-3.0.82/arch/mips/loongson/ls1x/ls1c/platform.c linux-3.0.82x/arch/mips/loongson/ls1x/ls1c/platform.c
--- linux-3.0.82/arch/mips/loongson/ls1x/ls1c/platform.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/ls1x/ls1c/platform.c	2017-09-23 03:42:49.398676958 +0800
@@ -0,0 +1,1969 @@
+/*
+ * Copyright (c) 2012 Tang, Haifeng <tanghaifeng-gz@loongson.cn>
+ * Platform device support for GS232 SoCs.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/resource.h>
+#include <linux/serial_8250.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/delay.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/flash.h>
+#include <linux/spi/ads7846.h>
+#include <linux/spi/mmc_spi.h>
+#include <linux/spi/spi_gpio.h>
+#include <linux/mmc/host.h>
+#include <linux/phy.h>
+#include <linux/stmmac.h>
+#include <linux/i2c.h>
+#include <linux/i2c/tsc2007.h>
+#include <linux/i2c/ft5x06_ts.h>
+#include <linux/videodev2.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <linux/input/matrix_keypad.h>
+#include <linux/input/74x165_gpio_keys_polled.h>
+#include <linux/rotary_encoder.h>
+#include <linux/ssd1305.h>
+#include <linux/st7920.h>
+#include <linux/clk.h>
+#include <linux/jbt6k74.h>
+#include <linux/leds.h>
+#include <linux/leds_pwm.h>
+
+#include <video/ls1xfb.h>
+#include <media/gc0308_platform.h>
+
+#include <ls1b_board.h>
+#include <irq.h>
+#include <spi.h>
+#include <asm/gpio.h>
+#include <asm-generic/sizes.h>
+#include <media/soc_camera.h>                                                                                                           
+#include <media/soc_camera_platform.h> 
+
+#ifdef CONFIG_MTD_NAND_LS1X
+struct ls1b_nand_platform_data{
+    int enable_arbiter;
+    struct mtd_partition *parts;
+    unsigned int nr_parts;
+};
+
+//#define	SZ_2M	(2*1024*1024)
+#define	SZ_100M	(100*1024*1024)
+#define	SZ_20M	(20*1024*1024)
+
+static struct mtd_partition ls1b_nand_partitions[]={
+#if 1
+#if 0
+	[0] = {
+		.name   = "pmon",
+		.offset = MTDPART_OFS_APPEND,
+		.size   = SZ_2M,  //2M
+//	        .mask_flags =   MTD_WRITEABLE,
+	},
+#endif
+	[0] = {
+		.name   ="kernel",
+		.offset = 0x200000,
+		//.offset = MTDPART_OFS_APPEND,
+		.size   = SZ_20M,
+	},
+
+	[1] = {
+		.name   ="rootfs",
+		.offset = MTDPART_OFS_APPEND,
+		.size   = MTDPART_SIZ_FULL,  //MTDPART_SIZ_FULL,
+	},
+#endif
+};
+
+static struct ls1b_nand_platform_data ls1b_nand_parts = {
+	.enable_arbiter =   1,
+	.parts          =   ls1b_nand_partitions,
+	.nr_parts       =   ARRAY_SIZE(ls1b_nand_partitions),
+};
+
+static struct resource ls1b_nand_resources[] = {
+    [0] = {
+        .start      =0,
+        .end        =0,
+        .flags      =IORESOURCE_DMA,    
+    },
+    [1] = {
+        .start      =0x1fe78000,
+        .end        =0x1fe78020,
+        .flags      =IORESOURCE_MEM,
+    },
+    [2] = {
+        .start      =0x1fd01160,
+        .end        =0x1fd01160,
+        .flags      =IORESOURCE_MEM,
+    },
+    [3] = {
+        .start      =LS1B_BOARD_DMA0_IRQ,
+        .end        =LS1B_BOARD_DMA0_IRQ,
+        .flags      =IORESOURCE_IRQ,
+    },
+};
+
+struct platform_device ls1b_nand_device = {
+    .name       ="ls1b-nand",
+    .id         =-1,
+    .dev        ={
+        .platform_data = &ls1b_nand_parts,
+    },
+    .num_resources  =ARRAY_SIZE(ls1b_nand_resources),
+    .resource       =ls1b_nand_resources,
+};
+#endif //CONFIG_MTD_NAND_LS1X
+
+#define LS1X_UART(_id)						\
+	{							\
+		.mapbase	= LS1X_UART ## _id ## _BASE,	\
+		.irq		= LS1X_UART ## _id ## _IRQ,	\
+		.iotype		= UPIO_MEM,			\
+		.flags		= UPF_IOREMAP | UPF_FIXED_TYPE,	\
+		.type		= PORT_16550A,			\
+	}
+
+static struct plat_serial8250_port ls1x_serial8250_port[] = {
+	LS1X_UART(0),
+	LS1X_UART(1),
+	LS1X_UART(2),
+	LS1X_UART(3),
+
+	{},
+};
+
+struct platform_device ls1x_uart_device = {
+	.name		= "serial8250",
+	.id		= PLAT8250_DEV_PLATFORM,
+	.dev		= {
+		.platform_data = ls1x_serial8250_port,
+	},
+};
+
+void __init ls1x_serial_setup(void)
+{
+	struct clk *clk;
+	struct plat_serial8250_port *p;
+
+	clk = clk_get(NULL, "apb");
+	if (IS_ERR(clk))
+		panic("unable to get apb clock, err=%ld", PTR_ERR(clk));
+
+	for (p = ls1x_serial8250_port; p->flags != 0; ++p)
+		p->uartclk = clk_get_rate(clk);
+}
+
+/* USB OHCI */
+#include <linux/usb/ohci_pdriver.h>
+static u64 ls1x_ohci_dmamask = DMA_BIT_MASK(32);
+
+static struct resource ls1x_ohci_resources[] = {
+	[0] = {
+		.start	= LS1X_OHCI_BASE,
+		.end	= LS1X_OHCI_BASE + SZ_32K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= LS1X_OHCI_IRQ,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct usb_ohci_pdata ls1x_ohci_pdata = {
+};
+
+struct platform_device ls1x_ohci_device = {
+	.name		= "ls1x-ohci",
+	.id		= -1,
+	.num_resources	= ARRAY_SIZE(ls1x_ohci_resources),
+	.resource	= ls1x_ohci_resources,
+	.dev		= {
+		.dma_mask = &ls1x_ohci_dmamask,
+		.platform_data = &ls1x_ohci_pdata,
+	},
+};
+
+/* EHCI */
+#ifdef CONFIG_USB_EHCI_HCD_LS1X
+static u64 ls1x_ehci_dma_mask = DMA_BIT_MASK(32);
+static struct resource ls1x_ehci_resources[] = { 
+	[0] = {
+		.start          = LS1X_EHCI_BASE,
+		.end            = LS1X_EHCI_BASE + SZ_32K - 1,
+		.flags          = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start          = LS1X_EHCI_IRQ,
+		.end            = LS1X_EHCI_IRQ,
+		.flags          = IORESOURCE_IRQ,
+	},
+};
+/*
+static struct ls1x_usbh_data  ls1x_ehci_platform_data={
+#ifdef CONFIG_LS1A_MACH
+	.ports=4,
+#else
+	.ports=1,
+#endif
+};
+*/
+static struct platform_device ls1x_ehci_device = {
+	.name           = "ls1x-ehci",
+	.id             = 0,
+	.dev = {
+//		.platform_data = &ls1x_ehci_platform_data,
+		.dma_mask = &ls1x_ehci_dma_mask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+	},
+	.num_resources  = ARRAY_SIZE(ls1x_ehci_resources),
+	.resource       = ls1x_ehci_resources,
+};
+#endif //#ifdef CONFIG_USB_EHCI_HCD_LS1X
+
+
+/*
+* watchdog
+*/
+#ifdef CONFIG_LS1X_WDT
+static struct resource ls1x_wdt_resource[] = {
+	[0]={
+		.start      = LS1X_WDT_BASE,
+		.end        = (LS1X_WDT_BASE + 0x8),
+		.flags      = IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device ls1x_wdt_device = {
+	.name       = "ls1x-wdt",
+	.id         = -1,
+	.num_resources  = ARRAY_SIZE(ls1x_wdt_resource),
+	.resource   = ls1x_wdt_resource,
+};
+#endif //#ifdef CONFIG_LS1X_WDT
+
+/*
+*RTC
+*/
+#ifdef CONFIG_RTC_DRV_LOONGSON1
+static struct platform_device ls1x_rtc_device = {
+	.name       = "ls1x-rtc",
+	.id         = -1,
+};
+#endif //#ifdef CONFIG_RTC_DRV_LOONGSON1
+
+/*
+*I2C
+*/
+/* I2C devices fitted. */
+#ifdef CONFIG_TOUCHSCREEN_TSZT2083
+#define TSZT2083_GPIO_IRQ	32
+static int ts_get_pendown_state(void)
+{
+	return !gpio_get_value(TSZT2083_GPIO_IRQ);
+}
+
+int ts_init(void)
+{
+	gpio_request(TSZT2083_GPIO_IRQ, "tszt2083 gpio irq");
+	gpio_direction_input(TSZT2083_GPIO_IRQ);
+	return 0;
+}
+#
+static struct tsc2007_platform_data tsc2007_info = {
+	.model				= 2007,
+	.x_plate_ohms		= 180,
+	.get_pendown_state	= ts_get_pendown_state,
+	.init_platform_hw	= ts_init,
+};
+#endif
+
+
+#ifdef CONFIG_TOUCHSCREEN_TSC2007
+#define TSC2007_GPIO_IRQ	60
+static int ts_get_pendown_state(void)
+{
+	return !gpio_get_value(TSC2007_GPIO_IRQ);
+}
+
+int ts_init(void)
+{
+	gpio_request(TSC2007_GPIO_IRQ, "tsc2007 gpio irq");
+	gpio_direction_input(TSC2007_GPIO_IRQ);
+	return 0;
+}
+
+static struct tsc2007_platform_data tsc2007_info = {
+	.model				= 2007,
+	.x_plate_ohms		= 180,
+	.get_pendown_state	= ts_get_pendown_state,
+	.init_platform_hw	= ts_init,
+};
+#endif //#ifdef CONFIG_TOUCHSCREEN_TSC2007
+
+#ifdef CONFIG_TOUCHSCREEN_FT5X0X
+#define FT5X0X_GPIO_IRQ		38
+#define FT5X0X_GPIO_WAUP	39
+int ft5x0x_irq_init(void)
+{
+	gpio_request(FT5X0X_GPIO_IRQ, "ft5x0x gpio irq");
+	gpio_direction_input(FT5X0X_GPIO_IRQ);
+	return 0;
+}
+
+int ft5x0x_wake_up(void)
+{
+	gpio_direction_output(FT5X0X_GPIO_WAUP, 0);
+	msleep(10);
+	gpio_set_value(FT5X0X_GPIO_WAUP, 1);
+	msleep(10);
+	return 0;
+}
+
+static struct ft5x0x_ts_platform_data ft5x0x_info = {
+	.init_platform_hw	= ft5x0x_irq_init,
+	.wake_platform_hw	= ft5x0x_wake_up,
+};
+#endif //#ifdef CONFIG_TOUCHSCREEN_FT5X0X
+
+//#ifdef CONFIG_SOC_CAMERA_LS1C
+#if 0 //dbg-yg
+#ifdef CONFIG_VIDEO_GC0308
+static struct gc0308_platform_data gc0308_plat = {
+	.default_width = 640,
+	.default_height = 480,
+	.pixelformat = V4L2_PIX_FMT_YUYV,
+	.freq = 24000000,
+	.is_mipi = 0,
+};
+#endif //#ifdef CONFIG_VIDEO_GC0308
+#endif
+
+#ifdef CONFIG_I2C_LS1X
+static struct i2c_board_info __initdata ls1x_i2c0_devs[] = {
+#ifdef CONFIG_TOUCHSCREEN_TSZT2083
+	{
+		I2C_BOARD_INFO("zt2083", 0x48),
+		.irq = LS1X_GPIO_FIRST_IRQ + TSZT2083_GPIO_IRQ,
+		.platform_data	= &tsc2007_info,
+	},
+#endif
+#ifdef CONFIG_TOUCHSCREEN_TSC2007
+	{
+		I2C_BOARD_INFO("tsc2007", 0x48),
+		.irq = LS1X_GPIO_FIRST_IRQ + TSC2007_GPIO_IRQ,
+		.platform_data	= &tsc2007_info,
+	},
+#endif
+#ifdef CONFIG_TOUCHSCREEN_FT5X0X
+	{
+		I2C_BOARD_INFO(FT5X0X_NAME, 0x38),
+		.irq = LS1X_GPIO_FIRST_IRQ + FT5X0X_GPIO_IRQ,
+		.platform_data	= &ft5x0x_info,
+	},
+#endif  
+//#ifdef CONFIG_SOC_CAMERA_LS1C
+#if 0  //dbg-yg
+#ifdef CONFIG_VIDEO_GC0308
+	{
+		I2C_BOARD_INFO("GC0308", 0x42 >> 1),
+		.platform_data = &gc0308_plat,
+	},
+#endif
+#endif
+};
+
+static struct resource ls1x_i2c0_resource[] = {
+	[0]={
+		.start	= LS1X_I2C0_BASE,
+		.end	= LS1X_I2C0_BASE + SZ_16K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device ls1x_i2c0_device = {
+	.name		= "ls1x-i2c",
+	.id			= 0,
+	.num_resources	= ARRAY_SIZE(ls1x_i2c0_resource),
+	.resource	= ls1x_i2c0_resource,
+};
+
+static struct resource ls1x_i2c1_resource[] = {
+	[0]={
+		.start	= LS1X_I2C1_BASE,
+		.end	= LS1X_I2C1_BASE + SZ_16K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device ls1x_i2c1_device = {
+	.name		= "ls1x-i2c",
+	.id			= 1,
+	.num_resources	= ARRAY_SIZE(ls1x_i2c1_resource),
+	.resource	= ls1x_i2c1_resource,
+};
+
+static struct resource ls1x_i2c2_resource[] = {
+	[0]={
+		.start	= LS1X_I2C2_BASE,
+		.end	= LS1X_I2C2_BASE + SZ_16K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device ls1x_i2c2_device = {
+	.name		= "ls1x-i2c",
+	.id			= 2,
+	.num_resources	= ARRAY_SIZE(ls1x_i2c2_resource),
+	.resource	= ls1x_i2c2_resource,
+};
+#endif //#ifdef CONFIG_I2C_LS1X
+
+/*
+ * lcd
+ */
+#if defined(CONFIG_FB_LOONGSON1)
+#include "../video_modes.c"
+#ifdef CONFIG_LS1X_FB0
+static struct resource ls1x_fb0_resource[] = {
+	[0] = {
+		.start = LS1X_DC0_BASE,
+		.end   = LS1X_DC0_BASE + 0x0010 - 1,	/* 1M? */
+		.flags = IORESOURCE_MEM,
+	},
+};
+
+struct ls1xfb_mach_info ls1x_lcd0_info = {
+	.id			= "Graphic lcd",
+	.modes			= video_modes,
+	.num_modes		= ARRAY_SIZE(video_modes),
+	.pix_fmt		= PIX_FMT_RGB565,
+	.active			= 1,
+	/* æ ¹æ�®lcdå±�ä¿®æ”¹invert_pixclockå’Œinvert_pixdeå�‚æ•°(0æˆ–1)ï¼Œéƒ¨åˆ†lcdå�¯èƒ½æ˜¾ç¤ºä¸�æ­£å¸¸ */
+	.invert_pixclock	= 0,
+	.invert_pixde	= 0,
+};
+
+struct platform_device ls1x_fb0_device = {
+	.name			= "ls1x-fb",
+	.id				= 0,
+	.num_resources	= ARRAY_SIZE(ls1x_fb0_resource),
+	.resource		= ls1x_fb0_resource,
+	.dev			= {
+		.platform_data = &ls1x_lcd0_info,
+	}
+};
+#endif	//#ifdef CONFIG_LS1X_FB0
+#endif	//#if defined(CONFIG_FB_LOONGSON1)
+
+#define GPIO_BACKLIGHT_CTRL	53
+#ifdef CONFIG_BACKLIGHT_GENERIC
+#include <linux/backlight.h>
+static void ls1x_bl_set_intensity(int intensity)
+{
+	if (intensity)
+		gpio_direction_output(GPIO_BACKLIGHT_CTRL, 1);
+	else
+		gpio_direction_output(GPIO_BACKLIGHT_CTRL, 0);
+}
+
+static struct generic_bl_info ls1x_bl_info = {
+	.name			= "ls1x-bl",
+	.max_intensity		= 0xff,
+	.default_intensity	= 0xff,
+	.set_bl_intensity	= ls1x_bl_set_intensity,
+};
+
+static struct platform_device ls1x_bl_dev = {
+	.name			= "generic-bl",
+	.id			= 1,
+	.dev = {
+		.platform_data	= &ls1x_bl_info,
+	},
+};
+#endif //#ifdef CONFIG_BACKLIGHT_GENERIC
+
+#ifdef CONFIG_LCD_PLATFORM
+#include <video/platform_lcd.h>
+static void ls1x_lcd_power_set(struct plat_lcd_data *pd,
+				   unsigned int power)
+{
+	if (power)
+		gpio_direction_output(GPIO_BACKLIGHT_CTRL, 1);
+	else
+		gpio_direction_output(GPIO_BACKLIGHT_CTRL, 0);
+}
+
+static struct plat_lcd_data ls1x_lcd_power_data = {
+	.set_power		= ls1x_lcd_power_set,
+};
+
+static struct platform_device ls1x_lcd_powerdev = {
+	.name			= "platform-lcd",
+	.dev.parent		= &ls1x_fb0_device.dev,
+	.dev.platform_data	= &ls1x_lcd_power_data,
+};
+#endif //#ifdef CONFIG_LCD_PLATFORM
+
+#ifdef CONFIG_BACKLIGHT_PWM
+#include <linux/pwm_backlight.h>
+static struct platform_pwm_backlight_data ls1x_backlight_data = {
+	.pwm_id		= 2,
+	.max_brightness	= 255,
+	.dft_brightness	= 100,
+	.pwm_period_ns	= 7812500,
+};
+
+static struct platform_device ls1x_pwm_backlight = {
+	.name = "pwm-backlight",
+	.dev = {
+		.platform_data = &ls1x_backlight_data,
+	},
+};
+#endif //#ifdef CONFIG_BACKLIGHT_PWM
+
+//gmac
+#ifdef CONFIG_STMMAC_ETH
+void __init ls1x_gmac_setup(void)
+{
+	u32 x;
+	x = __raw_readl(LS1X_MUX_CTRL1);
+	x &= ~PHY_INTF_SELI;
+	#if defined(CONFIG_LS1X_GMAC0_RMII)
+	x |= 0x4 << PHY_INTF_SELI_SHIFT;
+	#endif
+	__raw_writel(x, LS1X_MUX_CTRL1);
+
+	x = __raw_readl(LS1X_MUX_CTRL0);
+	__raw_writel(x & (~GMAC_SHUT), LS1X_MUX_CTRL0);
+
+#if defined(CONFIG_LS1X_GMAC0_RMII)
+	__raw_writel(0x400, (void __iomem *)KSEG1ADDR(LS1X_GMAC0_BASE + 0x14));
+#endif
+	__raw_writel(0xe4b, (void __iomem *)KSEG1ADDR(LS1X_GMAC0_BASE + 0x10));
+}
+
+#ifdef CONFIG_LS1X_GMAC0
+static struct resource ls1x_mac0_resources[] = {
+	[0] = {
+		.start  = LS1X_GMAC0_BASE,
+		.end    = LS1X_GMAC0_BASE + SZ_8K - 1,
+		.flags  = IORESOURCE_MEM,
+	},
+	[1] = {
+		.name   = "macirq",
+		.start  = LS1X_GMAC0_IRQ,
+		.flags  = IORESOURCE_IRQ,
+	},
+};
+
+static struct plat_stmmacenet_data ls1x_mac0_data = {
+	.bus_id = 0,
+	.pbl = 0,
+	.has_gmac = 1,
+	.enh_desc = 0,
+};
+
+struct platform_device ls1x_gmac0_mac = {
+	.name           = "stmmaceth",
+	.id             = 0,
+	.num_resources  = ARRAY_SIZE(ls1x_mac0_resources),
+	.resource       = ls1x_mac0_resources,
+	.dev            = {
+		.platform_data = &ls1x_mac0_data,
+	},
+};
+
+static struct plat_stmmacphy_data  phy0_private_data = {
+	.bus_id = 0,
+#ifdef CONFIG_RTL8305SC
+	.phy_addr = 4,
+#else
+	.phy_addr = 0,
+#endif
+	.phy_mask = 0,
+	.interface = PHY_INTERFACE_MODE_RMII,
+	
+};
+
+struct platform_device ls1x_gmac0_phy = {
+	.name = "stmmacphy",
+	.id = 0,
+	.num_resources = 1,
+	.resource = (struct resource[]){
+		{
+			.name = "phyirq",
+			.start = PHY_POLL,
+			.end = PHY_POLL,
+			.flags = IORESOURCE_IRQ,
+		},
+	},
+	.dev = {
+		.platform_data = &phy0_private_data,
+	},
+};
+#endif //#ifdef CONFIG_LS1X_GMAC0
+#endif //#ifdef CONFIG_STMMAC_ETH
+/*
+ * gmac
+ */
+
+#ifdef CONFIG_LS1X_GMAC0
+static u64 ls1a_gmac_dmamask = DMA_BIT_MASK(32);
+static struct resource ls1x_gmac0_resources[] = { 
+ [0] = {
+   .start          = LS1X_GMAC0_BASE,
+   .end            = (LS1X_GMAC0_BASE + 0x6b),
+   .flags          = IORESOURCE_MEM,
+ },
+ [1] = {
+   .start          = LS1X_GMAC0_IRQ,
+   .end            = LS1X_GMAC0_IRQ,
+   .flags          = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device ls1x_gmac0_device = {
+ .name           = "loongson-gmac",
+ .id             = 1,
+ .dev = {
+   .dma_mask=&ls1a_gmac_dmamask,
+ },
+ .num_resources  = ARRAY_SIZE(ls1x_gmac0_resources),
+ .resource       = ls1x_gmac0_resources,
+};
+#endif
+
+#ifdef CONFIG_SOUND_LS1X_AC97
+static struct resource ls1x_ac97_resource[] = {
+	[0]={
+		.start	= LS1X_AC97_BASE,
+		.end	= LS1X_AC97_BASE + SZ_16K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device ls1x_audio_device = {
+	.name           = "ls1x-audio",
+	.id             = -1,
+	.num_resources	= ARRAY_SIZE(ls1x_ac97_resource),
+	.resource		= ls1x_ac97_resource,
+};
+#endif
+
+#ifdef CONFIG_SOUND_LS1X_UDA1342
+static struct resource ls1x_uda1342_resource[] = {
+	[0]={
+		.start	= LS1X_AC97_BASE,
+		.end	= LS1X_AC97_BASE + SZ_16K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device ls1x_audio_device = {
+	.name           = "ls1x-audio",
+	.id             = -1,
+	.num_resources	= ARRAY_SIZE(ls1x_uda1342_resource),
+	.resource		= ls1x_uda1342_resource,
+};
+#endif
+
+#ifdef CONFIG_MTD_M25P80
+static struct mtd_partition partitions[] = {
+	[0] = {
+		.name		= "pmon_spi",
+		.offset		= 0,
+		.size		= 512 * 1024,	//512KB
+	//	.mask_flags	= MTD_WRITEABLE,
+	},
+};
+
+static struct flash_platform_data flash = {
+	.name		= "ls1b_norflash",
+	.parts		= partitions,
+	.nr_parts	= ARRAY_SIZE(partitions),
+	.type		= "w25q64",
+};
+#endif /* CONFIG_MTD_M25P80 */
+
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+/* å¼€å�‘æ�¿ä½¿ç”¨GPIO40(CAN1_RX)å¼•è„šä½œä¸ºMMC/SDå�¡çš„æ�’æ‹”æŽ¢æµ‹å¼•è„š */
+#define DETECT_GPIO  41
+#if 1
+/* è½®è¯¢æ–¹å¼�æŽ¢æµ‹cardçš„æ�’æ‹” */
+static int mmc_spi_get_cd(struct device *dev)
+{
+	return !gpio_get_value(DETECT_GPIO);
+}
+#else
+#define MMC_SPI_CARD_DETECT_INT  (LS1X_GPIO_FIRST_IRQ + DETECT_GPIO)
+/* ä¸­æ–­æ–¹å¼�æ–¹å¼�æŽ¢æµ‹cardçš„æ�’æ‹”ï¼Œç”±äºŽloongson1 CPUä¸�æ”¯æŒ�å�Œè¾¹æ²¿è§¦å�‘ æ‰€ä»¥ä¸�å»ºè®®ä½¿ç”¨ä¸­æ–­æ–¹å¼� */
+static int ls1b_mmc_spi_init(struct device *dev,
+	irqreturn_t (*detect_int)(int, void *), void *data)
+{
+	return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
+		IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
+}
+/* é‡Šæ”¾ä¸­æ–­ */
+static void ls1b_mmc_spi_exit(struct device *dev, void *data)
+{
+	free_irq(MMC_SPI_CARD_DETECT_INT, data);
+}
+#endif
+
+static struct mmc_spi_platform_data mmc_spi = {
+	/* ä¸­æ–­æ–¹å¼�æ–¹å¼�æŽ¢æµ‹cardçš„æ�’æ‹” */
+//	.init = ls1b_mmc_spi_init,
+//	.exit = ls1b_mmc_spi_exit,
+//	.detect_delay = 1200,	/* msecs */
+	/* è½®è¯¢æ–¹å¼�æ–¹å¼�æŽ¢æµ‹cardçš„æ�’æ‹” */
+	.get_cd = mmc_spi_get_cd,
+	.caps = MMC_CAP_NEEDS_POLL,
+};	
+#endif  /* defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) */
+
+#ifdef CONFIG_TOUCHSCREEN_ADS7846
+#define ADS7846_GPIO_IRQ 60 /* å¼€å�‘æ�¿è§¦æ‘¸å±�ä½¿ç”¨çš„å¤–éƒ¨ä¸­æ–­ */
+int ads7846_pendown_state(void)
+{
+	return !gpio_get_value(ADS7846_GPIO_IRQ);
+}
+	
+static void ads7846_detect_penirq(void)
+{
+	gpio_request(ADS7846_GPIO_IRQ, "ads7846 gpio irq");
+	gpio_direction_input(ADS7846_GPIO_IRQ);
+}
+	
+static struct ads7846_platform_data ads_info = {
+	.model				= 7846,
+	.vref_delay_usecs	= 1,
+	.keep_vref_on		= 0,
+	.settle_delay_usecs	= 20,
+//	.x_plate_ohms		= 800,
+	.pressure_min		= 0,
+	.pressure_max		= 2048,
+	.debounce_rep		= 3,
+	.debounce_max		= 10,
+	.debounce_tol		= 50,
+	.get_pendown_state	= ads7846_pendown_state,
+	.filter_init		= NULL,
+	.filter 			= NULL,
+	.filter_cleanup 	= NULL,
+};
+#endif /* TOUCHSCREEN_ADS7846 */
+
+#ifdef CONFIG_LCD_JBT6K74
+/* JBT6k74 display controller */
+static void gta02_jbt6k74_probe_completed(struct device *dev)
+{
+//	pcf50633_bl_set_brightness_limit(gta02_pcf, 0x3f);
+}
+
+const struct jbt6k74_platform_data jbt6k74_pdata = {
+//	.gpio_reset = 41,
+};
+#endif
+
+#ifdef CONFIG_LS1B_SPI0
+static struct spi_board_info ls1b_spi0_devices[] = {
+#ifdef CONFIG_MTD_M25P80
+	{
+		.modalias	= "w25q64",
+		.bus_num 		= 0,
+		.chip_select	= SPI0_CS0,
+		.max_speed_hz	= 80000000,
+		.platform_data	= &flash,
+	},
+#endif
+#ifdef CONFIG_SPI_MCP3201
+	{
+		.modalias	= "mcp3201",
+		.bus_num 	= 0,
+		.chip_select	= SPI0_CS3,
+		.max_speed_hz	= 1000000,
+	},
+#endif
+#ifdef CONFIG_TOUCHSCREEN_ADS7846
+	{
+		.modalias = "ads7846",
+		.platform_data = &ads_info,
+		.bus_num 		= 0,
+		.chip_select 	= SPI0_CS1,
+		.max_speed_hz 	= 2500000,
+		.mode 			= SPI_MODE_1,
+		.irq				= LS1X_GPIO_FIRST_IRQ + ADS7846_GPIO_IRQ,
+	},
+#endif
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+	{
+		.modalias		= "mmc_spi",
+		.bus_num 		= 0,
+		.chip_select	= SPI0_CS2,
+		.max_speed_hz	= 25000000,
+		.platform_data	= &mmc_spi,
+		.mode = SPI_MODE_3,
+	},
+#endif
+#if 0
+	{
+		.modalias	= "sst25vf032b",
+		.bus_num 		= 0,
+		.chip_select	= SPI0_CS0,
+		.max_speed_hz	= 80000000,
+		.platform_data	= &flash,
+	},
+#endif
+};
+	
+static struct resource ls1b_spi0_resource[] = {
+	[0]={
+		.start	= LS1B_BOARD_SPI0_BASE,
+		.end	= (LS1B_BOARD_SPI0_BASE + 0x6),
+		.flags	= IORESOURCE_MEM,
+	},
+	[1]={
+		.start	= LS1B_BOARD_SPI0_IRQ,
+		.end	= LS1B_BOARD_SPI0_IRQ,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct ls1b_spi_info ls1b_spi0_platdata = {
+	.board_size = ARRAY_SIZE(ls1b_spi0_devices),
+	.board_info = ls1b_spi0_devices,
+	.bus_num	= 0,
+	.num_cs		= SPI0_CS3 + 1,
+};
+
+static struct platform_device ls1b_spi0_device = {
+	.name		= "ls1b-spi",
+	.id 		= 0,
+	.num_resources	= ARRAY_SIZE(ls1b_spi0_resource),
+	.resource	= ls1b_spi0_resource,
+	.dev		= {
+		.platform_data	= &ls1b_spi0_platdata,//&ls1b_spi_devices,
+	},
+};
+#endif //#ifdef CONFIG_LS1B_SPI0
+
+#ifdef CONFIG_LS1B_SPI1 /* SPI1 æŽ§åˆ¶å™¨ */
+static struct spi_board_info ls1b_spi1_devices[] = {
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+	{
+		.modalias		= "mmc_spi",
+		.bus_num 		= 1,
+		.chip_select	= SPI1_CS0,
+		.max_speed_hz	= 25000000,
+		.platform_data	= &mmc_spi,
+	},
+#endif
+
+#if defined(CONFIG_EASY_DAB_AUDIO)
+	{	
+		.modalias		= "easy_dab",
+		.bus_num 		= 1,
+		.chip_select	= SPI1_CS1,
+		.max_speed_hz	= 10000000,
+	},
+#endif
+};
+
+static struct resource ls1b_spi1_resource[] = {
+	[0]={
+		.start	= LS1B_BOARD_SPI1_BASE,
+		.end	= (LS1B_BOARD_SPI1_BASE + 0x6),
+		.flags	= IORESOURCE_MEM,
+	},
+	[1]={
+		.start	= LS1B_BOARD_SPI1_IRQ,
+		.end	= LS1B_BOARD_SPI1_IRQ,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct ls1b_spi_info ls1b_spi1_platdata = {
+	.board_size = ARRAY_SIZE(ls1b_spi1_devices),
+	.board_info = ls1b_spi1_devices,
+	.bus_num	= 1,
+	.num_cs		= 3,
+};
+
+static struct platform_device ls1b_spi1_device = {
+	.name		= "ls1b-spi",
+	.id 		= 1,
+	.num_resources	= ARRAY_SIZE(ls1b_spi1_resource),
+	.resource	= ls1b_spi1_resource,
+	.dev		= {
+		.platform_data	= &ls1b_spi1_platdata,//&ls1b_spi_devices,
+	},
+};
+#endif	//#ifdef CONFIG_LS1B_SPI1
+/***************************************************************************
+ * Description:
+ * Parameters: 
+ * Rutern  : 
+ * Author  :Sunyoung_yg 
+ * Date    : 2015-03-26
+ ***************************************************************************/
+static struct spi_board_info spi_gpio_devices[] = {
+	{
+		.modalias	= "spidev",
+		.bus_num 		= 0,	/* å¯¹åº”spigpio_deviceçš„.id=2 */
+		.controller_data = (void *)27,	/*gpio27*/
+		.chip_select	= 0,
+		.max_speed_hz	= 8000000,
+	//	.platform_data	= &flash,
+	},
+	{
+		.modalias	= "spidev",
+		.bus_num 		= 0,	/* å¯¹åº”spigpio_deviceçš„.id=2 */
+		.controller_data = (void *)27,	/*gpio27*/
+		.chip_select	= 1,
+		.max_speed_hz	= 8000000,
+	//	.platform_data	= &flash,
+	},
+};
+/*****888888888888888888888888888888888888888888888888888888888888***/ 
+#ifdef CONFIG_SPI_GPIO
+struct spi_gpio_platform_data spigpio_platform_data = {
+	.sck = 24,	/*gpio24*/
+	.mosi = 26,	/*gpio26*/
+	.miso = 25,	/*gpio25*/
+	.num_chipselect = 3,
+};
+
+static struct platform_device spigpio_device = {
+	.name = "spi_gpio",
+	.id   = 2,	/* ç”¨äºŽåŒºåˆ†spi0å’Œspi1 */
+	.dev = {
+		.platform_data = &spigpio_platform_data,
+	},
+};
+
+static struct spi_board_info spi_gpio_devices[] = {
+	{
+		.modalias	= "spidev",
+		.bus_num 		= 0,	/* å¯¹åº”spigpio_deviceçš„.id=2 */
+		.controller_data = (void *)27,	/*gpio27*/
+		.chip_select	= 0,
+		.max_speed_hz	= 8000000,
+	//	.platform_data	= &flash,
+	},
+#ifdef CONFIG_MTD_M25P80
+	{
+		.modalias	= "w25q64",
+		.bus_num 		= 2,	/* å¯¹åº”spigpio_deviceçš„.id=2 */
+		.controller_data = (void *)27,	/*gpio27*/
+		.chip_select	= 0,
+		.max_speed_hz	= 80000000,
+		.platform_data	= &flash,
+	},
+#endif
+#ifdef CONFIG_TOUCHSCREEN_ADS7846
+	{
+		.modalias = "ads7846",
+		.platform_data = &ads_info,
+		.bus_num 		= 2,	/* å¯¹åº”spigpio_deviceçš„.id=2 */
+		.controller_data = (void *)28,	/*gpio28*/
+		.chip_select 	= 1,
+		.max_speed_hz 	= 2500000,
+		.mode 			= SPI_MODE_1,
+		.irq			= LS1X_GPIO_FIRST_IRQ + ADS7846_GPIO_IRQ,
+	},
+#endif
+#ifdef CONFIG_LCD_JBT6K74
+	{
+		.modalias	= "jbt6k74",
+		.platform_data	= &jbt6k74_pdata,
+		.bus_num	= 2,		/* å¯¹åº”spigpio_deviceçš„.id=2 */
+		.controller_data = (void *)43,	/*gpio43*/
+		.chip_select = 2,
+		/* irq */
+		.max_speed_hz	= 100 * 1000,
+	},
+#endif
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+	{
+		.modalias		= "mmc_spi",
+		.bus_num 		= 2,
+		.controller_data = (void *)29,	/*gpio29*/
+		.chip_select	= 2,
+		.max_speed_hz	= 25000000,
+		.platform_data	= &mmc_spi,
+		.mode = SPI_MODE_3,
+	},
+#endif
+};
+#endif //#ifdef CONFIG_SPI_GPIO
+
+/************************************************/	//GPIO && buzzer && button
+#ifdef CONFIG_KEYBOARD_GPIO_POLLED
+static struct gpio_keys_button ls1b_gpio_button[] = {
+	[0] = {
+		.code		= 'A',
+		.gpio	 	= 37,
+		.desc		= "SW1",
+	},
+	[1] = {
+		.code		= 'B',
+		.gpio	 	= 38,
+		.desc		= "SW2",
+	},
+	[2] = {
+		.code		= 'C',
+		.gpio	 	= 39,
+		.desc		= "SW3",
+	},
+	[3] = {
+		.code		= 'D',
+		.gpio	 	= 40,
+		.desc		= "SW4",
+	},
+	[4] = {
+		.code		= 'E',
+		.gpio	 	= 41,
+		.desc		= "SW5",
+	},
+};
+
+static struct gpio_keys_platform_data ls1b_gpio_key_dat = {
+	.buttons 		= ls1b_gpio_button,
+	.nbuttons 		= 5, 
+	.poll_interval	= 200,
+};
+
+static struct platform_device ls1b_gpio_key_device = {
+	.name 	= "gpio-keys-polled",
+	.id	= -1,
+	.dev	= {
+		.platform_data = &ls1b_gpio_key_dat,
+	},
+};
+#endif //#ifdef CONFIG_KEYBOARD_GPIO_POLLED
+
+#ifdef CONFIG_LS1B_BUZZER
+static struct gpio_keys_button ls1b_gpio_buzzer[] = {
+	[0] = {
+		.gpio	= 40,	//57
+		.type	= EV_LED,
+	},	
+/*
+	[1] = {
+		.gpio	= 34,
+	},	
+	[2] = {
+		.gpio	= 35,
+	},	*/
+};
+
+static struct gpio_keys_platform_data ls1b_gpio_buzzer_data = {
+	.buttons	= ls1b_gpio_buzzer,
+	.nbuttons	= 1,
+};
+
+static struct platform_device ls1b_gpio_buzzer_device = {
+	.name	= "buzzer_gpio",
+	.id	= -1,
+	.dev	= {
+		.platform_data = &ls1b_gpio_buzzer_data,
+	},
+};
+#endif //#ifdef CONFIG_LS1B_BUZZER
+
+//xhm
+#ifdef CONFIG_LS1B_BBDIO
+static struct gpio_keys_button ls1b_bobodogio_button[] = {
+#if 0
+	[0]  = { .gpio = 4, .type = EV_LED},	
+	[1]  = { .gpio = 5, .type = EV_LED},
+	[2]  = { .gpio = 6, .type = EV_LED},
+	[3]  = { .gpio = 7, .type = EV_LED},
+	[4]  = { .gpio = 8, .type = EV_LED},
+	[5]  = { .gpio = 9, .type = EV_LED},
+	[6]  = { .gpio = 10, .type = EV_LED},
+	[7]  = { .gpio = 11, .type = EV_LED},
+	[8]  = { .gpio = 12, .type = EV_LED},
+	[9]  = { .gpio = 13, .type = EV_LED},
+	[10] = { .gpio = 14, .type = EV_LED},
+	[11] = { .gpio = 15, .type = EV_LED},
+	[12] = { .gpio = 16, .type = EV_LED},
+	[13] = { .gpio = 17, .type = EV_LED},
+	[14] = { .gpio = 18, .type = EV_LED},
+#endif
+	[0] = { .gpio = 48, .type = EV_KEY},
+	[1] = { .gpio = 49, .type = EV_LED},
+};
+
+static struct gpio_keys_platform_data ls1b_bobodogio_dog_data = {
+	.buttons	= ls1b_bobodogio_button,
+	.nbuttons	= 15,
+};
+
+static struct platform_device ls1b_bobodogio_dog = {
+	.name	= "bobodog_io_control",
+	.id	= -1,
+	.dev	= {
+		.platform_data = &ls1b_bobodogio_dog_data,
+	},
+};
+#endif //#ifdef CONFIG_LS1B_BBDIO
+
+#ifdef CONFIG_LS1B_PWM_DRIVER
+static struct resource ls1b_pwm0_resource[] = {
+	[0]={
+		.start	= LS1B_PWM0_BASE,
+		.end	= (LS1B_PWM0_BASE + 0x0f),
+		.flags	= IORESOURCE_MEM,
+	},
+	[1]={
+		.start	= LS1B_PWM1_BASE,
+		.end	= (LS1B_PWM1_BASE + 0x0f),
+		.flags	= IORESOURCE_MEM,
+	},
+	[2]={
+		.start	= LS1B_PWM2_BASE,
+		.end	= (LS1B_PWM2_BASE + 0x0f),
+		.flags	= IORESOURCE_MEM,
+	},
+	[3]={
+		.start	= LS1B_PWM3_BASE,
+		.end	= (LS1B_PWM3_BASE + 0x0f),
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device ls1b_pwm_device = {
+	.name	= "ls1b-pwm",
+	.id	= -1,
+	.num_resources	= ARRAY_SIZE(ls1b_pwm0_resource),
+	.resource	= ls1b_pwm0_resource,
+};
+#endif //#ifdef CONFIG_LS1B_PWM_DRIVER
+
+/**
+ * Rotary encoder input device
+ */
+#ifdef CONFIG_INPUT_GPIO_ROTARY_ENCODER
+#define GPIO_ROTARY_A 59
+#define GPIO_ROTARY_B 51
+#define GPIO_KEY_C 53
+
+static struct rotary_encoder_platform_data raumfeld_rotary_encoder_info = {
+	.steps		= 30,
+	.axis		= REL_X,
+	.relative_axis	= 1,
+	.rollover	= false,
+	.gpio_a		= GPIO_ROTARY_A,
+	.gpio_b		= GPIO_ROTARY_B,
+	.gpio_c		= GPIO_KEY_C,
+	.debounce_ms	= 10,
+	.active_low		= 1,
+	.key		= KEY_ENTER,
+	.inverted_a	= 0,
+	.inverted_b	= 0,
+	.half_period	= 1,
+};
+
+static struct platform_device rotary_encoder_device = {
+	.name		= "rotary-encoder",
+	.id		= 0,
+	.dev		= {
+		.platform_data = &raumfeld_rotary_encoder_info,
+	}
+};
+#endif //#ifdef CONFIG_INPUT_GPIO_ROTARY_ENCODER
+
+/* matrix keypad */
+#if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE)
+/*
+static const uint32_t ls1bkbd_keymap[] = {
+	KEY(0, 0, KEY_A),
+	KEY(0, 1, KEY_B),
+	KEY(0, 2, KEY_C),
+	KEY(0, 3, KEY_D),
+
+	KEY(1, 0, KEY_E),
+	KEY(1, 1, KEY_F),
+	KEY(1, 2, KEY_G),
+	KEY(1, 3, KEY_H),
+};
+*/
+static const uint32_t ls1bkbd_keymap[] = {
+	KEY(0, 0, KEY_1),
+	KEY(0, 1, KEY_2),
+	KEY(0, 2, KEY_3),
+	KEY(0, 3, KEY_4),
+
+	KEY(1, 0, KEY_5),
+	KEY(1, 1, KEY_6),
+	KEY(1, 2, KEY_7),
+	KEY(1, 3, KEY_8),
+	
+	KEY(2, 0, KEY_9),
+	KEY(2, 1, KEY_0),
+	KEY(2, 2, KEY_A),
+	KEY(2, 3, KEY_B),
+	
+	KEY(3, 0, KEY_C),
+	KEY(3, 1, KEY_D),
+	KEY(3, 2, KEY_E),
+	KEY(3, 3, KEY_F),
+};
+
+static struct matrix_keymap_data ls1bkbd_keymap_data = {
+	.keymap			= ls1bkbd_keymap,
+	.keymap_size	= ARRAY_SIZE(ls1bkbd_keymap),
+};
+/*
+static const int ls1bkbd_row_gpios[] =
+	{ 30, 28 };
+static const int ls1bkbd_col_gpios[] =
+	{ 29, 58, 50, 52 };
+*/
+static const int ls1bkbd_row_gpios[] =
+	{ 16, 17, 18, 19 };	//gpio 16 17 18 19
+static const int ls1bkbd_col_gpios[] =
+	{ 20, 21, 22, 23 };	//gpio 20 21 22 23
+
+static struct matrix_keypad_platform_data ls1bkbd_pdata = {
+	.keymap_data		= &ls1bkbd_keymap_data,
+	.row_gpios			= ls1bkbd_row_gpios,
+	.col_gpios			= ls1bkbd_col_gpios,
+	.num_row_gpios		= ARRAY_SIZE(ls1bkbd_row_gpios),
+	.num_col_gpios		= ARRAY_SIZE(ls1bkbd_col_gpios),
+	.col_scan_delay_us	= 2,
+	.debounce_ms		= 24,
+	.active_low			= 1,
+	.wakeup				= 1,
+	.no_autorepeat		= 0,
+};
+
+static struct platform_device ls1bkbd_device = {
+	.name	= "matrix-keypad",
+	.id		= -1,
+	.dev	= {
+		.platform_data = &ls1bkbd_pdata,
+	},
+};
+#endif	//#if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE)
+
+#ifdef CONFIG_FB_SSD1305
+static struct ssd1305_platform_data ssd1305_pdata = {
+	.gpio_outpu = REG_GPIO_OUT0,
+	.gpios_res = 17,
+	.gpios_cs = 16,
+	.gpios_dc = 18,
+	.gpios_rd = 20,
+	.gpios_wr = 19,
+	
+	.gpios_d0 = 8,
+	.gpios_d1 = 9,
+	.gpios_d2 = 10,
+	.gpios_d3 = 11,
+	.gpios_d4 = 12,
+	.gpios_d5 = 13,
+	.gpios_d6 = 14,
+	.gpios_d7 = 15,
+	.datas_offset = 8,
+};
+
+struct platform_device ssd1305fb_device = {
+	.name	= "ssd1305fb",
+	.id		= -1,
+	.dev	= {
+		.platform_data = &ssd1305_pdata,
+	},
+};
+#endif //#ifdef CONFIG_FB_SSD1305
+
+#ifdef CONFIG_FB_ST7565
+#include <linux/st7565.h>
+static struct st7565_platform_data st7565_pdata = {
+	.gpio_outpu = REG_GPIO_OUT0,
+	.gpios_res = 17,
+	.gpios_cs = 16,
+	.gpios_dc = 18,
+	.gpios_rd = 20,
+	.gpios_wr = 19,
+	
+	.gpios_d0 = 8,
+	.gpios_d1 = 9,
+	.gpios_d2 = 10,
+	.gpios_d3 = 11,
+	.gpios_d4 = 12,
+	.gpios_d5 = 13,
+	.gpios_d6 = 14,
+	.gpios_d7 = 15,
+	.datas_offset = 8,
+};
+
+struct platform_device st7565fb_device = {
+	.name	= "st7565fb",
+	.id		= -1,
+	.dev	= {
+		.platform_data = &st7565_pdata,
+	},
+};
+#endif //#ifdef CONFIG_FB_ST7565
+
+#ifdef CONFIG_FB_ST7920
+static struct st7920_platform_data st7920_pdata = {
+	.gpio_outpu = REG_GPIO_OUT0,
+	.gpios_res = 8,
+	.gpios_cs = 11,
+	.gpios_sid = 9,
+	.gpios_sck = 10,
+
+	.datas_offset = 8,
+};
+
+struct platform_device st7920fb_device = {
+	.name	= "st7920fb",
+	.id		= -1,
+	.dev	= {
+		.platform_data = &st7920_pdata,
+	},
+};
+#endif //#ifdef CONFIG_FB_ST7920
+
+#ifdef CONFIG_KEYBOARD_74X165_GPIO_POLLED
+static struct gpio_keys_button gen74x165_gpio_keys_table[] = {
+	{
+		.code		= KEY_0,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_1,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_2,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_3,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_4,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_5,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_6,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_7,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_8,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_9,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_A,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_B,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_C,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_D,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_E,
+		.active_low	= 1,
+	}, {
+		.code		= KEY_F,
+		.active_low	= 1,
+	},
+};
+
+static struct gen_74x165_platform_data gen74x165_gpio_keys_info = {
+	.q7 = 41,
+	.cp = 39,
+	.pl = 38,
+	.debounce_interval = 1,
+	.buttons	= gen74x165_gpio_keys_table,
+	.nbuttons	= ARRAY_SIZE(gen74x165_gpio_keys_table),
+	.poll_interval	= 50, /* default to 50ms */
+};
+
+static struct platform_device gen74x165_gpio_keys_device = {
+	.name		= "gen74x165_gpio-keys-polled",
+	.dev		= {
+		.platform_data	= &gen74x165_gpio_keys_info,
+	},
+};
+#endif //#ifdef CONFIG_KEYBOARD_74X165_GPIO_POLLED
+
+#ifdef CONFIG_LEDS_PWM
+static struct led_pwm ls1x_pwm_leds[] = {
+	{
+		.name		= "ls1x_pwm_led1",
+		.pwm_id		= 2,
+		.max_brightness	= 255,
+		.pwm_period_ns	= 7812500,
+	},
+	{
+		.name		= "ls1x_pwm_led2",
+		.pwm_id		= 3,
+		.max_brightness	= 255,
+		.pwm_period_ns	= 7812500,
+	},
+};
+
+static struct led_pwm_platform_data ls1x_pwm_data = {
+	.num_leds	= ARRAY_SIZE(ls1x_pwm_leds),
+	.leds		= ls1x_pwm_leds,
+};
+
+static struct platform_device ls1x_leds_pwm = {
+	.name	= "leds_pwm",
+	.id		= -1,
+	.dev	= {
+		.platform_data = &ls1x_pwm_data,
+	},
+};
+#endif //#ifdef CONFIG_LEDS_PWM
+
+#ifdef CONFIG_CAN_SJA1000_PLATFORM
+#include <linux/can/platform/sja1000.h>
+#ifdef CONFIG_LS1X_CAN0
+static struct resource ls1x_sja1000_resources_0[] = {
+	{
+		.start   = LS1X_CAN0_BASE,
+		.end     = LS1X_CAN0_BASE + 0x100 - 1,
+		.flags   = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
+	}, {
+		.start   = LS1X_BOARD_CAN0_IRQ,
+		.end     = LS1X_BOARD_CAN0_IRQ,
+		.flags   = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
+	},
+};
+
+static struct sja1000_platform_data ls1x_sja1000_platform_data_0 = {
+//	.osc_freq	= 16000000,
+	.ocr		= OCR_TX1_PULLDOWN | OCR_TX0_PUSHPULL,
+	.cdr		= CDR_CBP,
+};
+
+static struct platform_device ls1x_sja1000_0 = {
+	.name = "sja1000_platform",
+	.id = 0,
+	.dev = {
+		.platform_data = &ls1x_sja1000_platform_data_0,
+	},
+	.resource = ls1x_sja1000_resources_0,
+	.num_resources = ARRAY_SIZE(ls1x_sja1000_resources_0),
+};
+#endif	//#ifdef CONFIG_LS1X_CAN0
+#ifdef CONFIG_LS1X_CAN1
+static struct resource ls1x_sja1000_resources_1[] = {
+	{
+		.start   = LS1X_CAN1_BASE,
+		.end     = LS1X_CAN1_BASE + 0x100 - 1,
+		.flags   = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
+	}, {
+		.start   = LS1X_BOARD_CAN1_IRQ,
+		.end     = LS1X_BOARD_CAN1_IRQ,
+		.flags   = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
+	},
+};
+
+static struct sja1000_platform_data ls1x_sja1000_platform_data_1 = {
+//	.osc_freq	= 16000000,
+	.ocr		= OCR_TX1_PULLDOWN | OCR_TX0_PUSHPULL,
+	.cdr		= CDR_CBP,
+};
+
+static struct platform_device ls1x_sja1000_1 = {
+	.name = "sja1000_platform",
+	.id = 1,
+	.dev = {
+		.platform_data = &ls1x_sja1000_platform_data_1,
+	},
+	.resource = ls1x_sja1000_resources_1,
+	.num_resources = ARRAY_SIZE(ls1x_sja1000_resources_1),
+};
+#endif //#ifdef CONFIG_LS1X_CAN1
+#endif //#ifdef CONFIG_CAN_SJA1000_PLATFORM
+
+#ifdef	CONFIG_USB_DWC_OTG_LPM
+static u64 ls1c_otg_dma_mask = DMA_BIT_MASK(32);
+static struct resource ls1c_otg_resources[] = {
+	[0] = {
+		.start = LS1X_OTG_BASE,
+		.end   = LS1X_OTG_BASE + 0xfffff,
+		.flags = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start = LS1X_OTG_IRQ,
+		.end   = LS1X_OTG_IRQ,
+		.flags = IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device ls1c_otg_device = {
+	.name           = "dwc_otg",
+	.id             = 0,
+	.dev = {
+		.dma_mask = &ls1c_otg_dma_mask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+	},
+	.num_resources  = ARRAY_SIZE(ls1c_otg_resources),
+	.resource       = ls1c_otg_resources,
+};
+#endif
+/* * *  ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^  SDIO DEVICE  ^^^^^^^^^^^^^^^^^^^^^^^ */
+#ifdef  CONFIG_MMC_LS1C
+static u64 ls1c_sdio_dma_mask = DMA_BIT_MASK(32);
+static struct resource ls1c_sdio_resources[] = { 
+	[0] = {
+		.start = LS1C_SDIO_REG_BASE,
+		.end   = (LS1C_SDIO_REG_BASE + 0x7fff),
+		.flags = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start = LS1C_SDIO_IRQ,
+		.end   = LS1C_SDIO_IRQ,
+		.flags = IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device ls1c_sdio_device = {
+	.name           = "ls1c_sdio",
+	.id             = 0,
+	.dev = {
+		.dma_mask = &ls1c_sdio_dma_mask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+	},
+	.num_resources  = ARRAY_SIZE(ls1c_sdio_resources),
+	.resource       = ls1c_sdio_resources,
+};
+#endif
+#ifdef	CONFIG_SOC_CAMERA_LS1C
+#if 0
+static struct soc_camera_platform_info camera_info = {
+	.format_name = "UYVY",
+	.format_depth = 16,
+	.format = {
+		.code = V4L2_MBUS_FMT_UYVY8_2X8,
+		.colorspace = V4L2_COLORSPACE_SMPTE170M,
+		.field = V4L2_FIELD_NONE,
+		.width = 640,
+		.height = 480,
+	},
+	.bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
+	SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8 |
+	SOCAM_DATA_ACTIVE_HIGH,
+//	.set_capture = camera_set_capture,
+};
+
+static int ls1c_camera_add(struct soc_camera_link *icl, struct device *dev);
+static void ls1c_camera_del(struct soc_camera_link *icl);
+
+static struct soc_camera_link camera_link = {
+	.bus_id		= 0,
+	.add_device	= ls1c_camera_add,
+	.del_device	= ls1c_camera_del,
+	.module_name	= "soc_camera_platform",
+	.priv		= &camera_info,
+};
+
+static struct platform_device *camera_device;
+
+static void ap325rxa_camera_release(struct device *dev)
+{
+	soc_camera_platform_release(&camera_device);
+}
+
+static int ls1c_camera_add(struct soc_camera_link *icl,
+			       struct device *dev)
+{
+	int ret = soc_camera_platform_add(icl, dev, &camera_device, &camera_link,
+					  ls1c_camera_release, 0);
+	if (ret < 0)
+		return ret;
+
+	ret = camera_probe();
+	if (ret < 0)
+		soc_camera_platform_del(icl, camera_device, &camera_link);
+
+	return ret;
+}
+
+static void ls1c_camera_del(struct soc_camera_link *icl)
+{
+	soc_camera_platform_del(icl, camera_device, &camera_link);
+}
+#endif
+#ifdef CONFIG_SOC_CAMERA_GC0308
+static struct i2c_board_info gc0308_i2c_camera = {
+	I2C_BOARD_INFO("GC0308", 0x42 >> 1),
+};
+
+static struct soc_camera_link gc0308_link = {
+	.bus_id         = 0,
+	.i2c_adapter_id = 0,
+	.board_info     = &gc0308_i2c_camera,
+//	.power          = ls1c_camera_power,
+//	.reset          = ls1c_camera_reset,
+};
+#endif
+
+#ifdef CONFIG_SOC_CAMERA_S5K5CA
+static struct i2c_board_info s5k5ca_i2c_camera = {
+	I2C_BOARD_INFO("S5K5CA", 0x78 >> 1),
+};
+
+static struct soc_camera_link s5k5ca_link = {
+	.bus_id         = 0,
+	.i2c_adapter_id = 0,
+	.board_info     = &s5k5ca_i2c_camera,
+//	.power          = ls1c_camera_power,
+//	.reset          = ls1c_camera_reset,
+};
+#endif
+
+#ifdef CONFIG_SOC_CAMERA_OV9650
+static struct i2c_board_info ov9650_i2c_camera = {
+	I2C_BOARD_INFO("OV9650", 0x60>>1),  // i2c addr
+};
+
+static struct soc_camera_link ov9650_link = {
+	.bus_id         = 0,
+	.i2c_adapter_id = 0,
+	.board_info     = &ov9650_i2c_camera,
+//	.power          = ls1c_camera_power,
+//	.reset          = ls1c_camera_reset,
+};
+#endif
+
+static struct platform_device ls1c_camera = {
+//	{
+		.name	= "soc-camera-pdrv",
+		.id	= 0,
+		.dev	= {
+#ifdef CONFIG_SOC_CAMERA_S5K5CA
+			.platform_data = &s5k5ca_link,
+#endif
+
+#ifdef CONFIG_SOC_CAMERA_GC0308
+			.platform_data = &gc0308_link,
+#endif
+
+#ifdef CONFIG_SOC_CAMERA_OV9650
+			.platform_data = &ov9650_link,
+#endif
+		},
+//	}, 
+#if 0
+	{
+		.name	= "soc-camera-pdrv",
+		.id	= 1,
+		.dev	= {
+			.platform_data = &camera_link,
+		},
+	},
+#endif
+};
+
+static struct resource ls1c_camera_resources[] = {
+	{
+		.start   = LS1C_CAMERA_BASE,
+		.end     = LS1C_CAMERA_BASE + 0x3c - 1,
+		.flags   = IORESOURCE_MEM,
+	}, {
+		.start   = LS1X_CAM_IRQ,
+		.end     = LS1X_CAM_IRQ,
+		.flags   = IORESOURCE_IRQ,
+	},
+};
+
+static struct ls1c_camera_pdata ls1c_camera_platform_data = {
+	.mclk_24MHz = 24000000,
+};
+
+static struct platform_device ls1c_camera_host = {
+	.name	= "ls1c-camera",
+	.id		= 0,
+	.dev	= {
+		.platform_data = &ls1c_camera_platform_data,
+	},
+	.resource		= ls1c_camera_resources,
+	.num_resources	= ARRAY_SIZE(ls1c_camera_resources),
+};
+#endif	//End of CONFIG_SOC_CAMERA_LS1C
+
+static struct platform_device ls1a_ac97_device = {
+        .name           = "ls1a-ac97",
+        .id             = -1,
+};
+
+static struct platform_device ls1a_pcm_device = {
+        .name           = "ls1a-pcm-audio",
+        .id             = -1,
+};
+
+static struct platform_device ls1a_codec = {
+        .name           = "uda134x-codec",
+        .id             = -1,
+};
+
+/***********************************************/
+static struct platform_device *ls1b_platform_devices[] __initdata = {
+	&ls1x_uart_device,
+#if 1
+        &ls1a_ac97_device,
+        &ls1a_pcm_device,
+	&ls1a_codec,
+#ifdef  CONFIG_MMC_LS1C
+	&ls1c_sdio_device,
+#endif
+
+#ifdef	CONFIG_USB_DWC_OTG_LPM
+	&ls1c_otg_device, 
+#endif
+
+#ifdef CONFIG_LS1X_FB0
+	&ls1x_fb0_device,
+#endif
+
+#ifdef CONFIG_MTD_NAND_LS1X
+	&ls1b_nand_device,
+#endif
+
+#ifdef CONFIG_USB_EHCI_HCD_LS1X
+	&ls1x_ehci_device,
+#endif
+
+#ifdef CONFIG_USB_OHCI_HCD_LS1X
+	&ls1x_ohci_device,
+#endif
+
+//#ifdef CONFIG_STMMAC_ETH
+#ifdef CONFIG_LS1X_GMAC0
+
+	&ls1x_gmac0_device,
+	//&ls1x_gmac0_mac,
+	//&ls1x_gmac0_phy,
+#endif
+//#endif
+
+#ifdef CONFIG_SOUND_LS1X_AC97
+	&ls1x_audio_device,
+#endif
+
+#ifdef CONFIG_SOUND_LS1X_UDA1342  //new
+	&ls1x_audio_device,
+#endif
+	
+#ifdef CONFIG_LS1B_SPI0
+	&ls1b_spi0_device,
+#endif
+#ifdef CONFIG_LS1B_SPI1
+	&ls1b_spi1_device,
+#endif
+
+#ifdef CONFIG_SPI_GPIO
+	&spigpio_device,
+#endif
+
+#ifdef CONFIG_LS1X_WDT
+	&ls1x_wdt_device,
+#endif
+
+#ifdef CONFIG_RTC_DRV_LOONGSON1
+	&ls1x_rtc_device,
+#endif
+
+#ifdef	CONFIG_SOC_CAMERA_LS1C
+	&ls1c_camera,
+#endif
+
+#ifdef CONFIG_I2C_LS1X
+	&ls1x_i2c0_device,
+	&ls1x_i2c1_device,
+	&ls1x_i2c2_device,
+#endif
+
+#ifdef	CONFIG_SOC_CAMERA_LS1C
+	&ls1c_camera_host,
+#endif
+
+#ifdef CONFIG_KEYBOARD_GPIO_POLLED
+	&ls1b_gpio_key_device,
+#endif
+	
+#ifdef CONFIG_LS1B_BUZZER
+	&ls1b_gpio_buzzer_device,
+#endif
+
+#ifdef CONFIG_LS1B_PWM_DRIVER
+	&ls1b_pwm_device,
+#endif
+
+#ifdef CONFIG_LS1B_BBDIO
+	&ls1b_bobodogio_dog,
+#endif
+
+#ifdef CONFIG_INPUT_GPIO_ROTARY_ENCODER
+	&rotary_encoder_device,
+#endif
+
+#if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE)
+	&ls1bkbd_device,
+#endif
+
+#ifdef CONFIG_FB_SSD1305
+	&ssd1305fb_device,
+#endif
+#ifdef CONFIG_FB_ST7565
+	&st7565fb_device,
+#endif
+#ifdef CONFIG_FB_ST7920
+	&st7920fb_device,
+#endif
+
+#ifdef CONFIG_KEYBOARD_74X165_GPIO_POLLED
+	&gen74x165_gpio_keys_device,
+#endif
+
+#ifdef CONFIG_LEDS_PWM
+	&ls1x_leds_pwm,
+#endif
+
+#ifdef CONFIG_CAN_SJA1000_PLATFORM
+#ifdef CONFIG_LS1X_CAN0
+	&ls1x_sja1000_0,
+#endif
+#ifdef CONFIG_LS1X_CAN1
+	&ls1x_sja1000_1,
+#endif
+#endif
+
+#ifdef CONFIG_BACKLIGHT_GENERIC
+	&ls1x_bl_dev
+#endif
+#ifdef CONFIG_LCD_PLATFORM
+	&ls1x_lcd_powerdev,
+#endif
+#ifdef CONFIG_BACKLIGHT_PWM
+	&ls1x_pwm_backlight,
+#endif
+#endif
+};
+
+int __init ls1c_platform_init(void)
+{
+	ls1x_serial_setup();
+
+#if 1
+#if 0
+#ifdef CONFIG_STMMAC_ETH
+	ls1x_gmac_setup();
+#endif
+#endif
+#ifdef CONFIG_CAN_SJA1000_PLATFORM
+	{
+	#ifdef CONFIG_LS1X_CAN0
+	struct sja1000_platform_data *sja1000_pdata = &ls1x_sja1000_platform_data_0;
+	sja1000_pdata->osc_freq = clk_get_rate(clk);
+	#endif
+	#ifdef CONFIG_LS1X_CAN1
+	sja1000_pdata = &ls1x_sja1000_platform_data_1;
+	sja1000_pdata->osc_freq = clk_get_rate(clk);
+	#endif
+
+#ifdef	CONFIG_LS1A_MACH
+	#ifdef CONFIG_LS1X_CAN0
+	/* CAN0å¤�ç”¨è®¾ç½® */
+//	ls1b_gpio_free(NULL, 66);	/* å¼•è„šè®¾ç½®ä¸ºCANæ¨¡å¼� */
+//	ls1b_gpio_free(NULL, 67);
+	*(volatile int *)0xbfd00420 &= ~(1<<17 | 3<<14 );	/* ä¸ŽI2C3 SPI0å¤�ç”¨ */
+	#endif
+	#ifdef CONFIG_LS1X_CAN1
+	/* CAN1å¤�ç”¨è®¾ç½® */
+//	ls1b_gpio_free(NULL, 68);	/* å¼•è„šè®¾ç½®ä¸ºCANæ¨¡å¼� */
+//	ls1b_gpio_free(NULL, 69);
+	*(volatile int *)0xbfd00420 &= ~(1<<31 | 1<<16 | 3<<12);	/* ä¸ŽNAND I2C2 SPI1å¤�ç”¨ */
+	#endif
+#elif	CONFIG_LS1B_MACH
+	*(volatile int *)0xbfd00424 &= ~(1<<23);	/* ä¸ŽSPI1å¤�ç”¨ */
+	#ifdef CONFIG_LS1X_CAN0
+	/* CAN0å¤�ç”¨è®¾ç½® */
+//	ls1b_gpio_free(NULL, 38);	/* å¼•è„šè®¾ç½®ä¸ºCANæ¨¡å¼� */
+//	ls1b_gpio_free(NULL, 39);
+	*(volatile int *)0xbfd00420 &= ~(1<<24);	/* ä¸ŽI2C1å¤�ç”¨ */
+	*(volatile int *)0xbfd00424 &= ~(1<<4);	/* ä¸ŽUART1_2å¤�ç”¨ */
+	#endif
+	#ifdef CONFIG_LS1X_CAN1
+	/* CAN1å¤�ç”¨è®¾ç½® */
+//	ls1b_gpio_free(NULL, 40);	/* å¼•è„šè®¾ç½®ä¸ºCANæ¨¡å¼� */
+//	ls1b_gpio_free(NULL, 41);
+	*(volatile int *)0xbfd00420 &= ~(1<<25);	/* ä¸ŽI2C2å¤�ç”¨ */
+	*(volatile int *)0xbfd00424 &= ~(1<<5);	/* ä¸ŽUART1_3å¤�ç”¨ */
+	#endif
+#endif
+	}
+#endif	//#ifdef CONFIG_CAN_SJA1000_PLATFORM
+
+#ifdef CONFIG_I2C_LS1X
+	i2c_register_board_info(0, ls1x_i2c0_devs, ARRAY_SIZE(ls1x_i2c0_devs));
+#endif
+
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+	/* è½®è¯¢æ–¹å¼�æˆ–ä¸­æ–­æ–¹å¼�æŽ¢æµ‹cardçš„æ�’æ‹” */
+	gpio_request(DETECT_GPIO, "MMC_SPI GPIO detect");
+	gpio_direction_input(DETECT_GPIO);		/* è¾“å…¥ä½¿èƒ½ */
+#endif
+
+#ifdef CONFIG_TOUCHSCREEN_ADS7846
+	ads7846_detect_penirq();
+#endif
+
+#ifdef CONFIG_LS1B_SPI0
+	/* disable gpio24-27 */
+	*(volatile unsigned int *)0xbfd010c0 &= ~(0xf << 24);
+	spi_register_board_info(ls1b_spi0_devices, ARRAY_SIZE(ls1b_spi0_devices));
+#endif
+
+#ifdef CONFIG_LS1B_SPI1
+	/* ä½¿èƒ½SPI1æŽ§åˆ¶å™¨ï¼Œä¸ŽCAN0 CAN1 GPIO38-GPIO41å¤�ç”¨,å�Œæ—¶å� ç”¨PWM0 PWM1ç”¨äºŽç‰‡é€‰. */
+	/* ç¼–ç¨‹éœ€è¦�æ³¨æ„� */
+	*(volatile unsigned int *)0xbfd00424 |= (0x3 << 23);
+	/* disable gpio38-41 */
+	*(volatile unsigned int *)0xbfd010c4 &= ~(0xf << 6);
+	spi_register_board_info(ls1b_spi1_devices, ARRAY_SIZE(ls1b_spi1_devices));
+#endif
+
+#ifdef CONFIG_SPI_GPIO
+	spi_register_board_info(spi_gpio_devices, ARRAY_SIZE(spi_gpio_devices));
+#endif
+
+	spi_register_board_info(spi_gpio_devices, ARRAY_SIZE(spi_gpio_devices));
+#ifdef CONFIG_BACKLIGHT_GENERIC
+	gpio_request(GPIO_BACKLIGHT_CTRL, "backlight");
+#endif
+#ifdef CONFIG_LCD_PLATFORM
+	gpio_request(GPIO_BACKLIGHT_CTRL, "lcd_enable");
+#endif
+#endif
+	return platform_add_devices(ls1b_platform_devices, ARRAY_SIZE(ls1b_platform_devices));
+}
+
+arch_initcall(ls1c_platform_init);
+
diff -uNra linux-3.0.82/arch/mips/loongson/ls1x/Makefile linux-3.0.82x/arch/mips/loongson/ls1x/Makefile
--- linux-3.0.82/arch/mips/loongson/ls1x/Makefile	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/ls1x/Makefile	2017-09-23 03:42:49.398676958 +0800
@@ -0,0 +1,22 @@
+#
+# Makefile for LST ls232 board.
+#
+
+obj-y	 		+= clock.o setup.o prom.o reset.o irq.o mipsdha.o mem.o  #gpio.o#
+obj-$(CONFIG_HAVE_PWM) += pwm.o
+obj-$(CONFIG_LS1X_TIMER) += time.o
+obj-$(CONFIG_LS1X_HPET) += hpet-time.o
+obj-$(CONFIG_PCI) += pci.o
+obj-$(CONFIG_SUSPEND)	+= pm.o
+#obj-$(CONFIG_GENERIC_GPIO) += gpio-ls1c.o
+
+# 1A æ�¿åž‹å®šä¹‰ï¼Œå¦‚ï¼šäº‘ç»ˆç«¯ã€�æ–¹æ¡ˆæ ¸å¿ƒæ�¿
+obj-$(CONFIG_LS1A_CORE_BOARD) += ls1a-core/
+obj-$(CONFIG_LS1A_CLOUD_TERMIAL) += ls1a-cloud/
+# 1B æ�¿åž‹å®šä¹‰ï¼Œå¦‚ï¼šå¼€å�‘æ�¿ã€�æ ¸å¿ƒæ�¿
+obj-$(CONFIG_LS1B_BOARD) += ls1b-board/
+obj-$(CONFIG_LS1B_CORE_BOARD) += ls1b-core/
+
+obj-$(CONFIG_LS1C_MACH) += ls1c/
+
+EXTRA_AFLAGS := $(CFLAGS)
diff -uNra linux-3.0.82/arch/mips/loongson/ls1x/mem.c linux-3.0.82x/arch/mips/loongson/ls1x/mem.c
--- linux-3.0.82/arch/mips/loongson/ls1x/mem.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/ls1x/mem.c	2017-09-23 03:42:49.398676958 +0800
@@ -0,0 +1,89 @@
+/*
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#include <linux/fs.h>
+#include <linux/fcntl.h>
+#include <linux/mm.h>
+
+#include <asm/bootinfo.h>
+
+#include <loongson.h>
+#include <mem.h>
+#include <pci.h>
+
+/* override of arch/mips/mm/cache.c: __uncached_access */
+
+#if 1
+int __uncached_access(struct file *file, unsigned long addr)
+{
+	if (file->f_flags & O_DSYNC)
+		return 1;
+
+	return addr >= __pa(high_memory) ||
+		((addr >= LOONGSON_MMIO_MEM_START) &&
+		 (addr < LOONGSON_MMIO_MEM_END));
+}
+
+#ifdef CONFIG_CPU_SUPPORTS_UNCACHED_ACCELERATED
+
+#include <linux/pci.h>
+#include <linux/sched.h>
+#include <asm/current.h>
+
+static unsigned long uca_start, uca_end;
+
+pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
+			      unsigned long size, pgprot_t vma_prot)
+{
+	unsigned long offset = pfn << PAGE_SHIFT;
+	unsigned long end = offset + size;
+
+	if (__uncached_access(file, offset)) {
+		if (uca_start && (offset >= uca_start) &&
+		    (end <= uca_end))
+			return __pgprot((pgprot_val(vma_prot) &
+					 ~_CACHE_MASK) |
+					_CACHE_UNCACHED_ACCELERATED);
+		else
+			return pgprot_noncached(vma_prot);
+	}
+	return vma_prot;
+}
+
+
+static int __init find_vga_mem_init(void)
+{
+	struct pci_dev *dev = 0;
+	struct resource *r;
+	int idx;
+
+	if (uca_start)
+		return 0;
+
+	for_each_pci_dev(dev) {
+		if ((dev->class >> 16) == PCI_BASE_CLASS_DISPLAY) {
+			for (idx = 0; idx < PCI_NUM_RESOURCES; idx++) {
+				r = &dev->resource[idx];
+				if (!r->start && r->end)
+					continue;
+				if (r->flags & IORESOURCE_IO)
+					continue;
+				if (r->flags & IORESOURCE_MEM) {
+					uca_start = r->start;
+					uca_end = r->end;
+					return 0;
+				}
+			}
+		}
+	}
+
+	return 0;
+}
+
+late_initcall(find_vga_mem_init);
+
+#endif /* !CONFIG_CPU_SUPPORTS_UNCACHED_ACCELERATED */
+#endif
diff -uNra linux-3.0.82/arch/mips/loongson/ls1x/mipsdha.c linux-3.0.82x/arch/mips/loongson/ls1x/mipsdha.c
--- linux-3.0.82/arch/mips/loongson/ls1x/mipsdha.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/ls1x/mipsdha.c	2017-09-23 03:42:49.398676958 +0800
@@ -0,0 +1,141 @@
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/mm.h>
+#include <linux/pci.h>
+#include <linux/init.h>
+#include <linux/proc_fs.h>
+#include <asm/uaccess.h>
+#include <asm/io.h>
+
+static ssize_t mipsdha_proc_read(struct file *file, char *buf, size_t len, loff_t *ppos);
+
+static ssize_t mipsdha_proc_write(struct file *file, const char *buf, size_t len, loff_t *ppos);
+
+
+static struct proc_dir_entry *mipsdha_proc_entry;
+
+#define INFO_SIZE 4096
+static char info_buf[INFO_SIZE];
+
+static struct file_operations mipsdha_fops =
+{
+    owner:	THIS_MODULE,
+    read:	mipsdha_proc_read,
+    write:	mipsdha_proc_write,
+};
+
+static enum {CMD_ERR, CMD_GIB, CMD_GPI} cmd;
+
+typedef struct pciinfo_s
+{
+  int		bus,card,func;
+  unsigned short command;
+  unsigned short vendor,device;
+  unsigned	base0,base1,base2,baserom;
+} pciinfo_t;
+
+
+extern struct proc_dir_entry proc_root;
+static int __init mipsdha_proc_init(void)
+{
+	mipsdha_proc_entry = create_proc_entry("mipsdha", S_IWUSR | S_IRUGO, &proc_root);
+	if (mipsdha_proc_entry == NULL) {
+		printk("MIPSDHA: register /proc/mipsdha failed!\n");
+		return 0;
+	}
+	
+//	mipsdha_proc_entry->owner = THIS_MODULE;
+	mipsdha_proc_entry->proc_fops = &mipsdha_fops;
+
+	cmd=CMD_ERR;
+	return 0;
+}
+
+static ssize_t mipsdha_proc_write (struct file *file, const char *buf, size_t len, loff_t *ppos)
+{
+	char cmd_gib[]="GET IO BASE";
+	char cmd_gpi[]="GET PCI INFO";
+
+	if (len >= INFO_SIZE) return -ENOMEM;
+
+	if (copy_from_user(info_buf, buf, len)) return -EFAULT;
+	info_buf[len] = '\0';
+
+	if (strncmp(info_buf, cmd_gib, sizeof(cmd_gib)-1)==0) {
+		cmd = CMD_GIB;
+		return len;
+	} else if (strncmp(info_buf, cmd_gpi, sizeof(cmd_gpi)-1)==0) {
+		cmd = CMD_GPI;
+		return len;
+	} else {
+		return -EINVAL;
+	}
+}
+
+static ssize_t mipsdha_proc_read (struct file *file, char *buf, size_t len, loff_t *ppos)
+{
+	int info_cnt;
+	pciinfo_t *pciinfo;
+	struct pci_dev *dev = NULL;
+
+	switch (cmd) {
+		default:
+			printk("MIPSDHA: BUG found in function %s!(cmd=%d)\n", 
+					__FUNCTION__, cmd);
+			return -EINVAL;
+
+
+		case CMD_ERR:
+			return -EINVAL;
+
+
+		case CMD_GIB:
+			*(unsigned long *)info_buf = 
+				virt_to_phys((void *) mips_io_port_base);
+			info_cnt=sizeof(unsigned long);
+			break;
+
+
+		case CMD_GPI:
+			pciinfo = (pciinfo_t *) info_buf;
+			info_cnt = 0;
+			for_each_pci_dev(dev) {
+
+				if (info_cnt+sizeof(pciinfo_t)>INFO_SIZE) return -ENOMEM;
+
+				pciinfo->bus = dev->bus->number;
+				pciinfo->card = PCI_SLOT(dev->devfn);
+				pciinfo->func = PCI_FUNC(dev->devfn);
+
+				if (pci_read_config_word(dev, PCI_COMMAND, &pciinfo->command)
+						!= PCIBIOS_SUCCESSFUL) {
+					printk("MIPSDHA: BUG found in function %s!\n", 
+							__FUNCTION__);
+					pciinfo->command=0;
+				}
+
+				pciinfo->vendor = dev->vendor;
+				pciinfo->device = dev->device;
+
+				pciinfo->base0 = (dev->resource[0]).start;
+				pciinfo->base1 = (dev->resource[1]).start;
+				pciinfo->base2 = (dev->resource[2]).start;
+				pciinfo->baserom = (dev->resource[PCI_ROM_RESOURCE]).start;
+
+				pciinfo++;
+				info_cnt += sizeof(pciinfo_t);
+			}
+			break;
+	}
+
+	if (len < info_cnt) 
+		return -ENOMEM;
+
+	if (copy_to_user(buf, info_buf, info_cnt)) 
+		return -EFAULT;
+
+	return info_cnt;
+}
+
+__initcall(mipsdha_proc_init);
diff -uNra linux-3.0.82/arch/mips/loongson/ls1x/pci.c linux-3.0.82x/arch/mips/loongson/ls1x/pci.c
--- linux-3.0.82/arch/mips/loongson/ls1x/pci.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/ls1x/pci.c	2017-09-23 03:42:49.398676958 +0800
@@ -0,0 +1,108 @@
+/*
+ * pci.c
+ *
+ * Copyright (C) 2004 ICT CAS
+ * Author: Lin Wei, ICT CAS
+ *   wlin@ict.ac.cn
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+//#include <linux/config.h>
+//#include <linux/autoconf.h>
+#include <generated/autoconf.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+extern struct pci_ops ls1a_pci_pci_ops;
+//extern void prom_printf(char * fmt, ...);
+
+static struct resource ls1a_pci_mem_resource = {
+        .name   = "LS232 PCI MEM",
+        .start  = 0x14000000UL,
+        .end    = 0x17ffffffUL,
+        .flags  = IORESOURCE_MEM,
+};
+
+static struct resource ls1a_pci_io_resource = {
+        .name   = "LS232 PCI IO MEM",
+        .start  = 0x00004000UL,
+        .end    = 0x000fffffUL,
+        .flags  = IORESOURCE_IO,
+};
+
+
+static struct pci_controller  ls1a_pci_controller = {
+        .pci_ops        = &ls1a_pci_pci_ops,
+        .io_resource    = &ls1a_pci_io_resource,
+        .mem_resource   = &ls1a_pci_mem_resource,
+        .mem_offset     = 0x00000000UL,
+        .io_offset      = 0x00000000UL,
+};
+
+#ifdef CONFIG_LOAD_PCICFG
+#include "pciload.c"
+#endif
+
+#ifdef CONFIG_DISABLE_PCI
+static int disablepci=1;
+#else
+static int disablepci=0;
+#endif
+
+static int __init pcibios_init(void)
+{
+    extern int pci_probe_only;
+
+#ifdef CONFIG_PCI_AUTO
+	pci_probe_only = 0; //not auto assign the resource 
+#else
+	pci_probe_only = 1; //not auto assign the resource 
+#endif
+
+#ifdef CONFIG_TRACE_BOOT
+#endif
+	pr_info("arch_initcall:pcibios_init\n");
+//	pr_info("register_pci_controller : %x\n",&ls1a_pci_controller);
+
+	if(!disablepci)
+	register_pci_controller(&ls1a_pci_controller);
+
+#ifdef CONFIG_LOAD_PCICFG
+	pciload(&ls1a_pci_pci_ops);
+#endif
+	return 0;
+}
+
+arch_initcall(pcibios_init);
+
+static int __init disablepci_setup(char *options)
+{
+    if (!options || !*options)
+        return 0;
+    if(options[0]=='0')disablepci=0;
+    else disablepci=simple_strtoul(options,0,0);
+    return 1;
+}
+
+__setup("disablepci=", disablepci_setup);
diff -uNra linux-3.0.82/arch/mips/loongson/ls1x/pciload.c linux-3.0.82x/arch/mips/loongson/ls1x/pciload.c
--- linux-3.0.82/arch/mips/loongson/ls1x/pciload.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/ls1x/pciload.c	2017-09-23 03:42:49.398676958 +0800
@@ -0,0 +1,106 @@
+static int pciload(struct pci_ops *ops){
+struct pci_bus bus;
+struct pci_dev dev;
+bus.ops=ops;
+dev.bus=&bus;
+bus.number=0x0;
+dev.devfn=0x70;
+pci_write_config_dword(&dev,0xc,0x8008);
+pci_write_config_dword(&dev,0x10,0x14000008);
+pci_write_config_dword(&dev,0x14,0x4001);
+pci_write_config_dword(&dev,0x18,0x15000000);
+pci_write_config_dword(&dev,0x1c,0x0);
+pci_write_config_dword(&dev,0x20,0x0);
+pci_write_config_dword(&dev,0x24,0x0);
+pci_write_config_dword(&dev,0x30,0x5000001);
+pci_write_config_dword(&dev,0x3c,0x8012c);
+bus.number=0x0;
+dev.devfn=0x80;
+pci_write_config_dword(&dev,0xc,0xff00);
+pci_write_config_dword(&dev,0x10,0x4101);
+pci_write_config_dword(&dev,0x14,0x15001000);
+pci_write_config_dword(&dev,0x18,0x0);
+pci_write_config_dword(&dev,0x1c,0x0);
+pci_write_config_dword(&dev,0x20,0x0);
+pci_write_config_dword(&dev,0x24,0x0);
+pci_write_config_dword(&dev,0x30,0x0);
+pci_write_config_dword(&dev,0x3c,0x2020012a);
+bus.number=0x0;
+dev.devfn=0x88;
+pci_write_config_dword(&dev,0xc,0x800000);
+pci_write_config_dword(&dev,0x10,0x0);
+pci_write_config_dword(&dev,0x14,0x0);
+pci_write_config_dword(&dev,0x18,0x0);
+pci_write_config_dword(&dev,0x1c,0x0);
+pci_write_config_dword(&dev,0x20,0x0);
+pci_write_config_dword(&dev,0x24,0x0);
+pci_write_config_dword(&dev,0x30,0x0);
+pci_write_config_dword(&dev,0x3c,0x0);
+bus.number=0x0;
+dev.devfn=0x89;
+pci_write_config_dword(&dev,0xc,0x2000);
+pci_write_config_dword(&dev,0x10,0x1f1);
+pci_write_config_dword(&dev,0x14,0x3f5);
+pci_write_config_dword(&dev,0x18,0x171);
+pci_write_config_dword(&dev,0x1c,0x375);
+pci_write_config_dword(&dev,0x20,0xcc1);
+pci_write_config_dword(&dev,0x24,0x0);
+pci_write_config_dword(&dev,0x30,0x0);
+pci_write_config_dword(&dev,0x3c,0x0);
+bus.number=0x0;
+dev.devfn=0x8a;
+pci_write_config_dword(&dev,0xc,0x8008);
+pci_write_config_dword(&dev,0x10,0x0);
+pci_write_config_dword(&dev,0x14,0x0);
+pci_write_config_dword(&dev,0x18,0x0);
+pci_write_config_dword(&dev,0x1c,0x0);
+pci_write_config_dword(&dev,0x20,0x4201);
+pci_write_config_dword(&dev,0x24,0x0);
+pci_write_config_dword(&dev,0x30,0x0);
+pci_write_config_dword(&dev,0x3c,0x407);
+bus.number=0x0;
+dev.devfn=0x8b;
+pci_write_config_dword(&dev,0xc,0x8008);
+pci_write_config_dword(&dev,0x10,0x0);
+pci_write_config_dword(&dev,0x14,0x0);
+pci_write_config_dword(&dev,0x18,0x0);
+pci_write_config_dword(&dev,0x1c,0x0);
+pci_write_config_dword(&dev,0x20,0x4221);
+pci_write_config_dword(&dev,0x24,0x0);
+pci_write_config_dword(&dev,0x30,0x0);
+pci_write_config_dword(&dev,0x3c,0x40a);
+bus.number=0x0;
+dev.devfn=0x8c;
+pci_write_config_dword(&dev,0xc,0x0);
+pci_write_config_dword(&dev,0x10,0x0);
+pci_write_config_dword(&dev,0x14,0x0);
+pci_write_config_dword(&dev,0x18,0x0);
+pci_write_config_dword(&dev,0x1c,0x0);
+pci_write_config_dword(&dev,0x20,0x0);
+pci_write_config_dword(&dev,0x24,0x0);
+pci_write_config_dword(&dev,0x30,0x0);
+pci_write_config_dword(&dev,0x3c,0x0);
+bus.number=0x0;
+dev.devfn=0x8d;
+pci_write_config_dword(&dev,0xc,0x0);
+pci_write_config_dword(&dev,0x10,0x4301);
+pci_write_config_dword(&dev,0x14,0x4401);
+pci_write_config_dword(&dev,0x18,0x4405);
+pci_write_config_dword(&dev,0x1c,0x0);
+pci_write_config_dword(&dev,0x20,0x0);
+pci_write_config_dword(&dev,0x24,0x0);
+pci_write_config_dword(&dev,0x30,0x0);
+pci_write_config_dword(&dev,0x3c,0x309);
+bus.number=0x0;
+dev.devfn=0x8e;
+pci_write_config_dword(&dev,0xc,0x0);
+pci_write_config_dword(&dev,0x10,0x4501);
+pci_write_config_dword(&dev,0x14,0x0);
+pci_write_config_dword(&dev,0x18,0x0);
+pci_write_config_dword(&dev,0x1c,0x0);
+pci_write_config_dword(&dev,0x20,0x0);
+pci_write_config_dword(&dev,0x24,0x0);
+pci_write_config_dword(&dev,0x30,0x0);
+pci_write_config_dword(&dev,0x3c,0x300);
+
+}
diff -uNra linux-3.0.82/arch/mips/loongson/ls1x/pm.c linux-3.0.82x/arch/mips/loongson/ls1x/pm.c
--- linux-3.0.82/arch/mips/loongson/ls1x/pm.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/ls1x/pm.c	2017-09-23 03:42:49.398676958 +0800
@@ -0,0 +1,678 @@
+/*
+ * Loongson ls1a power management with ACPI support
+ *
+ *	 Copyright (C) 2010 Loongson Technology
+ *	Author: Zeng Lu <zenglu@loongson.cn>
+ *	Modify: Lin XiYuan <linxiyuan-gz@loongson.cn>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/suspend.h>
+#include <linux/pm.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
+
+#include <asm/cacheflush.h>
+#include <ls1b_board.h>
+#include <linux/delay.h>
+//#include <loongson.h>
+#include <../kernel/power/power.h>
+
+extern void prom_printf(char *fmt, ...);
+
+#define	LID_EN		(1 << 5)
+#define	RI_EN		(1 << 8)
+#define	PME_EN		(1 << 9)
+
+#define APB_BASE	0xbfe40000
+#define ACPI_BASE	0x3c000+APB_BASE
+#define GEN_PMCON_1 ACPI_BASE+0x30
+#define GEN_PMCON_2 ACPI_BASE+0x34
+#define GEN_PMCON_3 ACPI_BASE+0x38
+#define PM1_STS		(unsigned int *)(ACPI_BASE+0x0)
+#define PM1_EN		(unsigned int *)(ACPI_BASE+0x4)
+#define PM1_CNT		(unsigned int *)(ACPI_BASE+0x8)
+#define PM1_TMR		(unsigned int *)(ACPI_BASE+0xc)
+#define PROC_CNT	(unsigned int *)(ACPI_BASE+0x10)
+
+#define GPE_STS		(ACPI_BASE+0x20)
+#define GPE_EN		(ACPI_BASE+0x24)
+
+#define	INT0EN		(unsigned int *)0xbfd01044
+#define	INT0POL		(unsigned int *)0xbfd01050
+#define	INT0EDGE	(unsigned int *)0xbfd01054
+
+#define	INT1EN		(unsigned int *)0xbfd0105c
+#define	INT1POL		(unsigned int *)0xbfd01068
+#define	INT1EDGE	(unsigned int *)0xbfd0106c
+
+#define	INT2EN		(unsigned int *)0xbfd01074
+#define	INT2POL		(unsigned int *)0xbfd01080
+#define	INT2EDGE	(unsigned int *)0xbfd01084
+
+#define	INT3EN		(unsigned int *)0xbfd0108c
+#define	INT3POL		(unsigned int *)0xbfd01098
+#define	INT3EDGE	(unsigned int *)0xbfd0109c
+
+#define	INT4EN		(unsigned int *)0xbfd010ac
+#define	INT4POL		(unsigned int *)0xbfd010b8
+#define	INT4EDGE	(unsigned int *)0xbfd010bc
+struct wakeup_state_t {
+	unsigned long gen_regs[16];
+	unsigned long cp0_status;
+	unsigned long cp0_context;
+	unsigned long cp0_pagemask;
+	unsigned long cp0_ebase;
+	unsigned long cp0_config0;
+};
+
+static struct wakeup_state_t wakeup_state;
+
+static unsigned long wakeup_state_address = 0xa01FFC00;
+
+static unsigned int target_sleep_state = 0;
+static unsigned long cached_local_int_flags;
+static unsigned int cached_int0_en;  
+static unsigned int cached_int0_pol;  
+static unsigned int cached_int0_edge;  
+
+static unsigned int cached_int1_en;  
+static unsigned int cached_int1_pol;  
+static unsigned int cached_int1_edge;  
+
+static unsigned int cached_int2_en;  
+static unsigned int cached_int2_pol;  
+static unsigned int cached_int2_edge;  
+
+static unsigned int cached_int3_en;  
+static unsigned int cached_int3_pol;  
+static unsigned int cached_int3_edge;  
+
+static unsigned int cached_int4_en;  
+static unsigned int cached_int4_pol;  
+static unsigned int cached_int4_edge;  
+
+static unsigned int general_wake_conf;
+extern struct kobject *power_kobj;
+
+void general_wake_conf_set(unsigned int val)
+{
+	unsigned int temp;
+
+	temp = LID_EN | RI_EN | PME_EN;
+	val &= temp;
+	writel (0, (void *)GPE_EN);
+	writel(-1, (void *)GPE_STS);
+	writel(val, (void *)GPE_EN);	
+}
+
+static ssize_t gen_wake_store(struct kobject *kobj, struct kobj_attribute *attr,
+			       const char *buf, size_t n)
+{
+	general_wake_conf = simple_strtol(buf, NULL, 16);
+	return n;
+}
+
+static ssize_t gen_wake_show(struct kobject *kobj, struct kobj_attribute *attr,
+				char *buf)
+{
+	return sprintf (buf, "%d\n", general_wake_conf);
+}
+
+power_attr(gen_wake);
+
+static struct attribute * g[] = {
+	&gen_wake_attr.attr,
+	NULL,
+};
+static struct attribute_group attr_group = {
+		.attrs = g,
+};
+
+void arch_suspend_disable_irqs(void)
+{
+    /* disable all mips events */
+//    local_irq_disable();
+	local_irq_save(cached_local_int_flags);
+
+	cached_int0_en	= readl(INT0EN);
+	cached_int0_pol = readl(INT0POL);
+	cached_int0_edge= readl(INT0EDGE);
+
+	cached_int1_en	= readl(INT1EN);
+	cached_int1_pol = readl(INT1POL);
+	cached_int1_edge= readl(INT1EDGE);
+
+	cached_int2_en	= readl(INT2EN);
+	cached_int2_pol = readl(INT2POL);
+	cached_int2_edge= readl(INT2EDGE);
+
+	cached_int3_en	= readl(INT3EN);
+	cached_int3_pol = readl(INT3POL);
+	cached_int3_edge= readl(INT3EDGE);
+
+	cached_int4_en	= readl(INT4EN);
+	cached_int4_pol = readl(INT4POL);
+	cached_int4_edge= readl(INT4EDGE);
+
+	writel(0,INT0EN);
+	writel(0,INT1EN);
+	writel(0,INT2EN);
+	writel(0,INT3EN);
+	writel(0,INT4EN);
+#if 0
+#ifdef CONFIG_I8259
+    /* disable all events of i8259A */
+    cached_slave_mask = inb(PIC_SLAVE_IMR);
+    cached_master_mask = inb(PIC_MASTER_IMR);
+    outb(0xff, PIC_SLAVE_IMR);
+    inb(PIC_SLAVE_IMR);
+    outb(0xff, PIC_MASTER_IMR);
+    inb(PIC_MASTER_IMR);
+#endif
+    /* disable all events of bonito */
+    LOONGSON_INTENCLR = 0xffff;
+    (void)LOONGSON_INTENCLR;
+#endif
+}
+
+void arch_suspend_enable_irqs(void)
+{
+    /* enable all mips events */
+//    local_irq_enable();
+	local_irq_restore(cached_local_int_flags);
+
+	writel(cached_int0_en,	INT0EN);
+	writel(cached_int0_pol, INT0POL);
+	writel(cached_int0_edge,INT0EDGE);
+
+	writel(cached_int1_en,	INT1EN);
+	writel(cached_int1_pol, INT1POL);
+	writel(cached_int1_edge,INT1EDGE);
+
+	writel(cached_int2_en,	INT2EN);
+	writel(cached_int2_pol, INT2POL);
+	writel(cached_int2_edge,INT2EDGE);
+
+	writel(cached_int3_en,	INT3EN);
+	writel(cached_int3_pol, INT3POL);
+	writel(cached_int3_edge,INT3EDGE);
+
+	writel(cached_int4_en,	INT4EN);
+	writel(cached_int4_pol, INT4POL);
+	writel(cached_int4_edge,INT4EDGE);
+
+#if 0
+#ifdef CONFIG_I8259
+    /* only enable the cached events of i8259A */
+    outb(cached_slave_mask, PIC_SLAVE_IMR);
+    outb(cached_master_mask, PIC_MASTER_IMR);
+#endif
+    /* enable all cached events of bonito */
+    LOONGSON_INTENSET = cached_bonito_irq_mask;
+    (void)LOONGSON_INTENSET;
+#endif
+}
+
+
+static int ls1a_pm_valid_state(suspend_state_t state)
+{
+    switch (state) {
+      case PM_SUSPEND_ON:
+		  return 0;
+	  case PM_SUSPEND_STANDBY:
+		  return 1;
+	  case PM_SUSPEND_MEM:
+		  return 3;
+	  default:
+	      return 0;
+	}
+}
+
+static void acpi_mem_checksum(void)
+{
+	volatile unsigned int * addr;
+	volatile unsigned int sum=0;
+	for(addr=(unsigned int *)0xa0200000;addr<(unsigned int *)0xa0400000;addr+=4)
+	  sum+=(unsigned int)(*addr);
+	
+	prom_printf("ACPI MEMORY CHECKSUM: %x\n", sum);
+}
+
+
+static int ls1a_pm_begin(suspend_state_t state)
+{
+//	acpi_mem_checksum();
+	target_sleep_state = state;
+	return 0;
+}
+
+static int ls1a_pm_prepare(void)
+{
+	if(target_sleep_state == 3){
+		//flush_cache_all();
+		mmiowb();
+	}
+	return 0;
+}
+
+void ls1a_save_state_and_wakeup_code(void)
+{
+	/* Save cpu state*/
+	asm volatile(  
+	"move	$8, %0\n\t"
+	"la $9,	1f\n\t"
+	"sw	$9, ($8)\n\t"
+	"sw	$29, 4($8)\n\t"
+	"sw	$30, 8($8)\n\t"
+	"sw	$28, 12($8)\n\t"
+	"sw	$16, 16($8)\n\t"
+	"sw	$17, 20($8)\n\t"
+	"sw	$18, 24($8)\n\t"
+	"sw	$19, 28($8)\n\t"
+	"sw	$20, 32($8)\n\t"
+	"sw	$21, 36($8)\n\t"
+	"sw	$22, 40($8)\n\t"
+	"sw	$23, 44($8)\n\t"
+
+	"sw	$26, 48($8)\n\t"//k0
+	"sw	$27, 52($8)\n\t"//k1
+
+	"sw	$2, 56($8)\n\t"//v0
+	"sw	$3, 60($8)\n\t"//v1
+
+	"mfc0	$9, $12\n\t"
+	"mfc0	$10, $4\n\t"
+	"mfc0	$11, $5\n\t"
+	"sw	$9, 64($8)\n\t"
+	"sw	$10, 68($8)\n\t"
+	"sw	$11, 72($8)\n\t"
+	"1:"
+	:
+	:"r" (&wakeup_state)
+	:"$8","$31","$9","$10","$11"
+	);
+}
+
+void ls1a_restore_state_and_wakeup_code(void)
+{
+	/* ###### This function is not implemented 
+	   since PMON is resposible for the recovery task ###### */
+	asm volatile(  
+	"move	$8, %0\n\t"
+//	"la $9,	1f\n\t"
+//	"sw	$9, ($8)\n\t"
+	"lw	$29, 4($8)\n\t"
+	"lw	$30, 8($8)\n\t"
+	"lw	$28, 12($8)\n\t"
+	"lw	$16, 16($8)\n\t"
+	"lw	$17, 20($8)\n\t"
+	"lw	$18, 24($8)\n\t"
+	"lw	$19, 28($8)\n\t"
+	"lw	$20, 32($8)\n\t"
+	"lw	$21, 36($8)\n\t"
+	"lw	$22, 40($8)\n\t"
+	"lw	$23, 44($8)\n\t"
+
+	"lw	$26, 48($8)\n\t"//k0
+//	"mthi	$26\n\t"
+	"lw	$27, 52($8)\n\t"//k1
+//	"mtlo	$27\n\t"
+
+	"lw	$2, 56($8)\n\t"//v0
+	"lw	$3, 60($8)\n\t"//v1
+
+	"lw	$9, 64($8)\n\t"
+	"lw	$10, 68($8)\n\t"
+	"lw	$11, 72($8)\n\t"
+	"lw	$12, 76($8)\n\t"
+	"lw	$13, 80($8)\n\t"
+	"mtc0	$9, $12\n\t"
+	"mtc0	$10, $4\n\t"
+	"mtc0	$11, $5\n\t"
+	"mtc0	$12, $15\n\t"	//EBASE
+	"mtc0	$13, $16\n\t"	//Config0
+	"1:"
+	:
+	:"r" (&wakeup_state)
+	:"$8","$31","$9","$10","$11","$12","$13"
+	);
+}
+
+static void ls1a_save_gpio_val(unsigned int *ptr)
+{
+	*ptr++ = LOONGSON_GPIOCFG0;
+	*ptr++ = LOONGSON_GPIOCFG1;
+	*ptr++ = LOONGSON_GPIOCFG2;
+
+	*ptr++ = LOONGSON_GPIOIE0;
+	*ptr++ = LOONGSON_GPIOIE1;
+	*ptr++ = LOONGSON_GPIOIE2;
+	
+	*ptr++ = LOONGSON_GPIOIN0;
+	*ptr++ = LOONGSON_GPIOIN1;
+	*ptr++ = LOONGSON_GPIOIN2;
+
+	*ptr++ = LOONGSON_GPIOOUT0;
+	*ptr++ = LOONGSON_GPIOOUT1;
+	*ptr++ = LOONGSON_GPIOOUT2;
+
+	*ptr = *(volatile unsigned int *)0xbfd00420;
+	
+	printk ("gpio_cfg0 = %x !\n",LOONGSON_GPIOCFG0);
+	printk ("gpio_cfg0 = %x !\n",LOONGSON_GPIOCFG1);
+	printk ("gpio_cfg0 = %x !\n",LOONGSON_GPIOCFG2);
+}
+
+static void ls1a_restore_gpio_val(unsigned int *ptr)
+{
+//	*(volatile int *)0xbfd00420 &= ~0x200000;/* enable USB */
+//	*(volatile int *)0xbff10204 = 0;
+//	mdelay(105);
+//	*(volatile int *)0xbff10204 |= 0x40000000;/* ls1a usb reset stop */
+
+	LOONGSON_GPIOCFG0 = *ptr++;
+	LOONGSON_GPIOCFG1 = *ptr++; 
+	LOONGSON_GPIOCFG2 = *ptr++; 
+                                 
+	LOONGSON_GPIOIE0 = *ptr++; 
+	LOONGSON_GPIOIE1 = *ptr++; 
+	LOONGSON_GPIOIE2 = *ptr++; 
+	                  
+	LOONGSON_GPIOIN0 = *ptr++; 
+	LOONGSON_GPIOIN1 = *ptr++; 
+	LOONGSON_GPIOIN2 = *ptr++; 
+                                 
+	LOONGSON_GPIOOUT0 = *ptr++; 
+	LOONGSON_GPIOOUT1 = *ptr++; 
+	LOONGSON_GPIOOUT2 = *ptr++; 
+
+	*(volatile unsigned int *)0xbfd00420 = *ptr;
+}
+
+static int ls1a_pm_enter(suspend_state_t state)
+{
+	u32 reg;
+//	unsigned long flags = 0;
+	unsigned int sleep_gpio_save[13];
+	if(target_sleep_state == 3){
+
+		ls1a_save_gpio_val(sleep_gpio_save);
+		/* Save cpu state*/
+		asm volatile(  
+				"move	$8, %0\n\t"
+				"la $9,	1f\n\t"
+				"sw	$9, ($8)\n\t"
+				"sw	$29, 4($8)\n\t"
+				"sw	$30, 8($8)\n\t"
+				"sw	$28, 12($8)\n\t"
+				"sw	$16, 16($8)\n\t"
+				"sw	$17, 20($8)\n\t"
+				"sw	$18, 24($8)\n\t"
+				"sw	$19, 28($8)\n\t"
+				"sw	$20, 32($8)\n\t"
+				"sw	$21, 36($8)\n\t"
+				"sw	$22, 40($8)\n\t"
+				"sw	$23, 44($8)\n\t"
+
+//				"mfhi	$26\n\t"
+				"sw	$26, 48($8)\n\t"//k0
+//				"mflo	$27\n\t"
+				"sw	$27, 52($8)\n\t"//k1
+
+				"sw	$2, 56($8)\n\t"//v0
+				"sw	$3, 60($8)\n\t"//v1
+
+				"mfc0	$9, $12\n\t"
+				"mfc0	$10, $4\n\t"
+				"mfc0	$11, $5\n\t"
+				"mfc0	$12, $15\n\t"	//EBASE
+				"mfc0	$13, $16\n\t"	//Config0
+				"sw	$9, 64($8)\n\t"
+				"sw	$10, 68($8)\n\t"
+				"sw	$11, 72($8)\n\t"
+				"sw	$12, 76($8)\n\t"
+				"sw	$13, 80($8)\n\t"
+				"1:"
+				:
+				:"r" (&wakeup_state)
+				:"$8","$31","$9","$10","$11","$12","$13"
+				   );
+
+		//	ls1a_save_state_and_wakeup_code();
+		reg = readl((void *)PM1_CNT);
+		reg &= (7<<10);
+		if(reg!=0)
+			goto finish;
+		/* Save wakeup_state to low memory*/
+		memcpy((void *)wakeup_state_address, &wakeup_state, sizeof(wakeup_state));
+		prom_printf("wakeup_state_address's val = 0x%x !\n", *(unsigned int *)wakeup_state_address);
+#if 0
+		prom_printf("ACPI COPY CONTEXT\n");
+		int i;
+		unsigned int *tmp1;
+		unsigned int tmp2;
+		for(i=0;i<19;i++){
+			tmp1 =  (unsigned int *)(wakeup_state_address+4*i);
+			tmp2 =  *tmp1;
+			prom_printf("%x: %x\n ",tmp1, tmp2);
+		}
+#endif
+
+	}
+	//local_irq_save(flags);
+	/* Clear WAK_STS */
+	reg = readl((void *)PM1_STS);
+	reg |= (1<<15);
+	writel(reg, (void *)PM1_STS);
+	/* clear pm1_sts*/
+	writel(0xffffffff,(void *)PM1_STS);
+	/* get PM1A control */
+	reg = readl((void *)PM1_CNT);
+	/* Clear the SLP_EN and SLP_TYP fields */
+	reg &= ~(15<<10);
+	writel(reg, (void *)PM1_CNT);
+	/* Insert the SLP_TYP bits */
+	reg |= ((state+2)<<10);
+	/* Write #1: write the SLP_TYP data to the PM1 Control registers */
+	writel(reg, (void *)PM1_CNT);
+	/* Insert the sleep enable (SLP_EN) bit */
+	//reg |= (1<<13);
+	/* Flush caches, as per ACPI specification */
+	__flush_cache_all();
+	/* Write #2: Write both SLP_TYP + SLP_EN */
+	//writel(reg, (void *)PM1_CNT);
+	//	((void (*)(void))ioremap_nocache(0x1fc00480, 4)) ();
+
+	reg = readl(PM1_EN);
+	reg |= 1<<8;
+	writel(reg, PM1_EN);
+
+	general_wake_conf_set(general_wake_conf);
+
+	if(target_sleep_state == 3)
+		prom_printf("ENTER ACPI STR(S3) STATE\n");
+	if(target_sleep_state == 4)
+		prom_printf("ENTER ACPI STD(S4) STATE\n");
+#if 1
+	*(volatile unsigned int *)0xaffffe34 |= 0x1;	//enable ddr to autorefresh
+	reg = readl((void *)PM1_CNT);
+	reg |= 0x2000;
+	writel(reg, (void *)PM1_CNT);	//enable power manager
+	mmiowb();
+	/*
+	   asm volatile(
+	   "li	$26,	0xbfc00480\n\t"
+	   "jr	$26\n\t"
+	   "nop"
+	   );
+	   */
+#endif
+
+	/* Wait until we enter sleep state */
+#if 0
+	do{
+		reg = readl((void *)PM1_STS)&(1<<15);
+	}while(!reg);
+#endif
+	do{}while(1);
+	/*Hibernation should stop here and won't be executed any more*/
+
+	/*=====================WAKE UP===========================*/
+finish:
+	//local_irq_restore(flags);
+	ls1a_restore_gpio_val(sleep_gpio_save);
+	if(target_sleep_state == 3)
+		prom_printf("LEAVE ACPI STR(S3) STATE\n");
+	if(target_sleep_state == 4)
+		prom_printf("LEAVE ACPI STD(S4) STATE\n");
+	prom_printf ("in %s !\n", __FUNCTION__);
+//	acpi_mem_checksum();
+	if(target_sleep_state == 3){
+		ls1a_restore_state_and_wakeup_code();
+	}
+	return 0;
+}
+
+static void ls1a_pm_wake(void)
+{
+}
+
+static void ls1a_pm_finish(void)
+{
+	printk ("in %s of printk !\n", __FUNCTION__);
+	writel(-1, (void *)PM1_STS);
+	writel(-1, (void *)GPE_STS);
+	writel(0, (void *)PM1_CNT);
+
+//	acpi_mem_checksum();
+#if 0
+	/* Enable power button: clear PWRBTN_STS, enable PWRBTN_EN */
+	u32 reg;
+	reg = readl((void *)PM1_STS);
+	reg |= (1<<8);
+	writel(reg, (void *)PM1_STS);
+
+	reg = readl((void *)PM1_EN);
+	reg |= (1<<8);
+	writel(reg, (void *)PM1_EN);
+
+	/* Clear WAK_STS */
+	reg = readl((void *)PM1_STS);
+	reg |= (1<<15);
+	writel(reg, (void *)PM1_STS);
+
+	/*set SCI_EN*/
+	reg = readl((void *)PM1_CNT);
+	reg |= 1;
+	writel(reg, (void *)PM1_CNT);
+#endif
+}
+
+static void ls1a_pm_end(void)
+{
+	target_sleep_state = 0;
+}
+
+static struct platform_suspend_ops ls1a_suspend_ops = {
+	.valid			= ls1a_pm_valid_state,
+	.begin			= ls1a_pm_begin,
+	.prepare_late		= ls1a_pm_prepare,/* ???? */
+	.enter			= ls1a_pm_enter,
+	.wake			= ls1a_pm_wake,
+	.finish			= ls1a_pm_finish,
+	.end			= ls1a_pm_end,
+};
+ 
+/*
+ * The ACPI specification wants us to save NVS memory regions during hibernation
+ * and to restore them during the subsequent resume.  However, it is not certain
+ * if this mechanism is going to work on all machines, so we allow the user to
+ * disable this mechanism using the 'acpi_sleep=s4_nonvs' kernel command line
+ * option.
+ */
+static bool s4_no_nvs;
+
+void __init acpi_s4_no_nvs(void)
+{
+	s4_no_nvs = true;
+}
+
+static int ls1a_hibernation_begin(void)
+{
+	int error = 0;
+
+	//error = s4_no_nvs ? 0 : hibernate_nvs_alloc();
+	if (!error) {
+		target_sleep_state = 4;
+	}
+
+	printk(KERN_INFO "***ls1a_hibernation_begin***\n");
+	return error;
+}
+
+static int ls1a_hibernation_pre_snapshot(void)
+{
+	int error = ls1a_pm_prepare();
+
+//	if (!error)
+//		hibernate_nvs_save();
+
+	printk(KERN_INFO "***ls1a_hibernation_pre_snapshot***\n");
+	return error;
+}
+
+static int ls1a_hibernation_enter(void)
+{
+	int error = ls1a_pm_enter(4);
+	printk(KERN_INFO "***ls1a_hibernation_enter***\n");
+	return error;
+}
+
+static void ls1a_hibernation_finish(void)
+{
+	//hibernate_nvs_free();
+	ls1a_pm_finish();
+	printk(KERN_INFO "***ls1a_hibernation_finish***\n");
+}
+
+static void ls1a_hibernation_leave(void)
+{
+	/* Restore the NVS memory area */
+	//hibernate_nvs_restore();
+	printk(KERN_INFO "***ls1a_hibernation_leave***\n");
+}
+
+static int ls1a_hibernation_pre_restore(void)
+{
+	printk(KERN_INFO "***ls1a_hibernation_pre_restore***\n");
+	return 0;
+}
+static void ls1a_hibernation_restore_cleanup(void)
+{
+	printk(KERN_INFO "***ls1a_hibernation_restore_cleanup***\n");
+}
+static struct platform_hibernation_ops ls1a_hibernation_ops = {
+	.begin = ls1a_hibernation_begin,
+	.end = ls1a_pm_end,
+	.pre_snapshot = ls1a_hibernation_pre_snapshot,
+	.finish = ls1a_hibernation_finish,
+	.prepare = ls1a_pm_prepare,
+	.enter = ls1a_hibernation_enter,
+	.leave = ls1a_hibernation_leave,
+	.pre_restore=ls1a_hibernation_pre_restore,
+	.restore_cleanup=ls1a_hibernation_restore_cleanup,
+};
+
+static int __init ls1a_pm_init(void)
+{
+	suspend_set_ops(&ls1a_suspend_ops);
+	hibernation_set_ops(&ls1a_hibernation_ops);
+	sysfs_create_group(power_kobj, &attr_group);
+	return 0;
+}
+arch_initcall(ls1a_pm_init);
diff -uNra linux-3.0.82/arch/mips/loongson/ls1x/prom.c linux-3.0.82x/arch/mips/loongson/ls1x/prom.c
--- linux-3.0.82/arch/mips/loongson/ls1x/prom.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/ls1x/prom.c	2017-09-23 03:42:49.398676958 +0800
@@ -0,0 +1,225 @@
+/*
+ * Copyright (c) 2012 Tang, Haifeng <tanghaifeng-gz@loongson.cn>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/serial_reg.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/ctype.h>
+#include <video/ls1xfb.h>
+
+#include <asm/bootinfo.h>
+#include <asm/mach-loongson/ls1x/ls1b_board.h>
+#include <prom.h>
+
+#define DEFAULT_MEMSIZE			32	/* If no memsize provided */
+#define DEFAULT_BUSCLOCK		133000000
+#define DEFAULT_CPUCLOCK		266000000
+
+#ifdef CONFIG_STMMAC_ETH
+extern unsigned char *hwaddr;
+char *tmp;
+#endif
+
+unsigned long cpu_clock_freq;
+unsigned long ls1x_bus_clock;
+EXPORT_SYMBOL(cpu_clock_freq);
+EXPORT_SYMBOL(ls1x_bus_clock);
+
+int prom_argc;
+char **prom_argv, **prom_envp;
+unsigned long memsize, highmemsize;
+
+const char *get_system_type(void)
+{
+	return "LS232 Evaluation board-V1.0";
+}
+
+char *prom_getenv(char *envname)
+{
+	char **env = prom_envp;
+	int i;
+
+	i = strlen(envname);
+
+	while (*env) {
+		if (strncmp(envname, *env, i) == 0 && *(*env+i) == '=')
+			return *env + i + 1;
+		env++;
+	}
+
+	return 0;
+}
+
+static inline unsigned long env_or_default(char *env, unsigned long dfl)
+{
+	char *str = prom_getenv(env);
+	return str ? simple_strtol(str, 0, 0) : dfl;
+}
+
+void __init prom_init_cmdline(void)
+{
+	char *c = &(arcs_cmdline[0]);
+	int i;
+
+	for (i = 1; i < prom_argc; i++) {
+		strcpy(c, prom_argv[i]);
+		c += strlen(prom_argv[i]);
+		if (i < prom_argc-1)
+			*c++ = ' ';
+	}
+	*c = 0;
+}
+
+void __init prom_init(void)
+{
+	prom_argc = fw_arg0;
+	prom_argv = (char **)fw_arg1;
+	prom_envp = (char **)fw_arg2;
+
+	mips_machtype = MACH_LS232;
+	system_state = SYSTEM_BOOTING;
+
+	prom_init_cmdline();
+
+	ls1x_bus_clock = env_or_default("busclock", DEFAULT_BUSCLOCK);
+	cpu_clock_freq = env_or_default("cpuclock", DEFAULT_CPUCLOCK);
+	memsize = env_or_default("memsize", DEFAULT_MEMSIZE);
+	highmemsize = env_or_default("highmemsize", 0x0);
+	printk("memsize = %ld highmemsize = %ld \n", memsize, highmemsize);
+
+#ifdef	CONFIG_LS1A_MACH
+	if (ls1x_bus_clock == 0)
+		ls1x_bus_clock = 100  * 1000000;
+	if (cpu_clock_freq == 0)
+		cpu_clock_freq = 200 * 1000000;
+#endif
+
+#if defined(CONFIG_LS1C_MACH)
+	__raw_writel(__raw_readl(LS1X_MUX_CTRL0) & (~USBHOST_SHUT), LS1X_MUX_CTRL0);
+	__raw_writel(__raw_readl(LS1X_MUX_CTRL1) & (~USBHOST_RSTN), LS1X_MUX_CTRL1);
+	mdelay(60);
+	/* reset stop */
+	__raw_writel(__raw_readl(LS1X_MUX_CTRL1) | USBHOST_RSTN, LS1X_MUX_CTRL1);
+#else
+	/* éœ€è¦�å¤�ä½�ä¸€æ¬¡USBæŽ§åˆ¶å™¨ï¼Œä¸”å¤�ä½�æ—¶é—´è¦�è¶³å¤Ÿé•¿ï¼Œå�¦åˆ™å�¯åŠ¨æ—¶èŽ«å��å…¶å¦™çš„æ­»æœº */
+	#if defined(CONFIG_LS1A_MACH)
+	#define MUX_CTRL0 LS1X_MUX_CTRL0
+	#define MUX_CTRL1 LS1X_MUX_CTRL1
+	#elif defined(CONFIG_LS1B_MACH)
+	#define MUX_CTRL0 LS1X_MUX_CTRL1
+	#define MUX_CTRL1 LS1X_MUX_CTRL1
+	#endif
+//	__raw_writel(__raw_readl(MUX_CTRL0) | USB_SHUT, MUX_CTRL0);
+//	__raw_writel(__raw_readl(MUX_CTRL1) & (~USB_RESET), MUX_CTRL1);
+//	mdelay(10);
+//	#if defined(CONFIG_USB_EHCI_HCD_LS1X) || defined(CONFIG_USB_OHCI_HCD_LS1X)
+	/* USB controller enable and reset */
+	__raw_writel(__raw_readl(MUX_CTRL0) & (~USB_SHUT), MUX_CTRL0);
+	__raw_writel(__raw_readl(MUX_CTRL1) & (~USB_RESET), MUX_CTRL1);
+	mdelay(60);
+	/* reset stop */
+	__raw_writel(__raw_readl(MUX_CTRL1) | USB_RESET, MUX_CTRL1);
+//	#endif
+#endif
+
+#ifdef CONFIG_STMMAC_ETH
+	tmp = prom_getenv("ethaddr");
+	if (tmp) {
+		sscanf(tmp, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx", 
+			&hwaddr[0], &hwaddr[1], &hwaddr[2], &hwaddr[3], &hwaddr[4], &hwaddr[5]);
+	}
+#endif
+
+#if defined(CONFIG_LS1B_MACH) && defined(CONFIG_FB_LOONGSON1)
+	/* å�ªç”¨äºŽls1bçš„lcdæŽ¥å�£ä¼ vgaæŽ¥å�£æ—¶ä½¿ç”¨ï¼Œå¦‚äº‘ç»ˆç«¯ï¼Œ
+	 å› ä¸ºä½¿ç”¨vgaæ—¶ï¼Œpllé€šè¿‡è®¡ç®—éš¾ä»¥å¾—åˆ°å�ˆé€‚çš„åˆ†é¢‘;ç»™LS1X_CLK_PLL_FREQå’ŒLS1X_CLK_PLL_DIV
+	 å¯„å­˜å™¨ä¸€ä¸ªå›ºå®šçš„å€¼ */
+	{
+	int i;
+	int default_xres = 800;
+	int default_yres = 600;
+	int default_refresh = 75;
+	struct ls1b_vga *input_vga;
+	extern struct ls1b_vga ls1b_vga_modes[];
+	char *strp, *options, *end;
+
+	options = strstr(arcs_cmdline, "video=ls1bvga:");
+	if (options) {
+		
+		options += 14;
+		/* ls1bvga:1920x1080-16@60 */
+		for (i=0; i<strlen(options); i++)
+			if (isdigit(*(options+i)))
+				break;	/* æŸ¥æ‰¾optionså­—ä¸²ä¸­ç¬¬ä¸€ä¸ªæ•°å­—æ—¶içš„å€¼ */
+		if (i < 4) {
+			default_xres = simple_strtoul(options+i, &end, 10);
+			default_yres = simple_strtoul(end+1, NULL, 10);
+			/* refresh */
+			strp = strchr((const char *)options, '@');
+			if (strp) {
+				default_refresh = simple_strtoul(strp+1, NULL, 0);
+			}
+			if ((default_xres<=0 || default_xres>1920) || 
+				(default_yres<=0 || default_yres>1080)) {
+				pr_info("Warning: Resolution is out of range."
+					"MAX resolution is 1920x1080@60Hz\n");
+				default_xres = 800;
+				default_yres = 600;
+			}
+		}
+		for (input_vga=ls1b_vga_modes; input_vga->ls1b_pll_freq !=0; ++input_vga) {
+//			if((input_vga->xres == default_xres) && (input_vga->yres == default_yres) && 
+//				(input_vga->refresh == default_refresh)) {
+			if ((input_vga->xres == default_xres) && (input_vga->yres == default_yres)) {
+				break;
+			}
+		}
+		if (input_vga->ls1b_pll_freq) {
+			u32 pll, ctrl;
+			u32 x, divisor;
+
+			writel(input_vga->ls1b_pll_freq, LS1X_CLK_PLL_FREQ);
+			writel(input_vga->ls1b_pll_div, LS1X_CLK_PLL_DIV);
+			/* è®¡ç®—ddré¢‘çŽ‡ï¼Œæ›´æ–°ä¸²å�£åˆ†é¢‘ */
+			pll = input_vga->ls1b_pll_freq;
+			ctrl = input_vga->ls1b_pll_div & DIV_DDR;
+			divisor = (12 + (pll & 0x3f)) * APB_CLK / 2
+					+ ((pll >> 8) & 0x3ff) * APB_CLK / 1024 / 2;
+			divisor = divisor / (ctrl >> DIV_DDR_SHIFT);
+			divisor = divisor / 2 / (16*115200);
+			x = readb(PORT(UART_LCR));
+			writeb(x | UART_LCR_DLAB, PORT(UART_LCR));
+			writeb(divisor & 0xff, PORT(UART_DLL));
+			writeb((divisor>>8) & 0xff, PORT(UART_DLM));
+			writeb(x & ~UART_LCR_DLAB, PORT(UART_LCR));
+		}
+	}
+	}
+#endif
+	
+//	memsize = 64;
+	pr_info("memsize=%ldMB, highmemsize=%ldMB\n", memsize, highmemsize);
+}
+
+void __init prom_free_prom_memory(void)
+{
+}
+
+void __init prom_putchar(char c)
+{
+	int timeout;
+	timeout = 1024;
+
+	while (((readb(PORT(UART_LSR)) & UART_LSR_THRE) == 0)
+			&& (timeout-- > 0))
+		;
+
+	writeb(c, PORT(UART_TX));
+}
+
diff -uNra linux-3.0.82/arch/mips/loongson/ls1x/pwm.c linux-3.0.82x/arch/mips/loongson/ls1x/pwm.c
--- linux-3.0.82/arch/mips/loongson/ls1x/pwm.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/ls1x/pwm.c	2017-09-23 03:42:49.402676946 +0800
@@ -0,0 +1,182 @@
+/*
+ *  Copyright (c) 2012 Tang, Haifeng <tanghaifeng-gz@loongson.cn>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under  the terms of the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the License, or (at your
+ *  option) any later version.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/module.h>
+#include <linux/io.h>
+
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/pwm.h>
+#include <linux/gpio.h>
+
+#include <ls1b_board.h>
+
+#define REG_PWM_CNTR	0x00
+#define REG_PWM_HRC		0x04
+#define REG_PWM_LRC		0x08
+#define REG_PWM_CTRL	0x0c
+
+#ifdef CONFIG_LS1A_MACH
+#define LS_GPIO_PWM0	84
+#define LS_GPIO_PWM1	85
+#define LS_GPIO_PWM2	86
+#define LS_GPIO_PWM3	87
+#else
+#define LS_GPIO_PWM0	0
+#define LS_GPIO_PWM1	1
+#define LS_GPIO_PWM2	2
+#define LS_GPIO_PWM3	3
+#endif
+
+void __iomem *ls1x_pwm_base;
+static struct clk *ls1x_pwm_clk;
+
+DEFINE_MUTEX(ls1x_pwm_mutex);
+
+struct pwm_device {
+	unsigned int id;
+	unsigned int gpio;
+	bool used;
+};
+
+static struct pwm_device ls1x_pwm_list[] = {
+	{ 0, LS_GPIO_PWM0, false },
+	{ 1, LS_GPIO_PWM1, false },
+	{ 2, LS_GPIO_PWM2, false },
+	{ 3, LS_GPIO_PWM3, false },
+};
+
+struct pwm_device *pwm_request(int id, const char *label)
+{
+	int ret = 0;
+	u32 x;
+	struct pwm_device *pwm;
+
+	if (id > 3 || !ls1x_pwm_clk)
+		return ERR_PTR(-ENODEV);
+
+	mutex_lock(&ls1x_pwm_mutex);
+
+	pwm = &ls1x_pwm_list[id];
+	if (pwm->used)
+		ret = -EBUSY;
+	else
+		pwm->used = true;
+
+	mutex_unlock(&ls1x_pwm_mutex);
+
+	if (ret)
+		return ERR_PTR(ret);
+
+	/* å¦‚æžœè¯¥å¼•è„šè¢«è®¾ç½®ä¸ºgpioéœ€è¦�é‡Šæ”¾è¯¥å¼•è„š */
+	gpio_free(pwm->gpio);
+
+	x = __raw_readl(LS1X_MUX_CTRL0);
+	/* è®¾å¤‡å¤�ç”¨æ¨¡å¼�ä¸ºpwm */
+#ifdef CONFIG_LS1A_MACH
+	if (id == 0 || id == 1) {
+		x = x & (~NAND1_USE_PWM01) & (~GMAC0_USE_PWM01);
+		__raw_writel(x, LS1X_MUX_CTRL0);
+	} else {
+		x = x & (~NAND_D45_USE_PWM23) & (~GMAC1_USE_PWM23);
+		__raw_writel(x, LS1X_MUX_CTRL0);
+	}
+#else
+	if (id == 0 || id == 1) {
+		x = x & (~UART0_USE_PWM01) & (~NAND3_USE_PWM01) & (~NAND2_USE_PWM01) & (~NAND1_USE_PWM01);
+		__raw_writel(x, LS1X_MUX_CTRL0);
+		x = __raw_readl(LS1X_MUX_CTRL1);
+		x = x & (~SPI1_CS_USE_PWM01) & (~GMAC0_USE_PWM01);
+		__raw_writel(x, LS1X_MUX_CTRL1);
+	} else {
+		x = x & (~UART0_USE_PWM23) & (~NAND3_USE_PWM23) & (~NAND2_USE_PWM23) & (~NAND1_USE_PWM23);
+		__raw_writel(x, LS1X_MUX_CTRL0);
+		x = __raw_readl(LS1X_MUX_CTRL1);
+		x = x & (~GMAC1_USE_PWM23);
+		__raw_writel(x, LS1X_MUX_CTRL1);
+	}
+#endif
+
+	return pwm;
+}
+
+void pwm_free(struct pwm_device *pwm)
+{
+	pwm_disable(pwm);
+	gpio_free(pwm->gpio);
+	pwm->used = false;
+}
+
+int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
+{
+	unsigned long long tmp;
+	unsigned long period, duty;
+	unsigned int id = pwm->id;
+
+	if (duty_ns < 0 || duty_ns > period_ns)
+		return -EINVAL;
+
+	tmp = (unsigned long long)clk_get_rate(ls1x_pwm_clk) * period_ns;
+	do_div(tmp, 1000000000);
+	period = tmp;
+
+	tmp = (unsigned long long)period * duty_ns;
+	do_div(tmp, period_ns);
+	duty = period - tmp;
+
+	/* è®¾ç½®å� ç©ºæ¯” */
+	writel(duty, ls1x_pwm_base + (id << 4) + REG_PWM_HRC);
+	writel(period, ls1x_pwm_base + (id << 4) + REG_PWM_LRC);
+
+	pwm_enable(pwm);
+
+	return 0;
+}
+
+int pwm_enable(struct pwm_device *pwm)
+{
+	unsigned int id = pwm->id;
+
+	writel(0x00, ls1x_pwm_base + (id << 4) + REG_PWM_CNTR);
+	writeb(0x01, ls1x_pwm_base + (id << 4) + REG_PWM_CTRL);
+	return 0;
+}
+
+void pwm_disable(struct pwm_device *pwm)
+{
+	unsigned int id = pwm->id;
+
+	writeb(0x09, ls1x_pwm_base + (id << 4) + REG_PWM_CTRL);
+}
+
+static int __init ls1x_pwm_init(void)
+{
+	int ret = 0;
+
+	ls1x_pwm_base = ioremap(LS1B_PWM0_BASE, 0xf);
+	if (!ls1x_pwm_base)
+		panic("Failed to ioremap timer registers");
+
+	ls1x_pwm_clk = clk_get(NULL, "apb");
+
+	if (IS_ERR(ls1x_pwm_clk)) {
+		ret = PTR_ERR(ls1x_pwm_clk);
+		ls1x_pwm_clk = NULL;
+	}
+
+	return ret;
+}
+subsys_initcall(ls1x_pwm_init);
diff -uNra linux-3.0.82/arch/mips/loongson/ls1x/reset.c linux-3.0.82x/arch/mips/loongson/ls1x/reset.c
--- linux-3.0.82/arch/mips/loongson/ls1x/reset.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/ls1x/reset.c	2017-09-23 03:42:49.402676946 +0800
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2012 Tang, Haifeng <tanghaifeng-gz@loongson.cn>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ */
+#include <linux/io.h>
+#include <linux/pm.h>
+
+#include <asm/reboot.h>
+
+//#include <asm/gpio.h>
+#include <asm/mach-loongson/ls1x/ls1b_board.h>
+
+static void ls1x_restart(char *command)
+{
+	void __iomem *wdt_base = ioremap(LS1X_WDT_BASE, 0x0f);
+	
+	writel(1, wdt_base + WDT_EN);
+	writel(1, wdt_base + WDT_TIMER);
+	writel(1, wdt_base + WDT_SET);
+
+#ifdef CONFIG_LS1A_CLOUD_TERMIAL
+	ls1b_gpio_direction_output(NULL, 0, 0);
+#endif
+	
+	while (1) {
+		__asm__(".set push;\n"
+			".set mips3;\n"
+			"wait;\n"
+			".set pop;\n"
+		);
+	}
+}
+
+static void ls1x_halt(void)
+{
+	pr_notice("\n\n** You can safely turn off the power now **\n\n");
+	while (1) {
+		if (cpu_wait)
+			cpu_wait();
+	}
+}
+
+static void ls1x_power_off(void)
+{
+	ls1x_halt();
+}
+
+static int __init ls1x_reboot_setup(void)
+{
+	_machine_restart = ls1x_restart;
+	_machine_halt = ls1x_halt;
+	pm_power_off = ls1x_power_off;
+	
+	return 0;
+}
+
+arch_initcall(ls1x_reboot_setup);
+
diff -uNra linux-3.0.82/arch/mips/loongson/ls1x/setup.c linux-3.0.82x/arch/mips/loongson/ls1x/setup.c
--- linux-3.0.82/arch/mips/loongson/ls1x/setup.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/ls1x/setup.c	2017-09-23 03:42:49.402676946 +0800
@@ -0,0 +1,95 @@
+/*
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ */
+
+#include <linux/ioport.h>
+#include <linux/module.h>
+
+#include <asm/bootinfo.h>
+#include <asm/wbflush.h>
+#include <prom.h>
+
+#ifdef CONFIG_VT
+#include <linux/console.h>
+#include <linux/screen_info.h>
+#endif
+
+#include <asm/mach-loongson/ls1x/ls1b_board.h>
+
+extern void prom_printf(char *fmt, ...);
+
+#ifdef CONFIG_64BIT
+#define PTR_PAD(p) ((0xffffffff00000000)|((unsigned long long)(p)))
+#else
+#define PTR_PAD(p) (p)
+#endif
+
+void (*__wbflush)(void);
+EXPORT_SYMBOL(__wbflush);
+
+static void wbflush_sb2f(void)
+{
+      *(volatile unsigned long *)CKSEG1;
+	  asm(".set\tpush\n\t"
+	  ".set\tnoreorder\n\t"
+	  ".set mips3\n\t"
+	  "sync\n\t"
+	  "nop\n\t"
+	  ".set\tpop\n\t"
+	  ".set mips0\n\t");
+}
+
+void  __init plat_mem_setup(void)
+{
+	set_io_port_base(PTR_PAD(0xbc000000));
+	
+	ioport_resource.start = 0;
+	ioport_resource.end = 0xffffffff;
+	iomem_resource.start = 0;
+	iomem_resource.end = 0xffffffff;
+
+	__wbflush = wbflush_sb2f;
+
+	add_memory_region(0, memsize<<20, BOOT_MEM_RAM);  
+
+#ifdef CONFIG_VT
+#if defined(CONFIG_VGA_CONSOLE)
+	 conswitchp = &vga_con;
+
+	 screen_info = (struct screen_info) {
+	         0, 25,                  /* orig-x, orig-y */
+	         0,                      /* unused */
+	         0,                      /* orig-video-page */
+	         0,                      /* orig-video-mode */
+	         80,                     /* orig-video-cols */
+	         0,0,0,                  /* ega_ax, ega_bx, ega_cx */
+	         25,                     /* orig-video-lines */
+	         VIDEO_TYPE_VGAC,        /* orig-video-isVGA */
+	         16                      /* orig-video-points */
+	 };      
+#elif defined(CONFIG_DUMMY_CONSOLE)
+	 	conswitchp = &dummy_con;
+#endif
+#endif
+
+
+	/* Shut down all device DMA */
+	/* LCD Controller DMA */
+//	*(unsigned int *)KSEG1ADDR(FCR_SOC_LCD_BASE+REG_LCD_CTRL) = 0x000201a0;
+	/* Reset MAC to shut down MAC DMA */
+//	*(unsigned int *)KSEG1ADDR(FCR_SOC_MAC1_BASE+REG_MAC_CTRLMODER) = 0x00000000;
+//	*(unsigned int *)KSEG1ADDR(FCR_SOC_MAC1_BASE+REG_MAC_MODER) = 0x00800000;
+	
+//	prom_printf("system_state: %d\n", system_state);
+	
+/*
+	status = inb(FCR_SOC_APB_MISC_BASE+REG_APB_MISC_CTL);
+	status |= 0xc0; //SET LED
+	outb(FCR_SOC_APB_MISC_BASE+REG_APB_MISC_CTL, status);
+*/
+}
+
diff -uNra linux-3.0.82/arch/mips/loongson/ls1x/time.c linux-3.0.82x/arch/mips/loongson/ls1x/time.c
--- linux-3.0.82/arch/mips/loongson/ls1x/time.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/ls1x/time.c	2017-09-23 03:42:49.402676946 +0800
@@ -0,0 +1,226 @@
+/*
+ *  Copyright (c) 2012 Tang, Haifeng <tanghaifeng-gz@loongson.cn>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under  the terms of the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the License, or (at your
+ *  option) any later version.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/time.h>
+#include <linux/clockchips.h>
+
+#include <asm/time.h>
+
+#include <asm/mach-loongson/ls1x/ls1b_board.h>
+#include <asm/mach-loongson/ls1x/ls1x_time.h>
+
+#define TIMER_CLOCKEVENT 0
+#define TIMER_CLOCKSOURCE 1
+
+#define TIMER_CNTR	0x00
+#define TIMER_HRC	0x04
+#define TIMER_LRC	0x08
+#define TIMER_CTRL	0x0c
+
+#if defined(CONFIG_TIMER_USE_PWM0)
+#define LS1X_TIMER_BASE	LS1B_PWM0_BASE
+#define LS1X_TIMER_IRQ	17
+
+#elif defined(CONFIG_TIMER_USE_PWM1)
+#define LS1X_TIMER_BASE	LS1B_PWM1_BASE
+#define LS1X_TIMER_IRQ	18
+
+#elif defined(CONFIG_TIMER_USE_PWM2)
+#define LS1X_TIMER_BASE	LS1B_PWM2_BASE
+#define LS1X_TIMER_IRQ	19
+
+#elif defined(CONFIG_TIMER_USE_PWM3)
+#define LS1X_TIMER_BASE	LS1B_PWM3_BASE
+#define LS1X_TIMER_IRQ	20
+
+#else
+#define LS1X_TIMER_BASE	LS1B_PWM0_BASE
+#define LS1X_TIMER_IRQ	17
+#endif
+
+void __iomem *ls1x_timer_base;
+extern unsigned long ls1x_bus_clock;
+static uint32_t ls1x_jiffies_per_tick;
+
+DEFINE_SPINLOCK(ls1x_lock);
+EXPORT_SYMBOL(ls1x_lock);
+
+static cycle_t ls1x_clocksource_read(struct clocksource *cs)
+{
+#if 1
+	unsigned long flags;
+	int count;
+	u32 jifs;
+	static int old_count;
+	static u32 old_jifs;
+
+	spin_lock_irqsave(&ls1x_lock, flags);
+	/*
+	 * Although our caller may have the read side of xtime_lock,
+	 * this is now a seqlock, and we are cheating in this routine
+	 * by having side effects on state that we cannot undo if
+	 * there is a collision on the seqlock and our caller has to
+	 * retry.  (Namely, old_jifs and old_count.)  So we must treat
+	 * jiffies as volatile despite the lock.  We read jiffies
+	 * before latching the timer count to guarantee that although
+	 * the jiffies value might be older than the count (that is,
+	 * the counter may underflow between the last point where
+	 * jiffies was incremented and the point where we latch the
+	 * count), it cannot be newer.
+	 */
+	jifs = jiffies;
+	/* read the count */
+	count = readl(ls1x_timer_base + TIMER_CNTR);
+
+	/*
+	 * It's possible for count to appear to go the wrong way for this
+	 * reason:
+	 *
+	 *  The timer counter underflows, but we haven't handled the resulting
+	 *  interrupt and incremented jiffies yet.
+	 *
+	 * Previous attempts to handle these cases intelligently were buggy, so
+	 * we just do the simple thing now.
+	 */
+	if (count < old_count && jifs == old_jifs)
+		count = old_count;
+
+	old_count = count;
+	old_jifs = jifs;
+
+	spin_unlock_irqrestore(&ls1x_lock, flags);
+
+	return (cycle_t) (jifs * ls1x_jiffies_per_tick) + count;
+#else
+	return readl(ls1x_timer_base + TIMER_CNTR);
+#endif
+}
+
+static struct clocksource ls1x_clocksource = {
+	.name = "ls1x-timer",
+	.read = ls1x_clocksource_read,
+	.mask = CLOCKSOURCE_MASK(24),
+	.flags = CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
+static irqreturn_t ls1x_clockevent_irq(int irq, void *devid)
+{
+	struct clock_event_device *cd = devid;
+
+	writel(readl(ls1x_timer_base+TIMER_CTRL) | 0x40, ls1x_timer_base + TIMER_CTRL);
+	if (cd->mode != CLOCK_EVT_MODE_PERIODIC)
+		writel(readl(ls1x_timer_base+TIMER_CTRL) & 0xfe, ls1x_timer_base + TIMER_CTRL);
+
+//	writel(0x00, ls1x_timer_base + TIMER_CNTR);
+	writel(0x29, ls1x_timer_base + TIMER_CTRL);
+
+	cd->event_handler(cd);
+
+	return IRQ_HANDLED;
+}
+
+static void ls1x_clockevent_set_mode(enum clock_event_mode mode,
+	struct clock_event_device *cd)
+{
+	spin_lock(&ls1x_lock);
+	switch (mode) {
+	case CLOCK_EVT_MODE_PERIODIC:
+		writel(ls1x_jiffies_per_tick, ls1x_timer_base + TIMER_HRC);
+		writel(ls1x_jiffies_per_tick, ls1x_timer_base + TIMER_LRC);
+		writel(0x00, ls1x_timer_base + TIMER_CNTR);
+		writel(0x29, ls1x_timer_base + TIMER_CTRL);
+	case CLOCK_EVT_MODE_RESUME:
+		writel(0x29, ls1x_timer_base + TIMER_CTRL);
+		break;
+	case CLOCK_EVT_MODE_ONESHOT:
+	case CLOCK_EVT_MODE_SHUTDOWN:
+		writel(readl(ls1x_timer_base+TIMER_CTRL) & 0xfe, ls1x_timer_base + TIMER_CTRL);
+		break;
+	default:
+		break;
+	}
+	spin_unlock(&ls1x_lock);
+}
+
+static int ls1x_clockevent_set_next(unsigned long evt,
+	struct clock_event_device *cd)
+{
+	writel(evt, ls1x_timer_base + TIMER_HRC);
+	writel(evt, ls1x_timer_base + TIMER_LRC);
+	
+	writel(0x00, ls1x_timer_base + TIMER_CNTR);
+	writel(0x29, ls1x_timer_base + TIMER_CTRL);
+
+	return 0;
+}
+
+static struct clock_event_device ls1x_clockevent = {
+	.name = "ls1x-timer",
+	.features = CLOCK_EVT_FEAT_PERIODIC, // |  CLOCK_EVT_FEAT_ONESHOT,
+	.set_next_event = ls1x_clockevent_set_next,
+	.set_mode = ls1x_clockevent_set_mode,
+	.rating = 300,
+	.irq = LS1X_TIMER_IRQ,
+};
+
+static struct irqaction timer_irqaction = {
+	.handler	= ls1x_clockevent_irq,
+	.flags		= IRQF_DISABLED | IRQF_PERCPU | IRQF_TIMER,
+	.name		= "ls1x-timerirq",
+	.dev_id		= &ls1x_clockevent,
+};
+
+void __init ls1x_timer_init(void)
+{
+	ls1x_timer_base = ioremap(LS1X_TIMER_BASE, 0xf);
+	if (!ls1x_timer_base)
+		panic("Failed to ioremap timer registers");
+}
+
+void __init setup_ls1x_timer(void)
+{
+	int ret;
+	uint32_t clk_rate;
+
+	ls1x_timer_init();
+
+	clk_rate = ls1x_bus_clock / 2;
+	ls1x_jiffies_per_tick = DIV_ROUND_CLOSEST(clk_rate, HZ);
+
+	clockevent_set_clock(&ls1x_clockevent, clk_rate);
+	ls1x_clockevent.min_delta_ns = clockevent_delta2ns(0x000300, &ls1x_clockevent);
+	ls1x_clockevent.max_delta_ns = clockevent_delta2ns(0xffffff, &ls1x_clockevent);
+	ls1x_clockevent.cpumask = cpumask_of(0);
+
+	clockevents_register_device(&ls1x_clockevent);
+
+	ls1x_clocksource.rating = 200 + clk_rate / 10000000;
+	ret = clocksource_register_hz(&ls1x_clocksource, clk_rate);
+
+	if (ret)
+		printk(KERN_ERR "Failed to register clocksource: %d\n", ret);
+
+	setup_irq(LS1X_TIMER_IRQ, &timer_irqaction);
+
+	writel(0x00, ls1x_timer_base + TIMER_CTRL);
+	writel(0x00, ls1x_timer_base + TIMER_CNTR);
+
+	writel(ls1x_jiffies_per_tick, ls1x_timer_base + TIMER_HRC);
+	writel(ls1x_jiffies_per_tick, ls1x_timer_base + TIMER_LRC);
+
+	writel(0x00, ls1x_timer_base + TIMER_CNTR);
+	writel(0x29, ls1x_timer_base + TIMER_CTRL);
+}
diff -uNra linux-3.0.82/arch/mips/loongson/ls1x/video_modes.c linux-3.0.82x/arch/mips/loongson/ls1x/video_modes.c
--- linux-3.0.82/arch/mips/loongson/ls1x/video_modes.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/ls1x/video_modes.c	2017-09-23 03:42:49.402676946 +0800
@@ -0,0 +1,261 @@
+/*
+ *  Copyright (c) 2012 Tang, Haifeng <tanghaifeng-gz@loongson.cn>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ */
+
+/* è‡ªå®šä¹‰fb_videomode */
+static struct fb_videomode video_modes[] = {
+	{	// HX8238-DæŽ§åˆ¶å™¨
+		.name	= "HX8238-D",
+		.pixclock	= 139784,
+		.refresh	= 80,
+		.xres		= 320,
+		.yres		= 240,
+		.hsync_len	= 32,		// 364-332
+		.left_margin	= 68,	// 432-364
+		.right_margin	= 12,	// 332-320
+		.vsync_len	= 6,		// 254-248
+		.upper_margin	= 22,	// 276-254
+		.lower_margin	= 8,	// 248-240
+		.sync		= FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
+	},
+/*	{	// HX8238-D å›½æ˜¾3.5å¯¸å±�
+		.name	= "HX8238-D",
+		.pixclock	= 153979,
+		.refresh	= 60,
+		.xres		= 320,
+		.yres		= 240,
+		.hsync_len	= 2,		// 342-340
+		.left_margin	= 68,	// 410-342
+		.right_margin	= 20,	// 340-320
+		.vsync_len	= 2,		// 264-244
+		.upper_margin	= 18,	// 276-246
+		.lower_margin	= 4,	// 244-240
+		.sync		= FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
+	},*/
+	{	// ILI9341æŽ§åˆ¶å™¨
+		.name	= "ILI9341",
+		.pixclock	= 155555,
+		.refresh	= 70,
+		.xres		= 240,
+		.yres		= 320,
+		.hsync_len	= 10,
+		.left_margin	= 20,
+		.right_margin	= 10,
+		.vsync_len	= 2,
+		.upper_margin	= 2,
+		.lower_margin	= 4,
+//		.sync		= FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
+	},
+/*	{	// NT39016DæŽ§åˆ¶å™¨
+		.name	= "NT39016D",
+		.pixclock	= 155328,
+		.refresh	= 60,
+		.xres		= 320,
+		.yres		= 240,
+		.hsync_len	= 1,		// 337-336
+		.left_margin	= 71,	// 408-337
+		.right_margin	= 16,	// 336-320
+		.vsync_len	= 1,		// 251-250
+		.upper_margin	= 12,	// 263-251
+		.lower_margin	= 10,	// 250-240
+		.sync		= FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
+	},*/
+	{	//AT043TN24
+		.name	= "AT043TN24",
+		.pixclock	= 82000,
+		.refresh	= 60,
+		.xres		= 480,
+		.yres		= 272,
+		.hsync_len	= 1,
+		.left_margin	= 43,
+		.right_margin	= 1,
+		.vsync_len	= 1,
+		.upper_margin	= 14,
+		.lower_margin	= 1,
+		.sync		= FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
+	},
+	{	// jbt6k74æŽ§åˆ¶å™¨
+		.name	= "jbt6k74",
+		.pixclock	= 22000,
+		.refresh	= 60,
+		.xres		= 480,
+		.yres		= 640,
+		.hsync_len	= 8,		// 496-488
+		.left_margin	= 24,	// 520-496
+		.right_margin	= 8,	// 488-480
+		.vsync_len	= 2,		// 644-642
+		.upper_margin	= 4,	// 648-644
+		.lower_margin	= 2,	// 642-240
+		.sync		= FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
+	},
+	{	//AT056TN52
+		.name	= "AT056TN52",
+		.pixclock	= 32552,
+		.refresh	= 60,
+		.xres		= 640,
+		.yres		= 480,
+		.hsync_len	= 10,		// thwh
+		.left_margin	= 134,	// thbp
+		.right_margin	= 16,	// thfp
+		.vsync_len	= 2,		//
+		.upper_margin	= 11,	//
+		.lower_margin	= 32,	//
+		.sync		= FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
+	},
+	{	//AT070TN93
+		.name	= "AT070TN93",
+		.pixclock	= 32552,
+		.refresh	= 60,
+		.xres		= 800,
+		.yres		= 480,
+		.hsync_len	= 80,		// 912-832
+		.left_margin	= 112,	// 1024-912
+		.right_margin	= 32,	// 832-800
+		.vsync_len	= 3,		// 484-481
+		.upper_margin	= 16,	// 500-484
+		.lower_margin	= 1,	// 481-480
+		.sync		= FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
+	},
+	{	//VESA 800x600@75Hz
+		.name	= "VESA",
+		.pixclock	= 20202,
+		.refresh	= 75,
+		.xres		= 800,
+		.yres		= 600,
+		.hsync_len	= 80,		// 896-816
+		.left_margin	= 160,	// 1056-896
+		.right_margin	= 16,	// 816-800
+		.vsync_len	= 3,		// 484-481
+		.upper_margin	= 21,	// 500-484
+		.lower_margin	= 1,	// 481-480
+		.sync		= FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
+	},
+	{	//VESA 1024x768@60Hz
+		.name	= "VESA",
+		.pixclock	= 15384,
+		.refresh	= 60,
+		.xres		= 1024,
+		.yres		= 768,
+		.hsync_len	= 136,
+		.left_margin	= 160,
+		.right_margin	= 24,
+		.vsync_len	= 6,
+		.upper_margin	= 29,
+		.lower_margin	= 3,
+		.sync		= FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
+	},
+	{	//VESA 1280x1024@75Hz
+		.name	= "VESA",
+		.pixclock	= 7400,
+		.refresh	= 75,
+		.xres		= 1280,
+		.yres		= 1024,
+		.hsync_len	= 144,
+		.left_margin	= 248,
+		.right_margin	= 16,
+		.vsync_len	= 3,
+		.upper_margin	= 38,
+		.lower_margin	= 1,
+		.sync		= FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
+	},
+	{	//VESA 1440x900@75Hz
+		.name	= "VESA",
+		.pixclock	= 7312,
+		.refresh	= 75,
+		.xres		= 1440,
+		.yres		= 900,
+		.hsync_len	= 152,
+		.left_margin	= 248,
+		.right_margin	= 96,
+		.vsync_len	= 6,
+		.upper_margin	= 33,
+		.lower_margin	= 3,
+		.sync		= FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
+	},
+	{	// 1920x1080@60Hz
+		.name	= "unknow",
+		.pixclock	= 6734,
+		.refresh	= 60,
+		.xres		= 1920,
+		.yres		= 1080,
+		.hsync_len	= 44,
+		.left_margin	= 148,
+		.right_margin	= 88,
+		.vsync_len	= 5,
+		.upper_margin	= 36,
+		.lower_margin	= 4,
+		.sync		= FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
+	},
+};
+
+#ifdef CONFIG_LS1B_MACH
+struct ls1b_vga ls1b_vga_modes[] = {
+	{
+		.xres = 800,
+		.yres = 600,
+		.refresh = 75,
+	#if AHB_CLK == 25000000
+		.ls1b_pll_freq = 0x21813,
+		.ls1b_pll_div = 0x8a28ea00,
+	#else	//AHB_CLK == 33000000
+		.ls1b_pll_freq = 0x0080c,
+		.ls1b_pll_div = 0x8a28ea00,
+	#endif
+	},
+	{
+		.xres = 1024,
+		.yres = 768,
+		.refresh = 60,
+	#if AHB_CLK == 25000000
+		.ls1b_pll_freq = 0x2181d,
+		.ls1b_pll_div = 0x8a28ea00,
+	#else	//AHB_CLK == 33000000
+		.ls1b_pll_freq = 0x21813,
+		.ls1b_pll_div = 0x8a28ea00,
+	#endif
+	},
+	{
+		.xres = 1280,
+		.yres = 1024,
+		.refresh = 75,
+	#if AHB_CLK == 25000000
+		.ls1b_pll_freq = 0x3af1e,
+		.ls1b_pll_div = 0x8628ea00,
+	#else	//AHB_CLK == 33000000
+		.ls1b_pll_freq = 0x3af14,
+		.ls1b_pll_div = 0x8628ea00,
+	#endif
+	},
+	{
+		.xres = 1440,
+		.yres = 900,
+		.refresh = 75,
+	#if AHB_CLK == 25000000
+		.ls1b_pll_freq = 0x3af1f,
+		.ls1b_pll_div = 0x8628ea00,
+	#else	//AHB_CLK == 33000000
+		.ls1b_pll_freq = 0x3af14,
+		.ls1b_pll_div = 0x8628ea00,
+	#endif
+	},
+	{
+		.xres = 1920,
+		.yres = 1080,
+		.refresh = 60,
+	#if APB_CLK == 25000000
+		.ls1b_pll_freq = 0x3af23,
+		.ls1b_pll_div = 0x86392a00,
+	#else	//APB_CLK == 33000000
+		.ls1b_pll_freq = 0x3af17,
+		.ls1b_pll_div = 0x86392a00,
+	#endif
+	},
+	{},
+};
+EXPORT_SYMBOL(ls1b_vga_modes);
+#endif
diff -uNra linux-3.0.82/arch/mips/loongson/Makefile linux-3.0.82x/arch/mips/loongson/Makefile
--- linux-3.0.82/arch/mips/loongson/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/Makefile	2017-09-23 03:42:49.402676946 +0800
@@ -2,7 +2,7 @@
 # Common code for all Loongson based systems
 #
 
-obj-$(CONFIG_MACH_LOONGSON) += common/
+#obj-$(CONFIG_MACH_LOONGSON) += common/		//lxy
 
 #
 # Lemote Fuloong mini-PC (Loongson 2E-based)
@@ -15,3 +15,6 @@
 #
 
 obj-$(CONFIG_LEMOTE_MACH2F)  += lemote-2f/
+
+#obj-$(CONFIG_LS1B_MACH)  += ls1b/
+obj-$(CONFIG_CPU_LS232)  += ls1x/
diff -uNra linux-3.0.82/arch/mips/loongson/Platform linux-3.0.82x/arch/mips/loongson/Platform
--- linux-3.0.82/arch/mips/loongson/Platform	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/loongson/Platform	2017-09-23 03:42:49.402676946 +0800
@@ -8,15 +8,20 @@
 	$(call cc-option,-march=loongson2e,-march=r4600)
 cflags-$(CONFIG_CPU_LOONGSON2F) += \
 	$(call cc-option,-march=loongson2f,-march=r4600)
+
+cflags-$(CONFIG_CPU_LS232)  += \
+	$(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
+	-Wa,-mips32 -Wa,--trap
+
 # Enable the workarounds for Loongson2f
 ifdef CONFIG_CPU_LOONGSON2F_WORKAROUNDS
   ifeq ($(call as-option,-Wa$(comma)-mfix-loongson2f-nop,),)
-    $(error only binutils >= 2.20.2 have needed option -mfix-loongson2f-nop)
+#    $(error only binutils >= 2.20.2 have needed option -mfix-loongson2f-nop)
   else
     cflags-$(CONFIG_CPU_NOP_WORKAROUNDS) += -Wa$(comma)-mfix-loongson2f-nop
   endif
   ifeq ($(call as-option,-Wa$(comma)-mfix-loongson2f-jump,),)
-    $(error only binutils >= 2.20.2 have needed option -mfix-loongson2f-jump)
+#    $(error only binutils >= 2.20.2 have needed option -mfix-loongson2f-jump)
   else
     cflags-$(CONFIG_CPU_JUMP_WORKAROUNDS) += -Wa$(comma)-mfix-loongson2f-jump
   endif
@@ -28,5 +33,9 @@
 
 platform-$(CONFIG_MACH_LOONGSON) += loongson/
 cflags-$(CONFIG_MACH_LOONGSON) += -I$(srctree)/arch/mips/include/asm/mach-loongson -mno-branch-likely
+cflags-$(CONFIG_MACH_LOONGSON) += -I$(srctree)/arch/mips/include/asm/mach-loongson/ls1x -mno-branch-likely
 load-$(CONFIG_LEMOTE_FULOONG2E) += 0xffffffff80100000
 load-$(CONFIG_LEMOTE_MACH2F) += 0xffffffff80200000
+load-$(CONFIG_LS1A_MACH) += 0xffffffff80200000
+load-$(CONFIG_LS1B_MACH) += 0xffffffff80200000
+load-$(CONFIG_LS1C_MACH) += 0xffffffff80200000
diff -uNra linux-3.0.82/arch/mips/mm/c-r4k.c linux-3.0.82x/arch/mips/mm/c-r4k.c
--- linux-3.0.82/arch/mips/mm/c-r4k.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/mm/c-r4k.c	2017-09-23 03:42:49.402676946 +0800
@@ -1019,6 +1019,7 @@
 	case CPU_34K:
 	case CPU_74K:
 	case CPU_1004K:
+//	case CPU_LS232:
 		if ((read_c0_config7() & (1 << 16))) {
 			/* effectively physically indexed dcache,
 			   thus no virtual aliases. */
diff -uNra linux-3.0.82/arch/mips/mm/Makefile linux-3.0.82x/arch/mips/mm/Makefile
--- linux-3.0.82/arch/mips/mm/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/mm/Makefile	2017-09-23 03:42:49.402676946 +0800
@@ -11,6 +11,7 @@
 obj-$(CONFIG_HIGHMEM)		+= highmem.o
 obj-$(CONFIG_HUGETLB_PAGE)	+= hugetlbpage.o
 
+obj-$(CONFIG_CPU_LS232)		+= c-r4k.o cex-gen.o tlb-r4k.o		#lxy
 obj-$(CONFIG_CPU_LOONGSON2)	+= c-r4k.o cex-gen.o tlb-r4k.o
 obj-$(CONFIG_CPU_MIPS32)	+= c-r4k.o cex-gen.o tlb-r4k.o
 obj-$(CONFIG_CPU_MIPS64)	+= c-r4k.o cex-gen.o tlb-r4k.o
diff -uNra linux-3.0.82/arch/mips/mm/tlbex.c linux-3.0.82x/arch/mips/mm/tlbex.c
--- linux-3.0.82/arch/mips/mm/tlbex.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/mm/tlbex.c	2017-09-23 03:42:49.406676933 +0800
@@ -431,7 +431,10 @@
 	case CPU_ALCHEMY:
 		tlbw(p);
 		break;
-
+//	case CPU_LS232:
+//		uasm_i_ehb(p);
+//		tlbw(p);
+//		break;
 	case CPU_NEVADA:
 		uasm_i_nop(p); /* QED specifies 2 nops hazard */
 		/*
diff -uNra linux-3.0.82/arch/mips/oprofile/common.c linux-3.0.82x/arch/mips/oprofile/common.c
--- linux-3.0.82/arch/mips/oprofile/common.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/oprofile/common.c	2017-09-23 03:42:49.406676933 +0800
@@ -18,6 +18,7 @@
 extern struct op_mips_model op_model_mipsxx_ops __weak;
 extern struct op_mips_model op_model_rm9000_ops __weak;
 extern struct op_mips_model op_model_loongson2_ops __weak;
+extern struct op_mips_model op_model_ls232_ops __weak;
 
 static struct op_mips_model *model;
 
@@ -89,6 +90,8 @@
 	case CPU_R10000:
 	case CPU_R12000:
 	case CPU_R14000:
+	case CPU_LS232:
+	case CPU_LOONGSON1:
 		lmodel = &op_model_mipsxx_ops;
 		break;
 
diff -uNra linux-3.0.82/arch/mips/oprofile/Makefile linux-3.0.82x/arch/mips/oprofile/Makefile
--- linux-3.0.82/arch/mips/oprofile/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/oprofile/Makefile	2017-09-23 03:42:49.406676933 +0800
@@ -16,3 +16,4 @@
 oprofile-$(CONFIG_CPU_SB1)		+= op_model_mipsxx.o
 oprofile-$(CONFIG_CPU_RM9000)		+= op_model_rm9000.o
 oprofile-$(CONFIG_CPU_LOONGSON2)	+= op_model_loongson2.o
+oprofile-$(CONFIG_CPU_LS232)	+= op_model_ls232.o
diff -uNra linux-3.0.82/arch/mips/oprofile/op_model_ls232.c linux-3.0.82x/arch/mips/oprofile/op_model_ls232.c
--- linux-3.0.82/arch/mips/oprofile/op_model_ls232.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/oprofile/op_model_ls232.c	2017-09-23 03:42:49.406676933 +0800
@@ -0,0 +1,394 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ */
+#include <linux/init.h>
+#include <linux/oprofile.h>
+#include <linux/interrupt.h>
+#include <linux/smp.h>
+#include <linux/spinlock.h>
+#include <linux/proc_fs.h>
+#include <asm/uaccess.h>
+
+#include "op_impl.h"
+
+#ifndef LS232_PERFCONTER
+#define LS232_PERFCONTER
+#endif
+
+#ifndef Z_DEBUG
+#define Z_DEBUG
+#endif
+
+#define PERF_DEBUG_Z 
+//prom_printf("ls232 %s : %d\n",__FUNCTION__,__LINE__);
+
+#define LS232_COUNTER1_EVENT(event)	((event&0x1f) << 5)
+#define LS232_COUNTER1_SUPERVISOR	(1UL    <<  2)
+#define LS232_COUNTER1_KERNEL		(1UL    <<  1)
+#define LS232_COUNTER1_USER		(1UL    <<  3)
+#define LS232_COUNTER1_ENABLE		(1UL    << 4)
+#define LS232_COUNTER1_OVERFLOW		(1ULL    << 31)
+#define LS232_COUNTER1_EXL		(1UL	<< 0)
+
+#define LS232_COUNTER2_EVENT(event)	((event&0x1f) << 5)
+#define LS232_COUNTER2_SUPERVISOR	LS232_COUNTER1_SUPERVISOR
+#define LS232_COUNTER2_KERNEL		LS232_COUNTER1_KERNEL
+#define LS232_COUNTER2_USER		LS232_COUNTER1_USER
+#define LS232_COUNTER2_ENABLE		LS232_COUNTER1_ENABLE
+#define LS232_COUNTER2_OVERFLOW		(1ULL   << 31)
+#define LS232_COUNTER2_EXL		(1UL	<< 0 )
+#define LS232_COUNTER_EXL		(1UL << 0)	
+
+extern unsigned int ls232_perfcount_irq;
+
+static struct ls232_register_config {
+	unsigned int control0;
+	unsigned int control1;
+	unsigned long reset_counter1;
+	unsigned long reset_counter2;
+	int ctr1_enable, ctr2_enable;
+} reg;
+unsigned long ctr3_enable, ctr3_count;
+
+uint64_t PC0_HI=0;
+uint64_t PC1_HI=0;
+
+spinlock_t sample_lock;
+
+static char *oprofid = "GodsonPerf";
+irqreturn_t ls232_perfcount_handler(int irq, void * dev_id);
+//	struct pt_regs *regs);
+/* Compute all of the registers in preparation for enabling profiling.  */
+
+static int myoprofileclock=0;
+
+#ifdef Z_DEBUG
+struct op_counter_config ctr[3];
+#endif
+static void ctr_init(void)
+{
+#ifdef Z_DEBUG
+ctr[0].enabled=1;
+ctr[1].enabled=1;
+ctr[0].user=1;
+ctr[1].user=1;
+ctr[0].kernel=1;
+ctr[1].kernel=1;
+#endif
+
+}
+
+//#ifdef Z_DEBUG
+//static void ls232_reg_setup(void)
+//#else
+static void ls232_reg_setup(struct op_counter_config *ctr)
+//#endif
+{
+	unsigned int control0 = 0;
+	unsigned int control1 = 0;
+PERF_DEBUG_Z
+	reg.reset_counter1 = 0;
+	reg.reset_counter2 = 0;
+//ctr_init();
+
+#ifndef Z_DEBUG
+ctr[0].enabled=1;
+ctr[1].enabled=1;
+ctr[0].user=1;
+ctr[1].user=1;
+ctr[0].kernel=0;
+ctr[1].kernel=0;
+#endif
+
+	/* Compute the performance counter control word.  */
+	/* For now count kernel and user mode */
+	if (ctr[0].enabled){
+PERF_DEBUG_Z
+		control0 |= LS232_COUNTER1_EVENT(ctr[0].event) |
+					LS232_COUNTER1_ENABLE;
+		if(ctr[0].kernel)
+			control0 |= LS232_COUNTER1_KERNEL;
+		if(ctr[0].user)
+			control0 |= LS232_COUNTER1_USER;
+		control0 |= LS232_COUNTER_EXL;
+		reg.reset_counter1 = 0x80000000UL - ctr[0].count;
+		myoprofileclock=ctr[0].count-10000;
+	}
+
+	if (ctr[1].enabled){
+PERF_DEBUG_Z
+		control1 |= LS232_COUNTER2_EVENT(ctr[1].event) |
+		           LS232_COUNTER2_ENABLE;
+		if(ctr[1].kernel)
+			control1 |= LS232_COUNTER2_KERNEL;
+		if(ctr[1].user)
+			control1 |= LS232_COUNTER2_USER;
+		control1 |= LS232_COUNTER_EXL;
+		reg.reset_counter2 = (0x80000000UL- ctr[1].count) ;
+	}
+
+//	if(ctr[0].enabled ||ctr[1].enabled)
+//		control |= LS232_COUNTER_EXL;
+
+	if(ctr[2].enabled){
+PERF_DEBUG_Z
+		ctr3_enable = 1;
+		ctr3_count = ctr[2].count;
+	}
+
+	reg.control0 = control0;
+	reg.control1 = control1;
+
+	reg.ctr1_enable = ctr[0].enabled;
+	reg.ctr2_enable = ctr[1].enabled;
+
+}
+
+/* Program all of the registers in preparation for enabling profiling.  */
+
+//#ifdef Z_DEBUG
+//static void ls232_cpu_setup (void)
+//#else
+static void ls232_cpu_setup (void *args)
+//#endif
+{
+	//uint64_t perfcount;
+	uint32_t perfcount0;
+	uint32_t perfcount1;
+
+PERF_DEBUG_Z
+#if 1
+	//perfcount = (reg.reset_counter2 << 32) |reg.reset_counter1; 
+	perfcount0 = reg.reset_counter1; 
+	perfcount1 = reg.reset_counter2; 
+#ifdef LS232_PERFCONTER
+	write_c0_perfcntr0(perfcount0);
+	write_c0_perfcntr1(perfcount1);
+#else
+	write_c0_perflo(reg.control);
+	write_c0_perfhi(perfcount);
+#endif
+#endif
+}
+
+static int myoprofilestart=0;
+
+#if 0
+int myoprofile_setup()
+{
+PERF_DEBUG_Z
+return myoprofileclock;
+}
+#endif
+
+int myoprofile(int irq, void *dev_id, struct pt_regs *regs)
+{
+PERF_DEBUG_Z
+if(myoprofilestart)
+			oprofile_add_sample(regs, 0);
+return 0;
+}
+
+static void ls232_cpu_start(void *args)
+{
+#if 1
+PERF_DEBUG_Z
+#ifdef Z_DEBUG
+reg.ctr1_enable=1;
+reg.ctr2_enable=1;
+#endif
+	/* Start all counters on current CPU */
+	if(reg.ctr1_enable || reg.ctr2_enable)
+		request_irq(62, ls232_perfcount_handler,
+	                   IRQF_DISABLED, "Perfcounter", oprofid);
+	 write_c0_perfctrl0(reg.control0);
+	 write_c0_perfctrl1(reg.control1);
+#else
+myoprofilestart=1;
+#endif
+}
+
+static void ls232_cpu_stop(void *args)
+{
+#if 1
+	/* Stop all counters on current CPU */
+PERF_DEBUG_Z
+#ifdef LS232_PERFCONTER
+	PC0_HI=0;
+     	PC1_HI=0;
+        write_c0_perfctrl0(0);
+	write_c0_perfctrl1(0);
+        write_c0_perfcntr0(0);
+	write_c0_perfcntr1(0);
+#else
+	write_c0_perflo(0);
+#endif
+	ctr3_enable = 0;
+	if(reg.ctr1_enable || reg.ctr2_enable)
+		free_irq(62, oprofid);
+	memset(&reg, 0, sizeof(reg));
+#else
+myoprofilestart=0;
+#endif
+}
+
+//uint64_t perfcounter;
+unsigned long perfcounter;
+irqreturn_t ls232_perfcount_handler(int irq, void * dev_id)
+//	struct pt_regs *regs)
+{
+	 uint64_t counter1, counter2;
+	 int enabled;
+	 unsigned long flags;
+ 	 struct pt_regs *regs = get_irq_regs();
+
+	/*
+	 * LS2322 defines two 32-bit performance counters.
+	 * To avoid a race updating the registers we need to stop the counters 
+	 * while we're messing with
+	 * them ...
+	 */
+	
+	/* Check whether the irq belongs to me*/
+	enabled = reg.ctr1_enable| reg.ctr2_enable;
+	if(!enabled){
+		return IRQ_HANDLED; //Ack the counter
+	}
+
+#ifdef LS232_PERFCONTER
+	counter1 = read_c0_perfcntr0();
+	counter2 = read_c0_perfcntr1();
+#else
+	counter = read_c0_perfhi();
+	counter1 = counter & 0xffffffff;
+	counter2 = counter >> 32;
+#endif
+
+	spin_lock_irqsave(&sample_lock, flags);
+
+	if (counter1 & LS232_COUNTER1_OVERFLOW) {
+		if(reg.ctr1_enable)
+			PC0_HI++;
+			oprofile_add_sample(regs, 0);
+		counter1 = reg.reset_counter1;
+	}
+	if (counter2 & LS232_COUNTER2_OVERFLOW) {
+		if(reg.ctr2_enable)
+			PC1_HI++;
+			oprofile_add_sample(regs, 1);
+		counter2 = reg.reset_counter2;
+	}
+
+	spin_unlock_irqrestore(&sample_lock, flags);
+
+#ifdef LS232_PERFCONTER
+	write_c0_perfctrl0(counter1);
+	write_c0_perfctrl1(counter2);
+#else
+	write_c0_perfhi((counter2 << 32) | counter1);
+#endif
+
+	return IRQ_HANDLED;
+}
+
+int perfcounter_proc_read(char *page, char **start, off_t off,
+			int count, int *eof, void *data)
+{
+    int len = 0;
+    unsigned long counter0, counter1;
+    unsigned int control0,control1;
+
+PERF_DEBUG_Z
+    local_irq_disable();
+
+#ifdef LS232_PERFCONTER
+    counter0 = read_c0_perfcntr0();
+    counter1 = read_c0_perfcntr1();
+    control0 = read_c0_perfctrl0();
+    control1 = read_c0_perfctrl1();
+
+
+#else
+    counter0 = read_c0_perflo();
+    counter1 = read_c0_perfhi();
+#endif
+
+    len += sprintf(page, "cl0:%x\n", control0);
+    len += sprintf(page+len, "cr0:%lx\n", counter0);
+    len += sprintf(page+len, "cl1:%x\n", control1);
+    len += sprintf(page+len, "cr1:%lx\n", counter1);
+
+    len += sprintf(page+len, "counter0_all: %016llx\n", PC0_HI<<32 | counter0);
+    len += sprintf(page+len, "counter1_all: %016llx\n", PC1_HI<<32 | counter1);
+
+    *eof = 1;
+    len = len - off;
+    if(len < 0)
+        len = 0;
+    *start += len;
+
+    local_irq_enable();
+
+    return len;
+
+	}
+
+int perfcounter_proc_write(struct file *file, const char __user *buffer,
+			   unsigned long count, void *data)
+{
+	char buf[20];
+	unsigned long value;
+	//unsigned long long value;
+	
+	//copy_from_user(buf, buffer, min(20, count));
+	copy_from_user(buf, buffer, count);
+	value = simple_strtoull(buf, NULL, 0);
+
+#ifdef LS232_PERFCONTER
+	if(value&0x80000000)
+		write_c0_perfctrl1(value);
+	else
+		write_c0_perfctrl0(value);
+#else
+	write_c0_perflo(value);
+#endif
+
+	return count;
+}
+
+static int __init ls232_init(void)
+{
+	struct proc_dir_entry *ent;
+PERF_DEBUG_Z
+	ent = create_proc_entry("perfcounter", 0, NULL);
+	if(!ent) 
+		return -ENOMEM;		
+	ent->read_proc = perfcounter_proc_read;
+	ent->write_proc = perfcounter_proc_write;
+
+	spin_lock_init(&sample_lock);
+	return 0;	
+}
+
+static void ls232_exit(void)
+{
+	remove_proc_entry("perfcounter", NULL);
+}
+
+struct op_mips_model op_model_ls232_ops = {
+	.reg_setup	= ls232_reg_setup,
+	.cpu_setup	= ls232_cpu_setup,
+	.init		= ls232_init,	
+	.exit		= ls232_exit,
+	.cpu_start	= ls232_cpu_start,
+	.cpu_stop	= ls232_cpu_stop,
+#ifdef LS232_PERFCONTER
+	.cpu_type	= "mips/ls232",
+#else
+	.cpu_type	= "mips/ls2322",
+#endif
+	.num_counters	= 3
+};
diff -uNra linux-3.0.82/arch/mips/oprofile/op_model_mipsxx.c linux-3.0.82x/arch/mips/oprofile/op_model_mipsxx.c
--- linux-3.0.82/arch/mips/oprofile/op_model_mipsxx.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/oprofile/op_model_mipsxx.c	2017-09-23 03:42:49.406676933 +0800
@@ -365,6 +365,10 @@
 		op_model_mipsxx_ops.cpu_type = "mips/sb1";
 		break;
 
+	case CPU_LS232:
+		op_model_mipsxx_ops.cpu_type = "mips/ls232";
+		break;
+
 	default:
 		printk(KERN_ERR "Profiling unsupported for this CPU\n");
 
diff -uNra linux-3.0.82/arch/mips/pci/fixup-ls1a-board.c linux-3.0.82x/arch/mips/pci/fixup-ls1a-board.c
--- linux-3.0.82/arch/mips/pci/fixup-ls1a-board.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/pci/fixup-ls1a-board.c	2017-09-23 03:42:49.406676933 +0800
@@ -0,0 +1,80 @@
+/*
+ * fixup-ls232-board.c
+ *
+ * Copyright (C) 2004 ICT CAS
+ * Author: Li xiaoyu, ICT CAS
+ *   lixy@ict.ac.cn
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+//#include <linux/config.h>
+//#include <linux/autoconf.h>
+#include <generated/autoconf.h>	//lxy
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <asm/mach-loongson/ls1x/ls1b_board.h>
+#include <asm/mach-loongson/ls1x/irq.h>
+#include <asm/gpio.h>
+
+
+int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+	printk("pcibios_map_irq devfn : %d , slot : %d , pin : %d\n",PCI_SLOT(dev->devfn),slot,pin);
+//	 dev->irq=(pin-1)+LS1A_BOARD_PCI_INTA_IRQ;
+//	return dev->irq;
+//	return ((pin-1)+LS1A_BOARD_PCI_INTA_IRQ);
+//	return LS1A_BOARD_PCI_INTA_IRQ;
+	//lxy: slot = IDSEL - 11;
+	if (slot == 5) {
+		gpio_request(LS1A_BOARD_PCI_INTA_IRQ-64, "pci inta irq");
+		gpio_direction_input(LS1A_BOARD_PCI_INTA_IRQ-64);
+		return LS1A_BOARD_PCI_INTA_IRQ;
+	}
+	else {
+		gpio_request(LS1A_BOARD_PCI_INTB_IRQ-64, "pci intb irq");
+		gpio_direction_input(LS1A_BOARD_PCI_INTB_IRQ-64);
+		return LS1A_BOARD_PCI_INTB_IRQ;
+	}
+}
+
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+	return 0;
+}
+
+static void __init loongsonls1a_fixup_pcimap(struct pci_dev *pdev)
+{
+	static int first = 1;
+
+	if (first)
+		first = 0;
+	else
+		return;
+
+	/* 1,00 0110 ,0001 01,00 0000 */
+	LS1A_PCIMAP = 0x46140;
+	LOONGSON_REG(LS1A_PCI_HEADER_CFG + 0x20) = 0x40000000;
+	LOONGSON_REG(LS1A_PCI_HEADER_CFG + 0x24) = 0x0;
+}
+
+DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, loongsonls1a_fixup_pcimap);
diff -uNra linux-3.0.82/arch/mips/pci/Makefile linux-3.0.82x/arch/mips/pci/Makefile
--- linux-3.0.82/arch/mips/pci/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/pci/Makefile	2017-09-23 03:42:49.410676922 +0800
@@ -57,6 +57,7 @@
 obj-$(CONFIG_MIKROTIK_RB532)	+= pci-rc32434.o ops-rc32434.o fixup-rc32434.o
 obj-$(CONFIG_CPU_CAVIUM_OCTEON)	+= pci-octeon.o pcie-octeon.o
 obj-$(CONFIG_NLM_XLR)		+= pci-xlr.o
+obj-$(CONFIG_LS1A_MACH)		+= fixup-ls1a-board.o ops-ls1a-board.o
 
 ifdef CONFIG_PCI_MSI
 obj-$(CONFIG_CPU_CAVIUM_OCTEON)	+= msi-octeon.o
diff -uNra linux-3.0.82/arch/mips/pci/ops-ls1a-board.c linux-3.0.82x/arch/mips/pci/ops-ls1a-board.c
--- linux-3.0.82/arch/mips/pci/ops-ls1a-board.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/arch/mips/pci/ops-ls1a-board.c	2017-09-23 03:42:49.410676922 +0800
@@ -0,0 +1,148 @@
+/*
+ * ops-godson1.c
+ *
+ * Copyright (C) 2004 ICT CAS
+ * Author: Li xiaoyu, ICT CAS
+ *   lixy@ict.ac.cn
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+
+#include <asm/mach-loongson/ls1x/ls1b_board.h>
+
+#define PCI_ACCESS_READ  0
+#define PCI_ACCESS_WRITE 1
+
+
+static inline void
+bflush (void)
+{
+ 	/* flush Bonito register writes */
+  	(void) LS1A_PCIMAP_CFG;
+}
+static int ls1a_pci_config_access(unsigned char access_type,
+        struct pci_bus *bus, unsigned int devfn, int where, u32 * data)
+{
+
+    unsigned char busnum = bus->number;
+	
+	u_int32_t addr, type;
+	void *addrp;
+	int device = devfn >> 3;
+	int function = devfn & 0x7;
+	int reg = where & ~3;
+
+	if (busnum == 0) {
+	  /* Type 0 configuration on onboard PCI bus */
+		if (device > 20 || function > 7) {
+	 			*data = -1;	/* device out of range */
+				return PCIBIOS_DEVICE_NOT_FOUND;
+		}
+		addr = (1 << (device+11)) | (function << 8) | reg;
+		type = 0;
+	} else {
+	   /* Type 1 configuration on offboard PCI bus */
+	    if (busnum > 255 || device > 31 || function > 7) {
+				*data = -1;	/* device out of range */
+		        return PCIBIOS_DEVICE_NOT_FOUND;
+		}
+		addr = (busnum << 16) | (device << 11) | (function << 8) | reg;
+		type = 0x10000;
+	}
+
+	/* clear aborts */
+//	LS1A_PCICMD |= LS1A_PCICMD_MABORT | LS1A_PCICMD_MTABORT;
+
+	LS1A_PCIMAP_CFG = (addr >> 16) | type;
+	bflush ();
+
+	addrp = (void *)CKSEG1ADDR(LS1A_PCICFG_BASE | (addr & 0xffff));
+	if (access_type == PCI_ACCESS_WRITE){
+  		*(volatile unsigned int *)addrp = cpu_to_le32(*data);
+	}else {
+  		*data = le32_to_cpu(*(volatile unsigned int *)addrp);
+	}
+
+#if 0
+	if (LS1A_PCICMD & (LS1A_PCICMD_MABORT | LS1A_PCICMD_MTABORT)) {
+  	    LS1A_PCICMD |= LS1A_PCICMD_MABORT | LS1A_PCICMD_MTABORT;
+	    *data = -1;
+	    return PCIBIOS_DEVICE_NOT_FOUND;
+	}
+#endif
+
+	return PCIBIOS_SUCCESSFUL;
+
+}
+
+
+static int ls1a_pci_pcibios_read(struct pci_bus *bus, unsigned int devfn,
+                                int where, int size, u32 * val)
+{
+        u32 data = 0;
+
+        if (ls1a_pci_config_access(PCI_ACCESS_READ, bus, devfn, where,&data))
+                return PCIBIOS_DEVICE_NOT_FOUND;
+
+        if (size == 1)
+                *val = (data >> ((where & 3) << 3)) & 0xff;
+        else if (size == 2)
+                *val = (data >> ((where & 3) << 3)) & 0xffff;
+        else
+                *val = data;
+
+        return PCIBIOS_SUCCESSFUL;
+}
+
+
+static int ls1a_pci_pcibios_write(struct pci_bus *bus, unsigned int devfn,
+                              int where, int size, u32 val)
+{
+        u32 data = 0;
+
+        if (size == 4)
+                data = val;
+        else {
+                if (ls1a_pci_config_access(PCI_ACCESS_READ, bus, devfn,where, &data))
+                        return PCIBIOS_DEVICE_NOT_FOUND;
+
+                if (size == 1)
+                        data = (data & ~(0xff << ((where & 3) << 3))) |
+                                (val << ((where & 3) << 3));
+                else if (size == 2)
+                        data = (data & ~(0xffff << ((where & 3) << 3))) |
+                                (val << ((where & 3) << 3));
+        }
+
+        if (ls1a_pci_config_access(PCI_ACCESS_WRITE, bus, devfn, where,&data))
+                return PCIBIOS_DEVICE_NOT_FOUND;
+
+        return PCIBIOS_SUCCESSFUL;
+}
+
+struct pci_ops ls1a_pci_pci_ops = {
+        .read = ls1a_pci_pcibios_read,
+        .write = ls1a_pci_pcibios_write
+};
diff -uNra linux-3.0.82/block/blk-core.c linux-3.0.82x/block/blk-core.c
--- linux-3.0.82/block/blk-core.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/block/blk-core.c	2017-09-23 03:42:49.410676922 +0800
@@ -2001,7 +2001,6 @@
 {
 	int total_bytes, bio_nbytes, next_idx = 0;
 	struct bio *bio;
-
 	if (!req->bio)
 		return false;
 
diff -uNra linux-3.0.82/cmd-module.sh linux-3.0.82x/cmd-module.sh
--- linux-3.0.82/cmd-module.sh	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/cmd-module.sh	2017-09-23 03:42:49.410676922 +0800
@@ -0,0 +1,7 @@
+#!/bin/sh 
+#make ARCH=mips CROSS_COMPILE=mipsel-linux- -j2 modules
+#make ARCH=mips CROSS_COMPILE=mipsel-linux- -j2 DEBUG=-g vmlinux 
+#mipsel-linux-objdump -S vmlinux  /tftpboot/
+
+make ARCH=mips CROSS_COMPILE=mipsel-linux- M=drivers/usb/gadget/ modules
+
diff -uNra linux-3.0.82/cmd.sh linux-3.0.82x/cmd.sh
--- linux-3.0.82/cmd.sh	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/cmd.sh	2017-09-23 03:42:49.410676922 +0800
@@ -0,0 +1,9 @@
+#!/bin/sh 
+export PATH=$PATH:/opt/gcc-4.3-ls232/bin
+#make ARCH=mips CROSS_COMPILE=mipsel-linux- -j2 vmlinux 
+make ARCH=mips CROSS_COMPILE=mipsel-linux- -j2 DEBUG=-g vmlinux 
+#mipsel-linux-objdump -S vmlinux  /tftpboot/
+cp  ./vmlinux  /tftpboot/vmlinux-obj
+
+mipsel-linux-strip vmlinux  
+cp  ./vmlinux  /tftpboot/vmlinux
diff -uNra linux-3.0.82/.config linux-3.0.82x/.config
--- linux-3.0.82/.config	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/.config	2017-09-23 03:42:49.414676909 +0800
@@ -0,0 +1,1889 @@
+#
+# Automatically generated make config: don't edit
+# Linux/mips 3.0.82 Kernel Configuration
+#
+CONFIG_MIPS=y
+
+#
+# Machine selection
+#
+# CONFIG_MIPS_ALCHEMY is not set
+# CONFIG_AR7 is not set
+# CONFIG_ATH79 is not set
+# CONFIG_BCM47XX is not set
+# CONFIG_BCM63XX is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_MACH_JZ4740 is not set
+# CONFIG_LANTIQ is not set
+# CONFIG_LASAT is not set
+CONFIG_MACH_LOONGSON=y
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SIM is not set
+# CONFIG_NEC_MARKEINS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_NXP_STB220 is not set
+# CONFIG_NXP_STB225 is not set
+# CONFIG_PNX8550_JBS is not set
+# CONFIG_PNX8550_STB810 is not set
+# CONFIG_PMC_MSP is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_POWERTV is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP28 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_CRHINE is not set
+# CONFIG_SIBYTE_CARMEL is not set
+# CONFIG_SIBYTE_CRHONE is not set
+# CONFIG_SIBYTE_RHONE is not set
+# CONFIG_SIBYTE_SWARM is not set
+# CONFIG_SIBYTE_LITTLESUR is not set
+# CONFIG_SIBYTE_SENTOSA is not set
+# CONFIG_SIBYTE_BIGSUR is not set
+# CONFIG_SNI_RM is not set
+# CONFIG_MACH_TX39XX is not set
+# CONFIG_MACH_TX49XX is not set
+# CONFIG_MIKROTIK_RB532 is not set
+# CONFIG_WR_PPMC is not set
+# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
+# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
+# CONFIG_NLM_XLR_BOARD is not set
+# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
+# CONFIG_HAVE_PWM is not set
+# CONFIG_LS1A_MACH is not set
+# CONFIG_LS1B_MACH is not set
+CONFIG_LS1C_MACH=y
+# CONFIG_LEMOTE_FULOONG2E is not set
+# CONFIG_LEMOTE_MACH2F is not set
+CONFIG_LOONGSON_UART_BASE=y
+# CONFIG_LOONGSON_MC146818 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+CONFIG_CEVT_R4K_LIB=y
+CONFIG_CEVT_R4K=y
+CONFIG_CSRC_R4K_LIB=y
+CONFIG_CSRC_R4K=y
+# CONFIG_ARCH_DMA_ADDR_T_64BIT is not set
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+# CONFIG_MIPS_MACHINE is not set
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_GPIO=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_BOOT_ELF32=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+
+#
+# CPU selection
+#
+CONFIG_CPU_LOONGSON1C=y
+CONFIG_SYS_SUPPORTS_ZBOOT=y
+CONFIG_CPU_LS232=y
+CONFIG_SYS_HAS_CPU_LOONGSON1C=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_CPUFREQ=y
+
+#
+# Kernel type
+#
+CONFIG_32BIT=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_FORCE_MAX_ZONEORDER=12
+CONFIG_MIPS_MT_DISABLED=y
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_CPU_HAS_WB=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_HIGHMEM is not set
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_SYS_SUPPORTS_HIGHMEM=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_COMPACTION is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
+CONFIG_NEED_PER_CPU_KM=y
+# CONFIG_CLEANCACHE is not set
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_256 is not set
+# CONFIG_HZ_1000 is not set
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=250
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+# CONFIG_PREEMPT is not set
+# CONFIG_KEXEC is not set
+# CONFIG_SECCOMP is not set
+# CONFIG_USE_OF is not set
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_HAVE_IRQ_WORK=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_CROSS_COMPILE=""
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_DEFAULT_HOSTNAME="loongson"
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_FHANDLE is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+CONFIG_HAVE_GENERIC_HARDIRQS=y
+
+#
+# IRQ subsystem
+#
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_IRQ_SHOW=y
+
+#
+# RCU Subsystem
+#
+CONFIG_TINY_RCU=y
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_CGROUPS is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_SCHED_AUTOGROUP is not set
+# CONFIG_SYSFS_DEPRECATED is not set
+# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE="./ramdisk.cpio"
+CONFIG_INITRAMFS_ROOT_UID=0
+CONFIG_INITRAMFS_ROOT_GID=0
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+# CONFIG_RD_XZ is not set
+# CONFIG_RD_LZO is not set
+CONFIG_INITRAMFS_COMPRESSION_NONE=y
+# CONFIG_INITRAMFS_COMPRESSION_GZIP is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EXPERT=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+# CONFIG_ELF_CORE is not set
+# CONFIG_PCSPKR_PLATFORM is not set
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_EMBEDDED=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
+
+#
+# Kernel Performance Events And Counters
+#
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
+# CONFIG_VM_EVENT_COUNTERS is not set
+CONFIG_SLUB_DEBUG=y
+# CONFIG_COMPAT_BRK is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_JUMP_LABEL=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+
+#
+# GCOV-based kernel profiling
+#
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+CONFIG_BLK_DEV_BSG=y
+CONFIG_BLK_DEV_INTEGRITY=y
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+CONFIG_INLINE_SPIN_UNLOCK=y
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+CONFIG_INLINE_READ_UNLOCK=y
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+CONFIG_INLINE_READ_UNLOCK_IRQ=y
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+CONFIG_INLINE_WRITE_UNLOCK=y
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_FREEZER is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_MMU=y
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_HAVE_AOUT is not set
+CONFIG_BINFMT_MISC=y
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Power management options
+#
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_SUSPEND is not set
+# CONFIG_PM_RUNTIME is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE_DEMUX is not set
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_LRO=y
+# CONFIG_INET_DIAG is not set
+CONFIG_TCP_CONG_ADVANCED=y
+CONFIG_TCP_CONG_BIC=y
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_TCP_CONG_WESTWOOD=y
+CONFIG_TCP_CONG_HTCP=y
+# CONFIG_TCP_CONG_HSTCP is not set
+# CONFIG_TCP_CONG_HYBLA is not set
+# CONFIG_TCP_CONG_VEGAS is not set
+# CONFIG_TCP_CONG_SCALABLE is not set
+# CONFIG_TCP_CONG_LP is not set
+# CONFIG_TCP_CONG_VENO is not set
+# CONFIG_TCP_CONG_YEAH is not set
+# CONFIG_TCP_CONG_ILLINOIS is not set
+# CONFIG_DEFAULT_BIC is not set
+CONFIG_DEFAULT_CUBIC=y
+# CONFIG_DEFAULT_HTCP is not set
+# CONFIG_DEFAULT_WESTWOOD is not set
+# CONFIG_DEFAULT_RENO is not set
+CONFIG_DEFAULT_TCP_CONG="cubic"
+CONFIG_TCP_MD5SIG=y
+# CONFIG_IPV6 is not set
+CONFIG_NETWORK_SECMARK=y
+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_L2TP is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+CONFIG_DCB=y
+# CONFIG_BATMAN_ADV is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+CONFIG_CAN=y
+CONFIG_CAN_RAW=y
+# CONFIG_CAN_BCM is not set
+
+#
+# CAN Device Drivers
+#
+# CONFIG_CAN_VCAN is not set
+# CONFIG_CAN_SLCAN is not set
+CONFIG_CAN_DEV=y
+CONFIG_CAN_CALC_BITTIMING=y
+# CONFIG_CAN_MCP251X is not set
+# CONFIG_CAN_SJA1000 is not set
+# CONFIG_CAN_C_CAN is not set
+
+#
+# CAN USB interfaces
+#
+# CONFIG_CAN_EMS_USB is not set
+# CONFIG_CAN_ESD_USB2 is not set
+# CONFIG_CAN_SOFTING is not set
+# CONFIG_CAN_DEBUG_DEVICES is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+# CONFIG_CAIF is not set
+# CONFIG_CEPH_LIB is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/mdev"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_SM_FTL is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SST25L is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND_ECC=y
+# CONFIG_MTD_NAND_ECC_SMC is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_BCH is not set
+# CONFIG_MTD_SM_COMMON is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+CONFIG_MTD_NAND_LS1X=y
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_BLK_DEV_RBD is not set
+# CONFIG_SENSORS_LIS3LV02D is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI_MOD=y
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_TARGET_CORE is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_MII=y
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+CONFIG_REALTEK_PHY=y
+# CONFIG_NATIONAL_PHY is not set
+CONFIG_STE10XP=y
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_MICREL_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_LOONGSON_GMAC=y
+# CONFIG_AX88796 is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
+CONFIG_NETDEV_1000=y
+CONFIG_LS1X_GMAC0=y
+# CONFIG_LS1X_GMAC0_100M is not set
+# CONFIG_LS1X_GMAC0_1000M is not set
+CONFIG_LS1X_GMAC0_RMII=y
+# CONFIG_STMMAC_ETH is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_WLAN is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_USB_IPHETH is not set
+# CONFIG_WAN is not set
+
+#
+# CAIF transport drivers
+#
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+CONFIG_INPUT_POLLDEV=y
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_N_GSM is not set
+# CONFIG_TRACE_SINK is not set
+# CONFIG_DEVKMEM is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=6
+CONFIG_SERIAL_8250_RUNTIME_UARTS=6
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+# CONFIG_SERIAL_MAX3107 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+# CONFIG_SERIAL_IFX6X60 is not set
+# CONFIG_SERIAL_XILINX_PS_UART is not set
+# CONFIG_TTY_PRINTK is not set
+# CONFIG_LS1B_BUZZER is not set
+# CONFIG_LS1B_PWM_DRIVER is not set
+# CONFIG_LS1B_BBDIO is not set
+# CONFIG_LS1B_IR is not set
+# CONFIG_LS1B_STEPMOTOR is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_RAMOOPS is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+# CONFIG_I2C_CHARDEV is not set
+# CONFIG_I2C_MUX is not set
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_LS1X=y
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_PXA_PCI is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_DIOLAN_U2C is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_LS1B_SPI=y
+CONFIG_LS1B_SPI0=y
+# CONFIG_LS1B_SPI1 is not set
+# CONFIG_SPI_ALTERA is not set
+CONFIG_SPI_BITBANG=y
+# CONFIG_SPI_GPIO is not set
+# CONFIG_SPI_OC_TINY is not set
+# CONFIG_SPI_PXA2XX_PCI is not set
+# CONFIG_SPI_XILINX is not set
+# CONFIG_SPI_DESIGNWARE is not set
+
+#
+# SPI Protocol Masters
+#
+CONFIG_SPI_SPIDEV=y
+# CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+
+#
+# PPS generators support
+#
+
+#
+# PTP clock support
+#
+
+#
+# Enable Device Drivers -> PPS to see the PTP clock options.
+#
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO drivers:
+#
+# CONFIG_GPIO_BASIC_MMIO is not set
+# CONFIG_GPIO_IT8761E is not set
+CONFIG_GPIO_LS1C=y
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX7300 is not set
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_SX150X is not set
+# CONFIG_GPIO_ADP5588 is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+# CONFIG_GPIO_74X164 is not set
+# CONFIG_GPIO_74X165 is not set
+
+#
+# AC97 GPIO expanders:
+#
+
+#
+# MODULbus GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+CONFIG_BCMA_POSSIBLE=y
+
+#
+# Broadcom specific AMBA
+#
+# CONFIG_BCMA is not set
+# CONFIG_MFD_SUPPORT is not set
+# CONFIG_REGULATOR is not set
+CONFIG_MEDIA_SUPPORT=y
+
+#
+# Multimedia core support
+#
+CONFIG_MEDIA_CONTROLLER=y
+CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_COMMON=y
+# CONFIG_VIDEO_V4L2_SUBDEV_API is not set
+# CONFIG_DVB_CORE is not set
+CONFIG_VIDEO_MEDIA=y
+
+#
+# Multimedia drivers
+#
+CONFIG_RC_CORE=y
+CONFIG_LIRC=y
+CONFIG_RC_MAP=y
+CONFIG_IR_NEC_DECODER=y
+CONFIG_IR_RC5_DECODER=y
+CONFIG_IR_RC6_DECODER=y
+CONFIG_IR_JVC_DECODER=y
+CONFIG_IR_SONY_DECODER=y
+CONFIG_IR_RC5_SZ_DECODER=y
+CONFIG_IR_LIRC_CODEC=y
+# CONFIG_IR_IMON is not set
+# CONFIG_IR_MCEUSB is not set
+# CONFIG_IR_REDRAT3 is not set
+# CONFIG_IR_STREAMZAP is not set
+# CONFIG_RC_LOOPBACK is not set
+# CONFIG_MEDIA_ATTACH is not set
+CONFIG_MEDIA_TUNER=y
+CONFIG_MEDIA_TUNER_CUSTOMISE=y
+
+#
+# Customize TV tuners
+#
+CONFIG_MEDIA_TUNER_SIMPLE=m
+CONFIG_MEDIA_TUNER_TDA8290=m
+CONFIG_MEDIA_TUNER_TDA827X=m
+CONFIG_MEDIA_TUNER_TDA18271=m
+CONFIG_MEDIA_TUNER_TDA9887=m
+CONFIG_MEDIA_TUNER_TEA5761=m
+CONFIG_MEDIA_TUNER_TEA5767=m
+CONFIG_MEDIA_TUNER_MT20XX=m
+CONFIG_MEDIA_TUNER_MT2060=m
+CONFIG_MEDIA_TUNER_MT2266=m
+CONFIG_MEDIA_TUNER_MT2131=m
+CONFIG_MEDIA_TUNER_QT1010=m
+CONFIG_MEDIA_TUNER_XC2028=m
+CONFIG_MEDIA_TUNER_XC5000=m
+CONFIG_MEDIA_TUNER_MXL5005S=m
+CONFIG_MEDIA_TUNER_MXL5007T=m
+CONFIG_MEDIA_TUNER_MC44S803=m
+CONFIG_MEDIA_TUNER_MAX2165=m
+CONFIG_MEDIA_TUNER_TDA18218=m
+CONFIG_MEDIA_TUNER_TDA18212=m
+CONFIG_VIDEO_V4L2=y
+CONFIG_VIDEOBUF_GEN=y
+CONFIG_VIDEOBUF_DMA_CONTIG=y
+CONFIG_VIDEOBUF2_CORE=y
+CONFIG_VIDEO_CAPTURE_DRIVERS=y
+# CONFIG_VIDEO_ADV_DEBUG is not set
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set
+CONFIG_VIDEO_IR_I2C=y
+
+#
+# Encoders, decoders, sensors and other helper chips
+#
+
+#
+# Audio decoders, processors and mixers
+#
+# CONFIG_VIDEO_TVAUDIO is not set
+# CONFIG_VIDEO_TDA7432 is not set
+# CONFIG_VIDEO_TDA9840 is not set
+# CONFIG_VIDEO_TEA6415C is not set
+# CONFIG_VIDEO_TEA6420 is not set
+# CONFIG_VIDEO_MSP3400 is not set
+# CONFIG_VIDEO_CS5345 is not set
+# CONFIG_VIDEO_CS53L32A is not set
+# CONFIG_VIDEO_TLV320AIC23B is not set
+# CONFIG_VIDEO_WM8775 is not set
+# CONFIG_VIDEO_WM8739 is not set
+# CONFIG_VIDEO_VP27SMPX is not set
+
+#
+# RDS decoders
+#
+# CONFIG_VIDEO_SAA6588 is not set
+
+#
+# Video decoders
+#
+# CONFIG_VIDEO_ADV7180 is not set
+# CONFIG_VIDEO_BT819 is not set
+# CONFIG_VIDEO_BT856 is not set
+# CONFIG_VIDEO_BT866 is not set
+# CONFIG_VIDEO_KS0127 is not set
+# CONFIG_VIDEO_SAA7110 is not set
+# CONFIG_VIDEO_SAA711X is not set
+# CONFIG_VIDEO_SAA7191 is not set
+# CONFIG_VIDEO_TVP514X is not set
+# CONFIG_VIDEO_TVP5150 is not set
+# CONFIG_VIDEO_TVP7002 is not set
+# CONFIG_VIDEO_VPX3220 is not set
+
+#
+# Video and audio decoders
+#
+# CONFIG_VIDEO_SAA717X is not set
+# CONFIG_VIDEO_CX25840 is not set
+
+#
+# MPEG video encoders
+#
+# CONFIG_VIDEO_CX2341X is not set
+
+#
+# Video encoders
+#
+# CONFIG_VIDEO_SAA7127 is not set
+# CONFIG_VIDEO_SAA7185 is not set
+# CONFIG_VIDEO_ADV7170 is not set
+# CONFIG_VIDEO_ADV7175 is not set
+# CONFIG_VIDEO_ADV7343 is not set
+# CONFIG_VIDEO_AK881X is not set
+
+#
+# Camera sensor devices
+#
+# CONFIG_VIDEO_OV7670 is not set
+# CONFIG_VIDEO_MT9V011 is not set
+# CONFIG_VIDEO_TCM825X is not set
+
+#
+# Video improvement chips
+#
+# CONFIG_VIDEO_UPD64031A is not set
+# CONFIG_VIDEO_UPD64083 is not set
+
+#
+# Miscelaneous helper chips
+#
+# CONFIG_VIDEO_THS7303 is not set
+# CONFIG_VIDEO_M52790 is not set
+# CONFIG_VIDEO_VIVI is not set
+# CONFIG_VIDEO_CPIA2 is not set
+# CONFIG_VIDEO_SR030PC30 is not set
+# CONFIG_VIDEO_NOON010PC30 is not set
+CONFIG_SOC_CAMERA=y
+CONFIG_SOC_CAMERA_LS1C=y
+# CONFIG_SOC_CAMERA_GC0308 is not set
+# CONFIG_SOC_CAMERA_S5K5CA is not set
+CONFIG_SOC_CAMERA_OV9650=y
+# CONFIG_SOC_CAMERA_IMX074 is not set
+# CONFIG_SOC_CAMERA_MT9M001 is not set
+# CONFIG_SOC_CAMERA_MT9M111 is not set
+# CONFIG_SOC_CAMERA_MT9T031 is not set
+# CONFIG_SOC_CAMERA_MT9T112 is not set
+# CONFIG_SOC_CAMERA_MT9V022 is not set
+# CONFIG_SOC_CAMERA_RJ54N1 is not set
+# CONFIG_SOC_CAMERA_TW9910 is not set
+# CONFIG_SOC_CAMERA_PLATFORM is not set
+# CONFIG_SOC_CAMERA_OV2640 is not set
+# CONFIG_SOC_CAMERA_OV6650 is not set
+# CONFIG_SOC_CAMERA_OV772X is not set
+# CONFIG_SOC_CAMERA_OV9640 is not set
+# CONFIG_SOC_CAMERA_OV9740 is not set
+CONFIG_V4L_USB_DRIVERS=y
+# CONFIG_USB_VIDEO_CLASS is not set
+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
+CONFIG_USB_GSPCA=m
+# CONFIG_USB_M5602 is not set
+# CONFIG_USB_STV06XX is not set
+# CONFIG_USB_GL860 is not set
+# CONFIG_USB_GSPCA_BENQ is not set
+# CONFIG_USB_GSPCA_CONEX is not set
+# CONFIG_USB_GSPCA_CPIA1 is not set
+# CONFIG_USB_GSPCA_ETOMS is not set
+# CONFIG_USB_GSPCA_FINEPIX is not set
+# CONFIG_USB_GSPCA_JEILINJ is not set
+# CONFIG_USB_GSPCA_KINECT is not set
+# CONFIG_USB_GSPCA_KONICA is not set
+# CONFIG_USB_GSPCA_MARS is not set
+# CONFIG_USB_GSPCA_MR97310A is not set
+# CONFIG_USB_GSPCA_NW80X is not set
+# CONFIG_USB_GSPCA_OV519 is not set
+# CONFIG_USB_GSPCA_OV534 is not set
+# CONFIG_USB_GSPCA_OV534_9 is not set
+# CONFIG_USB_GSPCA_PAC207 is not set
+# CONFIG_USB_GSPCA_PAC7302 is not set
+# CONFIG_USB_GSPCA_PAC7311 is not set
+# CONFIG_USB_GSPCA_SN9C2028 is not set
+# CONFIG_USB_GSPCA_SN9C20X is not set
+# CONFIG_USB_GSPCA_SONIXB is not set
+# CONFIG_USB_GSPCA_SONIXJ is not set
+# CONFIG_USB_GSPCA_SPCA500 is not set
+# CONFIG_USB_GSPCA_SPCA501 is not set
+# CONFIG_USB_GSPCA_SPCA505 is not set
+# CONFIG_USB_GSPCA_SPCA506 is not set
+# CONFIG_USB_GSPCA_SPCA508 is not set
+# CONFIG_USB_GSPCA_SPCA561 is not set
+# CONFIG_USB_GSPCA_SPCA1528 is not set
+# CONFIG_USB_GSPCA_SQ905 is not set
+# CONFIG_USB_GSPCA_SQ905C is not set
+# CONFIG_USB_GSPCA_SQ930X is not set
+# CONFIG_USB_GSPCA_STK014 is not set
+# CONFIG_USB_GSPCA_STV0680 is not set
+# CONFIG_USB_GSPCA_SUNPLUS is not set
+# CONFIG_USB_GSPCA_T613 is not set
+# CONFIG_USB_GSPCA_TV8532 is not set
+# CONFIG_USB_GSPCA_VC032X is not set
+# CONFIG_USB_GSPCA_VICAM is not set
+# CONFIG_USB_GSPCA_XIRLINK_CIT is not set
+# CONFIG_USB_GSPCA_ZC3XX is not set
+# CONFIG_VIDEO_PVRUSB2 is not set
+# CONFIG_VIDEO_HDPVR is not set
+# CONFIG_VIDEO_EM28XX is not set
+# CONFIG_VIDEO_CX231XX is not set
+# CONFIG_VIDEO_USBVISION is not set
+# CONFIG_USB_ET61X251 is not set
+# CONFIG_USB_SN9C102 is not set
+# CONFIG_USB_PWC is not set
+# CONFIG_USB_ZR364XX is not set
+# CONFIG_USB_STKWEBCAM is not set
+# CONFIG_USB_S2255 is not set
+# CONFIG_VIDEO_GC0308 is not set
+# CONFIG_V4L_MEM2MEM_DRIVERS is not set
+CONFIG_RADIO_ADAPTERS=y
+# CONFIG_I2C_SI4713 is not set
+# CONFIG_RADIO_SI4713 is not set
+# CONFIG_USB_DSBR is not set
+# CONFIG_RADIO_SI470X is not set
+# CONFIG_USB_MR800 is not set
+# CONFIG_RADIO_TEA5764 is not set
+# CONFIG_RADIO_SAA7706H is not set
+# CONFIG_RADIO_TEF6862 is not set
+# CONFIG_RADIO_WL1273 is not set
+
+#
+# Texas Instruments WL128x FM driver (ST based)
+#
+
+#
+# Graphics support
+#
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_WMT_GE_ROPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_SSD1305 is not set
+# CONFIG_FB_ST7565 is not set
+# CONFIG_FB_ST7920 is not set
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_LOONGSON1=y
+CONFIG_LS1X_FB0=y
+# CONFIG_FB_LS1X_I2C is not set
+# CONFIG_FB_UDL is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_BROADSHEET is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+CONFIG_SOUND=y
+CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+CONFIG_SND_JACK=y
+# CONFIG_SND_SEQUENCER is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_HRTIMER is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_ALOOP is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+CONFIG_SND_SPI=y
+CONFIG_SND_MIPS=y
+CONFIG_SND_USB=y
+# CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_UA101 is not set
+# CONFIG_SND_USB_CAIAQ is not set
+# CONFIG_SND_USB_6FIRE is not set
+CONFIG_SND_SOC=y
+# CONFIG_SND_SOC_CACHE_LZO is not set
+# CONFIG_SND_LS1A_SOC is not set
+# CONFIG_SND_LS1A is not set
+CONFIG_SND_SOC_I2C_AND_SPI=y
+# CONFIG_SND_SOC_ALL_CODECS is not set
+CONFIG_SOUND_PRIME=y
+# CONFIG_SOUND_LS1X_AC97 is not set
+CONFIG_SOUND_LS1X_UDA1342=y
+# CONFIG_HID_SUPPORT is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+CONFIG_USB_OTG=y
+CONFIG_USB_OTG_WHITELIST=y
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
+CONFIG_USB_EHCI_TT_NEWSCHED=y
+CONFIG_USB_EHCI_HCD_LS1X=y
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_LS1X=y
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_OHCI_HCD_PLATFORM is not set
+# CONFIG_USB_EHCI_HCD_PLATFORM is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_REALTEK is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_STORAGE_ENE_UB6250 is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_YUREX is not set
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+CONFIG_USB_GADGET_SNPS_DWC_OTG=y
+# CONFIG_USB_GADGET_FUSB300 is not set
+# CONFIG_USB_GADGET_R8A66597 is not set
+# CONFIG_USB_GADGET_PXA_U2O is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_USB_DWC_OTG_LPM=y
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_ETH is not set
+# CONFIG_USB_G_NCM is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FUNCTIONFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+CONFIG_USB_MASS_STORAGE=m
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_USB_G_MULTI is not set
+# CONFIG_USB_G_HID is not set
+# CONFIG_USB_G_DBGP is not set
+# CONFIG_USB_G_WEBCAM is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_NFC_DEVICES is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_DS3232 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_ISL12022 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+# CONFIG_RTC_DRV_EM3027 is not set
+# CONFIG_RTC_DRV_RV3029C2 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T93 is not set
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_LOONGSON1 is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_DEFAULTS_TO_ORDERED=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_EXPORTFS=y
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_FANOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_QUOTACTL is not set
+CONFIG_AUTOFS4_FS=y
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=936
+CONFIG_FAT_DEFAULT_IOCHARSET="cp936"
+CONFIG_NTFS_FS=y
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_TMPFS_XATTR=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_CONFIGFS_FS=y
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_YAFFS_FS=y
+CONFIG_YAFFS_YAFFS1=y
+# CONFIG_YAFFS_9BYTE_TAGS is not set
+# CONFIG_YAFFS_DOES_ECC is not set
+CONFIG_YAFFS_YAFFS2=y
+CONFIG_YAFFS_AUTO_YAFFS2=y
+CONFIG_YAFFS_DISABLE_TAGS_ECC=y
+# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
+# CONFIG_YAFFS_EMPTY_LOST_AND_FOUND is not set
+# CONFIG_YAFFS_DISABLE_BLOCK_REFRESHING is not set
+# CONFIG_YAFFS_DISABLE_BACKGROUND is not set
+CONFIG_YAFFS_XATTR=y
+# CONFIG_JFFS2_FS is not set
+# CONFIG_LOGFS is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_MINIX_FS_NATIVE_ENDIAN is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_PSTORE is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_V4_1=y
+CONFIG_PNFS_FILE_LAYOUT=y
+CONFIG_ROOT_NFS=y
+CONFIG_NFS_USE_LEGACY_DNS=y
+CONFIG_NFSD=y
+CONFIG_NFSD_DEPRECATED=y
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_V4 is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+# CONFIG_CEPH_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="cp936"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+CONFIG_NLS_CODEPAGE_936=y
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_SECTION_MISMATCH is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+# CONFIG_LOCKUP_DETECTOR is not set
+# CONFIG_HARDLOCKUP_DETECTOR is not set
+# CONFIG_DETECT_HUNG_TASK is not set
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_SPARSE_RCU_POINTER is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_INFO_REDUCED is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_TEST_LIST_SORT is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
+# CONFIG_ATOMIC64_SELFTEST is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_TEST_KSTRTOX is not set
+CONFIG_EARLY_PRINTK=y
+# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_RUNTIME_DEBUG is not set
+# CONFIG_DEBUG_ZBOOT is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY_DMESG_RESTRICT is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_PCOMP2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=y
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_SHA256=y
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_ZLIB=y
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_USER_API_HASH is not set
+# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_VIRTUALIZATION is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC_ITU_T=y
+CONFIG_CRC32=y
+CONFIG_CRC7=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+# CONFIG_XZ_DEC is not set
+# CONFIG_XZ_DEC_BCJ is not set
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_AVERAGE=y
diff -uNra linux-3.0.82/config_ls1c linux-3.0.82x/config_ls1c
--- linux-3.0.82/config_ls1c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/config_ls1c	2017-09-23 03:42:49.414676909 +0800
@@ -0,0 +1,1887 @@
+#
+# Automatically generated make config: don't edit
+# Linux/mips 3.0.82 Kernel Configuration
+#
+CONFIG_MIPS=y
+
+#
+# Machine selection
+#
+# CONFIG_MIPS_ALCHEMY is not set
+# CONFIG_AR7 is not set
+# CONFIG_ATH79 is not set
+# CONFIG_BCM47XX is not set
+# CONFIG_BCM63XX is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_MACH_JZ4740 is not set
+# CONFIG_LANTIQ is not set
+# CONFIG_LASAT is not set
+CONFIG_MACH_LOONGSON=y
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SIM is not set
+# CONFIG_NEC_MARKEINS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_NXP_STB220 is not set
+# CONFIG_NXP_STB225 is not set
+# CONFIG_PNX8550_JBS is not set
+# CONFIG_PNX8550_STB810 is not set
+# CONFIG_PMC_MSP is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_POWERTV is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP28 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_CRHINE is not set
+# CONFIG_SIBYTE_CARMEL is not set
+# CONFIG_SIBYTE_CRHONE is not set
+# CONFIG_SIBYTE_RHONE is not set
+# CONFIG_SIBYTE_SWARM is not set
+# CONFIG_SIBYTE_LITTLESUR is not set
+# CONFIG_SIBYTE_SENTOSA is not set
+# CONFIG_SIBYTE_BIGSUR is not set
+# CONFIG_SNI_RM is not set
+# CONFIG_MACH_TX39XX is not set
+# CONFIG_MACH_TX49XX is not set
+# CONFIG_MIKROTIK_RB532 is not set
+# CONFIG_WR_PPMC is not set
+# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
+# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
+# CONFIG_NLM_XLR_BOARD is not set
+# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
+# CONFIG_HAVE_PWM is not set
+# CONFIG_LS1A_MACH is not set
+# CONFIG_LS1B_MACH is not set
+CONFIG_LS1C_MACH=y
+# CONFIG_LEMOTE_FULOONG2E is not set
+# CONFIG_LEMOTE_MACH2F is not set
+CONFIG_LOONGSON_UART_BASE=y
+# CONFIG_LOONGSON_MC146818 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+CONFIG_CEVT_R4K_LIB=y
+CONFIG_CEVT_R4K=y
+CONFIG_CSRC_R4K_LIB=y
+CONFIG_CSRC_R4K=y
+# CONFIG_ARCH_DMA_ADDR_T_64BIT is not set
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+# CONFIG_MIPS_MACHINE is not set
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_GPIO=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_BOOT_ELF32=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+
+#
+# CPU selection
+#
+CONFIG_CPU_LOONGSON1C=y
+CONFIG_SYS_SUPPORTS_ZBOOT=y
+CONFIG_CPU_LS232=y
+CONFIG_SYS_HAS_CPU_LOONGSON1C=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_CPUFREQ=y
+
+#
+# Kernel type
+#
+CONFIG_32BIT=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_FORCE_MAX_ZONEORDER=12
+CONFIG_MIPS_MT_DISABLED=y
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_CPU_HAS_WB=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_HIGHMEM is not set
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_SYS_SUPPORTS_HIGHMEM=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_COMPACTION is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
+CONFIG_NEED_PER_CPU_KM=y
+# CONFIG_CLEANCACHE is not set
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_256 is not set
+# CONFIG_HZ_1000 is not set
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=250
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+# CONFIG_PREEMPT is not set
+# CONFIG_KEXEC is not set
+# CONFIG_SECCOMP is not set
+# CONFIG_USE_OF is not set
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_HAVE_IRQ_WORK=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_CROSS_COMPILE=""
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_DEFAULT_HOSTNAME="loongson"
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_FHANDLE is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+CONFIG_HAVE_GENERIC_HARDIRQS=y
+
+#
+# IRQ subsystem
+#
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_IRQ_SHOW=y
+
+#
+# RCU Subsystem
+#
+CONFIG_TINY_RCU=y
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_CGROUPS is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_SCHED_AUTOGROUP is not set
+# CONFIG_SYSFS_DEPRECATED is not set
+# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE="./ramdisk.cpio"
+CONFIG_INITRAMFS_ROOT_UID=0
+CONFIG_INITRAMFS_ROOT_GID=0
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+# CONFIG_RD_XZ is not set
+# CONFIG_RD_LZO is not set
+CONFIG_INITRAMFS_COMPRESSION_NONE=y
+# CONFIG_INITRAMFS_COMPRESSION_GZIP is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EXPERT=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+# CONFIG_ELF_CORE is not set
+# CONFIG_PCSPKR_PLATFORM is not set
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_EMBEDDED=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
+
+#
+# Kernel Performance Events And Counters
+#
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
+# CONFIG_VM_EVENT_COUNTERS is not set
+# CONFIG_COMPAT_BRK is not set
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_JUMP_LABEL=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+
+#
+# GCOV-based kernel profiling
+#
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+CONFIG_BLK_DEV_BSG=y
+CONFIG_BLK_DEV_INTEGRITY=y
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+CONFIG_INLINE_SPIN_UNLOCK=y
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+CONFIG_INLINE_READ_UNLOCK=y
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+CONFIG_INLINE_READ_UNLOCK_IRQ=y
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+CONFIG_INLINE_WRITE_UNLOCK=y
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_FREEZER is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_MMU=y
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_HAVE_AOUT is not set
+CONFIG_BINFMT_MISC=y
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Power management options
+#
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_SUSPEND is not set
+# CONFIG_PM_RUNTIME is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE_DEMUX is not set
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_LRO=y
+# CONFIG_INET_DIAG is not set
+CONFIG_TCP_CONG_ADVANCED=y
+CONFIG_TCP_CONG_BIC=y
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_TCP_CONG_WESTWOOD=y
+CONFIG_TCP_CONG_HTCP=y
+# CONFIG_TCP_CONG_HSTCP is not set
+# CONFIG_TCP_CONG_HYBLA is not set
+# CONFIG_TCP_CONG_VEGAS is not set
+# CONFIG_TCP_CONG_SCALABLE is not set
+# CONFIG_TCP_CONG_LP is not set
+# CONFIG_TCP_CONG_VENO is not set
+# CONFIG_TCP_CONG_YEAH is not set
+# CONFIG_TCP_CONG_ILLINOIS is not set
+# CONFIG_DEFAULT_BIC is not set
+CONFIG_DEFAULT_CUBIC=y
+# CONFIG_DEFAULT_HTCP is not set
+# CONFIG_DEFAULT_WESTWOOD is not set
+# CONFIG_DEFAULT_RENO is not set
+CONFIG_DEFAULT_TCP_CONG="cubic"
+CONFIG_TCP_MD5SIG=y
+# CONFIG_IPV6 is not set
+CONFIG_NETWORK_SECMARK=y
+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_L2TP is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+CONFIG_DCB=y
+# CONFIG_BATMAN_ADV is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+CONFIG_CAN=y
+CONFIG_CAN_RAW=y
+# CONFIG_CAN_BCM is not set
+
+#
+# CAN Device Drivers
+#
+# CONFIG_CAN_VCAN is not set
+# CONFIG_CAN_SLCAN is not set
+CONFIG_CAN_DEV=y
+CONFIG_CAN_CALC_BITTIMING=y
+# CONFIG_CAN_MCP251X is not set
+# CONFIG_CAN_SJA1000 is not set
+# CONFIG_CAN_C_CAN is not set
+
+#
+# CAN USB interfaces
+#
+# CONFIG_CAN_EMS_USB is not set
+# CONFIG_CAN_ESD_USB2 is not set
+# CONFIG_CAN_SOFTING is not set
+# CONFIG_CAN_DEBUG_DEVICES is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+# CONFIG_CAIF is not set
+# CONFIG_CEPH_LIB is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/mdev"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_SM_FTL is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SST25L is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND_ECC=y
+# CONFIG_MTD_NAND_ECC_SMC is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_BCH is not set
+# CONFIG_MTD_SM_COMMON is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+CONFIG_MTD_NAND_LS1X=y
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_BLK_DEV_RBD is not set
+# CONFIG_SENSORS_LIS3LV02D is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI_MOD=y
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_TARGET_CORE is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_MII=y
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+CONFIG_REALTEK_PHY=y
+# CONFIG_NATIONAL_PHY is not set
+CONFIG_STE10XP=y
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_MICREL_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_LOONGSON_GMAC=y
+# CONFIG_AX88796 is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
+CONFIG_NETDEV_1000=y
+CONFIG_LS1X_GMAC0=y
+# CONFIG_LS1X_GMAC0_100M is not set
+# CONFIG_LS1X_GMAC0_1000M is not set
+CONFIG_LS1X_GMAC0_RMII=y
+# CONFIG_STMMAC_ETH is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_WLAN is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_USB_IPHETH is not set
+# CONFIG_WAN is not set
+
+#
+# CAIF transport drivers
+#
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+CONFIG_INPUT_POLLDEV=y
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_N_GSM is not set
+# CONFIG_TRACE_SINK is not set
+# CONFIG_DEVKMEM is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=6
+CONFIG_SERIAL_8250_RUNTIME_UARTS=6
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+# CONFIG_SERIAL_MAX3107 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+# CONFIG_SERIAL_IFX6X60 is not set
+# CONFIG_SERIAL_XILINX_PS_UART is not set
+# CONFIG_TTY_PRINTK is not set
+# CONFIG_LS1B_BUZZER is not set
+# CONFIG_LS1B_PWM_DRIVER is not set
+# CONFIG_LS1B_BBDIO is not set
+# CONFIG_LS1B_IR is not set
+# CONFIG_LS1B_STEPMOTOR is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_RAMOOPS is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+# CONFIG_I2C_CHARDEV is not set
+# CONFIG_I2C_MUX is not set
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_LS1X=y
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_PXA_PCI is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_DIOLAN_U2C is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_LS1B_SPI=y
+CONFIG_LS1B_SPI0=y
+# CONFIG_LS1B_SPI1 is not set
+# CONFIG_SPI_ALTERA is not set
+CONFIG_SPI_BITBANG=y
+# CONFIG_SPI_GPIO is not set
+# CONFIG_SPI_OC_TINY is not set
+# CONFIG_SPI_PXA2XX_PCI is not set
+# CONFIG_SPI_XILINX is not set
+# CONFIG_SPI_DESIGNWARE is not set
+
+#
+# SPI Protocol Masters
+#
+CONFIG_SPI_SPIDEV=y
+# CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+
+#
+# PPS generators support
+#
+
+#
+# PTP clock support
+#
+
+#
+# Enable Device Drivers -> PPS to see the PTP clock options.
+#
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO drivers:
+#
+# CONFIG_GPIO_BASIC_MMIO is not set
+# CONFIG_GPIO_IT8761E is not set
+CONFIG_GPIO_LS1C=y
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX7300 is not set
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_SX150X is not set
+# CONFIG_GPIO_ADP5588 is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+# CONFIG_GPIO_74X164 is not set
+# CONFIG_GPIO_74X165 is not set
+
+#
+# AC97 GPIO expanders:
+#
+
+#
+# MODULbus GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+CONFIG_BCMA_POSSIBLE=y
+
+#
+# Broadcom specific AMBA
+#
+# CONFIG_BCMA is not set
+# CONFIG_MFD_SUPPORT is not set
+# CONFIG_REGULATOR is not set
+CONFIG_MEDIA_SUPPORT=y
+
+#
+# Multimedia core support
+#
+CONFIG_MEDIA_CONTROLLER=y
+CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_COMMON=y
+# CONFIG_VIDEO_V4L2_SUBDEV_API is not set
+# CONFIG_DVB_CORE is not set
+CONFIG_VIDEO_MEDIA=y
+
+#
+# Multimedia drivers
+#
+CONFIG_RC_CORE=y
+CONFIG_LIRC=y
+CONFIG_RC_MAP=y
+CONFIG_IR_NEC_DECODER=y
+CONFIG_IR_RC5_DECODER=y
+CONFIG_IR_RC6_DECODER=y
+CONFIG_IR_JVC_DECODER=y
+CONFIG_IR_SONY_DECODER=y
+CONFIG_IR_RC5_SZ_DECODER=y
+CONFIG_IR_LIRC_CODEC=y
+# CONFIG_IR_IMON is not set
+# CONFIG_IR_MCEUSB is not set
+# CONFIG_IR_REDRAT3 is not set
+# CONFIG_IR_STREAMZAP is not set
+# CONFIG_RC_LOOPBACK is not set
+# CONFIG_MEDIA_ATTACH is not set
+CONFIG_MEDIA_TUNER=y
+CONFIG_MEDIA_TUNER_CUSTOMISE=y
+
+#
+# Customize TV tuners
+#
+CONFIG_MEDIA_TUNER_SIMPLE=m
+CONFIG_MEDIA_TUNER_TDA8290=m
+CONFIG_MEDIA_TUNER_TDA827X=m
+CONFIG_MEDIA_TUNER_TDA18271=m
+CONFIG_MEDIA_TUNER_TDA9887=m
+CONFIG_MEDIA_TUNER_TEA5761=m
+CONFIG_MEDIA_TUNER_TEA5767=m
+CONFIG_MEDIA_TUNER_MT20XX=m
+CONFIG_MEDIA_TUNER_MT2060=m
+CONFIG_MEDIA_TUNER_MT2266=m
+CONFIG_MEDIA_TUNER_MT2131=m
+CONFIG_MEDIA_TUNER_QT1010=m
+CONFIG_MEDIA_TUNER_XC2028=m
+CONFIG_MEDIA_TUNER_XC5000=m
+CONFIG_MEDIA_TUNER_MXL5005S=m
+CONFIG_MEDIA_TUNER_MXL5007T=m
+CONFIG_MEDIA_TUNER_MC44S803=m
+CONFIG_MEDIA_TUNER_MAX2165=m
+CONFIG_MEDIA_TUNER_TDA18218=m
+CONFIG_MEDIA_TUNER_TDA18212=m
+CONFIG_VIDEO_V4L2=y
+CONFIG_VIDEOBUF_GEN=y
+CONFIG_VIDEOBUF_DMA_CONTIG=y
+CONFIG_VIDEOBUF2_CORE=y
+CONFIG_VIDEO_CAPTURE_DRIVERS=y
+# CONFIG_VIDEO_ADV_DEBUG is not set
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set
+CONFIG_VIDEO_IR_I2C=y
+
+#
+# Encoders, decoders, sensors and other helper chips
+#
+
+#
+# Audio decoders, processors and mixers
+#
+# CONFIG_VIDEO_TVAUDIO is not set
+# CONFIG_VIDEO_TDA7432 is not set
+# CONFIG_VIDEO_TDA9840 is not set
+# CONFIG_VIDEO_TEA6415C is not set
+# CONFIG_VIDEO_TEA6420 is not set
+# CONFIG_VIDEO_MSP3400 is not set
+# CONFIG_VIDEO_CS5345 is not set
+# CONFIG_VIDEO_CS53L32A is not set
+# CONFIG_VIDEO_TLV320AIC23B is not set
+# CONFIG_VIDEO_WM8775 is not set
+# CONFIG_VIDEO_WM8739 is not set
+# CONFIG_VIDEO_VP27SMPX is not set
+
+#
+# RDS decoders
+#
+# CONFIG_VIDEO_SAA6588 is not set
+
+#
+# Video decoders
+#
+# CONFIG_VIDEO_ADV7180 is not set
+# CONFIG_VIDEO_BT819 is not set
+# CONFIG_VIDEO_BT856 is not set
+# CONFIG_VIDEO_BT866 is not set
+# CONFIG_VIDEO_KS0127 is not set
+# CONFIG_VIDEO_SAA7110 is not set
+# CONFIG_VIDEO_SAA711X is not set
+# CONFIG_VIDEO_SAA7191 is not set
+# CONFIG_VIDEO_TVP514X is not set
+# CONFIG_VIDEO_TVP5150 is not set
+# CONFIG_VIDEO_TVP7002 is not set
+# CONFIG_VIDEO_VPX3220 is not set
+
+#
+# Video and audio decoders
+#
+# CONFIG_VIDEO_SAA717X is not set
+# CONFIG_VIDEO_CX25840 is not set
+
+#
+# MPEG video encoders
+#
+# CONFIG_VIDEO_CX2341X is not set
+
+#
+# Video encoders
+#
+# CONFIG_VIDEO_SAA7127 is not set
+# CONFIG_VIDEO_SAA7185 is not set
+# CONFIG_VIDEO_ADV7170 is not set
+# CONFIG_VIDEO_ADV7175 is not set
+# CONFIG_VIDEO_ADV7343 is not set
+# CONFIG_VIDEO_AK881X is not set
+
+#
+# Camera sensor devices
+#
+# CONFIG_VIDEO_OV7670 is not set
+# CONFIG_VIDEO_MT9V011 is not set
+# CONFIG_VIDEO_TCM825X is not set
+
+#
+# Video improvement chips
+#
+# CONFIG_VIDEO_UPD64031A is not set
+# CONFIG_VIDEO_UPD64083 is not set
+
+#
+# Miscelaneous helper chips
+#
+# CONFIG_VIDEO_THS7303 is not set
+# CONFIG_VIDEO_M52790 is not set
+# CONFIG_VIDEO_VIVI is not set
+# CONFIG_VIDEO_CPIA2 is not set
+# CONFIG_VIDEO_SR030PC30 is not set
+# CONFIG_VIDEO_NOON010PC30 is not set
+CONFIG_SOC_CAMERA=y
+CONFIG_SOC_CAMERA_LS1C=y
+# CONFIG_SOC_CAMERA_GC0308 is not set
+# CONFIG_SOC_CAMERA_S5K5CA is not set
+CONFIG_SOC_CAMERA_OV9650=y
+# CONFIG_SOC_CAMERA_IMX074 is not set
+# CONFIG_SOC_CAMERA_MT9M001 is not set
+# CONFIG_SOC_CAMERA_MT9M111 is not set
+# CONFIG_SOC_CAMERA_MT9T031 is not set
+# CONFIG_SOC_CAMERA_MT9T112 is not set
+# CONFIG_SOC_CAMERA_MT9V022 is not set
+# CONFIG_SOC_CAMERA_RJ54N1 is not set
+# CONFIG_SOC_CAMERA_TW9910 is not set
+# CONFIG_SOC_CAMERA_PLATFORM is not set
+# CONFIG_SOC_CAMERA_OV2640 is not set
+# CONFIG_SOC_CAMERA_OV6650 is not set
+# CONFIG_SOC_CAMERA_OV772X is not set
+# CONFIG_SOC_CAMERA_OV9640 is not set
+# CONFIG_SOC_CAMERA_OV9740 is not set
+CONFIG_V4L_USB_DRIVERS=y
+# CONFIG_USB_VIDEO_CLASS is not set
+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
+CONFIG_USB_GSPCA=m
+# CONFIG_USB_M5602 is not set
+# CONFIG_USB_STV06XX is not set
+# CONFIG_USB_GL860 is not set
+# CONFIG_USB_GSPCA_BENQ is not set
+# CONFIG_USB_GSPCA_CONEX is not set
+# CONFIG_USB_GSPCA_CPIA1 is not set
+# CONFIG_USB_GSPCA_ETOMS is not set
+# CONFIG_USB_GSPCA_FINEPIX is not set
+# CONFIG_USB_GSPCA_JEILINJ is not set
+# CONFIG_USB_GSPCA_KINECT is not set
+# CONFIG_USB_GSPCA_KONICA is not set
+# CONFIG_USB_GSPCA_MARS is not set
+# CONFIG_USB_GSPCA_MR97310A is not set
+# CONFIG_USB_GSPCA_NW80X is not set
+# CONFIG_USB_GSPCA_OV519 is not set
+# CONFIG_USB_GSPCA_OV534 is not set
+# CONFIG_USB_GSPCA_OV534_9 is not set
+# CONFIG_USB_GSPCA_PAC207 is not set
+# CONFIG_USB_GSPCA_PAC7302 is not set
+# CONFIG_USB_GSPCA_PAC7311 is not set
+# CONFIG_USB_GSPCA_SN9C2028 is not set
+# CONFIG_USB_GSPCA_SN9C20X is not set
+# CONFIG_USB_GSPCA_SONIXB is not set
+# CONFIG_USB_GSPCA_SONIXJ is not set
+# CONFIG_USB_GSPCA_SPCA500 is not set
+# CONFIG_USB_GSPCA_SPCA501 is not set
+# CONFIG_USB_GSPCA_SPCA505 is not set
+# CONFIG_USB_GSPCA_SPCA506 is not set
+# CONFIG_USB_GSPCA_SPCA508 is not set
+# CONFIG_USB_GSPCA_SPCA561 is not set
+# CONFIG_USB_GSPCA_SPCA1528 is not set
+# CONFIG_USB_GSPCA_SQ905 is not set
+# CONFIG_USB_GSPCA_SQ905C is not set
+# CONFIG_USB_GSPCA_SQ930X is not set
+# CONFIG_USB_GSPCA_STK014 is not set
+# CONFIG_USB_GSPCA_STV0680 is not set
+# CONFIG_USB_GSPCA_SUNPLUS is not set
+# CONFIG_USB_GSPCA_T613 is not set
+# CONFIG_USB_GSPCA_TV8532 is not set
+# CONFIG_USB_GSPCA_VC032X is not set
+# CONFIG_USB_GSPCA_VICAM is not set
+# CONFIG_USB_GSPCA_XIRLINK_CIT is not set
+# CONFIG_USB_GSPCA_ZC3XX is not set
+# CONFIG_VIDEO_PVRUSB2 is not set
+# CONFIG_VIDEO_HDPVR is not set
+# CONFIG_VIDEO_EM28XX is not set
+# CONFIG_VIDEO_CX231XX is not set
+# CONFIG_VIDEO_USBVISION is not set
+# CONFIG_USB_ET61X251 is not set
+# CONFIG_USB_SN9C102 is not set
+# CONFIG_USB_PWC is not set
+# CONFIG_USB_ZR364XX is not set
+# CONFIG_USB_STKWEBCAM is not set
+# CONFIG_USB_S2255 is not set
+# CONFIG_VIDEO_GC0308 is not set
+# CONFIG_V4L_MEM2MEM_DRIVERS is not set
+CONFIG_RADIO_ADAPTERS=y
+# CONFIG_I2C_SI4713 is not set
+# CONFIG_RADIO_SI4713 is not set
+# CONFIG_USB_DSBR is not set
+# CONFIG_RADIO_SI470X is not set
+# CONFIG_USB_MR800 is not set
+# CONFIG_RADIO_TEA5764 is not set
+# CONFIG_RADIO_SAA7706H is not set
+# CONFIG_RADIO_TEF6862 is not set
+# CONFIG_RADIO_WL1273 is not set
+
+#
+# Texas Instruments WL128x FM driver (ST based)
+#
+
+#
+# Graphics support
+#
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_WMT_GE_ROPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_SSD1305 is not set
+# CONFIG_FB_ST7565 is not set
+# CONFIG_FB_ST7920 is not set
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_LOONGSON1=y
+CONFIG_LS1X_FB0=y
+# CONFIG_FB_LS1X_I2C is not set
+# CONFIG_FB_UDL is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_BROADSHEET is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+CONFIG_SOUND=y
+CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+CONFIG_SND_JACK=y
+# CONFIG_SND_SEQUENCER is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_HRTIMER is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_ALOOP is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+CONFIG_SND_SPI=y
+CONFIG_SND_MIPS=y
+CONFIG_SND_USB=y
+# CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_UA101 is not set
+# CONFIG_SND_USB_CAIAQ is not set
+# CONFIG_SND_USB_6FIRE is not set
+CONFIG_SND_SOC=y
+# CONFIG_SND_SOC_CACHE_LZO is not set
+# CONFIG_SND_LS1A_SOC is not set
+# CONFIG_SND_LS1A is not set
+CONFIG_SND_SOC_I2C_AND_SPI=y
+# CONFIG_SND_SOC_ALL_CODECS is not set
+CONFIG_SOUND_PRIME=y
+# CONFIG_SOUND_LS1X_AC97 is not set
+CONFIG_SOUND_LS1X_UDA1342=y
+# CONFIG_HID_SUPPORT is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+CONFIG_USB_OTG=y
+CONFIG_USB_OTG_WHITELIST=y
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
+CONFIG_USB_EHCI_TT_NEWSCHED=y
+CONFIG_USB_EHCI_HCD_LS1X=y
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_LS1X=y
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_OHCI_HCD_PLATFORM is not set
+# CONFIG_USB_EHCI_HCD_PLATFORM is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_REALTEK is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_STORAGE_ENE_UB6250 is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_YUREX is not set
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+CONFIG_USB_GADGET_SNPS_DWC_OTG=y
+# CONFIG_USB_GADGET_FUSB300 is not set
+# CONFIG_USB_GADGET_R8A66597 is not set
+# CONFIG_USB_GADGET_PXA_U2O is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_USB_DWC_OTG_LPM=y
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_ETH is not set
+# CONFIG_USB_G_NCM is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FUNCTIONFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+CONFIG_USB_MASS_STORAGE=m
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_USB_G_MULTI is not set
+# CONFIG_USB_G_HID is not set
+# CONFIG_USB_G_DBGP is not set
+# CONFIG_USB_G_WEBCAM is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_NFC_DEVICES is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_DS3232 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_ISL12022 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+# CONFIG_RTC_DRV_EM3027 is not set
+# CONFIG_RTC_DRV_RV3029C2 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T93 is not set
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_LOONGSON1 is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_DEFAULTS_TO_ORDERED=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_EXPORTFS=y
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_FANOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_QUOTACTL is not set
+CONFIG_AUTOFS4_FS=y
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=936
+CONFIG_FAT_DEFAULT_IOCHARSET="cp936"
+CONFIG_NTFS_FS=y
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_TMPFS_XATTR=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_CONFIGFS_FS=y
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_YAFFS_FS=y
+CONFIG_YAFFS_YAFFS1=y
+# CONFIG_YAFFS_9BYTE_TAGS is not set
+# CONFIG_YAFFS_DOES_ECC is not set
+CONFIG_YAFFS_YAFFS2=y
+CONFIG_YAFFS_AUTO_YAFFS2=y
+CONFIG_YAFFS_DISABLE_TAGS_ECC=y
+# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
+# CONFIG_YAFFS_EMPTY_LOST_AND_FOUND is not set
+# CONFIG_YAFFS_DISABLE_BLOCK_REFRESHING is not set
+# CONFIG_YAFFS_DISABLE_BACKGROUND is not set
+CONFIG_YAFFS_XATTR=y
+# CONFIG_JFFS2_FS is not set
+# CONFIG_LOGFS is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_MINIX_FS_NATIVE_ENDIAN is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_PSTORE is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_V4_1=y
+CONFIG_PNFS_FILE_LAYOUT=y
+CONFIG_ROOT_NFS=y
+CONFIG_NFS_USE_LEGACY_DNS=y
+CONFIG_NFSD=y
+CONFIG_NFSD_DEPRECATED=y
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_V4 is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+# CONFIG_CEPH_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="cp936"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+CONFIG_NLS_CODEPAGE_936=y
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_SECTION_MISMATCH is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+# CONFIG_LOCKUP_DETECTOR is not set
+# CONFIG_HARDLOCKUP_DETECTOR is not set
+# CONFIG_DETECT_HUNG_TASK is not set
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_SPARSE_RCU_POINTER is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_INFO_REDUCED is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_TEST_LIST_SORT is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
+# CONFIG_ATOMIC64_SELFTEST is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_TEST_KSTRTOX is not set
+CONFIG_EARLY_PRINTK=y
+# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_RUNTIME_DEBUG is not set
+# CONFIG_DEBUG_ZBOOT is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY_DMESG_RESTRICT is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_PCOMP2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=y
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_SHA256=y
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_ZLIB=y
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_USER_API_HASH is not set
+# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_VIRTUALIZATION is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC_ITU_T=y
+CONFIG_CRC32=y
+CONFIG_CRC7=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+# CONFIG_XZ_DEC is not set
+# CONFIG_XZ_DEC_BCJ is not set
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_AVERAGE=y
diff -uNra linux-3.0.82/config.ls1c linux-3.0.82x/config.ls1c
--- linux-3.0.82/config.ls1c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/config.ls1c	2017-09-23 03:42:49.414676909 +0800
@@ -0,0 +1,1919 @@
+#
+# Automatically generated make config: don't edit
+# Linux/mips 3.0.82 Kernel Configuration
+#
+CONFIG_MIPS=y
+
+#
+# Machine selection
+#
+# CONFIG_MIPS_ALCHEMY is not set
+# CONFIG_AR7 is not set
+# CONFIG_ATH79 is not set
+# CONFIG_BCM47XX is not set
+# CONFIG_BCM63XX is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_MACH_JZ4740 is not set
+# CONFIG_LANTIQ is not set
+# CONFIG_LASAT is not set
+CONFIG_MACH_LOONGSON=y
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SIM is not set
+# CONFIG_NEC_MARKEINS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_NXP_STB220 is not set
+# CONFIG_NXP_STB225 is not set
+# CONFIG_PNX8550_JBS is not set
+# CONFIG_PNX8550_STB810 is not set
+# CONFIG_PMC_MSP is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_POWERTV is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP28 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_CRHINE is not set
+# CONFIG_SIBYTE_CARMEL is not set
+# CONFIG_SIBYTE_CRHONE is not set
+# CONFIG_SIBYTE_RHONE is not set
+# CONFIG_SIBYTE_SWARM is not set
+# CONFIG_SIBYTE_LITTLESUR is not set
+# CONFIG_SIBYTE_SENTOSA is not set
+# CONFIG_SIBYTE_BIGSUR is not set
+# CONFIG_SNI_RM is not set
+# CONFIG_MACH_TX39XX is not set
+# CONFIG_MACH_TX49XX is not set
+# CONFIG_MIKROTIK_RB532 is not set
+# CONFIG_WR_PPMC is not set
+# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
+# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
+# CONFIG_NLM_XLR_BOARD is not set
+# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
+# CONFIG_HAVE_PWM is not set
+# CONFIG_LS1A_MACH is not set
+# CONFIG_LS1B_MACH is not set
+CONFIG_LS1C_MACH=y
+# CONFIG_LEMOTE_FULOONG2E is not set
+# CONFIG_LEMOTE_MACH2F is not set
+CONFIG_LOONGSON_UART_BASE=y
+# CONFIG_LOONGSON_MC146818 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+CONFIG_CEVT_R4K_LIB=y
+CONFIG_CEVT_R4K=y
+CONFIG_CSRC_R4K_LIB=y
+CONFIG_CSRC_R4K=y
+# CONFIG_ARCH_DMA_ADDR_T_64BIT is not set
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+# CONFIG_MIPS_MACHINE is not set
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_GPIO=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_BOOT_ELF32=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+
+#
+# CPU selection
+#
+CONFIG_CPU_LOONGSON1C=y
+CONFIG_SYS_SUPPORTS_ZBOOT=y
+CONFIG_CPU_LS232=y
+CONFIG_SYS_HAS_CPU_LOONGSON1C=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_CPUFREQ=y
+
+#
+# Kernel type
+#
+CONFIG_32BIT=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_FORCE_MAX_ZONEORDER=12
+CONFIG_MIPS_MT_DISABLED=y
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_CPU_HAS_WB=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_HIGHMEM is not set
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_SYS_SUPPORTS_HIGHMEM=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_COMPACTION is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
+CONFIG_NEED_PER_CPU_KM=y
+# CONFIG_CLEANCACHE is not set
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_256 is not set
+# CONFIG_HZ_1000 is not set
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=250
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+# CONFIG_PREEMPT is not set
+# CONFIG_KEXEC is not set
+# CONFIG_SECCOMP is not set
+# CONFIG_USE_OF is not set
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_HAVE_IRQ_WORK=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_CROSS_COMPILE=""
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_DEFAULT_HOSTNAME="loongson"
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_FHANDLE is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+CONFIG_HAVE_GENERIC_HARDIRQS=y
+
+#
+# IRQ subsystem
+#
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_IRQ_SHOW=y
+
+#
+# RCU Subsystem
+#
+CONFIG_TINY_RCU=y
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_CGROUPS is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_SCHED_AUTOGROUP is not set
+# CONFIG_SYSFS_DEPRECATED is not set
+# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE="/mnt/ramdisk"
+CONFIG_INITRAMFS_ROOT_UID=0
+CONFIG_INITRAMFS_ROOT_GID=0
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+# CONFIG_RD_XZ is not set
+# CONFIG_RD_LZO is not set
+CONFIG_INITRAMFS_COMPRESSION_NONE=y
+# CONFIG_INITRAMFS_COMPRESSION_GZIP is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EXPERT=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+# CONFIG_ELF_CORE is not set
+# CONFIG_PCSPKR_PLATFORM is not set
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_EMBEDDED=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
+
+#
+# Kernel Performance Events And Counters
+#
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
+# CONFIG_VM_EVENT_COUNTERS is not set
+# CONFIG_COMPAT_BRK is not set
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_JUMP_LABEL=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+
+#
+# GCOV-based kernel profiling
+#
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+CONFIG_BLK_DEV_BSG=y
+CONFIG_BLK_DEV_INTEGRITY=y
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+CONFIG_INLINE_SPIN_UNLOCK=y
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+CONFIG_INLINE_READ_UNLOCK=y
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+CONFIG_INLINE_READ_UNLOCK_IRQ=y
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+CONFIG_INLINE_WRITE_UNLOCK=y
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_FREEZER is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_MMU=y
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_HAVE_AOUT is not set
+CONFIG_BINFMT_MISC=y
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Power management options
+#
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_SUSPEND is not set
+# CONFIG_PM_RUNTIME is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE_DEMUX is not set
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_LRO=y
+# CONFIG_INET_DIAG is not set
+CONFIG_TCP_CONG_ADVANCED=y
+CONFIG_TCP_CONG_BIC=y
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_TCP_CONG_WESTWOOD=y
+CONFIG_TCP_CONG_HTCP=y
+# CONFIG_TCP_CONG_HSTCP is not set
+# CONFIG_TCP_CONG_HYBLA is not set
+# CONFIG_TCP_CONG_VEGAS is not set
+# CONFIG_TCP_CONG_SCALABLE is not set
+# CONFIG_TCP_CONG_LP is not set
+# CONFIG_TCP_CONG_VENO is not set
+# CONFIG_TCP_CONG_YEAH is not set
+# CONFIG_TCP_CONG_ILLINOIS is not set
+# CONFIG_DEFAULT_BIC is not set
+CONFIG_DEFAULT_CUBIC=y
+# CONFIG_DEFAULT_HTCP is not set
+# CONFIG_DEFAULT_WESTWOOD is not set
+# CONFIG_DEFAULT_RENO is not set
+CONFIG_DEFAULT_TCP_CONG="cubic"
+CONFIG_TCP_MD5SIG=y
+# CONFIG_IPV6 is not set
+CONFIG_NETWORK_SECMARK=y
+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_L2TP is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+CONFIG_DCB=y
+# CONFIG_BATMAN_ADV is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+# CONFIG_CAIF is not set
+# CONFIG_CEPH_LIB is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/mdev"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_SM_FTL is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SST25L is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND_ECC=y
+# CONFIG_MTD_NAND_ECC_SMC is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_BCH is not set
+# CONFIG_MTD_SM_COMMON is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+CONFIG_MTD_NAND_LS1X=y
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_BLK_DEV_RBD is not set
+# CONFIG_SENSORS_LIS3LV02D is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI_MOD=y
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_TARGET_CORE is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_MII=y
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+CONFIG_REALTEK_PHY=y
+# CONFIG_NATIONAL_PHY is not set
+CONFIG_STE10XP=y
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_MICREL_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_LOONGSON_GMAC=y
+# CONFIG_AX88796 is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
+CONFIG_NETDEV_1000=y
+CONFIG_LS1X_GMAC0=y
+# CONFIG_LS1X_GMAC0_100M is not set
+# CONFIG_LS1X_GMAC0_1000M is not set
+CONFIG_LS1X_GMAC0_RMII=y
+# CONFIG_STMMAC_ETH is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_WLAN is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_USB_IPHETH is not set
+# CONFIG_WAN is not set
+
+#
+# CAIF transport drivers
+#
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+CONFIG_INPUT_POLLDEV=y
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_FT5X0X is not set
+# CONFIG_TOUCHSCREEN_FT5X06 is not set
+# CONFIG_FT5X0X_MULTITOUCH is not set
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
+# CONFIG_TOUCHSCREEN_AD7877 is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set
+# CONFIG_TOUCHSCREEN_BU21013 is not set
+# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
+# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
+# CONFIG_TOUCHSCREEN_EETI is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MAX11801 is not set
+# CONFIG_TOUCHSCREEN_MCS5000 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_WM97XX is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2005 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_TOUCHSCREEN_ST1232 is not set
+# CONFIG_TOUCHSCREEN_TPS6507X is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_N_GSM is not set
+# CONFIG_TRACE_SINK is not set
+# CONFIG_DEVKMEM is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=6
+CONFIG_SERIAL_8250_RUNTIME_UARTS=6
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+# CONFIG_SERIAL_MAX3107 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+# CONFIG_SERIAL_IFX6X60 is not set
+# CONFIG_SERIAL_XILINX_PS_UART is not set
+# CONFIG_TTY_PRINTK is not set
+# CONFIG_LS1B_BUZZER is not set
+# CONFIG_LS1B_PWM_DRIVER is not set
+# CONFIG_LS1B_BBDIO is not set
+# CONFIG_LS1B_IR is not set
+# CONFIG_LS1B_STEPMOTOR is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_RAMOOPS is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+# CONFIG_I2C_CHARDEV is not set
+# CONFIG_I2C_MUX is not set
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_LS1X=y
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_PXA_PCI is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_DIOLAN_U2C is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_ALTERA is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
+# CONFIG_SPI_OC_TINY is not set
+# CONFIG_SPI_PXA2XX_PCI is not set
+# CONFIG_SPI_XILINX is not set
+# CONFIG_SPI_DESIGNWARE is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+
+#
+# PPS generators support
+#
+
+#
+# PTP clock support
+#
+
+#
+# Enable Device Drivers -> PPS to see the PTP clock options.
+#
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO drivers:
+#
+# CONFIG_GPIO_BASIC_MMIO is not set
+# CONFIG_GPIO_IT8761E is not set
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX7300 is not set
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_SX150X is not set
+# CONFIG_GPIO_ADP5588 is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+# CONFIG_GPIO_74X164 is not set
+# CONFIG_GPIO_74X165 is not set
+
+#
+# AC97 GPIO expanders:
+#
+
+#
+# MODULbus GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+CONFIG_BCMA_POSSIBLE=y
+
+#
+# Broadcom specific AMBA
+#
+# CONFIG_BCMA is not set
+# CONFIG_MFD_SUPPORT is not set
+# CONFIG_REGULATOR is not set
+CONFIG_MEDIA_SUPPORT=y
+
+#
+# Multimedia core support
+#
+# CONFIG_MEDIA_CONTROLLER is not set
+CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_COMMON=y
+# CONFIG_DVB_CORE is not set
+CONFIG_VIDEO_MEDIA=y
+
+#
+# Multimedia drivers
+#
+CONFIG_RC_CORE=y
+CONFIG_LIRC=y
+CONFIG_RC_MAP=y
+CONFIG_IR_NEC_DECODER=y
+CONFIG_IR_RC5_DECODER=y
+CONFIG_IR_RC6_DECODER=y
+CONFIG_IR_JVC_DECODER=y
+CONFIG_IR_SONY_DECODER=y
+CONFIG_IR_RC5_SZ_DECODER=y
+CONFIG_IR_LIRC_CODEC=y
+# CONFIG_IR_IMON is not set
+# CONFIG_IR_MCEUSB is not set
+# CONFIG_IR_REDRAT3 is not set
+# CONFIG_IR_STREAMZAP is not set
+# CONFIG_RC_LOOPBACK is not set
+# CONFIG_MEDIA_ATTACH is not set
+CONFIG_MEDIA_TUNER=y
+CONFIG_MEDIA_TUNER_CUSTOMISE=y
+
+#
+# Customize TV tuners
+#
+CONFIG_MEDIA_TUNER_SIMPLE=m
+CONFIG_MEDIA_TUNER_TDA8290=m
+CONFIG_MEDIA_TUNER_TDA827X=m
+CONFIG_MEDIA_TUNER_TDA18271=m
+CONFIG_MEDIA_TUNER_TDA9887=m
+CONFIG_MEDIA_TUNER_TEA5761=m
+CONFIG_MEDIA_TUNER_TEA5767=m
+CONFIG_MEDIA_TUNER_MT20XX=m
+CONFIG_MEDIA_TUNER_MT2060=m
+CONFIG_MEDIA_TUNER_MT2266=m
+CONFIG_MEDIA_TUNER_MT2131=m
+CONFIG_MEDIA_TUNER_QT1010=m
+CONFIG_MEDIA_TUNER_XC2028=m
+CONFIG_MEDIA_TUNER_XC5000=m
+CONFIG_MEDIA_TUNER_MXL5005S=m
+CONFIG_MEDIA_TUNER_MXL5007T=m
+CONFIG_MEDIA_TUNER_MC44S803=m
+CONFIG_MEDIA_TUNER_MAX2165=m
+CONFIG_MEDIA_TUNER_TDA18218=m
+CONFIG_MEDIA_TUNER_TDA18212=m
+CONFIG_VIDEO_V4L2=y
+CONFIG_VIDEOBUF_GEN=y
+CONFIG_VIDEOBUF_DMA_CONTIG=y
+CONFIG_VIDEOBUF2_CORE=y
+CONFIG_VIDEO_CAPTURE_DRIVERS=y
+# CONFIG_VIDEO_ADV_DEBUG is not set
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set
+CONFIG_VIDEO_IR_I2C=y
+
+#
+# Encoders, decoders, sensors and other helper chips
+#
+
+#
+# Audio decoders, processors and mixers
+#
+# CONFIG_VIDEO_TVAUDIO is not set
+# CONFIG_VIDEO_TDA7432 is not set
+# CONFIG_VIDEO_TDA9840 is not set
+# CONFIG_VIDEO_TEA6415C is not set
+# CONFIG_VIDEO_TEA6420 is not set
+# CONFIG_VIDEO_MSP3400 is not set
+# CONFIG_VIDEO_CS5345 is not set
+# CONFIG_VIDEO_CS53L32A is not set
+# CONFIG_VIDEO_TLV320AIC23B is not set
+# CONFIG_VIDEO_WM8775 is not set
+# CONFIG_VIDEO_WM8739 is not set
+# CONFIG_VIDEO_VP27SMPX is not set
+
+#
+# RDS decoders
+#
+# CONFIG_VIDEO_SAA6588 is not set
+
+#
+# Video decoders
+#
+# CONFIG_VIDEO_ADV7180 is not set
+# CONFIG_VIDEO_BT819 is not set
+# CONFIG_VIDEO_BT856 is not set
+# CONFIG_VIDEO_BT866 is not set
+# CONFIG_VIDEO_KS0127 is not set
+# CONFIG_VIDEO_SAA7110 is not set
+# CONFIG_VIDEO_SAA711X is not set
+# CONFIG_VIDEO_SAA7191 is not set
+# CONFIG_VIDEO_TVP514X is not set
+# CONFIG_VIDEO_TVP5150 is not set
+# CONFIG_VIDEO_TVP7002 is not set
+# CONFIG_VIDEO_VPX3220 is not set
+
+#
+# Video and audio decoders
+#
+# CONFIG_VIDEO_SAA717X is not set
+# CONFIG_VIDEO_CX25840 is not set
+
+#
+# MPEG video encoders
+#
+# CONFIG_VIDEO_CX2341X is not set
+
+#
+# Video encoders
+#
+# CONFIG_VIDEO_SAA7127 is not set
+# CONFIG_VIDEO_SAA7185 is not set
+# CONFIG_VIDEO_ADV7170 is not set
+# CONFIG_VIDEO_ADV7175 is not set
+# CONFIG_VIDEO_ADV7343 is not set
+# CONFIG_VIDEO_AK881X is not set
+
+#
+# Camera sensor devices
+#
+# CONFIG_VIDEO_OV7670 is not set
+# CONFIG_VIDEO_MT9V011 is not set
+# CONFIG_VIDEO_TCM825X is not set
+
+#
+# Video improvement chips
+#
+# CONFIG_VIDEO_UPD64031A is not set
+# CONFIG_VIDEO_UPD64083 is not set
+
+#
+# Miscelaneous helper chips
+#
+# CONFIG_VIDEO_THS7303 is not set
+# CONFIG_VIDEO_M52790 is not set
+# CONFIG_VIDEO_VIVI is not set
+# CONFIG_VIDEO_CPIA2 is not set
+# CONFIG_VIDEO_SR030PC30 is not set
+# CONFIG_VIDEO_NOON010PC30 is not set
+CONFIG_SOC_CAMERA=y
+CONFIG_SOC_CAMERA_LS1C=y
+# CONFIG_SOC_CAMERA_GC0308 is not set
+# CONFIG_SOC_CAMERA_S5K5CA is not set
+CONFIG_SOC_CAMERA_OV9650=y
+# CONFIG_SOC_CAMERA_IMX074 is not set
+# CONFIG_SOC_CAMERA_MT9M001 is not set
+# CONFIG_SOC_CAMERA_MT9M111 is not set
+# CONFIG_SOC_CAMERA_MT9T031 is not set
+# CONFIG_SOC_CAMERA_MT9T112 is not set
+# CONFIG_SOC_CAMERA_MT9V022 is not set
+# CONFIG_SOC_CAMERA_RJ54N1 is not set
+# CONFIG_SOC_CAMERA_TW9910 is not set
+# CONFIG_SOC_CAMERA_PLATFORM is not set
+# CONFIG_SOC_CAMERA_OV2640 is not set
+# CONFIG_SOC_CAMERA_OV6650 is not set
+# CONFIG_SOC_CAMERA_OV772X is not set
+# CONFIG_SOC_CAMERA_OV9640 is not set
+# CONFIG_SOC_CAMERA_OV9740 is not set
+CONFIG_V4L_USB_DRIVERS=y
+# CONFIG_USB_VIDEO_CLASS is not set
+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
+CONFIG_USB_GSPCA=m
+# CONFIG_USB_M5602 is not set
+# CONFIG_USB_STV06XX is not set
+# CONFIG_USB_GL860 is not set
+# CONFIG_USB_GSPCA_BENQ is not set
+# CONFIG_USB_GSPCA_CONEX is not set
+# CONFIG_USB_GSPCA_CPIA1 is not set
+# CONFIG_USB_GSPCA_ETOMS is not set
+# CONFIG_USB_GSPCA_FINEPIX is not set
+# CONFIG_USB_GSPCA_JEILINJ is not set
+# CONFIG_USB_GSPCA_KINECT is not set
+# CONFIG_USB_GSPCA_KONICA is not set
+# CONFIG_USB_GSPCA_MARS is not set
+# CONFIG_USB_GSPCA_MR97310A is not set
+# CONFIG_USB_GSPCA_NW80X is not set
+# CONFIG_USB_GSPCA_OV519 is not set
+# CONFIG_USB_GSPCA_OV534 is not set
+# CONFIG_USB_GSPCA_OV534_9 is not set
+# CONFIG_USB_GSPCA_PAC207 is not set
+# CONFIG_USB_GSPCA_PAC7302 is not set
+# CONFIG_USB_GSPCA_PAC7311 is not set
+# CONFIG_USB_GSPCA_SN9C2028 is not set
+# CONFIG_USB_GSPCA_SN9C20X is not set
+# CONFIG_USB_GSPCA_SONIXB is not set
+# CONFIG_USB_GSPCA_SONIXJ is not set
+# CONFIG_USB_GSPCA_SPCA500 is not set
+# CONFIG_USB_GSPCA_SPCA501 is not set
+# CONFIG_USB_GSPCA_SPCA505 is not set
+# CONFIG_USB_GSPCA_SPCA506 is not set
+# CONFIG_USB_GSPCA_SPCA508 is not set
+# CONFIG_USB_GSPCA_SPCA561 is not set
+# CONFIG_USB_GSPCA_SPCA1528 is not set
+# CONFIG_USB_GSPCA_SQ905 is not set
+# CONFIG_USB_GSPCA_SQ905C is not set
+# CONFIG_USB_GSPCA_SQ930X is not set
+# CONFIG_USB_GSPCA_STK014 is not set
+# CONFIG_USB_GSPCA_STV0680 is not set
+# CONFIG_USB_GSPCA_SUNPLUS is not set
+# CONFIG_USB_GSPCA_T613 is not set
+# CONFIG_USB_GSPCA_TV8532 is not set
+# CONFIG_USB_GSPCA_VC032X is not set
+# CONFIG_USB_GSPCA_VICAM is not set
+# CONFIG_USB_GSPCA_XIRLINK_CIT is not set
+# CONFIG_USB_GSPCA_ZC3XX is not set
+# CONFIG_VIDEO_PVRUSB2 is not set
+# CONFIG_VIDEO_HDPVR is not set
+# CONFIG_VIDEO_EM28XX is not set
+# CONFIG_VIDEO_CX231XX is not set
+# CONFIG_VIDEO_USBVISION is not set
+# CONFIG_USB_ET61X251 is not set
+# CONFIG_USB_SN9C102 is not set
+# CONFIG_USB_PWC is not set
+# CONFIG_USB_ZR364XX is not set
+# CONFIG_USB_STKWEBCAM is not set
+# CONFIG_USB_S2255 is not set
+# CONFIG_VIDEO_GC0308 is not set
+# CONFIG_V4L_MEM2MEM_DRIVERS is not set
+CONFIG_RADIO_ADAPTERS=y
+# CONFIG_I2C_SI4713 is not set
+# CONFIG_RADIO_SI4713 is not set
+# CONFIG_USB_DSBR is not set
+# CONFIG_RADIO_SI470X is not set
+# CONFIG_USB_MR800 is not set
+# CONFIG_RADIO_TEA5764 is not set
+# CONFIG_RADIO_SAA7706H is not set
+# CONFIG_RADIO_TEF6862 is not set
+# CONFIG_RADIO_WL1273 is not set
+
+#
+# Texas Instruments WL128x FM driver (ST based)
+#
+
+#
+# Graphics support
+#
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_WMT_GE_ROPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_SSD1305 is not set
+# CONFIG_FB_ST7565 is not set
+# CONFIG_FB_ST7920 is not set
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_LOONGSON1=y
+CONFIG_LS1X_FB0=y
+# CONFIG_FB_LS1X_I2C is not set
+# CONFIG_FB_UDL is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_BROADSHEET is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+CONFIG_SOUND=y
+# CONFIG_SOUND_OSS_CORE is not set
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+CONFIG_SND_JACK=y
+# CONFIG_SND_SEQUENCER is not set
+# CONFIG_SND_MIXER_OSS is not set
+# CONFIG_SND_PCM_OSS is not set
+# CONFIG_SND_HRTIMER is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+CONFIG_SND_VMASTER=y
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
+CONFIG_SND_AC97_CODEC=y
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_ALOOP is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+# CONFIG_SND_AC97_POWER_SAVE is not set
+CONFIG_SND_SPI=y
+CONFIG_SND_MIPS=y
+CONFIG_SND_LS1A_LIB=y
+CONFIG_SND_LS1A_LIB_AC97=y
+CONFIG_SND_USB=y
+# CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_UA101 is not set
+# CONFIG_SND_USB_CAIAQ is not set
+# CONFIG_SND_USB_6FIRE is not set
+CONFIG_SND_SOC=y
+# CONFIG_SND_SOC_CACHE_LZO is not set
+CONFIG_SND_SOC_AC97_BUS=y
+CONFIG_SND_LS1A_SOC=y
+CONFIG_SND_LS1A_SOC_AC97=y
+CONFIG_SND_LS1A=y
+CONFIG_SND_SOC_I2C_AND_SPI=y
+# CONFIG_SND_SOC_ALL_CODECS is not set
+CONFIG_SND_SOC_AC97_CODEC=y
+# CONFIG_SOUND_PRIME is not set
+CONFIG_AC97_BUS=y
+# CONFIG_HID_SUPPORT is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+CONFIG_USB_OTG=y
+CONFIG_USB_OTG_WHITELIST=y
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
+CONFIG_USB_EHCI_TT_NEWSCHED=y
+CONFIG_USB_EHCI_HCD_LS1X=y
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_LS1X=y
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_OHCI_HCD_PLATFORM is not set
+# CONFIG_USB_EHCI_HCD_PLATFORM is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_REALTEK is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_STORAGE_ENE_UB6250 is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_YUREX is not set
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+CONFIG_USB_GADGET_SNPS_DWC_OTG=y
+# CONFIG_USB_GADGET_FUSB300 is not set
+# CONFIG_USB_GADGET_R8A66597 is not set
+# CONFIG_USB_GADGET_PXA_U2O is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_USB_DWC_OTG_LPM=y
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_AUDIO is not set
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+# CONFIG_USB_ETH_EEM is not set
+# CONFIG_USB_G_NCM is not set
+CONFIG_USB_GADGETFS=m
+# CONFIG_USB_FUNCTIONFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+CONFIG_USB_MASS_STORAGE=m
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_USB_G_MULTI is not set
+# CONFIG_USB_G_HID is not set
+# CONFIG_USB_G_DBGP is not set
+# CONFIG_USB_G_WEBCAM is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+# CONFIG_MMC_CLKGATE is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_MINORS=8
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_SPI is not set
+CONFIG_MMC_LS1C=y
+# CONFIG_MMC_VUB300 is not set
+# CONFIG_MMC_USHC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_NFC_DEVICES is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_DS3232 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_ISL12022 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+CONFIG_RTC_DRV_RX8025=y
+# CONFIG_RTC_DRV_EM3027 is not set
+# CONFIG_RTC_DRV_RV3029C2 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T93 is not set
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_LOONGSON1 is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_DEFAULTS_TO_ORDERED=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_EXPORTFS=y
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_FANOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_QUOTACTL is not set
+CONFIG_AUTOFS4_FS=y
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=936
+CONFIG_FAT_DEFAULT_IOCHARSET="cp936"
+CONFIG_NTFS_FS=y
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_TMPFS_XATTR=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_CONFIGFS_FS=y
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_YAFFS_FS=y
+CONFIG_YAFFS_YAFFS1=y
+# CONFIG_YAFFS_9BYTE_TAGS is not set
+# CONFIG_YAFFS_DOES_ECC is not set
+CONFIG_YAFFS_YAFFS2=y
+CONFIG_YAFFS_AUTO_YAFFS2=y
+CONFIG_YAFFS_DISABLE_TAGS_ECC=y
+# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
+# CONFIG_YAFFS_EMPTY_LOST_AND_FOUND is not set
+# CONFIG_YAFFS_DISABLE_BLOCK_REFRESHING is not set
+# CONFIG_YAFFS_DISABLE_BACKGROUND is not set
+CONFIG_YAFFS_XATTR=y
+# CONFIG_JFFS2_FS is not set
+# CONFIG_LOGFS is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_MINIX_FS_NATIVE_ENDIAN is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_PSTORE is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_V4_1=y
+CONFIG_PNFS_FILE_LAYOUT=y
+CONFIG_ROOT_NFS=y
+CONFIG_NFS_USE_LEGACY_DNS=y
+CONFIG_NFSD=y
+CONFIG_NFSD_DEPRECATED=y
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_V4 is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+# CONFIG_CEPH_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="cp936"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+CONFIG_NLS_CODEPAGE_936=y
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_SECTION_MISMATCH is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+# CONFIG_LOCKUP_DETECTOR is not set
+# CONFIG_HARDLOCKUP_DETECTOR is not set
+# CONFIG_DETECT_HUNG_TASK is not set
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_SPARSE_RCU_POINTER is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_INFO_REDUCED is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_TEST_LIST_SORT is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
+# CONFIG_ATOMIC64_SELFTEST is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_TEST_KSTRTOX is not set
+CONFIG_EARLY_PRINTK=y
+# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_RUNTIME_DEBUG is not set
+# CONFIG_DEBUG_ZBOOT is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY_DMESG_RESTRICT is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_PCOMP2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=y
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_SHA256=y
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_ZLIB=y
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_USER_API_HASH is not set
+# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_VIRTUALIZATION is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC_ITU_T=y
+CONFIG_CRC32=y
+CONFIG_CRC7=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+# CONFIG_XZ_DEC is not set
+# CONFIG_XZ_DEC_BCJ is not set
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_AVERAGE=y
diff -uNra linux-3.0.82/drivers/char/bobodog_io_control.c linux-3.0.82x/drivers/char/bobodog_io_control.c
--- linux-3.0.82/drivers/char/bobodog_io_control.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/char/bobodog_io_control.c	2017-09-23 03:42:49.414676909 +0800
@@ -0,0 +1,163 @@
+#include <linux/fs.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/cdev.h>
+#include <linux/io.h>
+#include <linux/errno.h>
+#include <linux/platform_device.h>
+#include <linux/miscdevice.h> 
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <asm/gpio.h>
+
+#define DEVNAME "bobodog_gpio"
+#define BOBODOG_MINOR 0	
+
+static int major;
+
+static struct gpio_keys_platform_data *pkb = NULL; 
+
+//#define DEBUG_BOBODOG
+#ifdef DEBUG_BOBODOG
+static int bobodog_write(struct file *filp, const char __user *buffer,
+				size_t count, loff_t *ppos)
+{
+	char code[2];
+	int port,value;
+	copy_from_user(code, buffer, (count < 2)?count:2);
+
+	value = code[0] - '0';
+printk("before\n");
+printk("value: %d\n", value);
+	if (value >= pkb->nbuttons)
+		return -ENOMEM;
+	port = pkb->buttons[value].gpio;
+	value = code[1] - '0';
+
+printk("port: %d\n", port);
+printk("value: %d\n", value);
+	gpio_set_value_cansleep(port, value);
+
+	return count;	
+}
+#else 
+static int bobodog_write(struct file *filp, const char __user *buffer,
+				size_t count, loff_t *ppos)
+{
+	char code[2];
+	int ledth;
+	int value;
+	int port;
+	copy_from_user(code, buffer, (count < 2)?count:2);
+	ledth = code[0];
+	value = code[1];
+
+	if(ledth >= pkb->nbuttons)
+		return -ENOMEM;
+
+	if (pkb->buttons[ledth].type != EV_LED)
+	{
+		printk ("%s, error KEY type !\n", __FUNCTION__);
+		return -EAGAIN;
+	}
+
+	port = pkb->buttons[ledth].gpio;
+
+	gpio_set_value_cansleep(port, value);
+
+	return count;	
+}
+#endif
+
+static int bobodog_read(struct file *filp, const char __user *buffer, size_t count, loff_t *ppos)
+{
+	char port;
+	int val;
+	get_user (port, buffer); 
+
+	if (port >= pkb->nbuttons)
+	{
+		printk ("%s, pin's number overflow !\n", __FUNCTION__);
+		return -ENOMEM;
+	}
+
+	if (pkb->buttons[port].type != EV_KEY)
+	{
+		printk ("%s, error KEY type !\n", __FUNCTION__);
+		return -EAGAIN;
+	}
+
+	port = pkb->buttons[port].gpio;
+
+	val = gpio_get_value_cansleep(port);
+	if (put_user(val ? 1 : 0, &buffer[1]))
+		return -EFAULT;
+
+	return 1;
+}
+
+static int __devinit bobodog_gpio_probe(struct platform_device *pdev)
+{
+	struct gpio_keys_platform_data *pdata = pdev->dev.platform_data;
+	int i;
+
+	pkb = pdata;
+	for(i = 0;i < pkb->nbuttons;i++) {
+		gpio_request(pkb->buttons[i].gpio,"bobodog_gpio");
+		if (pkb->buttons[i].type == EV_LED)
+			gpio_direction_output(pkb->buttons[i].gpio, 0);
+		else if (pkb->buttons[i].type == EV_KEY)
+			gpio_direction_input(pkb->buttons[i].gpio);
+	}
+
+	return 0;
+}
+
+static const struct file_operations bobodog_fops = {
+	.owner		= THIS_MODULE,
+	.write		= bobodog_write,
+	.read		= bobodog_read,
+};
+
+static struct miscdevice bobodog_misc_device = {
+	BOBODOG_MINOR,
+	"bobodog_io_control",
+	&bobodog_fops,
+};
+
+struct platform_driver bobodog_device_driver = {
+	.probe		= bobodog_gpio_probe,
+	.driver		= {
+		.name 	= "bobodog_io_control",
+	}
+};
+
+static int __init bobodog_init(void)
+{
+	if(misc_register(&bobodog_misc_device)){
+		printk(KERN_WARNING "bobodog:Couldn't register device %d.\n", BOBODOG_MINOR);
+		return -EBUSY;
+	}
+
+	return platform_driver_register(&bobodog_device_driver);
+}
+
+static void __exit bobodog_exit(void)
+{
+	int i;
+	misc_deregister(&bobodog_misc_device);
+	for(i = 0;i < pkb->nbuttons;i++){
+		gpio_free(pkb->buttons[i].gpio);
+	}
+}
+
+module_init(bobodog_init);
+module_exit(bobodog_exit);
+
+
+module_param(major, int, 0);
+MODULE_AUTHOR("xuhongmeng");
+MODULE_DESCRIPTION("bobodog io control");
+MODULE_LICENSE("GPL");
+
diff -uNra linux-3.0.82/drivers/char/bobodog-test.c linux-3.0.82x/drivers/char/bobodog-test.c
--- linux-3.0.82/drivers/char/bobodog-test.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/char/bobodog-test.c	2017-09-23 03:42:49.418676897 +0800
@@ -0,0 +1,42 @@
+#include <stdio.h>
+#include <sys/types.h>
+#include <fcntl.h>
+
+int main(int argc, char *argv[])
+{
+	int fd;
+	char buf[2];
+	fd = open ("/dev/bobodog_io_control", O_RDWR);
+	if (fd == -1)
+	{
+		printf ("open /dev/bobodog_io_control fail, fd = %d !\n", fd);
+		exit(-1);
+	}
+
+#if 0
+	buf[0] = 0;
+	while(1)
+	{
+		buf[1] = 0;
+		write(fd, buf, sizeof(buf));
+		sleep(3);
+		buf[1] = 1;
+		write(fd, buf, sizeof(buf));
+		sleep(3);
+	}
+#else
+
+	buf[0] = 1;
+	buf[1] = 0;
+	write(fd, buf, sizeof(buf));
+	sleep(3);
+	buf[1] = 1;
+	write(fd, buf, sizeof(buf));
+	sleep(3);
+
+	buf[0] = 0;
+	read (fd, buf, sizeof(buf));
+	printf ("gpio's val = %d !\n", buf[1]);
+#endif
+	close(fd);
+}
diff -uNra linux-3.0.82/drivers/char/buzzer.c linux-3.0.82x/drivers/char/buzzer.c
--- linux-3.0.82/drivers/char/buzzer.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/char/buzzer.c	2017-09-23 03:42:49.418676897 +0800
@@ -0,0 +1,101 @@
+#include <linux/fs.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/cdev.h>
+#include <linux/io.h>
+#include <linux/errno.h>
+#include <linux/platform_device.h>
+#include <linux/miscdevice.h> 
+#include <linux/gpio_keys.h>
+#include <asm/gpio.h>
+
+#define DEVNAME "buzzer_gpio"
+
+#define BUZZER_MINOR	123
+
+MODULE_AUTHOR("liangqx <liangqingxin-gz@loongson.cn>");
+MODULE_DESCRIPTION("Drive the buzzer through the gpio");
+MODULE_LICENSE("GPL");
+
+static int major;
+module_param(major, int, 0);
+
+static struct gpio_keys_platform_data *pkb = NULL; 
+
+
+static int buzzer_set_value(struct file *filp, const char __user *buffer,
+				size_t count, loff_t *ppos)
+{
+	char code[2];
+	int port,value;
+
+	copy_from_user(code, buffer, (count < 2)?count:2);
+
+	value = code[0] - '0';
+
+	if(value >= pkb->nbuttons) return -ENOMEM;
+
+	port = pkb->buttons[value].gpio;
+	value = code[1] - '0';
+	printk("prot is %d, value is %d\n",port,value);
+	gpio_set_value_cansleep(port, value);
+
+	return count;	
+}
+
+static int __devinit buzzer_gpio_probe(struct platform_device *pdev)
+{
+	struct gpio_keys_platform_data *pdata = pdev->dev.platform_data;
+	int i;
+
+	pkb = pdata;
+
+	for(i = 0;i < pkb->nbuttons;i++)
+	{
+		gpio_request(pkb->buttons[i].gpio,"buzzer");
+		gpio_direction_output(pkb->buttons[i].gpio, 0);
+	}
+
+	return 0;
+}
+
+static const struct file_operations buzzer_fops = {
+	.owner		= THIS_MODULE,
+	.write		= buzzer_set_value,
+};
+
+static struct miscdevice buzzer_misc_device = {
+	BUZZER_MINOR,
+	"buzzer_gpio",
+	&buzzer_fops,
+};
+
+struct platform_driver buzzer_device_driver = {
+	.probe		= buzzer_gpio_probe,
+	.driver		= {
+		.name 	= "buzzer_gpio",
+	}
+};
+
+static int __init buzzer_init(void)
+{
+	if(misc_register(&buzzer_misc_device)){
+		printk(KERN_WARNING "buzzer:Couldn't register device 10, %d.\n", BUZZER_MINOR);
+		return -EBUSY;
+	}
+
+	return platform_driver_register(&buzzer_device_driver);
+}
+
+static void __exit buzzer_exit(void)
+{
+	int i;
+	misc_deregister(&buzzer_misc_device);
+	for(i = 0;i < pkb->nbuttons;i++){
+		gpio_free(pkb->buttons[i].gpio);
+	}
+}
+
+module_init(buzzer_init);
+module_exit(buzzer_exit);
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/drivers/char/Kconfig linux-3.0.82x/drivers/char/Kconfig
--- linux-3.0.82/drivers/char/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/char/Kconfig	2017-09-23 03:42:49.418676897 +0800
@@ -188,6 +188,36 @@
 	  the port which can be used by udev scripts to create a
 	  symlink to the device.
 
+config LS1B_BUZZER
+	bool "ls1b bsp buzzer"
+	default	n
+	help
+	  buzzer driver.
+
+config LS1B_PWM_DRIVER
+	bool "ls1b pwm driver"
+	default	n
+	help
+	 pwm.
+
+config LS1B_BBDIO
+	bool "ls1b bobodog IO driver"
+	default	n
+	help
+	  ls1b bobodog IO driver.
+
+config LS1B_IR
+	bool "ls1b ir driver"
+	default	n
+	help
+	  A simple Infrared driver for loongson 1B board.
+
+config LS1B_STEPMOTOR
+	bool	"ls1b stepping motor driver"
+	default	n
+	help
+	  ls1b stepping motor driver for 24BYJ48A.
+
 config IBM_BSR
 	tristate "IBM POWER Barrier Synchronization Register support"
 	depends on PPC_PSERIES
diff -uNra linux-3.0.82/drivers/char/ls1b_ir.c linux-3.0.82x/drivers/char/ls1b_ir.c
--- linux-3.0.82/drivers/char/ls1b_ir.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/char/ls1b_ir.c	2017-09-23 03:42:49.418676897 +0800
@@ -0,0 +1,199 @@
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/miscdevice.h>
+#include <linux/delay.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/fs.h>
+#include <linux/time.h>
+#include <linux/errno.h>
+#include <linux/gpio.h>
+
+#include <ls1b_board.h>
+#include <irq.h>
+
+#define LS1B_DEBUG 0
+
+#define GPIO_IR 61
+
+#define SYSTEMCODE_BIT_NUM 16
+
+#define LS1B_IR_STATE_IDLE					0
+#define LS1B_IR_STATE_RECEIVESTARTCODE		1
+#define LS1B_IR_STATE_RECEIVESYSTEMCODE		2
+#define LS1B_IR_STATE_RECEIVEDATACODE		3
+
+static unsigned int ls1b_ir_irq = 0;
+static unsigned int ls1b_ir_state = LS1B_IR_STATE_IDLE;
+static unsigned int ls1b_ir_interval = 0;
+static unsigned int ls1b_ir_systembit_count = 0;
+static unsigned int ls1b_ir_databit_count = 0;
+static unsigned int ls1b_ir_key_code_tmp = 0;
+static unsigned int ls1b_ir_key_code = 0;
+
+static struct timeval ls1b_ir_current_tv = {0, 0};
+static struct timeval ls1b_ir_last_tv = {0, 0};
+
+DECLARE_WAIT_QUEUE_HEAD(ls1b_wate_queue);
+
+static irqreturn_t ls1b_ir_irq_handler(int i, void *blah)
+{
+//	ls1b_ir_key_code = 0;
+	udelay(50);
+	if (gpio_get_value(GPIO_IR))
+		return IRQ_HANDLED;
+	
+	do_gettimeofday(&ls1b_ir_current_tv);
+	if (ls1b_ir_current_tv.tv_sec == ls1b_ir_last_tv.tv_sec) {
+		ls1b_ir_interval = ls1b_ir_current_tv.tv_usec - ls1b_ir_last_tv.tv_usec;
+	} else {
+		ls1b_ir_interval = 1000000 - ls1b_ir_last_tv.tv_usec + ls1b_ir_current_tv.tv_usec;
+	}
+	ls1b_ir_last_tv = ls1b_ir_current_tv;
+	
+	if (ls1b_ir_interval > 800 && ls1b_ir_interval < 15000) {
+		if (ls1b_ir_interval > 11000) {
+				ls1b_ir_state = LS1B_IR_STATE_RECEIVESTARTCODE;
+				ls1b_ir_key_code_tmp = 0;
+				ls1b_ir_databit_count = 0;
+				ls1b_ir_systembit_count =0;				
+		}
+		else if (ls1b_ir_state == LS1B_IR_STATE_RECEIVESTARTCODE) {
+			if (ls1b_ir_systembit_count >= SYSTEMCODE_BIT_NUM - 1) {
+				ls1b_ir_state = LS1B_IR_STATE_RECEIVESYSTEMCODE;
+				ls1b_ir_systembit_count = 0;
+			}
+			else if ((ls1b_ir_interval > 800 && ls1b_ir_interval < 1300) || (ls1b_ir_interval > 1900 && ls1b_ir_interval < 2400)) {
+				ls1b_ir_systembit_count ++;
+			}
+			else
+				goto receive_errerbit;
+		}
+		else if (ls1b_ir_state == LS1B_IR_STATE_RECEIVESYSTEMCODE) {
+			if (ls1b_ir_databit_count < 8) {
+				if (ls1b_ir_interval > 1900 && ls1b_ir_interval < 2400) {
+					ls1b_ir_key_code_tmp |= (1 << ls1b_ir_databit_count);
+					ls1b_ir_databit_count++;
+				}
+				else if (ls1b_ir_interval > 800 && ls1b_ir_interval < 1300) {
+					ls1b_ir_databit_count++;
+				}
+				else
+					goto receive_errerbit;
+			}
+			else if ((ls1b_ir_interval > 800 && ls1b_ir_interval < 1300) || (ls1b_ir_interval > 1900 && ls1b_ir_interval < 2400)) {
+				ls1b_ir_state = LS1B_IR_STATE_IDLE;
+				ls1b_ir_key_code = ls1b_ir_key_code_tmp;
+				ls1b_ir_key_code_tmp = 0;
+				ls1b_ir_databit_count = 0;
+				ls1b_ir_systembit_count =0;	
+				wake_up_interruptible(&ls1b_wate_queue);
+#ifdef LS1B_DEBUG
+				printk("IR:Receive key code:%d.\n",ls1b_ir_key_code);
+#endif
+			}
+			else
+				goto receive_errerbit;
+		}
+		ls1b_ir_interval = 0;
+		return IRQ_HANDLED;	
+	}
+
+receive_errerbit:
+	ls1b_ir_state = LS1B_IR_STATE_IDLE;
+	ls1b_ir_key_code_tmp = 0;
+	ls1b_ir_databit_count = 0;
+	ls1b_ir_systembit_count =0;
+	ls1b_ir_interval = 0;
+	return IRQ_HANDLED;
+}
+
+static ssize_t ls1b_ir_read(struct file *filp, char __user *buf, size_t count, loff_t *offp)
+{
+	ls1b_ir_key_code = 0;
+
+	if (filp->f_flags & O_NONBLOCK) {
+		return -EAGAIN;
+	}
+
+	wait_event_interruptible(ls1b_wate_queue, ls1b_ir_key_code);
+
+	if (copy_to_user(buf, &ls1b_ir_key_code, sizeof(unsigned int))) {
+		printk("IR:ls1b_ir_read error!\n");
+		return -EFAULT;
+	}
+	return count;
+}
+
+static int ls1b_ir_open(struct inode *inode, struct file *filep)
+{
+	int ret;
+	ret = gpio_request(GPIO_IR, "ls1x_ir");
+	if (ret < 0)
+		return ret;
+	gpio_direction_input(GPIO_IR);
+	ret = request_irq(gpio_to_irq(GPIO_IR), ls1b_ir_irq_handler, IRQF_TRIGGER_FALLING, "ls1b_ir", NULL);
+	if (ret) {
+		printk("IR:ir_irq_handler resigered Error:%d\n", ret);
+		return ret;
+	}
+	return 0;
+}
+
+static int ls1b_ir_close(struct inode *inode, struct file *filp)
+{
+	free_irq(gpio_to_irq(GPIO_IR), NULL);
+	gpio_free(GPIO_IR);
+	return 0;
+}
+
+static const struct file_operations ls1b_ir_ops = {
+	.owner = THIS_MODULE,
+	.open = ls1b_ir_open,
+	.release = ls1b_ir_close,
+	.read = ls1b_ir_read,
+};
+
+static struct miscdevice ls1b_ir_miscdev = {
+	MISC_DYNAMIC_MINOR,
+	"ls1b_ir",
+	&ls1b_ir_ops,
+};
+
+static int __devinit ls1b_ir_probe(struct platform_device *pdev)
+{
+	return 0;
+}
+
+static struct platform_driver ls1b_ir_driver = {
+	.probe = ls1b_ir_probe,
+	.driver = {
+		.name = "ls1b_ir",
+	},
+};
+
+static int __init ls1b_ir_init(void)
+{
+	if (misc_register(&ls1b_ir_miscdev)) {
+		printk(KERN_WARNING "IR: Couldn't register device!\n ");
+		return -EBUSY;
+	}
+
+	return platform_driver_register(&ls1b_ir_driver);
+}
+
+static void __exit ls1b_ir_exit(void)
+{
+	free_irq(ls1b_ir_irq,NULL);
+	misc_deregister(&ls1b_ir_miscdev);
+	platform_driver_unregister(&ls1b_ir_driver);	
+}
+//module_init(ls1b_ir_init);
+//module_exit(ls1b_ir_exit);
+
+MODULE_AUTHOR("zhuangweilin-gz@loongson.cn");
+MODULE_DESCRIPTION("Infrared remote receiver driver for the ls1b.");
+MODULE_LICENSE("GPL");
+
+__initcall(ls1b_ir_init);
diff -uNra linux-3.0.82/drivers/char/ls1b-pwm.c linux-3.0.82x/drivers/char/ls1b-pwm.c
--- linux-3.0.82/drivers/char/ls1b-pwm.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/char/ls1b-pwm.c	2017-09-23 03:42:49.418676897 +0800
@@ -0,0 +1,202 @@
+#include <linux/miscdevice.h>
+#include <linux/errno.h>
+#include <linux/fs.h>
+#include <asm/io.h>
+#include <asm/uaccess.h>
+#include <asm/ioctl.h>
+#include <linux/platform_device.h>
+#include <linux/timer.h>
+
+#define CMD_PWM_GET     _IO('c',0x01)
+#define CMD_PWM_START   _IO('c',0x02)
+#define CMD_PWM_STOP    _IO('c',0x03)
+
+#define REG_PWM_CNTR	0x00
+#define REG_PWM_HRC	0x04
+#define REG_PWM_LRC	0x08
+#define REG_PWM_CTRL	0x0c
+#define REG_GPIO_CFG0	0xbfd010c0
+#define SB2F_GPIO_MUX_CTRL1 0xbfd00424
+
+static unsigned char __iomem *pwm_base = NULL;
+struct resource *res;
+static int ls1f_pwm_probe(struct platform_device *pdev);
+struct platform_device *pwm_dev;
+struct resource *res1 = NULL;
+
+static int ls1f_pwm_getResourse(struct platform_device *pdev, unsigned int index);
+
+static struct platform_driver ls1f_pwm_driver = {
+	.probe = ls1f_pwm_probe,
+	.driver = {
+			.name = "ls1b-pwm",
+	},
+};
+
+static int ls1f_pwm_open(struct inode *inode, struct file *file) 
+{
+
+	long val = readl(SB2F_GPIO_MUX_CTRL1);
+	val &= 0xfffffffc;
+	writel(val, SB2F_GPIO_MUX_CTRL1);
+
+	val = readl(REG_GPIO_CFG0);
+
+	//é…�ç½®GPIOå¤�ç”¨ä¸ºä½¿ç”¨PWMå·¥ä½œçš„æ¨¡å¼�
+	val &= 0xfffffff0;
+	writel(val, REG_GPIO_CFG0);
+
+	return 0;
+}
+
+static int ls1f_pwm_close(struct inode *inode, struct file *file)
+{
+	writeb(0x0, pwm_base + REG_PWM_CTRL);
+	return 0;
+}
+
+static ssize_t ls1f_pwm_read(struct file *file, char __user *buf, size_t count, loff_t *ptr)
+{
+	unsigned int pwm_val;
+	pwm_val = readl(pwm_base);
+
+	if (copy_to_user(buf, &pwm_val, sizeof(unsigned int)))
+		return -EFAULT;
+	return 4;
+}
+
+static ssize_t ls1f_pwm_write(struct file *file, const char __user *buf, size_t count, loff_t *ptr)
+{
+	unsigned int hrc_val, lrc_val;
+	unsigned int data[2] = {0x0};
+
+	if (copy_from_user(data, buf, sizeof(data)))
+	{
+		printk("Write error!\n");
+		return -EIO;
+	}
+
+	hrc_val = data[1] - 1;
+	lrc_val = data[0] + data[1] -1;
+
+	//è®¾ç½®å� ç©ºæ¯”
+	writel(hrc_val, pwm_base + REG_PWM_HRC);
+	writel(lrc_val, pwm_base + REG_PWM_LRC);
+	return 0;
+}
+
+static int pwm_start_stop(unsigned int cmd, unsigned long arg)
+{
+	printk("into: %s\n", __FUNCTION__);
+	printk("arg: %ld\n", arg);
+
+	if (arg > 3)
+		return -1;
+	ls1f_pwm_getResourse(pwm_dev, arg);
+	switch (cmd) {
+	case CMD_PWM_START:
+		writel(0x0, pwm_base + REG_PWM_CNTR);
+		writeb(0x01, pwm_base + REG_PWM_CTRL);
+		break;
+	case CMD_PWM_STOP:
+		printk("CMD_PWM_STOP\n");
+		writeb(0x0, pwm_base + REG_PWM_CTRL);
+		break;
+	}
+	return 0;
+}
+
+static long ls1f_pwm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+	printk("into %s\n", __FUNCTION__);
+	printk("cmd: %d\n", cmd);
+	printk("arg: %ld\n", arg);
+
+	if (arg > 3)
+		return -1;
+
+	switch (cmd) {
+	case CMD_PWM_GET:
+		ls1f_pwm_getResourse(pwm_dev, arg);
+		break;
+	case CMD_PWM_START:
+	case CMD_PWM_STOP:
+		return pwm_start_stop(cmd, arg);
+	default:
+		break;
+	}
+	return 0;
+}
+
+
+static const struct file_operations ls1f_pwm_ops = {
+		.owner = THIS_MODULE,
+		.open = ls1f_pwm_open,
+		.release = ls1f_pwm_close,
+		.read = ls1f_pwm_read,
+		.write = ls1f_pwm_write,
+		.unlocked_ioctl = ls1f_pwm_ioctl,
+};
+
+static struct miscdevice ls1f_pwm_miscdev = {
+		MISC_DYNAMIC_MINOR,
+		"ls1f-pwm",
+		&ls1f_pwm_ops,
+};
+
+static int ls1f_pwm_getResourse(struct platform_device *pdev, unsigned int index)
+{
+	res = platform_get_resource(pdev, IORESOURCE_MEM, index);
+
+	if (res == NULL)
+	{
+	  printk("Fail to get ls1f_pwm_resource!\n");
+	  return -ENOENT;
+	}
+	printk("Resource start=0x%x, end = 0x%x\n", res->start, res->end);
+	if (res1 != NULL)
+	{
+		release_mem_region(res->start, 0x0f);
+	}
+	res1 = request_mem_region(res->start, 0x0f, "ls1f-pwm");
+	if (res1 == NULL)
+	{
+	  printk("Fail to request ls1f_pwm region!\n");
+	  return -ENOENT;
+	}
+	pwm_base = ioremap(res->start, res->end - res->start + 1);
+	if (pwm_base == NULL)
+	{
+	  printk("Fail to ioremap ls1f_pwm resource!\n");
+	  return -EINVAL;
+	}
+	return 0;
+}
+
+static int __devinit ls1f_pwm_probe(struct platform_device *pdev)
+{
+	pwm_dev = pdev;
+	return ls1f_pwm_getResourse(pdev, 1);
+}
+
+static int __init ls1f_pwm_init(void) {
+	if (misc_register(&ls1f_pwm_miscdev))
+	{
+	  printk(KERN_WARNING "pwm: Couldn't register device 10, %d.\n", 255);
+	  return -EBUSY;
+	}
+	return platform_driver_register(&ls1f_pwm_driver);
+}
+
+static void __exit ls1f_pwm_exit(void)
+{
+	misc_deregister(&ls1f_pwm_miscdev);
+	release_mem_region(res->start, 0x20);
+	platform_driver_unregister(&ls1f_pwm_driver);	
+}
+
+module_init(ls1f_pwm_init);
+module_exit(ls1f_pwm_exit);
+MODULE_AUTHOR("<xuhongmeng xuhongmeng-gz@loongson.cn>");
+MODULE_DESCRIPTION("loongson 1B PWM driver");
+MODULE_LICENSE("GPL");
diff -uNra linux-3.0.82/drivers/char/Makefile linux-3.0.82x/drivers/char/Makefile
--- linux-3.0.82/drivers/char/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/char/Makefile	2017-09-23 03:42:49.418676897 +0800
@@ -19,6 +19,11 @@
 obj-$(CONFIG_BRIQ_PANEL)	+= briq_panel.o
 obj-$(CONFIG_BFIN_OTP)		+= bfin-otp.o
 
+obj-$(CONFIG_LS1B_PWM_DRIVER)	+= ls1b-pwm.o
+obj-$(CONFIG_LS1B_BBDIO)		+= bobodog_io_control.o
+obj-$(CONFIG_LS1B_IR)        	+= ls1b_ir.o
+obj-$(CONFIG_LS1B_STEPMOTOR)    += stepping_motor.o
+obj-$(CONFIG_LS1B_BUZZER)		+= buzzer.o
 obj-$(CONFIG_PRINTER)		+= lp.o
 
 obj-$(CONFIG_APM_EMULATION)	+= apm-emulation.o
diff -uNra linux-3.0.82/drivers/char/stepmotor_app.c linux-3.0.82x/drivers/char/stepmotor_app.c
--- linux-3.0.82/drivers/char/stepmotor_app.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/char/stepmotor_app.c	2017-09-23 03:42:49.418676897 +0800
@@ -0,0 +1,92 @@
+
+/*
+ * Copyright (C) 2012 Loongson Guangzhou inc.
+ * All rights reserved.
+ *
+ * motor.c
+ * Original Author: nizhiquan(nizhiquan-gz@loongson.cn), 2012-05-29
+ *
+ * Description:
+ *
+ * Stepping motor application for 24BYJ48A 
+ *
+ * History:
+ *	V1.0 nizhiquan(nizhiquan-gz@loongson.cn), 2012-05-29
+ *
+ */
+#include <stdio.h>
+#include <errno.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <unistd.h>
+
+#include "stepmotor.h"
+
+#ifndef u32
+typedef unsigned int u32;
+#endif
+
+#define DEV_PATH	"/dev/stepmotor"
+
+#define dp //printf
+
+static void dump_ctrl(motor_ctrl_t *ctrl)
+{
+	dp("\n");
+	dp("times = %d\n", ctrl->times);
+	dp("tick = %d\n", ctrl->tick);
+	dp("flags = %d\n", ctrl->flags);
+	dp("dir0 = %d, dir1 = %d\n", ctrl->dir[0], ctrl->dir[1]);
+	dp("\n");
+}
+
+int main(int argc, char **argv)
+{
+	int fd;
+	int ret;
+	motor_ctrl_t motor_ctrl;
+
+	if (argc < 5) {
+		printf("Please use motor times speed flags dir0/dir2.\n");
+		//printf("Please use motor no dir times tick\n");
+		return -1;
+	}
+	
+	motor_ctrl.times = strtol(argv[1], NULL, 10);
+	motor_ctrl.tick = strtol(argv[2], NULL, 10);
+	motor_ctrl.flags = strtol(argv[3], NULL, 10);
+	
+	if (motor_ctrl.flags == MOTOR_MAX_FLAGS) {
+		motor_ctrl.dir[0] = strtol(argv[4], NULL, 10);
+		if (argc == 6) {
+			motor_ctrl.dir[1] = strtol(argv[5], NULL, 10);
+		}
+	} else if (motor_ctrl.flags == MOTOR_NO0) {
+		motor_ctrl.dir[0] = strtol(argv[4], NULL, 10);
+	} else if (motor_ctrl.flags == MOTOR_NO1) {
+		motor_ctrl.dir[1] = strtol(argv[4], NULL, 10);
+	} else {
+		printf("flags is invalid.\n");
+		return -1;
+	}
+
+	dump_ctrl(&motor_ctrl);
+
+	fd = open(DEV_PATH,O_RDWR);
+	if (fd < 0) {
+		printf("!Un...\n");
+		return -1;
+	}
+
+	ret = write(fd, &motor_ctrl, sizeof(motor_ctrl));
+
+	printf("Motor0 pos at %d.", motor_ctrl.pos[0]);	
+	printf("Motor1 pos at %d.", motor_ctrl.pos[1]);	
+exit:
+	close(fd);
+	
+	return ret;
+}
+
+
diff -uNra linux-3.0.82/drivers/char/stepmotor.h linux-3.0.82x/drivers/char/stepmotor.h
--- linux-3.0.82/drivers/char/stepmotor.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/char/stepmotor.h	2017-09-23 03:42:49.418676897 +0800
@@ -0,0 +1,58 @@
+
+#ifndef __STEPMOTOR_H__
+#define __STEPMOTOR_H__
+
+/*
+ * Copyright (C) 2012 Loongson Guangzhou inc.
+ * All rights reserved.
+ *
+ * stepmotor.h
+ * Original Author: nizhiquan(nizhiquan-gz@loongson.cn), 2012-05-29
+ *
+ * Description:
+ *
+ * Stepping motor header for 24BYJ48A 
+ *
+ * History:
+ *	V1.0 nizhiquan(nizhiquan-gz@loongson.cn), 2012-05-29
+ *
+ */
+
+/* é©±åŠ¨ç”µæœºçš„æ•°é‡� */
+#define MAX_MOTOR_NO	2
+/* ç”µæœºæœ€å¿«è½¬é€Ÿ */
+#define MIN_TICK	1
+
+#define MOTOR_NO0	(1 << 0)
+#define MOTOR_NO1	(1 << 1)
+#define MOTOR_MAX_FLAGS	(MOTOR_NO0 | MOTOR_NO1)
+
+enum motor_dir_t {
+	dir_cw = 0,	/* é¡ºæ—¶é’ˆ */
+	dir_ccw		/* é€†æ—¶é’ˆ */
+};
+
+/* 
+ * ç”µæœºçš„ä½�ç½®ï¼Œåˆ¤æ–­æ˜¯å�¦åœ¨åˆ°åº•éƒ¨
+ * pos_cw_end  ï¼šé¡ºæ—¶é’ˆåº•éƒ¨
+ * pos_ccw_end ï¼šé€†æ—¶é’ˆåº•éƒ¨
+ * åˆ°è¾¾æŸ�ä¸€æ–¹å�‘åº•éƒ¨ä»¥å�Žé©±åŠ¨ä¸�å†�é©±åŠ¨ç”µæœºç»§ç»­è½¬åŠ¨
+ * åº”ç”¨ç¨‹åº�å�¯ä»¥åˆ©ç”¨è¿™ä¸ªçŠ¶æ€�åˆ¤æ–­ç”µæœºä½�ç½®
+ */
+enum motor_pos_t{
+	pos_not_end = 0,
+	pos_cw_end,
+	pos_ccw_end
+};
+
+
+typedef struct motor_ctrl_t {
+	enum motor_pos_t pos[MAX_MOTOR_NO];
+	enum motor_dir_t dir[MAX_MOTOR_NO];
+	int flags;	/* bit0æ˜¯ç¬¬ä¸€ç”µæœºå¼€å…³ï¼Œbit1æ˜¯ç¬¬äºŒä¸ªç”µæœºå¼€å…³ */
+	int times;	/* é½¿è½®è½¬åŠ¨åœˆæ•°ï¼Œç›®å‰�æµ‹è¯•ä¸€åœˆçº¦2åº¦ */
+	int tick;	/* æŽ§åˆ¶ç”µæœºè½¬é€Ÿ,4-æœ€å¿«ï¼Œ8-æ­£å¸¸ */
+}motor_ctrl_t;
+
+#endif	/* __STEPMOTOR_H__*/
+
diff -uNra linux-3.0.82/drivers/char/stepping_motor.c linux-3.0.82x/drivers/char/stepping_motor.c
--- linux-3.0.82/drivers/char/stepping_motor.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/char/stepping_motor.c	2017-09-23 03:42:49.418676897 +0800
@@ -0,0 +1,359 @@
+
+/*
+ * Copyright (C) 2012 Loongson Guangzhou inc.
+ * All rights reserved.
+ *
+ * driver/char/stepping_motor.c
+ * Original Author: nizhiquan(nizhiquan-gz@loongson.cn), 2012-05-29
+ *
+ * Description:
+ *
+ * Stepping motor driver for 24BYJ48A 
+ *
+ * History:
+ *	V1.0 nizhiquan(nizhiquan-gz@loongson.cn), 2012-05-29
+ *
+ */
+
+#include <linux/fs.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/cdev.h>
+#include <linux/io.h>
+#include <linux/errno.h>
+#include <linux/platform_device.h>
+#include <linux/miscdevice.h> 
+#include <linux/delay.h>
+#include <asm/addrspace.h>
+
+#include "stepmotor.h"
+
+#define DEVNAME "stepmotor"
+#define STEPMOTOR_MINOR	1	
+
+#define STEPMOTOR_DEBUG	1
+
+#ifdef STEPMOTOR_DEBUG		
+#define dp(x...)	printk(x)
+#else
+#define dp(x...)
+#endif
+
+#define GPIO_EN0	0x1fd010c0
+#define GPIO_DIR0	0x1fd010d0
+#define GPIO_IN0	0x1fd010e0
+#define GPIO_OUT0	0x1fd010f0
+
+#define KSEG1_ADDR(x) ((x)|0xa0000000)
+
+#define REGWRITE(x, v)  (*(volatile u32 *)KSEG1_ADDR(x) = (u32)(v))                                                                                                  
+#define REGREAD(x)      (*(volatile u32 *)KSEG1_ADDR(x))
+
+
+#define here dp("\n\t%s - %s - %dline.\n", __FILE__, __func__, __LINE__);
+//#define motor(phase)	REGWRITE(GPIO_OUT0, ((REGREAD(GPIO_OUT0) & (~0x00000f00))) | (phase))
+
+static void motor0_do_phase(u32 phase);
+static void motor1_do_phase(u32 phase);
+
+/* stepping motor control gpio define */
+/*
+#define A	1
+#define B	2
+#define C	4
+#define D	8
+*/
+/*
+#define A	8
+#define B	4
+#define C	2
+#define D	1
+
+#define POS_OFF	8
+*/
+
+/*
+#define A	(1 << 11)	
+#define B	(1 << 10)
+#define C	(1 << 9)
+#define D	(1 << 8)
+
+#define CCW	(1 << 3)
+#define CW	(1 << 2)
+
+#define A1	(1 << 13)	
+#define B1	(1 << 15)
+#define C1	(1 << 19)
+#define D1	(1 << 21)
+
+#define CCW1	(1 << 6)
+#define CW1		(1 << 5)
+*/
+
+#define A	(1 << 11)	
+#define B	(1 << 10)
+#define C	(1 << 9)
+#define D	(1 << 8)
+#define CCW	(1 << 18)
+#define CW	(1 << 19)
+
+#define A1	(1 << 12)	
+#define B1	(1 << 13)
+#define C1	(1 << 14)
+#define D1	(1 << 15)
+#define CCW1	(1 << 16)
+#define CW1		(1 << 17)
+
+#define MOTOR_INPUT_IOS		((CW|CCW)|(CW1|CCW1))
+#define MOTOR_OUTPUT_IOS	((A|B|C|D) | (A1|B1|C1|D1))
+#define MOTOR_IOS			(MOTOR_INPUT_IOS | MOTOR_OUTPUT_IOS)
+#define MOTOR_TICK			(8 * 1000)
+#define MOTOR_TIME			16	
+
+#define PHASE_NULL		0
+
+static u32	ccw[8] = {A,A|B,B,B|C,C,C|D,D,D|A};
+static u32	cw[8] = {D|A,D,D|C,C,C|B,B,B|A,A};
+static u32	ccw1[8] = {A1,A1|B1,B1,B1|C1,C1,C1|D1,D1,D1|A1};
+static u32	cw1[8] = {D1|A1,D1,D1|C1,C1,C1|B1,B1,B1|A1,A1};
+
+typedef struct motor_info_t{
+	u32	*ph_cw;
+	u32	*ph_ccw;
+	u32	pos_cw;
+	u32	pos_ccw;
+	void (*do_phase)(u32 motor_phase);
+}motor_info_t;
+
+motor_info_t motors_info[] = {
+	{.ph_cw = cw, 
+	.ph_ccw = ccw, 
+	.pos_cw = CW, 
+	.pos_ccw = CCW, 
+	.do_phase = motor0_do_phase},
+	{.ph_cw = cw1, 
+	.ph_ccw = ccw1, 
+	.pos_cw = CW1, 
+	.pos_ccw = CCW1, 
+	.do_phase = motor1_do_phase}
+};
+
+static int major;
+
+
+static void motor0_do_phase(u32 phase)
+{
+	REGWRITE(GPIO_OUT0, ((REGREAD(GPIO_OUT0) & (~(A|B|C|D)))) | (phase));
+}
+
+static void motor1_do_phase(u32 phase)
+{
+	REGWRITE(GPIO_OUT0, ((REGREAD(GPIO_OUT0) & (~(A1|B1|C1|D1)))) | (phase));
+}
+
+void motor_init(void)
+{
+	u32	gpio_en, gpio_dir, gpio_out;
+
+	gpio_en = REGREAD(GPIO_EN0) & ~(MOTOR_IOS);
+	/* disable all motor gpio */
+	REGWRITE(GPIO_EN0, gpio_en);
+	//REGWRITE(REGREAD(GPIO_EN0) & ~(MOTOR_IOS))
+
+	gpio_dir = REGREAD(GPIO_DIR0);
+	gpio_dir |= MOTOR_INPUT_IOS;
+	gpio_dir &= ~MOTOR_OUTPUT_IOS;
+	REGWRITE(GPIO_DIR0, gpio_dir);
+
+	gpio_out = REGREAD(GPIO_OUT0);
+	gpio_out &= ~MOTOR_OUTPUT_IOS;
+	REGWRITE(GPIO_OUT0, gpio_out);
+
+	/* now enable all motor gpio */
+	gpio_en |= MOTOR_IOS;
+	REGWRITE(GPIO_EN0, gpio_en);
+	
+	return;
+}
+
+
+
+/**
+ * return valule:
+ * 0: not at the end, 
+ * 1: at cw the end
+ * 2: at ccw the end
+ * */
+static enum motor_pos_t go_end(motor_ctrl_t *ctrl, int no) {
+	
+	enum motor_pos_t pos;
+
+	pos = pos_not_end;	
+	if (ctrl->dir[no] == dir_cw) {
+		/* if( (REGREAD(GPIO_IN0) & CW) == 0 ) { */
+		if( (REGREAD(GPIO_IN0) & motors_info[no].pos_cw) == 0 ) {
+			pos = pos_cw_end;	
+			//dp("\n\tctrl->pos[%d] at %d.\n", no, pos);
+		} 
+	} else {
+		/*if( (REGREAD(GPIO_IN0) & CCW) == 0 ) {*/
+		if( (REGREAD(GPIO_IN0) & motors_info[no].pos_ccw) == 0 ) {
+			pos = pos_ccw_end;	
+			//dp("\n\tctrl->pos[%d] at %d.\n", no, pos);
+		} 
+	}
+
+	return pos;
+}
+
+int stepmotor_do(motor_ctrl_t *ctrl)
+{
+	unsigned char i,j;
+	int no;
+	u32	*phase[MAX_MOTOR_NO];
+	enum motor_pos_t pos[MAX_MOTOR_NO];
+
+	if (ctrl->flags & MOTOR_NO0) {
+		here
+		if (ctrl->dir[0] == dir_cw) {
+			phase[0] = motors_info[0].ph_cw;
+		here
+		} else {
+		here
+			phase[0] = motors_info[0].ph_ccw;
+		}
+	}
+	if (ctrl->flags & MOTOR_NO1) {
+		if (ctrl->dir[1] == dir_cw) {
+		here
+			phase[1] = motors_info[1].ph_cw;
+		} else {
+		here
+			phase[1] = motors_info[1].ph_ccw;
+		}
+	}
+
+	/* ç”µæœºé½¿è½®æ—‹è½¬ä¸€å‘¨ï¼Œä¸�æ˜¯å¤–é�¢æ‰€çœ‹åˆ°çš„ä¸€å‘¨ï¼Œæ˜¯é‡Œé�¢çš„ä¼ åŠ¨è½®è½¬äº†ä¸€å‘¨*/
+	for(j=0;j<ctrl->times;j++){
+		/* æ¯�æ¬¡æ—‹è½¬45åº¦ */
+		for(i=0;i<8;i++) {
+			if (ctrl->flags & MOTOR_NO0) {
+				ctrl->pos[0] = go_end(ctrl, 0);
+				if (ctrl->pos[0] == pos_not_end) {
+					motors_info[0].do_phase(phase[0][i]);
+				}
+			}
+			if (ctrl->flags & MOTOR_NO1) {
+				ctrl->pos[1] = go_end(ctrl, 1);
+				if (ctrl->pos[1] == pos_not_end) {
+					motors_info[1].do_phase(phase[1][i]);
+				}
+			}
+
+			switch (ctrl->flags) {
+				case MOTOR_NO0:
+					if (ctrl->pos[0] != pos_not_end) {
+						here
+						goto exit_do_phase;
+					}
+					break;
+				case MOTOR_NO1:
+					if (ctrl->pos[1] != pos_not_end) {
+						here
+						goto exit_do_phase;
+					}
+					break;
+				case MOTOR_MAX_FLAGS:
+					if (ctrl->pos[0] != pos_not_end && ctrl->pos[1] != pos_not_end) {
+						here
+						goto exit_do_phase;
+					}
+					break;
+				default:
+					break;
+			}
+			msleep(ctrl->tick);   /* è°ƒèŠ‚è½¬é€Ÿ */
+		}
+	}
+
+exit_do_phase:
+	motors_info[0].do_phase(PHASE_NULL);
+	motors_info[1].do_phase(PHASE_NULL);
+	return 0;
+}
+
+static void dump_ctrl(motor_ctrl_t *ctrl)
+{
+	dp("\n");
+	dp("times = %d\n", ctrl->times);
+	dp("tick = %d\n", ctrl->tick);
+	dp("flags = %d\n", ctrl->flags);
+	dp("dir0 = %d, dir1 = %d\n", ctrl->dir[0], ctrl->dir[1]);
+	dp("\n");
+}
+
+static int stepmotor_write(struct file *filp, const char __user *buffer,
+		size_t count, loff_t *ppos)
+{
+	motor_ctrl_t ctrl;
+	
+	if (count < sizeof(motor_ctrl_t)) {
+		dp("!Argument count is invalid. Buffer size should be equal sizeof(motor_ctrl_t)\n");
+		return -EINVAL;
+	}
+
+	copy_from_user(&ctrl, buffer, sizeof(motor_ctrl_t));
+	if (ctrl.flags > MOTOR_MAX_FLAGS) {
+		dp("!Argument count is invalid. Max motor number is %d\n", MAX_MOTOR_NO-1);
+		return -EINVAL;
+	}
+	
+	if (ctrl.tick < MIN_TICK) {
+		ctrl.tick = MIN_TICK;
+	}
+	dump_ctrl(&ctrl);
+	stepmotor_do(&ctrl);
+	copy_to_user(buffer, &ctrl, sizeof(motor_ctrl_t));
+	
+	return 0;
+}
+
+static const struct file_operations stepmotor_fops = {
+	.owner		= THIS_MODULE,
+	.write		= stepmotor_write,
+};
+
+static struct miscdevice stepmotor_misc_device = {
+	STEPMOTOR_MINOR,
+	DEVNAME,
+	&stepmotor_fops,
+};
+
+static int __init stepmotor_init(void)
+{
+	dp("\n\t%s - %s - %dline.\n", __FILE__, __func__, __LINE__);
+	if(misc_register(&stepmotor_misc_device)){
+		printk(KERN_WARNING "stepmotor:Couldn't register device %d.\n", STEPMOTOR_MINOR);
+		return -EBUSY;
+	}
+	
+	motor_init();
+
+	return 0;
+}
+
+static void __exit stepmotor_exit(void)
+{
+	dp("\n\t%s - %s - %dline.\n", __FILE__, __func__, __LINE__);
+	misc_deregister(&stepmotor_misc_device);
+}
+
+module_init(stepmotor_init);
+module_exit(stepmotor_exit);
+
+module_param(major, int, 0);
+MODULE_AUTHOR("nizhiquan, nizhiquan-gz@loongson.cn");
+MODULE_DESCRIPTION("stepping motor driver for 24BYJ48A");
+MODULE_LICENSE("GPL");
+
diff -uNra linux-3.0.82/drivers/gpio/gpio-74x165.c linux-3.0.82x/drivers/gpio/gpio-74x165.c
--- linux-3.0.82/drivers/gpio/gpio-74x165.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/gpio/gpio-74x165.c	2017-09-23 03:42:49.418676897 +0800
@@ -0,0 +1,279 @@
+/*
+ *	74Hx165 - Generic parallel-out/serial-in 8-bits shift register GPIO driver
+ *
+ *	Copyright (C) 2012 Erich Schroeter <eschroeter@magnetek.com>
+ *
+ *	This program is free software; you can redistribute it and/or modify
+ *	it under the terms of the GNU General Public License version 2 as
+ *	published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/fs.h>
+#include <linux/device.h>
+#include <linux/mutex.h>
+#include <linux/slab.h>
+#include <linux/cdev.h>
+#include <linux/string.h>
+#include <linux/moduleparam.h>
+#include <linux/gpio.h>
+
+#include <linux/spi/spi.h>
+#include <linux/spi/74x165.h>
+
+#include <asm/uaccess.h>
+
+#define DEFAULT_DAISY_CHAINED 1
+
+#define USER_BUFF_SIZE 128
+
+static int registered_by_this_driver = 0;
+const char this_driver_name[] = "74x165";
+
+struct nxp_74x165_chip {
+	struct spi_device	*spi_device;
+	struct gpio_chip	gpio_chip;
+	struct mutex		lock;
+	u8			*rx_buff;
+	u32			latch;
+	u32			daisy_chained;
+	dev_t			devt;
+	struct cdev		cdev;
+	struct class		*class;
+	char			*user_buff;
+};
+
+static int nxp_74x165_read_spi(struct nxp_74x165_chip *chip)
+{
+	int status;
+
+	/* toggle latch to capture inputs */
+	gpio_set_value(chip->latch, 0);
+	gpio_set_value(chip->latch, 1);
+
+	mutex_lock(&chip->lock);
+
+	if (chip->spi_device)
+		status = spi_read(chip->spi_device, chip->rx_buff,
+					chip->daisy_chained);
+	else
+		status = -ENODEV;
+
+	mutex_unlock(&chip->lock);
+
+	return status;
+}
+
+static ssize_t nxp_74x165_show_value(struct device *dev,
+			struct device_attribute *attr,
+			char *buf)
+{
+	struct nxp_74x165_chip *chip = dev_get_drvdata(dev);
+	int i;
+	int j;
+
+	nxp_74x165_read_spi(chip);
+	for (i = j = 0; i < chip->daisy_chained; ++i) {
+		j += sprintf(buf + j, "%x", chip->rx_buff[i]);
+	}
+	sprintf(buf + j, "\n");
+
+	return strlen(buf);
+}
+static DEVICE_ATTR(value, S_IRUGO, nxp_74x165_show_value, NULL);
+
+static struct device_attribute *dev_attrs[] = {
+	&dev_attr_value,
+};
+
+static int nxp_74x165_get_value(struct gpio_chip *gc, unsigned offset)
+{
+	struct nxp_74x165_chip *chip = container_of(gc, struct nxp_74x165_chip, gpio_chip);
+	int ret = 0;
+	int reg;
+	int off;
+
+	nxp_74x165_read_spi(chip);
+	/* figure out what shift register the bit is located, then the bit */
+	reg = offset / 8;
+	off = offset % 8;
+	ret = (chip->rx_buff[reg] >> off) & 0x1;
+
+	return ret;
+}
+
+static int nxp_74x165_direction_input(struct gpio_chip *gc,
+		unsigned offset)
+{
+	nxp_74x165_get_value(gc, offset);
+	return 0;
+}
+
+static int __devinit nxp_74x165_probe(struct spi_device *spi)
+{
+	struct nxp_74x165_chip_platform_data	*pdata;
+	struct nxp_74x165_chip			*chip;
+	int ret = 0;
+	int ptr;
+
+	pdata = spi->dev.platform_data;
+	if (!pdata || !pdata->base || !pdata->latch) {
+		dev_dbg(&spi->dev, "incorrect or missing platform data\n");
+		return -EINVAL;
+	}
+
+	if (!pdata->daisy_chained) {
+		pr_alert("%s : daisy_chained reset to %d\n",
+			this_driver_name, DEFAULT_DAISY_CHAINED);
+		pdata->daisy_chained = DEFAULT_DAISY_CHAINED;
+	}
+
+	chip = kzalloc(sizeof(*chip), GFP_KERNEL);
+	if (!chip) {
+		ret = -ENOMEM;
+		goto fail_chip;
+	}
+	spi_set_drvdata(spi, chip);
+
+	mutex_init(&chip->lock);
+
+	chip->daisy_chained = pdata->daisy_chained;
+	chip->latch = pdata->latch;
+	chip->spi_device = spi;
+
+	chip->rx_buff = kmalloc(chip->daisy_chained, GFP_KERNEL | GFP_DMA);
+	if (!chip->rx_buff) {
+		ret = -ENOMEM;
+		goto fail_rx_buff;
+	}
+
+	ret = gpio_request(chip->latch, "74x165-latch");
+	if (ret < 0 && !registered_by_this_driver) {
+		dev_dbg(&spi->dev, "latch not available\n");
+		goto fail_gpio_request;
+	}
+	registered_by_this_driver = 1;
+	gpio_direction_output(chip->latch, 0);
+
+	chip->gpio_chip.label = spi->modalias;
+	chip->gpio_chip.direction_input = nxp_74x165_direction_input;
+	chip->gpio_chip.get = nxp_74x165_get_value;
+	chip->gpio_chip.base = pdata->base;
+	chip->gpio_chip.ngpio = chip->daisy_chained * 8;
+	chip->gpio_chip.can_sleep = 1;
+	chip->gpio_chip.dev = &spi->dev;
+	chip->gpio_chip.owner = THIS_MODULE;
+
+	ret = gpiochip_add(&chip->gpio_chip);
+	if (ret) {
+		dev_dbg(&spi->dev, "Failed adding GPIO chip\n");
+		goto fail_gpio_add;
+	}
+
+	ret = nxp_74x165_read_spi(chip);
+	if (ret) {
+		dev_err(&spi->dev, "Failed reading: %d\n", ret);
+		goto fail_read;
+	}
+
+	for (ptr = 0; ptr < ARRAY_SIZE(dev_attrs); ptr++) {
+		ret = device_create_file(&spi->dev, dev_attrs[ptr]);
+		if (ret) {
+			dev_err(&spi->dev, "cannot create device attribute\n");
+			goto fail_attributes;
+		}
+	}
+
+	return ret;
+
+fail_attributes:
+	while (--ptr >= 0)
+		device_remove_file(&spi->dev, dev_attrs[ptr]);
+
+	device_remove_file(&spi->dev, &dev_attr_value);
+fail_read:
+	if (gpiochip_remove(&chip->gpio_chip))
+		dev_dbg(&spi->dev, "could not remove gpio chip\n");
+
+fail_gpio_add:
+	gpio_free(chip->latch);
+fail_gpio_request:
+	kfree(chip->rx_buff);
+	chip->rx_buff = 0;
+fail_rx_buff:
+	spi_set_drvdata(spi, NULL);
+	kfree(chip);
+fail_chip:
+	return ret;
+}
+
+static int __devexit nxp_74x165_remove(struct spi_device *spi)
+{
+	struct nxp_74x165_chip *chip;
+	int ret;
+	int ptr;
+
+	chip = dev_get_drvdata(&spi->dev);
+	if (chip == NULL)
+		return -ENODEV;
+
+	dev_set_drvdata(&spi->dev, NULL);
+
+	chip->spi_device = NULL;
+
+	for (ptr = 0; ptr < ARRAY_SIZE(dev_attrs); ptr++)
+		device_remove_file(&spi->dev, dev_attrs[ptr]);
+
+	device_remove_file(&spi->dev, &dev_attr_value);
+
+	gpio_free(chip->latch);
+
+	ret = gpiochip_remove(&chip->gpio_chip);
+	if (!ret)
+		kfree(chip);
+	else
+		dev_err(&spi->dev, "Failed to remove the GPIO controller: %d\n",
+				ret);
+
+	return ret;
+}
+
+static struct spi_driver nxp_74x165_spi_driver = {
+	.driver = {
+		.name		= this_driver_name,
+		.owner		= THIS_MODULE,
+	},
+	.probe		= nxp_74x165_probe,
+	.remove		= __devexit_p(nxp_74x165_remove),
+};
+
+static int __init nxp_74x165_init_spi(void)
+{
+	return spi_register_driver(&nxp_74x165_spi_driver);
+}
+
+static int __init nxp_74x165_init(void)
+{
+	int ret;
+
+	ret = nxp_74x165_init_spi();
+	if (ret)
+		goto fail_spi_init;
+
+	return 0;
+
+fail_spi_init:
+	return ret;
+}
+subsys_initcall(nxp_74x165_init);
+
+static void __exit nxp_74x165_exit(void)
+{
+	spi_unregister_driver(&nxp_74x165_spi_driver);
+}
+module_exit(nxp_74x165_exit);
+
+MODULE_AUTHOR("Erich Schroeter <eschroeter@magnetek.com>");
+MODULE_DESCRIPTION("GPIO expander driver for 74X165 8-bit shift register");
+MODULE_LICENSE("GPL");
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/drivers/gpio/gpio-ls1c.c linux-3.0.82x/drivers/gpio/gpio-ls1c.c
--- linux-3.0.82/drivers/gpio/gpio-ls1c.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/gpio/gpio-ls1c.c	2017-09-23 03:42:49.422676884 +0800
@@ -0,0 +1,510 @@
+/*
+ *
+ * Support functions for ls1c GPIO
+ *
+ * Copyright (C) 2003-2005 Loongson Corporation
+ * Written by Sunyoung_yg <yangguang@loongson.cn>
+ *
+ * Copyright (C) 2015 Loongson China
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/* Ls1c have 105 gpios, but gpio96~104 is mux with sdram pin, now we can't
+ * test and use these pins.
+ * So we assume the gpio number range is 0~95.
+ * the change relevant data: 
+ * GPIO_BANK_COUNT,
+ * struct gpio_bank gpio_bank_ls1c,
+ *
+ */
+
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+
+#include <asm/irq.h>
+
+#include <ls1x_gpio.h>
+
+/*
+ * ls1c specific GPIO registers
+ */
+#if 1
+ struct gpio_bank gpio_bank_ls1c[GPIO_BANK_COUNT] = {
+	{ LS1C_BANK0_BASE,  LS1X_PAD_FUNC_MAX0_BASE, LS1C_BANK0_IRQ_START},
+	{ LS1C_BANK1_BASE,  LS1X_PAD_FUNC_MAX1_BASE, LS1C_BANK1_IRQ_START},
+	{ LS1C_BANK2_BASE,  LS1X_PAD_FUNC_MAX2_BASE, LS1C_BANK2_IRQ_START},
+//	{ LS1C_BANK3_BASE,  LS1X_PAD_FUNC_MAX3_BASE, LS1C_BANK3_IRQ_START}, 
+};
+#endif
+
+
+struct gpio_bank *gpio_bank;
+
+int gpio_2irq(struct gpio_chip *chip, unsigned offset);
+int irq_to_gpio(unsigned irq);
+
+inline struct gpio_bank *get_gpio_bank(int gpio)
+{
+	if(PIN_IDX(gpio) > GPIO_BANK_COUNT)
+		return NULL;
+	return &gpio_bank[PIN_IDX(gpio)];	
+}
+
+ inline int get_gpio_index(int gpio)
+{
+	return PIN_OFFSET(gpio);
+}
+
+/***************************************************************************
+ * Description:
+ * Parameters: 
+ * Rutern  : 
+ * Author  :Sunyoung_yg 
+ * Date    : 2015-07-31
+ ***************************************************************************/
+ inline int gpio_valid(int gpio)
+{
+	if ((gpio < 0) || (gpio> GPIO_MAX))  /*104 is max gpio num*/
+		return -1;
+	return 0;
+}
+
+ int check_gpio(struct gpio_bank *bank, int offset)
+{
+	unsigned int gpio = irq_to_gpio(gpio_2irq(&bank->chip, offset)); 
+
+	if (unlikely(gpio_valid(gpio))) {
+		printk(KERN_ERR "ls1c-gpio: invalid GPIO %d\n", gpio);
+		return -1;
+	}
+	return 0;
+}
+/***************************************************************************
+ * Description: set gpio direction input or output
+ * Parameters:  bank: æŠ½è±¡çš„ä¸€ç»„32ä½�gpio ï¼ˆå�Œä¸€ä¸ªå¯„å­˜å™¨ï¼‰ã€€
+ *				gpio: gpio no. or gpio offset 
+ * Author  :Sunyoung_yg 
+ * Date    : 2015-02-11
+ ***************************************************************************/
+
+void _set_gpio_direction(struct gpio_bank *bank, int offset, int is_input)
+{
+	u32 reg = bank->pbase+GPIO_REG_DIR;
+	u32 l;
+	if (check_gpio(bank, offset) < 0)
+		return -EINVAL;
+	if (!(bank->mod_usage & (1<<offset)))
+		return -EINVAL;
+
+	l = __raw_readl(reg);
+	if (is_input)
+		l |= PIN_BITSET(offset);
+	else
+		l &= ~PIN_BITSET(offset);
+	__raw_writel(l, reg);
+}
+/***************************************************************************
+ * Description: set gpio value
+ * Parameters: offset: gpio no.  or  gpio offset; enable: gpio value
+ * Rutern  :void
+ * Author  :Sunyoung_yg
+ * Date    : 2015-02-12
+ ***************************************************************************/
+ void _set_gpio_dataout(struct gpio_bank *bank, int offset, int enable)
+{
+	u32 reg = bank->pbase+GPIO_REG_OUT;
+	u32 l = 0;
+	if (check_gpio(bank, offset) < 0)
+		return -EINVAL;
+	if (!(bank->mod_usage & (1<<offset)))
+		return -EINVAL;
+
+	l = __raw_readl(reg);
+	if(enable)
+		l |= PIN_BITSET(offset);
+	else
+		l &= ~(PIN_BITSET(offset));
+	__raw_writel(l, reg);
+}
+/***************************************************************************
+ * Description: read gpio input level
+ * Parameters: 
+ * Rutern  : 
+ * Author  :Sunyoung_yg 
+ * Date    : 2015-02-12
+ ***************************************************************************/
+ int _get_gpio_datain(struct gpio_bank *bank, int offset)
+{
+	u32 reg;
+	if (check_gpio(bank, offset) < 0)
+		return -EINVAL;
+	if (!(bank->mod_usage & (1<<offset)))
+		return -EINVAL;
+
+	reg = bank->pbase + GPIO_REG_IN;
+	return (__raw_readl(reg) & (1<<offset));
+}
+/***************************************************************************
+ * Description: read gpio output  level
+ * Parameters:
+ * Rutern  :
+ * Author  :Sunyoung_yg
+ * Date    : 2015-02-12
+ ***************************************************************************/
+
+ int _get_gpio_dataout(struct gpio_bank *bank, int offset)
+{
+	u32 reg;
+	if (check_gpio(bank, offset) < 0)
+		return -EINVAL;
+	if (!(bank->mod_usage & (1<<offset)))
+		return -EINVAL;
+
+	reg = bank->pbase + GPIO_REG_OUT;
+	return (__raw_readl(reg) & (1<<offset));
+}
+
+
+
+/*
+ * Note that ENAWAKEUP needs to be enabled in GPIO_SYSCONFIG register.
+ * 1510 does not seem to have a wake-up register. If JTAG is connected
+ * to the target, system will wake up always on GPIO events. While
+ * system is running all registered GPIO interrupts need to have wake-up
+ * enabled. When system is suspended, only selected GPIO interrupts need
+ * to have wake-up enabled.
+ */
+int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
+{
+
+}
+/***************************************************************************
+ * Description: reset gpio,set gpio input, and disable irq, clear irq status.
+ * Parameters:
+ * Author  :Sunyoung_yg
+ * Date    : 2015-02-11
+ ***************************************************************************/
+
+void _reset_gpio(struct gpio_bank *bank, int gpio)
+{
+	_set_gpio_direction(bank, get_gpio_index(gpio), GPIO_INPUT);
+}
+
+/***************************************************************************
+ * Description:	set gpio function
+ * Parameters: 
+ * Author  :Sunyoung_yg 
+ * Date    : 2015-02-11
+ ***************************************************************************/
+int set_pad_func(struct gpio_chip *chip, unsigned offset, unsigned int type)
+{
+	u32 flags,reg,i;
+	struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
+
+	spin_lock_irqsave(&bank->lock, flags);
+	/*æ¸…é™¤5ä¸ªå¤�ç”¨åŠŸèƒ½é…�ç½®å¯„å­˜å™¨ pad å¯¹åº”ä½�*/
+	for(i=0; i<5; i++)  
+	{
+		reg = __raw_readl(bank->pad_muxfunc_base+ i*0x10);
+		reg &= ~(1<<offset);
+		__raw_writel(reg,bank->pad_muxfunc_base+ i*0x10);
+	}
+
+	switch(type)
+	{
+		case PAD_FUNC_1:
+		case PAD_FUNC_2:
+		case PAD_FUNC_3:
+		case PAD_FUNC_4:
+		case PAD_FUNC_5:
+			/*ç½®ä½�ã€€å¯¹åº”å¤�ç”¨åŠŸèƒ½å¯„å­˜å™¨çš„ä½�*/
+			reg = __raw_readl(bank->pad_muxfunc_base+ (type-1)*0x10);
+			reg |= (1<<offset);
+			__raw_writel(reg,bank->pad_muxfunc_base+ (type-1)*0x10);
+			break;
+		case PAD_FUNC_GPIO:
+			reg = __raw_readl(bank->pbase);
+			reg |= (1<<offset);
+			__raw_writel(reg,bank->pbase);
+			break;
+		case PAD_FUNC_DEFAULT: 
+			reg = __raw_readl(bank->pbase);
+			reg &= ~(1<<offset);
+			__raw_writel(reg,bank->pbase);
+			break;
+		default:
+			break;
+	}
+
+	spin_unlock_irqrestore(&bank->lock, flags);
+	return 0;
+}
+/***************************************************************************
+ * Description:
+ * Parameters:	chip:æŠ½è±¡å‡ºæ�¥çš„ä¸€ä¸ªæŽ§åˆ¶å™¨ï¼Œå®žé™…ä½¿å�Œä½¿ç”¨ä¸€ä¸ªå¯„å­˜å™¨çš„gpioé›†å�ˆ
+ *				offset: gpio åœ¨32ä½�å¯„å­˜å™¨ä¸­ã€€å��ç§»é‡�
+ * Author  :Sunyoung_yg 
+ * Date    : 2015-02-11
+ ***************************************************************************/
+
+int ls1c_gpio_request(struct gpio_chip *chip, unsigned offset)
+{
+	unsigned long flags;
+	int ret;
+	struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
+
+	if (check_gpio(bank, offset) < 0)
+		return -EINVAL;
+	spin_lock_irqsave(&bank->lock, flags);
+	/* Set trigger to none. You need to enable the desired trigger with
+	 * request_irq() or set_irq_type().
+	 */
+	if (!(bank->mod_usage & (1<<offset))) {
+		set_pad_func(chip, offset, PAD_FUNC_GPIO);
+		bank->mod_usage |= 1 << offset;
+		ret = 0;
+	}
+	else
+		ret = -EINVAL;
+	spin_unlock_irqrestore(&bank->lock, flags);
+
+	return ret;
+}
+
+void ls1c_gpio_free(struct gpio_chip *chip, unsigned offset)
+{
+	struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
+	unsigned int tmp, flags;
+
+	spin_lock_irqsave(&bank->lock, flags);
+
+	bank->mod_usage &= ~(1 << offset);
+	tmp = __raw_readl(bank->pbase + GPIO_REG_CFG);
+	__raw_writel((tmp & ~(1<<offset)), bank->pbase + GPIO_REG_CFG);
+	_reset_gpio(bank, bank->chip.base + offset);
+	spin_unlock_irqrestore(&bank->lock, flags);
+}
+
+
+/*---------------------------------------------------------------------*/
+
+/* REVISIT these are stupid implementations!  replace by ones that
+ * don't switch on METHOD_* and which mostly avoid spinlocks
+ */
+/***************************************************************************
+ * Description: set gpio direction is input
+ * Parameters: chip: offset:
+ * Author  :Sunyoung_yg
+ * Date    : 2015-02-11
+ ***************************************************************************/
+
+int gpio_input(struct gpio_chip *chip, unsigned offset)
+{
+	struct gpio_bank *bank;
+	unsigned long flags;
+	bank = container_of(chip, struct gpio_bank, chip);
+	spin_lock_irqsave(&bank->lock, flags);
+	_set_gpio_direction(bank, offset, GPIO_INPUT);
+	spin_unlock_irqrestore(&bank->lock, flags);
+	return 0;
+}
+
+/***************************************************************************
+ * Description:
+ * Parameters:
+ * Rutern  : 1:input ;  0:output
+ * Author  :Sunyoung_yg
+ * Date    : 2015-02-12
+ ***************************************************************************/
+int gpio_is_input(struct gpio_bank *bank, int offset)
+{
+	u32 reg = bank->pbase+GPIO_REG_DIR;
+	if(__raw_readl(reg) & offset)  /*ls1c gpio: 0 is output; 1 is input*/
+		return GPIO_INPUT;
+	else 
+		return GPIO_OUTPUT;
+}
+/***************************************************************************
+ * Description: get gpio level 
+ * Parameters: 
+ * Author  : Sunyoung_yg 
+ * Date    : 2015-02-11
+ ***************************************************************************/
+
+int gpio_get(struct gpio_chip *chip, unsigned offset)
+{
+	struct gpio_bank *bank;
+	void __iomem *reg;
+	int gpio;
+	u32 mask;
+	bank = container_of(chip, struct gpio_bank, chip);
+
+	if (gpio_is_input(bank, offset))
+		return _get_gpio_datain(bank, offset);
+	else
+		return _get_gpio_dataout(bank, offset);
+}
+/***************************************************************************
+ * Description: set gpio direction is output, and set gpio value.
+ * Parameters: value : default is 0.
+ * Rutern  : 0
+ * Author  :Sunyoung_yg
+ * Date    : 2015-02-12
+ ***************************************************************************/
+
+int gpio_output(struct gpio_chip *chip, unsigned offset, int value)
+{
+	struct gpio_bank *bank;
+	unsigned long flags;
+
+	bank = container_of(chip, struct gpio_bank, chip);
+	spin_lock_irqsave(&bank->lock, flags);
+	_set_gpio_dataout(bank, offset, value);
+	_set_gpio_direction(bank, offset, GPIO_OUTPUT);
+	spin_unlock_irqrestore(&bank->lock, flags);
+	return 0;
+}
+
+/***************************************************************************
+ * Description:
+ * Parameters: 
+ * Rutern  : 
+ * Author  :Sunyoung_yg 
+ * Date    : 2015-02-12
+ ***************************************************************************/
+
+void gpio_set(struct gpio_chip *chip, unsigned offset, int value)
+{
+	struct gpio_bank *bank;
+	unsigned long flags;
+
+	bank = container_of(chip, struct gpio_bank, chip);
+	spin_lock_irqsave(&bank->lock, flags);
+	_set_gpio_dataout(bank, offset, value);
+	spin_unlock_irqrestore(&bank->lock, flags);
+}
+/***************************************************************************
+ * Description: because in gpiolib.c have the function "gpio_to_irq",and
+ *              it is equlvalent to __gpio_to_irq ,defined in ls1x_gpio.h ,
+ *              it invoke this function(gpio_2irq)finally.
+ * Notice     : ls1c gpio0~95 int reg is int2~int4 regs, but gpio96~104 is in
+ *				int1 register; So gpio0~95 irq number is 64~159, and gpio96~104
+ *				irq number is 54~62. Now we ignore gpio96~104.
+ * Parameters :
+ * Rutern	  :
+ * Author     :Sunyoung_yg
+ * Date       : 2015-07-31
+ ***************************************************************************/
+
+int gpio_2irq(struct gpio_chip *chip, unsigned offset)
+{
+	struct gpio_bank *bank;
+
+	bank = container_of(chip, struct gpio_bank, chip);
+//	if (bank->virtual_irq_start == LS1C_BANK3_IRQ_START)
+//		if(offset > LS1C_GPIO_MAX%32) return -EINVAL;
+	if (offset > 31)
+		return -EINVAL;
+	return bank->virtual_irq_start + offset;
+}
+
+int irq_to_gpio(unsigned irq)
+{
+	int i;
+	if ( (irq < GPIO_IRQ_START)||(irq > GPIO_IRQ_END ))
+		return -EINVAL;
+	return irq - GPIO_IRQ_START;
+
+#if 0
+	struct gpio_bank *bank;
+	for(i=0;i<GPIO_BANK_COUNT;i++)
+	{
+		bank = &gpio_bank[i];
+		if(irq>=bank->virtual_irq_start && irq<bank->virtual_irq_start+32)
+		break;
+	}
+	if(i == GPIO_BANK_COUNT)
+		return -EINVAL;
+	return i*32 + (irq - bank->virtual_irq_start);
+#endif
+}
+
+/*---------------------------------------------------------------------*/
+
+ int initialized;
+
+
+/* This lock class tells lockdep that GPIO irqs are in a different
+ * category than their parents, so it won't report false recursion.
+ */
+static struct lock_class_key gpio_lock_class;
+
+ int __init _ls1c_gpio_init(void)
+{
+	int i;
+	int gpio = 0;
+	struct gpio_bank *bank;
+
+	initialized = 1;
+
+	gpio_bank = gpio_bank_ls1c;
+
+	for (i = 0; i < GPIO_BANK_COUNT; i++) {
+		int j, gpio_count = 32;
+
+		bank = &gpio_bank[i];
+		spin_lock_init(&bank->lock);
+		bank->mod_usage = 0;
+		/* REVISIT eventually switch from ls1c-specific gpio structs
+		 * over to the generic ones
+		 */
+		bank->chip.request = ls1c_gpio_request;
+		bank->chip.free = ls1c_gpio_free;
+		bank->chip.direction_input = gpio_input;
+		bank->chip.get = gpio_get;
+		bank->chip.direction_output = gpio_output;
+		bank->chip.set = gpio_set;
+		bank->chip.to_irq = gpio_2irq;
+
+		bank->chip.label = "gpio";
+		bank->chip.base = gpio;
+		gpio += gpio_count;
+
+		bank->chip.ngpio = gpio_count;
+
+		gpiochip_add(&bank->chip);
+	}
+	return 0;
+}
+
+/*
+ * This may get called early from board specific init
+ * for boards that have interrupts routed via FPGA.
+ */
+int __init ls1c_gpio_init(void)
+{
+	if (!initialized)
+		return _ls1c_gpio_init();
+	else
+		return 0;
+}
+
+ int __init ls1c_gpio_sysinit(void)
+{
+	int ret = 0;
+
+	if (!initialized)
+		ret = _ls1c_gpio_init();
+	return ret;
+}
+
+arch_initcall(ls1c_gpio_sysinit);
diff -uNra linux-3.0.82/drivers/gpio/Kconfig linux-3.0.82x/drivers/gpio/Kconfig
--- linux-3.0.82/drivers/gpio/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/gpio/Kconfig	2017-09-23 03:42:49.422676884 +0800
@@ -139,6 +139,10 @@
 
 	  This driver can also be built as a module. If so, the module
 	  will be called sch-gpio.
+config GPIO_LS1C
+	tristate "ls1c gpio"
+	help 
+	support ls1c gpio drivers
 
 config GPIO_VX855
 	tristate "VIA VX855/VX875 GPIO"
@@ -420,6 +424,14 @@
 	  8-outputs shift registers. This driver can be used to provide access
 	  to more gpio outputs.
 
+config GPIO_74X165
+	tristate "74x165 parallel-in/serial-out 8-bits shift register"
+	depends on SPI_MASTER
+	help
+	  Platform driver for 74x165 compatible parallel-in/serial-out
+	  8-inputs shift registers. This driver can be used to provide access
+	  to more gpio inputs.
+
 comment "AC97 GPIO expanders:"
 
 config GPIO_UCB1400
diff -uNra linux-3.0.82/drivers/gpio/Makefile linux-3.0.82x/drivers/gpio/Makefile
--- linux-3.0.82/drivers/gpio/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/gpio/Makefile	2017-09-23 03:42:49.422676884 +0800
@@ -4,6 +4,7 @@
 
 obj-$(CONFIG_GPIOLIB)		+= gpiolib.o
 
+obj-$(CONFIG_GPIO_LS1C)	+= gpio-ls1c.o
 obj-$(CONFIG_GPIO_ADP5520)	+= adp5520-gpio.o
 obj-$(CONFIG_GPIO_ADP5588)	+= adp5588-gpio.o
 obj-$(CONFIG_GPIO_BASIC_MMIO_CORE)	+= basic_mmio_gpio.o
@@ -20,6 +21,7 @@
 obj-$(CONFIG_GPIO_MC33880)	+= mc33880.o
 obj-$(CONFIG_GPIO_MCP23S08)	+= mcp23s08.o
 obj-$(CONFIG_GPIO_74X164)	+= 74x164.o
+obj-$(CONFIG_GPIO_74X165)	+= gpio-74x165.o
 obj-$(CONFIG_ARCH_OMAP)         += gpio-omap.o
 obj-$(CONFIG_GPIO_PCA953X)	+= pca953x.o
 obj-$(CONFIG_GPIO_PCF857X)	+= pcf857x.o
diff -uNra linux-3.0.82/drivers/hwmon/Kconfig linux-3.0.82x/drivers/hwmon/Kconfig
--- linux-3.0.82/drivers/hwmon/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/hwmon/Kconfig	2017-09-23 03:42:49.422676884 +0800
@@ -39,6 +39,16 @@
 
 comment "Native drivers"
 
+config SPI_MCP3201
+	tristate "Microchip Technology MCP3201/02/04/08"
+	depends on SPI_MASTER && EXPERIMENTAL
+	help
+	  Say yes here to build support for Microchip Technology's MCP3201 
+	  MCP3202 MCP3204 MCP3208 analog to digital converter.
+
+	  This driver can also be built as a module. If so, the module will be
+	  called mcp320x.
+
 config SENSORS_ABITUGURU
 	tristate "Abit uGuru (rev 1 & 2)"
 	depends on X86 && DMI && EXPERIMENTAL
diff -uNra linux-3.0.82/drivers/hwmon/Makefile linux-3.0.82x/drivers/hwmon/Makefile
--- linux-3.0.82/drivers/hwmon/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/hwmon/Makefile	2017-09-23 03:42:49.422676884 +0800
@@ -11,6 +11,7 @@
 
 # Native drivers
 # asb100, then w83781d go first, as they can override other drivers' addresses.
+obj-$(CONFIG_SPI_MCP3201)	+= mcp3201.o
 obj-$(CONFIG_SENSORS_ASB100)	+= asb100.o
 obj-$(CONFIG_SENSORS_W83627HF)	+= w83627hf.o
 obj-$(CONFIG_SENSORS_W83792D)	+= w83792d.o
diff -uNra linux-3.0.82/drivers/hwmon/mcp3201.c linux-3.0.82x/drivers/hwmon/mcp3201.c
--- linux-3.0.82/drivers/hwmon/mcp3201.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/hwmon/mcp3201.c	2017-09-23 03:42:49.426676873 +0800
@@ -0,0 +1,301 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/sysfs.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/mutex.h>
+#include <linux/mod_devicetable.h>
+#include <linux/spi/spi.h>
+
+#define DRVNAME "mcp3201"
+#define REFERENCE	5000
+
+struct mcp3201 {
+	struct device *hwmon_dev;
+	struct mutex lock;
+	u32 channels;
+	u32 reference; /* in millivolts */
+	const char *name;
+};
+
+/* sysfs hook function */
+static ssize_t mcp3201_read(struct device *dev,
+		struct device_attribute *devattr, char *buf, int differential)
+{
+	struct spi_device *spi = to_spi_device(dev);
+	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+	struct mcp3201 *adc = spi_get_drvdata(spi);
+	u8 tx_buf[1];
+	u8 rx_buf[2];
+	int status = -1;
+	u32 value = 0;
+
+	if (mutex_lock_interruptible(&adc->lock))
+		return -ERESTARTSYS;
+
+	switch (adc->channels) {
+		case 1:	/* mcp3201 */
+			status = spi_read(spi, rx_buf, sizeof(rx_buf));
+			break;
+		case 2:	/* mcp3202 */
+			if (differential)
+				tx_buf[0] = 0x04 | attr->index;
+			else
+				tx_buf[0] = 0x06 | attr->index;
+			status = spi_write_then_read(spi, tx_buf, sizeof(tx_buf),
+								rx_buf, sizeof(rx_buf));
+			break;
+		case 4:	/* mcp3204 */
+		case 8:	/* mcp3208 */
+			if (differential)
+				tx_buf[0] = 0x10 | attr->index;
+			else
+				tx_buf[0] = 0x18 | attr->index;
+			status = spi_write_then_read(spi, tx_buf, sizeof(tx_buf),
+							rx_buf, sizeof(rx_buf));
+			break;
+	}
+
+	if (status < 0) {
+		dev_warn(dev, "SPI synch. transfer failed with status %d\n",
+				status);
+		goto out;
+	}
+
+	switch (adc->channels) {
+		case 1:	/* mcp3201 */
+			value = (rx_buf[0] << 8);
+			value = value & 0x1f00;
+			value += rx_buf[1] ;
+			value >>= 1;
+			break;
+		case 2:	/* mcp3202 */
+		case 4:	/* mcp3204 */
+		case 8:	/* mcp3208 */
+			value = (rx_buf[0] & 0x3f) << 6 | (rx_buf[1] >> 2);
+			break;
+	}
+
+	dev_dbg(dev, "raw value = 0x%x\n", value);
+
+	value = value * adc->reference >> 12;
+	status = sprintf(buf, "%d\n", value);
+out:
+	mutex_unlock(&adc->lock);
+	return status;
+}
+
+static ssize_t mcp3201_read_single(struct device *dev,
+		struct device_attribute *devattr, char *buf)
+{
+	return mcp3201_read(dev, devattr, buf, 0);
+}
+
+static ssize_t mcp3201_read_diff(struct device *dev,
+		struct device_attribute *devattr, char *buf)
+{
+	return mcp3201_read(dev, devattr, buf, 1);
+}
+
+static ssize_t mcp3201_show_min(struct device *dev,
+		struct device_attribute *devattr, char *buf)
+{
+	/* The minimum reference is 0 for this chip family */
+	return sprintf(buf, "0\n");
+}
+
+static ssize_t mcp3201_show_max(struct device *dev,
+		struct device_attribute *devattr, char *buf)
+{
+	struct spi_device *spi = to_spi_device(dev);
+	struct mcp3201 *adc = spi_get_drvdata(spi);
+	u32 reference;
+
+	if (mutex_lock_interruptible(&adc->lock))
+		return -ERESTARTSYS;
+
+	reference = adc->reference;
+
+	mutex_unlock(&adc->lock);
+
+	return sprintf(buf, "%d\n", reference);
+}
+
+static ssize_t mcp3201_set_max(struct device *dev,
+	struct device_attribute *devattr, const char *buf, size_t count)
+{
+	struct spi_device *spi = to_spi_device(dev);
+	struct mcp3201 *adc = spi_get_drvdata(spi);
+	unsigned long value;
+
+	if (strict_strtoul(buf, 10, &value))
+		return -EINVAL;
+
+	if (mutex_lock_interruptible(&adc->lock))
+		return -ERESTARTSYS;
+
+	adc->reference = value;
+
+	mutex_unlock(&adc->lock);
+
+	return count;
+}
+
+static ssize_t mcp3201_show_name(struct device *dev, struct device_attribute
+			      *devattr, char *buf)
+{
+	struct spi_device *spi = to_spi_device(dev);
+	struct mcp3201 *adc = spi_get_drvdata(spi);
+
+	return sprintf(buf, "mcp320%d\n", adc->channels);
+}
+
+static struct sensor_device_attribute ad_input[] = {
+	SENSOR_ATTR(name, S_IRUGO, mcp3201_show_name, NULL, 0),
+	SENSOR_ATTR(Vin_min, S_IRUGO, mcp3201_show_min, NULL, 0),
+	SENSOR_ATTR(Vin_max, S_IWUSR | S_IRUGO, mcp3201_show_max,
+					mcp3201_set_max, 0),
+	SENSOR_ATTR(single_ch0, S_IRUGO, mcp3201_read_single, NULL, 0),
+	SENSOR_ATTR(diff_ch0+ch1-, S_IRUGO, mcp3201_read_diff, NULL, 0),
+	SENSOR_ATTR(single_ch1, S_IRUGO, mcp3201_read_single, NULL, 1),
+	SENSOR_ATTR(diff_ch1+ch0-, S_IRUGO, mcp3201_read_diff, NULL, 1),
+	SENSOR_ATTR(single_ch2, S_IRUGO, mcp3201_read_single, NULL, 2),
+	SENSOR_ATTR(diff_ch2+ch3-, S_IRUGO, mcp3201_read_diff, NULL, 2),
+	SENSOR_ATTR(single_ch3, S_IRUGO, mcp3201_read_single, NULL, 3),
+	SENSOR_ATTR(diff_ch3+ch2-, S_IRUGO, mcp3201_read_diff, NULL, 3),
+	SENSOR_ATTR(single_ch4, S_IRUGO, mcp3201_read_single, NULL, 4),
+	SENSOR_ATTR(diff_ch4+ch5-, S_IRUGO, mcp3201_read_diff, NULL, 4),
+	SENSOR_ATTR(single_ch5, S_IRUGO, mcp3201_read_single, NULL, 5),
+	SENSOR_ATTR(diff_ch5+ch4-, S_IRUGO, mcp3201_read_diff, NULL, 5),
+	SENSOR_ATTR(single_ch6, S_IRUGO, mcp3201_read_single, NULL, 6),
+	SENSOR_ATTR(diff_ch6+ch7-, S_IRUGO, mcp3201_read_diff, NULL, 6),
+	SENSOR_ATTR(single_ch7, S_IRUGO, mcp3201_read_single, NULL, 7),
+	SENSOR_ATTR(diff_ch7+ch6-, S_IRUGO, mcp3201_read_diff, NULL, 7),
+};
+
+/*----------------------------------------------------------------------*/
+
+static int __devinit mcp3201_probe(struct spi_device *spi)
+{
+	int channels = spi_get_device_id(spi)->driver_data;
+	struct mcp3201 *adc;
+	int status;
+	int i;
+
+	adc = kzalloc(sizeof *adc, GFP_KERNEL);
+	if (!adc)
+		return -ENOMEM;
+
+	/* set a default value for the reference */
+	adc->reference = REFERENCE;
+	adc->channels = channels;
+	adc->name = spi_get_device_id(spi)->name;
+	mutex_init(&adc->lock);
+
+	mutex_lock(&adc->lock);
+
+	spi_set_drvdata(spi, adc);
+
+	channels = 3 + (adc->channels << 1);
+	for (i = 0; i < channels; i++) {
+		status = device_create_file(&spi->dev, &ad_input[i].dev_attr);
+		if (status) {
+			dev_err(&spi->dev, "device_create_file failed.\n");
+			goto out_err;
+		}
+	}
+
+	adc->hwmon_dev = hwmon_device_register(&spi->dev);
+	if (IS_ERR(adc->hwmon_dev)) {
+		dev_err(&spi->dev, "hwmon_device_register failed.\n");
+		status = PTR_ERR(adc->hwmon_dev);
+		goto out_err;
+	}
+
+	mutex_unlock(&adc->lock);
+	return 0;
+
+out_err:
+	for (i--; i >= 0; i--)
+		device_remove_file(&spi->dev, &ad_input[i].dev_attr);
+
+	spi_set_drvdata(spi, NULL);
+	mutex_unlock(&adc->lock);
+	kfree(adc);
+	return status;
+}
+
+static int __devexit mcp3201_remove(struct spi_device *spi)
+{
+	int channels = spi_get_device_id(spi)->driver_data;
+	struct mcp3201 *adc = spi_get_drvdata(spi);
+	int i;
+
+	mutex_lock(&adc->lock);
+	hwmon_device_unregister(adc->hwmon_dev);
+	channels = 3 + (adc->channels << 1);
+	for (i = 0; i < channels; i++)
+		device_remove_file(&spi->dev, &ad_input[i].dev_attr);
+
+	spi_set_drvdata(spi, NULL);
+	mutex_unlock(&adc->lock);
+	kfree(adc);
+
+	return 0;
+}
+
+static const struct spi_device_id mcp3201_ids[] = {
+	{ "mcp3201", 1 },
+	{ "mcp3202", 2 },
+	{ "mcp3204", 4 },
+	{ "mcp3208", 8 },
+	{ },
+};
+MODULE_DEVICE_TABLE(spi, mcp3201_ids);
+
+static struct spi_driver mcp3201_driver = {
+	.driver = {
+		.name	= "mcp3201",
+		.owner	= THIS_MODULE,
+	},
+	.id_table = mcp3201_ids,
+	.probe	= mcp3201_probe,
+	.remove	= __devexit_p(mcp3201_remove),
+};
+
+static int __init init_mcp3201(void)
+{
+	return spi_register_driver(&mcp3201_driver);
+}
+
+static void __exit exit_mcp3201(void)
+{
+	spi_unregister_driver(&mcp3201_driver);
+}
+
+module_init(init_mcp3201);
+module_exit(exit_mcp3201);
+
+MODULE_AUTHOR("loongson");
+MODULE_DESCRIPTION("mcp3201 Linux driver");
+MODULE_LICENSE("GPL");
diff -uNra linux-3.0.82/drivers/i2c/busses/i2c-ls1x.c linux-3.0.82x/drivers/i2c/busses/i2c-ls1x.c
--- linux-3.0.82/drivers/i2c/busses/i2c-ls1x.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/i2c/busses/i2c-ls1x.c	2017-09-23 03:42:49.426676873 +0800
@@ -0,0 +1,317 @@
+/*
+ *  Copyright (c) 2013 Tang, Haifeng <tanghaifeng-gz@loongson.cn>
+ *
+ *  Based partly on i2c-at91.c
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+*/
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+#include <linux/types.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/clk.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+
+#define I2C_CLOCK		400000		/* Hz. max 400 Kbits/sec */
+
+/* registers */
+#define OCI2C_PRELOW		0
+#define OCI2C_PREHIGH		1
+#define OCI2C_CONTROL		2
+#define OCI2C_DATA		3
+#define OCI2C_CMD		4 /* write only */
+#define OCI2C_STATUS		4 /* read only, same address as OCI2C_CMD */
+
+#define OCI2C_CTRL_IEN		0x40
+#define OCI2C_CTRL_EN		0x80
+
+#define OCI2C_CMD_START		0x90
+#define OCI2C_CMD_STOP		0x40
+#define OCI2C_CMD_READ		0x20
+#define OCI2C_CMD_WRITE		0x10
+#define OCI2C_CMD_READ_ACK	0x20
+#define OCI2C_CMD_READ_NACK	0x28
+#define OCI2C_CMD_IACK		0x00
+
+#define OCI2C_STAT_IF		0x01
+#define OCI2C_STAT_TIP		0x02
+#define OCI2C_STAT_ARBLOST	0x20
+#define OCI2C_STAT_BUSY		0x40
+#define OCI2C_STAT_NACK		0x80
+
+
+struct ls1x_i2c {
+	void __iomem *base;
+	struct i2c_adapter adap;
+};
+
+static inline void i2c_writeb(struct ls1x_i2c *i2c, int reg, u8 value)
+{
+	writeb(value, i2c->base + reg);
+}
+
+static inline u8 i2c_readb(struct ls1x_i2c *i2c, int reg)
+{
+	return readb(i2c->base + reg);
+}
+
+/*
+ * Poll the i2c status register until the specified bit is set.
+ * Returns 0 if timed out (100 msec).
+ */
+static short ls1x_poll_status(struct ls1x_i2c *i2c, unsigned long bit)
+{
+	int loop_cntr = 10000;
+
+	do {
+		udelay(10);
+	} while ((i2c_readb(i2c, OCI2C_STATUS) & bit) && (--loop_cntr > 0));
+
+	return (loop_cntr > 0);
+}
+
+static int ls1x_xfer_read(struct ls1x_i2c *i2c, unsigned char *buf, int length) 
+{
+	int x;
+	for (x=0; x<length; x++) {
+		/* send ACK last not send ACK */
+		if (x != (length -1)) 
+			i2c_writeb(i2c, OCI2C_CMD, OCI2C_CMD_READ_ACK); 
+		else
+			i2c_writeb(i2c, OCI2C_CMD, OCI2C_CMD_READ_NACK);
+		if (!ls1x_poll_status(i2c, OCI2C_STAT_TIP)) {
+			dev_dbg(&i2c->adap.dev, "READ timeout\n");
+			return -ETIMEDOUT;
+		}
+		*buf++ = i2c_readb(i2c, OCI2C_DATA);
+	}
+	i2c_writeb(i2c,OCI2C_CMD, OCI2C_CMD_STOP);
+		
+	return 0;
+}
+
+static int ls1x_xfer_write(struct ls1x_i2c *i2c, unsigned char *buf, int length)
+{
+	int x;
+
+	for (x=0; x<length; x++) {
+		i2c_writeb(i2c, OCI2C_DATA, *buf++);
+		i2c_writeb(i2c, OCI2C_CMD, OCI2C_CMD_WRITE);
+		if (!ls1x_poll_status(i2c, OCI2C_STAT_TIP)) {
+			dev_dbg(&i2c->adap.dev, "WRITE timeout\n");
+			return -ETIMEDOUT;
+		}
+		if (i2c_readb(i2c, OCI2C_STATUS) & OCI2C_STAT_NACK) {
+			i2c_writeb(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
+			return length;
+		}
+	}
+	i2c_writeb(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
+
+	return 0;
+}
+
+static int ls1x_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num)
+{
+	struct ls1x_i2c *i2c = (struct ls1x_i2c *)adap->algo_data;
+	int i, ret;
+	int j;
+	dev_dbg(&adap->dev, "ls1x_xfer: processing %d messages:\n", num);
+	for (i = 0; i < num; i++) {
+		
+		dev_dbg(&adap->dev, " #%d: %sing %d byte%s %s 0x%02x\n", i,
+			pmsg->flags & I2C_M_RD ? "read" : "writ",
+			pmsg->len, pmsg->len > 1 ? "s" : "",
+			pmsg->flags & I2C_M_RD ? "from" : "to",	pmsg->addr);
+
+		if (!ls1x_poll_status(i2c, OCI2C_STAT_BUSY)) {
+			return -ETIMEDOUT;
+		}
+
+		i2c_writeb(i2c, OCI2C_DATA, (pmsg->addr << 1)
+			| ((pmsg->flags & I2C_M_RD) ? 1 : 0));
+		i2c_writeb(i2c, OCI2C_CMD, OCI2C_CMD_START);
+
+		/* Wait until transfer is finished */
+		if (!ls1x_poll_status(i2c, OCI2C_STAT_TIP)) {
+			dev_dbg(&adap->dev, "TXCOMP timeout\n");
+			return -ETIMEDOUT;  
+		}
+		if (i2c_readb(i2c, OCI2C_STATUS) & OCI2C_STAT_NACK) {
+			dev_err(&adap->dev, "slave addr no ack !!\n");
+			i2c_writeb(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
+			return 0;
+		}
+ 		if (pmsg->flags & I2C_M_RD)
+			ret = ls1x_xfer_read(i2c, pmsg->buf, pmsg->len);
+  		else
+			ret = ls1x_xfer_write(i2c, pmsg->buf, pmsg->len);
+		if (ret)
+			return ret;
+		dev_dbg(&adap->dev, "transfer complete\n");
+		pmsg++;
+	}
+	return i;
+}
+
+static void ls1x_i2c_hwinit(struct ls1x_i2c *i2c)
+{
+	struct clk *clk;
+	int prescale;
+	u8 ctrl = i2c_readb(i2c, OCI2C_CONTROL);
+
+	/* make sure the device is disabled */
+	i2c_writeb(i2c, OCI2C_CONTROL, ctrl & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN));
+
+	clk = clk_get(NULL, "apb");
+	prescale = clk_get_rate(clk);
+	prescale = (prescale / (5*I2C_CLOCK)) - 1;
+	//prescale = 0x64;
+	prescale = 0x141;
+	i2c_writeb(i2c, OCI2C_PRELOW, prescale & 0xff);
+	i2c_writeb(i2c, OCI2C_PREHIGH, prescale >> 8);
+
+	/* Init the device */
+	i2c_writeb(i2c, OCI2C_CMD, OCI2C_CMD_IACK);
+	i2c_writeb(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_IEN | OCI2C_CTRL_EN);
+}
+
+static u32 ls1x_functionality(struct i2c_adapter *adap)
+{
+	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
+}
+
+static const struct i2c_algorithm ls1x_algorithm = {
+	.master_xfer	= ls1x_xfer,
+	.functionality	= ls1x_functionality,
+};
+
+static int __devinit ls1x_i2c_probe(struct platform_device *pdev)
+{
+	struct ls1x_i2c *i2c;
+	struct resource *res;
+	int rc;
+
+	res =  platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!res) {
+		dev_err(&pdev->dev, "cannot find IO resource\n");
+		return -ENOENT;
+	}
+
+	if (!(i2c = kzalloc(sizeof(struct ls1x_i2c), GFP_KERNEL))) {
+		dev_err(&pdev->dev, "can't allocate inteface!\n");
+		rc = -ENOMEM;
+		goto fail2;
+	}
+	
+	if (!request_mem_region(res->start, resource_size(res), "ls1x-i2c"))
+		return -EBUSY;
+
+	i2c->base = ioremap(res->start, resource_size(res));
+	if (!i2c->base) {
+		dev_err(&pdev->dev, "i2c-ls1x - failed to map controller\n");
+		rc = -ENOMEM;
+		goto fail1;
+	}
+
+	strlcpy(i2c->adap.name, "loongson1", sizeof(i2c->adap.name));
+	i2c->adap.owner   = THIS_MODULE;
+	i2c->adap.algo    = &ls1x_algorithm;
+	i2c->adap.class   = I2C_CLASS_HWMON;
+	i2c->adap.algo_data = i2c;
+	i2c->adap.dev.parent = &pdev->dev;
+	i2c->adap.nr = pdev->id;
+
+	ls1x_i2c_hwinit(i2c);
+
+	platform_set_drvdata(pdev, i2c);
+
+	rc = i2c_add_numbered_adapter(&i2c->adap);
+	if (rc) {
+		dev_err(&pdev->dev, "Adapter %s registration failed\n",
+				i2c->adap.name);
+		goto fail0;
+	}
+
+	dev_info(&pdev->dev, "Loongson1 i2c bus driver.\n");
+	return 0;
+
+fail0:
+	platform_set_drvdata(pdev, NULL);
+fail1:
+	iounmap(i2c->base);
+	release_mem_region(res->start, resource_size(res));
+fail2:
+	kfree(i2c);
+
+	return rc;
+}
+
+static int __devexit ls1x_i2c_remove(struct platform_device *pdev)
+{
+	struct ls1x_i2c *i2c = platform_get_drvdata(pdev);
+	struct resource *res;
+	int rc;
+
+	rc = i2c_del_adapter(&i2c->adap);
+	platform_set_drvdata(pdev, NULL);
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	iounmap(i2c->base);
+	release_mem_region(res->start, resource_size(res));
+
+	return rc;
+}
+
+#ifdef CONFIG_PM
+static int ls1x_i2c_suspend(struct platform_device *pdev, pm_message_t mesg)
+{
+	return 0;
+}
+
+static int ls1x_i2c_resume(struct platform_device *pdev)
+{
+	return 0;
+}
+
+#else
+#define ls1x_i2c_suspend	NULL
+#define ls1x_i2c_resume	NULL
+#endif
+
+static struct platform_driver ls1x_i2c_driver = {
+	.probe		= ls1x_i2c_probe,
+	.remove		= __devexit_p(ls1x_i2c_remove),
+	.suspend	= ls1x_i2c_suspend,
+	.resume		= ls1x_i2c_resume,
+	.driver		= {
+		.owner	= THIS_MODULE,
+		.name	= "ls1x-i2c",
+	},
+};
+
+static int __init ls1x_i2c_init(void)
+{
+	return platform_driver_register(&ls1x_i2c_driver);
+}
+
+static void __exit ls1x_i2c_exit(void)
+{
+	platform_driver_unregister(&ls1x_i2c_driver);
+}
+
+module_init(ls1x_i2c_init);
+module_exit(ls1x_i2c_exit);
+
+MODULE_AUTHOR("TangHaifeng <tanghaifeng-gz@loongson.cn>");
+MODULE_DESCRIPTION("I2C driver for Loongson 1A/1B");
+MODULE_LICENSE("GPL");
+
diff -uNra linux-3.0.82/drivers/i2c/busses/Kconfig linux-3.0.82x/drivers/i2c/busses/Kconfig
--- linux-3.0.82/drivers/i2c/busses/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/i2c/busses/Kconfig	2017-09-23 03:42:49.426676873 +0800
@@ -490,6 +490,14 @@
 	  This driver can also be built as a module.  If so, the module
 	  will be called i2c-ocores.
 
+config I2C_LS1X
+	tristate "Loongson1 I2C Controller"
+	depends on EXPERIMENTAL && (LS1A_MACH || LS1B_MACH || LS1C_MACH)
+	help
+	  This supports the use of the I2C interface on Loongson1
+	  processors.
+
+
 config I2C_OMAP
 	tristate "OMAP I2C adapter"
 	depends on ARCH_OMAP
diff -uNra linux-3.0.82/drivers/i2c/busses/Makefile linux-3.0.82x/drivers/i2c/busses/Makefile
--- linux-3.0.82/drivers/i2c/busses/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/i2c/busses/Makefile	2017-09-23 03:42:49.426676873 +0800
@@ -47,6 +47,7 @@
 obj-$(CONFIG_I2C_NOMADIK)	+= i2c-nomadik.o
 obj-$(CONFIG_I2C_NUC900)	+= i2c-nuc900.o
 obj-$(CONFIG_I2C_OCORES)	+= i2c-ocores.o
+obj-$(CONFIG_I2C_LS1X)	+= i2c-ls1x.o
 obj-$(CONFIG_I2C_OMAP)		+= i2c-omap.o
 obj-$(CONFIG_I2C_PASEMI)	+= i2c-pasemi.o
 obj-$(CONFIG_I2C_PCA_PLATFORM)	+= i2c-pca-platform.o
diff -uNra linux-3.0.82/drivers/i2c/i2c-core.c linux-3.0.82x/drivers/i2c/i2c-core.c
--- linux-3.0.82/drivers/i2c/i2c-core.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/i2c/i2c-core.c	2017-09-23 03:42:49.426676873 +0800
@@ -507,7 +507,6 @@
 	client = kzalloc(sizeof *client, GFP_KERNEL);
 	if (!client)
 		return NULL;
-
 	client->adapter = adap;
 
 	client->dev.platform_data = info->platform_data;
@@ -547,7 +546,7 @@
 
 	dev_dbg(&adap->dev, "client [%s] registered with bus id %s\n",
 		client->name, dev_name(&client->dev));
-
+	printk(" dbg-yg out of i2c_new_device()............ ....\r\n");
 	return client;
 
 out_err:
diff -uNra linux-3.0.82/drivers/input/keyboard/74x165_gpio_keys_polled.c linux-3.0.82x/drivers/input/keyboard/74x165_gpio_keys_polled.c
--- linux-3.0.82/drivers/input/keyboard/74x165_gpio_keys_polled.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/input/keyboard/74x165_gpio_keys_polled.c	2017-09-23 03:42:49.430676860 +0800
@@ -0,0 +1,276 @@
+/*
+ *  Driver for buttons on GPIO lines not capable of generating interrupts
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/input.h>
+#include <linux/input-polldev.h>
+#include <linux/ioport.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <linux/gpio_keys.h>
+#include <linux/input/74x165_gpio_keys_polled.h>
+
+#define DRV_NAME	"gen74x165_gpio-keys-polled"
+
+struct gpio_keys_button_data {
+	int last_state;
+	int count;
+	int threshold;
+	int can_sleep;
+};
+
+struct gpio_keys_polled_dev {
+	struct input_polled_dev *poll_dev;
+	struct device *dev;
+	struct gen_74x165_platform_data *pdata;
+	struct gpio_keys_button_data data[0];
+};
+
+static void gpio_keys_polled_poll(struct input_polled_dev *dev)
+{
+	struct gpio_keys_polled_dev *bdev = dev->private;
+	struct gen_74x165_platform_data *pdata = bdev->pdata;
+	struct gpio_keys_button_data *bdata = bdev->data;
+	struct input_dev *input = dev->input;
+	int i;
+	int state = 0;
+	int key;
+
+	if (bdata->count < bdata->threshold)
+		bdata->count++;
+	else {
+		gpio_set_value(pdata->cp, 0);
+		gpio_set_value(pdata->pl, 0);
+		gpio_set_value(pdata->pl, 1);
+		for (i = 0; i < bdev->pdata->nbuttons; i++) {
+				key = gpio_get_value(pdata->q7);
+				state |= key << i;
+				gpio_set_value(pdata->cp, 0);
+				gpio_set_value(pdata->cp, 1);
+		}
+		if (state != bdata->last_state) {
+			key = state ^ bdata->last_state;
+			key = find_first_bit((unsigned long *)&key, 16);
+
+			input_event(input, pdata->buttons[key].type ?: EV_KEY, 
+						pdata->buttons[key].code, 
+						!!(((state>>key)&0x1) ^ pdata->buttons[key].active_low));
+			input_sync(input);
+
+			bdata->count = 0;
+			bdata->last_state = state;
+		}
+	}
+}
+
+static void gpio_keys_polled_open(struct input_polled_dev *dev)
+{
+	struct gpio_keys_polled_dev *bdev = dev->private;
+	struct gen_74x165_platform_data *pdata = bdev->pdata;
+
+	if (pdata->enable)
+		pdata->enable(bdev->dev);
+}
+
+static void gpio_keys_polled_close(struct input_polled_dev *dev)
+{
+	struct gpio_keys_polled_dev *bdev = dev->private;
+	struct gen_74x165_platform_data *pdata = bdev->pdata;
+
+	if (pdata->disable)
+		pdata->disable(bdev->dev);
+}
+
+static int __devinit gpio_keys_polled_probe(struct platform_device *pdev)
+{
+	struct gen_74x165_platform_data *pdata = pdev->dev.platform_data;
+	struct device *dev = &pdev->dev;
+	struct gpio_keys_polled_dev *bdev;
+	struct input_polled_dev *poll_dev;
+	struct input_dev *input;
+	int error;
+	int i;
+
+	if (!pdata || !pdata->poll_interval)
+		return -EINVAL;
+
+	bdev = kzalloc(sizeof(struct gpio_keys_polled_dev), GFP_KERNEL);
+	if (!bdev) {
+		dev_err(dev, "no memory for private data\n");
+		return -ENOMEM;
+	}
+
+	poll_dev = input_allocate_polled_device();
+	if (!poll_dev) {
+		dev_err(dev, "no memory for polled device\n");
+		error = -ENOMEM;
+		goto err_free_bdev;
+	}
+
+	poll_dev->private = bdev;
+	poll_dev->poll = gpio_keys_polled_poll;
+	poll_dev->poll_interval = pdata->poll_interval;
+	poll_dev->open = gpio_keys_polled_open;
+	poll_dev->close = gpio_keys_polled_close;
+
+	input = poll_dev->input;
+
+	input->evbit[0] = BIT(EV_KEY);
+	input->name = pdev->name;
+	input->phys = DRV_NAME"/input0";
+	input->dev.parent = &pdev->dev;
+
+	input->id.bustype = BUS_HOST;
+	input->id.vendor = 0x0001;
+	input->id.product = 0x0001;
+	input->id.version = 0x0100;
+
+	/* q7 input */
+	error = gpio_request(pdata->q7, DRV_NAME);
+	if (error) {
+		dev_err(dev, "unable to claim q7 %u, err=%d\n",
+			pdata->q7, error);
+		goto err_poll_dev;
+	}
+	
+	error = gpio_direction_input(pdata->q7);
+	if (error) {
+		dev_err(dev,
+			"unable to set direction on q7 %u, err=%d\n",
+			pdata->q7, error);
+		goto err_poll_dev;
+	}
+	/* cp output */
+	error = gpio_request(pdata->cp, DRV_NAME);
+	if (error) {
+		dev_err(dev, "unable to claim cp %u, err=%d\n",
+			pdata->cp, error);
+		goto err_free_gpio_q7;
+	}
+	
+	error = gpio_direction_output(pdata->cp, 1);
+	if (error) {
+		dev_err(dev,
+			"unable to set direction on cp %u, err=%d\n",
+			pdata->cp, error);
+		goto err_free_gpio_q7;
+	}
+	/* pl output */
+	error = gpio_request(pdata->pl, DRV_NAME);
+	if (error) {
+		dev_err(dev, "unable to claim pl %u, err=%d\n",
+			pdata->pl, error);
+		goto err_free_gpio_cp;
+	}
+	
+	error = gpio_direction_output(pdata->pl, 1);
+	if (error) {
+		dev_err(dev,
+			"unable to set direction on pl %u, err=%d\n",
+			pdata->pl, error);
+		goto err_free_gpio_cp;
+	}
+
+	bdev->data->can_sleep = gpio_cansleep(pdata->q7);
+	bdev->data->can_sleep += gpio_cansleep(pdata->cp);
+	bdev->data->can_sleep += gpio_cansleep(pdata->pl);
+	bdev->data->last_state = -1;
+	bdev->data->threshold = DIV_ROUND_UP(pdata->debounce_interval,
+					pdata->poll_interval);
+	
+	for (i = 0; i < pdata->nbuttons; i++) {
+		struct gpio_keys_button *button = &pdata->buttons[i];
+		unsigned int type = button->type ?: EV_KEY;
+
+		if (button->wakeup) {
+			dev_err(dev, DRV_NAME " does not support wakeup\n");
+			error = -EINVAL;
+			goto err_free_gpio_pl;
+		}
+
+		input_set_capability(input, type, button->code);
+	}
+
+	bdev->poll_dev = poll_dev;
+	bdev->dev = dev;
+	bdev->pdata = pdata;
+	platform_set_drvdata(pdev, bdev);
+
+	error = input_register_polled_device(poll_dev);
+	if (error) {
+		dev_err(dev, "unable to register polled device, err=%d\n",
+			error);
+		goto err_free_gpio_pl;
+	}
+
+	return 0;
+
+err_free_gpio_pl:
+	gpio_free(pdata->pl);
+err_free_gpio_cp:
+	gpio_free(pdata->cp);
+err_free_gpio_q7:
+	gpio_free(pdata->q7);
+err_poll_dev:
+	input_free_polled_device(poll_dev);
+
+err_free_bdev:
+	kfree(bdev);
+
+	platform_set_drvdata(pdev, NULL);
+	return error;
+}
+
+static int __devexit gpio_keys_polled_remove(struct platform_device *pdev)
+{
+	struct gpio_keys_polled_dev *bdev = platform_get_drvdata(pdev);
+	struct gen_74x165_platform_data *pdata = bdev->pdata;
+
+	input_unregister_polled_device(bdev->poll_dev);
+
+	gpio_free(pdata->q7);
+	gpio_free(pdata->cp);
+	gpio_free(pdata->pl);
+
+	input_free_polled_device(bdev->poll_dev);
+
+	kfree(bdev);
+	platform_set_drvdata(pdev, NULL);
+
+	return 0;
+}
+
+static struct platform_driver gpio_keys_polled_driver = {
+	.probe	= gpio_keys_polled_probe,
+	.remove	= __devexit_p(gpio_keys_polled_remove),
+	.driver	= {
+		.name	= DRV_NAME,
+		.owner	= THIS_MODULE,
+	},
+};
+
+static int __init gpio_keys_polled_init(void)
+{
+	return platform_driver_register(&gpio_keys_polled_driver);
+}
+
+static void __exit gpio_keys_polled_exit(void)
+{
+	platform_driver_unregister(&gpio_keys_polled_driver);
+}
+
+module_init(gpio_keys_polled_init);
+module_exit(gpio_keys_polled_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Tanghaifeng <rou.ru.cai.hong@gmail.com>");
+MODULE_DESCRIPTION("74x165 Polled GPIO Buttons driver");
+MODULE_ALIAS("platform:" DRV_NAME);
diff -uNra linux-3.0.82/drivers/input/keyboard/Kconfig linux-3.0.82x/drivers/input/keyboard/Kconfig
--- linux-3.0.82/drivers/input/keyboard/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/input/keyboard/Kconfig	2017-09-23 03:42:49.430676860 +0800
@@ -203,6 +203,23 @@
 	  To compile this driver as a module, choose M here: the
 	  module will be called gpio_keys_polled.
 
+config KEYBOARD_74X165_GPIO_POLLED
+	tristate "74x165 Polled GPIO buttons"
+	depends on GENERIC_GPIO
+	select INPUT_POLLDEV
+	help
+	  This driver implements support for buttons connected
+	  to 74x165 chip(8-bit parallel-in/serial out shift register) 
+	  that are not capable of generating interrupts.
+
+	  Say Y here if your device has buttons connected
+	  directly to such GPIO pins.  Your board-specific
+	  setup logic must also provide a platform device,
+	  with configuration data saying which GPIOs are used.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called gpio_keys_polled.
+
 config KEYBOARD_TCA6416
 	tristate "TCA6416/TCA6408A Keypad Support"
 	depends on I2C
diff -uNra linux-3.0.82/drivers/input/keyboard/Makefile linux-3.0.82x/drivers/input/keyboard/Makefile
--- linux-3.0.82/drivers/input/keyboard/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/input/keyboard/Makefile	2017-09-23 03:42:49.430676860 +0800
@@ -4,6 +4,7 @@
 
 # Each configuration option enables a list of files.
 
+obj-$(CONFIG_KEYBOARD_74X165_GPIO_POLLED)	+= 74x165_gpio_keys_polled.o
 obj-$(CONFIG_KEYBOARD_ADP5520)		+= adp5520-keys.o
 obj-$(CONFIG_KEYBOARD_ADP5588)		+= adp5588-keys.o
 obj-$(CONFIG_KEYBOARD_ADP5589)		+= adp5589-keys.o
diff -uNra linux-3.0.82/drivers/input/keyboard/matrix_keypad.c linux-3.0.82x/drivers/input/keyboard/matrix_keypad.c
--- linux-3.0.82/drivers/input/keyboard/matrix_keypad.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/input/keyboard/matrix_keypad.c	2017-09-23 03:42:49.430676860 +0800
@@ -341,7 +341,8 @@
 		}
 	} else {
 		for (i = 0; i < pdata->num_row_gpios; i++) {
-			err = request_irq(gpio_to_irq(pdata->row_gpios[i]),
+//			err = request_irq(gpio_to_irq(pdata->row_gpios[i]),
+			err = request_threaded_irq(gpio_to_irq(pdata->row_gpios[i]), NULL, 
 					matrix_keypad_interrupt,
 					IRQF_DISABLED |
 					IRQF_TRIGGER_RISING |
diff -uNra linux-3.0.82/drivers/input/misc/rotary_encoder.c linux-3.0.82x/drivers/input/misc/rotary_encoder.c
--- linux-3.0.82/drivers/input/misc/rotary_encoder.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/input/misc/rotary_encoder.c	2017-09-23 03:42:49.430676860 +0800
@@ -36,11 +36,15 @@
 
 	unsigned int irq_a;
 	unsigned int irq_b;
+	unsigned int irq_c;
 
 	bool armed;
 	unsigned char dir;	/* 0 - clockwise, 1 - CCW */
 
 	char last_stable;
+	
+	struct delayed_work work;
+	spinlock_t lock;
 };
 
 static int rotary_encoder_get_state(struct rotary_encoder_platform_data *pdata)
@@ -140,6 +144,42 @@
 	return IRQ_HANDLED;
 }
 
+static void report_key(struct work_struct *work)
+{
+	struct rotary_encoder *encoder =
+		container_of(work, struct rotary_encoder, work.work);
+	struct input_dev *input_dev = encoder->input;
+	struct rotary_encoder_platform_data *pdata = encoder->pdata;
+	int state = (gpio_get_value_cansleep(pdata->gpio_c) ? 1 : 0) ^ pdata->active_low;
+
+	if (state) {
+		input_report_key(input_dev, pdata->key, state);
+		input_sync(input_dev);
+	}
+	input_report_key(input_dev, pdata->key, 0);
+	input_sync(input_dev);
+	
+	/* Enable IRQs again */
+	spin_lock_irq(&encoder->lock);
+	enable_irq(encoder->irq_c);
+	spin_unlock_irq(&encoder->lock);
+}
+
+static irqreturn_t key_interrupt(int irq, void *dev_id)
+{
+	struct rotary_encoder *encoder = dev_id;
+	unsigned long flags;
+
+	spin_lock_irqsave(&encoder->lock, flags);
+	
+	disable_irq_nosync(encoder->irq_c);
+	schedule_delayed_work(&encoder->work,
+		msecs_to_jiffies(encoder->pdata->debounce_ms));
+
+	spin_unlock_irqrestore(&encoder->lock, flags);
+	return IRQ_HANDLED;
+}
+
 static int __devinit rotary_encoder_probe(struct platform_device *pdev)
 {
 	struct rotary_encoder_platform_data *pdata = pdev->dev.platform_data;
@@ -165,6 +205,9 @@
 	encoder->pdata = pdata;
 	encoder->irq_a = gpio_to_irq(pdata->gpio_a);
 	encoder->irq_b = gpio_to_irq(pdata->gpio_b);
+	if (pdata->key) {
+		encoder->irq_c = gpio_to_irq(pdata->gpio_c);
+	}
 
 	/* create and register the input driver */
 	input->name = pdev->name;
@@ -179,6 +222,13 @@
 		input_set_abs_params(encoder->input,
 				     pdata->axis, 0, pdata->steps, 0, 1);
 	}
+	
+	if (pdata->key) {
+		input->evbit[0] |= BIT_MASK(EV_KEY);
+		__set_bit(pdata->key, input->keybit);
+		INIT_DELAYED_WORK(&encoder->work, report_key);
+		spin_lock_init(&encoder->lock);
+	}
 
 	err = input_register_device(input);
 	if (err) {
@@ -214,6 +264,22 @@
 			pdata->gpio_b);
 		goto exit_free_gpio_a;
 	}
+	
+	if (pdata->key) {
+		err = gpio_request(pdata->gpio_c, DRV_NAME);
+		if (err) {
+			dev_err(&pdev->dev, "unable to request GPIO %d\n",
+				pdata->gpio_c);
+			goto exit_free_gpio_b;
+		}
+
+		err = gpio_direction_input(pdata->gpio_c);
+		if (err) {
+			dev_err(&pdev->dev, "unable to set GPIO %d for input\n",
+				pdata->gpio_c);
+			goto exit_free_gpio_b;
+		}
+	}
 
 	/* request the IRQs */
 	if (pdata->half_period) {
@@ -229,7 +295,7 @@
 	if (err) {
 		dev_err(&pdev->dev, "unable to request IRQ %d\n",
 			encoder->irq_a);
-		goto exit_free_gpio_b;
+		goto exit_free_gpio_c;
 	}
 
 	err = request_irq(encoder->irq_b, handler,
@@ -241,12 +307,29 @@
 		goto exit_free_irq_a;
 	}
 
+	if (pdata->key) {
+		err = request_irq(encoder->irq_c, key_interrupt,
+			  IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+			  DRV_NAME, encoder);
+		if (err) {
+			dev_err(&pdev->dev, "unable to request IRQ %d\n",
+				encoder->irq_c);
+			goto exit_free_irq_b;
+		}
+	}
+
 	platform_set_drvdata(pdev, encoder);
 
 	return 0;
 
+exit_free_irq_b:
+	free_irq(encoder->irq_b, encoder);
 exit_free_irq_a:
 	free_irq(encoder->irq_a, encoder);
+exit_free_gpio_c:
+	if (pdata->key) {
+		gpio_free(pdata->gpio_c);
+	}
 exit_free_gpio_b:
 	gpio_free(pdata->gpio_b);
 exit_free_gpio_a:
@@ -269,6 +352,9 @@
 	free_irq(encoder->irq_b, encoder);
 	gpio_free(pdata->gpio_a);
 	gpio_free(pdata->gpio_b);
+	if (pdata->key) {
+		gpio_free(pdata->gpio_c);
+	}
 	input_unregister_device(encoder->input);
 	platform_set_drvdata(pdev, NULL);
 	kfree(encoder);
diff -uNra linux-3.0.82/drivers/input/serio/i8042.h linux-3.0.82x/drivers/input/serio/i8042.h
--- linux-3.0.82/drivers/input/serio/i8042.h	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/input/serio/i8042.h	2017-09-23 03:42:49.434676848 +0800
@@ -28,6 +28,8 @@
 #include "i8042-x86ia64io.h"
 #elif defined(CONFIG_UNICORE32)
 #include "i8042-unicore32io.h"
+#elif defined(CONFIG_LS1A_MACH)
+#include "i8042-ls1a.h"
 #else
 #include "i8042-io.h"
 #endif
diff -uNra linux-3.0.82/drivers/input/serio/i8042-ls1a.h linux-3.0.82x/drivers/input/serio/i8042-ls1a.h
--- linux-3.0.82/drivers/input/serio/i8042-ls1a.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/input/serio/i8042-ls1a.h	2017-09-23 03:42:49.434676848 +0800
@@ -0,0 +1,91 @@
+#ifndef _I8042_SB2FIO_H
+#define _I8042_SB2FIO_H
+
+/*
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+
+#include <linux/clk.h>
+#include <ls1b_board.h>
+
+/*
+ * Names.
+ */
+
+#define I8042_KBD_PHYS_DESC "isa0060/serio0"
+#define I8042_AUX_PHYS_DESC "isa0060/serio1"
+#define I8042_MUX_PHYS_DESC "isa0060/serio%d"
+
+/*
+ * IRQs.
+ */
+
+#include <asm/irq.h>
+# define I8042_KBD_IRQ	12
+# define I8042_AUX_IRQ	11
+
+/*
+ * Register numbers.
+ */
+#define LS1X_PS2_REG(x) \
+		((void __iomem *)KSEG1ADDR(LS1X_PS2_BASE + (x)))
+
+#define I8042_COMMAND_REG		LS1X_PS2_REG(0x4)
+#define I8042_STATUS_REG		LS1X_PS2_REG(0x4)
+#define I8042_DATA_REG		LS1X_PS2_REG(0x0)
+
+#define DLL_REG		LS1X_PS2_REG(0x8)
+#define DLH_REG		LS1X_PS2_REG(0x9)
+#define DL_KBD_REG		LS1X_PS2_REG(0xa)
+#define DL_AUX_REG		LS1X_PS2_REG(0xb)
+
+static inline int i8042_read_data(void)
+{
+	return __raw_readb(I8042_DATA_REG);
+}
+
+static inline int i8042_read_status(void)
+{
+	return __raw_readb(I8042_STATUS_REG);
+}
+
+static inline void i8042_write_data(int val)
+{ 
+	__raw_writeb(val, I8042_DATA_REG);
+}
+
+static inline void i8042_write_command(int val)
+{
+	__raw_writeb(val, I8042_COMMAND_REG);
+}
+
+static inline int i8042_platform_init(void)
+{
+/*
+ * On some platforms touching the i8042 data register region can do really
+ * bad things. Because of this the region is always reserved on such boxes.
+ */
+ 	struct clk *clk;
+ 	unsigned int div;
+ 	
+ 	clk = clk_get(NULL, "ddr");
+	if (IS_ERR(clk))
+		panic("unable to get dc clock, err=%ld", PTR_ERR(clk));
+	div = clk_get_rate(clk) / 2 / 150000;
+	__raw_writeb(div & 0xff, DLL_REG);
+	__raw_writeb((div >> 8) & 0xff, DLH_REG);
+	__raw_writeb(0xa, DL_KBD_REG);
+	__raw_writeb(0xa, DL_AUX_REG);
+
+	i8042_reset = 1;
+
+	return 0;
+}
+
+static inline void i8042_platform_exit(void)
+{
+}
+
+#endif /* _I8042_IO_H */
diff -uNra linux-3.0.82/drivers/input/touchscreen/ft5x06_ts.c linux-3.0.82x/drivers/input/touchscreen/ft5x06_ts.c
--- linux-3.0.82/drivers/input/touchscreen/ft5x06_ts.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/input/touchscreen/ft5x06_ts.c	2017-09-23 03:42:49.434676848 +0800
@@ -0,0 +1,1112 @@
+/* 
+ * drivers/input/touchscreen/ft5x0x_ts.c
+ *
+ * FocalTech ft5x0x TouchScreen driver. 
+ *
+ * Copyright (c) 2010  Focal tech Ltd.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * VERSION      	DATE			AUTHOR
+ *    1.0		  2010-01-05			WenFS
+ *
+ * note: only support multitouch	Wenfs 2010-10-01
+ */
+
+
+
+#include <linux/i2c.h>
+#include <linux/input.h>
+#include <linux/i2c/ft5x06_ts.h>
+#include <linux/earlysuspend.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+//#include <asm/jzsoc.h>
+
+/* Debugging stuff */
+#ifdef CONFIG_FT5X06_TS_DEBUG
+static int debug	   = 1;
+#else
+static int debug	   = 0;
+#endif
+#define dprintk(msg...)	if (debug) { printk(KERN_DEBUG "ls1bfb: " msg); }
+
+static struct i2c_client *this_client;
+static struct ft5x0x_ts_platform_data *pdata;
+
+//#define CONFIG_FT5X0X_MULTITOUCH 1
+
+struct ts_event {
+	u16	x1;
+	u16	y1;
+	u16	x2;
+	u16	y2;
+	u16	x3;
+	u16	y3;
+	u16	x4;
+	u16	y4;
+	u16	x5;
+	u16	y5;
+	u16	pressure;
+    u8  touch_point;
+};
+
+struct ft5x0x_ts_data {
+	struct input_dev	*input_dev;
+	struct ts_event		event;
+	struct work_struct 	pen_event_work;
+	struct workqueue_struct *ts_workqueue;
+	struct early_suspend	early_suspend;
+};
+
+/***********************************************************************************************
+Name	:	ft5x0x_i2c_rxdata 
+
+Input	:	*rxdata
+                     *length
+
+Output	:	ret
+
+function	:	
+
+***********************************************************************************************/
+static int ft5x0x_i2c_rxdata(char *rxdata, int length)
+{
+	int ret;
+
+	struct i2c_msg msgs[] = {
+		{
+			.addr	= this_client->addr,
+			.flags	= 0,
+			.len	= 1,
+			.buf	= rxdata,
+		},
+		{
+			.addr	= this_client->addr,
+			.flags	= I2C_M_RD,
+			.len	= length,
+			.buf	= rxdata,
+		},
+	};
+
+    //msleep(1);
+	ret = i2c_transfer(this_client->adapter, msgs, 2);
+	if (ret < 0)
+		pr_err("msg %s i2c read error: %d\n", __func__, ret);
+	
+	return ret;
+}
+/***********************************************************************************************
+Name	:	 
+
+Input	:	
+                     
+
+Output	:	
+
+function	:	
+
+***********************************************************************************************/
+static int ft5x0x_i2c_txdata(char *txdata, int length)
+{
+	int ret;
+
+	struct i2c_msg msg[] = {
+		{
+			.addr	= this_client->addr,
+			.flags	= 0,
+			.len	= length,
+			.buf	= txdata,
+		},
+	};
+
+   	//msleep(1);
+	ret = i2c_transfer(this_client->adapter, msg, 1);
+	if (ret < 0)
+		pr_err("%s i2c write error: %d\n", __func__, ret);
+
+	return ret;
+}
+/***********************************************************************************************
+Name	:	 ft5x0x_write_reg
+
+Input	:	addr -- address
+                     para -- parameter
+
+Output	:	
+
+function	:	write register of ft5x0x
+
+***********************************************************************************************/
+static int ft5x0x_write_reg(u8 addr, u8 para)
+{
+    u8 buf[3];
+    int ret = -1;
+
+    buf[0] = addr;
+    buf[1] = para;
+    ret = ft5x0x_i2c_txdata(buf, 2);
+    if (ret < 0) {
+        pr_err("write reg failed! %#x ret: %d", buf[0], ret);
+        return -1;
+    }
+    
+    return 0;
+}
+
+
+/***********************************************************************************************
+Name	:	ft5x0x_read_reg 
+
+Input	:	addr
+                     pdata
+
+Output	:	
+
+function	:	read register of ft5x0x
+
+***********************************************************************************************/
+static int ft5x0x_read_reg(u8 addr, u8 *pdata)
+{
+	int ret;
+	u8 buf[2] = {0};
+	struct i2c_msg msgs[] = {
+		{
+			.addr	= this_client->addr,
+			.flags	= 0,
+			.len	= 1,
+			.buf	= buf,
+		},
+		{
+			.addr	= this_client->addr,
+			.flags	= I2C_M_RD,
+			.len	= 1,
+			.buf	= buf,
+		},
+	};
+	
+	buf[0] = addr;
+
+    //msleep(1);
+	ret = i2c_transfer(this_client->adapter, msgs, 2);
+	if (ret < 0)
+		pr_err("msg %s i2c read error: %d\n", __func__, ret);
+
+	*pdata = buf[0];
+	return ret;
+  
+}
+
+
+/***********************************************************************************************
+Name	:	 ft5x0x_read_fw_ver
+
+Input	:	 void
+                     
+
+Output	:	 firmware version 	
+
+function	:	 read TP firmware version
+
+***********************************************************************************************/
+static unsigned char ft5x0x_read_fw_ver(void)
+{
+	unsigned char ver;
+	ft5x0x_read_reg(FT5X0X_REG_FIRMID, &ver);
+	return(ver);
+}
+
+
+#define CONFIG_SUPPORT_FTS_CTP_UPG
+
+
+#ifdef CONFIG_SUPPORT_FTS_CTP_UPG
+
+typedef enum
+{
+    ERR_OK,
+    ERR_MODE,
+    ERR_READID,
+    ERR_ERASE,
+    ERR_STATUS,
+    ERR_ECC,
+    ERR_DL_ERASE_FAIL,
+    ERR_DL_PROGRAM_FAIL,
+    ERR_DL_VERIFY_FAIL
+}E_UPGRADE_ERR_TYPE;
+
+typedef unsigned char         FTS_BYTE;     //8 bit
+typedef unsigned short        FTS_WORD;    //16 bit
+typedef unsigned int          FTS_DWRD;    //16 bit
+typedef unsigned char         FTS_BOOL;    //8 bit
+
+#define FTS_NULL                0x0
+#define FTS_TRUE                0x01
+#define FTS_FALSE              0x0
+
+#define I2C_CTPM_ADDRESS       0x70
+
+
+void delay_qt_ms(unsigned long  w_ms)
+{
+    unsigned long i;
+    unsigned long j;
+
+    for (i = 0; i < w_ms; i++)
+    {
+        for (j = 0; j < 1000; j++)
+        {
+            udelay(1);
+        }
+    }
+}
+
+
+/*
+[function]: 
+    callback: read data from ctpm by i2c interface,implemented by special user;
+[parameters]:
+    bt_ctpm_addr[in]    :the address of the ctpm;
+    pbt_buf[out]        :data buffer;
+    dw_lenth[in]        :the length of the data buffer;
+[return]:
+    FTS_TRUE     :success;
+    FTS_FALSE    :fail;
+*/
+FTS_BOOL i2c_read_interface(FTS_BYTE bt_ctpm_addr, FTS_BYTE* pbt_buf, FTS_DWRD dw_lenth)
+{
+	int ret;
+
+	ret=i2c_master_recv(this_client, pbt_buf, dw_lenth);
+
+	if(ret<=0){
+		dprintk("[TSP]i2c_read_interface error\n");
+		return FTS_FALSE;
+	}
+
+	return FTS_TRUE;
+}
+
+/*
+[function]: 
+    callback: write data to ctpm by i2c interface,implemented by special user;
+[parameters]:
+    bt_ctpm_addr[in]    :the address of the ctpm;
+    pbt_buf[in]        :data buffer;
+    dw_lenth[in]        :the length of the data buffer;
+[return]:
+    FTS_TRUE     :success;
+    FTS_FALSE    :fail;
+*/
+FTS_BOOL i2c_write_interface(FTS_BYTE bt_ctpm_addr, FTS_BYTE* pbt_buf, FTS_DWRD dw_lenth)
+{
+	int ret;
+	ret=i2c_master_send(this_client, pbt_buf, dw_lenth);
+	if(ret<=0){
+		dprintk("[TSP]i2c_write_interface error line = %d, ret = %d\n", __LINE__, ret);
+		return FTS_FALSE;
+	}
+
+	return FTS_TRUE;
+}
+
+/*
+[function]: 
+    send a command to ctpm.
+[parameters]:
+    btcmd[in]        :command code;
+    btPara1[in]    :parameter 1;    
+    btPara2[in]    :parameter 2;    
+    btPara3[in]    :parameter 3;    
+    num[in]        :the valid input parameter numbers, if only command code needed and no parameters followed,then the num is 1;    
+[return]:
+    FTS_TRUE    :success;
+    FTS_FALSE    :io fail;
+*/
+FTS_BOOL cmd_write(FTS_BYTE btcmd,FTS_BYTE btPara1,FTS_BYTE btPara2,FTS_BYTE btPara3,FTS_BYTE num)
+{
+    FTS_BYTE write_cmd[4] = {0};
+
+    write_cmd[0] = btcmd;
+    write_cmd[1] = btPara1;
+    write_cmd[2] = btPara2;
+    write_cmd[3] = btPara3;
+    return i2c_write_interface(I2C_CTPM_ADDRESS, write_cmd, num);
+}
+
+/*
+[function]: 
+    write data to ctpm , the destination address is 0.
+[parameters]:
+    pbt_buf[in]    :point to data buffer;
+    bt_len[in]        :the data numbers;    
+[return]:
+    FTS_TRUE    :success;
+    FTS_FALSE    :io fail;
+*/
+FTS_BOOL byte_write(FTS_BYTE* pbt_buf, FTS_DWRD dw_len)
+{
+    
+    return i2c_write_interface(I2C_CTPM_ADDRESS, pbt_buf, dw_len);
+}
+
+/*
+[function]: 
+    read out data from ctpm,the destination address is 0.
+[parameters]:
+    pbt_buf[out]    :point to data buffer;
+    bt_len[in]        :the data numbers;    
+[return]:
+    FTS_TRUE    :success;
+    FTS_FALSE    :io fail;
+*/
+FTS_BOOL byte_read(FTS_BYTE* pbt_buf, FTS_BYTE bt_len)
+{
+    return i2c_read_interface(I2C_CTPM_ADDRESS, pbt_buf, bt_len);
+}
+
+
+/*
+[function]: 
+    burn the FW to ctpm.
+[parameters]:(ref. SPEC)
+    pbt_buf[in]    :point to Head+FW ;
+    dw_lenth[in]:the length of the FW + 6(the Head length);    
+    bt_ecc[in]    :the ECC of the FW
+[return]:
+    ERR_OK        :no error;
+    ERR_MODE    :fail to switch to UPDATE mode;
+    ERR_READID    :read id fail;
+    ERR_ERASE    :erase chip fail;
+    ERR_STATUS    :status error;
+    ERR_ECC        :ecc error.
+*/
+
+
+#define    FTS_PACKET_LENGTH        128
+
+static unsigned char CTPM_FW[]=
+{
+//#include "ft_app.i"
+};
+
+E_UPGRADE_ERR_TYPE  fts_ctpm_fw_upgrade(FTS_BYTE* pbt_buf, FTS_DWRD dw_lenth)
+{
+    FTS_BYTE reg_val[2] = {0};
+    FTS_DWRD i = 0;
+
+    FTS_DWRD  packet_number;
+    FTS_DWRD  j;
+    FTS_DWRD  temp;
+    FTS_DWRD  lenght;
+    FTS_BYTE  packet_buf[FTS_PACKET_LENGTH + 6];
+    FTS_BYTE  auc_i2c_write_buf[10];
+    FTS_BYTE bt_ecc;
+    int      i_ret;
+
+    /*********Step 1:Reset  CTPM *****/
+    /*write 0xaa to register 0xfc*/
+    ft5x0x_write_reg(0xfc,0xaa);
+    delay_qt_ms(50);
+     /*write 0x55 to register 0xfc*/
+    ft5x0x_write_reg(0xfc,0x55);
+    dprintk("[TSP] Step 1: Reset CTPM test\n");
+   
+    delay_qt_ms(30);   
+
+
+    /*********Step 2:Enter upgrade mode *****/
+    auc_i2c_write_buf[0] = 0x55;
+    auc_i2c_write_buf[1] = 0xaa;
+    do
+    {
+        i ++;
+        i_ret = ft5x0x_i2c_txdata(auc_i2c_write_buf, 2);
+        delay_qt_ms(5);
+    }while(i_ret <= 0 && i < 5 );
+
+    /*********Step 3:check READ-ID***********************/        
+    cmd_write(0x90,0x00,0x00,0x00,4);
+    byte_read(reg_val,2);
+    if (reg_val[0] == 0x79 && reg_val[1] == 0x3)
+    {
+        dprintk("[TSP] Step 3: CTPM ID,ID1 = 0x%x,ID2 = 0x%x\n",reg_val[0],reg_val[1]);
+    }
+    else
+    {
+        return ERR_READID;
+        //i_is_new_protocol = 1;
+    }
+
+     /*********Step 4:erase app*******************************/
+    cmd_write(0x61,0x00,0x00,0x00,1);
+   
+    delay_qt_ms(1500);
+    dprintk("[TSP] Step 4: erase. \n");
+
+    /*********Step 5:write firmware(FW) to ctpm flash*********/
+    bt_ecc = 0;
+    dprintk("[TSP] Step 5: start upgrade. \n");
+    dw_lenth = dw_lenth - 8;
+    packet_number = (dw_lenth) / FTS_PACKET_LENGTH;
+    packet_buf[0] = 0xbf;
+    packet_buf[1] = 0x00;
+    for (j=0;j<packet_number;j++)
+    {
+        temp = j * FTS_PACKET_LENGTH;
+        packet_buf[2] = (FTS_BYTE)(temp>>8);
+        packet_buf[3] = (FTS_BYTE)temp;
+        lenght = FTS_PACKET_LENGTH;
+        packet_buf[4] = (FTS_BYTE)(lenght>>8);
+        packet_buf[5] = (FTS_BYTE)lenght;
+
+        for (i=0;i<FTS_PACKET_LENGTH;i++)
+        {
+            packet_buf[6+i] = pbt_buf[j*FTS_PACKET_LENGTH + i]; 
+            bt_ecc ^= packet_buf[6+i];
+        }
+        
+        byte_write(&packet_buf[0],FTS_PACKET_LENGTH + 6);
+        delay_qt_ms(FTS_PACKET_LENGTH/6 + 1);
+        if ((j * FTS_PACKET_LENGTH % 1024) == 0)
+        {
+              dprintk("[TSP] upgrade the 0x%x th byte.\n", ((unsigned int)j) * FTS_PACKET_LENGTH);
+        }
+    }
+
+    if ((dw_lenth) % FTS_PACKET_LENGTH > 0)
+    {
+        temp = packet_number * FTS_PACKET_LENGTH;
+        packet_buf[2] = (FTS_BYTE)(temp>>8);
+        packet_buf[3] = (FTS_BYTE)temp;
+
+        temp = (dw_lenth) % FTS_PACKET_LENGTH;
+        packet_buf[4] = (FTS_BYTE)(temp>>8);
+        packet_buf[5] = (FTS_BYTE)temp;
+
+        for (i=0;i<temp;i++)
+        {
+            packet_buf[6+i] = pbt_buf[ packet_number*FTS_PACKET_LENGTH + i]; 
+            bt_ecc ^= packet_buf[6+i];
+        }
+
+        byte_write(&packet_buf[0],temp+6);    
+        delay_qt_ms(20);
+    }
+
+    //send the last six byte
+    for (i = 0; i<6; i++)
+    {
+        temp = 0x6ffa + i;
+        packet_buf[2] = (FTS_BYTE)(temp>>8);
+        packet_buf[3] = (FTS_BYTE)temp;
+        temp =1;
+        packet_buf[4] = (FTS_BYTE)(temp>>8);
+        packet_buf[5] = (FTS_BYTE)temp;
+        packet_buf[6] = pbt_buf[ dw_lenth + i]; 
+        bt_ecc ^= packet_buf[6];
+
+        byte_write(&packet_buf[0],7);  
+        delay_qt_ms(20);
+    }
+
+    /*********Step 6: read out checksum***********************/
+    /*send the opration head*/
+    cmd_write(0xcc,0x00,0x00,0x00,1);
+    byte_read(reg_val,1);
+    dprintk("[TSP] Step 6:  ecc read 0x%x, new firmware 0x%x. \n", reg_val[0], bt_ecc);
+    if(reg_val[0] != bt_ecc)
+    {
+        return ERR_ECC;
+    }
+
+    /*********Step 7: reset the new FW***********************/
+    cmd_write(0x07,0x00,0x00,0x00,1);
+
+    return ERR_OK;
+}
+
+
+int fts_ctpm_fw_upgrade_with_i_file(void)
+{
+   FTS_BYTE*     pbt_buf = FTS_NULL;
+   int i_ret;
+    
+    //=========FW upgrade========================*/
+   pbt_buf = CTPM_FW;
+   /*call the upgrade function*/
+   i_ret =  fts_ctpm_fw_upgrade(pbt_buf,sizeof(CTPM_FW));
+   if (i_ret != 0)
+   {
+       //error handling ...
+       //TBD
+   }
+
+   return i_ret;
+}
+
+unsigned char fts_ctpm_get_upg_ver(void)
+{
+    unsigned int ui_sz;
+    ui_sz = sizeof(CTPM_FW);
+    if (ui_sz > 2)
+    {
+        return CTPM_FW[ui_sz - 2];
+    }
+    else
+    {
+        //TBD, error handling?
+        return 0xff; //default value
+    }
+}
+
+#endif
+
+
+/***********************************************************************************************
+Name	:	 
+
+Input	:	
+                     
+
+Output	:	
+
+function	:	
+
+***********************************************************************************************/
+static void ft5x0x_ts_release(void)
+{
+	struct ft5x0x_ts_data *data = i2c_get_clientdata(this_client);
+#ifdef CONFIG_FT5X0X_MULTITOUCH	
+	input_report_abs(data->input_dev, ABS_MT_TOUCH_MAJOR, 0);
+#else
+	input_report_abs(data->input_dev, ABS_PRESSURE, 0);
+	input_report_key(data->input_dev, BTN_TOUCH, 0);
+#endif
+	input_sync(data->input_dev);
+}
+
+static int ft5x0x_read_data(void)
+{
+	struct ft5x0x_ts_data *data = i2c_get_clientdata(this_client);
+	struct ts_event *event = &data->event;
+//	u8 buf[14] = {0};
+	u8 buf[32] = {0};
+	int ret = -1;
+	int status = 0;
+
+#ifdef CONFIG_FT5X0X_MULTITOUCH
+//	ret = ft5x0x_i2c_rxdata(buf, 13);
+	ret = ft5x0x_i2c_rxdata(buf, 31);
+#else
+    ret = ft5x0x_i2c_rxdata(buf, 7);
+#endif
+    if (ret < 0) {
+		dprintk("%s read_data i2c_rxdata failed: %d\n", __func__, ret);
+		return ret;
+	}
+
+	memset(event, 0, sizeof(struct ts_event));
+//	event->touch_point = buf[2] & 0x03;// 0000 0011
+	event->touch_point = buf[2] & 0x07;// 000 0111
+
+    if (event->touch_point == 0) {
+        ft5x0x_ts_release();
+        return 1; 
+    }
+
+#ifdef CONFIG_FT5X0X_MULTITOUCH
+    switch (event->touch_point) {
+		case 5:
+			event->x5 = (s16)(buf[0x1b] & 0x0F)<<8 | (s16)buf[0x1c];
+			event->y5 = (s16)(buf[0x1d] & 0x0F)<<8 | (s16)buf[0x1e];
+			status = (s16)((buf[0x1b] & 0xc0) >> 6);
+			event->touch_ID5=(s16)(buf[0x1D] & 0xF0)>>4;
+			if (status == 1) {
+				ft5x0x_ts_release();
+			}
+		case 4:
+			event->x4 = (s16)(buf[0x15] & 0x0F)<<8 | (s16)buf[0x16];
+			event->y4 = (s16)(buf[0x17] & 0x0F)<<8 | (s16)buf[0x18];
+			status = (s16)((buf[0x15] & 0xc0) >> 6);
+			event->touch_ID4=(s16)(buf[0x17] & 0xF0)>>4;
+			if (status == 1) {
+				ft5x0x_ts_release();
+			}
+		case 3:
+			event->x3 = (s16)(buf[0x0f] & 0x0F)<<8 | (s16)buf[0x10];
+			event->y3 = (s16)(buf[0x11] & 0x0F)<<8 | (s16)buf[0x12];
+			status = (s16)((buf[0x0f] & 0xc0) >> 6);
+			event->touch_ID3=(s16)(buf[0x11] & 0xF0)>>4;
+			if (status == 1) {
+				ft5x0x_ts_release();
+			}
+		case 2:
+			event->x2 = (s16)(buf[9] & 0x0F)<<8 | (s16)buf[10];
+			event->y2 = (s16)(buf[11] & 0x0F)<<8 | (s16)buf[12];
+			status = (s16)((buf[0x9] & 0xc0) >> 6);
+			event->touch_ID2=(s16)(buf[0x0b] & 0xF0)>>4;
+			if (status == 1) {
+				ft5x0x_ts_release();
+			}
+		case 1:
+			event->x1 = (s16)(buf[3] & 0x0F)<<8 | (s16)buf[4];
+			event->y1 = (s16)(buf[5] & 0x0F)<<8 | (s16)buf[6];
+			status = (s16)((buf[0x3] & 0xc0) >> 6);
+			event->touch_ID1=(s16)(buf[0x05] & 0xF0)>>4;
+			if (status == 1) {
+				ft5x0x_ts_release();
+			}
+            break;
+		default:
+		    return -1;
+	}
+#else
+    if (event->touch_point == 1) {
+    	event->x1 = (s16)(buf[3] & 0x0F)<<8 | (s16)buf[4];
+		event->y1 = (s16)(buf[5] & 0x0F)<<8 | (s16)buf[6];
+    }
+#endif
+    event->pressure = 200;
+
+	dev_dbg(&this_client->dev, "%s: 1:%d %d 2:%d %d \n", __func__,
+		event->x1, event->y1, event->x2, event->y2);
+	//dprintk("%d (%d, %d), (%d, %d)\n", event->touch_point, event->x1, event->y1, event->x2, event->y2);
+
+    return 0;
+}
+/***********************************************************************************************
+Name	:	 
+
+Input	:	
+                     
+
+Output	:	
+
+function	:	
+
+***********************************************************************************************/
+static void ft5x0x_report_value(void)
+{
+	struct ft5x0x_ts_data *data = i2c_get_clientdata(this_client);
+	struct ts_event *event = &data->event;
+	u8 uVersion;
+
+//		dprintk("==ft5x0x_report_value =\n");
+#ifdef CONFIG_FT5X0X_MULTITOUCH
+	switch(event->touch_point) {
+		case 5:
+			input_report_abs(data->input_dev, ABS_MT_TOUCH_MAJOR, event->pressure);
+			input_report_abs(data->input_dev, ABS_MT_POSITION_X, event->x5);
+			input_report_abs(data->input_dev, ABS_MT_POSITION_Y, event->y5);
+			input_report_abs(data->input_dev, ABS_MT_WIDTH_MAJOR, 1);
+			input_mt_sync(data->input_dev);
+//			dprintk("===x2 = %d,y2 = %d ====\n",event->x2,event->y2);
+		case 4:
+			input_report_abs(data->input_dev, ABS_MT_TOUCH_MAJOR, event->pressure);
+			input_report_abs(data->input_dev, ABS_MT_POSITION_X, event->x4);
+			input_report_abs(data->input_dev, ABS_MT_POSITION_Y, event->y4);
+			input_report_abs(data->input_dev, ABS_MT_WIDTH_MAJOR, 1);
+			input_mt_sync(data->input_dev);
+//			dprintk("===x2 = %d,y2 = %d ====\n",event->x2,event->y2);
+		case 3:
+			input_report_abs(data->input_dev, ABS_MT_TOUCH_MAJOR, event->pressure);
+			input_report_abs(data->input_dev, ABS_MT_POSITION_X, event->x3);
+			input_report_abs(data->input_dev, ABS_MT_POSITION_Y, event->y3);
+			input_report_abs(data->input_dev, ABS_MT_WIDTH_MAJOR, 1);
+			input_mt_sync(data->input_dev);
+//			dprintk("===x2 = %d,y2 = %d ====\n",event->x2,event->y2);
+		case 2:
+			input_report_abs(data->input_dev, ABS_MT_TOUCH_MAJOR, event->pressure);
+			input_report_abs(data->input_dev, ABS_MT_POSITION_X, event->x2);
+			input_report_abs(data->input_dev, ABS_MT_POSITION_Y, event->y2);
+			input_report_abs(data->input_dev, ABS_MT_WIDTH_MAJOR, 1);
+			input_mt_sync(data->input_dev);
+//			dprintk("===x2 = %d,y2 = %d ====\n",event->x2,event->y2);
+		case 1:
+			input_report_abs(data->input_dev, ABS_MT_TOUCH_MAJOR, event->pressure);
+			input_report_abs(data->input_dev, ABS_MT_POSITION_X, event->x1);
+			input_report_abs(data->input_dev, ABS_MT_POSITION_Y, event->y1);
+			input_report_abs(data->input_dev, ABS_MT_WIDTH_MAJOR, 1);
+			input_mt_sync(data->input_dev);
+			dprintk("===x1 = %d,y1 = %d ====\n",event->x1,event->y1);
+
+		default:
+//			dprintk("==touch_point default =\n");
+			break;
+	}
+#else	/* CONFIG_FT5X0X_MULTITOUCH*/
+	if (event->touch_point == 1) {
+		input_report_abs(data->input_dev, ABS_X, event->x1);
+		input_report_abs(data->input_dev, ABS_Y, event->y1);
+		input_report_abs(data->input_dev, ABS_PRESSURE, event->pressure);
+	}
+	input_report_key(data->input_dev, BTN_TOUCH, 1);
+#endif	/* CONFIG_FT5X0X_MULTITOUCH*/
+	input_sync(data->input_dev);
+
+	dev_dbg(&this_client->dev, "%s: 1:%d %d 2:%d %d \n", __func__,
+		event->x1, event->y1, event->x2, event->y2);
+}	/*end ft5x0x_report_value*/
+/***********************************************************************************************
+Name	:	 
+
+Input	:	
+                     
+
+Output	:	
+
+function	:	
+
+***********************************************************************************************/
+static void ft5x0x_ts_pen_irq_work(struct work_struct *work)
+{
+	int ret = -1;
+//	dprintk("==work 1=\n");
+	ret = ft5x0x_read_data();	
+	if (ret == 0) {	
+		ft5x0x_report_value();
+	}
+	else dprintk("data package read error\n");
+//	dprintk("==work 2=\n");
+//    	msleep(1);
+//    enable_irq(this_client->irq);
+//	enable_irq(IRQ_EINT(6));
+}
+/***********************************************************************************************
+Name	:	 
+
+Input	:	
+                     
+
+Output	:	
+
+function	:	
+
+***********************************************************************************************/
+static irqreturn_t ft5x0x_ts_interrupt(int irq, void *dev_id)
+{
+	struct ft5x0x_ts_data *ft5x0x_ts = dev_id;
+//	disable_irq(this_client->irq);		
+//	disable_irq(IRQ_EINT(6));
+//	dprintk("==int=\n");
+	if (!work_pending(&ft5x0x_ts->pen_event_work)) {
+		queue_work(ft5x0x_ts->ts_workqueue, &ft5x0x_ts->pen_event_work);
+	}
+
+	return IRQ_HANDLED;
+}
+#ifdef CONFIG_HAS_EARLYSUSPEND
+/***********************************************************************************************
+Name	:	 
+
+Input	:	
+                     
+
+Output	:	
+
+function	:	
+
+***********************************************************************************************/
+static void ft5x0x_ts_suspend(struct early_suspend *handler)
+{
+	struct ft5x0x_ts_data *ts;
+	ts =  container_of(handler, struct ft5x0x_ts_data, early_suspend);
+
+	dprintk("==ft5x0x_ts_suspend=\n");
+	disable_irq(this_client->irq);
+//	disable_irq(IRQ_EINT(6));
+	cancel_work_sync(&ts->pen_event_work);
+	flush_workqueue(ts->ts_workqueue);
+	// ==set mode ==, 
+    	ft5x0x_set_reg(FT5X0X_REG_PMODE, PMODE_HIBERNATE);
+}
+/***********************************************************************************************
+Name	:	 
+
+Input	:	
+                     
+
+Output	:	
+
+function	:	
+
+***********************************************************************************************/
+static void ft5x0x_ts_resume(struct early_suspend *handler)
+{
+	dprintk("==ft5x0x_ts_resume=\n");
+	// wake the mode
+//	__gpio_as_output(GPIO_FT5X0X_WAKE);		
+//	__gpio_clear_pin(GPIO_FT5X0X_WAKE);		//set wake = 0,base on system
+//	 msleep(100);
+//	__gpio_set_pin(GPIO_FT5X0X_WAKE);			//set wake = 1,base on system
+//	msleep(100);
+	if (pdata->init_platform_hw)
+		pdata->wake_platform_hw();
+	enable_irq(this_client->irq);
+//	enable_irq(IRQ_EINT(6));
+}
+#endif  //CONFIG_HAS_EARLYSUSPEND
+/***********************************************************************************************
+Name	:	 
+
+Input	:	
+                     
+
+Output	:	
+
+function	:	
+
+***********************************************************************************************/
+static int 
+ft5x0x_ts_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+	struct ft5x0x_ts_data *ft5x0x_ts;
+	struct input_dev *input_dev;
+	int err = 0;
+	unsigned char uc_reg_value; 
+	
+	dprintk("==ft5x0x_ts_probe=\n");
+	
+	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
+		err = -ENODEV;
+		goto exit_check_functionality_failed;
+	}
+
+	dprintk("==kzalloc=\n");
+	ft5x0x_ts = kzalloc(sizeof(*ft5x0x_ts), GFP_KERNEL);
+	if (!ft5x0x_ts)	{
+		err = -ENOMEM;
+		goto exit_alloc_data_failed;
+	}
+
+
+	this_client = client;
+	i2c_set_clientdata(client, ft5x0x_ts);
+
+
+	INIT_WORK(&ft5x0x_ts->pen_event_work, ft5x0x_ts_pen_irq_work);
+
+	ft5x0x_ts->ts_workqueue = create_singlethread_workqueue(dev_name(&client->dev));
+	if (!ft5x0x_ts->ts_workqueue) {
+		err = -ESRCH;
+		goto exit_create_singlethread;
+	}
+
+	pdata = client->dev.platform_data;
+	if (pdata == NULL) {
+		dev_err(&client->dev, "%s: platform data is null\n", __func__);
+		goto exit_platform_data_null;
+	}
+	/* ç”¨äºŽåˆ�å§‹åŒ–å¤–éƒ¨ä¸­æ–­æŽ¥å�£ */
+	if (pdata->init_platform_hw)
+		pdata->init_platform_hw();
+	
+//	dprintk("==request_irq=\n");
+//	err = request_irq(client->irq, ft5x0x_ts_interrupt, IRQF_DISABLED, "ft5x0x_ts", ft5x0x_ts);
+	err = request_irq(client->irq, ft5x0x_ts_interrupt, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "ft5x0x_ts", ft5x0x_ts);
+//	err = request_irq(IRQ_EINT(6), ft5x0x_ts_interrupt, IRQF_TRIGGER_FALLING, "ft5x0x_ts", ft5x0x_ts);
+	if (err < 0) {
+		dev_err(&client->dev, "ft5x0x_probe: request irq failed\n");
+		goto exit_irq_request_failed;
+	}
+
+//	__gpio_as_irq_fall_edge(pdata->intr);		//
+	disable_irq(this_client->irq);
+//	disable_irq(IRQ_EINT(6));
+
+//	dprintk("==input_allocate_device=\n");
+	input_dev = input_allocate_device();
+	if (!input_dev) {
+		err = -ENOMEM;
+		dev_err(&client->dev, "failed to allocate input device\n");
+		goto exit_input_dev_alloc_failed;
+	}
+	
+	ft5x0x_ts->input_dev = input_dev;
+
+#ifdef CONFIG_FT5X0X_MULTITOUCH
+	set_bit(ABS_MT_TOUCH_MAJOR, input_dev->absbit);
+	set_bit(ABS_MT_POSITION_X, input_dev->absbit);
+	set_bit(ABS_MT_POSITION_Y, input_dev->absbit);
+	set_bit(ABS_MT_WIDTH_MAJOR, input_dev->absbit);
+
+	input_set_abs_params(input_dev,
+			     ABS_MT_POSITION_X, 0, SCREEN_MAX_X, 0, 0);
+	input_set_abs_params(input_dev,
+			     ABS_MT_POSITION_Y, 0, SCREEN_MAX_Y, 0, 0);
+	input_set_abs_params(input_dev,
+			     ABS_MT_TOUCH_MAJOR, 0, PRESS_MAX, 0, 0);
+	input_set_abs_params(input_dev,
+			     ABS_MT_WIDTH_MAJOR, 0, 200, 0, 0);
+#else
+	set_bit(ABS_X, input_dev->absbit);
+	set_bit(ABS_Y, input_dev->absbit);
+	set_bit(ABS_PRESSURE, input_dev->absbit);
+	set_bit(BTN_TOUCH, input_dev->keybit);
+
+	input_set_abs_params(input_dev, ABS_X, 0, SCREEN_MAX_X, 0, 0);
+	input_set_abs_params(input_dev, ABS_Y, 0, SCREEN_MAX_Y, 0, 0);
+	input_set_abs_params(input_dev,
+			     ABS_PRESSURE, 0, PRESS_MAX, 0 , 0);
+#endif
+
+	set_bit(EV_ABS, input_dev->evbit);
+	set_bit(EV_KEY, input_dev->evbit);
+
+	input_dev->name		= FT5X0X_NAME;		//dev_name(&client->dev)
+	err = input_register_device(input_dev);
+	if (err) {
+		dev_err(&client->dev,
+		"ft5x0x_ts_probe: failed to register input device: %s\n",
+		dev_name(&client->dev));
+		goto exit_input_register_device_failed;
+	}
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+	dprintk("==register_early_suspend =\n");
+	ft5x0x_ts->early_suspend.level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN + 1;
+	ft5x0x_ts->early_suspend.suspend = ft5x0x_ts_suspend;
+	ft5x0x_ts->early_suspend.resume	= ft5x0x_ts_resume;
+	register_early_suspend(&ft5x0x_ts->early_suspend);
+#endif
+
+    msleep(50);
+    //get some register information
+    uc_reg_value = ft5x0x_read_fw_ver();
+    printk("[FST] Firmware version = 0x%x\n", uc_reg_value);
+
+
+//    fts_ctpm_fw_upgrade_with_i_file();
+
+
+    
+//wake the CTPM
+//	__gpio_as_output(GPIO_FT5X0X_WAKE);		
+//	__gpio_clear_pin(GPIO_FT5X0X_WAKE);		//set wake = 0,base on system
+//	 msleep(100);
+//	__gpio_set_pin(GPIO_FT5X0X_WAKE);			//set wake = 1,base on system
+//	msleep(100);
+	if (pdata->init_platform_hw)
+		pdata->wake_platform_hw();
+//	ft5x0x_set_reg(0x88, 0x05); //5, 6,7,8
+//	ft5x0x_set_reg(0x80, 30);
+//	msleep(50);
+    	enable_irq(this_client->irq);
+//    enable_irq(IRQ_EINT(6));
+
+	dprintk("==probe over =\n");
+    return 0;
+
+exit_input_register_device_failed:
+	input_free_device(input_dev);
+exit_input_dev_alloc_failed:
+	free_irq(client->irq, ft5x0x_ts);
+//	free_irq(IRQ_EINT(6), ft5x0x_ts);
+exit_irq_request_failed:
+exit_platform_data_null:
+	cancel_work_sync(&ft5x0x_ts->pen_event_work);
+	destroy_workqueue(ft5x0x_ts->ts_workqueue);
+exit_create_singlethread:
+	dprintk("==singlethread error =\n");
+	i2c_set_clientdata(client, NULL);
+	kfree(ft5x0x_ts);
+exit_alloc_data_failed:
+exit_check_functionality_failed:
+	return err;
+}
+/***********************************************************************************************
+Name	:	 
+
+Input	:	
+                     
+
+Output	:	
+
+function	:	
+
+***********************************************************************************************/
+static int __devexit ft5x0x_ts_remove(struct i2c_client *client)
+{
+	struct ft5x0x_ts_data *ft5x0x_ts = i2c_get_clientdata(client);
+	dprintk("==ft5x0x_ts_remove=\n");
+	unregister_early_suspend(&ft5x0x_ts->early_suspend);
+	free_irq(client->irq, ft5x0x_ts);
+//	free_irq(IRQ_EINT(6), ft5x0x_ts);
+	input_unregister_device(ft5x0x_ts->input_dev);
+	kfree(ft5x0x_ts);
+	cancel_work_sync(&ft5x0x_ts->pen_event_work);
+	destroy_workqueue(ft5x0x_ts->ts_workqueue);
+	i2c_set_clientdata(client, NULL);
+	return 0;
+}
+
+static const struct i2c_device_id ft5x0x_ts_id[] = {
+	{ FT5X0X_NAME, 0 },{ }
+};
+
+
+MODULE_DEVICE_TABLE(i2c, ft5x0x_ts_id);
+
+static struct i2c_driver ft5x0x_ts_driver = {
+	.probe		= ft5x0x_ts_probe,
+	.remove		= __devexit_p(ft5x0x_ts_remove),
+	.id_table	= ft5x0x_ts_id,
+	.driver	= {
+		.name	= FT5X0X_NAME,
+		.owner	= THIS_MODULE,
+	},
+};
+
+/***********************************************************************************************
+Name	:	 
+
+Input	:	
+                     
+
+Output	:	
+
+function	:	
+
+***********************************************************************************************/
+static int __init ft5x0x_ts_init(void)
+{
+	int ret;
+	printk("==ft5x0x_ts_init==\n");
+	ret = i2c_add_driver(&ft5x0x_ts_driver);
+	dprintk("ret=%d\n",ret);
+	return ret;
+//	return i2c_add_driver(&ft5x0x_ts_driver);
+}
+
+/***********************************************************************************************
+Name	:	 
+
+Input	:	
+                     
+
+Output	:	
+
+function	:	
+
+***********************************************************************************************/
+static void __exit ft5x0x_ts_exit(void)
+{
+	dprintk("==ft5x0x_ts_exit==\n");
+	i2c_del_driver(&ft5x0x_ts_driver);
+}
+
+module_init(ft5x0x_ts_init);
+module_exit(ft5x0x_ts_exit);
+
+MODULE_AUTHOR("<wenfs@Focaltech-systems.com>");
+MODULE_DESCRIPTION("FocalTech ft5x0x TouchScreen driver");
+MODULE_LICENSE("GPL");
diff -uNra linux-3.0.82/drivers/input/touchscreen/ft5x0x_ts.c linux-3.0.82x/drivers/input/touchscreen/ft5x0x_ts.c
--- linux-3.0.82/drivers/input/touchscreen/ft5x0x_ts.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/input/touchscreen/ft5x0x_ts.c	2017-09-23 03:42:49.434676848 +0800
@@ -0,0 +1,583 @@
+/* 
+ * drivers/input/touchscreen/ft5x0x_ts.c
+ *
+ * FocalTech ft5x0x TouchScreen driver. 
+ *
+ * Copyright (c) 2010  Focal tech Ltd.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ *	note: only support mulititouch	Wenfs 2010-10-01
+ */
+
+#include <linux/module.h>
+#include <linux/hrtimer.h>
+#include <linux/slab.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+
+#include <linux/i2c.h>
+#include <linux/input.h>
+#include <linux/i2c/ft5x06_ts.h>
+#include <linux/earlysuspend.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+//#include <asm/jzsoc.h>
+
+#undef DEBUG
+#undef DEBUG_0
+
+#ifdef DEBUG_0
+	#define TS_DEBUG(fmt,args...) printk(fmt, ##args )
+#else
+	#define TS_DEBUG(fmt,args...)
+#endif
+
+#ifdef DEBUG
+	#define TS_DEBUG1(fmt,args...) printk(fmt, ##args )
+#else
+	#define TS_DEBUG1(fmt,args...)
+#endif
+
+static struct i2c_client *this_client;
+static struct ft5x0x_ts_platform_data *pdata;
+
+//#define CONFIG_FT5X0X_MULTITOUCH 1
+
+struct ts_event {
+	u16	x1;
+	u16	y1;
+	u16	x2;
+	u16	y2;
+	u16	x3;
+	u16	y3;
+	u16	x4;
+	u16	y4;
+	u16	x5;
+	u16	y5;
+	u16	pressure;
+	s16 touch_ID1;
+	s16 touch_ID2;
+	s16 touch_ID3;
+	s16 touch_ID4;
+	s16 touch_ID5;
+    u8  touch_point;
+};
+
+struct ft5x0x_ts_data {
+	struct input_dev	*input_dev;
+	struct ts_event		event;
+	struct work_struct 	pen_event_work;
+	struct workqueue_struct *ts_workqueue;
+	struct early_suspend	early_suspend;
+};
+
+static int ft5x0x_i2c_rxdata(char *rxdata, int length)
+{
+	int ret;
+
+	struct i2c_msg msgs[] = {
+		{
+			.addr	= this_client->addr,
+			.flags	= 0,
+			.len	= 1,
+			.buf	= rxdata,
+		},
+		{
+			.addr	= this_client->addr,
+			.flags	= I2C_M_RD,
+			.len	= length,
+			.buf	= rxdata,
+		},
+	};
+
+    //msleep(1);
+	ret = i2c_transfer(this_client->adapter, msgs, 2);
+	if (ret < 0)
+		pr_err("msg %s i2c read error: %d\n", __func__, ret);
+	
+	return ret;
+}
+
+static int ft5x0x_i2c_txdata(char *txdata, int length)
+{
+	int ret;
+
+	struct i2c_msg msg[] = {
+		{
+			.addr	= this_client->addr,
+			.flags	= 0,
+			.len	= length,
+			.buf	= txdata,
+		},
+	};
+
+   	//msleep(1);
+	ret = i2c_transfer(this_client->adapter, msg, 1);
+	if (ret < 0)
+		pr_err("%s i2c write error: %d\n", __func__, ret);
+
+	return ret;
+}
+
+static int ft5x0x_set_reg(u8 addr, u8 para)
+{
+    u8 buf[3];
+    int ret = -1;
+
+    buf[0] = addr;
+    buf[1] = para;
+    ret = ft5x0x_i2c_txdata(buf, 2);
+    if (ret < 0) {
+        pr_err("write reg failed! %#x ret: %d", buf[0], ret);
+        return -1;
+    }
+    
+    return 0;
+}
+
+static void ft5x0x_ts_release(void)
+{
+	struct ft5x0x_ts_data *data = i2c_get_clientdata(this_client);
+	TS_DEBUG("ft5x0x_ts_release");
+#ifdef CONFIG_FT5X0X_MULTITOUCH
+	input_report_abs(data->input_dev, ABS_MT_TOUCH_MAJOR, 0);
+	input_report_abs(data->input_dev, ABS_MT_WIDTH_MAJOR, 0);
+#else
+	input_report_abs(data->input_dev, ABS_PRESSURE, 0);
+	input_report_key(data->input_dev, BTN_TOUCH, 0);
+#endif
+	input_sync(data->input_dev);
+}
+
+static int ft5x0x_read_data(void)
+{
+	struct ft5x0x_ts_data *data = i2c_get_clientdata(this_client);
+	struct ts_event *event = &data->event;
+//	u8 buf[14] = {0};
+	u8 buf[32] = {0};
+	int ret = -1;
+	int status = 0;
+
+#ifdef CONFIG_FT5X0X_MULTITOUCH
+//	ret = ft5x0x_i2c_rxdata(buf, 13);
+	ret = ft5x0x_i2c_rxdata(buf, 31);
+#else
+    ret = ft5x0x_i2c_rxdata(buf, 7);
+#endif
+    if (ret < 0) {
+		printk("%s read_data i2c_rxdata failed: %d\n", __func__, ret);
+		return ret;
+	}
+
+	memset(event, 0, sizeof(struct ts_event));
+//	event->touch_point = buf[2] & 0x03;// 0000 0011
+	event->touch_point = buf[2] & 0x07;// 000 0111
+
+    if (event->touch_point == 0) {
+        ft5x0x_ts_release();
+        return 1; 
+    }
+
+#ifdef CONFIG_FT5X0X_MULTITOUCH
+    switch (event->touch_point) {
+		case 5:
+			event->x5 = (s16)(buf[0x1b] & 0x0F)<<8 | (s16)buf[0x1c];
+			event->y5 = (s16)(buf[0x1d] & 0x0F)<<8 | (s16)buf[0x1e];
+			status = (s16)((buf[0x1b] & 0xc0) >> 6);
+			event->touch_ID5=(s16)(buf[0x1D] & 0xF0)>>4;
+			if (status == 1) {
+				ft5x0x_ts_release();
+			}
+		case 4:
+			event->x4 = (s16)(buf[0x15] & 0x0F)<<8 | (s16)buf[0x16];
+			event->y4 = (s16)(buf[0x17] & 0x0F)<<8 | (s16)buf[0x18];
+			status = (s16)((buf[0x15] & 0xc0) >> 6);
+			event->touch_ID4=(s16)(buf[0x17] & 0xF0)>>4;
+			if (status == 1) {
+				ft5x0x_ts_release();
+			}
+		case 3:
+			event->x3 = (s16)(buf[0x0f] & 0x0F)<<8 | (s16)buf[0x10];
+			event->y3 = (s16)(buf[0x11] & 0x0F)<<8 | (s16)buf[0x12];
+			status = (s16)((buf[0x0f] & 0xc0) >> 6);
+			event->touch_ID3=(s16)(buf[0x11] & 0xF0)>>4;
+			if (status == 1) {
+				ft5x0x_ts_release();
+			}
+		case 2:
+			event->x2 = (s16)(buf[9] & 0x0F)<<8 | (s16)buf[10];
+			event->y2 = (s16)(buf[11] & 0x0F)<<8 | (s16)buf[12];
+			status = (s16)((buf[0x9] & 0xc0) >> 6);
+			event->touch_ID2=(s16)(buf[0x0b] & 0xF0)>>4;
+			if (status == 1) {
+				ft5x0x_ts_release();
+			}
+		case 1:
+			event->x1 = (s16)(buf[3] & 0x0F)<<8 | (s16)buf[4];
+			event->y1 = (s16)(buf[5] & 0x0F)<<8 | (s16)buf[6];
+			status = (s16)((buf[0x3] & 0xc0) >> 6);
+			event->touch_ID1=(s16)(buf[0x05] & 0xF0)>>4;
+			if (status == 1) {
+				ft5x0x_ts_release();
+			}
+            break;
+		default:
+		    return -1;
+	}
+#else
+    if (event->touch_point == 1) {
+    	event->x1 = (s16)(buf[3] & 0x0F)<<8 | (s16)buf[4];
+		event->y1 = (s16)(buf[5] & 0x0F)<<8 | (s16)buf[6];
+    }
+#endif
+    event->pressure = 200;
+
+	dev_dbg(&this_client->dev, "%s: 1:%d %d 2:%d %d \n", __func__,
+		event->x1, event->y1, event->x2, event->y2);
+
+    return 0;
+}
+
+static void ft5x0x_report_value(void)
+{
+	struct ft5x0x_ts_data *data = i2c_get_clientdata(this_client);
+	struct ts_event *event = &data->event;
+
+		TS_DEBUG("==ft5x0x_report_value =\n");
+#ifdef CONFIG_FT5X0X_MULTITOUCH
+	switch(event->touch_point) {
+		case 5:
+			input_report_abs(data->input_dev, ABS_MT_TRACKING_ID, event->touch_ID5);
+			input_report_abs(data->input_dev, ABS_MT_TOUCH_MAJOR, event->pressure);
+			input_report_abs(data->input_dev, ABS_MT_POSITION_X, event->x5);
+			input_report_abs(data->input_dev, ABS_MT_POSITION_Y, event->y5);
+			input_report_abs(data->input_dev, ABS_MT_WIDTH_MAJOR, 1);
+			input_mt_sync(data->input_dev);
+			TS_DEBUG("===x2 = %d,y2 = %d ====\n",event->x2,event->y2);
+		case 4:
+			input_report_abs(data->input_dev, ABS_MT_TRACKING_ID, event->touch_ID4);
+			input_report_abs(data->input_dev, ABS_MT_TOUCH_MAJOR, event->pressure);
+			input_report_abs(data->input_dev, ABS_MT_POSITION_X, event->x4);
+			input_report_abs(data->input_dev, ABS_MT_POSITION_Y, event->y4);
+			input_report_abs(data->input_dev, ABS_MT_WIDTH_MAJOR, 1);
+			input_mt_sync(data->input_dev);
+			TS_DEBUG("===x2 = %d,y2 = %d ====\n",event->x2,event->y2);
+		case 3:
+			input_report_abs(data->input_dev, ABS_MT_TRACKING_ID, event->touch_ID3);
+			input_report_abs(data->input_dev, ABS_MT_TOUCH_MAJOR, event->pressure);
+			input_report_abs(data->input_dev, ABS_MT_POSITION_X, event->x3);
+			input_report_abs(data->input_dev, ABS_MT_POSITION_Y, event->y3);
+			input_report_abs(data->input_dev, ABS_MT_WIDTH_MAJOR, 1);
+			input_mt_sync(data->input_dev);
+			TS_DEBUG("===x2 = %d,y2 = %d ====\n",event->x2,event->y2);
+		case 2:
+			input_report_abs(data->input_dev, ABS_MT_TRACKING_ID, event->touch_ID2);
+			input_report_abs(data->input_dev, ABS_MT_TOUCH_MAJOR, event->pressure);
+			input_report_abs(data->input_dev, ABS_MT_POSITION_X, event->x2);
+			input_report_abs(data->input_dev, ABS_MT_POSITION_Y, event->y2);
+			input_report_abs(data->input_dev, ABS_MT_WIDTH_MAJOR, 1);
+			input_mt_sync(data->input_dev);
+			TS_DEBUG("===x2 = %d,y2 = %d ====\n",event->x2,event->y2);
+		case 1:
+			input_report_abs(data->input_dev, ABS_MT_TRACKING_ID, event->touch_ID1);
+			input_report_abs(data->input_dev, ABS_MT_TOUCH_MAJOR, event->pressure);
+			input_report_abs(data->input_dev, ABS_MT_POSITION_X, event->x1);
+			input_report_abs(data->input_dev, ABS_MT_POSITION_Y, event->y1);
+			input_report_abs(data->input_dev, ABS_MT_WIDTH_MAJOR, 1);
+			input_mt_sync(data->input_dev);
+			TS_DEBUG("===x1 = %d,y1 = %d ====\n",event->x1,event->y1);
+		default:
+			TS_DEBUG("==touch_point default =\n");
+			break;
+	}
+#else	/* CONFIG_FT5X0X_MULTITOUCH*/
+	if (event->touch_point == 1) {
+		input_report_abs(data->input_dev, ABS_X, event->x1);
+		input_report_abs(data->input_dev, ABS_Y, event->y1);
+		input_report_abs(data->input_dev, ABS_PRESSURE, event->pressure);
+	}
+	input_report_key(data->input_dev, BTN_TOUCH, 1);
+#endif	/* CONFIG_FT5X0X_MULTITOUCH*/
+	input_sync(data->input_dev);
+
+	dev_dbg(&this_client->dev, "%s: 1:%d %d 2:%d %d \n", __func__,
+		event->x1, event->y1, event->x2, event->y2);
+	TS_DEBUG1("1:(%d, %d) 2:(%d, %d) 3:(%d, %d) 4:(%d, %d) 5:(%d, %d)\n", 
+		event->x1, event->y1, event->x2, event->y2, event->x3, event->y3,
+		event->x4, event->y4, event->x5, event->y5);
+}	/*end ft5x0x_report_value*/
+
+static void ft5x0x_ts_pen_irq_work(struct work_struct *work)
+{
+	int ret = -1;
+
+//	disable_irq(this_client->irq);
+//	disable_irq_nosync(this_client->irq);
+
+	TS_DEBUG("==work 1=\n");
+	ret = ft5x0x_read_data();	
+	if (ret == 0) {	
+		ft5x0x_report_value();
+	}
+	else
+		TS_DEBUG("data package read error\n");
+	TS_DEBUG("==work 2=\n");
+//	msleep(1);
+//	enable_irq(this_client->irq);
+//	enable_irq(IRQ_EINT(6));
+}
+
+static irqreturn_t ft5x0x_ts_interrupt(int irq, void *dev_id)
+{
+	struct ft5x0x_ts_data *ft5x0x_ts = dev_id;
+
+	TS_DEBUG("==int ft5x0x_ts_interrupt=\n");
+
+//	disable_irq(this_client->irq);
+//	disable_irq(IRQ_EINT(6));
+
+
+	if (!work_pending(&ft5x0x_ts->pen_event_work)) {
+		queue_work(ft5x0x_ts->ts_workqueue, &ft5x0x_ts->pen_event_work);
+	}
+
+	return IRQ_HANDLED;
+}
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+static void ft5x0x_ts_suspend(struct early_suspend *handler)
+{
+	struct ft5x0x_ts_data *ts;
+	ts =  container_of(handler, struct ft5x0x_ts_data, early_suspend);
+
+	TS_DEBUG("==ft5x0x_ts_suspend=\n");
+	disable_irq(this_client->irq);
+//	disable_irq(IRQ_EINT(6));
+	cancel_work_sync(&ts->pen_event_work);
+	flush_workqueue(ts->ts_workqueue);
+	// ==set mode ==, 
+	ft5x0x_set_reg(FT5X0X_REG_PMODE, PMODE_HIBERNATE);
+}
+
+static void ft5x0x_ts_resume(struct early_suspend *handler)
+{
+	TS_DEBUG("==ft5x0x_ts_resume=\n");
+	// wake the mode
+//	__gpio_as_output(GPIO_FT5X0X_WAKE);		
+//	__gpio_clear_pin(GPIO_FT5X0X_WAKE);		//set wake = 0,base on system
+//	 msleep(100);
+//	__gpio_set_pin(GPIO_FT5X0X_WAKE);			//set wake = 1,base on system
+//	msleep(100);
+	if (pdata->init_platform_hw)
+		pdata->wake_platform_hw();
+	enable_irq(this_client->irq);
+//	enable_irq(IRQ_EINT(6));
+}
+#endif  //CONFIG_HAS_EARLYSUSPEND
+
+static int 
+ft5x0x_ts_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+	struct ft5x0x_ts_data *ft5x0x_ts;
+	struct input_dev *input_dev;
+	int err = 0;
+	
+	TS_DEBUG("\n\n\n\n#############################################==ft5x0x_ts_probe=\n");
+	
+	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
+		err = -ENODEV;
+		goto exit_check_functionality_failed;
+	}
+
+	TS_DEBUG("==kzalloc=\n");
+	ft5x0x_ts = kzalloc(sizeof(*ft5x0x_ts), GFP_KERNEL);
+	if (!ft5x0x_ts)	{
+		err = -ENOMEM;
+		goto exit_alloc_data_failed;
+	}
+
+	TS_DEBUG("==i2c_set_clientdata=\n");
+	this_client = client;
+	i2c_set_clientdata(client, ft5x0x_ts);
+//	i2c_jz_setclk(client, 100*1000);
+
+	TS_DEBUG("==INIT_WORK=\n");
+	INIT_WORK(&ft5x0x_ts->pen_event_work, ft5x0x_ts_pen_irq_work);
+	TS_DEBUG("==create_singlethread_workqueue=\n");
+	ft5x0x_ts->ts_workqueue = create_singlethread_workqueue(dev_name(&client->dev));
+	if (!ft5x0x_ts->ts_workqueue) {
+		err = -ESRCH;
+		goto exit_create_singlethread;
+	}
+
+	pdata = client->dev.platform_data;
+	if (pdata == NULL) {
+		dev_err(&client->dev, "%s: platform data is null\n", __func__);
+		goto exit_platform_data_null;
+	}
+//	ts_init();
+	/* ç”¨äºŽåˆ�å§‹åŒ–å¤–éƒ¨ä¸­æ–­æŽ¥å�£ */
+	if (pdata->init_platform_hw)
+		pdata->init_platform_hw();
+	
+	TS_DEBUG("==request_irq= %x\n", client->irq);
+//	err = request_irq(client->irq, ft5x0x_ts_interrupt, IRQF_DISABLED, "ft5x0x_ts", ft5x0x_ts);
+//	err = request_irq(IRQ_EINT(6), ft5x0x_ts_interrupt, IRQF_TRIGGER_FALLING, "ft5x0x_ts", ft5x0x_ts);
+	err = request_irq(client->irq, ft5x0x_ts_interrupt, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "ft5x0x_ts", ft5x0x_ts);
+	if (err < 0) {
+		dev_err(&client->dev, "ft5x0x_probe: request irq failed\n");
+		goto exit_irq_request_failed;
+	}
+
+//	__gpio_as_irq_fall_edge(pdata->intr);
+	disable_irq(this_client->irq);
+//	disable_irq(IRQ_EINT(6));
+
+	TS_DEBUG("==input_allocate_device=\n");
+	input_dev = input_allocate_device();
+	if (!input_dev) {
+		err = -ENOMEM;
+		dev_err(&client->dev, "failed to allocate input device\n");
+		goto exit_input_dev_alloc_failed;
+	}
+	
+	ft5x0x_ts->input_dev = input_dev;
+
+#ifdef CONFIG_FT5X0X_MULTITOUCH
+	set_bit(ABS_MT_TOUCH_MAJOR, input_dev->absbit);
+	set_bit(ABS_MT_POSITION_X, input_dev->absbit);
+	set_bit(ABS_MT_POSITION_Y, input_dev->absbit);
+	set_bit(ABS_MT_WIDTH_MAJOR, input_dev->absbit);
+
+	input_set_abs_params(input_dev,
+			     ABS_MT_POSITION_X, 0, SCREEN_MAX_X, 0, 0);
+	input_set_abs_params(input_dev,
+			     ABS_MT_POSITION_Y, 0, SCREEN_MAX_Y, 0, 0);
+	input_set_abs_params(input_dev,
+			     ABS_MT_TOUCH_MAJOR, 0, PRESS_MAX, 0, 0);
+	input_set_abs_params(input_dev,
+			     ABS_MT_WIDTH_MAJOR, 0, 200, 0, 0);
+#else
+	set_bit(ABS_X, input_dev->absbit);
+	set_bit(ABS_Y, input_dev->absbit);
+	set_bit(ABS_PRESSURE, input_dev->absbit);
+	set_bit(BTN_TOUCH, input_dev->keybit);
+
+	input_set_abs_params(input_dev, ABS_X, 0, SCREEN_MAX_X, 0, 0);
+	input_set_abs_params(input_dev, ABS_Y, 0, SCREEN_MAX_Y, 0, 0);
+	input_set_abs_params(input_dev,
+			     ABS_PRESSURE, 0, PRESS_MAX, 0 , 0);
+#endif
+
+	set_bit(EV_ABS, input_dev->evbit);
+	set_bit(EV_KEY, input_dev->evbit);
+
+	input_dev->name		= FT5X0X_NAME;		//dev_name(&client->dev)
+	err = input_register_device(input_dev);
+	if (err) {
+		dev_err(&client->dev,
+		"ft5x0x_ts_probe: failed to register input device: %s\n",
+		dev_name(&client->dev));
+		goto exit_input_register_device_failed;
+	}
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+	TS_DEBUG("==register_early_suspend =\n");
+	ft5x0x_ts->early_suspend.level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN + 1;
+	ft5x0x_ts->early_suspend.suspend = ft5x0x_ts_suspend;
+	ft5x0x_ts->early_suspend.resume	= ft5x0x_ts_resume;
+	register_early_suspend(&ft5x0x_ts->early_suspend);
+#endif
+//wake the CTPM
+//	__gpio_as_output(GPIO_FT5X0X_WAKE);		
+//	__gpio_clear_pin(GPIO_FT5X0X_WAKE);		//set wake = 0,base on system
+//	 msleep(100);
+//	__gpio_set_pin(GPIO_FT5X0X_WAKE);			//set wake = 1,base on system
+//	msleep(100);
+	if (pdata->init_platform_hw)
+		pdata->wake_platform_hw();
+//	ft5x0x_set_reg(0x88, 0x05); //5, 6,7,8
+//	ft5x0x_set_reg(0x80, 30);
+//	msleep(50);
+
+	enable_irq(this_client->irq);
+//	enable_irq(IRQ_EINT(6));
+
+	TS_DEBUG("==probe over =, this_client->irq=%d\n\n\n", this_client->irq);
+    return 0;
+
+exit_input_register_device_failed:
+	input_free_device(input_dev);
+exit_input_dev_alloc_failed:
+	free_irq(client->irq, ft5x0x_ts);
+//	free_irq(IRQ_EINT(6), ft5x0x_ts);
+exit_irq_request_failed:
+exit_platform_data_null:
+	cancel_work_sync(&ft5x0x_ts->pen_event_work);
+	destroy_workqueue(ft5x0x_ts->ts_workqueue);
+exit_create_singlethread:
+	TS_DEBUG("==singlethread error =\n\n\n");
+	i2c_set_clientdata(client, NULL);
+	kfree(ft5x0x_ts);
+exit_alloc_data_failed:
+exit_check_functionality_failed:
+	return err;
+}
+
+static int __devexit ft5x0x_ts_remove(struct i2c_client *client)
+{
+	struct ft5x0x_ts_data *ft5x0x_ts = i2c_get_clientdata(client);
+	TS_DEBUG("==ft5x0x_ts_remove=\n");
+	unregister_early_suspend(&ft5x0x_ts->early_suspend);
+	free_irq(client->irq, ft5x0x_ts);
+//	free_irq(IRQ_EINT(6), ft5x0x_ts);
+	input_unregister_device(ft5x0x_ts->input_dev);
+	kfree(ft5x0x_ts);
+	cancel_work_sync(&ft5x0x_ts->pen_event_work);
+	destroy_workqueue(ft5x0x_ts->ts_workqueue);
+	i2c_set_clientdata(client, NULL);
+	return 0;
+}
+
+static const struct i2c_device_id ft5x0x_ts_id[] = {
+	{ FT5X0X_NAME, 0 },{ }
+};
+MODULE_DEVICE_TABLE(i2c, ft5x0x_ts_id);
+
+static struct i2c_driver ft5x0x_ts_driver = {
+	.probe		= ft5x0x_ts_probe,
+	.remove		= __devexit_p(ft5x0x_ts_remove),
+	.id_table	= ft5x0x_ts_id,
+	.driver	= {
+		.name	= FT5X0X_NAME,
+		.owner	= THIS_MODULE,
+	},
+};
+
+static int __init ft5x0x_ts_init(void)
+{
+	return i2c_add_driver(&ft5x0x_ts_driver);
+}
+
+static void __exit ft5x0x_ts_exit(void)
+{
+	i2c_del_driver(&ft5x0x_ts_driver);
+}
+
+module_init(ft5x0x_ts_init);
+module_exit(ft5x0x_ts_exit);
+
+MODULE_AUTHOR("<wenfs@Focaltech-systems.com>");
+MODULE_DESCRIPTION("FocalTech ft5x0x TouchScreen driver");
+MODULE_LICENSE("GPL");
+
+
diff -uNra linux-3.0.82/drivers/input/touchscreen/Kconfig linux-3.0.82x/drivers/input/touchscreen/Kconfig
--- linux-3.0.82/drivers/input/touchscreen/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/input/touchscreen/Kconfig	2017-09-23 03:42:49.438676835 +0800
@@ -11,6 +11,32 @@
 
 if INPUT_TOUCHSCREEN
 
+config TOUCHSCREEN_FT5X0X
+	tristate "FocalTech ft5x0x touchscreen"
+	depends on I2C
+	default n
+	help
+	  Say Y here if you have the FocalTech ft5x0x touchscreen.
+
+	  If unsure, say N.
+
+config TOUCHSCREEN_FT5X06
+	tristate "FocalTech ft5x06 touchscreen"
+	depends on I2C
+	default n
+	help
+	  Say Y here if you have the FocalTech ft5x06 touchscreen.
+
+	  If unsure, say N.
+
+config FT5X0X_MULTITOUCH
+	tristate "FocalTech ft5x0x touchscreen multi-touch support"
+	depends on I2C
+	default n
+	help
+	  Say Y here To enable multitouch on Focaltech Touchscreens(required for most).
+	  If unsure, say N.
+
 config TOUCHSCREEN_88PM860X
 	tristate "Marvell 88PM860x touchscreen"
 	depends on MFD_88PM860X
@@ -650,6 +676,7 @@
 
 	  To compile this driver as a module, choose M here: the
 	  module will be called touchit213.
+	  
 
 config TOUCHSCREEN_TSC2005
         tristate "TSC2005 based touchscreens"
@@ -673,6 +700,17 @@
 	  To compile this driver as a module, choose M here: the
 	  module will be called tsc2007.
 
+config TOUCHSCREEN_TSZT2083
+	tristate "TSZT2083 based touchscreens"
+	depends on I2C
+	help
+	  Say Y here if you have a TSZT2083 based touchscreen.
+
+	  If unsure, say N.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called ts_zt2083.
+
 config TOUCHSCREEN_W90X900
 	tristate "W90P910 touchscreen driver"
 	depends on HAVE_CLK
diff -uNra linux-3.0.82/drivers/input/touchscreen/Makefile linux-3.0.82x/drivers/input/touchscreen/Makefile
--- linux-3.0.82/drivers/input/touchscreen/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/input/touchscreen/Makefile	2017-09-23 03:42:49.438676835 +0800
@@ -6,6 +6,9 @@
 
 wm97xx-ts-y := wm97xx-core.o
 
+
+obj-$(CONFIG_TOUCHSCREEN_FT5X0X)	+= ft5x0x_ts.o
+obj-$(CONFIG_TOUCHSCREEN_FT5X06)	+= ft5x06_ts.o
 obj-$(CONFIG_TOUCHSCREEN_88PM860X)	+= 88pm860x-ts.o
 obj-$(CONFIG_TOUCHSCREEN_AD7877)	+= ad7877.o
 obj-$(CONFIG_TOUCHSCREEN_AD7879)	+= ad7879.o
@@ -47,6 +50,7 @@
 obj-$(CONFIG_TOUCHSCREEN_TOUCHRIGHT)	+= touchright.o
 obj-$(CONFIG_TOUCHSCREEN_TOUCHWIN)	+= touchwin.o
 obj-$(CONFIG_TOUCHSCREEN_TSC2005)	+= tsc2005.o
+obj-$(CONFIG_TOUCHSCREEN_TSZT2083)	+= ts_zt2083.o
 obj-$(CONFIG_TOUCHSCREEN_TSC2007)	+= tsc2007.o
 obj-$(CONFIG_TOUCHSCREEN_UCB1400)	+= ucb1400_ts.o
 obj-$(CONFIG_TOUCHSCREEN_WACOM_W8001)	+= wacom_w8001.o
diff -uNra linux-3.0.82/drivers/input/touchscreen/tsc2007.c linux-3.0.82x/drivers/input/touchscreen/tsc2007.c
--- linux-3.0.82/drivers/input/touchscreen/tsc2007.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/input/touchscreen/tsc2007.c	2017-09-23 03:42:49.438676835 +0800
@@ -397,3 +397,4 @@
 MODULE_AUTHOR("Kwangwoo Lee <kwlee@mtekvision.com>");
 MODULE_DESCRIPTION("TSC2007 TouchScreen Driver");
 MODULE_LICENSE("GPL");
+
diff -uNra linux-3.0.82/drivers/input/touchscreen/ts_zt2083.c linux-3.0.82x/drivers/input/touchscreen/ts_zt2083.c
--- linux-3.0.82/drivers/input/touchscreen/ts_zt2083.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/input/touchscreen/ts_zt2083.c	2017-09-23 03:42:49.442676824 +0800
@@ -0,0 +1,396 @@
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/errno.h>
+#include <linux/device.h>
+#include <linux/fs.h>
+#include <linux/time.h>
+#include <linux/delay.h>
+#include <linux/irq.h>
+#include <linux/miscdevice.h>
+#include <linux/errno.h>
+#include <linux/types.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+#include <linux/input.h>
+#include <linux/workqueue.h>
+#include <linux/poll.h>
+#include <linux/gpio.h>
+#include <ls1x_gpio.h>
+
+#define ZT2083_DEV_NAME  "zt2083"
+#define ZT2083_IRQ_PIN      GPIO_32
+
+#define ZT2083_INIT             0xc8
+#define ZT2083_INIT2             0xcc
+#define ZT2083_Z1_EN             0xa0
+#define ZT2083_Z2_EN             0xa0
+#define ZT2083_X_EN             0x80
+#define ZT2083_Y_EN             0x90
+#define ZT2083_PWRDOWN         0x8c
+
+#define ZT2083_ADDR             0x48
+
+#define TS_POLL_DELAY			6
+#define TS_POLL_PERIOD			30
+#define ZT2083_12BIT 			1  
+#define MAX_12BIT               2047
+
+extern gpio_bank_ls1c[3];
+
+struct ts_event {
+	unsigned int	x;
+	unsigned int	y;
+	unsigned int	z1, z2;
+};
+
+struct zt2083_data {
+	struct input_dev	*input;
+	char			phys[32];
+	struct delayed_work	work;
+	struct i2c_client	*client;
+	bool			pendown;
+	int			irq;
+};
+static struct i2c_client *zt2083_adcclient = NULL;
+
+static int _i2c_read_byte(unsigned char addr,unsigned char *data,unsigned long num)
+{
+    int err = 0;
+    struct i2c_client *client = zt2083_adcclient;
+    struct i2c_msg msg;
+    msg.addr = addr;
+    msg.len = num;
+    msg.buf = data;
+    msg.flags = I2C_M_RD;
+    if((err = i2c_transfer(client->adapter,&msg,1))!=1){
+        printk(KERN_ERR "msg failed!!!\n");
+        return 0;
+    }
+   return err;
+}
+static int _i2c_write_byte(unsigned char addr,unsigned char *data,unsigned long num)
+{
+    int err = 0;
+    struct i2c_client *client = zt2083_adcclient;
+    struct i2c_msg msg;
+    msg.addr = addr;
+    msg.len = num;
+    msg.buf = data;
+    msg.flags = 0;
+    if((err = i2c_transfer(client->adapter,&msg,1)) != 1){
+        printk(KERN_ERR "msg failed!!!\n");
+        return 0;
+    }
+   return err;
+}
+static int zt2083_get_xypos(void)
+{
+#if 1
+    int err=0,ret=0;
+    unsigned char data[2]={0};
+    err =  _i2c_read_byte(ZT2083_ADDR,data,2);
+    if(!err)
+        printk(KERN_ERR "zt2083 get data failed!!!\n");
+     ret=data[0];
+    return ((data[1]>>4) | ret<<4);
+#endif
+}
+static int zt2083_set_cmd(unsigned char cmd)
+{
+#if 1
+    int err=0;
+    unsigned char data[1]={0};
+    data[0]=cmd;
+    err = _i2c_write_byte(ZT2083_ADDR,(unsigned char*)data,1); 
+    if(!err)
+        printk(KERN_ERR "zt2083 write reg failed!!!\n");
+    return err;
+#endif
+}
+
+static void zt2083_get_values(struct ts_event *tc)
+{
+    zt2083_set_cmd(ZT2083_X_EN);
+    //zt2083_set_cmd(0xcc);
+    zt2083_set_cmd(0xc0);
+    udelay(4);
+    tc->x = zt2083_get_xypos();
+    zt2083_set_cmd(ZT2083_Y_EN);
+    //zt2083_set_cmd(0xdc);
+    zt2083_set_cmd(0xd0);
+    udelay(4);
+    tc->y = zt2083_get_xypos();
+
+    zt2083_set_cmd(ZT2083_Z1_EN);
+    //zt2083_set_cmd(0xec);
+    zt2083_set_cmd(0xe0);
+    udelay(4);
+    tc->z1 = zt2083_get_xypos();
+
+    zt2083_set_cmd(ZT2083_Z2_EN);
+    //zt2083_set_cmd(0xfc);
+    zt2083_set_cmd(0xf0);
+    udelay(4);
+    tc->z2 = zt2083_get_xypos();
+    
+	//zt2083_set_cmd(ZT2083_INIT2);
+    return ;
+}
+static unsigned int zt2083_calc_pressure(struct zt2083_data *ts, struct ts_event *tc)
+{
+	u32 rt = 0;
+	if (tc->x == MAX_12BIT)
+		tc->x = 0;
+
+	if (likely(tc->x && tc->z1)) {
+		rt = tc->z2 - tc->z1;
+		rt *= tc->x;
+		//rt *= tsc->x_plate_ohms;
+		rt *= 600;
+		rt /= tc->z1;
+		rt = (rt + 2047) >> 12;
+	}
+
+	return rt;
+}
+
+static void en_inter(unsigned int irq)
+{
+    (*(volatile unsigned long *)0xbfd01094) |= 1;//clr int flags
+	enable_irq(irq);
+}
+
+void ts_work_handler(struct work_struct *work)
+{
+	unsigned int rt=0;
+	struct ts_event tc;
+	struct zt2083_data *ts = container_of(to_delayed_work(work), struct zt2083_data, work);
+	
+	zt2083_get_values(&tc);
+	rt = zt2083_calc_pressure(ts,&tc);
+	if(rt){
+		input_report_key(ts->input, BTN_TOUCH, 1);
+		input_report_abs(ts->input, ABS_PRESSURE,1); /*X-Y swap*/
+		input_report_abs(ts->input, ABS_X, tc.x); /*X-Y swap*/
+		input_report_abs(ts->input, ABS_Y, tc.y);
+		input_sync(ts->input);
+		printk( "%s:x==%d,y==%d,rt====%d\n",__func__,tc.x,tc.y,rt);
+		ts->pendown = true;
+	}
+	else if(ts->pendown){
+		input_report_key(ts->input, BTN_TOUCH, 0);
+		input_report_abs(ts->input, ABS_PRESSURE,0); /*X-Y swap*/
+		input_sync(ts->input);
+		ts->pendown = false;
+	}
+	//printk("ts->pendown = %d\n", ts->pendown);
+	if(ts->pendown)
+		schedule_delayed_work(&ts->work,msecs_to_jiffies(TS_POLL_PERIOD));
+	else{
+		en_inter(ts->irq);
+//		printk("*****touch screen finish*****\n");
+		//ls1b_gpio_unmask_intr(ZT2083_IRQ_PIN);
+	}
+}
+
+static irqreturn_t ts_interrupt(int irq,void *handle)
+{
+//	printk("\t\n*****Touch screen start*****\n");
+	struct zt2083_data *ts = (struct zt2083_data *)handle;
+	unsigned int gpio_in=0, gpio_sr=0, gpio_en=0;
+
+	disable_irq_nosync(irq);
+	
+	schedule_delayed_work(&ts->work,msecs_to_jiffies(TS_POLL_DELAY));
+	
+	return IRQ_HANDLED;
+}
+
+/*
+ * Initialization function
+ */
+
+static int zt2083_init_client(struct i2c_client *client)
+{
+	return 0;
+}
+
+static int key_open(struct inode *inode,struct file *file)
+{
+	return 0;
+}
+static int key_close(struct inode *inode,struct file *file)
+{
+	return 0;
+}
+static int key_read(struct file *filp,char __user *buff,size_t count,loff_t *offp)
+{
+	return 0;
+}
+static struct file_operations key_fops = {
+	.open       = key_open,
+	.release    = key_close,
+	.read       = key_read,
+};
+static struct miscdevice key_dev = {
+	.minor  = 189,
+	.name   = ZT2083_DEV_NAME,
+	.fops   = &key_fops,
+};
+
+static int __devinit zt2083_probe(struct i2c_client *client,
+                   const struct i2c_device_id *id)
+{
+    int err, ret;
+	unsigned int bank_idx, offset, temp;
+	struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
+	struct zt2083_data *ts;
+	struct input_dev *input;
+
+	printk(KERN_INFO "----zt2083_probe----\n");
+	if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) {
+		dev_err(&adapter->dev, "doesn't support full I2C\n");
+		err = -EIO;
+		goto exit;
+		} 
+
+    if (!(ts = kzalloc(sizeof(*ts), GFP_KERNEL))) {
+		dev_err(&adapter->dev, "failed to alloc memory\n");
+		err = -ENOMEM;
+		goto exit;
+		}   
+
+	ts->client = client;
+	i2c_set_clientdata(client, ts);
+
+    /*send cmd init*/
+	if(!zt2083_adcclient){
+		printk(KERN_ERR "zt2083_detect!!!!!!\n");
+		zt2083_adcclient = client;
+	}   
+
+	/* Initialize the zt2083 chip */
+	err = zt2083_init_client(client);
+	if (err)
+		goto exit_kfree;
+	
+    err = misc_register(&key_dev); 
+    if(err < 0 )
+    {
+   	    printk(ZT2083_DEV_NAME"\tmisc_register error\n");
+   	    goto exit;
+    }
+
+    input = input_allocate_device();
+    if (!input)
+	{
+   	    err = -ENOMEM;
+		goto exit;
+    }
+
+	ts->input=input;
+	
+    input->evbit[0] = BIT(EV_KEY) | BIT(EV_ABS);
+    set_bit(BTN_TOUCH, input->keybit);
+
+    input_set_abs_params(input, ABS_X, 0, 800, 5, 0);
+    input_set_abs_params(input, ABS_Y, 0, 480, 5, 0);
+    input_set_abs_params(input, ABS_PRESSURE, 0, 1, 0, 0);
+
+    input->name = "ZT2083";
+    input->id.bustype = BUS_HOST;
+    err = input_register_device(input);
+    if (err) {
+	    printk(KERN_ERR "Unable to register zt2083 ts input device\n");
+        goto exit;
+    }
+
+    INIT_DELAYED_WORK(&ts->work,ts_work_handler);
+	if(gpio_request(ZT2083_IRQ_PIN,"gpio")){
+		printk("zt2083 intterrupt gpio request failed!\r\n");
+		goto exit_kfree;
+	}
+
+	gpio_direction_input(ZT2083_IRQ_PIN);  
+	ts->irq = gpio_to_irq(ZT2083_IRQ_PIN);
+	
+	ret = request_irq(ts->irq,ts_interrupt,IRQF_TRIGGER_FALLING ,ZT2083_DEV_NAME,ts);
+    printk(ZT2083_DEV_NAME"\tinitialized\n");
+	en_inter(ts->irq);
+    return 0;
+
+    exit_kfree:
+	    kfree(ts);
+    exit:
+	    return err;
+}
+
+static int __devexit zt2083_remove(struct i2c_client *client)
+{
+	int err;
+	struct zt2083_data *ts = i2c_get_clientdata(client);
+
+    if(client == zt2083_adcclient)
+		zt2083_adcclient = NULL;
+
+    err = misc_deregister(&key_dev);
+    if(err < 0 )
+    {
+   	    printk(ZT2083_DEV_NAME"\tmisc_register error\n");
+   	    goto exit;
+    }
+
+	input_unregister_device(ts->input);
+	i2c_set_clientdata(client, NULL);
+	kfree(ts);
+
+	return 0;
+
+    exit:
+	    return err;
+}
+
+static const struct i2c_device_id zt2083_id[] = { 
+	    { "zt2083", 0 },
+		    { } 
+};
+
+
+static struct i2c_driver zt2083_driver={
+        .driver = {
+            .name = "zt2083",
+            .owner = THIS_MODULE,
+        },
+        .probe = zt2083_probe,
+        .remove = __devexit_p(zt2083_remove),
+		.id_table = zt2083_id,
+};
+static int __init zt2083_init(void)
+{
+	printk("\t\n*****zt2083_init*****\n");
+    return i2c_add_driver(&zt2083_driver);
+}
+
+static int __exit zt2083_exit(void)
+{
+    int ret=0;
+    i2c_del_driver(&zt2083_driver);        
+    ret = misc_deregister(&key_dev);
+    if(ret < 0 )
+    {
+        printk(ZT2083_DEV_NAME "cml: GPI misc_deregister error\n");
+        return ret;
+    }
+
+
+    return 0;
+}
+
+late_initcall(zt2083_init);
+module_exit(zt2083_exit);
+
+MODULE_AUTHOR("ZHAOKAI <zhaokai@loongson.cn>");
+MODULE_DESCRIPTION("LS1B zt2083 touchscreen driver");
+MODULE_LICENSE("GPL");
diff -uNra linux-3.0.82/drivers/media/video/gc0308.c linux-3.0.82x/drivers/media/video/gc0308.c
--- linux-3.0.82/drivers/media/video/gc0308.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gc0308.c	2017-09-23 03:42:49.442676824 +0800
@@ -0,0 +1,1029 @@
+/*
+ * Driver for OV7675  from OV
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/i2c.h>
+#include <linux/delay.h>
+#include <linux/version.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-subdev.h>
+//#include <media/v4l2-i2c-drv.h>
+
+#define CONFIG_CAMERA_CONTROLLED_BY_ARM
+
+
+#include <media/gc0308_platform.h>
+
+#ifdef CONFIG_VIDEO_SAMSUNG_V4L2
+#include <linux/videodev2_samsung.h>
+#endif
+
+#include "gc0308.h"
+
+
+
+#define GC0308_DRIVER_NAME	"GC0308"
+
+//*********** proc *********************
+#include <linux/proc_fs.h>
+#include "../../../fs/proc/internal.h"
+#define GC0308_PROC_NAME	"gc0308"
+static struct proc_dir_entry * s_proc = NULL;
+static struct i2c_client * s_i2c_client = NULL;
+//**************************************
+
+void GC0308_night_mode(struct v4l2_subdev *sd, bool enable);
+
+
+/* Default resolution & pixelformat. plz ref gc0308_platform.h */
+#define DEFAULT_RES		VGA	/* Index of resoultion */
+#define DEFAULT_FMT		V4L2_PIX_FMT_UYVY	/* YUV422 */
+
+static unsigned char regABVal = 0x06;
+static unsigned char hueTable[21][3] = {{0x0, 0x80, 0},
+				{0x14, 0x7E, 0},
+				{0x27, 0x79, 0},
+				{0x3A, 0x72, 0},
+				{0x4B, 0x67, 0},
+				{0x5A, 0x5A, 0},
+				{0x67, 0x4B, 0},
+				{0x72, 0x3A, 0},
+				{0x79, 0x27, 0},
+				{0x7E, 0x14, 0},
+				{0x80, 0x00, 1},
+				{0x7E, 0x14, 1},
+				{0x79, 0x27, 1},
+				{0x72, 0x3A, 1},
+				{0x67, 0x4B, 1},
+				{0x5A, 0x5A, 1},
+				{0x4B, 0x67, 1},
+				{0x3A, 0x72, 1},
+				{0x27, 0x79, 1},
+				{0x14, 0x7E, 1},
+				{0x00, 0x80, 1}};
+
+/*
+ * Specification
+ * Parallel : ITU-R. 656/601 YUV422, RGB565, RGB888 (Up to VGA), RAW10
+ * Serial : MIPI CSI2 (single lane) YUV422, RGB565, RGB888 (Up to VGA), RAW10
+ * Resolution : 1280 (H) x 1024 (V)
+ * Image control : Brightness, Contrast, Saturation, Sharpness, Glamour
+ * Effect : Mono, Negative, Sepia, Aqua, Sketch
+ * FPS : 15fps @full resolution, 30fps @VGA, 24fps @720p
+ * Max. pixel clock frequency : 48MHz(upto)
+ * Internal PLL (6MHz to 27MHz input frequency)
+ */
+
+/* Camera functional setting values configured by user concept */
+struct gc0308_userset {
+	signed int exposure_bias;	/* V4L2_CID_EXPOSURE */
+	unsigned int ae_lock;
+	unsigned int awb_lock;
+	unsigned int auto_wb;	/* V4L2_CID_AUTO_WHITE_BALANCE */
+	unsigned int manual_wb;	/* V4L2_CID_WHITE_BALANCE_PRESET */
+	unsigned int wb_temp;	/* V4L2_CID_WHITE_BALANCE_TEMPERATURE */
+	unsigned int effect;	/* Color FX (AKA Color tone) */
+	unsigned int contrast;	/* V4L2_CID_CONTRAST */
+	unsigned int saturation;	/* V4L2_CID_SATURATION */
+	unsigned int sharpness;		/* V4L2_CID_SHARPNESS */
+	unsigned int glamour;
+};
+
+struct gc0308_state {
+	struct gc0308_platform_data *pdata;
+	struct v4l2_subdev sd;
+	struct v4l2_pix_format pix;
+	struct v4l2_fract timeperframe;
+	struct gc0308_userset userset;
+	int freq;	/* MCLK in KHz */
+	int is_mipi;
+	int isize;
+	int ver;
+	int fps;
+};
+
+static inline struct gc0308_state *to_state(struct v4l2_subdev *sd)
+{
+	return container_of(sd, struct gc0308_state, sd);
+}
+
+static int gc0308_i2c_write(struct v4l2_subdev *sd, unsigned char i2c_data[],
+				unsigned char length);
+
+#if 1
+/*
+ * OV7675 register structure : 2bytes address, 2bytes value
+ * retry on write failure up-to 5 times
+ */
+static inline int gc0308_write(struct v4l2_subdev *sd, u8 addr, u8 val)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct i2c_msg msg[1];
+	unsigned char reg[2];
+	int err = 0;
+	int retry = 0;
+
+
+	if (!client->adapter)
+		return -ENODEV;
+
+again:
+	msg->addr = client->addr;
+	msg->flags = 0;
+	msg->len = 2;
+	msg->buf = reg;
+
+	reg[0] = addr & 0xff;
+	reg[1] = val & 0xff;
+
+	err = i2c_transfer(client->adapter, msg, 1);
+	if (err >= 0)
+		return err;	/* Returns here on success */
+
+	/* abnormal case: retry 5 times */
+	if (retry < 5) {
+		dev_err(&client->dev, "%s: address: 0x%02x%02x, " \
+			"value: 0x%02x%02x\n", __func__, \
+			reg[0], reg[1], reg[2], reg[3]);
+		retry++;
+		goto again;
+	}
+
+	return err;
+}
+
+static int gc0308_i2c_read(struct v4l2_subdev *sd, unsigned char reg)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int rc;
+
+	unsigned char data[1]={0};
+	data[0] = reg;
+	i2c_master_recv(client, data ,1);
+	return data[0];
+}
+
+static int gc0308_write_regs(struct v4l2_subdev *sd, unsigned char regs[],
+				int size)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int i, err;
+
+	for (i = 0; i < size; i++) {
+		err = gc0308_i2c_write(sd, &regs[i], sizeof(regs[i]));
+		if (err < 0)
+			v4l_info(client, "%s: register set failed\n", \
+			__func__);
+	}
+
+	return 0;	/* FIXME */
+}
+#endif
+
+//extern s32 i2c_smbus_write_byte_data(struct i2c_client *client, u8 command, u8 value);
+extern s32 i2c_smbus_write_byte_data(const struct i2c_client *client,
+				     u8 command, u8 value);
+
+
+
+static int gc0308_i2c_write(struct v4l2_subdev *sd, unsigned char i2c_data[],
+				unsigned char length)
+{
+#if 0 //FIXME: urbetter skip I2C
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct i2c_msg msg = {client->addr, 0, length, i2c_data};
+//	struct i2c_msg msg = {client->addr, I2C_M_IGNORE_NAK, length, buf};
+
+	return i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;  
+#else
+
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	return i2c_smbus_write_byte_data(client, i2c_data[0], i2c_data[1]);
+#endif
+}
+
+static struct v4l2_queryctrl gc0308_controls[] = {
+	{
+		/*
+		 * For now, we just support in preset type
+		 * to be close to generic WB system,
+		 * we define color temp range for each preset
+		 */
+		.id = V4L2_CID_WHITE_BALANCE_TEMPERATURE,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "White balance in kelvin",
+		.minimum = 0,
+		.maximum = 10000,
+		.step = 1,
+		.default_value = 0,	/* FIXME */
+	},
+	{
+		.id = V4L2_CID_AUTO_WHITE_BALANCE,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "Auto white balance",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_BRIGHTNESS,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Brightness",
+		.minimum = -80,
+		.maximum = 80,
+		.step = 1,
+		.default_value = 0x08,
+	},
+	{
+		.id = V4L2_CID_CONTRAST,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Contrast",
+		.minimum = 0x10,
+		.maximum = 0x30,
+		.step = 1,
+		.default_value = 0x20,
+	},
+	{
+		.id = V4L2_CID_SATURATION,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Saturation",
+		.minimum = 0x00,
+		.maximum = 0x80,
+		.step = 1,
+		.default_value = 0x40,
+	},
+	{
+		.id = V4L2_CID_SHARPNESS,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Sharpness",
+		.minimum = 0x00,
+		.maximum = 0x09,
+		.step = 1,
+		.default_value = 0x04,
+	},
+	{
+		.id = V4L2_CID_HUE,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Hue",
+		.minimum = 0,
+		.maximum = 21,
+		.step = 1,
+		.default_value = 10,
+	},
+	{
+		.id = V4L2_CID_POWER_LINE_FREQUENCY,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Power line frequency",
+		.minimum = 0,
+		.maximum = 2,
+		.step = 1,
+		.default_value = 0,
+	},
+};
+
+static inline struct v4l2_queryctrl const *gc0308_find_qctrl(int id)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(gc0308_controls); i++)
+		if (gc0308_controls[i].id == id)
+			return &gc0308_controls[i];
+
+	return NULL;
+}
+
+static int gc0308_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(gc0308_controls); i++) {
+		if (gc0308_controls[i].id == qc->id) {
+			memcpy(qc, &gc0308_controls[i], \
+				sizeof(struct v4l2_queryctrl));
+			return 0;
+		}
+	}
+
+	return -EINVAL;
+}
+
+
+/*
+ * Clock configuration
+ * Configure expected MCLK from host and return EINVAL if not supported clock
+ * frequency is expected
+ * 	freq : in Hz
+ * 	flag : not supported for now
+ */
+static int gc0308_s_crystal_freq(struct v4l2_subdev *sd, u32 freq, u32 flags)
+{
+	int err = -EINVAL;
+
+	return err;
+}
+
+static int gc0308_g_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt)
+{
+	int err = 0;
+
+	return err;
+}
+
+static int gc0308_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt)
+{
+	int err = 0;
+
+	return err;
+}
+static int gc0308_enum_framesizes(struct v4l2_subdev *sd, \
+					struct v4l2_frmsizeenum *fsize)
+{
+	int err = 0;
+
+	return err;
+}
+
+static int gc0308_enum_frameintervals(struct v4l2_subdev *sd,
+					struct v4l2_frmivalenum *fival)
+{
+	int err = 0;
+
+	return err;
+}
+
+static int gc0308_enum_fmt(struct v4l2_subdev *sd, struct v4l2_fmtdesc *fmtdesc)
+{
+	int err = 0;
+
+	return err;
+}
+
+static int gc0308_try_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt)
+{
+	int err = 0;
+
+	return err;
+}
+
+static int gc0308_g_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *param)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int err = 0;
+
+	dev_dbg(&client->dev, "%s\n", __func__);
+
+	return err;
+}
+
+static int gc0308_s_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *param)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int err = 0;
+
+	dev_dbg(&client->dev, "%s: numerator %d, denominator: %d\n", \
+		__func__, param->parm.capture.timeperframe.numerator, \
+		param->parm.capture.timeperframe.denominator);
+
+	return err;
+}
+
+static int gc0308_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
+{
+	int err = 0;
+	return err;
+}
+
+void gc0308_color_effect(struct v4l2_subdev *sd, int which)
+{
+	int err, i;
+	int num;
+	
+	printk("gc0308 color mode!!!\n");
+	// normal,grayscale,sepia,sepia_green,sepia_blue,color_inv,gray_inv,embossment,sketch
+
+	switch (which) {
+	case 1:		
+		num = ((sizeof(gc0308_effect_normal)/sizeof(gc0308_effect_normal[0])));			
+		for (i = 0; i < num ; i++) {
+			err =gc0308_i2c_write(sd, gc0308_effect_normal[i], 2);
+		}
+	break;
+	case 2:		
+		num = ((sizeof(gc0308_effect_grayscale)/sizeof(gc0308_effect_grayscale[0])));			
+		for (i = 0; i < num ; i++) {
+			err =gc0308_i2c_write(sd, gc0308_effect_grayscale[i], 2);
+		}
+	break;
+	case 3:		
+		num = ((sizeof(gc0308_effect_sepia)/sizeof(gc0308_effect_sepia[0])));			
+		for (i = 0; i < num ; i++) {
+			err =gc0308_i2c_write(sd, gc0308_effect_sepia[i], 2);
+		}
+	break;
+	case 4:		
+		num = ((sizeof(gc0308_effect_sepia_green)/sizeof(gc0308_effect_sepia_green[0])));			
+		for (i = 0; i < num ; i++) {
+			err =gc0308_i2c_write(sd, gc0308_effect_sepia_green[i], 2);
+		}
+	break;
+	case 5:	
+		num = ((sizeof(gc0308_effect_sepia_blue)/sizeof(gc0308_effect_sepia_blue[0])));			
+		for (i = 0; i < num ; i++) {
+			err =gc0308_i2c_write(sd, gc0308_effect_sepia_blue[i], 2);
+		}
+	break;
+	case 6:	
+		num = ((sizeof(gc0308_effect_color_inv)/sizeof(gc0308_effect_color_inv[0])));			
+		for (i = 0; i < num ; i++) {
+			err =gc0308_i2c_write(sd, gc0308_effect_color_inv[i], 2);
+		}
+	break;
+	case 7:		
+		num = ((sizeof(gc0308_effect_gray_inv)/sizeof(gc0308_effect_gray_inv[0])));			
+		for (i = 0; i < num ; i++) {
+			err =gc0308_i2c_write(sd, gc0308_effect_gray_inv[i], 2);
+		}
+	break;
+	case 8:		
+		num = ((sizeof(gc0308_effect_embossment)/sizeof(gc0308_effect_embossment[0])));			
+		for (i = 0; i < num ; i++) {
+			err =gc0308_i2c_write(sd, gc0308_effect_embossment[i], 2);
+		}
+	break;
+	case 9:		   
+		num = ((sizeof(gc0308_effect_sketch)/sizeof(gc0308_effect_sketch[0])));			
+		for (i = 0; i < num ; i++) {
+			err =gc0308_i2c_write(sd, gc0308_effect_sketch[i], 2);
+		}
+	break;
+	}
+	
+	mdelay(200);
+}
+
+void gc0308_white_balance_preset(struct v4l2_subdev *sd, int which)
+{
+	int err, i;
+	int num;
+	unsigned char ctrlreg[1][2];
+	
+	printk("  gc0308 color mode!!!\n");
+	// normal,grayscale,sepia,sepia_green,sepia_blue,color_inv,gray_inv,embossment,sketch
+
+	switch (which) {
+	case 1:		
+		num = ((sizeof(gc0308_white_balance_auto)/sizeof(gc0308_white_balance_auto[0])));			
+		for (i = 0; i < num ; i++) {
+			err=gc0308_i2c_write(sd, gc0308_white_balance_auto[i], 2);
+		}
+		// enable AWB
+		ctrlreg[0][0]=0x22; 
+		ctrlreg[0][1]=gc0308_i2c_read(sd, 0x22)|0x02;
+		err=gc0308_i2c_write(sd, ctrlreg[0], 2);
+		
+	break;
+	case 2:		
+		// disable AWB
+		ctrlreg[0][0]=0x22; 
+		ctrlreg[0][1]=gc0308_i2c_read(sd, 0x22) & (~0x02);
+		err=gc0308_i2c_write(sd, ctrlreg[0], 2);
+		
+		num = ((sizeof(gc0308_white_balance_incandescence)/
+						sizeof(gc0308_white_balance_incandescence[0])));			
+		for (i = 0; i < num ; i++) {
+			err =gc0308_i2c_write(sd, gc0308_white_balance_incandescence[i], 2);
+		}
+	break;
+	case 3:		
+		// disable AWB
+		ctrlreg[0][0]=0x22; 
+		ctrlreg[0][1]=gc0308_i2c_read(sd, 0x22) & (~0x02);
+		err=gc0308_i2c_write(sd, ctrlreg[0], 2);
+		
+		num = ((sizeof(gc0308_white_balance_daylight)/sizeof(gc0308_white_balance_daylight[0])));			
+		for (i = 0; i < num ; i++) {
+			err =gc0308_i2c_write(sd, gc0308_white_balance_daylight[i], 2);
+		}
+	break;
+	case 4:		
+		// disable AWB
+		ctrlreg[0][0]=0x22; 
+		ctrlreg[0][1]=gc0308_i2c_read(sd, 0x22) & (~0x02);
+		err=gc0308_i2c_write(sd, ctrlreg[0], 2);
+		
+		num = ((sizeof(gc0308_white_balance_fluorescent)/sizeof(gc0308_white_balance_fluorescent[0])));			
+		for (i = 0; i < num ; i++) {
+			err =gc0308_i2c_write(sd, gc0308_white_balance_fluorescent[i], 2);
+		}
+	break;
+	case 5:	
+		num = ((sizeof(gc0308_white_balance_cloud)/sizeof(gc0308_white_balance_cloud[0])));			
+		for (i = 0; i < num ; i++) {
+			err =gc0308_i2c_write(sd, gc0308_white_balance_cloud[i], 2);
+		}
+	break;
+	}
+	
+	mdelay(200);
+}
+
+static int gc0308_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int i, cnt = 0, err = -EINVAL;
+	unsigned char ctrlreg[3][2];
+
+	printk("In %s() ctrl id is 0x%x value 0xis %x\n", 
+			__func__,
+			ctrl->id,
+			ctrl->value);
+
+	switch (ctrl->id) {
+	case V4L2_CID_BRIGHTNESS:
+		dev_dbg(&client->dev, "%s: V4L2_CID_BRIGHTNESS\n", __func__);
+		ctrlreg[0][0] = 0xAB;
+		ctrlreg[1][0] = 0x9B;
+		if (ctrl->value >= 0) {
+			regABVal &= ~BIT(3);
+			ctrlreg[1][1] = ctrl->value;
+		} else {
+			regABVal |= BIT(3);
+			ctrlreg[1][1] = -ctrl->value;
+		}
+		ctrlreg[0][1] = regABVal;
+		cnt = 2;
+		break;
+
+	case V4L2_CID_CONTRAST:
+		dev_dbg(&client->dev, "%s: V4L2_CID_CONTRAST\n", __func__);
+		ctrlreg[0][0] = 0x9C;
+		ctrlreg[0][1] = ctrl->value;
+		cnt = 1;
+		break;
+
+	case V4L2_CID_SATURATION:
+		dev_dbg(&client->dev, "%s: V4L2_CID_SATURATION\n", __func__);
+		ctrlreg[0][0] = 0xA7;
+		ctrlreg[1][0] = 0xA8;
+		ctrlreg[0][1] = ctrlreg[1][1] = ctrl->value;
+		cnt = 2;
+		break;
+
+	case V4L2_CID_SHARPNESS:
+		dev_dbg(&client->dev, "%s: V4L2_CID_SHARPNESS\n", __func__);
+		ctrlreg[0][0] = 0x8F;
+		ctrlreg[0][1] = ctrl->value;
+		cnt = 1;
+		break;
+
+	case V4L2_CID_HUE:
+		dev_dbg(&client->dev, "%s: V4L2_CID_HUE\n", __func__);
+		if (hueTable[ctrl->value][2] == 0) {
+			regABVal &= ~BIT(1);
+			regABVal |= BIT(0);
+		} else {
+			regABVal |= BIT(1);
+			regABVal &= ~BIT(0);
+		}
+		ctrlreg[0][0] = 0xA9;
+		ctrlreg[0][1] = hueTable[ctrl->value][0];
+		ctrlreg[1][0] = 0xAA;
+		ctrlreg[1][1] = hueTable[ctrl->value][1];
+		ctrlreg[2][0] = 0xAB;
+		ctrlreg[2][1] = regABVal;
+		cnt = 3;
+		break;
+
+	case V4L2_CID_POWER_LINE_FREQUENCY:
+		dev_dbg(&client->dev, "%s: V4L2_CID_POWER_LINE_FREQUENCY\n", __func__);
+		ctrlreg[0][0] = 0x22;
+		ctrlreg[1][0] = 0x23;
+		if ((ctrl->value == 0) || (ctrl->value == 2)) { // off or 60Hz
+			ctrlreg[0][1] = 0x7F;
+			ctrlreg[1][1] = 0x03;
+			cnt = 2;
+		} else if (ctrl->value == 1){ // 50Hz
+			ctrlreg[0][1] = 0x99;
+			ctrlreg[1][1] = 0x02;
+			cnt = 2;
+		}
+		break;
+
+/*	case V4L2_CID_SCENE_MODE:
+		GC0308_night_mode(sd, ctrl->value);
+		return;
+		break;
+*/	//lxy
+
+	case V4L2_CID_COLORFX:
+   		dev_err(&client->dev, "%s: in color effect %d\n", 
+					__func__,   
+					ctrl->value);
+		gc0308_color_effect(sd, ctrl->value);
+		return 0;
+		break;
+
+/*	case V4L2_CID_WHITE_BALANCE_PRESET:
+		dev_err(&client->dev, "%s: in white balance preset %d\n", 
+					__func__,   
+					ctrl->value);
+		gc0308_white_balance_preset(sd, ctrl->value);
+		return 0;
+		break;
+*/	//lxy
+	default:
+		dev_err(&client->dev, "%s: no such control id 0x%x\n", __func__, ctrl->id);
+		break;  
+	}
+
+	for (i = 0; i < cnt; ++i)
+		err = gc0308_i2c_write(sd, ctrlreg[i], 2);
+
+	if (err < 0) {
+		dev_dbg(&client->dev, "%s: vidioc_s_ctrl failed: %d\n", __func__, ctrl->id);
+	}
+
+	return err;
+}
+
+static int gc0308_init(struct v4l2_subdev *sd, u32 val)
+{
+#ifdef CONFIG_CAMERA_CONTROLLED_BY_ARM
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int i, err = -EINVAL;
+
+	/*
+	unsigned char initreg[2] = {0x12, 0x80};
+
+	v4l_info(client, "%s: camera initialization start\n", __func__);
+	err = gc0308_i2c_write(sd, initreg, 2);
+	if (err < 0)
+		v4l_info(client, "%s: init register set failed\n", __func__);
+	mdelay(150);
+*/
+	printk ("lxy: gc0308_init......\n");
+	for (i = 0; i < GC0308_INIT_REGS; i++) {
+		err = gc0308_i2c_write(sd, gc0308_init_reg[i],
+				sizeof(gc0308_init_reg[i]));
+		if (err < 0)
+			v4l_info(client, "%s: %d register set failed\n",
+					__func__, i);
+	}
+
+	if (err < 0) {
+		v4l_err(client, "%s: camera initialization failed\n",
+				__func__);
+		return -EIO;	/* FIXME */
+	}
+#endif
+	return 0;
+}
+
+/*
+ * s_config subdev ops
+ * With camera device, we need to re-initialize every single opening time therefor,
+ * it is not necessary to be initialized on probe time. except for version checking
+ * NOTE: version checking is optional
+ */
+static int gc0308_s_config(struct v4l2_subdev *sd, int irq, void *platform_data)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct gc0308_state *state = to_state(sd);
+	struct gc0308_platform_data *pdata;
+
+	dev_info(&client->dev, "fetching platform data\n");
+
+	pdata = client->dev.platform_data;
+
+	if (!pdata) {
+		dev_err(&client->dev, "%s: no platform data\n", __func__);
+		return -ENODEV;
+	}
+
+	/*
+	 * Assign default format and resolution
+	 * Use configured default information in platform data
+	 * or without them, use default information in driver
+	 */
+	if (!(pdata->default_width && pdata->default_height)) {
+		/* TODO: assign driver default resolution */
+	} else {
+		state->pix.width = pdata->default_width;
+		state->pix.height = pdata->default_height;
+	}
+
+	if (!pdata->pixelformat)
+		state->pix.pixelformat = DEFAULT_FMT;
+	else
+		state->pix.pixelformat = pdata->pixelformat;
+
+	if (!pdata->freq)
+		state->freq = 12000000;	/* 12MHz default */
+	else
+		state->freq = pdata->freq;
+
+	if (!pdata->is_mipi) {
+		state->is_mipi = 0;
+		dev_info(&client->dev, "parallel mode\n");
+	} else
+		state->is_mipi = pdata->is_mipi;
+
+	return 0;
+}
+
+
+
+/*************************************************************************
+* FUNCTION
+*	GC0308_night_mode
+*
+* DESCRIPTION
+*	This function night mode of GC0308.
+*
+* PARAMETERS
+*	none
+*
+* RETURNS
+*	None
+*
+* GLOBALS AFFECTED
+*
+*************************************************************************/
+void GC0308_night_mode(struct v4l2_subdev *sd, bool enable)
+{
+	//kal_int32 temp_reg =0;
+	int temp_reg =0;
+	unsigned char ctrlreg[1][2];
+	
+#ifdef GC_DEBUG	
+	_dbg_print("  GC0308_night_mode!!!\n");
+#endif	
+
+    //temp_reg = read_cmos_sensor(0x20);
+    temp_reg = gc0308_i2c_read(sd, 0x20);
+	
+    if(enable){
+		//MAX_EXPOSURE_LINES=2*(PIXEL_CLK/MIN_FRAME_RATE)/VGA_PERIOD_PIXEL_NUMS;
+
+		//sensor_night_mode=KAL_TRUE;
+
+		printk("%s(): line: %d: enable GC0308_night_mode !\n",__func__, __LINE__);
+
+		ctrlreg[0][0] = 0xec;
+		ctrlreg[0][1] = 0x30;		
+		gc0308_i2c_write(sd, ctrlreg[0], 2);
+
+		ctrlreg[0][0] = 0x20;
+		ctrlreg[0][1] = temp_reg&0x5f;
+		gc0308_i2c_write(sd, ctrlreg[0], 2);
+
+		ctrlreg[0][0] = 0x3c;
+		ctrlreg[0][1] = 0x08;
+		gc0308_i2c_write(sd, ctrlreg[0], 2);
+		
+		ctrlreg[0][0] = 0x3d;
+		ctrlreg[0][1] = 0x08;
+		gc0308_i2c_write(sd, ctrlreg[0], 2);
+
+		ctrlreg[0][0] = 0x3e;
+		ctrlreg[0][1] = 0x08;
+		gc0308_i2c_write(sd, ctrlreg[0], 2);
+
+		
+		ctrlreg[0][0] = 0x3f;
+		ctrlreg[0][1] = 0x08;
+		gc0308_i2c_write(sd, ctrlreg[0], 2);
+
+     } else {
+		//MAX_EXPOSURE_LINES=(PIXEL_CLK/MIN_FRAME_RATE)/VGA_PERIOD_PIXEL_NUMS;
+
+		//sensor_night_mode=KAL_FALSE;
+
+		printk("%s(): line: %d: disable GC0308_night_mode !\n", __func__, __LINE__);
+
+		ctrlreg[0][0] = 0xec;
+		ctrlreg[0][1] = 0x20;		
+		gc0308_i2c_write(sd, ctrlreg[0], 2);
+
+		ctrlreg[0][0] = 0x20;
+		ctrlreg[0][1] = temp_reg|0x20;		
+		gc0308_i2c_write(sd, ctrlreg[0], 2);
+
+		ctrlreg[0][0] = 0x3c;
+		ctrlreg[0][1] = 0x02;		
+		gc0308_i2c_write(sd, ctrlreg[0], 2);
+		
+		ctrlreg[0][0] = 0x3d;
+		ctrlreg[0][1] = 0x02;		
+		gc0308_i2c_write(sd, ctrlreg[0], 2);
+	
+		ctrlreg[0][0] = 0x3e;
+		ctrlreg[0][1] = 0x02;		
+		gc0308_i2c_write(sd, ctrlreg[0], 2);
+		
+		ctrlreg[0][0] = 0x3f;
+		ctrlreg[0][1] = 0x02;		
+		gc0308_i2c_write(sd, ctrlreg[0], 2);
+	}
+
+	 //Delayms_GC(200);
+	 mdelay(200);
+}
+
+
+static const struct v4l2_subdev_core_ops gc0308_core_ops = {
+	.init = gc0308_init,	/* initializing API */
+//	.s_config = gc0308_s_config,	/* Fetch platform data */
+	.queryctrl = gc0308_queryctrl,
+	.g_ctrl = gc0308_g_ctrl,
+	.s_ctrl = gc0308_s_ctrl,
+};
+
+static const struct v4l2_subdev_video_ops gc0308_video_ops = {
+	.s_crystal_freq = gc0308_s_crystal_freq,
+	.g_mbus_fmt = gc0308_g_fmt,
+	.s_mbus_fmt = gc0308_s_fmt,
+	.enum_framesizes = gc0308_enum_framesizes,
+	.enum_frameintervals = gc0308_enum_frameintervals,
+	.enum_mbus_fmt = gc0308_enum_fmt,
+	.try_mbus_fmt = gc0308_try_fmt,
+	.g_parm = gc0308_g_parm,
+	.s_parm = gc0308_s_parm,
+};
+
+static const struct v4l2_subdev_ops gc0308_ops = {
+	.core = &gc0308_core_ops,
+	.video = &gc0308_video_ops,
+};
+
+
+//*********** proc ***************
+static void dump_i2c_regs(void)
+{
+	int i;
+	if(!s_i2c_client) {
+		printk("s_i2c_client not ready\n");
+		return;
+	}
+
+	for(i = 0; i <= 0xFF; i++) 
+		printk("dump_i2c_regs: 0x%02X=0x%02X\n", i, i2c_smbus_read_byte_data(s_i2c_client, i) & 0xFF);
+}
+
+static int gc0308_writeproc(struct file *file,const char *buffer,
+                           unsigned long count, void *data)
+{
+	return count;
+}
+
+static int gc0308_readproc(char *page, char **start, off_t off,
+			  int count, int *eof, void *data)
+{
+	dump_i2c_regs();
+	return 0;
+}
+//********************************
+
+
+static int gc0308_init_reg1(struct i2c_client *client)
+{
+printk("------gc0308_init_reg1------\n");
+#ifdef CONFIG_CAMERA_CONTROLLED_BY_ARM
+printk("------gc0308_control_arm------\n");
+	int i, err = -EINVAL;
+
+	/*
+	unsigned char initreg[2] = {0x12, 0x80};
+
+	v4l_info(client, "%s: camera initialization start\n", __func__);
+	err = gc0308_i2c_write(sd, initreg, 2);
+	if (err < 0)
+		v4l_info(client, "%s: init register set failed\n", __func__);
+	mdelay(150);
+*/
+	printk ("lxy: gc0308_init......\n");
+	for (i = 0; i < GC0308_INIT_REGS; i++) {
+		err = i2c_smbus_write_byte_data(client,  gc0308_init_reg[i][0],  gc0308_init_reg[i][1]);
+		if (err < 0)
+			v4l_info(client, "%s: %d register set failed\n",
+					__func__, i);
+	}
+
+	if (err < 0) {
+		v4l_err(client, "%s: camera initialization failed\n",
+				__func__);
+		return -EIO;	/* FIXME */
+	}
+#endif
+	return 0;
+}
+
+
+/*
+ * ov7675_probe
+ * Fetching platform data is being done with s_config subdev call.
+ * In probe routine, we just register subdev device
+ */
+static int gc0308_probe(struct i2c_client *client,
+			 const struct i2c_device_id *id)
+{
+	struct gc0308_state *state;
+	struct v4l2_subdev *sd;
+
+	state = kzalloc(sizeof(struct gc0308_state), GFP_KERNEL);
+	if (state == NULL)
+		return -ENOMEM;
+
+	sd = &state->sd;
+	strcpy(sd->name, GC0308_DRIVER_NAME);
+
+	/* Registering subdev */
+	v4l2_i2c_subdev_init(sd, client, &gc0308_ops);
+	dev_info(&client->dev, "gc0308 has been probed\n");
+
+	gc0308_init_reg1(client);	//lxy
+
+	s_i2c_client = client;
+	s_proc = create_proc_entry(GC0308_PROC_NAME, 0666, &proc_root);
+	if (s_proc != NULL)
+	{
+		s_proc->write_proc = gc0308_writeproc;
+		s_proc->read_proc = gc0308_readproc;
+	}
+
+/*
+	// i2c_smbus_read_byte_data
+	//int gc0308_id = gc0308_i2c_read(sd, 0x00);
+	extern s32 i2c_smbus_read_byte_data(struct i2c_client *client, u8 command);	
+
+	int time;
+	char value;
+	for (time=0; time<8; time++){
+		value = i2c_smbus_read_byte_data(client, time);
+		dev_info(&client->dev, "gc0308 Read out the reg 0x%x is 0x%x\n", 
+					time,
+					value);
+	}
+*/	
+	return 0;
+}
+
+
+static int gc0308_remove(struct i2c_client *client)
+{
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	if (s_proc != NULL)
+		remove_proc_entry(GC0308_PROC_NAME, &proc_root);
+
+	v4l2_device_unregister_subdev(sd);
+	kfree(to_state(sd));
+	return 0;
+}
+
+static const struct i2c_device_id gc0308_id[] = {
+	{ GC0308_DRIVER_NAME, 0 },
+	{ },
+};
+MODULE_DEVICE_TABLE(i2c, gc0308_id);
+
+static struct i2c_driver gc0308_driver = {
+	.driver = {
+		.owner	= THIS_MODULE,
+		.name	= GC0308_DRIVER_NAME,
+	},
+	.probe		= gc0308_probe,
+	.remove		= gc0308_remove,
+	.id_table	= gc0308_id,
+};
+
+static __init int init_gc0308(void)
+{
+	return i2c_add_driver(&gc0308_driver);
+}
+
+static __exit void exit_gc0308(void)
+{
+	i2c_del_driver(&gc0308_driver);
+}
+
+module_init(init_gc0308);
+module_exit(exit_gc0308);
+
+/*
+static struct v4l2_i2c_driver_data v4l2_i2c_data = {
+	.name = GC0308_DRIVER_NAME,
+	.probe = gc0308_probe,
+	.remove = gc0308_remove,
+	.id_table = gc0308_id,
+};*/		//lxy
+
+MODULE_DESCRIPTION("GC0308 camera driver");
+MODULE_AUTHOR("Ingjye Huang <Ingjye_Huang@asus.com>");
+MODULE_LICENSE("GPL");
diff -uNra linux-3.0.82/drivers/media/video/gc0308.h linux-3.0.82x/drivers/media/video/gc0308.h
--- linux-3.0.82/drivers/media/video/gc0308.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gc0308.h	2017-09-23 03:42:49.442676824 +0800
@@ -0,0 +1,744 @@
+/*
+ * Driver for OV7675 from OV
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#ifndef __GC0308_H__
+#define __GC0308_H__
+
+struct gc0308_reg {
+	unsigned char addr;
+	unsigned char val;
+};
+
+struct gc0308_regset_type {
+	unsigned char *regset;
+	int len;
+};
+
+/*
+ * Macro
+ */
+#define REGSET_LENGTH(x)	(sizeof(x)/sizeof(gc0308_reg))
+
+/*
+ * User defined commands
+ */
+/* S/W defined features for tune */
+#define REG_DELAY	0xFF00	/* in ms */
+#define REG_CMD		0xFFFF	/* Followed by command */
+
+/* Following order should not be changed */
+enum image_size_gc0308 {
+	/* This SoC supports upto UXGA (1600*1200) */
+#if 0
+	QQVGA,	/* 160*120*/
+	QCIF,	/* 176*144 */
+	QVGA,	/* 320*240 */
+	CIF,	/* 352*288 */
+#endif
+	VGA,	/* 640*480 */
+#if 0
+	SVGA,	/* 800*600 */
+
+	HD720P,	/* 1280*720 */
+	SXGA,	/* 1280*1024 */
+	UXGA,	/* 1600*1200 */
+#endif
+};
+
+/*
+ * Following values describe controls of camera
+ * in user aspect and must be match with index of ov7675_regset[]
+ * These values indicates each controls and should be used
+ * to control each control
+ */
+enum gc0308_control {
+	GC0308_INIT,
+	GC0308_EV,
+	GC0308_AWB,
+	GC0308_MWB,
+	GC0308_EFFECT,
+	GC0308_CONTRAST,
+	GC0308_SATURATION,
+	GC0308_SHARPNESS,
+};
+
+#define GC0308_REGSET(x)	{	\
+	.regset = x,			\
+	.len = sizeof(x)/sizeof(gc0308_reg),}
+
+
+#ifdef CONFIG_CAMERA_CONTROLLED_BY_ARM
+/*
+ * User tuned register setting values
+ */
+#if 0
+static unsigned char gc0308_init_reg[][2] = {  //  2010-12-16 kim 
+{0xfe,0x00},
+//{0x28,0x76},
+{0x0f,0x00},
+{0x01,0x6a},
+{0x02,0x70},
+{0xe2,0x00},
+{0xe3,0x96},
+{0xe4,0x02},
+{0xe5,0x58},
+{0xe6,0x02},
+{0xe7,0xee},
+{0xe8,0x03},
+{0xe9,0x84},
+{0xea,0x0e},
+{0xeb,0xa6},
+{0xec,0x20},
+{0x05,0x00},
+{0x06,0x00},
+{0x07,0x00},
+{0x08,0x00},
+{0x09,0x01},
+{0x0a,0xe8},
+{0x0b,0x02},
+{0x0c,0x88},
+{0x0d,0x02},
+{0x0e,0x02},
+{0x10,0x26},
+{0x11,0x0d},
+{0x12,0x2a},
+{0x13,0x00},
+{0x14,0x11},// urbetter
+{0x15,0x0a},
+{0x16,0x05},
+{0x17,0x01},
+{0x18,0x44},
+{0x19,0x44},
+{0x1a,0x2a},
+{0x1b,0x00},
+{0x1c,0x49},
+{0x1d,0x9a},
+{0x1e,0x61},
+{0x1f,0x16},
+{0x20,0xff},
+{0x21,0xfa},
+{0x22,0x57},
+{0x24,0xa2},//0xa0},
+{0x25,0x0f},
+{0x26,0x02},//0x03}, // 0x01
+{0x2f,0x01},
+{0x30,0xf7},
+{0x31,0x50},
+{0x32,0x00},
+{0x39,0x04},
+{0x3a,0x20},
+{0x3b,0x20},
+{0x3c,0x00},
+{0x3d,0x00},
+{0x3e,0x00},
+{0x3f,0x00},
+{0x50,0x16}, // 0x14
+{0x53,0x80},
+{0x54,0x87},
+{0x55,0x87},
+{0x56,0x80},
+{0x8b,0x10},
+{0x8c,0x10},
+{0x8d,0x10},
+{0x8e,0x10},
+{0x8f,0x10},
+{0x90,0x10},
+{0x91,0x3c},
+{0x92,0x50},
+{0x5d,0x12},
+{0x5e,0x1a},
+{0x5f,0x24},
+{0x60,0x07},
+{0x61,0x15},
+{0x62,0x0f}, // 0x08
+{0x64,0x01},  // 0x03
+{0x66,0xe8},
+{0x67,0x86},
+{0x68,0xa2},
+{0x69,0x18},
+{0x6a,0x0f},
+{0x6b,0x00},
+{0x6c,0x5f},
+{0x6d,0x8f},
+{0x6e,0x55},
+{0x6f,0x38},
+{0x70,0x15},
+{0x71,0x33},
+{0x72,0xdc},
+{0x73,0x80},
+{0x74,0x02},
+{0x75,0x3f},
+{0x76,0x02},
+{0x77,0x57}, // 0x47
+{0x78,0x88},
+{0x79,0x81},
+{0x7a,0x81},
+{0x7b,0x22},
+{0x7c,0xff},
+{0x93,0x46},
+{0x94,0x00},
+{0x95,0x03},
+{0x96,0xd0},
+{0x97,0x40},
+{0x98,0xf0},
+{0xb1,0x3c},
+{0xb2,0x3c},
+{0xb3,0x44}, //0x40
+{0xb6,0xe0},
+{0xbd,0x3C},
+{0xbe,0x36},
+{0xd0,0xC9},
+{0xd1,0x10},
+{0xd2,0x90},
+{0xd3,0x88},
+{0xd5,0xF2},
+{0xd6,0x10},
+{0xdb,0x92},
+{0xdc,0xA5},
+{0xdf,0x23},
+{0xd9,0x00},
+{0xda,0x00},
+{0xe0,0x09},
+{0xed,0x04},
+{0xee,0xa0},
+{0xef,0x40},
+{0x80,0x03},
+#if 0
+{0x9F,0x0E},
+{0xA0,0x1C},
+{0xA1,0x34},
+{0xA2,0x48},
+{0xA3,0x5A},
+{0xA4,0x6B},
+{0xA5,0x7B},
+{0xA6,0x95},
+{0xA7,0xAB},
+{0xA8,0xBF},
+{0xA9,0xCE},
+{0xAA,0xD9},
+{0xAB,0xE4},
+{0xAC,0xEC},
+{0xAD,0xF7},
+{0xAE,0xFD},
+{0xAF,0xFF},
+#elif 0
+{0x9F,0x10},
+{0xA0,0x20},
+{0xA1,0x38},
+{0xA2,0x4e},
+{0xA3,0x63},
+{0xA4,0x76},
+{0xA5,0x87},
+{0xA6,0xa2},
+{0xA7,0xb8},
+{0xA8,0xca},
+{0xA9,0xd8},
+{0xAA,0xe3},
+{0xAB,0xEb},
+{0xAC,0xf0},
+{0xAD,0xF8},
+{0xAE,0xFD},
+{0xAF,0xFF},
+#else
+{0x9F,0x14},
+{0xA0,0x28},
+{0xA1,0x44},
+{0xA2,0x5d},
+{0xA3,0x72},
+{0xA4,0x86},
+{0xA5,0x95},
+{0xA6,0xb1},
+{0xA7,0xc6},
+{0xA8,0xd5},
+{0xA9,0xe1},
+{0xAA,0xea},
+{0xAB,0xf1},
+{0xAC,0xf5},
+{0xAD,0xFb},
+{0xAE,0xFe},
+{0xAF,0xFF},
+#endif
+{0xc0,0x00},
+{0xc1,0x14},
+{0xc2,0x21},
+{0xc3,0x36},
+{0xc4,0x49},
+{0xc5,0x5B},
+{0xc6,0x6B},
+{0xc7,0x7B},
+{0xc8,0x98},
+{0xc9,0xB4},
+{0xca,0xCE},
+{0xcb,0xE8},
+{0xcc,0xFF},
+{0xf0,0x02},
+{0xf1,0x01},
+{0xf2,0x04},
+{0xf3,0x30},
+{0xf9,0x9f},
+{0xfa,0x78},
+{0xfe,0x01},
+{0x00,0xf5},
+{0x02,0x20},
+{0x04,0x10},
+{0x05,0x10},
+{0x06,0x20},
+{0x08,0x15},
+{0x0a,0xa0},
+{0x0b,0x64},
+{0x0c,0x08},
+{0x0e,0x4C},
+{0x0f,0x39},
+{0x10,0x41},
+{0x11,0x37},
+{0x12,0x24},
+{0x13,0x39},
+{0x14,0x45},
+{0x15,0x45},
+{0x16,0xc2},
+{0x17,0xA8},
+{0x18,0x18},
+{0x19,0x55},
+{0x1a,0xd8},
+{0x1b,0xf5},
+{0x70,0x40},
+{0x71,0x58},
+{0x72,0x30},
+{0x73,0x48},
+{0x74,0x20},
+{0x75,0x60},
+{0x77,0x20},
+{0x78,0x32},
+{0x30,0x03},
+{0x31,0x40},
+{0x32,0x10},
+{0x33,0xe0},
+{0x34,0xe0},
+{0x35,0x00},
+{0x36,0x80},
+{0x37,0x00},
+{0x38,0x04},
+{0x39,0x09},
+{0x3a,0x12},
+{0x3b,0x1C},
+{0x3c,0x28},
+{0x3d,0x31},
+{0x3e,0x44},
+{0x3f,0x57},
+{0x40,0x6C},
+{0x41,0x81},
+{0x42,0x94},
+{0x43,0xA7},
+{0x44,0xB8},
+{0x45,0xD6},
+{0x46,0xEE},
+{0x47,0x0d},
+{0xfe,0x00}, 
+};
+#endif 
+
+#if 1
+static unsigned char gc0308_reset_reg[][2] = {
+{0xfe,0x80},
+};
+
+static unsigned char gc0308_init_reg[][2] = {  //  2010-12-16 kim 
+{0x0a,0x00}, //dbg-yg  0xfe
+{0x0f,0x00},
+{0x01,0x6a},
+{0x02,0x70},
+{0x05,0x00},
+{0x06,0x00},
+{0x07,0x00},
+{0x08,0x00},
+{0x09,0x01},
+{0x0a,0xe8},
+{0x0b,0x02},
+{0x0c,0x88},
+{0x0d,0x02},
+{0x0e,0x02},
+{0x10,0x26},
+{0x11,0x0d},
+{0x12,0x2a},
+{0x13,0x00},
+{0x14,0x11},// urbetter
+{0x15,0x0a},
+{0x16,0x05},
+{0x17,0x01},
+{0x18,0x44},
+{0x19,0x44},
+{0x1a,0x2a},
+{0x1b,0x00},
+{0x1c,0x49},
+{0x1d,0x9a},
+{0x1e,0x61},
+{0x20,0xff},
+{0x21,0xfa},
+{0x22,0x57},
+//{0x24,0xa2},//0xa0},
+//{0x25,0xff},
+{0x25,0x0f},//cys
+{0x26,0x02},//0x03}, // 0x01
+{0x2f,0x01},
+{0x30,0xf7},
+{0x31,0x50},
+{0x32,0x00},
+{0x39,0x04},
+{0x3a,0x20},
+{0x3b,0x20},
+{0x3c,0x00},
+{0x3d,0x00},
+{0x3e,0x00},
+{0x3f,0x00},
+{0x50,0x16}, // 0x14
+{0x53,0x80},
+{0x54,0x87},
+{0x55,0x87},
+{0x56,0x80},
+{0x8b,0x10},
+{0x8c,0x10},
+{0x8d,0x10},
+{0x8e,0x10},
+{0x8f,0x10},
+{0x90,0x10},
+{0x91,0x3c},
+{0x92,0x50},
+{0x5d,0x12},
+{0x5e,0x1a},
+{0x5f,0x24},
+{0x60,0x07},
+{0x61,0x15},
+{0x62,0x0f}, // 0x08
+{0x64,0x01},  // 0x03
+{0x66,0xe8},
+{0x67,0x86},
+{0x68,0xa2},
+{0x69,0x18},
+{0x6a,0x0f},
+{0x6b,0x00},
+{0x6c,0x5f},
+{0x6d,0x8f},
+{0x6e,0x55},
+{0x6f,0x38},
+{0x70,0x15},
+{0x71,0x33},
+{0x72,0xdc},
+{0x73,0x80},
+{0x74,0x02},
+{0x75,0x3f},
+{0x76,0x02},
+{0x77,0x57}, // 0x47
+{0x78,0x88},
+{0x79,0x81},
+{0x7a,0x81},
+{0x7b,0x22},
+{0x7c,0xff},
+{0x93,0x46},
+{0x94,0x00},
+{0x95,0x03},
+{0x96,0xd0},
+{0x97,0x40},
+{0x98,0xf0},
+{0xb1,0x3c},
+{0xb2,0x3c},
+{0xb3,0x44}, //0x40
+{0xb6,0xe0},
+{0xbd,0x3C},
+{0xbe,0x36},
+{0xd0,0xC9},
+{0xd1,0x10},
+{0xd2,0x90},
+{0xd3,0x90},
+{0xd5,0xF2},
+{0xd6,0x10},
+{0xdb,0x92},
+{0xdc,0xA5},
+{0xdf,0x23},
+{0xd9,0x00},
+{0xda,0x00},
+{0xe0,0x09},
+{0xed,0x04},
+{0xee,0xa0},
+{0xef,0x40},
+{0x80,0x03},
+{0x9F,0x14},
+{0xA0,0x28},
+{0xA1,0x44},
+{0xA2,0x5d},
+{0xA3,0x72},
+{0xA4,0x86},
+{0xA5,0x95},
+{0xA6,0xb1},
+{0xA7,0xc6},
+{0xA8,0xd5},
+{0xA9,0xe1},
+{0xAA,0xea},
+{0xAB,0xf1},
+{0xAC,0xf5},
+{0xAD,0xFb},
+{0xAE,0xFe},
+{0xAF,0xFF},
+{0xc0,0x00},
+{0xc1,0x14},
+{0xc2,0x21},
+{0xc3,0x36},
+{0xc4,0x49},
+{0xc5,0x5B},
+{0xc6,0x6B},
+{0xc7,0x7B},
+{0xc8,0x98},
+{0xc9,0xB4},
+{0xca,0xCE},
+{0xcb,0xE8},
+{0xcc,0xFF},
+{0xf0,0x02},
+{0xf1,0x01},
+{0xf2,0x04},
+{0xf3,0x30},
+{0xf9,0x9f},
+{0xfa,0x78},
+{0xfe,0x01},
+{0x00,0xf5},
+{0x02,0x20},
+{0x04,0x10},
+{0x05,0x10},
+{0x06,0x20},
+{0x08,0x15},
+{0x0a,0xa0},
+{0x0b,0x64},
+{0x0c,0x08},
+{0x0e,0x4C},
+{0x0f,0x39},
+{0x10,0x41},
+{0x11,0x37},
+{0x12,0x24},
+{0x13,0x39},
+{0x14,0x45},
+{0x15,0x45},
+{0x16,0xc2},
+{0x17,0xA8},
+{0x18,0x18},
+{0x19,0x55},
+{0x1a,0xd8},
+{0x1b,0xf5},
+{0x70,0x40},
+{0x71,0x58},
+{0x72,0x30},
+{0x73,0x48},
+{0x74,0x20},
+{0x75,0x60},
+{0x77,0x20},
+{0x78,0x32},
+{0x30,0x03},
+{0x31,0x40},
+{0x32,0x10},
+{0x33,0xe0},
+{0x34,0xe0},
+{0x35,0x00},
+{0x36,0x80},
+{0x37,0x00},
+{0x38,0x04},
+{0x39,0x09},
+{0x3a,0x12},
+{0x3b,0x1C},
+{0x3c,0x28},
+{0x3d,0x31},
+{0x3e,0x44},
+{0x3f,0x57},
+{0x40,0x6C},
+{0x41,0x81},
+{0x42,0x94},
+{0x43,0xA7},
+{0x44,0xB8},
+{0x45,0xD6},
+{0x46,0xEE},
+{0x47,0x0d},
+{0xfe,0x00}, 
+};
+#endif
+
+#define GC0308_INIT_REGS	(sizeof(gc0308_init_reg) / sizeof(gc0308_init_reg[0]))    
+
+unsigned char gc0308_windows_640[][2] = {
+    {0x05,0x00},
+    {0x06,0x00},
+    {0x07,0x00},
+    {0x08,0x00},
+    {0x09,0x01},
+    {0x0a,0xe8},
+    {0x0b,0x02},
+    {0x0c,0x88},
+};
+
+unsigned char Gc0308_Data[][2]            = { {0x24,0x00}, };
+unsigned char gc0308_output_RGB[][2]      = { {0x24,0xa6}, };
+unsigned char gc0308_output_yuv0[][2]     = { {0x24,0xa2}, };
+unsigned char gc0308_output_yuv1[][2]     = { {0x24,0xa3}, };
+unsigned char gc0308_output_yuv2[][2]     = { {0x24,0xa1}, };
+unsigned char gc0308_output_yuv3[][2]     = { {0x24,0xa0}, };
+unsigned char gc0308_paddrv[][2]          = { {0x1f,0x33}, };
+unsigned char gc0308_syncmode[][2]        = { {0x26,0xf7}, }; // 0xbf by liusu
+unsigned char gc0308_syncmode1[][2]       = { {0x26,0xf7}, }; // 0xbf by liusu
+unsigned char gc0308_output_en[][2]       = { {0x25,0xff}, };
+unsigned char gc0308_windows_2_page1[][2] = { {0xfe,0x01}, };
+unsigned char gc0308_windows_2_page0[][2] = { {0xfe,0x00}, };
+unsigned char gc0308_windows_2_qvga[][2]  = { {0x54,0x22}, };
+unsigned char gc0308_windows_2_vga[][2]   = { {0x54,0x11}, };
+
+// effect
+unsigned char gc0308_effect_normal [][2] = {
+	{0x23,0x00},//normal  
+	{0x2d,0x0a},	 
+	{0x20,0xff},	 
+	{0xd2,0x90},	 
+	{0x73,0x00},	 
+	{0x77,0x54},	 
+	{0xb3,0x40},
+	{0xb4,0x80},
+	{0xba,0x00},
+	{0xbb,0x00},
+};
+
+unsigned char gc0308_effect_grayscale [][2] = {
+	{0x23,0x02},//grayscale   
+    {0x2d,0x0a},     
+    {0x20,0xff},     
+    {0xd2,0x90},     
+    {0x73,0x00},     
+    {0xb3,0x40},     
+    {0xb4,0x80},         
+    {0xba,0x00},
+	{0xbb,0x00},
+};
+
+unsigned char gc0308_effect_sepia [][2] = {
+	{0x23,0x02}, //sepia												
+	{0x2d,0x0a},						 
+	{0x20,0xff},						 
+	{0xd2,0x90},						 
+	{0x73,0x00},						 
+	{0xb3,0x40},						 
+	{0xb4,0x80},						 
+	{0xba,0xd0},
+	{0xbb,0x28},
+};
+
+unsigned char gc0308_effect_sepia_green  [][2] = {
+	{0x23,0x02},	//sepia green
+	{0x2d,0x0a},	
+	{0x20,0xff},	
+	{0xd2,0x90},	
+	{0x77,0x88},
+	{0xb3,0x40},
+	{0xb4,0x80},			
+	{0xba,0xc0},
+	{0xbb,0xc0},	
+};
+
+unsigned char gc0308_effect_sepia_blue[][2] = {
+	{0x23,0x02}, //sharpness 
+	{0x2d,0x0a},  
+	{0x20,0xff},	
+	{0xd2,0x90},	
+	{0x73,0x00},	
+	{0xb3,0x40},	
+	{0xb4,0x80}, 
+	{0xba,0x50}, 
+	{0xbb,0xe0}, 
+};
+
+unsigned char gc0308_effect_color_inv [][2] = {
+	{0x23,0x01}, //sketch				  
+	{0x2d,0x0a},
+	{0x20,0xff},
+	{0xd2,0x90},
+	{0x73,0x00},
+	{0xb3,0x40},
+	{0xb4,0x80},
+	{0xba,0x00},
+	{0xbb,0x00},
+};
+
+unsigned char gc0308_effect_gray_inv [][2] = {
+	{0x23,0x03}, //sketch				  
+	{0x2d,0x0a},
+	{0x20,0xff},
+	{0xd2,0x90},
+	{0x73,0x00},
+	{0xb3,0x40},
+	{0xb4,0x80},
+	{0xba,0x00},
+	{0xbb,0x00},
+};
+
+
+unsigned char gc0308_effect_embossment [][2] = {
+	{0x23,0x02}, //sketch				  
+	{0x2d,0x0a},
+	{0x20,0xbf},
+	{0xd2,0x10},
+	{0x73,0x01},
+	{0x51,0x40},
+	{0x52,0x40},
+	{0xb3,0x40},
+	{0xb4,0x80},
+	{0xba,0x00},
+	{0xbb,0x00},
+};
+
+unsigned char gc0308_effect_sketch [][2] = {
+	{0x23,0x02}, //sketch				  
+	{0x2d,0x0a},
+	{0x20,0xbf},
+	{0xd2,0x10},
+	{0x73,0x01},
+	{0x51,0x40},
+	{0x52,0x40},
+	{0xb3,0x98},
+	{0xb4,0x06},
+	{0xba,0x00},
+	{0xbb,0x00},
+};
+
+unsigned char gc0308_white_balance_auto  [][2] = {
+	{0x5a,0x56},	
+	{0x5b,0x40},	
+	{0x5c,0x4a},	
+	// eable AWB
+};
+
+unsigned char gc0308_white_balance_cloud [][2] = {
+	// disable AWB
+	{0x5a,0x8c},	
+	{0x5b,0x50},	
+	{0x5c,0x40},	
+};
+
+unsigned char gc0308_white_balance_daylight [][2] = {
+	// disable AWB
+	{0x5a,0x74},	
+	{0x5b,0x52},	
+	{0x5c,0x40},	
+};
+
+unsigned char gc0308_white_balance_incandescence [][2] = {
+	// disable AWB
+	{0x5a,0x48},	
+	{0x5b,0x40},	
+	{0x5c,0x5c},	
+};
+
+unsigned char gc0308_white_balance_fluorescent [][2] = {
+	// disable AWB
+	{0x5a,0x40},	
+	{0x5b,0x42},	
+	{0x5c,0x50},	
+};
+
+#endif     
+#endif
diff -uNra linux-3.0.82/drivers/media/video/gc0308_rgb640x480.h linux-3.0.82x/drivers/media/video/gc0308_rgb640x480.h
--- linux-3.0.82/drivers/media/video/gc0308_rgb640x480.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gc0308_rgb640x480.h	2017-09-23 03:42:49.442676824 +0800
@@ -0,0 +1,793 @@
+/*
+ * Driver for OV7675 from OV
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#ifndef __GC0308_H__
+#define __GC0308_H__
+
+struct gc0308_reg {
+	unsigned char addr;
+	unsigned char val;
+};
+
+struct gc0308_regset_type {
+	unsigned char *regset;
+	int len;
+};
+
+/*
+ * Macro
+ */
+#define REGSET_LENGTH(x)	(sizeof(x)/sizeof(gc0308_reg))
+
+/*
+ * User defined commands
+ */
+/* S/W defined features for tune */
+#define REG_DELAY	0xFF00	/* in ms */
+#define REG_CMD		0xFFFF	/* Followed by command */
+
+/* Following order should not be changed */
+enum image_size_gc0308 {
+	/* This SoC supports upto UXGA (1600*1200) */
+#if 0
+	QQVGA,	/* 160*120*/
+	QCIF,	/* 176*144 */
+	QVGA,	/* 320*240 */
+	CIF,	/* 352*288 */
+#endif
+	VGA,	/* 640*480 */
+#if 0
+	SVGA,	/* 800*600 */
+
+	HD720P,	/* 1280*720 */
+	SXGA,	/* 1280*1024 */
+	UXGA,	/* 1600*1200 */
+#endif
+};
+
+/*
+ * Following values describe controls of camera
+ * in user aspect and must be match with index of ov7675_regset[]
+ * These values indicates each controls and should be used
+ * to control each control
+ */
+enum gc0308_control {
+	GC0308_INIT,
+	GC0308_EV,
+	GC0308_AWB,
+	GC0308_MWB,
+	GC0308_EFFECT,
+	GC0308_CONTRAST,
+	GC0308_SATURATION,
+	GC0308_SHARPNESS,
+};
+
+#define GC0308_REGSET(x)	{	\
+	.regset = x,			\
+	.len = sizeof(x)/sizeof(gc0308_reg),}
+
+
+#ifdef CONFIG_CAMERA_CONTROLLED_BY_ARM
+/*
+ * User tuned register setting values
+ */
+#if 0
+static unsigned char gc0308_init_reg[][2] = {  //  2010-12-16 kim 
+{0xfe,0x00},
+//{0x28,0x76},
+{0x0f,0x00},
+{0x01,0x6a},
+{0x02,0x70},
+{0xe2,0x00},
+{0xe3,0x96},
+{0xe4,0x02},
+{0xe5,0x58},
+{0xe6,0x02},
+{0xe7,0xee},
+{0xe8,0x03},
+{0xe9,0x84},
+{0xea,0x0e},
+{0xeb,0xa6},
+{0xec,0x20},
+{0x05,0x00},
+{0x06,0x00},
+{0x07,0x00},
+{0x08,0x00},
+{0x09,0x01},
+{0x0a,0xe8},
+{0x0b,0x02},
+{0x0c,0x88},
+{0x0d,0x02},
+{0x0e,0x02},
+{0x10,0x26},
+{0x11,0x0d},
+{0x12,0x2a},
+{0x13,0x00},
+{0x14,0x11},// urbetter
+{0x15,0x0a},
+{0x16,0x05},
+{0x17,0x01},
+{0x18,0x44},
+{0x19,0x44},
+{0x1a,0x2a},
+{0x1b,0x00},
+{0x1c,0x49},
+{0x1d,0x9a},
+{0x1e,0x61},
+{0x1f,0x16},
+{0x20,0xff},
+{0x21,0xfa},
+{0x22,0x57},
+{0x24,0xa2},//0xa0},
+{0x25,0x0f},
+{0x26,0x02},//0x03}, // 0x01
+{0x2f,0x01},
+{0x30,0xf7},
+{0x31,0x50},
+{0x32,0x00},
+{0x39,0x04},
+{0x3a,0x20},
+{0x3b,0x20},
+{0x3c,0x00},
+{0x3d,0x00},
+{0x3e,0x00},
+{0x3f,0x00},
+{0x50,0x16}, // 0x14
+{0x53,0x80},
+{0x54,0x87},
+{0x55,0x87},
+{0x56,0x80},
+{0x8b,0x10},
+{0x8c,0x10},
+{0x8d,0x10},
+{0x8e,0x10},
+{0x8f,0x10},
+{0x90,0x10},
+{0x91,0x3c},
+{0x92,0x50},
+{0x5d,0x12},
+{0x5e,0x1a},
+{0x5f,0x24},
+{0x60,0x07},
+{0x61,0x15},
+{0x62,0x0f}, // 0x08
+{0x64,0x01},  // 0x03
+{0x66,0xe8},
+{0x67,0x86},
+{0x68,0xa2},
+{0x69,0x18},
+{0x6a,0x0f},
+{0x6b,0x00},
+{0x6c,0x5f},
+{0x6d,0x8f},
+{0x6e,0x55},
+{0x6f,0x38},
+{0x70,0x15},
+{0x71,0x33},
+{0x72,0xdc},
+{0x73,0x80},
+{0x74,0x02},
+{0x75,0x3f},
+{0x76,0x02},
+{0x77,0x57}, // 0x47
+{0x78,0x88},
+{0x79,0x81},
+{0x7a,0x81},
+{0x7b,0x22},
+{0x7c,0xff},
+{0x93,0x46},
+{0x94,0x00},
+{0x95,0x03},
+{0x96,0xd0},
+{0x97,0x40},
+{0x98,0xf0},
+{0xb1,0x3c},
+{0xb2,0x3c},
+{0xb3,0x44}, //0x40
+{0xb6,0xe0},
+{0xbd,0x3C},
+{0xbe,0x36},
+{0xd0,0xC9},
+{0xd1,0x10},
+{0xd2,0x90},
+{0xd3,0x88},
+{0xd5,0xF2},
+{0xd6,0x10},
+{0xdb,0x92},
+{0xdc,0xA5},
+{0xdf,0x23},
+{0xd9,0x00},
+{0xda,0x00},
+{0xe0,0x09},
+{0xed,0x04},
+{0xee,0xa0},
+{0xef,0x40},
+{0x80,0x03},
+#if 0
+{0x9F,0x0E},
+{0xA0,0x1C},
+{0xA1,0x34},
+{0xA2,0x48},
+{0xA3,0x5A},
+{0xA4,0x6B},
+{0xA5,0x7B},
+{0xA6,0x95},
+{0xA7,0xAB},
+{0xA8,0xBF},
+{0xA9,0xCE},
+{0xAA,0xD9},
+{0xAB,0xE4},
+{0xAC,0xEC},
+{0xAD,0xF7},
+{0xAE,0xFD},
+{0xAF,0xFF},
+#elif 0
+{0x9F,0x10},
+{0xA0,0x20},
+{0xA1,0x38},
+{0xA2,0x4e},
+{0xA3,0x63},
+{0xA4,0x76},
+{0xA5,0x87},
+{0xA6,0xa2},
+{0xA7,0xb8},
+{0xA8,0xca},
+{0xA9,0xd8},
+{0xAA,0xe3},
+{0xAB,0xEb},
+{0xAC,0xf0},
+{0xAD,0xF8},
+{0xAE,0xFD},
+{0xAF,0xFF},
+#else
+{0x9F,0x14},
+{0xA0,0x28},
+{0xA1,0x44},
+{0xA2,0x5d},
+{0xA3,0x72},
+{0xA4,0x86},
+{0xA5,0x95},
+{0xA6,0xb1},
+{0xA7,0xc6},
+{0xA8,0xd5},
+{0xA9,0xe1},
+{0xAA,0xea},
+{0xAB,0xf1},
+{0xAC,0xf5},
+{0xAD,0xFb},
+{0xAE,0xFe},
+{0xAF,0xFF},
+#endif
+{0xc0,0x00},
+{0xc1,0x14},
+{0xc2,0x21},
+{0xc3,0x36},
+{0xc4,0x49},
+{0xc5,0x5B},
+{0xc6,0x6B},
+{0xc7,0x7B},
+{0xc8,0x98},
+{0xc9,0xB4},
+{0xca,0xCE},
+{0xcb,0xE8},
+{0xcc,0xFF},
+{0xf0,0x02},
+{0xf1,0x01},
+{0xf2,0x04},
+{0xf3,0x30},
+{0xf9,0x9f},
+{0xfa,0x78},
+{0xfe,0x01},
+{0x00,0xf5},
+{0x02,0x20},
+{0x04,0x10},
+{0x05,0x10},
+{0x06,0x20},
+{0x08,0x15},
+{0x0a,0xa0},
+{0x0b,0x64},
+{0x0c,0x08},
+{0x0e,0x4C},
+{0x0f,0x39},
+{0x10,0x41},
+{0x11,0x37},
+{0x12,0x24},
+{0x13,0x39},
+{0x14,0x45},
+{0x15,0x45},
+{0x16,0xc2},
+{0x17,0xA8},
+{0x18,0x18},
+{0x19,0x55},
+{0x1a,0xd8},
+{0x1b,0xf5},
+{0x70,0x40},
+{0x71,0x58},
+{0x72,0x30},
+{0x73,0x48},
+{0x74,0x20},
+{0x75,0x60},
+{0x77,0x20},
+{0x78,0x32},
+{0x30,0x03},
+{0x31,0x40},
+{0x32,0x10},
+{0x33,0xe0},
+{0x34,0xe0},
+{0x35,0x00},
+{0x36,0x80},
+{0x37,0x00},
+{0x38,0x04},
+{0x39,0x09},
+{0x3a,0x12},
+{0x3b,0x1C},
+{0x3c,0x28},
+{0x3d,0x31},
+{0x3e,0x44},
+{0x3f,0x57},
+{0x40,0x6C},
+{0x41,0x81},
+{0x42,0x94},
+{0x43,0xA7},
+{0x44,0xB8},
+{0x45,0xD6},
+{0x46,0xEE},
+{0x47,0x0d},
+{0xfe,0x00}, 
+};
+#endif 
+
+#if 1
+static unsigned char gc0308_reset_reg[][2] = {
+{0xfe,0x80},
+};
+
+	static unsigned char gc0308_init_reg[][2] = {  //  2010-12-16 kim 
+//{0xfe,0x00},
+{0x0f,0x00},
+{0x01,0x6a},
+{0x02,0x70},
+{0xe2,0x00},
+{0xe3,0x96},
+{0xe4,0x02},
+{0xe5,0x58},
+{0xe6,0x02},
+{0xe7,0x58},
+{0xe8,0x02},
+{0xe9,0x58},
+{0xea,0x0e},
+{0xeb,0xa6},
+{0xec,0x20},
+{0x05,0x00},
+{0x06,0x00},
+{0x07,0x00},
+{0x08,0x00},
+{0x09,0x01},
+{0x0a,0xe8},
+{0x0b,0x02},
+{0x0c,0x88},
+{0x0d,0x02},
+{0x0e,0x02},
+{0x10,0x26},
+{0x11,0x0d},
+{0x12,0x2a},
+{0x13,0x00},
+{0x14,0x10},
+{0x15,0x0a},
+{0x16,0x05},
+{0x17,0x01},
+{0x18,0x44},
+{0x19,0x44},
+{0x1a,0x2a},
+{0x1b,0x00},
+{0x1c,0x49},
+{0x1d,0x9a},
+{0x1e,0x61},
+{0x1f,0x16},
+{0x20,0xff},
+{0x21,0xfa},
+{0x22,0x57},
+{0x24,0xa0},
+{0x25,0x0f},
+{0x26,0x03}, // 0x01
+{0x2f,0x01},
+{0x30,0xf7},
+{0x31,0x50},
+{0x32,0x00},
+{0x39,0x04},
+{0x3a,0x20},
+{0x3b,0x20},
+{0x3c,0x00},
+{0x3d,0x00},
+{0x3e,0x00},
+{0x3f,0x00},
+{0x50,0x16}, // 0x14
+{0x53,0x80},
+{0x54,0x87},
+{0x55,0x87},
+{0x56,0x80},
+{0x8b,0x10},
+{0x8c,0x10},
+{0x8d,0x10},
+{0x8e,0x10},
+{0x8f,0x10},
+{0x90,0x10},
+{0x91,0x3c},
+{0x92,0x50},
+{0x5d,0x12},
+{0x5e,0x1a},
+{0x5f,0x24},
+{0x60,0x07},
+{0x61,0x15},
+{0x62,0x0f}, // 0x08
+{0x64,0x01},  // 0x03
+{0x66,0xe8},
+{0x67,0x86},
+{0x68,0xa2},
+{0x69,0x18},
+{0x6a,0x0f},
+{0x6b,0x00},
+{0x6c,0x5f},
+{0x6d,0x8f},
+{0x6e,0x55},
+{0x6f,0x38},
+{0x70,0x15},
+{0x71,0x33},
+{0x72,0xdc},
+{0x73,0x80},
+{0x74,0x02},
+{0x75,0x3f},
+{0x76,0x02},
+{0x77,0x57}, // 0x47
+{0x78,0x88},
+{0x79,0x81},
+{0x7a,0x81},
+{0x7b,0x22},
+{0x7c,0xff},
+{0x93,0x46},
+{0x94,0x00},
+{0x95,0x03},
+{0x96,0xd0},
+{0x97,0x40},
+{0x98,0xf0},
+{0xb1,0x3c},
+{0xb2,0x3c},
+{0xb3,0x44}, //0x40
+{0xb6,0xe0},
+{0xbd,0x3C},
+{0xbe,0x36},
+{0xd0,0xC9},
+{0xd1,0x10},
+{0xd2,0x90},
+{0xd3,0x88},
+{0xd5,0xF2},
+{0xd6,0x10},
+{0xdb,0x92},
+{0xdc,0xA5},
+{0xdf,0x23},
+{0xd9,0x00},
+{0xda,0x00},
+{0xe0,0x09},
+{0xed,0x04},
+{0xee,0xa0},
+{0xef,0x40},
+{0x80,0x03},
+#if 0
+{0x9F,0x0E},
+{0xA0,0x1C},
+{0xA1,0x34},
+{0xA2,0x48},
+{0xA3,0x5A},
+{0xA4,0x6B},
+{0xA5,0x7B},
+{0xA6,0x95},
+{0xA7,0xAB},
+{0xA8,0xBF},
+{0xA9,0xCE},
+{0xAA,0xD9},
+{0xAB,0xE4},
+{0xAC,0xEC},
+{0xAD,0xF7},
+{0xAE,0xFD},
+{0xAF,0xFF},
+#elif 0
+{0x9F,0x10},
+{0xA0,0x20},
+{0xA1,0x38},
+{0xA2,0x4e},
+{0xA3,0x63},
+{0xA4,0x76},
+{0xA5,0x87},
+{0xA6,0xa2},
+{0xA7,0xb8},
+{0xA8,0xca},
+{0xA9,0xd8},
+{0xAA,0xe3},
+{0xAB,0xEb},
+{0xAC,0xf0},
+{0xAD,0xF8},
+{0xAE,0xFD},
+{0xAF,0xFF},
+#else
+{0x9F,0x14},
+{0xA0,0x28},
+{0xA1,0x44},
+{0xA2,0x5d},
+{0xA3,0x72},
+{0xA4,0x86},
+{0xA5,0x95},
+{0xA6,0xb1},
+{0xA7,0xc6},
+{0xA8,0xd5},
+{0xA9,0xe1},
+{0xAA,0xea},
+{0xAB,0xf1},
+{0xAC,0xf5},
+{0xAD,0xFb},
+{0xAE,0xFe},
+{0xAF,0xFF},
+#endif
+{0xc0,0x00},
+{0xc1,0x14},
+{0xc2,0x21},
+{0xc3,0x36},
+{0xc4,0x49},
+{0xc5,0x5B},
+{0xc6,0x6B},
+{0xc7,0x7B},
+{0xc8,0x98},
+{0xc9,0xB4},
+{0xca,0xCE},
+{0xcb,0xE8},
+{0xcc,0xFF},
+{0xf0,0x02},
+{0xf1,0x01},
+{0xf2,0x04},
+{0xf3,0x30},
+{0xf9,0x9f},
+{0xfa,0x78},
+{0xfe,0x01},
+{0x00,0xf5},
+{0x02,0x20},
+{0x04,0x10},
+{0x05,0x10},
+{0x06,0x20},
+{0x08,0x15},
+{0x0a,0xa0},
+{0x0b,0x64},
+{0x0c,0x08},
+{0x0e,0x4C},
+{0x0f,0x39},
+{0x10,0x41},
+{0x11,0x37},
+{0x12,0x24},
+{0x13,0x39},
+{0x14,0x45},
+{0x15,0x45},
+{0x16,0xc2},
+{0x17,0xA8},
+{0x18,0x18},
+{0x19,0x55},
+{0x1a,0xd8},
+{0x1b,0xf5},
+{0x70,0x40},
+{0x71,0x58},
+{0x72,0x30},
+{0x73,0x48},
+{0x74,0x20},
+{0x75,0x60},
+{0x77,0x20},
+{0x78,0x32},
+{0x30,0x03},
+{0x31,0x40},
+{0x32,0x10},
+{0x33,0xe0},
+{0x34,0xe0},
+{0x35,0x00},
+{0x36,0x80},
+{0x37,0x00},
+{0x38,0x04},
+{0x39,0x09},
+{0x3a,0x12},
+{0x3b,0x1C},
+{0x3c,0x28},
+{0x3d,0x31},
+{0x3e,0x44},
+{0x3f,0x57},
+{0x40,0x6C},
+{0x41,0x81},
+{0x42,0x94},
+{0x43,0xA7},
+{0x44,0xB8},
+{0x45,0xD6},
+{0x46,0xEE},
+{0x47,0x0d},
+{0xfe,0x00}, 
+};
+#endif
+
+#define GC0308_INIT_REGS	(sizeof(gc0308_init_reg) / sizeof(gc0308_init_reg[0]))    
+
+unsigned char gc0308_windows_640[][2] = {
+    {0x05,0x00},
+    {0x06,0x00},
+    {0x07,0x00},
+    {0x08,0x00},
+    {0x09,0x01},
+    {0x0a,0xe8},
+    {0x0b,0x02},
+    {0x0c,0x88},
+};
+
+unsigned char Gc0308_Data[][2]            = { {0x24,0x00}, };
+unsigned char gc0308_output_RGB[][2]      = { {0x24,0xa6}, };
+unsigned char gc0308_output_yuv0[][2]     = { {0x24,0xa2}, };
+unsigned char gc0308_output_yuv1[][2]     = { {0x24,0xa3}, };
+unsigned char gc0308_output_yuv2[][2]     = { {0x24,0xa1}, };
+unsigned char gc0308_output_yuv3[][2]     = { {0x24,0xa0}, };
+unsigned char gc0308_paddrv[][2]          = { {0x1f,0x33}, };
+unsigned char gc0308_syncmode[][2]        = { {0x26,0xf7}, }; // 0xbf by liusu
+unsigned char gc0308_syncmode1[][2]       = { {0x26,0xf7}, }; // 0xbf by liusu
+unsigned char gc0308_output_en[][2]       = { {0x25,0xff}, };
+unsigned char gc0308_windows_2_page1[][2] = { {0xfe,0x01}, };
+unsigned char gc0308_windows_2_page0[][2] = { {0xfe,0x00}, };
+unsigned char gc0308_windows_2_qvga[][2]  = { {0x54,0x22}, };
+unsigned char gc0308_windows_2_vga[][2]   = { {0x54,0x11}, };
+
+// effect
+unsigned char gc0308_effect_normal [][2] = {
+	{0x23,0x00},//normal  
+	{0x2d,0x0a},	 
+	{0x20,0xff},	 
+	{0xd2,0x90},	 
+	{0x73,0x00},	 
+	{0x77,0x54},	 
+	{0xb3,0x40},
+	{0xb4,0x80},
+	{0xba,0x00},
+	{0xbb,0x00},
+};
+
+unsigned char gc0308_effect_grayscale [][2] = {
+	{0x23,0x02},//grayscale   
+    {0x2d,0x0a},     
+    {0x20,0xff},     
+    {0xd2,0x90},     
+    {0x73,0x00},     
+    {0xb3,0x40},     
+    {0xb4,0x80},         
+    {0xba,0x00},
+	{0xbb,0x00},
+};
+
+unsigned char gc0308_effect_sepia [][2] = {
+	{0x23,0x02}, //sepia												
+	{0x2d,0x0a},						 
+	{0x20,0xff},						 
+	{0xd2,0x90},						 
+	{0x73,0x00},						 
+	{0xb3,0x40},						 
+	{0xb4,0x80},						 
+	{0xba,0xd0},
+	{0xbb,0x28},
+};
+
+unsigned char gc0308_effect_sepia_green  [][2] = {
+	{0x23,0x02},	//sepia green
+	{0x2d,0x0a},	
+	{0x20,0xff},	
+	{0xd2,0x90},	
+	{0x77,0x88},
+	{0xb3,0x40},
+	{0xb4,0x80},			
+	{0xba,0xc0},
+	{0xbb,0xc0},	
+};
+
+unsigned char gc0308_effect_sepia_blue[][2] = {
+	{0x23,0x02}, //sharpness 
+	{0x2d,0x0a},  
+	{0x20,0xff},	
+	{0xd2,0x90},	
+	{0x73,0x00},	
+	{0xb3,0x40},	
+	{0xb4,0x80}, 
+	{0xba,0x50}, 
+	{0xbb,0xe0}, 
+};
+
+unsigned char gc0308_effect_color_inv [][2] = {
+	{0x23,0x01}, //sketch				  
+	{0x2d,0x0a},
+	{0x20,0xff},
+	{0xd2,0x90},
+	{0x73,0x00},
+	{0xb3,0x40},
+	{0xb4,0x80},
+	{0xba,0x00},
+	{0xbb,0x00},
+};
+
+unsigned char gc0308_effect_gray_inv [][2] = {
+	{0x23,0x03}, //sketch				  
+	{0x2d,0x0a},
+	{0x20,0xff},
+	{0xd2,0x90},
+	{0x73,0x00},
+	{0xb3,0x40},
+	{0xb4,0x80},
+	{0xba,0x00},
+	{0xbb,0x00},
+};
+
+
+unsigned char gc0308_effect_embossment [][2] = {
+	{0x23,0x02}, //sketch				  
+	{0x2d,0x0a},
+	{0x20,0xbf},
+	{0xd2,0x10},
+	{0x73,0x01},
+	{0x51,0x40},
+	{0x52,0x40},
+	{0xb3,0x40},
+	{0xb4,0x80},
+	{0xba,0x00},
+	{0xbb,0x00},
+};
+
+unsigned char gc0308_effect_sketch [][2] = {
+	{0x23,0x02}, //sketch				  
+	{0x2d,0x0a},
+	{0x20,0xbf},
+	{0xd2,0x10},
+	{0x73,0x01},
+	{0x51,0x40},
+	{0x52,0x40},
+	{0xb3,0x98},
+	{0xb4,0x06},
+	{0xba,0x00},
+	{0xbb,0x00},
+};
+
+unsigned char gc0308_white_balance_auto  [][2] = {
+	{0x5a,0x56},	
+	{0x5b,0x40},	
+	{0x5c,0x4a},	
+	// eable AWB
+};
+
+unsigned char gc0308_white_balance_cloud [][2] = {
+	// disable AWB
+	{0x5a,0x8c},	
+	{0x5b,0x50},	
+	{0x5c,0x40},	
+};
+
+unsigned char gc0308_white_balance_daylight [][2] = {
+	// disable AWB
+	{0x5a,0x74},	
+	{0x5b,0x52},	
+	{0x5c,0x40},	
+};
+
+unsigned char gc0308_white_balance_incandescence [][2] = {
+	// disable AWB
+	{0x5a,0x48},	
+	{0x5b,0x40},	
+	{0x5c,0x5c},	
+};
+
+unsigned char gc0308_white_balance_fluorescent [][2] = {
+	// disable AWB
+	{0x5a,0x40},	
+	{0x5b,0x42},	
+	{0x5c,0x50},	
+};
+
+#endif     
+#endif
diff -uNra linux-3.0.82/drivers/media/video/gspca/benq.c linux-3.0.82x/drivers/media/video/gspca/benq.c
--- linux-3.0.82/drivers/media/video/gspca/benq.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/benq.c	2017-09-23 03:42:49.442676824 +0800
@@ -1,7 +1,7 @@
 /*
  * Benq DC E300 subdriver
  *
- * Copyright (C) 2009 Jean-Francois Moine (http://moinejf.free.fr)
+ * Copyright (C) 2009-2011 Jean-Francois Moine (http://moinejf.free.fr)
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -18,7 +18,9 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
 
-#define MODULE_NAME "benq"
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
+//#define MODULE_NAME "benq"
 
 #include "gspca.h"
 
@@ -62,7 +64,7 @@
 			0,
 			500);
 	if (ret < 0) {
-		err("reg_w err %d", ret);
+		pr_err("reg_w err %d\n", ret);
 		gspca_dev->usb_err = ret;
 	}
 }
@@ -74,7 +76,6 @@
 	gspca_dev->cam.cam_mode = vga_mode;
 	gspca_dev->cam.nmodes = ARRAY_SIZE(vga_mode);
 	gspca_dev->cam.no_urb_create = 1;
-	gspca_dev->cam.reverse_alts = 1;
 	return 0;
 }
 
@@ -84,20 +85,6 @@
 	return 0;
 }
 
-static int sd_isoc_init(struct gspca_dev *gspca_dev)
-{
-	int ret;
-
-	ret = usb_set_interface(gspca_dev->dev, gspca_dev->iface,
-		gspca_dev->nbalt - 1);
-	if (ret < 0) {
-		err("usb_set_interface failed");
-		return ret;
-	}
-/*	reg_w(gspca_dev, 0x0003, 0x0002); */
-	return 0;
-}
-
 /* -- start the camera -- */
 static int sd_start(struct gspca_dev *gspca_dev)
 {
@@ -113,7 +100,7 @@
 	for (n = 0; n < 4; n++) {
 		urb = usb_alloc_urb(SD_NPKT, GFP_KERNEL);
 		if (!urb) {
-			err("usb_alloc_urb failed");
+			pr_err("usb_alloc_urb failed\n");
 			return -ENOMEM;
 		}
 		gspca_dev->urb[n] = urb;
@@ -123,7 +110,7 @@
 						&urb->transfer_dma);
 
 		if (urb->transfer_buffer == NULL) {
-			err("usb_alloc_coherent failed");
+			pr_err("usb_alloc_coherent failed\n");
 			return -ENOMEM;
 		}
 		urb->dev = gspca_dev->dev;
@@ -147,13 +134,20 @@
 
 static void sd_stopN(struct gspca_dev *gspca_dev)
 {
+	struct usb_interface *intf;
+
 	reg_w(gspca_dev, 0x003c, 0x0003);
 	reg_w(gspca_dev, 0x003c, 0x0004);
 	reg_w(gspca_dev, 0x003c, 0x0005);
 	reg_w(gspca_dev, 0x003c, 0x0006);
 	reg_w(gspca_dev, 0x003c, 0x0007);
+
+	/* switch to the highest altsetting
+	 * otherwise, switching to alt 0 fails */
+/*fixme: should do the same after switching to alt 0*/
+	intf = usb_ifnum_to_if(gspca_dev->dev, gspca_dev->iface);
 	usb_set_interface(gspca_dev->dev, gspca_dev->iface,
-					gspca_dev->nbalt - 1);
+					intf->num_altsetting - 1);
 }
 
 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
@@ -181,7 +175,7 @@
 		if (gspca_dev->frozen)
 			return;
 #endif
-		err("urb status: %d", urb->status);
+		pr_err("urb status: %d\n", urb->status);
 		return;
 	}
 
@@ -209,7 +203,7 @@
 		if (st == 0)
 			st = urb->iso_frame_desc[i].status;
 		if (st) {
-			err("ISOC data error: [%d] status=%d",
+			pr_err("ISOC data error: [%d] status=%d\n",
 				i, st);
 			gspca_dev->last_packet_type = DISCARD_PACKET;
 			continue;
@@ -256,20 +250,20 @@
 	/* resubmit the URBs */
 	st = usb_submit_urb(urb0, GFP_ATOMIC);
 	if (st < 0)
-		err("usb_submit_urb(0) ret %d", st);
+		pr_err("usb_submit_urb(0) ret %d\n", st);
 	st = usb_submit_urb(urb, GFP_ATOMIC);
 	if (st < 0)
-		err("usb_submit_urb() ret %d", st);
+		pr_err("usb_submit_urb() ret %d\n", st);
 }
 
 /* sub-driver description */
 static const struct sd_desc sd_desc = {
-	.name = MODULE_NAME,
+//	.name = MODULE_NAME,
+	.name = KBUILD_MODNAME,
 	.ctrls = sd_ctrls,
 	.nctrls = ARRAY_SIZE(sd_ctrls),
 	.config = sd_config,
 	.init = sd_init,
-	.isoc_init = sd_isoc_init,
 	.start = sd_start,
 	.stopN = sd_stopN,
 	.pkt_scan = sd_pkt_scan,
@@ -291,7 +285,8 @@
 }
 
 static struct usb_driver sd_driver = {
-	.name = MODULE_NAME,
+//	.name = MODULE_NAME,
+	.name = KBUILD_MODNAME,
 	.id_table = device_table,
 	.probe = sd_probe,
 	.disconnect = gspca_disconnect,
@@ -301,15 +296,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/conex.c linux-3.0.82x/drivers/media/video/gspca/conex.c
--- linux-3.0.82/drivers/media/video/gspca/conex.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/conex.c	2017-09-23 03:42:49.446676811 +0800
@@ -19,6 +19,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "conex"
 
 #include "gspca.h"
@@ -122,14 +124,14 @@
 
 /* the read bytes are found in gspca_dev->usb_buf */
 static void reg_r(struct gspca_dev *gspca_dev,
-		  __u16 index,
-		  __u16 len)
+		  u16 index,
+		  u16 len)
 {
 	struct usb_device *dev = gspca_dev->dev;
 
 #ifdef GSPCA_DEBUG
 	if (len > USB_BUF_SZ) {
-		err("reg_r: buffer overflow");
+		pr_err("reg_r: buffer overflow\n");
 		return;
 	}
 #endif
@@ -146,8 +148,8 @@
 
 /* the bytes to write are in gspca_dev->usb_buf */
 static void reg_w_val(struct gspca_dev *gspca_dev,
-			__u16 index,
-			__u8 val)
+			u16 index,
+			u8 val)
 {
 	struct usb_device *dev = gspca_dev->dev;
 
@@ -161,15 +163,15 @@
 }
 
 static void reg_w(struct gspca_dev *gspca_dev,
-		  __u16 index,
-		  const __u8 *buffer,
-		  __u16 len)
+		  u16 index,
+		  const u8 *buffer,
+		  u16 len)
 {
 	struct usb_device *dev = gspca_dev->dev;
 
 #ifdef GSPCA_DEBUG
 	if (len > USB_BUF_SZ) {
-		err("reg_w: buffer overflow");
+		pr_err("reg_w: buffer overflow\n");
 		return;
 	}
 	PDEBUG(D_USBO, "reg write [%02x] = %02x..", index, *buffer);
@@ -183,7 +185,7 @@
 			index, gspca_dev->usb_buf, len, 500);
 }
 
-static const __u8 cx_sensor_init[][4] = {
+static const u8 cx_sensor_init[][4] = {
 	{0x88, 0x11, 0x01, 0x01},
 	{0x88, 0x12, 0x70, 0x01},
 	{0x88, 0x0f, 0x00, 0x01},
@@ -191,74 +193,74 @@
 	{}
 };
 
-static const __u8 cx11646_fw1[][3] = {
+static const u8 cx11646_fw1[][3] = {
 	{0x00, 0x02, 0x00},
 	{0x01, 0x43, 0x00},
-	{0x02, 0xA7, 0x00},
-	{0x03, 0x8B, 0x01},
-	{0x04, 0xE9, 0x02},
+	{0x02, 0xa7, 0x00},
+	{0x03, 0x8b, 0x01},
+	{0x04, 0xe9, 0x02},
 	{0x05, 0x08, 0x04},
 	{0x06, 0x08, 0x05},
 	{0x07, 0x07, 0x06},
-	{0x08, 0xE7, 0x06},
-	{0x09, 0xC6, 0x07},
-	{0x0A, 0x86, 0x08},
-	{0x0B, 0x46, 0x09},
-	{0x0C, 0x05, 0x0A},
-	{0x0D, 0xA5, 0x0A},
-	{0x0E, 0x45, 0x0B},
-	{0x0F, 0xE5, 0x0B},
-	{0x10, 0x85, 0x0C},
-	{0x11, 0x25, 0x0D},
-	{0x12, 0xC4, 0x0D},
-	{0x13, 0x45, 0x0E},
-	{0x14, 0xE4, 0x0E},
-	{0x15, 0x64, 0x0F},
-	{0x16, 0xE4, 0x0F},
+	{0x08, 0xe7, 0x06},
+	{0x09, 0xc6, 0x07},
+	{0x0a, 0x86, 0x08},
+	{0x0b, 0x46, 0x09},
+	{0x0c, 0x05, 0x0a},
+	{0x0d, 0xa5, 0x0a},
+	{0x0e, 0x45, 0x0b},
+	{0x0f, 0xe5, 0x0b},
+	{0x10, 0x85, 0x0c},
+	{0x11, 0x25, 0x0d},
+	{0x12, 0xc4, 0x0d},
+	{0x13, 0x45, 0x0e},
+	{0x14, 0xe4, 0x0e},
+	{0x15, 0x64, 0x0f},
+	{0x16, 0xe4, 0x0f},
 	{0x17, 0x64, 0x10},
-	{0x18, 0xE4, 0x10},
+	{0x18, 0xe4, 0x10},
 	{0x19, 0x64, 0x11},
-	{0x1A, 0xE4, 0x11},
-	{0x1B, 0x64, 0x12},
-	{0x1C, 0xE3, 0x12},
-	{0x1D, 0x44, 0x13},
-	{0x1E, 0xC3, 0x13},
-	{0x1F, 0x24, 0x14},
-	{0x20, 0xA3, 0x14},
+	{0x1a, 0xe4, 0x11},
+	{0x1b, 0x64, 0x12},
+	{0x1c, 0xe3, 0x12},
+	{0x1d, 0x44, 0x13},
+	{0x1e, 0xc3, 0x13},
+	{0x1f, 0x24, 0x14},
+	{0x20, 0xa3, 0x14},
 	{0x21, 0x04, 0x15},
 	{0x22, 0x83, 0x15},
-	{0x23, 0xE3, 0x15},
+	{0x23, 0xe3, 0x15},
 	{0x24, 0x43, 0x16},
-	{0x25, 0xA4, 0x16},
+	{0x25, 0xa4, 0x16},
 	{0x26, 0x23, 0x17},
 	{0x27, 0x83, 0x17},
-	{0x28, 0xE3, 0x17},
+	{0x28, 0xe3, 0x17},
 	{0x29, 0x43, 0x18},
-	{0x2A, 0xA3, 0x18},
-	{0x2B, 0x03, 0x19},
-	{0x2C, 0x63, 0x19},
-	{0x2D, 0xC3, 0x19},
-	{0x2E, 0x22, 0x1A},
-	{0x2F, 0x63, 0x1A},
-	{0x30, 0xC3, 0x1A},
-	{0x31, 0x23, 0x1B},
-	{0x32, 0x83, 0x1B},
-	{0x33, 0xE2, 0x1B},
-	{0x34, 0x23, 0x1C},
-	{0x35, 0x83, 0x1C},
-	{0x36, 0xE2, 0x1C},
-	{0x37, 0x23, 0x1D},
-	{0x38, 0x83, 0x1D},
-	{0x39, 0xE2, 0x1D},
-	{0x3A, 0x23, 0x1E},
-	{0x3B, 0x82, 0x1E},
-	{0x3C, 0xC3, 0x1E},
-	{0x3D, 0x22, 0x1F},
-	{0x3E, 0x63, 0x1F},
-	{0x3F, 0xC1, 0x1F},
+	{0x2a, 0xa3, 0x18},
+	{0x2b, 0x03, 0x19},
+	{0x2c, 0x63, 0x19},
+	{0x2d, 0xc3, 0x19},
+	{0x2e, 0x22, 0x1a},
+	{0x2f, 0x63, 0x1a},
+	{0x30, 0xc3, 0x1a},
+	{0x31, 0x23, 0x1b},
+	{0x32, 0x83, 0x1b},
+	{0x33, 0xe2, 0x1b},
+	{0x34, 0x23, 0x1c},
+	{0x35, 0x83, 0x1c},
+	{0x36, 0xe2, 0x1c},
+	{0x37, 0x23, 0x1d},
+	{0x38, 0x83, 0x1d},
+	{0x39, 0xe2, 0x1d},
+	{0x3a, 0x23, 0x1e},
+	{0x3b, 0x82, 0x1e},
+	{0x3c, 0xc3, 0x1e},
+	{0x3d, 0x22, 0x1f},
+	{0x3e, 0x63, 0x1f},
+	{0x3f, 0xc1, 0x1f},
 	{}
 };
-static void cx11646_fw(struct gspca_dev*gspca_dev)
+static void cx11646_fw(struct gspca_dev *gspca_dev)
 {
 	int i = 0;
 
@@ -270,37 +272,37 @@
 	reg_w_val(gspca_dev, 0x006a, 0x00);
 }
 
-static const __u8 cxsensor[] = {
+static const u8 cxsensor[] = {
 	0x88, 0x12, 0x70, 0x01,
 	0x88, 0x0d, 0x02, 0x01,
 	0x88, 0x0f, 0x00, 0x01,
 	0x88, 0x03, 0x71, 0x01, 0x88, 0x04, 0x00, 0x01,	/* 3 */
 	0x88, 0x02, 0x10, 0x01,
-	0x88, 0x00, 0xD4, 0x01, 0x88, 0x01, 0x01, 0x01,	/* 5 */
-	0x88, 0x0B, 0x00, 0x01,
-	0x88, 0x0A, 0x0A, 0x01,
+	0x88, 0x00, 0xd4, 0x01, 0x88, 0x01, 0x01, 0x01,	/* 5 */
+	0x88, 0x0b, 0x00, 0x01,
+	0x88, 0x0a, 0x0a, 0x01,
 	0x88, 0x00, 0x08, 0x01, 0x88, 0x01, 0x00, 0x01,	/* 8 */
 	0x88, 0x05, 0x01, 0x01,
-	0xA1, 0x18, 0x00, 0x01,
+	0xa1, 0x18, 0x00, 0x01,
 	0x00
 };
 
-static const __u8 reg20[] = { 0x10, 0x42, 0x81, 0x19, 0xd3, 0xff, 0xa7, 0xff };
-static const __u8 reg28[] = { 0x87, 0x00, 0x87, 0x00, 0x8f, 0xff, 0xea, 0xff };
-static const __u8 reg10[] = { 0xb1, 0xb1 };
-static const __u8 reg71a[] = { 0x08, 0x18, 0x0a, 0x1e };	/* 640 */
-static const __u8 reg71b[] = { 0x04, 0x0c, 0x05, 0x0f };
+static const u8 reg20[] = { 0x10, 0x42, 0x81, 0x19, 0xd3, 0xff, 0xa7, 0xff };
+static const u8 reg28[] = { 0x87, 0x00, 0x87, 0x00, 0x8f, 0xff, 0xea, 0xff };
+static const u8 reg10[] = { 0xb1, 0xb1 };
+static const u8 reg71a[] = { 0x08, 0x18, 0x0a, 0x1e };		/* 640 */
+static const u8 reg71b[] = { 0x04, 0x0c, 0x05, 0x0f };
 	/* 352{0x04,0x0a,0x06,0x12}; //352{0x05,0x0e,0x06,0x11}; //352 */
-static const __u8 reg71c[] = { 0x02, 0x07, 0x03, 0x09 };
+static const u8 reg71c[] = { 0x02, 0x07, 0x03, 0x09 };
 					/* 320{0x04,0x0c,0x05,0x0f}; //320 */
-static const __u8 reg71d[] = { 0x02, 0x07, 0x03, 0x09 };	/* 176 */
-static const __u8 reg7b[] = { 0x00, 0xff, 0x00, 0xff, 0x00, 0xff };
+static const u8 reg71d[] = { 0x02, 0x07, 0x03, 0x09 };		/* 176 */
+static const u8 reg7b[] = { 0x00, 0xff, 0x00, 0xff, 0x00, 0xff };
 
-static void cx_sensor(struct gspca_dev*gspca_dev)
+static void cx_sensor(struct gspca_dev *gspca_dev)
 {
 	int i = 0;
 	int length;
-	const __u8 *ptsensor = cxsensor;
+	const u8 *ptsensor = cxsensor;
 
 	reg_w(gspca_dev, 0x0020, reg20, 8);
 	reg_w(gspca_dev, 0x0028, reg28, 8);
@@ -341,16 +343,16 @@
 	reg_r(gspca_dev, 0x00e7, 8);
 }
 
-static const __u8 cx_inits_176[] = {
-	0x33, 0x81, 0xB0, 0x00, 0x90, 0x00, 0x0A, 0x03,	/* 176x144 */
-	0x00, 0x03, 0x03, 0x03, 0x1B, 0x05, 0x30, 0x03,
+static const u8 cx_inits_176[] = {
+	0x33, 0x81, 0xb0, 0x00, 0x90, 0x00, 0x0a, 0x03,	/* 176x144 */
+	0x00, 0x03, 0x03, 0x03, 0x1b, 0x05, 0x30, 0x03,
 	0x65, 0x15, 0x18, 0x25, 0x03, 0x25, 0x08, 0x30,
-	0x3B, 0x25, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00,
-	0xDC, 0xFF, 0xEE, 0xFF, 0xC5, 0xFF, 0xBF, 0xFF,
-	0xF7, 0xFF, 0x88, 0xFF, 0x66, 0x02, 0x28, 0x02,
-	0x1E, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+	0x3b, 0x25, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00,
+	0xdc, 0xff, 0xee, 0xff, 0xc5, 0xff, 0xbf, 0xff,
+	0xf7, 0xff, 0x88, 0xff, 0x66, 0x02, 0x28, 0x02,
+	0x1e, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
 };
-static const __u8 cx_inits_320[] = {
+static const u8 cx_inits_320[] = {
 	0x7f, 0x7f, 0x40, 0x01, 0xf0, 0x00, 0x02, 0x01,
 	0x00, 0x01, 0x01, 0x01, 0x10, 0x00, 0x02, 0x01,
 	0x65, 0x45, 0xfa, 0x4c, 0x2c, 0xdf, 0xb9, 0x81,
@@ -359,7 +361,7 @@
 	0xf5, 0xff, 0x6d, 0xff, 0xf6, 0x01, 0x43, 0x02,
 	0xd3, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
 };
-static const __u8 cx_inits_352[] = {
+static const u8 cx_inits_352[] = {
 	0x2e, 0x7c, 0x60, 0x01, 0x20, 0x01, 0x05, 0x03,
 	0x00, 0x06, 0x03, 0x06, 0x1b, 0x10, 0x05, 0x3b,
 	0x30, 0x25, 0x18, 0x25, 0x08, 0x30, 0x03, 0x25,
@@ -368,7 +370,7 @@
 	0xf5, 0xff, 0x6b, 0xff, 0xee, 0x01, 0x43, 0x02,
 	0xe4, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
 };
-static const __u8 cx_inits_640[] = {
+static const u8 cx_inits_640[] = {
 	0x7e, 0x7e, 0x80, 0x02, 0xe0, 0x01, 0x01, 0x01,
 	0x00, 0x02, 0x01, 0x02, 0x10, 0x30, 0x01, 0x01,
 	0x65, 0x45, 0xf7, 0x52, 0x2c, 0xdf, 0xb9, 0x81,
@@ -380,9 +382,9 @@
 
 static void cx11646_initsize(struct gspca_dev *gspca_dev)
 {
-	const __u8 *cxinit;
-	static const __u8 reg12[] = { 0x08, 0x05, 0x07, 0x04, 0x24 };
-	static const __u8 reg17[] =
+	const u8 *cxinit;
+	static const u8 reg12[] = { 0x08, 0x05, 0x07, 0x04, 0x24 };
+	static const u8 reg17[] =
 			{ 0x0a, 0x00, 0xf2, 0x01, 0x0f, 0x00, 0x97, 0x02 };
 
 	switch (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv) {
@@ -425,207 +427,207 @@
 	reg_r(gspca_dev, 0x0010, 1);
 }
 
-static const __u8 cx_jpeg_init[][8] = {
+static const u8 cx_jpeg_init[][8] = {
 	{0xff, 0xd8, 0xff, 0xdb, 0x00, 0x84, 0x00, 0x15},	/* 1 */
 	{0x0f, 0x10, 0x12, 0x10, 0x0d, 0x15, 0x12, 0x11},
 	{0x12, 0x18, 0x16, 0x15, 0x19, 0x20, 0x35, 0x22},
 	{0x20, 0x1d, 0x1d, 0x20, 0x41, 0x2e, 0x31, 0x26},
 	{0x35, 0x4d, 0x43, 0x51, 0x4f, 0x4b, 0x43, 0x4a},
-	{0x49, 0x55, 0x5F, 0x79, 0x67, 0x55, 0x5A, 0x73},
-	{0x5B, 0x49, 0x4A, 0x6A, 0x90, 0x6B, 0x73, 0x7D},
-	{0x81, 0x88, 0x89, 0x88, 0x52, 0x66, 0x95, 0xA0},
-	{0x94, 0x84, 0x9E, 0x79, 0x85, 0x88, 0x83, 0x01},
-	{0x15, 0x0F, 0x10, 0x12, 0x10, 0x0D, 0x15, 0x12},
+	{0x49, 0x55, 0x5f, 0x79, 0x67, 0x55, 0x5a, 0x73},
+	{0x5b, 0x49, 0x4a, 0x6a, 0x90, 0x6b, 0x73, 0x7d},
+	{0x81, 0x88, 0x89, 0x88, 0x52, 0x66, 0x95, 0xa0},
+	{0x94, 0x84, 0x9e, 0x79, 0x85, 0x88, 0x83, 0x01},
+	{0x15, 0x0f, 0x10, 0x12, 0x10, 0x0d, 0x15, 0x12},
 	{0x11, 0x12, 0x18, 0x16, 0x15, 0x19, 0x20, 0x35},
-	{0x22, 0x20, 0x1D, 0x1D, 0x20, 0x41, 0x2E, 0x31},
-	{0x26, 0x35, 0x4D, 0x43, 0x51, 0x4F, 0x4B, 0x43},
-	{0x4A, 0x49, 0x55, 0x5F, 0x79, 0x67, 0x55, 0x5A},
-	{0x73, 0x5B, 0x49, 0x4A, 0x6A, 0x90, 0x6B, 0x73},
-	{0x7D, 0x81, 0x88, 0x89, 0x88, 0x52, 0x66, 0x95},
-	{0xA0, 0x94, 0x84, 0x9E, 0x79, 0x85, 0x88, 0x83},
-	{0xFF, 0xC4, 0x01, 0xA2, 0x00, 0x00, 0x01, 0x05},
+	{0x22, 0x20, 0x1d, 0x1d, 0x20, 0x41, 0x2e, 0x31},
+	{0x26, 0x35, 0x4d, 0x43, 0x51, 0x4f, 0x4b, 0x43},
+	{0x4a, 0x49, 0x55, 0x5f, 0x79, 0x67, 0x55, 0x5a},
+	{0x73, 0x5b, 0x49, 0x4a, 0x6a, 0x90, 0x6b, 0x73},
+	{0x7d, 0x81, 0x88, 0x89, 0x88, 0x52, 0x66, 0x95},
+	{0xa0, 0x94, 0x84, 0x9e, 0x79, 0x85, 0x88, 0x83},
+	{0xff, 0xc4, 0x01, 0xa2, 0x00, 0x00, 0x01, 0x05},
 	{0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00},
 	{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x02},
-	{0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A},
-	{0x0B, 0x01, 0x00, 0x03, 0x01, 0x01, 0x01, 0x01},
+	{0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a},
+	{0x0b, 0x01, 0x00, 0x03, 0x01, 0x01, 0x01, 0x01},
 	{0x01, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00},
 	{0x00, 0x00, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05},
-	{0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x10, 0x00},
+	{0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x10, 0x00},
 	{0x02, 0x01, 0x03, 0x03, 0x02, 0x04, 0x03, 0x05},
-	{0x05, 0x04, 0x04, 0x00, 0x00, 0x01, 0x7D, 0x01},
+	{0x05, 0x04, 0x04, 0x00, 0x00, 0x01, 0x7d, 0x01},
 	{0x02, 0x03, 0x00, 0x04, 0x11, 0x05, 0x12, 0x21},
 	{0x31, 0x41, 0x06, 0x13, 0x51, 0x61, 0x07, 0x22},
-	{0x71, 0x14, 0x32, 0x81, 0x91, 0xA1, 0x08, 0x23},
-	{0x42, 0xB1, 0xC1, 0x15, 0x52, 0xD1, 0xF0, 0x24},
-	{0x33, 0x62, 0x72, 0x82, 0x09, 0x0A, 0x16, 0x17},
-	{0x18, 0x19, 0x1A, 0x25, 0x26, 0x27, 0x28, 0x29},
-	{0x2A, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A},
-	{0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A},
-	{0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A},
-	{0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A},
-	{0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A},
-	{0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A},
+	{0x71, 0x14, 0x32, 0x81, 0x91, 0xa1, 0x08, 0x23},
+	{0x42, 0xb1, 0xc1, 0x15, 0x52, 0xd1, 0xf0, 0x24},
+	{0x33, 0x62, 0x72, 0x82, 0x09, 0x0a, 0x16, 0x17},
+	{0x18, 0x19, 0x1a, 0x25, 0x26, 0x27, 0x28, 0x29},
+	{0x2a, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3a},
+	{0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4a},
+	{0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5a},
+	{0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6a},
+	{0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7a},
+	{0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8a},
 	{0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99},
-	{0x9A, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8},
-	{0xA9, 0xAA, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7},
-	{0xB8, 0xB9, 0xBA, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6},
-	{0xC7, 0xC8, 0xC9, 0xCA, 0xD2, 0xD3, 0xD4, 0xD5},
-	{0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xE1, 0xE2, 0xE3},
-	{0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xF1},
-	{0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9},
-	{0xFA, 0x11, 0x00, 0x02, 0x01, 0x02, 0x04, 0x04},
+	{0x9a, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8},
+	{0xa9, 0xaa, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7},
+	{0xb8, 0xb9, 0xba, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6},
+	{0xc7, 0xc8, 0xc9, 0xca, 0xd2, 0xd3, 0xd4, 0xd5},
+	{0xd6, 0xd7, 0xd8, 0xd9, 0xda, 0xe1, 0xe2, 0xe3},
+	{0xe4, 0xe5, 0xe6, 0xe7, 0xe8, 0xe9, 0xea, 0xf1},
+	{0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 0xf8, 0xf9},
+	{0xfa, 0x11, 0x00, 0x02, 0x01, 0x02, 0x04, 0x04},
 	{0x03, 0x04, 0x07, 0x05, 0x04, 0x04, 0x00, 0x01},
 	{0x02, 0x77, 0x00, 0x01, 0x02, 0x03, 0x11, 0x04},
 	{0x05, 0x21, 0x31, 0x06, 0x12, 0x41, 0x51, 0x07},
 	{0x61, 0x71, 0x13, 0x22, 0x32, 0x81, 0x08, 0x14},
-	{0x42, 0x91, 0xA1, 0xB1, 0xC1, 0x09, 0x23, 0x33},
-	{0x52, 0xF0, 0x15, 0x62, 0x72, 0xD1, 0x0A, 0x16},
-	{0x24, 0x34, 0xE1, 0x25, 0xF1, 0x17, 0x18, 0x19},
-	{0x1A, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x35, 0x36},
-	{0x37, 0x38, 0x39, 0x3A, 0x43, 0x44, 0x45, 0x46},
-	{0x47, 0x48, 0x49, 0x4A, 0x53, 0x54, 0x55, 0x56},
-	{0x57, 0x58, 0x59, 0x5A, 0x63, 0x64, 0x65, 0x66},
-	{0x67, 0x68, 0x69, 0x6A, 0x73, 0x74, 0x75, 0x76},
-	{0x77, 0x78, 0x79, 0x7A, 0x82, 0x83, 0x84, 0x85},
-	{0x86, 0x87, 0x88, 0x89, 0x8A, 0x92, 0x93, 0x94},
-	{0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0xA2, 0xA3},
-	{0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xB2},
-	{0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA},
-	{0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9},
-	{0xCA, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8},
-	{0xD9, 0xDA, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7},
-	{0xE8, 0xE9, 0xEA, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6},
-	{0xF7, 0xF8, 0xF9, 0xFA, 0xFF, 0x20, 0x00, 0x1F},
-	{0x02, 0x0C, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00},
+	{0x42, 0x91, 0xa1, 0xb1, 0xc1, 0x09, 0x23, 0x33},
+	{0x52, 0xf0, 0x15, 0x62, 0x72, 0xd1, 0x0a, 0x16},
+	{0x24, 0x34, 0xe1, 0x25, 0xf1, 0x17, 0x18, 0x19},
+	{0x1a, 0x26, 0x27, 0x28, 0x29, 0x2a, 0x35, 0x36},
+	{0x37, 0x38, 0x39, 0x3a, 0x43, 0x44, 0x45, 0x46},
+	{0x47, 0x48, 0x49, 0x4a, 0x53, 0x54, 0x55, 0x56},
+	{0x57, 0x58, 0x59, 0x5a, 0x63, 0x64, 0x65, 0x66},
+	{0x67, 0x68, 0x69, 0x6a, 0x73, 0x74, 0x75, 0x76},
+	{0x77, 0x78, 0x79, 0x7a, 0x82, 0x83, 0x84, 0x85},
+	{0x86, 0x87, 0x88, 0x89, 0x8a, 0x92, 0x93, 0x94},
+	{0x95, 0x96, 0x97, 0x98, 0x99, 0x9a, 0xa2, 0xa3},
+	{0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xb2},
+	{0xb3, 0xb4, 0xb5, 0xb6, 0xb7, 0xb8, 0xb9, 0xba},
+	{0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xc9},
+	{0xca, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7, 0xd8},
+	{0xd9, 0xda, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7},
+	{0xe8, 0xe9, 0xea, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6},
+	{0xf7, 0xf8, 0xf9, 0xfa, 0xff, 0x20, 0x00, 0x1f},
+	{0x02, 0x0c, 0x00, 0x00, 0x0a, 0x00, 0x00, 0x00},
 	{0x00, 0x00, 0x11, 0x00, 0x11, 0x22, 0x00, 0x22},
 	{0x22, 0x11, 0x22, 0x22, 0x11, 0x33, 0x33, 0x11},
-	{0x44, 0x66, 0x22, 0x55, 0x66, 0xFF, 0xDD, 0x00},
-	{0x04, 0x00, 0x14, 0xFF, 0xC0, 0x00, 0x11, 0x08},
-	{0x00, 0xF0, 0x01, 0x40, 0x03, 0x00, 0x21, 0x00},
-	{0x01, 0x11, 0x01, 0x02, 0x11, 0x01, 0xFF, 0xDA},
-	{0x00, 0x0C, 0x03, 0x00, 0x00, 0x01, 0x11, 0x02},
-	{0x11, 0x00, 0x3F, 0x00, 0xFF, 0xD9, 0x00, 0x00}	/* 79 */
+	{0x44, 0x66, 0x22, 0x55, 0x66, 0xff, 0xdd, 0x00},
+	{0x04, 0x00, 0x14, 0xff, 0xc0, 0x00, 0x11, 0x08},
+	{0x00, 0xf0, 0x01, 0x40, 0x03, 0x00, 0x21, 0x00},
+	{0x01, 0x11, 0x01, 0x02, 0x11, 0x01, 0xff, 0xda},
+	{0x00, 0x0c, 0x03, 0x00, 0x00, 0x01, 0x11, 0x02},
+	{0x11, 0x00, 0x3f, 0x00, 0xff, 0xd9, 0x00, 0x00}	/* 79 */
 };
 
 
-static const __u8 cxjpeg_640[][8] = {
+static const u8 cxjpeg_640[][8] = {
 	{0xff, 0xd8, 0xff, 0xdb, 0x00, 0x84, 0x00, 0x10},	/* 1 */
 	{0x0b, 0x0c, 0x0e, 0x0c, 0x0a, 0x10, 0x0e, 0x0d},
 	{0x0e, 0x12, 0x11, 0x10, 0x13, 0x18, 0x28, 0x1a},
 	{0x18, 0x16, 0x16, 0x18, 0x31, 0x23, 0x25, 0x1d},
-	{0x28, 0x3a, 0x33, 0x3D, 0x3C, 0x39, 0x33, 0x38},
-	{0x37, 0x40, 0x48, 0x5C, 0x4E, 0x40, 0x44, 0x57},
-	{0x45, 0x37, 0x38, 0x50, 0x6D, 0x51, 0x57, 0x5F},
-	{0x62, 0x67, 0x68, 0x67, 0x3E, 0x4D, 0x71, 0x79},
-	{0x70, 0x64, 0x78, 0x5C, 0x65, 0x67, 0x63, 0x01},
-	{0x10, 0x0B, 0x0C, 0x0E, 0x0C, 0x0A, 0x10, 0x0E},
-	{0x0D, 0x0E, 0x12, 0x11, 0x10, 0x13, 0x18, 0x28},
-	{0x1A, 0x18, 0x16, 0x16, 0x18, 0x31, 0x23, 0x25},
-	{0x1D, 0x28, 0x3A, 0x33, 0x3D, 0x3C, 0x39, 0x33},
-	{0x38, 0x37, 0x40, 0x48, 0x5C, 0x4E, 0x40, 0x44},
-	{0x57, 0x45, 0x37, 0x38, 0x50, 0x6D, 0x51, 0x57},
-	{0x5F, 0x62, 0x67, 0x68, 0x67, 0x3E, 0x4D, 0x71},
-	{0x79, 0x70, 0x64, 0x78, 0x5C, 0x65, 0x67, 0x63},
-	{0xFF, 0x20, 0x00, 0x1F, 0x00, 0x83, 0x00, 0x00},
-	{0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x00},
+	{0x28, 0x3a, 0x33, 0x3d, 0x3c, 0x39, 0x33, 0x38},
+	{0x37, 0x40, 0x48, 0x5c, 0x4e, 0x40, 0x44, 0x57},
+	{0x45, 0x37, 0x38, 0x50, 0x6d, 0x51, 0x57, 0x5f},
+	{0x62, 0x67, 0x68, 0x67, 0x3e, 0x4d, 0x71, 0x79},
+	{0x70, 0x64, 0x78, 0x5c, 0x65, 0x67, 0x63, 0x01},
+	{0x10, 0x0b, 0x0c, 0x0e, 0x0c, 0x0a, 0x10, 0x0e},
+	{0x0d, 0x0e, 0x12, 0x11, 0x10, 0x13, 0x18, 0x28},
+	{0x1a, 0x18, 0x16, 0x16, 0x18, 0x31, 0x23, 0x25},
+	{0x1d, 0x28, 0x3a, 0x33, 0x3d, 0x3c, 0x39, 0x33},
+	{0x38, 0x37, 0x40, 0x48, 0x5c, 0x4e, 0x40, 0x44},
+	{0x57, 0x45, 0x37, 0x38, 0x50, 0x6d, 0x51, 0x57},
+	{0x5f, 0x62, 0x67, 0x68, 0x67, 0x3e, 0x4d, 0x71},
+	{0x79, 0x70, 0x64, 0x78, 0x5c, 0x65, 0x67, 0x63},
+	{0xff, 0x20, 0x00, 0x1f, 0x00, 0x83, 0x00, 0x00},
+	{0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x00},
 	{0x11, 0x22, 0x00, 0x22, 0x22, 0x11, 0x22, 0x22},
 	{0x11, 0x33, 0x33, 0x11, 0x44, 0x66, 0x22, 0x55},
-	{0x66, 0xFF, 0xDD, 0x00, 0x04, 0x00, 0x28, 0xFF},
-	{0xC0, 0x00, 0x11, 0x08, 0x01, 0xE0, 0x02, 0x80},
+	{0x66, 0xff, 0xdd, 0x00, 0x04, 0x00, 0x28, 0xff},
+	{0xc0, 0x00, 0x11, 0x08, 0x01, 0xe0, 0x02, 0x80},
 	{0x03, 0x00, 0x21, 0x00, 0x01, 0x11, 0x01, 0x02},
-	{0x11, 0x01, 0xFF, 0xDA, 0x00, 0x0C, 0x03, 0x00},
-	{0x00, 0x01, 0x11, 0x02, 0x11, 0x00, 0x3F, 0x00},
-	{0xFF, 0xD9, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}	/* 27 */
+	{0x11, 0x01, 0xff, 0xda, 0x00, 0x0c, 0x03, 0x00},
+	{0x00, 0x01, 0x11, 0x02, 0x11, 0x00, 0x3f, 0x00},
+	{0xff, 0xd9, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}	/* 27 */
 };
-static const __u8 cxjpeg_352[][8] = {
+static const u8 cxjpeg_352[][8] = {
 	{0xff, 0xd8, 0xff, 0xdb, 0x00, 0x84, 0x00, 0x0d},
-	{0x09, 0x09, 0x0b, 0x09, 0x08, 0x0D, 0x0b, 0x0a},
+	{0x09, 0x09, 0x0b, 0x09, 0x08, 0x0d, 0x0b, 0x0a},
 	{0x0b, 0x0e, 0x0d, 0x0d, 0x0f, 0x13, 0x1f, 0x14},
 	{0x13, 0x11, 0x11, 0x13, 0x26, 0x1b, 0x1d, 0x17},
-	{0x1F, 0x2D, 0x28, 0x30, 0x2F, 0x2D, 0x28, 0x2C},
-	{0x2B, 0x32, 0x38, 0x48, 0x3D, 0x32, 0x35, 0x44},
-	{0x36, 0x2B, 0x2C, 0x3F, 0x55, 0x3F, 0x44, 0x4A},
-	{0x4D, 0x50, 0x51, 0x50, 0x30, 0x3C, 0x58, 0x5F},
-	{0x58, 0x4E, 0x5E, 0x48, 0x4F, 0x50, 0x4D, 0x01},
-	{0x0D, 0x09, 0x09, 0x0B, 0x09, 0x08, 0x0D, 0x0B},
-	{0x0A, 0x0B, 0x0E, 0x0D, 0x0D, 0x0F, 0x13, 0x1F},
-	{0x14, 0x13, 0x11, 0x11, 0x13, 0x26, 0x1B, 0x1D},
-	{0x17, 0x1F, 0x2D, 0x28, 0x30, 0x2F, 0x2D, 0x28},
-	{0x2C, 0x2B, 0x32, 0x38, 0x48, 0x3D, 0x32, 0x35},
-	{0x44, 0x36, 0x2B, 0x2C, 0x3F, 0x55, 0x3F, 0x44},
-	{0x4A, 0x4D, 0x50, 0x51, 0x50, 0x30, 0x3C, 0x58},
-	{0x5F, 0x58, 0x4E, 0x5E, 0x48, 0x4F, 0x50, 0x4D},
-	{0xFF, 0x20, 0x00, 0x1F, 0x01, 0x83, 0x00, 0x00},
-	{0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x00},
+	{0x1f, 0x2d, 0x28, 0x30, 0x2f, 0x2d, 0x28, 0x2c},
+	{0x2b, 0x32, 0x38, 0x48, 0x3d, 0x32, 0x35, 0x44},
+	{0x36, 0x2b, 0x2c, 0x3f, 0x55, 0x3f, 0x44, 0x4a},
+	{0x4d, 0x50, 0x51, 0x50, 0x30, 0x3c, 0x58, 0x5f},
+	{0x58, 0x4e, 0x5e, 0x48, 0x4f, 0x50, 0x4d, 0x01},
+	{0x0d, 0x09, 0x09, 0x0b, 0x09, 0x08, 0x0d, 0x0b},
+	{0x0a, 0x0b, 0x0e, 0x0d, 0x0d, 0x0f, 0x13, 0x1f},
+	{0x14, 0x13, 0x11, 0x11, 0x13, 0x26, 0x1b, 0x1d},
+	{0x17, 0x1f, 0x2d, 0x28, 0x30, 0x2f, 0x2d, 0x28},
+	{0x2c, 0x2b, 0x32, 0x38, 0x48, 0x3d, 0x32, 0x35},
+	{0x44, 0x36, 0x2b, 0x2c, 0x3f, 0x55, 0x3f, 0x44},
+	{0x4a, 0x4d, 0x50, 0x51, 0x50, 0x30, 0x3c, 0x58},
+	{0x5f, 0x58, 0x4e, 0x5e, 0x48, 0x4f, 0x50, 0x4d},
+	{0xff, 0x20, 0x00, 0x1f, 0x01, 0x83, 0x00, 0x00},
+	{0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x00},
 	{0x11, 0x22, 0x00, 0x22, 0x22, 0x11, 0x22, 0x22},
 	{0x11, 0x33, 0x33, 0x11, 0x44, 0x66, 0x22, 0x55},
-	{0x66, 0xFF, 0xDD, 0x00, 0x04, 0x00, 0x16, 0xFF},
-	{0xC0, 0x00, 0x11, 0x08, 0x01, 0x20, 0x01, 0x60},
+	{0x66, 0xff, 0xdd, 0x00, 0x04, 0x00, 0x16, 0xff},
+	{0xc0, 0x00, 0x11, 0x08, 0x01, 0x20, 0x01, 0x60},
 	{0x03, 0x00, 0x21, 0x00, 0x01, 0x11, 0x01, 0x02},
-	{0x11, 0x01, 0xFF, 0xDA, 0x00, 0x0C, 0x03, 0x00},
-	{0x00, 0x01, 0x11, 0x02, 0x11, 0x00, 0x3F, 0x00},
-	{0xFF, 0xD9, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+	{0x11, 0x01, 0xff, 0xda, 0x00, 0x0c, 0x03, 0x00},
+	{0x00, 0x01, 0x11, 0x02, 0x11, 0x00, 0x3f, 0x00},
+	{0xff, 0xd9, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 };
-static const __u8 cxjpeg_320[][8] = {
+static const u8 cxjpeg_320[][8] = {
 	{0xff, 0xd8, 0xff, 0xdb, 0x00, 0x84, 0x00, 0x05},
 	{0x03, 0x04, 0x04, 0x04, 0x03, 0x05, 0x04, 0x04},
 	{0x04, 0x05, 0x05, 0x05, 0x06, 0x07, 0x0c, 0x08},
 	{0x07, 0x07, 0x07, 0x07, 0x0f, 0x0b, 0x0b, 0x09},
-	{0x0C, 0x11, 0x0F, 0x12, 0x12, 0x11, 0x0f, 0x11},
-	{0x11, 0x13, 0x16, 0x1C, 0x17, 0x13, 0x14, 0x1A},
-	{0x15, 0x11, 0x11, 0x18, 0x21, 0x18, 0x1A, 0x1D},
-	{0x1D, 0x1F, 0x1F, 0x1F, 0x13, 0x17, 0x22, 0x24},
-	{0x22, 0x1E, 0x24, 0x1C, 0x1E, 0x1F, 0x1E, 0x01},
+	{0x0c, 0x11, 0x0f, 0x12, 0x12, 0x11, 0x0f, 0x11},
+	{0x11, 0x13, 0x16, 0x1c, 0x17, 0x13, 0x14, 0x1a},
+	{0x15, 0x11, 0x11, 0x18, 0x21, 0x18, 0x1a, 0x1d},
+	{0x1d, 0x1f, 0x1f, 0x1f, 0x13, 0x17, 0x22, 0x24},
+	{0x22, 0x1e, 0x24, 0x1c, 0x1e, 0x1f, 0x1e, 0x01},
 	{0x05, 0x03, 0x04, 0x04, 0x04, 0x03, 0x05, 0x04},
-	{0x04, 0x04, 0x05, 0x05, 0x05, 0x06, 0x07, 0x0C},
-	{0x08, 0x07, 0x07, 0x07, 0x07, 0x0F, 0x0B, 0x0B},
-	{0x09, 0x0C, 0x11, 0x0F, 0x12, 0x12, 0x11, 0x0F},
-	{0x11, 0x11, 0x13, 0x16, 0x1C, 0x17, 0x13, 0x14},
-	{0x1A, 0x15, 0x11, 0x11, 0x18, 0x21, 0x18, 0x1A},
-	{0x1D, 0x1D, 0x1F, 0x1F, 0x1F, 0x13, 0x17, 0x22},
-	{0x24, 0x22, 0x1E, 0x24, 0x1C, 0x1E, 0x1F, 0x1E},
-	{0xFF, 0x20, 0x00, 0x1F, 0x02, 0x0C, 0x00, 0x00},
-	{0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x00},
+	{0x04, 0x04, 0x05, 0x05, 0x05, 0x06, 0x07, 0x0c},
+	{0x08, 0x07, 0x07, 0x07, 0x07, 0x0f, 0x0b, 0x0b},
+	{0x09, 0x0c, 0x11, 0x0f, 0x12, 0x12, 0x11, 0x0f},
+	{0x11, 0x11, 0x13, 0x16, 0x1c, 0x17, 0x13, 0x14},
+	{0x1a, 0x15, 0x11, 0x11, 0x18, 0x21, 0x18, 0x1a},
+	{0x1d, 0x1d, 0x1f, 0x1f, 0x1f, 0x13, 0x17, 0x22},
+	{0x24, 0x22, 0x1e, 0x24, 0x1c, 0x1e, 0x1f, 0x1e},
+	{0xff, 0x20, 0x00, 0x1f, 0x02, 0x0c, 0x00, 0x00},
+	{0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x00},
 	{0x11, 0x22, 0x00, 0x22, 0x22, 0x11, 0x22, 0x22},
 	{0x11, 0x33, 0x33, 0x11, 0x44, 0x66, 0x22, 0x55},
-	{0x66, 0xFF, 0xDD, 0x00, 0x04, 0x00, 0x14, 0xFF},
-	{0xC0, 0x00, 0x11, 0x08, 0x00, 0xF0, 0x01, 0x40},
+	{0x66, 0xff, 0xdd, 0x00, 0x04, 0x00, 0x14, 0xff},
+	{0xc0, 0x00, 0x11, 0x08, 0x00, 0xf0, 0x01, 0x40},
 	{0x03, 0x00, 0x21, 0x00, 0x01, 0x11, 0x01, 0x02},
-	{0x11, 0x01, 0xFF, 0xDA, 0x00, 0x0C, 0x03, 0x00},
-	{0x00, 0x01, 0x11, 0x02, 0x11, 0x00, 0x3F, 0x00},
-	{0xFF, 0xD9, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}	/* 27 */
+	{0x11, 0x01, 0xff, 0xda, 0x00, 0x0c, 0x03, 0x00},
+	{0x00, 0x01, 0x11, 0x02, 0x11, 0x00, 0x3f, 0x00},
+	{0xff, 0xd9, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}	/* 27 */
 };
-static const __u8 cxjpeg_176[][8] = {
+static const u8 cxjpeg_176[][8] = {
 	{0xff, 0xd8, 0xff, 0xdb, 0x00, 0x84, 0x00, 0x0d},
-	{0x09, 0x09, 0x0B, 0x09, 0x08, 0x0D, 0x0B, 0x0A},
-	{0x0B, 0x0E, 0x0D, 0x0D, 0x0F, 0x13, 0x1F, 0x14},
-	{0x13, 0x11, 0x11, 0x13, 0x26, 0x1B, 0x1D, 0x17},
-	{0x1F, 0x2D, 0x28, 0x30, 0x2F, 0x2D, 0x28, 0x2C},
-	{0x2B, 0x32, 0x38, 0x48, 0x3D, 0x32, 0x35, 0x44},
-	{0x36, 0x2B, 0x2C, 0x3F, 0x55, 0x3F, 0x44, 0x4A},
-	{0x4D, 0x50, 0x51, 0x50, 0x30, 0x3C, 0x58, 0x5F},
-	{0x58, 0x4E, 0x5E, 0x48, 0x4F, 0x50, 0x4D, 0x01},
-	{0x0D, 0x09, 0x09, 0x0B, 0x09, 0x08, 0x0D, 0x0B},
-	{0x0A, 0x0B, 0x0E, 0x0D, 0x0D, 0x0F, 0x13, 0x1F},
-	{0x14, 0x13, 0x11, 0x11, 0x13, 0x26, 0x1B, 0x1D},
-	{0x17, 0x1F, 0x2D, 0x28, 0x30, 0x2F, 0x2D, 0x28},
-	{0x2C, 0x2B, 0x32, 0x38, 0x48, 0x3D, 0x32, 0x35},
-	{0x44, 0x36, 0x2B, 0x2C, 0x3F, 0x55, 0x3F, 0x44},
-	{0x4A, 0x4D, 0x50, 0x51, 0x50, 0x30, 0x3C, 0x58},
-	{0x5F, 0x58, 0x4E, 0x5E, 0x48, 0x4F, 0x50, 0x4D},
-	{0xFF, 0x20, 0x00, 0x1F, 0x03, 0xA1, 0x00, 0x00},
-	{0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x00},
+	{0x09, 0x09, 0x0b, 0x09, 0x08, 0x0d, 0x0b, 0x0a},
+	{0x0b, 0x0e, 0x0d, 0x0d, 0x0f, 0x13, 0x1f, 0x14},
+	{0x13, 0x11, 0x11, 0x13, 0x26, 0x1b, 0x1d, 0x17},
+	{0x1f, 0x2d, 0x28, 0x30, 0x2f, 0x2d, 0x28, 0x2c},
+	{0x2b, 0x32, 0x38, 0x48, 0x3d, 0x32, 0x35, 0x44},
+	{0x36, 0x2b, 0x2c, 0x3f, 0x55, 0x3f, 0x44, 0x4a},
+	{0x4d, 0x50, 0x51, 0x50, 0x30, 0x3c, 0x58, 0x5f},
+	{0x58, 0x4e, 0x5e, 0x48, 0x4f, 0x50, 0x4d, 0x01},
+	{0x0d, 0x09, 0x09, 0x0b, 0x09, 0x08, 0x0d, 0x0b},
+	{0x0a, 0x0b, 0x0e, 0x0d, 0x0d, 0x0f, 0x13, 0x1f},
+	{0x14, 0x13, 0x11, 0x11, 0x13, 0x26, 0x1b, 0x1d},
+	{0x17, 0x1f, 0x2d, 0x28, 0x30, 0x2f, 0x2d, 0x28},
+	{0x2c, 0x2b, 0x32, 0x38, 0x48, 0x3d, 0x32, 0x35},
+	{0x44, 0x36, 0x2b, 0x2c, 0x3f, 0x55, 0x3f, 0x44},
+	{0x4a, 0x4d, 0x50, 0x51, 0x50, 0x30, 0x3c, 0x58},
+	{0x5f, 0x58, 0x4e, 0x5e, 0x48, 0x4f, 0x50, 0x4d},
+	{0xff, 0x20, 0x00, 0x1f, 0x03, 0xa1, 0x00, 0x00},
+	{0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x00},
 	{0x11, 0x22, 0x00, 0x22, 0x22, 0x11, 0x22, 0x22},
 	{0x11, 0x33, 0x33, 0x11, 0x44, 0x66, 0x22, 0x55},
-	{0x66, 0xFF, 0xDD, 0x00, 0x04, 0x00, 0x0B, 0xFF},
-	{0xC0, 0x00, 0x11, 0x08, 0x00, 0x90, 0x00, 0xB0},
+	{0x66, 0xff, 0xdd, 0x00, 0x04, 0x00, 0x0b, 0xff},
+	{0xc0, 0x00, 0x11, 0x08, 0x00, 0x90, 0x00, 0xb0},
 	{0x03, 0x00, 0x21, 0x00, 0x01, 0x11, 0x01, 0x02},
-	{0x11, 0x01, 0xFF, 0xDA, 0x00, 0x0C, 0x03, 0x00},
-	{0x00, 0x01, 0x11, 0x02, 0x11, 0x00, 0x3F, 0x00},
-	{0xFF, 0xD9, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+	{0x11, 0x01, 0xff, 0xda, 0x00, 0x0c, 0x03, 0x00},
+	{0x00, 0x01, 0x11, 0x02, 0x11, 0x00, 0x3f, 0x00},
+	{0xff, 0xd9, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 };
 /* 640 take with the zcx30x part */
-static const __u8 cxjpeg_qtable[][8] = {
+static const u8 cxjpeg_qtable[][8] = {
 	{0xff, 0xd8, 0xff, 0xdb, 0x00, 0x84, 0x00, 0x08},
 	{0x06, 0x06, 0x07, 0x06, 0x05, 0x08, 0x07, 0x07},
 	{0x07, 0x09, 0x09, 0x08, 0x0a, 0x0c, 0x14, 0x0a},
@@ -643,11 +645,10 @@
 	{0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32},
 	{0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32},
 	{0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32},
-	{0xFF, 0xD9, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}	/* 18 */
+	{0xff, 0xd9, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}	/* 18 */
 };
 
-
-static void cx11646_jpegInit(struct gspca_dev*gspca_dev)
+static void cx11646_jpegInit(struct gspca_dev *gspca_dev)
 {
 	int i;
 	int length;
@@ -666,20 +667,20 @@
 	reg_w_val(gspca_dev, 0x0055, 0x14);
 }
 
-static const __u8 reg12[] = { 0x0a, 0x05, 0x07, 0x04, 0x19 };
-static const __u8 regE5_8[] =
+static const u8 reg12[] = { 0x0a, 0x05, 0x07, 0x04, 0x19 };
+static const u8 regE5_8[] =
 		{ 0x88, 0x00, 0xd4, 0x01, 0x88, 0x01, 0x01, 0x01 };
-static const __u8 regE5a[] = { 0x88, 0x0a, 0x0c, 0x01 };
-static const __u8 regE5b[] = { 0x88, 0x0b, 0x12, 0x01 };
-static const __u8 regE5c[] = { 0x88, 0x05, 0x01, 0x01 };
-static const __u8 reg51[] = { 0x77, 0x03 };
+static const u8 regE5a[] = { 0x88, 0x0a, 0x0c, 0x01 };
+static const u8 regE5b[] = { 0x88, 0x0b, 0x12, 0x01 };
+static const u8 regE5c[] = { 0x88, 0x05, 0x01, 0x01 };
+static const u8 reg51[] = { 0x77, 0x03 };
 #define reg70 0x03
 
-static void cx11646_jpeg(struct gspca_dev*gspca_dev)
+static void cx11646_jpeg(struct gspca_dev *gspca_dev)
 {
 	int i;
 	int length;
-	__u8 Reg55;
+	u8 Reg55;
 	int retry;
 
 	reg_w_val(gspca_dev, 0x00c0, 0x01);
@@ -719,7 +720,7 @@
 				length = 2;
 			reg_w(gspca_dev, 0x0008, cxjpeg_176[i], length);
 		}
-		Reg55 = 0x0B;
+		Reg55 = 0x0b;
 		break;
 	}
 
@@ -904,10 +905,10 @@
 static void setbrightness(struct gspca_dev *gspca_dev)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
-	__u8 regE5cbx[] = { 0x88, 0x00, 0xd4, 0x01, 0x88, 0x01, 0x01, 0x01 };
-	__u8 reg51c[2];
-	__u8 bright;
-	__u8 colors;
+	u8 regE5cbx[] = { 0x88, 0x00, 0xd4, 0x01, 0x88, 0x01, 0x01, 0x01 };
+	u8 reg51c[2];
+	u8 bright;
+	u8 colors;
 
 	bright = sd->brightness;
 	regE5cbx[2] = bright;
@@ -927,9 +928,9 @@
 static void setcontrast(struct gspca_dev *gspca_dev)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
-	__u8 regE5acx[] = { 0x88, 0x0a, 0x0c, 0x01 };	/* seem MSB */
-/*	__u8 regE5bcx[] = { 0x88, 0x0b, 0x12, 0x01};	 * LSB */
-	__u8 reg51c[2];
+	u8 regE5acx[] = { 0x88, 0x0a, 0x0c, 0x01 };	/* seem MSB */
+/*	u8 regE5bcx[] = { 0x88, 0x0b, 0x12, 0x01};	 * LSB */
+	u8 reg51c[2];
 
 	regE5acx[2] = sd->contrast;
 	reg_w(gspca_dev, 0x00e5, regE5acx, 4);
@@ -1065,15 +1066,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/cpia1.c linux-3.0.82x/drivers/media/video/gspca/cpia1.c
--- linux-3.0.82/drivers/media/video/gspca/cpia1.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/cpia1.c	2017-09-23 03:42:49.446676811 +0800
@@ -26,6 +26,8 @@
  *
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "cpia1"
 
 #include <linux/input.h>
@@ -550,8 +552,7 @@
 			      gspca_dev->usb_buf, databytes, 1000);
 
 	if (ret < 0)
-		err("usb_control_msg %02x, error %d", command[1],
-		       ret);
+		pr_err("usb_control_msg %02x, error %d\n", command[1], ret);
 
 	if (ret == -EPIPE && retries > 0) {
 		retries--;
@@ -1279,7 +1280,7 @@
 	cmd[7] = 0;
 	ret = cpia_usb_transferCmd(gspca_dev, cmd);
 	if (ret) {
-		err("ReadVPRegs(30,4,9,8) - failed: %d", ret);
+		pr_err("ReadVPRegs(30,4,9,8) - failed: %d\n", ret);
 		return;
 	}
 	exp_acc = gspca_dev->usb_buf[0];
@@ -2131,15 +2132,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/etoms.c linux-3.0.82x/drivers/media/video/gspca/etoms.c
--- linux-3.0.82/drivers/media/video/gspca/etoms.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/etoms.c	2017-09-23 03:42:49.446676811 +0800
@@ -18,6 +18,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "etoms"
 
 #include "gspca.h"
@@ -236,7 +238,7 @@
 
 #ifdef GSPCA_DEBUG
 	if (len > USB_BUF_SZ) {
-		err("reg_r: buffer overflow");
+		pr_err("reg_r: buffer overflow\n");
 		return;
 	}
 #endif
@@ -274,7 +276,7 @@
 
 #ifdef GSPCA_DEBUG
 	if (len > USB_BUF_SZ) {
-		err("reg_w: buffer overflow");
+		pr_err("reg_w: buffer overflow\n");
 		return;
 	}
 	PDEBUG(D_USBO, "reg write [%02x] = %02x..", index, *buffer);
@@ -893,16 +895,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/finepix.c linux-3.0.82x/drivers/media/video/gspca/finepix.c
--- linux-3.0.82/drivers/media/video/gspca/finepix.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/finepix.c	2017-09-23 03:42:49.450676799 +0800
@@ -18,6 +18,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "finepix"
 
 #include "gspca.h"
@@ -182,7 +184,7 @@
 	/* Init the device */
 	ret = command(gspca_dev, 0);
 	if (ret < 0) {
-		err("init failed %d", ret);
+		pr_err("init failed %d\n", ret);
 		return ret;
 	}
 
@@ -194,14 +196,14 @@
 			FPIX_MAX_TRANSFER, &len,
 			FPIX_TIMEOUT);
 	if (ret < 0) {
-		err("usb_bulk_msg failed %d", ret);
+		pr_err("usb_bulk_msg failed %d\n", ret);
 		return ret;
 	}
 
 	/* Request a frame, but don't read it */
 	ret = command(gspca_dev, 1);
 	if (ret < 0) {
-		err("frame request failed %d", ret);
+		pr_err("frame request failed %d\n", ret);
 		return ret;
 	}
 
@@ -288,16 +290,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/gl860/gl860.c linux-3.0.82x/drivers/media/video/gspca/gl860/gl860.c
--- linux-3.0.82/drivers/media/video/gspca/gl860/gl860.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/gl860/gl860.c	2017-09-23 03:42:49.450676799 +0800
@@ -18,6 +18,9 @@
  * You should have received a copy of the GNU General Public License
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #include "gspca.h"
 #include "gl860.h"
 
@@ -334,7 +337,6 @@
 		return -1;
 
 	cam = &gspca_dev->cam;
-	gspca_dev->nbalt = 4;
 
 	switch (sd->sensor) {
 	case ID_MI1320:
@@ -521,22 +523,7 @@
 
 /*====================== Init and Exit module functions ====================*/
 
-static int __init sd_mod_init(void)
-{
-	PDEBUG(D_PROBE, "driver startup - version %s", DRIVER_VERSION);
-
-	if (usb_register(&sd_driver) < 0)
-		return -1;
-	return 0;
-}
-
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
 
 /*==========================================================================*/
 
@@ -572,9 +559,8 @@
 	}
 
 	if (r < 0)
-		err("ctrl transfer failed %4d "
-			"[p%02x r%d v%04x i%04x len%d]",
-			r, pref, req, val, index, len);
+		pr_err("ctrl transfer failed %4d [p%02x r%d v%04x i%04x len%d]\n",
+		       r, pref, req, val, index, len);
 	else if (len > 1 && r < len)
 		PDEBUG(D_ERR, "short ctrl transfer %d/%d", r, len);
 
diff -uNra linux-3.0.82/drivers/media/video/gspca/gl860/gl860.h linux-3.0.82x/drivers/media/video/gspca/gl860/gl860.h
--- linux-3.0.82/drivers/media/video/gspca/gl860/gl860.h	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/gl860/gl860.h	2017-09-23 03:42:49.450676799 +0800
@@ -18,7 +18,6 @@
  */
 #ifndef GL860_DEV_H
 #define GL860_DEV_H
-#include <linux/version.h>
 
 #include "gspca.h"
 
diff -uNra linux-3.0.82/drivers/media/video/gspca/gspca.c linux-3.0.82x/drivers/media/video/gspca/gspca.c
--- linux-3.0.82/drivers/media/video/gspca/gspca.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/gspca.c	2017-09-23 03:42:49.450676799 +0800
@@ -21,10 +21,11 @@
  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
-#define MODULE_NAME "gspca"
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
+#define GSPCA_VERSION	"2.14.0"
 
 #include <linux/init.h>
-#include <linux/version.h>
 #include <linux/fs.h>
 #include <linux/vmalloc.h>
 #include <linux/sched.h>
@@ -54,8 +55,7 @@
 MODULE_AUTHOR("Jean-FranÃ§ois Moine <http://moinejf.free.fr>");
 MODULE_DESCRIPTION("GSPCA USB Camera Driver");
 MODULE_LICENSE("GPL");
-
-#define DRIVER_VERSION_NUMBER	KERNEL_VERSION(2, 13, 0)
+MODULE_VERSION(GSPCA_VERSION);
 
 #ifdef GSPCA_DEBUG
 int gspca_debug = D_ERR | D_PROBE;
@@ -148,7 +148,7 @@
 	if (ret == 0) {
 		ret = usb_submit_urb(urb, GFP_ATOMIC);
 		if (ret < 0)
-			err("Resubmit URB failed with error %i", ret);
+			pr_err("Resubmit URB failed with error %i\n", ret);
 	}
 }
 
@@ -177,8 +177,8 @@
 
 		err = input_register_device(input_dev);
 		if (err) {
-			err("Input device registration failed with error %i",
-				err);
+			pr_err("Input device registration failed with error %i\n",
+			       err);
 			input_dev->dev.parent = NULL;
 			input_free_device(input_dev);
 		} else {
@@ -323,8 +323,8 @@
 		/* check the packet status and length */
 		st = urb->iso_frame_desc[i].status;
 		if (st) {
-			err("ISOC data error: [%d] len=%d, status=%d",
-				i, len, st);
+			pr_err("ISOC data error: [%d] len=%d, status=%d\n",
+			       i, len, st);
 			gspca_dev->last_packet_type = DISCARD_PACKET;
 			continue;
 		}
@@ -346,7 +346,7 @@
 	/* resubmit the URB */
 	st = usb_submit_urb(urb, GFP_ATOMIC);
 	if (st < 0)
-		err("usb_submit_urb() ret %d", st);
+		pr_err("usb_submit_urb() ret %d\n", st);
 }
 
 /*
@@ -400,7 +400,7 @@
 	if (gspca_dev->cam.bulk_nurbs != 0) {
 		st = usb_submit_urb(urb, GFP_ATOMIC);
 		if (st < 0)
-			err("usb_submit_urb() ret %d", st);
+			pr_err("usb_submit_urb() ret %d\n", st);
 	}
 }
 
@@ -443,8 +443,11 @@
 	} else {
 		switch (gspca_dev->last_packet_type) {
 		case DISCARD_PACKET:
-			if (packet_type == LAST_PACKET)
+			if (packet_type == LAST_PACKET) {
 				gspca_dev->last_packet_type = packet_type;
+				gspca_dev->image = NULL;
+				gspca_dev->image_len = 0;
+			}
 			return;
 		case LAST_PACKET:
 			return;
@@ -461,7 +464,7 @@
 		} else {
 /* !! image is NULL only when last pkt is LAST or DISCARD
 			if (gspca_dev->image == NULL) {
-				err("gspca_frame_add() image == NULL");
+				pr_err("gspca_frame_add() image == NULL\n");
 				return;
 			}
  */
@@ -494,19 +497,6 @@
 }
 EXPORT_SYMBOL(gspca_frame_add);
 
-static int gspca_is_compressed(__u32 format)
-{
-	switch (format) {
-	case V4L2_PIX_FMT_MJPEG:
-	case V4L2_PIX_FMT_JPEG:
-	case V4L2_PIX_FMT_SPCA561:
-	case V4L2_PIX_FMT_PAC207:
-	case V4L2_PIX_FMT_MR97310A:
-		return 1;
-	}
-	return 0;
-}
-
 static int frame_alloc(struct gspca_dev *gspca_dev, struct file *file,
 			enum v4l2_memory memory, unsigned int count)
 {
@@ -522,7 +512,7 @@
 		count = GSPCA_MAX_FRAMES - 1;
 	gspca_dev->frbuf = vmalloc_32(frsz * count);
 	if (!gspca_dev->frbuf) {
-		err("frame alloc failed");
+		pr_err("frame alloc failed\n");
 		return -ENOMEM;
 	}
 	gspca_dev->capt_file = file;
@@ -594,7 +584,7 @@
 		return 0;
 	ret = usb_set_interface(gspca_dev->dev, gspca_dev->iface, 0);
 	if (ret < 0)
-		err("set alt 0 err %d", ret);
+		pr_err("set alt 0 err %d\n", ret);
 	return ret;
 }
 
@@ -637,53 +627,133 @@
 	return NULL;
 }
 
+/* compute the minimum bandwidth for the current transfer */
+static u32 which_bandwidth(struct gspca_dev *gspca_dev)
+{
+	u32 bandwidth;
+	int i;
+
+	/* get the (max) image size */
+	i = gspca_dev->curr_mode;
+	bandwidth = gspca_dev->cam.cam_mode[i].sizeimage;
+
+	/* if the image is compressed, estimate its mean size */
+	if (!gspca_dev->cam.needs_full_bandwidth &&
+	    bandwidth < gspca_dev->cam.cam_mode[i].width *
+				gspca_dev->cam.cam_mode[i].height)
+		bandwidth = bandwidth * 3 / 8;	/* 0.375 */
+
+	/* estimate the frame rate */
+	if (gspca_dev->sd_desc->get_streamparm) {
+		struct v4l2_streamparm parm;
+
+		gspca_dev->sd_desc->get_streamparm(gspca_dev, &parm);
+		bandwidth *= parm.parm.capture.timeperframe.denominator;
+		bandwidth /= parm.parm.capture.timeperframe.numerator;
+	} else {
+
+		/* don't hope more than 15 fps with USB 1.1 and
+		 * image resolution >= 640x480 */
+		if (gspca_dev->width >= 640
+		 && gspca_dev->dev->speed == USB_SPEED_FULL)
+			bandwidth *= 15;		/* 15 fps */
+		else
+			bandwidth *= 30;		/* 30 fps */
+	}
+
+	PDEBUG(D_STREAM, "min bandwidth: %d", bandwidth);
+	return bandwidth;
+}
+
+/* endpoint table */
+#define MAX_ALT 16
+struct ep_tb_s {
+	u32 alt;
+	u32 bandwidth;
+};
+
 /*
- * look for an input (isoc or bulk) endpoint
- *
- * The endpoint is defined by the subdriver.
- * Use only the first isoc (some Zoran - 0x0572:0x0001 - have two such ep).
- * This routine may be called many times when the bandwidth is too small
- * (the bandwidth is checked on urb submit).
+ * build the table of the endpoints
+ * and compute the minimum bandwidth for the image transfer
  */
-static struct usb_host_endpoint *get_ep(struct gspca_dev *gspca_dev)
+static int build_isoc_ep_tb(struct gspca_dev *gspca_dev,
+			struct usb_interface *intf,
+			struct ep_tb_s *ep_tb)
 {
-	struct usb_interface *intf;
 	struct usb_host_endpoint *ep;
-	int xfer, i, ret;
+	int i, j, nbalt, psize, found;
+	u32 bandwidth, last_bw;
 
-	intf = usb_ifnum_to_if(gspca_dev->dev, gspca_dev->iface);
-	ep = NULL;
-	xfer = gspca_dev->cam.bulk ? USB_ENDPOINT_XFER_BULK
-				   : USB_ENDPOINT_XFER_ISOC;
-	i = gspca_dev->alt;			/* previous alt setting */
-	if (gspca_dev->cam.reverse_alts) {
-		while (++i < gspca_dev->nbalt) {
-			ep = alt_xfer(&intf->altsetting[i], xfer);
-			if (ep)
-				break;
-		}
-	} else {
-		while (--i >= 0) {
-			ep = alt_xfer(&intf->altsetting[i], xfer);
-			if (ep)
-				break;
+	nbalt = intf->num_altsetting;
+	if (nbalt > MAX_ALT)
+		nbalt = MAX_ALT;	/* fixme: should warn */
+
+	/* build the endpoint table */
+	i = 0;
+	last_bw = 0;
+	for (;;) {
+		ep_tb->bandwidth = 2000 * 2000 * 120;
+		found = 0;
+		for (j = 0; j < nbalt; j++) {
+			ep = alt_xfer(&intf->altsetting[j],
+				      USB_ENDPOINT_XFER_ISOC);
+			if (ep == NULL)
+				continue;
+			if (ep->desc.bInterval == 0) {
+				pr_err("alt %d iso endp with 0 interval\n", j);
+				continue;
+			}
+			psize = le16_to_cpu(ep->desc.wMaxPacketSize);
+			psize = (psize & 0x07ff) * (1 + ((psize >> 11) & 3));
+			bandwidth = psize * 1000;
+			if (gspca_dev->dev->speed == USB_SPEED_HIGH
+			 || gspca_dev->dev->speed == USB_SPEED_SUPER)
+				bandwidth *= 8;
+			bandwidth /= 1 << (ep->desc.bInterval - 1);
+			if (bandwidth <= last_bw)
+				continue;
+			if (bandwidth < ep_tb->bandwidth) {
+				ep_tb->bandwidth = bandwidth;
+				ep_tb->alt = j;
+				found = 1;
+			}
 		}
+		if (!found)
+			break;
+		PDEBUG(D_STREAM, "alt %d bandwidth %d",
+				ep_tb->alt, ep_tb->bandwidth);
+		last_bw = ep_tb->bandwidth;
+		i++;
+		ep_tb++;
 	}
-	if (ep == NULL) {
-		err("no transfer endpoint found");
-		return NULL;
-	}
-	PDEBUG(D_STREAM, "use alt %d ep 0x%02x",
-			i, ep->desc.bEndpointAddress);
-	gspca_dev->alt = i;		/* memorize the current alt setting */
-	if (gspca_dev->nbalt > 1) {
-		ret = usb_set_interface(gspca_dev->dev, gspca_dev->iface, i);
-		if (ret < 0) {
-			err("set alt %d err %d", i, ret);
-			ep = NULL;
-		}
+
+	/*
+	 * If the camera:
+	 * has a usb audio class interface (a built in usb mic); and
+	 * is a usb 1 full speed device; and
+	 * uses the max full speed iso bandwidth; and
+	 * and has more than 1 alt setting
+	 * then skip the highest alt setting to spare bandwidth for the mic
+	 */
+	if (gspca_dev->audio &&
+			gspca_dev->dev->speed == USB_SPEED_FULL &&
+			last_bw >= 1000000 &&
+			i > 1) {
+		PDEBUG(D_STREAM, "dev has usb audio, skipping highest alt");
+		i--;
+		ep_tb--;
+	}
+
+	/* get the requested bandwidth and start at the highest altsetting */
+	bandwidth = which_bandwidth(gspca_dev);
+	ep_tb--;
+	while (i > 1) {
+		ep_tb--;
+		if (ep_tb->bandwidth < bandwidth)
+			break;
+		i--;
 	}
-	return ep;
+	return i;
 }
 
 /*
@@ -728,7 +798,7 @@
 	for (n = 0; n < nurbs; n++) {
 		urb = usb_alloc_urb(npkt, GFP_KERNEL);
 		if (!urb) {
-			err("usb_alloc_urb failed");
+			pr_err("usb_alloc_urb failed\n");
 			return -ENOMEM;
 		}
 		gspca_dev->urb[n] = urb;
@@ -738,7 +808,7 @@
 						&urb->transfer_dma);
 
 		if (urb->transfer_buffer == NULL) {
-			err("usb_alloc_coherent failed");
+			pr_err("usb_alloc_coherent failed\n");
 			return -ENOMEM;
 		}
 		urb->dev = gspca_dev->dev;
@@ -749,7 +819,7 @@
 						    ep->desc.bEndpointAddress);
 			urb->transfer_flags = URB_ISO_ASAP
 					| URB_NO_TRANSFER_DMA_MAP;
-			urb->interval = ep->desc.bInterval;
+			urb->interval = 1 << (ep->desc.bInterval - 1);
 			urb->complete = isoc_irq;
 			urb->number_of_packets = npkt;
 			for (i = 0; i < npkt; i++) {
@@ -771,9 +841,11 @@
  */
 static int gspca_init_transfer(struct gspca_dev *gspca_dev)
 {
+	struct usb_interface *intf;
 	struct usb_host_endpoint *ep;
 	struct urb *urb;
-	int n, ret;
+	struct ep_tb_s ep_tb[MAX_ALT];
+	int n, ret, xfer, alt, alt_idx;
 
 	if (mutex_lock_interruptible(&gspca_dev->usb_lock))
 		return -ERESTARTSYS;
@@ -791,41 +863,74 @@
 
 	gspca_dev->usb_err = 0;
 
-	/* set the higher alternate setting and
-	 * loop until urb submit succeeds */
-	if (gspca_dev->cam.reverse_alts)
-		gspca_dev->alt = 0;
-	else
-		gspca_dev->alt = gspca_dev->nbalt;
-
+	/* do the specific subdriver stuff before endpoint selection */
+	intf = usb_ifnum_to_if(gspca_dev->dev, gspca_dev->iface);
+	gspca_dev->alt = gspca_dev->cam.bulk ? intf->num_altsetting : 0;
 	if (gspca_dev->sd_desc->isoc_init) {
 		ret = gspca_dev->sd_desc->isoc_init(gspca_dev);
 		if (ret < 0)
 			goto unlock;
 	}
+	xfer = gspca_dev->cam.bulk ? USB_ENDPOINT_XFER_BULK
+				   : USB_ENDPOINT_XFER_ISOC;
 
-	gspca_input_destroy_urb(gspca_dev);
-	ep = get_ep(gspca_dev);
-	if (ep == NULL) {
-		ret = -EIO;
-		goto out;
+	printk ("<0>lxy: gspca ---------> 1\n");
+	/* if bulk or the subdriver forced an altsetting, get the endpoint */
+	if (gspca_dev->alt != 0) {
+		gspca_dev->alt--;	/* (previous version compatibility) */
+		ep = alt_xfer(&intf->altsetting[gspca_dev->alt], xfer);
+		if (ep == NULL) {
+			pr_err("bad altsetting %d\n", gspca_dev->alt);
+			ret = -EIO;
+			goto out;
+		}
+		ep_tb[0].alt = gspca_dev->alt;
+		alt_idx = 1;
+	} else {
+
+	/* else, compute the minimum bandwidth
+	 * and build the endpoint table */
+		alt_idx = build_isoc_ep_tb(gspca_dev, intf, ep_tb);
+		if (alt_idx <= 0) {
+			pr_err("no transfer endpoint found\n");
+			ret = -EIO;
+			goto unlock;
+		}
 	}
+	printk ("<0>lxy: gspca ---------> 2\n");
+
+	/* set the highest alternate setting and
+	 * loop until urb submit succeeds */
+	gspca_input_destroy_urb(gspca_dev);
+
+	gspca_dev->alt = ep_tb[--alt_idx].alt;
+	alt = -1;
 	for (;;) {
+		if (alt != gspca_dev->alt) {
+			alt = gspca_dev->alt;
+			if (intf->num_altsetting > 1) {
+				ret = usb_set_interface(gspca_dev->dev,
+							gspca_dev->iface,
+							alt);
+				if (ret < 0) {
+					if (ret == -ENOSPC)
+						goto retry; /*fixme: ugly*/
+					printk ("<0>lxy: set alt %d err %d\n", alt, ret);
+//					pr_err("set alt %d err %d\n", alt, ret);
+					goto out;
+				}
+			}
+		}
 		if (!gspca_dev->cam.no_urb_create) {
-			PDEBUG(D_STREAM, "init transfer alt %d",
-				gspca_dev->alt);
-			ret = create_urbs(gspca_dev, ep);
+			PDEBUG(D_STREAM, "init transfer alt %d", alt);
+			ret = create_urbs(gspca_dev,
+				alt_xfer(&intf->altsetting[alt], xfer));
 			if (ret < 0) {
 				destroy_urbs(gspca_dev);
 				goto out;
 			}
 		}
 
-		/* clear the bulk endpoint */
-		if (gspca_dev->cam.bulk)
-			usb_clear_halt(gspca_dev->dev,
-					gspca_dev->urb[0]->pipe);
-
 		/* start the cam */
 		ret = gspca_dev->sd_desc->start(gspca_dev);
 		if (ret < 0) {
@@ -834,9 +939,16 @@
 		}
 		gspca_dev->streaming = 1;
 
-		/* some bulk transfers are started by the subdriver */
-		if (gspca_dev->cam.bulk && gspca_dev->cam.bulk_nurbs == 0)
-			break;
+		if (gspca_dev->cam.bulk) {
+
+			/* clear the bulk endpoint */
+			usb_clear_halt(gspca_dev->dev,
+					gspca_dev->urb[0]->pipe);
+
+			/* some bulk transfers are started by the subdriver */
+			if (gspca_dev->cam.bulk_nurbs == 0)
+				break;
+		}
 
 		/* submit the URBs */
 		for (n = 0; n < MAX_NURBS; n++) {
@@ -847,30 +959,37 @@
 			if (ret < 0)
 				break;
 		}
+		printk ("<0>lxy: gspca ---------> 3, ret= %d !\n", ret);
 		if (ret >= 0)
-			break;
+			break;			/* transfer is started */
+
+		/* something when wrong
+		 * stop the webcam and free the transfer resources */
 		gspca_stream_off(gspca_dev);
 		if (ret != -ENOSPC) {
-			err("usb_submit_urb alt %d err %d",
-				gspca_dev->alt, ret);
+			pr_err("usb_submit_urb alt %d err %d\n",
+			       gspca_dev->alt, ret);
 			goto out;
 		}
 
 		/* the bandwidth is not wide enough
 		 * negotiate or try a lower alternate setting */
+retry:
 		PDEBUG(D_ERR|D_STREAM,
-			"bandwidth not wide enough - trying again");
+			"alt %d - bandwidth not wide enough - trying again",
+			alt);
 		msleep(20);	/* wait for kill complete */
 		if (gspca_dev->sd_desc->isoc_nego) {
 			ret = gspca_dev->sd_desc->isoc_nego(gspca_dev);
 			if (ret < 0)
 				goto out;
 		} else {
-			ep = get_ep(gspca_dev);
-			if (ep == NULL) {
+			if (alt_idx <= 0) {
+				pr_err("no transfer endpoint found\n");
 				ret = -EIO;
 				goto out;
 			}
+			gspca_dev->alt = ep_tb[--alt_idx].alt;
 		}
 	}
 out:
@@ -1041,7 +1160,9 @@
 		return -EINVAL;		/* no more format */
 
 	fmtdesc->pixelformat = fmt_tb[index];
-	if (gspca_is_compressed(fmt_tb[index]))
+	if (gspca_dev->cam.cam_mode[i].sizeimage <
+			gspca_dev->cam.cam_mode[i].width *
+				gspca_dev->cam.cam_mode[i].height)
 		fmtdesc->flags = V4L2_FMT_FLAG_COMPRESSED;
 	fmtdesc->description[0] = fmtdesc->pixelformat & 0xff;
 	fmtdesc->description[1] = (fmtdesc->pixelformat >> 8) & 0xff;
@@ -1201,6 +1322,38 @@
 	return -EINVAL;
 }
 
+static int vidioc_g_std(struct file *filp, void *priv,
+			v4l2_std_id *parm)
+{
+	struct gspca_dev *gspca_dev = priv;
+
+	*parm = gspca_dev->curr_std;
+	return 0;
+}
+
+static int vidioc_s_std(struct file *filp, void *priv,
+			v4l2_std_id *parm)
+{
+	struct gspca_dev *gspca_dev = priv;
+
+	if (!(*parm & gspca_dev->cam.std)
+	 || gspca_dev->sd_desc->set_misc == NULL)
+		return -EINVAL;
+	gspca_dev->curr_std = *parm;
+	gspca_dev->usb_err = 0;
+	gspca_dev->sd_desc->set_misc(gspca_dev, MISC_STD);
+	return gspca_dev->usb_err;
+}
+
+static int vidioc_querystd(struct file *filp, void *priv,
+			v4l2_std_id *parm)
+{
+	struct gspca_dev *gspca_dev = priv;
+
+	*parm = gspca_dev->cam.std;
+	return 0;
+}
+
 static void gspca_release(struct video_device *vfd)
 {
 	struct gspca_dev *gspca_dev = container_of(vfd, struct gspca_dev, vdev);
@@ -1278,10 +1431,10 @@
 		ret = -ENODEV;
 		goto out;
 	}
-	strncpy((char *) cap->driver, gspca_dev->sd_desc->name,
+	strlcpy((char *) cap->driver, gspca_dev->sd_desc->name,
 			sizeof cap->driver);
 	if (gspca_dev->dev->product != NULL) {
-		strncpy((char *) cap->card, gspca_dev->dev->product,
+		strlcpy((char *) cap->card, gspca_dev->dev->product,
 			sizeof cap->card);
 	} else {
 		snprintf((char *) cap->card, sizeof cap->card,
@@ -1291,7 +1444,6 @@
 	}
 	usb_make_path(gspca_dev->dev, (char *) cap->bus_info,
 			sizeof(cap->bus_info));
-	cap->version = DRIVER_VERSION_NUMBER;
 	cap->capabilities = V4L2_CAP_VIDEO_CAPTURE
 			  | V4L2_CAP_STREAMING
 			  | V4L2_CAP_READWRITE;
@@ -1455,27 +1607,47 @@
 				struct v4l2_input *input)
 {
 	struct gspca_dev *gspca_dev = priv;
+	unsigned int i;
 
-	if (input->index != 0)
+	i = input->index;
+	if (gspca_dev->cam.ninputs == 0) {	/* only input */
+		if (i != 0)
+			return -EINVAL;
+		input->type = V4L2_INPUT_TYPE_CAMERA;
+		input->status = gspca_dev->cam.input_flags;
+		strlcpy((char *) input->name, gspca_dev->sd_desc->name,
+			sizeof input->name);
+		return 0;
+	}
+	if (i >= gspca_dev->cam.ninputs)
 		return -EINVAL;
-	input->type = V4L2_INPUT_TYPE_CAMERA;
-	input->status = gspca_dev->cam.input_flags;
-	strncpy(input->name, gspca_dev->sd_desc->name,
-		sizeof input->name);
+	memcpy(input, &gspca_dev->cam.inputs[i], sizeof *input);
+	input->index = i;
+#ifdef V4L2_IN_CAP_STD
+	input->capabilities = V4L2_IN_CAP_STD;
+#endif
 	return 0;
 }
 
 static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
 {
-	*i = 0;
+	struct gspca_dev *gspca_dev = priv;
+
+	*i = gspca_dev->curr_input;
 	return 0;
 }
 
 static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
 {
-	if (i > 0)
+	struct gspca_dev *gspca_dev = priv;
+
+	if (i >= gspca_dev->cam.ninputs && i != 0)
 		return -EINVAL;
-	return (0);
+	gspca_dev->curr_input = i;
+	gspca_dev->usb_err = 0;
+	if (gspca_dev->sd_desc->set_misc)
+		gspca_dev->sd_desc->set_misc(gspca_dev, MISC_INPUT);
+	return gspca_dev->usb_err;
 }
 
 static int vidioc_reqbufs(struct file *file, void *priv,
@@ -1873,7 +2045,7 @@
 		/* wait till a frame is ready */
 		ret = wait_event_interruptible_timeout(gspca_dev->wq,
 			frame_ready(gspca_dev, file, v4l2_buf->memory),
-			msecs_to_jiffies(3000));
+			msecs_to_jiffies(-3000));
 		if (ret < 0)
 			return ret;
 		if (ret == 0)
@@ -2147,6 +2319,9 @@
 	.vidioc_s_parm		= vidioc_s_parm,
 	.vidioc_enum_framesizes = vidioc_enum_framesizes,
 	.vidioc_enum_frameintervals = vidioc_enum_frameintervals,
+	.vidioc_g_std		= vidioc_g_std,
+	.vidioc_s_std		= vidioc_s_std,
+	.vidioc_querystd	= vidioc_querystd,
 #ifdef CONFIG_VIDEO_ADV_DEBUG
 	.vidioc_g_register	= vidioc_g_register,
 	.vidioc_s_register	= vidioc_s_register,
@@ -2193,33 +2368,33 @@
 	struct usb_device *dev = interface_to_usbdev(intf);
 	int ret;
 
-	PDEBUG(D_PROBE, "probing %04x:%04x", id->idVendor, id->idProduct);
+	pr_info("%s-" GSPCA_VERSION " probing %04x:%04x\n",
+		sd_desc->name, id->idVendor, id->idProduct);
 
 	/* create the device */
 	if (dev_size < sizeof *gspca_dev)
 		dev_size = sizeof *gspca_dev;
 	gspca_dev = kzalloc(dev_size, GFP_KERNEL);
 	if (!gspca_dev) {
-		err("couldn't kzalloc gspca struct");
+		pr_err("couldn't kzalloc gspca struct\n");
 		return -ENOMEM;
 	}
 	gspca_dev->usb_buf = kmalloc(USB_BUF_SZ, GFP_KERNEL);
 	if (!gspca_dev->usb_buf) {
-		err("out of memory");
+		pr_err("out of memory\n");
 		ret = -ENOMEM;
 		goto out;
 	}
 	gspca_dev->dev = dev;
 	gspca_dev->iface = intf->cur_altsetting->desc.bInterfaceNumber;
-	gspca_dev->nbalt = intf->num_altsetting;
 
 	/* check if any audio device */
-	if (dev->config->desc.bNumInterfaces != 1) {
+	if (dev->actconfig->desc.bNumInterfaces != 1) {
 		int i;
 		struct usb_interface *intf2;
 
-		for (i = 0; i < dev->config->desc.bNumInterfaces; i++) {
-			intf2 = dev->config->interface[i];
+		for (i = 0; i < dev->actconfig->desc.bNumInterfaces; i++) {
+			intf2 = dev->actconfig->interface[i];
 			if (intf2 != NULL
 			 && intf2->altsetting != NULL
 			 && intf2->altsetting->desc.bInterfaceClass ==
@@ -2262,7 +2437,7 @@
 				  VFL_TYPE_GRABBER,
 				  -1);
 	if (ret < 0) {
-		err("video_register_device err %d", ret);
+		pr_err("video_register_device err %d\n", ret);
 		goto out;
 	}
 
@@ -2294,13 +2469,13 @@
 
 	/* we don't handle multi-config cameras */
 	if (dev->descriptor.bNumConfigurations != 1) {
-		err("%04x:%04x too many config",
-				id->idVendor, id->idProduct);
+		pr_err("%04x:%04x too many config\n",
+		       id->idVendor, id->idProduct);
 		return -ENODEV;
 	}
 
 	/* the USB video interface must be the first one */
-	if (dev->config->desc.bNumInterfaces != 1
+	if (dev->actconfig->desc.bNumInterfaces != 1
 	 && intf->cur_altsetting->desc.bInterfaceNumber != 0)
 		return -ENODEV;
 
@@ -2478,10 +2653,7 @@
 /* -- module insert / remove -- */
 static int __init gspca_init(void)
 {
-	info("v%d.%d.%d registered",
-		(DRIVER_VERSION_NUMBER >> 16) & 0xff,
-		(DRIVER_VERSION_NUMBER >> 8) & 0xff,
-		DRIVER_VERSION_NUMBER & 0xff);
+	pr_info("v" GSPCA_VERSION " registered\n");
 	return 0;
 }
 static void __exit gspca_exit(void)
diff -uNra linux-3.0.82/drivers/media/video/gspca/gspca.h linux-3.0.82x/drivers/media/video/gspca/gspca.h
--- linux-3.0.82/drivers/media/video/gspca/gspca.h	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/gspca.h	2017-09-23 03:42:49.454676787 +0800
@@ -1,244 +1,82 @@
-#ifndef GSPCAV2_H
-#define GSPCAV2_H
+/* compilation option */
+#define GSPCA_DEBUG 1
 
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/usb.h>
-#include <linux/videodev2.h>
-#include <media/v4l2-common.h>
-#include <linux/mutex.h>
+#include "gspca.orig.h"
+#include <linux/version.h>
 
-/* compilation option */
-/*#define GSPCA_DEBUG 1*/
+#undef GSPCA_VERSION
+#define GSPCA_VERSION "2.15.14"
 
-#ifdef GSPCA_DEBUG
-/* GSPCA our debug messages */
-extern int gspca_debug;
-#define PDEBUG(level, fmt, args...) \
-	do {\
-		if (gspca_debug & (level)) \
-			printk(KERN_INFO MODULE_NAME ": " fmt "\n", ## args); \
-	} while (0)
-#define D_ERR  0x01
-#define D_PROBE 0x02
-#define D_CONF 0x04
-#define D_STREAM 0x08
-#define D_FRAM 0x10
-#define D_PACK 0x20
-#define D_USBI 0x00
-#define D_USBO 0x00
-#define D_V4L2 0x0100
+#ifndef V4L2_PIX_FMT_CPIA1
+#define V4L2_PIX_FMT_SRGGB8  v4l2_fourcc('R', 'G', 'G', 'B')
+#define V4L2_PIX_FMT_CPIA1 v4l2_fourcc('C', 'P', 'I', 'A')
+#define V4L2_PIX_FMT_SN9C2028 v4l2_fourcc('S', 'O', 'N', 'X')
+#define V4L2_PIX_FMT_STV0680 v4l2_fourcc('S', '6', '8', '0')
+static inline const char *vdnn(struct video_device *vdev)
+{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
+	return vdev->dev.class_id;
+#else
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26)
+	return vdev->dev.bus_id;
 #else
-#define PDEBUG(level, fmt, args...)
+	return dev_name(&vdev->dev);
 #endif
-#undef err
-#define err(fmt, args...) \
-	printk(KERN_ERR MODULE_NAME ": " fmt "\n", ## args)
-#undef info
-#define info(fmt, args...) \
-	printk(KERN_INFO MODULE_NAME ": " fmt "\n", ## args)
-#undef warn
-#define warn(fmt, args...) \
-	printk(KERN_WARNING MODULE_NAME ": " fmt "\n", ## args)
-
-#define GSPCA_MAX_FRAMES 16	/* maximum number of video frame buffers */
-/* image transfers */
-#define MAX_NURBS 4		/* max number of URBs */
-
-
-/* used to list framerates supported by a camera mode (resolution) */
-struct framerates {
-	const u8 *rates;
-	int nrates;
-};
-
-/* control definition */
-struct gspca_ctrl {
-	s16 val;	/* current value */
-	s16 def;	/* default value */
-	s16 min, max;	/* minimum and maximum values */
-};
-
-/* device information - set at probe time */
-struct cam {
-	const struct v4l2_pix_format *cam_mode;	/* size nmodes */
-	const struct framerates *mode_framerates; /* must have size nmodes,
-						   * just like cam_mode */
-	struct gspca_ctrl *ctrls;	/* control table - size nctrls */
-					/* may be NULL */
-	u32 bulk_size;		/* buffer size when image transfer by bulk */
-	u32 input_flags;	/* value for ENUM_INPUT status flags */
-	u8 nmodes;		/* size of cam_mode */
-	u8 no_urb_create;	/* don't create transfer URBs */
-	u8 bulk_nurbs;		/* number of URBs in bulk mode
-				 * - cannot be > MAX_NURBS
-				 * - when 0 and bulk_size != 0 means
-				 *   1 URB and submit done by subdriver */
-	u8 bulk;		/* image transfer by 0:isoc / 1:bulk */
-	u8 npkt;		/* number of packets in an ISOC message
-				 * 0 is the default value: 32 packets */
-	u8 reverse_alts;	/* Alt settings are in high to low order */
-};
-
-struct gspca_dev;
-struct gspca_frame;
-
-/* subdriver operations */
-typedef int (*cam_op) (struct gspca_dev *);
-typedef void (*cam_v_op) (struct gspca_dev *);
-typedef int (*cam_cf_op) (struct gspca_dev *, const struct usb_device_id *);
-typedef int (*cam_jpg_op) (struct gspca_dev *,
-				struct v4l2_jpegcompression *);
-typedef int (*cam_reg_op) (struct gspca_dev *,
-				struct v4l2_dbg_register *);
-typedef int (*cam_ident_op) (struct gspca_dev *,
-				struct v4l2_dbg_chip_ident *);
-typedef void (*cam_streamparm_op) (struct gspca_dev *,
-				  struct v4l2_streamparm *);
-typedef int (*cam_qmnu_op) (struct gspca_dev *,
-			struct v4l2_querymenu *);
-typedef void (*cam_pkt_op) (struct gspca_dev *gspca_dev,
-				u8 *data,
-				int len);
-typedef int (*cam_int_pkt_op) (struct gspca_dev *gspca_dev,
-				u8 *data,
-				int len);
-
-struct ctrl {
-	struct v4l2_queryctrl qctrl;
-	int (*set)(struct gspca_dev *, __s32);
-	int (*get)(struct gspca_dev *, __s32 *);
-	cam_v_op set_control;
-};
-
-/* subdriver description */
-struct sd_desc {
-/* information */
-	const char *name;	/* sub-driver name */
-/* controls */
-	const struct ctrl *ctrls;	/* static control definition */
-	int nctrls;
-/* mandatory operations */
-	cam_cf_op config;	/* called on probe */
-	cam_op init;		/* called on probe and resume */
-	cam_op start;		/* called on stream on after URBs creation */
-	cam_pkt_op pkt_scan;
-/* optional operations */
-	cam_op isoc_init;	/* called on stream on before getting the EP */
-	cam_op isoc_nego;	/* called when URB submit failed with NOSPC */
-	cam_v_op stopN;		/* called on stream off - main alt */
-	cam_v_op stop0;		/* called on stream off & disconnect - alt 0 */
-	cam_v_op dq_callback;	/* called when a frame has been dequeued */
-	cam_jpg_op get_jcomp;
-	cam_jpg_op set_jcomp;
-	cam_qmnu_op querymenu;
-	cam_streamparm_op get_streamparm;
-	cam_streamparm_op set_streamparm;
-#ifdef CONFIG_VIDEO_ADV_DEBUG
-	cam_reg_op set_register;
-	cam_reg_op get_register;
-#endif
-	cam_ident_op get_chip_ident;
-#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
-	cam_int_pkt_op int_pkt_scan;
-	/* other_input makes the gspca core create gspca_dev->input even when
-	   int_pkt_scan is NULL, for cams with non interrupt driven buttons */
-	u8 other_input;
 #endif
-};
-
-/* packet types when moving from iso buf to frame buf */
-enum gspca_packet_type {
-	DISCARD_PACKET,
-	FIRST_PACKET,
-	INTER_PACKET,
-	LAST_PACKET
-};
-
-struct gspca_frame {
-	__u8 *data;			/* frame buffer */
-	int vma_use_count;
-	struct v4l2_buffer v4l2_buf;
-};
-
-struct gspca_dev {
-	struct video_device vdev;	/* !! must be the first item */
-	struct module *module;		/* subdriver handling the device */
-	struct usb_device *dev;
-	struct file *capt_file;		/* file doing video capture */
-#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
-	struct input_dev *input_dev;
-	char phys[64];			/* physical device path */
+}
+#define video_device_node_name(vdev) vdnn(vdev)
 #endif
-
-	struct cam cam;				/* device information */
-	const struct sd_desc *sd_desc;		/* subdriver description */
-	unsigned ctrl_dis;		/* disabled controls (bit map) */
-	unsigned ctrl_inac;		/* inactive controls (bit map) */
-
-#define USB_BUF_SZ 64
-	__u8 *usb_buf;				/* buffer for USB exchanges */
-	struct urb *urb[MAX_NURBS];
-#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
-	struct urb *int_urb;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 35)
+#define usb_alloc_coherent(d, b, g, a) usb_buffer_alloc(d, b, g, a)
+#define usb_free_coherent(d, l, b, a) usb_buffer_free(d, l, b, a)
+#endif
+#ifndef V4L2_PIX_FMT_CIT_YYVYUY
+#define V4L2_PIX_FMT_CIT_YYVYUY v4l2_fourcc('C', 'I', 'T', 'V') /* one line of Y then 1 line of VYUY */
+#define V4L2_PIX_FMT_KONICA420  v4l2_fourcc('K', 'O', 'N', 'I') /* YUV420 planar in blocks of 256 pixels */
+#endif
+#ifndef V4L2_PIX_FMT_JPGL
+#define V4L2_PIX_FMT_JPGL	v4l2_fourcc('J', 'P', 'G', 'L') /* JPEG-Lite */
+#endif
+#ifndef V4L2_PIX_FMT_Y10BPACK
+#define V4L2_PIX_FMT_Y10BPACK    v4l2_fourcc('Y', '1', '0', 'B') /* 10  Greyscale bit-packed */
+#endif
+#ifndef V4L2_PIX_FMT_SE401
+#define V4L2_PIX_FMT_SE401      v4l2_fourcc('S', '4', '0', '1') /* se401 janggu compressed rgb */
+#endif
+#ifndef V4L2_PIX_FMT_JL2005BCD
+#define V4L2_PIX_FMT_JL2005BCD v4l2_fourcc('J', 'L', '2', '0') /* compressed RGGB bayer */
+#endif
+#ifndef V4L2_CID_ILLUMINATORS_1
+#define V4L2_CID_ILLUMINATORS_1			(V4L2_CID_BASE+37)
+#define V4L2_CID_ILLUMINATORS_2			(V4L2_CID_BASE+38)
+#endif
+#ifndef V4L2_CID_JPEG_COMPRESSION_QUALITY
+#define V4L2_CID_JPEG_COMPRESSION_QUALITY	(V4L2_CID_BASE+42)
+#endif
+#ifndef pr_warn
+#define pr_err(fmt, ...) \
+	printk(KERN_ERR pr_fmt(fmt), ##__VA_ARGS__)
+#define pr_warning(fmt, ...) \
+	printk(KERN_WARNING pr_fmt(fmt), ##__VA_ARGS__)
+#define pr_warn pr_warning
+#define pr_info(fmt, ...) \
+	printk(KERN_INFO pr_fmt(fmt), ##__VA_ARGS__)
+#endif
+#ifndef module_driver
+#define module_driver(__driver, __register, __unregister) \
+static int __init __driver##_init(void) \
+{ \
+	return __register(&(__driver)); \
+} \
+module_init(__driver##_init); \
+static void __exit __driver##_exit(void) \
+{ \
+	__unregister(&(__driver)); \
+} \
+module_exit(__driver##_exit);
+#endif
+#ifndef module_usb_driver
+#define module_usb_driver(__usb_driver) \
+	module_driver(__usb_driver, usb_register, \
+		       usb_deregister)
 #endif
-
-	__u8 *frbuf;				/* buffer for nframes */
-	struct gspca_frame frame[GSPCA_MAX_FRAMES];
-	u8 *image;				/* image beeing filled */
-	__u32 frsz;				/* frame size */
-	u32 image_len;				/* current length of image */
-	atomic_t fr_q;				/* next frame to queue */
-	atomic_t fr_i;				/* frame being filled */
-	signed char fr_queue[GSPCA_MAX_FRAMES];	/* frame queue */
-	char nframes;				/* number of frames */
-	u8 fr_o;				/* next frame to dequeue */
-	__u8 last_packet_type;
-	__s8 empty_packet;		/* if (-1) don't check empty packets */
-	__u8 streaming;
-
-	__u8 curr_mode;			/* current camera mode */
-	__u32 pixfmt;			/* current mode parameters */
-	__u16 width;
-	__u16 height;
-	__u32 sequence;			/* frame sequence number */
-
-	wait_queue_head_t wq;		/* wait queue */
-	struct mutex usb_lock;		/* usb exchange protection */
-	struct mutex queue_lock;	/* ISOC queue protection */
-	int usb_err;			/* USB error - protected by usb_lock */
-	u16 pkt_size;			/* ISOC packet size */
-#ifdef CONFIG_PM
-	char frozen;			/* suspend - resume */
-#endif
-	char present;			/* device connected */
-	char nbufread;			/* number of buffers for read() */
-	char memory;			/* memory type (V4L2_MEMORY_xxx) */
-	__u8 iface;			/* USB interface number */
-	__u8 alt;			/* USB alternate setting */
-	__u8 nbalt;			/* number of USB alternate settings */
-	u8 audio;			/* presence of audio device */
-};
-
-int gspca_dev_probe(struct usb_interface *intf,
-		const struct usb_device_id *id,
-		const struct sd_desc *sd_desc,
-		int dev_size,
-		struct module *module);
-int gspca_dev_probe2(struct usb_interface *intf,
-		const struct usb_device_id *id,
-		const struct sd_desc *sd_desc,
-		int dev_size,
-		struct module *module);
-void gspca_disconnect(struct usb_interface *intf);
-void gspca_frame_add(struct gspca_dev *gspca_dev,
-			enum gspca_packet_type packet_type,
-			const u8 *data,
-			int len);
-#ifdef CONFIG_PM
-int gspca_suspend(struct usb_interface *intf, pm_message_t message);
-int gspca_resume(struct usb_interface *intf);
-#endif
-int gspca_auto_gain_n_exposure(struct gspca_dev *gspca_dev, int avg_lum,
-	int desired_avg_lum, int deadzone, int gain_knee, int exposure_knee);
-#endif /* GSPCAV2_H */
diff -uNra linux-3.0.82/drivers/media/video/gspca/gspca.orig.h linux-3.0.82x/drivers/media/video/gspca/gspca.orig.h
--- linux-3.0.82/drivers/media/video/gspca/gspca.orig.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/gspca.orig.h	2017-09-23 03:42:49.454676787 +0800
@@ -0,0 +1,248 @@
+#ifndef GSPCAV2_H
+#define GSPCAV2_H
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/usb.h>
+#include <linux/videodev2.h>
+#include <media/v4l2-common.h>
+#include <linux/mutex.h>
+
+/* compilation option */
+/*#define GSPCA_DEBUG 1*/
+
+#ifdef GSPCA_DEBUG
+/* GSPCA our debug messages */
+extern int gspca_debug;
+#define PDEBUG(level, fmt, ...)					\
+do {								\
+	if (gspca_debug & (level))				\
+		pr_info(fmt, ##__VA_ARGS__);			\
+} while (0)
+
+#define D_ERR  0x01
+#define D_PROBE 0x02
+#define D_CONF 0x04
+#define D_STREAM 0x08
+#define D_FRAM 0x10
+#define D_PACK 0x20
+#define D_USBI 0x00
+#define D_USBO 0x00
+#define D_V4L2 0x0100
+#else
+#define PDEBUG(level, fmt, ...)
+#endif
+
+#define GSPCA_MAX_FRAMES 16	/* maximum number of video frame buffers */
+/* image transfers */
+#define MAX_NURBS 4		/* max number of URBs */
+
+
+/* used to list framerates supported by a camera mode (resolution) */
+struct framerates {
+	const u8 *rates;
+	int nrates;
+};
+
+/* control definition */
+struct gspca_ctrl {
+	s16 val;	/* current value */
+	s16 def;	/* default value */
+	s16 min, max;	/* minimum and maximum values */
+};
+
+/* device information - set at probe time */
+struct cam {
+	const struct v4l2_pix_format *cam_mode;	/* size nmodes */
+	const struct framerates *mode_framerates; /* must have size nmodes,
+						   * just like cam_mode */
+	const struct v4l2_input *inputs; /* video inputs - size ninputs */
+	v4l2_std_id std;		/* video standard */
+	struct gspca_ctrl *ctrls;	/* control table - size nctrls */
+					/* may be NULL */
+	u32 bulk_size;		/* buffer size when image transfer by bulk */
+	u32 input_flags;	/* value for ENUM_INPUT status flags */
+	u8 nmodes;		/* size of cam_mode */
+	u8 ninputs;		/* number of inputs */
+	u8 no_urb_create;	/* don't create transfer URBs */
+	u8 bulk_nurbs;		/* number of URBs in bulk mode
+				 * - cannot be > MAX_NURBS
+				 * - when 0 and bulk_size != 0 means
+				 *   1 URB and submit done by subdriver */
+	u8 bulk;		/* image transfer by 0:isoc / 1:bulk */
+	u8 npkt;		/* number of packets in an ISOC message
+				 * 0 is the default value: 32 packets */
+	u8 needs_full_bandwidth;/* Set this flag to notify the bandwidth calc.
+	                         * code that the cam fills all image buffers to
+	                         * the max, even when using compression. */
+};
+
+struct gspca_dev;
+struct gspca_frame;
+
+/* subdriver operations */
+typedef int (*cam_op) (struct gspca_dev *);
+typedef void (*cam_v_op) (struct gspca_dev *);
+typedef int (*cam_cf_op) (struct gspca_dev *, const struct usb_device_id *);
+typedef int (*cam_jpg_op) (struct gspca_dev *,
+				struct v4l2_jpegcompression *);
+typedef int (*cam_reg_op) (struct gspca_dev *,
+				struct v4l2_dbg_register *);
+typedef int (*cam_ident_op) (struct gspca_dev *,
+				struct v4l2_dbg_chip_ident *);
+typedef void (*cam_streamparm_op) (struct gspca_dev *,
+				  struct v4l2_streamparm *);
+typedef int (*cam_qmnu_op) (struct gspca_dev *,
+			struct v4l2_querymenu *);
+typedef void (*cam_pkt_op) (struct gspca_dev *gspca_dev,
+				u8 *data,
+				int len);
+typedef int (*cam_int_pkt_op) (struct gspca_dev *gspca_dev,
+				u8 *data,
+				int len);
+typedef void (*cam_set_op) (struct gspca_dev *, int idx);
+
+struct ctrl {
+	struct v4l2_queryctrl qctrl;
+	int (*set)(struct gspca_dev *, __s32);
+	int (*get)(struct gspca_dev *, __s32 *);
+	cam_v_op set_control;
+};
+
+/* subdriver description */
+struct sd_desc {
+/* information */
+	const char *name;	/* sub-driver name */
+/* controls */
+	const struct ctrl *ctrls;	/* static control definition */
+	int nctrls;
+/* mandatory operations */
+	cam_cf_op config;	/* called on probe */
+	cam_op init;		/* called on probe and resume */
+	cam_op start;		/* called on stream on after URBs creation */
+	cam_pkt_op pkt_scan;
+/* optional operations */
+	cam_op isoc_init;	/* called on stream on before getting the EP */
+	cam_op isoc_nego;	/* called when URB submit failed with NOSPC */
+	cam_v_op stopN;		/* called on stream off - main alt */
+	cam_v_op stop0;		/* called on stream off & disconnect - alt 0 */
+	cam_v_op dq_callback;	/* called when a frame has been dequeued */
+	cam_jpg_op get_jcomp;
+	cam_jpg_op set_jcomp;
+	cam_qmnu_op querymenu;
+	cam_streamparm_op get_streamparm;
+	cam_streamparm_op set_streamparm;
+	cam_set_op set_misc;
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+	cam_reg_op set_register;
+	cam_reg_op get_register;
+#endif
+	cam_ident_op get_chip_ident;
+#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
+	cam_int_pkt_op int_pkt_scan;
+	/* other_input makes the gspca core create gspca_dev->input even when
+	   int_pkt_scan is NULL, for cams with non interrupt driven buttons */
+	u8 other_input;
+#endif
+};
+
+/* set_misc indices */
+#define MISC_INPUT 0
+#define MISC_STD 1
+
+/* packet types when moving from iso buf to frame buf */
+enum gspca_packet_type {
+	DISCARD_PACKET,
+	FIRST_PACKET,
+	INTER_PACKET,
+	LAST_PACKET
+};
+
+struct gspca_frame {
+	__u8 *data;			/* frame buffer */
+	int vma_use_count;
+	struct v4l2_buffer v4l2_buf;
+};
+
+struct gspca_dev {
+	struct video_device vdev;	/* !! must be the first item */
+	struct module *module;		/* subdriver handling the device */
+	struct usb_device *dev;
+	struct file *capt_file;		/* file doing video capture */
+#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
+	struct input_dev *input_dev;
+	char phys[64];			/* physical device path */
+#endif
+
+	struct cam cam;				/* device information */
+	const struct sd_desc *sd_desc;		/* subdriver description */
+	unsigned ctrl_dis;		/* disabled controls (bit map) */
+	unsigned ctrl_inac;		/* inactive controls (bit map) */
+
+#define USB_BUF_SZ 64
+	__u8 *usb_buf;				/* buffer for USB exchanges */
+	struct urb *urb[MAX_NURBS];
+#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
+	struct urb *int_urb;
+#endif
+
+	__u8 *frbuf;				/* buffer for nframes */
+	struct gspca_frame frame[GSPCA_MAX_FRAMES];
+	u8 *image;				/* image beeing filled */
+	__u32 frsz;				/* frame size */
+	u32 image_len;				/* current length of image */
+	atomic_t fr_q;				/* next frame to queue */
+	atomic_t fr_i;				/* frame being filled */
+	signed char fr_queue[GSPCA_MAX_FRAMES];	/* frame queue */
+	char nframes;				/* number of frames */
+	u8 fr_o;				/* next frame to dequeue */
+	__u8 last_packet_type;
+	__s8 empty_packet;		/* if (-1) don't check empty packets */
+	__u8 streaming;
+
+	__u8 curr_mode;			/* current camera mode */
+	u8 curr_input;			/* current video input */
+	v4l2_std_id curr_std;		/* current video standard */
+	__u32 pixfmt;			/* current mode parameters */
+	__u16 width;
+	__u16 height;
+	__u32 sequence;			/* frame sequence number */
+
+	wait_queue_head_t wq;		/* wait queue */
+	struct mutex usb_lock;		/* usb exchange protection */
+	struct mutex queue_lock;	/* ISOC queue protection */
+	int usb_err;			/* USB error - protected by usb_lock */
+	u16 pkt_size;			/* ISOC packet size */
+#ifdef CONFIG_PM
+	char frozen;			/* suspend - resume */
+#endif
+	char present;			/* device connected */
+	char nbufread;			/* number of buffers for read() */
+	char memory;			/* memory type (V4L2_MEMORY_xxx) */
+	__u8 iface;			/* USB interface number */
+	__u8 alt;			/* USB alternate setting */
+	u8 audio;			/* presence of audio device */
+};
+
+int gspca_dev_probe(struct usb_interface *intf,
+		const struct usb_device_id *id,
+		const struct sd_desc *sd_desc,
+		int dev_size,
+		struct module *module);
+int gspca_dev_probe2(struct usb_interface *intf,
+		const struct usb_device_id *id,
+		const struct sd_desc *sd_desc,
+		int dev_size,
+		struct module *module);
+void gspca_disconnect(struct usb_interface *intf);
+void gspca_frame_add(struct gspca_dev *gspca_dev,
+			enum gspca_packet_type packet_type,
+			const u8 *data,
+			int len);
+#ifdef CONFIG_PM
+int gspca_suspend(struct usb_interface *intf, pm_message_t message);
+int gspca_resume(struct usb_interface *intf);
+#endif
+int gspca_auto_gain_n_exposure(struct gspca_dev *gspca_dev, int avg_lum,
+	int desired_avg_lum, int deadzone, int gain_knee, int exposure_knee);
+#endif /* GSPCAV2_H */
diff -uNra linux-3.0.82/drivers/media/video/gspca/jeilinj.c linux-3.0.82x/drivers/media/video/gspca/jeilinj.c
--- linux-3.0.82/drivers/media/video/gspca/jeilinj.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/jeilinj.c	2017-09-23 03:42:49.454676787 +0800
@@ -24,6 +24,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "jeilinj"
 
 #include <linux/slab.h>
@@ -109,14 +111,20 @@
 	if (gspca_dev->usb_err < 0)
 		return;
 	memcpy(gspca_dev->usb_buf, command, 2);
+/*jfm*/
+	if (*command == 0x95)
+		msleep(100);
 	retval = usb_bulk_msg(gspca_dev->dev,
 			usb_sndbulkpipe(gspca_dev->dev, 3),
 			gspca_dev->usb_buf, 2, NULL, 500);
 	if (retval < 0) {
-		err("command write [%02x] error %d",
-				gspca_dev->usb_buf[0], retval);
+		pr_err("command write [%02x] error %d\n",
+		       gspca_dev->usb_buf[0], retval);
 		gspca_dev->usb_err = retval;
 	}
+/*jfm*/
+	if (*command == 0x70)
+		msleep(50);
 }
 
 /* Responses are one byte only */
@@ -131,8 +139,8 @@
 				gspca_dev->usb_buf, 1, NULL, 500);
 	response = gspca_dev->usb_buf[0];
 	if (retval < 0) {
-		err("read command [%02x] error %d",
-				gspca_dev->usb_buf[0], retval);
+		pr_err("read command [%02x] error %d\n",
+		       gspca_dev->usb_buf[0], retval);
 		gspca_dev->usb_err = retval;
 	}
 }
@@ -337,8 +345,9 @@
 
 	for (i = 0; i < start_commands_size; i++) {
 		jlj_write2(gspca_dev, start_commands[i].instruction);
-		if (start_commands[i].delay)
-			msleep(start_commands[i].delay);
+/*jfm
+*		if (start_commands[i].delay)
+*			msleep(start_commands[i].delay); */
 		if (start_commands[i].ack_wanted)
 			jlj_read1(gspca_dev, response);
 	}
@@ -403,13 +412,7 @@
 	dev->type = id->driver_info;
 	gspca_dev->cam.ctrls = dev->ctrls;
 	dev->quality = QUALITY_DEF;
-	dev->ctrls[LIGHTFREQ].def = V4L2_CID_POWER_LINE_FREQUENCY_60HZ;
-	dev->ctrls[RED].def = RED_BALANCE_DEF;
-	dev->ctrls[GREEN].def = GREEN_BALANCE_DEF;
-	dev->ctrls[BLUE].def = BLUE_BALANCE_DEF;
-	PDEBUG(D_PROBE,
-		"JEILINJ camera detected"
-		" (vid/pid 0x%04X:0x%04X)", id->idVendor, id->idProduct);
+
 	cam->cam_mode = jlj_mode;
 	cam->nmodes = ARRAY_SIZE(jlj_mode);
 	cam->bulk = 1;
@@ -422,7 +425,7 @@
 {
 	int i;
 	u8 *buf;
-	u8 stop_commands[][2] = {
+	static u8 stop_commands[][2] = {
 		{0x71, 0x00},
 		{0x70, 0x09},
 		{0x71, 0x80},
@@ -586,16 +589,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/kinect.c linux-3.0.82x/drivers/media/video/gspca/kinect.c
--- linux-3.0.82/drivers/media/video/gspca/kinect.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/kinect.c	2017-09-23 03:42:49.454676787 +0800
@@ -24,6 +24,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "kinect"
 
 #include "gspca.h"
@@ -34,11 +36,6 @@
 MODULE_DESCRIPTION("GSPCA/Kinect Sensor Device USB Camera Driver");
 MODULE_LICENSE("GPL");
 
-#ifdef GSPCA_DEBUG
-int gspca_debug = D_ERR | D_PROBE | D_CONF | D_STREAM | D_FRAM | D_PACK |
-	D_USBI | D_USBO | D_V4L2;
-#endif
-
 struct pkt_hdr {
 	uint8_t magic[2];
 	uint8_t pad;
@@ -141,7 +138,7 @@
 	struct cam_hdr *rhdr = (void *)ibuf;
 
 	if (cmd_len & 1 || cmd_len > (0x400 - sizeof(*chdr))) {
-		err("send_cmd: Invalid command length (0x%x)", cmd_len);
+		pr_err("send_cmd: Invalid command length (0x%x)\n", cmd_len);
 		return -1;
 	}
 
@@ -157,7 +154,7 @@
 	PDEBUG(D_USBO, "Control cmd=%04x tag=%04x len=%04x: %d", cmd,
 		sd->cam_tag, cmd_len, res);
 	if (res < 0) {
-		err("send_cmd: Output control transfer failed (%d)", res);
+		pr_err("send_cmd: Output control transfer failed (%d)\n", res);
 		return res;
 	}
 
@@ -166,33 +163,35 @@
 	} while (actual_len == 0);
 	PDEBUG(D_USBO, "Control reply: %d", res);
 	if (actual_len < sizeof(*rhdr)) {
-		err("send_cmd: Input control transfer failed (%d)", res);
+		pr_err("send_cmd: Input control transfer failed (%d)\n", res);
 		return res;
 	}
 	actual_len -= sizeof(*rhdr);
 
 	if (rhdr->magic[0] != 0x52 || rhdr->magic[1] != 0x42) {
-		err("send_cmd: Bad magic %02x %02x", rhdr->magic[0],
-			rhdr->magic[1]);
+		pr_err("send_cmd: Bad magic %02x %02x\n",
+		       rhdr->magic[0], rhdr->magic[1]);
 		return -1;
 	}
 	if (rhdr->cmd != chdr->cmd) {
-		err("send_cmd: Bad cmd %02x != %02x", rhdr->cmd, chdr->cmd);
+		pr_err("send_cmd: Bad cmd %02x != %02x\n",
+		       rhdr->cmd, chdr->cmd);
 		return -1;
 	}
 	if (rhdr->tag != chdr->tag) {
-		err("send_cmd: Bad tag %04x != %04x", rhdr->tag, chdr->tag);
+		pr_err("send_cmd: Bad tag %04x != %04x\n",
+		       rhdr->tag, chdr->tag);
 		return -1;
 	}
 	if (cpu_to_le16(rhdr->len) != (actual_len/2)) {
-		err("send_cmd: Bad len %04x != %04x",
-				cpu_to_le16(rhdr->len), (int)(actual_len/2));
+		pr_err("send_cmd: Bad len %04x != %04x\n",
+		       cpu_to_le16(rhdr->len), (int)(actual_len/2));
 		return -1;
 	}
 
 	if (actual_len > reply_len) {
-		warn("send_cmd: Data buffer is %d bytes long, but got %d bytes",
-				reply_len, actual_len);
+		pr_warn("send_cmd: Data buffer is %d bytes long, but got %d bytes\n",
+			reply_len, actual_len);
 		memcpy(replybuf, ibuf+sizeof(*rhdr), reply_len);
 	} else {
 		memcpy(replybuf, ibuf+sizeof(*rhdr), actual_len);
@@ -218,8 +217,8 @@
 	if (res < 0)
 		return res;
 	if (res != 2) {
-		warn("send_cmd returned %d [%04x %04x], 0000 expected",
-				res, reply[0], reply[1]);
+		pr_warn("send_cmd returned %d [%04x %04x], 0000 expected\n",
+			res, reply[0], reply[1]);
 	}
 	return 0;
 }
@@ -353,8 +352,8 @@
 		return;
 
 	if (hdr->magic[0] != 'R' || hdr->magic[1] != 'B') {
-		warn("[Stream %02x] Invalid magic %02x%02x", sd->stream_flag,
-				hdr->magic[0], hdr->magic[1]);
+		pr_warn("[Stream %02x] Invalid magic %02x%02x\n",
+			sd->stream_flag, hdr->magic[0], hdr->magic[1]);
 		return;
 	}
 
@@ -368,7 +367,7 @@
 		gspca_frame_add(gspca_dev, LAST_PACKET, data, datalen);
 
 	else
-		warn("Packet type not recognized...");
+		pr_warn("Packet type not recognized...\n");
 }
 
 /* sub-driver description */
@@ -414,16 +413,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/konica.c linux-3.0.82x/drivers/media/video/gspca/konica.c
--- linux-3.0.82/drivers/media/video/gspca/konica.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/konica.c	2017-09-23 03:42:49.454676787 +0800
@@ -28,6 +28,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "konica"
 
 #include <linux/input.h>
@@ -200,7 +202,7 @@
 			0,
 			1000);
 	if (ret < 0) {
-		err("reg_w err %d", ret);
+		pr_err("reg_w err %d\n", ret);
 		gspca_dev->usb_err = ret;
 	}
 }
@@ -221,7 +223,7 @@
 			2,
 			1000);
 	if (ret < 0) {
-		err("reg_w err %d", ret);
+		pr_err("reg_w err %d\n", ret);
 		gspca_dev->usb_err = ret;
 	}
 }
@@ -245,9 +247,6 @@
 	gspca_dev->cam.cam_mode = vga_mode;
 	gspca_dev->cam.nmodes = ARRAY_SIZE(vga_mode);
 	gspca_dev->cam.no_urb_create = 1;
-	/* The highest alt setting has an isoc packetsize of 0, so we
-	   don't want to use it */
-	gspca_dev->nbalt--;
 
 	sd->brightness  = BRIGHTNESS_DEFAULT;
 	sd->contrast    = CONTRAST_DEFAULT;
@@ -284,7 +283,7 @@
 	intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
 	alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
 	if (!alt) {
-		err("Couldn't get altsetting");
+		pr_err("Couldn't get altsetting\n");
 		return -EIO;
 	}
 
@@ -315,7 +314,7 @@
 			le16_to_cpu(alt->endpoint[i].desc.wMaxPacketSize);
 		urb = usb_alloc_urb(SD_NPKT, GFP_KERNEL);
 		if (!urb) {
-			err("usb_alloc_urb failed");
+			pr_err("usb_alloc_urb failed\n");
 			return -ENOMEM;
 		}
 		gspca_dev->urb[n] = urb;
@@ -324,7 +323,7 @@
 						GFP_KERNEL,
 						&urb->transfer_dma);
 		if (urb->transfer_buffer == NULL) {
-			err("usb_buffer_alloc failed");
+			pr_err("usb_buffer_alloc failed\n");
 			return -ENOMEM;
 		}
 
@@ -386,7 +385,7 @@
 		PDEBUG(D_ERR, "urb status: %d", urb->status);
 		st = usb_submit_urb(urb, GFP_ATOMIC);
 		if (st < 0)
-			err("resubmit urb error %d", st);
+			pr_err("resubmit urb error %d\n", st);
 		return;
 	}
 
@@ -477,7 +476,7 @@
 	}
 	st = usb_submit_urb(status_urb, GFP_ATOMIC);
 	if (st < 0)
-		err("usb_submit_urb(status_urb) ret %d", st);
+		pr_err("usb_submit_urb(status_urb) ret %d\n", st);
 }
 
 static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
@@ -632,15 +631,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/m5602/m5602_core.c linux-3.0.82x/drivers/media/video/gspca/m5602/m5602_core.c
--- linux-3.0.82/drivers/media/video/gspca/m5602/m5602_core.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/m5602/m5602_core.c	2017-09-23 03:42:49.458676774 +0800
@@ -16,6 +16,8 @@
  *
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #include "m5602_ov9650.h"
 #include "m5602_ov7660.h"
 #include "m5602_mt9m111.h"
@@ -25,8 +27,8 @@
 
 /* Kernel module parameters */
 int force_sensor;
-static int dump_bridge;
-int dump_sensor;
+static bool dump_bridge;
+bool dump_sensor;
 
 static const struct usb_device_id m5602_table[] = {
 	{USB_DEVICE(0x0402, 0x5602)},
@@ -192,10 +194,9 @@
 	for (i = 0; i < 0x80; i++) {
 		unsigned char val = 0;
 		m5602_read_bridge(sd, i, &val);
-		info("ALi m5602 address 0x%x contains 0x%x", i, val);
+		pr_info("ALi m5602 address 0x%x contains 0x%x\n", i, val);
 	}
-	info("Warning: The ALi m5602 webcam probably won't work "
-		"until it's power cycled");
+	pr_info("Warning: The ALi m5602 webcam probably won't work until it's power cycled\n");
 }
 
 static int m5602_probe_sensor(struct sd *sd)
@@ -231,7 +232,7 @@
 		return 0;
 
 	/* More sensor probe function goes here */
-	info("Failed to find a sensor");
+	pr_info("Failed to find a sensor\n");
 	sd->sensor = NULL;
 	return -ENODEV;
 }
@@ -403,19 +404,7 @@
 	.disconnect = m5602_disconnect
 };
 
-/* -- module insert / remove -- */
-static int __init mod_m5602_init(void)
-{
-	return usb_register(&sd_driver);
-}
-
-static void __exit mod_m5602_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(mod_m5602_init);
-module_exit(mod_m5602_exit);
+module_usb_driver(sd_driver);
 
 MODULE_AUTHOR(DRIVER_AUTHOR);
 MODULE_DESCRIPTION(DRIVER_DESC);
diff -uNra linux-3.0.82/drivers/media/video/gspca/m5602/m5602_mt9m111.c linux-3.0.82x/drivers/media/video/gspca/m5602/m5602_mt9m111.c
--- linux-3.0.82/drivers/media/video/gspca/m5602/m5602_mt9m111.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/m5602/m5602_mt9m111.c	2017-09-23 03:42:49.458676774 +0800
@@ -16,6 +16,8 @@
  *
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #include "m5602_mt9m111.h"
 
 static int mt9m111_set_vflip(struct gspca_dev *gspca_dev, __s32 val);
@@ -163,7 +165,7 @@
 
 	if (force_sensor) {
 		if (force_sensor == MT9M111_SENSOR) {
-			info("Forcing a %s sensor", mt9m111.name);
+			pr_info("Forcing a %s sensor\n", mt9m111.name);
 			goto sensor_found;
 		}
 		/* If we want to force another sensor, don't try to probe this
@@ -191,7 +193,7 @@
 		return -ENODEV;
 
 	if ((data[0] == 0x14) && (data[1] == 0x3a)) {
-		info("Detected a mt9m111 sensor");
+		pr_info("Detected a mt9m111 sensor\n");
 		goto sensor_found;
 	}
 
@@ -612,34 +614,34 @@
 {
 	u8 address, value[2] = {0x00, 0x00};
 
-	info("Dumping the mt9m111 register state");
+	pr_info("Dumping the mt9m111 register state\n");
 
-	info("Dumping the mt9m111 sensor core registers");
+	pr_info("Dumping the mt9m111 sensor core registers\n");
 	value[1] = MT9M111_SENSOR_CORE;
 	m5602_write_sensor(sd, MT9M111_PAGE_MAP, value, 2);
 	for (address = 0; address < 0xff; address++) {
 		m5602_read_sensor(sd, address, value, 2);
-		info("register 0x%x contains 0x%x%x",
-		     address, value[0], value[1]);
+		pr_info("register 0x%x contains 0x%x%x\n",
+			address, value[0], value[1]);
 	}
 
-	info("Dumping the mt9m111 color pipeline registers");
+	pr_info("Dumping the mt9m111 color pipeline registers\n");
 	value[1] = MT9M111_COLORPIPE;
 	m5602_write_sensor(sd, MT9M111_PAGE_MAP, value, 2);
 	for (address = 0; address < 0xff; address++) {
 		m5602_read_sensor(sd, address, value, 2);
-		info("register 0x%x contains 0x%x%x",
-		     address, value[0], value[1]);
+		pr_info("register 0x%x contains 0x%x%x\n",
+			address, value[0], value[1]);
 	}
 
-	info("Dumping the mt9m111 camera control registers");
+	pr_info("Dumping the mt9m111 camera control registers\n");
 	value[1] = MT9M111_CAMERA_CONTROL;
 	m5602_write_sensor(sd, MT9M111_PAGE_MAP, value, 2);
 	for (address = 0; address < 0xff; address++) {
 		m5602_read_sensor(sd, address, value, 2);
-		info("register 0x%x contains 0x%x%x",
-		     address, value[0], value[1]);
+		pr_info("register 0x%x contains 0x%x%x\n",
+			address, value[0], value[1]);
 	}
 
-	info("mt9m111 register state dump complete");
+	pr_info("mt9m111 register state dump complete\n");
 }
diff -uNra linux-3.0.82/drivers/media/video/gspca/m5602/m5602_mt9m111.h linux-3.0.82x/drivers/media/video/gspca/m5602/m5602_mt9m111.h
--- linux-3.0.82/drivers/media/video/gspca/m5602/m5602_mt9m111.h	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/m5602/m5602_mt9m111.h	2017-09-23 03:42:49.458676774 +0800
@@ -106,7 +106,7 @@
 
 /* Kernel module parameters */
 extern int force_sensor;
-extern int dump_sensor;
+extern bool dump_sensor;
 
 int mt9m111_probe(struct sd *sd);
 int mt9m111_init(struct sd *sd);
diff -uNra linux-3.0.82/drivers/media/video/gspca/m5602/m5602_ov7660.c linux-3.0.82x/drivers/media/video/gspca/m5602/m5602_ov7660.c
--- linux-3.0.82/drivers/media/video/gspca/m5602/m5602_ov7660.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/m5602/m5602_ov7660.c	2017-09-23 03:42:49.458676774 +0800
@@ -16,6 +16,8 @@
  *
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #include "m5602_ov7660.h"
 
 static int ov7660_get_gain(struct gspca_dev *gspca_dev, __s32 *val);
@@ -149,7 +151,7 @@
 
 	if (force_sensor) {
 		if (force_sensor == OV7660_SENSOR) {
-			info("Forcing an %s sensor", ov7660.name);
+			pr_info("Forcing an %s sensor\n", ov7660.name);
 			goto sensor_found;
 		}
 		/* If we want to force another sensor,
@@ -180,10 +182,10 @@
 	if (m5602_read_sensor(sd, OV7660_VER, &ver_id, 1))
 		return -ENODEV;
 
-	info("Sensor reported 0x%x%x", prod_id, ver_id);
+	pr_info("Sensor reported 0x%x%x\n", prod_id, ver_id);
 
 	if ((prod_id == 0x76) && (ver_id == 0x60)) {
-		info("Detected a ov7660 sensor");
+		pr_info("Detected a ov7660 sensor\n");
 		goto sensor_found;
 	}
 	return -ENODEV;
@@ -457,17 +459,16 @@
 static void ov7660_dump_registers(struct sd *sd)
 {
 	int address;
-	info("Dumping the ov7660 register state");
+	pr_info("Dumping the ov7660 register state\n");
 	for (address = 0; address < 0xa9; address++) {
 		u8 value;
 		m5602_read_sensor(sd, address, &value, 1);
-		info("register 0x%x contains 0x%x",
-		     address, value);
+		pr_info("register 0x%x contains 0x%x\n", address, value);
 	}
 
-	info("ov7660 register state dump complete");
+	pr_info("ov7660 register state dump complete\n");
 
-	info("Probing for which registers that are read/write");
+	pr_info("Probing for which registers that are read/write\n");
 	for (address = 0; address < 0xff; address++) {
 		u8 old_value, ctrl_value;
 		u8 test_value[2] = {0xff, 0xff};
@@ -477,9 +478,9 @@
 		m5602_read_sensor(sd, address, &ctrl_value, 1);
 
 		if (ctrl_value == test_value[0])
-			info("register 0x%x is writeable", address);
+			pr_info("register 0x%x is writeable\n", address);
 		else
-			info("register 0x%x is read only", address);
+			pr_info("register 0x%x is read only\n", address);
 
 		/* Restore original value */
 		m5602_write_sensor(sd, address, &old_value, 1);
diff -uNra linux-3.0.82/drivers/media/video/gspca/m5602/m5602_ov7660.h linux-3.0.82x/drivers/media/video/gspca/m5602/m5602_ov7660.h
--- linux-3.0.82/drivers/media/video/gspca/m5602/m5602_ov7660.h	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/m5602/m5602_ov7660.h	2017-09-23 03:42:49.458676774 +0800
@@ -86,7 +86,7 @@
 
 /* Kernel module parameters */
 extern int force_sensor;
-extern int dump_sensor;
+extern bool dump_sensor;
 
 int ov7660_probe(struct sd *sd);
 int ov7660_init(struct sd *sd);
diff -uNra linux-3.0.82/drivers/media/video/gspca/m5602/m5602_ov9650.c linux-3.0.82x/drivers/media/video/gspca/m5602/m5602_ov9650.c
--- linux-3.0.82/drivers/media/video/gspca/m5602/m5602_ov9650.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/m5602/m5602_ov9650.c	2017-09-23 03:42:49.462676763 +0800
@@ -16,6 +16,8 @@
  *
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #include "m5602_ov9650.h"
 
 static int ov9650_set_exposure(struct gspca_dev *gspca_dev, __s32 val);
@@ -299,7 +301,7 @@
 
 	if (force_sensor) {
 		if (force_sensor == OV9650_SENSOR) {
-			info("Forcing an %s sensor", ov9650.name);
+			pr_info("Forcing an %s sensor\n", ov9650.name);
 			goto sensor_found;
 		}
 		/* If we want to force another sensor,
@@ -330,7 +332,7 @@
 		return -ENODEV;
 
 	if ((prod_id == 0x96) && (ver_id == 0x52)) {
-		info("Detected an ov9650 sensor");
+		pr_info("Detected an ov9650 sensor\n");
 		goto sensor_found;
 	}
 	return -ENODEV;
@@ -850,17 +852,16 @@
 static void ov9650_dump_registers(struct sd *sd)
 {
 	int address;
-	info("Dumping the ov9650 register state");
+	pr_info("Dumping the ov9650 register state\n");
 	for (address = 0; address < 0xa9; address++) {
 		u8 value;
 		m5602_read_sensor(sd, address, &value, 1);
-		info("register 0x%x contains 0x%x",
-		     address, value);
+		pr_info("register 0x%x contains 0x%x\n", address, value);
 	}
 
-	info("ov9650 register state dump complete");
+	pr_info("ov9650 register state dump complete\n");
 
-	info("Probing for which registers that are read/write");
+	pr_info("Probing for which registers that are read/write\n");
 	for (address = 0; address < 0xff; address++) {
 		u8 old_value, ctrl_value;
 		u8 test_value[2] = {0xff, 0xff};
@@ -870,9 +871,9 @@
 		m5602_read_sensor(sd, address, &ctrl_value, 1);
 
 		if (ctrl_value == test_value[0])
-			info("register 0x%x is writeable", address);
+			pr_info("register 0x%x is writeable\n", address);
 		else
-			info("register 0x%x is read only", address);
+			pr_info("register 0x%x is read only\n", address);
 
 		/* Restore original value */
 		m5602_write_sensor(sd, address, &old_value, 1);
diff -uNra linux-3.0.82/drivers/media/video/gspca/m5602/m5602_ov9650.h linux-3.0.82x/drivers/media/video/gspca/m5602/m5602_ov9650.h
--- linux-3.0.82/drivers/media/video/gspca/m5602/m5602_ov9650.h	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/m5602/m5602_ov9650.h	2017-09-23 03:42:49.462676763 +0800
@@ -135,7 +135,7 @@
 
 /* Kernel module parameters */
 extern int force_sensor;
-extern int dump_sensor;
+extern bool dump_sensor;
 
 int ov9650_probe(struct sd *sd);
 int ov9650_init(struct sd *sd);
diff -uNra linux-3.0.82/drivers/media/video/gspca/m5602/m5602_po1030.c linux-3.0.82x/drivers/media/video/gspca/m5602/m5602_po1030.c
--- linux-3.0.82/drivers/media/video/gspca/m5602/m5602_po1030.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/m5602/m5602_po1030.c	2017-09-23 03:42:49.462676763 +0800
@@ -16,6 +16,8 @@
  *
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #include "m5602_po1030.h"
 
 static int po1030_get_exposure(struct gspca_dev *gspca_dev, __s32 *val);
@@ -197,7 +199,7 @@
 
 	if (force_sensor) {
 		if (force_sensor == PO1030_SENSOR) {
-			info("Forcing a %s sensor", po1030.name);
+			pr_info("Forcing a %s sensor\n", po1030.name);
 			goto sensor_found;
 		}
 		/* If we want to force another sensor, don't try to probe this
@@ -221,7 +223,7 @@
 		return -ENODEV;
 
 	if (dev_id_h == 0x30) {
-		info("Detected a po1030 sensor");
+		pr_info("Detected a po1030 sensor\n");
 		goto sensor_found;
 	}
 	return -ENODEV;
@@ -267,7 +269,7 @@
 			break;
 
 		default:
-			info("Invalid stream command, exiting init");
+			pr_info("Invalid stream command, exiting init\n");
 			return -EINVAL;
 		}
 	}
@@ -733,16 +735,15 @@
 	int address;
 	u8 value = 0;
 
-	info("Dumping the po1030 sensor core registers");
+	pr_info("Dumping the po1030 sensor core registers\n");
 	for (address = 0; address < 0x7f; address++) {
 		m5602_read_sensor(sd, address, &value, 1);
-		info("register 0x%x contains 0x%x",
-		     address, value);
+		pr_info("register 0x%x contains 0x%x\n", address, value);
 	}
 
-	info("po1030 register state dump complete");
+	pr_info("po1030 register state dump complete\n");
 
-	info("Probing for which registers that are read/write");
+	pr_info("Probing for which registers that are read/write\n");
 	for (address = 0; address < 0xff; address++) {
 		u8 old_value, ctrl_value;
 		u8 test_value[2] = {0xff, 0xff};
@@ -752,9 +753,9 @@
 		m5602_read_sensor(sd, address, &ctrl_value, 1);
 
 		if (ctrl_value == test_value[0])
-			info("register 0x%x is writeable", address);
+			pr_info("register 0x%x is writeable\n", address);
 		else
-			info("register 0x%x is read only", address);
+			pr_info("register 0x%x is read only\n", address);
 
 		/* Restore original value */
 		m5602_write_sensor(sd, address, &old_value, 1);
diff -uNra linux-3.0.82/drivers/media/video/gspca/m5602/m5602_po1030.h linux-3.0.82x/drivers/media/video/gspca/m5602/m5602_po1030.h
--- linux-3.0.82/drivers/media/video/gspca/m5602/m5602_po1030.h	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/m5602/m5602_po1030.h	2017-09-23 03:42:49.462676763 +0800
@@ -147,7 +147,7 @@
 
 /* Kernel module parameters */
 extern int force_sensor;
-extern int dump_sensor;
+extern bool dump_sensor;
 
 int po1030_probe(struct sd *sd);
 int po1030_init(struct sd *sd);
diff -uNra linux-3.0.82/drivers/media/video/gspca/m5602/m5602_s5k4aa.c linux-3.0.82x/drivers/media/video/gspca/m5602/m5602_s5k4aa.c
--- linux-3.0.82/drivers/media/video/gspca/m5602/m5602_s5k4aa.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/m5602/m5602_s5k4aa.c	2017-09-23 03:42:49.462676763 +0800
@@ -16,6 +16,8 @@
  *
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #include "m5602_s5k4aa.h"
 
 static int s5k4aa_get_exposure(struct gspca_dev *gspca_dev, __s32 *val);
@@ -240,7 +242,7 @@
 
 	if (force_sensor) {
 		if (force_sensor == S5K4AA_SENSOR) {
-			info("Forcing a %s sensor", s5k4aa.name);
+			pr_info("Forcing a %s sensor\n", s5k4aa.name);
 			goto sensor_found;
 		}
 		/* If we want to force another sensor, don't try to probe this
@@ -276,7 +278,7 @@
 						  data, 2);
 			break;
 		default:
-			info("Invalid stream command, exiting init");
+			pr_info("Invalid stream command, exiting init\n");
 			return -EINVAL;
 		}
 	}
@@ -292,7 +294,7 @@
 	if (memcmp(prod_id, expected_prod_id, sizeof(prod_id)))
 		return -ENODEV;
 	else
-		info("Detected a s5k4aa sensor");
+		pr_info("Detected a s5k4aa sensor\n");
 
 sensor_found:
 	sensor_settings = kmalloc(
@@ -347,7 +349,7 @@
 			break;
 
 			default:
-				err("Invalid stream command, exiting init");
+				pr_err("Invalid stream command, exiting init\n");
 				return -EINVAL;
 			}
 		}
@@ -383,7 +385,7 @@
 			break;
 
 			default:
-				err("Invalid stream command, exiting init");
+				pr_err("Invalid stream command, exiting init\n");
 				return -EINVAL;
 			}
 		}
@@ -447,7 +449,7 @@
 				init_s5k4aa[i][1], data, 2);
 			break;
 		default:
-			info("Invalid stream command, exiting init");
+			pr_info("Invalid stream command, exiting init\n");
 			return -EINVAL;
 		}
 	}
@@ -686,20 +688,21 @@
 	m5602_read_sensor(sd, S5K4AA_PAGE_MAP, &old_page, 1);
 	for (page = 0; page < 16; page++) {
 		m5602_write_sensor(sd, S5K4AA_PAGE_MAP, &page, 1);
-		info("Dumping the s5k4aa register state for page 0x%x", page);
+		pr_info("Dumping the s5k4aa register state for page 0x%x\n",
+			page);
 		for (address = 0; address <= 0xff; address++) {
 			u8 value = 0;
 			m5602_read_sensor(sd, address, &value, 1);
-			info("register 0x%x contains 0x%x",
-			     address, value);
+			pr_info("register 0x%x contains 0x%x\n",
+				address, value);
 		}
 	}
-	info("s5k4aa register state dump complete");
+	pr_info("s5k4aa register state dump complete\n");
 
 	for (page = 0; page < 16; page++) {
 		m5602_write_sensor(sd, S5K4AA_PAGE_MAP, &page, 1);
-		info("Probing for which registers that are "
-		     "read/write for page 0x%x", page);
+		pr_info("Probing for which registers that are read/write for page 0x%x\n",
+			page);
 		for (address = 0; address <= 0xff; address++) {
 			u8 old_value, ctrl_value, test_value = 0xff;
 
@@ -708,14 +711,16 @@
 			m5602_read_sensor(sd, address, &ctrl_value, 1);
 
 			if (ctrl_value == test_value)
-				info("register 0x%x is writeable", address);
+				pr_info("register 0x%x is writeable\n",
+					address);
 			else
-				info("register 0x%x is read only", address);
+				pr_info("register 0x%x is read only\n",
+					address);
 
 			/* Restore original value */
 			m5602_write_sensor(sd, address, &old_value, 1);
 		}
 	}
-	info("Read/write register probing complete");
+	pr_info("Read/write register probing complete\n");
 	m5602_write_sensor(sd, S5K4AA_PAGE_MAP, &old_page, 1);
 }
diff -uNra linux-3.0.82/drivers/media/video/gspca/m5602/m5602_s5k4aa.h linux-3.0.82x/drivers/media/video/gspca/m5602/m5602_s5k4aa.h
--- linux-3.0.82/drivers/media/video/gspca/m5602/m5602_s5k4aa.h	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/m5602/m5602_s5k4aa.h	2017-09-23 03:42:49.462676763 +0800
@@ -65,7 +65,7 @@
 
 /* Kernel module parameters */
 extern int force_sensor;
-extern int dump_sensor;
+extern bool dump_sensor;
 
 int s5k4aa_probe(struct sd *sd);
 int s5k4aa_init(struct sd *sd);
diff -uNra linux-3.0.82/drivers/media/video/gspca/m5602/m5602_s5k83a.c linux-3.0.82x/drivers/media/video/gspca/m5602/m5602_s5k83a.c
--- linux-3.0.82/drivers/media/video/gspca/m5602/m5602_s5k83a.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/m5602/m5602_s5k83a.c	2017-09-23 03:42:49.466676750 +0800
@@ -16,6 +16,8 @@
  *
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #include <linux/kthread.h>
 #include "m5602_s5k83a.h"
 
@@ -135,7 +137,7 @@
 
 	if (force_sensor) {
 		if (force_sensor == S5K83A_SENSOR) {
-			info("Forcing a %s sensor", s5k83a.name);
+			pr_info("Forcing a %s sensor\n", s5k83a.name);
 			goto sensor_found;
 		}
 		/* If we want to force another sensor, don't try to probe this
@@ -168,7 +170,7 @@
 	if ((prod_id == 0xff) || (ver_id == 0xff))
 		return -ENODEV;
 	else
-		info("Detected a s5k83a sensor");
+		pr_info("Detected a s5k83a sensor\n");
 
 sensor_found:
 	sens_priv = kmalloc(
@@ -227,7 +229,7 @@
 				init_s5k83a[i][1], data, 2);
 			break;
 		default:
-			info("Invalid stream command, exiting init");
+			pr_info("Invalid stream command, exiting init\n");
 			return -EINVAL;
 		}
 	}
@@ -273,7 +275,7 @@
 		s5k83a_get_rotation(sd, &reg);
 		if (previous_rotation != reg) {
 			previous_rotation = reg;
-			info("Camera was flipped");
+			pr_info("Camera was flipped\n");
 
 			s5k83a_get_vflip((struct gspca_dev *) sd, &vflip);
 			s5k83a_get_hflip((struct gspca_dev *) sd, &hflip);
@@ -566,20 +568,20 @@
 
 	for (page = 0; page < 16; page++) {
 		m5602_write_sensor(sd, S5K83A_PAGE_MAP, &page, 1);
-		info("Dumping the s5k83a register state for page 0x%x", page);
+		pr_info("Dumping the s5k83a register state for page 0x%x\n",
+			page);
 		for (address = 0; address <= 0xff; address++) {
 			u8 val = 0;
 			m5602_read_sensor(sd, address, &val, 1);
-			info("register 0x%x contains 0x%x",
-			     address, val);
+			pr_info("register 0x%x contains 0x%x\n", address, val);
 		}
 	}
-	info("s5k83a register state dump complete");
+	pr_info("s5k83a register state dump complete\n");
 
 	for (page = 0; page < 16; page++) {
 		m5602_write_sensor(sd, S5K83A_PAGE_MAP, &page, 1);
-		info("Probing for which registers that are read/write "
-				"for page 0x%x", page);
+		pr_info("Probing for which registers that are read/write for page 0x%x\n",
+			page);
 		for (address = 0; address <= 0xff; address++) {
 			u8 old_val, ctrl_val, test_val = 0xff;
 
@@ -588,14 +590,16 @@
 			m5602_read_sensor(sd, address, &ctrl_val, 1);
 
 			if (ctrl_val == test_val)
-				info("register 0x%x is writeable", address);
+				pr_info("register 0x%x is writeable\n",
+					address);
 			else
-				info("register 0x%x is read only", address);
+				pr_info("register 0x%x is read only\n",
+					address);
 
 			/* Restore original val */
 			m5602_write_sensor(sd, address, &old_val, 1);
 		}
 	}
-	info("Read/write register probing complete");
+	pr_info("Read/write register probing complete\n");
 	m5602_write_sensor(sd, S5K83A_PAGE_MAP, &old_page, 1);
 }
diff -uNra linux-3.0.82/drivers/media/video/gspca/m5602/m5602_s5k83a.h linux-3.0.82x/drivers/media/video/gspca/m5602/m5602_s5k83a.h
--- linux-3.0.82/drivers/media/video/gspca/m5602/m5602_s5k83a.h	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/m5602/m5602_s5k83a.h	2017-09-23 03:42:49.466676750 +0800
@@ -41,7 +41,7 @@
 
 /* Kernel module parameters */
 extern int force_sensor;
-extern int dump_sensor;
+extern bool dump_sensor;
 
 int s5k83a_probe(struct sd *sd);
 int s5k83a_init(struct sd *sd);
diff -uNra linux-3.0.82/drivers/media/video/gspca/mars.c linux-3.0.82x/drivers/media/video/gspca/mars.c
--- linux-3.0.82/drivers/media/video/gspca/mars.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/mars.c	2017-09-23 03:42:49.466676750 +0800
@@ -1,8 +1,8 @@
 /*
  *		Mars-Semi MR97311A library
- *		Copyright (C) 2005 <bradlch@hotmail.com>
  *
- * V4L2 by Jean-Francois Moine <http://moinejf.free.fr>
+ * Copyright (C) 2009-2011 Jean-Francois Moine (http://moinejf.free.fr)
+ * Copyright (C) 2005 <bradlch@hotmail.com>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -19,12 +19,14 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "mars"
 
 #include "gspca.h"
 #include "jpeg.h"
 
-MODULE_AUTHOR("Michel Xhaard <mxhaard@users.sourceforge.net>");
+MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
 MODULE_DESCRIPTION("GSPCA/Mars USB Camera Driver");
 MODULE_LICENSE("GPL");
 
@@ -178,8 +180,8 @@
 			&alen,
 			500);	/* timeout in milliseconds */
 	if (ret < 0) {
-		err("reg write [%02x] error %d",
-			gspca_dev->usb_buf[0], ret);
+		pr_err("reg write [%02x] error %d\n",
+		       gspca_dev->usb_buf[0], ret);
 		gspca_dev->usb_err = ret;
 	}
 }
@@ -261,7 +263,6 @@
 	cam->nmodes = ARRAY_SIZE(vga_mode);
 	cam->ctrls = sd->ctrls;
 	sd->quality = QUALITY_DEF;
-	gspca_dev->nbalt = 9;		/* use the altsetting 08 */
 	return 0;
 }
 
@@ -515,15 +516,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/mr97310a.c linux-3.0.82x/drivers/media/video/gspca/mr97310a.c
--- linux-3.0.82/drivers/media/video/gspca/mr97310a.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/mr97310a.c	2017-09-23 03:42:49.466676750 +0800
@@ -40,6 +40,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "mr97310a"
 
 #include "gspca.h"
@@ -267,7 +269,7 @@
 			  usb_sndbulkpipe(gspca_dev->dev, 4),
 			  gspca_dev->usb_buf, len, NULL, 500);
 	if (rc < 0)
-		err("reg write [%02x] error %d",
+		pr_err("reg write [%02x] error %d\n",
 		       gspca_dev->usb_buf[0], rc);
 	return rc;
 }
@@ -281,7 +283,7 @@
 			  usb_rcvbulkpipe(gspca_dev->dev, 3),
 			  gspca_dev->usb_buf, len, NULL, 500);
 	if (rc < 0)
-		err("reg read [%02x] error %d",
+		pr_err("reg read [%02x] error %d\n",
 		       gspca_dev->usb_buf[0], rc);
 	return rc;
 }
@@ -540,7 +542,7 @@
 			sd->sensor_type = 1;
 			break;
 		default:
-			err("Unknown CIF Sensor id : %02x",
+			pr_err("Unknown CIF Sensor id : %02x\n",
 			       gspca_dev->usb_buf[1]);
 			return -ENODEV;
 		}
@@ -575,10 +577,10 @@
 			sd->sensor_type = 2;
 		} else if ((gspca_dev->usb_buf[0] != 0x03) &&
 					(gspca_dev->usb_buf[0] != 0x04)) {
-			err("Unknown VGA Sensor id Byte 0: %02x",
-					gspca_dev->usb_buf[0]);
-			err("Defaults assumed, may not work");
-			err("Please report this");
+			pr_err("Unknown VGA Sensor id Byte 0: %02x\n",
+			       gspca_dev->usb_buf[0]);
+			pr_err("Defaults assumed, may not work\n");
+			pr_err("Please report this\n");
 		}
 		/* Sakar Digital color needs to be adjusted. */
 		if ((gspca_dev->usb_buf[0] == 0x03) &&
@@ -595,10 +597,10 @@
 				/* Nothing to do here. */
 				break;
 			default:
-				err("Unknown VGA Sensor id Byte 1: %02x",
-					gspca_dev->usb_buf[1]);
-				err("Defaults assumed, may not work");
-				err("Please report this");
+				pr_err("Unknown VGA Sensor id Byte 1: %02x\n",
+				       gspca_dev->usb_buf[1]);
+				pr_err("Defaults assumed, may not work\n");
+				pr_err("Please report this\n");
 			}
 		}
 		PDEBUG(D_PROBE, "MR97310A VGA camera detected, sensor: %d",
@@ -1257,15 +1259,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/nw80x.c linux-3.0.82x/drivers/media/video/gspca/nw80x.c
--- linux-3.0.82/drivers/media/video/gspca/nw80x.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/nw80x.c	2017-09-23 03:42:49.470676738 +0800
@@ -20,6 +20,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "nw80x"
 
 #include "gspca.h"
@@ -32,6 +34,7 @@
 
 /* controls */
 enum e_ctrl {
+	BRIGHTNESS,
 	GAIN,
 	EXPOSURE,
 	AUTOGAIN,
@@ -629,6 +632,13 @@
 	0x04, 0x06, 0x01, 0xc3,
 	0x04, 0x05, 0x01, 0x40,
 	0x04, 0x04, 0x01, 0x40,
+
+	0x00, 0x91, 0x02, 0x60, 0x02,	/* exposure */
+	0x00, 0x03, 0x02, 0xca, 0x01,
+	0x05, 0x02, 0x01, 0x02,		/* SIF - length = 2 bytes */
+	0x06, 0x00, 0x02, 0xc0, 0x70,	/* ?? / gain */
+	0x05, 0x05, 0x01, 0x20,
+	0x05, 0x05, 0x01, 0x21,		/* SIF - write */
 	0, 0, 0
 };
 /* et31x110 - pas106 - other Trust SpaceCam120 */
@@ -1571,7 +1581,7 @@
 			len,
 			500);
 	if (ret < 0) {
-		err("reg_w err %d", ret);
+		pr_err("reg_w err %d\n", ret);
 		gspca_dev->usb_err = ret;
 	}
 }
@@ -1592,7 +1602,7 @@
 			0x00, index,
 			gspca_dev->usb_buf, len, 500);
 	if (ret < 0) {
-		err("reg_r err %d", ret);
+		pr_err("reg_r err %d\n", ret);
 		gspca_dev->usb_err = ret;
 		return;
 	}
@@ -1665,6 +1675,34 @@
 	return r;
 }
 
+static void setbrightness(struct gspca_dev *gspca_dev)
+{
+	struct sd *sd = (struct sd *) gspca_dev;
+	u8 lut[17];
+	int i, brightness, v;
+	static const u8 lut_spacecam[17] = {
+		0x00, 0x28, 0x3d, 0x4c, 0x5a, 0x65, 0x6f, 0x79,
+		0x82, 0x8a, 0x91, 0x99, 0x9f, 0x9f, 0x9f, 0x9f,
+		0x9f
+	};
+
+	switch (sd->webcam) {
+	case SpaceCam:
+		/* 0..253 -> 0..506 */
+		brightness = sd->ctrls[BRIGHTNESS].val * 2;
+		for (i = 0; i < sizeof lut; i++) {
+			v = lut_spacecam[i] * brightness
+				/ lut_spacecam[sizeof lut - 1];
+			if (v > 0xf9)
+				v = 0xf9;
+			lut[i] = v;
+		}
+		reg_w(gspca_dev, 0x1041, lut, sizeof lut);
+/*fixme: 1048 for nw801*/
+		break;
+	}
+}
+
 static void setgain(struct gspca_dev *gspca_dev)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
@@ -1685,6 +1723,19 @@
 		v[1] = val >> 5;
 		reg_w(gspca_dev, 0x101d, v, 2);	/* SIF reg0/1 (AGC) */
 		break;
+#if 0
+	case SpaceCam:
+		v[0] = 0x02;			/* SIF 2 bytes */
+		reg_w(gspca_dev, 0x0502, v, 1);
+		v[0] = 0x04;			/* ?? */
+		v[1] = val;
+		reg_w(gspca_dev, 0x0600, v, 2);
+		v[0] = 0x20;
+		reg_w(gspca_dev, 0x0505, v, 1);
+		v[0] = 0x21;			/* SIF write */
+		reg_w(gspca_dev, 0x0505, v, 1);
+		break;
+#endif
 	}
 }
 
@@ -1708,6 +1759,16 @@
 		v[1] = val >> 8;
 		reg_w(gspca_dev, 0x101b, v, 2);
 		break;
+	case SpaceCam:
+		val = val * 2 + 0x132;
+		v[0] = val;
+		v[1] = val >> 8;
+		reg_w(gspca_dev, 0x0091, v, 2);
+		val = 0x1b5;		/* fixme */
+		v[0] = val;
+		v[1] = val >> 8;
+		reg_w(gspca_dev, 0x0003, v, 2);
+		break;
 	}
 }
 
@@ -1761,8 +1822,8 @@
 	if ((unsigned) webcam >= NWEBCAMS)
 		webcam = 0;
 	sd->webcam = webcam;
-	gspca_dev->cam.reverse_alts = 1;
 	gspca_dev->cam.ctrls = sd->ctrls;
+	gspca_dev->cam.needs_full_bandwidth = 1;
 	sd->ag_cnt = -1;
 
 	/*
@@ -1802,7 +1863,8 @@
 		}
 	}
 	if (webcam_chip[sd->webcam] != sd->bridge) {
-		err("Bad webcam type %d for NW80%d", sd->webcam, sd->bridge);
+		pr_err("Bad webcam type %d for NW80%d\n",
+		       sd->webcam, sd->bridge);
 		gspca_dev->usb_err = -ENODEV;
 		return gspca_dev->usb_err;
 	}
@@ -1848,6 +1910,14 @@
 		sd->ctrls[EXPOSURE].max = 315;
 		sd->ctrls[EXPOSURE].def = 150;
 		break;
+	case SpaceCam:
+#if 0
+		sd->ctrls[GAIN].def = 180;
+#endif
+		sd->ctrls[EXPOSURE].max = 358;
+		sd->ctrls[EXPOSURE].def = 150;
+		gspca_dev->ctrl_dis = (1 << GAIN) | (1 << AUTOGAIN);
+		break;
 	default:
 		gspca_dev->ctrl_dis = (1 << GAIN) | (1 << EXPOSURE)
 					 | (1 << AUTOGAIN);
@@ -1858,6 +1928,9 @@
 	if (!(gspca_dev->ctrl_dis & (1 << AUTOGAIN)))
 		gspca_dev->ctrl_inac = (1 << GAIN) | (1 << EXPOSURE);
 #endif
+	if (sd->webcam != SpaceCam)
+		gspca_dev->ctrl_dis |= (1 << BRIGHTNESS);
+
 	return gspca_dev->usb_err;
 }
 
@@ -1922,6 +1995,7 @@
 		break;
 	}
 
+	setbrightness(gspca_dev);
 	setgain(gspca_dev);
 	setexposure(gspca_dev);
 	setautogain(gspca_dev);
@@ -2029,6 +2103,18 @@
 
 /* V4L2 controls supported by the driver */
 static const struct ctrl sd_ctrls[NCTRLS] = {
+[BRIGHTNESS] = {
+	    {
+		.id      = V4L2_CID_BRIGHTNESS,
+		.type    = V4L2_CTRL_TYPE_INTEGER,
+		.name    = "Brightness",
+		.minimum = 0,
+		.maximum = 253,
+		.step    = 1,
+		.default_value = 80
+	    },
+	    .set_control = setbrightness
+	},
 [GAIN] = {
 	    {
 		.id      = V4L2_CID_GAIN,
@@ -2112,21 +2198,11 @@
 #ifdef CONFIG_PM
 	.suspend = gspca_suspend,
 	.resume = gspca_resume,
+	.reset_resume = gspca_resume,
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
 
 module_param(webcam, int, 0644);
 MODULE_PARM_DESC(webcam,
diff -uNra linux-3.0.82/drivers/media/video/gspca/ov519.c linux-3.0.82x/drivers/media/video/gspca/ov519.c
--- linux-3.0.82/drivers/media/video/gspca/ov519.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/ov519.c	2017-09-23 03:42:49.474676726 +0800
@@ -36,7 +36,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  *
  */
-#define MODULE_NAME "ov519"
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 
 #include <linux/input.h>
 #include "gspca.h"
@@ -50,9 +51,6 @@
 MODULE_DESCRIPTION("OV519 USB Camera Driver");
 MODULE_LICENSE("GPL");
 
-/* global parameters */
-static int frame_rate;
-
 /* Number of times to retry a failed I2C transaction. Increase this if you
  * are getting "Failed to read sensor ID..." */
 static int i2c_detect_tries = 10;
@@ -134,6 +132,7 @@
 	SEN_OV7670,
 	SEN_OV76BE,
 	SEN_OV8610,
+	SEN_OV9600,
 };
 
 /* Note this is a bit of a hack, but the w9968cf driver needs the code for all
@@ -185,7 +184,7 @@
 		.minimum = 0,
 		.maximum = 255,
 		.step    = 1,
-		.default_value = 127,
+		.default_value = 67,
 	    },
 	    .set_control = setexposure,
 	},
@@ -340,6 +339,10 @@
 			(1 << EXPOSURE) |
 			(1 << AUTOGAIN) |
 			(1 << FREQ),
+[SEN_OV9600] =		((1 << NCTRL) - 1)	/* no control */
+			^ ((1 << EXPOSURE)	/* but exposure */
+			 | (1 << AUTOGAIN)),	/* and autogain */
+
 };
 
 static const struct v4l2_pix_format ov519_vga_mode[] = {
@@ -525,6 +528,44 @@
 		.colorspace = V4L2_COLORSPACE_SRGB,
 		.priv = 0},
 };
+static const struct v4l2_pix_format ovfx2_ov9600_mode[] = {
+	{640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
+		.bytesperline = 640,
+		.sizeimage = 640 * 480,
+		.colorspace = V4L2_COLORSPACE_SRGB,
+		.priv = 1},
+	{1280, 1024, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
+		.bytesperline = 1280,
+		.sizeimage = 1280 * 1024,
+		.colorspace = V4L2_COLORSPACE_SRGB},
+};
+
+/* frame rate table */
+/* the table is indexed by the video mode,
+ * so, it must have the size of the biggest format table (5) */
+static const u8 all_rates[] = {30, 25, 20, 15, 10, 5};
+static const struct framerates framerates[] = {
+	{
+		.rates = all_rates,
+		.nrates = ARRAY_SIZE(all_rates),
+	},
+	{
+		.rates = all_rates,
+		.nrates = ARRAY_SIZE(all_rates),
+	},
+	{
+		.rates = all_rates,
+		.nrates = ARRAY_SIZE(all_rates),
+	},
+	{
+		.rates = all_rates,
+		.nrates = ARRAY_SIZE(all_rates),
+	},
+	{
+		.rates = all_rates,
+		.nrates = ARRAY_SIZE(all_rates),
+	},
+};
 
 /* Registers common to OV511 / OV518 */
 #define R51x_FIFO_PSIZE			0x30	/* 2 bytes wide w/ OV518(+) */
@@ -737,7 +778,7 @@
 	{0x2d, 0x00},	/* 60 Hz filter */
 	{0x24, 0xb0},	/* normal colors */
 	{0x25, 0x90},
-	{0x10, 0x43},
+	{0x10, 0x43},	/* exposure */
 };
 
 static const struct ov_i2c_regvals norm_3620b[] = {
@@ -1807,14 +1848,57 @@
 			| OV7670_COM8_AEC},
 	{0xa1, 0xc8}
 };
+static const struct ov_i2c_regvals norm_9600[] = {
+	{0x12, 0x80},
+	{0x0c, 0x28},
+	{0x11, 0x80},
+	{0x13, 0xb5},
+	{0x14, 0x3e},
+	{0x1b, 0x04},
+	{0x24, 0xb0},
+	{0x25, 0x90},
+	{0x26, 0x94},
+	{0x35, 0x90},
+	{0x37, 0x07},
+	{0x38, 0x08},
+	{0x01, 0x8e},
+	{0x02, 0x85}
+};
 
 /* 7670. Defaults taken from OmniVision provided data,
-*  as provided by Jonathan Corbet of OLPC		*/
+ * as provided by Jonathan Corbet of OLPC
+ * Updated by JF Moine from 7670530.set */
+static const struct ov_regvals init_519_ov7670[] = {
+	{ 0x5d,	0x03 }, /* Turn off suspend mode */
+//	{ 0x53,	0x9b }, /* 0x9f enables the (unused) microcontroller */
+//jfm test
+	{ 0x53,	0x9f },
+	{ OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
+	{ 0xa2,	0x20 }, /* a2-a5 are undocumented */
+	{ 0xa3,	0x18 },
+//	{ 0xa4,	0x04 },
+//	{ 0xa5,	0x28 },
+	{ 0x37,	0x00 },	/* SetUsbInit */
+	{ 0x55,	0x02 }, /* 4.096 Mhz audio clock */
+	{0x59, 0x04},			/* jfm */
+	/* Enable both fields, YUV Input, disable defect comp (why?) */
+	{ 0x20,	0x0c },	/* 0x0d swaps U <-> V */
+	{ 0x21,	0x38 },
+	{ 0x22,	0x1d },
+	{ 0x17,	0x50 }, /* undocumented */
+	{ 0x37,	0x00 }, /* undocumented */
+	{ 0x40,	0xff }, /* I2C timeout counter */
+	{ 0x46,	0x00 }, /* I2C clock prescaler */
+//	{0xa0, 0x3f},			/* jfm */
+//	{ 0x59,	0x04 },	/* new from windrv 090403 */
+//test
+	{ 0xff,	0x00 }, /* undocumented */
+	};
 static const struct ov_i2c_regvals norm_7670[] = {
 	{ OV7670_R12_COM7, OV7670_COM7_RESET },
+	{ OV7670_R11_CLKRC, 0x01 },		/* jfm */
 	{ OV7670_R3A_TSLB, 0x04 },		/* OV */
 	{ OV7670_R12_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
-	{ OV7670_R11_CLKRC, 0x01 },
 /*
  * Set the hardware window.  These values from OV don't entirely
  * make sense - hstop is less than hstart.  But they work...
@@ -1862,6 +1946,7 @@
 	{ OV7670_R00_GAIN, 0x00 },
 	{ OV7670_R10_AECH, 0x00 },
 	{ OV7670_R0D_COM4, 0x40 }, /* magic reserved bit */
+//	{ OV7670_R14_COM9, 0x38 }, /* 4x gain + magic rsvd bit - jfm was 18 */
 	{ OV7670_R14_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
 	{ OV7670_RA5_BD50MAX, 0x05 },
 	{ OV7670_RAB_BD60MAX, 0x07 },
@@ -1870,7 +1955,8 @@
 	{ OV7670_R26_VPT, 0xe3 },
 	{ OV7670_R9F_HAECC1, 0x78 },
 	{ OV7670_RA0_HAECC2, 0x68 },
-	{ 0xa1, 0x03 }, /* magic */
+//	{ 0xa1, 0x0b },			/* magic - jfm was 03 */
+	{ 0xa1, 0x03 },			/* magic */
 	{ OV7670_RA6_HAECC3, 0xd8 },
 	{ OV7670_RA7_HAECC4, 0xd8 },
 	{ OV7670_RA8_HAECC5, 0xf0 },
@@ -1886,20 +1972,25 @@
 	{ OV7670_R0E_COM5, 0x61 },
 	{ OV7670_R0F_COM6, 0x4b },
 	{ 0x16, 0x02 },
-	{ OV7670_R1E_MVFP, 0x07 },
+/*	{ OV7670_R1E_MVFP, 0x07 },	 * jfm */
 	{ 0x21, 0x02 },
 	{ 0x22, 0x91 },
 	{ 0x29, 0x07 },
+//	{ 0x33, 0x03 },			/* jfm was 0b */
 	{ 0x33, 0x0b },
 	{ 0x35, 0x0b },
+//	{ 0x37, 0x1c },			/* jfm was 1d */
 	{ 0x37, 0x1d },
 	{ 0x38, 0x71 },
+/*	{ 0x39, 0x2a },			 * jfm --fixme*/
 	{ 0x39, 0x2a },
 	{ OV7670_R3C_COM12, 0x78 },
 	{ 0x4d, 0x40 },
 	{ 0x4e, 0x20 },
+//	{ OV7670_R69_GFIX, 0x55 },	/* jfm was 00 */
 	{ OV7670_R69_GFIX, 0x00 },
 	{ 0x6b, 0x4a },
+//	{ 0x74, 0x19 },			/* jfm was 10 */
 	{ 0x74, 0x10 },
 	{ 0x8d, 0x4f },
 	{ 0x8e, 0x00 },
@@ -1907,7 +1998,9 @@
 	{ 0x90, 0x00 },
 	{ 0x91, 0x00 },
 	{ 0x96, 0x00 },
+//	{ 0x9a, 0x80 },			/* jfm was 00 */
 	{ 0x9a, 0x00 },
+//	{ 0xb0, 0x8c },			/* jfm was 84 */
 	{ 0xb0, 0x84 },
 	{ 0xb1, 0x0c },
 	{ 0xb2, 0x0e },
@@ -1915,6 +2008,7 @@
 	{ 0xb8, 0x0a },
 
 /* More reserved magic, some of which tweaks white balance */
+//	{ 0x43, 0x14 },			/* jfm was 0a */
 	{ 0x43, 0x0a },
 	{ 0x44, 0xf0 },
 	{ 0x45, 0x34 },
@@ -1933,7 +2027,8 @@
 	{ 0x6f, 0x9f },			/* "9e for advance AWB" */
 	{ 0x6a, 0x40 },
 	{ OV7670_R01_BLUE, 0x40 },
-	{ OV7670_R02_RED, 0x60 },
+	{ OV7670_R02_RED, 0x40 },		/* jfm was 60 */
+//	{ OV7670_R02_RED, 0x60 },
 	{ OV7670_R13_COM8, OV7670_COM8_FASTAEC
 			| OV7670_COM8_AECSTEP
 			| OV7670_COM8_BFILT
@@ -1952,7 +2047,10 @@
 
 	{ OV7670_R41_COM16, OV7670_COM16_AWBGAIN },
 	{ OV7670_R3F_EDGE, 0x00 },
-	{ 0x75, 0x05 },
+//fixme: R3f = sharpness - a mettre a 04
+//	{ 0x75, 0x05 },
+	{ 0x75, 0x04 },			/* jfm "lower Sharpness a little" */
+//	{ 0x76, 0x61 },			/* jfm was e1 */
 	{ 0x76, 0xe1 },
 	{ 0x4c, 0x00 },
 	{ 0x77, 0x01 },
@@ -1963,13 +2061,17 @@
 	{ 0xc9, 0x60 },
 	{ OV7670_R41_COM16, 0x38 },
 	{ 0x56, 0x40 },
-
+	{OV7670_R1E_MVFP, 0x01},	/* jfm */
 	{ 0x34, 0x11 },
-	{ OV7670_R3B_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
+	{ OV7670_R3B_COM11, OV7670_COM11_EXP | OV7670_COM11_HZAUTO},
+//	{ OV7670_R3B_COM11, OV7670_COM11_EXP | 0xc0},
+					/* jfm "enable Night mode; fps/4" */
 	{ 0xa4, 0x88 },
+//	{ 0xa4, 0x89 },		/* jfm "Night mode trigger point at 4x Gain" */
 	{ 0x96, 0x00 },
 	{ 0x97, 0x30 },
 	{ 0x98, 0x20 },
+//	{ 0x99, 0x20 },			/* jfm was 30 */
 	{ 0x99, 0x30 },
 	{ 0x9a, 0x84 },
 	{ 0x9b, 0x29 },
@@ -1982,15 +2084,17 @@
 	{ 0x79, 0x01 },
 	{ 0xc8, 0xf0 },
 	{ 0x79, 0x0f },
+//	{ 0xc8, 0x20 },			/* jfm was 00 */
 	{ 0xc8, 0x00 },
 	{ 0x79, 0x10 },
 	{ 0xc8, 0x7e },
-	{ 0x79, 0x0a },
-	{ 0xc8, 0x80 },
+/*	{ 0x79, 0x0a },			 * jfm */
+/*	{ 0xc8, 0x80 },			 * jfm */
 	{ 0x79, 0x0b },
 	{ 0xc8, 0x01 },
 	{ 0x79, 0x0c },
-	{ 0xc8, 0x0f },
+	{ 0xc8, 0x07 },			/* jfm was 0f */
+//	{ 0xc8, 0x0f },
 	{ 0x79, 0x0d },
 	{ 0xc8, 0x20 },
 	{ 0x79, 0x09 },
@@ -2139,7 +2243,7 @@
 			sd->gspca_dev.usb_buf, 1, 500);
 leave:
 	if (ret < 0) {
-		err("reg_w %02x failed %d", index, ret);
+		pr_err("reg_w %02x failed %d\n", index, ret);
 		sd->gspca_dev.usb_err = ret;
 		return;
 	}
@@ -2178,7 +2282,7 @@
 		PDEBUG(D_USBI, "GET %02x 0000 %04x %02x",
 			req, index, ret);
 	} else {
-		err("reg_r %02x failed %d", index, ret);
+		pr_err("reg_r %02x failed %d\n", index, ret);
 		sd->gspca_dev.usb_err = ret;
 	}
 
@@ -2203,7 +2307,7 @@
 	if (ret >= 0) {
 		ret = sd->gspca_dev.usb_buf[0];
 	} else {
-		err("reg_r8 %02x failed %d", index, ret);
+		pr_err("reg_r8 %02x failed %d\n", index, ret);
 		sd->gspca_dev.usb_err = ret;
 	}
 
@@ -2256,7 +2360,7 @@
 			0, index,
 			sd->gspca_dev.usb_buf, n, 500);
 	if (ret < 0) {
-		err("reg_w32 %02x failed %d", index, ret);
+		pr_err("reg_w32 %02x failed %d\n", index, ret);
 		sd->gspca_dev.usb_err = ret;
 	}
 }
@@ -2400,9 +2504,12 @@
 
 	/* Initiate 2-byte write cycle */
 	reg_w(sd, R518_I2C_CTL, 0x03);
+	reg_r8(sd, R518_I2C_CTL);
 
 	/* Initiate 2-byte read cycle */
 	reg_w(sd, R518_I2C_CTL, 0x05);
+	reg_r8(sd, R518_I2C_CTL);
+
 	value = reg_r(sd, R51x_I2C_DATA);
 	PDEBUG(D_USBI, "ov518_i2c_r %02x %02x", reg, value);
 	return value;
@@ -2422,11 +2529,9 @@
 			(u16) value, (u16) reg, NULL, 0, 500);
 
 	if (ret < 0) {
-		err("ovfx2_i2c_w %02x failed %d", reg, ret);
+		pr_err("ovfx2_i2c_w %02x failed %d\n", reg, ret);
 		sd->gspca_dev.usb_err = ret;
 	}
-
-	PDEBUG(D_USBO, "ovfx2_i2c_w %02x %02x", reg, value);
 }
 
 static int ovfx2_i2c_r(struct sd *sd, u8 reg)
@@ -2446,7 +2551,7 @@
 		ret = sd->gspca_dev.usb_buf[0];
 		PDEBUG(D_USBI, "ovfx2_i2c_r %02x %02x", reg, ret);
 	} else {
-		err("ovfx2_i2c_r %02x failed %d", reg, ret);
+		pr_err("ovfx2_i2c_r %02x failed %d\n", reg, ret);
 		sd->gspca_dev.usb_err = ret;
 	}
 
@@ -2456,7 +2561,11 @@
 static void i2c_w(struct sd *sd, u8 reg, u8 value)
 {
 	if (sd->sensor_reg_cache[reg] == value)
+//fixme:test
+{
+PDEBUG(D_USBO, "i2c_w %02x %02x (cached)", reg, value);
 		return;
+}
 
 	switch (sd->bridge) {
 	case BRIDGE_OV511:
@@ -2686,13 +2795,13 @@
  *
  ***************************************************************************/
 
-/* This initializes the OV2x10 / OV3610 / OV3620 */
+/* This initializes the OV2x10 / OV3610 / OV3620 / OV9600 */
 static void ov_hires_configure(struct sd *sd)
 {
 	int high, low;
 
 	if (sd->bridge != BRIDGE_OVFX2) {
-		err("error hires sensors only supported with ovfx2");
+		pr_err("error hires sensors only supported with ovfx2\n");
 		return;
 	}
 
@@ -2702,19 +2811,32 @@
 	high = i2c_r(sd, 0x0a);
 	low = i2c_r(sd, 0x0b);
 	/* info("%x, %x", high, low); */
-	if (high == 0x96 && low == 0x40) {
-		PDEBUG(D_PROBE, "Sensor is an OV2610");
-		sd->sensor = SEN_OV2610;
-	} else if (high == 0x96 && low == 0x41) {
-		PDEBUG(D_PROBE, "Sensor is an OV2610AE");
-		sd->sensor = SEN_OV2610AE;
-	} else if (high == 0x36 && (low & 0x0f) == 0x00) {
-		PDEBUG(D_PROBE, "Sensor is an OV3610");
-		sd->sensor = SEN_OV3610;
-	} else {
-		err("Error unknown sensor type: %02x%02x",
-			high, low);
+	switch (high) {
+	case 0x96:
+		switch (low) {
+		case 0x40:
+			PDEBUG(D_PROBE, "Sensor is a OV2610");
+			sd->sensor = SEN_OV2610;
+			return;
+		case 0x41:
+			PDEBUG(D_PROBE, "Sensor is a OV2610AE");
+			sd->sensor = SEN_OV2610AE;
+			return;
+		case 0xb1:
+			PDEBUG(D_PROBE, "Sensor is a OV9600");
+			sd->sensor = SEN_OV9600;
+			return;
+		}
+		break;
+	case 0x36:
+		if ((low & 0x0f) == 0x00) {
+			PDEBUG(D_PROBE, "Sensor is a OV3610");
+			sd->sensor = SEN_OV3610;
+			return;
+		}
+		break;
 	}
+	pr_err("Error unknown sensor type: %02x%02x\n", high, low);
 }
 
 /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
@@ -2735,7 +2857,7 @@
 	if ((rc & 3) == 1)
 		sd->sensor = SEN_OV8610;
 	else
-		err("Unknown image sensor version: %d", rc & 3);
+		pr_err("Unknown image sensor version: %d\n", rc & 3);
 }
 
 /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
@@ -2753,7 +2875,7 @@
 	/* add OV7670 here
 	 * it appears to be wrongly detected as a 7610 by default */
 	if (rc < 0) {
-		PDEBUG(D_ERR, "Error detecting sensor type");
+		pr_err("Error detecting sensor type\n");
 		return;
 	}
 	if ((rc & 3) == 3) {
@@ -2781,19 +2903,19 @@
 		/* try to read product id registers */
 		high = i2c_r(sd, 0x0a);
 		if (high < 0) {
-			PDEBUG(D_ERR, "Error detecting camera chip PID");
+			pr_err("Error detecting camera chip PID\n");
 			return;
 		}
 		low = i2c_r(sd, 0x0b);
 		if (low < 0) {
-			PDEBUG(D_ERR, "Error detecting camera chip VER");
+			pr_err("Error detecting camera chip VER\n");
 			return;
 		}
 		if (high == 0x76) {
 			switch (low) {
 			case 0x30:
-				err("Sensor is an OV7630/OV7635");
-				err("7630 is not supported by this driver");
+				pr_err("Sensor is an OV7630/OV7635\n");
+				pr_err("7630 is not supported by this driver\n");
 				return;
 			case 0x40:
 				PDEBUG(D_PROBE, "Sensor is an OV7645");
@@ -2810,10 +2932,9 @@
 			case 0x60:
 				PDEBUG(D_PROBE, "Sensor is a OV7660");
 				sd->sensor = SEN_OV7660;
-				sd->invert_led = 0;
 				break;
 			default:
-				PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
+				pr_err("Unknown sensor: 0x76%02x\n", low);
 				return;
 			}
 		} else {
@@ -2821,7 +2942,7 @@
 			sd->sensor = SEN_OV7620;
 		}
 	} else {
-		err("Unknown image sensor version: %d", rc & 3);
+		pr_err("Unknown image sensor version: %d\n", rc & 3);
 	}
 }
 
@@ -2834,7 +2955,7 @@
 	/* Detect sensor (sub)type */
 	rc = i2c_r(sd, OV7610_REG_COM_I);
 	if (rc < 0) {
-		PDEBUG(D_ERR, "Error detecting sensor type");
+		pr_err("Error detecting sensor type\n");
 		return;
 	}
 
@@ -2844,8 +2965,7 @@
 	switch (rc) {
 	case 0x00:
 		sd->sensor = SEN_OV6630;
-		warn("WARNING: Sensor is an OV66308. Your camera may have");
-		warn("been misdetected in previous driver versions.");
+		pr_warn("WARNING: Sensor is an OV66308. Your camera may have been misdetected in previous driver versions.\n");
 		break;
 	case 0x01:
 		sd->sensor = SEN_OV6620;
@@ -2861,11 +2981,10 @@
 		break;
 	case 0x90:
 		sd->sensor = SEN_OV6630;
-		warn("WARNING: Sensor is an OV66307. Your camera may have");
-		warn("been misdetected in previous driver versions.");
+		pr_warn("WARNING: Sensor is an OV66307. Your camera may have been misdetected in previous driver versions.\n");
 		break;
 	default:
-		err("FATAL: Unknown sensor version: 0x%02x", rc);
+		pr_err("FATAL: Unknown sensor version: 0x%02x\n", rc);
 		return;
 	}
 
@@ -3174,16 +3293,16 @@
 }
 
 /* set the mode */
-/* This function works for ov7660 only */
+/* This function works for ov7660 and ov7670 only */
 static void ov519_set_mode(struct sd *sd)
 {
-	static const struct ov_regvals bridge_ov7660[2][10] = {
+	static const struct ov_regvals bridge_common[2][10] = {
 		{{0x10, 0x14}, {0x11, 0x1e}, {0x12, 0x00}, {0x13, 0x00},
 		 {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
-		 {0x25, 0x01}, {0x26, 0x00}},
+		 {0x25, 0x01} ,{0x26, 0x00}},
 		{{0x10, 0x28}, {0x11, 0x3c}, {0x12, 0x00}, {0x13, 0x00},
 		 {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
-		 {0x25, 0x03}, {0x26, 0x00}}
+		 {0x25, 0x03} ,{0x26, 0x00}}
 	};
 	static const struct ov_i2c_regvals sensor_ov7660[2][3] = {
 		{{0x12, 0x00}, {0x24, 0x00}, {0x0c, 0x0c}},
@@ -3201,13 +3320,56 @@
 /*		{0x36, 0x00}, */
 /*		{0x6b, 0x0a}, */
 	};
+	static const struct ov_i2c_regvals sensor_ov7670_0[] = { /* 320x240 */
+		{OV7670_R3A_TSLB, 0x04},
+		{OV7670_R12_COM7, OV7670_COM7_FMT_QVGA},
+		{OV7670_R17_HSTART, 0x16},
+		{OV7670_R18_HSTOP, 0x04},
+		{OV7670_R32_HREF, 0x80},
+		{OV7670_R19_VSTART, 0x02},
+		{OV7670_R1A_VSTOP, 0x7a},
+		{OV7670_R03_VREF, 0x0a},
+		{OV7670_R0C_COM3, 0x04},
+		{OV7670_R3E_COM14, 0x19},
+		{0x73, 0xf1},
+//		{0xa5, 0x02},
+//		{0xab, 0x03},
+	};
+	static const struct ov_i2c_regvals sensor_ov7670_1[] = { /* 640x480 */
+		{OV7670_R3A_TSLB, 0x04},
+		{OV7670_R12_COM7, OV7670_COM7_FMT_VGA},
+		{OV7670_R17_HSTART, 0x13},
+		{OV7670_R18_HSTOP, 0x01},
+		{OV7670_R32_HREF, 0xb6},
+		{OV7670_R19_VSTART, 0x02},
+		{OV7670_R1A_VSTOP, 0x7a},
+		{OV7670_R03_VREF, 0x0a},
+		{OV7670_R0C_COM3, 0x00},
+		{OV7670_R3E_COM14, 0x00},
+		{0x70, 0x3a},
+		{0x71, 0x35},
+		{0x72, 0x11},
+		{0x73, 0xf0},
+		{0xa2, 0x02},
+//		{0xa5, 0x05},
+//		{0xab, 0x07},
+	};
 
-	write_regvals(sd, bridge_ov7660[sd->gspca_dev.curr_mode],
-			ARRAY_SIZE(bridge_ov7660[0]));
-	write_i2c_regvals(sd, sensor_ov7660[sd->gspca_dev.curr_mode],
-			ARRAY_SIZE(sensor_ov7660[0]));
-	write_i2c_regvals(sd, sensor_ov7660_2,
-			ARRAY_SIZE(sensor_ov7660_2));
+	write_regvals(sd, bridge_common[sd->gspca_dev.curr_mode],
+			ARRAY_SIZE(bridge_common[0]));
+	if (sd->sensor == SEN_OV7660) {
+		write_i2c_regvals(sd, sensor_ov7660[sd->gspca_dev.curr_mode],
+				ARRAY_SIZE(sensor_ov7660[0]));
+		write_i2c_regvals(sd, sensor_ov7660_2,
+				ARRAY_SIZE(sensor_ov7660_2));
+	} else {
+		if (sd->gspca_dev.curr_mode == 0)
+			write_i2c_regvals(sd, sensor_ov7670_0,
+					ARRAY_SIZE(sensor_ov7670_0));
+		else
+			write_i2c_regvals(sd, sensor_ov7670_1,
+					ARRAY_SIZE(sensor_ov7670_1));
+	}
 }
 
 /* set the frame rate */
@@ -3218,44 +3380,40 @@
 	u8 clock;
 	/* frame rate table with indices:
 	 *	- mode = 0: 320x240, 1: 640x480
-	 *	- fr rate = 0: 30, 1: 25, 2: 20, 3: 15, 4: 10, 5: 5
+	 *	- fr rate = [0..6] = (frame rate) / 5 - 1
 	 *	- reg = 0: bridge a4, 1: bridge 23, 2: sensor 11 (clock)
 	 */
 	static const u8 fr_tb[2][6][3] = {
-		{{0x04, 0xff, 0x00},
-		 {0x04, 0x1f, 0x00},
-		 {0x04, 0x1b, 0x00},
-		 {0x04, 0x15, 0x00},
+		{{0x04, 0x01, 0x00},
 		 {0x04, 0x09, 0x00},
-		 {0x04, 0x01, 0x00}},
-		{{0x0c, 0xff, 0x00},
-		 {0x0c, 0x1f, 0x00},
-		 {0x0c, 0x1b, 0x00},
-		 {0x04, 0xff, 0x01},
+		 {0x04, 0x15, 0x00},
+		 {0x04, 0x1b, 0x00},
+		 {0x04, 0x1f, 0x00},
+		 {0x04, 0xff, 0x00}},
+		{{0x04, 0x1b, 0x01},
 		 {0x04, 0x1f, 0x01},
-		 {0x04, 0x1b, 0x01}},
+		 {0x04, 0xff, 0x01},
+		 {0x0c, 0x1b, 0x00},
+		 {0x0c, 0x1f, 0x00},
+		 {0x0c, 0xff, 0x00}},
 	};
 
-	if (frame_rate > 0)
-		sd->frame_rate = frame_rate;
-	if (sd->frame_rate >= 30)
-		fr = 0;
-	else if (sd->frame_rate >= 25)
-		fr = 1;
-	else if (sd->frame_rate >= 20)
-		fr = 2;
-	else if (sd->frame_rate >= 15)
-		fr = 3;
-	else if (sd->frame_rate >= 10)
-		fr = 4;
-	else
-		fr = 5;
+	fr = sd->frame_rate / 5 - 1;
 	reg_w(sd, 0xa4, fr_tb[sd->gspca_dev.curr_mode][fr][0]);
 	reg_w(sd, 0x23, fr_tb[sd->gspca_dev.curr_mode][fr][1]);
 	clock = fr_tb[sd->gspca_dev.curr_mode][fr][2];
 	if (sd->sensor == SEN_OV7660)
 		clock |= 0x80;		/* enable double clock */
 	ov518_i2c_w(sd, OV7670_R11_CLKRC, clock);
+	if (sd->sensor == SEN_OV7670) {
+		if (fr > 2) {
+			ov518_i2c_w(sd, 0x9d, 0x99);
+			ov518_i2c_w(sd, 0x9e, 0x7f);
+		} else {
+			ov518_i2c_w(sd, 0x9d, 0x4c);
+			ov518_i2c_w(sd, 0x9e, 0x3f);
+		}
+	}
 }
 
 static void setautogain(struct gspca_dev *gspca_dev)
@@ -3275,6 +3433,7 @@
 	sd->bridge = id->driver_info & BRIDGE_MASK;
 	sd->invert_led = (id->driver_info & BRIDGE_INVERT_LED) != 0;
 
+	cam->mode_framerates = framerates;
 	switch (sd->bridge) {
 	case BRIDGE_OV511:
 	case BRIDGE_OV511PLUS:
@@ -3289,7 +3448,6 @@
 	case BRIDGE_OV519:
 		cam->cam_mode = ov519_vga_mode;
 		cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
-		sd->invert_led = !sd->invert_led;
 		break;
 	case BRIDGE_OVFX2:
 		cam->cam_mode = ov519_vga_mode;
@@ -3301,7 +3459,6 @@
 	case BRIDGE_W9968CF:
 		cam->cam_mode = w9968cf_vga_mode;
 		cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
-		cam->reverse_alts = 1;
 		break;
 	}
 
@@ -3359,7 +3516,7 @@
 	} else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
 		ov_hires_configure(sd);
 	} else {
-		err("Can't determine sensor slave IDs");
+		pr_err("Can't determine sensor slave IDs\n");
 		goto error;
 	}
 
@@ -3400,6 +3557,10 @@
 			cam->cam_mode = ovfx2_ov3610_mode;
 			cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
 			break;
+		case SEN_OV9600:
+			cam->cam_mode = ovfx2_ov9600_mode;
+			cam->nmodes = ARRAY_SIZE(ovfx2_ov9600_mode);
+			break;
 		default:
 			if (sd->sif) {
 				cam->cam_mode = ov519_sif_mode;
@@ -3462,41 +3623,56 @@
 	case SEN_OV7648:
 		write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640));
 		break;
+	case SEN_OV7670:
+		sd->ctrls[FREQ].max = 3;	/* auto */
+		sd->ctrls[FREQ].def = 3;
+		/* fall thru */
 	case SEN_OV7660:
 		i2c_w(sd, OV7670_R12_COM7, OV7670_COM7_RESET);
 		msleep(14);
 		reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
-		write_regvals(sd, init_519_ov7660,
-				ARRAY_SIZE(init_519_ov7660));
-		write_i2c_regvals(sd, norm_7660, ARRAY_SIZE(norm_7660));
+		if (sd->sensor == SEN_OV7660) {
+			write_regvals(sd, init_519_ov7660,
+					ARRAY_SIZE(init_519_ov7660));
+			write_i2c_regvals(sd, norm_7660,
+					ARRAY_SIZE(norm_7660));
+		} else {
+			write_regvals(sd, init_519_ov7670,
+					ARRAY_SIZE(init_519_ov7670));
+			write_i2c_regvals(sd, norm_7670,
+					ARRAY_SIZE(norm_7670));
+		}
 		sd->gspca_dev.curr_mode = 1;	/* 640x480 */
 		ov519_set_mode(sd);
 		ov519_set_fr(sd);
-		sd->ctrls[COLORS].max = 4;	/* 0..4 */
-		sd->ctrls[COLORS].val =
-			sd->ctrls[COLORS].def = 2;
-		setcolors(gspca_dev);
-		sd->ctrls[CONTRAST].max = 6;	/* 0..6 */
-		sd->ctrls[CONTRAST].val =
-			sd->ctrls[CONTRAST].def = 3;
+		if (sd->sensor == SEN_OV7660) {
+			sd->ctrls[BRIGHTNESS].max = 6;	/* 0..6 */
+			sd->ctrls[BRIGHTNESS].val =
+				sd->ctrls[BRIGHTNESS].def = 3;
+			sd->ctrls[CONTRAST].max = 6;	/* 0..6 */
+			sd->ctrls[CONTRAST].val =
+				sd->ctrls[CONTRAST].def = 3;
+			sd->ctrls[COLORS].max = 4;	/* 0..4 */
+			sd->ctrls[COLORS].val =
+				sd->ctrls[COLORS].def = 2;
+			setcolors(gspca_dev);
+		}
 		setcontrast(gspca_dev);
-		sd->ctrls[BRIGHTNESS].max = 6;	/* 0..6 */
-		sd->ctrls[BRIGHTNESS].val =
-			sd->ctrls[BRIGHTNESS].def = 3;
 		setbrightness(gspca_dev);
 		sd_reset_snapshot(gspca_dev);
 		ov51x_restart(sd);
 		ov51x_stop(sd);			/* not in win traces */
 		ov51x_led_control(sd, 0);
 		break;
-	case SEN_OV7670:
-		sd->ctrls[FREQ].max = 3;	/* auto */
-		sd->ctrls[FREQ].def = 3;
-		write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670));
-		break;
 	case SEN_OV8610:
 		write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610));
 		break;
+	case SEN_OV9600:
+		write_i2c_regvals(sd, norm_9600, ARRAY_SIZE(norm_9600));
+
+		/* enable autoexpo */
+/*		i2c_w_mask(sd, 0x13, 0x05, 0x05); */
+		break;
 	}
 	return gspca_dev->usb_err;
 error:
@@ -3534,7 +3710,7 @@
 	intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
 	alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
 	if (!alt) {
-		err("Couldn't get altsetting");
+		pr_err("Couldn't get altsetting\n");
 		sd->gspca_dev.usb_err = -EIO;
 		return;
 	}
@@ -3567,9 +3743,6 @@
 	reg_w(sd, R511_SNAP_LNDIV, 0x00);
 
 	/******** Set the framerate ********/
-	if (frame_rate > 0)
-		sd->frame_rate = frame_rate;
-
 	switch (sd->sensor) {
 	case SEN_OV6620:
 		/* No framerate control, doesn't like higher rates yet */
@@ -3627,8 +3800,8 @@
 	/* Check if we have enough bandwidth to disable compression */
 	fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
 	needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2;
-	/* 1400 is a conservative estimate of the max nr of isoc packets/sec */
-	if (needed > 1400 * packet_size) {
+	/* 1000 isoc packets/sec */
+	if (needed > 1000 * packet_size) {
 		/* Enable Y and UV quantization and compression */
 		reg_w(sd, R511_COMP_EN, 0x07);
 		reg_w(sd, R511_COMP_LUT_EN, 0x03);
@@ -3657,7 +3830,7 @@
 	intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
 	alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
 	if (!alt) {
-		err("Couldn't get altsetting");
+		pr_err("Couldn't get altsetting\n");
 		sd->gspca_dev.usb_err = -EIO;
 		return;
 	}
@@ -3773,29 +3946,6 @@
  */
 static void ov519_mode_init_regs(struct sd *sd)
 {
-	static const struct ov_regvals mode_init_519_ov7670[] = {
-		{ 0x5d,	0x03 }, /* Turn off suspend mode */
-		{ 0x53,	0x9f }, /* was 9b in 1.65-1.08 */
-		{ OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
-		{ 0xa2,	0x20 }, /* a2-a5 are undocumented */
-		{ 0xa3,	0x18 },
-		{ 0xa4,	0x04 },
-		{ 0xa5,	0x28 },
-		{ 0x37,	0x00 },	/* SetUsbInit */
-		{ 0x55,	0x02 }, /* 4.096 Mhz audio clock */
-		/* Enable both fields, YUV Input, disable defect comp (why?) */
-		{ 0x20,	0x0c },
-		{ 0x21,	0x38 },
-		{ 0x22,	0x1d },
-		{ 0x17,	0x50 }, /* undocumented */
-		{ 0x37,	0x00 }, /* undocumented */
-		{ 0x40,	0xff }, /* I2C timeout counter */
-		{ 0x46,	0x00 }, /* I2C clock prescaler */
-		{ 0x59,	0x04 },	/* new from windrv 090403 */
-		{ 0xff,	0x00 }, /* undocumented */
-		/* windows reads 0x55 at this point, why? */
-	};
-
 	static const struct ov_regvals mode_init_519[] = {
 		{ 0x5d,	0x03 }, /* Turn off suspend mode */
 		{ 0x53,	0x9f }, /* was 9b in 1.65-1.08 */
@@ -3828,19 +3978,13 @@
 		}
 		break;
 	case SEN_OV7660:
-		return;		/* done by ov519_set_mode/fr() */
 	case SEN_OV7670:
-		write_regvals(sd, mode_init_519_ov7670,
-				ARRAY_SIZE(mode_init_519_ov7670));
-		break;
+		return;		/* done by ov519_set_mode/fr() */
 	}
 
-	reg_w(sd, OV519_R10_H_SIZE,	sd->gspca_dev.width >> 4);
-	reg_w(sd, OV519_R11_V_SIZE,	sd->gspca_dev.height >> 3);
-	if (sd->sensor == SEN_OV7670 &&
-	    sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
-		reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
-	else if (sd->sensor == SEN_OV7648 &&
+	reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.width >> 4);
+	reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.height >> 3);
+	if (sd->sensor == SEN_OV7648 &&
 	    sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
 		reg_w(sd, OV519_R12_X_OFFSETL, 0x01);
 	else
@@ -3853,8 +3997,6 @@
 	reg_w(sd, 0x26,			0x00); /* Undocumented */
 
 	/******** Set the framerate ********/
-	if (frame_rate > 0)
-		sd->frame_rate = frame_rate;
 
 /* FIXME: These are only valid at the max resolution. */
 	sd->clockdiv = 0;
@@ -3909,24 +4051,6 @@
 			break;
 		}
 		break;
-	case SEN_OV7670:		/* guesses, based on 7640 */
-		PDEBUG(D_STREAM, "Setting framerate to %d fps",
-				 (sd->frame_rate == 0) ? 15 : sd->frame_rate);
-		reg_w(sd, 0xa4, 0x10);
-		switch (sd->frame_rate) {
-		case 30:
-			reg_w(sd, 0x23, 0xff);
-			break;
-		case 20:
-			reg_w(sd, 0x23, 0x1b);
-			break;
-		default:
-/*		case 15: */
-			reg_w(sd, 0x23, 0xff);
-			sd->clockdiv = 1;
-			break;
-		}
-		break;
 	}
 }
 
@@ -3934,7 +4058,6 @@
 {
 	struct gspca_dev *gspca_dev;
 	int qvga, xstart, xend, ystart, yend;
-	u8 v;
 
 	gspca_dev = &sd->gspca_dev;
 	qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
@@ -4035,46 +4158,6 @@
 		i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
 		i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
 		break;
-	case SEN_OV7670:
-		/* set COM7_FMT_VGA or COM7_FMT_QVGA
-		 * do we need to set anything else?
-		 *	HSTART etc are set in set_ov_sensor_window itself */
-		i2c_w_mask(sd, OV7670_R12_COM7,
-			 qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
-			 OV7670_COM7_FMT_MASK);
-		i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
-		i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_AWB,
-				OV7670_COM8_AWB);
-		if (qvga) {		/* QVGA from ov7670.c by
-					 * Jonathan Corbet */
-			xstart = 164;
-			xend = 28;
-			ystart = 14;
-			yend = 494;
-		} else {		/* VGA */
-			xstart = 158;
-			xend = 14;
-			ystart = 10;
-			yend = 490;
-		}
-		/* OV7670 hardware window registers are split across
-		 * multiple locations */
-		i2c_w(sd, OV7670_R17_HSTART, xstart >> 3);
-		i2c_w(sd, OV7670_R18_HSTOP, xend >> 3);
-		v = i2c_r(sd, OV7670_R32_HREF);
-		v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
-		msleep(10);	/* need to sleep between read and write to
-				 * same reg! */
-		i2c_w(sd, OV7670_R32_HREF, v);
-
-		i2c_w(sd, OV7670_R19_VSTART, ystart >> 2);
-		i2c_w(sd, OV7670_R1A_VSTOP, yend >> 2);
-		v = i2c_r(sd, OV7670_R03_VREF);
-		v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
-		msleep(10);	/* need to sleep between read and write to
-				 * same reg! */
-		i2c_w(sd, OV7670_R03_VREF, v);
-		break;
 	case SEN_OV6620:
 		i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
 		i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
@@ -4085,6 +4168,33 @@
 		i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
 		i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
 		break;
+	case SEN_OV9600: {
+		const struct ov_i2c_regvals *vals;
+		static const struct ov_i2c_regvals sxga_15[] = {
+			{0x11, 0x80}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
+		};
+		static const struct ov_i2c_regvals sxga_7_5[] = {
+			{0x11, 0x81}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
+		};
+		static const struct ov_i2c_regvals vga_30[] = {
+			{0x11, 0x81}, {0x14, 0x7e}, {0x24, 0x70}, {0x25, 0x60}
+		};
+		static const struct ov_i2c_regvals vga_15[] = {
+			{0x11, 0x83}, {0x14, 0x3e}, {0x24, 0x80}, {0x25, 0x70}
+		};
+
+		/* frame rates:
+		 *	15fps / 7.5 fps for 1280x1024
+		 *	30fps / 15fps for 640x480
+		 */
+		i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0x40);
+		if (qvga)
+			vals = sd->frame_rate < 30 ? vga_15 : vga_30;
+		else
+			vals = sd->frame_rate < 15 ? sxga_7_5 : sxga_15;
+		write_i2c_regvals(sd, vals, ARRAY_SIZE(sxga_15));
+		return;
+	    }
 	default:
 		return;
 	}
@@ -4119,10 +4229,11 @@
 	case SEN_OV2610:
 	case SEN_OV2610AE:
 	case SEN_OV3610:
-	case SEN_OV7670:
+	case SEN_OV9600:
 		mode_init_ov_sensor_regs(sd);
 		return;
 	case SEN_OV7660:
+	case SEN_OV7670:
 		ov519_set_mode(sd);
 		ov519_set_fr(sd);
 		return;
@@ -4265,6 +4376,9 @@
 		setautogain(gspca_dev);
 	if (!(sd->gspca_dev.ctrl_dis & (1 << FREQ)))
 		setfreq_i(sd);
+//fixme: test
+	if (sd->sensor == SEN_OV7670)
+		ov518_i2c_w(sd, OV7670_R3F_EDGE, 0x04);	/* sharpness */
 
 	/* Force clear snapshot state in case the snapshot button was
 	   pressed while we weren't streaming */
@@ -4895,9 +5009,59 @@
 	return 0;
 }
 
+/* get stream parameters (framerate) */
+static void sd_get_streamparm(struct gspca_dev *gspca_dev,
+			     struct v4l2_streamparm *parm)
+{
+	struct v4l2_captureparm *cp = &parm->parm.capture;
+	struct v4l2_fract *tpf = &cp->timeperframe;
+	struct sd *sd = (struct sd *) gspca_dev;
+
+	cp->capability |= V4L2_CAP_TIMEPERFRAME;
+	tpf->numerator = 1;
+	tpf->denominator = sd->frame_rate;
+}
+
+/* set stream parameters (framerate) */
+static void sd_set_streamparm(struct gspca_dev *gspca_dev,
+			     struct v4l2_streamparm *parm)
+{
+	struct v4l2_captureparm *cp = &parm->parm.capture;
+	struct v4l2_fract *tpf = &cp->timeperframe;
+	struct sd *sd = (struct sd *) gspca_dev;
+	int fr;
+
+	/* Set requested framerate */
+	fr = tpf->denominator / tpf->numerator;
+	if (fr >= 30)
+		fr = 30;
+	else if (fr >= 25)
+		fr = 25;
+	else if (fr >= 20)
+		fr = 20;
+	else if (fr >= 15)
+		fr = 15;
+	else if (fr >= 10)
+		fr = 10;
+	else
+		fr = 5;
+	sd->frame_rate = fr;
+
+	switch (sd->sensor) {
+	case SEN_OV7660:
+	case SEN_OV7670:
+		ov519_set_fr(sd);
+		break;
+	}
+
+	/* Return the actual framerate */
+	tpf->numerator = 1;
+	tpf->denominator = sd->frame_rate;
+}
+
 /* sub-driver description */
 static const struct sd_desc sd_desc = {
-	.name = MODULE_NAME,
+	.name = KBUILD_MODNAME,
 	.ctrls = sd_ctrls,
 	.nctrls = ARRAY_SIZE(sd_ctrls),
 	.config = sd_config,
@@ -4911,6 +5075,8 @@
 	.querymenu = sd_querymenu,
 	.get_jcomp = sd_get_jcomp,
 	.set_jcomp = sd_set_jcomp,
+	.get_streamparm = sd_get_streamparm,
+	.set_streamparm = sd_set_streamparm,
 #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
 	.other_input = 1,
 #endif
@@ -4919,23 +5085,24 @@
 /* -- module initialisation -- */
 static const struct usb_device_id device_table[] = {
 	{USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
-	{USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 },
+	{USB_DEVICE(0x041e, 0x4052),
+		.driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
 	{USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
 	{USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
 	{USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
-	{USB_DEVICE(0x041e, 0x4064),
-		.driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
+	{USB_DEVICE(0x041e, 0x4064), .driver_info = BRIDGE_OV519 },
 	{USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
-	{USB_DEVICE(0x041e, 0x4068),
+	{USB_DEVICE(0x041e, 0x4068), .driver_info = BRIDGE_OV519 },
+	{USB_DEVICE(0x045e, 0x028c),
 		.driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
-	{USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 },
 	{USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
-	{USB_DEVICE(0x054c, 0x0155),
-		.driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
+	{USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 },
 	{USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
 	{USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
-	{USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 },
-	{USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 },
+	{USB_DEVICE(0x05a9, 0x0519),
+		.driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
+	{USB_DEVICE(0x05a9, 0x0530),
+		.driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
 	{USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
 	{USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
 	{USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
@@ -4960,7 +5127,7 @@
 }
 
 static struct usb_driver sd_driver = {
-	.name = MODULE_NAME,
+	.name = KBUILD_MODNAME,
 	.id_table = device_table,
 	.probe = sd_probe,
 	.disconnect = gspca_disconnect,
@@ -4970,18 +5137,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
-
-module_param(frame_rate, int, 0644);
-MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/ov534_9.c linux-3.0.82x/drivers/media/video/gspca/ov534_9.c
--- linux-3.0.82/drivers/media/video/gspca/ov534_9.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/ov534_9.c	2017-09-23 03:42:49.474676726 +0800
@@ -1,7 +1,7 @@
 /*
- * ov534-ov965x gspca driver
+ * ov534-ov9xxx gspca driver
  *
- * Copyright (C) 2009-2010 Jean-Francois Moine http://moinejf.free.fr
+ * Copyright (C) 2009-2011 Jean-Francois Moine http://moinejf.free.fr
  * Copyright (C) 2008 Antonio Ospite <ospite@studenti.unina.it>
  * Copyright (C) 2008 Jim Paris <jim@jtan.com>
  *
@@ -24,6 +24,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "ov534_9"
 
 #include "gspca.h"
@@ -45,39 +47,45 @@
 MODULE_DESCRIPTION("GSPCA/OV534_9 USB Camera Driver");
 MODULE_LICENSE("GPL");
 
+/* controls */
+enum e_ctrl {
+	BRIGHTNESS,
+	CONTRAST,
+	AUTOGAIN,
+	EXPOSURE,
+	SHARPNESS,
+	SATUR,
+	LIGHTFREQ,
+	NCTRLS		/* number of controls */
+};
+
 /* specific webcam descriptor */
 struct sd {
 	struct gspca_dev gspca_dev;	/* !! must be the first item */
+	struct gspca_ctrl ctrls[NCTRLS];
 	__u32 last_pts;
 	u8 last_fid;
 
-	u8 brightness;
-	u8 contrast;
-	u8 autogain;
-	u8 exposure;
-	s8 sharpness;
-	u8 satur;
-	u8 freq;
+	u8 sensor;
+};
+enum sensors {
+	SENSOR_OV965x,		/* ov9657 */
+	SENSOR_OV971x,		/* ov9712 */
+	SENSOR_OV562x,		/* ov5621 */
+	NSENSORS
 };
 
 /* V4L2 controls supported by the driver */
-static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
-static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
-static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val);
-static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val);
-static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val);
-static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val);
-static int sd_setexposure(struct gspca_dev *gspca_dev, __s32 val);
-static int sd_getexposure(struct gspca_dev *gspca_dev, __s32 *val);
-static int sd_setsharpness(struct gspca_dev *gspca_dev, __s32 val);
-static int sd_getsharpness(struct gspca_dev *gspca_dev, __s32 *val);
-static int sd_setsatur(struct gspca_dev *gspca_dev, __s32 val);
-static int sd_getsatur(struct gspca_dev *gspca_dev, __s32 *val);
-static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val);
-static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val);
+static void setbrightness(struct gspca_dev *gspca_dev);
+static void setcontrast(struct gspca_dev *gspca_dev);
+static void setautogain(struct gspca_dev *gspca_dev);
+static void setexposure(struct gspca_dev *gspca_dev);
+static void setsharpness(struct gspca_dev *gspca_dev);
+static void setsatur(struct gspca_dev *gspca_dev);
+static void setlightfreq(struct gspca_dev *gspca_dev);
 
-static const struct ctrl sd_ctrls[] = {
-    {							/* 0 */
+static const struct ctrl sd_ctrls[NCTRLS] = {
+[BRIGHTNESS] = {
 	{
 		.id      = V4L2_CID_BRIGHTNESS,
 		.type    = V4L2_CTRL_TYPE_INTEGER,
@@ -85,13 +93,11 @@
 		.minimum = 0,
 		.maximum = 15,
 		.step    = 1,
-#define BRIGHTNESS_DEF 7
-		.default_value = BRIGHTNESS_DEF,
+		.default_value = 7
 	},
-	.set = sd_setbrightness,
-	.get = sd_getbrightness,
+	.set_control = setbrightness
     },
-    {							/* 1 */
+[CONTRAST] = {
 	{
 		.id      = V4L2_CID_CONTRAST,
 		.type    = V4L2_CTRL_TYPE_INTEGER,
@@ -99,13 +105,11 @@
 		.minimum = 0,
 		.maximum = 15,
 		.step    = 1,
-#define CONTRAST_DEF 3
-		.default_value = CONTRAST_DEF,
+		.default_value = 3
 	},
-	.set = sd_setcontrast,
-	.get = sd_getcontrast,
+	.set_control = setcontrast
     },
-    {							/* 2 */
+[AUTOGAIN] = {
 	{
 		.id      = V4L2_CID_AUTOGAIN,
 		.type    = V4L2_CTRL_TYPE_BOOLEAN,
@@ -116,11 +120,9 @@
 #define AUTOGAIN_DEF 1
 		.default_value = AUTOGAIN_DEF,
 	},
-	.set = sd_setautogain,
-	.get = sd_getautogain,
+	.set_control = setautogain
     },
-#define EXPO_IDX 3
-    {							/* 3 */
+[EXPOSURE] = {
 	{
 		.id      = V4L2_CID_EXPOSURE,
 		.type    = V4L2_CTRL_TYPE_INTEGER,
@@ -128,13 +130,11 @@
 		.minimum = 0,
 		.maximum = 3,
 		.step    = 1,
-#define EXPO_DEF 0
-		.default_value = EXPO_DEF,
+		.default_value = 0
 	},
-	.set = sd_setexposure,
-	.get = sd_getexposure,
+	.set_control = setexposure
     },
-    {							/* 4 */
+[SHARPNESS] = {
 	{
 		.id      = V4L2_CID_SHARPNESS,
 		.type    = V4L2_CTRL_TYPE_INTEGER,
@@ -142,13 +142,11 @@
 		.minimum = -1,		/* -1 = auto */
 		.maximum = 4,
 		.step    = 1,
-#define SHARPNESS_DEF -1
-		.default_value = SHARPNESS_DEF,
+		.default_value = -1
 	},
-	.set = sd_setsharpness,
-	.get = sd_getsharpness,
+	.set_control = setsharpness
     },
-    {							/* 5 */
+[SATUR] = {
 	{
 		.id      = V4L2_CID_SATURATION,
 		.type    = V4L2_CTRL_TYPE_INTEGER,
@@ -156,13 +154,11 @@
 		.minimum = 0,
 		.maximum = 4,
 		.step    = 1,
-#define SATUR_DEF 2
-		.default_value = SATUR_DEF,
+		.default_value = 2
 	},
-	.set = sd_setsatur,
-	.get = sd_getsatur,
+	.set_control = setsatur
     },
-    {
+[LIGHTFREQ] = {
 	{
 		.id	 = V4L2_CID_POWER_LINE_FREQUENCY,
 		.type    = V4L2_CTRL_TYPE_MENU,
@@ -170,11 +166,9 @@
 		.minimum = 0,
 		.maximum = 2,	/* 0: 0, 1: 50Hz, 2:60Hz */
 		.step    = 1,
-#define FREQ_DEF 0
-		.default_value = FREQ_DEF,
+		.default_value = 0
 	},
-	.set = sd_setfreq,
-	.get = sd_getfreq,
+	.set_control = setlightfreq
     },
 };
 
@@ -206,6 +200,22 @@
 		.colorspace = V4L2_COLORSPACE_JPEG},
 };
 
+static const struct v4l2_pix_format ov971x_mode[] = {
+	{640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
+		.bytesperline = 640,
+		.sizeimage = 640 * 480,
+		.colorspace = V4L2_COLORSPACE_SRGB
+	}
+};
+
+static const struct v4l2_pix_format ov562x_mode[] = {
+	{2592, 1680, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
+		.bytesperline = 2592,
+		.sizeimage = 2592 * 1680,
+		.colorspace = V4L2_COLORSPACE_SRGB
+	}
+};
+
 static const u8 bridge_init[][2] = {
 	{0x88, 0xf8},
 	{0x89, 0xff},
@@ -240,7 +250,7 @@
 	{0x94, 0x11},
 };
 
-static const u8 sensor_init[][2] = {
+static const u8 ov965x_init[][2] = {
 	{0x12, 0x80},	/* com7 - SSCB reset */
 	{0x00, 0x00},	/* gain */
 	{0x01, 0x80},	/* blue */
@@ -450,7 +460,7 @@
 	{0x94, 0x11},
 };
 
-static const u8 sensor_init_2[][2] = {
+static const u8 ov965x_init_2[][2] = {
 	{0x3b, 0xc4},
 	{0x1e, 0x04},	/* mvfp */
 	{0x13, 0xe0},	/* com8 */
@@ -492,7 +502,65 @@
 	{0x13, 0xe7},	/* com8 - everything (AGC, AWB and AEC) */
 };
 
-static const u8 sensor_start_1_vga[][2] = {	/* same for qvga */
+static const u8 ov971x_init[][2] = {
+	{0x12, 0x80},
+	{0x09, 0x10},
+	{0x1e, 0x07},
+	{0x5f, 0x18},
+	{0x69, 0x04},
+	{0x65, 0x2a},
+	{0x68, 0x0a},
+	{0x39, 0x28},
+	{0x4d, 0x90},
+	{0xc1, 0x80},
+	{0x0c, 0x30},
+	{0x6d, 0x02},
+	{0x96, 0xf1},
+	{0xbc, 0x68},
+	{0x12, 0x00},
+	{0x3b, 0x00},
+	{0x97, 0x80},
+	{0x17, 0x25},
+	{0x18, 0xa2},
+	{0x19, 0x01},
+	{0x1a, 0xca},
+	{0x03, 0x0a},
+	{0x32, 0x07},
+	{0x98, 0x40},	/*{0x98, 0x00},*/
+	{0x99, 0xA0},	/*{0x99, 0x00},*/
+	{0x9a, 0x01},	/*{0x9a, 0x00},*/
+	{0x57, 0x00},
+	{0x58, 0x78},	/*{0x58, 0xc8},*/
+	{0x59, 0x50},	/*{0x59, 0xa0},*/
+	{0x4c, 0x13},
+	{0x4b, 0x36},
+	{0x3d, 0x3c},
+	{0x3e, 0x03},
+	{0xbd, 0x50},	/*{0xbd, 0xa0},*/
+	{0xbe, 0x78},	/*{0xbe, 0xc8},*/
+	{0x4e, 0x55},
+	{0x4f, 0x55},
+	{0x50, 0x55},
+	{0x51, 0x55},
+	{0x24, 0x55},
+	{0x25, 0x40},
+	{0x26, 0xa1},
+	{0x5c, 0x59},
+	{0x5d, 0x00},
+	{0x11, 0x00},
+	{0x2a, 0x98},
+	{0x2b, 0x06},
+	{0x2d, 0x00},
+	{0x2e, 0x00},
+	{0x13, 0xa5},
+	{0x14, 0x40},
+	{0x4a, 0x00},
+	{0x49, 0xce},
+	{0x22, 0x03},
+	{0x09, 0x00}
+};
+
+static const u8 ov965x_start_1_vga[][2] = {	/* same for qvga */
 	{0x12, 0x62},	/* com7 - 30fps VGA YUV */
 	{0x36, 0xfa},	/* aref3 */
 	{0x69, 0x0a},	/* hv */
@@ -515,7 +583,7 @@
 	{0xc0, 0xaa},
 };
 
-static const u8 sensor_start_1_svga[][2] = {
+static const u8 ov965x_start_1_svga[][2] = {
 	{0x12, 0x02},	/* com7 - YUYV - VGA 15 full resolution */
 	{0x36, 0xf8},	/* aref3 */
 	{0x69, 0x02},	/* hv */
@@ -537,7 +605,7 @@
 	{0xc0, 0xe2},
 };
 
-static const u8 sensor_start_1_xga[][2] = {
+static const u8 ov965x_start_1_xga[][2] = {
 	{0x12, 0x02},	/* com7 */
 	{0x36, 0xf8},	/* aref3 */
 	{0x69, 0x02},	/* hv */
@@ -560,7 +628,7 @@
 	{0xc0, 0xe2},
 };
 
-static const u8 sensor_start_1_sxga[][2] = {
+static const u8 ov965x_start_1_sxga[][2] = {
 	{0x12, 0x02},	/* com7 */
 	{0x36, 0xf8},	/* aref3 */
 	{0x69, 0x02},	/* hv */
@@ -709,7 +777,7 @@
 	{0x94, 0x11},
 };
 
-static const u8 sensor_start_2_qvga[][2] = {
+static const u8 ov965x_start_2_qvga[][2] = {
 	{0x3b, 0xe4},	/* com11 - night mode 1/4 frame rate */
 	{0x1e, 0x04},	/* mvfp */
 	{0x13, 0xe0},	/* com8 */
@@ -727,7 +795,7 @@
 	{0x3a, 0x80},	/* tslb - yuyv */
 };
 
-static const u8 sensor_start_2_vga[][2] = {
+static const u8 ov965x_start_2_vga[][2] = {
 	{0x3b, 0xc4},	/* com11 - night mode 1/4 frame rate */
 	{0x1e, 0x04},	/* mvfp */
 	{0x13, 0xe0},	/* com8 */
@@ -743,7 +811,7 @@
 	{0x2d, 0x00},	/* advfl */
 };
 
-static const u8 sensor_start_2_svga[][2] = {	/* same for xga */
+static const u8 ov965x_start_2_svga[][2] = {	/* same for xga */
 	{0x3b, 0xc4},	/* com11 - night mode 1/4 frame rate */
 	{0x1e, 0x04},	/* mvfp */
 	{0x13, 0xe0},	/* com8 */
@@ -757,7 +825,7 @@
 	{0xa3, 0x41},	/* bd60 */
 };
 
-static const u8 sensor_start_2_sxga[][2] = {
+static const u8 ov965x_start_2_sxga[][2] = {
 	{0x13, 0xe0},	/* com8 */
 	{0x00, 0x00},
 	{0x13, 0xe7},	/* com8 - everything (AGC, AWB and AEC) */
@@ -771,6 +839,124 @@
 	{0xa3, 0x41},	/* bd60 */
 };
 
+static const u8 ov562x_init[][2] = {
+	{0x88, 0x20},
+	{0x89, 0x0a},
+	{0x8a, 0x90},
+	{0x8b, 0x06},
+	{0x8c, 0x01},
+	{0x8d, 0x10},
+	{0x1c, 0x00},
+	{0x1d, 0x48},
+	{0x1d, 0x00},
+	{0x1d, 0xff},
+	{0x1c, 0x0a},
+	{0x1d, 0x2e},
+	{0x1d, 0x1e},
+};
+
+static const u8 ov562x_init_2[][2] = {
+	{0x12, 0x80},
+	{0x11, 0x41},
+	{0x13, 0x00},
+	{0x10, 0x1e},
+	{0x3b, 0x07},
+	{0x5b, 0x40},
+	{0x39, 0x07},
+	{0x53, 0x02},
+	{0x54, 0x60},
+	{0x04, 0x20},
+	{0x27, 0x04},
+	{0x3d, 0x40},
+	{0x36, 0x00},
+	{0xc5, 0x04},
+	{0x4e, 0x00},
+	{0x4f, 0x93},
+	{0x50, 0x7b},
+	{0xca, 0x0c},
+	{0xcb, 0x0f},
+	{0x39, 0x07},
+	{0x4a, 0x10},
+	{0x3e, 0x0a},
+	{0x3d, 0x00},
+	{0x0c, 0x38},
+	{0x38, 0x90},
+	{0x46, 0x30},
+	{0x4f, 0x93},
+	{0x50, 0x7b},
+	{0xab, 0x00},
+	{0xca, 0x0c},
+	{0xcb, 0x0f},
+	{0x37, 0x02},
+	{0x44, 0x48},
+	{0x8d, 0x44},
+	{0x2a, 0x00},
+	{0x2b, 0x00},
+	{0x32, 0x00},
+	{0x38, 0x90},
+	{0x53, 0x02},
+	{0x54, 0x60},
+	{0x12, 0x00},
+	{0x17, 0x12},
+	{0x18, 0xb4},
+	{0x19, 0x0c},
+	{0x1a, 0xf4},
+	{0x03, 0x4a},
+	{0x89, 0x20},
+	{0x83, 0x80},
+	{0xb7, 0x9d},
+	{0xb6, 0x11},
+	{0xb5, 0x55},
+	{0xb4, 0x00},
+	{0xa9, 0xf0},
+	{0xa8, 0x0a},
+	{0xb8, 0xf0},
+	{0xb9, 0xf0},
+	{0xba, 0xf0},
+	{0x81, 0x07},
+	{0x63, 0x44},
+	{0x13, 0xc7},
+	{0x14, 0x60},
+	{0x33, 0x75},
+	{0x2c, 0x00},
+	{0x09, 0x00},
+	{0x35, 0x30},
+	{0x27, 0x04},
+	{0x3c, 0x07},
+	{0x3a, 0x0a},
+	{0x3b, 0x07},
+	{0x01, 0x40},
+	{0x02, 0x40},
+	{0x16, 0x40},
+	{0x52, 0xb0},
+	{0x51, 0x83},
+	{0x21, 0xbb},
+	{0x22, 0x10},
+	{0x23, 0x03},
+	{0x35, 0x38},
+	{0x20, 0x90},
+	{0x28, 0x30},
+	{0x73, 0xe1},
+	{0x6c, 0x00},
+	{0x6d, 0x80},
+	{0x6e, 0x00},
+	{0x70, 0x04},
+	{0x71, 0x00},
+	{0x8d, 0x04},
+	{0x64, 0x00},
+	{0x65, 0x00},
+	{0x66, 0x00},
+	{0x67, 0x00},
+	{0x68, 0x00},
+	{0x69, 0x00},
+	{0x6a, 0x00},
+	{0x6b, 0x00},
+	{0x71, 0x94},
+	{0x74, 0x20},
+	{0x80, 0x09},
+	{0x85, 0xc0},
+};
+
 static void reg_w_i(struct gspca_dev *gspca_dev, u16 reg, u8 val)
 {
 	struct usb_device *udev = gspca_dev->dev;
@@ -785,7 +971,7 @@
 			      USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 			      0x00, reg, gspca_dev->usb_buf, 1, CTRL_TIMEOUT);
 	if (ret < 0) {
-		err("reg_w failed %d", ret);
+		pr_err("reg_w failed %d\n", ret);
 		gspca_dev->usb_err = ret;
 	}
 }
@@ -810,7 +996,7 @@
 			      0x00, reg, gspca_dev->usb_buf, 1, CTRL_TIMEOUT);
 	PDEBUG(D_USBI, "reg_r [%04x] -> %02x", reg, gspca_dev->usb_buf[0]);
 	if (ret < 0) {
-		err("reg_r err %d", ret);
+		pr_err("reg_r err %d\n", ret);
 		gspca_dev->usb_err = ret;
 	}
 	return gspca_dev->usb_buf[0];
@@ -848,7 +1034,7 @@
 	reg_w_i(gspca_dev, OV534_REG_OPERATION, OV534_OP_WRITE_3);
 
 	if (!sccb_check_status(gspca_dev))
-		err("sccb_write failed");
+		pr_err("sccb_write failed\n");
 }
 
 static u8 sccb_read(struct gspca_dev *gspca_dev, u16 reg)
@@ -856,11 +1042,11 @@
 	reg_w(gspca_dev, OV534_REG_SUBADDR, reg);
 	reg_w(gspca_dev, OV534_REG_OPERATION, OV534_OP_WRITE_2);
 	if (!sccb_check_status(gspca_dev))
-		err("sccb_read failed 1");
+		pr_err("sccb_read failed 1\n");
 
 	reg_w(gspca_dev, OV534_REG_OPERATION, OV534_OP_READ_2);
 	if (!sccb_check_status(gspca_dev))
-		err("sccb_read failed 2");
+		pr_err("sccb_read failed 2\n");
 
 	return reg_r(gspca_dev, OV534_REG_READ);
 }
@@ -922,7 +1108,9 @@
 	struct sd *sd = (struct sd *) gspca_dev;
 	u8 val;
 
-	val = sd->brightness;
+	if (gspca_dev->ctrl_dis & (1 << BRIGHTNESS))
+		return;
+	val = sd->ctrls[BRIGHTNESS].val;
 	if (val < 8)
 		val = 15 - val;		/* f .. 8 */
 	else
@@ -935,8 +1123,10 @@
 {
 	struct sd *sd = (struct sd *) gspca_dev;
 
+	if (gspca_dev->ctrl_dis & (1 << CONTRAST))
+		return;
 	sccb_write(gspca_dev, 0x56,	/* cnst1 - contrast 1 ctrl coeff */
-			sd->contrast << 4);
+			sd->ctrls[CONTRAST].val << 4);
 }
 
 static void setautogain(struct gspca_dev *gspca_dev)
@@ -944,10 +1134,12 @@
 	struct sd *sd = (struct sd *) gspca_dev;
 	u8 val;
 
+	if (gspca_dev->ctrl_dis & (1 << AUTOGAIN))
+		return;
 /*fixme: should adjust agc/awb/aec by different controls */
 	val = sccb_read(gspca_dev, 0x13);		/* com8 */
 	sccb_write(gspca_dev, 0xff, 0x00);
-	if (sd->autogain)
+	if (sd->ctrls[AUTOGAIN].val)
 		val |= 0x05;		/* agc & aec */
 	else
 		val &= 0xfa;
@@ -960,8 +1152,10 @@
 	u8 val;
 	static const u8 expo[4] = {0x00, 0x25, 0x38, 0x5e};
 
+	if (gspca_dev->ctrl_dis & (1 << EXPOSURE))
+		return;
 	sccb_write(gspca_dev, 0x10,			/* aec[9:2] */
-			expo[sd->exposure]);
+			expo[sd->ctrls[EXPOSURE].val]);
 
 	val = sccb_read(gspca_dev, 0x13);		/* com8 */
 	sccb_write(gspca_dev, 0xff, 0x00);
@@ -977,7 +1171,9 @@
 	struct sd *sd = (struct sd *) gspca_dev;
 	s8 val;
 
-	val = sd->sharpness;
+	if (gspca_dev->ctrl_dis & (1 << SHARPNESS))
+		return;
+	val = sd->ctrls[SHARPNESS].val;
 	if (val < 0) {				/* auto */
 		val = sccb_read(gspca_dev, 0x42);	/* com17 */
 		sccb_write(gspca_dev, 0xff, 0x00);
@@ -1006,8 +1202,10 @@
 		{0x48, 0x90}
 	};
 
-	val1 = matrix[sd->satur][0];
-	val2 = matrix[sd->satur][1];
+	if (gspca_dev->ctrl_dis & (1 << SATUR))
+		return;
+	val1 = matrix[sd->ctrls[SATUR].val][0];
+	val2 = matrix[sd->ctrls[SATUR].val][1];
 	val3 = val1 + val2;
 	sccb_write(gspca_dev, 0x4f, val3);	/* matrix coeff */
 	sccb_write(gspca_dev, 0x50, val3);
@@ -1022,14 +1220,16 @@
 	sccb_write(gspca_dev, 0x41, val1);
 }
 
-static void setfreq(struct gspca_dev *gspca_dev)
+static void setlightfreq(struct gspca_dev *gspca_dev)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
 	u8 val;
 
+	if (gspca_dev->ctrl_dis & (1 << LIGHTFREQ))
+		return;
 	val = sccb_read(gspca_dev, 0x13);		/* com8 */
 	sccb_write(gspca_dev, 0xff, 0x00);
-	if (sd->freq == 0) {
+	if (sd->ctrls[LIGHTFREQ].val == 0) {
 		sccb_write(gspca_dev, 0x13, val & 0xdf);
 		return;
 	}
@@ -1037,7 +1237,7 @@
 
 	val = sccb_read(gspca_dev, 0x42);		/* com17 */
 	sccb_write(gspca_dev, 0xff, 0x00);
-	if (sd->freq == 1)
+	if (sd->ctrls[LIGHTFREQ].val == 1)
 		val |= 0x01;
 	else
 		val &= 0xfe;
@@ -1049,34 +1249,19 @@
 		     const struct usb_device_id *id)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
-	struct cam *cam;
 
-	cam = &gspca_dev->cam;
+	gspca_dev->cam.ctrls = sd->ctrls;
 
-	cam->cam_mode = ov965x_mode;
-	cam->nmodes = ARRAY_SIZE(ov965x_mode);
-
-	sd->brightness = BRIGHTNESS_DEF;
-	sd->contrast = CONTRAST_DEF;
 #if AUTOGAIN_DEF != 0
-	sd->autogain = AUTOGAIN_DEF;
-	gspca_dev->ctrl_inac |= (1 << EXPO_IDX);
-#endif
-#if EXPO_DEF != 0
-	sd->exposure = EXPO_DEF;
+	gspca_dev->ctrl_inac |= (1 << EXPOSURE);
 #endif
-#if SHARPNESS_DEF != 0
-	sd->sharpness = SHARPNESS_DEF;
-#endif
-	sd->satur = SATUR_DEF;
-	sd->freq = FREQ_DEF;
-
 	return 0;
 }
 
 /* this function is called at probe and resume time */
 static int sd_init(struct gspca_dev *gspca_dev)
 {
+	struct sd *sd = (struct sd *) gspca_dev;
 	u16 sensor_id;
 
 	/* reset bridge */
@@ -1099,68 +1284,128 @@
 	PDEBUG(D_PROBE, "Sensor ID: %04x", sensor_id);
 
 	/* initialize */
-	reg_w_array(gspca_dev, bridge_init,
-			ARRAY_SIZE(bridge_init));
-	sccb_w_array(gspca_dev, sensor_init,
-			ARRAY_SIZE(sensor_init));
-	reg_w_array(gspca_dev, bridge_init_2,
-			ARRAY_SIZE(bridge_init_2));
-	sccb_w_array(gspca_dev, sensor_init_2,
-			ARRAY_SIZE(sensor_init_2));
-	reg_w(gspca_dev, 0xe0, 0x00);
-	reg_w(gspca_dev, 0xe0, 0x01);
-	set_led(gspca_dev, 0);
-	reg_w(gspca_dev, 0xe0, 0x00);
+	if ((sensor_id & 0xfff0) == 0x9650) {
+		sd->sensor = SENSOR_OV965x;
+
+		gspca_dev->cam.cam_mode = ov965x_mode;
+		gspca_dev->cam.nmodes = ARRAY_SIZE(ov965x_mode);
+
+		reg_w_array(gspca_dev, bridge_init,
+				ARRAY_SIZE(bridge_init));
+		sccb_w_array(gspca_dev, ov965x_init,
+				ARRAY_SIZE(ov965x_init));
+		reg_w_array(gspca_dev, bridge_init_2,
+				ARRAY_SIZE(bridge_init_2));
+		sccb_w_array(gspca_dev, ov965x_init_2,
+				ARRAY_SIZE(ov965x_init_2));
+		reg_w(gspca_dev, 0xe0, 0x00);
+		reg_w(gspca_dev, 0xe0, 0x01);
+		set_led(gspca_dev, 0);
+		reg_w(gspca_dev, 0xe0, 0x00);
+	} else if ((sensor_id & 0xfff0) == 0x9710) {
+		const char *p;
+		int l;
+
+		sd->sensor = SENSOR_OV971x;
+
+		gspca_dev->cam.cam_mode = ov971x_mode;
+		gspca_dev->cam.nmodes = ARRAY_SIZE(ov971x_mode);
+
+		/* no control yet */
+		gspca_dev->ctrl_dis = (1 << NCTRLS) - 1;
+
+		gspca_dev->cam.bulk = 1;
+		gspca_dev->cam.bulk_size = 16384;
+		gspca_dev->cam.bulk_nurbs = 2;
+
+		sccb_w_array(gspca_dev, ov971x_init,
+				ARRAY_SIZE(ov971x_init));
+
+		/* set video format on bridge processor */
+		/* access bridge processor's video format registers at: 0x00 */
+		reg_w(gspca_dev, 0x1c, 0x00);
+		/*set register: 0x00 is 'RAW8', 0x40 is 'YUV422' (YUYV?)*/
+		reg_w(gspca_dev, 0x1d, 0x00);
+
+		/* Will W. specific stuff
+		 * set VSYNC to
+		 *	output (0x1f) if first webcam
+		 *	input (0x17) if 2nd or 3rd webcam */
+		p = video_device_node_name(&gspca_dev->vdev);
+		l = strlen(p) - 1;
+		if (p[l] == '0')
+			reg_w(gspca_dev, 0x56, 0x1f);
+		else
+			reg_w(gspca_dev, 0x56, 0x17);
+	} else if ((sensor_id & 0xfff0) == 0x5620) {
+		sd->sensor = SENSOR_OV562x;
+
+		gspca_dev->cam.cam_mode = ov562x_mode;
+		gspca_dev->cam.nmodes = ARRAY_SIZE(ov562x_mode);
+
+		reg_w_array(gspca_dev, ov562x_init,
+				ARRAY_SIZE(ov562x_init));
+		sccb_w_array(gspca_dev, ov562x_init_2,
+				ARRAY_SIZE(ov562x_init_2));
+		reg_w(gspca_dev, 0xe0, 0x00);
+	} else {
+		err("Unknown sensor %04x", sensor_id);
+		return -EINVAL;
+	}
 
 	return gspca_dev->usb_err;
 }
 
 static int sd_start(struct gspca_dev *gspca_dev)
 {
+	struct sd *sd = (struct sd *) gspca_dev;
+
+	if (sd->sensor == SENSOR_OV971x || sd->sensor == SENSOR_OV562x)
+		return gspca_dev->usb_err;
 	switch (gspca_dev->curr_mode) {
 	case QVGA_MODE:			/* 320x240 */
-		sccb_w_array(gspca_dev, sensor_start_1_vga,
-				ARRAY_SIZE(sensor_start_1_vga));
+		sccb_w_array(gspca_dev, ov965x_start_1_vga,
+				ARRAY_SIZE(ov965x_start_1_vga));
 		reg_w_array(gspca_dev, bridge_start_qvga,
 				ARRAY_SIZE(bridge_start_qvga));
-		sccb_w_array(gspca_dev, sensor_start_2_qvga,
-				ARRAY_SIZE(sensor_start_2_qvga));
+		sccb_w_array(gspca_dev, ov965x_start_2_qvga,
+				ARRAY_SIZE(ov965x_start_2_qvga));
 		break;
 	case VGA_MODE:			/* 640x480 */
-		sccb_w_array(gspca_dev, sensor_start_1_vga,
-				ARRAY_SIZE(sensor_start_1_vga));
+		sccb_w_array(gspca_dev, ov965x_start_1_vga,
+				ARRAY_SIZE(ov965x_start_1_vga));
 		reg_w_array(gspca_dev, bridge_start_vga,
 				ARRAY_SIZE(bridge_start_vga));
-		sccb_w_array(gspca_dev, sensor_start_2_vga,
-				ARRAY_SIZE(sensor_start_2_vga));
+		sccb_w_array(gspca_dev, ov965x_start_2_vga,
+				ARRAY_SIZE(ov965x_start_2_vga));
 		break;
 	case SVGA_MODE:			/* 800x600 */
-		sccb_w_array(gspca_dev, sensor_start_1_svga,
-				ARRAY_SIZE(sensor_start_1_svga));
+		sccb_w_array(gspca_dev, ov965x_start_1_svga,
+				ARRAY_SIZE(ov965x_start_1_svga));
 		reg_w_array(gspca_dev, bridge_start_svga,
 				ARRAY_SIZE(bridge_start_svga));
-		sccb_w_array(gspca_dev, sensor_start_2_svga,
-				ARRAY_SIZE(sensor_start_2_svga));
+		sccb_w_array(gspca_dev, ov965x_start_2_svga,
+				ARRAY_SIZE(ov965x_start_2_svga));
 		break;
 	case XGA_MODE:			/* 1024x768 */
-		sccb_w_array(gspca_dev, sensor_start_1_xga,
-				ARRAY_SIZE(sensor_start_1_xga));
+		sccb_w_array(gspca_dev, ov965x_start_1_xga,
+				ARRAY_SIZE(ov965x_start_1_xga));
 		reg_w_array(gspca_dev, bridge_start_xga,
 				ARRAY_SIZE(bridge_start_xga));
-		sccb_w_array(gspca_dev, sensor_start_2_svga,
-				ARRAY_SIZE(sensor_start_2_svga));
+		sccb_w_array(gspca_dev, ov965x_start_2_svga,
+				ARRAY_SIZE(ov965x_start_2_svga));
 		break;
 	default:
 /*	case SXGA_MODE:			 * 1280x1024 */
-		sccb_w_array(gspca_dev, sensor_start_1_sxga,
-				ARRAY_SIZE(sensor_start_1_sxga));
+		sccb_w_array(gspca_dev, ov965x_start_1_sxga,
+				ARRAY_SIZE(ov965x_start_1_sxga));
 		reg_w_array(gspca_dev, bridge_start_sxga,
 				ARRAY_SIZE(bridge_start_sxga));
-		sccb_w_array(gspca_dev, sensor_start_2_sxga,
-				ARRAY_SIZE(sensor_start_2_sxga));
+		sccb_w_array(gspca_dev, ov965x_start_2_sxga,
+				ARRAY_SIZE(ov965x_start_2_sxga));
 		break;
 	}
-	setfreq(gspca_dev);
+	setlightfreq(gspca_dev);
 	setautogain(gspca_dev);
 	setbrightness(gspca_dev);
 	setcontrast(gspca_dev);
@@ -1198,9 +1443,11 @@
 	__u32 this_pts;
 	u8 this_fid;
 	int remaining_len = len;
+	int payload_len;
 
+	payload_len = gspca_dev->cam.bulk ? 2048 : 2040;
 	do {
-		len = min(remaining_len, 2040);
+		len = min(remaining_len, payload_len);
 
 		/* Payloads are prefixed with a UVC-style header.  We
 		   consider a frame to start when the FID toggles, or the PTS
@@ -1262,138 +1509,6 @@
 	} while (remaining_len > 0);
 }
 
-/* controls */
-static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->brightness = val;
-	if (gspca_dev->streaming)
-		setbrightness(gspca_dev);
-	return gspca_dev->usb_err;
-}
-
-static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	*val = sd->brightness;
-	return 0;
-}
-
-static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->contrast = val;
-	if (gspca_dev->streaming)
-		setcontrast(gspca_dev);
-	return gspca_dev->usb_err;
-}
-
-static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	*val = sd->contrast;
-	return 0;
-}
-
-static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->autogain = val;
-
-	if (gspca_dev->streaming) {
-		if (val)
-			gspca_dev->ctrl_inac |= (1 << EXPO_IDX);
-		else
-			gspca_dev->ctrl_inac &= ~(1 << EXPO_IDX);
-		setautogain(gspca_dev);
-	}
-	return gspca_dev->usb_err;
-}
-
-static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	*val = sd->autogain;
-	return 0;
-}
-
-static int sd_setexposure(struct gspca_dev *gspca_dev, __s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->exposure = val;
-	if (gspca_dev->streaming)
-		setexposure(gspca_dev);
-	return gspca_dev->usb_err;
-}
-
-static int sd_getexposure(struct gspca_dev *gspca_dev, __s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	*val = sd->exposure;
-	return 0;
-}
-
-static int sd_setsharpness(struct gspca_dev *gspca_dev, __s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->sharpness = val;
-	if (gspca_dev->streaming)
-		setsharpness(gspca_dev);
-	return gspca_dev->usb_err;
-}
-
-static int sd_getsharpness(struct gspca_dev *gspca_dev, __s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	*val = sd->sharpness;
-	return 0;
-}
-
-static int sd_setsatur(struct gspca_dev *gspca_dev, __s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->satur = val;
-	if (gspca_dev->streaming)
-		setsatur(gspca_dev);
-	return gspca_dev->usb_err;
-}
-
-static int sd_getsatur(struct gspca_dev *gspca_dev, __s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	*val = sd->satur;
-	return 0;
-}
-static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->freq = val;
-	if (gspca_dev->streaming)
-		setfreq(gspca_dev);
-	return gspca_dev->usb_err;
-}
-
-static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	*val = sd->freq;
-	return 0;
-}
-
 static int sd_querymenu(struct gspca_dev *gspca_dev,
 			struct v4l2_querymenu *menu)
 {
@@ -1419,7 +1534,7 @@
 static const struct sd_desc sd_desc = {
 	.name     = MODULE_NAME,
 	.ctrls    = sd_ctrls,
-	.nctrls   = ARRAY_SIZE(sd_ctrls),
+	.nctrls   = NCTRLS,
 	.config   = sd_config,
 	.init     = sd_init,
 	.start    = sd_start,
@@ -1430,7 +1545,9 @@
 
 /* -- module initialisation -- */
 static const struct usb_device_id device_table[] = {
+	{USB_DEVICE(0x05a9, 0x8065)},
 	{USB_DEVICE(0x06f8, 0x3003)},
+	{USB_DEVICE(0x05a9, 0x1550)},
 	{}
 };
 
@@ -1454,16 +1571,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/ov534.c linux-3.0.82x/drivers/media/video/gspca/ov534.c
--- linux-3.0.82/drivers/media/video/gspca/ov534.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/ov534.c	2017-09-23 03:42:49.474676726 +0800
@@ -28,6 +28,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "ov534"
 
 #include "gspca.h"
@@ -775,7 +777,7 @@
 			      USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 			      0x00, reg, gspca_dev->usb_buf, 1, CTRL_TIMEOUT);
 	if (ret < 0) {
-		err("write failed %d", ret);
+		pr_err("write failed %d\n", ret);
 		gspca_dev->usb_err = ret;
 	}
 }
@@ -794,7 +796,7 @@
 			      0x00, reg, gspca_dev->usb_buf, 1, CTRL_TIMEOUT);
 	PDEBUG(D_USBI, "GET 01 0000 %04x %02x", reg, gspca_dev->usb_buf[0]);
 	if (ret < 0) {
-		err("read failed %d", ret);
+		pr_err("read failed %d\n", ret);
 		gspca_dev->usb_err = ret;
 	}
 	return gspca_dev->usb_buf[0];
@@ -858,7 +860,7 @@
 	ov534_reg_write(gspca_dev, OV534_REG_OPERATION, OV534_OP_WRITE_3);
 
 	if (!sccb_check_status(gspca_dev)) {
-		err("sccb_reg_write failed");
+		pr_err("sccb_reg_write failed\n");
 		gspca_dev->usb_err = -EIO;
 	}
 }
@@ -868,11 +870,11 @@
 	ov534_reg_write(gspca_dev, OV534_REG_SUBADDR, reg);
 	ov534_reg_write(gspca_dev, OV534_REG_OPERATION, OV534_OP_WRITE_2);
 	if (!sccb_check_status(gspca_dev))
-		err("sccb_reg_read failed 1");
+		pr_err("sccb_reg_read failed 1\n");
 
 	ov534_reg_write(gspca_dev, OV534_REG_OPERATION, OV534_OP_READ_2);
 	if (!sccb_check_status(gspca_dev))
-		err("sccb_reg_read failed 2");
+		pr_err("sccb_reg_read failed 2\n");
 
 	return ov534_reg_read(gspca_dev, OV534_REG_READ);
 }
@@ -1050,7 +1052,6 @@
 				sccb_reg_read(gspca_dev, 0x13) & ~0x04);
 		sccb_reg_write(gspca_dev, 0x64,
 				sccb_reg_read(gspca_dev, 0x64) & ~0x03);
-
 		setgain(gspca_dev);
 	}
 }
@@ -1204,7 +1205,7 @@
 
 	/* reset bridge */
 	ov534_reg_write(gspca_dev, 0xe7, 0x3a);
-	ov534_reg_write(gspca_dev, 0xe0, 0x08);
+	ov534_reg_write(gspca_dev, 0xe0, 0x08);	/* block stream */
 	msleep(100);
 
 	/* initialize the sensor address */
@@ -1317,7 +1318,7 @@
 	setlightfreq(gspca_dev);
 
 	ov534_set_led(gspca_dev, 1);
-	ov534_reg_write(gspca_dev, 0xe0, 0x00);
+	ov534_reg_write(gspca_dev, 0xe0, 0x00);	/* start stream */
 	return gspca_dev->usb_err;
 }
 
@@ -1531,16 +1532,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/pac207.c linux-3.0.82x/drivers/media/video/gspca/pac207.c
--- linux-3.0.82/drivers/media/video/gspca/pac207.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/pac207.c	2017-09-23 03:42:49.478676714 +0800
@@ -23,6 +23,8 @@
  *
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "pac207"
 
 #include <linux/input.h>
@@ -39,14 +41,14 @@
 #define PAC207_BRIGHTNESS_DEFAULT	46
 
 #define PAC207_EXPOSURE_MIN		3
-#define PAC207_EXPOSURE_MAX		26
+#define PAC207_EXPOSURE_MAX		90 /* 1 sec expo time / 1 fps */
 #define PAC207_EXPOSURE_DEFAULT		5 /* power on default: 3 */
-#define PAC207_EXPOSURE_KNEE		8 /* 4 = 30 fps, 11 = 8, 15 = 6 */
+#define PAC207_EXPOSURE_KNEE		9 /* fps: 90 / exposure -> 9: 10 fps */
 
 #define PAC207_GAIN_MIN			0
 #define PAC207_GAIN_MAX			31
-#define PAC207_GAIN_DEFAULT		9 /* power on default: 9 */
-#define PAC207_GAIN_KNEE		31
+#define PAC207_GAIN_DEFAULT		7 /* power on default: 9 */
+#define PAC207_GAIN_KNEE		15
 
 #define PAC207_AUTOGAIN_DEADZONE	30
 
@@ -178,8 +180,8 @@
 			0x00, index,
 			gspca_dev->usb_buf, length, PAC207_CTRL_TIMEOUT);
 	if (err < 0)
-		err("Failed to write registers to index 0x%04X, error %d)",
-			index, err);
+		pr_err("Failed to write registers to index 0x%04X, error %d\n",
+		       index, err);
 
 	return err;
 }
@@ -194,8 +196,8 @@
 			USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,
 			value, index, NULL, 0, PAC207_CTRL_TIMEOUT);
 	if (err)
-		err("Failed to write a register (index 0x%04X,"
-			" value 0x%02X, error %d)", index, value, err);
+		pr_err("Failed to write a register (index 0x%04X, value 0x%02X, error %d)\n",
+		       index, value, err);
 
 	return err;
 }
@@ -210,8 +212,8 @@
 			0x00, index,
 			gspca_dev->usb_buf, 1, PAC207_CTRL_TIMEOUT);
 	if (res < 0) {
-		err("Failed to read a register (index 0x%04X, error %d)",
-			index, res);
+		pr_err("Failed to read a register (index 0x%04X, error %d)\n",
+		       index, res);
 		return res;
 	}
 
@@ -330,7 +332,7 @@
 	if (sd->autogain_ignore_frames > 0)
 		sd->autogain_ignore_frames--;
 	else if (gspca_auto_gain_n_exposure(gspca_dev, avg_lum,
-			100, PAC207_AUTOGAIN_DEADZONE,
+			90, PAC207_AUTOGAIN_DEADZONE,
 			PAC207_GAIN_KNEE, PAC207_EXPOSURE_KNEE))
 		sd->autogain_ignore_frames = PAC_AUTOGAIN_IGNORE_FRAMES;
 }
@@ -567,15 +569,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/pac7302.c linux-3.0.82x/drivers/media/video/gspca/pac7302.c
--- linux-3.0.82/drivers/media/video/gspca/pac7302.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/pac7302.c	2017-09-23 03:42:49.478676714 +0800
@@ -1,8 +1,8 @@
 /*
- *		Pixart PAC7302 library
- *		Copyright (C) 2005 Thomas Kaiser thomas@kaiser-linux.li
+ * Pixart PAC7302 driver
  *
- * V4L2 by Jean-Francois Moine <http://moinejf.free.fr>
+ * Copyright (C) 2008-2012 Jean-Francois Moine <http://moinejf.free.fr>
+ * Copyright (C) 2005 Thomas Kaiser thomas@kaiser-linux.li
  *
  * Separated from Pixart PAC7311 library by MÃ¡rton NÃ©meth
  * Camera button input handling by MÃ¡rton NÃ©meth <nm127@freemail.hu>
@@ -51,77 +51,100 @@
    -----+------------+---------------------------------------------------
     0   | 0x0f..0x20 | setcolors()
     0   | 0xa2..0xab | setbrightcont()
-    0   | 0xc5       | setredbalance()
-    0   | 0xc6       | setwhitebalance()
-    0   | 0xc7       | setbluebalance()
+    0   | 0xc4..0xc7 | setwhitebalance()
     0   | 0xdc       | setbrightcont(), setcolors()
-    3   | 0x02       | setexposure()
-    3   | 0x10       | setgain()
+    1	| 0x80       | setexposure()
+    3   | 0x03/0x80  | setexposure()
+    3   | 0x04/0x05  | setgain()
     3   | 0x11       | setcolors(), setgain(), setexposure(), sethvflip()
+    3	| 0x12       | setgain()
     3   | 0x21       | sethvflip()
+
+- (jfm) from ms-win traces:
+	- the autogain/autoexposure uses the registers
+		0-b6,
+		1-80,
+		3-03, 04, 05, 10, 12, 80
+	- the values of these registers are correlated
 */
 
-#define MODULE_NAME "pac7302"
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 
 #include <linux/input.h>
 #include <media/v4l2-chip-ident.h>
 #include "gspca.h"
 
-MODULE_AUTHOR("Thomas Kaiser thomas@kaiser-linux.li");
+//new autogain
+#define NEWAGC 1
+//+ new new agc
+#define NEWAGC2 1
+//new pkt_scan
+#define NEWPKT
+
+#ifndef NEWPKT
+/* Include pac common sof detection functions */
+#include "pac_common.h"
+#endif
+
+MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>, "
+		"Thomas Kaiser thomas@kaiser-linux.li");
 MODULE_DESCRIPTION("Pixart PAC7302");
 MODULE_LICENSE("GPL");
 
+
+enum e_ctrl {
+	BRIGHTNESS,
+	CONTRAST,
+	COLORS,
+	WHITE_BALANCE,
+#ifndef NEWAGC
+	GAIN,
+#endif
+	AUTOGAIN,
+	EXPOSURE,
+	VFLIP,
+	HFLIP,
+	NCTRLS		/* number of controls */
+};
+
 /* specific webcam descriptor for pac7302 */
 struct sd {
 	struct gspca_dev gspca_dev;		/* !! must be the first item */
 
-	unsigned char brightness;
-	unsigned char contrast;
-	unsigned char colors;
-	unsigned char white_balance;
-	unsigned char red_balance;
-	unsigned char blue_balance;
-	unsigned char gain;
-	unsigned char autogain;
-	unsigned short exposure;
-	__u8 hflip;
-	__u8 vflip;
+	struct gspca_ctrl ctrls[NCTRLS];
+
+#ifdef NEWAGC
+	u8 old_expo;
+#endif
+
 	u8 flags;
 #define FL_HFLIP 0x01		/* mirrored by default */
 #define FL_VFLIP 0x02		/* vertical flipped by default */
 
+#ifndef NEWPKT
 	u8 sof_read;
-	u8 autogain_ignore_frames;
+#endif
+	s8 autogain_ignore_frames;
+#ifdef NEWAGC
+#define AGC_CNT 5		/* counter of frames for autogain */
+#endif
 
 	atomic_t avg_lum;
 };
 
 /* V4L2 controls supported by the driver */
-static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
-static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
-static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val);
-static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val);
-static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val);
-static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val);
-static int sd_setwhitebalance(struct gspca_dev *gspca_dev, __s32 val);
-static int sd_getwhitebalance(struct gspca_dev *gspca_dev, __s32 *val);
-static int sd_setredbalance(struct gspca_dev *gspca_dev, __s32 val);
-static int sd_getredbalance(struct gspca_dev *gspca_dev, __s32 *val);
-static int sd_setbluebalance(struct gspca_dev *gspca_dev, __s32 val);
-static int sd_getbluebalance(struct gspca_dev *gspca_dev, __s32 *val);
-static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val);
-static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val);
-static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val);
-static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val);
-static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val);
-static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val);
-static int sd_setgain(struct gspca_dev *gspca_dev, __s32 val);
-static int sd_getgain(struct gspca_dev *gspca_dev, __s32 *val);
-static int sd_setexposure(struct gspca_dev *gspca_dev, __s32 val);
-static int sd_getexposure(struct gspca_dev *gspca_dev, __s32 *val);
+static void setbrightcont(struct gspca_dev *gspca_dev);
+static void setcolors(struct gspca_dev *gspca_dev);
+static void setwhitebalance(struct gspca_dev *gspca_dev);
+#ifndef NEWAGC
+static void setgain(struct gspca_dev *gspca_dev);
+#endif
+static void setexposure(struct gspca_dev *gspca_dev);
+static void setautogain(struct gspca_dev *gspca_dev);
+static void sethvflip(struct gspca_dev *gspca_dev);
 
 static const struct ctrl sd_ctrls[] = {
-	{
+[BRIGHTNESS] = {
 	    {
 		.id      = V4L2_CID_BRIGHTNESS,
 		.type    = V4L2_CTRL_TYPE_INTEGER,
@@ -130,13 +153,11 @@
 #define BRIGHTNESS_MAX 0x20
 		.maximum = BRIGHTNESS_MAX,
 		.step    = 1,
-#define BRIGHTNESS_DEF 0x10
-		.default_value = BRIGHTNESS_DEF,
+		.default_value = 0x10,
 	    },
-	    .set = sd_setbrightness,
-	    .get = sd_getbrightness,
+	    .set_control = setbrightcont
 	},
-	{
+[CONTRAST] = {
 	    {
 		.id      = V4L2_CID_CONTRAST,
 		.type    = V4L2_CTRL_TYPE_INTEGER,
@@ -145,13 +166,11 @@
 #define CONTRAST_MAX 255
 		.maximum = CONTRAST_MAX,
 		.step    = 1,
-#define CONTRAST_DEF 127
-		.default_value = CONTRAST_DEF,
+		.default_value = 127,
 	    },
-	    .set = sd_setcontrast,
-	    .get = sd_getcontrast,
+	    .set_control = setbrightcont
 	},
-	{
+[COLORS] = {
 	    {
 		.id      = V4L2_CID_SATURATION,
 		.type    = V4L2_CTRL_TYPE_INTEGER,
@@ -160,86 +179,61 @@
 #define COLOR_MAX 255
 		.maximum = COLOR_MAX,
 		.step    = 1,
-#define COLOR_DEF 127
-		.default_value = COLOR_DEF,
+		.default_value = 127
 	    },
-	    .set = sd_setcolors,
-	    .get = sd_getcolors,
+	    .set_control = setcolors
 	},
-	{
+[WHITE_BALANCE] = {
 	    {
 		.id      = V4L2_CID_WHITE_BALANCE_TEMPERATURE,
 		.type    = V4L2_CTRL_TYPE_INTEGER,
 		.name    = "White Balance",
-		.minimum = 0,
-		.maximum = 255,
+		.minimum = -80,
+		.maximum = 80,
 		.step    = 1,
-#define WHITEBALANCE_DEF 4
-		.default_value = WHITEBALANCE_DEF,
+		.default_value = 0,
 	    },
-	    .set = sd_setwhitebalance,
-	    .get = sd_getwhitebalance,
+	    .set_control = setwhitebalance
 	},
-	{
-	    {
-		.id      = V4L2_CID_RED_BALANCE,
-		.type    = V4L2_CTRL_TYPE_INTEGER,
-		.name    = "Red",
-		.minimum = 0,
-		.maximum = 3,
-		.step    = 1,
-#define REDBALANCE_DEF 1
-		.default_value = REDBALANCE_DEF,
-	    },
-	    .set = sd_setredbalance,
-	    .get = sd_getredbalance,
-	},
-	{
-	    {
-		.id      = V4L2_CID_BLUE_BALANCE,
-		.type    = V4L2_CTRL_TYPE_INTEGER,
-		.name    = "Blue",
-		.minimum = 0,
-		.maximum = 3,
-		.step    = 1,
-#define BLUEBALANCE_DEF 1
-		.default_value = BLUEBALANCE_DEF,
-	    },
-	    .set = sd_setbluebalance,
-	    .get = sd_getbluebalance,
-	},
-	{
+#ifndef NEWAGC
+[GAIN] = {
 	    {
 		.id      = V4L2_CID_GAIN,
 		.type    = V4L2_CTRL_TYPE_INTEGER,
 		.name    = "Gain",
-		.minimum = 0,
+#define GAIN_DEF 127
 #define GAIN_MAX 255
+#define GAIN_KNEE 255 /* Gain seems to cause little noise on the pac73xx */
+		.minimum = 0,
 		.maximum = GAIN_MAX,
 		.step    = 1,
-#define GAIN_DEF 127
-#define GAIN_KNEE 255 /* Gain seems to cause little noise on the pac73xx */
 		.default_value = GAIN_DEF,
 	    },
-	    .set = sd_setgain,
-	    .get = sd_getgain,
+	    .set_control = setgain
 	},
-	{
+#endif
+[EXPOSURE] = {
 	    {
 		.id      = V4L2_CID_EXPOSURE,
 		.type    = V4L2_CTRL_TYPE_INTEGER,
 		.name    = "Exposure",
 		.minimum = 0,
+#ifndef NEWAGC
 		.maximum = 1023,
 		.step    = 1,
 #define EXPOSURE_DEF  66  /*  33 ms / 30 fps */
 #define EXPOSURE_KNEE 133 /*  66 ms / 15 fps */
+#else	/* NEWAGC */
+#define EXPOSURE_MAX  0x3f
+		.maximum = EXPOSURE_MAX,
+		.step    = 1,
+#define EXPOSURE_DEF  4
+#endif
 		.default_value = EXPOSURE_DEF,
 	    },
-	    .set = sd_setexposure,
-	    .get = sd_getexposure,
+	    .set_control = setexposure
 	},
-	{
+[AUTOGAIN] = {
 	    {
 		.id      = V4L2_CID_AUTOGAIN,
 		.type    = V4L2_CTRL_TYPE_BOOLEAN,
@@ -250,10 +244,9 @@
 #define AUTOGAIN_DEF 1
 		.default_value = AUTOGAIN_DEF,
 	    },
-	    .set = sd_setautogain,
-	    .get = sd_getautogain,
+	    .set_control = setautogain,
 	},
-	{
+[HFLIP] = {
 	    {
 		.id      = V4L2_CID_HFLIP,
 		.type    = V4L2_CTRL_TYPE_BOOLEAN,
@@ -261,13 +254,11 @@
 		.minimum = 0,
 		.maximum = 1,
 		.step    = 1,
-#define HFLIP_DEF 0
-		.default_value = HFLIP_DEF,
+		.default_value = 0,
 	    },
-	    .set = sd_sethflip,
-	    .get = sd_gethflip,
+	    .set_control = sethvflip,
 	},
-	{
+[VFLIP] = {
 	    {
 		.id      = V4L2_CID_VFLIP,
 		.type    = V4L2_CTRL_TYPE_BOOLEAN,
@@ -275,11 +266,9 @@
 		.minimum = 0,
 		.maximum = 1,
 		.step    = 1,
-#define VFLIP_DEF 0
-		.default_value = VFLIP_DEF,
+		.default_value = 0,
 	    },
-	    .set = sd_setvflip,
-	    .get = sd_getvflip,
+	    .set_control = sethvflip
 	},
 };
 
@@ -288,28 +277,29 @@
 		.bytesperline = 640,
 		.sizeimage = 640 * 480 * 3 / 8 + 590,
 		.colorspace = V4L2_COLORSPACE_JPEG,
-		.priv = 0},
+	},
 };
 
 #define LOAD_PAGE3		255
 #define END_OF_SEQUENCE		0
 
 /* pac 7302 */
-static const __u8 init_7302[] = {
+static const u8 init_7302[] = {
 /*	index,value */
 	0xff, 0x01,		/* page 1 */
 	0x78, 0x00,		/* deactivate */
 	0xff, 0x01,
 	0x78, 0x40,		/* led off */
 };
-static const __u8 start_7302[] = {
+static const u8 start_7302[] = {
 /*	index, len, [value]* */
 	0xff, 1,	0x00,		/* page 0 */
 	0x00, 12,	0x01, 0x40, 0x40, 0x40, 0x01, 0xe0, 0x02, 0x80,
 			0x00, 0x00, 0x00, 0x00,
-	0x0d, 24,	0x03, 0x01, 0x00, 0xb5, 0x07, 0xcb, 0x00, 0x00,
-			0x07, 0xc8, 0x00, 0xea, 0x07, 0xcf, 0x07, 0xf7,
-			0x07, 0x7e, 0x01, 0x0b, 0x00, 0x00, 0x00, 0x11,
+//--fixme: setcolors (start 0f..20) without page nor dc 01
+	0x0d, 24,	0x03, 0x01, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x11,
 	0x26, 2,	0xaa, 0xaa,
 	0x2e, 1,	0x31,
 	0x38, 1,	0x01,
@@ -317,18 +307,20 @@
 	0x43, 11,	0x00, 0x0a, 0x18, 0x11, 0x01, 0x2c, 0x88, 0x11,
 			0x00, 0x54, 0x11,
 	0x55, 1,	0x00,
-	0x62, 4, 	0x10, 0x1e, 0x1e, 0x18,
+	0x62, 4,	0x10, 0x1e, 0x1e, 0x18,
 	0x6b, 1,	0x00,
 	0x6e, 3,	0x08, 0x06, 0x00,
 	0x72, 3,	0x00, 0xff, 0x00,
 	0x7d, 23,	0x01, 0x01, 0x58, 0x46, 0x50, 0x3c, 0x50, 0x3c,
 			0x54, 0x46, 0x54, 0x56, 0x52, 0x50, 0x52, 0x50,
 			0x56, 0x64, 0xa4, 0x00, 0xda, 0x00, 0x00,
-	0xa2, 10,	0x22, 0x2c, 0x3c, 0x54, 0x69, 0x7c, 0x9c, 0xb9,
-			0xd2, 0xeb,
+//--fixme: setbrightcont without page nor dc 01
+	0xa2, 10,	0x08, 0x11, 0x1f, 0x37, 0x4a, 0x5d, 0x7d, 0x9a,
+			0xb6, 0xcf,
 	0xaf, 1,	0x02,
 	0xb5, 2,	0x08, 0x08,
 	0xb8, 2,	0x08, 0x88,
+//--fixme: setwhitebalance
 	0xc4, 4,	0xae, 0x01, 0x04, 0x01,
 	0xcc, 1,	0x00,
 	0xd1, 11,	0x01, 0x30, 0x49, 0x5e, 0x6f, 0x7f, 0x8e, 0xa9,
@@ -339,7 +331,7 @@
 	0x3e, 2,	0x00, 0x00,
 	0x76, 5,	0x01, 0x20, 0x40, 0x00, 0xf2,
 	0x7c, 1,	0x00,
-	0x7f, 10,	0x4b, 0x0f, 0x01, 0x2c, 0x02, 0x58, 0x03, 0x20,
+	0x7f, 10,	0x4b, 0x0b, 0x01, 0x2c, 0x02, 0x58, 0x03, 0x20,
 			0x02, 0x00,
 	0x96, 5,	0x01, 0x10, 0x04, 0x01, 0x04,
 	0xc8, 14,	0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00,
@@ -368,11 +360,12 @@
 
 #define SKIP		0xaa
 /* page 3 - the value SKIP says skip the index - see reg_w_page() */
-static const __u8 page3_7302[] = {
-	0x90, 0x40, 0x03, 0x00, 0xc0, 0x01, 0x14, 0x16,
-	0x14, 0x12, 0x00, 0x00, 0x00, 0x02, 0x33, 0x00,
+static const u8 page3_7302[] = {
+	0x90, 0x40, 0x03, 0xf4, 0xe7, 0x01, 0x14, 0x16,
+	0x14, 0x12, 0x00, 0x00, 0x00, 0x02, 0x02, 0x00,
 	0x0f, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 	0x00, 0x00, 0x00, 0x47, 0x01, 0xb3, 0x01, 0x00,
+//--fixme: 21 = sethvflip
 	0x00, 0x08, 0x00, 0x00, 0x0d, 0x00, 0x00, 0x21,
 	0x00, 0x00, 0x00, 0x54, 0xf4, 0x02, 0x52, 0x54,
 	0xa4, 0xb8, 0xe0, 0x2a, 0xf6, 0x00, 0x00, 0x00,
@@ -385,14 +378,14 @@
 	0x00, 0x00, 0x00, 0x00, 0x00, 0xc8, 0xc8, 0xc8,
 	0xc8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50,
 	0x08, 0x10, 0x24, 0x40, 0x00, 0x00, 0x00, 0x00,
-	0x01, 0x00, 0x02, 0x47, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x02, 0x47, 0x00, 0x00, 0x00, 0x00,
 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 	0x00, 0x02, 0xfa, 0x00, 0x64, 0x5a, 0x28, 0x00,
 	0x00
 };
 
 static void reg_w_buf(struct gspca_dev *gspca_dev,
-		  __u8 index,
+		u8 index,
 		  const u8 *buffer, int len)
 {
 	int ret;
@@ -408,16 +401,16 @@
 			index, gspca_dev->usb_buf, len,
 			500);
 	if (ret < 0) {
-		err("reg_w_buf failed index 0x%02x, error %d",
-			index, ret);
+		pr_err("reg_w_buf failed i: %02x error %d\n",
+		       index, ret);
 		gspca_dev->usb_err = ret;
 	}
 }
 
 
 static void reg_w(struct gspca_dev *gspca_dev,
-		  __u8 index,
-		  __u8 value)
+		u8 index,
+		u8 value)
 {
 	int ret;
 
@@ -431,14 +424,14 @@
 			0, index, gspca_dev->usb_buf, 1,
 			500);
 	if (ret < 0) {
-		err("reg_w() failed index 0x%02x, value 0x%02x, error %d",
-			index, value, ret);
+		pr_err("reg_w() failed i: %02x v: %02x error %d\n",
+		       index, value, ret);
 		gspca_dev->usb_err = ret;
 	}
 }
 
 static void reg_w_seq(struct gspca_dev *gspca_dev,
-		const __u8 *seq, int len)
+		const u8 *seq, int len)
 {
 	while (--len >= 0) {
 		reg_w(gspca_dev, seq[0], seq[1]);
@@ -448,7 +441,7 @@
 
 /* load the beginning of a page */
 static void reg_w_page(struct gspca_dev *gspca_dev,
-			const __u8 *page, int len)
+			const u8 *page, int len)
 {
 	int index;
 	int ret = 0;
@@ -466,9 +459,8 @@
 				0, index, gspca_dev->usb_buf, 1,
 				500);
 		if (ret < 0) {
-			err("reg_w_page() failed index 0x%02x, "
-			"value 0x%02x, error %d",
-				index, page[index], ret);
+			pr_err("reg_w_page() failed i: %02x v: %02x error %d\n",
+			       index, page[index], ret);
 			gspca_dev->usb_err = ret;
 			break;
 		}
@@ -477,8 +469,8 @@
 
 /* output a variable sequence */
 static void reg_w_var(struct gspca_dev *gspca_dev,
-			const __u8 *seq,
-			const __u8 *page3, unsigned int page3_len)
+			const u8 *seq,
+			const u8 *page3, unsigned int page3_len)
 {
 	int index, len;
 
@@ -492,11 +484,13 @@
 			reg_w_page(gspca_dev, page3, page3_len);
 			break;
 		default:
+#ifdef GSPCA_DEBUG
 			if (len > USB_BUF_SZ) {
 				PDEBUG(D_ERR|D_STREAM,
 					"Incorrect variable sequence");
 				return;
 			}
+#endif
 			while (len > 0) {
 				if (len < 8) {
 					reg_w_buf(gspca_dev,
@@ -523,21 +517,11 @@
 
 	cam = &gspca_dev->cam;
 
-	PDEBUG(D_CONF, "Find Sensor PAC7302");
 	cam->cam_mode = vga_mode;	/* only 640x480 */
 	cam->nmodes = ARRAY_SIZE(vga_mode);
 
-	sd->brightness = BRIGHTNESS_DEF;
-	sd->contrast = CONTRAST_DEF;
-	sd->colors = COLOR_DEF;
-	sd->white_balance = WHITEBALANCE_DEF;
-	sd->red_balance = REDBALANCE_DEF;
-	sd->blue_balance = BLUEBALANCE_DEF;
-	sd->gain = GAIN_DEF;
-	sd->exposure = EXPOSURE_DEF;
-	sd->autogain = AUTOGAIN_DEF;
-	sd->hflip = HFLIP_DEF;
-	sd->vflip = VFLIP_DEF;
+	gspca_dev->cam.ctrls = sd->ctrls;
+
 	sd->flags = id->driver_info;
 	return 0;
 }
@@ -547,19 +531,19 @@
 {
 	struct sd *sd = (struct sd *) gspca_dev;
 	int i, v;
-	static const __u8 max[10] =
+	static const u8 max[10] =
 		{0x29, 0x33, 0x42, 0x5a, 0x6e, 0x80, 0x9f, 0xbb,
 		 0xd4, 0xec};
-	static const __u8 delta[10] =
+	static const u8 delta[10] =
 		{0x35, 0x33, 0x33, 0x2f, 0x2a, 0x25, 0x1e, 0x17,
 		 0x11, 0x0b};
 
 	reg_w(gspca_dev, 0xff, 0x00);		/* page 0 */
 	for (i = 0; i < 10; i++) {
 		v = max[i];
-		v += (sd->brightness - BRIGHTNESS_MAX)
+		v += (sd->ctrls[BRIGHTNESS].val - BRIGHTNESS_MAX)
 			* 150 / BRIGHTNESS_MAX;		/* 200 ? */
-		v -= delta[i] * sd->contrast / CONTRAST_MAX;
+		v -= delta[i] * sd->ctrls[CONTRAST].val / CONTRAST_MAX;
 		if (v < 0)
 			v = 0;
 		else if (v > 0xff)
@@ -583,53 +567,42 @@
 	reg_w(gspca_dev, 0x11, 0x01);
 	reg_w(gspca_dev, 0xff, 0x00);			/* page 0 */
 	for (i = 0; i < 9; i++) {
-		v = a[i] * sd->colors / COLOR_MAX + b[i];
+		v = a[i] * sd->ctrls[COLORS].val / COLOR_MAX + b[i];
 		reg_w(gspca_dev, 0x0f + 2 * i, (v >> 8) & 0x07);
 		reg_w(gspca_dev, 0x0f + 2 * i + 1, v);
 	}
 	reg_w(gspca_dev, 0xdc, 0x01);
-	PDEBUG(D_CONF|D_STREAM, "color: %i", sd->colors);
 }
 
+/*
+ * The registers c4/c5 and c6/c7 of the page 0 (LE) permit
+ * to adjust the red and blue colors.
+ * They may vary from 0x101 to 0x1aa.
+ */
 static void setwhitebalance(struct gspca_dev *gspca_dev)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
+	u16 red, blue;
 
-	reg_w(gspca_dev, 0xff, 0x00);		/* page 0 */
-	reg_w(gspca_dev, 0xc6, sd->white_balance);
-
-	reg_w(gspca_dev, 0xdc, 0x01);
-	PDEBUG(D_CONF|D_STREAM, "white_balance: %i", sd->white_balance);
-}
-
-static void setredbalance(struct gspca_dev *gspca_dev)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
+	red = 0x0158 + sd->ctrls[WHITE_BALANCE].val;
+	blue = 0x0158 - sd->ctrls[WHITE_BALANCE].val;
 
 	reg_w(gspca_dev, 0xff, 0x00);		/* page 0 */
-	reg_w(gspca_dev, 0xc5, sd->red_balance);
-
-	reg_w(gspca_dev, 0xdc, 0x01);
-	PDEBUG(D_CONF|D_STREAM, "red_balance: %i", sd->red_balance);
-}
-
-static void setbluebalance(struct gspca_dev *gspca_dev)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	reg_w(gspca_dev, 0xff, 0x00);			/* page 0 */
-	reg_w(gspca_dev, 0xc7, sd->blue_balance);
+	reg_w(gspca_dev, 0xc4, red);
+	reg_w(gspca_dev, 0xc5, red >> 8);
+	reg_w(gspca_dev, 0xc6, blue);
+	reg_w(gspca_dev, 0xc7, blue >> 8);
 
 	reg_w(gspca_dev, 0xdc, 0x01);
-	PDEBUG(D_CONF|D_STREAM, "blue_balance: %i", sd->blue_balance);
 }
 
+#ifndef NEWAGC
 static void setgain(struct gspca_dev *gspca_dev)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
 
 	reg_w(gspca_dev, 0xff, 0x03);			/* page 3 */
-	reg_w(gspca_dev, 0x10, sd->gain >> 3);
+	reg_w(gspca_dev, 0x10, sd->ctrls[GAIN].val >> 3);
 
 	/* load registers to sensor (Bit 0, auto clear) */
 	reg_w(gspca_dev, 0x11, 0x01);
@@ -638,13 +611,13 @@
 static void setexposure(struct gspca_dev *gspca_dev)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
-	__u8 clockdiv;
-	__u16 exposure;
+	u8 clockdiv;
+	u16 exposure;
 
 	/* register 2 of frame 3 contains the clock divider configuring the
 	   no fps according to the formula: 90 / reg. sd->exposure is the
 	   desired exposure time in 0.5 ms. */
-	clockdiv = (90 * sd->exposure + 1999) / 2000;
+	clockdiv = (90 * sd->ctrls[EXPOSURE].val + 1999) / 2000;
 
 	/* Note clockdiv = 3 also works, but when running at 30 fps, depending
 	   on the scene being recorded, the camera switches to another
@@ -663,7 +636,7 @@
 
 	/* frame exposure time in ms = 1000 * clockdiv / 90    ->
 	exposure = (sd->exposure / 2) * 448 / (1000 * clockdiv / 90) */
-	exposure = (sd->exposure * 45 * 448) / (1000 * clockdiv);
+	exposure = (sd->ctrls[EXPOSURE].val * 45 * 448) / (1000 * clockdiv);
 	/* 0 = use full frametime, 448 = no exposure, reverse it */
 	exposure = 448 - exposure;
 
@@ -676,15 +649,115 @@
 	reg_w(gspca_dev, 0x11, 0x01);
 }
 
+#else /* NEWAGC */
+static void setexposure(struct gspca_dev *gspca_dev)
+{
+	struct sd *sd = (struct sd *) gspca_dev;
+	int expo, old_expo;
+	u8 r12;
+	static const struct {
+		u16 r8003, r0504;
+		u8 r1_80, r0_b6;
+	} regs[(EXPOSURE_MAX + 1) >> 2] = {
+		{0x00f4, 0x01e7, 0x0b, 0x08},
+		{0x00f4, 0x01e7, 0x0b, 0x08},
+		{0x00f4, 0x01e7, 0x0b, 0x08},
+		{0x00f4, 0x01e7, 0x0b, 0x08},
+		{0x00f5, 0x022d, 0x0d, 0x07},
+		{0x0150, 0x0259, 0x0f, 0x07},
+		{0x017c, 0x02a5, 0x11, 0x07},
+		{0x017c, 0x0315, 0x11, 0x07},
+		{0x017c, 0x0386, 0x11, 0x07},
+		{0x017c, 0x03f6, 0x11, 0x07},
+		{0x017c, 0x0467, 0x11, 0x07},
+		{0x017c, 0x04d7, 0x11, 0x07},
+		{0x017c, 0x0548, 0x11, 0x06},
+		{0x017c, 0x05b8, 0x11, 0x06},
+		{0x017c, 0x0629, 0x11, 0x06},
+		{0x017c, 0x0699, 0x11, 0x06}
+	};
+
+	expo = sd->ctrls[EXPOSURE].val;
+	old_expo = sd->old_expo;
+
+	if (expo == old_expo)
+		return;
+
+	sd->old_expo = expo;
+
+	reg_w(gspca_dev, 0xff, 0x03);			/* page 3 */
+
+	if (expo < 16)
+		r12 = expo;				/* 00 .. 0f */
+	else
+		r12 = (expo & 0x03) + 0x0c;		/* 0c .. 0f */
+
+	expo >>= 2;					/* regs index */
+	old_expo >>= 2;
+
+	if (regs[expo].r8003 != regs[old_expo].r8003) {
+		reg_w(gspca_dev, 0x03, regs[expo].r8003);
+		reg_w(gspca_dev, 0x80, regs[expo].r8003 >> 8);
+	}
+	if (regs[expo].r0504 != regs[old_expo].r0504) {
+		reg_w(gspca_dev, 0x04, regs[expo].r0504);
+		reg_w(gspca_dev, 0x05, regs[expo].r0504 >> 8);
+	}
+
+	reg_w(gspca_dev, 0x12, r12);
+
+	/* load registers to sensor (Bit 0, auto clear) */
+	reg_w(gspca_dev, 0x11, 0x01);
+
+	if (regs[expo].r1_80 != regs[old_expo].r1_80) {
+		reg_w(gspca_dev, 0xff, 0x01);		/* page 1 */
+		reg_w(gspca_dev, 0x80, regs[expo].r1_80);
+	}
+	if (regs[expo].r0_b6 != regs[old_expo].r0_b6) {
+		reg_w(gspca_dev, 0xff, 0x00);		/* page 0 */
+		reg_w(gspca_dev, 0xb6, regs[expo].r0_b6);
+	}
+}
+#endif
+
+static void setautogain(struct gspca_dev *gspca_dev)
+{
+	struct sd *sd = (struct sd *) gspca_dev;
+#ifndef NEWAGC
+	/* when switching to autogain set defaults to make sure
+	   we are on a valid point of the autogain gain /
+	   exposure knee graph, and give this change time to
+	   take effect before doing autogain. */
+	if (sd->ctrls[AUTOGAIN].val) {
+		sd->ctrls[EXPOSURE].val = EXPOSURE_DEF;
+		sd->ctrls[GAIN].val = GAIN_DEF;
+		sd->autogain_ignore_frames =
+				PAC_AUTOGAIN_IGNORE_FRAMES;
+	} else {
+		sd->autogain_ignore_frames = -1;
+	}
+	setexposure(gspca_dev);
+	setgain(gspca_dev);
+#else /* NEWAGC */
+	if (sd->ctrls[AUTOGAIN].val) {
+		sd->autogain_ignore_frames = AGC_CNT;
+		gspca_dev->ctrl_inac |= (1 << EXPOSURE);
+	} else {
+		sd->autogain_ignore_frames = -1;
+		gspca_dev->ctrl_inac &= ~(1 << EXPOSURE);
+	}
+#endif
+}
+
 static void sethvflip(struct gspca_dev *gspca_dev)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
 	u8 data, hflip, vflip;
 
-	hflip = sd->hflip;
+	hflip = sd->ctrls[HFLIP].val;
 	if (sd->flags & FL_HFLIP)
 		hflip = !hflip;
-	vflip = sd->vflip;
+	vflip = sd->ctrls[VFLIP].val;
 	if (sd->flags & FL_VFLIP)
 		vflip = !vflip;
 
@@ -705,26 +778,27 @@
 
 static int sd_start(struct gspca_dev *gspca_dev)
 {
+#ifndef NEWPKT
+#ifndef NEWAGC
 	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->sof_read = 0;
+#endif
+#endif
 
 	reg_w_var(gspca_dev, start_7302,
 		page3_7302, sizeof(page3_7302));
 	setbrightcont(gspca_dev);
 	setcolors(gspca_dev);
 	setwhitebalance(gspca_dev);
-	setredbalance(gspca_dev);
-	setbluebalance(gspca_dev);
-	setgain(gspca_dev);
-	setexposure(gspca_dev);
+	setautogain(gspca_dev);
 	sethvflip(gspca_dev);
 
 	/* only resolution 640x480 is supported for pac7302 */
-
+#ifndef NEWPKT
 	sd->sof_read = 0;
-	sd->autogain_ignore_frames = 0;
-	atomic_set(&sd->avg_lum, -1);
+#endif
+#ifndef NEWAGC
+	atomic_set(&sd->avg_lum, 270 + sd->ctrls[BRIGHTNESS].val);
+#endif
 
 	/* start stream */
 	reg_w(gspca_dev, 0xff, 0x01);
@@ -750,8 +824,11 @@
 	reg_w(gspca_dev, 0x78, 0x40);
 }
 
-/* Include pac common sof detection functions */
-#include "pac_common.h"
+#ifndef NEWAGC
+/* !! coarse_grained_expo_autogain is not used !! */
+#define exp_too_low_cnt flags
+#define exp_too_high_cnt sof_read
+#include "autogain_functions.h"
 
 static void do_autogain(struct gspca_dev *gspca_dev)
 {
@@ -760,64 +837,117 @@
 	int desired_lum;
 	const int deadzone = 30;
 
-	if (avg_lum == -1)
+	if (sd->autogain_ignore_frames < 0)
 		return;
 
-	desired_lum = 270 + sd->brightness;
-
-	if (sd->autogain_ignore_frames > 0)
+	if (sd->autogain_ignore_frames > 0) {
 		sd->autogain_ignore_frames--;
-	else if (gspca_auto_gain_n_exposure(gspca_dev, avg_lum, desired_lum,
-			deadzone, GAIN_KNEE, EXPOSURE_KNEE))
+	} else {
+		desired_lum = 270 + sd->ctrls[BRIGHTNESS].val;
+		auto_gain_n_exposure(gspca_dev, avg_lum, desired_lum,
+				deadzone, GAIN_KNEE, EXPOSURE_KNEE);
 		sd->autogain_ignore_frames = PAC_AUTOGAIN_IGNORE_FRAMES;
+	}
 }
+#else /* NEWAGC */
+/* do the autogain stuff */
+/* This function is called by the application when it gets an image */
+static void do_autogain(struct gspca_dev *gspca_dev)
+{
+	struct sd *sd = (struct sd *) gspca_dev;
+	int avg_lum, desired_lum, steps, expo;
+#ifndef NEWAGC2
+#define DEAD_ZONE 20
+#else
+#define DEAD_ZONE 200
+#endif
 
-/* JPEG header, part 1 */
-static const unsigned char pac_jpeg_header1[] = {
-  0xff, 0xd8,		/* SOI: Start of Image */
-
-  0xff, 0xc0,		/* SOF0: Start of Frame (Baseline DCT) */
-  0x00, 0x11,		/* length = 17 bytes (including this length field) */
-  0x08			/* Precision: 8 */
-  /* 2 bytes is placed here: number of image lines */
-  /* 2 bytes is placed here: samples per line */
-};
+	if (sd->autogain_ignore_frames < 0)
+		return;
+	if (sd->autogain_ignore_frames > 0) {
+		sd->autogain_ignore_frames--;
+		return;
+	}
+	sd->autogain_ignore_frames = AGC_CNT;
+
+#ifndef NEWAGC2
+	/* The avg_lum is the sum of 2 luminosity bytes.
+	 * Good luminosity values seem to be around 190 (~ 0x60 * 2) */
+	avg_lum = atomic_read(&sd->avg_lum);
+	desired_lum = 190 + sd->ctrls[BRIGHTNESS].val;
+#else
+	/* The avg_lum is the sum of 25 luminosity bytes.
+	 * Good luminosity values seem to be around 3200 (~ 0x80 * 25) */
+	avg_lum = atomic_read(&sd->avg_lum);
+	desired_lum = 3000 + sd->ctrls[BRIGHTNESS].val * 10;
+#endif
+	expo = sd->ctrls[EXPOSURE].val;
+	if (desired_lum > avg_lum + DEAD_ZONE) {
+		steps = (desired_lum - avg_lum) / DEAD_ZONE;
+		expo += steps;
+		if (expo > EXPOSURE_MAX)
+			expo = EXPOSURE_MAX;
+	} else if (desired_lum < avg_lum - DEAD_ZONE) {
+		steps = (avg_lum - desired_lum) / DEAD_ZONE;
+		expo -= steps;
+		if (expo < 0)
+			expo = 0;
+	}
+	if (expo != sd->ctrls[EXPOSURE].val) {
+		sd->ctrls[EXPOSURE].val = expo;
+		setexposure(gspca_dev);
+	}
+}
+#endif
 
-/* JPEG header, continued */
-static const unsigned char pac_jpeg_header2[] = {
-  0x03,			/* Number of image components: 3 */
-  0x01, 0x21, 0x00,	/* ID=1, Subsampling 1x1, Quantization table: 0 */
-  0x02, 0x11, 0x01,	/* ID=2, Subsampling 2x1, Quantization table: 1 */
-  0x03, 0x11, 0x01,	/* ID=3, Subsampling 2x1, Quantization table: 1 */
-
-  0xff, 0xda,		/* SOS: Start Of Scan */
-  0x00, 0x0c,		/* length = 12 bytes (including this length field) */
-  0x03,			/* number of components: 3 */
-  0x01, 0x00,		/* selector 1, table 0x00 */
-  0x02, 0x11,		/* selector 2, table 0x11 */
-  0x03, 0x11,		/* selector 3, table 0x11 */
-  0x00, 0x3f,		/* Spectral selection: 0 .. 63 */
-  0x00			/* Successive approximation: 0 */
+/* JPEG header */
+static const u8 jpeg_header[] = {
+	0xff, 0xd8,	/* SOI: Start of Image */
+
+	0xff, 0xc0,	/* SOF0: Start of Frame (Baseline DCT) */
+	0x00, 0x11,	/* length = 17 bytes (including this length field) */
+	0x08,		/* Precision: 8 */
+	0x02, 0x80,	/* height = 640 (image rotated) */
+	0x01, 0xe0,	/* width = 480 */
+	0x03,		/* Number of image components: 3 */
+	0x01, 0x21, 0x00, /* ID=1, Subsampling 1x1, Quantization table: 0 */
+	0x02, 0x11, 0x01, /* ID=2, Subsampling 2x1, Quantization table: 1 */
+	0x03, 0x11, 0x01, /* ID=3, Subsampling 2x1, Quantization table: 1 */
+
+	0xff, 0xda,	/* SOS: Start Of Scan */
+	0x00, 0x0c,	/* length = 12 bytes (including this length field) */
+	0x03,		/* number of components: 3 */
+	0x01, 0x00,	/* selector 1, table 0x00 */
+	0x02, 0x11,	/* selector 2, table 0x11 */
+	0x03, 0x11,	/* selector 3, table 0x11 */
+	0x00, 0x3f,	/* Spectral selection: 0 .. 63 */
+	0x00		/* Successive approximation: 0 */
 };
 
-static void pac_start_frame(struct gspca_dev *gspca_dev,
-		__u16 lines, __u16 samples_per_line)
+#ifdef NEWPKT
+/* search the start of frame */
+/*
+ * A frame starts with 'ff ff 00 ff 96' (sof).
+ * The sof is always in the first 0x100 bytes of a packet,
+ * and it is aligned on a 2 bytes boundary.
+ */
+static unsigned char *find_sof(u8 *data, int len)
 {
-	unsigned char tmpbuf[4];
-
-	gspca_frame_add(gspca_dev, FIRST_PACKET,
-		pac_jpeg_header1, sizeof(pac_jpeg_header1));
+	static const unsigned char sof[5] =
+		{ 0xff, 0xff, 0x00, 0xff, 0x96 };
 
-	tmpbuf[0] = lines >> 8;
-	tmpbuf[1] = lines & 0xff;
-	tmpbuf[2] = samples_per_line >> 8;
-	tmpbuf[3] = samples_per_line & 0xff;
-
-	gspca_frame_add(gspca_dev, INTER_PACKET,
-		tmpbuf, sizeof(tmpbuf));
-	gspca_frame_add(gspca_dev, INTER_PACKET,
-		pac_jpeg_header2, sizeof(pac_jpeg_header2));
+	if (len > 0x100)
+		len = 0x100;
+	len -= sizeof sof;
+	while (len >= 0) {
+		if (memcmp(data, sof, sizeof sof) == 0)
+			return data + sizeof sof;
+		len -= 2;
+		data += 2;
+	}
+	return NULL;
 }
+#endif
 
 /* this function is run at interrupt level */
 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
@@ -826,10 +956,15 @@
 {
 	struct sd *sd = (struct sd *) gspca_dev;
 	u8 *image;
-	unsigned char *sof;
+	u8 *sof;
 
+#ifndef NEWPKT
 	sof = pac_find_sof(&sd->sof_read, data, len);
+#else
+	sof = find_sof(data, len);
+#endif
 	if (sof) {
+#ifndef NEWAGC2
 		int n, lum_offset, footer_length;
 
 		/* 6 bytes after the FF D9 EOF marker a number of lumination
@@ -841,256 +976,80 @@
 
 		/* Finish decoding current frame */
 		n = (sof - data) - (footer_length + sizeof pac_sof_marker);
-		if (n < 0) {
+
+		if (n < 0)
 			gspca_dev->image_len += n;
-			n = 0;
-		} else {
+		else
 			gspca_frame_add(gspca_dev, INTER_PACKET, data, n);
-		}
 
 		image = gspca_dev->image;
 		if (image != NULL
 		 && image[gspca_dev->image_len - 2] == 0xff
 		 && image[gspca_dev->image_len - 1] == 0xd9)
 			gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
+#else
+		int n;
+
+#define FOOTER_SZ (74 + 5)	/* footer + sof marker */
+
+		/* update the end of the current frame */
+		n = sof - data - FOOTER_SZ;
+		if (n < 0) {
+			gspca_dev->image_len += n;
+			image = gspca_dev->image;
+			if (image != NULL
+			 && image[gspca_dev->image_len - 2] == 0xff
+			 && image[gspca_dev->image_len - 1] == 0xd9)
+				gspca_frame_add(gspca_dev, LAST_PACKET,
+						NULL, 0);
+		} else if (n > 0
+			&& data[n - 2] == 0xff
+			&& data[n - 1] == 0xd9) {
+				gspca_frame_add(gspca_dev, LAST_PACKET,
+						data, n);
+		}
+#endif
 
 		n = sof - data;
 		len -= n;
 		data = sof;
 
+#ifndef NEWAGC2
 		/* Get average lumination */
 		if (gspca_dev->last_packet_type == LAST_PACKET &&
 				n >= lum_offset)
 			atomic_set(&sd->avg_lum, data[-lum_offset] +
 						data[-lum_offset + 1]);
-		else
-			atomic_set(&sd->avg_lum, -1);
+#else
+		/* get the whole lumination of the 25 areas */
+		if (gspca_dev->last_packet_type == LAST_PACKET
+		 && n >= FOOTER_SZ - 6) {
+			u8 *p;
+			int lum;
+
+			p = data + 6 - FOOTER_SZ;
+			n = 25;
+			lum = 0;
+			while (--n >= 0)
+				lum += *p++;
+			atomic_set(&sd->avg_lum, lum);
+		}
+#endif
 
 		/* Start the new frame with the jpeg header */
 		/* The PAC7302 has the image rotated 90 degrees */
-		pac_start_frame(gspca_dev,
-			gspca_dev->width, gspca_dev->height);
+		gspca_frame_add(gspca_dev, FIRST_PACKET,
+				jpeg_header, sizeof jpeg_header);
 	}
 	gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
 }
 
-static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->brightness = val;
-	if (gspca_dev->streaming)
-		setbrightcont(gspca_dev);
-	return gspca_dev->usb_err;
-}
-
-static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	*val = sd->brightness;
-	return 0;
-}
-
-static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->contrast = val;
-	if (gspca_dev->streaming)
-		setbrightcont(gspca_dev);
-	return gspca_dev->usb_err;
-}
-
-static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	*val = sd->contrast;
-	return 0;
-}
-
-static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->colors = val;
-	if (gspca_dev->streaming)
-		setcolors(gspca_dev);
-	return gspca_dev->usb_err;
-}
-
-static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	*val = sd->colors;
-	return 0;
-}
-
-static int sd_setwhitebalance(struct gspca_dev *gspca_dev, __s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->white_balance = val;
-	if (gspca_dev->streaming)
-		setwhitebalance(gspca_dev);
-	return gspca_dev->usb_err;
-}
-
-static int sd_getwhitebalance(struct gspca_dev *gspca_dev, __s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	*val = sd->white_balance;
-	return 0;
-}
-
-static int sd_setredbalance(struct gspca_dev *gspca_dev, __s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->red_balance = val;
-	if (gspca_dev->streaming)
-		setredbalance(gspca_dev);
-	return gspca_dev->usb_err;
-}
-
-static int sd_getredbalance(struct gspca_dev *gspca_dev, __s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	*val = sd->red_balance;
-	return 0;
-}
-
-static int sd_setbluebalance(struct gspca_dev *gspca_dev, __s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->blue_balance = val;
-	if (gspca_dev->streaming)
-		setbluebalance(gspca_dev);
-	return gspca_dev->usb_err;
-}
-
-static int sd_getbluebalance(struct gspca_dev *gspca_dev, __s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	*val = sd->blue_balance;
-	return 0;
-}
-
-static int sd_setgain(struct gspca_dev *gspca_dev, __s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->gain = val;
-	if (gspca_dev->streaming)
-		setgain(gspca_dev);
-	return gspca_dev->usb_err;
-}
-
-static int sd_getgain(struct gspca_dev *gspca_dev, __s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	*val = sd->gain;
-	return 0;
-}
-
-static int sd_setexposure(struct gspca_dev *gspca_dev, __s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->exposure = val;
-	if (gspca_dev->streaming)
-		setexposure(gspca_dev);
-	return gspca_dev->usb_err;
-}
-
-static int sd_getexposure(struct gspca_dev *gspca_dev, __s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	*val = sd->exposure;
-	return 0;
-}
-
-static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->autogain = val;
-	/* when switching to autogain set defaults to make sure
-	   we are on a valid point of the autogain gain /
-	   exposure knee graph, and give this change time to
-	   take effect before doing autogain. */
-	if (sd->autogain) {
-		sd->exposure = EXPOSURE_DEF;
-		sd->gain = GAIN_DEF;
-		if (gspca_dev->streaming) {
-			sd->autogain_ignore_frames =
-				PAC_AUTOGAIN_IGNORE_FRAMES;
-			setexposure(gspca_dev);
-			setgain(gspca_dev);
-		}
-	}
-
-	return gspca_dev->usb_err;
-}
-
-static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	*val = sd->autogain;
-	return 0;
-}
-
-static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->hflip = val;
-	if (gspca_dev->streaming)
-		sethvflip(gspca_dev);
-	return gspca_dev->usb_err;
-}
-
-static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	*val = sd->hflip;
-	return 0;
-}
-
-static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->vflip = val;
-	if (gspca_dev->streaming)
-		sethvflip(gspca_dev);
-	return gspca_dev->usb_err;
-}
-
-static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	*val = sd->vflip;
-	return 0;
-}
-
 #ifdef CONFIG_VIDEO_ADV_DEBUG
 static int sd_dbg_s_register(struct gspca_dev *gspca_dev,
 			struct v4l2_dbg_register *reg)
 {
-	__u8 index;
-	__u8 value;
+	u8 index;
+	u8 value;
 
 	/* reg->reg: bit0..15: reserved for register index (wIndex is 16bit
 			       long on the USB bus)
@@ -1102,8 +1061,8 @@
 	) {
 		/* Currently writing to page 0 is only supported. */
 		/* reg_w() only supports 8bit index */
-		index = reg->reg & 0x000000ff;
-		value = reg->val & 0x000000ff;
+		index = reg->reg;
+		value = reg->val;
 
 		/* Note that there shall be no access to other page
 		   by any other function between the page swith and
@@ -1164,7 +1123,7 @@
 
 /* sub-driver description for pac7302 */
 static const struct sd_desc sd_desc = {
-	.name = MODULE_NAME,
+	.name = KBUILD_MODNAME,
 	.ctrls = sd_ctrls,
 	.nctrls = ARRAY_SIZE(sd_ctrls),
 	.config = sd_config,
@@ -1186,6 +1145,7 @@
 /* -- module initialisation -- */
 static const struct usb_device_id device_table[] = {
 	{USB_DEVICE(0x06f8, 0x3009)},
+	{USB_DEVICE(0x06f8, 0x301b)},
 	{USB_DEVICE(0x093a, 0x2620)},
 	{USB_DEVICE(0x093a, 0x2621)},
 	{USB_DEVICE(0x093a, 0x2622), .driver_info = FL_VFLIP},
@@ -1196,6 +1156,7 @@
 	{USB_DEVICE(0x093a, 0x2629), .driver_info = FL_VFLIP},
 	{USB_DEVICE(0x093a, 0x262a)},
 	{USB_DEVICE(0x093a, 0x262c)},
+	{USB_DEVICE(0x145f, 0x013c)},
 	{}
 };
 MODULE_DEVICE_TABLE(usb, device_table);
@@ -1209,7 +1170,7 @@
 }
 
 static struct usb_driver sd_driver = {
-	.name = MODULE_NAME,
+	.name = KBUILD_MODNAME,
 	.id_table = device_table,
 	.probe = sd_probe,
 	.disconnect = gspca_disconnect,
@@ -1219,15 +1180,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/pac7311.c linux-3.0.82x/drivers/media/video/gspca/pac7311.c
--- linux-3.0.82/drivers/media/video/gspca/pac7311.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/pac7311.c	2017-09-23 03:42:49.482676701 +0800
@@ -49,6 +49,8 @@
 		for max gain, 0x14 for minimal gain.
 */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "pac7311"
 
 #include <linux/input.h>
@@ -276,8 +278,8 @@
 			index, gspca_dev->usb_buf, len,
 			500);
 	if (ret < 0) {
-		err("reg_w_buf() failed index 0x%02x, error %d",
-			index, ret);
+		pr_err("reg_w_buf() failed index 0x%02x, error %d\n",
+		       index, ret);
 		gspca_dev->usb_err = ret;
 	}
 }
@@ -299,8 +301,8 @@
 			0, index, gspca_dev->usb_buf, 1,
 			500);
 	if (ret < 0) {
-		err("reg_w() failed index 0x%02x, value 0x%02x, error %d",
-			index, value, ret);
+		pr_err("reg_w() failed index 0x%02x, value 0x%02x, error %d\n",
+		       index, value, ret);
 		gspca_dev->usb_err = ret;
 	}
 }
@@ -334,9 +336,8 @@
 				0, index, gspca_dev->usb_buf, 1,
 				500);
 		if (ret < 0) {
-			err("reg_w_page() failed index 0x%02x, "
-			"value 0x%02x, error %d",
-				index, page[index], ret);
+			pr_err("reg_w_page() failed index 0x%02x, value 0x%02x, error %d\n",
+			       index, page[index], ret);
 			gspca_dev->usb_err = ret;
 			break;
 		}
@@ -867,15 +868,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/sn9c2028.c linux-3.0.82x/drivers/media/video/gspca/sn9c2028.c
--- linux-3.0.82/drivers/media/video/gspca/sn9c2028.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/sn9c2028.c	2017-09-23 03:42:49.482676701 +0800
@@ -18,6 +18,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "sn9c2028"
 
 #include "gspca.h"
@@ -75,8 +77,8 @@
 			USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,
 			2, 0, gspca_dev->usb_buf, 6, 500);
 	if (rc < 0) {
-		err("command write [%02x] error %d",
-				gspca_dev->usb_buf[0], rc);
+		pr_err("command write [%02x] error %d\n",
+		       gspca_dev->usb_buf[0], rc);
 		return rc;
 	}
 
@@ -93,7 +95,7 @@
 			USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,
 			1, 0, gspca_dev->usb_buf, 1, 500);
 	if (rc != 1) {
-		err("read1 error %d", rc);
+		pr_err("read1 error %d\n", rc);
 		return (rc < 0) ? rc : -EIO;
 	}
 	PDEBUG(D_USBI, "read1 response %02x", gspca_dev->usb_buf[0]);
@@ -109,7 +111,7 @@
 			USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,
 			4, 0, gspca_dev->usb_buf, 4, 500);
 	if (rc != 4) {
-		err("read4 error %d", rc);
+		pr_err("read4 error %d\n", rc);
 		return (rc < 0) ? rc : -EIO;
 	}
 	memcpy(reading, gspca_dev->usb_buf, 4);
@@ -131,7 +133,7 @@
 	for (i = 0; i < 256 && status < 2; i++)
 		status = sn9c2028_read1(gspca_dev);
 	if (status != 2) {
-		err("long command status read error %d", status);
+		pr_err("long command status read error %d\n", status);
 		return (status < 0) ? status : -EIO;
 	}
 
@@ -638,7 +640,7 @@
 		err_code = start_vivitar_cam(gspca_dev);
 		break;
 	default:
-		err("Starting unknown camera, please report this");
+		pr_err("Starting unknown camera, please report this\n");
 		return -ENXIO;
 	}
 
@@ -735,16 +737,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/sn9c20x.c linux-3.0.82x/drivers/media/video/gspca/sn9c20x.c
--- linux-3.0.82/drivers/media/video/gspca/sn9c20x.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/sn9c20x.c	2017-09-23 03:42:49.486676689 +0800
@@ -1,5 +1,7 @@
 /*
  *	Sonix sn9c201 sn9c202 library
+ *
+ * Copyright (C) 2012 Jean-Francois Moine <http://moinejf.free.fr>
  *	Copyright (C) 2008-2009 microdia project <microdia@googlegroups.com>
  *	Copyright (C) 2009 Brian Johnson <brijohn@gmail.com>
  *
@@ -18,6 +20,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #include <linux/input.h>
 
 #include "gspca.h"
@@ -31,8 +35,6 @@
 MODULE_DESCRIPTION("GSPCA/SN9C20X USB Camera Driver");
 MODULE_LICENSE("GPL");
 
-#define MODULE_NAME "sn9c20x"
-
 /*
  * Pixel format private data
  */
@@ -57,17 +59,44 @@
 #define SENSOR_MT9M111	9
 #define SENSOR_MT9M112  10
 #define SENSOR_HV7131R	11
-#define SENSOR_MT9VPRB	20
+#define SENSOR_MT9VPRB	12
 
 /* camera flags */
 #define HAS_NO_BUTTON	0x1
 #define LED_REVERSE	0x2 /* some cameras unset gpio to turn on leds */
 #define FLIP_DETECT	0x4
 
+enum e_ctrl {
+	BRIGHTNESS,
+	CONTRAST,
+	SATURATION,
+	HUE,
+	GAMMA,
+	BLUE,
+	RED,
+	VFLIP,
+	HFLIP,
+	EXPOSURE,
+	GAIN,
+	AUTOGAIN,
+	QUALITY,
+	NCTRLS		/* number of controls */
+};
+
 /* specific webcam descriptor */
 struct sd {
 	struct gspca_dev gspca_dev;
 
+	struct gspca_ctrl ctrls[NCTRLS];
+
+	struct work_struct work;
+	struct workqueue_struct *work_thread;
+
+	u32 pktsz;			/* (used by pkt_scan) */
+	u16 npkt;
+	s8 nchg;
+	u8 fmt;				/* (used for JPEG QTAB update */
+
 #define MIN_AVG_LUM 80
 #define MAX_AVG_LUM 130
 	atomic_t avg_lum;
@@ -75,31 +104,19 @@
 	u8 older_step;
 	u8 exposure_step;
 
-	u8 brightness;
-	u8 contrast;
-	u8 saturation;
-	s16 hue;
-	u8 gamma;
-	u8 red;
-	u8 blue;
-
-	u8 hflip;
-	u8 vflip;
-	u8 gain;
-	u16 exposure;
-	u8 auto_exposure;
-
 	u8 i2c_addr;
+	u8 i2c_intf;
 	u8 sensor;
 	u8 hstart;
 	u8 vstart;
 
 	u8 jpeg_hdr[JPEG_HDR_SZ];
-	u8 quality;
 
 	u8 flags;
 };
 
+static void qual_upd(struct work_struct *work);
+
 struct i2c_reg_u8 {
 	u8 reg;
 	u8 val;
@@ -110,31 +127,6 @@
 	u16 val;
 };
 
-static int sd_setbrightness(struct gspca_dev *gspca_dev, s32 val);
-static int sd_getbrightness(struct gspca_dev *gspca_dev, s32 *val);
-static int sd_setcontrast(struct gspca_dev *gspca_dev, s32 val);
-static int sd_getcontrast(struct gspca_dev *gspca_dev, s32 *val);
-static int sd_setsaturation(struct gspca_dev *gspca_dev, s32 val);
-static int sd_getsaturation(struct gspca_dev *gspca_dev, s32 *val);
-static int sd_sethue(struct gspca_dev *gspca_dev, s32 val);
-static int sd_gethue(struct gspca_dev *gspca_dev, s32 *val);
-static int sd_setgamma(struct gspca_dev *gspca_dev, s32 val);
-static int sd_getgamma(struct gspca_dev *gspca_dev, s32 *val);
-static int sd_setredbalance(struct gspca_dev *gspca_dev, s32 val);
-static int sd_getredbalance(struct gspca_dev *gspca_dev, s32 *val);
-static int sd_setbluebalance(struct gspca_dev *gspca_dev, s32 val);
-static int sd_getbluebalance(struct gspca_dev *gspca_dev, s32 *val);
-static int sd_setvflip(struct gspca_dev *gspca_dev, s32 val);
-static int sd_getvflip(struct gspca_dev *gspca_dev, s32 *val);
-static int sd_sethflip(struct gspca_dev *gspca_dev, s32 val);
-static int sd_gethflip(struct gspca_dev *gspca_dev, s32 *val);
-static int sd_setgain(struct gspca_dev *gspca_dev, s32 val);
-static int sd_getgain(struct gspca_dev *gspca_dev, s32 *val);
-static int sd_setexposure(struct gspca_dev *gspca_dev, s32 val);
-static int sd_getexposure(struct gspca_dev *gspca_dev, s32 *val);
-static int sd_setautoexposure(struct gspca_dev *gspca_dev, s32 val);
-static int sd_getautoexposure(struct gspca_dev *gspca_dev, s32 *val);
-
 static const struct dmi_system_id flip_dmi_table[] = {
 	{
 		.ident = "MSI MS-1034",
@@ -175,9 +167,16 @@
 	{}
 };
 
-static const struct ctrl sd_ctrls[] = {
-	{
-#define BRIGHTNESS_IDX 0
+static void set_cmatrix(struct gspca_dev *gspca_dev);
+static void set_gamma(struct gspca_dev *gspca_dev);
+static void set_redblue(struct gspca_dev *gspca_dev);
+static void set_hvflip(struct gspca_dev *gspca_dev);
+static void set_exposure(struct gspca_dev *gspca_dev);
+static void set_gain(struct gspca_dev *gspca_dev);
+static void set_quality(struct gspca_dev *gspca_dev);
+
+static const struct ctrl sd_ctrls[NCTRLS] = {
+[BRIGHTNESS] = {
 	    {
 		.id      = V4L2_CID_BRIGHTNESS,
 		.type    = V4L2_CTRL_TYPE_INTEGER,
@@ -185,14 +184,11 @@
 		.minimum = 0,
 		.maximum = 0xff,
 		.step    = 1,
-#define BRIGHTNESS_DEFAULT 0x7f
-		.default_value = BRIGHTNESS_DEFAULT,
+		.default_value = 0x7f
 	    },
-	    .set = sd_setbrightness,
-	    .get = sd_getbrightness,
+	    .set_control = set_cmatrix
 	},
-	{
-#define CONTRAST_IDX 1
+[CONTRAST] = {
 	    {
 		.id      = V4L2_CID_CONTRAST,
 		.type    = V4L2_CTRL_TYPE_INTEGER,
@@ -200,14 +196,11 @@
 		.minimum = 0,
 		.maximum = 0xff,
 		.step    = 1,
-#define CONTRAST_DEFAULT 0x7f
-		.default_value = CONTRAST_DEFAULT,
+		.default_value = 0x7f
 	    },
-	    .set = sd_setcontrast,
-	    .get = sd_getcontrast,
+	    .set_control = set_cmatrix
 	},
-	{
-#define SATURATION_IDX 2
+[SATURATION] = {
 	    {
 		.id      = V4L2_CID_SATURATION,
 		.type    = V4L2_CTRL_TYPE_INTEGER,
@@ -215,14 +208,11 @@
 		.minimum = 0,
 		.maximum = 0xff,
 		.step    = 1,
-#define SATURATION_DEFAULT 0x7f
-		.default_value = SATURATION_DEFAULT,
+		.default_value = 0x7f
 	    },
-	    .set = sd_setsaturation,
-	    .get = sd_getsaturation,
+	    .set_control = set_cmatrix
 	},
-	{
-#define HUE_IDX 3
+[HUE] = {
 	    {
 		.id      = V4L2_CID_HUE,
 		.type    = V4L2_CTRL_TYPE_INTEGER,
@@ -230,14 +220,11 @@
 		.minimum = -180,
 		.maximum = 180,
 		.step    = 1,
-#define HUE_DEFAULT 0
-		.default_value = HUE_DEFAULT,
+		.default_value = 0
 	    },
-	    .set = sd_sethue,
-	    .get = sd_gethue,
+	    .set_control = set_cmatrix
 	},
-	{
-#define GAMMA_IDX 4
+[GAMMA] = {
 	    {
 		.id      = V4L2_CID_GAMMA,
 		.type    = V4L2_CTRL_TYPE_INTEGER,
@@ -245,14 +232,11 @@
 		.minimum = 0,
 		.maximum = 0xff,
 		.step    = 1,
-#define GAMMA_DEFAULT 0x10
-		.default_value = GAMMA_DEFAULT,
+		.default_value = 0x10
 	    },
-	    .set = sd_setgamma,
-	    .get = sd_getgamma,
+	    .set_control = set_gamma
 	},
-	{
-#define BLUE_IDX 5
+[BLUE] = {
 	    {
 		.id	 = V4L2_CID_BLUE_BALANCE,
 		.type	 = V4L2_CTRL_TYPE_INTEGER,
@@ -260,14 +244,11 @@
 		.minimum = 0,
 		.maximum = 0x7f,
 		.step	 = 1,
-#define BLUE_DEFAULT 0x28
-		.default_value = BLUE_DEFAULT,
+		.default_value = 0x28
 	    },
-	    .set = sd_setbluebalance,
-	    .get = sd_getbluebalance,
+	    .set_control = set_redblue
 	},
-	{
-#define RED_IDX 6
+[RED] = {
 	    {
 		.id	 = V4L2_CID_RED_BALANCE,
 		.type	 = V4L2_CTRL_TYPE_INTEGER,
@@ -275,14 +256,11 @@
 		.minimum = 0,
 		.maximum = 0x7f,
 		.step	 = 1,
-#define RED_DEFAULT 0x28
-		.default_value = RED_DEFAULT,
+		.default_value = 0x28
 	    },
-	    .set = sd_setredbalance,
-	    .get = sd_getredbalance,
+	    .set_control = set_redblue
 	},
-	{
-#define HFLIP_IDX 7
+[HFLIP] = {
 	    {
 		.id      = V4L2_CID_HFLIP,
 		.type    = V4L2_CTRL_TYPE_BOOLEAN,
@@ -290,14 +268,11 @@
 		.minimum = 0,
 		.maximum = 1,
 		.step    = 1,
-#define HFLIP_DEFAULT 0
-		.default_value = HFLIP_DEFAULT,
+		.default_value = 0,
 	    },
-	    .set = sd_sethflip,
-	    .get = sd_gethflip,
+	    .set_control = set_hvflip
 	},
-	{
-#define VFLIP_IDX 8
+[VFLIP] = {
 	    {
 		.id      = V4L2_CID_VFLIP,
 		.type    = V4L2_CTRL_TYPE_BOOLEAN,
@@ -305,14 +280,11 @@
 		.minimum = 0,
 		.maximum = 1,
 		.step    = 1,
-#define VFLIP_DEFAULT 0
-		.default_value = VFLIP_DEFAULT,
+		.default_value = 0,
 	    },
-	    .set = sd_setvflip,
-	    .get = sd_getvflip,
+	    .set_control = set_hvflip
 	},
-	{
-#define EXPOSURE_IDX 9
+[EXPOSURE] = {
 	    {
 		.id      = V4L2_CID_EXPOSURE,
 		.type    = V4L2_CTRL_TYPE_INTEGER,
@@ -320,14 +292,11 @@
 		.minimum = 0,
 		.maximum = 0x1780,
 		.step    = 1,
-#define EXPOSURE_DEFAULT 0x33
-		.default_value = EXPOSURE_DEFAULT,
+		.default_value = 0x33,
 	    },
-	    .set = sd_setexposure,
-	    .get = sd_getexposure,
+	    .set_control = set_exposure
 	},
-	{
-#define GAIN_IDX 10
+[GAIN] = {
 	    {
 		.id      = V4L2_CID_GAIN,
 		.type    = V4L2_CTRL_TYPE_INTEGER,
@@ -335,14 +304,11 @@
 		.minimum = 0,
 		.maximum = 28,
 		.step    = 1,
-#define GAIN_DEFAULT 0x00
-		.default_value = GAIN_DEFAULT,
+		.default_value = 0,
 	    },
-	    .set = sd_setgain,
-	    .get = sd_getgain,
+	    .set_control = set_gain
 	},
-	{
-#define AUTOGAIN_IDX 11
+[AUTOGAIN] = {
 	    {
 		.id      = V4L2_CID_AUTOGAIN,
 		.type    = V4L2_CTRL_TYPE_BOOLEAN,
@@ -350,11 +316,23 @@
 		.minimum = 0,
 		.maximum = 1,
 		.step    = 1,
-#define AUTO_EXPOSURE_DEFAULT 1
-		.default_value = AUTO_EXPOSURE_DEFAULT,
+		.default_value = 1,
 	    },
-	    .set = sd_setautoexposure,
-	    .get = sd_getautoexposure,
+	},
+[QUALITY] = {
+	    {
+		.id      = V4L2_CID_JPEG_COMPRESSION_QUALITY,
+		.type    = V4L2_CTRL_TYPE_INTEGER,
+		.name    = "Compression Quality",
+#define QUALITY_MIN 50
+#define QUALITY_MAX 90
+#define QUALITY_DEF 80
+		.minimum = QUALITY_MIN,
+		.maximum = QUALITY_MAX,
+		.step    = 1,
+		.default_value = QUALITY_DEF,
+	    },
+	    .set_control = set_quality
 	},
 };
 
@@ -770,7 +748,7 @@
 	4,   2,   0,  -1,  -3,  -5,  -7,  -9, -11
 };
 
-static u16 i2c_ident[] = {
+static const u16 i2c_ident[] = {
 	V4L2_IDENT_OV9650,
 	V4L2_IDENT_OV9655,
 	V4L2_IDENT_SOI968,
@@ -783,9 +761,10 @@
 	V4L2_IDENT_MT9M111,
 	V4L2_IDENT_MT9M112,
 	V4L2_IDENT_HV7131R,
+[SENSOR_MT9VPRB] = V4L2_IDENT_UNKNOWN,
 };
 
-static u16 bridge_init[][2] = {
+static const u16 bridge_init[][2] = {
 	{0x1000, 0x78}, {0x1001, 0x40}, {0x1002, 0x1c},
 	{0x1020, 0x80}, {0x1061, 0x01}, {0x1067, 0x40},
 	{0x1068, 0x30}, {0x1069, 0x20},	{0x106a, 0x10},
@@ -809,7 +788,7 @@
 };
 
 /* Gain = (bit[3:0] / 16 + 1) * (bit[4] + 1) * (bit[5] + 1) * (bit[6] + 1) */
-static u8 ov_gain[] = {
+static const u8 ov_gain[] = {
 	0x00 /* 1x */, 0x04 /* 1.25x */, 0x08 /* 1.5x */, 0x0c /* 1.75x */,
 	0x10 /* 2x */, 0x12 /* 2.25x */, 0x14 /* 2.5x */, 0x16 /* 2.75x */,
 	0x18 /* 3x */, 0x1a /* 3.25x */, 0x1c /* 3.5x */, 0x1e /* 3.75x */,
@@ -821,7 +800,7 @@
 };
 
 /* Gain = (bit[8] + 1) * (bit[7] + 1) * (bit[6:0] * 0.03125) */
-static u16 micron1_gain[] = {
+static const u16 micron1_gain[] = {
 	/* 1x   1.25x   1.5x    1.75x */
 	0x0020, 0x0028, 0x0030, 0x0038,
 	/* 2x   2.25x   2.5x    2.75x */
@@ -842,7 +821,7 @@
 
 /* mt9m001 sensor uses a different gain formula then other micron sensors */
 /* Gain = (bit[6] + 1) * (bit[5-0] * 0.125) */
-static u16 micron2_gain[] = {
+static const u16 micron2_gain[] = {
 	/* 1x   1.25x   1.5x    1.75x */
 	0x0008, 0x000a, 0x000c, 0x000e,
 	/* 2x   2.25x   2.5x    2.75x */
@@ -862,7 +841,7 @@
 };
 
 /* Gain = .5 + bit[7:0] / 16 */
-static u8 hv7131r_gain[] = {
+static const u8 hv7131r_gain[] = {
 	0x08 /* 1x */, 0x0c /* 1.25x */, 0x10 /* 1.5x */, 0x14 /* 1.75x */,
 	0x18 /* 2x */, 0x1c /* 2.25x */, 0x20 /* 2.5x */, 0x24 /* 2.75x */,
 	0x28 /* 3x */, 0x2c /* 3.25x */, 0x30 /* 3.5x */, 0x34 /* 3.75x */,
@@ -873,8 +852,8 @@
 	0x78 /* 8x */
 };
 
-static struct i2c_reg_u8 soi968_init[] = {
-	{0x12, 0x80}, {0x0c, 0x00}, {0x0f, 0x1f},
+static const struct i2c_reg_u8 soi968_init[] = {
+	{0x0c, 0x00}, {0x0f, 0x1f},
 	{0x11, 0x80}, {0x38, 0x52}, {0x1e, 0x00},
 	{0x33, 0x08}, {0x35, 0x8c}, {0x36, 0x0c},
 	{0x37, 0x04}, {0x45, 0x04}, {0x47, 0xff},
@@ -887,7 +866,7 @@
 	{0x00, 0x00}, {0x01, 0x80}, {0x02, 0x80},
 };
 
-static struct i2c_reg_u8 ov7660_init[] = {
+static const struct i2c_reg_u8 ov7660_init[] = {
 	{0x0e, 0x80}, {0x0d, 0x08}, {0x0f, 0xc3},
 	{0x04, 0xc3}, {0x10, 0x40}, {0x11, 0x40},
 	{0x12, 0x05}, {0x13, 0xba}, {0x14, 0x2a},
@@ -895,12 +874,12 @@
 	   0x10, 0x61 and sd->hstart, vstart = 3, fixes ugly colored borders */
 	{0x17, 0x10}, {0x18, 0x61},
 	{0x37, 0x0f}, {0x38, 0x02}, {0x39, 0x43},
-	{0x3a, 0x00}, {0x69, 0x90}, {0x2d, 0xf6},
-	{0x2e, 0x0b}, {0x01, 0x78}, {0x02, 0x50},
+	{0x3a, 0x00}, {0x69, 0x90}, {0x2d, 0x00},
+	{0x2e, 0x00}, {0x01, 0x78}, {0x02, 0x50},
 };
 
-static struct i2c_reg_u8 ov7670_init[] = {
-	{0x12, 0x80}, {0x11, 0x80}, {0x3a, 0x04}, {0x12, 0x01},
+static const struct i2c_reg_u8 ov7670_init[] = {
+	{0x11, 0x80}, {0x3a, 0x04}, {0x12, 0x01},
 	{0x32, 0xb6}, {0x03, 0x0a}, {0x0c, 0x00}, {0x3e, 0x00},
 	{0x70, 0x3a}, {0x71, 0x35}, {0x72, 0x11}, {0x73, 0xf0},
 	{0xa2, 0x02}, {0x13, 0xe0}, {0x00, 0x00}, {0x10, 0x00},
@@ -956,8 +935,8 @@
 	{0x93, 0x00},
 };
 
-static struct i2c_reg_u8 ov9650_init[] = {
-	{0x12, 0x80}, {0x00, 0x00}, {0x01, 0x78},
+static const struct i2c_reg_u8 ov9650_init[] = {
+	{0x00, 0x00}, {0x01, 0x78},
 	{0x02, 0x78}, {0x03, 0x36}, {0x04, 0x03},
 	{0x05, 0x00}, {0x06, 0x00}, {0x08, 0x00},
 	{0x09, 0x01}, {0x0c, 0x00}, {0x0d, 0x00},
@@ -986,8 +965,8 @@
 	{0xaa, 0x92}, {0xab, 0x0a},
 };
 
-static struct i2c_reg_u8 ov9655_init[] = {
-	{0x12, 0x80}, {0x0e, 0x61}, {0x11, 0x80}, {0x13, 0xba},
+static const struct i2c_reg_u8 ov9655_init[] = {
+	{0x0e, 0x61}, {0x11, 0x80}, {0x13, 0xba},
 	{0x14, 0x2e}, {0x16, 0x24}, {0x1e, 0x04}, {0x27, 0x08},
 	{0x28, 0x08}, {0x29, 0x15}, {0x2c, 0x08}, {0x34, 0x3d},
 	{0x35, 0x00}, {0x38, 0x12}, {0x0f, 0x42}, {0x39, 0x57},
@@ -1013,7 +992,7 @@
 	{0x04, 0x03}, {0x00, 0x13},
 };
 
-static struct i2c_reg_u16 mt9v112_init[] = {
+static const struct i2c_reg_u16 mt9v112_init[] = {
 	{0xf0, 0x0000}, {0x0d, 0x0021}, {0x0d, 0x0020},
 	{0x34, 0xc019}, {0x0a, 0x0011}, {0x0b, 0x000b},
 	{0x20, 0x0703}, {0x35, 0x2022}, {0xf0, 0x0001},
@@ -1032,7 +1011,7 @@
 	{0x2c, 0x00ae}, {0x2d, 0x00ae}, {0x2e, 0x00ae},
 };
 
-static struct i2c_reg_u16 mt9v111_init[] = {
+static const struct i2c_reg_u16 mt9v111_init[] = {
 	{0x01, 0x0004}, {0x0d, 0x0001}, {0x0d, 0x0000},
 	{0x01, 0x0001}, {0x05, 0x0004}, {0x2d, 0xe0a0},
 	{0x2e, 0x0c64},	{0x2f, 0x0064}, {0x06, 0x600e},
@@ -1042,7 +1021,7 @@
 	{0x0e, 0x0008}, {0x20, 0x0000}
 };
 
-static struct i2c_reg_u16 mt9v011_init[] = {
+static const struct i2c_reg_u16 mt9v011_init[] = {
 	{0x07, 0x0002},	{0x0d, 0x0001},	{0x0d, 0x0000},
 	{0x01, 0x0008},	{0x02, 0x0016},	{0x03, 0x01e1},
 	{0x04, 0x0281},	{0x05, 0x0083},	{0x06, 0x0006},
@@ -1069,7 +1048,7 @@
 	{0x06, 0x0029},	{0x05, 0x0009},
 };
 
-static struct i2c_reg_u16 mt9m001_init[] = {
+static const struct i2c_reg_u16 mt9m001_init[] = {
 	{0x0d, 0x0001},
 	{0x0d, 0x0000},
 	{0x04, 0x0500},		/* hres = 1280 */
@@ -1085,21 +1064,21 @@
 	{0x35, 0x0057},
 };
 
-static struct i2c_reg_u16 mt9m111_init[] = {
+static const struct i2c_reg_u16 mt9m111_init[] = {
 	{0xf0, 0x0000}, {0x0d, 0x0021}, {0x0d, 0x0008},
 	{0xf0, 0x0001}, {0x3a, 0x4300}, {0x9b, 0x4300},
 	{0x06, 0x708e}, {0xf0, 0x0002}, {0x2e, 0x0a1e},
 	{0xf0, 0x0000},
 };
 
-static struct i2c_reg_u16 mt9m112_init[] = {
+static const struct i2c_reg_u16 mt9m112_init[] = {
 	{0xf0, 0x0000}, {0x0d, 0x0021}, {0x0d, 0x0008},
 	{0xf0, 0x0001}, {0x3a, 0x4300}, {0x9b, 0x4300},
 	{0x06, 0x708e}, {0xf0, 0x0002}, {0x2e, 0x0a1e},
 	{0xf0, 0x0000},
 };
 
-static struct i2c_reg_u8 hv7131r_init[] = {
+static const struct i2c_reg_u8 hv7131r_init[] = {
 	{0x02, 0x08}, {0x02, 0x00}, {0x01, 0x08},
 	{0x02, 0x00}, {0x20, 0x00}, {0x21, 0xd0},
 	{0x22, 0x00}, {0x23, 0x09}, {0x01, 0x08},
@@ -1110,10 +1089,13 @@
 	{0x23, 0x09}, {0x01, 0x08},
 };
 
-static int reg_r(struct gspca_dev *gspca_dev, u16 reg, u16 length)
+static void reg_r(struct gspca_dev *gspca_dev, u16 reg, u16 length)
 {
 	struct usb_device *dev = gspca_dev->dev;
 	int result;
+
+	if (gspca_dev->usb_err < 0)
+		return;
 	result = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
 			0x00,
 			USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,
@@ -1123,17 +1105,19 @@
 			length,
 			500);
 	if (unlikely(result < 0 || result != length)) {
-		err("Read register failed 0x%02X", reg);
-		return -EIO;
+		pr_err("Read register %02x failed %d\n", reg, result);
+		gspca_dev->usb_err = result;
 	}
-	return 0;
 }
 
-static int reg_w(struct gspca_dev *gspca_dev, u16 reg,
+static void reg_w(struct gspca_dev *gspca_dev, u16 reg,
 		 const u8 *buffer, int length)
 {
 	struct usb_device *dev = gspca_dev->dev;
 	int result;
+
+	if (gspca_dev->usb_err < 0)
+		return;
 	memcpy(gspca_dev->usb_buf, buffer, length);
 	result = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
 			0x08,
@@ -1144,45 +1128,48 @@
 			length,
 			500);
 	if (unlikely(result < 0 || result != length)) {
-		err("Write register failed index 0x%02X", reg);
-		return -EIO;
+		pr_err("Write register %02x failed %d\n", reg, result);
+		gspca_dev->usb_err = result;
 	}
-	return 0;
 }
 
-static int reg_w1(struct gspca_dev *gspca_dev, u16 reg, const u8 value)
+static void reg_w1(struct gspca_dev *gspca_dev, u16 reg, const u8 value)
 {
-	u8 data[1] = {value};
-	return reg_w(gspca_dev, reg, data, 1);
+	reg_w(gspca_dev, reg, &value, 1);
 }
 
-static int i2c_w(struct gspca_dev *gspca_dev, const u8 *buffer)
+static void i2c_w(struct gspca_dev *gspca_dev, const u8 *buffer)
 {
 	int i;
+
 	reg_w(gspca_dev, 0x10c0, buffer, 8);
 	for (i = 0; i < 5; i++) {
 		reg_r(gspca_dev, 0x10c0, 1);
+		if (gspca_dev->usb_err < 0)
+			return;
 		if (gspca_dev->usb_buf[0] & 0x04) {
-			if (gspca_dev->usb_buf[0] & 0x08)
-				return -EIO;
-			return 0;
+			if (gspca_dev->usb_buf[0] & 0x08) {
+				pr_err("i2c_w error\n");
+				gspca_dev->usb_err = -EIO;
+			}
+			return;
 		}
-		msleep(1);
+		msleep(10);
 	}
-	return -EIO;
+	pr_err("i2c_w reg %02x no response\n", buffer[2]);
+/*	gspca_dev->usb_err = -EIO;	fixme: may occur */
 }
 
-static int i2c_w1(struct gspca_dev *gspca_dev, u8 reg, u8 val)
+static void i2c_w1(struct gspca_dev *gspca_dev, u8 reg, u8 val)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
-
 	u8 row[8];
 
 	/*
 	 * from the point of view of the bridge, the length
 	 * includes the address
 	 */
-	row[0] = 0x81 | (2 << 4);
+	row[0] = sd->i2c_intf | (2 << 4);
 	row[1] = sd->i2c_addr;
 	row[2] = reg;
 	row[3] = val;
@@ -1191,10 +1178,19 @@
 	row[6] = 0x00;
 	row[7] = 0x10;
 
-	return i2c_w(gspca_dev, row);
+	i2c_w(gspca_dev, row);
+}
+
+static void i2c_w1_buf(struct gspca_dev *gspca_dev,
+			const struct i2c_reg_u8 *buf, int sz)
+{
+	while (--sz >= 0) {
+		i2c_w1(gspca_dev, buf->reg, buf->val);
+		buf++;
+	}
 }
 
-static int i2c_w2(struct gspca_dev *gspca_dev, u8 reg, u16 val)
+static void i2c_w2(struct gspca_dev *gspca_dev, u8 reg, u16 val)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
 	u8 row[8];
@@ -1203,24 +1199,33 @@
 	 * from the point of view of the bridge, the length
 	 * includes the address
 	 */
-	row[0] = 0x81 | (3 << 4);
+	row[0] = sd->i2c_intf | (3 << 4);
 	row[1] = sd->i2c_addr;
 	row[2] = reg;
-	row[3] = (val >> 8) & 0xff;
-	row[4] = val & 0xff;
+	row[3] = val >> 8;
+	row[4] = val;
 	row[5] = 0x00;
 	row[6] = 0x00;
 	row[7] = 0x10;
 
-	return i2c_w(gspca_dev, row);
+	i2c_w(gspca_dev, row);
 }
 
-static int i2c_r1(struct gspca_dev *gspca_dev, u8 reg, u8 *val)
+static void i2c_w2_buf(struct gspca_dev *gspca_dev,
+			const struct i2c_reg_u16 *buf, int sz)
+{
+	while (--sz >= 0) {
+		i2c_w2(gspca_dev, buf->reg, buf->val);
+		buf++;
+	}
+}
+
+static void i2c_r1(struct gspca_dev *gspca_dev, u8 reg, u8 *val)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
 	u8 row[8];
 
-	row[0] = 0x81 | (1 << 4);
+	row[0] = sd->i2c_intf | (1 << 4);
 	row[1] = sd->i2c_addr;
 	row[2] = reg;
 	row[3] = 0;
@@ -1228,24 +1233,20 @@
 	row[5] = 0;
 	row[6] = 0;
 	row[7] = 0x10;
-	if (i2c_w(gspca_dev, row) < 0)
-		return -EIO;
-	row[0] = 0x81 | (1 << 4) | 0x02;
+	i2c_w(gspca_dev, row);
+	row[0] = sd->i2c_intf | (1 << 4) | 0x02;
 	row[2] = 0;
-	if (i2c_w(gspca_dev, row) < 0)
-		return -EIO;
-	if (reg_r(gspca_dev, 0x10c2, 5) < 0)
-		return -EIO;
+	i2c_w(gspca_dev, row);
+	reg_r(gspca_dev, 0x10c2, 5);
 	*val = gspca_dev->usb_buf[4];
-	return 0;
 }
 
-static int i2c_r2(struct gspca_dev *gspca_dev, u8 reg, u16 *val)
+static void i2c_r2(struct gspca_dev *gspca_dev, u8 reg, u16 *val)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
 	u8 row[8];
 
-	row[0] = 0x81 | (1 << 4);
+	row[0] = sd->i2c_intf | (1 << 4);
 	row[1] = sd->i2c_addr;
 	row[2] = reg;
 	row[3] = 0;
@@ -1253,324 +1254,288 @@
 	row[5] = 0;
 	row[6] = 0;
 	row[7] = 0x10;
-	if (i2c_w(gspca_dev, row) < 0)
-		return -EIO;
-	row[0] = 0x81 | (2 << 4) | 0x02;
+	i2c_w(gspca_dev, row);
+	row[0] = sd->i2c_intf | (2 << 4) | 0x02;
 	row[2] = 0;
-	if (i2c_w(gspca_dev, row) < 0)
-		return -EIO;
-	if (reg_r(gspca_dev, 0x10c2, 5) < 0)
-		return -EIO;
+	i2c_w(gspca_dev, row);
+	reg_r(gspca_dev, 0x10c2, 5);
 	*val = (gspca_dev->usb_buf[3] << 8) | gspca_dev->usb_buf[4];
-	return 0;
 }
 
-static int ov9650_init_sensor(struct gspca_dev *gspca_dev)
+static void ov9650_init_sensor(struct gspca_dev *gspca_dev)
 {
-	int i;
 	u16 id;
 	struct sd *sd = (struct sd *) gspca_dev;
 
-	if (i2c_r2(gspca_dev, 0x1c, &id) < 0)
-		return -EINVAL;
+	i2c_r2(gspca_dev, 0x1c, &id);
+	if (gspca_dev->usb_err < 0)
+		return;
 
 	if (id != 0x7fa2) {
-		err("sensor id for ov9650 doesn't match (0x%04x)", id);
-		return -ENODEV;
+		pr_err("sensor id for ov9650 doesn't match (0x%04x)\n", id);
+		gspca_dev->usb_err = -ENODEV;
+		return;
 	}
 
-	for (i = 0; i < ARRAY_SIZE(ov9650_init); i++) {
-		if (i2c_w1(gspca_dev, ov9650_init[i].reg,
-				ov9650_init[i].val) < 0) {
-			err("OV9650 sensor initialization failed");
-			return -ENODEV;
-		}
-	}
+	i2c_w1(gspca_dev, 0x12, 0x80);		/* sensor reset */
+	msleep(200);
+	i2c_w1_buf(gspca_dev, ov9650_init, ARRAY_SIZE(ov9650_init));
+	if (gspca_dev->usb_err < 0)
+		pr_err("OV9650 sensor initialization failed\n");
 	sd->hstart = 1;
 	sd->vstart = 7;
-	return 0;
 }
 
-static int ov9655_init_sensor(struct gspca_dev *gspca_dev)
+static void ov9655_init_sensor(struct gspca_dev *gspca_dev)
 {
-	int i;
 	struct sd *sd = (struct sd *) gspca_dev;
 
-	for (i = 0; i < ARRAY_SIZE(ov9655_init); i++) {
-		if (i2c_w1(gspca_dev, ov9655_init[i].reg,
-				ov9655_init[i].val) < 0) {
-			err("OV9655 sensor initialization failed");
-			return -ENODEV;
-		}
-	}
+	i2c_w1(gspca_dev, 0x12, 0x80);		/* sensor reset */
+	msleep(200);
+	i2c_w1_buf(gspca_dev, ov9655_init, ARRAY_SIZE(ov9655_init));
+	if (gspca_dev->usb_err < 0)
+		pr_err("OV9655 sensor initialization failed\n");
+
 	/* disable hflip and vflip */
-	gspca_dev->ctrl_dis = (1 << HFLIP_IDX) | (1 << VFLIP_IDX);
+	gspca_dev->ctrl_dis = (1 << HFLIP) | (1 << VFLIP);
 	sd->hstart = 1;
 	sd->vstart = 2;
-	return 0;
 }
 
-static int soi968_init_sensor(struct gspca_dev *gspca_dev)
+static void soi968_init_sensor(struct gspca_dev *gspca_dev)
 {
-	int i;
 	struct sd *sd = (struct sd *) gspca_dev;
 
-	for (i = 0; i < ARRAY_SIZE(soi968_init); i++) {
-		if (i2c_w1(gspca_dev, soi968_init[i].reg,
-				soi968_init[i].val) < 0) {
-			err("SOI968 sensor initialization failed");
-			return -ENODEV;
-		}
-	}
+	i2c_w1(gspca_dev, 0x12, 0x80);		/* sensor reset */
+	msleep(200);
+	i2c_w1_buf(gspca_dev, soi968_init, ARRAY_SIZE(soi968_init));
+	if (gspca_dev->usb_err < 0)
+		pr_err("SOI968 sensor initialization failed\n");
+
 	/* disable hflip and vflip */
-	gspca_dev->ctrl_dis = (1 << HFLIP_IDX) | (1 << VFLIP_IDX)
-				| (1 << EXPOSURE_IDX);
+	gspca_dev->ctrl_dis = (1 << HFLIP) | (1 << VFLIP)
+				| (1 << EXPOSURE);
 	sd->hstart = 60;
 	sd->vstart = 11;
-	return 0;
 }
 
-static int ov7660_init_sensor(struct gspca_dev *gspca_dev)
+static void ov7660_init_sensor(struct gspca_dev *gspca_dev)
 {
-	int i;
 	struct sd *sd = (struct sd *) gspca_dev;
 
-	for (i = 0; i < ARRAY_SIZE(ov7660_init); i++) {
-		if (i2c_w1(gspca_dev, ov7660_init[i].reg,
-				ov7660_init[i].val) < 0) {
-			err("OV7660 sensor initialization failed");
-			return -ENODEV;
-		}
-	}
+	i2c_w1(gspca_dev, 0x12, 0x80);		/* sensor reset */
+	msleep(200);
+	i2c_w1_buf(gspca_dev, ov7660_init, ARRAY_SIZE(ov7660_init));
+	if (gspca_dev->usb_err < 0)
+		pr_err("OV7660 sensor initialization failed\n");
 	sd->hstart = 3;
 	sd->vstart = 3;
-	return 0;
 }
 
-static int ov7670_init_sensor(struct gspca_dev *gspca_dev)
+static void ov7670_init_sensor(struct gspca_dev *gspca_dev)
 {
-	int i;
 	struct sd *sd = (struct sd *) gspca_dev;
 
-	for (i = 0; i < ARRAY_SIZE(ov7670_init); i++) {
-		if (i2c_w1(gspca_dev, ov7670_init[i].reg,
-				ov7670_init[i].val) < 0) {
-			err("OV7670 sensor initialization failed");
-			return -ENODEV;
-		}
-	}
+	i2c_w1(gspca_dev, 0x12, 0x80);		/* sensor reset */
+	msleep(200);
+	i2c_w1_buf(gspca_dev, ov7670_init, ARRAY_SIZE(ov7670_init));
+	if (gspca_dev->usb_err < 0)
+		pr_err("OV7670 sensor initialization failed\n");
+
 	/* disable hflip and vflip */
-	gspca_dev->ctrl_dis = (1 << HFLIP_IDX) | (1 << VFLIP_IDX);
+	gspca_dev->ctrl_dis = (1 << HFLIP) | (1 << VFLIP);
 	sd->hstart = 0;
 	sd->vstart = 1;
-	return 0;
 }
 
-static int mt9v_init_sensor(struct gspca_dev *gspca_dev)
+static void mt9v_init_sensor(struct gspca_dev *gspca_dev)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
-	int i;
 	u16 value;
-	int ret;
 
 	sd->i2c_addr = 0x5d;
-	ret = i2c_r2(gspca_dev, 0xff, &value);
-	if ((ret == 0) && (value == 0x8243)) {
-		for (i = 0; i < ARRAY_SIZE(mt9v011_init); i++) {
-			if (i2c_w2(gspca_dev, mt9v011_init[i].reg,
-					mt9v011_init[i].val) < 0) {
-				err("MT9V011 sensor initialization failed");
-				return -ENODEV;
-			}
+	i2c_r2(gspca_dev, 0xff, &value);
+	if (gspca_dev->usb_err >= 0
+	 && value == 0x8243) {
+		i2c_w2_buf(gspca_dev, mt9v011_init, ARRAY_SIZE(mt9v011_init));
+		if (gspca_dev->usb_err < 0) {
+			pr_err("MT9V011 sensor initialization failed\n");
+			return;
 		}
 		sd->hstart = 2;
 		sd->vstart = 2;
 		sd->sensor = SENSOR_MT9V011;
-		info("MT9V011 sensor detected");
-		return 0;
+		pr_info("MT9V011 sensor detected\n");
+		return;
 	}
 
+	gspca_dev->usb_err = 0;
 	sd->i2c_addr = 0x5c;
 	i2c_w2(gspca_dev, 0x01, 0x0004);
-	ret = i2c_r2(gspca_dev, 0xff, &value);
-	if ((ret == 0) && (value == 0x823a)) {
-		for (i = 0; i < ARRAY_SIZE(mt9v111_init); i++) {
-			if (i2c_w2(gspca_dev, mt9v111_init[i].reg,
-					mt9v111_init[i].val) < 0) {
-				err("MT9V111 sensor initialization failed");
-				return -ENODEV;
-			}
+	i2c_r2(gspca_dev, 0xff, &value);
+	if (gspca_dev->usb_err >= 0
+	 && value == 0x823a) {
+		i2c_w2_buf(gspca_dev, mt9v111_init, ARRAY_SIZE(mt9v111_init));
+		if (gspca_dev->usb_err < 0) {
+			pr_err("MT9V111 sensor initialization failed\n");
+			return;
 		}
-		gspca_dev->ctrl_dis = (1 << EXPOSURE_IDX)
-					| (1 << AUTOGAIN_IDX)
-					| (1 << GAIN_IDX);
+		gspca_dev->ctrl_dis = (1 << EXPOSURE)
+					| (1 << AUTOGAIN)
+					| (1 << GAIN);
 		sd->hstart = 2;
 		sd->vstart = 2;
 		sd->sensor = SENSOR_MT9V111;
-		info("MT9V111 sensor detected");
-		return 0;
+		pr_info("MT9V111 sensor detected\n");
+		return;
 	}
 
+	gspca_dev->usb_err = 0;
 	sd->i2c_addr = 0x5d;
-	ret = i2c_w2(gspca_dev, 0xf0, 0x0000);
-	if (ret < 0) {
+	i2c_w2(gspca_dev, 0xf0, 0x0000);
+	if (gspca_dev->usb_err < 0) {
+		gspca_dev->usb_err = 0;
 		sd->i2c_addr = 0x48;
 		i2c_w2(gspca_dev, 0xf0, 0x0000);
 	}
-	ret = i2c_r2(gspca_dev, 0x00, &value);
-	if ((ret == 0) && (value == 0x1229)) {
-		for (i = 0; i < ARRAY_SIZE(mt9v112_init); i++) {
-			if (i2c_w2(gspca_dev, mt9v112_init[i].reg,
-					mt9v112_init[i].val) < 0) {
-				err("MT9V112 sensor initialization failed");
-				return -ENODEV;
-			}
+	i2c_r2(gspca_dev, 0x00, &value);
+	if (gspca_dev->usb_err >= 0
+	 && value == 0x1229) {
+		i2c_w2_buf(gspca_dev, mt9v112_init, ARRAY_SIZE(mt9v112_init));
+		if (gspca_dev->usb_err < 0) {
+			pr_err("MT9V112 sensor initialization failed\n");
+			return;
 		}
 		sd->hstart = 6;
 		sd->vstart = 2;
 		sd->sensor = SENSOR_MT9V112;
-		info("MT9V112 sensor detected");
-		return 0;
+		pr_info("MT9V112 sensor detected\n");
+		return;
 	}
 
-	return -ENODEV;
+	gspca_dev->usb_err = -ENODEV;
 }
 
-static int mt9m112_init_sensor(struct gspca_dev *gspca_dev)
+static void mt9m112_init_sensor(struct gspca_dev *gspca_dev)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
-	int i;
-	for (i = 0; i < ARRAY_SIZE(mt9m112_init); i++) {
-		if (i2c_w2(gspca_dev, mt9m112_init[i].reg,
-				mt9m112_init[i].val) < 0) {
-			err("MT9M112 sensor initialization failed");
-			return -ENODEV;
-		}
-	}
-	gspca_dev->ctrl_dis = (1 << EXPOSURE_IDX) | (1 << AUTOGAIN_IDX)
-				| (1 << GAIN_IDX);
+
+	i2c_w2_buf(gspca_dev, mt9m112_init, ARRAY_SIZE(mt9m112_init));
+	if (gspca_dev->usb_err < 0)
+		pr_err("MT9M112 sensor initialization failed\n");
+
+	gspca_dev->ctrl_dis = (1 << EXPOSURE) | (1 << AUTOGAIN)
+				| (1 << GAIN);
 	sd->hstart = 0;
 	sd->vstart = 2;
-	return 0;
 }
 
-static int mt9m111_init_sensor(struct gspca_dev *gspca_dev)
+static void mt9m111_init_sensor(struct gspca_dev *gspca_dev)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
-	int i;
-	for (i = 0; i < ARRAY_SIZE(mt9m111_init); i++) {
-		if (i2c_w2(gspca_dev, mt9m111_init[i].reg,
-				mt9m111_init[i].val) < 0) {
-			err("MT9M111 sensor initialization failed");
-			return -ENODEV;
-		}
-	}
-	gspca_dev->ctrl_dis = (1 << EXPOSURE_IDX) | (1 << AUTOGAIN_IDX)
-				| (1 << GAIN_IDX);
+
+	i2c_w2_buf(gspca_dev, mt9m111_init, ARRAY_SIZE(mt9m111_init));
+	if (gspca_dev->usb_err < 0)
+		pr_err("MT9M111 sensor initialization failed\n");
+
+	gspca_dev->ctrl_dis = (1 << EXPOSURE) | (1 << AUTOGAIN)
+				| (1 << GAIN);
 	sd->hstart = 0;
 	sd->vstart = 2;
-	return 0;
 }
 
-static int mt9m001_init_sensor(struct gspca_dev *gspca_dev)
+static void mt9m001_init_sensor(struct gspca_dev *gspca_dev)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
-	int i;
 	u16 id;
 
-	if (i2c_r2(gspca_dev, 0x00, &id) < 0)
-		return -EINVAL;
+	i2c_r2(gspca_dev, 0x00, &id);
+	if (gspca_dev->usb_err < 0)
+		return;
 
 	/* must be 0x8411 or 0x8421 for colour sensor and 8431 for bw */
 	switch (id) {
 	case 0x8411:
 	case 0x8421:
-		info("MT9M001 color sensor detected");
+		pr_info("MT9M001 color sensor detected\n");
 		break;
 	case 0x8431:
-		info("MT9M001 mono sensor detected");
+		pr_info("MT9M001 mono sensor detected\n");
 		break;
 	default:
-		err("No MT9M001 chip detected, ID = %x\n", id);
-		return -ENODEV;
+		pr_err("No MT9M001 chip detected, ID = %x\n\n", id);
+		gspca_dev->usb_err = -ENODEV;
+		return;
 	}
 
-	for (i = 0; i < ARRAY_SIZE(mt9m001_init); i++) {
-		if (i2c_w2(gspca_dev, mt9m001_init[i].reg,
-				mt9m001_init[i].val) < 0) {
-			err("MT9M001 sensor initialization failed");
-			return -ENODEV;
-		}
-	}
+	i2c_w2_buf(gspca_dev, mt9m001_init, ARRAY_SIZE(mt9m001_init));
+	if (gspca_dev->usb_err < 0)
+		pr_err("MT9M001 sensor initialization failed\n");
+
 	/* disable hflip and vflip */
-	gspca_dev->ctrl_dis = (1 << HFLIP_IDX) | (1 << VFLIP_IDX);
+	gspca_dev->ctrl_dis = (1 << HFLIP) | (1 << VFLIP);
 	sd->hstart = 1;
 	sd->vstart = 1;
-	return 0;
 }
 
-static int hv7131r_init_sensor(struct gspca_dev *gspca_dev)
+static void hv7131r_init_sensor(struct gspca_dev *gspca_dev)
 {
-	int i;
 	struct sd *sd = (struct sd *) gspca_dev;
 
-	for (i = 0; i < ARRAY_SIZE(hv7131r_init); i++) {
-		if (i2c_w1(gspca_dev, hv7131r_init[i].reg,
-				hv7131r_init[i].val) < 0) {
-			err("HV7131R Sensor initialization failed");
-			return -ENODEV;
-		}
-	}
+	i2c_w1_buf(gspca_dev, hv7131r_init, ARRAY_SIZE(hv7131r_init));
+	if (gspca_dev->usb_err < 0)
+		pr_err("HV7131R Sensor initialization failed\n");
+
 	sd->hstart = 0;
 	sd->vstart = 1;
-	return 0;
 }
 
-static int set_cmatrix(struct gspca_dev *gspca_dev)
+static void set_cmatrix(struct gspca_dev *gspca_dev)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
-	s32 hue_coord, hue_index = 180 + sd->hue;
+	int satur;
+	s32 hue_coord, hue_index = 180 + sd->ctrls[HUE].val;
 	u8 cmatrix[21];
 
 	memset(cmatrix, 0, sizeof cmatrix);
-	cmatrix[2] = (sd->contrast * 0x25 / 0x100) + 0x26;
+	cmatrix[2] = (sd->ctrls[CONTRAST].val * 0x25 / 0x100) + 0x26;
 	cmatrix[0] = 0x13 + (cmatrix[2] - 0x26) * 0x13 / 0x25;
 	cmatrix[4] = 0x07 + (cmatrix[2] - 0x26) * 0x07 / 0x25;
-	cmatrix[18] = sd->brightness - 0x80;
+	cmatrix[18] = sd->ctrls[BRIGHTNESS].val - 0x80;
 
-	hue_coord = (hsv_red_x[hue_index] * sd->saturation) >> 8;
+	satur = sd->ctrls[SATURATION].val;
+	hue_coord = (hsv_red_x[hue_index] * satur) >> 8;
 	cmatrix[6] = hue_coord;
 	cmatrix[7] = (hue_coord >> 8) & 0x0f;
 
-	hue_coord = (hsv_red_y[hue_index] * sd->saturation) >> 8;
+	hue_coord = (hsv_red_y[hue_index] * satur) >> 8;
 	cmatrix[8] = hue_coord;
 	cmatrix[9] = (hue_coord >> 8) & 0x0f;
 
-	hue_coord = (hsv_green_x[hue_index] * sd->saturation) >> 8;
+	hue_coord = (hsv_green_x[hue_index] * satur) >> 8;
 	cmatrix[10] = hue_coord;
 	cmatrix[11] = (hue_coord >> 8) & 0x0f;
 
-	hue_coord = (hsv_green_y[hue_index] * sd->saturation) >> 8;
+	hue_coord = (hsv_green_y[hue_index] * satur) >> 8;
 	cmatrix[12] = hue_coord;
 	cmatrix[13] = (hue_coord >> 8) & 0x0f;
 
-	hue_coord = (hsv_blue_x[hue_index] * sd->saturation) >> 8;
+	hue_coord = (hsv_blue_x[hue_index] * satur) >> 8;
 	cmatrix[14] = hue_coord;
 	cmatrix[15] = (hue_coord >> 8) & 0x0f;
 
-	hue_coord = (hsv_blue_y[hue_index] * sd->saturation) >> 8;
+	hue_coord = (hsv_blue_y[hue_index] * satur) >> 8;
 	cmatrix[16] = hue_coord;
 	cmatrix[17] = (hue_coord >> 8) & 0x0f;
 
-	return reg_w(gspca_dev, 0x10e1, cmatrix, 21);
+	reg_w(gspca_dev, 0x10e1, cmatrix, 21);
 }
 
-static int set_gamma(struct gspca_dev *gspca_dev)
+static void set_gamma(struct gspca_dev *gspca_dev)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
 	u8 gamma[17];
-	u8 gval = sd->gamma * 0xb8 / 0x100;
-
+	u8 gval = sd->ctrls[GAMMA].val * 0xb8 / 0x100;
 
 	gamma[0] = 0x0a;
 	gamma[1] = 0x13 + (gval * (0xcb - 0x13) / 0xb8);
@@ -1590,29 +1555,29 @@
 	gamma[15] = 0xea + (gval * (0xf9 - 0xea) / 0xb8);
 	gamma[16] = 0xf5;
 
-	return reg_w(gspca_dev, 0x1190, gamma, 17);
+	reg_w(gspca_dev, 0x1190, gamma, 17);
 }
 
-static int set_redblue(struct gspca_dev *gspca_dev)
+static void set_redblue(struct gspca_dev *gspca_dev)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
-	reg_w1(gspca_dev, 0x118c, sd->red);
-	reg_w1(gspca_dev, 0x118f, sd->blue);
-	return 0;
+
+	reg_w1(gspca_dev, 0x118c, sd->ctrls[RED].val);
+	reg_w1(gspca_dev, 0x118f, sd->ctrls[BLUE].val);
 }
 
-static int set_hvflip(struct gspca_dev *gspca_dev)
+static void set_hvflip(struct gspca_dev *gspca_dev)
 {
 	u8 value, tslb, hflip, vflip;
 	u16 value2;
 	struct sd *sd = (struct sd *) gspca_dev;
 
 	if ((sd->flags & FLIP_DETECT) && dmi_check_system(flip_dmi_table)) {
-		hflip = !sd->hflip;
-		vflip = !sd->vflip;
+		hflip = !sd->ctrls[HFLIP].val;
+		vflip = !sd->ctrls[VFLIP].val;
 	} else {
-		hflip = sd->hflip;
-		vflip = sd->vflip;
+		hflip = sd->ctrls[HFLIP].val;
+		vflip = sd->ctrls[VFLIP].val;
 	}
 
 	switch (sd->sensor) {
@@ -1623,8 +1588,9 @@
 		if (vflip) {
 			value |= 0x10;
 			sd->vstart = 2;
-		} else
+		} else {
 			sd->vstart = 3;
+		}
 		reg_w1(gspca_dev, 0x1182, sd->vstart);
 		i2c_w1(gspca_dev, 0x1e, value);
 		break;
@@ -1672,49 +1638,76 @@
 		i2c_w1(gspca_dev, 0x01, value);
 		break;
 	}
-	return 0;
 }
 
-static int set_exposure(struct gspca_dev *gspca_dev)
+static void set_exposure(struct gspca_dev *gspca_dev)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
-	u8 exp[8] = {0x81, sd->i2c_addr, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e};
+	u8 exp[8] = {sd->i2c_intf, sd->i2c_addr,
+				0x00, 0x00, 0x00, 0x00, 0x00, 0x10};
+	int expo, expo2;
+
+	if (gspca_dev->streaming)
+		exp[7] = 0x1e;
+
+	expo = sd->ctrls[EXPOSURE].val;
 	switch (sd->sensor) {
 	case SENSOR_OV7660:
 	case SENSOR_OV7670:
 	case SENSOR_OV9655:
 	case SENSOR_OV9650:
+		if (expo > 547)
+			expo2 = 547;
+		else
+			expo2 = expo;
+		exp[0] |= (2 << 4);
+		exp[2] = 0x10;			/* AECH */
+		exp[3] = expo2 >> 2;
+		exp[7] = 0x10;
+		i2c_w(gspca_dev, exp);
+		exp[2] = 0x04;			/* COM1 */
+		exp[3] = expo2 & 0x0003;
+		exp[7] = 0x10;
+		i2c_w(gspca_dev, exp);
+		expo -= expo2;
+		exp[7] = 0x1e;
 		exp[0] |= (3 << 4);
-		exp[2] = 0x2d;
-		exp[3] = sd->exposure & 0xff;
-		exp[4] = sd->exposure >> 8;
+		exp[2] = 0x2d;			/* ADVFL & ADVFH */
+		exp[3] = expo;
+		exp[4] = expo >> 8;
 		break;
 	case SENSOR_MT9M001:
 	case SENSOR_MT9V112:
 	case SENSOR_MT9V011:
 		exp[0] |= (3 << 4);
 		exp[2] = 0x09;
-		exp[3] = sd->exposure >> 8;
-		exp[4] = sd->exposure & 0xff;
+		exp[3] = expo >> 8;
+		exp[4] = expo;
 		break;
 	case SENSOR_HV7131R:
 		exp[0] |= (4 << 4);
 		exp[2] = 0x25;
-		exp[3] = (sd->exposure >> 5) & 0xff;
-		exp[4] = (sd->exposure << 3) & 0xff;
+		exp[3] = expo >> 5;
+		exp[4] = expo << 3;
 		exp[5] = 0;
 		break;
 	default:
-		return 0;
+		return;
 	}
 	i2c_w(gspca_dev, exp);
-	return 0;
 }
 
-static int set_gain(struct gspca_dev *gspca_dev)
+static void set_gain(struct gspca_dev *gspca_dev)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
-	u8 gain[8] = {0x81, sd->i2c_addr, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1d};
+	u8 gain[8] = {sd->i2c_intf, sd->i2c_addr,
+				0x00, 0x00, 0x00, 0x00, 0x00, 0x10};
+	int g;
+
+	if (gspca_dev->streaming)
+		gain[7] = 0x15;		/* or 1d ? */
+
+	g = sd->ctrls[GAIN].val;
 	switch (sd->sensor) {
 	case SENSOR_OV7660:
 	case SENSOR_OV7670:
@@ -1722,238 +1715,50 @@
 	case SENSOR_OV9655:
 	case SENSOR_OV9650:
 		gain[0] |= (2 << 4);
-		gain[3] = ov_gain[sd->gain];
+		gain[3] = ov_gain[g];
 		break;
 	case SENSOR_MT9V011:
 		gain[0] |= (3 << 4);
 		gain[2] = 0x35;
-		gain[3] = micron1_gain[sd->gain] >> 8;
-		gain[4] = micron1_gain[sd->gain] & 0xff;
+		gain[3] = micron1_gain[g] >> 8;
+		gain[4] = micron1_gain[g];
 		break;
 	case SENSOR_MT9V112:
 		gain[0] |= (3 << 4);
 		gain[2] = 0x2f;
-		gain[3] = micron1_gain[sd->gain] >> 8;
-		gain[4] = micron1_gain[sd->gain] & 0xff;
+		gain[3] = micron1_gain[g] >> 8;
+		gain[4] = micron1_gain[g];
 		break;
 	case SENSOR_MT9M001:
 		gain[0] |= (3 << 4);
 		gain[2] = 0x2f;
-		gain[3] = micron2_gain[sd->gain] >> 8;
-		gain[4] = micron2_gain[sd->gain] & 0xff;
+		gain[3] = micron2_gain[g] >> 8;
+		gain[4] = micron2_gain[g];
 		break;
 	case SENSOR_HV7131R:
 		gain[0] |= (2 << 4);
 		gain[2] = 0x30;
-		gain[3] = hv7131r_gain[sd->gain];
+		gain[3] = hv7131r_gain[g];
 		break;
 	default:
-		return 0;
+		return;
 	}
 	i2c_w(gspca_dev, gain);
-	return 0;
-}
-
-static int sd_setbrightness(struct gspca_dev *gspca_dev, s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->brightness = val;
-	if (gspca_dev->streaming)
-		return set_cmatrix(gspca_dev);
-	return 0;
-}
-
-static int sd_getbrightness(struct gspca_dev *gspca_dev, s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-	*val = sd->brightness;
-	return 0;
-}
-
-
-static int sd_setcontrast(struct gspca_dev *gspca_dev, s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->contrast = val;
-	if (gspca_dev->streaming)
-		return set_cmatrix(gspca_dev);
-	return 0;
-}
-
-static int sd_getcontrast(struct gspca_dev *gspca_dev, s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-	*val = sd->contrast;
-	return 0;
-}
-
-static int sd_setsaturation(struct gspca_dev *gspca_dev, s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->saturation = val;
-	if (gspca_dev->streaming)
-		return set_cmatrix(gspca_dev);
-	return 0;
-}
-
-static int sd_getsaturation(struct gspca_dev *gspca_dev, s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-	*val = sd->saturation;
-	return 0;
-}
-
-static int sd_sethue(struct gspca_dev *gspca_dev, s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->hue = val;
-	if (gspca_dev->streaming)
-		return set_cmatrix(gspca_dev);
-	return 0;
-}
-
-static int sd_gethue(struct gspca_dev *gspca_dev, s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-	*val = sd->hue;
-	return 0;
-}
-
-static int sd_setgamma(struct gspca_dev *gspca_dev, s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->gamma = val;
-	if (gspca_dev->streaming)
-		return set_gamma(gspca_dev);
-	return 0;
-}
-
-static int sd_getgamma(struct gspca_dev *gspca_dev, s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-	*val = sd->gamma;
-	return 0;
-}
-
-static int sd_setredbalance(struct gspca_dev *gspca_dev, s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->red = val;
-	if (gspca_dev->streaming)
-		return set_redblue(gspca_dev);
-	return 0;
-}
-
-static int sd_getredbalance(struct gspca_dev *gspca_dev, s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-	*val = sd->red;
-	return 0;
-}
-
-static int sd_setbluebalance(struct gspca_dev *gspca_dev, s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->blue = val;
-	if (gspca_dev->streaming)
-		return set_redblue(gspca_dev);
-	return 0;
-}
-
-static int sd_getbluebalance(struct gspca_dev *gspca_dev, s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-	*val = sd->blue;
-	return 0;
-}
-
-static int sd_sethflip(struct gspca_dev *gspca_dev, s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->hflip = val;
-	if (gspca_dev->streaming)
-		return set_hvflip(gspca_dev);
-	return 0;
-}
-
-static int sd_gethflip(struct gspca_dev *gspca_dev, s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-	*val = sd->hflip;
-	return 0;
-}
-
-static int sd_setvflip(struct gspca_dev *gspca_dev, s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->vflip = val;
-	if (gspca_dev->streaming)
-		return set_hvflip(gspca_dev);
-	return 0;
-}
-
-static int sd_getvflip(struct gspca_dev *gspca_dev, s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-	*val = sd->vflip;
-	return 0;
 }
 
-static int sd_setexposure(struct gspca_dev *gspca_dev, s32 val)
+static void set_quality(struct gspca_dev *gspca_dev)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
 
-	sd->exposure = val;
-	if (gspca_dev->streaming)
-		return set_exposure(gspca_dev);
-	return 0;
-}
-
-static int sd_getexposure(struct gspca_dev *gspca_dev, s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-	*val = sd->exposure;
-	return 0;
-}
-
-static int sd_setgain(struct gspca_dev *gspca_dev, s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	sd->gain = val;
-	if (gspca_dev->streaming)
-		return set_gain(gspca_dev);
-	return 0;
-}
-
-static int sd_getgain(struct gspca_dev *gspca_dev, s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-	*val = sd->gain;
-	return 0;
-}
-
-static int sd_setautoexposure(struct gspca_dev *gspca_dev, s32 val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-	sd->auto_exposure = val;
-	return 0;
-}
-
-static int sd_getautoexposure(struct gspca_dev *gspca_dev, s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-	*val = sd->auto_exposure;
-	return 0;
+	jpeg_set_qual(sd->jpeg_hdr, sd->ctrls[QUALITY].val);
+	reg_w1(gspca_dev, 0x1061, 0x01);	/* stop transfer */
+	reg_w1(gspca_dev, 0x10e0, sd->fmt | 0x20); /* write QTAB */
+	reg_w(gspca_dev, 0x1100, &sd->jpeg_hdr[JPEG_QT0_OFFSET], 64);
+	reg_w(gspca_dev, 0x1140, &sd->jpeg_hdr[JPEG_QT1_OFFSET], 64);
+	reg_w1(gspca_dev, 0x1061, 0x03);	/* restart transfer */
+	reg_w1(gspca_dev, 0x10e0, sd->fmt);
+	sd->fmt ^= 0x0c;			/* invert QTAB use + write */
+	reg_w1(gspca_dev, 0x10e0, sd->fmt);
 }
 
 #ifdef CONFIG_VIDEO_ADV_DEBUG
@@ -1961,28 +1766,26 @@
 			struct v4l2_dbg_register *reg)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
+
 	switch (reg->match.type) {
 	case V4L2_CHIP_MATCH_HOST:
 		if (reg->match.addr != 0)
 			return -EINVAL;
 		if (reg->reg < 0x1000 || reg->reg > 0x11ff)
 			return -EINVAL;
-		if (reg_r(gspca_dev, reg->reg, 1) < 0)
-			return -EINVAL;
+		reg_r(gspca_dev, reg->reg, 1);
 		reg->val = gspca_dev->usb_buf[0];
-		return 0;
+		return gspca_dev->usb_err;
 	case V4L2_CHIP_MATCH_I2C_ADDR:
 		if (reg->match.addr != sd->i2c_addr)
 			return -EINVAL;
 		if (sd->sensor >= SENSOR_MT9V011 &&
 		    sd->sensor <= SENSOR_MT9M112) {
-			if (i2c_r2(gspca_dev, reg->reg, (u16 *)&reg->val) < 0)
-				return -EINVAL;
+			i2c_r2(gspca_dev, reg->reg, (u16 *) &reg->val);
 		} else {
-			if (i2c_r1(gspca_dev, reg->reg, (u8 *)&reg->val) < 0)
-				return -EINVAL;
+			i2c_r1(gspca_dev, reg->reg, (u8 *) &reg->val);
 		}
-		return 0;
+		return gspca_dev->usb_err;
 	}
 	return -EINVAL;
 }
@@ -1991,27 +1794,25 @@
 			struct v4l2_dbg_register *reg)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
+
 	switch (reg->match.type) {
 	case V4L2_CHIP_MATCH_HOST:
 		if (reg->match.addr != 0)
 			return -EINVAL;
 		if (reg->reg < 0x1000 || reg->reg > 0x11ff)
 			return -EINVAL;
-		if (reg_w1(gspca_dev, reg->reg, reg->val) < 0)
-			return -EINVAL;
-		return 0;
+		reg_w1(gspca_dev, reg->reg, reg->val);
+		return gspca_dev->usb_err;
 	case V4L2_CHIP_MATCH_I2C_ADDR:
 		if (reg->match.addr != sd->i2c_addr)
 			return -EINVAL;
 		if (sd->sensor >= SENSOR_MT9V011 &&
 		    sd->sensor <= SENSOR_MT9M112) {
-			if (i2c_w2(gspca_dev, reg->reg, reg->val) < 0)
-				return -EINVAL;
+			i2c_w2(gspca_dev, reg->reg, reg->val);
 		} else {
-			if (i2c_w1(gspca_dev, reg->reg, reg->val) < 0)
-				return -EINVAL;
+			i2c_w1(gspca_dev, reg->reg, reg->val);
 		}
-		return 0;
+		return gspca_dev->usb_err;
 	}
 	return -EINVAL;
 }
@@ -2046,10 +1847,12 @@
 	struct cam *cam;
 
 	cam = &gspca_dev->cam;
+	cam->needs_full_bandwidth = 1;
 
-	sd->sensor = (id->driver_info >> 8) & 0xff;
-	sd->i2c_addr = id->driver_info & 0xff;
-	sd->flags = (id->driver_info >> 16) & 0xff;
+	sd->sensor = id->driver_info >> 8;
+	sd->i2c_addr = id->driver_info;
+	sd->flags = id->driver_info >> 16;
+	sd->i2c_intf = 0x80;			/* i2c 100 Kb/s */
 
 	switch (sd->sensor) {
 	case SENSOR_MT9M112:
@@ -2063,6 +1866,9 @@
 		cam->cam_mode = mono_mode;
 		cam->nmodes = ARRAY_SIZE(mono_mode);
 		break;
+	case SENSOR_HV7131R:
+		sd->i2c_intf = 0x81;			/* i2c 400 Kb/s */
+		/* fall thru */
 	default:
 		cam->cam_mode = vga_mode;
 		cam->nmodes = ARRAY_SIZE(vga_mode);
@@ -2073,21 +1879,9 @@
 	sd->older_step = 0;
 	sd->exposure_step = 16;
 
-	sd->brightness = BRIGHTNESS_DEFAULT;
-	sd->contrast = CONTRAST_DEFAULT;
-	sd->saturation = SATURATION_DEFAULT;
-	sd->hue = HUE_DEFAULT;
-	sd->gamma = GAMMA_DEFAULT;
-	sd->red = RED_DEFAULT;
-	sd->blue = BLUE_DEFAULT;
-
-	sd->hflip = HFLIP_DEFAULT;
-	sd->vflip = VFLIP_DEFAULT;
-	sd->exposure = EXPOSURE_DEFAULT;
-	sd->gain = GAIN_DEFAULT;
-	sd->auto_exposure = AUTO_EXPOSURE_DEFAULT;
+	gspca_dev->cam.ctrls = sd->ctrls;
 
-	sd->quality = 95;
+	INIT_WORK(&sd->work, qual_upd);
 
 	return 0;
 }
@@ -2102,9 +1896,10 @@
 
 	for (i = 0; i < ARRAY_SIZE(bridge_init); i++) {
 		value = bridge_init[i][1];
-		if (reg_w(gspca_dev, bridge_init[i][0], &value, 1) < 0) {
-			err("Device initialization failed");
-			return -ENODEV;
+		reg_w(gspca_dev, bridge_init[i][0], &value, 1);
+		if (gspca_dev->usb_err < 0) {
+			pr_err("Device initialization failed\n");
+			return gspca_dev->usb_err;
 		}
 	}
 
@@ -2113,72 +1908,85 @@
 	else
 		reg_w1(gspca_dev, 0x1006, 0x20);
 
-	if (reg_w(gspca_dev, 0x10c0, i2c_init, 9) < 0) {
-		err("Device initialization failed");
-		return -ENODEV;
+	reg_w(gspca_dev, 0x10c0, i2c_init, 9);
+	if (gspca_dev->usb_err < 0) {
+		pr_err("Device initialization failed\n");
+		return gspca_dev->usb_err;
 	}
 
 	switch (sd->sensor) {
 	case SENSOR_OV9650:
-		if (ov9650_init_sensor(gspca_dev) < 0)
-			return -ENODEV;
-		info("OV9650 sensor detected");
+		ov9650_init_sensor(gspca_dev);
+		if (gspca_dev->usb_err < 0)
+			break;
+		pr_info("OV9650 sensor detected\n");
 		break;
 	case SENSOR_OV9655:
-		if (ov9655_init_sensor(gspca_dev) < 0)
-			return -ENODEV;
-		info("OV9655 sensor detected");
+		ov9655_init_sensor(gspca_dev);
+		if (gspca_dev->usb_err < 0)
+			break;
+		pr_info("OV9655 sensor detected\n");
 		break;
 	case SENSOR_SOI968:
-		if (soi968_init_sensor(gspca_dev) < 0)
-			return -ENODEV;
-		info("SOI968 sensor detected");
+		soi968_init_sensor(gspca_dev);
+		if (gspca_dev->usb_err < 0)
+			break;
+		pr_info("SOI968 sensor detected\n");
 		break;
 	case SENSOR_OV7660:
-		if (ov7660_init_sensor(gspca_dev) < 0)
-			return -ENODEV;
-		info("OV7660 sensor detected");
+		ov7660_init_sensor(gspca_dev);
+		if (gspca_dev->usb_err < 0)
+			break;
+		pr_info("OV7660 sensor detected\n");
 		break;
 	case SENSOR_OV7670:
-		if (ov7670_init_sensor(gspca_dev) < 0)
-			return -ENODEV;
-		info("OV7670 sensor detected");
+		ov7670_init_sensor(gspca_dev);
+		if (gspca_dev->usb_err < 0)
+			break;
+		pr_info("OV7670 sensor detected\n");
 		break;
 	case SENSOR_MT9VPRB:
-		if (mt9v_init_sensor(gspca_dev) < 0)
-			return -ENODEV;
+		mt9v_init_sensor(gspca_dev);
+		if (gspca_dev->usb_err < 0)
+			break;
+		pr_info("MT9VPRB sensor detected\n");
 		break;
 	case SENSOR_MT9M111:
-		if (mt9m111_init_sensor(gspca_dev) < 0)
-			return -ENODEV;
-		info("MT9M111 sensor detected");
+		mt9m111_init_sensor(gspca_dev);
+		if (gspca_dev->usb_err < 0)
+			break;
+		pr_info("MT9M111 sensor detected\n");
 		break;
 	case SENSOR_MT9M112:
-		if (mt9m112_init_sensor(gspca_dev) < 0)
-			return -ENODEV;
-		info("MT9M112 sensor detected");
+		mt9m112_init_sensor(gspca_dev);
+		if (gspca_dev->usb_err < 0)
+			break;
+		pr_info("MT9M112 sensor detected\n");
 		break;
 	case SENSOR_MT9M001:
-		if (mt9m001_init_sensor(gspca_dev) < 0)
-			return -ENODEV;
+		mt9m001_init_sensor(gspca_dev);
+		if (gspca_dev->usb_err < 0)
+			break;
 		break;
 	case SENSOR_HV7131R:
-		if (hv7131r_init_sensor(gspca_dev) < 0)
-			return -ENODEV;
-		info("HV7131R sensor detected");
+		hv7131r_init_sensor(gspca_dev);
+		if (gspca_dev->usb_err < 0)
+			break;
+		pr_info("HV7131R sensor detected\n");
 		break;
 	default:
-		info("Unsupported Sensor");
-		return -ENODEV;
+		pr_err("Unsupported sensor\n");
+		gspca_dev->usb_err = -ENODEV;
 	}
 
-	return 0;
+	return gspca_dev->usb_err;
 }
 
 static void configure_sensor_output(struct gspca_dev *gspca_dev, int mode)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
 	u8 value;
+
 	switch (sd->sensor) {
 	case SENSOR_SOI968:
 		if (mode & MODE_SXGA) {
@@ -2231,6 +2039,43 @@
 	}
 }
 
+static int sd_isoc_init(struct gspca_dev *gspca_dev)
+{
+	struct usb_interface *intf;
+	u32 flags = gspca_dev->cam.cam_mode[(int)gspca_dev->curr_mode].priv;
+
+	/*
+	 * When using the SN9C20X_I420 fmt the sn9c20x needs more bandwidth
+	 * than our regular bandwidth calculations reserve, so we force the
+	 * use of a specific altsetting when using the SN9C20X_I420 fmt.
+	 */
+	if (!(flags & (MODE_RAW | MODE_JPEG))) {
+		intf = usb_ifnum_to_if(gspca_dev->dev, gspca_dev->iface);
+
+		if (intf->num_altsetting != 9) {
+			pr_warn("sn9c20x camera with unknown number of alt "
+			        "settings (%d), please report!\n",
+			        intf->num_altsetting);
+			gspca_dev->alt = intf->num_altsetting;
+			return 0;
+		}
+
+		switch (gspca_dev->width) {
+		case 160: /* 160x120 */
+			gspca_dev->alt = 2;
+			break;
+		case 320: /* 320x240 */
+			gspca_dev->alt = 6;
+			break;
+		default:  /* >= 640x480 */
+			gspca_dev->alt = 9;
+			break;
+		}
+	}
+
+	return 0;
+}
+
 #define HW_WIN(mode, hstart, vstart) \
 ((const u8 []){hstart, 0, vstart, 0, \
 (mode & MODE_SXGA ? 1280 >> 4 : 640 >> 4), \
@@ -2251,31 +2096,32 @@
 
 	jpeg_define(sd->jpeg_hdr, height, width,
 			0x21);
-	jpeg_set_qual(sd->jpeg_hdr, sd->quality);
+	jpeg_set_qual(sd->jpeg_hdr, sd->ctrls[QUALITY].val);
 
 	if (mode & MODE_RAW)
 		fmt = 0x2d;
 	else if (mode & MODE_JPEG)
-		fmt = 0x2c;
+		fmt = 0x24;
 	else
 		fmt = 0x2f;	/* YUV 420 */
+	sd->fmt = fmt;
 
 	switch (mode & SCALE_MASK) {
 	case SCALE_1280x1024:
 		scale = 0xc0;
-		info("Set 1280x1024");
+		pr_info("Set 1280x1024\n");
 		break;
 	case SCALE_640x480:
 		scale = 0x80;
-		info("Set 640x480");
+		pr_info("Set 640x480\n");
 		break;
 	case SCALE_320x240:
 		scale = 0x90;
-		info("Set 320x240");
+		pr_info("Set 320x240\n");
 		break;
 	case SCALE_160x120:
 		scale = 0xa0;
-		info("Set 160x120");
+		pr_info("Set 160x120\n");
 		break;
 	}
 
@@ -2295,18 +2141,37 @@
 	set_hvflip(gspca_dev);
 
 	reg_w1(gspca_dev, 0x1007, 0x20);
+	reg_w1(gspca_dev, 0x1061, 0x03);
 
-	reg_r(gspca_dev, 0x1061, 1);
-	reg_w1(gspca_dev, 0x1061, gspca_dev->usb_buf[0] | 0x02);
-	return 0;
+	/* if JPEG, prepare the compression quality update */
+	if (mode & MODE_JPEG) {
+		sd->pktsz = sd->npkt = 0;
+		sd->nchg = 0;
+		sd->work_thread =
+			create_singlethread_workqueue(KBUILD_MODNAME);
+	}
+
+	return gspca_dev->usb_err;
 }
 
 static void sd_stopN(struct gspca_dev *gspca_dev)
 {
 	reg_w1(gspca_dev, 0x1007, 0x00);
+	reg_w1(gspca_dev, 0x1061, 0x01);
+}
+
+/* called on streamoff with alt==0 and on disconnect */
+/* the usb_lock is held at entry - restore on exit */
+static void sd_stop0(struct gspca_dev *gspca_dev)
+{
+	struct sd *sd = (struct sd *) gspca_dev;
 
-	reg_r(gspca_dev, 0x1061, 1);
-	reg_w1(gspca_dev, 0x1061, gspca_dev->usb_buf[0] & ~0x02);
+	if (sd->work_thread != NULL) {
+		mutex_unlock(&gspca_dev->usb_lock);
+		destroy_workqueue(sd->work_thread);
+		mutex_lock(&gspca_dev->usb_lock);
+		sd->work_thread = NULL;
+	}
 }
 
 static void do_autoexposure(struct gspca_dev *gspca_dev, u16 avg_lum)
@@ -2320,15 +2185,15 @@
 	 * and exposure steps
 	 */
 	if (avg_lum < MIN_AVG_LUM) {
-		if (sd->exposure > 0x1770)
+		if (sd->ctrls[EXPOSURE].val > 0x1770)
 			return;
 
-		new_exp = sd->exposure + sd->exposure_step;
+		new_exp = sd->ctrls[EXPOSURE].val + sd->exposure_step;
 		if (new_exp > 0x1770)
 			new_exp = 0x1770;
 		if (new_exp < 0x10)
 			new_exp = 0x10;
-		sd->exposure = new_exp;
+		sd->ctrls[EXPOSURE].val = new_exp;
 		set_exposure(gspca_dev);
 
 		sd->older_step = sd->old_step;
@@ -2340,14 +2205,14 @@
 			sd->exposure_step += 2;
 	}
 	if (avg_lum > MAX_AVG_LUM) {
-		if (sd->exposure < 0x10)
+		if (sd->ctrls[EXPOSURE].val < 0x10)
 			return;
-		new_exp = sd->exposure - sd->exposure_step;
+		new_exp = sd->ctrls[EXPOSURE].val - sd->exposure_step;
 		if (new_exp > 0x1700)
 			new_exp = 0x1770;
 		if (new_exp < 0x10)
 			new_exp = 0x10;
-		sd->exposure = new_exp;
+		sd->ctrls[EXPOSURE].val = new_exp;
 		set_exposure(gspca_dev);
 		sd->older_step = sd->old_step;
 		sd->old_step = 0;
@@ -2364,14 +2229,14 @@
 	struct sd *sd = (struct sd *) gspca_dev;
 
 	if (avg_lum < MIN_AVG_LUM) {
-		if (sd->gain + 1 <= 28) {
-			sd->gain++;
+		if (sd->ctrls[GAIN].val + 1 <= 28) {
+			sd->ctrls[GAIN].val++;
 			set_gain(gspca_dev);
 		}
 	}
 	if (avg_lum > MAX_AVG_LUM) {
-		if (sd->gain > 0) {
-			sd->gain--;
+		if (sd->ctrls[GAIN].val > 0) {
+			sd->ctrls[GAIN].val--;
 			set_gain(gspca_dev);
 		}
 	}
@@ -2382,7 +2247,7 @@
 	struct sd *sd = (struct sd *) gspca_dev;
 	int avg_lum;
 
-	if (!sd->auto_exposure)
+	if (!sd->ctrls[AUTOGAIN].val)
 		return;
 
 	avg_lum = atomic_read(&sd->avg_lum);
@@ -2392,33 +2257,92 @@
 		do_autoexposure(gspca_dev, avg_lum);
 }
 
+/* JPEG quality update */
+/* This function is executed from a work queue. */
+static void qual_upd(struct work_struct *work)
+{
+	struct sd *sd = container_of(work, struct sd, work);
+	struct gspca_dev *gspca_dev = &sd->gspca_dev;
+
+	mutex_lock(&gspca_dev->usb_lock);
+	PDEBUG(D_STREAM, "qual_upd %d%%", sd->ctrls[QUALITY].val);
+	set_quality(gspca_dev);
+	mutex_unlock(&gspca_dev->usb_lock);
+}
+
 #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
 static int sd_int_pkt_scan(struct gspca_dev *gspca_dev,
 			u8 *data,		/* interrupt packet */
 			int len)		/* interrupt packet length */
 {
 	struct sd *sd = (struct sd *) gspca_dev;
-	int ret = -EINVAL;
+
 	if (!(sd->flags & HAS_NO_BUTTON) && len == 1) {
-			input_report_key(gspca_dev->input_dev, KEY_CAMERA, 1);
-			input_sync(gspca_dev->input_dev);
-			input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
-			input_sync(gspca_dev->input_dev);
-			ret = 0;
+		input_report_key(gspca_dev->input_dev, KEY_CAMERA, 1);
+		input_sync(gspca_dev->input_dev);
+		input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
+		input_sync(gspca_dev->input_dev);
+		return 0;
 	}
-	return ret;
+	return -EINVAL;
 }
 #endif
 
+/* check the JPEG compression */
+static void transfer_check(struct gspca_dev *gspca_dev,
+			u8 *data)
+{
+	struct sd *sd = (struct sd *) gspca_dev;
+	int new_qual, r;
+
+	new_qual = 0;
+
+	/* if USB error, discard the frame and decrease the quality */
+	if (data[6] & 0x08) {				/* USB FIFO full */
+		gspca_dev->last_packet_type = DISCARD_PACKET;
+		new_qual = -5;
+	} else {
+
+		/* else, compute the filling rate and a new JPEG quality */
+		r = (sd->pktsz * 100) /
+			(sd->npkt *
+				gspca_dev->urb[0]->iso_frame_desc[0].length);
+		if (r >= 85)
+			new_qual = -3;
+		else if (r < 75)
+			new_qual = 2;
+	}
+	if (new_qual != 0) {
+		sd->nchg += new_qual;
+		if (sd->nchg < -6 || sd->nchg >= 12) {
+			sd->nchg = 0;
+			new_qual += sd->ctrls[QUALITY].val;
+			if (new_qual < QUALITY_MIN)
+				new_qual = QUALITY_MIN;
+			else if (new_qual > QUALITY_MAX)
+				new_qual = QUALITY_MAX;
+			if (new_qual != sd->ctrls[QUALITY].val) {
+				sd->ctrls[QUALITY].val = new_qual;
+				queue_work(sd->work_thread, &sd->work);
+			}
+		}
+	} else {
+		sd->nchg = 0;
+	}
+	sd->pktsz = sd->npkt = 0;
+}
+
 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
 			u8 *data,			/* isoc packet */
 			int len)			/* iso packet length */
 {
 	struct sd *sd = (struct sd *) gspca_dev;
-	int avg_lum;
-	static u8 frame_header[] =
+	int avg_lum, is_jpeg;
+	static const u8 frame_header[] =
 		{0xff, 0xff, 0x00, 0xc4, 0xc4, 0x96};
-	if (len == 64 && memcmp(data, frame_header, 6) == 0) {
+
+	is_jpeg = (sd->fmt & 0x03) == 0;
+	if (len >= 64 && memcmp(data, frame_header, 6) == 0) {
 		avg_lum = ((data[35] >> 2) & 3) |
 			   (data[20] << 2) |
 			   (data[19] << 10);
@@ -2445,12 +2369,18 @@
 			    (data[33] << 10);
 		avg_lum >>= 9;
 		atomic_set(&sd->avg_lum, avg_lum);
+
+		if (is_jpeg)
+			transfer_check(gspca_dev, data);
+
 		gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
-		return;
+		len -= 64;
+		if (len == 0)
+			return;
+		data += 64;
 	}
 	if (gspca_dev->last_packet_type == LAST_PACKET) {
-		if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv
-				& MODE_JPEG) {
+		if (is_jpeg) {
 			gspca_frame_add(gspca_dev, FIRST_PACKET,
 				sd->jpeg_hdr, JPEG_HDR_SZ);
 			gspca_frame_add(gspca_dev, INTER_PACKET,
@@ -2460,19 +2390,26 @@
 				data, len);
 		}
 	} else {
+		/* if JPEG, count the packets and their size */
+		if (is_jpeg) {
+			sd->npkt++;
+			sd->pktsz += len;
+		}
 		gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
 	}
 }
 
 /* sub-driver description */
 static const struct sd_desc sd_desc = {
-	.name = MODULE_NAME,
+	.name = KBUILD_MODNAME,
 	.ctrls = sd_ctrls,
 	.nctrls = ARRAY_SIZE(sd_ctrls),
 	.config = sd_config,
 	.init = sd_init,
+	.isoc_init = sd_isoc_init,
 	.start = sd_start,
 	.stopN = sd_stopN,
+	.stop0 = sd_stop0,
 	.pkt_scan = sd_pkt_scan,
 #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
 	.int_pkt_scan = sd_int_pkt_scan,
@@ -2513,7 +2450,7 @@
 	{USB_DEVICE(0x0c45, 0x628f), SN9C20X(OV9650, 0x30, 0)},
 	{USB_DEVICE(0x0c45, 0x62a0), SN9C20X(OV7670, 0x21, 0)},
 	{USB_DEVICE(0x0c45, 0x62b0), SN9C20X(MT9VPRB, 0x00, 0)},
-	{USB_DEVICE(0x0c45, 0x62b3), SN9C20X(OV9655, 0x30, 0)},
+	{USB_DEVICE(0x0c45, 0x62b3), SN9C20X(OV9655, 0x30, LED_REVERSE)},
 	{USB_DEVICE(0x0c45, 0x62bb), SN9C20X(OV7660, 0x21, LED_REVERSE)},
 	{USB_DEVICE(0x0c45, 0x62bc), SN9C20X(HV7131R, 0x11, 0)},
 	{USB_DEVICE(0x045e, 0x00f4), SN9C20X(OV9650, 0x30, 0)},
@@ -2541,7 +2478,7 @@
 }
 
 static struct usb_driver sd_driver = {
-	.name = MODULE_NAME,
+	.name = KBUILD_MODNAME,
 	.id_table = device_table,
 	.probe = sd_probe,
 	.disconnect = gspca_disconnect,
@@ -2552,15 +2489,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/sonixb.c linux-3.0.82x/drivers/media/video/gspca/sonixb.c
--- linux-3.0.82/drivers/media/video/gspca/sonixb.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/sonixb.c	2017-09-23 03:42:49.490676677 +0800
@@ -1079,20 +1079,23 @@
 	}
 	cam->npkt = 36;			/* 36 packets per ISOC message */
 
-	if (sensor_data[sd->sensor].flags & F_COARSE_EXPO) {
-		sd->ctrls[EXPOSURE].min = COARSE_EXPOSURE_MIN;
-		sd->ctrls[EXPOSURE].max = COARSE_EXPOSURE_MAX;
-		sd->ctrls[EXPOSURE].def = COARSE_EXPOSURE_DEF;
-	}
-
 	return 0;
 }
 
 /* this function is called at probe and resume time */
 static int sd_init(struct gspca_dev *gspca_dev)
 {
+	struct sd *sd = (struct sd *) gspca_dev;
 	const __u8 stop = 0x09; /* Disable stream turn of LED */
 
+	if (sensor_data[sd->sensor].flags & F_COARSE_EXPO) {
+		sd->ctrls[EXPOSURE].min = COARSE_EXPOSURE_MIN;
+		sd->ctrls[EXPOSURE].max = COARSE_EXPOSURE_MAX;
+		sd->ctrls[EXPOSURE].def = COARSE_EXPOSURE_DEF;
+		if (sd->ctrls[EXPOSURE].val > COARSE_EXPOSURE_MAX)
+			sd->ctrls[EXPOSURE].val = COARSE_EXPOSURE_DEF;
+	}
+
 	reg_w(gspca_dev, 0x01, &stop, 1);
 
 	return 0;
@@ -1527,15 +1530,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/sonixj.c linux-3.0.82x/drivers/media/video/gspca/sonixj.c
--- linux-3.0.82/drivers/media/video/gspca/sonixj.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/sonixj.c	2017-09-23 03:42:49.490676677 +0800
@@ -1,7 +1,7 @@
 /*
  * Sonix sn9c102p sn9c105 sn9c120 (jpeg) subdriver
  *
- * Copyright (C) 2009-2010 Jean-FranÃ§ois Moine <http://moinejf.free.fr>
+ * Copyright (C) 2009-2011 Jean-FranÃ§ois Moine <http://moinejf.free.fr>
  * Copyright (C) 2005 Michel Xhaard mxhaard@magic.fr
  *
  * This program is free software; you can redistribute it and/or modify
@@ -19,6 +19,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "sonixj"
 
 #include <linux/input.h>
@@ -29,6 +31,9 @@
 MODULE_DESCRIPTION("GSPCA/SONIX JPEG USB Camera Driver");
 MODULE_LICENSE("GPL");
 
+// test for po2030n like
+#define TESTPO 1
+
 /* controls */
 enum e_ctrl {
 	BRIGHTNESS,
@@ -37,7 +42,9 @@
 	BLUE,
 	RED,
 	GAMMA,
+	EXPOSURE,
 	AUTOGAIN,
+	GAIN,
 	HFLIP,
 	VFLIP,
 	SHARPNESS,
@@ -129,14 +136,16 @@
 static void setcolors(struct gspca_dev *gspca_dev);
 static void setredblue(struct gspca_dev *gspca_dev);
 static void setgamma(struct gspca_dev *gspca_dev);
-static void setautogain(struct gspca_dev *gspca_dev);
+static void setexposure(struct gspca_dev *gspca_dev);
+static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val);
+static void setgain(struct gspca_dev *gspca_dev);
 static void sethvflip(struct gspca_dev *gspca_dev);
 static void setsharpness(struct gspca_dev *gspca_dev);
 static void setillum(struct gspca_dev *gspca_dev);
 static void setfreq(struct gspca_dev *gspca_dev);
 
 static const struct ctrl sd_ctrls[NCTRLS] = {
-[BRIGHTNESS] =  {
+[BRIGHTNESS] = {
 	    {
 		.id      = V4L2_CID_BRIGHTNESS,
 		.type    = V4L2_CTRL_TYPE_INTEGER,
@@ -157,7 +166,7 @@
 #define CONTRAST_MAX 127
 		.maximum = CONTRAST_MAX,
 		.step    = 1,
-		.default_value = 63,
+		.default_value = 20,
 	    },
 	    .set_control = setcontrast
 	},
@@ -211,6 +220,18 @@
 	    },
 	    .set_control = setgamma
 	},
+[EXPOSURE] = {
+	    {
+		.id      = V4L2_CID_EXPOSURE,
+		.type    = V4L2_CTRL_TYPE_INTEGER,
+		.name    = "Exposure",
+		.minimum = 500,
+		.maximum = 1500,
+		.step    = 1,
+		.default_value = 1024
+	    },
+	    .set_control = setexposure
+	},
 [AUTOGAIN] = {
 	    {
 		.id      = V4L2_CID_AUTOGAIN,
@@ -221,7 +242,19 @@
 		.step    = 1,
 		.default_value = 1
 	    },
-	    .set_control = setautogain
+	    .set = sd_setautogain,
+	},
+[GAIN] = {
+	    {
+		.id      = V4L2_CID_GAIN,
+		.type    = V4L2_CTRL_TYPE_INTEGER,
+		.name    = "Gain",
+		.minimum = 4,
+		.maximum = 49,
+		.step    = 1,
+		.default_value = 15
+	    },
+	    .set_control = setgain
 	},
 [HFLIP] = {
 	    {
@@ -288,60 +321,87 @@
 
 /* table of the disabled controls */
 static const __u32 ctrl_dis[] = {
-[SENSOR_ADCM1700] =	(1 << AUTOGAIN) |
+[SENSOR_ADCM1700] =	(1 << EXPOSURE) |
+			(1 << AUTOGAIN) |
+			(1 << GAIN) |
 			(1 << HFLIP) |
 			(1 << VFLIP) |
 			(1 << FREQ),
 
-[SENSOR_GC0307] =	(1 << HFLIP) |
+[SENSOR_GC0307] =	(1 << EXPOSURE) |
+			(1 << GAIN) |
+			(1 << HFLIP) |
 			(1 << VFLIP) |
 			(1 << FREQ),
 
-[SENSOR_HV7131R] =	(1 << HFLIP) |
+[SENSOR_HV7131R] =	(1 << EXPOSURE) |
+			(1 << GAIN) |
+			(1 << HFLIP) |
 			(1 << FREQ),
 
-[SENSOR_MI0360] =	(1 << HFLIP) |
+[SENSOR_MI0360] =	(1 << EXPOSURE) |
+			(1 << GAIN) |
+			(1 << HFLIP) |
 			(1 << VFLIP) |
 			(1 << FREQ),
 
-[SENSOR_MI0360B] =	(1 << HFLIP) |
+[SENSOR_MI0360B] =	(1 << EXPOSURE) |
+			(1 << GAIN) |
+			(1 << HFLIP) |
 			(1 << VFLIP) |
 			(1 << FREQ),
 
-[SENSOR_MO4000] =	(1 << HFLIP) |
+[SENSOR_MO4000] =	(1 << EXPOSURE) |
+			(1 << GAIN) |
+			(1 << HFLIP) |
 			(1 << VFLIP) |
 			(1 << FREQ),
 
-[SENSOR_MT9V111] =	(1 << HFLIP) |
+[SENSOR_MT9V111] =	(1 << EXPOSURE) |
+			(1 << GAIN) |
+			(1 << HFLIP) |
 			(1 << VFLIP) |
 			(1 << FREQ),
 
-[SENSOR_OM6802] =	(1 << HFLIP) |
+[SENSOR_OM6802] =	(1 << EXPOSURE) |
+			(1 << GAIN) |
+			(1 << HFLIP) |
 			(1 << VFLIP) |
 			(1 << FREQ),
 
-[SENSOR_OV7630] =	(1 << HFLIP),
-
-[SENSOR_OV7648] =	(1 << HFLIP),
-
-[SENSOR_OV7660] =	(1 << AUTOGAIN) |
+[SENSOR_OV7630] =	(1 << EXPOSURE) |
+			(1 << GAIN) |
+			(1 << HFLIP),
+
+[SENSOR_OV7648] =	(1 << EXPOSURE) |
+			(1 << GAIN) |
+			(1 << HFLIP),
+
+[SENSOR_OV7660] =	(1 << EXPOSURE) |
+			(1 << AUTOGAIN) |
+			(1 << GAIN) |
 			(1 << HFLIP) |
 			(1 << VFLIP),
 
-[SENSOR_PO1030] =	(1 << AUTOGAIN) |
+[SENSOR_PO1030] =	(1 << EXPOSURE) |
+			(1 << AUTOGAIN) |
+			(1 << GAIN) |
 			(1 << HFLIP) |
 			(1 << VFLIP) |
 			(1 << FREQ),
 
-[SENSOR_PO2030N] =	(1 << AUTOGAIN) |
-			(1 << FREQ),
+[SENSOR_PO2030N] =	(1 << FREQ),
 
-[SENSOR_SOI768] =	(1 << AUTOGAIN) |
+[SENSOR_SOI768] =	(1 << EXPOSURE) |
+			(1 << AUTOGAIN) |
+			(1 << GAIN) |
 			(1 << HFLIP) |
 			(1 << VFLIP) |
 			(1 << FREQ),
 
-[SENSOR_SP80708] =	(1 << AUTOGAIN) |
+[SENSOR_SP80708] =	(1 << EXPOSURE) |
+			(1 << AUTOGAIN) |
+			(1 << GAIN) |
 			(1 << HFLIP) |
 			(1 << VFLIP) |
 			(1 << FREQ),
@@ -367,8 +427,7 @@
 		.priv = 1},
 	{640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 		.bytesperline = 640,
-		/* Note 3 / 8 is not large enough, not even 5 / 8 is ?! */
-		.sizeimage = 640 * 480 * 3 / 4 + 590,
+		.sizeimage = 640 * 480 * 4 / 8 + 590,
 		.colorspace = V4L2_COLORSPACE_JPEG,
 		.priv = 0},
 };
@@ -489,7 +548,7 @@
 /*	reg8	reg9	rega	regb	regc	regd	rege	regf */
 	0x81,	0x21,	0x00,	0x00,	0x00,	0x00,	0x00,	0x00,
 /*	reg10	reg11	reg12	reg13	reg14	reg15	reg16	reg17 */
-	0x03,	0x00,	0x01,	0x01,	0x08,	0x28,	0x1e,	0x20,
+	0x03,	0x00,	0x01,	0x01,	0x08,	0x28,	0x1e,	0x00,
 /*	reg18	reg19	reg1a	reg1b */
 	0x07,	0x00,	0x00,	0x00
 };
@@ -511,14 +570,20 @@
 /*	reg8	reg9	rega	regb	regc	regd	rege	regf */
 	0x81,	0x6e,	0x00,	0x00,	0x00,	0x00,	0x00,	0x00,
 /*	reg10	reg11	reg12	reg13	reg14	reg15	reg16	reg17 */
+#ifdef TESTPO
+	0x03,	0x00,	0x00,	0x01,	0x14,	0x28,	0x1e,	0x00,
+/*	reg18	reg19	reg1a	reg1b */
+	0x07,	0x0a,	0x00,	0x00
+#else
 	0x03,	0x00,	0x00,	0x01,	0x14,	0x28,	0x1e,	0x00,
 /*	reg18	reg19	reg1a	reg1b */
 	0x07,	0x00,	0x00,	0x00
+#endif
 };
 
 static const u8 sn_soi768[0x1c] = {
 /*	reg0	reg1	reg2	reg3	reg4	reg5	reg6	reg7 */
-	0x00,	0x21,	0x40,	0x00,	0x1a,	0x00,	0x00,	0x00,
+	0x00,	0x61,	0x40,	0x00,	0x1a,	0x00,	0x00,	0x00,
 /*	reg8	reg9	rega	regb	regc	regd	rege	regf */
 	0x81,	0x21,	0x00,	0x00,	0x00,	0x00,	0x00,	0x00,
 /*	reg10	reg11	reg12	reg13	reg14	reg15	reg16	reg17 */
@@ -737,7 +802,7 @@
 	{0xd1, 0x5d, 0x22, 0x00, 0x00, 0x00, 0x00, 0x10},
 	{0xd1, 0x5d, 0x24, 0x00, 0x00, 0x00, 0x00, 0x10},
 	{0xd1, 0x5d, 0x26, 0x00, 0x00, 0x00, 0x24, 0x10},
-	{0xd1, 0x5d, 0x2f, 0xf7, 0xB0, 0x00, 0x04, 0x10},
+	{0xd1, 0x5d, 0x2f, 0xf7, 0xb0, 0x00, 0x04, 0x10},
 	{0xd1, 0x5d, 0x31, 0x00, 0x00, 0x00, 0x00, 0x10},
 	{0xd1, 0x5d, 0x33, 0x00, 0x00, 0x01, 0x00, 0x10},
 	{0xb1, 0x5d, 0x3d, 0x06, 0x8f, 0x00, 0x00, 0x10},
@@ -1176,18 +1241,28 @@
 };
 
 static const u8 po2030n_sensor_init[][8] = {
-	{0xa1, 0x6e, 0x1e, 0x1a, 0x00, 0x00, 0x00, 0x10},
-	{0xa1, 0x6e, 0x1f, 0x99, 0x00, 0x00, 0x00, 0x10},
+	{0xa1, 0x6e, 0x1e, 0x1a, 0x00, 0x00, 0x00, 0x10}, /* trf enable */
+	{0xa1, 0x6e, 0x1f, 0x99, 0x00, 0x00, 0x00, 0x10}, /* sync */
 	{DELAY, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* delay 10ms */
 	{0xa1, 0x6e, 0x1e, 0x0a, 0x00, 0x00, 0x00, 0x10},
 	{0xa1, 0x6e, 0x1f, 0x19, 0x00, 0x00, 0x00, 0x10},
 	{DELAY, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* delay 10ms */
-	{0xa1, 0x6e, 0x20, 0x44, 0x00, 0x00, 0x00, 0x10},
+	{0xa1, 0x6e, 0x20, 0x44, 0x00, 0x00, 0x00, 0x10}, /* VGA */
+#ifdef TESTPO
+	{0xa1, 0x6e, 0x06, 0x01, 0x00, 0x00, 0x00, 0x10}, /*frame height */
+	{0xa1, 0x6e, 0x07, 0xe8, 0x00, 0x00, 0x00, 0x10},
+	{0xa1, 0x6e, 0x8d, 0x00, 0x00, 0x00, 0x00, 0x10},
+	{0xd1, 0x6e, 0x08, 0x00, 0xca, 0x00, 0x01, 0x10}, /* window */
+	{0xd1, 0x6e, 0x0c, 0x03, 0x63, 0x01, 0xe7, 0x10},
+	{0xa1, 0x6e, 0x53, 0x17, 0x00, 0x00, 0x00, 0x10},
+	{0xd1, 0x6e, 0x16, 0x40, 0x40, 0x40, 0x40, 0x10}, /* RGBG gains */
+	{0xa1, 0x6e, 0x1e, 0xca, 0x00, 0x00, 0x00, 0x10}, /* H & V mirror */
+#else
 	{0xa1, 0x6e, 0x04, 0x03, 0x00, 0x00, 0x00, 0x10},
 	{0xa1, 0x6e, 0x05, 0x70, 0x00, 0x00, 0x00, 0x10},
 	{0xa1, 0x6e, 0x06, 0x02, 0x00, 0x00, 0x00, 0x10},
 	{0xa1, 0x6e, 0x07, 0x25, 0x00, 0x00, 0x00, 0x10},
-	{0xd1, 0x6e, 0x08, 0x00, 0xd0, 0x00, 0x08, 0x10},
+	{0xd1, 0x6e, 0x08, 0x00, 0xd0, 0x00, 0x08, 0x10}, /* window */
 	{0xd1, 0x6e, 0x0c, 0x03, 0x50, 0x01, 0xe8, 0x10},
 	{0xd1, 0x6e, 0x1d, 0x20, 0x0a, 0x19, 0x44, 0x10},
 	{0xd1, 0x6e, 0x21, 0x00, 0x00, 0x00, 0x00, 0x10},
@@ -1226,28 +1301,25 @@
 	{0xd1, 0x6e, 0x35, 0x30, 0x30, 0x08, 0x00, 0x10},
 	{0xd1, 0x6e, 0x39, 0x00, 0x00, 0x33, 0x06, 0x10},
 	{0xb1, 0x6e, 0x3d, 0x06, 0x02, 0x00, 0x00, 0x10},
+#endif
 	{}
 };
 static const u8 po2030n_sensor_param1[][8] = {
-	{0xa1, 0x6e, 0x1a, 0x01, 0x00, 0x00, 0x00, 0x10},
+	{0xa1, 0x6e, 0x1a, 0x01, 0x00, 0x00, 0x00, 0x10}, /* exposure */
 	{DELAY, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* delay 8ms */
 	{0xa1, 0x6e, 0x1b, 0xf4, 0x00, 0x00, 0x00, 0x10},
-	{0xa1, 0x6e, 0x15, 0x04, 0x00, 0x00, 0x00, 0x10},
-	{0xd1, 0x6e, 0x16, 0x50, 0x40, 0x49, 0x40, 0x10},
+	{0xa1, 0x6e, 0x15, 0x04, 0x00, 0x00, 0x00, 0x10}, /* gain */
+	{0xd1, 0x6e, 0x16, 0x40, 0x40, 0x40, 0x40, 0x10}, /* RGBG gains */
 /*param2*/
-	{0xa1, 0x6e, 0x1d, 0x00, 0x00, 0x00, 0x00, 0x10},
-	{0xa1, 0x6e, 0x04, 0x03, 0x00, 0x00, 0x00, 0x10},
+	{0xa1, 0x6e, 0x1d, 0x00, 0x00, 0x00, 0x00, 0x10}, /* clock */
+	{0xa1, 0x6e, 0x04, 0x03, 0x00, 0x00, 0x00, 0x10}, /* width */
 	{0xa1, 0x6e, 0x05, 0x6f, 0x00, 0x00, 0x00, 0x10},
-	{0xa1, 0x6e, 0x06, 0x02, 0x00, 0x00, 0x00, 0x10},
+	{0xa1, 0x6e, 0x06, 0x02, 0x00, 0x00, 0x00, 0x10}, /* height */
+#ifdef TESTPO
+	{0xa1, 0x6e, 0x07, 0x1f, 0x00, 0x00, 0x00, 0x10},
+#else
 	{0xa1, 0x6e, 0x07, 0x25, 0x00, 0x00, 0x00, 0x10},
-	{0xa1, 0x6e, 0x15, 0x04, 0x00, 0x00, 0x00, 0x10},
-	{0xc1, 0x6e, 0x16, 0x52, 0x40, 0x48, 0x00, 0x10},
-/*after start*/
-	{0xa1, 0x6e, 0x15, 0x0f, 0x00, 0x00, 0x00, 0x10},
-	{DELAY, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* delay 5ms */
-	{0xa1, 0x6e, 0x1a, 0x05, 0x00, 0x00, 0x00, 0x10},
-	{DELAY, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* delay 5ms */
-	{0xa1, 0x6e, 0x1b, 0x53, 0x00, 0x00, 0x00, 0x10},
+#endif
 	{}
 };
 
@@ -1277,7 +1349,7 @@
 			/* global gain ? : 07 - change with 0x15 at the end */
 	{0xa1, 0x21, 0x10, 0x3f, 0x00, 0x00, 0x00, 0x10}, /* ???? : 063f */
 	{0xa1, 0x21, 0x04, 0x06, 0x00, 0x00, 0x00, 0x10},
-	{0xb1, 0x21, 0x2d, 0x00, 0x02, 0x00, 0x00, 0x10},
+	{0xb1, 0x21, 0x2d, 0x63, 0x03, 0x00, 0x00, 0x10},
 			/* exposure ? : 0200 - change with 0x1e at the end */
 	{}
 };
@@ -1395,7 +1467,7 @@
 		return;
 #ifdef GSPCA_DEBUG
 	if (len > USB_BUF_SZ) {
-		err("reg_r: buffer overflow");
+		pr_err("reg_r: buffer overflow\n");
 		return;
 	}
 #endif
@@ -1406,9 +1478,8 @@
 			value, 0,
 			gspca_dev->usb_buf, len,
 			500);
-	PDEBUG(D_USBI, "reg_r [%02x] -> %02x", value, gspca_dev->usb_buf[0]);
 	if (ret < 0) {
-		err("reg_r err %d", ret);
+		pr_err("reg_r err %d\n", ret);
 		gspca_dev->usb_err = ret;
 	}
 }
@@ -1421,7 +1492,6 @@
 
 	if (gspca_dev->usb_err < 0)
 		return;
-	PDEBUG(D_USBO, "reg_w1 [%04x] = %02x", value, data);
 	gspca_dev->usb_buf[0] = data;
 	ret = usb_control_msg(gspca_dev->dev,
 			usb_sndctrlpipe(gspca_dev->dev, 0),
@@ -1432,7 +1502,7 @@
 			gspca_dev->usb_buf, 1,
 			500);
 	if (ret < 0) {
-		err("reg_w1 err %d", ret);
+		pr_err("reg_w1 err %d\n", ret);
 		gspca_dev->usb_err = ret;
 	}
 }
@@ -1445,11 +1515,9 @@
 
 	if (gspca_dev->usb_err < 0)
 		return;
-	PDEBUG(D_USBO, "reg_w [%04x] = %02x %02x ..",
-		value, buffer[0], buffer[1]);
 #ifdef GSPCA_DEBUG
 	if (len > USB_BUF_SZ) {
-		err("reg_w: buffer overflow");
+		pr_err("reg_w: buffer overflow\n");
 		return;
 	}
 #endif
@@ -1462,7 +1530,7 @@
 			gspca_dev->usb_buf, len,
 			500);
 	if (ret < 0) {
-		err("reg_w err %d", ret);
+		pr_err("reg_w err %d\n", ret);
 		gspca_dev->usb_err = ret;
 	}
 }
@@ -1475,7 +1543,6 @@
 
 	if (gspca_dev->usb_err < 0)
 		return;
-	PDEBUG(D_USBO, "i2c_w1 [%02x] = %02x", reg, val);
 	switch (sd->sensor) {
 	case SENSOR_ADCM1700:
 	case SENSOR_OM6802:
@@ -1502,7 +1569,7 @@
 			gspca_dev->usb_buf, 8,
 			500);
 	if (ret < 0) {
-		err("i2c_w1 err %d", ret);
+		pr_err("i2c_w1 err %d\n", ret);
 		gspca_dev->usb_err = ret;
 	}
 }
@@ -1515,8 +1582,6 @@
 
 	if (gspca_dev->usb_err < 0)
 		return;
-	PDEBUG(D_USBO, "i2c_w8 [%02x] = %02x ..",
-		buffer[2], buffer[3]);
 	memcpy(gspca_dev->usb_buf, buffer, 8);
 	ret = usb_control_msg(gspca_dev->dev,
 			usb_sndctrlpipe(gspca_dev->dev, 0),
@@ -1527,7 +1592,7 @@
 			500);
 	msleep(2);
 	if (ret < 0) {
-		err("i2c_w8 err %d", ret);
+		pr_err("i2c_w8 err %d\n", ret);
 		gspca_dev->usb_err = ret;
 	}
 }
@@ -1591,7 +1656,7 @@
 		PDEBUG(D_PROBE, "Sensor HV7131R found");
 		return;
 	}
-	warn("Erroneous HV7131R ID 0x%02x 0x%02x 0x%02x",
+	pr_warn("Erroneous HV7131R ID 0x%02x 0x%02x 0x%02x\n",
 		gspca_dev->usb_buf[0], gspca_dev->usb_buf[1],
 		gspca_dev->usb_buf[2]);
 }
@@ -1710,7 +1775,7 @@
 		sd->sensor = SENSOR_PO1030;
 		return;
 	}
-	err("Unknown sensor %04x", val);
+	pr_err("Unknown sensor %04x\n", val);
 }
 
 /* 0c45:6142 sensor may be po2030n, gc0305 or gc0307 */
@@ -1748,7 +1813,7 @@
 		PDEBUG(D_PROBE, "Sensor po2030n");
 /*		sd->sensor = SENSOR_PO2030N; */
 	} else {
-		err("Unknown sensor ID %04x", val);
+		pr_err("Unknown sensor ID %04x\n", val);
 	}
 }
 
@@ -1777,10 +1842,6 @@
 	sd->ag_cnt = -1;
 	sd->quality = QUALITY_DEF;
 
-	/* if USB 1.1, let some bandwidth for the audio device */
-	if (gspca_dev->audio && gspca_dev->dev->speed < USB_SPEED_HIGH)
-		gspca_dev->nbalt--;
-
 	INIT_WORK(&sd->work, qual_upd);
 
 	return 0;
@@ -1860,7 +1921,7 @@
 	return gspca_dev->usb_err;
 }
 
-static u32 setexposure(struct gspca_dev *gspca_dev,
+static u32 expo_adjust(struct gspca_dev *gspca_dev,
 			u32 expo)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
@@ -1984,30 +2045,29 @@
 			expo = 0x002dc6c0;
 		else if (expo < 0x02a0)
 			expo = 0x02a0;
-		sd->exposure = setexposure(gspca_dev, expo);
+		sd->exposure = expo_adjust(gspca_dev, expo);
 		break;
 	case SENSOR_MI0360:
 	case SENSOR_MO4000:
 		expo = brightness << 4;
-		sd->exposure = setexposure(gspca_dev, expo);
+		sd->exposure = expo_adjust(gspca_dev, expo);
 		break;
 	case SENSOR_MI0360B:
 		expo = brightness << 2;
-		sd->exposure = setexposure(gspca_dev, expo);
+		sd->exposure = expo_adjust(gspca_dev, expo);
 		break;
 	case SENSOR_GC0307:
 		expo = brightness;
-		sd->exposure = setexposure(gspca_dev, expo);
+		sd->exposure = expo_adjust(gspca_dev, expo);
 		return;			/* don't set the Y offset */
 	case SENSOR_MT9V111:
 		expo = brightness << 2;
-		sd->exposure = setexposure(gspca_dev, expo);
+		sd->exposure = expo_adjust(gspca_dev, expo);
 		return;			/* don't set the Y offset */
 	case SENSOR_OM6802:
 		expo = brightness << 2;
-		sd->exposure = setexposure(gspca_dev, expo);
-		k2 = brightness >> 3;
-		break;
+		sd->exposure = expo_adjust(gspca_dev, expo);
+		return;			/* Y offset already set */
 	}
 
 	reg_w1(gspca_dev, 0x96, k2);	/* color matrix Y offset */
@@ -2019,13 +2079,13 @@
 	u8 k2;
 	u8 contrast[6];
 
-	k2 = sd->ctrls[CONTRAST].val * 0x30 / (CONTRAST_MAX + 1)
-				+ 0x10;		/* 10..40 */
+	k2 = sd->ctrls[CONTRAST].val * 37 / (CONTRAST_MAX + 1)
+				+ 37;		/* 37..73 */
 	contrast[0] = (k2 + 1) / 2;		/* red */
 	contrast[1] = 0;
 	contrast[2] = k2;			/* green */
 	contrast[3] = 0;
-	contrast[4] = (k2 + 1) / 5;		/* blue */
+	contrast[4] = k2 / 5;			/* blue */
 	contrast[5] = 0;
 	reg_w(gspca_dev, 0x84, contrast, sizeof contrast);
 }
@@ -2062,6 +2122,16 @@
 {
 	struct sd *sd = (struct sd *) gspca_dev;
 
+	if (sd->sensor == SENSOR_PO2030N) {
+		u8 rg1b[] =		/* red  green1 blue (no g2) */
+			{0xc1, 0x6e, 0x16, 0x00, 0x40, 0x00, 0x00, 0x10};
+
+		/* 0x40 = normal value = gain x 1 */
+		rg1b[3] = sd->ctrls[RED].val * 2;
+		rg1b[5] = sd->ctrls[BLUE].val * 2;
+		i2c_w8(gspca_dev, rg1b);
+		return;
+	}
 	reg_w1(gspca_dev, 0x05, sd->ctrls[RED].val);
 /*	reg_w1(gspca_dev, 0x07, 32); */
 	reg_w1(gspca_dev, 0x06, sd->ctrls[BLUE].val);
@@ -2105,6 +2175,23 @@
 	reg_w(gspca_dev, 0x20, gamma, sizeof gamma);
 }
 
+static void setexposure(struct gspca_dev *gspca_dev)
+{
+	struct sd *sd = (struct sd *) gspca_dev;
+
+	if (sd->sensor == SENSOR_PO2030N) {
+		u8 rexpo[] =		/* 1a: expo H, 1b: expo M */
+			{0xa1, 0x6e, 0x1a, 0x00, 0x40, 0x00, 0x00, 0x10};
+
+		rexpo[3] = sd->ctrls[EXPOSURE].val >> 8;
+		i2c_w8(gspca_dev, rexpo);
+		msleep(6);
+		rexpo[2] = 0x1b;
+		rexpo[3] = sd->ctrls[EXPOSURE].val;
+		i2c_w8(gspca_dev, rexpo);
+	}
+}
+
 static void setautogain(struct gspca_dev *gspca_dev)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
@@ -2132,6 +2219,19 @@
 		sd->ag_cnt = -1;
 }
 
+static void setgain(struct gspca_dev *gspca_dev)
+{
+	struct sd *sd = (struct sd *) gspca_dev;
+
+	if (sd->sensor == SENSOR_PO2030N) {
+		u8 rgain[] =		/* 15: gain */
+			{0xa1, 0x6e, 0x15, 0x00, 0x40, 0x00, 0x00, 0x15};
+
+		rgain[3] = sd->ctrls[GAIN].val;
+		i2c_w8(gspca_dev, rgain);
+	}
+}
+
 static void sethvflip(struct gspca_dev *gspca_dev)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
@@ -2386,7 +2486,7 @@
 		reg_w1(gspca_dev, 0x01, 0x22);
 		msleep(100);
 		reg01 = SCL_SEL_OD | S_PDN_INV;
-		reg17 &= MCK_SIZE_MASK;
+		reg17 &= ~MCK_SIZE_MASK;
 		reg17 |= 0x04;		/* clock / 4 */
 		break;
 	}
@@ -2396,7 +2496,7 @@
 	reg_w1(gspca_dev, 0x17, reg17);
 	reg01 &= ~S_PWR_DN;		/* sensor power on */
 	reg_w1(gspca_dev, 0x01, reg01);
-	reg01 &= ~SYS_SEL_48M;
+	reg01 &= ~SCL_SEL_OD;		/* remove open-drain mode */
 	reg_w1(gspca_dev, 0x01, reg01);
 
 	switch (sd->sensor) {
@@ -2507,9 +2607,7 @@
 		break;
 	case SENSOR_HV7131R:
 	case SENSOR_MI0360:
-		if (mode)
-			reg01 |= SYS_SEL_48M;	/* 320x240: clk 48Mhz */
-		else
+		if (!mode)
 			reg01 &= ~SYS_SEL_48M;	/* 640x480: clk 24Mhz */
 		reg17 &= ~MCK_SIZE_MASK;
 		reg17 |= 0x01;			/* clock / 1 */
@@ -2529,9 +2627,14 @@
 		break;
 	case SENSOR_OM6802:
 		init = om6802_sensor_param1;
+//fixme: this fixes 320x240 too dark, but fps becomes slower
 		if (!mode) {			/* if 640x480 */
 			reg17 &= ~MCK_SIZE_MASK;
 			reg17 |= 0x04;		/* clock / 4 */
+		} else {
+			reg01 &= ~SYS_SEL_48M;	/* clk 24Mz */
+			reg17 &= ~MCK_SIZE_MASK;
+			reg17 |= 0x02;		/* clock / 2 */
 		}
 		break;
 	case SENSOR_OV7630:
@@ -2614,6 +2717,10 @@
 	setcontrast(gspca_dev);
 	setcolors(gspca_dev);
 	setautogain(gspca_dev);
+	if (!(gspca_dev->ctrl_inac & ((1 << EXPOSURE) | (1 << GAIN)))) {
+		setexposure(gspca_dev);
+		setgain(gspca_dev);
+	}
 	setfreq(gspca_dev);
 
 	sd->pktsz = sd->npkt = 0;
@@ -2710,6 +2817,12 @@
 	}
 }
 
+/* !! coarse_grained_expo_autogain is not used !! */
+#define exp_too_low_cnt bridge
+#define exp_too_high_cnt sensor
+
+#include "autogain_functions.h"
+
 static void do_autogain(struct gspca_dev *gspca_dev)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
@@ -2727,6 +2840,13 @@
 
 	delta = atomic_read(&sd->avg_lum);
 	PDEBUG(D_FRAM, "mean lum %d", delta);
+
+	if (sd->sensor == SENSOR_PO2030N) {
+		auto_gain_n_exposure(gspca_dev, delta, luma_mean, luma_delta,
+					15, 1024);
+		return;
+	}
+
 	if (delta < luma_mean - luma_delta ||
 	    delta > luma_mean + luma_delta) {
 		switch (sd->sensor) {
@@ -2735,7 +2855,7 @@
 			expotimes += (luma_mean - delta) >> 6;
 			if (expotimes < 0)
 				expotimes = 0;
-			sd->exposure = setexposure(gspca_dev,
+			sd->exposure = expo_adjust(gspca_dev,
 						   (unsigned int) expotimes);
 			break;
 		case SENSOR_HV7131R:
@@ -2743,7 +2863,7 @@
 			expotimes += (luma_mean - delta) >> 4;
 			if (expotimes < 0)
 				expotimes = 0;
-			sd->exposure = setexposure(gspca_dev,
+			sd->exposure = expo_adjust(gspca_dev,
 					(unsigned int) (expotimes << 8));
 			break;
 		case SENSOR_OM6802:
@@ -2752,7 +2872,7 @@
 			expotimes += (luma_mean - delta) >> 2;
 			if (expotimes < 0)
 				expotimes = 0;
-			sd->exposure = setexposure(gspca_dev,
+			sd->exposure = expo_adjust(gspca_dev,
 						   (unsigned int) expotimes);
 			setredblue(gspca_dev);
 			break;
@@ -2764,7 +2884,7 @@
 			expotimes += (luma_mean - delta) >> 6;
 			if (expotimes < 0)
 				expotimes = 0;
-			sd->exposure = setexposure(gspca_dev,
+			sd->exposure = expo_adjust(gspca_dev,
 						   (unsigned int) expotimes);
 			setredblue(gspca_dev);
 			break;
@@ -2939,16 +3059,18 @@
 	}
 }
 
-static int sd_get_jcomp(struct gspca_dev *gspca_dev,
-			struct v4l2_jpegcompression *jcomp)
+static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
 
-	memset(jcomp, 0, sizeof *jcomp);
-	jcomp->quality = sd->quality;
-	jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT
-			| V4L2_JPEG_MARKER_DQT;
-	return 0;
+	sd->ctrls[AUTOGAIN].val = val;
+	if (val)
+		gspca_dev->ctrl_inac |= (1 << EXPOSURE) | (1 << GAIN);
+	else
+		gspca_dev->ctrl_inac &= ~(1 << EXPOSURE) & ~(1 << GAIN);
+	if (gspca_dev->streaming)
+		setautogain(gspca_dev);
+	return gspca_dev->usb_err;
 }
 
 static int sd_querymenu(struct gspca_dev *gspca_dev,
@@ -3003,7 +3125,6 @@
 	.stop0 = sd_stop0,
 	.pkt_scan = sd_pkt_scan,
 	.dq_callback = do_autogain,
-	.get_jcomp = sd_get_jcomp,
 	.querymenu = sd_querymenu,
 #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
 	.int_pkt_scan = sd_int_pkt_scan,
@@ -3101,15 +3222,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/spca1528.c linux-3.0.82x/drivers/media/video/gspca/spca1528.c
--- linux-3.0.82/drivers/media/video/gspca/spca1528.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/spca1528.c	2017-09-23 03:42:49.494676665 +0800
@@ -1,7 +1,7 @@
 /*
  * spca1528 subdriver
  *
- * Copyright (C) 2010 Jean-Francois Moine (http://moinejf.free.fr)
+ * Copyright (C) 2010-2011 Jean-Francois Moine (http://moinejf.free.fr)
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -18,6 +18,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "spca1528"
 
 #include "gspca.h"
@@ -171,7 +173,7 @@
 	PDEBUG(D_USBI, "GET %02x 0000 %04x %02x", req, index,
 			 gspca_dev->usb_buf[0]);
 	if (ret < 0) {
-		err("reg_r err %d", ret);
+		pr_err("reg_r err %d\n", ret);
 		gspca_dev->usb_err = ret;
 	}
 }
@@ -193,7 +195,7 @@
 			value, index,
 			NULL, 0, 500);
 	if (ret < 0) {
-		err("reg_w err %d", ret);
+		pr_err("reg_w err %d\n", ret);
 		gspca_dev->usb_err = ret;
 	}
 }
@@ -217,21 +219,23 @@
 			value, index,
 			gspca_dev->usb_buf, 1, 500);
 	if (ret < 0) {
-		err("reg_w err %d", ret);
+		pr_err("reg_w err %d\n", ret);
 		gspca_dev->usb_err = ret;
 	}
 }
 
 static void wait_status_0(struct gspca_dev *gspca_dev)
 {
-	int i;
+	int i, w;
 
-	i = 20;
+	i = 16;
+	w = 0;
 	do {
 		reg_r(gspca_dev, 0x21, 0x0000, 1);
 		if (gspca_dev->usb_buf[0] == 0)
 			return;
-		msleep(30);
+		w += 15;
+		msleep(w);
 	} while (--i > 0);
 	PDEBUG(D_ERR, "wait_status_0 timeout");
 	gspca_dev->usb_err = -ETIME;
@@ -307,8 +311,6 @@
 	sd->color = COLOR_DEF;
 	sd->sharpness = SHARPNESS_DEF;
 
-	gspca_dev->nbalt = 4;		/* use alternate setting 3 */
-
 	return 0;
 }
 
@@ -347,8 +349,12 @@
 	mode = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv;
 	reg_wb(gspca_dev, 0x25, 0x0000, 0x0004, mode);
 	reg_r(gspca_dev, 0x25, 0x0004, 1);
-	reg_wb(gspca_dev, 0x27, 0x0000, 0x0000, 0x06);
+	reg_wb(gspca_dev, 0x27, 0x0000, 0x0000, 0x06);	/* 420 */
 	reg_r(gspca_dev, 0x27, 0x0000, 1);
+
+/* not useful..
+	gspca_dev->alt = 4;		* use alternate setting 3 */
+
 	return gspca_dev->usb_err;
 }
 
@@ -361,8 +367,8 @@
 	jpeg_define(sd->jpeg_hdr, gspca_dev->height, gspca_dev->width,
 			0x22);		/* JPEG 411 */
 
-	/* the JPEG quality seems to be 82% */
-	jpeg_set_qual(sd->jpeg_hdr, 82);
+	/* the JPEG quality shall be 85% */
+	jpeg_set_qual(sd->jpeg_hdr, 85);
 
 	/* set the controls */
 	setbrightness(gspca_dev);
@@ -377,7 +383,7 @@
 
 	/* start the capture */
 	wait_status_0(gspca_dev);
-	reg_w(gspca_dev, 0x31, 0x0000, 0x0004);
+	reg_w(gspca_dev, 0x31, 0x0000, 0x0004);	/* start request */
 	wait_status_1(gspca_dev);
 	wait_status_0(gspca_dev);
 	msleep(200);
@@ -390,7 +396,7 @@
 {
 	/* stop the capture */
 	wait_status_0(gspca_dev);
-	reg_w(gspca_dev, 0x31, 0x0000, 0x0000);
+	reg_w(gspca_dev, 0x31, 0x0000, 0x0000);	/* stop request */
 	wait_status_1(gspca_dev);
 	wait_status_0(gspca_dev);
 }
@@ -584,15 +590,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/spca500.c linux-3.0.82x/drivers/media/video/gspca/spca500.c
--- linux-3.0.82/drivers/media/video/gspca/spca500.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/spca500.c	2017-09-23 03:42:49.494676665 +0800
@@ -19,6 +19,8 @@
  *
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "spca500"
 
 #include "gspca.h"
@@ -396,7 +398,7 @@
 			USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 			value, index, NULL, 0, 500);
 	if (ret < 0)
-		err("reg write: error %d", ret);
+		pr_err("reg write: error %d\n", ret);
 	return ret;
 }
 
@@ -418,7 +420,7 @@
 			gspca_dev->usb_buf, length,
 			500);		/* timeout */
 	if (ret < 0) {
-		err("reg_r_12 err %d", ret);
+		pr_err("reg_r_12 err %d\n", ret);
 		return ret;
 	}
 	return (gspca_dev->usb_buf[1] << 8) + gspca_dev->usb_buf[0];
@@ -1090,15 +1092,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/spca501.c linux-3.0.82x/drivers/media/video/gspca/spca501.c
--- linux-3.0.82/drivers/media/video/gspca/spca501.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/spca501.c	2017-09-23 03:42:49.494676665 +0800
@@ -19,6 +19,8 @@
  *
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "spca501"
 
 #include "gspca.h"
@@ -185,12 +187,12 @@
 /* registers for color correction and YUV transformation */
 #define SPCA501_A11 0x08
 #define SPCA501_A12 0x09
-#define SPCA501_A13 0x0A
-#define SPCA501_A21 0x0B
-#define SPCA501_A22 0x0C
-#define SPCA501_A23 0x0D
-#define SPCA501_A31 0x0E
-#define SPCA501_A32 0x0F
+#define SPCA501_A13 0x0a
+#define SPCA501_A21 0x0b
+#define SPCA501_A22 0x0c
+#define SPCA501_A23 0x0d
+#define SPCA501_A31 0x0e
+#define SPCA501_A32 0x0f
 #define SPCA501_A33 0x10
 
 /* Data for video camera initialization before capturing */
@@ -205,35 +207,35 @@
 #ifdef CCDSP_SET
 	{0x1, 0x38, 0x01},	/* CCDSP options */
 	{0x1, 0x05, 0x02}, /* CCDSP Optical black level for user settings */
-	{0x1, 0xC0, 0x03},	/* CCDSP Optical black settings */
+	{0x1, 0xc0, 0x03},	/* CCDSP Optical black settings */
 
 	{0x1, 0x67, 0x07},
 	{0x1, 0x63, 0x3f},	/* CCDSP CCD gamma enable */
 	{0x1, 0x03, 0x56},	/* Add gamma correction */
 
-	{0x1, 0xFF, 0x15},	/* CCDSP High luminance for white balance */
+	{0x1, 0xff, 0x15},	/* CCDSP High luminance for white balance */
 	{0x1, 0x01, 0x16},	/* CCDSP Low luminance for white balance */
 
 /* Color correction and RGB-to-YUV transformation coefficients changing */
 #ifdef ALTER_GAMA
 	{0x0, 0x00, 0x08},	/* A11 */
 	{0x0, 0x00, 0x09},	/* A12 */
-	{0x0, 0x90, 0x0A},	/* A13 */
-	{0x0, 0x12, 0x0B},	/* A21 */
-	{0x0, 0x00, 0x0C},	/* A22 */
-	{0x0, 0x00, 0x0D},	/* A23 */
-	{0x0, 0x00, 0x0E},	/* A31 */
-	{0x0, 0x02, 0x0F},	/* A32 */
+	{0x0, 0x90, 0x0a},	/* A13 */
+	{0x0, 0x12, 0x0b},	/* A21 */
+	{0x0, 0x00, 0x0c},	/* A22 */
+	{0x0, 0x00, 0x0d},	/* A23 */
+	{0x0, 0x00, 0x0e},	/* A31 */
+	{0x0, 0x02, 0x0f},	/* A32 */
 	{0x0, 0x00, 0x10},	/* A33 */
 #else
 	{0x1, 0x2a, 0x08},	/* A11 0x31 */
 	{0x1, 0xf8, 0x09},	/* A12 f8 */
-	{0x1, 0xf8, 0x0A},	/* A13 f8 */
-	{0x1, 0xf8, 0x0B},	/* A21 f8 */
-	{0x1, 0x14, 0x0C},	/* A22 0x14 */
-	{0x1, 0xf8, 0x0D},	/* A23 f8 */
-	{0x1, 0xf8, 0x0E},	/* A31 f8 */
-	{0x1, 0xf8, 0x0F},	/* A32 f8 */
+	{0x1, 0xf8, 0x0a},	/* A13 f8 */
+	{0x1, 0xf8, 0x0b},	/* A21 f8 */
+	{0x1, 0x14, 0x0c},	/* A22 0x14 */
+	{0x1, 0xf8, 0x0d},	/* A23 f8 */
+	{0x1, 0xf8, 0x0e},	/* A31 f8 */
+	{0x1, 0xf8, 0x0f},	/* A32 f8 */
 	{0x1, 0x20, 0x10},	/* A33 0x20 */
 #endif
 	{0x1, 0x00, 0x11},	/* R offset */
@@ -245,8 +247,8 @@
 
 #ifdef TG_SET
 	/* Time generator manipulations */
-	{0x0, 0xfc, 0x0},	/* Set up high bits of shutter speed */
-	{0x0, 0x01, 0x1},	/* Set up low bits of shutter speed */
+	{0x0, 0xfc, 0x00},	/* Set up high bits of shutter speed */
+	{0x0, 0x01, 0x01},	/* Set up low bits of shutter speed */
 
 	{0x0, 0xe4, 0x04},	/* DCLK*2 clock phase adjustment */
 	{0x0, 0x08, 0x05},	/* ADCK phase adjustment, inv. ext. VB */
@@ -303,22 +305,22 @@
 static const __u16 spca501_init_data[][3] = {
 	/* Set all the values to powerup defaults */
 	/* bmRequest,value,index */
-	{0x0, 0xAA, 0x00},
+	{0x0, 0xaa, 0x00},
 	{0x0, 0x02, 0x01},
 	{0x0, 0x01, 0x02},
 	{0x0, 0x02, 0x03},
-	{0x0, 0xCE, 0x04},
+	{0x0, 0xce, 0x04},
 	{0x0, 0x00, 0x05},
 	{0x0, 0x00, 0x06},
 	{0x0, 0x00, 0x07},
 	{0x0, 0x00, 0x08},
 	{0x0, 0x00, 0x09},
-	{0x0, 0x90, 0x0A},
-	{0x0, 0x12, 0x0B},
-	{0x0, 0x00, 0x0C},
-	{0x0, 0x00, 0x0D},
-	{0x0, 0x00, 0x0E},
-	{0x0, 0x02, 0x0F},
+	{0x0, 0x90, 0x0a},
+	{0x0, 0x12, 0x0b},
+	{0x0, 0x00, 0x0c},
+	{0x0, 0x00, 0x0d},
+	{0x0, 0x00, 0x0e},
+	{0x0, 0x02, 0x0f},
 	{0x0, 0x00, 0x10},
 	{0x0, 0x00, 0x11},
 	{0x0, 0x00, 0x12},
@@ -329,12 +331,12 @@
 	{0x0, 0x00, 0x17},
 	{0x0, 0x00, 0x18},
 	{0x0, 0x00, 0x19},
-	{0x0, 0x00, 0x1A},
-	{0x0, 0x00, 0x1B},
-	{0x0, 0x00, 0x1C},
-	{0x0, 0x00, 0x1D},
-	{0x0, 0x00, 0x1E},
-	{0x0, 0x00, 0x1F},
+	{0x0, 0x00, 0x1a},
+	{0x0, 0x00, 0x1b},
+	{0x0, 0x00, 0x1c},
+	{0x0, 0x00, 0x1d},
+	{0x0, 0x00, 0x1e},
+	{0x0, 0x00, 0x1f},
 	{0x0, 0x00, 0x20},
 	{0x0, 0x00, 0x21},
 	{0x0, 0x00, 0x22},
@@ -345,12 +347,12 @@
 	{0x0, 0x00, 0x27},
 	{0x0, 0x00, 0x28},
 	{0x0, 0x00, 0x29},
-	{0x0, 0x00, 0x2A},
-	{0x0, 0x00, 0x2B},
-	{0x0, 0x00, 0x2C},
-	{0x0, 0x00, 0x2D},
-	{0x0, 0x00, 0x2E},
-	{0x0, 0x00, 0x2F},
+	{0x0, 0x00, 0x2a},
+	{0x0, 0x00, 0x2b},
+	{0x0, 0x00, 0x2c},
+	{0x0, 0x00, 0x2d},
+	{0x0, 0x00, 0x2e},
+	{0x0, 0x00, 0x2f},
 	{0x0, 0x00, 0x30},
 	{0x0, 0x00, 0x31},
 	{0x0, 0x00, 0x32},
@@ -361,12 +363,12 @@
 	{0x0, 0x00, 0x37},
 	{0x0, 0x00, 0x38},
 	{0x0, 0x00, 0x39},
-	{0x0, 0x00, 0x3A},
-	{0x0, 0x00, 0x3B},
-	{0x0, 0x00, 0x3C},
-	{0x0, 0x00, 0x3D},
-	{0x0, 0x00, 0x3E},
-	{0x0, 0x00, 0x3F},
+	{0x0, 0x00, 0x3a},
+	{0x0, 0x00, 0x3b},
+	{0x0, 0x00, 0x3c},
+	{0x0, 0x00, 0x3d},
+	{0x0, 0x00, 0x3e},
+	{0x0, 0x00, 0x3f},
 	{0x0, 0x00, 0x40},
 	{0x0, 0x00, 0x41},
 	{0x0, 0x00, 0x42},
@@ -377,12 +379,12 @@
 	{0x0, 0x00, 0x47},
 	{0x0, 0x00, 0x48},
 	{0x0, 0x00, 0x49},
-	{0x0, 0x00, 0x4A},
-	{0x0, 0x00, 0x4B},
-	{0x0, 0x00, 0x4C},
-	{0x0, 0x00, 0x4D},
-	{0x0, 0x00, 0x4E},
-	{0x0, 0x00, 0x4F},
+	{0x0, 0x00, 0x4a},
+	{0x0, 0x00, 0x4b},
+	{0x0, 0x00, 0x4c},
+	{0x0, 0x00, 0x4d},
+	{0x0, 0x00, 0x4e},
+	{0x0, 0x00, 0x4f},
 	{0x0, 0x00, 0x50},
 	{0x0, 0x00, 0x51},
 	{0x0, 0x00, 0x52},
@@ -393,12 +395,12 @@
 	{0x0, 0x00, 0x57},
 	{0x0, 0x00, 0x58},
 	{0x0, 0x00, 0x59},
-	{0x0, 0x00, 0x5A},
-	{0x0, 0x00, 0x5B},
-	{0x0, 0x00, 0x5C},
-	{0x0, 0x00, 0x5D},
-	{0x0, 0x00, 0x5E},
-	{0x0, 0x00, 0x5F},
+	{0x0, 0x00, 0x5a},
+	{0x0, 0x00, 0x5b},
+	{0x0, 0x00, 0x5c},
+	{0x0, 0x00, 0x5d},
+	{0x0, 0x00, 0x5e},
+	{0x0, 0x00, 0x5f},
 	{0x0, 0x00, 0x60},
 	{0x0, 0x00, 0x61},
 	{0x0, 0x00, 0x62},
@@ -409,12 +411,12 @@
 	{0x0, 0x00, 0x67},
 	{0x0, 0x00, 0x68},
 	{0x0, 0x00, 0x69},
-	{0x0, 0x00, 0x6A},
-	{0x0, 0x00, 0x6B},
-	{0x0, 0x00, 0x6C},
-	{0x0, 0x00, 0x6D},
-	{0x0, 0x00, 0x6E},
-	{0x0, 0x00, 0x6F},
+	{0x0, 0x00, 0x6a},
+	{0x0, 0x00, 0x6b},
+	{0x0, 0x00, 0x6c},
+	{0x0, 0x00, 0x6d},
+	{0x0, 0x00, 0x6e},
+	{0x0, 0x00, 0x6f},
 	{0x0, 0x00, 0x70},
 	{0x0, 0x00, 0x71},
 	{0x0, 0x00, 0x72},
@@ -425,12 +427,12 @@
 	{0x0, 0x00, 0x77},
 	{0x0, 0x00, 0x78},
 	{0x0, 0x00, 0x79},
-	{0x0, 0x00, 0x7A},
-	{0x0, 0x00, 0x7B},
-	{0x0, 0x00, 0x7C},
-	{0x0, 0x00, 0x7D},
-	{0x0, 0x00, 0x7E},
-	{0x0, 0x00, 0x7F},
+	{0x0, 0x00, 0x7a},
+	{0x0, 0x00, 0x7b},
+	{0x0, 0x00, 0x7c},
+	{0x0, 0x00, 0x7d},
+	{0x0, 0x00, 0x7e},
+	{0x0, 0x00, 0x7f},
 	{0x0, 0x00, 0x80},
 	{0x0, 0x00, 0x81},
 	{0x0, 0x00, 0x82},
@@ -441,12 +443,12 @@
 	{0x0, 0x00, 0x87},
 	{0x0, 0x00, 0x88},
 	{0x0, 0x00, 0x89},
-	{0x0, 0x00, 0x8A},
-	{0x0, 0x00, 0x8B},
-	{0x0, 0x00, 0x8C},
-	{0x0, 0x00, 0x8D},
-	{0x0, 0x00, 0x8E},
-	{0x0, 0x00, 0x8F},
+	{0x0, 0x00, 0x8a},
+	{0x0, 0x00, 0x8b},
+	{0x0, 0x00, 0x8c},
+	{0x0, 0x00, 0x8d},
+	{0x0, 0x00, 0x8e},
+	{0x0, 0x00, 0x8f},
 	{0x0, 0x00, 0x90},
 	{0x0, 0x00, 0x91},
 	{0x0, 0x00, 0x92},
@@ -457,92 +459,92 @@
 	{0x0, 0x00, 0x97},
 	{0x0, 0x00, 0x98},
 	{0x0, 0x00, 0x99},
-	{0x0, 0x00, 0x9A},
-	{0x0, 0x00, 0x9B},
-	{0x0, 0x00, 0x9C},
-	{0x0, 0x00, 0x9D},
-	{0x0, 0x00, 0x9E},
-	{0x0, 0x00, 0x9F},
-	{0x0, 0x00, 0xA0},
-	{0x0, 0x00, 0xA1},
-	{0x0, 0x00, 0xA2},
-	{0x0, 0x00, 0xA3},
-	{0x0, 0x00, 0xA4},
-	{0x0, 0x00, 0xA5},
-	{0x0, 0x00, 0xA6},
-	{0x0, 0x00, 0xA7},
-	{0x0, 0x00, 0xA8},
-	{0x0, 0x00, 0xA9},
-	{0x0, 0x00, 0xAA},
-	{0x0, 0x00, 0xAB},
-	{0x0, 0x00, 0xAC},
-	{0x0, 0x00, 0xAD},
-	{0x0, 0x00, 0xAE},
-	{0x0, 0x00, 0xAF},
-	{0x0, 0x00, 0xB0},
-	{0x0, 0x00, 0xB1},
-	{0x0, 0x00, 0xB2},
-	{0x0, 0x00, 0xB3},
-	{0x0, 0x00, 0xB4},
-	{0x0, 0x00, 0xB5},
-	{0x0, 0x00, 0xB6},
-	{0x0, 0x00, 0xB7},
-	{0x0, 0x00, 0xB8},
-	{0x0, 0x00, 0xB9},
-	{0x0, 0x00, 0xBA},
-	{0x0, 0x00, 0xBB},
-	{0x0, 0x00, 0xBC},
-	{0x0, 0x00, 0xBD},
-	{0x0, 0x00, 0xBE},
-	{0x0, 0x00, 0xBF},
-	{0x0, 0x00, 0xC0},
-	{0x0, 0x00, 0xC1},
-	{0x0, 0x00, 0xC2},
-	{0x0, 0x00, 0xC3},
-	{0x0, 0x00, 0xC4},
-	{0x0, 0x00, 0xC5},
-	{0x0, 0x00, 0xC6},
-	{0x0, 0x00, 0xC7},
-	{0x0, 0x00, 0xC8},
-	{0x0, 0x00, 0xC9},
-	{0x0, 0x00, 0xCA},
-	{0x0, 0x00, 0xCB},
-	{0x0, 0x00, 0xCC},
-	{0x1, 0xF4, 0x00},
+	{0x0, 0x00, 0x9a},
+	{0x0, 0x00, 0x9b},
+	{0x0, 0x00, 0x9c},
+	{0x0, 0x00, 0x9d},
+	{0x0, 0x00, 0x9e},
+	{0x0, 0x00, 0x9f},
+	{0x0, 0x00, 0xa0},
+	{0x0, 0x00, 0xa1},
+	{0x0, 0x00, 0xa2},
+	{0x0, 0x00, 0xa3},
+	{0x0, 0x00, 0xa4},
+	{0x0, 0x00, 0xa5},
+	{0x0, 0x00, 0xa6},
+	{0x0, 0x00, 0xa7},
+	{0x0, 0x00, 0xa8},
+	{0x0, 0x00, 0xa9},
+	{0x0, 0x00, 0xaa},
+	{0x0, 0x00, 0xab},
+	{0x0, 0x00, 0xac},
+	{0x0, 0x00, 0xad},
+	{0x0, 0x00, 0xae},
+	{0x0, 0x00, 0xaf},
+	{0x0, 0x00, 0xb0},
+	{0x0, 0x00, 0xb1},
+	{0x0, 0x00, 0xb2},
+	{0x0, 0x00, 0xb3},
+	{0x0, 0x00, 0xb4},
+	{0x0, 0x00, 0xb5},
+	{0x0, 0x00, 0xb6},
+	{0x0, 0x00, 0xb7},
+	{0x0, 0x00, 0xb8},
+	{0x0, 0x00, 0xb9},
+	{0x0, 0x00, 0xba},
+	{0x0, 0x00, 0xbb},
+	{0x0, 0x00, 0xbc},
+	{0x0, 0x00, 0xbd},
+	{0x0, 0x00, 0xbe},
+	{0x0, 0x00, 0xbf},
+	{0x0, 0x00, 0xc0},
+	{0x0, 0x00, 0xc1},
+	{0x0, 0x00, 0xc2},
+	{0x0, 0x00, 0xc3},
+	{0x0, 0x00, 0xc4},
+	{0x0, 0x00, 0xc5},
+	{0x0, 0x00, 0xc6},
+	{0x0, 0x00, 0xc7},
+	{0x0, 0x00, 0xc8},
+	{0x0, 0x00, 0xc9},
+	{0x0, 0x00, 0xca},
+	{0x0, 0x00, 0xcb},
+	{0x0, 0x00, 0xcc},
+	{0x1, 0xf4, 0x00},
 	{0x1, 0x38, 0x01},
 	{0x1, 0x40, 0x02},
-	{0x1, 0x0A, 0x03},
+	{0x1, 0x0a, 0x03},
 	{0x1, 0x40, 0x04},
 	{0x1, 0x40, 0x05},
 	{0x1, 0x40, 0x06},
 	{0x1, 0x67, 0x07},
 	{0x1, 0x31, 0x08},
 	{0x1, 0x00, 0x09},
-	{0x1, 0x00, 0x0A},
-	{0x1, 0x00, 0x0B},
-	{0x1, 0x14, 0x0C},
-	{0x1, 0x00, 0x0D},
-	{0x1, 0x00, 0x0E},
-	{0x1, 0x00, 0x0F},
-	{0x1, 0x1E, 0x10},
+	{0x1, 0x00, 0x0a},
+	{0x1, 0x00, 0x0b},
+	{0x1, 0x14, 0x0c},
+	{0x1, 0x00, 0x0d},
+	{0x1, 0x00, 0x0e},
+	{0x1, 0x00, 0x0f},
+	{0x1, 0x1e, 0x10},
 	{0x1, 0x00, 0x11},
 	{0x1, 0x00, 0x12},
 	{0x1, 0x00, 0x13},
 	{0x1, 0x00, 0x14},
-	{0x1, 0xFF, 0x15},
+	{0x1, 0xff, 0x15},
 	{0x1, 0x01, 0x16},
 	{0x1, 0x32, 0x17},
 	{0x1, 0x23, 0x18},
-	{0x1, 0xCE, 0x19},
-	{0x1, 0x23, 0x1A},
-	{0x1, 0x32, 0x1B},
-	{0x1, 0x8D, 0x1C},
-	{0x1, 0xCE, 0x1D},
-	{0x1, 0x8D, 0x1E},
-	{0x1, 0x00, 0x1F},
+	{0x1, 0xce, 0x19},
+	{0x1, 0x23, 0x1a},
+	{0x1, 0x32, 0x1b},
+	{0x1, 0x8d, 0x1c},
+	{0x1, 0xce, 0x1d},
+	{0x1, 0x8d, 0x1e},
+	{0x1, 0x00, 0x1f},
 	{0x1, 0x00, 0x20},
-	{0x1, 0xFF, 0x3E},
-	{0x1, 0x02, 0x3F},
+	{0x1, 0xff, 0x3e},
+	{0x1, 0x02, 0x3f},
 	{0x1, 0x00, 0x40},
 	{0x1, 0x00, 0x41},
 	{0x1, 0x00, 0x42},
@@ -553,12 +555,12 @@
 	{0x1, 0x00, 0x47},
 	{0x1, 0x00, 0x48},
 	{0x1, 0x00, 0x49},
-	{0x1, 0x00, 0x4A},
-	{0x1, 0x00, 0x4B},
-	{0x1, 0x00, 0x4C},
-	{0x1, 0x00, 0x4D},
-	{0x1, 0x00, 0x4E},
-	{0x1, 0x00, 0x4F},
+	{0x1, 0x00, 0x4a},
+	{0x1, 0x00, 0x4b},
+	{0x1, 0x00, 0x4c},
+	{0x1, 0x00, 0x4d},
+	{0x1, 0x00, 0x4e},
+	{0x1, 0x00, 0x4f},
 	{0x1, 0x00, 0x50},
 	{0x1, 0x00, 0x51},
 	{0x1, 0x00, 0x52},
@@ -569,7 +571,7 @@
 	{0x1, 0x00, 0x57},
 	{0x1, 0x00, 0x58},
 	{0x1, 0x00, 0x59},
-	{0x1, 0x00, 0x5A},
+	{0x1, 0x00, 0x5a},
 	{0x2, 0x03, 0x00},
 	{0x2, 0x00, 0x01},
 	{0x2, 0x00, 0x05},
@@ -1852,7 +1854,7 @@
 	PDEBUG(D_USBO, "reg write: 0x%02x 0x%02x 0x%02x",
 		req, index, value);
 	if (ret < 0)
-		err("reg write: error %d", ret);
+		pr_err("reg write: error %d\n", ret);
 	return ret;
 }
 
@@ -2186,15 +2188,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/spca505.c linux-3.0.82x/drivers/media/video/gspca/spca505.c
--- linux-3.0.82/drivers/media/video/gspca/spca505.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/spca505.c	2017-09-23 03:42:49.498676652 +0800
@@ -1,7 +1,7 @@
 /*
- * SPCA505 chip based cameras initialization data
+ * SPCA505/506 chip based cameras
  *
- * V4L2 by Jean-Francis Moine <http://moinejf.free.fr>
+ * V4L2 by Jean-FranÃ§ois Moine <http://moinejf.free.fr>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -19,31 +19,45 @@
  *
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "spca505"
 
 #include "gspca.h"
 
-MODULE_AUTHOR("Michel Xhaard <mxhaard@users.sourceforge.net>");
+MODULE_AUTHOR("Jean-FranÃ§ois Moine <http://moinejf.free.fr>"
+		"Michel Xhaard <mxhaard@users.sourceforge.net>");
 MODULE_DESCRIPTION("GSPCA/SPCA505 USB Camera Driver");
 MODULE_LICENSE("GPL");
 
+enum controls {
+	BRIGHTNESS,
+	CONTRAST,
+	COLORS,
+	HUE,
+	NCTRLS		/* number of controls */
+};
 /* specific webcam descriptor */
 struct sd {
 	struct gspca_dev gspca_dev;		/* !! must be the first item */
 
-	u8 brightness;
+	struct gspca_ctrl ctrls[NCTRLS];
 
 	u8 subtype;
-#define IntelPCCameraPro 0
-#define Nxultra 1
+};
+enum subtypes {
+	ST_GRABBER,		/* with spca506 and SAA7113 */
+	IntelPCCameraPro,	/* or UsbGrabber PV321 */
+	Nxultra,
 };
 
-/* V4L2 controls supported by the driver */
-static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
-static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
+static void setbrightness(struct gspca_dev *gspca_dev);
+static void setcontrast(struct gspca_dev *gspca_dev);
+static void setcolors(struct gspca_dev *gspca_dev);
+static void sethue(struct gspca_dev *gspca_dev);
 
-static const struct ctrl sd_ctrls[] = {
-	{
+static const struct ctrl sd_ctrls[NCTRLS] = {
+[BRIGHTNESS] = {
 	    {
 		.id      = V4L2_CID_BRIGHTNESS,
 		.type    = V4L2_CTRL_TYPE_INTEGER,
@@ -51,11 +65,45 @@
 		.minimum = 0,
 		.maximum = 255,
 		.step    = 1,
-#define BRIGHTNESS_DEF 127
-		.default_value = BRIGHTNESS_DEF,
+		.default_value = 127,
+	    },
+	    .set_control = setbrightness
+	},
+[CONTRAST] = {
+	    {
+		.id      = V4L2_CID_CONTRAST,
+		.type    = V4L2_CTRL_TYPE_INTEGER,
+		.name    = "Contrast",
+		.minimum = 0,
+		.maximum = 0xff,
+		.step    = 1,
+		.default_value = 0x47,
 	    },
-	    .set = sd_setbrightness,
-	    .get = sd_getbrightness,
+	    .set_control = setcontrast
+	},
+[COLORS] = {
+	    {
+		.id      = V4L2_CID_SATURATION,
+		.type    = V4L2_CTRL_TYPE_INTEGER,
+		.name    = "Saturation",
+		.minimum = 0,
+		.maximum = 0xff,
+		.step    = 1,
+		.default_value = 0x40,
+	    },
+	    .set_control = setcolors
+	},
+[HUE] = {
+	    {
+		.id      = V4L2_CID_HUE,
+		.type    = V4L2_CTRL_TYPE_INTEGER,
+		.name    = "Hue",
+		.minimum = 0,
+		.maximum = 0xff,
+		.step    = 1,
+		.default_value = 0,
+	    },
+	    .set_control = sethue
 	},
 };
 
@@ -87,35 +135,267 @@
 		.priv = 0},
 };
 
-#define SPCA50X_OFFSET_DATA 10
-
-#define SPCA50X_REG_USB 0x02	/* spca505 501 */
+/* input table for ST_GRABBER devices */
+static const struct v4l2_input sd_inputs[] = {
+	{0, "Webcam", V4L2_INPUT_TYPE_CAMERA,
+		.std = 0},
+	{1, "Composite 0", V4L2_INPUT_TYPE_CAMERA,
+		.std = V4L2_STD_PAL | V4L2_STD_NTSC | V4L2_STD_SECAM},
+	{2, "Composite 1", V4L2_INPUT_TYPE_CAMERA,
+		.std = V4L2_STD_PAL | V4L2_STD_NTSC | V4L2_STD_SECAM},
+	{3, "Composite 2", V4L2_INPUT_TYPE_CAMERA,
+		.std = V4L2_STD_PAL | V4L2_STD_NTSC | V4L2_STD_SECAM},
+	{4, "Composite 3", V4L2_INPUT_TYPE_CAMERA,
+		.std = V4L2_STD_PAL | V4L2_STD_NTSC | V4L2_STD_SECAM},
+	{5, "S-Video 0", V4L2_INPUT_TYPE_CAMERA,
+		.std = V4L2_STD_PAL | V4L2_STD_NTSC | V4L2_STD_SECAM},
+	{6, "S-Video 1", V4L2_INPUT_TYPE_CAMERA,
+		.std = V4L2_STD_PAL | V4L2_STD_NTSC | V4L2_STD_SECAM},
+	{7, "S-Video 2", V4L2_INPUT_TYPE_CAMERA,
+		.std = V4L2_STD_PAL | V4L2_STD_NTSC | V4L2_STD_SECAM},
+	{8, "S-Video 3", V4L2_INPUT_TYPE_CAMERA,
+		.std = V4L2_STD_PAL | V4L2_STD_NTSC | V4L2_STD_SECAM},
+};
 
-#define SPCA50X_USB_CTRL 0x00	/* spca505 */
-#define SPCA50X_CUSB_ENABLE 0x01 /* spca505 */
+#define SPCA50X_OFFSET_DATA 10
 
-#define SPCA50X_REG_GLOBAL 0x03	/* spca505 */
-#define SPCA50X_GMISC0_IDSEL 0x01 /* Global control device ID select spca505 */
-#define SPCA50X_GLOBAL_MISC0 0x00 /* Global control miscellaneous 0 spca505 */
-
-#define SPCA50X_GLOBAL_MISC1 0x01 /* 505 */
-#define SPCA50X_GLOBAL_MISC3 0x03 /* 505 */
-#define SPCA50X_GMISC3_SAA7113RST 0x20	/* Not sure about this one spca505 */
+/* USB control */
+#define REQ_02_USB 0x02
+#define IDX_00_USB_CTRL 0x00	/* USB control */
+#define USB_CTRL_ISO_ENABLE 0x01 /* ISO enable */
+
+/* global control */
+#define REQ_03_GLOBAL 0x03
+#define IDX_00_GLOBAL_MISC0 0x00 /* Global control miscellaneous 0 spca505 */
+#define GLOBAL_MISC0_IDSEL 0x01 /* Global control device ID select spca505 */
+
+#define IDX_01_GLOBAL_MISC1 0x01
+#define IDX_03_GLOBAL_MISC3 0x03
+#define GLOBAL_MISC3_SAA7113RST 0x20	/* Not sure about this one */
 
 /* Image format and compression control */
-#define SPCA50X_REG_COMPRESS 0x04
+#define REQ_04_COMPRESS 0x04
+
+/* spca506 Synchronous Serial Control */
+#define REQ_07_SSC 0x07
+#define IDX_00_SSC_DATA 0x00
+#define IDX_01_SSC_ADDR 0x01
+#define IDX_02_SSC_PREFETCH 0x02
+#define IDX_03_SSC_BUSY 0x03
+#define IDX_04_SSC_SLAVE_ADDR 0x04
+/* spca506 TV-IN */
+#define REQ_08_TV_IN 0x08
+#define IDX_00_TV_IN_PARM0 0x00
+
+#define SAA7113_bright 0x0a
+#define SAA7113_contrast 0x0b
+#define SAA7113_saturation 0x0c
+#define SAA7113_hue 0x0d
+#define SAA7113_I2C_ADDR 0x4a
+
+static const u8 grabber_bridge_init1[][3] = {
+	{REQ_03_GLOBAL, 0x00, 0x04},
+	{REQ_03_GLOBAL, 0xff, 0x03},
+	{REQ_03_GLOBAL, 0x00, 0x00},
+	{REQ_03_GLOBAL, 0x1c, 0x01},
+	{REQ_03_GLOBAL, 0x18, 0x01},
+	{}
+};
+static const u8 grabber_bridge_init2[][3] = {
+	{REQ_03_GLOBAL, 0x1c, 0x01},
+	{REQ_03_GLOBAL, 0x18, 0x01},
+	{0x05, 0x00, 0x00},
+	{0x05, 0xef, 0x01},
+	{0x05, 0x00, 0xc1},
+	{0x05, 0x00, 0xc2},
+	{0x06, 0x18, 0x02},
+	{0x06, 0xf5, 0x11},
+	{0x06, 0x02, 0x12},
+	{0x06, 0xfb, 0x13},
+	{0x06, 0x00, 0x14},
+	{0x06, 0xa4, 0x51},
+	{0x06, 0x40, 0x52},
+	{0x06, 0x71, 0x53},
+	{0x06, 0x40, 0x54},
+	/************************************************/
+	{REQ_03_GLOBAL, 0x00, 0x04},
+	{REQ_03_GLOBAL, 0x00, 0x03},
+	{REQ_03_GLOBAL, 0x00, 0x04},
+	{REQ_03_GLOBAL, 0xff, 0x03},
+	{REQ_02_USB, 0x00, 0x00},
+	{REQ_03_GLOBAL, 0x60, 0x00},
+	{REQ_03_GLOBAL, 0x18, 0x01},
+	{}
+};
+static const u8 grabber_saa7113_init[][2] = {
+	{0x08, 0x01},
+	{0xc0, 0x02},	/* input composite video */
+	{0x33, 0x03},
+	{0x00, 0x04},
+	{0x00, 0x05},
+	{0x0d, 0x06},
+	{0xf0, 0x07},
+	{0x98, 0x08},
+	{0x03, 0x09},
+	{0x80, 0x0a},
+	{0x47, 0x0b},
+	{0x48, 0x0c},
+	{0x00, 0x0d},
+	{0x03, 0x0e},	/* Chroma Pal adjust */
+	{0x2a, 0x0f},
+	{0x00, 0x10},
+	{0x0c, 0x11},
+	{0xb8, 0x12},
+	{0x01, 0x13},
+	{0x00, 0x14},
+	{0x00, 0x15},
+	{0x00, 0x16},
+	{0x00, 0x17},
+	{0x00, 0x18},
+	{0x00, 0x19},
+	{0x00, 0x1a},
+	{0x00, 0x1b},
+	{0x00, 0x1c},
+	{0x00, 0x1d},
+	{0x00, 0x1e},
+	{0xa1, 0x1f},
+	{0x02, 0x40},
+	{0xff, 0x41},
+	{0xff, 0x42},
+	{0xff, 0x43},
+	{0xff, 0x44},
+	{0xff, 0x45},
+	{0xff, 0x46},
+	{0xff, 0x47},
+	{0xff, 0x48},
+	{0xff, 0x49},
+	{0xff, 0x4a},
+	{0xff, 0x4b},
+	{0xff, 0x4c},
+	{0xff, 0x4d},
+	{0xff, 0x4e},
+	{0xff, 0x4f},
+	{0xff, 0x50},
+	{0xff, 0x51},
+	{0xff, 0x52},
+	{0xff, 0x53},
+	{0xff, 0x54},
+	{0xff, 0x55},
+	{0xff, 0x56},
+	{0xff, 0x57},
+	{0x00, 0x58},
+	{0x54, 0x59},
+	{0x07, 0x5a},
+	{0x83, 0x5b},
+	{0x00, 0x5c},
+	{0x00, 0x5d},
+	{0x00, 0x5e},
+	{0x00, 0x5f},
+	{0x00, 0x60},
+	{0x05, 0x61},
+	{0x9f, 0x62},
+	{}
+};
+static const u8 grabber_bridge_start1[][3] = {
+	{0x03, 0x00, 0x04},
+	{0x03, 0x00, 0x03},
+	{0x03, 0x00, 0x04},
+	{0x03, 0xff, 0x03},
+	{0x02, 0x00, 0x00},
+	{0x03, 0x60, 0x00},
+	{0x03, 0x18, 0x01},
+	{}
+};
+static const u8 grabber_saa7113_start[][2] = {
+	{0x08, 0x01},	/* Increment Delay */
+/*	{0xc0, 0x02},	 * Analog Input Control 1 */
+	{0x33, 0x03},	/* Analog Input Control 2 */
+	{0x00, 0x04},	/* Analog Input Control 3 */
+	{0x00, 0x05},	/* Analog Input Control 4 */
+	{0x0d, 0x06},	/* Horizontal Sync Start 0xe9-0x0d */
+	{0xf0, 0x07},	/* Horizontal Sync Stop  0x0d-0xf0 */
+
+	{0x98, 0x08},	/* Sync Control */
+/*		Default values			*/
+	{0x03, 0x09},	/* Luminance Control */
+	{0x80, 0x0a},	/* Luminance Brightness */
+	{0x47, 0x0b},	/* Luminance Contrast */
+	{0x48, 0x0c},	/* Chrominance Saturation */
+	{0x00, 0x0d},	/* Chrominance Hue Control */
+	{0x2a, 0x0f},	/* Chrominance Gain Control */
+	/**************************************/
+	{0x00, 0x10},	/* Format/Delay Control */
+	{0x0c, 0x11},	/* Output Control 1 */
+	{0xb8, 0x12},	/* Output Control 2 */
+	{0x01, 0x13},	/* Output Control 3 */
+	{0x00, 0x14},	/* reserved */
+	{0x00, 0x15},	/* VGATE START */
+	{0x00, 0x16},	/* VGATE STOP */
+	{0x00, 0x17},	/* VGATE Control (MSB) */
+	{0x00, 0x18},
+	{0x00, 0x19},
+	{0x00, 0x1a},
+	{0x00, 0x1b},
+	{0x00, 0x1c},
+	{0x00, 0x1d},
+	{0x00, 0x1e},
+	{0xa1, 0x1f},
+	{0x02, 0x40},
+	{0xff, 0x41},
+	{0xff, 0x42},
+	{0xff, 0x43},
+	{0xff, 0x44},
+	{0xff, 0x45},
+	{0xff, 0x46},
+	{0xff, 0x47},
+	{0xff, 0x48},
+	{0xff, 0x49},
+	{0xff, 0x4a},
+	{0xff, 0x4b},
+	{0xff, 0x4c},
+	{0xff, 0x4d},
+	{0xff, 0x4e},
+	{0xff, 0x4f},
+	{0xff, 0x50},
+	{0xff, 0x51},
+	{0xff, 0x52},
+	{0xff, 0x53},
+	{0xff, 0x54},
+	{0xff, 0x55},
+	{0xff, 0x56},
+	{0xff, 0x57},
+	{0x00, 0x58},
+	{0x54, 0x59},
+	{0x07, 0x5a},
+	{0x83, 0x5b},
+	{0x00, 0x5c},
+	{0x00, 0x5d},
+	{0x00, 0x5e},
+	{0x00, 0x5f},
+	{0x00, 0x60},
+	{0x05, 0x61},
+	{0x9f, 0x62},
+	{}
+};
+static const u8 grabber_bridge_start2[][3] = {
+	{0x05, 0x00, 0x0003},
+	{0x05, 0x00, 0x0004},
+	{0x03, 0x10, 0x0001},
+	{0x03, 0x78, 0x0000},
+	{}
+};
 
 /*
  * Data to initialize a SPCA505. Common to the CCD and external modes
  */
 static const u8 spca505_init_data[][3] = {
 	/* bmRequest,value,index */
-	{SPCA50X_REG_GLOBAL, SPCA50X_GMISC3_SAA7113RST, SPCA50X_GLOBAL_MISC3},
+	{REQ_03_GLOBAL, GLOBAL_MISC3_SAA7113RST, IDX_03_GLOBAL_MISC3},
 	/* Sensor reset */
-	{SPCA50X_REG_GLOBAL, 0x00, SPCA50X_GLOBAL_MISC3},
-	{SPCA50X_REG_GLOBAL, 0x00, SPCA50X_GLOBAL_MISC1},
+	{REQ_03_GLOBAL, 0x00, IDX_03_GLOBAL_MISC3},
+	{REQ_03_GLOBAL, 0x00, IDX_01_GLOBAL_MISC1},
 	/* Block USB reset */
-	{SPCA50X_REG_GLOBAL, SPCA50X_GMISC0_IDSEL, SPCA50X_GLOBAL_MISC0},
+	{REQ_03_GLOBAL, GLOBAL_MISC0_IDSEL, IDX_00_GLOBAL_MISC0},
 
 	{0x05, 0x01, 0x10},
 					/* Maybe power down some stuff */
@@ -148,18 +428,18 @@
 static const u8 spca505_open_data_ccd[][3] = {
 	/* bmRequest,value,index */
 	/* Internal CCD data set */
-	{0x03, 0x04, 0x01},
+	{REQ_03_GLOBAL, 0x04, IDX_01_GLOBAL_MISC1},
 	/* This could be a reset */
-	{0x03, 0x00, 0x01},
+	{REQ_03_GLOBAL, 0x00, IDX_01_GLOBAL_MISC1},
 
 	/* Setup compression and image registers. 0x6 and 0x7 seem to be
 	   related to H&V hold, and are resolution mode specific */
-		{0x04, 0x10, 0x01},
+	{REQ_04_COMPRESS, 0x10, 0x01},
 		/* DIFF(0x50), was (0x10) */
-	{0x04, 0x00, 0x04},
-	{0x04, 0x00, 0x05},
-	{0x04, 0x20, 0x06},
-	{0x04, 0x20, 0x07},
+	{REQ_04_COMPRESS, 0x00, 0x04},
+	{REQ_04_COMPRESS, 0x00, 0x05},
+	{REQ_04_COMPRESS, 0x20, 0x06},
+	{REQ_04_COMPRESS, 0x20, 0x07},
 
 	{0x08, 0x0a, 0x00},
 	/* DIFF (0x4a), was (0xa) */
@@ -184,21 +464,21 @@
 		/* DIFF not written */
 		{0x05, 0xa0, 0x08},
 		/* DIFF not written */
-		{0x05, 0x0, 0x12},
+		{0x05, 0x00, 0x12},
 		/* DIFF not written */
 	{0x05, 0x02, 0x0f},
 	/* DIFF not written */
 		{0x05, 0x10, 0x46},
 		/* DIFF not written */
-		{0x05, 0x8, 0x4a},
+		{0x05, 0x08, 0x4a},
 		/* DIFF not written */
 
-	{0x03, 0x08, 0x03},
+	{REQ_03_GLOBAL, 0x08, IDX_03_GLOBAL_MISC3},
 	/* DIFF (0x3,0x28,0x3) */
-	{0x03, 0x08, 0x01},
-	{0x03, 0x0c, 0x03},
+	{REQ_03_GLOBAL, 0x08, IDX_01_GLOBAL_MISC1},
+	{REQ_03_GLOBAL, 0x0c, IDX_03_GLOBAL_MISC3},
 	/* DIFF not written */
-		{0x03, 0x21, 0x00},
+	{REQ_03_GLOBAL, 0x21, IDX_00_GLOBAL_MISC0},
 		/* DIFF (0x39) */
 
 /* Extra block copied from init to hopefully ensure CCD is in a sane state */
@@ -221,7 +501,7 @@
 	{0x06, 0x3d, 0x54},
 	/* End of extra block */
 
-		{0x06, 0x3f, 0x1},
+		{0x06, 0x3f, 0x01},
 		/* Block skipped */
 	{0x06, 0x10, 0x02},
 	{0x06, 0x64, 0x07},
@@ -275,8 +555,8 @@
 	{0x05, 0x04, 0xc2},
 	{0x05, 0x00, 0xca},
 
-	{0x03, 0x4c, 0x3},
-	{0x03, 0x18, 0x1},
+	{REQ_03_GLOBAL, 0x4c, IDX_03_GLOBAL_MISC3},
+	{REQ_03_GLOBAL, 0x18, IDX_01_GLOBAL_MISC1},
 
 	{0x06, 0x70, 0x51},
 	{0x06, 0xbe, 0x53},
@@ -285,22 +565,22 @@
 	{0x06, 0x05, 0x59},
 	{0x06, 0x15, 0x5a},
 
-	{0x04, 0x00, 0x08},
+	{REQ_04_COMPRESS, 0x00, 0x08},
 	/* Compress = OFF (0x1 to turn on) */
-	{0x04, 0x12, 0x09},
-	{0x04, 0x21, 0x0a},
-	{0x04, 0x10, 0x0b},
-	{0x04, 0x21, 0x0c},
-	{0x04, 0x05, 0x00},
+	{REQ_04_COMPRESS, 0x12, 0x09},
+	{REQ_04_COMPRESS, 0x21, 0x0a},
+	{REQ_04_COMPRESS, 0x10, 0x0b},
+	{REQ_04_COMPRESS, 0x21, 0x0c},
+	{REQ_04_COMPRESS, 0x05, 0x00},
 	/* was 5 (Image Type ? ) */
-	{0x04, 0x00, 0x01},
+	{REQ_04_COMPRESS, 0x00, 0x01},
 
 	{0x06, 0x3f, 0x01},
 
-	{0x04, 0x00, 0x04},
-	{0x04, 0x00, 0x05},
-	{0x04, 0x40, 0x06},
-	{0x04, 0x40, 0x07},
+	{REQ_04_COMPRESS, 0x00, 0x04},
+	{REQ_04_COMPRESS, 0x00, 0x05},
+	{REQ_04_COMPRESS, 0x40, 0x06},
+	{REQ_04_COMPRESS, 0x40, 0x07},
 
 	{0x06, 0x1c, 0x17},
 	{0x06, 0xe2, 0x19},
@@ -335,34 +615,34 @@
  */
 static const u8 spca505b_init_data[][3] = {
 /* start */
-	{0x02, 0x00, 0x00},		/* init */
-	{0x02, 0x00, 0x01},
-	{0x02, 0x00, 0x02},
-	{0x02, 0x00, 0x03},
-	{0x02, 0x00, 0x04},
-	{0x02, 0x00, 0x05},
-	{0x02, 0x00, 0x06},
-	{0x02, 0x00, 0x07},
-	{0x02, 0x00, 0x08},
-	{0x02, 0x00, 0x09},
-	{0x03, 0x00, 0x00},
-	{0x03, 0x00, 0x01},
-	{0x03, 0x00, 0x02},
-	{0x03, 0x00, 0x03},
-	{0x03, 0x00, 0x04},
-	{0x03, 0x00, 0x05},
-	{0x03, 0x00, 0x06},
-	{0x04, 0x00, 0x00},
-	{0x04, 0x00, 0x02},
-	{0x04, 0x00, 0x04},
-	{0x04, 0x00, 0x05},
-	{0x04, 0x00, 0x06},
-	{0x04, 0x00, 0x07},
-	{0x04, 0x00, 0x08},
-	{0x04, 0x00, 0x09},
-	{0x04, 0x00, 0x0a},
-	{0x04, 0x00, 0x0b},
-	{0x04, 0x00, 0x0c},
+	{REQ_02_USB, 0x00, 0x00},		/* init */
+	{REQ_02_USB, 0x00, 0x01},
+	{REQ_02_USB, 0x00, 0x02},
+	{REQ_02_USB, 0x00, 0x03},
+	{REQ_02_USB, 0x00, 0x04},
+	{REQ_02_USB, 0x00, 0x05},
+	{REQ_02_USB, 0x00, 0x06},
+	{REQ_02_USB, 0x00, 0x07},
+	{REQ_02_USB, 0x00, 0x08},
+	{REQ_02_USB, 0x00, 0x09},
+	{REQ_03_GLOBAL, 0x00, 0x00},
+	{REQ_03_GLOBAL, 0x00, 0x01},
+	{REQ_03_GLOBAL, 0x00, 0x02},
+	{REQ_03_GLOBAL, 0x00, 0x03},
+	{REQ_03_GLOBAL, 0x00, 0x04},
+	{REQ_03_GLOBAL, 0x00, 0x05},
+	{REQ_03_GLOBAL, 0x00, 0x06},
+	{REQ_04_COMPRESS, 0x00, 0x00},
+	{REQ_04_COMPRESS, 0x00, 0x02},
+	{REQ_04_COMPRESS, 0x00, 0x04},
+	{REQ_04_COMPRESS, 0x00, 0x05},
+	{REQ_04_COMPRESS, 0x00, 0x06},
+	{REQ_04_COMPRESS, 0x00, 0x07},
+	{REQ_04_COMPRESS, 0x00, 0x08},
+	{REQ_04_COMPRESS, 0x00, 0x09},
+	{REQ_04_COMPRESS, 0x00, 0x0a},
+	{REQ_04_COMPRESS, 0x00, 0x0b},
+	{REQ_04_COMPRESS, 0x00, 0x0c},
 	{0x07, 0x00, 0x00},
 	{0x07, 0x00, 0x03},
 	{0x08, 0x00, 0x00},
@@ -383,10 +663,10 @@
 	{0x06, 0x00, 0x13},
 	{0x06, 0x28, 0x51},
 	{0x06, 0xff, 0x53},
-	{0x02, 0x00, 0x08},
+	{REQ_02_USB, 0x00, 0x08},
 
-	{0x03, 0x00, 0x03},
-	{0x03, 0x10, 0x03},
+	{REQ_03_GLOBAL, 0x00, IDX_03_GLOBAL_MISC3},
+	{REQ_03_GLOBAL, 0x10, IDX_03_GLOBAL_MISC3},
 	{}
 };
 
@@ -395,26 +675,26 @@
  */
 static const u8 spca505b_open_data_ccd[][3] = {
 
-/* {0x02,0x00,0x00}, */
-	{0x03, 0x04, 0x01},		/* rst */
-	{0x03, 0x00, 0x01},
-	{0x03, 0x00, 0x00},
-	{0x03, 0x21, 0x00},
-	{0x03, 0x00, 0x04},
-	{0x03, 0x00, 0x03},
-	{0x03, 0x18, 0x03},
-	{0x03, 0x08, 0x01},
-	{0x03, 0x1c, 0x03},
-	{0x03, 0x5c, 0x03},
-	{0x03, 0x5c, 0x03},
-	{0x03, 0x18, 0x01},
+/* {REQ_02_USB,0x00,0x00}, */
+	{REQ_03_GLOBAL, 0x04, 0x01},		/* rst */
+	{REQ_03_GLOBAL, 0x00, 0x01},
+	{REQ_03_GLOBAL, 0x00, 0x00},
+	{REQ_03_GLOBAL, 0x21, 0x00},
+	{REQ_03_GLOBAL, 0x00, 0x04},
+	{REQ_03_GLOBAL, 0x00, 0x03},
+	{REQ_03_GLOBAL, 0x18, 0x03},
+	{REQ_03_GLOBAL, 0x08, 0x01},
+	{REQ_03_GLOBAL, 0x1c, 0x03},
+	{REQ_03_GLOBAL, 0x5c, 0x03},
+	{REQ_03_GLOBAL, 0x5c, 0x03},
+	{REQ_03_GLOBAL, 0x18, 0x01},
 
 /* same as 505 */
-	{0x04, 0x10, 0x01},
-	{0x04, 0x00, 0x04},
-	{0x04, 0x00, 0x05},
-	{0x04, 0x20, 0x06},
-	{0x04, 0x20, 0x07},
+	{REQ_04_COMPRESS, 0x10, 0x01},
+	{REQ_04_COMPRESS, 0x00, 0x04},
+	{REQ_04_COMPRESS, 0x00, 0x05},
+	{REQ_04_COMPRESS, 0x20, 0x06},
+	{REQ_04_COMPRESS, 0x20, 0x07},
 
 	{0x08, 0x0a, 0x00},
 
@@ -436,7 +716,7 @@
 	{0x05, 0x80, 0x14},		/* max exposure off (0=on) */
 	{0x05, 0x01, 0xb0},
 	{0x05, 0x01, 0xbf},
-	{0x03, 0x02, 0x06},
+	{REQ_03_GLOBAL, 0x02, 0x06},
 	{0x05, 0x10, 0x46},
 	{0x05, 0x08, 0x4a},
 
@@ -447,7 +727,7 @@
 	{0x06, 0xfc, 0x09},
 	{0x06, 0xfc, 0x0a},
 	{0x06, 0xfc, 0x0b},
-	{0x04, 0x00, 0x01},
+	{REQ_04_COMPRESS, 0x00, 0x01},
 	{0x06, 0x18, 0x0c},
 	{0x06, 0xfc, 0x0d},
 	{0x06, 0xfc, 0x0e},
@@ -499,7 +779,7 @@
 	{0x05, 0x40, 0xc1},
 	{0x05, 0x59, 0xc2},
 	{0x05, 0x00, 0xca},
-	{0x04, 0x00, 0x01},
+	{REQ_04_COMPRESS, 0x00, 0x01},
 	{0x05, 0x80, 0xc1},
 	{0x05, 0xec, 0xc2},
 	{0x05, 0x0, 0xca},
@@ -532,22 +812,22 @@
 
 	{0x05, 0x01, 0x02},
 
-	{0x04, 0x00, 0x08},		/* compression */
-	{0x04, 0x12, 0x09},
-	{0x04, 0x21, 0x0a},
-	{0x04, 0x10, 0x0b},
-	{0x04, 0x21, 0x0c},
-	{0x04, 0x1d, 0x00},		/* imagetype (1d) */
-	{0x04, 0x41, 0x01},		/* hardware snapcontrol */
-
-	{0x04, 0x00, 0x04},
-	{0x04, 0x00, 0x05},
-	{0x04, 0x10, 0x06},
-	{0x04, 0x10, 0x07},
-	{0x04, 0x40, 0x06},
-	{0x04, 0x40, 0x07},
-	{0x04, 0x00, 0x04},
-	{0x04, 0x00, 0x05},
+	{REQ_04_COMPRESS, 0x00, 0x08},		/* compression */
+	{REQ_04_COMPRESS, 0x12, 0x09},
+	{REQ_04_COMPRESS, 0x21, 0x0a},
+	{REQ_04_COMPRESS, 0x10, 0x0b},
+	{REQ_04_COMPRESS, 0x21, 0x0c},
+	{REQ_04_COMPRESS, 0x1d, 0x00},		/* imagetype (1d) */
+	{REQ_04_COMPRESS, 0x41, 0x01},		/* hardware snapcontrol */
+
+	{REQ_04_COMPRESS, 0x00, 0x04},
+	{REQ_04_COMPRESS, 0x00, 0x05},
+	{REQ_04_COMPRESS, 0x10, 0x06},
+	{REQ_04_COMPRESS, 0x10, 0x07},
+	{REQ_04_COMPRESS, 0x40, 0x06},
+	{REQ_04_COMPRESS, 0x40, 0x07},
+	{REQ_04_COMPRESS, 0x00, 0x04},
+	{REQ_04_COMPRESS, 0x00, 0x05},
 
 	{0x06, 0x1c, 0x17},
 	{0x06, 0xe2, 0x19},
@@ -565,30 +845,35 @@
 	{}
 };
 
-static int reg_write(struct usb_device *dev,
+static void reg_w_riv(struct gspca_dev *gspca_dev,
 		     u16 req, u16 index, u16 value)
 {
 	int ret;
 
-	ret = usb_control_msg(dev,
-			usb_sndctrlpipe(dev, 0),
+	if (gspca_dev->usb_err < 0)
+		return;
+	ret = usb_control_msg(gspca_dev->dev,
+			usb_sndctrlpipe(gspca_dev->dev, 0),
 			req,
 			USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 			value, index, NULL, 0, 500);
-	PDEBUG(D_USBO, "reg write: 0x%02x,0x%02x:0x%02x, %d",
-		req, index, value, ret);
-	if (ret < 0)
-		err("reg write: error %d", ret);
-	return ret;
+	if (ret < 0) {
+		pr_err("reg write: error %d\n", ret);
+		gspca_dev->usb_err = ret;
+	}
 }
+/*fixme: quick hack*/
+#define reg_w(d, r, v, i) reg_w_riv(d, r, i, v)
 
 /* returns: negative is error, pos or zero is data */
 static int reg_read(struct gspca_dev *gspca_dev,
-			u16 req,	/* bRequest */
+			u8 req,		/* bRequest */
 			u16 index)	/* wIndex */
 {
 	int ret;
 
+	if (gspca_dev->usb_err < 0)
+		return -1;
 	ret = usb_control_msg(gspca_dev->dev,
 			usb_rcvctrlpipe(gspca_dev->dev, 0),
 			req,
@@ -597,24 +882,107 @@
 			index,
 			gspca_dev->usb_buf, 2,
 			500);			/* timeout */
-	if (ret < 0)
-		return ret;
+	if (ret < 0) {
+		pr_err("reg_read err %d\n", ret);
+		gspca_dev->usb_err = ret;
+		return -1;
+	}
 	return (gspca_dev->usb_buf[1] << 8) + gspca_dev->usb_buf[0];
 }
 
-static int write_vector(struct gspca_dev *gspca_dev,
-			const u8 data[][3])
+static void write_vector(struct gspca_dev *gspca_dev,
+			const u8 (*data)[3])
 {
-	struct usb_device *dev = gspca_dev->dev;
-	int ret, i = 0;
+	while ((*data)[0] != 0) {
+		reg_w_riv(gspca_dev, (*data)[0], (*data)[2], (*data)[1]);
+		data++;
+	}
+}
 
-	while (data[i][0] != 0) {
-		ret = reg_write(dev, data[i][0], data[i][2], data[i][1]);
-		if (ret < 0)
-			return ret;
-		i++;
+static void i2c_w(struct gspca_dev *gspca_dev,
+			u8 valeur, u8 reg)
+{
+	int ret, retry = 60;
+
+	reg_w_riv(gspca_dev, REQ_07_SSC, IDX_01_SSC_ADDR, reg);
+	reg_w_riv(gspca_dev, REQ_07_SSC, IDX_00_SSC_DATA, valeur);
+	while (retry--) {
+		ret = reg_read(gspca_dev, REQ_07_SSC, IDX_03_SSC_BUSY);
+		if (ret == 0)
+			return;
+	}
+	err("i2c_w timeout");
+}
+
+static void i2c_w_buf(struct gspca_dev *gspca_dev,
+			const u8 (*data)[2])
+{
+	while ((*data)[1] != 0) {
+		i2c_w(gspca_dev, (*data)[0], (*data)[1]);
+		data++;
 	}
-	return 0;
+}
+
+static void setinputstd(struct gspca_dev *gspca_dev)
+{
+	struct sd *sd = (struct sd *) gspca_dev;
+	int i, channel;
+	u8 parm0;
+	static const int channel_tb[ARRAY_SIZE(sd_inputs)] =
+		{-1, 0, 1, 2, 3, 6, 7, 8, 9};
+
+	i = gspca_dev->curr_input;
+	if (sd->subtype == ST_GRABBER)
+		i++;			/* (no webcam) */
+	channel = channel_tb[i];
+
+	/* NTSC bit0 -> 1 (525 l) - PAL SECAM bit0 -> 0 (625 l) */
+	/* Composite channel bit1 -> 1 - S-video bit 1 -> 0 */
+	parm0 = 0x48;
+	if (gspca_dev->curr_std & V4L2_STD_NTSC)
+		parm0 |= 0x01;
+	if (channel < 4)
+		parm0 |= 0x02;
+	reg_w_riv(gspca_dev, REQ_08_TV_IN, IDX_00_TV_IN_PARM0, parm0);
+
+	i2c_w(gspca_dev, 0xc0 | channel, 0x02);
+	if (gspca_dev->curr_std & V4L2_STD_NTSC)
+		i2c_w(gspca_dev, 0x33, 0x0e);
+					/* Chrominance Control NTSC N */
+	else if (gspca_dev->curr_std & V4L2_STD_SECAM)
+		i2c_w(gspca_dev, 0x53, 0x0e);
+					/* Chrominance Control SECAM */
+	else
+		i2c_w(gspca_dev, 0x03, 0x0e);
+					/* Chrominance Control PAL BGHIV */
+}
+
+static void spca506_Setsize(struct gspca_dev *gspca_dev, u16 code,
+					u16 xmult, u16 ymult)
+{
+	/* image type */
+	reg_w(gspca_dev, REQ_04_COMPRESS, (0x18 | (code & 0x07)), 0x00);
+	/* Soft snap 0x40 Hard 0x41 */
+	reg_w(gspca_dev, REQ_04_COMPRESS, 0x41, 0x01);
+	reg_w(gspca_dev, REQ_04_COMPRESS, 0x00, 0x02);
+	/* reserved */
+	reg_w(gspca_dev, REQ_04_COMPRESS, 0x00, 0x03);
+	/* reserved */
+	reg_w(gspca_dev, REQ_04_COMPRESS, 0x00, 0x04);
+	/* reserved */
+	reg_w(gspca_dev, REQ_04_COMPRESS, 0x01, 0x05);
+	/* reserved */
+	reg_w(gspca_dev, REQ_04_COMPRESS, xmult, 0x06);
+	/* reserved */
+	reg_w(gspca_dev, REQ_04_COMPRESS, ymult, 0x07);
+	/* compression 1 */
+	reg_w(gspca_dev, REQ_04_COMPRESS, 0x00, 0x08);
+	/* T=64 -> 2 */
+	reg_w(gspca_dev, REQ_04_COMPRESS, 0x00, 0x09);
+	/* threshold2D */
+	reg_w(gspca_dev, REQ_04_COMPRESS, 0x21, 0x0a);
+	/* quantization */
+	reg_w(gspca_dev, REQ_04_COMPRESS, 0x00, 0x0b);
 }
 
 /* this function is called at probe time */
@@ -624,15 +992,32 @@
 	struct sd *sd = (struct sd *) gspca_dev;
 	struct cam *cam;
 
+	sd->subtype = id->driver_info;
+
 	cam = &gspca_dev->cam;
 	cam->cam_mode = vga_mode;
-	sd->subtype = id->driver_info;
-	if (sd->subtype != IntelPCCameraPro)
-		cam->nmodes = ARRAY_SIZE(vga_mode);
-	else			/* no 640x480 for IntelPCCameraPro */
-		cam->nmodes = ARRAY_SIZE(vga_mode) - 1;
-	sd->brightness = BRIGHTNESS_DEF;
+	cam->inputs = sd_inputs;
+	cam->nmodes = ARRAY_SIZE(vga_mode);
+	cam->ninputs = ARRAY_SIZE(sd_inputs);
+	switch (sd->subtype) {
+	case ST_GRABBER:
+		cam->ninputs--;		/* no webcam */
+		cam->inputs++;
+		break;
+	case IntelPCCameraPro:
+		cam->nmodes--;		/* no 640x480 */
+		break;
+	default:
+/*	case Nxultra: */
+		cam->ninputs = 1;	/* webcam only */
+		break;
+	}
+	gspca_dev->cam.ctrls = sd->ctrls;
 
+	if (sd->subtype != ST_GRABBER)
+		gspca_dev->ctrl_dis = (1 << CONTRAST)
+					| (1 << COLORS)
+					| (1 << HUE);
 	return 0;
 }
 
@@ -640,97 +1025,168 @@
 static int sd_init(struct gspca_dev *gspca_dev)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
+	static const u8 (*init_tb[])[3] = {
+		[ST_GRABBER] =		grabber_bridge_init1,
+		[IntelPCCameraPro] =	spca505_init_data,
+		[Nxultra] =		spca505b_init_data,
+	};
 
-	if (write_vector(gspca_dev,
-			 sd->subtype == Nxultra
-				? spca505b_init_data
-				: spca505_init_data))
-		return -EIO;
-	return 0;
+	write_vector(gspca_dev, init_tb[sd->subtype]);
+
+	reg_w(gspca_dev, REQ_07_SSC,
+			SAA7113_I2C_ADDR, IDX_04_SSC_SLAVE_ADDR);
+
+	if (sd->subtype == ST_GRABBER
+	 || sd->subtype == IntelPCCameraPro) {
+		reg_w(gspca_dev, REQ_07_SSC,
+				SAA7113_I2C_ADDR, IDX_04_SSC_SLAVE_ADDR);
+		setinputstd(gspca_dev);
+		write_vector(gspca_dev, grabber_bridge_init2);
+		i2c_w_buf(gspca_dev, grabber_saa7113_init);
+	}
+	return gspca_dev->usb_err;
 }
 
 static void setbrightness(struct gspca_dev *gspca_dev)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
-	u8 brightness = sd->brightness;
+	u8 brightness = sd->ctrls[BRIGHTNESS].val;
+
+	if (sd->subtype == ST_GRABBER) {
+		i2c_w(gspca_dev, brightness, SAA7113_bright);
+		i2c_w(gspca_dev, 0x01, 0x09);
+	} else {
+		reg_w_riv(gspca_dev, 0x05, 0x00, (255 - brightness) >> 6);
+		reg_w_riv(gspca_dev, 0x05, 0x01, (255 - brightness) << 2);
+	}
+}
+
+static void setcontrast(struct gspca_dev *gspca_dev)
+{
+	struct sd *sd = (struct sd *) gspca_dev;
 
-	reg_write(gspca_dev->dev, 0x05, 0x00, (255 - brightness) >> 6);
-	reg_write(gspca_dev->dev, 0x05, 0x01, (255 - brightness) << 2);
+	i2c_w(gspca_dev, sd->ctrls[CONTRAST].val, SAA7113_contrast);
+	i2c_w(gspca_dev, 0x01, 0x09);
+}
+
+static void setcolors(struct gspca_dev *gspca_dev)
+{
+	struct sd *sd = (struct sd *) gspca_dev;
+
+	i2c_w(gspca_dev, sd->ctrls[COLORS].val, SAA7113_saturation);
+	i2c_w(gspca_dev, 0x01, 0x09);
+}
+
+static void sethue(struct gspca_dev *gspca_dev)
+{
+	struct sd *sd = (struct sd *) gspca_dev;
+
+	i2c_w(gspca_dev, sd->ctrls[HUE].val, SAA7113_hue);
+	i2c_w(gspca_dev, 0x01, 0x09);
 }
 
 static int sd_start(struct gspca_dev *gspca_dev)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
-	struct usb_device *dev = gspca_dev->dev;
 	int ret, mode;
-	static u8 mode_tb[][3] = {
+	static const u8 mode_tb[][3] = {
 	/*	  r00   r06   r07	*/
 		{0x00, 0x10, 0x10},	/* 640x480 */
 		{0x01, 0x1a, 0x1a},	/* 352x288 */
+#if 1
+		{0x02, 0x1c, 0x1c},	/* 320x240 */
+#else
 		{0x02, 0x1c, 0x1d},	/* 320x240 */
+#endif
 		{0x04, 0x34, 0x34},	/* 176x144 */
 		{0x05, 0x40, 0x40}	/* 160x120 */
 	};
+	static const u8 (*start_tb[])[3] = {
+		[ST_GRABBER] =		grabber_bridge_start1,
+		[IntelPCCameraPro] =	spca505_open_data_ccd,
+		[Nxultra] =		spca505b_open_data_ccd,
+	};
 
-	if (sd->subtype == Nxultra)
-		write_vector(gspca_dev, spca505b_open_data_ccd);
-	else
-		write_vector(gspca_dev, spca505_open_data_ccd);
-	ret = reg_read(gspca_dev, 0x06, 0x16);
-
-	if (ret < 0) {
-		PDEBUG(D_ERR|D_CONF,
-		       "register read failed err: %d",
-		       ret);
-		return ret;
-	}
-	if (ret != 0x0101) {
-		err("After vector read returns 0x%04x should be 0x0101",
-			ret);
-	}
-
-	ret = reg_write(gspca_dev->dev, 0x06, 0x16, 0x0a);
-	if (ret < 0)
-		return ret;
-	reg_write(gspca_dev->dev, 0x05, 0xc2, 0x12);
-
-	/* necessary because without it we can see stream
-	 * only once after loading module */
-	/* stopping usb registers Tomasz change */
-	reg_write(dev, 0x02, 0x00, 0x00);
-
-	mode = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv;
-	reg_write(dev, SPCA50X_REG_COMPRESS, 0x00, mode_tb[mode][0]);
-	reg_write(dev, SPCA50X_REG_COMPRESS, 0x06, mode_tb[mode][1]);
-	reg_write(dev, SPCA50X_REG_COMPRESS, 0x07, mode_tb[mode][2]);
-
-	ret = reg_write(dev, SPCA50X_REG_USB,
-			 SPCA50X_USB_CTRL,
-			 SPCA50X_CUSB_ENABLE);
-
-	setbrightness(gspca_dev);
+	if (gspca_dev->curr_std != 0) {
 
-	return ret;
+		/* TV */
+		write_vector(gspca_dev, start_tb[ST_GRABBER]);
+		write_vector(gspca_dev, grabber_bridge_start1);
+		i2c_w_buf(gspca_dev, grabber_saa7113_start);
+		write_vector(gspca_dev, grabber_bridge_start2);
+		mode = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv;
+		spca506_Setsize(gspca_dev, mode_tb[mode][0],
+					mode_tb[mode][1],
+					mode_tb[mode][2]);
+		reg_w(gspca_dev, REQ_02_USB, USB_CTRL_ISO_ENABLE,
+						IDX_00_USB_CTRL);
+		reg_w(gspca_dev, REQ_03_GLOBAL, 0x12, IDX_01_GLOBAL_MISC1);
+		reg_read(gspca_dev, REQ_04_COMPRESS, 0x0001);
+		setinputstd(gspca_dev);
+	} else {
+
+		/* webcam */
+		write_vector(gspca_dev, start_tb[sd->subtype]);
+		ret = reg_read(gspca_dev, 0x06, 0x16);
+		if (ret < 0)
+			return gspca_dev->usb_err;
+		if (ret != 0x0101) {
+			pr_err("After vector read returns 0x%04x should be 0x0101\n",
+				ret);
+			gspca_dev->usb_err = -EIO;
+			return gspca_dev->usb_err;
+		}
+
+		reg_w_riv(gspca_dev, 0x06, 0x16, 0x0a);
+		reg_w_riv(gspca_dev, 0x05, 0xc2, 0x12);
+
+		/* necessary because without it we can see stream
+		 * only once after loading module */
+		/* stopping usb registers Tomasz change */
+		reg_w_riv(gspca_dev, REQ_02_USB, IDX_00_USB_CTRL, 0x00);
+
+		mode = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv;
+		reg_w_riv(gspca_dev, REQ_04_COMPRESS, 0x00, mode_tb[mode][0]);
+		reg_w_riv(gspca_dev, REQ_04_COMPRESS, 0x06, mode_tb[mode][1]);
+		reg_w_riv(gspca_dev, REQ_04_COMPRESS, 0x07, mode_tb[mode][2]);
+		reg_w_riv(gspca_dev, REQ_02_USB, IDX_00_USB_CTRL,
+						USB_CTRL_ISO_ENABLE);
+		setbrightness(gspca_dev);
+	}
+	return gspca_dev->usb_err;
 }
 
 static void sd_stopN(struct gspca_dev *gspca_dev)
 {
+	struct sd *sd = (struct sd *) gspca_dev;
+
 	/* Disable ISO packet machine */
-	reg_write(gspca_dev->dev, 0x02, 0x00, 0x00);
+	reg_w_riv(gspca_dev, REQ_02_USB, IDX_00_USB_CTRL, 0x00);
+	if (sd->subtype == ST_GRABBER) {
+		reg_w(gspca_dev, REQ_03_GLOBAL, 0x00, 0x0004);
+		reg_w(gspca_dev, REQ_03_GLOBAL, 0x00, IDX_03_GLOBAL_MISC3);
+	}
 }
 
 /* called on streamoff with alt 0 and on disconnect */
 static void sd_stop0(struct gspca_dev *gspca_dev)
 {
+	struct sd *sd = (struct sd *) gspca_dev;
+
 	if (!gspca_dev->present)
 		return;
+	if (sd->subtype == ST_GRABBER)
+		return;
 
 	/* This maybe reset or power control */
-	reg_write(gspca_dev->dev, 0x03, 0x03, 0x20);
-	reg_write(gspca_dev->dev, 0x03, 0x01, 0x00);
-	reg_write(gspca_dev->dev, 0x03, 0x00, 0x01);
-	reg_write(gspca_dev->dev, 0x05, 0x10, 0x01);
-	reg_write(gspca_dev->dev, 0x05, 0x11, 0x0f);
+	reg_w_riv(gspca_dev, REQ_03_GLOBAL, IDX_03_GLOBAL_MISC3,
+						GLOBAL_MISC3_SAA7113RST);
+	reg_w_riv(gspca_dev, REQ_03_GLOBAL, IDX_01_GLOBAL_MISC1,
+						0x00);
+	reg_w_riv(gspca_dev, REQ_03_GLOBAL, IDX_00_GLOBAL_MISC0,
+						GLOBAL_MISC0_IDSEL);
+	reg_w_riv(gspca_dev, 0x05, 0x10, 0x01);
+	reg_w_riv(gspca_dev, 0x05, 0x11, 0x0f);
 }
 
 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
@@ -754,42 +1210,57 @@
 	}
 }
 
-static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
+static void sd_set_misc(struct gspca_dev *gspca_dev,
+			int idx)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
+	int i;
 
-	sd->brightness = val;
-	if (gspca_dev->streaming)
-		setbrightness(gspca_dev);
-	return 0;
-}
-
-static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val)
-{
-	struct sd *sd = (struct sd *) gspca_dev;
-
-	*val = sd->brightness;
-	return 0;
+	switch (idx) {
+	case MISC_INPUT:
+		i = gspca_dev->curr_input;
+		if (sd->subtype == ST_GRABBER)
+			i++;		/* (no webcam) */
+		gspca_dev->cam.std = sd_inputs[i].std;
+		if (gspca_dev->cam.std == 0)
+			gspca_dev->curr_std = 0;
+		else if (gspca_dev->curr_std == 0)
+			gspca_dev->curr_std = V4L2_STD_PAL;
+		/* fall thru */
+	case MISC_STD:
+
+		/* don't change input or standard while streaming */
+		if (gspca_dev->streaming)
+			break;
+		setinputstd(gspca_dev);
+		break;
+	default:
+		gspca_dev->usb_err = -EINVAL;
+		break;
+	}
 }
 
 /* sub-driver description */
 static const struct sd_desc sd_desc = {
 	.name = MODULE_NAME,
 	.ctrls = sd_ctrls,
-	.nctrls = ARRAY_SIZE(sd_ctrls),
+	.nctrls = NCTRLS,
 	.config = sd_config,
 	.init = sd_init,
 	.start = sd_start,
 	.stopN = sd_stopN,
 	.stop0 = sd_stop0,
 	.pkt_scan = sd_pkt_scan,
+	.set_misc = sd_set_misc,
 };
 
 /* -- module initialisation -- */
 static const struct usb_device_id device_table[] = {
 	{USB_DEVICE(0x041e, 0x401d), .driver_info = Nxultra},
+	{USB_DEVICE(0x06e1, 0xa190), .driver_info = ST_GRABBER},
 	{USB_DEVICE(0x0733, 0x0430), .driver_info = IntelPCCameraPro},
-/*fixme: may be UsbGrabberPV321 BRIDGE_SPCA506 SENSOR_SAA7113 */
+	{USB_DEVICE(0x0734, 0x043b), .driver_info = ST_GRABBER},
+	{USB_DEVICE(0x99fa, 0x8988), .driver_info = ST_GRABBER},
 	{}
 };
 MODULE_DEVICE_TABLE(usb, device_table);
@@ -813,15 +1284,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/spca506.c linux-3.0.82x/drivers/media/video/gspca/spca506.c
--- linux-3.0.82/drivers/media/video/gspca/spca506.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/spca506.c	2017-09-23 03:42:49.498676652 +0800
@@ -216,7 +216,7 @@
 		setbit1 = 0x02;
 	videomask = (0x48 | setbit0 | setbit1);
 	reg_w(gspca_dev->dev, 0x08, videomask, 0x0000);
-	spca506_WriteI2c(gspca_dev, (0xc0 | (channel & 0x0F)), 0x02);
+	spca506_WriteI2c(gspca_dev, (0xc0 | (channel & 0x0f)), 0x02);
 
 	if (norme & V4L2_STD_NTSC)
 		spca506_WriteI2c(gspca_dev, 0x33, 0x0e);
@@ -300,7 +300,7 @@
 	struct usb_device *dev = gspca_dev->dev;
 
 	reg_w(dev, 0x03, 0x00, 0x0004);
-	reg_w(dev, 0x03, 0xFF, 0x0003);
+	reg_w(dev, 0x03, 0xff, 0x0003);
 	reg_w(dev, 0x03, 0x00, 0x0000);
 	reg_w(dev, 0x03, 0x1c, 0x0001);
 	reg_w(dev, 0x03, 0x18, 0x0001);
@@ -325,7 +325,7 @@
 	reg_w(dev, 0x03, 0x00, 0x0004);
 	reg_w(dev, 0x03, 0x00, 0x0003);
 	reg_w(dev, 0x03, 0x00, 0x0004);
-	reg_w(dev, 0x03, 0xFF, 0x0003);
+	reg_w(dev, 0x03, 0xff, 0x0003);
 	reg_w(dev, 0x02, 0x00, 0x0000);
 	reg_w(dev, 0x03, 0x60, 0x0000);
 	reg_w(dev, 0x03, 0x18, 0x0001);
@@ -413,7 +413,7 @@
 	reg_w(dev, 0x03, 0x00, 0x0004);
 	reg_w(dev, 0x03, 0x00, 0x0003);
 	reg_w(dev, 0x03, 0x00, 0x0004);
-	reg_w(dev, 0x03, 0xFF, 0x0003);
+	reg_w(dev, 0x03, 0xff, 0x0003);
 	reg_w(dev, 0x02, 0x00, 0x0000);
 	reg_w(dev, 0x03, 0x60, 0x0000);
 	reg_w(dev, 0x03, 0x18, 0x0001);
@@ -717,17 +717,11 @@
 /* -- module insert / remove -- */
 static int __init sd_mod_init(void)
 {
-	int ret;
-	ret = usb_register(&sd_driver);
-	if (ret < 0)
-		return ret;
-	PDEBUG(D_PROBE, "registered");
-	return 0;
+	return usb_register(&sd_driver);
 }
 static void __exit sd_mod_exit(void)
 {
 	usb_deregister(&sd_driver);
-	PDEBUG(D_PROBE, "deregistered");
 }
 
 module_init(sd_mod_init);
diff -uNra linux-3.0.82/drivers/media/video/gspca/spca508.c linux-3.0.82x/drivers/media/video/gspca/spca508.c
--- linux-3.0.82/drivers/media/video/gspca/spca508.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/spca508.c	2017-09-23 03:42:49.498676652 +0800
@@ -18,6 +18,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "spca508"
 
 #include "gspca.h"
@@ -1275,7 +1277,7 @@
 	PDEBUG(D_USBO, "reg write i:0x%04x = 0x%02x",
 		index, value);
 	if (ret < 0)
-		err("reg write: error %d", ret);
+		pr_err("reg write: error %d\n", ret);
 	return ret;
 }
 
@@ -1297,7 +1299,7 @@
 	PDEBUG(D_USBI, "reg read i:%04x --> %02x",
 		index, gspca_dev->usb_buf[0]);
 	if (ret < 0) {
-		err("reg_read err %d", ret);
+		pr_err("reg_read err %d\n", ret);
 		return ret;
 	}
 	return gspca_dev->usb_buf[0];
@@ -1542,15 +1544,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/spca561.c linux-3.0.82x/drivers/media/video/gspca/spca561.c
--- linux-3.0.82/drivers/media/video/gspca/spca561.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/spca561.c	2017-09-23 03:42:49.498676652 +0800
@@ -20,6 +20,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "spca561"
 
 #include <linux/input.h>
@@ -315,7 +317,7 @@
 			      value, index, NULL, 0, 500);
 	PDEBUG(D_USBO, "reg write: 0x%02x:0x%02x", index, value);
 	if (ret < 0)
-		err("reg write: error %d", ret);
+		pr_err("reg write: error %d\n", ret);
 }
 
 static void write_vector(struct gspca_dev *gspca_dev,
@@ -449,7 +451,7 @@
 	}
 
 	cam = &gspca_dev->cam;
-	gspca_dev->nbalt = 7 + 1;	/* choose alternate 7 first */
+	cam->needs_full_bandwidth = 1;
 
 	sd->chip_revision = id->driver_info;
 	if (sd->chip_revision == Rev012A) {
@@ -1104,15 +1106,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/sq905.c linux-3.0.82x/drivers/media/video/gspca/sq905.c
--- linux-3.0.82/drivers/media/video/gspca/sq905.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/sq905.c	2017-09-23 03:42:49.510676616 +0800
@@ -33,6 +33,8 @@
  * drivers.
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "sq905"
 
 #include <linux/workqueue.h>
@@ -123,8 +125,7 @@
 			      SQ905_COMMAND, index, gspca_dev->usb_buf, 1,
 			      SQ905_CMD_TIMEOUT);
 	if (ret < 0) {
-		err("%s: usb_control_msg failed (%d)",
-			__func__, ret);
+		pr_err("%s: usb_control_msg failed (%d)\n", __func__, ret);
 		return ret;
 	}
 
@@ -135,8 +136,7 @@
 			      SQ905_PING, 0, gspca_dev->usb_buf, 1,
 			      SQ905_CMD_TIMEOUT);
 	if (ret < 0) {
-		err("%s: usb_control_msg failed 2 (%d)",
-			__func__, ret);
+		pr_err("%s: usb_control_msg failed 2 (%d)\n", __func__, ret);
 		return ret;
 	}
 
@@ -158,7 +158,7 @@
 			      SQ905_READ_DONE, 0, gspca_dev->usb_buf, 1,
 			      SQ905_CMD_TIMEOUT);
 	if (ret < 0) {
-		err("%s: usb_control_msg failed (%d)", __func__, ret);
+		pr_err("%s: usb_control_msg failed (%d)\n", __func__, ret);
 		return ret;
 	}
 
@@ -186,7 +186,7 @@
 	if (need_lock)
 		mutex_unlock(&gspca_dev->usb_lock);
 	if (ret < 0) {
-		err("%s: usb_control_msg failed (%d)", __func__, ret);
+		pr_err("%s: usb_control_msg failed (%d)\n", __func__, ret);
 		return ret;
 	}
 	ret = usb_bulk_msg(gspca_dev->dev,
@@ -195,8 +195,7 @@
 
 	/* successful, it returns 0, otherwise  negative */
 	if (ret < 0 || act_len != size) {
-		err("bulk read fail (%d) len %d/%d",
-			ret, act_len, size);
+		pr_err("bulk read fail (%d) len %d/%d\n", ret, act_len, size);
 		return -EIO;
 	}
 	return 0;
@@ -226,7 +225,7 @@
 
 	buffer = kmalloc(SQ905_MAX_TRANSFER, GFP_KERNEL | GFP_DMA);
 	if (!buffer) {
-		err("Couldn't allocate USB buffer");
+		pr_err("Couldn't allocate USB buffer\n");
 		goto quit_stream;
 	}
 
@@ -433,16 +432,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/sq905c.c linux-3.0.82x/drivers/media/video/gspca/sq905c.c
--- linux-3.0.82/drivers/media/video/gspca/sq905c.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/sq905c.c	2017-09-23 03:42:49.510676616 +0800
@@ -27,6 +27,8 @@
  * and may contain code fragments from it.
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "sq905c"
 
 #include <linux/workqueue.h>
@@ -95,8 +97,7 @@
 			      command, index, NULL, 0,
 			      SQ905C_CMD_TIMEOUT);
 	if (ret < 0) {
-		err("%s: usb_control_msg failed (%d)",
-			__func__, ret);
+		pr_err("%s: usb_control_msg failed (%d)\n", __func__, ret);
 		return ret;
 	}
 
@@ -115,8 +116,7 @@
 			      command, index, gspca_dev->usb_buf, size,
 			      SQ905C_CMD_TIMEOUT);
 	if (ret < 0) {
-		err("%s: usb_control_msg failed (%d)",
-		       __func__, ret);
+		pr_err("%s: usb_control_msg failed (%d)\n", __func__, ret);
 		return ret;
 	}
 
@@ -146,7 +146,7 @@
 
 	buffer = kmalloc(SQ905C_MAX_TRANSFER, GFP_KERNEL | GFP_DMA);
 	if (!buffer) {
-		err("Couldn't allocate USB buffer");
+		pr_err("Couldn't allocate USB buffer\n");
 		goto quit_stream;
 	}
 
@@ -339,16 +339,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/sq930x.c linux-3.0.82x/drivers/media/video/gspca/sq930x.c
--- linux-3.0.82/drivers/media/video/gspca/sq930x.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/sq930x.c	2017-09-23 03:42:49.510676616 +0800
@@ -20,12 +20,14 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "sq930x"
 
 #include "gspca.h"
 
-MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>\n"
-		"Gerard Klaver <gerard at gkall dot hobby dot nl\n"
+MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>, "
+		"Gerard Klaver <gerard at gkall dot hobby dot nl, "
 		"Sam Revitch <samr7@cs.washington.edu>");
 MODULE_DESCRIPTION("GSPCA/SQ930x USB Camera Driver");
 MODULE_LICENSE("GPL");
@@ -468,7 +470,7 @@
 			value, 0, gspca_dev->usb_buf, len,
 			500);
 	if (ret < 0) {
-		err("reg_r %04x failed %d", value, ret);
+		pr_err("reg_r %04x failed %d\n", value, ret);
 		gspca_dev->usb_err = ret;
 	}
 }
@@ -488,7 +490,7 @@
 			500);
 	msleep(30);
 	if (ret < 0) {
-		err("reg_w %04x %04x failed %d", value, index, ret);
+		pr_err("reg_w %04x %04x failed %d\n", value, index, ret);
 		gspca_dev->usb_err = ret;
 	}
 }
@@ -511,7 +513,7 @@
 			1000);
 	msleep(30);
 	if (ret < 0) {
-		err("reg_wb %04x %04x failed %d", value, index, ret);
+		pr_err("reg_wb %04x %04x failed %d\n", value, index, ret);
 		gspca_dev->usb_err = ret;
 	}
 }
@@ -556,7 +558,7 @@
 			gspca_dev->usb_buf, buf - gspca_dev->usb_buf,
 			500);
 	if (ret < 0) {
-		err("i2c_write failed %d", ret);
+		pr_err("i2c_write failed %d\n", ret);
 		gspca_dev->usb_err = ret;
 	}
 }
@@ -575,7 +577,7 @@
 
 #ifdef GSPCA_DEBUG
 	if ((batchsize - 1) * 3 > USB_BUF_SZ) {
-		err("Bug: usb_buf overflow");
+		pr_err("Bug: usb_buf overflow\n");
 		gspca_dev->usb_err = -ENOMEM;
 		return;
 	}
@@ -612,7 +614,7 @@
 				gspca_dev->usb_buf, buf - gspca_dev->usb_buf,
 				500);
 		if (ret < 0) {
-			err("ucbus_write failed %d", ret);
+			pr_err("ucbus_write failed %d\n", ret);
 			gspca_dev->usb_err = ret;
 			return;
 		}
@@ -688,7 +690,7 @@
 			break;
 	}
 	if (i >= ARRAY_SIZE(probe_order)) {
-		err("Unknown sensor");
+		pr_err("Unknown sensor\n");
 		gspca_dev->usb_err = -EINVAL;
 		return;
 	}
@@ -696,7 +698,8 @@
 	switch (sd->sensor) {
 	case SENSOR_OV7660:
 	case SENSOR_OV9630:
-		err("Sensor %s not yet treated", sensor_tb[sd->sensor].name);
+		pr_err("Sensor %s not yet treated\n",
+		       sensor_tb[sd->sensor].name);
 		gspca_dev->usb_err = -EINVAL;
 		break;
 	}
@@ -1091,7 +1094,7 @@
 	gspca_dev->cam.bulk_nurbs = 1;
 	ret = usb_submit_urb(gspca_dev->urb[0], GFP_ATOMIC);
 	if (ret < 0)
-		err("sd_dq_callback() err %d", ret);
+		pr_err("sd_dq_callback() err %d\n", ret);
 
 	/* wait a little time, otherwise the webcam crashes */
 	msleep(100);
@@ -1194,15 +1197,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/stk014.c linux-3.0.82x/drivers/media/video/gspca/stk014.c
--- linux-3.0.82/drivers/media/video/gspca/stk014.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/stk014.c	2017-09-23 03:42:49.514676604 +0800
@@ -18,7 +18,7 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
 
-#define MODULE_NAME "stk014"
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 
 #include "gspca.h"
 #include "jpeg.h"
@@ -137,7 +137,7 @@
 			gspca_dev->usb_buf, 1,
 			500);
 	if (ret < 0) {
-		err("reg_r err %d", ret);
+		pr_err("reg_r err %d\n", ret);
 		gspca_dev->usb_err = ret;
 		return 0;
 	}
@@ -162,7 +162,7 @@
 			0,
 			500);
 	if (ret < 0) {
-		err("reg_w err %d", ret);
+		pr_err("reg_w err %d\n", ret);
 		gspca_dev->usb_err = ret;
 	}
 }
@@ -192,7 +192,7 @@
 			&alen,
 			500);		/* timeout in milliseconds */
 	if (ret < 0) {
-		err("rcv_val err %d", ret);
+		pr_err("rcv_val err %d\n", ret);
 		gspca_dev->usb_err = ret;
 	}
 }
@@ -235,7 +235,7 @@
 			&alen,
 			500);	/* timeout in milliseconds */
 	if (ret < 0) {
-		err("snd_val err %d", ret);
+		pr_err("snd_val err %d\n", ret);
 		gspca_dev->usb_err = ret;
 	} else {
 		if (ads == 0x003f08) {
@@ -315,7 +315,7 @@
 	ret = reg_r(gspca_dev, 0x0740);
 	if (gspca_dev->usb_err >= 0) {
 		if (ret != 0xff) {
-			err("init reg: 0x%02x", ret);
+			pr_err("init reg: 0x%02x\n", ret);
 			gspca_dev->usb_err = -EIO;
 		}
 	}
@@ -349,12 +349,12 @@
 					gspca_dev->iface,
 					gspca_dev->alt);
 	if (ret < 0) {
-		err("set intf %d %d failed",
-			gspca_dev->iface, gspca_dev->alt);
+		pr_err("set intf %d %d failed\n",
+		       gspca_dev->iface, gspca_dev->alt);
 		gspca_dev->usb_err = ret;
 		goto out;
 	}
-	 reg_r(gspca_dev, 0x0630);
+	reg_r(gspca_dev, 0x0630);
 	rcv_val(gspca_dev, 0x000020);	/* << (value ff ff ff ff) */
 	reg_r(gspca_dev, 0x0650);
 	snd_val(gspca_dev, 0x000020, 0xffffffff);
@@ -478,7 +478,7 @@
 
 /* sub-driver description */
 static const struct sd_desc sd_desc = {
-	.name = MODULE_NAME,
+	.name = KBUILD_MODNAME,
 	.ctrls = sd_ctrls,
 	.nctrls = NCTRLS,
 	.config = sd_config,
@@ -507,7 +507,7 @@
 }
 
 static struct usb_driver sd_driver = {
-	.name = MODULE_NAME,
+	.name = KBUILD_MODNAME,
 	.id_table = device_table,
 	.probe = sd_probe,
 	.disconnect = gspca_disconnect,
@@ -517,15 +517,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/stv0680.c linux-3.0.82x/drivers/media/video/gspca/stv0680.c
--- linux-3.0.82/drivers/media/video/gspca/stv0680.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/stv0680.c	2017-09-23 03:42:49.514676604 +0800
@@ -27,6 +27,8 @@
  *
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "stv0680"
 
 #include "gspca.h"
@@ -79,7 +81,7 @@
 			      val, 0, gspca_dev->usb_buf, size, 500);
 
 	if ((ret < 0) && (req != 0x0a))
-		err("usb_control_msg error %i, request = 0x%x, error = %i",
+		pr_err("usb_control_msg error %i, request = 0x%x, error = %i\n",
 		       set, req, ret);
 
 	return ret;
@@ -236,7 +238,7 @@
 
 	if (stv_sndctrl(gspca_dev, 2, 0x06, 0x0100, 0x12) != 0x12 ||
 	    gspca_dev->usb_buf[8] != 0x53 || gspca_dev->usb_buf[9] != 0x05) {
-		err("Could not get descriptor 0100.");
+		pr_err("Could not get descriptor 0100\n");
 		return stv0680_handle_error(gspca_dev, -EIO);
 	}
 
@@ -353,15 +355,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/stv06xx/stv06xx.c linux-3.0.82x/drivers/media/video/gspca/stv06xx/stv06xx.c
--- linux-3.0.82/drivers/media/video/gspca/stv06xx/stv06xx.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/stv06xx/stv06xx.c	2017-09-23 03:42:49.514676604 +0800
@@ -27,6 +27,8 @@
  * P/N 861040-0000: Sensor ST VV6410       ASIC STV0610   - QuickCam Web
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #include <linux/input.h>
 #include "stv06xx_sensor.h"
 
@@ -34,8 +36,8 @@
 MODULE_DESCRIPTION("STV06XX USB Camera Driver");
 MODULE_LICENSE("GPL");
 
-static int dump_bridge;
-static int dump_sensor;
+static bool dump_bridge;
+static bool dump_sensor;
 
 int stv06xx_write_bridge(struct sd *sd, u16 address, u16 i2c_data)
 {
@@ -51,9 +53,6 @@
 			      0x04, 0x40, address, 0, buf, len,
 			      STV06XX_URB_MSG_TIMEOUT);
 
-	PDEBUG(D_CONF, "Written 0x%x to address 0x%x, status: %d",
-	       i2c_data, address, err);
-
 	return (err < 0) ? err : 0;
 }
 
@@ -69,9 +68,6 @@
 
 	*i2c_data = buf[0];
 
-	PDEBUG(D_CONF, "Reading 0x%x from address 0x%x, status %d",
-	       *i2c_data, address, err);
-
 	return (err < 0) ? err : 0;
 }
 
@@ -149,8 +145,6 @@
 			buf[j] = data[2*i];
 			buf[0x10 + j * 2] = data[2*i+1];
 			buf[0x10 + j * 2 + 1] = data[2*i+1] >> 8;
-			PDEBUG(D_CONF, "I2C: Writing 0x%04x to reg 0x%02x",
-				data[2*i+1], data[2*i]);
 		}
 		buf[0x20] = sd->sensor->i2c_addr;
 		buf[0x21] = j - 1; /* Number of commands to send - 1 */
@@ -189,7 +183,7 @@
 			      0x04, 0x40, 0x1400, 0, buf, I2C_BUFFER_LENGTH,
 			      STV06XX_URB_MSG_TIMEOUT);
 	if (err < 0) {
-		err("I2C: Read error writing address: %d", err);
+		pr_err("I2C: Read error writing address: %d\n", err);
 		return err;
 	}
 
@@ -201,9 +195,6 @@
 	else
 		*value = buf[0];
 
-	PDEBUG(D_CONF, "I2C: Read 0x%x from address 0x%x, status: %d",
-	       *value, address, err);
-
 	return (err < 0) ? err : 0;
 }
 
@@ -213,14 +204,14 @@
 	int i;
 	u8 data, buf;
 
-	info("Dumping all stv06xx bridge registers");
+	pr_info("Dumping all stv06xx bridge registers\n");
 	for (i = 0x1400; i < 0x160f; i++) {
 		stv06xx_read_bridge(sd, i, &data);
 
-		info("Read 0x%x from address 0x%x", data, i);
+		pr_info("Read 0x%x from address 0x%x\n", data, i);
 	}
 
-	info("Testing stv06xx bridge registers for writability");
+	pr_info("Testing stv06xx bridge registers for writability\n");
 	for (i = 0x1400; i < 0x160f; i++) {
 		stv06xx_read_bridge(sd, i, &data);
 		buf = data;
@@ -228,12 +219,12 @@
 		stv06xx_write_bridge(sd, i, 0xff);
 		stv06xx_read_bridge(sd, i, &data);
 		if (data == 0xff)
-			info("Register 0x%x is read/write", i);
+			pr_info("Register 0x%x is read/write\n", i);
 		else if (data != buf)
-			info("Register 0x%x is read/write,"
-			     " but only partially", i);
+			pr_info("Register 0x%x is read/write, but only partially\n",
+				i);
 		else
-			info("Register 0x%x is read-only", i);
+			pr_info("Register 0x%x is read-only\n", i);
 
 		stv06xx_write_bridge(sd, i, buf);
 	}
@@ -245,8 +236,6 @@
 	struct sd *sd = (struct sd *) gspca_dev;
 	int err;
 
-	PDEBUG(D_PROBE, "Initializing camera");
-
 	/* Let the usb init settle for a bit
 	   before performing the initialization */
 	msleep(250);
@@ -270,7 +259,7 @@
 	intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
 	alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
 	if (!alt) {
-		PDEBUG(D_ERR, "Couldn't get altsetting");
+		pr_err("Couldn't get altsetting\n");
 		return -EIO;
 	}
 
@@ -288,11 +277,6 @@
 	err = stv06xx_write_bridge(sd, STV_ISO_ENABLE, 1);
 
 out:
-	if (err < 0)
-		PDEBUG(D_STREAM, "Starting stream failed");
-	else
-		PDEBUG(D_STREAM, "Started streaming");
-
 	return (err < 0) ? err : 0;
 }
 
@@ -302,7 +286,7 @@
 	struct sd *sd = (struct sd *) gspca_dev;
 
 	/* Start isoc bandwidth "negotiation" at max isoc bandwidth */
-	alt = &gspca_dev->dev->config->intf_cache[0]->altsetting[1];
+	alt = &gspca_dev->dev->actconfig->intf_cache[0]->altsetting[1];
 	alt->endpoint[0].desc.wMaxPacketSize =
 		cpu_to_le16(sd->sensor->max_packet_size[gspca_dev->curr_mode]);
 
@@ -315,7 +299,7 @@
 	struct usb_host_interface *alt;
 	struct sd *sd = (struct sd *) gspca_dev;
 
-	alt = &gspca_dev->dev->config->intf_cache[0]->altsetting[1];
+	alt = &gspca_dev->dev->actconfig->intf_cache[0]->altsetting[1];
 	packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
 	min_packet_size = sd->sensor->min_packet_size[gspca_dev->curr_mode];
 	if (packet_size <= min_packet_size)
@@ -328,7 +312,7 @@
 
 	ret = usb_set_interface(gspca_dev->dev, gspca_dev->iface, 1);
 	if (ret < 0)
-		PDEBUG(D_ERR|D_STREAM, "set alt 1 err %d", ret);
+		pr_err("set alt 1 err %d\n", ret);
 
 	return ret;
 }
@@ -340,16 +324,8 @@
 
 	/* stop ISO-streaming */
 	err = stv06xx_write_bridge(sd, STV_ISO_ENABLE, 0);
-	if (err < 0)
-		goto out;
-
-	err = sd->sensor->stop(sd);
-
-out:
-	if (err < 0)
-		PDEBUG(D_STREAM, "Failed to stop stream");
-	else
-		PDEBUG(D_STREAM, "Stopped streaming");
+	if (err >= 0)
+		sd->sensor->stop(sd);
 }
 
 /*
@@ -370,8 +346,6 @@
 {
 	struct sd *sd = (struct sd *) gspca_dev;
 
-	PDEBUG(D_PACK, "Packet of length %d arrived", len);
-
 	/* A packet may contain several frames
 	   loop until the whole packet is reached */
 	while (len) {
@@ -399,14 +373,9 @@
 			return;
 		}
 
-		/* First byte seem to be 02=data 2nd byte is unknown??? */
-		if (sd->bridge == BRIDGE_ST6422 && (id & 0xff00) == 0x0200)
-			goto frame_data;
-
 		switch (id) {
 		case 0x0200:
 		case 0x4200:
-frame_data:
 			PDEBUG(D_PACK, "Frame data packet detected");
 
 			if (sd->to_skip) {
@@ -431,10 +400,6 @@
 			/* Create a new frame, chunk length should be zero */
 			gspca_frame_add(gspca_dev, FIRST_PACKET,
 					NULL, 0);
-
-			if (sd->bridge == BRIDGE_ST6422)
-				sd->to_skip = gspca_dev->width * 4;
-
 			if (chunk_len)
 				PDEBUG(D_ERR, "Chunk length is "
 					      "non-zero on a SOF");
@@ -466,10 +431,6 @@
 			/* Unknown chunk with 2 bytes of data,
 			   occurs 2-3 times per USB interrupt */
 			break;
-		case 0x42ff:
-			PDEBUG(D_PACK, "Chunk 0x42ff detected");
-			/* Special chunk seen sometimes on the ST6422 */
-			break;
 		default:
 			PDEBUG(D_PACK, "Unknown chunk 0x%04x detected", id);
 			/* Unknown chunk */
@@ -526,8 +487,6 @@
 {
 	struct sd *sd = (struct sd *) gspca_dev;
 
-	PDEBUG(D_PROBE, "Configuring camera");
-
 	sd->desc = sd_desc;
 	sd->bridge = id->driver_info;
 	gspca_dev->sd_desc = &sd->desc;
@@ -555,7 +514,6 @@
 	if (!sd->sensor->probe(sd))
 		return 0;
 
-	sd->sensor = NULL;
 	return -ENODEV;
 }
 
@@ -570,11 +528,11 @@
 	/* Dexxa WebCam USB */
 	{USB_DEVICE(0x046d, 0x0870), .driver_info = BRIDGE_STV602 },
 	/* QuickCam Messenger */
-	{USB_DEVICE(0x046D, 0x08F0), .driver_info = BRIDGE_ST6422 },
+	{USB_DEVICE(0x046D, 0x08f0), .driver_info = BRIDGE_ST6422 },
 	/* QuickCam Communicate */
-	{USB_DEVICE(0x046D, 0x08F5), .driver_info = BRIDGE_ST6422 },
+	{USB_DEVICE(0x046D, 0x08f5), .driver_info = BRIDGE_ST6422 },
 	/* QuickCam Messenger (new) */
-	{USB_DEVICE(0x046D, 0x08F6), .driver_info = BRIDGE_ST6422 },
+	{USB_DEVICE(0x046D, 0x08f6), .driver_info = BRIDGE_ST6422 },
 	{}
 };
 MODULE_DEVICE_TABLE(usb, device_table);
@@ -583,7 +541,6 @@
 static int sd_probe(struct usb_interface *intf,
 			const struct usb_device_id *id)
 {
-	PDEBUG(D_PROBE, "Probing for a stv06xx device");
 	return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
 			       THIS_MODULE);
 }
@@ -592,7 +549,6 @@
 {
 	struct gspca_dev *gspca_dev = usb_get_intfdata(intf);
 	struct sd *sd = (struct sd *) gspca_dev;
-	PDEBUG(D_PROBE, "Disconnecting the stv06xx device");
 
 	if (sd->sensor->disconnect)
 		sd->sensor->disconnect(sd);
@@ -610,18 +566,7 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
 
 module_param(dump_bridge, bool, S_IRUGO | S_IWUSR);
 MODULE_PARM_DESC(dump_bridge, "Dumps all usb bridge registers at startup");
diff -uNra linux-3.0.82/drivers/media/video/gspca/stv06xx/stv06xx.h linux-3.0.82x/drivers/media/video/gspca/stv06xx/stv06xx.h
--- linux-3.0.82/drivers/media/video/gspca/stv06xx/stv06xx.h	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/stv06xx/stv06xx.h	2017-09-23 03:42:49.514676604 +0800
@@ -37,6 +37,8 @@
 
 #define STV_ISOC_ENDPOINT_ADDR		0x81
 
+#define STV_R                           0x0509
+
 #define STV_REG23			0x0423
 
 /* Control registers of the STV0600 ASIC */
@@ -61,7 +63,9 @@
 
 /* Refers to the CIF 352x288 and QCIF 176x144 */
 /* 1: 288 lines, 2: 144 lines */
-#define STV_Y_CTRL			0x15c3
+#define STV_Y_CTRL		        0x15c3
+
+#define STV_RESET                       0x1620
 
 /* 0xa: 352 columns, 0x6: 176 columns */
 #define STV_X_CTRL			0x1680
diff -uNra linux-3.0.82/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.c linux-3.0.82x/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.c
--- linux-3.0.82/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.c	2017-09-23 03:42:49.514676604 +0800
@@ -28,6 +28,8 @@
  * P/N 861040-0000: Sensor ST VV6410       ASIC STV0610   - QuickCam Web
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #include "stv06xx_hdcs.h"
 
 static const struct ctrl hdcs1x00_ctrl[] = {
@@ -428,7 +430,7 @@
 	if (ret < 0 || sensor != 0x08)
 		return -ENODEV;
 
-	info("HDCS-1000/1100 sensor detected");
+	pr_info("HDCS-1000/1100 sensor detected\n");
 
 	sd->gspca_dev.cam.cam_mode = hdcs1x00_mode;
 	sd->gspca_dev.cam.nmodes = ARRAY_SIZE(hdcs1x00_mode);
@@ -487,7 +489,7 @@
 	if (ret < 0 || sensor != 0x10)
 		return -ENODEV;
 
-	info("HDCS-1020 sensor detected");
+	pr_info("HDCS-1020 sensor detected\n");
 
 	sd->gspca_dev.cam.cam_mode = hdcs1020_mode;
 	sd->gspca_dev.cam.nmodes = ARRAY_SIZE(hdcs1020_mode);
@@ -601,11 +603,11 @@
 {
 	u16 reg, val;
 
-	info("Dumping sensor registers:");
+	pr_info("Dumping sensor registers:\n");
 
 	for (reg = HDCS_IDENT; reg <= HDCS_ROWEXPH; reg++) {
 		stv06xx_read_sensor(sd, reg, &val);
-		info("reg 0x%02x = 0x%02x", reg, val);
+		pr_info("reg 0x%02x = 0x%02x\n", reg, val);
 	}
 	return 0;
 }
diff -uNra linux-3.0.82/drivers/media/video/gspca/stv06xx/stv06xx_pb0100.c linux-3.0.82x/drivers/media/video/gspca/stv06xx/stv06xx_pb0100.c
--- linux-3.0.82/drivers/media/video/gspca/stv06xx/stv06xx_pb0100.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/stv06xx/stv06xx_pb0100.c	2017-09-23 03:42:49.514676604 +0800
@@ -44,6 +44,8 @@
  * PB_CFILLIN       = R5  = 0x0E (14 dec)     : Sets the frame rate
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #include "stv06xx_pb0100.h"
 
 static const struct ctrl pb0100_ctrl[] = {
@@ -190,7 +192,7 @@
 		if (!sensor_settings)
 			return -ENOMEM;
 
-		info("Photobit pb0100 sensor detected");
+		pr_info("Photobit pb0100 sensor detected\n");
 
 		sd->gspca_dev.cam.cam_mode = pb0100_mode;
 		sd->gspca_dev.cam.nmodes = ARRAY_SIZE(pb0100_mode);
diff -uNra linux-3.0.82/drivers/media/video/gspca/stv06xx/stv06xx_st6422.c linux-3.0.82x/drivers/media/video/gspca/stv06xx/stv06xx_st6422.c
--- linux-3.0.82/drivers/media/video/gspca/stv06xx/stv06xx_st6422.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/stv06xx/stv06xx_st6422.c	2017-09-23 03:42:49.518676591 +0800
@@ -26,6 +26,8 @@
  *
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #include "stv06xx_st6422.h"
 
 /* controls */
@@ -42,6 +44,10 @@
 	struct gspca_ctrl ctrls[NCTRLS];
 };
 
+static void st6422_pkt_scan(struct gspca_dev *gspca_dev,
+			u8 *data,
+			int len);
+
 static struct v4l2_pix_format st6422_mode[] = {
 	/* Note we actually get 124 lines of data, of which we skip the 4st
 	   4 as they are garbage */
@@ -136,7 +142,7 @@
 	if (sd->bridge != BRIDGE_ST6422)
 		return -ENODEV;
 
-	info("st6422 sensor detected");
+	pr_info("st6422 sensor detected\n");
 
 	sensor_settings = kmalloc(sizeof *sensor_settings, GFP_KERNEL);
 	if (!sensor_settings)
@@ -147,6 +153,7 @@
 	sd->gspca_dev.cam.ctrls = sensor_settings->ctrls;
 	sd->desc.ctrls = st6422_ctrl;
 	sd->desc.nctrls = ARRAY_SIZE(st6422_ctrl);
+	sd->desc.pkt_scan = st6422_pkt_scan;
 	sd->sensor_priv = sensor_settings;
 
 	return 0;
@@ -333,8 +340,7 @@
 		return err;
 
 	/* commit settings */
-	err = stv06xx_write_bridge(sd, 0x143f, 0x01);
-	return (err < 0) ? err : 0;
+	return stv06xx_write_bridge(sd, 0x143f, 0x01);
 }
 
 static int st6422_stop(struct sd *sd)
@@ -344,6 +350,79 @@
 	return 0;
 }
 
+static void st6422_pkt_scan(struct gspca_dev *gspca_dev,
+			u8 *data,
+			int len)
+{
+	struct sd *sd = (struct sd *) gspca_dev;
+	int id, chunk_len, skip;
+
+	/* A packet may contain several frames
+	   loop until the whole packet is reached */
+	while (len) {
+		if (len < 4) {
+			PDEBUG(D_PACK, "Packet is smaller than 4 bytes");
+			return;
+		}
+
+		/* Capture the id */
+		id = (data[0] << 8) | data[1];
+
+		/* Capture the chunk length */
+		chunk_len = (data[2] << 8) | data[3];
+		PDEBUG(D_PACK, "Chunk id: %04x, length: %04x", id, chunk_len);
+
+		data += 4;
+		len -= 4;
+
+		if (len < chunk_len) {
+			PDEBUG(D_ERR, "URB packet length is smaller"
+				" than the specified chunk length");
+			gspca_dev->last_packet_type = DISCARD_PACKET;
+			return;
+		}
+
+		switch (id >> 8) {
+		case 0x02:
+			if (sd->to_skip) {
+				skip = sd->to_skip < chunk_len ?
+						sd->to_skip : chunk_len;
+				data += skip;
+				len -= skip;
+				chunk_len -= skip;
+				sd->to_skip -= skip;
+			}
+			gspca_frame_add(gspca_dev, INTER_PACKET,
+					data, chunk_len);
+			break;
+		case 0x80:
+		case 0xc0:
+			if (id & 0x0001) {
+
+				/* start a new frame,
+				 * chunk length should be zero */
+				gspca_frame_add(gspca_dev, FIRST_PACKET,
+					NULL, 0);
+
+				sd->to_skip = gspca_dev->width * 4;
+				break;
+			}
+
+			/* End of frame detected */
+			gspca_frame_add(gspca_dev, LAST_PACKET,
+					NULL, 0);
+			break;
+		case 0x42:	/* chunk 42ff ignored */
+			break;
+		default:
+			PDEBUG(D_PACK, "Unknown chunk 0x%04x detected", id);
+			/* Unknown chunk */
+		}
+		data    += chunk_len;
+		len     -= chunk_len;
+	}
+}
+
 static void st6422_set_brightness(struct gspca_dev *gspca_dev)
 {
 	int err;
diff -uNra linux-3.0.82/drivers/media/video/gspca/stv06xx/stv06xx_vv6410.c linux-3.0.82x/drivers/media/video/gspca/stv06xx/stv06xx_vv6410.c
--- linux-3.0.82/drivers/media/video/gspca/stv06xx/stv06xx_vv6410.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/stv06xx/stv06xx_vv6410.c	2017-09-23 03:42:49.518676591 +0800
@@ -27,6 +27,8 @@
  * P/N 861040-0000: Sensor ST VV6410       ASIC STV0610   - QuickCam Web
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #include "stv06xx_vv6410.h"
 
 static struct v4l2_pix_format vv6410_mode[] = {
@@ -112,7 +114,7 @@
 		return -ENODEV;
 
 	if (data == 0x19) {
-		info("vv6410 sensor detected");
+		pr_info("vv6410 sensor detected\n");
 
 		sensor_settings = kmalloc(ARRAY_SIZE(vv6410_ctrl) * sizeof(s32),
 					  GFP_KERNEL);
@@ -138,18 +140,7 @@
 	s32 *sensor_settings = sd->sensor_priv;
 
 	for (i = 0; i < ARRAY_SIZE(stv_bridge_init); i++) {
-		/* if NULL then len contains single value */
-		if (stv_bridge_init[i].data == NULL) {
-			err = stv06xx_write_bridge(sd,
-				stv_bridge_init[i].start,
-				stv_bridge_init[i].len);
-		} else {
-			int j;
-			for (j = 0; j < stv_bridge_init[i].len; j++)
-				err = stv06xx_write_bridge(sd,
-					stv_bridge_init[i].start + j,
-					stv_bridge_init[i].data[j]);
-		}
+		stv06xx_write_bridge(sd, stv_bridge_init[i].addr, stv_bridge_init[i].data);
 	}
 
 	if (err < 0)
@@ -183,15 +174,6 @@
 	struct cam *cam = &sd->gspca_dev.cam;
 	u32 priv = cam->cam_mode[sd->gspca_dev.curr_mode].priv;
 
-	if (priv & VV6410_CROP_TO_QVGA) {
-		PDEBUG(D_CONF, "Cropping to QVGA");
-		stv06xx_write_sensor(sd, VV6410_XENDH, 320 - 1);
-		stv06xx_write_sensor(sd, VV6410_YENDH, 240 - 1);
-	} else {
-		stv06xx_write_sensor(sd, VV6410_XENDH, 360 - 1);
-		stv06xx_write_sensor(sd, VV6410_YENDH, 294 - 1);
-	}
-
 	if (priv & VV6410_SUBSAMPLE) {
 		PDEBUG(D_CONF, "Enabling subsampling");
 		stv06xx_write_bridge(sd, STV_Y_CTRL, 0x02);
@@ -201,8 +183,8 @@
 	} else {
 		stv06xx_write_bridge(sd, STV_Y_CTRL, 0x01);
 		stv06xx_write_bridge(sd, STV_X_CTRL, 0x0a);
+		stv06xx_write_bridge(sd, STV_SCAN_RATE, 0x00);
 
-		stv06xx_write_bridge(sd, STV_SCAN_RATE, 0x20);
 	}
 
 	/* Turn on LED */
@@ -242,11 +224,11 @@
 	u8 i;
 	int err = 0;
 
-	info("Dumping all vv6410 sensor registers");
+	pr_info("Dumping all vv6410 sensor registers\n");
 	for (i = 0; i < 0xff && !err; i++) {
 		u16 data;
 		err = stv06xx_read_sensor(sd, i, &data);
-		info("Register 0x%x contained 0x%x", i, data);
+		pr_info("Register 0x%x contained 0x%x\n", i, data);
 	}
 	return (err < 0) ? err : 0;
 }
diff -uNra linux-3.0.82/drivers/media/video/gspca/stv06xx/stv06xx_vv6410.h linux-3.0.82x/drivers/media/video/gspca/stv06xx/stv06xx_vv6410.h
--- linux-3.0.82/drivers/media/video/gspca/stv06xx/stv06xx_vv6410.h	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/stv06xx/stv06xx_vv6410.h	2017-09-23 03:42:49.518676591 +0800
@@ -211,49 +211,49 @@
 
 /* If NULL, only single value to write, stored in len */
 struct stv_init {
-	const u8 *data;
-	u16 start;
-	u8 len;
-};
-
-static const u8 x1500[] = {	/* 0x1500 - 0x150f */
-	0x0b, 0xa7, 0xb7, 0x00, 0x00
-};
-
-static const u8 x1536[] = {	/* 0x1536 - 0x153b */
-	0x02, 0x00, 0x60, 0x01, 0x20, 0x01
+	u16 addr;
+	u8 data;
 };
 
 static const struct stv_init stv_bridge_init[] = {
 	/* This reg is written twice. Some kind of reset? */
-	{NULL,  0x1620, 0x80},
-	{NULL,  0x1620, 0x00},
-	{NULL,  0x1443, 0x00},
-	{NULL,  0x1423, 0x04},
-	{x1500, 0x1500, ARRAY_SIZE(x1500)},
-	{x1536, 0x1536, ARRAY_SIZE(x1536)},
+	{STV_RESET, 0x80},
+	{STV_RESET, 0x00},
+	{STV_SCAN_RATE, 0x00},
+	{STV_I2C_FLUSH, 0x04},
+	{STV_REG00, 0x0b},
+	{STV_REG01, 0xa7},
+	{STV_REG02, 0xb7},
+	{STV_REG03, 0x00},
+	{STV_REG04, 0x00},
+	{0x1536, 0x02},
+	{0x1537, 0x00},
+	{0x1538, 0x60},
+	{0x1539, 0x01},
+	{0x153a, 0x20},
+	{0x153b, 0x01},
 };
 
 static const u8 vv6410_sensor_init[][2] = {
 	/* Setup registers */
-	{VV6410_SETUP0,		VV6410_SOFT_RESET},
-	{VV6410_SETUP0,		VV6410_LOW_POWER_MODE},
+	{VV6410_SETUP0,	VV6410_SOFT_RESET},
+	{VV6410_SETUP0,	VV6410_LOW_POWER_MODE},
 	/* Use shuffled read-out mode */
-	{VV6410_SETUP1,		BIT(6)},
-	/* All modes to 1 */
-	{VV6410_FGMODES,	BIT(6) | BIT(4) | BIT(2) | BIT(0)},
-	{VV6410_PINMAPPING,	0x00},
+	{VV6410_SETUP1,	BIT(6)},
+	/* All modes to 1, FST, Fast QCK, Free running QCK, Free running LST, FST will qualify visible pixels */
+	{VV6410_FGMODES, BIT(6) | BIT(4) | BIT(2) | BIT(0)},
+	{VV6410_PINMAPPING, 0x00},
 	/* Pre-clock generator divide off */
-	{VV6410_DATAFORMAT,	BIT(7) | BIT(0)},
+	{VV6410_DATAFORMAT, BIT(7) | BIT(0)},
 
-	{VV6410_CLKDIV,		VV6410_CLK_DIV_2},
+	{VV6410_CLKDIV,	VV6410_CLK_DIV_2},
 
 	/* System registers */
 	/* Enable voltage doubler */
-	{VV6410_AS0,		BIT(6) | BIT(4) | BIT(3) | BIT(2) | BIT(1)},
-	{VV6410_AT0,		0x00},
+	{VV6410_AS0, BIT(6) | BIT(4) | BIT(3) | BIT(2) | BIT(1)},
+	{VV6410_AT0, 0x00},
 	/* Power up audio, differential */
-	{VV6410_AT1,		BIT(4)|BIT(0)},
+	{VV6410_AT1, BIT(4) | BIT(0)},
 };
 
 #endif
diff -uNra linux-3.0.82/drivers/media/video/gspca/sunplus.c linux-3.0.82x/drivers/media/video/gspca/sunplus.c
--- linux-3.0.82/drivers/media/video/gspca/sunplus.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/sunplus.c	2017-09-23 03:42:49.518676591 +0800
@@ -19,6 +19,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "sunplus"
 
 #include "gspca.h"
@@ -247,7 +249,6 @@
 	{0x30, 0x0004, 0x000a},
 	{0xb0, 0x0001, 0x0000},
 
-
 	{0xa1, 0x0080, 0x0001},
 	{0x30, 0x0049, 0x0000},
 	{0x30, 0x0060, 0x0005},
@@ -256,8 +257,6 @@
 	{0x00, 0x0000, 0x2000},
 	{0x00, 0x0013, 0x2301},
 	{0x00, 0x0003, 0x2000},
-	{0x00, 0x0000, 0x2000},
-
 };
 
 /* clicksmart 420 open data ? */
@@ -328,7 +327,7 @@
 
 #ifdef GSPCA_DEBUG
 	if (len > USB_BUF_SZ) {
-		err("reg_r: buffer overflow");
+		pr_err("reg_r: buffer overflow\n");
 		return;
 	}
 #endif
@@ -343,7 +342,7 @@
 			len ? gspca_dev->usb_buf : NULL, len,
 			500);
 	if (ret < 0) {
-		err("reg_r err %d", ret);
+		pr_err("reg_r err %d\n", ret);
 		gspca_dev->usb_err = ret;
 	}
 }
@@ -368,7 +367,7 @@
 			gspca_dev->usb_buf, 1,
 			500);
 	if (ret < 0) {
-		err("reg_w_1 err %d", ret);
+		pr_err("reg_w_1 err %d\n", ret);
 		gspca_dev->usb_err = ret;
 	}
 }
@@ -388,7 +387,7 @@
 			USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 			value, index, NULL, 0, 500);
 	if (ret < 0) {
-		err("reg_w_riv err %d", ret);
+		pr_err("reg_w_riv err %d\n", ret);
 		gspca_dev->usb_err = ret;
 		return;
 	}
@@ -1212,15 +1211,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/t613.c linux-3.0.82x/drivers/media/video/gspca/t613.c
--- linux-3.0.82/drivers/media/video/gspca/t613.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/t613.c	2017-09-23 03:42:49.518676591 +0800
@@ -26,8 +26,11 @@
  *			Costantino Leandro
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "t613"
 
+#include <linux/input.h>
 #include <linux/slab.h>
 #include "gspca.h"
 
@@ -55,6 +58,7 @@
 	u8 effect;
 
 	u8 sensor;
+	u8 button_pressed;
 };
 enum sensors {
 	SENSOR_OM6802,
@@ -572,7 +576,7 @@
 
 		tmpbuf = kmemdup(buffer, len, GFP_KERNEL);
 		if (!tmpbuf) {
-			err("Out of memory");
+			pr_err("Out of memory\n");
 			return;
 		}
 		usb_control_msg(gspca_dev->dev,
@@ -598,7 +602,7 @@
 	} else {
 		p = tmpbuf = kmalloc(len * 2, GFP_KERNEL);
 		if (!tmpbuf) {
-			err("Out of memory");
+			pr_err("Out of memory\n");
 			return;
 		}
 	}
@@ -652,7 +656,7 @@
 	}
 	byte = reg_r(gspca_dev, 0x0063);
 	if (byte != 0x17) {
-		err("Bad sensor reset %02x", byte);
+		pr_err("Bad sensor reset %02x\n", byte);
 		/* continue? */
 	}
 
@@ -890,7 +894,7 @@
 		sd->sensor = SENSOR_OM6802;
 		break;
 	default:
-		err("unknown sensor %04x", sensor_id);
+		pr_err("unknown sensor %04x\n", sensor_id);
 		return -EINVAL;
 	}
 
@@ -905,7 +909,7 @@
 				break;		/* OK */
 		}
 		if (i < 0) {
-			err("Bad sensor reset %02x", test_byte);
+			pr_err("Bad sensor reset %02x\n", test_byte);
 			return -EIO;
 		}
 		reg_w_buf(gspca_dev, n2, sizeof n2);
@@ -996,6 +1000,7 @@
 
 /* Is this really needed?
  * i added some module parameters for test with some users */
+/*jfm: in ms-win, these messages are sent periodically*/
 static void poll_sensor(struct gspca_dev *gspca_dev)
 {
 	static const u8 poll1[] =
@@ -1093,15 +1098,35 @@
 		msleep(20);
 		reg_w(gspca_dev, 0x0309);
 	}
+#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
+	/* If the last button state is pressed, release it now! */
+	if (sd->button_pressed) {
+		input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
+		input_sync(gspca_dev->input_dev);
+		sd->button_pressed = 0;
+	}
+#endif
 }
 
 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
 			u8 *data,			/* isoc packet */
 			int len)			/* iso packet length */
 {
+	struct sd *sd = (struct sd *) gspca_dev;
 	int pkt_type;
 
 	if (data[0] == 0x5a) {
+#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
+		if (len > 20) {
+			u8 state = (data[20] & 0x80) ? 1 : 0;
+			if (sd->button_pressed != state) {
+				input_report_key(gspca_dev->input_dev,
+						 KEY_CAMERA, state);
+				input_sync(gspca_dev->input_dev);
+				sd->button_pressed = state;
+			}
+		}
+#endif
 		/* Control Packet, after this came the header again,
 		 * but extra bytes came in the packet before this,
 		 * sometimes an EOF arrives, sometimes not... */
@@ -1387,7 +1412,7 @@
 		return 0;
 	case V4L2_CID_EFFECTS:
 		if ((unsigned) menu->index < ARRAY_SIZE(effects_control)) {
-			strncpy((char *) menu->name,
+			strlcpy((char *) menu->name,
 				effects_control[menu->index],
 				sizeof menu->name);
 			return 0;
@@ -1408,6 +1433,9 @@
 	.stopN = sd_stopN,
 	.pkt_scan = sd_pkt_scan,
 	.querymenu = sd_querymenu,
+#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
+	.other_input = 1,
+#endif
 };
 
 /* -- module initialisation -- */
@@ -1436,15 +1464,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/tv8532.c linux-3.0.82x/drivers/media/video/gspca/tv8532.c
--- linux-3.0.82/drivers/media/video/gspca/tv8532.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/tv8532.c	2017-09-23 03:42:49.522676580 +0800
@@ -418,16 +418,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/vc032x.c linux-3.0.82x/drivers/media/video/gspca/vc032x.c
--- linux-3.0.82/drivers/media/video/gspca/vc032x.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/vc032x.c	2017-09-23 03:42:49.522676580 +0800
@@ -20,6 +20,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "vc032x"
 
 #include "gspca.h"
@@ -309,16 +311,23 @@
 		| (1 << GAIN_IDX) | (1 << EXPOSURE_IDX)
 		| (1 << AUTOGAIN_IDX) | (1 << BACKLIGHT_IDX),
     [SENSOR_PO3130NC] =
-	(1 << BRIGHTNESS_IDX) | (1 << CONTRAST_IDX) | (1 << COLORS_IDX)
-		| (1 << HFLIP_IDX) | (1 << VFLIP_IDX) | (1 << LIGHTFREQ_IDX)
-		| (1 << SHARPNESS_IDX)
-		| (1 << GAIN_IDX) | (1 << EXPOSURE_IDX)
-		| (1 << AUTOGAIN_IDX) | (1 << BACKLIGHT_IDX),
+//vish
+	(1 << HFLIP_IDX) | (1 << VFLIP_IDX) | (1 << LIGHTFREQ_IDX),
+//	(1 << BRIGHTNESS_IDX) | (1 << CONTRAST_IDX) | (1 << COLORS_IDX)
+//		| (1 << HFLIP_IDX) | (1 << VFLIP_IDX) | (1 << LIGHTFREQ_IDX)
+//		| (1 << SHARPNESS_IDX)
+//		| (1 << GAIN_IDX) | (1 << EXPOSURE_IDX)
+//		| (1 << AUTOGAIN_IDX) | (1 << BACKLIGHT_IDX),
     [SENSOR_POxxxx] =
 	(1 << HFLIP_IDX) | (1 << VFLIP_IDX) | (1 << LIGHTFREQ_IDX),
 };
 
 static const struct v4l2_pix_format vc0321_mode[] = {
+	{160, 120, V4L2_PIX_FMT_YVYU, V4L2_FIELD_NONE, /* poxxxx only */
+		.bytesperline = 160,
+		.sizeimage = 160 * 120 * 2,
+		.colorspace = V4L2_COLORSPACE_SRGB,
+		.priv = 2},
 	{320, 240, V4L2_PIX_FMT_YVYU, V4L2_FIELD_NONE,
 		.bytesperline = 320,
 		.sizeimage = 320 * 240 * 2,
@@ -329,6 +338,12 @@
 		.sizeimage = 640 * 480 * 2,
 		.colorspace = V4L2_COLORSPACE_SRGB,
 		.priv = 0},
+/*vish fixme: test*/
+	{1280, 1024, V4L2_PIX_FMT_YVYU, V4L2_FIELD_NONE, /* po3130nc only */
+		.bytesperline = 1280,
+		.sizeimage = 1280 * 1024 * 2,
+		.colorspace = V4L2_COLORSPACE_SRGB,
+		.priv = 3},
 };
 static const struct v4l2_pix_format vc0323_mode[] = {
 	{320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
@@ -1550,7 +1565,12 @@
 	{0xb3, 0x35, 0xf6, 0xcc},	/* i2c add: 76 */
 	{0xb3, 0x00, 0x27, 0xcc},	{0xbc, 0x00, 0x71, 0xcc},
 	{0xb8, 0x00, 0x21, 0xcc},	{0xb8, 0x27, 0x20, 0xcc},
-	{0xb8, 0x01, 0x79, 0xcc},	{0xb8, 0x81, 0x09, 0xcc},
+	{0xb8, 0x01, 0x79, 0xcc},
+#if 1 /* 2.11.17 ms-win */
+	{0xb8, 0x81, 0x01, 0xcc},
+#else
+	{0xb8, 0x81, 0x09, 0xcc},
+#endif
 	{0xb8, 0x2c, 0x50, 0xcc},	{0xb8, 0x2d, 0xf8, 0xcc},
 	{0xb8, 0x2e, 0xf8, 0xcc},	{0xb8, 0x2f, 0xf8, 0xcc},
 	{0xb8, 0x30, 0x50, 0xcc},	{0xb8, 0x31, 0xf8, 0xcc},
@@ -1605,10 +1625,29 @@
 	{0x00, 0x4c, 0x07, 0xaa},
 	{0x00, 0x4b, 0xe0, 0xaa},	{0x00, 0x4e, 0x77, 0xaa},
 	{0x00, 0x59, 0x02, 0xaa},	{0x00, 0x4d, 0x0a, 0xaa},
+#if 1 /* 2.11.17 ms-win */
+	{0x00, 0xd1, 0x00, 0xaa},
+	{0x00, 0x20, 0xc4, 0xaa},
+	{0xb3, 0x01, 0x41, 0xcc},
+#else
 /*	{0x00, 0xd1, 0x00, 0xaa},	{0x00, 0x20, 0xc4, 0xaa},
 	{0xb8, 0x8e, 0x00, 0xcc},	{0xb8, 0x8f, 0xff, 0xcc}, */
 	{0x00, 0xd1, 0x3c, 0xaa},	{0x00, 0x20, 0xc4, 0xaa},
+#endif
 	{0xb8, 0x8e, 0x00, 0xcc},	{0xb8, 0x8f, 0xff, 0xcc},
+#if 1 /* 2.11.17 ms-win */
+	{0xb9, 0x12, 0x01, 0xcc},
+	{0xb9, 0x13, 0x04, 0xcc},
+	{0xb9, 0x14, 0x0a, 0xcc},
+	{0xb9, 0x15, 0x0a, 0xcc},
+	{0xb9, 0x16, 0x0a, 0xcc},
+	{0xb9, 0x18, 0x02, 0xcc},
+	{0xb9, 0x19, 0x05, 0xcc},
+	{0xb9, 0x1a, 0x0f, 0xcc},
+	{0xb9, 0x1b, 0x0f, 0xcc},
+	{0xb9, 0x1c, 0x0f, 0xcc},
+	{0xb8, 0x81, 0x01, 0xcc},
+#else
 	{0xb8, 0xfe, 0x00, 0xcc},	{0xb8, 0xff, 0x28, 0xcc},
 	{0xb9, 0x00, 0x28, 0xcc},	{0xb9, 0x01, 0x28, 0xcc},
 	{0xb9, 0x02, 0x28, 0xcc},	{0xb9, 0x03, 0x00, 0xcc},
@@ -1616,20 +1655,26 @@
 	{0xb9, 0x06, 0x3c, 0xcc},	{0xb9, 0x07, 0x3c, 0xcc},
 	{0xb9, 0x08, 0x3c, 0xcc},	{0x00, 0x05, 0x00, 0xaa},
 	{0xb3, 0x5c, 0x00, 0xcc},	{0xb3, 0x01, 0x41, 0xcc},
+#endif
 	{}
 };
 static const u8 po3130_rundata[][4] = {
+#if 1 /* 2.11.17 ms-win - to remove when set control done*/
 	{0x00, 0x47, 0x45, 0xaa},	{0x00, 0x48, 0x9b, 0xaa},
 	{0x00, 0x49, 0x3a, 0xaa},	{0x00, 0x4a, 0x01, 0xaa},
 	{0x00, 0x44, 0x40, 0xaa},
 /*	{0x00, 0xd5, 0x7c, 0xaa}, */
 	{0x00, 0xad, 0x04, 0xaa},	{0x00, 0xae, 0x00, 0xaa},
-	{0x00, 0xb0, 0x78, 0xaa},	{0x00, 0x98, 0x02, 0xaa},
-	{0x00, 0x94, 0x25, 0xaa},	{0x00, 0x95, 0x25, 0xaa},
-	{0x00, 0x59, 0x68, 0xaa},	{0x00, 0x44, 0x20, 0xaa},
+	{0x00, 0xb0, 0x78, 0xaa},
+	{0x00, 0x98, 0x02, 0xaa},	/* brightness */
+	{0x00, 0x94, 0x25, 0xaa},	/* colors */
+	{0x00, 0x95, 0x25, 0xaa},
+	{0x00, 0x59, 0x68, 0xaa},	/* sharpness */
+	{0x00, 0x44, 0x20, 0xaa},
 	{0x00, 0x17, 0x50, 0xaa},	{0x00, 0x19, 0x50, 0xaa},
-	{0x00, 0xd1, 0x3c, 0xaa},	{0x00, 0xd1, 0x3c, 0xaa},
+	{0x00, 0xd1, 0x3c, 0xaa},	/* autogain */
 	{0x00, 0x1e, 0x06, 0xaa},	{0x00, 0x1e, 0x06, 0xaa},
+#endif
 	{}
 };
 
@@ -1648,7 +1693,12 @@
 	{0xb3, 0x34, 0x01, 0xcc},	{0xb3, 0x35, 0xf6, 0xcc},
 	{0xb3, 0x00, 0x27, 0xcc},	{0xbc, 0x00, 0xd1, 0xcc},
 	{0xb8, 0x00, 0x21, 0xcc},	{0xb8, 0x27, 0x20, 0xcc},
-	{0xb8, 0x01, 0x79, 0xcc},	{0xb8, 0x81, 0x09, 0xcc},
+	{0xb8, 0x01, 0x79, 0xcc},
+#if 1 /* 2.11.17 ms-win */
+	{0xb8, 0x81, 0x01, 0xcc},
+#else
+	{0xb8, 0x81, 0x09, 0xcc},
+#endif
 	{0xb8, 0x2c, 0x50, 0xcc},	{0xb8, 0x2d, 0xf8, 0xcc},
 	{0xb8, 0x2e, 0xf8, 0xcc},	{0xb8, 0x2f, 0xf8, 0xcc},
 	{0xb8, 0x30, 0x50, 0xcc},	{0xb8, 0x31, 0xf8, 0xcc},
@@ -1703,19 +1753,184 @@
 	{0x00, 0x4b, 0xe0, 0xaa},	{0x00, 0x4e, 0x77, 0xaa},
 	{0x00, 0x59, 0x66, 0xaa},	{0x00, 0x4d, 0x0a, 0xaa},
 	{0x00, 0xd1, 0x00, 0xaa},	{0x00, 0x20, 0xc4, 0xaa},
+#if 1 /* 2.11.17 ms-win */
+	{0xb3, 0x01, 0x41, 0xcc},
+#endif
 	{0xb8, 0x8e, 0x00, 0xcc},	{0xb8, 0x8f, 0xff, 0xcc},
+#if 1 /* 2.11.17 ms-win */
+	{0xb9, 0x12, 0x01, 0xcc},
+	{0xb9, 0x13, 0x04, 0xcc},
+	{0xb9, 0x14, 0x0a, 0xcc},
+	{0xb9, 0x15, 0x0a, 0xcc},
+	{0xb9, 0x16, 0x0a, 0xcc},
+	{0xb9, 0x18, 0x02, 0xcc},
+	{0xb9, 0x19, 0x05, 0xcc},
+	{0xb9, 0x1a, 0x0f, 0xcc},
+	{0xb9, 0x1b, 0x0f, 0xcc},
+	{0xb9, 0x1c, 0x0f, 0xcc},
+	{0xb8, 0x81, 0x01, 0xcc},
+#else
 	{0xb8, 0xfe, 0x00, 0xcc},	{0xb8, 0xff, 0x28, 0xcc},
 	{0xb9, 0x00, 0x28, 0xcc},	{0xb9, 0x01, 0x28, 0xcc},
 	{0xb9, 0x02, 0x28, 0xcc},	{0xb9, 0x03, 0x00, 0xcc},
 	{0xb9, 0x04, 0x00, 0xcc},	{0xb9, 0x05, 0x3c, 0xcc},
 	{0xb9, 0x06, 0x3c, 0xcc},	{0xb9, 0x07, 0x3c, 0xcc},
-	{0xb9, 0x08, 0x3c, 0xcc},	{0xbc, 0x02, 0x18, 0xcc},
+	{0xb9, 0x08, 0x3c, 0xcc},
+#endif
+	{0xbc, 0x02, 0x18, 0xcc},
 	{0xbc, 0x03, 0x50, 0xcc},	{0xbc, 0x04, 0x18, 0xcc},
 	{0xbc, 0x05, 0x00, 0xcc},	{0xbc, 0x06, 0x00, 0xcc},
 	{0xbc, 0x08, 0x30, 0xcc},	{0xbc, 0x09, 0x40, 0xcc},
 	{0xbc, 0x0a, 0x10, 0xcc},	{0xbc, 0x0b, 0x00, 0xcc},
-	{0xbc, 0x0c, 0x00, 0xcc},	{0x00, 0x05, 0x00, 0xaa},
+	{0xbc, 0x0c, 0x00, 0xcc},
+#if 0 /* 2.11.17 ms-win */
+	{0x00, 0x05, 0x00, 0xaa},
 	{0xb3, 0x5c, 0x00, 0xcc},	{0xb3, 0x01, 0x41, 0xcc},
+#endif
+	{}
+};
+
+/*fixme:test*/
+static const u8 po3130nc_InitSXGA50[][4] = {
+	{0xb0, 0x4d, 0x00, 0xcc},	{0xb3, 0x01, 0x01, 0xcc},
+	{0x00, 0x00, 0x50, 0xdd},	{0xb0, 0x03, 0x01, 0xcc},
+	{0xb3, 0x00, 0x04, 0xcc},
+	{0xb3, 0x00, 0x64, 0xcc},
+	{0xb3, 0x00, 0x65, 0xcc},
+	{0xb3, 0x05, 0x00, 0xcc},
+	{0xb3, 0x06, 0x00, 0xcc},
+	{0xb3, 0x5c, 0x01, 0xcc},
+	{0xb3, 0x08, 0x01, 0xcc},
+	{0xb3, 0x09, 0x0c, 0xcc},
+	{0xb3, 0x34, 0x01, 0xcc},
+	{0xb3, 0x35, 0xf6, 0xcc},
+	{0xb3, 0x00, 0xe7, 0xcc},
+	{0xb3, 0x02, 0xb0, 0xcc},
+	{0xb3, 0x03, 0x18, 0xcc},
+	{0xb3, 0x04, 0x15, 0xcc},
+	{0xb3, 0x20, 0x00, 0xcc},
+	{0xb3, 0x21, 0x00, 0xcc},
+	{0xb3, 0x22, 0x04, 0xcc},
+	{0xb3, 0x23, 0x00, 0xcc},
+	{0xb3, 0x14, 0x00, 0xcc},
+	{0xb3, 0x15, 0x00, 0xcc},
+	{0xb3, 0x16, 0x04, 0xcc},
+	{0xb3, 0x17, 0xff, 0xcc},
+	{0xb3, 0x2c, 0x03, 0xcc},
+	{0xb3, 0x2d, 0x56, 0xcc},
+	{0xb3, 0x2e, 0x02, 0xcc},
+	{0xb3, 0x2f, 0x0a, 0xcc},
+	{0xb3, 0x40, 0x00, 0xcc},
+	{0xb3, 0x41, 0x34, 0xcc},
+	{0xb3, 0x42, 0x01, 0xcc},
+	{0xb3, 0x43, 0xe0, 0xcc},
+	{0xb3, 0x00, 0x65, 0xcc},
+	{0xbc, 0x00, 0x71, 0xcc},
+	{0xbc, 0x01, 0x01, 0xcc},
+	{0xb0, 0x54, 0x1d, 0xcc},
+	{0x00, 0x00, 0x10, 0xdd},
+	{0x00, 0x4d, 0x2a, 0xaa},
+	{0x00, 0x00, 0x10, 0xdd},
+	{0x00, 0x20, 0x44, 0xaa},
+	{0x00, 0x47, 0x11, 0xaa},
+	{0x00, 0x48, 0x67, 0xaa},
+	{0x00, 0x49, 0x0e, 0xaa},
+	{0x00, 0x4a, 0x80, 0xaa},
+	{0x00, 0x12, 0x08, 0xaa},
+	{0x00, 0x17, 0x41, 0xaa},
+	{0x00, 0x19, 0x41, 0xaa},
+	{0x00, 0x1e, 0xc6, 0xaa},
+	{0x00, 0x21, 0x00, 0xaa},
+	{0x00, 0x36, 0xc0, 0xaa},
+	{0x00, 0x37, 0xc8, 0xaa},
+	{0x00, 0x3b, 0x36, 0xaa},
+	{0x00, 0x4b, 0xfe, 0xaa},
+	{0x00, 0x51, 0x1c, 0xaa},
+	{0x00, 0x52, 0x01, 0xaa},
+	{0x00, 0x55, 0x0a, 0xaa},
+	{0x00, 0x59, 0x6f, 0xaa},
+	{0x00, 0x5a, 0x04, 0xaa},
+	{0x00, 0x5c, 0x10, 0xaa},
+	{0x00, 0x5d, 0x10, 0xaa},
+	{0x00, 0x5e, 0x10, 0xaa},
+	{0x00, 0x5f, 0x10, 0xaa},
+	{0x00, 0x61, 0x00, 0xaa},
+	{0x00, 0x62, 0x18, 0xaa},
+	{0x00, 0x63, 0x30, 0xaa},
+	{0x00, 0x70, 0x68, 0xaa},
+	{0x00, 0x80, 0x71, 0xaa},
+	{0x00, 0x81, 0x08, 0xaa},
+	{0x00, 0x82, 0x00, 0xaa},
+	{0x00, 0x83, 0x55, 0xaa},
+	{0x00, 0x84, 0x06, 0xaa},
+	{0x00, 0x85, 0x06, 0xaa},
+	{0x00, 0x86, 0x13, 0xaa},
+	{0x00, 0x87, 0x18, 0xaa},
+	{0x00, 0xaa, 0x3f, 0xaa},
+	{0x00, 0xab, 0x44, 0xaa},
+	{0x00, 0xb0, 0x68, 0xaa},
+	{0x00, 0xb5, 0x10, 0xaa},
+	{0x00, 0xb8, 0x20, 0xaa},
+	{0x00, 0xb9, 0xa0, 0xaa},
+	{0x00, 0xbc, 0x04, 0xaa},
+	{0x00, 0x8b, 0x40, 0xaa},
+	{0x00, 0x8c, 0x91, 0xaa},
+	{0x00, 0x8d, 0x8f, 0xaa},
+	{0x00, 0x8e, 0x91, 0xaa},
+	{0x00, 0x8f, 0x43, 0xaa},
+	{0x00, 0x90, 0x92, 0xaa},
+	{0x00, 0x91, 0x89, 0xaa},
+	{0x00, 0x92, 0x9d, 0xaa},
+	{0x00, 0x93, 0x46, 0xaa},
+	{0x00, 0xd6, 0x22, 0xaa},
+	{0x00, 0x73, 0x00, 0xaa},
+	{0x00, 0x74, 0x10, 0xaa},
+	{0x00, 0x75, 0x20, 0xaa},
+	{0x00, 0x76, 0x2b, 0xaa},
+	{0x00, 0x77, 0x36, 0xaa},
+	{0x00, 0x78, 0x49, 0xaa},
+	{0x00, 0x79, 0x5a, 0xaa},
+	{0x00, 0x7a, 0x7f, 0xaa},
+	{0x00, 0x7b, 0x9b, 0xaa},
+	{0x00, 0x7c, 0xba, 0xaa},
+	{0x00, 0x7d, 0xd4, 0xaa},
+	{0x00, 0x7e, 0xea, 0xaa},
+	{0x00, 0xd6, 0x62, 0xaa},
+	{0x00, 0x73, 0x00, 0xaa},
+	{0x00, 0x74, 0x10, 0xaa},
+	{0x00, 0x75, 0x20, 0xaa},
+	{0x00, 0x76, 0x2b, 0xaa},
+	{0x00, 0x77, 0x36, 0xaa},
+	{0x00, 0x78, 0x49, 0xaa},
+	{0x00, 0x79, 0x5a, 0xaa},
+	{0x00, 0x7a, 0x7f, 0xaa},
+	{0x00, 0x7b, 0x9b, 0xaa},
+	{0x00, 0x7c, 0xba, 0xaa},
+	{0x00, 0x7d, 0xd4, 0xaa},
+	{0x00, 0x7e, 0xea, 0xaa},
+	{0x00, 0xd6, 0xa2, 0xaa},
+	{0x00, 0x73, 0x00, 0xaa},
+	{0x00, 0x74, 0x10, 0xaa},
+	{0x00, 0x75, 0x20, 0xaa},
+	{0x00, 0x76, 0x2b, 0xaa},
+	{0x00, 0x77, 0x36, 0xaa},
+	{0x00, 0x78, 0x49, 0xaa},
+	{0x00, 0x79, 0x5a, 0xaa},
+	{0x00, 0x7a, 0x7f, 0xaa},
+	{0x00, 0x7b, 0x9b, 0xaa},
+	{0x00, 0x7c, 0xba, 0xaa},
+	{0x00, 0x7d, 0xd4, 0xaa},
+	{0x00, 0x7e, 0xea, 0xaa},
+	{0x00, 0x46, 0x45, 0xaa},
+	{0x00, 0x47, 0x11, 0xaa},
+	{0x00, 0x48, 0x67, 0xaa},
+	{0x00, 0x49, 0x0e, 0xaa},
+	{0x00, 0x4a, 0x80, 0xaa},
+	{0x00, 0xba, 0x45, 0xaa},
+	{0x00, 0xbb, 0x9c, 0xaa},
+	{0x00, 0x44, 0x40, 0xaa},
+	{0xb3, 0x01, 0x41, 0xcc},
+	{0x00, 0xd5, 0x0c, 0xaa},
 	{}
 };
 
@@ -2822,7 +3037,7 @@
 	{}
 };
 
-static const u8 poxxxx_init_common[][4] = {
+static const u8 poxxxx_init_start_1[][4] = {
 	{0xb3, 0x00, 0x04, 0xcc},
 	{0x00, 0x00, 0x10, 0xdd},
 	{0xb3, 0x00, 0x64, 0xcc},
@@ -2911,14 +3126,16 @@
 	{0x00, 0xcd, 0x18, 0xaa},
 	{0x00, 0x28, 0x03, 0xaa},
 	{0x00, 0x29, 0xef, 0xaa},
-/* reinit on alt 2 (qvga) or alt7 (vga) */
+	{}
+};
+static const u8 poxxxx_init_start_2[][4] = {
 	{0xb3, 0x05, 0x00, 0xcc},
 	{0xb3, 0x06, 0x00, 0xcc},
 	{0xb8, 0x00, 0x01, 0xcc},
 
 	{0x00, 0x1d, 0x85, 0xaa},
 	{0x00, 0x1e, 0xc6, 0xaa},
-	{0x00, 0x00, 0x40, 0xdd},
+	{0x00, 0x00, 0x80, 0xdd},
 	{0x00, 0x1d, 0x05, 0xaa},
 	{}
 };
@@ -2991,6 +3208,9 @@
 	{0x00, 0x6a, 0x0f, 0xaa},
 	{0x00, 0x6b, 0x0f, 0xaa},
 	{0x00, 0x89, 0x07, 0xaa},
+#if 0 //vish
+	{0x00, 0x1d, 0x85, 0xaa},
+#endif
 	{0x00, 0xd5, 0x4c, 0xaa},
 	{0x00, 0x0a, 0x00, 0xaa},
 	{0x00, 0x0b, 0x2a, 0xaa},
@@ -3003,7 +3223,11 @@
 	{}
 };
 static const u8 poxxxx_initVGA[][4] = {
+#if 0 //vish
+	{0x00, 0x20, 0xcc, 0xaa},
+#else
 	{0x00, 0x20, 0x11, 0xaa},
+#endif
 	{0x00, 0x33, 0x38, 0xaa},
 	{0x00, 0xbb, 0x0d, 0xaa},
 	{0xb3, 0x22, 0x01, 0xcc},	/* change to 640x480 */
@@ -3015,11 +3239,14 @@
 	{0xb3, 0x5c, 0x01, 0xcc},
 	{0x00, 0x04, 0x06, 0xaa},
 	{0x00, 0x05, 0x3f, 0xaa},
-	{0x00, 0x04, 0x00, 0xdd},	/* delay 1s */
 	{}
 };
 static const u8 poxxxx_initQVGA[][4] = {
+#if 0 //vish
+	{0x00, 0x20, 0x99, 0xaa},
+#else
 	{0x00, 0x20, 0x33, 0xaa},
+#endif
 	{0x00, 0x33, 0x38, 0xaa},
 	{0x00, 0xbb, 0x0d, 0xaa},
 	{0xb3, 0x22, 0x00, 0xcc},	/* change to 320x240 */
@@ -3031,15 +3258,36 @@
 	{0xb3, 0x5c, 0x00, 0xcc},
 	{0x00, 0x04, 0x06, 0xaa},
 	{0x00, 0x05, 0x3f, 0xaa},
-	{0x00, 0x04, 0x00, 0xdd},	/* delay 1s */
+	{}
+};
+static const u8 poxxxx_initQQVGA[][4] = {
+	{0x00, 0x20, 0xbb, 0xaa},
+	{0x00, 0x33, 0x38, 0xaa},
+	{0x00, 0xbb, 0x0d, 0xaa},
+	{0xb3, 0x22, 0x00, 0xcc},	/* change to 160x120 */
+	{0xb3, 0x23, 0x78, 0xcc},
+	{0xb3, 0x16, 0x00, 0xcc},
+	{0xb3, 0x17, 0x9f, 0xcc},
+	{0xb3, 0x02, 0xb3, 0xcc},
+	{0xb3, 0x06, 0x03, 0xcc},
+	{0xb3, 0x5c, 0x00, 0xcc},
+	{0x00, 0x04, 0x0c, 0xaa},
+	{0x00, 0x05, 0x27, 0xaa},
 	{}
 };
 static const u8 poxxxx_init_end_1[][4] = {
+#if 0 //vish
+	{0x00, 0x1d, 0x05, 0xaa},
+#endif
 	{0x00, 0x47, 0x25, 0xaa},
 	{0x00, 0x48, 0x80, 0xaa},
 	{0x00, 0x49, 0x1f, 0xaa},
 	{0x00, 0x4a, 0x40, 0xaa},
+#if 1 // vish
+	{0x00, 0x44, 0x20, 0xaa},
+#else
 	{0x00, 0x44, 0x40, 0xaa},
+#endif
 	{0x00, 0xab, 0x4a, 0xaa},
 	{0x00, 0xb1, 0x00, 0xaa},
 	{0x00, 0xb2, 0x04, 0xaa},
@@ -3051,6 +3299,7 @@
 static const u8 poxxxx_init_end_2[][4] = {
 	{0x00, 0x1d, 0x85, 0xaa},
 	{0x00, 0x1e, 0x06, 0xaa},
+	{0x00, 0x00, 0x80, 0xdd},
 	{0x00, 0x1d, 0x05, 0xaa},
 	{}
 };
@@ -3169,7 +3418,7 @@
 			index, gspca_dev->usb_buf, len,
 			500);
 	if (ret < 0) {
-		err("reg_r err %d", ret);
+		pr_err("reg_r err %d\n", ret);
 		gspca_dev->usb_err = ret;
 	}
 }
@@ -3210,7 +3459,7 @@
 			value, index, NULL, 0,
 			500);
 	if (ret < 0) {
-		err("reg_w err %d", ret);
+		pr_err("reg_w err %d\n", ret);
 		gspca_dev->usb_err = ret;
 	}
 }
@@ -3235,8 +3484,7 @@
 
 	reg_r(gspca_dev, 0xa1, 0xb33f, 1);
 	if (!(gspca_dev->usb_buf[0] & 0x02)) {
-		err("I2c Bus Busy Wait %02x",
-			gspca_dev->usb_buf[0]);
+		pr_err("I2c Bus Busy Wait %02x\n", gspca_dev->usb_buf[0]);
 		return 0;
 	}
 	reg_w(gspca_dev, 0xa0, address, 0xb33a);
@@ -3349,7 +3597,7 @@
 		msleep(20);
 	} while (--retry > 0);
 	if (retry <= 0)
-		err("i2c_write timeout");
+		pr_err("i2c_write timeout\n");
 }
 
 static void put_tab_to_reg(struct gspca_dev *gspca_dev,
@@ -3390,6 +3638,17 @@
 	/*not reached*/
 }
 
+#if 0 //vish
+/* initialize some global registers which are critical for integrated webcams */
+static void vc0321_reset(struct gspca_dev *gspca_dev)
+{
+	reg_w(gspca_dev, 0xa0, 0x00, 0xb04d);
+	reg_w(gspca_dev, 0xa0, 0x01, 0xb301);
+	msleep(100);
+	reg_w(gspca_dev, 0xa0, 0x01, 0xb003);
+	msleep(100);
+}
+#endif
 
 /* this function is called at probe time */
 static int sd_config(struct gspca_dev *gspca_dev,
@@ -3419,6 +3678,18 @@
 	return 0;
 }
 
+#if 0
+//vish
+static void setgamma(struct gspca_dev *gspca_dev);
+static void setbacklight(struct gspca_dev *gspca_dev);
+static void setautogain(struct gspca_dev *gspca_dev);
+static void setsharpness(struct gspca_dev *gspca_dev);
+static void setwb(struct gspca_dev *gspca_dev);
+static void setcolors(struct gspca_dev *gspca_dev);
+static void setbrightness(struct gspca_dev *gspca_dev);
+static void setcontrast(struct gspca_dev *gspca_dev);
+#endif
+
 /* this function is called at probe and resume time */
 static int sd_init(struct gspca_dev *gspca_dev)
 {
@@ -3439,14 +3710,20 @@
 		[SENSOR_POxxxx] =	128,
 	};
 
-	if (sd->sensor != SENSOR_POxxxx)
-		sensor = vc032x_probe_sensor(gspca_dev);
-	else
-		sensor = sd->sensor;
+#if 0 //vish
+	if (sd->bridge == BRIDGE_VC0321)
+		vc0321_reset(gspca_dev);
+#endif
+
+	sensor = vc032x_probe_sensor(gspca_dev);
+//vish
+//	if (sd->sensor == SENSOR_POxxxx
+//	 && sensor == SENSOR_PO3130NC)
+//		sensor = sd->sensor;
 
 	switch (sensor) {
 	case -1:
-		err("Unknown sensor...");
+		pr_err("Unknown sensor...\n");
 		return -EINVAL;
 	case SENSOR_HV7131R:
 		PDEBUG(D_PROBE, "Find Sensor HV7131R");
@@ -3484,8 +3761,16 @@
 
 	cam = &gspca_dev->cam;
 	if (sd->bridge == BRIDGE_VC0321) {
-		cam->cam_mode = vc0321_mode;
-		cam->nmodes = ARRAY_SIZE(vc0321_mode);
+		if (sd->sensor == SENSOR_PO3130NC) {
+			cam->cam_mode = &vc0321_mode[1]; /* no 160x120 */
+			cam->nmodes = ARRAY_SIZE(vc0321_mode) - 1;
+		} else if (sd->sensor == SENSOR_POxxxx) { /* no 1280x1024 */
+			cam->cam_mode = vc0321_mode;
+			cam->nmodes = ARRAY_SIZE(vc0321_mode) - 1;
+		} else {			/* 320x240 and 640x480 only */
+			cam->cam_mode = &vc0321_mode[1];
+			cam->nmodes = ARRAY_SIZE(vc0321_mode) - 2;
+		}
 	} else {
 		switch (sensor) {
 		case SENSOR_PO1200:
@@ -3518,16 +3803,52 @@
 
 	if (sd->bridge == BRIDGE_VC0321) {
 		reg_r(gspca_dev, 0x8a, 0, 3);
-		reg_w(gspca_dev, 0x87, 0x00, 0x0f0f);
+		reg_w(gspca_dev, 0x87, 0x00,
+				0x0f00 | gspca_dev->usb_buf[2]);
 		reg_r(gspca_dev, 0x8b, 0, 3);
-		reg_w(gspca_dev, 0x88, 0x00, 0x0202);
+		reg_w(gspca_dev, 0x88, 0x00,
+				0x0200 | gspca_dev->usb_buf[2]);
 		if (sd->sensor == SENSOR_POxxxx) {
+			reg_w(gspca_dev, 0x89, 0xffff, 0xffff);
 			reg_r(gspca_dev, 0xa1, 0xb300, 1);
 			if (gspca_dev->usb_buf[0] != 0) {
 				reg_w(gspca_dev, 0xa0, 0x26, 0xb300);
+				msleep(16);
 				reg_w(gspca_dev, 0xa0, 0x04, 0xb300);
+				msleep(16);
 			}
 			reg_w(gspca_dev, 0xa0, 0x00, 0xb300);
+
+#if 0
+// vish
+			/* full initialization to prevent integrated webcams
+			 * to reset after 30s */
+			if (gspca_dev->usb_err != 0)
+				return gspca_dev->usb_err;
+			msleep(500);
+			usb_set_interface(gspca_dev->dev, gspca_dev->iface, 2);
+			usb_exchange(gspca_dev, poxxxx_init_start_1);
+			usb_exchange(gspca_dev, poxxxx_init_start_2);
+			setgamma(gspca_dev);
+			setbacklight(gspca_dev);
+			setautogain(gspca_dev);
+			usb_exchange(gspca_dev, poxxxx_init_start_3);
+			usb_exchange(gspca_dev, poxxxx_initQVGA);
+			msleep(1000);
+			reg_r(gspca_dev, 0x8c, 0x0000, 3);
+			reg_w(gspca_dev, 0xa0,
+				gspca_dev->usb_buf[2] & 1 ? 0 : 1,
+				0xb35c);
+			msleep(300);
+			usb_exchange(gspca_dev, poxxxx_init_end_1);
+			setsharpness(gspca_dev);
+			setwb(gspca_dev);
+			setcolors(gspca_dev);
+			setbrightness(gspca_dev);
+			setcontrast(gspca_dev);
+			msleep(500);
+			usb_set_interface(gspca_dev->dev, gspca_dev->iface, 0);
+#endif
 		}
 	}
 	return gspca_dev->usb_err;
@@ -3635,6 +3956,7 @@
 			data = 0xb5 + sd->sharpness * 3;
 		i2c_write(gspca_dev, 0x61, &data, 1);
 		break;
+	case SENSOR_PO3130NC:
 	case SENSOR_POxxxx:
 		if (sd->sharpness < 0)
 			data = 0x7e;	/* def = max */
@@ -3648,6 +3970,8 @@
 {
 	struct sd *sd = (struct sd *) gspca_dev;
 
+//fixme: check poxxx
+//fixme: don't do if autogain
 	if (gspca_dev->ctrl_dis & (1 << GAIN_IDX))
 		return;
 	i2c_write(gspca_dev, 0x15, &sd->gain, 1);
@@ -3658,6 +3982,8 @@
 	struct sd *sd = (struct sd *) gspca_dev;
 	u8 data;
 
+//fixme: check poxxx
+//fixme: don't do if autogain
 	if (gspca_dev->ctrl_dis & (1 << EXPOSURE_IDX))
 		return;
 	data = sd->exposure >> 8;
@@ -3743,10 +4069,12 @@
 
 	/* Assume start use the good resolution from gspca_dev->mode */
 	if (sd->bridge == BRIDGE_VC0321) {
-		reg_w(gspca_dev, 0xa0, 0xff, 0xbfec);
-		reg_w(gspca_dev, 0xa0, 0xff, 0xbfed);
-		reg_w(gspca_dev, 0xa0, 0xff, 0xbfee);
-		reg_w(gspca_dev, 0xa0, 0xff, 0xbfef);
+		if (sd->sensor != SENSOR_POxxxx) {
+			reg_w(gspca_dev, 0xa0, 0xff, 0xbfec);
+			reg_w(gspca_dev, 0xa0, 0xff, 0xbfed);
+			reg_w(gspca_dev, 0xa0, 0xff, 0xbfee);
+			reg_w(gspca_dev, 0xa0, 0xff, 0xbfef);
+		}
 		sd->image_offset = 46;
 	} else {
 		if (gspca_dev->cam.cam_mode[gspca_dev->curr_mode].pixelformat
@@ -3816,10 +4144,12 @@
 	case SENSOR_PO3130NC:
 		GammaT = po3130_gamma;
 		MatrixT = po3130_matrix;
-		if (mode)
+		if (mode == 1)
 			init = po3130_initQVGA_data;	/* 320x240 */
-		else
+		else if (mode == 0)
 			init = po3130_initVGA_data;	/* 640x480 */
+		else
+			init = po3130nc_InitSXGA50;	/* 1280x1024 */
 		usb_exchange(gspca_dev, init);
 		init = po3130_rundata;
 		break;
@@ -3830,30 +4160,38 @@
 		break;
 	default:
 /*	case SENSOR_POxxxx: */
-		usb_exchange(gspca_dev, poxxxx_init_common);
+#if 1 //vish
+		reg_r(gspca_dev, 0xa1, 0xb300, 1);
+//		if (gspca_dev->usb_buf[0] != 0) {
+//			if (gspca_dev->usb_buf[0] != 0x26) {
+//				reg_w(gspca_dev, 0xa0, 0x26, 0xb300);
+//				msleep(16);
+//			}
+//			reg_w(gspca_dev, 0xa0, 0x04, 0xb300);
+//			msleep(16);
+//			reg_w(gspca_dev, 0xa0, 0x00, 0xb300);
+//			msleep(16);
+//		}
+		if (gspca_dev->usb_buf[0] != 0x67)
+#endif
+			usb_exchange(gspca_dev, poxxxx_init_start_1);
+		usb_exchange(gspca_dev, poxxxx_init_start_2);
 		setgamma(gspca_dev);
 		setbacklight(gspca_dev);
-		setbrightness(gspca_dev);
-		setcontrast(gspca_dev);
-		setcolors(gspca_dev);
-		setsharpness(gspca_dev);
 		setautogain(gspca_dev);
-		setexposure(gspca_dev);
-		setgain(gspca_dev);
 		usb_exchange(gspca_dev, poxxxx_init_start_3);
-		if (mode)
-			init = poxxxx_initQVGA;
-		else
+		switch (mode) {
+		case 0:
 			init = poxxxx_initVGA;
-		usb_exchange(gspca_dev, init);
-		reg_r(gspca_dev, 0x8c, 0x0000, 3);
-		reg_w(gspca_dev, 0xa0,
-				gspca_dev->usb_buf[2] & 1 ? 0 : 1,
-				0xb35c);
-		msleep(300);
-/*fixme: i2c read 04 and 05*/
-		init = poxxxx_init_end_1;
-		break;
+			break;
+		case 1:
+			init = poxxxx_initQVGA;
+			break;
+/*		case 2: */
+		default:
+			init = poxxxx_initQQVGA;
+			break;
+		}
 	}
 	usb_exchange(gspca_dev, init);
 	if (GammaT && MatrixT) {
@@ -3882,10 +4220,28 @@
 		reg_w(gspca_dev, 0xa0, 0x0000, 0xbfff);
 		break;
 	case SENSOR_POxxxx:
-		usb_exchange(gspca_dev, poxxxx_init_end_2);
+		msleep(1000);
+		reg_r(gspca_dev, 0x8c, 0x0000, 3);
+		reg_w(gspca_dev, 0xa0,
+				gspca_dev->usb_buf[2] & 1 ? 0 : 1,
+				0xb35c);
+		msleep(300);
+/*fixme: i2c read 04 and 05*/
+		usb_exchange(gspca_dev, poxxxx_init_end_1);
+//vish
+//	case SENSOR_PO3130NC:		2.11.17 ms-win
+		setsharpness(gspca_dev);
 		setwb(gspca_dev);
-		msleep(80);		/* led on */
-		reg_w(gspca_dev, 0x89, 0xffff, 0xfdff);
+		setcolors(gspca_dev);
+		setbrightness(gspca_dev);
+		setcontrast(gspca_dev);
+//fixme: if needed
+		setexposure(gspca_dev);
+		setgain(gspca_dev);
+		usb_exchange(gspca_dev, poxxxx_init_end_2);
+		msleep(80);
+	case SENSOR_PO3130NC:		/* 2.11.17 ms-win */
+		reg_w(gspca_dev, 0x89, 0xffff, 0xfdff);	/* led on */
 		break;
 	}
 	return gspca_dev->usb_err;
@@ -3899,11 +4255,11 @@
 	case SENSOR_MI1310_SOC:
 		reg_w(gspca_dev, 0x89, 0x058c, 0x00ff);
 		break;
-	case SENSOR_POxxxx:
-		return;
 	default:
 		if (!(sd->flags & FL_SAMSUNG))
 			reg_w(gspca_dev, 0x89, 0xffff, 0xffff);
+		if (sd->sensor == SENSOR_POxxxx)
+			return;
 		break;
 	}
 	reg_w(gspca_dev, 0xa0, 0x01, 0xb301);
@@ -3923,11 +4279,17 @@
 	else if (!(sd->flags & FL_SAMSUNG))
 		reg_w(gspca_dev, 0x89, 0xffff, 0xffff);
 
+#if 0
 	if (sd->sensor == SENSOR_POxxxx) {
 		reg_w(gspca_dev, 0xa0, 0x26, 0xb300);
+		msleep(16);
+#if 1 //vish
 		reg_w(gspca_dev, 0xa0, 0x04, 0xb300);
+		msleep(16);
 		reg_w(gspca_dev, 0xa0, 0x00, 0xb300);
+#endif
 	}
+#endif
 }
 
 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
@@ -4226,18 +4588,8 @@
 #ifdef CONFIG_PM
 	.suspend = gspca_suspend,
 	.resume = gspca_resume,
+	.reset_resume = gspca_resume,
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/vicam.c linux-3.0.82x/drivers/media/video/gspca/vicam.c
--- linux-3.0.82/drivers/media/video/gspca/vicam.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/vicam.c	2017-09-23 03:42:49.526676567 +0800
@@ -26,6 +26,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "vicam"
 #define HEADER_SIZE 64
 
@@ -117,7 +119,7 @@
 			      USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 			      value, index, data, len, 1000);
 	if (ret < 0)
-		err("control msg req %02X error %d", request, ret);
+		pr_err("control msg req %02X error %d\n", request, ret);
 
 	return ret;
 }
@@ -189,8 +191,8 @@
 			   data, size, &act_len, 10000);
 	/* successful, it returns 0, otherwise  negative */
 	if (ret < 0 || act_len != size) {
-		err("bulk read fail (%d) len %d/%d",
-			ret, act_len, size);
+		pr_err("bulk read fail (%d) len %d/%d\n",
+		       ret, act_len, size);
 		return -EIO;
 	}
 	return 0;
@@ -216,7 +218,7 @@
 		   HEADER_SIZE;
 	buffer = kmalloc(frame_sz, GFP_KERNEL | GFP_DMA);
 	if (!buffer) {
-		err("Couldn't allocate USB buffer");
+		pr_err("Couldn't allocate USB buffer\n");
 		goto exit;
 	}
 
@@ -269,7 +271,7 @@
 	ret = request_ihex_firmware(&fw, "vicam/firmware.fw",
 				    &gspca_dev->dev->dev);
 	if (ret) {
-		err("Failed to load \"vicam/firmware.fw\": %d\n", ret);
+		pr_err("Failed to load \"vicam/firmware.fw\": %d\n", ret);
 		return ret;
 	}
 
@@ -322,7 +324,8 @@
 	dev->work_thread = NULL;
 	mutex_lock(&gspca_dev->usb_lock);
 
-	vicam_set_camera_power(gspca_dev, 0);
+	if (gspca_dev->present)
+		vicam_set_camera_power(gspca_dev, 0);
 }
 
 /* Table of supported USB devices */
@@ -366,16 +369,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/w996Xcf.c linux-3.0.82x/drivers/media/video/gspca/w996Xcf.c
--- linux-3.0.82/drivers/media/video/gspca/w996Xcf.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/w996Xcf.c	2017-09-23 03:42:49.526676567 +0800
@@ -31,6 +31,8 @@
    the sensor drivers to v4l2 sub drivers, and properly split of this
    driver from ov519.c */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define W9968CF_I2C_BUS_DELAY    4 /* delay in us for I2C bit r/w operations */
 
 #define Y_QUANTABLE (&sd->jpeg_hdr[JPEG_QT0_OFFSET])
@@ -81,7 +83,7 @@
 			      USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE,
 			      value, 0x06, sd->gspca_dev.usb_buf, 6, 500);
 	if (ret < 0) {
-		err("Write FSB registers failed (%d)", ret);
+		pr_err("Write FSB registers failed (%d)\n", ret);
 		sd->gspca_dev.usb_err = ret;
 	}
 }
@@ -108,7 +110,7 @@
 	udelay(W9968CF_I2C_BUS_DELAY);
 
 	if (ret < 0) {
-		err("Write SB reg [01] %04x failed", value);
+		pr_err("Write SB reg [01] %04x failed\n", value);
 		sd->gspca_dev.usb_err = ret;
 	}
 }
@@ -135,7 +137,7 @@
 		ret = sd->gspca_dev.usb_buf[0] |
 		      (sd->gspca_dev.usb_buf[1] << 8);
 	} else {
-		err("Read SB reg [01] failed");
+		pr_err("Read SB reg [01] failed\n");
 		sd->gspca_dev.usb_err = ret;
 	}
 
diff -uNra linux-3.0.82/drivers/media/video/gspca/xirlink_cit.c linux-3.0.82x/drivers/media/video/gspca/xirlink_cit.c
--- linux-3.0.82/drivers/media/video/gspca/xirlink_cit.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/xirlink_cit.c	2017-09-23 03:42:49.530676555 +0800
@@ -27,6 +27,8 @@
  *
  */
 
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
 #define MODULE_NAME "xirlink-cit"
 
 #include <linux/input.h>
@@ -800,8 +802,8 @@
 			USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_ENDPOINT,
 			value, index, NULL, 0, 1000);
 	if (err < 0)
-		err("Failed to write a register (index 0x%04X,"
-			" value 0x%02X, error %d)", index, value, err);
+		pr_err("Failed to write a register (index 0x%04X, value 0x%02X, error %d)\n",
+		       index, value, err);
 
 	return 0;
 }
@@ -816,8 +818,8 @@
 			USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_ENDPOINT,
 			0x00, index, buf, 8, 1000);
 	if (res < 0) {
-		err("Failed to read a register (index 0x%04X, error %d)",
-			index, res);
+		pr_err("Failed to read a register (index 0x%04X, error %d)\n",
+		       index, res);
 		return res;
 	}
 
@@ -993,14 +995,12 @@
 	case CIT_MODEL0:
 		cam->cam_mode = model0_mode;
 		cam->nmodes = ARRAY_SIZE(model0_mode);
-		cam->reverse_alts = 1;
 		gspca_dev->ctrl_dis = ~((1 << SD_CONTRAST) | (1 << SD_HFLIP));
 		sd->sof_len = 4;
 		break;
 	case CIT_MODEL1:
 		cam->cam_mode = cif_yuv_mode;
 		cam->nmodes = ARRAY_SIZE(cif_yuv_mode);
-		cam->reverse_alts = 1;
 		gspca_dev->ctrl_dis = (1 << SD_HUE) | (1 << SD_HFLIP);
 		sd->sof_len = 4;
 		break;
@@ -1587,7 +1587,7 @@
 	intf = usb_ifnum_to_if(gspca_dev->dev, gspca_dev->iface);
 	alt = usb_altnum_to_altsetting(intf, gspca_dev->alt);
 	if (!alt) {
-		err("Couldn't get altsetting");
+		pr_err("Couldn't get altsetting\n");
 		return -EIO;
 	}
 
@@ -2789,7 +2789,7 @@
 	}
 
 	/* Start isoc bandwidth "negotiation" at max isoc bandwidth */
-	alt = &gspca_dev->dev->config->intf_cache[0]->altsetting[1];
+	alt = &gspca_dev->dev->actconfig->intf_cache[0]->altsetting[1];
 	alt->endpoint[0].desc.wMaxPacketSize = cpu_to_le16(max_packet_size);
 
 	return 0;
@@ -2812,7 +2812,7 @@
 		break;
 	}
 
-	alt = &gspca_dev->dev->config->intf_cache[0]->altsetting[1];
+	alt = &gspca_dev->dev->actconfig->intf_cache[0]->altsetting[1];
 	packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
 	if (packet_size <= min_packet_size)
 		return -EIO;
@@ -2824,7 +2824,7 @@
 
 	ret = usb_set_interface(gspca_dev->dev, gspca_dev->iface, 1);
 	if (ret < 0)
-		err("set alt 1 err %d", ret);
+		pr_err("set alt 1 err %d\n", ret);
 
 	return ret;
 }
@@ -3323,15 +3323,4 @@
 #endif
 };
 
-/* -- module insert / remove -- */
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
diff -uNra linux-3.0.82/drivers/media/video/gspca/zc3xx.c linux-3.0.82x/drivers/media/video/gspca/zc3xx.c
--- linux-3.0.82/drivers/media/video/gspca/zc3xx.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/gspca/zc3xx.c	2017-09-23 03:42:49.534676542 +0800
@@ -1,7 +1,7 @@
 /*
- * Z-Star/Vimicro zc301/zc302p/vc30x library
+ * Z-Star/Vimicro zc301/zc302p/vc30x driver
  *
- * Copyright (C) 2009-2011 Jean-Francois Moine <http://moinejf.free.fr>
+ * Copyright (C) 2009-2012 Jean-Francois Moine <http://moinejf.free.fr>
  * Copyright (C) 2004 2005 2006 Michel Xhaard mxhaard@magic.fr
  *
  * This program is free software; you can redistribute it and/or modify
@@ -19,7 +19,7 @@
  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
-#define MODULE_NAME "zc3xx"
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 
 #include <linux/input.h>
 #include "gspca.h"
@@ -32,7 +32,7 @@
 
 static int force_sensor = -1;
 
-#define QUANT_VAL 1		/* quantization table */
+#define REG08_DEF 3		/* default JPEG compression (70%) */
 #include "zc3xx-reg.h"
 
 /* controls */
@@ -44,6 +44,7 @@
 	AUTOGAIN,
 	LIGHTFREQ,
 	SHARPNESS,
+	QUALITY,
 	NCTRLS		/* number of controls */
 };
 
@@ -55,10 +56,10 @@
 
 	struct gspca_ctrl ctrls[NCTRLS];
 
-	u8 quality;			/* image quality */
-#define QUALITY_MIN 50
-#define QUALITY_MAX 80
-#define QUALITY_DEF 70
+	struct work_struct work;
+	struct workqueue_struct *work_thread;
+
+	u8 reg08;		/* webcam compression quality */
 
 	u8 bridge;
 	u8 sensor;		/* Type of image sensor chip */
@@ -73,7 +74,7 @@
 enum sensors {
 	SENSOR_ADCM2700,
 	SENSOR_CS2102,
-	SENSOR_CS2102K,
+//	SENSOR_CS2102K,
 	SENSOR_GC0303,
 	SENSOR_GC0305,
 	SENSOR_HDCS2020,
@@ -99,6 +100,7 @@
 static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val);
 static void setlightfreq(struct gspca_dev *gspca_dev);
 static void setsharpness(struct gspca_dev *gspca_dev);
+static int sd_setquality(struct gspca_dev *gspca_dev, __s32 val);
 
 static const struct ctrl sd_ctrls[NCTRLS] = {
 [BRIGHTNESS] = {
@@ -186,17 +188,29 @@
 	    },
 	    .set_control = setsharpness
 	},
+[QUALITY] = {
+	    {
+		.id	 = V4L2_CID_JPEG_COMPRESSION_QUALITY,
+		.type    = V4L2_CTRL_TYPE_INTEGER,
+		.name    = "Compression Quality",
+		.minimum = 40,
+		.maximum = 70,
+		.step    = 1,
+		.default_value = 70	/* updated in sd_init() */
+	    },
+	    .set = sd_setquality
+	},
 };
 
 static const struct v4l2_pix_format vga_mode[] = {
 	{320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 		.bytesperline = 320,
-		.sizeimage = 320 * 240 * 3 / 8 + 590,
+		.sizeimage = 320 * 240 * 5 / 8 + 590,
 		.colorspace = V4L2_COLORSPACE_JPEG,
 		.priv = 1},
 	{640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 		.bytesperline = 640,
-		.sizeimage = 640 * 480 * 3 / 8 + 590,
+		.sizeimage = 640 * 480 * 5 / 8 + 590,
 		.colorspace = V4L2_COLORSPACE_JPEG,
 		.priv = 0},
 };
@@ -227,6 +241,9 @@
 		.priv = 0},
 };
 
+/* bridge reg08 -> JPEG quality conversion table */
+static u8 jpeg_qual[] = {40, 50, 60, 70, /*80*/};
+
 /* usb exchanges */
 struct usb_action {
 	u8	req;
@@ -677,9 +694,12 @@
 	{}
 };
 
-/* CS2102_KOCOM */
-static const struct usb_action cs2102K_InitialScale[] = {
-	{0xa0, 0x11, ZC3XX_R002_CLOCKSELECT},
+#if 0
+/* from usbvm31b.inf 0ac8:301b KMC-90 02/11/15 */
+/* defined as tas5130c - this sensor is a hdcs2020 */
+static const struct usb_action cs2102k_Initial[] = {
+	{0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL},
+	{0xa0, 0x00, ZC3XX_R002_CLOCKSELECT},
 	{0xa0, 0x03, ZC3XX_R008_CLOCKSETTING},
 	{0xa0, 0x08, ZC3XX_R010_CMOSSENSORSELECT},
 	{0xa0, 0x02, ZC3XX_R003_FRAMEWIDTHHIGH},
@@ -696,79 +716,25 @@
 	{0xa0, 0xe8, ZC3XX_R09C_WINHEIGHTLOW},
 	{0xa0, 0x88, ZC3XX_R09E_WINWIDTHLOW},
 	{0xa0, 0x55, ZC3XX_R08B_I2CDEVICEADDR},
-	{0xa0, 0x18, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x00, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x0a, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x02, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x0b, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x02, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x0c, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x7c, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x0d, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0xa3, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x03, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0xfb, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x05, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x00, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x06, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x03, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x09, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x08, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x0e, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x04, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x0f, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x18, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x10, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x18, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x11, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x18, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x12, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x18, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x15, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x00, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x16, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x0c, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x17, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x0c, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x18, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x04, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0xb7, ZC3XX_R101_SENSORCORRECTION},
+	{0xaa, 0x18, 0x0000},	/* control 2 */
+	{0xaa, 0x0a, 0x0002},	/* first window row */
+	{0xaa, 0x0b, 0x0002},	/* first window column */
+	{0xaa, 0x0c, 0x007b},	/* last window row */
+	{0xaa, 0x0d, 0x00a3},	/* last window column */
+	{0xaa, 0x03, 0x00fb},	/* pad control */
+	{0xaa, 0x05, 0x0000},	/* interface control */
+	{0xaa, 0x06, 0x0003},	/* interface timing */
+	{0xaa, 0x09, 0x0008},	/* ADC control */
+	{0xaa, 0x0e, 0x0004},	/* timing control */
+	{0xaa, 0x0f, 0x0018},	/* green 1 gain */
+	{0xaa, 0x10, 0x0018},	/* red gain */
+	{0xaa, 0x11, 0x0018},	/* blue gain */
+	{0xaa, 0x12, 0x0018},	/* green 2 gain */
+	{0xaa, 0x15, 0x0000},	/* sub-row exposure */
+	{0xaa, 0x16, 0x000c},	/* error control */
+	{0xaa, 0x17, 0x000c},	/* interface timing 2 */
+	{0xaa, 0x18, 0x0004},	/* control 2 */
+	{0xa0, 0xf7, ZC3XX_R101_SENSORCORRECTION},
 	{0xa0, 0x05, ZC3XX_R012_VIDEOCONTROLFUNC},
 	{0xa0, 0x78, ZC3XX_R18D_YTARGET},
 	{0xa0, 0x0d, ZC3XX_R100_OPERATIONMODE},
@@ -781,165 +747,11 @@
 	{0xa0, 0x08, ZC3XX_R301_EEPROMACCESS},
 	{0xa0, 0x00, 0x01ad},
 	{0xa0, 0x01, 0x01b1},
-	{0xa0, 0x02, ZC3XX_R180_AUTOCORRECTENABLE},
-	{0xa0, 0x60, ZC3XX_R116_RGAIN},
-	{0xa0, 0x40, ZC3XX_R117_GGAIN},
-	{0xa0, 0x4c, ZC3XX_R118_BGAIN},
-	{0xa0, 0x03, ZC3XX_R008_CLOCKSETTING},	/* clock ? */
-	{0xa0, 0x08, ZC3XX_R1C6_SHARPNESS00},	/* sharpness+ */
-	{0xa0, 0x0f, ZC3XX_R1CB_SHARPNESS05},	/* sharpness- */
-	{0xa0, 0x13, ZC3XX_R120_GAMMA00},	/* gamma 4 */
-	{0xa0, 0x38, ZC3XX_R121_GAMMA01},
-	{0xa0, 0x59, ZC3XX_R122_GAMMA02},
-	{0xa0, 0x79, ZC3XX_R123_GAMMA03},
-	{0xa0, 0x92, ZC3XX_R124_GAMMA04},
-	{0xa0, 0xa7, ZC3XX_R125_GAMMA05},
-	{0xa0, 0xb9, ZC3XX_R126_GAMMA06},
-	{0xa0, 0xc8, ZC3XX_R127_GAMMA07},
-	{0xa0, 0xd4, ZC3XX_R128_GAMMA08},
-	{0xa0, 0xdf, ZC3XX_R129_GAMMA09},
-	{0xa0, 0xe7, ZC3XX_R12A_GAMMA0A},
-	{0xa0, 0xee, ZC3XX_R12B_GAMMA0B},
-	{0xa0, 0xf4, ZC3XX_R12C_GAMMA0C},
-	{0xa0, 0xf9, ZC3XX_R12D_GAMMA0D},
-	{0xa0, 0xfc, ZC3XX_R12E_GAMMA0E},
-	{0xa0, 0xff, ZC3XX_R12F_GAMMA0F},
-	{0xa0, 0x26, ZC3XX_R130_GAMMA10},
-	{0xa0, 0x22, ZC3XX_R131_GAMMA11},
-	{0xa0, 0x20, ZC3XX_R132_GAMMA12},
-	{0xa0, 0x1c, ZC3XX_R133_GAMMA13},
-	{0xa0, 0x16, ZC3XX_R134_GAMMA14},
-	{0xa0, 0x13, ZC3XX_R135_GAMMA15},
-	{0xa0, 0x10, ZC3XX_R136_GAMMA16},
-	{0xa0, 0x0d, ZC3XX_R137_GAMMA17},
-	{0xa0, 0x0b, ZC3XX_R138_GAMMA18},
-	{0xa0, 0x09, ZC3XX_R139_GAMMA19},
-	{0xa0, 0x07, ZC3XX_R13A_GAMMA1A},
-	{0xa0, 0x06, ZC3XX_R13B_GAMMA1B},
-	{0xa0, 0x05, ZC3XX_R13C_GAMMA1C},
-	{0xa0, 0x04, ZC3XX_R13D_GAMMA1D},
-	{0xa0, 0x03, ZC3XX_R13E_GAMMA1E},
-	{0xa0, 0x02, ZC3XX_R13F_GAMMA1F},
-	{0xa0, 0x58, ZC3XX_R10A_RGB00},	/* matrix */
-	{0xa0, 0xf4, ZC3XX_R10B_RGB01},
-	{0xa0, 0xf4, ZC3XX_R10C_RGB02},
-	{0xa0, 0xf4, ZC3XX_R10D_RGB10},
-	{0xa0, 0x58, ZC3XX_R10E_RGB11},
-	{0xa0, 0xf4, ZC3XX_R10F_RGB12},
-	{0xa0, 0xf4, ZC3XX_R110_RGB20},
-	{0xa0, 0xf4, ZC3XX_R111_RGB21},
-	{0xa0, 0x58, ZC3XX_R112_RGB22},
-	{0xa0, 0x00, ZC3XX_R180_AUTOCORRECTENABLE},
-	{0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS},
-	{0xa0, 0x18, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x00, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x13, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x22, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x14, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x01, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x20, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x01, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x21, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x22, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x18, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x04, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x01, ZC3XX_R0A3_EXPOSURETIMEHIGH},
-	{0xa0, 0x22, ZC3XX_R0A4_EXPOSURETIMELOW},
-	{0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH},
-	{0xa0, 0x07, ZC3XX_R191_EXPOSURELIMITMID},
-	{0xa0, 0xee, ZC3XX_R192_EXPOSURELIMITLOW},
-	{0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH},
-	{0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID},
-	{0xa0, 0x3a, ZC3XX_R197_ANTIFLICKERLOW},
-	{0xa0, 0x10, ZC3XX_R18C_AEFREEZE},
-	{0xa0, 0x20, ZC3XX_R18F_AEUNFREEZE},
-	{0xa0, 0x0c, ZC3XX_R1A9_DIGITALLIMITDIFF},
-	{0xa0, 0x28, ZC3XX_R1AA_DIGITALGAINSTEP},
-	{0xa0, 0x04, ZC3XX_R01D_HSYNC_0},
-	{0xa0, 0x0f, ZC3XX_R01E_HSYNC_1},
-	{0xa0, 0x19, ZC3XX_R01F_HSYNC_2},
-	{0xa0, 0x1f, ZC3XX_R020_HSYNC_3},
-	{0xa0, 0x60, ZC3XX_R11D_GLOBALGAIN},
-	{0xa0, 0x60, ZC3XX_R11D_GLOBALGAIN},
-	{0xa0, 0x42, ZC3XX_R180_AUTOCORRECTENABLE},
-	{0xa0, 0x42, ZC3XX_R180_AUTOCORRECTENABLE},
-	{0xa0, 0x60, ZC3XX_R116_RGAIN},
-	{0xa0, 0x40, ZC3XX_R117_GGAIN},
-	{0xa0, 0x4c, ZC3XX_R118_BGAIN},
-	{0xa0, 0x04, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x20, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x01, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x21, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x5c, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x18, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x00, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x13, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x5c, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x14, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x01, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x18, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x04, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x00, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x04, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x00, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x04, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x20, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x01, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x21, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x96, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x18, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x00, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x13, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x96, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x14, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x01, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x18, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x04, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x00, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x04, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x00, ZC3XX_R1A7_CALCGLOBALMEAN},
 	{}
 };
-
-static const struct usb_action cs2102K_Initial[] = {
+static const struct usb_action cs2102k_InitialScale[] = {
 	{0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL},
-	{0xa0, 0x00, ZC3XX_R002_CLOCKSELECT},
+	{0xa0, 0x11, ZC3XX_R002_CLOCKSELECT},
 	{0xa0, 0x03, ZC3XX_R008_CLOCKSETTING},
 	{0xa0, 0x08, ZC3XX_R010_CMOSSENSORSELECT},
 	{0xa0, 0x02, ZC3XX_R003_FRAMEWIDTHHIGH},
@@ -955,81 +767,26 @@
 	{0xa0, 0x00, ZC3XX_R11C_FIRSTXLOW},
 	{0xa0, 0xe8, ZC3XX_R09C_WINHEIGHTLOW},
 	{0xa0, 0x88, ZC3XX_R09E_WINWIDTHLOW},
-/*fixme: next sequence = i2c exchanges*/
 	{0xa0, 0x55, ZC3XX_R08B_I2CDEVICEADDR},
-	{0xa0, 0x18, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x00, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x0a, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x02, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x0b, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x02, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x0c, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x7b, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x0d, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0xa3, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x03, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0xfb, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x05, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x00, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x06, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x03, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x09, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x08, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x0e, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x04, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x0f, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x18, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x10, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x18, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x11, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x18, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x12, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x18, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x15, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x00, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x16, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x0c, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x17, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x0c, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x18, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x04, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0xf7, ZC3XX_R101_SENSORCORRECTION},
+	{0xaa, 0x18, 0x0000},
+	{0xaa, 0x0a, 0x0002},
+	{0xaa, 0x0b, 0x0002},
+	{0xaa, 0x0c, 0x007c},
+	{0xaa, 0x0d, 0x00a3},
+	{0xaa, 0x03, 0x00fb},
+	{0xaa, 0x05, 0x0000},
+	{0xaa, 0x06, 0x0003},
+	{0xaa, 0x09, 0x0008},
+	{0xaa, 0x0e, 0x0004},
+	{0xaa, 0x0f, 0x0018},
+	{0xaa, 0x10, 0x0018},
+	{0xaa, 0x11, 0x0018},
+	{0xaa, 0x12, 0x0018},
+	{0xaa, 0x15, 0x0000},
+	{0xaa, 0x16, 0x000c},
+	{0xaa, 0x17, 0x000c},
+	{0xaa, 0x18, 0x0004},
+	{0xa0, 0xb7, ZC3XX_R101_SENSORCORRECTION},
 	{0xa0, 0x05, ZC3XX_R012_VIDEOCONTROLFUNC},
 	{0xa0, 0x78, ZC3XX_R18D_YTARGET},
 	{0xa0, 0x0d, ZC3XX_R100_OPERATIONMODE},
@@ -1042,80 +799,55 @@
 	{0xa0, 0x08, ZC3XX_R301_EEPROMACCESS},
 	{0xa0, 0x00, 0x01ad},
 	{0xa0, 0x01, 0x01b1},
-	{0xa0, 0x02, ZC3XX_R180_AUTOCORRECTENABLE},
-	{0xa0, 0x60, ZC3XX_R116_RGAIN},
-	{0xa0, 0x40, ZC3XX_R117_GGAIN},
-	{0xa0, 0x4c, ZC3XX_R118_BGAIN},
-	{0xa0, 0x03, ZC3XX_R008_CLOCKSETTING},	/* clock ? */
-	{0xa0, 0x08, ZC3XX_R1C6_SHARPNESS00},	/* sharpness+ */
-	{0xa0, 0x0f, ZC3XX_R1CB_SHARPNESS05},	/* sharpness- */
-	{0xa0, 0x13, ZC3XX_R120_GAMMA00},	/* gamma 4 */
-	{0xa0, 0x38, ZC3XX_R121_GAMMA01},
-	{0xa0, 0x59, ZC3XX_R122_GAMMA02},
-	{0xa0, 0x79, ZC3XX_R123_GAMMA03},
-	{0xa0, 0x92, ZC3XX_R124_GAMMA04},
-	{0xa0, 0xa7, ZC3XX_R125_GAMMA05},
-	{0xa0, 0xb9, ZC3XX_R126_GAMMA06},
-	{0xa0, 0xc8, ZC3XX_R127_GAMMA07},
-	{0xa0, 0xd4, ZC3XX_R128_GAMMA08},
-	{0xa0, 0xdf, ZC3XX_R129_GAMMA09},
-	{0xa0, 0xe7, ZC3XX_R12A_GAMMA0A},
-	{0xa0, 0xee, ZC3XX_R12B_GAMMA0B},
-	{0xa0, 0xf4, ZC3XX_R12C_GAMMA0C},
-	{0xa0, 0xf9, ZC3XX_R12D_GAMMA0D},
-	{0xa0, 0xfc, ZC3XX_R12E_GAMMA0E},
-	{0xa0, 0xff, ZC3XX_R12F_GAMMA0F},
-	{0xa0, 0x26, ZC3XX_R130_GAMMA10},
-	{0xa0, 0x22, ZC3XX_R131_GAMMA11},
-	{0xa0, 0x20, ZC3XX_R132_GAMMA12},
-	{0xa0, 0x1c, ZC3XX_R133_GAMMA13},
-	{0xa0, 0x16, ZC3XX_R134_GAMMA14},
-	{0xa0, 0x13, ZC3XX_R135_GAMMA15},
-	{0xa0, 0x10, ZC3XX_R136_GAMMA16},
-	{0xa0, 0x0d, ZC3XX_R137_GAMMA17},
-	{0xa0, 0x0b, ZC3XX_R138_GAMMA18},
-	{0xa0, 0x09, ZC3XX_R139_GAMMA19},
-	{0xa0, 0x07, ZC3XX_R13A_GAMMA1A},
-	{0xa0, 0x06, ZC3XX_R13B_GAMMA1B},
-	{0xa0, 0x05, ZC3XX_R13C_GAMMA1C},
-	{0xa0, 0x04, ZC3XX_R13D_GAMMA1D},
-	{0xa0, 0x03, ZC3XX_R13E_GAMMA1E},
-	{0xa0, 0x02, ZC3XX_R13F_GAMMA1F},
-	{0xa0, 0x58, ZC3XX_R10A_RGB00},	/* matrix */
-	{0xa0, 0xf4, ZC3XX_R10B_RGB01},
-	{0xa0, 0xf4, ZC3XX_R10C_RGB02},
-	{0xa0, 0xf4, ZC3XX_R10D_RGB10},
-	{0xa0, 0x58, ZC3XX_R10E_RGB11},
-	{0xa0, 0xf4, ZC3XX_R10F_RGB12},
-	{0xa0, 0xf4, ZC3XX_R110_RGB20},
-	{0xa0, 0xf4, ZC3XX_R111_RGB21},
-	{0xa0, 0x58, ZC3XX_R112_RGB22},
-	{0xa0, 0x00, ZC3XX_R180_AUTOCORRECTENABLE},
+	{}
+};
+static const struct usb_action cs2102k_50HZ[] = {
+	{0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS},
+	{0xaa, 0x18, 0x0000},	/* control 2 */
+	{0xdd, 0x00, 0x0020},
+	{0xaa, 0x13, 0x0018},	/* row exposure low */
+	{0xdd, 0x00, 0x0020},
+	{0xaa, 0x14, 0x0001},	/* row exposure high */
+	{0xdd, 0x00, 0x0020},
+	{0xaa, 0x20, 0x0001},	/* ?? */
+	{0xdd, 0x00, 0x0020},
+	{0xaa, 0x21, 0x0018},
+	{0xdd, 0x00, 0x0020},
+	{0xaa, 0x18, 0x0004},	/* control 2 */
+	{0xdd, 0x00, 0x0020},
+	{0xa0, 0x01, ZC3XX_R0A3_EXPOSURETIMEHIGH},
+	{0xa0, 0x18, ZC3XX_R0A4_EXPOSURETIMELOW},
+	{0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH},
+	{0xa0, 0x07, ZC3XX_R191_EXPOSURELIMITMID},
+	{0xa0, 0xee, ZC3XX_R192_EXPOSURELIMITLOW},
+	{0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH},
+	{0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID},
+	{0xa0, 0x46, ZC3XX_R197_ANTIFLICKERLOW},
+	{0xa0, 0x10, ZC3XX_R18C_AEFREEZE},
+	{0xa0, 0x20, ZC3XX_R18F_AEUNFREEZE},
+	{0xa0, 0x0c, ZC3XX_R1A9_DIGITALLIMITDIFF},
+	{0xa0, 0x28, ZC3XX_R1AA_DIGITALGAINSTEP},
+	{0xa0, 0x04, ZC3XX_R01D_HSYNC_0},
+	{0xa0, 0x0f, ZC3XX_R01E_HSYNC_1},
+	{0xa0, 0x19, ZC3XX_R01F_HSYNC_2},
+	{0xa0, 0x1f, ZC3XX_R020_HSYNC_3},
+	{0xa0, 0x60, ZC3XX_R11D_GLOBALGAIN},
+	{}
+};
+static const struct usb_action cs2102k_60HZ[] = {
 	{0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS},
-	{0xa0, 0x18, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x00, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x13, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x22, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x14, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x01, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x20, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x01, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x21, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x22, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x18, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x04, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
+	{0xaa, 0x18, 0x0000},
+	{0xdd, 0x00, 0x0020},
+	{0xaa, 0x13, 0x0022},
+	{0xdd, 0x00, 0x0020},
+	{0xaa, 0x14, 0x0001},
+	{0xdd, 0x00, 0x0020},
+	{0xaa, 0x20, 0x0001},
+	{0xdd, 0x00, 0x0020},
+	{0xaa, 0x21, 0x0022},
+	{0xdd, 0x00, 0x0020},
+	{0xaa, 0x18, 0x0004},
+	{0xdd, 0x00, 0x0020},
 	{0xa0, 0x01, ZC3XX_R0A3_EXPOSURETIMEHIGH},
 	{0xa0, 0x22, ZC3XX_R0A4_EXPOSURETIMELOW},
 	{0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH},
@@ -1133,187 +865,42 @@
 	{0xa0, 0x19, ZC3XX_R01F_HSYNC_2},
 	{0xa0, 0x1f, ZC3XX_R020_HSYNC_3},
 	{0xa0, 0x60, ZC3XX_R11D_GLOBALGAIN},
+	{}
+};
+static const struct usb_action cs2102k_NoFliker[] = {
+	{0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS},
+	{0xaa, 0x18, 0x0000},
+	{0xdd, 0x00, 0x0020},
+	{0xaa, 0x13, 0x0010},
+	{0xdd, 0x00, 0x0020},
+	{0xaa, 0x14, 0x0001},
+	{0xdd, 0x00, 0x0020},
+	{0xaa, 0x20, 0x0001},
+	{0xdd, 0x00, 0x0020},
+	{0xaa, 0x21, 0x0010},
+	{0xdd, 0x00, 0x0020},
+	{0xaa, 0x18, 0x0004},
+	{0xdd, 0x00, 0x0020},
+	{0xa0, 0x01, ZC3XX_R0A3_EXPOSURETIMEHIGH},
+	{0xa0, 0x10, ZC3XX_R0A4_EXPOSURETIMELOW},
+	{0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH},
+	{0xa0, 0x07, ZC3XX_R191_EXPOSURELIMITMID},
+	{0xa0, 0xf0, ZC3XX_R192_EXPOSURELIMITLOW},
+	{0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH},
+	{0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID},
+	{0xa0, 0x10, ZC3XX_R197_ANTIFLICKERLOW},
+	{0xa0, 0x10, ZC3XX_R18C_AEFREEZE},
+	{0xa0, 0x20, ZC3XX_R18F_AEUNFREEZE},
+	{0xa0, 0x00, ZC3XX_R1A9_DIGITALLIMITDIFF},
+	{0xa0, 0x00, ZC3XX_R1AA_DIGITALGAINSTEP},
+	{0xa0, 0x04, ZC3XX_R01D_HSYNC_0},
+	{0xa0, 0x0f, ZC3XX_R01E_HSYNC_1},
+	{0xa0, 0x19, ZC3XX_R01F_HSYNC_2},
+	{0xa0, 0x1f, ZC3XX_R020_HSYNC_3},
 	{0xa0, 0x60, ZC3XX_R11D_GLOBALGAIN},
-	{0xa0, 0x42, ZC3XX_R180_AUTOCORRECTENABLE},
-	{0xa0, 0x42, ZC3XX_R180_AUTOCORRECTENABLE},
-	{0xa0, 0x60, ZC3XX_R116_RGAIN},
-	{0xa0, 0x40, ZC3XX_R117_GGAIN},
-	{0xa0, 0x4c, ZC3XX_R118_BGAIN},
-	{0xa0, 0x04, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x20, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x01, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x21, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x5c, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x18, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x00, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x13, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x5c, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x14, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x01, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x18, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x04, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x00, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x04, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x00, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x04, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x20, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x01, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x21, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x96, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x18, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x00, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x13, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x96, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x14, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x01, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x18, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x04, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x00, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x04, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x00, ZC3XX_R1A7_CALCGLOBALMEAN},
-/*fixme:what does the next sequence?*/
-	{0xa0, 0x04, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x00, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x04, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x20, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x01, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x21, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0xd0, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x18, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x00, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x13, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0xd0, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x14, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x01, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x18, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x04, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x00, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x02, ZC3XX_R008_CLOCKSETTING},
-	{0xa0, 0x04, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x00, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x04, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x20, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x02, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x21, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x0a, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x18, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x00, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x13, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x0a, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x14, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x02, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x18, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x04, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x00, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x04, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x00, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x04, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x20, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x02, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x21, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x44, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x18, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x00, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x13, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x44, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x14, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x02, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x18, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x04, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x00, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x04, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x00, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x04, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x20, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x02, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x21, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x7e, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x18, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x00, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x13, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x7e, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x14, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x02, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x18, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x04, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x00, ZC3XX_R094_I2CWRITEACK},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa0, 0x00, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x04, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x00, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x04, ZC3XX_R1A7_CALCGLOBALMEAN},
 	{}
 };
+#endif
 
 static const struct usb_action gc0305_Initial[] = {	/* 640x480 */
 	{0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL},	/* 00,00,01,cc */
@@ -1515,10 +1102,11 @@
 	{}
 };
 
+/* from usbvm303.inf for 0ac8:303b 07/08/30 */
 static const struct usb_action hdcs2020_InitialScale[] = {
 	{0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL},
 	{0xa0, 0x11, ZC3XX_R002_CLOCKSELECT},
-	{0xa0, 0x03, ZC3XX_R008_CLOCKSETTING},	/* qtable 0x05 */
+	{0xa0, 0x00, ZC3XX_R008_CLOCKSETTING},
 	{0xa0, 0x08, ZC3XX_R010_CMOSSENSORSELECT},
 	{0xa0, 0x02, ZC3XX_R003_FRAMEWIDTHHIGH},
 	{0xa0, 0x80, ZC3XX_R004_FRAMEWIDTHLOW},
@@ -1533,6 +1121,7 @@
 	{0xa0, 0x00, ZC3XX_R11C_FIRSTXLOW},
 	{0xa0, 0xe8, ZC3XX_R09C_WINHEIGHTLOW},
 	{0xa0, 0x88, ZC3XX_R09E_WINWIDTHLOW},
+	{0xa0, 0x55, ZC3XX_R08B_I2CDEVICEADDR},	/* added for kmc-90 */
 	{0xaa, 0x1c, 0x0000},
 	{0xaa, 0x0a, 0x0001},
 	{0xaa, 0x0b, 0x0006},
@@ -1549,7 +1138,10 @@
 	{0xaa, 0x12, 0x0018},
 
 	{0xaa, 0x15, 0x004e},
-	{0xaa, 0x1c, 0x0004},
+/*	{0xaa, 0x1c, 0x0004},	 * removed for kmc-90 */
+	{0xaa, 0x16, 0x000c},	/* added for kmc-90 */
+	{0xaa, 0x17, 0x000c},
+	{0xaa, 0x18, 0x0004},
 	{0xa0, 0xb7, ZC3XX_R101_SENSORCORRECTION},
 	{0xa0, 0x05, ZC3XX_R012_VIDEOCONTROLFUNC},
 	{0xa0, 0x70, ZC3XX_R18D_YTARGET},
@@ -1559,98 +1151,12 @@
 	{0xa0, 0x13, ZC3XX_R1CB_SHARPNESS05},
 	{0xa0, 0x08, ZC3XX_R250_DEADPIXELSMODE},
 	{0xa0, 0x08, ZC3XX_R301_EEPROMACCESS},
-	{0xa1, 0x01, 0x0002},
-	{0xa1, 0x01, 0x0008},
-	{0xa1, 0x01, 0x0180},
-	{0xa0, 0x02, ZC3XX_R180_AUTOCORRECTENABLE},
-	{0xa0, 0x40, ZC3XX_R116_RGAIN},
-	{0xa0, 0x40, ZC3XX_R117_GGAIN},
-	{0xa0, 0x40, ZC3XX_R118_BGAIN},
-	{0xa1, 0x01, 0x0008},
-	{0xa0, 0x03, ZC3XX_R008_CLOCKSETTING},	/* clock ? */
-	{0xa0, 0x08, ZC3XX_R1C6_SHARPNESS00},	/* sharpness+ */
-	{0xa1, 0x01, 0x01c8},
-	{0xa1, 0x01, 0x01c9},
-	{0xa1, 0x01, 0x01ca},
-	{0xa0, 0x0f, ZC3XX_R1CB_SHARPNESS05},	/* sharpness- */
-	{0xa0, 0x13, ZC3XX_R120_GAMMA00},	/* gamma 4 */
-	{0xa0, 0x38, ZC3XX_R121_GAMMA01},
-	{0xa0, 0x59, ZC3XX_R122_GAMMA02},
-	{0xa0, 0x79, ZC3XX_R123_GAMMA03},
-	{0xa0, 0x92, ZC3XX_R124_GAMMA04},
-	{0xa0, 0xa7, ZC3XX_R125_GAMMA05},
-	{0xa0, 0xb9, ZC3XX_R126_GAMMA06},
-	{0xa0, 0xc8, ZC3XX_R127_GAMMA07},
-	{0xa0, 0xd4, ZC3XX_R128_GAMMA08},
-	{0xa0, 0xdf, ZC3XX_R129_GAMMA09},
-	{0xa0, 0xe7, ZC3XX_R12A_GAMMA0A},
-	{0xa0, 0xee, ZC3XX_R12B_GAMMA0B},
-	{0xa0, 0xf4, ZC3XX_R12C_GAMMA0C},
-	{0xa0, 0xf9, ZC3XX_R12D_GAMMA0D},
-	{0xa0, 0xfc, ZC3XX_R12E_GAMMA0E},
-	{0xa0, 0xff, ZC3XX_R12F_GAMMA0F},
-	{0xa0, 0x26, ZC3XX_R130_GAMMA10},
-	{0xa0, 0x22, ZC3XX_R131_GAMMA11},
-	{0xa0, 0x20, ZC3XX_R132_GAMMA12},
-	{0xa0, 0x1c, ZC3XX_R133_GAMMA13},
-	{0xa0, 0x16, ZC3XX_R134_GAMMA14},
-	{0xa0, 0x13, ZC3XX_R135_GAMMA15},
-	{0xa0, 0x10, ZC3XX_R136_GAMMA16},
-	{0xa0, 0x0d, ZC3XX_R137_GAMMA17},
-	{0xa0, 0x0b, ZC3XX_R138_GAMMA18},
-	{0xa0, 0x09, ZC3XX_R139_GAMMA19},
-	{0xa0, 0x07, ZC3XX_R13A_GAMMA1A},
-	{0xa0, 0x06, ZC3XX_R13B_GAMMA1B},
-	{0xa0, 0x05, ZC3XX_R13C_GAMMA1C},
-	{0xa0, 0x04, ZC3XX_R13D_GAMMA1D},
-	{0xa0, 0x03, ZC3XX_R13E_GAMMA1E},
-	{0xa0, 0x02, ZC3XX_R13F_GAMMA1F},
-
-	{0xa0, 0x66, ZC3XX_R10A_RGB00},	/* matrix */
-	{0xa0, 0xed, ZC3XX_R10B_RGB01},
-	{0xa0, 0xed, ZC3XX_R10C_RGB02},
-	{0xa0, 0xed, ZC3XX_R10D_RGB10},
-	{0xa0, 0x66, ZC3XX_R10E_RGB11},
-	{0xa0, 0xed, ZC3XX_R10F_RGB12},
-	{0xa0, 0xed, ZC3XX_R110_RGB20},
-	{0xa0, 0xed, ZC3XX_R111_RGB21},
-	{0xa0, 0x66, ZC3XX_R112_RGB22},
-
-	{0xa1, 0x01, 0x0180},
-	{0xa0, 0x00, ZC3XX_R180_AUTOCORRECTENABLE},
-	{0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS},
-	{0xaa, 0x13, 0x0031},
-	{0xaa, 0x14, 0x0001},
-	{0xaa, 0x0e, 0x0004},
-	{0xaa, 0x19, 0x00cd},
-	{0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH},
-	{0xa0, 0x02, ZC3XX_R191_EXPOSURELIMITMID},
-	{0xa0, 0x62, ZC3XX_R192_EXPOSURELIMITLOW},
-	{0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH},
-	{0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID},
-	{0xa0, 0x3d, ZC3XX_R197_ANTIFLICKERLOW},
-	{0xa0, 0x10, ZC3XX_R18C_AEFREEZE},
-	{0xa0, 0x20, ZC3XX_R18F_AEUNFREEZE},
-
-	{0xa0, 0x0c, ZC3XX_R1A9_DIGITALLIMITDIFF},	/* 0x14 */
-	{0xa0, 0x28, ZC3XX_R1AA_DIGITALGAINSTEP},
-	{0xa0, 0x04, ZC3XX_R01D_HSYNC_0},
-	{0xa0, 0x18, ZC3XX_R01E_HSYNC_1},
-	{0xa0, 0x2c, ZC3XX_R01F_HSYNC_2},
-	{0xa0, 0x41, ZC3XX_R020_HSYNC_3},
-	{0xa0, 0x60, ZC3XX_R11D_GLOBALGAIN},
-	{0xa0, 0x42, ZC3XX_R180_AUTOCORRECTENABLE},
-	{0xa1, 0x01, 0x0180},
-	{0xa0, 0x42, ZC3XX_R180_AUTOCORRECTENABLE},
-	{0xa0, 0x40, ZC3XX_R116_RGAIN},
-	{0xa0, 0x40, ZC3XX_R117_GGAIN},
-	{0xa0, 0x40, ZC3XX_R118_BGAIN},
 	{}
 };
 static const struct usb_action hdcs2020_Initial[] = {
 	{0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL},
 	{0xa0, 0x00, ZC3XX_R002_CLOCKSELECT},
-	{0xa0, 0x03, ZC3XX_R008_CLOCKSETTING},
+	{0xa0, 0x00, ZC3XX_R008_CLOCKSETTING},
 	{0xa0, 0x08, ZC3XX_R010_CMOSSENSORSELECT},
 	{0xa0, 0x02, ZC3XX_R003_FRAMEWIDTHHIGH},
 	{0xa0, 0x80, ZC3XX_R004_FRAMEWIDTHLOW},
@@ -1665,21 +1171,25 @@
 	{0xa0, 0x00, ZC3XX_R11C_FIRSTXLOW},
 	{0xa0, 0xe8, ZC3XX_R09C_WINHEIGHTLOW},
 	{0xa0, 0x88, ZC3XX_R09E_WINWIDTHLOW},
-	{0xaa, 0x1c, 0x0000},
-	{0xaa, 0x0a, 0x0001},
-	{0xaa, 0x0b, 0x0006},
-	{0xaa, 0x0c, 0x007a},
-	{0xaa, 0x0d, 0x00a7},
-	{0xaa, 0x03, 0x00fb},
-	{0xaa, 0x05, 0x0000},
-	{0xaa, 0x06, 0x0003},
-	{0xaa, 0x09, 0x0008},
-	{0xaa, 0x0f, 0x0018},	/* original setting */
-	{0xaa, 0x10, 0x0018},
-	{0xaa, 0x11, 0x0018},
-	{0xaa, 0x12, 0x0018},
-	{0xaa, 0x15, 0x004e},
-	{0xaa, 0x1c, 0x0004},
+	{0xa0, 0x55, ZC3XX_R08B_I2CDEVICEADDR},	/* added for kmc-90 */
+	{0xaa, 0x1c, 0x0000},	/* control */
+	{0xaa, 0x0a, 0x0001},	/* first window row */
+	{0xaa, 0x0b, 0x0006},	/* first window column */
+	{0xaa, 0x0c, 0x007a},	/* last window row */
+	{0xaa, 0x0d, 0x00a7},	/* last window column */
+	{0xaa, 0x03, 0x00fb},	/* pad control */
+	{0xaa, 0x05, 0x0000},	/* interface control */
+	{0xaa, 0x06, 0x0003},	/* interface timing */
+	{0xaa, 0x09, 0x0008},	/* ADC control */
+	{0xaa, 0x0f, 0x0018},	/* green 1 gain */
+	{0xaa, 0x10, 0x0018},	/* red gain */
+	{0xaa, 0x11, 0x0018},	/* blue gain */
+	{0xaa, 0x12, 0x0018},	/* green 2 gain */
+	{0xaa, 0x15, 0x004e},	/* sub-row exposure */
+/*	{0xaa, 0x1c, 0x0004},	 * control - removed for kmc-90 */
+	{0xaa, 0x16, 0x000c},	/* error control - added for kmc-90 */
+	{0xaa, 0x17, 0x000c},	/* interface timing 2 */
+	{0xaa, 0x18, 0x0004},	/* control 2 */
 	{0xa0, 0xf7, ZC3XX_R101_SENSORCORRECTION},
 	{0xa0, 0x05, ZC3XX_R012_VIDEOCONTROLFUNC},
 	{0xa0, 0x70, ZC3XX_R18D_YTARGET},
@@ -1689,98 +1199,14 @@
 	{0xa0, 0x13, ZC3XX_R1CB_SHARPNESS05},
 	{0xa0, 0x08, ZC3XX_R250_DEADPIXELSMODE},
 	{0xa0, 0x08, ZC3XX_R301_EEPROMACCESS},
-	{0xa1, 0x01, 0x0002},
-	{0xa1, 0x01, 0x0008},
-	{0xa1, 0x01, 0x0180},
-	{0xa0, 0x02, ZC3XX_R180_AUTOCORRECTENABLE},
-	{0xa0, 0x40, ZC3XX_R116_RGAIN},
-	{0xa0, 0x40, ZC3XX_R117_GGAIN},
-	{0xa0, 0x40, ZC3XX_R118_BGAIN},
-	{0xa1, 0x01, 0x0008},
-	{0xa0, 0x03, ZC3XX_R008_CLOCKSETTING},	/* clock ? */
-	{0xa0, 0x08, ZC3XX_R1C6_SHARPNESS00},	/* sharpness+ */
-	{0xa1, 0x01, 0x01c8},
-	{0xa1, 0x01, 0x01c9},
-	{0xa1, 0x01, 0x01ca},
-	{0xa0, 0x0f, ZC3XX_R1CB_SHARPNESS05},	/* sharpness- */
-	{0xa0, 0x13, ZC3XX_R120_GAMMA00},	/* gamma 4 */
-	{0xa0, 0x38, ZC3XX_R121_GAMMA01},
-	{0xa0, 0x59, ZC3XX_R122_GAMMA02},
-	{0xa0, 0x79, ZC3XX_R123_GAMMA03},
-	{0xa0, 0x92, ZC3XX_R124_GAMMA04},
-	{0xa0, 0xa7, ZC3XX_R125_GAMMA05},
-	{0xa0, 0xb9, ZC3XX_R126_GAMMA06},
-	{0xa0, 0xc8, ZC3XX_R127_GAMMA07},
-	{0xa0, 0xd4, ZC3XX_R128_GAMMA08},
-	{0xa0, 0xdf, ZC3XX_R129_GAMMA09},
-	{0xa0, 0xe7, ZC3XX_R12A_GAMMA0A},
-	{0xa0, 0xee, ZC3XX_R12B_GAMMA0B},
-	{0xa0, 0xf4, ZC3XX_R12C_GAMMA0C},
-	{0xa0, 0xf9, ZC3XX_R12D_GAMMA0D},
-	{0xa0, 0xfc, ZC3XX_R12E_GAMMA0E},
-	{0xa0, 0xff, ZC3XX_R12F_GAMMA0F},
-	{0xa0, 0x26, ZC3XX_R130_GAMMA10},
-	{0xa0, 0x22, ZC3XX_R131_GAMMA11},
-	{0xa0, 0x20, ZC3XX_R132_GAMMA12},
-	{0xa0, 0x1c, ZC3XX_R133_GAMMA13},
-	{0xa0, 0x16, ZC3XX_R134_GAMMA14},
-	{0xa0, 0x13, ZC3XX_R135_GAMMA15},
-	{0xa0, 0x10, ZC3XX_R136_GAMMA16},
-	{0xa0, 0x0d, ZC3XX_R137_GAMMA17},
-	{0xa0, 0x0b, ZC3XX_R138_GAMMA18},
-	{0xa0, 0x09, ZC3XX_R139_GAMMA19},
-	{0xa0, 0x07, ZC3XX_R13A_GAMMA1A},
-	{0xa0, 0x06, ZC3XX_R13B_GAMMA1B},
-	{0xa0, 0x05, ZC3XX_R13C_GAMMA1C},
-	{0xa0, 0x04, ZC3XX_R13D_GAMMA1D},
-	{0xa0, 0x03, ZC3XX_R13E_GAMMA1E},
-	{0xa0, 0x02, ZC3XX_R13F_GAMMA1F},
-	{0xa0, 0x66, ZC3XX_R10A_RGB00},	/* matrix */
-	{0xa0, 0xed, ZC3XX_R10B_RGB01},
-	{0xa0, 0xed, ZC3XX_R10C_RGB02},
-	{0xa0, 0xed, ZC3XX_R10D_RGB10},
-	{0xa0, 0x66, ZC3XX_R10E_RGB11},
-	{0xa0, 0xed, ZC3XX_R10F_RGB12},
-	{0xa0, 0xed, ZC3XX_R110_RGB20},
-	{0xa0, 0xed, ZC3XX_R111_RGB21},
-	{0xa0, 0x66, ZC3XX_R112_RGB22},
-	{0xa1, 0x01, 0x0180},
-	{0xa0, 0x00, ZC3XX_R180_AUTOCORRECTENABLE},
-	{0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS},
- /**** set exposure ***/
-	{0xaa, 0x13, 0x0031},
-	{0xaa, 0x14, 0x0001},
-	{0xaa, 0x0e, 0x0004},
-	{0xaa, 0x19, 0x00cd},
-	{0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH},
-	{0xa0, 0x02, ZC3XX_R191_EXPOSURELIMITMID},
-	{0xa0, 0x62, ZC3XX_R192_EXPOSURELIMITLOW},
-	{0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH},
-	{0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID},
-	{0xa0, 0x3d, ZC3XX_R197_ANTIFLICKERLOW},
-	{0xa0, 0x10, ZC3XX_R18C_AEFREEZE},
-	{0xa0, 0x20, ZC3XX_R18F_AEUNFREEZE},
-	{0xa0, 0x0c, ZC3XX_R1A9_DIGITALLIMITDIFF},
-	{0xa0, 0x28, ZC3XX_R1AA_DIGITALGAINSTEP},
-	{0xa0, 0x04, ZC3XX_R01D_HSYNC_0},
-	{0xa0, 0x18, ZC3XX_R01E_HSYNC_1},
-	{0xa0, 0x2c, ZC3XX_R01F_HSYNC_2},
-	{0xa0, 0x41, ZC3XX_R020_HSYNC_3},
-	{0xa0, 0x60, ZC3XX_R11D_GLOBALGAIN},
-	{0xa0, 0x42, ZC3XX_R180_AUTOCORRECTENABLE},
-	{0xa1, 0x01, 0x0180},
-	{0xa0, 0x42, ZC3XX_R180_AUTOCORRECTENABLE},
-	{0xa0, 0x40, ZC3XX_R116_RGAIN},
-	{0xa0, 0x40, ZC3XX_R117_GGAIN},
-	{0xa0, 0x40, ZC3XX_R118_BGAIN},
 	{}
 };
 static const struct usb_action hdcs2020_50HZ[] = {
 	{0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, /* 00,19,00,cc */
-	{0xaa, 0x13, 0x0018},			/* 00,13,18,aa */
-	{0xaa, 0x14, 0x0001},			/* 00,14,01,aa */
-	{0xaa, 0x0e, 0x0005},			/* 00,0e,05,aa */
-	{0xaa, 0x19, 0x001f},			/* 00,19,1f,aa */
+	{0xaa, 0x13, 0x0018},	/* row exposure low */
+	{0xaa, 0x14, 0x0001},	/* row exposure high */
+	{0xaa, 0x0e, 0x0005},	/* timing control */
+	{0xaa, 0x19, 0x001f},	/* horizontal blank */
 	{0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc */
 	{0xa0, 0x02, ZC3XX_R191_EXPOSURELIMITMID}, /* 01,91,02,cc */
 	{0xa0, 0x76, ZC3XX_R192_EXPOSURELIMITLOW}, /* 01,92,76,cc */
@@ -1792,8 +1218,9 @@
 	{0xa0, 0x0c, ZC3XX_R1A9_DIGITALLIMITDIFF}, /* 01,a9,0c,cc */
 	{0xa0, 0x28, ZC3XX_R1AA_DIGITALGAINSTEP}, /* 01,aa,28,cc */
 	{0xa0, 0x05, ZC3XX_R01D_HSYNC_0}, /* 00,1d,05,cc */
-	{0xa0, 0x1a, ZC3XX_R01E_HSYNC_1}, /* 00,1e,1a,cc */
+	{0xa0, 0x1f, ZC3XX_R01E_HSYNC_1},
 	{0xa0, 0x2f, ZC3XX_R01F_HSYNC_2}, /* 00,1f,2f,cc */
+	{0xa0, 0x44, ZC3XX_R020_HSYNC_3},
 	{}
 };
 static const struct usb_action hdcs2020_60HZ[] = {
@@ -1813,8 +1240,9 @@
 	{0xa0, 0x0c, ZC3XX_R1A9_DIGITALLIMITDIFF}, /* 01,a9,0c,cc */
 	{0xa0, 0x28, ZC3XX_R1AA_DIGITALGAINSTEP}, /* 01,aa,28,cc */
 	{0xa0, 0x04, ZC3XX_R01D_HSYNC_0}, /* 00,1d,04,cc */
-	{0xa0, 0x18, ZC3XX_R01E_HSYNC_1}, /* 00,1e,18,cc */
+	{0xa0, 0xcd, ZC3XX_R01E_HSYNC_1},
 	{0xa0, 0x2c, ZC3XX_R01F_HSYNC_2}, /* 00,1f,2c,cc */
+	{0xa0, 0x41, ZC3XX_R020_HSYNC_3},
 	{}
 };
 static const struct usb_action hdcs2020_NoFliker[] = {
@@ -1828,14 +1256,15 @@
 	{0xa0, 0x70, ZC3XX_R192_EXPOSURELIMITLOW}, /* 01,92,70,cc */
 	{0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH}, /* 01,95,00,cc */
 	{0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID}, /* 01,96,00,cc */
-	{0xa0, 0x10, ZC3XX_R197_ANTIFLICKERLOW}, /* 01,97,10,cc */
+	{0xa0, 0x04, ZC3XX_R197_ANTIFLICKERLOW},
 	{0xa0, 0x10, ZC3XX_R18C_AEFREEZE}, /* 01,8c,10,cc */
 	{0xa0, 0x20, ZC3XX_R18F_AEUNFREEZE}, /* 01,8f,20,cc */
 	{0xa0, 0x00, ZC3XX_R1A9_DIGITALLIMITDIFF}, /* 01,a9,00,cc */
 	{0xa0, 0x00, ZC3XX_R1AA_DIGITALGAINSTEP}, /* 01,aa,00,cc */
 	{0xa0, 0x04, ZC3XX_R01D_HSYNC_0}, /* 00,1d,04,cc */
-	{0xa0, 0x17, ZC3XX_R01E_HSYNC_1}, /* 00,1e,17,cc */
+	{0xa0, 0x00, ZC3XX_R01E_HSYNC_1},
 	{0xa0, 0x2a, ZC3XX_R01F_HSYNC_2}, /* 00,1f,2a,cc */
+	{0xa0, 0x3d, ZC3XX_R020_HSYNC_3},
 	{}
 };
 
@@ -2296,6 +1725,7 @@
 	{0xa0, 0xe0, ZC3XX_R006_FRAMEHEIGHTLOW},
 	{0xa0, 0x01, ZC3XX_R001_SYSTEMOPERATING},
 	{0xa0, 0x03, ZC3XX_R012_VIDEOCONTROLFUNC},
+	{0xdd, 0x00, 0x0200},
 	{0xa0, 0x01, ZC3XX_R012_VIDEOCONTROLFUNC},
 	{0xa0, 0xa1, ZC3XX_R08B_I2CDEVICEADDR},
 	{0xa0, 0x00, ZC3XX_R097_WINYSTARTHIGH},
@@ -2395,70 +1825,7 @@
 	{0xaa, 0x00, 0x0084},
 	{0xa0, 0x08, ZC3XX_R250_DEADPIXELSMODE},
 	{0xa0, 0x08, ZC3XX_R301_EEPROMACCESS},
-	{0xaa, 0xa8, 0x00c0},
-	{0xa1, 0x01, 0x0002},
-	{0xa1, 0x01, 0x0008},
-	{0xa1, 0x01, 0x0180},
-	{0xa0, 0x02, ZC3XX_R180_AUTOCORRECTENABLE},
-	{0xa0, 0x40, ZC3XX_R116_RGAIN},
-	{0xa0, 0x40, ZC3XX_R117_GGAIN},
-	{0xa0, 0x40, ZC3XX_R118_BGAIN},
-	{0xa1, 0x01, 0x0008},
-
-	{0xa0, 0x03, ZC3XX_R008_CLOCKSETTING},	/* clock ? */
-	{0xa0, 0x08, ZC3XX_R1C6_SHARPNESS00},	/* sharpness+ */
-	{0xa1, 0x01, 0x01c8},
-	{0xa1, 0x01, 0x01c9},
-	{0xa1, 0x01, 0x01ca},
-	{0xa0, 0x0f, ZC3XX_R1CB_SHARPNESS05},	/* sharpness- */
-	{0xa0, 0x52, ZC3XX_R10A_RGB00},	/* matrix */
-	{0xa0, 0xf7, ZC3XX_R10B_RGB01},
-	{0xa0, 0xf7, ZC3XX_R10C_RGB02},
-	{0xa0, 0xf7, ZC3XX_R10D_RGB10},
-	{0xa0, 0x52, ZC3XX_R10E_RGB11},
-	{0xa0, 0xf7, ZC3XX_R10F_RGB12},
-	{0xa0, 0xf7, ZC3XX_R110_RGB20},
-	{0xa0, 0xf7, ZC3XX_R111_RGB21},
-	{0xa0, 0x52, ZC3XX_R112_RGB22},
-	{0xa1, 0x01, 0x0180},
-	{0xa0, 0x00, ZC3XX_R180_AUTOCORRECTENABLE},
-	{0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS},
-	{0xaa, 0x0d, 0x0003},
-	{0xaa, 0x0c, 0x008c},
-	{0xaa, 0x0e, 0x0095},
-	{0xaa, 0x0f, 0x0002},
-	{0xaa, 0x1c, 0x0094},
-	{0xaa, 0x1d, 0x0002},
-	{0xaa, 0x20, 0x0080},
-	{0xaa, 0x22, 0x0080},
-	{0xaa, 0x24, 0x0080},
-	{0xaa, 0x26, 0x0080},
-	{0xaa, 0x00, 0x0084},
-	{0xa0, 0x02, ZC3XX_R0A3_EXPOSURETIMEHIGH},
-	{0xa0, 0x94, ZC3XX_R0A4_EXPOSURETIMELOW},
-	{0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH},
-	{0xa0, 0x04, ZC3XX_R191_EXPOSURELIMITMID},
-	{0xa0, 0x20, ZC3XX_R192_EXPOSURELIMITLOW},
-	{0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH},
-	{0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID},
-	{0xa0, 0x84, ZC3XX_R197_ANTIFLICKERLOW},
-	{0xa0, 0x10, ZC3XX_R18C_AEFREEZE},
-	{0xa0, 0x20, ZC3XX_R18F_AEUNFREEZE},
-	{0xa0, 0x10, ZC3XX_R1A9_DIGITALLIMITDIFF},
-	{0xa0, 0x12, ZC3XX_R1AA_DIGITALGAINSTEP},
-	{0xa0, 0xe3, ZC3XX_R01D_HSYNC_0},
-	{0xa0, 0xec, ZC3XX_R01E_HSYNC_1},
-	{0xa0, 0xf5, ZC3XX_R01F_HSYNC_2},
-	{0xa0, 0xff, ZC3XX_R020_HSYNC_3},
-	{0xa0, 0x00, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0xc0, ZC3XX_R1A8_DIGITALGAIN},
-	{0xa0, 0xc0, ZC3XX_R11D_GLOBALGAIN},
-	{0xa0, 0x42, ZC3XX_R180_AUTOCORRECTENABLE},
-	{0xa1, 0x01, 0x0180},
-	{0xa0, 0x42, ZC3XX_R180_AUTOCORRECTENABLE},
-	{0xa0, 0x40, ZC3XX_R116_RGAIN},
-	{0xa0, 0x40, ZC3XX_R117_GGAIN},
-	{0xa0, 0x40, ZC3XX_R118_BGAIN},
+	{0xaa, 0xa8, 0x01c0},
 	{}
 };
 
@@ -2473,6 +1840,7 @@
 	{0xa0, 0xe0, ZC3XX_R006_FRAMEHEIGHTLOW},
 	{0xa0, 0x01, ZC3XX_R001_SYSTEMOPERATING},
 	{0xa0, 0x03, ZC3XX_R012_VIDEOCONTROLFUNC},
+	{0xdd, 0x00, 0x0200},
 	{0xa0, 0x01, ZC3XX_R012_VIDEOCONTROLFUNC},
 	{0xa0, 0xa1, ZC3XX_R08B_I2CDEVICEADDR},
 	{0xa0, 0x00, ZC3XX_R097_WINYSTARTHIGH},
@@ -2517,10 +1885,7 @@
 	{0xaa, 0x06, 0x000d},
 	{0xaa, 0x08, 0x0000},
 	{0xaa, 0x03, 0x0005},
-	{0xa0, 0x04, ZC3XX_R092_I2CADDRESSSELECT},
-	{0xa0, 0x19, ZC3XX_R093_I2CSETVALUE},
-	{0xa0, 0x01, ZC3XX_R090_I2CCOMMAND},
-	{0xa1, 0x01, 0x0091},
+	{0xaa, 0x04, 0x0019},
 	{0xaa, 0x05, 0x0020},
 	{0xaa, 0x06, 0x0005},
 	{0xaa, 0x08, 0x0000},
@@ -2575,198 +1940,108 @@
 	{0xaa, 0x00, 0x0084},
 	{0xa0, 0x08, ZC3XX_R250_DEADPIXELSMODE},
 	{0xa0, 0x08, ZC3XX_R301_EEPROMACCESS},
-	{0xaa, 0xa8, 0x0080},
+	{0xaa, 0xa8, 0x0180},
 	{0xa0, 0x78, ZC3XX_R18D_YTARGET},
-	{0xa1, 0x01, 0x0002},
-	{0xa1, 0x01, 0x0008},
-	{0xa1, 0x01, 0x0180},
-	{0xa0, 0x02, ZC3XX_R180_AUTOCORRECTENABLE},
-	{0xa0, 0x40, ZC3XX_R116_RGAIN},
-	{0xa0, 0x40, ZC3XX_R117_GGAIN},
-	{0xa0, 0x40, ZC3XX_R118_BGAIN},
-	{0xa1, 0x01, 0x0008},
-
-	{0xa0, 0x03, ZC3XX_R008_CLOCKSETTING},	/* clock ? */
-	{0xa0, 0x08, ZC3XX_R1C6_SHARPNESS00},	/* sharpness+ */
-	{0xa1, 0x01, 0x01c8},
-	{0xa1, 0x01, 0x01c9},
-	{0xa1, 0x01, 0x01ca},
-	{0xa0, 0x0f, ZC3XX_R1CB_SHARPNESS05},	/* sharpness- */
-
-	{0xa0, 0x52, ZC3XX_R10A_RGB00},	/* matrix */
-	{0xa0, 0xf7, ZC3XX_R10B_RGB01},
-	{0xa0, 0xf7, ZC3XX_R10C_RGB02},
-	{0xa0, 0xf7, ZC3XX_R10D_RGB10},
-	{0xa0, 0x52, ZC3XX_R10E_RGB11},
-	{0xa0, 0xf7, ZC3XX_R10F_RGB12},
-	{0xa0, 0xf7, ZC3XX_R110_RGB20},
-	{0xa0, 0xf7, ZC3XX_R111_RGB21},
-	{0xa0, 0x52, ZC3XX_R112_RGB22},
-	{0xa1, 0x01, 0x0180},
-	{0xa0, 0x00, ZC3XX_R180_AUTOCORRECTENABLE},
-	{0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS},
-	{0xaa, 0x0d, 0x0003},
-	{0xaa, 0x0c, 0x0020},
-	{0xaa, 0x0e, 0x000e},
-	{0xaa, 0x0f, 0x0002},
-	{0xaa, 0x1c, 0x000d},
-	{0xaa, 0x1d, 0x0002},
-	{0xaa, 0x20, 0x0080},
-	{0xaa, 0x22, 0x0080},
-	{0xaa, 0x24, 0x0080},
-	{0xaa, 0x26, 0x0080},
-	{0xaa, 0x00, 0x0084},
-	{0xa0, 0x02, ZC3XX_R0A3_EXPOSURETIMEHIGH},
-	{0xa0, 0x0d, ZC3XX_R0A4_EXPOSURETIMELOW},
-	{0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH},
-	{0xa0, 0x04, ZC3XX_R191_EXPOSURELIMITMID},
-	{0xa0, 0x1a, ZC3XX_R192_EXPOSURELIMITLOW},
-	{0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH},
-	{0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID},
-	{0xa0, 0x4b, ZC3XX_R197_ANTIFLICKERLOW},
-	{0xa0, 0x10, ZC3XX_R18C_AEFREEZE},
-	{0xa0, 0x20, ZC3XX_R18F_AEUNFREEZE},
-	{0xa0, 0x10, ZC3XX_R1A9_DIGITALLIMITDIFF},
-	{0xa0, 0x12, ZC3XX_R1AA_DIGITALGAINSTEP},
-	{0xa0, 0xc8, ZC3XX_R01D_HSYNC_0},
-	{0xa0, 0xd8, ZC3XX_R01E_HSYNC_1},
-	{0xa0, 0xea, ZC3XX_R01F_HSYNC_2},
-	{0xa0, 0xff, ZC3XX_R020_HSYNC_3},
-	{0xa0, 0x00, ZC3XX_R1A7_CALCGLOBALMEAN},
-	{0xa0, 0x42, ZC3XX_R180_AUTOCORRECTENABLE},
-	{0xa1, 0x01, 0x0180},
-	{0xa0, 0x42, ZC3XX_R180_AUTOCORRECTENABLE},
-	{0xa0, 0x40, ZC3XX_R116_RGAIN},
-	{0xa0, 0x40, ZC3XX_R117_GGAIN},
-	{0xa0, 0x40, ZC3XX_R118_BGAIN},
 	{}
 };
 static const struct usb_action icm105a_50HZScale[] = {
 	{0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, /* 00,19,00,cc */
 	{0xaa, 0x0d, 0x0003}, /* 00,0d,03,aa */
-	{0xaa, 0x0c, 0x0020}, /* 00,0c,20,aa */
-	{0xaa, 0x0e, 0x000e}, /* 00,0e,0e,aa */
+	{0xaa, 0x0c, 0x008c},
+	{0xaa, 0x0e, 0x000d},
 	{0xaa, 0x0f, 0x0002}, /* 00,0f,02,aa */
-	{0xaa, 0x1c, 0x000d}, /* 00,1c,0d,aa */
-	{0xaa, 0x1d, 0x0002}, /* 00,1d,02,aa */
-	{0xaa, 0x20, 0x0080}, /* 00,20,80,aa */
-	{0xaa, 0x22, 0x0080}, /* 00,22,80,aa */
-	{0xaa, 0x24, 0x0080}, /* 00,24,80,aa */
-	{0xaa, 0x26, 0x0080}, /* 00,26,80,aa */
+	{0xaa, 0x1c, 0x0008},
+	{0xaa, 0x1d, 0x0001},
 	{0xaa, 0x00, 0x0084}, /* 00,00,84,aa */
-	{0xa0, 0x02, ZC3XX_R0A3_EXPOSURETIMEHIGH}, /* 00,a3,02,cc */
-	{0xa0, 0x0d, ZC3XX_R0A4_EXPOSURETIMELOW}, /* 00,a4,0d,cc */
 	{0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc */
 	{0xa0, 0x04, ZC3XX_R191_EXPOSURELIMITMID}, /* 01,91,04,cc */
-	{0xa0, 0x1a, ZC3XX_R192_EXPOSURELIMITLOW}, /* 01,92,1a,cc */
+	{0xa0, 0x20, ZC3XX_R192_EXPOSURELIMITLOW},
 	{0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH}, /* 01,95,00,cc */
 	{0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID}, /* 01,96,00,cc */
-	{0xa0, 0x4b, ZC3XX_R197_ANTIFLICKERLOW}, /* 01,97,4b,cc */
+	{0xa0, 0x84, ZC3XX_R197_ANTIFLICKERLOW},
 	{0xa0, 0x10, ZC3XX_R18C_AEFREEZE}, /* 01,8c,10,cc */
 	{0xa0, 0x20, ZC3XX_R18F_AEUNFREEZE}, /* 01,8f,20,cc */
 	{0xa0, 0x10, ZC3XX_R1A9_DIGITALLIMITDIFF}, /* 01,a9,10,cc */
-	{0xa0, 0x12, ZC3XX_R1AA_DIGITALGAINSTEP}, /* 01,aa,12,cc */
-	{0xa0, 0xc8, ZC3XX_R01D_HSYNC_0}, /* 00,1d,c8,cc */
-	{0xa0, 0xd8, ZC3XX_R01E_HSYNC_1}, /* 00,1e,d8,cc */
-	{0xa0, 0xea, ZC3XX_R01F_HSYNC_2}, /* 00,1f,ea,cc */
+	{0xa0, 0x24, ZC3XX_R1AA_DIGITALGAINSTEP},
+	{0xa0, 0xe3, ZC3XX_R01D_HSYNC_0},
+	{0xa0, 0xec, ZC3XX_R01E_HSYNC_1},
+	{0xa0, 0xf5, ZC3XX_R01F_HSYNC_2},
 	{0xa0, 0xff, ZC3XX_R020_HSYNC_3}, /* 00,20,ff,cc */
 	{}
 };
 static const struct usb_action icm105a_50HZ[] = {
 	{0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, /* 00,19,00,cc */
 	{0xaa, 0x0d, 0x0003}, /* 00,0d,03,aa */
-	{0xaa, 0x0c, 0x008c}, /* 00,0c,8c,aa */
-	{0xaa, 0x0e, 0x0095}, /* 00,0e,95,aa */
+	{0xaa, 0x0c, 0x0020},
+	{0xaa, 0x0e, 0x000e},
 	{0xaa, 0x0f, 0x0002}, /* 00,0f,02,aa */
-	{0xaa, 0x1c, 0x0094}, /* 00,1c,94,aa */
+	{0xaa, 0x1c, 0x000d},
 	{0xaa, 0x1d, 0x0002}, /* 00,1d,02,aa */
-	{0xaa, 0x20, 0x0080}, /* 00,20,80,aa */
-	{0xaa, 0x22, 0x0080}, /* 00,22,80,aa */
-	{0xaa, 0x24, 0x0080}, /* 00,24,80,aa */
-	{0xaa, 0x26, 0x0080}, /* 00,26,80,aa */
 	{0xaa, 0x00, 0x0084}, /* 00,00,84,aa */
-	{0xa0, 0x02, ZC3XX_R0A3_EXPOSURETIMEHIGH}, /* 00,a3,02,cc */
-	{0xa0, 0x94, ZC3XX_R0A4_EXPOSURETIMELOW}, /* 00,a4,94,cc */
 	{0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc */
 	{0xa0, 0x04, ZC3XX_R191_EXPOSURELIMITMID}, /* 01,91,04,cc */
-	{0xa0, 0x20, ZC3XX_R192_EXPOSURELIMITLOW}, /* 01,92,20,cc */
+	{0xa0, 0x1a, ZC3XX_R192_EXPOSURELIMITLOW},
 	{0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH}, /* 01,95,00,cc */
 	{0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID}, /* 01,96,00,cc */
-	{0xa0, 0x84, ZC3XX_R197_ANTIFLICKERLOW}, /* 01,97,84,cc */
+	{0xa0, 0x4b, ZC3XX_R197_ANTIFLICKERLOW},
 	{0xa0, 0x10, ZC3XX_R18C_AEFREEZE}, /* 01,8c,10,cc */
 	{0xa0, 0x20, ZC3XX_R18F_AEUNFREEZE}, /* 01,8f,20,cc */
 	{0xa0, 0x10, ZC3XX_R1A9_DIGITALLIMITDIFF}, /* 01,a9,10,cc */
-	{0xa0, 0x12, ZC3XX_R1AA_DIGITALGAINSTEP}, /* 01,aa,12,cc */
-	{0xa0, 0xe3, ZC3XX_R01D_HSYNC_0}, /* 00,1d,e3,cc */
-	{0xa0, 0xec, ZC3XX_R01E_HSYNC_1}, /* 00,1e,ec,cc */
-	{0xa0, 0xf5, ZC3XX_R01F_HSYNC_2}, /* 00,1f,f5,cc */
+	{0xa0, 0x24, ZC3XX_R1AA_DIGITALGAINSTEP},
+	{0xa0, 0xc8, ZC3XX_R01D_HSYNC_0},
+	{0xa0, 0xd8, ZC3XX_R01E_HSYNC_1},
+	{0xa0, 0xea, ZC3XX_R01F_HSYNC_2},
 	{0xa0, 0xff, ZC3XX_R020_HSYNC_3}, /* 00,20,ff,cc */
-	{0xa0, 0x00, ZC3XX_R1A7_CALCGLOBALMEAN}, /* 01,a7,00,cc */
-	{0xa0, 0xc0, ZC3XX_R1A8_DIGITALGAIN}, /* 01,a8,c0,cc */
 	{}
 };
 static const struct usb_action icm105a_60HZScale[] = {
 	{0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, /* 00,19,00,cc */
 	{0xaa, 0x0d, 0x0003}, /* 00,0d,03,aa */
-	{0xaa, 0x0c, 0x0004}, /* 00,0c,04,aa */
+	{0xaa, 0x0c, 0x0008},
 	{0xaa, 0x0e, 0x000d}, /* 00,0e,0d,aa */
 	{0xaa, 0x0f, 0x0002}, /* 00,0f,02,aa */
-	{0xaa, 0x1c, 0x0008}, /* 00,1c,08,aa */
-	{0xaa, 0x1d, 0x0002}, /* 00,1d,02,aa */
-	{0xaa, 0x20, 0x0080}, /* 00,20,80,aa */
-	{0xaa, 0x22, 0x0080}, /* 00,22,80,aa */
-	{0xaa, 0x24, 0x0080}, /* 00,24,80,aa */
-	{0xaa, 0x26, 0x0080}, /* 00,26,80,aa */
+	{0xaa, 0x1c, 0x0083},
+	{0xaa, 0x1d, 0x0001},
 	{0xaa, 0x00, 0x0084}, /* 00,00,84,aa */
-	{0xa0, 0x02, ZC3XX_R0A3_EXPOSURETIMEHIGH}, /* 00,a3,02,cc */
-	{0xa0, 0x08, ZC3XX_R0A4_EXPOSURETIMELOW}, /* 00,a4,08,cc */
 	{0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc */
 	{0xa0, 0x04, ZC3XX_R191_EXPOSURELIMITMID}, /* 01,91,04,cc */
-	{0xa0, 0x10, ZC3XX_R192_EXPOSURELIMITLOW}, /* 01,92,10,cc */
+	{0xa0, 0x08, ZC3XX_R192_EXPOSURELIMITLOW},
 	{0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH}, /* 01,95,00,cc */
 	{0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID}, /* 01,96,00,cc */
-	{0xa0, 0x41, ZC3XX_R197_ANTIFLICKERLOW}, /* 01,97,41,cc */
+	{0xa0, 0x81, ZC3XX_R197_ANTIFLICKERLOW},
 	{0xa0, 0x10, ZC3XX_R18C_AEFREEZE}, /* 01,8c,10,cc */
 	{0xa0, 0x20, ZC3XX_R18F_AEUNFREEZE}, /* 01,8f,20,cc */
 	{0xa0, 0x10, ZC3XX_R1A9_DIGITALLIMITDIFF}, /* 01,a9,10,cc */
-	{0xa0, 0x12, ZC3XX_R1AA_DIGITALGAINSTEP}, /* 01,aa,12,cc */
-	{0xa0, 0xc1, ZC3XX_R01D_HSYNC_0}, /* 00,1d,c1,cc */
-	{0xa0, 0xd4, ZC3XX_R01E_HSYNC_1}, /* 00,1e,d4,cc */
-	{0xa0, 0xe8, ZC3XX_R01F_HSYNC_2}, /* 00,1f,e8,cc */
+	{0xa0, 0x24, ZC3XX_R1AA_DIGITALGAINSTEP},
+	{0xa0, 0xc2, ZC3XX_R01D_HSYNC_0},
+	{0xa0, 0xd6, ZC3XX_R01E_HSYNC_1},
+	{0xa0, 0xea, ZC3XX_R01F_HSYNC_2},
 	{0xa0, 0xff, ZC3XX_R020_HSYNC_3}, /* 00,20,ff,cc */
 	{}
 };
 static const struct usb_action icm105a_60HZ[] = {
 	{0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, /* 00,19,00,cc */
 	{0xaa, 0x0d, 0x0003}, /* 00,0d,03,aa */
-	{0xaa, 0x0c, 0x0008}, /* 00,0c,08,aa */
-	{0xaa, 0x0e, 0x0086}, /* 00,0e,86,aa */
+	{0xaa, 0x0c, 0x0004},
+	{0xaa, 0x0e, 0x000d},
 	{0xaa, 0x0f, 0x0002}, /* 00,0f,02,aa */
-	{0xaa, 0x1c, 0x0085}, /* 00,1c,85,aa */
-	{0xaa, 0x1d, 0x0002}, /* 00,1d,02,aa */
-	{0xaa, 0x20, 0x0080}, /* 00,20,80,aa */
-	{0xaa, 0x22, 0x0080}, /* 00,22,80,aa */
-	{0xaa, 0x24, 0x0080}, /* 00,24,80,aa */
-	{0xaa, 0x26, 0x0080}, /* 00,26,80,aa */
+	{0xaa, 0x1c, 0x0004},
+	{0xaa, 0x1d, 0x0001},
 	{0xaa, 0x00, 0x0084}, /* 00,00,84,aa */
-	{0xa0, 0x02, ZC3XX_R0A3_EXPOSURETIMEHIGH}, /* 00,a3,02,cc */
-	{0xa0, 0x85, ZC3XX_R0A4_EXPOSURETIMELOW}, /* 00,a4,85,cc */
 	{0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc */
 	{0xa0, 0x04, ZC3XX_R191_EXPOSURELIMITMID}, /* 01,91,04,cc */
-	{0xa0, 0x08, ZC3XX_R192_EXPOSURELIMITLOW}, /* 01,92,08,cc */
+	{0xa0, 0x10, ZC3XX_R192_EXPOSURELIMITLOW},
 	{0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH}, /* 01,95,00,cc */
 	{0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID}, /* 01,96,00,cc */
-	{0xa0, 0x81, ZC3XX_R197_ANTIFLICKERLOW}, /* 01,97,81,cc */
+	{0xa0, 0x41, ZC3XX_R197_ANTIFLICKERLOW},
 	{0xa0, 0x10, ZC3XX_R18C_AEFREEZE}, /* 01,8c,10,cc */
 	{0xa0, 0x20, ZC3XX_R18F_AEUNFREEZE}, /* 01,8f,20,cc */
 	{0xa0, 0x10, ZC3XX_R1A9_DIGITALLIMITDIFF}, /* 01,a9,10,cc */
-	{0xa0, 0x12, ZC3XX_R1AA_DIGITALGAINSTEP}, /* 01,aa,12,cc */
-	{0xa0, 0xc2, ZC3XX_R01D_HSYNC_0}, /* 00,1d,c2,cc */
-	{0xa0, 0xd6, ZC3XX_R01E_HSYNC_1}, /* 00,1e,d6,cc */
-	{0xa0, 0xea, ZC3XX_R01F_HSYNC_2}, /* 00,1f,ea,cc */
+	{0xa0, 0x24, ZC3XX_R1AA_DIGITALGAINSTEP},
+	{0xa0, 0xc1, ZC3XX_R01D_HSYNC_0},
+	{0xa0, 0xd4, ZC3XX_R01E_HSYNC_1},
+	{0xa0, 0xe8, ZC3XX_R01F_HSYNC_2},
 	{0xa0, 0xff, ZC3XX_R020_HSYNC_3}, /* 00,20,ff,cc */
-	{0xa0, 0x00, ZC3XX_R1A7_CALCGLOBALMEAN}, /* 01,a7,00,cc */
-	{0xa0, 0xc0, ZC3XX_R1A8_DIGITALGAIN}, /* 01,a8,c0,cc */
 	{}
 };
 static const struct usb_action icm105a_NoFlikerScale[] = {
@@ -2776,14 +2051,8 @@
 	{0xaa, 0x0e, 0x000d}, /* 00,0e,0d,aa */
 	{0xaa, 0x0f, 0x0002}, /* 00,0f,02,aa */
 	{0xaa, 0x1c, 0x0000}, /* 00,1c,00,aa */
-	{0xaa, 0x1d, 0x0002}, /* 00,1d,02,aa */
-	{0xaa, 0x20, 0x0080}, /* 00,20,80,aa */
-	{0xaa, 0x22, 0x0080}, /* 00,22,80,aa */
-	{0xaa, 0x24, 0x0080}, /* 00,24,80,aa */
-	{0xaa, 0x26, 0x0080}, /* 00,26,80,aa */
+	{0xaa, 0x1d, 0x0001},
 	{0xaa, 0x00, 0x0084}, /* 00,00,84,aa */
-	{0xa0, 0x02, ZC3XX_R0A3_EXPOSURETIMEHIGH}, /* 00,a3,02,cc */
-	{0xa0, 0x00, ZC3XX_R0A4_EXPOSURETIMELOW}, /* 00,a4,00,cc */
 	{0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc */
 	{0xa0, 0x04, ZC3XX_R191_EXPOSURELIMITMID}, /* 01,91,04,cc */
 	{0xa0, 0x20, ZC3XX_R192_EXPOSURELIMITLOW}, /* 01,92,20,cc */
@@ -2804,17 +2073,11 @@
 	{0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, /* 00,19,00,cc */
 	{0xaa, 0x0d, 0x0003}, /* 00,0d,03,aa */
 	{0xaa, 0x0c, 0x0004}, /* 00,0c,04,aa */
-	{0xaa, 0x0e, 0x0081}, /* 00,0e,81,aa */
+	{0xaa, 0x0e, 0x000d},
 	{0xaa, 0x0f, 0x0002}, /* 00,0f,02,aa */
-	{0xaa, 0x1c, 0x0080}, /* 00,1c,80,aa */
-	{0xaa, 0x1d, 0x0002}, /* 00,1d,02,aa */
-	{0xaa, 0x20, 0x0080}, /* 00,20,80,aa */
-	{0xaa, 0x22, 0x0080}, /* 00,22,80,aa */
-	{0xaa, 0x24, 0x0080}, /* 00,24,80,aa */
-	{0xaa, 0x26, 0x0080}, /* 00,26,80,aa */
+	{0xaa, 0x1c, 0x0000},
+	{0xaa, 0x1d, 0x0001},
 	{0xaa, 0x00, 0x0084}, /* 00,00,84,aa */
-	{0xa0, 0x02, ZC3XX_R0A3_EXPOSURETIMEHIGH}, /* 00,a3,02,cc */
-	{0xa0, 0x80, ZC3XX_R0A4_EXPOSURETIMELOW}, /* 00,a4,80,cc */
 	{0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH}, /* 01,90,00,cc */
 	{0xa0, 0x04, ZC3XX_R191_EXPOSURELIMITMID}, /* 01,91,04,cc */
 	{0xa0, 0x20, ZC3XX_R192_EXPOSURELIMITLOW}, /* 01,92,20,cc */
@@ -2829,8 +2092,6 @@
 	{0xa0, 0xd4, ZC3XX_R01E_HSYNC_1}, /* 00,1e,d4,cc */
 	{0xa0, 0xe8, ZC3XX_R01F_HSYNC_2}, /* 00,1f,e8,cc */
 	{0xa0, 0xff, ZC3XX_R020_HSYNC_3}, /* 00,20,ff,cc */
-	{0xa0, 0x00, ZC3XX_R1A7_CALCGLOBALMEAN}, /* 01,a7,00,cc */
-	{0xa0, 0xc0, ZC3XX_R1A8_DIGITALGAIN}, /* 01,a8,c0,cc */
 	{}
 };
 
@@ -2945,12 +2206,6 @@
 	{0xaa, 0x55, 0x0010}, /* 00,55,10,aa */
 	{0xa0, 0xf0, 0x0199}, /* 01,99,F0,cc */
 	{0xa0, 0x80, 0x019a}, /* 01,9A,80,cc */
-
-	{0xaa, 0x03, 0x0003}, /* 00,03,03,aa */
-	{0xaa, 0x10, 0x00fc}, /* 00,10,fc,aa */
-	{0xaa, 0x36, 0x001d}, /* 00,36,1D,aa */
-	{0xaa, 0x37, 0x004c}, /* 00,37,4C,aa */
-	{0xaa, 0x3b, 0x001d}, /* 00,3B,1D,aa */
 	{}
 };
 
@@ -3892,7 +3147,6 @@
 /* Gains */
 	{0xa0, 0x20, ZC3XX_R1A9_DIGITALLIMITDIFF},
 	{0xa0, 0x26, ZC3XX_R1AA_DIGITALGAINSTEP},
-	{0xa0, 0xa0, ZC3XX_R11D_GLOBALGAIN},
 	{0xa0, 0x60, ZC3XX_R11D_GLOBALGAIN},
 /* Auto correction */
 	{0xa0, 0x40, ZC3XX_R180_AUTOCORRECTENABLE},
@@ -5379,12 +4633,12 @@
 	{}
 };
 
-static const struct usb_action gc0303_InitialScale[] = {
+/* from usbvm305.inf 0ac8:305b 07/06/15 (3 - tas5130c) */
+static const struct usb_action gc0303_Initial[] = {
 	{0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL},		/* 00,00,01,cc, */
 	{0xa0, 0x02, ZC3XX_R008_CLOCKSETTING},		/* 00,08,02,cc, */
 	{0xa0, 0x01, ZC3XX_R010_CMOSSENSORSELECT},	/* 00,10,01,cc, */
-	{0xa0, 0x10, ZC3XX_R002_CLOCKSELECT},		/* 00,02,00,cc,
-							 * 0<->10 */
+	{0xa0, 0x00, ZC3XX_R002_CLOCKSELECT},
 	{0xa0, 0x02, ZC3XX_R003_FRAMEWIDTHHIGH},	/* 00,03,02,cc, */
 	{0xa0, 0x80, ZC3XX_R004_FRAMEWIDTHLOW},		/* 00,04,80,cc, */
 	{0xa0, 0x01, ZC3XX_R005_FRAMEHEIGHTHIGH},	/* 00,05,01,cc, */
@@ -5403,29 +4657,22 @@
 							 * 6<->8 */
 	{0xa0, 0x10, ZC3XX_R087_EXPTIMEMID},		/* 00,87,10,cc, */
 	{0xa0, 0x98, ZC3XX_R08B_I2CDEVICEADDR},		/* 00,8b,98,cc, */
-	{0xaa, 0x1b, 0x0024},		/* 00,1b,24,aa, */
-	{0xdd, 0x00, 0x0080},		/* 00,00,80,dd, */
-	{0xaa, 0x1b, 0x0000},		/* 00,1b,00,aa, */
-	{0xaa, 0x13, 0x0002},		/* 00,13,02,aa, */
-	{0xaa, 0x15, 0x0004},		/* 00,15,04,aa */
-/*??	{0xaa, 0x01, 0x0000}, */
 	{0xaa, 0x01, 0x0000},
 	{0xaa, 0x1a, 0x0000},		/* 00,1a,00,aa, */
 	{0xaa, 0x1c, 0x0017},		/* 00,1c,17,aa, */
+	{0xaa, 0x1b, 0x0000},
 	{0xa0, 0x82, ZC3XX_R086_EXPTIMEHIGH},		/* 00,86,82,cc, */
 	{0xa0, 0x83, ZC3XX_R087_EXPTIMEMID},		/* 00,87,83,cc, */
 	{0xa0, 0x84, ZC3XX_R088_EXPTIMELOW},		/* 00,88,84,cc, */
 	{0xaa, 0x05, 0x0010},		/* 00,05,10,aa, */
-	{0xaa, 0x0a, 0x0000},		/* 00,0a,00,aa, */
-	{0xaa, 0x0b, 0x00a0},		/* 00,0b,a0,aa, */
-	{0xaa, 0x0c, 0x0000},		/* 00,0c,00,aa, */
-	{0xaa, 0x0d, 0x00a0},		/* 00,0d,a0,aa, */
-	{0xaa, 0x0e, 0x0000},		/* 00,0e,00,aa, */
-	{0xaa, 0x0f, 0x00a0},		/* 00,0f,a0,aa, */
-	{0xaa, 0x10, 0x0000},		/* 00,10,00,aa, */
-	{0xaa, 0x11, 0x00a0},		/* 00,11,a0,aa, */
-/*??	{0xa0, 0x00, 0x0039},
-	{0xa1, 0x01, 0x0037}, */
+	{0xaa, 0x0a, 0x0002},
+	{0xaa, 0x0b, 0x0000},
+	{0xaa, 0x0c, 0x0002},
+	{0xaa, 0x0d, 0x0000},
+	{0xaa, 0x0e, 0x0002},
+	{0xaa, 0x0f, 0x0000},
+	{0xaa, 0x10, 0x0002},
+	{0xaa, 0x11, 0x0000},
 	{0xaa, 0x16, 0x0001},		/* 00,16,01,aa, */
 	{0xaa, 0x17, 0x00e8},		/* 00,17,e6,aa, (e6 -> e8) */
 	{0xaa, 0x18, 0x0002},		/* 00,18,02,aa, */
@@ -5440,17 +4687,18 @@
 	{0xa0, 0x13, ZC3XX_R1CB_SHARPNESS05},		/* 01,cb,13,cc, */
 	{0xa0, 0x08, ZC3XX_R250_DEADPIXELSMODE},	/* 02,50,08,cc, */
 	{0xa0, 0x08, ZC3XX_R301_EEPROMACCESS},		/* 03,01,08,cc, */
-	{0xa0, 0x60, ZC3XX_R1A8_DIGITALGAIN},		/* 01,a8,60,cc, */
+	{0xa0, 0x58, ZC3XX_R1A8_DIGITALGAIN},
 	{0xa0, 0x61, ZC3XX_R116_RGAIN},			/* 01,16,61,cc, */
 	{0xa0, 0x65, ZC3XX_R118_BGAIN},			/* 01,18,65,cc */
+	{0xaa, 0x1b, 0x0000},
 	{}
 };
 
-static const struct usb_action gc0303_Initial[] = {
+static const struct usb_action gc0303_InitialScale[] = {
 	{0xa0, 0x01, ZC3XX_R000_SYSTEMCONTROL},		/* 00,00,01,cc, */
 	{0xa0, 0x02, ZC3XX_R008_CLOCKSETTING},		/* 00,08,02,cc, */
 	{0xa0, 0x01, ZC3XX_R010_CMOSSENSORSELECT},	/* 00,10,01,cc, */
-	{0xa0, 0x00, ZC3XX_R002_CLOCKSELECT},		/* 00,02,10,cc, */
+	{0xa0, 0x10, ZC3XX_R002_CLOCKSELECT},
 	{0xa0, 0x02, ZC3XX_R003_FRAMEWIDTHHIGH},	/* 00,03,02,cc, */
 	{0xa0, 0x80, ZC3XX_R004_FRAMEWIDTHLOW},		/* 00,04,80,cc, */
 	{0xa0, 0x01, ZC3XX_R005_FRAMEHEIGHTHIGH},	/* 00,05,01,cc, */
@@ -5469,34 +4717,26 @@
 							 * 8<->6 */
 	{0xa0, 0x10, ZC3XX_R087_EXPTIMEMID},		/* 00,87,10,cc, */
 	{0xa0, 0x98, ZC3XX_R08B_I2CDEVICEADDR},		/* 00,8b,98,cc, */
-	{0xaa, 0x1b, 0x0024},		/* 00,1b,24,aa, */
-	{0xdd, 0x00, 0x0080},		/* 00,00,80,dd, */
-	{0xaa, 0x1b, 0x0000},		/* 00,1b,00,aa, */
-	{0xaa, 0x13, 0x0002},		/* 00,13,02,aa, */
-	{0xaa, 0x15, 0x0004},		/* 00,15,04,aa */
-/*??	{0xaa, 0x01, 0x0000}, */
 	{0xaa, 0x01, 0x0000},
 	{0xaa, 0x1a, 0x0000},		/* 00,1a,00,aa, */
 	{0xaa, 0x1c, 0x0017},		/* 00,1c,17,aa, */
+	{0xaa, 0x1b, 0x0000},
 	{0xa0, 0x82, ZC3XX_R086_EXPTIMEHIGH},	/* 00,86,82,cc, */
 	{0xa0, 0x83, ZC3XX_R087_EXPTIMEMID},	/* 00,87,83,cc, */
 	{0xa0, 0x84, ZC3XX_R088_EXPTIMELOW},	/* 00,88,84,cc, */
 	{0xaa, 0x05, 0x0010},		/* 00,05,10,aa, */
-	{0xaa, 0x0a, 0x0000},		/* 00,0a,00,aa, */
-	{0xaa, 0x0b, 0x00a0},		/* 00,0b,a0,aa, */
-	{0xaa, 0x0c, 0x0000},		/* 00,0c,00,aa, */
-	{0xaa, 0x0d, 0x00a0},		/* 00,0d,a0,aa, */
-	{0xaa, 0x0e, 0x0000},		/* 00,0e,00,aa, */
-	{0xaa, 0x0f, 0x00a0},		/* 00,0f,a0,aa, */
-	{0xaa, 0x10, 0x0000},		/* 00,10,00,aa, */
-	{0xaa, 0x11, 0x00a0},		/* 00,11,a0,aa, */
-/*??	{0xa0, 0x00, 0x0039},
-	{0xa1, 0x01, 0x0037}, */
+	{0xaa, 0x0a, 0x0001},
+	{0xaa, 0x0b, 0x0000},
+	{0xaa, 0x0c, 0x0001},
+	{0xaa, 0x0d, 0x0000},
+	{0xaa, 0x0e, 0x0001},
+	{0xaa, 0x0f, 0x0000},
+	{0xaa, 0x10, 0x0001},
+	{0xaa, 0x11, 0x0000},
 	{0xaa, 0x16, 0x0001},		/* 00,16,01,aa, */
 	{0xaa, 0x17, 0x00e8},		/* 00,17,e6,aa (e6 -> e8) */
 	{0xaa, 0x18, 0x0002},		/* 00,18,02,aa, */
 	{0xaa, 0x19, 0x0088},		/* 00,19,88,aa, */
-	{0xaa, 0x20, 0x0020},		/* 00,20,20,aa, */
 	{0xa0, 0xb7, ZC3XX_R101_SENSORCORRECTION},	/* 01,01,b7,cc, */
 	{0xa0, 0x05, ZC3XX_R012_VIDEOCONTROLFUNC},	/* 00,12,05,cc, */
 	{0xa0, 0x0d, ZC3XX_R100_OPERATIONMODE},		/* 01,00,0d,cc, */
@@ -5506,36 +4746,37 @@
 	{0xa0, 0x13, ZC3XX_R1CB_SHARPNESS05},		/* 01,cb,13,cc, */
 	{0xa0, 0x08, ZC3XX_R250_DEADPIXELSMODE},	/* 02,50,08,cc, */
 	{0xa0, 0x08, ZC3XX_R301_EEPROMACCESS},		/* 03,01,08,cc, */
-	{0xa0, 0x60, ZC3XX_R1A8_DIGITALGAIN},		/* 01,a8,60,cc, */
+	{0xa0, 0x58, ZC3XX_R1A8_DIGITALGAIN},
 	{0xa0, 0x61, ZC3XX_R116_RGAIN},		/* 01,16,61,cc, */
 	{0xa0, 0x65, ZC3XX_R118_BGAIN},		/* 01,18,65,cc */
+	{0xaa, 0x1b, 0x0000},
 	{}
 };
-static const struct usb_action gc0303_50HZScale[] = {
+static const struct usb_action gc0303_50HZ[] = {
 	{0xaa, 0x82, 0x0000},		/* 00,82,00,aa */
 	{0xaa, 0x83, 0x0001},		/* 00,83,01,aa */
-	{0xaa, 0x84, 0x00aa},		/* 00,84,aa,aa */
+	{0xaa, 0x84, 0x0063},
 	{0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH},	/* 01,90,00,cc, */
 	{0xa0, 0x06, ZC3XX_R191_EXPOSURELIMITMID},	/* 01,91,0d,cc, */
 	{0xa0, 0xa8, ZC3XX_R192_EXPOSURELIMITLOW},	/* 01,92,50,cc, */
 	{0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH},	/* 01,95,00,cc, */
 	{0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID},	/* 01,96,00,cc, */
-	{0xa0, 0x8e, ZC3XX_R197_ANTIFLICKERLOW},	/* 01,97,47,cc, */
+	{0xa0, 0x47, ZC3XX_R197_ANTIFLICKERLOW},	/* 01,97,47,cc, */
 	{0xa0, 0x0e, ZC3XX_R18C_AEFREEZE},		/* 01,8c,0e,cc, */
 	{0xa0, 0x15, ZC3XX_R18F_AEUNFREEZE},		/* 01,8f,15,cc, */
 	{0xa0, 0x10, ZC3XX_R1A9_DIGITALLIMITDIFF},	/* 01,a9,10,cc, */
-	{0xa0, 0x24, ZC3XX_R1AA_DIGITALGAINSTEP},	/* 01,aa,24,cc, */
+	{0xa0, 0x48, ZC3XX_R1AA_DIGITALGAINSTEP},
 	{0xa0, 0x62, ZC3XX_R01D_HSYNC_0},		/* 00,1d,62,cc, */
 	{0xa0, 0x90, ZC3XX_R01E_HSYNC_1},		/* 00,1e,90,cc, */
 	{0xa0, 0xc8, ZC3XX_R01F_HSYNC_2},		/* 00,1f,c8,cc, */
 	{0xa0, 0xff, ZC3XX_R020_HSYNC_3},		/* 00,20,ff,cc, */
 	{0xa0, 0x58, ZC3XX_R11D_GLOBALGAIN},		/* 01,1d,58,cc, */
 	{0xa0, 0x42, ZC3XX_R180_AUTOCORRECTENABLE},	/* 01,80,42,cc, */
-	{0xa0, 0x78, ZC3XX_R18D_YTARGET},		/* 01,8d,78,cc */
+	{0xa0, 0x7f, ZC3XX_R18D_YTARGET},
 	{}
 };
 
-static const struct usb_action gc0303_50HZ[] = {
+static const struct usb_action gc0303_50HZScale[] = {
 	{0xaa, 0x82, 0x0000},		/* 00,82,00,aa */
 	{0xaa, 0x83, 0x0003},		/* 00,83,03,aa */
 	{0xaa, 0x84, 0x0054},		/* 00,84,54,aa */
@@ -5548,21 +4789,21 @@
 	{0xa0, 0x0e, ZC3XX_R18C_AEFREEZE},		/* 01,8c,0e,cc, */
 	{0xa0, 0x15, ZC3XX_R18F_AEUNFREEZE},		/* 01,8f,15,cc, */
 	{0xa0, 0x10, ZC3XX_R1A9_DIGITALLIMITDIFF},	/* 01,a9,10,cc, */
-	{0xa0, 0x24, ZC3XX_R1AA_DIGITALGAINSTEP},	/* 01,aa,24,cc, */
+	{0xa0, 0x48, ZC3XX_R1AA_DIGITALGAINSTEP},	/* 01,aa,24,cc, */
 	{0xa0, 0x62, ZC3XX_R01D_HSYNC_0},		/* 00,1d,62,cc, */
 	{0xa0, 0x90, ZC3XX_R01E_HSYNC_1},		/* 00,1e,90,cc, */
 	{0xa0, 0xc8, ZC3XX_R01F_HSYNC_2},		/* 00,1f,c8,cc, */
 	{0xa0, 0xff, ZC3XX_R020_HSYNC_3},		/* 00,20,ff,cc, */
 	{0xa0, 0x58, ZC3XX_R11D_GLOBALGAIN},		/* 01,1d,58,cc, */
 	{0xa0, 0x42, ZC3XX_R180_AUTOCORRECTENABLE},	/* 01,80,42,cc, */
-	{0xa0, 0x78, ZC3XX_R18D_YTARGET},		/* 01,8d,78,cc */
+	{0xa0, 0x7f, ZC3XX_R18D_YTARGET},
 	{}
 };
 
-static const struct usb_action gc0303_60HZScale[] = {
+static const struct usb_action gc0303_60HZ[] = {
 	{0xaa, 0x82, 0x0000},		/* 00,82,00,aa */
-	{0xaa, 0x83, 0x0001},		/* 00,83,01,aa */
-	{0xaa, 0x84, 0x0062},		/* 00,84,62,aa */
+	{0xaa, 0x83, 0x0000},
+	{0xaa, 0x84, 0x003b},
 	{0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH},	/* 01,90,00,cc, */
 	{0xa0, 0x05, ZC3XX_R191_EXPOSURELIMITMID},	/* 01,91,05,cc, */
 	{0xa0, 0x88, ZC3XX_R192_EXPOSURELIMITLOW},	/* 01,92,88,cc, */
@@ -5579,14 +4820,14 @@
 	{0xa0, 0xff, ZC3XX_R020_HSYNC_3},		/* 00,20,ff,cc, */
 	{0xa0, 0x58, ZC3XX_R11D_GLOBALGAIN},		/* 01,1d,58,cc, */
 	{0xa0, 0x42, ZC3XX_R180_AUTOCORRECTENABLE},	/* 01,80,42,cc, */
-	{0xa0, 0x78, ZC3XX_R18D_YTARGET},		/* 01,8d,78,cc */
+	{0xa0, 0x80, ZC3XX_R18D_YTARGET},
 	{}
 };
 
-static const struct usb_action gc0303_60HZ[] = {
+static const struct usb_action gc0303_60HZScale[] = {
 	{0xaa, 0x82, 0x0000},		/* 00,82,00,aa */
-	{0xaa, 0x83, 0x0002},		/* 00,83,02,aa */
-	{0xaa, 0x84, 0x00c4},		/* 00,84,c4,aa */
+	{0xaa, 0x83, 0x0000},
+	{0xaa, 0x84, 0x0076},
 	{0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH},	/* 01,90,00,cc, */
 	{0xa0, 0x0b, ZC3XX_R191_EXPOSURELIMITMID},	/* 01,1,0b,cc, */
 	{0xa0, 0x10, ZC3XX_R192_EXPOSURELIMITLOW},	/* 01,2,10,cc, */
@@ -5603,18 +4844,18 @@
 	{0xa0, 0xff, ZC3XX_R020_HSYNC_3},		/* 00,0,ff,cc, */
 	{0xa0, 0x58, ZC3XX_R11D_GLOBALGAIN},		/* 01,d,58,cc, */
 	{0xa0, 0x42, ZC3XX_R180_AUTOCORRECTENABLE},	/* 01,80,42,cc, */
-	{0xa0, 0x78, ZC3XX_R18D_YTARGET},		/* 01,d,78,cc */
+	{0xa0, 0x80, ZC3XX_R18D_YTARGET},
 	{}
 };
 
-static const struct usb_action gc0303_NoFlikerScale[] = {
+static const struct usb_action gc0303_NoFliker[] = {
 	{0xa0, 0x0c, ZC3XX_R100_OPERATIONMODE},		/* 01,00,0c,cc, */
 	{0xaa, 0x82, 0x0000},		/* 00,82,00,aa */
 	{0xaa, 0x83, 0x0000},		/* 00,83,00,aa */
 	{0xaa, 0x84, 0x0020},		/* 00,84,20,aa */
 	{0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH},	/* 01,0,00,cc, */
-	{0xa0, 0x05, ZC3XX_R191_EXPOSURELIMITMID},	/* 01,91,05,cc, */
-	{0xa0, 0x88, ZC3XX_R192_EXPOSURELIMITLOW},	/* 01,92,88,cc, */
+	{0xa0, 0x00, ZC3XX_R191_EXPOSURELIMITMID},
+	{0xa0, 0x48, ZC3XX_R192_EXPOSURELIMITLOW},
 	{0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH},	/* 01,95,00,cc, */
 	{0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID},	/* 01,96,00,cc, */
 	{0xa0, 0x10, ZC3XX_R197_ANTIFLICKERLOW},	/* 01,97,10,cc, */
@@ -5629,14 +4870,14 @@
 	{}
 };
 
-static const struct usb_action gc0303_NoFliker[] = {
+static const struct usb_action gc0303_NoFlikerScale[] = {
 	{0xa0, 0x0c, ZC3XX_R100_OPERATIONMODE},		/* 01,00,0c,cc, */
 	{0xaa, 0x82, 0x0000},		/* 00,82,00,aa */
 	{0xaa, 0x83, 0x0000},		/* 00,83,00,aa */
 	{0xaa, 0x84, 0x0020},		/* 00,84,20,aa */
 	{0xa0, 0x00, ZC3XX_R190_EXPOSURELIMITHIGH},	/* 01,90,00,cc, */
-	{0xa0, 0x0b, ZC3XX_R191_EXPOSURELIMITMID},	/* 01,91,0b,cc, */
-	{0xa0, 0x10, ZC3XX_R192_EXPOSURELIMITLOW},	/* 01,92,10,cc, */
+	{0xa0, 0x00, ZC3XX_R191_EXPOSURELIMITMID},
+	{0xa0, 0x48, ZC3XX_R192_EXPOSURELIMITLOW},
 	{0xa0, 0x00, ZC3XX_R195_ANTIFLICKERHIGH},	/* 01,95,00,cc, */
 	{0xa0, 0x00, ZC3XX_R196_ANTIFLICKERMID},	/* 01,96,00,cc, */
 	{0xa0, 0x10, ZC3XX_R197_ANTIFLICKERLOW},	/* 01,97,10,cc, */
@@ -5651,7 +4892,7 @@
 	{}
 };
 
-static u8 reg_r_i(struct gspca_dev *gspca_dev,
+static u8 reg_r(struct gspca_dev *gspca_dev,
 		u16 index)
 {
 	int ret;
@@ -5666,24 +4907,14 @@
 			index, gspca_dev->usb_buf, 1,
 			500);
 	if (ret < 0) {
-		err("reg_r_i err %d", ret);
+		pr_err("reg_r err %d\n", ret);
 		gspca_dev->usb_err = ret;
 		return 0;
 	}
 	return gspca_dev->usb_buf[0];
 }
 
-static u8 reg_r(struct gspca_dev *gspca_dev,
-		u16 index)
-{
-	u8 ret;
-
-	ret = reg_r_i(gspca_dev, index);
-	PDEBUG(D_USBI, "reg r [%04x] -> %02x", index, ret);
-	return ret;
-}
-
-static void reg_w_i(struct gspca_dev *gspca_dev,
+static void reg_w(struct gspca_dev *gspca_dev,
 			u8 value,
 			u16 index)
 {
@@ -5698,19 +4929,11 @@
 			value, index, NULL, 0,
 			500);
 	if (ret < 0) {
-		err("reg_w_i err %d", ret);
+		pr_err("reg_w_i err %d\n", ret);
 		gspca_dev->usb_err = ret;
 	}
 }
 
-static void reg_w(struct gspca_dev *gspca_dev,
-			u8 value,
-			u16 index)
-{
-	PDEBUG(D_USBO, "reg w [%04x] = %02x", index, value);
-	reg_w_i(gspca_dev, value, index);
-}
-
 static u16 i2c_read(struct gspca_dev *gspca_dev,
 			u8 reg)
 {
@@ -5719,16 +4942,14 @@
 
 	if (gspca_dev->usb_err < 0)
 		return 0;
-	reg_w_i(gspca_dev, reg, 0x0092);
-	reg_w_i(gspca_dev, 0x02, 0x0090);		/* <- read command */
+	reg_w(gspca_dev, reg, 0x0092);
+	reg_w(gspca_dev, 0x02, 0x0090);			/* <- read command */
 	msleep(20);
-	retbyte = reg_r_i(gspca_dev, 0x0091);		/* read status */
+	retbyte = reg_r(gspca_dev, 0x0091);		/* read status */
 	if (retbyte != 0x00)
-		err("i2c_r status error %02x", retbyte);
-	retval = reg_r_i(gspca_dev, 0x0095);		/* read Lowbyte */
-	retval |= reg_r_i(gspca_dev, 0x0096) << 8;	/* read Hightbyte */
-	PDEBUG(D_USBI, "i2c r [%02x] -> %04x (%02x)",
-			reg, retval, retbyte);
+		pr_err("i2c_r status error %02x\n", retbyte);
+	retval = reg_r(gspca_dev, 0x0095);		/* read Lowbyte */
+	retval |= reg_r(gspca_dev, 0x0096) << 8;	/* read Hightbyte */
 	return retval;
 }
 
@@ -5741,16 +4962,14 @@
 
 	if (gspca_dev->usb_err < 0)
 		return 0;
-	reg_w_i(gspca_dev, reg, 0x92);
-	reg_w_i(gspca_dev, valL, 0x93);
-	reg_w_i(gspca_dev, valH, 0x94);
-	reg_w_i(gspca_dev, 0x01, 0x90);		/* <- write command */
+	reg_w(gspca_dev, reg, 0x92);
+	reg_w(gspca_dev, valL, 0x93);
+	reg_w(gspca_dev, valH, 0x94);
+	reg_w(gspca_dev, 0x01, 0x90);		/* <- write command */
 	msleep(1);
-	retbyte = reg_r_i(gspca_dev, 0x0091);		/* read status */
+	retbyte = reg_r(gspca_dev, 0x0091);		/* read status */
 	if (retbyte != 0x00)
-		err("i2c_w status error %02x", retbyte);
-	PDEBUG(D_USBO, "i2c w [%02x] = %02x%02x (%02x)",
-			reg, valH, valL, retbyte);
+		pr_err("i2c_w status error %02x\n", retbyte);
 	return retbyte;
 }
 
@@ -5798,27 +5017,30 @@
 		{0x74, 0xed, 0xed, 0xed, 0x74, 0xed, 0xed, 0xed, 0x74};
 	static const u8 gc0305_matrix[9] =
 		{0x50, 0xf8, 0xf8, 0xf8, 0x50, 0xf8, 0xf8, 0xf8, 0x50};
+	static const u8 hdcs2020_matrix[9] =
+		{0x66, 0xed, 0xed, 0xed, 0x66, 0xed, 0xed, 0xed, 0x66};
 	static const u8 ov7620_matrix[9] =
 		{0x58, 0xf4, 0xf4, 0xf4, 0x58, 0xf4, 0xf4, 0xf4, 0x58};
 	static const u8 pas202b_matrix[9] =
-		{0x4c, 0xf5, 0xff, 0xf9, 0x51, 0xf5, 0xfb, 0xed, 0x5f};
+/*		{0x4c, 0xf5, 0xff, 0xf9, 0x51, 0xf5, 0xfb, 0xed, 0x5f}; */
+		{0x3e, 0x01, 0x01, 0x00, 0x47, 0xf9, 0x02, 0xfc, 0x49};
 	static const u8 po2030_matrix[9] =
 		{0x60, 0xf0, 0xf0, 0xf0, 0x60, 0xf0, 0xf0, 0xf0, 0x60};
 	static const u8 tas5130c_matrix[9] =
 		{0x68, 0xec, 0xec, 0xec, 0x68, 0xec, 0xec, 0xec, 0x68};
 	static const u8 gc0303_matrix[9] =
-		{0x7b, 0xea, 0xea, 0xea, 0x7b, 0xea, 0xea, 0xea, 0x7b};
+		{0x6c, 0xea, 0xea, 0xea, 0x6c, 0xea, 0xea, 0xea, 0x6c};
 	static const u8 *matrix_tb[SENSOR_MAX] = {
 		[SENSOR_ADCM2700] =	adcm2700_matrix,
 		[SENSOR_CS2102] =	ov7620_matrix,
-		[SENSOR_CS2102K] =	NULL,
+//		[SENSOR_CS2102K] =	NULL,
 		[SENSOR_GC0303] =	gc0303_matrix,
 		[SENSOR_GC0305] =	gc0305_matrix,
-		[SENSOR_HDCS2020] =	NULL,
-		[SENSOR_HV7131B] =	NULL,
+		[SENSOR_HDCS2020] =	hdcs2020_matrix,
+		[SENSOR_HV7131B] =	gc0305_matrix,
 		[SENSOR_HV7131R] =	po2030_matrix,
 		[SENSOR_ICM105A] =	po2030_matrix,
-		[SENSOR_MC501CB] =	NULL,
+		[SENSOR_MC501CB] =	po2030_matrix,
 		[SENSOR_MT9V111_1] =	gc0305_matrix,
 		[SENSOR_MT9V111_3] =	gc0305_matrix,
 		[SENSOR_OV7620] =	ov7620_matrix,
@@ -5917,6 +5139,8 @@
 {
 	struct sd *sd = (struct sd *) gspca_dev;
 
+	if (sd->sensor != SENSOR_HV7131R)
+		return;
 	sd->ctrls[EXPOSURE].val = (i2c_read(gspca_dev, 0x25) << 9)
 		| (i2c_read(gspca_dev, 0x26) << 1)
 		| (i2c_read(gspca_dev, 0x27) >> 7);
@@ -5927,6 +5151,8 @@
 	struct sd *sd = (struct sd *) gspca_dev;
 	int val;
 
+	if (sd->sensor != SENSOR_HV7131R)
+		return;
 	val = sd->ctrls[EXPOSURE].val;
 	i2c_write(gspca_dev, 0x25, val >> 9, 0x00);
 	i2c_write(gspca_dev, 0x26, val >> 1, 0x00);
@@ -5936,32 +5162,20 @@
 static void setquality(struct gspca_dev *gspca_dev)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
-	u8 frxt;
+	s8 reg07;
 
+	reg07 = 0;
 	switch (sd->sensor) {
-	case SENSOR_ADCM2700:
-	case SENSOR_GC0305:
-	case SENSOR_HV7131B:
-	case SENSOR_HV7131R:
 	case SENSOR_OV7620:
+		reg07 = 0x30;
+		break;
+	case SENSOR_HV7131R:
 	case SENSOR_PAS202B:
-	case SENSOR_PO2030:
-		return;
+		return;			/* done by work queue */
 	}
-/*fixme: is it really 0008 0007 0018 for all other sensors? */
-	reg_w(gspca_dev, QUANT_VAL, 0x0008);
-	frxt = 0x30;
-	reg_w(gspca_dev, frxt, 0x0007);
-#if QUANT_VAL == 0 || QUANT_VAL == 1 || QUANT_VAL == 2
-	frxt = 0xff;
-#elif QUANT_VAL == 3
-	frxt = 0xf0;
-#elif QUANT_VAL == 4
-	frxt = 0xe0;
-#else
-	frxt = 0x20;
-#endif
-	reg_w(gspca_dev, frxt, 0x0018);
+	reg_w(gspca_dev, sd->reg08, ZC3XX_R008_CLOCKSETTING);
+	if (reg07 != 0)
+		reg_w(gspca_dev, reg07, 0x0007);
 }
 
 /* Matches the sensor's internal frame rate to the lighting frequency.
@@ -5984,10 +5198,10 @@
 		{cs2102_NoFliker, cs2102_NoFlikerScale,
 		 cs2102_50HZ, cs2102_50HZScale,
 		 cs2102_60HZ, cs2102_60HZScale},
-	[SENSOR_CS2102K] =
-		{cs2102_NoFliker, cs2102_NoFlikerScale,
-		 NULL, NULL, /* currently disabled */
-		 NULL, NULL},
+//	[SENSOR_CS2102K] =
+//		{cs2102k_NoFliker, cs2102k_NoFliker,
+//		 cs2102k_50HZ, cs2102k_50HZ,
+//		 cs2102k_60HZ, cs2102k_60HZ},
 	[SENSOR_GC0303] =
 		{gc0303_NoFliker, gc0303_NoFlikerScale,
 		 gc0303_50HZ, gc0303_50HZScale,
@@ -6061,6 +5275,13 @@
 	zc3_freq = freq_tb[sd->sensor][i];
 	if (zc3_freq == NULL)
 		return;
+	switch (sd->sensor) {
+	case SENSOR_HV7131B:
+	case SENSOR_HV7131R:
+		reg_w(gspca_dev, 0x10,			/* reset level */
+				ZC3XX_R180_AUTOCORRECTENABLE);
+		break;
+	}
 	usb_exchange(gspca_dev, zc3_freq);
 	switch (sd->sensor) {
 	case SENSOR_GC0305:
@@ -6095,6 +5316,115 @@
 	reg_w(gspca_dev, autoval, 0x0180);
 }
 
+/* update the transfer parameters */
+/* This function is executed from a work queue. */
+/* The exact use of the bridge registers 07 and 08 is not known.
+ * The following algorithm has been adapted from ms-win traces */
+static void transfer_update(struct work_struct *work)
+{
+	struct sd *sd = container_of(work, struct sd, work);
+	struct gspca_dev *gspca_dev = &sd->gspca_dev;
+	int change, good;
+	u8 reg07, reg11;
+
+	/* synchronize with the main driver and initialize the registers */
+	mutex_lock(&gspca_dev->usb_lock);
+	reg07 = 0;					/* max */
+	reg_w(gspca_dev, reg07, 0x0007);
+	reg_w(gspca_dev, sd->reg08, ZC3XX_R008_CLOCKSETTING);
+	mutex_unlock(&gspca_dev->usb_lock);
+
+	good = 0;
+	for (;;) {
+		msleep(100);
+
+		/* get the transfer status */
+		/* the bit 0 of the bridge register 11 indicates overflow */
+		mutex_lock(&gspca_dev->usb_lock);
+		if (!gspca_dev->present || !gspca_dev->streaming)
+			goto err;
+		reg11 = reg_r(gspca_dev, 0x0011);
+		if (gspca_dev->usb_err < 0
+		 || !gspca_dev->present || !gspca_dev->streaming)
+			goto err;
+
+		change = reg11 & 0x01;
+		if (change) {				/* overflow */
+			switch (reg07) {
+			case 0:				/* max */
+				reg07 = sd->sensor == SENSOR_HV7131R
+						? 0x30 : 0x32;
+				if (sd->reg08 != 0) {
+					change = 3;
+					sd->reg08--;
+				}
+				break;
+			case 0x32:
+				reg07 -= 4;
+				break;
+			default:
+				reg07 -= 2;
+				break;
+			case 2:
+				change = 0;		/* already min */
+				break;
+			}
+			good = 0;
+		} else {				/* no overflow */
+			if (reg07 != 0) {		/* if not max */
+				good++;
+				if (good >= 10) {
+					good = 0;
+					change = 1;
+					reg07 += 2;
+					switch (reg07) {
+					case 0x30:
+						if (sd->sensor == SENSOR_PAS202B)
+							reg07 += 2;
+						break;
+					case 0x32:
+					case 0x34:
+						reg07 = 0;
+						break;
+					}
+				}
+			} else {			/* reg07 max */
+				if (sd->reg08 < sizeof jpeg_qual - 1) {
+					good++;
+					if (good > 10) {
+						sd->reg08++;
+						change = 2;
+					}
+				}
+			}
+		}
+		if (change) {
+			if (change & 1) {
+				reg_w(gspca_dev, reg07, 0x0007);
+				if (gspca_dev->usb_err < 0
+				 || !gspca_dev->present
+				 || !gspca_dev->streaming)
+					goto err;
+			}
+			if (change & 2) {
+				reg_w(gspca_dev, sd->reg08,
+						ZC3XX_R008_CLOCKSETTING);
+				if (gspca_dev->usb_err < 0
+				 || !gspca_dev->present
+				 || !gspca_dev->streaming)
+					goto err;
+				sd->ctrls[QUALITY].val = jpeg_qual[sd->reg08];
+				jpeg_set_qual(sd->jpeg_hdr,
+						jpeg_qual[sd->reg08]);
+			}
+		}
+		mutex_unlock(&gspca_dev->usb_lock);
+	}
+	return;
+err:
+	mutex_unlock(&gspca_dev->usb_lock);
+}
+
 static void send_unknown(struct gspca_dev *gspca_dev, int sensor)
 {
 	reg_w(gspca_dev, 0x01, 0x0000);		/* bridge reset */
@@ -6129,8 +5459,11 @@
 /* start probe 2 wires */
 static void start_2wr_probe(struct gspca_dev *gspca_dev, int sensor)
 {
+	struct sd *sd = (struct sd *) gspca_dev;
+
 	reg_w(gspca_dev, 0x01, 0x0000);
-	reg_w(gspca_dev, sensor, 0x0010);
+	if (sd->sensor != SENSOR_GC0303)
+		reg_w(gspca_dev, sensor, 0x0010);
 	reg_w(gspca_dev, 0x01, 0x0001);
 	reg_w(gspca_dev, 0x03, 0x0012);
 	reg_w(gspca_dev, 0x01, 0x0012);
@@ -6156,6 +5489,7 @@
 
 static int vga_2wr_probe(struct gspca_dev *gspca_dev)
 {
+	struct sd *sd = (struct sd *) gspca_dev;
 	u16 retword;
 
 	start_2wr_probe(gspca_dev, 0x00);	/* HV7131B */
@@ -6164,11 +5498,13 @@
 	if (retword != 0)
 		return 0x00;			/* HV7131B */
 
-	start_2wr_probe(gspca_dev, 0x04);	/* CS2102 */
-	i2c_write(gspca_dev, 0x01, 0xaa, 0x00);
-	retword = i2c_read(gspca_dev, 0x01);
-	if (retword != 0)
-		return 0x04;			/* CS2102 */
+	if (sd->sensor != SENSOR_GC0303) {
+		start_2wr_probe(gspca_dev, 0x04);	/* CS2102 */
+		i2c_write(gspca_dev, 0x01, 0xaa, 0x00);
+		retword = i2c_read(gspca_dev, 0x01);
+		if (retword != 0)
+			return 0x04;			/* CS2102 */
+	}
 
 	start_2wr_probe(gspca_dev, 0x06);	/* OmniVision */
 	reg_w(gspca_dev, 0x08, 0x008d);
@@ -6220,6 +5556,8 @@
 	retword = i2c_read(gspca_dev, 0x01);
 	if (retword != 0)
 		return 0x02;			/* TAS5130C */
+	if (sd->sensor == SENSOR_GC0303)
+		return -1;
 ov_check:
 	reg_r(gspca_dev, 0x0010);		/* ?? */
 	reg_r(gspca_dev, 0x0010);
@@ -6253,13 +5591,16 @@
 	u8 internal_sensor_id;
 };
 static const struct sensor_by_chipset_revision chipset_revision_sensor[] = {
-	{0xc000, 0x12},		/* TAS5130C */
+//fixme: test - don't use these values
+//	{0xc000, 0x12},		/* TAS5130C */
 	{0xc001, 0x13},		/* MT9V111 */
 	{0xe001, 0x13},
 	{0x8001, 0x13},
-	{0x8000, 0x14},		/* CS2102K */
-	{0x8400, 0x15},		/* MT9V111 */
-	{0xe400, 0x15},
+////	{0x8000, 0x14},		/* CS2102K */
+//fixme: test - don't use these values
+//	{0x8000, 0x14},		/* HDCS2020 */
+//	{0x8400, 0x15},		/* MT9V111 */
+//	{0xe400, 0x15},
 };
 
 static int vga_3wr_probe(struct gspca_dev *gspca_dev)
@@ -6269,7 +5610,25 @@
 	u16 retword;
 
 /*fixme: lack of 8b=b3 (11,12)-> 10, 8b=e0 (14,15,16)-> 12 found in gspcav1*/
-	reg_w(gspca_dev, 0x02, 0x0010);
+#if 0
+	reg_w(gspca_dev, 0x00, ZC3XX_R010_CMOSSENSORSELECT);
+	reg_w(gspca_dev, 0xe0, ZC3XX_R08B_I2CDEVICEADDR);
+//inex in traces
+	reg_w(gspca_dev, 0x03, ZC3XX_R012_VIDEOCONTROLFUNC);
+	reg_w(gspca_dev, 0x01, ZC3XX_R012_VIDEOCONTROLFUNC);
+	retword = i2c_read(gspca_dev, 0x14);
+	if (retword != 0)
+		return 0x12;			/* TAS5130C */
+	retword = i2c_read(gspca_dev, 0x15);
+	if (retword != 0)
+		return 0x12;			/* TAS5130C */
+	retword = i2c_read(gspca_dev, 0x16);
+	if (retword != 0)
+		return 0x12;			/* TAS5130C */
+#endif
+
+	if (sd->sensor != SENSOR_GC0303)
+		reg_w(gspca_dev, 0x02, 0x0010);
 	reg_r(gspca_dev, 0x0010);
 	reg_w(gspca_dev, 0x01, 0x0000);
 	reg_w(gspca_dev, 0x00, 0x0010);
@@ -6288,7 +5647,8 @@
 	if (retword != 0)
 		return 0x11;			/* HV7131R */
 
-	reg_w(gspca_dev, 0x02, 0x0010);
+	if (sd->sensor != SENSOR_GC0303)
+		reg_w(gspca_dev, 0x02, 0x0010);
 	retword = reg_r(gspca_dev, 0x000b) << 8;
 	retword |= reg_r(gspca_dev, 0x000a);
 	PDEBUG(D_PROBE, "probe 3wr vga 1 0x%04x", retword);
@@ -6303,16 +5663,18 @@
 		}
 	}
 
-	reg_w(gspca_dev, 0x01, 0x0000);	/* check PB0330 */
-	reg_w(gspca_dev, 0x01, 0x0001);
-	reg_w(gspca_dev, 0xdd, 0x008b);
-	reg_w(gspca_dev, 0x0a, 0x0010);
-	reg_w(gspca_dev, 0x03, 0x0012);
-	reg_w(gspca_dev, 0x01, 0x0012);
-	retword = i2c_read(gspca_dev, 0x00);
-	if (retword != 0) {
-		PDEBUG(D_PROBE, "probe 3wr vga type 0a");
-		return 0x0a;			/* PB0330 */
+	if (sd->sensor != SENSOR_GC0303) {
+		reg_w(gspca_dev, 0x01, 0x0000);	/* check PB0330 */
+		reg_w(gspca_dev, 0x01, 0x0001);
+		reg_w(gspca_dev, 0xdd, 0x008b);
+		reg_w(gspca_dev, 0x0a, 0x0010);
+		reg_w(gspca_dev, 0x03, 0x0012);
+		reg_w(gspca_dev, 0x01, 0x0012);
+		retword = i2c_read(gspca_dev, 0x00);
+		if (retword != 0) {
+			PDEBUG(D_PROBE, "probe 3wr vga type 0a");
+			return 0x0a;			/* PB0330 */
+		}
 	}
 
 	/* probe gc0303 / gc0305 */
@@ -6392,9 +5754,6 @@
 	switch (sd->sensor) {
 	case SENSOR_MC501CB:
 		return -1;		/* don't probe */
-	case SENSOR_GC0303:
-			/* may probe but with no write in reg 0x0010 */
-		return -1;		/* don't probe */
 	case SENSOR_PAS106:
 		sensor =  sif_probe(gspca_dev);
 		if (sensor >= 0)
@@ -6422,11 +5781,9 @@
 	sd->sensor = id->driver_info;
 
 	gspca_dev->cam.ctrls = sd->ctrls;
-	sd->quality = QUALITY_DEF;
+	sd->reg08 = REG08_DEF;
 
-	/* if USB 1.1, let some bandwidth for the audio device */
-	if (gspca_dev->audio && gspca_dev->dev->speed < USB_SPEED_HIGH)
-		gspca_dev->nbalt--;
+	INIT_WORK(&sd->work, transfer_update);
 
 	return 0;
 }
@@ -6440,7 +5797,7 @@
 	static const u8 gamma[SENSOR_MAX] = {
 		[SENSOR_ADCM2700] =	4,
 		[SENSOR_CS2102] =	4,
-		[SENSOR_CS2102K] =	5,
+//		[SENSOR_CS2102K] =	5,
 		[SENSOR_GC0303] =	3,
 		[SENSOR_GC0305] =	4,
 		[SENSOR_HDCS2020] =	4,
@@ -6461,7 +5818,7 @@
 	static const u8 mode_tb[SENSOR_MAX] = {
 		[SENSOR_ADCM2700] =	2,
 		[SENSOR_CS2102] =	1,
-		[SENSOR_CS2102K] =	1,
+//		[SENSOR_CS2102K] =	1,
 		[SENSOR_GC0303] =	1,
 		[SENSOR_GC0305] =	1,
 		[SENSOR_HDCS2020] =	1,
@@ -6479,6 +5836,27 @@
 		[SENSOR_PO2030] =	1,
 		[SENSOR_TAS5130C] =	1,
 	};
+	static const u8 reg08_tb[SENSOR_MAX] = {
+		[SENSOR_ADCM2700] =	1,
+		[SENSOR_CS2102] =	3,
+//		[SENSOR_CS2102K] =	3,
+		[SENSOR_GC0303] =	2,
+		[SENSOR_GC0305] =	3,
+		[SENSOR_HDCS2020] =	1,
+		[SENSOR_HV7131B] =	3,
+		[SENSOR_HV7131R] =	3,
+		[SENSOR_ICM105A] =	3,
+		[SENSOR_MC501CB] =	3,
+		[SENSOR_MT9V111_1] =	3,
+		[SENSOR_MT9V111_3] =	3,
+		[SENSOR_OV7620] =	1,
+		[SENSOR_OV7630C] =	3,
+		[SENSOR_PAS106] =	3,
+		[SENSOR_PAS202B] =	3,
+		[SENSOR_PB0330] =	3,
+		[SENSOR_PO2030] =	2,
+		[SENSOR_TAS5130C] =	3,
+	};
 
 	sensor = zcxx_probeSensor(gspca_dev);
 	if (sensor >= 0)
@@ -6497,7 +5875,7 @@
 				PDEBUG(D_PROBE, "Sensor GC0303");
 				break;
 			default:
-				warn("Unknown sensor - set to TAS5130C");
+				pr_warn("Unknown sensor - set to TAS5130C\n");
 				sd->sensor = SENSOR_TAS5130C;
 			}
 			break;
@@ -6543,7 +5921,6 @@
 		case 0x0e:
 			PDEBUG(D_PROBE, "Find Sensor PAS202B");
 			sd->sensor = SENSOR_PAS202B;
-/*			sd->sharpness = 1; */
 			break;
 		case 0x0f:
 			PDEBUG(D_PROBE, "Find Sensor PAS106");
@@ -6569,9 +5946,9 @@
 			break;
 		case 0x14:
 			PDEBUG(D_PROBE,
-				"Find Sensor CS2102K?. Chip revision %x",
+				"Find Sensor HDCS2020. Chip revision %x",
 				sd->chip_revision);
-			sd->sensor = SENSOR_CS2102K;
+			sd->sensor = SENSOR_HDCS2020;
 			break;
 		case 0x16:
 			PDEBUG(D_PROBE, "Find Sensor ADCM2700");
@@ -6603,7 +5980,7 @@
 			sd->sensor = SENSOR_OV7620;	/* same sensor (?) */
 			break;
 		default:
-			err("Unknown sensor %04x", sensor);
+			pr_err("Unknown sensor %04x\n", sensor);
 			return -EINVAL;
 		}
 	}
@@ -6631,13 +6008,21 @@
 	}
 
 	sd->ctrls[GAMMA].def = gamma[sd->sensor];
+	sd->reg08 = reg08_tb[sd->sensor];
+	sd->ctrls[QUALITY].def = jpeg_qual[sd->reg08];
+	sd->ctrls[QUALITY].min = jpeg_qual[0];
+	sd->ctrls[QUALITY].max = jpeg_qual[ARRAY_SIZE(jpeg_qual) - 1];
 
 	switch (sd->sensor) {
 	case SENSOR_HV7131R:
+		gspca_dev->ctrl_dis = (1 << QUALITY);
 		break;
 	case SENSOR_OV7630C:
 		gspca_dev->ctrl_dis = (1 << LIGHTFREQ) | (1 << EXPOSURE);
 		break;
+	case SENSOR_PAS202B:
+		gspca_dev->ctrl_dis = (1 << QUALITY) | (1 << EXPOSURE);
+		break;
 	default:
 		gspca_dev->ctrl_dis = (1 << EXPOSURE);
 		break;
@@ -6661,8 +6046,8 @@
 			{adcm2700_Initial, adcm2700_InitialScale},
 	[SENSOR_CS2102]	=
 			{cs2102_Initial, cs2102_InitialScale},
-	[SENSOR_CS2102K] =
-			{cs2102K_Initial, cs2102K_InitialScale},
+//	[SENSOR_CS2102K] =
+//			{cs2102k_Initial, cs2102k_InitialScale},
 	[SENSOR_GC0303] =
 		{gc0303_Initial, gc0303_InitialScale},
 	[SENSOR_GC0305] =
@@ -6700,13 +6085,12 @@
 	/* create the JPEG header */
 	jpeg_define(sd->jpeg_hdr, gspca_dev->height, gspca_dev->width,
 			0x21);		/* JPEG 422 */
-	jpeg_set_qual(sd->jpeg_hdr, sd->quality);
 
 	mode = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv;
 	switch (sd->sensor) {
-	case SENSOR_HV7131R:
-		zcxx_probeSensor(gspca_dev);
-		break;
+//	case SENSOR_HV7131R:
+//		zcxx_probeSensor(gspca_dev);
+//		break;
 	case SENSOR_PAS106:
 		usb_exchange(gspca_dev, pas106b_Initial_com);
 		break;
@@ -6761,9 +6145,7 @@
 
 	/* set the gamma tables when not set */
 	switch (sd->sensor) {
-	case SENSOR_CS2102K:		/* gamma set in xxx_Initial */
-	case SENSOR_HDCS2020:
-	case SENSOR_OV7630C:
+	case SENSOR_OV7630C:		/* gamma set in xxx_Initial */
 		break;
 	default:
 		setcontrast(gspca_dev);
@@ -6776,10 +6158,9 @@
 		reg_r(gspca_dev, 0x0180);	/* from win */
 		reg_w(gspca_dev, 0x00, 0x0180);
 		break;
-	default:
-		setquality(gspca_dev);
-		break;
 	}
+	setquality(gspca_dev);
+	jpeg_set_qual(sd->jpeg_hdr, jpeg_qual[sd->reg08]);
 	setlightfreq(gspca_dev);
 
 	switch (sd->sensor) {
@@ -6791,10 +6172,10 @@
 		reg_w(gspca_dev, 0x40, 0x0117);
 		break;
 	case SENSOR_HV7131R:
-		if (!sd->ctrls[AUTOGAIN].val)
-			setexposure(gspca_dev);
+		setexposure(gspca_dev);
 		reg_w(gspca_dev, 0x00, ZC3XX_R1A7_CALCGLOBALMEAN);
 		break;
+	case SENSOR_GC0303:
 	case SENSOR_GC0305:
 	case SENSOR_TAS5130C:
 		reg_w(gspca_dev, 0x09, 0x01ad);	/* (from win traces) */
@@ -6817,13 +6198,19 @@
 	}
 
 	setautogain(gspca_dev);
-	switch (sd->sensor) {
-	case SENSOR_PO2030:
-		msleep(50);
-		reg_w(gspca_dev, 0x00, 0x0007);	/* (from win traces) */
-		reg_w(gspca_dev, 0x02, ZC3XX_R008_CLOCKSETTING);
-		break;
+
+	/* start the transfer update thread if needed */
+	if (gspca_dev->usb_err >= 0) {
+		switch (sd->sensor) {
+		case SENSOR_HV7131R:
+		case SENSOR_PAS202B:
+			sd->work_thread =
+				create_singlethread_workqueue(KBUILD_MODNAME);
+			queue_work(sd->work_thread, &sd->work);
+			break;
+		}
 	}
+
 	return gspca_dev->usb_err;
 }
 
@@ -6832,6 +6219,12 @@
 {
 	struct sd *sd = (struct sd *) gspca_dev;
 
+	if (sd->work_thread != NULL) {
+		mutex_unlock(&gspca_dev->usb_lock);
+		destroy_workqueue(sd->work_thread);
+		mutex_lock(&gspca_dev->usb_lock);
+		sd->work_thread = NULL;
+	}
 	if (!gspca_dev->present)
 		return;
 	send_unknown(gspca_dev, sd->sensor);
@@ -6908,19 +6301,33 @@
 	return -EINVAL;
 }
 
+static int sd_setquality(struct gspca_dev *gspca_dev, __s32 val)
+{
+	struct sd *sd = (struct sd *) gspca_dev;
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(jpeg_qual) - 1; i++) {
+		if (val <= jpeg_qual[i])
+			break;
+	}
+	if (i > 0
+	 && i == sd->reg08
+	 && val < jpeg_qual[sd->reg08])
+		i--;
+	sd->reg08 = i;
+	sd->ctrls[QUALITY].val = jpeg_qual[i];
+	if (gspca_dev->streaming)
+		jpeg_set_qual(sd->jpeg_hdr, sd->ctrls[QUALITY].val);
+	return gspca_dev->usb_err;
+}
+
 static int sd_set_jcomp(struct gspca_dev *gspca_dev,
 			struct v4l2_jpegcompression *jcomp)
 {
 	struct sd *sd = (struct sd *) gspca_dev;
 
-	if (jcomp->quality < QUALITY_MIN)
-		sd->quality = QUALITY_MIN;
-	else if (jcomp->quality > QUALITY_MAX)
-		sd->quality = QUALITY_MAX;
-	else
-		sd->quality = jcomp->quality;
-	if (gspca_dev->streaming)
-		jpeg_set_qual(sd->jpeg_hdr, sd->quality);
+	sd_setquality(gspca_dev, jcomp->quality);
+	jcomp->quality = sd->ctrls[QUALITY].val;
 	return gspca_dev->usb_err;
 }
 
@@ -6930,7 +6337,7 @@
 	struct sd *sd = (struct sd *) gspca_dev;
 
 	memset(jcomp, 0, sizeof *jcomp);
-	jcomp->quality = sd->quality;
+	jcomp->quality = sd->ctrls[QUALITY].val;
 	jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT
 			| V4L2_JPEG_MARKER_DQT;
 	return 0;
@@ -6953,7 +6360,7 @@
 #endif
 
 static const struct sd_desc sd_desc = {
-	.name = MODULE_NAME,
+	.name = KBUILD_MODNAME,
 	.ctrls = sd_ctrls,
 	.nctrls = ARRAY_SIZE(sd_ctrls),
 	.config = sd_config,
@@ -6970,6 +6377,7 @@
 };
 
 static const struct usb_device_id device_table[] = {
+	{USB_DEVICE(0x03f0, 0x1b07)},
 	{USB_DEVICE(0x041e, 0x041e)},
 	{USB_DEVICE(0x041e, 0x4017)},
 	{USB_DEVICE(0x041e, 0x401c), .driver_info = SENSOR_PAS106},
@@ -7037,28 +6445,18 @@
 
 /* USB driver */
 static struct usb_driver sd_driver = {
-	.name = MODULE_NAME,
+	.name = KBUILD_MODNAME,
 	.id_table = device_table,
 	.probe = sd_probe,
 	.disconnect = gspca_disconnect,
 #ifdef CONFIG_PM
 	.suspend = gspca_suspend,
 	.resume = gspca_resume,
+	.reset_resume = gspca_resume,
 #endif
 };
 
-static int __init sd_mod_init(void)
-{
-	return usb_register(&sd_driver);
-}
-
-static void __exit sd_mod_exit(void)
-{
-	usb_deregister(&sd_driver);
-}
-
-module_init(sd_mod_init);
-module_exit(sd_mod_exit);
+module_usb_driver(sd_driver);
 
 module_param(force_sensor, int, 0644);
 MODULE_PARM_DESC(force_sensor,
diff -uNra linux-3.0.82/drivers/media/video/i2c-ls1x.c linux-3.0.82x/drivers/media/video/i2c-ls1x.c
--- linux-3.0.82/drivers/media/video/i2c-ls1x.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/i2c-ls1x.c	2017-09-23 03:42:49.534676542 +0800
@@ -0,0 +1,336 @@
+/*
+ *  Copyright (c) 2013 Tang, Haifeng <tanghaifeng-gz@loongson.cn>
+ *
+ *  Based partly on i2c-at91.c
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+*/
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+#include <linux/types.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/clk.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+
+#define I2C_CLOCK		100000		/* Hz. max 400 Kbits/sec */
+
+/* registers */
+#define OCI2C_PRELOW		0
+#define OCI2C_PREHIGH		1
+#define OCI2C_CONTROL		2
+#define OCI2C_DATA		3
+#define OCI2C_CMD		4 /* write only */
+#define OCI2C_STATUS		4 /* read only, same address as OCI2C_CMD */
+
+#define OCI2C_CTRL_IEN		0x40
+#define OCI2C_CTRL_EN		0x80
+
+#define OCI2C_CMD_START		0x90
+#define OCI2C_CMD_STOP		0x40
+#define OCI2C_CMD_READ		0x20
+#define OCI2C_CMD_WRITE		0x10
+#define OCI2C_CMD_READ_ACK	0x20
+#define OCI2C_CMD_READ_NACK	0x28
+#define OCI2C_CMD_IACK		0x00
+
+#define OCI2C_STAT_IF		0x01
+#define OCI2C_STAT_TIP		0x02
+#define OCI2C_STAT_ARBLOST	0x20
+#define OCI2C_STAT_BUSY		0x40
+#define OCI2C_STAT_NACK		0x80
+
+
+struct ls1x_i2c {
+	void __iomem *base;
+	struct i2c_adapter adap;
+};
+
+static inline void i2c_writeb(struct ls1x_i2c *i2c, int reg, u8 value)
+{
+	writeb(value, i2c->base + reg);
+}
+
+static inline u8 i2c_readb(struct ls1x_i2c *i2c, int reg)
+{
+	return readb(i2c->base + reg);
+}
+
+/*
+ * Poll the i2c status register until the specified bit is set.
+ * Returns 0 if timed out (100 msec).
+ */
+static short ls1x_poll_status(struct ls1x_i2c *i2c, unsigned long bit)
+{
+	int loop_cntr = 10000;
+
+	return 1;
+	do {
+		udelay(10);
+	} while ((i2c_readb(i2c, OCI2C_STATUS) & bit) && (--loop_cntr > 0));
+
+	return (loop_cntr > 0);
+}
+
+static int ls1x_xfer_read(struct ls1x_i2c *i2c, unsigned char *buf, int length) 
+{
+	int x;
+
+	for (x=0; x<length; x++) {
+		/* send ACK last not send ACK */
+		if (x != (length -1)) 
+			i2c_writeb(i2c, OCI2C_CMD, OCI2C_CMD_READ_NACK); //dbg-yg nack for camera
+		else
+			i2c_writeb(i2c, OCI2C_CMD, OCI2C_CMD_READ_NACK);
+#if 1  //dbg-yg camera
+		if (!ls1x_poll_status(i2c, OCI2C_STAT_TIP)) {
+			dev_dbg(&i2c->adap.dev, "READ timeout\n");
+			return -ETIMEDOUT;
+		}
+#endif		
+		*buf++ = i2c_readb(i2c, OCI2C_DATA);
+	}
+	i2c_writeb(i2c,OCI2C_CMD, OCI2C_CMD_STOP);
+		
+	return 0;
+}
+
+static int ls1x_xfer_write(struct ls1x_i2c *i2c, unsigned char *buf, int length)
+{
+	int x;
+
+	for (x=0; x<length; x++) {
+		i2c_writeb(i2c, OCI2C_DATA, *buf++);
+		i2c_writeb(i2c, OCI2C_CMD, OCI2C_CMD_WRITE);
+		if (!ls1x_poll_status(i2c, OCI2C_STAT_TIP)) {
+			dev_dbg(&i2c->adap.dev, "WRITE timeout\n");
+			return -ETIMEDOUT;
+		}
+#if 0  //dbg-yg camera
+		if (i2c_readb(i2c, OCI2C_STATUS) & OCI2C_STAT_NACK) {
+			i2c_writeb(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
+			return length;
+		}
+#endif
+	}
+	i2c_writeb(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
+
+	return 0;
+}
+
+static int ls1x_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num)
+{
+	struct ls1x_i2c *i2c = (struct ls1x_i2c *)adap->algo_data;
+	int i, ret;
+
+	dev_dbg(&adap->dev, "ls1x_xfer: processing %d messages:\n", num);
+	printk(" --------------------> new test camera  ---------------_>\r\n");
+	for (i = 0; i < num; i++) {
+		dev_dbg(&adap->dev, " #%d: %sing %d byte%s %s 0x%02x\n", i,
+			pmsg->flags & I2C_M_RD ? "read" : "writ",
+			pmsg->len, pmsg->len > 1 ? "s" : "",
+			pmsg->flags & I2C_M_RD ? "from" : "to",	pmsg->addr);
+
+		if (!ls1x_poll_status(i2c, OCI2C_STAT_BUSY)) {
+			return -ETIMEDOUT;
+		}
+
+		i2c_writeb(i2c, OCI2C_DATA, (pmsg->addr << 1)
+			| ((pmsg->flags & I2C_M_RD) ? 1 : 0));
+		i2c_writeb(i2c, OCI2C_CMD, OCI2C_CMD_START);
+
+		/* Wait until transfer is finished */
+		if (!ls1x_poll_status(i2c, OCI2C_STAT_TIP)) {
+			dev_dbg(&adap->dev, "TXCOMP timeout\n");
+			return -ETIMEDOUT;
+		}
+#if 0  //dbg-yg camera
+		if (i2c_readb(i2c, OCI2C_STATUS) & OCI2C_STAT_NACK) {
+			dev_err(&adap->dev, "slave addr no ack !!\n");
+			i2c_writeb(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
+			return 0;
+		}
+#endif
+ 		if (pmsg->flags & I2C_M_RD)
+			ret = ls1x_xfer_read(i2c, pmsg->buf, pmsg->len);
+  		else
+			ret = ls1x_xfer_write(i2c, pmsg->buf, pmsg->len);
+
+		if (ret)
+			return ret;
+		dev_dbg(&adap->dev, "transfer complete\n");
+		pmsg++;
+	}
+	return i;
+}
+
+static void ls1x_i2c_hwinit(struct ls1x_i2c *i2c)
+{
+	struct clk *clk;
+	int prescale;
+	u8 ctrl = i2c_readb(i2c, OCI2C_CONTROL);
+
+	/* make sure the device is disabled */
+	i2c_writeb(i2c, OCI2C_CONTROL, ctrl & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN));
+//	i2c_writeb(i2c, OCI2C_CONTROL, 0);	//lxy
+
+#if 0
+	clk = clk_get(NULL, "ddr");
+	prescale = clk_get_rate(clk) / 2;
+	prescale = (prescale / (5*I2C_CLOCK)) - 1;
+	i2c_writeb(i2c, OCI2C_PRELOW, prescale & 0xff);
+	i2c_writeb(i2c, OCI2C_PREHIGH, prescale >> 8);
+#else
+	i2c_writeb(i2c, OCI2C_PRELOW, 0x64);
+	i2c_writeb(i2c, OCI2C_PREHIGH, 0);
+#endif
+
+	/* Init the device */
+	i2c_writeb(i2c, OCI2C_CMD, OCI2C_CMD_IACK);
+	i2c_writeb(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_IEN | OCI2C_CTRL_EN);
+//	i2c_writeb(i2c, OCI2C_CONTROL, OCI2C_CTRL_EN);	//lxy
+}
+
+static u32 ls1x_functionality(struct i2c_adapter *adap)
+{
+	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
+}
+
+static const struct i2c_algorithm ls1x_algorithm = {
+	.master_xfer	= ls1x_xfer,
+	.functionality	= ls1x_functionality,
+};
+
+static int __devinit ls1x_i2c_probe(struct platform_device *pdev)
+{
+	struct ls1x_i2c *i2c;
+	struct resource *res;
+	int rc;
+
+	res =  platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!res) {
+		dev_err(&pdev->dev, "cannot find IO resource\n");
+		return -ENOENT;
+	}
+
+	if (!(i2c = kzalloc(sizeof(struct ls1x_i2c), GFP_KERNEL))) {
+		dev_err(&pdev->dev, "can't allocate inteface!\n");
+		rc = -ENOMEM;
+		goto fail2;
+	}
+	
+	if (!request_mem_region(res->start, resource_size(res), "ls1x-i2c"))
+		return -EBUSY;
+
+	i2c->base = ioremap(res->start, resource_size(res));
+	if (!i2c->base) {
+		dev_err(&pdev->dev, "i2c-ls1x - failed to map controller\n");
+		rc = -ENOMEM;
+		goto fail1;
+	}
+
+	strlcpy(i2c->adap.name, "loongson1", sizeof(i2c->adap.name));
+	i2c->adap.owner   = THIS_MODULE;
+	i2c->adap.algo    = &ls1x_algorithm;
+	i2c->adap.class   = I2C_CLASS_HWMON;
+	i2c->adap.algo_data = i2c;
+	i2c->adap.dev.parent = &pdev->dev;
+	i2c->adap.nr = pdev->id;
+
+	//lxy
+	*(volatile unsigned int *)(0xbfd010c0) = 0x0;
+	*(volatile unsigned int *)(0xbfd010c4) = 0x0;
+	*(volatile unsigned int *)(0xbfd010c8) = 0x0;
+
+	ls1x_i2c_hwinit(i2c);
+
+	platform_set_drvdata(pdev, i2c);
+
+	rc = i2c_add_numbered_adapter(&i2c->adap);
+	if (rc) {
+		dev_err(&pdev->dev, "Adapter %s registration failed\n",
+				i2c->adap.name);
+		goto fail0;
+	}
+
+	dev_info(&pdev->dev, "Loongson1 i2c bus driver.\n");
+	return 0;
+
+fail0:
+	platform_set_drvdata(pdev, NULL);
+fail1:
+	iounmap(i2c->base);
+	release_mem_region(res->start, resource_size(res));
+fail2:
+	kfree(i2c);
+
+	return rc;
+}
+
+static int __devexit ls1x_i2c_remove(struct platform_device *pdev)
+{
+	struct ls1x_i2c *i2c = platform_get_drvdata(pdev);
+	struct resource *res;
+	int rc;
+
+	rc = i2c_del_adapter(&i2c->adap);
+	platform_set_drvdata(pdev, NULL);
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	iounmap(i2c->base);
+	release_mem_region(res->start, resource_size(res));
+
+	return rc;
+}
+
+#ifdef CONFIG_PM
+static int ls1x_i2c_suspend(struct platform_device *pdev, pm_message_t mesg)
+{
+	return 0;
+}
+
+static int ls1x_i2c_resume(struct platform_device *pdev)
+{
+	return 0;
+}
+
+#else
+#define ls1x_i2c_suspend	NULL
+#define ls1x_i2c_resume	NULL
+#endif
+
+static struct platform_driver ls1x_i2c_driver = {
+	.probe		= ls1x_i2c_probe,
+	.remove		= __devexit_p(ls1x_i2c_remove),
+	.suspend	= ls1x_i2c_suspend,
+	.resume		= ls1x_i2c_resume,
+	.driver		= {
+		.owner	= THIS_MODULE,
+		.name	= "ls1x-i2c",
+	},
+};
+
+static int __init ls1x_i2c_init(void)
+{
+	return platform_driver_register(&ls1x_i2c_driver);
+}
+
+static void __exit ls1x_i2c_exit(void)
+{
+	platform_driver_unregister(&ls1x_i2c_driver);
+}
+
+module_init(ls1x_i2c_init);
+module_exit(ls1x_i2c_exit);
+
+MODULE_AUTHOR("TangHaifeng <tanghaifeng-gz@loongson.cn>");
+MODULE_DESCRIPTION("I2C driver for Loongson 1A/1B");
+MODULE_LICENSE("GPL");
+
diff -uNra linux-3.0.82/drivers/media/video/Kconfig linux-3.0.82x/drivers/media/video/Kconfig
--- linux-3.0.82/drivers/media/video/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/Kconfig	2017-09-23 03:42:49.538676531 +0800
@@ -782,6 +782,31 @@
 	  over a bus like PCI or USB. For example some i2c camera connected
 	  directly to the data bus of an SoC.
 
+config SOC_CAMERA_LS1C
+	tristate "ls1c_soc camera controller support"
+	depends on SOC_CAMERA && I2C
+	select VIDEOBUF_DMA_CONTIG
+	help
+	  This driver supports cameras from ls1c.
+
+config SOC_CAMERA_GC0308
+	tristate "GC0308 camera support for ls1c."
+	depends on SOC_CAMERA_LS1C
+	help
+	  This is a GC0308 camera driver
+
+config SOC_CAMERA_S5K5CA
+	tristate "S5K5CA camera support for ls1c."
+	depends on SOC_CAMERA_LS1C
+	help
+	  This is a S5K5CA camera driver
+
+config SOC_CAMERA_OV9650
+	tristate "OV9650 camera support for ls1c."
+	depends on SOC_CAMERA_LS1C
+	help
+	  This is a OV9650 camera driver
+
 config SOC_CAMERA_IMX074
 	tristate "imx074 support"
 	depends on SOC_CAMERA && I2C
@@ -994,6 +1019,8 @@
 
 source "drivers/media/video/pwc/Kconfig"
 
+
+
 config USB_ZR364XX
 	tristate "USB ZR364XX Camera support"
 	depends on VIDEO_V4L2
@@ -1031,6 +1058,13 @@
 	  This driver can be compiled as a module, called s2255drv.
 
 endif # V4L_USB_DRIVERS
+
+config VIDEO_GC0308		#lxy
+	tristate "GC0308 supporting camera driver"
+	depends on I2C && VIDEO_V4L2
+	---help---
+	  This driver supports GC0308 SoC camera module
+	  
 endif # VIDEO_CAPTURE_DRIVERS
 
 menuconfig V4L_MEM2MEM_DRIVERS
diff -uNra linux-3.0.82/drivers/media/video/ls1c_bak/ls1c_ov9650.c linux-3.0.82x/drivers/media/video/ls1c_bak/ls1c_ov9650.c
diff -uNra linux-3.0.82/drivers/media/video/ls1c_camera.c linux-3.0.82x/drivers/media/video/ls1c_camera.c
--- linux-3.0.82/drivers/media/video/ls1c_camera.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/ls1c_camera.c	2017-09-23 03:42:49.538676531 +0800
@@ -0,0 +1,1028 @@
+/*
+ * V4L2 Driver for LS1C_SoC camera host
+ *
+ * Copyright (C) 2013-05-08, linxiyuan <linxiyuan-gz@foxmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/dma-mapping.h>
+#include <linux/errno.h>
+#include <linux/fs.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/mutex.h>
+#include <linux/platform_device.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/time.h>
+#include <linux/version.h>
+#include <linux/videodev2.h>
+#include <linux/timer.h>
+#include <linux/timex.h>
+#include <linux/rtc.h>
+#include <media/soc_camera.h>
+#include <media/v4l2-common.h>
+#include <media/v4l2-dev.h>
+#include <media/videobuf-dma-contig.h>
+#include <media/soc_mediabus.h>
+
+#include <irq.h>
+#include <ls1b_board.h>
+//#include <linux/types.h>
+
+
+/*
+ * lcd about
+ */
+#define LCD_WIDTH  800
+
+/*
+ * camera registers
+ */
+#define CAM_DMA0_CONFIG		0x0
+#define CAM_DMA1_CONFIG		0x8
+#define CAM_DMA2_CONFIG		0x10
+#define CAM_DMA3_CONFIG		0x18
+#define CAM_PIX_CONFIG		0x20
+#define CAM_UOFF_CONFIG		0x28
+#define CAM_VOFF_CONFIG		0x30
+#define CAM_CAMIF_CONFIG    0x38
+#define	LS1C_CAM_DMA_CNT	4
+#define	LS1C_CAM_START		31
+
+#define LS1C_CAMERA_DATA_HIGH	1
+#define LS1C_CAMERA_PCLK_RISING	2
+#define LS1C_CAMERA_VSYNC_HIGH	4
+
+#define	CONFIG_PARA_H_WD				16
+#define	CONFIG_PARA_OUTPUT_DATA_MODE	13
+#define	CONFIG_PARA_INPUT_DATA_MODE		11
+#define	CONFIG_PARA_640X480				7
+#define	CONFIG_PARA_YUV_ORDER			4
+
+
+#define	CONFIG_PARA_HS			(1 << 1)
+#define	CONFIG_PARA_VS			(1 << 0)
+
+#define VERSION_CODE KERNEL_VERSION(0, 0, 1)
+#define DRIVER_NAME "ls1c-camera"
+
+#define CSI_BUS_FLAGS	(SOCAM_MASTER | SOCAM_HSYNC_ACTIVE_HIGH | \
+			SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW | \
+			SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATA_ACTIVE_LOW | \
+			SOCAM_DATAWIDTH_8)
+
+#define MAX_VIDEO_MEM 4	/* Video memory limit in megabytes */
+//#define MAX_VIDEO_MEM 16	/* Video memory limit in megabytes */
+
+#define	POLL_CAMERA	1
+
+struct timeval t_start,t_end;
+
+    long cost_time = 0; 
+static unsigned int flag = 0;
+static unsigned int buf_init_cnt = 0;
+struct timer_list my_timer;
+struct timex  txc;
+struct rtc_time tm;
+
+//static void ls1c_camera_irq(int irq, void *data);
+static irqreturn_t ls1c_camera_irq(int irq, void *data);
+/* buffer for one video frame */
+struct ls1c_camera_buffer {
+	/* common v4l buffer stuff -- must be first */
+	struct videobuf_buffer		vb;
+	enum v4l2_mbus_pixelcode	code;
+	int				inwork;
+};
+
+/*
+ * Only supposed to handle one camera on its Camera Sensor
+ * Interface. If anyone ever builds hardware to enable more than
+ * one camera, they will have to modify this driver too
+ */
+struct ls1c_camera_dev {
+	struct soc_camera_host		soc_host;
+	struct soc_camera_device	*icd;
+	struct ls1c_camera_pdata		*pdata;
+	struct ls1c_camera_buffer		*active;
+	struct resource			*res;
+	struct clk			*clk;
+	struct list_head		capture;
+
+	void __iomem			*base;
+	int				dma_chan;
+	unsigned int			irq;
+	unsigned long			mclk;
+
+	spinlock_t			lock;
+};
+
+#ifdef	POLL_CAMERA
+#include <linux/kthread.h>
+static struct task_struct *tsk = NULL;
+static struct ls1c_camera_dev	*thread_data;
+static int camera_thread(void *pthread_data);
+#endif
+
+/*
+ *  Videobuf operations
+ */
+static int ls1c_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
+			      unsigned int *size)
+{
+	struct soc_camera_device *icd = vq->priv_data;
+	int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
+						icd->current_fmt->host_fmt);
+
+	if (bytes_per_line < 0)
+		return bytes_per_line;
+
+	*size = bytes_per_line * icd->user_height;
+
+	if (!*count)
+		*count = 32;
+
+	if (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
+		*count = (MAX_VIDEO_MEM * 1024 * 1024) / *size;
+
+	dev_dbg(icd->dev.parent, "count=%d, size=%d\n", *count, *size);
+
+	return 0;
+}
+
+static void free_buffer(struct videobuf_queue *vq, struct ls1c_camera_buffer *buf)
+{
+	flag = 1;
+	struct soc_camera_device *icd = vq->priv_data;
+	struct videobuf_buffer *vb = &buf->vb;
+	int temp;
+
+#if 0
+	if (tsk != NULL ) {
+		printk("--------task error-------\n");
+		kthread_stop(tsk);
+		tsk = NULL;
+	}
+#endif
+	BUG_ON(in_interrupt());
+
+	dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
+		vb, vb->baddr, vb->bsize);
+	
+	temp = __raw_readl(0xbc280038);
+	temp &= ~(1 << LS1C_CAM_START);
+	__raw_writel(temp, 0xbc280038);
+	temp = __raw_readl(0xbc280038);
+//	printk("-----stop 0x%x-----\n", temp);
+	while (temp & 0x40000000) { 
+		temp = __raw_readl(0xbc280038);
+		temp |= (1 << 29);
+	//	printk("----29 bits--------\n");
+		__raw_writel(temp, 0xbc280038);
+	}
+
+	printk("-----stop end-----\n");
+	/*
+	 * This waits until this buffer is out of danger, i.e., until it is no
+	 * longer in STATE_QUEUED or STATE_ACTIVE
+	 */
+	videobuf_waiton(vq, vb, 0, 0);   //dbg-yg-ques
+	videobuf_dma_contig_free(vq, vb);
+
+	printk("-------free-buf 0x%x-------\n", buf);
+	vb->state = VIDEOBUF_NEEDS_INIT;
+}
+
+static int ls1c_videobuf_prepare(struct videobuf_queue *vq,
+		struct videobuf_buffer *vb, enum v4l2_field field)
+{
+	struct soc_camera_device *icd = vq->priv_data;
+	struct ls1c_camera_buffer *buf = container_of(vb, struct ls1c_camera_buffer, vb);
+	int ret;
+	int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
+						icd->current_fmt->host_fmt);
+
+	if (bytes_per_line < 0)
+		return bytes_per_line;
+
+	dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
+		vb, vb->baddr, vb->bsize);
+
+	/* Added list head initialization on alloc */
+	WARN_ON(!list_empty(&vb->queue));
+
+	BUG_ON(NULL == icd->current_fmt);
+
+	/*
+	 * I think, in buf_prepare you only have to protect global data,
+	 * the actual buffer is yours
+	 */
+	buf->inwork = 1;
+
+	if (buf->code	!= icd->current_fmt->code ||
+	    vb->width	!= icd->user_width ||
+	    vb->height	!= icd->user_height ||
+	    vb->field	!= field) {
+		buf->code	= icd->current_fmt->code;
+		vb->width	= icd->user_width;
+		vb->height	= icd->user_height;
+		vb->field	= field;
+		vb->state	= VIDEOBUF_NEEDS_INIT;
+	}
+
+	vb->size = bytes_per_line * vb->height;
+	if (0 != vb->baddr && vb->bsize < vb->size) {
+		ret = -EINVAL;
+		goto out;
+	}
+
+	if (vb->state == VIDEOBUF_NEEDS_INIT) {
+		ret = videobuf_iolock(vq, vb, NULL);
+		if (ret)
+			goto fail;
+
+		vb->state = VIDEOBUF_PREPARED;
+	}
+
+	buf->inwork = 0;
+
+	return 0;
+
+fail:
+	free_buffer(vq, buf);
+out:
+	buf->inwork = 0;
+	return ret;
+}
+
+
+/* Called under spinlock_irqsave(&pcdev->lock, ...) */
+static int cnt = 0;
+static void ls1c_videobuf_queue(struct videobuf_queue *vq,
+						struct videobuf_buffer *vb)
+{
+	struct timex  txc;
+	struct rtc_time tm;
+	do_gettimeofday(&(txc.time));
+	rtc_time_to_tm(txc.time.tv_sec,&tm);
+//	printk("UTC time :%d-%d-%d %d:%d:%d \n",tm.tm_year+1900,tm.tm_mon, tm.tm_mday,tm.tm_hour,tm.tm_min,tm.tm_sec);
+	struct soc_camera_device *icd = vq->priv_data;
+	struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
+	struct ls1c_camera_dev *pcdev = ici->priv;
+	struct ls1c_camera_buffer *buf = container_of(vb, struct ls1c_camera_buffer, vb);
+	unsigned int temp;
+	unsigned int ret;
+	struct videobuf_buffer *vbuf;
+	unsigned long flags;
+	//æŠŠcamera ç¼“å†²åŒºåœ°å�€ è®¾ç½®ä¸º lcd framebuffer dma base
+	temp = __raw_readl(pcdev->base + CAM_DMA0_CONFIG);
+	__raw_writel(temp,  0xbc301260 ); //  lcd  dma base
+//
+
+	temp = __raw_readl(pcdev->base + CAM_CAMIF_CONFIG);
+	while (temp & 0x40000000) {            //if bit:30 == 1 ,dma is in idle 
+		temp = __raw_readl(pcdev->base + CAM_CAMIF_CONFIG);
+		temp |= (1 << 29);
+		__raw_writel(temp, pcdev->base + CAM_CAMIF_CONFIG);
+	}
+	dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
+			vb, vb->baddr, vb->bsize);
+
+	
+	list_add_tail(&vb->queue, &pcdev->capture);
+	vb->state = VIDEOBUF_ACTIVE;
+
+
+	cnt++;
+	if (buf_init_cnt < LS1C_CAM_DMA_CNT) {
+		if (!pcdev->active) {
+			pcdev->active = buf;
+//			vbuf = &pcdev->active->vb;
+		}
+		vbuf = &buf->vb;
+		temp = (unsigned int)videobuf_to_dma_contig(vbuf);
+		__raw_writel(temp, pcdev->base + (CAM_DMA0_CONFIG + buf_init_cnt * 8));
+		buf_init_cnt++;
+
+			temp = __raw_readl(pcdev->base + CAM_CAMIF_CONFIG);
+			temp |= (1 << LS1C_CAM_START); 
+		
+		__raw_writel(temp, pcdev->base + CAM_CAMIF_CONFIG);
+#ifdef	POLL_CAMERA
+			if (flag) {
+				flag = 0 ;
+				tsk = kthread_run(camera_thread, thread_data, "ls1c_camera_thread");
+			}
+#endif
+		if (buf_init_cnt == LS1C_CAM_DMA_CNT) {
+
+			buf_init_cnt = 0;
+		}
+
+	}
+}
+
+static void ls1c_videobuf_release(struct videobuf_queue *vq,
+				 struct videobuf_buffer *vb)
+{
+	struct ls1c_camera_buffer *buf = container_of(vb, struct ls1c_camera_buffer, vb);
+#define DEBUG
+	//printk("-------ls1c_videobuf_release buf 0x%x-----\n", buf);
+#ifdef DEBUG
+	struct soc_camera_device *icd = vq->priv_data;
+	struct device *dev = icd->dev.parent;
+
+	dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
+		vb, vb->baddr, vb->bsize);
+
+	switch (vb->state) {
+	case VIDEOBUF_ACTIVE:
+		dev_dbg(dev, "%s (active)\n", __func__);
+		break;
+	case VIDEOBUF_QUEUED:
+		dev_dbg(dev, "%s (queued)\n", __func__);
+		break;
+	case VIDEOBUF_PREPARED:
+		dev_dbg(dev, "%s (prepared)\n", __func__);
+		break;
+	default:
+		dev_dbg(dev, "%s (unknown)\n", __func__);
+		break;
+	}
+#endif
+
+	free_buffer(vq, buf);
+}
+
+#ifdef	POLL_CAMERA
+static long passtime=0;
+static long stime=0;
+static long etime=0;
+static int times=0;
+static int chg = 0;
+static long sums = 0;
+static int sped = 0;
+static int camera_thread(void *pthread_data)
+{
+	struct ls1c_camera_dev *pcdev = (struct ls1c_camera_dev *)pthread_data;
+	struct device *dev = pcdev->icd->dev.parent;
+	struct ls1c_camera_buffer *buf;
+	struct videobuf_buffer *vb;
+	unsigned int temp;
+	struct videobuf_buffer *vbuf;
+	unsigned long flags;
+
+	while (1) {
+		temp = __raw_readl(pcdev->base + CAM_CAMIF_CONFIG);
+		if ((temp & 0xf00000) == 0)
+			goto schedu;
+
+		while (temp & 0x40000000) { 
+		temp = __raw_readl(pcdev->base + CAM_CAMIF_CONFIG);
+		temp |= (1 << 29);
+		__raw_writel(temp, pcdev->base + CAM_CAMIF_CONFIG);
+		}
+
+		if (list_empty(&pcdev->capture)) {
+			pcdev->active = NULL;
+			goto schedu;
+		}
+		
+		if (unlikely(!pcdev->active)) {
+			printk(" unlikely...............................................\r\n");
+			pcdev->active = list_entry(pcdev->capture.next,
+					struct ls1c_camera_buffer, vb.queue);
+		}
+
+		vb = &pcdev->active->vb;
+		buf = container_of(vb, struct ls1c_camera_buffer, vb); // <==> buf = pcdev->active 
+		
+		WARN_ON(buf->inwork || list_empty(&vb->queue));
+		dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
+				vb, vb->baddr, vb->bsize);
+
+		/* _init is used to debug races, see comment in ls1c_camera_reqbufs() */
+		list_del_init(&vb->queue);
+		vb->state = VIDEOBUF_DONE;
+//		do_gettimeofday(&vb->ts);
+		vb->field_count++;
+		wake_up(&vb->done);
+
+		if (list_empty(&pcdev->capture)) {
+			pcdev->active = NULL;
+			goto schedu;
+		}
+
+		pcdev->active = list_entry(pcdev->capture.next,
+				struct ls1c_camera_buffer, vb.queue);
+			
+		vbuf = &pcdev->active->vb;
+		
+		//spin_unlock_irqrestore(&pcdev->lock, flags); 
+
+schedu:
+		schedule();
+
+		if (kthread_should_stop())
+			break;
+	}
+out:
+	return 0;
+}
+#else
+static irqreturn_t ls1c_camera_irq(int irq, void *data)
+//static void ls1c_camera_irq(int irq, void *data)
+{
+	dump_stack();
+	disable_irq_nosync(36);
+	struct ls1c_camera_dev *pcdev = data;
+	struct device *dev = pcdev->icd->dev.parent;
+	struct ls1c_camera_buffer *buf;
+	struct videobuf_buffer *vb;
+	unsigned long flags;
+	int temp;
+
+		temp = __raw_readl(pcdev->base + CAM_CAMIF_CONFIG);
+	//spin_lock_irqsave(&pcdev->lock, flags);
+	if (unlikely(!pcdev->active)) {
+	//	dev_err(dev, "DMA End IRQ with no active buffer\n");
+		goto out;
+	}
+
+	vb = &pcdev->active->vb;
+	buf = container_of(vb, struct ls1c_camera_buffer, vb);
+	WARN_ON(buf->inwork || list_empty(&vb->queue));
+	dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
+			vb, vb->baddr, vb->bsize);
+
+	/* _init is used to debug races, see comment in ls1c_camera_reqbufs() */
+	list_del_init(&vb->queue);
+	vb->state = VIDEOBUF_DONE;
+	do_gettimeofday(&vb->ts);
+	vb->field_count++;
+	wake_up(&vb->done);
+
+	if (list_empty(&pcdev->capture)) {
+		pcdev->active = NULL;
+		printk("----------finish -------\n");
+		enable_irq(36);
+		return IRQ_HANDLED;
+		//return;
+	}
+	pcdev->active = list_entry(pcdev->capture.next,
+				   struct ls1c_camera_buffer, vb.queue);
+	printk("----------finish process irq--------\n");
+	//enable_irq(36);
+	temp = __raw_readl(pcdev->base + CAM_CAMIF_CONFIG);
+	printk(" cam_config :0x%08x ...\r\n", temp);
+	temp |= (1 << 29);
+	__raw_writel(temp, pcdev->base + CAM_CAMIF_CONFIG);
+	enable_irq(36);
+out:
+	//spin_unlock_irqrestore(&pcdev->lock, flags); 
+	//printk("--------out-------\n");
+	enable_irq(36);
+	return IRQ_HANDLED;
+}
+#endif
+
+
+static struct videobuf_queue_ops ls1c_videobuf_ops = {
+	.buf_setup	= ls1c_videobuf_setup,
+	.buf_prepare	= ls1c_videobuf_prepare,
+	.buf_queue	= ls1c_videobuf_queue,
+	.buf_release	= ls1c_videobuf_release,
+};
+
+static void ls1c_camera_init_videobuf(struct videobuf_queue *q,
+				     struct soc_camera_device *icd)
+{
+//	do_gettimeofday(&t_start);
+//	printk("t_start %ld\n", t_start.tv_sec);
+	struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
+	struct ls1c_camera_dev *pcdev = ici->priv;
+
+	videobuf_queue_dma_contig_init(q, &ls1c_videobuf_ops, icd->dev.parent,
+				&pcdev->lock, V4L2_BUF_TYPE_VIDEO_CAPTURE,
+				V4L2_FIELD_NONE,
+				sizeof(struct ls1c_camera_buffer), icd, &icd->video_lock);
+}
+
+#if 0
+static int mclk_get_divisor(struct ls1c_camera_dev *pcdev)
+{
+	return 1;
+#if 0
+	unsigned int mclk = pcdev->mclk;
+	unsigned long div;
+	unsigned long lcdclk;
+
+	lcdclk = clk_get_rate(pcdev->clk);
+
+	/*
+	 * We verify platform_mclk_10khz != 0, so if anyone breaks it, here
+	 * they get a nice Oops
+	 */
+	div = (lcdclk + 2 * mclk - 1) / (2 * mclk) - 1;
+
+	dev_dbg(pcdev->icd->dev.parent,
+		"System clock %lukHz, target freq %dkHz, divisor %lu\n",
+		lcdclk / 1000, mclk / 1000, div);
+	return div;
+#endif
+}
+#endif
+
+static void ls1c_camera_activate(struct ls1c_camera_dev *pcdev)
+{
+	dev_dbg(pcdev->icd->dev.parent, "Activate device\n");
+
+//	clk_enable(pcdev->clk);
+
+	/* enable camera interface before doing anything else */
+}
+
+static void ls1c_camera_deactivate(struct ls1c_camera_dev *pcdev)
+{
+	dev_dbg(pcdev->icd->dev.parent, "Deactivate device\n");
+
+	/* Disable all Camera interface */
+
+//	clk_disable(pcdev->clk);
+}
+
+/*
+ * The following two functions absolutely depend on the fact, that
+ * there can be only one camera on LS1C camera sensor interface
+ */
+static int ls1c_camera_add_device(struct soc_camera_device *icd)
+{
+	struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
+	struct ls1c_camera_dev *pcdev = ici->priv;
+
+	if (pcdev->icd)
+		return -EBUSY;
+
+	dev_info(icd->dev.parent, "LS1C Camera driver attached to camera %d\n",
+		 icd->devnum);
+
+	ls1c_camera_activate(pcdev);
+
+	pcdev->icd = icd;
+
+	return 0;
+}
+
+static void ls1c_camera_remove_device(struct soc_camera_device *icd)
+{
+#if 0
+	do_gettimeofday(&t_end);
+	cost_time = t_end.tv_sec - t_start.tv_sec;
+
+	printk("Cost time: %ld us", cost_time);
+	printk("t_end %ld\n", t_end.tv_sec);
+#endif
+	struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
+	struct ls1c_camera_dev *pcdev = ici->priv;
+	unsigned int temp;
+	unsigned long flags;
+
+	BUG_ON(icd != pcdev->icd);
+
+	buf_init_cnt = 0;
+	//*(unsigned int *)(0xbc280038) &= ~(1 << 30);
+	temp = __raw_readl(pcdev->base + CAM_CAMIF_CONFIG);
+	temp &= ~(1 << LS1C_CAM_START);
+	temp &= ~(1 << 30);
+	//temp |= (1 << 29);
+	__raw_writel(temp, pcdev->base + CAM_CAMIF_CONFIG);
+
+	local_irq_save(flags);
+	disable_irq(LS1X_CAM_IRQ);
+	local_irq_restore(flags);
+#ifdef	POLL_CAMERA
+	if (tsk != NULL) {
+		printk("------stop one thread---------\n");
+		kthread_stop(tsk);
+		tsk = NULL;
+	}
+#endif
+	dev_info(icd->dev.parent, "LS1C Camera driver detached from camera %d\n",
+		 icd->devnum);
+
+	ls1c_camera_deactivate(pcdev);
+	pcdev->icd = NULL;
+}
+
+static int ls1c_camera_set_crop(struct soc_camera_device *icd,
+			       struct v4l2_crop *a)
+{
+	
+	struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
+
+	return v4l2_subdev_call(sd, video, s_crop, a);
+}
+
+static int ls1c_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
+{
+	struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
+	struct ls1c_camera_dev *pcdev = ici->priv;
+	unsigned long camera_flags, common_flags;
+	unsigned int csicr1;
+	int ret;
+
+	camera_flags = icd->ops->query_bus_param(icd);
+
+	/* LS1C supports only 8bit buswidth */
+	common_flags = soc_camera_bus_param_compatible(camera_flags,
+						       CSI_BUS_FLAGS);
+	if (!common_flags)
+		return -EINVAL;
+
+	/* Make choises, based on platform choice */
+	if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
+		(common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
+			if (!pcdev->pdata ||
+			     pcdev->pdata->flags & LS1C_CAMERA_VSYNC_HIGH)
+				common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW;
+			else
+				common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH;
+	}
+
+	if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) &&
+		(common_flags & SOCAM_PCLK_SAMPLE_FALLING)) {
+			if (!pcdev->pdata ||
+			     pcdev->pdata->flags & LS1C_CAMERA_PCLK_RISING)
+				common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING;
+			else
+				common_flags &= ~SOCAM_PCLK_SAMPLE_RISING;
+	}
+
+	if ((common_flags & SOCAM_DATA_ACTIVE_HIGH) &&
+		(common_flags & SOCAM_DATA_ACTIVE_LOW)) {
+			if (!pcdev->pdata ||
+			     pcdev->pdata->flags & LS1C_CAMERA_DATA_HIGH)
+				common_flags &= ~SOCAM_DATA_ACTIVE_LOW;
+			else
+				common_flags &= ~SOCAM_DATA_ACTIVE_HIGH;
+	}
+
+	ret = icd->ops->set_bus_param(icd, common_flags);
+	if (ret < 0)
+		return ret;
+
+	csicr1 = __raw_readl(pcdev->base + CAM_CAMIF_CONFIG);
+
+	if (common_flags & SOCAM_VSYNC_ACTIVE_LOW)
+		csicr1 |= CONFIG_PARA_VS;
+	if (common_flags & SOCAM_HSYNC_ACTIVE_LOW)
+		csicr1 |= CONFIG_PARA_HS;
+
+
+	if (icd->user_width == 640)
+		csicr1 |=  (1 << CONFIG_PARA_640X480) ;
+
+	csicr1 |= (1 << CONFIG_PARA_INPUT_DATA_MODE)  ;//yuyv intput (bt.601)
+	csicr1 |= (1 << CONFIG_PARA_OUTPUT_DATA_MODE)  ;//rgb  output
+	__raw_writel(csicr1, pcdev->base + CAM_CAMIF_CONFIG);
+
+
+//	__raw_writel((LCD_WIDTH - icd->user_width)*2, pcdev->base + CAM_UOFF_CONFIG); //offset
+	__raw_writel(320, pcdev->base + CAM_UOFF_CONFIG); //offset
+
+//	*(volatile unsigned int *)(0xbfd00414) |= 0x200000; //??????????????????????
+	return 0;
+}
+
+static int ls1c_camera_set_fmt(struct soc_camera_device *icd,
+			      struct v4l2_format *f)
+{
+	struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
+	const struct soc_camera_format_xlate *xlate;
+	struct v4l2_pix_format *pix = &f->fmt.pix;
+	struct v4l2_mbus_framefmt mf;
+	int ret, buswidth;
+
+	xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
+	if (!xlate) {
+		dev_warn(icd->dev.parent, "Format %x not found\n",
+			 pix->pixelformat);
+		return -EINVAL;
+	}
+
+	buswidth = xlate->host_fmt->bits_per_sample;
+	if (buswidth > 8) {
+		dev_warn(icd->dev.parent,
+			 "bits-per-sample %d for format %x unsupported\n",
+			 buswidth, pix->pixelformat);
+		return -EINVAL;
+	}
+
+	mf.width	= pix->width;
+	mf.height	= pix->height;
+	mf.field	= pix->field;
+	mf.colorspace	= pix->colorspace;
+	mf.code		= xlate->code;
+
+	ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
+	if (ret < 0)
+		return ret;
+
+	if (mf.code != xlate->code)
+		return -EINVAL;
+
+	pix->width		= mf.width;
+	pix->height		= mf.height;
+	pix->field		= mf.field;
+	pix->colorspace		= mf.colorspace;
+	icd->current_fmt	= xlate;
+
+	int flags;
+
+	return ret;
+}
+
+static int ls1c_camera_try_fmt(struct soc_camera_device *icd,
+			      struct v4l2_format *f)
+{
+	struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
+	const struct soc_camera_format_xlate *xlate;
+	struct v4l2_pix_format *pix = &f->fmt.pix;
+	struct v4l2_mbus_framefmt mf;
+	int ret;
+	/* TODO: limit to ls1c hardware capabilities */
+
+	xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
+	if (!xlate) {
+		dev_warn(icd->dev.parent, "Format %x not found\n",
+			 pix->pixelformat);
+		return -EINVAL;
+	}
+
+	mf.width	= pix->width;
+	mf.height	= pix->height;
+	mf.field	= pix->field;
+	mf.colorspace	= pix->colorspace;
+	mf.code		= xlate->code;
+
+	/* limit to sensor capabilities */
+	ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf);
+	if (ret < 0)
+		return ret;
+
+	pix->width	= mf.width;
+	pix->height	= mf.height;
+	pix->field	= mf.field;
+	pix->colorspace	= mf.colorspace;
+
+	return 0;
+}
+
+static int ls1c_camera_reqbufs(struct soc_camera_device *icd,
+			      struct v4l2_requestbuffers *p)
+{
+	int i;
+
+	/*
+	 * This is for locking debugging only. I removed spinlocks and now I
+	 * check whether .prepare is ever called on a linked buffer, or whether
+	 * a dma IRQ can occur for an in-work or unlinked buffer. Until now
+	 * it hadn't triggered
+	 */
+	for (i = 0; i < p->count; i++) {
+		struct ls1c_camera_buffer *buf = container_of(icd->vb_vidq.bufs[i],
+						      struct ls1c_camera_buffer, vb);
+		buf->inwork = 0;
+		INIT_LIST_HEAD(&buf->vb.queue);
+	}
+
+	return 0;
+}
+
+static unsigned int ls1c_camera_poll(struct file *file, poll_table *pt)
+{
+	struct soc_camera_device *icd = file->private_data;
+	struct ls1c_camera_buffer *buf;
+
+	buf = list_entry(icd->vb_vidq.stream.next, struct ls1c_camera_buffer,
+			 vb.stream);
+
+	poll_wait(file, &buf->vb.done, pt);
+
+	if (buf->vb.state == VIDEOBUF_DONE ||
+	    buf->vb.state == VIDEOBUF_ERROR)
+		return POLLIN | POLLRDNORM;
+
+	return 0;
+}
+
+static int ls1c_camera_querycap(struct soc_camera_host *ici,
+			       struct v4l2_capability *cap)
+{
+	/* cap->name is set by the friendly caller:-> */
+	strlcpy(cap->card, "LS1C Camera", sizeof(cap->card));
+	cap->version = VERSION_CODE;
+	cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
+
+	return 0;
+}
+
+static struct soc_camera_host_ops ls1c_soc_camera_host_ops = {
+	.owner		= THIS_MODULE,
+	.add		= ls1c_camera_add_device,
+	.remove		= ls1c_camera_remove_device,
+	.set_bus_param	= ls1c_camera_set_bus_param,
+	.set_crop	= ls1c_camera_set_crop,
+	.set_fmt	= ls1c_camera_set_fmt,
+	.try_fmt	= ls1c_camera_try_fmt,
+	.init_videobuf	= ls1c_camera_init_videobuf,
+	.reqbufs	= ls1c_camera_reqbufs,
+	.poll		= ls1c_camera_poll,
+	.querycap	= ls1c_camera_querycap,
+};
+
+static void four_secs_timer(unsigned long arg) 
+{
+	*(unsigned int*)(0xbfd0105c) |= (1<<4); 
+	//*(unsigned int*)(0xbfd0106c) |= (1<<4);
+	//*(unsigned int*)(0xbfd01068) &= ~(1<<4);
+	printk("---------irq sr 0x%x-------\n", *(unsigned int *)(0xbfd01058));
+	printk("---------irq en 0x%x-------\n", *(unsigned int *)(0xbfd0105c));
+	printk("---------irq set 0x%x-------\n", *(unsigned int *)(0xbfd01060));
+	printk("---------irq clr 0x%x-------\n", *(unsigned int *)(0xbfd01064));
+	printk("---------irq pol 0x%x-------\n", *(unsigned int *)(0xbfd01068));
+	printk("---------irq edge 0x%x-------\n", *(unsigned int *)(0xbfd0106c));
+	my_timer.expires = jiffies + HZ * 5; 
+	add_timer(&my_timer);
+}
+
+static int __init ls1c_camera_probe(struct platform_device *pdev)
+{
+#if 0
+	init_timer(&my_timer); 
+	my_timer.function = &four_secs_timer;
+	my_timer.expires = jiffies + HZ * 10; 
+	add_timer(&my_timer);
+#endif
+
+	struct ls1c_camera_dev *pcdev;
+	struct resource *res;
+	struct clk *clk;
+	void __iomem *base;
+	unsigned int irq;
+	int err = 0;
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	irq = platform_get_irq(pdev, 0);
+	if (!res || (int)irq <= 0) {
+		err = -ENODEV;
+		goto exit;
+	}
+
+#if 0
+	clk = clk_get(&pdev->dev, "camera_clk");
+	if (IS_ERR(clk)) {
+		err = PTR_ERR(clk);
+		goto exit;
+	}
+#endif
+
+	pcdev = kzalloc(sizeof(*pcdev), GFP_KERNEL);
+	if (!pcdev) {
+		dev_err(&pdev->dev, "Could not allocate pcdev\n");
+		err = -ENOMEM;
+		goto exit_put_clk;
+	}
+
+	pcdev->res = res;
+//	pcdev->clk = clk;
+
+	pcdev->pdata = pdev->dev.platform_data;
+
+	if (pcdev->pdata)
+		pcdev->mclk = pcdev->pdata->mclk_24MHz;
+
+	if (!pcdev->mclk) {
+		dev_warn(&pdev->dev,
+			 "mclk_24MHz == 0! Please, fix your platform data. "
+			 "Using default 24MHz\n");
+		pcdev->mclk = 24000000;
+	}
+
+	INIT_LIST_HEAD(&pcdev->capture);
+	spin_lock_init(&pcdev->lock);
+
+	/*
+	 * Request the regions.
+	 */
+	if (!request_mem_region(res->start, resource_size(res), DRIVER_NAME)) {
+		err = -EBUSY;
+		goto exit_kfree;
+	}
+
+	base = ioremap(res->start, resource_size(res));
+	if (!base) {
+		err = -ENOMEM;
+		goto exit_release;
+	}
+	pcdev->irq = irq;
+	pcdev->base = base;
+#ifdef	POLL_CAMERA
+	thread_data = pcdev;
+#else
+	/* request irq */
+//	err = request_irq(irq, ls1c_camera_irq, /*IRQF_DISABLED*/ IRQF_SHARED | 0x1, /*pdev->name*/DRIVER_NAME, pcdev);
+	if (err < 0) {
+		dev_err(&pdev->dev, "failed to request IRQ\n");
+		goto exit_iounmap;
+	}
+#endif
+
+	pcdev->soc_host.drv_name	= DRIVER_NAME;
+	pcdev->soc_host.ops		= &ls1c_soc_camera_host_ops;
+	pcdev->soc_host.priv		= pcdev;
+	pcdev->soc_host.v4l2_dev.dev	= &pdev->dev;
+	pcdev->soc_host.nr		= pdev->id;
+	err = soc_camera_host_register(&pcdev->soc_host);
+	if (err)
+		goto exit_free_irq;
+
+	dev_info(&pdev->dev, "LS1C Camera driver loaded !\n");
+
+	return 0;
+
+exit_free_irq:
+	free_irq(LS1X_CAM_IRQ, pcdev);
+exit_iounmap:
+	iounmap(base);
+exit_release:
+	release_mem_region(res->start, resource_size(res));
+exit_kfree:
+	kfree(pcdev);
+exit_put_clk:
+	clk_put(clk);
+exit:
+	return err;
+}
+
+static int __exit ls1c_camera_remove(struct platform_device *pdev)
+{
+	flag = 1;
+	struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
+	struct ls1c_camera_dev *pcdev = container_of(soc_host,
+					struct ls1c_camera_dev, soc_host);
+	struct resource *res;
+
+	clk_put(pcdev->clk);
+
+	soc_camera_host_unregister(soc_host);
+
+	iounmap(pcdev->base);
+
+	res = pcdev->res;
+	release_mem_region(res->start, resource_size(res));
+
+	kfree(pcdev);
+
+	dev_info(&pdev->dev, "LS1C Camera driver unloaded\n");
+
+	return 0;
+}
+
+static struct platform_driver ls1c_camera_driver = {
+	.driver 	= {
+		.name	= DRIVER_NAME,
+	},
+	.remove		= __exit_p(ls1c_camera_remove),
+};
+
+static int __init ls1c_camera_init(void)
+{
+	flag = 1;
+	return platform_driver_probe(&ls1c_camera_driver, ls1c_camera_probe);
+}
+
+static void __exit ls1c_camera_exit(void)
+{
+	flag = 0;
+	return platform_driver_unregister(&ls1c_camera_driver);
+}
+
+module_init(ls1c_camera_init);
+module_exit(ls1c_camera_exit);
+
+MODULE_DESCRIPTION("LS1C_SoC Camera Host driver");
+MODULE_AUTHOR("linxiyuan <linxiyuan-gz@foxmail.com>");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:" DRIVER_NAME);
diff -uNra linux-3.0.82/drivers/media/video/ls1c_gc0308.c linux-3.0.82x/drivers/media/video/ls1c_gc0308.c
--- linux-3.0.82/drivers/media/video/ls1c_gc0308.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/ls1c_gc0308.c	2017-09-23 03:42:49.538676531 +0800
@@ -0,0 +1,1144 @@
+/*
+ * Driver for OV7675  from OV
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/i2c.h>
+#include <linux/delay.h>
+#include <linux/version.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-subdev.h>
+#include <media/soc_camera.h>
+#include <media/soc_mediabus.h>
+//#include <media/v4l2-i2c-drv.h>
+
+#define CONFIG_CAMERA_CONTROLLED_BY_ARM
+
+
+#include <media/gc0308_platform.h>
+
+#ifdef CONFIG_VIDEO_SAMSUNG_V4L2
+#include <linux/videodev2_samsung.h>
+#endif
+
+#include "gc0308.h"
+
+
+
+#define GC0308_DRIVER_NAME	"GC0308"
+
+//*********** proc *********************
+#include <linux/proc_fs.h>
+#include "../../../fs/proc/internal.h"
+#define GC0308_PROC_NAME	"gc0308"
+static struct proc_dir_entry * s_proc = NULL;
+static struct i2c_client * s_i2c_client = NULL;
+//**************************************
+
+void GC0308_night_mode(struct v4l2_subdev *sd, bool enable);
+static int gc0308_init(struct v4l2_subdev *sd, u32 val);
+
+
+/* Default resolution & pixelformat. plz ref gc0308_platform.h */
+#define DEFAULT_RES		VGA	/* Index of resoultion */
+#define DEFAULT_FMT		V4L2_PIX_FMT_UYVY	/* YUV422 */
+
+static unsigned char regABVal = 0x06;
+static unsigned char hueTable[21][3] = {{0x0, 0x80, 0},
+				{0x14, 0x7E, 0},
+				{0x27, 0x79, 0},
+				{0x3A, 0x72, 0},
+				{0x4B, 0x67, 0},
+				{0x5A, 0x5A, 0},
+				{0x67, 0x4B, 0},
+				{0x72, 0x3A, 0},
+				{0x79, 0x27, 0},
+				{0x7E, 0x14, 0},
+				{0x80, 0x00, 1},
+				{0x7E, 0x14, 1},
+				{0x79, 0x27, 1},
+				{0x72, 0x3A, 1},
+				{0x67, 0x4B, 1},
+				{0x5A, 0x5A, 1},
+				{0x4B, 0x67, 1},
+				{0x3A, 0x72, 1},
+				{0x27, 0x79, 1},
+				{0x14, 0x7E, 1},
+				{0x00, 0x80, 1}};
+
+/*
+ * Specification
+ * Parallel : ITU-R. 656/601 YUV422, RGB565, RGB888 (Up to VGA), RAW10
+ * Serial : MIPI CSI2 (single lane) YUV422, RGB565, RGB888 (Up to VGA), RAW10
+ * Resolution : 1280 (H) x 1024 (V)
+ * Image control : Brightness, Contrast, Saturation, Sharpness, Glamour
+ * Effect : Mono, Negative, Sepia, Aqua, Sketch
+ * FPS : 15fps @full resolution, 30fps @VGA, 24fps @720p
+ * Max. pixel clock frequency : 48MHz(upto)
+ * Internal PLL (6MHz to 27MHz input frequency)
+ */
+
+/* Camera functional setting values configured by user concept */
+struct gc0308_userset {
+	signed int exposure_bias;	/* V4L2_CID_EXPOSURE */
+	unsigned int ae_lock;
+	unsigned int awb_lock;
+	unsigned int auto_wb;	/* V4L2_CID_AUTO_WHITE_BALANCE */
+	unsigned int manual_wb;	/* V4L2_CID_WHITE_BALANCE_PRESET */
+	unsigned int wb_temp;	/* V4L2_CID_WHITE_BALANCE_TEMPERATURE */
+	unsigned int effect;	/* Color FX (AKA Color tone) */
+	unsigned int contrast;	/* V4L2_CID_CONTRAST */
+	unsigned int saturation;	/* V4L2_CID_SATURATION */
+	unsigned int sharpness;		/* V4L2_CID_SHARPNESS */
+	unsigned int glamour;
+};
+
+struct gc0308_state {
+	struct gc0308_platform_data *pdata;
+	struct v4l2_subdev sd;
+	struct v4l2_pix_format pix;
+	struct v4l2_fract timeperframe;
+	struct gc0308_userset userset;
+	int freq;	/* MCLK in KHz */
+	int is_mipi;
+	int isize;
+	int ver;
+	int fps;
+};
+
+static inline struct gc0308_state *to_state(struct v4l2_subdev *sd)
+{
+	return container_of(sd, struct gc0308_state, sd);
+}
+
+static int gc0308_i2c_write(struct v4l2_subdev *sd, unsigned char i2c_data[],
+				unsigned char length);
+
+#if 1
+/*
+ * OV7675 register structure : 2bytes address, 2bytes value
+ * retry on write failure up-to 5 times
+ */
+static inline int gc0308_write(struct v4l2_subdev *sd, u8 addr, u8 val)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct i2c_msg msg[1];
+	unsigned char reg[2];
+	int err = 0;
+	int retry = 0;
+
+
+	if (!client->adapter)
+		return -ENODEV;
+
+again:
+	msg->addr = client->addr;
+	msg->flags = 0;
+	msg->len = 2;
+	msg->buf = reg;
+
+	reg[0] = addr & 0xff;
+	reg[1] = val & 0xff;
+
+	err = i2c_transfer(client->adapter, msg, 1);
+	if (err >= 0)
+		return err;	/* Returns here on success */
+
+	/* abnormal case: retry 5 times */
+	if (retry < 5) {
+		dev_err(&client->dev, "%s: address: 0x%02x%02x, " \
+			"value: 0x%02x%02x\n", __func__, \
+			reg[0], reg[1], reg[2], reg[3]);
+		retry++;
+		goto again;
+	}
+
+	return err;
+}
+
+static int gc0308_i2c_read(struct v4l2_subdev *sd, unsigned char reg)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int rc;
+
+	unsigned char data[1]={0};
+	data[0] = reg;
+	i2c_master_recv(client, data ,1);
+	return data[0];
+}
+
+static int gc0308_write_regs(struct v4l2_subdev *sd, unsigned char regs[],
+				int size)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int i, err;
+
+	for (i = 0; i < size; i++) {
+		err = gc0308_i2c_write(sd, &regs[i], sizeof(regs[i]));
+		if (err < 0)
+			v4l_info(client, "%s: register set failed\n", \
+			__func__);
+	}
+
+	return 0;	/* FIXME */
+}
+#endif
+
+extern s32 i2c_smbus_write_byte_data(const struct i2c_client *client, u8 command, u8 value);
+
+
+static int gc0308_i2c_write(struct v4l2_subdev *sd, unsigned char i2c_data[],
+				unsigned char length)
+{
+#if 0 //FIXME: urbetter skip I2C
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct i2c_msg msg = {client->addr, 0, length, i2c_data};
+//	struct i2c_msg msg = {client->addr, I2C_M_IGNORE_NAK, length, buf};
+
+	return i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;  
+#else
+
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	return i2c_smbus_write_byte_data(client, i2c_data[0], i2c_data[1]);
+#endif
+}
+
+static enum v4l2_mbus_pixelcode gc0308_codes[] = {
+	V4L2_MBUS_FMT_YUYV8_2X8,
+	V4L2_MBUS_FMT_YVYU8_2X8,
+	V4L2_MBUS_FMT_UYVY8_2X8,
+	V4L2_MBUS_FMT_RGB565_2X8_LE,
+};
+
+
+static struct v4l2_queryctrl gc0308_controls[] = {
+	{
+		/*
+		 * For now, we just support in preset type
+		 * to be close to generic WB system,
+		 * we define color temp range for each preset
+		 */
+		.id = V4L2_CID_WHITE_BALANCE_TEMPERATURE,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "White balance in kelvin",
+		.minimum = 0,
+		.maximum = 10000,
+		.step = 1,
+		.default_value = 0,	/* FIXME */
+	},
+	{
+		.id = V4L2_CID_AUTO_WHITE_BALANCE,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "Auto white balance",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_BRIGHTNESS,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Brightness",
+		.minimum = -80,
+		.maximum = 80,
+		.step = 1,
+		.default_value = 0x08,
+	},
+	{
+		.id = V4L2_CID_CONTRAST,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Contrast",
+		.minimum = 0x10,
+		.maximum = 0x30,
+		.step = 1,
+		.default_value = 0x20,
+	},
+	{
+		.id = V4L2_CID_SATURATION,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Saturation",
+		.minimum = 0x00,
+		.maximum = 0x80,
+		.step = 1,
+		.default_value = 0x40,
+	},
+	{
+		.id = V4L2_CID_SHARPNESS,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Sharpness",
+		.minimum = 0x00,
+		.maximum = 0x09,
+		.step = 1,
+		.default_value = 0x04,
+	},
+	{
+		.id = V4L2_CID_HUE,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Hue",
+		.minimum = 0,
+		.maximum = 21,
+		.step = 1,
+		.default_value = 10,
+	},
+	{
+		.id = V4L2_CID_POWER_LINE_FREQUENCY,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Power line frequency",
+		.minimum = 0,
+		.maximum = 2,
+		.step = 1,
+		.default_value = 0,
+	},
+};
+
+static inline struct v4l2_queryctrl const *gc0308_find_qctrl(int id)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(gc0308_controls); i++)
+		if (gc0308_controls[i].id == id)
+			return &gc0308_controls[i];
+
+	return NULL;
+}
+
+static int gc0308_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(gc0308_controls); i++) {
+		if (gc0308_controls[i].id == qc->id) {
+			memcpy(qc, &gc0308_controls[i], \
+				sizeof(struct v4l2_queryctrl));
+			return 0;
+		}
+	}
+
+	return -EINVAL;
+}
+
+
+/*
+ * Clock configuration
+ * Configure expected MCLK from host and return EINVAL if not supported clock
+ * frequency is expected
+ * 	freq : in Hz
+ * 	flag : not supported for now
+ */
+static int gc0308_s_crystal_freq(struct v4l2_subdev *sd, u32 freq, u32 flags)
+{
+	int err = -EINVAL;
+
+	return err;
+}
+
+static int gc0308_g_fmt(struct v4l2_subdev *sd,
+			struct v4l2_mbus_framefmt *mf)
+{
+	int err = 0;
+
+	return err;
+}
+
+static int gc0308_s_fmt(struct v4l2_subdev *sd,
+			struct v4l2_mbus_framefmt *mf)
+{
+	int err = 0;
+
+//	gc0308_init(sd, 0);
+	return err;
+}
+static int gc0308_enum_framesizes(struct v4l2_subdev *sd, \
+					struct v4l2_frmsizeenum *fsize)
+{
+	int err = 0;
+
+	return err;
+}
+
+static int gc0308_enum_frameintervals(struct v4l2_subdev *sd,
+					struct v4l2_frmivalenum *fival)
+{
+	int err = 0;
+
+	return err;
+}
+
+static int gc0308_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
+			   enum v4l2_mbus_pixelcode *code)
+{
+	if (index >= ARRAY_SIZE(gc0308_codes))
+		return -EINVAL;
+
+	*code = gc0308_codes[index];
+	return 0;
+}
+
+static int gc0308_try_fmt(struct v4l2_subdev *sd,
+			  struct v4l2_mbus_framefmt *mf)
+{
+	int err = 0;
+
+	return err;
+}
+
+static int gc0308_g_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *param)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int err = 0;
+
+	dev_dbg(&client->dev, "%s\n", __func__);
+
+	return err;
+}
+
+static int gc0308_s_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *param)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int err = 0;
+
+	dev_dbg(&client->dev, "%s: numerator %d, denominator: %d\n", \
+		__func__, param->parm.capture.timeperframe.numerator, \
+		param->parm.capture.timeperframe.denominator);
+
+	return err;
+}
+
+static int gc0308_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
+{
+	int err = 0;
+	return err;
+}
+
+void gc0308_color_effect(struct v4l2_subdev *sd, int which)
+{
+	int err, i;
+	int num;
+	
+	printk("gc0308 color mode!!!\n");
+	// normal,grayscale,sepia,sepia_green,sepia_blue,color_inv,gray_inv,embossment,sketch
+
+	switch (which) {
+	case 1:		
+		num = ((sizeof(gc0308_effect_normal)/sizeof(gc0308_effect_normal[0])));			
+		for (i = 0; i < num ; i++) {
+			err =gc0308_i2c_write(sd, gc0308_effect_normal[i], 2);
+		}
+	break;
+	case 2:		
+		num = ((sizeof(gc0308_effect_grayscale)/sizeof(gc0308_effect_grayscale[0])));			
+		for (i = 0; i < num ; i++) {
+			err =gc0308_i2c_write(sd, gc0308_effect_grayscale[i], 2);
+		}
+	break;
+	case 3:		
+		num = ((sizeof(gc0308_effect_sepia)/sizeof(gc0308_effect_sepia[0])));			
+		for (i = 0; i < num ; i++) {
+			err =gc0308_i2c_write(sd, gc0308_effect_sepia[i], 2);
+		}
+	break;
+	case 4:		
+		num = ((sizeof(gc0308_effect_sepia_green)/sizeof(gc0308_effect_sepia_green[0])));			
+		for (i = 0; i < num ; i++) {
+			err =gc0308_i2c_write(sd, gc0308_effect_sepia_green[i], 2);
+		}
+	break;
+	case 5:	
+		num = ((sizeof(gc0308_effect_sepia_blue)/sizeof(gc0308_effect_sepia_blue[0])));			
+		for (i = 0; i < num ; i++) {
+			err =gc0308_i2c_write(sd, gc0308_effect_sepia_blue[i], 2);
+		}
+	break;
+	case 6:	
+		num = ((sizeof(gc0308_effect_color_inv)/sizeof(gc0308_effect_color_inv[0])));			
+		for (i = 0; i < num ; i++) {
+			err =gc0308_i2c_write(sd, gc0308_effect_color_inv[i], 2);
+		}
+	break;
+	case 7:		
+		num = ((sizeof(gc0308_effect_gray_inv)/sizeof(gc0308_effect_gray_inv[0])));			
+		for (i = 0; i < num ; i++) {
+			err =gc0308_i2c_write(sd, gc0308_effect_gray_inv[i], 2);
+		}
+	break;
+	case 8:		
+		num = ((sizeof(gc0308_effect_embossment)/sizeof(gc0308_effect_embossment[0])));			
+		for (i = 0; i < num ; i++) {
+			err =gc0308_i2c_write(sd, gc0308_effect_embossment[i], 2);
+		}
+	break;
+	case 9:		   
+		num = ((sizeof(gc0308_effect_sketch)/sizeof(gc0308_effect_sketch[0])));			
+		for (i = 0; i < num ; i++) {
+			err =gc0308_i2c_write(sd, gc0308_effect_sketch[i], 2);
+		}
+	break;
+	}
+	
+	mdelay(200);
+}
+
+void gc0308_white_balance_preset(struct v4l2_subdev *sd, int which)
+{
+	int err, i;
+	int num;
+	unsigned char ctrlreg[1][2];
+	
+	printk("  gc0308 color mode!!!\n");
+	// normal,grayscale,sepia,sepia_green,sepia_blue,color_inv,gray_inv,embossment,sketch
+
+	switch (which) {
+	case 1:		
+		num = ((sizeof(gc0308_white_balance_auto)/sizeof(gc0308_white_balance_auto[0])));			
+		for (i = 0; i < num ; i++) {
+			err=gc0308_i2c_write(sd, gc0308_white_balance_auto[i], 2);
+		}
+		// enable AWB
+		ctrlreg[0][0]=0x22; 
+		ctrlreg[0][1]=gc0308_i2c_read(sd, 0x22)|0x02;
+		err=gc0308_i2c_write(sd, ctrlreg[0], 2);
+		
+	break;
+	case 2:		
+		// disable AWB
+		ctrlreg[0][0]=0x22; 
+		ctrlreg[0][1]=gc0308_i2c_read(sd, 0x22) & (~0x02);
+		err=gc0308_i2c_write(sd, ctrlreg[0], 2);
+		
+		num = ((sizeof(gc0308_white_balance_incandescence)/
+						sizeof(gc0308_white_balance_incandescence[0])));			
+		for (i = 0; i < num ; i++) {
+			err =gc0308_i2c_write(sd, gc0308_white_balance_incandescence[i], 2);
+		}
+	break;
+	case 3:		
+		// disable AWB
+		ctrlreg[0][0]=0x22; 
+		ctrlreg[0][1]=gc0308_i2c_read(sd, 0x22) & (~0x02);
+		err=gc0308_i2c_write(sd, ctrlreg[0], 2);
+		
+		num = ((sizeof(gc0308_white_balance_daylight)/sizeof(gc0308_white_balance_daylight[0])));			
+		for (i = 0; i < num ; i++) {
+			err =gc0308_i2c_write(sd, gc0308_white_balance_daylight[i], 2);
+		}
+	break;
+	case 4:		
+		// disable AWB
+		ctrlreg[0][0]=0x22; 
+		ctrlreg[0][1]=gc0308_i2c_read(sd, 0x22) & (~0x02);
+		err=gc0308_i2c_write(sd, ctrlreg[0], 2);
+		
+		num = ((sizeof(gc0308_white_balance_fluorescent)/sizeof(gc0308_white_balance_fluorescent[0])));			
+		for (i = 0; i < num ; i++) {
+			err =gc0308_i2c_write(sd, gc0308_white_balance_fluorescent[i], 2);
+		}
+	break;
+	case 5:	
+		num = ((sizeof(gc0308_white_balance_cloud)/sizeof(gc0308_white_balance_cloud[0])));			
+		for (i = 0; i < num ; i++) {
+			err =gc0308_i2c_write(sd, gc0308_white_balance_cloud[i], 2);
+		}
+	break;
+	}
+	
+	mdelay(200);
+}
+
+static int gc0308_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int i, cnt = 0, err = -EINVAL;
+	unsigned char ctrlreg[3][2];
+
+	printk("In %s() ctrl id is 0x%x value 0xis %x\n", 
+			__func__,
+			ctrl->id,
+			ctrl->value);
+
+	switch (ctrl->id) {
+	case V4L2_CID_BRIGHTNESS:
+		dev_dbg(&client->dev, "%s: V4L2_CID_BRIGHTNESS\n", __func__);
+		ctrlreg[0][0] = 0xAB;
+		ctrlreg[1][0] = 0x9B;
+		if (ctrl->value >= 0) {
+			regABVal &= ~BIT(3);
+			ctrlreg[1][1] = ctrl->value;
+		} else {
+			regABVal |= BIT(3);
+			ctrlreg[1][1] = -ctrl->value;
+		}
+		ctrlreg[0][1] = regABVal;
+		cnt = 2;
+		break;
+
+	case V4L2_CID_CONTRAST:
+		dev_dbg(&client->dev, "%s: V4L2_CID_CONTRAST\n", __func__);
+		ctrlreg[0][0] = 0x9C;
+		ctrlreg[0][1] = ctrl->value;
+		cnt = 1;
+		break;
+
+	case V4L2_CID_SATURATION:
+		dev_dbg(&client->dev, "%s: V4L2_CID_SATURATION\n", __func__);
+		ctrlreg[0][0] = 0xA7;
+		ctrlreg[1][0] = 0xA8;
+		ctrlreg[0][1] = ctrlreg[1][1] = ctrl->value;
+		cnt = 2;
+		break;
+
+	case V4L2_CID_SHARPNESS:
+		dev_dbg(&client->dev, "%s: V4L2_CID_SHARPNESS\n", __func__);
+		ctrlreg[0][0] = 0x8F;
+		ctrlreg[0][1] = ctrl->value;
+		cnt = 1;
+		break;
+
+	case V4L2_CID_HUE:
+		dev_dbg(&client->dev, "%s: V4L2_CID_HUE\n", __func__);
+		if (hueTable[ctrl->value][2] == 0) {
+			regABVal &= ~BIT(1);
+			regABVal |= BIT(0);
+		} else {
+			regABVal |= BIT(1);
+			regABVal &= ~BIT(0);
+		}
+		ctrlreg[0][0] = 0xA9;
+		ctrlreg[0][1] = hueTable[ctrl->value][0];
+		ctrlreg[1][0] = 0xAA;
+		ctrlreg[1][1] = hueTable[ctrl->value][1];
+		ctrlreg[2][0] = 0xAB;
+		ctrlreg[2][1] = regABVal;
+		cnt = 3;
+		break;
+
+	case V4L2_CID_POWER_LINE_FREQUENCY:
+		dev_dbg(&client->dev, "%s: V4L2_CID_POWER_LINE_FREQUENCY\n", __func__);
+		ctrlreg[0][0] = 0x22;
+		ctrlreg[1][0] = 0x23;
+		if ((ctrl->value == 0) || (ctrl->value == 2)) { // off or 60Hz
+			ctrlreg[0][1] = 0x7F;
+			ctrlreg[1][1] = 0x03;
+			cnt = 2;
+		} else if (ctrl->value == 1){ // 50Hz
+			ctrlreg[0][1] = 0x99;
+			ctrlreg[1][1] = 0x02;
+			cnt = 2;
+		}
+		break;
+#if 0	//lxy
+	case V4L2_CID_SCENE_MODE:
+		GC0308_night_mode(sd, ctrl->value);
+		return;
+		break;
+#endif
+
+	case V4L2_CID_COLORFX:
+   		dev_err(&client->dev, "%s: in color effect %d\n", 
+					__func__,   
+					ctrl->value);
+		gc0308_color_effect(sd, ctrl->value);
+		return 0;
+		break;
+
+#if 0	//lxy
+	case V4L2_CID_WHITE_BALANCE_PRESET:
+		dev_err(&client->dev, "%s: in white balance preset %d\n", 
+					__func__,   
+					ctrl->value);
+		gc0308_white_balance_preset(sd, ctrl->value);
+		return 0;
+		break;
+#endif
+
+	default:
+		dev_err(&client->dev, "%s: no such control id 0x%x\n", __func__, ctrl->id);
+		break;  
+	}
+
+	for (i = 0; i < cnt; ++i)
+		err = gc0308_i2c_write(sd, ctrlreg[i], 2);
+
+	if (err < 0) {
+		dev_dbg(&client->dev, "%s: vidioc_s_ctrl failed: %d\n", __func__, ctrl->id);
+	}
+
+	return err;
+}
+
+static int gc0308_init(struct v4l2_subdev *sd, u32 val)
+{
+	//return 0;
+//printk("-----------gc0308_init------------\n");
+#ifdef CONFIG_CAMERA_CONTROLLED_BY_ARM
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int i, err = -EINVAL;
+
+	/*
+	unsigned char initreg[2] = {0x12, 0x80};
+
+	v4l_info(client, "%s: camera initialization start\n", __func__);
+	err = gc0308_i2c_write(sd, initreg, 2);
+	if (err < 0)
+		v4l_info(client, "%s: init register set failed\n", __func__);
+	mdelay(150);
+*/
+	printk ("lxy: begin to init gc0308's reg.\n");
+	gc0308_i2c_write(sd, gc0308_reset_reg[0],
+				sizeof(gc0308_reset_reg[i]));
+	msleep(1);
+	for (i = 0; i < GC0308_INIT_REGS; i++) {
+		err = gc0308_i2c_write(sd, gc0308_init_reg[i],
+				sizeof(gc0308_init_reg[i]));
+		if (err < 0)
+			v4l_info(client, "%s: %d register set failed\n",
+					__func__, i);
+	}
+
+#if 1
+		gc0308_i2c_write(sd, gc0308_windows_2_page1[0],
+				sizeof(gc0308_windows_2_page1[0]));
+		
+		gc0308_i2c_write(sd, gc0308_windows_2_vga[0],
+				sizeof(gc0308_windows_2_vga[0]));
+
+		gc0308_i2c_write(sd, gc0308_windows_2_page0[0],
+				sizeof(gc0308_windows_2_page0[0]));
+
+		for (i = 0; i < 8; i++) {
+			gc0308_i2c_write(sd, gc0308_windows_640[i],
+					sizeof(gc0308_windows_640[i]));
+		}
+	
+		gc0308_i2c_write(sd, gc0308_output_RGB[0],
+				sizeof(gc0308_output_RGB[0]));
+		
+		gc0308_i2c_write(sd, gc0308_paddrv[0],
+				sizeof(gc0308_paddrv[0]));
+
+		gc0308_i2c_write(sd, gc0308_syncmode1[0],
+				sizeof(gc0308_syncmode1[0]));
+
+		gc0308_i2c_write(sd, gc0308_output_en[0],
+				sizeof(gc0308_output_en[0]));
+#endif	
+
+	if (err < 0) {
+		v4l_err(client, "%s: camera initialization failed\n",
+				__func__);
+		return -EIO;	/* FIXME */
+	}
+#endif
+	printk ("lxy: init gc0308's reg success.\n");
+	return 0;
+}
+
+/*
+ * s_config subdev ops
+ * With camera device, we need to re-initialize every single opening time therefor,
+ * it is not necessary to be initialized on probe time. except for version checking
+ * NOTE: version checking is optional
+ */
+static int gc0308_s_config(struct v4l2_subdev *sd, int irq, void *platform_data)
+{
+	printk("gc0308_s_cfg---------\n");
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct gc0308_state *state = to_state(sd);
+	struct gc0308_platform_data *pdata;
+
+	dev_info(&client->dev, "fetching platform data\n");
+
+	pdata = client->dev.platform_data;
+
+	if (!pdata) {
+		dev_err(&client->dev, "%s: no platform data\n", __func__);
+		return -ENODEV;
+	}
+
+	/*
+	 * Assign default format and resolution
+	 * Use configured default information in platform data
+	 * or without them, use default information in driver
+	 */
+	if (!(pdata->default_width && pdata->default_height)) {
+		/* TODO: assign driver default resolution */
+	} else {
+		state->pix.width = pdata->default_width;
+		state->pix.height = pdata->default_height;
+	}
+
+	if (!pdata->pixelformat)
+		state->pix.pixelformat = DEFAULT_FMT;
+	else
+		state->pix.pixelformat = pdata->pixelformat;
+
+	if (!pdata->freq)
+		state->freq = 12000000;	/* 12MHz default */
+	else
+		state->freq = pdata->freq;
+
+	if (!pdata->is_mipi) {
+		state->is_mipi = 0;
+		dev_info(&client->dev, "parallel mode\n");
+	} else
+		state->is_mipi = pdata->is_mipi;
+
+	return 0;
+}
+
+
+
+/*************************************************************************
+* FUNCTION
+*	GC0308_night_mode
+*
+* DESCRIPTION
+*	This function night mode of GC0308.
+*
+* PARAMETERS
+*	none
+*
+* RETURNS
+*	None
+*
+* GLOBALS AFFECTED
+*
+*************************************************************************/
+void GC0308_night_mode(struct v4l2_subdev *sd, bool enable)
+{
+	//kal_int32 temp_reg =0;
+	int temp_reg =0;
+	unsigned char ctrlreg[1][2];
+	
+#ifdef GC_DEBUG	
+	_dbg_print("  GC0308_night_mode!!!\n");
+#endif	
+
+    //temp_reg = read_cmos_sensor(0x20);
+    temp_reg = gc0308_i2c_read(sd, 0x20);
+	
+    if(enable){
+		//MAX_EXPOSURE_LINES=2*(PIXEL_CLK/MIN_FRAME_RATE)/VGA_PERIOD_PIXEL_NUMS;
+
+		//sensor_night_mode=KAL_TRUE;
+
+		printk("%s(): line: %d: enable GC0308_night_mode !\n",__func__, __LINE__);
+
+		ctrlreg[0][0] = 0xec;
+		ctrlreg[0][1] = 0x30;		
+		gc0308_i2c_write(sd, ctrlreg[0], 2);
+
+		ctrlreg[0][0] = 0x20;
+		ctrlreg[0][1] = temp_reg&0x5f;
+		gc0308_i2c_write(sd, ctrlreg[0], 2);
+
+		ctrlreg[0][0] = 0x3c;
+		ctrlreg[0][1] = 0x08;
+		gc0308_i2c_write(sd, ctrlreg[0], 2);
+		
+		ctrlreg[0][0] = 0x3d;
+		ctrlreg[0][1] = 0x08;
+		gc0308_i2c_write(sd, ctrlreg[0], 2);
+
+		ctrlreg[0][0] = 0x3e;
+		ctrlreg[0][1] = 0x08;
+		gc0308_i2c_write(sd, ctrlreg[0], 2);
+
+		
+		ctrlreg[0][0] = 0x3f;
+		ctrlreg[0][1] = 0x08;
+		gc0308_i2c_write(sd, ctrlreg[0], 2);
+
+     } else {
+		//MAX_EXPOSURE_LINES=(PIXEL_CLK/MIN_FRAME_RATE)/VGA_PERIOD_PIXEL_NUMS;
+
+		//sensor_night_mode=KAL_FALSE;
+
+		printk("%s(): line: %d: disable GC0308_night_mode !\n", __func__, __LINE__);
+
+		ctrlreg[0][0] = 0xec;
+		ctrlreg[0][1] = 0x20;		
+		gc0308_i2c_write(sd, ctrlreg[0], 2);
+
+		ctrlreg[0][0] = 0x20;
+		ctrlreg[0][1] = temp_reg|0x20;		
+		gc0308_i2c_write(sd, ctrlreg[0], 2);
+
+		ctrlreg[0][0] = 0x3c;
+		ctrlreg[0][1] = 0x02;		
+		gc0308_i2c_write(sd, ctrlreg[0], 2);
+		
+		ctrlreg[0][0] = 0x3d;
+		ctrlreg[0][1] = 0x02;		
+		gc0308_i2c_write(sd, ctrlreg[0], 2);
+	
+		ctrlreg[0][0] = 0x3e;
+		ctrlreg[0][1] = 0x02;		
+		gc0308_i2c_write(sd, ctrlreg[0], 2);
+		
+		ctrlreg[0][0] = 0x3f;
+		ctrlreg[0][1] = 0x02;		
+		gc0308_i2c_write(sd, ctrlreg[0], 2);
+	}
+
+	 //Delayms_GC(200);
+	 mdelay(200);
+}
+
+static int gc0308_set_bus_param(struct soc_camera_device *icd,
+				unsigned long flags)
+{
+	struct soc_camera_link *icl = to_soc_camera_link(icd);
+	unsigned long width_flag = flags & SOCAM_DATAWIDTH_MASK;
+
+	/* Only one width bit may be set */
+	if (icl->set_bus_param)
+		return icl->set_bus_param(icl, width_flag);
+
+	/*
+	 * Without board specific bus width settings we support only the
+	 * sensors native bus width witch are tested working
+	 */
+	if (width_flag & (SOCAM_DATAWIDTH_10 | SOCAM_DATAWIDTH_8))
+		return 0;
+
+	return 0;
+}
+
+static unsigned long gc0308_query_bus_param(struct soc_camera_device *icd)
+{
+	struct soc_camera_link *icl = to_soc_camera_link(icd);
+	unsigned long flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_MASTER |
+		SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_HIGH |
+		SOCAM_DATA_ACTIVE_HIGH;
+
+	if (icl->query_bus_param)
+		flags |= icl->query_bus_param(icl) & SOCAM_DATAWIDTH_MASK;
+	else
+		flags |= SOCAM_DATAWIDTH_8;
+
+	return soc_camera_apply_sensor_flags(icl, flags);
+}
+
+static const struct v4l2_subdev_core_ops gc0308_core_ops = {
+	.init = gc0308_init,	/* initializing API */
+//	.s_config = gc0308_s_config,	/* Fetch platform data */
+	.queryctrl = gc0308_queryctrl,
+	.g_ctrl = gc0308_g_ctrl,
+	.s_ctrl = gc0308_s_ctrl,
+};
+
+static const struct v4l2_subdev_video_ops gc0308_video_ops = {
+	.s_crystal_freq = gc0308_s_crystal_freq,
+	.g_mbus_fmt = gc0308_g_fmt,
+	.s_mbus_fmt = gc0308_s_fmt,
+	.enum_framesizes = gc0308_enum_framesizes,
+	.enum_frameintervals = gc0308_enum_frameintervals,
+	.enum_mbus_fmt = gc0308_enum_fmt,
+	.try_mbus_fmt = gc0308_try_fmt,
+	.g_parm = gc0308_g_parm,
+	.s_parm = gc0308_s_parm,
+};
+
+static const struct v4l2_subdev_ops gc0308_ops = {
+	.core = &gc0308_core_ops,
+	.video = &gc0308_video_ops,
+};
+
+static struct soc_camera_ops gc0308_camera_ops = {
+	.set_bus_param		= gc0308_set_bus_param,
+	.query_bus_param	= gc0308_query_bus_param,
+	.controls		= gc0308_controls,
+	.num_controls		= ARRAY_SIZE(gc0308_controls),
+};
+
+
+//*********** proc ***************
+static void dump_i2c_regs(void)
+{
+	int i;
+	if(!s_i2c_client) {
+		printk("s_i2c_client not ready\n");
+		return;
+	}
+
+	for(i = 0; i <= 0xFF; i++) 
+		printk("dump_i2c_regs: 0x%02X=0x%02X\n", i, i2c_smbus_read_byte_data(s_i2c_client, i) & 0xFF);
+}
+
+static int gc0308_writeproc(struct file *file,const char *buffer,
+                           unsigned long count, void *data)
+{
+	return count;
+}
+
+static int gc0308_readproc(char *page, char **start, off_t off,
+			  int count, int *eof, void *data)
+{
+	dump_i2c_regs();
+	return 0;
+}
+//********************************
+
+
+static int gc0308_init_reg1(struct i2c_client *client)
+{
+//printk("------gc0308_init_reg1------\n");
+#ifdef CONFIG_CAMERA_CONTROLLED_BY_ARM
+//printk("------gc0308_control_arm------\n");
+	int i, err = -EINVAL;
+
+	/*
+	unsigned char initreg[2] = {0x12, 0x80};
+
+	v4l_info(client, "%s: camera initialization start\n", __func__);
+	err = gc0308_i2c_write(sd, initreg, 2);
+	if (err < 0)
+		v4l_info(client, "%s: init register set failed\n", __func__);
+	mdelay(150);
+*/
+	printk ("lxy: gc0308_init......\n");
+	for (i = 0; i < GC0308_INIT_REGS; i++) {
+		err = i2c_smbus_write_byte_data(client,  gc0308_init_reg[i][0],  gc0308_init_reg[i][1]);
+		if (err < 0)
+			v4l_info(client, "%s: %d register set failed\n",
+					__func__, i);
+	}
+
+#if 0
+	i2c_smbus_write_byte_data(client,  gc0308_init_reg[i][0],  gc0308_init_reg[i][1]);
+#endif
+	
+	if (err < 0) {
+		v4l_err(client, "%s: camera initialization failed\n",
+				__func__);
+		return -EIO;	/* FIXME */
+	}
+#endif
+	return 0;
+}
+
+/*
+ * ov7675_probe
+ * Fetching platform data is being done with s_config subdev call.
+ * In probe routine, we just register subdev device
+ */
+static int gc0308_probe(struct i2c_client *client,
+			 const struct i2c_device_id *id)
+{
+	printk("------gc0308 probe--------\n");
+	struct gc0308_state *state;
+	struct v4l2_subdev *sd;
+	struct soc_camera_device  *icd = client->dev.platform_data;
+	struct i2c_adapter        *adapter = to_i2c_adapter(client->dev.parent);
+	struct soc_camera_link    *icl;
+
+	state = kzalloc(sizeof(struct gc0308_state), GFP_KERNEL);
+	if (state == NULL)
+		return -ENOMEM;
+
+	sd = &state->sd;
+	strcpy(sd->name, GC0308_DRIVER_NAME);
+
+	icl = to_soc_camera_link(icd);
+	if (!icl) {
+		dev_err(&adapter->dev,
+			"GC0308: Missing platform_data for driver\n");
+		return -EINVAL;
+	}
+
+	/* Registering subdev */
+	v4l2_i2c_subdev_init(sd, client, &gc0308_ops);
+
+	icd->ops = &gc0308_camera_ops;
+
+	gc0308_init(sd, 0);
+
+	s_i2c_client = client;
+	s_proc = create_proc_entry(GC0308_PROC_NAME, 0666, &proc_root);
+	if (s_proc != NULL)
+	{
+		s_proc->write_proc = gc0308_writeproc;
+		s_proc->read_proc = gc0308_readproc;
+	}
+
+	dev_info(&client->dev, "gc0308 has been probed\n");
+/*
+	// i2c_smbus_read_byte_data
+	//int gc0308_id = gc0308_i2c_read(sd, 0x00);
+	extern s32 i2c_smbus_read_byte_data(struct i2c_client *client, u8 command);	
+
+	int time;
+	char value;
+	for (time=0; time<8; time++){
+		value = i2c_smbus_read_byte_data(client, time);
+		dev_info(&client->dev, "gc0308 Read out the reg 0x%x is 0x%x\n", 
+					time,
+					value);
+	}
+*/	
+	return 0;
+}
+
+
+static int gc0308_remove(struct i2c_client *client)
+{
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	struct soc_camera_device *icd = client->dev.platform_data;
+	struct soc_camera_link *icl = to_soc_camera_link(icd);
+	if (icl->free_bus)
+		icl->free_bus(icl);
+	icd->ops = NULL;
+	if (s_proc != NULL)
+		remove_proc_entry(GC0308_PROC_NAME, &proc_root);
+
+	v4l2_device_unregister_subdev(sd);
+	kfree(to_state(sd));
+	return 0;
+}
+
+static const struct i2c_device_id gc0308_id[] = {
+	{ GC0308_DRIVER_NAME, 0 },
+	{ },
+};
+MODULE_DEVICE_TABLE(i2c, gc0308_id);
+
+static struct i2c_driver gc0308_driver = {
+	.driver = {
+		.owner	= THIS_MODULE,
+		.name	= GC0308_DRIVER_NAME,
+	},
+	.probe		= gc0308_probe,
+	.remove		= gc0308_remove,
+	.id_table	= gc0308_id,
+};
+
+static __init int init_gc0308(void)
+{
+	return i2c_add_driver(&gc0308_driver);
+}
+
+static __exit void exit_gc0308(void)
+{
+	i2c_del_driver(&gc0308_driver);
+}
+
+module_init(init_gc0308);
+module_exit(exit_gc0308);
+
+#if 0
+static struct v4l2_i2c_driver_data v4l2_i2c_data = {
+	.name = GC0308_DRIVER_NAME,
+	.probe = gc0308_probe,
+	.remove = gc0308_remove,
+	.id_table = gc0308_id,
+};
+#endif
+
+MODULE_DESCRIPTION("GC0308 camera driver");
+MODULE_AUTHOR("Ingjye Huang <Ingjye_Huang@asus.com>");
+MODULE_LICENSE("GPL");
diff -uNra linux-3.0.82/drivers/media/video/ls1c-ov9650.c linux-3.0.82x/drivers/media/video/ls1c-ov9650.c
--- linux-3.0.82/drivers/media/video/ls1c-ov9650.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/ls1c-ov9650.c	2017-09-23 03:42:49.542676518 +0800
@@ -0,0 +1,1051 @@
+/*
+ * OmniVision OV96xx Camera Driver
+ *
+ * Copyright (C) 2009 Marek Vasut <marek.vasut@gmail.com>
+ *
+ * Based on ov772x camera driver:
+ *
+ * Copyright (C) 2008 Renesas Solutions Corp.
+ * Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ *
+ * Based on ov7670 and soc_camera_platform driver,
+ *
+ * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
+ * Copyright (C) 2008 Magnus Damm
+ * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/videodev2.h>
+#include <media/v4l2-chip-ident.h>
+#include <media/v4l2-common.h>
+#include <media/soc_camera.h>
+
+#include "ls1c-ov9650.h"
+
+#define to_ov9650_sensor(sd)	container_of(sd, struct ov9650_priv, subdev)
+
+
+static const struct ov9650_reg ov9650_regs_dflt[] = {                   /* yuv  vga */
+	{0x12, 0x80}, {0x11, 0x81}, {0x6b, 0x0a}, {0x6a, 0x3e}, {0x3b, 0x09},
+	{0x13, 0xe0}, {0x01, 0x80}, {0x02, 0x80}, {0x00, 0x00}, {0x10, 0x00},
+	{0x13, 0xe5}, 
+	{0x39, 0x43}, {0x38, 0x12}, {0x37, 0x91}, {0x35, 0x91},
+	{0x0e, 0x20}, {0x1e, 0x04},
+	{0xA8, 0x80}, {0x12, 0x40}, {0x04, 0x00}, {0x0c, 0x04}, {0x0d, 0x80},   // reg0d: 0x80
+	{0x18, 0xc6}, {0x17, 0x26}, {0x32, 0xad}, {0x03, 0x00}, {0x1a, 0x3d},   //reg18: 0xba, reg17:0x1a  {0x18, 0xc6}, {0x17, 0x26},  // {0x18, 0xba}, {0x17, 0x1a},
+	{0x19, 0x01}, {0x3f, 0xa6}, {0x14, 0x2e}, {0x15, 0x02}, {0x41, 0x02},   //reg15: bit0:hsync  bit1:vsync  negative
+	{0x42, 0x08}, 
+	{0x1b, 0x00}, {0x16, 0x06}, {0x33, 0xe2}, {0x34, 0xbf},
+	{0x96, 0x04}, {0x3a, 0x00}, {0x8e, 0x00},
+	{0x3c, 0x77}, {0x8B, 0x06}, {0x94, 0x88}, {0x95, 0x88}, {0x40, 0xc1},
+	{0x29, 0x3f}, {0x0f, 0x42},
+	{0x3d, 0x92}, {0x69, 0x40}, {0x5C, 0xb9}, {0x5D, 0x96}, {0x5E, 0x10},
+	{0x59, 0xc0}, {0x5A, 0xaf}, {0x5B, 0x55}, {0x43, 0xf0}, {0x44, 0x10},
+	{0x45, 0x68}, {0x46, 0x96}, {0x47, 0x60}, {0x48, 0x80}, {0x5F, 0xe0},
+	{0x60, 0x8c}, /* 0c for advanced AWB (related to lens) */
+	{0x61, 0x20}, {0xa5, 0xd9}, {0xa4, 0x74}, {0x8d, 0x02}, {0x13, 0xe7},
+	{0x4f, 0x3a}, {0x50, 0x3d}, {0x51, 0x03}, {0x52, 0x12}, {0x53, 0x26},
+	{0x54, 0x38}, {0x55, 0x40}, {0x56, 0x40}, {0x57, 0x40}, {0x58, 0x0d},
+	{0x8C, 0x23}, {0x3E, 0x02}, {0xa9, 0xb8}, {0xaa, 0x92}, {0xab, 0x0a},
+	{0x8f, 0xdf}, {0x90, 0x00}, {0x91, 0x00}, {0x9f, 0x00}, {0xa0, 0x00},
+	{0x3A, 0x01},  //change 
+	{0x24, 0x70}, {0x25, 0x64}, {0x26, 0xc3},
+	{0x2a, 0x00}, /* 10 for 50Hz */ 
+	{0x2b, 0x00}, /* 40 for 50Hz */
+	//;gamma
+	{0x6c, 0x40}, {0x6d, 0x30}, {0x6e, 0x4b}, {0x6f, 0x60}, {0x70, 0x70},
+	{0x71, 0x70}, {0x72, 0x70}, {0x73, 0x70}, {0x74, 0x60}, {0x75, 0x60},
+	{0x76, 0x50}, {0x77, 0x48}, {0x78, 0x3a}, {0x79, 0x2e}, {0x7a, 0x28},
+	{0x7b, 0x22}, {0x7c, 0x04}, {0x7d, 0x07}, {0x7e, 0x10}, {0x7f, 0x28},
+	{0x80, 0x36}, {0x81, 0x44}, {0x82, 0x52}, {0x83, 0x60}, {0x84, 0x6c},
+	{0x85, 0x78}, {0x86, 0x8c}, {0x87, 0x9e}, {0x88, 0xbb}, {0x89, 0xd2},
+	{0x8a, 0xe6}
+};
+
+
+
+/* Configurations
+ * NOTE: for YUV, alter the following registers:
+ * 		COM12 |= OV9650_COM12_YUV_AVG
+ *
+ *	 for RGB, alter the following registers:
+ *		COM7  |= OV9650_COM7_RGB
+ *		COM13 |= OV9650_COM13_RGB_AVG
+ *		COM15 |= proper RGB color encoding mode
+ */
+static const struct ov9650_reg ov9650_regs_qqcif[] = {
+	{ OV9650_CLKRC,	OV9650_CLKRC_DPLL_EN | OV9650_CLKRC_DIV(0x0f) },
+	{ OV9650_COM1,	OV9650_COM1_QQFMT | OV9650_COM1_HREF_2SKIP },
+	{ OV9650_COM4,	OV9650_COM4_QQ_VP | OV9650_COM4_RSVD },
+	{ OV9650_COM7,	OV9650_COM7_QCIF },
+	{ OV9650_COM12,	OV9650_COM12_RSVD },
+	{ OV9650_COM13,	OV9650_COM13_GAMMA_RAW | OV9650_COM13_MATRIX_EN },
+	{ OV9650_COM15,	OV9650_COM15_OR_10F0 },
+};
+
+static const struct ov9650_reg ov9650_regs_qqvga[] = {
+	{ OV9650_CLKRC,	OV9650_CLKRC_DPLL_EN | OV9650_CLKRC_DIV(0x07) },
+	{ OV9650_COM1,	OV9650_COM1_QQFMT | OV9650_COM1_HREF_2SKIP },
+	{ OV9650_COM4,	OV9650_COM4_QQ_VP | OV9650_COM4_RSVD },
+	{ OV9650_COM7,	OV9650_COM7_QVGA },
+	{ OV9650_COM12,	OV9650_COM12_RSVD },
+	{ OV9650_COM13,	OV9650_COM13_GAMMA_RAW | OV9650_COM13_MATRIX_EN },
+	{ OV9650_COM15,	OV9650_COM15_OR_10F0 },
+};
+
+static const struct ov9650_reg ov9650_regs_qcif[] = {
+	{ OV9650_CLKRC,	OV9650_CLKRC_DPLL_EN | OV9650_CLKRC_DIV(0x07) },
+	{ OV9650_COM4,	OV9650_COM4_QQ_VP | OV9650_COM4_RSVD },
+	{ OV9650_COM7,	OV9650_COM7_QCIF },
+	{ OV9650_COM12,	OV9650_COM12_RSVD },
+	{ OV9650_COM13,	OV9650_COM13_GAMMA_RAW | OV9650_COM13_MATRIX_EN },
+	{ OV9650_COM15,	OV9650_COM15_OR_10F0 },
+};
+
+static const struct ov9650_reg ov9650_regs_qvga[] = {
+	{0x04, 0x00},
+	{0x0c, 0x04},
+	{0x0d, 0x80},
+	{0x11, 0x83},
+	{0x12, 0x10},
+	{0x37, 0x91},
+	{0x38, 0x12},
+	{0x39, 0x43},
+	/*
+	{ OV9650_CLKRC,	OV9650_CLKRC_DPLL_EN | OV9650_CLKRC_DIV(0x03) },
+	{ OV9650_COM4,	OV9650_COM4_QQ_VP | OV9650_COM4_RSVD },
+	{ OV9650_COM7,	OV9650_COM7_QVGA },
+//	{ OV9650_COM12,	OV9650_COM12_RSVD }, { OV9650_COM13,	OV9650_COM13_GAMMA_RAW | OV9650_COM13_MATRIX_EN },
+	{ OV9650_COM15,	OV9650_COM15_OR_10F0 },
+	*/
+};
+
+static const struct ov9650_reg ov9650_regs_cif[] = {
+	{ OV9650_CLKRC,	OV9650_CLKRC_DPLL_EN | OV9650_CLKRC_DIV(0x03) },
+	{ OV9650_COM3,	OV9650_COM3_VP },
+	{ OV9650_COM7,	OV9650_COM7_CIF },
+//	{ OV9650_COM12,	OV9650_COM12_RSVD },
+	{ OV9650_COM13,	OV9650_COM13_GAMMA_RAW | OV9650_COM13_MATRIX_EN },
+	{ OV9650_COM15,	OV9650_COM15_OR_10F0 },
+};
+
+#if 0
+static const struct ov9650_reg ov9650_regs_vga[] = {
+	{ OV9650_CLKRC,	OV9650_CLKRC_DPLL_EN | OV9650_CLKRC_DIV(0x01) },  //enable doublle clock, div_2
+	{ OV9650_COM3,	OV9650_COM3_VP },
+	{ OV9650_COM7,	OV9650_COM7_VGA },
+	{ OV9650_COM12,	OV9650_COM12_RSVD },
+	{ OV9650_COM13,	OV9650_COM13_GAMMA_RAW | OV9650_COM13_MATRIX_EN },
+	{ OV9650_COM15,	OV9650_COM15_OR_10F0 },
+};
+#else
+static const struct ov9650_reg ov9650_regs_vga[] = {
+	{ 0x04, 0x00 },
+	{ 0x0c, 0x04 },
+	{ 0x0d, 0x80 },
+	{ 0x11, 0x81 },
+	{ 0x12, 0x40 },
+	{ 0x37, 0x91 },
+	{ 0x38, 0x12 },
+	{ 0x39, 0x43 },
+	//{ OV9650_COM12,	OV9650_COM12_RSVD },
+//	{ OV9650_COM13,	OV9650_COM13_GAMMA_RAW | OV9650_COM13_MATRIX_EN },
+//	{ OV9650_COM15,	OV9650_COM15_OR_10F0 },
+};
+#endif
+static const struct ov9650_reg ov9650_regs_sxga[] = {
+	{ OV9650_CLKRC,	OV9650_CLKRC_DPLL_EN | OV9650_CLKRC_DIV(0x01) },
+	{ OV9650_COM3,	OV9650_COM3_VP },
+	{ OV9650_COM7,	0 },
+	{ OV9650_COM12,	OV9650_COM12_RSVD },
+	{ OV9650_COM13,	OV9650_COM13_GAMMA_RAW | OV9650_COM13_MATRIX_EN },
+	{ OV9650_COM15,	OV9650_COM15_OR_10F0 },
+};
+
+
+static const struct ov9650_reg ov9650_regs_yuv[] = {
+	{ OV9650_MTX1,	0x58 },
+	{ OV9650_MTX2,	0x48 },
+	{ OV9650_MTX3,	0x10 },
+	{ OV9650_MTX4,	0x28 },
+	{ OV9650_MTX5,	0x48 },
+	{ OV9650_MTX6,	0x70 },
+	{ OV9650_MTX7,	0x40 },
+	{ OV9650_MTX8,	0x40 },
+	{ OV9650_MTX9,	0x40 },
+	{ OV9650_MTXS,	0x0f },
+};
+
+static const struct ov9650_reg ov9650_regs_rgb[] = {
+	{ OV9650_MTX1,	0x71 },
+	{ OV9650_MTX2,	0x3e },
+	{ OV9650_MTX3,	0x0c },
+	{ OV9650_MTX4,	0x33 },
+	{ OV9650_MTX5,	0x72 },
+	{ OV9650_MTX6,	0x00 },
+	{ OV9650_MTX7,	0x2b },
+	{ OV9650_MTX8,	0x66 },
+	{ OV9650_MTX9,	0xd2 },
+	{ OV9650_MTXS,	0x65 },
+};
+
+static enum v4l2_mbus_pixelcode ov9650_codes[] = {
+	V4L2_MBUS_FMT_YUYV8_2X8,  // dbg-yg add
+	V4L2_MBUS_FMT_UYVY8_2X8,
+	V4L2_MBUS_FMT_RGB565_2X8_LE,
+	V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE,
+};
+
+static const struct v4l2_queryctrl ov9650_controls[] = {
+	{
+		.id		= V4L2_CID_VFLIP,
+		.type		= V4L2_CTRL_TYPE_BOOLEAN,
+		.name		= "Flip Vertically",
+		.minimum	= 0,
+		.maximum	= 1,
+		.step		= 1,
+		.default_value	= 0,
+	},
+	{
+		.id		= V4L2_CID_HFLIP,
+		.type		= V4L2_CTRL_TYPE_BOOLEAN,
+		.name		= "Flip Horizontally",
+		.minimum	= 0,
+		.maximum	= 1,
+		.step		= 1,
+		.default_value	= 0,
+	},
+};
+
+
+
+/***************************************************************************
+ * Description: SCCB / i2c  for ov9650 
+ * Parameters: 
+ * Author  :Sunyoung_yg 
+ * Date    : 2014-12-24
+ ***************************************************************************/
+#define I2C_CLOCK		400000		/* Hz. max 400 Kbits/sec */
+
+/* registers */
+#define OCI2C_PRELOW		0
+#define OCI2C_PREHIGH		1
+#define OCI2C_CONTROL		2
+#define OCI2C_DATA			3
+#define OCI2C_CMD			4 /* write only */
+#define OCI2C_STATUS		4 /* read only, same address as OCI2C_CMD */
+
+#define OCI2C_CTRL_IEN		0x40
+#define OCI2C_CTRL_EN		0x80
+
+#define OCI2C_CMD_START		0x90
+#define OCI2C_CMD_STOP		0x40
+#define OCI2C_CMD_READ		0x20
+#define OCI2C_CMD_WRITE		0x10
+#define OCI2C_CMD_READ_ACK	0x20
+#define OCI2C_CMD_READ_NACK	0x28
+#define OCI2C_CMD_IACK		0x00
+
+#define OCI2C_STAT_IF		0x01
+#define OCI2C_STAT_TIP		0x02
+#define OCI2C_STAT_ARBLOST	0x20
+#define OCI2C_STAT_BUSY		0x40
+#define OCI2C_STAT_NACK		0x80
+
+
+
+struct ls1x_i2c {
+	void __iomem *base;
+	struct i2c_adapter adap;
+};
+
+static inline void i2c_writeb(struct ls1x_i2c *i2c, int reg, u8 value)
+{
+	writeb(value, i2c->base + reg);
+}
+
+static inline u8 i2c_readb(struct ls1x_i2c *i2c, int reg)
+{
+	return readb(i2c->base + reg);
+}
+
+
+static void ls1x_i2c_hwinit(struct ls1x_i2c *i2c)
+{
+	struct clk *clk;
+	int prescale;
+	u8 ctrl = i2c_readb(i2c, OCI2C_CONTROL);
+	/* make sure the device is disabled */
+	i2c_writeb(i2c, OCI2C_CONTROL, ctrl & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN));
+
+	prescale = 0x141;
+	i2c_writeb(i2c, OCI2C_PRELOW, prescale & 0xff);
+	i2c_writeb(i2c, OCI2C_PREHIGH, prescale >> 8);
+
+	/* Init the device */
+	i2c_writeb(i2c, OCI2C_CMD, OCI2C_CMD_IACK);
+	i2c_writeb(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_IEN | OCI2C_CTRL_EN);
+}
+
+
+/*
+ * Poll the i2c status register until the specified bit is set.
+ * Returns 0 if timed out (100 msec).
+ */
+static short ls1x_poll_status(struct ls1x_i2c *i2c, unsigned long bit)
+{
+	int loop_cntr = 10000;
+	do {
+		udelay(10);
+	} while ((i2c_readb(i2c, OCI2C_STATUS) & bit) && (--loop_cntr > 0));
+	return (loop_cntr > 0);
+}
+
+/***************************************************************/
+static int ls1x_xfer_read(struct ls1x_i2c *i2c, unsigned char *buf, int length) 
+{
+	int x;
+	for (x=0; x<length; x++) {
+		/* send ACK last not send ACK */
+		if (x != (length -1)) 
+			i2c_writeb(i2c, OCI2C_CMD, OCI2C_CMD_READ_NACK); //dbg-yg   NACK test for ov9650 camera, 
+		else
+			i2c_writeb(i2c, OCI2C_CMD, OCI2C_CMD_READ_NACK);
+		if (!ls1x_poll_status(i2c, OCI2C_STAT_TIP)) {
+			return -ETIMEDOUT;
+		}
+		*buf++ = i2c_readb(i2c, OCI2C_DATA);
+	}
+	i2c_writeb(i2c,OCI2C_CMD, OCI2C_CMD_STOP);
+		
+	return 0;
+}
+
+/***************************************************************/
+static int ls1x_xfer_write(struct ls1x_i2c *i2c, unsigned char *buf, int length)
+{
+	int x;
+
+	for (x=0; x<length; x++) {
+		i2c_writeb(i2c, OCI2C_DATA, *buf++);
+		i2c_writeb(i2c, OCI2C_CMD, OCI2C_CMD_WRITE);
+		if (!ls1x_poll_status(i2c, OCI2C_STAT_TIP)) {
+			return -ETIMEDOUT;
+		}
+	}
+	i2c_writeb(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
+	return 0;
+}
+
+static int ls1x_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num)
+{
+
+	struct ls1x_i2c *i2c = (struct ls1x_i2c *)adap->algo_data;
+	int i, ret;
+
+	for (i = 0; i < num; i++) {
+		if (!ls1x_poll_status(i2c, OCI2C_STAT_BUSY)) {
+			return -ETIMEDOUT;
+		}
+
+		i2c_writeb(i2c, OCI2C_DATA, (pmsg->addr << 1)
+			| ((pmsg->flags & I2C_M_RD) ? 1 : 0));
+		i2c_writeb(i2c, OCI2C_CMD, OCI2C_CMD_START);
+		/* Wait until transfer is finished */
+		if (!ls1x_poll_status(i2c, OCI2C_STAT_TIP)) {
+			return -ETIMEDOUT;
+		}
+ 		if (pmsg->flags & I2C_M_RD)
+			ret = ls1x_xfer_read(i2c, pmsg->buf, pmsg->len);
+  		else
+			ret = ls1x_xfer_write(i2c, pmsg->buf, pmsg->len);
+		if (ret)
+			return ret;
+		pmsg++;
+	}
+	return i;
+}
+
+/* read a register */
+static int ov9650_reg_read(struct i2c_client *client, u8 reg, u8 *val)
+{
+	int ret;
+	u8 data = reg;
+	struct i2c_msg msg = {
+		.addr	= client->addr,
+		.flags	= 0,
+		.len	= 1,
+		.buf	= &data,
+	};
+	ret = ls1x_xfer(client->adapter, &msg, 1);
+
+	if (ret < 0)
+		goto err;
+
+	msg.flags = I2C_M_RD;
+	ret = ls1x_xfer(client->adapter, &msg, 1);
+
+	if (ret < 0)
+		goto err;
+
+	*val = data;
+	return 0;
+
+err:
+	dev_err(&client->dev, "Failed reading register 0x%02x!\n", reg);
+	return ret;
+}
+
+/* write a register */
+static int ov9650_reg_write(struct i2c_client *client, u8 reg, u8 val)
+{
+	int ret;
+	u8 _val;
+	unsigned char data[2] = { reg, val };
+	struct i2c_msg msg = {
+		.addr	= client->addr,
+		.flags	= 0,
+		.len	= 2,
+		.buf	= data,
+	};
+
+	ret = ls1x_xfer(client->adapter, &msg, 1);
+	//ret = i2c_transfer(client->adapter, &msg, 1);
+	if (ret < 0) {
+		dev_err(&client->dev, "Failed writing register 0x%02x!\n", reg);
+		return ret;
+	}
+
+	/* we have to read the register back ... no idea why, maybe HW bug */
+	ret = ov9650_reg_read(client, reg, &_val);
+	if (ret)
+		dev_err(&client->dev,
+			"Failed reading back register 0x%02x!\n", reg);
+
+	return 0;
+}
+
+
+/* Read a register, alter its bits, write it back */
+static int ov9650_reg_rmw(struct i2c_client *client, u8 reg, u8 set, u8 unset)
+{
+	u8 val;
+	int ret;
+
+	ret = ov9650_reg_read(client, reg, &val);
+	if (ret) {
+		dev_err(&client->dev,
+			"[Read]-Modify-Write of register %02x failed!\n", reg);
+		return val;
+	}
+
+	val |= set;
+	val &= ~unset;
+
+	ret = ov9650_reg_write(client, reg, val);
+	if (ret)
+		dev_err(&client->dev,
+			"Read-Modify-[Write] of register %02x failed!\n", reg);
+
+	return ret;
+}
+
+/* Soft reset the camera. This has nothing to do with the RESET pin! */
+static int ov9650_reset(struct i2c_client *client)
+{
+	int ret;
+
+	ret = ov9650_reg_write(client, OV9650_COM7, OV9650_COM7_SCCB_RESET);
+	if (ret)
+		dev_err(&client->dev,
+			"An error occurred while entering soft reset!\n");
+
+	return ret;
+}
+
+/* Start/Stop streaming from the device */
+static int ov9650_s_stream(struct v4l2_subdev *sd, int enable)
+{
+	return 0;
+}
+
+/* Alter bus settings on camera side */
+static int ov9650_set_bus_param(struct soc_camera_device *icd,
+				unsigned long flags)
+{
+	return 0;
+}
+
+/* Request bus settings on camera side */
+static unsigned long ov9650_query_bus_param(struct soc_camera_device *icd)
+{
+	struct soc_camera_link *icl = to_soc_camera_link(icd);
+
+	/*
+	 * REVISIT: the camera probably can do 10 bit transfers, but I don't
+	 *          have those pins connected on my hardware.
+	 */
+	unsigned long flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_MASTER |
+		SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_HIGH |
+		SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8;
+
+	return soc_camera_apply_sensor_flags(icl, flags);
+}
+
+/* Get status of additional camera capabilities */
+static int ov9650_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
+{
+	struct ov9650_priv *priv = to_ov9650_sensor(sd);
+
+	switch (ctrl->id) {
+	case V4L2_CID_VFLIP:
+		ctrl->value = priv->flag_vflip;
+		break;
+	case V4L2_CID_HFLIP:
+		ctrl->value = priv->flag_hflip;
+		break;
+	}
+	return 0;
+}
+
+/* Set status of additional camera capabilities */
+static int ov9650_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct ov9650_priv *priv = to_ov9650_sensor(sd);
+
+	int ret = 0;
+	printk("oooooooooooooooooooo ov9650_s_ctrl oooooooooooooooooooo\r\n");
+	switch (ctrl->id) {
+	case V4L2_CID_VFLIP:
+		priv->flag_vflip = ctrl->value;
+		if (ctrl->value)
+			ret = ov9650_reg_rmw(client, OV9650_MVFP,
+							OV9650_MVFP_V, 0);
+		else
+			ret = ov9650_reg_rmw(client, OV9650_MVFP,
+							0, OV9650_MVFP_V);
+		break;
+	case V4L2_CID_HFLIP:
+		priv->flag_hflip = ctrl->value;
+		if (ctrl->value)
+			ret = ov9650_reg_rmw(client, OV9650_MVFP,
+							OV9650_MVFP_H, 0);
+		else
+			ret = ov9650_reg_rmw(client, OV9650_MVFP,
+							0, OV9650_MVFP_H);
+		break;
+	}
+
+	return ret;
+}
+
+/* Get chip identification */
+static int ov9650_g_chip_ident(struct v4l2_subdev *sd,
+				struct v4l2_dbg_chip_ident *id)
+{
+	struct ov9650_priv *priv = to_ov9650_sensor(sd);
+
+	id->ident	= priv->model;
+	id->revision	= priv->revision;
+
+	return 0;
+}
+
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+static int ov9650_get_register(struct v4l2_subdev *sd,
+				struct v4l2_dbg_register *reg)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int ret;
+	u8 val;
+
+	if (reg->reg & ~0xff)
+		return -EINVAL;
+
+	reg->size = 1;
+
+	ret = ov9650_reg_read(client, reg->reg, &val);
+	if (ret)
+		return ret;
+
+	reg->val = (__u64)val;
+
+	return 0;
+}
+
+static int ov9650_set_register(struct v4l2_subdev *sd,
+				struct v4l2_dbg_register *reg)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+
+	if (reg->reg & ~0xff || reg->val & ~0xff)
+		return -EINVAL;
+
+	return ov9650_reg_write(client, reg->reg, reg->val);
+}
+#endif
+
+/* select nearest higher resolution for capture */
+static void ov9650_res_roundup(u32 *width, u32 *height)
+{
+	int i;
+	enum { QQCIF, QQVGA, QCIF, QVGA, CIF, VGA, SXGA };
+	int res_x[] = { 88, 160, 176, 320, 352, 640, 800, 1280 };
+	int res_y[] = { 72, 120, 144, 240, 288, 480, 480, 960 };
+
+	for (i = 0; i < ARRAY_SIZE(res_x); i++) {
+		if (res_x[i] >= *width && res_y[i] >= *height) {
+			*width = res_x[i];
+			*height = res_y[i];
+			return;
+		}
+	}
+
+	*width = res_x[SXGA];
+	*height = res_y[SXGA];
+}
+
+/* Prepare necessary register changes depending on color encoding */
+static void ov9650_alter_regs(enum v4l2_mbus_pixelcode code,
+			      struct ov9650_reg_alt *alt)
+{
+	switch (code) {
+	case V4L2_MBUS_FMT_UYVY8_2X8:
+		alt->com12	= OV9650_COM12_YUV_AVG;
+		alt->com13	= OV9650_COM13_Y_DELAY_EN |
+					OV9650_COM13_YUV_DLY(0x01);
+		break;
+	case V4L2_MBUS_FMT_YUYV8_2X8:
+		printk(" mbusf fmt yuyv 2x8 ...\r\n");
+		alt->com12	= OV9650_COM12_YUV_AVG;
+		alt->com13	= OV9650_COM13_Y_DELAY_EN |
+					OV9650_COM13_YUV_DLY(0x01);
+		break;
+	case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
+		alt->com7	= OV9650_COM7_RGB;
+		alt->com13	= OV9650_COM13_RGB_AVG;
+		alt->com15	= OV9650_COM15_RGB_555;
+		break;
+	case V4L2_MBUS_FMT_RGB565_2X8_LE:
+		alt->com7	= OV9650_COM7_RGB;
+//		alt->com13	= OV9650_COM13_RGB_AVG;   // no have this bit
+		alt->com15	= OV9650_COM15_RGB_565;
+		break;
+	default:
+		break;
+	};
+}
+
+/* Setup registers according to resolution and color encoding */
+static int ov9650_write_regs(struct i2c_client *client, u32 width,
+		enum v4l2_mbus_pixelcode code, struct ov9650_reg_alt *alts)
+{
+	const struct ov9650_reg	*ov9650_regs, *matrix_regs;
+	int			ov9650_regs_len, matrix_regs_len;
+	int			i, ret;
+	u8			val;
+
+	/* select register configuration for given resolution */
+	switch (width) {
+	case W_QQCIF:
+		ov9650_regs	= ov9650_regs_qqcif;
+		ov9650_regs_len	= ARRAY_SIZE(ov9650_regs_qqcif);
+		break;
+	case W_QQVGA:
+		ov9650_regs	= ov9650_regs_qqvga;
+		ov9650_regs_len	= ARRAY_SIZE(ov9650_regs_qqvga);
+		break;
+	case W_QCIF:
+		ov9650_regs	= ov9650_regs_qcif;
+		ov9650_regs_len	= ARRAY_SIZE(ov9650_regs_qcif);
+		break;
+	case W_QVGA:
+		ov9650_regs	= ov9650_regs_qvga;
+		ov9650_regs_len	= ARRAY_SIZE(ov9650_regs_qvga);
+		break;
+	case W_CIF:
+		ov9650_regs	= ov9650_regs_cif;
+		ov9650_regs_len	= ARRAY_SIZE(ov9650_regs_cif);
+		break;
+	case W_VGA:
+		ov9650_regs	= ov9650_regs_vga;
+		ov9650_regs_len	= ARRAY_SIZE(ov9650_regs_vga);
+		break;
+	case W_SXGA:
+		ov9650_regs	= ov9650_regs_sxga;
+		ov9650_regs_len	= ARRAY_SIZE(ov9650_regs_sxga);
+		break;
+	default:
+		dev_err(&client->dev, "Failed to select resolution!\n");
+		return -EINVAL;
+	}
+#if 1  //dbg-yg ov9650
+	/* select color matrix configuration for given color encoding */
+	if (code == V4L2_MBUS_FMT_UYVY8_2X8 || V4L2_MBUS_FMT_YUYV8_2X8) {
+		matrix_regs	= ov9650_regs_yuv;
+		matrix_regs_len	= ARRAY_SIZE(ov9650_regs_yuv);
+	} else {
+		matrix_regs	= ov9650_regs_rgb;
+		matrix_regs_len	= ARRAY_SIZE(ov9650_regs_rgb);
+	}
+	/* write register settings into the module */
+	for (i = 0; i < ov9650_regs_len; i++) {
+		val = ov9650_regs[i].val;
+
+		switch (ov9650_regs[i].reg) {
+		case OV9650_COM7:
+			val |= alts->com7;
+			break;
+		case OV9650_COM12:
+			val |= alts->com12;
+			break;
+		case OV9650_COM13:
+			val |= alts->com13;
+			break;
+		case OV9650_COM15:
+			val |= alts->com15;
+			break;
+		}
+		ret = ov9650_reg_write(client, ov9650_regs[i].reg, val);
+		if (ret)
+			return ret;
+
+#endif 
+	}
+	
+#if 1
+	/* write color matrix configuration into the module */
+	for (i = 0; i < matrix_regs_len; i++) {
+		ret = ov9650_reg_write(client, matrix_regs[i].reg,
+						matrix_regs[i].val);
+		if (ret)
+			return ret;
+	}
+#endif
+	return 0;
+}
+
+/* program default register values */
+static int ov9650_prog_dflt(struct i2c_client *client)
+{
+	int i, ret;
+
+//	printk("oooooooooooooooooooo ov9650_prog_dflt oooooooooooooooooooo\r\n");
+	for (i = 0; i < ARRAY_SIZE(ov9650_regs_dflt); i++) {
+		ret = ov9650_reg_write(client, ov9650_regs_dflt[i].reg,
+						ov9650_regs_dflt[i].val);
+		if (ret)
+			return ret;
+	}
+
+	/* wait for the changes to actually happen, 140ms are not enough yet */
+	mdelay(150);
+
+	return 0;
+}
+
+/* set the format we will capture in */
+static int ov9650_s_fmt(struct v4l2_subdev *sd,
+			struct v4l2_mbus_framefmt *mf)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct ov9650_reg_alt alts = {0};
+	enum v4l2_colorspace cspace;
+	enum v4l2_mbus_pixelcode code = mf->code;
+	int ret;
+
+//	printk("oooooooooooooooooooo ov9650_s_fmt  oooooooooooooooooooo\r\n");
+//	ov9650_res_roundup(&mf->width, &mf->height);
+//	ov9650_alter_regs(mf->code, &alts);
+
+//	ov9650_reset(client);
+
+	ret = ov9650_prog_dflt(client);  //write default data for ov9650
+	if (ret)
+		return ret;
+	switch (code) {
+	case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
+	case V4L2_MBUS_FMT_RGB565_2X8_LE:
+		cspace = V4L2_COLORSPACE_SRGB;
+		break;
+	case V4L2_MBUS_FMT_UYVY8_2X8:
+		cspace = V4L2_COLORSPACE_JPEG;
+		break;
+	case V4L2_MBUS_FMT_YUYV8_2X8:
+		cspace = V4L2_COLORSPACE_JPEG;
+		break;
+	default:
+		code = V4L2_MBUS_FMT_UYVY8_2X8;
+		cspace = V4L2_COLORSPACE_JPEG;
+		break;
+	}
+
+	ret = ov9650_write_regs(client, mf->width, code, &alts);  //dbg-yg ov9650
+	if (!ret) {
+		mf->code	= code;
+		mf->colorspace	= cspace;
+	}
+	return ret;
+}
+
+static int ov9650_try_fmt(struct v4l2_subdev *sd,
+			  struct v4l2_mbus_framefmt *mf)
+{
+	ov9650_res_roundup(&mf->width, &mf->height);
+
+	mf->field = V4L2_FIELD_NONE;
+	switch (mf->code) {
+	case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
+	case V4L2_MBUS_FMT_RGB565_2X8_LE:
+		mf->colorspace = V4L2_COLORSPACE_SRGB;
+		break;
+	case V4L2_MBUS_FMT_UYVY8_2X8:
+		mf->colorspace = V4L2_COLORSPACE_JPEG;
+		break;
+	case V4L2_MBUS_FMT_YUYV8_2X8:
+		mf->colorspace = V4L2_COLORSPACE_JPEG;
+		break;
+	default:
+	//	mf->code = V4L2_MBUS_FMT_UYVY8_2X8;
+		mf->colorspace = V4L2_COLORSPACE_JPEG;
+		break;
+
+	}
+
+	return 0;
+}
+
+static int ov9650_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
+			   enum v4l2_mbus_pixelcode *code)
+{
+	if (index >= ARRAY_SIZE(ov9650_codes))
+		return -EINVAL;
+
+	*code = ov9650_codes[index];
+	return 0;
+}
+
+static int ov9650_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
+{
+	a->c.left	= 0;
+	a->c.top	= 0;
+	a->c.width	= W_SXGA;
+	a->c.height	= H_SXGA;
+	a->type		= V4L2_BUF_TYPE_VIDEO_CAPTURE;
+
+	return 0;
+}
+
+static int ov9650_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
+{
+	a->bounds.left			= 0;
+	a->bounds.top			= 0;
+	a->bounds.width			= W_SXGA;
+	a->bounds.height		= H_SXGA;
+	a->defrect			= a->bounds;
+	a->type				= V4L2_BUF_TYPE_VIDEO_CAPTURE;
+	a->pixelaspect.numerator	= 1;
+	a->pixelaspect.denominator	= 1;
+
+	return 0;
+}
+
+
+
+static int ov9650_video_probe(struct soc_camera_device *icd,
+				struct i2c_client *client)
+{
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	struct ov9650_priv *priv = to_ov9650_sensor(sd);
+	u8		pid, ver, midh, midl;
+	const char	*devname;
+	int		ret = 0;
+
+	/*
+	 * We must have a parent by now. And it cannot be a wrong one.
+	 * So this entire test is completely redundant.
+	 */
+	if (!icd->dev.parent ||
+	    to_soc_camera_host(icd->dev.parent)->nr != icd->iface) {
+		dev_err(&client->dev, "Parent missing or invalid!\n");
+		ret = -ENODEV;
+		goto err;
+	}
+
+	/*
+	 * check and show product ID and manufacturer ID
+	 */
+
+	ret = ov9650_reg_read(client, OV9650_PID, &pid);
+	if (ret)
+		goto err;
+
+	printk(" CAMERA PID IS  :0x%x &&&&&&&&&&&&&&&&&&\r\n", pid);
+#if 1
+	ret = ov9650_reg_read(client, OV9650_VER, &ver);
+	if (ret)
+		goto err;
+
+	ret = ov9650_reg_read(client, OV9650_MIDH, &midh);
+	if (ret)
+		goto err;
+
+	ret = ov9650_reg_read(client, OV9650_MIDL, &midl);
+	if (ret)
+		goto err;
+#endif 
+	printk(" version:0x%x...\r\n", VERSION(pid, ver)); 
+	switch (VERSION(pid, ver)) {
+	case OV9650_V2:
+		devname		= "ov9650";
+		priv->model	= V4L2_IDENT_OV9650;
+		priv->revision	= 2;
+	case OV9650_V3:
+		devname		= "ov9650";
+		priv->model	= V4L2_IDENT_OV9650;
+		priv->revision	= 3;
+		break;
+	case OV9650_V4:
+		devname		= "OV9650";
+		priv->model	= V4L2_IDENT_OV9650;
+		priv->revision	= 4;
+		break;
+	default:
+		dev_err(&client->dev, "Product ID error %x:%x\n", pid, ver);
+		ret = -ENODEV;
+		goto err;
+	}
+
+	dev_info(&client->dev, "%s Product ID %0x:%0x Manufacturer ID %x:%x\n",
+		 devname, pid, ver, midh, midl);
+
+err:
+	return ret;
+}
+
+static struct soc_camera_ops ov9650_ops = {
+	.set_bus_param		= ov9650_set_bus_param,
+	.query_bus_param	= ov9650_query_bus_param,
+	.controls		= ov9650_controls,
+	.num_controls		= ARRAY_SIZE(ov9650_controls),
+};
+
+static struct v4l2_subdev_core_ops ov9650_core_ops = {
+	.g_ctrl			= ov9650_g_ctrl,
+	.s_ctrl			= ov9650_s_ctrl,
+	.g_chip_ident		= ov9650_g_chip_ident,
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+	.g_register		= ov9650_get_register,
+	.s_register		= ov9650_set_register,
+#endif
+
+};
+
+static struct v4l2_subdev_video_ops ov9650_video_ops = {
+	.s_stream	= ov9650_s_stream,
+	.s_mbus_fmt	= ov9650_s_fmt,
+	.try_mbus_fmt	= ov9650_try_fmt,
+	.enum_mbus_fmt	= ov9650_enum_fmt,
+	.cropcap	= ov9650_cropcap,
+	.g_crop		= ov9650_g_crop,
+
+};
+
+static struct v4l2_subdev_ops ov9650_subdev_ops = {
+	.core	= &ov9650_core_ops,
+	.video	= &ov9650_video_ops,
+};
+
+/*
+ * i2c_driver function
+ */
+static int ov9650_probe(struct i2c_client *client,
+			const struct i2c_device_id *did)
+{
+	struct ov9650_priv *priv;
+	struct soc_camera_device *icd	= client->dev.platform_data;
+	struct soc_camera_link *icl;
+	int ret;
+//	dump_stack();
+	if (!icd) {
+		dev_err(&client->dev, "Missing soc-camera data!\n");
+		return -EINVAL;
+	}
+
+	icl = to_soc_camera_link(icd);
+	if (!icl) {
+		dev_err(&client->dev, "Missing platform_data for driver\n");
+		return -EINVAL;
+	}
+
+	priv = kzalloc(sizeof(struct ov9650_priv), GFP_KERNEL);
+	if (!priv) {
+		dev_err(&client->dev,
+			"Failed to allocate memory for private data!\n");
+		return -ENOMEM;
+	}
+	
+	v4l2_i2c_subdev_init(&priv->subdev, client, &ov9650_subdev_ops);
+
+	icd->ops	= &ov9650_ops;
+
+	ret = ov9650_video_probe(icd, client);
+
+	if (ret) {
+		icd->ops = NULL;
+		kfree(priv);
+	}
+
+	return ret;
+}
+
+static int ov9650_remove(struct i2c_client *client)
+{
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	struct ov9650_priv *priv = to_ov9650_sensor(sd);
+
+	kfree(priv);
+	return 0;
+}
+
+static const struct i2c_device_id ov9650_id[] = {
+	{ "OV9650", 0 },
+	{ }
+};
+MODULE_DEVICE_TABLE(i2c, ov9650_id);
+
+static struct i2c_driver ov9650_i2c_driver = {
+	.driver = {
+		.name = "OV9650",
+	},
+	.probe    = ov9650_probe,
+	.remove   = ov9650_remove,
+	.id_table = ov9650_id,
+};
+
+static int __init ov9650_module_init(void)
+{
+	return i2c_add_driver(&ov9650_i2c_driver);
+}
+
+static void __exit ov9650_module_exit(void)
+{
+	i2c_del_driver(&ov9650_i2c_driver);
+}
+
+module_init(ov9650_module_init);
+module_exit(ov9650_module_exit);
+
+MODULE_DESCRIPTION("SoC Camera driver for OmniVision OV96xx");
+MODULE_AUTHOR("Marek Vasut <marek.vasut@gmail.com>");
+MODULE_LICENSE("GPL v2");
diff -uNra linux-3.0.82/drivers/media/video/ls1c-ov9650.h linux-3.0.82x/drivers/media/video/ls1c-ov9650.h
--- linux-3.0.82/drivers/media/video/ls1c-ov9650.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/ls1c-ov9650.h	2017-09-23 03:42:49.542676518 +0800
@@ -0,0 +1,210 @@
+/*
+ * OmniVision OV96xx Camera Header File
+ *
+ * Copyright (C) 2009 Marek Vasut <marek.vasut@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef	__DRIVERS_MEDIA_VIDEO_OV9650_H__
+#define	__DRIVERS_MEDIA_VIDEO_OV9650_H__
+
+/* Register definitions */
+#define	OV9650_GAIN	0x00
+#define	OV9650_BLUE	0x01
+#define	OV9650_RED	0x02
+#define	OV9650_VFER	0x03
+#define	OV9650_COM1	0x04
+#define	OV9650_BAVE	0x05
+#define	OV9650_GEAVE	0x06
+#define	OV9650_RSID	0x07
+#define	OV9650_RAVE	0x08
+#define	OV9650_COM2	0x09
+#define	OV9650_PID	0x0a
+#define	OV9650_VER	0x0b
+#define	OV9650_COM3	0x0c
+#define	OV9650_COM4	0x0d
+#define	OV9650_COM5	0x0e
+#define	OV9650_COM6	0x0f
+#define	OV9650_AECH	0x10
+#define	OV9650_CLKRC	0x11
+#define	OV9650_COM7	0x12
+#define	OV9650_COM8	0x13
+#define	OV9650_COM9	0x14
+#define	OV9650_COM10	0x15
+/* 0x16 - RESERVED */
+#define	OV9650_HSTART	0x17
+#define	OV9650_HSTOP	0x18
+#define	OV9650_VSTART	0x19
+#define	OV9650_VSTOP	0x1a
+#define	OV9650_PSHFT	0x1b
+#define	OV9650_MIDH	0x1c
+#define	OV9650_MIDL	0x1d
+#define	OV9650_MVFP	0x1e
+#define	OV9650_LAEC	0x1f
+#define	OV9650_BOS	0x20
+#define	OV9650_GBOS	0x21
+#define	OV9650_GROS	0x22
+#define	OV9650_ROS	0x23
+#define	OV9650_AEW	0x24
+#define	OV9650_AEB	0x25
+#define	OV9650_VPT	0x26
+#define	OV9650_BBIAS	0x27
+#define	OV9650_GBBIAS	0x28
+/* 0x29 - RESERVED */
+#define	OV9650_EXHCH	0x2a
+#define	OV9650_EXHCL	0x2b
+#define	OV9650_RBIAS	0x2c
+#define	OV9650_ADVFL	0x2d
+#define	OV9650_ADVFH	0x2e
+#define	OV9650_YAVE	0x2f
+#define	OV9650_HSYST	0x30
+#define	OV9650_HSYEN	0x31
+#define	OV9650_HREF	0x32
+#define	OV9650_CHLF	0x33
+#define	OV9650_ARBLM	0x34
+/* 0x35..0x36 - RESERVED */
+#define	OV9650_ADC	0x37
+#define	OV9650_ACOM	0x38
+#define	OV9650_OFON	0x39
+#define	OV9650_TSLB	0x3a
+#define	OV9650_COM11	0x3b
+#define	OV9650_COM12	0x3c
+#define	OV9650_COM13	0x3d
+#define	OV9650_COM14	0x3e
+#define	OV9650_EDGE	0x3f
+#define	OV9650_COM15	0x40
+#define	OV9650_COM16	0x41
+#define	OV9650_COM17	0x42
+/* 0x43..0x4e - RESERVED */
+#define	OV9650_MTX1	0x4f
+#define	OV9650_MTX2	0x50
+#define	OV9650_MTX3	0x51
+#define	OV9650_MTX4	0x52
+#define	OV9650_MTX5	0x53
+#define	OV9650_MTX6	0x54
+#define	OV9650_MTX7	0x55
+#define	OV9650_MTX8	0x56
+#define	OV9650_MTX9	0x57
+#define	OV9650_MTXS	0x58
+/* 0x59..0x61 - RESERVED */
+#define	OV9650_LCC1	0x62
+#define	OV9650_LCC2	0x63
+#define	OV9650_LCC3	0x64
+#define	OV9650_LCC4	0x65
+#define	OV9650_LCC5	0x66
+#define	OV9650_MANU	0x67
+#define	OV9650_MANV	0x68
+#define	OV9650_HV	0x69
+#define	OV9650_MBD	0x6a
+#define	OV9650_DBLV	0x6b
+#define	OV9650_GSP	0x6c	/* ... till 0x7b */
+#define	OV9650_GST	0x7c	/* ... till 0x8a */
+
+#define	OV9650_CLKRC_DPLL_EN	0x80
+#define	OV9650_CLKRC_DIRECT	0x40
+#define	OV9650_CLKRC_DIV(x)	((x) & 0x3f)
+
+#define	OV9650_PSHFT_VAL(x)	((x) & 0xff)
+
+#define	OV9650_ACOM_2X_ANALOG	0x80
+#define	OV9650_ACOM_RSVD	0x12
+
+#define	OV9650_MVFP_V		0x10
+#define	OV9650_MVFP_H		0x20
+
+#define	OV9650_COM1_HREF_NOSKIP	0x00
+#define	OV9650_COM1_HREF_2SKIP	0x04
+#define	OV9650_COM1_HREF_3SKIP	0x08
+#define	OV9650_COM1_QQFMT	0x20
+
+#define	OV9650_COM2_SSM		0x10
+
+#define	OV9650_COM3_VP		0x04
+
+#define	OV9650_COM4_QQ_VP	0x80
+#define	OV9650_COM4_RSVD	0x40
+
+#define	OV9650_COM5_SYSCLK	0x80
+#define	OV9650_COM5_LONGEXP	0x01
+
+#define	OV9650_COM6_OPT_BLC	0x40
+#define	OV9650_COM6_ADBLC_BIAS	0x08
+#define	OV9650_COM6_FMT_RST	0x82
+#define	OV9650_COM6_ADBLC_OPTEN	0x01
+
+#define	OV9650_COM7_RAW_RGB	0x01
+#define	OV9650_COM7_RGB		0x04
+#define	OV9650_COM7_QCIF	0x08
+#define	OV9650_COM7_QVGA	0x10
+#define	OV9650_COM7_CIF		0x20
+#define	OV9650_COM7_VGA		0x40
+#define	OV9650_COM7_SCCB_RESET	0x80
+
+#define	OV9650_TSLB_YVYU_YUYV	0x04
+#define	OV9650_TSLB_YUYV_UYVY	0x08
+
+#define	OV9650_COM12_YUV_AVG	0x04
+#define	OV9650_COM12_RSVD	0x40
+
+#define	OV9650_COM13_GAMMA_NONE	0x00
+#define	OV9650_COM13_GAMMA_Y	0x40
+#define	OV9650_COM13_GAMMA_RAW	0x80
+#define	OV9650_COM13_RGB_AVG	0x20
+#define	OV9650_COM13_MATRIX_EN	0x10
+#define	OV9650_COM13_Y_DELAY_EN	0x08
+#define	OV9650_COM13_YUV_DLY(x)	((x) & 0x07)
+
+#define	OV9650_COM15_OR_00FF	0x00
+#define	OV9650_COM15_OR_01FE	0x40
+#define	OV9650_COM15_OR_10F0	0xc0
+#define	OV9650_COM15_RGB_NORM	0x00
+#define	OV9650_COM15_RGB_565	0x10
+#define	OV9650_COM15_RGB_555	0x30
+
+#define	OV9650_COM16_RB_AVG	0x01
+
+/* IDs */
+#define	OV9650_V2		0x9648
+#define	OV9650_V3		0x9649
+#define	OV9650_V4		0x9652
+#define	VERSION(pid, ver)	(((pid) << 8) | ((ver) & 0xFF))
+
+/* supported resolutions */
+enum {
+	W_QQCIF	= 88,
+	W_QQVGA	= 160,
+	W_QCIF	= 176,
+	W_QVGA	= 320,
+	W_CIF	= 352,
+	W_VGA	= 640,
+	W_SXGA	= 1280
+};
+#define	H_SXGA	960
+
+/* Misc. structures */
+struct ov9650_reg_alt {
+	u8	com7;
+	u8	com12;
+	u8	com13;
+	u8	com15;
+};
+
+struct ov9650_reg {
+	u8	reg;
+	u8	val;
+};
+
+struct ov9650_priv {
+	struct v4l2_subdev		subdev;
+
+	int				model;
+	int				revision;
+
+	bool				flag_vflip;
+	bool				flag_hflip;
+};
+
+#endif	/* __DRIVERS_MEDIA_VIDEO_OV9650_H__ */
diff -uNra linux-3.0.82/drivers/media/video/ls1c_s5k5ca_640x480_rgb.c linux-3.0.82x/drivers/media/video/ls1c_s5k5ca_640x480_rgb.c
--- linux-3.0.82/drivers/media/video/ls1c_s5k5ca_640x480_rgb.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/ls1c_s5k5ca_640x480_rgb.c	2017-09-23 03:42:49.542676518 +0800
@@ -0,0 +1,1910 @@
+/*
+ *  Copyright (C) 2004 Samsung Electronics
+ *             SW.LEE <hitchcar@samsung.com>
+ *            - based on Russell King : pcf8583.c
+ * 	      - added  smdk24a0, smdk2440
+ *            - added  poseidon (s3c24a0+wavecom)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Driver for FIMC2.x Camera Decoder
+ *
+ */
+
+#include <linux/module.h>    
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+#include <linux/string.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-subdev.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/clk.h>
+#include <media/soc_camera.h>
+#include <media/soc_mediabus.h>
+#include "s3c_camif.h"
+#include "s5k5ca.h"                               
+#include <linux/proc_fs.h>
+
+/* Camera functional setting values configured by user concept */
+struct s5k5ca_userset {
+	signed int exposure_bias;	/* V4L2_CID_EXPOSURE */
+	unsigned int ae_lock;
+	unsigned int awb_lock;
+	unsigned int auto_wb;	/* V4L2_CID_AUTO_WHITE_BALANCE */
+	unsigned int manual_wb;	/* V4L2_CID_WHITE_BALANCE_PRESET */
+	unsigned int wb_temp;	/* V4L2_CID_WHITE_BALANCE_TEMPERATURE */
+	unsigned int effect;	/* Color FX (AKA Color tone) */
+	unsigned int contrast;	/* V4L2_CID_CONTRAST */
+	unsigned int saturation;	/* V4L2_CID_SATURATION */
+	unsigned int sharpness;		/* V4L2_CID_SHARPNESS */
+	unsigned int glamour;
+};
+
+struct s5k5ca_platform_data {
+	unsigned int default_width;
+	unsigned int default_height;
+	unsigned int pixelformat;
+	int freq;	/* MCLK in KHz */
+
+	/* This SoC supports Parallel & CSI-2 */
+	int is_mipi;
+};
+
+struct s5k5ca_state {
+	struct s5k5ca_platform_data *pdata;
+	struct v4l2_subdev sd;
+	struct v4l2_pix_format pix;
+	struct v4l2_fract timeperframe;
+	struct s5k5ca_userset userset;
+	int freq;	/* MCLK in KHz */
+	int is_mipi;
+	int isize;
+	int ver;
+	int fps;
+};
+
+// function define
+//#define CONFIG_LOAD_FILE     
+#define S5K5CA_PROC_NAME	"s5k5ca"       
+#define I2C_BURST_MODE //dha23 100325 Ä«¸Þ¶ó ±âµ¿ ½Ã°£ ÁÙÀÌ±â À§ÇØ I2C Burst mode »ç¿ë.
+// Purpose of verifying I2C operaion. must be ignored later.    
+//#define LOCAL_CONFIG_S5K5CA_I2C_TEST
+static struct i2c_client * s_i2c_client = NULL;
+static struct i2c_driver s5k5ca_driver;
+int set_af_after_capture = 0; //dha23 100518
+static struct proc_dir_entry * s_proc = NULL;
+
+static void s5k5ca_sensor_gpio_init(void);
+void s5k5ca_sensor_enable(void);
+static void s5k5ca_sensor_disable(void);
+
+static int s5k5ca_sensor_init(void);
+static void s5k5ca_sensor_exit(void);
+
+static int s5k5ca_sensor_change_size(struct i2c_client *client, int size);
+
+
+/* #define S5K5CA_ID	0x78 */
+#define S5K5CA_ID	0x78 
+static unsigned short s5k5ca_normal_i2c[] = { (S5K5CA_ID >> 1), I2C_CLIENT_END };
+static unsigned short s5k5ca_ignore[] = { I2C_CLIENT_END };
+static unsigned short s5k5ca_probe[] = { I2C_CLIENT_END };
+
+static int previous_scene_mode = -1;
+static int previous_WB_mode = 0;
+static int af_mode = -1;
+static unsigned short lux_value = 0;
+int cam_flash_on = 0; //insook0804
+int locked_ae_awb = 0; //insook0901
+
+bool isS5k5caEnabled = false; 
+
+static unsigned short AFPosition = 0x0000; 
+static unsigned short DummyAFPosition = 0x0001; 
+
+static int s5k5ca_sensor_read(struct i2c_client *client,
+		unsigned short subaddr, unsigned short *data)
+{
+	int ret;
+	unsigned char buf[2];
+	struct i2c_msg msg = { client->addr, 0, 2, buf };
+	
+	buf[0] = (subaddr >> 8);
+	buf[1] = (subaddr & 0xFF);
+
+	ret = i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;
+	if (ret == -EIO) 
+		goto error;
+
+	msg.flags = I2C_M_RD;
+	
+	ret = i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;
+	if (ret == -EIO) 
+		goto error;
+
+	*data = ((buf[0] << 8) | buf[1]);
+
+error:
+	return ret;
+}
+
+static int s5k5ca_sensor_write(struct i2c_client *client,unsigned short subaddr, unsigned short val)
+{
+	//printk("   s5k5ca_sensor_write   (%x)\n", val);
+
+	if(subaddr == 0xdddd)
+	{
+			msleep(val);
+			printk("delay time(%d msec)\n", val);
+	}	
+	else
+	{					
+		unsigned char buf[4];
+		struct i2c_msg msg = { client->addr, 0, 4, buf };
+
+		buf[0] = (subaddr >> 8);
+		buf[1] = (subaddr & 0xFF);
+		buf[2] = (val >> 8);
+		buf[3] = (val & 0xFF);
+
+//		return i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;
+  if(i2c_transfer(client->adapter, &msg, 1) == 1)
+     return 0;
+  else{
+     printk("[**ASWOOGI**] s5k5ca_sensor_write_list error\n"); 
+     return -EIO;
+  }
+	}
+}
+
+static int s5k5ca_sensor_write_list(struct i2c_client *client, struct samsung_short_t *list,char *name)
+{
+	int i, ret;
+	ret = 0;
+#ifdef CONFIG_LOAD_FILE 
+	s5k5ca_regs_table_write(name);	
+#else
+	for (i = 0; list[i].subaddr != 0xffff; i++)
+	{
+		if(s5k5ca_sensor_write(client, list[i].subaddr, list[i].value) < 0){
+                	printk("[**ASWOOGI**] s5k5ca_sensor_write_list error\n"); 
+            			return -1;
+                }
+	}
+#endif
+	return ret;
+}
+
+#ifdef I2C_BURST_MODE //dha23 100325
+
+#define BURST_MODE_SET			1
+#define BURST_MODE_END			2
+#define NORMAL_MODE_SET			3
+#define MAX_INDEX				1000
+static int s5k5ca_sensor_burst_write_list(struct i2c_client *client, struct samsung_short_t *list,char *name)
+{
+	__u8 temp_buf[MAX_INDEX];
+	int index_overflow = 1;
+	int new_addr_start = 0;
+	int burst_mode = NORMAL_MODE_SET;
+	unsigned short pre_subaddr = 0;
+	struct i2c_msg msg = { client->addr, 0, 4, temp_buf };
+	int i=0, ret=0;
+	unsigned int index = 0;
+	
+	printk("s5k5ca_sensor_burst_write_list( %s ) \n", name); 
+	//printk("[PGH] on write func s5k5ca_client->addr : %x\n", client->addr); //reduced startup time.     
+    
+#ifdef CONFIG_LOAD_FILE 
+	s5k5ca_regs_table_write(name);	
+#else
+	for (i = 0; list[i].subaddr != 0xffff; i++)
+	{
+		if(list[i].subaddr == 0xdddd)
+		{
+                        msleep(list[i].value);
+			printk("delay 0x%04x, value 0x%04x\n", list[i].subaddr, list[i].value);
+		}	
+		else
+		{			
+		//	printk("--------write i2c reg------\n");		
+			if( list[i].subaddr == list[i+1].subaddr )
+			{
+				burst_mode = BURST_MODE_SET;
+				if((list[i].subaddr != pre_subaddr) || (index_overflow == 1))
+				{
+					new_addr_start = 1;
+					index_overflow = 0;
+				}
+			}
+			else
+			{
+				if(burst_mode == BURST_MODE_SET)
+				{
+					burst_mode = BURST_MODE_END;
+					if(index_overflow == 1)
+					{
+						new_addr_start = 1;
+						index_overflow = 0;
+					}
+				}
+				else
+				{
+					burst_mode = NORMAL_MODE_SET;
+				}
+			}
+
+			if((burst_mode == BURST_MODE_SET) || (burst_mode == BURST_MODE_END))
+			{
+				if(new_addr_start == 1)
+				{
+					index = 0;
+					memset(temp_buf, 0x00 ,1000);
+					index_overflow = 0;
+
+					temp_buf[index] = (list[i].subaddr >> 8);
+					temp_buf[++index] = (list[i].subaddr & 0xFF);
+
+					new_addr_start = 0;
+				}
+				
+				temp_buf[++index] = (list[i].value >> 8);
+				temp_buf[++index] = (list[i].value & 0xFF);
+				
+				if(burst_mode == BURST_MODE_END)
+				{
+					msg.len = ++index;
+
+					ret = i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;
+					if( ret < 0)
+					{
+						printk("i2c_transfer fail ! \n");
+						return -1;
+					}
+				}
+				else if( index >= MAX_INDEX-1 )
+				{
+					index_overflow = 1;
+					msg.len = ++index;
+					
+					ret = i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;
+					if( ret < 0)
+					{
+						printk("I2C_transfer Fail ! \n");
+						return -1;
+					}
+				}
+				
+			}
+			else
+			{
+				memset(temp_buf, 0x00 ,4);
+			
+				temp_buf[0] = (list[i].subaddr >> 8);
+				temp_buf[1] = (list[i].subaddr & 0xFF);
+				temp_buf[2] = (list[i].value >> 8);
+				temp_buf[3] = (list[i].value & 0xFF);
+
+				msg.len = 4;
+				ret = i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;
+				if( ret < 0)
+				{
+					printk("I2C_transfer Fail ! \n");
+					return -1;
+				}
+			}
+		}
+		
+		pre_subaddr = list[i].subaddr;
+	}
+#endif
+	return ret;
+}
+#endif
+
+
+static int s5k5ca_sensor_ae_awb_lock(struct i2c_client *client)
+{
+    printk("s5k5ca_sensor_ae_awb_lock");
+    
+    s5k5ca_sensor_write(client, 0xFCFC, 0xD000);
+    s5k5ca_sensor_write(client, 0x0028, 0x7000);
+    s5k5ca_sensor_write(client, 0x002A, 0x2466);
+    s5k5ca_sensor_write(client, 0x0F12, 0x0000);
+}
+
+static int s5k5ca_sensor_ae_awb_unlock(struct i2c_client *client)
+{
+	printk("s5k5ca_sensor_ae_awb_unlock");
+
+        s5k5ca_sensor_write(client, 0xFCFC, 0xD000);
+        s5k5ca_sensor_write(client, 0x0028, 0x7000);
+        s5k5ca_sensor_write(client, 0x002A, 0x2466);
+        s5k5ca_sensor_write(client, 0x0F12, 0x0001);	
+}
+
+static void s5k5ca_sensor_get_id(struct i2c_client *client)
+{
+	unsigned short id = 0;
+
+	s5k5ca_sensor_write(client, 0x002C, 0x0000);
+	s5k5ca_sensor_write(client, 0x002E, 0x0040);
+	s5k5ca_sensor_read(client, 0x0F12, &id);
+	printk("Sensor ID(0x%04x) is %s!\n", id, (id == 0x05CA) ? "Valid" : "Invalid"); 
+}
+
+
+#if defined(CONFIG_LDO_LP8720)
+extern void	s5k5ca_sensor_power_init(void);	
+#endif
+
+void s5k5ca_sensor_enable(void)
+{
+  int test_value =0;
+	printk("[**ASWOOGI**] s5k5ca_sensor_enable\n"); 
+
+	//s5k5ca_sensor_gpio_init();
+
+	/* > 0 ms */
+	msleep(1);
+	msleep(5);
+
+	isS5k5caEnabled = true;
+}
+
+static void s5k5ca_sensor_disable(void)
+{
+        printk("[**ASWOOGI**] s5k5ca_sensor_disable\n");	
+
+	if(isS5k5caEnabled != true)
+	{
+		printk("[**ASWOOGI**] s5k5ca is not enabled.. return!!\n");
+		return;
+	}
+        else
+        {
+            printk("[**ASWOOGI**] s5k5ca is enabled!!\n");
+        }	
+
+         msleep(1);
+
+	/* > 0 ms */
+	msleep(1);
+
+//	AF_PWR_DIS;
+
+	//CAM_PWR_DIS;
+
+	 isS5k5caEnabled = false;
+}
+
+static int sensor_init(struct i2c_client *client)
+{
+	int i, size;
+	int ret = 0;
+
+	printk("[**ASWOOGI**] sensor_init\n"); 
+
+#ifdef I2C_BURST_MODE //dha23 100325	
+	if(s5k5ca_sensor_burst_write_list(client,s5k5ca_init_00,"s5k5ca_init_00") < 0)
+		return -1;
+#else
+	if(s5k5ca_sensor_write_list(client,s5k5ca_init0,"s5k5ca_init0") < 0)
+		return -1;
+
+	msleep(100);	
+
+	if(s5k5ca_sensor_write_list(client,s5k5ca_init1,"s5k5ca_init1") < 0)
+		return -1;
+#endif
+
+	msleep(10);	
+	af_mode = -1;
+
+	/* Check Sensor ID */
+	s5k5ca_sensor_get_id(client);
+	return 0;
+}
+
+static int s5k5ca_sensor_mode_set(struct i2c_client *client, int type)
+{
+	int i, size;
+	unsigned short light;
+	int delay = 0;
+
+	printk("[**ASWOOGI**] s5k5ca_sensor_mode_set\n"); 
+
+	if (type & SENSOR_PREVIEW)
+	{	
+		printk("-> Preview ");
+#ifdef I2C_BURST_MODE //dha23 100325				
+		s5k5ca_sensor_burst_write_list(client,s5k5ca_preview_00,"s5k5ca_preview_00");
+#else
+		s5k5ca_sensor_write_list(client,s5k5ca_preview_00,"s5k5ca_preview_00");
+#endif
+	}
+	else if (type & SENSOR_CAPTURE)
+        {	
+		printk("-> Capture ");
+#if 0
+                s5k5ca_sensor_write_list(client,s5k5ca_capture_normal_normal_00,"s5k5ca_capture_normal_normal_00");
+
+#else
+
+		s5k5ca_sensor_write(client, 0xFCFC, 0xD000);
+		s5k5ca_sensor_write(client, 0x002C, 0x7000);	
+		s5k5ca_sensor_write(client, 0x002E, 0x2448);
+		s5k5ca_sensor_read(client, 0x0F12, &light);
+		lux_value = light;
+
+                if (previous_scene_mode == 6) /* fireworks use own capture routine */
+                {
+                    printk("Snapshot : firework capture\n");
+//                delay = s5k4ca_delay_firework_capture;
+    
+                    s5k5ca_sensor_write_list(client,s5k5ca_snapshot_fireworks_00,"s5k5ca_snapshot_fireworks_00");
+                }
+                else
+                {
+                    if (light <= 0x32) /* Low light */
+                    {	
+                
+                        printk("Snapshot : Low Light\n");
+//                    delay = s5k4ca_delay_normal_low_capture;
+                    
+                        if(previous_scene_mode == 3) 
+                        {
+                            printk("Snapshot : Night Mode\n");
+                        
+                            s5k5ca_sensor_write_list(client,s5k5ca_snapshot_nightmode_00,"s5k5ca_snapshot_nightmode_00");
+                        }
+                        else
+                        {
+                            printk("Snapshot : Normal mode \n");
+                            
+                            s5k5ca_sensor_write_list(client,s5k5ca_snapshot_normal_low_00,"s5k5ca_snapshot_normal_low_00");
+                        }
+                
+                    }
+                
+                    else
+                    {
+                            printk("Snapshot : Normal Normal Light\n");
+//                          delay = s5k4ca_delay_normal_normal_capture;//300;
+                          s5k5ca_sensor_write_list(client,s5k5ca_capture_normal_normal_00,"s5k5ca_capture_normal_normal_00");
+                    }
+	    }
+#endif                
+            	s5k5ca_sensor_ae_awb_unlock(client);
+	}	
+        else if (type & SENSOR_FLASH_CAP_LOW)
+	{	
+		printk("flash Normal Low Light Capture\n");
+  		delay = 300;
+		s5k5ca_sensor_write_list(client,s5k5ca_flashcapture_low_00,"s5k5ca_flashcapture_low_00");          
+		printk("delay time(%d msec)\n", delay);	
+		//s5k5ca_sensor_ae_awb_unlock(client);	
+	}
+	else if (type & SENSOR_FLASH_CAPTURE)       
+	{	
+		printk("flash Normal Normal Light Capture\n");
+		delay = 300;
+		s5k5ca_sensor_write_list(client,s5k5ca_flashcapture_00,"s5k5ca_flashcapture_00");        
+		printk("delay time(%d msec)\n", delay);
+		//s5k5ca_sensor_ae_awb_unlock(client);		
+	}
+	else if (type & SENSOR_CAMCORDER )
+	{
+		printk("Record\n");
+			
+		s5k5ca_sensor_write(client, 0xFCFC, 0xD000); 
+                s5k5ca_sensor_write(client, 0x0028, 0x7000); 
+
+                s5k5ca_sensor_write(client, 0x002A, 0x030E);  
+                s5k5ca_sensor_write(client, 0x0F12, 0x00DF);  //030E = 00FF ÀÔ·ÂÀ§ÇØ ´Ù¸¥°ª ÀÓ½ÃÀÔ·Â
+
+                s5k5ca_sensor_write(client, 0x002A, 0x030C); 
+                s5k5ca_sensor_write(client, 0x0F12, 0x0000); // AF Manual 
+
+                msleep(130); //AF Manual ¸í·É ÀÎ½ÄÀ§ÇÑ 1frame delay (ÀúÁ¶µµ 7.5fps 133ms °í·Á)
+                             //¿©±â±îÁö lens ¿òÁ÷ÀÓ ¾øÀ½
+                s5k5ca_sensor_write(client, 0x002A, 0x030E);  
+                s5k5ca_sensor_write(client, 0x0F12, 0x00E0);  // 030E = 00FF ÀÔ·Â. lens ¿òÁ÷ÀÓ 
+                 
+                msleep(50);  //lens°¡ ¸ñÇ¥ÁöÁ¡±îÁö µµ´ÞÇÏ±â À§ÇØ ÇÊ¿äÇÑ delay
+        
+		delay = 300;
+   
+		//s5k5ca_sensor_write_list(client,s5k5ca_fps_15fix_00,"s5k5ca_fps_15fix_00");
+	}
+
+	msleep(delay);
+
+	return 0;
+}
+
+static int s5k5ca_sensor_change_size(struct i2c_client *client, int size)
+{
+	return 0;
+	printk("s5k5ca_sensor_change_size");
+
+	switch (size) {
+		case SENSOR_XGA:
+			s5k5ca_sensor_mode_set(client, SENSOR_PREVIEW);
+			break;
+
+		case SENSOR_QXGA:
+			s5k5ca_sensor_mode_set(client, SENSOR_CAPTURE);
+			break;
+	
+		case SENSOR_VGA:
+			s5k5ca_sensor_write(client, 0xFCFC, 0xD000);    
+    			s5k5ca_sensor_write(client, 0x0028, 0x7000);
+
+      			s5k5ca_sensor_write(client, 0x002A, 0x026c);  
+      			s5k5ca_sensor_write(client, 0x0F12, 0x0280);
+			
+      			s5k5ca_sensor_write(client, 0x002A, 0x026e);    
+      			s5k5ca_sensor_write(client, 0x0F12, 0x01e0); 
+			break;			
+	
+		default:
+			printk("Unknown Size! (Only XGA & QXGA)\n");
+			break;
+	}
+
+	return 0;
+}
+
+static int s5k5ca_sensor_af_control(struct i2c_client *client, int type)
+{
+
+    int count = 50;
+    int tmpVal = 0;   
+    int tmpVal2 = 0;   
+    int ret = 0;
+    int size = 0;
+    int i = 0;
+    int z = 0;
+    unsigned short light = 0;
+
+	printk("s5k5ca_sensor_af_control");
+
+    switch (type)
+    {
+        case 0: // release
+            printk("[CAM-SENSOR] Focus Mode -> release\n"); 
+
+	    if( locked_ae_awb )
+	   {    
+              s5k5ca_sensor_ae_awb_unlock(client); // unlock AWB/AE
+              locked_ae_awb = 0;
+            }
+            //af move to initial position.
+
+            s5k5ca_sensor_write(client, 0xFCFC, 0xD000);    
+            s5k5ca_sensor_write(client, 0x0028, 0x7000);
+
+            s5k5ca_sensor_write(client, 0x002A, 0x0254);  
+            s5k5ca_sensor_write(client, 0x0F12, DummyAFPosition); // dummy lens position
+			
+            s5k5ca_sensor_write(client, 0x002A, 0x0252);    
+            s5k5ca_sensor_write(client, 0x0F12, 0x0004); // AF manual
+            
+            msleep(130);
+
+            s5k5ca_sensor_write(client, 0x002A, 0x0254);
+            s5k5ca_sensor_write(client, 0x0F12, AFPosition); // move lens to initial position
+
+            msleep(50);
+
+            break;
+
+        case 1: // AF start
+	    printk("Focus Mode -> Single\n");
+
+	    if( locked_ae_awb )
+	   {    
+              s5k5ca_sensor_ae_awb_unlock(client); // unlock AWB/AE
+              locked_ae_awb = 0;
+              msleep(200);
+            }
+
+            s5k5ca_sensor_write(client, 0xFCFC, 0xD000);
+            s5k5ca_sensor_write(client, 0x002C, 0x7000);	
+            s5k5ca_sensor_write(client, 0x002E, 0x2448);
+            s5k5ca_sensor_read(client, 0x0F12, &light);
+            lux_value = light;
+
+          
+            if (light < 0x32) /* Low light AF */ // NB ±âÁØ°ª 250
+            {
+            	s5k5ca_sensor_burst_write_list(client,s5k5ca_af_low_lux_val,"s5k5ca_af_low_lux_val"); //dha23 100331
+            	printk("[CAM-SENSOR] =Low Light AF Single light=0x%05x\n", light);
+            }
+            else
+            {
+            	s5k5ca_sensor_burst_write_list(client,s5k5ca_af_normal_lux_val,"s5k5ca_af_normal_lux_val"); //dha23 100331
+            	printk("[CAM-SENSOR] =Normal Light AF Single light=0x%05x\n", light);
+            }
+
+
+            s5k5ca_sensor_write(client, 0xFCFC, 0xD000); 
+            s5k5ca_sensor_write(client, 0x0028, 0x7000); 
+
+            s5k5ca_sensor_write(client, 0x002A, 0x0252);
+            s5k5ca_sensor_write(client, 0x0F12, 0x0005); // AF Single 
+            
+            msleep(260); // delay 2 frames before af status check
+
+           if( cam_flash_on )
+           {
+           	printk("AE/AWB is not locked for flash!!! \n");    
+           }
+           else
+           {
+               s5k5ca_sensor_ae_awb_lock(client); // lock AWB/AE //insook0804     
+               locked_ae_awb = 1;
+            }
+            
+            do // remove low light check
+            {
+                if( count == 0)
+                    break;
+
+                s5k5ca_sensor_write(client, 0xFCFC, 0xD000);
+                s5k5ca_sensor_write(client, 0x002C, 0x7000);    
+                s5k5ca_sensor_write(client, 0x002E, 0x26FE);
+                msleep(100);
+                s5k5ca_sensor_read(client, 0x0F12, &tmpVal); 
+
+                count--;
+
+                printk("CAM 3M AF Status Value = %x \n", tmpVal); 
+
+            }
+            while( (tmpVal & 0x3) != 0x2 && (tmpVal & 0x3) != 0x3 );  // 2= success   3= fail
+
+            if(count == 0) // af timeout : move lens to initial position
+            {
+                s5k5ca_sensor_write(client, 0xFCFC, 0xD000); 
+                s5k5ca_sensor_write(client, 0x0028, 0x7000); 
+                
+                s5k5ca_sensor_write(client, 0x002A, 0x0254);  
+                s5k5ca_sensor_write(client, 0x0F12, DummyAFPosition);  //030E = 00FF ÀÔ·ÂÀ§ÇØ ´Ù¸¥°ª ÀÓ½ÃÀÔ·Â
+                
+                s5k5ca_sensor_write(client, 0x002A, 0x0252); 
+                s5k5ca_sensor_write(client, 0x0F12, 0x0004); // AF Manual 
+                
+                msleep(130); //AF Manual ¸í·É ÀÎ½ÄÀ§ÇÑ 1frame delay (ÀúÁ¶µµ 7.5fps 133ms °í·Á)
+                             //¿©±â±îÁö lens ¿òÁ÷ÀÓ ¾øÀ½
+                s5k5ca_sensor_write(client, 0x002A, 0x0254);  
+                s5k5ca_sensor_write(client, 0x0F12, AFPosition);  // 030E = 00FF ÀÔ·Â. lens ¿òÁ÷ÀÓ 
+                
+                msleep(50);  //lens°¡ ¸ñÇ¥ÁöÁ¡±îÁö µµ´ÞÇÏ±â À§ÇØ ÇÊ¿äÇÑ delay
+                	
+                ret = 0;
+                printk("CAM 3M AF_Single Mode Fail.==> TIMEOUT \n");
+                
+            }
+     
+
+            if((tmpVal & 0x3) == 0x03) // af fail : move lens to initial position
+            {
+                s5k5ca_sensor_write(client, 0xFCFC, 0xD000); 
+                s5k5ca_sensor_write(client, 0x0028, 0x7000); 
+                
+                s5k5ca_sensor_write(client, 0x002A, 0x0254);  
+                s5k5ca_sensor_write(client, 0x0F12, DummyAFPosition);  //030E = 00FF ÀÔ·ÂÀ§ÇØ ´Ù¸¥°ª ÀÓ½ÃÀÔ·Â
+                
+                s5k5ca_sensor_write(client, 0x002A, 0x0252); 
+                s5k5ca_sensor_write(client, 0x0F12, 0x0004); // AF Manual 
+                
+                msleep(130); //AF Manual ¸í·É ÀÎ½ÄÀ§ÇÑ 1frame delay (ÀúÁ¶µµ 7.5fps 133ms °í·Á)
+                             //¿©±â±îÁö lens ¿òÁ÷ÀÓ ¾øÀ½
+                s5k5ca_sensor_write(client, 0x002A, 0x0254);  
+                s5k5ca_sensor_write(client, 0x0F12, AFPosition);  // 030E = 00FF ÀÔ·Â. lens ¿òÁ÷ÀÓ 
+                
+                msleep(50);  //lens°¡ ¸ñÇ¥ÁöÁ¡±îÁö µµ´ÞÇÏ±â À§ÇØ ÇÊ¿äÇÑ delay
+                
+                ret = 0;
+                
+                printk("CAM 3M AF_Single Mode Fail.==> FAIL \n");        
+            }
+
+            if((tmpVal & 0x3) == 0x2) // af success
+            {
+                 ret = 1;
+                
+//                s5k5ca_sensor_write(client, 0x002A, 0x0252); // set to Manual for next snapshot and Single AF
+//                s5k5ca_sensor_write(client, 0x0F12, 0x0004); // AF Manual     
+
+                printk("CAM 3M AF_Single Mode SUCCESS. \r\n");
+            }
+            
+            printk("CAM:3M AF_SINGLE SET \r\n");
+            break;
+            
+        case 2: // auto
+            printk("[CAM-SENSOR] =Focus Mode -> auto\n");
+            
+            DummyAFPosition = 0x0001;
+            AFPosition = 0x0000;
+            
+            s5k5ca_sensor_write(client, 0xFCFC, 0xD000);    
+            s5k5ca_sensor_write(client, 0x0028, 0x7000);
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x10D4);    
+            s5k5ca_sensor_write(client, 0x0F12, 0x1002); // Set Normal AF Mode
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x0254);    
+            s5k5ca_sensor_write(client, 0x0F12, DummyAFPosition); // dummy lens position
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x0252);    
+            s5k5ca_sensor_write(client, 0x0F12, 0x0004); // AF Manual
+            
+            msleep(130);
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x0254);    
+            s5k5ca_sensor_write(client, 0x0F12, AFPosition); // move lens to initial position
+            
+            msleep(50); // Lens°¡ ÃÊ±â À§Ä¡·Î µ¹¾Æ°¡´Â ÀÌµ¿½Ã°£.           
+            
+            af_mode = 2;
+            break;
+
+        case 3: // infinity
+            printk("[CAM-SENSOR] =Focus Mode -> infinity\n");
+            
+            DummyAFPosition = 0x0001;
+            AFPosition = 0x0000;
+            
+            s5k5ca_sensor_write(client, 0xFCFC, 0xD000);
+            s5k5ca_sensor_write(client, 0x0028, 0x7000);
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x0254);    
+            s5k5ca_sensor_write(client, 0x0F12, DummyAFPosition);
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x0252);
+            s5k5ca_sensor_write(client, 0x0F12, 0x0004); // AF Manual
+            
+            msleep(130);
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x0254);    
+            s5k5ca_sensor_write(client, 0x0F12, AFPosition); // move lens to initial position
+            
+            msleep(50);
+            
+            af_mode = 3;
+            break;
+
+        case 4: // macro
+            printk("[CAM-SENSOR] =Focus Mode -> Macro\n");
+            
+            DummyAFPosition = 0x00F0;
+            AFPosition = 0x00D0;
+            
+            s5k5ca_sensor_write(client, 0xFCFC, 0xD000);	
+            s5k5ca_sensor_write(client, 0x0028, 0x7000);
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x10D4);
+            s5k5ca_sensor_write(client, 0x0F12, 0x1042);  // Set Macro AF mode
+
+            s5k5ca_sensor_write(client, 0x002A, 0x1066);
+            s5k5ca_sensor_write(client, 0x0F12, 0x1000);  // Lens position             
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x0254);	
+            s5k5ca_sensor_write(client, 0x0F12, DummyAFPosition); // set dummy position
+            
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x0252);	
+            s5k5ca_sensor_write(client, 0x0F12, 0x0004); // AF Manual
+            
+            msleep(130);
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x0254);	
+            s5k5ca_sensor_write(client, 0x0F12, AFPosition); // move lens to initial position
+            
+            msleep(50);
+            
+            af_mode = 4;
+            break;
+
+        case 5: // fixed, same as infinity
+            printk("[CAM-SENSOR] =Focus Mode -> fixed\n");	
+            
+            DummyAFPosition = 0x0001;
+            AFPosition = 0x0000;
+            
+            s5k5ca_sensor_write(client, 0xFCFC, 0xD000);
+            s5k5ca_sensor_write(client, 0x0028, 0x7000);
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x0254);    
+            s5k5ca_sensor_write(client, 0x0F12, DummyAFPosition); // set dummy position
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x0252);
+            s5k5ca_sensor_write(client, 0x0F12, 0x0004); // AF Manual
+            
+            msleep(130);
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x0254);    
+            s5k5ca_sensor_write(client, 0x0F12, AFPosition); // move lens to initial position
+            
+            msleep(50);
+            
+            af_mode = 5;
+            break;
+            
+        default:
+            break;
+    }
+               
+    return ret;
+}
+
+static int s5k5ca_sensor_change_effect(struct i2c_client *client, int type)
+{
+	int i, size;	
+	
+	printk("Effects Mode ");
+
+	switch (type)
+	{
+		case 0:
+		default:
+			printk("-> Mode None\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_effect_off_00,"s5k5ca_effect_off_00");
+		break;
+
+		case 1:
+			printk("-> Mode Gray\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_effect_gray_00,"s5k5ca_effect_gray_00");
+		break;
+
+		case 2:
+			printk("-> Mode Sepia\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_effect_sepia_00,"s5k5ca_effect_sepia_00");
+		break;
+
+		case 3:
+			printk("-> Mode Negative\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_effect_negative_00,"s5k5ca_effect_negative_00");
+		break;
+		
+		case 4:
+			printk("-> Mode Aqua\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_effect_aqua_00,"s5k5ca_effect_aqua_00");
+		break;
+
+		case 5:
+			printk("-> Mode Sketch\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_effect_sketch_00,"s5k5ca_effect_sketch_00");
+		break;	
+
+	}
+
+	return 0;
+}
+
+static int s5k5ca_sensor_set_framerate(struct i2c_client *client, int type) //insook0625
+{
+	printk("Set FrameRate type = %d \n",type);
+	switch(type)
+	{
+		case 0:
+			s5k5ca_sensor_write_list(client,s5k5ca_fps_nonfix_00,"s5k5ca_fps_nonfix_00"); //camcorder -> camera hjkang_DC18
+		         printk("s5k5ca_fps_nonfix_00");
+			break;
+
+		case 15:
+			s5k5ca_sensor_write_list(client,s5k5ca_fps_15fix_00,"s5k5ca_fps_15fix_00"); //camera -> camcorder
+			printk("s5k5ca_fps_15fix_00");
+			break;
+
+		default:	
+		      s5k5ca_sensor_write_list(client,s5k5ca_fps_nonfix_00,"s5k5ca_fps_nonfix_00"); //camcorder -> camera hjkang_DC18
+		      printk("s5k5ca_fps_nonfix_00");
+		break;
+	}
+ 	set_af_after_capture = 0; //dha23 100520
+	return 0;
+}
+
+static int s5k5ca_sensor_change_br(struct i2c_client *client, int type)
+{
+	int i, size;
+
+	printk("Brightness Mode \n");
+	switch (type)
+	{
+		case 0: 
+		default :
+			printk("-> Brightness Minus 4\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_br_minus4_00,"s5k5ca_br_minus4_00");
+		break;
+
+		case 1:
+			printk("-> Brightness Minus 3\n");	
+			s5k5ca_sensor_write_list(client,s5k5ca_br_minus3_00,"s5k4ca_br_minus3_04");
+		break;
+		
+		case 2:
+			printk("-> Brightness Minus 2\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_br_minus2_00,"s5k4ca_br_minus2_04");
+		break;
+		
+		case 3:				
+			printk("-> Brightness Minus 1\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_br_minus1_00,"s5k4ca_br_minus1_04");
+		break;
+		
+		case 4:
+			printk("-> Brightness Zero\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_br_zero_00,"s5k5ca_br_zero_00");
+		break;
+
+		case 5:
+			printk("-> Brightness Plus 1\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_br_plus1_00,"s5k5ca_br_plus1_00");
+		break;
+
+		case 6:
+			printk("-> Brightness Plus 2\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_br_plus2_00,"s5k5ca_br_plus2_00");
+		break;
+
+		case 7:
+			printk("-> Brightness Plus 3\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_br_plus3_00,"s5k5ca_br_plus3_00");
+		break;
+
+		case 8:
+			printk("-> Brightness Plus 4\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_br_plus4_00,"s5k5ca_br_plus4_00");
+		break;
+		
+	}
+
+	return 0;
+}
+
+static int s5k5ca_sensor_change_wb(struct i2c_client *client, int type)
+{
+	int i, size;
+	
+	printk("White Balance Mode ");
+
+	switch (type)
+	{
+		case 0:
+		default :
+			printk("-> WB auto mode\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_wb_auto_00,"s5k5ca_wb_auto_00");
+			previous_WB_mode = type;
+		break;
+		
+		case 1:
+			printk("-> WB Sunny mode\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_wb_sunny_00,"s5k5ca_wb_sunny_00");
+			previous_WB_mode = type;
+		break;
+
+		case 2:
+			printk("-> WB Cloudy mode\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_wb_cloudy_00,"s5k5ca_wb_cloudy_00");
+			previous_WB_mode = type;
+		break;
+
+		case 3:
+			printk("-> WB Flourescent mode\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_wb_fluorescent_00,"s5k5ca_wb_fluorescent_00");
+			previous_WB_mode = type;
+		break;
+
+		case 4:
+			printk("-> WB Tungsten mode\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_wb_tungsten_00,"s5k5ca_wb_tungsten_00");
+			previous_WB_mode = type;
+		break;
+	}
+	return 0;
+}
+
+static int s5k5ca_sensor_change_scene_mode(struct i2c_client *client, int type)
+{
+	int i, size;
+
+	printk("[CAM-SENSOR] =Scene Mode %d",type);
+
+	if(previous_scene_mode != 0 && type != 0)
+	{
+		printk("-> Pre-auto-set");
+		s5k5ca_sensor_write_list(client,s5k5ca_scene_mode_off_00,"s5k5ca_scene_mode_off_00");
+	}
+
+	switch (type)
+	{
+		case 0:
+			printk("-> auto\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_scene_mode_off_00,"s5k5ca_scene_mode_off_00");
+			previous_scene_mode = type;
+			break;
+		case 1:
+			printk("-> portrait\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_scene_portrait_on_00,"s5k5ca_scene_portrait_on_00");
+			previous_scene_mode = type;
+			break;
+		case 2:
+			printk("-> landscape\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_scene_landscape_on_00,"s5k5ca_scene_landscape_on_00");
+			previous_scene_mode = type;
+			break;
+		case 3:
+			printk("-> night\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_nightmode_on_00,"s5k5ca_nightmode_on_00");
+			previous_scene_mode = type;
+			break;
+		case 4:
+			printk("-> sunset\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_scene_sunset_on_00,"s5k5ca_scene_sunset_on_00");
+			previous_scene_mode = type;
+			break;
+		case 5:
+			printk("-> sports\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_scene_sports_on_00,"s5k5ca_scene_sports_on_00");
+			previous_scene_mode = type;
+			break;
+		case 6:
+			printk("-> fireworks\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_scene_fireworks_on_00,"s5k5ca_scene_fireworks_on_00");
+			previous_scene_mode = type;
+			break;
+		case 7:
+			printk("-> candlelight\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_scene_candlelight_on_00,"s5k5ca_scene_candlelight_on_00");
+			previous_scene_mode = type;
+			break;
+		case 8:
+			printk("-> text\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_scene_text_on_00,"s5k5ca_scene_text_on_00");     
+			previous_scene_mode = type;
+			break;
+		case 9:
+			printk("-> beach snow\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_scene_beach_snow_on_00,"s5k5ca_scene_beach_snow_on_00");
+			previous_scene_mode = type;
+			break;
+		case 10:
+			printk("-> party indoor\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_scene_party_indoor_on_00,"s5k5ca_scene_party_indoor_on_00");
+			previous_scene_mode = type;
+			break;
+		case 11:
+			printk("-> BackLight\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_scene_backlight_00,"s5k5ca_scene_backlight_00");
+			previous_scene_mode = type;
+		break;
+		
+		case 12:
+			printk("-> Mode Dust Dawn\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_scene_dust_dawn_00,"s5k5ca_scene_dust_dawn_00");	
+			previous_scene_mode = type;
+		break;
+		
+		case 13:
+			printk("-> Fall Color\n");
+			previous_scene_mode = type;
+			s5k5ca_sensor_write_list(client,s5k5ca_scene_fall_color_00,"s5k5ca_scene_fall_color_00");
+		break;
+		
+		default :
+			printk("-> UnKnow Scene Mode\n");
+			break;
+	}
+
+	previous_scene_mode = type;
+
+	return 0;
+}
+
+static int s5k5ca_sensor_photometry(struct i2c_client *client, int type)
+{
+	int i, size;	
+	
+	printk("Metering Mode ");
+
+	switch (type)
+	{
+		case 0:
+			printk("-> spot\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_metering_spot,"s5k5ca_metering_spot");
+			break;
+		case 1:
+			printk("-> matrix\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_metering_matrix,"s5k5ca_metering_matrix");
+			break;
+		case 2:
+			printk("-> center\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_metering_center,"s5k5ca_metering_center");
+			break;
+		default :
+			printk("-> UnKnown Metering Mode\n");
+			break;
+	
+	}
+	return 0;
+}
+
+static int s5k5ca_sensor_user_read(struct i2c_client *client, s5k5ca_t *r_data)
+{
+	s5k5ca_sensor_write(client, 0x002C, r_data->page);
+	s5k5ca_sensor_write(client, 0x002E, r_data->subaddr);
+	printk("s5k5ca_sensor_user_read 0x%04x, value 0x%04x\n", r_data->page, r_data->subaddr);
+		return s5k5ca_sensor_read(client, 0x0F12, &(r_data->value));
+
+}
+
+static int s5k5ca_sensor_user_write(struct i2c_client *client, unsigned short *w_data)
+{
+	return s5k5ca_sensor_write(client, w_data[0], w_data[1]);
+}
+
+static int s5k5ca_sensor_exif_read(struct i2c_client *client, exif_data_t *exif_data)
+{
+	int ret = 0;
+	
+//unsigned short lux = 0;
+	unsigned long extime= 0;
+	unsigned long extime2 = 0;	
+	unsigned short extime1 = 0;
+	unsigned short iso_val = 0;
+
+	printk("s5k5ca_sensor_exif_read");
+	
+	s5k5ca_sensor_write(client, 0xFCFC, 0xD000);	/// exposure time     
+	s5k5ca_sensor_write(client, 0x002C, 0x7000);
+	s5k5ca_sensor_write(client, 0x002E, 0x23E8);
+	s5k5ca_sensor_read(client, 0x0F12, &extime1);	
+
+
+	s5k5ca_sensor_write(client, 0x002C, 0x7000);
+	s5k5ca_sensor_write(client, 0x002E, 0x23EA);
+	s5k5ca_sensor_read(client, 0x0F12, &extime2);
+
+	printk("s5k5ca_sensor_exif_read : extime1: %d, extime2 : %d ,\n",extime1, extime2);         
+
+	extime = extime1 | (extime2 << 16);
+
+        printk("s5k5ca_sensor_exif_read : extime: %x,\n",extime); 	
+
+
+/*	msleep(100);
+
+	s5k5ca_sensor_write(client, 0xFCFC, 0xD000);	/// Incident Light value 
+	s5k5ca_sensor_write(client, 0x002C, 0x7000);
+	s5k5ca_sensor_write(client, 0x002E, 0x12FE);
+	msleep(100);
+	s5k5ca_sensor_read(client, 0x0F12, &lux); */
+
+    s5k5ca_sensor_write(client, 0xFCFC, 0xD000);    /// exposure time
+    s5k5ca_sensor_write(client, 0x002C, 0x7000);
+    s5k5ca_sensor_write(client, 0x002E, 0x23EC);
+
+//  msleep(100);
+    s5k5ca_sensor_read(client, 0x0F12, &iso_val);
+
+    
+    iso_val = iso_val * 10;
+    iso_val = iso_val / 256;
+
+    if (iso_val < 10)
+    {
+        printk("[CAM-SENSOR] =%s iso_val_read < 1.0 \n",__func__,iso_val);
+        exif_data->iso = 50;
+    }
+    else if(iso_val >= 10 && iso_val < 19)
+        exif_data->iso = 50;
+    else if(iso_val >= 19 && iso_val < 23)
+        exif_data->iso = 100;
+    else if(iso_val >= 23 && iso_val < 28)
+        exif_data->iso = 200;
+    else if(iso_val >= 28)
+    {
+        printk("[CAM-SENSOR] =%s iso_val_read < 2.8 \n",__func__,iso_val);
+        exif_data->iso = 400;
+    }
+    else 
+    {
+        printk("[CAM-SENSOR] =%s iso_val_read unknown range \n",__func__,iso_val);
+        exif_data->iso = 0;
+    }
+
+	exif_data->exposureTime = extime/400;
+	exif_data->lux = lux_value;
+       printk("[CAM-SENSOR] =%s iso_val=%d, extime=%d, lux=%d,\n",__func__,exif_data->iso, extime/400,lux_value);
+
+	return ret;
+}
+
+static int s5k5ca_sensor_command(struct i2c_client *client, unsigned int cmd, void *arg)
+{
+	struct v4l2_control *ctrl;
+	unsigned short *w_data;		/* To support user level i2c */	
+	s5k5ca_short_t *r_data;
+	exif_data_t *exif_data;
+
+	int ret=0;
+
+	printk("[CAM-SENSOR] s5k5ca_sensor_command %d \n",cmd);
+
+	switch (cmd)
+	{
+		case SENSOR_INIT:
+			ret = sensor_init(client);
+			break;
+
+		case USER_ADD:
+			break;
+
+		case USER_EXIT:
+			s5k5ca_sensor_exit();
+			break;
+
+		case SENSOR_EFFECT:
+			ctrl = (struct v4l2_control *)arg;
+			s5k5ca_sensor_change_effect(client, ctrl->value);     
+			break;
+
+		case SENSOR_BRIGHTNESS:
+			ctrl = (struct v4l2_control *)arg;
+			s5k5ca_sensor_change_br(client, ctrl->value);
+			break;
+
+		case SENSOR_FRAMERATE: //insook0625
+			ctrl = (struct v4l2_control *)arg;
+			s5k5ca_sensor_set_framerate(client, ctrl->value);
+			break;
+
+		case SENSOR_WB:
+			ctrl = (struct v4l2_control *)arg;
+			s5k5ca_sensor_change_wb(client, ctrl->value);
+			break;
+
+		case SENSOR_SCENE_MODE:          
+			ctrl = (struct v4l2_control *)arg;
+			s5k5ca_sensor_change_scene_mode(client, ctrl->value);      
+			break;
+
+		case SENSOR_AF:
+			ctrl = (struct v4l2_control *)arg;
+			ret = s5k5ca_sensor_af_control(client, ctrl->value);
+			break;
+
+		case SENSOR_MODE_SET:
+			ctrl = (struct v4l2_control *)arg;
+			s5k5ca_sensor_mode_set(client, ctrl->value);
+			break;
+
+		case SENSOR_XGA:
+			s5k5ca_sensor_change_size(client, SENSOR_XGA);	
+			break;
+
+		case SENSOR_QXGA:
+			s5k5ca_sensor_change_size(client, SENSOR_QXGA);	
+			break;
+
+		case SENSOR_QSVGA:
+			s5k5ca_sensor_change_size(client, SENSOR_QSVGA);
+			break;
+
+		case SENSOR_VGA:
+			s5k5ca_sensor_change_size(client, SENSOR_VGA);
+			break;
+
+		case SENSOR_SVGA:
+			s5k5ca_sensor_change_size(client, SENSOR_SVGA);
+			break;
+
+		case SENSOR_SXGA:
+			s5k5ca_sensor_change_size(client, SENSOR_SXGA);
+			break;
+
+		case SENSOR_UXGA:
+         		s5k5ca_sensor_change_size(client, SENSOR_UXGA);
+			break;
+
+		case SENSOR_USER_WRITE:
+			w_data = (unsigned short *)arg;
+			s5k5ca_sensor_user_write(client, w_data);
+			break;
+
+		case SENSOR_USER_READ:
+			r_data = (s5k5ca_short_t *)arg;
+			s5k5ca_sensor_user_read(client, r_data);
+			break;
+	
+		case SENSOR_FLASH_CAMERA:
+			ctrl = (struct v4l2_control *)arg;   
+#ifdef CONFIG_FLASH_AAT1271A
+			aat1271a_falsh_camera_control(ctrl->value);	
+#endif			
+			break;
+
+		case SENSOR_FLASH_MOVIE:
+			ctrl = (struct v4l2_control *)arg;
+			cam_flash_on = ctrl->value;//insook0804    
+			printk("[CAM-SENSOR] SENSOR_FLASH_CAMERA %d \n",cam_flash_on);        
+#ifdef CONFIG_FLASH_AAT1271A
+			aat1271a_falsh_movie_control(ctrl->value);	
+#endif
+			break;
+
+		case SENSOR_EXIF_DATA:
+			exif_data = (exif_data_t *)arg;
+			s5k5ca_sensor_exif_read(client, exif_data);	
+			break;
+
+		case SENSOR_PHOTOMETRY:
+		        ctrl = (struct v4l2_control *)arg;
+			s5k5ca_sensor_photometry(client, ctrl->value);
+			break;
+
+		default:
+		    printk("[CAM-SENSOR] no command type %d \n",cmd);
+			break;
+	}
+
+	return ret;
+}
+static inline struct s5k5ca_state *to_state(struct v4l2_subdev *sd)
+{
+	return container_of(sd, struct s5k5ca_state, sd);
+}
+
+
+static int s5k5ca_s_fmt(struct v4l2_subdev *sd,
+			struct v4l2_mbus_framefmt *mf)
+{
+	return 0;
+	printk("s5k5ca_s_fmt %d * %d\n" ,mf->width,mf->height);
+	int err = 0;
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct s5k5ca_state *s5k5ca = to_state(client);
+
+	switch(mf->width) {
+		case 640:
+			s5k5ca_sensor_change_size(client, SENSOR_VGA);
+		break;
+		case 320:
+			s5k5ca_sensor_change_size(client, SENSOR_QVGA);
+		break;
+	}
+	return err;
+}
+
+static int s5k5ca_enum_framesizes(struct v4l2_subdev *sd, \
+					struct v4l2_frmsizeenum *fsize)
+{
+	int err = 0;
+
+	return err;
+}
+
+static int s5k5ca_enum_frameintervals(struct v4l2_subdev *sd,
+					struct v4l2_frmivalenum *fival)
+{
+	int err = 0;
+
+	return err;
+}
+
+static enum v4l2_mbus_pixelcode s5k5ca_codes[] = {
+	V4L2_MBUS_FMT_YUYV8_2X8,
+	V4L2_MBUS_FMT_YVYU8_2X8,
+	V4L2_MBUS_FMT_UYVY8_2X8,
+	V4L2_MBUS_FMT_RGB565_2X8_LE,
+};
+
+static int s5k5ca_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
+			   enum v4l2_mbus_pixelcode *code)
+{
+
+	if (index >= ARRAY_SIZE(s5k5ca_codes))
+		return -EINVAL;
+
+	*code = s5k5ca_codes[index];
+	return 0;
+}
+
+static int s5k5ca_g_fmt(struct v4l2_subdev *sd,
+			struct v4l2_mbus_framefmt *mf)
+{
+	//printk("--------s5k5ca_g_fmt-----\n");
+	int err = 0;
+
+	return err;
+}
+
+static int s5k5ca_s_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *param)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int err = 0;
+
+	dev_dbg(&client->dev, "%s: numerator %d, denominator: %d\n", \
+		__func__, param->parm.capture.timeperframe.numerator, \
+		param->parm.capture.timeperframe.denominator);
+
+	return err;
+}
+
+static int s5k5ca_g_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *param)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int err = 0;
+
+	dev_dbg(&client->dev, "%s\n", __func__);
+
+	return err;
+}
+
+static int s5k5ca_try_fmt(struct v4l2_subdev *sd,
+			  struct v4l2_mbus_framefmt *mf)
+{
+	int err = 0;
+
+	return err;
+}
+
+static struct v4l2_queryctrl s5k5ca_controls[] = {
+	{
+		/*
+		 * For now, we just support in preset type
+		 * to be close to generic WB system,
+		 * we define color temp range for each preset
+		 */
+		.id = V4L2_CID_WHITE_BALANCE_TEMPERATURE,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "White balance in kelvin",
+		.minimum = 0,
+		.maximum = 10000,
+		.step = 1,
+		.default_value = 0,	/* FIXME */
+	},
+	{
+		.id = V4L2_CID_AUTO_WHITE_BALANCE,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "Auto white balance",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_BRIGHTNESS,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Brightness",
+		.minimum = -80,
+		.maximum = 80,
+		.step = 1,
+		.default_value = 0x08,
+	},
+	{
+		.id = V4L2_CID_CONTRAST,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Contrast",
+		.minimum = 0x10,
+		.maximum = 0x30,
+		.step = 1,
+		.default_value = 0x20,
+	},
+	{
+		.id = V4L2_CID_SATURATION,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Saturation",
+		.minimum = 0x00,
+		.maximum = 0x80,
+		.step = 1,
+		.default_value = 0x40,
+	},
+	{
+		.id = V4L2_CID_SHARPNESS,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Sharpness",
+		.minimum = 0x00,
+		.maximum = 0x09,
+		.step = 1,
+		.default_value = 0x04,
+	},
+	{
+		.id = V4L2_CID_HUE,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Hue",
+		.minimum = 0,
+		.maximum = 21,
+		.step = 1,
+		.default_value = 10,
+	},
+	{
+		.id = V4L2_CID_POWER_LINE_FREQUENCY,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Power line frequency",
+		.minimum = 0,
+		.maximum = 2,
+		.step = 1,
+		.default_value = 0,
+	},
+};
+
+static inline struct v4l2_queryctrl const *s5k5ca_find_qctrl(int id)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(s5k5ca_controls); i++)
+		if (s5k5ca_controls[i].id == id)
+			return &s5k5ca_controls[i];
+
+	return NULL;
+}
+
+static int s5k5ca_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(s5k5ca_controls); i++) {
+		if (s5k5ca_controls[i].id == qc->id) {
+			memcpy(qc, &s5k5ca_controls[i], \
+				sizeof(struct v4l2_queryctrl));
+			return 0;
+		}
+	}
+
+	return -EINVAL;
+}
+
+static int s5k5ca_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
+{
+	int err = 0;
+	return err;
+}
+static unsigned char regABVal = 0x06;
+static unsigned char hueTable[21][3] = {{0x0, 0x80, 0},
+				{0x14, 0x7E, 0},
+				{0x27, 0x79, 0},
+				{0x3A, 0x72, 0},
+				{0x4B, 0x67, 0},
+				{0x5A, 0x5A, 0},
+				{0x67, 0x4B, 0},
+				{0x72, 0x3A, 0},
+				{0x79, 0x27, 0},
+				{0x7E, 0x14, 0},
+				{0x80, 0x00, 1},
+				{0x7E, 0x14, 1},
+				{0x79, 0x27, 1},
+				{0x72, 0x3A, 1},
+				{0x67, 0x4B, 1},
+				{0x5A, 0x5A, 1},
+				{0x4B, 0x67, 1},
+				{0x3A, 0x72, 1},
+				{0x27, 0x79, 1},
+				{0x14, 0x7E, 1},
+				{0x00, 0x80, 1}};
+
+void s5k5ca_color_effect(struct v4l2_subdev *sd, int which)
+{return;}
+
+static int s5k5ca_i2c_write(struct v4l2_subdev *sd, unsigned char i2c_data[],
+				unsigned char length)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	return i2c_smbus_write_byte_data(client, i2c_data[0], i2c_data[1]);
+}
+
+static int s5k5ca_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int i, cnt = 0, err = -EINVAL;
+	unsigned char ctrlreg[3][2];
+
+	printk("In %s() ctrl id is 0x%x value 0xis %x\n", 
+			__func__,
+			ctrl->id,
+			ctrl->value);
+
+	switch (ctrl->id) {
+	case V4L2_CID_BRIGHTNESS:
+		dev_dbg(&client->dev, "%s: V4L2_CID_BRIGHTNESS\n", __func__);
+		ctrlreg[0][0] = 0xAB;
+		ctrlreg[1][0] = 0x9B;
+		if (ctrl->value >= 0) {
+			regABVal &= ~BIT(3);
+			ctrlreg[1][1] = ctrl->value;
+		} else {
+			regABVal |= BIT(3);
+			ctrlreg[1][1] = -ctrl->value;
+		}
+		ctrlreg[0][1] = regABVal;
+		cnt = 2;
+		break;
+
+	case V4L2_CID_CONTRAST:
+		dev_dbg(&client->dev, "%s: V4L2_CID_CONTRAST\n", __func__);
+		ctrlreg[0][0] = 0x9C;
+		ctrlreg[0][1] = ctrl->value;
+		cnt = 1;
+		break;
+
+	case V4L2_CID_SATURATION:
+		dev_dbg(&client->dev, "%s: V4L2_CID_SATURATION\n", __func__);
+		ctrlreg[0][0] = 0xA7;
+		ctrlreg[1][0] = 0xA8;
+		ctrlreg[0][1] = ctrlreg[1][1] = ctrl->value;
+		cnt = 2;
+		break;
+
+	case V4L2_CID_SHARPNESS:
+		dev_dbg(&client->dev, "%s: V4L2_CID_SHARPNESS\n", __func__);
+		ctrlreg[0][0] = 0x8F;
+		ctrlreg[0][1] = ctrl->value;
+		cnt = 1;
+		break;
+
+	case V4L2_CID_HUE:
+		dev_dbg(&client->dev, "%s: V4L2_CID_HUE\n", __func__);
+		if (hueTable[ctrl->value][2] == 0) {
+			regABVal &= ~BIT(1);
+			regABVal |= BIT(0);
+		} else {
+			regABVal |= BIT(1);
+			regABVal &= ~BIT(0);
+		}
+		ctrlreg[0][0] = 0xA9;
+		ctrlreg[0][1] = hueTable[ctrl->value][0];
+		ctrlreg[1][0] = 0xAA;
+		ctrlreg[1][1] = hueTable[ctrl->value][1];
+		ctrlreg[2][0] = 0xAB;
+		ctrlreg[2][1] = regABVal;
+		cnt = 3;
+		break;
+
+	case V4L2_CID_POWER_LINE_FREQUENCY:
+		dev_dbg(&client->dev, "%s: V4L2_CID_POWER_LINE_FREQUENCY\n", __func__);
+		ctrlreg[0][0] = 0x22;
+		ctrlreg[1][0] = 0x23;
+		if ((ctrl->value == 0) || (ctrl->value == 2)) { // off or 60Hz
+			ctrlreg[0][1] = 0x7F;
+			ctrlreg[1][1] = 0x03;
+			cnt = 2;
+		} else if (ctrl->value == 1){ // 50Hz
+			ctrlreg[0][1] = 0x99;
+			ctrlreg[1][1] = 0x02;
+			cnt = 2;
+		}
+		break;
+#if 0	//lxy
+	case V4L2_CID_SCENE_MODE:
+		GC0308_night_mode(sd, ctrl->value);
+		return;
+		break;
+#endif
+
+	case V4L2_CID_COLORFX:
+   		dev_err(&client->dev, "%s: in color effect %d\n", 
+					__func__,   
+					ctrl->value);
+		s5k5ca_color_effect(sd, ctrl->value);
+		return 0;
+		break;
+
+#if 0	//lxy
+	case V4L2_CID_WHITE_BALANCE_PRESET:
+		dev_err(&client->dev, "%s: in white balance preset %d\n", 
+					__func__,   
+					ctrl->value);
+		s5k5ca_white_balance_preset(sd, ctrl->value);
+		return 0;
+		break;
+#endif
+
+	default:
+		dev_err(&client->dev, "%s: no such control id 0x%x\n", __func__, ctrl->id);
+		break;  
+	}
+
+	for (i = 0; i < cnt; ++i)
+		err = s5k5ca_i2c_write(sd, ctrlreg[i], 2);
+
+	if (err < 0) {
+		dev_dbg(&client->dev, "%s: vidioc_s_ctrl failed: %d\n", __func__, ctrl->id);
+	}
+
+	return err;
+}
+
+
+static const struct v4l2_subdev_video_ops s5k5ca_video_ops = {
+	.g_mbus_fmt = s5k5ca_g_fmt,
+	.s_mbus_fmt = s5k5ca_s_fmt,
+	.enum_framesizes = s5k5ca_enum_framesizes,
+	.enum_frameintervals = s5k5ca_enum_frameintervals,
+	.enum_mbus_fmt = s5k5ca_enum_fmt,
+	.try_mbus_fmt = s5k5ca_try_fmt,
+	.g_parm = s5k5ca_g_parm,
+	.s_parm = s5k5ca_s_parm,
+};
+static const struct v4l2_subdev_core_ops s5k5ca_core_ops = {
+	.init	= sensor_init,
+	.queryctrl = s5k5ca_queryctrl,
+	.g_ctrl = s5k5ca_g_ctrl,
+	.s_ctrl = s5k5ca_s_ctrl,
+};
+static const struct v4l2_subdev_ops s5k5ca_ops = {
+	.core = &s5k5ca_core_ops,
+	.video = &s5k5ca_video_ops,
+};
+
+static int s5k5ca_set_bus_param(struct soc_camera_device *icd,
+				unsigned long flags)
+{
+	struct soc_camera_link *icl = to_soc_camera_link(icd);
+	unsigned long width_flag = flags & SOCAM_DATAWIDTH_MASK;
+
+	/* Only one width bit may be set */
+	if (icl->set_bus_param)
+		return icl->set_bus_param(icl, width_flag);
+
+	/*
+	 * Without board specific bus width settings we support only the
+	 * sensors native bus width witch are tested working
+	 */
+	if (width_flag & (SOCAM_DATAWIDTH_10 | SOCAM_DATAWIDTH_8))
+		return 0;
+
+	return 0;
+}
+
+static unsigned long s5k5ca_query_bus_param(struct soc_camera_device *icd)
+{
+	struct soc_camera_link *icl = to_soc_camera_link(icd);
+	unsigned long flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_MASTER |
+		SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_HIGH |
+		SOCAM_DATA_ACTIVE_HIGH;
+
+	if (icl->query_bus_param)
+		flags |= icl->query_bus_param(icl) & SOCAM_DATAWIDTH_MASK;
+	else
+		flags |= SOCAM_DATAWIDTH_8;
+
+	return soc_camera_apply_sensor_flags(icl, flags);
+}
+
+static struct soc_camera_ops s5k5ca_camera_ops = {
+	.set_bus_param		= s5k5ca_set_bus_param,
+	.query_bus_param	= s5k5ca_query_bus_param,
+	.controls		= s5k5ca_controls,
+	.num_controls		= ARRAY_SIZE(s5k5ca_controls),
+};
+
+static int s5k5ca_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+	struct s5k5ca_state *state;
+	struct v4l2_subdev *sd;
+	struct soc_camera_device  *icd = client->dev.platform_data;
+	struct i2c_adapter        *adapter = to_i2c_adapter(client->dev.parent);
+	struct soc_camera_link    *icl;
+
+	state = kzalloc(sizeof(struct s5k5ca_state), GFP_KERNEL);
+	if (state == NULL)
+		return -ENOMEM;
+
+	sd = &state->sd;
+	strcpy(sd->name, "S5K5CA");
+
+	icl = to_soc_camera_link(icd);
+	if (!icl) {
+		dev_err(&adapter->dev,
+			"S5K5CA: Missing platform_data for driver\n");
+		return -EINVAL;
+	}
+
+	/* Registering subdev */
+	v4l2_i2c_subdev_init(sd, client, &s5k5ca_ops);
+
+	icd->ops = &s5k5ca_camera_ops;
+
+	sensor_init(client);
+	
+	//s_i2c_client = client;
+	//s_proc = create_proc_entry(S5K5CA_PROC_NAME, 0666, &proc_root);
+#if 0
+	if (s_proc != NULL)
+	{
+		s_proc->write_proc = s5k5ca_writeproc;
+		s_proc->read_proc = s5k5ca_readproc;
+	}
+#endif
+	dev_info(&client->dev, "s5k5ca has been probed\n");
+
+	return 0;
+}
+
+static int s5k5ca_i2c_detect(struct i2c_client *client, int kind, struct i2c_board_info *info)
+{
+	strlcpy(info->type, "S5K5CA", I2C_NAME_SIZE);
+	return 0;
+}
+
+static int __devexit s5k5ca_i2c_remove(struct i2c_client *client)
+{
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+//	if (s_proc != NULL)
+	//	remove_proc_entry(GC0308_PROC_NAME, &proc_root);
+
+	v4l2_device_unregister_subdev(sd);
+	kfree(to_state(sd));
+	return 0;
+    printk("[CAM-SENSOR][s5k5ca] removed\n");
+	return 0;
+}
+
+static struct i2c_device_id s5k5ca_id[] = {
+	{ "S5K5CA", 0 },
+	{}
+};
+
+MODULE_DEVICE_TABLE(i2c, s5k5ca_id);
+
+static struct i2c_driver s5k5ca_driver = {
+	.driver = {
+		.owner	= THIS_MODULE,
+		.name = "S5K5CA",
+	},
+	.class 		= I2C_CLASS_HWMON,
+	.probe		= s5k5ca_i2c_probe,
+	.remove		= __devexit_p(s5k5ca_i2c_remove),
+	.detect		= s5k5ca_i2c_detect,
+	.command = s5k5ca_sensor_command,
+	.id_table	= s5k5ca_id,
+//	.address_data	= &s5k5ca_addr_data,
+};
+
+static __init s5k5ca_sensor_init(void)
+{
+	return i2c_add_driver(&s5k5ca_driver);
+}
+
+static void s5k5ca_sensor_exit(void)
+{
+	s5k5ca_sensor_disable();
+
+//	if (s5k5ca_data.sensor != NULL)
+	//	s3c_camif_unregister_sensor(&s5k5ca_data);
+}
+
+static struct v4l2_input s5k5ca_input = {
+	.index		= 0,
+	.name		= "Camera Input (S5K5CA)",
+	.type		= V4L2_INPUT_TYPE_CAMERA,
+	.audioset	= 1,
+	.tuner		= 0,
+	.std		= V4L2_STD_PAL_BG | V4L2_STD_NTSC_M,
+	.status		= 0,
+};
+
+static struct v4l2_input_handler s5k5ca_input_handler = {
+	s5k5ca_sensor_init,
+	s5k5ca_sensor_exit	
+};
+
+static __exit s5k5ca_sensor_remove(void)
+{
+	//printk("------s5k5ca_sensor_remove-------\n");
+	i2c_del_driver(&s5k5ca_driver);
+}
+
+module_init(s5k5ca_sensor_init)
+module_exit(s5k5ca_sensor_remove)
diff -uNra linux-3.0.82/drivers/media/video/ls1c_s5k5ca.c linux-3.0.82x/drivers/media/video/ls1c_s5k5ca.c
--- linux-3.0.82/drivers/media/video/ls1c_s5k5ca.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/ls1c_s5k5ca.c	2017-09-23 03:42:49.542676518 +0800
@@ -0,0 +1,1974 @@
+/*
+ *  Copyright (C) 2004 Samsung Electronics
+ *             SW.LEE <hitchcar@samsung.com>
+ *            - based on Russell King : pcf8583.c
+ * 	      - added  smdk24a0, smdk2440
+ *            - added  poseidon (s3c24a0+wavecom)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Driver for FIMC2.x Camera Decoder
+ *
+ */
+
+#include <linux/module.h>    
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+#include <linux/sched.h>
+#include <linux/string.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-subdev.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/clk.h>
+#include <media/soc_camera.h>
+#include <media/soc_mediabus.h>
+#include "s3c_camif.h"
+#include "s5k5ca.h"                               
+#include <linux/proc_fs.h>
+#include <linux/kthread.h>
+
+static struct task_struct *_task = NULL;
+
+/* Camera functional setting values configured by user concept */
+struct s5k5ca_userset {
+	signed int exposure_bias;	/* V4L2_CID_EXPOSURE */
+	unsigned int ae_lock;
+	unsigned int awb_lock;
+	unsigned int auto_wb;	/* V4L2_CID_AUTO_WHITE_BALANCE */
+	unsigned int manual_wb;	/* V4L2_CID_WHITE_BALANCE_PRESET */
+	unsigned int wb_temp;	/* V4L2_CID_WHITE_BALANCE_TEMPERATURE */
+	unsigned int effect;	/* Color FX (AKA Color tone) */
+	unsigned int contrast;	/* V4L2_CID_CONTRAST */
+	unsigned int saturation;	/* V4L2_CID_SATURATION */
+	unsigned int sharpness;		/* V4L2_CID_SHARPNESS */
+	unsigned int glamour;
+};
+
+struct s5k5ca_platform_data {
+	unsigned int default_width;
+	unsigned int default_height;
+	unsigned int pixelformat;
+	int freq;	/* MCLK in KHz */
+
+	/* This SoC supports Parallel & CSI-2 */
+	int is_mipi;
+};
+
+struct s5k5ca_state {
+	struct s5k5ca_platform_data *pdata;
+	struct v4l2_subdev sd;
+	struct v4l2_pix_format pix;
+	struct v4l2_fract timeperframe;
+	struct s5k5ca_userset userset;
+	int freq;	/* MCLK in KHz */
+	int is_mipi;
+	int isize;
+	int ver;
+	int fps;
+};
+
+// function define
+//#define CONFIG_LOAD_FILE     
+#define S5K5CA_PROC_NAME	"s5k5ca"       
+#define I2C_BURST_MODE //dha23 100325 Ä«¸Þ¶ó ±âµ¿ ½Ã°£ ÁÙÀÌ±â À§ÇØ I2C Burst mode »ç¿ë.
+// Purpose of verifying I2C operaion. must be ignored later.    
+//#define LOCAL_CONFIG_S5K5CA_I2C_TEST
+static struct i2c_client * s_i2c_client = NULL;
+static struct i2c_driver s5k5ca_driver;
+int set_af_after_capture = 0; //dha23 100518
+static struct proc_dir_entry * s_proc = NULL;
+
+static void s5k5ca_sensor_gpio_init(void);
+void s5k5ca_sensor_enable(void);
+static void s5k5ca_sensor_disable(void);
+
+static int s5k5ca_sensor_init(void);
+static void s5k5ca_sensor_exit(void);
+
+static int s5k5ca_sensor_change_size(struct i2c_client *client, int size);
+
+
+/* #define S5K5CA_ID	0x78 */
+#define S5K5CA_ID	0x78 
+static unsigned short s5k5ca_normal_i2c[] = { (S5K5CA_ID >> 1), I2C_CLIENT_END };
+static unsigned short s5k5ca_ignore[] = { I2C_CLIENT_END };
+static unsigned short s5k5ca_probe[] = { I2C_CLIENT_END };
+
+static int previous_scene_mode = -1;
+static int previous_WB_mode = 0;
+static int af_mode = -1;
+static unsigned short lux_value = 0;
+int cam_flash_on = 0; //insook0804
+int locked_ae_awb = 0; //insook0901
+
+bool isS5k5caEnabled = false; 
+
+static unsigned short AFPosition = 0x0000; 
+static unsigned short DummyAFPosition = 0x0001; 
+
+static int s5k5ca_sensor_read(struct i2c_client *client,
+		unsigned short subaddr, unsigned short *data)
+{
+	int ret;
+	unsigned char buf[2];
+	struct i2c_msg msg = { client->addr, 0, 2, buf };
+	
+	buf[0] = (subaddr >> 8);
+	buf[1] = (subaddr & 0xFF);
+
+	ret = i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;
+	if (ret == -EIO) 
+		goto error;
+
+	msg.flags = I2C_M_RD;
+	
+	ret = i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;
+	if (ret == -EIO) 
+		goto error;
+
+	*data = ((buf[0] << 8) | buf[1]);
+
+error:
+	return ret;
+}
+
+static int s5k5ca_sensor_write(struct i2c_client *client,unsigned short subaddr, unsigned short val)
+{
+	//printk("   s5k5ca_sensor_write   (%x)\n", val);
+
+	if(subaddr == 0xdddd)
+	{
+			msleep(val);
+			printk("delay time(%d msec)\n", val);
+	}	
+	else
+	{					
+		unsigned char buf[4];
+		struct i2c_msg msg = { client->addr, 0, 4, buf };
+
+		buf[0] = (subaddr >> 8);
+		buf[1] = (subaddr & 0xFF);
+		buf[2] = (val >> 8);
+		buf[3] = (val & 0xFF);
+
+//		return i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;
+  if(i2c_transfer(client->adapter, &msg, 1) == 1)
+     return 0;
+  else{
+     printk("[**ASWOOGI**] s5k5ca_sensor_write_list error\n"); 
+     return -EIO;
+  }
+	}
+}
+
+static int s5k5ca_sensor_write_list(struct i2c_client *client, struct samsung_short_t *list,char *name)
+{
+	int i, ret;
+	ret = 0;
+#ifdef CONFIG_LOAD_FILE 
+	s5k5ca_regs_table_write(name);	
+#else
+	for (i = 0; list[i].subaddr != 0xffff; i++)
+	{
+		if(s5k5ca_sensor_write(client, list[i].subaddr, list[i].value) < 0){
+                	printk("[**ASWOOGI**] s5k5ca_sensor_write_list error\n"); 
+            			return -1;
+                }
+	}
+#endif
+	return ret;
+}
+
+#ifdef I2C_BURST_MODE //dha23 100325
+
+#define BURST_MODE_SET			1
+#define BURST_MODE_END			2
+#define NORMAL_MODE_SET			3
+#define MAX_INDEX				1000
+static int s5k5ca_sensor_burst_write_list(struct i2c_client *client, struct samsung_short_t *list,char *name)
+{
+	__u8 temp_buf[MAX_INDEX];
+	int index_overflow = 1;
+	int new_addr_start = 0;
+	int burst_mode = NORMAL_MODE_SET;
+	unsigned short pre_subaddr = 0;
+	struct i2c_msg msg = { client->addr, 0, 4, temp_buf };
+	int i=0, ret=0;
+	unsigned int index = 0;
+	
+	printk("s5k5ca_sensor_burst_write_list( %s ) \n", name); 
+	//printk("[PGH] on write func s5k5ca_client->addr : %x\n", client->addr); //reduced startup time.     
+    
+#ifdef CONFIG_LOAD_FILE 
+	s5k5ca_regs_table_write(name);	
+#else
+	for (i = 0; list[i].subaddr != 0xffff; i++)
+	{
+		if(list[i].subaddr == 0xdddd)
+		{
+                        msleep(list[i].value);
+			printk("delay 0x%04x, value 0x%04x\n", list[i].subaddr, list[i].value);
+		}	
+		else
+		{			
+		//	printk("--------write i2c reg------\n");		
+			if( list[i].subaddr == list[i+1].subaddr )
+			{
+				burst_mode = BURST_MODE_SET;
+				if((list[i].subaddr != pre_subaddr) || (index_overflow == 1))
+				{
+					new_addr_start = 1;
+					index_overflow = 0;
+				}
+			}
+			else
+			{
+				if(burst_mode == BURST_MODE_SET)
+				{
+					burst_mode = BURST_MODE_END;
+					if(index_overflow == 1)
+					{
+						new_addr_start = 1;
+						index_overflow = 0;
+					}
+				}
+				else
+				{
+					burst_mode = NORMAL_MODE_SET;
+				}
+			}
+
+			if((burst_mode == BURST_MODE_SET) || (burst_mode == BURST_MODE_END))
+			{
+				if(new_addr_start == 1)
+				{
+					index = 0;
+					memset(temp_buf, 0x00 ,1000);
+					index_overflow = 0;
+
+					temp_buf[index] = (list[i].subaddr >> 8);
+					temp_buf[++index] = (list[i].subaddr & 0xFF);
+
+					new_addr_start = 0;
+				}
+				
+				temp_buf[++index] = (list[i].value >> 8);
+				temp_buf[++index] = (list[i].value & 0xFF);
+				
+				if(burst_mode == BURST_MODE_END)
+				{
+					msg.len = ++index;
+
+					ret = i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;
+					if( ret < 0)
+					{
+						printk("i2c_transfer fail ! \n");
+						return -1;
+					}
+				}
+				else if( index >= MAX_INDEX-1 )
+				{
+					index_overflow = 1;
+					msg.len = ++index;
+					
+					ret = i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;
+					if( ret < 0)
+					{
+						printk("I2C_transfer Fail ! \n");
+						return -1;
+					}
+				}
+				
+			}
+			else
+			{
+				memset(temp_buf, 0x00 ,4);
+			
+				temp_buf[0] = (list[i].subaddr >> 8);
+				temp_buf[1] = (list[i].subaddr & 0xFF);
+				temp_buf[2] = (list[i].value >> 8);
+				temp_buf[3] = (list[i].value & 0xFF);
+
+				msg.len = 4;
+				ret = i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;
+				if( ret < 0)
+				{
+					printk("I2C_transfer Fail ! \n");
+					return -1;
+				}
+			}
+		}
+		
+		pre_subaddr = list[i].subaddr;
+	}
+#endif
+	return ret;
+}
+#endif
+
+
+static int s5k5ca_sensor_ae_awb_lock(struct i2c_client *client)
+{
+    printk("s5k5ca_sensor_ae_awb_lock");
+    
+    s5k5ca_sensor_write(client, 0xFCFC, 0xD000);
+    s5k5ca_sensor_write(client, 0x0028, 0x7000);
+    s5k5ca_sensor_write(client, 0x002A, 0x2466);
+    s5k5ca_sensor_write(client, 0x0F12, 0x0000);
+}
+
+static int s5k5ca_sensor_ae_awb_unlock(struct i2c_client *client)
+{
+	printk("s5k5ca_sensor_ae_awb_unlock");
+
+        s5k5ca_sensor_write(client, 0xFCFC, 0xD000);
+        s5k5ca_sensor_write(client, 0x0028, 0x7000);
+        s5k5ca_sensor_write(client, 0x002A, 0x2466);
+        s5k5ca_sensor_write(client, 0x0F12, 0x0001);	
+}
+
+static void s5k5ca_sensor_get_id(struct i2c_client *client)
+{
+	unsigned short id = 0;
+
+	s5k5ca_sensor_write(client, 0x002C, 0x0000);
+	s5k5ca_sensor_write(client, 0x002E, 0x0040);
+	s5k5ca_sensor_read(client, 0x0F12, &id);
+	printk("Sensor ID(0x%04x) is %s!\n", id, (id == 0x05CA) ? "Valid" : "Invalid"); 
+}
+
+
+#if defined(CONFIG_LDO_LP8720)
+extern void	s5k5ca_sensor_power_init(void);	
+#endif
+
+void s5k5ca_sensor_enable(void)
+{
+  int test_value =0;
+	printk("[**ASWOOGI**] s5k5ca_sensor_enable\n"); 
+
+	//s5k5ca_sensor_gpio_init();
+
+	/* > 0 ms */
+	msleep(1);
+	msleep(5);
+
+	isS5k5caEnabled = true;
+}
+
+static void s5k5ca_sensor_disable(void)
+{
+        printk("[**ASWOOGI**] s5k5ca_sensor_disable\n");	
+
+	if(isS5k5caEnabled != true)
+	{
+		printk("[**ASWOOGI**] s5k5ca is not enabled.. return!!\n");
+		return;
+	}
+        else
+        {
+            printk("[**ASWOOGI**] s5k5ca is enabled!!\n");
+        }	
+
+         msleep(1);
+
+	/* > 0 ms */
+	msleep(1);
+
+//	AF_PWR_DIS;
+
+	//CAM_PWR_DIS;
+
+	 isS5k5caEnabled = false;
+}
+
+static int thread_func(void *data)
+{
+	while (1)
+	{
+		unsigned long count = 0;
+		unsigned int eNum = 0;
+		unsigned int temp = 0;
+		while (1) {
+		temp = ((*(volatile unsigned int*)(0xbc280038)) & 0xf00000) >> 20;
+		if (0x0e == temp)
+		 {
+			eNum++;
+			temp = ((*(volatile unsigned int*)(0xbc280038)) & 0xf00000) >> 20;
+		}
+		else			
+			eNum = 0;
+		//printf("");
+		if (eNum)
+			printk("bit20-23 eNum %d \n", eNum);
+		//eNum = 0;
+		//printf("config reg 0d%ld 0x%x \n", count++, *(volatile unsigned int*)(0xbc280038));
+		}
+	
+schedu:
+		schedule();
+		if (kthread_should_stop())
+			break;
+	}
+out:
+	return 0;
+}
+
+static int start_bit28_thread(void)
+{
+	_task = kthread_run(thread_func, NULL, "thread");
+	if (!IS_ERR(_task))
+		printk("kthread_create done \n");
+	else 
+		printk("kthread_create error \n");
+	return 0;
+}
+
+static void end_thread(void)
+{
+	int ret = 0;
+	ret = kthread_stop(_task);
+	_task = NULL;
+	printk("end kthread. ret = %d \n", ret);
+}
+
+static int sensor_init(struct i2c_client *client)
+{
+	//return 0;
+	int i, size;
+	int ret = 0;
+
+	printk("[**ASWOOGI**] sensor_init\n"); 
+
+#ifdef I2C_BURST_MODE //dha23 100325	
+	if(s5k5ca_sensor_burst_write_list(client,s5k5ca_init_00,"s5k5ca_init_00") < 0)
+		return -1;
+#else
+	if(s5k5ca_sensor_write_list(client,s5k5ca_init0,"s5k5ca_init0") < 0)
+		return -1;
+
+	msleep(100);	
+
+	if(s5k5ca_sensor_write_list(client,s5k5ca_init1,"s5k5ca_init1") < 0)
+		return -1;
+#endif
+
+	msleep(10);	
+	af_mode = -1;
+
+	/* Check Sensor ID */
+	s5k5ca_sensor_get_id(client);
+	//start_bit28_thread();
+	return 0;
+}
+
+static int s5k5ca_sensor_mode_set(struct i2c_client *client, int type)
+{
+	int i, size;
+	unsigned short light;
+	int delay = 0;
+
+	printk("[**ASWOOGI**] s5k5ca_sensor_mode_set\n"); 
+
+	if (type & SENSOR_PREVIEW)
+	{	
+		printk("-> Preview ");
+#ifdef I2C_BURST_MODE //dha23 100325				
+		s5k5ca_sensor_burst_write_list(client,s5k5ca_preview_00,"s5k5ca_preview_00");
+#else
+		s5k5ca_sensor_write_list(client,s5k5ca_preview_00,"s5k5ca_preview_00");
+#endif
+	}
+	else if (type & SENSOR_CAPTURE)
+        {	
+		printk("-> Capture ");
+#if 0
+                s5k5ca_sensor_write_list(client,s5k5ca_capture_normal_normal_00,"s5k5ca_capture_normal_normal_00");
+
+#else
+
+		s5k5ca_sensor_write(client, 0xFCFC, 0xD000);
+		s5k5ca_sensor_write(client, 0x002C, 0x7000);	
+		s5k5ca_sensor_write(client, 0x002E, 0x2448);
+		s5k5ca_sensor_read(client, 0x0F12, &light);
+		lux_value = light;
+
+                if (previous_scene_mode == 6) /* fireworks use own capture routine */
+                {
+                    printk("Snapshot : firework capture\n");
+//                delay = s5k4ca_delay_firework_capture;
+    
+                    s5k5ca_sensor_write_list(client,s5k5ca_snapshot_fireworks_00,"s5k5ca_snapshot_fireworks_00");
+                }
+                else
+                {
+                    if (light <= 0x32) /* Low light */
+                    {	
+                
+                        printk("Snapshot : Low Light\n");
+//                    delay = s5k4ca_delay_normal_low_capture;
+                    
+                        if(previous_scene_mode == 3) 
+                        {
+                            printk("Snapshot : Night Mode\n");
+                        
+                            s5k5ca_sensor_write_list(client,s5k5ca_snapshot_nightmode_00,"s5k5ca_snapshot_nightmode_00");
+                        }
+                        else
+                        {
+                            printk("Snapshot : Normal mode \n");
+                            
+                            s5k5ca_sensor_write_list(client,s5k5ca_snapshot_normal_low_00,"s5k5ca_snapshot_normal_low_00");
+                        }
+                
+                    }
+                
+                    else
+                    {
+                            printk("Snapshot : Normal Normal Light\n");
+//                          delay = s5k4ca_delay_normal_normal_capture;//300;
+                          s5k5ca_sensor_write_list(client,s5k5ca_capture_normal_normal_00,"s5k5ca_capture_normal_normal_00");
+                    }
+	    }
+#endif                
+            	s5k5ca_sensor_ae_awb_unlock(client);
+	}	
+        else if (type & SENSOR_FLASH_CAP_LOW)
+	{	
+		printk("flash Normal Low Light Capture\n");
+  		delay = 300;
+		s5k5ca_sensor_write_list(client,s5k5ca_flashcapture_low_00,"s5k5ca_flashcapture_low_00");          
+		printk("delay time(%d msec)\n", delay);	
+		//s5k5ca_sensor_ae_awb_unlock(client);	
+	}
+	else if (type & SENSOR_FLASH_CAPTURE)       
+	{	
+		printk("flash Normal Normal Light Capture\n");
+		delay = 300;
+		s5k5ca_sensor_write_list(client,s5k5ca_flashcapture_00,"s5k5ca_flashcapture_00");        
+		printk("delay time(%d msec)\n", delay);
+		//s5k5ca_sensor_ae_awb_unlock(client);		
+	}
+	else if (type & SENSOR_CAMCORDER )
+	{
+		printk("Record\n");
+			
+		s5k5ca_sensor_write(client, 0xFCFC, 0xD000); 
+                s5k5ca_sensor_write(client, 0x0028, 0x7000); 
+
+                s5k5ca_sensor_write(client, 0x002A, 0x030E);  
+                s5k5ca_sensor_write(client, 0x0F12, 0x00DF);  //030E = 00FF ÀÔ·ÂÀ§ÇØ ´Ù¸¥°ª ÀÓ½ÃÀÔ·Â
+
+                s5k5ca_sensor_write(client, 0x002A, 0x030C); 
+                s5k5ca_sensor_write(client, 0x0F12, 0x0000); // AF Manual 
+
+                msleep(130); //AF Manual ¸í·É ÀÎ½ÄÀ§ÇÑ 1frame delay (ÀúÁ¶µµ 7.5fps 133ms °í·Á)
+                             //¿©±â±îÁö lens ¿òÁ÷ÀÓ ¾øÀ½
+                s5k5ca_sensor_write(client, 0x002A, 0x030E);  
+                s5k5ca_sensor_write(client, 0x0F12, 0x00E0);  // 030E = 00FF ÀÔ·Â. lens ¿òÁ÷ÀÓ 
+                 
+                msleep(50);  //lens°¡ ¸ñÇ¥ÁöÁ¡±îÁö µµ´ÞÇÏ±â À§ÇØ ÇÊ¿äÇÑ delay
+        
+		delay = 300;
+   
+		//s5k5ca_sensor_write_list(client,s5k5ca_fps_15fix_00,"s5k5ca_fps_15fix_00");
+	}
+
+	msleep(delay);
+
+	return 0;
+}
+
+static int s5k5ca_sensor_change_size(struct i2c_client *client, int size)
+{
+	return 0;
+	printk("s5k5ca_sensor_change_size");
+
+	switch (size) {
+		case SENSOR_XGA:
+			s5k5ca_sensor_mode_set(client, SENSOR_PREVIEW);
+			break;
+
+		case SENSOR_QXGA:
+			s5k5ca_sensor_mode_set(client, SENSOR_CAPTURE);
+			break;
+	
+		case SENSOR_VGA:
+			s5k5ca_sensor_write(client, 0xFCFC, 0xD000);    
+    			s5k5ca_sensor_write(client, 0x0028, 0x7000);
+
+      			s5k5ca_sensor_write(client, 0x002A, 0x026c);  
+      			s5k5ca_sensor_write(client, 0x0F12, 0x0280);
+			
+      			s5k5ca_sensor_write(client, 0x002A, 0x026e);    
+      			s5k5ca_sensor_write(client, 0x0F12, 0x01e0); 
+			break;			
+	
+		default:
+			printk("Unknown Size! (Only XGA & QXGA)\n");
+			break;
+	}
+
+	return 0;
+}
+
+static int s5k5ca_sensor_af_control(struct i2c_client *client, int type)
+{
+
+    int count = 50;
+    int tmpVal = 0;   
+    int tmpVal2 = 0;   
+    int ret = 0;
+    int size = 0;
+    int i = 0;
+    int z = 0;
+    unsigned short light = 0;
+
+	printk("s5k5ca_sensor_af_control");
+
+    switch (type)
+    {
+        case 0: // release
+            printk("[CAM-SENSOR] Focus Mode -> release\n"); 
+
+	    if( locked_ae_awb )
+	   {    
+              s5k5ca_sensor_ae_awb_unlock(client); // unlock AWB/AE
+              locked_ae_awb = 0;
+            }
+            //af move to initial position.
+
+            s5k5ca_sensor_write(client, 0xFCFC, 0xD000);    
+            s5k5ca_sensor_write(client, 0x0028, 0x7000);
+
+            s5k5ca_sensor_write(client, 0x002A, 0x0254);  
+            s5k5ca_sensor_write(client, 0x0F12, DummyAFPosition); // dummy lens position
+			
+            s5k5ca_sensor_write(client, 0x002A, 0x0252);    
+            s5k5ca_sensor_write(client, 0x0F12, 0x0004); // AF manual
+            
+            msleep(130);
+
+            s5k5ca_sensor_write(client, 0x002A, 0x0254);
+            s5k5ca_sensor_write(client, 0x0F12, AFPosition); // move lens to initial position
+
+            msleep(50);
+
+            break;
+
+        case 1: // AF start
+	    printk("Focus Mode -> Single\n");
+
+	    if( locked_ae_awb )
+	   {    
+              s5k5ca_sensor_ae_awb_unlock(client); // unlock AWB/AE
+              locked_ae_awb = 0;
+              msleep(200);
+            }
+
+            s5k5ca_sensor_write(client, 0xFCFC, 0xD000);
+            s5k5ca_sensor_write(client, 0x002C, 0x7000);	
+            s5k5ca_sensor_write(client, 0x002E, 0x2448);
+            s5k5ca_sensor_read(client, 0x0F12, &light);
+            lux_value = light;
+
+          
+            if (light < 0x32) /* Low light AF */ // NB ±âÁØ°ª 250
+            {
+            	s5k5ca_sensor_burst_write_list(client,s5k5ca_af_low_lux_val,"s5k5ca_af_low_lux_val"); //dha23 100331
+            	printk("[CAM-SENSOR] =Low Light AF Single light=0x%05x\n", light);
+            }
+            else
+            {
+            	s5k5ca_sensor_burst_write_list(client,s5k5ca_af_normal_lux_val,"s5k5ca_af_normal_lux_val"); //dha23 100331
+            	printk("[CAM-SENSOR] =Normal Light AF Single light=0x%05x\n", light);
+            }
+
+
+            s5k5ca_sensor_write(client, 0xFCFC, 0xD000); 
+            s5k5ca_sensor_write(client, 0x0028, 0x7000); 
+
+            s5k5ca_sensor_write(client, 0x002A, 0x0252);
+            s5k5ca_sensor_write(client, 0x0F12, 0x0005); // AF Single 
+            
+            msleep(260); // delay 2 frames before af status check
+
+           if( cam_flash_on )
+           {
+           	printk("AE/AWB is not locked for flash!!! \n");    
+           }
+           else
+           {
+               s5k5ca_sensor_ae_awb_lock(client); // lock AWB/AE //insook0804     
+               locked_ae_awb = 1;
+            }
+            
+            do // remove low light check
+            {
+                if( count == 0)
+                    break;
+
+                s5k5ca_sensor_write(client, 0xFCFC, 0xD000);
+                s5k5ca_sensor_write(client, 0x002C, 0x7000);    
+                s5k5ca_sensor_write(client, 0x002E, 0x26FE);
+                msleep(100);
+                s5k5ca_sensor_read(client, 0x0F12, &tmpVal); 
+
+                count--;
+
+                printk("CAM 3M AF Status Value = %x \n", tmpVal); 
+
+            }
+            while( (tmpVal & 0x3) != 0x2 && (tmpVal & 0x3) != 0x3 );  // 2= success   3= fail
+
+            if(count == 0) // af timeout : move lens to initial position
+            {
+                s5k5ca_sensor_write(client, 0xFCFC, 0xD000); 
+                s5k5ca_sensor_write(client, 0x0028, 0x7000); 
+                
+                s5k5ca_sensor_write(client, 0x002A, 0x0254);  
+                s5k5ca_sensor_write(client, 0x0F12, DummyAFPosition);  //030E = 00FF ÀÔ·ÂÀ§ÇØ ´Ù¸¥°ª ÀÓ½ÃÀÔ·Â
+                
+                s5k5ca_sensor_write(client, 0x002A, 0x0252); 
+                s5k5ca_sensor_write(client, 0x0F12, 0x0004); // AF Manual 
+                
+                msleep(130); //AF Manual ¸í·É ÀÎ½ÄÀ§ÇÑ 1frame delay (ÀúÁ¶µµ 7.5fps 133ms °í·Á)
+                             //¿©±â±îÁö lens ¿òÁ÷ÀÓ ¾øÀ½
+                s5k5ca_sensor_write(client, 0x002A, 0x0254);  
+                s5k5ca_sensor_write(client, 0x0F12, AFPosition);  // 030E = 00FF ÀÔ·Â. lens ¿òÁ÷ÀÓ 
+                
+                msleep(50);  //lens°¡ ¸ñÇ¥ÁöÁ¡±îÁö µµ´ÞÇÏ±â À§ÇØ ÇÊ¿äÇÑ delay
+                	
+                ret = 0;
+                printk("CAM 3M AF_Single Mode Fail.==> TIMEOUT \n");
+                
+            }
+     
+
+            if((tmpVal & 0x3) == 0x03) // af fail : move lens to initial position
+            {
+                s5k5ca_sensor_write(client, 0xFCFC, 0xD000); 
+                s5k5ca_sensor_write(client, 0x0028, 0x7000); 
+                
+                s5k5ca_sensor_write(client, 0x002A, 0x0254);  
+                s5k5ca_sensor_write(client, 0x0F12, DummyAFPosition);  //030E = 00FF ÀÔ·ÂÀ§ÇØ ´Ù¸¥°ª ÀÓ½ÃÀÔ·Â
+                
+                s5k5ca_sensor_write(client, 0x002A, 0x0252); 
+                s5k5ca_sensor_write(client, 0x0F12, 0x0004); // AF Manual 
+                
+                msleep(130); //AF Manual ¸í·É ÀÎ½ÄÀ§ÇÑ 1frame delay (ÀúÁ¶µµ 7.5fps 133ms °í·Á)
+                             //¿©±â±îÁö lens ¿òÁ÷ÀÓ ¾øÀ½
+                s5k5ca_sensor_write(client, 0x002A, 0x0254);  
+                s5k5ca_sensor_write(client, 0x0F12, AFPosition);  // 030E = 00FF ÀÔ·Â. lens ¿òÁ÷ÀÓ 
+                
+                msleep(50);  //lens°¡ ¸ñÇ¥ÁöÁ¡±îÁö µµ´ÞÇÏ±â À§ÇØ ÇÊ¿äÇÑ delay
+                
+                ret = 0;
+                
+                printk("CAM 3M AF_Single Mode Fail.==> FAIL \n");        
+            }
+
+            if((tmpVal & 0x3) == 0x2) // af success
+            {
+                 ret = 1;
+                
+//                s5k5ca_sensor_write(client, 0x002A, 0x0252); // set to Manual for next snapshot and Single AF
+//                s5k5ca_sensor_write(client, 0x0F12, 0x0004); // AF Manual     
+
+                printk("CAM 3M AF_Single Mode SUCCESS. \r\n");
+            }
+            
+            printk("CAM:3M AF_SINGLE SET \r\n");
+            break;
+            
+        case 2: // auto
+            printk("[CAM-SENSOR] =Focus Mode -> auto\n");
+            
+            DummyAFPosition = 0x0001;
+            AFPosition = 0x0000;
+            
+            s5k5ca_sensor_write(client, 0xFCFC, 0xD000);    
+            s5k5ca_sensor_write(client, 0x0028, 0x7000);
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x10D4);    
+            s5k5ca_sensor_write(client, 0x0F12, 0x1002); // Set Normal AF Mode
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x0254);    
+            s5k5ca_sensor_write(client, 0x0F12, DummyAFPosition); // dummy lens position
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x0252);    
+            s5k5ca_sensor_write(client, 0x0F12, 0x0004); // AF Manual
+            
+            msleep(130);
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x0254);    
+            s5k5ca_sensor_write(client, 0x0F12, AFPosition); // move lens to initial position
+            
+            msleep(50); // Lens°¡ ÃÊ±â À§Ä¡·Î µ¹¾Æ°¡´Â ÀÌµ¿½Ã°£.           
+            
+            af_mode = 2;
+            break;
+
+        case 3: // infinity
+            printk("[CAM-SENSOR] =Focus Mode -> infinity\n");
+            
+            DummyAFPosition = 0x0001;
+            AFPosition = 0x0000;
+            
+            s5k5ca_sensor_write(client, 0xFCFC, 0xD000);
+            s5k5ca_sensor_write(client, 0x0028, 0x7000);
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x0254);    
+            s5k5ca_sensor_write(client, 0x0F12, DummyAFPosition);
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x0252);
+            s5k5ca_sensor_write(client, 0x0F12, 0x0004); // AF Manual
+            
+            msleep(130);
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x0254);    
+            s5k5ca_sensor_write(client, 0x0F12, AFPosition); // move lens to initial position
+            
+            msleep(50);
+            
+            af_mode = 3;
+            break;
+
+        case 4: // macro
+            printk("[CAM-SENSOR] =Focus Mode -> Macro\n");
+            
+            DummyAFPosition = 0x00F0;
+            AFPosition = 0x00D0;
+            
+            s5k5ca_sensor_write(client, 0xFCFC, 0xD000);	
+            s5k5ca_sensor_write(client, 0x0028, 0x7000);
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x10D4);
+            s5k5ca_sensor_write(client, 0x0F12, 0x1042);  // Set Macro AF mode
+
+            s5k5ca_sensor_write(client, 0x002A, 0x1066);
+            s5k5ca_sensor_write(client, 0x0F12, 0x1000);  // Lens position             
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x0254);	
+            s5k5ca_sensor_write(client, 0x0F12, DummyAFPosition); // set dummy position
+            
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x0252);	
+            s5k5ca_sensor_write(client, 0x0F12, 0x0004); // AF Manual
+            
+            msleep(130);
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x0254);	
+            s5k5ca_sensor_write(client, 0x0F12, AFPosition); // move lens to initial position
+            
+            msleep(50);
+            
+            af_mode = 4;
+            break;
+
+        case 5: // fixed, same as infinity
+            printk("[CAM-SENSOR] =Focus Mode -> fixed\n");	
+            
+            DummyAFPosition = 0x0001;
+            AFPosition = 0x0000;
+            
+            s5k5ca_sensor_write(client, 0xFCFC, 0xD000);
+            s5k5ca_sensor_write(client, 0x0028, 0x7000);
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x0254);    
+            s5k5ca_sensor_write(client, 0x0F12, DummyAFPosition); // set dummy position
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x0252);
+            s5k5ca_sensor_write(client, 0x0F12, 0x0004); // AF Manual
+            
+            msleep(130);
+            
+            s5k5ca_sensor_write(client, 0x002A, 0x0254);    
+            s5k5ca_sensor_write(client, 0x0F12, AFPosition); // move lens to initial position
+            
+            msleep(50);
+            
+            af_mode = 5;
+            break;
+            
+        default:
+            break;
+    }
+               
+    return ret;
+}
+
+static int s5k5ca_sensor_change_effect(struct i2c_client *client, int type)
+{
+	int i, size;	
+	
+	printk("Effects Mode ");
+
+	switch (type)
+	{
+		case 0:
+		default:
+			printk("-> Mode None\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_effect_off_00,"s5k5ca_effect_off_00");
+		break;
+
+		case 1:
+			printk("-> Mode Gray\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_effect_gray_00,"s5k5ca_effect_gray_00");
+		break;
+
+		case 2:
+			printk("-> Mode Sepia\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_effect_sepia_00,"s5k5ca_effect_sepia_00");
+		break;
+
+		case 3:
+			printk("-> Mode Negative\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_effect_negative_00,"s5k5ca_effect_negative_00");
+		break;
+		
+		case 4:
+			printk("-> Mode Aqua\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_effect_aqua_00,"s5k5ca_effect_aqua_00");
+		break;
+
+		case 5:
+			printk("-> Mode Sketch\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_effect_sketch_00,"s5k5ca_effect_sketch_00");
+		break;	
+
+	}
+
+	return 0;
+}
+
+static int s5k5ca_sensor_set_framerate(struct i2c_client *client, int type) //insook0625
+{
+	printk("Set FrameRate type = %d \n",type);
+	switch(type)
+	{
+		case 0:
+			s5k5ca_sensor_write_list(client,s5k5ca_fps_nonfix_00,"s5k5ca_fps_nonfix_00"); //camcorder -> camera hjkang_DC18
+		         printk("s5k5ca_fps_nonfix_00");
+			break;
+
+		case 15:
+			s5k5ca_sensor_write_list(client,s5k5ca_fps_15fix_00,"s5k5ca_fps_15fix_00"); //camera -> camcorder
+			printk("s5k5ca_fps_15fix_00");
+			break;
+
+		default:	
+		      s5k5ca_sensor_write_list(client,s5k5ca_fps_nonfix_00,"s5k5ca_fps_nonfix_00"); //camcorder -> camera hjkang_DC18
+		      printk("s5k5ca_fps_nonfix_00");
+		break;
+	}
+ 	set_af_after_capture = 0; //dha23 100520
+	return 0;
+}
+
+static int s5k5ca_sensor_change_br(struct i2c_client *client, int type)
+{
+	int i, size;
+
+	printk("Brightness Mode \n");
+	switch (type)
+	{
+		case 0: 
+		default :
+			printk("-> Brightness Minus 4\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_br_minus4_00,"s5k5ca_br_minus4_00");
+		break;
+
+		case 1:
+			printk("-> Brightness Minus 3\n");	
+			s5k5ca_sensor_write_list(client,s5k5ca_br_minus3_00,"s5k4ca_br_minus3_04");
+		break;
+		
+		case 2:
+			printk("-> Brightness Minus 2\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_br_minus2_00,"s5k4ca_br_minus2_04");
+		break;
+		
+		case 3:				
+			printk("-> Brightness Minus 1\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_br_minus1_00,"s5k4ca_br_minus1_04");
+		break;
+		
+		case 4:
+			printk("-> Brightness Zero\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_br_zero_00,"s5k5ca_br_zero_00");
+		break;
+
+		case 5:
+			printk("-> Brightness Plus 1\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_br_plus1_00,"s5k5ca_br_plus1_00");
+		break;
+
+		case 6:
+			printk("-> Brightness Plus 2\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_br_plus2_00,"s5k5ca_br_plus2_00");
+		break;
+
+		case 7:
+			printk("-> Brightness Plus 3\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_br_plus3_00,"s5k5ca_br_plus3_00");
+		break;
+
+		case 8:
+			printk("-> Brightness Plus 4\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_br_plus4_00,"s5k5ca_br_plus4_00");
+		break;
+		
+	}
+
+	return 0;
+}
+
+static int s5k5ca_sensor_change_wb(struct i2c_client *client, int type)
+{
+	int i, size;
+	
+	printk("White Balance Mode ");
+
+	switch (type)
+	{
+		case 0:
+		default :
+			printk("-> WB auto mode\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_wb_auto_00,"s5k5ca_wb_auto_00");
+			previous_WB_mode = type;
+		break;
+		
+		case 1:
+			printk("-> WB Sunny mode\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_wb_sunny_00,"s5k5ca_wb_sunny_00");
+			previous_WB_mode = type;
+		break;
+
+		case 2:
+			printk("-> WB Cloudy mode\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_wb_cloudy_00,"s5k5ca_wb_cloudy_00");
+			previous_WB_mode = type;
+		break;
+
+		case 3:
+			printk("-> WB Flourescent mode\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_wb_fluorescent_00,"s5k5ca_wb_fluorescent_00");
+			previous_WB_mode = type;
+		break;
+
+		case 4:
+			printk("-> WB Tungsten mode\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_wb_tungsten_00,"s5k5ca_wb_tungsten_00");
+			previous_WB_mode = type;
+		break;
+	}
+	return 0;
+}
+
+static int s5k5ca_sensor_change_scene_mode(struct i2c_client *client, int type)
+{
+	int i, size;
+
+	printk("[CAM-SENSOR] =Scene Mode %d",type);
+
+	if(previous_scene_mode != 0 && type != 0)
+	{
+		printk("-> Pre-auto-set");
+		s5k5ca_sensor_write_list(client,s5k5ca_scene_mode_off_00,"s5k5ca_scene_mode_off_00");
+	}
+
+	switch (type)
+	{
+		case 0:
+			printk("-> auto\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_scene_mode_off_00,"s5k5ca_scene_mode_off_00");
+			previous_scene_mode = type;
+			break;
+		case 1:
+			printk("-> portrait\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_scene_portrait_on_00,"s5k5ca_scene_portrait_on_00");
+			previous_scene_mode = type;
+			break;
+		case 2:
+			printk("-> landscape\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_scene_landscape_on_00,"s5k5ca_scene_landscape_on_00");
+			previous_scene_mode = type;
+			break;
+		case 3:
+			printk("-> night\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_nightmode_on_00,"s5k5ca_nightmode_on_00");
+			previous_scene_mode = type;
+			break;
+		case 4:
+			printk("-> sunset\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_scene_sunset_on_00,"s5k5ca_scene_sunset_on_00");
+			previous_scene_mode = type;
+			break;
+		case 5:
+			printk("-> sports\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_scene_sports_on_00,"s5k5ca_scene_sports_on_00");
+			previous_scene_mode = type;
+			break;
+		case 6:
+			printk("-> fireworks\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_scene_fireworks_on_00,"s5k5ca_scene_fireworks_on_00");
+			previous_scene_mode = type;
+			break;
+		case 7:
+			printk("-> candlelight\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_scene_candlelight_on_00,"s5k5ca_scene_candlelight_on_00");
+			previous_scene_mode = type;
+			break;
+		case 8:
+			printk("-> text\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_scene_text_on_00,"s5k5ca_scene_text_on_00");     
+			previous_scene_mode = type;
+			break;
+		case 9:
+			printk("-> beach snow\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_scene_beach_snow_on_00,"s5k5ca_scene_beach_snow_on_00");
+			previous_scene_mode = type;
+			break;
+		case 10:
+			printk("-> party indoor\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_scene_party_indoor_on_00,"s5k5ca_scene_party_indoor_on_00");
+			previous_scene_mode = type;
+			break;
+		case 11:
+			printk("-> BackLight\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_scene_backlight_00,"s5k5ca_scene_backlight_00");
+			previous_scene_mode = type;
+		break;
+		
+		case 12:
+			printk("-> Mode Dust Dawn\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_scene_dust_dawn_00,"s5k5ca_scene_dust_dawn_00");	
+			previous_scene_mode = type;
+		break;
+		
+		case 13:
+			printk("-> Fall Color\n");
+			previous_scene_mode = type;
+			s5k5ca_sensor_write_list(client,s5k5ca_scene_fall_color_00,"s5k5ca_scene_fall_color_00");
+		break;
+		
+		default :
+			printk("-> UnKnow Scene Mode\n");
+			break;
+	}
+
+	previous_scene_mode = type;
+
+	return 0;
+}
+
+static int s5k5ca_sensor_photometry(struct i2c_client *client, int type)
+{
+	int i, size;	
+	
+	printk("Metering Mode ");
+
+	switch (type)
+	{
+		case 0:
+			printk("-> spot\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_metering_spot,"s5k5ca_metering_spot");
+			break;
+		case 1:
+			printk("-> matrix\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_metering_matrix,"s5k5ca_metering_matrix");
+			break;
+		case 2:
+			printk("-> center\n");
+			s5k5ca_sensor_write_list(client,s5k5ca_metering_center,"s5k5ca_metering_center");
+			break;
+		default :
+			printk("-> UnKnown Metering Mode\n");
+			break;
+	
+	}
+	return 0;
+}
+
+static int s5k5ca_sensor_user_read(struct i2c_client *client, s5k5ca_t *r_data)
+{
+	s5k5ca_sensor_write(client, 0x002C, r_data->page);
+	s5k5ca_sensor_write(client, 0x002E, r_data->subaddr);
+	printk("s5k5ca_sensor_user_read 0x%04x, value 0x%04x\n", r_data->page, r_data->subaddr);
+		return s5k5ca_sensor_read(client, 0x0F12, &(r_data->value));
+
+}
+
+static int s5k5ca_sensor_user_write(struct i2c_client *client, unsigned short *w_data)
+{
+	printk("s5k5ca_sensor_user_write \n");
+	return s5k5ca_sensor_write(client, w_data[0], w_data[1]);
+}
+
+static int s5k5ca_sensor_exif_read(struct i2c_client *client, exif_data_t *exif_data)
+{
+	int ret = 0;
+	
+//unsigned short lux = 0;
+	unsigned long extime= 0;
+	unsigned long extime2 = 0;	
+	unsigned short extime1 = 0;
+	unsigned short iso_val = 0;
+
+	printk("s5k5ca_sensor_exif_read");
+	
+	s5k5ca_sensor_write(client, 0xFCFC, 0xD000);	/// exposure time     
+	s5k5ca_sensor_write(client, 0x002C, 0x7000);
+	s5k5ca_sensor_write(client, 0x002E, 0x23E8);
+	s5k5ca_sensor_read(client, 0x0F12, &extime1);	
+
+
+	s5k5ca_sensor_write(client, 0x002C, 0x7000);
+	s5k5ca_sensor_write(client, 0x002E, 0x23EA);
+	s5k5ca_sensor_read(client, 0x0F12, &extime2);
+
+	printk("s5k5ca_sensor_exif_read : extime1: %d, extime2 : %d ,\n",extime1, extime2);         
+
+	extime = extime1 | (extime2 << 16);
+
+        printk("s5k5ca_sensor_exif_read : extime: %x,\n",extime); 	
+
+
+/*	msleep(100);
+
+	s5k5ca_sensor_write(client, 0xFCFC, 0xD000);	/// Incident Light value 
+	s5k5ca_sensor_write(client, 0x002C, 0x7000);
+	s5k5ca_sensor_write(client, 0x002E, 0x12FE);
+	msleep(100);
+	s5k5ca_sensor_read(client, 0x0F12, &lux); */
+
+    s5k5ca_sensor_write(client, 0xFCFC, 0xD000);    /// exposure time
+    s5k5ca_sensor_write(client, 0x002C, 0x7000);
+    s5k5ca_sensor_write(client, 0x002E, 0x23EC);
+
+//  msleep(100);
+    s5k5ca_sensor_read(client, 0x0F12, &iso_val);
+
+    
+    iso_val = iso_val * 10;
+    iso_val = iso_val / 256;
+
+    if (iso_val < 10)
+    {
+        printk("[CAM-SENSOR] =%s iso_val_read < 1.0 \n",__func__,iso_val);
+        exif_data->iso = 50;
+    }
+    else if(iso_val >= 10 && iso_val < 19)
+        exif_data->iso = 50;
+    else if(iso_val >= 19 && iso_val < 23)
+        exif_data->iso = 100;
+    else if(iso_val >= 23 && iso_val < 28)
+        exif_data->iso = 200;
+    else if(iso_val >= 28)
+    {
+        printk("[CAM-SENSOR] =%s iso_val_read < 2.8 \n",__func__,iso_val);
+        exif_data->iso = 400;
+    }
+    else 
+    {
+        printk("[CAM-SENSOR] =%s iso_val_read unknown range \n",__func__,iso_val);
+        exif_data->iso = 0;
+    }
+
+	exif_data->exposureTime = extime/400;
+	exif_data->lux = lux_value;
+       printk("[CAM-SENSOR] =%s iso_val=%d, extime=%d, lux=%d,\n",__func__,exif_data->iso, extime/400,lux_value);
+
+	return ret;
+}
+
+static int s5k5ca_sensor_command(struct i2c_client *client, unsigned int cmd, void *arg)
+{
+	struct v4l2_control *ctrl;
+	unsigned short *w_data;		/* To support user level i2c */	
+	s5k5ca_short_t *r_data;
+	exif_data_t *exif_data;
+
+	int ret=0;
+
+	printk("[CAM-SENSOR] s5k5ca_sensor_command %d \n",cmd);
+
+	switch (cmd)
+	{
+		case SENSOR_INIT:
+			ret = sensor_init(client);
+			break;
+
+		case USER_ADD:
+			break;
+
+		case USER_EXIT:
+			s5k5ca_sensor_exit();
+			break;
+
+		case SENSOR_EFFECT:
+			ctrl = (struct v4l2_control *)arg;
+			s5k5ca_sensor_change_effect(client, ctrl->value);     
+			break;
+
+		case SENSOR_BRIGHTNESS:
+			ctrl = (struct v4l2_control *)arg;
+			s5k5ca_sensor_change_br(client, ctrl->value);
+			break;
+
+		case SENSOR_FRAMERATE: //insook0625
+			ctrl = (struct v4l2_control *)arg;
+			s5k5ca_sensor_set_framerate(client, ctrl->value);
+			break;
+
+		case SENSOR_WB:
+			ctrl = (struct v4l2_control *)arg;
+			s5k5ca_sensor_change_wb(client, ctrl->value);
+			break;
+
+		case SENSOR_SCENE_MODE:          
+			ctrl = (struct v4l2_control *)arg;
+			s5k5ca_sensor_change_scene_mode(client, ctrl->value);      
+			break;
+
+		case SENSOR_AF:
+			ctrl = (struct v4l2_control *)arg;
+			ret = s5k5ca_sensor_af_control(client, ctrl->value);
+			break;
+
+		case SENSOR_MODE_SET:
+			ctrl = (struct v4l2_control *)arg;
+			s5k5ca_sensor_mode_set(client, ctrl->value);
+			break;
+
+		case SENSOR_XGA:
+			s5k5ca_sensor_change_size(client, SENSOR_XGA);	
+			break;
+
+		case SENSOR_QXGA:
+			s5k5ca_sensor_change_size(client, SENSOR_QXGA);	
+			break;
+
+		case SENSOR_QSVGA:
+			s5k5ca_sensor_change_size(client, SENSOR_QSVGA);
+			break;
+
+		case SENSOR_VGA:
+			s5k5ca_sensor_change_size(client, SENSOR_VGA);
+			break;
+
+		case SENSOR_SVGA:
+			s5k5ca_sensor_change_size(client, SENSOR_SVGA);
+			break;
+
+		case SENSOR_SXGA:
+			s5k5ca_sensor_change_size(client, SENSOR_SXGA);
+			break;
+
+		case SENSOR_UXGA:
+         		s5k5ca_sensor_change_size(client, SENSOR_UXGA);
+			break;
+
+		case SENSOR_USER_WRITE:
+			w_data = (unsigned short *)arg;
+			s5k5ca_sensor_user_write(client, w_data);
+			break;
+
+		case SENSOR_USER_READ:
+			r_data = (s5k5ca_short_t *)arg;
+			s5k5ca_sensor_user_read(client, r_data);
+			break;
+	
+		case SENSOR_FLASH_CAMERA:
+			ctrl = (struct v4l2_control *)arg;   
+#ifdef CONFIG_FLASH_AAT1271A
+			aat1271a_falsh_camera_control(ctrl->value);	
+#endif			
+			break;
+
+		case SENSOR_FLASH_MOVIE:
+			ctrl = (struct v4l2_control *)arg;
+			cam_flash_on = ctrl->value;//insook0804    
+			printk("[CAM-SENSOR] SENSOR_FLASH_CAMERA %d \n",cam_flash_on);        
+#ifdef CONFIG_FLASH_AAT1271A
+			aat1271a_falsh_movie_control(ctrl->value);	
+#endif
+			break;
+
+		case SENSOR_EXIF_DATA:
+			exif_data = (exif_data_t *)arg;
+			s5k5ca_sensor_exif_read(client, exif_data);	
+			break;
+
+		case SENSOR_PHOTOMETRY:
+		        ctrl = (struct v4l2_control *)arg;
+			s5k5ca_sensor_photometry(client, ctrl->value);
+			break;
+
+		default:
+		    printk("[CAM-SENSOR] no command type %d \n",cmd);
+			break;
+	}
+
+	return ret;
+}
+static inline struct s5k5ca_state *to_state(struct v4l2_subdev *sd)
+{
+	return container_of(sd, struct s5k5ca_state, sd);
+}
+
+
+static int s5k5ca_s_fmt(struct v4l2_subdev *sd,
+			struct v4l2_mbus_framefmt *mf)
+{
+	return 0;
+	printk("s5k5ca_s_fmt %d * %d\n" ,mf->width,mf->height);
+	int err = 0;
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	struct s5k5ca_state *s5k5ca = to_state(client);
+
+	switch(mf->width) {
+		case 640:
+			s5k5ca_sensor_change_size(client, SENSOR_VGA);
+		break;
+		case 320:
+			s5k5ca_sensor_change_size(client, SENSOR_QVGA);
+		break;
+	}
+	return err;
+}
+
+static int s5k5ca_enum_framesizes(struct v4l2_subdev *sd, \
+					struct v4l2_frmsizeenum *fsize)
+{
+	int err = 0;
+
+	return err;
+}
+
+static int s5k5ca_enum_frameintervals(struct v4l2_subdev *sd,
+					struct v4l2_frmivalenum *fival)
+{
+	int err = 0;
+
+	return err;
+}
+
+static enum v4l2_mbus_pixelcode s5k5ca_codes[] = {
+	V4L2_MBUS_FMT_YUYV8_2X8,
+	V4L2_MBUS_FMT_YVYU8_2X8,
+	V4L2_MBUS_FMT_UYVY8_2X8,
+	V4L2_MBUS_FMT_RGB565_2X8_LE,
+};
+
+static int s5k5ca_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
+			   enum v4l2_mbus_pixelcode *code)
+{
+
+	if (index >= ARRAY_SIZE(s5k5ca_codes))
+		return -EINVAL;
+
+	*code = s5k5ca_codes[index];
+	return 0;
+}
+
+static int s5k5ca_g_fmt(struct v4l2_subdev *sd,
+			struct v4l2_mbus_framefmt *mf)
+{
+	//printk("--------s5k5ca_g_fmt-----\n");
+	int err = 0;
+
+	return err;
+}
+
+static int s5k5ca_s_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *param)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int err = 0;
+
+	dev_dbg(&client->dev, "%s: numerator %d, denominator: %d\n", \
+		__func__, param->parm.capture.timeperframe.numerator, \
+		param->parm.capture.timeperframe.denominator);
+
+	return err;
+}
+
+static int s5k5ca_g_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *param)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int err = 0;
+
+	dev_dbg(&client->dev, "%s\n", __func__);
+
+	return err;
+}
+
+static int s5k5ca_try_fmt(struct v4l2_subdev *sd,
+			  struct v4l2_mbus_framefmt *mf)
+{
+	int err = 0;
+
+	return err;
+}
+
+static struct v4l2_queryctrl s5k5ca_controls[] = {
+	{
+		/*
+		 * For now, we just support in preset type
+		 * to be close to generic WB system,
+		 * we define color temp range for each preset
+		 */
+		.id = V4L2_CID_WHITE_BALANCE_TEMPERATURE,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "White balance in kelvin",
+		.minimum = 0,
+		.maximum = 10000,
+		.step = 1,
+		.default_value = 0,	/* FIXME */
+	},
+	{
+		.id = V4L2_CID_AUTO_WHITE_BALANCE,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "Auto white balance",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_BRIGHTNESS,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Brightness",
+		.minimum = -80,
+		.maximum = 80,
+		.step = 1,
+		.default_value = 0x08,
+	},
+	{
+		.id = V4L2_CID_CONTRAST,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Contrast",
+		.minimum = 0x10,
+		.maximum = 0x30,
+		.step = 1,
+		.default_value = 0x20,
+	},
+	{
+		.id = V4L2_CID_SATURATION,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Saturation",
+		.minimum = 0x00,
+		.maximum = 0x80,
+		.step = 1,
+		.default_value = 0x40,
+	},
+	{
+		.id = V4L2_CID_SHARPNESS,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Sharpness",
+		.minimum = 0x00,
+		.maximum = 0x09,
+		.step = 1,
+		.default_value = 0x04,
+	},
+	{
+		.id = V4L2_CID_HUE,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Hue",
+		.minimum = 0,
+		.maximum = 21,
+		.step = 1,
+		.default_value = 10,
+	},
+	{
+		.id = V4L2_CID_POWER_LINE_FREQUENCY,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Power line frequency",
+		.minimum = 0,
+		.maximum = 2,
+		.step = 1,
+		.default_value = 0,
+	},
+};
+
+static inline struct v4l2_queryctrl const *s5k5ca_find_qctrl(int id)
+{
+
+	printk("v4l2_queryctrl \n");
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(s5k5ca_controls); i++)
+		if (s5k5ca_controls[i].id == id)
+			return &s5k5ca_controls[i];
+
+	return NULL;
+}
+
+static int s5k5ca_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
+{
+	printk("s5k5ca_queryctrl \n");
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(s5k5ca_controls); i++) {
+		if (s5k5ca_controls[i].id == qc->id) {
+			memcpy(qc, &s5k5ca_controls[i], \
+				sizeof(struct v4l2_queryctrl));
+			return 0;
+		}
+	}
+
+	return -EINVAL;
+}
+
+static int s5k5ca_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
+{
+	int err = 0;
+	return err;
+}
+static unsigned char regABVal = 0x06;
+static unsigned char hueTable[21][3] = {{0x0, 0x80, 0},
+				{0x14, 0x7E, 0},
+				{0x27, 0x79, 0},
+				{0x3A, 0x72, 0},
+				{0x4B, 0x67, 0},
+				{0x5A, 0x5A, 0},
+				{0x67, 0x4B, 0},
+				{0x72, 0x3A, 0},
+				{0x79, 0x27, 0},
+				{0x7E, 0x14, 0},
+				{0x80, 0x00, 1},
+				{0x7E, 0x14, 1},
+				{0x79, 0x27, 1},
+				{0x72, 0x3A, 1},
+				{0x67, 0x4B, 1},
+				{0x5A, 0x5A, 1},
+				{0x4B, 0x67, 1},
+				{0x3A, 0x72, 1},
+				{0x27, 0x79, 1},
+				{0x14, 0x7E, 1},
+				{0x00, 0x80, 1}};
+
+void s5k5ca_color_effect(struct v4l2_subdev *sd, int which)
+{return;}
+
+static int s5k5ca_i2c_write(struct v4l2_subdev *sd, unsigned char i2c_data[],
+				unsigned char length)
+{
+
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	return i2c_smbus_write_byte_data(client, i2c_data[0], i2c_data[1]);
+}
+
+static int s5k5ca_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
+{
+	printk("s5k5ca_s_ctrl \n");
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int i, cnt = 0, err = -EINVAL;
+	unsigned char ctrlreg[3][2];
+
+	printk("In %s() ctrl id is 0x%x value 0xis %x\n", 
+			__func__,
+			ctrl->id,
+			ctrl->value);
+
+	switch (ctrl->id) {
+	case V4L2_CID_BRIGHTNESS:
+		dev_dbg(&client->dev, "%s: V4L2_CID_BRIGHTNESS\n", __func__);
+		ctrlreg[0][0] = 0xAB;
+		ctrlreg[1][0] = 0x9B;
+		if (ctrl->value >= 0) {
+			regABVal &= ~BIT(3);
+			ctrlreg[1][1] = ctrl->value;
+		} else {
+			regABVal |= BIT(3);
+			ctrlreg[1][1] = -ctrl->value;
+		}
+		ctrlreg[0][1] = regABVal;
+		cnt = 2;
+		break;
+
+	case V4L2_CID_CONTRAST:
+		dev_dbg(&client->dev, "%s: V4L2_CID_CONTRAST\n", __func__);
+		ctrlreg[0][0] = 0x9C;
+		ctrlreg[0][1] = ctrl->value;
+		cnt = 1;
+		break;
+
+	case V4L2_CID_SATURATION:
+		dev_dbg(&client->dev, "%s: V4L2_CID_SATURATION\n", __func__);
+		ctrlreg[0][0] = 0xA7;
+		ctrlreg[1][0] = 0xA8;
+		ctrlreg[0][1] = ctrlreg[1][1] = ctrl->value;
+		cnt = 2;
+		break;
+
+	case V4L2_CID_SHARPNESS:
+		dev_dbg(&client->dev, "%s: V4L2_CID_SHARPNESS\n", __func__);
+		ctrlreg[0][0] = 0x8F;
+		ctrlreg[0][1] = ctrl->value;
+		cnt = 1;
+		break;
+
+	case V4L2_CID_HUE:
+		dev_dbg(&client->dev, "%s: V4L2_CID_HUE\n", __func__);
+		if (hueTable[ctrl->value][2] == 0) {
+			regABVal &= ~BIT(1);
+			regABVal |= BIT(0);
+		} else {
+			regABVal |= BIT(1);
+			regABVal &= ~BIT(0);
+		}
+		ctrlreg[0][0] = 0xA9;
+		ctrlreg[0][1] = hueTable[ctrl->value][0];
+		ctrlreg[1][0] = 0xAA;
+		ctrlreg[1][1] = hueTable[ctrl->value][1];
+		ctrlreg[2][0] = 0xAB;
+		ctrlreg[2][1] = regABVal;
+		cnt = 3;
+		break;
+
+	case V4L2_CID_POWER_LINE_FREQUENCY:
+		dev_dbg(&client->dev, "%s: V4L2_CID_POWER_LINE_FREQUENCY\n", __func__);
+		ctrlreg[0][0] = 0x22;
+		ctrlreg[1][0] = 0x23;
+		if ((ctrl->value == 0) || (ctrl->value == 2)) { // off or 60Hz
+			ctrlreg[0][1] = 0x7F;
+			ctrlreg[1][1] = 0x03;
+			cnt = 2;
+		} else if (ctrl->value == 1){ // 50Hz
+			ctrlreg[0][1] = 0x99;
+			ctrlreg[1][1] = 0x02;
+			cnt = 2;
+		}
+		break;
+#if 0	//lxy
+	case V4L2_CID_SCENE_MODE:
+		GC0308_night_mode(sd, ctrl->value);
+		return;
+		break;
+#endif
+
+	case V4L2_CID_COLORFX:
+   		dev_err(&client->dev, "%s: in color effect %d\n", 
+					__func__,   
+					ctrl->value);
+		s5k5ca_color_effect(sd, ctrl->value);
+		return 0;
+		break;
+
+#if 0	//lxy
+	case V4L2_CID_WHITE_BALANCE_PRESET:
+		dev_err(&client->dev, "%s: in white balance preset %d\n", 
+					__func__,   
+					ctrl->value);
+		s5k5ca_white_balance_preset(sd, ctrl->value);
+		return 0;
+		break;
+#endif
+
+	default:
+		dev_err(&client->dev, "%s: no such control id 0x%x\n", __func__, ctrl->id);
+		break;  
+	}
+
+	for (i = 0; i < cnt; ++i)
+		err = s5k5ca_i2c_write(sd, ctrlreg[i], 2);
+
+	if (err < 0) {
+		dev_dbg(&client->dev, "%s: vidioc_s_ctrl failed: %d\n", __func__, ctrl->id);
+	}
+
+	return err;
+}
+
+
+static const struct v4l2_subdev_video_ops s5k5ca_video_ops = {
+	.g_mbus_fmt = s5k5ca_g_fmt,
+	.s_mbus_fmt = s5k5ca_s_fmt,
+	.enum_framesizes = s5k5ca_enum_framesizes,
+	.enum_frameintervals = s5k5ca_enum_frameintervals,
+	.enum_mbus_fmt = s5k5ca_enum_fmt,
+	.try_mbus_fmt = s5k5ca_try_fmt,
+	.g_parm = s5k5ca_g_parm,
+	.s_parm = s5k5ca_s_parm,
+};
+static const struct v4l2_subdev_core_ops s5k5ca_core_ops = {
+	.init	= sensor_init,
+	.queryctrl = s5k5ca_queryctrl,
+	.g_ctrl = s5k5ca_g_ctrl,
+	.s_ctrl = s5k5ca_s_ctrl,
+};
+static const struct v4l2_subdev_ops s5k5ca_ops = {
+	.core = &s5k5ca_core_ops,
+	.video = &s5k5ca_video_ops,
+};
+
+static int s5k5ca_set_bus_param(struct soc_camera_device *icd,
+				unsigned long flags)
+{
+	return 0;
+	struct soc_camera_link *icl = to_soc_camera_link(icd);
+	unsigned long width_flag = flags & SOCAM_DATAWIDTH_MASK;
+
+	/* Only one width bit may be set */
+	if (icl->set_bus_param)
+		return icl->set_bus_param(icl, width_flag);
+
+	/*
+	 * Without board specific bus width settings we support only the
+	 * sensors native bus width witch are tested working
+	 */
+	if (width_flag & (SOCAM_DATAWIDTH_10 | SOCAM_DATAWIDTH_8))
+		return 0;
+
+	return 0;
+}
+
+static unsigned long s5k5ca_query_bus_param(struct soc_camera_device *icd)
+{
+	struct soc_camera_link *icl = to_soc_camera_link(icd);
+	unsigned long flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_MASTER |
+		SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_HIGH |
+		SOCAM_DATA_ACTIVE_HIGH;
+
+	if (icl->query_bus_param)
+		flags |= icl->query_bus_param(icl) & SOCAM_DATAWIDTH_MASK;
+	else
+		flags |= SOCAM_DATAWIDTH_8;
+
+	return soc_camera_apply_sensor_flags(icl, flags);
+}
+
+static struct soc_camera_ops s5k5ca_camera_ops = {
+	.set_bus_param		= s5k5ca_set_bus_param,
+	.query_bus_param	= s5k5ca_query_bus_param,
+	.controls		= s5k5ca_controls,
+	.num_controls		= ARRAY_SIZE(s5k5ca_controls),
+};
+
+static int s5k5ca_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+	struct s5k5ca_state *state;
+	struct v4l2_subdev *sd;
+	struct soc_camera_device  *icd = client->dev.platform_data;
+	struct i2c_adapter        *adapter = to_i2c_adapter(client->dev.parent);
+	struct soc_camera_link    *icl;
+
+	state = kzalloc(sizeof(struct s5k5ca_state), GFP_KERNEL);
+	if (state == NULL)
+		return -ENOMEM;
+
+	sd = &state->sd;
+	strcpy(sd->name, "S5K5CA");
+
+	icl = to_soc_camera_link(icd);
+	if (!icl) {
+		dev_err(&adapter->dev,
+			"S5K5CA: Missing platform_data for driver\n");
+		return -EINVAL;
+	}
+
+	/* Registering subdev */
+	v4l2_i2c_subdev_init(sd, client, &s5k5ca_ops);
+
+	icd->ops = &s5k5ca_camera_ops;
+
+	sensor_init(client);
+	
+	//s_i2c_client = client;
+	//s_proc = create_proc_entry(S5K5CA_PROC_NAME, 0666, &proc_root);
+#if 0
+	if (s_proc != NULL)
+	{
+		s_proc->write_proc = s5k5ca_writeproc;
+		s_proc->read_proc = s5k5ca_readproc;
+	}
+#endif
+	dev_info(&client->dev, "s5k5ca has been probed\n");
+
+	return 0;
+}
+
+static int s5k5ca_i2c_detect(struct i2c_client *client, int kind, struct i2c_board_info *info)
+{
+	strlcpy(info->type, "S5K5CA", I2C_NAME_SIZE);
+	return 0;
+}
+
+static int __devexit s5k5ca_i2c_remove(struct i2c_client *client)
+{
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+//	if (s_proc != NULL)
+	//	remove_proc_entry(GC0308_PROC_NAME, &proc_root);
+
+	v4l2_device_unregister_subdev(sd);
+	kfree(to_state(sd));
+	return 0;
+    printk("[CAM-SENSOR][s5k5ca] removed\n");
+	return 0;
+}
+
+static struct i2c_device_id s5k5ca_id[] = {
+	{ "S5K5CA", 0 },
+	{}
+};
+
+MODULE_DEVICE_TABLE(i2c, s5k5ca_id);
+
+static struct i2c_driver s5k5ca_driver = {
+	.driver = {
+		.owner	= THIS_MODULE,
+		.name = "S5K5CA",
+	},
+	.class 		= I2C_CLASS_HWMON,
+	.probe		= s5k5ca_i2c_probe,
+	.remove		= __devexit_p(s5k5ca_i2c_remove),
+	.detect		= s5k5ca_i2c_detect,
+	.command = s5k5ca_sensor_command,
+	.id_table	= s5k5ca_id,
+//	.address_data	= &s5k5ca_addr_data,
+};
+
+static __init s5k5ca_sensor_init(void)
+{
+	return i2c_add_driver(&s5k5ca_driver);
+}
+
+static void s5k5ca_sensor_exit(void)
+{
+	s5k5ca_sensor_disable();
+
+	end_thread();
+//	if (s5k5ca_data.sensor != NULL)
+	//	s3c_camif_unregister_sensor(&s5k5ca_data);
+}
+
+static struct v4l2_input s5k5ca_input = {
+	.index		= 0,
+	.name		= "Camera Input (S5K5CA)",
+	.type		= V4L2_INPUT_TYPE_CAMERA,
+	.audioset	= 1,
+	.tuner		= 0,
+	.std		= V4L2_STD_PAL_BG | V4L2_STD_NTSC_M,
+	.status		= 0,
+};
+
+static struct v4l2_input_handler s5k5ca_input_handler = {
+	s5k5ca_sensor_init,
+	s5k5ca_sensor_exit	
+};
+
+static __exit s5k5ca_sensor_remove(void)
+{
+	//printk("------s5k5ca_sensor_remove-------\n");
+	i2c_del_driver(&s5k5ca_driver);
+}
+
+module_init(s5k5ca_sensor_init)
+module_exit(s5k5ca_sensor_remove)
diff -uNra linux-3.0.82/drivers/media/video/.ls1c_s5k5ca.c.swp linux-3.0.82x/drivers/media/video/.ls1c_s5k5ca.c.swp
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/drivers/media/video/ls1c_s5k5ca-huawei.c linux-3.0.82x/drivers/media/video/ls1c_s5k5ca-huawei.c
--- linux-3.0.82/drivers/media/video/ls1c_s5k5ca-huawei.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/ls1c_s5k5ca-huawei.c	2017-09-23 03:42:49.546676506 +0800
@@ -0,0 +1,1138 @@
+/*
+ *  Copyright (C) 2004 Samsung Electronics
+ *             SW.LEE <hitchcar@samsung.com>
+ *            - based on Russell King : pcf8583.c
+ * 	      - added  smdk24a0, smdk2440
+ *            - added  poseidon (s3c24a0+wavecom)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Driver for FIMC2.x Camera Decoder
+ *
+ */
+
+#include <linux/module.h>    
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/i2c.h>
+//#include <linux/i2c-id.h>
+#include <linux/slab.h>
+#include <linux/string.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-subdev.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/clk.h>
+#include <media/soc_camera.h>
+#include <media/soc_mediabus.h>
+
+//#include <mach/hardware.h>
+
+//#include <plat/gpio-cfg.h>
+//#include <plat/egpio.h>
+
+#include "s3c_camif.h"
+
+#include "s5k5ca.h" 
+#include "s5k5ca_0723.h"                               
+#include <linux/proc_fs.h>
+#include "../../../fs/proc/internal.h"
+/* Camera functional setting values configured by user concept */
+struct s5k5ca_userset {
+	signed int exposure_bias;	/* V4L2_CID_EXPOSURE */
+	unsigned int ae_lock;
+	unsigned int awb_lock;
+	unsigned int auto_wb;	/* V4L2_CID_AUTO_WHITE_BALANCE */
+	unsigned int manual_wb;	/* V4L2_CID_WHITE_BALANCE_PRESET */
+	unsigned int wb_temp;	/* V4L2_CID_WHITE_BALANCE_TEMPERATURE */
+	unsigned int effect;	/* Color FX (AKA Color tone) */
+	unsigned int contrast;	/* V4L2_CID_CONTRAST */
+	unsigned int saturation;	/* V4L2_CID_SATURATION */
+	unsigned int sharpness;		/* V4L2_CID_SHARPNESS */
+	unsigned int glamour;
+};
+
+struct s5k5ca_platform_data {
+	unsigned int default_width;
+	unsigned int default_height;
+	unsigned int pixelformat;
+	int freq;	/* MCLK in KHz */
+
+	/* This SoC supports Parallel & CSI-2 */
+	int is_mipi;
+};
+
+struct s5k5ca_state {
+	struct s5k5ca_platform_data *pdata;
+	struct v4l2_subdev sd;
+	struct v4l2_pix_format pix;
+	struct v4l2_fract timeperframe;
+	struct s5k5ca_userset userset;
+	int freq;	/* MCLK in KHz */
+	int is_mipi;
+	int isize;
+	int ver;
+	int fps;
+};
+
+// function define
+//#define CONFIG_LOAD_FILE            
+#define I2C_BURST_MODE //dha23 100325 Ä«¸Þ¶ó ±âµ¿ ½Ã°£ ÁÙÀÌ±â À§ÇØ I2C Burst mode »ç¿ë.
+// Purpose of verifying I2C operaion. must be ignored later.    
+//#define LOCAL_CONFIG_S5K5CA_I2C_TEST
+static struct i2c_client * s_i2c_client = NULL;
+static struct i2c_driver s5k5ca_driver;
+int set_af_after_capture = 0; //dha23 100518
+static struct proc_dir_entry * s_proc = NULL;
+static uint8_t s5k5ca_init_flag = false;
+
+static void s5k5ca_sensor_gpio_init(void);
+void s5k5ca_sensor_enable(void);
+static void s5k5ca_sensor_disable(void);
+
+static int s5k5ca_sensor_init(void);
+static void s5k5ca_sensor_exit(void);
+
+static int s5k5ca_sensor_change_size(struct i2c_client *client, int size);
+
+#ifdef CONFIG_FLASH_AAT1271A
+	extern int aat1271a_flash_init(void);
+	extern void aat1271a_flash_exit(void);
+	extern void aat1271a_falsh_camera_control(int ctrl);
+	extern void aat1271a_falsh_movie_control(int ctrl);
+#endif
+
+#ifdef CONFIG_LOAD_FILE
+	static int s5k5ca_regs_table_write(char *name);
+#endif
+
+/* 
+ * MCLK: 24MHz, PCLK: 54MHz
+ * 
+ * In case of PCLK 54MHz
+ *
+ * Preview Mode (1024 * 768)  
+ * 
+ * Capture Mode (2048 * 1536)
+ * 
+ * Camcorder Mode
+ */
+static camif_cis_t s5k5ca_data = {
+	itu_fmt:       	CAMIF_ITU601,
+	order422:      	CAMIF_CRYCBY,
+	camclk:        	24000000,		
+	source_x:      	1024,		
+	source_y:      	768,
+	win_hor_ofst:  	0,
+	win_ver_ofst:  	0,
+	win_hor_ofst2: 	0,
+	win_ver_ofst2: 	0,
+	polarity_pclk: 	0,
+	polarity_vsync:	1,
+	polarity_href: 	0,
+	reset_type:		CAMIF_RESET,
+	reset_udelay: 	5000,
+};
+
+/* #define S5K5CA_ID	0x78 */
+#define S5K5CA_ID	0x78 
+static unsigned short s5k5ca_normal_i2c[] = { (S5K5CA_ID >> 1), I2C_CLIENT_END };
+static unsigned short s5k5ca_ignore[] = { I2C_CLIENT_END };
+static unsigned short s5k5ca_probe[] = { I2C_CLIENT_END };
+
+static int previous_scene_mode = -1;
+static int previous_WB_mode = 0;
+static int af_mode = -1;
+static unsigned short lux_value = 0;
+int cam_flash_on = 0; //insook0804
+int locked_ae_awb = 0; //insook0901
+
+bool isS5k5caEnabled = false; 
+
+
+
+//static unsigned short AFPosition = 0x00FF; 
+//static unsigned short DummyAFPosition = 0x00FE; 
+
+static unsigned short AFPosition = 0x0000; 
+static unsigned short DummyAFPosition = 0x0001; 
+
+
+#if 0
+static struct i2c_client_address_data s5k5ca_addr_data = {
+	.normal_i2c = s5k5ca_normal_i2c,
+	.ignore		= s5k5ca_ignore,
+	.probe		= s5k5ca_probe,
+};
+#endif
+
+static int s5k5ca_sensor_read(struct i2c_client *client,
+		unsigned short subaddr, unsigned short *data)
+{
+	int ret;
+	unsigned char buf[2];
+	struct i2c_msg msg = { client->addr, 0, 2, buf };
+	
+	buf[0] = (subaddr >> 8);
+	buf[1] = (subaddr & 0xFF);
+
+	ret = i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;
+	if (ret == -EIO) 
+		goto error;
+
+	msg.flags = I2C_M_RD;
+	
+	ret = i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;
+	if (ret == -EIO) 
+		goto error;
+
+	*data = ((buf[0] << 8) | buf[1]);
+
+error:
+	return ret;
+}
+
+static int s5k5ca_sensor_write(struct i2c_client *client,unsigned short subaddr, unsigned short val)
+{
+
+
+	//printk("   s5k5ca_sensor_write   (%x)\n", val);
+
+	if(subaddr == 0xdddd)
+	{
+			msleep(val);
+			printk("delay time(%d msec)\n", val);
+	}	
+	else
+	{					
+		unsigned char buf[4];
+		struct i2c_msg msg = { client->addr, 0, 4, buf };
+
+		buf[0] = (subaddr >> 8);
+		buf[1] = (subaddr & 0xFF);
+		buf[2] = (val >> 8);
+		buf[3] = (val & 0xFF);
+
+//		return i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;
+                if(i2c_transfer(client->adapter, &msg, 1) == 1)
+                    return 0;
+                else{
+                    printk("[**ASWOOGI**] s5k5ca_sensor_write_list error\n"); 
+                    return -EIO;
+                }
+	}
+}
+
+
+
+
+#if 1
+#define S5K5CA_CHIP_ID 0x05ca
+#define MODEL_TRULY 0
+#define MODEL_SUNNY 1
+#define S5K5CA_IS_ON 1
+#define CDBG(fmt, args...) printk(KERN_INFO "s5k5ca.c: " fmt, ## args)
+
+
+static struct  i2c_client *s5k5ca_client = NULL;
+static unsigned int reg_num;
+
+static uint16_t s5k5ca_model_id = MODEL_SUNNY;
+static struct s5k5ca_i2c_reg_conf * p_s5k5ca_init_reg_config;
+
+static int s5k5ca_i2c_rxdata(unsigned short saddr,
+                             unsigned char *rxdata, int length)
+{
+    struct i2c_msg msgs[] =
+    {
+        {
+            .addr  = saddr,
+            .flags = 0,
+            .len = 2,
+            .buf = rxdata,
+        },
+        {
+            .addr  = saddr,
+            .flags = I2C_M_RD,
+            .len = length,
+            .buf = rxdata,
+        },
+    };
+
+    if (i2c_transfer(s5k5ca_client->adapter, msgs, 2) < 0)
+    {
+        CDBG("s5k5ca_i2c_rxdata failed!\n");
+        return -EIO;
+    }
+
+    return 0;
+}
+static int32_t s5k5ca_i2c_read_w(unsigned short raddr, unsigned short *rdata)
+{
+    int32_t rc = 0;
+    unsigned char buf[4];
+
+    if (!rdata)
+    {
+        return -EIO;
+    }
+
+    memset(buf, 0, sizeof(buf));
+
+    buf[0] = (raddr & 0xFF00) >> 8;
+    buf[1] = (raddr & 0x00FF);
+
+    rc = s5k5ca_i2c_rxdata(s5k5ca_client->addr, buf, 2);
+    if (rc < 0)
+    {
+        return rc;
+    }
+
+    *rdata = buf[0] << 8 | buf[1];
+
+    if (rc < 0)
+    {
+        CDBG("s5k5ca_i2c_read failed!\n");
+    }
+
+    return rc;
+}
+static int32_t s5k5ca_i2c_txdata(unsigned short saddr,
+                                 unsigned char *txdata, int length)
+{
+    int32_t i  = 0;
+    int32_t rc = -EFAULT;
+    struct i2c_msg msg[] =
+    {
+        {
+            .addr  = saddr,
+            .flags = 0,
+            .len = length,
+            .buf = txdata,
+        },
+    };
+
+    for (i = 0; i < 3; i++)
+    {
+        rc = i2c_transfer(s5k5ca_client->adapter, msg, 1);
+        if (0 <= rc)
+        {
+            return 0;
+        }
+    }
+
+    if (3 == i)
+    {
+        CDBG("s5k5ca_i2c_txdata faild\n");
+        return -EIO;
+    }
+
+    return 0;
+}
+
+
+static int32_t s5k5ca_i2c_write_w(unsigned short waddr, unsigned short wdata)
+{
+    int32_t rc = -EFAULT;
+    unsigned char buf[4];
+
+    memset(buf, 0, sizeof(buf));
+    buf[0] = (waddr & 0xFF00) >> 8;
+    buf[1] = (waddr & 0x00FF);
+    buf[2] = (wdata & 0xFF00) >> 8;
+    buf[3] = (wdata & 0x00FF);
+
+    rc = s5k5ca_i2c_txdata(s5k5ca_client->addr, buf, 4);
+
+    if (rc < 0)
+    {
+        CDBG("i2c_write_w failed, addr = 0x%x, val = 0x%x!\n",
+             waddr, wdata);
+    }
+
+    return rc;
+}
+
+static int32_t s5k5ca_i2c_write_w_table(struct s5k5ca_i2c_reg_conf const *reg_conf_tbl,
+                                        int                               num_of_items_in_table)
+{
+    int i;
+    int32_t rc = -EFAULT;
+
+    for (i = 0; i < num_of_items_in_table; i++)
+    {
+        rc = s5k5ca_i2c_write_w(reg_conf_tbl->waddr, reg_conf_tbl->wdata);
+        if (rc < 0)
+        {
+		printk("i2c write break;\n");
+            break;
+        }
+
+        reg_conf_tbl++;
+    }
+
+    return rc;
+}
+
+static int s5k5ca_probe_init_sensor(struct i2c_client *client)
+{
+    int rc;
+    unsigned short chipid;
+
+
+    /* Set the sensor reset when camera is not initialization. */
+    if (false == s5k5ca_init_flag)
+    {
+    }
+
+    mdelay(20);
+
+    /* Set the soft reset to reset the chip and read the chip ID when camera is not initialization. */
+    if (false == s5k5ca_init_flag)
+    {
+        rc = s5k5ca_i2c_write_w(0x0010, 0x0001);
+        if (rc < 0)
+        {
+            CDBG("s5k5ca_i2c_write_w 0x0010 0x0001 rc=%d", rc);
+            goto init_probe_fail;
+        }
+
+        mdelay(10);
+
+        rc = s5k5ca_i2c_write_w(0x0010, 0x0000);
+        if (rc < 0)
+        {
+            CDBG("s5k5ca_i2c_write_w 0x0010 0x0000 rc=%d", rc);
+            goto init_probe_fail;
+        }
+
+        mdelay(10);
+
+        rc = s5k5ca_i2c_write_w(0x002c, 0x0000);
+        if (rc < 0)
+        {
+            CDBG("s5k5ca_i2c_write_w 0x002c 0x0000 rc=%d", rc);
+            goto init_probe_fail;
+        }
+
+        rc = s5k5ca_i2c_write_w(0x002e, 0x0040);
+        if (rc < 0)
+        {
+            CDBG("s5k5ca_i2c_write_w 0x002e 0x0040 rc=%d", rc);
+            goto init_probe_fail;
+        }
+
+        /* 3. Read sensor Model ID: */
+        rc = s5k5ca_i2c_read_w(0x0f12, &chipid);
+        if (rc < 0)
+        {
+            CDBG("s5k5ca_i2c_read_w Model_ID failed!! rc=%d", rc);
+            goto init_probe_fail;
+        }
+
+        CDBG("s5k5ca chipid = 0x%x\n", chipid);
+
+        /* 4. Compare sensor ID to S5K5CA ID: */
+        if (chipid != S5K5CA_CHIP_ID)
+        {
+            CDBG("s5k5ca Model_ID error!!");
+            rc = -ENODEV;
+            goto init_probe_fail;
+        }
+
+        {
+            /* Change the method of reading model id to fit socket and FPC packing models
+             * Socket model : 0--3
+             * FPC model : 8--11
+             */
+            rc = s5k5ca_i2c_write_w(0xFCFC, 0xD000);
+            if (rc < 0)
+            {
+                goto init_probe_fail;
+            }
+
+            rc = s5k5ca_i2c_write_w(0x108E, 0x3333);
+            if (rc < 0)
+            {
+                goto init_probe_fail;
+            }
+
+            mdelay(2);
+
+            rc = s5k5ca_i2c_write_w(0x1090, 0x8888);
+            if (rc < 0)
+            {
+                goto init_probe_fail;
+            }
+
+            rc = s5k5ca_i2c_read_w(0x100C, &s5k5ca_model_id);
+            if (rc < 0)
+            {
+                CDBG("s5k5ca_i2c_read_w 0x002e rc=%d", rc);
+            }
+
+            CDBG("s5k5ca model = 0x%x\n", s5k5ca_model_id);
+
+            /* If ID out of range ,set model_id MODEL_TRULY_FPC as default */
+            if (s5k5ca_model_id > MODEL_SUNNY)
+            {
+                s5k5ca_model_id = MODEL_SUNNY;
+            }
+
+            rc = s5k5ca_i2c_write_w(0x108E, 0x0000);
+            if (rc < 0)
+            {
+                goto init_probe_fail;
+            }
+
+            switch (s5k5ca_model_id)
+            {
+            case MODEL_TRULY:
+
+            case MODEL_SUNNY:
+                p_s5k5ca_init_reg_config = (struct s5k5ca_i2c_reg_conf *)(s5k5ca_regs.s5k5ca_init_reg_config_sunny);
+                reg_num = s5k5ca_regs.s5k5ca_init_reg_config_sunny_size;
+
+                //              strncpy((char *)data->sensor_name, "23060043SF-SAM-S", strlen("23060043SF-SAM-S"));
+                CDBG("s5k5ca probe is  MODEL_SUNNY.");
+                break;
+
+            default:
+                goto init_probe_fail;
+                CDBG("s5k5ca is no this sensor model.\n");
+                break;
+            }
+        }
+      //  CDBG("sensor name is %s.", data->sensor_name);
+    }
+
+    /*delete one line*/
+        //CDBG("s5k5ca  model is %d : init sensor!\n", s5k5ca_model_id);
+
+        /* Write init sensor register */
+	//int rc = 0;
+     //   rc = s5k5ca_i2c_write_w_table(s5k5ca_regs.s5k5ca_init_reg_sensor_start,
+       //                               s5k5ca_regs.s5k5ca_init_reg_sensor_start_size);
+        mdelay(100);
+
+
+	rc = s5k5ca_i2c_write_w_table(p_s5k5ca_init_reg_config, reg_num);
+       // rc = s5k5ca_i2c_write_w_table(p_s5k5ca_init_reg_config, reg_num);
+        /*add a 10ms delay between registers writing*/
+        mdelay(10);
+        //rc = s5k5ca_i2c_write_w_table(s5k5ca_regs.s5k5ca_init_reg_config_sunny_2,  
+        //                        s5k5ca_regs.s5k5ca_init_reg_config_sunny_2_size);
+        //           mdelay(100);
+        //CDBG("s5k5ca model is %d: init sensor done!\n", s5k5ca_model_id);
+        if(rc >= 0)
+        {
+	 	printk("set mirror mode %d\n", reg_num);
+		//rc = s5k5ca_i2c_write_w_table(s5k5ca_regs.s5k5ca_mirror_mode_reg_config,
+                               //      s5k5ca_regs.s5k5ca_mirror_mode_reg_config_size);
+           // rc = s5k5ca_set_mirror_mode();
+        } 
+       // break;
+
+    goto init_probe_done;
+
+init_probe_fail:
+		printk("-----ini_probe_fail-------\n");
+    //s5k5ca_sensor_init_done(data);
+init_probe_done:
+    return rc;
+}
+static int s5k5ca_s_crystal_freq(struct v4l2_subdev *sd, u32 freq, u32 flags)
+{
+	int err = -EINVAL;
+
+	return err;
+}
+
+static int s5k5ca_s_fmt(struct v4l2_subdev *sd,
+			struct v4l2_mbus_framefmt *mf)
+{
+	int err = 0;
+
+//	s5k5ca_init(sd, 0);
+	return err;
+}
+
+static int s5k5ca_enum_framesizes(struct v4l2_subdev *sd, \
+					struct v4l2_frmsizeenum *fsize)
+{
+	int err = 0;
+
+	return err;
+}
+
+static int s5k5ca_enum_frameintervals(struct v4l2_subdev *sd,
+					struct v4l2_frmivalenum *fival)
+{
+	int err = 0;
+
+	return err;
+}
+
+static enum v4l2_mbus_pixelcode s5k5ca_codes[] = {
+	V4L2_MBUS_FMT_YUYV8_2X8,
+	V4L2_MBUS_FMT_YVYU8_2X8,
+	V4L2_MBUS_FMT_UYVY8_2X8,
+	V4L2_MBUS_FMT_RGB565_2X8_LE,
+};
+
+static int s5k5ca_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
+			   enum v4l2_mbus_pixelcode *code)
+{
+
+	if (index >= ARRAY_SIZE(s5k5ca_codes))
+		return -EINVAL;
+
+	*code = s5k5ca_codes[index];
+	return 0;
+}
+
+static int s5k5ca_g_fmt(struct v4l2_subdev *sd,
+			struct v4l2_mbus_framefmt *mf)
+{
+	//printk("--------s5k5ca_g_fmt-----\n");
+	int err = 0;
+
+	return err;
+}
+
+static int s5k5ca_s_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *param)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int err = 0;
+
+	dev_dbg(&client->dev, "%s: numerator %d, denominator: %d\n", \
+		__func__, param->parm.capture.timeperframe.numerator, \
+		param->parm.capture.timeperframe.denominator);
+
+	return err;
+}
+
+static int s5k5ca_g_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *param)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int err = 0;
+
+	dev_dbg(&client->dev, "%s\n", __func__);
+
+	return err;
+}
+
+static int s5k5ca_try_fmt(struct v4l2_subdev *sd,
+			  struct v4l2_mbus_framefmt *mf)
+{
+	int err = 0;
+
+	return err;
+}
+
+static struct v4l2_queryctrl s5k5ca_controls[] = {
+	{
+		/*
+		 * For now, we just support in preset type
+		 * to be close to generic WB system,
+		 * we define color temp range for each preset
+		 */
+		.id = V4L2_CID_WHITE_BALANCE_TEMPERATURE,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "White balance in kelvin",
+		.minimum = 0,
+		.maximum = 10000,
+		.step = 1,
+		.default_value = 0,	/* FIXME */
+	},
+	{
+		.id = V4L2_CID_AUTO_WHITE_BALANCE,
+		.type = V4L2_CTRL_TYPE_BOOLEAN,
+		.name = "Auto white balance",
+		.minimum = 0,
+		.maximum = 1,
+		.step = 1,
+		.default_value = 0,
+	},
+	{
+		.id = V4L2_CID_BRIGHTNESS,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Brightness",
+		.minimum = -80,
+		.maximum = 80,
+		.step = 1,
+		.default_value = 0x08,
+	},
+	{
+		.id = V4L2_CID_CONTRAST,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Contrast",
+		.minimum = 0x10,
+		.maximum = 0x30,
+		.step = 1,
+		.default_value = 0x20,
+	},
+	{
+		.id = V4L2_CID_SATURATION,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Saturation",
+		.minimum = 0x00,
+		.maximum = 0x80,
+		.step = 1,
+		.default_value = 0x40,
+	},
+	{
+		.id = V4L2_CID_SHARPNESS,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Sharpness",
+		.minimum = 0x00,
+		.maximum = 0x09,
+		.step = 1,
+		.default_value = 0x04,
+	},
+	{
+		.id = V4L2_CID_HUE,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Hue",
+		.minimum = 0,
+		.maximum = 21,
+		.step = 1,
+		.default_value = 10,
+	},
+	{
+		.id = V4L2_CID_POWER_LINE_FREQUENCY,
+		.type = V4L2_CTRL_TYPE_INTEGER,
+		.name = "Power line frequency",
+		.minimum = 0,
+		.maximum = 2,
+		.step = 1,
+		.default_value = 0,
+	},
+};
+
+static inline struct v4l2_queryctrl const *s5k5ca_find_qctrl(int id)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(s5k5ca_controls); i++)
+		if (s5k5ca_controls[i].id == id)
+			return &s5k5ca_controls[i];
+
+	return NULL;
+}
+
+static int s5k5ca_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(s5k5ca_controls); i++) {
+		if (s5k5ca_controls[i].id == qc->id) {
+			memcpy(qc, &s5k5ca_controls[i], \
+				sizeof(struct v4l2_queryctrl));
+			return 0;
+		}
+	}
+
+	return -EINVAL;
+}
+
+static int s5k5ca_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
+{
+	int err = 0;
+	return err;
+}
+static unsigned char regABVal = 0x06;
+static unsigned char hueTable[21][3] = {{0x0, 0x80, 0},
+				{0x14, 0x7E, 0},
+				{0x27, 0x79, 0},
+				{0x3A, 0x72, 0},
+				{0x4B, 0x67, 0},
+				{0x5A, 0x5A, 0},
+				{0x67, 0x4B, 0},
+				{0x72, 0x3A, 0},
+				{0x79, 0x27, 0},
+				{0x7E, 0x14, 0},
+				{0x80, 0x00, 1},
+				{0x7E, 0x14, 1},
+				{0x79, 0x27, 1},
+				{0x72, 0x3A, 1},
+				{0x67, 0x4B, 1},
+				{0x5A, 0x5A, 1},
+				{0x4B, 0x67, 1},
+				{0x3A, 0x72, 1},
+				{0x27, 0x79, 1},
+				{0x14, 0x7E, 1},
+				{0x00, 0x80, 1}};
+
+void s5k5ca_color_effect(struct v4l2_subdev *sd, int which)
+{return;}
+
+
+static const struct v4l2_subdev_video_ops s5k5ca_video_ops = {
+	.s_crystal_freq = s5k5ca_s_crystal_freq,
+	.g_mbus_fmt = s5k5ca_g_fmt,
+	.s_mbus_fmt = s5k5ca_s_fmt,
+	.enum_framesizes = s5k5ca_enum_framesizes,
+	.enum_frameintervals = s5k5ca_enum_frameintervals,
+	.enum_mbus_fmt = s5k5ca_enum_fmt,
+	.try_mbus_fmt = s5k5ca_try_fmt,
+	.g_parm = s5k5ca_g_parm,
+	.s_parm = s5k5ca_s_parm,
+};
+static const struct v4l2_subdev_core_ops s5k5ca_core_ops = {
+	.init	= s5k5ca_probe_init_sensor,
+	.queryctrl = s5k5ca_queryctrl,
+	.g_ctrl = s5k5ca_g_ctrl,
+	//.s_ctrl = s5k5ca_s_ctrl,
+};
+static const struct v4l2_subdev_ops s5k5ca_ops = {
+	.core = &s5k5ca_core_ops,
+	.video = &s5k5ca_video_ops,
+};
+static int s5k5ca_set_bus_param(struct soc_camera_device *icd,
+				unsigned long flags)
+{
+	struct soc_camera_link *icl = to_soc_camera_link(icd);
+	unsigned long width_flag = flags & SOCAM_DATAWIDTH_MASK;
+
+	/* Only one width bit may be set */
+	if (icl->set_bus_param)
+		return icl->set_bus_param(icl, width_flag);
+
+	/*
+	 * Without board specific bus width settings we support only the
+	 * sensors native bus width witch are tested working
+	 */
+	if (width_flag & (SOCAM_DATAWIDTH_10 | SOCAM_DATAWIDTH_8))
+		return 0;
+
+	return 0;
+}
+
+static unsigned long s5k5ca_query_bus_param(struct soc_camera_device *icd)
+{
+	struct soc_camera_link *icl = to_soc_camera_link(icd);
+	unsigned long flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_MASTER |
+		SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_HIGH |
+		SOCAM_DATA_ACTIVE_HIGH;
+
+	if (icl->query_bus_param)
+		flags |= icl->query_bus_param(icl) & SOCAM_DATAWIDTH_MASK;
+	else
+		flags |= SOCAM_DATAWIDTH_8;
+
+	return soc_camera_apply_sensor_flags(icl, flags);
+}
+static struct soc_camera_ops s5k5ca_camera_ops = {
+	.set_bus_param		= s5k5ca_set_bus_param,
+	.query_bus_param	= s5k5ca_query_bus_param,
+	.controls		= s5k5ca_controls,
+	.num_controls		= ARRAY_SIZE(s5k5ca_controls),
+};
+#define BURST_MODE_SET			1
+#define BURST_MODE_END			2
+#define NORMAL_MODE_SET			3
+#define MAX_INDEX				1000
+static int s5k5ca_sensor_burst_write_list(struct i2c_client *client, struct samsung_short_t *list,char *name)
+{
+	__u8 temp_buf[MAX_INDEX];
+	int index_overflow = 1;
+	int new_addr_start = 0;
+	int burst_mode = NORMAL_MODE_SET;
+	unsigned short pre_subaddr = 0;
+	struct i2c_msg msg = { client->addr, 0, 4, temp_buf };
+	int i=0, ret=0;
+	unsigned int index = 0;
+	
+	printk("s5k5ca_sensor_burst_write_list( %s ) \n", name); 
+	//printk("[PGH] on write func s5k5ca_client->addr : %x\n", client->addr); //reduced startup time.     
+    
+#ifdef CONFIG_LOAD_FILE 
+	s5k5ca_regs_table_write(name);	
+#else
+	for (i = 0; list[i].subaddr != 0xffff; i++)
+	{
+		if(list[i].subaddr == 0xdddd)
+		{
+                        msleep(list[i].value);
+			printk("delay 0x%04x, value 0x%04x\n", list[i].subaddr, list[i].value);
+		}	
+		else
+		{			
+		//	printk("--------write i2c reg------\n");		
+			if( list[i].subaddr == list[i+1].subaddr )
+			{
+				burst_mode = BURST_MODE_SET;
+				if((list[i].subaddr != pre_subaddr) || (index_overflow == 1))
+				{
+					new_addr_start = 1;
+					index_overflow = 0;
+				}
+			}
+			else
+			{
+				if(burst_mode == BURST_MODE_SET)
+				{
+					burst_mode = BURST_MODE_END;
+					if(index_overflow == 1)
+					{
+						new_addr_start = 1;
+						index_overflow = 0;
+					}
+				}
+				else
+				{
+					burst_mode = NORMAL_MODE_SET;
+				}
+			}
+
+			if((burst_mode == BURST_MODE_SET) || (burst_mode == BURST_MODE_END))
+			{
+				if(new_addr_start == 1)
+				{
+					index = 0;
+					memset(temp_buf, 0x00 ,1000);
+					index_overflow = 0;
+
+					temp_buf[index] = (list[i].subaddr >> 8);
+					temp_buf[++index] = (list[i].subaddr & 0xFF);
+
+					new_addr_start = 0;
+				}
+				
+				temp_buf[++index] = (list[i].value >> 8);
+				temp_buf[++index] = (list[i].value & 0xFF);
+				
+				if(burst_mode == BURST_MODE_END)
+				{
+					msg.len = ++index;
+
+					ret = i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;
+					if( ret < 0)
+					{
+						printk("i2c_transfer fail ! \n");
+						return -1;
+					}
+				}
+				else if( index >= MAX_INDEX-1 )
+				{
+					index_overflow = 1;
+					msg.len = ++index;
+					
+					ret = i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;
+					if( ret < 0)
+					{
+						printk("I2C_transfer Fail ! \n");
+						return -1;
+					}
+				}
+				
+			}
+			else
+			{
+				memset(temp_buf, 0x00 ,4);
+			
+				temp_buf[0] = (list[i].subaddr >> 8);
+				temp_buf[1] = (list[i].subaddr & 0xFF);
+				temp_buf[2] = (list[i].value >> 8);
+				temp_buf[3] = (list[i].value & 0xFF);
+
+				msg.len = 4;
+				ret = i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;
+				if( ret < 0)
+				{
+					printk("I2C_transfer Fail ! \n");
+					return -1;
+				}
+			}
+		}
+		
+		pre_subaddr = list[i].subaddr;
+	}
+#endif
+	return ret;
+}
+
+static int sensor_init(struct i2c_client *client)
+{
+	int i, size;
+	int ret = 0;
+
+	printk("[**ASWOOGI**] sensor_init\n"); 
+
+#ifdef I2C_BURST_MODE //dha23 100325	
+	if(s5k5ca_sensor_burst_write_list(client,s5k5ca_init_00,"s5k5ca_init_00") < 0)
+		return -1;
+#else
+	if(s5k5ca_sensor_write_list(client,s5k5ca_init0,"s5k5ca_init0") < 0)
+		return -1;
+
+	msleep(100);	
+
+	if(s5k5ca_sensor_write_list(client,s5k5ca_init1,"s5k5ca_init1") < 0)
+		return -1;
+#endif
+	msleep(10);	
+	af_mode = -1;
+
+	/* Check Sensor ID */
+	//s5k5ca_sensor_get_id(client);
+	return 0;
+}
+
+#define S5K5CA_PROC_NAME	"s5k5ca"
+static int s5k5ca_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+	printk("--------s5k5ca_i2c_probe-------\n");
+	struct s5k5ca_state *state;
+	struct v4l2_subdev *sd;
+	struct soc_camera_device  *icd = client->dev.platform_data;
+	struct i2c_adapter        *adapter = to_i2c_adapter(client->dev.parent);
+	struct soc_camera_link    *icl;
+
+	state = kzalloc(sizeof(struct s5k5ca_state), GFP_KERNEL);
+	if (state == NULL)
+		return -ENOMEM;
+
+	sd = &state->sd;
+	strcpy(sd->name, "S5K5CA");
+
+	icl = to_soc_camera_link(icd);
+	if (!icl) {
+		dev_err(&adapter->dev,
+			"S5K5CA: Missing platform_data for driver\n");
+		return -EINVAL;
+	}
+
+	/* Registering subdev */
+	v4l2_i2c_subdev_init(sd, client, &s5k5ca_ops);
+
+	icd->ops = &s5k5ca_camera_ops;
+
+	s5k5ca_client = client;
+	//sensor_init(client);
+	s5k5ca_probe_init_sensor(client);
+
+	//s5k5ca_i2c_write_w_table(s5k5ca_regs.s5k5ca_preview_reg_config,
+    //                                      s5k5ca_regs.s5k5ca_preview_reg_config_size);
+#if 0
+	s5k5ca_i2c_write_w_table(s5k5ca_regs.s5k5ca_init_reg_sensor_start,
+                                      s5k5ca_regs.s5k5ca_init_reg_sensor_start_size);
+        mdelay(100);
+
+   s5k5ca_i2c_write_w_table(p_s5k5ca_init_reg_config, reg_num);
+        /*add a 10ms delay between registers writing*/
+        mdelay(10);
+   s5k5ca_i2c_write_w_table(s5k5ca_regs.s5k5ca_init_reg_config_sunny_2,  
+                                s5k5ca_regs.s5k5ca_init_reg_config_sunny_2_size);
+	mdelay(50);
+#endif
+	dev_info(&client->dev, "s5k5ca has been probed\n");
+
+	return 0;
+}
+static __exit s5k5ca_sensor_remove(void)
+{
+	printk("------s5k5ca_sensor_remove-------\n");
+	if (s5k5ca_data.sensor != NULL)
+		i2c_del_driver(&s5k5ca_driver);
+#ifdef CONFIG_FLASH_AAT1271A
+	aat1271a_flash_exit();
+#endif
+	i2c_del_driver(&s5k5ca_driver);
+//	s3c_camif_remove_sensor(&s5k5ca_input, &s5k5ca_input_handler);
+}
+static inline struct s5k5ca_state *to_state(struct v4l2_subdev *sd)
+{
+	return container_of(sd, struct s5k5ca_state, sd);
+}
+static int __devexit s5k5ca_i2c_remove(struct i2c_client *client)
+{
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+//	if (s_proc != NULL)
+	//	remove_proc_entry(GC0308_PROC_NAME, &proc_root);
+
+	v4l2_device_unregister_subdev(sd);
+	kfree(to_state(sd));
+	return 0;
+    printk("[CAM-SENSOR][s5k5ca] removed\n");
+	return 0;
+}
+static int s5k5ca_i2c_detect(struct i2c_client *client, int kind, struct i2c_board_info *info)
+{
+	strlcpy(info->type, "S5K5CA", I2C_NAME_SIZE);
+	return 0;
+}
+static struct i2c_device_id s5k5ca_id[] = {
+	{ "S5K5CA", 0 },
+	{}
+};
+static struct i2c_driver s5k5ca_driver = {
+	.driver = {
+		.owner	= THIS_MODULE,
+		.name = "S5K5CA",
+	},
+	.class 		= I2C_CLASS_HWMON,
+	.probe		= s5k5ca_i2c_probe,
+	.remove		= __devexit_p(s5k5ca_i2c_remove),
+	.detect		= s5k5ca_i2c_detect,
+	//.command = s5k5ca_sensor_command,
+	.id_table	= s5k5ca_id,
+//	.address_data	= &s5k5ca_addr_data,
+};
+
+
+#endif 
+
+
+static __init s5k5ca_sensor_init(void)
+{
+	printk("--------s5k5ca_sensor_init-------\n");
+	return i2c_add_driver(&s5k5ca_driver);
+}
+
+static void s5k5ca_sensor_exit(void)
+{
+	s5k5ca_sensor_disable();
+
+#ifdef CONFIG_LOAD_FILE
+	s5k5ca_regs_table_exit();
+#endif
+	
+//	if (s5k5ca_data.sensor != NULL)
+	//	s3c_camif_unregister_sensor(&s5k5ca_data);
+}
+
+static struct v4l2_input s5k5ca_input = {
+	.index		= 0,
+	.name		= "Camera Input (S5K5CA)",
+	.type		= V4L2_INPUT_TYPE_CAMERA,
+	.audioset	= 1,
+	.tuner		= 0,
+	.std		= V4L2_STD_PAL_BG | V4L2_STD_NTSC_M,
+	.status		= 0,
+};
+
+static struct v4l2_input_handler s5k5ca_input_handler = {
+	s5k5ca_sensor_init,
+	s5k5ca_sensor_exit	
+};
+
+int s5k5ca_sensor_add(void)
+{
+#ifdef CONFIG_FLASH_AAT1271A
+	aat1271a_flash_init();
+#endif	
+#ifdef LOCAL_CONFIG_S5K5CA_I2C_TEST
+	return s5k5ca_sensor_init();
+#else
+	//return s3c_camif_add_sensor(&s5k5ca_input, &s5k5ca_input_handler);
+	return 0;
+#endif
+}
+
+
+module_init(s5k5ca_sensor_init)
+module_exit(s5k5ca_sensor_remove)
diff -uNra linux-3.0.82/drivers/media/video/Makefile linux-3.0.82x/drivers/media/video/Makefile
--- linux-3.0.82/drivers/media/video/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/Makefile	2017-09-23 03:42:49.546676506 +0800
@@ -70,6 +70,11 @@
 obj-$(CONFIG_VIDEO_SR030PC30)	+= sr030pc30.o
 obj-$(CONFIG_VIDEO_NOON010PC30)	+= noon010pc30.o
 obj-$(CONFIG_VIDEO_M5MOLS)	+= m5mols/
+#obj-$(CONFIG_VIDEO_GC0308)		+= gc0308.o	#lxy
+obj-$(CONFIG_SOC_CAMERA_GC0308)	+= ls1c_gc0308.o	#lxy
+obj-$(CONFIG_SOC_CAMERA_S5K5CA)	+= ls1c_s5k5ca.o s5k5ca_sunny_reg.o #cys
+#obj-$(CONFIG_SOC_CAMERA_OV9650)	+= ls1c_ov9650.o	#yg
+obj-$(CONFIG_SOC_CAMERA_OV9650)	+= ls1c-ov9650.o	#yg
 
 obj-$(CONFIG_SOC_CAMERA_IMX074)		+= imx074.o
 obj-$(CONFIG_SOC_CAMERA_MT9M001)	+= mt9m001.o
@@ -159,6 +164,7 @@
 obj-$(CONFIG_SOC_CAMERA)		+= soc_camera.o soc_mediabus.o
 obj-$(CONFIG_SOC_CAMERA_PLATFORM)	+= soc_camera_platform.o
 # soc-camera host drivers have to be linked after camera drivers
+obj-$(CONFIG_SOC_CAMERA_LS1C)	+= ls1c_camera.o
 obj-$(CONFIG_VIDEO_MX1)			+= mx1_camera.o
 obj-$(CONFIG_VIDEO_MX2)			+= mx2_camera.o
 obj-$(CONFIG_VIDEO_MX3)			+= mx3_camera.o
@@ -176,6 +182,7 @@
 obj-$(CONFIG_VIDEO_AU0828) += au0828/
 
 obj-$(CONFIG_USB_VIDEO_CLASS)	+= uvc/
+
 obj-$(CONFIG_VIDEO_SAA7164)     += saa7164/
 
 obj-$(CONFIG_VIDEO_IR_I2C)  += ir-kbd-i2c.o
diff -uNra linux-3.0.82/drivers/media/video/msm_camera.h linux-3.0.82x/drivers/media/video/msm_camera.h
--- linux-3.0.82/drivers/media/video/msm_camera.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/msm_camera.h	2017-09-23 03:42:49.550676493 +0800
@@ -0,0 +1,1244 @@
+/* Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+#ifndef __LINUX_MSM_CAMERA_H
+#define __LINUX_MSM_CAMERA_H
+
+#ifdef MSM_CAMERA_BIONIC
+#include <sys/types.h>
+#endif
+#include <linux/types.h>
+#include <linux/ioctl.h>
+#include <linux/cdev.h>
+#ifdef MSM_CAMERA_GCC
+#include <time.h>
+#else
+#include <linux/time.h>
+#endif
+
+/* modify for 4125 baseline */
+#include <linux/slab.h>
+#ifdef __KERNEL__
+#include <linux/ion.h>
+#endif
+#define MSM_CAM_IOCTL_MAGIC 'm'
+
+#define MSM_CAM_IOCTL_GET_SENSOR_INFO \
+	_IOR(MSM_CAM_IOCTL_MAGIC, 1, struct msm_camsensor_info *)
+
+#define MSM_CAM_IOCTL_REGISTER_PMEM \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 2, struct msm_pmem_info *)
+
+#define MSM_CAM_IOCTL_UNREGISTER_PMEM \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 3, unsigned)
+
+#define MSM_CAM_IOCTL_CTRL_COMMAND \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 4, struct msm_ctrl_cmd *)
+
+#define MSM_CAM_IOCTL_CONFIG_VFE  \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 5, struct msm_camera_vfe_cfg_cmd *)
+
+#define MSM_CAM_IOCTL_GET_STATS \
+	_IOR(MSM_CAM_IOCTL_MAGIC, 6, struct msm_camera_stats_event_ctrl *)
+
+#define MSM_CAM_IOCTL_GETFRAME \
+	_IOR(MSM_CAM_IOCTL_MAGIC, 7, struct msm_camera_get_frame *)
+
+#define MSM_CAM_IOCTL_ENABLE_VFE \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 8, struct camera_enable_cmd *)
+
+#define MSM_CAM_IOCTL_CTRL_CMD_DONE \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 9, struct camera_cmd *)
+
+#define MSM_CAM_IOCTL_CONFIG_CMD \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 10, struct camera_cmd *)
+
+#define MSM_CAM_IOCTL_DISABLE_VFE \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 11, struct camera_enable_cmd *)
+
+#define MSM_CAM_IOCTL_PAD_REG_RESET2 \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 12, struct camera_enable_cmd *)
+
+#define MSM_CAM_IOCTL_VFE_APPS_RESET \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 13, struct camera_enable_cmd *)
+
+#define MSM_CAM_IOCTL_RELEASE_FRAME_BUFFER \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 14, struct camera_enable_cmd *)
+
+#define MSM_CAM_IOCTL_RELEASE_STATS_BUFFER \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 15, struct msm_stats_buf *)
+
+#define MSM_CAM_IOCTL_AXI_CONFIG \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 16, struct msm_camera_vfe_cfg_cmd *)
+
+#define MSM_CAM_IOCTL_GET_PICTURE \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 17, struct msm_frame *)
+
+#define MSM_CAM_IOCTL_SET_CROP \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 18, struct crop_info *)
+
+#define MSM_CAM_IOCTL_PICT_PP \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 19, uint8_t *)
+
+#define MSM_CAM_IOCTL_PICT_PP_DONE \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 20, struct msm_snapshot_pp_status *)
+
+#define MSM_CAM_IOCTL_SENSOR_IO_CFG \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 21, struct sensor_cfg_data *)
+
+#define MSM_CAM_IOCTL_FLASH_LED_CFG \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 22, unsigned *)
+
+#define MSM_CAM_IOCTL_UNBLOCK_POLL_FRAME \
+	_IO(MSM_CAM_IOCTL_MAGIC, 23)
+
+#define MSM_CAM_IOCTL_CTRL_COMMAND_2 \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 24, struct msm_ctrl_cmd *)
+
+#define MSM_CAM_IOCTL_AF_CTRL \
+	_IOR(MSM_CAM_IOCTL_MAGIC, 25, struct msm_ctrl_cmt_t *)
+
+#define MSM_CAM_IOCTL_AF_CTRL_DONE \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 26, struct msm_ctrl_cmt_t *)
+
+#define MSM_CAM_IOCTL_CONFIG_VPE \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 27, struct msm_camera_vpe_cfg_cmd *)
+
+#define MSM_CAM_IOCTL_AXI_VPE_CONFIG \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 28, struct msm_camera_vpe_cfg_cmd *)
+
+#define MSM_CAM_IOCTL_STROBE_FLASH_CFG \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 29, uint32_t *)
+
+#define MSM_CAM_IOCTL_STROBE_FLASH_CHARGE \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 30, uint32_t *)
+
+#define MSM_CAM_IOCTL_STROBE_FLASH_RELEASE \
+	_IO(MSM_CAM_IOCTL_MAGIC, 31)
+
+#define MSM_CAM_IOCTL_FLASH_CTRL \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 32, struct flash_ctrl_data *)
+
+#define MSM_CAM_IOCTL_ERROR_CONFIG \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 33, uint32_t *)
+
+#define MSM_CAM_IOCTL_ABORT_CAPTURE \
+	_IO(MSM_CAM_IOCTL_MAGIC, 34)
+
+#define MSM_CAM_IOCTL_SET_FD_ROI \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 35, struct fd_roi_info *)
+
+#define MSM_CAM_IOCTL_GET_CAMERA_INFO \
+	_IOR(MSM_CAM_IOCTL_MAGIC, 36, struct msm_camera_info *)
+
+#define MSM_CAM_IOCTL_UNBLOCK_POLL_PIC_FRAME \
+	_IO(MSM_CAM_IOCTL_MAGIC, 37)
+
+#define MSM_CAM_IOCTL_RELEASE_PIC_BUFFER \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 38, struct camera_enable_cmd *)
+
+#define MSM_CAM_IOCTL_PUT_ST_FRAME \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 39, struct msm_camera_st_frame *)
+
+#define MSM_CAM_IOCTL_GET_CONFIG_INFO \
+	_IOR(MSM_CAM_IOCTL_MAGIC, 40, struct msm_cam_config_dev_info *)
+
+#define MSM_CAM_IOCTL_V4L2_EVT_NOTIFY \
+	_IOR(MSM_CAM_IOCTL_MAGIC, 41, struct v4l2_event *)
+
+#define MSM_CAM_IOCTL_SET_MEM_MAP_INFO \
+	_IOR(MSM_CAM_IOCTL_MAGIC, 42, struct msm_mem_map_info *)
+
+#define MSM_CAM_IOCTL_ACTUATOR_IO_CFG \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 43, struct msm_actuator_cfg_data *)
+
+#define MSM_CAM_IOCTL_MCTL_POST_PROC \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 44, struct msm_mctl_post_proc_cmd *)
+
+#define MSM_CAM_IOCTL_RESERVE_FREE_FRAME \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 45, struct msm_cam_evt_divert_frame *)
+
+#define MSM_CAM_IOCTL_RELEASE_FREE_FRAME \
+	_IOR(MSM_CAM_IOCTL_MAGIC, 46, struct msm_cam_evt_divert_frame *)
+
+#define MSM_CAM_IOCTL_PICT_PP_DIVERT_DONE \
+	_IOR(MSM_CAM_IOCTL_MAGIC, 47, struct msm_pp_frame *)
+
+#define MSM_CAM_IOCTL_SENSOR_V4l2_S_CTRL \
+	_IOR(MSM_CAM_IOCTL_MAGIC, 48, struct v4l2_control)
+
+#define MSM_CAM_IOCTL_SENSOR_V4l2_QUERY_CTRL \
+	_IOR(MSM_CAM_IOCTL_MAGIC, 49, struct v4l2_queryctrl)
+
+#define MSM_CAM_IOCTL_GET_KERNEL_SYSTEM_TIME \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 50, struct timeval *)
+
+#define MSM_CAM_IOCTL_SET_VFE_OUTPUT_TYPE \
+	_IOW(MSM_CAM_IOCTL_MAGIC, 51, uint32_t *)
+
+#define MSM_CAM_IOCTL_GET_MCTL_INFO \
+	_IOR(MSM_CAM_IOCTL_MAGIC, 51, struct msm_mctl_node_info *)
+
+#define MSM_CAM_IOCTL_MCTL_DIVERT_DONE \
+	_IOR(MSM_CAM_IOCTL_MAGIC, 52, struct msm_cam_evt_divert_frame *)
+#define MSM_CAM_IOCTL_RESETCAMERA_FOR_ESD \
+	_IOR(MSM_CAM_IOCTL_MAGIC, 88, int *)
+struct msm_mctl_pp_cmd {
+	int32_t  id;
+	uint16_t length;
+	void     *value;
+};
+
+struct msm_mctl_post_proc_cmd {
+	int32_t type;
+	struct msm_mctl_pp_cmd cmd;
+};
+
+#define MSM_CAMERA_LED_OFF  0
+#define MSM_CAMERA_LED_LOW  1
+#define MSM_CAMERA_LED_HIGH 2
+#define MSM_CAMERA_LED_INIT 3
+#define MSM_CAMERA_LED_RELEASE 4
+#define MSM_CAMERA_LED_TORCH 5
+#define MSM_CAMERA_LED_TORCH_LOW    6
+#define MSM_CAMERA_LED_TORCH_MIDDLE 7
+#define MSM_CAMERA_LED_TORCH_HIGH   8
+#define MSM_CAMERA_STROBE_FLASH_NONE 0
+#define MSM_CAMERA_STROBE_FLASH_XENON 1
+
+#define MSM_MAX_CAMERA_SENSORS  5
+#define MAX_SENSOR_NAME 32
+
+#define MSM_MAX_CAMERA_CONFIGS 2
+
+#define PP_SNAP  0x01
+#define PP_RAW_SNAP ((0x01)<<1)
+#define PP_PREV  ((0x01)<<2)
+#define PP_THUMB ((0x01)<<3)
+#define PP_MASK		(PP_SNAP|PP_RAW_SNAP|PP_PREV|PP_THUMB)
+
+#define MSM_CAM_CTRL_CMD_DONE  0
+#define MSM_CAM_SENSOR_VFE_CMD 1
+
+/* Should be same as VIDEO_MAX_PLANES in videodev2.h */
+#define MAX_PLANES 8
+
+/*****************************************************
+ *  structure
+ *****************************************************/
+
+/* define five type of structures for userspace <==> kernel
+ * space communication:
+ * command 1 - 2 are from userspace ==> kernel
+ * command 3 - 4 are from kernel ==> userspace
+ *
+ * 1. control command: control command(from control thread),
+ *                     control status (from config thread);
+ */
+struct msm_ctrl_cmd {
+	uint16_t type;
+	uint16_t length;
+	void *value;
+	uint16_t status;
+	uint32_t timeout_ms;
+	int resp_fd; /* FIXME: to be used by the kernel, pass-through for now */
+	int vnode_id;  /* video dev id. Can we overload resp_fd? */
+	uint32_t stream_type; /* used to pass value to qcamera server */
+	int config_ident; /*used as identifier for config node*/
+};
+
+struct msm_cam_evt_msg {
+	unsigned short type;	/* 1 == event (RPC), 0 == message (adsp) */
+	unsigned short msg_id;
+	unsigned int len;	/* size in, number of bytes out */
+	uint32_t frame_id;
+	void *data;
+};
+
+struct msm_pp_frame_sp {
+	/* phy addr of the buffer */
+	unsigned long  phy_addr;
+	uint32_t       y_off;
+	uint32_t       cbcr_off;
+	/* buffer length */
+	uint32_t       length;
+	int32_t        fd;
+	uint32_t       addr_offset;
+	/* mapped addr */
+	unsigned long  vaddr;
+};
+
+struct msm_pp_frame_mp {
+	/* phy addr of the plane */
+	unsigned long  phy_addr;
+	/* offset of plane data */
+	uint32_t       data_offset;
+	/* plane length */
+	uint32_t       length;
+	int32_t        fd;
+	uint32_t       addr_offset;
+	/* mapped addr */
+	unsigned long  vaddr;
+};
+
+struct msm_pp_frame {
+	uint32_t       handle; /* stores vb cookie */
+	uint32_t       frame_id;
+	unsigned short buf_idx;
+	int            path;
+	unsigned short image_type;
+	unsigned short num_planes; /* 1 for sp */
+	struct timeval timestamp;
+	union {
+		struct msm_pp_frame_sp sp;
+		struct msm_pp_frame_mp mp[MAX_PLANES];
+	};
+	int node_type;
+};
+
+struct msm_cam_evt_divert_frame {
+	unsigned short image_mode;
+	unsigned short op_mode;
+	unsigned short inst_idx;
+	unsigned short node_idx;
+	struct msm_pp_frame frame;
+	int            do_pp;
+};
+
+struct msm_mctl_pp_cmd_ack_event {
+	uint32_t cmd;        /* VPE_CMD_ZOOM? */
+	int      status;     /* 0 done, < 0 err */
+	uint32_t cookie;     /* daemon's cookie */
+};
+
+struct msm_mctl_pp_event_info {
+	int32_t  event;
+	union {
+		struct msm_mctl_pp_cmd_ack_event ack;
+	};
+};
+
+struct msm_isp_event_ctrl {
+	unsigned short resptype;
+	union {
+		struct msm_cam_evt_msg isp_msg;
+		struct msm_ctrl_cmd ctrl;
+		struct msm_cam_evt_divert_frame div_frame;
+		struct msm_mctl_pp_event_info pp_event_info;
+	} isp_data;
+};
+
+#define MSM_CAM_RESP_CTRL              0
+#define MSM_CAM_RESP_STAT_EVT_MSG      1
+#define MSM_CAM_RESP_STEREO_OP_1       2
+#define MSM_CAM_RESP_STEREO_OP_2       3
+#define MSM_CAM_RESP_V4L2              4
+#define MSM_CAM_RESP_DIV_FRAME_EVT_MSG 5
+#define MSM_CAM_RESP_DONE_EVENT        6
+#define MSM_CAM_RESP_MCTL_PP_EVENT     7
+#define MSM_CAM_RESP_MAX               8
+
+#define MSM_CAM_APP_NOTIFY_EVENT  0
+
+/* this one is used to send ctrl/status up to config thread */
+
+struct msm_stats_event_ctrl {
+	/* 0 - ctrl_cmd from control thread,
+	 * 1 - stats/event kernel,
+	 * 2 - V4L control or read request */
+	int resptype;
+	int timeout_ms;
+	struct msm_ctrl_cmd ctrl_cmd;
+	/* struct  vfe_event_t  stats_event; */
+	struct msm_cam_evt_msg stats_event;
+};
+
+/* 2. config command: config command(from config thread); */
+struct msm_camera_cfg_cmd {
+	/* what to config:
+	 * 1 - sensor config, 2 - vfe config */
+	uint16_t cfg_type;
+
+	/* sensor config type */
+	uint16_t cmd_type;
+	uint16_t queue;
+	uint16_t length;
+	void *value;
+};
+
+#define CMD_GENERAL			0
+#define CMD_AXI_CFG_OUT1		1
+#define CMD_AXI_CFG_SNAP_O1_AND_O2	2
+#define CMD_AXI_CFG_OUT2		3
+#define CMD_PICT_T_AXI_CFG		4
+#define CMD_PICT_M_AXI_CFG		5
+#define CMD_RAW_PICT_AXI_CFG		6
+
+#define CMD_FRAME_BUF_RELEASE		7
+#define CMD_PREV_BUF_CFG		8
+#define CMD_SNAP_BUF_RELEASE		9
+#define CMD_SNAP_BUF_CFG		10
+#define CMD_STATS_DISABLE		11
+#define CMD_STATS_AEC_AWB_ENABLE	12
+#define CMD_STATS_AF_ENABLE		13
+#define CMD_STATS_AEC_ENABLE		14
+#define CMD_STATS_AWB_ENABLE		15
+#define CMD_STATS_ENABLE  		16
+
+#define CMD_STATS_AXI_CFG		17
+#define CMD_STATS_AEC_AXI_CFG		18
+#define CMD_STATS_AF_AXI_CFG 		19
+#define CMD_STATS_AWB_AXI_CFG		20
+#define CMD_STATS_RS_AXI_CFG		21
+#define CMD_STATS_CS_AXI_CFG		22
+#define CMD_STATS_IHIST_AXI_CFG		23
+#define CMD_STATS_SKIN_AXI_CFG		24
+
+#define CMD_STATS_BUF_RELEASE		25
+#define CMD_STATS_AEC_BUF_RELEASE	26
+#define CMD_STATS_AF_BUF_RELEASE	27
+#define CMD_STATS_AWB_BUF_RELEASE	28
+#define CMD_STATS_RS_BUF_RELEASE	29
+#define CMD_STATS_CS_BUF_RELEASE	30
+#define CMD_STATS_IHIST_BUF_RELEASE	31
+#define CMD_STATS_SKIN_BUF_RELEASE	32
+
+#define UPDATE_STATS_INVALID		33
+#define CMD_AXI_CFG_SNAP_GEMINI		34
+#define CMD_AXI_CFG_SNAP		35
+#define CMD_AXI_CFG_PREVIEW		36
+#define CMD_AXI_CFG_VIDEO		37
+
+#define CMD_STATS_IHIST_ENABLE 38
+#define CMD_STATS_RS_ENABLE 39
+#define CMD_STATS_CS_ENABLE 40
+#define CMD_VPE 41
+#define CMD_AXI_CFG_VPE 42
+#define CMD_AXI_CFG_ZSL 43
+#define CMD_AXI_CFG_SNAP_VPE 44
+#define CMD_AXI_CFG_SNAP_THUMB_VPE 45
+#define CMD_AXI_CFG_VIDEO_ALL_CHNLS  46
+#define CMD_AXI_CFG_ZSL_ALL_CHNLS  47
+#define CMD_CONFIG_PING_ADDR 48
+#define CMD_CONFIG_PONG_ADDR 49
+#define CMD_CONFIG_FREE_BUF_ADDR 50
+#define CMD_VFE_BUFFER_RELEASE 51
+
+#define CMD_AXI_CFG_PRIM		0xF1
+#define CMD_AXI_CFG_PRIM_ALL_CHNLS	0xF2
+#define CMD_AXI_CFG_SEC			0xF4
+#define CMD_AXI_CFG_SEC_ALL_CHNLS	0xF8
+
+/* vfe config command: config command(from config thread)*/
+struct msm_vfe_cfg_cmd {
+	int cmd_type;
+	uint16_t length;
+	void *value;
+};
+
+struct msm_vpe_cfg_cmd {
+	int cmd_type;
+	uint16_t length;
+	void *value;
+};
+
+#define MAX_CAMERA_ENABLE_NAME_LEN 32
+struct camera_enable_cmd {
+	char name[MAX_CAMERA_ENABLE_NAME_LEN];
+};
+
+#define MSM_PMEM_OUTPUT1		0
+#define MSM_PMEM_OUTPUT2		1
+#define MSM_PMEM_OUTPUT1_OUTPUT2	2
+#define MSM_PMEM_THUMBNAIL		3
+#define MSM_PMEM_MAINIMG		4
+#define MSM_PMEM_RAW_MAINIMG		5
+#define MSM_PMEM_AEC_AWB		6
+#define MSM_PMEM_AF			7
+#define MSM_PMEM_AEC			8
+#define MSM_PMEM_AWB			9
+#define MSM_PMEM_RS			10
+#define MSM_PMEM_CS			11
+#define MSM_PMEM_IHIST			12
+#define MSM_PMEM_SKIN			13
+#define MSM_PMEM_VIDEO			14
+#define MSM_PMEM_PREVIEW		15
+#define MSM_PMEM_VIDEO_VPE		16
+#define MSM_PMEM_C2D			17
+#define MSM_PMEM_MAINIMG_VPE    18
+#define MSM_PMEM_THUMBNAIL_VPE  19
+#define MSM_PMEM_MAX            20
+
+#define STAT_AEAW			0
+#define STAT_AEC			1
+#define STAT_AF				2
+#define STAT_AWB			3
+#define STAT_RS				4
+#define STAT_CS				5
+#define STAT_IHIST			6
+#define STAT_SKIN			7
+#define STAT_MAX			8
+
+#define FRAME_PREVIEW_OUTPUT1		0
+#define FRAME_PREVIEW_OUTPUT2		1
+#define FRAME_SNAPSHOT			2
+#define FRAME_THUMBNAIL			3
+#define FRAME_RAW_SNAPSHOT		4
+#define FRAME_MAX			5
+
+struct msm_pmem_info {
+	int type;
+	int fd;
+	void *vaddr;
+	uint32_t offset;
+	uint32_t len;
+	uint32_t y_off;
+	uint32_t cbcr_off;
+	uint8_t active;
+};
+
+struct outputCfg {
+	uint32_t height;
+	uint32_t width;
+
+	uint32_t window_height_firstline;
+	uint32_t window_height_lastline;
+};
+
+#define VIDEO_NODE 0
+#define MCTL_NODE 1
+
+#define OUTPUT_1	0
+#define OUTPUT_2	1
+#define OUTPUT_1_AND_2            2   /* snapshot only */
+#define OUTPUT_1_AND_3            3   /* video */
+#define CAMIF_TO_AXI_VIA_OUTPUT_2 4
+#define OUTPUT_1_AND_CAMIF_TO_AXI_VIA_OUTPUT_2 5
+#define OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 6
+#define OUTPUT_1_2_AND_3 7
+#define OUTPUT_ALL_CHNLS 8
+#define OUTPUT_ZSL_ALL_CHNLS 9
+#define LAST_AXI_OUTPUT_MODE_ENUM  OUTPUT_ZSL_ALL_CHNLS
+
+#define OUTPUT_PRIM		0xF1
+#define OUTPUT_PRIM_ALL_CHNLS	0xF2
+#define OUTPUT_SEC		0xF4
+#define OUTPUT_SEC_ALL_CHNLS	0xF8
+
+
+#define MSM_FRAME_PREV_1	0
+#define MSM_FRAME_PREV_2	1
+#define MSM_FRAME_ENC		2
+
+#define OUTPUT_TYPE_P    (1<<0)
+#define OUTPUT_TYPE_T    (1<<1)
+#define OUTPUT_TYPE_S    (1<<2)
+#define OUTPUT_TYPE_V    (1<<3)
+#define OUTPUT_TYPE_L    (1<<4)
+#define OUTPUT_TYPE_ST_L (1<<5)
+#define OUTPUT_TYPE_ST_R (1<<6)
+#define OUTPUT_TYPE_ST_D (1<<7)
+
+struct fd_roi_info {
+	void *info;
+	int info_len;
+};
+
+struct msm_mem_map_info {
+	uint32_t cookie;
+	uint32_t length;
+	uint32_t mem_type;
+};
+
+#define MSM_MEM_MMAP		0
+#define MSM_MEM_USERPTR		1
+#define MSM_PLANE_MAX		8
+#define MSM_PLANE_Y			0
+#define MSM_PLANE_UV		1
+
+struct msm_frame {
+	struct timespec ts;
+	int path;
+	int type;
+	unsigned long buffer;
+	uint32_t phy_offset;
+	uint32_t y_off;
+	uint32_t cbcr_off;
+	int fd;
+
+	void *cropinfo;
+	int croplen;
+	uint32_t error_code;
+	struct fd_roi_info roi_info;
+	uint32_t frame_id;
+	int stcam_quality_ind;
+	uint32_t stcam_conv_value;
+
+	struct ion_allocation_data ion_alloc;
+	struct ion_fd_data fd_data;
+};
+
+enum msm_st_frame_packing {
+	SIDE_BY_SIDE_HALF,
+	SIDE_BY_SIDE_FULL,
+	TOP_DOWN_HALF,
+	TOP_DOWN_FULL,
+};
+
+struct msm_st_crop {
+	uint32_t in_w;
+	uint32_t in_h;
+	uint32_t out_w;
+	uint32_t out_h;
+};
+
+struct msm_st_half {
+	uint32_t buf_y_off;
+	uint32_t buf_cbcr_off;
+	uint32_t buf_y_stride;
+	uint32_t buf_cbcr_stride;
+	uint32_t pix_x_off;
+	uint32_t pix_y_off;
+	struct msm_st_crop stCropInfo;
+};
+
+struct msm_st_frame {
+	struct msm_frame buf_info;
+	int type;
+	enum msm_st_frame_packing packing;
+	struct msm_st_half L;
+	struct msm_st_half R;
+	int frame_id;
+};
+
+#define MSM_CAMERA_ERR_MASK (0xFFFFFFFF & 1)
+
+struct stats_buff {
+	unsigned long buff;
+	int fd;
+};
+
+struct msm_stats_buf {
+	uint8_t awb_ymin;
+	struct stats_buff aec;
+	struct stats_buff awb;
+	struct stats_buff af;
+	struct stats_buff ihist;
+	struct stats_buff rs;
+	struct stats_buff cs;
+	struct stats_buff skin;
+	int type;
+	uint32_t status_bits;
+	unsigned long buffer;
+	int fd;
+	uint32_t frame_id;
+};
+#define MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT 0
+/* video capture mode in VIDIOC_S_PARM */
+#define MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW \
+	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+1)
+/* extendedmode for video recording in VIDIOC_S_PARM */
+#define MSM_V4L2_EXT_CAPTURE_MODE_VIDEO \
+	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+2)
+/* extendedmode for the full size main image in VIDIOC_S_PARM */
+#define MSM_V4L2_EXT_CAPTURE_MODE_MAIN (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+3)
+/* extendedmode for the thumb nail image in VIDIOC_S_PARM */
+#define MSM_V4L2_EXT_CAPTURE_MODE_THUMBNAIL \
+	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+4)
+#define MSM_V4L2_EXT_CAPTURE_MODE_RAW \
+	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+5)
+#define MSM_V4L2_EXT_CAPTURE_MODE_MAX (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+6)
+
+
+#define MSM_V4L2_PID_MOTION_ISO              V4L2_CID_PRIVATE_BASE
+#define MSM_V4L2_PID_EFFECT                 (V4L2_CID_PRIVATE_BASE+1)
+#define MSM_V4L2_PID_HJR                    (V4L2_CID_PRIVATE_BASE+2)
+#define MSM_V4L2_PID_LED_MODE               (V4L2_CID_PRIVATE_BASE+3)
+#define MSM_V4L2_PID_PREP_SNAPSHOT          (V4L2_CID_PRIVATE_BASE+4)
+#define MSM_V4L2_PID_EXP_METERING           (V4L2_CID_PRIVATE_BASE+5)
+#define MSM_V4L2_PID_ISO                    (V4L2_CID_PRIVATE_BASE+6)
+#define MSM_V4L2_PID_CAM_MODE               (V4L2_CID_PRIVATE_BASE+7)
+#define MSM_V4L2_PID_LUMA_ADAPTATION	    (V4L2_CID_PRIVATE_BASE+8)
+#define MSM_V4L2_PID_BEST_SHOT              (V4L2_CID_PRIVATE_BASE+9)
+#define MSM_V4L2_PID_FOCUS_MODE	            (V4L2_CID_PRIVATE_BASE+10)
+#define MSM_V4L2_PID_BL_DETECTION           (V4L2_CID_PRIVATE_BASE+11)
+#define MSM_V4L2_PID_SNOW_DETECTION         (V4L2_CID_PRIVATE_BASE+12)
+#define MSM_V4L2_PID_CTRL_CMD               (V4L2_CID_PRIVATE_BASE+13)
+#define MSM_V4L2_PID_EVT_SUB_INFO           (V4L2_CID_PRIVATE_BASE+14)
+#define MSM_V4L2_PID_STROBE_FLASH           (V4L2_CID_PRIVATE_BASE+15)
+#define MSM_V4L2_PID_MMAP_ENTRY             (V4L2_CID_PRIVATE_BASE+16)
+#define MSM_V4L2_PID_MMAP_INST              (V4L2_CID_PRIVATE_BASE+17)
+#define MSM_V4L2_PID_PP_PLANE_INFO          (V4L2_CID_PRIVATE_BASE+18)
+#define MSM_V4L2_PID_MAX                    MSM_V4L2_PID_PP_PLANE_INFO
+
+/* camera operation mode for video recording - two frame output queues */
+#define MSM_V4L2_CAM_OP_DEFAULT         0
+/* camera operation mode for video recording - two frame output queues */
+#define MSM_V4L2_CAM_OP_PREVIEW         (MSM_V4L2_CAM_OP_DEFAULT+1)
+/* camera operation mode for video recording - two frame output queues */
+#define MSM_V4L2_CAM_OP_VIDEO           (MSM_V4L2_CAM_OP_DEFAULT+2)
+/* camera operation mode for standard shapshot - two frame output queues */
+#define MSM_V4L2_CAM_OP_CAPTURE         (MSM_V4L2_CAM_OP_DEFAULT+3)
+/* camera operation mode for zsl shapshot - three output queues */
+#define MSM_V4L2_CAM_OP_ZSL             (MSM_V4L2_CAM_OP_DEFAULT+4)
+/* camera operation mode for raw snapshot - one frame output queue */
+#define MSM_V4L2_CAM_OP_RAW             (MSM_V4L2_CAM_OP_DEFAULT+5)
+/* camera operation mode for jpeg snapshot - one frame output queue */
+#define MSM_V4L2_CAM_OP_JPEG_CAPTURE    (MSM_V4L2_CAM_OP_DEFAULT+6)
+
+
+#define MSM_V4L2_VID_CAP_TYPE	0
+#define MSM_V4L2_STREAM_ON		1
+#define MSM_V4L2_STREAM_OFF		2
+#define MSM_V4L2_SNAPSHOT		3
+#define MSM_V4L2_QUERY_CTRL		4
+#define MSM_V4L2_GET_CTRL		5
+#define MSM_V4L2_SET_CTRL		6
+#define MSM_V4L2_QUERY			7
+#define MSM_V4L2_GET_CROP		8
+#define MSM_V4L2_SET_CROP		9
+#define MSM_V4L2_OPEN			10
+#define MSM_V4L2_CLOSE			11
+#define MSM_V4L2_SET_CTRL_CMD	12
+#define MSM_V4L2_EVT_SUB_MASK	13
+#define MSM_V4L2_MAX			14
+#define V4L2_CAMERA_EXIT		43
+
+struct crop_info {
+	void *info;
+	int len;
+};
+
+struct msm_postproc {
+	int ftnum;
+	struct msm_frame fthumnail;
+	int fmnum;
+	struct msm_frame fmain;
+};
+
+struct msm_snapshot_pp_status {
+	void *status;
+};
+
+#define CFG_SET_MODE			0
+#define CFG_SET_EFFECT			1
+#define CFG_START			2
+#define CFG_PWR_UP			3
+#define CFG_PWR_DOWN			4
+#define CFG_WRITE_EXPOSURE_GAIN		5
+#define CFG_SET_DEFAULT_FOCUS		6
+#define CFG_MOVE_FOCUS			7
+#define CFG_REGISTER_TO_REAL_GAIN	8
+#define CFG_REAL_TO_REGISTER_GAIN	9
+#define CFG_SET_FPS			10
+#define CFG_SET_PICT_FPS		11
+#define CFG_SET_BRIGHTNESS		12
+#define CFG_SET_CONTRAST		13
+#define CFG_SET_ZOOM			14
+#define CFG_SET_EXPOSURE_MODE		15
+#define CFG_SET_WB			16
+#define CFG_SET_ANTIBANDING		17
+#define CFG_SET_EXP_GAIN		18
+#define CFG_SET_PICT_EXP_GAIN		19
+#define CFG_SET_LENS_SHADING		20
+#define CFG_GET_PICT_FPS		21
+#define CFG_GET_PREV_L_PF		22
+#define CFG_GET_PREV_P_PL		23
+#define CFG_GET_PICT_L_PF		24
+#define CFG_GET_PICT_P_PL		25
+#define CFG_GET_AF_MAX_STEPS		26
+#define CFG_GET_PICT_MAX_EXP_LC		27
+#define CFG_SEND_WB_INFO    28
+#define CFG_SENSOR_INIT    29
+#define CFG_GET_3D_CALI_DATA 30
+#define CFG_GET_CALIB_DATA		31
+#define CFG_GET_OUTPUT_INFO		32
+#define CFG_GET_EEPROM_DATA		33
+#define CFG_SET_ACTUATOR_INFO		34
+#define CFG_GET_ACTUATOR_INFO		35
+
+#define CFG_SET_NR          37
+#define CFG_RESET           36
+#define CFG_MAX			38
+
+
+#define MOVE_NEAR	0
+#define MOVE_FAR	1
+
+#define SENSOR_PREVIEW_MODE		0
+#define SENSOR_SNAPSHOT_MODE		1
+#define SENSOR_RAW_SNAPSHOT_MODE	2
+#define SENSOR_HFR_60FPS_MODE 3
+#define SENSOR_HFR_90FPS_MODE 4
+#define SENSOR_HFR_120FPS_MODE 5
+
+#define SENSOR_QTR_SIZE			0
+#define SENSOR_FULL_SIZE		1
+#define SENSOR_QVGA_SIZE		2
+#define SENSOR_INVALID_SIZE		3
+
+#define CAMERA_EFFECT_OFF		0
+#define CAMERA_EFFECT_MONO		1
+#define CAMERA_EFFECT_NEGATIVE		2
+#define CAMERA_EFFECT_SOLARIZE		3
+#define CAMERA_EFFECT_SEPIA		4
+#define CAMERA_EFFECT_POSTERIZE		5
+#define CAMERA_EFFECT_WHITEBOARD	6
+#define CAMERA_EFFECT_BLACKBOARD	7
+#define CAMERA_EFFECT_AQUA		8
+#define CAMERA_EFFECT_EMBOSS		9
+#define CAMERA_EFFECT_SKETCH		10
+#define CAMERA_EFFECT_NEON		11
+#define CAMERA_EFFECT_MAX		12
+
+/* QRD */
+#define CAMERA_EFFECT_BW		10
+#define CAMERA_EFFECT_BLUISH	12
+#define CAMERA_EFFECT_REDDISH	13
+#define CAMERA_EFFECT_GREENISH	14
+
+/* QRD */
+#define CAMERA_ANTIBANDING_OFF		0
+#define CAMERA_ANTIBANDING_50HZ		2
+#define CAMERA_ANTIBANDING_60HZ		1
+#define CAMERA_ANTIBANDING_AUTO		3
+
+#define CAMERA_CONTRAST_LV0			0
+#define CAMERA_CONTRAST_LV1			1
+#define CAMERA_CONTRAST_LV2			2
+#define CAMERA_CONTRAST_LV3			3
+#define CAMERA_CONTRAST_LV4			4
+#define CAMERA_CONTRAST_LV5			5
+#define CAMERA_CONTRAST_LV6			6
+#define CAMERA_CONTRAST_LV7			7
+#define CAMERA_CONTRAST_LV8			8
+#define CAMERA_CONTRAST_LV9			9
+
+#define CAMERA_BRIGHTNESS_LV0			0
+#define CAMERA_BRIGHTNESS_LV1			1
+#define CAMERA_BRIGHTNESS_LV2			2
+#define CAMERA_BRIGHTNESS_LV3			3
+#define CAMERA_BRIGHTNESS_LV4			4
+#define CAMERA_BRIGHTNESS_LV5			5
+#define CAMERA_BRIGHTNESS_LV6			6
+#define CAMERA_BRIGHTNESS_LV7			7
+#define CAMERA_BRIGHTNESS_LV8			8
+
+
+#define CAMERA_SATURATION_LV0			0
+#define CAMERA_SATURATION_LV1			1
+#define CAMERA_SATURATION_LV2			2
+#define CAMERA_SATURATION_LV3			3
+#define CAMERA_SATURATION_LV4			4
+#define CAMERA_SATURATION_LV5			5
+#define CAMERA_SATURATION_LV6			6
+#define CAMERA_SATURATION_LV7			7
+#define CAMERA_SATURATION_LV8			8
+
+#define CAMERA_SHARPNESS_LV0		0
+#define CAMERA_SHARPNESS_LV1		3
+#define CAMERA_SHARPNESS_LV2		6
+#define CAMERA_SHARPNESS_LV3		9
+#define CAMERA_SHARPNESS_LV4		12
+#define CAMERA_SHARPNESS_LV5		15
+#define CAMERA_SHARPNESS_LV6		18
+#define CAMERA_SHARPNESS_LV7		21
+#define CAMERA_SHARPNESS_LV8		24
+#define CAMERA_SHARPNESS_LV9		27
+#define CAMERA_SHARPNESS_LV10		30
+
+#define CAMERA_SETAE_AVERAGE		0
+#define CAMERA_SETAE_CENWEIGHT	1
+
+#define CFG_SET_SATURATION		30
+#define CFG_SET_SHARPNESS			31
+#define CFG_SET_TOUCHAEC            32
+#define CFG_SET_AUTO_FOCUS          33
+#define CFG_SET_AUTOFLASH 34
+/* QRD */
+#define CFG_SET_EXPOSURE_COMPENSATION 35
+
+#define  CAMERA_WB_AUTO               1 /* This list must match aeecamera.h */
+#define  CAMERA_WB_CUSTOM             2
+#define  CAMERA_WB_INCANDESCENT       3
+#define  CAMERA_WB_FLUORESCENT        4
+#define  CAMERA_WB_DAYLIGHT           5
+#define  CAMERA_WB_CLOUDY_DAYLIGHT    6
+#define  CAMERA_WB_TWILIGHT           7
+#define  CAMERA_WB_SHADE              8
+
+#define CAMERA_EXPOSURE_COMPENSATION_LV0			12
+#define CAMERA_EXPOSURE_COMPENSATION_LV1			6
+#define CAMERA_EXPOSURE_COMPENSATION_LV2			0
+#define CAMERA_EXPOSURE_COMPENSATION_LV3			-6
+#define CAMERA_EXPOSURE_COMPENSATION_LV4			-12
+
+enum msm_v4l2_saturation_level {
+	MSM_V4L2_SATURATION_L0,
+	MSM_V4L2_SATURATION_L1,
+	MSM_V4L2_SATURATION_L2,
+	MSM_V4L2_SATURATION_L3,
+	MSM_V4L2_SATURATION_L4,
+	MSM_V4L2_SATURATION_L5,
+	MSM_V4L2_SATURATION_L6,
+	MSM_V4L2_SATURATION_L7,
+	MSM_V4L2_SATURATION_L8,
+	MSM_V4L2_SATURATION_L9,
+	MSM_V4L2_SATURATION_L10,
+};
+
+enum msm_v4l2_exposure_level {
+	MSM_V4L2_EXPOSURE_N2,
+	MSM_V4L2_EXPOSURE_N1,
+	MSM_V4L2_EXPOSURE_D,
+	MSM_V4L2_EXPOSURE_P1,
+	MSM_V4L2_EXPOSURE_P2,
+};
+
+enum msm_v4l2_sharpness_level {
+	MSM_V4L2_SHARPNESS_L0,
+	MSM_V4L2_SHARPNESS_L1,
+	MSM_V4L2_SHARPNESS_L2,
+	MSM_V4L2_SHARPNESS_L3,
+	MSM_V4L2_SHARPNESS_L4,
+	MSM_V4L2_SHARPNESS_L5,
+	MSM_V4L2_SHARPNESS_L6,
+};
+
+enum msm_v4l2_expo_metering_mode {
+	MSM_V4L2_EXP_FRAME_AVERAGE,
+	MSM_V4L2_EXP_CENTER_WEIGHTED,
+	MSM_V4L2_EXP_SPOT_METERING,
+};
+
+enum msm_v4l2_iso_mode {
+	MSM_V4L2_ISO_AUTO = 0,
+	MSM_V4L2_ISO_DEBLUR,
+	MSM_V4L2_ISO_100,
+	MSM_V4L2_ISO_200,
+	MSM_V4L2_ISO_400,
+	MSM_V4L2_ISO_800,
+	MSM_V4L2_ISO_1600,
+};
+
+enum msm_v4l2_wb_mode {
+	MSM_V4L2_WB_MIN_MINUS_1,
+	MSM_V4L2_WB_AUTO = 1,
+	MSM_V4L2_WB_CUSTOM,
+	MSM_V4L2_WB_INCANDESCENT,
+	MSM_V4L2_WB_FLUORESCENT,
+	MSM_V4L2_WB_DAYLIGHT,
+	MSM_V4L2_WB_CLOUDY_DAYLIGHT,
+	MSM_V4L2_WB_TWILIGHT,
+	MSM_V4L2_WB_SHADE,
+	MSM_V4L2_WB_OFF,
+};
+
+enum msm_v4l2_power_line_frequency {
+	MSM_V4L2_POWER_LINE_OFF,
+	MSM_V4L2_POWER_LINE_60HZ,
+	MSM_V4L2_POWER_LINE_50HZ,
+	MSM_V4L2_POWER_LINE_AUTO,
+};
+
+struct sensor_pict_fps {
+	uint16_t prevfps;
+	uint16_t pictfps;
+};
+
+struct exp_gain_cfg {
+	uint16_t gain;
+	uint32_t line;
+};
+
+struct focus_cfg {
+	int32_t steps;
+	int dir;
+};
+
+struct fps_cfg {
+	uint16_t f_mult;
+	uint16_t fps_div;
+	uint32_t pict_fps_div;
+};
+struct wb_info_cfg {
+	uint16_t red_gain;
+	uint16_t green_gain;
+	uint16_t blue_gain;
+};
+struct sensor_3d_exp_cfg {
+	uint16_t gain;
+	uint32_t line;
+	uint16_t r_gain;
+	uint16_t b_gain;
+	uint16_t gr_gain;
+	uint16_t gb_gain;
+	uint16_t gain_adjust;
+};
+struct sensor_3d_cali_data_t{
+	unsigned char left_p_matrix[3][4][8];
+	unsigned char right_p_matrix[3][4][8];
+	unsigned char square_len[8];
+	unsigned char focal_len[8];
+	unsigned char pixel_pitch[8];
+	uint16_t left_r;
+	uint16_t left_b;
+	uint16_t left_gb;
+	uint16_t left_af_far;
+	uint16_t left_af_mid;
+	uint16_t left_af_short;
+	uint16_t left_af_5um;
+	uint16_t left_af_50up;
+	uint16_t left_af_50down;
+	uint16_t right_r;
+	uint16_t right_b;
+	uint16_t right_gb;
+	uint16_t right_af_far;
+	uint16_t right_af_mid;
+	uint16_t right_af_short;
+	uint16_t right_af_5um;
+	uint16_t right_af_50up;
+	uint16_t right_af_50down;
+};
+struct sensor_init_cfg {
+	uint8_t prev_res;
+	uint8_t pict_res;
+};
+
+struct sensor_calib_data {
+	/* Color Related Measurements */
+	uint16_t r_over_g;
+	uint16_t b_over_g;
+	uint16_t gr_over_gb;
+
+	/* Lens Related Measurements */
+	uint16_t macro_2_inf;
+	uint16_t inf_2_macro;
+	uint16_t stroke_amt;
+	uint16_t af_pos_1m;
+	uint16_t af_pos_inf;
+};
+
+enum msm_sensor_resolution_t {
+	MSM_SENSOR_RES_FULL,
+	MSM_SENSOR_RES_QTR,
+	MSM_SENSOR_RES_2,
+	MSM_SENSOR_RES_3,
+	MSM_SENSOR_RES_4,
+	MSM_SENSOR_RES_5,
+	MSM_SENSOR_RES_6,
+	MSM_SENSOR_RES_7,
+	MSM_SENSOR_INVALID_RES,
+};
+
+struct msm_sensor_output_info_t {
+	uint16_t x_output;
+	uint16_t y_output;
+	uint16_t line_length_pclk;
+	uint16_t frame_length_lines;
+	uint32_t vt_pixel_clk;
+	uint32_t op_pixel_clk;
+	uint16_t binning_factor;
+};
+
+struct sensor_output_info_t {
+	struct msm_sensor_output_info_t *output_info;
+	uint16_t num_info;
+};
+
+struct sensor_eeprom_data_t {
+	void *eeprom_data;
+	uint16_t index;
+};
+
+struct mirror_flip {
+	int32_t x_mirror;
+	int32_t y_flip;
+};
+
+struct cord {
+	uint32_t x;
+	uint32_t y;
+};
+
+struct sensor_cfg_data {
+	int cfgtype;
+	int mode;
+	int rs;
+	uint8_t max_steps;
+
+	union {
+		int8_t effect;
+		uint8_t lens_shading;
+		uint8_t lut_index;
+		uint16_t prevl_pf;
+		uint16_t prevp_pl;
+		uint16_t pictl_pf;
+		uint16_t pictp_pl;
+		uint32_t pict_max_exp_lc;
+		uint16_t p_fps;
+		struct sensor_init_cfg init_info;
+		struct sensor_pict_fps gfps;
+		struct exp_gain_cfg exp_gain;
+		struct focus_cfg focus;
+		struct fps_cfg fps;
+		struct wb_info_cfg wb_info;
+		struct sensor_3d_exp_cfg sensor_3d_exp;
+		struct sensor_calib_data calib_info;
+		struct sensor_output_info_t output_info;
+		struct sensor_eeprom_data_t eeprom_data;
+		/* QRD */
+		uint16_t antibanding;
+		uint8_t contrast;
+		uint8_t saturation;
+		uint8_t sharpness;
+		int8_t brightness;
+		int ae_mode;
+		uint8_t wb_val;
+		int8_t exp_compensation;
+		struct cord aec_cord;
+		int is_autoflash;
+		struct mirror_flip mirror_flip;
+	} cfg;
+};
+
+struct msm_actuator_move_params_t {
+	int8_t dir;
+	int32_t num_steps;
+};
+
+struct msm_actuator_set_info_t {
+	uint32_t total_steps;
+	uint16_t gross_steps;
+	uint16_t fine_steps;
+};
+
+struct msm_actuator_get_info_t {
+	uint32_t focal_length_num;
+	uint32_t focal_length_den;
+	uint32_t f_number_num;
+	uint32_t f_number_den;
+	uint32_t f_pix_num;
+	uint32_t f_pix_den;
+	uint32_t total_f_dist_num;
+	uint32_t total_f_dist_den;
+};
+
+struct msm_actuator_cfg_data {
+	int cfgtype;
+	uint8_t is_af_supported;
+	union {
+		struct msm_actuator_move_params_t move;
+		struct msm_actuator_set_info_t set_info;
+		struct msm_actuator_get_info_t get_info;
+	} cfg;
+};
+
+struct sensor_large_data {
+	int cfgtype;
+	union {
+		struct sensor_3d_cali_data_t sensor_3d_cali_data;
+	} data;
+};
+
+enum sensor_type_t {
+	BAYER,
+	YUV,
+	JPEG_SOC,
+};
+
+enum flash_type {
+	LED_FLASH,
+	STROBE_FLASH,
+};
+
+enum strobe_flash_ctrl_type {
+	STROBE_FLASH_CTRL_INIT,
+	STROBE_FLASH_CTRL_CHARGE,
+	STROBE_FLASH_CTRL_RELEASE
+};
+
+struct strobe_flash_ctrl_data {
+	enum strobe_flash_ctrl_type type;
+	int charge_en;
+};
+
+struct msm_camera_info {
+	int num_cameras;
+	uint8_t has_3d_support[MSM_MAX_CAMERA_SENSORS];
+	uint8_t is_internal_cam[MSM_MAX_CAMERA_SENSORS];
+	uint32_t s_mount_angle[MSM_MAX_CAMERA_SENSORS];
+	const char *video_dev_name[MSM_MAX_CAMERA_SENSORS];
+	enum sensor_type_t sensor_type[MSM_MAX_CAMERA_SENSORS];
+
+};
+
+struct msm_cam_config_dev_info {
+	int num_config_nodes;
+	const char *config_dev_name[MSM_MAX_CAMERA_CONFIGS];
+	int config_dev_id[MSM_MAX_CAMERA_CONFIGS];
+};
+
+struct msm_mctl_node_info {
+	int num_mctl_nodes;
+	const char *mctl_node_name[MSM_MAX_CAMERA_SENSORS];
+};
+
+struct flash_ctrl_data {
+	int flashtype;
+	union {
+		int led_state;
+		struct strobe_flash_ctrl_data strobe_ctrl;
+	} ctrl_data;
+};
+
+#define GET_NAME			0
+#define GET_PREVIEW_LINE_PER_FRAME	1
+#define GET_PREVIEW_PIXELS_PER_LINE	2
+#define GET_SNAPSHOT_LINE_PER_FRAME	3
+#define GET_SNAPSHOT_PIXELS_PER_LINE	4
+#define GET_SNAPSHOT_FPS		5
+#define GET_SNAPSHOT_MAX_EP_LINE_CNT	6
+
+struct msm_camsensor_info {
+	char name[MAX_SENSOR_NAME];
+	uint8_t flash_enabled;
+	int8_t total_steps;
+	uint8_t support_3d;
+};
+
+#define V4L2_SINGLE_PLANE	0
+#define V4L2_MULTI_PLANE_Y	0
+#define V4L2_MULTI_PLANE_CBCR	1
+#define V4L2_MULTI_PLANE_CB	1
+#define V4L2_MULTI_PLANE_CR	2
+
+struct plane_data {
+	int plane_id;
+	uint32_t offset;
+	unsigned long size;
+};
+
+struct img_plane_info {
+	uint32_t width;
+	uint32_t height;
+	uint32_t pixelformat;
+	uint8_t buffer_type; /*Single/Multi planar*/
+	uint8_t output_port;
+	uint32_t ext_mode;
+	uint8_t num_planes;
+	struct plane_data plane[MAX_PLANES];
+	uint32_t sp_y_offset;
+	uint8_t vpe_can_use;
+};
+
+#endif /* __LINUX_MSM_CAMERA_H */
diff -uNra linux-3.0.82/drivers/media/video/ov9640.h linux-3.0.82x/drivers/media/video/ov9640.h
--- linux-3.0.82/drivers/media/video/ov9640.h	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/ov9640.h	2017-09-23 03:42:49.550676493 +0800
@@ -157,9 +157,9 @@
 #define	OV9640_COM13_Y_DELAY_EN	0x08
 #define	OV9640_COM13_YUV_DLY(x)	((x) & 0x07)
 
-#define	OV9640_COM15_OR_00FF	0x00
+#define	OV9640_COM15_OR_00FF	0xc0  //dbg-yg
 #define	OV9640_COM15_OR_01FE	0x40
-#define	OV9640_COM15_OR_10F0	0xc0
+#define	OV9640_COM15_OR_10F0	0x00  //dbg-yg
 #define	OV9640_COM15_RGB_NORM	0x00
 #define	OV9640_COM15_RGB_565	0x10
 #define	OV9640_COM15_RGB_555	0x30
@@ -169,6 +169,7 @@
 /* IDs */
 #define	OV9640_V2		0x9648
 #define	OV9640_V3		0x9649
+#define	OV9650_V4		0x9652
 #define	VERSION(pid, ver)	(((pid) << 8) | ((ver) & 0xFF))
 
 /* supported resolutions */
diff -uNra linux-3.0.82/drivers/media/video/s3c_camif.h linux-3.0.82x/drivers/media/video/s3c_camif.h
--- linux-3.0.82/drivers/media/video/s3c_camif.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/s3c_camif.h	2017-09-23 03:42:49.550676493 +0800
@@ -0,0 +1,511 @@
+/* drivers/media/video/s3c_camif.h
+ *
+ * Copyright (c) 2008 Samsung Electronics
+ *
+ * Samsung S3C Camera driver
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __S3C_CAMIF_H_
+#define __S3C_CAMIF_H_
+
+#ifdef __KERNEL__
+//#if 0
+//#include "videodev.h"
+//#include "videodev2.h"
+#include <asm/types.h>
+#include <linux/i2c.h>
+//#include "video_decoder.h"
+//#include <plat/reserved_mem.h>
+#endif	/* __KERNEL__ */
+
+#if !defined(O_NONCAP)
+#define O_NONCAP O_TRUNC
+#endif
+
+#if defined(CAMIF_DEBUG)
+#define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
+#else
+#define DPRINTK(fmt, args...)
+#endif
+
+#if defined(CAMIF_DEBUG)
+#define assert(expr) \
+	if(!(expr)) { \
+	printk( "Assertion failed! %s,%s,%s,line=%d\n", \
+	#expr,__FILE__,__FUNCTION__,__LINE__);		\
+	}
+#else
+#define assert(expr)
+#endif
+
+#if defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410)
+#define FIMC_VER	"3.0"
+#elif defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2450) || defined(CONFIG_CPU_S3C2416)
+#define CAM_MEM_SIZE	0x04000000
+#define FIMC_VER	"2.3"
+#else
+#define CAM_MEM_SIZE	0x04000000
+#define FIMC_VER	"2.x"
+#endif
+
+#undef FSM_ON_PREVIEW
+#define FSM_ON_CODEC
+
+#undef USE_LAST_IRQ			/* turn on if pp count is 1 */
+
+#define CODEC_DEV_NAME			"CAMIF_CODEC"
+#define PREVIEW_DEV_NAME		"CAMIF_PREVIEW"
+
+#define CAMIF_DEV_NUM			2
+#define FIMC_CODEC_INDEX		0
+#define FIMC_PREVIEW_INDEX		1
+
+#define BURST_ERR			1
+
+#if defined (CONFIG_MACH_BONANZA)
+#define CAMERA_MEM_SIZE       RESERVED_PMEM_PICTURE_SIZE // RESERVED_MEM_CAMERA
+#else
+#define CAMERA_MEM_SIZE       RESERVED_PMEM_PICTURE // RESERVED_MEM_CAMERA
+#endif
+#define CAMERA_MEM_START      PICTURE_RESERVED_PMEM_START
+
+
+#define YUV_MEM				CAMERA_MEM_SIZE
+#define RGB_MEM				(CAMERA_MEM_SIZE - YUV_MEM)
+
+#define CODEC_DEFAULT_WIDTH	        1024
+#define CODEC_DEFAULT_HEIGHT		 768
+#define PREVIEW_DEFAULT_WIDTH		640
+#define PREVIEW_DEFAULT_HEIGHT		480
+
+#define CROP_DEFAULT_WIDTH		352
+#define CROP_DEFAULT_HEIGHT		272
+
+#define MAX_PPNUM              4
+#define CODEC_DEFAULT_PPNUM    4
+#define PREVIEW_DEFAULT_PPNUM  2
+
+//#define CODEC_MINOR			12
+//#define PREVIEW_MINOR			13
+#define CODEC_MINOR			0
+#define PREVIEW_MINOR			1
+
+#define CHECK_FREQ			5
+#define INSTANT_SKIP			0
+#define INSTANT_GO			1
+
+#define ZOOM_AT_A_TIME_IN_PIXELS	16 //32
+#define ZOOM_IN_MAX			640
+
+/* Codec or Preview Status */
+#define CAMIF_STARTED			(1 << 1)
+#define CAMIF_STOPPED			(1 << 2)
+#define CAMIF_INT_HAPPEN		(1 << 3)
+
+/* Codec or Preview  : Interrupt FSM */
+#define CAMIF_1st_INT			(1 << 7)
+#define CAMIF_Xth_INT			(1 << 8)
+#define CAMIF_Yth_INT			(1 << 9)
+#define CAMIF_Zth_INT			(1 << 10)
+#define CAMIF_NORMAL_INT		(1 << 11)
+#define CAMIF_DUMMY_INT			(1 << 12)
+#define CAMIF_CONTINUOUS_INT	(1 << 13)
+#define CAMIF_SET_LAST_INT		(1 << 14)
+#define CAMIF_STOP_CAPTURE		(1 << 15)
+#define CAMIF_LAST_IRQ			(1 << 16)
+#define CAMIF_PENDING_INT		0
+
+//skip frame(5->1) is modified by sangyub
+// when the preview start, 1 frame is skipped.(5->1)*/
+#define CAMIF_CAPTURE_SKIP_FRAMES	1
+
+/* CAMIF RESET Definition */
+#define CAMIF_RESET			(1 << 0)
+#define CAMIF_EX_RESET_AL	(1 << 1)	/* Active Low */
+#define CAMIF_EX_RESET_AH	(1 << 2)	/* Active High */
+
+
+/* Sensor Command Defintion */
+#define SENSOR_DEFAULT			0
+
+#define SENSOR_INIT			(1 << 0)
+#define USER_ADD			(1 << 1)
+#define USER_EXIT			(1 << 2)
+
+#define SENSOR_CIF			(1 << 3)
+#define SENSOR_QVGA			(1 << 4)
+#define SENSOR_VGA			(1 << 5)
+#define SENSOR_QSVGA		(1 << 6)
+#define SENSOR_SVGA			(1 << 7)
+#define SENSOR_XGA			(1 << 8)
+#define SENSOR_SXGA			(1 << 9)
+#define SENSOR_UXGA			(1 << 10)
+#define SENSOR_QSXGA		(1 << 11)
+#define SENSOR_QXGA			(1 << 12)
+
+#define SENSOR_MIRROR		(1 << 13)
+#define SENSOR_ZOOMOUT		(1 << 14)
+#define SENSOR_ZOOMIN		(1 << 15)
+
+#define SENSOR_USER_READ	(1 << 16)
+#define SENSOR_USER_WRITE	(1 << 17)
+
+#define SENSOR_MODE_SET		(1 << 18)
+#define SENSOR_AF			(1 << 19)
+#define SENSOR_SCENE_MODE	(1 << 20)
+#define SENSOR_PHOTOMETRY	(1 << 21)
+#define SENSOR_ISO			(1 << 22)
+#define SENSOR_CONTRAST		(1 << 23)
+#define SENSOR_SATURATION	(1 << 24)
+#define SENSOR_SHARPNESS	(1 << 25)
+#define SENSOR_WB			(1 << 26)
+#define SENSOR_BRIGHTNESS	(1 << 27)
+#define SENSOR_EFFECT		(1 << 28)
+#define SENSOR_FLASH_CAMERA	(1 << 29)
+#define SENSOR_FLASH_MOVIE	(1 << 30)
+#define SENSOR_EXIF_DATA	(1 << 31)
+
+#define SENSOR_FRAMERATE	(0x3 << 1)
+#if defined (CONFIG_MACH_VITAL)
+#define SENSOR_FRAMERATE	(1 << 32)
+#endif
+
+
+#ifdef CONFIG_VIDEO_SAMSUNG_CE131
+	#define SENSOR_GET_FWVERSION	(1 << 31) | ( 1 << 0)  
+//	#define SENSOR_SET_PREVIEW		(1 << 31) | ( 2 << 0)  
+//	#define SENSOR_START_CAPTURE	(1 << 31) | ( 3 << 0)  
+	#define SENSOR_JPEG_TRANSFER	(1 << 31) | ( 4 << 0)  
+//	#define SENSOR_SET_AF			(1 << 31) | ( 5 << 0)  
+//	#define SENSOR_GET_AF			(1 << 31) | ( 6 << 0)  
+	#define SENSOR_FIX_FRAMERATE	(1 << 31) | ( 7 << 0)  
+	#define SENSOR_SET_CAPTURE_SIZE	(1 << 31) | ( 8 << 0)  
+	#define SENSOR_GET_JPEG_SIZE	(1 << 31) | ( 9 << 0)  
+	#define SENSOR_SET_PREVIEW_SIZE	(1 << 31) | (10 << 0)  
+	#define SENSOR_SET_JPEG_QUAL	(1 << 31) | (11 << 0)  
+	#define SENSOR_DIG_ZOOM			(1 << 31) | (12 << 0)  
+	#define SENSOR_WDR				(1 << 31) | (13 << 0)  
+	#define SENSOR_FW_UPDATE		(1 << 31) | (14 << 0)  
+#endif
+
+#define SENSOR_MAX			0xffffffff
+
+/* Global Status Definition */
+#define PWANT2START			(1 << 0)
+#define CWANT2START			(1 << 1)
+#define BOTH_STARTED		(PWANT2START | CWANT2START)
+#define P_NOT_WORKING		(1 << 4)
+#define C_WORKING			(1 << 5)
+#define P_WORKING			(1 << 6)
+#define C_NOT_WORKING		(1 << 7)
+
+#define FORMAT_FLAGS_DITHER		0x01
+#define FORMAT_FLAGS_PACKED		0x02
+#define FORMAT_FLAGS_PLANAR		0x04
+#define FORMAT_FLAGS_RAW		0x08
+#define FORMAT_FLAGS_CrCb		0x10
+
+enum camif_itu_fmt {
+	CAMIF_ITU601 = (1 << 31),
+	CAMIF_ITU656 = 0,
+};
+
+/* It is possbie to use two device simultaneously */
+enum camif_dma_type {
+	CAMIF_PREVIEW = (1 << 0),
+	CAMIF_CODEC   = (1 << 1),
+};
+
+enum camif_order422 {
+	CAMIF_YCBYCR = 0,
+	CAMIF_YCRYCB = (1 << 14),
+	CAMIF_CBYCRY = (1 << 15),
+	CAMIF_CRYCBY = (1 << 15) | (1 << 14),
+};
+
+enum flip_mode {
+	CAMIF_FLIP = 0,
+	CAMIF_ROTATE_90	= (1 << 13),
+	CAMIF_FLIP_X = (1 << 14),
+	CAMIF_FLIP_Y = (1 << 15),
+	CAMIF_FLIP_MIRROR = (1 << 15) | (1 << 14),
+	CAMIF_FLIP_ROTATE_270 = (1 << 15) | (1 << 14) | (1 << 13),
+};
+
+enum camif_fmt {
+	CAMIF_YCBCR420 = (1 << 0),
+	CAMIF_YCBCR422 = (1 << 1),
+	CAMIF_YCBCR422I = (1 << 2),
+	CAMIF_RGB16 = (1 << 3),
+	CAMIF_RGB24 = (1 << 4),
+	CAMIF_RGB32 = (1 << 5),
+};
+
+enum camif_capturing {
+	CAMIF_BOTH_DMA_ON = (1 << 4),
+	CAMIF_DMA_ON = (1 << 3),
+	CAMIF_BOTH_DMA_OFF = (1 << 1),
+	CAMIF_DMA_OFF = (1 << 0),
+	CAMIF_DMA_OFF_L_IRQ = (1 << 5),
+};
+
+enum image_effect {
+	CAMIF_BYPASS,
+	CAMIF_ARBITRARY_CB_CR,
+	CAMIF_NEGATIVE,
+	CAMIF_ART_FREEZE,
+	CAMIF_EMBOSSING ,
+	CAMIF_SILHOUETTE,
+};
+
+enum input_channel{
+	CAMERA_INPUT,
+	MSDMA_FROM_CODEC,
+	MSDMA_FROM_PREVIEW,
+};
+
+enum output_channel{
+	CAMIF_OUT_PP,
+	CAMIF_OUT_FIFO,
+};
+
+typedef struct camif_performance
+{
+	int	frames;
+	int	framesdropped;
+	__u64	bytesin;
+	__u64	bytesout;
+	__u32	reserved[4];
+} camif_perf_t;
+
+typedef struct {
+	// modified by sangyub 
+	// phys_y and phys_rgb is shared using union structure
+	// vir_rgb and virt_y is shared using union structure
+	union{
+		dma_addr_t  phys_y;
+		dma_addr_t  phys_rgb;
+	};
+	
+	dma_addr_t  phys_cb;
+	dma_addr_t  phys_cr;
+	u8 *        virt_cb;
+	u8 *        virt_cr;
+	union{
+		u8 *        virt_rgb;
+		u8 *        virt_y;
+	};
+} img_buf_t;
+
+/* this structure convers the CIWDOFFST, prescaler, mainscaler */
+typedef struct {
+	u32 modified_src_x;	/* After windows applyed to source_x */
+	u32 modified_src_y;
+	u32 hfactor;
+	u32 vfactor;
+	u32 shfactor;		/* SHfactor = 10 - ( hfactor + vfactor ) */
+	u32 prehratio;
+	u32 prevratio;
+	u32 predst_x;
+	u32 predst_y;
+	u32 scaleup_h;
+	u32 scaleup_v;
+	u32 mainhratio;
+	u32 mainvratio;
+	u32 scalerbypass;	/* only codec */
+	u32 zoom_in_cnt;
+} scaler_t;
+
+enum v4l2_status {
+	CAMIF_V4L2_INIT	= (1 << 0),
+	CAMIF_v4L2_DIRTY = (1 << 1),
+};
+
+typedef struct {
+	struct mutex		lock;
+	enum camif_itu_fmt	itu_fmt;
+	enum camif_order422	order422;
+	struct i2c_client	*sensor;
+	u32			win_hor_ofst;
+	u32			win_ver_ofst;
+	u32			win_hor_ofst2;
+	u32			win_ver_ofst2;
+	u32			camclk; 		/* External Image Sensor Camera Clock */
+	u32			source_x;
+	u32			source_y;
+	u32			polarity_pclk;
+	u32			polarity_vsync;
+	u32			polarity_href;
+#ifdef CONFIG_VIDEO_SAMSUNG_CE131
+	u32			href_mask;
+#endif
+	u32			user;			/* MAX 2 (codec, preview) */
+	u32			irq_old_priority;	/* BUS PRIORITY register */
+	u32			status;
+	u32			init_sensor;		/* initializing sensor */
+	u32			reset_type;		/* External Sensor Reset  Type */
+	u32			reset_udelay;
+	u32			zoom_in_cnt;
+} camif_cis_t;
+
+/* when  App want to change v4l2 parameter,
+ * we instantly store it into v4l2_t v2
+ * and then reflect it to hardware
+ */
+typedef struct v4l2 {
+	struct v4l2_fmtdesc	*fmtdesc;
+	struct v4l2_framebuffer	frmbuf; /* current frame buffer */
+	struct v4l2_input	*input;
+	struct v4l2_output	*output;
+	enum v4l2_status	status;
+
+	/* crop */
+	struct v4l2_rect	crop_bounds;
+	struct v4l2_rect	crop_defrect;
+	struct v4l2_rect	crop_current;
+
+} v4l2_t;
+
+
+typedef struct camif_c_t {
+	struct video_device	*v;
+
+	/* V4L2 param only for v4l2 driver */
+	v4l2_t			v2;
+	camif_cis_t		*cis;			/* Common between Codec and Preview */
+
+	/* logical parameter */
+	wait_queue_head_t	waitq;
+	u32			status; 		/* Start/Stop */
+	u32			fsm;			/* Start/Stop */
+	u32			open_count;		/* duplicated */
+	int			irq;
+	char			shortname[16];
+	u32			target_x;
+	u32			target_y;
+	scaler_t		sc;
+	enum flip_mode		flip;
+	enum image_effect	effect;
+	enum camif_dma_type	dma_type;
+
+	/* 4 pingpong Frame memory */
+	u8 *            pp_virt_buf;
+	dma_addr_t      pp_phys_buf;
+	u32             pp_totalsize;
+	u32             pp_num; 		// used pingpong memory number */
+	img_buf_t       img_buf[4];
+	int             flag_img_buf_user_set;
+	enum camif_fmt  src_fmt;
+	enum camif_fmt  dst_fmt;
+	enum camif_capturing	capture_enable;
+	camif_perf_t		perf;
+	u32			cur_frame_num;
+	u32			auto_restart;		/* Only For Preview */
+	int			input_channel;
+	int			output_channel;
+	int			buffer_size;
+	void			*other; 		/* other camif_cfg_t */
+	u32			msdma_status;		/* 0 : stop, 1 : start */
+	void __iomem		*regs;
+} camif_cfg_t;
+
+/*  Test Application Usage */
+typedef struct {
+	int src_x;
+	int src_y;
+	int dst_x;
+	int dst_y;
+	int src_fmt;
+	int dst_fmt;
+	int flip;
+	int awb;
+	int effect;
+	int input_channel;
+	int output_channel;
+	unsigned int h_offset;
+	unsigned int v_offset;
+	unsigned int h_offset2;
+	unsigned int v_offset2;
+} camif_param_t;
+
+enum sensor_cap_mode{
+	SENSOR_PREVIEW = (1 << 0), 
+	SENSOR_CAPTURE = (1 << 1), 
+	SENSOR_CAMCORDER = (1 << 2),
+	SENSOR_NIGHTMODE = (1 << 4),
+	SENSOR_FLASH_CAPTURE= (1 << 8),
+	SENSOR_FLASH_CAP_LOW= (1 << 16),
+};
+
+typedef struct {
+	unsigned int width;
+	unsigned int height;
+	unsigned int opt_zoom;
+	unsigned int dig_zoom;
+	unsigned int white_balance;
+	unsigned int bright;
+	unsigned int auto_focus;
+	unsigned int rotate_angle;
+} CAM_PP;
+
+struct v4l2_input_handler {
+	int (*init_input_handler)(void);
+	void (*exit_input_handler)(void);
+};
+
+/* Externs */
+#ifdef CONFIG_VIDEO_SAMSUNG_CE131
+extern int s3c_camif_control_global_capture(camif_cfg_t *cfg,int value);
+#endif
+extern camif_cfg_t* s3c_camif_get_fimc_object(int);
+extern int s3c_camif_start_dma(camif_cfg_t *);
+extern int s3c_camif_stop_dma(camif_cfg_t *);
+extern int s3c_camif_get_frame_num(camif_cfg_t *);
+extern unsigned char* s3c_camif_get_frame(camif_cfg_t *);
+extern int s3c_camif_control_fimc(camif_cfg_t *);
+extern void s3c_camif_reset(int, int);
+extern void s3c_camif_init(void);
+extern int s3c_camif_get_fifo_status(camif_cfg_t *);
+extern void s3c_camif_enable_lastirq(camif_cfg_t *);
+extern void s3c_camif_disable_lastirq(camif_cfg_t *);
+extern void s3c_camif_change_flip(camif_cfg_t *);
+extern void s3c_camif_change_effect(camif_cfg_t *);
+extern int s3c_camif_start_codec_msdma(camif_cfg_t *);
+extern int s3c_camif_set_clock(unsigned int camclk);
+extern void s3c_camif_disable_clock(void);
+extern int s3c_camif_start_preview_msdma(camif_cfg_t *);
+extern camif_cis_t* get_initialized_cis(void);
+extern void s3c_camif_clear_irq(int);
+extern int s3c_camif_set_source_format(camif_cis_t *);
+extern void s3c_camif_register_sensor(camif_cis_t *);
+extern void s3c_camif_unregister_sensor(camif_cis_t *);
+extern int s3c_camif_setup_dma(camif_cfg_t *);
+extern int s3c_camif_init_sensor(camif_cfg_t *);
+extern int s3c_camif_set_offset(camif_cis_t *);
+extern void s3c_camif_set_priority(int);
+extern void s3c_camif_open_sensor(camif_cis_t *);
+extern void s3c_camif_set_polarity(camif_cfg_t *cfg);
+extern struct clk *cam_clock;
+extern struct clk *cam_hclk;
+extern int s3c_camif_add_sensor(struct v4l2_input*, struct v4l2_input_handler *);
+extern void s3c_camif_remove_sensor(struct v4l2_input *, struct v4l2_input_handler *);
+
+extern void clk_cam_enable(void);
+extern void clk_cam_disable(void);
+
+#endif
+
diff -uNra linux-3.0.82/drivers/media/video/s5k5ca_0723.h linux-3.0.82x/drivers/media/video/s5k5ca_0723.h
--- linux-3.0.82/drivers/media/video/s5k5ca_0723.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/s5k5ca_0723.h	2017-09-23 03:42:49.550676493 +0800
@@ -0,0 +1,82 @@
+
+/*
+ * Copyright (c) 2008-2009 QUALCOMM USA, INC.
+ *
+ * All source code in this file is licensed under the following license
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, you can find it at http://www.fsf.org
+ */
+
+#ifndef S5K5CA_H
+#define S5K5CA_H
+
+
+//#include <mach/board.h>
+//#include <linux/types.h>
+//#include "s5k5ca1.h"
+extern struct s5k5ca_reg s5k5ca_regs;
+
+
+
+struct s5k5ca_i2c_reg_conf
+{
+    unsigned short waddr;
+    unsigned short wdata;
+};
+
+struct s5k5ca_reg
+{
+    const struct s5k5ca_i2c_reg_conf * s5k5ca_init_reg_config_sunny;
+    const unsigned short               s5k5ca_init_reg_config_sunny_size;
+    const struct s5k5ca_i2c_reg_conf * s5k5ca_init_reg_config_sunny_2;
+    const unsigned short               s5k5ca_init_reg_config_sunny_2_size;
+    const struct s5k5ca_i2c_reg_conf * s5k5ca_init_reg_sensor_start;
+    const unsigned short               s5k5ca_init_reg_sensor_start_size;
+    const struct s5k5ca_i2c_reg_conf * s5k5ca_effect_off_reg_config;
+    const unsigned short               s5k5ca_effect_off_reg_config_size;
+    const struct s5k5ca_i2c_reg_conf * s5k5ca_effect_mono_reg_config;
+    const unsigned short               s5k5ca_effect_mono_reg_config_size;
+    const struct s5k5ca_i2c_reg_conf * s5k5ca_effect_negative_reg_config;
+    const unsigned short               s5k5ca_effect_negative_reg_config_size;
+    const struct s5k5ca_i2c_reg_conf * s5k5ca_effect_sepia_reg_config;
+    const unsigned short               s5k5ca_effect_sepia_reg_config_size;
+    const struct s5k5ca_i2c_reg_conf * s5k5ca_effect_aqua_reg_config;
+    const unsigned short               s5k5ca_effect_aqua_reg_config_size;
+    const struct s5k5ca_i2c_reg_conf * s5k5ca_effect_solarize_reg_config;
+    const unsigned short               s5k5ca_effect_solarize_reg_config_size;
+    const struct s5k5ca_i2c_reg_conf * s5k5ca_effect_posterize_reg_config;
+    const unsigned short               s5k5ca_effect_posterize_reg_config_size;
+    const struct s5k5ca_i2c_reg_conf * s5k5ca_preview_reg_config;
+    const unsigned short               s5k5ca_preview_reg_config_size;
+    const struct s5k5ca_i2c_reg_conf * s5k5ca_snapshot_reg_config;
+    const unsigned short               s5k5ca_snapshot_reg_config_size;
+    const struct s5k5ca_i2c_reg_conf * s5k5ca_wb_auto_reg_config;
+    const unsigned short               s5k5ca_wb_auto_reg_config_size;
+    const struct s5k5ca_i2c_reg_conf * s5k5ca_wb_a_reg_config;
+    const unsigned short               s5k5ca_wb_a_reg_config_size;
+    const struct s5k5ca_i2c_reg_conf * s5k5ca_wb_tl84_reg_config;
+    const unsigned short               s5k5ca_wb_tl84_reg_config_size;
+    const struct s5k5ca_i2c_reg_conf * s5k5ca_wb_f_reg_config;
+    const unsigned short               s5k5ca_wb_f_reg_config_size;
+    const struct s5k5ca_i2c_reg_conf * s5k5ca_wb_d65_reg_config;
+    const unsigned short               s5k5ca_wb_d65_reg_config_size;
+    const struct s5k5ca_i2c_reg_conf * s5k5ca_wb_d50_reg_config;
+    const unsigned short               s5k5ca_wb_d50_reg_config_size;
+    const struct s5k5ca_i2c_reg_conf * s5k5ca_mirror_mode_reg_config;
+    const unsigned short               s5k5ca_mirror_mode_reg_config_size;
+    /*delete some lines*/
+};
+
+
+
+#endif /* S5K5CA_H */
diff -uNra linux-3.0.82/drivers/media/video/s5k5ca_2048x1536_yuv_broken.h linux-3.0.82x/drivers/media/video/s5k5ca_2048x1536_yuv_broken.h
--- linux-3.0.82/drivers/media/video/s5k5ca_2048x1536_yuv_broken.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/s5k5ca_2048x1536_yuv_broken.h	2017-09-23 03:42:49.558676469 +0800
@@ -0,0 +1,5407 @@
+
+#ifndef _SAMSUNG_SXGA_H_
+#define _SAMSUNG_SXGA_H_
+
+/*******************************************************************************************
+ #  Display resolution standards #
+
+	QCIF: 176 x 144
+	CIF: 352 x 288
+	QVGA: 320 x 240
+	VGA: 640 x 480 
+	SVGA: 800 x 600 
+	XGA: 1024 x 768 
+	WXGA: 1280 x 800 
+	QVGA: 1280 x 960 
+	SXGA: 1280 x 1024 
+	SXGA+: 1400 x 1050 
+	WSXGA+: 1680 x 1050 
+	UXGA: 1600 x 1200 
+	WUXGA: 1920 x 1200 
+	QXGA: 2048 x 1536
+********************************************************************************************/
+
+//#include "../bits.h"
+
+/* Camera information 
+ * FPC Label : Samsung MEGA Pixel Camera : V4220 REV06 
+ * Modified by charles -Initial function of '3AA' test routine
+ * Modified and tested by YongHwui.Kim <yonghwui.kim@samsung.com> for S5K3AAEX Camera
+ */
+                                                                                
+#define CHIP_DELAY 0xFF
+                                                                                
+typedef struct samsung_t{
+        unsigned short page;	
+        unsigned short subaddr;
+        unsigned short value;
+
+} s5k5ca_t;
+
+// mihee 080508 start
+typedef struct samsung_short_t{
+        unsigned short subaddr;
+        unsigned short value;
+        unsigned short page;
+} s5k5ca_short_t;
+// mihee 080508 end
+
+typedef struct exif_data_st{
+        unsigned short exposureTime;
+		unsigned short lux;
+		unsigned short iso;
+} exif_data_t;
+
+#ifdef CONFIG_CPU_S3C24A0A
+#define TRY_HIGH_CLOCK 1
+#endif
+
+				//***************************************************
+				//  name: 	S5K3AAEX EVT2 setfile
+				//  ver:		v2.61	
+				//  history: 	
+				//	v0.0	start from 040908 setfile
+				//	v1.0	arange register
+				//	v1.01	change MCLK(25Mhz) and Frame rate(7fps)
+				//	v2.0	adjust register setting for 3AA EVT2
+				//		- color correction, RGB shding off, hsync start position, Mirror, fps
+				//		- Color Tuning, YGRPDLY 
+				//	v2.1	change Frame rate(7.5fps) and Total gain to x4 
+				//		(because of reducing visual noise at low illumination)
+				//		- change BPRM AGC Max and FrameAE start 
+				//		improve AE speed
+				//	v2.2	modify AWB G gain and solve 50hz flicker detection fail in 25MHz 7.5fps
+				//	v2.3	Adjust gamma, Dark Slice, white point, Hue gain,
+				//		White Balance B control, Y gain On, Digital Clamp On
+				//		lower AWB G gain
+				//	v2.4	Adjust AE window weight, Y Gamma, WhitePoint, Shading and BPR Max Thres.
+				// 	v2.41	Adjust AE/AWB window and AWB internal window boundary to decrease skin color tracking
+				// 	v2.411	special version for PSCDS
+				// 	v2.412	RGB shading off
+				//	v2.5	Lens change STW to Sekonix 
+				//		adjust White point and Y shading Coef (RGB shading off)
+				//	v2.6	New Tuning because of Full YC off and YCbCr Coef change
+				//		Gamma, Dark Slice, color matrix (not use), Color suppress
+				//		R Gain and DBPR agc MIN/MAX
+				//	v2.61	VCK inversion(data rising)
+				//***************************************************
+				///////////////////////////////////////////////////
+
+//#if defined(CONFIG_VIDEO_SAMSUNG_S5K5CA)
+s5k5ca_short_t s5k5ca_preview_00[] = 
+{
+{ 0xFCFC, 0xD000  },                                                                                  
+{ 0x0028, 0x7000  }, 
+                  
+{ 0x002A, 0x07E6  },                                                            
+{ 0x0F12, 0x0000  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow 
+{ 0x0F12, 0x0000  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+                  
+{ 0x002A, 0x0838  },
+{ 0x0F12, 0x003C  },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x0908  },
+{ 0x0F12, 0x0046  },	//TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]
+
+//HIGHLUX RECOVER Value
+{ 0x002a, 0x0B2C  },
+{ 0x0F12, 0x003C  },	//70000B2C //TVAR_afit_pBaseValS[436] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x0050  },	//70000B2E //TVAR_afit_pBaseValS[437] /AFIT16_YUV422_DENOISE_iUVHighThresh  
+
+{ 0x002a, 0x0B50  },
+{ 0x0F12, 0x012D  },	//70000B50 //TVAR_afit_pBaseValS[454] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8] 
+
+{ 0x002a, 0x0B84  },
+{ 0x0F12, 0x210C  },	//70000B84 //TVAR_afit_pBaseValS[480] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]   
+
+
+{ 0x002A, 0x035C  }, //Capture Mode//
+{ 0x0F12, 0x0000  },
+{ 0x002A, 0x0388  }, //Capture Mode//
+{ 0x0F12, 0x0000  },
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },   
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+s5k5ca_short_t s5k5ca_init_00[] = 
+{
+{ 0xFCFC, 0xD000  },
+
+//************************************//
+////****************************************/																															//
+////Ver 0.1 New Analog Settings for 5CA EVT0 30FPS in Binning, including latest TnP for EVT1              //
+////20091310 - added analog settings for 430LSB, long exposure mode only. Settings are for 32MHz Sys. CLK //
+////20091102 - added all calibration data, final settings for STW EVT1 module, SCLK 32MHz, PCLK 60 MHz.   //
+////20091104 - Changed the shading alpha &Near off                                                        //
+////20091104 - Changed awbb_GridEnable from 0001h to 0002h	//awbb_GridEnable                             //
+////aetarget41-46, gamma change for improving contrast                                                    //
+////20100113 - New TnP updated//
+
+{ 0xFCFC, 0xD000  },	//Reset                                  //
+{ 0x0010, 0x0001  },   //Clear host interrupt so main will wait //
+{ 0x1030, 0x0000  },   //ARM go                                 //
+{ 0x0014, 0x0001  },   //Wait100mSec
+                  
+{ 0xdddd, 0x0064  }, //delay 100ms
+                  
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x2CF8  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0x4827  },
+{ 0x0F12, 0x21C0  },
+{ 0x0F12, 0x8041  },
+{ 0x0F12, 0x4825  },
+{ 0x0F12, 0x4A26  },
+{ 0x0F12, 0x3020  },
+{ 0x0F12, 0x8382  },
+{ 0x0F12, 0x1D12  },
+{ 0x0F12, 0x83C2  },
+{ 0x0F12, 0x4822  },
+{ 0x0F12, 0x3040  },
+{ 0x0F12, 0x8041  },
+{ 0x0F12, 0x4821  },
+{ 0x0F12, 0x4922  },
+{ 0x0F12, 0x3060  },
+{ 0x0F12, 0x8381  },
+{ 0x0F12, 0x1D09  },
+{ 0x0F12, 0x83C1  },
+{ 0x0F12, 0x4821  },
+{ 0x0F12, 0x491D  },
+{ 0x0F12, 0x8802  },
+{ 0x0F12, 0x3980  },
+{ 0x0F12, 0x804A  },
+{ 0x0F12, 0x8842  },
+{ 0x0F12, 0x808A  },
+{ 0x0F12, 0x8882  },
+{ 0x0F12, 0x80CA  },
+{ 0x0F12, 0x88C2  },
+{ 0x0F12, 0x810A  },
+{ 0x0F12, 0x8902  },
+{ 0x0F12, 0x491C  },
+{ 0x0F12, 0x80CA  },
+{ 0x0F12, 0x8942  },
+{ 0x0F12, 0x814A  },
+{ 0x0F12, 0x8982  },
+{ 0x0F12, 0x830A  },
+{ 0x0F12, 0x89C2  },
+{ 0x0F12, 0x834A  },
+{ 0x0F12, 0x8A00  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x8188  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x4819  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xFA0E  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x4819  },
+{ 0x0F12, 0x6341  },
+{ 0x0F12, 0x4919  },
+{ 0x0F12, 0x4819  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xFA07  },
+{ 0x0F12, 0x4816  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x3840  },
+{ 0x0F12, 0x62C1  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x3880  },
+{ 0x0F12, 0x63C1  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x6301  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x3040  },
+{ 0x0F12, 0x6181  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x4817  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9F7  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x4817  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9F3  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x4817  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9EF  },
+{ 0x0F12, 0xBC10  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0x1100  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x267C  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x2CE8  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x3274  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xF400  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0xF520  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2DF1  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x89A9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x2E43  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x0140  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2E7D  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xB4F7  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x2F07  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2F2B  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2FD1  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2FE5  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2FB9  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x013D  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x306B  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x5823  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x30B9  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xD789  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0xB570  },
+{ 0x0F12, 0x6804  },
+{ 0x0F12, 0x6845  },
+{ 0x0F12, 0x6881  },
+{ 0x0F12, 0x6840  },
+{ 0x0F12, 0x2900  },
+{ 0x0F12, 0x6880  },
+{ 0x0F12, 0xD007  },
+{ 0x0F12, 0x49C3  },
+{ 0x0F12, 0x8949  },
+{ 0x0F12, 0x084A  },
+{ 0x0F12, 0x1880  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9BA  },
+{ 0x0F12, 0x80A0  },
+{ 0x0F12, 0xE000  },
+{ 0x0F12, 0x80A0  },
+{ 0x0F12, 0x88A0  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD010  },
+{ 0x0F12, 0x68A9  },
+{ 0x0F12, 0x6828  },
+{ 0x0F12, 0x084A  },
+{ 0x0F12, 0x1880  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9AE  },
+{ 0x0F12, 0x8020  },
+{ 0x0F12, 0x1D2D  },
+{ 0x0F12, 0xCD03  },
+{ 0x0F12, 0x084A  },
+{ 0x0F12, 0x1880  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9A7  },
+{ 0x0F12, 0x8060  },
+{ 0x0F12, 0xBC70  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0x2000  },
+{ 0x0F12, 0x8060  },
+{ 0x0F12, 0x8020  },
+{ 0x0F12, 0xE7F8  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9A2  },
+{ 0x0F12, 0x48B2  },
+{ 0x0F12, 0x8A40  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD00C  },
+{ 0x0F12, 0x48B1  },
+{ 0x0F12, 0x49B2  },
+{ 0x0F12, 0x8800  },
+{ 0x0F12, 0x4AB2  },
+{ 0x0F12, 0x2805  },
+{ 0x0F12, 0xD003  },
+{ 0x0F12, 0x4BB1  },
+{ 0x0F12, 0x795B  },
+{ 0x0F12, 0x2B00  },
+{ 0x0F12, 0xD005  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0x8008  },
+{ 0x0F12, 0x8010  },
+{ 0x0F12, 0xBC10  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD1FA  },
+{ 0x0F12, 0x2000  },
+{ 0x0F12, 0x8008  },
+{ 0x0F12, 0x8010  },
+{ 0x0F12, 0xE7F6  },
+{ 0x0F12, 0xB5F8  },
+{ 0x0F12, 0x2407  },
+{ 0x0F12, 0x2C06  },
+{ 0x0F12, 0xD035  },
+{ 0x0F12, 0x2C07  },
+{ 0x0F12, 0xD033  },
+{ 0x0F12, 0x48A3  },
+{ 0x0F12, 0x8BC1  },
+{ 0x0F12, 0x2900  },
+{ 0x0F12, 0xD02A  },
+{ 0x0F12, 0x00A2  },
+{ 0x0F12, 0x1815  },
+{ 0x0F12, 0x4AA4  },
+{ 0x0F12, 0x6DEE  },
+{ 0x0F12, 0x8A92  },
+{ 0x0F12, 0x4296  },
+{ 0x0F12, 0xD923  },
+{ 0x0F12, 0x0028  },
+{ 0x0F12, 0x3080  },
+{ 0x0F12, 0x0007  },
+{ 0x0F12, 0x69C0  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF96B  },
+{ 0x0F12, 0x1C71  },
+{ 0x0F12, 0x0280  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF967  },
+{ 0x0F12, 0x0006  },
+{ 0x0F12, 0x4898  },
+{ 0x0F12, 0x0061  },
+{ 0x0F12, 0x1808  },
+{ 0x0F12, 0x8D80  },
+{ 0x0F12, 0x0A01  },
+{ 0x0F12, 0x0600  },
+{ 0x0F12, 0x0E00  },
+{ 0x0F12, 0x1A08  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF96A  },
+{ 0x0F12, 0x0002  },
+{ 0x0F12, 0x6DE9  },
+{ 0x0F12, 0x6FE8  },
+{ 0x0F12, 0x1A08  },
+{ 0x0F12, 0x4351  },
+{ 0x0F12, 0x0300  },
+{ 0x0F12, 0x1C49  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF953  },
+{ 0x0F12, 0x0401  },
+{ 0x0F12, 0x0430  },
+{ 0x0F12, 0x0C00  },
+{ 0x0F12, 0x4301  },
+{ 0x0F12, 0x61F9  },
+{ 0x0F12, 0xE004  },
+{ 0x0F12, 0x00A2  },
+{ 0x0F12, 0x4990  },
+{ 0x0F12, 0x1810  },
+{ 0x0F12, 0x3080  },
+{ 0x0F12, 0x61C1  },
+{ 0x0F12, 0x1E64  },
+{ 0x0F12, 0xD2C5  },
+{ 0x0F12, 0x2006  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF959  },
+{ 0x0F12, 0x2007  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF956  },
+{ 0x0F12, 0xBCF8  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF958  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD00A  },
+{ 0x0F12, 0x4881  },
+{ 0x0F12, 0x8B81  },
+{ 0x0F12, 0x0089  },
+{ 0x0F12, 0x1808  },
+{ 0x0F12, 0x6DC1  },
+{ 0x0F12, 0x4883  },
+{ 0x0F12, 0x8A80  },
+{ 0x0F12, 0x4281  },
+{ 0x0F12, 0xD901  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0xE7A1  },
+{ 0x0F12, 0x2000  },
+{ 0x0F12, 0xE79F  },
+{ 0x0F12, 0xB5F8  },
+{ 0x0F12, 0x0004  },
+{ 0x0F12, 0x4F80  },
+{ 0x0F12, 0x227D  },
+{ 0x0F12, 0x8938  },
+{ 0x0F12, 0x0152  },
+{ 0x0F12, 0x4342  },
+{ 0x0F12, 0x487E  },
+{ 0x0F12, 0x9000  },
+{ 0x0F12, 0x8A01  },
+{ 0x0F12, 0x0848  },
+{ 0x0F12, 0x1810  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91D  },
+{ 0x0F12, 0x210F  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF940  },
+{ 0x0F12, 0x497A  },
+{ 0x0F12, 0x8C49  },
+{ 0x0F12, 0x090E  },
+{ 0x0F12, 0x0136  },
+{ 0x0F12, 0x4306  },
+{ 0x0F12, 0x4979  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0xD003  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0x0240  },
+{ 0x0F12, 0x4330  },
+{ 0x0F12, 0x8108  },
+{ 0x0F12, 0x4876  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0x8D00  },
+{ 0x0F12, 0xD001  },
+{ 0x0F12, 0x2501  },
+{ 0x0F12, 0xE000  },
+{ 0x0F12, 0x2500  },
+{ 0x0F12, 0x4972  },
+{ 0x0F12, 0x4328  },
+{ 0x0F12, 0x8008  },
+{ 0x0F12, 0x207D  },
+{ 0x0F12, 0x00C0  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF92E  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0x496E  },
+{ 0x0F12, 0x0328  },
+{ 0x0F12, 0x4330  },
+{ 0x0F12, 0x8108  },
+{ 0x0F12, 0x88F8  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0x01AA  },
+{ 0x0F12, 0x4310  },
+{ 0x0F12, 0x8088  },
+{ 0x0F12, 0x9800  },
+{ 0x0F12, 0x8A01  },
+{ 0x0F12, 0x486A  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8F1  },
+{ 0x0F12, 0x496A  },
+{ 0x0F12, 0x8809  },
+{ 0x0F12, 0x4348  },
+{ 0x0F12, 0x0400  },
+{ 0x0F12, 0x0C00  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF918  },
+{ 0x0F12, 0x0020  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91D  },
+{ 0x0F12, 0x4866  },
+{ 0x0F12, 0x7004  },
+{ 0x0F12, 0xE7A3  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0x0004  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91E  },
+{ 0x0F12, 0x6020  },
+{ 0x0F12, 0x4963  },
+{ 0x0F12, 0x8B49  },
+{ 0x0F12, 0x0789  },
+{ 0x0F12, 0xD001  },
+{ 0x0F12, 0x0040  },
+{ 0x0F12, 0x6020  },
+{ 0x0F12, 0xE74C  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91B  },
+{ 0x0F12, 0x485F  },
+{ 0x0F12, 0x8880  },
+{ 0x0F12, 0x0601  },
+{ 0x0F12, 0x4854  },
+{ 0x0F12, 0x1609  },
+{ 0x0F12, 0x8141  },
+{ 0x0F12, 0xE742  },
+{ 0x0F12, 0xB5F8  },
+{ 0x0F12, 0x000F  },
+{ 0x0F12, 0x4C55  },
+{ 0x0F12, 0x3420  },
+{ 0x0F12, 0x2500  },
+{ 0x0F12, 0x5765  },
+{ 0x0F12, 0x0039  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF913  },
+{ 0x0F12, 0x9000  },
+{ 0x0F12, 0x2600  },
+{ 0x0F12, 0x57A6  },
+{ 0x0F12, 0x4C4C  },
+{ 0x0F12, 0x42AE  },
+{ 0x0F12, 0xD01B  },
+{ 0x0F12, 0x4D54  },
+{ 0x0F12, 0x8AE8  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD013  },
+{ 0x0F12, 0x484D  },
+{ 0x0F12, 0x8A01  },
+{ 0x0F12, 0x8B80  },
+{ 0x0F12, 0x4378  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8B5  },
+{ 0x0F12, 0x89A9  },
+{ 0x0F12, 0x1A41  },
+{ 0x0F12, 0x484E  },
+{ 0x0F12, 0x3820  },
+{ 0x0F12, 0x8AC0  },
+{ 0x0F12, 0x4348  },
+{ 0x0F12, 0x17C1  },
+{ 0x0F12, 0x0D89  },
+{ 0x0F12, 0x1808  },
+{ 0x0F12, 0x1280  },
+{ 0x0F12, 0x8961  },
+{ 0x0F12, 0x1A08  },
+{ 0x0F12, 0x8160  },
+{ 0x0F12, 0xE003  },
+{ 0x0F12, 0x88A8  },
+{ 0x0F12, 0x0600  },
+{ 0x0F12, 0x1600  },
+{ 0x0F12, 0x8160  },
+{ 0x0F12, 0x200A  },
+{ 0x0F12, 0x5E20  },
+{ 0x0F12, 0x42B0  },
+{ 0x0F12, 0xD011  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8AB  },
+{ 0x0F12, 0x1D40  },
+{ 0x0F12, 0x00C3  },
+{ 0x0F12, 0x1A18  },
+{ 0x0F12, 0x214B  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF897  },
+{ 0x0F12, 0x211F  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8BA  },
+{ 0x0F12, 0x210A  },
+{ 0x0F12, 0x5E61  },
+{ 0x0F12, 0x0FC9  },
+{ 0x0F12, 0x0149  },
+{ 0x0F12, 0x4301  },
+{ 0x0F12, 0x483D  },
+{ 0x0F12, 0x81C1  },
+{ 0x0F12, 0x9800  },
+{ 0x0F12, 0xE74A  },
+{ 0x0F12, 0xB5F1  },
+{ 0x0F12, 0xB082  },
+{ 0x0F12, 0x2500  },
+{ 0x0F12, 0x483A  },
+{ 0x0F12, 0x9001  },
+{ 0x0F12, 0x2400  },
+{ 0x0F12, 0x2028  },
+{ 0x0F12, 0x4368  },
+{ 0x0F12, 0x4A39  },
+{ 0x0F12, 0x4925  },
+{ 0x0F12, 0x1887  },
+{ 0x0F12, 0x1840  },
+{ 0x0F12, 0x9000  },
+{ 0x0F12, 0x9800  },
+{ 0x0F12, 0x0066  },
+{ 0x0F12, 0x9A01  },
+{ 0x0F12, 0x1980  },
+{ 0x0F12, 0x218C  },
+{ 0x0F12, 0x5A09  },
+{ 0x0F12, 0x8A80  },
+{ 0x0F12, 0x8812  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8CA  },
+{ 0x0F12, 0x53B8  },
+{ 0x0F12, 0x1C64  },
+{ 0x0F12, 0x2C14  },
+{ 0x0F12, 0xDBF1  },
+{ 0x0F12, 0x1C6D  },
+{ 0x0F12, 0x2D03  },
+{ 0x0F12, 0xDBE6  },
+{ 0x0F12, 0x9802  },
+{ 0x0F12, 0x6800  },
+{ 0x0F12, 0x0600  },
+{ 0x0F12, 0x0E00  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8C5  },
+{ 0x0F12, 0xBCFE  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0xB570  },
+{ 0x0F12, 0x6805  },
+{ 0x0F12, 0x2404  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8C5  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD103  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8C9  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2400  },
+{ 0x0F12, 0x3540  },
+{ 0x0F12, 0x88E8  },
+{ 0x0F12, 0x0500  },
+{ 0x0F12, 0xD403  },
+{ 0x0F12, 0x4822  },
+{ 0x0F12, 0x89C0  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD002  },
+{ 0x0F12, 0x2008  },
+{ 0x0F12, 0x4304  },
+{ 0x0F12, 0xE001  },
+{ 0x0F12, 0x2010  },
+{ 0x0F12, 0x4304  },
+{ 0x0F12, 0x481F  },
+{ 0x0F12, 0x8B80  },
+{ 0x0F12, 0x0700  },
+{ 0x0F12, 0x0F81  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0x2900  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x4304  },
+{ 0x0F12, 0x491C  },
+{ 0x0F12, 0x8B0A  },
+{ 0x0F12, 0x42A2  },
+{ 0x0F12, 0xD004  },
+{ 0x0F12, 0x0762  },
+{ 0x0F12, 0xD502  },
+{ 0x0F12, 0x4A19  },
+{ 0x0F12, 0x3220  },
+{ 0x0F12, 0x8110  },
+{ 0x0F12, 0x830C  },
+{ 0x0F12, 0xE691  },
+{ 0x0F12, 0x0C3C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x3274  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x26E8  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x6100  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x6500  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x1A7C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1120  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xFFFF  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x3374  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1D6C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x167C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xF400  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2C2C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x40A0  },
+{ 0x0F12, 0x00DD  },
+{ 0x0F12, 0xF520  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2C29  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1A54  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1564  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xF2A0  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2440  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x05A0  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2894  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1224  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xB000  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x1A3F  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xF004  },
+{ 0x0F12, 0xE51F  },
+{ 0x0F12, 0x1F48  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x24BD  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x36DD  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xB4CF  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xB5D7  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x36ED  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xF53F  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xF5D9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x013D  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xF5C9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xFAA9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x3723  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x5823  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xD771  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xD75B  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x8117  },
+{ 0x0F12, 0x0000  },
+
+// End TnP part
+
+//========================================================                      
+// CIs/APs/An setting        - 400LsB  sYsCLK 32MHz                             
+//========================================================                      
+// This regis are for FACTORY ONLY. If you change it without prior notification,
+// YOU are REsIBLE for the FAILURE that will happen in the future.              
+//========================================================                      
+
+
+{ 0x002A, 0x157A  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x1578  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x1576  },
+{ 0x0F12, 0x0020  },
+{ 0x002A, 0x1574  },
+{ 0x0F12, 0x0006  },
+{ 0x002A, 0x156E  },
+{ 0x0F12, 0x0001  },	// slope calibration tolerance in units of 1/256	
+{ 0x002A, 0x1568  },
+{ 0x0F12, 0x00FC  },
+                  
+// /ADC control    
+{ 0x002A, 0x155A  },
+{ 0x0F12, 0x01CC  },	//ADC sAT of 450mV for 10bit default in EVT1                         	
+{ 0x002A, 0x157E  },                                                                        
+{ 0x0F12, 0x0C80  },	// 3200 Max. Reset ramp DCLK counts (default 2048 0x800)             
+{ 0x0F12, 0x0578  },	// 1400 Max. Reset ramp DCLK counts for x3.5                         
+{ 0x002A, 0x157C  },                                                                        
+{ 0x0F12, 0x0190  },	// 400 Reset ramp for x1 in DCLK counts                              
+{ 0x002A, 0x1570  },                                                                        
+{ 0x0F12, 0x00A0  },	// 160 LsB                                                           
+{ 0x0F12, 0x0010  },	// reset threshold                                                   
+{ 0x002A, 0x12C4  },                                                                        
+{ 0x0F12, 0x006A  },	// 106 additional timing columns.                                    
+{ 0x002A, 0x12C8  },                                                                        
+{ 0x0F12, 0x08AC  },	// 2220 ADC columns in normal mode including Hold & Latch            
+{ 0x0F12, 0x0050  },	// 80 addition of ADC columns in Y-ave mode (default 244 0x74)
+                  
+{ 0x002A, 0x1696  },	// based on APs guidelines                        
+{ 0x0F12, 0x0000  },   // based on APs guidelines                        
+{ 0x0F12, 0x0000  },   // default. 1492 used for ADC dark characteristics
+{ 0x0F12, 0x00C6  },   // default. 1492 used for ADC dark characteristics
+{ 0x0F12, 0x00C6  },                                                  
+//{ 0x002A, 0x12B8  },   //disable CINTR 0                                 
+//{ 0x0F12, 0x0B00  },                                                     
+                                                                      
+{ 0x002A, 0x1690  },   // when set double sampling is activated - requires different set of pointers                                                 
+{ 0x0F12, 0x0001  },                                                     
+                                                                      
+{ 0x002A, 0x12B0  },   // comp and pixel bias control 0xF40E - default for EVT1                                                                      
+{ 0x0F12, 0x0055  },   // comp and pixel bias control 0xF40E for binning mode                                                                        
+{ 0x0F12, 0x005A  },                                                     
+                                                                      
+{ 0x002A, 0x337A  },   // [7] - is used for rest-only mode (EVT0 value is 0xD and HW 0x6)                                                            
+{ 0x0F12, 0x0006  },
+{ 0x0F12, 0x0068  },
+{ 0x002A, 0x169E  },
+{ 0x0F12, 0x0007  },
+{ 0x002A, 0x0BF6  },
+{ 0x0F12, 0x0000  },
+	                
+                    
+{ 0x002A, 0x327C  },
+{ 0x0F12, 0x1000  },
+{ 0x0F12, 0x6998  },
+{ 0x0F12, 0x0078  },
+{ 0x0F12, 0x04FE  },
+{ 0x0F12, 0x8800  },
+                    
+{ 0x002A, 0x3274  },
+{ 0x0F12, 0x0155  },	//set IO driving current 2mA for Gs500
+{ 0x0F12, 0x0155  },   //set IO driving current              
+{ 0x0F12, 0x1555  },   //set IO driving current              
+{ 0x0F12, 0x0555  },   //set IO driving current              
+                    
+                    
+{ 0x0028, 0x7000  },	
+{ 0x002A, 0x12D2  },	   
+{ 0x0F12, 0x0003  },	//senHal_pContSenModesRegsArray[0][0]2 700012D2     
+{ 0x0F12, 0x0003  },   //senHal_pContSenModesRegsArray[0][1]2 700012D4  
+{ 0x0F12, 0x0003  },   //senHal_pContSenModesRegsArray[0][2]2 700012D6  
+{ 0x0F12, 0x0003  },   //senHal_pContSenModesRegsArray[0][3]2 700012D8  
+{ 0x0F12, 0x0884  },   //senHal_pContSenModesRegsArray[1][0]2 700012DA  
+{ 0x0F12, 0x08CF  },   //senHal_pContSenModesRegsArray[1][1]2 700012DC  
+{ 0x0F12, 0x0500  },   //senHal_pContSenModesRegsArray[1][2]2 700012DE  
+{ 0x0F12, 0x054B  },   //senHal_pContSenModesRegsArray[1][3]2 700012E0  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][0]2 700012E2  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][1]2 700012E4  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][2]2 700012E6  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][3]2 700012E8  
+{ 0x0F12, 0x0885  },   //senHal_pContSenModesRegsArray[3][0]2 700012EA  
+{ 0x0F12, 0x0467  },   //senHal_pContSenModesRegsArray[3][1]2 700012EC  
+{ 0x0F12, 0x0501  },   //senHal_pContSenModesRegsArray[3][2]2 700012EE  
+{ 0x0F12, 0x02A5  },   //senHal_pContSenModesRegsArray[3][3]2 700012F0  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[4][0]2 700012F2  
+{ 0x0F12, 0x046A  },   //senHal_pContSenModesRegsArray[4][1]2 700012F4  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[4][2]2 700012F6  
+{ 0x0F12, 0x02A8  },   //senHal_pContSenModesRegsArray[4][3]2 700012F8  
+{ 0x0F12, 0x0885  },   //senHal_pContSenModesRegsArray[5][0]2 700012FA  
+{ 0x0F12, 0x08D0  },   //senHal_pContSenModesRegsArray[5][1]2 700012FC  
+{ 0x0F12, 0x0501  },   //senHal_pContSenModesRegsArray[5][2]2 700012FE  
+{ 0x0F12, 0x054C  },   //senHal_pContSenModesRegsArray[5][3]2 70001300  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[6][0]2 70001302  
+{ 0x0F12, 0x0020  },   //senHal_pContSenModesRegsArray[6][1]2 70001304  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[6][2]2 70001306  
+{ 0x0F12, 0x0020  },   //senHal_pContSenModesRegsArray[6][3]2 70001308  
+{ 0x0F12, 0x0881  },   //senHal_pContSenModesRegsArray[7][0]2 7000130A  
+{ 0x0F12, 0x0463  },   //senHal_pContSenModesRegsArray[7][1]2 7000130C  
+{ 0x0F12, 0x04FD  },   //senHal_pContSenModesRegsArray[7][2]2 7000130E  
+{ 0x0F12, 0x02A1  },   //senHal_pContSenModesRegsArray[7][3]2 70001310  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[8][0]2 70001312  
+{ 0x0F12, 0x0489  },   //senHal_pContSenModesRegsArray[8][1]2 70001314  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[8][2]2 70001316  
+{ 0x0F12, 0x02C7  },   //senHal_pContSenModesRegsArray[8][3]2 70001318  
+{ 0x0F12, 0x0881  },   //senHal_pContSenModesRegsArray[9][0]2 7000131A  
+{ 0x0F12, 0x08CC  },   //senHal_pContSenModesRegsArray[9][1]2 7000131C  
+{ 0x0F12, 0x04FD  },   //senHal_pContSenModesRegsArray[9][2]2 7000131E  
+{ 0x0F12, 0x0548  },   //senHal_pContSenModesRegsArray[9][3]2 70001320  
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[10][0] 2 70001322
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[10][1] 2 70001324
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[10][2] 2 70001326
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[10][3] 2 70001328
+{ 0x0F12, 0x03F2  },   //senHal_pContSenModesRegsArray[11][0] 2 7000132A
+{ 0x0F12, 0x0223  },   //senHal_pContSenModesRegsArray[11][1] 2 7000132C
+{ 0x0F12, 0x0230  },   //senHal_pContSenModesRegsArray[11][2] 2 7000132E
+{ 0x0F12, 0x0142  },   //senHal_pContSenModesRegsArray[11][3] 2 70001330
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[12][0] 2 70001332
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[12][1] 2 70001334
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[12][2] 2 70001336
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[12][3] 2 70001338
+{ 0x0F12, 0x03F2  },   //senHal_pContSenModesRegsArray[13][0] 2 7000133A
+{ 0x0F12, 0x068C  },   //senHal_pContSenModesRegsArray[13][1] 2 7000133C
+{ 0x0F12, 0x0230  },   //senHal_pContSenModesRegsArray[13][2] 2 7000133E
+{ 0x0F12, 0x03E9  },   //senHal_pContSenModesRegsArray[13][3] 2 70001340
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][0] 2 70001342
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][1] 2 70001344
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][2] 2 70001346
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][3] 2 70001348
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][0] 2 7000134A
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][1] 2 7000134C
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][2] 2 7000134E
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][3] 2 70001350
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[16][0] 2 70001352
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[16][1] 2 70001354
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[16][2] 2 70001356
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[16][3] 2 70001358
+{ 0x0F12, 0x020B  },   //senHal_pContSenModesRegsArray[17][0] 2 7000135A
+{ 0x0F12, 0x024A  },   //senHal_pContSenModesRegsArray[17][1] 2 7000135C
+{ 0x0F12, 0x012A  },   //senHal_pContSenModesRegsArray[17][2] 2 7000135E
+{ 0x0F12, 0x0169  },   //senHal_pContSenModesRegsArray[17][3] 2 70001360
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[18][0] 2 70001362
+{ 0x0F12, 0x046B  },   //senHal_pContSenModesRegsArray[18][1] 2 70001364
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[18][2] 2 70001366
+{ 0x0F12, 0x02A9  },   //senHal_pContSenModesRegsArray[18][3] 2 70001368
+{ 0x0F12, 0x0419  },   //senHal_pContSenModesRegsArray[19][0] 2 7000136A
+{ 0x0F12, 0x04A5  },   //senHal_pContSenModesRegsArray[19][1] 2 7000136C
+{ 0x0F12, 0x0257  },   //senHal_pContSenModesRegsArray[19][2] 2 7000136E
+{ 0x0F12, 0x02E3  },   //senHal_pContSenModesRegsArray[19][3] 2 70001370
+{ 0x0F12, 0x0630  },   //senHal_pContSenModesRegsArray[20][0] 2 70001372
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[20][1] 2 70001374
+{ 0x0F12, 0x038D  },   //senHal_pContSenModesRegsArray[20][2] 2 70001376
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[20][3] 2 70001378
+{ 0x0F12, 0x0668  },   //senHal_pContSenModesRegsArray[21][0] 2 7000137A
+{ 0x0F12, 0x06B3  },   //senHal_pContSenModesRegsArray[21][1] 2 7000137C
+{ 0x0F12, 0x03C5  },   //senHal_pContSenModesRegsArray[21][2] 2 7000137E
+{ 0x0F12, 0x0410  },   //senHal_pContSenModesRegsArray[21][3] 2 70001380
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][0] 2 70001382
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][1] 2 70001384
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][2] 2 70001386
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][3] 2 70001388
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[23][0] 2 7000138A
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[23][1] 2 7000138C
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[23][2] 2 7000138E
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[23][3] 2 70001390
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[24][0] 2 70001392
+{ 0x0F12, 0x0461  },   //senHal_pContSenModesRegsArray[24][1] 2 70001394
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[24][2] 2 70001396
+{ 0x0F12, 0x029F  },   //senHal_pContSenModesRegsArray[24][3] 2 70001398
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[25][0] 2 7000139A
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[25][1] 2 7000139C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[25][2] 2 7000139E
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[25][3] 2 700013A0
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][0] 2 700013A2
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][1] 2 700013A4
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][2] 2 700013A6
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][3] 2 700013A8
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[27][0] 2 700013AA
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[27][1] 2 700013AC
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[27][2] 2 700013AE
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[27][3] 2 700013B0
+{ 0x0F12, 0x020C  },   //senHal_pContSenModesRegsArray[28][0] 2 700013B2
+{ 0x0F12, 0x024B  },   //senHal_pContSenModesRegsArray[28][1] 2 700013B4
+{ 0x0F12, 0x012B  },   //senHal_pContSenModesRegsArray[28][2] 2 700013B6
+{ 0x0F12, 0x016A  },   //senHal_pContSenModesRegsArray[28][3] 2 700013B8
+{ 0x0F12, 0x039F  },   //senHal_pContSenModesRegsArray[29][0] 2 700013BA
+{ 0x0F12, 0x045E  },   //senHal_pContSenModesRegsArray[29][1] 2 700013BC
+{ 0x0F12, 0x01DD  },   //senHal_pContSenModesRegsArray[29][2] 2 700013BE
+{ 0x0F12, 0x029C  },   //senHal_pContSenModesRegsArray[29][3] 2 700013C0
+{ 0x0F12, 0x041A  },   //senHal_pContSenModesRegsArray[30][0] 2 700013C2
+{ 0x0F12, 0x04A6  },   //senHal_pContSenModesRegsArray[30][1] 2 700013C4
+{ 0x0F12, 0x0258  },   //senHal_pContSenModesRegsArray[30][2] 2 700013C6
+{ 0x0F12, 0x02E4  },   //senHal_pContSenModesRegsArray[30][3] 2 700013C8
+{ 0x0F12, 0x062D  },   //senHal_pContSenModesRegsArray[31][0] 2 700013CA
+{ 0x0F12, 0x0639  },   //senHal_pContSenModesRegsArray[31][1] 2 700013CC
+{ 0x0F12, 0x038A  },   //senHal_pContSenModesRegsArray[31][2] 2 700013CE
+{ 0x0F12, 0x0396  },   //senHal_pContSenModesRegsArray[31][3] 2 700013D0
+{ 0x0F12, 0x0669  },   //senHal_pContSenModesRegsArray[32][0] 2 700013D2
+{ 0x0F12, 0x06B4  },   //senHal_pContSenModesRegsArray[32][1] 2 700013D4
+{ 0x0F12, 0x03C6  },   //senHal_pContSenModesRegsArray[32][2] 2 700013D6
+{ 0x0F12, 0x0411  },   //senHal_pContSenModesRegsArray[32][3] 2 700013D8
+{ 0x0F12, 0x087C  },   //senHal_pContSenModesRegsArray[33][0] 2 700013DA
+{ 0x0F12, 0x08C7  },   //senHal_pContSenModesRegsArray[33][1] 2 700013DC
+{ 0x0F12, 0x04F8  },   //senHal_pContSenModesRegsArray[33][2] 2 700013DE
+{ 0x0F12, 0x0543  },   //senHal_pContSenModesRegsArray[33][3] 2 700013E0
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][0] 2 700013E2
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][1] 2 700013E4
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][2] 2 700013E6
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][3] 2 700013E8
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[35][0] 2 700013EA
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[35][1] 2 700013EC
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[35][2] 2 700013EE
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[35][3] 2 700013F0
+{ 0x0F12, 0x020F  },   //senHal_pContSenModesRegsArray[36][0] 2 700013F2
+{ 0x0F12, 0x024E  },   //senHal_pContSenModesRegsArray[36][1] 2 700013F4
+{ 0x0F12, 0x012E  },   //senHal_pContSenModesRegsArray[36][2] 2 700013F6
+{ 0x0F12, 0x016D  },   //senHal_pContSenModesRegsArray[36][3] 2 700013F8
+{ 0x0F12, 0x039F  },   //senHal_pContSenModesRegsArray[37][0] 2 700013FA
+{ 0x0F12, 0x045E  },   //senHal_pContSenModesRegsArray[37][1] 2 700013FC
+{ 0x0F12, 0x01DD  },   //senHal_pContSenModesRegsArray[37][2] 2 700013FE
+{ 0x0F12, 0x029C  },   //senHal_pContSenModesRegsArray[37][3] 2 70001400
+{ 0x0F12, 0x041D  },   //senHal_pContSenModesRegsArray[38][0] 2 70001402
+{ 0x0F12, 0x04A9  },   //senHal_pContSenModesRegsArray[38][1] 2 70001404
+{ 0x0F12, 0x025B  },   //senHal_pContSenModesRegsArray[38][2] 2 70001406
+{ 0x0F12, 0x02E7  },   //senHal_pContSenModesRegsArray[38][3] 2 70001408
+{ 0x0F12, 0x062D  },   //senHal_pContSenModesRegsArray[39][0] 2 7000140A
+{ 0x0F12, 0x0639  },   //senHal_pContSenModesRegsArray[39][1] 2 7000140C
+{ 0x0F12, 0x038A  },   //senHal_pContSenModesRegsArray[39][2] 2 7000140E
+{ 0x0F12, 0x0396  },   //senHal_pContSenModesRegsArray[39][3] 2 70001410
+{ 0x0F12, 0x066C  },   //senHal_pContSenModesRegsArray[40][0] 2 70001412
+{ 0x0F12, 0x06B7  },   //senHal_pContSenModesRegsArray[40][1] 2 70001414
+{ 0x0F12, 0x03C9  },   //senHal_pContSenModesRegsArray[40][2] 2 70001416
+{ 0x0F12, 0x0414  },   //senHal_pContSenModesRegsArray[40][3] 2 70001418
+{ 0x0F12, 0x087C  },   //senHal_pContSenModesRegsArray[41][0] 2 7000141A
+{ 0x0F12, 0x08C7  },   //senHal_pContSenModesRegsArray[41][1] 2 7000141C
+{ 0x0F12, 0x04F8  },   //senHal_pContSenModesRegsArray[41][2] 2 7000141E
+{ 0x0F12, 0x0543  },   //senHal_pContSenModesRegsArray[41][3] 2 70001420
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][0] 2 70001422
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][1] 2 70001424
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][2] 2 70001426
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][3] 2 70001428
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[43][0] 2 7000142A
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[43][1] 2 7000142C
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[43][2] 2 7000142E
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[43][3] 2 70001430
+{ 0x0F12, 0x020F  },   //senHal_pContSenModesRegsArray[44][0] 2 70001432
+{ 0x0F12, 0x024E  },   //senHal_pContSenModesRegsArray[44][1] 2 70001434
+{ 0x0F12, 0x012E  },   //senHal_pContSenModesRegsArray[44][2] 2 70001436
+{ 0x0F12, 0x016D  },   //senHal_pContSenModesRegsArray[44][3] 2 70001438
+{ 0x0F12, 0x039F  },   //senHal_pContSenModesRegsArray[45][0] 2 7000143A
+{ 0x0F12, 0x045E  },   //senHal_pContSenModesRegsArray[45][1] 2 7000143C
+{ 0x0F12, 0x01DD  },   //senHal_pContSenModesRegsArray[45][2] 2 7000143E
+{ 0x0F12, 0x029C  },   //senHal_pContSenModesRegsArray[45][3] 2 70001440
+{ 0x0F12, 0x041D  },   //senHal_pContSenModesRegsArray[46][0] 2 70001442
+{ 0x0F12, 0x04A9  },   //senHal_pContSenModesRegsArray[46][1] 2 70001444
+{ 0x0F12, 0x025B  },   //senHal_pContSenModesRegsArray[46][2] 2 70001446
+{ 0x0F12, 0x02E7  },   //senHal_pContSenModesRegsArray[46][3] 2 70001448
+{ 0x0F12, 0x062D  },   //senHal_pContSenModesRegsArray[47][0] 2 7000144A
+{ 0x0F12, 0x0639  },   //senHal_pContSenModesRegsArray[47][1] 2 7000144C
+{ 0x0F12, 0x038A  },   //senHal_pContSenModesRegsArray[47][2] 2 7000144E
+{ 0x0F12, 0x0396  },   //senHal_pContSenModesRegsArray[47][3] 2 70001450
+{ 0x0F12, 0x066C  },   //senHal_pContSenModesRegsArray[48][0] 2 70001452
+{ 0x0F12, 0x06B7  },   //senHal_pContSenModesRegsArray[48][1] 2 70001454
+{ 0x0F12, 0x03C9  },   //senHal_pContSenModesRegsArray[48][2] 2 70001456
+{ 0x0F12, 0x0414  },   //senHal_pContSenModesRegsArray[48][3] 2 70001458
+{ 0x0F12, 0x087C  },   //senHal_pContSenModesRegsArray[49][0] 2 7000145A
+{ 0x0F12, 0x08C7  },   //senHal_pContSenModesRegsArray[49][1] 2 7000145C
+{ 0x0F12, 0x04F8  },   //senHal_pContSenModesRegsArray[49][2] 2 7000145E
+{ 0x0F12, 0x0543  },   //senHal_pContSenModesRegsArray[49][3] 2 70001460
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][0] 2 70001462
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][1] 2 70001464
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][2] 2 70001466
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][3] 2 70001468
+{ 0x0F12, 0x01D2  },   //senHal_pContSenModesRegsArray[51][0] 2 7000146A
+{ 0x0F12, 0x01D2  },   //senHal_pContSenModesRegsArray[51][1] 2 7000146C
+{ 0x0F12, 0x00F1  },   //senHal_pContSenModesRegsArray[51][2] 2 7000146E
+{ 0x0F12, 0x00F1  },   //senHal_pContSenModesRegsArray[51][3] 2 70001470
+{ 0x0F12, 0x020C  },   //senHal_pContSenModesRegsArray[52][0] 2 70001472
+{ 0x0F12, 0x024B  },   //senHal_pContSenModesRegsArray[52][1] 2 70001474
+{ 0x0F12, 0x012B  },   //senHal_pContSenModesRegsArray[52][2] 2 70001476
+{ 0x0F12, 0x016A  },   //senHal_pContSenModesRegsArray[52][3] 2 70001478
+{ 0x0F12, 0x03A1  },   //senHal_pContSenModesRegsArray[53][0] 2 7000147A
+{ 0x0F12, 0x0460  },   //senHal_pContSenModesRegsArray[53][1] 2 7000147C
+{ 0x0F12, 0x01DF  },   //senHal_pContSenModesRegsArray[53][2] 2 7000147E
+{ 0x0F12, 0x029E  },   //senHal_pContSenModesRegsArray[53][3] 2 70001480
+{ 0x0F12, 0x041A  },   //senHal_pContSenModesRegsArray[54][0] 2 70001482
+{ 0x0F12, 0x04A6  },   //senHal_pContSenModesRegsArray[54][1] 2 70001484
+{ 0x0F12, 0x0258  },   //senHal_pContSenModesRegsArray[54][2] 2 70001486
+{ 0x0F12, 0x02E4  },   //senHal_pContSenModesRegsArray[54][3] 2 70001488
+{ 0x0F12, 0x062F  },   //senHal_pContSenModesRegsArray[55][0] 2 7000148A
+{ 0x0F12, 0x063B  },   //senHal_pContSenModesRegsArray[55][1] 2 7000148C
+{ 0x0F12, 0x038C  },   //senHal_pContSenModesRegsArray[55][2] 2 7000148E
+{ 0x0F12, 0x0398  },   //senHal_pContSenModesRegsArray[55][3] 2 70001490
+{ 0x0F12, 0x0669  },   //senHal_pContSenModesRegsArray[56][0] 2 70001492
+{ 0x0F12, 0x06B4  },   //senHal_pContSenModesRegsArray[56][1] 2 70001494
+{ 0x0F12, 0x03C6  },   //senHal_pContSenModesRegsArray[56][2] 2 70001496
+{ 0x0F12, 0x0411  },   //senHal_pContSenModesRegsArray[56][3] 2 70001498
+{ 0x0F12, 0x087E  },   //senHal_pContSenModesRegsArray[57][0] 2 7000149A
+{ 0x0F12, 0x08C9  },   //senHal_pContSenModesRegsArray[57][1] 2 7000149C
+{ 0x0F12, 0x04FA  },   //senHal_pContSenModesRegsArray[57][2] 2 7000149E
+{ 0x0F12, 0x0545  },   //senHal_pContSenModesRegsArray[57][3] 2 700014A0
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[58][0] 2 700014A2
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[58][1] 2 700014A4
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[58][2] 2 700014A6
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[58][3] 2 700014A8
+{ 0x0F12, 0x03AF  },   //senHal_pContSenModesRegsArray[59][0] 2 700014AA
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[59][1] 2 700014AC
+{ 0x0F12, 0x01ED  },   //senHal_pContSenModesRegsArray[59][2] 2 700014AE
+{ 0x0F12, 0x00FF  },   //senHal_pContSenModesRegsArray[59][3] 2 700014B0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[60][0] 2 700014B2
+{ 0x0F12, 0x0461  },   //senHal_pContSenModesRegsArray[60][1] 2 700014B4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[60][2] 2 700014B6
+{ 0x0F12, 0x029F  },   //senHal_pContSenModesRegsArray[60][3] 2 700014B8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[61][0] 2 700014BA
+{ 0x0F12, 0x046E  },   //senHal_pContSenModesRegsArray[61][1] 2 700014BC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[61][2] 2 700014BE
+{ 0x0F12, 0x02AC  },   //senHal_pContSenModesRegsArray[61][3] 2 700014C0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[62][0] 2 700014C2
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[62][1] 2 700014C4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[62][2] 2 700014C6
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[62][3] 2 700014C8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[63][0] 2 700014CA
+{ 0x0F12, 0x0649  },   //senHal_pContSenModesRegsArray[63][1] 2 700014CC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[63][2] 2 700014CE
+{ 0x0F12, 0x03A6  },   //senHal_pContSenModesRegsArray[63][3] 2 700014D0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][0] 2 700014D2
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][1] 2 700014D4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][2] 2 700014D6
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][3] 2 700014D8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][0] 2 700014DA
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][1] 2 700014DC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][2] 2 700014DE
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][3] 2 700014E0
+{ 0x0F12, 0x03AA  },   //senHal_pContSenModesRegsArray[66][0] 2 700014E2
+{ 0x0F12, 0x01DB  },   //senHal_pContSenModesRegsArray[66][1] 2 700014E4
+{ 0x0F12, 0x01E8  },   //senHal_pContSenModesRegsArray[66][2] 2 700014E6
+{ 0x0F12, 0x00FA  },   //senHal_pContSenModesRegsArray[66][3] 2 700014E8
+{ 0x0F12, 0x03B7  },   //senHal_pContSenModesRegsArray[67][0] 2 700014EA
+{ 0x0F12, 0x01E8  },   //senHal_pContSenModesRegsArray[67][1] 2 700014EC
+{ 0x0F12, 0x01F5  },   //senHal_pContSenModesRegsArray[67][2] 2 700014EE
+{ 0x0F12, 0x0107  },   //senHal_pContSenModesRegsArray[67][3] 2 700014F0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[68][0] 2 700014F2
+{ 0x0F12, 0x0469  },   //senHal_pContSenModesRegsArray[68][1] 2 700014F4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[68][2] 2 700014F6
+{ 0x0F12, 0x02A7  },   //senHal_pContSenModesRegsArray[68][3] 2 700014F8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[69][0] 2 700014FA
+{ 0x0F12, 0x0476  },   //senHal_pContSenModesRegsArray[69][1] 2 700014FC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[69][2] 2 700014FE
+{ 0x0F12, 0x02B4  },   //senHal_pContSenModesRegsArray[69][3] 2 70001500
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[70][0] 2 70001502
+{ 0x0F12, 0x0644  },   //senHal_pContSenModesRegsArray[70][1] 2 70001504
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[70][2] 2 70001506
+{ 0x0F12, 0x03A1  },   //senHal_pContSenModesRegsArray[70][3] 2 70001508
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[71][0] 2 7000150A
+{ 0x0F12, 0x0651  },   //senHal_pContSenModesRegsArray[71][1] 2 7000150C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[71][2] 2 7000150E
+{ 0x0F12, 0x03AE  },   //senHal_pContSenModesRegsArray[71][3] 2 70001510
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][0] 2 70001512
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][1] 2 70001514
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][2] 2 70001516
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][3] 2 70001518
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][0] 2 7000151A
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][1] 2 7000151C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][2] 2 7000151E
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][3] 2 70001520
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][0] 2 70001522
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][1] 2 70001524
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][2] 2 70001526
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][3] 2 70001528
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][0] 2 7000152A
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][1] 2 7000152C
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][2] 2 7000152E
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][3] 2 70001530
+{ 0x0F12, 0x05AD  },   //senHal_pContSenModesRegsArray[76][0] 2 70001532
+{ 0x0F12, 0x03DE  },   //senHal_pContSenModesRegsArray[76][1] 2 70001534
+{ 0x0F12, 0x030A  },   //senHal_pContSenModesRegsArray[76][2] 2 70001536
+{ 0x0F12, 0x021C  },   //senHal_pContSenModesRegsArray[76][3] 2 70001538
+{ 0x0F12, 0x062F  },   //senHal_pContSenModesRegsArray[77][0] 2 7000153A
+{ 0x0F12, 0x0460  },   //senHal_pContSenModesRegsArray[77][1] 2 7000153C
+{ 0x0F12, 0x038C  },   //senHal_pContSenModesRegsArray[77][2] 2 7000153E
+{ 0x0F12, 0x029E  },   //senHal_pContSenModesRegsArray[77][3] 2 70001540
+{ 0x0F12, 0x07FC  },   //senHal_pContSenModesRegsArray[78][0] 2 70001542
+{ 0x0F12, 0x0847  },   //senHal_pContSenModesRegsArray[78][1] 2 70001544
+{ 0x0F12, 0x0478  },   //senHal_pContSenModesRegsArray[78][2] 2 70001546
+{ 0x0F12, 0x04C3  },   //senHal_pContSenModesRegsArray[78][3] 2 70001548
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][0] 2 7000154A
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][1] 2 7000154C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][2] 2 7000154E
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][3] 2 70001550
+                      
+                    
+//============================================================ 
+// AF Interface setting
+//==============  ============================================== 
+{ 0x002A, 0x01D4  },
+{ 0x0F12, 0x0000  }, //REG_TC_IPRM_AuxGpios : 0 - no Flash
+{ 0x002A, 0x01DE  },
+{ 0x0F12, 0x0003  }, //REG_TC_IPRM_CM_Init_AfModeType : 3 - AFD_VCM_I2C
+{ 0x0F12, 0x0000  }, //REG_TC_IPRM_CM_Init_PwmConfig1 : 0 - no PWM
+{ 0x002A, 0x01E4  },
+{ 0x0F12, 0x0041  }, //REG_TC_IPRM_CM_Init_GpioConfig1 : 4 -  GPIO4 
+{ 0x002A, 0x01E8  },
+{ 0x0F12, 0x2A0C  }, //REG_TC_IPRM_CM_Init_Mi2cBits : MSCL - GPIO1 MSDA - GPIO2 Device ID (0C)
+{ 0x0F12, 0x0190  }, //REG_TC_IPRM_CM_Init_Mi2cRateKhz : MI2C Speed - 400KHz
+
+//============================================================ 
+// AF Parameter setting
+//============================================================ 
+// AF Window Settings
+{ 0x002A, 0x025A  },
+{ 0x0F12, 0x0100  }, //#REG_TC_AF_FstWinStartX
+{ 0x0F12, 0x00E3  }, //#REG_TC_AF_FstWinStartY
+{ 0x0F12, 0x0200  }, //#REG_TC_AF_FstWinSizeX
+{ 0x0F12, 0x0238  }, //#REG_TC_AF_FstWinSizeY
+{ 0x0F12, 0x01C6  }, //#REG_TC_AF_ScndWinStartX
+{ 0x0F12, 0x0166  }, //#REG_TC_AF_ScndWinStartY
+{ 0x0F12, 0x0074  }, //#REG_TC_AF_ScndWinSizeX
+{ 0x0F12, 0x0132  }, //#REG_TC_AF_ScndWinSizeY
+{ 0x0F12, 0x0001  }, //#REG_TC_AF_WinSizesUpdated
+
+// AF Setot Settings 
+{ 0x002A, 0x0586  },
+{ 0x0F12, 0x00FF  }, //#skl_af_StatOvlpExpFactor
+
+// AF Scene Settings 
+{ 0x002A, 0x115E  },
+{ 0x0F12, 0x0003  }, //#af_scene_usSaturatedScene
+
+// AF Fine Search Settings 
+{ 0x002A, 0x10D4  },
+{ 0x0F12, 0x1002  }, //FineSearch Disable //af_search_usSingleAfFlags 1000 : 2nd searh off, 1002 : 2nd search on
+{ 0x002A, 0x10DE  },
+{ 0x0F12, 0x0004  }, //#af_search_usFinePeakCount
+{ 0x002A, 0x106C  },
+{ 0x0F12, 0x0802  }, //#af_pos_usFineStepNumSize
+                  
+// / AF Peak Thre  shold Setting
+{ 0x002A, 0x10CA  }, //#af_search_usPeakThr
+{ 0x0F12, 0x00CC  }, 
+
+// AF Default Position 
+{ 0x002A, 0x1060  },
+{ 0x0F12, 0x0000  }, //#af_pos_usHomePos
+{ 0x0F12, 0xB020  }, //#af_pos_usLowConfPos
+
+// AF LowConfThr Setting
+{ 0x002A, 0x10F4  }, //LowEdgeBoth GRAD
+{ 0x0F12, 0x0280  }, 
+{ 0x002A, 0x1100  }, //LowLight HPF
+{ 0x0F12, 0x03A0  },  
+{ 0x0F12, 0x0320  }, 
+
+{ 0x002A, 0x1134  },
+{ 0x0F12, 0x0030  },//af_stat_usMinStatVal
+
+// AF low Br Th
+{ 0x002A, 0x1154  }, // normBrThr
+{ 0x0F12, 0x0060  },
+
+// AF Policy
+{ 0x002A, 0x10E2  },
+{ 0x0F12, 0x0000  }, //#af_search_usCapturePolicy: Focus_Priority, 0002 : Shutter_Priority_Fixed, 0001 : Shutter_Priority_Last_BFP 0000: Shutter_Priority_Current
+{ 0x002A, 0x1072  },
+{ 0x0F12, 0x003C  }, //#af_pos_usCaptureFixedPo// 0x0008
+
+// AF Lens Position Table Settings 
+{ 0x002A, 0x1074  },
+{ 0x0F12, 0x0010  }, //#af_pos_usTableLastInd // 0~16 17 Steps 100729
+
+{ 0x0F12, 0x0024  }, //#af_pos_usTable_0_  145/4 = 36  // af_pos_usTable
+{ 0x0F12, 0x002D  }, //#af_pos_usTable_1_  180/4 = 45                   
+{ 0x0F12, 0x0036  }, //#af_pos_usTable_2_  215/4 = 54                   
+{ 0x0F12, 0x003E  }, //#af_pos_usTable_3_  250/4 = 62                   
+{ 0x0F12, 0x0047  }, //#af_pos_usTable_4_  285/4 = 71
+{ 0x0F12, 0x0050  }, //#af_pos_usTable_5_  320/4 = 80                   
+{ 0x0F12, 0x0059  }, //#af_pos_usTable_6_  355/4 = 89                   
+{ 0x0F12, 0x0061  }, //#af_pos_usTable_7_  390/4 = 97                   
+{ 0x0F12, 0x006A  }, //#af_pos_usTable_8_  425/4 = 106                  
+{ 0x0F12, 0x0073  }, //#af_pos_usTable_9_  460/4 = 115                  
+{ 0x0F12, 0x007C  }, //#af_pos_usTable_10_ 495/4 = 124                  
+{ 0x0F12, 0x0084  }, //#af_pos_usTable_11_ 530/4 = 132                  
+{ 0x0F12, 0x008D  }, //#af_pos_usTable_12_ 565/4 = 141                  
+{ 0x0F12, 0x0096  }, //#af_pos_usTable_13_ 600/4 = 150                  
+{ 0x0F12, 0x009F  }, //#af_pos_usTable_14_ 635/4 = 159                  
+{ 0x0F12, 0x00A7  }, //#af_pos_usTable_15_ 670/4 = 167                  
+{ 0x0F12, 0x00B0  }, //#af_pos_usTable_16_ 705/4 = 176                  
+
+//VCM AF driver with PWM/I2C 
+{ 0x002A, 0x1198  },
+{ 0x0F12, 0x8000  }, //#afd_usParam[0]  I2C power down command
+{ 0x0F12, 0x0006  }, //#afd_usParam[1]  Position Right Shift 
+{ 0x0F12, 0x3FF0  }, //#afd_usParam[2]  I2C Data Mask
+{ 0x0F12, 0x03E8  }, //#afd_usParam[3]  PWM Period
+{ 0x0F12, 0x0000  }, //#afd_usParam[4]  PWM Divider
+{ 0x0F12, 0x0064  }, //#afd_usParam[5]  SlowMotion Delay (unit: 0.1ms)  4. reduce lens collision noise.
+{ 0x0F12, 0x0009  }, //#afd_usParam[6]  SlowMotion Threshold
+{ 0x0F12, 0x000A  }, //#afd_usParam[7]  Signal Shaping
+{ 0x0F12, 0x0080  }, //#afd_usParam[8]  Signal Shaping level 
+{ 0x0F12, 0x00C0  }, //#afd_usParam[9]  Signal Shaping level
+{ 0x0F12, 0x0000  }, //#afd_usParam[10] Signal Shaping level
+{ 0x0F12, 0x0000  }, //#afd_usParam[11] Signal Shaping level               
+
+
+{ 0x002A, 0x0252  },
+{ 0x0F12, 0x0003  }, //init 
+                  
+{ 0x002A, 0x12B8  },   //disable CINTR 0                                 
+{ 0x0F12, 0x1000  },        
+
+//============================================================
+// ISP-FE Setting
+//============================================================                    
+{ 0x002A, 0x158A  },   
+{ 0x0F12, 0xEAF0  },   
+{ 0x002A, 0x15C6  },   
+{ 0x0F12, 0x0020  },   
+{ 0x0F12, 0x0060  },   
+{ 0x002A, 0x15BC  },   
+{ 0x0F12, 0x0200  },   
+                       
+{ 0x002A, 0x1608  },   
+{ 0x0F12, 0x0100  },   
+{ 0x0F12, 0x0100  },   
+{ 0x0F12, 0x0100  },   
+{ 0x0F12, 0x0100  },   
+                       
+{ 0x002A, 0x0F70  },   
+{ 0x0F12, 0x0040  },	 //36 //TVAR_ae_BrAve  //ae Target//
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0x3415  },   //3A98 //3A98////lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0x682A  },   //68b0 //7EF4////lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0x8235  },   //8340 //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },    //F424//MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0x3415  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0x682A  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0x8235  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+// /Shutter tunpo  int//        //gain * 256 = value//
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x01B3  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x02A0  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710  },   //MaxAnGain4 //                                             
+// /Shutter tunen  d//
+                  
+{ 0x002A, 0x0544  },                                                               
+{ 0x0F12, 0x0100  },   	                                                    
+{ 0x0F12, 0x8000  },   //Max Gain 8 //                                             
+                  
+                  
+{ 0x002A, 0x1694  },                                                               
+{ 0x0F12, 0x0001  },   //expand forbidde zone //                                   
+                  
+{ 0x002A, 0x021A  },                                                               
+{ 0x0F12, 0x0000  },  //MBR off// 	                                                    
+                  
+                  
+//==============================================//
+//AFC                                          //
+//==============================================//
+{ 0x002A, 0x04d2  },
+{ 0x0F12, 0x065f  },     //065f : Manual AFC on   067f : Manual AFC off //
+{ 0x002A, 0x04ba  },     
+{ 0x0F12, 0x0002  },     // 0002: 60hz  0001 : 50hz //
+{ 0x0F12, 0x0001  },     // afc update command //
+                          
+                    
+                    
+{ 0x002A, 0x06CE  },   
+{ 0x0F12, 0x0100  },	//TVAR_ash_GAsalpha[0] // 	   
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[1] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[2] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[3] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[4] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[5] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[6] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[7] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[8] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[9] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[10] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[11] //
+{ 0x0F12, 0x00e0  },   //TVAR_ash_GAsalpha[12] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[13] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[14] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[15] //
+{ 0x0F12, 0x00e8  },   //TVAR_ash_GAsalpha[16] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[17] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[18] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[19] //
+{ 0x0F12, 0x00f0  },   //TVAR_ash_GAsalpha[20] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[21] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[22] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[23] //
+{ 0x0F12, 0x00f0  },   //TVAR_ash_GAsalpha[24] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[25] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[26] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[27] //
+                       
+{ 0x0F12, 0x00f8  },	//TVAR_ash_GAS OutdoorAlpha[0] //   
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAS OutdoorAlpha[1] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAS OutdoorAlpha[2] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAS OutdoorAlpha[3] //
+                       
+                       
+{ 0x0F12, 0x0036  },	//ash_GASBeta[0] // 	   
+{ 0x0F12, 0x001F  },	//ash_GASBeta[1] //    
+{ 0x0F12, 0x0020  },   //ash_GASBeta[2] // 
+{ 0x0F12, 0x0000  },   //ash_GASBeta[3] // 
+{ 0x0F12, 0x0036  },   //ash_GASBeta[4] // 
+{ 0x0F12, 0x001F  },   //ash_GASBeta[5] // 
+{ 0x0F12, 0x0020  },   //ash_GASBeta[6] // 
+{ 0x0F12, 0x0000  },   //ash_GASBeta[7] // 
+{ 0x0F12, 0x0036  },   //ash_GASBeta[8] // 
+{ 0x0F12, 0x001F  },   //ash_GASBeta[9] // 
+{ 0x0F12, 0x0020  },   //ash_GASBeta[10] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[11] //
+{ 0x0F12, 0x0010  },   //ash_GASBeta[12] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[13] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[14] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[15] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[16] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[17] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[18] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[19] //
+{ 0x0F12, 0x0036  },   //ash_GASBeta[20] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[21] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[22] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[23] //
+{ 0x0F12, 0x0036  },   //ash_GASBeta[24] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[25] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[26] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[27] //
+                       
+{ 0x0F12, 0x0036  },	//ash_GAS OutdoorBeta[0] //   
+{ 0x0F12, 0x001F  },   //ash_GAS OutdoorBeta[1] //
+{ 0x0F12, 0x0020  },   //ash_GAS OutdoorBeta[2] //
+{ 0x0F12, 0x0000  },   //ash_GAS OutdoorBeta[3] //
+                       
+{ 0x002A, 0x075A  },	//ash_bParabolicEstimation//   
+{ 0x0F12, 0x0000  },   //ash_uParabolicCenterX   //
+{ 0x0F12, 0x0400  },   //ash_uParabolicCenterY   //
+{ 0x0F12, 0x0300  },   //ash_uParabolicscalingA  //
+{ 0x0F12, 0x0010  },   //ash_uParabolicscalingB  //
+{ 0x0F12, 0x0011  },   
+                       
+{ 0x002A, 0x347C  },   
+{ 0x0F12, 0x01EE  },	//TVAR_ash_pGAS[0] //     
+{ 0x0F12, 0x01A9  },   //TVAR_ash_pGAS[1] //  
+{ 0x0F12, 0x016A  },   //TVAR_ash_pGAS[2] //  
+{ 0x0F12, 0x0136  },   //TVAR_ash_pGAS[3] //  
+{ 0x0F12, 0x0111  },   //TVAR_ash_pGAS[4] //  
+{ 0x0F12, 0x00F6  },   //TVAR_ash_pGAS[5] //  
+{ 0x0F12, 0x00EB  },   //TVAR_ash_pGAS[6] //  
+{ 0x0F12, 0x00F7  },   //TVAR_ash_pGAS[7] //  
+{ 0x0F12, 0x0111  },   //TVAR_ash_pGAS[8] //  
+{ 0x0F12, 0x013B  },   //TVAR_ash_pGAS[9] //  
+{ 0x0F12, 0x0174  },   //TVAR_ash_pGAS[10] // 
+{ 0x0F12, 0x01BC  },   //TVAR_ash_pGAS[11] // 
+{ 0x0F12, 0x0204  },   //TVAR_ash_pGAS[12] // 
+{ 0x0F12, 0x01BA  },   //TVAR_ash_pGAS[13] // 
+{ 0x0F12, 0x0175  },   //TVAR_ash_pGAS[14] // 
+{ 0x0F12, 0x012C  },   //TVAR_ash_pGAS[15] // 
+{ 0x0F12, 0x00F1  },   //TVAR_ash_pGAS[16] // 
+{ 0x0F12, 0x00C5  },   //TVAR_ash_pGAS[17] // 
+{ 0x0F12, 0x00AA  },   //TVAR_ash_pGAS[18] // 
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[19] // 
+{ 0x0F12, 0x00AA  },   //TVAR_ash_pGAS[20] // 
+{ 0x0F12, 0x00C8  },   //TVAR_ash_pGAS[21] // 
+{ 0x0F12, 0x00FA  },   //TVAR_ash_pGAS[22] // 
+{ 0x0F12, 0x013D  },   //TVAR_ash_pGAS[23] // 
+{ 0x0F12, 0x0187  },   //TVAR_ash_pGAS[24] // 
+{ 0x0F12, 0x01DC  },   //TVAR_ash_pGAS[25] // 
+{ 0x0F12, 0x0184  },   //TVAR_ash_pGAS[26] // 
+{ 0x0F12, 0x0139  },   //TVAR_ash_pGAS[27] // 
+{ 0x0F12, 0x00EB  },   //TVAR_ash_pGAS[28] // 
+{ 0x0F12, 0x00A8  },   //TVAR_ash_pGAS[29] // 
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[30] // 
+{ 0x0F12, 0x005E  },   //TVAR_ash_pGAS[31] // 
+{ 0x0F12, 0x0055  },   //TVAR_ash_pGAS[32] // 
+{ 0x0F12, 0x0060  },   //TVAR_ash_pGAS[33] // 
+{ 0x0F12, 0x0080  },   //TVAR_ash_pGAS[34] // 
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[35] // 
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[36] // 
+{ 0x0F12, 0x0156  },   //TVAR_ash_pGAS[37] // 
+{ 0x0F12, 0x01A8  },   //TVAR_ash_pGAS[38] // 
+{ 0x0F12, 0x015B  },   //TVAR_ash_pGAS[39] // 
+{ 0x0F12, 0x010E  },   //TVAR_ash_pGAS[40] // 
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[41] // 
+{ 0x0F12, 0x0075  },   //TVAR_ash_pGAS[42] // 
+{ 0x0F12, 0x0045  },   //TVAR_ash_pGAS[43] // 
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[44] // 
+{ 0x0F12, 0x0023  },   //TVAR_ash_pGAS[45] // 
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[46] // 
+{ 0x0F12, 0x004C  },   //TVAR_ash_pGAS[47] // 
+{ 0x0F12, 0x0086  },   //TVAR_ash_pGAS[48] // 
+{ 0x0F12, 0x00D3  },   //TVAR_ash_pGAS[49] // 
+{ 0x0F12, 0x0130  },   //TVAR_ash_pGAS[50] // 
+{ 0x0F12, 0x0188  },   //TVAR_ash_pGAS[51] // 
+{ 0x0F12, 0x0140  },   //TVAR_ash_pGAS[52] // 
+{ 0x0F12, 0x00F2  },   //TVAR_ash_pGAS[53] // 
+{ 0x0F12, 0x009E  },   //TVAR_ash_pGAS[54] // 
+{ 0x0F12, 0x0056  },   //TVAR_ash_pGAS[55] // 
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[56] // 
+{ 0x0F12, 0x0013  },   //TVAR_ash_pGAS[57] // 
+{ 0x0F12, 0x000A  },   //TVAR_ash_pGAS[58] // 
+{ 0x0F12, 0x0013  },   //TVAR_ash_pGAS[59] // 
+{ 0x0F12, 0x0030  },   //TVAR_ash_pGAS[60] // 
+{ 0x0F12, 0x006B  },   //TVAR_ash_pGAS[61] // 
+{ 0x0F12, 0x00BA  },   //TVAR_ash_pGAS[62] // 
+{ 0x0F12, 0x0117  },   //TVAR_ash_pGAS[63] // 
+{ 0x0F12, 0x0176  },   //TVAR_ash_pGAS[64] // 
+{ 0x0F12, 0x012F  },   //TVAR_ash_pGAS[65] // 
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[66] // 
+{ 0x0F12, 0x0090  },   //TVAR_ash_pGAS[67] // 
+{ 0x0F12, 0x004D  },   //TVAR_ash_pGAS[68] // 
+{ 0x0F12, 0x0020  },   //TVAR_ash_pGAS[69] // 
+{ 0x0F12, 0x0009  },   //TVAR_ash_pGAS[70] // 
+{ 0x0F12, 0x0000  },   //TVAR_ash_pGAS[71] // 
+{ 0x0F12, 0x000D  },   //TVAR_ash_pGAS[72] // 
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[73] // 
+{ 0x0F12, 0x0062  },   //TVAR_ash_pGAS[74] // 
+{ 0x0F12, 0x00B3  },   //TVAR_ash_pGAS[75] // 
+{ 0x0F12, 0x0114  },   //TVAR_ash_pGAS[76] // 
+{ 0x0F12, 0x0172  },   //TVAR_ash_pGAS[77] // 
+{ 0x0F12, 0x0137  },   //TVAR_ash_pGAS[78] // 
+{ 0x0F12, 0x00E9  },   //TVAR_ash_pGAS[79] // 
+{ 0x0F12, 0x0098  },   //TVAR_ash_pGAS[80] // 
+{ 0x0F12, 0x0054  },   //TVAR_ash_pGAS[81] // 
+{ 0x0F12, 0x002A  },   //TVAR_ash_pGAS[82] // 
+{ 0x0F12, 0x0012  },   //TVAR_ash_pGAS[83] // 
+{ 0x0F12, 0x0009  },   //TVAR_ash_pGAS[84] // 
+{ 0x0F12, 0x0017  },   //TVAR_ash_pGAS[85] // 
+{ 0x0F12, 0x0034  },   //TVAR_ash_pGAS[86] // 
+{ 0x0F12, 0x006D  },   //TVAR_ash_pGAS[87] // 
+{ 0x0F12, 0x00BF  },   //TVAR_ash_pGAS[88] // 
+{ 0x0F12, 0x011C  },   //TVAR_ash_pGAS[89] // 
+{ 0x0F12, 0x0179  },   //TVAR_ash_pGAS[90] // 
+{ 0x0F12, 0x0152  },   //TVAR_ash_pGAS[91] // 
+{ 0x0F12, 0x0106  },   //TVAR_ash_pGAS[92] // 
+{ 0x0F12, 0x00B6  },   //TVAR_ash_pGAS[93] // 
+{ 0x0F12, 0x0070  },   //TVAR_ash_pGAS[94] // 
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[95] // 
+{ 0x0F12, 0x002D  },   //TVAR_ash_pGAS[96] // 
+{ 0x0F12, 0x0024  },   //TVAR_ash_pGAS[97] // 
+{ 0x0F12, 0x0032  },   //TVAR_ash_pGAS[98] // 
+{ 0x0F12, 0x0051  },   //TVAR_ash_pGAS[99] // 
+{ 0x0F12, 0x008A  },   //TVAR_ash_pGAS[100] //
+{ 0x0F12, 0x00DB  },   //TVAR_ash_pGAS[101] //
+{ 0x0F12, 0x0139  },   //TVAR_ash_pGAS[102] //
+{ 0x0F12, 0x0191  },   //TVAR_ash_pGAS[103] //
+{ 0x0F12, 0x0174  },   //TVAR_ash_pGAS[104] //
+{ 0x0F12, 0x012B  },   //TVAR_ash_pGAS[105] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[106] //
+{ 0x0F12, 0x009D  },   //TVAR_ash_pGAS[107] //
+{ 0x0F12, 0x006E  },   //TVAR_ash_pGAS[108] //
+{ 0x0F12, 0x0055  },   //TVAR_ash_pGAS[109] //
+{ 0x0F12, 0x0050  },   //TVAR_ash_pGAS[110] //
+{ 0x0F12, 0x005C  },   //TVAR_ash_pGAS[111] //
+{ 0x0F12, 0x007B  },   //TVAR_ash_pGAS[112] //
+{ 0x0F12, 0x00B7  },   //TVAR_ash_pGAS[113] //
+{ 0x0F12, 0x0109  },   //TVAR_ash_pGAS[114] //
+{ 0x0F12, 0x015E  },   //TVAR_ash_pGAS[115] //
+{ 0x0F12, 0x01B0  },   //TVAR_ash_pGAS[116] //
+{ 0x0F12, 0x01A9  },   //TVAR_ash_pGAS[117] //
+{ 0x0F12, 0x0160  },   //TVAR_ash_pGAS[118] //
+{ 0x0F12, 0x011A  },   //TVAR_ash_pGAS[119] //
+{ 0x0F12, 0x00DE  },   //TVAR_ash_pGAS[120] //
+{ 0x0F12, 0x00B1  },   //TVAR_ash_pGAS[121] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[122] //
+{ 0x0F12, 0x0093  },   //TVAR_ash_pGAS[123] //
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[124] //
+{ 0x0F12, 0x00C3  },   //TVAR_ash_pGAS[125] //
+{ 0x0F12, 0x00FA  },   //TVAR_ash_pGAS[126] //
+{ 0x0F12, 0x0143  },   //TVAR_ash_pGAS[127] //
+{ 0x0F12, 0x0190  },   //TVAR_ash_pGAS[128] //
+{ 0x0F12, 0x01E4  },   //TVAR_ash_pGAS[129] //
+{ 0x0F12, 0x01D5  },   //TVAR_ash_pGAS[130] //
+{ 0x0F12, 0x0194  },   //TVAR_ash_pGAS[131] //
+{ 0x0F12, 0x014E  },   //TVAR_ash_pGAS[132] //
+{ 0x0F12, 0x011F  },   //TVAR_ash_pGAS[133] //
+{ 0x0F12, 0x00F9  },   //TVAR_ash_pGAS[134] //
+{ 0x0F12, 0x00E1  },   //TVAR_ash_pGAS[135] //
+{ 0x0F12, 0x00DA  },   //TVAR_ash_pGAS[136] //
+{ 0x0F12, 0x00E8  },   //TVAR_ash_pGAS[137] //
+{ 0x0F12, 0x010A  },   //TVAR_ash_pGAS[138] //
+{ 0x0F12, 0x0139  },   //TVAR_ash_pGAS[139] //
+{ 0x0F12, 0x017B  },   //TVAR_ash_pGAS[140] //
+{ 0x0F12, 0x01C5  },   //TVAR_ash_pGAS[141] //
+{ 0x0F12, 0x0205  },   //TVAR_ash_pGAS[142] //
+{ 0x0F12, 0x01A2  },   //TVAR_ash_pGAS[143] //
+{ 0x0F12, 0x015F  },   //TVAR_ash_pGAS[144] //
+{ 0x0F12, 0x0126  },   //TVAR_ash_pGAS[145] //
+{ 0x0F12, 0x00F9  },   //TVAR_ash_pGAS[146] //
+{ 0x0F12, 0x00D7  },   //TVAR_ash_pGAS[147] //
+{ 0x0F12, 0x00BF  },   //TVAR_ash_pGAS[148] //
+{ 0x0F12, 0x00B6  },   //TVAR_ash_pGAS[149] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[150] //
+{ 0x0F12, 0x00D2  },   //TVAR_ash_pGAS[151] //
+{ 0x0F12, 0x00F3  },   //TVAR_ash_pGAS[152] //
+{ 0x0F12, 0x011D  },   //TVAR_ash_pGAS[153] //
+{ 0x0F12, 0x015A  },   //TVAR_ash_pGAS[154] //
+{ 0x0F12, 0x019E  },   //TVAR_ash_pGAS[155] //
+{ 0x0F12, 0x0171  },   //TVAR_ash_pGAS[156] //
+{ 0x0F12, 0x012E  },   //TVAR_ash_pGAS[157] //
+{ 0x0F12, 0x00F1  },   //TVAR_ash_pGAS[158] //
+{ 0x0F12, 0x00BF  },   //TVAR_ash_pGAS[159] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[160] //
+{ 0x0F12, 0x0081  },   //TVAR_ash_pGAS[161] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[162] //
+{ 0x0F12, 0x0080  },   //TVAR_ash_pGAS[163] //
+{ 0x0F12, 0x0097  },   //TVAR_ash_pGAS[164] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[165] //
+{ 0x0F12, 0x00EE  },   //TVAR_ash_pGAS[166] //
+{ 0x0F12, 0x012B  },   //TVAR_ash_pGAS[167] //
+{ 0x0F12, 0x0177  },   //TVAR_ash_pGAS[168] //
+{ 0x0F12, 0x0144  },   //TVAR_ash_pGAS[169] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_pGAS[170] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[171] //
+{ 0x0F12, 0x0088  },   //TVAR_ash_pGAS[172] //
+{ 0x0F12, 0x005F  },   //TVAR_ash_pGAS[173] //
+{ 0x0F12, 0x0049  },   //TVAR_ash_pGAS[174] //
+{ 0x0F12, 0x0041  },   //TVAR_ash_pGAS[175] //
+{ 0x0F12, 0x0049  },   //TVAR_ash_pGAS[176] //
+{ 0x0F12, 0x0061  },   //TVAR_ash_pGAS[177] //
+{ 0x0F12, 0x0089  },   //TVAR_ash_pGAS[178] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[179] //
+{ 0x0F12, 0x0104  },   //TVAR_ash_pGAS[180] //
+{ 0x0F12, 0x014D  },   //TVAR_ash_pGAS[181] //
+{ 0x0F12, 0x0122  },   //TVAR_ash_pGAS[182] //
+{ 0x0F12, 0x00DD  },   //TVAR_ash_pGAS[183] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[184] //
+{ 0x0F12, 0x005F  },   //TVAR_ash_pGAS[185] //
+{ 0x0F12, 0x0036  },   //TVAR_ash_pGAS[186] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[187] //
+{ 0x0F12, 0x0019  },   //TVAR_ash_pGAS[188] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[189] //
+{ 0x0F12, 0x003A  },   //TVAR_ash_pGAS[190] //
+{ 0x0F12, 0x0066  },   //TVAR_ash_pGAS[191] //
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[192] //
+{ 0x0F12, 0x00E6  },   //TVAR_ash_pGAS[193] //
+{ 0x0F12, 0x0130  },   //TVAR_ash_pGAS[194] //
+{ 0x0F12, 0x010B  },   //TVAR_ash_pGAS[195] //
+{ 0x0F12, 0x00C6  },   //TVAR_ash_pGAS[196] //
+{ 0x0F12, 0x0082  },   //TVAR_ash_pGAS[197] //
+{ 0x0F12, 0x0047  },   //TVAR_ash_pGAS[198] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[199] //
+{ 0x0F12, 0x000D  },   //TVAR_ash_pGAS[200] //
+{ 0x0F12, 0x0007  },   //TVAR_ash_pGAS[201] //
+{ 0x0F12, 0x000F  },   //TVAR_ash_pGAS[202] //
+{ 0x0F12, 0x0027  },   //TVAR_ash_pGAS[203] //
+{ 0x0F12, 0x0053  },   //TVAR_ash_pGAS[204] //
+{ 0x0F12, 0x008F  },   //TVAR_ash_pGAS[205] //
+{ 0x0F12, 0x00D6  },   //TVAR_ash_pGAS[206] //
+{ 0x0F12, 0x0121  },   //TVAR_ash_pGAS[207] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_pGAS[208] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[209] //
+{ 0x0F12, 0x0077  },   //TVAR_ash_pGAS[210] //
+{ 0x0F12, 0x0040  },   //TVAR_ash_pGAS[211] //
+{ 0x0F12, 0x001A  },   //TVAR_ash_pGAS[212] //
+{ 0x0F12, 0x0007  },   //TVAR_ash_pGAS[213] //
+{ 0x0F12, 0x0000  },   //TVAR_ash_pGAS[214] //
+{ 0x0F12, 0x000B  },   //TVAR_ash_pGAS[215] //
+{ 0x0F12, 0x0023  },   //TVAR_ash_pGAS[216] //
+{ 0x0F12, 0x004E  },   //TVAR_ash_pGAS[217] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[218] //
+{ 0x0F12, 0x00D3  },   //TVAR_ash_pGAS[219] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[220] //
+{ 0x0F12, 0x0103  },   //TVAR_ash_pGAS[221] //
+{ 0x0F12, 0x00C1  },   //TVAR_ash_pGAS[222] //
+{ 0x0F12, 0x007D  },   //TVAR_ash_pGAS[223] //
+{ 0x0F12, 0x0046  },   //TVAR_ash_pGAS[224] //
+{ 0x0F12, 0x0024  },   //TVAR_ash_pGAS[225] //
+{ 0x0F12, 0x0010  },   //TVAR_ash_pGAS[226] //
+{ 0x0F12, 0x0008  },   //TVAR_ash_pGAS[227] //
+{ 0x0F12, 0x0014  },   //TVAR_ash_pGAS[228] //
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[229] //
+{ 0x0F12, 0x0059  },   //TVAR_ash_pGAS[230] //
+{ 0x0F12, 0x0094  },   //TVAR_ash_pGAS[231] //
+{ 0x0F12, 0x00DB  },   //TVAR_ash_pGAS[232] //
+{ 0x0F12, 0x0125  },   //TVAR_ash_pGAS[233] //
+{ 0x0F12, 0x0117  },   //TVAR_ash_pGAS[234] //
+{ 0x0F12, 0x00D5  },   //TVAR_ash_pGAS[235] //
+{ 0x0F12, 0x0092  },   //TVAR_ash_pGAS[236] //
+{ 0x0F12, 0x005C  },   //TVAR_ash_pGAS[237] //
+{ 0x0F12, 0x0038  },   //TVAR_ash_pGAS[238] //
+{ 0x0F12, 0x0026  },   //TVAR_ash_pGAS[239] //
+{ 0x0F12, 0x0020  },   //TVAR_ash_pGAS[240] //
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[241] //
+{ 0x0F12, 0x0044  },   //TVAR_ash_pGAS[242] //
+{ 0x0F12, 0x006F  },   //TVAR_ash_pGAS[243] //
+{ 0x0F12, 0x00AC  },   //TVAR_ash_pGAS[244] //
+{ 0x0F12, 0x00F2  },   //TVAR_ash_pGAS[245] //
+{ 0x0F12, 0x013B  },   //TVAR_ash_pGAS[246] //
+{ 0x0F12, 0x0131  },   //TVAR_ash_pGAS[247] //
+{ 0x0F12, 0x00EE  },   //TVAR_ash_pGAS[248] //
+{ 0x0F12, 0x00B3  },   //TVAR_ash_pGAS[249] //
+{ 0x0F12, 0x007E  },   //TVAR_ash_pGAS[250] //
+{ 0x0F12, 0x005B  },   //TVAR_ash_pGAS[251] //
+{ 0x0F12, 0x0047  },   //TVAR_ash_pGAS[252] //
+{ 0x0F12, 0x0044  },   //TVAR_ash_pGAS[253] //
+{ 0x0F12, 0x004E  },   //TVAR_ash_pGAS[254] //
+{ 0x0F12, 0x0067  },   //TVAR_ash_pGAS[255] //
+{ 0x0F12, 0x0094  },   //TVAR_ash_pGAS[256] //
+{ 0x0F12, 0x00D0  },   //TVAR_ash_pGAS[257] //
+{ 0x0F12, 0x0112  },   //TVAR_ash_pGAS[258] //
+{ 0x0F12, 0x0159  },   //TVAR_ash_pGAS[259] //
+{ 0x0F12, 0x015E  },   //TVAR_ash_pGAS[260] //
+{ 0x0F12, 0x011B  },   //TVAR_ash_pGAS[261] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[262] //
+{ 0x0F12, 0x00B1  },   //TVAR_ash_pGAS[263] //
+{ 0x0F12, 0x008E  },   //TVAR_ash_pGAS[264] //
+{ 0x0F12, 0x007E  },   //TVAR_ash_pGAS[265] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[266] //
+{ 0x0F12, 0x0084  },   //TVAR_ash_pGAS[267] //
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[268] //
+{ 0x0F12, 0x00C8  },   //TVAR_ash_pGAS[269] //
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[270] //
+{ 0x0F12, 0x013A  },   //TVAR_ash_pGAS[271] //
+{ 0x0F12, 0x0185  },   //TVAR_ash_pGAS[272] //
+{ 0x0F12, 0x0188  },   //TVAR_ash_pGAS[273] //
+{ 0x0F12, 0x0148  },   //TVAR_ash_pGAS[274] //
+{ 0x0F12, 0x010D  },   //TVAR_ash_pGAS[275] //
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[276] //
+{ 0x0F12, 0x00C7  },   //TVAR_ash_pGAS[277] //
+{ 0x0F12, 0x00B4  },   //TVAR_ash_pGAS[278] //
+{ 0x0F12, 0x00B2  },   //TVAR_ash_pGAS[279] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[280] //
+{ 0x0F12, 0x00D9  },   //TVAR_ash_pGAS[281] //
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[282] //
+{ 0x0F12, 0x012F  },   //TVAR_ash_pGAS[283] //
+{ 0x0F12, 0x016D  },   //TVAR_ash_pGAS[284] //
+{ 0x0F12, 0x01A7  },   //TVAR_ash_pGAS[285] //
+{ 0x0F12, 0x018F  },   //TVAR_ash_pGAS[286] //
+{ 0x0F12, 0x014E  },   //TVAR_ash_pGAS[287] //
+{ 0x0F12, 0x0119  },   //TVAR_ash_pGAS[288] //
+{ 0x0F12, 0x00EC  },   //TVAR_ash_pGAS[289] //
+{ 0x0F12, 0x00CD  },   //TVAR_ash_pGAS[290] //
+{ 0x0F12, 0x00BB  },   //TVAR_ash_pGAS[291] //
+{ 0x0F12, 0x00B8  },   //TVAR_ash_pGAS[292] //
+{ 0x0F12, 0x00C4  },   //TVAR_ash_pGAS[293] //
+{ 0x0F12, 0x00DE  },   //TVAR_ash_pGAS[294] //
+{ 0x0F12, 0x0105  },   //TVAR_ash_pGAS[295] //
+{ 0x0F12, 0x0135  },   //TVAR_ash_pGAS[296] //
+{ 0x0F12, 0x0176  },   //TVAR_ash_pGAS[297] //
+{ 0x0F12, 0x01B8  },   //TVAR_ash_pGAS[298] //
+{ 0x0F12, 0x0161  },   //TVAR_ash_pGAS[299] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[300] //
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[301] //
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[302] //
+{ 0x0F12, 0x0093  },   //TVAR_ash_pGAS[303] //
+{ 0x0F12, 0x0080  },   //TVAR_ash_pGAS[304] //
+{ 0x0F12, 0x007C  },   //TVAR_ash_pGAS[305] //
+{ 0x0F12, 0x0087  },   //TVAR_ash_pGAS[306] //
+{ 0x0F12, 0x00A3  },   //TVAR_ash_pGAS[307] //
+{ 0x0F12, 0x00CD  },   //TVAR_ash_pGAS[308] //
+{ 0x0F12, 0x0104  },   //TVAR_ash_pGAS[309] //
+{ 0x0F12, 0x0142  },   //TVAR_ash_pGAS[310] //
+{ 0x0F12, 0x0192  },   //TVAR_ash_pGAS[311] //
+{ 0x0F12, 0x0136  },   //TVAR_ash_pGAS[312] //
+{ 0x0F12, 0x00F4  },   //TVAR_ash_pGAS[313] //
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[314] //
+{ 0x0F12, 0x0081  },   //TVAR_ash_pGAS[315] //
+{ 0x0F12, 0x005C  },   //TVAR_ash_pGAS[316] //
+{ 0x0F12, 0x0048  },   //TVAR_ash_pGAS[317] //
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[318] //
+{ 0x0F12, 0x004E  },   //TVAR_ash_pGAS[319] //
+{ 0x0F12, 0x006A  },   //TVAR_ash_pGAS[320] //
+{ 0x0F12, 0x0097  },   //TVAR_ash_pGAS[321] //
+{ 0x0F12, 0x00D0  },   //TVAR_ash_pGAS[322] //
+{ 0x0F12, 0x0116  },   //TVAR_ash_pGAS[323] //
+{ 0x0F12, 0x0160  },   //TVAR_ash_pGAS[324] //
+{ 0x0F12, 0x0118  },   //TVAR_ash_pGAS[325] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[326] //
+{ 0x0F12, 0x0093  },   //TVAR_ash_pGAS[327] //
+{ 0x0F12, 0x005B  },   //TVAR_ash_pGAS[328] //
+{ 0x0F12, 0x0035  },   //TVAR_ash_pGAS[329] //
+{ 0x0F12, 0x0020  },   //TVAR_ash_pGAS[330] //
+{ 0x0F12, 0x001B  },   //TVAR_ash_pGAS[331] //
+{ 0x0F12, 0x0024  },   //TVAR_ash_pGAS[332] //
+{ 0x0F12, 0x0041  },   //TVAR_ash_pGAS[333] //
+{ 0x0F12, 0x006F  },   //TVAR_ash_pGAS[334] //
+{ 0x0F12, 0x00AC  },   //TVAR_ash_pGAS[335] //
+{ 0x0F12, 0x00F3  },   //TVAR_ash_pGAS[336] //
+{ 0x0F12, 0x013F  },   //TVAR_ash_pGAS[337] //
+{ 0x0F12, 0x0105  },   //TVAR_ash_pGAS[338] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[339] //
+{ 0x0F12, 0x007F  },   //TVAR_ash_pGAS[340] //
+{ 0x0F12, 0x0046  },   //TVAR_ash_pGAS[341] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[342] //
+{ 0x0F12, 0x000E  },   //TVAR_ash_pGAS[343] //
+{ 0x0F12, 0x0007  },   //TVAR_ash_pGAS[344] //
+{ 0x0F12, 0x0010  },   //TVAR_ash_pGAS[345] //
+{ 0x0F12, 0x002A  },   //TVAR_ash_pGAS[346] //
+{ 0x0F12, 0x0058  },   //TVAR_ash_pGAS[347] //
+{ 0x0F12, 0x0094  },   //TVAR_ash_pGAS[348] //
+{ 0x0F12, 0x00DB  },   //TVAR_ash_pGAS[349] //
+{ 0x0F12, 0x0127  },   //TVAR_ash_pGAS[350] //
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[351] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[352] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[353] //
+{ 0x0F12, 0x0042  },   //TVAR_ash_pGAS[354] //
+{ 0x0F12, 0x001C  },   //TVAR_ash_pGAS[355] //
+{ 0x0F12, 0x0008  },   //TVAR_ash_pGAS[356] //
+{ 0x0F12, 0x0000  },   //TVAR_ash_pGAS[357] //
+{ 0x0F12, 0x000B  },   //TVAR_ash_pGAS[358] //
+{ 0x0F12, 0x0023  },   //TVAR_ash_pGAS[359] //
+{ 0x0F12, 0x0050  },   //TVAR_ash_pGAS[360] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[361] //
+{ 0x0F12, 0x00D3  },   //TVAR_ash_pGAS[362] //
+{ 0x0F12, 0x011D  },   //TVAR_ash_pGAS[363] //
+{ 0x0F12, 0x0108  },   //TVAR_ash_pGAS[364] //
+{ 0x0F12, 0x00C4  },   //TVAR_ash_pGAS[365] //
+{ 0x0F12, 0x0083  },   //TVAR_ash_pGAS[366] //
+{ 0x0F12, 0x004C  },   //TVAR_ash_pGAS[367] //
+{ 0x0F12, 0x0027  },   //TVAR_ash_pGAS[368] //
+{ 0x0F12, 0x0011  },   //TVAR_ash_pGAS[369] //
+{ 0x0F12, 0x0008  },   //TVAR_ash_pGAS[370] //
+{ 0x0F12, 0x0013  },   //TVAR_ash_pGAS[371] //
+{ 0x0F12, 0x002A  },   //TVAR_ash_pGAS[372] //
+{ 0x0F12, 0x0055  },   //TVAR_ash_pGAS[373] //
+{ 0x0F12, 0x008F  },   //TVAR_ash_pGAS[374] //
+{ 0x0F12, 0x00D5  },   //TVAR_ash_pGAS[375] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[376] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[377] //
+{ 0x0F12, 0x00DC  },   //TVAR_ash_pGAS[378] //
+{ 0x0F12, 0x009C  },   //TVAR_ash_pGAS[379] //
+{ 0x0F12, 0x0064  },   //TVAR_ash_pGAS[380] //
+{ 0x0F12, 0x003D  },   //TVAR_ash_pGAS[381] //
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[382] //
+{ 0x0F12, 0x001F  },   //TVAR_ash_pGAS[383] //
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[384] //
+{ 0x0F12, 0x003F  },   //TVAR_ash_pGAS[385] //
+{ 0x0F12, 0x0069  },   //TVAR_ash_pGAS[386] //
+{ 0x0F12, 0x00A3  },   //TVAR_ash_pGAS[387] //
+{ 0x0F12, 0x00E8  },   //TVAR_ash_pGAS[388] //
+{ 0x0F12, 0x012D  },   //TVAR_ash_pGAS[389] //
+{ 0x0F12, 0x013D  },   //TVAR_ash_pGAS[390] //
+{ 0x0F12, 0x00FB  },   //TVAR_ash_pGAS[391] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[392] //
+{ 0x0F12, 0x0089  },   //TVAR_ash_pGAS[393] //
+{ 0x0F12, 0x0063  },   //TVAR_ash_pGAS[394] //
+{ 0x0F12, 0x004C  },   //TVAR_ash_pGAS[395] //
+{ 0x0F12, 0x0045  },   //TVAR_ash_pGAS[396] //
+{ 0x0F12, 0x004B  },   //TVAR_ash_pGAS[397] //
+{ 0x0F12, 0x0061  },   //TVAR_ash_pGAS[398] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[399] //
+{ 0x0F12, 0x00C4  },   //TVAR_ash_pGAS[400] //
+{ 0x0F12, 0x0102  },   //TVAR_ash_pGAS[401] //
+{ 0x0F12, 0x014B  },   //TVAR_ash_pGAS[402] //
+{ 0x0F12, 0x016F  },   //TVAR_ash_pGAS[403] //
+{ 0x0F12, 0x0129  },   //TVAR_ash_pGAS[404] //
+{ 0x0F12, 0x00F0  },   //TVAR_ash_pGAS[405] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[406] //
+{ 0x0F12, 0x009A  },   //TVAR_ash_pGAS[407] //
+{ 0x0F12, 0x0084  },   //TVAR_ash_pGAS[408] //
+{ 0x0F12, 0x007B  },   //TVAR_ash_pGAS[409] //
+{ 0x0F12, 0x0082  },   //TVAR_ash_pGAS[410] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[411] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[412] //
+{ 0x0F12, 0x00EF  },   //TVAR_ash_pGAS[413] //
+{ 0x0F12, 0x0129  },   //TVAR_ash_pGAS[414] //
+{ 0x0F12, 0x0173  },   //TVAR_ash_pGAS[415] //
+{ 0x0F12, 0x01A0  },   //TVAR_ash_pGAS[416] //
+{ 0x0F12, 0x015B  },   //TVAR_ash_pGAS[417] //
+{ 0x0F12, 0x0121  },   //TVAR_ash_pGAS[418] //
+{ 0x0F12, 0x00F9  },   //TVAR_ash_pGAS[419] //
+{ 0x0F12, 0x00D8  },   //TVAR_ash_pGAS[420] //
+{ 0x0F12, 0x00C2  },   //TVAR_ash_pGAS[421] //
+{ 0x0F12, 0x00B7  },   //TVAR_ash_pGAS[422] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[423] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[424] //
+{ 0x0F12, 0x00F4  },   //TVAR_ash_pGAS[425] //
+{ 0x0F12, 0x0120  },   //TVAR_ash_pGAS[426] //
+{ 0x0F12, 0x015D  },   //TVAR_ash_pGAS[427] //
+{ 0x0F12, 0x0198  },   //TVAR_ash_pGAS[428] //
+{ 0x0F12, 0x013A  },   //TVAR_ash_pGAS[429] //
+{ 0x0F12, 0x010B  },   //TVAR_ash_pGAS[430] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[431] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[432] //
+{ 0x0F12, 0x00A7  },   //TVAR_ash_pGAS[433] //
+{ 0x0F12, 0x009A  },   //TVAR_ash_pGAS[434] //
+{ 0x0F12, 0x0097  },   //TVAR_ash_pGAS[435] //
+{ 0x0F12, 0x00A2  },   //TVAR_ash_pGAS[436] //
+{ 0x0F12, 0x00B9  },   //TVAR_ash_pGAS[437] //
+{ 0x0F12, 0x00D6  },   //TVAR_ash_pGAS[438] //
+{ 0x0F12, 0x00FD  },   //TVAR_ash_pGAS[439] //
+{ 0x0F12, 0x0133  },   //TVAR_ash_pGAS[440] //
+{ 0x0F12, 0x0165  },   //TVAR_ash_pGAS[441] //
+{ 0x0F12, 0x0117  },   //TVAR_ash_pGAS[442] //
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[443] //
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[444] //
+{ 0x0F12, 0x0091  },   //TVAR_ash_pGAS[445] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[446] //
+{ 0x0F12, 0x006D  },   //TVAR_ash_pGAS[447] //
+{ 0x0F12, 0x0069  },   //TVAR_ash_pGAS[448] //
+{ 0x0F12, 0x0072  },   //TVAR_ash_pGAS[449] //
+{ 0x0F12, 0x0088  },   //TVAR_ash_pGAS[450] //
+{ 0x0F12, 0x00A9  },   //TVAR_ash_pGAS[451] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[452] //
+{ 0x0F12, 0x0108  },   //TVAR_ash_pGAS[453] //
+{ 0x0F12, 0x0148  },   //TVAR_ash_pGAS[454] //
+{ 0x0F12, 0x00F1  },   //TVAR_ash_pGAS[455] //
+{ 0x0F12, 0x00BD  },   //TVAR_ash_pGAS[456] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[457] //
+{ 0x0F12, 0x0063  },   //TVAR_ash_pGAS[458] //
+{ 0x0F12, 0x0049  },   //TVAR_ash_pGAS[459] //
+{ 0x0F12, 0x003D  },   //TVAR_ash_pGAS[460] //
+{ 0x0F12, 0x003A  },   //TVAR_ash_pGAS[461] //
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[462] //
+{ 0x0F12, 0x0057  },   //TVAR_ash_pGAS[463] //
+{ 0x0F12, 0x007A  },   //TVAR_ash_pGAS[464] //
+{ 0x0F12, 0x00A8  },   //TVAR_ash_pGAS[465] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[466] //
+{ 0x0F12, 0x011B  },   //TVAR_ash_pGAS[467] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[468] //
+{ 0x0F12, 0x00A1  },   //TVAR_ash_pGAS[469] //
+{ 0x0F12, 0x006D  },   //TVAR_ash_pGAS[470] //
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[471] //
+{ 0x0F12, 0x0027  },   //TVAR_ash_pGAS[472] //
+{ 0x0F12, 0x001B  },   //TVAR_ash_pGAS[473] //
+{ 0x0F12, 0x0019  },   //TVAR_ash_pGAS[474] //
+{ 0x0F12, 0x001E  },   //TVAR_ash_pGAS[475] //
+{ 0x0F12, 0x0033  },   //TVAR_ash_pGAS[476] //
+{ 0x0F12, 0x0057  },   //TVAR_ash_pGAS[477] //
+{ 0x0F12, 0x0087  },   //TVAR_ash_pGAS[478] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[479] //
+{ 0x0F12, 0x00FA  },   //TVAR_ash_pGAS[480] //
+{ 0x0F12, 0x00C1  },   //TVAR_ash_pGAS[481] //
+{ 0x0F12, 0x008F  },   //TVAR_ash_pGAS[482] //
+{ 0x0F12, 0x005B  },	//TVAR_ash_pGAS[483] //                                                                        
+{ 0x0F12, 0x0031  },	//TVAR_ash_pGAS[484] //                                                                        
+{ 0x0F12, 0x0016  },	//TVAR_ash_pGAS[485] //                                                                        
+{ 0x0F12, 0x000B  },	//TVAR_ash_pGAS[486] //                                                                        
+{ 0x0F12, 0x0006  },	//TVAR_ash_pGAS[487] //                                                                        
+{ 0x0F12, 0x000D  },	//TVAR_ash_pGAS[488] //                                                                        
+{ 0x0F12, 0x001F  },	//TVAR_ash_pGAS[489] //                                                                        
+{ 0x0F12, 0x0042  },	//TVAR_ash_pGAS[490] //                                                                        
+{ 0x0F12, 0x0070  },	//TVAR_ash_pGAS[491] //                                                                        
+{ 0x0F12, 0x00AA  },	//TVAR_ash_pGAS[492] //                                                                        
+{ 0x0F12, 0x00E5  },	//TVAR_ash_pGAS[493] //                                                                        
+{ 0x0F12, 0x00BD  },	//TVAR_ash_pGAS[494] //                                                                        
+{ 0x0F12, 0x008A  },	//TVAR_ash_pGAS[495] //                                                                        
+{ 0x0F12, 0x0056  },	//TVAR_ash_pGAS[496] //                                                                        
+{ 0x0F12, 0x002C  },	//TVAR_ash_pGAS[497] //                                                                        
+{ 0x0F12, 0x0011  },	//TVAR_ash_pGAS[498] //                                                                        
+{ 0x0F12, 0x0005  },	//TVAR_ash_pGAS[499] //                                                                        
+{ 0x0F12, 0x0000  },	//TVAR_ash_pGAS[500] //                                                                        
+{ 0x0F12, 0x0008  },	//TVAR_ash_pGAS[501] //                                                                        
+{ 0x0F12, 0x0018  },	//TVAR_ash_pGAS[502] //                                                                        
+{ 0x0F12, 0x0039  },	//TVAR_ash_pGAS[503] //                                                                        
+{ 0x0F12, 0x0068  },	//TVAR_ash_pGAS[504] //                                                                        
+{ 0x0F12, 0x00A1  },	//TVAR_ash_pGAS[505] //                                                                        
+{ 0x0F12, 0x00DA  },	//TVAR_ash_pGAS[506] //                                                                        
+{ 0x0F12, 0x00C4  },	//TVAR_ash_pGAS[507] //                                                                        
+{ 0x0F12, 0x0092  },	//TVAR_ash_pGAS[508] //                                                                        
+{ 0x0F12, 0x005F  },	//TVAR_ash_pGAS[509] //                                                                        
+{ 0x0F12, 0x0034  },	//TVAR_ash_pGAS[510] //                                                                        
+{ 0x0F12, 0x001B  },	//TVAR_ash_pGAS[511] //                                                                        
+{ 0x0F12, 0x000D  },	//TVAR_ash_pGAS[512] //                                                                        
+{ 0x0F12, 0x0007  },	//TVAR_ash_pGAS[513] //                                                                        
+{ 0x0F12, 0x000E  },	//TVAR_ash_pGAS[514] //                                                                        
+{ 0x0F12, 0x001E  },	//TVAR_ash_pGAS[515] //                                                                        
+{ 0x0F12, 0x003E  },	//TVAR_ash_pGAS[516] //                                                                        
+{ 0x0F12, 0x006A  },	//TVAR_ash_pGAS[517] //                                                                        
+{ 0x0F12, 0x00A2  },	//TVAR_ash_pGAS[518] //                                                                        
+{ 0x0F12, 0x00DB  },	//TVAR_ash_pGAS[519] //                                                                        
+{ 0x0F12, 0x00D7  },	//TVAR_ash_pGAS[520] //                                                                        
+{ 0x0F12, 0x00A3  },	//TVAR_ash_pGAS[521] //                                                                        
+{ 0x0F12, 0x0073  },	//TVAR_ash_pGAS[522] //                                                                        
+{ 0x0F12, 0x0049  },	//TVAR_ash_pGAS[523] //                                                                        
+{ 0x0F12, 0x002F  },	//TVAR_ash_pGAS[524] //                                                                        
+{ 0x0F12, 0x0022  },	//TVAR_ash_pGAS[525] //                                                                        
+{ 0x0F12, 0x001B  },	//TVAR_ash_pGAS[526] //                                                                        
+{ 0x0F12, 0x0023  },	//TVAR_ash_pGAS[527] //                                                                        
+{ 0x0F12, 0x0031  },	//TVAR_ash_pGAS[528] //                                                                        
+{ 0x0F12, 0x0050  },	//TVAR_ash_pGAS[529] //                                                                        
+{ 0x0F12, 0x007C  },	//TVAR_ash_pGAS[530] //                                                                        
+{ 0x0F12, 0x00B1  },	//TVAR_ash_pGAS[531] //                                                                        
+{ 0x0F12, 0x00E9  },	//TVAR_ash_pGAS[532] //                                                                        
+{ 0x0F12, 0x00F2  },	//TVAR_ash_pGAS[533] //                                                                        
+{ 0x0F12, 0x00C0  },	//TVAR_ash_pGAS[534] //                                                                        
+{ 0x0F12, 0x0091  },	//TVAR_ash_pGAS[535] //                                                                        
+{ 0x0F12, 0x006A  },	//TVAR_ash_pGAS[536] //                                                                        
+{ 0x0F12, 0x0050  },	//TVAR_ash_pGAS[537] //                                                                        
+{ 0x0F12, 0x0041  },	//TVAR_ash_pGAS[538] //                                                                        
+{ 0x0F12, 0x003C  },	//TVAR_ash_pGAS[539] //                                                                        
+{ 0x0F12, 0x0040  },	//TVAR_ash_pGAS[540] //                                                                        
+{ 0x0F12, 0x004F  },	//TVAR_ash_pGAS[541] //                                                                        
+{ 0x0F12, 0x006D  },	//TVAR_ash_pGAS[542] //                                                                        
+{ 0x0F12, 0x0099  },	//TVAR_ash_pGAS[543] //                                                                        
+{ 0x0F12, 0x00C9  },	//TVAR_ash_pGAS[544] //                                                                        
+{ 0x0F12, 0x0102  },	//TVAR_ash_pGAS[545] //                                                                        
+{ 0x0F12, 0x0120  },	//TVAR_ash_pGAS[546] //                                                                        
+{ 0x0F12, 0x00EB  },	//TVAR_ash_pGAS[547] //                                                                        
+{ 0x0F12, 0x00BE  },	//TVAR_ash_pGAS[548] //                                                                        
+{ 0x0F12, 0x0099  },	//TVAR_ash_pGAS[549] //                                                                        
+{ 0x0F12, 0x0081  },	//TVAR_ash_pGAS[550] //                                                                        
+{ 0x0F12, 0x0074  },	//TVAR_ash_pGAS[551] //                                                                        
+{ 0x0F12, 0x006F  },	//TVAR_ash_pGAS[552] //                                                                        
+{ 0x0F12, 0x0071  },	//TVAR_ash_pGAS[553] //                                                                        
+{ 0x0F12, 0x0082  },	//TVAR_ash_pGAS[554] //                                                                        
+{ 0x0F12, 0x009B  },	//TVAR_ash_pGAS[555] //                                                                        
+{ 0x0F12, 0x00C0  },	//TVAR_ash_pGAS[556] //                                                                        
+{ 0x0F12, 0x00EE  },	//TVAR_ash_pGAS[557] //                                                                        
+{ 0x0F12, 0x0126  },	//TVAR_ash_pGAS[558] //                                                                        
+{ 0x0F12, 0x0147  },	//TVAR_ash_pGAS[559] //                                                                        
+{ 0x0F12, 0x0116  },	//TVAR_ash_pGAS[560] //                                                                        
+{ 0x0F12, 0x00E7  },	//TVAR_ash_pGAS[561] //                                                                        
+{ 0x0F12, 0x00C9  },	//TVAR_ash_pGAS[562] //                                                                        
+{ 0x0F12, 0x00B4  },	//TVAR_ash_pGAS[563] //                                                                        
+{ 0x0F12, 0x00A7  },	//TVAR_ash_pGAS[564] //                                                                        
+{ 0x0F12, 0x00A0  },	//TVAR_ash_pGAS[565] //                                                                        
+{ 0x0F12, 0x00A3  },	//TVAR_ash_pGAS[566] //                                                                        
+{ 0x0F12, 0x00B1  },	//TVAR_ash_pGAS[567] //                                                                        
+{ 0x0F12, 0x00C9  },	//TVAR_ash_pGAS[568] //                                                                        
+{ 0x0F12, 0x00EA  },	//TVAR_ash_pGAS[569] //                                                                        
+{ 0x0F12, 0x011B  },	//TVAR_ash_pGAS[570] //                                                                        
+{ 0x0F12, 0x0141  },	//TVAR_ash_pGAS[571] //                                                                        
+                        
+{ 0x002A, 0x074E  },	    
+{ 0x0F12, 0x0001  },	//ash_bLumaMode //         	                                                                        
+{ 0x002A, 0x0D30  },                               
+{ 0x0F12, 0x02A8  },	//awbb_GLocu //        
+{ 0x0F12, 0x0347  },	//awbb_GLocuSB //      
+                                                   
+{ 0x002A, 0x06B8  },                               
+{ 0x0F12, 0x00C0  },	//TVAR_ash_AwbashCord[0] //                                                                        
+{ 0x0F12, 0x00E0  },	//TVAR_ash_AwbashCord[1] //                                                                        
+{ 0x0F12, 0x0120  },	//TVAR_ash_AwbashCord[2] //                                                                        
+{ 0x0F12, 0x0124  },	//TVAR_ash_AwbashCord[3] //                                                                        
+{ 0x0F12, 0x0156  },	//TVAR_ash_AwbashCord[4] //                                                                        
+{ 0x0F12, 0x017F  },	//TVAR_ash_AwbashCord[5] //                                                                        
+{ 0x0F12, 0x018F  },	//TVAR_ash_AwbashCord[6] //                                                                        
+                                                   
+                                                   
+{ 0x002A, 0x0664  },                               
+{ 0x0F12, 0x013E  },	//seti_uContrastCenter //                                                                          
+                                                   
+                                                   
+{ 0x002A, 0x06C6  },                               
+{ 0x0F12, 0x010B  },	//ash_CGrasalphaS[0] //
+{ 0x0F12, 0x0103  },	//ash_CGrasalphaS[1] //
+{ 0x0F12, 0x00FC  },	//ash_CGrasalphaS[2] //
+{ 0x0F12, 0x010C  },	//ash_CGrasalphaS[3] //
+                        
+{ 0x002A, 0x0C48  },    
+{ 0x0F12, 0x03C8  },	//awbb_IndoorGrZones_m_BGrid[0] // 		                                                                        
+{ 0x0F12, 0x03DE  },	//awbb_IndoorGrZones_m_BGrid[1] //                                                                         
+{ 0x0F12, 0x0372  },	//awbb_IndoorGrZones_m_BGrid[2] //                                                                         
+{ 0x0F12, 0x03EA  },	//awbb_IndoorGrZones_m_BGrid[3] //                                                                         
+{ 0x0F12, 0x0336  },	//awbb_IndoorGrZones_m_BGrid[4] //                                                                         
+{ 0x0F12, 0x03DE  },	//awbb_IndoorGrZones_m_BGrid[5] //                                                                         
+{ 0x0F12, 0x0302  },	//awbb_IndoorGrZones_m_BGrid[6] //                                                                         
+{ 0x0F12, 0x03A2  },	//awbb_IndoorGrZones_m_BGrid[7] //                                                                         
+{ 0x0F12, 0x02C8  },	//awbb_IndoorGrZones_m_BGrid[8] //                                                                         
+{ 0x0F12, 0x0368  },	//awbb_IndoorGrZones_m_BGrid[9] //                                                                         
+{ 0x0F12, 0x0292  },	//awbb_IndoorGrZones_m_BGrid[10] //                                                                        
+{ 0x0F12, 0x033A  },	//awbb_IndoorGrZones_m_BGrid[11] //                                                                        
+{ 0x0F12, 0x0276  },	//awbb_IndoorGrZones_m_BGrid[12] //                                                                        
+{ 0x0F12, 0x0306  },	//awbb_IndoorGrZones_m_BGrid[13] //                                                                        
+{ 0x0F12, 0x025A  },	//awbb_IndoorGrZones_m_BGrid[14] //                                                                        
+{ 0x0F12, 0x02C2  },	//awbb_IndoorGrZones_m_BGrid[15] //                                                                        
+{ 0x0F12, 0x0246  },	//awbb_IndoorGrZones_m_BGrid[16] //                                                                        
+{ 0x0F12, 0x02A2  },	//awbb_IndoorGrZones_m_BGrid[17] //                                                                        
+{ 0x0F12, 0x0232  },	//awbb_IndoorGrZones_m_BGrid[18] //                                                                        
+{ 0x0F12, 0x0298  },	//awbb_IndoorGrZones_m_BGrid[19] //                                                                        
+{ 0x0F12, 0x021E  },	//awbb_IndoorGrZones_m_BGrid[20] //                                                                        
+{ 0x0F12, 0x027E  },	//awbb_IndoorGrZones_m_BGrid[21] //                                                                        
+{ 0x0F12, 0x0208  },	//awbb_IndoorGrZones_m_BGrid[22] //                                                                        
+{ 0x0F12, 0x026C  },	//awbb_IndoorGrZones_m_BGrid[23] //                                                                        
+{ 0x0F12, 0x01EE  },	//awbb_IndoorGrZones_m_BGrid[24] //                                                                        
+{ 0x0F12, 0x025C  },	//awbb_IndoorGrZones_m_BGrid[25] //                                                                        
+{ 0x0F12, 0x01F0  },	//awbb_IndoorGrZones_m_BGrid[26] //                                                                        
+{ 0x0F12, 0x0248  },	//awbb_IndoorGrZones_m_BGrid[27] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[28] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[29] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[30] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[31] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[32] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[33] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[34] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[35] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[36] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[37] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[38] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[39] //                                                                        
+                                                           
+{ 0x0F12, 0x0005  },   //awbb_IndoorGrZones_m_Gridstep //  
+
+{ 0x002A, 0x0C9C  },
+{ 0x0F12, 0x000E  },
+{ 0x002A, 0x0CA0  },                                       
+{ 0x0F12, 0x0108  },	//awbb_IndoorGrZones_m_Boffs //
+                                                           
+{ 0x002A, 0x0CE0  },                                       
+{ 0x0F12, 0x03D4  },	//awbb_LowBrGrZones_m_BGrid[0] //                                                                          
+{ 0x0F12, 0x043E  },	//awbb_LowBrGrZones_m_BGrid[1] //                                                                          
+{ 0x0F12, 0x035C  },	//awbb_LowBrGrZones_m_BGrid[2] //                                                                          
+{ 0x0F12, 0x0438  },	//awbb_LowBrGrZones_m_BGrid[3] //                                                                          
+{ 0x0F12, 0x02F0  },	//awbb_LowBrGrZones_m_BGrid[4] //                                                                          
+{ 0x0F12, 0x042D  },	//awbb_LowBrGrZones_m_BGrid[5] //                                                                          
+{ 0x0F12, 0x029A  },	//awbb_LowBrGrZones_m_BGrid[6] //                                                                          
+{ 0x0F12, 0x03EF  },	//awbb_LowBrGrZones_m_BGrid[7] //                                                                          
+{ 0x0F12, 0x025E  },	//awbb_LowBrGrZones_m_BGrid[8] //                                                                          
+{ 0x0F12, 0x0395  },	//awbb_LowBrGrZones_m_BGrid[9] //                                                                          
+{ 0x0F12, 0x022E  },	//awbb_LowBrGrZones_m_BGrid[10] //                                                                         
+{ 0x0F12, 0x0346  },	//awbb_LowBrGrZones_m_BGrid[11] //                                                                         
+{ 0x0F12, 0x0200  },	//awbb_LowBrGrZones_m_BGrid[12] //                                                                         
+{ 0x0F12, 0x02F6  },	//awbb_LowBrGrZones_m_BGrid[13] //                                                                         
+{ 0x0F12, 0x01CE  },	//awbb_LowBrGrZones_m_BGrid[14] //                                                                         
+{ 0x0F12, 0x02C8  },	//awbb_LowBrGrZones_m_BGrid[15] //                                                                         
+{ 0x0F12, 0x01BB  },	//awbb_LowBrGrZones_m_BGrid[16] //                                                                         
+{ 0x0F12, 0x0287  },	//awbb_LowBrGrZones_m_BGrid[17] //                                                                         
+{ 0x0F12, 0x01E2  },	//awbb_LowBrGrZones_m_BGrid[18] //                                                                         
+{ 0x0F12, 0x0239  },	//awbb_LowBrGrZones_m_BGrid[19] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[20] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[21] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[22] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[23] //                                                                         
+                        
+{ 0x0F12, 0x0006  },	//awbb_LowBrGrZones_m_Gridstep //	                                                                        
+{ 0x002A, 0x0D18  },                                     
+{ 0x0F12, 0x00AE  },	//awbb_LowBrGrZones_m_Boff //
+                        
+{ 0x002A, 0x0CA4  },    
+{ 0x0F12, 0x026E  },	//0294//0286//02C2//awbb_OutdoorGrZones_m_BGrid[0] // 		                                                                        
+{ 0x0F12, 0x02A4  },	//02CB//02BD//02E0//awbb_OutdoorGrZones_m_BGrid[1] //                                                                         
+{ 0x0F12, 0x0262  },	//027A//026C//0278//awbb_OutdoorGrZones_m_BGrid[2] //                                                                         
+{ 0x0F12, 0x02A8  },	//02D7//02C9//02BC//awbb_OutdoorGrZones_m_BGrid[3] //                                                                         
+{ 0x0F12, 0x0256  },	//0266//0258//025A//awbb_OutdoorGrZones_m_BGrid[4] //                                                                         
+{ 0x0F12, 0x02AE  },	//02BF//02B1//02A2//awbb_OutdoorGrZones_m_BGrid[5] //                                                                         
+{ 0x0F12, 0x0248  },	//0252//0244//024A//awbb_OutdoorGrZones_m_BGrid[6] //                                                                         
+{ 0x0F12, 0x02A4  },	//02A8//029A//0288//awbb_OutdoorGrZones_m_BGrid[7] //                                                                         
+{ 0x0F12, 0x023E  },	//023E//0230//0240//awbb_OutdoorGrZones_m_BGrid[8] //                                                                         
+{ 0x0F12, 0x029A  },	//028F//0281//0278//awbb_OutdoorGrZones_m_BGrid[9] //                                                                         
+{ 0x0F12, 0x023A  },	//0239//022B//023E//awbb_OutdoorGrZones_m_BGrid[10] //                                                                        
+{ 0x0F12, 0x0290  },	//027A//026C//0254//awbb_OutdoorGrZones_m_BGrid[11] //                                                                        
+{ 0x0F12, 0x023A  },	//024A//023C//0000//awbb_OutdoorGrZones_m_BGrid[12] //                                                                        
+{ 0x0F12, 0x027E  },	//0260//0252//0000//awbb_OutdoorGrZones_m_BGrid[13] //                                                                        
+{ 0x0F12, 0x0244  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[14] //                                                                        
+{ 0x0F12, 0x0266  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[15] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[16] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[17] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[18] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[19] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[20] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[21] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[22] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[23] //                                                                        
+                  
+{ 0x0F12, 0x0004  },	//awbb_OutdoorGrZones_m_Gridstep //               
+{ 0x002A, 0x0CD8  },
+{ 0x0F12, 0x0008  },
+{ 0x002A, 0x0CDC  },                                                          
+{ 0x0F12, 0x0204  },	//awbb_OutdoorGrZones_m_Boff //                   
+{ 0x002A, 0x0D1C  },                                                          
+{ 0x0F12, 0x037C  },	//awbb_CrclLowT_R_c //                            
+{ 0x002A, 0x0D20  },                                                          
+{ 0x0F12, 0x0157  },	//awbb_CrclLowT_B_c //                            
+{ 0x002A, 0x0D24  },                                                          
+{ 0x0F12, 0x3EB8  },	//awbb_CrclLowT_Rad_c //                          
+                        
+{ 0x002A, 0x0D2C  },    
+{ 0x0F12, 0x013D  },	//awbb_IntcR //	                                                                        
+{ 0x0F12, 0x011E  },	//awbb_IntcB //                                                                        
+{ 0x002A, 0x0D46  },    
+{ 0x0F12, 0x04C0  },	//0554//055D//0396//04A2//awbb_MvEq_RBthresh //	                                                                        
+                        
+                        
+                        
+{ 0x002A, 0x0D28  },    //wp outdoor
+{ 0x0F12, 0x0270  },	                                                                        
+{ 0x0F12, 0x0240  },	                                                                        
+                        
+                  
+{ 0x002A, 0x0D5C  },    
+{ 0x0F12, 0x7FFF  },	                                                                        
+{ 0x0F12, 0x0050  },	                                                                        
+                        
+{ 0x002A, 0x2316  },    
+{ 0x0F12, 0x0006  },	                                                                        
+                        
+{ 0x002A, 0x0E44  },    
+{ 0x0F12, 0x0525  },	                                                                        
+{ 0x0F12, 0x0400  },	                                                                        
+{ 0x0F12, 0x078C  },	                                                                        
+                        
+{ 0x002A, 0x0E36  },    
+{ 0x0F12, 0x0028  },	 //R OFFSET                                                                       
+{ 0x0F12, 0xFFD8  },	 //B OFFSET                                                                       
+{ 0x0F12, 0x0000  },	 //G OFFSET                                                                       
+                        
+{ 0x002A, 0x0DD4  },    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[0] //        	                                                                        
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[1] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[2] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[3] //    
+{ 0x0F12, 0xFFF0  },	//awbb_GridCorr_R[4] //    
+{ 0x0F12, 0x0080  },	//awbb_GridCorr_R[5] //    
+                   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[6] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[7] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[8] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[9] //    
+{ 0x0F12, 0xFFF0  },	//awbb_GridCorr_R[10] //   
+{ 0x0F12, 0x0080  },	//awbb_GridCorr_R[11] //   
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[12] //   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[13] //   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[14] //   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[15] //   
+{ 0x0F12, 0xFFF0  },	//awbb_GridCorr_R[16] //   
+{ 0x0F12, 0x0080  },	//awbb_GridCorr_R[17] //   
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[0] ////                                                                        
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[1] //                                                                          
+{ 0x0F12, 0x0032  },	//awbb_GridCorr_B[2] //                                                                          
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[3] //                                                                          
+{ 0x0F12, 0x0020  },	//awbb_GridCorr_B[4] //                                                                          
+{ 0x0F12, 0xFFC0  },	//awbb_GridCorr_B[5] //                                                                          
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[6] //                                                                          
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[7] //                                                                          
+{ 0x0F12, 0x0032  },	//awbb_GridCorr_B[8] //                                                                          
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[9] //                                                                          
+{ 0x0F12, 0x0020  },	//awbb_GridCorr_B[10] //                                                                         
+{ 0x0F12, 0xFFC0  },	//awbb_GridCorr_B[11] //                                                                         
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[12] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[13] //                                                                         
+{ 0x0F12, 0x0032  },	//awbb_GridCorr_B[14] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[15] //                                                                         
+{ 0x0F12, 0x0020  },	//awbb_GridCorr_B[16] //   
+{ 0x0F12, 0xFFC0  },	//awbb_GridCorr_B[17] //                 
+                   
+{ 0x0F12, 0x02D9  },	//awbb_GridConst_1[0] //                                                                     
+{ 0x0F12, 0x0357  },	//awbb_GridConst_1[1] //                                                                     
+{ 0x0F12, 0x03D1  },	//awbb_GridConst_1[2] //                                                                     
+                   
+                   
+{ 0x0F12, 0x0DF6  },	//0E4F//0DE9//0DE9//awbb_GridConst_2[0] //                                                   
+{ 0x0F12, 0x0ED8  },	//0EDD//0EDD//0EDD//awbb_GridConst_2[1] //                                                   
+{ 0x0F12, 0x0F51  },	//0F42//0F42//0F42//awbb_GridConst_2[2] //                                                   
+{ 0x0F12, 0x0F5C  },	//0F4E//0F4E//0F54//awbb_GridConst_2[3] //                                                   
+{ 0x0F12, 0x0F8F  },	//0F99//0F99//0FAE//awbb_GridConst_2[4] //                                                   
+{ 0x0F12, 0x1006  },	//1006//1006//1011//awbb_GridConst_2[5] //                                                   
+                   
+{ 0x0F12, 0x00AC  },	//00BA//awbb_GridCoeff_R_1                                                                   
+{ 0x0F12, 0x00BD  },	//00AF//awbb_GridCoeff_B_1                                                                   
+{ 0x0F12, 0x0049  },	//0049//awbb_GridCoeff_R_2                                                                   
+{ 0x0F12, 0x00F5  },	//00F5//awbb_GridCoeff_B_2                                                                   
+                   
+{ 0x002A, 0x0E4A  },                         
+{ 0x0F12, 0x0002  },	//awbb_GridEnable//                                                                          
+                   
+{ 0x002A, 0x051A  },                         
+{ 0x0F12, 0x010E  },	//lt_uLimitHigh//
+{ 0x0F12, 0x00F5  },	//lt_uLimitLow// 
+                   
+                   
+{ 0x002A, 0x0F76  },                         
+{ 0x0F12, 0x0007  },	//ae_statmode BLC off : 0x0F, on : 0x0D//  illumType On : 07 , Off : 0F
+                   
+{ 0x002A, 0x1034  },                         
+{ 0x0F12, 0x00C0  },	//saRR_IllumType[0] //                                                                       
+{ 0x0F12, 0x00E0  },	//saRR_IllumType[1] //                                                                       
+{ 0x0F12, 0x0104  },	//saRR_IllumType[2] //                                                                       
+{ 0x0F12, 0x0129  },	//saRR_IllumType[3] //                                                                       
+{ 0x0F12, 0x0156  },	//saRR_IllumType[4] //                                                                       
+{ 0x0F12, 0x017F  },	//saRR_IllumType[5] //                                                                       
+{ 0x0F12, 0x018F  },	//saRR_IllumType[6] //                                                                       
+                   
+                   
+{ 0x0F12, 0x0120  },	//saRR_IllumTypeF[0] //                                                                      
+{ 0x0F12, 0x0120  },	//saRR_IllumTypeF[1] //                                                                      
+{ 0x0F12, 0x0120  },	//saRR_IllumTypeF[2] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[3] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[4] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[5] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[6] //                                                                      
+                        
+                        
+                        
+{ 0x002A, 0x3288  },	//saRR_usDualGammaLutRGBIndoor  //               	                                                                        
+{ 0x0F12, 0x0000  }, //	saRR_usDualGammaLutRGBIndoor[0] //[0] //                                                 
+{ 0x0F12, 0x0008  }, //  saRR_usDualGammaLutRGBIndoor[0] //[1] //                                                       
+{ 0x0F12, 0x0013  }, //  saRR_usDualGammaLutRGBIndoor[0] //[2] //                                                       
+{ 0x0F12, 0x002C  }, //  saRR_usDualGammaLutRGBIndoor[0] //[3] //                                                       
+{ 0x0F12, 0x0062  }, //  saRR_usDualGammaLutRGBIndoor[0] //[4] //                                                       
+{ 0x0F12, 0x00CD  }, //  saRR_usDualGammaLutRGBIndoor[0] //[5] //                                                       
+{ 0x0F12, 0x0129  }, //  saRR_usDualGammaLutRGBIndoor[0] //[6] //                                                       
+{ 0x0F12, 0x0151  }, //  saRR_usDualGammaLutRGBIndoor[0] //[7] //                                                       
+{ 0x0F12, 0x0174  }, //  saRR_usDualGammaLutRGBIndoor[0] //[8] //                                                       
+{ 0x0F12, 0x01AA  }, //  saRR_usDualGammaLutRGBIndoor[0] //[9] //                                                       
+{ 0x0F12, 0x01D7  }, //  saRR_usDualGammaLutRGBIndoor[0] //[10] //                                                      
+{ 0x0F12, 0x01FE  }, //  saRR_usDualGammaLutRGBIndoor[0] //[11] //                                                      
+{ 0x0F12, 0x0221  }, //  saRR_usDualGammaLutRGBIndoor[0] //[12] //                                                      
+{ 0x0F12, 0x025D  }, //  saRR_usDualGammaLutRGBIndoor[0] //[13] //                                                      
+{ 0x0F12, 0x0291  }, //  saRR_usDualGammaLutRGBIndoor[0] //[14] //                                                      
+{ 0x0F12, 0x02EB  }, //  saRR_usDualGammaLutRGBIndoor[0] //[15] //                                                      
+{ 0x0F12, 0x033A  }, //  saRR_usDualGammaLutRGBIndoor[0] //[16] //                                                      
+{ 0x0F12, 0x0380  }, //  saRR_usDualGammaLutRGBIndoor[0] //[17] //                                                      
+{ 0x0F12, 0x03C2  }, //  saRR_usDualGammaLutRGBIndoor[0] //[18] //                                                      
+{ 0x0F12, 0x03FF  }, //  saRR_usDualGammaLutRGBIndoor[0] //[19] //                                                      
+{ 0x0F12, 0x0000  }, //  saRR_usDualGammaLutRGBIndoor[1] //[0] //                                                       
+{ 0x0F12, 0x0008  }, //  saRR_usDualGammaLutRGBIndoor[1] //[1] //                                                       
+{ 0x0F12, 0x0013  }, //  saRR_usDualGammaLutRGBIndoor[1] //[2] //                                                       
+{ 0x0F12, 0x002C  }, //  saRR_usDualGammaLutRGBIndoor[1] //[3] //                                                       
+{ 0x0F12, 0x0062  }, //  saRR_usDualGammaLutRGBIndoor[1] //[4] //                                                       
+{ 0x0F12, 0x00CD  }, //  saRR_usDualGammaLutRGBIndoor[1] //[5] //                                                       
+{ 0x0F12, 0x0129  }, //  saRR_usDualGammaLutRGBIndoor[1] //[6] //                                                       
+{ 0x0F12, 0x0151  }, //  saRR_usDualGammaLutRGBIndoor[1] //[7] //                                                       
+{ 0x0F12, 0x0174  }, //  saRR_usDualGammaLutRGBIndoor[1] //[8] //                                                       
+{ 0x0F12, 0x01AA  }, //  saRR_usDualGammaLutRGBIndoor[1] //[9] //                                                       
+{ 0x0F12, 0x01D7  }, //  saRR_usDualGammaLutRGBIndoor[1] //[10] //                                                      
+{ 0x0F12, 0x01FE  }, //  saRR_usDualGammaLutRGBIndoor[1] //[11] //                                                      
+{ 0x0F12, 0x0221  }, //  saRR_usDualGammaLutRGBIndoor[1] //[12] //                                                      
+{ 0x0F12, 0x025D  }, //  saRR_usDualGammaLutRGBIndoor[1] //[13] //                                                      
+{ 0x0F12, 0x0291  }, //  saRR_usDualGammaLutRGBIndoor[1] //[14] //                                                      
+{ 0x0F12, 0x02EB  }, //  saRR_usDualGammaLutRGBIndoor[1] //[15] //                                                      
+{ 0x0F12, 0x033A  }, //  saRR_usDualGammaLutRGBIndoor[1] //[16] //                                                      
+{ 0x0F12, 0x0380  }, //  saRR_usDualGammaLutRGBIndoor[1] //[17] //                                                      
+{ 0x0F12, 0x03C2  }, //  saRR_usDualGammaLutRGBIndoor[1] //[18] //                                                      
+{ 0x0F12, 0x03FF  }, //  saRR_usDualGammaLutRGBIndoor[1] //[19] //                                                      
+{ 0x0F12, 0x0000  }, //  saRR_usDualGammaLutRGBIndoor[2] //[0] //                                                       
+{ 0x0F12, 0x0008  }, //  saRR_usDualGammaLutRGBIndoor[2] //[1] //                                                       
+{ 0x0F12, 0x0013  }, //  saRR_usDualGammaLutRGBIndoor[2] //[2] //                                                       
+{ 0x0F12, 0x002C  }, //  saRR_usDualGammaLutRGBIndoor[2] //[3] //                                                       
+{ 0x0F12, 0x0062  }, //  saRR_usDualGammaLutRGBIndoor[2] //[4] //                                                       
+{ 0x0F12, 0x00CD  }, //  saRR_usDualGammaLutRGBIndoor[2] //[5] //                                                       
+{ 0x0F12, 0x0129  }, //  saRR_usDualGammaLutRGBIndoor[2] //[6] //                                                       
+{ 0x0F12, 0x0151  }, //  saRR_usDualGammaLutRGBIndoor[2] //[7] //                                                       
+{ 0x0F12, 0x0174  }, //  saRR_usDualGammaLutRGBIndoor[2] //[8] //                                                       
+{ 0x0F12, 0x01AA  }, //  saRR_usDualGammaLutRGBIndoor[2] //[9] //                                                       
+{ 0x0F12, 0x01D7  }, //  saRR_usDualGammaLutRGBIndoor[2] //[10] //                                                      
+{ 0x0F12, 0x01FE  }, //  saRR_usDualGammaLutRGBIndoor[2] //[11] //                                                      
+{ 0x0F12, 0x0221  }, //  saRR_usDualGammaLutRGBIndoor[2] //[12] //                                                      
+{ 0x0F12, 0x025D  }, //  saRR_usDualGammaLutRGBIndoor[2] //[13] //                                                      
+{ 0x0F12, 0x0291  }, //  saRR_usDualGammaLutRGBIndoor[2] //[14] //                                                      
+{ 0x0F12, 0x02EB  }, //  saRR_usDualGammaLutRGBIndoor[2] //[15] //                                                      
+{ 0x0F12, 0x033A  }, //  saRR_usDualGammaLutRGBIndoor[2] //[16] //                                                      
+{ 0x0F12, 0x0380  }, //  saRR_usDualGammaLutRGBIndoor[2] //[17] //                                                      
+{ 0x0F12, 0x03C2  }, //  saRR_usDualGammaLutRGBIndoor[2] //[18] //                                                      
+{ 0x0F12, 0x03FF  }, //  saRR_usDualGammaLutRGBIndoor[2] //[19] //                                                      
+                                               
+                                               
+{ 0x0F12, 0x0000  },	//			saRR_usDualGammaLutRGBOutdoor[0] //[0] //
+{ 0x0F12, 0x0008  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[1] //                                                
+{ 0x0F12, 0x0013  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[2] //                                                
+{ 0x0F12, 0x002C  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[3] //                                                
+{ 0x0F12, 0x0062  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[4] //                                                
+{ 0x0F12, 0x00CD  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[5] //                                                
+{ 0x0F12, 0x0129  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[6] //                                                
+{ 0x0F12, 0x0151  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[7] //                                                
+{ 0x0F12, 0x0174  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[8] //                                                
+{ 0x0F12, 0x01AA  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[9] //                                                
+{ 0x0F12, 0x01D7  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[10] //                                               
+{ 0x0F12, 0x01FE  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[11] //                                               
+{ 0x0F12, 0x0221  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[12] //                                               
+{ 0x0F12, 0x025D  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[13] //                                               
+{ 0x0F12, 0x0291  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[14] //                                               
+{ 0x0F12, 0x02EB  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[15] //                                               
+{ 0x0F12, 0x033A  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[16] //                                               
+{ 0x0F12, 0x0380  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[17] //                                               
+{ 0x0F12, 0x03C2  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[18] //                                               
+{ 0x0F12, 0x03FF  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[19] //                                               
+{ 0x0F12, 0x0000  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[0] //                                                
+{ 0x0F12, 0x0008  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[1] //                                                
+{ 0x0F12, 0x0013  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[2] //                                                
+{ 0x0F12, 0x002C  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[3] //                                                
+{ 0x0F12, 0x0062  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[4] //                                                
+{ 0x0F12, 0x00CD  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[5] //                                                
+{ 0x0F12, 0x0129  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[6] //                                                
+{ 0x0F12, 0x0151  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[7] //                                                
+{ 0x0F12, 0x0174  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[8] //                                                
+{ 0x0F12, 0x01AA  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[9] //                                                
+{ 0x0F12, 0x01D7  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[10] //                                               
+{ 0x0F12, 0x01FE  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[11] //                                               
+{ 0x0F12, 0x0221  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[12] //                                               
+{ 0x0F12, 0x025D  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[13] //                                               
+{ 0x0F12, 0x0291  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[14] //                                               
+{ 0x0F12, 0x02EB  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[15] //                                               
+{ 0x0F12, 0x033A  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[16] //                                               
+{ 0x0F12, 0x0380  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[17] //                                               
+{ 0x0F12, 0x03C2  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[18] //                                               
+{ 0x0F12, 0x03FF  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[19] //                                               
+{ 0x0F12, 0x0000  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[0] //                                                
+{ 0x0F12, 0x0008  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[1] //                                                
+{ 0x0F12, 0x0013  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[2] //                                                
+{ 0x0F12, 0x002C  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[3] //                                                
+{ 0x0F12, 0x0062  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[4] //                                                
+{ 0x0F12, 0x00CD  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[5] //                                                
+{ 0x0F12, 0x0129  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[6] //                                                
+{ 0x0F12, 0x0151  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[7] //                                                
+{ 0x0F12, 0x0174  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[8] //                                                
+{ 0x0F12, 0x01AA  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[9] //                                                
+{ 0x0F12, 0x01D7  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[10] //                                               
+{ 0x0F12, 0x01FE  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[11] //                                               
+{ 0x0F12, 0x0221  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[12] //                                               
+{ 0x0F12, 0x025D  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[13] //                                               
+{ 0x0F12, 0x0291  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[14] //                                               
+{ 0x0F12, 0x02EB  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[15] //                                               
+{ 0x0F12, 0x033A  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[16] //                                               
+{ 0x0F12, 0x0380  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[17] //                                               
+{ 0x0F12, 0x03C2  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[18] //                                               
+{ 0x0F12, 0x03FF  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[19] //                                               
+                                               
+                                               
+{ 0x002A, 0x06A6  },                           
+{ 0x0F12, 0x00C0  },	//saRR_AwbCcmCord[0] //                      
+{ 0x0F12, 0x00E0  },	//saRR_AwbCcmCord[1] //                      
+{ 0x0F12, 0x0110  },	//saRR_AwbCcmCord[2] //                      
+{ 0x0F12, 0x0139  },	//saRR_AwbCcmCord[3] //                      
+{ 0x0F12, 0x0166  },	//saRR_AwbCcmCord[4] //                      
+{ 0x0F12, 0x019F  },	//saRR_AwbCcmCord[5] //                      
+                        
+{ 0x002A, 0x33A4  },    
+{ 0x0F12, 0x0181  },	  //TVAR_wbt_pBaseCcmS[0] //                                                           
+{ 0x0F12, 0xFF88  },   //TVAR_wbt_pBaseCcmS[1] //                                                        
+{ 0x0F12, 0xFF90  },   //TVAR_wbt_pBaseCcmS[2] //                                                        
+{ 0x0F12, 0xFE6B  },   //TVAR_wbt_pBaseCcmS[3] //                                                        
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[4] //                                                        
+{ 0x0F12, 0xFF0B  },   //TVAR_wbt_pBaseCcmS[5] //                                                        
+{ 0x0F12, 0xFFDD  },   //TVAR_wbt_pBaseCcmS[6] //                                                        
+{ 0x0F12, 0xFFEE  },   //TVAR_wbt_pBaseCcmS[7] //                                                        
+{ 0x0F12, 0x01CB  },   //TVAR_wbt_pBaseCcmS[8] //                                                        
+{ 0x0F12, 0x0187  },   //TVAR_wbt_pBaseCcmS[9] //                                                        
+{ 0x0F12, 0x00A6  },   //TVAR_wbt_pBaseCcmS[10] //                                                       
+{ 0x0F12, 0xFEBE  },   //TVAR_wbt_pBaseCcmS[11] //                                                       
+{ 0x0F12, 0x021C  },   //TVAR_wbt_pBaseCcmS[12] //                                                       
+{ 0x0F12, 0xFF5F  },   //TVAR_wbt_pBaseCcmS[13] //                                                       
+{ 0x0F12, 0x0175  },   //TVAR_wbt_pBaseCcmS[14] //                                                       
+{ 0x0F12, 0xFEE7  },   //TVAR_wbt_pBaseCcmS[15] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[16] //                                                       
+{ 0x0F12, 0x00F3  },   //TVAR_wbt_pBaseCcmS[17] //                                                       
+                       
+{ 0x0F12, 0x0181  },   //TVAR_wbt_pBaseCcmS[18] //                                                       
+{ 0x0F12, 0xFF88  },   //TVAR_wbt_pBaseCcmS[19] //                                                       
+{ 0x0F12, 0xFF90  },   //TVAR_wbt_pBaseCcmS[20] //                                                       
+{ 0x0F12, 0xFE6B  },   //TVAR_wbt_pBaseCcmS[21] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[22] //                                                       
+{ 0x0F12, 0xFF0B  },   //TVAR_wbt_pBaseCcmS[23] //                                                       
+{ 0x0F12, 0xFFDD  },   //TVAR_wbt_pBaseCcmS[24] //                                                       
+{ 0x0F12, 0xFFEE  },   //TVAR_wbt_pBaseCcmS[25] //                                                       
+{ 0x0F12, 0x01CB  },   //TVAR_wbt_pBaseCcmS[26] //                                                       
+{ 0x0F12, 0x0187  },   //TVAR_wbt_pBaseCcmS[27] //                                                       
+{ 0x0F12, 0x00A6  },   //TVAR_wbt_pBaseCcmS[28] //                                                       
+{ 0x0F12, 0xFEBE  },   //TVAR_wbt_pBaseCcmS[29] //                                                       
+{ 0x0F12, 0x021C  },   //TVAR_wbt_pBaseCcmS[30] //                                                       
+{ 0x0F12, 0xFF5F  },   //TVAR_wbt_pBaseCcmS[31] //                                                       
+{ 0x0F12, 0x0175  },   //TVAR_wbt_pBaseCcmS[32] //                                                       
+{ 0x0F12, 0xFEE7  },   //TVAR_wbt_pBaseCcmS[33] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[34] //                                                       
+{ 0x0F12, 0x00F3  },   //TVAR_wbt_pBaseCcmS[35] //                                                       
+                       
+{ 0x0F12, 0x0181  },   //TVAR_wbt_pBaseCcmS[36] //                                                       
+{ 0x0F12, 0xFF88  },   //TVAR_wbt_pBaseCcmS[37] //                                                       
+{ 0x0F12, 0xFF90  },   //TVAR_wbt_pBaseCcmS[38] //                                                       
+{ 0x0F12, 0xFE6B  },   //TVAR_wbt_pBaseCcmS[39] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[40] //                                                       
+{ 0x0F12, 0xFF0B  },   //TVAR_wbt_pBaseCcmS[41] //                                                       
+{ 0x0F12, 0xFFDD  },   //TVAR_wbt_pBaseCcmS[42] //                                                       
+{ 0x0F12, 0xFFEE  },   //TVAR_wbt_pBaseCcmS[43] //                                                       
+{ 0x0F12, 0x01CB  },   //TVAR_wbt_pBaseCcmS[44] //                                                       
+{ 0x0F12, 0x0187  },   //TVAR_wbt_pBaseCcmS[45] //                                                       
+{ 0x0F12, 0x00A6  },   //TVAR_wbt_pBaseCcmS[46] //                                                       
+{ 0x0F12, 0xFEBE  },   //TVAR_wbt_pBaseCcmS[47] //                                                       
+{ 0x0F12, 0x021C  },   //TVAR_wbt_pBaseCcmS[48] //                                                       
+{ 0x0F12, 0xFF5F  },   //TVAR_wbt_pBaseCcmS[49] //                                                       
+{ 0x0F12, 0x0175  },   //TVAR_wbt_pBaseCcmS[50] //                                                       
+{ 0x0F12, 0xFEE7  },   //TVAR_wbt_pBaseCcmS[51] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[52] //                                                       
+{ 0x0F12, 0x00F3  },   //TVAR_wbt_pBaseCcmS[53] //                                                                        
+                       
+{ 0x0F12, 0x01D4  },  //01E9 01FD 01FA   //TVAR_wbt_pBaseCcmS[54] //                                                       
+{ 0x0F12, 0xFFC3  },  //FFB7 FFAB FF9B   //TVAR_wbt_pBaseCcmS[55] //                                                       
+{ 0x0F12, 0xFFFE  },  //FFF5 FFED FFFF   //TVAR_wbt_pBaseCcmS[56] //                                                       
+{ 0x0F12, 0xFEB5  },  //FEB5 FEB5 FE9F   //TVAR_wbt_pBaseCcmS[57] //                                                       
+{ 0x0F12, 0x0112  },  //0112 0112 010F   //TVAR_wbt_pBaseCcmS[58] //                                                       
+{ 0x0F12, 0xFEDC  },  //FEDC FEDC FEF5   //TVAR_wbt_pBaseCcmS[59] //                                                       
+{ 0x0F12, 0xFFD2  },  //FFD2 FFD2 FFD2   //TVAR_wbt_pBaseCcmS[60] //                                                       
+{ 0x0F12, 0x0015  },  //0015 0015 0015   //TVAR_wbt_pBaseCcmS[61] //                                                       
+{ 0x0F12, 0x01A1  },  //01A1 01A1 01A1   //TVAR_wbt_pBaseCcmS[62] //                                                       
+{ 0x0F12, 0x0111  },  //0111 0111 0111   //TVAR_wbt_pBaseCcmS[63] //                                                       
+{ 0x0F12, 0x009D  },  //009D 009D 009D   //TVAR_wbt_pBaseCcmS[64] //                                                       
+{ 0x0F12, 0xFECB  },  //FECB FECB FECB   //TVAR_wbt_pBaseCcmS[65] //                                                       
+{ 0x0F12, 0x01FC  },  //01FC 01FC 01FC   //TVAR_wbt_pBaseCcmS[66] //                                                       
+{ 0x0F12, 0xFF99  },  //FF99 FF99 FF99   //TVAR_wbt_pBaseCcmS[67] //                                                       
+{ 0x0F12, 0x01A9  },  //01A9 01A9 01A9   //TVAR_wbt_pBaseCcmS[68] //                                                       
+{ 0x0F12, 0xFF26  },  //FF26 FF26 FF26   //TVAR_wbt_pBaseCcmS[69] //                                                       
+{ 0x0F12, 0x012B  },  //012B 012B 012B   //TVAR_wbt_pBaseCcmS[70] //                                                       
+{ 0x0F12, 0x00DF  },  //00DF 00DF 00DF   //TVAR_wbt_pBaseCcmS[71] //    
+                           
+{ 0x0F12, 0x01B9  },  //01CE 01E3 01E2   //TVAR_wbt_pBaseCcmS[72] //                                                 
+{ 0x0F12, 0xFFBC  },  //FFB0 FFA4 FF9A   //TVAR_wbt_pBaseCcmS[73] //                                                 
+{ 0x0F12, 0xFFED  },  //FFE4 FFDB FFE7   //TVAR_wbt_pBaseCcmS[74] //                                                 
+{ 0x0F12, 0xFEB5  },  //FEB5 FEB5 FE9F   //TVAR_wbt_pBaseCcmS[75] //                                                 
+{ 0x0F12, 0x0112  },  //0112 0112 010F   //TVAR_wbt_pBaseCcmS[76] //                                                 
+{ 0x0F12, 0xFEDC  },  //FEDC FEDC FEF5   //TVAR_wbt_pBaseCcmS[77] //                                                 
+{ 0x0F12, 0xFFD2  },  //FFD2 FFD2 FFD2   //TVAR_wbt_pBaseCcmS[78] //                                                 
+{ 0x0F12, 0xFFFE  },  //FFFE FFFE FFFE   //TVAR_wbt_pBaseCcmS[79] //                                                 
+{ 0x0F12, 0x01B7  },  //01B7 01B7 01B7   //TVAR_wbt_pBaseCcmS[80] //                                                 
+{ 0x0F12, 0x00E8  },  //00E8 00E8 00E8   //TVAR_wbt_pBaseCcmS[81] //                                                 
+{ 0x0F12, 0x0095  },  //0095 0095 0095   //TVAR_wbt_pBaseCcmS[82] //                                                 
+{ 0x0F12, 0xFF0D  },  //FF0D FF0D FF0D   //TVAR_wbt_pBaseCcmS[83] //                                                 
+{ 0x0F12, 0x0182  },  //0182 0182 0182   //TVAR_wbt_pBaseCcmS[84] //                                                 
+{ 0x0F12, 0xFF29  },  //FF29 FF29 FF29   //TVAR_wbt_pBaseCcmS[85] //                                                 
+{ 0x0F12, 0x0146  },  //0146 0146 0146   //TVAR_wbt_pBaseCcmS[86] //                                                 
+{ 0x0F12, 0xFF26  },  //FF26 FF26 FF26   //TVAR_wbt_pBaseCcmS[87] //                                                 
+{ 0x0F12, 0x012B  },  //012B 012B 012B   //TVAR_wbt_pBaseCcmS[88] //                                                 
+{ 0x0F12, 0x00DF  },  //00DF 00DF 00DF   //TVAR_wbt_pBaseCcmS[89] //                                                                         
+                  
+{ 0x0F12, 0x01B9  },  //01CE 01E3 01E2   //TVAR_wbt_pBaseCcmS[90] //                                                 
+{ 0x0F12, 0xFFBC  },  //FFB0 FFA4 FF9A   //TVAR_wbt_pBaseCcmS[91] //                                                 
+{ 0x0F12, 0xFFED  },  //FFE4 FFDB FFE7   //TVAR_wbt_pBaseCcmS[92] //                                                 
+{ 0x0F12, 0xFEB5  },  //FEB5 FEB5 FE9F   //TVAR_wbt_pBaseCcmS[93] //                                                 
+{ 0x0F12, 0x0112  },  //0112 0112 010F   //TVAR_wbt_pBaseCcmS[94] //                                                 
+{ 0x0F12, 0xFEDC  },  //FEDC FEDC FEF5   //TVAR_wbt_pBaseCcmS[95] //                                                 
+{ 0x0F12, 0xFFD2  },  //FFD2 FFD2 FFD2   //TVAR_wbt_pBaseCcmS[96] //                                                 
+{ 0x0F12, 0xFFFE  },  //FFFE FFFE FFFE   //TVAR_wbt_pBaseCcmS[97] //                                                 
+{ 0x0F12, 0x01B7  },  //01B7 01B7 01B7   //TVAR_wbt_pBaseCcmS[98] //                                                 
+{ 0x0F12, 0x00E8  },  //00E8 00E8 00E8   //TVAR_wbt_pBaseCcmS[99] //                                                 
+{ 0x0F12, 0x0095  },  //0095 0095 0095   //TVAR_wbt_pBaseCcmS[100] //                                                
+{ 0x0F12, 0xFF0D  },  //FF0D FF0D FF0D   //TVAR_wbt_pBaseCcmS[101] //                                                
+{ 0x0F12, 0x0182  },  //0182 0182 0182   //TVAR_wbt_pBaseCcmS[102] //                                                
+{ 0x0F12, 0xFF29  },  //FF29 FF29 FF29   //TVAR_wbt_pBaseCcmS[103] //                                                
+{ 0x0F12, 0x0146  },  //0146 0146 0146   //TVAR_wbt_pBaseCcmS[104] //                                                
+{ 0x0F12, 0xFF26  },  //FF26 FF26 FF26   //TVAR_wbt_pBaseCcmS[105] //                                                
+{ 0x0F12, 0x012B  },  //012B 012B 012B   //TVAR_wbt_pBaseCcmS[106] //                                                
+{ 0x0F12, 0x00DF  },  //00DF 00DF 00DF   //TVAR_wbt_pBaseCcmS[107] //                                                
+                                          
+{ 0x002A, 0x3380  },  //12çŸ«å¼¥åˆ©     
+{ 0x0F12, 0x01E5  },  //01E5 020E 0223   //0223  //01F3  //01F3  //TVAR_wbt_pOutdoorCcm[0] //  
+{ 0x0F12, 0xFFA0  },  //FFA0 FF88 FF7C   //FF7C  //FFA4  //FFA4  //TVAR_wbt_pOutdoorCcm[1] //  
+{ 0x0F12, 0xFFDF  },  //FFDF FFCE FFC5   //FFC5  //FFE4  //FFE4  //TVAR_wbt_pOutdoorCcm[2] //  
+{ 0x0F12, 0xFE3D  },  //FE3D FE3D FE3D   //FE3D  //FE3D  //FE23  //TVAR_wbt_pOutdoorCcm[3] //  
+{ 0x0F12, 0x0158  },  //0158 0158 0158   //0158  //0158  //017D  //TVAR_wbt_pOutdoorCcm[4] //  
+{ 0x0F12, 0xFF03  },  //FF03 FF03 FF03   //FF03  //FF03  //FEF9  //TVAR_wbt_pOutdoorCcm[5] //  
+{ 0x0F12, 0xFFD2  },  //FFBB FF99 FF9F   //FF9F  //FF9F  //FF9F  //TVAR_wbt_pOutdoorCcm[6] //  
+{ 0x0F12, 0x0002  },  //FFF0 0018 0011   //0011  //0011  //0011  //TVAR_wbt_pOutdoorCcm[7] //  
+{ 0x0F12, 0x0211  },  //023A 0235 0237   //0237  //0237  //0237  //TVAR_wbt_pOutdoorCcm[8] //  
+{ 0x0F12, 0x00F6  },  //00EB 0101 00EB   //00D1  //012A  //0143  //TVAR_wbt_pOutdoorCcm[9] //  
+{ 0x0F12, 0x0120  },  //012A 0116 012A   //0125  //00CA  //00F6  //TVAR_wbt_pOutdoorCcm[10] // 
+{ 0x0F12, 0xFF01  },  //FF02 FF00 FF02   //FEF5  //FEF6  //FEB1  //TVAR_wbt_pOutdoorCcm[11] // 
+{ 0x0F12, 0x01A4  },  //01A4 01C5 01C5   //01C5  //01C5  //01C5  //TVAR_wbt_pOutdoorCcm[12] // 
+{ 0x0F12, 0xFF95  },  //FF95 FF80 FF80   //FF80  //FF80  //FF80  //TVAR_wbt_pOutdoorCcm[13] // 
+{ 0x0F12, 0x01A9  },  //01A9 019D 019D   //019D  //019D  //019D  //TVAR_wbt_pOutdoorCcm[14] // 
+{ 0x0F12, 0xFEA3  },  //FE7A FE7A FE7A   //FE7A  //FE7A  //FE7A  //TVAR_wbt_pOutdoorCcm[15] // 
+{ 0x0F12, 0x0164  },  //0179 0179 0179   //0179  //0179  //0179  //TVAR_wbt_pOutdoorCcm[16] // 
+{ 0x0F12, 0x0164  },  //0179 0179 0179   //0179  //0179  //0179  //TVAR_wbt_pOutdoorCcm[17] // 
+                      
+                           
+                           
+{ 0x002A, 0x0764  },       
+{ 0x0F12, 0x0049  },	//afit_uNoiseIndInDoor[0] //                                                                         
+{ 0x0F12, 0x005F  },	//afit_uNoiseIndInDoor[1] //                                                                         
+{ 0x0F12, 0x00CB  },	//afit_uNoiseIndInDoor[2] // 203//                                                                   
+{ 0x0F12, 0x01E0  },	//afit_uNoiseIndInDoor[3] // Indoor_NB below 1500 _Noise index 300-400d //                           
+{ 0x0F12, 0x0220  },	//afit_uNoiseIndInDoor[4] // DNP NB 4600 _ Noisenidex :560d-230h //                                  
+                           
+                           
+{ 0x002A, 0x07C4  },       
+{ 0x0F12, 0x0014  },	//700007C4 //TVAR_afit_pBaseValS[0] // AFIT16_BRIGHTNESS                                                                                  
+{ 0x0F12, 0x0000  },	//700007C6 //TVAR_afit_pBaseValS[1] // AFIT16_CONTRAST                                                                                    
+{ 0x0F12, 0x0014  },	//700007C8 //TVAR_afit_pBaseValS[2] // AFIT16_SATURATION                                                                                  
+{ 0x0F12, 0x0000  },	//700007CA //TVAR_afit_pBaseValS[3] // AFIT16_SHARP_BLUR                                                                                  
+{ 0x0F12, 0x0000  },	//700007CC //TVAR_afit_pBaseValS[4] // AFIT16_GLAMOUR                                                                                     
+{ 0x0F12, 0x00C1  },	//700007CE //TVAR_afit_pBaseValS[5] // AFIT16_sddd8a_edge_high                                                                            
+{ 0x0F12, 0x03FF  },	//700007D0 //TVAR_afit_pBaseValS[6] // AFIT16_Demosaicing_iSatVal                                                                         
+{ 0x0F12, 0x009C  },	//700007D2 //TVAR_afit_pBaseValS[7] // AFIT16_Sharpening_iReduceEdgeThresh                                                                
+{ 0x0F12, 0x0251  },	//700007D4 //TVAR_afit_pBaseValS[8] // AFIT16_demsharpmix1_iRGBOffset                                                                     
+{ 0x0F12, 0x03FF  },	//700007D6 //TVAR_afit_pBaseValS[9] // AFIT16_demsharpmix1_iDemClamp                                                                      
+{ 0x0F12, 0x000C  },	//700007D8 //TVAR_afit_pBaseValS[10] //AFIT16_demsharpmix1_iLowThreshold                                                                  
+{ 0x0F12, 0x0010  },	//700007DA //TVAR_afit_pBaseValS[11] //AFIT16_demsharpmix1_iHighThreshold                                                                 
+{ 0x0F12, 0x012C  },	//700007DC //TVAR_afit_pBaseValS[12] //AFIT16_demsharpmix1_iLowBright                                                                     
+{ 0x0F12, 0x03E8  },	//700007DE //TVAR_afit_pBaseValS[13] //AFIT16_demsharpmix1_iHighBright                                                                    
+{ 0x0F12, 0x0046  },	//700007E0 //TVAR_afit_pBaseValS[14] //AFIT16_demsharpmix1_iLowSat                                                                        
+{ 0x0F12, 0x005A  },	//700007E2 //TVAR_afit_pBaseValS[15] //AFIT16_demsharpmix1_iHighSat                                                                       
+{ 0x0F12, 0x0070  },	//700007E4 //TVAR_afit_pBaseValS[16] //AFIT16_demsharpmix1_iTune                                                                          
+{ 0x0F12, 0x0000  },	//700007E6 //TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0000  },	//700007E8 //TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh                                                                    
+{ 0x0F12, 0x01AA  },	//700007EA //TVAR_afit_pBaseValS[19] //AFIT16_demsharpmix1_iHystCenter                                                                    
+{ 0x0F12, 0x003C  },	//700007EC //TVAR_afit_pBaseValS[20] //AFIT16_YUV422_DENOISE_iUVLowThresh                                                                 
+{ 0x0F12, 0x003C  },	//700007EE //TVAR_afit_pBaseValS[21] //AFIT16_YUV422_DENOISE_iUVHighThresh                                                                
+{ 0x0F12, 0x0000  },	//700007F0 //TVAR_afit_pBaseValS[22] //AFIT16_YUV422_DENOISE_iYLowThresh                                                                  
+{ 0x0F12, 0x0000  },	//700007F2 //TVAR_afit_pBaseValS[23] //AFIT16_YUV422_DENOISE_iYHighThresh                                                                 
+{ 0x0F12, 0x003E  },	//700007F4 //TVAR_afit_pBaseValS[24] //AFIT16_Sharpening_iLowSharpClamp                                                                   
+{ 0x0F12, 0x0008  },	//700007F6 //TVAR_afit_pBaseValS[25] //AFIT16_Sharpening_iHighSharpClamp                                                                  
+{ 0x0F12, 0x003C  },	//700007F8 //TVAR_afit_pBaseValS[26] //AFIT16_Sharpening_iLowSharpClamp_Bin                                                               
+{ 0x0F12, 0x001E  },	//700007FA //TVAR_afit_pBaseValS[27] //AFIT16_Sharpening_iHighSharpClamp_Bin                                                              
+{ 0x0F12, 0x003C  },	//700007FC //TVAR_afit_pBaseValS[28] //AFIT16_Sharpening_iLowSharpClamp_sBin                                                              
+{ 0x0F12, 0x001E  },	//700007FE //TVAR_afit_pBaseValS[29] //AFIT16_Sharpening_iHighSharpClamp_sBin                                                             
+{ 0x0F12, 0x0A24  },	//70000800 //TVAR_afit_pBaseValS[30] //AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                     
+{ 0x0F12, 0x1701  },	//70000802 //TVAR_afit_pBaseValS[31] //AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                      
+{ 0x0F12, 0x0229  },	//70000804 //TVAR_afit_pBaseValS[32] //AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                            
+{ 0x0F12, 0x1403  },	//70000806 //TVAR_afit_pBaseValS[33] //AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                 
+{ 0x0F12, 0x0000  },	//70000808 //TVAR_afit_pBaseValS[34] //AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                               
+{ 0x0F12, 0x0000  },	//7000080A //TVAR_afit_pBaseValS[35] //AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                             
+{ 0x0F12, 0x0000  },	//7000080C //TVAR_afit_pBaseValS[36] //AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                              
+{ 0x0F12, 0x00FF  },	//7000080E //TVAR_afit_pBaseValS[37] //AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                       
+{ 0x0F12, 0x045A  },	//70000810 //TVAR_afit_pBaseValS[38] //AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                                
+{ 0x0F12, 0x1414  },	//70000812 //TVAR_afit_pBaseValS[39] //AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                  
+{ 0x0F12, 0x0301  },	//70000814 //TVAR_afit_pBaseValS[40] //AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                          
+{ 0x0F12, 0xFF07  },	//70000816 //TVAR_afit_pBaseValS[41] //AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                          
+{ 0x0F12, 0x081E  },	//70000818 //TVAR_afit_pBaseValS[42] //AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                     
+{ 0x0F12, 0x0A14  },	//7000081A //TVAR_afit_pBaseValS[43] //AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                        
+{ 0x0F12, 0x0F0F  },	//7000081C //TVAR_afit_pBaseValS[44] //AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                    
+{ 0x0F12, 0x0A00  },	//7000081E //TVAR_afit_pBaseValS[45] //AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                 
+{ 0x0F12, 0x0032  },	//70000820 //TVAR_afit_pBaseValS[46] //AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                             
+{ 0x0F12, 0x000E  },	//70000822 //TVAR_afit_pBaseValS[47] //AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                             
+{ 0x0F12, 0x0002  },	//70000824 //TVAR_afit_pBaseValS[48] //AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                      
+{ 0x0F12, 0x00FF  },	//70000826 //TVAR_afit_pBaseValS[49] //AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                     
+{ 0x0F12, 0x1102  },	//70000828 //TVAR_afit_pBaseValS[50] //AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                          
+{ 0x0F12, 0x001B  },	//7000082A //TVAR_afit_pBaseValS[51] //AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                            
+{ 0x0F12, 0x0900  },	//7000082C //TVAR_afit_pBaseValS[52] //AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                       
+{ 0x0F12, 0x0600  },	//7000082E //TVAR_afit_pBaseValS[53] //AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                      
+{ 0x0F12, 0x0504  },	//70000830 //TVAR_afit_pBaseValS[54] //AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                   
+{ 0x0F12, 0x0306  },	//70000832 //TVAR_afit_pBaseValS[55] //AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                      
+{ 0x0F12, 0x4603  },	//70000834 //TVAR_afit_pBaseValS[56] //AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                       
+{ 0x0F12, 0x0480  },	//70000836 //TVAR_afit_pBaseValS[57] //AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                              
+{ 0x0F12, 0x003C  },	//70000838 //TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                  
+{ 0x0F12, 0x0080  },	//7000083A //TVAR_afit_pBaseValS[59] //AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                   
+{ 0x0F12, 0x0101  },	//7000083C //TVAR_afit_pBaseValS[60] //AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                             
+{ 0x0F12, 0x0707  },	//7000083E //TVAR_afit_pBaseValS[61] //AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                                
+{ 0x0F12, 0x4601  },	//70000840 //TVAR_afit_pBaseValS[62] //AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                 
+{ 0x0F12, 0x4944  },	//70000842 //TVAR_afit_pBaseValS[63] //AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                                
+{ 0x0F12, 0x5044  },	//70000844 //TVAR_afit_pBaseValS[64] //AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                            
+{ 0x0F12, 0x0500  },	//70000846 //TVAR_afit_pBaseValS[65] //AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]             
+{ 0x0F12, 0x0003  },	//70000848 //TVAR_afit_pBaseValS[66] //AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                   
+{ 0x0F12, 0x5400  },	//7000084A //TVAR_afit_pBaseValS[67] //AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                 
+{ 0x0F12, 0x0714  },	//7000084C //TVAR_afit_pBaseValS[68] //AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]           
+{ 0x0F12, 0x32FF  },	//7000084E //TVAR_afit_pBaseValS[69] //AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                        
+{ 0x0F12, 0x5A04  },	//70000850 //TVAR_afit_pBaseValS[70] //AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                     
+{ 0x0F12, 0x201E  },	//70000852 //TVAR_afit_pBaseValS[71] //AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                     
+{ 0x0F12, 0x4012  },	//70000854 //TVAR_afit_pBaseValS[72] //AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]                
+{ 0x0F12, 0x0204  },	//70000856 //TVAR_afit_pBaseValS[73] //AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]                
+{ 0x0F12, 0x1403  },	//70000858 //TVAR_afit_pBaseValS[74] //AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                  
+{ 0x0F12, 0x0114  },	//7000085A //TVAR_afit_pBaseValS[75] //AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                      
+{ 0x0F12, 0x0101  },	//7000085C //TVAR_afit_pBaseValS[76] //AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                       
+{ 0x0F12, 0x4446  },	//7000085E //TVAR_afit_pBaseValS[77] //AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                           
+{ 0x0F12, 0x646E  },	//70000860 //TVAR_afit_pBaseValS[78] //AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                     
+{ 0x0F12, 0x0028  },	//70000862 //TVAR_afit_pBaseValS[79] //AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]             
+{ 0x0F12, 0x030A  },	//70000864 //TVAR_afit_pBaseValS[80] //AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]       
+{ 0x0F12, 0x0000  },	//70000866 //TVAR_afit_pBaseValS[81] //AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]          
+{ 0x0F12, 0x141E  },	//70000868 //TVAR_afit_pBaseValS[82] //AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]          
+{ 0x0F12, 0xFF07  },	//7000086A //TVAR_afit_pBaseValS[83] //AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]       
+{ 0x0F12, 0x0432  },	//7000086C //TVAR_afit_pBaseValS[84] //AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]              
+{ 0x0F12, 0x0000  },	//7000086E //TVAR_afit_pBaseValS[85] //AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]            
+{ 0x0F12, 0x0F0F  },	//70000870 //TVAR_afit_pBaseValS[86] //AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]              
+{ 0x0F12, 0x0440  },	//70000872 //TVAR_afit_pBaseValS[87] //AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]       
+{ 0x0F12, 0x0302  },	//70000874 //TVAR_afit_pBaseValS[88] //AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]       
+{ 0x0F12, 0x1414  },	//70000876 //TVAR_afit_pBaseValS[89] //AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                   
+{ 0x0F12, 0x0101  },	//70000878 //TVAR_afit_pBaseValS[90] //AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                      
+{ 0x0F12, 0x4601  },	//7000087A //TVAR_afit_pBaseValS[91] //AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                       
+{ 0x0F12, 0x6E44  },	//7000087C //TVAR_afit_pBaseValS[92] //AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                      
+{ 0x0F12, 0x2864  },	//7000087E //TVAR_afit_pBaseValS[93] //AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                  
+{ 0x0F12, 0x0A00  },	//70000880 //TVAR_afit_pBaseValS[94] //AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]    
+{ 0x0F12, 0x0003  },	//70000882 //TVAR_afit_pBaseValS[95] //AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]        
+{ 0x0F12, 0x1E00  },	//70000884 //TVAR_afit_pBaseValS[96] //AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]       
+{ 0x0F12, 0x0714  },	//70000886 //TVAR_afit_pBaseValS[97] //AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8]  
+{ 0x0F12, 0x32FF  },	//70000888 //TVAR_afit_pBaseValS[98] //AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]              
+{ 0x0F12, 0x0004  },	//7000088A //TVAR_afit_pBaseValS[99] //AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]           
+{ 0x0F12, 0x0F00  },	//7000088C //TVAR_afit_pBaseValS[100] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x400F  },	//7000088E //TVAR_afit_pBaseValS[101] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000890 //TVAR_afit_pBaseValS[102] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000892 //TVAR_afit_pBaseValS[103] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000894 //TVAR_afit_pBaseValS[104] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000896 //TVAR_afit_pBaseValS[105] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0014  },	//70000898 //TVAR_afit_pBaseValS[106] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//7000089A //TVAR_afit_pBaseValS[107] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//7000089C //TVAR_afit_pBaseValS[108] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//7000089E //TVAR_afit_pBaseValS[109] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//700008A0 //TVAR_afit_pBaseValS[110] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//700008A2 //TVAR_afit_pBaseValS[111] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//700008A4 //TVAR_afit_pBaseValS[112] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//700008A6 //TVAR_afit_pBaseValS[113] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//700008A8 //TVAR_afit_pBaseValS[114] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//700008AA //TVAR_afit_pBaseValS[115] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x012C  },	//700008AC //TVAR_afit_pBaseValS[116] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x03E8  },	//700008AE //TVAR_afit_pBaseValS[117] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0046  },	//700008B0 //TVAR_afit_pBaseValS[118] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x005A  },	//700008B2 //TVAR_afit_pBaseValS[119] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//700008B4 //TVAR_afit_pBaseValS[120] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//700008B6 //TVAR_afit_pBaseValS[121] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//700008B8 //TVAR_afit_pBaseValS[122] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x01AE  },	//700008BA //TVAR_afit_pBaseValS[123] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x001E  },	//700008BC //TVAR_afit_pBaseValS[124] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x001E  },	//700008BE //TVAR_afit_pBaseValS[125] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//700008C0 //TVAR_afit_pBaseValS[126] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//700008C2 //TVAR_afit_pBaseValS[127] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x003E  },	//700008C4 //TVAR_afit_pBaseValS[128] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0008  },	//700008C6 //TVAR_afit_pBaseValS[129] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x003C  },	//700008C8 //TVAR_afit_pBaseValS[130] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x001E  },	//700008CA //TVAR_afit_pBaseValS[131] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x003C  },	//700008CC //TVAR_afit_pBaseValS[132] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x001E  },	//700008CE //TVAR_afit_pBaseValS[133] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//700008D0 //TVAR_afit_pBaseValS[134] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//700008D2 //TVAR_afit_pBaseValS[135] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//700008D4 //TVAR_afit_pBaseValS[136] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x1403  },	//700008D6 //TVAR_afit_pBaseValS[137] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x0000  },	//700008D8 //TVAR_afit_pBaseValS[138] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0000  },	//700008DA //TVAR_afit_pBaseValS[139] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0000  },	//700008DC //TVAR_afit_pBaseValS[140] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//700008DE //TVAR_afit_pBaseValS[141] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x045A  },	//700008E0 //TVAR_afit_pBaseValS[142] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//700008E2 //TVAR_afit_pBaseValS[143] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//700008E4 //TVAR_afit_pBaseValS[144] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//700008E6 //TVAR_afit_pBaseValS[145] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x081E  },	//700008E8 //TVAR_afit_pBaseValS[146] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A14  },	//700008EA //TVAR_afit_pBaseValS[147] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0F0F  },	//700008EC //TVAR_afit_pBaseValS[148] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A00  },	//700008EE //TVAR_afit_pBaseValS[149] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x0032  },	//700008F0 //TVAR_afit_pBaseValS[150] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x000E  },	//700008F2 //TVAR_afit_pBaseValS[151] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0002  },	//700008F4 //TVAR_afit_pBaseValS[152] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//700008F6 //TVAR_afit_pBaseValS[153] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1102  },	//700008F8 //TVAR_afit_pBaseValS[154] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001B  },	//700008FA //TVAR_afit_pBaseValS[155] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//700008FC //TVAR_afit_pBaseValS[156] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//700008FE //TVAR_afit_pBaseValS[157] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//70000900 //TVAR_afit_pBaseValS[158] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0306  },	//70000902 //TVAR_afit_pBaseValS[159] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x4603  },	//70000904 //TVAR_afit_pBaseValS[160] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0480  },	//70000906 //TVAR_afit_pBaseValS[161] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0046  },	//70000908 //TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//7000090A //TVAR_afit_pBaseValS[163] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x0101  },	//7000090C //TVAR_afit_pBaseValS[164] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0707  },	//7000090E //TVAR_afit_pBaseValS[165] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x1E01  },	//70000910 //TVAR_afit_pBaseValS[166] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x491E  },	//70000912 //TVAR_afit_pBaseValS[167] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /
+{ 0x0F12, 0x5044  },	//70000914 //TVAR_afit_pBaseValS[168] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0500  },	//70000916 //TVAR_afit_pBaseValS[169] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x0004  },	//70000918 //TVAR_afit_pBaseValS[170] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /
+{ 0x0F12, 0x3C0A  },	//7000091A //TVAR_afit_pBaseValS[171] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x0714  },	//7000091C //TVAR_afit_pBaseValS[172] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /
+{ 0x0F12, 0x3214  },	//7000091E //TVAR_afit_pBaseValS[173] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x5A03  },	//70000920 //TVAR_afit_pBaseValS[174] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x121E  },	//70000922 //TVAR_afit_pBaseValS[175] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//70000924 //TVAR_afit_pBaseValS[176] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//70000926 //TVAR_afit_pBaseValS[177] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x1E06  },	//70000928 //TVAR_afit_pBaseValS[178] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x011E  },	//7000092A //TVAR_afit_pBaseValS[179] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//7000092C //TVAR_afit_pBaseValS[180] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x3A3C  },	//7000092E //TVAR_afit_pBaseValS[181] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x585A  },	//70000930 //TVAR_afit_pBaseValS[182] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000932 //TVAR_afit_pBaseValS[183] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000934 //TVAR_afit_pBaseValS[184] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0000  },	//70000936 //TVAR_afit_pBaseValS[185] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x141E  },	//70000938 //TVAR_afit_pBaseValS[186] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF07  },	//7000093A //TVAR_afit_pBaseValS[187] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//7000093C //TVAR_afit_pBaseValS[188] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x0000  },	//7000093E //TVAR_afit_pBaseValS[189] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x0F0F  },	//70000940 //TVAR_afit_pBaseValS[190] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000942 //TVAR_afit_pBaseValS[191] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000944 //TVAR_afit_pBaseValS[192] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x1E1E  },	//70000946 //TVAR_afit_pBaseValS[193] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000948 //TVAR_afit_pBaseValS[194] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x3C01  },	//7000094A //TVAR_afit_pBaseValS[195] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x5A3A  },	//7000094C //TVAR_afit_pBaseValS[196] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x2858  },	//7000094E //TVAR_afit_pBaseValS[197] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000950 //TVAR_afit_pBaseValS[198] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x0003  },	//70000952 //TVAR_afit_pBaseValS[199] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1E00  },	//70000954 //TVAR_afit_pBaseValS[200] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x0714  },	//70000956 //TVAR_afit_pBaseValS[201] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000958 //TVAR_afit_pBaseValS[202] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x0004  },	//7000095A //TVAR_afit_pBaseValS[203] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x0F00  },	//7000095C //TVAR_afit_pBaseValS[204] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x400F  },	//7000095E //TVAR_afit_pBaseValS[205] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000960 //TVAR_afit_pBaseValS[206] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000962 //TVAR_afit_pBaseValS[207] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000964 //TVAR_afit_pBaseValS[208] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000966 //TVAR_afit_pBaseValS[209] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0000  },	//70000968 //TVAR_afit_pBaseValS[210] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//7000096A //TVAR_afit_pBaseValS[211] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//7000096C //TVAR_afit_pBaseValS[212] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//7000096E //TVAR_afit_pBaseValS[213] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//70000970 //TVAR_afit_pBaseValS[214] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//70000972 //TVAR_afit_pBaseValS[215] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//70000974 //TVAR_afit_pBaseValS[216] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//70000976 //TVAR_afit_pBaseValS[217] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//70000978 //TVAR_afit_pBaseValS[218] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//7000097A //TVAR_afit_pBaseValS[219] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x012C  },	//7000097C //TVAR_afit_pBaseValS[220] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x03E8  },	//7000097E //TVAR_afit_pBaseValS[221] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0046  },	//70000980 //TVAR_afit_pBaseValS[222] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x005A  },	//70000982 //TVAR_afit_pBaseValS[223] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//70000984 //TVAR_afit_pBaseValS[224] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//70000986 //TVAR_afit_pBaseValS[225] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//70000988 //TVAR_afit_pBaseValS[226] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x0226  },	//7000098A //TVAR_afit_pBaseValS[227] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x001E  },	//7000098C //TVAR_afit_pBaseValS[228] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x001E  },	//7000098E //TVAR_afit_pBaseValS[229] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//70000990 //TVAR_afit_pBaseValS[230] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//70000992 //TVAR_afit_pBaseValS[231] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x004E  },	//70000994 //TVAR_afit_pBaseValS[232] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0000  },	//70000996 //TVAR_afit_pBaseValS[233] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x003C  },	//70000998 //TVAR_afit_pBaseValS[234] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x001E  },	//7000099A //TVAR_afit_pBaseValS[235] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x003C  },	//7000099C //TVAR_afit_pBaseValS[236] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x001E  },	//7000099E //TVAR_afit_pBaseValS[237] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//700009A0 //TVAR_afit_pBaseValS[238] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//700009A2 //TVAR_afit_pBaseValS[239] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//700009A4 //TVAR_afit_pBaseValS[240] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x1403  },	//700009A6 //TVAR_afit_pBaseValS[241] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x0000  },	//700009A8 //TVAR_afit_pBaseValS[242] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0000  },	//700009AA //TVAR_afit_pBaseValS[243] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0906  },	//700009AC //TVAR_afit_pBaseValS[244] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//700009AE //TVAR_afit_pBaseValS[245] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x045A  },	//700009B0 //TVAR_afit_pBaseValS[246] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//700009B2 //TVAR_afit_pBaseValS[247] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//700009B4 //TVAR_afit_pBaseValS[248] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//700009B6 //TVAR_afit_pBaseValS[249] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x081E  },	//700009B8 //TVAR_afit_pBaseValS[250] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A14  },	//700009BA //TVAR_afit_pBaseValS[251] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0F0F  },	//700009BC //TVAR_afit_pBaseValS[252] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A00  },	//700009BE //TVAR_afit_pBaseValS[253] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x0090  },	//700009C0 //TVAR_afit_pBaseValS[254] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x000A  },	//700009C2 //TVAR_afit_pBaseValS[255] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0002  },	//700009C4 //TVAR_afit_pBaseValS[256] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//700009C6 //TVAR_afit_pBaseValS[257] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1102  },	//700009C8 //TVAR_afit_pBaseValS[258] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001B  },	//700009CA //TVAR_afit_pBaseValS[259] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//700009CC //TVAR_afit_pBaseValS[260] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//700009CE //TVAR_afit_pBaseValS[261] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//700009D0 //TVAR_afit_pBaseValS[262] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0306  },	//700009D2 //TVAR_afit_pBaseValS[263] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x4602  },	//700009D4 //TVAR_afit_pBaseValS[264] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0880  },	//700009D6 //TVAR_afit_pBaseValS[265] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0080  },	//700009D8 //TVAR_afit_pBaseValS[266] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//700009DA //TVAR_afit_pBaseValS[267] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x0101  },	//700009DC //TVAR_afit_pBaseValS[268] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0707  },	//700009DE //TVAR_afit_pBaseValS[269] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x1E01  },	//700009E0 //TVAR_afit_pBaseValS[270] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x3C1E  },	//700009E2 //TVAR_afit_pBaseValS[271] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /
+{ 0x0F12, 0x5028  },	//700009E4 //TVAR_afit_pBaseValS[272] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0500  },	//700009E6 //TVAR_afit_pBaseValS[273] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x1A04  },	//700009E8 //TVAR_afit_pBaseValS[274] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /
+{ 0x0F12, 0x280A  },	//700009EA //TVAR_afit_pBaseValS[275] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x080C  },	//700009EC //TVAR_afit_pBaseValS[276] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /
+{ 0x0F12, 0x1414  },	//700009EE //TVAR_afit_pBaseValS[277] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x6A03  },	//700009F0 //TVAR_afit_pBaseValS[278] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x121E  },	//700009F2 //TVAR_afit_pBaseValS[279] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//700009F4 //TVAR_afit_pBaseValS[280] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//700009F6 //TVAR_afit_pBaseValS[281] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x2806  },	//700009F8 //TVAR_afit_pBaseValS[282] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x0128  },	//700009FA //TVAR_afit_pBaseValS[283] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//700009FC //TVAR_afit_pBaseValS[284] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x2224  },	//700009FE //TVAR_afit_pBaseValS[285] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x3236  },	//70000A00 //TVAR_afit_pBaseValS[286] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000A02 //TVAR_afit_pBaseValS[287] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000A04 //TVAR_afit_pBaseValS[288] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0410  },	//70000A06 //TVAR_afit_pBaseValS[289] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x141E  },	//70000A08 //TVAR_afit_pBaseValS[290] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF07  },	//70000A0A //TVAR_afit_pBaseValS[291] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//70000A0C //TVAR_afit_pBaseValS[292] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x4050  },	//70000A0E //TVAR_afit_pBaseValS[293] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x0F0F  },	//70000A10 //TVAR_afit_pBaseValS[294] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000A12 //TVAR_afit_pBaseValS[295] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000A14 //TVAR_afit_pBaseValS[296] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x2828  },	//70000A16 //TVAR_afit_pBaseValS[297] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000A18 //TVAR_afit_pBaseValS[298] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x2401  },	//70000A1A //TVAR_afit_pBaseValS[299] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x3622  },	//70000A1C //TVAR_afit_pBaseValS[300] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x2832  },	//70000A1E //TVAR_afit_pBaseValS[301] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000A20 //TVAR_afit_pBaseValS[302] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x1003  },	//70000A22 //TVAR_afit_pBaseValS[303] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1E04  },	//70000A24 //TVAR_afit_pBaseValS[304] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x0714  },	//70000A26 //TVAR_afit_pBaseValS[305] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000A28 //TVAR_afit_pBaseValS[306] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x5004  },	//70000A2A //TVAR_afit_pBaseValS[307] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x0F40  },	//70000A2C //TVAR_afit_pBaseValS[308] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x400F  },	//70000A2E //TVAR_afit_pBaseValS[309] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000A30 //TVAR_afit_pBaseValS[310] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000A32 //TVAR_afit_pBaseValS[311] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000A34 //TVAR_afit_pBaseValS[312] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000A36 //TVAR_afit_pBaseValS[313] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0000  },	//70000A38 //TVAR_afit_pBaseValS[314] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//70000A3A //TVAR_afit_pBaseValS[315] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//70000A3C //TVAR_afit_pBaseValS[316] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//70000A3E //TVAR_afit_pBaseValS[317] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//70000A40 //TVAR_afit_pBaseValS[318] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//70000A42 //TVAR_afit_pBaseValS[319] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//70000A44 //TVAR_afit_pBaseValS[320] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//70000A46 //TVAR_afit_pBaseValS[321] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//70000A48 //TVAR_afit_pBaseValS[322] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//70000A4A //TVAR_afit_pBaseValS[323] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x00C8  },	//70000A4C //TVAR_afit_pBaseValS[324] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x03E8  },	//70000A4E //TVAR_afit_pBaseValS[325] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0046  },	//70000A50 //TVAR_afit_pBaseValS[326] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x0050  },	//70000A52 //TVAR_afit_pBaseValS[327] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//70000A54 //TVAR_afit_pBaseValS[328] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//70000A56 //TVAR_afit_pBaseValS[329] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//70000A58 //TVAR_afit_pBaseValS[330] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x0226  },	//70000A5A //TVAR_afit_pBaseValS[331] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x0014  },	//70000A5C //TVAR_afit_pBaseValS[332] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x0014  },	//70000A5E //TVAR_afit_pBaseValS[333] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//70000A60 //TVAR_afit_pBaseValS[334] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//70000A62 //TVAR_afit_pBaseValS[335] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x004E  },	//70000A64 //TVAR_afit_pBaseValS[336] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0000  },	//70000A66 //TVAR_afit_pBaseValS[337] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x002D  },	//70000A68 //TVAR_afit_pBaseValS[338] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x0019  },	//70000A6A //TVAR_afit_pBaseValS[339] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x002D  },	//70000A6C //TVAR_afit_pBaseValS[340] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x0019  },	//70000A6E //TVAR_afit_pBaseValS[341] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//70000A70 //TVAR_afit_pBaseValS[342] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//70000A72 //TVAR_afit_pBaseValS[343] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//70000A74 //TVAR_afit_pBaseValS[344] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x1403  },	//70000A76 //TVAR_afit_pBaseValS[345] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x0000  },	//70000A78 //TVAR_afit_pBaseValS[346] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0000  },	//70000A7A //TVAR_afit_pBaseValS[347] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0906  },	//70000A7C //TVAR_afit_pBaseValS[348] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//70000A7E //TVAR_afit_pBaseValS[349] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x045A  },	//70000A80 //TVAR_afit_pBaseValS[350] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//70000A82 //TVAR_afit_pBaseValS[351] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//70000A84 //TVAR_afit_pBaseValS[352] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//70000A86 //TVAR_afit_pBaseValS[353] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x081E  },	//70000A88 //TVAR_afit_pBaseValS[354] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A14  },	//70000A8A //TVAR_afit_pBaseValS[355] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0F0F  },	//70000A8C //TVAR_afit_pBaseValS[356] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A00  },	//70000A8E //TVAR_afit_pBaseValS[357] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x0090  },	//70000A90 //TVAR_afit_pBaseValS[358] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x000A  },	//70000A92 //TVAR_afit_pBaseValS[359] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0001  },	//70000A94 //TVAR_afit_pBaseValS[360] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//70000A96 //TVAR_afit_pBaseValS[361] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1002  },	//70000A98 //TVAR_afit_pBaseValS[362] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001E  },	//70000A9A //TVAR_afit_pBaseValS[363] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//70000A9C //TVAR_afit_pBaseValS[364] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//70000A9E //TVAR_afit_pBaseValS[365] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//70000AA0 //TVAR_afit_pBaseValS[366] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0307  },	//70000AA2 //TVAR_afit_pBaseValS[367] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x5002  },	//70000AA4 //TVAR_afit_pBaseValS[368] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0080  },	//70000AA6 //TVAR_afit_pBaseValS[369] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0080  },	//70000AA8 //TVAR_afit_pBaseValS[370] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//70000AAA //TVAR_afit_pBaseValS[371] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x0101  },	//70000AAC //TVAR_afit_pBaseValS[372] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0707  },	//70000AAE //TVAR_afit_pBaseValS[373] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x1E01  },	//70000AB0 //TVAR_afit_pBaseValS[374] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x2A1E  },	//70000AB2 //TVAR_afit_pBaseValS[375] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /
+{ 0x0F12, 0x5020  },	//70000AB4 //TVAR_afit_pBaseValS[376] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0500  },	//70000AB6 //TVAR_afit_pBaseValS[377] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x1A04  },	//70000AB8 //TVAR_afit_pBaseValS[378] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /
+{ 0x0F12, 0x280A  },	//70000ABA //TVAR_afit_pBaseValS[379] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x080C  },	//70000ABC //TVAR_afit_pBaseValS[380] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /
+{ 0x0F12, 0x1414  },	//70000ABE //TVAR_afit_pBaseValS[381] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x6A03  },	//70000AC0 //TVAR_afit_pBaseValS[382] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x121E  },	//70000AC2 //TVAR_afit_pBaseValS[383] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//70000AC4 //TVAR_afit_pBaseValS[384] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//70000AC6 //TVAR_afit_pBaseValS[385] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x3C06  },	//70000AC8 //TVAR_afit_pBaseValS[386] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x013C  },	//70000ACA //TVAR_afit_pBaseValS[387] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//70000ACC //TVAR_afit_pBaseValS[388] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x1C1E  },	//70000ACE //TVAR_afit_pBaseValS[389] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x1E22  },	//70000AD0 //TVAR_afit_pBaseValS[390] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000AD2 //TVAR_afit_pBaseValS[391] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000AD4 //TVAR_afit_pBaseValS[392] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0214  },	//70000AD6 //TVAR_afit_pBaseValS[393] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x0E14  },	//70000AD8 //TVAR_afit_pBaseValS[394] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF06  },	//70000ADA //TVAR_afit_pBaseValS[395] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//70000ADC //TVAR_afit_pBaseValS[396] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x4052  },	//70000ADE //TVAR_afit_pBaseValS[397] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x150C  },	//70000AE0 //TVAR_afit_pBaseValS[398] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000AE2 //TVAR_afit_pBaseValS[399] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000AE4 //TVAR_afit_pBaseValS[400] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x3C3C  },	//70000AE6 //TVAR_afit_pBaseValS[401] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000AE8 //TVAR_afit_pBaseValS[402] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x1E01  },	//70000AEA //TVAR_afit_pBaseValS[403] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x221C  },	//70000AEC //TVAR_afit_pBaseValS[404] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x281E  },	//70000AEE //TVAR_afit_pBaseValS[405] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000AF0 //TVAR_afit_pBaseValS[406] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x1403  },	//70000AF2 //TVAR_afit_pBaseValS[407] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1402  },	//70000AF4 //TVAR_afit_pBaseValS[408] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x060E  },	//70000AF6 //TVAR_afit_pBaseValS[409] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000AF8 //TVAR_afit_pBaseValS[410] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x5204  },	//70000AFA //TVAR_afit_pBaseValS[411] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x0C40  },	//70000AFC //TVAR_afit_pBaseValS[412] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x4015  },	//70000AFE //TVAR_afit_pBaseValS[413] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000B00 //TVAR_afit_pBaseValS[414] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000B02 //TVAR_afit_pBaseValS[415] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000B04 //TVAR_afit_pBaseValS[416] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000B06 //TVAR_afit_pBaseValS[417] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0000  },	//70000B08 //TVAR_afit_pBaseValS[418] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//70000B0A //TVAR_afit_pBaseValS[419] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//70000B0C //TVAR_afit_pBaseValS[420] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//70000B0E //TVAR_afit_pBaseValS[421] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//70000B10 //TVAR_afit_pBaseValS[422] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//70000B12 //TVAR_afit_pBaseValS[423] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//70000B14 //TVAR_afit_pBaseValS[424] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//70000B16 //TVAR_afit_pBaseValS[425] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//70000B18 //TVAR_afit_pBaseValS[426] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//70000B1A //TVAR_afit_pBaseValS[427] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x0032  },	//70000B1C //TVAR_afit_pBaseValS[428] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x028A  },	//70000B1E //TVAR_afit_pBaseValS[429] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0032  },	//70000B20 //TVAR_afit_pBaseValS[430] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x01F4  },	//70000B22 //TVAR_afit_pBaseValS[431] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//70000B24 //TVAR_afit_pBaseValS[432] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//70000B26 //TVAR_afit_pBaseValS[433] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//70000B28 //TVAR_afit_pBaseValS[434] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x01AA  },	//70000B2A //TVAR_afit_pBaseValS[435] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x003C  },	//70000B2C //TVAR_afit_pBaseValS[436] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x0050  },	//70000B2E //TVAR_afit_pBaseValS[437] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//70000B30 //TVAR_afit_pBaseValS[438] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//70000B32 //TVAR_afit_pBaseValS[439] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x0044  },	//70000B34 //TVAR_afit_pBaseValS[440] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0014  },	//70000B36 //TVAR_afit_pBaseValS[441] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x0046  },	//70000B38 //TVAR_afit_pBaseValS[442] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x0019  },	//70000B3A //TVAR_afit_pBaseValS[443] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x0046  },	//70000B3C //TVAR_afit_pBaseValS[444] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x0019  },	//70000B3E //TVAR_afit_pBaseValS[445] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//70000B40 //TVAR_afit_pBaseValS[446] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//70000B42 //TVAR_afit_pBaseValS[447] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//70000B44 //TVAR_afit_pBaseValS[448] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x0503  },	//70000B46 //TVAR_afit_pBaseValS[449] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x080F  },	//70000B48 //TVAR_afit_pBaseValS[450] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0808  },	//70000B4A //TVAR_afit_pBaseValS[451] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0000  },	//70000B4C //TVAR_afit_pBaseValS[452] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//70000B4E //TVAR_afit_pBaseValS[453] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x012D  },	//70000B50 //TVAR_afit_pBaseValS[454] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//70000B52 //TVAR_afit_pBaseValS[455] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//70000B54 //TVAR_afit_pBaseValS[456] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//70000B56 //TVAR_afit_pBaseValS[457] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x061E  },	//70000B58 //TVAR_afit_pBaseValS[458] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A1E  },	//70000B5A //TVAR_afit_pBaseValS[459] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0606  },	//70000B5C //TVAR_afit_pBaseValS[460] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A03  },	//70000B5E //TVAR_afit_pBaseValS[461] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x378B  },	//70000B60 //TVAR_afit_pBaseValS[462] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x1028  },	//70000B62 //TVAR_afit_pBaseValS[463] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0001  },	//70000B64 //TVAR_afit_pBaseValS[464] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//70000B66 //TVAR_afit_pBaseValS[465] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1002  },	//70000B68 //TVAR_afit_pBaseValS[466] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001E  },	//70000B6A //TVAR_afit_pBaseValS[467] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//70000B6C //TVAR_afit_pBaseValS[468] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//70000B6E //TVAR_afit_pBaseValS[469] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//70000B70 //TVAR_afit_pBaseValS[470] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0307  },	//70000B72 //TVAR_afit_pBaseValS[471] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x5001  },	//70000B74 //TVAR_afit_pBaseValS[472] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0080  },	//70000B76 //TVAR_afit_pBaseValS[473] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0080  },	//70000B78 //TVAR_afit_pBaseValS[474] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//70000B7A //TVAR_afit_pBaseValS[475] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x5050  },	//70000B7C //TVAR_afit_pBaseValS[476] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0101  },	//70000B7E //TVAR_afit_pBaseValS[477] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x3201  },	//70000B80 //TVAR_afit_pBaseValS[478] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x1832  },	//70000B82 //TVAR_afit_pBaseValS[479] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /        iden 12
+{ 0x0F12, 0x210C  },	//70000B84 //TVAR_afit_pBaseValS[480] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0A00  },	//70000B86 //TVAR_afit_pBaseValS[481] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x1E04  },	//70000B88 //TVAR_afit_pBaseValS[482] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /    1E demhsharplow
+{ 0x0F12, 0x0A08  },	//70000B8A //TVAR_afit_pBaseValS[483] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x070C  },	//70000B8C //TVAR_afit_pBaseValS[484] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /    c8 clamp
+{ 0x0F12, 0x3264  },	//70000B8E //TVAR_afit_pBaseValS[485] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x5A02  },	//70000B90 //TVAR_afit_pBaseValS[486] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x1040  },	//70000B92 //TVAR_afit_pBaseValS[487] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//70000B94 //TVAR_afit_pBaseValS[488] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//70000B96 //TVAR_afit_pBaseValS[489] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x4606  },	//70000B98 //TVAR_afit_pBaseValS[490] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x0146  },	//70000B9A //TVAR_afit_pBaseValS[491] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//70000B9C //TVAR_afit_pBaseValS[492] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x1C18  },	//70000B9E //TVAR_afit_pBaseValS[493] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x1819  },	//70000BA0 //TVAR_afit_pBaseValS[494] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000BA2 //TVAR_afit_pBaseValS[495] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000BA4 //TVAR_afit_pBaseValS[496] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0514  },	//70000BA6 //TVAR_afit_pBaseValS[497] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x0C14  },	//70000BA8 //TVAR_afit_pBaseValS[498] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF05  },	//70000BAA //TVAR_afit_pBaseValS[499] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//70000BAC //TVAR_afit_pBaseValS[500] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x4052  },	//70000BAE //TVAR_afit_pBaseValS[501] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x1514  },	//70000BB0 //TVAR_afit_pBaseValS[502] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000BB2 //TVAR_afit_pBaseValS[503] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000BB4 //TVAR_afit_pBaseValS[504] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x4646  },	//70000BB6 //TVAR_afit_pBaseValS[505] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000BB8 //TVAR_afit_pBaseValS[506] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x1801  },	//70000BBA //TVAR_afit_pBaseValS[507] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x191C  },	//70000BBC //TVAR_afit_pBaseValS[508] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x2818  },	//70000BBE //TVAR_afit_pBaseValS[509] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000BC0 //TVAR_afit_pBaseValS[510] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x1403  },	//70000BC2 //TVAR_afit_pBaseValS[511] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1405  },	//70000BC4 //TVAR_afit_pBaseValS[512] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x050C  },	//70000BC6 //TVAR_afit_pBaseValS[513] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000BC8 //TVAR_afit_pBaseValS[514] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x5204  },	//70000BCA //TVAR_afit_pBaseValS[515] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x1440  },	//70000BCC //TVAR_afit_pBaseValS[516] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x4015  },	//70000BCE //TVAR_afit_pBaseValS[517] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000BD0 //TVAR_afit_pBaseValS[518] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000BD2 //TVAR_afit_pBaseValS[519] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+                           
+{ 0x0F12, 0x7DFA  },	//afit_pConstBaseValS[0] //                                                                          
+{ 0x0F12, 0xFFBD  },	//afit_pConstBaseValS[1] //                                                                          
+{ 0x0F12, 0x26FE  },	//afit_pConstBaseValS[2] //                                                                          
+{ 0x0F12, 0xF7BC  },	//afit_pConstBaseValS[3] //                                                                          
+{ 0x0F12, 0x7E06  },	//afit_pConstBaseValS[4] //                                                                          
+{ 0x0F12, 0x00D3  },	//afit_pConstBaseValS[5] //                                                                          
+                        
+                        
+{ 0x002A, 0x2CE8  },    
+{ 0x0F12, 0x0007  },	// Modify LSB to control AWBB_YThreshLow //    	                                                                        
+{ 0x0F12, 0x00E2  },	//                                         
+{ 0x0F12, 0x0005  },	// Modify LSB to control AWBB_YThreshLowBrLow//                                                                        
+{ 0x0F12, 0x00E2  },	//                                         
+                                                                       
+                                                                                     
+{ 0x002A, 0x0F7E  },    //ae weight    //                                
+{ 0x0F12, 0x0000  },  //0000  //0000
+{ 0x0F12, 0x0000  },  //0000  //0000
+{ 0x0F12, 0x0000  },  //0000  //0000
+{ 0x0F12, 0x0000  },  //0000  //0000                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0201  },  //0201  //0201
+{ 0x0F12, 0x0102  },  //0102  //0102
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0201  },  //0101  //0101
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0102  },  //0101  //0101                     
+{ 0x0F12, 0x0201  },  //0101  //0201
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0102  },  //0101  //0102                     
+{ 0x0F12, 0x0101  },  //0101  //0201
+{ 0x0F12, 0x0101  },  //0101  //0202
+{ 0x0F12, 0x0101  },  //0101  //0202
+{ 0x0F12, 0x0101  },  //0101  //0102
+                    
+
+{0x002A, 0x01d6}, //cys
+{0x0f12, 0x0800},
+{0x0f12, 0x0600},    
+                               
+{ 0x002A, 0x01CC  },    
+{ 0x0F12, 0x5DC0  },	//REG_TC_IPRM_InClockLSBs//input clock=24MHz                        	                                                                        
+{ 0x0F12, 0x0000  },    //REG_TC_IPRM_InClockMSBs                                           
+{ 0x002A, 0x01EE  },                                                                        
+{ 0x0F12, 0x0003  },	//REG_TC_IPRM_UseNPviClocks                                     
+                  
+{ 0x002A, 0x01F6  },                                                                        
+{ 0x0F12, 0x1F40  },    //REG_TC_IPRM_OpClk4KHz_0                   	2   700001F6         
+{ 0x0F12, 0x32A8  },	//3A88    //REG_TC_IPRM_MinOutRate4KHz_0              	2   700001F8                                                                        
+{ 0x0F12, 0x32E8  },	//3AA8    //REG_TC_IPRM_MaxOutRate4KHz_0                        
+                        
+{ 0x0F12, 0x1F40  },	 //REG_TC_IPRM_OpClk4KHz_1                   	2   700001FC    
+{ 0x0F12, 0x2ea0  },    //REG_TC_IPRM_MinOutRate4KHz_1              	2   700001FE 
+{ 0x0F12, 0x2f00  },    //REG_TC_IPRM_MaxOutRate4KHz_1              	2   70000200 
+                  
+{ 0x0F12, 0x0BB8  },    //REG_TC_IPRM_OpClk4KHz_2                   	2   70000202 
+{ 0x0F12, 0x05DC  },    //REG_TC_IPRM_MinOutRate4KHz_2              	2   70000204 
+{ 0x0F12, 0x1770  },    //REG_TC_IPRM_MaxOutRate4KHz_2              	2   70000206 
+                  
+{ 0x002A, 0x0208  },                                                                
+{ 0x0F12, 0x0001  },      //REG_TC_IPRM_InitParamsUpdated                           
+                        
+{ 0xdddd, 0x0064  },  //delay 100ms  
+                  
+{ 0x0028, 0x7000  },	    //15800335190
+{ 0x002A, 0x026C  },   //Normal preview 15fps
+{ 0x0F12, 0x0400  },	//REG_0TC_PCFG_usWidth                      	2   7000026C			// cys  640                          
+{ 0x0F12, 0x0300  },   //REG_0TC_PCFG_usHeight                     	2   7000026E    //  480                                       
+{ 0x0F12, 0x0006  },   //REG_0TC_PCFG_Format                       	2   70000270    //   rgb565                                      
+{ 0x0F12, 0x32E8  },	//3AA8//REG_0TC_PCFG_usMaxOut4KHzRate             	2   70000272  //                              
+{ 0x0F12, 0x32a8  },	//3A88//REG_0TC_PCFG_usMinOut4KHzRate             	2   70000274  //                              
+{ 0x0F12, 0x0100  },   //REG_0TC_PCFG_OutClkPerPix88               	2   70000276    //                                         
+{ 0x0F12, 0x0800  },   //REG_0TC_PCFG_uMaxBpp88                    	2   70000278    //                                         
+{ 0x0F12, 0x0042  },   //REG_0TC_PCFG_PVIMask                      	2   7000027A    //92  (1) PCLK inversion  (4)1b_C first (5) UV First                                       
+{ 0x0F12, 0x0010  },   //REG_0TC_PCFG_OIFMask                      	2   7000027C    //                                         
+{ 0x0F12, 0x01E0  },   //REG_0TC_PCFG_usJpegPacketSize             	2   7000027E    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_usJpegTotalPackets           	2   70000280    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_uClockInd                    	2   70000282    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_usFrTimeType                 	2   70000284    //                                         
+{ 0x0F12, 0x0001  },   //REG_0TC_PCFG_FrRateQualityType            	2   70000286    //cys 0x0001          
+{ 0x0F12, 0x0535  },   //REG_0TC_PCFG_usMaxFrTimeMsecMult10        	2   70000288    // cys 0x535 
+{ 0x0F12, 0x0535  },   //REG_0TC_PCFG_usMinFrTimeMsecMult10        	2   7000028A    //cys                              
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_bSmearOutput                 	2   7000028C    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_sSaturation                  	2   7000028E    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_sSharpBlur                   	2   70000290    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_sColorTemp                   	2   70000292    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_uDeviceGammaIndex            	2   70000294    //                                         
+{ 0x0F12, 0x0003  },   //REG_0TC_PCFG_uPrevMirror                  	2   70000296    //                                         
+{ 0x0F12, 0x0003  },   //REG_0TC_PCFG_uCaptureMirror               	2   70000298    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_uRotation                    	2   7000029A    //                                         
+                       
+                       //comcoder frame fix 15                                        
+{ 0x0F12, 0x0800  },   //REG_1TC_PCFG_usWidth                      	2   7000029C    //       cys                                  
+{ 0x0F12, 0x0600  },   //REG_1TC_PCFG_usHeight                     	2   7000029E    //                                         
+{ 0x0F12, 0x0005  },   //REG_1TC_PCFG_Format                       	2   700002A0    //                                         
+{ 0x0F12, 0x32E8  },   //REG_1TC_PCFG_usMaxOut4KHzRate             	2   700002A2    //                                         
+{ 0x0F12, 0x32a8  },   //REG_1TC_PCFG_usMinOut4KHzRate             	2   700002A4    //                                         
+{ 0x0F12, 0x0100  },   //REG_1TC_PCFG_OutClkPerPix88               	2   700002A6    //                                         
+{ 0x0F12, 0x0800  },   //REG_1TC_PCFG_uMaxBpp88                    	2   700002A8    //                                         
+{ 0x0F12, 0x0072  },   //REG_1TC_PCFG_PVIMask                      	2   700002AA    //                                         
+{ 0x0F12, 0x0010  },   //REG_1TC_PCFG_OIFMask                      	2   700002AC    //                                         
+{ 0x0F12, 0x01E0  },   //REG_1TC_PCFG_usJpegPacketSize             	2   700002AE    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_usJpegTotalPackets           	2   700002B0    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_uClockInd                    	2   700002B2    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_usFrTimeType                 	2   700002B4    //                                         
+{ 0x0F12, 0x0001  },   //REG_1TC_PCFG_FrRateQualityType            	2   700002B6    //                                         
+{ 0x0F12, 0x0535  },   //REG_1TC_PCFG_usMaxFrTimeMsecMult10        	2   700002B8    //cys 0x29a         
+{ 0x0F12, 0x0535  },   //REG_1TC_PCFG_usMinFrTimeMsecMult10        	2   700002BA    //cys  0x29a                                        
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_bSmearOutput                 	2   700002BC    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_sSaturation                  	2   700002BE    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_sSharpBlur                   	2   700002C0    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_sColorTemp                   	2   700002C2    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_uDeviceGammaIndex            	2   700002C4    //                                         
+{ 0x0F12, 0x0003  },   //REG_1TC_PCFG_uPrevMirror                  	2   700002C6    //                                         
+{ 0x0F12, 0x0003  },   //REG_1TC_PCFG_uCaptureMirror               	2   700002C8    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_uRotation                    	2   700002CA    //                                         
+                                       
+                            
+{ 0x002A, 0x035C  },   //Normal capture //    
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_uCaptureMode                 	2   7000035C						// 
+{ 0x0F12, 0x0800  },   //REG_0TC_CCFG_usWidth                      	2   7000035E          //cys 640   280                                
+{ 0x0F12, 0x0600  },   //REG_0TC_CCFG_usHeight                     	2   70000360          //    480   1e0                            
+{ 0x0F12, 0x0006  },   //REG_0TC_CCFG_Format                       	2   70000362          //     rgb565                              
+{ 0x0F12, 0x32E8  },	//2f00//3AA8//REG_0TC_CCFG_usMaxOut4KHzRate             	2   70000364  //                      
+{ 0x0F12, 0x32a8  },	//2ea0//3A88//REG_0TC_CCFG_usMinOut4KHzRate             	2   70000366  //                      
+{ 0x0F12, 0x0100  },   //REG_0TC_CCFG_OutClkPerPix88               	2   70000368          //                                   
+{ 0x0F12, 0x0800  },   //REG_0TC_CCFG_uMaxBpp88                    	2   7000036A          //                                   
+{ 0x0F12, 0x0042  },   //REG_0TC_CCFG_PVIMask                      	2   7000036C          //                                   
+{ 0x0F12, 0x0010  },   //REG_0TC_CCFG_OIFMask                      	2   7000036E          //                                   
+{ 0x0F12, 0x01E0  },   //REG_0TC_CCFG_usJpegPacketSize             	2   70000370          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_usJpegTotalPackets           	2   70000372          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_uClockInd                    	2   70000374          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_usFrTimeType                 	2   70000376          //                                   
+{ 0x0F12, 0x0002  },   //REG_0TC_CCFG_FrRateQualityType            	2   70000378          //                                   
+{ 0x0F12, 0x0535  },   //REG_0TC_CCFG_usMaxFrTimeMsecMult10        	2   7000037A          //                                   
+{ 0x0F12, 0x0535  },   //REG_0TC_CCFG_usMinFrTimeMsecMult10        	2   7000037C          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_bSmearOutput                 	2   7000037E          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_sSaturation                  	2   70000380          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_sSharpBlur                   	2   70000382          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_sColorTemp                   	2   70000384          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_uDeviceGammaIndex            	2   70000386          //                                   
+                            
+                       // Low_lux capture//    
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_uCaptureMode                 	2   70000388						// 
+{ 0x0F12, 0x0280  },   //REG_1TC_CCFG_usWidth                      	2   7000038A          //  cys 640                                 
+{ 0x0F12, 0x01e0  },   //REG_1TC_CCFG_usHeight                     	2   7000038C          //  cys 480                                 
+{ 0x0F12, 0x0005  },   //REG_1TC_CCFG_Format                       	2   7000038E          //                                   
+{ 0x0F12, 0x32E8  },   //REG_1TC_CCFG_usMaxOut4KHzRate             	2   70000390          //                                   
+{ 0x0F12, 0x32a8  },   //REG_1TC_CCFG_usMinOut4KHzRate             	2   70000392          //                                   
+{ 0x0F12, 0x0100  },   //REG_1TC_CCFG_OutClkPerPix88               	2   70000394          //                                   
+{ 0x0F12, 0x0800  },   //REG_1TC_CCFG_uMaxBpp88                    	2   70000396          //                                   
+{ 0x0F12, 0x0072  },   //REG_1TC_CCFG_PVIMask                      	2   70000398          //                                   
+{ 0x0F12, 0x0010  },   //REG_1TC_CCFG_OIFMask                      	2   7000039A          //                                   
+{ 0x0F12, 0x01E0  },   //REG_1TC_CCFG_usJpegPacketSize             	2   7000039C          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_usJpegTotalPackets           	2   7000039E          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_uClockInd                    	2   700003A0          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_usFrTimeType                 	2   700003A2          //                                   
+{ 0x0F12, 0x0002  },   //REG_1TC_CCFG_FrRateQualityType            	2   700003A4          //                                   
+{ 0x0F12, 0x0535  },   //REG_1TC_CCFG_usMaxFrTimeMsecMult10        	2   700003A6          //                                   
+{ 0x0F12, 0x0535  },   //REG_1TC_CCFG_usMinFrTimeMsecMult10        	2   700003A8          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_bSmearOutput                 	2   700003AA          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_sSaturation                  	2   700003AC          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_sSharpBlur                   	2   700003AE          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_sColorTemp                   	2   700003B0          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_uDeviceGammaIndex            	2   700003B2          //                                   
+                                  
+{ 0x002A, 0x0208  },        
+{ 0x0F12, 0x0001  },      //REG_TC_IPRM_InitParamsUpdated//                                                                       
+                            
+{ 0x002A, 0x023C  },   
+{ 0x0F12, 0x0000  },	//32MHz Sys Clock//	
+{ 0x002A, 0x0244  },	                   
+{ 0x0F12, 0x0000  },       
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x0F12, 0x0001  }, 
+                     
+{ 0x1000, 0x0001  },	// Set host interrupt so main start run//                                                  
+{ 0xdddd, 0x0064  },   //delay 100ms
+                  
+{ 0x002A, 0x0DA0  },    
+{ 0x0F12, 0x0005  },    
+                        
+{ 0x002A, 0x0D88  },    
+{ 0x0F12, 0x0038  },    
+{ 0x0F12, 0x0074  },    
+{ 0x0F12, 0xFFF1  },    
+{ 0x0F12, 0x00BF  },    
+{ 0x0F12, 0xFF9B  },    
+{ 0x0F12, 0x00DB  },    
+{ 0x0F12, 0xFF56  },    
+{ 0x0F12, 0x00F0  },    
+{ 0x0F12, 0xFEFF  },    
+{ 0x0F12, 0x010F  },    
+{ 0x0F12, 0x0E74  },    
+{ 0x002A, 0x0DA8  },    
+{ 0x0F12, 0x0BB8  },    //NB 3000
+{ 0x002A, 0x0DA4  },    
+{ 0x0F12, 0x274E  },
+                  
+{ 0x002A, 0x0DCA  },
+{ 0x0F12, 0x0030  },
+
+{ 0x002A, 0x3286  },
+{ 0x0F12, 0x0001  }, //Pre/Post gamma on(ç›”æ±—)  
+
+{ 0x002A, 0x032C  },
+{ 0x0F12, 0xAAAA  },  //ESD Check  
+                  
+{ 0xffff, 0xffff },
+};
+
+  
+s5k5ca_short_t s5k5ca_capture_normal_normal_00[] =              
+{ 
+{ 0xFCFC, 0xD000  },                 
+{ 0x0028, 0x7000  },  
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0246  },
+{ 0x0F12, 0x0001  },  
+{ 0x002A, 0x0224  },
+{ 0x0F12, 0x0001  },   
+{ 0x0F12, 0x0001  },
+//{ 0xdddd, 0x012C  }, //delay 300ms //0218 delay time 300ms // 0421 0064(100ms)->0032(50ms)        
+{ 0xffff, 0xffff  },
+};
+
+
+
+// /////////////
+// / CapturewMode
+// ////////////
+s5k5ca_short_t s5k5ca_capture[] = 
+{ 
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },                                                      
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  }, 
+  
+{ 0xffff, 0xffff  },
+};
+
+
+/////////////////////
+// SnapshotLowLightMode
+/////////////////////
+s5k5ca_short_t s5k5ca_snapshot_normal_low_00[] = //light <= 0x20 0421 PV2 0020->0018
+{ 
+//LowLight + Night Off
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },            
+                  
+{ 0x002A, 0x07E6  },
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+    
+{ 0x002A, 0x0838  },
+{ 0x0F12, 0x0A3C  },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x0908  },
+{ 0x0F12, 0x0446  },	//TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]
+                                             
+{ 0x002A, 0x0244  }, //Low lux capture//
+{ 0x0F12, 0x0001  }, //config 1 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  },
+                 
+{ 0xdddd, 0x0320  }, //delay 800ms 
+
+{ 0xffff, 0xffff  },
+//sw delay time - 800ms
+};
+
+
+  
+s5k5ca_short_t s5k5ca_flashcapture_00[] =       
+{ 
+  
+//{ 0xdddd, 0x0160  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },                   
+{ 0x002A, 0x035C  }, //Capture Mode//
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  }, 
+  
+
+{ 0xffff, 0xffff  },  
+};
+
+
+/////////////////////
+// SnapshotLowLightMode
+/////////////////////
+s5k5ca_short_t s5k5ca_snapshot_low[] = 
+{
+
+//LowLight + Night Off
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },            
+                  
+{ 0x002A, 0x07E6  },
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+    
+{ 0x002A, 0x0838  },
+{ 0x0F12, 0x0A3C  },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x0908  },
+{ 0x0F12, 0x0446  },	//TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]
+                                             
+{ 0x002A, 0x0244  }, //Low lux capture//
+{ 0x0F12, 0x0001  }, //config 1 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  },
+  
+{ 0xffff, 0xffff  },  
+
+};
+
+s5k5ca_short_t s5k5ca_flashcapture_low_00[] =    
+{
+//{ 0xdddd, 0x0160  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms    
+
+//LowLight + Night Off
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },            
+{ 0x002A, 0x0388  }, //Capture Mode//
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  },
+  
+{ 0xffff, 0xffff  },  
+};
+
+
+
+////////////////////
+// SnapshotNightMode
+///////////////////
+
+s5k5ca_short_t s5k5ca_snapshot_nightmode_00[] = 
+{
+
+//LowLight
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },    
+{ 0x002A, 0x07E6  },
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+                                                     
+{ 0x002A, 0x0244  }, //Night capture//
+{ 0x0F12, 0x0002  }, //config 2 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+
+////////////////
+// NightMode_ON
+///////////////
+s5k5ca_short_t s5k5ca_nightmode_on[] = 
+{
+
+
+{ 0xffff, 0xffff  },            
+};
+
+////////////////
+// NightMode_OFF
+///////////////
+s5k5ca_short_t s5k5ca_nightmode_off[] = 
+{
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_NONFIX                     //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_nonfix[] = 
+{
+
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_15FIX                   //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_15fix[] = 
+{
+
+  
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_7FIX                    //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_7fix[] = 
+{
+
+                  
+{ 0xffff, 0xffff  },
+};
+
+
+/////////
+// ISO_AUTO
+/////////
+s5k5ca_short_t s5k5ca_iso_auto[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x1000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0x3415  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0x682A  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0x8235  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0x3415  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0x682A  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0x8235  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x01B3  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x02A0  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x0064  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  },
+  
+{ 0xffff, 0xffff  },
+};
+
+////////
+// ISO_50
+////////
+s5k5ca_short_t s5k5ca_iso50[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x1000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x0064  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// ISO_100
+////////
+s5k5ca_short_t s5k5ca_iso100[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x1800  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x0096  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+  
+// ///////
+// / ISO_200
+// ///////
+s5k5ca_short_t s5k5ca_iso200[] =
+{ 
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+  
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x2000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x00C8  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// ISO_400
+////////
+s5k5ca_short_t s5k5ca_iso400[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x3000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x012C  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+
+////////////////////
+// SCENE_PORTRAIT_OFF
+////////////////////
+s5k5ca_short_t s5k5ca_scene_portrait_off[] =
+{
+{ 0xFCFC, 0xD000  },                    
+{ 0x0028, 0x7000  },//For Scene//
+{ 0x002A, 0x020C  },
+{ 0x0F12, 0x0000  },// Brightness for controling the EV//
+{ 0x002A, 0x0210  },
+{ 0x0F12, 0x0000  },// Saturation//
+{ 0x0F12, 0x0000  },// Blur_Sharpness //  
+{ 0xffff, 0xffff  },  
+};     
+
+////////////////////
+// SCENE_LANDSCAPE_OFF
+////////////////////
+s5k5ca_short_t s5k5ca_scene_landscape_off[] =
+{
+{ 0xFCFC, 0xD000  },     
+{ 0x0028, 0x7000  },//For Scene//
+{ 0x002A, 0x020C  },
+{ 0x0F12, 0x0000  },// Brightness for controling the EV//
+{ 0x002A, 0x0210  },
+{ 0x0F12, 0x0000  },// Saturation//
+{ 0x0F12, 0x0000  },// Blur_Sharpness //  
+{ 0xffff, 0xffff  },
+};
+
+/////////////////
+// SCENE_SPORTS_OFF
+/////////////////
+s5k5ca_short_t s5k5ca_scene_sports_off[] =
+{
+{ 0x0028, 0x7000  },     
+
+{ 0x002A, 0x0530  },//lt_uMaxExp1//
+{ 0x0F12, 0x3415  },
+{ 0x002A, 0x0534  },//lt_uMaxExp2//
+{ 0x0F12, 0x682A  },
+{ 0x002A, 0x167C  },//lt_uMaxExp3//
+{ 0x0F12, 0x8235  },
+{ 0x002A, 0x1680  },//lt_uMaxExp4//
+{ 0x0F12, 0xc350  },
+{ 0x0F12, 0x0000  },
+                  
+{ 0x002A, 0x0538  },//It_uCapMaxExp1 //
+{ 0x0F12, 0x3415  },
+{ 0x002A, 0x053C  },//It_uCapMaxExp2 //
+{ 0x0F12, 0x682A  },
+{ 0x002A, 0x1684  },//It_uCapMaxExp3 // 
+{ 0x0F12, 0x8235  },
+{ 0x002A, 0x1688  },//It_uCapMaxExp4 //
+{ 0x0F12, 0xc350  },
+{ 0x0F12, 0x0000  },
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x01B3  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x02A0  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710  },   //MaxAnGain4 //
+                  
+{ 0x002A, 0x0544  },
+{ 0x0F12, 0x0100  },//It_uMaxDigGain //
+
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_sunset_off[] =
+{
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_dawn_off[] =
+{
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_againstlight_off[] =
+{
+//NOT USE
+	              
+{ 0xffff, 0xffff  }, 
+};
+
+
+s5k5ca_short_t s5k5ca_scene_text_off[] =
+{
+//NOT USE
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_portrait_on[] =
+{
+//NOT USE
+{ 0xffff, 0xffff  },
+};
+
+
+
+
+s5k5ca_t s5k5ca_reg[] = 
+{
+	// To do.
+};
+
+// For VGA ( 640 x 480) on 4CA module
+s5k5ca_t s5k5ca_reg_vga[] = 
+{
+	// To do.
+};
+
+// For SVGA ( 800 x 600) on 4CA module
+s5k5ca_t s5k5ca_reg_svga[] = 
+{
+	// To do.
+};
+
+// For SXGA (1280 x 1024 = 1.3M) on 4CA module
+s5k5ca_t s5k5ca_reg_sxga[] = 
+{
+	// To do.
+};
+
+// For UXGA (1600 x 1200 = 2M) on 4CA module
+s5k5ca_t s5k5ca_reg_uxga[] = 
+{
+	// To do.
+};
+
+// For SQVGA on 4CA module
+s5k5ca_t s5k5ca_reg_qsvga[] = 
+{
+	// To do.
+};
+
+#define S5K5CA_INIT_REGS (sizeof(s5k5ca_reg)/sizeof(s5k5ca_reg[0]))
+#define S5K5CA_UXGA_REGS (sizeof(s5k5ca_reg_uxga)/sizeof(s5k5ca_reg_uxga[0]))
+#define S5K5CA_SVGA_REGS (sizeof(s5k5ca_reg_svga)/sizeof(s5k5ca_reg_svga[0]))
+#define S5K5CA_VGA_REGS (sizeof(s5k5ca_reg_vga)/sizeof(s5k5ca_reg_vga[0]))
+#define S5K5CA_QSVGA_REGS (sizeof(s5k5ca_reg_qsvga)/sizeof(s5k5ca_reg_qsvga[0]))
+
+//#define S5K5CA_RISC_REGS 0xEB
+//#define S5K5CA_ISP_REGS 0xFB /* S5C7323X */
+//#define S5K5CA_CIS_REGS 0x2F /* S5K437LA03 */
+                                                                                                                                                                                              
+//#define S5K5CA_REGS (0x1000)
+
+
+
+//delay 100ms phone SW //
+
+
+s5k5ca_short_t s5k5ca_snapshot_fireworks_00[] = // scene mode fireworks
+{ 
+
+//LowLight
+{ 0xFCFC, 0xD000 }, 
+{ 0x0028, 0x7000 },    
+{ 0x002A, 0x07E6 },
+{ 0x0F12, 0x0028 },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0028 },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+				 
+{ 0x002A, 0x0244 }, //Night capture//
+{ 0x0F12, 0x0002 }, //config 2 //
+{ 0x002A, 0x0230 }, 
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0246 }, 
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0224 }, 
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x0001 },
+
+{ 0xdddd, 0x06A4 }, //delay 1500ms 0304 Night Mode Change 
+
+{ 0xffff, 0xffff },
+};
+
+
+
+
+
+//---------------------------------------//
+// case 23 : FPS_NONFIX                     //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_nonfix_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x0288  },
+{ 0x0F12, 0x0535  },
+{ 0x0F12, 0x029A  },
+
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0230  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x023E  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+	
+{ 0xffff, 0xffff  },	
+};
+
+//---------------------------------------//
+// case 23 : FPS_15FIX                   //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_15fix_00[] = 
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x02B8 },
+{ 0x0F12, 0x029A },
+{ 0x0F12, 0x029A },
+
+
+{ 0x002A, 0x023C }, //Normal Preview//
+{ 0x0F12, 0x0001 }, //config 1 //                                                  
+{ 0x002A, 0x0240 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0230 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x023E },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0220 }, 
+{ 0x0F12, 0x0001 },	
+{ 0x002A, 0x0222 }, 
+{ 0x0F12, 0x0001 },
+
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_7FIX                    //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_7fix_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x02B8  },
+{ 0x0F12, 0x0535  },
+{ 0x0F12, 0x0535  },
+
+
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0001  }, //config 1 //                                                  
+{ 0x002A, 0x0240  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0230  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x023E  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  },   
+                  
+{ 0xffff, 0xffff  },
+};
+
+////////////
+// EFFECT_OFF
+////////////
+s5k5ca_short_t s5k5ca_effect_off_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x3286  }, //Pre/Post gamma on(ç›”æ±—)
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0000  },
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 16 : MonoEffect                  //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_effect_gray_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0001  },
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 20 : NegativeEffect              //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_effect_negative_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0003  },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////
+// EFFECT_SEPIA
+/////////////
+s5k5ca_short_t s5k5ca_effect_sepia_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0004  },
+
+{ 0xffff, 0xffff  },
+};
+
+////////////
+// EFFECT_AQUA
+/////////////
+s5k5ca_short_t s5k5ca_effect_aqua_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0005  },
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 19 : GREENEffect(sketch)         //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_effect_sketch_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x3286  },
+{ 0x0F12, 0x0000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0006  },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////
+// WB_Auto
+/////////////
+s5k5ca_short_t s5k5ca_wb_auto_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x246E  },
+{ 0x0F12, 0x0001  },
+
+{ 0xffff, 0xffff  },
+};                
+
+///////////
+// WB_Sunny
+//////////
+s5k5ca_short_t s5k5ca_wb_sunny_00[] = 
+{ 
+{ 0xfcfc, 0xd000  }, 
+{ 0x0028, 0x7000  }, 
+{ 0x002a, 0x246E  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x002a, 0x04A0  }, 
+{ 0x0f12, 0x05E0  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0400  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0500  }, //0530
+{ 0x0f12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////
+// WB_Cloudy
+///////////
+s5k5ca_short_t s5k5ca_wb_cloudy_00[] = 
+{ 
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+{ 0x002a, 0x246E  },
+{ 0x0f12, 0x0000  },
+{ 0x002a, 0x04A0  },
+{ 0x0f12, 0x06E0  }, //06B0 
+{ 0x0f12, 0x0001  }, //0001 
+{ 0x0f12, 0x0400  }, //0400 
+{ 0x0f12, 0x0001  }, //0001 
+{ 0x0f12, 0x0448  }, //0460 
+{ 0x0f12, 0x0001  }, //0001 
+
+{ 0xffff, 0xffff  },
+};
+
+////////////
+// WB_Tungsten
+////////////
+s5k5ca_short_t s5k5ca_wb_tungsten_00[] = 
+{ 
+{ 0xfcfc, 0xd000  }, 
+{ 0x0028, 0x7000  }, 
+{ 0x002a, 0x246E  }, 
+{ 0x0f12, 0x0000  }, 
+
+{ 0x002a, 0x04A0  }, 
+{ 0x0f12, 0x03D0  },  //03D0
+{ 0x0f12, 0x0001  },  //0001
+{ 0x0f12, 0x0400  },  //0400
+{ 0x0f12, 0x0001  },  //0001
+{ 0x0f12, 0x0910  },  //0920
+{ 0x0f12, 0x0001  },  //0001 
+                  
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// WB_Flourescent
+///////////////
+s5k5ca_short_t s5k5ca_wb_fluorescent_00[] = 
+{ 
+{ 0xfcfc, 0xd000  }, 
+{ 0x0028, 0x7000  }, 
+{ 0x002a, 0x246E  }, 
+{ 0x0f12, 0x0000  }, 
+                     
+{ 0x002a, 0x04A0  }, 
+{ 0x0f12, 0x0530  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0400  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0800  }, 
+{ 0x0f12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+
+////////////
+// BR_Minus4
+///////////
+s5k5ca_short_t s5k5ca_br_minus4_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+//////////
+// BR_Minus3
+/////////
+s5k5ca_short_t s5k5ca_br_minus3_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+//////////
+// BR_Minus2
+//////////
+s5k5ca_short_t s5k5ca_br_minus2_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};                
+
+//////////
+// BR_Minus1
+//////////
+s5k5ca_short_t s5k5ca_br_minus1_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_ZERO
+////////
+s5k5ca_short_t s5k5ca_br_zero_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_Plus1
+/////////
+s5k5ca_short_t s5k5ca_br_plus1_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_Plus2
+/////////
+s5k5ca_short_t s5k5ca_br_plus2_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_Plus3
+/////////
+s5k5ca_short_t s5k5ca_br_plus3_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};                
+
+/////////
+// BR_Plus4
+/////////
+s5k5ca_short_t s5k5ca_br_plus4_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+
+////////////////////
+// SCENE_MODE_OFF
+////////////////////
+//////////////////////////////////////////////
+//////////Scene off///////////////////////////
+//////////////////////////////////////////////
+//01.None//
+//02.Sports off
+//03.Night off
+//////////////////////////////////////////////
+////////// CAM_REGSET_SCENE_NORMAL ///////////
+s5k5ca_short_t s5k5ca_scene_mode_off_00[] =
+{ 
+
+{ 0xFCFC, 0xD000 },   //WB Auto
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x246E },
+{ 0x0F12, 0x0001 },
+
+{ 0x0028, 0x7000 },   //For Scene//
+{ 0x002A, 0x020C },   
+{ 0x0F12, 0x0000 },   // Brightness for controling the EV//
+{ 0x002A, 0x0210 },   
+{ 0x0F12, 0x0000 },   // Saturation//
+{ 0x0F12, 0x0000 },   // Blur_Sharpness //  
+	
+///////////////////
+//02. Sports off //
+///////////////////
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x12B8 },  
+{ 0x0F12, 0x1000 }, 
+ 
+{ 0x002A, 0x0530 },   	                                                    
+{ 0x0F12, 0x3415 },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534 },                                                               
+{ 0x0F12, 0x682A },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C },                                                               
+{ 0x0F12, 0x8235 },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680 },                                                               
+{ 0x0F12, 0xc350 },   //MaxExp4   125ms  38ea //                           
+        
+{ 0x002A, 0x0538 },                                                               
+{ 0x0F12, 0x3415 },   // 15fps //                                                 
+{ 0x002A, 0x053C },                                                               
+{ 0x0F12, 0x682A },   // 7.5fps //                                                
+{ 0x002A, 0x1684 },                                                               
+{ 0x0F12, 0x8235 },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688 },                                                               
+{ 0x0F12, 0xC350 },   //CapMaxExp4 //                                             
+
+{ 0x002A, 0x0540 },                                                               
+{ 0x0F12, 0x01B3 },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3 },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C },                                                               
+{ 0x0F12, 0x02A0 },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710 },   //MaxAnGain4 //    
+
+{ 0x002A, 0x0544 },  
+{ 0x0F12, 0x0100 },
+{ 0x0F12, 0x8000 },
+
+{ 0x002A, 0x04B4 },  
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x0064 },
+{ 0x0F12, 0x0001 },
+
+//////////////////
+//03. Night off //
+//////////////////
+
+{ 0x0028, 0x7000 },
+
+{ 0x002A, 0x0530 },//lt_uMaxExp1//     
+{ 0x0F12, 0x3415 },                    
+{ 0x002A, 0x0534 },//lt_uMaxExp2//     
+{ 0x0F12, 0x682A },                    
+{ 0x002A, 0x167C },//lt_uMaxExp3//     
+{ 0x0F12, 0x8235 },                    
+{ 0x002A, 0x1680 },//lt_uMaxExp4//     
+{ 0x0F12, 0xc350 },                    
+{ 0x0F12, 0x0000 },                    
+                                     
+{ 0x002A, 0x0538 },//It_uCapMaxExp1 // 
+{ 0x0F12, 0x3415 },                    
+{ 0x002A, 0x053C },//It_uCapMaxExp2 // 
+{ 0x0F12, 0x682A },                    
+{ 0x002A, 0x1684 },//It_uCapMaxExp3 // 
+{ 0x0F12, 0x8235 },                    
+{ 0x002A, 0x1688 },//It_uCapMaxExp4 // 
+{ 0x0F12, 0xc350 },                    
+{ 0x0F12, 0x0000 },                    
+                                     
+{ 0x002A, 0x0540 },                                                               
+{ 0x0F12, 0x01B3 },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3 },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C },                                                               
+{ 0x0F12, 0x02A0 },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710 },   //MaxAnGain4 //
+                                     
+{ 0x002A, 0x0544 },                    
+{ 0x0F12, 0x0100 },//It_uMaxDigGain // 
+
+{ 0x002A, 0x07E6 },
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+
+{ 0x002A, 0x0838 },
+{ 0x0F12, 0x003C },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x023C },
+{ 0x0F12, 0x0000 },//REG_TC_GP_ActivePrevConfig     //Normal Preview //  
+{ 0x002A, 0x0240 },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_PrevOpenAfterChange  
+{ 0x002A, 0x0230 },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_NewConfigSync        
+{ 0x002A, 0x023E },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_PrevConfigChanged    
+{ 0x002A, 0x0220 },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_EnablePreview        
+{ 0x0F12, 0x0001 },   //REG_TC_GP_EnablePreviewChanged 
+
+//Metering Center
+{ 0xfcfc, 0xd000 },
+{ 0x0028, 0x7000 },             
+                                                            
+{ 0x002A, 0x0F7E },    //ae weight  //     
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0201 },  //0201
+{ 0x0F12, 0x0102 },  //0102
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0201 },  //0101
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0102 },  //0101
+{ 0x0F12, 0x0201 },  //0201
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0102 },  //0102
+{ 0x0F12, 0x0101 },  //0201
+{ 0x0F12, 0x0101 },  //0202
+{ 0x0F12, 0x0101 },  //0202
+{ 0x0F12, 0x0101 },  //0102
+
+{ 0xffff, 0xffff  },
+};
+
+////////////////////
+// SCENE_PORTRAIT_ON
+///////////////////
+s5k5ca_short_t s5k5ca_scene_portrait_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x020C },
+{ 0x0F12, 0x0000 },
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x0000 },
+{ 0x0F12, 0xFFF6 },
+
+{ 0xffff, 0xffff  },
+};
+
+ 
+////////////////////
+// SCENE_LANDSCAPE_ON
+///////////////////
+s5k5ca_short_t s5k5ca_scene_landscape_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x020C },
+{ 0x0F12, 0x0000 },
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x001E },
+{ 0x0F12, 0x000A },
+
+//Metering Matrix
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+                  
+{ 0x002a, 0x0F7E  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  },
+
+{ 0xffff, 0xffff  }, 
+};
+
+////////////////////
+// NIGHTMODE_ON
+///////////////////
+
+s5k5ca_short_t s5k5ca_nightmode_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },  
+{ 0x002A, 0x02CC },   //Night Preview
+{ 0x0F12, 0x0400 },	//REG_2TC_PCFG_usWidth                      	2   700002CC    // 
+{ 0x0F12, 0x0300 },   //REG_2TC_PCFG_usHeight                     	2   700002CE    // 
+{ 0x0F12, 0x0005 },   //REG_2TC_PCFG_Format                       	2   700002D0    // 
+{ 0x0F12, 0x32E8 },   //REG_2TC_PCFG_usMaxOut4KHzRate             	2   700002D2    // 
+{ 0x0F12, 0x32a8 },   //REG_2TC_PCFG_usMinOut4KHzRate             	2   700002D4    // 
+{ 0x0F12, 0x0100 },   //REG_2TC_PCFG_OutClkPerPix88               	2   700002D6    // 
+{ 0x0F12, 0x0800 },   //REG_2TC_PCFG_uMaxBpp88                    	2   700002D8    // 
+{ 0x0F12, 0x0072 },   //REG_2TC_PCFG_PVIMask                      	2   700002DA    // 
+{ 0x0F12, 0x0010 },   //REG_2TC_PCFG_OIFMask                      	2   700002DC    // 
+{ 0x0F12, 0x01E0 },   //REG_2TC_PCFG_usJpegPacketSize             	2   700002DE    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_usJpegTotalPackets           	2   700002E0    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_uClockInd                    	2   700002E2    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_usFrTimeType                 	2   700002E4    // 
+{ 0x0F12, 0x0001 },   //REG_2TC_PCFG_FrRateQualityType            	2   700002E6    // 
+{ 0x0F12, 0x09C4 },   //REG_2TC_PCFG_usMaxFrTimeMsecMult10        	2   700002E8    // 
+{ 0x0F12, 0x029A },   //REG_2TC_PCFG_usMinFrTimeMsecMult10        	2   700002EA    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_bSmearOutput                 	2   700002EC    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_sSaturation                  	2   700002EE    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_sSharpBlur                   	2   700002F0    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_sColorTemp                   	2   700002F2    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_uDeviceGammaIndex            	2   700002F4    // 
+{ 0x0F12, 0x0003 },   //REG_2TC_PCFG_uPrevMirror                  	2   700002F6    // 
+{ 0x0F12, 0x0003 },   //REG_2TC_PCFG_uCaptureMirror               	2   700002F8    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_uRotation                    	2   700002FA    // 
+                 
+{ 0x002A, 0x03B4 },   //Night Capture 
+{ 0x0F12, 0x0000 },	//REG_2TC_CCFG_uCaptureMode                 	2   700003B4          //
+{ 0x0F12, 0x0800 },   //REG_2TC_CCFG_usWidth                      	2   700003B6          //
+{ 0x0F12, 0x0600 },   //REG_2TC_CCFG_usHeight                     	2   700003B8          //
+{ 0x0F12, 0x0005 },   //REG_2TC_CCFG_Format                       	2   700003BA          //
+{ 0x0F12, 0x32E8 },   //REG_2TC_CCFG_usMaxOut4KHzRate             	2   700003BC          //
+{ 0x0F12, 0x32a8 },   //REG_2TC_CCFG_usMinOut4KHzRate             	2   700003BE          //
+{ 0x0F12, 0x0100 },   //REG_2TC_CCFG_OutClkPerPix88               	2   700003C0          //
+{ 0x0F12, 0x0800 },   //REG_2TC_CCFG_uMaxBpp88                    	2   700003C2          //
+{ 0x0F12, 0x0072 },   //REG_2TC_CCFG_PVIMask                      	2   700003C4          //
+{ 0x0F12, 0x0010 },   //REG_2TC_CCFG_OIFMask                      	2   700003C6          //
+{ 0x0F12, 0x01E0 },   //REG_2TC_CCFG_usJpegPacketSize             	2   700003C8          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_usJpegTotalPackets           	2   700003CA          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_uClockInd                    	2   700003CC          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_usFrTimeType                 	2   700003CE          //
+{ 0x0F12, 0x0002 },   //REG_2TC_CCFG_FrRateQualityType            	2   700003D0          //
+{ 0x0F12, 0x1388 },   //REG_2TC_CCFG_usMaxFrTimeMsecMult10        	2   700003D2          //
+{ 0x0F12, 0x1388 },   //REG_2TC_CCFG_usMinFrTimeMsecMult10        	2   700003D4          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_bSmearOutput                 	2   700003D6          //
+{ 0x0F12, 0x0030 },   //REG_2TC_CCFG_sSaturation                  	2   700003D8          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_sSharpBlur                   	2   700003DA          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_sColorTemp                   	2   700003DC          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_uDeviceGammaIndex            	2   700003DE          //
+                 
+                 
+{ 0x002A, 0x0208 },
+{ 0x0F12, 0x0001 },   //REG_TC_IPRM_InitParamsUpdated//
+                 
+                 
+{ 0x002A, 0x0530 },   //lt_uMaxExp1//     
+{ 0x0F12, 0x3415 },                       
+{ 0x002A, 0x0534 },   //lt_uMaxExp2//     
+{ 0x0F12, 0x682A },                       
+{ 0x002A, 0x167C },   //lt_uMaxExp3//     
+{ 0x0F12, 0x8235 },                       
+{ 0x002A, 0x1680 },   //lt_uMaxExp4//     
+{ 0x0F12, 0x1A80 },                       
+{ 0x0F12, 0x0006 },                       
+                                          
+{ 0x002A, 0x0538 },   //It_uCapMaxExp1 // 
+{ 0x0F12, 0x3415 },                       
+{ 0x002A, 0x053C },   //It_uCapMaxExp2 // 
+{ 0x0F12, 0x682A },                       
+{ 0x002A, 0x1684 },   //It_uCapMaxExp3 // 
+{ 0x0F12, 0x8235 },                       
+{ 0x002A, 0x1688 },   //It_uCapMaxExp4 // 
+{ 0x0F12, 0x1A80 },                       
+{ 0x0F12, 0x0006 },                       
+                                          
+{ 0x002A, 0x0540 },                       
+{ 0x0F12, 0x0180 },   //It_uMaxAnGain1 // 
+{ 0x0F12, 0x0250 },   //It_uMaxAnGain2 // 
+{ 0x002A, 0x168C },                       
+{ 0x0F12, 0x0340 },   //It_uMaxAnGain3 // 
+{ 0x0F12, 0x0800 },   //It_uMaxAnGain4 // 
+                                          
+{ 0x002A, 0x0544 },                       
+{ 0x0F12, 0x0100 },   //It_uMaxDigGain // 
+                 
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x07E6 },
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+                 
+{ 0x002A, 0x0838 },
+{ 0x0F12, 0x0A3C },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x023C },
+{ 0x0F12, 0x0002 },  //night preview config 2//
+{ 0x002A, 0x0240 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0230 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x023E },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0220 },
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x0001 },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////////
+// SCENE_SPORTS_ON
+////////////////
+s5k5ca_short_t s5k5ca_scene_sports_on_00[] =
+{
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+
+{ 0x002A, 0x12B8 },  
+{ 0x0F12, 0x2000 }, 
+
+{ 0x002A, 0x0530 },
+{ 0x0F12, 0x36B0 },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534 },                                                               
+{ 0x0F12, 0x36B0 },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C },                                                               
+{ 0x0F12, 0x36B0 },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680 },                                                               
+{ 0x0F12, 0x36B0 },   //MaxExp4   125ms  38ea //                           
+        
+{ 0x002A, 0x0538 },                                                               
+{ 0x0F12, 0x36B0 },   // 15fps //                                                 
+{ 0x002A, 0x053C },                                                               
+{ 0x0F12, 0x36B0 },   // 7.5fps //                                                
+{ 0x002A, 0x1684 },                                                               
+{ 0x0F12, 0x36B0 },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688 },                                                               
+{ 0x0F12, 0x36B0 },   //CapMaxExp4 //                                             
+ 
+{ 0x002A, 0x0540 },                                                               
+{ 0x0F12, 0x0200 },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200 },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C },                                                               
+{ 0x0F12, 0x0200 },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200 },   //MaxAnGain4 //    
+
+{ 0x002A, 0x0544 },  
+{ 0x0F12, 0x0100 },
+{ 0x0F12, 0x8000 },
+
+{ 0x002A, 0x04B4 },  
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x00C8 },
+{ 0x0F12, 0x0001 },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////////
+// SCENE_SUNSET_ON
+////////////////
+s5k5ca_short_t s5k5ca_scene_sunset_on_00[] =
+{ 
+{ 0xfcfc, 0xd000 },
+{ 0x0028, 0x7000 },
+{ 0x002a, 0x246E },
+{ 0x0f12, 0x0000 },
+                 
+{ 0x002a, 0x04A0 },
+{ 0x0f12, 0x05E0 },
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0400 },
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0500 },
+{ 0x0f12, 0x0001 },
+
+{ 0xffff, 0xffff  },
+};
+
+////////////////
+// SCENE_DAWN_ON
+////////////////
+s5k5ca_short_t s5k5ca_scene_dawn_on_00[] =
+{ 
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+
+//////////////////////
+// SCENE_AGAINSTLIGHT_ON
+//////////////////////
+s5k5ca_short_t s5k5ca_scene_againstlight_on_00[] =
+{ 
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_TEXT_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_text_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x020C },
+{ 0x0F12, 0x0000 },
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x0000 },
+{ 0x0F12, 0x0014 },
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_PARTY_INDOOR_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_party_indoor_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+                    // Party/indoor _ Shaturation +1
+{ 0x0028, 0x7000 }, //For Scene
+{ 0x002A, 0x020C },             
+{ 0x0F12, 0x0000 }, // Brightness for controling the EV
+{ 0x002A, 0x0210 }, 
+{ 0x0F12, 0x001e }, // Saturagon
+{ 0x0F12, 0x0000 }, // Sharpness
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_BEACH_SNOW_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_beach_snow_on_00[] =
+{ 
+//04. BEACH_SNOW
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 }, //For Scene
+{ 0x002A, 0x020C },             
+{ 0x0F12, 0x0014 }, // Brightness for controling the EV
+{ 0x002A, 0x0210 }, 
+{ 0x0F12, 0x001e }, // Saturagon
+{ 0x0F12, 0x0000 }, // Sharpness
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_CANDLELIGHT_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_candlelight_on_00[] =
+{ 
+
+{ 0xfcfc, 0xd000 }, 
+{ 0x0028, 0x7000 }, 
+{ 0x002a, 0x246E }, 	 
+{ 0x0f12, 0x0000 },
+
+{ 0x002a, 0x04A0 }, 	 
+{ 0x0f12, 0x05E0 },
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0400 }, 
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0500 },
+{ 0x0f12, 0x0001 }, 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_FIREWORKS_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_fireworks_on_00[] =
+{ 
+//09. FIRE _ Preview : (4fps Exposure 250ms) Capture : ( 1fps Exposure 1000ms )
+//Preview 4fps : Capture 1fps
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x02CC },
+{ 0x0F12, 0x0400 },    	//REG_2TC_PCFG_usWidth                      	2   700002CC        //
+{ 0x0F12, 0x0300 },    	//REG_2TC_PCFG_usHeight                     	2   700002CE        //
+{ 0x0F12, 0x0005 },    	//REG_2TC_PCFG_Format                       	2   700002D0        //
+{ 0x0F12, 0x32E8 },    	//REG_2TC_PCFG_usMaxOut4KHzRate             	2   700002D2        //
+{ 0x0F12, 0x32a8 },    	//REG_2TC_PCFG_usMinOut4KHzRate             	2   700002D4        //
+{ 0x0F12, 0x0100 },    	//REG_2TC_PCFG_OutClkPerPix88               	2   700002D6        //
+{ 0x0F12, 0x0800 },    	//REG_2TC_PCFG_uMaxBpp88                    	2   700002D8        //
+{ 0x0F12, 0x0072 },    	//REG_2TC_PCFG_PVIMask                      	2   700002DA        //
+{ 0x0F12, 0x0010 },    	//REG_2TC_PCFG_OIFMask                      	2   700002DC        //
+{ 0x0F12, 0x01E0 },    	//REG_2TC_PCFG_usJpegPacketSize             	2   700002DE        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_usJpegTotalPackets           	2   700002E0        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_uClockInd                    	2   700002E2        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_usFrTimeType                 	2   700002E4        //
+{ 0x0F12, 0x0001 },    	//REG_2TC_PCFG_FrRateQualityType            	2   700002E6        //
+{ 0x0F12, 0x09C4 },    	//REG_2TC_PCFG_usMaxFrTimeMsecMult10        	2   700002E8        //
+{ 0x0F12, 0x029A },    	//REG_2TC_PCFG_usMinFrTimeMsecMult10        	2   700002EA        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_bSmearOutput                 	2   700002EC        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_sSaturation                  	2   700002EE        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_sSharpBlur                   	2   700002F0        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_sColorTemp                   	2   700002F2        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_uDeviceGammaIndex            	2   700002F4        //
+{ 0x0F12, 0x0003 },    	//REG_2TC_PCFG_uPrevMirror                  	2   700002F6        //
+{ 0x0F12, 0x0003 },    	//REG_2TC_PCFG_uCaptureMirror               	2   700002F8        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_uRotation                    	2   700002FA        //
+
+//Night shot capture 2fps
+{ 0x002A, 0x03B4 },
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_uCaptureMode                 	2   700003B4              //
+{ 0x0F12, 0x0800 },    	//REG_2TC_CCFG_usWidth                      	2   700003B6              //
+{ 0x0F12, 0x0600 },    	//REG_2TC_CCFG_usHeight                     	2   700003B8              //
+{ 0x0F12, 0x0005 },    	//REG_2TC_CCFG_Format                       	2   700003BA              //
+{ 0x0F12, 0x32E8 },    	//REG_2TC_CCFG_usMaxOut4KHzRate             	2   700003BC              //
+{ 0x0F12, 0x32a8 },    	//REG_2TC_CCFG_usMinOut4KHzRate             	2   700003BE              //
+{ 0x0F12, 0x0100 },    	//REG_2TC_CCFG_OutClkPerPix88               	2   700003C0              //
+{ 0x0F12, 0x0800 },    	//REG_2TC_CCFG_uMaxBpp88                    	2   700003C2              //
+{ 0x0F12, 0x0072 },    	//REG_2TC_CCFG_PVIMask                      	2   700003C4              //
+{ 0x0F12, 0x0010 },    	//REG_2TC_CCFG_OIFMask                      	2   700003C6              //
+{ 0x0F12, 0x01E0 },    	//REG_2TC_CCFG_usJpegPacketSize             	2   700003C8              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_usJpegTotalPackets           	2   700003CA              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_uClockInd                    	2   700003CC              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_usFrTimeType                 	2   700003CE              //
+{ 0x0F12, 0x0002 },    	//REG_2TC_CCFG_FrRateQualityType            	2   700003D0              //
+{ 0x0F12, 0x2710 },	//REG_2TC_CCFG_usMaxFrTimeMsecMult10        	2   700003D2              //
+{ 0x0F12, 0x2710 },	//REG_2TC_CCFG_usMinFrTimeMsecMult10        	2   700003D4              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_bSmearOutput                 	2   700003D6              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_sSaturation                  	2   700003D8              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_sSharpBlur                   	2   700003DA              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_sColorTemp                   	2   700003DC              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_uDeviceGammaIndex            	2   700003DE              //
+
+{ 0x002A, 0x0208 },                                      
+{ 0x0F12, 0x0001 },       //REG_TC_IPRM_InitParamsUpdated//
+
+{ 0x002A, 0x0530 },	//lt_uMaxExp1             
+{ 0x0F12, 0x3415 },		
+{ 0x002A, 0x0534 },       //lt_uMaxExp2              
+{ 0x0F12, 0x682A },		
+{ 0x002A, 0x167C },       //lt_uMaxExp3              
+{ 0x0F12, 0x8235 },		
+{ 0x002A, 0x1680 },       //lt_uMaxExp4              
+{ 0x0F12, 0x1A80 },       //1fps
+{ 0x0F12, 0x0006 },
+                              
+{ 0x002A, 0x0538 },       //It_uCapMaxExp1 //              
+{ 0x0F12, 0x3415 },	  
+{ 0x002A, 0x053C },       //It_uCapMaxExp1 //             
+{ 0x0F12, 0x682A },	  
+{ 0x002A, 0x1684 },       //It_uCapMaxExp3 //              
+{ 0x0F12, 0x8235 },	
+{ 0x002A, 0x1688 },       //It_uCapMaxExp4 //             
+{ 0x0F12, 0x1A80 },       //1fps
+{ 0x0F12, 0x0006 },	
+                              
+{ 0x002A, 0x0540 },                     
+{ 0x0F12, 0x0180 },       //It_uMaxAnGain1 //
+{ 0x0F12, 0x0250 },	//It_uMaxAnGain2 //
+{ 0x002A, 0x168C },                     
+{ 0x0F12, 0x0340 },	//It_uMaxAnGain3 //
+{ 0x0F12, 0x0710 },	//It_uMaxAnGain4 //
+
+{ 0x002A, 0x0544 },       //It_uMaxDigGain //
+{ 0x0F12, 0x0100 },
+
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x023C },
+{ 0x0F12, 0x0002 },	//#REG_TC_GP_ActivePrevConfig     //Night Preview
+{ 0x002A, 0x0240 },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_PrevOpenAfterChange
+{ 0x002A, 0x0230 },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_NewConfigSync
+{ 0x002A, 0x023E },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_PrevConfigChanged
+{ 0x002A, 0x0220 },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_EnablePreview
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_EnablePreviewChanged
+ 
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_Dust_Dawn_On
+///////////////
+s5k5ca_short_t s5k5ca_scene_dust_dawn_00[] =
+{ 
+//Cam_Cfg_WB_Fluorescent
+{ 0xfcfc, 0xd000 }, 
+{ 0x0028, 0x7000 }, 
+{ 0x002a, 0x246E }, 	 
+{ 0x0f12, 0x0000 },
+
+{ 0x002a, 0x04A0 }, 	 
+{ 0x0f12, 0x0530 }, 
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0400 }, 
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0800 }, 
+{ 0x0f12, 0x0001 }, 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_Fall_Color_On
+///////////////
+s5k5ca_short_t s5k5ca_scene_fall_color_00[] =
+{ 
+//07. FALL
+{ 0xFCFC, 0xD000 },
+//  Fall  _ Saturation +2
+{ 0x0028, 0x7000 }, //For Scene
+{ 0x002A, 0x020C },             
+{ 0x0F12, 0x0000 }, // Brightness for controling the EV
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x0032 }, // Saturation
+{ 0x0F12, 0x0000 }, // Sharpness
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_Backlight_On
+///////////////
+s5k5ca_short_t s5k5ca_scene_backlight_00[] =
+{ 
+//Metering Center
+//Flash On Default
+{ 0xfcfc, 0xd000 },
+{ 0x0028, 0x7000 },
+                 
+{ 0x002A, 0x0F7E  },    //ae weight  //     
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0201
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0102
+
+{ 0xffff, 0xffff  },
+};
+
+
+
+
+////////////////////////
+// MeasureBrightness_SPOT
+///////////////////////
+s5k5ca_short_t s5k5ca_measure_brightness_spot_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////////////////
+// MeasureBrightness_Default
+//////////////////////////
+s5k5ca_short_t s5k5ca_measure_brightness_default_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+#if 1//PGH 
+s5k5ca_short_t s5k5ca_ae_awb_unlock[] = 
+{
+{ 0xffff, 0xffff  },
+
+};
+ 
+s5k5ca_short_t s5k5ca_ae_mwb_unlock[] = 
+{
+{ 0xffff, 0xffff  },
+
+};
+ 
+s5k5ca_short_t s5k5ca_ae_awb_lock[] = 
+{
+{ 0xffff, 0xffff  },
+
+};
+#endif//PGH
+
+
+s5k5ca_short_t s5k5ca_af_low_lux_val[] = 
+{ //0217 SEMCO
+
+{ 0xffff, 0xffff  },
+};
+	 
+s5k5ca_short_t s5k5ca_af_normal_lux_val[] = 
+{
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////////////////////
+// MeasureBrightness_CENTER
+/////////////////////////////
+s5k5ca_short_t s5k5ca_measure_brightness_center_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+// 0407 function add.
+
+s5k5ca_short_t s5k5ca_metering_spot[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+                    
+{ 0x002A, 0x0F7E  },
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0f01  }, 
+{ 0x0f12, 0x010f  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0f01  }, 
+{ 0x0f12, 0x010f  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  },
+
+{ 0xffff, 0xffff  },
+
+};
+
+s5k5ca_short_t s5k5ca_metering_matrix[] = 
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+                  
+{ 0x002a, 0x0F7E  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  },
+
+{ 0xffff, 0xffff  },
+
+};
+
+s5k5ca_short_t s5k5ca_metering_center[] = 
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },             
+                                                             
+{ 0x002A, 0x0F7E  },    //ae weight  //     
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0201
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0102
+
+{ 0xffff, 0xffff  },
+
+};
+
+
+
+
+
+//define S5K5CA_INIT_REGS (sizeof(s5k5ca_reg)/sizeof(s5k5ca_reg[0]))
+//define S5K5CA_UXGA_REGS (sizeof(s5k5ca_reg_uxga)/sizeof(s5k5ca_reg_uxga[0]))
+//define S5K5CA_SVGA_REGS (sizeof(s5k5ca_reg_svga)/sizeof(s5k5ca_reg_svga[0]))
+//define S5K5CA_VGA_REGS (sizeof(s5k5ca_reg_vga)/sizeof(s5k5ca_reg_vga[0]))
+//define S5K5CA_QSVGA_REGS (sizeof(s5k5ca_reg_qsvga)/sizeof(s5k5ca_reg_qsvga[0]))
+
+////define S5K5CA_RISC_REGS 0xEB
+////define S5K5CA_ISP_REGS 0xFB /* S5C7323X */
+////define S5K5CA_CIS_REGS 0x2F /* S5K437LA03 */
+                                                                                                                                                                                              
+////define S5K5CA_REGS (0x1000)
+
+//endif
+
+
+
+#endif
diff -uNra linux-3.0.82/drivers/media/video/s5k5ca_320x240_rgb.h linux-3.0.82x/drivers/media/video/s5k5ca_320x240_rgb.h
--- linux-3.0.82/drivers/media/video/s5k5ca_320x240_rgb.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/s5k5ca_320x240_rgb.h	2017-09-23 03:42:49.566676445 +0800
@@ -0,0 +1,5403 @@
+
+#ifndef _SAMSUNG_SXGA_H_
+#define _SAMSUNG_SXGA_H_
+
+/*******************************************************************************************
+ #  Display resolution standards #
+
+	QCIF: 176 x 144
+	CIF: 352 x 288
+	QVGA: 320 x 240
+	VGA: 640 x 480 
+	SVGA: 800 x 600 
+	XGA: 1024 x 768 
+	WXGA: 1280 x 800 
+	QVGA: 1280 x 960 
+	SXGA: 1280 x 1024 
+	SXGA+: 1400 x 1050 
+	WSXGA+: 1680 x 1050 
+	UXGA: 1600 x 1200 
+	WUXGA: 1920 x 1200 
+	QXGA: 2048 x 1536
+********************************************************************************************/
+
+//#include "../bits.h"
+
+/* Camera information 
+ * FPC Label : Samsung MEGA Pixel Camera : V4220 REV06 
+ * Modified by charles -Initial function of '3AA' test routine
+ * Modified and tested by YongHwui.Kim <yonghwui.kim@samsung.com> for S5K3AAEX Camera
+ */
+                                                                                
+#define CHIP_DELAY 0xFF
+                                                                                
+typedef struct samsung_t{
+        unsigned short page;	
+        unsigned short subaddr;
+        unsigned short value;
+
+} s5k5ca_t;
+
+// mihee 080508 start
+typedef struct samsung_short_t{
+        unsigned short subaddr;
+        unsigned short value;
+        unsigned short page;
+} s5k5ca_short_t;
+// mihee 080508 end
+
+typedef struct exif_data_st{
+        unsigned short exposureTime;
+		unsigned short lux;
+		unsigned short iso;
+} exif_data_t;
+
+#ifdef CONFIG_CPU_S3C24A0A
+#define TRY_HIGH_CLOCK 1
+#endif
+
+				//***************************************************
+				//  name: 	S5K3AAEX EVT2 setfile
+				//  ver:		v2.61	
+				//  history: 	
+				//	v0.0	start from 040908 setfile
+				//	v1.0	arange register
+				//	v1.01	change MCLK(25Mhz) and Frame rate(7fps)
+				//	v2.0	adjust register setting for 3AA EVT2
+				//		- color correction, RGB shding off, hsync start position, Mirror, fps
+				//		- Color Tuning, YGRPDLY 
+				//	v2.1	change Frame rate(7.5fps) and Total gain to x4 
+				//		(because of reducing visual noise at low illumination)
+				//		- change BPRM AGC Max and FrameAE start 
+				//		improve AE speed
+				//	v2.2	modify AWB G gain and solve 50hz flicker detection fail in 25MHz 7.5fps
+				//	v2.3	Adjust gamma, Dark Slice, white point, Hue gain,
+				//		White Balance B control, Y gain On, Digital Clamp On
+				//		lower AWB G gain
+				//	v2.4	Adjust AE window weight, Y Gamma, WhitePoint, Shading and BPR Max Thres.
+				// 	v2.41	Adjust AE/AWB window and AWB internal window boundary to decrease skin color tracking
+				// 	v2.411	special version for PSCDS
+				// 	v2.412	RGB shading off
+				//	v2.5	Lens change STW to Sekonix 
+				//		adjust White point and Y shading Coef (RGB shading off)
+				//	v2.6	New Tuning because of Full YC off and YCbCr Coef change
+				//		Gamma, Dark Slice, color matrix (not use), Color suppress
+				//		R Gain and DBPR agc MIN/MAX
+				//	v2.61	VCK inversion(data rising)
+				//***************************************************
+				///////////////////////////////////////////////////
+
+//#if defined(CONFIG_VIDEO_SAMSUNG_S5K5CA)
+s5k5ca_short_t s5k5ca_preview_00[] = 
+{
+{ 0xFCFC, 0xD000  },                                                                                  
+{ 0x0028, 0x7000  }, 
+                  
+{ 0x002A, 0x07E6  },                                                            
+{ 0x0F12, 0x0000  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow 
+{ 0x0F12, 0x0000  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+                  
+{ 0x002A, 0x0838  },
+{ 0x0F12, 0x003C  },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x0908  },
+{ 0x0F12, 0x0046  },	//TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]
+
+//HIGHLUX RECOVER Value
+{ 0x002a, 0x0B2C  },
+{ 0x0F12, 0x003C  },	//70000B2C //TVAR_afit_pBaseValS[436] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x0050  },	//70000B2E //TVAR_afit_pBaseValS[437] /AFIT16_YUV422_DENOISE_iUVHighThresh  
+
+{ 0x002a, 0x0B50  },
+{ 0x0F12, 0x012D  },	//70000B50 //TVAR_afit_pBaseValS[454] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8] 
+
+{ 0x002a, 0x0B84  },
+{ 0x0F12, 0x210C  },	//70000B84 //TVAR_afit_pBaseValS[480] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]   
+
+
+{ 0x002A, 0x035C  }, //Capture Mode//
+{ 0x0F12, 0x0000  },
+{ 0x002A, 0x0388  }, //Capture Mode//
+{ 0x0F12, 0x0000  },
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },   
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+s5k5ca_short_t s5k5ca_init_00[] = 
+{
+{ 0xFCFC, 0xD000  },
+
+//************************************//
+////****************************************/																															//
+////Ver 0.1 New Analog Settings for 5CA EVT0 30FPS in Binning, including latest TnP for EVT1              //
+////20091310 - added analog settings for 430LSB, long exposure mode only. Settings are for 32MHz Sys. CLK //
+////20091102 - added all calibration data, final settings for STW EVT1 module, SCLK 32MHz, PCLK 60 MHz.   //
+////20091104 - Changed the shading alpha &Near off                                                        //
+////20091104 - Changed awbb_GridEnable from 0001h to 0002h	//awbb_GridEnable                             //
+////aetarget41-46, gamma change for improving contrast                                                    //
+////20100113 - New TnP updated//
+
+{ 0xFCFC, 0xD000  },	//Reset                                  //
+{ 0x0010, 0x0001  },   //Clear host interrupt so main will wait //
+{ 0x1030, 0x0000  },   //ARM go                                 //
+{ 0x0014, 0x0001  },   //Wait100mSec
+                  
+{ 0xdddd, 0x0064  }, //delay 100ms
+                  
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x2CF8  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0x4827  },
+{ 0x0F12, 0x21C0  },
+{ 0x0F12, 0x8041  },
+{ 0x0F12, 0x4825  },
+{ 0x0F12, 0x4A26  },
+{ 0x0F12, 0x3020  },
+{ 0x0F12, 0x8382  },
+{ 0x0F12, 0x1D12  },
+{ 0x0F12, 0x83C2  },
+{ 0x0F12, 0x4822  },
+{ 0x0F12, 0x3040  },
+{ 0x0F12, 0x8041  },
+{ 0x0F12, 0x4821  },
+{ 0x0F12, 0x4922  },
+{ 0x0F12, 0x3060  },
+{ 0x0F12, 0x8381  },
+{ 0x0F12, 0x1D09  },
+{ 0x0F12, 0x83C1  },
+{ 0x0F12, 0x4821  },
+{ 0x0F12, 0x491D  },
+{ 0x0F12, 0x8802  },
+{ 0x0F12, 0x3980  },
+{ 0x0F12, 0x804A  },
+{ 0x0F12, 0x8842  },
+{ 0x0F12, 0x808A  },
+{ 0x0F12, 0x8882  },
+{ 0x0F12, 0x80CA  },
+{ 0x0F12, 0x88C2  },
+{ 0x0F12, 0x810A  },
+{ 0x0F12, 0x8902  },
+{ 0x0F12, 0x491C  },
+{ 0x0F12, 0x80CA  },
+{ 0x0F12, 0x8942  },
+{ 0x0F12, 0x814A  },
+{ 0x0F12, 0x8982  },
+{ 0x0F12, 0x830A  },
+{ 0x0F12, 0x89C2  },
+{ 0x0F12, 0x834A  },
+{ 0x0F12, 0x8A00  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x8188  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x4819  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xFA0E  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x4819  },
+{ 0x0F12, 0x6341  },
+{ 0x0F12, 0x4919  },
+{ 0x0F12, 0x4819  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xFA07  },
+{ 0x0F12, 0x4816  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x3840  },
+{ 0x0F12, 0x62C1  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x3880  },
+{ 0x0F12, 0x63C1  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x6301  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x3040  },
+{ 0x0F12, 0x6181  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x4817  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9F7  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x4817  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9F3  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x4817  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9EF  },
+{ 0x0F12, 0xBC10  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0x1100  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x267C  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x2CE8  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x3274  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xF400  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0xF520  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2DF1  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x89A9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x2E43  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x0140  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2E7D  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xB4F7  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x2F07  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2F2B  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2FD1  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2FE5  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2FB9  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x013D  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x306B  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x5823  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x30B9  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xD789  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0xB570  },
+{ 0x0F12, 0x6804  },
+{ 0x0F12, 0x6845  },
+{ 0x0F12, 0x6881  },
+{ 0x0F12, 0x6840  },
+{ 0x0F12, 0x2900  },
+{ 0x0F12, 0x6880  },
+{ 0x0F12, 0xD007  },
+{ 0x0F12, 0x49C3  },
+{ 0x0F12, 0x8949  },
+{ 0x0F12, 0x084A  },
+{ 0x0F12, 0x1880  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9BA  },
+{ 0x0F12, 0x80A0  },
+{ 0x0F12, 0xE000  },
+{ 0x0F12, 0x80A0  },
+{ 0x0F12, 0x88A0  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD010  },
+{ 0x0F12, 0x68A9  },
+{ 0x0F12, 0x6828  },
+{ 0x0F12, 0x084A  },
+{ 0x0F12, 0x1880  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9AE  },
+{ 0x0F12, 0x8020  },
+{ 0x0F12, 0x1D2D  },
+{ 0x0F12, 0xCD03  },
+{ 0x0F12, 0x084A  },
+{ 0x0F12, 0x1880  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9A7  },
+{ 0x0F12, 0x8060  },
+{ 0x0F12, 0xBC70  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0x2000  },
+{ 0x0F12, 0x8060  },
+{ 0x0F12, 0x8020  },
+{ 0x0F12, 0xE7F8  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9A2  },
+{ 0x0F12, 0x48B2  },
+{ 0x0F12, 0x8A40  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD00C  },
+{ 0x0F12, 0x48B1  },
+{ 0x0F12, 0x49B2  },
+{ 0x0F12, 0x8800  },
+{ 0x0F12, 0x4AB2  },
+{ 0x0F12, 0x2805  },
+{ 0x0F12, 0xD003  },
+{ 0x0F12, 0x4BB1  },
+{ 0x0F12, 0x795B  },
+{ 0x0F12, 0x2B00  },
+{ 0x0F12, 0xD005  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0x8008  },
+{ 0x0F12, 0x8010  },
+{ 0x0F12, 0xBC10  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD1FA  },
+{ 0x0F12, 0x2000  },
+{ 0x0F12, 0x8008  },
+{ 0x0F12, 0x8010  },
+{ 0x0F12, 0xE7F6  },
+{ 0x0F12, 0xB5F8  },
+{ 0x0F12, 0x2407  },
+{ 0x0F12, 0x2C06  },
+{ 0x0F12, 0xD035  },
+{ 0x0F12, 0x2C07  },
+{ 0x0F12, 0xD033  },
+{ 0x0F12, 0x48A3  },
+{ 0x0F12, 0x8BC1  },
+{ 0x0F12, 0x2900  },
+{ 0x0F12, 0xD02A  },
+{ 0x0F12, 0x00A2  },
+{ 0x0F12, 0x1815  },
+{ 0x0F12, 0x4AA4  },
+{ 0x0F12, 0x6DEE  },
+{ 0x0F12, 0x8A92  },
+{ 0x0F12, 0x4296  },
+{ 0x0F12, 0xD923  },
+{ 0x0F12, 0x0028  },
+{ 0x0F12, 0x3080  },
+{ 0x0F12, 0x0007  },
+{ 0x0F12, 0x69C0  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF96B  },
+{ 0x0F12, 0x1C71  },
+{ 0x0F12, 0x0280  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF967  },
+{ 0x0F12, 0x0006  },
+{ 0x0F12, 0x4898  },
+{ 0x0F12, 0x0061  },
+{ 0x0F12, 0x1808  },
+{ 0x0F12, 0x8D80  },
+{ 0x0F12, 0x0A01  },
+{ 0x0F12, 0x0600  },
+{ 0x0F12, 0x0E00  },
+{ 0x0F12, 0x1A08  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF96A  },
+{ 0x0F12, 0x0002  },
+{ 0x0F12, 0x6DE9  },
+{ 0x0F12, 0x6FE8  },
+{ 0x0F12, 0x1A08  },
+{ 0x0F12, 0x4351  },
+{ 0x0F12, 0x0300  },
+{ 0x0F12, 0x1C49  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF953  },
+{ 0x0F12, 0x0401  },
+{ 0x0F12, 0x0430  },
+{ 0x0F12, 0x0C00  },
+{ 0x0F12, 0x4301  },
+{ 0x0F12, 0x61F9  },
+{ 0x0F12, 0xE004  },
+{ 0x0F12, 0x00A2  },
+{ 0x0F12, 0x4990  },
+{ 0x0F12, 0x1810  },
+{ 0x0F12, 0x3080  },
+{ 0x0F12, 0x61C1  },
+{ 0x0F12, 0x1E64  },
+{ 0x0F12, 0xD2C5  },
+{ 0x0F12, 0x2006  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF959  },
+{ 0x0F12, 0x2007  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF956  },
+{ 0x0F12, 0xBCF8  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF958  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD00A  },
+{ 0x0F12, 0x4881  },
+{ 0x0F12, 0x8B81  },
+{ 0x0F12, 0x0089  },
+{ 0x0F12, 0x1808  },
+{ 0x0F12, 0x6DC1  },
+{ 0x0F12, 0x4883  },
+{ 0x0F12, 0x8A80  },
+{ 0x0F12, 0x4281  },
+{ 0x0F12, 0xD901  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0xE7A1  },
+{ 0x0F12, 0x2000  },
+{ 0x0F12, 0xE79F  },
+{ 0x0F12, 0xB5F8  },
+{ 0x0F12, 0x0004  },
+{ 0x0F12, 0x4F80  },
+{ 0x0F12, 0x227D  },
+{ 0x0F12, 0x8938  },
+{ 0x0F12, 0x0152  },
+{ 0x0F12, 0x4342  },
+{ 0x0F12, 0x487E  },
+{ 0x0F12, 0x9000  },
+{ 0x0F12, 0x8A01  },
+{ 0x0F12, 0x0848  },
+{ 0x0F12, 0x1810  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91D  },
+{ 0x0F12, 0x210F  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF940  },
+{ 0x0F12, 0x497A  },
+{ 0x0F12, 0x8C49  },
+{ 0x0F12, 0x090E  },
+{ 0x0F12, 0x0136  },
+{ 0x0F12, 0x4306  },
+{ 0x0F12, 0x4979  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0xD003  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0x0240  },
+{ 0x0F12, 0x4330  },
+{ 0x0F12, 0x8108  },
+{ 0x0F12, 0x4876  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0x8D00  },
+{ 0x0F12, 0xD001  },
+{ 0x0F12, 0x2501  },
+{ 0x0F12, 0xE000  },
+{ 0x0F12, 0x2500  },
+{ 0x0F12, 0x4972  },
+{ 0x0F12, 0x4328  },
+{ 0x0F12, 0x8008  },
+{ 0x0F12, 0x207D  },
+{ 0x0F12, 0x00C0  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF92E  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0x496E  },
+{ 0x0F12, 0x0328  },
+{ 0x0F12, 0x4330  },
+{ 0x0F12, 0x8108  },
+{ 0x0F12, 0x88F8  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0x01AA  },
+{ 0x0F12, 0x4310  },
+{ 0x0F12, 0x8088  },
+{ 0x0F12, 0x9800  },
+{ 0x0F12, 0x8A01  },
+{ 0x0F12, 0x486A  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8F1  },
+{ 0x0F12, 0x496A  },
+{ 0x0F12, 0x8809  },
+{ 0x0F12, 0x4348  },
+{ 0x0F12, 0x0400  },
+{ 0x0F12, 0x0C00  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF918  },
+{ 0x0F12, 0x0020  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91D  },
+{ 0x0F12, 0x4866  },
+{ 0x0F12, 0x7004  },
+{ 0x0F12, 0xE7A3  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0x0004  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91E  },
+{ 0x0F12, 0x6020  },
+{ 0x0F12, 0x4963  },
+{ 0x0F12, 0x8B49  },
+{ 0x0F12, 0x0789  },
+{ 0x0F12, 0xD001  },
+{ 0x0F12, 0x0040  },
+{ 0x0F12, 0x6020  },
+{ 0x0F12, 0xE74C  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91B  },
+{ 0x0F12, 0x485F  },
+{ 0x0F12, 0x8880  },
+{ 0x0F12, 0x0601  },
+{ 0x0F12, 0x4854  },
+{ 0x0F12, 0x1609  },
+{ 0x0F12, 0x8141  },
+{ 0x0F12, 0xE742  },
+{ 0x0F12, 0xB5F8  },
+{ 0x0F12, 0x000F  },
+{ 0x0F12, 0x4C55  },
+{ 0x0F12, 0x3420  },
+{ 0x0F12, 0x2500  },
+{ 0x0F12, 0x5765  },
+{ 0x0F12, 0x0039  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF913  },
+{ 0x0F12, 0x9000  },
+{ 0x0F12, 0x2600  },
+{ 0x0F12, 0x57A6  },
+{ 0x0F12, 0x4C4C  },
+{ 0x0F12, 0x42AE  },
+{ 0x0F12, 0xD01B  },
+{ 0x0F12, 0x4D54  },
+{ 0x0F12, 0x8AE8  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD013  },
+{ 0x0F12, 0x484D  },
+{ 0x0F12, 0x8A01  },
+{ 0x0F12, 0x8B80  },
+{ 0x0F12, 0x4378  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8B5  },
+{ 0x0F12, 0x89A9  },
+{ 0x0F12, 0x1A41  },
+{ 0x0F12, 0x484E  },
+{ 0x0F12, 0x3820  },
+{ 0x0F12, 0x8AC0  },
+{ 0x0F12, 0x4348  },
+{ 0x0F12, 0x17C1  },
+{ 0x0F12, 0x0D89  },
+{ 0x0F12, 0x1808  },
+{ 0x0F12, 0x1280  },
+{ 0x0F12, 0x8961  },
+{ 0x0F12, 0x1A08  },
+{ 0x0F12, 0x8160  },
+{ 0x0F12, 0xE003  },
+{ 0x0F12, 0x88A8  },
+{ 0x0F12, 0x0600  },
+{ 0x0F12, 0x1600  },
+{ 0x0F12, 0x8160  },
+{ 0x0F12, 0x200A  },
+{ 0x0F12, 0x5E20  },
+{ 0x0F12, 0x42B0  },
+{ 0x0F12, 0xD011  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8AB  },
+{ 0x0F12, 0x1D40  },
+{ 0x0F12, 0x00C3  },
+{ 0x0F12, 0x1A18  },
+{ 0x0F12, 0x214B  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF897  },
+{ 0x0F12, 0x211F  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8BA  },
+{ 0x0F12, 0x210A  },
+{ 0x0F12, 0x5E61  },
+{ 0x0F12, 0x0FC9  },
+{ 0x0F12, 0x0149  },
+{ 0x0F12, 0x4301  },
+{ 0x0F12, 0x483D  },
+{ 0x0F12, 0x81C1  },
+{ 0x0F12, 0x9800  },
+{ 0x0F12, 0xE74A  },
+{ 0x0F12, 0xB5F1  },
+{ 0x0F12, 0xB082  },
+{ 0x0F12, 0x2500  },
+{ 0x0F12, 0x483A  },
+{ 0x0F12, 0x9001  },
+{ 0x0F12, 0x2400  },
+{ 0x0F12, 0x2028  },
+{ 0x0F12, 0x4368  },
+{ 0x0F12, 0x4A39  },
+{ 0x0F12, 0x4925  },
+{ 0x0F12, 0x1887  },
+{ 0x0F12, 0x1840  },
+{ 0x0F12, 0x9000  },
+{ 0x0F12, 0x9800  },
+{ 0x0F12, 0x0066  },
+{ 0x0F12, 0x9A01  },
+{ 0x0F12, 0x1980  },
+{ 0x0F12, 0x218C  },
+{ 0x0F12, 0x5A09  },
+{ 0x0F12, 0x8A80  },
+{ 0x0F12, 0x8812  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8CA  },
+{ 0x0F12, 0x53B8  },
+{ 0x0F12, 0x1C64  },
+{ 0x0F12, 0x2C14  },
+{ 0x0F12, 0xDBF1  },
+{ 0x0F12, 0x1C6D  },
+{ 0x0F12, 0x2D03  },
+{ 0x0F12, 0xDBE6  },
+{ 0x0F12, 0x9802  },
+{ 0x0F12, 0x6800  },
+{ 0x0F12, 0x0600  },
+{ 0x0F12, 0x0E00  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8C5  },
+{ 0x0F12, 0xBCFE  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0xB570  },
+{ 0x0F12, 0x6805  },
+{ 0x0F12, 0x2404  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8C5  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD103  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8C9  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2400  },
+{ 0x0F12, 0x3540  },
+{ 0x0F12, 0x88E8  },
+{ 0x0F12, 0x0500  },
+{ 0x0F12, 0xD403  },
+{ 0x0F12, 0x4822  },
+{ 0x0F12, 0x89C0  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD002  },
+{ 0x0F12, 0x2008  },
+{ 0x0F12, 0x4304  },
+{ 0x0F12, 0xE001  },
+{ 0x0F12, 0x2010  },
+{ 0x0F12, 0x4304  },
+{ 0x0F12, 0x481F  },
+{ 0x0F12, 0x8B80  },
+{ 0x0F12, 0x0700  },
+{ 0x0F12, 0x0F81  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0x2900  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x4304  },
+{ 0x0F12, 0x491C  },
+{ 0x0F12, 0x8B0A  },
+{ 0x0F12, 0x42A2  },
+{ 0x0F12, 0xD004  },
+{ 0x0F12, 0x0762  },
+{ 0x0F12, 0xD502  },
+{ 0x0F12, 0x4A19  },
+{ 0x0F12, 0x3220  },
+{ 0x0F12, 0x8110  },
+{ 0x0F12, 0x830C  },
+{ 0x0F12, 0xE691  },
+{ 0x0F12, 0x0C3C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x3274  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x26E8  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x6100  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x6500  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x1A7C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1120  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xFFFF  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x3374  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1D6C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x167C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xF400  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2C2C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x40A0  },
+{ 0x0F12, 0x00DD  },
+{ 0x0F12, 0xF520  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2C29  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1A54  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1564  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xF2A0  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2440  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x05A0  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2894  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1224  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xB000  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x1A3F  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xF004  },
+{ 0x0F12, 0xE51F  },
+{ 0x0F12, 0x1F48  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x24BD  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x36DD  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xB4CF  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xB5D7  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x36ED  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xF53F  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xF5D9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x013D  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xF5C9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xFAA9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x3723  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x5823  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xD771  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xD75B  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x8117  },
+{ 0x0F12, 0x0000  },
+
+// End TnP part
+
+//========================================================                      
+// CIs/APs/An setting        - 400LsB  sYsCLK 32MHz                             
+//========================================================                      
+// This regis are for FACTORY ONLY. If you change it without prior notification,
+// YOU are REsIBLE for the FAILURE that will happen in the future.              
+//========================================================                      
+
+
+{ 0x002A, 0x157A  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x1578  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x1576  },
+{ 0x0F12, 0x0020  },
+{ 0x002A, 0x1574  },
+{ 0x0F12, 0x0006  },
+{ 0x002A, 0x156E  },
+{ 0x0F12, 0x0001  },	// slope calibration tolerance in units of 1/256	
+{ 0x002A, 0x1568  },
+{ 0x0F12, 0x00FC  },
+                  
+// /ADC control    
+{ 0x002A, 0x155A  },
+{ 0x0F12, 0x01CC  },	//ADC sAT of 450mV for 10bit default in EVT1                         	
+{ 0x002A, 0x157E  },                                                                        
+{ 0x0F12, 0x0C80  },	// 3200 Max. Reset ramp DCLK counts (default 2048 0x800)             
+{ 0x0F12, 0x0578  },	// 1400 Max. Reset ramp DCLK counts for x3.5                         
+{ 0x002A, 0x157C  },                                                                        
+{ 0x0F12, 0x0190  },	// 400 Reset ramp for x1 in DCLK counts                              
+{ 0x002A, 0x1570  },                                                                        
+{ 0x0F12, 0x00A0  },	// 160 LsB                                                           
+{ 0x0F12, 0x0010  },	// reset threshold                                                   
+{ 0x002A, 0x12C4  },                                                                        
+{ 0x0F12, 0x006A  },	// 106 additional timing columns.                                    
+{ 0x002A, 0x12C8  },                                                                        
+{ 0x0F12, 0x08AC  },	// 2220 ADC columns in normal mode including Hold & Latch            
+{ 0x0F12, 0x0050  },	// 80 addition of ADC columns in Y-ave mode (default 244 0x74)
+                  
+{ 0x002A, 0x1696  },	// based on APs guidelines                        
+{ 0x0F12, 0x0000  },   // based on APs guidelines                        
+{ 0x0F12, 0x0000  },   // default. 1492 used for ADC dark characteristics
+{ 0x0F12, 0x00C6  },   // default. 1492 used for ADC dark characteristics
+{ 0x0F12, 0x00C6  },                                                  
+//{ 0x002A, 0x12B8  },   //disable CINTR 0                                 
+//{ 0x0F12, 0x0B00  },                                                     
+                                                                      
+{ 0x002A, 0x1690  },   // when set double sampling is activated - requires different set of pointers                                                 
+{ 0x0F12, 0x0001  },                                                     
+                                                                      
+{ 0x002A, 0x12B0  },   // comp and pixel bias control 0xF40E - default for EVT1                                                                      
+{ 0x0F12, 0x0055  },   // comp and pixel bias control 0xF40E for binning mode                                                                        
+{ 0x0F12, 0x005A  },                                                     
+                                                                      
+{ 0x002A, 0x337A  },   // [7] - is used for rest-only mode (EVT0 value is 0xD and HW 0x6)                                                            
+{ 0x0F12, 0x0006  },
+{ 0x0F12, 0x0068  },
+{ 0x002A, 0x169E  },
+{ 0x0F12, 0x0007  },
+{ 0x002A, 0x0BF6  },
+{ 0x0F12, 0x0000  },
+	                
+                    
+{ 0x002A, 0x327C  },
+{ 0x0F12, 0x1000  },
+{ 0x0F12, 0x6998  },
+{ 0x0F12, 0x0078  },
+{ 0x0F12, 0x04FE  },
+{ 0x0F12, 0x8800  },
+                    
+{ 0x002A, 0x3274  },
+{ 0x0F12, 0x0155  },	//set IO driving current 2mA for Gs500
+{ 0x0F12, 0x0155  },   //set IO driving current              
+{ 0x0F12, 0x1555  },   //set IO driving current              
+{ 0x0F12, 0x0555  },   //set IO driving current              
+                    
+                    
+{ 0x0028, 0x7000  },	
+{ 0x002A, 0x12D2  },	   
+{ 0x0F12, 0x0003  },	//senHal_pContSenModesRegsArray[0][0]2 700012D2     
+{ 0x0F12, 0x0003  },   //senHal_pContSenModesRegsArray[0][1]2 700012D4  
+{ 0x0F12, 0x0003  },   //senHal_pContSenModesRegsArray[0][2]2 700012D6  
+{ 0x0F12, 0x0003  },   //senHal_pContSenModesRegsArray[0][3]2 700012D8  
+{ 0x0F12, 0x0884  },   //senHal_pContSenModesRegsArray[1][0]2 700012DA  
+{ 0x0F12, 0x08CF  },   //senHal_pContSenModesRegsArray[1][1]2 700012DC  
+{ 0x0F12, 0x0500  },   //senHal_pContSenModesRegsArray[1][2]2 700012DE  
+{ 0x0F12, 0x054B  },   //senHal_pContSenModesRegsArray[1][3]2 700012E0  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][0]2 700012E2  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][1]2 700012E4  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][2]2 700012E6  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][3]2 700012E8  
+{ 0x0F12, 0x0885  },   //senHal_pContSenModesRegsArray[3][0]2 700012EA  
+{ 0x0F12, 0x0467  },   //senHal_pContSenModesRegsArray[3][1]2 700012EC  
+{ 0x0F12, 0x0501  },   //senHal_pContSenModesRegsArray[3][2]2 700012EE  
+{ 0x0F12, 0x02A5  },   //senHal_pContSenModesRegsArray[3][3]2 700012F0  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[4][0]2 700012F2  
+{ 0x0F12, 0x046A  },   //senHal_pContSenModesRegsArray[4][1]2 700012F4  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[4][2]2 700012F6  
+{ 0x0F12, 0x02A8  },   //senHal_pContSenModesRegsArray[4][3]2 700012F8  
+{ 0x0F12, 0x0885  },   //senHal_pContSenModesRegsArray[5][0]2 700012FA  
+{ 0x0F12, 0x08D0  },   //senHal_pContSenModesRegsArray[5][1]2 700012FC  
+{ 0x0F12, 0x0501  },   //senHal_pContSenModesRegsArray[5][2]2 700012FE  
+{ 0x0F12, 0x054C  },   //senHal_pContSenModesRegsArray[5][3]2 70001300  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[6][0]2 70001302  
+{ 0x0F12, 0x0020  },   //senHal_pContSenModesRegsArray[6][1]2 70001304  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[6][2]2 70001306  
+{ 0x0F12, 0x0020  },   //senHal_pContSenModesRegsArray[6][3]2 70001308  
+{ 0x0F12, 0x0881  },   //senHal_pContSenModesRegsArray[7][0]2 7000130A  
+{ 0x0F12, 0x0463  },   //senHal_pContSenModesRegsArray[7][1]2 7000130C  
+{ 0x0F12, 0x04FD  },   //senHal_pContSenModesRegsArray[7][2]2 7000130E  
+{ 0x0F12, 0x02A1  },   //senHal_pContSenModesRegsArray[7][3]2 70001310  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[8][0]2 70001312  
+{ 0x0F12, 0x0489  },   //senHal_pContSenModesRegsArray[8][1]2 70001314  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[8][2]2 70001316  
+{ 0x0F12, 0x02C7  },   //senHal_pContSenModesRegsArray[8][3]2 70001318  
+{ 0x0F12, 0x0881  },   //senHal_pContSenModesRegsArray[9][0]2 7000131A  
+{ 0x0F12, 0x08CC  },   //senHal_pContSenModesRegsArray[9][1]2 7000131C  
+{ 0x0F12, 0x04FD  },   //senHal_pContSenModesRegsArray[9][2]2 7000131E  
+{ 0x0F12, 0x0548  },   //senHal_pContSenModesRegsArray[9][3]2 70001320  
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[10][0] 2 70001322
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[10][1] 2 70001324
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[10][2] 2 70001326
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[10][3] 2 70001328
+{ 0x0F12, 0x03F2  },   //senHal_pContSenModesRegsArray[11][0] 2 7000132A
+{ 0x0F12, 0x0223  },   //senHal_pContSenModesRegsArray[11][1] 2 7000132C
+{ 0x0F12, 0x0230  },   //senHal_pContSenModesRegsArray[11][2] 2 7000132E
+{ 0x0F12, 0x0142  },   //senHal_pContSenModesRegsArray[11][3] 2 70001330
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[12][0] 2 70001332
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[12][1] 2 70001334
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[12][2] 2 70001336
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[12][3] 2 70001338
+{ 0x0F12, 0x03F2  },   //senHal_pContSenModesRegsArray[13][0] 2 7000133A
+{ 0x0F12, 0x068C  },   //senHal_pContSenModesRegsArray[13][1] 2 7000133C
+{ 0x0F12, 0x0230  },   //senHal_pContSenModesRegsArray[13][2] 2 7000133E
+{ 0x0F12, 0x03E9  },   //senHal_pContSenModesRegsArray[13][3] 2 70001340
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][0] 2 70001342
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][1] 2 70001344
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][2] 2 70001346
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][3] 2 70001348
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][0] 2 7000134A
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][1] 2 7000134C
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][2] 2 7000134E
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][3] 2 70001350
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[16][0] 2 70001352
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[16][1] 2 70001354
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[16][2] 2 70001356
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[16][3] 2 70001358
+{ 0x0F12, 0x020B  },   //senHal_pContSenModesRegsArray[17][0] 2 7000135A
+{ 0x0F12, 0x024A  },   //senHal_pContSenModesRegsArray[17][1] 2 7000135C
+{ 0x0F12, 0x012A  },   //senHal_pContSenModesRegsArray[17][2] 2 7000135E
+{ 0x0F12, 0x0169  },   //senHal_pContSenModesRegsArray[17][3] 2 70001360
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[18][0] 2 70001362
+{ 0x0F12, 0x046B  },   //senHal_pContSenModesRegsArray[18][1] 2 70001364
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[18][2] 2 70001366
+{ 0x0F12, 0x02A9  },   //senHal_pContSenModesRegsArray[18][3] 2 70001368
+{ 0x0F12, 0x0419  },   //senHal_pContSenModesRegsArray[19][0] 2 7000136A
+{ 0x0F12, 0x04A5  },   //senHal_pContSenModesRegsArray[19][1] 2 7000136C
+{ 0x0F12, 0x0257  },   //senHal_pContSenModesRegsArray[19][2] 2 7000136E
+{ 0x0F12, 0x02E3  },   //senHal_pContSenModesRegsArray[19][3] 2 70001370
+{ 0x0F12, 0x0630  },   //senHal_pContSenModesRegsArray[20][0] 2 70001372
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[20][1] 2 70001374
+{ 0x0F12, 0x038D  },   //senHal_pContSenModesRegsArray[20][2] 2 70001376
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[20][3] 2 70001378
+{ 0x0F12, 0x0668  },   //senHal_pContSenModesRegsArray[21][0] 2 7000137A
+{ 0x0F12, 0x06B3  },   //senHal_pContSenModesRegsArray[21][1] 2 7000137C
+{ 0x0F12, 0x03C5  },   //senHal_pContSenModesRegsArray[21][2] 2 7000137E
+{ 0x0F12, 0x0410  },   //senHal_pContSenModesRegsArray[21][3] 2 70001380
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][0] 2 70001382
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][1] 2 70001384
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][2] 2 70001386
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][3] 2 70001388
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[23][0] 2 7000138A
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[23][1] 2 7000138C
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[23][2] 2 7000138E
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[23][3] 2 70001390
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[24][0] 2 70001392
+{ 0x0F12, 0x0461  },   //senHal_pContSenModesRegsArray[24][1] 2 70001394
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[24][2] 2 70001396
+{ 0x0F12, 0x029F  },   //senHal_pContSenModesRegsArray[24][3] 2 70001398
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[25][0] 2 7000139A
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[25][1] 2 7000139C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[25][2] 2 7000139E
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[25][3] 2 700013A0
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][0] 2 700013A2
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][1] 2 700013A4
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][2] 2 700013A6
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][3] 2 700013A8
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[27][0] 2 700013AA
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[27][1] 2 700013AC
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[27][2] 2 700013AE
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[27][3] 2 700013B0
+{ 0x0F12, 0x020C  },   //senHal_pContSenModesRegsArray[28][0] 2 700013B2
+{ 0x0F12, 0x024B  },   //senHal_pContSenModesRegsArray[28][1] 2 700013B4
+{ 0x0F12, 0x012B  },   //senHal_pContSenModesRegsArray[28][2] 2 700013B6
+{ 0x0F12, 0x016A  },   //senHal_pContSenModesRegsArray[28][3] 2 700013B8
+{ 0x0F12, 0x039F  },   //senHal_pContSenModesRegsArray[29][0] 2 700013BA
+{ 0x0F12, 0x045E  },   //senHal_pContSenModesRegsArray[29][1] 2 700013BC
+{ 0x0F12, 0x01DD  },   //senHal_pContSenModesRegsArray[29][2] 2 700013BE
+{ 0x0F12, 0x029C  },   //senHal_pContSenModesRegsArray[29][3] 2 700013C0
+{ 0x0F12, 0x041A  },   //senHal_pContSenModesRegsArray[30][0] 2 700013C2
+{ 0x0F12, 0x04A6  },   //senHal_pContSenModesRegsArray[30][1] 2 700013C4
+{ 0x0F12, 0x0258  },   //senHal_pContSenModesRegsArray[30][2] 2 700013C6
+{ 0x0F12, 0x02E4  },   //senHal_pContSenModesRegsArray[30][3] 2 700013C8
+{ 0x0F12, 0x062D  },   //senHal_pContSenModesRegsArray[31][0] 2 700013CA
+{ 0x0F12, 0x0639  },   //senHal_pContSenModesRegsArray[31][1] 2 700013CC
+{ 0x0F12, 0x038A  },   //senHal_pContSenModesRegsArray[31][2] 2 700013CE
+{ 0x0F12, 0x0396  },   //senHal_pContSenModesRegsArray[31][3] 2 700013D0
+{ 0x0F12, 0x0669  },   //senHal_pContSenModesRegsArray[32][0] 2 700013D2
+{ 0x0F12, 0x06B4  },   //senHal_pContSenModesRegsArray[32][1] 2 700013D4
+{ 0x0F12, 0x03C6  },   //senHal_pContSenModesRegsArray[32][2] 2 700013D6
+{ 0x0F12, 0x0411  },   //senHal_pContSenModesRegsArray[32][3] 2 700013D8
+{ 0x0F12, 0x087C  },   //senHal_pContSenModesRegsArray[33][0] 2 700013DA
+{ 0x0F12, 0x08C7  },   //senHal_pContSenModesRegsArray[33][1] 2 700013DC
+{ 0x0F12, 0x04F8  },   //senHal_pContSenModesRegsArray[33][2] 2 700013DE
+{ 0x0F12, 0x0543  },   //senHal_pContSenModesRegsArray[33][3] 2 700013E0
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][0] 2 700013E2
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][1] 2 700013E4
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][2] 2 700013E6
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][3] 2 700013E8
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[35][0] 2 700013EA
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[35][1] 2 700013EC
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[35][2] 2 700013EE
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[35][3] 2 700013F0
+{ 0x0F12, 0x020F  },   //senHal_pContSenModesRegsArray[36][0] 2 700013F2
+{ 0x0F12, 0x024E  },   //senHal_pContSenModesRegsArray[36][1] 2 700013F4
+{ 0x0F12, 0x012E  },   //senHal_pContSenModesRegsArray[36][2] 2 700013F6
+{ 0x0F12, 0x016D  },   //senHal_pContSenModesRegsArray[36][3] 2 700013F8
+{ 0x0F12, 0x039F  },   //senHal_pContSenModesRegsArray[37][0] 2 700013FA
+{ 0x0F12, 0x045E  },   //senHal_pContSenModesRegsArray[37][1] 2 700013FC
+{ 0x0F12, 0x01DD  },   //senHal_pContSenModesRegsArray[37][2] 2 700013FE
+{ 0x0F12, 0x029C  },   //senHal_pContSenModesRegsArray[37][3] 2 70001400
+{ 0x0F12, 0x041D  },   //senHal_pContSenModesRegsArray[38][0] 2 70001402
+{ 0x0F12, 0x04A9  },   //senHal_pContSenModesRegsArray[38][1] 2 70001404
+{ 0x0F12, 0x025B  },   //senHal_pContSenModesRegsArray[38][2] 2 70001406
+{ 0x0F12, 0x02E7  },   //senHal_pContSenModesRegsArray[38][3] 2 70001408
+{ 0x0F12, 0x062D  },   //senHal_pContSenModesRegsArray[39][0] 2 7000140A
+{ 0x0F12, 0x0639  },   //senHal_pContSenModesRegsArray[39][1] 2 7000140C
+{ 0x0F12, 0x038A  },   //senHal_pContSenModesRegsArray[39][2] 2 7000140E
+{ 0x0F12, 0x0396  },   //senHal_pContSenModesRegsArray[39][3] 2 70001410
+{ 0x0F12, 0x066C  },   //senHal_pContSenModesRegsArray[40][0] 2 70001412
+{ 0x0F12, 0x06B7  },   //senHal_pContSenModesRegsArray[40][1] 2 70001414
+{ 0x0F12, 0x03C9  },   //senHal_pContSenModesRegsArray[40][2] 2 70001416
+{ 0x0F12, 0x0414  },   //senHal_pContSenModesRegsArray[40][3] 2 70001418
+{ 0x0F12, 0x087C  },   //senHal_pContSenModesRegsArray[41][0] 2 7000141A
+{ 0x0F12, 0x08C7  },   //senHal_pContSenModesRegsArray[41][1] 2 7000141C
+{ 0x0F12, 0x04F8  },   //senHal_pContSenModesRegsArray[41][2] 2 7000141E
+{ 0x0F12, 0x0543  },   //senHal_pContSenModesRegsArray[41][3] 2 70001420
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][0] 2 70001422
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][1] 2 70001424
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][2] 2 70001426
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][3] 2 70001428
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[43][0] 2 7000142A
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[43][1] 2 7000142C
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[43][2] 2 7000142E
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[43][3] 2 70001430
+{ 0x0F12, 0x020F  },   //senHal_pContSenModesRegsArray[44][0] 2 70001432
+{ 0x0F12, 0x024E  },   //senHal_pContSenModesRegsArray[44][1] 2 70001434
+{ 0x0F12, 0x012E  },   //senHal_pContSenModesRegsArray[44][2] 2 70001436
+{ 0x0F12, 0x016D  },   //senHal_pContSenModesRegsArray[44][3] 2 70001438
+{ 0x0F12, 0x039F  },   //senHal_pContSenModesRegsArray[45][0] 2 7000143A
+{ 0x0F12, 0x045E  },   //senHal_pContSenModesRegsArray[45][1] 2 7000143C
+{ 0x0F12, 0x01DD  },   //senHal_pContSenModesRegsArray[45][2] 2 7000143E
+{ 0x0F12, 0x029C  },   //senHal_pContSenModesRegsArray[45][3] 2 70001440
+{ 0x0F12, 0x041D  },   //senHal_pContSenModesRegsArray[46][0] 2 70001442
+{ 0x0F12, 0x04A9  },   //senHal_pContSenModesRegsArray[46][1] 2 70001444
+{ 0x0F12, 0x025B  },   //senHal_pContSenModesRegsArray[46][2] 2 70001446
+{ 0x0F12, 0x02E7  },   //senHal_pContSenModesRegsArray[46][3] 2 70001448
+{ 0x0F12, 0x062D  },   //senHal_pContSenModesRegsArray[47][0] 2 7000144A
+{ 0x0F12, 0x0639  },   //senHal_pContSenModesRegsArray[47][1] 2 7000144C
+{ 0x0F12, 0x038A  },   //senHal_pContSenModesRegsArray[47][2] 2 7000144E
+{ 0x0F12, 0x0396  },   //senHal_pContSenModesRegsArray[47][3] 2 70001450
+{ 0x0F12, 0x066C  },   //senHal_pContSenModesRegsArray[48][0] 2 70001452
+{ 0x0F12, 0x06B7  },   //senHal_pContSenModesRegsArray[48][1] 2 70001454
+{ 0x0F12, 0x03C9  },   //senHal_pContSenModesRegsArray[48][2] 2 70001456
+{ 0x0F12, 0x0414  },   //senHal_pContSenModesRegsArray[48][3] 2 70001458
+{ 0x0F12, 0x087C  },   //senHal_pContSenModesRegsArray[49][0] 2 7000145A
+{ 0x0F12, 0x08C7  },   //senHal_pContSenModesRegsArray[49][1] 2 7000145C
+{ 0x0F12, 0x04F8  },   //senHal_pContSenModesRegsArray[49][2] 2 7000145E
+{ 0x0F12, 0x0543  },   //senHal_pContSenModesRegsArray[49][3] 2 70001460
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][0] 2 70001462
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][1] 2 70001464
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][2] 2 70001466
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][3] 2 70001468
+{ 0x0F12, 0x01D2  },   //senHal_pContSenModesRegsArray[51][0] 2 7000146A
+{ 0x0F12, 0x01D2  },   //senHal_pContSenModesRegsArray[51][1] 2 7000146C
+{ 0x0F12, 0x00F1  },   //senHal_pContSenModesRegsArray[51][2] 2 7000146E
+{ 0x0F12, 0x00F1  },   //senHal_pContSenModesRegsArray[51][3] 2 70001470
+{ 0x0F12, 0x020C  },   //senHal_pContSenModesRegsArray[52][0] 2 70001472
+{ 0x0F12, 0x024B  },   //senHal_pContSenModesRegsArray[52][1] 2 70001474
+{ 0x0F12, 0x012B  },   //senHal_pContSenModesRegsArray[52][2] 2 70001476
+{ 0x0F12, 0x016A  },   //senHal_pContSenModesRegsArray[52][3] 2 70001478
+{ 0x0F12, 0x03A1  },   //senHal_pContSenModesRegsArray[53][0] 2 7000147A
+{ 0x0F12, 0x0460  },   //senHal_pContSenModesRegsArray[53][1] 2 7000147C
+{ 0x0F12, 0x01DF  },   //senHal_pContSenModesRegsArray[53][2] 2 7000147E
+{ 0x0F12, 0x029E  },   //senHal_pContSenModesRegsArray[53][3] 2 70001480
+{ 0x0F12, 0x041A  },   //senHal_pContSenModesRegsArray[54][0] 2 70001482
+{ 0x0F12, 0x04A6  },   //senHal_pContSenModesRegsArray[54][1] 2 70001484
+{ 0x0F12, 0x0258  },   //senHal_pContSenModesRegsArray[54][2] 2 70001486
+{ 0x0F12, 0x02E4  },   //senHal_pContSenModesRegsArray[54][3] 2 70001488
+{ 0x0F12, 0x062F  },   //senHal_pContSenModesRegsArray[55][0] 2 7000148A
+{ 0x0F12, 0x063B  },   //senHal_pContSenModesRegsArray[55][1] 2 7000148C
+{ 0x0F12, 0x038C  },   //senHal_pContSenModesRegsArray[55][2] 2 7000148E
+{ 0x0F12, 0x0398  },   //senHal_pContSenModesRegsArray[55][3] 2 70001490
+{ 0x0F12, 0x0669  },   //senHal_pContSenModesRegsArray[56][0] 2 70001492
+{ 0x0F12, 0x06B4  },   //senHal_pContSenModesRegsArray[56][1] 2 70001494
+{ 0x0F12, 0x03C6  },   //senHal_pContSenModesRegsArray[56][2] 2 70001496
+{ 0x0F12, 0x0411  },   //senHal_pContSenModesRegsArray[56][3] 2 70001498
+{ 0x0F12, 0x087E  },   //senHal_pContSenModesRegsArray[57][0] 2 7000149A
+{ 0x0F12, 0x08C9  },   //senHal_pContSenModesRegsArray[57][1] 2 7000149C
+{ 0x0F12, 0x04FA  },   //senHal_pContSenModesRegsArray[57][2] 2 7000149E
+{ 0x0F12, 0x0545  },   //senHal_pContSenModesRegsArray[57][3] 2 700014A0
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[58][0] 2 700014A2
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[58][1] 2 700014A4
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[58][2] 2 700014A6
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[58][3] 2 700014A8
+{ 0x0F12, 0x03AF  },   //senHal_pContSenModesRegsArray[59][0] 2 700014AA
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[59][1] 2 700014AC
+{ 0x0F12, 0x01ED  },   //senHal_pContSenModesRegsArray[59][2] 2 700014AE
+{ 0x0F12, 0x00FF  },   //senHal_pContSenModesRegsArray[59][3] 2 700014B0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[60][0] 2 700014B2
+{ 0x0F12, 0x0461  },   //senHal_pContSenModesRegsArray[60][1] 2 700014B4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[60][2] 2 700014B6
+{ 0x0F12, 0x029F  },   //senHal_pContSenModesRegsArray[60][3] 2 700014B8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[61][0] 2 700014BA
+{ 0x0F12, 0x046E  },   //senHal_pContSenModesRegsArray[61][1] 2 700014BC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[61][2] 2 700014BE
+{ 0x0F12, 0x02AC  },   //senHal_pContSenModesRegsArray[61][3] 2 700014C0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[62][0] 2 700014C2
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[62][1] 2 700014C4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[62][2] 2 700014C6
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[62][3] 2 700014C8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[63][0] 2 700014CA
+{ 0x0F12, 0x0649  },   //senHal_pContSenModesRegsArray[63][1] 2 700014CC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[63][2] 2 700014CE
+{ 0x0F12, 0x03A6  },   //senHal_pContSenModesRegsArray[63][3] 2 700014D0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][0] 2 700014D2
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][1] 2 700014D4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][2] 2 700014D6
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][3] 2 700014D8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][0] 2 700014DA
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][1] 2 700014DC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][2] 2 700014DE
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][3] 2 700014E0
+{ 0x0F12, 0x03AA  },   //senHal_pContSenModesRegsArray[66][0] 2 700014E2
+{ 0x0F12, 0x01DB  },   //senHal_pContSenModesRegsArray[66][1] 2 700014E4
+{ 0x0F12, 0x01E8  },   //senHal_pContSenModesRegsArray[66][2] 2 700014E6
+{ 0x0F12, 0x00FA  },   //senHal_pContSenModesRegsArray[66][3] 2 700014E8
+{ 0x0F12, 0x03B7  },   //senHal_pContSenModesRegsArray[67][0] 2 700014EA
+{ 0x0F12, 0x01E8  },   //senHal_pContSenModesRegsArray[67][1] 2 700014EC
+{ 0x0F12, 0x01F5  },   //senHal_pContSenModesRegsArray[67][2] 2 700014EE
+{ 0x0F12, 0x0107  },   //senHal_pContSenModesRegsArray[67][3] 2 700014F0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[68][0] 2 700014F2
+{ 0x0F12, 0x0469  },   //senHal_pContSenModesRegsArray[68][1] 2 700014F4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[68][2] 2 700014F6
+{ 0x0F12, 0x02A7  },   //senHal_pContSenModesRegsArray[68][3] 2 700014F8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[69][0] 2 700014FA
+{ 0x0F12, 0x0476  },   //senHal_pContSenModesRegsArray[69][1] 2 700014FC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[69][2] 2 700014FE
+{ 0x0F12, 0x02B4  },   //senHal_pContSenModesRegsArray[69][3] 2 70001500
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[70][0] 2 70001502
+{ 0x0F12, 0x0644  },   //senHal_pContSenModesRegsArray[70][1] 2 70001504
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[70][2] 2 70001506
+{ 0x0F12, 0x03A1  },   //senHal_pContSenModesRegsArray[70][3] 2 70001508
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[71][0] 2 7000150A
+{ 0x0F12, 0x0651  },   //senHal_pContSenModesRegsArray[71][1] 2 7000150C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[71][2] 2 7000150E
+{ 0x0F12, 0x03AE  },   //senHal_pContSenModesRegsArray[71][3] 2 70001510
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][0] 2 70001512
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][1] 2 70001514
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][2] 2 70001516
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][3] 2 70001518
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][0] 2 7000151A
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][1] 2 7000151C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][2] 2 7000151E
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][3] 2 70001520
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][0] 2 70001522
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][1] 2 70001524
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][2] 2 70001526
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][3] 2 70001528
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][0] 2 7000152A
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][1] 2 7000152C
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][2] 2 7000152E
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][3] 2 70001530
+{ 0x0F12, 0x05AD  },   //senHal_pContSenModesRegsArray[76][0] 2 70001532
+{ 0x0F12, 0x03DE  },   //senHal_pContSenModesRegsArray[76][1] 2 70001534
+{ 0x0F12, 0x030A  },   //senHal_pContSenModesRegsArray[76][2] 2 70001536
+{ 0x0F12, 0x021C  },   //senHal_pContSenModesRegsArray[76][3] 2 70001538
+{ 0x0F12, 0x062F  },   //senHal_pContSenModesRegsArray[77][0] 2 7000153A
+{ 0x0F12, 0x0460  },   //senHal_pContSenModesRegsArray[77][1] 2 7000153C
+{ 0x0F12, 0x038C  },   //senHal_pContSenModesRegsArray[77][2] 2 7000153E
+{ 0x0F12, 0x029E  },   //senHal_pContSenModesRegsArray[77][3] 2 70001540
+{ 0x0F12, 0x07FC  },   //senHal_pContSenModesRegsArray[78][0] 2 70001542
+{ 0x0F12, 0x0847  },   //senHal_pContSenModesRegsArray[78][1] 2 70001544
+{ 0x0F12, 0x0478  },   //senHal_pContSenModesRegsArray[78][2] 2 70001546
+{ 0x0F12, 0x04C3  },   //senHal_pContSenModesRegsArray[78][3] 2 70001548
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][0] 2 7000154A
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][1] 2 7000154C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][2] 2 7000154E
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][3] 2 70001550
+                      
+                    
+//============================================================ 
+// AF Interface setting
+//==============  ============================================== 
+{ 0x002A, 0x01D4  },
+{ 0x0F12, 0x0000  }, //REG_TC_IPRM_AuxGpios : 0 - no Flash
+{ 0x002A, 0x01DE  },
+{ 0x0F12, 0x0003  }, //REG_TC_IPRM_CM_Init_AfModeType : 3 - AFD_VCM_I2C
+{ 0x0F12, 0x0000  }, //REG_TC_IPRM_CM_Init_PwmConfig1 : 0 - no PWM
+{ 0x002A, 0x01E4  },
+{ 0x0F12, 0x0041  }, //REG_TC_IPRM_CM_Init_GpioConfig1 : 4 -  GPIO4 
+{ 0x002A, 0x01E8  },
+{ 0x0F12, 0x2A0C  }, //REG_TC_IPRM_CM_Init_Mi2cBits : MSCL - GPIO1 MSDA - GPIO2 Device ID (0C)
+{ 0x0F12, 0x0190  }, //REG_TC_IPRM_CM_Init_Mi2cRateKhz : MI2C Speed - 400KHz
+
+//============================================================ 
+// AF Parameter setting
+//============================================================ 
+// AF Window Settings
+{ 0x002A, 0x025A  },
+{ 0x0F12, 0x0100  }, //#REG_TC_AF_FstWinStartX
+{ 0x0F12, 0x00E3  }, //#REG_TC_AF_FstWinStartY
+{ 0x0F12, 0x0200  }, //#REG_TC_AF_FstWinSizeX
+{ 0x0F12, 0x0238  }, //#REG_TC_AF_FstWinSizeY
+{ 0x0F12, 0x01C6  }, //#REG_TC_AF_ScndWinStartX
+{ 0x0F12, 0x0166  }, //#REG_TC_AF_ScndWinStartY
+{ 0x0F12, 0x0074  }, //#REG_TC_AF_ScndWinSizeX
+{ 0x0F12, 0x0132  }, //#REG_TC_AF_ScndWinSizeY
+{ 0x0F12, 0x0001  }, //#REG_TC_AF_WinSizesUpdated
+
+// AF Setot Settings 
+{ 0x002A, 0x0586  },
+{ 0x0F12, 0x00FF  }, //#skl_af_StatOvlpExpFactor
+
+// AF Scene Settings 
+{ 0x002A, 0x115E  },
+{ 0x0F12, 0x0003  }, //#af_scene_usSaturatedScene
+
+// AF Fine Search Settings 
+{ 0x002A, 0x10D4  },
+{ 0x0F12, 0x1002  }, //FineSearch Disable //af_search_usSingleAfFlags 1000 : 2nd searh off, 1002 : 2nd search on
+{ 0x002A, 0x10DE  },
+{ 0x0F12, 0x0004  }, //#af_search_usFinePeakCount
+{ 0x002A, 0x106C  },
+{ 0x0F12, 0x0802  }, //#af_pos_usFineStepNumSize
+                  
+// / AF Peak Thre  shold Setting
+{ 0x002A, 0x10CA  }, //#af_search_usPeakThr
+{ 0x0F12, 0x00CC  }, 
+
+// AF Default Position 
+{ 0x002A, 0x1060  },
+{ 0x0F12, 0x0000  }, //#af_pos_usHomePos
+{ 0x0F12, 0xB020  }, //#af_pos_usLowConfPos
+
+// AF LowConfThr Setting
+{ 0x002A, 0x10F4  }, //LowEdgeBoth GRAD
+{ 0x0F12, 0x0280  }, 
+{ 0x002A, 0x1100  }, //LowLight HPF
+{ 0x0F12, 0x03A0  },  
+{ 0x0F12, 0x0320  }, 
+
+{ 0x002A, 0x1134  },
+{ 0x0F12, 0x0030  },//af_stat_usMinStatVal
+
+// AF low Br Th
+{ 0x002A, 0x1154  }, // normBrThr
+{ 0x0F12, 0x0060  },
+
+// AF Policy
+{ 0x002A, 0x10E2  },
+{ 0x0F12, 0x0000  }, //#af_search_usCapturePolicy: Focus_Priority, 0002 : Shutter_Priority_Fixed, 0001 : Shutter_Priority_Last_BFP 0000: Shutter_Priority_Current
+{ 0x002A, 0x1072  },
+{ 0x0F12, 0x003C  }, //#af_pos_usCaptureFixedPo// 0x0008
+
+// AF Lens Position Table Settings 
+{ 0x002A, 0x1074  },
+{ 0x0F12, 0x0010  }, //#af_pos_usTableLastInd // 0~16 17 Steps 100729
+
+{ 0x0F12, 0x0024  }, //#af_pos_usTable_0_  145/4 = 36  // af_pos_usTable
+{ 0x0F12, 0x002D  }, //#af_pos_usTable_1_  180/4 = 45                   
+{ 0x0F12, 0x0036  }, //#af_pos_usTable_2_  215/4 = 54                   
+{ 0x0F12, 0x003E  }, //#af_pos_usTable_3_  250/4 = 62                   
+{ 0x0F12, 0x0047  }, //#af_pos_usTable_4_  285/4 = 71
+{ 0x0F12, 0x0050  }, //#af_pos_usTable_5_  320/4 = 80                   
+{ 0x0F12, 0x0059  }, //#af_pos_usTable_6_  355/4 = 89                   
+{ 0x0F12, 0x0061  }, //#af_pos_usTable_7_  390/4 = 97                   
+{ 0x0F12, 0x006A  }, //#af_pos_usTable_8_  425/4 = 106                  
+{ 0x0F12, 0x0073  }, //#af_pos_usTable_9_  460/4 = 115                  
+{ 0x0F12, 0x007C  }, //#af_pos_usTable_10_ 495/4 = 124                  
+{ 0x0F12, 0x0084  }, //#af_pos_usTable_11_ 530/4 = 132                  
+{ 0x0F12, 0x008D  }, //#af_pos_usTable_12_ 565/4 = 141                  
+{ 0x0F12, 0x0096  }, //#af_pos_usTable_13_ 600/4 = 150                  
+{ 0x0F12, 0x009F  }, //#af_pos_usTable_14_ 635/4 = 159                  
+{ 0x0F12, 0x00A7  }, //#af_pos_usTable_15_ 670/4 = 167                  
+{ 0x0F12, 0x00B0  }, //#af_pos_usTable_16_ 705/4 = 176                  
+
+//VCM AF driver with PWM/I2C 
+{ 0x002A, 0x1198  },
+{ 0x0F12, 0x8000  }, //#afd_usParam[0]  I2C power down command
+{ 0x0F12, 0x0006  }, //#afd_usParam[1]  Position Right Shift 
+{ 0x0F12, 0x3FF0  }, //#afd_usParam[2]  I2C Data Mask
+{ 0x0F12, 0x03E8  }, //#afd_usParam[3]  PWM Period
+{ 0x0F12, 0x0000  }, //#afd_usParam[4]  PWM Divider
+{ 0x0F12, 0x0064  }, //#afd_usParam[5]  SlowMotion Delay (unit: 0.1ms)  4. reduce lens collision noise.
+{ 0x0F12, 0x0009  }, //#afd_usParam[6]  SlowMotion Threshold
+{ 0x0F12, 0x000A  }, //#afd_usParam[7]  Signal Shaping
+{ 0x0F12, 0x0080  }, //#afd_usParam[8]  Signal Shaping level 
+{ 0x0F12, 0x00C0  }, //#afd_usParam[9]  Signal Shaping level
+{ 0x0F12, 0x0000  }, //#afd_usParam[10] Signal Shaping level
+{ 0x0F12, 0x0000  }, //#afd_usParam[11] Signal Shaping level               
+
+
+{ 0x002A, 0x0252  },
+{ 0x0F12, 0x0003  }, //init 
+                  
+{ 0x002A, 0x12B8  },   //disable CINTR 0                                 
+{ 0x0F12, 0x1000  },        
+
+//============================================================
+// ISP-FE Setting
+//============================================================                    
+{ 0x002A, 0x158A  },   
+{ 0x0F12, 0xEAF0  },   
+{ 0x002A, 0x15C6  },   
+{ 0x0F12, 0x0020  },   
+{ 0x0F12, 0x0060  },   
+{ 0x002A, 0x15BC  },   
+{ 0x0F12, 0x0200  },   
+                       
+{ 0x002A, 0x1608  },   
+{ 0x0F12, 0x0100  },   
+{ 0x0F12, 0x0100  },   
+{ 0x0F12, 0x0100  },   
+{ 0x0F12, 0x0100  },   
+                       
+{ 0x002A, 0x0F70  },   
+{ 0x0F12, 0x0040  },	 //36 //TVAR_ae_BrAve  //ae Target//
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0x3415  },   //3A98 //3A98////lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0x682A  },   //68b0 //7EF4////lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0x8235  },   //8340 //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },    //F424//MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0x3415  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0x682A  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0x8235  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+// /Shutter tunpo  int//        //gain * 256 = value//
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x01B3  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x02A0  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710  },   //MaxAnGain4 //                                             
+// /Shutter tunen  d//
+                  
+{ 0x002A, 0x0544  },                                                               
+{ 0x0F12, 0x0100  },   	                                                    
+{ 0x0F12, 0x8000  },   //Max Gain 8 //                                             
+                  
+                  
+{ 0x002A, 0x1694  },                                                               
+{ 0x0F12, 0x0001  },   //expand forbidde zone //                                   
+                  
+{ 0x002A, 0x021A  },                                                               
+{ 0x0F12, 0x0000  },  //MBR off// 	                                                    
+                  
+                  
+//==============================================//
+//AFC                                          //
+//==============================================//
+{ 0x002A, 0x04d2  },
+{ 0x0F12, 0x065f  },     //065f : Manual AFC on   067f : Manual AFC off //
+{ 0x002A, 0x04ba  },     
+{ 0x0F12, 0x0002  },     // 0002: 60hz  0001 : 50hz //
+{ 0x0F12, 0x0001  },     // afc update command //
+                          
+                    
+                    
+{ 0x002A, 0x06CE  },   
+{ 0x0F12, 0x0100  },	//TVAR_ash_GAsalpha[0] // 	   
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[1] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[2] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[3] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[4] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[5] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[6] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[7] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[8] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[9] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[10] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[11] //
+{ 0x0F12, 0x00e0  },   //TVAR_ash_GAsalpha[12] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[13] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[14] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[15] //
+{ 0x0F12, 0x00e8  },   //TVAR_ash_GAsalpha[16] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[17] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[18] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[19] //
+{ 0x0F12, 0x00f0  },   //TVAR_ash_GAsalpha[20] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[21] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[22] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[23] //
+{ 0x0F12, 0x00f0  },   //TVAR_ash_GAsalpha[24] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[25] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[26] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[27] //
+                       
+{ 0x0F12, 0x00f8  },	//TVAR_ash_GAS OutdoorAlpha[0] //   
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAS OutdoorAlpha[1] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAS OutdoorAlpha[2] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAS OutdoorAlpha[3] //
+                       
+                       
+{ 0x0F12, 0x0036  },	//ash_GASBeta[0] // 	   
+{ 0x0F12, 0x001F  },	//ash_GASBeta[1] //    
+{ 0x0F12, 0x0020  },   //ash_GASBeta[2] // 
+{ 0x0F12, 0x0000  },   //ash_GASBeta[3] // 
+{ 0x0F12, 0x0036  },   //ash_GASBeta[4] // 
+{ 0x0F12, 0x001F  },   //ash_GASBeta[5] // 
+{ 0x0F12, 0x0020  },   //ash_GASBeta[6] // 
+{ 0x0F12, 0x0000  },   //ash_GASBeta[7] // 
+{ 0x0F12, 0x0036  },   //ash_GASBeta[8] // 
+{ 0x0F12, 0x001F  },   //ash_GASBeta[9] // 
+{ 0x0F12, 0x0020  },   //ash_GASBeta[10] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[11] //
+{ 0x0F12, 0x0010  },   //ash_GASBeta[12] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[13] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[14] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[15] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[16] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[17] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[18] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[19] //
+{ 0x0F12, 0x0036  },   //ash_GASBeta[20] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[21] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[22] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[23] //
+{ 0x0F12, 0x0036  },   //ash_GASBeta[24] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[25] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[26] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[27] //
+                       
+{ 0x0F12, 0x0036  },	//ash_GAS OutdoorBeta[0] //   
+{ 0x0F12, 0x001F  },   //ash_GAS OutdoorBeta[1] //
+{ 0x0F12, 0x0020  },   //ash_GAS OutdoorBeta[2] //
+{ 0x0F12, 0x0000  },   //ash_GAS OutdoorBeta[3] //
+                       
+{ 0x002A, 0x075A  },	//ash_bParabolicEstimation//   
+{ 0x0F12, 0x0000  },   //ash_uParabolicCenterX   //
+{ 0x0F12, 0x0400  },   //ash_uParabolicCenterY   //
+{ 0x0F12, 0x0300  },   //ash_uParabolicscalingA  //
+{ 0x0F12, 0x0010  },   //ash_uParabolicscalingB  //
+{ 0x0F12, 0x0011  },   
+                       
+{ 0x002A, 0x347C  },   
+{ 0x0F12, 0x01EE  },	//TVAR_ash_pGAS[0] //     
+{ 0x0F12, 0x01A9  },   //TVAR_ash_pGAS[1] //  
+{ 0x0F12, 0x016A  },   //TVAR_ash_pGAS[2] //  
+{ 0x0F12, 0x0136  },   //TVAR_ash_pGAS[3] //  
+{ 0x0F12, 0x0111  },   //TVAR_ash_pGAS[4] //  
+{ 0x0F12, 0x00F6  },   //TVAR_ash_pGAS[5] //  
+{ 0x0F12, 0x00EB  },   //TVAR_ash_pGAS[6] //  
+{ 0x0F12, 0x00F7  },   //TVAR_ash_pGAS[7] //  
+{ 0x0F12, 0x0111  },   //TVAR_ash_pGAS[8] //  
+{ 0x0F12, 0x013B  },   //TVAR_ash_pGAS[9] //  
+{ 0x0F12, 0x0174  },   //TVAR_ash_pGAS[10] // 
+{ 0x0F12, 0x01BC  },   //TVAR_ash_pGAS[11] // 
+{ 0x0F12, 0x0204  },   //TVAR_ash_pGAS[12] // 
+{ 0x0F12, 0x01BA  },   //TVAR_ash_pGAS[13] // 
+{ 0x0F12, 0x0175  },   //TVAR_ash_pGAS[14] // 
+{ 0x0F12, 0x012C  },   //TVAR_ash_pGAS[15] // 
+{ 0x0F12, 0x00F1  },   //TVAR_ash_pGAS[16] // 
+{ 0x0F12, 0x00C5  },   //TVAR_ash_pGAS[17] // 
+{ 0x0F12, 0x00AA  },   //TVAR_ash_pGAS[18] // 
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[19] // 
+{ 0x0F12, 0x00AA  },   //TVAR_ash_pGAS[20] // 
+{ 0x0F12, 0x00C8  },   //TVAR_ash_pGAS[21] // 
+{ 0x0F12, 0x00FA  },   //TVAR_ash_pGAS[22] // 
+{ 0x0F12, 0x013D  },   //TVAR_ash_pGAS[23] // 
+{ 0x0F12, 0x0187  },   //TVAR_ash_pGAS[24] // 
+{ 0x0F12, 0x01DC  },   //TVAR_ash_pGAS[25] // 
+{ 0x0F12, 0x0184  },   //TVAR_ash_pGAS[26] // 
+{ 0x0F12, 0x0139  },   //TVAR_ash_pGAS[27] // 
+{ 0x0F12, 0x00EB  },   //TVAR_ash_pGAS[28] // 
+{ 0x0F12, 0x00A8  },   //TVAR_ash_pGAS[29] // 
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[30] // 
+{ 0x0F12, 0x005E  },   //TVAR_ash_pGAS[31] // 
+{ 0x0F12, 0x0055  },   //TVAR_ash_pGAS[32] // 
+{ 0x0F12, 0x0060  },   //TVAR_ash_pGAS[33] // 
+{ 0x0F12, 0x0080  },   //TVAR_ash_pGAS[34] // 
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[35] // 
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[36] // 
+{ 0x0F12, 0x0156  },   //TVAR_ash_pGAS[37] // 
+{ 0x0F12, 0x01A8  },   //TVAR_ash_pGAS[38] // 
+{ 0x0F12, 0x015B  },   //TVAR_ash_pGAS[39] // 
+{ 0x0F12, 0x010E  },   //TVAR_ash_pGAS[40] // 
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[41] // 
+{ 0x0F12, 0x0075  },   //TVAR_ash_pGAS[42] // 
+{ 0x0F12, 0x0045  },   //TVAR_ash_pGAS[43] // 
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[44] // 
+{ 0x0F12, 0x0023  },   //TVAR_ash_pGAS[45] // 
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[46] // 
+{ 0x0F12, 0x004C  },   //TVAR_ash_pGAS[47] // 
+{ 0x0F12, 0x0086  },   //TVAR_ash_pGAS[48] // 
+{ 0x0F12, 0x00D3  },   //TVAR_ash_pGAS[49] // 
+{ 0x0F12, 0x0130  },   //TVAR_ash_pGAS[50] // 
+{ 0x0F12, 0x0188  },   //TVAR_ash_pGAS[51] // 
+{ 0x0F12, 0x0140  },   //TVAR_ash_pGAS[52] // 
+{ 0x0F12, 0x00F2  },   //TVAR_ash_pGAS[53] // 
+{ 0x0F12, 0x009E  },   //TVAR_ash_pGAS[54] // 
+{ 0x0F12, 0x0056  },   //TVAR_ash_pGAS[55] // 
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[56] // 
+{ 0x0F12, 0x0013  },   //TVAR_ash_pGAS[57] // 
+{ 0x0F12, 0x000A  },   //TVAR_ash_pGAS[58] // 
+{ 0x0F12, 0x0013  },   //TVAR_ash_pGAS[59] // 
+{ 0x0F12, 0x0030  },   //TVAR_ash_pGAS[60] // 
+{ 0x0F12, 0x006B  },   //TVAR_ash_pGAS[61] // 
+{ 0x0F12, 0x00BA  },   //TVAR_ash_pGAS[62] // 
+{ 0x0F12, 0x0117  },   //TVAR_ash_pGAS[63] // 
+{ 0x0F12, 0x0176  },   //TVAR_ash_pGAS[64] // 
+{ 0x0F12, 0x012F  },   //TVAR_ash_pGAS[65] // 
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[66] // 
+{ 0x0F12, 0x0090  },   //TVAR_ash_pGAS[67] // 
+{ 0x0F12, 0x004D  },   //TVAR_ash_pGAS[68] // 
+{ 0x0F12, 0x0020  },   //TVAR_ash_pGAS[69] // 
+{ 0x0F12, 0x0009  },   //TVAR_ash_pGAS[70] // 
+{ 0x0F12, 0x0000  },   //TVAR_ash_pGAS[71] // 
+{ 0x0F12, 0x000D  },   //TVAR_ash_pGAS[72] // 
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[73] // 
+{ 0x0F12, 0x0062  },   //TVAR_ash_pGAS[74] // 
+{ 0x0F12, 0x00B3  },   //TVAR_ash_pGAS[75] // 
+{ 0x0F12, 0x0114  },   //TVAR_ash_pGAS[76] // 
+{ 0x0F12, 0x0172  },   //TVAR_ash_pGAS[77] // 
+{ 0x0F12, 0x0137  },   //TVAR_ash_pGAS[78] // 
+{ 0x0F12, 0x00E9  },   //TVAR_ash_pGAS[79] // 
+{ 0x0F12, 0x0098  },   //TVAR_ash_pGAS[80] // 
+{ 0x0F12, 0x0054  },   //TVAR_ash_pGAS[81] // 
+{ 0x0F12, 0x002A  },   //TVAR_ash_pGAS[82] // 
+{ 0x0F12, 0x0012  },   //TVAR_ash_pGAS[83] // 
+{ 0x0F12, 0x0009  },   //TVAR_ash_pGAS[84] // 
+{ 0x0F12, 0x0017  },   //TVAR_ash_pGAS[85] // 
+{ 0x0F12, 0x0034  },   //TVAR_ash_pGAS[86] // 
+{ 0x0F12, 0x006D  },   //TVAR_ash_pGAS[87] // 
+{ 0x0F12, 0x00BF  },   //TVAR_ash_pGAS[88] // 
+{ 0x0F12, 0x011C  },   //TVAR_ash_pGAS[89] // 
+{ 0x0F12, 0x0179  },   //TVAR_ash_pGAS[90] // 
+{ 0x0F12, 0x0152  },   //TVAR_ash_pGAS[91] // 
+{ 0x0F12, 0x0106  },   //TVAR_ash_pGAS[92] // 
+{ 0x0F12, 0x00B6  },   //TVAR_ash_pGAS[93] // 
+{ 0x0F12, 0x0070  },   //TVAR_ash_pGAS[94] // 
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[95] // 
+{ 0x0F12, 0x002D  },   //TVAR_ash_pGAS[96] // 
+{ 0x0F12, 0x0024  },   //TVAR_ash_pGAS[97] // 
+{ 0x0F12, 0x0032  },   //TVAR_ash_pGAS[98] // 
+{ 0x0F12, 0x0051  },   //TVAR_ash_pGAS[99] // 
+{ 0x0F12, 0x008A  },   //TVAR_ash_pGAS[100] //
+{ 0x0F12, 0x00DB  },   //TVAR_ash_pGAS[101] //
+{ 0x0F12, 0x0139  },   //TVAR_ash_pGAS[102] //
+{ 0x0F12, 0x0191  },   //TVAR_ash_pGAS[103] //
+{ 0x0F12, 0x0174  },   //TVAR_ash_pGAS[104] //
+{ 0x0F12, 0x012B  },   //TVAR_ash_pGAS[105] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[106] //
+{ 0x0F12, 0x009D  },   //TVAR_ash_pGAS[107] //
+{ 0x0F12, 0x006E  },   //TVAR_ash_pGAS[108] //
+{ 0x0F12, 0x0055  },   //TVAR_ash_pGAS[109] //
+{ 0x0F12, 0x0050  },   //TVAR_ash_pGAS[110] //
+{ 0x0F12, 0x005C  },   //TVAR_ash_pGAS[111] //
+{ 0x0F12, 0x007B  },   //TVAR_ash_pGAS[112] //
+{ 0x0F12, 0x00B7  },   //TVAR_ash_pGAS[113] //
+{ 0x0F12, 0x0109  },   //TVAR_ash_pGAS[114] //
+{ 0x0F12, 0x015E  },   //TVAR_ash_pGAS[115] //
+{ 0x0F12, 0x01B0  },   //TVAR_ash_pGAS[116] //
+{ 0x0F12, 0x01A9  },   //TVAR_ash_pGAS[117] //
+{ 0x0F12, 0x0160  },   //TVAR_ash_pGAS[118] //
+{ 0x0F12, 0x011A  },   //TVAR_ash_pGAS[119] //
+{ 0x0F12, 0x00DE  },   //TVAR_ash_pGAS[120] //
+{ 0x0F12, 0x00B1  },   //TVAR_ash_pGAS[121] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[122] //
+{ 0x0F12, 0x0093  },   //TVAR_ash_pGAS[123] //
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[124] //
+{ 0x0F12, 0x00C3  },   //TVAR_ash_pGAS[125] //
+{ 0x0F12, 0x00FA  },   //TVAR_ash_pGAS[126] //
+{ 0x0F12, 0x0143  },   //TVAR_ash_pGAS[127] //
+{ 0x0F12, 0x0190  },   //TVAR_ash_pGAS[128] //
+{ 0x0F12, 0x01E4  },   //TVAR_ash_pGAS[129] //
+{ 0x0F12, 0x01D5  },   //TVAR_ash_pGAS[130] //
+{ 0x0F12, 0x0194  },   //TVAR_ash_pGAS[131] //
+{ 0x0F12, 0x014E  },   //TVAR_ash_pGAS[132] //
+{ 0x0F12, 0x011F  },   //TVAR_ash_pGAS[133] //
+{ 0x0F12, 0x00F9  },   //TVAR_ash_pGAS[134] //
+{ 0x0F12, 0x00E1  },   //TVAR_ash_pGAS[135] //
+{ 0x0F12, 0x00DA  },   //TVAR_ash_pGAS[136] //
+{ 0x0F12, 0x00E8  },   //TVAR_ash_pGAS[137] //
+{ 0x0F12, 0x010A  },   //TVAR_ash_pGAS[138] //
+{ 0x0F12, 0x0139  },   //TVAR_ash_pGAS[139] //
+{ 0x0F12, 0x017B  },   //TVAR_ash_pGAS[140] //
+{ 0x0F12, 0x01C5  },   //TVAR_ash_pGAS[141] //
+{ 0x0F12, 0x0205  },   //TVAR_ash_pGAS[142] //
+{ 0x0F12, 0x01A2  },   //TVAR_ash_pGAS[143] //
+{ 0x0F12, 0x015F  },   //TVAR_ash_pGAS[144] //
+{ 0x0F12, 0x0126  },   //TVAR_ash_pGAS[145] //
+{ 0x0F12, 0x00F9  },   //TVAR_ash_pGAS[146] //
+{ 0x0F12, 0x00D7  },   //TVAR_ash_pGAS[147] //
+{ 0x0F12, 0x00BF  },   //TVAR_ash_pGAS[148] //
+{ 0x0F12, 0x00B6  },   //TVAR_ash_pGAS[149] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[150] //
+{ 0x0F12, 0x00D2  },   //TVAR_ash_pGAS[151] //
+{ 0x0F12, 0x00F3  },   //TVAR_ash_pGAS[152] //
+{ 0x0F12, 0x011D  },   //TVAR_ash_pGAS[153] //
+{ 0x0F12, 0x015A  },   //TVAR_ash_pGAS[154] //
+{ 0x0F12, 0x019E  },   //TVAR_ash_pGAS[155] //
+{ 0x0F12, 0x0171  },   //TVAR_ash_pGAS[156] //
+{ 0x0F12, 0x012E  },   //TVAR_ash_pGAS[157] //
+{ 0x0F12, 0x00F1  },   //TVAR_ash_pGAS[158] //
+{ 0x0F12, 0x00BF  },   //TVAR_ash_pGAS[159] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[160] //
+{ 0x0F12, 0x0081  },   //TVAR_ash_pGAS[161] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[162] //
+{ 0x0F12, 0x0080  },   //TVAR_ash_pGAS[163] //
+{ 0x0F12, 0x0097  },   //TVAR_ash_pGAS[164] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[165] //
+{ 0x0F12, 0x00EE  },   //TVAR_ash_pGAS[166] //
+{ 0x0F12, 0x012B  },   //TVAR_ash_pGAS[167] //
+{ 0x0F12, 0x0177  },   //TVAR_ash_pGAS[168] //
+{ 0x0F12, 0x0144  },   //TVAR_ash_pGAS[169] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_pGAS[170] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[171] //
+{ 0x0F12, 0x0088  },   //TVAR_ash_pGAS[172] //
+{ 0x0F12, 0x005F  },   //TVAR_ash_pGAS[173] //
+{ 0x0F12, 0x0049  },   //TVAR_ash_pGAS[174] //
+{ 0x0F12, 0x0041  },   //TVAR_ash_pGAS[175] //
+{ 0x0F12, 0x0049  },   //TVAR_ash_pGAS[176] //
+{ 0x0F12, 0x0061  },   //TVAR_ash_pGAS[177] //
+{ 0x0F12, 0x0089  },   //TVAR_ash_pGAS[178] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[179] //
+{ 0x0F12, 0x0104  },   //TVAR_ash_pGAS[180] //
+{ 0x0F12, 0x014D  },   //TVAR_ash_pGAS[181] //
+{ 0x0F12, 0x0122  },   //TVAR_ash_pGAS[182] //
+{ 0x0F12, 0x00DD  },   //TVAR_ash_pGAS[183] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[184] //
+{ 0x0F12, 0x005F  },   //TVAR_ash_pGAS[185] //
+{ 0x0F12, 0x0036  },   //TVAR_ash_pGAS[186] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[187] //
+{ 0x0F12, 0x0019  },   //TVAR_ash_pGAS[188] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[189] //
+{ 0x0F12, 0x003A  },   //TVAR_ash_pGAS[190] //
+{ 0x0F12, 0x0066  },   //TVAR_ash_pGAS[191] //
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[192] //
+{ 0x0F12, 0x00E6  },   //TVAR_ash_pGAS[193] //
+{ 0x0F12, 0x0130  },   //TVAR_ash_pGAS[194] //
+{ 0x0F12, 0x010B  },   //TVAR_ash_pGAS[195] //
+{ 0x0F12, 0x00C6  },   //TVAR_ash_pGAS[196] //
+{ 0x0F12, 0x0082  },   //TVAR_ash_pGAS[197] //
+{ 0x0F12, 0x0047  },   //TVAR_ash_pGAS[198] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[199] //
+{ 0x0F12, 0x000D  },   //TVAR_ash_pGAS[200] //
+{ 0x0F12, 0x0007  },   //TVAR_ash_pGAS[201] //
+{ 0x0F12, 0x000F  },   //TVAR_ash_pGAS[202] //
+{ 0x0F12, 0x0027  },   //TVAR_ash_pGAS[203] //
+{ 0x0F12, 0x0053  },   //TVAR_ash_pGAS[204] //
+{ 0x0F12, 0x008F  },   //TVAR_ash_pGAS[205] //
+{ 0x0F12, 0x00D6  },   //TVAR_ash_pGAS[206] //
+{ 0x0F12, 0x0121  },   //TVAR_ash_pGAS[207] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_pGAS[208] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[209] //
+{ 0x0F12, 0x0077  },   //TVAR_ash_pGAS[210] //
+{ 0x0F12, 0x0040  },   //TVAR_ash_pGAS[211] //
+{ 0x0F12, 0x001A  },   //TVAR_ash_pGAS[212] //
+{ 0x0F12, 0x0007  },   //TVAR_ash_pGAS[213] //
+{ 0x0F12, 0x0000  },   //TVAR_ash_pGAS[214] //
+{ 0x0F12, 0x000B  },   //TVAR_ash_pGAS[215] //
+{ 0x0F12, 0x0023  },   //TVAR_ash_pGAS[216] //
+{ 0x0F12, 0x004E  },   //TVAR_ash_pGAS[217] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[218] //
+{ 0x0F12, 0x00D3  },   //TVAR_ash_pGAS[219] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[220] //
+{ 0x0F12, 0x0103  },   //TVAR_ash_pGAS[221] //
+{ 0x0F12, 0x00C1  },   //TVAR_ash_pGAS[222] //
+{ 0x0F12, 0x007D  },   //TVAR_ash_pGAS[223] //
+{ 0x0F12, 0x0046  },   //TVAR_ash_pGAS[224] //
+{ 0x0F12, 0x0024  },   //TVAR_ash_pGAS[225] //
+{ 0x0F12, 0x0010  },   //TVAR_ash_pGAS[226] //
+{ 0x0F12, 0x0008  },   //TVAR_ash_pGAS[227] //
+{ 0x0F12, 0x0014  },   //TVAR_ash_pGAS[228] //
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[229] //
+{ 0x0F12, 0x0059  },   //TVAR_ash_pGAS[230] //
+{ 0x0F12, 0x0094  },   //TVAR_ash_pGAS[231] //
+{ 0x0F12, 0x00DB  },   //TVAR_ash_pGAS[232] //
+{ 0x0F12, 0x0125  },   //TVAR_ash_pGAS[233] //
+{ 0x0F12, 0x0117  },   //TVAR_ash_pGAS[234] //
+{ 0x0F12, 0x00D5  },   //TVAR_ash_pGAS[235] //
+{ 0x0F12, 0x0092  },   //TVAR_ash_pGAS[236] //
+{ 0x0F12, 0x005C  },   //TVAR_ash_pGAS[237] //
+{ 0x0F12, 0x0038  },   //TVAR_ash_pGAS[238] //
+{ 0x0F12, 0x0026  },   //TVAR_ash_pGAS[239] //
+{ 0x0F12, 0x0020  },   //TVAR_ash_pGAS[240] //
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[241] //
+{ 0x0F12, 0x0044  },   //TVAR_ash_pGAS[242] //
+{ 0x0F12, 0x006F  },   //TVAR_ash_pGAS[243] //
+{ 0x0F12, 0x00AC  },   //TVAR_ash_pGAS[244] //
+{ 0x0F12, 0x00F2  },   //TVAR_ash_pGAS[245] //
+{ 0x0F12, 0x013B  },   //TVAR_ash_pGAS[246] //
+{ 0x0F12, 0x0131  },   //TVAR_ash_pGAS[247] //
+{ 0x0F12, 0x00EE  },   //TVAR_ash_pGAS[248] //
+{ 0x0F12, 0x00B3  },   //TVAR_ash_pGAS[249] //
+{ 0x0F12, 0x007E  },   //TVAR_ash_pGAS[250] //
+{ 0x0F12, 0x005B  },   //TVAR_ash_pGAS[251] //
+{ 0x0F12, 0x0047  },   //TVAR_ash_pGAS[252] //
+{ 0x0F12, 0x0044  },   //TVAR_ash_pGAS[253] //
+{ 0x0F12, 0x004E  },   //TVAR_ash_pGAS[254] //
+{ 0x0F12, 0x0067  },   //TVAR_ash_pGAS[255] //
+{ 0x0F12, 0x0094  },   //TVAR_ash_pGAS[256] //
+{ 0x0F12, 0x00D0  },   //TVAR_ash_pGAS[257] //
+{ 0x0F12, 0x0112  },   //TVAR_ash_pGAS[258] //
+{ 0x0F12, 0x0159  },   //TVAR_ash_pGAS[259] //
+{ 0x0F12, 0x015E  },   //TVAR_ash_pGAS[260] //
+{ 0x0F12, 0x011B  },   //TVAR_ash_pGAS[261] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[262] //
+{ 0x0F12, 0x00B1  },   //TVAR_ash_pGAS[263] //
+{ 0x0F12, 0x008E  },   //TVAR_ash_pGAS[264] //
+{ 0x0F12, 0x007E  },   //TVAR_ash_pGAS[265] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[266] //
+{ 0x0F12, 0x0084  },   //TVAR_ash_pGAS[267] //
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[268] //
+{ 0x0F12, 0x00C8  },   //TVAR_ash_pGAS[269] //
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[270] //
+{ 0x0F12, 0x013A  },   //TVAR_ash_pGAS[271] //
+{ 0x0F12, 0x0185  },   //TVAR_ash_pGAS[272] //
+{ 0x0F12, 0x0188  },   //TVAR_ash_pGAS[273] //
+{ 0x0F12, 0x0148  },   //TVAR_ash_pGAS[274] //
+{ 0x0F12, 0x010D  },   //TVAR_ash_pGAS[275] //
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[276] //
+{ 0x0F12, 0x00C7  },   //TVAR_ash_pGAS[277] //
+{ 0x0F12, 0x00B4  },   //TVAR_ash_pGAS[278] //
+{ 0x0F12, 0x00B2  },   //TVAR_ash_pGAS[279] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[280] //
+{ 0x0F12, 0x00D9  },   //TVAR_ash_pGAS[281] //
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[282] //
+{ 0x0F12, 0x012F  },   //TVAR_ash_pGAS[283] //
+{ 0x0F12, 0x016D  },   //TVAR_ash_pGAS[284] //
+{ 0x0F12, 0x01A7  },   //TVAR_ash_pGAS[285] //
+{ 0x0F12, 0x018F  },   //TVAR_ash_pGAS[286] //
+{ 0x0F12, 0x014E  },   //TVAR_ash_pGAS[287] //
+{ 0x0F12, 0x0119  },   //TVAR_ash_pGAS[288] //
+{ 0x0F12, 0x00EC  },   //TVAR_ash_pGAS[289] //
+{ 0x0F12, 0x00CD  },   //TVAR_ash_pGAS[290] //
+{ 0x0F12, 0x00BB  },   //TVAR_ash_pGAS[291] //
+{ 0x0F12, 0x00B8  },   //TVAR_ash_pGAS[292] //
+{ 0x0F12, 0x00C4  },   //TVAR_ash_pGAS[293] //
+{ 0x0F12, 0x00DE  },   //TVAR_ash_pGAS[294] //
+{ 0x0F12, 0x0105  },   //TVAR_ash_pGAS[295] //
+{ 0x0F12, 0x0135  },   //TVAR_ash_pGAS[296] //
+{ 0x0F12, 0x0176  },   //TVAR_ash_pGAS[297] //
+{ 0x0F12, 0x01B8  },   //TVAR_ash_pGAS[298] //
+{ 0x0F12, 0x0161  },   //TVAR_ash_pGAS[299] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[300] //
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[301] //
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[302] //
+{ 0x0F12, 0x0093  },   //TVAR_ash_pGAS[303] //
+{ 0x0F12, 0x0080  },   //TVAR_ash_pGAS[304] //
+{ 0x0F12, 0x007C  },   //TVAR_ash_pGAS[305] //
+{ 0x0F12, 0x0087  },   //TVAR_ash_pGAS[306] //
+{ 0x0F12, 0x00A3  },   //TVAR_ash_pGAS[307] //
+{ 0x0F12, 0x00CD  },   //TVAR_ash_pGAS[308] //
+{ 0x0F12, 0x0104  },   //TVAR_ash_pGAS[309] //
+{ 0x0F12, 0x0142  },   //TVAR_ash_pGAS[310] //
+{ 0x0F12, 0x0192  },   //TVAR_ash_pGAS[311] //
+{ 0x0F12, 0x0136  },   //TVAR_ash_pGAS[312] //
+{ 0x0F12, 0x00F4  },   //TVAR_ash_pGAS[313] //
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[314] //
+{ 0x0F12, 0x0081  },   //TVAR_ash_pGAS[315] //
+{ 0x0F12, 0x005C  },   //TVAR_ash_pGAS[316] //
+{ 0x0F12, 0x0048  },   //TVAR_ash_pGAS[317] //
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[318] //
+{ 0x0F12, 0x004E  },   //TVAR_ash_pGAS[319] //
+{ 0x0F12, 0x006A  },   //TVAR_ash_pGAS[320] //
+{ 0x0F12, 0x0097  },   //TVAR_ash_pGAS[321] //
+{ 0x0F12, 0x00D0  },   //TVAR_ash_pGAS[322] //
+{ 0x0F12, 0x0116  },   //TVAR_ash_pGAS[323] //
+{ 0x0F12, 0x0160  },   //TVAR_ash_pGAS[324] //
+{ 0x0F12, 0x0118  },   //TVAR_ash_pGAS[325] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[326] //
+{ 0x0F12, 0x0093  },   //TVAR_ash_pGAS[327] //
+{ 0x0F12, 0x005B  },   //TVAR_ash_pGAS[328] //
+{ 0x0F12, 0x0035  },   //TVAR_ash_pGAS[329] //
+{ 0x0F12, 0x0020  },   //TVAR_ash_pGAS[330] //
+{ 0x0F12, 0x001B  },   //TVAR_ash_pGAS[331] //
+{ 0x0F12, 0x0024  },   //TVAR_ash_pGAS[332] //
+{ 0x0F12, 0x0041  },   //TVAR_ash_pGAS[333] //
+{ 0x0F12, 0x006F  },   //TVAR_ash_pGAS[334] //
+{ 0x0F12, 0x00AC  },   //TVAR_ash_pGAS[335] //
+{ 0x0F12, 0x00F3  },   //TVAR_ash_pGAS[336] //
+{ 0x0F12, 0x013F  },   //TVAR_ash_pGAS[337] //
+{ 0x0F12, 0x0105  },   //TVAR_ash_pGAS[338] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[339] //
+{ 0x0F12, 0x007F  },   //TVAR_ash_pGAS[340] //
+{ 0x0F12, 0x0046  },   //TVAR_ash_pGAS[341] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[342] //
+{ 0x0F12, 0x000E  },   //TVAR_ash_pGAS[343] //
+{ 0x0F12, 0x0007  },   //TVAR_ash_pGAS[344] //
+{ 0x0F12, 0x0010  },   //TVAR_ash_pGAS[345] //
+{ 0x0F12, 0x002A  },   //TVAR_ash_pGAS[346] //
+{ 0x0F12, 0x0058  },   //TVAR_ash_pGAS[347] //
+{ 0x0F12, 0x0094  },   //TVAR_ash_pGAS[348] //
+{ 0x0F12, 0x00DB  },   //TVAR_ash_pGAS[349] //
+{ 0x0F12, 0x0127  },   //TVAR_ash_pGAS[350] //
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[351] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[352] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[353] //
+{ 0x0F12, 0x0042  },   //TVAR_ash_pGAS[354] //
+{ 0x0F12, 0x001C  },   //TVAR_ash_pGAS[355] //
+{ 0x0F12, 0x0008  },   //TVAR_ash_pGAS[356] //
+{ 0x0F12, 0x0000  },   //TVAR_ash_pGAS[357] //
+{ 0x0F12, 0x000B  },   //TVAR_ash_pGAS[358] //
+{ 0x0F12, 0x0023  },   //TVAR_ash_pGAS[359] //
+{ 0x0F12, 0x0050  },   //TVAR_ash_pGAS[360] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[361] //
+{ 0x0F12, 0x00D3  },   //TVAR_ash_pGAS[362] //
+{ 0x0F12, 0x011D  },   //TVAR_ash_pGAS[363] //
+{ 0x0F12, 0x0108  },   //TVAR_ash_pGAS[364] //
+{ 0x0F12, 0x00C4  },   //TVAR_ash_pGAS[365] //
+{ 0x0F12, 0x0083  },   //TVAR_ash_pGAS[366] //
+{ 0x0F12, 0x004C  },   //TVAR_ash_pGAS[367] //
+{ 0x0F12, 0x0027  },   //TVAR_ash_pGAS[368] //
+{ 0x0F12, 0x0011  },   //TVAR_ash_pGAS[369] //
+{ 0x0F12, 0x0008  },   //TVAR_ash_pGAS[370] //
+{ 0x0F12, 0x0013  },   //TVAR_ash_pGAS[371] //
+{ 0x0F12, 0x002A  },   //TVAR_ash_pGAS[372] //
+{ 0x0F12, 0x0055  },   //TVAR_ash_pGAS[373] //
+{ 0x0F12, 0x008F  },   //TVAR_ash_pGAS[374] //
+{ 0x0F12, 0x00D5  },   //TVAR_ash_pGAS[375] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[376] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[377] //
+{ 0x0F12, 0x00DC  },   //TVAR_ash_pGAS[378] //
+{ 0x0F12, 0x009C  },   //TVAR_ash_pGAS[379] //
+{ 0x0F12, 0x0064  },   //TVAR_ash_pGAS[380] //
+{ 0x0F12, 0x003D  },   //TVAR_ash_pGAS[381] //
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[382] //
+{ 0x0F12, 0x001F  },   //TVAR_ash_pGAS[383] //
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[384] //
+{ 0x0F12, 0x003F  },   //TVAR_ash_pGAS[385] //
+{ 0x0F12, 0x0069  },   //TVAR_ash_pGAS[386] //
+{ 0x0F12, 0x00A3  },   //TVAR_ash_pGAS[387] //
+{ 0x0F12, 0x00E8  },   //TVAR_ash_pGAS[388] //
+{ 0x0F12, 0x012D  },   //TVAR_ash_pGAS[389] //
+{ 0x0F12, 0x013D  },   //TVAR_ash_pGAS[390] //
+{ 0x0F12, 0x00FB  },   //TVAR_ash_pGAS[391] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[392] //
+{ 0x0F12, 0x0089  },   //TVAR_ash_pGAS[393] //
+{ 0x0F12, 0x0063  },   //TVAR_ash_pGAS[394] //
+{ 0x0F12, 0x004C  },   //TVAR_ash_pGAS[395] //
+{ 0x0F12, 0x0045  },   //TVAR_ash_pGAS[396] //
+{ 0x0F12, 0x004B  },   //TVAR_ash_pGAS[397] //
+{ 0x0F12, 0x0061  },   //TVAR_ash_pGAS[398] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[399] //
+{ 0x0F12, 0x00C4  },   //TVAR_ash_pGAS[400] //
+{ 0x0F12, 0x0102  },   //TVAR_ash_pGAS[401] //
+{ 0x0F12, 0x014B  },   //TVAR_ash_pGAS[402] //
+{ 0x0F12, 0x016F  },   //TVAR_ash_pGAS[403] //
+{ 0x0F12, 0x0129  },   //TVAR_ash_pGAS[404] //
+{ 0x0F12, 0x00F0  },   //TVAR_ash_pGAS[405] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[406] //
+{ 0x0F12, 0x009A  },   //TVAR_ash_pGAS[407] //
+{ 0x0F12, 0x0084  },   //TVAR_ash_pGAS[408] //
+{ 0x0F12, 0x007B  },   //TVAR_ash_pGAS[409] //
+{ 0x0F12, 0x0082  },   //TVAR_ash_pGAS[410] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[411] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[412] //
+{ 0x0F12, 0x00EF  },   //TVAR_ash_pGAS[413] //
+{ 0x0F12, 0x0129  },   //TVAR_ash_pGAS[414] //
+{ 0x0F12, 0x0173  },   //TVAR_ash_pGAS[415] //
+{ 0x0F12, 0x01A0  },   //TVAR_ash_pGAS[416] //
+{ 0x0F12, 0x015B  },   //TVAR_ash_pGAS[417] //
+{ 0x0F12, 0x0121  },   //TVAR_ash_pGAS[418] //
+{ 0x0F12, 0x00F9  },   //TVAR_ash_pGAS[419] //
+{ 0x0F12, 0x00D8  },   //TVAR_ash_pGAS[420] //
+{ 0x0F12, 0x00C2  },   //TVAR_ash_pGAS[421] //
+{ 0x0F12, 0x00B7  },   //TVAR_ash_pGAS[422] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[423] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[424] //
+{ 0x0F12, 0x00F4  },   //TVAR_ash_pGAS[425] //
+{ 0x0F12, 0x0120  },   //TVAR_ash_pGAS[426] //
+{ 0x0F12, 0x015D  },   //TVAR_ash_pGAS[427] //
+{ 0x0F12, 0x0198  },   //TVAR_ash_pGAS[428] //
+{ 0x0F12, 0x013A  },   //TVAR_ash_pGAS[429] //
+{ 0x0F12, 0x010B  },   //TVAR_ash_pGAS[430] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[431] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[432] //
+{ 0x0F12, 0x00A7  },   //TVAR_ash_pGAS[433] //
+{ 0x0F12, 0x009A  },   //TVAR_ash_pGAS[434] //
+{ 0x0F12, 0x0097  },   //TVAR_ash_pGAS[435] //
+{ 0x0F12, 0x00A2  },   //TVAR_ash_pGAS[436] //
+{ 0x0F12, 0x00B9  },   //TVAR_ash_pGAS[437] //
+{ 0x0F12, 0x00D6  },   //TVAR_ash_pGAS[438] //
+{ 0x0F12, 0x00FD  },   //TVAR_ash_pGAS[439] //
+{ 0x0F12, 0x0133  },   //TVAR_ash_pGAS[440] //
+{ 0x0F12, 0x0165  },   //TVAR_ash_pGAS[441] //
+{ 0x0F12, 0x0117  },   //TVAR_ash_pGAS[442] //
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[443] //
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[444] //
+{ 0x0F12, 0x0091  },   //TVAR_ash_pGAS[445] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[446] //
+{ 0x0F12, 0x006D  },   //TVAR_ash_pGAS[447] //
+{ 0x0F12, 0x0069  },   //TVAR_ash_pGAS[448] //
+{ 0x0F12, 0x0072  },   //TVAR_ash_pGAS[449] //
+{ 0x0F12, 0x0088  },   //TVAR_ash_pGAS[450] //
+{ 0x0F12, 0x00A9  },   //TVAR_ash_pGAS[451] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[452] //
+{ 0x0F12, 0x0108  },   //TVAR_ash_pGAS[453] //
+{ 0x0F12, 0x0148  },   //TVAR_ash_pGAS[454] //
+{ 0x0F12, 0x00F1  },   //TVAR_ash_pGAS[455] //
+{ 0x0F12, 0x00BD  },   //TVAR_ash_pGAS[456] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[457] //
+{ 0x0F12, 0x0063  },   //TVAR_ash_pGAS[458] //
+{ 0x0F12, 0x0049  },   //TVAR_ash_pGAS[459] //
+{ 0x0F12, 0x003D  },   //TVAR_ash_pGAS[460] //
+{ 0x0F12, 0x003A  },   //TVAR_ash_pGAS[461] //
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[462] //
+{ 0x0F12, 0x0057  },   //TVAR_ash_pGAS[463] //
+{ 0x0F12, 0x007A  },   //TVAR_ash_pGAS[464] //
+{ 0x0F12, 0x00A8  },   //TVAR_ash_pGAS[465] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[466] //
+{ 0x0F12, 0x011B  },   //TVAR_ash_pGAS[467] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[468] //
+{ 0x0F12, 0x00A1  },   //TVAR_ash_pGAS[469] //
+{ 0x0F12, 0x006D  },   //TVAR_ash_pGAS[470] //
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[471] //
+{ 0x0F12, 0x0027  },   //TVAR_ash_pGAS[472] //
+{ 0x0F12, 0x001B  },   //TVAR_ash_pGAS[473] //
+{ 0x0F12, 0x0019  },   //TVAR_ash_pGAS[474] //
+{ 0x0F12, 0x001E  },   //TVAR_ash_pGAS[475] //
+{ 0x0F12, 0x0033  },   //TVAR_ash_pGAS[476] //
+{ 0x0F12, 0x0057  },   //TVAR_ash_pGAS[477] //
+{ 0x0F12, 0x0087  },   //TVAR_ash_pGAS[478] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[479] //
+{ 0x0F12, 0x00FA  },   //TVAR_ash_pGAS[480] //
+{ 0x0F12, 0x00C1  },   //TVAR_ash_pGAS[481] //
+{ 0x0F12, 0x008F  },   //TVAR_ash_pGAS[482] //
+{ 0x0F12, 0x005B  },	//TVAR_ash_pGAS[483] //                                                                        
+{ 0x0F12, 0x0031  },	//TVAR_ash_pGAS[484] //                                                                        
+{ 0x0F12, 0x0016  },	//TVAR_ash_pGAS[485] //                                                                        
+{ 0x0F12, 0x000B  },	//TVAR_ash_pGAS[486] //                                                                        
+{ 0x0F12, 0x0006  },	//TVAR_ash_pGAS[487] //                                                                        
+{ 0x0F12, 0x000D  },	//TVAR_ash_pGAS[488] //                                                                        
+{ 0x0F12, 0x001F  },	//TVAR_ash_pGAS[489] //                                                                        
+{ 0x0F12, 0x0042  },	//TVAR_ash_pGAS[490] //                                                                        
+{ 0x0F12, 0x0070  },	//TVAR_ash_pGAS[491] //                                                                        
+{ 0x0F12, 0x00AA  },	//TVAR_ash_pGAS[492] //                                                                        
+{ 0x0F12, 0x00E5  },	//TVAR_ash_pGAS[493] //                                                                        
+{ 0x0F12, 0x00BD  },	//TVAR_ash_pGAS[494] //                                                                        
+{ 0x0F12, 0x008A  },	//TVAR_ash_pGAS[495] //                                                                        
+{ 0x0F12, 0x0056  },	//TVAR_ash_pGAS[496] //                                                                        
+{ 0x0F12, 0x002C  },	//TVAR_ash_pGAS[497] //                                                                        
+{ 0x0F12, 0x0011  },	//TVAR_ash_pGAS[498] //                                                                        
+{ 0x0F12, 0x0005  },	//TVAR_ash_pGAS[499] //                                                                        
+{ 0x0F12, 0x0000  },	//TVAR_ash_pGAS[500] //                                                                        
+{ 0x0F12, 0x0008  },	//TVAR_ash_pGAS[501] //                                                                        
+{ 0x0F12, 0x0018  },	//TVAR_ash_pGAS[502] //                                                                        
+{ 0x0F12, 0x0039  },	//TVAR_ash_pGAS[503] //                                                                        
+{ 0x0F12, 0x0068  },	//TVAR_ash_pGAS[504] //                                                                        
+{ 0x0F12, 0x00A1  },	//TVAR_ash_pGAS[505] //                                                                        
+{ 0x0F12, 0x00DA  },	//TVAR_ash_pGAS[506] //                                                                        
+{ 0x0F12, 0x00C4  },	//TVAR_ash_pGAS[507] //                                                                        
+{ 0x0F12, 0x0092  },	//TVAR_ash_pGAS[508] //                                                                        
+{ 0x0F12, 0x005F  },	//TVAR_ash_pGAS[509] //                                                                        
+{ 0x0F12, 0x0034  },	//TVAR_ash_pGAS[510] //                                                                        
+{ 0x0F12, 0x001B  },	//TVAR_ash_pGAS[511] //                                                                        
+{ 0x0F12, 0x000D  },	//TVAR_ash_pGAS[512] //                                                                        
+{ 0x0F12, 0x0007  },	//TVAR_ash_pGAS[513] //                                                                        
+{ 0x0F12, 0x000E  },	//TVAR_ash_pGAS[514] //                                                                        
+{ 0x0F12, 0x001E  },	//TVAR_ash_pGAS[515] //                                                                        
+{ 0x0F12, 0x003E  },	//TVAR_ash_pGAS[516] //                                                                        
+{ 0x0F12, 0x006A  },	//TVAR_ash_pGAS[517] //                                                                        
+{ 0x0F12, 0x00A2  },	//TVAR_ash_pGAS[518] //                                                                        
+{ 0x0F12, 0x00DB  },	//TVAR_ash_pGAS[519] //                                                                        
+{ 0x0F12, 0x00D7  },	//TVAR_ash_pGAS[520] //                                                                        
+{ 0x0F12, 0x00A3  },	//TVAR_ash_pGAS[521] //                                                                        
+{ 0x0F12, 0x0073  },	//TVAR_ash_pGAS[522] //                                                                        
+{ 0x0F12, 0x0049  },	//TVAR_ash_pGAS[523] //                                                                        
+{ 0x0F12, 0x002F  },	//TVAR_ash_pGAS[524] //                                                                        
+{ 0x0F12, 0x0022  },	//TVAR_ash_pGAS[525] //                                                                        
+{ 0x0F12, 0x001B  },	//TVAR_ash_pGAS[526] //                                                                        
+{ 0x0F12, 0x0023  },	//TVAR_ash_pGAS[527] //                                                                        
+{ 0x0F12, 0x0031  },	//TVAR_ash_pGAS[528] //                                                                        
+{ 0x0F12, 0x0050  },	//TVAR_ash_pGAS[529] //                                                                        
+{ 0x0F12, 0x007C  },	//TVAR_ash_pGAS[530] //                                                                        
+{ 0x0F12, 0x00B1  },	//TVAR_ash_pGAS[531] //                                                                        
+{ 0x0F12, 0x00E9  },	//TVAR_ash_pGAS[532] //                                                                        
+{ 0x0F12, 0x00F2  },	//TVAR_ash_pGAS[533] //                                                                        
+{ 0x0F12, 0x00C0  },	//TVAR_ash_pGAS[534] //                                                                        
+{ 0x0F12, 0x0091  },	//TVAR_ash_pGAS[535] //                                                                        
+{ 0x0F12, 0x006A  },	//TVAR_ash_pGAS[536] //                                                                        
+{ 0x0F12, 0x0050  },	//TVAR_ash_pGAS[537] //                                                                        
+{ 0x0F12, 0x0041  },	//TVAR_ash_pGAS[538] //                                                                        
+{ 0x0F12, 0x003C  },	//TVAR_ash_pGAS[539] //                                                                        
+{ 0x0F12, 0x0040  },	//TVAR_ash_pGAS[540] //                                                                        
+{ 0x0F12, 0x004F  },	//TVAR_ash_pGAS[541] //                                                                        
+{ 0x0F12, 0x006D  },	//TVAR_ash_pGAS[542] //                                                                        
+{ 0x0F12, 0x0099  },	//TVAR_ash_pGAS[543] //                                                                        
+{ 0x0F12, 0x00C9  },	//TVAR_ash_pGAS[544] //                                                                        
+{ 0x0F12, 0x0102  },	//TVAR_ash_pGAS[545] //                                                                        
+{ 0x0F12, 0x0120  },	//TVAR_ash_pGAS[546] //                                                                        
+{ 0x0F12, 0x00EB  },	//TVAR_ash_pGAS[547] //                                                                        
+{ 0x0F12, 0x00BE  },	//TVAR_ash_pGAS[548] //                                                                        
+{ 0x0F12, 0x0099  },	//TVAR_ash_pGAS[549] //                                                                        
+{ 0x0F12, 0x0081  },	//TVAR_ash_pGAS[550] //                                                                        
+{ 0x0F12, 0x0074  },	//TVAR_ash_pGAS[551] //                                                                        
+{ 0x0F12, 0x006F  },	//TVAR_ash_pGAS[552] //                                                                        
+{ 0x0F12, 0x0071  },	//TVAR_ash_pGAS[553] //                                                                        
+{ 0x0F12, 0x0082  },	//TVAR_ash_pGAS[554] //                                                                        
+{ 0x0F12, 0x009B  },	//TVAR_ash_pGAS[555] //                                                                        
+{ 0x0F12, 0x00C0  },	//TVAR_ash_pGAS[556] //                                                                        
+{ 0x0F12, 0x00EE  },	//TVAR_ash_pGAS[557] //                                                                        
+{ 0x0F12, 0x0126  },	//TVAR_ash_pGAS[558] //                                                                        
+{ 0x0F12, 0x0147  },	//TVAR_ash_pGAS[559] //                                                                        
+{ 0x0F12, 0x0116  },	//TVAR_ash_pGAS[560] //                                                                        
+{ 0x0F12, 0x00E7  },	//TVAR_ash_pGAS[561] //                                                                        
+{ 0x0F12, 0x00C9  },	//TVAR_ash_pGAS[562] //                                                                        
+{ 0x0F12, 0x00B4  },	//TVAR_ash_pGAS[563] //                                                                        
+{ 0x0F12, 0x00A7  },	//TVAR_ash_pGAS[564] //                                                                        
+{ 0x0F12, 0x00A0  },	//TVAR_ash_pGAS[565] //                                                                        
+{ 0x0F12, 0x00A3  },	//TVAR_ash_pGAS[566] //                                                                        
+{ 0x0F12, 0x00B1  },	//TVAR_ash_pGAS[567] //                                                                        
+{ 0x0F12, 0x00C9  },	//TVAR_ash_pGAS[568] //                                                                        
+{ 0x0F12, 0x00EA  },	//TVAR_ash_pGAS[569] //                                                                        
+{ 0x0F12, 0x011B  },	//TVAR_ash_pGAS[570] //                                                                        
+{ 0x0F12, 0x0141  },	//TVAR_ash_pGAS[571] //                                                                        
+                        
+{ 0x002A, 0x074E  },	    
+{ 0x0F12, 0x0001  },	//ash_bLumaMode //         	                                                                        
+{ 0x002A, 0x0D30  },                               
+{ 0x0F12, 0x02A8  },	//awbb_GLocu //        
+{ 0x0F12, 0x0347  },	//awbb_GLocuSB //      
+                                                   
+{ 0x002A, 0x06B8  },                               
+{ 0x0F12, 0x00C0  },	//TVAR_ash_AwbashCord[0] //                                                                        
+{ 0x0F12, 0x00E0  },	//TVAR_ash_AwbashCord[1] //                                                                        
+{ 0x0F12, 0x0120  },	//TVAR_ash_AwbashCord[2] //                                                                        
+{ 0x0F12, 0x0124  },	//TVAR_ash_AwbashCord[3] //                                                                        
+{ 0x0F12, 0x0156  },	//TVAR_ash_AwbashCord[4] //                                                                        
+{ 0x0F12, 0x017F  },	//TVAR_ash_AwbashCord[5] //                                                                        
+{ 0x0F12, 0x018F  },	//TVAR_ash_AwbashCord[6] //                                                                        
+                                                   
+                                                   
+{ 0x002A, 0x0664  },                               
+{ 0x0F12, 0x013E  },	//seti_uContrastCenter //                                                                          
+                                                   
+                                                   
+{ 0x002A, 0x06C6  },                               
+{ 0x0F12, 0x010B  },	//ash_CGrasalphaS[0] //
+{ 0x0F12, 0x0103  },	//ash_CGrasalphaS[1] //
+{ 0x0F12, 0x00FC  },	//ash_CGrasalphaS[2] //
+{ 0x0F12, 0x010C  },	//ash_CGrasalphaS[3] //
+                        
+{ 0x002A, 0x0C48  },    
+{ 0x0F12, 0x03C8  },	//awbb_IndoorGrZones_m_BGrid[0] // 		                                                                        
+{ 0x0F12, 0x03DE  },	//awbb_IndoorGrZones_m_BGrid[1] //                                                                         
+{ 0x0F12, 0x0372  },	//awbb_IndoorGrZones_m_BGrid[2] //                                                                         
+{ 0x0F12, 0x03EA  },	//awbb_IndoorGrZones_m_BGrid[3] //                                                                         
+{ 0x0F12, 0x0336  },	//awbb_IndoorGrZones_m_BGrid[4] //                                                                         
+{ 0x0F12, 0x03DE  },	//awbb_IndoorGrZones_m_BGrid[5] //                                                                         
+{ 0x0F12, 0x0302  },	//awbb_IndoorGrZones_m_BGrid[6] //                                                                         
+{ 0x0F12, 0x03A2  },	//awbb_IndoorGrZones_m_BGrid[7] //                                                                         
+{ 0x0F12, 0x02C8  },	//awbb_IndoorGrZones_m_BGrid[8] //                                                                         
+{ 0x0F12, 0x0368  },	//awbb_IndoorGrZones_m_BGrid[9] //                                                                         
+{ 0x0F12, 0x0292  },	//awbb_IndoorGrZones_m_BGrid[10] //                                                                        
+{ 0x0F12, 0x033A  },	//awbb_IndoorGrZones_m_BGrid[11] //                                                                        
+{ 0x0F12, 0x0276  },	//awbb_IndoorGrZones_m_BGrid[12] //                                                                        
+{ 0x0F12, 0x0306  },	//awbb_IndoorGrZones_m_BGrid[13] //                                                                        
+{ 0x0F12, 0x025A  },	//awbb_IndoorGrZones_m_BGrid[14] //                                                                        
+{ 0x0F12, 0x02C2  },	//awbb_IndoorGrZones_m_BGrid[15] //                                                                        
+{ 0x0F12, 0x0246  },	//awbb_IndoorGrZones_m_BGrid[16] //                                                                        
+{ 0x0F12, 0x02A2  },	//awbb_IndoorGrZones_m_BGrid[17] //                                                                        
+{ 0x0F12, 0x0232  },	//awbb_IndoorGrZones_m_BGrid[18] //                                                                        
+{ 0x0F12, 0x0298  },	//awbb_IndoorGrZones_m_BGrid[19] //                                                                        
+{ 0x0F12, 0x021E  },	//awbb_IndoorGrZones_m_BGrid[20] //                                                                        
+{ 0x0F12, 0x027E  },	//awbb_IndoorGrZones_m_BGrid[21] //                                                                        
+{ 0x0F12, 0x0208  },	//awbb_IndoorGrZones_m_BGrid[22] //                                                                        
+{ 0x0F12, 0x026C  },	//awbb_IndoorGrZones_m_BGrid[23] //                                                                        
+{ 0x0F12, 0x01EE  },	//awbb_IndoorGrZones_m_BGrid[24] //                                                                        
+{ 0x0F12, 0x025C  },	//awbb_IndoorGrZones_m_BGrid[25] //                                                                        
+{ 0x0F12, 0x01F0  },	//awbb_IndoorGrZones_m_BGrid[26] //                                                                        
+{ 0x0F12, 0x0248  },	//awbb_IndoorGrZones_m_BGrid[27] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[28] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[29] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[30] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[31] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[32] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[33] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[34] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[35] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[36] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[37] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[38] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[39] //                                                                        
+                                                           
+{ 0x0F12, 0x0005  },   //awbb_IndoorGrZones_m_Gridstep //  
+
+{ 0x002A, 0x0C9C  },
+{ 0x0F12, 0x000E  },
+{ 0x002A, 0x0CA0  },                                       
+{ 0x0F12, 0x0108  },	//awbb_IndoorGrZones_m_Boffs //
+                                                           
+{ 0x002A, 0x0CE0  },                                       
+{ 0x0F12, 0x03D4  },	//awbb_LowBrGrZones_m_BGrid[0] //                                                                          
+{ 0x0F12, 0x043E  },	//awbb_LowBrGrZones_m_BGrid[1] //                                                                          
+{ 0x0F12, 0x035C  },	//awbb_LowBrGrZones_m_BGrid[2] //                                                                          
+{ 0x0F12, 0x0438  },	//awbb_LowBrGrZones_m_BGrid[3] //                                                                          
+{ 0x0F12, 0x02F0  },	//awbb_LowBrGrZones_m_BGrid[4] //                                                                          
+{ 0x0F12, 0x042D  },	//awbb_LowBrGrZones_m_BGrid[5] //                                                                          
+{ 0x0F12, 0x029A  },	//awbb_LowBrGrZones_m_BGrid[6] //                                                                          
+{ 0x0F12, 0x03EF  },	//awbb_LowBrGrZones_m_BGrid[7] //                                                                          
+{ 0x0F12, 0x025E  },	//awbb_LowBrGrZones_m_BGrid[8] //                                                                          
+{ 0x0F12, 0x0395  },	//awbb_LowBrGrZones_m_BGrid[9] //                                                                          
+{ 0x0F12, 0x022E  },	//awbb_LowBrGrZones_m_BGrid[10] //                                                                         
+{ 0x0F12, 0x0346  },	//awbb_LowBrGrZones_m_BGrid[11] //                                                                         
+{ 0x0F12, 0x0200  },	//awbb_LowBrGrZones_m_BGrid[12] //                                                                         
+{ 0x0F12, 0x02F6  },	//awbb_LowBrGrZones_m_BGrid[13] //                                                                         
+{ 0x0F12, 0x01CE  },	//awbb_LowBrGrZones_m_BGrid[14] //                                                                         
+{ 0x0F12, 0x02C8  },	//awbb_LowBrGrZones_m_BGrid[15] //                                                                         
+{ 0x0F12, 0x01BB  },	//awbb_LowBrGrZones_m_BGrid[16] //                                                                         
+{ 0x0F12, 0x0287  },	//awbb_LowBrGrZones_m_BGrid[17] //                                                                         
+{ 0x0F12, 0x01E2  },	//awbb_LowBrGrZones_m_BGrid[18] //                                                                         
+{ 0x0F12, 0x0239  },	//awbb_LowBrGrZones_m_BGrid[19] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[20] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[21] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[22] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[23] //                                                                         
+                        
+{ 0x0F12, 0x0006  },	//awbb_LowBrGrZones_m_Gridstep //	                                                                        
+{ 0x002A, 0x0D18  },                                     
+{ 0x0F12, 0x00AE  },	//awbb_LowBrGrZones_m_Boff //
+                        
+{ 0x002A, 0x0CA4  },    
+{ 0x0F12, 0x026E  },	//0294//0286//02C2//awbb_OutdoorGrZones_m_BGrid[0] // 		                                                                        
+{ 0x0F12, 0x02A4  },	//02CB//02BD//02E0//awbb_OutdoorGrZones_m_BGrid[1] //                                                                         
+{ 0x0F12, 0x0262  },	//027A//026C//0278//awbb_OutdoorGrZones_m_BGrid[2] //                                                                         
+{ 0x0F12, 0x02A8  },	//02D7//02C9//02BC//awbb_OutdoorGrZones_m_BGrid[3] //                                                                         
+{ 0x0F12, 0x0256  },	//0266//0258//025A//awbb_OutdoorGrZones_m_BGrid[4] //                                                                         
+{ 0x0F12, 0x02AE  },	//02BF//02B1//02A2//awbb_OutdoorGrZones_m_BGrid[5] //                                                                         
+{ 0x0F12, 0x0248  },	//0252//0244//024A//awbb_OutdoorGrZones_m_BGrid[6] //                                                                         
+{ 0x0F12, 0x02A4  },	//02A8//029A//0288//awbb_OutdoorGrZones_m_BGrid[7] //                                                                         
+{ 0x0F12, 0x023E  },	//023E//0230//0240//awbb_OutdoorGrZones_m_BGrid[8] //                                                                         
+{ 0x0F12, 0x029A  },	//028F//0281//0278//awbb_OutdoorGrZones_m_BGrid[9] //                                                                         
+{ 0x0F12, 0x023A  },	//0239//022B//023E//awbb_OutdoorGrZones_m_BGrid[10] //                                                                        
+{ 0x0F12, 0x0290  },	//027A//026C//0254//awbb_OutdoorGrZones_m_BGrid[11] //                                                                        
+{ 0x0F12, 0x023A  },	//024A//023C//0000//awbb_OutdoorGrZones_m_BGrid[12] //                                                                        
+{ 0x0F12, 0x027E  },	//0260//0252//0000//awbb_OutdoorGrZones_m_BGrid[13] //                                                                        
+{ 0x0F12, 0x0244  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[14] //                                                                        
+{ 0x0F12, 0x0266  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[15] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[16] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[17] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[18] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[19] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[20] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[21] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[22] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[23] //                                                                        
+                  
+{ 0x0F12, 0x0004  },	//awbb_OutdoorGrZones_m_Gridstep //               
+{ 0x002A, 0x0CD8  },
+{ 0x0F12, 0x0008  },
+{ 0x002A, 0x0CDC  },                                                          
+{ 0x0F12, 0x0204  },	//awbb_OutdoorGrZones_m_Boff //                   
+{ 0x002A, 0x0D1C  },                                                          
+{ 0x0F12, 0x037C  },	//awbb_CrclLowT_R_c //                            
+{ 0x002A, 0x0D20  },                                                          
+{ 0x0F12, 0x0157  },	//awbb_CrclLowT_B_c //                            
+{ 0x002A, 0x0D24  },                                                          
+{ 0x0F12, 0x3EB8  },	//awbb_CrclLowT_Rad_c //                          
+                        
+{ 0x002A, 0x0D2C  },    
+{ 0x0F12, 0x013D  },	//awbb_IntcR //	                                                                        
+{ 0x0F12, 0x011E  },	//awbb_IntcB //                                                                        
+{ 0x002A, 0x0D46  },    
+{ 0x0F12, 0x04C0  },	//0554//055D//0396//04A2//awbb_MvEq_RBthresh //	                                                                        
+                        
+                        
+                        
+{ 0x002A, 0x0D28  },    //wp outdoor
+{ 0x0F12, 0x0270  },	                                                                        
+{ 0x0F12, 0x0240  },	                                                                        
+                        
+                  
+{ 0x002A, 0x0D5C  },    
+{ 0x0F12, 0x7FFF  },	                                                                        
+{ 0x0F12, 0x0050  },	                                                                        
+                        
+{ 0x002A, 0x2316  },    
+{ 0x0F12, 0x0006  },	                                                                        
+                        
+{ 0x002A, 0x0E44  },    
+{ 0x0F12, 0x0525  },	                                                                        
+{ 0x0F12, 0x0400  },	                                                                        
+{ 0x0F12, 0x078C  },	                                                                        
+                        
+{ 0x002A, 0x0E36  },    
+{ 0x0F12, 0x0028  },	 //R OFFSET                                                                       
+{ 0x0F12, 0xFFD8  },	 //B OFFSET                                                                       
+{ 0x0F12, 0x0000  },	 //G OFFSET                                                                       
+                        
+{ 0x002A, 0x0DD4  },    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[0] //        	                                                                        
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[1] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[2] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[3] //    
+{ 0x0F12, 0xFFF0  },	//awbb_GridCorr_R[4] //    
+{ 0x0F12, 0x0080  },	//awbb_GridCorr_R[5] //    
+                   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[6] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[7] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[8] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[9] //    
+{ 0x0F12, 0xFFF0  },	//awbb_GridCorr_R[10] //   
+{ 0x0F12, 0x0080  },	//awbb_GridCorr_R[11] //   
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[12] //   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[13] //   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[14] //   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[15] //   
+{ 0x0F12, 0xFFF0  },	//awbb_GridCorr_R[16] //   
+{ 0x0F12, 0x0080  },	//awbb_GridCorr_R[17] //   
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[0] ////                                                                        
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[1] //                                                                          
+{ 0x0F12, 0x0032  },	//awbb_GridCorr_B[2] //                                                                          
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[3] //                                                                          
+{ 0x0F12, 0x0020  },	//awbb_GridCorr_B[4] //                                                                          
+{ 0x0F12, 0xFFC0  },	//awbb_GridCorr_B[5] //                                                                          
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[6] //                                                                          
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[7] //                                                                          
+{ 0x0F12, 0x0032  },	//awbb_GridCorr_B[8] //                                                                          
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[9] //                                                                          
+{ 0x0F12, 0x0020  },	//awbb_GridCorr_B[10] //                                                                         
+{ 0x0F12, 0xFFC0  },	//awbb_GridCorr_B[11] //                                                                         
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[12] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[13] //                                                                         
+{ 0x0F12, 0x0032  },	//awbb_GridCorr_B[14] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[15] //                                                                         
+{ 0x0F12, 0x0020  },	//awbb_GridCorr_B[16] //   
+{ 0x0F12, 0xFFC0  },	//awbb_GridCorr_B[17] //                 
+                   
+{ 0x0F12, 0x02D9  },	//awbb_GridConst_1[0] //                                                                     
+{ 0x0F12, 0x0357  },	//awbb_GridConst_1[1] //                                                                     
+{ 0x0F12, 0x03D1  },	//awbb_GridConst_1[2] //                                                                     
+                   
+                   
+{ 0x0F12, 0x0DF6  },	//0E4F//0DE9//0DE9//awbb_GridConst_2[0] //                                                   
+{ 0x0F12, 0x0ED8  },	//0EDD//0EDD//0EDD//awbb_GridConst_2[1] //                                                   
+{ 0x0F12, 0x0F51  },	//0F42//0F42//0F42//awbb_GridConst_2[2] //                                                   
+{ 0x0F12, 0x0F5C  },	//0F4E//0F4E//0F54//awbb_GridConst_2[3] //                                                   
+{ 0x0F12, 0x0F8F  },	//0F99//0F99//0FAE//awbb_GridConst_2[4] //                                                   
+{ 0x0F12, 0x1006  },	//1006//1006//1011//awbb_GridConst_2[5] //                                                   
+                   
+{ 0x0F12, 0x00AC  },	//00BA//awbb_GridCoeff_R_1                                                                   
+{ 0x0F12, 0x00BD  },	//00AF//awbb_GridCoeff_B_1                                                                   
+{ 0x0F12, 0x0049  },	//0049//awbb_GridCoeff_R_2                                                                   
+{ 0x0F12, 0x00F5  },	//00F5//awbb_GridCoeff_B_2                                                                   
+                   
+{ 0x002A, 0x0E4A  },                         
+{ 0x0F12, 0x0002  },	//awbb_GridEnable//                                                                          
+                   
+{ 0x002A, 0x051A  },                         
+{ 0x0F12, 0x010E  },	//lt_uLimitHigh//
+{ 0x0F12, 0x00F5  },	//lt_uLimitLow// 
+                   
+                   
+{ 0x002A, 0x0F76  },                         
+{ 0x0F12, 0x0007  },	//ae_statmode BLC off : 0x0F, on : 0x0D//  illumType On : 07 , Off : 0F
+                   
+{ 0x002A, 0x1034  },                         
+{ 0x0F12, 0x00C0  },	//saRR_IllumType[0] //                                                                       
+{ 0x0F12, 0x00E0  },	//saRR_IllumType[1] //                                                                       
+{ 0x0F12, 0x0104  },	//saRR_IllumType[2] //                                                                       
+{ 0x0F12, 0x0129  },	//saRR_IllumType[3] //                                                                       
+{ 0x0F12, 0x0156  },	//saRR_IllumType[4] //                                                                       
+{ 0x0F12, 0x017F  },	//saRR_IllumType[5] //                                                                       
+{ 0x0F12, 0x018F  },	//saRR_IllumType[6] //                                                                       
+                   
+                   
+{ 0x0F12, 0x0120  },	//saRR_IllumTypeF[0] //                                                                      
+{ 0x0F12, 0x0120  },	//saRR_IllumTypeF[1] //                                                                      
+{ 0x0F12, 0x0120  },	//saRR_IllumTypeF[2] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[3] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[4] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[5] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[6] //                                                                      
+                        
+                        
+                        
+{ 0x002A, 0x3288  },	//saRR_usDualGammaLutRGBIndoor  //               	                                                                        
+{ 0x0F12, 0x0000  }, //	saRR_usDualGammaLutRGBIndoor[0] //[0] //                                                 
+{ 0x0F12, 0x0008  }, //  saRR_usDualGammaLutRGBIndoor[0] //[1] //                                                       
+{ 0x0F12, 0x0013  }, //  saRR_usDualGammaLutRGBIndoor[0] //[2] //                                                       
+{ 0x0F12, 0x002C  }, //  saRR_usDualGammaLutRGBIndoor[0] //[3] //                                                       
+{ 0x0F12, 0x0062  }, //  saRR_usDualGammaLutRGBIndoor[0] //[4] //                                                       
+{ 0x0F12, 0x00CD  }, //  saRR_usDualGammaLutRGBIndoor[0] //[5] //                                                       
+{ 0x0F12, 0x0129  }, //  saRR_usDualGammaLutRGBIndoor[0] //[6] //                                                       
+{ 0x0F12, 0x0151  }, //  saRR_usDualGammaLutRGBIndoor[0] //[7] //                                                       
+{ 0x0F12, 0x0174  }, //  saRR_usDualGammaLutRGBIndoor[0] //[8] //                                                       
+{ 0x0F12, 0x01AA  }, //  saRR_usDualGammaLutRGBIndoor[0] //[9] //                                                       
+{ 0x0F12, 0x01D7  }, //  saRR_usDualGammaLutRGBIndoor[0] //[10] //                                                      
+{ 0x0F12, 0x01FE  }, //  saRR_usDualGammaLutRGBIndoor[0] //[11] //                                                      
+{ 0x0F12, 0x0221  }, //  saRR_usDualGammaLutRGBIndoor[0] //[12] //                                                      
+{ 0x0F12, 0x025D  }, //  saRR_usDualGammaLutRGBIndoor[0] //[13] //                                                      
+{ 0x0F12, 0x0291  }, //  saRR_usDualGammaLutRGBIndoor[0] //[14] //                                                      
+{ 0x0F12, 0x02EB  }, //  saRR_usDualGammaLutRGBIndoor[0] //[15] //                                                      
+{ 0x0F12, 0x033A  }, //  saRR_usDualGammaLutRGBIndoor[0] //[16] //                                                      
+{ 0x0F12, 0x0380  }, //  saRR_usDualGammaLutRGBIndoor[0] //[17] //                                                      
+{ 0x0F12, 0x03C2  }, //  saRR_usDualGammaLutRGBIndoor[0] //[18] //                                                      
+{ 0x0F12, 0x03FF  }, //  saRR_usDualGammaLutRGBIndoor[0] //[19] //                                                      
+{ 0x0F12, 0x0000  }, //  saRR_usDualGammaLutRGBIndoor[1] //[0] //                                                       
+{ 0x0F12, 0x0008  }, //  saRR_usDualGammaLutRGBIndoor[1] //[1] //                                                       
+{ 0x0F12, 0x0013  }, //  saRR_usDualGammaLutRGBIndoor[1] //[2] //                                                       
+{ 0x0F12, 0x002C  }, //  saRR_usDualGammaLutRGBIndoor[1] //[3] //                                                       
+{ 0x0F12, 0x0062  }, //  saRR_usDualGammaLutRGBIndoor[1] //[4] //                                                       
+{ 0x0F12, 0x00CD  }, //  saRR_usDualGammaLutRGBIndoor[1] //[5] //                                                       
+{ 0x0F12, 0x0129  }, //  saRR_usDualGammaLutRGBIndoor[1] //[6] //                                                       
+{ 0x0F12, 0x0151  }, //  saRR_usDualGammaLutRGBIndoor[1] //[7] //                                                       
+{ 0x0F12, 0x0174  }, //  saRR_usDualGammaLutRGBIndoor[1] //[8] //                                                       
+{ 0x0F12, 0x01AA  }, //  saRR_usDualGammaLutRGBIndoor[1] //[9] //                                                       
+{ 0x0F12, 0x01D7  }, //  saRR_usDualGammaLutRGBIndoor[1] //[10] //                                                      
+{ 0x0F12, 0x01FE  }, //  saRR_usDualGammaLutRGBIndoor[1] //[11] //                                                      
+{ 0x0F12, 0x0221  }, //  saRR_usDualGammaLutRGBIndoor[1] //[12] //                                                      
+{ 0x0F12, 0x025D  }, //  saRR_usDualGammaLutRGBIndoor[1] //[13] //                                                      
+{ 0x0F12, 0x0291  }, //  saRR_usDualGammaLutRGBIndoor[1] //[14] //                                                      
+{ 0x0F12, 0x02EB  }, //  saRR_usDualGammaLutRGBIndoor[1] //[15] //                                                      
+{ 0x0F12, 0x033A  }, //  saRR_usDualGammaLutRGBIndoor[1] //[16] //                                                      
+{ 0x0F12, 0x0380  }, //  saRR_usDualGammaLutRGBIndoor[1] //[17] //                                                      
+{ 0x0F12, 0x03C2  }, //  saRR_usDualGammaLutRGBIndoor[1] //[18] //                                                      
+{ 0x0F12, 0x03FF  }, //  saRR_usDualGammaLutRGBIndoor[1] //[19] //                                                      
+{ 0x0F12, 0x0000  }, //  saRR_usDualGammaLutRGBIndoor[2] //[0] //                                                       
+{ 0x0F12, 0x0008  }, //  saRR_usDualGammaLutRGBIndoor[2] //[1] //                                                       
+{ 0x0F12, 0x0013  }, //  saRR_usDualGammaLutRGBIndoor[2] //[2] //                                                       
+{ 0x0F12, 0x002C  }, //  saRR_usDualGammaLutRGBIndoor[2] //[3] //                                                       
+{ 0x0F12, 0x0062  }, //  saRR_usDualGammaLutRGBIndoor[2] //[4] //                                                       
+{ 0x0F12, 0x00CD  }, //  saRR_usDualGammaLutRGBIndoor[2] //[5] //                                                       
+{ 0x0F12, 0x0129  }, //  saRR_usDualGammaLutRGBIndoor[2] //[6] //                                                       
+{ 0x0F12, 0x0151  }, //  saRR_usDualGammaLutRGBIndoor[2] //[7] //                                                       
+{ 0x0F12, 0x0174  }, //  saRR_usDualGammaLutRGBIndoor[2] //[8] //                                                       
+{ 0x0F12, 0x01AA  }, //  saRR_usDualGammaLutRGBIndoor[2] //[9] //                                                       
+{ 0x0F12, 0x01D7  }, //  saRR_usDualGammaLutRGBIndoor[2] //[10] //                                                      
+{ 0x0F12, 0x01FE  }, //  saRR_usDualGammaLutRGBIndoor[2] //[11] //                                                      
+{ 0x0F12, 0x0221  }, //  saRR_usDualGammaLutRGBIndoor[2] //[12] //                                                      
+{ 0x0F12, 0x025D  }, //  saRR_usDualGammaLutRGBIndoor[2] //[13] //                                                      
+{ 0x0F12, 0x0291  }, //  saRR_usDualGammaLutRGBIndoor[2] //[14] //                                                      
+{ 0x0F12, 0x02EB  }, //  saRR_usDualGammaLutRGBIndoor[2] //[15] //                                                      
+{ 0x0F12, 0x033A  }, //  saRR_usDualGammaLutRGBIndoor[2] //[16] //                                                      
+{ 0x0F12, 0x0380  }, //  saRR_usDualGammaLutRGBIndoor[2] //[17] //                                                      
+{ 0x0F12, 0x03C2  }, //  saRR_usDualGammaLutRGBIndoor[2] //[18] //                                                      
+{ 0x0F12, 0x03FF  }, //  saRR_usDualGammaLutRGBIndoor[2] //[19] //                                                      
+                                               
+                                               
+{ 0x0F12, 0x0000  },	//			saRR_usDualGammaLutRGBOutdoor[0] //[0] //
+{ 0x0F12, 0x0008  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[1] //                                                
+{ 0x0F12, 0x0013  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[2] //                                                
+{ 0x0F12, 0x002C  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[3] //                                                
+{ 0x0F12, 0x0062  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[4] //                                                
+{ 0x0F12, 0x00CD  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[5] //                                                
+{ 0x0F12, 0x0129  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[6] //                                                
+{ 0x0F12, 0x0151  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[7] //                                                
+{ 0x0F12, 0x0174  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[8] //                                                
+{ 0x0F12, 0x01AA  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[9] //                                                
+{ 0x0F12, 0x01D7  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[10] //                                               
+{ 0x0F12, 0x01FE  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[11] //                                               
+{ 0x0F12, 0x0221  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[12] //                                               
+{ 0x0F12, 0x025D  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[13] //                                               
+{ 0x0F12, 0x0291  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[14] //                                               
+{ 0x0F12, 0x02EB  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[15] //                                               
+{ 0x0F12, 0x033A  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[16] //                                               
+{ 0x0F12, 0x0380  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[17] //                                               
+{ 0x0F12, 0x03C2  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[18] //                                               
+{ 0x0F12, 0x03FF  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[19] //                                               
+{ 0x0F12, 0x0000  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[0] //                                                
+{ 0x0F12, 0x0008  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[1] //                                                
+{ 0x0F12, 0x0013  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[2] //                                                
+{ 0x0F12, 0x002C  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[3] //                                                
+{ 0x0F12, 0x0062  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[4] //                                                
+{ 0x0F12, 0x00CD  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[5] //                                                
+{ 0x0F12, 0x0129  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[6] //                                                
+{ 0x0F12, 0x0151  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[7] //                                                
+{ 0x0F12, 0x0174  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[8] //                                                
+{ 0x0F12, 0x01AA  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[9] //                                                
+{ 0x0F12, 0x01D7  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[10] //                                               
+{ 0x0F12, 0x01FE  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[11] //                                               
+{ 0x0F12, 0x0221  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[12] //                                               
+{ 0x0F12, 0x025D  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[13] //                                               
+{ 0x0F12, 0x0291  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[14] //                                               
+{ 0x0F12, 0x02EB  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[15] //                                               
+{ 0x0F12, 0x033A  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[16] //                                               
+{ 0x0F12, 0x0380  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[17] //                                               
+{ 0x0F12, 0x03C2  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[18] //                                               
+{ 0x0F12, 0x03FF  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[19] //                                               
+{ 0x0F12, 0x0000  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[0] //                                                
+{ 0x0F12, 0x0008  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[1] //                                                
+{ 0x0F12, 0x0013  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[2] //                                                
+{ 0x0F12, 0x002C  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[3] //                                                
+{ 0x0F12, 0x0062  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[4] //                                                
+{ 0x0F12, 0x00CD  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[5] //                                                
+{ 0x0F12, 0x0129  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[6] //                                                
+{ 0x0F12, 0x0151  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[7] //                                                
+{ 0x0F12, 0x0174  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[8] //                                                
+{ 0x0F12, 0x01AA  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[9] //                                                
+{ 0x0F12, 0x01D7  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[10] //                                               
+{ 0x0F12, 0x01FE  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[11] //                                               
+{ 0x0F12, 0x0221  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[12] //                                               
+{ 0x0F12, 0x025D  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[13] //                                               
+{ 0x0F12, 0x0291  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[14] //                                               
+{ 0x0F12, 0x02EB  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[15] //                                               
+{ 0x0F12, 0x033A  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[16] //                                               
+{ 0x0F12, 0x0380  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[17] //                                               
+{ 0x0F12, 0x03C2  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[18] //                                               
+{ 0x0F12, 0x03FF  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[19] //                                               
+                                               
+                                               
+{ 0x002A, 0x06A6  },                           
+{ 0x0F12, 0x00C0  },	//saRR_AwbCcmCord[0] //                      
+{ 0x0F12, 0x00E0  },	//saRR_AwbCcmCord[1] //                      
+{ 0x0F12, 0x0110  },	//saRR_AwbCcmCord[2] //                      
+{ 0x0F12, 0x0139  },	//saRR_AwbCcmCord[3] //                      
+{ 0x0F12, 0x0166  },	//saRR_AwbCcmCord[4] //                      
+{ 0x0F12, 0x019F  },	//saRR_AwbCcmCord[5] //                      
+                        
+{ 0x002A, 0x33A4  },    
+{ 0x0F12, 0x0181  },	  //TVAR_wbt_pBaseCcmS[0] //                                                           
+{ 0x0F12, 0xFF88  },   //TVAR_wbt_pBaseCcmS[1] //                                                        
+{ 0x0F12, 0xFF90  },   //TVAR_wbt_pBaseCcmS[2] //                                                        
+{ 0x0F12, 0xFE6B  },   //TVAR_wbt_pBaseCcmS[3] //                                                        
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[4] //                                                        
+{ 0x0F12, 0xFF0B  },   //TVAR_wbt_pBaseCcmS[5] //                                                        
+{ 0x0F12, 0xFFDD  },   //TVAR_wbt_pBaseCcmS[6] //                                                        
+{ 0x0F12, 0xFFEE  },   //TVAR_wbt_pBaseCcmS[7] //                                                        
+{ 0x0F12, 0x01CB  },   //TVAR_wbt_pBaseCcmS[8] //                                                        
+{ 0x0F12, 0x0187  },   //TVAR_wbt_pBaseCcmS[9] //                                                        
+{ 0x0F12, 0x00A6  },   //TVAR_wbt_pBaseCcmS[10] //                                                       
+{ 0x0F12, 0xFEBE  },   //TVAR_wbt_pBaseCcmS[11] //                                                       
+{ 0x0F12, 0x021C  },   //TVAR_wbt_pBaseCcmS[12] //                                                       
+{ 0x0F12, 0xFF5F  },   //TVAR_wbt_pBaseCcmS[13] //                                                       
+{ 0x0F12, 0x0175  },   //TVAR_wbt_pBaseCcmS[14] //                                                       
+{ 0x0F12, 0xFEE7  },   //TVAR_wbt_pBaseCcmS[15] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[16] //                                                       
+{ 0x0F12, 0x00F3  },   //TVAR_wbt_pBaseCcmS[17] //                                                       
+                       
+{ 0x0F12, 0x0181  },   //TVAR_wbt_pBaseCcmS[18] //                                                       
+{ 0x0F12, 0xFF88  },   //TVAR_wbt_pBaseCcmS[19] //                                                       
+{ 0x0F12, 0xFF90  },   //TVAR_wbt_pBaseCcmS[20] //                                                       
+{ 0x0F12, 0xFE6B  },   //TVAR_wbt_pBaseCcmS[21] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[22] //                                                       
+{ 0x0F12, 0xFF0B  },   //TVAR_wbt_pBaseCcmS[23] //                                                       
+{ 0x0F12, 0xFFDD  },   //TVAR_wbt_pBaseCcmS[24] //                                                       
+{ 0x0F12, 0xFFEE  },   //TVAR_wbt_pBaseCcmS[25] //                                                       
+{ 0x0F12, 0x01CB  },   //TVAR_wbt_pBaseCcmS[26] //                                                       
+{ 0x0F12, 0x0187  },   //TVAR_wbt_pBaseCcmS[27] //                                                       
+{ 0x0F12, 0x00A6  },   //TVAR_wbt_pBaseCcmS[28] //                                                       
+{ 0x0F12, 0xFEBE  },   //TVAR_wbt_pBaseCcmS[29] //                                                       
+{ 0x0F12, 0x021C  },   //TVAR_wbt_pBaseCcmS[30] //                                                       
+{ 0x0F12, 0xFF5F  },   //TVAR_wbt_pBaseCcmS[31] //                                                       
+{ 0x0F12, 0x0175  },   //TVAR_wbt_pBaseCcmS[32] //                                                       
+{ 0x0F12, 0xFEE7  },   //TVAR_wbt_pBaseCcmS[33] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[34] //                                                       
+{ 0x0F12, 0x00F3  },   //TVAR_wbt_pBaseCcmS[35] //                                                       
+                       
+{ 0x0F12, 0x0181  },   //TVAR_wbt_pBaseCcmS[36] //                                                       
+{ 0x0F12, 0xFF88  },   //TVAR_wbt_pBaseCcmS[37] //                                                       
+{ 0x0F12, 0xFF90  },   //TVAR_wbt_pBaseCcmS[38] //                                                       
+{ 0x0F12, 0xFE6B  },   //TVAR_wbt_pBaseCcmS[39] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[40] //                                                       
+{ 0x0F12, 0xFF0B  },   //TVAR_wbt_pBaseCcmS[41] //                                                       
+{ 0x0F12, 0xFFDD  },   //TVAR_wbt_pBaseCcmS[42] //                                                       
+{ 0x0F12, 0xFFEE  },   //TVAR_wbt_pBaseCcmS[43] //                                                       
+{ 0x0F12, 0x01CB  },   //TVAR_wbt_pBaseCcmS[44] //                                                       
+{ 0x0F12, 0x0187  },   //TVAR_wbt_pBaseCcmS[45] //                                                       
+{ 0x0F12, 0x00A6  },   //TVAR_wbt_pBaseCcmS[46] //                                                       
+{ 0x0F12, 0xFEBE  },   //TVAR_wbt_pBaseCcmS[47] //                                                       
+{ 0x0F12, 0x021C  },   //TVAR_wbt_pBaseCcmS[48] //                                                       
+{ 0x0F12, 0xFF5F  },   //TVAR_wbt_pBaseCcmS[49] //                                                       
+{ 0x0F12, 0x0175  },   //TVAR_wbt_pBaseCcmS[50] //                                                       
+{ 0x0F12, 0xFEE7  },   //TVAR_wbt_pBaseCcmS[51] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[52] //                                                       
+{ 0x0F12, 0x00F3  },   //TVAR_wbt_pBaseCcmS[53] //                                                                        
+                       
+{ 0x0F12, 0x01D4  },  //01E9 01FD 01FA   //TVAR_wbt_pBaseCcmS[54] //                                                       
+{ 0x0F12, 0xFFC3  },  //FFB7 FFAB FF9B   //TVAR_wbt_pBaseCcmS[55] //                                                       
+{ 0x0F12, 0xFFFE  },  //FFF5 FFED FFFF   //TVAR_wbt_pBaseCcmS[56] //                                                       
+{ 0x0F12, 0xFEB5  },  //FEB5 FEB5 FE9F   //TVAR_wbt_pBaseCcmS[57] //                                                       
+{ 0x0F12, 0x0112  },  //0112 0112 010F   //TVAR_wbt_pBaseCcmS[58] //                                                       
+{ 0x0F12, 0xFEDC  },  //FEDC FEDC FEF5   //TVAR_wbt_pBaseCcmS[59] //                                                       
+{ 0x0F12, 0xFFD2  },  //FFD2 FFD2 FFD2   //TVAR_wbt_pBaseCcmS[60] //                                                       
+{ 0x0F12, 0x0015  },  //0015 0015 0015   //TVAR_wbt_pBaseCcmS[61] //                                                       
+{ 0x0F12, 0x01A1  },  //01A1 01A1 01A1   //TVAR_wbt_pBaseCcmS[62] //                                                       
+{ 0x0F12, 0x0111  },  //0111 0111 0111   //TVAR_wbt_pBaseCcmS[63] //                                                       
+{ 0x0F12, 0x009D  },  //009D 009D 009D   //TVAR_wbt_pBaseCcmS[64] //                                                       
+{ 0x0F12, 0xFECB  },  //FECB FECB FECB   //TVAR_wbt_pBaseCcmS[65] //                                                       
+{ 0x0F12, 0x01FC  },  //01FC 01FC 01FC   //TVAR_wbt_pBaseCcmS[66] //                                                       
+{ 0x0F12, 0xFF99  },  //FF99 FF99 FF99   //TVAR_wbt_pBaseCcmS[67] //                                                       
+{ 0x0F12, 0x01A9  },  //01A9 01A9 01A9   //TVAR_wbt_pBaseCcmS[68] //                                                       
+{ 0x0F12, 0xFF26  },  //FF26 FF26 FF26   //TVAR_wbt_pBaseCcmS[69] //                                                       
+{ 0x0F12, 0x012B  },  //012B 012B 012B   //TVAR_wbt_pBaseCcmS[70] //                                                       
+{ 0x0F12, 0x00DF  },  //00DF 00DF 00DF   //TVAR_wbt_pBaseCcmS[71] //    
+                           
+{ 0x0F12, 0x01B9  },  //01CE 01E3 01E2   //TVAR_wbt_pBaseCcmS[72] //                                                 
+{ 0x0F12, 0xFFBC  },  //FFB0 FFA4 FF9A   //TVAR_wbt_pBaseCcmS[73] //                                                 
+{ 0x0F12, 0xFFED  },  //FFE4 FFDB FFE7   //TVAR_wbt_pBaseCcmS[74] //                                                 
+{ 0x0F12, 0xFEB5  },  //FEB5 FEB5 FE9F   //TVAR_wbt_pBaseCcmS[75] //                                                 
+{ 0x0F12, 0x0112  },  //0112 0112 010F   //TVAR_wbt_pBaseCcmS[76] //                                                 
+{ 0x0F12, 0xFEDC  },  //FEDC FEDC FEF5   //TVAR_wbt_pBaseCcmS[77] //                                                 
+{ 0x0F12, 0xFFD2  },  //FFD2 FFD2 FFD2   //TVAR_wbt_pBaseCcmS[78] //                                                 
+{ 0x0F12, 0xFFFE  },  //FFFE FFFE FFFE   //TVAR_wbt_pBaseCcmS[79] //                                                 
+{ 0x0F12, 0x01B7  },  //01B7 01B7 01B7   //TVAR_wbt_pBaseCcmS[80] //                                                 
+{ 0x0F12, 0x00E8  },  //00E8 00E8 00E8   //TVAR_wbt_pBaseCcmS[81] //                                                 
+{ 0x0F12, 0x0095  },  //0095 0095 0095   //TVAR_wbt_pBaseCcmS[82] //                                                 
+{ 0x0F12, 0xFF0D  },  //FF0D FF0D FF0D   //TVAR_wbt_pBaseCcmS[83] //                                                 
+{ 0x0F12, 0x0182  },  //0182 0182 0182   //TVAR_wbt_pBaseCcmS[84] //                                                 
+{ 0x0F12, 0xFF29  },  //FF29 FF29 FF29   //TVAR_wbt_pBaseCcmS[85] //                                                 
+{ 0x0F12, 0x0146  },  //0146 0146 0146   //TVAR_wbt_pBaseCcmS[86] //                                                 
+{ 0x0F12, 0xFF26  },  //FF26 FF26 FF26   //TVAR_wbt_pBaseCcmS[87] //                                                 
+{ 0x0F12, 0x012B  },  //012B 012B 012B   //TVAR_wbt_pBaseCcmS[88] //                                                 
+{ 0x0F12, 0x00DF  },  //00DF 00DF 00DF   //TVAR_wbt_pBaseCcmS[89] //                                                                         
+                  
+{ 0x0F12, 0x01B9  },  //01CE 01E3 01E2   //TVAR_wbt_pBaseCcmS[90] //                                                 
+{ 0x0F12, 0xFFBC  },  //FFB0 FFA4 FF9A   //TVAR_wbt_pBaseCcmS[91] //                                                 
+{ 0x0F12, 0xFFED  },  //FFE4 FFDB FFE7   //TVAR_wbt_pBaseCcmS[92] //                                                 
+{ 0x0F12, 0xFEB5  },  //FEB5 FEB5 FE9F   //TVAR_wbt_pBaseCcmS[93] //                                                 
+{ 0x0F12, 0x0112  },  //0112 0112 010F   //TVAR_wbt_pBaseCcmS[94] //                                                 
+{ 0x0F12, 0xFEDC  },  //FEDC FEDC FEF5   //TVAR_wbt_pBaseCcmS[95] //                                                 
+{ 0x0F12, 0xFFD2  },  //FFD2 FFD2 FFD2   //TVAR_wbt_pBaseCcmS[96] //                                                 
+{ 0x0F12, 0xFFFE  },  //FFFE FFFE FFFE   //TVAR_wbt_pBaseCcmS[97] //                                                 
+{ 0x0F12, 0x01B7  },  //01B7 01B7 01B7   //TVAR_wbt_pBaseCcmS[98] //                                                 
+{ 0x0F12, 0x00E8  },  //00E8 00E8 00E8   //TVAR_wbt_pBaseCcmS[99] //                                                 
+{ 0x0F12, 0x0095  },  //0095 0095 0095   //TVAR_wbt_pBaseCcmS[100] //                                                
+{ 0x0F12, 0xFF0D  },  //FF0D FF0D FF0D   //TVAR_wbt_pBaseCcmS[101] //                                                
+{ 0x0F12, 0x0182  },  //0182 0182 0182   //TVAR_wbt_pBaseCcmS[102] //                                                
+{ 0x0F12, 0xFF29  },  //FF29 FF29 FF29   //TVAR_wbt_pBaseCcmS[103] //                                                
+{ 0x0F12, 0x0146  },  //0146 0146 0146   //TVAR_wbt_pBaseCcmS[104] //                                                
+{ 0x0F12, 0xFF26  },  //FF26 FF26 FF26   //TVAR_wbt_pBaseCcmS[105] //                                                
+{ 0x0F12, 0x012B  },  //012B 012B 012B   //TVAR_wbt_pBaseCcmS[106] //                                                
+{ 0x0F12, 0x00DF  },  //00DF 00DF 00DF   //TVAR_wbt_pBaseCcmS[107] //                                                
+                                          
+{ 0x002A, 0x3380  },  //12çŸ«å¼¥åˆ©     
+{ 0x0F12, 0x01E5  },  //01E5 020E 0223   //0223  //01F3  //01F3  //TVAR_wbt_pOutdoorCcm[0] //  
+{ 0x0F12, 0xFFA0  },  //FFA0 FF88 FF7C   //FF7C  //FFA4  //FFA4  //TVAR_wbt_pOutdoorCcm[1] //  
+{ 0x0F12, 0xFFDF  },  //FFDF FFCE FFC5   //FFC5  //FFE4  //FFE4  //TVAR_wbt_pOutdoorCcm[2] //  
+{ 0x0F12, 0xFE3D  },  //FE3D FE3D FE3D   //FE3D  //FE3D  //FE23  //TVAR_wbt_pOutdoorCcm[3] //  
+{ 0x0F12, 0x0158  },  //0158 0158 0158   //0158  //0158  //017D  //TVAR_wbt_pOutdoorCcm[4] //  
+{ 0x0F12, 0xFF03  },  //FF03 FF03 FF03   //FF03  //FF03  //FEF9  //TVAR_wbt_pOutdoorCcm[5] //  
+{ 0x0F12, 0xFFD2  },  //FFBB FF99 FF9F   //FF9F  //FF9F  //FF9F  //TVAR_wbt_pOutdoorCcm[6] //  
+{ 0x0F12, 0x0002  },  //FFF0 0018 0011   //0011  //0011  //0011  //TVAR_wbt_pOutdoorCcm[7] //  
+{ 0x0F12, 0x0211  },  //023A 0235 0237   //0237  //0237  //0237  //TVAR_wbt_pOutdoorCcm[8] //  
+{ 0x0F12, 0x00F6  },  //00EB 0101 00EB   //00D1  //012A  //0143  //TVAR_wbt_pOutdoorCcm[9] //  
+{ 0x0F12, 0x0120  },  //012A 0116 012A   //0125  //00CA  //00F6  //TVAR_wbt_pOutdoorCcm[10] // 
+{ 0x0F12, 0xFF01  },  //FF02 FF00 FF02   //FEF5  //FEF6  //FEB1  //TVAR_wbt_pOutdoorCcm[11] // 
+{ 0x0F12, 0x01A4  },  //01A4 01C5 01C5   //01C5  //01C5  //01C5  //TVAR_wbt_pOutdoorCcm[12] // 
+{ 0x0F12, 0xFF95  },  //FF95 FF80 FF80   //FF80  //FF80  //FF80  //TVAR_wbt_pOutdoorCcm[13] // 
+{ 0x0F12, 0x01A9  },  //01A9 019D 019D   //019D  //019D  //019D  //TVAR_wbt_pOutdoorCcm[14] // 
+{ 0x0F12, 0xFEA3  },  //FE7A FE7A FE7A   //FE7A  //FE7A  //FE7A  //TVAR_wbt_pOutdoorCcm[15] // 
+{ 0x0F12, 0x0164  },  //0179 0179 0179   //0179  //0179  //0179  //TVAR_wbt_pOutdoorCcm[16] // 
+{ 0x0F12, 0x0164  },  //0179 0179 0179   //0179  //0179  //0179  //TVAR_wbt_pOutdoorCcm[17] // 
+                      
+                           
+                           
+{ 0x002A, 0x0764  },       
+{ 0x0F12, 0x0049  },	//afit_uNoiseIndInDoor[0] //                                                                         
+{ 0x0F12, 0x005F  },	//afit_uNoiseIndInDoor[1] //                                                                         
+{ 0x0F12, 0x00CB  },	//afit_uNoiseIndInDoor[2] // 203//                                                                   
+{ 0x0F12, 0x01E0  },	//afit_uNoiseIndInDoor[3] // Indoor_NB below 1500 _Noise index 300-400d //                           
+{ 0x0F12, 0x0220  },	//afit_uNoiseIndInDoor[4] // DNP NB 4600 _ Noisenidex :560d-230h //                                  
+                           
+                           
+{ 0x002A, 0x07C4  },       
+{ 0x0F12, 0x0014  },	//700007C4 //TVAR_afit_pBaseValS[0] // AFIT16_BRIGHTNESS                                                                                  
+{ 0x0F12, 0x0000  },	//700007C6 //TVAR_afit_pBaseValS[1] // AFIT16_CONTRAST                                                                                    
+{ 0x0F12, 0x0014  },	//700007C8 //TVAR_afit_pBaseValS[2] // AFIT16_SATURATION                                                                                  
+{ 0x0F12, 0x0000  },	//700007CA //TVAR_afit_pBaseValS[3] // AFIT16_SHARP_BLUR                                                                                  
+{ 0x0F12, 0x0000  },	//700007CC //TVAR_afit_pBaseValS[4] // AFIT16_GLAMOUR                                                                                     
+{ 0x0F12, 0x00C1  },	//700007CE //TVAR_afit_pBaseValS[5] // AFIT16_sddd8a_edge_high                                                                            
+{ 0x0F12, 0x03FF  },	//700007D0 //TVAR_afit_pBaseValS[6] // AFIT16_Demosaicing_iSatVal                                                                         
+{ 0x0F12, 0x009C  },	//700007D2 //TVAR_afit_pBaseValS[7] // AFIT16_Sharpening_iReduceEdgeThresh                                                                
+{ 0x0F12, 0x0251  },	//700007D4 //TVAR_afit_pBaseValS[8] // AFIT16_demsharpmix1_iRGBOffset                                                                     
+{ 0x0F12, 0x03FF  },	//700007D6 //TVAR_afit_pBaseValS[9] // AFIT16_demsharpmix1_iDemClamp                                                                      
+{ 0x0F12, 0x000C  },	//700007D8 //TVAR_afit_pBaseValS[10] //AFIT16_demsharpmix1_iLowThreshold                                                                  
+{ 0x0F12, 0x0010  },	//700007DA //TVAR_afit_pBaseValS[11] //AFIT16_demsharpmix1_iHighThreshold                                                                 
+{ 0x0F12, 0x012C  },	//700007DC //TVAR_afit_pBaseValS[12] //AFIT16_demsharpmix1_iLowBright                                                                     
+{ 0x0F12, 0x03E8  },	//700007DE //TVAR_afit_pBaseValS[13] //AFIT16_demsharpmix1_iHighBright                                                                    
+{ 0x0F12, 0x0046  },	//700007E0 //TVAR_afit_pBaseValS[14] //AFIT16_demsharpmix1_iLowSat                                                                        
+{ 0x0F12, 0x005A  },	//700007E2 //TVAR_afit_pBaseValS[15] //AFIT16_demsharpmix1_iHighSat                                                                       
+{ 0x0F12, 0x0070  },	//700007E4 //TVAR_afit_pBaseValS[16] //AFIT16_demsharpmix1_iTune                                                                          
+{ 0x0F12, 0x0000  },	//700007E6 //TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0000  },	//700007E8 //TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh                                                                    
+{ 0x0F12, 0x01AA  },	//700007EA //TVAR_afit_pBaseValS[19] //AFIT16_demsharpmix1_iHystCenter                                                                    
+{ 0x0F12, 0x003C  },	//700007EC //TVAR_afit_pBaseValS[20] //AFIT16_YUV422_DENOISE_iUVLowThresh                                                                 
+{ 0x0F12, 0x003C  },	//700007EE //TVAR_afit_pBaseValS[21] //AFIT16_YUV422_DENOISE_iUVHighThresh                                                                
+{ 0x0F12, 0x0000  },	//700007F0 //TVAR_afit_pBaseValS[22] //AFIT16_YUV422_DENOISE_iYLowThresh                                                                  
+{ 0x0F12, 0x0000  },	//700007F2 //TVAR_afit_pBaseValS[23] //AFIT16_YUV422_DENOISE_iYHighThresh                                                                 
+{ 0x0F12, 0x003E  },	//700007F4 //TVAR_afit_pBaseValS[24] //AFIT16_Sharpening_iLowSharpClamp                                                                   
+{ 0x0F12, 0x0008  },	//700007F6 //TVAR_afit_pBaseValS[25] //AFIT16_Sharpening_iHighSharpClamp                                                                  
+{ 0x0F12, 0x003C  },	//700007F8 //TVAR_afit_pBaseValS[26] //AFIT16_Sharpening_iLowSharpClamp_Bin                                                               
+{ 0x0F12, 0x001E  },	//700007FA //TVAR_afit_pBaseValS[27] //AFIT16_Sharpening_iHighSharpClamp_Bin                                                              
+{ 0x0F12, 0x003C  },	//700007FC //TVAR_afit_pBaseValS[28] //AFIT16_Sharpening_iLowSharpClamp_sBin                                                              
+{ 0x0F12, 0x001E  },	//700007FE //TVAR_afit_pBaseValS[29] //AFIT16_Sharpening_iHighSharpClamp_sBin                                                             
+{ 0x0F12, 0x0A24  },	//70000800 //TVAR_afit_pBaseValS[30] //AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                     
+{ 0x0F12, 0x1701  },	//70000802 //TVAR_afit_pBaseValS[31] //AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                      
+{ 0x0F12, 0x0229  },	//70000804 //TVAR_afit_pBaseValS[32] //AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                            
+{ 0x0F12, 0x1403  },	//70000806 //TVAR_afit_pBaseValS[33] //AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                 
+{ 0x0F12, 0x0000  },	//70000808 //TVAR_afit_pBaseValS[34] //AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                               
+{ 0x0F12, 0x0000  },	//7000080A //TVAR_afit_pBaseValS[35] //AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                             
+{ 0x0F12, 0x0000  },	//7000080C //TVAR_afit_pBaseValS[36] //AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                              
+{ 0x0F12, 0x00FF  },	//7000080E //TVAR_afit_pBaseValS[37] //AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                       
+{ 0x0F12, 0x045A  },	//70000810 //TVAR_afit_pBaseValS[38] //AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                                
+{ 0x0F12, 0x1414  },	//70000812 //TVAR_afit_pBaseValS[39] //AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                  
+{ 0x0F12, 0x0301  },	//70000814 //TVAR_afit_pBaseValS[40] //AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                          
+{ 0x0F12, 0xFF07  },	//70000816 //TVAR_afit_pBaseValS[41] //AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                          
+{ 0x0F12, 0x081E  },	//70000818 //TVAR_afit_pBaseValS[42] //AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                     
+{ 0x0F12, 0x0A14  },	//7000081A //TVAR_afit_pBaseValS[43] //AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                        
+{ 0x0F12, 0x0F0F  },	//7000081C //TVAR_afit_pBaseValS[44] //AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                    
+{ 0x0F12, 0x0A00  },	//7000081E //TVAR_afit_pBaseValS[45] //AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                 
+{ 0x0F12, 0x0032  },	//70000820 //TVAR_afit_pBaseValS[46] //AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                             
+{ 0x0F12, 0x000E  },	//70000822 //TVAR_afit_pBaseValS[47] //AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                             
+{ 0x0F12, 0x0002  },	//70000824 //TVAR_afit_pBaseValS[48] //AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                      
+{ 0x0F12, 0x00FF  },	//70000826 //TVAR_afit_pBaseValS[49] //AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                     
+{ 0x0F12, 0x1102  },	//70000828 //TVAR_afit_pBaseValS[50] //AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                          
+{ 0x0F12, 0x001B  },	//7000082A //TVAR_afit_pBaseValS[51] //AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                            
+{ 0x0F12, 0x0900  },	//7000082C //TVAR_afit_pBaseValS[52] //AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                       
+{ 0x0F12, 0x0600  },	//7000082E //TVAR_afit_pBaseValS[53] //AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                      
+{ 0x0F12, 0x0504  },	//70000830 //TVAR_afit_pBaseValS[54] //AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                   
+{ 0x0F12, 0x0306  },	//70000832 //TVAR_afit_pBaseValS[55] //AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                      
+{ 0x0F12, 0x4603  },	//70000834 //TVAR_afit_pBaseValS[56] //AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                       
+{ 0x0F12, 0x0480  },	//70000836 //TVAR_afit_pBaseValS[57] //AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                              
+{ 0x0F12, 0x003C  },	//70000838 //TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                  
+{ 0x0F12, 0x0080  },	//7000083A //TVAR_afit_pBaseValS[59] //AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                   
+{ 0x0F12, 0x0101  },	//7000083C //TVAR_afit_pBaseValS[60] //AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                             
+{ 0x0F12, 0x0707  },	//7000083E //TVAR_afit_pBaseValS[61] //AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                                
+{ 0x0F12, 0x4601  },	//70000840 //TVAR_afit_pBaseValS[62] //AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                 
+{ 0x0F12, 0x4944  },	//70000842 //TVAR_afit_pBaseValS[63] //AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                                
+{ 0x0F12, 0x5044  },	//70000844 //TVAR_afit_pBaseValS[64] //AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                            
+{ 0x0F12, 0x0500  },	//70000846 //TVAR_afit_pBaseValS[65] //AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]             
+{ 0x0F12, 0x0003  },	//70000848 //TVAR_afit_pBaseValS[66] //AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                   
+{ 0x0F12, 0x5400  },	//7000084A //TVAR_afit_pBaseValS[67] //AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                 
+{ 0x0F12, 0x0714  },	//7000084C //TVAR_afit_pBaseValS[68] //AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]           
+{ 0x0F12, 0x32FF  },	//7000084E //TVAR_afit_pBaseValS[69] //AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                        
+{ 0x0F12, 0x5A04  },	//70000850 //TVAR_afit_pBaseValS[70] //AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                     
+{ 0x0F12, 0x201E  },	//70000852 //TVAR_afit_pBaseValS[71] //AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                     
+{ 0x0F12, 0x4012  },	//70000854 //TVAR_afit_pBaseValS[72] //AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]                
+{ 0x0F12, 0x0204  },	//70000856 //TVAR_afit_pBaseValS[73] //AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]                
+{ 0x0F12, 0x1403  },	//70000858 //TVAR_afit_pBaseValS[74] //AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                  
+{ 0x0F12, 0x0114  },	//7000085A //TVAR_afit_pBaseValS[75] //AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                      
+{ 0x0F12, 0x0101  },	//7000085C //TVAR_afit_pBaseValS[76] //AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                       
+{ 0x0F12, 0x4446  },	//7000085E //TVAR_afit_pBaseValS[77] //AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                           
+{ 0x0F12, 0x646E  },	//70000860 //TVAR_afit_pBaseValS[78] //AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                     
+{ 0x0F12, 0x0028  },	//70000862 //TVAR_afit_pBaseValS[79] //AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]             
+{ 0x0F12, 0x030A  },	//70000864 //TVAR_afit_pBaseValS[80] //AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]       
+{ 0x0F12, 0x0000  },	//70000866 //TVAR_afit_pBaseValS[81] //AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]          
+{ 0x0F12, 0x141E  },	//70000868 //TVAR_afit_pBaseValS[82] //AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]          
+{ 0x0F12, 0xFF07  },	//7000086A //TVAR_afit_pBaseValS[83] //AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]       
+{ 0x0F12, 0x0432  },	//7000086C //TVAR_afit_pBaseValS[84] //AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]              
+{ 0x0F12, 0x0000  },	//7000086E //TVAR_afit_pBaseValS[85] //AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]            
+{ 0x0F12, 0x0F0F  },	//70000870 //TVAR_afit_pBaseValS[86] //AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]              
+{ 0x0F12, 0x0440  },	//70000872 //TVAR_afit_pBaseValS[87] //AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]       
+{ 0x0F12, 0x0302  },	//70000874 //TVAR_afit_pBaseValS[88] //AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]       
+{ 0x0F12, 0x1414  },	//70000876 //TVAR_afit_pBaseValS[89] //AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                   
+{ 0x0F12, 0x0101  },	//70000878 //TVAR_afit_pBaseValS[90] //AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                      
+{ 0x0F12, 0x4601  },	//7000087A //TVAR_afit_pBaseValS[91] //AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                       
+{ 0x0F12, 0x6E44  },	//7000087C //TVAR_afit_pBaseValS[92] //AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                      
+{ 0x0F12, 0x2864  },	//7000087E //TVAR_afit_pBaseValS[93] //AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                  
+{ 0x0F12, 0x0A00  },	//70000880 //TVAR_afit_pBaseValS[94] //AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]    
+{ 0x0F12, 0x0003  },	//70000882 //TVAR_afit_pBaseValS[95] //AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]        
+{ 0x0F12, 0x1E00  },	//70000884 //TVAR_afit_pBaseValS[96] //AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]       
+{ 0x0F12, 0x0714  },	//70000886 //TVAR_afit_pBaseValS[97] //AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8]  
+{ 0x0F12, 0x32FF  },	//70000888 //TVAR_afit_pBaseValS[98] //AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]              
+{ 0x0F12, 0x0004  },	//7000088A //TVAR_afit_pBaseValS[99] //AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]           
+{ 0x0F12, 0x0F00  },	//7000088C //TVAR_afit_pBaseValS[100] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x400F  },	//7000088E //TVAR_afit_pBaseValS[101] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000890 //TVAR_afit_pBaseValS[102] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000892 //TVAR_afit_pBaseValS[103] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000894 //TVAR_afit_pBaseValS[104] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000896 //TVAR_afit_pBaseValS[105] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0014  },	//70000898 //TVAR_afit_pBaseValS[106] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//7000089A //TVAR_afit_pBaseValS[107] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//7000089C //TVAR_afit_pBaseValS[108] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//7000089E //TVAR_afit_pBaseValS[109] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//700008A0 //TVAR_afit_pBaseValS[110] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//700008A2 //TVAR_afit_pBaseValS[111] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//700008A4 //TVAR_afit_pBaseValS[112] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//700008A6 //TVAR_afit_pBaseValS[113] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//700008A8 //TVAR_afit_pBaseValS[114] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//700008AA //TVAR_afit_pBaseValS[115] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x012C  },	//700008AC //TVAR_afit_pBaseValS[116] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x03E8  },	//700008AE //TVAR_afit_pBaseValS[117] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0046  },	//700008B0 //TVAR_afit_pBaseValS[118] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x005A  },	//700008B2 //TVAR_afit_pBaseValS[119] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//700008B4 //TVAR_afit_pBaseValS[120] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//700008B6 //TVAR_afit_pBaseValS[121] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//700008B8 //TVAR_afit_pBaseValS[122] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x01AE  },	//700008BA //TVAR_afit_pBaseValS[123] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x001E  },	//700008BC //TVAR_afit_pBaseValS[124] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x001E  },	//700008BE //TVAR_afit_pBaseValS[125] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//700008C0 //TVAR_afit_pBaseValS[126] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//700008C2 //TVAR_afit_pBaseValS[127] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x003E  },	//700008C4 //TVAR_afit_pBaseValS[128] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0008  },	//700008C6 //TVAR_afit_pBaseValS[129] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x003C  },	//700008C8 //TVAR_afit_pBaseValS[130] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x001E  },	//700008CA //TVAR_afit_pBaseValS[131] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x003C  },	//700008CC //TVAR_afit_pBaseValS[132] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x001E  },	//700008CE //TVAR_afit_pBaseValS[133] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//700008D0 //TVAR_afit_pBaseValS[134] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//700008D2 //TVAR_afit_pBaseValS[135] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//700008D4 //TVAR_afit_pBaseValS[136] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x1403  },	//700008D6 //TVAR_afit_pBaseValS[137] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x0000  },	//700008D8 //TVAR_afit_pBaseValS[138] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0000  },	//700008DA //TVAR_afit_pBaseValS[139] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0000  },	//700008DC //TVAR_afit_pBaseValS[140] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//700008DE //TVAR_afit_pBaseValS[141] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x045A  },	//700008E0 //TVAR_afit_pBaseValS[142] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//700008E2 //TVAR_afit_pBaseValS[143] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//700008E4 //TVAR_afit_pBaseValS[144] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//700008E6 //TVAR_afit_pBaseValS[145] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x081E  },	//700008E8 //TVAR_afit_pBaseValS[146] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A14  },	//700008EA //TVAR_afit_pBaseValS[147] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0F0F  },	//700008EC //TVAR_afit_pBaseValS[148] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A00  },	//700008EE //TVAR_afit_pBaseValS[149] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x0032  },	//700008F0 //TVAR_afit_pBaseValS[150] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x000E  },	//700008F2 //TVAR_afit_pBaseValS[151] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0002  },	//700008F4 //TVAR_afit_pBaseValS[152] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//700008F6 //TVAR_afit_pBaseValS[153] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1102  },	//700008F8 //TVAR_afit_pBaseValS[154] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001B  },	//700008FA //TVAR_afit_pBaseValS[155] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//700008FC //TVAR_afit_pBaseValS[156] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//700008FE //TVAR_afit_pBaseValS[157] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//70000900 //TVAR_afit_pBaseValS[158] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0306  },	//70000902 //TVAR_afit_pBaseValS[159] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x4603  },	//70000904 //TVAR_afit_pBaseValS[160] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0480  },	//70000906 //TVAR_afit_pBaseValS[161] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0046  },	//70000908 //TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//7000090A //TVAR_afit_pBaseValS[163] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x0101  },	//7000090C //TVAR_afit_pBaseValS[164] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0707  },	//7000090E //TVAR_afit_pBaseValS[165] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x1E01  },	//70000910 //TVAR_afit_pBaseValS[166] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x491E  },	//70000912 //TVAR_afit_pBaseValS[167] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /
+{ 0x0F12, 0x5044  },	//70000914 //TVAR_afit_pBaseValS[168] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0500  },	//70000916 //TVAR_afit_pBaseValS[169] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x0004  },	//70000918 //TVAR_afit_pBaseValS[170] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /
+{ 0x0F12, 0x3C0A  },	//7000091A //TVAR_afit_pBaseValS[171] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x0714  },	//7000091C //TVAR_afit_pBaseValS[172] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /
+{ 0x0F12, 0x3214  },	//7000091E //TVAR_afit_pBaseValS[173] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x5A03  },	//70000920 //TVAR_afit_pBaseValS[174] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x121E  },	//70000922 //TVAR_afit_pBaseValS[175] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//70000924 //TVAR_afit_pBaseValS[176] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//70000926 //TVAR_afit_pBaseValS[177] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x1E06  },	//70000928 //TVAR_afit_pBaseValS[178] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x011E  },	//7000092A //TVAR_afit_pBaseValS[179] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//7000092C //TVAR_afit_pBaseValS[180] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x3A3C  },	//7000092E //TVAR_afit_pBaseValS[181] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x585A  },	//70000930 //TVAR_afit_pBaseValS[182] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000932 //TVAR_afit_pBaseValS[183] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000934 //TVAR_afit_pBaseValS[184] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0000  },	//70000936 //TVAR_afit_pBaseValS[185] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x141E  },	//70000938 //TVAR_afit_pBaseValS[186] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF07  },	//7000093A //TVAR_afit_pBaseValS[187] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//7000093C //TVAR_afit_pBaseValS[188] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x0000  },	//7000093E //TVAR_afit_pBaseValS[189] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x0F0F  },	//70000940 //TVAR_afit_pBaseValS[190] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000942 //TVAR_afit_pBaseValS[191] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000944 //TVAR_afit_pBaseValS[192] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x1E1E  },	//70000946 //TVAR_afit_pBaseValS[193] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000948 //TVAR_afit_pBaseValS[194] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x3C01  },	//7000094A //TVAR_afit_pBaseValS[195] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x5A3A  },	//7000094C //TVAR_afit_pBaseValS[196] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x2858  },	//7000094E //TVAR_afit_pBaseValS[197] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000950 //TVAR_afit_pBaseValS[198] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x0003  },	//70000952 //TVAR_afit_pBaseValS[199] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1E00  },	//70000954 //TVAR_afit_pBaseValS[200] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x0714  },	//70000956 //TVAR_afit_pBaseValS[201] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000958 //TVAR_afit_pBaseValS[202] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x0004  },	//7000095A //TVAR_afit_pBaseValS[203] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x0F00  },	//7000095C //TVAR_afit_pBaseValS[204] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x400F  },	//7000095E //TVAR_afit_pBaseValS[205] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000960 //TVAR_afit_pBaseValS[206] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000962 //TVAR_afit_pBaseValS[207] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000964 //TVAR_afit_pBaseValS[208] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000966 //TVAR_afit_pBaseValS[209] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0000  },	//70000968 //TVAR_afit_pBaseValS[210] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//7000096A //TVAR_afit_pBaseValS[211] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//7000096C //TVAR_afit_pBaseValS[212] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//7000096E //TVAR_afit_pBaseValS[213] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//70000970 //TVAR_afit_pBaseValS[214] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//70000972 //TVAR_afit_pBaseValS[215] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//70000974 //TVAR_afit_pBaseValS[216] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//70000976 //TVAR_afit_pBaseValS[217] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//70000978 //TVAR_afit_pBaseValS[218] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//7000097A //TVAR_afit_pBaseValS[219] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x012C  },	//7000097C //TVAR_afit_pBaseValS[220] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x03E8  },	//7000097E //TVAR_afit_pBaseValS[221] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0046  },	//70000980 //TVAR_afit_pBaseValS[222] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x005A  },	//70000982 //TVAR_afit_pBaseValS[223] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//70000984 //TVAR_afit_pBaseValS[224] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//70000986 //TVAR_afit_pBaseValS[225] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//70000988 //TVAR_afit_pBaseValS[226] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x0226  },	//7000098A //TVAR_afit_pBaseValS[227] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x001E  },	//7000098C //TVAR_afit_pBaseValS[228] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x001E  },	//7000098E //TVAR_afit_pBaseValS[229] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//70000990 //TVAR_afit_pBaseValS[230] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//70000992 //TVAR_afit_pBaseValS[231] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x004E  },	//70000994 //TVAR_afit_pBaseValS[232] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0000  },	//70000996 //TVAR_afit_pBaseValS[233] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x003C  },	//70000998 //TVAR_afit_pBaseValS[234] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x001E  },	//7000099A //TVAR_afit_pBaseValS[235] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x003C  },	//7000099C //TVAR_afit_pBaseValS[236] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x001E  },	//7000099E //TVAR_afit_pBaseValS[237] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//700009A0 //TVAR_afit_pBaseValS[238] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//700009A2 //TVAR_afit_pBaseValS[239] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//700009A4 //TVAR_afit_pBaseValS[240] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x1403  },	//700009A6 //TVAR_afit_pBaseValS[241] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x0000  },	//700009A8 //TVAR_afit_pBaseValS[242] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0000  },	//700009AA //TVAR_afit_pBaseValS[243] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0906  },	//700009AC //TVAR_afit_pBaseValS[244] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//700009AE //TVAR_afit_pBaseValS[245] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x045A  },	//700009B0 //TVAR_afit_pBaseValS[246] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//700009B2 //TVAR_afit_pBaseValS[247] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//700009B4 //TVAR_afit_pBaseValS[248] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//700009B6 //TVAR_afit_pBaseValS[249] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x081E  },	//700009B8 //TVAR_afit_pBaseValS[250] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A14  },	//700009BA //TVAR_afit_pBaseValS[251] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0F0F  },	//700009BC //TVAR_afit_pBaseValS[252] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A00  },	//700009BE //TVAR_afit_pBaseValS[253] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x0090  },	//700009C0 //TVAR_afit_pBaseValS[254] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x000A  },	//700009C2 //TVAR_afit_pBaseValS[255] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0002  },	//700009C4 //TVAR_afit_pBaseValS[256] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//700009C6 //TVAR_afit_pBaseValS[257] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1102  },	//700009C8 //TVAR_afit_pBaseValS[258] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001B  },	//700009CA //TVAR_afit_pBaseValS[259] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//700009CC //TVAR_afit_pBaseValS[260] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//700009CE //TVAR_afit_pBaseValS[261] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//700009D0 //TVAR_afit_pBaseValS[262] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0306  },	//700009D2 //TVAR_afit_pBaseValS[263] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x4602  },	//700009D4 //TVAR_afit_pBaseValS[264] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0880  },	//700009D6 //TVAR_afit_pBaseValS[265] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0080  },	//700009D8 //TVAR_afit_pBaseValS[266] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//700009DA //TVAR_afit_pBaseValS[267] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x0101  },	//700009DC //TVAR_afit_pBaseValS[268] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0707  },	//700009DE //TVAR_afit_pBaseValS[269] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x1E01  },	//700009E0 //TVAR_afit_pBaseValS[270] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x3C1E  },	//700009E2 //TVAR_afit_pBaseValS[271] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /
+{ 0x0F12, 0x5028  },	//700009E4 //TVAR_afit_pBaseValS[272] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0500  },	//700009E6 //TVAR_afit_pBaseValS[273] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x1A04  },	//700009E8 //TVAR_afit_pBaseValS[274] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /
+{ 0x0F12, 0x280A  },	//700009EA //TVAR_afit_pBaseValS[275] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x080C  },	//700009EC //TVAR_afit_pBaseValS[276] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /
+{ 0x0F12, 0x1414  },	//700009EE //TVAR_afit_pBaseValS[277] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x6A03  },	//700009F0 //TVAR_afit_pBaseValS[278] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x121E  },	//700009F2 //TVAR_afit_pBaseValS[279] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//700009F4 //TVAR_afit_pBaseValS[280] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//700009F6 //TVAR_afit_pBaseValS[281] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x2806  },	//700009F8 //TVAR_afit_pBaseValS[282] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x0128  },	//700009FA //TVAR_afit_pBaseValS[283] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//700009FC //TVAR_afit_pBaseValS[284] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x2224  },	//700009FE //TVAR_afit_pBaseValS[285] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x3236  },	//70000A00 //TVAR_afit_pBaseValS[286] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000A02 //TVAR_afit_pBaseValS[287] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000A04 //TVAR_afit_pBaseValS[288] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0410  },	//70000A06 //TVAR_afit_pBaseValS[289] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x141E  },	//70000A08 //TVAR_afit_pBaseValS[290] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF07  },	//70000A0A //TVAR_afit_pBaseValS[291] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//70000A0C //TVAR_afit_pBaseValS[292] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x4050  },	//70000A0E //TVAR_afit_pBaseValS[293] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x0F0F  },	//70000A10 //TVAR_afit_pBaseValS[294] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000A12 //TVAR_afit_pBaseValS[295] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000A14 //TVAR_afit_pBaseValS[296] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x2828  },	//70000A16 //TVAR_afit_pBaseValS[297] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000A18 //TVAR_afit_pBaseValS[298] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x2401  },	//70000A1A //TVAR_afit_pBaseValS[299] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x3622  },	//70000A1C //TVAR_afit_pBaseValS[300] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x2832  },	//70000A1E //TVAR_afit_pBaseValS[301] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000A20 //TVAR_afit_pBaseValS[302] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x1003  },	//70000A22 //TVAR_afit_pBaseValS[303] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1E04  },	//70000A24 //TVAR_afit_pBaseValS[304] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x0714  },	//70000A26 //TVAR_afit_pBaseValS[305] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000A28 //TVAR_afit_pBaseValS[306] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x5004  },	//70000A2A //TVAR_afit_pBaseValS[307] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x0F40  },	//70000A2C //TVAR_afit_pBaseValS[308] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x400F  },	//70000A2E //TVAR_afit_pBaseValS[309] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000A30 //TVAR_afit_pBaseValS[310] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000A32 //TVAR_afit_pBaseValS[311] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000A34 //TVAR_afit_pBaseValS[312] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000A36 //TVAR_afit_pBaseValS[313] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0000  },	//70000A38 //TVAR_afit_pBaseValS[314] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//70000A3A //TVAR_afit_pBaseValS[315] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//70000A3C //TVAR_afit_pBaseValS[316] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//70000A3E //TVAR_afit_pBaseValS[317] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//70000A40 //TVAR_afit_pBaseValS[318] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//70000A42 //TVAR_afit_pBaseValS[319] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//70000A44 //TVAR_afit_pBaseValS[320] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//70000A46 //TVAR_afit_pBaseValS[321] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//70000A48 //TVAR_afit_pBaseValS[322] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//70000A4A //TVAR_afit_pBaseValS[323] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x00C8  },	//70000A4C //TVAR_afit_pBaseValS[324] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x03E8  },	//70000A4E //TVAR_afit_pBaseValS[325] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0046  },	//70000A50 //TVAR_afit_pBaseValS[326] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x0050  },	//70000A52 //TVAR_afit_pBaseValS[327] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//70000A54 //TVAR_afit_pBaseValS[328] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//70000A56 //TVAR_afit_pBaseValS[329] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//70000A58 //TVAR_afit_pBaseValS[330] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x0226  },	//70000A5A //TVAR_afit_pBaseValS[331] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x0014  },	//70000A5C //TVAR_afit_pBaseValS[332] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x0014  },	//70000A5E //TVAR_afit_pBaseValS[333] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//70000A60 //TVAR_afit_pBaseValS[334] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//70000A62 //TVAR_afit_pBaseValS[335] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x004E  },	//70000A64 //TVAR_afit_pBaseValS[336] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0000  },	//70000A66 //TVAR_afit_pBaseValS[337] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x002D  },	//70000A68 //TVAR_afit_pBaseValS[338] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x0019  },	//70000A6A //TVAR_afit_pBaseValS[339] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x002D  },	//70000A6C //TVAR_afit_pBaseValS[340] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x0019  },	//70000A6E //TVAR_afit_pBaseValS[341] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//70000A70 //TVAR_afit_pBaseValS[342] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//70000A72 //TVAR_afit_pBaseValS[343] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//70000A74 //TVAR_afit_pBaseValS[344] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x1403  },	//70000A76 //TVAR_afit_pBaseValS[345] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x0000  },	//70000A78 //TVAR_afit_pBaseValS[346] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0000  },	//70000A7A //TVAR_afit_pBaseValS[347] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0906  },	//70000A7C //TVAR_afit_pBaseValS[348] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//70000A7E //TVAR_afit_pBaseValS[349] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x045A  },	//70000A80 //TVAR_afit_pBaseValS[350] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//70000A82 //TVAR_afit_pBaseValS[351] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//70000A84 //TVAR_afit_pBaseValS[352] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//70000A86 //TVAR_afit_pBaseValS[353] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x081E  },	//70000A88 //TVAR_afit_pBaseValS[354] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A14  },	//70000A8A //TVAR_afit_pBaseValS[355] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0F0F  },	//70000A8C //TVAR_afit_pBaseValS[356] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A00  },	//70000A8E //TVAR_afit_pBaseValS[357] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x0090  },	//70000A90 //TVAR_afit_pBaseValS[358] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x000A  },	//70000A92 //TVAR_afit_pBaseValS[359] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0001  },	//70000A94 //TVAR_afit_pBaseValS[360] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//70000A96 //TVAR_afit_pBaseValS[361] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1002  },	//70000A98 //TVAR_afit_pBaseValS[362] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001E  },	//70000A9A //TVAR_afit_pBaseValS[363] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//70000A9C //TVAR_afit_pBaseValS[364] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//70000A9E //TVAR_afit_pBaseValS[365] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//70000AA0 //TVAR_afit_pBaseValS[366] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0307  },	//70000AA2 //TVAR_afit_pBaseValS[367] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x5002  },	//70000AA4 //TVAR_afit_pBaseValS[368] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0080  },	//70000AA6 //TVAR_afit_pBaseValS[369] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0080  },	//70000AA8 //TVAR_afit_pBaseValS[370] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//70000AAA //TVAR_afit_pBaseValS[371] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x0101  },	//70000AAC //TVAR_afit_pBaseValS[372] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0707  },	//70000AAE //TVAR_afit_pBaseValS[373] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x1E01  },	//70000AB0 //TVAR_afit_pBaseValS[374] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x2A1E  },	//70000AB2 //TVAR_afit_pBaseValS[375] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /
+{ 0x0F12, 0x5020  },	//70000AB4 //TVAR_afit_pBaseValS[376] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0500  },	//70000AB6 //TVAR_afit_pBaseValS[377] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x1A04  },	//70000AB8 //TVAR_afit_pBaseValS[378] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /
+{ 0x0F12, 0x280A  },	//70000ABA //TVAR_afit_pBaseValS[379] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x080C  },	//70000ABC //TVAR_afit_pBaseValS[380] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /
+{ 0x0F12, 0x1414  },	//70000ABE //TVAR_afit_pBaseValS[381] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x6A03  },	//70000AC0 //TVAR_afit_pBaseValS[382] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x121E  },	//70000AC2 //TVAR_afit_pBaseValS[383] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//70000AC4 //TVAR_afit_pBaseValS[384] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//70000AC6 //TVAR_afit_pBaseValS[385] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x3C06  },	//70000AC8 //TVAR_afit_pBaseValS[386] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x013C  },	//70000ACA //TVAR_afit_pBaseValS[387] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//70000ACC //TVAR_afit_pBaseValS[388] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x1C1E  },	//70000ACE //TVAR_afit_pBaseValS[389] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x1E22  },	//70000AD0 //TVAR_afit_pBaseValS[390] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000AD2 //TVAR_afit_pBaseValS[391] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000AD4 //TVAR_afit_pBaseValS[392] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0214  },	//70000AD6 //TVAR_afit_pBaseValS[393] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x0E14  },	//70000AD8 //TVAR_afit_pBaseValS[394] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF06  },	//70000ADA //TVAR_afit_pBaseValS[395] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//70000ADC //TVAR_afit_pBaseValS[396] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x4052  },	//70000ADE //TVAR_afit_pBaseValS[397] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x150C  },	//70000AE0 //TVAR_afit_pBaseValS[398] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000AE2 //TVAR_afit_pBaseValS[399] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000AE4 //TVAR_afit_pBaseValS[400] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x3C3C  },	//70000AE6 //TVAR_afit_pBaseValS[401] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000AE8 //TVAR_afit_pBaseValS[402] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x1E01  },	//70000AEA //TVAR_afit_pBaseValS[403] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x221C  },	//70000AEC //TVAR_afit_pBaseValS[404] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x281E  },	//70000AEE //TVAR_afit_pBaseValS[405] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000AF0 //TVAR_afit_pBaseValS[406] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x1403  },	//70000AF2 //TVAR_afit_pBaseValS[407] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1402  },	//70000AF4 //TVAR_afit_pBaseValS[408] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x060E  },	//70000AF6 //TVAR_afit_pBaseValS[409] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000AF8 //TVAR_afit_pBaseValS[410] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x5204  },	//70000AFA //TVAR_afit_pBaseValS[411] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x0C40  },	//70000AFC //TVAR_afit_pBaseValS[412] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x4015  },	//70000AFE //TVAR_afit_pBaseValS[413] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000B00 //TVAR_afit_pBaseValS[414] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000B02 //TVAR_afit_pBaseValS[415] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000B04 //TVAR_afit_pBaseValS[416] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000B06 //TVAR_afit_pBaseValS[417] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0000  },	//70000B08 //TVAR_afit_pBaseValS[418] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//70000B0A //TVAR_afit_pBaseValS[419] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//70000B0C //TVAR_afit_pBaseValS[420] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//70000B0E //TVAR_afit_pBaseValS[421] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//70000B10 //TVAR_afit_pBaseValS[422] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//70000B12 //TVAR_afit_pBaseValS[423] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//70000B14 //TVAR_afit_pBaseValS[424] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//70000B16 //TVAR_afit_pBaseValS[425] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//70000B18 //TVAR_afit_pBaseValS[426] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//70000B1A //TVAR_afit_pBaseValS[427] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x0032  },	//70000B1C //TVAR_afit_pBaseValS[428] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x028A  },	//70000B1E //TVAR_afit_pBaseValS[429] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0032  },	//70000B20 //TVAR_afit_pBaseValS[430] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x01F4  },	//70000B22 //TVAR_afit_pBaseValS[431] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//70000B24 //TVAR_afit_pBaseValS[432] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//70000B26 //TVAR_afit_pBaseValS[433] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//70000B28 //TVAR_afit_pBaseValS[434] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x01AA  },	//70000B2A //TVAR_afit_pBaseValS[435] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x003C  },	//70000B2C //TVAR_afit_pBaseValS[436] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x0050  },	//70000B2E //TVAR_afit_pBaseValS[437] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//70000B30 //TVAR_afit_pBaseValS[438] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//70000B32 //TVAR_afit_pBaseValS[439] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x0044  },	//70000B34 //TVAR_afit_pBaseValS[440] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0014  },	//70000B36 //TVAR_afit_pBaseValS[441] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x0046  },	//70000B38 //TVAR_afit_pBaseValS[442] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x0019  },	//70000B3A //TVAR_afit_pBaseValS[443] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x0046  },	//70000B3C //TVAR_afit_pBaseValS[444] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x0019  },	//70000B3E //TVAR_afit_pBaseValS[445] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//70000B40 //TVAR_afit_pBaseValS[446] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//70000B42 //TVAR_afit_pBaseValS[447] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//70000B44 //TVAR_afit_pBaseValS[448] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x0503  },	//70000B46 //TVAR_afit_pBaseValS[449] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x080F  },	//70000B48 //TVAR_afit_pBaseValS[450] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0808  },	//70000B4A //TVAR_afit_pBaseValS[451] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0000  },	//70000B4C //TVAR_afit_pBaseValS[452] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//70000B4E //TVAR_afit_pBaseValS[453] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x012D  },	//70000B50 //TVAR_afit_pBaseValS[454] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//70000B52 //TVAR_afit_pBaseValS[455] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//70000B54 //TVAR_afit_pBaseValS[456] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//70000B56 //TVAR_afit_pBaseValS[457] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x061E  },	//70000B58 //TVAR_afit_pBaseValS[458] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A1E  },	//70000B5A //TVAR_afit_pBaseValS[459] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0606  },	//70000B5C //TVAR_afit_pBaseValS[460] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A03  },	//70000B5E //TVAR_afit_pBaseValS[461] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x378B  },	//70000B60 //TVAR_afit_pBaseValS[462] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x1028  },	//70000B62 //TVAR_afit_pBaseValS[463] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0001  },	//70000B64 //TVAR_afit_pBaseValS[464] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//70000B66 //TVAR_afit_pBaseValS[465] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1002  },	//70000B68 //TVAR_afit_pBaseValS[466] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001E  },	//70000B6A //TVAR_afit_pBaseValS[467] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//70000B6C //TVAR_afit_pBaseValS[468] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//70000B6E //TVAR_afit_pBaseValS[469] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//70000B70 //TVAR_afit_pBaseValS[470] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0307  },	//70000B72 //TVAR_afit_pBaseValS[471] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x5001  },	//70000B74 //TVAR_afit_pBaseValS[472] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0080  },	//70000B76 //TVAR_afit_pBaseValS[473] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0080  },	//70000B78 //TVAR_afit_pBaseValS[474] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//70000B7A //TVAR_afit_pBaseValS[475] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x5050  },	//70000B7C //TVAR_afit_pBaseValS[476] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0101  },	//70000B7E //TVAR_afit_pBaseValS[477] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x3201  },	//70000B80 //TVAR_afit_pBaseValS[478] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x1832  },	//70000B82 //TVAR_afit_pBaseValS[479] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /        iden 12
+{ 0x0F12, 0x210C  },	//70000B84 //TVAR_afit_pBaseValS[480] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0A00  },	//70000B86 //TVAR_afit_pBaseValS[481] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x1E04  },	//70000B88 //TVAR_afit_pBaseValS[482] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /    1E demhsharplow
+{ 0x0F12, 0x0A08  },	//70000B8A //TVAR_afit_pBaseValS[483] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x070C  },	//70000B8C //TVAR_afit_pBaseValS[484] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /    c8 clamp
+{ 0x0F12, 0x3264  },	//70000B8E //TVAR_afit_pBaseValS[485] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x5A02  },	//70000B90 //TVAR_afit_pBaseValS[486] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x1040  },	//70000B92 //TVAR_afit_pBaseValS[487] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//70000B94 //TVAR_afit_pBaseValS[488] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//70000B96 //TVAR_afit_pBaseValS[489] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x4606  },	//70000B98 //TVAR_afit_pBaseValS[490] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x0146  },	//70000B9A //TVAR_afit_pBaseValS[491] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//70000B9C //TVAR_afit_pBaseValS[492] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x1C18  },	//70000B9E //TVAR_afit_pBaseValS[493] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x1819  },	//70000BA0 //TVAR_afit_pBaseValS[494] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000BA2 //TVAR_afit_pBaseValS[495] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000BA4 //TVAR_afit_pBaseValS[496] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0514  },	//70000BA6 //TVAR_afit_pBaseValS[497] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x0C14  },	//70000BA8 //TVAR_afit_pBaseValS[498] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF05  },	//70000BAA //TVAR_afit_pBaseValS[499] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//70000BAC //TVAR_afit_pBaseValS[500] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x4052  },	//70000BAE //TVAR_afit_pBaseValS[501] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x1514  },	//70000BB0 //TVAR_afit_pBaseValS[502] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000BB2 //TVAR_afit_pBaseValS[503] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000BB4 //TVAR_afit_pBaseValS[504] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x4646  },	//70000BB6 //TVAR_afit_pBaseValS[505] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000BB8 //TVAR_afit_pBaseValS[506] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x1801  },	//70000BBA //TVAR_afit_pBaseValS[507] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x191C  },	//70000BBC //TVAR_afit_pBaseValS[508] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x2818  },	//70000BBE //TVAR_afit_pBaseValS[509] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000BC0 //TVAR_afit_pBaseValS[510] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x1403  },	//70000BC2 //TVAR_afit_pBaseValS[511] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1405  },	//70000BC4 //TVAR_afit_pBaseValS[512] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x050C  },	//70000BC6 //TVAR_afit_pBaseValS[513] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000BC8 //TVAR_afit_pBaseValS[514] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x5204  },	//70000BCA //TVAR_afit_pBaseValS[515] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x1440  },	//70000BCC //TVAR_afit_pBaseValS[516] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x4015  },	//70000BCE //TVAR_afit_pBaseValS[517] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000BD0 //TVAR_afit_pBaseValS[518] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000BD2 //TVAR_afit_pBaseValS[519] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+                           
+{ 0x0F12, 0x7DFA  },	//afit_pConstBaseValS[0] //                                                                          
+{ 0x0F12, 0xFFBD  },	//afit_pConstBaseValS[1] //                                                                          
+{ 0x0F12, 0x26FE  },	//afit_pConstBaseValS[2] //                                                                          
+{ 0x0F12, 0xF7BC  },	//afit_pConstBaseValS[3] //                                                                          
+{ 0x0F12, 0x7E06  },	//afit_pConstBaseValS[4] //                                                                          
+{ 0x0F12, 0x00D3  },	//afit_pConstBaseValS[5] //                                                                          
+                        
+                        
+{ 0x002A, 0x2CE8  },    
+{ 0x0F12, 0x0007  },	// Modify LSB to control AWBB_YThreshLow //    	                                                                        
+{ 0x0F12, 0x00E2  },	//                                         
+{ 0x0F12, 0x0005  },	// Modify LSB to control AWBB_YThreshLowBrLow//                                                                        
+{ 0x0F12, 0x00E2  },	//                                         
+                                                                       
+                                                                                     
+{ 0x002A, 0x0F7E  },    //ae weight    //                                
+{ 0x0F12, 0x0000  },  //0000  //0000
+{ 0x0F12, 0x0000  },  //0000  //0000
+{ 0x0F12, 0x0000  },  //0000  //0000
+{ 0x0F12, 0x0000  },  //0000  //0000                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0201  },  //0201  //0201
+{ 0x0F12, 0x0102  },  //0102  //0102
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0201  },  //0101  //0101
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0102  },  //0101  //0101                     
+{ 0x0F12, 0x0201  },  //0101  //0201
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0102  },  //0101  //0102                     
+{ 0x0F12, 0x0101  },  //0101  //0201
+{ 0x0F12, 0x0101  },  //0101  //0202
+{ 0x0F12, 0x0101  },  //0101  //0202
+{ 0x0F12, 0x0101  },  //0101  //0102
+                        
+                               
+{ 0x002A, 0x01CC  },    
+{ 0x0F12, 0x5DC0  },	//REG_TC_IPRM_InClockLSBs//input clock=24MHz                        	                                                                        
+{ 0x0F12, 0x0000  },    //REG_TC_IPRM_InClockMSBs                                           
+{ 0x002A, 0x01EE  },                                                                        
+{ 0x0F12, 0x0003  },	//REG_TC_IPRM_UseNPviClocks                                     
+                  
+{ 0x002A, 0x01F6  },                                                                        
+{ 0x0F12, 0x1F40  },    //REG_TC_IPRM_OpClk4KHz_0                   	2   700001F6         
+{ 0x0F12, 0x32A8  },	//3A88    //REG_TC_IPRM_MinOutRate4KHz_0              	2   700001F8                                                                        
+{ 0x0F12, 0x32E8  },	//3AA8    //REG_TC_IPRM_MaxOutRate4KHz_0                        
+                        
+{ 0x0F12, 0x1F40  },	 //REG_TC_IPRM_OpClk4KHz_1                   	2   700001FC    
+{ 0x0F12, 0x2ea0  },    //REG_TC_IPRM_MinOutRate4KHz_1              	2   700001FE 
+{ 0x0F12, 0x2f00  },    //REG_TC_IPRM_MaxOutRate4KHz_1              	2   70000200 
+                  
+{ 0x0F12, 0x0BB8  },    //REG_TC_IPRM_OpClk4KHz_2                   	2   70000202 
+{ 0x0F12, 0x05DC  },    //REG_TC_IPRM_MinOutRate4KHz_2              	2   70000204 
+{ 0x0F12, 0x1770  },    //REG_TC_IPRM_MaxOutRate4KHz_2              	2   70000206 
+                  
+{ 0x002A, 0x0208  },                                                                
+{ 0x0F12, 0x0001  },      //REG_TC_IPRM_InitParamsUpdated                           
+                        
+{ 0xdddd, 0x0064  },  //delay 100ms  
+                  
+{ 0x0028, 0x7000  },	    
+{ 0x002A, 0x026C  },   //Normal preview 15fps
+{ 0x0F12, 0x0140  },	//REG_0TC_PCFG_usWidth                      	2   7000026C			// cys  640                          
+{ 0x0F12, 0x00f0  },   //REG_0TC_PCFG_usHeight                     	2   7000026E    //  480                                       
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_Format                       	2   70000270    //   rgb565                                      
+{ 0x0F12, 0x32E8  },	//3AA8//REG_0TC_PCFG_usMaxOut4KHzRate             	2   70000272  //                              
+{ 0x0F12, 0x32a8  },	//3A88//REG_0TC_PCFG_usMinOut4KHzRate             	2   70000274  //                              
+{ 0x0F12, 0x0100  },   //REG_0TC_PCFG_OutClkPerPix88               	2   70000276    //                                         
+{ 0x0F12, 0x0800  },   //REG_0TC_PCFG_uMaxBpp88                    	2   70000278    //                                         
+{ 0x0F12, 0x0072  },   //REG_0TC_PCFG_PVIMask                      	2   7000027A    //92  (1) PCLK inversion  (4)1b_C first (5) UV First                                       
+{ 0x0F12, 0x0010  },   //REG_0TC_PCFG_OIFMask                      	2   7000027C    //                                         
+{ 0x0F12, 0x01E0  },   //REG_0TC_PCFG_usJpegPacketSize             	2   7000027E    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_usJpegTotalPackets           	2   70000280    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_uClockInd                    	2   70000282    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_usFrTimeType                 	2   70000284    //                                         
+{ 0x0F12, 0x0001  },   //REG_0TC_PCFG_FrRateQualityType            	2   70000286    //cys 0x0001          
+{ 0x0F12, 0x07d0  },   //REG_0TC_PCFG_usMaxFrTimeMsecMult10        	2   70000288    // cys 0x535 
+{ 0x0F12, 0x07d0  },   //REG_0TC_PCFG_usMinFrTimeMsecMult10        	2   7000028A    //cys                              
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_bSmearOutput                 	2   7000028C    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_sSaturation                  	2   7000028E    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_sSharpBlur                   	2   70000290    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_sColorTemp                   	2   70000292    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_uDeviceGammaIndex            	2   70000294    //                                         
+{ 0x0F12, 0x0003  },   //REG_0TC_PCFG_uPrevMirror                  	2   70000296    //                                         
+{ 0x0F12, 0x0003  },   //REG_0TC_PCFG_uCaptureMirror               	2   70000298    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_uRotation                    	2   7000029A    //                                         
+                       
+                       //comcoder frame fix 15                                        
+{ 0x0F12, 0x0400  },   //REG_1TC_PCFG_usWidth                      	2   7000029C    //                                         
+{ 0x0F12, 0x0300  },   //REG_1TC_PCFG_usHeight                     	2   7000029E    //                                         
+{ 0x0F12, 0x0005  },   //REG_1TC_PCFG_Format                       	2   700002A0    //                                         
+{ 0x0F12, 0x32E8  },   //REG_1TC_PCFG_usMaxOut4KHzRate             	2   700002A2    //                                         
+{ 0x0F12, 0x32a8  },   //REG_1TC_PCFG_usMinOut4KHzRate             	2   700002A4    //                                         
+{ 0x0F12, 0x0100  },   //REG_1TC_PCFG_OutClkPerPix88               	2   700002A6    //                                         
+{ 0x0F12, 0x0800  },   //REG_1TC_PCFG_uMaxBpp88                    	2   700002A8    //                                         
+{ 0x0F12, 0x0072  },   //REG_1TC_PCFG_PVIMask                      	2   700002AA    //                                         
+{ 0x0F12, 0x0010  },   //REG_1TC_PCFG_OIFMask                      	2   700002AC    //                                         
+{ 0x0F12, 0x01E0  },   //REG_1TC_PCFG_usJpegPacketSize             	2   700002AE    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_usJpegTotalPackets           	2   700002B0    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_uClockInd                    	2   700002B2    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_usFrTimeType                 	2   700002B4    //                                         
+{ 0x0F12, 0x0001  },   //REG_1TC_PCFG_FrRateQualityType            	2   700002B6    //                                         
+{ 0x0F12, 0x014d  },   //REG_1TC_PCFG_usMaxFrTimeMsecMult10        	2   700002B8    //cys 0x29a         
+{ 0x0F12, 0x014d  },   //REG_1TC_PCFG_usMinFrTimeMsecMult10        	2   700002BA    //cys  0x29a                                        
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_bSmearOutput                 	2   700002BC    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_sSaturation                  	2   700002BE    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_sSharpBlur                   	2   700002C0    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_sColorTemp                   	2   700002C2    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_uDeviceGammaIndex            	2   700002C4    //                                         
+{ 0x0F12, 0x0003  },   //REG_1TC_PCFG_uPrevMirror                  	2   700002C6    //                                         
+{ 0x0F12, 0x0003  },   //REG_1TC_PCFG_uCaptureMirror               	2   700002C8    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_uRotation                    	2   700002CA    //                                         
+                                       
+                            
+{ 0x002A, 0x035C  },   //Normal capture //    
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_uCaptureMode                 	2   7000035C						// 
+{ 0x0F12, 0x0140  },   //REG_0TC_CCFG_usWidth                      	2   7000035E          //cys 640                                   
+{ 0x0F12, 0x00f0  },   //REG_0TC_CCFG_usHeight                     	2   70000360          //    480                               
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_Format                       	2   70000362          //     rgb565                              
+{ 0x0F12, 0x32E8  },	//2f00//3AA8//REG_0TC_CCFG_usMaxOut4KHzRate             	2   70000364  //                      
+{ 0x0F12, 0x32a8  },	//2ea0//3A88//REG_0TC_CCFG_usMinOut4KHzRate             	2   70000366  //                      
+{ 0x0F12, 0x0100  },   //REG_0TC_CCFG_OutClkPerPix88               	2   70000368          //                                   
+{ 0x0F12, 0x0800  },   //REG_0TC_CCFG_uMaxBpp88                    	2   7000036A          //                                   
+{ 0x0F12, 0x0072  },   //REG_0TC_CCFG_PVIMask                      	2   7000036C          //                                   
+{ 0x0F12, 0x0010  },   //REG_0TC_CCFG_OIFMask                      	2   7000036E          //                                   
+{ 0x0F12, 0x01E0  },   //REG_0TC_CCFG_usJpegPacketSize             	2   70000370          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_usJpegTotalPackets           	2   70000372          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_uClockInd                    	2   70000374          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_usFrTimeType                 	2   70000376          //                                   
+{ 0x0F12, 0x0002  },   //REG_0TC_CCFG_FrRateQualityType            	2   70000378          //                                   
+{ 0x0F12, 0x07d0  },   //REG_0TC_CCFG_usMaxFrTimeMsecMult10        	2   7000037A          // cys 535
+{ 0x0F12, 0x07d0  },   //REG_0TC_CCFG_usMinFrTimeMsecMult10        	2   7000037C          // cys 535
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_bSmearOutput                 	2   7000037E          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_sSaturation                  	2   70000380          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_sSharpBlur                   	2   70000382          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_sColorTemp                   	2   70000384          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_uDeviceGammaIndex            	2   70000386          //                                   
+                            
+                       // Low_lux capture//    
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_uCaptureMode                 	2   70000388						// 
+{ 0x0F12, 0x0280  },   //REG_1TC_CCFG_usWidth                      	2   7000038A          //  cys 640                                 
+{ 0x0F12, 0x01e0  },   //REG_1TC_CCFG_usHeight                     	2   7000038C          //  cys 480                                 
+{ 0x0F12, 0x0005  },   //REG_1TC_CCFG_Format                       	2   7000038E          //                                   
+{ 0x0F12, 0x32E8  },   //REG_1TC_CCFG_usMaxOut4KHzRate             	2   70000390          //                                   
+{ 0x0F12, 0x32a8  },   //REG_1TC_CCFG_usMinOut4KHzRate             	2   70000392          //                                   
+{ 0x0F12, 0x0100  },   //REG_1TC_CCFG_OutClkPerPix88               	2   70000394          //                                   
+{ 0x0F12, 0x0800  },   //REG_1TC_CCFG_uMaxBpp88                    	2   70000396          //                                   
+{ 0x0F12, 0x0072  },   //REG_1TC_CCFG_PVIMask                      	2   70000398          //                                   
+{ 0x0F12, 0x0010  },   //REG_1TC_CCFG_OIFMask                      	2   7000039A          //                                   
+{ 0x0F12, 0x01E0  },   //REG_1TC_CCFG_usJpegPacketSize             	2   7000039C          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_usJpegTotalPackets           	2   7000039E          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_uClockInd                    	2   700003A0          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_usFrTimeType                 	2   700003A2          //                                   
+{ 0x0F12, 0x0002  },   //REG_1TC_CCFG_FrRateQualityType            	2   700003A4          //                                   
+{ 0x0F12, 0x0535  },   //REG_1TC_CCFG_usMaxFrTimeMsecMult10        	2   700003A6          //                                   
+{ 0x0F12, 0x0535  },   //REG_1TC_CCFG_usMinFrTimeMsecMult10        	2   700003A8          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_bSmearOutput                 	2   700003AA          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_sSaturation                  	2   700003AC          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_sSharpBlur                   	2   700003AE          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_sColorTemp                   	2   700003B0          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_uDeviceGammaIndex            	2   700003B2          //                                   
+                                  
+{ 0x002A, 0x0208  },        
+{ 0x0F12, 0x0001  },      //REG_TC_IPRM_InitParamsUpdated//                                                                       
+                            
+{ 0x002A, 0x023C  },   
+{ 0x0F12, 0x0000  },	//32MHz Sys Clock//	
+{ 0x002A, 0x0244  },	                   
+{ 0x0F12, 0x0000  },       
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x0F12, 0x0001  }, 
+                     
+{ 0x1000, 0x0001  },	// Set host interrupt so main start run//                                                  
+{ 0xdddd, 0x0064  },   //delay 100ms
+                  
+{ 0x002A, 0x0DA0  },    
+{ 0x0F12, 0x0005  },    
+                        
+{ 0x002A, 0x0D88  },    
+{ 0x0F12, 0x0038  },    
+{ 0x0F12, 0x0074  },    
+{ 0x0F12, 0xFFF1  },    
+{ 0x0F12, 0x00BF  },    
+{ 0x0F12, 0xFF9B  },    
+{ 0x0F12, 0x00DB  },    
+{ 0x0F12, 0xFF56  },    
+{ 0x0F12, 0x00F0  },    
+{ 0x0F12, 0xFEFF  },    
+{ 0x0F12, 0x010F  },    
+{ 0x0F12, 0x0E74  },    
+{ 0x002A, 0x0DA8  },    
+{ 0x0F12, 0x0BB8  },    //NB 3000
+{ 0x002A, 0x0DA4  },    
+{ 0x0F12, 0x274E  },
+                  
+{ 0x002A, 0x0DCA  },
+{ 0x0F12, 0x0030  },
+
+{ 0x002A, 0x3286  },
+{ 0x0F12, 0x0001  }, //Pre/Post gamma on(ç›”æ±—)  
+
+{ 0x002A, 0x032C  },
+{ 0x0F12, 0xAAAA  },  //ESD Check  
+                  
+{ 0xffff, 0xffff },
+};
+
+  
+s5k5ca_short_t s5k5ca_capture_normal_normal_00[] =              
+{ 
+{ 0xFCFC, 0xD000  },                 
+{ 0x0028, 0x7000  },  
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0246  },
+{ 0x0F12, 0x0001  },  
+{ 0x002A, 0x0224  },
+{ 0x0F12, 0x0001  },   
+{ 0x0F12, 0x0001  },
+//{ 0xdddd, 0x012C  }, //delay 300ms //0218 delay time 300ms // 0421 0064(100ms)->0032(50ms)        
+{ 0xffff, 0xffff  },
+};
+
+
+
+// /////////////
+// / CapturewMode
+// ////////////
+s5k5ca_short_t s5k5ca_capture[] = 
+{ 
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },                                                      
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  }, 
+  
+{ 0xffff, 0xffff  },
+};
+
+
+/////////////////////
+// SnapshotLowLightMode
+/////////////////////
+s5k5ca_short_t s5k5ca_snapshot_normal_low_00[] = //light <= 0x20 0421 PV2 0020->0018
+{ 
+//LowLight + Night Off
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },            
+                  
+{ 0x002A, 0x07E6  },
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+    
+{ 0x002A, 0x0838  },
+{ 0x0F12, 0x0A3C  },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x0908  },
+{ 0x0F12, 0x0446  },	//TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]
+                                             
+{ 0x002A, 0x0244  }, //Low lux capture//
+{ 0x0F12, 0x0001  }, //config 1 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  },
+                 
+{ 0xdddd, 0x0320  }, //delay 800ms 
+
+{ 0xffff, 0xffff  },
+//sw delay time - 800ms
+};
+
+
+  
+s5k5ca_short_t s5k5ca_flashcapture_00[] =       
+{ 
+  
+//{ 0xdddd, 0x0160  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },                   
+{ 0x002A, 0x035C  }, //Capture Mode//
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  }, 
+  
+
+{ 0xffff, 0xffff  },  
+};
+
+
+/////////////////////
+// SnapshotLowLightMode
+/////////////////////
+s5k5ca_short_t s5k5ca_snapshot_low[] = 
+{
+
+//LowLight + Night Off
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },            
+                  
+{ 0x002A, 0x07E6  },
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+    
+{ 0x002A, 0x0838  },
+{ 0x0F12, 0x0A3C  },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x0908  },
+{ 0x0F12, 0x0446  },	//TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]
+                                             
+{ 0x002A, 0x0244  }, //Low lux capture//
+{ 0x0F12, 0x0001  }, //config 1 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  },
+  
+{ 0xffff, 0xffff  },  
+
+};
+
+s5k5ca_short_t s5k5ca_flashcapture_low_00[] =    
+{
+//{ 0xdddd, 0x0160  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms    
+
+//LowLight + Night Off
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },            
+{ 0x002A, 0x0388  }, //Capture Mode//
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  },
+  
+{ 0xffff, 0xffff  },  
+};
+
+
+
+////////////////////
+// SnapshotNightMode
+///////////////////
+
+s5k5ca_short_t s5k5ca_snapshot_nightmode_00[] = 
+{
+
+//LowLight
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },    
+{ 0x002A, 0x07E6  },
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+                                                     
+{ 0x002A, 0x0244  }, //Night capture//
+{ 0x0F12, 0x0002  }, //config 2 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+
+////////////////
+// NightMode_ON
+///////////////
+s5k5ca_short_t s5k5ca_nightmode_on[] = 
+{
+
+
+{ 0xffff, 0xffff  },            
+};
+
+////////////////
+// NightMode_OFF
+///////////////
+s5k5ca_short_t s5k5ca_nightmode_off[] = 
+{
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_NONFIX                     //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_nonfix[] = 
+{
+
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_15FIX                   //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_15fix[] = 
+{
+
+  
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_7FIX                    //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_7fix[] = 
+{
+
+                  
+{ 0xffff, 0xffff  },
+};
+
+
+/////////
+// ISO_AUTO
+/////////
+s5k5ca_short_t s5k5ca_iso_auto[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x1000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0x3415  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0x682A  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0x8235  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0x3415  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0x682A  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0x8235  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x01B3  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x02A0  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x0064  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  },
+  
+{ 0xffff, 0xffff  },
+};
+
+////////
+// ISO_50
+////////
+s5k5ca_short_t s5k5ca_iso50[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x1000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x0064  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// ISO_100
+////////
+s5k5ca_short_t s5k5ca_iso100[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x1800  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x0096  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+  
+// ///////
+// / ISO_200
+// ///////
+s5k5ca_short_t s5k5ca_iso200[] =
+{ 
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+  
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x2000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x00C8  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// ISO_400
+////////
+s5k5ca_short_t s5k5ca_iso400[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x3000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x012C  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+
+////////////////////
+// SCENE_PORTRAIT_OFF
+////////////////////
+s5k5ca_short_t s5k5ca_scene_portrait_off[] =
+{
+{ 0xFCFC, 0xD000  },                    
+{ 0x0028, 0x7000  },//For Scene//
+{ 0x002A, 0x020C  },
+{ 0x0F12, 0x0000  },// Brightness for controling the EV//
+{ 0x002A, 0x0210  },
+{ 0x0F12, 0x0000  },// Saturation//
+{ 0x0F12, 0x0000  },// Blur_Sharpness //  
+{ 0xffff, 0xffff  },  
+};     
+
+////////////////////
+// SCENE_LANDSCAPE_OFF
+////////////////////
+s5k5ca_short_t s5k5ca_scene_landscape_off[] =
+{
+{ 0xFCFC, 0xD000  },     
+{ 0x0028, 0x7000  },//For Scene//
+{ 0x002A, 0x020C  },
+{ 0x0F12, 0x0000  },// Brightness for controling the EV//
+{ 0x002A, 0x0210  },
+{ 0x0F12, 0x0000  },// Saturation//
+{ 0x0F12, 0x0000  },// Blur_Sharpness //  
+{ 0xffff, 0xffff  },
+};
+
+/////////////////
+// SCENE_SPORTS_OFF
+/////////////////
+s5k5ca_short_t s5k5ca_scene_sports_off[] =
+{
+{ 0x0028, 0x7000  },     
+
+{ 0x002A, 0x0530  },//lt_uMaxExp1//
+{ 0x0F12, 0x3415  },
+{ 0x002A, 0x0534  },//lt_uMaxExp2//
+{ 0x0F12, 0x682A  },
+{ 0x002A, 0x167C  },//lt_uMaxExp3//
+{ 0x0F12, 0x8235  },
+{ 0x002A, 0x1680  },//lt_uMaxExp4//
+{ 0x0F12, 0xc350  },
+{ 0x0F12, 0x0000  },
+                  
+{ 0x002A, 0x0538  },//It_uCapMaxExp1 //
+{ 0x0F12, 0x3415  },
+{ 0x002A, 0x053C  },//It_uCapMaxExp2 //
+{ 0x0F12, 0x682A  },
+{ 0x002A, 0x1684  },//It_uCapMaxExp3 // 
+{ 0x0F12, 0x8235  },
+{ 0x002A, 0x1688  },//It_uCapMaxExp4 //
+{ 0x0F12, 0xc350  },
+{ 0x0F12, 0x0000  },
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x01B3  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x02A0  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710  },   //MaxAnGain4 //
+                  
+{ 0x002A, 0x0544  },
+{ 0x0F12, 0x0100  },//It_uMaxDigGain //
+
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_sunset_off[] =
+{
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_dawn_off[] =
+{
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_againstlight_off[] =
+{
+//NOT USE
+	              
+{ 0xffff, 0xffff  }, 
+};
+
+
+s5k5ca_short_t s5k5ca_scene_text_off[] =
+{
+//NOT USE
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_portrait_on[] =
+{
+//NOT USE
+{ 0xffff, 0xffff  },
+};
+
+
+
+
+s5k5ca_t s5k5ca_reg[] = 
+{
+	// To do.
+};
+
+// For VGA ( 640 x 480) on 4CA module
+s5k5ca_t s5k5ca_reg_vga[] = 
+{
+	// To do.
+};
+
+// For SVGA ( 800 x 600) on 4CA module
+s5k5ca_t s5k5ca_reg_svga[] = 
+{
+	// To do.
+};
+
+// For SXGA (1280 x 1024 = 1.3M) on 4CA module
+s5k5ca_t s5k5ca_reg_sxga[] = 
+{
+	// To do.
+};
+
+// For UXGA (1600 x 1200 = 2M) on 4CA module
+s5k5ca_t s5k5ca_reg_uxga[] = 
+{
+	// To do.
+};
+
+// For SQVGA on 4CA module
+s5k5ca_t s5k5ca_reg_qsvga[] = 
+{
+	// To do.
+};
+
+#define S5K5CA_INIT_REGS (sizeof(s5k5ca_reg)/sizeof(s5k5ca_reg[0]))
+#define S5K5CA_UXGA_REGS (sizeof(s5k5ca_reg_uxga)/sizeof(s5k5ca_reg_uxga[0]))
+#define S5K5CA_SVGA_REGS (sizeof(s5k5ca_reg_svga)/sizeof(s5k5ca_reg_svga[0]))
+#define S5K5CA_VGA_REGS (sizeof(s5k5ca_reg_vga)/sizeof(s5k5ca_reg_vga[0]))
+#define S5K5CA_QSVGA_REGS (sizeof(s5k5ca_reg_qsvga)/sizeof(s5k5ca_reg_qsvga[0]))
+
+//#define S5K5CA_RISC_REGS 0xEB
+//#define S5K5CA_ISP_REGS 0xFB /* S5C7323X */
+//#define S5K5CA_CIS_REGS 0x2F /* S5K437LA03 */
+                                                                                                                                                                                              
+//#define S5K5CA_REGS (0x1000)
+
+
+
+//delay 100ms phone SW //
+
+
+s5k5ca_short_t s5k5ca_snapshot_fireworks_00[] = // scene mode fireworks
+{ 
+
+//LowLight
+{ 0xFCFC, 0xD000 }, 
+{ 0x0028, 0x7000 },    
+{ 0x002A, 0x07E6 },
+{ 0x0F12, 0x0028 },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0028 },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+				 
+{ 0x002A, 0x0244 }, //Night capture//
+{ 0x0F12, 0x0002 }, //config 2 //
+{ 0x002A, 0x0230 }, 
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0246 }, 
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0224 }, 
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x0001 },
+
+{ 0xdddd, 0x06A4 }, //delay 1500ms 0304 Night Mode Change 
+
+{ 0xffff, 0xffff },
+};
+
+
+
+
+
+//---------------------------------------//
+// case 23 : FPS_NONFIX                     //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_nonfix_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x0288  },
+{ 0x0F12, 0x0535  },
+{ 0x0F12, 0x029A  },
+
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0230  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x023E  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+	
+{ 0xffff, 0xffff  },	
+};
+
+//---------------------------------------//
+// case 23 : FPS_15FIX                   //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_15fix_00[] = 
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x02B8 },
+{ 0x0F12, 0x029A },
+{ 0x0F12, 0x029A },
+
+
+{ 0x002A, 0x023C }, //Normal Preview//
+{ 0x0F12, 0x0001 }, //config 1 //                                                  
+{ 0x002A, 0x0240 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0230 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x023E },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0220 }, 
+{ 0x0F12, 0x0001 },	
+{ 0x002A, 0x0222 }, 
+{ 0x0F12, 0x0001 },
+
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_7FIX                    //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_7fix_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x02B8  },
+{ 0x0F12, 0x0535  },
+{ 0x0F12, 0x0535  },
+
+
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0001  }, //config 1 //                                                  
+{ 0x002A, 0x0240  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0230  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x023E  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  },   
+                  
+{ 0xffff, 0xffff  },
+};
+
+////////////
+// EFFECT_OFF
+////////////
+s5k5ca_short_t s5k5ca_effect_off_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x3286  }, //Pre/Post gamma on(ç›”æ±—)
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0000  },
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 16 : MonoEffect                  //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_effect_gray_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0001  },
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 20 : NegativeEffect              //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_effect_negative_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0003  },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////
+// EFFECT_SEPIA
+/////////////
+s5k5ca_short_t s5k5ca_effect_sepia_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0004  },
+
+{ 0xffff, 0xffff  },
+};
+
+////////////
+// EFFECT_AQUA
+/////////////
+s5k5ca_short_t s5k5ca_effect_aqua_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0005  },
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 19 : GREENEffect(sketch)         //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_effect_sketch_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x3286  },
+{ 0x0F12, 0x0000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0006  },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////
+// WB_Auto
+/////////////
+s5k5ca_short_t s5k5ca_wb_auto_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x246E  },
+{ 0x0F12, 0x0001  },
+
+{ 0xffff, 0xffff  },
+};                
+
+///////////
+// WB_Sunny
+//////////
+s5k5ca_short_t s5k5ca_wb_sunny_00[] = 
+{ 
+{ 0xfcfc, 0xd000  }, 
+{ 0x0028, 0x7000  }, 
+{ 0x002a, 0x246E  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x002a, 0x04A0  }, 
+{ 0x0f12, 0x05E0  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0400  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0500  }, //0530
+{ 0x0f12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////
+// WB_Cloudy
+///////////
+s5k5ca_short_t s5k5ca_wb_cloudy_00[] = 
+{ 
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+{ 0x002a, 0x246E  },
+{ 0x0f12, 0x0000  },
+{ 0x002a, 0x04A0  },
+{ 0x0f12, 0x06E0  }, //06B0 
+{ 0x0f12, 0x0001  }, //0001 
+{ 0x0f12, 0x0400  }, //0400 
+{ 0x0f12, 0x0001  }, //0001 
+{ 0x0f12, 0x0448  }, //0460 
+{ 0x0f12, 0x0001  }, //0001 
+
+{ 0xffff, 0xffff  },
+};
+
+////////////
+// WB_Tungsten
+////////////
+s5k5ca_short_t s5k5ca_wb_tungsten_00[] = 
+{ 
+{ 0xfcfc, 0xd000  }, 
+{ 0x0028, 0x7000  }, 
+{ 0x002a, 0x246E  }, 
+{ 0x0f12, 0x0000  }, 
+
+{ 0x002a, 0x04A0  }, 
+{ 0x0f12, 0x03D0  },  //03D0
+{ 0x0f12, 0x0001  },  //0001
+{ 0x0f12, 0x0400  },  //0400
+{ 0x0f12, 0x0001  },  //0001
+{ 0x0f12, 0x0910  },  //0920
+{ 0x0f12, 0x0001  },  //0001 
+                  
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// WB_Flourescent
+///////////////
+s5k5ca_short_t s5k5ca_wb_fluorescent_00[] = 
+{ 
+{ 0xfcfc, 0xd000  }, 
+{ 0x0028, 0x7000  }, 
+{ 0x002a, 0x246E  }, 
+{ 0x0f12, 0x0000  }, 
+                     
+{ 0x002a, 0x04A0  }, 
+{ 0x0f12, 0x0530  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0400  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0800  }, 
+{ 0x0f12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+
+////////////
+// BR_Minus4
+///////////
+s5k5ca_short_t s5k5ca_br_minus4_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+//////////
+// BR_Minus3
+/////////
+s5k5ca_short_t s5k5ca_br_minus3_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+//////////
+// BR_Minus2
+//////////
+s5k5ca_short_t s5k5ca_br_minus2_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};                
+
+//////////
+// BR_Minus1
+//////////
+s5k5ca_short_t s5k5ca_br_minus1_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_ZERO
+////////
+s5k5ca_short_t s5k5ca_br_zero_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_Plus1
+/////////
+s5k5ca_short_t s5k5ca_br_plus1_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_Plus2
+/////////
+s5k5ca_short_t s5k5ca_br_plus2_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_Plus3
+/////////
+s5k5ca_short_t s5k5ca_br_plus3_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};                
+
+/////////
+// BR_Plus4
+/////////
+s5k5ca_short_t s5k5ca_br_plus4_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+
+////////////////////
+// SCENE_MODE_OFF
+////////////////////
+//////////////////////////////////////////////
+//////////Scene off///////////////////////////
+//////////////////////////////////////////////
+//01.None//
+//02.Sports off
+//03.Night off
+//////////////////////////////////////////////
+////////// CAM_REGSET_SCENE_NORMAL ///////////
+s5k5ca_short_t s5k5ca_scene_mode_off_00[] =
+{ 
+
+{ 0xFCFC, 0xD000 },   //WB Auto
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x246E },
+{ 0x0F12, 0x0001 },
+
+{ 0x0028, 0x7000 },   //For Scene//
+{ 0x002A, 0x020C },   
+{ 0x0F12, 0x0000 },   // Brightness for controling the EV//
+{ 0x002A, 0x0210 },   
+{ 0x0F12, 0x0000 },   // Saturation//
+{ 0x0F12, 0x0000 },   // Blur_Sharpness //  
+	
+///////////////////
+//02. Sports off //
+///////////////////
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x12B8 },  
+{ 0x0F12, 0x1000 }, 
+ 
+{ 0x002A, 0x0530 },   	                                                    
+{ 0x0F12, 0x3415 },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534 },                                                               
+{ 0x0F12, 0x682A },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C },                                                               
+{ 0x0F12, 0x8235 },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680 },                                                               
+{ 0x0F12, 0xc350 },   //MaxExp4   125ms  38ea //                           
+        
+{ 0x002A, 0x0538 },                                                               
+{ 0x0F12, 0x3415 },   // 15fps //                                                 
+{ 0x002A, 0x053C },                                                               
+{ 0x0F12, 0x682A },   // 7.5fps //                                                
+{ 0x002A, 0x1684 },                                                               
+{ 0x0F12, 0x8235 },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688 },                                                               
+{ 0x0F12, 0xC350 },   //CapMaxExp4 //                                             
+
+{ 0x002A, 0x0540 },                                                               
+{ 0x0F12, 0x01B3 },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3 },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C },                                                               
+{ 0x0F12, 0x02A0 },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710 },   //MaxAnGain4 //    
+
+{ 0x002A, 0x0544 },  
+{ 0x0F12, 0x0100 },
+{ 0x0F12, 0x8000 },
+
+{ 0x002A, 0x04B4 },  
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x0064 },
+{ 0x0F12, 0x0001 },
+
+//////////////////
+//03. Night off //
+//////////////////
+
+{ 0x0028, 0x7000 },
+
+{ 0x002A, 0x0530 },//lt_uMaxExp1//     
+{ 0x0F12, 0x3415 },                    
+{ 0x002A, 0x0534 },//lt_uMaxExp2//     
+{ 0x0F12, 0x682A },                    
+{ 0x002A, 0x167C },//lt_uMaxExp3//     
+{ 0x0F12, 0x8235 },                    
+{ 0x002A, 0x1680 },//lt_uMaxExp4//     
+{ 0x0F12, 0xc350 },                    
+{ 0x0F12, 0x0000 },                    
+                                     
+{ 0x002A, 0x0538 },//It_uCapMaxExp1 // 
+{ 0x0F12, 0x3415 },                    
+{ 0x002A, 0x053C },//It_uCapMaxExp2 // 
+{ 0x0F12, 0x682A },                    
+{ 0x002A, 0x1684 },//It_uCapMaxExp3 // 
+{ 0x0F12, 0x8235 },                    
+{ 0x002A, 0x1688 },//It_uCapMaxExp4 // 
+{ 0x0F12, 0xc350 },                    
+{ 0x0F12, 0x0000 },                    
+                                     
+{ 0x002A, 0x0540 },                                                               
+{ 0x0F12, 0x01B3 },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3 },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C },                                                               
+{ 0x0F12, 0x02A0 },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710 },   //MaxAnGain4 //
+                                     
+{ 0x002A, 0x0544 },                    
+{ 0x0F12, 0x0100 },//It_uMaxDigGain // 
+
+{ 0x002A, 0x07E6 },
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+
+{ 0x002A, 0x0838 },
+{ 0x0F12, 0x003C },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x023C },
+{ 0x0F12, 0x0000 },//REG_TC_GP_ActivePrevConfig     //Normal Preview //  
+{ 0x002A, 0x0240 },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_PrevOpenAfterChange  
+{ 0x002A, 0x0230 },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_NewConfigSync        
+{ 0x002A, 0x023E },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_PrevConfigChanged    
+{ 0x002A, 0x0220 },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_EnablePreview        
+{ 0x0F12, 0x0001 },   //REG_TC_GP_EnablePreviewChanged 
+
+//Metering Center
+{ 0xfcfc, 0xd000 },
+{ 0x0028, 0x7000 },             
+                                                            
+{ 0x002A, 0x0F7E },    //ae weight  //     
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0201 },  //0201
+{ 0x0F12, 0x0102 },  //0102
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0201 },  //0101
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0102 },  //0101
+{ 0x0F12, 0x0201 },  //0201
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0102 },  //0102
+{ 0x0F12, 0x0101 },  //0201
+{ 0x0F12, 0x0101 },  //0202
+{ 0x0F12, 0x0101 },  //0202
+{ 0x0F12, 0x0101 },  //0102
+
+{ 0xffff, 0xffff  },
+};
+
+////////////////////
+// SCENE_PORTRAIT_ON
+///////////////////
+s5k5ca_short_t s5k5ca_scene_portrait_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x020C },
+{ 0x0F12, 0x0000 },
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x0000 },
+{ 0x0F12, 0xFFF6 },
+
+{ 0xffff, 0xffff  },
+};
+
+ 
+////////////////////
+// SCENE_LANDSCAPE_ON
+///////////////////
+s5k5ca_short_t s5k5ca_scene_landscape_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x020C },
+{ 0x0F12, 0x0000 },
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x001E },
+{ 0x0F12, 0x000A },
+
+//Metering Matrix
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+                  
+{ 0x002a, 0x0F7E  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  },
+
+{ 0xffff, 0xffff  }, 
+};
+
+////////////////////
+// NIGHTMODE_ON
+///////////////////
+
+s5k5ca_short_t s5k5ca_nightmode_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },  
+{ 0x002A, 0x02CC },   //Night Preview
+{ 0x0F12, 0x0400 },	//REG_2TC_PCFG_usWidth                      	2   700002CC    // 
+{ 0x0F12, 0x0300 },   //REG_2TC_PCFG_usHeight                     	2   700002CE    // 
+{ 0x0F12, 0x0005 },   //REG_2TC_PCFG_Format                       	2   700002D0    // 
+{ 0x0F12, 0x32E8 },   //REG_2TC_PCFG_usMaxOut4KHzRate             	2   700002D2    // 
+{ 0x0F12, 0x32a8 },   //REG_2TC_PCFG_usMinOut4KHzRate             	2   700002D4    // 
+{ 0x0F12, 0x0100 },   //REG_2TC_PCFG_OutClkPerPix88               	2   700002D6    // 
+{ 0x0F12, 0x0800 },   //REG_2TC_PCFG_uMaxBpp88                    	2   700002D8    // 
+{ 0x0F12, 0x0072 },   //REG_2TC_PCFG_PVIMask                      	2   700002DA    // 
+{ 0x0F12, 0x0010 },   //REG_2TC_PCFG_OIFMask                      	2   700002DC    // 
+{ 0x0F12, 0x01E0 },   //REG_2TC_PCFG_usJpegPacketSize             	2   700002DE    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_usJpegTotalPackets           	2   700002E0    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_uClockInd                    	2   700002E2    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_usFrTimeType                 	2   700002E4    // 
+{ 0x0F12, 0x0001 },   //REG_2TC_PCFG_FrRateQualityType            	2   700002E6    // 
+{ 0x0F12, 0x09C4 },   //REG_2TC_PCFG_usMaxFrTimeMsecMult10        	2   700002E8    // 
+{ 0x0F12, 0x029A },   //REG_2TC_PCFG_usMinFrTimeMsecMult10        	2   700002EA    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_bSmearOutput                 	2   700002EC    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_sSaturation                  	2   700002EE    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_sSharpBlur                   	2   700002F0    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_sColorTemp                   	2   700002F2    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_uDeviceGammaIndex            	2   700002F4    // 
+{ 0x0F12, 0x0003 },   //REG_2TC_PCFG_uPrevMirror                  	2   700002F6    // 
+{ 0x0F12, 0x0003 },   //REG_2TC_PCFG_uCaptureMirror               	2   700002F8    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_uRotation                    	2   700002FA    // 
+                 
+{ 0x002A, 0x03B4 },   //Night Capture 
+{ 0x0F12, 0x0000 },	//REG_2TC_CCFG_uCaptureMode                 	2   700003B4          //
+{ 0x0F12, 0x0800 },   //REG_2TC_CCFG_usWidth                      	2   700003B6          //
+{ 0x0F12, 0x0600 },   //REG_2TC_CCFG_usHeight                     	2   700003B8          //
+{ 0x0F12, 0x0005 },   //REG_2TC_CCFG_Format                       	2   700003BA          //
+{ 0x0F12, 0x32E8 },   //REG_2TC_CCFG_usMaxOut4KHzRate             	2   700003BC          //
+{ 0x0F12, 0x32a8 },   //REG_2TC_CCFG_usMinOut4KHzRate             	2   700003BE          //
+{ 0x0F12, 0x0100 },   //REG_2TC_CCFG_OutClkPerPix88               	2   700003C0          //
+{ 0x0F12, 0x0800 },   //REG_2TC_CCFG_uMaxBpp88                    	2   700003C2          //
+{ 0x0F12, 0x0072 },   //REG_2TC_CCFG_PVIMask                      	2   700003C4          //
+{ 0x0F12, 0x0010 },   //REG_2TC_CCFG_OIFMask                      	2   700003C6          //
+{ 0x0F12, 0x01E0 },   //REG_2TC_CCFG_usJpegPacketSize             	2   700003C8          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_usJpegTotalPackets           	2   700003CA          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_uClockInd                    	2   700003CC          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_usFrTimeType                 	2   700003CE          //
+{ 0x0F12, 0x0002 },   //REG_2TC_CCFG_FrRateQualityType            	2   700003D0          //
+{ 0x0F12, 0x1388 },   //REG_2TC_CCFG_usMaxFrTimeMsecMult10        	2   700003D2          //
+{ 0x0F12, 0x1388 },   //REG_2TC_CCFG_usMinFrTimeMsecMult10        	2   700003D4          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_bSmearOutput                 	2   700003D6          //
+{ 0x0F12, 0x0030 },   //REG_2TC_CCFG_sSaturation                  	2   700003D8          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_sSharpBlur                   	2   700003DA          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_sColorTemp                   	2   700003DC          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_uDeviceGammaIndex            	2   700003DE          //
+                 
+                 
+{ 0x002A, 0x0208 },
+{ 0x0F12, 0x0001 },   //REG_TC_IPRM_InitParamsUpdated//
+                 
+                 
+{ 0x002A, 0x0530 },   //lt_uMaxExp1//     
+{ 0x0F12, 0x3415 },                       
+{ 0x002A, 0x0534 },   //lt_uMaxExp2//     
+{ 0x0F12, 0x682A },                       
+{ 0x002A, 0x167C },   //lt_uMaxExp3//     
+{ 0x0F12, 0x8235 },                       
+{ 0x002A, 0x1680 },   //lt_uMaxExp4//     
+{ 0x0F12, 0x1A80 },                       
+{ 0x0F12, 0x0006 },                       
+                                          
+{ 0x002A, 0x0538 },   //It_uCapMaxExp1 // 
+{ 0x0F12, 0x3415 },                       
+{ 0x002A, 0x053C },   //It_uCapMaxExp2 // 
+{ 0x0F12, 0x682A },                       
+{ 0x002A, 0x1684 },   //It_uCapMaxExp3 // 
+{ 0x0F12, 0x8235 },                       
+{ 0x002A, 0x1688 },   //It_uCapMaxExp4 // 
+{ 0x0F12, 0x1A80 },                       
+{ 0x0F12, 0x0006 },                       
+                                          
+{ 0x002A, 0x0540 },                       
+{ 0x0F12, 0x0180 },   //It_uMaxAnGain1 // 
+{ 0x0F12, 0x0250 },   //It_uMaxAnGain2 // 
+{ 0x002A, 0x168C },                       
+{ 0x0F12, 0x0340 },   //It_uMaxAnGain3 // 
+{ 0x0F12, 0x0800 },   //It_uMaxAnGain4 // 
+                                          
+{ 0x002A, 0x0544 },                       
+{ 0x0F12, 0x0100 },   //It_uMaxDigGain // 
+                 
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x07E6 },
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+                 
+{ 0x002A, 0x0838 },
+{ 0x0F12, 0x0A3C },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x023C },
+{ 0x0F12, 0x0002 },  //night preview config 2//
+{ 0x002A, 0x0240 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0230 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x023E },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0220 },
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x0001 },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////////
+// SCENE_SPORTS_ON
+////////////////
+s5k5ca_short_t s5k5ca_scene_sports_on_00[] =
+{
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+
+{ 0x002A, 0x12B8 },  
+{ 0x0F12, 0x2000 }, 
+
+{ 0x002A, 0x0530 },
+{ 0x0F12, 0x36B0 },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534 },                                                               
+{ 0x0F12, 0x36B0 },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C },                                                               
+{ 0x0F12, 0x36B0 },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680 },                                                               
+{ 0x0F12, 0x36B0 },   //MaxExp4   125ms  38ea //                           
+        
+{ 0x002A, 0x0538 },                                                               
+{ 0x0F12, 0x36B0 },   // 15fps //                                                 
+{ 0x002A, 0x053C },                                                               
+{ 0x0F12, 0x36B0 },   // 7.5fps //                                                
+{ 0x002A, 0x1684 },                                                               
+{ 0x0F12, 0x36B0 },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688 },                                                               
+{ 0x0F12, 0x36B0 },   //CapMaxExp4 //                                             
+ 
+{ 0x002A, 0x0540 },                                                               
+{ 0x0F12, 0x0200 },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200 },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C },                                                               
+{ 0x0F12, 0x0200 },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200 },   //MaxAnGain4 //    
+
+{ 0x002A, 0x0544 },  
+{ 0x0F12, 0x0100 },
+{ 0x0F12, 0x8000 },
+
+{ 0x002A, 0x04B4 },  
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x00C8 },
+{ 0x0F12, 0x0001 },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////////
+// SCENE_SUNSET_ON
+////////////////
+s5k5ca_short_t s5k5ca_scene_sunset_on_00[] =
+{ 
+{ 0xfcfc, 0xd000 },
+{ 0x0028, 0x7000 },
+{ 0x002a, 0x246E },
+{ 0x0f12, 0x0000 },
+                 
+{ 0x002a, 0x04A0 },
+{ 0x0f12, 0x05E0 },
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0400 },
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0500 },
+{ 0x0f12, 0x0001 },
+
+{ 0xffff, 0xffff  },
+};
+
+////////////////
+// SCENE_DAWN_ON
+////////////////
+s5k5ca_short_t s5k5ca_scene_dawn_on_00[] =
+{ 
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+
+//////////////////////
+// SCENE_AGAINSTLIGHT_ON
+//////////////////////
+s5k5ca_short_t s5k5ca_scene_againstlight_on_00[] =
+{ 
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_TEXT_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_text_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x020C },
+{ 0x0F12, 0x0000 },
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x0000 },
+{ 0x0F12, 0x0014 },
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_PARTY_INDOOR_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_party_indoor_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+                    // Party/indoor _ Shaturation +1
+{ 0x0028, 0x7000 }, //For Scene
+{ 0x002A, 0x020C },             
+{ 0x0F12, 0x0000 }, // Brightness for controling the EV
+{ 0x002A, 0x0210 }, 
+{ 0x0F12, 0x001e }, // Saturagon
+{ 0x0F12, 0x0000 }, // Sharpness
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_BEACH_SNOW_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_beach_snow_on_00[] =
+{ 
+//04. BEACH_SNOW
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 }, //For Scene
+{ 0x002A, 0x020C },             
+{ 0x0F12, 0x0014 }, // Brightness for controling the EV
+{ 0x002A, 0x0210 }, 
+{ 0x0F12, 0x001e }, // Saturagon
+{ 0x0F12, 0x0000 }, // Sharpness
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_CANDLELIGHT_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_candlelight_on_00[] =
+{ 
+
+{ 0xfcfc, 0xd000 }, 
+{ 0x0028, 0x7000 }, 
+{ 0x002a, 0x246E }, 	 
+{ 0x0f12, 0x0000 },
+
+{ 0x002a, 0x04A0 }, 	 
+{ 0x0f12, 0x05E0 },
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0400 }, 
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0500 },
+{ 0x0f12, 0x0001 }, 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_FIREWORKS_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_fireworks_on_00[] =
+{ 
+//09. FIRE _ Preview : (4fps Exposure 250ms) Capture : ( 1fps Exposure 1000ms )
+//Preview 4fps : Capture 1fps
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x02CC },
+{ 0x0F12, 0x0400 },    	//REG_2TC_PCFG_usWidth                      	2   700002CC        //
+{ 0x0F12, 0x0300 },    	//REG_2TC_PCFG_usHeight                     	2   700002CE        //
+{ 0x0F12, 0x0005 },    	//REG_2TC_PCFG_Format                       	2   700002D0        //
+{ 0x0F12, 0x32E8 },    	//REG_2TC_PCFG_usMaxOut4KHzRate             	2   700002D2        //
+{ 0x0F12, 0x32a8 },    	//REG_2TC_PCFG_usMinOut4KHzRate             	2   700002D4        //
+{ 0x0F12, 0x0100 },    	//REG_2TC_PCFG_OutClkPerPix88               	2   700002D6        //
+{ 0x0F12, 0x0800 },    	//REG_2TC_PCFG_uMaxBpp88                    	2   700002D8        //
+{ 0x0F12, 0x0072 },    	//REG_2TC_PCFG_PVIMask                      	2   700002DA        //
+{ 0x0F12, 0x0010 },    	//REG_2TC_PCFG_OIFMask                      	2   700002DC        //
+{ 0x0F12, 0x01E0 },    	//REG_2TC_PCFG_usJpegPacketSize             	2   700002DE        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_usJpegTotalPackets           	2   700002E0        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_uClockInd                    	2   700002E2        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_usFrTimeType                 	2   700002E4        //
+{ 0x0F12, 0x0001 },    	//REG_2TC_PCFG_FrRateQualityType            	2   700002E6        //
+{ 0x0F12, 0x09C4 },    	//REG_2TC_PCFG_usMaxFrTimeMsecMult10        	2   700002E8        //
+{ 0x0F12, 0x029A },    	//REG_2TC_PCFG_usMinFrTimeMsecMult10        	2   700002EA        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_bSmearOutput                 	2   700002EC        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_sSaturation                  	2   700002EE        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_sSharpBlur                   	2   700002F0        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_sColorTemp                   	2   700002F2        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_uDeviceGammaIndex            	2   700002F4        //
+{ 0x0F12, 0x0003 },    	//REG_2TC_PCFG_uPrevMirror                  	2   700002F6        //
+{ 0x0F12, 0x0003 },    	//REG_2TC_PCFG_uCaptureMirror               	2   700002F8        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_uRotation                    	2   700002FA        //
+
+//Night shot capture 2fps
+{ 0x002A, 0x03B4 },
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_uCaptureMode                 	2   700003B4              //
+{ 0x0F12, 0x0800 },    	//REG_2TC_CCFG_usWidth                      	2   700003B6              //
+{ 0x0F12, 0x0600 },    	//REG_2TC_CCFG_usHeight                     	2   700003B8              //
+{ 0x0F12, 0x0005 },    	//REG_2TC_CCFG_Format                       	2   700003BA              //
+{ 0x0F12, 0x32E8 },    	//REG_2TC_CCFG_usMaxOut4KHzRate             	2   700003BC              //
+{ 0x0F12, 0x32a8 },    	//REG_2TC_CCFG_usMinOut4KHzRate             	2   700003BE              //
+{ 0x0F12, 0x0100 },    	//REG_2TC_CCFG_OutClkPerPix88               	2   700003C0              //
+{ 0x0F12, 0x0800 },    	//REG_2TC_CCFG_uMaxBpp88                    	2   700003C2              //
+{ 0x0F12, 0x0072 },    	//REG_2TC_CCFG_PVIMask                      	2   700003C4              //
+{ 0x0F12, 0x0010 },    	//REG_2TC_CCFG_OIFMask                      	2   700003C6              //
+{ 0x0F12, 0x01E0 },    	//REG_2TC_CCFG_usJpegPacketSize             	2   700003C8              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_usJpegTotalPackets           	2   700003CA              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_uClockInd                    	2   700003CC              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_usFrTimeType                 	2   700003CE              //
+{ 0x0F12, 0x0002 },    	//REG_2TC_CCFG_FrRateQualityType            	2   700003D0              //
+{ 0x0F12, 0x2710 },	//REG_2TC_CCFG_usMaxFrTimeMsecMult10        	2   700003D2              //
+{ 0x0F12, 0x2710 },	//REG_2TC_CCFG_usMinFrTimeMsecMult10        	2   700003D4              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_bSmearOutput                 	2   700003D6              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_sSaturation                  	2   700003D8              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_sSharpBlur                   	2   700003DA              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_sColorTemp                   	2   700003DC              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_uDeviceGammaIndex            	2   700003DE              //
+
+{ 0x002A, 0x0208 },                                      
+{ 0x0F12, 0x0001 },       //REG_TC_IPRM_InitParamsUpdated//
+
+{ 0x002A, 0x0530 },	//lt_uMaxExp1             
+{ 0x0F12, 0x3415 },		
+{ 0x002A, 0x0534 },       //lt_uMaxExp2              
+{ 0x0F12, 0x682A },		
+{ 0x002A, 0x167C },       //lt_uMaxExp3              
+{ 0x0F12, 0x8235 },		
+{ 0x002A, 0x1680 },       //lt_uMaxExp4              
+{ 0x0F12, 0x1A80 },       //1fps
+{ 0x0F12, 0x0006 },
+                              
+{ 0x002A, 0x0538 },       //It_uCapMaxExp1 //              
+{ 0x0F12, 0x3415 },	  
+{ 0x002A, 0x053C },       //It_uCapMaxExp1 //             
+{ 0x0F12, 0x682A },	  
+{ 0x002A, 0x1684 },       //It_uCapMaxExp3 //              
+{ 0x0F12, 0x8235 },	
+{ 0x002A, 0x1688 },       //It_uCapMaxExp4 //             
+{ 0x0F12, 0x1A80 },       //1fps
+{ 0x0F12, 0x0006 },	
+                              
+{ 0x002A, 0x0540 },                     
+{ 0x0F12, 0x0180 },       //It_uMaxAnGain1 //
+{ 0x0F12, 0x0250 },	//It_uMaxAnGain2 //
+{ 0x002A, 0x168C },                     
+{ 0x0F12, 0x0340 },	//It_uMaxAnGain3 //
+{ 0x0F12, 0x0710 },	//It_uMaxAnGain4 //
+
+{ 0x002A, 0x0544 },       //It_uMaxDigGain //
+{ 0x0F12, 0x0100 },
+
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x023C },
+{ 0x0F12, 0x0002 },	//#REG_TC_GP_ActivePrevConfig     //Night Preview
+{ 0x002A, 0x0240 },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_PrevOpenAfterChange
+{ 0x002A, 0x0230 },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_NewConfigSync
+{ 0x002A, 0x023E },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_PrevConfigChanged
+{ 0x002A, 0x0220 },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_EnablePreview
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_EnablePreviewChanged
+ 
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_Dust_Dawn_On
+///////////////
+s5k5ca_short_t s5k5ca_scene_dust_dawn_00[] =
+{ 
+//Cam_Cfg_WB_Fluorescent
+{ 0xfcfc, 0xd000 }, 
+{ 0x0028, 0x7000 }, 
+{ 0x002a, 0x246E }, 	 
+{ 0x0f12, 0x0000 },
+
+{ 0x002a, 0x04A0 }, 	 
+{ 0x0f12, 0x0530 }, 
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0400 }, 
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0800 }, 
+{ 0x0f12, 0x0001 }, 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_Fall_Color_On
+///////////////
+s5k5ca_short_t s5k5ca_scene_fall_color_00[] =
+{ 
+//07. FALL
+{ 0xFCFC, 0xD000 },
+//  Fall  _ Saturation +2
+{ 0x0028, 0x7000 }, //For Scene
+{ 0x002A, 0x020C },             
+{ 0x0F12, 0x0000 }, // Brightness for controling the EV
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x0032 }, // Saturation
+{ 0x0F12, 0x0000 }, // Sharpness
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_Backlight_On
+///////////////
+s5k5ca_short_t s5k5ca_scene_backlight_00[] =
+{ 
+//Metering Center
+//Flash On Default
+{ 0xfcfc, 0xd000 },
+{ 0x0028, 0x7000 },
+                 
+{ 0x002A, 0x0F7E  },    //ae weight  //     
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0201
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0102
+
+{ 0xffff, 0xffff  },
+};
+
+
+
+
+////////////////////////
+// MeasureBrightness_SPOT
+///////////////////////
+s5k5ca_short_t s5k5ca_measure_brightness_spot_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////////////////
+// MeasureBrightness_Default
+//////////////////////////
+s5k5ca_short_t s5k5ca_measure_brightness_default_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+#if 1//PGH 
+s5k5ca_short_t s5k5ca_ae_awb_unlock[] = 
+{
+{ 0xffff, 0xffff  },
+
+};
+ 
+s5k5ca_short_t s5k5ca_ae_mwb_unlock[] = 
+{
+{ 0xffff, 0xffff  },
+
+};
+ 
+s5k5ca_short_t s5k5ca_ae_awb_lock[] = 
+{
+{ 0xffff, 0xffff  },
+
+};
+#endif//PGH
+
+
+s5k5ca_short_t s5k5ca_af_low_lux_val[] = 
+{ //0217 SEMCO
+
+{ 0xffff, 0xffff  },
+};
+	 
+s5k5ca_short_t s5k5ca_af_normal_lux_val[] = 
+{
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////////////////////
+// MeasureBrightness_CENTER
+/////////////////////////////
+s5k5ca_short_t s5k5ca_measure_brightness_center_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+// 0407 function add.
+
+s5k5ca_short_t s5k5ca_metering_spot[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+                    
+{ 0x002A, 0x0F7E  },
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0f01  }, 
+{ 0x0f12, 0x010f  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0f01  }, 
+{ 0x0f12, 0x010f  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  },
+
+{ 0xffff, 0xffff  },
+
+};
+
+s5k5ca_short_t s5k5ca_metering_matrix[] = 
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+                  
+{ 0x002a, 0x0F7E  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  },
+
+{ 0xffff, 0xffff  },
+
+};
+
+s5k5ca_short_t s5k5ca_metering_center[] = 
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },             
+                                                             
+{ 0x002A, 0x0F7E  },    //ae weight  //     
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0201
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0102
+
+{ 0xffff, 0xffff  },
+
+};
+
+
+
+
+
+//define S5K5CA_INIT_REGS (sizeof(s5k5ca_reg)/sizeof(s5k5ca_reg[0]))
+//define S5K5CA_UXGA_REGS (sizeof(s5k5ca_reg_uxga)/sizeof(s5k5ca_reg_uxga[0]))
+//define S5K5CA_SVGA_REGS (sizeof(s5k5ca_reg_svga)/sizeof(s5k5ca_reg_svga[0]))
+//define S5K5CA_VGA_REGS (sizeof(s5k5ca_reg_vga)/sizeof(s5k5ca_reg_vga[0]))
+//define S5K5CA_QSVGA_REGS (sizeof(s5k5ca_reg_qsvga)/sizeof(s5k5ca_reg_qsvga[0]))
+
+////define S5K5CA_RISC_REGS 0xEB
+////define S5K5CA_ISP_REGS 0xFB /* S5C7323X */
+////define S5K5CA_CIS_REGS 0x2F /* S5K437LA03 */
+                                                                                                                                                                                              
+////define S5K5CA_REGS (0x1000)
+
+//endif
+
+
+
+#endif
diff -uNra linux-3.0.82/drivers/media/video/s5k5ca_640x480xrgb.h linux-3.0.82x/drivers/media/video/s5k5ca_640x480xrgb.h
--- linux-3.0.82/drivers/media/video/s5k5ca_640x480xrgb.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/s5k5ca_640x480xrgb.h	2017-09-23 03:42:49.574676421 +0800
@@ -0,0 +1,5403 @@
+
+#ifndef _SAMSUNG_SXGA_H_
+#define _SAMSUNG_SXGA_H_
+
+/*******************************************************************************************
+ #  Display resolution standards #
+
+	QCIF: 176 x 144
+	CIF: 352 x 288
+	QVGA: 320 x 240
+	VGA: 640 x 480 
+	SVGA: 800 x 600 
+	XGA: 1024 x 768 
+	WXGA: 1280 x 800 
+	QVGA: 1280 x 960 
+	SXGA: 1280 x 1024 
+	SXGA+: 1400 x 1050 
+	WSXGA+: 1680 x 1050 
+	UXGA: 1600 x 1200 
+	WUXGA: 1920 x 1200 
+	QXGA: 2048 x 1536
+********************************************************************************************/
+
+//#include "../bits.h"
+
+/* Camera information 
+ * FPC Label : Samsung MEGA Pixel Camera : V4220 REV06 
+ * Modified by charles -Initial function of '3AA' test routine
+ * Modified and tested by YongHwui.Kim <yonghwui.kim@samsung.com> for S5K3AAEX Camera
+ */
+                                                                                
+#define CHIP_DELAY 0xFF
+                                                                                
+typedef struct samsung_t{
+        unsigned short page;	
+        unsigned short subaddr;
+        unsigned short value;
+
+} s5k5ca_t;
+
+// mihee 080508 start
+typedef struct samsung_short_t{
+        unsigned short subaddr;
+        unsigned short value;
+        unsigned short page;
+} s5k5ca_short_t;
+// mihee 080508 end
+
+typedef struct exif_data_st{
+        unsigned short exposureTime;
+		unsigned short lux;
+		unsigned short iso;
+} exif_data_t;
+
+#ifdef CONFIG_CPU_S3C24A0A
+#define TRY_HIGH_CLOCK 1
+#endif
+
+				//***************************************************
+				//  name: 	S5K3AAEX EVT2 setfile
+				//  ver:		v2.61	
+				//  history: 	
+				//	v0.0	start from 040908 setfile
+				//	v1.0	arange register
+				//	v1.01	change MCLK(25Mhz) and Frame rate(7fps)
+				//	v2.0	adjust register setting for 3AA EVT2
+				//		- color correction, RGB shding off, hsync start position, Mirror, fps
+				//		- Color Tuning, YGRPDLY 
+				//	v2.1	change Frame rate(7.5fps) and Total gain to x4 
+				//		(because of reducing visual noise at low illumination)
+				//		- change BPRM AGC Max and FrameAE start 
+				//		improve AE speed
+				//	v2.2	modify AWB G gain and solve 50hz flicker detection fail in 25MHz 7.5fps
+				//	v2.3	Adjust gamma, Dark Slice, white point, Hue gain,
+				//		White Balance B control, Y gain On, Digital Clamp On
+				//		lower AWB G gain
+				//	v2.4	Adjust AE window weight, Y Gamma, WhitePoint, Shading and BPR Max Thres.
+				// 	v2.41	Adjust AE/AWB window and AWB internal window boundary to decrease skin color tracking
+				// 	v2.411	special version for PSCDS
+				// 	v2.412	RGB shading off
+				//	v2.5	Lens change STW to Sekonix 
+				//		adjust White point and Y shading Coef (RGB shading off)
+				//	v2.6	New Tuning because of Full YC off and YCbCr Coef change
+				//		Gamma, Dark Slice, color matrix (not use), Color suppress
+				//		R Gain and DBPR agc MIN/MAX
+				//	v2.61	VCK inversion(data rising)
+				//***************************************************
+				///////////////////////////////////////////////////
+
+//#if defined(CONFIG_VIDEO_SAMSUNG_S5K5CA)
+s5k5ca_short_t s5k5ca_preview_00[] = 
+{
+{ 0xFCFC, 0xD000  },                                                                                  
+{ 0x0028, 0x7000  }, 
+                  
+{ 0x002A, 0x07E6  },                                                            
+{ 0x0F12, 0x0000  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow 
+{ 0x0F12, 0x0000  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+                  
+{ 0x002A, 0x0838  },
+{ 0x0F12, 0x003C  },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x0908  },
+{ 0x0F12, 0x0046  },	//TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]
+
+//HIGHLUX RECOVER Value
+{ 0x002a, 0x0B2C  },
+{ 0x0F12, 0x003C  },	//70000B2C //TVAR_afit_pBaseValS[436] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x0050  },	//70000B2E //TVAR_afit_pBaseValS[437] /AFIT16_YUV422_DENOISE_iUVHighThresh  
+
+{ 0x002a, 0x0B50  },
+{ 0x0F12, 0x012D  },	//70000B50 //TVAR_afit_pBaseValS[454] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8] 
+
+{ 0x002a, 0x0B84  },
+{ 0x0F12, 0x210C  },	//70000B84 //TVAR_afit_pBaseValS[480] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]   
+
+
+{ 0x002A, 0x035C  }, //Capture Mode//
+{ 0x0F12, 0x0000  },
+{ 0x002A, 0x0388  }, //Capture Mode//
+{ 0x0F12, 0x0000  },
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },   
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+s5k5ca_short_t s5k5ca_init_00[] = 
+{
+{ 0xFCFC, 0xD000  },
+
+//************************************//
+////****************************************/																															//
+////Ver 0.1 New Analog Settings for 5CA EVT0 30FPS in Binning, including latest TnP for EVT1              //
+////20091310 - added analog settings for 430LSB, long exposure mode only. Settings are for 32MHz Sys. CLK //
+////20091102 - added all calibration data, final settings for STW EVT1 module, SCLK 32MHz, PCLK 60 MHz.   //
+////20091104 - Changed the shading alpha &Near off                                                        //
+////20091104 - Changed awbb_GridEnable from 0001h to 0002h	//awbb_GridEnable                             //
+////aetarget41-46, gamma change for improving contrast                                                    //
+////20100113 - New TnP updated//
+
+{ 0xFCFC, 0xD000  },	//Reset                                  //
+{ 0x0010, 0x0001  },   //Clear host interrupt so main will wait //
+{ 0x1030, 0x0000  },   //ARM go                                 //
+{ 0x0014, 0x0001  },   //Wait100mSec
+                  
+{ 0xdddd, 0x0064  }, //delay 100ms
+                  
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x2CF8  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0x4827  },
+{ 0x0F12, 0x21C0  },
+{ 0x0F12, 0x8041  },
+{ 0x0F12, 0x4825  },
+{ 0x0F12, 0x4A26  },
+{ 0x0F12, 0x3020  },
+{ 0x0F12, 0x8382  },
+{ 0x0F12, 0x1D12  },
+{ 0x0F12, 0x83C2  },
+{ 0x0F12, 0x4822  },
+{ 0x0F12, 0x3040  },
+{ 0x0F12, 0x8041  },
+{ 0x0F12, 0x4821  },
+{ 0x0F12, 0x4922  },
+{ 0x0F12, 0x3060  },
+{ 0x0F12, 0x8381  },
+{ 0x0F12, 0x1D09  },
+{ 0x0F12, 0x83C1  },
+{ 0x0F12, 0x4821  },
+{ 0x0F12, 0x491D  },
+{ 0x0F12, 0x8802  },
+{ 0x0F12, 0x3980  },
+{ 0x0F12, 0x804A  },
+{ 0x0F12, 0x8842  },
+{ 0x0F12, 0x808A  },
+{ 0x0F12, 0x8882  },
+{ 0x0F12, 0x80CA  },
+{ 0x0F12, 0x88C2  },
+{ 0x0F12, 0x810A  },
+{ 0x0F12, 0x8902  },
+{ 0x0F12, 0x491C  },
+{ 0x0F12, 0x80CA  },
+{ 0x0F12, 0x8942  },
+{ 0x0F12, 0x814A  },
+{ 0x0F12, 0x8982  },
+{ 0x0F12, 0x830A  },
+{ 0x0F12, 0x89C2  },
+{ 0x0F12, 0x834A  },
+{ 0x0F12, 0x8A00  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x8188  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x4819  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xFA0E  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x4819  },
+{ 0x0F12, 0x6341  },
+{ 0x0F12, 0x4919  },
+{ 0x0F12, 0x4819  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xFA07  },
+{ 0x0F12, 0x4816  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x3840  },
+{ 0x0F12, 0x62C1  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x3880  },
+{ 0x0F12, 0x63C1  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x6301  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x3040  },
+{ 0x0F12, 0x6181  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x4817  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9F7  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x4817  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9F3  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x4817  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9EF  },
+{ 0x0F12, 0xBC10  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0x1100  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x267C  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x2CE8  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x3274  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xF400  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0xF520  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2DF1  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x89A9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x2E43  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x0140  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2E7D  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xB4F7  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x2F07  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2F2B  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2FD1  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2FE5  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2FB9  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x013D  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x306B  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x5823  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x30B9  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xD789  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0xB570  },
+{ 0x0F12, 0x6804  },
+{ 0x0F12, 0x6845  },
+{ 0x0F12, 0x6881  },
+{ 0x0F12, 0x6840  },
+{ 0x0F12, 0x2900  },
+{ 0x0F12, 0x6880  },
+{ 0x0F12, 0xD007  },
+{ 0x0F12, 0x49C3  },
+{ 0x0F12, 0x8949  },
+{ 0x0F12, 0x084A  },
+{ 0x0F12, 0x1880  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9BA  },
+{ 0x0F12, 0x80A0  },
+{ 0x0F12, 0xE000  },
+{ 0x0F12, 0x80A0  },
+{ 0x0F12, 0x88A0  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD010  },
+{ 0x0F12, 0x68A9  },
+{ 0x0F12, 0x6828  },
+{ 0x0F12, 0x084A  },
+{ 0x0F12, 0x1880  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9AE  },
+{ 0x0F12, 0x8020  },
+{ 0x0F12, 0x1D2D  },
+{ 0x0F12, 0xCD03  },
+{ 0x0F12, 0x084A  },
+{ 0x0F12, 0x1880  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9A7  },
+{ 0x0F12, 0x8060  },
+{ 0x0F12, 0xBC70  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0x2000  },
+{ 0x0F12, 0x8060  },
+{ 0x0F12, 0x8020  },
+{ 0x0F12, 0xE7F8  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9A2  },
+{ 0x0F12, 0x48B2  },
+{ 0x0F12, 0x8A40  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD00C  },
+{ 0x0F12, 0x48B1  },
+{ 0x0F12, 0x49B2  },
+{ 0x0F12, 0x8800  },
+{ 0x0F12, 0x4AB2  },
+{ 0x0F12, 0x2805  },
+{ 0x0F12, 0xD003  },
+{ 0x0F12, 0x4BB1  },
+{ 0x0F12, 0x795B  },
+{ 0x0F12, 0x2B00  },
+{ 0x0F12, 0xD005  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0x8008  },
+{ 0x0F12, 0x8010  },
+{ 0x0F12, 0xBC10  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD1FA  },
+{ 0x0F12, 0x2000  },
+{ 0x0F12, 0x8008  },
+{ 0x0F12, 0x8010  },
+{ 0x0F12, 0xE7F6  },
+{ 0x0F12, 0xB5F8  },
+{ 0x0F12, 0x2407  },
+{ 0x0F12, 0x2C06  },
+{ 0x0F12, 0xD035  },
+{ 0x0F12, 0x2C07  },
+{ 0x0F12, 0xD033  },
+{ 0x0F12, 0x48A3  },
+{ 0x0F12, 0x8BC1  },
+{ 0x0F12, 0x2900  },
+{ 0x0F12, 0xD02A  },
+{ 0x0F12, 0x00A2  },
+{ 0x0F12, 0x1815  },
+{ 0x0F12, 0x4AA4  },
+{ 0x0F12, 0x6DEE  },
+{ 0x0F12, 0x8A92  },
+{ 0x0F12, 0x4296  },
+{ 0x0F12, 0xD923  },
+{ 0x0F12, 0x0028  },
+{ 0x0F12, 0x3080  },
+{ 0x0F12, 0x0007  },
+{ 0x0F12, 0x69C0  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF96B  },
+{ 0x0F12, 0x1C71  },
+{ 0x0F12, 0x0280  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF967  },
+{ 0x0F12, 0x0006  },
+{ 0x0F12, 0x4898  },
+{ 0x0F12, 0x0061  },
+{ 0x0F12, 0x1808  },
+{ 0x0F12, 0x8D80  },
+{ 0x0F12, 0x0A01  },
+{ 0x0F12, 0x0600  },
+{ 0x0F12, 0x0E00  },
+{ 0x0F12, 0x1A08  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF96A  },
+{ 0x0F12, 0x0002  },
+{ 0x0F12, 0x6DE9  },
+{ 0x0F12, 0x6FE8  },
+{ 0x0F12, 0x1A08  },
+{ 0x0F12, 0x4351  },
+{ 0x0F12, 0x0300  },
+{ 0x0F12, 0x1C49  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF953  },
+{ 0x0F12, 0x0401  },
+{ 0x0F12, 0x0430  },
+{ 0x0F12, 0x0C00  },
+{ 0x0F12, 0x4301  },
+{ 0x0F12, 0x61F9  },
+{ 0x0F12, 0xE004  },
+{ 0x0F12, 0x00A2  },
+{ 0x0F12, 0x4990  },
+{ 0x0F12, 0x1810  },
+{ 0x0F12, 0x3080  },
+{ 0x0F12, 0x61C1  },
+{ 0x0F12, 0x1E64  },
+{ 0x0F12, 0xD2C5  },
+{ 0x0F12, 0x2006  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF959  },
+{ 0x0F12, 0x2007  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF956  },
+{ 0x0F12, 0xBCF8  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF958  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD00A  },
+{ 0x0F12, 0x4881  },
+{ 0x0F12, 0x8B81  },
+{ 0x0F12, 0x0089  },
+{ 0x0F12, 0x1808  },
+{ 0x0F12, 0x6DC1  },
+{ 0x0F12, 0x4883  },
+{ 0x0F12, 0x8A80  },
+{ 0x0F12, 0x4281  },
+{ 0x0F12, 0xD901  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0xE7A1  },
+{ 0x0F12, 0x2000  },
+{ 0x0F12, 0xE79F  },
+{ 0x0F12, 0xB5F8  },
+{ 0x0F12, 0x0004  },
+{ 0x0F12, 0x4F80  },
+{ 0x0F12, 0x227D  },
+{ 0x0F12, 0x8938  },
+{ 0x0F12, 0x0152  },
+{ 0x0F12, 0x4342  },
+{ 0x0F12, 0x487E  },
+{ 0x0F12, 0x9000  },
+{ 0x0F12, 0x8A01  },
+{ 0x0F12, 0x0848  },
+{ 0x0F12, 0x1810  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91D  },
+{ 0x0F12, 0x210F  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF940  },
+{ 0x0F12, 0x497A  },
+{ 0x0F12, 0x8C49  },
+{ 0x0F12, 0x090E  },
+{ 0x0F12, 0x0136  },
+{ 0x0F12, 0x4306  },
+{ 0x0F12, 0x4979  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0xD003  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0x0240  },
+{ 0x0F12, 0x4330  },
+{ 0x0F12, 0x8108  },
+{ 0x0F12, 0x4876  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0x8D00  },
+{ 0x0F12, 0xD001  },
+{ 0x0F12, 0x2501  },
+{ 0x0F12, 0xE000  },
+{ 0x0F12, 0x2500  },
+{ 0x0F12, 0x4972  },
+{ 0x0F12, 0x4328  },
+{ 0x0F12, 0x8008  },
+{ 0x0F12, 0x207D  },
+{ 0x0F12, 0x00C0  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF92E  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0x496E  },
+{ 0x0F12, 0x0328  },
+{ 0x0F12, 0x4330  },
+{ 0x0F12, 0x8108  },
+{ 0x0F12, 0x88F8  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0x01AA  },
+{ 0x0F12, 0x4310  },
+{ 0x0F12, 0x8088  },
+{ 0x0F12, 0x9800  },
+{ 0x0F12, 0x8A01  },
+{ 0x0F12, 0x486A  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8F1  },
+{ 0x0F12, 0x496A  },
+{ 0x0F12, 0x8809  },
+{ 0x0F12, 0x4348  },
+{ 0x0F12, 0x0400  },
+{ 0x0F12, 0x0C00  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF918  },
+{ 0x0F12, 0x0020  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91D  },
+{ 0x0F12, 0x4866  },
+{ 0x0F12, 0x7004  },
+{ 0x0F12, 0xE7A3  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0x0004  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91E  },
+{ 0x0F12, 0x6020  },
+{ 0x0F12, 0x4963  },
+{ 0x0F12, 0x8B49  },
+{ 0x0F12, 0x0789  },
+{ 0x0F12, 0xD001  },
+{ 0x0F12, 0x0040  },
+{ 0x0F12, 0x6020  },
+{ 0x0F12, 0xE74C  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91B  },
+{ 0x0F12, 0x485F  },
+{ 0x0F12, 0x8880  },
+{ 0x0F12, 0x0601  },
+{ 0x0F12, 0x4854  },
+{ 0x0F12, 0x1609  },
+{ 0x0F12, 0x8141  },
+{ 0x0F12, 0xE742  },
+{ 0x0F12, 0xB5F8  },
+{ 0x0F12, 0x000F  },
+{ 0x0F12, 0x4C55  },
+{ 0x0F12, 0x3420  },
+{ 0x0F12, 0x2500  },
+{ 0x0F12, 0x5765  },
+{ 0x0F12, 0x0039  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF913  },
+{ 0x0F12, 0x9000  },
+{ 0x0F12, 0x2600  },
+{ 0x0F12, 0x57A6  },
+{ 0x0F12, 0x4C4C  },
+{ 0x0F12, 0x42AE  },
+{ 0x0F12, 0xD01B  },
+{ 0x0F12, 0x4D54  },
+{ 0x0F12, 0x8AE8  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD013  },
+{ 0x0F12, 0x484D  },
+{ 0x0F12, 0x8A01  },
+{ 0x0F12, 0x8B80  },
+{ 0x0F12, 0x4378  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8B5  },
+{ 0x0F12, 0x89A9  },
+{ 0x0F12, 0x1A41  },
+{ 0x0F12, 0x484E  },
+{ 0x0F12, 0x3820  },
+{ 0x0F12, 0x8AC0  },
+{ 0x0F12, 0x4348  },
+{ 0x0F12, 0x17C1  },
+{ 0x0F12, 0x0D89  },
+{ 0x0F12, 0x1808  },
+{ 0x0F12, 0x1280  },
+{ 0x0F12, 0x8961  },
+{ 0x0F12, 0x1A08  },
+{ 0x0F12, 0x8160  },
+{ 0x0F12, 0xE003  },
+{ 0x0F12, 0x88A8  },
+{ 0x0F12, 0x0600  },
+{ 0x0F12, 0x1600  },
+{ 0x0F12, 0x8160  },
+{ 0x0F12, 0x200A  },
+{ 0x0F12, 0x5E20  },
+{ 0x0F12, 0x42B0  },
+{ 0x0F12, 0xD011  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8AB  },
+{ 0x0F12, 0x1D40  },
+{ 0x0F12, 0x00C3  },
+{ 0x0F12, 0x1A18  },
+{ 0x0F12, 0x214B  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF897  },
+{ 0x0F12, 0x211F  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8BA  },
+{ 0x0F12, 0x210A  },
+{ 0x0F12, 0x5E61  },
+{ 0x0F12, 0x0FC9  },
+{ 0x0F12, 0x0149  },
+{ 0x0F12, 0x4301  },
+{ 0x0F12, 0x483D  },
+{ 0x0F12, 0x81C1  },
+{ 0x0F12, 0x9800  },
+{ 0x0F12, 0xE74A  },
+{ 0x0F12, 0xB5F1  },
+{ 0x0F12, 0xB082  },
+{ 0x0F12, 0x2500  },
+{ 0x0F12, 0x483A  },
+{ 0x0F12, 0x9001  },
+{ 0x0F12, 0x2400  },
+{ 0x0F12, 0x2028  },
+{ 0x0F12, 0x4368  },
+{ 0x0F12, 0x4A39  },
+{ 0x0F12, 0x4925  },
+{ 0x0F12, 0x1887  },
+{ 0x0F12, 0x1840  },
+{ 0x0F12, 0x9000  },
+{ 0x0F12, 0x9800  },
+{ 0x0F12, 0x0066  },
+{ 0x0F12, 0x9A01  },
+{ 0x0F12, 0x1980  },
+{ 0x0F12, 0x218C  },
+{ 0x0F12, 0x5A09  },
+{ 0x0F12, 0x8A80  },
+{ 0x0F12, 0x8812  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8CA  },
+{ 0x0F12, 0x53B8  },
+{ 0x0F12, 0x1C64  },
+{ 0x0F12, 0x2C14  },
+{ 0x0F12, 0xDBF1  },
+{ 0x0F12, 0x1C6D  },
+{ 0x0F12, 0x2D03  },
+{ 0x0F12, 0xDBE6  },
+{ 0x0F12, 0x9802  },
+{ 0x0F12, 0x6800  },
+{ 0x0F12, 0x0600  },
+{ 0x0F12, 0x0E00  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8C5  },
+{ 0x0F12, 0xBCFE  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0xB570  },
+{ 0x0F12, 0x6805  },
+{ 0x0F12, 0x2404  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8C5  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD103  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8C9  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2400  },
+{ 0x0F12, 0x3540  },
+{ 0x0F12, 0x88E8  },
+{ 0x0F12, 0x0500  },
+{ 0x0F12, 0xD403  },
+{ 0x0F12, 0x4822  },
+{ 0x0F12, 0x89C0  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD002  },
+{ 0x0F12, 0x2008  },
+{ 0x0F12, 0x4304  },
+{ 0x0F12, 0xE001  },
+{ 0x0F12, 0x2010  },
+{ 0x0F12, 0x4304  },
+{ 0x0F12, 0x481F  },
+{ 0x0F12, 0x8B80  },
+{ 0x0F12, 0x0700  },
+{ 0x0F12, 0x0F81  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0x2900  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x4304  },
+{ 0x0F12, 0x491C  },
+{ 0x0F12, 0x8B0A  },
+{ 0x0F12, 0x42A2  },
+{ 0x0F12, 0xD004  },
+{ 0x0F12, 0x0762  },
+{ 0x0F12, 0xD502  },
+{ 0x0F12, 0x4A19  },
+{ 0x0F12, 0x3220  },
+{ 0x0F12, 0x8110  },
+{ 0x0F12, 0x830C  },
+{ 0x0F12, 0xE691  },
+{ 0x0F12, 0x0C3C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x3274  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x26E8  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x6100  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x6500  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x1A7C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1120  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xFFFF  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x3374  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1D6C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x167C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xF400  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2C2C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x40A0  },
+{ 0x0F12, 0x00DD  },
+{ 0x0F12, 0xF520  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2C29  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1A54  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1564  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xF2A0  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2440  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x05A0  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2894  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1224  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xB000  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x1A3F  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xF004  },
+{ 0x0F12, 0xE51F  },
+{ 0x0F12, 0x1F48  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x24BD  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x36DD  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xB4CF  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xB5D7  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x36ED  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xF53F  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xF5D9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x013D  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xF5C9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xFAA9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x3723  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x5823  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xD771  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xD75B  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x8117  },
+{ 0x0F12, 0x0000  },
+
+// End TnP part
+
+//========================================================                      
+// CIs/APs/An setting        - 400LsB  sYsCLK 32MHz                             
+//========================================================                      
+// This regis are for FACTORY ONLY. If you change it without prior notification,
+// YOU are REsIBLE for the FAILURE that will happen in the future.              
+//========================================================                      
+
+
+{ 0x002A, 0x157A  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x1578  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x1576  },
+{ 0x0F12, 0x0020  },
+{ 0x002A, 0x1574  },
+{ 0x0F12, 0x0006  },
+{ 0x002A, 0x156E  },
+{ 0x0F12, 0x0001  },	// slope calibration tolerance in units of 1/256	
+{ 0x002A, 0x1568  },
+{ 0x0F12, 0x00FC  },
+                  
+// /ADC control    
+{ 0x002A, 0x155A  },
+{ 0x0F12, 0x01CC  },	//ADC sAT of 450mV for 10bit default in EVT1                         	
+{ 0x002A, 0x157E  },                                                                        
+{ 0x0F12, 0x0C80  },	// 3200 Max. Reset ramp DCLK counts (default 2048 0x800)             
+{ 0x0F12, 0x0578  },	// 1400 Max. Reset ramp DCLK counts for x3.5                         
+{ 0x002A, 0x157C  },                                                                        
+{ 0x0F12, 0x0190  },	// 400 Reset ramp for x1 in DCLK counts                              
+{ 0x002A, 0x1570  },                                                                        
+{ 0x0F12, 0x00A0  },	// 160 LsB                                                           
+{ 0x0F12, 0x0010  },	// reset threshold                                                   
+{ 0x002A, 0x12C4  },                                                                        
+{ 0x0F12, 0x006A  },	// 106 additional timing columns.                                    
+{ 0x002A, 0x12C8  },                                                                        
+{ 0x0F12, 0x08AC  },	// 2220 ADC columns in normal mode including Hold & Latch            
+{ 0x0F12, 0x0050  },	// 80 addition of ADC columns in Y-ave mode (default 244 0x74)
+                  
+{ 0x002A, 0x1696  },	// based on APs guidelines                        
+{ 0x0F12, 0x0000  },   // based on APs guidelines                        
+{ 0x0F12, 0x0000  },   // default. 1492 used for ADC dark characteristics
+{ 0x0F12, 0x00C6  },   // default. 1492 used for ADC dark characteristics
+{ 0x0F12, 0x00C6  },                                                  
+//{ 0x002A, 0x12B8  },   //disable CINTR 0                                 
+//{ 0x0F12, 0x0B00  },                                                     
+                                                                      
+{ 0x002A, 0x1690  },   // when set double sampling is activated - requires different set of pointers                                                 
+{ 0x0F12, 0x0001  },                                                     
+                                                                      
+{ 0x002A, 0x12B0  },   // comp and pixel bias control 0xF40E - default for EVT1                                                                      
+{ 0x0F12, 0x0055  },   // comp and pixel bias control 0xF40E for binning mode                                                                        
+{ 0x0F12, 0x005A  },                                                     
+                                                                      
+{ 0x002A, 0x337A  },   // [7] - is used for rest-only mode (EVT0 value is 0xD and HW 0x6)                                                            
+{ 0x0F12, 0x0006  },
+{ 0x0F12, 0x0068  },
+{ 0x002A, 0x169E  },
+{ 0x0F12, 0x0007  },
+{ 0x002A, 0x0BF6  },
+{ 0x0F12, 0x0000  },
+	                
+                    
+{ 0x002A, 0x327C  },
+{ 0x0F12, 0x1000  },
+{ 0x0F12, 0x6998  },
+{ 0x0F12, 0x0078  },
+{ 0x0F12, 0x04FE  },
+{ 0x0F12, 0x8800  },
+                    
+{ 0x002A, 0x3274  },
+{ 0x0F12, 0x0155  },	//set IO driving current 2mA for Gs500
+{ 0x0F12, 0x0155  },   //set IO driving current              
+{ 0x0F12, 0x1555  },   //set IO driving current              
+{ 0x0F12, 0x0555  },   //set IO driving current              
+                    
+                    
+{ 0x0028, 0x7000  },	
+{ 0x002A, 0x12D2  },	   
+{ 0x0F12, 0x0003  },	//senHal_pContSenModesRegsArray[0][0]2 700012D2     
+{ 0x0F12, 0x0003  },   //senHal_pContSenModesRegsArray[0][1]2 700012D4  
+{ 0x0F12, 0x0003  },   //senHal_pContSenModesRegsArray[0][2]2 700012D6  
+{ 0x0F12, 0x0003  },   //senHal_pContSenModesRegsArray[0][3]2 700012D8  
+{ 0x0F12, 0x0884  },   //senHal_pContSenModesRegsArray[1][0]2 700012DA  
+{ 0x0F12, 0x08CF  },   //senHal_pContSenModesRegsArray[1][1]2 700012DC  
+{ 0x0F12, 0x0500  },   //senHal_pContSenModesRegsArray[1][2]2 700012DE  
+{ 0x0F12, 0x054B  },   //senHal_pContSenModesRegsArray[1][3]2 700012E0  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][0]2 700012E2  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][1]2 700012E4  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][2]2 700012E6  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][3]2 700012E8  
+{ 0x0F12, 0x0885  },   //senHal_pContSenModesRegsArray[3][0]2 700012EA  
+{ 0x0F12, 0x0467  },   //senHal_pContSenModesRegsArray[3][1]2 700012EC  
+{ 0x0F12, 0x0501  },   //senHal_pContSenModesRegsArray[3][2]2 700012EE  
+{ 0x0F12, 0x02A5  },   //senHal_pContSenModesRegsArray[3][3]2 700012F0  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[4][0]2 700012F2  
+{ 0x0F12, 0x046A  },   //senHal_pContSenModesRegsArray[4][1]2 700012F4  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[4][2]2 700012F6  
+{ 0x0F12, 0x02A8  },   //senHal_pContSenModesRegsArray[4][3]2 700012F8  
+{ 0x0F12, 0x0885  },   //senHal_pContSenModesRegsArray[5][0]2 700012FA  
+{ 0x0F12, 0x08D0  },   //senHal_pContSenModesRegsArray[5][1]2 700012FC  
+{ 0x0F12, 0x0501  },   //senHal_pContSenModesRegsArray[5][2]2 700012FE  
+{ 0x0F12, 0x054C  },   //senHal_pContSenModesRegsArray[5][3]2 70001300  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[6][0]2 70001302  
+{ 0x0F12, 0x0020  },   //senHal_pContSenModesRegsArray[6][1]2 70001304  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[6][2]2 70001306  
+{ 0x0F12, 0x0020  },   //senHal_pContSenModesRegsArray[6][3]2 70001308  
+{ 0x0F12, 0x0881  },   //senHal_pContSenModesRegsArray[7][0]2 7000130A  
+{ 0x0F12, 0x0463  },   //senHal_pContSenModesRegsArray[7][1]2 7000130C  
+{ 0x0F12, 0x04FD  },   //senHal_pContSenModesRegsArray[7][2]2 7000130E  
+{ 0x0F12, 0x02A1  },   //senHal_pContSenModesRegsArray[7][3]2 70001310  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[8][0]2 70001312  
+{ 0x0F12, 0x0489  },   //senHal_pContSenModesRegsArray[8][1]2 70001314  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[8][2]2 70001316  
+{ 0x0F12, 0x02C7  },   //senHal_pContSenModesRegsArray[8][3]2 70001318  
+{ 0x0F12, 0x0881  },   //senHal_pContSenModesRegsArray[9][0]2 7000131A  
+{ 0x0F12, 0x08CC  },   //senHal_pContSenModesRegsArray[9][1]2 7000131C  
+{ 0x0F12, 0x04FD  },   //senHal_pContSenModesRegsArray[9][2]2 7000131E  
+{ 0x0F12, 0x0548  },   //senHal_pContSenModesRegsArray[9][3]2 70001320  
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[10][0] 2 70001322
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[10][1] 2 70001324
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[10][2] 2 70001326
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[10][3] 2 70001328
+{ 0x0F12, 0x03F2  },   //senHal_pContSenModesRegsArray[11][0] 2 7000132A
+{ 0x0F12, 0x0223  },   //senHal_pContSenModesRegsArray[11][1] 2 7000132C
+{ 0x0F12, 0x0230  },   //senHal_pContSenModesRegsArray[11][2] 2 7000132E
+{ 0x0F12, 0x0142  },   //senHal_pContSenModesRegsArray[11][3] 2 70001330
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[12][0] 2 70001332
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[12][1] 2 70001334
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[12][2] 2 70001336
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[12][3] 2 70001338
+{ 0x0F12, 0x03F2  },   //senHal_pContSenModesRegsArray[13][0] 2 7000133A
+{ 0x0F12, 0x068C  },   //senHal_pContSenModesRegsArray[13][1] 2 7000133C
+{ 0x0F12, 0x0230  },   //senHal_pContSenModesRegsArray[13][2] 2 7000133E
+{ 0x0F12, 0x03E9  },   //senHal_pContSenModesRegsArray[13][3] 2 70001340
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][0] 2 70001342
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][1] 2 70001344
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][2] 2 70001346
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][3] 2 70001348
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][0] 2 7000134A
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][1] 2 7000134C
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][2] 2 7000134E
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][3] 2 70001350
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[16][0] 2 70001352
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[16][1] 2 70001354
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[16][2] 2 70001356
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[16][3] 2 70001358
+{ 0x0F12, 0x020B  },   //senHal_pContSenModesRegsArray[17][0] 2 7000135A
+{ 0x0F12, 0x024A  },   //senHal_pContSenModesRegsArray[17][1] 2 7000135C
+{ 0x0F12, 0x012A  },   //senHal_pContSenModesRegsArray[17][2] 2 7000135E
+{ 0x0F12, 0x0169  },   //senHal_pContSenModesRegsArray[17][3] 2 70001360
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[18][0] 2 70001362
+{ 0x0F12, 0x046B  },   //senHal_pContSenModesRegsArray[18][1] 2 70001364
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[18][2] 2 70001366
+{ 0x0F12, 0x02A9  },   //senHal_pContSenModesRegsArray[18][3] 2 70001368
+{ 0x0F12, 0x0419  },   //senHal_pContSenModesRegsArray[19][0] 2 7000136A
+{ 0x0F12, 0x04A5  },   //senHal_pContSenModesRegsArray[19][1] 2 7000136C
+{ 0x0F12, 0x0257  },   //senHal_pContSenModesRegsArray[19][2] 2 7000136E
+{ 0x0F12, 0x02E3  },   //senHal_pContSenModesRegsArray[19][3] 2 70001370
+{ 0x0F12, 0x0630  },   //senHal_pContSenModesRegsArray[20][0] 2 70001372
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[20][1] 2 70001374
+{ 0x0F12, 0x038D  },   //senHal_pContSenModesRegsArray[20][2] 2 70001376
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[20][3] 2 70001378
+{ 0x0F12, 0x0668  },   //senHal_pContSenModesRegsArray[21][0] 2 7000137A
+{ 0x0F12, 0x06B3  },   //senHal_pContSenModesRegsArray[21][1] 2 7000137C
+{ 0x0F12, 0x03C5  },   //senHal_pContSenModesRegsArray[21][2] 2 7000137E
+{ 0x0F12, 0x0410  },   //senHal_pContSenModesRegsArray[21][3] 2 70001380
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][0] 2 70001382
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][1] 2 70001384
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][2] 2 70001386
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][3] 2 70001388
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[23][0] 2 7000138A
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[23][1] 2 7000138C
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[23][2] 2 7000138E
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[23][3] 2 70001390
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[24][0] 2 70001392
+{ 0x0F12, 0x0461  },   //senHal_pContSenModesRegsArray[24][1] 2 70001394
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[24][2] 2 70001396
+{ 0x0F12, 0x029F  },   //senHal_pContSenModesRegsArray[24][3] 2 70001398
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[25][0] 2 7000139A
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[25][1] 2 7000139C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[25][2] 2 7000139E
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[25][3] 2 700013A0
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][0] 2 700013A2
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][1] 2 700013A4
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][2] 2 700013A6
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][3] 2 700013A8
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[27][0] 2 700013AA
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[27][1] 2 700013AC
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[27][2] 2 700013AE
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[27][3] 2 700013B0
+{ 0x0F12, 0x020C  },   //senHal_pContSenModesRegsArray[28][0] 2 700013B2
+{ 0x0F12, 0x024B  },   //senHal_pContSenModesRegsArray[28][1] 2 700013B4
+{ 0x0F12, 0x012B  },   //senHal_pContSenModesRegsArray[28][2] 2 700013B6
+{ 0x0F12, 0x016A  },   //senHal_pContSenModesRegsArray[28][3] 2 700013B8
+{ 0x0F12, 0x039F  },   //senHal_pContSenModesRegsArray[29][0] 2 700013BA
+{ 0x0F12, 0x045E  },   //senHal_pContSenModesRegsArray[29][1] 2 700013BC
+{ 0x0F12, 0x01DD  },   //senHal_pContSenModesRegsArray[29][2] 2 700013BE
+{ 0x0F12, 0x029C  },   //senHal_pContSenModesRegsArray[29][3] 2 700013C0
+{ 0x0F12, 0x041A  },   //senHal_pContSenModesRegsArray[30][0] 2 700013C2
+{ 0x0F12, 0x04A6  },   //senHal_pContSenModesRegsArray[30][1] 2 700013C4
+{ 0x0F12, 0x0258  },   //senHal_pContSenModesRegsArray[30][2] 2 700013C6
+{ 0x0F12, 0x02E4  },   //senHal_pContSenModesRegsArray[30][3] 2 700013C8
+{ 0x0F12, 0x062D  },   //senHal_pContSenModesRegsArray[31][0] 2 700013CA
+{ 0x0F12, 0x0639  },   //senHal_pContSenModesRegsArray[31][1] 2 700013CC
+{ 0x0F12, 0x038A  },   //senHal_pContSenModesRegsArray[31][2] 2 700013CE
+{ 0x0F12, 0x0396  },   //senHal_pContSenModesRegsArray[31][3] 2 700013D0
+{ 0x0F12, 0x0669  },   //senHal_pContSenModesRegsArray[32][0] 2 700013D2
+{ 0x0F12, 0x06B4  },   //senHal_pContSenModesRegsArray[32][1] 2 700013D4
+{ 0x0F12, 0x03C6  },   //senHal_pContSenModesRegsArray[32][2] 2 700013D6
+{ 0x0F12, 0x0411  },   //senHal_pContSenModesRegsArray[32][3] 2 700013D8
+{ 0x0F12, 0x087C  },   //senHal_pContSenModesRegsArray[33][0] 2 700013DA
+{ 0x0F12, 0x08C7  },   //senHal_pContSenModesRegsArray[33][1] 2 700013DC
+{ 0x0F12, 0x04F8  },   //senHal_pContSenModesRegsArray[33][2] 2 700013DE
+{ 0x0F12, 0x0543  },   //senHal_pContSenModesRegsArray[33][3] 2 700013E0
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][0] 2 700013E2
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][1] 2 700013E4
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][2] 2 700013E6
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][3] 2 700013E8
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[35][0] 2 700013EA
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[35][1] 2 700013EC
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[35][2] 2 700013EE
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[35][3] 2 700013F0
+{ 0x0F12, 0x020F  },   //senHal_pContSenModesRegsArray[36][0] 2 700013F2
+{ 0x0F12, 0x024E  },   //senHal_pContSenModesRegsArray[36][1] 2 700013F4
+{ 0x0F12, 0x012E  },   //senHal_pContSenModesRegsArray[36][2] 2 700013F6
+{ 0x0F12, 0x016D  },   //senHal_pContSenModesRegsArray[36][3] 2 700013F8
+{ 0x0F12, 0x039F  },   //senHal_pContSenModesRegsArray[37][0] 2 700013FA
+{ 0x0F12, 0x045E  },   //senHal_pContSenModesRegsArray[37][1] 2 700013FC
+{ 0x0F12, 0x01DD  },   //senHal_pContSenModesRegsArray[37][2] 2 700013FE
+{ 0x0F12, 0x029C  },   //senHal_pContSenModesRegsArray[37][3] 2 70001400
+{ 0x0F12, 0x041D  },   //senHal_pContSenModesRegsArray[38][0] 2 70001402
+{ 0x0F12, 0x04A9  },   //senHal_pContSenModesRegsArray[38][1] 2 70001404
+{ 0x0F12, 0x025B  },   //senHal_pContSenModesRegsArray[38][2] 2 70001406
+{ 0x0F12, 0x02E7  },   //senHal_pContSenModesRegsArray[38][3] 2 70001408
+{ 0x0F12, 0x062D  },   //senHal_pContSenModesRegsArray[39][0] 2 7000140A
+{ 0x0F12, 0x0639  },   //senHal_pContSenModesRegsArray[39][1] 2 7000140C
+{ 0x0F12, 0x038A  },   //senHal_pContSenModesRegsArray[39][2] 2 7000140E
+{ 0x0F12, 0x0396  },   //senHal_pContSenModesRegsArray[39][3] 2 70001410
+{ 0x0F12, 0x066C  },   //senHal_pContSenModesRegsArray[40][0] 2 70001412
+{ 0x0F12, 0x06B7  },   //senHal_pContSenModesRegsArray[40][1] 2 70001414
+{ 0x0F12, 0x03C9  },   //senHal_pContSenModesRegsArray[40][2] 2 70001416
+{ 0x0F12, 0x0414  },   //senHal_pContSenModesRegsArray[40][3] 2 70001418
+{ 0x0F12, 0x087C  },   //senHal_pContSenModesRegsArray[41][0] 2 7000141A
+{ 0x0F12, 0x08C7  },   //senHal_pContSenModesRegsArray[41][1] 2 7000141C
+{ 0x0F12, 0x04F8  },   //senHal_pContSenModesRegsArray[41][2] 2 7000141E
+{ 0x0F12, 0x0543  },   //senHal_pContSenModesRegsArray[41][3] 2 70001420
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][0] 2 70001422
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][1] 2 70001424
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][2] 2 70001426
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][3] 2 70001428
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[43][0] 2 7000142A
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[43][1] 2 7000142C
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[43][2] 2 7000142E
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[43][3] 2 70001430
+{ 0x0F12, 0x020F  },   //senHal_pContSenModesRegsArray[44][0] 2 70001432
+{ 0x0F12, 0x024E  },   //senHal_pContSenModesRegsArray[44][1] 2 70001434
+{ 0x0F12, 0x012E  },   //senHal_pContSenModesRegsArray[44][2] 2 70001436
+{ 0x0F12, 0x016D  },   //senHal_pContSenModesRegsArray[44][3] 2 70001438
+{ 0x0F12, 0x039F  },   //senHal_pContSenModesRegsArray[45][0] 2 7000143A
+{ 0x0F12, 0x045E  },   //senHal_pContSenModesRegsArray[45][1] 2 7000143C
+{ 0x0F12, 0x01DD  },   //senHal_pContSenModesRegsArray[45][2] 2 7000143E
+{ 0x0F12, 0x029C  },   //senHal_pContSenModesRegsArray[45][3] 2 70001440
+{ 0x0F12, 0x041D  },   //senHal_pContSenModesRegsArray[46][0] 2 70001442
+{ 0x0F12, 0x04A9  },   //senHal_pContSenModesRegsArray[46][1] 2 70001444
+{ 0x0F12, 0x025B  },   //senHal_pContSenModesRegsArray[46][2] 2 70001446
+{ 0x0F12, 0x02E7  },   //senHal_pContSenModesRegsArray[46][3] 2 70001448
+{ 0x0F12, 0x062D  },   //senHal_pContSenModesRegsArray[47][0] 2 7000144A
+{ 0x0F12, 0x0639  },   //senHal_pContSenModesRegsArray[47][1] 2 7000144C
+{ 0x0F12, 0x038A  },   //senHal_pContSenModesRegsArray[47][2] 2 7000144E
+{ 0x0F12, 0x0396  },   //senHal_pContSenModesRegsArray[47][3] 2 70001450
+{ 0x0F12, 0x066C  },   //senHal_pContSenModesRegsArray[48][0] 2 70001452
+{ 0x0F12, 0x06B7  },   //senHal_pContSenModesRegsArray[48][1] 2 70001454
+{ 0x0F12, 0x03C9  },   //senHal_pContSenModesRegsArray[48][2] 2 70001456
+{ 0x0F12, 0x0414  },   //senHal_pContSenModesRegsArray[48][3] 2 70001458
+{ 0x0F12, 0x087C  },   //senHal_pContSenModesRegsArray[49][0] 2 7000145A
+{ 0x0F12, 0x08C7  },   //senHal_pContSenModesRegsArray[49][1] 2 7000145C
+{ 0x0F12, 0x04F8  },   //senHal_pContSenModesRegsArray[49][2] 2 7000145E
+{ 0x0F12, 0x0543  },   //senHal_pContSenModesRegsArray[49][3] 2 70001460
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][0] 2 70001462
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][1] 2 70001464
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][2] 2 70001466
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][3] 2 70001468
+{ 0x0F12, 0x01D2  },   //senHal_pContSenModesRegsArray[51][0] 2 7000146A
+{ 0x0F12, 0x01D2  },   //senHal_pContSenModesRegsArray[51][1] 2 7000146C
+{ 0x0F12, 0x00F1  },   //senHal_pContSenModesRegsArray[51][2] 2 7000146E
+{ 0x0F12, 0x00F1  },   //senHal_pContSenModesRegsArray[51][3] 2 70001470
+{ 0x0F12, 0x020C  },   //senHal_pContSenModesRegsArray[52][0] 2 70001472
+{ 0x0F12, 0x024B  },   //senHal_pContSenModesRegsArray[52][1] 2 70001474
+{ 0x0F12, 0x012B  },   //senHal_pContSenModesRegsArray[52][2] 2 70001476
+{ 0x0F12, 0x016A  },   //senHal_pContSenModesRegsArray[52][3] 2 70001478
+{ 0x0F12, 0x03A1  },   //senHal_pContSenModesRegsArray[53][0] 2 7000147A
+{ 0x0F12, 0x0460  },   //senHal_pContSenModesRegsArray[53][1] 2 7000147C
+{ 0x0F12, 0x01DF  },   //senHal_pContSenModesRegsArray[53][2] 2 7000147E
+{ 0x0F12, 0x029E  },   //senHal_pContSenModesRegsArray[53][3] 2 70001480
+{ 0x0F12, 0x041A  },   //senHal_pContSenModesRegsArray[54][0] 2 70001482
+{ 0x0F12, 0x04A6  },   //senHal_pContSenModesRegsArray[54][1] 2 70001484
+{ 0x0F12, 0x0258  },   //senHal_pContSenModesRegsArray[54][2] 2 70001486
+{ 0x0F12, 0x02E4  },   //senHal_pContSenModesRegsArray[54][3] 2 70001488
+{ 0x0F12, 0x062F  },   //senHal_pContSenModesRegsArray[55][0] 2 7000148A
+{ 0x0F12, 0x063B  },   //senHal_pContSenModesRegsArray[55][1] 2 7000148C
+{ 0x0F12, 0x038C  },   //senHal_pContSenModesRegsArray[55][2] 2 7000148E
+{ 0x0F12, 0x0398  },   //senHal_pContSenModesRegsArray[55][3] 2 70001490
+{ 0x0F12, 0x0669  },   //senHal_pContSenModesRegsArray[56][0] 2 70001492
+{ 0x0F12, 0x06B4  },   //senHal_pContSenModesRegsArray[56][1] 2 70001494
+{ 0x0F12, 0x03C6  },   //senHal_pContSenModesRegsArray[56][2] 2 70001496
+{ 0x0F12, 0x0411  },   //senHal_pContSenModesRegsArray[56][3] 2 70001498
+{ 0x0F12, 0x087E  },   //senHal_pContSenModesRegsArray[57][0] 2 7000149A
+{ 0x0F12, 0x08C9  },   //senHal_pContSenModesRegsArray[57][1] 2 7000149C
+{ 0x0F12, 0x04FA  },   //senHal_pContSenModesRegsArray[57][2] 2 7000149E
+{ 0x0F12, 0x0545  },   //senHal_pContSenModesRegsArray[57][3] 2 700014A0
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[58][0] 2 700014A2
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[58][1] 2 700014A4
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[58][2] 2 700014A6
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[58][3] 2 700014A8
+{ 0x0F12, 0x03AF  },   //senHal_pContSenModesRegsArray[59][0] 2 700014AA
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[59][1] 2 700014AC
+{ 0x0F12, 0x01ED  },   //senHal_pContSenModesRegsArray[59][2] 2 700014AE
+{ 0x0F12, 0x00FF  },   //senHal_pContSenModesRegsArray[59][3] 2 700014B0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[60][0] 2 700014B2
+{ 0x0F12, 0x0461  },   //senHal_pContSenModesRegsArray[60][1] 2 700014B4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[60][2] 2 700014B6
+{ 0x0F12, 0x029F  },   //senHal_pContSenModesRegsArray[60][3] 2 700014B8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[61][0] 2 700014BA
+{ 0x0F12, 0x046E  },   //senHal_pContSenModesRegsArray[61][1] 2 700014BC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[61][2] 2 700014BE
+{ 0x0F12, 0x02AC  },   //senHal_pContSenModesRegsArray[61][3] 2 700014C0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[62][0] 2 700014C2
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[62][1] 2 700014C4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[62][2] 2 700014C6
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[62][3] 2 700014C8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[63][0] 2 700014CA
+{ 0x0F12, 0x0649  },   //senHal_pContSenModesRegsArray[63][1] 2 700014CC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[63][2] 2 700014CE
+{ 0x0F12, 0x03A6  },   //senHal_pContSenModesRegsArray[63][3] 2 700014D0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][0] 2 700014D2
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][1] 2 700014D4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][2] 2 700014D6
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][3] 2 700014D8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][0] 2 700014DA
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][1] 2 700014DC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][2] 2 700014DE
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][3] 2 700014E0
+{ 0x0F12, 0x03AA  },   //senHal_pContSenModesRegsArray[66][0] 2 700014E2
+{ 0x0F12, 0x01DB  },   //senHal_pContSenModesRegsArray[66][1] 2 700014E4
+{ 0x0F12, 0x01E8  },   //senHal_pContSenModesRegsArray[66][2] 2 700014E6
+{ 0x0F12, 0x00FA  },   //senHal_pContSenModesRegsArray[66][3] 2 700014E8
+{ 0x0F12, 0x03B7  },   //senHal_pContSenModesRegsArray[67][0] 2 700014EA
+{ 0x0F12, 0x01E8  },   //senHal_pContSenModesRegsArray[67][1] 2 700014EC
+{ 0x0F12, 0x01F5  },   //senHal_pContSenModesRegsArray[67][2] 2 700014EE
+{ 0x0F12, 0x0107  },   //senHal_pContSenModesRegsArray[67][3] 2 700014F0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[68][0] 2 700014F2
+{ 0x0F12, 0x0469  },   //senHal_pContSenModesRegsArray[68][1] 2 700014F4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[68][2] 2 700014F6
+{ 0x0F12, 0x02A7  },   //senHal_pContSenModesRegsArray[68][3] 2 700014F8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[69][0] 2 700014FA
+{ 0x0F12, 0x0476  },   //senHal_pContSenModesRegsArray[69][1] 2 700014FC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[69][2] 2 700014FE
+{ 0x0F12, 0x02B4  },   //senHal_pContSenModesRegsArray[69][3] 2 70001500
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[70][0] 2 70001502
+{ 0x0F12, 0x0644  },   //senHal_pContSenModesRegsArray[70][1] 2 70001504
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[70][2] 2 70001506
+{ 0x0F12, 0x03A1  },   //senHal_pContSenModesRegsArray[70][3] 2 70001508
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[71][0] 2 7000150A
+{ 0x0F12, 0x0651  },   //senHal_pContSenModesRegsArray[71][1] 2 7000150C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[71][2] 2 7000150E
+{ 0x0F12, 0x03AE  },   //senHal_pContSenModesRegsArray[71][3] 2 70001510
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][0] 2 70001512
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][1] 2 70001514
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][2] 2 70001516
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][3] 2 70001518
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][0] 2 7000151A
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][1] 2 7000151C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][2] 2 7000151E
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][3] 2 70001520
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][0] 2 70001522
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][1] 2 70001524
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][2] 2 70001526
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][3] 2 70001528
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][0] 2 7000152A
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][1] 2 7000152C
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][2] 2 7000152E
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][3] 2 70001530
+{ 0x0F12, 0x05AD  },   //senHal_pContSenModesRegsArray[76][0] 2 70001532
+{ 0x0F12, 0x03DE  },   //senHal_pContSenModesRegsArray[76][1] 2 70001534
+{ 0x0F12, 0x030A  },   //senHal_pContSenModesRegsArray[76][2] 2 70001536
+{ 0x0F12, 0x021C  },   //senHal_pContSenModesRegsArray[76][3] 2 70001538
+{ 0x0F12, 0x062F  },   //senHal_pContSenModesRegsArray[77][0] 2 7000153A
+{ 0x0F12, 0x0460  },   //senHal_pContSenModesRegsArray[77][1] 2 7000153C
+{ 0x0F12, 0x038C  },   //senHal_pContSenModesRegsArray[77][2] 2 7000153E
+{ 0x0F12, 0x029E  },   //senHal_pContSenModesRegsArray[77][3] 2 70001540
+{ 0x0F12, 0x07FC  },   //senHal_pContSenModesRegsArray[78][0] 2 70001542
+{ 0x0F12, 0x0847  },   //senHal_pContSenModesRegsArray[78][1] 2 70001544
+{ 0x0F12, 0x0478  },   //senHal_pContSenModesRegsArray[78][2] 2 70001546
+{ 0x0F12, 0x04C3  },   //senHal_pContSenModesRegsArray[78][3] 2 70001548
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][0] 2 7000154A
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][1] 2 7000154C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][2] 2 7000154E
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][3] 2 70001550
+                      
+                    
+//============================================================ 
+// AF Interface setting
+//==============  ============================================== 
+{ 0x002A, 0x01D4  },
+{ 0x0F12, 0x0000  }, //REG_TC_IPRM_AuxGpios : 0 - no Flash
+{ 0x002A, 0x01DE  },
+{ 0x0F12, 0x0003  }, //REG_TC_IPRM_CM_Init_AfModeType : 3 - AFD_VCM_I2C
+{ 0x0F12, 0x0000  }, //REG_TC_IPRM_CM_Init_PwmConfig1 : 0 - no PWM
+{ 0x002A, 0x01E4  },
+{ 0x0F12, 0x0041  }, //REG_TC_IPRM_CM_Init_GpioConfig1 : 4 -  GPIO4 
+{ 0x002A, 0x01E8  },
+{ 0x0F12, 0x2A0C  }, //REG_TC_IPRM_CM_Init_Mi2cBits : MSCL - GPIO1 MSDA - GPIO2 Device ID (0C)
+{ 0x0F12, 0x0190  }, //REG_TC_IPRM_CM_Init_Mi2cRateKhz : MI2C Speed - 400KHz
+
+//============================================================ 
+// AF Parameter setting
+//============================================================ 
+// AF Window Settings
+{ 0x002A, 0x025A  },
+{ 0x0F12, 0x0100  }, //#REG_TC_AF_FstWinStartX
+{ 0x0F12, 0x00E3  }, //#REG_TC_AF_FstWinStartY
+{ 0x0F12, 0x0200  }, //#REG_TC_AF_FstWinSizeX
+{ 0x0F12, 0x0238  }, //#REG_TC_AF_FstWinSizeY
+{ 0x0F12, 0x01C6  }, //#REG_TC_AF_ScndWinStartX
+{ 0x0F12, 0x0166  }, //#REG_TC_AF_ScndWinStartY
+{ 0x0F12, 0x0074  }, //#REG_TC_AF_ScndWinSizeX
+{ 0x0F12, 0x0132  }, //#REG_TC_AF_ScndWinSizeY
+{ 0x0F12, 0x0001  }, //#REG_TC_AF_WinSizesUpdated
+
+// AF Setot Settings 
+{ 0x002A, 0x0586  },
+{ 0x0F12, 0x00FF  }, //#skl_af_StatOvlpExpFactor
+
+// AF Scene Settings 
+{ 0x002A, 0x115E  },
+{ 0x0F12, 0x0003  }, //#af_scene_usSaturatedScene
+
+// AF Fine Search Settings 
+{ 0x002A, 0x10D4  },
+{ 0x0F12, 0x1002  }, //FineSearch Disable //af_search_usSingleAfFlags 1000 : 2nd searh off, 1002 : 2nd search on
+{ 0x002A, 0x10DE  },
+{ 0x0F12, 0x0004  }, //#af_search_usFinePeakCount
+{ 0x002A, 0x106C  },
+{ 0x0F12, 0x0802  }, //#af_pos_usFineStepNumSize
+                  
+// / AF Peak Thre  shold Setting
+{ 0x002A, 0x10CA  }, //#af_search_usPeakThr
+{ 0x0F12, 0x00CC  }, 
+
+// AF Default Position 
+{ 0x002A, 0x1060  },
+{ 0x0F12, 0x0000  }, //#af_pos_usHomePos
+{ 0x0F12, 0xB020  }, //#af_pos_usLowConfPos
+
+// AF LowConfThr Setting
+{ 0x002A, 0x10F4  }, //LowEdgeBoth GRAD
+{ 0x0F12, 0x0280  }, 
+{ 0x002A, 0x1100  }, //LowLight HPF
+{ 0x0F12, 0x03A0  },  
+{ 0x0F12, 0x0320  }, 
+
+{ 0x002A, 0x1134  },
+{ 0x0F12, 0x0030  },//af_stat_usMinStatVal
+
+// AF low Br Th
+{ 0x002A, 0x1154  }, // normBrThr
+{ 0x0F12, 0x0060  },
+
+// AF Policy
+{ 0x002A, 0x10E2  },
+{ 0x0F12, 0x0000  }, //#af_search_usCapturePolicy: Focus_Priority, 0002 : Shutter_Priority_Fixed, 0001 : Shutter_Priority_Last_BFP 0000: Shutter_Priority_Current
+{ 0x002A, 0x1072  },
+{ 0x0F12, 0x003C  }, //#af_pos_usCaptureFixedPo// 0x0008
+
+// AF Lens Position Table Settings 
+{ 0x002A, 0x1074  },
+{ 0x0F12, 0x0010  }, //#af_pos_usTableLastInd // 0~16 17 Steps 100729
+
+{ 0x0F12, 0x0024  }, //#af_pos_usTable_0_  145/4 = 36  // af_pos_usTable
+{ 0x0F12, 0x002D  }, //#af_pos_usTable_1_  180/4 = 45                   
+{ 0x0F12, 0x0036  }, //#af_pos_usTable_2_  215/4 = 54                   
+{ 0x0F12, 0x003E  }, //#af_pos_usTable_3_  250/4 = 62                   
+{ 0x0F12, 0x0047  }, //#af_pos_usTable_4_  285/4 = 71
+{ 0x0F12, 0x0050  }, //#af_pos_usTable_5_  320/4 = 80                   
+{ 0x0F12, 0x0059  }, //#af_pos_usTable_6_  355/4 = 89                   
+{ 0x0F12, 0x0061  }, //#af_pos_usTable_7_  390/4 = 97                   
+{ 0x0F12, 0x006A  }, //#af_pos_usTable_8_  425/4 = 106                  
+{ 0x0F12, 0x0073  }, //#af_pos_usTable_9_  460/4 = 115                  
+{ 0x0F12, 0x007C  }, //#af_pos_usTable_10_ 495/4 = 124                  
+{ 0x0F12, 0x0084  }, //#af_pos_usTable_11_ 530/4 = 132                  
+{ 0x0F12, 0x008D  }, //#af_pos_usTable_12_ 565/4 = 141                  
+{ 0x0F12, 0x0096  }, //#af_pos_usTable_13_ 600/4 = 150                  
+{ 0x0F12, 0x009F  }, //#af_pos_usTable_14_ 635/4 = 159                  
+{ 0x0F12, 0x00A7  }, //#af_pos_usTable_15_ 670/4 = 167                  
+{ 0x0F12, 0x00B0  }, //#af_pos_usTable_16_ 705/4 = 176                  
+
+//VCM AF driver with PWM/I2C 
+{ 0x002A, 0x1198  },
+{ 0x0F12, 0x8000  }, //#afd_usParam[0]  I2C power down command
+{ 0x0F12, 0x0006  }, //#afd_usParam[1]  Position Right Shift 
+{ 0x0F12, 0x3FF0  }, //#afd_usParam[2]  I2C Data Mask
+{ 0x0F12, 0x03E8  }, //#afd_usParam[3]  PWM Period
+{ 0x0F12, 0x0000  }, //#afd_usParam[4]  PWM Divider
+{ 0x0F12, 0x0064  }, //#afd_usParam[5]  SlowMotion Delay (unit: 0.1ms)  4. reduce lens collision noise.
+{ 0x0F12, 0x0009  }, //#afd_usParam[6]  SlowMotion Threshold
+{ 0x0F12, 0x000A  }, //#afd_usParam[7]  Signal Shaping
+{ 0x0F12, 0x0080  }, //#afd_usParam[8]  Signal Shaping level 
+{ 0x0F12, 0x00C0  }, //#afd_usParam[9]  Signal Shaping level
+{ 0x0F12, 0x0000  }, //#afd_usParam[10] Signal Shaping level
+{ 0x0F12, 0x0000  }, //#afd_usParam[11] Signal Shaping level               
+
+
+{ 0x002A, 0x0252  },
+{ 0x0F12, 0x0003  }, //init 
+                  
+{ 0x002A, 0x12B8  },   //disable CINTR 0                                 
+{ 0x0F12, 0x1000  },        
+
+//============================================================
+// ISP-FE Setting
+//============================================================                    
+{ 0x002A, 0x158A  },   
+{ 0x0F12, 0xEAF0  },   
+{ 0x002A, 0x15C6  },   
+{ 0x0F12, 0x0020  },   
+{ 0x0F12, 0x0060  },   
+{ 0x002A, 0x15BC  },   
+{ 0x0F12, 0x0200  },   
+                       
+{ 0x002A, 0x1608  },   
+{ 0x0F12, 0x0100  },   
+{ 0x0F12, 0x0100  },   
+{ 0x0F12, 0x0100  },   
+{ 0x0F12, 0x0100  },   
+                       
+{ 0x002A, 0x0F70  },   
+{ 0x0F12, 0x0040  },	 //36 //TVAR_ae_BrAve  //ae Target//
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0x3415  },   //3A98 //3A98////lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0x682A  },   //68b0 //7EF4////lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0x8235  },   //8340 //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },    //F424//MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0x3415  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0x682A  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0x8235  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+// /Shutter tunpo  int//        //gain * 256 = value//
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x01B3  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x02A0  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710  },   //MaxAnGain4 //                                             
+// /Shutter tunen  d//
+                  
+{ 0x002A, 0x0544  },                                                               
+{ 0x0F12, 0x0100  },   	                                                    
+{ 0x0F12, 0x8000  },   //Max Gain 8 //                                             
+                  
+                  
+{ 0x002A, 0x1694  },                                                               
+{ 0x0F12, 0x0001  },   //expand forbidde zone //                                   
+                  
+{ 0x002A, 0x021A  },                                                               
+{ 0x0F12, 0x0000  },  //MBR off// 	                                                    
+                  
+                  
+//==============================================//
+//AFC                                          //
+//==============================================//
+{ 0x002A, 0x04d2  },
+{ 0x0F12, 0x065f  },     //065f : Manual AFC on   067f : Manual AFC off //
+{ 0x002A, 0x04ba  },     
+{ 0x0F12, 0x0002  },     // 0002: 60hz  0001 : 50hz //
+{ 0x0F12, 0x0001  },     // afc update command //
+                          
+                    
+                    
+{ 0x002A, 0x06CE  },   
+{ 0x0F12, 0x0100  },	//TVAR_ash_GAsalpha[0] // 	   
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[1] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[2] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[3] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[4] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[5] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[6] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[7] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[8] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[9] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[10] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[11] //
+{ 0x0F12, 0x00e0  },   //TVAR_ash_GAsalpha[12] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[13] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[14] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[15] //
+{ 0x0F12, 0x00e8  },   //TVAR_ash_GAsalpha[16] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[17] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[18] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[19] //
+{ 0x0F12, 0x00f0  },   //TVAR_ash_GAsalpha[20] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[21] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[22] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[23] //
+{ 0x0F12, 0x00f0  },   //TVAR_ash_GAsalpha[24] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[25] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[26] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[27] //
+                       
+{ 0x0F12, 0x00f8  },	//TVAR_ash_GAS OutdoorAlpha[0] //   
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAS OutdoorAlpha[1] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAS OutdoorAlpha[2] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAS OutdoorAlpha[3] //
+                       
+                       
+{ 0x0F12, 0x0036  },	//ash_GASBeta[0] // 	   
+{ 0x0F12, 0x001F  },	//ash_GASBeta[1] //    
+{ 0x0F12, 0x0020  },   //ash_GASBeta[2] // 
+{ 0x0F12, 0x0000  },   //ash_GASBeta[3] // 
+{ 0x0F12, 0x0036  },   //ash_GASBeta[4] // 
+{ 0x0F12, 0x001F  },   //ash_GASBeta[5] // 
+{ 0x0F12, 0x0020  },   //ash_GASBeta[6] // 
+{ 0x0F12, 0x0000  },   //ash_GASBeta[7] // 
+{ 0x0F12, 0x0036  },   //ash_GASBeta[8] // 
+{ 0x0F12, 0x001F  },   //ash_GASBeta[9] // 
+{ 0x0F12, 0x0020  },   //ash_GASBeta[10] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[11] //
+{ 0x0F12, 0x0010  },   //ash_GASBeta[12] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[13] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[14] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[15] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[16] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[17] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[18] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[19] //
+{ 0x0F12, 0x0036  },   //ash_GASBeta[20] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[21] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[22] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[23] //
+{ 0x0F12, 0x0036  },   //ash_GASBeta[24] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[25] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[26] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[27] //
+                       
+{ 0x0F12, 0x0036  },	//ash_GAS OutdoorBeta[0] //   
+{ 0x0F12, 0x001F  },   //ash_GAS OutdoorBeta[1] //
+{ 0x0F12, 0x0020  },   //ash_GAS OutdoorBeta[2] //
+{ 0x0F12, 0x0000  },   //ash_GAS OutdoorBeta[3] //
+                       
+{ 0x002A, 0x075A  },	//ash_bParabolicEstimation//   
+{ 0x0F12, 0x0000  },   //ash_uParabolicCenterX   //
+{ 0x0F12, 0x0400  },   //ash_uParabolicCenterY   //
+{ 0x0F12, 0x0300  },   //ash_uParabolicscalingA  //
+{ 0x0F12, 0x0010  },   //ash_uParabolicscalingB  //
+{ 0x0F12, 0x0011  },   
+                       
+{ 0x002A, 0x347C  },   
+{ 0x0F12, 0x01EE  },	//TVAR_ash_pGAS[0] //     
+{ 0x0F12, 0x01A9  },   //TVAR_ash_pGAS[1] //  
+{ 0x0F12, 0x016A  },   //TVAR_ash_pGAS[2] //  
+{ 0x0F12, 0x0136  },   //TVAR_ash_pGAS[3] //  
+{ 0x0F12, 0x0111  },   //TVAR_ash_pGAS[4] //  
+{ 0x0F12, 0x00F6  },   //TVAR_ash_pGAS[5] //  
+{ 0x0F12, 0x00EB  },   //TVAR_ash_pGAS[6] //  
+{ 0x0F12, 0x00F7  },   //TVAR_ash_pGAS[7] //  
+{ 0x0F12, 0x0111  },   //TVAR_ash_pGAS[8] //  
+{ 0x0F12, 0x013B  },   //TVAR_ash_pGAS[9] //  
+{ 0x0F12, 0x0174  },   //TVAR_ash_pGAS[10] // 
+{ 0x0F12, 0x01BC  },   //TVAR_ash_pGAS[11] // 
+{ 0x0F12, 0x0204  },   //TVAR_ash_pGAS[12] // 
+{ 0x0F12, 0x01BA  },   //TVAR_ash_pGAS[13] // 
+{ 0x0F12, 0x0175  },   //TVAR_ash_pGAS[14] // 
+{ 0x0F12, 0x012C  },   //TVAR_ash_pGAS[15] // 
+{ 0x0F12, 0x00F1  },   //TVAR_ash_pGAS[16] // 
+{ 0x0F12, 0x00C5  },   //TVAR_ash_pGAS[17] // 
+{ 0x0F12, 0x00AA  },   //TVAR_ash_pGAS[18] // 
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[19] // 
+{ 0x0F12, 0x00AA  },   //TVAR_ash_pGAS[20] // 
+{ 0x0F12, 0x00C8  },   //TVAR_ash_pGAS[21] // 
+{ 0x0F12, 0x00FA  },   //TVAR_ash_pGAS[22] // 
+{ 0x0F12, 0x013D  },   //TVAR_ash_pGAS[23] // 
+{ 0x0F12, 0x0187  },   //TVAR_ash_pGAS[24] // 
+{ 0x0F12, 0x01DC  },   //TVAR_ash_pGAS[25] // 
+{ 0x0F12, 0x0184  },   //TVAR_ash_pGAS[26] // 
+{ 0x0F12, 0x0139  },   //TVAR_ash_pGAS[27] // 
+{ 0x0F12, 0x00EB  },   //TVAR_ash_pGAS[28] // 
+{ 0x0F12, 0x00A8  },   //TVAR_ash_pGAS[29] // 
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[30] // 
+{ 0x0F12, 0x005E  },   //TVAR_ash_pGAS[31] // 
+{ 0x0F12, 0x0055  },   //TVAR_ash_pGAS[32] // 
+{ 0x0F12, 0x0060  },   //TVAR_ash_pGAS[33] // 
+{ 0x0F12, 0x0080  },   //TVAR_ash_pGAS[34] // 
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[35] // 
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[36] // 
+{ 0x0F12, 0x0156  },   //TVAR_ash_pGAS[37] // 
+{ 0x0F12, 0x01A8  },   //TVAR_ash_pGAS[38] // 
+{ 0x0F12, 0x015B  },   //TVAR_ash_pGAS[39] // 
+{ 0x0F12, 0x010E  },   //TVAR_ash_pGAS[40] // 
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[41] // 
+{ 0x0F12, 0x0075  },   //TVAR_ash_pGAS[42] // 
+{ 0x0F12, 0x0045  },   //TVAR_ash_pGAS[43] // 
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[44] // 
+{ 0x0F12, 0x0023  },   //TVAR_ash_pGAS[45] // 
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[46] // 
+{ 0x0F12, 0x004C  },   //TVAR_ash_pGAS[47] // 
+{ 0x0F12, 0x0086  },   //TVAR_ash_pGAS[48] // 
+{ 0x0F12, 0x00D3  },   //TVAR_ash_pGAS[49] // 
+{ 0x0F12, 0x0130  },   //TVAR_ash_pGAS[50] // 
+{ 0x0F12, 0x0188  },   //TVAR_ash_pGAS[51] // 
+{ 0x0F12, 0x0140  },   //TVAR_ash_pGAS[52] // 
+{ 0x0F12, 0x00F2  },   //TVAR_ash_pGAS[53] // 
+{ 0x0F12, 0x009E  },   //TVAR_ash_pGAS[54] // 
+{ 0x0F12, 0x0056  },   //TVAR_ash_pGAS[55] // 
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[56] // 
+{ 0x0F12, 0x0013  },   //TVAR_ash_pGAS[57] // 
+{ 0x0F12, 0x000A  },   //TVAR_ash_pGAS[58] // 
+{ 0x0F12, 0x0013  },   //TVAR_ash_pGAS[59] // 
+{ 0x0F12, 0x0030  },   //TVAR_ash_pGAS[60] // 
+{ 0x0F12, 0x006B  },   //TVAR_ash_pGAS[61] // 
+{ 0x0F12, 0x00BA  },   //TVAR_ash_pGAS[62] // 
+{ 0x0F12, 0x0117  },   //TVAR_ash_pGAS[63] // 
+{ 0x0F12, 0x0176  },   //TVAR_ash_pGAS[64] // 
+{ 0x0F12, 0x012F  },   //TVAR_ash_pGAS[65] // 
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[66] // 
+{ 0x0F12, 0x0090  },   //TVAR_ash_pGAS[67] // 
+{ 0x0F12, 0x004D  },   //TVAR_ash_pGAS[68] // 
+{ 0x0F12, 0x0020  },   //TVAR_ash_pGAS[69] // 
+{ 0x0F12, 0x0009  },   //TVAR_ash_pGAS[70] // 
+{ 0x0F12, 0x0000  },   //TVAR_ash_pGAS[71] // 
+{ 0x0F12, 0x000D  },   //TVAR_ash_pGAS[72] // 
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[73] // 
+{ 0x0F12, 0x0062  },   //TVAR_ash_pGAS[74] // 
+{ 0x0F12, 0x00B3  },   //TVAR_ash_pGAS[75] // 
+{ 0x0F12, 0x0114  },   //TVAR_ash_pGAS[76] // 
+{ 0x0F12, 0x0172  },   //TVAR_ash_pGAS[77] // 
+{ 0x0F12, 0x0137  },   //TVAR_ash_pGAS[78] // 
+{ 0x0F12, 0x00E9  },   //TVAR_ash_pGAS[79] // 
+{ 0x0F12, 0x0098  },   //TVAR_ash_pGAS[80] // 
+{ 0x0F12, 0x0054  },   //TVAR_ash_pGAS[81] // 
+{ 0x0F12, 0x002A  },   //TVAR_ash_pGAS[82] // 
+{ 0x0F12, 0x0012  },   //TVAR_ash_pGAS[83] // 
+{ 0x0F12, 0x0009  },   //TVAR_ash_pGAS[84] // 
+{ 0x0F12, 0x0017  },   //TVAR_ash_pGAS[85] // 
+{ 0x0F12, 0x0034  },   //TVAR_ash_pGAS[86] // 
+{ 0x0F12, 0x006D  },   //TVAR_ash_pGAS[87] // 
+{ 0x0F12, 0x00BF  },   //TVAR_ash_pGAS[88] // 
+{ 0x0F12, 0x011C  },   //TVAR_ash_pGAS[89] // 
+{ 0x0F12, 0x0179  },   //TVAR_ash_pGAS[90] // 
+{ 0x0F12, 0x0152  },   //TVAR_ash_pGAS[91] // 
+{ 0x0F12, 0x0106  },   //TVAR_ash_pGAS[92] // 
+{ 0x0F12, 0x00B6  },   //TVAR_ash_pGAS[93] // 
+{ 0x0F12, 0x0070  },   //TVAR_ash_pGAS[94] // 
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[95] // 
+{ 0x0F12, 0x002D  },   //TVAR_ash_pGAS[96] // 
+{ 0x0F12, 0x0024  },   //TVAR_ash_pGAS[97] // 
+{ 0x0F12, 0x0032  },   //TVAR_ash_pGAS[98] // 
+{ 0x0F12, 0x0051  },   //TVAR_ash_pGAS[99] // 
+{ 0x0F12, 0x008A  },   //TVAR_ash_pGAS[100] //
+{ 0x0F12, 0x00DB  },   //TVAR_ash_pGAS[101] //
+{ 0x0F12, 0x0139  },   //TVAR_ash_pGAS[102] //
+{ 0x0F12, 0x0191  },   //TVAR_ash_pGAS[103] //
+{ 0x0F12, 0x0174  },   //TVAR_ash_pGAS[104] //
+{ 0x0F12, 0x012B  },   //TVAR_ash_pGAS[105] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[106] //
+{ 0x0F12, 0x009D  },   //TVAR_ash_pGAS[107] //
+{ 0x0F12, 0x006E  },   //TVAR_ash_pGAS[108] //
+{ 0x0F12, 0x0055  },   //TVAR_ash_pGAS[109] //
+{ 0x0F12, 0x0050  },   //TVAR_ash_pGAS[110] //
+{ 0x0F12, 0x005C  },   //TVAR_ash_pGAS[111] //
+{ 0x0F12, 0x007B  },   //TVAR_ash_pGAS[112] //
+{ 0x0F12, 0x00B7  },   //TVAR_ash_pGAS[113] //
+{ 0x0F12, 0x0109  },   //TVAR_ash_pGAS[114] //
+{ 0x0F12, 0x015E  },   //TVAR_ash_pGAS[115] //
+{ 0x0F12, 0x01B0  },   //TVAR_ash_pGAS[116] //
+{ 0x0F12, 0x01A9  },   //TVAR_ash_pGAS[117] //
+{ 0x0F12, 0x0160  },   //TVAR_ash_pGAS[118] //
+{ 0x0F12, 0x011A  },   //TVAR_ash_pGAS[119] //
+{ 0x0F12, 0x00DE  },   //TVAR_ash_pGAS[120] //
+{ 0x0F12, 0x00B1  },   //TVAR_ash_pGAS[121] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[122] //
+{ 0x0F12, 0x0093  },   //TVAR_ash_pGAS[123] //
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[124] //
+{ 0x0F12, 0x00C3  },   //TVAR_ash_pGAS[125] //
+{ 0x0F12, 0x00FA  },   //TVAR_ash_pGAS[126] //
+{ 0x0F12, 0x0143  },   //TVAR_ash_pGAS[127] //
+{ 0x0F12, 0x0190  },   //TVAR_ash_pGAS[128] //
+{ 0x0F12, 0x01E4  },   //TVAR_ash_pGAS[129] //
+{ 0x0F12, 0x01D5  },   //TVAR_ash_pGAS[130] //
+{ 0x0F12, 0x0194  },   //TVAR_ash_pGAS[131] //
+{ 0x0F12, 0x014E  },   //TVAR_ash_pGAS[132] //
+{ 0x0F12, 0x011F  },   //TVAR_ash_pGAS[133] //
+{ 0x0F12, 0x00F9  },   //TVAR_ash_pGAS[134] //
+{ 0x0F12, 0x00E1  },   //TVAR_ash_pGAS[135] //
+{ 0x0F12, 0x00DA  },   //TVAR_ash_pGAS[136] //
+{ 0x0F12, 0x00E8  },   //TVAR_ash_pGAS[137] //
+{ 0x0F12, 0x010A  },   //TVAR_ash_pGAS[138] //
+{ 0x0F12, 0x0139  },   //TVAR_ash_pGAS[139] //
+{ 0x0F12, 0x017B  },   //TVAR_ash_pGAS[140] //
+{ 0x0F12, 0x01C5  },   //TVAR_ash_pGAS[141] //
+{ 0x0F12, 0x0205  },   //TVAR_ash_pGAS[142] //
+{ 0x0F12, 0x01A2  },   //TVAR_ash_pGAS[143] //
+{ 0x0F12, 0x015F  },   //TVAR_ash_pGAS[144] //
+{ 0x0F12, 0x0126  },   //TVAR_ash_pGAS[145] //
+{ 0x0F12, 0x00F9  },   //TVAR_ash_pGAS[146] //
+{ 0x0F12, 0x00D7  },   //TVAR_ash_pGAS[147] //
+{ 0x0F12, 0x00BF  },   //TVAR_ash_pGAS[148] //
+{ 0x0F12, 0x00B6  },   //TVAR_ash_pGAS[149] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[150] //
+{ 0x0F12, 0x00D2  },   //TVAR_ash_pGAS[151] //
+{ 0x0F12, 0x00F3  },   //TVAR_ash_pGAS[152] //
+{ 0x0F12, 0x011D  },   //TVAR_ash_pGAS[153] //
+{ 0x0F12, 0x015A  },   //TVAR_ash_pGAS[154] //
+{ 0x0F12, 0x019E  },   //TVAR_ash_pGAS[155] //
+{ 0x0F12, 0x0171  },   //TVAR_ash_pGAS[156] //
+{ 0x0F12, 0x012E  },   //TVAR_ash_pGAS[157] //
+{ 0x0F12, 0x00F1  },   //TVAR_ash_pGAS[158] //
+{ 0x0F12, 0x00BF  },   //TVAR_ash_pGAS[159] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[160] //
+{ 0x0F12, 0x0081  },   //TVAR_ash_pGAS[161] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[162] //
+{ 0x0F12, 0x0080  },   //TVAR_ash_pGAS[163] //
+{ 0x0F12, 0x0097  },   //TVAR_ash_pGAS[164] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[165] //
+{ 0x0F12, 0x00EE  },   //TVAR_ash_pGAS[166] //
+{ 0x0F12, 0x012B  },   //TVAR_ash_pGAS[167] //
+{ 0x0F12, 0x0177  },   //TVAR_ash_pGAS[168] //
+{ 0x0F12, 0x0144  },   //TVAR_ash_pGAS[169] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_pGAS[170] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[171] //
+{ 0x0F12, 0x0088  },   //TVAR_ash_pGAS[172] //
+{ 0x0F12, 0x005F  },   //TVAR_ash_pGAS[173] //
+{ 0x0F12, 0x0049  },   //TVAR_ash_pGAS[174] //
+{ 0x0F12, 0x0041  },   //TVAR_ash_pGAS[175] //
+{ 0x0F12, 0x0049  },   //TVAR_ash_pGAS[176] //
+{ 0x0F12, 0x0061  },   //TVAR_ash_pGAS[177] //
+{ 0x0F12, 0x0089  },   //TVAR_ash_pGAS[178] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[179] //
+{ 0x0F12, 0x0104  },   //TVAR_ash_pGAS[180] //
+{ 0x0F12, 0x014D  },   //TVAR_ash_pGAS[181] //
+{ 0x0F12, 0x0122  },   //TVAR_ash_pGAS[182] //
+{ 0x0F12, 0x00DD  },   //TVAR_ash_pGAS[183] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[184] //
+{ 0x0F12, 0x005F  },   //TVAR_ash_pGAS[185] //
+{ 0x0F12, 0x0036  },   //TVAR_ash_pGAS[186] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[187] //
+{ 0x0F12, 0x0019  },   //TVAR_ash_pGAS[188] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[189] //
+{ 0x0F12, 0x003A  },   //TVAR_ash_pGAS[190] //
+{ 0x0F12, 0x0066  },   //TVAR_ash_pGAS[191] //
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[192] //
+{ 0x0F12, 0x00E6  },   //TVAR_ash_pGAS[193] //
+{ 0x0F12, 0x0130  },   //TVAR_ash_pGAS[194] //
+{ 0x0F12, 0x010B  },   //TVAR_ash_pGAS[195] //
+{ 0x0F12, 0x00C6  },   //TVAR_ash_pGAS[196] //
+{ 0x0F12, 0x0082  },   //TVAR_ash_pGAS[197] //
+{ 0x0F12, 0x0047  },   //TVAR_ash_pGAS[198] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[199] //
+{ 0x0F12, 0x000D  },   //TVAR_ash_pGAS[200] //
+{ 0x0F12, 0x0007  },   //TVAR_ash_pGAS[201] //
+{ 0x0F12, 0x000F  },   //TVAR_ash_pGAS[202] //
+{ 0x0F12, 0x0027  },   //TVAR_ash_pGAS[203] //
+{ 0x0F12, 0x0053  },   //TVAR_ash_pGAS[204] //
+{ 0x0F12, 0x008F  },   //TVAR_ash_pGAS[205] //
+{ 0x0F12, 0x00D6  },   //TVAR_ash_pGAS[206] //
+{ 0x0F12, 0x0121  },   //TVAR_ash_pGAS[207] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_pGAS[208] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[209] //
+{ 0x0F12, 0x0077  },   //TVAR_ash_pGAS[210] //
+{ 0x0F12, 0x0040  },   //TVAR_ash_pGAS[211] //
+{ 0x0F12, 0x001A  },   //TVAR_ash_pGAS[212] //
+{ 0x0F12, 0x0007  },   //TVAR_ash_pGAS[213] //
+{ 0x0F12, 0x0000  },   //TVAR_ash_pGAS[214] //
+{ 0x0F12, 0x000B  },   //TVAR_ash_pGAS[215] //
+{ 0x0F12, 0x0023  },   //TVAR_ash_pGAS[216] //
+{ 0x0F12, 0x004E  },   //TVAR_ash_pGAS[217] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[218] //
+{ 0x0F12, 0x00D3  },   //TVAR_ash_pGAS[219] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[220] //
+{ 0x0F12, 0x0103  },   //TVAR_ash_pGAS[221] //
+{ 0x0F12, 0x00C1  },   //TVAR_ash_pGAS[222] //
+{ 0x0F12, 0x007D  },   //TVAR_ash_pGAS[223] //
+{ 0x0F12, 0x0046  },   //TVAR_ash_pGAS[224] //
+{ 0x0F12, 0x0024  },   //TVAR_ash_pGAS[225] //
+{ 0x0F12, 0x0010  },   //TVAR_ash_pGAS[226] //
+{ 0x0F12, 0x0008  },   //TVAR_ash_pGAS[227] //
+{ 0x0F12, 0x0014  },   //TVAR_ash_pGAS[228] //
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[229] //
+{ 0x0F12, 0x0059  },   //TVAR_ash_pGAS[230] //
+{ 0x0F12, 0x0094  },   //TVAR_ash_pGAS[231] //
+{ 0x0F12, 0x00DB  },   //TVAR_ash_pGAS[232] //
+{ 0x0F12, 0x0125  },   //TVAR_ash_pGAS[233] //
+{ 0x0F12, 0x0117  },   //TVAR_ash_pGAS[234] //
+{ 0x0F12, 0x00D5  },   //TVAR_ash_pGAS[235] //
+{ 0x0F12, 0x0092  },   //TVAR_ash_pGAS[236] //
+{ 0x0F12, 0x005C  },   //TVAR_ash_pGAS[237] //
+{ 0x0F12, 0x0038  },   //TVAR_ash_pGAS[238] //
+{ 0x0F12, 0x0026  },   //TVAR_ash_pGAS[239] //
+{ 0x0F12, 0x0020  },   //TVAR_ash_pGAS[240] //
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[241] //
+{ 0x0F12, 0x0044  },   //TVAR_ash_pGAS[242] //
+{ 0x0F12, 0x006F  },   //TVAR_ash_pGAS[243] //
+{ 0x0F12, 0x00AC  },   //TVAR_ash_pGAS[244] //
+{ 0x0F12, 0x00F2  },   //TVAR_ash_pGAS[245] //
+{ 0x0F12, 0x013B  },   //TVAR_ash_pGAS[246] //
+{ 0x0F12, 0x0131  },   //TVAR_ash_pGAS[247] //
+{ 0x0F12, 0x00EE  },   //TVAR_ash_pGAS[248] //
+{ 0x0F12, 0x00B3  },   //TVAR_ash_pGAS[249] //
+{ 0x0F12, 0x007E  },   //TVAR_ash_pGAS[250] //
+{ 0x0F12, 0x005B  },   //TVAR_ash_pGAS[251] //
+{ 0x0F12, 0x0047  },   //TVAR_ash_pGAS[252] //
+{ 0x0F12, 0x0044  },   //TVAR_ash_pGAS[253] //
+{ 0x0F12, 0x004E  },   //TVAR_ash_pGAS[254] //
+{ 0x0F12, 0x0067  },   //TVAR_ash_pGAS[255] //
+{ 0x0F12, 0x0094  },   //TVAR_ash_pGAS[256] //
+{ 0x0F12, 0x00D0  },   //TVAR_ash_pGAS[257] //
+{ 0x0F12, 0x0112  },   //TVAR_ash_pGAS[258] //
+{ 0x0F12, 0x0159  },   //TVAR_ash_pGAS[259] //
+{ 0x0F12, 0x015E  },   //TVAR_ash_pGAS[260] //
+{ 0x0F12, 0x011B  },   //TVAR_ash_pGAS[261] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[262] //
+{ 0x0F12, 0x00B1  },   //TVAR_ash_pGAS[263] //
+{ 0x0F12, 0x008E  },   //TVAR_ash_pGAS[264] //
+{ 0x0F12, 0x007E  },   //TVAR_ash_pGAS[265] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[266] //
+{ 0x0F12, 0x0084  },   //TVAR_ash_pGAS[267] //
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[268] //
+{ 0x0F12, 0x00C8  },   //TVAR_ash_pGAS[269] //
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[270] //
+{ 0x0F12, 0x013A  },   //TVAR_ash_pGAS[271] //
+{ 0x0F12, 0x0185  },   //TVAR_ash_pGAS[272] //
+{ 0x0F12, 0x0188  },   //TVAR_ash_pGAS[273] //
+{ 0x0F12, 0x0148  },   //TVAR_ash_pGAS[274] //
+{ 0x0F12, 0x010D  },   //TVAR_ash_pGAS[275] //
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[276] //
+{ 0x0F12, 0x00C7  },   //TVAR_ash_pGAS[277] //
+{ 0x0F12, 0x00B4  },   //TVAR_ash_pGAS[278] //
+{ 0x0F12, 0x00B2  },   //TVAR_ash_pGAS[279] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[280] //
+{ 0x0F12, 0x00D9  },   //TVAR_ash_pGAS[281] //
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[282] //
+{ 0x0F12, 0x012F  },   //TVAR_ash_pGAS[283] //
+{ 0x0F12, 0x016D  },   //TVAR_ash_pGAS[284] //
+{ 0x0F12, 0x01A7  },   //TVAR_ash_pGAS[285] //
+{ 0x0F12, 0x018F  },   //TVAR_ash_pGAS[286] //
+{ 0x0F12, 0x014E  },   //TVAR_ash_pGAS[287] //
+{ 0x0F12, 0x0119  },   //TVAR_ash_pGAS[288] //
+{ 0x0F12, 0x00EC  },   //TVAR_ash_pGAS[289] //
+{ 0x0F12, 0x00CD  },   //TVAR_ash_pGAS[290] //
+{ 0x0F12, 0x00BB  },   //TVAR_ash_pGAS[291] //
+{ 0x0F12, 0x00B8  },   //TVAR_ash_pGAS[292] //
+{ 0x0F12, 0x00C4  },   //TVAR_ash_pGAS[293] //
+{ 0x0F12, 0x00DE  },   //TVAR_ash_pGAS[294] //
+{ 0x0F12, 0x0105  },   //TVAR_ash_pGAS[295] //
+{ 0x0F12, 0x0135  },   //TVAR_ash_pGAS[296] //
+{ 0x0F12, 0x0176  },   //TVAR_ash_pGAS[297] //
+{ 0x0F12, 0x01B8  },   //TVAR_ash_pGAS[298] //
+{ 0x0F12, 0x0161  },   //TVAR_ash_pGAS[299] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[300] //
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[301] //
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[302] //
+{ 0x0F12, 0x0093  },   //TVAR_ash_pGAS[303] //
+{ 0x0F12, 0x0080  },   //TVAR_ash_pGAS[304] //
+{ 0x0F12, 0x007C  },   //TVAR_ash_pGAS[305] //
+{ 0x0F12, 0x0087  },   //TVAR_ash_pGAS[306] //
+{ 0x0F12, 0x00A3  },   //TVAR_ash_pGAS[307] //
+{ 0x0F12, 0x00CD  },   //TVAR_ash_pGAS[308] //
+{ 0x0F12, 0x0104  },   //TVAR_ash_pGAS[309] //
+{ 0x0F12, 0x0142  },   //TVAR_ash_pGAS[310] //
+{ 0x0F12, 0x0192  },   //TVAR_ash_pGAS[311] //
+{ 0x0F12, 0x0136  },   //TVAR_ash_pGAS[312] //
+{ 0x0F12, 0x00F4  },   //TVAR_ash_pGAS[313] //
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[314] //
+{ 0x0F12, 0x0081  },   //TVAR_ash_pGAS[315] //
+{ 0x0F12, 0x005C  },   //TVAR_ash_pGAS[316] //
+{ 0x0F12, 0x0048  },   //TVAR_ash_pGAS[317] //
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[318] //
+{ 0x0F12, 0x004E  },   //TVAR_ash_pGAS[319] //
+{ 0x0F12, 0x006A  },   //TVAR_ash_pGAS[320] //
+{ 0x0F12, 0x0097  },   //TVAR_ash_pGAS[321] //
+{ 0x0F12, 0x00D0  },   //TVAR_ash_pGAS[322] //
+{ 0x0F12, 0x0116  },   //TVAR_ash_pGAS[323] //
+{ 0x0F12, 0x0160  },   //TVAR_ash_pGAS[324] //
+{ 0x0F12, 0x0118  },   //TVAR_ash_pGAS[325] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[326] //
+{ 0x0F12, 0x0093  },   //TVAR_ash_pGAS[327] //
+{ 0x0F12, 0x005B  },   //TVAR_ash_pGAS[328] //
+{ 0x0F12, 0x0035  },   //TVAR_ash_pGAS[329] //
+{ 0x0F12, 0x0020  },   //TVAR_ash_pGAS[330] //
+{ 0x0F12, 0x001B  },   //TVAR_ash_pGAS[331] //
+{ 0x0F12, 0x0024  },   //TVAR_ash_pGAS[332] //
+{ 0x0F12, 0x0041  },   //TVAR_ash_pGAS[333] //
+{ 0x0F12, 0x006F  },   //TVAR_ash_pGAS[334] //
+{ 0x0F12, 0x00AC  },   //TVAR_ash_pGAS[335] //
+{ 0x0F12, 0x00F3  },   //TVAR_ash_pGAS[336] //
+{ 0x0F12, 0x013F  },   //TVAR_ash_pGAS[337] //
+{ 0x0F12, 0x0105  },   //TVAR_ash_pGAS[338] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[339] //
+{ 0x0F12, 0x007F  },   //TVAR_ash_pGAS[340] //
+{ 0x0F12, 0x0046  },   //TVAR_ash_pGAS[341] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[342] //
+{ 0x0F12, 0x000E  },   //TVAR_ash_pGAS[343] //
+{ 0x0F12, 0x0007  },   //TVAR_ash_pGAS[344] //
+{ 0x0F12, 0x0010  },   //TVAR_ash_pGAS[345] //
+{ 0x0F12, 0x002A  },   //TVAR_ash_pGAS[346] //
+{ 0x0F12, 0x0058  },   //TVAR_ash_pGAS[347] //
+{ 0x0F12, 0x0094  },   //TVAR_ash_pGAS[348] //
+{ 0x0F12, 0x00DB  },   //TVAR_ash_pGAS[349] //
+{ 0x0F12, 0x0127  },   //TVAR_ash_pGAS[350] //
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[351] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[352] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[353] //
+{ 0x0F12, 0x0042  },   //TVAR_ash_pGAS[354] //
+{ 0x0F12, 0x001C  },   //TVAR_ash_pGAS[355] //
+{ 0x0F12, 0x0008  },   //TVAR_ash_pGAS[356] //
+{ 0x0F12, 0x0000  },   //TVAR_ash_pGAS[357] //
+{ 0x0F12, 0x000B  },   //TVAR_ash_pGAS[358] //
+{ 0x0F12, 0x0023  },   //TVAR_ash_pGAS[359] //
+{ 0x0F12, 0x0050  },   //TVAR_ash_pGAS[360] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[361] //
+{ 0x0F12, 0x00D3  },   //TVAR_ash_pGAS[362] //
+{ 0x0F12, 0x011D  },   //TVAR_ash_pGAS[363] //
+{ 0x0F12, 0x0108  },   //TVAR_ash_pGAS[364] //
+{ 0x0F12, 0x00C4  },   //TVAR_ash_pGAS[365] //
+{ 0x0F12, 0x0083  },   //TVAR_ash_pGAS[366] //
+{ 0x0F12, 0x004C  },   //TVAR_ash_pGAS[367] //
+{ 0x0F12, 0x0027  },   //TVAR_ash_pGAS[368] //
+{ 0x0F12, 0x0011  },   //TVAR_ash_pGAS[369] //
+{ 0x0F12, 0x0008  },   //TVAR_ash_pGAS[370] //
+{ 0x0F12, 0x0013  },   //TVAR_ash_pGAS[371] //
+{ 0x0F12, 0x002A  },   //TVAR_ash_pGAS[372] //
+{ 0x0F12, 0x0055  },   //TVAR_ash_pGAS[373] //
+{ 0x0F12, 0x008F  },   //TVAR_ash_pGAS[374] //
+{ 0x0F12, 0x00D5  },   //TVAR_ash_pGAS[375] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[376] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[377] //
+{ 0x0F12, 0x00DC  },   //TVAR_ash_pGAS[378] //
+{ 0x0F12, 0x009C  },   //TVAR_ash_pGAS[379] //
+{ 0x0F12, 0x0064  },   //TVAR_ash_pGAS[380] //
+{ 0x0F12, 0x003D  },   //TVAR_ash_pGAS[381] //
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[382] //
+{ 0x0F12, 0x001F  },   //TVAR_ash_pGAS[383] //
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[384] //
+{ 0x0F12, 0x003F  },   //TVAR_ash_pGAS[385] //
+{ 0x0F12, 0x0069  },   //TVAR_ash_pGAS[386] //
+{ 0x0F12, 0x00A3  },   //TVAR_ash_pGAS[387] //
+{ 0x0F12, 0x00E8  },   //TVAR_ash_pGAS[388] //
+{ 0x0F12, 0x012D  },   //TVAR_ash_pGAS[389] //
+{ 0x0F12, 0x013D  },   //TVAR_ash_pGAS[390] //
+{ 0x0F12, 0x00FB  },   //TVAR_ash_pGAS[391] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[392] //
+{ 0x0F12, 0x0089  },   //TVAR_ash_pGAS[393] //
+{ 0x0F12, 0x0063  },   //TVAR_ash_pGAS[394] //
+{ 0x0F12, 0x004C  },   //TVAR_ash_pGAS[395] //
+{ 0x0F12, 0x0045  },   //TVAR_ash_pGAS[396] //
+{ 0x0F12, 0x004B  },   //TVAR_ash_pGAS[397] //
+{ 0x0F12, 0x0061  },   //TVAR_ash_pGAS[398] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[399] //
+{ 0x0F12, 0x00C4  },   //TVAR_ash_pGAS[400] //
+{ 0x0F12, 0x0102  },   //TVAR_ash_pGAS[401] //
+{ 0x0F12, 0x014B  },   //TVAR_ash_pGAS[402] //
+{ 0x0F12, 0x016F  },   //TVAR_ash_pGAS[403] //
+{ 0x0F12, 0x0129  },   //TVAR_ash_pGAS[404] //
+{ 0x0F12, 0x00F0  },   //TVAR_ash_pGAS[405] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[406] //
+{ 0x0F12, 0x009A  },   //TVAR_ash_pGAS[407] //
+{ 0x0F12, 0x0084  },   //TVAR_ash_pGAS[408] //
+{ 0x0F12, 0x007B  },   //TVAR_ash_pGAS[409] //
+{ 0x0F12, 0x0082  },   //TVAR_ash_pGAS[410] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[411] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[412] //
+{ 0x0F12, 0x00EF  },   //TVAR_ash_pGAS[413] //
+{ 0x0F12, 0x0129  },   //TVAR_ash_pGAS[414] //
+{ 0x0F12, 0x0173  },   //TVAR_ash_pGAS[415] //
+{ 0x0F12, 0x01A0  },   //TVAR_ash_pGAS[416] //
+{ 0x0F12, 0x015B  },   //TVAR_ash_pGAS[417] //
+{ 0x0F12, 0x0121  },   //TVAR_ash_pGAS[418] //
+{ 0x0F12, 0x00F9  },   //TVAR_ash_pGAS[419] //
+{ 0x0F12, 0x00D8  },   //TVAR_ash_pGAS[420] //
+{ 0x0F12, 0x00C2  },   //TVAR_ash_pGAS[421] //
+{ 0x0F12, 0x00B7  },   //TVAR_ash_pGAS[422] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[423] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[424] //
+{ 0x0F12, 0x00F4  },   //TVAR_ash_pGAS[425] //
+{ 0x0F12, 0x0120  },   //TVAR_ash_pGAS[426] //
+{ 0x0F12, 0x015D  },   //TVAR_ash_pGAS[427] //
+{ 0x0F12, 0x0198  },   //TVAR_ash_pGAS[428] //
+{ 0x0F12, 0x013A  },   //TVAR_ash_pGAS[429] //
+{ 0x0F12, 0x010B  },   //TVAR_ash_pGAS[430] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[431] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[432] //
+{ 0x0F12, 0x00A7  },   //TVAR_ash_pGAS[433] //
+{ 0x0F12, 0x009A  },   //TVAR_ash_pGAS[434] //
+{ 0x0F12, 0x0097  },   //TVAR_ash_pGAS[435] //
+{ 0x0F12, 0x00A2  },   //TVAR_ash_pGAS[436] //
+{ 0x0F12, 0x00B9  },   //TVAR_ash_pGAS[437] //
+{ 0x0F12, 0x00D6  },   //TVAR_ash_pGAS[438] //
+{ 0x0F12, 0x00FD  },   //TVAR_ash_pGAS[439] //
+{ 0x0F12, 0x0133  },   //TVAR_ash_pGAS[440] //
+{ 0x0F12, 0x0165  },   //TVAR_ash_pGAS[441] //
+{ 0x0F12, 0x0117  },   //TVAR_ash_pGAS[442] //
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[443] //
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[444] //
+{ 0x0F12, 0x0091  },   //TVAR_ash_pGAS[445] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[446] //
+{ 0x0F12, 0x006D  },   //TVAR_ash_pGAS[447] //
+{ 0x0F12, 0x0069  },   //TVAR_ash_pGAS[448] //
+{ 0x0F12, 0x0072  },   //TVAR_ash_pGAS[449] //
+{ 0x0F12, 0x0088  },   //TVAR_ash_pGAS[450] //
+{ 0x0F12, 0x00A9  },   //TVAR_ash_pGAS[451] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[452] //
+{ 0x0F12, 0x0108  },   //TVAR_ash_pGAS[453] //
+{ 0x0F12, 0x0148  },   //TVAR_ash_pGAS[454] //
+{ 0x0F12, 0x00F1  },   //TVAR_ash_pGAS[455] //
+{ 0x0F12, 0x00BD  },   //TVAR_ash_pGAS[456] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[457] //
+{ 0x0F12, 0x0063  },   //TVAR_ash_pGAS[458] //
+{ 0x0F12, 0x0049  },   //TVAR_ash_pGAS[459] //
+{ 0x0F12, 0x003D  },   //TVAR_ash_pGAS[460] //
+{ 0x0F12, 0x003A  },   //TVAR_ash_pGAS[461] //
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[462] //
+{ 0x0F12, 0x0057  },   //TVAR_ash_pGAS[463] //
+{ 0x0F12, 0x007A  },   //TVAR_ash_pGAS[464] //
+{ 0x0F12, 0x00A8  },   //TVAR_ash_pGAS[465] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[466] //
+{ 0x0F12, 0x011B  },   //TVAR_ash_pGAS[467] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[468] //
+{ 0x0F12, 0x00A1  },   //TVAR_ash_pGAS[469] //
+{ 0x0F12, 0x006D  },   //TVAR_ash_pGAS[470] //
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[471] //
+{ 0x0F12, 0x0027  },   //TVAR_ash_pGAS[472] //
+{ 0x0F12, 0x001B  },   //TVAR_ash_pGAS[473] //
+{ 0x0F12, 0x0019  },   //TVAR_ash_pGAS[474] //
+{ 0x0F12, 0x001E  },   //TVAR_ash_pGAS[475] //
+{ 0x0F12, 0x0033  },   //TVAR_ash_pGAS[476] //
+{ 0x0F12, 0x0057  },   //TVAR_ash_pGAS[477] //
+{ 0x0F12, 0x0087  },   //TVAR_ash_pGAS[478] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[479] //
+{ 0x0F12, 0x00FA  },   //TVAR_ash_pGAS[480] //
+{ 0x0F12, 0x00C1  },   //TVAR_ash_pGAS[481] //
+{ 0x0F12, 0x008F  },   //TVAR_ash_pGAS[482] //
+{ 0x0F12, 0x005B  },	//TVAR_ash_pGAS[483] //                                                                        
+{ 0x0F12, 0x0031  },	//TVAR_ash_pGAS[484] //                                                                        
+{ 0x0F12, 0x0016  },	//TVAR_ash_pGAS[485] //                                                                        
+{ 0x0F12, 0x000B  },	//TVAR_ash_pGAS[486] //                                                                        
+{ 0x0F12, 0x0006  },	//TVAR_ash_pGAS[487] //                                                                        
+{ 0x0F12, 0x000D  },	//TVAR_ash_pGAS[488] //                                                                        
+{ 0x0F12, 0x001F  },	//TVAR_ash_pGAS[489] //                                                                        
+{ 0x0F12, 0x0042  },	//TVAR_ash_pGAS[490] //                                                                        
+{ 0x0F12, 0x0070  },	//TVAR_ash_pGAS[491] //                                                                        
+{ 0x0F12, 0x00AA  },	//TVAR_ash_pGAS[492] //                                                                        
+{ 0x0F12, 0x00E5  },	//TVAR_ash_pGAS[493] //                                                                        
+{ 0x0F12, 0x00BD  },	//TVAR_ash_pGAS[494] //                                                                        
+{ 0x0F12, 0x008A  },	//TVAR_ash_pGAS[495] //                                                                        
+{ 0x0F12, 0x0056  },	//TVAR_ash_pGAS[496] //                                                                        
+{ 0x0F12, 0x002C  },	//TVAR_ash_pGAS[497] //                                                                        
+{ 0x0F12, 0x0011  },	//TVAR_ash_pGAS[498] //                                                                        
+{ 0x0F12, 0x0005  },	//TVAR_ash_pGAS[499] //                                                                        
+{ 0x0F12, 0x0000  },	//TVAR_ash_pGAS[500] //                                                                        
+{ 0x0F12, 0x0008  },	//TVAR_ash_pGAS[501] //                                                                        
+{ 0x0F12, 0x0018  },	//TVAR_ash_pGAS[502] //                                                                        
+{ 0x0F12, 0x0039  },	//TVAR_ash_pGAS[503] //                                                                        
+{ 0x0F12, 0x0068  },	//TVAR_ash_pGAS[504] //                                                                        
+{ 0x0F12, 0x00A1  },	//TVAR_ash_pGAS[505] //                                                                        
+{ 0x0F12, 0x00DA  },	//TVAR_ash_pGAS[506] //                                                                        
+{ 0x0F12, 0x00C4  },	//TVAR_ash_pGAS[507] //                                                                        
+{ 0x0F12, 0x0092  },	//TVAR_ash_pGAS[508] //                                                                        
+{ 0x0F12, 0x005F  },	//TVAR_ash_pGAS[509] //                                                                        
+{ 0x0F12, 0x0034  },	//TVAR_ash_pGAS[510] //                                                                        
+{ 0x0F12, 0x001B  },	//TVAR_ash_pGAS[511] //                                                                        
+{ 0x0F12, 0x000D  },	//TVAR_ash_pGAS[512] //                                                                        
+{ 0x0F12, 0x0007  },	//TVAR_ash_pGAS[513] //                                                                        
+{ 0x0F12, 0x000E  },	//TVAR_ash_pGAS[514] //                                                                        
+{ 0x0F12, 0x001E  },	//TVAR_ash_pGAS[515] //                                                                        
+{ 0x0F12, 0x003E  },	//TVAR_ash_pGAS[516] //                                                                        
+{ 0x0F12, 0x006A  },	//TVAR_ash_pGAS[517] //                                                                        
+{ 0x0F12, 0x00A2  },	//TVAR_ash_pGAS[518] //                                                                        
+{ 0x0F12, 0x00DB  },	//TVAR_ash_pGAS[519] //                                                                        
+{ 0x0F12, 0x00D7  },	//TVAR_ash_pGAS[520] //                                                                        
+{ 0x0F12, 0x00A3  },	//TVAR_ash_pGAS[521] //                                                                        
+{ 0x0F12, 0x0073  },	//TVAR_ash_pGAS[522] //                                                                        
+{ 0x0F12, 0x0049  },	//TVAR_ash_pGAS[523] //                                                                        
+{ 0x0F12, 0x002F  },	//TVAR_ash_pGAS[524] //                                                                        
+{ 0x0F12, 0x0022  },	//TVAR_ash_pGAS[525] //                                                                        
+{ 0x0F12, 0x001B  },	//TVAR_ash_pGAS[526] //                                                                        
+{ 0x0F12, 0x0023  },	//TVAR_ash_pGAS[527] //                                                                        
+{ 0x0F12, 0x0031  },	//TVAR_ash_pGAS[528] //                                                                        
+{ 0x0F12, 0x0050  },	//TVAR_ash_pGAS[529] //                                                                        
+{ 0x0F12, 0x007C  },	//TVAR_ash_pGAS[530] //                                                                        
+{ 0x0F12, 0x00B1  },	//TVAR_ash_pGAS[531] //                                                                        
+{ 0x0F12, 0x00E9  },	//TVAR_ash_pGAS[532] //                                                                        
+{ 0x0F12, 0x00F2  },	//TVAR_ash_pGAS[533] //                                                                        
+{ 0x0F12, 0x00C0  },	//TVAR_ash_pGAS[534] //                                                                        
+{ 0x0F12, 0x0091  },	//TVAR_ash_pGAS[535] //                                                                        
+{ 0x0F12, 0x006A  },	//TVAR_ash_pGAS[536] //                                                                        
+{ 0x0F12, 0x0050  },	//TVAR_ash_pGAS[537] //                                                                        
+{ 0x0F12, 0x0041  },	//TVAR_ash_pGAS[538] //                                                                        
+{ 0x0F12, 0x003C  },	//TVAR_ash_pGAS[539] //                                                                        
+{ 0x0F12, 0x0040  },	//TVAR_ash_pGAS[540] //                                                                        
+{ 0x0F12, 0x004F  },	//TVAR_ash_pGAS[541] //                                                                        
+{ 0x0F12, 0x006D  },	//TVAR_ash_pGAS[542] //                                                                        
+{ 0x0F12, 0x0099  },	//TVAR_ash_pGAS[543] //                                                                        
+{ 0x0F12, 0x00C9  },	//TVAR_ash_pGAS[544] //                                                                        
+{ 0x0F12, 0x0102  },	//TVAR_ash_pGAS[545] //                                                                        
+{ 0x0F12, 0x0120  },	//TVAR_ash_pGAS[546] //                                                                        
+{ 0x0F12, 0x00EB  },	//TVAR_ash_pGAS[547] //                                                                        
+{ 0x0F12, 0x00BE  },	//TVAR_ash_pGAS[548] //                                                                        
+{ 0x0F12, 0x0099  },	//TVAR_ash_pGAS[549] //                                                                        
+{ 0x0F12, 0x0081  },	//TVAR_ash_pGAS[550] //                                                                        
+{ 0x0F12, 0x0074  },	//TVAR_ash_pGAS[551] //                                                                        
+{ 0x0F12, 0x006F  },	//TVAR_ash_pGAS[552] //                                                                        
+{ 0x0F12, 0x0071  },	//TVAR_ash_pGAS[553] //                                                                        
+{ 0x0F12, 0x0082  },	//TVAR_ash_pGAS[554] //                                                                        
+{ 0x0F12, 0x009B  },	//TVAR_ash_pGAS[555] //                                                                        
+{ 0x0F12, 0x00C0  },	//TVAR_ash_pGAS[556] //                                                                        
+{ 0x0F12, 0x00EE  },	//TVAR_ash_pGAS[557] //                                                                        
+{ 0x0F12, 0x0126  },	//TVAR_ash_pGAS[558] //                                                                        
+{ 0x0F12, 0x0147  },	//TVAR_ash_pGAS[559] //                                                                        
+{ 0x0F12, 0x0116  },	//TVAR_ash_pGAS[560] //                                                                        
+{ 0x0F12, 0x00E7  },	//TVAR_ash_pGAS[561] //                                                                        
+{ 0x0F12, 0x00C9  },	//TVAR_ash_pGAS[562] //                                                                        
+{ 0x0F12, 0x00B4  },	//TVAR_ash_pGAS[563] //                                                                        
+{ 0x0F12, 0x00A7  },	//TVAR_ash_pGAS[564] //                                                                        
+{ 0x0F12, 0x00A0  },	//TVAR_ash_pGAS[565] //                                                                        
+{ 0x0F12, 0x00A3  },	//TVAR_ash_pGAS[566] //                                                                        
+{ 0x0F12, 0x00B1  },	//TVAR_ash_pGAS[567] //                                                                        
+{ 0x0F12, 0x00C9  },	//TVAR_ash_pGAS[568] //                                                                        
+{ 0x0F12, 0x00EA  },	//TVAR_ash_pGAS[569] //                                                                        
+{ 0x0F12, 0x011B  },	//TVAR_ash_pGAS[570] //                                                                        
+{ 0x0F12, 0x0141  },	//TVAR_ash_pGAS[571] //                                                                        
+                        
+{ 0x002A, 0x074E  },	    
+{ 0x0F12, 0x0001  },	//ash_bLumaMode //         	                                                                        
+{ 0x002A, 0x0D30  },                               
+{ 0x0F12, 0x02A8  },	//awbb_GLocu //        
+{ 0x0F12, 0x0347  },	//awbb_GLocuSB //      
+                                                   
+{ 0x002A, 0x06B8  },                               
+{ 0x0F12, 0x00C0  },	//TVAR_ash_AwbashCord[0] //                                                                        
+{ 0x0F12, 0x00E0  },	//TVAR_ash_AwbashCord[1] //                                                                        
+{ 0x0F12, 0x0120  },	//TVAR_ash_AwbashCord[2] //                                                                        
+{ 0x0F12, 0x0124  },	//TVAR_ash_AwbashCord[3] //                                                                        
+{ 0x0F12, 0x0156  },	//TVAR_ash_AwbashCord[4] //                                                                        
+{ 0x0F12, 0x017F  },	//TVAR_ash_AwbashCord[5] //                                                                        
+{ 0x0F12, 0x018F  },	//TVAR_ash_AwbashCord[6] //                                                                        
+                                                   
+                                                   
+{ 0x002A, 0x0664  },                               
+{ 0x0F12, 0x013E  },	//seti_uContrastCenter //                                                                          
+                                                   
+                                                   
+{ 0x002A, 0x06C6  },                               
+{ 0x0F12, 0x010B  },	//ash_CGrasalphaS[0] //
+{ 0x0F12, 0x0103  },	//ash_CGrasalphaS[1] //
+{ 0x0F12, 0x00FC  },	//ash_CGrasalphaS[2] //
+{ 0x0F12, 0x010C  },	//ash_CGrasalphaS[3] //
+                        
+{ 0x002A, 0x0C48  },    
+{ 0x0F12, 0x03C8  },	//awbb_IndoorGrZones_m_BGrid[0] // 		                                                                        
+{ 0x0F12, 0x03DE  },	//awbb_IndoorGrZones_m_BGrid[1] //                                                                         
+{ 0x0F12, 0x0372  },	//awbb_IndoorGrZones_m_BGrid[2] //                                                                         
+{ 0x0F12, 0x03EA  },	//awbb_IndoorGrZones_m_BGrid[3] //                                                                         
+{ 0x0F12, 0x0336  },	//awbb_IndoorGrZones_m_BGrid[4] //                                                                         
+{ 0x0F12, 0x03DE  },	//awbb_IndoorGrZones_m_BGrid[5] //                                                                         
+{ 0x0F12, 0x0302  },	//awbb_IndoorGrZones_m_BGrid[6] //                                                                         
+{ 0x0F12, 0x03A2  },	//awbb_IndoorGrZones_m_BGrid[7] //                                                                         
+{ 0x0F12, 0x02C8  },	//awbb_IndoorGrZones_m_BGrid[8] //                                                                         
+{ 0x0F12, 0x0368  },	//awbb_IndoorGrZones_m_BGrid[9] //                                                                         
+{ 0x0F12, 0x0292  },	//awbb_IndoorGrZones_m_BGrid[10] //                                                                        
+{ 0x0F12, 0x033A  },	//awbb_IndoorGrZones_m_BGrid[11] //                                                                        
+{ 0x0F12, 0x0276  },	//awbb_IndoorGrZones_m_BGrid[12] //                                                                        
+{ 0x0F12, 0x0306  },	//awbb_IndoorGrZones_m_BGrid[13] //                                                                        
+{ 0x0F12, 0x025A  },	//awbb_IndoorGrZones_m_BGrid[14] //                                                                        
+{ 0x0F12, 0x02C2  },	//awbb_IndoorGrZones_m_BGrid[15] //                                                                        
+{ 0x0F12, 0x0246  },	//awbb_IndoorGrZones_m_BGrid[16] //                                                                        
+{ 0x0F12, 0x02A2  },	//awbb_IndoorGrZones_m_BGrid[17] //                                                                        
+{ 0x0F12, 0x0232  },	//awbb_IndoorGrZones_m_BGrid[18] //                                                                        
+{ 0x0F12, 0x0298  },	//awbb_IndoorGrZones_m_BGrid[19] //                                                                        
+{ 0x0F12, 0x021E  },	//awbb_IndoorGrZones_m_BGrid[20] //                                                                        
+{ 0x0F12, 0x027E  },	//awbb_IndoorGrZones_m_BGrid[21] //                                                                        
+{ 0x0F12, 0x0208  },	//awbb_IndoorGrZones_m_BGrid[22] //                                                                        
+{ 0x0F12, 0x026C  },	//awbb_IndoorGrZones_m_BGrid[23] //                                                                        
+{ 0x0F12, 0x01EE  },	//awbb_IndoorGrZones_m_BGrid[24] //                                                                        
+{ 0x0F12, 0x025C  },	//awbb_IndoorGrZones_m_BGrid[25] //                                                                        
+{ 0x0F12, 0x01F0  },	//awbb_IndoorGrZones_m_BGrid[26] //                                                                        
+{ 0x0F12, 0x0248  },	//awbb_IndoorGrZones_m_BGrid[27] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[28] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[29] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[30] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[31] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[32] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[33] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[34] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[35] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[36] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[37] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[38] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[39] //                                                                        
+                                                           
+{ 0x0F12, 0x0005  },   //awbb_IndoorGrZones_m_Gridstep //  
+
+{ 0x002A, 0x0C9C  },
+{ 0x0F12, 0x000E  },
+{ 0x002A, 0x0CA0  },                                       
+{ 0x0F12, 0x0108  },	//awbb_IndoorGrZones_m_Boffs //
+                                                           
+{ 0x002A, 0x0CE0  },                                       
+{ 0x0F12, 0x03D4  },	//awbb_LowBrGrZones_m_BGrid[0] //                                                                          
+{ 0x0F12, 0x043E  },	//awbb_LowBrGrZones_m_BGrid[1] //                                                                          
+{ 0x0F12, 0x035C  },	//awbb_LowBrGrZones_m_BGrid[2] //                                                                          
+{ 0x0F12, 0x0438  },	//awbb_LowBrGrZones_m_BGrid[3] //                                                                          
+{ 0x0F12, 0x02F0  },	//awbb_LowBrGrZones_m_BGrid[4] //                                                                          
+{ 0x0F12, 0x042D  },	//awbb_LowBrGrZones_m_BGrid[5] //                                                                          
+{ 0x0F12, 0x029A  },	//awbb_LowBrGrZones_m_BGrid[6] //                                                                          
+{ 0x0F12, 0x03EF  },	//awbb_LowBrGrZones_m_BGrid[7] //                                                                          
+{ 0x0F12, 0x025E  },	//awbb_LowBrGrZones_m_BGrid[8] //                                                                          
+{ 0x0F12, 0x0395  },	//awbb_LowBrGrZones_m_BGrid[9] //                                                                          
+{ 0x0F12, 0x022E  },	//awbb_LowBrGrZones_m_BGrid[10] //                                                                         
+{ 0x0F12, 0x0346  },	//awbb_LowBrGrZones_m_BGrid[11] //                                                                         
+{ 0x0F12, 0x0200  },	//awbb_LowBrGrZones_m_BGrid[12] //                                                                         
+{ 0x0F12, 0x02F6  },	//awbb_LowBrGrZones_m_BGrid[13] //                                                                         
+{ 0x0F12, 0x01CE  },	//awbb_LowBrGrZones_m_BGrid[14] //                                                                         
+{ 0x0F12, 0x02C8  },	//awbb_LowBrGrZones_m_BGrid[15] //                                                                         
+{ 0x0F12, 0x01BB  },	//awbb_LowBrGrZones_m_BGrid[16] //                                                                         
+{ 0x0F12, 0x0287  },	//awbb_LowBrGrZones_m_BGrid[17] //                                                                         
+{ 0x0F12, 0x01E2  },	//awbb_LowBrGrZones_m_BGrid[18] //                                                                         
+{ 0x0F12, 0x0239  },	//awbb_LowBrGrZones_m_BGrid[19] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[20] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[21] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[22] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[23] //                                                                         
+                        
+{ 0x0F12, 0x0006  },	//awbb_LowBrGrZones_m_Gridstep //	                                                                        
+{ 0x002A, 0x0D18  },                                     
+{ 0x0F12, 0x00AE  },	//awbb_LowBrGrZones_m_Boff //
+                        
+{ 0x002A, 0x0CA4  },    
+{ 0x0F12, 0x026E  },	//0294//0286//02C2//awbb_OutdoorGrZones_m_BGrid[0] // 		                                                                        
+{ 0x0F12, 0x02A4  },	//02CB//02BD//02E0//awbb_OutdoorGrZones_m_BGrid[1] //                                                                         
+{ 0x0F12, 0x0262  },	//027A//026C//0278//awbb_OutdoorGrZones_m_BGrid[2] //                                                                         
+{ 0x0F12, 0x02A8  },	//02D7//02C9//02BC//awbb_OutdoorGrZones_m_BGrid[3] //                                                                         
+{ 0x0F12, 0x0256  },	//0266//0258//025A//awbb_OutdoorGrZones_m_BGrid[4] //                                                                         
+{ 0x0F12, 0x02AE  },	//02BF//02B1//02A2//awbb_OutdoorGrZones_m_BGrid[5] //                                                                         
+{ 0x0F12, 0x0248  },	//0252//0244//024A//awbb_OutdoorGrZones_m_BGrid[6] //                                                                         
+{ 0x0F12, 0x02A4  },	//02A8//029A//0288//awbb_OutdoorGrZones_m_BGrid[7] //                                                                         
+{ 0x0F12, 0x023E  },	//023E//0230//0240//awbb_OutdoorGrZones_m_BGrid[8] //                                                                         
+{ 0x0F12, 0x029A  },	//028F//0281//0278//awbb_OutdoorGrZones_m_BGrid[9] //                                                                         
+{ 0x0F12, 0x023A  },	//0239//022B//023E//awbb_OutdoorGrZones_m_BGrid[10] //                                                                        
+{ 0x0F12, 0x0290  },	//027A//026C//0254//awbb_OutdoorGrZones_m_BGrid[11] //                                                                        
+{ 0x0F12, 0x023A  },	//024A//023C//0000//awbb_OutdoorGrZones_m_BGrid[12] //                                                                        
+{ 0x0F12, 0x027E  },	//0260//0252//0000//awbb_OutdoorGrZones_m_BGrid[13] //                                                                        
+{ 0x0F12, 0x0244  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[14] //                                                                        
+{ 0x0F12, 0x0266  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[15] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[16] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[17] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[18] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[19] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[20] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[21] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[22] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[23] //                                                                        
+                  
+{ 0x0F12, 0x0004  },	//awbb_OutdoorGrZones_m_Gridstep //               
+{ 0x002A, 0x0CD8  },
+{ 0x0F12, 0x0008  },
+{ 0x002A, 0x0CDC  },                                                          
+{ 0x0F12, 0x0204  },	//awbb_OutdoorGrZones_m_Boff //                   
+{ 0x002A, 0x0D1C  },                                                          
+{ 0x0F12, 0x037C  },	//awbb_CrclLowT_R_c //                            
+{ 0x002A, 0x0D20  },                                                          
+{ 0x0F12, 0x0157  },	//awbb_CrclLowT_B_c //                            
+{ 0x002A, 0x0D24  },                                                          
+{ 0x0F12, 0x3EB8  },	//awbb_CrclLowT_Rad_c //                          
+                        
+{ 0x002A, 0x0D2C  },    
+{ 0x0F12, 0x013D  },	//awbb_IntcR //	                                                                        
+{ 0x0F12, 0x011E  },	//awbb_IntcB //                                                                        
+{ 0x002A, 0x0D46  },    
+{ 0x0F12, 0x04C0  },	//0554//055D//0396//04A2//awbb_MvEq_RBthresh //	                                                                        
+                        
+                        
+                        
+{ 0x002A, 0x0D28  },    //wp outdoor
+{ 0x0F12, 0x0270  },	                                                                        
+{ 0x0F12, 0x0240  },	                                                                        
+                        
+                  
+{ 0x002A, 0x0D5C  },    
+{ 0x0F12, 0x7FFF  },	                                                                        
+{ 0x0F12, 0x0050  },	                                                                        
+                        
+{ 0x002A, 0x2316  },    
+{ 0x0F12, 0x0006  },	                                                                        
+                        
+{ 0x002A, 0x0E44  },    
+{ 0x0F12, 0x0525  },	                                                                        
+{ 0x0F12, 0x0400  },	                                                                        
+{ 0x0F12, 0x078C  },	                                                                        
+                        
+{ 0x002A, 0x0E36  },    
+{ 0x0F12, 0x0028  },	 //R OFFSET                                                                       
+{ 0x0F12, 0xFFD8  },	 //B OFFSET                                                                       
+{ 0x0F12, 0x0000  },	 //G OFFSET                                                                       
+                        
+{ 0x002A, 0x0DD4  },    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[0] //        	                                                                        
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[1] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[2] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[3] //    
+{ 0x0F12, 0xFFF0  },	//awbb_GridCorr_R[4] //    
+{ 0x0F12, 0x0080  },	//awbb_GridCorr_R[5] //    
+                   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[6] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[7] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[8] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[9] //    
+{ 0x0F12, 0xFFF0  },	//awbb_GridCorr_R[10] //   
+{ 0x0F12, 0x0080  },	//awbb_GridCorr_R[11] //   
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[12] //   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[13] //   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[14] //   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[15] //   
+{ 0x0F12, 0xFFF0  },	//awbb_GridCorr_R[16] //   
+{ 0x0F12, 0x0080  },	//awbb_GridCorr_R[17] //   
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[0] ////                                                                        
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[1] //                                                                          
+{ 0x0F12, 0x0032  },	//awbb_GridCorr_B[2] //                                                                          
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[3] //                                                                          
+{ 0x0F12, 0x0020  },	//awbb_GridCorr_B[4] //                                                                          
+{ 0x0F12, 0xFFC0  },	//awbb_GridCorr_B[5] //                                                                          
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[6] //                                                                          
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[7] //                                                                          
+{ 0x0F12, 0x0032  },	//awbb_GridCorr_B[8] //                                                                          
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[9] //                                                                          
+{ 0x0F12, 0x0020  },	//awbb_GridCorr_B[10] //                                                                         
+{ 0x0F12, 0xFFC0  },	//awbb_GridCorr_B[11] //                                                                         
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[12] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[13] //                                                                         
+{ 0x0F12, 0x0032  },	//awbb_GridCorr_B[14] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[15] //                                                                         
+{ 0x0F12, 0x0020  },	//awbb_GridCorr_B[16] //   
+{ 0x0F12, 0xFFC0  },	//awbb_GridCorr_B[17] //                 
+                   
+{ 0x0F12, 0x02D9  },	//awbb_GridConst_1[0] //                                                                     
+{ 0x0F12, 0x0357  },	//awbb_GridConst_1[1] //                                                                     
+{ 0x0F12, 0x03D1  },	//awbb_GridConst_1[2] //                                                                     
+                   
+                   
+{ 0x0F12, 0x0DF6  },	//0E4F//0DE9//0DE9//awbb_GridConst_2[0] //                                                   
+{ 0x0F12, 0x0ED8  },	//0EDD//0EDD//0EDD//awbb_GridConst_2[1] //                                                   
+{ 0x0F12, 0x0F51  },	//0F42//0F42//0F42//awbb_GridConst_2[2] //                                                   
+{ 0x0F12, 0x0F5C  },	//0F4E//0F4E//0F54//awbb_GridConst_2[3] //                                                   
+{ 0x0F12, 0x0F8F  },	//0F99//0F99//0FAE//awbb_GridConst_2[4] //                                                   
+{ 0x0F12, 0x1006  },	//1006//1006//1011//awbb_GridConst_2[5] //                                                   
+                   
+{ 0x0F12, 0x00AC  },	//00BA//awbb_GridCoeff_R_1                                                                   
+{ 0x0F12, 0x00BD  },	//00AF//awbb_GridCoeff_B_1                                                                   
+{ 0x0F12, 0x0049  },	//0049//awbb_GridCoeff_R_2                                                                   
+{ 0x0F12, 0x00F5  },	//00F5//awbb_GridCoeff_B_2                                                                   
+                   
+{ 0x002A, 0x0E4A  },                         
+{ 0x0F12, 0x0002  },	//awbb_GridEnable//                                                                          
+                   
+{ 0x002A, 0x051A  },                         
+{ 0x0F12, 0x010E  },	//lt_uLimitHigh//
+{ 0x0F12, 0x00F5  },	//lt_uLimitLow// 
+                   
+                   
+{ 0x002A, 0x0F76  },                         
+{ 0x0F12, 0x0007  },	//ae_statmode BLC off : 0x0F, on : 0x0D//  illumType On : 07 , Off : 0F
+                   
+{ 0x002A, 0x1034  },                         
+{ 0x0F12, 0x00C0  },	//saRR_IllumType[0] //                                                                       
+{ 0x0F12, 0x00E0  },	//saRR_IllumType[1] //                                                                       
+{ 0x0F12, 0x0104  },	//saRR_IllumType[2] //                                                                       
+{ 0x0F12, 0x0129  },	//saRR_IllumType[3] //                                                                       
+{ 0x0F12, 0x0156  },	//saRR_IllumType[4] //                                                                       
+{ 0x0F12, 0x017F  },	//saRR_IllumType[5] //                                                                       
+{ 0x0F12, 0x018F  },	//saRR_IllumType[6] //                                                                       
+                   
+                   
+{ 0x0F12, 0x0120  },	//saRR_IllumTypeF[0] //                                                                      
+{ 0x0F12, 0x0120  },	//saRR_IllumTypeF[1] //                                                                      
+{ 0x0F12, 0x0120  },	//saRR_IllumTypeF[2] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[3] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[4] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[5] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[6] //                                                                      
+                        
+                        
+                        
+{ 0x002A, 0x3288  },	//saRR_usDualGammaLutRGBIndoor  //               	                                                                        
+{ 0x0F12, 0x0000  }, //	saRR_usDualGammaLutRGBIndoor[0] //[0] //                                                 
+{ 0x0F12, 0x0008  }, //  saRR_usDualGammaLutRGBIndoor[0] //[1] //                                                       
+{ 0x0F12, 0x0013  }, //  saRR_usDualGammaLutRGBIndoor[0] //[2] //                                                       
+{ 0x0F12, 0x002C  }, //  saRR_usDualGammaLutRGBIndoor[0] //[3] //                                                       
+{ 0x0F12, 0x0062  }, //  saRR_usDualGammaLutRGBIndoor[0] //[4] //                                                       
+{ 0x0F12, 0x00CD  }, //  saRR_usDualGammaLutRGBIndoor[0] //[5] //                                                       
+{ 0x0F12, 0x0129  }, //  saRR_usDualGammaLutRGBIndoor[0] //[6] //                                                       
+{ 0x0F12, 0x0151  }, //  saRR_usDualGammaLutRGBIndoor[0] //[7] //                                                       
+{ 0x0F12, 0x0174  }, //  saRR_usDualGammaLutRGBIndoor[0] //[8] //                                                       
+{ 0x0F12, 0x01AA  }, //  saRR_usDualGammaLutRGBIndoor[0] //[9] //                                                       
+{ 0x0F12, 0x01D7  }, //  saRR_usDualGammaLutRGBIndoor[0] //[10] //                                                      
+{ 0x0F12, 0x01FE  }, //  saRR_usDualGammaLutRGBIndoor[0] //[11] //                                                      
+{ 0x0F12, 0x0221  }, //  saRR_usDualGammaLutRGBIndoor[0] //[12] //                                                      
+{ 0x0F12, 0x025D  }, //  saRR_usDualGammaLutRGBIndoor[0] //[13] //                                                      
+{ 0x0F12, 0x0291  }, //  saRR_usDualGammaLutRGBIndoor[0] //[14] //                                                      
+{ 0x0F12, 0x02EB  }, //  saRR_usDualGammaLutRGBIndoor[0] //[15] //                                                      
+{ 0x0F12, 0x033A  }, //  saRR_usDualGammaLutRGBIndoor[0] //[16] //                                                      
+{ 0x0F12, 0x0380  }, //  saRR_usDualGammaLutRGBIndoor[0] //[17] //                                                      
+{ 0x0F12, 0x03C2  }, //  saRR_usDualGammaLutRGBIndoor[0] //[18] //                                                      
+{ 0x0F12, 0x03FF  }, //  saRR_usDualGammaLutRGBIndoor[0] //[19] //                                                      
+{ 0x0F12, 0x0000  }, //  saRR_usDualGammaLutRGBIndoor[1] //[0] //                                                       
+{ 0x0F12, 0x0008  }, //  saRR_usDualGammaLutRGBIndoor[1] //[1] //                                                       
+{ 0x0F12, 0x0013  }, //  saRR_usDualGammaLutRGBIndoor[1] //[2] //                                                       
+{ 0x0F12, 0x002C  }, //  saRR_usDualGammaLutRGBIndoor[1] //[3] //                                                       
+{ 0x0F12, 0x0062  }, //  saRR_usDualGammaLutRGBIndoor[1] //[4] //                                                       
+{ 0x0F12, 0x00CD  }, //  saRR_usDualGammaLutRGBIndoor[1] //[5] //                                                       
+{ 0x0F12, 0x0129  }, //  saRR_usDualGammaLutRGBIndoor[1] //[6] //                                                       
+{ 0x0F12, 0x0151  }, //  saRR_usDualGammaLutRGBIndoor[1] //[7] //                                                       
+{ 0x0F12, 0x0174  }, //  saRR_usDualGammaLutRGBIndoor[1] //[8] //                                                       
+{ 0x0F12, 0x01AA  }, //  saRR_usDualGammaLutRGBIndoor[1] //[9] //                                                       
+{ 0x0F12, 0x01D7  }, //  saRR_usDualGammaLutRGBIndoor[1] //[10] //                                                      
+{ 0x0F12, 0x01FE  }, //  saRR_usDualGammaLutRGBIndoor[1] //[11] //                                                      
+{ 0x0F12, 0x0221  }, //  saRR_usDualGammaLutRGBIndoor[1] //[12] //                                                      
+{ 0x0F12, 0x025D  }, //  saRR_usDualGammaLutRGBIndoor[1] //[13] //                                                      
+{ 0x0F12, 0x0291  }, //  saRR_usDualGammaLutRGBIndoor[1] //[14] //                                                      
+{ 0x0F12, 0x02EB  }, //  saRR_usDualGammaLutRGBIndoor[1] //[15] //                                                      
+{ 0x0F12, 0x033A  }, //  saRR_usDualGammaLutRGBIndoor[1] //[16] //                                                      
+{ 0x0F12, 0x0380  }, //  saRR_usDualGammaLutRGBIndoor[1] //[17] //                                                      
+{ 0x0F12, 0x03C2  }, //  saRR_usDualGammaLutRGBIndoor[1] //[18] //                                                      
+{ 0x0F12, 0x03FF  }, //  saRR_usDualGammaLutRGBIndoor[1] //[19] //                                                      
+{ 0x0F12, 0x0000  }, //  saRR_usDualGammaLutRGBIndoor[2] //[0] //                                                       
+{ 0x0F12, 0x0008  }, //  saRR_usDualGammaLutRGBIndoor[2] //[1] //                                                       
+{ 0x0F12, 0x0013  }, //  saRR_usDualGammaLutRGBIndoor[2] //[2] //                                                       
+{ 0x0F12, 0x002C  }, //  saRR_usDualGammaLutRGBIndoor[2] //[3] //                                                       
+{ 0x0F12, 0x0062  }, //  saRR_usDualGammaLutRGBIndoor[2] //[4] //                                                       
+{ 0x0F12, 0x00CD  }, //  saRR_usDualGammaLutRGBIndoor[2] //[5] //                                                       
+{ 0x0F12, 0x0129  }, //  saRR_usDualGammaLutRGBIndoor[2] //[6] //                                                       
+{ 0x0F12, 0x0151  }, //  saRR_usDualGammaLutRGBIndoor[2] //[7] //                                                       
+{ 0x0F12, 0x0174  }, //  saRR_usDualGammaLutRGBIndoor[2] //[8] //                                                       
+{ 0x0F12, 0x01AA  }, //  saRR_usDualGammaLutRGBIndoor[2] //[9] //                                                       
+{ 0x0F12, 0x01D7  }, //  saRR_usDualGammaLutRGBIndoor[2] //[10] //                                                      
+{ 0x0F12, 0x01FE  }, //  saRR_usDualGammaLutRGBIndoor[2] //[11] //                                                      
+{ 0x0F12, 0x0221  }, //  saRR_usDualGammaLutRGBIndoor[2] //[12] //                                                      
+{ 0x0F12, 0x025D  }, //  saRR_usDualGammaLutRGBIndoor[2] //[13] //                                                      
+{ 0x0F12, 0x0291  }, //  saRR_usDualGammaLutRGBIndoor[2] //[14] //                                                      
+{ 0x0F12, 0x02EB  }, //  saRR_usDualGammaLutRGBIndoor[2] //[15] //                                                      
+{ 0x0F12, 0x033A  }, //  saRR_usDualGammaLutRGBIndoor[2] //[16] //                                                      
+{ 0x0F12, 0x0380  }, //  saRR_usDualGammaLutRGBIndoor[2] //[17] //                                                      
+{ 0x0F12, 0x03C2  }, //  saRR_usDualGammaLutRGBIndoor[2] //[18] //                                                      
+{ 0x0F12, 0x03FF  }, //  saRR_usDualGammaLutRGBIndoor[2] //[19] //                                                      
+                                               
+                                               
+{ 0x0F12, 0x0000  },	//			saRR_usDualGammaLutRGBOutdoor[0] //[0] //
+{ 0x0F12, 0x0008  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[1] //                                                
+{ 0x0F12, 0x0013  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[2] //                                                
+{ 0x0F12, 0x002C  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[3] //                                                
+{ 0x0F12, 0x0062  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[4] //                                                
+{ 0x0F12, 0x00CD  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[5] //                                                
+{ 0x0F12, 0x0129  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[6] //                                                
+{ 0x0F12, 0x0151  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[7] //                                                
+{ 0x0F12, 0x0174  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[8] //                                                
+{ 0x0F12, 0x01AA  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[9] //                                                
+{ 0x0F12, 0x01D7  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[10] //                                               
+{ 0x0F12, 0x01FE  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[11] //                                               
+{ 0x0F12, 0x0221  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[12] //                                               
+{ 0x0F12, 0x025D  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[13] //                                               
+{ 0x0F12, 0x0291  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[14] //                                               
+{ 0x0F12, 0x02EB  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[15] //                                               
+{ 0x0F12, 0x033A  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[16] //                                               
+{ 0x0F12, 0x0380  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[17] //                                               
+{ 0x0F12, 0x03C2  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[18] //                                               
+{ 0x0F12, 0x03FF  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[19] //                                               
+{ 0x0F12, 0x0000  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[0] //                                                
+{ 0x0F12, 0x0008  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[1] //                                                
+{ 0x0F12, 0x0013  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[2] //                                                
+{ 0x0F12, 0x002C  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[3] //                                                
+{ 0x0F12, 0x0062  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[4] //                                                
+{ 0x0F12, 0x00CD  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[5] //                                                
+{ 0x0F12, 0x0129  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[6] //                                                
+{ 0x0F12, 0x0151  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[7] //                                                
+{ 0x0F12, 0x0174  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[8] //                                                
+{ 0x0F12, 0x01AA  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[9] //                                                
+{ 0x0F12, 0x01D7  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[10] //                                               
+{ 0x0F12, 0x01FE  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[11] //                                               
+{ 0x0F12, 0x0221  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[12] //                                               
+{ 0x0F12, 0x025D  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[13] //                                               
+{ 0x0F12, 0x0291  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[14] //                                               
+{ 0x0F12, 0x02EB  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[15] //                                               
+{ 0x0F12, 0x033A  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[16] //                                               
+{ 0x0F12, 0x0380  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[17] //                                               
+{ 0x0F12, 0x03C2  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[18] //                                               
+{ 0x0F12, 0x03FF  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[19] //                                               
+{ 0x0F12, 0x0000  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[0] //                                                
+{ 0x0F12, 0x0008  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[1] //                                                
+{ 0x0F12, 0x0013  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[2] //                                                
+{ 0x0F12, 0x002C  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[3] //                                                
+{ 0x0F12, 0x0062  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[4] //                                                
+{ 0x0F12, 0x00CD  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[5] //                                                
+{ 0x0F12, 0x0129  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[6] //                                                
+{ 0x0F12, 0x0151  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[7] //                                                
+{ 0x0F12, 0x0174  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[8] //                                                
+{ 0x0F12, 0x01AA  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[9] //                                                
+{ 0x0F12, 0x01D7  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[10] //                                               
+{ 0x0F12, 0x01FE  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[11] //                                               
+{ 0x0F12, 0x0221  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[12] //                                               
+{ 0x0F12, 0x025D  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[13] //                                               
+{ 0x0F12, 0x0291  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[14] //                                               
+{ 0x0F12, 0x02EB  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[15] //                                               
+{ 0x0F12, 0x033A  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[16] //                                               
+{ 0x0F12, 0x0380  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[17] //                                               
+{ 0x0F12, 0x03C2  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[18] //                                               
+{ 0x0F12, 0x03FF  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[19] //                                               
+                                               
+                                               
+{ 0x002A, 0x06A6  },                           
+{ 0x0F12, 0x00C0  },	//saRR_AwbCcmCord[0] //                      
+{ 0x0F12, 0x00E0  },	//saRR_AwbCcmCord[1] //                      
+{ 0x0F12, 0x0110  },	//saRR_AwbCcmCord[2] //                      
+{ 0x0F12, 0x0139  },	//saRR_AwbCcmCord[3] //                      
+{ 0x0F12, 0x0166  },	//saRR_AwbCcmCord[4] //                      
+{ 0x0F12, 0x019F  },	//saRR_AwbCcmCord[5] //                      
+                        
+{ 0x002A, 0x33A4  },    
+{ 0x0F12, 0x0181  },	  //TVAR_wbt_pBaseCcmS[0] //                                                           
+{ 0x0F12, 0xFF88  },   //TVAR_wbt_pBaseCcmS[1] //                                                        
+{ 0x0F12, 0xFF90  },   //TVAR_wbt_pBaseCcmS[2] //                                                        
+{ 0x0F12, 0xFE6B  },   //TVAR_wbt_pBaseCcmS[3] //                                                        
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[4] //                                                        
+{ 0x0F12, 0xFF0B  },   //TVAR_wbt_pBaseCcmS[5] //                                                        
+{ 0x0F12, 0xFFDD  },   //TVAR_wbt_pBaseCcmS[6] //                                                        
+{ 0x0F12, 0xFFEE  },   //TVAR_wbt_pBaseCcmS[7] //                                                        
+{ 0x0F12, 0x01CB  },   //TVAR_wbt_pBaseCcmS[8] //                                                        
+{ 0x0F12, 0x0187  },   //TVAR_wbt_pBaseCcmS[9] //                                                        
+{ 0x0F12, 0x00A6  },   //TVAR_wbt_pBaseCcmS[10] //                                                       
+{ 0x0F12, 0xFEBE  },   //TVAR_wbt_pBaseCcmS[11] //                                                       
+{ 0x0F12, 0x021C  },   //TVAR_wbt_pBaseCcmS[12] //                                                       
+{ 0x0F12, 0xFF5F  },   //TVAR_wbt_pBaseCcmS[13] //                                                       
+{ 0x0F12, 0x0175  },   //TVAR_wbt_pBaseCcmS[14] //                                                       
+{ 0x0F12, 0xFEE7  },   //TVAR_wbt_pBaseCcmS[15] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[16] //                                                       
+{ 0x0F12, 0x00F3  },   //TVAR_wbt_pBaseCcmS[17] //                                                       
+                       
+{ 0x0F12, 0x0181  },   //TVAR_wbt_pBaseCcmS[18] //                                                       
+{ 0x0F12, 0xFF88  },   //TVAR_wbt_pBaseCcmS[19] //                                                       
+{ 0x0F12, 0xFF90  },   //TVAR_wbt_pBaseCcmS[20] //                                                       
+{ 0x0F12, 0xFE6B  },   //TVAR_wbt_pBaseCcmS[21] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[22] //                                                       
+{ 0x0F12, 0xFF0B  },   //TVAR_wbt_pBaseCcmS[23] //                                                       
+{ 0x0F12, 0xFFDD  },   //TVAR_wbt_pBaseCcmS[24] //                                                       
+{ 0x0F12, 0xFFEE  },   //TVAR_wbt_pBaseCcmS[25] //                                                       
+{ 0x0F12, 0x01CB  },   //TVAR_wbt_pBaseCcmS[26] //                                                       
+{ 0x0F12, 0x0187  },   //TVAR_wbt_pBaseCcmS[27] //                                                       
+{ 0x0F12, 0x00A6  },   //TVAR_wbt_pBaseCcmS[28] //                                                       
+{ 0x0F12, 0xFEBE  },   //TVAR_wbt_pBaseCcmS[29] //                                                       
+{ 0x0F12, 0x021C  },   //TVAR_wbt_pBaseCcmS[30] //                                                       
+{ 0x0F12, 0xFF5F  },   //TVAR_wbt_pBaseCcmS[31] //                                                       
+{ 0x0F12, 0x0175  },   //TVAR_wbt_pBaseCcmS[32] //                                                       
+{ 0x0F12, 0xFEE7  },   //TVAR_wbt_pBaseCcmS[33] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[34] //                                                       
+{ 0x0F12, 0x00F3  },   //TVAR_wbt_pBaseCcmS[35] //                                                       
+                       
+{ 0x0F12, 0x0181  },   //TVAR_wbt_pBaseCcmS[36] //                                                       
+{ 0x0F12, 0xFF88  },   //TVAR_wbt_pBaseCcmS[37] //                                                       
+{ 0x0F12, 0xFF90  },   //TVAR_wbt_pBaseCcmS[38] //                                                       
+{ 0x0F12, 0xFE6B  },   //TVAR_wbt_pBaseCcmS[39] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[40] //                                                       
+{ 0x0F12, 0xFF0B  },   //TVAR_wbt_pBaseCcmS[41] //                                                       
+{ 0x0F12, 0xFFDD  },   //TVAR_wbt_pBaseCcmS[42] //                                                       
+{ 0x0F12, 0xFFEE  },   //TVAR_wbt_pBaseCcmS[43] //                                                       
+{ 0x0F12, 0x01CB  },   //TVAR_wbt_pBaseCcmS[44] //                                                       
+{ 0x0F12, 0x0187  },   //TVAR_wbt_pBaseCcmS[45] //                                                       
+{ 0x0F12, 0x00A6  },   //TVAR_wbt_pBaseCcmS[46] //                                                       
+{ 0x0F12, 0xFEBE  },   //TVAR_wbt_pBaseCcmS[47] //                                                       
+{ 0x0F12, 0x021C  },   //TVAR_wbt_pBaseCcmS[48] //                                                       
+{ 0x0F12, 0xFF5F  },   //TVAR_wbt_pBaseCcmS[49] //                                                       
+{ 0x0F12, 0x0175  },   //TVAR_wbt_pBaseCcmS[50] //                                                       
+{ 0x0F12, 0xFEE7  },   //TVAR_wbt_pBaseCcmS[51] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[52] //                                                       
+{ 0x0F12, 0x00F3  },   //TVAR_wbt_pBaseCcmS[53] //                                                                        
+                       
+{ 0x0F12, 0x01D4  },  //01E9 01FD 01FA   //TVAR_wbt_pBaseCcmS[54] //                                                       
+{ 0x0F12, 0xFFC3  },  //FFB7 FFAB FF9B   //TVAR_wbt_pBaseCcmS[55] //                                                       
+{ 0x0F12, 0xFFFE  },  //FFF5 FFED FFFF   //TVAR_wbt_pBaseCcmS[56] //                                                       
+{ 0x0F12, 0xFEB5  },  //FEB5 FEB5 FE9F   //TVAR_wbt_pBaseCcmS[57] //                                                       
+{ 0x0F12, 0x0112  },  //0112 0112 010F   //TVAR_wbt_pBaseCcmS[58] //                                                       
+{ 0x0F12, 0xFEDC  },  //FEDC FEDC FEF5   //TVAR_wbt_pBaseCcmS[59] //                                                       
+{ 0x0F12, 0xFFD2  },  //FFD2 FFD2 FFD2   //TVAR_wbt_pBaseCcmS[60] //                                                       
+{ 0x0F12, 0x0015  },  //0015 0015 0015   //TVAR_wbt_pBaseCcmS[61] //                                                       
+{ 0x0F12, 0x01A1  },  //01A1 01A1 01A1   //TVAR_wbt_pBaseCcmS[62] //                                                       
+{ 0x0F12, 0x0111  },  //0111 0111 0111   //TVAR_wbt_pBaseCcmS[63] //                                                       
+{ 0x0F12, 0x009D  },  //009D 009D 009D   //TVAR_wbt_pBaseCcmS[64] //                                                       
+{ 0x0F12, 0xFECB  },  //FECB FECB FECB   //TVAR_wbt_pBaseCcmS[65] //                                                       
+{ 0x0F12, 0x01FC  },  //01FC 01FC 01FC   //TVAR_wbt_pBaseCcmS[66] //                                                       
+{ 0x0F12, 0xFF99  },  //FF99 FF99 FF99   //TVAR_wbt_pBaseCcmS[67] //                                                       
+{ 0x0F12, 0x01A9  },  //01A9 01A9 01A9   //TVAR_wbt_pBaseCcmS[68] //                                                       
+{ 0x0F12, 0xFF26  },  //FF26 FF26 FF26   //TVAR_wbt_pBaseCcmS[69] //                                                       
+{ 0x0F12, 0x012B  },  //012B 012B 012B   //TVAR_wbt_pBaseCcmS[70] //                                                       
+{ 0x0F12, 0x00DF  },  //00DF 00DF 00DF   //TVAR_wbt_pBaseCcmS[71] //    
+                           
+{ 0x0F12, 0x01B9  },  //01CE 01E3 01E2   //TVAR_wbt_pBaseCcmS[72] //                                                 
+{ 0x0F12, 0xFFBC  },  //FFB0 FFA4 FF9A   //TVAR_wbt_pBaseCcmS[73] //                                                 
+{ 0x0F12, 0xFFED  },  //FFE4 FFDB FFE7   //TVAR_wbt_pBaseCcmS[74] //                                                 
+{ 0x0F12, 0xFEB5  },  //FEB5 FEB5 FE9F   //TVAR_wbt_pBaseCcmS[75] //                                                 
+{ 0x0F12, 0x0112  },  //0112 0112 010F   //TVAR_wbt_pBaseCcmS[76] //                                                 
+{ 0x0F12, 0xFEDC  },  //FEDC FEDC FEF5   //TVAR_wbt_pBaseCcmS[77] //                                                 
+{ 0x0F12, 0xFFD2  },  //FFD2 FFD2 FFD2   //TVAR_wbt_pBaseCcmS[78] //                                                 
+{ 0x0F12, 0xFFFE  },  //FFFE FFFE FFFE   //TVAR_wbt_pBaseCcmS[79] //                                                 
+{ 0x0F12, 0x01B7  },  //01B7 01B7 01B7   //TVAR_wbt_pBaseCcmS[80] //                                                 
+{ 0x0F12, 0x00E8  },  //00E8 00E8 00E8   //TVAR_wbt_pBaseCcmS[81] //                                                 
+{ 0x0F12, 0x0095  },  //0095 0095 0095   //TVAR_wbt_pBaseCcmS[82] //                                                 
+{ 0x0F12, 0xFF0D  },  //FF0D FF0D FF0D   //TVAR_wbt_pBaseCcmS[83] //                                                 
+{ 0x0F12, 0x0182  },  //0182 0182 0182   //TVAR_wbt_pBaseCcmS[84] //                                                 
+{ 0x0F12, 0xFF29  },  //FF29 FF29 FF29   //TVAR_wbt_pBaseCcmS[85] //                                                 
+{ 0x0F12, 0x0146  },  //0146 0146 0146   //TVAR_wbt_pBaseCcmS[86] //                                                 
+{ 0x0F12, 0xFF26  },  //FF26 FF26 FF26   //TVAR_wbt_pBaseCcmS[87] //                                                 
+{ 0x0F12, 0x012B  },  //012B 012B 012B   //TVAR_wbt_pBaseCcmS[88] //                                                 
+{ 0x0F12, 0x00DF  },  //00DF 00DF 00DF   //TVAR_wbt_pBaseCcmS[89] //                                                                         
+                  
+{ 0x0F12, 0x01B9  },  //01CE 01E3 01E2   //TVAR_wbt_pBaseCcmS[90] //                                                 
+{ 0x0F12, 0xFFBC  },  //FFB0 FFA4 FF9A   //TVAR_wbt_pBaseCcmS[91] //                                                 
+{ 0x0F12, 0xFFED  },  //FFE4 FFDB FFE7   //TVAR_wbt_pBaseCcmS[92] //                                                 
+{ 0x0F12, 0xFEB5  },  //FEB5 FEB5 FE9F   //TVAR_wbt_pBaseCcmS[93] //                                                 
+{ 0x0F12, 0x0112  },  //0112 0112 010F   //TVAR_wbt_pBaseCcmS[94] //                                                 
+{ 0x0F12, 0xFEDC  },  //FEDC FEDC FEF5   //TVAR_wbt_pBaseCcmS[95] //                                                 
+{ 0x0F12, 0xFFD2  },  //FFD2 FFD2 FFD2   //TVAR_wbt_pBaseCcmS[96] //                                                 
+{ 0x0F12, 0xFFFE  },  //FFFE FFFE FFFE   //TVAR_wbt_pBaseCcmS[97] //                                                 
+{ 0x0F12, 0x01B7  },  //01B7 01B7 01B7   //TVAR_wbt_pBaseCcmS[98] //                                                 
+{ 0x0F12, 0x00E8  },  //00E8 00E8 00E8   //TVAR_wbt_pBaseCcmS[99] //                                                 
+{ 0x0F12, 0x0095  },  //0095 0095 0095   //TVAR_wbt_pBaseCcmS[100] //                                                
+{ 0x0F12, 0xFF0D  },  //FF0D FF0D FF0D   //TVAR_wbt_pBaseCcmS[101] //                                                
+{ 0x0F12, 0x0182  },  //0182 0182 0182   //TVAR_wbt_pBaseCcmS[102] //                                                
+{ 0x0F12, 0xFF29  },  //FF29 FF29 FF29   //TVAR_wbt_pBaseCcmS[103] //                                                
+{ 0x0F12, 0x0146  },  //0146 0146 0146   //TVAR_wbt_pBaseCcmS[104] //                                                
+{ 0x0F12, 0xFF26  },  //FF26 FF26 FF26   //TVAR_wbt_pBaseCcmS[105] //                                                
+{ 0x0F12, 0x012B  },  //012B 012B 012B   //TVAR_wbt_pBaseCcmS[106] //                                                
+{ 0x0F12, 0x00DF  },  //00DF 00DF 00DF   //TVAR_wbt_pBaseCcmS[107] //                                                
+                                          
+{ 0x002A, 0x3380  },  //12çŸ«å¼¥åˆ©     
+{ 0x0F12, 0x01E5  },  //01E5 020E 0223   //0223  //01F3  //01F3  //TVAR_wbt_pOutdoorCcm[0] //  
+{ 0x0F12, 0xFFA0  },  //FFA0 FF88 FF7C   //FF7C  //FFA4  //FFA4  //TVAR_wbt_pOutdoorCcm[1] //  
+{ 0x0F12, 0xFFDF  },  //FFDF FFCE FFC5   //FFC5  //FFE4  //FFE4  //TVAR_wbt_pOutdoorCcm[2] //  
+{ 0x0F12, 0xFE3D  },  //FE3D FE3D FE3D   //FE3D  //FE3D  //FE23  //TVAR_wbt_pOutdoorCcm[3] //  
+{ 0x0F12, 0x0158  },  //0158 0158 0158   //0158  //0158  //017D  //TVAR_wbt_pOutdoorCcm[4] //  
+{ 0x0F12, 0xFF03  },  //FF03 FF03 FF03   //FF03  //FF03  //FEF9  //TVAR_wbt_pOutdoorCcm[5] //  
+{ 0x0F12, 0xFFD2  },  //FFBB FF99 FF9F   //FF9F  //FF9F  //FF9F  //TVAR_wbt_pOutdoorCcm[6] //  
+{ 0x0F12, 0x0002  },  //FFF0 0018 0011   //0011  //0011  //0011  //TVAR_wbt_pOutdoorCcm[7] //  
+{ 0x0F12, 0x0211  },  //023A 0235 0237   //0237  //0237  //0237  //TVAR_wbt_pOutdoorCcm[8] //  
+{ 0x0F12, 0x00F6  },  //00EB 0101 00EB   //00D1  //012A  //0143  //TVAR_wbt_pOutdoorCcm[9] //  
+{ 0x0F12, 0x0120  },  //012A 0116 012A   //0125  //00CA  //00F6  //TVAR_wbt_pOutdoorCcm[10] // 
+{ 0x0F12, 0xFF01  },  //FF02 FF00 FF02   //FEF5  //FEF6  //FEB1  //TVAR_wbt_pOutdoorCcm[11] // 
+{ 0x0F12, 0x01A4  },  //01A4 01C5 01C5   //01C5  //01C5  //01C5  //TVAR_wbt_pOutdoorCcm[12] // 
+{ 0x0F12, 0xFF95  },  //FF95 FF80 FF80   //FF80  //FF80  //FF80  //TVAR_wbt_pOutdoorCcm[13] // 
+{ 0x0F12, 0x01A9  },  //01A9 019D 019D   //019D  //019D  //019D  //TVAR_wbt_pOutdoorCcm[14] // 
+{ 0x0F12, 0xFEA3  },  //FE7A FE7A FE7A   //FE7A  //FE7A  //FE7A  //TVAR_wbt_pOutdoorCcm[15] // 
+{ 0x0F12, 0x0164  },  //0179 0179 0179   //0179  //0179  //0179  //TVAR_wbt_pOutdoorCcm[16] // 
+{ 0x0F12, 0x0164  },  //0179 0179 0179   //0179  //0179  //0179  //TVAR_wbt_pOutdoorCcm[17] // 
+                      
+                           
+                           
+{ 0x002A, 0x0764  },       
+{ 0x0F12, 0x0049  },	//afit_uNoiseIndInDoor[0] //                                                                         
+{ 0x0F12, 0x005F  },	//afit_uNoiseIndInDoor[1] //                                                                         
+{ 0x0F12, 0x00CB  },	//afit_uNoiseIndInDoor[2] // 203//                                                                   
+{ 0x0F12, 0x01E0  },	//afit_uNoiseIndInDoor[3] // Indoor_NB below 1500 _Noise index 300-400d //                           
+{ 0x0F12, 0x0220  },	//afit_uNoiseIndInDoor[4] // DNP NB 4600 _ Noisenidex :560d-230h //                                  
+                           
+                           
+{ 0x002A, 0x07C4  },       
+{ 0x0F12, 0x0014  },	//700007C4 //TVAR_afit_pBaseValS[0] // AFIT16_BRIGHTNESS                                                                                  
+{ 0x0F12, 0x0000  },	//700007C6 //TVAR_afit_pBaseValS[1] // AFIT16_CONTRAST                                                                                    
+{ 0x0F12, 0x0014  },	//700007C8 //TVAR_afit_pBaseValS[2] // AFIT16_SATURATION                                                                                  
+{ 0x0F12, 0x0000  },	//700007CA //TVAR_afit_pBaseValS[3] // AFIT16_SHARP_BLUR                                                                                  
+{ 0x0F12, 0x0000  },	//700007CC //TVAR_afit_pBaseValS[4] // AFIT16_GLAMOUR                                                                                     
+{ 0x0F12, 0x00C1  },	//700007CE //TVAR_afit_pBaseValS[5] // AFIT16_sddd8a_edge_high                                                                            
+{ 0x0F12, 0x03FF  },	//700007D0 //TVAR_afit_pBaseValS[6] // AFIT16_Demosaicing_iSatVal                                                                         
+{ 0x0F12, 0x009C  },	//700007D2 //TVAR_afit_pBaseValS[7] // AFIT16_Sharpening_iReduceEdgeThresh                                                                
+{ 0x0F12, 0x0251  },	//700007D4 //TVAR_afit_pBaseValS[8] // AFIT16_demsharpmix1_iRGBOffset                                                                     
+{ 0x0F12, 0x03FF  },	//700007D6 //TVAR_afit_pBaseValS[9] // AFIT16_demsharpmix1_iDemClamp                                                                      
+{ 0x0F12, 0x000C  },	//700007D8 //TVAR_afit_pBaseValS[10] //AFIT16_demsharpmix1_iLowThreshold                                                                  
+{ 0x0F12, 0x0010  },	//700007DA //TVAR_afit_pBaseValS[11] //AFIT16_demsharpmix1_iHighThreshold                                                                 
+{ 0x0F12, 0x012C  },	//700007DC //TVAR_afit_pBaseValS[12] //AFIT16_demsharpmix1_iLowBright                                                                     
+{ 0x0F12, 0x03E8  },	//700007DE //TVAR_afit_pBaseValS[13] //AFIT16_demsharpmix1_iHighBright                                                                    
+{ 0x0F12, 0x0046  },	//700007E0 //TVAR_afit_pBaseValS[14] //AFIT16_demsharpmix1_iLowSat                                                                        
+{ 0x0F12, 0x005A  },	//700007E2 //TVAR_afit_pBaseValS[15] //AFIT16_demsharpmix1_iHighSat                                                                       
+{ 0x0F12, 0x0070  },	//700007E4 //TVAR_afit_pBaseValS[16] //AFIT16_demsharpmix1_iTune                                                                          
+{ 0x0F12, 0x0000  },	//700007E6 //TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0000  },	//700007E8 //TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh                                                                    
+{ 0x0F12, 0x01AA  },	//700007EA //TVAR_afit_pBaseValS[19] //AFIT16_demsharpmix1_iHystCenter                                                                    
+{ 0x0F12, 0x003C  },	//700007EC //TVAR_afit_pBaseValS[20] //AFIT16_YUV422_DENOISE_iUVLowThresh                                                                 
+{ 0x0F12, 0x003C  },	//700007EE //TVAR_afit_pBaseValS[21] //AFIT16_YUV422_DENOISE_iUVHighThresh                                                                
+{ 0x0F12, 0x0000  },	//700007F0 //TVAR_afit_pBaseValS[22] //AFIT16_YUV422_DENOISE_iYLowThresh                                                                  
+{ 0x0F12, 0x0000  },	//700007F2 //TVAR_afit_pBaseValS[23] //AFIT16_YUV422_DENOISE_iYHighThresh                                                                 
+{ 0x0F12, 0x003E  },	//700007F4 //TVAR_afit_pBaseValS[24] //AFIT16_Sharpening_iLowSharpClamp                                                                   
+{ 0x0F12, 0x0008  },	//700007F6 //TVAR_afit_pBaseValS[25] //AFIT16_Sharpening_iHighSharpClamp                                                                  
+{ 0x0F12, 0x003C  },	//700007F8 //TVAR_afit_pBaseValS[26] //AFIT16_Sharpening_iLowSharpClamp_Bin                                                               
+{ 0x0F12, 0x001E  },	//700007FA //TVAR_afit_pBaseValS[27] //AFIT16_Sharpening_iHighSharpClamp_Bin                                                              
+{ 0x0F12, 0x003C  },	//700007FC //TVAR_afit_pBaseValS[28] //AFIT16_Sharpening_iLowSharpClamp_sBin                                                              
+{ 0x0F12, 0x001E  },	//700007FE //TVAR_afit_pBaseValS[29] //AFIT16_Sharpening_iHighSharpClamp_sBin                                                             
+{ 0x0F12, 0x0A24  },	//70000800 //TVAR_afit_pBaseValS[30] //AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                     
+{ 0x0F12, 0x1701  },	//70000802 //TVAR_afit_pBaseValS[31] //AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                      
+{ 0x0F12, 0x0229  },	//70000804 //TVAR_afit_pBaseValS[32] //AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                            
+{ 0x0F12, 0x1403  },	//70000806 //TVAR_afit_pBaseValS[33] //AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                 
+{ 0x0F12, 0x0000  },	//70000808 //TVAR_afit_pBaseValS[34] //AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                               
+{ 0x0F12, 0x0000  },	//7000080A //TVAR_afit_pBaseValS[35] //AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                             
+{ 0x0F12, 0x0000  },	//7000080C //TVAR_afit_pBaseValS[36] //AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                              
+{ 0x0F12, 0x00FF  },	//7000080E //TVAR_afit_pBaseValS[37] //AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                       
+{ 0x0F12, 0x045A  },	//70000810 //TVAR_afit_pBaseValS[38] //AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                                
+{ 0x0F12, 0x1414  },	//70000812 //TVAR_afit_pBaseValS[39] //AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                  
+{ 0x0F12, 0x0301  },	//70000814 //TVAR_afit_pBaseValS[40] //AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                          
+{ 0x0F12, 0xFF07  },	//70000816 //TVAR_afit_pBaseValS[41] //AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                          
+{ 0x0F12, 0x081E  },	//70000818 //TVAR_afit_pBaseValS[42] //AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                     
+{ 0x0F12, 0x0A14  },	//7000081A //TVAR_afit_pBaseValS[43] //AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                        
+{ 0x0F12, 0x0F0F  },	//7000081C //TVAR_afit_pBaseValS[44] //AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                    
+{ 0x0F12, 0x0A00  },	//7000081E //TVAR_afit_pBaseValS[45] //AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                 
+{ 0x0F12, 0x0032  },	//70000820 //TVAR_afit_pBaseValS[46] //AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                             
+{ 0x0F12, 0x000E  },	//70000822 //TVAR_afit_pBaseValS[47] //AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                             
+{ 0x0F12, 0x0002  },	//70000824 //TVAR_afit_pBaseValS[48] //AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                      
+{ 0x0F12, 0x00FF  },	//70000826 //TVAR_afit_pBaseValS[49] //AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                     
+{ 0x0F12, 0x1102  },	//70000828 //TVAR_afit_pBaseValS[50] //AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                          
+{ 0x0F12, 0x001B  },	//7000082A //TVAR_afit_pBaseValS[51] //AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                            
+{ 0x0F12, 0x0900  },	//7000082C //TVAR_afit_pBaseValS[52] //AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                       
+{ 0x0F12, 0x0600  },	//7000082E //TVAR_afit_pBaseValS[53] //AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                      
+{ 0x0F12, 0x0504  },	//70000830 //TVAR_afit_pBaseValS[54] //AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                   
+{ 0x0F12, 0x0306  },	//70000832 //TVAR_afit_pBaseValS[55] //AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                      
+{ 0x0F12, 0x4603  },	//70000834 //TVAR_afit_pBaseValS[56] //AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                       
+{ 0x0F12, 0x0480  },	//70000836 //TVAR_afit_pBaseValS[57] //AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                              
+{ 0x0F12, 0x003C  },	//70000838 //TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                  
+{ 0x0F12, 0x0080  },	//7000083A //TVAR_afit_pBaseValS[59] //AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                   
+{ 0x0F12, 0x0101  },	//7000083C //TVAR_afit_pBaseValS[60] //AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                             
+{ 0x0F12, 0x0707  },	//7000083E //TVAR_afit_pBaseValS[61] //AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                                
+{ 0x0F12, 0x4601  },	//70000840 //TVAR_afit_pBaseValS[62] //AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                 
+{ 0x0F12, 0x4944  },	//70000842 //TVAR_afit_pBaseValS[63] //AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                                
+{ 0x0F12, 0x5044  },	//70000844 //TVAR_afit_pBaseValS[64] //AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                            
+{ 0x0F12, 0x0500  },	//70000846 //TVAR_afit_pBaseValS[65] //AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]             
+{ 0x0F12, 0x0003  },	//70000848 //TVAR_afit_pBaseValS[66] //AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                   
+{ 0x0F12, 0x5400  },	//7000084A //TVAR_afit_pBaseValS[67] //AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                 
+{ 0x0F12, 0x0714  },	//7000084C //TVAR_afit_pBaseValS[68] //AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]           
+{ 0x0F12, 0x32FF  },	//7000084E //TVAR_afit_pBaseValS[69] //AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                        
+{ 0x0F12, 0x5A04  },	//70000850 //TVAR_afit_pBaseValS[70] //AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                     
+{ 0x0F12, 0x201E  },	//70000852 //TVAR_afit_pBaseValS[71] //AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                     
+{ 0x0F12, 0x4012  },	//70000854 //TVAR_afit_pBaseValS[72] //AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]                
+{ 0x0F12, 0x0204  },	//70000856 //TVAR_afit_pBaseValS[73] //AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]                
+{ 0x0F12, 0x1403  },	//70000858 //TVAR_afit_pBaseValS[74] //AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                  
+{ 0x0F12, 0x0114  },	//7000085A //TVAR_afit_pBaseValS[75] //AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                      
+{ 0x0F12, 0x0101  },	//7000085C //TVAR_afit_pBaseValS[76] //AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                       
+{ 0x0F12, 0x4446  },	//7000085E //TVAR_afit_pBaseValS[77] //AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                           
+{ 0x0F12, 0x646E  },	//70000860 //TVAR_afit_pBaseValS[78] //AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                     
+{ 0x0F12, 0x0028  },	//70000862 //TVAR_afit_pBaseValS[79] //AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]             
+{ 0x0F12, 0x030A  },	//70000864 //TVAR_afit_pBaseValS[80] //AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]       
+{ 0x0F12, 0x0000  },	//70000866 //TVAR_afit_pBaseValS[81] //AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]          
+{ 0x0F12, 0x141E  },	//70000868 //TVAR_afit_pBaseValS[82] //AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]          
+{ 0x0F12, 0xFF07  },	//7000086A //TVAR_afit_pBaseValS[83] //AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]       
+{ 0x0F12, 0x0432  },	//7000086C //TVAR_afit_pBaseValS[84] //AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]              
+{ 0x0F12, 0x0000  },	//7000086E //TVAR_afit_pBaseValS[85] //AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]            
+{ 0x0F12, 0x0F0F  },	//70000870 //TVAR_afit_pBaseValS[86] //AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]              
+{ 0x0F12, 0x0440  },	//70000872 //TVAR_afit_pBaseValS[87] //AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]       
+{ 0x0F12, 0x0302  },	//70000874 //TVAR_afit_pBaseValS[88] //AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]       
+{ 0x0F12, 0x1414  },	//70000876 //TVAR_afit_pBaseValS[89] //AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                   
+{ 0x0F12, 0x0101  },	//70000878 //TVAR_afit_pBaseValS[90] //AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                      
+{ 0x0F12, 0x4601  },	//7000087A //TVAR_afit_pBaseValS[91] //AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                       
+{ 0x0F12, 0x6E44  },	//7000087C //TVAR_afit_pBaseValS[92] //AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                      
+{ 0x0F12, 0x2864  },	//7000087E //TVAR_afit_pBaseValS[93] //AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                  
+{ 0x0F12, 0x0A00  },	//70000880 //TVAR_afit_pBaseValS[94] //AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]    
+{ 0x0F12, 0x0003  },	//70000882 //TVAR_afit_pBaseValS[95] //AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]        
+{ 0x0F12, 0x1E00  },	//70000884 //TVAR_afit_pBaseValS[96] //AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]       
+{ 0x0F12, 0x0714  },	//70000886 //TVAR_afit_pBaseValS[97] //AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8]  
+{ 0x0F12, 0x32FF  },	//70000888 //TVAR_afit_pBaseValS[98] //AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]              
+{ 0x0F12, 0x0004  },	//7000088A //TVAR_afit_pBaseValS[99] //AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]           
+{ 0x0F12, 0x0F00  },	//7000088C //TVAR_afit_pBaseValS[100] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x400F  },	//7000088E //TVAR_afit_pBaseValS[101] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000890 //TVAR_afit_pBaseValS[102] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000892 //TVAR_afit_pBaseValS[103] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000894 //TVAR_afit_pBaseValS[104] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000896 //TVAR_afit_pBaseValS[105] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0014  },	//70000898 //TVAR_afit_pBaseValS[106] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//7000089A //TVAR_afit_pBaseValS[107] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//7000089C //TVAR_afit_pBaseValS[108] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//7000089E //TVAR_afit_pBaseValS[109] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//700008A0 //TVAR_afit_pBaseValS[110] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//700008A2 //TVAR_afit_pBaseValS[111] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//700008A4 //TVAR_afit_pBaseValS[112] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//700008A6 //TVAR_afit_pBaseValS[113] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//700008A8 //TVAR_afit_pBaseValS[114] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//700008AA //TVAR_afit_pBaseValS[115] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x012C  },	//700008AC //TVAR_afit_pBaseValS[116] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x03E8  },	//700008AE //TVAR_afit_pBaseValS[117] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0046  },	//700008B0 //TVAR_afit_pBaseValS[118] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x005A  },	//700008B2 //TVAR_afit_pBaseValS[119] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//700008B4 //TVAR_afit_pBaseValS[120] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//700008B6 //TVAR_afit_pBaseValS[121] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//700008B8 //TVAR_afit_pBaseValS[122] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x01AE  },	//700008BA //TVAR_afit_pBaseValS[123] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x001E  },	//700008BC //TVAR_afit_pBaseValS[124] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x001E  },	//700008BE //TVAR_afit_pBaseValS[125] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//700008C0 //TVAR_afit_pBaseValS[126] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//700008C2 //TVAR_afit_pBaseValS[127] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x003E  },	//700008C4 //TVAR_afit_pBaseValS[128] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0008  },	//700008C6 //TVAR_afit_pBaseValS[129] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x003C  },	//700008C8 //TVAR_afit_pBaseValS[130] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x001E  },	//700008CA //TVAR_afit_pBaseValS[131] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x003C  },	//700008CC //TVAR_afit_pBaseValS[132] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x001E  },	//700008CE //TVAR_afit_pBaseValS[133] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//700008D0 //TVAR_afit_pBaseValS[134] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//700008D2 //TVAR_afit_pBaseValS[135] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//700008D4 //TVAR_afit_pBaseValS[136] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x1403  },	//700008D6 //TVAR_afit_pBaseValS[137] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x0000  },	//700008D8 //TVAR_afit_pBaseValS[138] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0000  },	//700008DA //TVAR_afit_pBaseValS[139] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0000  },	//700008DC //TVAR_afit_pBaseValS[140] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//700008DE //TVAR_afit_pBaseValS[141] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x045A  },	//700008E0 //TVAR_afit_pBaseValS[142] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//700008E2 //TVAR_afit_pBaseValS[143] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//700008E4 //TVAR_afit_pBaseValS[144] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//700008E6 //TVAR_afit_pBaseValS[145] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x081E  },	//700008E8 //TVAR_afit_pBaseValS[146] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A14  },	//700008EA //TVAR_afit_pBaseValS[147] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0F0F  },	//700008EC //TVAR_afit_pBaseValS[148] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A00  },	//700008EE //TVAR_afit_pBaseValS[149] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x0032  },	//700008F0 //TVAR_afit_pBaseValS[150] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x000E  },	//700008F2 //TVAR_afit_pBaseValS[151] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0002  },	//700008F4 //TVAR_afit_pBaseValS[152] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//700008F6 //TVAR_afit_pBaseValS[153] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1102  },	//700008F8 //TVAR_afit_pBaseValS[154] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001B  },	//700008FA //TVAR_afit_pBaseValS[155] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//700008FC //TVAR_afit_pBaseValS[156] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//700008FE //TVAR_afit_pBaseValS[157] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//70000900 //TVAR_afit_pBaseValS[158] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0306  },	//70000902 //TVAR_afit_pBaseValS[159] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x4603  },	//70000904 //TVAR_afit_pBaseValS[160] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0480  },	//70000906 //TVAR_afit_pBaseValS[161] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0046  },	//70000908 //TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//7000090A //TVAR_afit_pBaseValS[163] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x0101  },	//7000090C //TVAR_afit_pBaseValS[164] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0707  },	//7000090E //TVAR_afit_pBaseValS[165] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x1E01  },	//70000910 //TVAR_afit_pBaseValS[166] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x491E  },	//70000912 //TVAR_afit_pBaseValS[167] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /
+{ 0x0F12, 0x5044  },	//70000914 //TVAR_afit_pBaseValS[168] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0500  },	//70000916 //TVAR_afit_pBaseValS[169] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x0004  },	//70000918 //TVAR_afit_pBaseValS[170] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /
+{ 0x0F12, 0x3C0A  },	//7000091A //TVAR_afit_pBaseValS[171] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x0714  },	//7000091C //TVAR_afit_pBaseValS[172] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /
+{ 0x0F12, 0x3214  },	//7000091E //TVAR_afit_pBaseValS[173] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x5A03  },	//70000920 //TVAR_afit_pBaseValS[174] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x121E  },	//70000922 //TVAR_afit_pBaseValS[175] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//70000924 //TVAR_afit_pBaseValS[176] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//70000926 //TVAR_afit_pBaseValS[177] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x1E06  },	//70000928 //TVAR_afit_pBaseValS[178] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x011E  },	//7000092A //TVAR_afit_pBaseValS[179] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//7000092C //TVAR_afit_pBaseValS[180] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x3A3C  },	//7000092E //TVAR_afit_pBaseValS[181] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x585A  },	//70000930 //TVAR_afit_pBaseValS[182] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000932 //TVAR_afit_pBaseValS[183] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000934 //TVAR_afit_pBaseValS[184] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0000  },	//70000936 //TVAR_afit_pBaseValS[185] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x141E  },	//70000938 //TVAR_afit_pBaseValS[186] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF07  },	//7000093A //TVAR_afit_pBaseValS[187] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//7000093C //TVAR_afit_pBaseValS[188] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x0000  },	//7000093E //TVAR_afit_pBaseValS[189] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x0F0F  },	//70000940 //TVAR_afit_pBaseValS[190] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000942 //TVAR_afit_pBaseValS[191] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000944 //TVAR_afit_pBaseValS[192] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x1E1E  },	//70000946 //TVAR_afit_pBaseValS[193] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000948 //TVAR_afit_pBaseValS[194] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x3C01  },	//7000094A //TVAR_afit_pBaseValS[195] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x5A3A  },	//7000094C //TVAR_afit_pBaseValS[196] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x2858  },	//7000094E //TVAR_afit_pBaseValS[197] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000950 //TVAR_afit_pBaseValS[198] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x0003  },	//70000952 //TVAR_afit_pBaseValS[199] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1E00  },	//70000954 //TVAR_afit_pBaseValS[200] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x0714  },	//70000956 //TVAR_afit_pBaseValS[201] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000958 //TVAR_afit_pBaseValS[202] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x0004  },	//7000095A //TVAR_afit_pBaseValS[203] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x0F00  },	//7000095C //TVAR_afit_pBaseValS[204] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x400F  },	//7000095E //TVAR_afit_pBaseValS[205] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000960 //TVAR_afit_pBaseValS[206] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000962 //TVAR_afit_pBaseValS[207] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000964 //TVAR_afit_pBaseValS[208] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000966 //TVAR_afit_pBaseValS[209] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0000  },	//70000968 //TVAR_afit_pBaseValS[210] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//7000096A //TVAR_afit_pBaseValS[211] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//7000096C //TVAR_afit_pBaseValS[212] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//7000096E //TVAR_afit_pBaseValS[213] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//70000970 //TVAR_afit_pBaseValS[214] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//70000972 //TVAR_afit_pBaseValS[215] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//70000974 //TVAR_afit_pBaseValS[216] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//70000976 //TVAR_afit_pBaseValS[217] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//70000978 //TVAR_afit_pBaseValS[218] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//7000097A //TVAR_afit_pBaseValS[219] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x012C  },	//7000097C //TVAR_afit_pBaseValS[220] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x03E8  },	//7000097E //TVAR_afit_pBaseValS[221] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0046  },	//70000980 //TVAR_afit_pBaseValS[222] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x005A  },	//70000982 //TVAR_afit_pBaseValS[223] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//70000984 //TVAR_afit_pBaseValS[224] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//70000986 //TVAR_afit_pBaseValS[225] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//70000988 //TVAR_afit_pBaseValS[226] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x0226  },	//7000098A //TVAR_afit_pBaseValS[227] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x001E  },	//7000098C //TVAR_afit_pBaseValS[228] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x001E  },	//7000098E //TVAR_afit_pBaseValS[229] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//70000990 //TVAR_afit_pBaseValS[230] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//70000992 //TVAR_afit_pBaseValS[231] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x004E  },	//70000994 //TVAR_afit_pBaseValS[232] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0000  },	//70000996 //TVAR_afit_pBaseValS[233] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x003C  },	//70000998 //TVAR_afit_pBaseValS[234] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x001E  },	//7000099A //TVAR_afit_pBaseValS[235] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x003C  },	//7000099C //TVAR_afit_pBaseValS[236] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x001E  },	//7000099E //TVAR_afit_pBaseValS[237] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//700009A0 //TVAR_afit_pBaseValS[238] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//700009A2 //TVAR_afit_pBaseValS[239] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//700009A4 //TVAR_afit_pBaseValS[240] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x1403  },	//700009A6 //TVAR_afit_pBaseValS[241] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x0000  },	//700009A8 //TVAR_afit_pBaseValS[242] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0000  },	//700009AA //TVAR_afit_pBaseValS[243] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0906  },	//700009AC //TVAR_afit_pBaseValS[244] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//700009AE //TVAR_afit_pBaseValS[245] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x045A  },	//700009B0 //TVAR_afit_pBaseValS[246] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//700009B2 //TVAR_afit_pBaseValS[247] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//700009B4 //TVAR_afit_pBaseValS[248] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//700009B6 //TVAR_afit_pBaseValS[249] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x081E  },	//700009B8 //TVAR_afit_pBaseValS[250] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A14  },	//700009BA //TVAR_afit_pBaseValS[251] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0F0F  },	//700009BC //TVAR_afit_pBaseValS[252] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A00  },	//700009BE //TVAR_afit_pBaseValS[253] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x0090  },	//700009C0 //TVAR_afit_pBaseValS[254] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x000A  },	//700009C2 //TVAR_afit_pBaseValS[255] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0002  },	//700009C4 //TVAR_afit_pBaseValS[256] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//700009C6 //TVAR_afit_pBaseValS[257] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1102  },	//700009C8 //TVAR_afit_pBaseValS[258] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001B  },	//700009CA //TVAR_afit_pBaseValS[259] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//700009CC //TVAR_afit_pBaseValS[260] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//700009CE //TVAR_afit_pBaseValS[261] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//700009D0 //TVAR_afit_pBaseValS[262] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0306  },	//700009D2 //TVAR_afit_pBaseValS[263] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x4602  },	//700009D4 //TVAR_afit_pBaseValS[264] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0880  },	//700009D6 //TVAR_afit_pBaseValS[265] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0080  },	//700009D8 //TVAR_afit_pBaseValS[266] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//700009DA //TVAR_afit_pBaseValS[267] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x0101  },	//700009DC //TVAR_afit_pBaseValS[268] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0707  },	//700009DE //TVAR_afit_pBaseValS[269] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x1E01  },	//700009E0 //TVAR_afit_pBaseValS[270] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x3C1E  },	//700009E2 //TVAR_afit_pBaseValS[271] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /
+{ 0x0F12, 0x5028  },	//700009E4 //TVAR_afit_pBaseValS[272] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0500  },	//700009E6 //TVAR_afit_pBaseValS[273] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x1A04  },	//700009E8 //TVAR_afit_pBaseValS[274] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /
+{ 0x0F12, 0x280A  },	//700009EA //TVAR_afit_pBaseValS[275] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x080C  },	//700009EC //TVAR_afit_pBaseValS[276] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /
+{ 0x0F12, 0x1414  },	//700009EE //TVAR_afit_pBaseValS[277] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x6A03  },	//700009F0 //TVAR_afit_pBaseValS[278] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x121E  },	//700009F2 //TVAR_afit_pBaseValS[279] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//700009F4 //TVAR_afit_pBaseValS[280] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//700009F6 //TVAR_afit_pBaseValS[281] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x2806  },	//700009F8 //TVAR_afit_pBaseValS[282] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x0128  },	//700009FA //TVAR_afit_pBaseValS[283] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//700009FC //TVAR_afit_pBaseValS[284] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x2224  },	//700009FE //TVAR_afit_pBaseValS[285] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x3236  },	//70000A00 //TVAR_afit_pBaseValS[286] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000A02 //TVAR_afit_pBaseValS[287] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000A04 //TVAR_afit_pBaseValS[288] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0410  },	//70000A06 //TVAR_afit_pBaseValS[289] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x141E  },	//70000A08 //TVAR_afit_pBaseValS[290] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF07  },	//70000A0A //TVAR_afit_pBaseValS[291] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//70000A0C //TVAR_afit_pBaseValS[292] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x4050  },	//70000A0E //TVAR_afit_pBaseValS[293] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x0F0F  },	//70000A10 //TVAR_afit_pBaseValS[294] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000A12 //TVAR_afit_pBaseValS[295] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000A14 //TVAR_afit_pBaseValS[296] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x2828  },	//70000A16 //TVAR_afit_pBaseValS[297] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000A18 //TVAR_afit_pBaseValS[298] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x2401  },	//70000A1A //TVAR_afit_pBaseValS[299] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x3622  },	//70000A1C //TVAR_afit_pBaseValS[300] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x2832  },	//70000A1E //TVAR_afit_pBaseValS[301] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000A20 //TVAR_afit_pBaseValS[302] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x1003  },	//70000A22 //TVAR_afit_pBaseValS[303] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1E04  },	//70000A24 //TVAR_afit_pBaseValS[304] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x0714  },	//70000A26 //TVAR_afit_pBaseValS[305] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000A28 //TVAR_afit_pBaseValS[306] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x5004  },	//70000A2A //TVAR_afit_pBaseValS[307] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x0F40  },	//70000A2C //TVAR_afit_pBaseValS[308] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x400F  },	//70000A2E //TVAR_afit_pBaseValS[309] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000A30 //TVAR_afit_pBaseValS[310] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000A32 //TVAR_afit_pBaseValS[311] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000A34 //TVAR_afit_pBaseValS[312] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000A36 //TVAR_afit_pBaseValS[313] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0000  },	//70000A38 //TVAR_afit_pBaseValS[314] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//70000A3A //TVAR_afit_pBaseValS[315] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//70000A3C //TVAR_afit_pBaseValS[316] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//70000A3E //TVAR_afit_pBaseValS[317] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//70000A40 //TVAR_afit_pBaseValS[318] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//70000A42 //TVAR_afit_pBaseValS[319] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//70000A44 //TVAR_afit_pBaseValS[320] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//70000A46 //TVAR_afit_pBaseValS[321] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//70000A48 //TVAR_afit_pBaseValS[322] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//70000A4A //TVAR_afit_pBaseValS[323] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x00C8  },	//70000A4C //TVAR_afit_pBaseValS[324] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x03E8  },	//70000A4E //TVAR_afit_pBaseValS[325] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0046  },	//70000A50 //TVAR_afit_pBaseValS[326] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x0050  },	//70000A52 //TVAR_afit_pBaseValS[327] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//70000A54 //TVAR_afit_pBaseValS[328] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//70000A56 //TVAR_afit_pBaseValS[329] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//70000A58 //TVAR_afit_pBaseValS[330] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x0226  },	//70000A5A //TVAR_afit_pBaseValS[331] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x0014  },	//70000A5C //TVAR_afit_pBaseValS[332] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x0014  },	//70000A5E //TVAR_afit_pBaseValS[333] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//70000A60 //TVAR_afit_pBaseValS[334] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//70000A62 //TVAR_afit_pBaseValS[335] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x004E  },	//70000A64 //TVAR_afit_pBaseValS[336] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0000  },	//70000A66 //TVAR_afit_pBaseValS[337] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x002D  },	//70000A68 //TVAR_afit_pBaseValS[338] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x0019  },	//70000A6A //TVAR_afit_pBaseValS[339] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x002D  },	//70000A6C //TVAR_afit_pBaseValS[340] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x0019  },	//70000A6E //TVAR_afit_pBaseValS[341] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//70000A70 //TVAR_afit_pBaseValS[342] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//70000A72 //TVAR_afit_pBaseValS[343] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//70000A74 //TVAR_afit_pBaseValS[344] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x1403  },	//70000A76 //TVAR_afit_pBaseValS[345] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x0000  },	//70000A78 //TVAR_afit_pBaseValS[346] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0000  },	//70000A7A //TVAR_afit_pBaseValS[347] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0906  },	//70000A7C //TVAR_afit_pBaseValS[348] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//70000A7E //TVAR_afit_pBaseValS[349] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x045A  },	//70000A80 //TVAR_afit_pBaseValS[350] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//70000A82 //TVAR_afit_pBaseValS[351] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//70000A84 //TVAR_afit_pBaseValS[352] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//70000A86 //TVAR_afit_pBaseValS[353] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x081E  },	//70000A88 //TVAR_afit_pBaseValS[354] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A14  },	//70000A8A //TVAR_afit_pBaseValS[355] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0F0F  },	//70000A8C //TVAR_afit_pBaseValS[356] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A00  },	//70000A8E //TVAR_afit_pBaseValS[357] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x0090  },	//70000A90 //TVAR_afit_pBaseValS[358] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x000A  },	//70000A92 //TVAR_afit_pBaseValS[359] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0001  },	//70000A94 //TVAR_afit_pBaseValS[360] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//70000A96 //TVAR_afit_pBaseValS[361] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1002  },	//70000A98 //TVAR_afit_pBaseValS[362] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001E  },	//70000A9A //TVAR_afit_pBaseValS[363] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//70000A9C //TVAR_afit_pBaseValS[364] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//70000A9E //TVAR_afit_pBaseValS[365] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//70000AA0 //TVAR_afit_pBaseValS[366] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0307  },	//70000AA2 //TVAR_afit_pBaseValS[367] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x5002  },	//70000AA4 //TVAR_afit_pBaseValS[368] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0080  },	//70000AA6 //TVAR_afit_pBaseValS[369] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0080  },	//70000AA8 //TVAR_afit_pBaseValS[370] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//70000AAA //TVAR_afit_pBaseValS[371] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x0101  },	//70000AAC //TVAR_afit_pBaseValS[372] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0707  },	//70000AAE //TVAR_afit_pBaseValS[373] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x1E01  },	//70000AB0 //TVAR_afit_pBaseValS[374] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x2A1E  },	//70000AB2 //TVAR_afit_pBaseValS[375] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /
+{ 0x0F12, 0x5020  },	//70000AB4 //TVAR_afit_pBaseValS[376] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0500  },	//70000AB6 //TVAR_afit_pBaseValS[377] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x1A04  },	//70000AB8 //TVAR_afit_pBaseValS[378] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /
+{ 0x0F12, 0x280A  },	//70000ABA //TVAR_afit_pBaseValS[379] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x080C  },	//70000ABC //TVAR_afit_pBaseValS[380] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /
+{ 0x0F12, 0x1414  },	//70000ABE //TVAR_afit_pBaseValS[381] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x6A03  },	//70000AC0 //TVAR_afit_pBaseValS[382] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x121E  },	//70000AC2 //TVAR_afit_pBaseValS[383] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//70000AC4 //TVAR_afit_pBaseValS[384] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//70000AC6 //TVAR_afit_pBaseValS[385] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x3C06  },	//70000AC8 //TVAR_afit_pBaseValS[386] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x013C  },	//70000ACA //TVAR_afit_pBaseValS[387] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//70000ACC //TVAR_afit_pBaseValS[388] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x1C1E  },	//70000ACE //TVAR_afit_pBaseValS[389] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x1E22  },	//70000AD0 //TVAR_afit_pBaseValS[390] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000AD2 //TVAR_afit_pBaseValS[391] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000AD4 //TVAR_afit_pBaseValS[392] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0214  },	//70000AD6 //TVAR_afit_pBaseValS[393] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x0E14  },	//70000AD8 //TVAR_afit_pBaseValS[394] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF06  },	//70000ADA //TVAR_afit_pBaseValS[395] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//70000ADC //TVAR_afit_pBaseValS[396] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x4052  },	//70000ADE //TVAR_afit_pBaseValS[397] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x150C  },	//70000AE0 //TVAR_afit_pBaseValS[398] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000AE2 //TVAR_afit_pBaseValS[399] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000AE4 //TVAR_afit_pBaseValS[400] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x3C3C  },	//70000AE6 //TVAR_afit_pBaseValS[401] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000AE8 //TVAR_afit_pBaseValS[402] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x1E01  },	//70000AEA //TVAR_afit_pBaseValS[403] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x221C  },	//70000AEC //TVAR_afit_pBaseValS[404] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x281E  },	//70000AEE //TVAR_afit_pBaseValS[405] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000AF0 //TVAR_afit_pBaseValS[406] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x1403  },	//70000AF2 //TVAR_afit_pBaseValS[407] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1402  },	//70000AF4 //TVAR_afit_pBaseValS[408] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x060E  },	//70000AF6 //TVAR_afit_pBaseValS[409] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000AF8 //TVAR_afit_pBaseValS[410] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x5204  },	//70000AFA //TVAR_afit_pBaseValS[411] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x0C40  },	//70000AFC //TVAR_afit_pBaseValS[412] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x4015  },	//70000AFE //TVAR_afit_pBaseValS[413] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000B00 //TVAR_afit_pBaseValS[414] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000B02 //TVAR_afit_pBaseValS[415] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000B04 //TVAR_afit_pBaseValS[416] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000B06 //TVAR_afit_pBaseValS[417] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0000  },	//70000B08 //TVAR_afit_pBaseValS[418] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//70000B0A //TVAR_afit_pBaseValS[419] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//70000B0C //TVAR_afit_pBaseValS[420] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//70000B0E //TVAR_afit_pBaseValS[421] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//70000B10 //TVAR_afit_pBaseValS[422] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//70000B12 //TVAR_afit_pBaseValS[423] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//70000B14 //TVAR_afit_pBaseValS[424] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//70000B16 //TVAR_afit_pBaseValS[425] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//70000B18 //TVAR_afit_pBaseValS[426] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//70000B1A //TVAR_afit_pBaseValS[427] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x0032  },	//70000B1C //TVAR_afit_pBaseValS[428] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x028A  },	//70000B1E //TVAR_afit_pBaseValS[429] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0032  },	//70000B20 //TVAR_afit_pBaseValS[430] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x01F4  },	//70000B22 //TVAR_afit_pBaseValS[431] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//70000B24 //TVAR_afit_pBaseValS[432] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//70000B26 //TVAR_afit_pBaseValS[433] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//70000B28 //TVAR_afit_pBaseValS[434] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x01AA  },	//70000B2A //TVAR_afit_pBaseValS[435] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x003C  },	//70000B2C //TVAR_afit_pBaseValS[436] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x0050  },	//70000B2E //TVAR_afit_pBaseValS[437] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//70000B30 //TVAR_afit_pBaseValS[438] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//70000B32 //TVAR_afit_pBaseValS[439] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x0044  },	//70000B34 //TVAR_afit_pBaseValS[440] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0014  },	//70000B36 //TVAR_afit_pBaseValS[441] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x0046  },	//70000B38 //TVAR_afit_pBaseValS[442] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x0019  },	//70000B3A //TVAR_afit_pBaseValS[443] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x0046  },	//70000B3C //TVAR_afit_pBaseValS[444] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x0019  },	//70000B3E //TVAR_afit_pBaseValS[445] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//70000B40 //TVAR_afit_pBaseValS[446] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//70000B42 //TVAR_afit_pBaseValS[447] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//70000B44 //TVAR_afit_pBaseValS[448] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x0503  },	//70000B46 //TVAR_afit_pBaseValS[449] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x080F  },	//70000B48 //TVAR_afit_pBaseValS[450] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0808  },	//70000B4A //TVAR_afit_pBaseValS[451] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0000  },	//70000B4C //TVAR_afit_pBaseValS[452] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//70000B4E //TVAR_afit_pBaseValS[453] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x012D  },	//70000B50 //TVAR_afit_pBaseValS[454] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//70000B52 //TVAR_afit_pBaseValS[455] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//70000B54 //TVAR_afit_pBaseValS[456] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//70000B56 //TVAR_afit_pBaseValS[457] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x061E  },	//70000B58 //TVAR_afit_pBaseValS[458] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A1E  },	//70000B5A //TVAR_afit_pBaseValS[459] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0606  },	//70000B5C //TVAR_afit_pBaseValS[460] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A03  },	//70000B5E //TVAR_afit_pBaseValS[461] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x378B  },	//70000B60 //TVAR_afit_pBaseValS[462] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x1028  },	//70000B62 //TVAR_afit_pBaseValS[463] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0001  },	//70000B64 //TVAR_afit_pBaseValS[464] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//70000B66 //TVAR_afit_pBaseValS[465] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1002  },	//70000B68 //TVAR_afit_pBaseValS[466] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001E  },	//70000B6A //TVAR_afit_pBaseValS[467] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//70000B6C //TVAR_afit_pBaseValS[468] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//70000B6E //TVAR_afit_pBaseValS[469] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//70000B70 //TVAR_afit_pBaseValS[470] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0307  },	//70000B72 //TVAR_afit_pBaseValS[471] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x5001  },	//70000B74 //TVAR_afit_pBaseValS[472] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0080  },	//70000B76 //TVAR_afit_pBaseValS[473] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0080  },	//70000B78 //TVAR_afit_pBaseValS[474] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//70000B7A //TVAR_afit_pBaseValS[475] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x5050  },	//70000B7C //TVAR_afit_pBaseValS[476] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0101  },	//70000B7E //TVAR_afit_pBaseValS[477] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x3201  },	//70000B80 //TVAR_afit_pBaseValS[478] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x1832  },	//70000B82 //TVAR_afit_pBaseValS[479] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /        iden 12
+{ 0x0F12, 0x210C  },	//70000B84 //TVAR_afit_pBaseValS[480] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0A00  },	//70000B86 //TVAR_afit_pBaseValS[481] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x1E04  },	//70000B88 //TVAR_afit_pBaseValS[482] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /    1E demhsharplow
+{ 0x0F12, 0x0A08  },	//70000B8A //TVAR_afit_pBaseValS[483] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x070C  },	//70000B8C //TVAR_afit_pBaseValS[484] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /    c8 clamp
+{ 0x0F12, 0x3264  },	//70000B8E //TVAR_afit_pBaseValS[485] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x5A02  },	//70000B90 //TVAR_afit_pBaseValS[486] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x1040  },	//70000B92 //TVAR_afit_pBaseValS[487] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//70000B94 //TVAR_afit_pBaseValS[488] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//70000B96 //TVAR_afit_pBaseValS[489] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x4606  },	//70000B98 //TVAR_afit_pBaseValS[490] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x0146  },	//70000B9A //TVAR_afit_pBaseValS[491] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//70000B9C //TVAR_afit_pBaseValS[492] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x1C18  },	//70000B9E //TVAR_afit_pBaseValS[493] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x1819  },	//70000BA0 //TVAR_afit_pBaseValS[494] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000BA2 //TVAR_afit_pBaseValS[495] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000BA4 //TVAR_afit_pBaseValS[496] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0514  },	//70000BA6 //TVAR_afit_pBaseValS[497] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x0C14  },	//70000BA8 //TVAR_afit_pBaseValS[498] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF05  },	//70000BAA //TVAR_afit_pBaseValS[499] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//70000BAC //TVAR_afit_pBaseValS[500] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x4052  },	//70000BAE //TVAR_afit_pBaseValS[501] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x1514  },	//70000BB0 //TVAR_afit_pBaseValS[502] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000BB2 //TVAR_afit_pBaseValS[503] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000BB4 //TVAR_afit_pBaseValS[504] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x4646  },	//70000BB6 //TVAR_afit_pBaseValS[505] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000BB8 //TVAR_afit_pBaseValS[506] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x1801  },	//70000BBA //TVAR_afit_pBaseValS[507] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x191C  },	//70000BBC //TVAR_afit_pBaseValS[508] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x2818  },	//70000BBE //TVAR_afit_pBaseValS[509] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000BC0 //TVAR_afit_pBaseValS[510] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x1403  },	//70000BC2 //TVAR_afit_pBaseValS[511] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1405  },	//70000BC4 //TVAR_afit_pBaseValS[512] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x050C  },	//70000BC6 //TVAR_afit_pBaseValS[513] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000BC8 //TVAR_afit_pBaseValS[514] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x5204  },	//70000BCA //TVAR_afit_pBaseValS[515] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x1440  },	//70000BCC //TVAR_afit_pBaseValS[516] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x4015  },	//70000BCE //TVAR_afit_pBaseValS[517] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000BD0 //TVAR_afit_pBaseValS[518] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000BD2 //TVAR_afit_pBaseValS[519] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+                           
+{ 0x0F12, 0x7DFA  },	//afit_pConstBaseValS[0] //                                                                          
+{ 0x0F12, 0xFFBD  },	//afit_pConstBaseValS[1] //                                                                          
+{ 0x0F12, 0x26FE  },	//afit_pConstBaseValS[2] //                                                                          
+{ 0x0F12, 0xF7BC  },	//afit_pConstBaseValS[3] //                                                                          
+{ 0x0F12, 0x7E06  },	//afit_pConstBaseValS[4] //                                                                          
+{ 0x0F12, 0x00D3  },	//afit_pConstBaseValS[5] //                                                                          
+                        
+                        
+{ 0x002A, 0x2CE8  },    
+{ 0x0F12, 0x0007  },	// Modify LSB to control AWBB_YThreshLow //    	                                                                        
+{ 0x0F12, 0x00E2  },	//                                         
+{ 0x0F12, 0x0005  },	// Modify LSB to control AWBB_YThreshLowBrLow//                                                                        
+{ 0x0F12, 0x00E2  },	//                                         
+                                                                       
+                                                                                     
+{ 0x002A, 0x0F7E  },    //ae weight    //                                
+{ 0x0F12, 0x0000  },  //0000  //0000
+{ 0x0F12, 0x0000  },  //0000  //0000
+{ 0x0F12, 0x0000  },  //0000  //0000
+{ 0x0F12, 0x0000  },  //0000  //0000                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0201  },  //0201  //0201
+{ 0x0F12, 0x0102  },  //0102  //0102
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0201  },  //0101  //0101
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0102  },  //0101  //0101                     
+{ 0x0F12, 0x0201  },  //0101  //0201
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0102  },  //0101  //0102                     
+{ 0x0F12, 0x0101  },  //0101  //0201
+{ 0x0F12, 0x0101  },  //0101  //0202
+{ 0x0F12, 0x0101  },  //0101  //0202
+{ 0x0F12, 0x0101  },  //0101  //0102
+                        
+                               
+{ 0x002A, 0x01CC  },    
+{ 0x0F12, 0x5DC0  },	//REG_TC_IPRM_InClockLSBs//input clock=24MHz                        	                                                                        
+{ 0x0F12, 0x0000  },    //REG_TC_IPRM_InClockMSBs                                           
+{ 0x002A, 0x01EE  },                                                                        
+{ 0x0F12, 0x0003  },	//REG_TC_IPRM_UseNPviClocks                                     
+                  
+{ 0x002A, 0x01F6  },                                                                        
+{ 0x0F12, 0x1F40  },    //REG_TC_IPRM_OpClk4KHz_0                   	2   700001F6         
+{ 0x0F12, 0x32A8  },	//3A88    //REG_TC_IPRM_MinOutRate4KHz_0              	2   700001F8                                                                        
+{ 0x0F12, 0x32E8  },	//3AA8    //REG_TC_IPRM_MaxOutRate4KHz_0                        
+                        
+{ 0x0F12, 0x1F40  },	 //REG_TC_IPRM_OpClk4KHz_1                   	2   700001FC    
+{ 0x0F12, 0x2ea0  },    //REG_TC_IPRM_MinOutRate4KHz_1              	2   700001FE 
+{ 0x0F12, 0x2f00  },    //REG_TC_IPRM_MaxOutRate4KHz_1              	2   70000200 
+                  
+{ 0x0F12, 0x0BB8  },    //REG_TC_IPRM_OpClk4KHz_2                   	2   70000202 
+{ 0x0F12, 0x05DC  },    //REG_TC_IPRM_MinOutRate4KHz_2              	2   70000204 
+{ 0x0F12, 0x1770  },    //REG_TC_IPRM_MaxOutRate4KHz_2              	2   70000206 
+                  
+{ 0x002A, 0x0208  },                                                                
+{ 0x0F12, 0x0001  },      //REG_TC_IPRM_InitParamsUpdated                           
+                        
+{ 0xdddd, 0x0064  },  //delay 100ms  
+                  
+{ 0x0028, 0x7000  },	    
+{ 0x002A, 0x026C  },   //Normal preview 15fps
+{ 0x0F12, 0x0280  },	//REG_0TC_PCFG_usWidth                      	2   7000026C			// cys  640                          
+{ 0x0F12, 0x01e0  },   //REG_0TC_PCFG_usHeight                     	2   7000026E    //  480                                       
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_Format                       	2   70000270    //   rgb565                                      
+{ 0x0F12, 0x32E8  },	//3AA8//REG_0TC_PCFG_usMaxOut4KHzRate             	2   70000272  //                              
+{ 0x0F12, 0x32a8  },	//3A88//REG_0TC_PCFG_usMinOut4KHzRate             	2   70000274  //                              
+{ 0x0F12, 0x0100  },   //REG_0TC_PCFG_OutClkPerPix88               	2   70000276    //                                         
+{ 0x0F12, 0x0800  },   //REG_0TC_PCFG_uMaxBpp88                    	2   70000278    //                                         
+{ 0x0F12, 0x0072  },   //REG_0TC_PCFG_PVIMask                      	2   7000027A    //92  (1) PCLK inversion  (4)1b_C first (5) UV First                                       
+{ 0x0F12, 0x0010  },   //REG_0TC_PCFG_OIFMask                      	2   7000027C    //                                         
+{ 0x0F12, 0x01E0  },   //REG_0TC_PCFG_usJpegPacketSize             	2   7000027E    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_usJpegTotalPackets           	2   70000280    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_uClockInd                    	2   70000282    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_usFrTimeType                 	2   70000284    //                                         
+{ 0x0F12, 0x0001  },   //REG_0TC_PCFG_FrRateQualityType            	2   70000286    //cys 0x0001          
+{ 0x0F12, 0x029a  },   //REG_0TC_PCFG_usMaxFrTimeMsecMult10        	2   70000288    // cys 0x535 
+{ 0x0F12, 0x014d  },   //REG_0TC_PCFG_usMinFrTimeMsecMult10        	2   7000028A    //cys                              
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_bSmearOutput                 	2   7000028C    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_sSaturation                  	2   7000028E    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_sSharpBlur                   	2   70000290    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_sColorTemp                   	2   70000292    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_uDeviceGammaIndex            	2   70000294    //                                         
+{ 0x0F12, 0x0003  },   //REG_0TC_PCFG_uPrevMirror                  	2   70000296    //                                         
+{ 0x0F12, 0x0003  },   //REG_0TC_PCFG_uCaptureMirror               	2   70000298    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_uRotation                    	2   7000029A    //                                         
+                       
+                       //comcoder frame fix 15                                        
+{ 0x0F12, 0x0400  },   //REG_1TC_PCFG_usWidth                      	2   7000029C    //                                         
+{ 0x0F12, 0x0300  },   //REG_1TC_PCFG_usHeight                     	2   7000029E    //                                         
+{ 0x0F12, 0x0005  },   //REG_1TC_PCFG_Format                       	2   700002A0    //                                         
+{ 0x0F12, 0x32E8  },   //REG_1TC_PCFG_usMaxOut4KHzRate             	2   700002A2    //                                         
+{ 0x0F12, 0x32a8  },   //REG_1TC_PCFG_usMinOut4KHzRate             	2   700002A4    //                                         
+{ 0x0F12, 0x0100  },   //REG_1TC_PCFG_OutClkPerPix88               	2   700002A6    //                                         
+{ 0x0F12, 0x0800  },   //REG_1TC_PCFG_uMaxBpp88                    	2   700002A8    //                                         
+{ 0x0F12, 0x0072  },   //REG_1TC_PCFG_PVIMask                      	2   700002AA    //                                         
+{ 0x0F12, 0x0010  },   //REG_1TC_PCFG_OIFMask                      	2   700002AC    //                                         
+{ 0x0F12, 0x01E0  },   //REG_1TC_PCFG_usJpegPacketSize             	2   700002AE    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_usJpegTotalPackets           	2   700002B0    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_uClockInd                    	2   700002B2    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_usFrTimeType                 	2   700002B4    //                                         
+{ 0x0F12, 0x0001  },   //REG_1TC_PCFG_FrRateQualityType            	2   700002B6    //                                         
+{ 0x0F12, 0x014d  },   //REG_1TC_PCFG_usMaxFrTimeMsecMult10        	2   700002B8    //cys 0x29a         
+{ 0x0F12, 0x014d  },   //REG_1TC_PCFG_usMinFrTimeMsecMult10        	2   700002BA    //cys  0x29a                                        
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_bSmearOutput                 	2   700002BC    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_sSaturation                  	2   700002BE    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_sSharpBlur                   	2   700002C0    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_sColorTemp                   	2   700002C2    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_uDeviceGammaIndex            	2   700002C4    //                                         
+{ 0x0F12, 0x0003  },   //REG_1TC_PCFG_uPrevMirror                  	2   700002C6    //                                         
+{ 0x0F12, 0x0003  },   //REG_1TC_PCFG_uCaptureMirror               	2   700002C8    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_uRotation                    	2   700002CA    //                                         
+                                       
+                            
+{ 0x002A, 0x035C  },   //Normal capture //    
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_uCaptureMode                 	2   7000035C						// 
+{ 0x0F12, 0x0280  },   //REG_0TC_CCFG_usWidth                      	2   7000035E          //cys 640                                   
+{ 0x0F12, 0x01e0  },   //REG_0TC_CCFG_usHeight                     	2   70000360          //    480                               
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_Format                       	2   70000362          //     rgb565                              
+{ 0x0F12, 0x32E8  },	//2f00//3AA8//REG_0TC_CCFG_usMaxOut4KHzRate             	2   70000364  //                      
+{ 0x0F12, 0x32a8  },	//2ea0//3A88//REG_0TC_CCFG_usMinOut4KHzRate             	2   70000366  //                      
+{ 0x0F12, 0x0100  },   //REG_0TC_CCFG_OutClkPerPix88               	2   70000368          //                                   
+{ 0x0F12, 0x0800  },   //REG_0TC_CCFG_uMaxBpp88                    	2   7000036A          //                                   
+{ 0x0F12, 0x0072  },   //REG_0TC_CCFG_PVIMask                      	2   7000036C          //                                   
+{ 0x0F12, 0x0010  },   //REG_0TC_CCFG_OIFMask                      	2   7000036E          //                                   
+{ 0x0F12, 0x01E0  },   //REG_0TC_CCFG_usJpegPacketSize             	2   70000370          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_usJpegTotalPackets           	2   70000372          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_uClockInd                    	2   70000374          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_usFrTimeType                 	2   70000376          //                                   
+{ 0x0F12, 0x0002  },   //REG_0TC_CCFG_FrRateQualityType            	2   70000378          //                                   
+{ 0x0F12, 0x0535  },   //REG_0TC_CCFG_usMaxFrTimeMsecMult10        	2   7000037A          //                                   
+{ 0x0F12, 0x0535  },   //REG_0TC_CCFG_usMinFrTimeMsecMult10        	2   7000037C          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_bSmearOutput                 	2   7000037E          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_sSaturation                  	2   70000380          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_sSharpBlur                   	2   70000382          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_sColorTemp                   	2   70000384          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_uDeviceGammaIndex            	2   70000386          //                                   
+                            
+                       // Low_lux capture//    
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_uCaptureMode                 	2   70000388						// 
+{ 0x0F12, 0x0280  },   //REG_1TC_CCFG_usWidth                      	2   7000038A          //  cys 640                                 
+{ 0x0F12, 0x01e0  },   //REG_1TC_CCFG_usHeight                     	2   7000038C          //  cys 480                                 
+{ 0x0F12, 0x0005  },   //REG_1TC_CCFG_Format                       	2   7000038E          //                                   
+{ 0x0F12, 0x32E8  },   //REG_1TC_CCFG_usMaxOut4KHzRate             	2   70000390          //                                   
+{ 0x0F12, 0x32a8  },   //REG_1TC_CCFG_usMinOut4KHzRate             	2   70000392          //                                   
+{ 0x0F12, 0x0100  },   //REG_1TC_CCFG_OutClkPerPix88               	2   70000394          //                                   
+{ 0x0F12, 0x0800  },   //REG_1TC_CCFG_uMaxBpp88                    	2   70000396          //                                   
+{ 0x0F12, 0x0072  },   //REG_1TC_CCFG_PVIMask                      	2   70000398          //                                   
+{ 0x0F12, 0x0010  },   //REG_1TC_CCFG_OIFMask                      	2   7000039A          //                                   
+{ 0x0F12, 0x01E0  },   //REG_1TC_CCFG_usJpegPacketSize             	2   7000039C          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_usJpegTotalPackets           	2   7000039E          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_uClockInd                    	2   700003A0          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_usFrTimeType                 	2   700003A2          //                                   
+{ 0x0F12, 0x0002  },   //REG_1TC_CCFG_FrRateQualityType            	2   700003A4          //                                   
+{ 0x0F12, 0x0535  },   //REG_1TC_CCFG_usMaxFrTimeMsecMult10        	2   700003A6          //                                   
+{ 0x0F12, 0x0535  },   //REG_1TC_CCFG_usMinFrTimeMsecMult10        	2   700003A8          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_bSmearOutput                 	2   700003AA          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_sSaturation                  	2   700003AC          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_sSharpBlur                   	2   700003AE          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_sColorTemp                   	2   700003B0          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_uDeviceGammaIndex            	2   700003B2          //                                   
+                                  
+{ 0x002A, 0x0208  },        
+{ 0x0F12, 0x0001  },      //REG_TC_IPRM_InitParamsUpdated//                                                                       
+                            
+{ 0x002A, 0x023C  },   
+{ 0x0F12, 0x0000  },	//32MHz Sys Clock//	
+{ 0x002A, 0x0244  },	                   
+{ 0x0F12, 0x0000  },       
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x0F12, 0x0001  }, 
+                     
+{ 0x1000, 0x0001  },	// Set host interrupt so main start run//                                                  
+{ 0xdddd, 0x0064  },   //delay 100ms
+                  
+{ 0x002A, 0x0DA0  },    
+{ 0x0F12, 0x0005  },    
+                        
+{ 0x002A, 0x0D88  },    
+{ 0x0F12, 0x0038  },    
+{ 0x0F12, 0x0074  },    
+{ 0x0F12, 0xFFF1  },    
+{ 0x0F12, 0x00BF  },    
+{ 0x0F12, 0xFF9B  },    
+{ 0x0F12, 0x00DB  },    
+{ 0x0F12, 0xFF56  },    
+{ 0x0F12, 0x00F0  },    
+{ 0x0F12, 0xFEFF  },    
+{ 0x0F12, 0x010F  },    
+{ 0x0F12, 0x0E74  },    
+{ 0x002A, 0x0DA8  },    
+{ 0x0F12, 0x0BB8  },    //NB 3000
+{ 0x002A, 0x0DA4  },    
+{ 0x0F12, 0x274E  },
+                  
+{ 0x002A, 0x0DCA  },
+{ 0x0F12, 0x0030  },
+
+{ 0x002A, 0x3286  },
+{ 0x0F12, 0x0001  }, //Pre/Post gamma on(ç›”æ±—)  
+
+{ 0x002A, 0x032C  },
+{ 0x0F12, 0xAAAA  },  //ESD Check  
+                  
+{ 0xffff, 0xffff },
+};
+
+  
+s5k5ca_short_t s5k5ca_capture_normal_normal_00[] =              
+{ 
+{ 0xFCFC, 0xD000  },                 
+{ 0x0028, 0x7000  },  
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0246  },
+{ 0x0F12, 0x0001  },  
+{ 0x002A, 0x0224  },
+{ 0x0F12, 0x0001  },   
+{ 0x0F12, 0x0001  },
+//{ 0xdddd, 0x012C  }, //delay 300ms //0218 delay time 300ms // 0421 0064(100ms)->0032(50ms)        
+{ 0xffff, 0xffff  },
+};
+
+
+
+// /////////////
+// / CapturewMode
+// ////////////
+s5k5ca_short_t s5k5ca_capture[] = 
+{ 
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },                                                      
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  }, 
+  
+{ 0xffff, 0xffff  },
+};
+
+
+/////////////////////
+// SnapshotLowLightMode
+/////////////////////
+s5k5ca_short_t s5k5ca_snapshot_normal_low_00[] = //light <= 0x20 0421 PV2 0020->0018
+{ 
+//LowLight + Night Off
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },            
+                  
+{ 0x002A, 0x07E6  },
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+    
+{ 0x002A, 0x0838  },
+{ 0x0F12, 0x0A3C  },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x0908  },
+{ 0x0F12, 0x0446  },	//TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]
+                                             
+{ 0x002A, 0x0244  }, //Low lux capture//
+{ 0x0F12, 0x0001  }, //config 1 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  },
+                 
+{ 0xdddd, 0x0320  }, //delay 800ms 
+
+{ 0xffff, 0xffff  },
+//sw delay time - 800ms
+};
+
+
+  
+s5k5ca_short_t s5k5ca_flashcapture_00[] =       
+{ 
+  
+//{ 0xdddd, 0x0160  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },                   
+{ 0x002A, 0x035C  }, //Capture Mode//
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  }, 
+  
+
+{ 0xffff, 0xffff  },  
+};
+
+
+/////////////////////
+// SnapshotLowLightMode
+/////////////////////
+s5k5ca_short_t s5k5ca_snapshot_low[] = 
+{
+
+//LowLight + Night Off
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },            
+                  
+{ 0x002A, 0x07E6  },
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+    
+{ 0x002A, 0x0838  },
+{ 0x0F12, 0x0A3C  },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x0908  },
+{ 0x0F12, 0x0446  },	//TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]
+                                             
+{ 0x002A, 0x0244  }, //Low lux capture//
+{ 0x0F12, 0x0001  }, //config 1 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  },
+  
+{ 0xffff, 0xffff  },  
+
+};
+
+s5k5ca_short_t s5k5ca_flashcapture_low_00[] =    
+{
+//{ 0xdddd, 0x0160  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms    
+
+//LowLight + Night Off
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },            
+{ 0x002A, 0x0388  }, //Capture Mode//
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  },
+  
+{ 0xffff, 0xffff  },  
+};
+
+
+
+////////////////////
+// SnapshotNightMode
+///////////////////
+
+s5k5ca_short_t s5k5ca_snapshot_nightmode_00[] = 
+{
+
+//LowLight
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },    
+{ 0x002A, 0x07E6  },
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+                                                     
+{ 0x002A, 0x0244  }, //Night capture//
+{ 0x0F12, 0x0002  }, //config 2 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+
+////////////////
+// NightMode_ON
+///////////////
+s5k5ca_short_t s5k5ca_nightmode_on[] = 
+{
+
+
+{ 0xffff, 0xffff  },            
+};
+
+////////////////
+// NightMode_OFF
+///////////////
+s5k5ca_short_t s5k5ca_nightmode_off[] = 
+{
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_NONFIX                     //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_nonfix[] = 
+{
+
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_15FIX                   //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_15fix[] = 
+{
+
+  
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_7FIX                    //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_7fix[] = 
+{
+
+                  
+{ 0xffff, 0xffff  },
+};
+
+
+/////////
+// ISO_AUTO
+/////////
+s5k5ca_short_t s5k5ca_iso_auto[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x1000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0x3415  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0x682A  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0x8235  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0x3415  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0x682A  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0x8235  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x01B3  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x02A0  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x0064  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  },
+  
+{ 0xffff, 0xffff  },
+};
+
+////////
+// ISO_50
+////////
+s5k5ca_short_t s5k5ca_iso50[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x1000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x0064  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// ISO_100
+////////
+s5k5ca_short_t s5k5ca_iso100[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x1800  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x0096  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+  
+// ///////
+// / ISO_200
+// ///////
+s5k5ca_short_t s5k5ca_iso200[] =
+{ 
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+  
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x2000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x00C8  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// ISO_400
+////////
+s5k5ca_short_t s5k5ca_iso400[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x3000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x012C  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+
+////////////////////
+// SCENE_PORTRAIT_OFF
+////////////////////
+s5k5ca_short_t s5k5ca_scene_portrait_off[] =
+{
+{ 0xFCFC, 0xD000  },                    
+{ 0x0028, 0x7000  },//For Scene//
+{ 0x002A, 0x020C  },
+{ 0x0F12, 0x0000  },// Brightness for controling the EV//
+{ 0x002A, 0x0210  },
+{ 0x0F12, 0x0000  },// Saturation//
+{ 0x0F12, 0x0000  },// Blur_Sharpness //  
+{ 0xffff, 0xffff  },  
+};     
+
+////////////////////
+// SCENE_LANDSCAPE_OFF
+////////////////////
+s5k5ca_short_t s5k5ca_scene_landscape_off[] =
+{
+{ 0xFCFC, 0xD000  },     
+{ 0x0028, 0x7000  },//For Scene//
+{ 0x002A, 0x020C  },
+{ 0x0F12, 0x0000  },// Brightness for controling the EV//
+{ 0x002A, 0x0210  },
+{ 0x0F12, 0x0000  },// Saturation//
+{ 0x0F12, 0x0000  },// Blur_Sharpness //  
+{ 0xffff, 0xffff  },
+};
+
+/////////////////
+// SCENE_SPORTS_OFF
+/////////////////
+s5k5ca_short_t s5k5ca_scene_sports_off[] =
+{
+{ 0x0028, 0x7000  },     
+
+{ 0x002A, 0x0530  },//lt_uMaxExp1//
+{ 0x0F12, 0x3415  },
+{ 0x002A, 0x0534  },//lt_uMaxExp2//
+{ 0x0F12, 0x682A  },
+{ 0x002A, 0x167C  },//lt_uMaxExp3//
+{ 0x0F12, 0x8235  },
+{ 0x002A, 0x1680  },//lt_uMaxExp4//
+{ 0x0F12, 0xc350  },
+{ 0x0F12, 0x0000  },
+                  
+{ 0x002A, 0x0538  },//It_uCapMaxExp1 //
+{ 0x0F12, 0x3415  },
+{ 0x002A, 0x053C  },//It_uCapMaxExp2 //
+{ 0x0F12, 0x682A  },
+{ 0x002A, 0x1684  },//It_uCapMaxExp3 // 
+{ 0x0F12, 0x8235  },
+{ 0x002A, 0x1688  },//It_uCapMaxExp4 //
+{ 0x0F12, 0xc350  },
+{ 0x0F12, 0x0000  },
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x01B3  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x02A0  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710  },   //MaxAnGain4 //
+                  
+{ 0x002A, 0x0544  },
+{ 0x0F12, 0x0100  },//It_uMaxDigGain //
+
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_sunset_off[] =
+{
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_dawn_off[] =
+{
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_againstlight_off[] =
+{
+//NOT USE
+	              
+{ 0xffff, 0xffff  }, 
+};
+
+
+s5k5ca_short_t s5k5ca_scene_text_off[] =
+{
+//NOT USE
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_portrait_on[] =
+{
+//NOT USE
+{ 0xffff, 0xffff  },
+};
+
+
+
+
+s5k5ca_t s5k5ca_reg[] = 
+{
+	// To do.
+};
+
+// For VGA ( 640 x 480) on 4CA module
+s5k5ca_t s5k5ca_reg_vga[] = 
+{
+	// To do.
+};
+
+// For SVGA ( 800 x 600) on 4CA module
+s5k5ca_t s5k5ca_reg_svga[] = 
+{
+	// To do.
+};
+
+// For SXGA (1280 x 1024 = 1.3M) on 4CA module
+s5k5ca_t s5k5ca_reg_sxga[] = 
+{
+	// To do.
+};
+
+// For UXGA (1600 x 1200 = 2M) on 4CA module
+s5k5ca_t s5k5ca_reg_uxga[] = 
+{
+	// To do.
+};
+
+// For SQVGA on 4CA module
+s5k5ca_t s5k5ca_reg_qsvga[] = 
+{
+	// To do.
+};
+
+#define S5K5CA_INIT_REGS (sizeof(s5k5ca_reg)/sizeof(s5k5ca_reg[0]))
+#define S5K5CA_UXGA_REGS (sizeof(s5k5ca_reg_uxga)/sizeof(s5k5ca_reg_uxga[0]))
+#define S5K5CA_SVGA_REGS (sizeof(s5k5ca_reg_svga)/sizeof(s5k5ca_reg_svga[0]))
+#define S5K5CA_VGA_REGS (sizeof(s5k5ca_reg_vga)/sizeof(s5k5ca_reg_vga[0]))
+#define S5K5CA_QSVGA_REGS (sizeof(s5k5ca_reg_qsvga)/sizeof(s5k5ca_reg_qsvga[0]))
+
+//#define S5K5CA_RISC_REGS 0xEB
+//#define S5K5CA_ISP_REGS 0xFB /* S5C7323X */
+//#define S5K5CA_CIS_REGS 0x2F /* S5K437LA03 */
+                                                                                                                                                                                              
+//#define S5K5CA_REGS (0x1000)
+
+
+
+//delay 100ms phone SW //
+
+
+s5k5ca_short_t s5k5ca_snapshot_fireworks_00[] = // scene mode fireworks
+{ 
+
+//LowLight
+{ 0xFCFC, 0xD000 }, 
+{ 0x0028, 0x7000 },    
+{ 0x002A, 0x07E6 },
+{ 0x0F12, 0x0028 },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0028 },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+				 
+{ 0x002A, 0x0244 }, //Night capture//
+{ 0x0F12, 0x0002 }, //config 2 //
+{ 0x002A, 0x0230 }, 
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0246 }, 
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0224 }, 
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x0001 },
+
+{ 0xdddd, 0x06A4 }, //delay 1500ms 0304 Night Mode Change 
+
+{ 0xffff, 0xffff },
+};
+
+
+
+
+
+//---------------------------------------//
+// case 23 : FPS_NONFIX                     //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_nonfix_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x0288  },
+{ 0x0F12, 0x0535  },
+{ 0x0F12, 0x029A  },
+
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0230  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x023E  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+	
+{ 0xffff, 0xffff  },	
+};
+
+//---------------------------------------//
+// case 23 : FPS_15FIX                   //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_15fix_00[] = 
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x02B8 },
+{ 0x0F12, 0x029A },
+{ 0x0F12, 0x029A },
+
+
+{ 0x002A, 0x023C }, //Normal Preview//
+{ 0x0F12, 0x0001 }, //config 1 //                                                  
+{ 0x002A, 0x0240 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0230 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x023E },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0220 }, 
+{ 0x0F12, 0x0001 },	
+{ 0x002A, 0x0222 }, 
+{ 0x0F12, 0x0001 },
+
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_7FIX                    //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_7fix_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x02B8  },
+{ 0x0F12, 0x0535  },
+{ 0x0F12, 0x0535  },
+
+
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0001  }, //config 1 //                                                  
+{ 0x002A, 0x0240  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0230  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x023E  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  },   
+                  
+{ 0xffff, 0xffff  },
+};
+
+////////////
+// EFFECT_OFF
+////////////
+s5k5ca_short_t s5k5ca_effect_off_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x3286  }, //Pre/Post gamma on(ç›”æ±—)
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0000  },
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 16 : MonoEffect                  //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_effect_gray_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0001  },
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 20 : NegativeEffect              //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_effect_negative_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0003  },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////
+// EFFECT_SEPIA
+/////////////
+s5k5ca_short_t s5k5ca_effect_sepia_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0004  },
+
+{ 0xffff, 0xffff  },
+};
+
+////////////
+// EFFECT_AQUA
+/////////////
+s5k5ca_short_t s5k5ca_effect_aqua_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0005  },
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 19 : GREENEffect(sketch)         //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_effect_sketch_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x3286  },
+{ 0x0F12, 0x0000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0006  },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////
+// WB_Auto
+/////////////
+s5k5ca_short_t s5k5ca_wb_auto_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x246E  },
+{ 0x0F12, 0x0001  },
+
+{ 0xffff, 0xffff  },
+};                
+
+///////////
+// WB_Sunny
+//////////
+s5k5ca_short_t s5k5ca_wb_sunny_00[] = 
+{ 
+{ 0xfcfc, 0xd000  }, 
+{ 0x0028, 0x7000  }, 
+{ 0x002a, 0x246E  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x002a, 0x04A0  }, 
+{ 0x0f12, 0x05E0  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0400  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0500  }, //0530
+{ 0x0f12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////
+// WB_Cloudy
+///////////
+s5k5ca_short_t s5k5ca_wb_cloudy_00[] = 
+{ 
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+{ 0x002a, 0x246E  },
+{ 0x0f12, 0x0000  },
+{ 0x002a, 0x04A0  },
+{ 0x0f12, 0x06E0  }, //06B0 
+{ 0x0f12, 0x0001  }, //0001 
+{ 0x0f12, 0x0400  }, //0400 
+{ 0x0f12, 0x0001  }, //0001 
+{ 0x0f12, 0x0448  }, //0460 
+{ 0x0f12, 0x0001  }, //0001 
+
+{ 0xffff, 0xffff  },
+};
+
+////////////
+// WB_Tungsten
+////////////
+s5k5ca_short_t s5k5ca_wb_tungsten_00[] = 
+{ 
+{ 0xfcfc, 0xd000  }, 
+{ 0x0028, 0x7000  }, 
+{ 0x002a, 0x246E  }, 
+{ 0x0f12, 0x0000  }, 
+
+{ 0x002a, 0x04A0  }, 
+{ 0x0f12, 0x03D0  },  //03D0
+{ 0x0f12, 0x0001  },  //0001
+{ 0x0f12, 0x0400  },  //0400
+{ 0x0f12, 0x0001  },  //0001
+{ 0x0f12, 0x0910  },  //0920
+{ 0x0f12, 0x0001  },  //0001 
+                  
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// WB_Flourescent
+///////////////
+s5k5ca_short_t s5k5ca_wb_fluorescent_00[] = 
+{ 
+{ 0xfcfc, 0xd000  }, 
+{ 0x0028, 0x7000  }, 
+{ 0x002a, 0x246E  }, 
+{ 0x0f12, 0x0000  }, 
+                     
+{ 0x002a, 0x04A0  }, 
+{ 0x0f12, 0x0530  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0400  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0800  }, 
+{ 0x0f12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+
+////////////
+// BR_Minus4
+///////////
+s5k5ca_short_t s5k5ca_br_minus4_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+//////////
+// BR_Minus3
+/////////
+s5k5ca_short_t s5k5ca_br_minus3_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+//////////
+// BR_Minus2
+//////////
+s5k5ca_short_t s5k5ca_br_minus2_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};                
+
+//////////
+// BR_Minus1
+//////////
+s5k5ca_short_t s5k5ca_br_minus1_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_ZERO
+////////
+s5k5ca_short_t s5k5ca_br_zero_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_Plus1
+/////////
+s5k5ca_short_t s5k5ca_br_plus1_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_Plus2
+/////////
+s5k5ca_short_t s5k5ca_br_plus2_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_Plus3
+/////////
+s5k5ca_short_t s5k5ca_br_plus3_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};                
+
+/////////
+// BR_Plus4
+/////////
+s5k5ca_short_t s5k5ca_br_plus4_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+
+////////////////////
+// SCENE_MODE_OFF
+////////////////////
+//////////////////////////////////////////////
+//////////Scene off///////////////////////////
+//////////////////////////////////////////////
+//01.None//
+//02.Sports off
+//03.Night off
+//////////////////////////////////////////////
+////////// CAM_REGSET_SCENE_NORMAL ///////////
+s5k5ca_short_t s5k5ca_scene_mode_off_00[] =
+{ 
+
+{ 0xFCFC, 0xD000 },   //WB Auto
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x246E },
+{ 0x0F12, 0x0001 },
+
+{ 0x0028, 0x7000 },   //For Scene//
+{ 0x002A, 0x020C },   
+{ 0x0F12, 0x0000 },   // Brightness for controling the EV//
+{ 0x002A, 0x0210 },   
+{ 0x0F12, 0x0000 },   // Saturation//
+{ 0x0F12, 0x0000 },   // Blur_Sharpness //  
+	
+///////////////////
+//02. Sports off //
+///////////////////
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x12B8 },  
+{ 0x0F12, 0x1000 }, 
+ 
+{ 0x002A, 0x0530 },   	                                                    
+{ 0x0F12, 0x3415 },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534 },                                                               
+{ 0x0F12, 0x682A },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C },                                                               
+{ 0x0F12, 0x8235 },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680 },                                                               
+{ 0x0F12, 0xc350 },   //MaxExp4   125ms  38ea //                           
+        
+{ 0x002A, 0x0538 },                                                               
+{ 0x0F12, 0x3415 },   // 15fps //                                                 
+{ 0x002A, 0x053C },                                                               
+{ 0x0F12, 0x682A },   // 7.5fps //                                                
+{ 0x002A, 0x1684 },                                                               
+{ 0x0F12, 0x8235 },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688 },                                                               
+{ 0x0F12, 0xC350 },   //CapMaxExp4 //                                             
+
+{ 0x002A, 0x0540 },                                                               
+{ 0x0F12, 0x01B3 },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3 },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C },                                                               
+{ 0x0F12, 0x02A0 },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710 },   //MaxAnGain4 //    
+
+{ 0x002A, 0x0544 },  
+{ 0x0F12, 0x0100 },
+{ 0x0F12, 0x8000 },
+
+{ 0x002A, 0x04B4 },  
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x0064 },
+{ 0x0F12, 0x0001 },
+
+//////////////////
+//03. Night off //
+//////////////////
+
+{ 0x0028, 0x7000 },
+
+{ 0x002A, 0x0530 },//lt_uMaxExp1//     
+{ 0x0F12, 0x3415 },                    
+{ 0x002A, 0x0534 },//lt_uMaxExp2//     
+{ 0x0F12, 0x682A },                    
+{ 0x002A, 0x167C },//lt_uMaxExp3//     
+{ 0x0F12, 0x8235 },                    
+{ 0x002A, 0x1680 },//lt_uMaxExp4//     
+{ 0x0F12, 0xc350 },                    
+{ 0x0F12, 0x0000 },                    
+                                     
+{ 0x002A, 0x0538 },//It_uCapMaxExp1 // 
+{ 0x0F12, 0x3415 },                    
+{ 0x002A, 0x053C },//It_uCapMaxExp2 // 
+{ 0x0F12, 0x682A },                    
+{ 0x002A, 0x1684 },//It_uCapMaxExp3 // 
+{ 0x0F12, 0x8235 },                    
+{ 0x002A, 0x1688 },//It_uCapMaxExp4 // 
+{ 0x0F12, 0xc350 },                    
+{ 0x0F12, 0x0000 },                    
+                                     
+{ 0x002A, 0x0540 },                                                               
+{ 0x0F12, 0x01B3 },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3 },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C },                                                               
+{ 0x0F12, 0x02A0 },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710 },   //MaxAnGain4 //
+                                     
+{ 0x002A, 0x0544 },                    
+{ 0x0F12, 0x0100 },//It_uMaxDigGain // 
+
+{ 0x002A, 0x07E6 },
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+
+{ 0x002A, 0x0838 },
+{ 0x0F12, 0x003C },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x023C },
+{ 0x0F12, 0x0000 },//REG_TC_GP_ActivePrevConfig     //Normal Preview //  
+{ 0x002A, 0x0240 },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_PrevOpenAfterChange  
+{ 0x002A, 0x0230 },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_NewConfigSync        
+{ 0x002A, 0x023E },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_PrevConfigChanged    
+{ 0x002A, 0x0220 },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_EnablePreview        
+{ 0x0F12, 0x0001 },   //REG_TC_GP_EnablePreviewChanged 
+
+//Metering Center
+{ 0xfcfc, 0xd000 },
+{ 0x0028, 0x7000 },             
+                                                            
+{ 0x002A, 0x0F7E },    //ae weight  //     
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0201 },  //0201
+{ 0x0F12, 0x0102 },  //0102
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0201 },  //0101
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0102 },  //0101
+{ 0x0F12, 0x0201 },  //0201
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0102 },  //0102
+{ 0x0F12, 0x0101 },  //0201
+{ 0x0F12, 0x0101 },  //0202
+{ 0x0F12, 0x0101 },  //0202
+{ 0x0F12, 0x0101 },  //0102
+
+{ 0xffff, 0xffff  },
+};
+
+////////////////////
+// SCENE_PORTRAIT_ON
+///////////////////
+s5k5ca_short_t s5k5ca_scene_portrait_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x020C },
+{ 0x0F12, 0x0000 },
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x0000 },
+{ 0x0F12, 0xFFF6 },
+
+{ 0xffff, 0xffff  },
+};
+
+ 
+////////////////////
+// SCENE_LANDSCAPE_ON
+///////////////////
+s5k5ca_short_t s5k5ca_scene_landscape_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x020C },
+{ 0x0F12, 0x0000 },
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x001E },
+{ 0x0F12, 0x000A },
+
+//Metering Matrix
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+                  
+{ 0x002a, 0x0F7E  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  },
+
+{ 0xffff, 0xffff  }, 
+};
+
+////////////////////
+// NIGHTMODE_ON
+///////////////////
+
+s5k5ca_short_t s5k5ca_nightmode_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },  
+{ 0x002A, 0x02CC },   //Night Preview
+{ 0x0F12, 0x0400 },	//REG_2TC_PCFG_usWidth                      	2   700002CC    // 
+{ 0x0F12, 0x0300 },   //REG_2TC_PCFG_usHeight                     	2   700002CE    // 
+{ 0x0F12, 0x0005 },   //REG_2TC_PCFG_Format                       	2   700002D0    // 
+{ 0x0F12, 0x32E8 },   //REG_2TC_PCFG_usMaxOut4KHzRate             	2   700002D2    // 
+{ 0x0F12, 0x32a8 },   //REG_2TC_PCFG_usMinOut4KHzRate             	2   700002D4    // 
+{ 0x0F12, 0x0100 },   //REG_2TC_PCFG_OutClkPerPix88               	2   700002D6    // 
+{ 0x0F12, 0x0800 },   //REG_2TC_PCFG_uMaxBpp88                    	2   700002D8    // 
+{ 0x0F12, 0x0072 },   //REG_2TC_PCFG_PVIMask                      	2   700002DA    // 
+{ 0x0F12, 0x0010 },   //REG_2TC_PCFG_OIFMask                      	2   700002DC    // 
+{ 0x0F12, 0x01E0 },   //REG_2TC_PCFG_usJpegPacketSize             	2   700002DE    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_usJpegTotalPackets           	2   700002E0    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_uClockInd                    	2   700002E2    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_usFrTimeType                 	2   700002E4    // 
+{ 0x0F12, 0x0001 },   //REG_2TC_PCFG_FrRateQualityType            	2   700002E6    // 
+{ 0x0F12, 0x09C4 },   //REG_2TC_PCFG_usMaxFrTimeMsecMult10        	2   700002E8    // 
+{ 0x0F12, 0x029A },   //REG_2TC_PCFG_usMinFrTimeMsecMult10        	2   700002EA    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_bSmearOutput                 	2   700002EC    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_sSaturation                  	2   700002EE    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_sSharpBlur                   	2   700002F0    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_sColorTemp                   	2   700002F2    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_uDeviceGammaIndex            	2   700002F4    // 
+{ 0x0F12, 0x0003 },   //REG_2TC_PCFG_uPrevMirror                  	2   700002F6    // 
+{ 0x0F12, 0x0003 },   //REG_2TC_PCFG_uCaptureMirror               	2   700002F8    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_uRotation                    	2   700002FA    // 
+                 
+{ 0x002A, 0x03B4 },   //Night Capture 
+{ 0x0F12, 0x0000 },	//REG_2TC_CCFG_uCaptureMode                 	2   700003B4          //
+{ 0x0F12, 0x0800 },   //REG_2TC_CCFG_usWidth                      	2   700003B6          //
+{ 0x0F12, 0x0600 },   //REG_2TC_CCFG_usHeight                     	2   700003B8          //
+{ 0x0F12, 0x0005 },   //REG_2TC_CCFG_Format                       	2   700003BA          //
+{ 0x0F12, 0x32E8 },   //REG_2TC_CCFG_usMaxOut4KHzRate             	2   700003BC          //
+{ 0x0F12, 0x32a8 },   //REG_2TC_CCFG_usMinOut4KHzRate             	2   700003BE          //
+{ 0x0F12, 0x0100 },   //REG_2TC_CCFG_OutClkPerPix88               	2   700003C0          //
+{ 0x0F12, 0x0800 },   //REG_2TC_CCFG_uMaxBpp88                    	2   700003C2          //
+{ 0x0F12, 0x0072 },   //REG_2TC_CCFG_PVIMask                      	2   700003C4          //
+{ 0x0F12, 0x0010 },   //REG_2TC_CCFG_OIFMask                      	2   700003C6          //
+{ 0x0F12, 0x01E0 },   //REG_2TC_CCFG_usJpegPacketSize             	2   700003C8          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_usJpegTotalPackets           	2   700003CA          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_uClockInd                    	2   700003CC          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_usFrTimeType                 	2   700003CE          //
+{ 0x0F12, 0x0002 },   //REG_2TC_CCFG_FrRateQualityType            	2   700003D0          //
+{ 0x0F12, 0x1388 },   //REG_2TC_CCFG_usMaxFrTimeMsecMult10        	2   700003D2          //
+{ 0x0F12, 0x1388 },   //REG_2TC_CCFG_usMinFrTimeMsecMult10        	2   700003D4          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_bSmearOutput                 	2   700003D6          //
+{ 0x0F12, 0x0030 },   //REG_2TC_CCFG_sSaturation                  	2   700003D8          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_sSharpBlur                   	2   700003DA          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_sColorTemp                   	2   700003DC          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_uDeviceGammaIndex            	2   700003DE          //
+                 
+                 
+{ 0x002A, 0x0208 },
+{ 0x0F12, 0x0001 },   //REG_TC_IPRM_InitParamsUpdated//
+                 
+                 
+{ 0x002A, 0x0530 },   //lt_uMaxExp1//     
+{ 0x0F12, 0x3415 },                       
+{ 0x002A, 0x0534 },   //lt_uMaxExp2//     
+{ 0x0F12, 0x682A },                       
+{ 0x002A, 0x167C },   //lt_uMaxExp3//     
+{ 0x0F12, 0x8235 },                       
+{ 0x002A, 0x1680 },   //lt_uMaxExp4//     
+{ 0x0F12, 0x1A80 },                       
+{ 0x0F12, 0x0006 },                       
+                                          
+{ 0x002A, 0x0538 },   //It_uCapMaxExp1 // 
+{ 0x0F12, 0x3415 },                       
+{ 0x002A, 0x053C },   //It_uCapMaxExp2 // 
+{ 0x0F12, 0x682A },                       
+{ 0x002A, 0x1684 },   //It_uCapMaxExp3 // 
+{ 0x0F12, 0x8235 },                       
+{ 0x002A, 0x1688 },   //It_uCapMaxExp4 // 
+{ 0x0F12, 0x1A80 },                       
+{ 0x0F12, 0x0006 },                       
+                                          
+{ 0x002A, 0x0540 },                       
+{ 0x0F12, 0x0180 },   //It_uMaxAnGain1 // 
+{ 0x0F12, 0x0250 },   //It_uMaxAnGain2 // 
+{ 0x002A, 0x168C },                       
+{ 0x0F12, 0x0340 },   //It_uMaxAnGain3 // 
+{ 0x0F12, 0x0800 },   //It_uMaxAnGain4 // 
+                                          
+{ 0x002A, 0x0544 },                       
+{ 0x0F12, 0x0100 },   //It_uMaxDigGain // 
+                 
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x07E6 },
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+                 
+{ 0x002A, 0x0838 },
+{ 0x0F12, 0x0A3C },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x023C },
+{ 0x0F12, 0x0002 },  //night preview config 2//
+{ 0x002A, 0x0240 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0230 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x023E },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0220 },
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x0001 },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////////
+// SCENE_SPORTS_ON
+////////////////
+s5k5ca_short_t s5k5ca_scene_sports_on_00[] =
+{
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+
+{ 0x002A, 0x12B8 },  
+{ 0x0F12, 0x2000 }, 
+
+{ 0x002A, 0x0530 },
+{ 0x0F12, 0x36B0 },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534 },                                                               
+{ 0x0F12, 0x36B0 },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C },                                                               
+{ 0x0F12, 0x36B0 },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680 },                                                               
+{ 0x0F12, 0x36B0 },   //MaxExp4   125ms  38ea //                           
+        
+{ 0x002A, 0x0538 },                                                               
+{ 0x0F12, 0x36B0 },   // 15fps //                                                 
+{ 0x002A, 0x053C },                                                               
+{ 0x0F12, 0x36B0 },   // 7.5fps //                                                
+{ 0x002A, 0x1684 },                                                               
+{ 0x0F12, 0x36B0 },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688 },                                                               
+{ 0x0F12, 0x36B0 },   //CapMaxExp4 //                                             
+ 
+{ 0x002A, 0x0540 },                                                               
+{ 0x0F12, 0x0200 },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200 },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C },                                                               
+{ 0x0F12, 0x0200 },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200 },   //MaxAnGain4 //    
+
+{ 0x002A, 0x0544 },  
+{ 0x0F12, 0x0100 },
+{ 0x0F12, 0x8000 },
+
+{ 0x002A, 0x04B4 },  
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x00C8 },
+{ 0x0F12, 0x0001 },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////////
+// SCENE_SUNSET_ON
+////////////////
+s5k5ca_short_t s5k5ca_scene_sunset_on_00[] =
+{ 
+{ 0xfcfc, 0xd000 },
+{ 0x0028, 0x7000 },
+{ 0x002a, 0x246E },
+{ 0x0f12, 0x0000 },
+                 
+{ 0x002a, 0x04A0 },
+{ 0x0f12, 0x05E0 },
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0400 },
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0500 },
+{ 0x0f12, 0x0001 },
+
+{ 0xffff, 0xffff  },
+};
+
+////////////////
+// SCENE_DAWN_ON
+////////////////
+s5k5ca_short_t s5k5ca_scene_dawn_on_00[] =
+{ 
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+
+//////////////////////
+// SCENE_AGAINSTLIGHT_ON
+//////////////////////
+s5k5ca_short_t s5k5ca_scene_againstlight_on_00[] =
+{ 
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_TEXT_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_text_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x020C },
+{ 0x0F12, 0x0000 },
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x0000 },
+{ 0x0F12, 0x0014 },
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_PARTY_INDOOR_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_party_indoor_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+                    // Party/indoor _ Shaturation +1
+{ 0x0028, 0x7000 }, //For Scene
+{ 0x002A, 0x020C },             
+{ 0x0F12, 0x0000 }, // Brightness for controling the EV
+{ 0x002A, 0x0210 }, 
+{ 0x0F12, 0x001e }, // Saturagon
+{ 0x0F12, 0x0000 }, // Sharpness
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_BEACH_SNOW_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_beach_snow_on_00[] =
+{ 
+//04. BEACH_SNOW
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 }, //For Scene
+{ 0x002A, 0x020C },             
+{ 0x0F12, 0x0014 }, // Brightness for controling the EV
+{ 0x002A, 0x0210 }, 
+{ 0x0F12, 0x001e }, // Saturagon
+{ 0x0F12, 0x0000 }, // Sharpness
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_CANDLELIGHT_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_candlelight_on_00[] =
+{ 
+
+{ 0xfcfc, 0xd000 }, 
+{ 0x0028, 0x7000 }, 
+{ 0x002a, 0x246E }, 	 
+{ 0x0f12, 0x0000 },
+
+{ 0x002a, 0x04A0 }, 	 
+{ 0x0f12, 0x05E0 },
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0400 }, 
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0500 },
+{ 0x0f12, 0x0001 }, 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_FIREWORKS_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_fireworks_on_00[] =
+{ 
+//09. FIRE _ Preview : (4fps Exposure 250ms) Capture : ( 1fps Exposure 1000ms )
+//Preview 4fps : Capture 1fps
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x02CC },
+{ 0x0F12, 0x0400 },    	//REG_2TC_PCFG_usWidth                      	2   700002CC        //
+{ 0x0F12, 0x0300 },    	//REG_2TC_PCFG_usHeight                     	2   700002CE        //
+{ 0x0F12, 0x0005 },    	//REG_2TC_PCFG_Format                       	2   700002D0        //
+{ 0x0F12, 0x32E8 },    	//REG_2TC_PCFG_usMaxOut4KHzRate             	2   700002D2        //
+{ 0x0F12, 0x32a8 },    	//REG_2TC_PCFG_usMinOut4KHzRate             	2   700002D4        //
+{ 0x0F12, 0x0100 },    	//REG_2TC_PCFG_OutClkPerPix88               	2   700002D6        //
+{ 0x0F12, 0x0800 },    	//REG_2TC_PCFG_uMaxBpp88                    	2   700002D8        //
+{ 0x0F12, 0x0072 },    	//REG_2TC_PCFG_PVIMask                      	2   700002DA        //
+{ 0x0F12, 0x0010 },    	//REG_2TC_PCFG_OIFMask                      	2   700002DC        //
+{ 0x0F12, 0x01E0 },    	//REG_2TC_PCFG_usJpegPacketSize             	2   700002DE        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_usJpegTotalPackets           	2   700002E0        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_uClockInd                    	2   700002E2        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_usFrTimeType                 	2   700002E4        //
+{ 0x0F12, 0x0001 },    	//REG_2TC_PCFG_FrRateQualityType            	2   700002E6        //
+{ 0x0F12, 0x09C4 },    	//REG_2TC_PCFG_usMaxFrTimeMsecMult10        	2   700002E8        //
+{ 0x0F12, 0x029A },    	//REG_2TC_PCFG_usMinFrTimeMsecMult10        	2   700002EA        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_bSmearOutput                 	2   700002EC        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_sSaturation                  	2   700002EE        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_sSharpBlur                   	2   700002F0        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_sColorTemp                   	2   700002F2        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_uDeviceGammaIndex            	2   700002F4        //
+{ 0x0F12, 0x0003 },    	//REG_2TC_PCFG_uPrevMirror                  	2   700002F6        //
+{ 0x0F12, 0x0003 },    	//REG_2TC_PCFG_uCaptureMirror               	2   700002F8        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_uRotation                    	2   700002FA        //
+
+//Night shot capture 2fps
+{ 0x002A, 0x03B4 },
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_uCaptureMode                 	2   700003B4              //
+{ 0x0F12, 0x0800 },    	//REG_2TC_CCFG_usWidth                      	2   700003B6              //
+{ 0x0F12, 0x0600 },    	//REG_2TC_CCFG_usHeight                     	2   700003B8              //
+{ 0x0F12, 0x0005 },    	//REG_2TC_CCFG_Format                       	2   700003BA              //
+{ 0x0F12, 0x32E8 },    	//REG_2TC_CCFG_usMaxOut4KHzRate             	2   700003BC              //
+{ 0x0F12, 0x32a8 },    	//REG_2TC_CCFG_usMinOut4KHzRate             	2   700003BE              //
+{ 0x0F12, 0x0100 },    	//REG_2TC_CCFG_OutClkPerPix88               	2   700003C0              //
+{ 0x0F12, 0x0800 },    	//REG_2TC_CCFG_uMaxBpp88                    	2   700003C2              //
+{ 0x0F12, 0x0072 },    	//REG_2TC_CCFG_PVIMask                      	2   700003C4              //
+{ 0x0F12, 0x0010 },    	//REG_2TC_CCFG_OIFMask                      	2   700003C6              //
+{ 0x0F12, 0x01E0 },    	//REG_2TC_CCFG_usJpegPacketSize             	2   700003C8              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_usJpegTotalPackets           	2   700003CA              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_uClockInd                    	2   700003CC              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_usFrTimeType                 	2   700003CE              //
+{ 0x0F12, 0x0002 },    	//REG_2TC_CCFG_FrRateQualityType            	2   700003D0              //
+{ 0x0F12, 0x2710 },	//REG_2TC_CCFG_usMaxFrTimeMsecMult10        	2   700003D2              //
+{ 0x0F12, 0x2710 },	//REG_2TC_CCFG_usMinFrTimeMsecMult10        	2   700003D4              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_bSmearOutput                 	2   700003D6              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_sSaturation                  	2   700003D8              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_sSharpBlur                   	2   700003DA              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_sColorTemp                   	2   700003DC              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_uDeviceGammaIndex            	2   700003DE              //
+
+{ 0x002A, 0x0208 },                                      
+{ 0x0F12, 0x0001 },       //REG_TC_IPRM_InitParamsUpdated//
+
+{ 0x002A, 0x0530 },	//lt_uMaxExp1             
+{ 0x0F12, 0x3415 },		
+{ 0x002A, 0x0534 },       //lt_uMaxExp2              
+{ 0x0F12, 0x682A },		
+{ 0x002A, 0x167C },       //lt_uMaxExp3              
+{ 0x0F12, 0x8235 },		
+{ 0x002A, 0x1680 },       //lt_uMaxExp4              
+{ 0x0F12, 0x1A80 },       //1fps
+{ 0x0F12, 0x0006 },
+                              
+{ 0x002A, 0x0538 },       //It_uCapMaxExp1 //              
+{ 0x0F12, 0x3415 },	  
+{ 0x002A, 0x053C },       //It_uCapMaxExp1 //             
+{ 0x0F12, 0x682A },	  
+{ 0x002A, 0x1684 },       //It_uCapMaxExp3 //              
+{ 0x0F12, 0x8235 },	
+{ 0x002A, 0x1688 },       //It_uCapMaxExp4 //             
+{ 0x0F12, 0x1A80 },       //1fps
+{ 0x0F12, 0x0006 },	
+                              
+{ 0x002A, 0x0540 },                     
+{ 0x0F12, 0x0180 },       //It_uMaxAnGain1 //
+{ 0x0F12, 0x0250 },	//It_uMaxAnGain2 //
+{ 0x002A, 0x168C },                     
+{ 0x0F12, 0x0340 },	//It_uMaxAnGain3 //
+{ 0x0F12, 0x0710 },	//It_uMaxAnGain4 //
+
+{ 0x002A, 0x0544 },       //It_uMaxDigGain //
+{ 0x0F12, 0x0100 },
+
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x023C },
+{ 0x0F12, 0x0002 },	//#REG_TC_GP_ActivePrevConfig     //Night Preview
+{ 0x002A, 0x0240 },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_PrevOpenAfterChange
+{ 0x002A, 0x0230 },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_NewConfigSync
+{ 0x002A, 0x023E },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_PrevConfigChanged
+{ 0x002A, 0x0220 },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_EnablePreview
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_EnablePreviewChanged
+ 
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_Dust_Dawn_On
+///////////////
+s5k5ca_short_t s5k5ca_scene_dust_dawn_00[] =
+{ 
+//Cam_Cfg_WB_Fluorescent
+{ 0xfcfc, 0xd000 }, 
+{ 0x0028, 0x7000 }, 
+{ 0x002a, 0x246E }, 	 
+{ 0x0f12, 0x0000 },
+
+{ 0x002a, 0x04A0 }, 	 
+{ 0x0f12, 0x0530 }, 
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0400 }, 
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0800 }, 
+{ 0x0f12, 0x0001 }, 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_Fall_Color_On
+///////////////
+s5k5ca_short_t s5k5ca_scene_fall_color_00[] =
+{ 
+//07. FALL
+{ 0xFCFC, 0xD000 },
+//  Fall  _ Saturation +2
+{ 0x0028, 0x7000 }, //For Scene
+{ 0x002A, 0x020C },             
+{ 0x0F12, 0x0000 }, // Brightness for controling the EV
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x0032 }, // Saturation
+{ 0x0F12, 0x0000 }, // Sharpness
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_Backlight_On
+///////////////
+s5k5ca_short_t s5k5ca_scene_backlight_00[] =
+{ 
+//Metering Center
+//Flash On Default
+{ 0xfcfc, 0xd000 },
+{ 0x0028, 0x7000 },
+                 
+{ 0x002A, 0x0F7E  },    //ae weight  //     
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0201
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0102
+
+{ 0xffff, 0xffff  },
+};
+
+
+
+
+////////////////////////
+// MeasureBrightness_SPOT
+///////////////////////
+s5k5ca_short_t s5k5ca_measure_brightness_spot_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////////////////
+// MeasureBrightness_Default
+//////////////////////////
+s5k5ca_short_t s5k5ca_measure_brightness_default_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+#if 1//PGH 
+s5k5ca_short_t s5k5ca_ae_awb_unlock[] = 
+{
+{ 0xffff, 0xffff  },
+
+};
+ 
+s5k5ca_short_t s5k5ca_ae_mwb_unlock[] = 
+{
+{ 0xffff, 0xffff  },
+
+};
+ 
+s5k5ca_short_t s5k5ca_ae_awb_lock[] = 
+{
+{ 0xffff, 0xffff  },
+
+};
+#endif//PGH
+
+
+s5k5ca_short_t s5k5ca_af_low_lux_val[] = 
+{ //0217 SEMCO
+
+{ 0xffff, 0xffff  },
+};
+	 
+s5k5ca_short_t s5k5ca_af_normal_lux_val[] = 
+{
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////////////////////
+// MeasureBrightness_CENTER
+/////////////////////////////
+s5k5ca_short_t s5k5ca_measure_brightness_center_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+// 0407 function add.
+
+s5k5ca_short_t s5k5ca_metering_spot[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+                    
+{ 0x002A, 0x0F7E  },
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0f01  }, 
+{ 0x0f12, 0x010f  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0f01  }, 
+{ 0x0f12, 0x010f  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  },
+
+{ 0xffff, 0xffff  },
+
+};
+
+s5k5ca_short_t s5k5ca_metering_matrix[] = 
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+                  
+{ 0x002a, 0x0F7E  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  },
+
+{ 0xffff, 0xffff  },
+
+};
+
+s5k5ca_short_t s5k5ca_metering_center[] = 
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },             
+                                                             
+{ 0x002A, 0x0F7E  },    //ae weight  //     
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0201
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0102
+
+{ 0xffff, 0xffff  },
+
+};
+
+
+
+
+
+//define S5K5CA_INIT_REGS (sizeof(s5k5ca_reg)/sizeof(s5k5ca_reg[0]))
+//define S5K5CA_UXGA_REGS (sizeof(s5k5ca_reg_uxga)/sizeof(s5k5ca_reg_uxga[0]))
+//define S5K5CA_SVGA_REGS (sizeof(s5k5ca_reg_svga)/sizeof(s5k5ca_reg_svga[0]))
+//define S5K5CA_VGA_REGS (sizeof(s5k5ca_reg_vga)/sizeof(s5k5ca_reg_vga[0]))
+//define S5K5CA_QSVGA_REGS (sizeof(s5k5ca_reg_qsvga)/sizeof(s5k5ca_reg_qsvga[0]))
+
+////define S5K5CA_RISC_REGS 0xEB
+////define S5K5CA_ISP_REGS 0xFB /* S5C7323X */
+////define S5K5CA_CIS_REGS 0x2F /* S5K437LA03 */
+                                                                                                                                                                                              
+////define S5K5CA_REGS (0x1000)
+
+//endif
+
+
+
+#endif
diff -uNra linux-3.0.82/drivers/media/video/s5k5ca640x480xrgb_test.h linux-3.0.82x/drivers/media/video/s5k5ca640x480xrgb_test.h
--- linux-3.0.82/drivers/media/video/s5k5ca640x480xrgb_test.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/s5k5ca640x480xrgb_test.h	2017-09-23 03:42:49.582676396 +0800
@@ -0,0 +1,5403 @@
+
+#ifndef _SAMSUNG_SXGA_H_
+#define _SAMSUNG_SXGA_H_
+
+/*******************************************************************************************
+ #  Display resolution standards #
+
+	QCIF: 176 x 144
+	CIF: 352 x 288
+	QVGA: 320 x 240
+	VGA: 640 x 480 
+	SVGA: 800 x 600 
+	XGA: 1024 x 768 
+	WXGA: 1280 x 800 
+	QVGA: 1280 x 960 
+	SXGA: 1280 x 1024 
+	SXGA+: 1400 x 1050 
+	WSXGA+: 1680 x 1050 
+	UXGA: 1600 x 1200 
+	WUXGA: 1920 x 1200 
+	QXGA: 2048 x 1536
+********************************************************************************************/
+
+//#include "../bits.h"
+
+/* Camera information 
+ * FPC Label : Samsung MEGA Pixel Camera : V4220 REV06 
+ * Modified by charles -Initial function of '3AA' test routine
+ * Modified and tested by YongHwui.Kim <yonghwui.kim@samsung.com> for S5K3AAEX Camera
+ */
+                                                                                
+#define CHIP_DELAY 0xFF
+                                                                                
+typedef struct samsung_t{
+        unsigned short page;	
+        unsigned short subaddr;
+        unsigned short value;
+
+} s5k5ca_t;
+
+// mihee 080508 start
+typedef struct samsung_short_t{
+        unsigned short subaddr;
+        unsigned short value;
+        unsigned short page;
+} s5k5ca_short_t;
+// mihee 080508 end
+
+typedef struct exif_data_st{
+        unsigned short exposureTime;
+		unsigned short lux;
+		unsigned short iso;
+} exif_data_t;
+
+#ifdef CONFIG_CPU_S3C24A0A
+#define TRY_HIGH_CLOCK 1
+#endif
+
+				//***************************************************
+				//  name: 	S5K3AAEX EVT2 setfile
+				//  ver:		v2.61	
+				//  history: 	
+				//	v0.0	start from 040908 setfile
+				//	v1.0	arange register
+				//	v1.01	change MCLK(25Mhz) and Frame rate(7fps)
+				//	v2.0	adjust register setting for 3AA EVT2
+				//		- color correction, RGB shding off, hsync start position, Mirror, fps
+				//		- Color Tuning, YGRPDLY 
+				//	v2.1	change Frame rate(7.5fps) and Total gain to x4 
+				//		(because of reducing visual noise at low illumination)
+				//		- change BPRM AGC Max and FrameAE start 
+				//		improve AE speed
+				//	v2.2	modify AWB G gain and solve 50hz flicker detection fail in 25MHz 7.5fps
+				//	v2.3	Adjust gamma, Dark Slice, white point, Hue gain,
+				//		White Balance B control, Y gain On, Digital Clamp On
+				//		lower AWB G gain
+				//	v2.4	Adjust AE window weight, Y Gamma, WhitePoint, Shading and BPR Max Thres.
+				// 	v2.41	Adjust AE/AWB window and AWB internal window boundary to decrease skin color tracking
+				// 	v2.411	special version for PSCDS
+				// 	v2.412	RGB shading off
+				//	v2.5	Lens change STW to Sekonix 
+				//		adjust White point and Y shading Coef (RGB shading off)
+				//	v2.6	New Tuning because of Full YC off and YCbCr Coef change
+				//		Gamma, Dark Slice, color matrix (not use), Color suppress
+				//		R Gain and DBPR agc MIN/MAX
+				//	v2.61	VCK inversion(data rising)
+				//***************************************************
+				///////////////////////////////////////////////////
+
+//#if defined(CONFIG_VIDEO_SAMSUNG_S5K5CA)
+s5k5ca_short_t s5k5ca_preview_00[] = 
+{
+{ 0xFCFC, 0xD000  },                                                                                  
+{ 0x0028, 0x7000  }, 
+                  
+{ 0x002A, 0x07E6  },                                                            
+{ 0x0F12, 0x0000  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow 
+{ 0x0F12, 0x0000  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+                  
+{ 0x002A, 0x0838  },
+{ 0x0F12, 0x003C  },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x0908  },
+{ 0x0F12, 0x0046  },	//TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]
+
+//HIGHLUX RECOVER Value
+{ 0x002a, 0x0B2C  },
+{ 0x0F12, 0x003C  },	//70000B2C //TVAR_afit_pBaseValS[436] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x0050  },	//70000B2E //TVAR_afit_pBaseValS[437] /AFIT16_YUV422_DENOISE_iUVHighThresh  
+
+{ 0x002a, 0x0B50  },
+{ 0x0F12, 0x012D  },	//70000B50 //TVAR_afit_pBaseValS[454] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8] 
+
+{ 0x002a, 0x0B84  },
+{ 0x0F12, 0x210C  },	//70000B84 //TVAR_afit_pBaseValS[480] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]   
+
+
+{ 0x002A, 0x035C  }, //Capture Mode//
+{ 0x0F12, 0x0000  },
+{ 0x002A, 0x0388  }, //Capture Mode//
+{ 0x0F12, 0x0000  },
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },   
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+s5k5ca_short_t s5k5ca_init_00[] = 
+{
+{ 0xFCFC, 0xD000  },
+
+//************************************//
+////****************************************/																															//
+////Ver 0.1 New Analog Settings for 5CA EVT0 30FPS in Binning, including latest TnP for EVT1              //
+////20091310 - added analog settings for 430LSB, long exposure mode only. Settings are for 32MHz Sys. CLK //
+////20091102 - added all calibration data, final settings for STW EVT1 module, SCLK 32MHz, PCLK 60 MHz.   //
+////20091104 - Changed the shading alpha &Near off                                                        //
+////20091104 - Changed awbb_GridEnable from 0001h to 0002h	//awbb_GridEnable                             //
+////aetarget41-46, gamma change for improving contrast                                                    //
+////20100113 - New TnP updated//
+
+{ 0xFCFC, 0xD000  },	//Reset                                  //
+{ 0x0010, 0x0001  },   //Clear host interrupt so main will wait //
+{ 0x1030, 0x0000  },   //ARM go                                 //
+{ 0x0014, 0x0001  },   //Wait100mSec
+                  
+{ 0xdddd, 0x0064  }, //delay 100ms
+                  
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x2CF8  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0x4827  },
+{ 0x0F12, 0x21C0  },
+{ 0x0F12, 0x8041  },
+{ 0x0F12, 0x4825  },
+{ 0x0F12, 0x4A26  },
+{ 0x0F12, 0x3020  },
+{ 0x0F12, 0x8382  },
+{ 0x0F12, 0x1D12  },
+{ 0x0F12, 0x83C2  },
+{ 0x0F12, 0x4822  },
+{ 0x0F12, 0x3040  },
+{ 0x0F12, 0x8041  },
+{ 0x0F12, 0x4821  },
+{ 0x0F12, 0x4922  },
+{ 0x0F12, 0x3060  },
+{ 0x0F12, 0x8381  },
+{ 0x0F12, 0x1D09  },
+{ 0x0F12, 0x83C1  },
+{ 0x0F12, 0x4821  },
+{ 0x0F12, 0x491D  },
+{ 0x0F12, 0x8802  },
+{ 0x0F12, 0x3980  },
+{ 0x0F12, 0x804A  },
+{ 0x0F12, 0x8842  },
+{ 0x0F12, 0x808A  },
+{ 0x0F12, 0x8882  },
+{ 0x0F12, 0x80CA  },
+{ 0x0F12, 0x88C2  },
+{ 0x0F12, 0x810A  },
+{ 0x0F12, 0x8902  },
+{ 0x0F12, 0x491C  },
+{ 0x0F12, 0x80CA  },
+{ 0x0F12, 0x8942  },
+{ 0x0F12, 0x814A  },
+{ 0x0F12, 0x8982  },
+{ 0x0F12, 0x830A  },
+{ 0x0F12, 0x89C2  },
+{ 0x0F12, 0x834A  },
+{ 0x0F12, 0x8A00  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x8188  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x4819  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xFA0E  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x4819  },
+{ 0x0F12, 0x6341  },
+{ 0x0F12, 0x4919  },
+{ 0x0F12, 0x4819  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xFA07  },
+{ 0x0F12, 0x4816  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x3840  },
+{ 0x0F12, 0x62C1  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x3880  },
+{ 0x0F12, 0x63C1  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x6301  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x3040  },
+{ 0x0F12, 0x6181  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x4817  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9F7  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x4817  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9F3  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x4817  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9EF  },
+{ 0x0F12, 0xBC10  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0x1100  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x267C  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x2CE8  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x3274  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xF400  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0xF520  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2DF1  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x89A9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x2E43  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x0140  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2E7D  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xB4F7  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x2F07  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2F2B  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2FD1  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2FE5  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2FB9  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x013D  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x306B  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x5823  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x30B9  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xD789  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0xB570  },
+{ 0x0F12, 0x6804  },
+{ 0x0F12, 0x6845  },
+{ 0x0F12, 0x6881  },
+{ 0x0F12, 0x6840  },
+{ 0x0F12, 0x2900  },
+{ 0x0F12, 0x6880  },
+{ 0x0F12, 0xD007  },
+{ 0x0F12, 0x49C3  },
+{ 0x0F12, 0x8949  },
+{ 0x0F12, 0x084A  },
+{ 0x0F12, 0x1880  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9BA  },
+{ 0x0F12, 0x80A0  },
+{ 0x0F12, 0xE000  },
+{ 0x0F12, 0x80A0  },
+{ 0x0F12, 0x88A0  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD010  },
+{ 0x0F12, 0x68A9  },
+{ 0x0F12, 0x6828  },
+{ 0x0F12, 0x084A  },
+{ 0x0F12, 0x1880  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9AE  },
+{ 0x0F12, 0x8020  },
+{ 0x0F12, 0x1D2D  },
+{ 0x0F12, 0xCD03  },
+{ 0x0F12, 0x084A  },
+{ 0x0F12, 0x1880  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9A7  },
+{ 0x0F12, 0x8060  },
+{ 0x0F12, 0xBC70  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0x2000  },
+{ 0x0F12, 0x8060  },
+{ 0x0F12, 0x8020  },
+{ 0x0F12, 0xE7F8  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9A2  },
+{ 0x0F12, 0x48B2  },
+{ 0x0F12, 0x8A40  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD00C  },
+{ 0x0F12, 0x48B1  },
+{ 0x0F12, 0x49B2  },
+{ 0x0F12, 0x8800  },
+{ 0x0F12, 0x4AB2  },
+{ 0x0F12, 0x2805  },
+{ 0x0F12, 0xD003  },
+{ 0x0F12, 0x4BB1  },
+{ 0x0F12, 0x795B  },
+{ 0x0F12, 0x2B00  },
+{ 0x0F12, 0xD005  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0x8008  },
+{ 0x0F12, 0x8010  },
+{ 0x0F12, 0xBC10  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD1FA  },
+{ 0x0F12, 0x2000  },
+{ 0x0F12, 0x8008  },
+{ 0x0F12, 0x8010  },
+{ 0x0F12, 0xE7F6  },
+{ 0x0F12, 0xB5F8  },
+{ 0x0F12, 0x2407  },
+{ 0x0F12, 0x2C06  },
+{ 0x0F12, 0xD035  },
+{ 0x0F12, 0x2C07  },
+{ 0x0F12, 0xD033  },
+{ 0x0F12, 0x48A3  },
+{ 0x0F12, 0x8BC1  },
+{ 0x0F12, 0x2900  },
+{ 0x0F12, 0xD02A  },
+{ 0x0F12, 0x00A2  },
+{ 0x0F12, 0x1815  },
+{ 0x0F12, 0x4AA4  },
+{ 0x0F12, 0x6DEE  },
+{ 0x0F12, 0x8A92  },
+{ 0x0F12, 0x4296  },
+{ 0x0F12, 0xD923  },
+{ 0x0F12, 0x0028  },
+{ 0x0F12, 0x3080  },
+{ 0x0F12, 0x0007  },
+{ 0x0F12, 0x69C0  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF96B  },
+{ 0x0F12, 0x1C71  },
+{ 0x0F12, 0x0280  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF967  },
+{ 0x0F12, 0x0006  },
+{ 0x0F12, 0x4898  },
+{ 0x0F12, 0x0061  },
+{ 0x0F12, 0x1808  },
+{ 0x0F12, 0x8D80  },
+{ 0x0F12, 0x0A01  },
+{ 0x0F12, 0x0600  },
+{ 0x0F12, 0x0E00  },
+{ 0x0F12, 0x1A08  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF96A  },
+{ 0x0F12, 0x0002  },
+{ 0x0F12, 0x6DE9  },
+{ 0x0F12, 0x6FE8  },
+{ 0x0F12, 0x1A08  },
+{ 0x0F12, 0x4351  },
+{ 0x0F12, 0x0300  },
+{ 0x0F12, 0x1C49  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF953  },
+{ 0x0F12, 0x0401  },
+{ 0x0F12, 0x0430  },
+{ 0x0F12, 0x0C00  },
+{ 0x0F12, 0x4301  },
+{ 0x0F12, 0x61F9  },
+{ 0x0F12, 0xE004  },
+{ 0x0F12, 0x00A2  },
+{ 0x0F12, 0x4990  },
+{ 0x0F12, 0x1810  },
+{ 0x0F12, 0x3080  },
+{ 0x0F12, 0x61C1  },
+{ 0x0F12, 0x1E64  },
+{ 0x0F12, 0xD2C5  },
+{ 0x0F12, 0x2006  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF959  },
+{ 0x0F12, 0x2007  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF956  },
+{ 0x0F12, 0xBCF8  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF958  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD00A  },
+{ 0x0F12, 0x4881  },
+{ 0x0F12, 0x8B81  },
+{ 0x0F12, 0x0089  },
+{ 0x0F12, 0x1808  },
+{ 0x0F12, 0x6DC1  },
+{ 0x0F12, 0x4883  },
+{ 0x0F12, 0x8A80  },
+{ 0x0F12, 0x4281  },
+{ 0x0F12, 0xD901  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0xE7A1  },
+{ 0x0F12, 0x2000  },
+{ 0x0F12, 0xE79F  },
+{ 0x0F12, 0xB5F8  },
+{ 0x0F12, 0x0004  },
+{ 0x0F12, 0x4F80  },
+{ 0x0F12, 0x227D  },
+{ 0x0F12, 0x8938  },
+{ 0x0F12, 0x0152  },
+{ 0x0F12, 0x4342  },
+{ 0x0F12, 0x487E  },
+{ 0x0F12, 0x9000  },
+{ 0x0F12, 0x8A01  },
+{ 0x0F12, 0x0848  },
+{ 0x0F12, 0x1810  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91D  },
+{ 0x0F12, 0x210F  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF940  },
+{ 0x0F12, 0x497A  },
+{ 0x0F12, 0x8C49  },
+{ 0x0F12, 0x090E  },
+{ 0x0F12, 0x0136  },
+{ 0x0F12, 0x4306  },
+{ 0x0F12, 0x4979  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0xD003  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0x0240  },
+{ 0x0F12, 0x4330  },
+{ 0x0F12, 0x8108  },
+{ 0x0F12, 0x4876  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0x8D00  },
+{ 0x0F12, 0xD001  },
+{ 0x0F12, 0x2501  },
+{ 0x0F12, 0xE000  },
+{ 0x0F12, 0x2500  },
+{ 0x0F12, 0x4972  },
+{ 0x0F12, 0x4328  },
+{ 0x0F12, 0x8008  },
+{ 0x0F12, 0x207D  },
+{ 0x0F12, 0x00C0  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF92E  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0x496E  },
+{ 0x0F12, 0x0328  },
+{ 0x0F12, 0x4330  },
+{ 0x0F12, 0x8108  },
+{ 0x0F12, 0x88F8  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0x01AA  },
+{ 0x0F12, 0x4310  },
+{ 0x0F12, 0x8088  },
+{ 0x0F12, 0x9800  },
+{ 0x0F12, 0x8A01  },
+{ 0x0F12, 0x486A  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8F1  },
+{ 0x0F12, 0x496A  },
+{ 0x0F12, 0x8809  },
+{ 0x0F12, 0x4348  },
+{ 0x0F12, 0x0400  },
+{ 0x0F12, 0x0C00  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF918  },
+{ 0x0F12, 0x0020  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91D  },
+{ 0x0F12, 0x4866  },
+{ 0x0F12, 0x7004  },
+{ 0x0F12, 0xE7A3  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0x0004  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91E  },
+{ 0x0F12, 0x6020  },
+{ 0x0F12, 0x4963  },
+{ 0x0F12, 0x8B49  },
+{ 0x0F12, 0x0789  },
+{ 0x0F12, 0xD001  },
+{ 0x0F12, 0x0040  },
+{ 0x0F12, 0x6020  },
+{ 0x0F12, 0xE74C  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91B  },
+{ 0x0F12, 0x485F  },
+{ 0x0F12, 0x8880  },
+{ 0x0F12, 0x0601  },
+{ 0x0F12, 0x4854  },
+{ 0x0F12, 0x1609  },
+{ 0x0F12, 0x8141  },
+{ 0x0F12, 0xE742  },
+{ 0x0F12, 0xB5F8  },
+{ 0x0F12, 0x000F  },
+{ 0x0F12, 0x4C55  },
+{ 0x0F12, 0x3420  },
+{ 0x0F12, 0x2500  },
+{ 0x0F12, 0x5765  },
+{ 0x0F12, 0x0039  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF913  },
+{ 0x0F12, 0x9000  },
+{ 0x0F12, 0x2600  },
+{ 0x0F12, 0x57A6  },
+{ 0x0F12, 0x4C4C  },
+{ 0x0F12, 0x42AE  },
+{ 0x0F12, 0xD01B  },
+{ 0x0F12, 0x4D54  },
+{ 0x0F12, 0x8AE8  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD013  },
+{ 0x0F12, 0x484D  },
+{ 0x0F12, 0x8A01  },
+{ 0x0F12, 0x8B80  },
+{ 0x0F12, 0x4378  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8B5  },
+{ 0x0F12, 0x89A9  },
+{ 0x0F12, 0x1A41  },
+{ 0x0F12, 0x484E  },
+{ 0x0F12, 0x3820  },
+{ 0x0F12, 0x8AC0  },
+{ 0x0F12, 0x4348  },
+{ 0x0F12, 0x17C1  },
+{ 0x0F12, 0x0D89  },
+{ 0x0F12, 0x1808  },
+{ 0x0F12, 0x1280  },
+{ 0x0F12, 0x8961  },
+{ 0x0F12, 0x1A08  },
+{ 0x0F12, 0x8160  },
+{ 0x0F12, 0xE003  },
+{ 0x0F12, 0x88A8  },
+{ 0x0F12, 0x0600  },
+{ 0x0F12, 0x1600  },
+{ 0x0F12, 0x8160  },
+{ 0x0F12, 0x200A  },
+{ 0x0F12, 0x5E20  },
+{ 0x0F12, 0x42B0  },
+{ 0x0F12, 0xD011  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8AB  },
+{ 0x0F12, 0x1D40  },
+{ 0x0F12, 0x00C3  },
+{ 0x0F12, 0x1A18  },
+{ 0x0F12, 0x214B  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF897  },
+{ 0x0F12, 0x211F  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8BA  },
+{ 0x0F12, 0x210A  },
+{ 0x0F12, 0x5E61  },
+{ 0x0F12, 0x0FC9  },
+{ 0x0F12, 0x0149  },
+{ 0x0F12, 0x4301  },
+{ 0x0F12, 0x483D  },
+{ 0x0F12, 0x81C1  },
+{ 0x0F12, 0x9800  },
+{ 0x0F12, 0xE74A  },
+{ 0x0F12, 0xB5F1  },
+{ 0x0F12, 0xB082  },
+{ 0x0F12, 0x2500  },
+{ 0x0F12, 0x483A  },
+{ 0x0F12, 0x9001  },
+{ 0x0F12, 0x2400  },
+{ 0x0F12, 0x2028  },
+{ 0x0F12, 0x4368  },
+{ 0x0F12, 0x4A39  },
+{ 0x0F12, 0x4925  },
+{ 0x0F12, 0x1887  },
+{ 0x0F12, 0x1840  },
+{ 0x0F12, 0x9000  },
+{ 0x0F12, 0x9800  },
+{ 0x0F12, 0x0066  },
+{ 0x0F12, 0x9A01  },
+{ 0x0F12, 0x1980  },
+{ 0x0F12, 0x218C  },
+{ 0x0F12, 0x5A09  },
+{ 0x0F12, 0x8A80  },
+{ 0x0F12, 0x8812  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8CA  },
+{ 0x0F12, 0x53B8  },
+{ 0x0F12, 0x1C64  },
+{ 0x0F12, 0x2C14  },
+{ 0x0F12, 0xDBF1  },
+{ 0x0F12, 0x1C6D  },
+{ 0x0F12, 0x2D03  },
+{ 0x0F12, 0xDBE6  },
+{ 0x0F12, 0x9802  },
+{ 0x0F12, 0x6800  },
+{ 0x0F12, 0x0600  },
+{ 0x0F12, 0x0E00  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8C5  },
+{ 0x0F12, 0xBCFE  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0xB570  },
+{ 0x0F12, 0x6805  },
+{ 0x0F12, 0x2404  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8C5  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD103  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8C9  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2400  },
+{ 0x0F12, 0x3540  },
+{ 0x0F12, 0x88E8  },
+{ 0x0F12, 0x0500  },
+{ 0x0F12, 0xD403  },
+{ 0x0F12, 0x4822  },
+{ 0x0F12, 0x89C0  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD002  },
+{ 0x0F12, 0x2008  },
+{ 0x0F12, 0x4304  },
+{ 0x0F12, 0xE001  },
+{ 0x0F12, 0x2010  },
+{ 0x0F12, 0x4304  },
+{ 0x0F12, 0x481F  },
+{ 0x0F12, 0x8B80  },
+{ 0x0F12, 0x0700  },
+{ 0x0F12, 0x0F81  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0x2900  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x4304  },
+{ 0x0F12, 0x491C  },
+{ 0x0F12, 0x8B0A  },
+{ 0x0F12, 0x42A2  },
+{ 0x0F12, 0xD004  },
+{ 0x0F12, 0x0762  },
+{ 0x0F12, 0xD502  },
+{ 0x0F12, 0x4A19  },
+{ 0x0F12, 0x3220  },
+{ 0x0F12, 0x8110  },
+{ 0x0F12, 0x830C  },
+{ 0x0F12, 0xE691  },
+{ 0x0F12, 0x0C3C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x3274  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x26E8  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x6100  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x6500  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x1A7C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1120  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xFFFF  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x3374  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1D6C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x167C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xF400  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2C2C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x40A0  },
+{ 0x0F12, 0x00DD  },
+{ 0x0F12, 0xF520  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2C29  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1A54  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1564  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xF2A0  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2440  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x05A0  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2894  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1224  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xB000  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x1A3F  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xF004  },
+{ 0x0F12, 0xE51F  },
+{ 0x0F12, 0x1F48  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x24BD  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x36DD  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xB4CF  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xB5D7  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x36ED  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xF53F  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xF5D9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x013D  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xF5C9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xFAA9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x3723  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x5823  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xD771  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xD75B  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x8117  },
+{ 0x0F12, 0x0000  },
+
+// End TnP part
+
+//========================================================                      
+// CIs/APs/An setting        - 400LsB  sYsCLK 32MHz                             
+//========================================================                      
+// This regis are for FACTORY ONLY. If you change it without prior notification,
+// YOU are REsIBLE for the FAILURE that will happen in the future.              
+//========================================================                      
+
+
+{ 0x002A, 0x157A  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x1578  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x1576  },
+{ 0x0F12, 0x0020  },
+{ 0x002A, 0x1574  },
+{ 0x0F12, 0x0006  },
+{ 0x002A, 0x156E  },
+{ 0x0F12, 0x0001  },	// slope calibration tolerance in units of 1/256	
+{ 0x002A, 0x1568  },
+{ 0x0F12, 0x00FC  },
+                  
+// /ADC control    
+{ 0x002A, 0x155A  },
+{ 0x0F12, 0x01CC  },	//ADC sAT of 450mV for 10bit default in EVT1                         	
+{ 0x002A, 0x157E  },                                                                        
+{ 0x0F12, 0x0C80  },	// 3200 Max. Reset ramp DCLK counts (default 2048 0x800)             
+{ 0x0F12, 0x0578  },	// 1400 Max. Reset ramp DCLK counts for x3.5                         
+{ 0x002A, 0x157C  },                                                                        
+{ 0x0F12, 0x0190  },	// 400 Reset ramp for x1 in DCLK counts                              
+{ 0x002A, 0x1570  },                                                                        
+{ 0x0F12, 0x00A0  },	// 160 LsB                                                           
+{ 0x0F12, 0x0010  },	// reset threshold                                                   
+{ 0x002A, 0x12C4  },                                                                        
+{ 0x0F12, 0x006A  },	// 106 additional timing columns.                                    
+{ 0x002A, 0x12C8  },                                                                        
+{ 0x0F12, 0x08AC  },	// 2220 ADC columns in normal mode including Hold & Latch            
+{ 0x0F12, 0x0050  },	// 80 addition of ADC columns in Y-ave mode (default 244 0x74)
+                  
+{ 0x002A, 0x1696  },	// based on APs guidelines                        
+{ 0x0F12, 0x0000  },   // based on APs guidelines                        
+{ 0x0F12, 0x0000  },   // default. 1492 used for ADC dark characteristics
+{ 0x0F12, 0x00C6  },   // default. 1492 used for ADC dark characteristics
+{ 0x0F12, 0x00C6  },                                                  
+//{ 0x002A, 0x12B8  },   //disable CINTR 0                                 
+//{ 0x0F12, 0x0B00  },                                                     
+                                                                      
+{ 0x002A, 0x1690  },   // when set double sampling is activated - requires different set of pointers                                                 
+{ 0x0F12, 0x0001  },                                                     
+                                                                      
+{ 0x002A, 0x12B0  },   // comp and pixel bias control 0xF40E - default for EVT1                                                                      
+{ 0x0F12, 0x0055  },   // comp and pixel bias control 0xF40E for binning mode                                                                        
+{ 0x0F12, 0x005A  },                                                     
+                                                                      
+{ 0x002A, 0x337A  },   // [7] - is used for rest-only mode (EVT0 value is 0xD and HW 0x6)                                                            
+{ 0x0F12, 0x0006  },
+{ 0x0F12, 0x0068  },
+{ 0x002A, 0x169E  },
+{ 0x0F12, 0x0007  },
+{ 0x002A, 0x0BF6  },
+{ 0x0F12, 0x0000  },
+	                
+                    
+{ 0x002A, 0x327C  },
+{ 0x0F12, 0x1000  },
+{ 0x0F12, 0x6998  },
+{ 0x0F12, 0x0078  },
+{ 0x0F12, 0x04FE  },
+{ 0x0F12, 0x8800  },
+                    
+{ 0x002A, 0x3274  },
+{ 0x0F12, 0x0155  },	//set IO driving current 2mA for Gs500
+{ 0x0F12, 0x0155  },   //set IO driving current              
+{ 0x0F12, 0x1555  },   //set IO driving current              
+{ 0x0F12, 0x0555  },   //set IO driving current              
+                    
+                    
+{ 0x0028, 0x7000  },	
+{ 0x002A, 0x12D2  },	   
+{ 0x0F12, 0x0003  },	//senHal_pContSenModesRegsArray[0][0]2 700012D2     
+{ 0x0F12, 0x0003  },   //senHal_pContSenModesRegsArray[0][1]2 700012D4  
+{ 0x0F12, 0x0003  },   //senHal_pContSenModesRegsArray[0][2]2 700012D6  
+{ 0x0F12, 0x0003  },   //senHal_pContSenModesRegsArray[0][3]2 700012D8  
+{ 0x0F12, 0x0884  },   //senHal_pContSenModesRegsArray[1][0]2 700012DA  
+{ 0x0F12, 0x08CF  },   //senHal_pContSenModesRegsArray[1][1]2 700012DC  
+{ 0x0F12, 0x0500  },   //senHal_pContSenModesRegsArray[1][2]2 700012DE  
+{ 0x0F12, 0x054B  },   //senHal_pContSenModesRegsArray[1][3]2 700012E0  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][0]2 700012E2  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][1]2 700012E4  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][2]2 700012E6  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][3]2 700012E8  
+{ 0x0F12, 0x0885  },   //senHal_pContSenModesRegsArray[3][0]2 700012EA  
+{ 0x0F12, 0x0467  },   //senHal_pContSenModesRegsArray[3][1]2 700012EC  
+{ 0x0F12, 0x0501  },   //senHal_pContSenModesRegsArray[3][2]2 700012EE  
+{ 0x0F12, 0x02A5  },   //senHal_pContSenModesRegsArray[3][3]2 700012F0  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[4][0]2 700012F2  
+{ 0x0F12, 0x046A  },   //senHal_pContSenModesRegsArray[4][1]2 700012F4  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[4][2]2 700012F6  
+{ 0x0F12, 0x02A8  },   //senHal_pContSenModesRegsArray[4][3]2 700012F8  
+{ 0x0F12, 0x0885  },   //senHal_pContSenModesRegsArray[5][0]2 700012FA  
+{ 0x0F12, 0x08D0  },   //senHal_pContSenModesRegsArray[5][1]2 700012FC  
+{ 0x0F12, 0x0501  },   //senHal_pContSenModesRegsArray[5][2]2 700012FE  
+{ 0x0F12, 0x054C  },   //senHal_pContSenModesRegsArray[5][3]2 70001300  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[6][0]2 70001302  
+{ 0x0F12, 0x0020  },   //senHal_pContSenModesRegsArray[6][1]2 70001304  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[6][2]2 70001306  
+{ 0x0F12, 0x0020  },   //senHal_pContSenModesRegsArray[6][3]2 70001308  
+{ 0x0F12, 0x0881  },   //senHal_pContSenModesRegsArray[7][0]2 7000130A  
+{ 0x0F12, 0x0463  },   //senHal_pContSenModesRegsArray[7][1]2 7000130C  
+{ 0x0F12, 0x04FD  },   //senHal_pContSenModesRegsArray[7][2]2 7000130E  
+{ 0x0F12, 0x02A1  },   //senHal_pContSenModesRegsArray[7][3]2 70001310  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[8][0]2 70001312  
+{ 0x0F12, 0x0489  },   //senHal_pContSenModesRegsArray[8][1]2 70001314  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[8][2]2 70001316  
+{ 0x0F12, 0x02C7  },   //senHal_pContSenModesRegsArray[8][3]2 70001318  
+{ 0x0F12, 0x0881  },   //senHal_pContSenModesRegsArray[9][0]2 7000131A  
+{ 0x0F12, 0x08CC  },   //senHal_pContSenModesRegsArray[9][1]2 7000131C  
+{ 0x0F12, 0x04FD  },   //senHal_pContSenModesRegsArray[9][2]2 7000131E  
+{ 0x0F12, 0x0548  },   //senHal_pContSenModesRegsArray[9][3]2 70001320  
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[10][0] 2 70001322
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[10][1] 2 70001324
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[10][2] 2 70001326
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[10][3] 2 70001328
+{ 0x0F12, 0x03F2  },   //senHal_pContSenModesRegsArray[11][0] 2 7000132A
+{ 0x0F12, 0x0223  },   //senHal_pContSenModesRegsArray[11][1] 2 7000132C
+{ 0x0F12, 0x0230  },   //senHal_pContSenModesRegsArray[11][2] 2 7000132E
+{ 0x0F12, 0x0142  },   //senHal_pContSenModesRegsArray[11][3] 2 70001330
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[12][0] 2 70001332
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[12][1] 2 70001334
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[12][2] 2 70001336
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[12][3] 2 70001338
+{ 0x0F12, 0x03F2  },   //senHal_pContSenModesRegsArray[13][0] 2 7000133A
+{ 0x0F12, 0x068C  },   //senHal_pContSenModesRegsArray[13][1] 2 7000133C
+{ 0x0F12, 0x0230  },   //senHal_pContSenModesRegsArray[13][2] 2 7000133E
+{ 0x0F12, 0x03E9  },   //senHal_pContSenModesRegsArray[13][3] 2 70001340
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][0] 2 70001342
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][1] 2 70001344
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][2] 2 70001346
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][3] 2 70001348
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][0] 2 7000134A
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][1] 2 7000134C
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][2] 2 7000134E
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][3] 2 70001350
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[16][0] 2 70001352
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[16][1] 2 70001354
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[16][2] 2 70001356
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[16][3] 2 70001358
+{ 0x0F12, 0x020B  },   //senHal_pContSenModesRegsArray[17][0] 2 7000135A
+{ 0x0F12, 0x024A  },   //senHal_pContSenModesRegsArray[17][1] 2 7000135C
+{ 0x0F12, 0x012A  },   //senHal_pContSenModesRegsArray[17][2] 2 7000135E
+{ 0x0F12, 0x0169  },   //senHal_pContSenModesRegsArray[17][3] 2 70001360
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[18][0] 2 70001362
+{ 0x0F12, 0x046B  },   //senHal_pContSenModesRegsArray[18][1] 2 70001364
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[18][2] 2 70001366
+{ 0x0F12, 0x02A9  },   //senHal_pContSenModesRegsArray[18][3] 2 70001368
+{ 0x0F12, 0x0419  },   //senHal_pContSenModesRegsArray[19][0] 2 7000136A
+{ 0x0F12, 0x04A5  },   //senHal_pContSenModesRegsArray[19][1] 2 7000136C
+{ 0x0F12, 0x0257  },   //senHal_pContSenModesRegsArray[19][2] 2 7000136E
+{ 0x0F12, 0x02E3  },   //senHal_pContSenModesRegsArray[19][3] 2 70001370
+{ 0x0F12, 0x0630  },   //senHal_pContSenModesRegsArray[20][0] 2 70001372
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[20][1] 2 70001374
+{ 0x0F12, 0x038D  },   //senHal_pContSenModesRegsArray[20][2] 2 70001376
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[20][3] 2 70001378
+{ 0x0F12, 0x0668  },   //senHal_pContSenModesRegsArray[21][0] 2 7000137A
+{ 0x0F12, 0x06B3  },   //senHal_pContSenModesRegsArray[21][1] 2 7000137C
+{ 0x0F12, 0x03C5  },   //senHal_pContSenModesRegsArray[21][2] 2 7000137E
+{ 0x0F12, 0x0410  },   //senHal_pContSenModesRegsArray[21][3] 2 70001380
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][0] 2 70001382
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][1] 2 70001384
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][2] 2 70001386
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][3] 2 70001388
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[23][0] 2 7000138A
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[23][1] 2 7000138C
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[23][2] 2 7000138E
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[23][3] 2 70001390
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[24][0] 2 70001392
+{ 0x0F12, 0x0461  },   //senHal_pContSenModesRegsArray[24][1] 2 70001394
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[24][2] 2 70001396
+{ 0x0F12, 0x029F  },   //senHal_pContSenModesRegsArray[24][3] 2 70001398
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[25][0] 2 7000139A
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[25][1] 2 7000139C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[25][2] 2 7000139E
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[25][3] 2 700013A0
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][0] 2 700013A2
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][1] 2 700013A4
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][2] 2 700013A6
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][3] 2 700013A8
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[27][0] 2 700013AA
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[27][1] 2 700013AC
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[27][2] 2 700013AE
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[27][3] 2 700013B0
+{ 0x0F12, 0x020C  },   //senHal_pContSenModesRegsArray[28][0] 2 700013B2
+{ 0x0F12, 0x024B  },   //senHal_pContSenModesRegsArray[28][1] 2 700013B4
+{ 0x0F12, 0x012B  },   //senHal_pContSenModesRegsArray[28][2] 2 700013B6
+{ 0x0F12, 0x016A  },   //senHal_pContSenModesRegsArray[28][3] 2 700013B8
+{ 0x0F12, 0x039F  },   //senHal_pContSenModesRegsArray[29][0] 2 700013BA
+{ 0x0F12, 0x045E  },   //senHal_pContSenModesRegsArray[29][1] 2 700013BC
+{ 0x0F12, 0x01DD  },   //senHal_pContSenModesRegsArray[29][2] 2 700013BE
+{ 0x0F12, 0x029C  },   //senHal_pContSenModesRegsArray[29][3] 2 700013C0
+{ 0x0F12, 0x041A  },   //senHal_pContSenModesRegsArray[30][0] 2 700013C2
+{ 0x0F12, 0x04A6  },   //senHal_pContSenModesRegsArray[30][1] 2 700013C4
+{ 0x0F12, 0x0258  },   //senHal_pContSenModesRegsArray[30][2] 2 700013C6
+{ 0x0F12, 0x02E4  },   //senHal_pContSenModesRegsArray[30][3] 2 700013C8
+{ 0x0F12, 0x062D  },   //senHal_pContSenModesRegsArray[31][0] 2 700013CA
+{ 0x0F12, 0x0639  },   //senHal_pContSenModesRegsArray[31][1] 2 700013CC
+{ 0x0F12, 0x038A  },   //senHal_pContSenModesRegsArray[31][2] 2 700013CE
+{ 0x0F12, 0x0396  },   //senHal_pContSenModesRegsArray[31][3] 2 700013D0
+{ 0x0F12, 0x0669  },   //senHal_pContSenModesRegsArray[32][0] 2 700013D2
+{ 0x0F12, 0x06B4  },   //senHal_pContSenModesRegsArray[32][1] 2 700013D4
+{ 0x0F12, 0x03C6  },   //senHal_pContSenModesRegsArray[32][2] 2 700013D6
+{ 0x0F12, 0x0411  },   //senHal_pContSenModesRegsArray[32][3] 2 700013D8
+{ 0x0F12, 0x087C  },   //senHal_pContSenModesRegsArray[33][0] 2 700013DA
+{ 0x0F12, 0x08C7  },   //senHal_pContSenModesRegsArray[33][1] 2 700013DC
+{ 0x0F12, 0x04F8  },   //senHal_pContSenModesRegsArray[33][2] 2 700013DE
+{ 0x0F12, 0x0543  },   //senHal_pContSenModesRegsArray[33][3] 2 700013E0
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][0] 2 700013E2
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][1] 2 700013E4
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][2] 2 700013E6
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][3] 2 700013E8
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[35][0] 2 700013EA
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[35][1] 2 700013EC
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[35][2] 2 700013EE
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[35][3] 2 700013F0
+{ 0x0F12, 0x020F  },   //senHal_pContSenModesRegsArray[36][0] 2 700013F2
+{ 0x0F12, 0x024E  },   //senHal_pContSenModesRegsArray[36][1] 2 700013F4
+{ 0x0F12, 0x012E  },   //senHal_pContSenModesRegsArray[36][2] 2 700013F6
+{ 0x0F12, 0x016D  },   //senHal_pContSenModesRegsArray[36][3] 2 700013F8
+{ 0x0F12, 0x039F  },   //senHal_pContSenModesRegsArray[37][0] 2 700013FA
+{ 0x0F12, 0x045E  },   //senHal_pContSenModesRegsArray[37][1] 2 700013FC
+{ 0x0F12, 0x01DD  },   //senHal_pContSenModesRegsArray[37][2] 2 700013FE
+{ 0x0F12, 0x029C  },   //senHal_pContSenModesRegsArray[37][3] 2 70001400
+{ 0x0F12, 0x041D  },   //senHal_pContSenModesRegsArray[38][0] 2 70001402
+{ 0x0F12, 0x04A9  },   //senHal_pContSenModesRegsArray[38][1] 2 70001404
+{ 0x0F12, 0x025B  },   //senHal_pContSenModesRegsArray[38][2] 2 70001406
+{ 0x0F12, 0x02E7  },   //senHal_pContSenModesRegsArray[38][3] 2 70001408
+{ 0x0F12, 0x062D  },   //senHal_pContSenModesRegsArray[39][0] 2 7000140A
+{ 0x0F12, 0x0639  },   //senHal_pContSenModesRegsArray[39][1] 2 7000140C
+{ 0x0F12, 0x038A  },   //senHal_pContSenModesRegsArray[39][2] 2 7000140E
+{ 0x0F12, 0x0396  },   //senHal_pContSenModesRegsArray[39][3] 2 70001410
+{ 0x0F12, 0x066C  },   //senHal_pContSenModesRegsArray[40][0] 2 70001412
+{ 0x0F12, 0x06B7  },   //senHal_pContSenModesRegsArray[40][1] 2 70001414
+{ 0x0F12, 0x03C9  },   //senHal_pContSenModesRegsArray[40][2] 2 70001416
+{ 0x0F12, 0x0414  },   //senHal_pContSenModesRegsArray[40][3] 2 70001418
+{ 0x0F12, 0x087C  },   //senHal_pContSenModesRegsArray[41][0] 2 7000141A
+{ 0x0F12, 0x08C7  },   //senHal_pContSenModesRegsArray[41][1] 2 7000141C
+{ 0x0F12, 0x04F8  },   //senHal_pContSenModesRegsArray[41][2] 2 7000141E
+{ 0x0F12, 0x0543  },   //senHal_pContSenModesRegsArray[41][3] 2 70001420
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][0] 2 70001422
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][1] 2 70001424
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][2] 2 70001426
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][3] 2 70001428
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[43][0] 2 7000142A
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[43][1] 2 7000142C
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[43][2] 2 7000142E
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[43][3] 2 70001430
+{ 0x0F12, 0x020F  },   //senHal_pContSenModesRegsArray[44][0] 2 70001432
+{ 0x0F12, 0x024E  },   //senHal_pContSenModesRegsArray[44][1] 2 70001434
+{ 0x0F12, 0x012E  },   //senHal_pContSenModesRegsArray[44][2] 2 70001436
+{ 0x0F12, 0x016D  },   //senHal_pContSenModesRegsArray[44][3] 2 70001438
+{ 0x0F12, 0x039F  },   //senHal_pContSenModesRegsArray[45][0] 2 7000143A
+{ 0x0F12, 0x045E  },   //senHal_pContSenModesRegsArray[45][1] 2 7000143C
+{ 0x0F12, 0x01DD  },   //senHal_pContSenModesRegsArray[45][2] 2 7000143E
+{ 0x0F12, 0x029C  },   //senHal_pContSenModesRegsArray[45][3] 2 70001440
+{ 0x0F12, 0x041D  },   //senHal_pContSenModesRegsArray[46][0] 2 70001442
+{ 0x0F12, 0x04A9  },   //senHal_pContSenModesRegsArray[46][1] 2 70001444
+{ 0x0F12, 0x025B  },   //senHal_pContSenModesRegsArray[46][2] 2 70001446
+{ 0x0F12, 0x02E7  },   //senHal_pContSenModesRegsArray[46][3] 2 70001448
+{ 0x0F12, 0x062D  },   //senHal_pContSenModesRegsArray[47][0] 2 7000144A
+{ 0x0F12, 0x0639  },   //senHal_pContSenModesRegsArray[47][1] 2 7000144C
+{ 0x0F12, 0x038A  },   //senHal_pContSenModesRegsArray[47][2] 2 7000144E
+{ 0x0F12, 0x0396  },   //senHal_pContSenModesRegsArray[47][3] 2 70001450
+{ 0x0F12, 0x066C  },   //senHal_pContSenModesRegsArray[48][0] 2 70001452
+{ 0x0F12, 0x06B7  },   //senHal_pContSenModesRegsArray[48][1] 2 70001454
+{ 0x0F12, 0x03C9  },   //senHal_pContSenModesRegsArray[48][2] 2 70001456
+{ 0x0F12, 0x0414  },   //senHal_pContSenModesRegsArray[48][3] 2 70001458
+{ 0x0F12, 0x087C  },   //senHal_pContSenModesRegsArray[49][0] 2 7000145A
+{ 0x0F12, 0x08C7  },   //senHal_pContSenModesRegsArray[49][1] 2 7000145C
+{ 0x0F12, 0x04F8  },   //senHal_pContSenModesRegsArray[49][2] 2 7000145E
+{ 0x0F12, 0x0543  },   //senHal_pContSenModesRegsArray[49][3] 2 70001460
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][0] 2 70001462
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][1] 2 70001464
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][2] 2 70001466
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][3] 2 70001468
+{ 0x0F12, 0x01D2  },   //senHal_pContSenModesRegsArray[51][0] 2 7000146A
+{ 0x0F12, 0x01D2  },   //senHal_pContSenModesRegsArray[51][1] 2 7000146C
+{ 0x0F12, 0x00F1  },   //senHal_pContSenModesRegsArray[51][2] 2 7000146E
+{ 0x0F12, 0x00F1  },   //senHal_pContSenModesRegsArray[51][3] 2 70001470
+{ 0x0F12, 0x020C  },   //senHal_pContSenModesRegsArray[52][0] 2 70001472
+{ 0x0F12, 0x024B  },   //senHal_pContSenModesRegsArray[52][1] 2 70001474
+{ 0x0F12, 0x012B  },   //senHal_pContSenModesRegsArray[52][2] 2 70001476
+{ 0x0F12, 0x016A  },   //senHal_pContSenModesRegsArray[52][3] 2 70001478
+{ 0x0F12, 0x03A1  },   //senHal_pContSenModesRegsArray[53][0] 2 7000147A
+{ 0x0F12, 0x0460  },   //senHal_pContSenModesRegsArray[53][1] 2 7000147C
+{ 0x0F12, 0x01DF  },   //senHal_pContSenModesRegsArray[53][2] 2 7000147E
+{ 0x0F12, 0x029E  },   //senHal_pContSenModesRegsArray[53][3] 2 70001480
+{ 0x0F12, 0x041A  },   //senHal_pContSenModesRegsArray[54][0] 2 70001482
+{ 0x0F12, 0x04A6  },   //senHal_pContSenModesRegsArray[54][1] 2 70001484
+{ 0x0F12, 0x0258  },   //senHal_pContSenModesRegsArray[54][2] 2 70001486
+{ 0x0F12, 0x02E4  },   //senHal_pContSenModesRegsArray[54][3] 2 70001488
+{ 0x0F12, 0x062F  },   //senHal_pContSenModesRegsArray[55][0] 2 7000148A
+{ 0x0F12, 0x063B  },   //senHal_pContSenModesRegsArray[55][1] 2 7000148C
+{ 0x0F12, 0x038C  },   //senHal_pContSenModesRegsArray[55][2] 2 7000148E
+{ 0x0F12, 0x0398  },   //senHal_pContSenModesRegsArray[55][3] 2 70001490
+{ 0x0F12, 0x0669  },   //senHal_pContSenModesRegsArray[56][0] 2 70001492
+{ 0x0F12, 0x06B4  },   //senHal_pContSenModesRegsArray[56][1] 2 70001494
+{ 0x0F12, 0x03C6  },   //senHal_pContSenModesRegsArray[56][2] 2 70001496
+{ 0x0F12, 0x0411  },   //senHal_pContSenModesRegsArray[56][3] 2 70001498
+{ 0x0F12, 0x087E  },   //senHal_pContSenModesRegsArray[57][0] 2 7000149A
+{ 0x0F12, 0x08C9  },   //senHal_pContSenModesRegsArray[57][1] 2 7000149C
+{ 0x0F12, 0x04FA  },   //senHal_pContSenModesRegsArray[57][2] 2 7000149E
+{ 0x0F12, 0x0545  },   //senHal_pContSenModesRegsArray[57][3] 2 700014A0
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[58][0] 2 700014A2
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[58][1] 2 700014A4
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[58][2] 2 700014A6
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[58][3] 2 700014A8
+{ 0x0F12, 0x03AF  },   //senHal_pContSenModesRegsArray[59][0] 2 700014AA
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[59][1] 2 700014AC
+{ 0x0F12, 0x01ED  },   //senHal_pContSenModesRegsArray[59][2] 2 700014AE
+{ 0x0F12, 0x00FF  },   //senHal_pContSenModesRegsArray[59][3] 2 700014B0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[60][0] 2 700014B2
+{ 0x0F12, 0x0461  },   //senHal_pContSenModesRegsArray[60][1] 2 700014B4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[60][2] 2 700014B6
+{ 0x0F12, 0x029F  },   //senHal_pContSenModesRegsArray[60][3] 2 700014B8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[61][0] 2 700014BA
+{ 0x0F12, 0x046E  },   //senHal_pContSenModesRegsArray[61][1] 2 700014BC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[61][2] 2 700014BE
+{ 0x0F12, 0x02AC  },   //senHal_pContSenModesRegsArray[61][3] 2 700014C0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[62][0] 2 700014C2
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[62][1] 2 700014C4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[62][2] 2 700014C6
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[62][3] 2 700014C8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[63][0] 2 700014CA
+{ 0x0F12, 0x0649  },   //senHal_pContSenModesRegsArray[63][1] 2 700014CC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[63][2] 2 700014CE
+{ 0x0F12, 0x03A6  },   //senHal_pContSenModesRegsArray[63][3] 2 700014D0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][0] 2 700014D2
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][1] 2 700014D4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][2] 2 700014D6
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][3] 2 700014D8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][0] 2 700014DA
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][1] 2 700014DC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][2] 2 700014DE
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][3] 2 700014E0
+{ 0x0F12, 0x03AA  },   //senHal_pContSenModesRegsArray[66][0] 2 700014E2
+{ 0x0F12, 0x01DB  },   //senHal_pContSenModesRegsArray[66][1] 2 700014E4
+{ 0x0F12, 0x01E8  },   //senHal_pContSenModesRegsArray[66][2] 2 700014E6
+{ 0x0F12, 0x00FA  },   //senHal_pContSenModesRegsArray[66][3] 2 700014E8
+{ 0x0F12, 0x03B7  },   //senHal_pContSenModesRegsArray[67][0] 2 700014EA
+{ 0x0F12, 0x01E8  },   //senHal_pContSenModesRegsArray[67][1] 2 700014EC
+{ 0x0F12, 0x01F5  },   //senHal_pContSenModesRegsArray[67][2] 2 700014EE
+{ 0x0F12, 0x0107  },   //senHal_pContSenModesRegsArray[67][3] 2 700014F0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[68][0] 2 700014F2
+{ 0x0F12, 0x0469  },   //senHal_pContSenModesRegsArray[68][1] 2 700014F4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[68][2] 2 700014F6
+{ 0x0F12, 0x02A7  },   //senHal_pContSenModesRegsArray[68][3] 2 700014F8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[69][0] 2 700014FA
+{ 0x0F12, 0x0476  },   //senHal_pContSenModesRegsArray[69][1] 2 700014FC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[69][2] 2 700014FE
+{ 0x0F12, 0x02B4  },   //senHal_pContSenModesRegsArray[69][3] 2 70001500
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[70][0] 2 70001502
+{ 0x0F12, 0x0644  },   //senHal_pContSenModesRegsArray[70][1] 2 70001504
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[70][2] 2 70001506
+{ 0x0F12, 0x03A1  },   //senHal_pContSenModesRegsArray[70][3] 2 70001508
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[71][0] 2 7000150A
+{ 0x0F12, 0x0651  },   //senHal_pContSenModesRegsArray[71][1] 2 7000150C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[71][2] 2 7000150E
+{ 0x0F12, 0x03AE  },   //senHal_pContSenModesRegsArray[71][3] 2 70001510
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][0] 2 70001512
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][1] 2 70001514
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][2] 2 70001516
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][3] 2 70001518
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][0] 2 7000151A
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][1] 2 7000151C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][2] 2 7000151E
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][3] 2 70001520
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][0] 2 70001522
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][1] 2 70001524
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][2] 2 70001526
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][3] 2 70001528
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][0] 2 7000152A
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][1] 2 7000152C
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][2] 2 7000152E
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][3] 2 70001530
+{ 0x0F12, 0x05AD  },   //senHal_pContSenModesRegsArray[76][0] 2 70001532
+{ 0x0F12, 0x03DE  },   //senHal_pContSenModesRegsArray[76][1] 2 70001534
+{ 0x0F12, 0x030A  },   //senHal_pContSenModesRegsArray[76][2] 2 70001536
+{ 0x0F12, 0x021C  },   //senHal_pContSenModesRegsArray[76][3] 2 70001538
+{ 0x0F12, 0x062F  },   //senHal_pContSenModesRegsArray[77][0] 2 7000153A
+{ 0x0F12, 0x0460  },   //senHal_pContSenModesRegsArray[77][1] 2 7000153C
+{ 0x0F12, 0x038C  },   //senHal_pContSenModesRegsArray[77][2] 2 7000153E
+{ 0x0F12, 0x029E  },   //senHal_pContSenModesRegsArray[77][3] 2 70001540
+{ 0x0F12, 0x07FC  },   //senHal_pContSenModesRegsArray[78][0] 2 70001542
+{ 0x0F12, 0x0847  },   //senHal_pContSenModesRegsArray[78][1] 2 70001544
+{ 0x0F12, 0x0478  },   //senHal_pContSenModesRegsArray[78][2] 2 70001546
+{ 0x0F12, 0x04C3  },   //senHal_pContSenModesRegsArray[78][3] 2 70001548
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][0] 2 7000154A
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][1] 2 7000154C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][2] 2 7000154E
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][3] 2 70001550
+                      
+                    
+//============================================================ 
+// AF Interface setting
+//==============  ============================================== 
+{ 0x002A, 0x01D4  },
+{ 0x0F12, 0x0000  }, //REG_TC_IPRM_AuxGpios : 0 - no Flash
+{ 0x002A, 0x01DE  },
+{ 0x0F12, 0x0003  }, //REG_TC_IPRM_CM_Init_AfModeType : 3 - AFD_VCM_I2C
+{ 0x0F12, 0x0000  }, //REG_TC_IPRM_CM_Init_PwmConfig1 : 0 - no PWM
+{ 0x002A, 0x01E4  },
+{ 0x0F12, 0x0041  }, //REG_TC_IPRM_CM_Init_GpioConfig1 : 4 -  GPIO4 
+{ 0x002A, 0x01E8  },
+{ 0x0F12, 0x2A0C  }, //REG_TC_IPRM_CM_Init_Mi2cBits : MSCL - GPIO1 MSDA - GPIO2 Device ID (0C)
+{ 0x0F12, 0x0190  }, //REG_TC_IPRM_CM_Init_Mi2cRateKhz : MI2C Speed - 400KHz
+
+//============================================================ 
+// AF Parameter setting
+//============================================================ 
+// AF Window Settings
+{ 0x002A, 0x025A  },
+{ 0x0F12, 0x0100  }, //#REG_TC_AF_FstWinStartX
+{ 0x0F12, 0x00E3  }, //#REG_TC_AF_FstWinStartY
+{ 0x0F12, 0x0200  }, //#REG_TC_AF_FstWinSizeX
+{ 0x0F12, 0x0238  }, //#REG_TC_AF_FstWinSizeY
+{ 0x0F12, 0x01C6  }, //#REG_TC_AF_ScndWinStartX
+{ 0x0F12, 0x0166  }, //#REG_TC_AF_ScndWinStartY
+{ 0x0F12, 0x0074  }, //#REG_TC_AF_ScndWinSizeX
+{ 0x0F12, 0x0132  }, //#REG_TC_AF_ScndWinSizeY
+{ 0x0F12, 0x0001  }, //#REG_TC_AF_WinSizesUpdated
+
+// AF Setot Settings 
+{ 0x002A, 0x0586  },
+{ 0x0F12, 0x00FF  }, //#skl_af_StatOvlpExpFactor
+
+// AF Scene Settings 
+{ 0x002A, 0x115E  },
+{ 0x0F12, 0x0003  }, //#af_scene_usSaturatedScene
+
+// AF Fine Search Settings 
+{ 0x002A, 0x10D4  },
+{ 0x0F12, 0x1002  }, //FineSearch Disable //af_search_usSingleAfFlags 1000 : 2nd searh off, 1002 : 2nd search on
+{ 0x002A, 0x10DE  },
+{ 0x0F12, 0x0004  }, //#af_search_usFinePeakCount
+{ 0x002A, 0x106C  },
+{ 0x0F12, 0x0802  }, //#af_pos_usFineStepNumSize
+                  
+// / AF Peak Thre  shold Setting
+{ 0x002A, 0x10CA  }, //#af_search_usPeakThr
+{ 0x0F12, 0x00CC  }, 
+
+// AF Default Position 
+{ 0x002A, 0x1060  },
+{ 0x0F12, 0x0000  }, //#af_pos_usHomePos
+{ 0x0F12, 0xB020  }, //#af_pos_usLowConfPos
+
+// AF LowConfThr Setting
+{ 0x002A, 0x10F4  }, //LowEdgeBoth GRAD
+{ 0x0F12, 0x0280  }, 
+{ 0x002A, 0x1100  }, //LowLight HPF
+{ 0x0F12, 0x03A0  },  
+{ 0x0F12, 0x0320  }, 
+
+{ 0x002A, 0x1134  },
+{ 0x0F12, 0x0030  },//af_stat_usMinStatVal
+
+// AF low Br Th
+{ 0x002A, 0x1154  }, // normBrThr
+{ 0x0F12, 0x0060  },
+
+// AF Policy
+{ 0x002A, 0x10E2  },
+{ 0x0F12, 0x0000  }, //#af_search_usCapturePolicy: Focus_Priority, 0002 : Shutter_Priority_Fixed, 0001 : Shutter_Priority_Last_BFP 0000: Shutter_Priority_Current
+{ 0x002A, 0x1072  },
+{ 0x0F12, 0x003C  }, //#af_pos_usCaptureFixedPo// 0x0008
+
+// AF Lens Position Table Settings 
+{ 0x002A, 0x1074  },
+{ 0x0F12, 0x0010  }, //#af_pos_usTableLastInd // 0~16 17 Steps 100729
+
+{ 0x0F12, 0x0024  }, //#af_pos_usTable_0_  145/4 = 36  // af_pos_usTable
+{ 0x0F12, 0x002D  }, //#af_pos_usTable_1_  180/4 = 45                   
+{ 0x0F12, 0x0036  }, //#af_pos_usTable_2_  215/4 = 54                   
+{ 0x0F12, 0x003E  }, //#af_pos_usTable_3_  250/4 = 62                   
+{ 0x0F12, 0x0047  }, //#af_pos_usTable_4_  285/4 = 71
+{ 0x0F12, 0x0050  }, //#af_pos_usTable_5_  320/4 = 80                   
+{ 0x0F12, 0x0059  }, //#af_pos_usTable_6_  355/4 = 89                   
+{ 0x0F12, 0x0061  }, //#af_pos_usTable_7_  390/4 = 97                   
+{ 0x0F12, 0x006A  }, //#af_pos_usTable_8_  425/4 = 106                  
+{ 0x0F12, 0x0073  }, //#af_pos_usTable_9_  460/4 = 115                  
+{ 0x0F12, 0x007C  }, //#af_pos_usTable_10_ 495/4 = 124                  
+{ 0x0F12, 0x0084  }, //#af_pos_usTable_11_ 530/4 = 132                  
+{ 0x0F12, 0x008D  }, //#af_pos_usTable_12_ 565/4 = 141                  
+{ 0x0F12, 0x0096  }, //#af_pos_usTable_13_ 600/4 = 150                  
+{ 0x0F12, 0x009F  }, //#af_pos_usTable_14_ 635/4 = 159                  
+{ 0x0F12, 0x00A7  }, //#af_pos_usTable_15_ 670/4 = 167                  
+{ 0x0F12, 0x00B0  }, //#af_pos_usTable_16_ 705/4 = 176                  
+
+//VCM AF driver with PWM/I2C 
+{ 0x002A, 0x1198  },
+{ 0x0F12, 0x8000  }, //#afd_usParam[0]  I2C power down command
+{ 0x0F12, 0x0006  }, //#afd_usParam[1]  Position Right Shift 
+{ 0x0F12, 0x3FF0  }, //#afd_usParam[2]  I2C Data Mask
+{ 0x0F12, 0x03E8  }, //#afd_usParam[3]  PWM Period
+{ 0x0F12, 0x0000  }, //#afd_usParam[4]  PWM Divider
+{ 0x0F12, 0x0064  }, //#afd_usParam[5]  SlowMotion Delay (unit: 0.1ms)  4. reduce lens collision noise.
+{ 0x0F12, 0x0009  }, //#afd_usParam[6]  SlowMotion Threshold
+{ 0x0F12, 0x000A  }, //#afd_usParam[7]  Signal Shaping
+{ 0x0F12, 0x0080  }, //#afd_usParam[8]  Signal Shaping level 
+{ 0x0F12, 0x00C0  }, //#afd_usParam[9]  Signal Shaping level
+{ 0x0F12, 0x0000  }, //#afd_usParam[10] Signal Shaping level
+{ 0x0F12, 0x0000  }, //#afd_usParam[11] Signal Shaping level               
+
+
+{ 0x002A, 0x0252  },
+{ 0x0F12, 0x0003  }, //init 
+                  
+{ 0x002A, 0x12B8  },   //disable CINTR 0                                 
+{ 0x0F12, 0x1000  },        
+
+//============================================================
+// ISP-FE Setting
+//============================================================                    
+{ 0x002A, 0x158A  },   
+{ 0x0F12, 0xEAF0  },   
+{ 0x002A, 0x15C6  },   
+{ 0x0F12, 0x0020  },   
+{ 0x0F12, 0x0060  },   
+{ 0x002A, 0x15BC  },   
+{ 0x0F12, 0x0200  },   
+                       
+{ 0x002A, 0x1608  },   
+{ 0x0F12, 0x0100  },   
+{ 0x0F12, 0x0100  },   
+{ 0x0F12, 0x0100  },   
+{ 0x0F12, 0x0100  },   
+                       
+{ 0x002A, 0x0F70  },   
+{ 0x0F12, 0x0040  },	 //36 //TVAR_ae_BrAve  //ae Target//
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0x3415  },   //3A98 //3A98////lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0x682A  },   //68b0 //7EF4////lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0x8235  },   //8340 //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },    //F424//MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0x3415  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0x682A  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0x8235  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+// /Shutter tunpo  int//        //gain * 256 = value//
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x01B3  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x02A0  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710  },   //MaxAnGain4 //                                             
+// /Shutter tunen  d//
+                  
+{ 0x002A, 0x0544  },                                                               
+{ 0x0F12, 0x0100  },   	                                                    
+{ 0x0F12, 0x8000  },   //Max Gain 8 //                                             
+                  
+                  
+{ 0x002A, 0x1694  },                                                               
+{ 0x0F12, 0x0001  },   //expand forbidde zone //                                   
+                  
+{ 0x002A, 0x021A  },                                                               
+{ 0x0F12, 0x0000  },  //MBR off// 	                                                    
+                  
+                  
+//==============================================//
+//AFC                                          //
+//==============================================//
+{ 0x002A, 0x04d2  },
+{ 0x0F12, 0x065f  },     //065f : Manual AFC on   067f : Manual AFC off //
+{ 0x002A, 0x04ba  },     
+{ 0x0F12, 0x0002  },     // 0002: 60hz  0001 : 50hz //
+{ 0x0F12, 0x0001  },     // afc update command //
+                          
+                    
+                    
+{ 0x002A, 0x06CE  },   
+{ 0x0F12, 0x0100  },	//TVAR_ash_GAsalpha[0] // 	   
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[1] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[2] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[3] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[4] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[5] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[6] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[7] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[8] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[9] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[10] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[11] //
+{ 0x0F12, 0x00e0  },   //TVAR_ash_GAsalpha[12] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[13] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[14] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[15] //
+{ 0x0F12, 0x00e8  },   //TVAR_ash_GAsalpha[16] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[17] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[18] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[19] //
+{ 0x0F12, 0x00f0  },   //TVAR_ash_GAsalpha[20] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[21] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[22] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[23] //
+{ 0x0F12, 0x00f0  },   //TVAR_ash_GAsalpha[24] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[25] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[26] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[27] //
+                       
+{ 0x0F12, 0x00f8  },	//TVAR_ash_GAS OutdoorAlpha[0] //   
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAS OutdoorAlpha[1] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAS OutdoorAlpha[2] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAS OutdoorAlpha[3] //
+                       
+                       
+{ 0x0F12, 0x0036  },	//ash_GASBeta[0] // 	   
+{ 0x0F12, 0x001F  },	//ash_GASBeta[1] //    
+{ 0x0F12, 0x0020  },   //ash_GASBeta[2] // 
+{ 0x0F12, 0x0000  },   //ash_GASBeta[3] // 
+{ 0x0F12, 0x0036  },   //ash_GASBeta[4] // 
+{ 0x0F12, 0x001F  },   //ash_GASBeta[5] // 
+{ 0x0F12, 0x0020  },   //ash_GASBeta[6] // 
+{ 0x0F12, 0x0000  },   //ash_GASBeta[7] // 
+{ 0x0F12, 0x0036  },   //ash_GASBeta[8] // 
+{ 0x0F12, 0x001F  },   //ash_GASBeta[9] // 
+{ 0x0F12, 0x0020  },   //ash_GASBeta[10] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[11] //
+{ 0x0F12, 0x0010  },   //ash_GASBeta[12] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[13] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[14] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[15] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[16] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[17] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[18] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[19] //
+{ 0x0F12, 0x0036  },   //ash_GASBeta[20] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[21] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[22] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[23] //
+{ 0x0F12, 0x0036  },   //ash_GASBeta[24] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[25] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[26] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[27] //
+                       
+{ 0x0F12, 0x0036  },	//ash_GAS OutdoorBeta[0] //   
+{ 0x0F12, 0x001F  },   //ash_GAS OutdoorBeta[1] //
+{ 0x0F12, 0x0020  },   //ash_GAS OutdoorBeta[2] //
+{ 0x0F12, 0x0000  },   //ash_GAS OutdoorBeta[3] //
+                       
+{ 0x002A, 0x075A  },	//ash_bParabolicEstimation//   
+{ 0x0F12, 0x0000  },   //ash_uParabolicCenterX   //
+{ 0x0F12, 0x0400  },   //ash_uParabolicCenterY   //
+{ 0x0F12, 0x0300  },   //ash_uParabolicscalingA  //
+{ 0x0F12, 0x0010  },   //ash_uParabolicscalingB  //
+{ 0x0F12, 0x0011  },   
+                       
+{ 0x002A, 0x347C  },   
+{ 0x0F12, 0x01EE  },	//TVAR_ash_pGAS[0] //     
+{ 0x0F12, 0x01A9  },   //TVAR_ash_pGAS[1] //  
+{ 0x0F12, 0x016A  },   //TVAR_ash_pGAS[2] //  
+{ 0x0F12, 0x0136  },   //TVAR_ash_pGAS[3] //  
+{ 0x0F12, 0x0111  },   //TVAR_ash_pGAS[4] //  
+{ 0x0F12, 0x00F6  },   //TVAR_ash_pGAS[5] //  
+{ 0x0F12, 0x00EB  },   //TVAR_ash_pGAS[6] //  
+{ 0x0F12, 0x00F7  },   //TVAR_ash_pGAS[7] //  
+{ 0x0F12, 0x0111  },   //TVAR_ash_pGAS[8] //  
+{ 0x0F12, 0x013B  },   //TVAR_ash_pGAS[9] //  
+{ 0x0F12, 0x0174  },   //TVAR_ash_pGAS[10] // 
+{ 0x0F12, 0x01BC  },   //TVAR_ash_pGAS[11] // 
+{ 0x0F12, 0x0204  },   //TVAR_ash_pGAS[12] // 
+{ 0x0F12, 0x01BA  },   //TVAR_ash_pGAS[13] // 
+{ 0x0F12, 0x0175  },   //TVAR_ash_pGAS[14] // 
+{ 0x0F12, 0x012C  },   //TVAR_ash_pGAS[15] // 
+{ 0x0F12, 0x00F1  },   //TVAR_ash_pGAS[16] // 
+{ 0x0F12, 0x00C5  },   //TVAR_ash_pGAS[17] // 
+{ 0x0F12, 0x00AA  },   //TVAR_ash_pGAS[18] // 
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[19] // 
+{ 0x0F12, 0x00AA  },   //TVAR_ash_pGAS[20] // 
+{ 0x0F12, 0x00C8  },   //TVAR_ash_pGAS[21] // 
+{ 0x0F12, 0x00FA  },   //TVAR_ash_pGAS[22] // 
+{ 0x0F12, 0x013D  },   //TVAR_ash_pGAS[23] // 
+{ 0x0F12, 0x0187  },   //TVAR_ash_pGAS[24] // 
+{ 0x0F12, 0x01DC  },   //TVAR_ash_pGAS[25] // 
+{ 0x0F12, 0x0184  },   //TVAR_ash_pGAS[26] // 
+{ 0x0F12, 0x0139  },   //TVAR_ash_pGAS[27] // 
+{ 0x0F12, 0x00EB  },   //TVAR_ash_pGAS[28] // 
+{ 0x0F12, 0x00A8  },   //TVAR_ash_pGAS[29] // 
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[30] // 
+{ 0x0F12, 0x005E  },   //TVAR_ash_pGAS[31] // 
+{ 0x0F12, 0x0055  },   //TVAR_ash_pGAS[32] // 
+{ 0x0F12, 0x0060  },   //TVAR_ash_pGAS[33] // 
+{ 0x0F12, 0x0080  },   //TVAR_ash_pGAS[34] // 
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[35] // 
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[36] // 
+{ 0x0F12, 0x0156  },   //TVAR_ash_pGAS[37] // 
+{ 0x0F12, 0x01A8  },   //TVAR_ash_pGAS[38] // 
+{ 0x0F12, 0x015B  },   //TVAR_ash_pGAS[39] // 
+{ 0x0F12, 0x010E  },   //TVAR_ash_pGAS[40] // 
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[41] // 
+{ 0x0F12, 0x0075  },   //TVAR_ash_pGAS[42] // 
+{ 0x0F12, 0x0045  },   //TVAR_ash_pGAS[43] // 
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[44] // 
+{ 0x0F12, 0x0023  },   //TVAR_ash_pGAS[45] // 
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[46] // 
+{ 0x0F12, 0x004C  },   //TVAR_ash_pGAS[47] // 
+{ 0x0F12, 0x0086  },   //TVAR_ash_pGAS[48] // 
+{ 0x0F12, 0x00D3  },   //TVAR_ash_pGAS[49] // 
+{ 0x0F12, 0x0130  },   //TVAR_ash_pGAS[50] // 
+{ 0x0F12, 0x0188  },   //TVAR_ash_pGAS[51] // 
+{ 0x0F12, 0x0140  },   //TVAR_ash_pGAS[52] // 
+{ 0x0F12, 0x00F2  },   //TVAR_ash_pGAS[53] // 
+{ 0x0F12, 0x009E  },   //TVAR_ash_pGAS[54] // 
+{ 0x0F12, 0x0056  },   //TVAR_ash_pGAS[55] // 
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[56] // 
+{ 0x0F12, 0x0013  },   //TVAR_ash_pGAS[57] // 
+{ 0x0F12, 0x000A  },   //TVAR_ash_pGAS[58] // 
+{ 0x0F12, 0x0013  },   //TVAR_ash_pGAS[59] // 
+{ 0x0F12, 0x0030  },   //TVAR_ash_pGAS[60] // 
+{ 0x0F12, 0x006B  },   //TVAR_ash_pGAS[61] // 
+{ 0x0F12, 0x00BA  },   //TVAR_ash_pGAS[62] // 
+{ 0x0F12, 0x0117  },   //TVAR_ash_pGAS[63] // 
+{ 0x0F12, 0x0176  },   //TVAR_ash_pGAS[64] // 
+{ 0x0F12, 0x012F  },   //TVAR_ash_pGAS[65] // 
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[66] // 
+{ 0x0F12, 0x0090  },   //TVAR_ash_pGAS[67] // 
+{ 0x0F12, 0x004D  },   //TVAR_ash_pGAS[68] // 
+{ 0x0F12, 0x0020  },   //TVAR_ash_pGAS[69] // 
+{ 0x0F12, 0x0009  },   //TVAR_ash_pGAS[70] // 
+{ 0x0F12, 0x0000  },   //TVAR_ash_pGAS[71] // 
+{ 0x0F12, 0x000D  },   //TVAR_ash_pGAS[72] // 
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[73] // 
+{ 0x0F12, 0x0062  },   //TVAR_ash_pGAS[74] // 
+{ 0x0F12, 0x00B3  },   //TVAR_ash_pGAS[75] // 
+{ 0x0F12, 0x0114  },   //TVAR_ash_pGAS[76] // 
+{ 0x0F12, 0x0172  },   //TVAR_ash_pGAS[77] // 
+{ 0x0F12, 0x0137  },   //TVAR_ash_pGAS[78] // 
+{ 0x0F12, 0x00E9  },   //TVAR_ash_pGAS[79] // 
+{ 0x0F12, 0x0098  },   //TVAR_ash_pGAS[80] // 
+{ 0x0F12, 0x0054  },   //TVAR_ash_pGAS[81] // 
+{ 0x0F12, 0x002A  },   //TVAR_ash_pGAS[82] // 
+{ 0x0F12, 0x0012  },   //TVAR_ash_pGAS[83] // 
+{ 0x0F12, 0x0009  },   //TVAR_ash_pGAS[84] // 
+{ 0x0F12, 0x0017  },   //TVAR_ash_pGAS[85] // 
+{ 0x0F12, 0x0034  },   //TVAR_ash_pGAS[86] // 
+{ 0x0F12, 0x006D  },   //TVAR_ash_pGAS[87] // 
+{ 0x0F12, 0x00BF  },   //TVAR_ash_pGAS[88] // 
+{ 0x0F12, 0x011C  },   //TVAR_ash_pGAS[89] // 
+{ 0x0F12, 0x0179  },   //TVAR_ash_pGAS[90] // 
+{ 0x0F12, 0x0152  },   //TVAR_ash_pGAS[91] // 
+{ 0x0F12, 0x0106  },   //TVAR_ash_pGAS[92] // 
+{ 0x0F12, 0x00B6  },   //TVAR_ash_pGAS[93] // 
+{ 0x0F12, 0x0070  },   //TVAR_ash_pGAS[94] // 
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[95] // 
+{ 0x0F12, 0x002D  },   //TVAR_ash_pGAS[96] // 
+{ 0x0F12, 0x0024  },   //TVAR_ash_pGAS[97] // 
+{ 0x0F12, 0x0032  },   //TVAR_ash_pGAS[98] // 
+{ 0x0F12, 0x0051  },   //TVAR_ash_pGAS[99] // 
+{ 0x0F12, 0x008A  },   //TVAR_ash_pGAS[100] //
+{ 0x0F12, 0x00DB  },   //TVAR_ash_pGAS[101] //
+{ 0x0F12, 0x0139  },   //TVAR_ash_pGAS[102] //
+{ 0x0F12, 0x0191  },   //TVAR_ash_pGAS[103] //
+{ 0x0F12, 0x0174  },   //TVAR_ash_pGAS[104] //
+{ 0x0F12, 0x012B  },   //TVAR_ash_pGAS[105] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[106] //
+{ 0x0F12, 0x009D  },   //TVAR_ash_pGAS[107] //
+{ 0x0F12, 0x006E  },   //TVAR_ash_pGAS[108] //
+{ 0x0F12, 0x0055  },   //TVAR_ash_pGAS[109] //
+{ 0x0F12, 0x0050  },   //TVAR_ash_pGAS[110] //
+{ 0x0F12, 0x005C  },   //TVAR_ash_pGAS[111] //
+{ 0x0F12, 0x007B  },   //TVAR_ash_pGAS[112] //
+{ 0x0F12, 0x00B7  },   //TVAR_ash_pGAS[113] //
+{ 0x0F12, 0x0109  },   //TVAR_ash_pGAS[114] //
+{ 0x0F12, 0x015E  },   //TVAR_ash_pGAS[115] //
+{ 0x0F12, 0x01B0  },   //TVAR_ash_pGAS[116] //
+{ 0x0F12, 0x01A9  },   //TVAR_ash_pGAS[117] //
+{ 0x0F12, 0x0160  },   //TVAR_ash_pGAS[118] //
+{ 0x0F12, 0x011A  },   //TVAR_ash_pGAS[119] //
+{ 0x0F12, 0x00DE  },   //TVAR_ash_pGAS[120] //
+{ 0x0F12, 0x00B1  },   //TVAR_ash_pGAS[121] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[122] //
+{ 0x0F12, 0x0093  },   //TVAR_ash_pGAS[123] //
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[124] //
+{ 0x0F12, 0x00C3  },   //TVAR_ash_pGAS[125] //
+{ 0x0F12, 0x00FA  },   //TVAR_ash_pGAS[126] //
+{ 0x0F12, 0x0143  },   //TVAR_ash_pGAS[127] //
+{ 0x0F12, 0x0190  },   //TVAR_ash_pGAS[128] //
+{ 0x0F12, 0x01E4  },   //TVAR_ash_pGAS[129] //
+{ 0x0F12, 0x01D5  },   //TVAR_ash_pGAS[130] //
+{ 0x0F12, 0x0194  },   //TVAR_ash_pGAS[131] //
+{ 0x0F12, 0x014E  },   //TVAR_ash_pGAS[132] //
+{ 0x0F12, 0x011F  },   //TVAR_ash_pGAS[133] //
+{ 0x0F12, 0x00F9  },   //TVAR_ash_pGAS[134] //
+{ 0x0F12, 0x00E1  },   //TVAR_ash_pGAS[135] //
+{ 0x0F12, 0x00DA  },   //TVAR_ash_pGAS[136] //
+{ 0x0F12, 0x00E8  },   //TVAR_ash_pGAS[137] //
+{ 0x0F12, 0x010A  },   //TVAR_ash_pGAS[138] //
+{ 0x0F12, 0x0139  },   //TVAR_ash_pGAS[139] //
+{ 0x0F12, 0x017B  },   //TVAR_ash_pGAS[140] //
+{ 0x0F12, 0x01C5  },   //TVAR_ash_pGAS[141] //
+{ 0x0F12, 0x0205  },   //TVAR_ash_pGAS[142] //
+{ 0x0F12, 0x01A2  },   //TVAR_ash_pGAS[143] //
+{ 0x0F12, 0x015F  },   //TVAR_ash_pGAS[144] //
+{ 0x0F12, 0x0126  },   //TVAR_ash_pGAS[145] //
+{ 0x0F12, 0x00F9  },   //TVAR_ash_pGAS[146] //
+{ 0x0F12, 0x00D7  },   //TVAR_ash_pGAS[147] //
+{ 0x0F12, 0x00BF  },   //TVAR_ash_pGAS[148] //
+{ 0x0F12, 0x00B6  },   //TVAR_ash_pGAS[149] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[150] //
+{ 0x0F12, 0x00D2  },   //TVAR_ash_pGAS[151] //
+{ 0x0F12, 0x00F3  },   //TVAR_ash_pGAS[152] //
+{ 0x0F12, 0x011D  },   //TVAR_ash_pGAS[153] //
+{ 0x0F12, 0x015A  },   //TVAR_ash_pGAS[154] //
+{ 0x0F12, 0x019E  },   //TVAR_ash_pGAS[155] //
+{ 0x0F12, 0x0171  },   //TVAR_ash_pGAS[156] //
+{ 0x0F12, 0x012E  },   //TVAR_ash_pGAS[157] //
+{ 0x0F12, 0x00F1  },   //TVAR_ash_pGAS[158] //
+{ 0x0F12, 0x00BF  },   //TVAR_ash_pGAS[159] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[160] //
+{ 0x0F12, 0x0081  },   //TVAR_ash_pGAS[161] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[162] //
+{ 0x0F12, 0x0080  },   //TVAR_ash_pGAS[163] //
+{ 0x0F12, 0x0097  },   //TVAR_ash_pGAS[164] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[165] //
+{ 0x0F12, 0x00EE  },   //TVAR_ash_pGAS[166] //
+{ 0x0F12, 0x012B  },   //TVAR_ash_pGAS[167] //
+{ 0x0F12, 0x0177  },   //TVAR_ash_pGAS[168] //
+{ 0x0F12, 0x0144  },   //TVAR_ash_pGAS[169] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_pGAS[170] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[171] //
+{ 0x0F12, 0x0088  },   //TVAR_ash_pGAS[172] //
+{ 0x0F12, 0x005F  },   //TVAR_ash_pGAS[173] //
+{ 0x0F12, 0x0049  },   //TVAR_ash_pGAS[174] //
+{ 0x0F12, 0x0041  },   //TVAR_ash_pGAS[175] //
+{ 0x0F12, 0x0049  },   //TVAR_ash_pGAS[176] //
+{ 0x0F12, 0x0061  },   //TVAR_ash_pGAS[177] //
+{ 0x0F12, 0x0089  },   //TVAR_ash_pGAS[178] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[179] //
+{ 0x0F12, 0x0104  },   //TVAR_ash_pGAS[180] //
+{ 0x0F12, 0x014D  },   //TVAR_ash_pGAS[181] //
+{ 0x0F12, 0x0122  },   //TVAR_ash_pGAS[182] //
+{ 0x0F12, 0x00DD  },   //TVAR_ash_pGAS[183] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[184] //
+{ 0x0F12, 0x005F  },   //TVAR_ash_pGAS[185] //
+{ 0x0F12, 0x0036  },   //TVAR_ash_pGAS[186] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[187] //
+{ 0x0F12, 0x0019  },   //TVAR_ash_pGAS[188] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[189] //
+{ 0x0F12, 0x003A  },   //TVAR_ash_pGAS[190] //
+{ 0x0F12, 0x0066  },   //TVAR_ash_pGAS[191] //
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[192] //
+{ 0x0F12, 0x00E6  },   //TVAR_ash_pGAS[193] //
+{ 0x0F12, 0x0130  },   //TVAR_ash_pGAS[194] //
+{ 0x0F12, 0x010B  },   //TVAR_ash_pGAS[195] //
+{ 0x0F12, 0x00C6  },   //TVAR_ash_pGAS[196] //
+{ 0x0F12, 0x0082  },   //TVAR_ash_pGAS[197] //
+{ 0x0F12, 0x0047  },   //TVAR_ash_pGAS[198] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[199] //
+{ 0x0F12, 0x000D  },   //TVAR_ash_pGAS[200] //
+{ 0x0F12, 0x0007  },   //TVAR_ash_pGAS[201] //
+{ 0x0F12, 0x000F  },   //TVAR_ash_pGAS[202] //
+{ 0x0F12, 0x0027  },   //TVAR_ash_pGAS[203] //
+{ 0x0F12, 0x0053  },   //TVAR_ash_pGAS[204] //
+{ 0x0F12, 0x008F  },   //TVAR_ash_pGAS[205] //
+{ 0x0F12, 0x00D6  },   //TVAR_ash_pGAS[206] //
+{ 0x0F12, 0x0121  },   //TVAR_ash_pGAS[207] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_pGAS[208] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[209] //
+{ 0x0F12, 0x0077  },   //TVAR_ash_pGAS[210] //
+{ 0x0F12, 0x0040  },   //TVAR_ash_pGAS[211] //
+{ 0x0F12, 0x001A  },   //TVAR_ash_pGAS[212] //
+{ 0x0F12, 0x0007  },   //TVAR_ash_pGAS[213] //
+{ 0x0F12, 0x0000  },   //TVAR_ash_pGAS[214] //
+{ 0x0F12, 0x000B  },   //TVAR_ash_pGAS[215] //
+{ 0x0F12, 0x0023  },   //TVAR_ash_pGAS[216] //
+{ 0x0F12, 0x004E  },   //TVAR_ash_pGAS[217] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[218] //
+{ 0x0F12, 0x00D3  },   //TVAR_ash_pGAS[219] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[220] //
+{ 0x0F12, 0x0103  },   //TVAR_ash_pGAS[221] //
+{ 0x0F12, 0x00C1  },   //TVAR_ash_pGAS[222] //
+{ 0x0F12, 0x007D  },   //TVAR_ash_pGAS[223] //
+{ 0x0F12, 0x0046  },   //TVAR_ash_pGAS[224] //
+{ 0x0F12, 0x0024  },   //TVAR_ash_pGAS[225] //
+{ 0x0F12, 0x0010  },   //TVAR_ash_pGAS[226] //
+{ 0x0F12, 0x0008  },   //TVAR_ash_pGAS[227] //
+{ 0x0F12, 0x0014  },   //TVAR_ash_pGAS[228] //
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[229] //
+{ 0x0F12, 0x0059  },   //TVAR_ash_pGAS[230] //
+{ 0x0F12, 0x0094  },   //TVAR_ash_pGAS[231] //
+{ 0x0F12, 0x00DB  },   //TVAR_ash_pGAS[232] //
+{ 0x0F12, 0x0125  },   //TVAR_ash_pGAS[233] //
+{ 0x0F12, 0x0117  },   //TVAR_ash_pGAS[234] //
+{ 0x0F12, 0x00D5  },   //TVAR_ash_pGAS[235] //
+{ 0x0F12, 0x0092  },   //TVAR_ash_pGAS[236] //
+{ 0x0F12, 0x005C  },   //TVAR_ash_pGAS[237] //
+{ 0x0F12, 0x0038  },   //TVAR_ash_pGAS[238] //
+{ 0x0F12, 0x0026  },   //TVAR_ash_pGAS[239] //
+{ 0x0F12, 0x0020  },   //TVAR_ash_pGAS[240] //
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[241] //
+{ 0x0F12, 0x0044  },   //TVAR_ash_pGAS[242] //
+{ 0x0F12, 0x006F  },   //TVAR_ash_pGAS[243] //
+{ 0x0F12, 0x00AC  },   //TVAR_ash_pGAS[244] //
+{ 0x0F12, 0x00F2  },   //TVAR_ash_pGAS[245] //
+{ 0x0F12, 0x013B  },   //TVAR_ash_pGAS[246] //
+{ 0x0F12, 0x0131  },   //TVAR_ash_pGAS[247] //
+{ 0x0F12, 0x00EE  },   //TVAR_ash_pGAS[248] //
+{ 0x0F12, 0x00B3  },   //TVAR_ash_pGAS[249] //
+{ 0x0F12, 0x007E  },   //TVAR_ash_pGAS[250] //
+{ 0x0F12, 0x005B  },   //TVAR_ash_pGAS[251] //
+{ 0x0F12, 0x0047  },   //TVAR_ash_pGAS[252] //
+{ 0x0F12, 0x0044  },   //TVAR_ash_pGAS[253] //
+{ 0x0F12, 0x004E  },   //TVAR_ash_pGAS[254] //
+{ 0x0F12, 0x0067  },   //TVAR_ash_pGAS[255] //
+{ 0x0F12, 0x0094  },   //TVAR_ash_pGAS[256] //
+{ 0x0F12, 0x00D0  },   //TVAR_ash_pGAS[257] //
+{ 0x0F12, 0x0112  },   //TVAR_ash_pGAS[258] //
+{ 0x0F12, 0x0159  },   //TVAR_ash_pGAS[259] //
+{ 0x0F12, 0x015E  },   //TVAR_ash_pGAS[260] //
+{ 0x0F12, 0x011B  },   //TVAR_ash_pGAS[261] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[262] //
+{ 0x0F12, 0x00B1  },   //TVAR_ash_pGAS[263] //
+{ 0x0F12, 0x008E  },   //TVAR_ash_pGAS[264] //
+{ 0x0F12, 0x007E  },   //TVAR_ash_pGAS[265] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[266] //
+{ 0x0F12, 0x0084  },   //TVAR_ash_pGAS[267] //
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[268] //
+{ 0x0F12, 0x00C8  },   //TVAR_ash_pGAS[269] //
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[270] //
+{ 0x0F12, 0x013A  },   //TVAR_ash_pGAS[271] //
+{ 0x0F12, 0x0185  },   //TVAR_ash_pGAS[272] //
+{ 0x0F12, 0x0188  },   //TVAR_ash_pGAS[273] //
+{ 0x0F12, 0x0148  },   //TVAR_ash_pGAS[274] //
+{ 0x0F12, 0x010D  },   //TVAR_ash_pGAS[275] //
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[276] //
+{ 0x0F12, 0x00C7  },   //TVAR_ash_pGAS[277] //
+{ 0x0F12, 0x00B4  },   //TVAR_ash_pGAS[278] //
+{ 0x0F12, 0x00B2  },   //TVAR_ash_pGAS[279] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[280] //
+{ 0x0F12, 0x00D9  },   //TVAR_ash_pGAS[281] //
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[282] //
+{ 0x0F12, 0x012F  },   //TVAR_ash_pGAS[283] //
+{ 0x0F12, 0x016D  },   //TVAR_ash_pGAS[284] //
+{ 0x0F12, 0x01A7  },   //TVAR_ash_pGAS[285] //
+{ 0x0F12, 0x018F  },   //TVAR_ash_pGAS[286] //
+{ 0x0F12, 0x014E  },   //TVAR_ash_pGAS[287] //
+{ 0x0F12, 0x0119  },   //TVAR_ash_pGAS[288] //
+{ 0x0F12, 0x00EC  },   //TVAR_ash_pGAS[289] //
+{ 0x0F12, 0x00CD  },   //TVAR_ash_pGAS[290] //
+{ 0x0F12, 0x00BB  },   //TVAR_ash_pGAS[291] //
+{ 0x0F12, 0x00B8  },   //TVAR_ash_pGAS[292] //
+{ 0x0F12, 0x00C4  },   //TVAR_ash_pGAS[293] //
+{ 0x0F12, 0x00DE  },   //TVAR_ash_pGAS[294] //
+{ 0x0F12, 0x0105  },   //TVAR_ash_pGAS[295] //
+{ 0x0F12, 0x0135  },   //TVAR_ash_pGAS[296] //
+{ 0x0F12, 0x0176  },   //TVAR_ash_pGAS[297] //
+{ 0x0F12, 0x01B8  },   //TVAR_ash_pGAS[298] //
+{ 0x0F12, 0x0161  },   //TVAR_ash_pGAS[299] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[300] //
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[301] //
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[302] //
+{ 0x0F12, 0x0093  },   //TVAR_ash_pGAS[303] //
+{ 0x0F12, 0x0080  },   //TVAR_ash_pGAS[304] //
+{ 0x0F12, 0x007C  },   //TVAR_ash_pGAS[305] //
+{ 0x0F12, 0x0087  },   //TVAR_ash_pGAS[306] //
+{ 0x0F12, 0x00A3  },   //TVAR_ash_pGAS[307] //
+{ 0x0F12, 0x00CD  },   //TVAR_ash_pGAS[308] //
+{ 0x0F12, 0x0104  },   //TVAR_ash_pGAS[309] //
+{ 0x0F12, 0x0142  },   //TVAR_ash_pGAS[310] //
+{ 0x0F12, 0x0192  },   //TVAR_ash_pGAS[311] //
+{ 0x0F12, 0x0136  },   //TVAR_ash_pGAS[312] //
+{ 0x0F12, 0x00F4  },   //TVAR_ash_pGAS[313] //
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[314] //
+{ 0x0F12, 0x0081  },   //TVAR_ash_pGAS[315] //
+{ 0x0F12, 0x005C  },   //TVAR_ash_pGAS[316] //
+{ 0x0F12, 0x0048  },   //TVAR_ash_pGAS[317] //
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[318] //
+{ 0x0F12, 0x004E  },   //TVAR_ash_pGAS[319] //
+{ 0x0F12, 0x006A  },   //TVAR_ash_pGAS[320] //
+{ 0x0F12, 0x0097  },   //TVAR_ash_pGAS[321] //
+{ 0x0F12, 0x00D0  },   //TVAR_ash_pGAS[322] //
+{ 0x0F12, 0x0116  },   //TVAR_ash_pGAS[323] //
+{ 0x0F12, 0x0160  },   //TVAR_ash_pGAS[324] //
+{ 0x0F12, 0x0118  },   //TVAR_ash_pGAS[325] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[326] //
+{ 0x0F12, 0x0093  },   //TVAR_ash_pGAS[327] //
+{ 0x0F12, 0x005B  },   //TVAR_ash_pGAS[328] //
+{ 0x0F12, 0x0035  },   //TVAR_ash_pGAS[329] //
+{ 0x0F12, 0x0020  },   //TVAR_ash_pGAS[330] //
+{ 0x0F12, 0x001B  },   //TVAR_ash_pGAS[331] //
+{ 0x0F12, 0x0024  },   //TVAR_ash_pGAS[332] //
+{ 0x0F12, 0x0041  },   //TVAR_ash_pGAS[333] //
+{ 0x0F12, 0x006F  },   //TVAR_ash_pGAS[334] //
+{ 0x0F12, 0x00AC  },   //TVAR_ash_pGAS[335] //
+{ 0x0F12, 0x00F3  },   //TVAR_ash_pGAS[336] //
+{ 0x0F12, 0x013F  },   //TVAR_ash_pGAS[337] //
+{ 0x0F12, 0x0105  },   //TVAR_ash_pGAS[338] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[339] //
+{ 0x0F12, 0x007F  },   //TVAR_ash_pGAS[340] //
+{ 0x0F12, 0x0046  },   //TVAR_ash_pGAS[341] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[342] //
+{ 0x0F12, 0x000E  },   //TVAR_ash_pGAS[343] //
+{ 0x0F12, 0x0007  },   //TVAR_ash_pGAS[344] //
+{ 0x0F12, 0x0010  },   //TVAR_ash_pGAS[345] //
+{ 0x0F12, 0x002A  },   //TVAR_ash_pGAS[346] //
+{ 0x0F12, 0x0058  },   //TVAR_ash_pGAS[347] //
+{ 0x0F12, 0x0094  },   //TVAR_ash_pGAS[348] //
+{ 0x0F12, 0x00DB  },   //TVAR_ash_pGAS[349] //
+{ 0x0F12, 0x0127  },   //TVAR_ash_pGAS[350] //
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[351] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[352] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[353] //
+{ 0x0F12, 0x0042  },   //TVAR_ash_pGAS[354] //
+{ 0x0F12, 0x001C  },   //TVAR_ash_pGAS[355] //
+{ 0x0F12, 0x0008  },   //TVAR_ash_pGAS[356] //
+{ 0x0F12, 0x0000  },   //TVAR_ash_pGAS[357] //
+{ 0x0F12, 0x000B  },   //TVAR_ash_pGAS[358] //
+{ 0x0F12, 0x0023  },   //TVAR_ash_pGAS[359] //
+{ 0x0F12, 0x0050  },   //TVAR_ash_pGAS[360] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[361] //
+{ 0x0F12, 0x00D3  },   //TVAR_ash_pGAS[362] //
+{ 0x0F12, 0x011D  },   //TVAR_ash_pGAS[363] //
+{ 0x0F12, 0x0108  },   //TVAR_ash_pGAS[364] //
+{ 0x0F12, 0x00C4  },   //TVAR_ash_pGAS[365] //
+{ 0x0F12, 0x0083  },   //TVAR_ash_pGAS[366] //
+{ 0x0F12, 0x004C  },   //TVAR_ash_pGAS[367] //
+{ 0x0F12, 0x0027  },   //TVAR_ash_pGAS[368] //
+{ 0x0F12, 0x0011  },   //TVAR_ash_pGAS[369] //
+{ 0x0F12, 0x0008  },   //TVAR_ash_pGAS[370] //
+{ 0x0F12, 0x0013  },   //TVAR_ash_pGAS[371] //
+{ 0x0F12, 0x002A  },   //TVAR_ash_pGAS[372] //
+{ 0x0F12, 0x0055  },   //TVAR_ash_pGAS[373] //
+{ 0x0F12, 0x008F  },   //TVAR_ash_pGAS[374] //
+{ 0x0F12, 0x00D5  },   //TVAR_ash_pGAS[375] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[376] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[377] //
+{ 0x0F12, 0x00DC  },   //TVAR_ash_pGAS[378] //
+{ 0x0F12, 0x009C  },   //TVAR_ash_pGAS[379] //
+{ 0x0F12, 0x0064  },   //TVAR_ash_pGAS[380] //
+{ 0x0F12, 0x003D  },   //TVAR_ash_pGAS[381] //
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[382] //
+{ 0x0F12, 0x001F  },   //TVAR_ash_pGAS[383] //
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[384] //
+{ 0x0F12, 0x003F  },   //TVAR_ash_pGAS[385] //
+{ 0x0F12, 0x0069  },   //TVAR_ash_pGAS[386] //
+{ 0x0F12, 0x00A3  },   //TVAR_ash_pGAS[387] //
+{ 0x0F12, 0x00E8  },   //TVAR_ash_pGAS[388] //
+{ 0x0F12, 0x012D  },   //TVAR_ash_pGAS[389] //
+{ 0x0F12, 0x013D  },   //TVAR_ash_pGAS[390] //
+{ 0x0F12, 0x00FB  },   //TVAR_ash_pGAS[391] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[392] //
+{ 0x0F12, 0x0089  },   //TVAR_ash_pGAS[393] //
+{ 0x0F12, 0x0063  },   //TVAR_ash_pGAS[394] //
+{ 0x0F12, 0x004C  },   //TVAR_ash_pGAS[395] //
+{ 0x0F12, 0x0045  },   //TVAR_ash_pGAS[396] //
+{ 0x0F12, 0x004B  },   //TVAR_ash_pGAS[397] //
+{ 0x0F12, 0x0061  },   //TVAR_ash_pGAS[398] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[399] //
+{ 0x0F12, 0x00C4  },   //TVAR_ash_pGAS[400] //
+{ 0x0F12, 0x0102  },   //TVAR_ash_pGAS[401] //
+{ 0x0F12, 0x014B  },   //TVAR_ash_pGAS[402] //
+{ 0x0F12, 0x016F  },   //TVAR_ash_pGAS[403] //
+{ 0x0F12, 0x0129  },   //TVAR_ash_pGAS[404] //
+{ 0x0F12, 0x00F0  },   //TVAR_ash_pGAS[405] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[406] //
+{ 0x0F12, 0x009A  },   //TVAR_ash_pGAS[407] //
+{ 0x0F12, 0x0084  },   //TVAR_ash_pGAS[408] //
+{ 0x0F12, 0x007B  },   //TVAR_ash_pGAS[409] //
+{ 0x0F12, 0x0082  },   //TVAR_ash_pGAS[410] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[411] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[412] //
+{ 0x0F12, 0x00EF  },   //TVAR_ash_pGAS[413] //
+{ 0x0F12, 0x0129  },   //TVAR_ash_pGAS[414] //
+{ 0x0F12, 0x0173  },   //TVAR_ash_pGAS[415] //
+{ 0x0F12, 0x01A0  },   //TVAR_ash_pGAS[416] //
+{ 0x0F12, 0x015B  },   //TVAR_ash_pGAS[417] //
+{ 0x0F12, 0x0121  },   //TVAR_ash_pGAS[418] //
+{ 0x0F12, 0x00F9  },   //TVAR_ash_pGAS[419] //
+{ 0x0F12, 0x00D8  },   //TVAR_ash_pGAS[420] //
+{ 0x0F12, 0x00C2  },   //TVAR_ash_pGAS[421] //
+{ 0x0F12, 0x00B7  },   //TVAR_ash_pGAS[422] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[423] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[424] //
+{ 0x0F12, 0x00F4  },   //TVAR_ash_pGAS[425] //
+{ 0x0F12, 0x0120  },   //TVAR_ash_pGAS[426] //
+{ 0x0F12, 0x015D  },   //TVAR_ash_pGAS[427] //
+{ 0x0F12, 0x0198  },   //TVAR_ash_pGAS[428] //
+{ 0x0F12, 0x013A  },   //TVAR_ash_pGAS[429] //
+{ 0x0F12, 0x010B  },   //TVAR_ash_pGAS[430] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[431] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[432] //
+{ 0x0F12, 0x00A7  },   //TVAR_ash_pGAS[433] //
+{ 0x0F12, 0x009A  },   //TVAR_ash_pGAS[434] //
+{ 0x0F12, 0x0097  },   //TVAR_ash_pGAS[435] //
+{ 0x0F12, 0x00A2  },   //TVAR_ash_pGAS[436] //
+{ 0x0F12, 0x00B9  },   //TVAR_ash_pGAS[437] //
+{ 0x0F12, 0x00D6  },   //TVAR_ash_pGAS[438] //
+{ 0x0F12, 0x00FD  },   //TVAR_ash_pGAS[439] //
+{ 0x0F12, 0x0133  },   //TVAR_ash_pGAS[440] //
+{ 0x0F12, 0x0165  },   //TVAR_ash_pGAS[441] //
+{ 0x0F12, 0x0117  },   //TVAR_ash_pGAS[442] //
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[443] //
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[444] //
+{ 0x0F12, 0x0091  },   //TVAR_ash_pGAS[445] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[446] //
+{ 0x0F12, 0x006D  },   //TVAR_ash_pGAS[447] //
+{ 0x0F12, 0x0069  },   //TVAR_ash_pGAS[448] //
+{ 0x0F12, 0x0072  },   //TVAR_ash_pGAS[449] //
+{ 0x0F12, 0x0088  },   //TVAR_ash_pGAS[450] //
+{ 0x0F12, 0x00A9  },   //TVAR_ash_pGAS[451] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[452] //
+{ 0x0F12, 0x0108  },   //TVAR_ash_pGAS[453] //
+{ 0x0F12, 0x0148  },   //TVAR_ash_pGAS[454] //
+{ 0x0F12, 0x00F1  },   //TVAR_ash_pGAS[455] //
+{ 0x0F12, 0x00BD  },   //TVAR_ash_pGAS[456] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[457] //
+{ 0x0F12, 0x0063  },   //TVAR_ash_pGAS[458] //
+{ 0x0F12, 0x0049  },   //TVAR_ash_pGAS[459] //
+{ 0x0F12, 0x003D  },   //TVAR_ash_pGAS[460] //
+{ 0x0F12, 0x003A  },   //TVAR_ash_pGAS[461] //
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[462] //
+{ 0x0F12, 0x0057  },   //TVAR_ash_pGAS[463] //
+{ 0x0F12, 0x007A  },   //TVAR_ash_pGAS[464] //
+{ 0x0F12, 0x00A8  },   //TVAR_ash_pGAS[465] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[466] //
+{ 0x0F12, 0x011B  },   //TVAR_ash_pGAS[467] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[468] //
+{ 0x0F12, 0x00A1  },   //TVAR_ash_pGAS[469] //
+{ 0x0F12, 0x006D  },   //TVAR_ash_pGAS[470] //
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[471] //
+{ 0x0F12, 0x0027  },   //TVAR_ash_pGAS[472] //
+{ 0x0F12, 0x001B  },   //TVAR_ash_pGAS[473] //
+{ 0x0F12, 0x0019  },   //TVAR_ash_pGAS[474] //
+{ 0x0F12, 0x001E  },   //TVAR_ash_pGAS[475] //
+{ 0x0F12, 0x0033  },   //TVAR_ash_pGAS[476] //
+{ 0x0F12, 0x0057  },   //TVAR_ash_pGAS[477] //
+{ 0x0F12, 0x0087  },   //TVAR_ash_pGAS[478] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[479] //
+{ 0x0F12, 0x00FA  },   //TVAR_ash_pGAS[480] //
+{ 0x0F12, 0x00C1  },   //TVAR_ash_pGAS[481] //
+{ 0x0F12, 0x008F  },   //TVAR_ash_pGAS[482] //
+{ 0x0F12, 0x005B  },	//TVAR_ash_pGAS[483] //                                                                        
+{ 0x0F12, 0x0031  },	//TVAR_ash_pGAS[484] //                                                                        
+{ 0x0F12, 0x0016  },	//TVAR_ash_pGAS[485] //                                                                        
+{ 0x0F12, 0x000B  },	//TVAR_ash_pGAS[486] //                                                                        
+{ 0x0F12, 0x0006  },	//TVAR_ash_pGAS[487] //                                                                        
+{ 0x0F12, 0x000D  },	//TVAR_ash_pGAS[488] //                                                                        
+{ 0x0F12, 0x001F  },	//TVAR_ash_pGAS[489] //                                                                        
+{ 0x0F12, 0x0042  },	//TVAR_ash_pGAS[490] //                                                                        
+{ 0x0F12, 0x0070  },	//TVAR_ash_pGAS[491] //                                                                        
+{ 0x0F12, 0x00AA  },	//TVAR_ash_pGAS[492] //                                                                        
+{ 0x0F12, 0x00E5  },	//TVAR_ash_pGAS[493] //                                                                        
+{ 0x0F12, 0x00BD  },	//TVAR_ash_pGAS[494] //                                                                        
+{ 0x0F12, 0x008A  },	//TVAR_ash_pGAS[495] //                                                                        
+{ 0x0F12, 0x0056  },	//TVAR_ash_pGAS[496] //                                                                        
+{ 0x0F12, 0x002C  },	//TVAR_ash_pGAS[497] //                                                                        
+{ 0x0F12, 0x0011  },	//TVAR_ash_pGAS[498] //                                                                        
+{ 0x0F12, 0x0005  },	//TVAR_ash_pGAS[499] //                                                                        
+{ 0x0F12, 0x0000  },	//TVAR_ash_pGAS[500] //                                                                        
+{ 0x0F12, 0x0008  },	//TVAR_ash_pGAS[501] //                                                                        
+{ 0x0F12, 0x0018  },	//TVAR_ash_pGAS[502] //                                                                        
+{ 0x0F12, 0x0039  },	//TVAR_ash_pGAS[503] //                                                                        
+{ 0x0F12, 0x0068  },	//TVAR_ash_pGAS[504] //                                                                        
+{ 0x0F12, 0x00A1  },	//TVAR_ash_pGAS[505] //                                                                        
+{ 0x0F12, 0x00DA  },	//TVAR_ash_pGAS[506] //                                                                        
+{ 0x0F12, 0x00C4  },	//TVAR_ash_pGAS[507] //                                                                        
+{ 0x0F12, 0x0092  },	//TVAR_ash_pGAS[508] //                                                                        
+{ 0x0F12, 0x005F  },	//TVAR_ash_pGAS[509] //                                                                        
+{ 0x0F12, 0x0034  },	//TVAR_ash_pGAS[510] //                                                                        
+{ 0x0F12, 0x001B  },	//TVAR_ash_pGAS[511] //                                                                        
+{ 0x0F12, 0x000D  },	//TVAR_ash_pGAS[512] //                                                                        
+{ 0x0F12, 0x0007  },	//TVAR_ash_pGAS[513] //                                                                        
+{ 0x0F12, 0x000E  },	//TVAR_ash_pGAS[514] //                                                                        
+{ 0x0F12, 0x001E  },	//TVAR_ash_pGAS[515] //                                                                        
+{ 0x0F12, 0x003E  },	//TVAR_ash_pGAS[516] //                                                                        
+{ 0x0F12, 0x006A  },	//TVAR_ash_pGAS[517] //                                                                        
+{ 0x0F12, 0x00A2  },	//TVAR_ash_pGAS[518] //                                                                        
+{ 0x0F12, 0x00DB  },	//TVAR_ash_pGAS[519] //                                                                        
+{ 0x0F12, 0x00D7  },	//TVAR_ash_pGAS[520] //                                                                        
+{ 0x0F12, 0x00A3  },	//TVAR_ash_pGAS[521] //                                                                        
+{ 0x0F12, 0x0073  },	//TVAR_ash_pGAS[522] //                                                                        
+{ 0x0F12, 0x0049  },	//TVAR_ash_pGAS[523] //                                                                        
+{ 0x0F12, 0x002F  },	//TVAR_ash_pGAS[524] //                                                                        
+{ 0x0F12, 0x0022  },	//TVAR_ash_pGAS[525] //                                                                        
+{ 0x0F12, 0x001B  },	//TVAR_ash_pGAS[526] //                                                                        
+{ 0x0F12, 0x0023  },	//TVAR_ash_pGAS[527] //                                                                        
+{ 0x0F12, 0x0031  },	//TVAR_ash_pGAS[528] //                                                                        
+{ 0x0F12, 0x0050  },	//TVAR_ash_pGAS[529] //                                                                        
+{ 0x0F12, 0x007C  },	//TVAR_ash_pGAS[530] //                                                                        
+{ 0x0F12, 0x00B1  },	//TVAR_ash_pGAS[531] //                                                                        
+{ 0x0F12, 0x00E9  },	//TVAR_ash_pGAS[532] //                                                                        
+{ 0x0F12, 0x00F2  },	//TVAR_ash_pGAS[533] //                                                                        
+{ 0x0F12, 0x00C0  },	//TVAR_ash_pGAS[534] //                                                                        
+{ 0x0F12, 0x0091  },	//TVAR_ash_pGAS[535] //                                                                        
+{ 0x0F12, 0x006A  },	//TVAR_ash_pGAS[536] //                                                                        
+{ 0x0F12, 0x0050  },	//TVAR_ash_pGAS[537] //                                                                        
+{ 0x0F12, 0x0041  },	//TVAR_ash_pGAS[538] //                                                                        
+{ 0x0F12, 0x003C  },	//TVAR_ash_pGAS[539] //                                                                        
+{ 0x0F12, 0x0040  },	//TVAR_ash_pGAS[540] //                                                                        
+{ 0x0F12, 0x004F  },	//TVAR_ash_pGAS[541] //                                                                        
+{ 0x0F12, 0x006D  },	//TVAR_ash_pGAS[542] //                                                                        
+{ 0x0F12, 0x0099  },	//TVAR_ash_pGAS[543] //                                                                        
+{ 0x0F12, 0x00C9  },	//TVAR_ash_pGAS[544] //                                                                        
+{ 0x0F12, 0x0102  },	//TVAR_ash_pGAS[545] //                                                                        
+{ 0x0F12, 0x0120  },	//TVAR_ash_pGAS[546] //                                                                        
+{ 0x0F12, 0x00EB  },	//TVAR_ash_pGAS[547] //                                                                        
+{ 0x0F12, 0x00BE  },	//TVAR_ash_pGAS[548] //                                                                        
+{ 0x0F12, 0x0099  },	//TVAR_ash_pGAS[549] //                                                                        
+{ 0x0F12, 0x0081  },	//TVAR_ash_pGAS[550] //                                                                        
+{ 0x0F12, 0x0074  },	//TVAR_ash_pGAS[551] //                                                                        
+{ 0x0F12, 0x006F  },	//TVAR_ash_pGAS[552] //                                                                        
+{ 0x0F12, 0x0071  },	//TVAR_ash_pGAS[553] //                                                                        
+{ 0x0F12, 0x0082  },	//TVAR_ash_pGAS[554] //                                                                        
+{ 0x0F12, 0x009B  },	//TVAR_ash_pGAS[555] //                                                                        
+{ 0x0F12, 0x00C0  },	//TVAR_ash_pGAS[556] //                                                                        
+{ 0x0F12, 0x00EE  },	//TVAR_ash_pGAS[557] //                                                                        
+{ 0x0F12, 0x0126  },	//TVAR_ash_pGAS[558] //                                                                        
+{ 0x0F12, 0x0147  },	//TVAR_ash_pGAS[559] //                                                                        
+{ 0x0F12, 0x0116  },	//TVAR_ash_pGAS[560] //                                                                        
+{ 0x0F12, 0x00E7  },	//TVAR_ash_pGAS[561] //                                                                        
+{ 0x0F12, 0x00C9  },	//TVAR_ash_pGAS[562] //                                                                        
+{ 0x0F12, 0x00B4  },	//TVAR_ash_pGAS[563] //                                                                        
+{ 0x0F12, 0x00A7  },	//TVAR_ash_pGAS[564] //                                                                        
+{ 0x0F12, 0x00A0  },	//TVAR_ash_pGAS[565] //                                                                        
+{ 0x0F12, 0x00A3  },	//TVAR_ash_pGAS[566] //                                                                        
+{ 0x0F12, 0x00B1  },	//TVAR_ash_pGAS[567] //                                                                        
+{ 0x0F12, 0x00C9  },	//TVAR_ash_pGAS[568] //                                                                        
+{ 0x0F12, 0x00EA  },	//TVAR_ash_pGAS[569] //                                                                        
+{ 0x0F12, 0x011B  },	//TVAR_ash_pGAS[570] //                                                                        
+{ 0x0F12, 0x0141  },	//TVAR_ash_pGAS[571] //                                                                        
+                        
+{ 0x002A, 0x074E  },	    
+{ 0x0F12, 0x0001  },	//ash_bLumaMode //         	                                                                        
+{ 0x002A, 0x0D30  },                               
+{ 0x0F12, 0x02A8  },	//awbb_GLocu //        
+{ 0x0F12, 0x0347  },	//awbb_GLocuSB //      
+                                                   
+{ 0x002A, 0x06B8  },                               
+{ 0x0F12, 0x00C0  },	//TVAR_ash_AwbashCord[0] //                                                                        
+{ 0x0F12, 0x00E0  },	//TVAR_ash_AwbashCord[1] //                                                                        
+{ 0x0F12, 0x0120  },	//TVAR_ash_AwbashCord[2] //                                                                        
+{ 0x0F12, 0x0124  },	//TVAR_ash_AwbashCord[3] //                                                                        
+{ 0x0F12, 0x0156  },	//TVAR_ash_AwbashCord[4] //                                                                        
+{ 0x0F12, 0x017F  },	//TVAR_ash_AwbashCord[5] //                                                                        
+{ 0x0F12, 0x018F  },	//TVAR_ash_AwbashCord[6] //                                                                        
+                                                   
+                                                   
+{ 0x002A, 0x0664  },                               
+{ 0x0F12, 0x013E  },	//seti_uContrastCenter //                                                                          
+                                                   
+                                                   
+{ 0x002A, 0x06C6  },                               
+{ 0x0F12, 0x010B  },	//ash_CGrasalphaS[0] //
+{ 0x0F12, 0x0103  },	//ash_CGrasalphaS[1] //
+{ 0x0F12, 0x00FC  },	//ash_CGrasalphaS[2] //
+{ 0x0F12, 0x010C  },	//ash_CGrasalphaS[3] //
+                        
+{ 0x002A, 0x0C48  },    
+{ 0x0F12, 0x03C8  },	//awbb_IndoorGrZones_m_BGrid[0] // 		                                                                        
+{ 0x0F12, 0x03DE  },	//awbb_IndoorGrZones_m_BGrid[1] //                                                                         
+{ 0x0F12, 0x0372  },	//awbb_IndoorGrZones_m_BGrid[2] //                                                                         
+{ 0x0F12, 0x03EA  },	//awbb_IndoorGrZones_m_BGrid[3] //                                                                         
+{ 0x0F12, 0x0336  },	//awbb_IndoorGrZones_m_BGrid[4] //                                                                         
+{ 0x0F12, 0x03DE  },	//awbb_IndoorGrZones_m_BGrid[5] //                                                                         
+{ 0x0F12, 0x0302  },	//awbb_IndoorGrZones_m_BGrid[6] //                                                                         
+{ 0x0F12, 0x03A2  },	//awbb_IndoorGrZones_m_BGrid[7] //                                                                         
+{ 0x0F12, 0x02C8  },	//awbb_IndoorGrZones_m_BGrid[8] //                                                                         
+{ 0x0F12, 0x0368  },	//awbb_IndoorGrZones_m_BGrid[9] //                                                                         
+{ 0x0F12, 0x0292  },	//awbb_IndoorGrZones_m_BGrid[10] //                                                                        
+{ 0x0F12, 0x033A  },	//awbb_IndoorGrZones_m_BGrid[11] //                                                                        
+{ 0x0F12, 0x0276  },	//awbb_IndoorGrZones_m_BGrid[12] //                                                                        
+{ 0x0F12, 0x0306  },	//awbb_IndoorGrZones_m_BGrid[13] //                                                                        
+{ 0x0F12, 0x025A  },	//awbb_IndoorGrZones_m_BGrid[14] //                                                                        
+{ 0x0F12, 0x02C2  },	//awbb_IndoorGrZones_m_BGrid[15] //                                                                        
+{ 0x0F12, 0x0246  },	//awbb_IndoorGrZones_m_BGrid[16] //                                                                        
+{ 0x0F12, 0x02A2  },	//awbb_IndoorGrZones_m_BGrid[17] //                                                                        
+{ 0x0F12, 0x0232  },	//awbb_IndoorGrZones_m_BGrid[18] //                                                                        
+{ 0x0F12, 0x0298  },	//awbb_IndoorGrZones_m_BGrid[19] //                                                                        
+{ 0x0F12, 0x021E  },	//awbb_IndoorGrZones_m_BGrid[20] //                                                                        
+{ 0x0F12, 0x027E  },	//awbb_IndoorGrZones_m_BGrid[21] //                                                                        
+{ 0x0F12, 0x0208  },	//awbb_IndoorGrZones_m_BGrid[22] //                                                                        
+{ 0x0F12, 0x026C  },	//awbb_IndoorGrZones_m_BGrid[23] //                                                                        
+{ 0x0F12, 0x01EE  },	//awbb_IndoorGrZones_m_BGrid[24] //                                                                        
+{ 0x0F12, 0x025C  },	//awbb_IndoorGrZones_m_BGrid[25] //                                                                        
+{ 0x0F12, 0x01F0  },	//awbb_IndoorGrZones_m_BGrid[26] //                                                                        
+{ 0x0F12, 0x0248  },	//awbb_IndoorGrZones_m_BGrid[27] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[28] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[29] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[30] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[31] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[32] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[33] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[34] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[35] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[36] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[37] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[38] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[39] //                                                                        
+                                                           
+{ 0x0F12, 0x0005  },   //awbb_IndoorGrZones_m_Gridstep //  
+
+{ 0x002A, 0x0C9C  },
+{ 0x0F12, 0x000E  },
+{ 0x002A, 0x0CA0  },                                       
+{ 0x0F12, 0x0108  },	//awbb_IndoorGrZones_m_Boffs //
+                                                           
+{ 0x002A, 0x0CE0  },                                       
+{ 0x0F12, 0x03D4  },	//awbb_LowBrGrZones_m_BGrid[0] //                                                                          
+{ 0x0F12, 0x043E  },	//awbb_LowBrGrZones_m_BGrid[1] //                                                                          
+{ 0x0F12, 0x035C  },	//awbb_LowBrGrZones_m_BGrid[2] //                                                                          
+{ 0x0F12, 0x0438  },	//awbb_LowBrGrZones_m_BGrid[3] //                                                                          
+{ 0x0F12, 0x02F0  },	//awbb_LowBrGrZones_m_BGrid[4] //                                                                          
+{ 0x0F12, 0x042D  },	//awbb_LowBrGrZones_m_BGrid[5] //                                                                          
+{ 0x0F12, 0x029A  },	//awbb_LowBrGrZones_m_BGrid[6] //                                                                          
+{ 0x0F12, 0x03EF  },	//awbb_LowBrGrZones_m_BGrid[7] //                                                                          
+{ 0x0F12, 0x025E  },	//awbb_LowBrGrZones_m_BGrid[8] //                                                                          
+{ 0x0F12, 0x0395  },	//awbb_LowBrGrZones_m_BGrid[9] //                                                                          
+{ 0x0F12, 0x022E  },	//awbb_LowBrGrZones_m_BGrid[10] //                                                                         
+{ 0x0F12, 0x0346  },	//awbb_LowBrGrZones_m_BGrid[11] //                                                                         
+{ 0x0F12, 0x0200  },	//awbb_LowBrGrZones_m_BGrid[12] //                                                                         
+{ 0x0F12, 0x02F6  },	//awbb_LowBrGrZones_m_BGrid[13] //                                                                         
+{ 0x0F12, 0x01CE  },	//awbb_LowBrGrZones_m_BGrid[14] //                                                                         
+{ 0x0F12, 0x02C8  },	//awbb_LowBrGrZones_m_BGrid[15] //                                                                         
+{ 0x0F12, 0x01BB  },	//awbb_LowBrGrZones_m_BGrid[16] //                                                                         
+{ 0x0F12, 0x0287  },	//awbb_LowBrGrZones_m_BGrid[17] //                                                                         
+{ 0x0F12, 0x01E2  },	//awbb_LowBrGrZones_m_BGrid[18] //                                                                         
+{ 0x0F12, 0x0239  },	//awbb_LowBrGrZones_m_BGrid[19] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[20] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[21] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[22] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[23] //                                                                         
+                        
+{ 0x0F12, 0x0006  },	//awbb_LowBrGrZones_m_Gridstep //	                                                                        
+{ 0x002A, 0x0D18  },                                     
+{ 0x0F12, 0x00AE  },	//awbb_LowBrGrZones_m_Boff //
+                        
+{ 0x002A, 0x0CA4  },    
+{ 0x0F12, 0x026E  },	//0294//0286//02C2//awbb_OutdoorGrZones_m_BGrid[0] // 		                                                                        
+{ 0x0F12, 0x02A4  },	//02CB//02BD//02E0//awbb_OutdoorGrZones_m_BGrid[1] //                                                                         
+{ 0x0F12, 0x0262  },	//027A//026C//0278//awbb_OutdoorGrZones_m_BGrid[2] //                                                                         
+{ 0x0F12, 0x02A8  },	//02D7//02C9//02BC//awbb_OutdoorGrZones_m_BGrid[3] //                                                                         
+{ 0x0F12, 0x0256  },	//0266//0258//025A//awbb_OutdoorGrZones_m_BGrid[4] //                                                                         
+{ 0x0F12, 0x02AE  },	//02BF//02B1//02A2//awbb_OutdoorGrZones_m_BGrid[5] //                                                                         
+{ 0x0F12, 0x0248  },	//0252//0244//024A//awbb_OutdoorGrZones_m_BGrid[6] //                                                                         
+{ 0x0F12, 0x02A4  },	//02A8//029A//0288//awbb_OutdoorGrZones_m_BGrid[7] //                                                                         
+{ 0x0F12, 0x023E  },	//023E//0230//0240//awbb_OutdoorGrZones_m_BGrid[8] //                                                                         
+{ 0x0F12, 0x029A  },	//028F//0281//0278//awbb_OutdoorGrZones_m_BGrid[9] //                                                                         
+{ 0x0F12, 0x023A  },	//0239//022B//023E//awbb_OutdoorGrZones_m_BGrid[10] //                                                                        
+{ 0x0F12, 0x0290  },	//027A//026C//0254//awbb_OutdoorGrZones_m_BGrid[11] //                                                                        
+{ 0x0F12, 0x023A  },	//024A//023C//0000//awbb_OutdoorGrZones_m_BGrid[12] //                                                                        
+{ 0x0F12, 0x027E  },	//0260//0252//0000//awbb_OutdoorGrZones_m_BGrid[13] //                                                                        
+{ 0x0F12, 0x0244  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[14] //                                                                        
+{ 0x0F12, 0x0266  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[15] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[16] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[17] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[18] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[19] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[20] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[21] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[22] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[23] //                                                                        
+                  
+{ 0x0F12, 0x0004  },	//awbb_OutdoorGrZones_m_Gridstep //               
+{ 0x002A, 0x0CD8  },
+{ 0x0F12, 0x0008  },
+{ 0x002A, 0x0CDC  },                                                          
+{ 0x0F12, 0x0204  },	//awbb_OutdoorGrZones_m_Boff //                   
+{ 0x002A, 0x0D1C  },                                                          
+{ 0x0F12, 0x037C  },	//awbb_CrclLowT_R_c //                            
+{ 0x002A, 0x0D20  },                                                          
+{ 0x0F12, 0x0157  },	//awbb_CrclLowT_B_c //                            
+{ 0x002A, 0x0D24  },                                                          
+{ 0x0F12, 0x3EB8  },	//awbb_CrclLowT_Rad_c //                          
+                        
+{ 0x002A, 0x0D2C  },    
+{ 0x0F12, 0x013D  },	//awbb_IntcR //	                                                                        
+{ 0x0F12, 0x011E  },	//awbb_IntcB //                                                                        
+{ 0x002A, 0x0D46  },    
+{ 0x0F12, 0x04C0  },	//0554//055D//0396//04A2//awbb_MvEq_RBthresh //	                                                                        
+                        
+                        
+                        
+{ 0x002A, 0x0D28  },    //wp outdoor
+{ 0x0F12, 0x0270  },	                                                                        
+{ 0x0F12, 0x0240  },	                                                                        
+                        
+                  
+{ 0x002A, 0x0D5C  },    
+{ 0x0F12, 0x7FFF  },	                                                                        
+{ 0x0F12, 0x0050  },	                                                                        
+                        
+{ 0x002A, 0x2316  },    
+{ 0x0F12, 0x0006  },	                                                                        
+                        
+{ 0x002A, 0x0E44  },    
+{ 0x0F12, 0x0525  },	                                                                        
+{ 0x0F12, 0x0400  },	                                                                        
+{ 0x0F12, 0x078C  },	                                                                        
+                        
+{ 0x002A, 0x0E36  },    
+{ 0x0F12, 0x0028  },	 //R OFFSET                                                                       
+{ 0x0F12, 0xFFD8  },	 //B OFFSET                                                                       
+{ 0x0F12, 0x0000  },	 //G OFFSET                                                                       
+                        
+{ 0x002A, 0x0DD4  },    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[0] //        	                                                                        
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[1] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[2] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[3] //    
+{ 0x0F12, 0xFFF0  },	//awbb_GridCorr_R[4] //    
+{ 0x0F12, 0x0080  },	//awbb_GridCorr_R[5] //    
+                   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[6] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[7] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[8] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[9] //    
+{ 0x0F12, 0xFFF0  },	//awbb_GridCorr_R[10] //   
+{ 0x0F12, 0x0080  },	//awbb_GridCorr_R[11] //   
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[12] //   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[13] //   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[14] //   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[15] //   
+{ 0x0F12, 0xFFF0  },	//awbb_GridCorr_R[16] //   
+{ 0x0F12, 0x0080  },	//awbb_GridCorr_R[17] //   
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[0] ////                                                                        
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[1] //                                                                          
+{ 0x0F12, 0x0032  },	//awbb_GridCorr_B[2] //                                                                          
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[3] //                                                                          
+{ 0x0F12, 0x0020  },	//awbb_GridCorr_B[4] //                                                                          
+{ 0x0F12, 0xFFC0  },	//awbb_GridCorr_B[5] //                                                                          
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[6] //                                                                          
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[7] //                                                                          
+{ 0x0F12, 0x0032  },	//awbb_GridCorr_B[8] //                                                                          
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[9] //                                                                          
+{ 0x0F12, 0x0020  },	//awbb_GridCorr_B[10] //                                                                         
+{ 0x0F12, 0xFFC0  },	//awbb_GridCorr_B[11] //                                                                         
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[12] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[13] //                                                                         
+{ 0x0F12, 0x0032  },	//awbb_GridCorr_B[14] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[15] //                                                                         
+{ 0x0F12, 0x0020  },	//awbb_GridCorr_B[16] //   
+{ 0x0F12, 0xFFC0  },	//awbb_GridCorr_B[17] //                 
+                   
+{ 0x0F12, 0x02D9  },	//awbb_GridConst_1[0] //                                                                     
+{ 0x0F12, 0x0357  },	//awbb_GridConst_1[1] //                                                                     
+{ 0x0F12, 0x03D1  },	//awbb_GridConst_1[2] //                                                                     
+                   
+                   
+{ 0x0F12, 0x0DF6  },	//0E4F//0DE9//0DE9//awbb_GridConst_2[0] //                                                   
+{ 0x0F12, 0x0ED8  },	//0EDD//0EDD//0EDD//awbb_GridConst_2[1] //                                                   
+{ 0x0F12, 0x0F51  },	//0F42//0F42//0F42//awbb_GridConst_2[2] //                                                   
+{ 0x0F12, 0x0F5C  },	//0F4E//0F4E//0F54//awbb_GridConst_2[3] //                                                   
+{ 0x0F12, 0x0F8F  },	//0F99//0F99//0FAE//awbb_GridConst_2[4] //                                                   
+{ 0x0F12, 0x1006  },	//1006//1006//1011//awbb_GridConst_2[5] //                                                   
+                   
+{ 0x0F12, 0x00AC  },	//00BA//awbb_GridCoeff_R_1                                                                   
+{ 0x0F12, 0x00BD  },	//00AF//awbb_GridCoeff_B_1                                                                   
+{ 0x0F12, 0x0049  },	//0049//awbb_GridCoeff_R_2                                                                   
+{ 0x0F12, 0x00F5  },	//00F5//awbb_GridCoeff_B_2                                                                   
+                   
+{ 0x002A, 0x0E4A  },                         
+{ 0x0F12, 0x0002  },	//awbb_GridEnable//                                                                          
+                   
+{ 0x002A, 0x051A  },                         
+{ 0x0F12, 0x010E  },	//lt_uLimitHigh//
+{ 0x0F12, 0x00F5  },	//lt_uLimitLow// 
+                   
+                   
+{ 0x002A, 0x0F76  },                         
+{ 0x0F12, 0x0007  },	//ae_statmode BLC off : 0x0F, on : 0x0D//  illumType On : 07 , Off : 0F
+                   
+{ 0x002A, 0x1034  },                         
+{ 0x0F12, 0x00C0  },	//saRR_IllumType[0] //                                                                       
+{ 0x0F12, 0x00E0  },	//saRR_IllumType[1] //                                                                       
+{ 0x0F12, 0x0104  },	//saRR_IllumType[2] //                                                                       
+{ 0x0F12, 0x0129  },	//saRR_IllumType[3] //                                                                       
+{ 0x0F12, 0x0156  },	//saRR_IllumType[4] //                                                                       
+{ 0x0F12, 0x017F  },	//saRR_IllumType[5] //                                                                       
+{ 0x0F12, 0x018F  },	//saRR_IllumType[6] //                                                                       
+                   
+                   
+{ 0x0F12, 0x0120  },	//saRR_IllumTypeF[0] //                                                                      
+{ 0x0F12, 0x0120  },	//saRR_IllumTypeF[1] //                                                                      
+{ 0x0F12, 0x0120  },	//saRR_IllumTypeF[2] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[3] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[4] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[5] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[6] //                                                                      
+                        
+                        
+                        
+{ 0x002A, 0x3288  },	//saRR_usDualGammaLutRGBIndoor  //               	                                                                        
+{ 0x0F12, 0x0000  }, //	saRR_usDualGammaLutRGBIndoor[0] //[0] //                                                 
+{ 0x0F12, 0x0008  }, //  saRR_usDualGammaLutRGBIndoor[0] //[1] //                                                       
+{ 0x0F12, 0x0013  }, //  saRR_usDualGammaLutRGBIndoor[0] //[2] //                                                       
+{ 0x0F12, 0x002C  }, //  saRR_usDualGammaLutRGBIndoor[0] //[3] //                                                       
+{ 0x0F12, 0x0062  }, //  saRR_usDualGammaLutRGBIndoor[0] //[4] //                                                       
+{ 0x0F12, 0x00CD  }, //  saRR_usDualGammaLutRGBIndoor[0] //[5] //                                                       
+{ 0x0F12, 0x0129  }, //  saRR_usDualGammaLutRGBIndoor[0] //[6] //                                                       
+{ 0x0F12, 0x0151  }, //  saRR_usDualGammaLutRGBIndoor[0] //[7] //                                                       
+{ 0x0F12, 0x0174  }, //  saRR_usDualGammaLutRGBIndoor[0] //[8] //                                                       
+{ 0x0F12, 0x01AA  }, //  saRR_usDualGammaLutRGBIndoor[0] //[9] //                                                       
+{ 0x0F12, 0x01D7  }, //  saRR_usDualGammaLutRGBIndoor[0] //[10] //                                                      
+{ 0x0F12, 0x01FE  }, //  saRR_usDualGammaLutRGBIndoor[0] //[11] //                                                      
+{ 0x0F12, 0x0221  }, //  saRR_usDualGammaLutRGBIndoor[0] //[12] //                                                      
+{ 0x0F12, 0x025D  }, //  saRR_usDualGammaLutRGBIndoor[0] //[13] //                                                      
+{ 0x0F12, 0x0291  }, //  saRR_usDualGammaLutRGBIndoor[0] //[14] //                                                      
+{ 0x0F12, 0x02EB  }, //  saRR_usDualGammaLutRGBIndoor[0] //[15] //                                                      
+{ 0x0F12, 0x033A  }, //  saRR_usDualGammaLutRGBIndoor[0] //[16] //                                                      
+{ 0x0F12, 0x0380  }, //  saRR_usDualGammaLutRGBIndoor[0] //[17] //                                                      
+{ 0x0F12, 0x03C2  }, //  saRR_usDualGammaLutRGBIndoor[0] //[18] //                                                      
+{ 0x0F12, 0x03FF  }, //  saRR_usDualGammaLutRGBIndoor[0] //[19] //                                                      
+{ 0x0F12, 0x0000  }, //  saRR_usDualGammaLutRGBIndoor[1] //[0] //                                                       
+{ 0x0F12, 0x0008  }, //  saRR_usDualGammaLutRGBIndoor[1] //[1] //                                                       
+{ 0x0F12, 0x0013  }, //  saRR_usDualGammaLutRGBIndoor[1] //[2] //                                                       
+{ 0x0F12, 0x002C  }, //  saRR_usDualGammaLutRGBIndoor[1] //[3] //                                                       
+{ 0x0F12, 0x0062  }, //  saRR_usDualGammaLutRGBIndoor[1] //[4] //                                                       
+{ 0x0F12, 0x00CD  }, //  saRR_usDualGammaLutRGBIndoor[1] //[5] //                                                       
+{ 0x0F12, 0x0129  }, //  saRR_usDualGammaLutRGBIndoor[1] //[6] //                                                       
+{ 0x0F12, 0x0151  }, //  saRR_usDualGammaLutRGBIndoor[1] //[7] //                                                       
+{ 0x0F12, 0x0174  }, //  saRR_usDualGammaLutRGBIndoor[1] //[8] //                                                       
+{ 0x0F12, 0x01AA  }, //  saRR_usDualGammaLutRGBIndoor[1] //[9] //                                                       
+{ 0x0F12, 0x01D7  }, //  saRR_usDualGammaLutRGBIndoor[1] //[10] //                                                      
+{ 0x0F12, 0x01FE  }, //  saRR_usDualGammaLutRGBIndoor[1] //[11] //                                                      
+{ 0x0F12, 0x0221  }, //  saRR_usDualGammaLutRGBIndoor[1] //[12] //                                                      
+{ 0x0F12, 0x025D  }, //  saRR_usDualGammaLutRGBIndoor[1] //[13] //                                                      
+{ 0x0F12, 0x0291  }, //  saRR_usDualGammaLutRGBIndoor[1] //[14] //                                                      
+{ 0x0F12, 0x02EB  }, //  saRR_usDualGammaLutRGBIndoor[1] //[15] //                                                      
+{ 0x0F12, 0x033A  }, //  saRR_usDualGammaLutRGBIndoor[1] //[16] //                                                      
+{ 0x0F12, 0x0380  }, //  saRR_usDualGammaLutRGBIndoor[1] //[17] //                                                      
+{ 0x0F12, 0x03C2  }, //  saRR_usDualGammaLutRGBIndoor[1] //[18] //                                                      
+{ 0x0F12, 0x03FF  }, //  saRR_usDualGammaLutRGBIndoor[1] //[19] //                                                      
+{ 0x0F12, 0x0000  }, //  saRR_usDualGammaLutRGBIndoor[2] //[0] //                                                       
+{ 0x0F12, 0x0008  }, //  saRR_usDualGammaLutRGBIndoor[2] //[1] //                                                       
+{ 0x0F12, 0x0013  }, //  saRR_usDualGammaLutRGBIndoor[2] //[2] //                                                       
+{ 0x0F12, 0x002C  }, //  saRR_usDualGammaLutRGBIndoor[2] //[3] //                                                       
+{ 0x0F12, 0x0062  }, //  saRR_usDualGammaLutRGBIndoor[2] //[4] //                                                       
+{ 0x0F12, 0x00CD  }, //  saRR_usDualGammaLutRGBIndoor[2] //[5] //                                                       
+{ 0x0F12, 0x0129  }, //  saRR_usDualGammaLutRGBIndoor[2] //[6] //                                                       
+{ 0x0F12, 0x0151  }, //  saRR_usDualGammaLutRGBIndoor[2] //[7] //                                                       
+{ 0x0F12, 0x0174  }, //  saRR_usDualGammaLutRGBIndoor[2] //[8] //                                                       
+{ 0x0F12, 0x01AA  }, //  saRR_usDualGammaLutRGBIndoor[2] //[9] //                                                       
+{ 0x0F12, 0x01D7  }, //  saRR_usDualGammaLutRGBIndoor[2] //[10] //                                                      
+{ 0x0F12, 0x01FE  }, //  saRR_usDualGammaLutRGBIndoor[2] //[11] //                                                      
+{ 0x0F12, 0x0221  }, //  saRR_usDualGammaLutRGBIndoor[2] //[12] //                                                      
+{ 0x0F12, 0x025D  }, //  saRR_usDualGammaLutRGBIndoor[2] //[13] //                                                      
+{ 0x0F12, 0x0291  }, //  saRR_usDualGammaLutRGBIndoor[2] //[14] //                                                      
+{ 0x0F12, 0x02EB  }, //  saRR_usDualGammaLutRGBIndoor[2] //[15] //                                                      
+{ 0x0F12, 0x033A  }, //  saRR_usDualGammaLutRGBIndoor[2] //[16] //                                                      
+{ 0x0F12, 0x0380  }, //  saRR_usDualGammaLutRGBIndoor[2] //[17] //                                                      
+{ 0x0F12, 0x03C2  }, //  saRR_usDualGammaLutRGBIndoor[2] //[18] //                                                      
+{ 0x0F12, 0x03FF  }, //  saRR_usDualGammaLutRGBIndoor[2] //[19] //                                                      
+                                               
+                                               
+{ 0x0F12, 0x0000  },	//			saRR_usDualGammaLutRGBOutdoor[0] //[0] //
+{ 0x0F12, 0x0008  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[1] //                                                
+{ 0x0F12, 0x0013  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[2] //                                                
+{ 0x0F12, 0x002C  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[3] //                                                
+{ 0x0F12, 0x0062  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[4] //                                                
+{ 0x0F12, 0x00CD  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[5] //                                                
+{ 0x0F12, 0x0129  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[6] //                                                
+{ 0x0F12, 0x0151  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[7] //                                                
+{ 0x0F12, 0x0174  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[8] //                                                
+{ 0x0F12, 0x01AA  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[9] //                                                
+{ 0x0F12, 0x01D7  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[10] //                                               
+{ 0x0F12, 0x01FE  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[11] //                                               
+{ 0x0F12, 0x0221  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[12] //                                               
+{ 0x0F12, 0x025D  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[13] //                                               
+{ 0x0F12, 0x0291  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[14] //                                               
+{ 0x0F12, 0x02EB  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[15] //                                               
+{ 0x0F12, 0x033A  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[16] //                                               
+{ 0x0F12, 0x0380  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[17] //                                               
+{ 0x0F12, 0x03C2  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[18] //                                               
+{ 0x0F12, 0x03FF  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[19] //                                               
+{ 0x0F12, 0x0000  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[0] //                                                
+{ 0x0F12, 0x0008  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[1] //                                                
+{ 0x0F12, 0x0013  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[2] //                                                
+{ 0x0F12, 0x002C  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[3] //                                                
+{ 0x0F12, 0x0062  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[4] //                                                
+{ 0x0F12, 0x00CD  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[5] //                                                
+{ 0x0F12, 0x0129  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[6] //                                                
+{ 0x0F12, 0x0151  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[7] //                                                
+{ 0x0F12, 0x0174  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[8] //                                                
+{ 0x0F12, 0x01AA  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[9] //                                                
+{ 0x0F12, 0x01D7  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[10] //                                               
+{ 0x0F12, 0x01FE  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[11] //                                               
+{ 0x0F12, 0x0221  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[12] //                                               
+{ 0x0F12, 0x025D  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[13] //                                               
+{ 0x0F12, 0x0291  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[14] //                                               
+{ 0x0F12, 0x02EB  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[15] //                                               
+{ 0x0F12, 0x033A  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[16] //                                               
+{ 0x0F12, 0x0380  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[17] //                                               
+{ 0x0F12, 0x03C2  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[18] //                                               
+{ 0x0F12, 0x03FF  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[19] //                                               
+{ 0x0F12, 0x0000  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[0] //                                                
+{ 0x0F12, 0x0008  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[1] //                                                
+{ 0x0F12, 0x0013  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[2] //                                                
+{ 0x0F12, 0x002C  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[3] //                                                
+{ 0x0F12, 0x0062  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[4] //                                                
+{ 0x0F12, 0x00CD  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[5] //                                                
+{ 0x0F12, 0x0129  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[6] //                                                
+{ 0x0F12, 0x0151  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[7] //                                                
+{ 0x0F12, 0x0174  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[8] //                                                
+{ 0x0F12, 0x01AA  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[9] //                                                
+{ 0x0F12, 0x01D7  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[10] //                                               
+{ 0x0F12, 0x01FE  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[11] //                                               
+{ 0x0F12, 0x0221  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[12] //                                               
+{ 0x0F12, 0x025D  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[13] //                                               
+{ 0x0F12, 0x0291  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[14] //                                               
+{ 0x0F12, 0x02EB  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[15] //                                               
+{ 0x0F12, 0x033A  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[16] //                                               
+{ 0x0F12, 0x0380  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[17] //                                               
+{ 0x0F12, 0x03C2  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[18] //                                               
+{ 0x0F12, 0x03FF  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[19] //                                               
+                                               
+                                               
+{ 0x002A, 0x06A6  },                           
+{ 0x0F12, 0x00C0  },	//saRR_AwbCcmCord[0] //                      
+{ 0x0F12, 0x00E0  },	//saRR_AwbCcmCord[1] //                      
+{ 0x0F12, 0x0110  },	//saRR_AwbCcmCord[2] //                      
+{ 0x0F12, 0x0139  },	//saRR_AwbCcmCord[3] //                      
+{ 0x0F12, 0x0166  },	//saRR_AwbCcmCord[4] //                      
+{ 0x0F12, 0x019F  },	//saRR_AwbCcmCord[5] //                      
+                        
+{ 0x002A, 0x33A4  },    
+{ 0x0F12, 0x0181  },	  //TVAR_wbt_pBaseCcmS[0] //                                                           
+{ 0x0F12, 0xFF88  },   //TVAR_wbt_pBaseCcmS[1] //                                                        
+{ 0x0F12, 0xFF90  },   //TVAR_wbt_pBaseCcmS[2] //                                                        
+{ 0x0F12, 0xFE6B  },   //TVAR_wbt_pBaseCcmS[3] //                                                        
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[4] //                                                        
+{ 0x0F12, 0xFF0B  },   //TVAR_wbt_pBaseCcmS[5] //                                                        
+{ 0x0F12, 0xFFDD  },   //TVAR_wbt_pBaseCcmS[6] //                                                        
+{ 0x0F12, 0xFFEE  },   //TVAR_wbt_pBaseCcmS[7] //                                                        
+{ 0x0F12, 0x01CB  },   //TVAR_wbt_pBaseCcmS[8] //                                                        
+{ 0x0F12, 0x0187  },   //TVAR_wbt_pBaseCcmS[9] //                                                        
+{ 0x0F12, 0x00A6  },   //TVAR_wbt_pBaseCcmS[10] //                                                       
+{ 0x0F12, 0xFEBE  },   //TVAR_wbt_pBaseCcmS[11] //                                                       
+{ 0x0F12, 0x021C  },   //TVAR_wbt_pBaseCcmS[12] //                                                       
+{ 0x0F12, 0xFF5F  },   //TVAR_wbt_pBaseCcmS[13] //                                                       
+{ 0x0F12, 0x0175  },   //TVAR_wbt_pBaseCcmS[14] //                                                       
+{ 0x0F12, 0xFEE7  },   //TVAR_wbt_pBaseCcmS[15] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[16] //                                                       
+{ 0x0F12, 0x00F3  },   //TVAR_wbt_pBaseCcmS[17] //                                                       
+                       
+{ 0x0F12, 0x0181  },   //TVAR_wbt_pBaseCcmS[18] //                                                       
+{ 0x0F12, 0xFF88  },   //TVAR_wbt_pBaseCcmS[19] //                                                       
+{ 0x0F12, 0xFF90  },   //TVAR_wbt_pBaseCcmS[20] //                                                       
+{ 0x0F12, 0xFE6B  },   //TVAR_wbt_pBaseCcmS[21] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[22] //                                                       
+{ 0x0F12, 0xFF0B  },   //TVAR_wbt_pBaseCcmS[23] //                                                       
+{ 0x0F12, 0xFFDD  },   //TVAR_wbt_pBaseCcmS[24] //                                                       
+{ 0x0F12, 0xFFEE  },   //TVAR_wbt_pBaseCcmS[25] //                                                       
+{ 0x0F12, 0x01CB  },   //TVAR_wbt_pBaseCcmS[26] //                                                       
+{ 0x0F12, 0x0187  },   //TVAR_wbt_pBaseCcmS[27] //                                                       
+{ 0x0F12, 0x00A6  },   //TVAR_wbt_pBaseCcmS[28] //                                                       
+{ 0x0F12, 0xFEBE  },   //TVAR_wbt_pBaseCcmS[29] //                                                       
+{ 0x0F12, 0x021C  },   //TVAR_wbt_pBaseCcmS[30] //                                                       
+{ 0x0F12, 0xFF5F  },   //TVAR_wbt_pBaseCcmS[31] //                                                       
+{ 0x0F12, 0x0175  },   //TVAR_wbt_pBaseCcmS[32] //                                                       
+{ 0x0F12, 0xFEE7  },   //TVAR_wbt_pBaseCcmS[33] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[34] //                                                       
+{ 0x0F12, 0x00F3  },   //TVAR_wbt_pBaseCcmS[35] //                                                       
+                       
+{ 0x0F12, 0x0181  },   //TVAR_wbt_pBaseCcmS[36] //                                                       
+{ 0x0F12, 0xFF88  },   //TVAR_wbt_pBaseCcmS[37] //                                                       
+{ 0x0F12, 0xFF90  },   //TVAR_wbt_pBaseCcmS[38] //                                                       
+{ 0x0F12, 0xFE6B  },   //TVAR_wbt_pBaseCcmS[39] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[40] //                                                       
+{ 0x0F12, 0xFF0B  },   //TVAR_wbt_pBaseCcmS[41] //                                                       
+{ 0x0F12, 0xFFDD  },   //TVAR_wbt_pBaseCcmS[42] //                                                       
+{ 0x0F12, 0xFFEE  },   //TVAR_wbt_pBaseCcmS[43] //                                                       
+{ 0x0F12, 0x01CB  },   //TVAR_wbt_pBaseCcmS[44] //                                                       
+{ 0x0F12, 0x0187  },   //TVAR_wbt_pBaseCcmS[45] //                                                       
+{ 0x0F12, 0x00A6  },   //TVAR_wbt_pBaseCcmS[46] //                                                       
+{ 0x0F12, 0xFEBE  },   //TVAR_wbt_pBaseCcmS[47] //                                                       
+{ 0x0F12, 0x021C  },   //TVAR_wbt_pBaseCcmS[48] //                                                       
+{ 0x0F12, 0xFF5F  },   //TVAR_wbt_pBaseCcmS[49] //                                                       
+{ 0x0F12, 0x0175  },   //TVAR_wbt_pBaseCcmS[50] //                                                       
+{ 0x0F12, 0xFEE7  },   //TVAR_wbt_pBaseCcmS[51] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[52] //                                                       
+{ 0x0F12, 0x00F3  },   //TVAR_wbt_pBaseCcmS[53] //                                                                        
+                       
+{ 0x0F12, 0x01D4  },  //01E9 01FD 01FA   //TVAR_wbt_pBaseCcmS[54] //                                                       
+{ 0x0F12, 0xFFC3  },  //FFB7 FFAB FF9B   //TVAR_wbt_pBaseCcmS[55] //                                                       
+{ 0x0F12, 0xFFFE  },  //FFF5 FFED FFFF   //TVAR_wbt_pBaseCcmS[56] //                                                       
+{ 0x0F12, 0xFEB5  },  //FEB5 FEB5 FE9F   //TVAR_wbt_pBaseCcmS[57] //                                                       
+{ 0x0F12, 0x0112  },  //0112 0112 010F   //TVAR_wbt_pBaseCcmS[58] //                                                       
+{ 0x0F12, 0xFEDC  },  //FEDC FEDC FEF5   //TVAR_wbt_pBaseCcmS[59] //                                                       
+{ 0x0F12, 0xFFD2  },  //FFD2 FFD2 FFD2   //TVAR_wbt_pBaseCcmS[60] //                                                       
+{ 0x0F12, 0x0015  },  //0015 0015 0015   //TVAR_wbt_pBaseCcmS[61] //                                                       
+{ 0x0F12, 0x01A1  },  //01A1 01A1 01A1   //TVAR_wbt_pBaseCcmS[62] //                                                       
+{ 0x0F12, 0x0111  },  //0111 0111 0111   //TVAR_wbt_pBaseCcmS[63] //                                                       
+{ 0x0F12, 0x009D  },  //009D 009D 009D   //TVAR_wbt_pBaseCcmS[64] //                                                       
+{ 0x0F12, 0xFECB  },  //FECB FECB FECB   //TVAR_wbt_pBaseCcmS[65] //                                                       
+{ 0x0F12, 0x01FC  },  //01FC 01FC 01FC   //TVAR_wbt_pBaseCcmS[66] //                                                       
+{ 0x0F12, 0xFF99  },  //FF99 FF99 FF99   //TVAR_wbt_pBaseCcmS[67] //                                                       
+{ 0x0F12, 0x01A9  },  //01A9 01A9 01A9   //TVAR_wbt_pBaseCcmS[68] //                                                       
+{ 0x0F12, 0xFF26  },  //FF26 FF26 FF26   //TVAR_wbt_pBaseCcmS[69] //                                                       
+{ 0x0F12, 0x012B  },  //012B 012B 012B   //TVAR_wbt_pBaseCcmS[70] //                                                       
+{ 0x0F12, 0x00DF  },  //00DF 00DF 00DF   //TVAR_wbt_pBaseCcmS[71] //    
+                           
+{ 0x0F12, 0x01B9  },  //01CE 01E3 01E2   //TVAR_wbt_pBaseCcmS[72] //                                                 
+{ 0x0F12, 0xFFBC  },  //FFB0 FFA4 FF9A   //TVAR_wbt_pBaseCcmS[73] //                                                 
+{ 0x0F12, 0xFFED  },  //FFE4 FFDB FFE7   //TVAR_wbt_pBaseCcmS[74] //                                                 
+{ 0x0F12, 0xFEB5  },  //FEB5 FEB5 FE9F   //TVAR_wbt_pBaseCcmS[75] //                                                 
+{ 0x0F12, 0x0112  },  //0112 0112 010F   //TVAR_wbt_pBaseCcmS[76] //                                                 
+{ 0x0F12, 0xFEDC  },  //FEDC FEDC FEF5   //TVAR_wbt_pBaseCcmS[77] //                                                 
+{ 0x0F12, 0xFFD2  },  //FFD2 FFD2 FFD2   //TVAR_wbt_pBaseCcmS[78] //                                                 
+{ 0x0F12, 0xFFFE  },  //FFFE FFFE FFFE   //TVAR_wbt_pBaseCcmS[79] //                                                 
+{ 0x0F12, 0x01B7  },  //01B7 01B7 01B7   //TVAR_wbt_pBaseCcmS[80] //                                                 
+{ 0x0F12, 0x00E8  },  //00E8 00E8 00E8   //TVAR_wbt_pBaseCcmS[81] //                                                 
+{ 0x0F12, 0x0095  },  //0095 0095 0095   //TVAR_wbt_pBaseCcmS[82] //                                                 
+{ 0x0F12, 0xFF0D  },  //FF0D FF0D FF0D   //TVAR_wbt_pBaseCcmS[83] //                                                 
+{ 0x0F12, 0x0182  },  //0182 0182 0182   //TVAR_wbt_pBaseCcmS[84] //                                                 
+{ 0x0F12, 0xFF29  },  //FF29 FF29 FF29   //TVAR_wbt_pBaseCcmS[85] //                                                 
+{ 0x0F12, 0x0146  },  //0146 0146 0146   //TVAR_wbt_pBaseCcmS[86] //                                                 
+{ 0x0F12, 0xFF26  },  //FF26 FF26 FF26   //TVAR_wbt_pBaseCcmS[87] //                                                 
+{ 0x0F12, 0x012B  },  //012B 012B 012B   //TVAR_wbt_pBaseCcmS[88] //                                                 
+{ 0x0F12, 0x00DF  },  //00DF 00DF 00DF   //TVAR_wbt_pBaseCcmS[89] //                                                                         
+                  
+{ 0x0F12, 0x01B9  },  //01CE 01E3 01E2   //TVAR_wbt_pBaseCcmS[90] //                                                 
+{ 0x0F12, 0xFFBC  },  //FFB0 FFA4 FF9A   //TVAR_wbt_pBaseCcmS[91] //                                                 
+{ 0x0F12, 0xFFED  },  //FFE4 FFDB FFE7   //TVAR_wbt_pBaseCcmS[92] //                                                 
+{ 0x0F12, 0xFEB5  },  //FEB5 FEB5 FE9F   //TVAR_wbt_pBaseCcmS[93] //                                                 
+{ 0x0F12, 0x0112  },  //0112 0112 010F   //TVAR_wbt_pBaseCcmS[94] //                                                 
+{ 0x0F12, 0xFEDC  },  //FEDC FEDC FEF5   //TVAR_wbt_pBaseCcmS[95] //                                                 
+{ 0x0F12, 0xFFD2  },  //FFD2 FFD2 FFD2   //TVAR_wbt_pBaseCcmS[96] //                                                 
+{ 0x0F12, 0xFFFE  },  //FFFE FFFE FFFE   //TVAR_wbt_pBaseCcmS[97] //                                                 
+{ 0x0F12, 0x01B7  },  //01B7 01B7 01B7   //TVAR_wbt_pBaseCcmS[98] //                                                 
+{ 0x0F12, 0x00E8  },  //00E8 00E8 00E8   //TVAR_wbt_pBaseCcmS[99] //                                                 
+{ 0x0F12, 0x0095  },  //0095 0095 0095   //TVAR_wbt_pBaseCcmS[100] //                                                
+{ 0x0F12, 0xFF0D  },  //FF0D FF0D FF0D   //TVAR_wbt_pBaseCcmS[101] //                                                
+{ 0x0F12, 0x0182  },  //0182 0182 0182   //TVAR_wbt_pBaseCcmS[102] //                                                
+{ 0x0F12, 0xFF29  },  //FF29 FF29 FF29   //TVAR_wbt_pBaseCcmS[103] //                                                
+{ 0x0F12, 0x0146  },  //0146 0146 0146   //TVAR_wbt_pBaseCcmS[104] //                                                
+{ 0x0F12, 0xFF26  },  //FF26 FF26 FF26   //TVAR_wbt_pBaseCcmS[105] //                                                
+{ 0x0F12, 0x012B  },  //012B 012B 012B   //TVAR_wbt_pBaseCcmS[106] //                                                
+{ 0x0F12, 0x00DF  },  //00DF 00DF 00DF   //TVAR_wbt_pBaseCcmS[107] //                                                
+                                          
+{ 0x002A, 0x3380  },  //12çŸ«å¼¥åˆ©     
+{ 0x0F12, 0x01E5  },  //01E5 020E 0223   //0223  //01F3  //01F3  //TVAR_wbt_pOutdoorCcm[0] //  
+{ 0x0F12, 0xFFA0  },  //FFA0 FF88 FF7C   //FF7C  //FFA4  //FFA4  //TVAR_wbt_pOutdoorCcm[1] //  
+{ 0x0F12, 0xFFDF  },  //FFDF FFCE FFC5   //FFC5  //FFE4  //FFE4  //TVAR_wbt_pOutdoorCcm[2] //  
+{ 0x0F12, 0xFE3D  },  //FE3D FE3D FE3D   //FE3D  //FE3D  //FE23  //TVAR_wbt_pOutdoorCcm[3] //  
+{ 0x0F12, 0x0158  },  //0158 0158 0158   //0158  //0158  //017D  //TVAR_wbt_pOutdoorCcm[4] //  
+{ 0x0F12, 0xFF03  },  //FF03 FF03 FF03   //FF03  //FF03  //FEF9  //TVAR_wbt_pOutdoorCcm[5] //  
+{ 0x0F12, 0xFFD2  },  //FFBB FF99 FF9F   //FF9F  //FF9F  //FF9F  //TVAR_wbt_pOutdoorCcm[6] //  
+{ 0x0F12, 0x0002  },  //FFF0 0018 0011   //0011  //0011  //0011  //TVAR_wbt_pOutdoorCcm[7] //  
+{ 0x0F12, 0x0211  },  //023A 0235 0237   //0237  //0237  //0237  //TVAR_wbt_pOutdoorCcm[8] //  
+{ 0x0F12, 0x00F6  },  //00EB 0101 00EB   //00D1  //012A  //0143  //TVAR_wbt_pOutdoorCcm[9] //  
+{ 0x0F12, 0x0120  },  //012A 0116 012A   //0125  //00CA  //00F6  //TVAR_wbt_pOutdoorCcm[10] // 
+{ 0x0F12, 0xFF01  },  //FF02 FF00 FF02   //FEF5  //FEF6  //FEB1  //TVAR_wbt_pOutdoorCcm[11] // 
+{ 0x0F12, 0x01A4  },  //01A4 01C5 01C5   //01C5  //01C5  //01C5  //TVAR_wbt_pOutdoorCcm[12] // 
+{ 0x0F12, 0xFF95  },  //FF95 FF80 FF80   //FF80  //FF80  //FF80  //TVAR_wbt_pOutdoorCcm[13] // 
+{ 0x0F12, 0x01A9  },  //01A9 019D 019D   //019D  //019D  //019D  //TVAR_wbt_pOutdoorCcm[14] // 
+{ 0x0F12, 0xFEA3  },  //FE7A FE7A FE7A   //FE7A  //FE7A  //FE7A  //TVAR_wbt_pOutdoorCcm[15] // 
+{ 0x0F12, 0x0164  },  //0179 0179 0179   //0179  //0179  //0179  //TVAR_wbt_pOutdoorCcm[16] // 
+{ 0x0F12, 0x0164  },  //0179 0179 0179   //0179  //0179  //0179  //TVAR_wbt_pOutdoorCcm[17] // 
+                      
+                           
+                           
+{ 0x002A, 0x0764  },       
+{ 0x0F12, 0x0049  },	//afit_uNoiseIndInDoor[0] //                                                                         
+{ 0x0F12, 0x005F  },	//afit_uNoiseIndInDoor[1] //                                                                         
+{ 0x0F12, 0x00CB  },	//afit_uNoiseIndInDoor[2] // 203//                                                                   
+{ 0x0F12, 0x01E0  },	//afit_uNoiseIndInDoor[3] // Indoor_NB below 1500 _Noise index 300-400d //                           
+{ 0x0F12, 0x0220  },	//afit_uNoiseIndInDoor[4] // DNP NB 4600 _ Noisenidex :560d-230h //                                  
+                           
+                           
+{ 0x002A, 0x07C4  },       
+{ 0x0F12, 0x0014  },	//700007C4 //TVAR_afit_pBaseValS[0] // AFIT16_BRIGHTNESS                                                                                  
+{ 0x0F12, 0x0000  },	//700007C6 //TVAR_afit_pBaseValS[1] // AFIT16_CONTRAST                                                                                    
+{ 0x0F12, 0x0014  },	//700007C8 //TVAR_afit_pBaseValS[2] // AFIT16_SATURATION                                                                                  
+{ 0x0F12, 0x0000  },	//700007CA //TVAR_afit_pBaseValS[3] // AFIT16_SHARP_BLUR                                                                                  
+{ 0x0F12, 0x0000  },	//700007CC //TVAR_afit_pBaseValS[4] // AFIT16_GLAMOUR                                                                                     
+{ 0x0F12, 0x00C1  },	//700007CE //TVAR_afit_pBaseValS[5] // AFIT16_sddd8a_edge_high                                                                            
+{ 0x0F12, 0x03FF  },	//700007D0 //TVAR_afit_pBaseValS[6] // AFIT16_Demosaicing_iSatVal                                                                         
+{ 0x0F12, 0x009C  },	//700007D2 //TVAR_afit_pBaseValS[7] // AFIT16_Sharpening_iReduceEdgeThresh                                                                
+{ 0x0F12, 0x0251  },	//700007D4 //TVAR_afit_pBaseValS[8] // AFIT16_demsharpmix1_iRGBOffset                                                                     
+{ 0x0F12, 0x03FF  },	//700007D6 //TVAR_afit_pBaseValS[9] // AFIT16_demsharpmix1_iDemClamp                                                                      
+{ 0x0F12, 0x000C  },	//700007D8 //TVAR_afit_pBaseValS[10] //AFIT16_demsharpmix1_iLowThreshold                                                                  
+{ 0x0F12, 0x0010  },	//700007DA //TVAR_afit_pBaseValS[11] //AFIT16_demsharpmix1_iHighThreshold                                                                 
+{ 0x0F12, 0x012C  },	//700007DC //TVAR_afit_pBaseValS[12] //AFIT16_demsharpmix1_iLowBright                                                                     
+{ 0x0F12, 0x03E8  },	//700007DE //TVAR_afit_pBaseValS[13] //AFIT16_demsharpmix1_iHighBright                                                                    
+{ 0x0F12, 0x0046  },	//700007E0 //TVAR_afit_pBaseValS[14] //AFIT16_demsharpmix1_iLowSat                                                                        
+{ 0x0F12, 0x005A  },	//700007E2 //TVAR_afit_pBaseValS[15] //AFIT16_demsharpmix1_iHighSat                                                                       
+{ 0x0F12, 0x0070  },	//700007E4 //TVAR_afit_pBaseValS[16] //AFIT16_demsharpmix1_iTune                                                                          
+{ 0x0F12, 0x0000  },	//700007E6 //TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0000  },	//700007E8 //TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh                                                                    
+{ 0x0F12, 0x01AA  },	//700007EA //TVAR_afit_pBaseValS[19] //AFIT16_demsharpmix1_iHystCenter                                                                    
+{ 0x0F12, 0x003C  },	//700007EC //TVAR_afit_pBaseValS[20] //AFIT16_YUV422_DENOISE_iUVLowThresh                                                                 
+{ 0x0F12, 0x003C  },	//700007EE //TVAR_afit_pBaseValS[21] //AFIT16_YUV422_DENOISE_iUVHighThresh                                                                
+{ 0x0F12, 0x0000  },	//700007F0 //TVAR_afit_pBaseValS[22] //AFIT16_YUV422_DENOISE_iYLowThresh                                                                  
+{ 0x0F12, 0x0000  },	//700007F2 //TVAR_afit_pBaseValS[23] //AFIT16_YUV422_DENOISE_iYHighThresh                                                                 
+{ 0x0F12, 0x003E  },	//700007F4 //TVAR_afit_pBaseValS[24] //AFIT16_Sharpening_iLowSharpClamp                                                                   
+{ 0x0F12, 0x0008  },	//700007F6 //TVAR_afit_pBaseValS[25] //AFIT16_Sharpening_iHighSharpClamp                                                                  
+{ 0x0F12, 0x003C  },	//700007F8 //TVAR_afit_pBaseValS[26] //AFIT16_Sharpening_iLowSharpClamp_Bin                                                               
+{ 0x0F12, 0x001E  },	//700007FA //TVAR_afit_pBaseValS[27] //AFIT16_Sharpening_iHighSharpClamp_Bin                                                              
+{ 0x0F12, 0x003C  },	//700007FC //TVAR_afit_pBaseValS[28] //AFIT16_Sharpening_iLowSharpClamp_sBin                                                              
+{ 0x0F12, 0x001E  },	//700007FE //TVAR_afit_pBaseValS[29] //AFIT16_Sharpening_iHighSharpClamp_sBin                                                             
+{ 0x0F12, 0x0A24  },	//70000800 //TVAR_afit_pBaseValS[30] //AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                     
+{ 0x0F12, 0x1701  },	//70000802 //TVAR_afit_pBaseValS[31] //AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                      
+{ 0x0F12, 0x0229  },	//70000804 //TVAR_afit_pBaseValS[32] //AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                            
+{ 0x0F12, 0x1403  },	//70000806 //TVAR_afit_pBaseValS[33] //AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                 
+{ 0x0F12, 0x0000  },	//70000808 //TVAR_afit_pBaseValS[34] //AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                               
+{ 0x0F12, 0x0000  },	//7000080A //TVAR_afit_pBaseValS[35] //AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                             
+{ 0x0F12, 0x0000  },	//7000080C //TVAR_afit_pBaseValS[36] //AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                              
+{ 0x0F12, 0x00FF  },	//7000080E //TVAR_afit_pBaseValS[37] //AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                       
+{ 0x0F12, 0x045A  },	//70000810 //TVAR_afit_pBaseValS[38] //AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                                
+{ 0x0F12, 0x1414  },	//70000812 //TVAR_afit_pBaseValS[39] //AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                  
+{ 0x0F12, 0x0301  },	//70000814 //TVAR_afit_pBaseValS[40] //AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                          
+{ 0x0F12, 0xFF07  },	//70000816 //TVAR_afit_pBaseValS[41] //AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                          
+{ 0x0F12, 0x081E  },	//70000818 //TVAR_afit_pBaseValS[42] //AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                     
+{ 0x0F12, 0x0A14  },	//7000081A //TVAR_afit_pBaseValS[43] //AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                        
+{ 0x0F12, 0x0F0F  },	//7000081C //TVAR_afit_pBaseValS[44] //AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                    
+{ 0x0F12, 0x0A00  },	//7000081E //TVAR_afit_pBaseValS[45] //AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                 
+{ 0x0F12, 0x0032  },	//70000820 //TVAR_afit_pBaseValS[46] //AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                             
+{ 0x0F12, 0x000E  },	//70000822 //TVAR_afit_pBaseValS[47] //AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                             
+{ 0x0F12, 0x0002  },	//70000824 //TVAR_afit_pBaseValS[48] //AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                      
+{ 0x0F12, 0x00FF  },	//70000826 //TVAR_afit_pBaseValS[49] //AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                     
+{ 0x0F12, 0x1102  },	//70000828 //TVAR_afit_pBaseValS[50] //AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                          
+{ 0x0F12, 0x001B  },	//7000082A //TVAR_afit_pBaseValS[51] //AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                            
+{ 0x0F12, 0x0900  },	//7000082C //TVAR_afit_pBaseValS[52] //AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                       
+{ 0x0F12, 0x0600  },	//7000082E //TVAR_afit_pBaseValS[53] //AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                      
+{ 0x0F12, 0x0504  },	//70000830 //TVAR_afit_pBaseValS[54] //AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                   
+{ 0x0F12, 0x0306  },	//70000832 //TVAR_afit_pBaseValS[55] //AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                      
+{ 0x0F12, 0x4603  },	//70000834 //TVAR_afit_pBaseValS[56] //AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                       
+{ 0x0F12, 0x0480  },	//70000836 //TVAR_afit_pBaseValS[57] //AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                              
+{ 0x0F12, 0x003C  },	//70000838 //TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                  
+{ 0x0F12, 0x0080  },	//7000083A //TVAR_afit_pBaseValS[59] //AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                   
+{ 0x0F12, 0x0101  },	//7000083C //TVAR_afit_pBaseValS[60] //AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                             
+{ 0x0F12, 0x0707  },	//7000083E //TVAR_afit_pBaseValS[61] //AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                                
+{ 0x0F12, 0x4601  },	//70000840 //TVAR_afit_pBaseValS[62] //AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                 
+{ 0x0F12, 0x4944  },	//70000842 //TVAR_afit_pBaseValS[63] //AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                                
+{ 0x0F12, 0x5044  },	//70000844 //TVAR_afit_pBaseValS[64] //AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                            
+{ 0x0F12, 0x0500  },	//70000846 //TVAR_afit_pBaseValS[65] //AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]             
+{ 0x0F12, 0x0003  },	//70000848 //TVAR_afit_pBaseValS[66] //AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                   
+{ 0x0F12, 0x5400  },	//7000084A //TVAR_afit_pBaseValS[67] //AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                 
+{ 0x0F12, 0x0714  },	//7000084C //TVAR_afit_pBaseValS[68] //AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]           
+{ 0x0F12, 0x32FF  },	//7000084E //TVAR_afit_pBaseValS[69] //AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                        
+{ 0x0F12, 0x5A04  },	//70000850 //TVAR_afit_pBaseValS[70] //AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                     
+{ 0x0F12, 0x201E  },	//70000852 //TVAR_afit_pBaseValS[71] //AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                     
+{ 0x0F12, 0x4012  },	//70000854 //TVAR_afit_pBaseValS[72] //AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]                
+{ 0x0F12, 0x0204  },	//70000856 //TVAR_afit_pBaseValS[73] //AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]                
+{ 0x0F12, 0x1403  },	//70000858 //TVAR_afit_pBaseValS[74] //AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                  
+{ 0x0F12, 0x0114  },	//7000085A //TVAR_afit_pBaseValS[75] //AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                      
+{ 0x0F12, 0x0101  },	//7000085C //TVAR_afit_pBaseValS[76] //AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                       
+{ 0x0F12, 0x4446  },	//7000085E //TVAR_afit_pBaseValS[77] //AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                           
+{ 0x0F12, 0x646E  },	//70000860 //TVAR_afit_pBaseValS[78] //AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                     
+{ 0x0F12, 0x0028  },	//70000862 //TVAR_afit_pBaseValS[79] //AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]             
+{ 0x0F12, 0x030A  },	//70000864 //TVAR_afit_pBaseValS[80] //AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]       
+{ 0x0F12, 0x0000  },	//70000866 //TVAR_afit_pBaseValS[81] //AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]          
+{ 0x0F12, 0x141E  },	//70000868 //TVAR_afit_pBaseValS[82] //AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]          
+{ 0x0F12, 0xFF07  },	//7000086A //TVAR_afit_pBaseValS[83] //AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]       
+{ 0x0F12, 0x0432  },	//7000086C //TVAR_afit_pBaseValS[84] //AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]              
+{ 0x0F12, 0x0000  },	//7000086E //TVAR_afit_pBaseValS[85] //AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]            
+{ 0x0F12, 0x0F0F  },	//70000870 //TVAR_afit_pBaseValS[86] //AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]              
+{ 0x0F12, 0x0440  },	//70000872 //TVAR_afit_pBaseValS[87] //AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]       
+{ 0x0F12, 0x0302  },	//70000874 //TVAR_afit_pBaseValS[88] //AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]       
+{ 0x0F12, 0x1414  },	//70000876 //TVAR_afit_pBaseValS[89] //AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                   
+{ 0x0F12, 0x0101  },	//70000878 //TVAR_afit_pBaseValS[90] //AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                      
+{ 0x0F12, 0x4601  },	//7000087A //TVAR_afit_pBaseValS[91] //AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                       
+{ 0x0F12, 0x6E44  },	//7000087C //TVAR_afit_pBaseValS[92] //AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                      
+{ 0x0F12, 0x2864  },	//7000087E //TVAR_afit_pBaseValS[93] //AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                  
+{ 0x0F12, 0x0A00  },	//70000880 //TVAR_afit_pBaseValS[94] //AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]    
+{ 0x0F12, 0x0003  },	//70000882 //TVAR_afit_pBaseValS[95] //AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]        
+{ 0x0F12, 0x1E00  },	//70000884 //TVAR_afit_pBaseValS[96] //AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]       
+{ 0x0F12, 0x0714  },	//70000886 //TVAR_afit_pBaseValS[97] //AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8]  
+{ 0x0F12, 0x32FF  },	//70000888 //TVAR_afit_pBaseValS[98] //AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]              
+{ 0x0F12, 0x0004  },	//7000088A //TVAR_afit_pBaseValS[99] //AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]           
+{ 0x0F12, 0x0F00  },	//7000088C //TVAR_afit_pBaseValS[100] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x400F  },	//7000088E //TVAR_afit_pBaseValS[101] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000890 //TVAR_afit_pBaseValS[102] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000892 //TVAR_afit_pBaseValS[103] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000894 //TVAR_afit_pBaseValS[104] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000896 //TVAR_afit_pBaseValS[105] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0014  },	//70000898 //TVAR_afit_pBaseValS[106] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//7000089A //TVAR_afit_pBaseValS[107] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//7000089C //TVAR_afit_pBaseValS[108] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//7000089E //TVAR_afit_pBaseValS[109] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//700008A0 //TVAR_afit_pBaseValS[110] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//700008A2 //TVAR_afit_pBaseValS[111] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//700008A4 //TVAR_afit_pBaseValS[112] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//700008A6 //TVAR_afit_pBaseValS[113] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//700008A8 //TVAR_afit_pBaseValS[114] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//700008AA //TVAR_afit_pBaseValS[115] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x012C  },	//700008AC //TVAR_afit_pBaseValS[116] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x03E8  },	//700008AE //TVAR_afit_pBaseValS[117] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0046  },	//700008B0 //TVAR_afit_pBaseValS[118] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x005A  },	//700008B2 //TVAR_afit_pBaseValS[119] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//700008B4 //TVAR_afit_pBaseValS[120] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//700008B6 //TVAR_afit_pBaseValS[121] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//700008B8 //TVAR_afit_pBaseValS[122] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x01AE  },	//700008BA //TVAR_afit_pBaseValS[123] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x001E  },	//700008BC //TVAR_afit_pBaseValS[124] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x001E  },	//700008BE //TVAR_afit_pBaseValS[125] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//700008C0 //TVAR_afit_pBaseValS[126] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//700008C2 //TVAR_afit_pBaseValS[127] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x003E  },	//700008C4 //TVAR_afit_pBaseValS[128] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0008  },	//700008C6 //TVAR_afit_pBaseValS[129] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x003C  },	//700008C8 //TVAR_afit_pBaseValS[130] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x001E  },	//700008CA //TVAR_afit_pBaseValS[131] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x003C  },	//700008CC //TVAR_afit_pBaseValS[132] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x001E  },	//700008CE //TVAR_afit_pBaseValS[133] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//700008D0 //TVAR_afit_pBaseValS[134] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//700008D2 //TVAR_afit_pBaseValS[135] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//700008D4 //TVAR_afit_pBaseValS[136] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x1403  },	//700008D6 //TVAR_afit_pBaseValS[137] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x0000  },	//700008D8 //TVAR_afit_pBaseValS[138] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0000  },	//700008DA //TVAR_afit_pBaseValS[139] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0000  },	//700008DC //TVAR_afit_pBaseValS[140] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//700008DE //TVAR_afit_pBaseValS[141] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x045A  },	//700008E0 //TVAR_afit_pBaseValS[142] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//700008E2 //TVAR_afit_pBaseValS[143] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//700008E4 //TVAR_afit_pBaseValS[144] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//700008E6 //TVAR_afit_pBaseValS[145] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x081E  },	//700008E8 //TVAR_afit_pBaseValS[146] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A14  },	//700008EA //TVAR_afit_pBaseValS[147] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0F0F  },	//700008EC //TVAR_afit_pBaseValS[148] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A00  },	//700008EE //TVAR_afit_pBaseValS[149] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x0032  },	//700008F0 //TVAR_afit_pBaseValS[150] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x000E  },	//700008F2 //TVAR_afit_pBaseValS[151] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0002  },	//700008F4 //TVAR_afit_pBaseValS[152] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//700008F6 //TVAR_afit_pBaseValS[153] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1102  },	//700008F8 //TVAR_afit_pBaseValS[154] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001B  },	//700008FA //TVAR_afit_pBaseValS[155] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//700008FC //TVAR_afit_pBaseValS[156] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//700008FE //TVAR_afit_pBaseValS[157] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//70000900 //TVAR_afit_pBaseValS[158] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0306  },	//70000902 //TVAR_afit_pBaseValS[159] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x4603  },	//70000904 //TVAR_afit_pBaseValS[160] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0480  },	//70000906 //TVAR_afit_pBaseValS[161] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0046  },	//70000908 //TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//7000090A //TVAR_afit_pBaseValS[163] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x0101  },	//7000090C //TVAR_afit_pBaseValS[164] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0707  },	//7000090E //TVAR_afit_pBaseValS[165] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x1E01  },	//70000910 //TVAR_afit_pBaseValS[166] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x491E  },	//70000912 //TVAR_afit_pBaseValS[167] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /
+{ 0x0F12, 0x5044  },	//70000914 //TVAR_afit_pBaseValS[168] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0500  },	//70000916 //TVAR_afit_pBaseValS[169] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x0004  },	//70000918 //TVAR_afit_pBaseValS[170] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /
+{ 0x0F12, 0x3C0A  },	//7000091A //TVAR_afit_pBaseValS[171] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x0714  },	//7000091C //TVAR_afit_pBaseValS[172] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /
+{ 0x0F12, 0x3214  },	//7000091E //TVAR_afit_pBaseValS[173] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x5A03  },	//70000920 //TVAR_afit_pBaseValS[174] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x121E  },	//70000922 //TVAR_afit_pBaseValS[175] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//70000924 //TVAR_afit_pBaseValS[176] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//70000926 //TVAR_afit_pBaseValS[177] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x1E06  },	//70000928 //TVAR_afit_pBaseValS[178] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x011E  },	//7000092A //TVAR_afit_pBaseValS[179] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//7000092C //TVAR_afit_pBaseValS[180] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x3A3C  },	//7000092E //TVAR_afit_pBaseValS[181] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x585A  },	//70000930 //TVAR_afit_pBaseValS[182] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000932 //TVAR_afit_pBaseValS[183] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000934 //TVAR_afit_pBaseValS[184] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0000  },	//70000936 //TVAR_afit_pBaseValS[185] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x141E  },	//70000938 //TVAR_afit_pBaseValS[186] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF07  },	//7000093A //TVAR_afit_pBaseValS[187] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//7000093C //TVAR_afit_pBaseValS[188] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x0000  },	//7000093E //TVAR_afit_pBaseValS[189] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x0F0F  },	//70000940 //TVAR_afit_pBaseValS[190] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000942 //TVAR_afit_pBaseValS[191] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000944 //TVAR_afit_pBaseValS[192] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x1E1E  },	//70000946 //TVAR_afit_pBaseValS[193] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000948 //TVAR_afit_pBaseValS[194] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x3C01  },	//7000094A //TVAR_afit_pBaseValS[195] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x5A3A  },	//7000094C //TVAR_afit_pBaseValS[196] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x2858  },	//7000094E //TVAR_afit_pBaseValS[197] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000950 //TVAR_afit_pBaseValS[198] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x0003  },	//70000952 //TVAR_afit_pBaseValS[199] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1E00  },	//70000954 //TVAR_afit_pBaseValS[200] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x0714  },	//70000956 //TVAR_afit_pBaseValS[201] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000958 //TVAR_afit_pBaseValS[202] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x0004  },	//7000095A //TVAR_afit_pBaseValS[203] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x0F00  },	//7000095C //TVAR_afit_pBaseValS[204] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x400F  },	//7000095E //TVAR_afit_pBaseValS[205] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000960 //TVAR_afit_pBaseValS[206] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000962 //TVAR_afit_pBaseValS[207] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000964 //TVAR_afit_pBaseValS[208] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000966 //TVAR_afit_pBaseValS[209] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0000  },	//70000968 //TVAR_afit_pBaseValS[210] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//7000096A //TVAR_afit_pBaseValS[211] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//7000096C //TVAR_afit_pBaseValS[212] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//7000096E //TVAR_afit_pBaseValS[213] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//70000970 //TVAR_afit_pBaseValS[214] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//70000972 //TVAR_afit_pBaseValS[215] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//70000974 //TVAR_afit_pBaseValS[216] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//70000976 //TVAR_afit_pBaseValS[217] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//70000978 //TVAR_afit_pBaseValS[218] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//7000097A //TVAR_afit_pBaseValS[219] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x012C  },	//7000097C //TVAR_afit_pBaseValS[220] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x03E8  },	//7000097E //TVAR_afit_pBaseValS[221] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0046  },	//70000980 //TVAR_afit_pBaseValS[222] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x005A  },	//70000982 //TVAR_afit_pBaseValS[223] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//70000984 //TVAR_afit_pBaseValS[224] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//70000986 //TVAR_afit_pBaseValS[225] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//70000988 //TVAR_afit_pBaseValS[226] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x0226  },	//7000098A //TVAR_afit_pBaseValS[227] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x001E  },	//7000098C //TVAR_afit_pBaseValS[228] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x001E  },	//7000098E //TVAR_afit_pBaseValS[229] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//70000990 //TVAR_afit_pBaseValS[230] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//70000992 //TVAR_afit_pBaseValS[231] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x004E  },	//70000994 //TVAR_afit_pBaseValS[232] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0000  },	//70000996 //TVAR_afit_pBaseValS[233] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x003C  },	//70000998 //TVAR_afit_pBaseValS[234] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x001E  },	//7000099A //TVAR_afit_pBaseValS[235] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x003C  },	//7000099C //TVAR_afit_pBaseValS[236] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x001E  },	//7000099E //TVAR_afit_pBaseValS[237] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//700009A0 //TVAR_afit_pBaseValS[238] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//700009A2 //TVAR_afit_pBaseValS[239] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//700009A4 //TVAR_afit_pBaseValS[240] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x1403  },	//700009A6 //TVAR_afit_pBaseValS[241] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x0000  },	//700009A8 //TVAR_afit_pBaseValS[242] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0000  },	//700009AA //TVAR_afit_pBaseValS[243] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0906  },	//700009AC //TVAR_afit_pBaseValS[244] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//700009AE //TVAR_afit_pBaseValS[245] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x045A  },	//700009B0 //TVAR_afit_pBaseValS[246] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//700009B2 //TVAR_afit_pBaseValS[247] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//700009B4 //TVAR_afit_pBaseValS[248] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//700009B6 //TVAR_afit_pBaseValS[249] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x081E  },	//700009B8 //TVAR_afit_pBaseValS[250] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A14  },	//700009BA //TVAR_afit_pBaseValS[251] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0F0F  },	//700009BC //TVAR_afit_pBaseValS[252] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A00  },	//700009BE //TVAR_afit_pBaseValS[253] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x0090  },	//700009C0 //TVAR_afit_pBaseValS[254] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x000A  },	//700009C2 //TVAR_afit_pBaseValS[255] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0002  },	//700009C4 //TVAR_afit_pBaseValS[256] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//700009C6 //TVAR_afit_pBaseValS[257] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1102  },	//700009C8 //TVAR_afit_pBaseValS[258] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001B  },	//700009CA //TVAR_afit_pBaseValS[259] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//700009CC //TVAR_afit_pBaseValS[260] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//700009CE //TVAR_afit_pBaseValS[261] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//700009D0 //TVAR_afit_pBaseValS[262] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0306  },	//700009D2 //TVAR_afit_pBaseValS[263] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x4602  },	//700009D4 //TVAR_afit_pBaseValS[264] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0880  },	//700009D6 //TVAR_afit_pBaseValS[265] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0080  },	//700009D8 //TVAR_afit_pBaseValS[266] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//700009DA //TVAR_afit_pBaseValS[267] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x0101  },	//700009DC //TVAR_afit_pBaseValS[268] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0707  },	//700009DE //TVAR_afit_pBaseValS[269] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x1E01  },	//700009E0 //TVAR_afit_pBaseValS[270] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x3C1E  },	//700009E2 //TVAR_afit_pBaseValS[271] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /
+{ 0x0F12, 0x5028  },	//700009E4 //TVAR_afit_pBaseValS[272] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0500  },	//700009E6 //TVAR_afit_pBaseValS[273] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x1A04  },	//700009E8 //TVAR_afit_pBaseValS[274] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /
+{ 0x0F12, 0x280A  },	//700009EA //TVAR_afit_pBaseValS[275] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x080C  },	//700009EC //TVAR_afit_pBaseValS[276] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /
+{ 0x0F12, 0x1414  },	//700009EE //TVAR_afit_pBaseValS[277] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x6A03  },	//700009F0 //TVAR_afit_pBaseValS[278] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x121E  },	//700009F2 //TVAR_afit_pBaseValS[279] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//700009F4 //TVAR_afit_pBaseValS[280] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//700009F6 //TVAR_afit_pBaseValS[281] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x2806  },	//700009F8 //TVAR_afit_pBaseValS[282] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x0128  },	//700009FA //TVAR_afit_pBaseValS[283] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//700009FC //TVAR_afit_pBaseValS[284] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x2224  },	//700009FE //TVAR_afit_pBaseValS[285] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x3236  },	//70000A00 //TVAR_afit_pBaseValS[286] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000A02 //TVAR_afit_pBaseValS[287] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000A04 //TVAR_afit_pBaseValS[288] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0410  },	//70000A06 //TVAR_afit_pBaseValS[289] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x141E  },	//70000A08 //TVAR_afit_pBaseValS[290] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF07  },	//70000A0A //TVAR_afit_pBaseValS[291] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//70000A0C //TVAR_afit_pBaseValS[292] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x4050  },	//70000A0E //TVAR_afit_pBaseValS[293] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x0F0F  },	//70000A10 //TVAR_afit_pBaseValS[294] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000A12 //TVAR_afit_pBaseValS[295] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000A14 //TVAR_afit_pBaseValS[296] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x2828  },	//70000A16 //TVAR_afit_pBaseValS[297] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000A18 //TVAR_afit_pBaseValS[298] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x2401  },	//70000A1A //TVAR_afit_pBaseValS[299] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x3622  },	//70000A1C //TVAR_afit_pBaseValS[300] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x2832  },	//70000A1E //TVAR_afit_pBaseValS[301] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000A20 //TVAR_afit_pBaseValS[302] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x1003  },	//70000A22 //TVAR_afit_pBaseValS[303] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1E04  },	//70000A24 //TVAR_afit_pBaseValS[304] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x0714  },	//70000A26 //TVAR_afit_pBaseValS[305] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000A28 //TVAR_afit_pBaseValS[306] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x5004  },	//70000A2A //TVAR_afit_pBaseValS[307] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x0F40  },	//70000A2C //TVAR_afit_pBaseValS[308] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x400F  },	//70000A2E //TVAR_afit_pBaseValS[309] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000A30 //TVAR_afit_pBaseValS[310] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000A32 //TVAR_afit_pBaseValS[311] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000A34 //TVAR_afit_pBaseValS[312] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000A36 //TVAR_afit_pBaseValS[313] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0000  },	//70000A38 //TVAR_afit_pBaseValS[314] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//70000A3A //TVAR_afit_pBaseValS[315] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//70000A3C //TVAR_afit_pBaseValS[316] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//70000A3E //TVAR_afit_pBaseValS[317] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//70000A40 //TVAR_afit_pBaseValS[318] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//70000A42 //TVAR_afit_pBaseValS[319] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//70000A44 //TVAR_afit_pBaseValS[320] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//70000A46 //TVAR_afit_pBaseValS[321] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//70000A48 //TVAR_afit_pBaseValS[322] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//70000A4A //TVAR_afit_pBaseValS[323] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x00C8  },	//70000A4C //TVAR_afit_pBaseValS[324] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x03E8  },	//70000A4E //TVAR_afit_pBaseValS[325] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0046  },	//70000A50 //TVAR_afit_pBaseValS[326] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x0050  },	//70000A52 //TVAR_afit_pBaseValS[327] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//70000A54 //TVAR_afit_pBaseValS[328] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//70000A56 //TVAR_afit_pBaseValS[329] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//70000A58 //TVAR_afit_pBaseValS[330] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x0226  },	//70000A5A //TVAR_afit_pBaseValS[331] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x0014  },	//70000A5C //TVAR_afit_pBaseValS[332] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x0014  },	//70000A5E //TVAR_afit_pBaseValS[333] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//70000A60 //TVAR_afit_pBaseValS[334] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//70000A62 //TVAR_afit_pBaseValS[335] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x004E  },	//70000A64 //TVAR_afit_pBaseValS[336] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0000  },	//70000A66 //TVAR_afit_pBaseValS[337] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x002D  },	//70000A68 //TVAR_afit_pBaseValS[338] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x0019  },	//70000A6A //TVAR_afit_pBaseValS[339] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x002D  },	//70000A6C //TVAR_afit_pBaseValS[340] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x0019  },	//70000A6E //TVAR_afit_pBaseValS[341] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//70000A70 //TVAR_afit_pBaseValS[342] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//70000A72 //TVAR_afit_pBaseValS[343] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//70000A74 //TVAR_afit_pBaseValS[344] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x1403  },	//70000A76 //TVAR_afit_pBaseValS[345] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x0000  },	//70000A78 //TVAR_afit_pBaseValS[346] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0000  },	//70000A7A //TVAR_afit_pBaseValS[347] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0906  },	//70000A7C //TVAR_afit_pBaseValS[348] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//70000A7E //TVAR_afit_pBaseValS[349] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x045A  },	//70000A80 //TVAR_afit_pBaseValS[350] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//70000A82 //TVAR_afit_pBaseValS[351] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//70000A84 //TVAR_afit_pBaseValS[352] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//70000A86 //TVAR_afit_pBaseValS[353] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x081E  },	//70000A88 //TVAR_afit_pBaseValS[354] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A14  },	//70000A8A //TVAR_afit_pBaseValS[355] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0F0F  },	//70000A8C //TVAR_afit_pBaseValS[356] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A00  },	//70000A8E //TVAR_afit_pBaseValS[357] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x0090  },	//70000A90 //TVAR_afit_pBaseValS[358] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x000A  },	//70000A92 //TVAR_afit_pBaseValS[359] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0001  },	//70000A94 //TVAR_afit_pBaseValS[360] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//70000A96 //TVAR_afit_pBaseValS[361] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1002  },	//70000A98 //TVAR_afit_pBaseValS[362] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001E  },	//70000A9A //TVAR_afit_pBaseValS[363] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//70000A9C //TVAR_afit_pBaseValS[364] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//70000A9E //TVAR_afit_pBaseValS[365] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//70000AA0 //TVAR_afit_pBaseValS[366] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0307  },	//70000AA2 //TVAR_afit_pBaseValS[367] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x5002  },	//70000AA4 //TVAR_afit_pBaseValS[368] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0080  },	//70000AA6 //TVAR_afit_pBaseValS[369] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0080  },	//70000AA8 //TVAR_afit_pBaseValS[370] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//70000AAA //TVAR_afit_pBaseValS[371] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x0101  },	//70000AAC //TVAR_afit_pBaseValS[372] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0707  },	//70000AAE //TVAR_afit_pBaseValS[373] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x1E01  },	//70000AB0 //TVAR_afit_pBaseValS[374] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x2A1E  },	//70000AB2 //TVAR_afit_pBaseValS[375] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /
+{ 0x0F12, 0x5020  },	//70000AB4 //TVAR_afit_pBaseValS[376] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0500  },	//70000AB6 //TVAR_afit_pBaseValS[377] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x1A04  },	//70000AB8 //TVAR_afit_pBaseValS[378] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /
+{ 0x0F12, 0x280A  },	//70000ABA //TVAR_afit_pBaseValS[379] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x080C  },	//70000ABC //TVAR_afit_pBaseValS[380] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /
+{ 0x0F12, 0x1414  },	//70000ABE //TVAR_afit_pBaseValS[381] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x6A03  },	//70000AC0 //TVAR_afit_pBaseValS[382] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x121E  },	//70000AC2 //TVAR_afit_pBaseValS[383] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//70000AC4 //TVAR_afit_pBaseValS[384] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//70000AC6 //TVAR_afit_pBaseValS[385] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x3C06  },	//70000AC8 //TVAR_afit_pBaseValS[386] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x013C  },	//70000ACA //TVAR_afit_pBaseValS[387] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//70000ACC //TVAR_afit_pBaseValS[388] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x1C1E  },	//70000ACE //TVAR_afit_pBaseValS[389] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x1E22  },	//70000AD0 //TVAR_afit_pBaseValS[390] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000AD2 //TVAR_afit_pBaseValS[391] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000AD4 //TVAR_afit_pBaseValS[392] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0214  },	//70000AD6 //TVAR_afit_pBaseValS[393] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x0E14  },	//70000AD8 //TVAR_afit_pBaseValS[394] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF06  },	//70000ADA //TVAR_afit_pBaseValS[395] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//70000ADC //TVAR_afit_pBaseValS[396] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x4052  },	//70000ADE //TVAR_afit_pBaseValS[397] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x150C  },	//70000AE0 //TVAR_afit_pBaseValS[398] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000AE2 //TVAR_afit_pBaseValS[399] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000AE4 //TVAR_afit_pBaseValS[400] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x3C3C  },	//70000AE6 //TVAR_afit_pBaseValS[401] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000AE8 //TVAR_afit_pBaseValS[402] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x1E01  },	//70000AEA //TVAR_afit_pBaseValS[403] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x221C  },	//70000AEC //TVAR_afit_pBaseValS[404] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x281E  },	//70000AEE //TVAR_afit_pBaseValS[405] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000AF0 //TVAR_afit_pBaseValS[406] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x1403  },	//70000AF2 //TVAR_afit_pBaseValS[407] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1402  },	//70000AF4 //TVAR_afit_pBaseValS[408] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x060E  },	//70000AF6 //TVAR_afit_pBaseValS[409] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000AF8 //TVAR_afit_pBaseValS[410] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x5204  },	//70000AFA //TVAR_afit_pBaseValS[411] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x0C40  },	//70000AFC //TVAR_afit_pBaseValS[412] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x4015  },	//70000AFE //TVAR_afit_pBaseValS[413] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000B00 //TVAR_afit_pBaseValS[414] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000B02 //TVAR_afit_pBaseValS[415] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000B04 //TVAR_afit_pBaseValS[416] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000B06 //TVAR_afit_pBaseValS[417] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0000  },	//70000B08 //TVAR_afit_pBaseValS[418] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//70000B0A //TVAR_afit_pBaseValS[419] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//70000B0C //TVAR_afit_pBaseValS[420] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//70000B0E //TVAR_afit_pBaseValS[421] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//70000B10 //TVAR_afit_pBaseValS[422] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//70000B12 //TVAR_afit_pBaseValS[423] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//70000B14 //TVAR_afit_pBaseValS[424] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//70000B16 //TVAR_afit_pBaseValS[425] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//70000B18 //TVAR_afit_pBaseValS[426] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//70000B1A //TVAR_afit_pBaseValS[427] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x0032  },	//70000B1C //TVAR_afit_pBaseValS[428] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x028A  },	//70000B1E //TVAR_afit_pBaseValS[429] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0032  },	//70000B20 //TVAR_afit_pBaseValS[430] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x01F4  },	//70000B22 //TVAR_afit_pBaseValS[431] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//70000B24 //TVAR_afit_pBaseValS[432] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//70000B26 //TVAR_afit_pBaseValS[433] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//70000B28 //TVAR_afit_pBaseValS[434] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x01AA  },	//70000B2A //TVAR_afit_pBaseValS[435] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x003C  },	//70000B2C //TVAR_afit_pBaseValS[436] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x0050  },	//70000B2E //TVAR_afit_pBaseValS[437] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//70000B30 //TVAR_afit_pBaseValS[438] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//70000B32 //TVAR_afit_pBaseValS[439] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x0044  },	//70000B34 //TVAR_afit_pBaseValS[440] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0014  },	//70000B36 //TVAR_afit_pBaseValS[441] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x0046  },	//70000B38 //TVAR_afit_pBaseValS[442] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x0019  },	//70000B3A //TVAR_afit_pBaseValS[443] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x0046  },	//70000B3C //TVAR_afit_pBaseValS[444] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x0019  },	//70000B3E //TVAR_afit_pBaseValS[445] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//70000B40 //TVAR_afit_pBaseValS[446] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//70000B42 //TVAR_afit_pBaseValS[447] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//70000B44 //TVAR_afit_pBaseValS[448] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x0503  },	//70000B46 //TVAR_afit_pBaseValS[449] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x080F  },	//70000B48 //TVAR_afit_pBaseValS[450] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0808  },	//70000B4A //TVAR_afit_pBaseValS[451] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0000  },	//70000B4C //TVAR_afit_pBaseValS[452] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//70000B4E //TVAR_afit_pBaseValS[453] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x012D  },	//70000B50 //TVAR_afit_pBaseValS[454] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//70000B52 //TVAR_afit_pBaseValS[455] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//70000B54 //TVAR_afit_pBaseValS[456] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//70000B56 //TVAR_afit_pBaseValS[457] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x061E  },	//70000B58 //TVAR_afit_pBaseValS[458] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A1E  },	//70000B5A //TVAR_afit_pBaseValS[459] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0606  },	//70000B5C //TVAR_afit_pBaseValS[460] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A03  },	//70000B5E //TVAR_afit_pBaseValS[461] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x378B  },	//70000B60 //TVAR_afit_pBaseValS[462] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x1028  },	//70000B62 //TVAR_afit_pBaseValS[463] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0001  },	//70000B64 //TVAR_afit_pBaseValS[464] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//70000B66 //TVAR_afit_pBaseValS[465] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1002  },	//70000B68 //TVAR_afit_pBaseValS[466] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001E  },	//70000B6A //TVAR_afit_pBaseValS[467] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//70000B6C //TVAR_afit_pBaseValS[468] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//70000B6E //TVAR_afit_pBaseValS[469] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//70000B70 //TVAR_afit_pBaseValS[470] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0307  },	//70000B72 //TVAR_afit_pBaseValS[471] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x5001  },	//70000B74 //TVAR_afit_pBaseValS[472] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0080  },	//70000B76 //TVAR_afit_pBaseValS[473] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0080  },	//70000B78 //TVAR_afit_pBaseValS[474] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//70000B7A //TVAR_afit_pBaseValS[475] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x5050  },	//70000B7C //TVAR_afit_pBaseValS[476] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0101  },	//70000B7E //TVAR_afit_pBaseValS[477] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x3201  },	//70000B80 //TVAR_afit_pBaseValS[478] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x1832  },	//70000B82 //TVAR_afit_pBaseValS[479] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /        iden 12
+{ 0x0F12, 0x210C  },	//70000B84 //TVAR_afit_pBaseValS[480] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0A00  },	//70000B86 //TVAR_afit_pBaseValS[481] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x1E04  },	//70000B88 //TVAR_afit_pBaseValS[482] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /    1E demhsharplow
+{ 0x0F12, 0x0A08  },	//70000B8A //TVAR_afit_pBaseValS[483] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x070C  },	//70000B8C //TVAR_afit_pBaseValS[484] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /    c8 clamp
+{ 0x0F12, 0x3264  },	//70000B8E //TVAR_afit_pBaseValS[485] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x5A02  },	//70000B90 //TVAR_afit_pBaseValS[486] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x1040  },	//70000B92 //TVAR_afit_pBaseValS[487] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//70000B94 //TVAR_afit_pBaseValS[488] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//70000B96 //TVAR_afit_pBaseValS[489] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x4606  },	//70000B98 //TVAR_afit_pBaseValS[490] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x0146  },	//70000B9A //TVAR_afit_pBaseValS[491] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//70000B9C //TVAR_afit_pBaseValS[492] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x1C18  },	//70000B9E //TVAR_afit_pBaseValS[493] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x1819  },	//70000BA0 //TVAR_afit_pBaseValS[494] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000BA2 //TVAR_afit_pBaseValS[495] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000BA4 //TVAR_afit_pBaseValS[496] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0514  },	//70000BA6 //TVAR_afit_pBaseValS[497] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x0C14  },	//70000BA8 //TVAR_afit_pBaseValS[498] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF05  },	//70000BAA //TVAR_afit_pBaseValS[499] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//70000BAC //TVAR_afit_pBaseValS[500] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x4052  },	//70000BAE //TVAR_afit_pBaseValS[501] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x1514  },	//70000BB0 //TVAR_afit_pBaseValS[502] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000BB2 //TVAR_afit_pBaseValS[503] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000BB4 //TVAR_afit_pBaseValS[504] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x4646  },	//70000BB6 //TVAR_afit_pBaseValS[505] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000BB8 //TVAR_afit_pBaseValS[506] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x1801  },	//70000BBA //TVAR_afit_pBaseValS[507] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x191C  },	//70000BBC //TVAR_afit_pBaseValS[508] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x2818  },	//70000BBE //TVAR_afit_pBaseValS[509] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000BC0 //TVAR_afit_pBaseValS[510] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x1403  },	//70000BC2 //TVAR_afit_pBaseValS[511] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1405  },	//70000BC4 //TVAR_afit_pBaseValS[512] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x050C  },	//70000BC6 //TVAR_afit_pBaseValS[513] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000BC8 //TVAR_afit_pBaseValS[514] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x5204  },	//70000BCA //TVAR_afit_pBaseValS[515] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x1440  },	//70000BCC //TVAR_afit_pBaseValS[516] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x4015  },	//70000BCE //TVAR_afit_pBaseValS[517] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000BD0 //TVAR_afit_pBaseValS[518] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000BD2 //TVAR_afit_pBaseValS[519] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+                           
+{ 0x0F12, 0x7DFA  },	//afit_pConstBaseValS[0] //                                                                          
+{ 0x0F12, 0xFFBD  },	//afit_pConstBaseValS[1] //                                                                          
+{ 0x0F12, 0x26FE  },	//afit_pConstBaseValS[2] //                                                                          
+{ 0x0F12, 0xF7BC  },	//afit_pConstBaseValS[3] //                                                                          
+{ 0x0F12, 0x7E06  },	//afit_pConstBaseValS[4] //                                                                          
+{ 0x0F12, 0x00D3  },	//afit_pConstBaseValS[5] //                                                                          
+                        
+                        
+{ 0x002A, 0x2CE8  },    
+{ 0x0F12, 0x0007  },	// Modify LSB to control AWBB_YThreshLow //    	                                                                        
+{ 0x0F12, 0x00E2  },	//                                         
+{ 0x0F12, 0x0005  },	// Modify LSB to control AWBB_YThreshLowBrLow//                                                                        
+{ 0x0F12, 0x00E2  },	//                                         
+                                                                       
+                                                                                     
+{ 0x002A, 0x0F7E  },    //ae weight    //                                
+{ 0x0F12, 0x0000  },  //0000  //0000
+{ 0x0F12, 0x0000  },  //0000  //0000
+{ 0x0F12, 0x0000  },  //0000  //0000
+{ 0x0F12, 0x0000  },  //0000  //0000                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0201  },  //0201  //0201
+{ 0x0F12, 0x0102  },  //0102  //0102
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0201  },  //0101  //0101
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0102  },  //0101  //0101                     
+{ 0x0F12, 0x0201  },  //0101  //0201
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0102  },  //0101  //0102                     
+{ 0x0F12, 0x0101  },  //0101  //0201
+{ 0x0F12, 0x0101  },  //0101  //0202
+{ 0x0F12, 0x0101  },  //0101  //0202
+{ 0x0F12, 0x0101  },  //0101  //0102
+                        
+                               
+{ 0x002A, 0x01CC  },    
+{ 0x0F12, 0x5DC0  },	//REG_TC_IPRM_InClockLSBs//input clock=24MHz                        	                                                                        
+{ 0x0F12, 0x0000  },    //REG_TC_IPRM_InClockMSBs                                           
+{ 0x002A, 0x01EE  },                                                                        
+{ 0x0F12, 0x0003  },	//REG_TC_IPRM_UseNPviClocks                                     
+                  
+{ 0x002A, 0x01F6  },                                                                        
+{ 0x0F12, 0x1F40  },    //REG_TC_IPRM_OpClk4KHz_0                   	2   700001F6         
+{ 0x0F12, 0x32A8  },	//3A88    //REG_TC_IPRM_MinOutRate4KHz_0              	2   700001F8                                                                        
+{ 0x0F12, 0x32E8  },	//3AA8    //REG_TC_IPRM_MaxOutRate4KHz_0                        
+                        
+{ 0x0F12, 0x1F40  },	 //REG_TC_IPRM_OpClk4KHz_1                   	2   700001FC    
+{ 0x0F12, 0x2ea0  },    //REG_TC_IPRM_MinOutRate4KHz_1              	2   700001FE 
+{ 0x0F12, 0x2f00  },    //REG_TC_IPRM_MaxOutRate4KHz_1              	2   70000200 
+                  
+{ 0x0F12, 0x0BB8  },    //REG_TC_IPRM_OpClk4KHz_2                   	2   70000202 
+{ 0x0F12, 0x05DC  },    //REG_TC_IPRM_MinOutRate4KHz_2              	2   70000204 
+{ 0x0F12, 0x1770  },    //REG_TC_IPRM_MaxOutRate4KHz_2              	2   70000206 
+                  
+{ 0x002A, 0x0208  },                                                                
+{ 0x0F12, 0x0001  },      //REG_TC_IPRM_InitParamsUpdated                           
+                        
+{ 0xdddd, 0x0064  },  //delay 100ms  
+                  
+{ 0x0028, 0x7000  },	    
+{ 0x002A, 0x026C  },   //Normal preview 15fps
+{ 0x0F12, 0x0280  },	//REG_0TC_PCFG_usWidth                      	2   7000026C			// cys  640                          
+{ 0x0F12, 0x01e0  },   //REG_0TC_PCFG_usHeight                     	2   7000026E    //  480                                       
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_Format                       	2   70000270    //   rgb565                                      
+{ 0x0F12, 0x32E8  },	//3AA8//REG_0TC_PCFG_usMaxOut4KHzRate             	2   70000272  //                              
+{ 0x0F12, 0x32a8  },	//3A88//REG_0TC_PCFG_usMinOut4KHzRate             	2   70000274  //                              
+{ 0x0F12, 0x0100  },   //REG_0TC_PCFG_OutClkPerPix88               	2   70000276    //                                         
+{ 0x0F12, 0x0800  },   //REG_0TC_PCFG_uMaxBpp88                    	2   70000278    //                                         
+{ 0x0F12, 0x0072  },   //REG_0TC_PCFG_PVIMask                      	2   7000027A    //92  (1) PCLK inversion  (4)1b_C first (5) UV First                                       
+{ 0x0F12, 0x0010  },   //REG_0TC_PCFG_OIFMask                      	2   7000027C    //                                         
+{ 0x0F12, 0x01E0  },   //REG_0TC_PCFG_usJpegPacketSize             	2   7000027E    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_usJpegTotalPackets           	2   70000280    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_uClockInd                    	2   70000282    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_usFrTimeType                 	2   70000284    //                                         
+{ 0x0F12, 0x0001  },   //REG_0TC_PCFG_FrRateQualityType            	2   70000286    //cys 0x0001          
+{ 0x0F12, 0x07d0  },   //REG_0TC_PCFG_usMaxFrTimeMsecMult10        	2   70000288    // cys 0x535 
+{ 0x0F12, 0x07d0  },   //REG_0TC_PCFG_usMinFrTimeMsecMult10        	2   7000028A    //cys                              
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_bSmearOutput                 	2   7000028C    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_sSaturation                  	2   7000028E    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_sSharpBlur                   	2   70000290    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_sColorTemp                   	2   70000292    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_uDeviceGammaIndex            	2   70000294    //                                         
+{ 0x0F12, 0x0003  },   //REG_0TC_PCFG_uPrevMirror                  	2   70000296    //                                         
+{ 0x0F12, 0x0003  },   //REG_0TC_PCFG_uCaptureMirror               	2   70000298    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_uRotation                    	2   7000029A    //                                         
+                       
+                       //comcoder frame fix 15                                        
+{ 0x0F12, 0x0400  },   //REG_1TC_PCFG_usWidth                      	2   7000029C    //                                         
+{ 0x0F12, 0x0300  },   //REG_1TC_PCFG_usHeight                     	2   7000029E    //                                         
+{ 0x0F12, 0x0005  },   //REG_1TC_PCFG_Format                       	2   700002A0    //                                         
+{ 0x0F12, 0x32E8  },   //REG_1TC_PCFG_usMaxOut4KHzRate             	2   700002A2    //                                         
+{ 0x0F12, 0x32a8  },   //REG_1TC_PCFG_usMinOut4KHzRate             	2   700002A4    //                                         
+{ 0x0F12, 0x0100  },   //REG_1TC_PCFG_OutClkPerPix88               	2   700002A6    //                                         
+{ 0x0F12, 0x0800  },   //REG_1TC_PCFG_uMaxBpp88                    	2   700002A8    //                                         
+{ 0x0F12, 0x0072  },   //REG_1TC_PCFG_PVIMask                      	2   700002AA    //                                         
+{ 0x0F12, 0x0010  },   //REG_1TC_PCFG_OIFMask                      	2   700002AC    //                                         
+{ 0x0F12, 0x01E0  },   //REG_1TC_PCFG_usJpegPacketSize             	2   700002AE    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_usJpegTotalPackets           	2   700002B0    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_uClockInd                    	2   700002B2    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_usFrTimeType                 	2   700002B4    //                                         
+{ 0x0F12, 0x0001  },   //REG_1TC_PCFG_FrRateQualityType            	2   700002B6    //                                         
+{ 0x0F12, 0x014d  },   //REG_1TC_PCFG_usMaxFrTimeMsecMult10        	2   700002B8    //cys 0x29a         
+{ 0x0F12, 0x014d  },   //REG_1TC_PCFG_usMinFrTimeMsecMult10        	2   700002BA    //cys  0x29a                                        
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_bSmearOutput                 	2   700002BC    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_sSaturation                  	2   700002BE    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_sSharpBlur                   	2   700002C0    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_sColorTemp                   	2   700002C2    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_uDeviceGammaIndex            	2   700002C4    //                                         
+{ 0x0F12, 0x0003  },   //REG_1TC_PCFG_uPrevMirror                  	2   700002C6    //                                         
+{ 0x0F12, 0x0003  },   //REG_1TC_PCFG_uCaptureMirror               	2   700002C8    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_uRotation                    	2   700002CA    //                                         
+                                       
+                            
+{ 0x002A, 0x035C  },   //Normal capture //    
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_uCaptureMode                 	2   7000035C						// 
+{ 0x0F12, 0x0280  },   //REG_0TC_CCFG_usWidth                      	2   7000035E          //cys 640                                   
+{ 0x0F12, 0x01e0  },   //REG_0TC_CCFG_usHeight                     	2   70000360          //    480                               
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_Format                       	2   70000362          //     rgb565                              
+{ 0x0F12, 0x32E8  },	//2f00//3AA8//REG_0TC_CCFG_usMaxOut4KHzRate             	2   70000364  //                      
+{ 0x0F12, 0x32a8  },	//2ea0//3A88//REG_0TC_CCFG_usMinOut4KHzRate             	2   70000366  //                      
+{ 0x0F12, 0x0100  },   //REG_0TC_CCFG_OutClkPerPix88               	2   70000368          //                                   
+{ 0x0F12, 0x0800  },   //REG_0TC_CCFG_uMaxBpp88                    	2   7000036A          //                                   
+{ 0x0F12, 0x0072  },   //REG_0TC_CCFG_PVIMask                      	2   7000036C          //                                   
+{ 0x0F12, 0x0010  },   //REG_0TC_CCFG_OIFMask                      	2   7000036E          //                                   
+{ 0x0F12, 0x01E0  },   //REG_0TC_CCFG_usJpegPacketSize             	2   70000370          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_usJpegTotalPackets           	2   70000372          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_uClockInd                    	2   70000374          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_usFrTimeType                 	2   70000376          //                                   
+{ 0x0F12, 0x0002  },   //REG_0TC_CCFG_FrRateQualityType            	2   70000378          //                                   
+{ 0x0F12, 0x07d0  },   //REG_0TC_CCFG_usMaxFrTimeMsecMult10        	2   7000037A          // cys 535
+{ 0x0F12, 0x07d0  },   //REG_0TC_CCFG_usMinFrTimeMsecMult10        	2   7000037C          // cys 535
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_bSmearOutput                 	2   7000037E          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_sSaturation                  	2   70000380          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_sSharpBlur                   	2   70000382          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_sColorTemp                   	2   70000384          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_uDeviceGammaIndex            	2   70000386          //                                   
+                            
+                       // Low_lux capture//    
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_uCaptureMode                 	2   70000388						// 
+{ 0x0F12, 0x0280  },   //REG_1TC_CCFG_usWidth                      	2   7000038A          //  cys 640                                 
+{ 0x0F12, 0x01e0  },   //REG_1TC_CCFG_usHeight                     	2   7000038C          //  cys 480                                 
+{ 0x0F12, 0x0005  },   //REG_1TC_CCFG_Format                       	2   7000038E          //                                   
+{ 0x0F12, 0x32E8  },   //REG_1TC_CCFG_usMaxOut4KHzRate             	2   70000390          //                                   
+{ 0x0F12, 0x32a8  },   //REG_1TC_CCFG_usMinOut4KHzRate             	2   70000392          //                                   
+{ 0x0F12, 0x0100  },   //REG_1TC_CCFG_OutClkPerPix88               	2   70000394          //                                   
+{ 0x0F12, 0x0800  },   //REG_1TC_CCFG_uMaxBpp88                    	2   70000396          //                                   
+{ 0x0F12, 0x0072  },   //REG_1TC_CCFG_PVIMask                      	2   70000398          //                                   
+{ 0x0F12, 0x0010  },   //REG_1TC_CCFG_OIFMask                      	2   7000039A          //                                   
+{ 0x0F12, 0x01E0  },   //REG_1TC_CCFG_usJpegPacketSize             	2   7000039C          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_usJpegTotalPackets           	2   7000039E          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_uClockInd                    	2   700003A0          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_usFrTimeType                 	2   700003A2          //                                   
+{ 0x0F12, 0x0002  },   //REG_1TC_CCFG_FrRateQualityType            	2   700003A4          //                                   
+{ 0x0F12, 0x0535  },   //REG_1TC_CCFG_usMaxFrTimeMsecMult10        	2   700003A6          //                                   
+{ 0x0F12, 0x0535  },   //REG_1TC_CCFG_usMinFrTimeMsecMult10        	2   700003A8          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_bSmearOutput                 	2   700003AA          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_sSaturation                  	2   700003AC          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_sSharpBlur                   	2   700003AE          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_sColorTemp                   	2   700003B0          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_uDeviceGammaIndex            	2   700003B2          //                                   
+                                  
+{ 0x002A, 0x0208  },        
+{ 0x0F12, 0x0001  },      //REG_TC_IPRM_InitParamsUpdated//                                                                       
+                            
+{ 0x002A, 0x023C  },   
+{ 0x0F12, 0x0000  },	//32MHz Sys Clock//	
+{ 0x002A, 0x0244  },	                   
+{ 0x0F12, 0x0000  },       
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x0F12, 0x0001  }, 
+                     
+{ 0x1000, 0x0001  },	// Set host interrupt so main start run//                                                  
+{ 0xdddd, 0x0064  },   //delay 100ms
+                  
+{ 0x002A, 0x0DA0  },    
+{ 0x0F12, 0x0005  },    
+                        
+{ 0x002A, 0x0D88  },    
+{ 0x0F12, 0x0038  },    
+{ 0x0F12, 0x0074  },    
+{ 0x0F12, 0xFFF1  },    
+{ 0x0F12, 0x00BF  },    
+{ 0x0F12, 0xFF9B  },    
+{ 0x0F12, 0x00DB  },    
+{ 0x0F12, 0xFF56  },    
+{ 0x0F12, 0x00F0  },    
+{ 0x0F12, 0xFEFF  },    
+{ 0x0F12, 0x010F  },    
+{ 0x0F12, 0x0E74  },    
+{ 0x002A, 0x0DA8  },    
+{ 0x0F12, 0x0BB8  },    //NB 3000
+{ 0x002A, 0x0DA4  },    
+{ 0x0F12, 0x274E  },
+                  
+{ 0x002A, 0x0DCA  },
+{ 0x0F12, 0x0030  },
+
+{ 0x002A, 0x3286  },
+{ 0x0F12, 0x0001  }, //Pre/Post gamma on(ç›”æ±—)  
+
+{ 0x002A, 0x032C  },
+{ 0x0F12, 0xAAAA  },  //ESD Check  
+                  
+{ 0xffff, 0xffff },
+};
+
+  
+s5k5ca_short_t s5k5ca_capture_normal_normal_00[] =              
+{ 
+{ 0xFCFC, 0xD000  },                 
+{ 0x0028, 0x7000  },  
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0246  },
+{ 0x0F12, 0x0001  },  
+{ 0x002A, 0x0224  },
+{ 0x0F12, 0x0001  },   
+{ 0x0F12, 0x0001  },
+//{ 0xdddd, 0x012C  }, //delay 300ms //0218 delay time 300ms // 0421 0064(100ms)->0032(50ms)        
+{ 0xffff, 0xffff  },
+};
+
+
+
+// /////////////
+// / CapturewMode
+// ////////////
+s5k5ca_short_t s5k5ca_capture[] = 
+{ 
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },                                                      
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  }, 
+  
+{ 0xffff, 0xffff  },
+};
+
+
+/////////////////////
+// SnapshotLowLightMode
+/////////////////////
+s5k5ca_short_t s5k5ca_snapshot_normal_low_00[] = //light <= 0x20 0421 PV2 0020->0018
+{ 
+//LowLight + Night Off
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },            
+                  
+{ 0x002A, 0x07E6  },
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+    
+{ 0x002A, 0x0838  },
+{ 0x0F12, 0x0A3C  },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x0908  },
+{ 0x0F12, 0x0446  },	//TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]
+                                             
+{ 0x002A, 0x0244  }, //Low lux capture//
+{ 0x0F12, 0x0001  }, //config 1 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  },
+                 
+{ 0xdddd, 0x0320  }, //delay 800ms 
+
+{ 0xffff, 0xffff  },
+//sw delay time - 800ms
+};
+
+
+  
+s5k5ca_short_t s5k5ca_flashcapture_00[] =       
+{ 
+  
+//{ 0xdddd, 0x0160  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },                   
+{ 0x002A, 0x035C  }, //Capture Mode//
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  }, 
+  
+
+{ 0xffff, 0xffff  },  
+};
+
+
+/////////////////////
+// SnapshotLowLightMode
+/////////////////////
+s5k5ca_short_t s5k5ca_snapshot_low[] = 
+{
+
+//LowLight + Night Off
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },            
+                  
+{ 0x002A, 0x07E6  },
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+    
+{ 0x002A, 0x0838  },
+{ 0x0F12, 0x0A3C  },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x0908  },
+{ 0x0F12, 0x0446  },	//TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]
+                                             
+{ 0x002A, 0x0244  }, //Low lux capture//
+{ 0x0F12, 0x0001  }, //config 1 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  },
+  
+{ 0xffff, 0xffff  },  
+
+};
+
+s5k5ca_short_t s5k5ca_flashcapture_low_00[] =    
+{
+//{ 0xdddd, 0x0160  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms    
+
+//LowLight + Night Off
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },            
+{ 0x002A, 0x0388  }, //Capture Mode//
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  },
+  
+{ 0xffff, 0xffff  },  
+};
+
+
+
+////////////////////
+// SnapshotNightMode
+///////////////////
+
+s5k5ca_short_t s5k5ca_snapshot_nightmode_00[] = 
+{
+
+//LowLight
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },    
+{ 0x002A, 0x07E6  },
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+                                                     
+{ 0x002A, 0x0244  }, //Night capture//
+{ 0x0F12, 0x0002  }, //config 2 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+
+////////////////
+// NightMode_ON
+///////////////
+s5k5ca_short_t s5k5ca_nightmode_on[] = 
+{
+
+
+{ 0xffff, 0xffff  },            
+};
+
+////////////////
+// NightMode_OFF
+///////////////
+s5k5ca_short_t s5k5ca_nightmode_off[] = 
+{
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_NONFIX                     //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_nonfix[] = 
+{
+
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_15FIX                   //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_15fix[] = 
+{
+
+  
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_7FIX                    //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_7fix[] = 
+{
+
+                  
+{ 0xffff, 0xffff  },
+};
+
+
+/////////
+// ISO_AUTO
+/////////
+s5k5ca_short_t s5k5ca_iso_auto[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x1000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0x3415  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0x682A  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0x8235  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0x3415  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0x682A  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0x8235  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x01B3  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x02A0  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x0064  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  },
+  
+{ 0xffff, 0xffff  },
+};
+
+////////
+// ISO_50
+////////
+s5k5ca_short_t s5k5ca_iso50[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x1000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x0064  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// ISO_100
+////////
+s5k5ca_short_t s5k5ca_iso100[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x1800  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x0096  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+  
+// ///////
+// / ISO_200
+// ///////
+s5k5ca_short_t s5k5ca_iso200[] =
+{ 
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+  
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x2000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x00C8  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// ISO_400
+////////
+s5k5ca_short_t s5k5ca_iso400[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x3000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x012C  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+
+////////////////////
+// SCENE_PORTRAIT_OFF
+////////////////////
+s5k5ca_short_t s5k5ca_scene_portrait_off[] =
+{
+{ 0xFCFC, 0xD000  },                    
+{ 0x0028, 0x7000  },//For Scene//
+{ 0x002A, 0x020C  },
+{ 0x0F12, 0x0000  },// Brightness for controling the EV//
+{ 0x002A, 0x0210  },
+{ 0x0F12, 0x0000  },// Saturation//
+{ 0x0F12, 0x0000  },// Blur_Sharpness //  
+{ 0xffff, 0xffff  },  
+};     
+
+////////////////////
+// SCENE_LANDSCAPE_OFF
+////////////////////
+s5k5ca_short_t s5k5ca_scene_landscape_off[] =
+{
+{ 0xFCFC, 0xD000  },     
+{ 0x0028, 0x7000  },//For Scene//
+{ 0x002A, 0x020C  },
+{ 0x0F12, 0x0000  },// Brightness for controling the EV//
+{ 0x002A, 0x0210  },
+{ 0x0F12, 0x0000  },// Saturation//
+{ 0x0F12, 0x0000  },// Blur_Sharpness //  
+{ 0xffff, 0xffff  },
+};
+
+/////////////////
+// SCENE_SPORTS_OFF
+/////////////////
+s5k5ca_short_t s5k5ca_scene_sports_off[] =
+{
+{ 0x0028, 0x7000  },     
+
+{ 0x002A, 0x0530  },//lt_uMaxExp1//
+{ 0x0F12, 0x3415  },
+{ 0x002A, 0x0534  },//lt_uMaxExp2//
+{ 0x0F12, 0x682A  },
+{ 0x002A, 0x167C  },//lt_uMaxExp3//
+{ 0x0F12, 0x8235  },
+{ 0x002A, 0x1680  },//lt_uMaxExp4//
+{ 0x0F12, 0xc350  },
+{ 0x0F12, 0x0000  },
+                  
+{ 0x002A, 0x0538  },//It_uCapMaxExp1 //
+{ 0x0F12, 0x3415  },
+{ 0x002A, 0x053C  },//It_uCapMaxExp2 //
+{ 0x0F12, 0x682A  },
+{ 0x002A, 0x1684  },//It_uCapMaxExp3 // 
+{ 0x0F12, 0x8235  },
+{ 0x002A, 0x1688  },//It_uCapMaxExp4 //
+{ 0x0F12, 0xc350  },
+{ 0x0F12, 0x0000  },
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x01B3  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x02A0  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710  },   //MaxAnGain4 //
+                  
+{ 0x002A, 0x0544  },
+{ 0x0F12, 0x0100  },//It_uMaxDigGain //
+
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_sunset_off[] =
+{
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_dawn_off[] =
+{
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_againstlight_off[] =
+{
+//NOT USE
+	              
+{ 0xffff, 0xffff  }, 
+};
+
+
+s5k5ca_short_t s5k5ca_scene_text_off[] =
+{
+//NOT USE
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_portrait_on[] =
+{
+//NOT USE
+{ 0xffff, 0xffff  },
+};
+
+
+
+
+s5k5ca_t s5k5ca_reg[] = 
+{
+	// To do.
+};
+
+// For VGA ( 640 x 480) on 4CA module
+s5k5ca_t s5k5ca_reg_vga[] = 
+{
+	// To do.
+};
+
+// For SVGA ( 800 x 600) on 4CA module
+s5k5ca_t s5k5ca_reg_svga[] = 
+{
+	// To do.
+};
+
+// For SXGA (1280 x 1024 = 1.3M) on 4CA module
+s5k5ca_t s5k5ca_reg_sxga[] = 
+{
+	// To do.
+};
+
+// For UXGA (1600 x 1200 = 2M) on 4CA module
+s5k5ca_t s5k5ca_reg_uxga[] = 
+{
+	// To do.
+};
+
+// For SQVGA on 4CA module
+s5k5ca_t s5k5ca_reg_qsvga[] = 
+{
+	// To do.
+};
+
+#define S5K5CA_INIT_REGS (sizeof(s5k5ca_reg)/sizeof(s5k5ca_reg[0]))
+#define S5K5CA_UXGA_REGS (sizeof(s5k5ca_reg_uxga)/sizeof(s5k5ca_reg_uxga[0]))
+#define S5K5CA_SVGA_REGS (sizeof(s5k5ca_reg_svga)/sizeof(s5k5ca_reg_svga[0]))
+#define S5K5CA_VGA_REGS (sizeof(s5k5ca_reg_vga)/sizeof(s5k5ca_reg_vga[0]))
+#define S5K5CA_QSVGA_REGS (sizeof(s5k5ca_reg_qsvga)/sizeof(s5k5ca_reg_qsvga[0]))
+
+//#define S5K5CA_RISC_REGS 0xEB
+//#define S5K5CA_ISP_REGS 0xFB /* S5C7323X */
+//#define S5K5CA_CIS_REGS 0x2F /* S5K437LA03 */
+                                                                                                                                                                                              
+//#define S5K5CA_REGS (0x1000)
+
+
+
+//delay 100ms phone SW //
+
+
+s5k5ca_short_t s5k5ca_snapshot_fireworks_00[] = // scene mode fireworks
+{ 
+
+//LowLight
+{ 0xFCFC, 0xD000 }, 
+{ 0x0028, 0x7000 },    
+{ 0x002A, 0x07E6 },
+{ 0x0F12, 0x0028 },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0028 },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+				 
+{ 0x002A, 0x0244 }, //Night capture//
+{ 0x0F12, 0x0002 }, //config 2 //
+{ 0x002A, 0x0230 }, 
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0246 }, 
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0224 }, 
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x0001 },
+
+{ 0xdddd, 0x06A4 }, //delay 1500ms 0304 Night Mode Change 
+
+{ 0xffff, 0xffff },
+};
+
+
+
+
+
+//---------------------------------------//
+// case 23 : FPS_NONFIX                     //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_nonfix_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x0288  },
+{ 0x0F12, 0x0535  },
+{ 0x0F12, 0x029A  },
+
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0230  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x023E  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+	
+{ 0xffff, 0xffff  },	
+};
+
+//---------------------------------------//
+// case 23 : FPS_15FIX                   //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_15fix_00[] = 
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x02B8 },
+{ 0x0F12, 0x029A },
+{ 0x0F12, 0x029A },
+
+
+{ 0x002A, 0x023C }, //Normal Preview//
+{ 0x0F12, 0x0001 }, //config 1 //                                                  
+{ 0x002A, 0x0240 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0230 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x023E },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0220 }, 
+{ 0x0F12, 0x0001 },	
+{ 0x002A, 0x0222 }, 
+{ 0x0F12, 0x0001 },
+
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_7FIX                    //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_7fix_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x02B8  },
+{ 0x0F12, 0x0535  },
+{ 0x0F12, 0x0535  },
+
+
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0001  }, //config 1 //                                                  
+{ 0x002A, 0x0240  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0230  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x023E  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  },   
+                  
+{ 0xffff, 0xffff  },
+};
+
+////////////
+// EFFECT_OFF
+////////////
+s5k5ca_short_t s5k5ca_effect_off_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x3286  }, //Pre/Post gamma on(ç›”æ±—)
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0000  },
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 16 : MonoEffect                  //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_effect_gray_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0001  },
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 20 : NegativeEffect              //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_effect_negative_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0003  },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////
+// EFFECT_SEPIA
+/////////////
+s5k5ca_short_t s5k5ca_effect_sepia_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0004  },
+
+{ 0xffff, 0xffff  },
+};
+
+////////////
+// EFFECT_AQUA
+/////////////
+s5k5ca_short_t s5k5ca_effect_aqua_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0005  },
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 19 : GREENEffect(sketch)         //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_effect_sketch_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x3286  },
+{ 0x0F12, 0x0000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0006  },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////
+// WB_Auto
+/////////////
+s5k5ca_short_t s5k5ca_wb_auto_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x246E  },
+{ 0x0F12, 0x0001  },
+
+{ 0xffff, 0xffff  },
+};                
+
+///////////
+// WB_Sunny
+//////////
+s5k5ca_short_t s5k5ca_wb_sunny_00[] = 
+{ 
+{ 0xfcfc, 0xd000  }, 
+{ 0x0028, 0x7000  }, 
+{ 0x002a, 0x246E  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x002a, 0x04A0  }, 
+{ 0x0f12, 0x05E0  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0400  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0500  }, //0530
+{ 0x0f12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////
+// WB_Cloudy
+///////////
+s5k5ca_short_t s5k5ca_wb_cloudy_00[] = 
+{ 
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+{ 0x002a, 0x246E  },
+{ 0x0f12, 0x0000  },
+{ 0x002a, 0x04A0  },
+{ 0x0f12, 0x06E0  }, //06B0 
+{ 0x0f12, 0x0001  }, //0001 
+{ 0x0f12, 0x0400  }, //0400 
+{ 0x0f12, 0x0001  }, //0001 
+{ 0x0f12, 0x0448  }, //0460 
+{ 0x0f12, 0x0001  }, //0001 
+
+{ 0xffff, 0xffff  },
+};
+
+////////////
+// WB_Tungsten
+////////////
+s5k5ca_short_t s5k5ca_wb_tungsten_00[] = 
+{ 
+{ 0xfcfc, 0xd000  }, 
+{ 0x0028, 0x7000  }, 
+{ 0x002a, 0x246E  }, 
+{ 0x0f12, 0x0000  }, 
+
+{ 0x002a, 0x04A0  }, 
+{ 0x0f12, 0x03D0  },  //03D0
+{ 0x0f12, 0x0001  },  //0001
+{ 0x0f12, 0x0400  },  //0400
+{ 0x0f12, 0x0001  },  //0001
+{ 0x0f12, 0x0910  },  //0920
+{ 0x0f12, 0x0001  },  //0001 
+                  
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// WB_Flourescent
+///////////////
+s5k5ca_short_t s5k5ca_wb_fluorescent_00[] = 
+{ 
+{ 0xfcfc, 0xd000  }, 
+{ 0x0028, 0x7000  }, 
+{ 0x002a, 0x246E  }, 
+{ 0x0f12, 0x0000  }, 
+                     
+{ 0x002a, 0x04A0  }, 
+{ 0x0f12, 0x0530  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0400  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0800  }, 
+{ 0x0f12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+
+////////////
+// BR_Minus4
+///////////
+s5k5ca_short_t s5k5ca_br_minus4_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+//////////
+// BR_Minus3
+/////////
+s5k5ca_short_t s5k5ca_br_minus3_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+//////////
+// BR_Minus2
+//////////
+s5k5ca_short_t s5k5ca_br_minus2_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};                
+
+//////////
+// BR_Minus1
+//////////
+s5k5ca_short_t s5k5ca_br_minus1_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_ZERO
+////////
+s5k5ca_short_t s5k5ca_br_zero_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_Plus1
+/////////
+s5k5ca_short_t s5k5ca_br_plus1_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_Plus2
+/////////
+s5k5ca_short_t s5k5ca_br_plus2_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_Plus3
+/////////
+s5k5ca_short_t s5k5ca_br_plus3_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};                
+
+/////////
+// BR_Plus4
+/////////
+s5k5ca_short_t s5k5ca_br_plus4_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+
+////////////////////
+// SCENE_MODE_OFF
+////////////////////
+//////////////////////////////////////////////
+//////////Scene off///////////////////////////
+//////////////////////////////////////////////
+//01.None//
+//02.Sports off
+//03.Night off
+//////////////////////////////////////////////
+////////// CAM_REGSET_SCENE_NORMAL ///////////
+s5k5ca_short_t s5k5ca_scene_mode_off_00[] =
+{ 
+
+{ 0xFCFC, 0xD000 },   //WB Auto
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x246E },
+{ 0x0F12, 0x0001 },
+
+{ 0x0028, 0x7000 },   //For Scene//
+{ 0x002A, 0x020C },   
+{ 0x0F12, 0x0000 },   // Brightness for controling the EV//
+{ 0x002A, 0x0210 },   
+{ 0x0F12, 0x0000 },   // Saturation//
+{ 0x0F12, 0x0000 },   // Blur_Sharpness //  
+	
+///////////////////
+//02. Sports off //
+///////////////////
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x12B8 },  
+{ 0x0F12, 0x1000 }, 
+ 
+{ 0x002A, 0x0530 },   	                                                    
+{ 0x0F12, 0x3415 },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534 },                                                               
+{ 0x0F12, 0x682A },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C },                                                               
+{ 0x0F12, 0x8235 },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680 },                                                               
+{ 0x0F12, 0xc350 },   //MaxExp4   125ms  38ea //                           
+        
+{ 0x002A, 0x0538 },                                                               
+{ 0x0F12, 0x3415 },   // 15fps //                                                 
+{ 0x002A, 0x053C },                                                               
+{ 0x0F12, 0x682A },   // 7.5fps //                                                
+{ 0x002A, 0x1684 },                                                               
+{ 0x0F12, 0x8235 },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688 },                                                               
+{ 0x0F12, 0xC350 },   //CapMaxExp4 //                                             
+
+{ 0x002A, 0x0540 },                                                               
+{ 0x0F12, 0x01B3 },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3 },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C },                                                               
+{ 0x0F12, 0x02A0 },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710 },   //MaxAnGain4 //    
+
+{ 0x002A, 0x0544 },  
+{ 0x0F12, 0x0100 },
+{ 0x0F12, 0x8000 },
+
+{ 0x002A, 0x04B4 },  
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x0064 },
+{ 0x0F12, 0x0001 },
+
+//////////////////
+//03. Night off //
+//////////////////
+
+{ 0x0028, 0x7000 },
+
+{ 0x002A, 0x0530 },//lt_uMaxExp1//     
+{ 0x0F12, 0x3415 },                    
+{ 0x002A, 0x0534 },//lt_uMaxExp2//     
+{ 0x0F12, 0x682A },                    
+{ 0x002A, 0x167C },//lt_uMaxExp3//     
+{ 0x0F12, 0x8235 },                    
+{ 0x002A, 0x1680 },//lt_uMaxExp4//     
+{ 0x0F12, 0xc350 },                    
+{ 0x0F12, 0x0000 },                    
+                                     
+{ 0x002A, 0x0538 },//It_uCapMaxExp1 // 
+{ 0x0F12, 0x3415 },                    
+{ 0x002A, 0x053C },//It_uCapMaxExp2 // 
+{ 0x0F12, 0x682A },                    
+{ 0x002A, 0x1684 },//It_uCapMaxExp3 // 
+{ 0x0F12, 0x8235 },                    
+{ 0x002A, 0x1688 },//It_uCapMaxExp4 // 
+{ 0x0F12, 0xc350 },                    
+{ 0x0F12, 0x0000 },                    
+                                     
+{ 0x002A, 0x0540 },                                                               
+{ 0x0F12, 0x01B3 },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3 },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C },                                                               
+{ 0x0F12, 0x02A0 },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710 },   //MaxAnGain4 //
+                                     
+{ 0x002A, 0x0544 },                    
+{ 0x0F12, 0x0100 },//It_uMaxDigGain // 
+
+{ 0x002A, 0x07E6 },
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+
+{ 0x002A, 0x0838 },
+{ 0x0F12, 0x003C },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x023C },
+{ 0x0F12, 0x0000 },//REG_TC_GP_ActivePrevConfig     //Normal Preview //  
+{ 0x002A, 0x0240 },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_PrevOpenAfterChange  
+{ 0x002A, 0x0230 },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_NewConfigSync        
+{ 0x002A, 0x023E },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_PrevConfigChanged    
+{ 0x002A, 0x0220 },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_EnablePreview        
+{ 0x0F12, 0x0001 },   //REG_TC_GP_EnablePreviewChanged 
+
+//Metering Center
+{ 0xfcfc, 0xd000 },
+{ 0x0028, 0x7000 },             
+                                                            
+{ 0x002A, 0x0F7E },    //ae weight  //     
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0201 },  //0201
+{ 0x0F12, 0x0102 },  //0102
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0201 },  //0101
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0102 },  //0101
+{ 0x0F12, 0x0201 },  //0201
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0102 },  //0102
+{ 0x0F12, 0x0101 },  //0201
+{ 0x0F12, 0x0101 },  //0202
+{ 0x0F12, 0x0101 },  //0202
+{ 0x0F12, 0x0101 },  //0102
+
+{ 0xffff, 0xffff  },
+};
+
+////////////////////
+// SCENE_PORTRAIT_ON
+///////////////////
+s5k5ca_short_t s5k5ca_scene_portrait_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x020C },
+{ 0x0F12, 0x0000 },
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x0000 },
+{ 0x0F12, 0xFFF6 },
+
+{ 0xffff, 0xffff  },
+};
+
+ 
+////////////////////
+// SCENE_LANDSCAPE_ON
+///////////////////
+s5k5ca_short_t s5k5ca_scene_landscape_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x020C },
+{ 0x0F12, 0x0000 },
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x001E },
+{ 0x0F12, 0x000A },
+
+//Metering Matrix
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+                  
+{ 0x002a, 0x0F7E  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  },
+
+{ 0xffff, 0xffff  }, 
+};
+
+////////////////////
+// NIGHTMODE_ON
+///////////////////
+
+s5k5ca_short_t s5k5ca_nightmode_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },  
+{ 0x002A, 0x02CC },   //Night Preview
+{ 0x0F12, 0x0400 },	//REG_2TC_PCFG_usWidth                      	2   700002CC    // 
+{ 0x0F12, 0x0300 },   //REG_2TC_PCFG_usHeight                     	2   700002CE    // 
+{ 0x0F12, 0x0005 },   //REG_2TC_PCFG_Format                       	2   700002D0    // 
+{ 0x0F12, 0x32E8 },   //REG_2TC_PCFG_usMaxOut4KHzRate             	2   700002D2    // 
+{ 0x0F12, 0x32a8 },   //REG_2TC_PCFG_usMinOut4KHzRate             	2   700002D4    // 
+{ 0x0F12, 0x0100 },   //REG_2TC_PCFG_OutClkPerPix88               	2   700002D6    // 
+{ 0x0F12, 0x0800 },   //REG_2TC_PCFG_uMaxBpp88                    	2   700002D8    // 
+{ 0x0F12, 0x0072 },   //REG_2TC_PCFG_PVIMask                      	2   700002DA    // 
+{ 0x0F12, 0x0010 },   //REG_2TC_PCFG_OIFMask                      	2   700002DC    // 
+{ 0x0F12, 0x01E0 },   //REG_2TC_PCFG_usJpegPacketSize             	2   700002DE    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_usJpegTotalPackets           	2   700002E0    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_uClockInd                    	2   700002E2    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_usFrTimeType                 	2   700002E4    // 
+{ 0x0F12, 0x0001 },   //REG_2TC_PCFG_FrRateQualityType            	2   700002E6    // 
+{ 0x0F12, 0x09C4 },   //REG_2TC_PCFG_usMaxFrTimeMsecMult10        	2   700002E8    // 
+{ 0x0F12, 0x029A },   //REG_2TC_PCFG_usMinFrTimeMsecMult10        	2   700002EA    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_bSmearOutput                 	2   700002EC    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_sSaturation                  	2   700002EE    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_sSharpBlur                   	2   700002F0    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_sColorTemp                   	2   700002F2    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_uDeviceGammaIndex            	2   700002F4    // 
+{ 0x0F12, 0x0003 },   //REG_2TC_PCFG_uPrevMirror                  	2   700002F6    // 
+{ 0x0F12, 0x0003 },   //REG_2TC_PCFG_uCaptureMirror               	2   700002F8    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_uRotation                    	2   700002FA    // 
+                 
+{ 0x002A, 0x03B4 },   //Night Capture 
+{ 0x0F12, 0x0000 },	//REG_2TC_CCFG_uCaptureMode                 	2   700003B4          //
+{ 0x0F12, 0x0800 },   //REG_2TC_CCFG_usWidth                      	2   700003B6          //
+{ 0x0F12, 0x0600 },   //REG_2TC_CCFG_usHeight                     	2   700003B8          //
+{ 0x0F12, 0x0005 },   //REG_2TC_CCFG_Format                       	2   700003BA          //
+{ 0x0F12, 0x32E8 },   //REG_2TC_CCFG_usMaxOut4KHzRate             	2   700003BC          //
+{ 0x0F12, 0x32a8 },   //REG_2TC_CCFG_usMinOut4KHzRate             	2   700003BE          //
+{ 0x0F12, 0x0100 },   //REG_2TC_CCFG_OutClkPerPix88               	2   700003C0          //
+{ 0x0F12, 0x0800 },   //REG_2TC_CCFG_uMaxBpp88                    	2   700003C2          //
+{ 0x0F12, 0x0072 },   //REG_2TC_CCFG_PVIMask                      	2   700003C4          //
+{ 0x0F12, 0x0010 },   //REG_2TC_CCFG_OIFMask                      	2   700003C6          //
+{ 0x0F12, 0x01E0 },   //REG_2TC_CCFG_usJpegPacketSize             	2   700003C8          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_usJpegTotalPackets           	2   700003CA          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_uClockInd                    	2   700003CC          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_usFrTimeType                 	2   700003CE          //
+{ 0x0F12, 0x0002 },   //REG_2TC_CCFG_FrRateQualityType            	2   700003D0          //
+{ 0x0F12, 0x1388 },   //REG_2TC_CCFG_usMaxFrTimeMsecMult10        	2   700003D2          //
+{ 0x0F12, 0x1388 },   //REG_2TC_CCFG_usMinFrTimeMsecMult10        	2   700003D4          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_bSmearOutput                 	2   700003D6          //
+{ 0x0F12, 0x0030 },   //REG_2TC_CCFG_sSaturation                  	2   700003D8          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_sSharpBlur                   	2   700003DA          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_sColorTemp                   	2   700003DC          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_uDeviceGammaIndex            	2   700003DE          //
+                 
+                 
+{ 0x002A, 0x0208 },
+{ 0x0F12, 0x0001 },   //REG_TC_IPRM_InitParamsUpdated//
+                 
+                 
+{ 0x002A, 0x0530 },   //lt_uMaxExp1//     
+{ 0x0F12, 0x3415 },                       
+{ 0x002A, 0x0534 },   //lt_uMaxExp2//     
+{ 0x0F12, 0x682A },                       
+{ 0x002A, 0x167C },   //lt_uMaxExp3//     
+{ 0x0F12, 0x8235 },                       
+{ 0x002A, 0x1680 },   //lt_uMaxExp4//     
+{ 0x0F12, 0x1A80 },                       
+{ 0x0F12, 0x0006 },                       
+                                          
+{ 0x002A, 0x0538 },   //It_uCapMaxExp1 // 
+{ 0x0F12, 0x3415 },                       
+{ 0x002A, 0x053C },   //It_uCapMaxExp2 // 
+{ 0x0F12, 0x682A },                       
+{ 0x002A, 0x1684 },   //It_uCapMaxExp3 // 
+{ 0x0F12, 0x8235 },                       
+{ 0x002A, 0x1688 },   //It_uCapMaxExp4 // 
+{ 0x0F12, 0x1A80 },                       
+{ 0x0F12, 0x0006 },                       
+                                          
+{ 0x002A, 0x0540 },                       
+{ 0x0F12, 0x0180 },   //It_uMaxAnGain1 // 
+{ 0x0F12, 0x0250 },   //It_uMaxAnGain2 // 
+{ 0x002A, 0x168C },                       
+{ 0x0F12, 0x0340 },   //It_uMaxAnGain3 // 
+{ 0x0F12, 0x0800 },   //It_uMaxAnGain4 // 
+                                          
+{ 0x002A, 0x0544 },                       
+{ 0x0F12, 0x0100 },   //It_uMaxDigGain // 
+                 
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x07E6 },
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+                 
+{ 0x002A, 0x0838 },
+{ 0x0F12, 0x0A3C },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x023C },
+{ 0x0F12, 0x0002 },  //night preview config 2//
+{ 0x002A, 0x0240 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0230 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x023E },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0220 },
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x0001 },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////////
+// SCENE_SPORTS_ON
+////////////////
+s5k5ca_short_t s5k5ca_scene_sports_on_00[] =
+{
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+
+{ 0x002A, 0x12B8 },  
+{ 0x0F12, 0x2000 }, 
+
+{ 0x002A, 0x0530 },
+{ 0x0F12, 0x36B0 },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534 },                                                               
+{ 0x0F12, 0x36B0 },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C },                                                               
+{ 0x0F12, 0x36B0 },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680 },                                                               
+{ 0x0F12, 0x36B0 },   //MaxExp4   125ms  38ea //                           
+        
+{ 0x002A, 0x0538 },                                                               
+{ 0x0F12, 0x36B0 },   // 15fps //                                                 
+{ 0x002A, 0x053C },                                                               
+{ 0x0F12, 0x36B0 },   // 7.5fps //                                                
+{ 0x002A, 0x1684 },                                                               
+{ 0x0F12, 0x36B0 },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688 },                                                               
+{ 0x0F12, 0x36B0 },   //CapMaxExp4 //                                             
+ 
+{ 0x002A, 0x0540 },                                                               
+{ 0x0F12, 0x0200 },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200 },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C },                                                               
+{ 0x0F12, 0x0200 },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200 },   //MaxAnGain4 //    
+
+{ 0x002A, 0x0544 },  
+{ 0x0F12, 0x0100 },
+{ 0x0F12, 0x8000 },
+
+{ 0x002A, 0x04B4 },  
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x00C8 },
+{ 0x0F12, 0x0001 },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////////
+// SCENE_SUNSET_ON
+////////////////
+s5k5ca_short_t s5k5ca_scene_sunset_on_00[] =
+{ 
+{ 0xfcfc, 0xd000 },
+{ 0x0028, 0x7000 },
+{ 0x002a, 0x246E },
+{ 0x0f12, 0x0000 },
+                 
+{ 0x002a, 0x04A0 },
+{ 0x0f12, 0x05E0 },
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0400 },
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0500 },
+{ 0x0f12, 0x0001 },
+
+{ 0xffff, 0xffff  },
+};
+
+////////////////
+// SCENE_DAWN_ON
+////////////////
+s5k5ca_short_t s5k5ca_scene_dawn_on_00[] =
+{ 
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+
+//////////////////////
+// SCENE_AGAINSTLIGHT_ON
+//////////////////////
+s5k5ca_short_t s5k5ca_scene_againstlight_on_00[] =
+{ 
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_TEXT_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_text_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x020C },
+{ 0x0F12, 0x0000 },
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x0000 },
+{ 0x0F12, 0x0014 },
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_PARTY_INDOOR_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_party_indoor_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+                    // Party/indoor _ Shaturation +1
+{ 0x0028, 0x7000 }, //For Scene
+{ 0x002A, 0x020C },             
+{ 0x0F12, 0x0000 }, // Brightness for controling the EV
+{ 0x002A, 0x0210 }, 
+{ 0x0F12, 0x001e }, // Saturagon
+{ 0x0F12, 0x0000 }, // Sharpness
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_BEACH_SNOW_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_beach_snow_on_00[] =
+{ 
+//04. BEACH_SNOW
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 }, //For Scene
+{ 0x002A, 0x020C },             
+{ 0x0F12, 0x0014 }, // Brightness for controling the EV
+{ 0x002A, 0x0210 }, 
+{ 0x0F12, 0x001e }, // Saturagon
+{ 0x0F12, 0x0000 }, // Sharpness
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_CANDLELIGHT_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_candlelight_on_00[] =
+{ 
+
+{ 0xfcfc, 0xd000 }, 
+{ 0x0028, 0x7000 }, 
+{ 0x002a, 0x246E }, 	 
+{ 0x0f12, 0x0000 },
+
+{ 0x002a, 0x04A0 }, 	 
+{ 0x0f12, 0x05E0 },
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0400 }, 
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0500 },
+{ 0x0f12, 0x0001 }, 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_FIREWORKS_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_fireworks_on_00[] =
+{ 
+//09. FIRE _ Preview : (4fps Exposure 250ms) Capture : ( 1fps Exposure 1000ms )
+//Preview 4fps : Capture 1fps
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x02CC },
+{ 0x0F12, 0x0400 },    	//REG_2TC_PCFG_usWidth                      	2   700002CC        //
+{ 0x0F12, 0x0300 },    	//REG_2TC_PCFG_usHeight                     	2   700002CE        //
+{ 0x0F12, 0x0005 },    	//REG_2TC_PCFG_Format                       	2   700002D0        //
+{ 0x0F12, 0x32E8 },    	//REG_2TC_PCFG_usMaxOut4KHzRate             	2   700002D2        //
+{ 0x0F12, 0x32a8 },    	//REG_2TC_PCFG_usMinOut4KHzRate             	2   700002D4        //
+{ 0x0F12, 0x0100 },    	//REG_2TC_PCFG_OutClkPerPix88               	2   700002D6        //
+{ 0x0F12, 0x0800 },    	//REG_2TC_PCFG_uMaxBpp88                    	2   700002D8        //
+{ 0x0F12, 0x0072 },    	//REG_2TC_PCFG_PVIMask                      	2   700002DA        //
+{ 0x0F12, 0x0010 },    	//REG_2TC_PCFG_OIFMask                      	2   700002DC        //
+{ 0x0F12, 0x01E0 },    	//REG_2TC_PCFG_usJpegPacketSize             	2   700002DE        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_usJpegTotalPackets           	2   700002E0        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_uClockInd                    	2   700002E2        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_usFrTimeType                 	2   700002E4        //
+{ 0x0F12, 0x0001 },    	//REG_2TC_PCFG_FrRateQualityType            	2   700002E6        //
+{ 0x0F12, 0x09C4 },    	//REG_2TC_PCFG_usMaxFrTimeMsecMult10        	2   700002E8        //
+{ 0x0F12, 0x029A },    	//REG_2TC_PCFG_usMinFrTimeMsecMult10        	2   700002EA        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_bSmearOutput                 	2   700002EC        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_sSaturation                  	2   700002EE        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_sSharpBlur                   	2   700002F0        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_sColorTemp                   	2   700002F2        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_uDeviceGammaIndex            	2   700002F4        //
+{ 0x0F12, 0x0003 },    	//REG_2TC_PCFG_uPrevMirror                  	2   700002F6        //
+{ 0x0F12, 0x0003 },    	//REG_2TC_PCFG_uCaptureMirror               	2   700002F8        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_uRotation                    	2   700002FA        //
+
+//Night shot capture 2fps
+{ 0x002A, 0x03B4 },
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_uCaptureMode                 	2   700003B4              //
+{ 0x0F12, 0x0800 },    	//REG_2TC_CCFG_usWidth                      	2   700003B6              //
+{ 0x0F12, 0x0600 },    	//REG_2TC_CCFG_usHeight                     	2   700003B8              //
+{ 0x0F12, 0x0005 },    	//REG_2TC_CCFG_Format                       	2   700003BA              //
+{ 0x0F12, 0x32E8 },    	//REG_2TC_CCFG_usMaxOut4KHzRate             	2   700003BC              //
+{ 0x0F12, 0x32a8 },    	//REG_2TC_CCFG_usMinOut4KHzRate             	2   700003BE              //
+{ 0x0F12, 0x0100 },    	//REG_2TC_CCFG_OutClkPerPix88               	2   700003C0              //
+{ 0x0F12, 0x0800 },    	//REG_2TC_CCFG_uMaxBpp88                    	2   700003C2              //
+{ 0x0F12, 0x0072 },    	//REG_2TC_CCFG_PVIMask                      	2   700003C4              //
+{ 0x0F12, 0x0010 },    	//REG_2TC_CCFG_OIFMask                      	2   700003C6              //
+{ 0x0F12, 0x01E0 },    	//REG_2TC_CCFG_usJpegPacketSize             	2   700003C8              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_usJpegTotalPackets           	2   700003CA              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_uClockInd                    	2   700003CC              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_usFrTimeType                 	2   700003CE              //
+{ 0x0F12, 0x0002 },    	//REG_2TC_CCFG_FrRateQualityType            	2   700003D0              //
+{ 0x0F12, 0x2710 },	//REG_2TC_CCFG_usMaxFrTimeMsecMult10        	2   700003D2              //
+{ 0x0F12, 0x2710 },	//REG_2TC_CCFG_usMinFrTimeMsecMult10        	2   700003D4              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_bSmearOutput                 	2   700003D6              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_sSaturation                  	2   700003D8              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_sSharpBlur                   	2   700003DA              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_sColorTemp                   	2   700003DC              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_uDeviceGammaIndex            	2   700003DE              //
+
+{ 0x002A, 0x0208 },                                      
+{ 0x0F12, 0x0001 },       //REG_TC_IPRM_InitParamsUpdated//
+
+{ 0x002A, 0x0530 },	//lt_uMaxExp1             
+{ 0x0F12, 0x3415 },		
+{ 0x002A, 0x0534 },       //lt_uMaxExp2              
+{ 0x0F12, 0x682A },		
+{ 0x002A, 0x167C },       //lt_uMaxExp3              
+{ 0x0F12, 0x8235 },		
+{ 0x002A, 0x1680 },       //lt_uMaxExp4              
+{ 0x0F12, 0x1A80 },       //1fps
+{ 0x0F12, 0x0006 },
+                              
+{ 0x002A, 0x0538 },       //It_uCapMaxExp1 //              
+{ 0x0F12, 0x3415 },	  
+{ 0x002A, 0x053C },       //It_uCapMaxExp1 //             
+{ 0x0F12, 0x682A },	  
+{ 0x002A, 0x1684 },       //It_uCapMaxExp3 //              
+{ 0x0F12, 0x8235 },	
+{ 0x002A, 0x1688 },       //It_uCapMaxExp4 //             
+{ 0x0F12, 0x1A80 },       //1fps
+{ 0x0F12, 0x0006 },	
+                              
+{ 0x002A, 0x0540 },                     
+{ 0x0F12, 0x0180 },       //It_uMaxAnGain1 //
+{ 0x0F12, 0x0250 },	//It_uMaxAnGain2 //
+{ 0x002A, 0x168C },                     
+{ 0x0F12, 0x0340 },	//It_uMaxAnGain3 //
+{ 0x0F12, 0x0710 },	//It_uMaxAnGain4 //
+
+{ 0x002A, 0x0544 },       //It_uMaxDigGain //
+{ 0x0F12, 0x0100 },
+
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x023C },
+{ 0x0F12, 0x0002 },	//#REG_TC_GP_ActivePrevConfig     //Night Preview
+{ 0x002A, 0x0240 },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_PrevOpenAfterChange
+{ 0x002A, 0x0230 },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_NewConfigSync
+{ 0x002A, 0x023E },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_PrevConfigChanged
+{ 0x002A, 0x0220 },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_EnablePreview
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_EnablePreviewChanged
+ 
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_Dust_Dawn_On
+///////////////
+s5k5ca_short_t s5k5ca_scene_dust_dawn_00[] =
+{ 
+//Cam_Cfg_WB_Fluorescent
+{ 0xfcfc, 0xd000 }, 
+{ 0x0028, 0x7000 }, 
+{ 0x002a, 0x246E }, 	 
+{ 0x0f12, 0x0000 },
+
+{ 0x002a, 0x04A0 }, 	 
+{ 0x0f12, 0x0530 }, 
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0400 }, 
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0800 }, 
+{ 0x0f12, 0x0001 }, 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_Fall_Color_On
+///////////////
+s5k5ca_short_t s5k5ca_scene_fall_color_00[] =
+{ 
+//07. FALL
+{ 0xFCFC, 0xD000 },
+//  Fall  _ Saturation +2
+{ 0x0028, 0x7000 }, //For Scene
+{ 0x002A, 0x020C },             
+{ 0x0F12, 0x0000 }, // Brightness for controling the EV
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x0032 }, // Saturation
+{ 0x0F12, 0x0000 }, // Sharpness
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_Backlight_On
+///////////////
+s5k5ca_short_t s5k5ca_scene_backlight_00[] =
+{ 
+//Metering Center
+//Flash On Default
+{ 0xfcfc, 0xd000 },
+{ 0x0028, 0x7000 },
+                 
+{ 0x002A, 0x0F7E  },    //ae weight  //     
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0201
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0102
+
+{ 0xffff, 0xffff  },
+};
+
+
+
+
+////////////////////////
+// MeasureBrightness_SPOT
+///////////////////////
+s5k5ca_short_t s5k5ca_measure_brightness_spot_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////////////////
+// MeasureBrightness_Default
+//////////////////////////
+s5k5ca_short_t s5k5ca_measure_brightness_default_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+#if 1//PGH 
+s5k5ca_short_t s5k5ca_ae_awb_unlock[] = 
+{
+{ 0xffff, 0xffff  },
+
+};
+ 
+s5k5ca_short_t s5k5ca_ae_mwb_unlock[] = 
+{
+{ 0xffff, 0xffff  },
+
+};
+ 
+s5k5ca_short_t s5k5ca_ae_awb_lock[] = 
+{
+{ 0xffff, 0xffff  },
+
+};
+#endif//PGH
+
+
+s5k5ca_short_t s5k5ca_af_low_lux_val[] = 
+{ //0217 SEMCO
+
+{ 0xffff, 0xffff  },
+};
+	 
+s5k5ca_short_t s5k5ca_af_normal_lux_val[] = 
+{
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////////////////////
+// MeasureBrightness_CENTER
+/////////////////////////////
+s5k5ca_short_t s5k5ca_measure_brightness_center_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+// 0407 function add.
+
+s5k5ca_short_t s5k5ca_metering_spot[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+                    
+{ 0x002A, 0x0F7E  },
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0f01  }, 
+{ 0x0f12, 0x010f  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0f01  }, 
+{ 0x0f12, 0x010f  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  },
+
+{ 0xffff, 0xffff  },
+
+};
+
+s5k5ca_short_t s5k5ca_metering_matrix[] = 
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+                  
+{ 0x002a, 0x0F7E  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  },
+
+{ 0xffff, 0xffff  },
+
+};
+
+s5k5ca_short_t s5k5ca_metering_center[] = 
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },             
+                                                             
+{ 0x002A, 0x0F7E  },    //ae weight  //     
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0201
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0102
+
+{ 0xffff, 0xffff  },
+
+};
+
+
+
+
+
+//define S5K5CA_INIT_REGS (sizeof(s5k5ca_reg)/sizeof(s5k5ca_reg[0]))
+//define S5K5CA_UXGA_REGS (sizeof(s5k5ca_reg_uxga)/sizeof(s5k5ca_reg_uxga[0]))
+//define S5K5CA_SVGA_REGS (sizeof(s5k5ca_reg_svga)/sizeof(s5k5ca_reg_svga[0]))
+//define S5K5CA_VGA_REGS (sizeof(s5k5ca_reg_vga)/sizeof(s5k5ca_reg_vga[0]))
+//define S5K5CA_QSVGA_REGS (sizeof(s5k5ca_reg_qsvga)/sizeof(s5k5ca_reg_qsvga[0]))
+
+////define S5K5CA_RISC_REGS 0xEB
+////define S5K5CA_ISP_REGS 0xFB /* S5C7323X */
+////define S5K5CA_CIS_REGS 0x2F /* S5K437LA03 */
+                                                                                                                                                                                              
+////define S5K5CA_REGS (0x1000)
+
+//endif
+
+
+
+#endif
diff -uNra linux-3.0.82/drivers/media/video/s5k5ca640x480xs5k5caxyuv.h linux-3.0.82x/drivers/media/video/s5k5ca640x480xs5k5caxyuv.h
--- linux-3.0.82/drivers/media/video/s5k5ca640x480xs5k5caxyuv.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/s5k5ca640x480xs5k5caxyuv.h	2017-09-23 03:42:49.586676384 +0800
@@ -0,0 +1,5403 @@
+
+#ifndef _SAMSUNG_SXGA_H_
+#define _SAMSUNG_SXGA_H_
+
+/*******************************************************************************************
+ #  Display resolution standards #
+
+	QCIF: 176 x 144
+	CIF: 352 x 288
+	QVGA: 320 x 240
+	VGA: 640 x 480 
+	SVGA: 800 x 600 
+	XGA: 1024 x 768 
+	WXGA: 1280 x 800 
+	QVGA: 1280 x 960 
+	SXGA: 1280 x 1024 
+	SXGA+: 1400 x 1050 
+	WSXGA+: 1680 x 1050 
+	UXGA: 1600 x 1200 
+	WUXGA: 1920 x 1200 
+	QXGA: 2048 x 1536
+********************************************************************************************/
+
+//#include "../bits.h"
+
+/* Camera information 
+ * FPC Label : Samsung MEGA Pixel Camera : V4220 REV06 
+ * Modified by charles -Initial function of '3AA' test routine
+ * Modified and tested by YongHwui.Kim <yonghwui.kim@samsung.com> for S5K3AAEX Camera
+ */
+                                                                                
+#define CHIP_DELAY 0xFF
+                                                                                
+typedef struct samsung_t{
+        unsigned short page;	
+        unsigned short subaddr;
+        unsigned short value;
+
+} s5k5ca_t;
+
+// mihee 080508 start
+typedef struct samsung_short_t{
+        unsigned short subaddr;
+        unsigned short value;
+        unsigned short page;
+} s5k5ca_short_t;
+// mihee 080508 end
+
+typedef struct exif_data_st{
+        unsigned short exposureTime;
+		unsigned short lux;
+		unsigned short iso;
+} exif_data_t;
+
+#ifdef CONFIG_CPU_S3C24A0A
+#define TRY_HIGH_CLOCK 1
+#endif
+
+				//***************************************************
+				//  name: 	S5K3AAEX EVT2 setfile
+				//  ver:		v2.61	
+				//  history: 	
+				//	v0.0	start from 040908 setfile
+				//	v1.0	arange register
+				//	v1.01	change MCLK(25Mhz) and Frame rate(7fps)
+				//	v2.0	adjust register setting for 3AA EVT2
+				//		- color correction, RGB shding off, hsync start position, Mirror, fps
+				//		- Color Tuning, YGRPDLY 
+				//	v2.1	change Frame rate(7.5fps) and Total gain to x4 
+				//		(because of reducing visual noise at low illumination)
+				//		- change BPRM AGC Max and FrameAE start 
+				//		improve AE speed
+				//	v2.2	modify AWB G gain and solve 50hz flicker detection fail in 25MHz 7.5fps
+				//	v2.3	Adjust gamma, Dark Slice, white point, Hue gain,
+				//		White Balance B control, Y gain On, Digital Clamp On
+				//		lower AWB G gain
+				//	v2.4	Adjust AE window weight, Y Gamma, WhitePoint, Shading and BPR Max Thres.
+				// 	v2.41	Adjust AE/AWB window and AWB internal window boundary to decrease skin color tracking
+				// 	v2.411	special version for PSCDS
+				// 	v2.412	RGB shading off
+				//	v2.5	Lens change STW to Sekonix 
+				//		adjust White point and Y shading Coef (RGB shading off)
+				//	v2.6	New Tuning because of Full YC off and YCbCr Coef change
+				//		Gamma, Dark Slice, color matrix (not use), Color suppress
+				//		R Gain and DBPR agc MIN/MAX
+				//	v2.61	VCK inversion(data rising)
+				//***************************************************
+				///////////////////////////////////////////////////
+
+//#if defined(CONFIG_VIDEO_SAMSUNG_S5K5CA)
+s5k5ca_short_t s5k5ca_preview_00[] = 
+{
+{ 0xFCFC, 0xD000  },                                                                                  
+{ 0x0028, 0x7000  }, 
+                  
+{ 0x002A, 0x07E6  },                                                            
+{ 0x0F12, 0x0000  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow 
+{ 0x0F12, 0x0000  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+                  
+{ 0x002A, 0x0838  },
+{ 0x0F12, 0x003C  },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x0908  },
+{ 0x0F12, 0x0046  },	//TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]
+
+//HIGHLUX RECOVER Value
+{ 0x002a, 0x0B2C  },
+{ 0x0F12, 0x003C  },	//70000B2C //TVAR_afit_pBaseValS[436] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x0050  },	//70000B2E //TVAR_afit_pBaseValS[437] /AFIT16_YUV422_DENOISE_iUVHighThresh  
+
+{ 0x002a, 0x0B50  },
+{ 0x0F12, 0x012D  },	//70000B50 //TVAR_afit_pBaseValS[454] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8] 
+
+{ 0x002a, 0x0B84  },
+{ 0x0F12, 0x210C  },	//70000B84 //TVAR_afit_pBaseValS[480] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]   
+
+
+{ 0x002A, 0x035C  }, //Capture Mode//
+{ 0x0F12, 0x0000  },
+{ 0x002A, 0x0388  }, //Capture Mode//
+{ 0x0F12, 0x0000  },
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },   
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+s5k5ca_short_t s5k5ca_init_00[] = 
+{
+{ 0xFCFC, 0xD000  },
+
+//************************************//
+////****************************************/																															//
+////Ver 0.1 New Analog Settings for 5CA EVT0 30FPS in Binning, including latest TnP for EVT1              //
+////20091310 - added analog settings for 430LSB, long exposure mode only. Settings are for 32MHz Sys. CLK //
+////20091102 - added all calibration data, final settings for STW EVT1 module, SCLK 32MHz, PCLK 60 MHz.   //
+////20091104 - Changed the shading alpha &Near off                                                        //
+////20091104 - Changed awbb_GridEnable from 0001h to 0002h	//awbb_GridEnable                             //
+////aetarget41-46, gamma change for improving contrast                                                    //
+////20100113 - New TnP updated//
+
+{ 0xFCFC, 0xD000  },	//Reset                                  //
+{ 0x0010, 0x0001  },   //Clear host interrupt so main will wait //
+{ 0x1030, 0x0000  },   //ARM go                                 //
+{ 0x0014, 0x0001  },   //Wait100mSec
+                  
+{ 0xdddd, 0x0064  }, //delay 100ms
+                  
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x2CF8  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0x4827  },
+{ 0x0F12, 0x21C0  },
+{ 0x0F12, 0x8041  },
+{ 0x0F12, 0x4825  },
+{ 0x0F12, 0x4A26  },
+{ 0x0F12, 0x3020  },
+{ 0x0F12, 0x8382  },
+{ 0x0F12, 0x1D12  },
+{ 0x0F12, 0x83C2  },
+{ 0x0F12, 0x4822  },
+{ 0x0F12, 0x3040  },
+{ 0x0F12, 0x8041  },
+{ 0x0F12, 0x4821  },
+{ 0x0F12, 0x4922  },
+{ 0x0F12, 0x3060  },
+{ 0x0F12, 0x8381  },
+{ 0x0F12, 0x1D09  },
+{ 0x0F12, 0x83C1  },
+{ 0x0F12, 0x4821  },
+{ 0x0F12, 0x491D  },
+{ 0x0F12, 0x8802  },
+{ 0x0F12, 0x3980  },
+{ 0x0F12, 0x804A  },
+{ 0x0F12, 0x8842  },
+{ 0x0F12, 0x808A  },
+{ 0x0F12, 0x8882  },
+{ 0x0F12, 0x80CA  },
+{ 0x0F12, 0x88C2  },
+{ 0x0F12, 0x810A  },
+{ 0x0F12, 0x8902  },
+{ 0x0F12, 0x491C  },
+{ 0x0F12, 0x80CA  },
+{ 0x0F12, 0x8942  },
+{ 0x0F12, 0x814A  },
+{ 0x0F12, 0x8982  },
+{ 0x0F12, 0x830A  },
+{ 0x0F12, 0x89C2  },
+{ 0x0F12, 0x834A  },
+{ 0x0F12, 0x8A00  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x8188  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x4819  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xFA0E  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x4819  },
+{ 0x0F12, 0x6341  },
+{ 0x0F12, 0x4919  },
+{ 0x0F12, 0x4819  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xFA07  },
+{ 0x0F12, 0x4816  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x3840  },
+{ 0x0F12, 0x62C1  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x3880  },
+{ 0x0F12, 0x63C1  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x6301  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x3040  },
+{ 0x0F12, 0x6181  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x4817  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9F7  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x4817  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9F3  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x4817  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9EF  },
+{ 0x0F12, 0xBC10  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0x1100  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x267C  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x2CE8  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x3274  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xF400  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0xF520  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2DF1  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x89A9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x2E43  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x0140  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2E7D  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xB4F7  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x2F07  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2F2B  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2FD1  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2FE5  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2FB9  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x013D  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x306B  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x5823  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x30B9  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xD789  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0xB570  },
+{ 0x0F12, 0x6804  },
+{ 0x0F12, 0x6845  },
+{ 0x0F12, 0x6881  },
+{ 0x0F12, 0x6840  },
+{ 0x0F12, 0x2900  },
+{ 0x0F12, 0x6880  },
+{ 0x0F12, 0xD007  },
+{ 0x0F12, 0x49C3  },
+{ 0x0F12, 0x8949  },
+{ 0x0F12, 0x084A  },
+{ 0x0F12, 0x1880  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9BA  },
+{ 0x0F12, 0x80A0  },
+{ 0x0F12, 0xE000  },
+{ 0x0F12, 0x80A0  },
+{ 0x0F12, 0x88A0  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD010  },
+{ 0x0F12, 0x68A9  },
+{ 0x0F12, 0x6828  },
+{ 0x0F12, 0x084A  },
+{ 0x0F12, 0x1880  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9AE  },
+{ 0x0F12, 0x8020  },
+{ 0x0F12, 0x1D2D  },
+{ 0x0F12, 0xCD03  },
+{ 0x0F12, 0x084A  },
+{ 0x0F12, 0x1880  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9A7  },
+{ 0x0F12, 0x8060  },
+{ 0x0F12, 0xBC70  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0x2000  },
+{ 0x0F12, 0x8060  },
+{ 0x0F12, 0x8020  },
+{ 0x0F12, 0xE7F8  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9A2  },
+{ 0x0F12, 0x48B2  },
+{ 0x0F12, 0x8A40  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD00C  },
+{ 0x0F12, 0x48B1  },
+{ 0x0F12, 0x49B2  },
+{ 0x0F12, 0x8800  },
+{ 0x0F12, 0x4AB2  },
+{ 0x0F12, 0x2805  },
+{ 0x0F12, 0xD003  },
+{ 0x0F12, 0x4BB1  },
+{ 0x0F12, 0x795B  },
+{ 0x0F12, 0x2B00  },
+{ 0x0F12, 0xD005  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0x8008  },
+{ 0x0F12, 0x8010  },
+{ 0x0F12, 0xBC10  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD1FA  },
+{ 0x0F12, 0x2000  },
+{ 0x0F12, 0x8008  },
+{ 0x0F12, 0x8010  },
+{ 0x0F12, 0xE7F6  },
+{ 0x0F12, 0xB5F8  },
+{ 0x0F12, 0x2407  },
+{ 0x0F12, 0x2C06  },
+{ 0x0F12, 0xD035  },
+{ 0x0F12, 0x2C07  },
+{ 0x0F12, 0xD033  },
+{ 0x0F12, 0x48A3  },
+{ 0x0F12, 0x8BC1  },
+{ 0x0F12, 0x2900  },
+{ 0x0F12, 0xD02A  },
+{ 0x0F12, 0x00A2  },
+{ 0x0F12, 0x1815  },
+{ 0x0F12, 0x4AA4  },
+{ 0x0F12, 0x6DEE  },
+{ 0x0F12, 0x8A92  },
+{ 0x0F12, 0x4296  },
+{ 0x0F12, 0xD923  },
+{ 0x0F12, 0x0028  },
+{ 0x0F12, 0x3080  },
+{ 0x0F12, 0x0007  },
+{ 0x0F12, 0x69C0  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF96B  },
+{ 0x0F12, 0x1C71  },
+{ 0x0F12, 0x0280  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF967  },
+{ 0x0F12, 0x0006  },
+{ 0x0F12, 0x4898  },
+{ 0x0F12, 0x0061  },
+{ 0x0F12, 0x1808  },
+{ 0x0F12, 0x8D80  },
+{ 0x0F12, 0x0A01  },
+{ 0x0F12, 0x0600  },
+{ 0x0F12, 0x0E00  },
+{ 0x0F12, 0x1A08  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF96A  },
+{ 0x0F12, 0x0002  },
+{ 0x0F12, 0x6DE9  },
+{ 0x0F12, 0x6FE8  },
+{ 0x0F12, 0x1A08  },
+{ 0x0F12, 0x4351  },
+{ 0x0F12, 0x0300  },
+{ 0x0F12, 0x1C49  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF953  },
+{ 0x0F12, 0x0401  },
+{ 0x0F12, 0x0430  },
+{ 0x0F12, 0x0C00  },
+{ 0x0F12, 0x4301  },
+{ 0x0F12, 0x61F9  },
+{ 0x0F12, 0xE004  },
+{ 0x0F12, 0x00A2  },
+{ 0x0F12, 0x4990  },
+{ 0x0F12, 0x1810  },
+{ 0x0F12, 0x3080  },
+{ 0x0F12, 0x61C1  },
+{ 0x0F12, 0x1E64  },
+{ 0x0F12, 0xD2C5  },
+{ 0x0F12, 0x2006  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF959  },
+{ 0x0F12, 0x2007  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF956  },
+{ 0x0F12, 0xBCF8  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF958  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD00A  },
+{ 0x0F12, 0x4881  },
+{ 0x0F12, 0x8B81  },
+{ 0x0F12, 0x0089  },
+{ 0x0F12, 0x1808  },
+{ 0x0F12, 0x6DC1  },
+{ 0x0F12, 0x4883  },
+{ 0x0F12, 0x8A80  },
+{ 0x0F12, 0x4281  },
+{ 0x0F12, 0xD901  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0xE7A1  },
+{ 0x0F12, 0x2000  },
+{ 0x0F12, 0xE79F  },
+{ 0x0F12, 0xB5F8  },
+{ 0x0F12, 0x0004  },
+{ 0x0F12, 0x4F80  },
+{ 0x0F12, 0x227D  },
+{ 0x0F12, 0x8938  },
+{ 0x0F12, 0x0152  },
+{ 0x0F12, 0x4342  },
+{ 0x0F12, 0x487E  },
+{ 0x0F12, 0x9000  },
+{ 0x0F12, 0x8A01  },
+{ 0x0F12, 0x0848  },
+{ 0x0F12, 0x1810  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91D  },
+{ 0x0F12, 0x210F  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF940  },
+{ 0x0F12, 0x497A  },
+{ 0x0F12, 0x8C49  },
+{ 0x0F12, 0x090E  },
+{ 0x0F12, 0x0136  },
+{ 0x0F12, 0x4306  },
+{ 0x0F12, 0x4979  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0xD003  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0x0240  },
+{ 0x0F12, 0x4330  },
+{ 0x0F12, 0x8108  },
+{ 0x0F12, 0x4876  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0x8D00  },
+{ 0x0F12, 0xD001  },
+{ 0x0F12, 0x2501  },
+{ 0x0F12, 0xE000  },
+{ 0x0F12, 0x2500  },
+{ 0x0F12, 0x4972  },
+{ 0x0F12, 0x4328  },
+{ 0x0F12, 0x8008  },
+{ 0x0F12, 0x207D  },
+{ 0x0F12, 0x00C0  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF92E  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0x496E  },
+{ 0x0F12, 0x0328  },
+{ 0x0F12, 0x4330  },
+{ 0x0F12, 0x8108  },
+{ 0x0F12, 0x88F8  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0x01AA  },
+{ 0x0F12, 0x4310  },
+{ 0x0F12, 0x8088  },
+{ 0x0F12, 0x9800  },
+{ 0x0F12, 0x8A01  },
+{ 0x0F12, 0x486A  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8F1  },
+{ 0x0F12, 0x496A  },
+{ 0x0F12, 0x8809  },
+{ 0x0F12, 0x4348  },
+{ 0x0F12, 0x0400  },
+{ 0x0F12, 0x0C00  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF918  },
+{ 0x0F12, 0x0020  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91D  },
+{ 0x0F12, 0x4866  },
+{ 0x0F12, 0x7004  },
+{ 0x0F12, 0xE7A3  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0x0004  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91E  },
+{ 0x0F12, 0x6020  },
+{ 0x0F12, 0x4963  },
+{ 0x0F12, 0x8B49  },
+{ 0x0F12, 0x0789  },
+{ 0x0F12, 0xD001  },
+{ 0x0F12, 0x0040  },
+{ 0x0F12, 0x6020  },
+{ 0x0F12, 0xE74C  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91B  },
+{ 0x0F12, 0x485F  },
+{ 0x0F12, 0x8880  },
+{ 0x0F12, 0x0601  },
+{ 0x0F12, 0x4854  },
+{ 0x0F12, 0x1609  },
+{ 0x0F12, 0x8141  },
+{ 0x0F12, 0xE742  },
+{ 0x0F12, 0xB5F8  },
+{ 0x0F12, 0x000F  },
+{ 0x0F12, 0x4C55  },
+{ 0x0F12, 0x3420  },
+{ 0x0F12, 0x2500  },
+{ 0x0F12, 0x5765  },
+{ 0x0F12, 0x0039  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF913  },
+{ 0x0F12, 0x9000  },
+{ 0x0F12, 0x2600  },
+{ 0x0F12, 0x57A6  },
+{ 0x0F12, 0x4C4C  },
+{ 0x0F12, 0x42AE  },
+{ 0x0F12, 0xD01B  },
+{ 0x0F12, 0x4D54  },
+{ 0x0F12, 0x8AE8  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD013  },
+{ 0x0F12, 0x484D  },
+{ 0x0F12, 0x8A01  },
+{ 0x0F12, 0x8B80  },
+{ 0x0F12, 0x4378  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8B5  },
+{ 0x0F12, 0x89A9  },
+{ 0x0F12, 0x1A41  },
+{ 0x0F12, 0x484E  },
+{ 0x0F12, 0x3820  },
+{ 0x0F12, 0x8AC0  },
+{ 0x0F12, 0x4348  },
+{ 0x0F12, 0x17C1  },
+{ 0x0F12, 0x0D89  },
+{ 0x0F12, 0x1808  },
+{ 0x0F12, 0x1280  },
+{ 0x0F12, 0x8961  },
+{ 0x0F12, 0x1A08  },
+{ 0x0F12, 0x8160  },
+{ 0x0F12, 0xE003  },
+{ 0x0F12, 0x88A8  },
+{ 0x0F12, 0x0600  },
+{ 0x0F12, 0x1600  },
+{ 0x0F12, 0x8160  },
+{ 0x0F12, 0x200A  },
+{ 0x0F12, 0x5E20  },
+{ 0x0F12, 0x42B0  },
+{ 0x0F12, 0xD011  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8AB  },
+{ 0x0F12, 0x1D40  },
+{ 0x0F12, 0x00C3  },
+{ 0x0F12, 0x1A18  },
+{ 0x0F12, 0x214B  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF897  },
+{ 0x0F12, 0x211F  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8BA  },
+{ 0x0F12, 0x210A  },
+{ 0x0F12, 0x5E61  },
+{ 0x0F12, 0x0FC9  },
+{ 0x0F12, 0x0149  },
+{ 0x0F12, 0x4301  },
+{ 0x0F12, 0x483D  },
+{ 0x0F12, 0x81C1  },
+{ 0x0F12, 0x9800  },
+{ 0x0F12, 0xE74A  },
+{ 0x0F12, 0xB5F1  },
+{ 0x0F12, 0xB082  },
+{ 0x0F12, 0x2500  },
+{ 0x0F12, 0x483A  },
+{ 0x0F12, 0x9001  },
+{ 0x0F12, 0x2400  },
+{ 0x0F12, 0x2028  },
+{ 0x0F12, 0x4368  },
+{ 0x0F12, 0x4A39  },
+{ 0x0F12, 0x4925  },
+{ 0x0F12, 0x1887  },
+{ 0x0F12, 0x1840  },
+{ 0x0F12, 0x9000  },
+{ 0x0F12, 0x9800  },
+{ 0x0F12, 0x0066  },
+{ 0x0F12, 0x9A01  },
+{ 0x0F12, 0x1980  },
+{ 0x0F12, 0x218C  },
+{ 0x0F12, 0x5A09  },
+{ 0x0F12, 0x8A80  },
+{ 0x0F12, 0x8812  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8CA  },
+{ 0x0F12, 0x53B8  },
+{ 0x0F12, 0x1C64  },
+{ 0x0F12, 0x2C14  },
+{ 0x0F12, 0xDBF1  },
+{ 0x0F12, 0x1C6D  },
+{ 0x0F12, 0x2D03  },
+{ 0x0F12, 0xDBE6  },
+{ 0x0F12, 0x9802  },
+{ 0x0F12, 0x6800  },
+{ 0x0F12, 0x0600  },
+{ 0x0F12, 0x0E00  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8C5  },
+{ 0x0F12, 0xBCFE  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0xB570  },
+{ 0x0F12, 0x6805  },
+{ 0x0F12, 0x2404  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8C5  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD103  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8C9  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2400  },
+{ 0x0F12, 0x3540  },
+{ 0x0F12, 0x88E8  },
+{ 0x0F12, 0x0500  },
+{ 0x0F12, 0xD403  },
+{ 0x0F12, 0x4822  },
+{ 0x0F12, 0x89C0  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD002  },
+{ 0x0F12, 0x2008  },
+{ 0x0F12, 0x4304  },
+{ 0x0F12, 0xE001  },
+{ 0x0F12, 0x2010  },
+{ 0x0F12, 0x4304  },
+{ 0x0F12, 0x481F  },
+{ 0x0F12, 0x8B80  },
+{ 0x0F12, 0x0700  },
+{ 0x0F12, 0x0F81  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0x2900  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x4304  },
+{ 0x0F12, 0x491C  },
+{ 0x0F12, 0x8B0A  },
+{ 0x0F12, 0x42A2  },
+{ 0x0F12, 0xD004  },
+{ 0x0F12, 0x0762  },
+{ 0x0F12, 0xD502  },
+{ 0x0F12, 0x4A19  },
+{ 0x0F12, 0x3220  },
+{ 0x0F12, 0x8110  },
+{ 0x0F12, 0x830C  },
+{ 0x0F12, 0xE691  },
+{ 0x0F12, 0x0C3C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x3274  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x26E8  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x6100  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x6500  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x1A7C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1120  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xFFFF  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x3374  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1D6C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x167C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xF400  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2C2C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x40A0  },
+{ 0x0F12, 0x00DD  },
+{ 0x0F12, 0xF520  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2C29  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1A54  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1564  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xF2A0  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2440  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x05A0  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2894  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1224  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xB000  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x1A3F  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xF004  },
+{ 0x0F12, 0xE51F  },
+{ 0x0F12, 0x1F48  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x24BD  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x36DD  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xB4CF  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xB5D7  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x36ED  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xF53F  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xF5D9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x013D  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xF5C9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xFAA9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x3723  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x5823  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xD771  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xD75B  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x8117  },
+{ 0x0F12, 0x0000  },
+
+// End TnP part
+
+//========================================================                      
+// CIs/APs/An setting        - 400LsB  sYsCLK 32MHz                             
+//========================================================                      
+// This regis are for FACTORY ONLY. If you change it without prior notification,
+// YOU are REsIBLE for the FAILURE that will happen in the future.              
+//========================================================                      
+
+
+{ 0x002A, 0x157A  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x1578  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x1576  },
+{ 0x0F12, 0x0020  },
+{ 0x002A, 0x1574  },
+{ 0x0F12, 0x0006  },
+{ 0x002A, 0x156E  },
+{ 0x0F12, 0x0001  },	// slope calibration tolerance in units of 1/256	
+{ 0x002A, 0x1568  },
+{ 0x0F12, 0x00FC  },
+                  
+// /ADC control    
+{ 0x002A, 0x155A  },
+{ 0x0F12, 0x01CC  },	//ADC sAT of 450mV for 10bit default in EVT1                         	
+{ 0x002A, 0x157E  },                                                                        
+{ 0x0F12, 0x0C80  },	// 3200 Max. Reset ramp DCLK counts (default 2048 0x800)             
+{ 0x0F12, 0x0578  },	// 1400 Max. Reset ramp DCLK counts for x3.5                         
+{ 0x002A, 0x157C  },                                                                        
+{ 0x0F12, 0x0190  },	// 400 Reset ramp for x1 in DCLK counts                              
+{ 0x002A, 0x1570  },                                                                        
+{ 0x0F12, 0x00A0  },	// 160 LsB                                                           
+{ 0x0F12, 0x0010  },	// reset threshold                                                   
+{ 0x002A, 0x12C4  },                                                                        
+{ 0x0F12, 0x006A  },	// 106 additional timing columns.                                    
+{ 0x002A, 0x12C8  },                                                                        
+{ 0x0F12, 0x08AC  },	// 2220 ADC columns in normal mode including Hold & Latch            
+{ 0x0F12, 0x0050  },	// 80 addition of ADC columns in Y-ave mode (default 244 0x74)
+                  
+{ 0x002A, 0x1696  },	// based on APs guidelines                        
+{ 0x0F12, 0x0000  },   // based on APs guidelines                        
+{ 0x0F12, 0x0000  },   // default. 1492 used for ADC dark characteristics
+{ 0x0F12, 0x00C6  },   // default. 1492 used for ADC dark characteristics
+{ 0x0F12, 0x00C6  },                                                  
+//{ 0x002A, 0x12B8  },   //disable CINTR 0                                 
+//{ 0x0F12, 0x0B00  },                                                     
+                                                                      
+{ 0x002A, 0x1690  },   // when set double sampling is activated - requires different set of pointers                                                 
+{ 0x0F12, 0x0001  },                                                     
+                                                                      
+{ 0x002A, 0x12B0  },   // comp and pixel bias control 0xF40E - default for EVT1                                                                      
+{ 0x0F12, 0x0055  },   // comp and pixel bias control 0xF40E for binning mode                                                                        
+{ 0x0F12, 0x005A  },                                                     
+                                                                      
+{ 0x002A, 0x337A  },   // [7] - is used for rest-only mode (EVT0 value is 0xD and HW 0x6)                                                            
+{ 0x0F12, 0x0006  },
+{ 0x0F12, 0x0068  },
+{ 0x002A, 0x169E  },
+{ 0x0F12, 0x0007  },
+{ 0x002A, 0x0BF6  },
+{ 0x0F12, 0x0000  },
+	                
+                    
+{ 0x002A, 0x327C  },
+{ 0x0F12, 0x1000  },
+{ 0x0F12, 0x6998  },
+{ 0x0F12, 0x0078  },
+{ 0x0F12, 0x04FE  },
+{ 0x0F12, 0x8800  },
+                    
+{ 0x002A, 0x3274  },
+{ 0x0F12, 0x0155  },	//set IO driving current 2mA for Gs500
+{ 0x0F12, 0x0155  },   //set IO driving current              
+{ 0x0F12, 0x1555  },   //set IO driving current              
+{ 0x0F12, 0x0555  },   //set IO driving current              
+                    
+                    
+{ 0x0028, 0x7000  },	
+{ 0x002A, 0x12D2  },	   
+{ 0x0F12, 0x0003  },	//senHal_pContSenModesRegsArray[0][0]2 700012D2     
+{ 0x0F12, 0x0003  },   //senHal_pContSenModesRegsArray[0][1]2 700012D4  
+{ 0x0F12, 0x0003  },   //senHal_pContSenModesRegsArray[0][2]2 700012D6  
+{ 0x0F12, 0x0003  },   //senHal_pContSenModesRegsArray[0][3]2 700012D8  
+{ 0x0F12, 0x0884  },   //senHal_pContSenModesRegsArray[1][0]2 700012DA  
+{ 0x0F12, 0x08CF  },   //senHal_pContSenModesRegsArray[1][1]2 700012DC  
+{ 0x0F12, 0x0500  },   //senHal_pContSenModesRegsArray[1][2]2 700012DE  
+{ 0x0F12, 0x054B  },   //senHal_pContSenModesRegsArray[1][3]2 700012E0  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][0]2 700012E2  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][1]2 700012E4  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][2]2 700012E6  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][3]2 700012E8  
+{ 0x0F12, 0x0885  },   //senHal_pContSenModesRegsArray[3][0]2 700012EA  
+{ 0x0F12, 0x0467  },   //senHal_pContSenModesRegsArray[3][1]2 700012EC  
+{ 0x0F12, 0x0501  },   //senHal_pContSenModesRegsArray[3][2]2 700012EE  
+{ 0x0F12, 0x02A5  },   //senHal_pContSenModesRegsArray[3][3]2 700012F0  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[4][0]2 700012F2  
+{ 0x0F12, 0x046A  },   //senHal_pContSenModesRegsArray[4][1]2 700012F4  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[4][2]2 700012F6  
+{ 0x0F12, 0x02A8  },   //senHal_pContSenModesRegsArray[4][3]2 700012F8  
+{ 0x0F12, 0x0885  },   //senHal_pContSenModesRegsArray[5][0]2 700012FA  
+{ 0x0F12, 0x08D0  },   //senHal_pContSenModesRegsArray[5][1]2 700012FC  
+{ 0x0F12, 0x0501  },   //senHal_pContSenModesRegsArray[5][2]2 700012FE  
+{ 0x0F12, 0x054C  },   //senHal_pContSenModesRegsArray[5][3]2 70001300  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[6][0]2 70001302  
+{ 0x0F12, 0x0020  },   //senHal_pContSenModesRegsArray[6][1]2 70001304  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[6][2]2 70001306  
+{ 0x0F12, 0x0020  },   //senHal_pContSenModesRegsArray[6][3]2 70001308  
+{ 0x0F12, 0x0881  },   //senHal_pContSenModesRegsArray[7][0]2 7000130A  
+{ 0x0F12, 0x0463  },   //senHal_pContSenModesRegsArray[7][1]2 7000130C  
+{ 0x0F12, 0x04FD  },   //senHal_pContSenModesRegsArray[7][2]2 7000130E  
+{ 0x0F12, 0x02A1  },   //senHal_pContSenModesRegsArray[7][3]2 70001310  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[8][0]2 70001312  
+{ 0x0F12, 0x0489  },   //senHal_pContSenModesRegsArray[8][1]2 70001314  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[8][2]2 70001316  
+{ 0x0F12, 0x02C7  },   //senHal_pContSenModesRegsArray[8][3]2 70001318  
+{ 0x0F12, 0x0881  },   //senHal_pContSenModesRegsArray[9][0]2 7000131A  
+{ 0x0F12, 0x08CC  },   //senHal_pContSenModesRegsArray[9][1]2 7000131C  
+{ 0x0F12, 0x04FD  },   //senHal_pContSenModesRegsArray[9][2]2 7000131E  
+{ 0x0F12, 0x0548  },   //senHal_pContSenModesRegsArray[9][3]2 70001320  
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[10][0] 2 70001322
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[10][1] 2 70001324
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[10][2] 2 70001326
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[10][3] 2 70001328
+{ 0x0F12, 0x03F2  },   //senHal_pContSenModesRegsArray[11][0] 2 7000132A
+{ 0x0F12, 0x0223  },   //senHal_pContSenModesRegsArray[11][1] 2 7000132C
+{ 0x0F12, 0x0230  },   //senHal_pContSenModesRegsArray[11][2] 2 7000132E
+{ 0x0F12, 0x0142  },   //senHal_pContSenModesRegsArray[11][3] 2 70001330
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[12][0] 2 70001332
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[12][1] 2 70001334
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[12][2] 2 70001336
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[12][3] 2 70001338
+{ 0x0F12, 0x03F2  },   //senHal_pContSenModesRegsArray[13][0] 2 7000133A
+{ 0x0F12, 0x068C  },   //senHal_pContSenModesRegsArray[13][1] 2 7000133C
+{ 0x0F12, 0x0230  },   //senHal_pContSenModesRegsArray[13][2] 2 7000133E
+{ 0x0F12, 0x03E9  },   //senHal_pContSenModesRegsArray[13][3] 2 70001340
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][0] 2 70001342
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][1] 2 70001344
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][2] 2 70001346
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][3] 2 70001348
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][0] 2 7000134A
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][1] 2 7000134C
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][2] 2 7000134E
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][3] 2 70001350
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[16][0] 2 70001352
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[16][1] 2 70001354
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[16][2] 2 70001356
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[16][3] 2 70001358
+{ 0x0F12, 0x020B  },   //senHal_pContSenModesRegsArray[17][0] 2 7000135A
+{ 0x0F12, 0x024A  },   //senHal_pContSenModesRegsArray[17][1] 2 7000135C
+{ 0x0F12, 0x012A  },   //senHal_pContSenModesRegsArray[17][2] 2 7000135E
+{ 0x0F12, 0x0169  },   //senHal_pContSenModesRegsArray[17][3] 2 70001360
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[18][0] 2 70001362
+{ 0x0F12, 0x046B  },   //senHal_pContSenModesRegsArray[18][1] 2 70001364
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[18][2] 2 70001366
+{ 0x0F12, 0x02A9  },   //senHal_pContSenModesRegsArray[18][3] 2 70001368
+{ 0x0F12, 0x0419  },   //senHal_pContSenModesRegsArray[19][0] 2 7000136A
+{ 0x0F12, 0x04A5  },   //senHal_pContSenModesRegsArray[19][1] 2 7000136C
+{ 0x0F12, 0x0257  },   //senHal_pContSenModesRegsArray[19][2] 2 7000136E
+{ 0x0F12, 0x02E3  },   //senHal_pContSenModesRegsArray[19][3] 2 70001370
+{ 0x0F12, 0x0630  },   //senHal_pContSenModesRegsArray[20][0] 2 70001372
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[20][1] 2 70001374
+{ 0x0F12, 0x038D  },   //senHal_pContSenModesRegsArray[20][2] 2 70001376
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[20][3] 2 70001378
+{ 0x0F12, 0x0668  },   //senHal_pContSenModesRegsArray[21][0] 2 7000137A
+{ 0x0F12, 0x06B3  },   //senHal_pContSenModesRegsArray[21][1] 2 7000137C
+{ 0x0F12, 0x03C5  },   //senHal_pContSenModesRegsArray[21][2] 2 7000137E
+{ 0x0F12, 0x0410  },   //senHal_pContSenModesRegsArray[21][3] 2 70001380
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][0] 2 70001382
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][1] 2 70001384
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][2] 2 70001386
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][3] 2 70001388
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[23][0] 2 7000138A
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[23][1] 2 7000138C
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[23][2] 2 7000138E
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[23][3] 2 70001390
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[24][0] 2 70001392
+{ 0x0F12, 0x0461  },   //senHal_pContSenModesRegsArray[24][1] 2 70001394
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[24][2] 2 70001396
+{ 0x0F12, 0x029F  },   //senHal_pContSenModesRegsArray[24][3] 2 70001398
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[25][0] 2 7000139A
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[25][1] 2 7000139C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[25][2] 2 7000139E
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[25][3] 2 700013A0
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][0] 2 700013A2
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][1] 2 700013A4
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][2] 2 700013A6
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][3] 2 700013A8
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[27][0] 2 700013AA
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[27][1] 2 700013AC
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[27][2] 2 700013AE
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[27][3] 2 700013B0
+{ 0x0F12, 0x020C  },   //senHal_pContSenModesRegsArray[28][0] 2 700013B2
+{ 0x0F12, 0x024B  },   //senHal_pContSenModesRegsArray[28][1] 2 700013B4
+{ 0x0F12, 0x012B  },   //senHal_pContSenModesRegsArray[28][2] 2 700013B6
+{ 0x0F12, 0x016A  },   //senHal_pContSenModesRegsArray[28][3] 2 700013B8
+{ 0x0F12, 0x039F  },   //senHal_pContSenModesRegsArray[29][0] 2 700013BA
+{ 0x0F12, 0x045E  },   //senHal_pContSenModesRegsArray[29][1] 2 700013BC
+{ 0x0F12, 0x01DD  },   //senHal_pContSenModesRegsArray[29][2] 2 700013BE
+{ 0x0F12, 0x029C  },   //senHal_pContSenModesRegsArray[29][3] 2 700013C0
+{ 0x0F12, 0x041A  },   //senHal_pContSenModesRegsArray[30][0] 2 700013C2
+{ 0x0F12, 0x04A6  },   //senHal_pContSenModesRegsArray[30][1] 2 700013C4
+{ 0x0F12, 0x0258  },   //senHal_pContSenModesRegsArray[30][2] 2 700013C6
+{ 0x0F12, 0x02E4  },   //senHal_pContSenModesRegsArray[30][3] 2 700013C8
+{ 0x0F12, 0x062D  },   //senHal_pContSenModesRegsArray[31][0] 2 700013CA
+{ 0x0F12, 0x0639  },   //senHal_pContSenModesRegsArray[31][1] 2 700013CC
+{ 0x0F12, 0x038A  },   //senHal_pContSenModesRegsArray[31][2] 2 700013CE
+{ 0x0F12, 0x0396  },   //senHal_pContSenModesRegsArray[31][3] 2 700013D0
+{ 0x0F12, 0x0669  },   //senHal_pContSenModesRegsArray[32][0] 2 700013D2
+{ 0x0F12, 0x06B4  },   //senHal_pContSenModesRegsArray[32][1] 2 700013D4
+{ 0x0F12, 0x03C6  },   //senHal_pContSenModesRegsArray[32][2] 2 700013D6
+{ 0x0F12, 0x0411  },   //senHal_pContSenModesRegsArray[32][3] 2 700013D8
+{ 0x0F12, 0x087C  },   //senHal_pContSenModesRegsArray[33][0] 2 700013DA
+{ 0x0F12, 0x08C7  },   //senHal_pContSenModesRegsArray[33][1] 2 700013DC
+{ 0x0F12, 0x04F8  },   //senHal_pContSenModesRegsArray[33][2] 2 700013DE
+{ 0x0F12, 0x0543  },   //senHal_pContSenModesRegsArray[33][3] 2 700013E0
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][0] 2 700013E2
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][1] 2 700013E4
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][2] 2 700013E6
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][3] 2 700013E8
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[35][0] 2 700013EA
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[35][1] 2 700013EC
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[35][2] 2 700013EE
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[35][3] 2 700013F0
+{ 0x0F12, 0x020F  },   //senHal_pContSenModesRegsArray[36][0] 2 700013F2
+{ 0x0F12, 0x024E  },   //senHal_pContSenModesRegsArray[36][1] 2 700013F4
+{ 0x0F12, 0x012E  },   //senHal_pContSenModesRegsArray[36][2] 2 700013F6
+{ 0x0F12, 0x016D  },   //senHal_pContSenModesRegsArray[36][3] 2 700013F8
+{ 0x0F12, 0x039F  },   //senHal_pContSenModesRegsArray[37][0] 2 700013FA
+{ 0x0F12, 0x045E  },   //senHal_pContSenModesRegsArray[37][1] 2 700013FC
+{ 0x0F12, 0x01DD  },   //senHal_pContSenModesRegsArray[37][2] 2 700013FE
+{ 0x0F12, 0x029C  },   //senHal_pContSenModesRegsArray[37][3] 2 70001400
+{ 0x0F12, 0x041D  },   //senHal_pContSenModesRegsArray[38][0] 2 70001402
+{ 0x0F12, 0x04A9  },   //senHal_pContSenModesRegsArray[38][1] 2 70001404
+{ 0x0F12, 0x025B  },   //senHal_pContSenModesRegsArray[38][2] 2 70001406
+{ 0x0F12, 0x02E7  },   //senHal_pContSenModesRegsArray[38][3] 2 70001408
+{ 0x0F12, 0x062D  },   //senHal_pContSenModesRegsArray[39][0] 2 7000140A
+{ 0x0F12, 0x0639  },   //senHal_pContSenModesRegsArray[39][1] 2 7000140C
+{ 0x0F12, 0x038A  },   //senHal_pContSenModesRegsArray[39][2] 2 7000140E
+{ 0x0F12, 0x0396  },   //senHal_pContSenModesRegsArray[39][3] 2 70001410
+{ 0x0F12, 0x066C  },   //senHal_pContSenModesRegsArray[40][0] 2 70001412
+{ 0x0F12, 0x06B7  },   //senHal_pContSenModesRegsArray[40][1] 2 70001414
+{ 0x0F12, 0x03C9  },   //senHal_pContSenModesRegsArray[40][2] 2 70001416
+{ 0x0F12, 0x0414  },   //senHal_pContSenModesRegsArray[40][3] 2 70001418
+{ 0x0F12, 0x087C  },   //senHal_pContSenModesRegsArray[41][0] 2 7000141A
+{ 0x0F12, 0x08C7  },   //senHal_pContSenModesRegsArray[41][1] 2 7000141C
+{ 0x0F12, 0x04F8  },   //senHal_pContSenModesRegsArray[41][2] 2 7000141E
+{ 0x0F12, 0x0543  },   //senHal_pContSenModesRegsArray[41][3] 2 70001420
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][0] 2 70001422
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][1] 2 70001424
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][2] 2 70001426
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][3] 2 70001428
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[43][0] 2 7000142A
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[43][1] 2 7000142C
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[43][2] 2 7000142E
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[43][3] 2 70001430
+{ 0x0F12, 0x020F  },   //senHal_pContSenModesRegsArray[44][0] 2 70001432
+{ 0x0F12, 0x024E  },   //senHal_pContSenModesRegsArray[44][1] 2 70001434
+{ 0x0F12, 0x012E  },   //senHal_pContSenModesRegsArray[44][2] 2 70001436
+{ 0x0F12, 0x016D  },   //senHal_pContSenModesRegsArray[44][3] 2 70001438
+{ 0x0F12, 0x039F  },   //senHal_pContSenModesRegsArray[45][0] 2 7000143A
+{ 0x0F12, 0x045E  },   //senHal_pContSenModesRegsArray[45][1] 2 7000143C
+{ 0x0F12, 0x01DD  },   //senHal_pContSenModesRegsArray[45][2] 2 7000143E
+{ 0x0F12, 0x029C  },   //senHal_pContSenModesRegsArray[45][3] 2 70001440
+{ 0x0F12, 0x041D  },   //senHal_pContSenModesRegsArray[46][0] 2 70001442
+{ 0x0F12, 0x04A9  },   //senHal_pContSenModesRegsArray[46][1] 2 70001444
+{ 0x0F12, 0x025B  },   //senHal_pContSenModesRegsArray[46][2] 2 70001446
+{ 0x0F12, 0x02E7  },   //senHal_pContSenModesRegsArray[46][3] 2 70001448
+{ 0x0F12, 0x062D  },   //senHal_pContSenModesRegsArray[47][0] 2 7000144A
+{ 0x0F12, 0x0639  },   //senHal_pContSenModesRegsArray[47][1] 2 7000144C
+{ 0x0F12, 0x038A  },   //senHal_pContSenModesRegsArray[47][2] 2 7000144E
+{ 0x0F12, 0x0396  },   //senHal_pContSenModesRegsArray[47][3] 2 70001450
+{ 0x0F12, 0x066C  },   //senHal_pContSenModesRegsArray[48][0] 2 70001452
+{ 0x0F12, 0x06B7  },   //senHal_pContSenModesRegsArray[48][1] 2 70001454
+{ 0x0F12, 0x03C9  },   //senHal_pContSenModesRegsArray[48][2] 2 70001456
+{ 0x0F12, 0x0414  },   //senHal_pContSenModesRegsArray[48][3] 2 70001458
+{ 0x0F12, 0x087C  },   //senHal_pContSenModesRegsArray[49][0] 2 7000145A
+{ 0x0F12, 0x08C7  },   //senHal_pContSenModesRegsArray[49][1] 2 7000145C
+{ 0x0F12, 0x04F8  },   //senHal_pContSenModesRegsArray[49][2] 2 7000145E
+{ 0x0F12, 0x0543  },   //senHal_pContSenModesRegsArray[49][3] 2 70001460
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][0] 2 70001462
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][1] 2 70001464
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][2] 2 70001466
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][3] 2 70001468
+{ 0x0F12, 0x01D2  },   //senHal_pContSenModesRegsArray[51][0] 2 7000146A
+{ 0x0F12, 0x01D2  },   //senHal_pContSenModesRegsArray[51][1] 2 7000146C
+{ 0x0F12, 0x00F1  },   //senHal_pContSenModesRegsArray[51][2] 2 7000146E
+{ 0x0F12, 0x00F1  },   //senHal_pContSenModesRegsArray[51][3] 2 70001470
+{ 0x0F12, 0x020C  },   //senHal_pContSenModesRegsArray[52][0] 2 70001472
+{ 0x0F12, 0x024B  },   //senHal_pContSenModesRegsArray[52][1] 2 70001474
+{ 0x0F12, 0x012B  },   //senHal_pContSenModesRegsArray[52][2] 2 70001476
+{ 0x0F12, 0x016A  },   //senHal_pContSenModesRegsArray[52][3] 2 70001478
+{ 0x0F12, 0x03A1  },   //senHal_pContSenModesRegsArray[53][0] 2 7000147A
+{ 0x0F12, 0x0460  },   //senHal_pContSenModesRegsArray[53][1] 2 7000147C
+{ 0x0F12, 0x01DF  },   //senHal_pContSenModesRegsArray[53][2] 2 7000147E
+{ 0x0F12, 0x029E  },   //senHal_pContSenModesRegsArray[53][3] 2 70001480
+{ 0x0F12, 0x041A  },   //senHal_pContSenModesRegsArray[54][0] 2 70001482
+{ 0x0F12, 0x04A6  },   //senHal_pContSenModesRegsArray[54][1] 2 70001484
+{ 0x0F12, 0x0258  },   //senHal_pContSenModesRegsArray[54][2] 2 70001486
+{ 0x0F12, 0x02E4  },   //senHal_pContSenModesRegsArray[54][3] 2 70001488
+{ 0x0F12, 0x062F  },   //senHal_pContSenModesRegsArray[55][0] 2 7000148A
+{ 0x0F12, 0x063B  },   //senHal_pContSenModesRegsArray[55][1] 2 7000148C
+{ 0x0F12, 0x038C  },   //senHal_pContSenModesRegsArray[55][2] 2 7000148E
+{ 0x0F12, 0x0398  },   //senHal_pContSenModesRegsArray[55][3] 2 70001490
+{ 0x0F12, 0x0669  },   //senHal_pContSenModesRegsArray[56][0] 2 70001492
+{ 0x0F12, 0x06B4  },   //senHal_pContSenModesRegsArray[56][1] 2 70001494
+{ 0x0F12, 0x03C6  },   //senHal_pContSenModesRegsArray[56][2] 2 70001496
+{ 0x0F12, 0x0411  },   //senHal_pContSenModesRegsArray[56][3] 2 70001498
+{ 0x0F12, 0x087E  },   //senHal_pContSenModesRegsArray[57][0] 2 7000149A
+{ 0x0F12, 0x08C9  },   //senHal_pContSenModesRegsArray[57][1] 2 7000149C
+{ 0x0F12, 0x04FA  },   //senHal_pContSenModesRegsArray[57][2] 2 7000149E
+{ 0x0F12, 0x0545  },   //senHal_pContSenModesRegsArray[57][3] 2 700014A0
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[58][0] 2 700014A2
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[58][1] 2 700014A4
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[58][2] 2 700014A6
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[58][3] 2 700014A8
+{ 0x0F12, 0x03AF  },   //senHal_pContSenModesRegsArray[59][0] 2 700014AA
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[59][1] 2 700014AC
+{ 0x0F12, 0x01ED  },   //senHal_pContSenModesRegsArray[59][2] 2 700014AE
+{ 0x0F12, 0x00FF  },   //senHal_pContSenModesRegsArray[59][3] 2 700014B0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[60][0] 2 700014B2
+{ 0x0F12, 0x0461  },   //senHal_pContSenModesRegsArray[60][1] 2 700014B4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[60][2] 2 700014B6
+{ 0x0F12, 0x029F  },   //senHal_pContSenModesRegsArray[60][3] 2 700014B8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[61][0] 2 700014BA
+{ 0x0F12, 0x046E  },   //senHal_pContSenModesRegsArray[61][1] 2 700014BC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[61][2] 2 700014BE
+{ 0x0F12, 0x02AC  },   //senHal_pContSenModesRegsArray[61][3] 2 700014C0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[62][0] 2 700014C2
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[62][1] 2 700014C4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[62][2] 2 700014C6
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[62][3] 2 700014C8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[63][0] 2 700014CA
+{ 0x0F12, 0x0649  },   //senHal_pContSenModesRegsArray[63][1] 2 700014CC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[63][2] 2 700014CE
+{ 0x0F12, 0x03A6  },   //senHal_pContSenModesRegsArray[63][3] 2 700014D0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][0] 2 700014D2
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][1] 2 700014D4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][2] 2 700014D6
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][3] 2 700014D8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][0] 2 700014DA
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][1] 2 700014DC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][2] 2 700014DE
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][3] 2 700014E0
+{ 0x0F12, 0x03AA  },   //senHal_pContSenModesRegsArray[66][0] 2 700014E2
+{ 0x0F12, 0x01DB  },   //senHal_pContSenModesRegsArray[66][1] 2 700014E4
+{ 0x0F12, 0x01E8  },   //senHal_pContSenModesRegsArray[66][2] 2 700014E6
+{ 0x0F12, 0x00FA  },   //senHal_pContSenModesRegsArray[66][3] 2 700014E8
+{ 0x0F12, 0x03B7  },   //senHal_pContSenModesRegsArray[67][0] 2 700014EA
+{ 0x0F12, 0x01E8  },   //senHal_pContSenModesRegsArray[67][1] 2 700014EC
+{ 0x0F12, 0x01F5  },   //senHal_pContSenModesRegsArray[67][2] 2 700014EE
+{ 0x0F12, 0x0107  },   //senHal_pContSenModesRegsArray[67][3] 2 700014F0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[68][0] 2 700014F2
+{ 0x0F12, 0x0469  },   //senHal_pContSenModesRegsArray[68][1] 2 700014F4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[68][2] 2 700014F6
+{ 0x0F12, 0x02A7  },   //senHal_pContSenModesRegsArray[68][3] 2 700014F8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[69][0] 2 700014FA
+{ 0x0F12, 0x0476  },   //senHal_pContSenModesRegsArray[69][1] 2 700014FC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[69][2] 2 700014FE
+{ 0x0F12, 0x02B4  },   //senHal_pContSenModesRegsArray[69][3] 2 70001500
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[70][0] 2 70001502
+{ 0x0F12, 0x0644  },   //senHal_pContSenModesRegsArray[70][1] 2 70001504
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[70][2] 2 70001506
+{ 0x0F12, 0x03A1  },   //senHal_pContSenModesRegsArray[70][3] 2 70001508
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[71][0] 2 7000150A
+{ 0x0F12, 0x0651  },   //senHal_pContSenModesRegsArray[71][1] 2 7000150C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[71][2] 2 7000150E
+{ 0x0F12, 0x03AE  },   //senHal_pContSenModesRegsArray[71][3] 2 70001510
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][0] 2 70001512
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][1] 2 70001514
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][2] 2 70001516
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][3] 2 70001518
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][0] 2 7000151A
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][1] 2 7000151C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][2] 2 7000151E
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][3] 2 70001520
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][0] 2 70001522
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][1] 2 70001524
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][2] 2 70001526
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][3] 2 70001528
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][0] 2 7000152A
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][1] 2 7000152C
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][2] 2 7000152E
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][3] 2 70001530
+{ 0x0F12, 0x05AD  },   //senHal_pContSenModesRegsArray[76][0] 2 70001532
+{ 0x0F12, 0x03DE  },   //senHal_pContSenModesRegsArray[76][1] 2 70001534
+{ 0x0F12, 0x030A  },   //senHal_pContSenModesRegsArray[76][2] 2 70001536
+{ 0x0F12, 0x021C  },   //senHal_pContSenModesRegsArray[76][3] 2 70001538
+{ 0x0F12, 0x062F  },   //senHal_pContSenModesRegsArray[77][0] 2 7000153A
+{ 0x0F12, 0x0460  },   //senHal_pContSenModesRegsArray[77][1] 2 7000153C
+{ 0x0F12, 0x038C  },   //senHal_pContSenModesRegsArray[77][2] 2 7000153E
+{ 0x0F12, 0x029E  },   //senHal_pContSenModesRegsArray[77][3] 2 70001540
+{ 0x0F12, 0x07FC  },   //senHal_pContSenModesRegsArray[78][0] 2 70001542
+{ 0x0F12, 0x0847  },   //senHal_pContSenModesRegsArray[78][1] 2 70001544
+{ 0x0F12, 0x0478  },   //senHal_pContSenModesRegsArray[78][2] 2 70001546
+{ 0x0F12, 0x04C3  },   //senHal_pContSenModesRegsArray[78][3] 2 70001548
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][0] 2 7000154A
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][1] 2 7000154C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][2] 2 7000154E
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][3] 2 70001550
+                      
+                    
+//============================================================ 
+// AF Interface setting
+//==============  ============================================== 
+{ 0x002A, 0x01D4  },
+{ 0x0F12, 0x0000  }, //REG_TC_IPRM_AuxGpios : 0 - no Flash
+{ 0x002A, 0x01DE  },
+{ 0x0F12, 0x0003  }, //REG_TC_IPRM_CM_Init_AfModeType : 3 - AFD_VCM_I2C
+{ 0x0F12, 0x0000  }, //REG_TC_IPRM_CM_Init_PwmConfig1 : 0 - no PWM
+{ 0x002A, 0x01E4  },
+{ 0x0F12, 0x0041  }, //REG_TC_IPRM_CM_Init_GpioConfig1 : 4 -  GPIO4 
+{ 0x002A, 0x01E8  },
+{ 0x0F12, 0x2A0C  }, //REG_TC_IPRM_CM_Init_Mi2cBits : MSCL - GPIO1 MSDA - GPIO2 Device ID (0C)
+{ 0x0F12, 0x0190  }, //REG_TC_IPRM_CM_Init_Mi2cRateKhz : MI2C Speed - 400KHz
+
+//============================================================ 
+// AF Parameter setting
+//============================================================ 
+// AF Window Settings
+{ 0x002A, 0x025A  },
+{ 0x0F12, 0x0100  }, //#REG_TC_AF_FstWinStartX
+{ 0x0F12, 0x00E3  }, //#REG_TC_AF_FstWinStartY
+{ 0x0F12, 0x0200  }, //#REG_TC_AF_FstWinSizeX
+{ 0x0F12, 0x0238  }, //#REG_TC_AF_FstWinSizeY
+{ 0x0F12, 0x01C6  }, //#REG_TC_AF_ScndWinStartX
+{ 0x0F12, 0x0166  }, //#REG_TC_AF_ScndWinStartY
+{ 0x0F12, 0x0074  }, //#REG_TC_AF_ScndWinSizeX
+{ 0x0F12, 0x0132  }, //#REG_TC_AF_ScndWinSizeY
+{ 0x0F12, 0x0001  }, //#REG_TC_AF_WinSizesUpdated
+
+// AF Setot Settings 
+{ 0x002A, 0x0586  },
+{ 0x0F12, 0x00FF  }, //#skl_af_StatOvlpExpFactor
+
+// AF Scene Settings 
+{ 0x002A, 0x115E  },
+{ 0x0F12, 0x0003  }, //#af_scene_usSaturatedScene
+
+// AF Fine Search Settings 
+{ 0x002A, 0x10D4  },
+{ 0x0F12, 0x1002  }, //FineSearch Disable //af_search_usSingleAfFlags 1000 : 2nd searh off, 1002 : 2nd search on
+{ 0x002A, 0x10DE  },
+{ 0x0F12, 0x0004  }, //#af_search_usFinePeakCount
+{ 0x002A, 0x106C  },
+{ 0x0F12, 0x0802  }, //#af_pos_usFineStepNumSize
+                  
+// / AF Peak Thre  shold Setting
+{ 0x002A, 0x10CA  }, //#af_search_usPeakThr
+{ 0x0F12, 0x00CC  }, 
+
+// AF Default Position 
+{ 0x002A, 0x1060  },
+{ 0x0F12, 0x0000  }, //#af_pos_usHomePos
+{ 0x0F12, 0xB020  }, //#af_pos_usLowConfPos
+
+// AF LowConfThr Setting
+{ 0x002A, 0x10F4  }, //LowEdgeBoth GRAD
+{ 0x0F12, 0x0280  }, 
+{ 0x002A, 0x1100  }, //LowLight HPF
+{ 0x0F12, 0x03A0  },  
+{ 0x0F12, 0x0320  }, 
+
+{ 0x002A, 0x1134  },
+{ 0x0F12, 0x0030  },//af_stat_usMinStatVal
+
+// AF low Br Th
+{ 0x002A, 0x1154  }, // normBrThr
+{ 0x0F12, 0x0060  },
+
+// AF Policy
+{ 0x002A, 0x10E2  },
+{ 0x0F12, 0x0000  }, //#af_search_usCapturePolicy: Focus_Priority, 0002 : Shutter_Priority_Fixed, 0001 : Shutter_Priority_Last_BFP 0000: Shutter_Priority_Current
+{ 0x002A, 0x1072  },
+{ 0x0F12, 0x003C  }, //#af_pos_usCaptureFixedPo// 0x0008
+
+// AF Lens Position Table Settings 
+{ 0x002A, 0x1074  },
+{ 0x0F12, 0x0010  }, //#af_pos_usTableLastInd // 0~16 17 Steps 100729
+
+{ 0x0F12, 0x0024  }, //#af_pos_usTable_0_  145/4 = 36  // af_pos_usTable
+{ 0x0F12, 0x002D  }, //#af_pos_usTable_1_  180/4 = 45                   
+{ 0x0F12, 0x0036  }, //#af_pos_usTable_2_  215/4 = 54                   
+{ 0x0F12, 0x003E  }, //#af_pos_usTable_3_  250/4 = 62                   
+{ 0x0F12, 0x0047  }, //#af_pos_usTable_4_  285/4 = 71
+{ 0x0F12, 0x0050  }, //#af_pos_usTable_5_  320/4 = 80                   
+{ 0x0F12, 0x0059  }, //#af_pos_usTable_6_  355/4 = 89                   
+{ 0x0F12, 0x0061  }, //#af_pos_usTable_7_  390/4 = 97                   
+{ 0x0F12, 0x006A  }, //#af_pos_usTable_8_  425/4 = 106                  
+{ 0x0F12, 0x0073  }, //#af_pos_usTable_9_  460/4 = 115                  
+{ 0x0F12, 0x007C  }, //#af_pos_usTable_10_ 495/4 = 124                  
+{ 0x0F12, 0x0084  }, //#af_pos_usTable_11_ 530/4 = 132                  
+{ 0x0F12, 0x008D  }, //#af_pos_usTable_12_ 565/4 = 141                  
+{ 0x0F12, 0x0096  }, //#af_pos_usTable_13_ 600/4 = 150                  
+{ 0x0F12, 0x009F  }, //#af_pos_usTable_14_ 635/4 = 159                  
+{ 0x0F12, 0x00A7  }, //#af_pos_usTable_15_ 670/4 = 167                  
+{ 0x0F12, 0x00B0  }, //#af_pos_usTable_16_ 705/4 = 176                  
+
+//VCM AF driver with PWM/I2C 
+{ 0x002A, 0x1198  },
+{ 0x0F12, 0x8000  }, //#afd_usParam[0]  I2C power down command
+{ 0x0F12, 0x0006  }, //#afd_usParam[1]  Position Right Shift 
+{ 0x0F12, 0x3FF0  }, //#afd_usParam[2]  I2C Data Mask
+{ 0x0F12, 0x03E8  }, //#afd_usParam[3]  PWM Period
+{ 0x0F12, 0x0000  }, //#afd_usParam[4]  PWM Divider
+{ 0x0F12, 0x0064  }, //#afd_usParam[5]  SlowMotion Delay (unit: 0.1ms)  4. reduce lens collision noise.
+{ 0x0F12, 0x0009  }, //#afd_usParam[6]  SlowMotion Threshold
+{ 0x0F12, 0x000A  }, //#afd_usParam[7]  Signal Shaping
+{ 0x0F12, 0x0080  }, //#afd_usParam[8]  Signal Shaping level 
+{ 0x0F12, 0x00C0  }, //#afd_usParam[9]  Signal Shaping level
+{ 0x0F12, 0x0000  }, //#afd_usParam[10] Signal Shaping level
+{ 0x0F12, 0x0000  }, //#afd_usParam[11] Signal Shaping level               
+
+
+{ 0x002A, 0x0252  },
+{ 0x0F12, 0x0003  }, //init 
+                  
+{ 0x002A, 0x12B8  },   //disable CINTR 0                                 
+{ 0x0F12, 0x1000  },        
+
+//============================================================
+// ISP-FE Setting
+//============================================================                    
+{ 0x002A, 0x158A  },   
+{ 0x0F12, 0xEAF0  },   
+{ 0x002A, 0x15C6  },   
+{ 0x0F12, 0x0020  },   
+{ 0x0F12, 0x0060  },   
+{ 0x002A, 0x15BC  },   
+{ 0x0F12, 0x0200  },   
+                       
+{ 0x002A, 0x1608  },   
+{ 0x0F12, 0x0100  },   
+{ 0x0F12, 0x0100  },   
+{ 0x0F12, 0x0100  },   
+{ 0x0F12, 0x0100  },   
+                       
+{ 0x002A, 0x0F70  },   
+{ 0x0F12, 0x0040  },	 //36 //TVAR_ae_BrAve  //ae Target//
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0x3415  },   //3A98 //3A98////lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0x682A  },   //68b0 //7EF4////lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0x8235  },   //8340 //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },    //F424//MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0x3415  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0x682A  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0x8235  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+// /Shutter tunpo  int//        //gain * 256 = value//
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x01B3  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x02A0  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710  },   //MaxAnGain4 //                                             
+// /Shutter tunen  d//
+                  
+{ 0x002A, 0x0544  },                                                               
+{ 0x0F12, 0x0100  },   	                                                    
+{ 0x0F12, 0x8000  },   //Max Gain 8 //                                             
+                  
+                  
+{ 0x002A, 0x1694  },                                                               
+{ 0x0F12, 0x0001  },   //expand forbidde zone //                                   
+                  
+{ 0x002A, 0x021A  },                                                               
+{ 0x0F12, 0x0000  },  //MBR off// 	                                                    
+                  
+                  
+//==============================================//
+//AFC                                          //
+//==============================================//
+{ 0x002A, 0x04d2  },
+{ 0x0F12, 0x065f  },     //065f : Manual AFC on   067f : Manual AFC off //
+{ 0x002A, 0x04ba  },     
+{ 0x0F12, 0x0002  },     // 0002: 60hz  0001 : 50hz //
+{ 0x0F12, 0x0001  },     // afc update command //
+                          
+                    
+                    
+{ 0x002A, 0x06CE  },   
+{ 0x0F12, 0x0100  },	//TVAR_ash_GAsalpha[0] // 	   
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[1] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[2] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[3] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[4] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[5] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[6] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[7] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[8] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[9] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[10] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[11] //
+{ 0x0F12, 0x00e0  },   //TVAR_ash_GAsalpha[12] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[13] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[14] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[15] //
+{ 0x0F12, 0x00e8  },   //TVAR_ash_GAsalpha[16] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[17] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[18] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[19] //
+{ 0x0F12, 0x00f0  },   //TVAR_ash_GAsalpha[20] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[21] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[22] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[23] //
+{ 0x0F12, 0x00f0  },   //TVAR_ash_GAsalpha[24] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[25] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[26] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[27] //
+                       
+{ 0x0F12, 0x00f8  },	//TVAR_ash_GAS OutdoorAlpha[0] //   
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAS OutdoorAlpha[1] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAS OutdoorAlpha[2] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAS OutdoorAlpha[3] //
+                       
+                       
+{ 0x0F12, 0x0036  },	//ash_GASBeta[0] // 	   
+{ 0x0F12, 0x001F  },	//ash_GASBeta[1] //    
+{ 0x0F12, 0x0020  },   //ash_GASBeta[2] // 
+{ 0x0F12, 0x0000  },   //ash_GASBeta[3] // 
+{ 0x0F12, 0x0036  },   //ash_GASBeta[4] // 
+{ 0x0F12, 0x001F  },   //ash_GASBeta[5] // 
+{ 0x0F12, 0x0020  },   //ash_GASBeta[6] // 
+{ 0x0F12, 0x0000  },   //ash_GASBeta[7] // 
+{ 0x0F12, 0x0036  },   //ash_GASBeta[8] // 
+{ 0x0F12, 0x001F  },   //ash_GASBeta[9] // 
+{ 0x0F12, 0x0020  },   //ash_GASBeta[10] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[11] //
+{ 0x0F12, 0x0010  },   //ash_GASBeta[12] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[13] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[14] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[15] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[16] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[17] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[18] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[19] //
+{ 0x0F12, 0x0036  },   //ash_GASBeta[20] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[21] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[22] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[23] //
+{ 0x0F12, 0x0036  },   //ash_GASBeta[24] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[25] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[26] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[27] //
+                       
+{ 0x0F12, 0x0036  },	//ash_GAS OutdoorBeta[0] //   
+{ 0x0F12, 0x001F  },   //ash_GAS OutdoorBeta[1] //
+{ 0x0F12, 0x0020  },   //ash_GAS OutdoorBeta[2] //
+{ 0x0F12, 0x0000  },   //ash_GAS OutdoorBeta[3] //
+                       
+{ 0x002A, 0x075A  },	//ash_bParabolicEstimation//   
+{ 0x0F12, 0x0000  },   //ash_uParabolicCenterX   //
+{ 0x0F12, 0x0400  },   //ash_uParabolicCenterY   //
+{ 0x0F12, 0x0300  },   //ash_uParabolicscalingA  //
+{ 0x0F12, 0x0010  },   //ash_uParabolicscalingB  //
+{ 0x0F12, 0x0011  },   
+                       
+{ 0x002A, 0x347C  },   
+{ 0x0F12, 0x01EE  },	//TVAR_ash_pGAS[0] //     
+{ 0x0F12, 0x01A9  },   //TVAR_ash_pGAS[1] //  
+{ 0x0F12, 0x016A  },   //TVAR_ash_pGAS[2] //  
+{ 0x0F12, 0x0136  },   //TVAR_ash_pGAS[3] //  
+{ 0x0F12, 0x0111  },   //TVAR_ash_pGAS[4] //  
+{ 0x0F12, 0x00F6  },   //TVAR_ash_pGAS[5] //  
+{ 0x0F12, 0x00EB  },   //TVAR_ash_pGAS[6] //  
+{ 0x0F12, 0x00F7  },   //TVAR_ash_pGAS[7] //  
+{ 0x0F12, 0x0111  },   //TVAR_ash_pGAS[8] //  
+{ 0x0F12, 0x013B  },   //TVAR_ash_pGAS[9] //  
+{ 0x0F12, 0x0174  },   //TVAR_ash_pGAS[10] // 
+{ 0x0F12, 0x01BC  },   //TVAR_ash_pGAS[11] // 
+{ 0x0F12, 0x0204  },   //TVAR_ash_pGAS[12] // 
+{ 0x0F12, 0x01BA  },   //TVAR_ash_pGAS[13] // 
+{ 0x0F12, 0x0175  },   //TVAR_ash_pGAS[14] // 
+{ 0x0F12, 0x012C  },   //TVAR_ash_pGAS[15] // 
+{ 0x0F12, 0x00F1  },   //TVAR_ash_pGAS[16] // 
+{ 0x0F12, 0x00C5  },   //TVAR_ash_pGAS[17] // 
+{ 0x0F12, 0x00AA  },   //TVAR_ash_pGAS[18] // 
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[19] // 
+{ 0x0F12, 0x00AA  },   //TVAR_ash_pGAS[20] // 
+{ 0x0F12, 0x00C8  },   //TVAR_ash_pGAS[21] // 
+{ 0x0F12, 0x00FA  },   //TVAR_ash_pGAS[22] // 
+{ 0x0F12, 0x013D  },   //TVAR_ash_pGAS[23] // 
+{ 0x0F12, 0x0187  },   //TVAR_ash_pGAS[24] // 
+{ 0x0F12, 0x01DC  },   //TVAR_ash_pGAS[25] // 
+{ 0x0F12, 0x0184  },   //TVAR_ash_pGAS[26] // 
+{ 0x0F12, 0x0139  },   //TVAR_ash_pGAS[27] // 
+{ 0x0F12, 0x00EB  },   //TVAR_ash_pGAS[28] // 
+{ 0x0F12, 0x00A8  },   //TVAR_ash_pGAS[29] // 
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[30] // 
+{ 0x0F12, 0x005E  },   //TVAR_ash_pGAS[31] // 
+{ 0x0F12, 0x0055  },   //TVAR_ash_pGAS[32] // 
+{ 0x0F12, 0x0060  },   //TVAR_ash_pGAS[33] // 
+{ 0x0F12, 0x0080  },   //TVAR_ash_pGAS[34] // 
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[35] // 
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[36] // 
+{ 0x0F12, 0x0156  },   //TVAR_ash_pGAS[37] // 
+{ 0x0F12, 0x01A8  },   //TVAR_ash_pGAS[38] // 
+{ 0x0F12, 0x015B  },   //TVAR_ash_pGAS[39] // 
+{ 0x0F12, 0x010E  },   //TVAR_ash_pGAS[40] // 
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[41] // 
+{ 0x0F12, 0x0075  },   //TVAR_ash_pGAS[42] // 
+{ 0x0F12, 0x0045  },   //TVAR_ash_pGAS[43] // 
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[44] // 
+{ 0x0F12, 0x0023  },   //TVAR_ash_pGAS[45] // 
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[46] // 
+{ 0x0F12, 0x004C  },   //TVAR_ash_pGAS[47] // 
+{ 0x0F12, 0x0086  },   //TVAR_ash_pGAS[48] // 
+{ 0x0F12, 0x00D3  },   //TVAR_ash_pGAS[49] // 
+{ 0x0F12, 0x0130  },   //TVAR_ash_pGAS[50] // 
+{ 0x0F12, 0x0188  },   //TVAR_ash_pGAS[51] // 
+{ 0x0F12, 0x0140  },   //TVAR_ash_pGAS[52] // 
+{ 0x0F12, 0x00F2  },   //TVAR_ash_pGAS[53] // 
+{ 0x0F12, 0x009E  },   //TVAR_ash_pGAS[54] // 
+{ 0x0F12, 0x0056  },   //TVAR_ash_pGAS[55] // 
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[56] // 
+{ 0x0F12, 0x0013  },   //TVAR_ash_pGAS[57] // 
+{ 0x0F12, 0x000A  },   //TVAR_ash_pGAS[58] // 
+{ 0x0F12, 0x0013  },   //TVAR_ash_pGAS[59] // 
+{ 0x0F12, 0x0030  },   //TVAR_ash_pGAS[60] // 
+{ 0x0F12, 0x006B  },   //TVAR_ash_pGAS[61] // 
+{ 0x0F12, 0x00BA  },   //TVAR_ash_pGAS[62] // 
+{ 0x0F12, 0x0117  },   //TVAR_ash_pGAS[63] // 
+{ 0x0F12, 0x0176  },   //TVAR_ash_pGAS[64] // 
+{ 0x0F12, 0x012F  },   //TVAR_ash_pGAS[65] // 
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[66] // 
+{ 0x0F12, 0x0090  },   //TVAR_ash_pGAS[67] // 
+{ 0x0F12, 0x004D  },   //TVAR_ash_pGAS[68] // 
+{ 0x0F12, 0x0020  },   //TVAR_ash_pGAS[69] // 
+{ 0x0F12, 0x0009  },   //TVAR_ash_pGAS[70] // 
+{ 0x0F12, 0x0000  },   //TVAR_ash_pGAS[71] // 
+{ 0x0F12, 0x000D  },   //TVAR_ash_pGAS[72] // 
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[73] // 
+{ 0x0F12, 0x0062  },   //TVAR_ash_pGAS[74] // 
+{ 0x0F12, 0x00B3  },   //TVAR_ash_pGAS[75] // 
+{ 0x0F12, 0x0114  },   //TVAR_ash_pGAS[76] // 
+{ 0x0F12, 0x0172  },   //TVAR_ash_pGAS[77] // 
+{ 0x0F12, 0x0137  },   //TVAR_ash_pGAS[78] // 
+{ 0x0F12, 0x00E9  },   //TVAR_ash_pGAS[79] // 
+{ 0x0F12, 0x0098  },   //TVAR_ash_pGAS[80] // 
+{ 0x0F12, 0x0054  },   //TVAR_ash_pGAS[81] // 
+{ 0x0F12, 0x002A  },   //TVAR_ash_pGAS[82] // 
+{ 0x0F12, 0x0012  },   //TVAR_ash_pGAS[83] // 
+{ 0x0F12, 0x0009  },   //TVAR_ash_pGAS[84] // 
+{ 0x0F12, 0x0017  },   //TVAR_ash_pGAS[85] // 
+{ 0x0F12, 0x0034  },   //TVAR_ash_pGAS[86] // 
+{ 0x0F12, 0x006D  },   //TVAR_ash_pGAS[87] // 
+{ 0x0F12, 0x00BF  },   //TVAR_ash_pGAS[88] // 
+{ 0x0F12, 0x011C  },   //TVAR_ash_pGAS[89] // 
+{ 0x0F12, 0x0179  },   //TVAR_ash_pGAS[90] // 
+{ 0x0F12, 0x0152  },   //TVAR_ash_pGAS[91] // 
+{ 0x0F12, 0x0106  },   //TVAR_ash_pGAS[92] // 
+{ 0x0F12, 0x00B6  },   //TVAR_ash_pGAS[93] // 
+{ 0x0F12, 0x0070  },   //TVAR_ash_pGAS[94] // 
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[95] // 
+{ 0x0F12, 0x002D  },   //TVAR_ash_pGAS[96] // 
+{ 0x0F12, 0x0024  },   //TVAR_ash_pGAS[97] // 
+{ 0x0F12, 0x0032  },   //TVAR_ash_pGAS[98] // 
+{ 0x0F12, 0x0051  },   //TVAR_ash_pGAS[99] // 
+{ 0x0F12, 0x008A  },   //TVAR_ash_pGAS[100] //
+{ 0x0F12, 0x00DB  },   //TVAR_ash_pGAS[101] //
+{ 0x0F12, 0x0139  },   //TVAR_ash_pGAS[102] //
+{ 0x0F12, 0x0191  },   //TVAR_ash_pGAS[103] //
+{ 0x0F12, 0x0174  },   //TVAR_ash_pGAS[104] //
+{ 0x0F12, 0x012B  },   //TVAR_ash_pGAS[105] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[106] //
+{ 0x0F12, 0x009D  },   //TVAR_ash_pGAS[107] //
+{ 0x0F12, 0x006E  },   //TVAR_ash_pGAS[108] //
+{ 0x0F12, 0x0055  },   //TVAR_ash_pGAS[109] //
+{ 0x0F12, 0x0050  },   //TVAR_ash_pGAS[110] //
+{ 0x0F12, 0x005C  },   //TVAR_ash_pGAS[111] //
+{ 0x0F12, 0x007B  },   //TVAR_ash_pGAS[112] //
+{ 0x0F12, 0x00B7  },   //TVAR_ash_pGAS[113] //
+{ 0x0F12, 0x0109  },   //TVAR_ash_pGAS[114] //
+{ 0x0F12, 0x015E  },   //TVAR_ash_pGAS[115] //
+{ 0x0F12, 0x01B0  },   //TVAR_ash_pGAS[116] //
+{ 0x0F12, 0x01A9  },   //TVAR_ash_pGAS[117] //
+{ 0x0F12, 0x0160  },   //TVAR_ash_pGAS[118] //
+{ 0x0F12, 0x011A  },   //TVAR_ash_pGAS[119] //
+{ 0x0F12, 0x00DE  },   //TVAR_ash_pGAS[120] //
+{ 0x0F12, 0x00B1  },   //TVAR_ash_pGAS[121] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[122] //
+{ 0x0F12, 0x0093  },   //TVAR_ash_pGAS[123] //
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[124] //
+{ 0x0F12, 0x00C3  },   //TVAR_ash_pGAS[125] //
+{ 0x0F12, 0x00FA  },   //TVAR_ash_pGAS[126] //
+{ 0x0F12, 0x0143  },   //TVAR_ash_pGAS[127] //
+{ 0x0F12, 0x0190  },   //TVAR_ash_pGAS[128] //
+{ 0x0F12, 0x01E4  },   //TVAR_ash_pGAS[129] //
+{ 0x0F12, 0x01D5  },   //TVAR_ash_pGAS[130] //
+{ 0x0F12, 0x0194  },   //TVAR_ash_pGAS[131] //
+{ 0x0F12, 0x014E  },   //TVAR_ash_pGAS[132] //
+{ 0x0F12, 0x011F  },   //TVAR_ash_pGAS[133] //
+{ 0x0F12, 0x00F9  },   //TVAR_ash_pGAS[134] //
+{ 0x0F12, 0x00E1  },   //TVAR_ash_pGAS[135] //
+{ 0x0F12, 0x00DA  },   //TVAR_ash_pGAS[136] //
+{ 0x0F12, 0x00E8  },   //TVAR_ash_pGAS[137] //
+{ 0x0F12, 0x010A  },   //TVAR_ash_pGAS[138] //
+{ 0x0F12, 0x0139  },   //TVAR_ash_pGAS[139] //
+{ 0x0F12, 0x017B  },   //TVAR_ash_pGAS[140] //
+{ 0x0F12, 0x01C5  },   //TVAR_ash_pGAS[141] //
+{ 0x0F12, 0x0205  },   //TVAR_ash_pGAS[142] //
+{ 0x0F12, 0x01A2  },   //TVAR_ash_pGAS[143] //
+{ 0x0F12, 0x015F  },   //TVAR_ash_pGAS[144] //
+{ 0x0F12, 0x0126  },   //TVAR_ash_pGAS[145] //
+{ 0x0F12, 0x00F9  },   //TVAR_ash_pGAS[146] //
+{ 0x0F12, 0x00D7  },   //TVAR_ash_pGAS[147] //
+{ 0x0F12, 0x00BF  },   //TVAR_ash_pGAS[148] //
+{ 0x0F12, 0x00B6  },   //TVAR_ash_pGAS[149] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[150] //
+{ 0x0F12, 0x00D2  },   //TVAR_ash_pGAS[151] //
+{ 0x0F12, 0x00F3  },   //TVAR_ash_pGAS[152] //
+{ 0x0F12, 0x011D  },   //TVAR_ash_pGAS[153] //
+{ 0x0F12, 0x015A  },   //TVAR_ash_pGAS[154] //
+{ 0x0F12, 0x019E  },   //TVAR_ash_pGAS[155] //
+{ 0x0F12, 0x0171  },   //TVAR_ash_pGAS[156] //
+{ 0x0F12, 0x012E  },   //TVAR_ash_pGAS[157] //
+{ 0x0F12, 0x00F1  },   //TVAR_ash_pGAS[158] //
+{ 0x0F12, 0x00BF  },   //TVAR_ash_pGAS[159] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[160] //
+{ 0x0F12, 0x0081  },   //TVAR_ash_pGAS[161] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[162] //
+{ 0x0F12, 0x0080  },   //TVAR_ash_pGAS[163] //
+{ 0x0F12, 0x0097  },   //TVAR_ash_pGAS[164] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[165] //
+{ 0x0F12, 0x00EE  },   //TVAR_ash_pGAS[166] //
+{ 0x0F12, 0x012B  },   //TVAR_ash_pGAS[167] //
+{ 0x0F12, 0x0177  },   //TVAR_ash_pGAS[168] //
+{ 0x0F12, 0x0144  },   //TVAR_ash_pGAS[169] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_pGAS[170] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[171] //
+{ 0x0F12, 0x0088  },   //TVAR_ash_pGAS[172] //
+{ 0x0F12, 0x005F  },   //TVAR_ash_pGAS[173] //
+{ 0x0F12, 0x0049  },   //TVAR_ash_pGAS[174] //
+{ 0x0F12, 0x0041  },   //TVAR_ash_pGAS[175] //
+{ 0x0F12, 0x0049  },   //TVAR_ash_pGAS[176] //
+{ 0x0F12, 0x0061  },   //TVAR_ash_pGAS[177] //
+{ 0x0F12, 0x0089  },   //TVAR_ash_pGAS[178] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[179] //
+{ 0x0F12, 0x0104  },   //TVAR_ash_pGAS[180] //
+{ 0x0F12, 0x014D  },   //TVAR_ash_pGAS[181] //
+{ 0x0F12, 0x0122  },   //TVAR_ash_pGAS[182] //
+{ 0x0F12, 0x00DD  },   //TVAR_ash_pGAS[183] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[184] //
+{ 0x0F12, 0x005F  },   //TVAR_ash_pGAS[185] //
+{ 0x0F12, 0x0036  },   //TVAR_ash_pGAS[186] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[187] //
+{ 0x0F12, 0x0019  },   //TVAR_ash_pGAS[188] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[189] //
+{ 0x0F12, 0x003A  },   //TVAR_ash_pGAS[190] //
+{ 0x0F12, 0x0066  },   //TVAR_ash_pGAS[191] //
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[192] //
+{ 0x0F12, 0x00E6  },   //TVAR_ash_pGAS[193] //
+{ 0x0F12, 0x0130  },   //TVAR_ash_pGAS[194] //
+{ 0x0F12, 0x010B  },   //TVAR_ash_pGAS[195] //
+{ 0x0F12, 0x00C6  },   //TVAR_ash_pGAS[196] //
+{ 0x0F12, 0x0082  },   //TVAR_ash_pGAS[197] //
+{ 0x0F12, 0x0047  },   //TVAR_ash_pGAS[198] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[199] //
+{ 0x0F12, 0x000D  },   //TVAR_ash_pGAS[200] //
+{ 0x0F12, 0x0007  },   //TVAR_ash_pGAS[201] //
+{ 0x0F12, 0x000F  },   //TVAR_ash_pGAS[202] //
+{ 0x0F12, 0x0027  },   //TVAR_ash_pGAS[203] //
+{ 0x0F12, 0x0053  },   //TVAR_ash_pGAS[204] //
+{ 0x0F12, 0x008F  },   //TVAR_ash_pGAS[205] //
+{ 0x0F12, 0x00D6  },   //TVAR_ash_pGAS[206] //
+{ 0x0F12, 0x0121  },   //TVAR_ash_pGAS[207] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_pGAS[208] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[209] //
+{ 0x0F12, 0x0077  },   //TVAR_ash_pGAS[210] //
+{ 0x0F12, 0x0040  },   //TVAR_ash_pGAS[211] //
+{ 0x0F12, 0x001A  },   //TVAR_ash_pGAS[212] //
+{ 0x0F12, 0x0007  },   //TVAR_ash_pGAS[213] //
+{ 0x0F12, 0x0000  },   //TVAR_ash_pGAS[214] //
+{ 0x0F12, 0x000B  },   //TVAR_ash_pGAS[215] //
+{ 0x0F12, 0x0023  },   //TVAR_ash_pGAS[216] //
+{ 0x0F12, 0x004E  },   //TVAR_ash_pGAS[217] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[218] //
+{ 0x0F12, 0x00D3  },   //TVAR_ash_pGAS[219] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[220] //
+{ 0x0F12, 0x0103  },   //TVAR_ash_pGAS[221] //
+{ 0x0F12, 0x00C1  },   //TVAR_ash_pGAS[222] //
+{ 0x0F12, 0x007D  },   //TVAR_ash_pGAS[223] //
+{ 0x0F12, 0x0046  },   //TVAR_ash_pGAS[224] //
+{ 0x0F12, 0x0024  },   //TVAR_ash_pGAS[225] //
+{ 0x0F12, 0x0010  },   //TVAR_ash_pGAS[226] //
+{ 0x0F12, 0x0008  },   //TVAR_ash_pGAS[227] //
+{ 0x0F12, 0x0014  },   //TVAR_ash_pGAS[228] //
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[229] //
+{ 0x0F12, 0x0059  },   //TVAR_ash_pGAS[230] //
+{ 0x0F12, 0x0094  },   //TVAR_ash_pGAS[231] //
+{ 0x0F12, 0x00DB  },   //TVAR_ash_pGAS[232] //
+{ 0x0F12, 0x0125  },   //TVAR_ash_pGAS[233] //
+{ 0x0F12, 0x0117  },   //TVAR_ash_pGAS[234] //
+{ 0x0F12, 0x00D5  },   //TVAR_ash_pGAS[235] //
+{ 0x0F12, 0x0092  },   //TVAR_ash_pGAS[236] //
+{ 0x0F12, 0x005C  },   //TVAR_ash_pGAS[237] //
+{ 0x0F12, 0x0038  },   //TVAR_ash_pGAS[238] //
+{ 0x0F12, 0x0026  },   //TVAR_ash_pGAS[239] //
+{ 0x0F12, 0x0020  },   //TVAR_ash_pGAS[240] //
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[241] //
+{ 0x0F12, 0x0044  },   //TVAR_ash_pGAS[242] //
+{ 0x0F12, 0x006F  },   //TVAR_ash_pGAS[243] //
+{ 0x0F12, 0x00AC  },   //TVAR_ash_pGAS[244] //
+{ 0x0F12, 0x00F2  },   //TVAR_ash_pGAS[245] //
+{ 0x0F12, 0x013B  },   //TVAR_ash_pGAS[246] //
+{ 0x0F12, 0x0131  },   //TVAR_ash_pGAS[247] //
+{ 0x0F12, 0x00EE  },   //TVAR_ash_pGAS[248] //
+{ 0x0F12, 0x00B3  },   //TVAR_ash_pGAS[249] //
+{ 0x0F12, 0x007E  },   //TVAR_ash_pGAS[250] //
+{ 0x0F12, 0x005B  },   //TVAR_ash_pGAS[251] //
+{ 0x0F12, 0x0047  },   //TVAR_ash_pGAS[252] //
+{ 0x0F12, 0x0044  },   //TVAR_ash_pGAS[253] //
+{ 0x0F12, 0x004E  },   //TVAR_ash_pGAS[254] //
+{ 0x0F12, 0x0067  },   //TVAR_ash_pGAS[255] //
+{ 0x0F12, 0x0094  },   //TVAR_ash_pGAS[256] //
+{ 0x0F12, 0x00D0  },   //TVAR_ash_pGAS[257] //
+{ 0x0F12, 0x0112  },   //TVAR_ash_pGAS[258] //
+{ 0x0F12, 0x0159  },   //TVAR_ash_pGAS[259] //
+{ 0x0F12, 0x015E  },   //TVAR_ash_pGAS[260] //
+{ 0x0F12, 0x011B  },   //TVAR_ash_pGAS[261] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[262] //
+{ 0x0F12, 0x00B1  },   //TVAR_ash_pGAS[263] //
+{ 0x0F12, 0x008E  },   //TVAR_ash_pGAS[264] //
+{ 0x0F12, 0x007E  },   //TVAR_ash_pGAS[265] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[266] //
+{ 0x0F12, 0x0084  },   //TVAR_ash_pGAS[267] //
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[268] //
+{ 0x0F12, 0x00C8  },   //TVAR_ash_pGAS[269] //
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[270] //
+{ 0x0F12, 0x013A  },   //TVAR_ash_pGAS[271] //
+{ 0x0F12, 0x0185  },   //TVAR_ash_pGAS[272] //
+{ 0x0F12, 0x0188  },   //TVAR_ash_pGAS[273] //
+{ 0x0F12, 0x0148  },   //TVAR_ash_pGAS[274] //
+{ 0x0F12, 0x010D  },   //TVAR_ash_pGAS[275] //
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[276] //
+{ 0x0F12, 0x00C7  },   //TVAR_ash_pGAS[277] //
+{ 0x0F12, 0x00B4  },   //TVAR_ash_pGAS[278] //
+{ 0x0F12, 0x00B2  },   //TVAR_ash_pGAS[279] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[280] //
+{ 0x0F12, 0x00D9  },   //TVAR_ash_pGAS[281] //
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[282] //
+{ 0x0F12, 0x012F  },   //TVAR_ash_pGAS[283] //
+{ 0x0F12, 0x016D  },   //TVAR_ash_pGAS[284] //
+{ 0x0F12, 0x01A7  },   //TVAR_ash_pGAS[285] //
+{ 0x0F12, 0x018F  },   //TVAR_ash_pGAS[286] //
+{ 0x0F12, 0x014E  },   //TVAR_ash_pGAS[287] //
+{ 0x0F12, 0x0119  },   //TVAR_ash_pGAS[288] //
+{ 0x0F12, 0x00EC  },   //TVAR_ash_pGAS[289] //
+{ 0x0F12, 0x00CD  },   //TVAR_ash_pGAS[290] //
+{ 0x0F12, 0x00BB  },   //TVAR_ash_pGAS[291] //
+{ 0x0F12, 0x00B8  },   //TVAR_ash_pGAS[292] //
+{ 0x0F12, 0x00C4  },   //TVAR_ash_pGAS[293] //
+{ 0x0F12, 0x00DE  },   //TVAR_ash_pGAS[294] //
+{ 0x0F12, 0x0105  },   //TVAR_ash_pGAS[295] //
+{ 0x0F12, 0x0135  },   //TVAR_ash_pGAS[296] //
+{ 0x0F12, 0x0176  },   //TVAR_ash_pGAS[297] //
+{ 0x0F12, 0x01B8  },   //TVAR_ash_pGAS[298] //
+{ 0x0F12, 0x0161  },   //TVAR_ash_pGAS[299] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[300] //
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[301] //
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[302] //
+{ 0x0F12, 0x0093  },   //TVAR_ash_pGAS[303] //
+{ 0x0F12, 0x0080  },   //TVAR_ash_pGAS[304] //
+{ 0x0F12, 0x007C  },   //TVAR_ash_pGAS[305] //
+{ 0x0F12, 0x0087  },   //TVAR_ash_pGAS[306] //
+{ 0x0F12, 0x00A3  },   //TVAR_ash_pGAS[307] //
+{ 0x0F12, 0x00CD  },   //TVAR_ash_pGAS[308] //
+{ 0x0F12, 0x0104  },   //TVAR_ash_pGAS[309] //
+{ 0x0F12, 0x0142  },   //TVAR_ash_pGAS[310] //
+{ 0x0F12, 0x0192  },   //TVAR_ash_pGAS[311] //
+{ 0x0F12, 0x0136  },   //TVAR_ash_pGAS[312] //
+{ 0x0F12, 0x00F4  },   //TVAR_ash_pGAS[313] //
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[314] //
+{ 0x0F12, 0x0081  },   //TVAR_ash_pGAS[315] //
+{ 0x0F12, 0x005C  },   //TVAR_ash_pGAS[316] //
+{ 0x0F12, 0x0048  },   //TVAR_ash_pGAS[317] //
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[318] //
+{ 0x0F12, 0x004E  },   //TVAR_ash_pGAS[319] //
+{ 0x0F12, 0x006A  },   //TVAR_ash_pGAS[320] //
+{ 0x0F12, 0x0097  },   //TVAR_ash_pGAS[321] //
+{ 0x0F12, 0x00D0  },   //TVAR_ash_pGAS[322] //
+{ 0x0F12, 0x0116  },   //TVAR_ash_pGAS[323] //
+{ 0x0F12, 0x0160  },   //TVAR_ash_pGAS[324] //
+{ 0x0F12, 0x0118  },   //TVAR_ash_pGAS[325] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[326] //
+{ 0x0F12, 0x0093  },   //TVAR_ash_pGAS[327] //
+{ 0x0F12, 0x005B  },   //TVAR_ash_pGAS[328] //
+{ 0x0F12, 0x0035  },   //TVAR_ash_pGAS[329] //
+{ 0x0F12, 0x0020  },   //TVAR_ash_pGAS[330] //
+{ 0x0F12, 0x001B  },   //TVAR_ash_pGAS[331] //
+{ 0x0F12, 0x0024  },   //TVAR_ash_pGAS[332] //
+{ 0x0F12, 0x0041  },   //TVAR_ash_pGAS[333] //
+{ 0x0F12, 0x006F  },   //TVAR_ash_pGAS[334] //
+{ 0x0F12, 0x00AC  },   //TVAR_ash_pGAS[335] //
+{ 0x0F12, 0x00F3  },   //TVAR_ash_pGAS[336] //
+{ 0x0F12, 0x013F  },   //TVAR_ash_pGAS[337] //
+{ 0x0F12, 0x0105  },   //TVAR_ash_pGAS[338] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[339] //
+{ 0x0F12, 0x007F  },   //TVAR_ash_pGAS[340] //
+{ 0x0F12, 0x0046  },   //TVAR_ash_pGAS[341] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[342] //
+{ 0x0F12, 0x000E  },   //TVAR_ash_pGAS[343] //
+{ 0x0F12, 0x0007  },   //TVAR_ash_pGAS[344] //
+{ 0x0F12, 0x0010  },   //TVAR_ash_pGAS[345] //
+{ 0x0F12, 0x002A  },   //TVAR_ash_pGAS[346] //
+{ 0x0F12, 0x0058  },   //TVAR_ash_pGAS[347] //
+{ 0x0F12, 0x0094  },   //TVAR_ash_pGAS[348] //
+{ 0x0F12, 0x00DB  },   //TVAR_ash_pGAS[349] //
+{ 0x0F12, 0x0127  },   //TVAR_ash_pGAS[350] //
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[351] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[352] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[353] //
+{ 0x0F12, 0x0042  },   //TVAR_ash_pGAS[354] //
+{ 0x0F12, 0x001C  },   //TVAR_ash_pGAS[355] //
+{ 0x0F12, 0x0008  },   //TVAR_ash_pGAS[356] //
+{ 0x0F12, 0x0000  },   //TVAR_ash_pGAS[357] //
+{ 0x0F12, 0x000B  },   //TVAR_ash_pGAS[358] //
+{ 0x0F12, 0x0023  },   //TVAR_ash_pGAS[359] //
+{ 0x0F12, 0x0050  },   //TVAR_ash_pGAS[360] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[361] //
+{ 0x0F12, 0x00D3  },   //TVAR_ash_pGAS[362] //
+{ 0x0F12, 0x011D  },   //TVAR_ash_pGAS[363] //
+{ 0x0F12, 0x0108  },   //TVAR_ash_pGAS[364] //
+{ 0x0F12, 0x00C4  },   //TVAR_ash_pGAS[365] //
+{ 0x0F12, 0x0083  },   //TVAR_ash_pGAS[366] //
+{ 0x0F12, 0x004C  },   //TVAR_ash_pGAS[367] //
+{ 0x0F12, 0x0027  },   //TVAR_ash_pGAS[368] //
+{ 0x0F12, 0x0011  },   //TVAR_ash_pGAS[369] //
+{ 0x0F12, 0x0008  },   //TVAR_ash_pGAS[370] //
+{ 0x0F12, 0x0013  },   //TVAR_ash_pGAS[371] //
+{ 0x0F12, 0x002A  },   //TVAR_ash_pGAS[372] //
+{ 0x0F12, 0x0055  },   //TVAR_ash_pGAS[373] //
+{ 0x0F12, 0x008F  },   //TVAR_ash_pGAS[374] //
+{ 0x0F12, 0x00D5  },   //TVAR_ash_pGAS[375] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[376] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[377] //
+{ 0x0F12, 0x00DC  },   //TVAR_ash_pGAS[378] //
+{ 0x0F12, 0x009C  },   //TVAR_ash_pGAS[379] //
+{ 0x0F12, 0x0064  },   //TVAR_ash_pGAS[380] //
+{ 0x0F12, 0x003D  },   //TVAR_ash_pGAS[381] //
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[382] //
+{ 0x0F12, 0x001F  },   //TVAR_ash_pGAS[383] //
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[384] //
+{ 0x0F12, 0x003F  },   //TVAR_ash_pGAS[385] //
+{ 0x0F12, 0x0069  },   //TVAR_ash_pGAS[386] //
+{ 0x0F12, 0x00A3  },   //TVAR_ash_pGAS[387] //
+{ 0x0F12, 0x00E8  },   //TVAR_ash_pGAS[388] //
+{ 0x0F12, 0x012D  },   //TVAR_ash_pGAS[389] //
+{ 0x0F12, 0x013D  },   //TVAR_ash_pGAS[390] //
+{ 0x0F12, 0x00FB  },   //TVAR_ash_pGAS[391] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[392] //
+{ 0x0F12, 0x0089  },   //TVAR_ash_pGAS[393] //
+{ 0x0F12, 0x0063  },   //TVAR_ash_pGAS[394] //
+{ 0x0F12, 0x004C  },   //TVAR_ash_pGAS[395] //
+{ 0x0F12, 0x0045  },   //TVAR_ash_pGAS[396] //
+{ 0x0F12, 0x004B  },   //TVAR_ash_pGAS[397] //
+{ 0x0F12, 0x0061  },   //TVAR_ash_pGAS[398] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[399] //
+{ 0x0F12, 0x00C4  },   //TVAR_ash_pGAS[400] //
+{ 0x0F12, 0x0102  },   //TVAR_ash_pGAS[401] //
+{ 0x0F12, 0x014B  },   //TVAR_ash_pGAS[402] //
+{ 0x0F12, 0x016F  },   //TVAR_ash_pGAS[403] //
+{ 0x0F12, 0x0129  },   //TVAR_ash_pGAS[404] //
+{ 0x0F12, 0x00F0  },   //TVAR_ash_pGAS[405] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[406] //
+{ 0x0F12, 0x009A  },   //TVAR_ash_pGAS[407] //
+{ 0x0F12, 0x0084  },   //TVAR_ash_pGAS[408] //
+{ 0x0F12, 0x007B  },   //TVAR_ash_pGAS[409] //
+{ 0x0F12, 0x0082  },   //TVAR_ash_pGAS[410] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[411] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[412] //
+{ 0x0F12, 0x00EF  },   //TVAR_ash_pGAS[413] //
+{ 0x0F12, 0x0129  },   //TVAR_ash_pGAS[414] //
+{ 0x0F12, 0x0173  },   //TVAR_ash_pGAS[415] //
+{ 0x0F12, 0x01A0  },   //TVAR_ash_pGAS[416] //
+{ 0x0F12, 0x015B  },   //TVAR_ash_pGAS[417] //
+{ 0x0F12, 0x0121  },   //TVAR_ash_pGAS[418] //
+{ 0x0F12, 0x00F9  },   //TVAR_ash_pGAS[419] //
+{ 0x0F12, 0x00D8  },   //TVAR_ash_pGAS[420] //
+{ 0x0F12, 0x00C2  },   //TVAR_ash_pGAS[421] //
+{ 0x0F12, 0x00B7  },   //TVAR_ash_pGAS[422] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[423] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[424] //
+{ 0x0F12, 0x00F4  },   //TVAR_ash_pGAS[425] //
+{ 0x0F12, 0x0120  },   //TVAR_ash_pGAS[426] //
+{ 0x0F12, 0x015D  },   //TVAR_ash_pGAS[427] //
+{ 0x0F12, 0x0198  },   //TVAR_ash_pGAS[428] //
+{ 0x0F12, 0x013A  },   //TVAR_ash_pGAS[429] //
+{ 0x0F12, 0x010B  },   //TVAR_ash_pGAS[430] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[431] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[432] //
+{ 0x0F12, 0x00A7  },   //TVAR_ash_pGAS[433] //
+{ 0x0F12, 0x009A  },   //TVAR_ash_pGAS[434] //
+{ 0x0F12, 0x0097  },   //TVAR_ash_pGAS[435] //
+{ 0x0F12, 0x00A2  },   //TVAR_ash_pGAS[436] //
+{ 0x0F12, 0x00B9  },   //TVAR_ash_pGAS[437] //
+{ 0x0F12, 0x00D6  },   //TVAR_ash_pGAS[438] //
+{ 0x0F12, 0x00FD  },   //TVAR_ash_pGAS[439] //
+{ 0x0F12, 0x0133  },   //TVAR_ash_pGAS[440] //
+{ 0x0F12, 0x0165  },   //TVAR_ash_pGAS[441] //
+{ 0x0F12, 0x0117  },   //TVAR_ash_pGAS[442] //
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[443] //
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[444] //
+{ 0x0F12, 0x0091  },   //TVAR_ash_pGAS[445] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[446] //
+{ 0x0F12, 0x006D  },   //TVAR_ash_pGAS[447] //
+{ 0x0F12, 0x0069  },   //TVAR_ash_pGAS[448] //
+{ 0x0F12, 0x0072  },   //TVAR_ash_pGAS[449] //
+{ 0x0F12, 0x0088  },   //TVAR_ash_pGAS[450] //
+{ 0x0F12, 0x00A9  },   //TVAR_ash_pGAS[451] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[452] //
+{ 0x0F12, 0x0108  },   //TVAR_ash_pGAS[453] //
+{ 0x0F12, 0x0148  },   //TVAR_ash_pGAS[454] //
+{ 0x0F12, 0x00F1  },   //TVAR_ash_pGAS[455] //
+{ 0x0F12, 0x00BD  },   //TVAR_ash_pGAS[456] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[457] //
+{ 0x0F12, 0x0063  },   //TVAR_ash_pGAS[458] //
+{ 0x0F12, 0x0049  },   //TVAR_ash_pGAS[459] //
+{ 0x0F12, 0x003D  },   //TVAR_ash_pGAS[460] //
+{ 0x0F12, 0x003A  },   //TVAR_ash_pGAS[461] //
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[462] //
+{ 0x0F12, 0x0057  },   //TVAR_ash_pGAS[463] //
+{ 0x0F12, 0x007A  },   //TVAR_ash_pGAS[464] //
+{ 0x0F12, 0x00A8  },   //TVAR_ash_pGAS[465] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[466] //
+{ 0x0F12, 0x011B  },   //TVAR_ash_pGAS[467] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[468] //
+{ 0x0F12, 0x00A1  },   //TVAR_ash_pGAS[469] //
+{ 0x0F12, 0x006D  },   //TVAR_ash_pGAS[470] //
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[471] //
+{ 0x0F12, 0x0027  },   //TVAR_ash_pGAS[472] //
+{ 0x0F12, 0x001B  },   //TVAR_ash_pGAS[473] //
+{ 0x0F12, 0x0019  },   //TVAR_ash_pGAS[474] //
+{ 0x0F12, 0x001E  },   //TVAR_ash_pGAS[475] //
+{ 0x0F12, 0x0033  },   //TVAR_ash_pGAS[476] //
+{ 0x0F12, 0x0057  },   //TVAR_ash_pGAS[477] //
+{ 0x0F12, 0x0087  },   //TVAR_ash_pGAS[478] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[479] //
+{ 0x0F12, 0x00FA  },   //TVAR_ash_pGAS[480] //
+{ 0x0F12, 0x00C1  },   //TVAR_ash_pGAS[481] //
+{ 0x0F12, 0x008F  },   //TVAR_ash_pGAS[482] //
+{ 0x0F12, 0x005B  },	//TVAR_ash_pGAS[483] //                                                                        
+{ 0x0F12, 0x0031  },	//TVAR_ash_pGAS[484] //                                                                        
+{ 0x0F12, 0x0016  },	//TVAR_ash_pGAS[485] //                                                                        
+{ 0x0F12, 0x000B  },	//TVAR_ash_pGAS[486] //                                                                        
+{ 0x0F12, 0x0006  },	//TVAR_ash_pGAS[487] //                                                                        
+{ 0x0F12, 0x000D  },	//TVAR_ash_pGAS[488] //                                                                        
+{ 0x0F12, 0x001F  },	//TVAR_ash_pGAS[489] //                                                                        
+{ 0x0F12, 0x0042  },	//TVAR_ash_pGAS[490] //                                                                        
+{ 0x0F12, 0x0070  },	//TVAR_ash_pGAS[491] //                                                                        
+{ 0x0F12, 0x00AA  },	//TVAR_ash_pGAS[492] //                                                                        
+{ 0x0F12, 0x00E5  },	//TVAR_ash_pGAS[493] //                                                                        
+{ 0x0F12, 0x00BD  },	//TVAR_ash_pGAS[494] //                                                                        
+{ 0x0F12, 0x008A  },	//TVAR_ash_pGAS[495] //                                                                        
+{ 0x0F12, 0x0056  },	//TVAR_ash_pGAS[496] //                                                                        
+{ 0x0F12, 0x002C  },	//TVAR_ash_pGAS[497] //                                                                        
+{ 0x0F12, 0x0011  },	//TVAR_ash_pGAS[498] //                                                                        
+{ 0x0F12, 0x0005  },	//TVAR_ash_pGAS[499] //                                                                        
+{ 0x0F12, 0x0000  },	//TVAR_ash_pGAS[500] //                                                                        
+{ 0x0F12, 0x0008  },	//TVAR_ash_pGAS[501] //                                                                        
+{ 0x0F12, 0x0018  },	//TVAR_ash_pGAS[502] //                                                                        
+{ 0x0F12, 0x0039  },	//TVAR_ash_pGAS[503] //                                                                        
+{ 0x0F12, 0x0068  },	//TVAR_ash_pGAS[504] //                                                                        
+{ 0x0F12, 0x00A1  },	//TVAR_ash_pGAS[505] //                                                                        
+{ 0x0F12, 0x00DA  },	//TVAR_ash_pGAS[506] //                                                                        
+{ 0x0F12, 0x00C4  },	//TVAR_ash_pGAS[507] //                                                                        
+{ 0x0F12, 0x0092  },	//TVAR_ash_pGAS[508] //                                                                        
+{ 0x0F12, 0x005F  },	//TVAR_ash_pGAS[509] //                                                                        
+{ 0x0F12, 0x0034  },	//TVAR_ash_pGAS[510] //                                                                        
+{ 0x0F12, 0x001B  },	//TVAR_ash_pGAS[511] //                                                                        
+{ 0x0F12, 0x000D  },	//TVAR_ash_pGAS[512] //                                                                        
+{ 0x0F12, 0x0007  },	//TVAR_ash_pGAS[513] //                                                                        
+{ 0x0F12, 0x000E  },	//TVAR_ash_pGAS[514] //                                                                        
+{ 0x0F12, 0x001E  },	//TVAR_ash_pGAS[515] //                                                                        
+{ 0x0F12, 0x003E  },	//TVAR_ash_pGAS[516] //                                                                        
+{ 0x0F12, 0x006A  },	//TVAR_ash_pGAS[517] //                                                                        
+{ 0x0F12, 0x00A2  },	//TVAR_ash_pGAS[518] //                                                                        
+{ 0x0F12, 0x00DB  },	//TVAR_ash_pGAS[519] //                                                                        
+{ 0x0F12, 0x00D7  },	//TVAR_ash_pGAS[520] //                                                                        
+{ 0x0F12, 0x00A3  },	//TVAR_ash_pGAS[521] //                                                                        
+{ 0x0F12, 0x0073  },	//TVAR_ash_pGAS[522] //                                                                        
+{ 0x0F12, 0x0049  },	//TVAR_ash_pGAS[523] //                                                                        
+{ 0x0F12, 0x002F  },	//TVAR_ash_pGAS[524] //                                                                        
+{ 0x0F12, 0x0022  },	//TVAR_ash_pGAS[525] //                                                                        
+{ 0x0F12, 0x001B  },	//TVAR_ash_pGAS[526] //                                                                        
+{ 0x0F12, 0x0023  },	//TVAR_ash_pGAS[527] //                                                                        
+{ 0x0F12, 0x0031  },	//TVAR_ash_pGAS[528] //                                                                        
+{ 0x0F12, 0x0050  },	//TVAR_ash_pGAS[529] //                                                                        
+{ 0x0F12, 0x007C  },	//TVAR_ash_pGAS[530] //                                                                        
+{ 0x0F12, 0x00B1  },	//TVAR_ash_pGAS[531] //                                                                        
+{ 0x0F12, 0x00E9  },	//TVAR_ash_pGAS[532] //                                                                        
+{ 0x0F12, 0x00F2  },	//TVAR_ash_pGAS[533] //                                                                        
+{ 0x0F12, 0x00C0  },	//TVAR_ash_pGAS[534] //                                                                        
+{ 0x0F12, 0x0091  },	//TVAR_ash_pGAS[535] //                                                                        
+{ 0x0F12, 0x006A  },	//TVAR_ash_pGAS[536] //                                                                        
+{ 0x0F12, 0x0050  },	//TVAR_ash_pGAS[537] //                                                                        
+{ 0x0F12, 0x0041  },	//TVAR_ash_pGAS[538] //                                                                        
+{ 0x0F12, 0x003C  },	//TVAR_ash_pGAS[539] //                                                                        
+{ 0x0F12, 0x0040  },	//TVAR_ash_pGAS[540] //                                                                        
+{ 0x0F12, 0x004F  },	//TVAR_ash_pGAS[541] //                                                                        
+{ 0x0F12, 0x006D  },	//TVAR_ash_pGAS[542] //                                                                        
+{ 0x0F12, 0x0099  },	//TVAR_ash_pGAS[543] //                                                                        
+{ 0x0F12, 0x00C9  },	//TVAR_ash_pGAS[544] //                                                                        
+{ 0x0F12, 0x0102  },	//TVAR_ash_pGAS[545] //                                                                        
+{ 0x0F12, 0x0120  },	//TVAR_ash_pGAS[546] //                                                                        
+{ 0x0F12, 0x00EB  },	//TVAR_ash_pGAS[547] //                                                                        
+{ 0x0F12, 0x00BE  },	//TVAR_ash_pGAS[548] //                                                                        
+{ 0x0F12, 0x0099  },	//TVAR_ash_pGAS[549] //                                                                        
+{ 0x0F12, 0x0081  },	//TVAR_ash_pGAS[550] //                                                                        
+{ 0x0F12, 0x0074  },	//TVAR_ash_pGAS[551] //                                                                        
+{ 0x0F12, 0x006F  },	//TVAR_ash_pGAS[552] //                                                                        
+{ 0x0F12, 0x0071  },	//TVAR_ash_pGAS[553] //                                                                        
+{ 0x0F12, 0x0082  },	//TVAR_ash_pGAS[554] //                                                                        
+{ 0x0F12, 0x009B  },	//TVAR_ash_pGAS[555] //                                                                        
+{ 0x0F12, 0x00C0  },	//TVAR_ash_pGAS[556] //                                                                        
+{ 0x0F12, 0x00EE  },	//TVAR_ash_pGAS[557] //                                                                        
+{ 0x0F12, 0x0126  },	//TVAR_ash_pGAS[558] //                                                                        
+{ 0x0F12, 0x0147  },	//TVAR_ash_pGAS[559] //                                                                        
+{ 0x0F12, 0x0116  },	//TVAR_ash_pGAS[560] //                                                                        
+{ 0x0F12, 0x00E7  },	//TVAR_ash_pGAS[561] //                                                                        
+{ 0x0F12, 0x00C9  },	//TVAR_ash_pGAS[562] //                                                                        
+{ 0x0F12, 0x00B4  },	//TVAR_ash_pGAS[563] //                                                                        
+{ 0x0F12, 0x00A7  },	//TVAR_ash_pGAS[564] //                                                                        
+{ 0x0F12, 0x00A0  },	//TVAR_ash_pGAS[565] //                                                                        
+{ 0x0F12, 0x00A3  },	//TVAR_ash_pGAS[566] //                                                                        
+{ 0x0F12, 0x00B1  },	//TVAR_ash_pGAS[567] //                                                                        
+{ 0x0F12, 0x00C9  },	//TVAR_ash_pGAS[568] //                                                                        
+{ 0x0F12, 0x00EA  },	//TVAR_ash_pGAS[569] //                                                                        
+{ 0x0F12, 0x011B  },	//TVAR_ash_pGAS[570] //                                                                        
+{ 0x0F12, 0x0141  },	//TVAR_ash_pGAS[571] //                                                                        
+                        
+{ 0x002A, 0x074E  },	    
+{ 0x0F12, 0x0001  },	//ash_bLumaMode //         	                                                                        
+{ 0x002A, 0x0D30  },                               
+{ 0x0F12, 0x02A8  },	//awbb_GLocu //        
+{ 0x0F12, 0x0347  },	//awbb_GLocuSB //      
+                                                   
+{ 0x002A, 0x06B8  },                               
+{ 0x0F12, 0x00C0  },	//TVAR_ash_AwbashCord[0] //                                                                        
+{ 0x0F12, 0x00E0  },	//TVAR_ash_AwbashCord[1] //                                                                        
+{ 0x0F12, 0x0120  },	//TVAR_ash_AwbashCord[2] //                                                                        
+{ 0x0F12, 0x0124  },	//TVAR_ash_AwbashCord[3] //                                                                        
+{ 0x0F12, 0x0156  },	//TVAR_ash_AwbashCord[4] //                                                                        
+{ 0x0F12, 0x017F  },	//TVAR_ash_AwbashCord[5] //                                                                        
+{ 0x0F12, 0x018F  },	//TVAR_ash_AwbashCord[6] //                                                                        
+                                                   
+                                                   
+{ 0x002A, 0x0664  },                               
+{ 0x0F12, 0x013E  },	//seti_uContrastCenter //                                                                          
+                                                   
+                                                   
+{ 0x002A, 0x06C6  },                               
+{ 0x0F12, 0x010B  },	//ash_CGrasalphaS[0] //
+{ 0x0F12, 0x0103  },	//ash_CGrasalphaS[1] //
+{ 0x0F12, 0x00FC  },	//ash_CGrasalphaS[2] //
+{ 0x0F12, 0x010C  },	//ash_CGrasalphaS[3] //
+                        
+{ 0x002A, 0x0C48  },    
+{ 0x0F12, 0x03C8  },	//awbb_IndoorGrZones_m_BGrid[0] // 		                                                                        
+{ 0x0F12, 0x03DE  },	//awbb_IndoorGrZones_m_BGrid[1] //                                                                         
+{ 0x0F12, 0x0372  },	//awbb_IndoorGrZones_m_BGrid[2] //                                                                         
+{ 0x0F12, 0x03EA  },	//awbb_IndoorGrZones_m_BGrid[3] //                                                                         
+{ 0x0F12, 0x0336  },	//awbb_IndoorGrZones_m_BGrid[4] //                                                                         
+{ 0x0F12, 0x03DE  },	//awbb_IndoorGrZones_m_BGrid[5] //                                                                         
+{ 0x0F12, 0x0302  },	//awbb_IndoorGrZones_m_BGrid[6] //                                                                         
+{ 0x0F12, 0x03A2  },	//awbb_IndoorGrZones_m_BGrid[7] //                                                                         
+{ 0x0F12, 0x02C8  },	//awbb_IndoorGrZones_m_BGrid[8] //                                                                         
+{ 0x0F12, 0x0368  },	//awbb_IndoorGrZones_m_BGrid[9] //                                                                         
+{ 0x0F12, 0x0292  },	//awbb_IndoorGrZones_m_BGrid[10] //                                                                        
+{ 0x0F12, 0x033A  },	//awbb_IndoorGrZones_m_BGrid[11] //                                                                        
+{ 0x0F12, 0x0276  },	//awbb_IndoorGrZones_m_BGrid[12] //                                                                        
+{ 0x0F12, 0x0306  },	//awbb_IndoorGrZones_m_BGrid[13] //                                                                        
+{ 0x0F12, 0x025A  },	//awbb_IndoorGrZones_m_BGrid[14] //                                                                        
+{ 0x0F12, 0x02C2  },	//awbb_IndoorGrZones_m_BGrid[15] //                                                                        
+{ 0x0F12, 0x0246  },	//awbb_IndoorGrZones_m_BGrid[16] //                                                                        
+{ 0x0F12, 0x02A2  },	//awbb_IndoorGrZones_m_BGrid[17] //                                                                        
+{ 0x0F12, 0x0232  },	//awbb_IndoorGrZones_m_BGrid[18] //                                                                        
+{ 0x0F12, 0x0298  },	//awbb_IndoorGrZones_m_BGrid[19] //                                                                        
+{ 0x0F12, 0x021E  },	//awbb_IndoorGrZones_m_BGrid[20] //                                                                        
+{ 0x0F12, 0x027E  },	//awbb_IndoorGrZones_m_BGrid[21] //                                                                        
+{ 0x0F12, 0x0208  },	//awbb_IndoorGrZones_m_BGrid[22] //                                                                        
+{ 0x0F12, 0x026C  },	//awbb_IndoorGrZones_m_BGrid[23] //                                                                        
+{ 0x0F12, 0x01EE  },	//awbb_IndoorGrZones_m_BGrid[24] //                                                                        
+{ 0x0F12, 0x025C  },	//awbb_IndoorGrZones_m_BGrid[25] //                                                                        
+{ 0x0F12, 0x01F0  },	//awbb_IndoorGrZones_m_BGrid[26] //                                                                        
+{ 0x0F12, 0x0248  },	//awbb_IndoorGrZones_m_BGrid[27] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[28] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[29] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[30] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[31] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[32] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[33] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[34] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[35] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[36] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[37] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[38] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[39] //                                                                        
+                                                           
+{ 0x0F12, 0x0005  },   //awbb_IndoorGrZones_m_Gridstep //  
+
+{ 0x002A, 0x0C9C  },
+{ 0x0F12, 0x000E  },
+{ 0x002A, 0x0CA0  },                                       
+{ 0x0F12, 0x0108  },	//awbb_IndoorGrZones_m_Boffs //
+                                                           
+{ 0x002A, 0x0CE0  },                                       
+{ 0x0F12, 0x03D4  },	//awbb_LowBrGrZones_m_BGrid[0] //                                                                          
+{ 0x0F12, 0x043E  },	//awbb_LowBrGrZones_m_BGrid[1] //                                                                          
+{ 0x0F12, 0x035C  },	//awbb_LowBrGrZones_m_BGrid[2] //                                                                          
+{ 0x0F12, 0x0438  },	//awbb_LowBrGrZones_m_BGrid[3] //                                                                          
+{ 0x0F12, 0x02F0  },	//awbb_LowBrGrZones_m_BGrid[4] //                                                                          
+{ 0x0F12, 0x042D  },	//awbb_LowBrGrZones_m_BGrid[5] //                                                                          
+{ 0x0F12, 0x029A  },	//awbb_LowBrGrZones_m_BGrid[6] //                                                                          
+{ 0x0F12, 0x03EF  },	//awbb_LowBrGrZones_m_BGrid[7] //                                                                          
+{ 0x0F12, 0x025E  },	//awbb_LowBrGrZones_m_BGrid[8] //                                                                          
+{ 0x0F12, 0x0395  },	//awbb_LowBrGrZones_m_BGrid[9] //                                                                          
+{ 0x0F12, 0x022E  },	//awbb_LowBrGrZones_m_BGrid[10] //                                                                         
+{ 0x0F12, 0x0346  },	//awbb_LowBrGrZones_m_BGrid[11] //                                                                         
+{ 0x0F12, 0x0200  },	//awbb_LowBrGrZones_m_BGrid[12] //                                                                         
+{ 0x0F12, 0x02F6  },	//awbb_LowBrGrZones_m_BGrid[13] //                                                                         
+{ 0x0F12, 0x01CE  },	//awbb_LowBrGrZones_m_BGrid[14] //                                                                         
+{ 0x0F12, 0x02C8  },	//awbb_LowBrGrZones_m_BGrid[15] //                                                                         
+{ 0x0F12, 0x01BB  },	//awbb_LowBrGrZones_m_BGrid[16] //                                                                         
+{ 0x0F12, 0x0287  },	//awbb_LowBrGrZones_m_BGrid[17] //                                                                         
+{ 0x0F12, 0x01E2  },	//awbb_LowBrGrZones_m_BGrid[18] //                                                                         
+{ 0x0F12, 0x0239  },	//awbb_LowBrGrZones_m_BGrid[19] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[20] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[21] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[22] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[23] //                                                                         
+                        
+{ 0x0F12, 0x0006  },	//awbb_LowBrGrZones_m_Gridstep //	                                                                        
+{ 0x002A, 0x0D18  },                                     
+{ 0x0F12, 0x00AE  },	//awbb_LowBrGrZones_m_Boff //
+                        
+{ 0x002A, 0x0CA4  },    
+{ 0x0F12, 0x026E  },	//0294//0286//02C2//awbb_OutdoorGrZones_m_BGrid[0] // 		                                                                        
+{ 0x0F12, 0x02A4  },	//02CB//02BD//02E0//awbb_OutdoorGrZones_m_BGrid[1] //                                                                         
+{ 0x0F12, 0x0262  },	//027A//026C//0278//awbb_OutdoorGrZones_m_BGrid[2] //                                                                         
+{ 0x0F12, 0x02A8  },	//02D7//02C9//02BC//awbb_OutdoorGrZones_m_BGrid[3] //                                                                         
+{ 0x0F12, 0x0256  },	//0266//0258//025A//awbb_OutdoorGrZones_m_BGrid[4] //                                                                         
+{ 0x0F12, 0x02AE  },	//02BF//02B1//02A2//awbb_OutdoorGrZones_m_BGrid[5] //                                                                         
+{ 0x0F12, 0x0248  },	//0252//0244//024A//awbb_OutdoorGrZones_m_BGrid[6] //                                                                         
+{ 0x0F12, 0x02A4  },	//02A8//029A//0288//awbb_OutdoorGrZones_m_BGrid[7] //                                                                         
+{ 0x0F12, 0x023E  },	//023E//0230//0240//awbb_OutdoorGrZones_m_BGrid[8] //                                                                         
+{ 0x0F12, 0x029A  },	//028F//0281//0278//awbb_OutdoorGrZones_m_BGrid[9] //                                                                         
+{ 0x0F12, 0x023A  },	//0239//022B//023E//awbb_OutdoorGrZones_m_BGrid[10] //                                                                        
+{ 0x0F12, 0x0290  },	//027A//026C//0254//awbb_OutdoorGrZones_m_BGrid[11] //                                                                        
+{ 0x0F12, 0x023A  },	//024A//023C//0000//awbb_OutdoorGrZones_m_BGrid[12] //                                                                        
+{ 0x0F12, 0x027E  },	//0260//0252//0000//awbb_OutdoorGrZones_m_BGrid[13] //                                                                        
+{ 0x0F12, 0x0244  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[14] //                                                                        
+{ 0x0F12, 0x0266  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[15] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[16] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[17] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[18] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[19] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[20] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[21] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[22] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[23] //                                                                        
+                  
+{ 0x0F12, 0x0004  },	//awbb_OutdoorGrZones_m_Gridstep //               
+{ 0x002A, 0x0CD8  },
+{ 0x0F12, 0x0008  },
+{ 0x002A, 0x0CDC  },                                                          
+{ 0x0F12, 0x0204  },	//awbb_OutdoorGrZones_m_Boff //                   
+{ 0x002A, 0x0D1C  },                                                          
+{ 0x0F12, 0x037C  },	//awbb_CrclLowT_R_c //                            
+{ 0x002A, 0x0D20  },                                                          
+{ 0x0F12, 0x0157  },	//awbb_CrclLowT_B_c //                            
+{ 0x002A, 0x0D24  },                                                          
+{ 0x0F12, 0x3EB8  },	//awbb_CrclLowT_Rad_c //                          
+                        
+{ 0x002A, 0x0D2C  },    
+{ 0x0F12, 0x013D  },	//awbb_IntcR //	                                                                        
+{ 0x0F12, 0x011E  },	//awbb_IntcB //                                                                        
+{ 0x002A, 0x0D46  },    
+{ 0x0F12, 0x04C0  },	//0554//055D//0396//04A2//awbb_MvEq_RBthresh //	                                                                        
+                        
+                        
+                        
+{ 0x002A, 0x0D28  },    //wp outdoor
+{ 0x0F12, 0x0270  },	                                                                        
+{ 0x0F12, 0x0240  },	                                                                        
+                        
+                  
+{ 0x002A, 0x0D5C  },    
+{ 0x0F12, 0x7FFF  },	                                                                        
+{ 0x0F12, 0x0050  },	                                                                        
+                        
+{ 0x002A, 0x2316  },    
+{ 0x0F12, 0x0006  },	                                                                        
+                        
+{ 0x002A, 0x0E44  },    
+{ 0x0F12, 0x0525  },	                                                                        
+{ 0x0F12, 0x0400  },	                                                                        
+{ 0x0F12, 0x078C  },	                                                                        
+                        
+{ 0x002A, 0x0E36  },    
+{ 0x0F12, 0x0028  },	 //R OFFSET                                                                       
+{ 0x0F12, 0xFFD8  },	 //B OFFSET                                                                       
+{ 0x0F12, 0x0000  },	 //G OFFSET                                                                       
+                        
+{ 0x002A, 0x0DD4  },    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[0] //        	                                                                        
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[1] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[2] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[3] //    
+{ 0x0F12, 0xFFF0  },	//awbb_GridCorr_R[4] //    
+{ 0x0F12, 0x0080  },	//awbb_GridCorr_R[5] //    
+                   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[6] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[7] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[8] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[9] //    
+{ 0x0F12, 0xFFF0  },	//awbb_GridCorr_R[10] //   
+{ 0x0F12, 0x0080  },	//awbb_GridCorr_R[11] //   
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[12] //   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[13] //   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[14] //   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[15] //   
+{ 0x0F12, 0xFFF0  },	//awbb_GridCorr_R[16] //   
+{ 0x0F12, 0x0080  },	//awbb_GridCorr_R[17] //   
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[0] ////                                                                        
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[1] //                                                                          
+{ 0x0F12, 0x0032  },	//awbb_GridCorr_B[2] //                                                                          
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[3] //                                                                          
+{ 0x0F12, 0x0020  },	//awbb_GridCorr_B[4] //                                                                          
+{ 0x0F12, 0xFFC0  },	//awbb_GridCorr_B[5] //                                                                          
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[6] //                                                                          
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[7] //                                                                          
+{ 0x0F12, 0x0032  },	//awbb_GridCorr_B[8] //                                                                          
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[9] //                                                                          
+{ 0x0F12, 0x0020  },	//awbb_GridCorr_B[10] //                                                                         
+{ 0x0F12, 0xFFC0  },	//awbb_GridCorr_B[11] //                                                                         
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[12] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[13] //                                                                         
+{ 0x0F12, 0x0032  },	//awbb_GridCorr_B[14] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[15] //                                                                         
+{ 0x0F12, 0x0020  },	//awbb_GridCorr_B[16] //   
+{ 0x0F12, 0xFFC0  },	//awbb_GridCorr_B[17] //                 
+                   
+{ 0x0F12, 0x02D9  },	//awbb_GridConst_1[0] //                                                                     
+{ 0x0F12, 0x0357  },	//awbb_GridConst_1[1] //                                                                     
+{ 0x0F12, 0x03D1  },	//awbb_GridConst_1[2] //                                                                     
+                   
+                   
+{ 0x0F12, 0x0DF6  },	//0E4F//0DE9//0DE9//awbb_GridConst_2[0] //                                                   
+{ 0x0F12, 0x0ED8  },	//0EDD//0EDD//0EDD//awbb_GridConst_2[1] //                                                   
+{ 0x0F12, 0x0F51  },	//0F42//0F42//0F42//awbb_GridConst_2[2] //                                                   
+{ 0x0F12, 0x0F5C  },	//0F4E//0F4E//0F54//awbb_GridConst_2[3] //                                                   
+{ 0x0F12, 0x0F8F  },	//0F99//0F99//0FAE//awbb_GridConst_2[4] //                                                   
+{ 0x0F12, 0x1006  },	//1006//1006//1011//awbb_GridConst_2[5] //                                                   
+                   
+{ 0x0F12, 0x00AC  },	//00BA//awbb_GridCoeff_R_1                                                                   
+{ 0x0F12, 0x00BD  },	//00AF//awbb_GridCoeff_B_1                                                                   
+{ 0x0F12, 0x0049  },	//0049//awbb_GridCoeff_R_2                                                                   
+{ 0x0F12, 0x00F5  },	//00F5//awbb_GridCoeff_B_2                                                                   
+                   
+{ 0x002A, 0x0E4A  },                         
+{ 0x0F12, 0x0002  },	//awbb_GridEnable//                                                                          
+                   
+{ 0x002A, 0x051A  },                         
+{ 0x0F12, 0x010E  },	//lt_uLimitHigh//
+{ 0x0F12, 0x00F5  },	//lt_uLimitLow// 
+                   
+                   
+{ 0x002A, 0x0F76  },                         
+{ 0x0F12, 0x0007  },	//ae_statmode BLC off : 0x0F, on : 0x0D//  illumType On : 07 , Off : 0F
+                   
+{ 0x002A, 0x1034  },                         
+{ 0x0F12, 0x00C0  },	//saRR_IllumType[0] //                                                                       
+{ 0x0F12, 0x00E0  },	//saRR_IllumType[1] //                                                                       
+{ 0x0F12, 0x0104  },	//saRR_IllumType[2] //                                                                       
+{ 0x0F12, 0x0129  },	//saRR_IllumType[3] //                                                                       
+{ 0x0F12, 0x0156  },	//saRR_IllumType[4] //                                                                       
+{ 0x0F12, 0x017F  },	//saRR_IllumType[5] //                                                                       
+{ 0x0F12, 0x018F  },	//saRR_IllumType[6] //                                                                       
+                   
+                   
+{ 0x0F12, 0x0120  },	//saRR_IllumTypeF[0] //                                                                      
+{ 0x0F12, 0x0120  },	//saRR_IllumTypeF[1] //                                                                      
+{ 0x0F12, 0x0120  },	//saRR_IllumTypeF[2] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[3] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[4] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[5] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[6] //                                                                      
+                        
+                        
+                        
+{ 0x002A, 0x3288  },	//saRR_usDualGammaLutRGBIndoor  //               	                                                                        
+{ 0x0F12, 0x0000  }, //	saRR_usDualGammaLutRGBIndoor[0] //[0] //                                                 
+{ 0x0F12, 0x0008  }, //  saRR_usDualGammaLutRGBIndoor[0] //[1] //                                                       
+{ 0x0F12, 0x0013  }, //  saRR_usDualGammaLutRGBIndoor[0] //[2] //                                                       
+{ 0x0F12, 0x002C  }, //  saRR_usDualGammaLutRGBIndoor[0] //[3] //                                                       
+{ 0x0F12, 0x0062  }, //  saRR_usDualGammaLutRGBIndoor[0] //[4] //                                                       
+{ 0x0F12, 0x00CD  }, //  saRR_usDualGammaLutRGBIndoor[0] //[5] //                                                       
+{ 0x0F12, 0x0129  }, //  saRR_usDualGammaLutRGBIndoor[0] //[6] //                                                       
+{ 0x0F12, 0x0151  }, //  saRR_usDualGammaLutRGBIndoor[0] //[7] //                                                       
+{ 0x0F12, 0x0174  }, //  saRR_usDualGammaLutRGBIndoor[0] //[8] //                                                       
+{ 0x0F12, 0x01AA  }, //  saRR_usDualGammaLutRGBIndoor[0] //[9] //                                                       
+{ 0x0F12, 0x01D7  }, //  saRR_usDualGammaLutRGBIndoor[0] //[10] //                                                      
+{ 0x0F12, 0x01FE  }, //  saRR_usDualGammaLutRGBIndoor[0] //[11] //                                                      
+{ 0x0F12, 0x0221  }, //  saRR_usDualGammaLutRGBIndoor[0] //[12] //                                                      
+{ 0x0F12, 0x025D  }, //  saRR_usDualGammaLutRGBIndoor[0] //[13] //                                                      
+{ 0x0F12, 0x0291  }, //  saRR_usDualGammaLutRGBIndoor[0] //[14] //                                                      
+{ 0x0F12, 0x02EB  }, //  saRR_usDualGammaLutRGBIndoor[0] //[15] //                                                      
+{ 0x0F12, 0x033A  }, //  saRR_usDualGammaLutRGBIndoor[0] //[16] //                                                      
+{ 0x0F12, 0x0380  }, //  saRR_usDualGammaLutRGBIndoor[0] //[17] //                                                      
+{ 0x0F12, 0x03C2  }, //  saRR_usDualGammaLutRGBIndoor[0] //[18] //                                                      
+{ 0x0F12, 0x03FF  }, //  saRR_usDualGammaLutRGBIndoor[0] //[19] //                                                      
+{ 0x0F12, 0x0000  }, //  saRR_usDualGammaLutRGBIndoor[1] //[0] //                                                       
+{ 0x0F12, 0x0008  }, //  saRR_usDualGammaLutRGBIndoor[1] //[1] //                                                       
+{ 0x0F12, 0x0013  }, //  saRR_usDualGammaLutRGBIndoor[1] //[2] //                                                       
+{ 0x0F12, 0x002C  }, //  saRR_usDualGammaLutRGBIndoor[1] //[3] //                                                       
+{ 0x0F12, 0x0062  }, //  saRR_usDualGammaLutRGBIndoor[1] //[4] //                                                       
+{ 0x0F12, 0x00CD  }, //  saRR_usDualGammaLutRGBIndoor[1] //[5] //                                                       
+{ 0x0F12, 0x0129  }, //  saRR_usDualGammaLutRGBIndoor[1] //[6] //                                                       
+{ 0x0F12, 0x0151  }, //  saRR_usDualGammaLutRGBIndoor[1] //[7] //                                                       
+{ 0x0F12, 0x0174  }, //  saRR_usDualGammaLutRGBIndoor[1] //[8] //                                                       
+{ 0x0F12, 0x01AA  }, //  saRR_usDualGammaLutRGBIndoor[1] //[9] //                                                       
+{ 0x0F12, 0x01D7  }, //  saRR_usDualGammaLutRGBIndoor[1] //[10] //                                                      
+{ 0x0F12, 0x01FE  }, //  saRR_usDualGammaLutRGBIndoor[1] //[11] //                                                      
+{ 0x0F12, 0x0221  }, //  saRR_usDualGammaLutRGBIndoor[1] //[12] //                                                      
+{ 0x0F12, 0x025D  }, //  saRR_usDualGammaLutRGBIndoor[1] //[13] //                                                      
+{ 0x0F12, 0x0291  }, //  saRR_usDualGammaLutRGBIndoor[1] //[14] //                                                      
+{ 0x0F12, 0x02EB  }, //  saRR_usDualGammaLutRGBIndoor[1] //[15] //                                                      
+{ 0x0F12, 0x033A  }, //  saRR_usDualGammaLutRGBIndoor[1] //[16] //                                                      
+{ 0x0F12, 0x0380  }, //  saRR_usDualGammaLutRGBIndoor[1] //[17] //                                                      
+{ 0x0F12, 0x03C2  }, //  saRR_usDualGammaLutRGBIndoor[1] //[18] //                                                      
+{ 0x0F12, 0x03FF  }, //  saRR_usDualGammaLutRGBIndoor[1] //[19] //                                                      
+{ 0x0F12, 0x0000  }, //  saRR_usDualGammaLutRGBIndoor[2] //[0] //                                                       
+{ 0x0F12, 0x0008  }, //  saRR_usDualGammaLutRGBIndoor[2] //[1] //                                                       
+{ 0x0F12, 0x0013  }, //  saRR_usDualGammaLutRGBIndoor[2] //[2] //                                                       
+{ 0x0F12, 0x002C  }, //  saRR_usDualGammaLutRGBIndoor[2] //[3] //                                                       
+{ 0x0F12, 0x0062  }, //  saRR_usDualGammaLutRGBIndoor[2] //[4] //                                                       
+{ 0x0F12, 0x00CD  }, //  saRR_usDualGammaLutRGBIndoor[2] //[5] //                                                       
+{ 0x0F12, 0x0129  }, //  saRR_usDualGammaLutRGBIndoor[2] //[6] //                                                       
+{ 0x0F12, 0x0151  }, //  saRR_usDualGammaLutRGBIndoor[2] //[7] //                                                       
+{ 0x0F12, 0x0174  }, //  saRR_usDualGammaLutRGBIndoor[2] //[8] //                                                       
+{ 0x0F12, 0x01AA  }, //  saRR_usDualGammaLutRGBIndoor[2] //[9] //                                                       
+{ 0x0F12, 0x01D7  }, //  saRR_usDualGammaLutRGBIndoor[2] //[10] //                                                      
+{ 0x0F12, 0x01FE  }, //  saRR_usDualGammaLutRGBIndoor[2] //[11] //                                                      
+{ 0x0F12, 0x0221  }, //  saRR_usDualGammaLutRGBIndoor[2] //[12] //                                                      
+{ 0x0F12, 0x025D  }, //  saRR_usDualGammaLutRGBIndoor[2] //[13] //                                                      
+{ 0x0F12, 0x0291  }, //  saRR_usDualGammaLutRGBIndoor[2] //[14] //                                                      
+{ 0x0F12, 0x02EB  }, //  saRR_usDualGammaLutRGBIndoor[2] //[15] //                                                      
+{ 0x0F12, 0x033A  }, //  saRR_usDualGammaLutRGBIndoor[2] //[16] //                                                      
+{ 0x0F12, 0x0380  }, //  saRR_usDualGammaLutRGBIndoor[2] //[17] //                                                      
+{ 0x0F12, 0x03C2  }, //  saRR_usDualGammaLutRGBIndoor[2] //[18] //                                                      
+{ 0x0F12, 0x03FF  }, //  saRR_usDualGammaLutRGBIndoor[2] //[19] //                                                      
+                                               
+                                               
+{ 0x0F12, 0x0000  },	//			saRR_usDualGammaLutRGBOutdoor[0] //[0] //
+{ 0x0F12, 0x0008  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[1] //                                                
+{ 0x0F12, 0x0013  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[2] //                                                
+{ 0x0F12, 0x002C  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[3] //                                                
+{ 0x0F12, 0x0062  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[4] //                                                
+{ 0x0F12, 0x00CD  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[5] //                                                
+{ 0x0F12, 0x0129  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[6] //                                                
+{ 0x0F12, 0x0151  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[7] //                                                
+{ 0x0F12, 0x0174  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[8] //                                                
+{ 0x0F12, 0x01AA  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[9] //                                                
+{ 0x0F12, 0x01D7  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[10] //                                               
+{ 0x0F12, 0x01FE  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[11] //                                               
+{ 0x0F12, 0x0221  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[12] //                                               
+{ 0x0F12, 0x025D  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[13] //                                               
+{ 0x0F12, 0x0291  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[14] //                                               
+{ 0x0F12, 0x02EB  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[15] //                                               
+{ 0x0F12, 0x033A  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[16] //                                               
+{ 0x0F12, 0x0380  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[17] //                                               
+{ 0x0F12, 0x03C2  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[18] //                                               
+{ 0x0F12, 0x03FF  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[19] //                                               
+{ 0x0F12, 0x0000  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[0] //                                                
+{ 0x0F12, 0x0008  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[1] //                                                
+{ 0x0F12, 0x0013  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[2] //                                                
+{ 0x0F12, 0x002C  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[3] //                                                
+{ 0x0F12, 0x0062  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[4] //                                                
+{ 0x0F12, 0x00CD  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[5] //                                                
+{ 0x0F12, 0x0129  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[6] //                                                
+{ 0x0F12, 0x0151  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[7] //                                                
+{ 0x0F12, 0x0174  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[8] //                                                
+{ 0x0F12, 0x01AA  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[9] //                                                
+{ 0x0F12, 0x01D7  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[10] //                                               
+{ 0x0F12, 0x01FE  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[11] //                                               
+{ 0x0F12, 0x0221  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[12] //                                               
+{ 0x0F12, 0x025D  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[13] //                                               
+{ 0x0F12, 0x0291  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[14] //                                               
+{ 0x0F12, 0x02EB  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[15] //                                               
+{ 0x0F12, 0x033A  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[16] //                                               
+{ 0x0F12, 0x0380  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[17] //                                               
+{ 0x0F12, 0x03C2  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[18] //                                               
+{ 0x0F12, 0x03FF  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[19] //                                               
+{ 0x0F12, 0x0000  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[0] //                                                
+{ 0x0F12, 0x0008  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[1] //                                                
+{ 0x0F12, 0x0013  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[2] //                                                
+{ 0x0F12, 0x002C  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[3] //                                                
+{ 0x0F12, 0x0062  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[4] //                                                
+{ 0x0F12, 0x00CD  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[5] //                                                
+{ 0x0F12, 0x0129  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[6] //                                                
+{ 0x0F12, 0x0151  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[7] //                                                
+{ 0x0F12, 0x0174  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[8] //                                                
+{ 0x0F12, 0x01AA  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[9] //                                                
+{ 0x0F12, 0x01D7  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[10] //                                               
+{ 0x0F12, 0x01FE  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[11] //                                               
+{ 0x0F12, 0x0221  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[12] //                                               
+{ 0x0F12, 0x025D  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[13] //                                               
+{ 0x0F12, 0x0291  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[14] //                                               
+{ 0x0F12, 0x02EB  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[15] //                                               
+{ 0x0F12, 0x033A  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[16] //                                               
+{ 0x0F12, 0x0380  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[17] //                                               
+{ 0x0F12, 0x03C2  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[18] //                                               
+{ 0x0F12, 0x03FF  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[19] //                                               
+                                               
+                                               
+{ 0x002A, 0x06A6  },                           
+{ 0x0F12, 0x00C0  },	//saRR_AwbCcmCord[0] //                      
+{ 0x0F12, 0x00E0  },	//saRR_AwbCcmCord[1] //                      
+{ 0x0F12, 0x0110  },	//saRR_AwbCcmCord[2] //                      
+{ 0x0F12, 0x0139  },	//saRR_AwbCcmCord[3] //                      
+{ 0x0F12, 0x0166  },	//saRR_AwbCcmCord[4] //                      
+{ 0x0F12, 0x019F  },	//saRR_AwbCcmCord[5] //                      
+                        
+{ 0x002A, 0x33A4  },    
+{ 0x0F12, 0x0181  },	  //TVAR_wbt_pBaseCcmS[0] //                                                           
+{ 0x0F12, 0xFF88  },   //TVAR_wbt_pBaseCcmS[1] //                                                        
+{ 0x0F12, 0xFF90  },   //TVAR_wbt_pBaseCcmS[2] //                                                        
+{ 0x0F12, 0xFE6B  },   //TVAR_wbt_pBaseCcmS[3] //                                                        
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[4] //                                                        
+{ 0x0F12, 0xFF0B  },   //TVAR_wbt_pBaseCcmS[5] //                                                        
+{ 0x0F12, 0xFFDD  },   //TVAR_wbt_pBaseCcmS[6] //                                                        
+{ 0x0F12, 0xFFEE  },   //TVAR_wbt_pBaseCcmS[7] //                                                        
+{ 0x0F12, 0x01CB  },   //TVAR_wbt_pBaseCcmS[8] //                                                        
+{ 0x0F12, 0x0187  },   //TVAR_wbt_pBaseCcmS[9] //                                                        
+{ 0x0F12, 0x00A6  },   //TVAR_wbt_pBaseCcmS[10] //                                                       
+{ 0x0F12, 0xFEBE  },   //TVAR_wbt_pBaseCcmS[11] //                                                       
+{ 0x0F12, 0x021C  },   //TVAR_wbt_pBaseCcmS[12] //                                                       
+{ 0x0F12, 0xFF5F  },   //TVAR_wbt_pBaseCcmS[13] //                                                       
+{ 0x0F12, 0x0175  },   //TVAR_wbt_pBaseCcmS[14] //                                                       
+{ 0x0F12, 0xFEE7  },   //TVAR_wbt_pBaseCcmS[15] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[16] //                                                       
+{ 0x0F12, 0x00F3  },   //TVAR_wbt_pBaseCcmS[17] //                                                       
+                       
+{ 0x0F12, 0x0181  },   //TVAR_wbt_pBaseCcmS[18] //                                                       
+{ 0x0F12, 0xFF88  },   //TVAR_wbt_pBaseCcmS[19] //                                                       
+{ 0x0F12, 0xFF90  },   //TVAR_wbt_pBaseCcmS[20] //                                                       
+{ 0x0F12, 0xFE6B  },   //TVAR_wbt_pBaseCcmS[21] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[22] //                                                       
+{ 0x0F12, 0xFF0B  },   //TVAR_wbt_pBaseCcmS[23] //                                                       
+{ 0x0F12, 0xFFDD  },   //TVAR_wbt_pBaseCcmS[24] //                                                       
+{ 0x0F12, 0xFFEE  },   //TVAR_wbt_pBaseCcmS[25] //                                                       
+{ 0x0F12, 0x01CB  },   //TVAR_wbt_pBaseCcmS[26] //                                                       
+{ 0x0F12, 0x0187  },   //TVAR_wbt_pBaseCcmS[27] //                                                       
+{ 0x0F12, 0x00A6  },   //TVAR_wbt_pBaseCcmS[28] //                                                       
+{ 0x0F12, 0xFEBE  },   //TVAR_wbt_pBaseCcmS[29] //                                                       
+{ 0x0F12, 0x021C  },   //TVAR_wbt_pBaseCcmS[30] //                                                       
+{ 0x0F12, 0xFF5F  },   //TVAR_wbt_pBaseCcmS[31] //                                                       
+{ 0x0F12, 0x0175  },   //TVAR_wbt_pBaseCcmS[32] //                                                       
+{ 0x0F12, 0xFEE7  },   //TVAR_wbt_pBaseCcmS[33] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[34] //                                                       
+{ 0x0F12, 0x00F3  },   //TVAR_wbt_pBaseCcmS[35] //                                                       
+                       
+{ 0x0F12, 0x0181  },   //TVAR_wbt_pBaseCcmS[36] //                                                       
+{ 0x0F12, 0xFF88  },   //TVAR_wbt_pBaseCcmS[37] //                                                       
+{ 0x0F12, 0xFF90  },   //TVAR_wbt_pBaseCcmS[38] //                                                       
+{ 0x0F12, 0xFE6B  },   //TVAR_wbt_pBaseCcmS[39] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[40] //                                                       
+{ 0x0F12, 0xFF0B  },   //TVAR_wbt_pBaseCcmS[41] //                                                       
+{ 0x0F12, 0xFFDD  },   //TVAR_wbt_pBaseCcmS[42] //                                                       
+{ 0x0F12, 0xFFEE  },   //TVAR_wbt_pBaseCcmS[43] //                                                       
+{ 0x0F12, 0x01CB  },   //TVAR_wbt_pBaseCcmS[44] //                                                       
+{ 0x0F12, 0x0187  },   //TVAR_wbt_pBaseCcmS[45] //                                                       
+{ 0x0F12, 0x00A6  },   //TVAR_wbt_pBaseCcmS[46] //                                                       
+{ 0x0F12, 0xFEBE  },   //TVAR_wbt_pBaseCcmS[47] //                                                       
+{ 0x0F12, 0x021C  },   //TVAR_wbt_pBaseCcmS[48] //                                                       
+{ 0x0F12, 0xFF5F  },   //TVAR_wbt_pBaseCcmS[49] //                                                       
+{ 0x0F12, 0x0175  },   //TVAR_wbt_pBaseCcmS[50] //                                                       
+{ 0x0F12, 0xFEE7  },   //TVAR_wbt_pBaseCcmS[51] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[52] //                                                       
+{ 0x0F12, 0x00F3  },   //TVAR_wbt_pBaseCcmS[53] //                                                                        
+                       
+{ 0x0F12, 0x01D4  },  //01E9 01FD 01FA   //TVAR_wbt_pBaseCcmS[54] //                                                       
+{ 0x0F12, 0xFFC3  },  //FFB7 FFAB FF9B   //TVAR_wbt_pBaseCcmS[55] //                                                       
+{ 0x0F12, 0xFFFE  },  //FFF5 FFED FFFF   //TVAR_wbt_pBaseCcmS[56] //                                                       
+{ 0x0F12, 0xFEB5  },  //FEB5 FEB5 FE9F   //TVAR_wbt_pBaseCcmS[57] //                                                       
+{ 0x0F12, 0x0112  },  //0112 0112 010F   //TVAR_wbt_pBaseCcmS[58] //                                                       
+{ 0x0F12, 0xFEDC  },  //FEDC FEDC FEF5   //TVAR_wbt_pBaseCcmS[59] //                                                       
+{ 0x0F12, 0xFFD2  },  //FFD2 FFD2 FFD2   //TVAR_wbt_pBaseCcmS[60] //                                                       
+{ 0x0F12, 0x0015  },  //0015 0015 0015   //TVAR_wbt_pBaseCcmS[61] //                                                       
+{ 0x0F12, 0x01A1  },  //01A1 01A1 01A1   //TVAR_wbt_pBaseCcmS[62] //                                                       
+{ 0x0F12, 0x0111  },  //0111 0111 0111   //TVAR_wbt_pBaseCcmS[63] //                                                       
+{ 0x0F12, 0x009D  },  //009D 009D 009D   //TVAR_wbt_pBaseCcmS[64] //                                                       
+{ 0x0F12, 0xFECB  },  //FECB FECB FECB   //TVAR_wbt_pBaseCcmS[65] //                                                       
+{ 0x0F12, 0x01FC  },  //01FC 01FC 01FC   //TVAR_wbt_pBaseCcmS[66] //                                                       
+{ 0x0F12, 0xFF99  },  //FF99 FF99 FF99   //TVAR_wbt_pBaseCcmS[67] //                                                       
+{ 0x0F12, 0x01A9  },  //01A9 01A9 01A9   //TVAR_wbt_pBaseCcmS[68] //                                                       
+{ 0x0F12, 0xFF26  },  //FF26 FF26 FF26   //TVAR_wbt_pBaseCcmS[69] //                                                       
+{ 0x0F12, 0x012B  },  //012B 012B 012B   //TVAR_wbt_pBaseCcmS[70] //                                                       
+{ 0x0F12, 0x00DF  },  //00DF 00DF 00DF   //TVAR_wbt_pBaseCcmS[71] //    
+                           
+{ 0x0F12, 0x01B9  },  //01CE 01E3 01E2   //TVAR_wbt_pBaseCcmS[72] //                                                 
+{ 0x0F12, 0xFFBC  },  //FFB0 FFA4 FF9A   //TVAR_wbt_pBaseCcmS[73] //                                                 
+{ 0x0F12, 0xFFED  },  //FFE4 FFDB FFE7   //TVAR_wbt_pBaseCcmS[74] //                                                 
+{ 0x0F12, 0xFEB5  },  //FEB5 FEB5 FE9F   //TVAR_wbt_pBaseCcmS[75] //                                                 
+{ 0x0F12, 0x0112  },  //0112 0112 010F   //TVAR_wbt_pBaseCcmS[76] //                                                 
+{ 0x0F12, 0xFEDC  },  //FEDC FEDC FEF5   //TVAR_wbt_pBaseCcmS[77] //                                                 
+{ 0x0F12, 0xFFD2  },  //FFD2 FFD2 FFD2   //TVAR_wbt_pBaseCcmS[78] //                                                 
+{ 0x0F12, 0xFFFE  },  //FFFE FFFE FFFE   //TVAR_wbt_pBaseCcmS[79] //                                                 
+{ 0x0F12, 0x01B7  },  //01B7 01B7 01B7   //TVAR_wbt_pBaseCcmS[80] //                                                 
+{ 0x0F12, 0x00E8  },  //00E8 00E8 00E8   //TVAR_wbt_pBaseCcmS[81] //                                                 
+{ 0x0F12, 0x0095  },  //0095 0095 0095   //TVAR_wbt_pBaseCcmS[82] //                                                 
+{ 0x0F12, 0xFF0D  },  //FF0D FF0D FF0D   //TVAR_wbt_pBaseCcmS[83] //                                                 
+{ 0x0F12, 0x0182  },  //0182 0182 0182   //TVAR_wbt_pBaseCcmS[84] //                                                 
+{ 0x0F12, 0xFF29  },  //FF29 FF29 FF29   //TVAR_wbt_pBaseCcmS[85] //                                                 
+{ 0x0F12, 0x0146  },  //0146 0146 0146   //TVAR_wbt_pBaseCcmS[86] //                                                 
+{ 0x0F12, 0xFF26  },  //FF26 FF26 FF26   //TVAR_wbt_pBaseCcmS[87] //                                                 
+{ 0x0F12, 0x012B  },  //012B 012B 012B   //TVAR_wbt_pBaseCcmS[88] //                                                 
+{ 0x0F12, 0x00DF  },  //00DF 00DF 00DF   //TVAR_wbt_pBaseCcmS[89] //                                                                         
+                  
+{ 0x0F12, 0x01B9  },  //01CE 01E3 01E2   //TVAR_wbt_pBaseCcmS[90] //                                                 
+{ 0x0F12, 0xFFBC  },  //FFB0 FFA4 FF9A   //TVAR_wbt_pBaseCcmS[91] //                                                 
+{ 0x0F12, 0xFFED  },  //FFE4 FFDB FFE7   //TVAR_wbt_pBaseCcmS[92] //                                                 
+{ 0x0F12, 0xFEB5  },  //FEB5 FEB5 FE9F   //TVAR_wbt_pBaseCcmS[93] //                                                 
+{ 0x0F12, 0x0112  },  //0112 0112 010F   //TVAR_wbt_pBaseCcmS[94] //                                                 
+{ 0x0F12, 0xFEDC  },  //FEDC FEDC FEF5   //TVAR_wbt_pBaseCcmS[95] //                                                 
+{ 0x0F12, 0xFFD2  },  //FFD2 FFD2 FFD2   //TVAR_wbt_pBaseCcmS[96] //                                                 
+{ 0x0F12, 0xFFFE  },  //FFFE FFFE FFFE   //TVAR_wbt_pBaseCcmS[97] //                                                 
+{ 0x0F12, 0x01B7  },  //01B7 01B7 01B7   //TVAR_wbt_pBaseCcmS[98] //                                                 
+{ 0x0F12, 0x00E8  },  //00E8 00E8 00E8   //TVAR_wbt_pBaseCcmS[99] //                                                 
+{ 0x0F12, 0x0095  },  //0095 0095 0095   //TVAR_wbt_pBaseCcmS[100] //                                                
+{ 0x0F12, 0xFF0D  },  //FF0D FF0D FF0D   //TVAR_wbt_pBaseCcmS[101] //                                                
+{ 0x0F12, 0x0182  },  //0182 0182 0182   //TVAR_wbt_pBaseCcmS[102] //                                                
+{ 0x0F12, 0xFF29  },  //FF29 FF29 FF29   //TVAR_wbt_pBaseCcmS[103] //                                                
+{ 0x0F12, 0x0146  },  //0146 0146 0146   //TVAR_wbt_pBaseCcmS[104] //                                                
+{ 0x0F12, 0xFF26  },  //FF26 FF26 FF26   //TVAR_wbt_pBaseCcmS[105] //                                                
+{ 0x0F12, 0x012B  },  //012B 012B 012B   //TVAR_wbt_pBaseCcmS[106] //                                                
+{ 0x0F12, 0x00DF  },  //00DF 00DF 00DF   //TVAR_wbt_pBaseCcmS[107] //                                                
+                                          
+{ 0x002A, 0x3380  },  //12çŸ«å¼¥åˆ©     
+{ 0x0F12, 0x01E5  },  //01E5 020E 0223   //0223  //01F3  //01F3  //TVAR_wbt_pOutdoorCcm[0] //  
+{ 0x0F12, 0xFFA0  },  //FFA0 FF88 FF7C   //FF7C  //FFA4  //FFA4  //TVAR_wbt_pOutdoorCcm[1] //  
+{ 0x0F12, 0xFFDF  },  //FFDF FFCE FFC5   //FFC5  //FFE4  //FFE4  //TVAR_wbt_pOutdoorCcm[2] //  
+{ 0x0F12, 0xFE3D  },  //FE3D FE3D FE3D   //FE3D  //FE3D  //FE23  //TVAR_wbt_pOutdoorCcm[3] //  
+{ 0x0F12, 0x0158  },  //0158 0158 0158   //0158  //0158  //017D  //TVAR_wbt_pOutdoorCcm[4] //  
+{ 0x0F12, 0xFF03  },  //FF03 FF03 FF03   //FF03  //FF03  //FEF9  //TVAR_wbt_pOutdoorCcm[5] //  
+{ 0x0F12, 0xFFD2  },  //FFBB FF99 FF9F   //FF9F  //FF9F  //FF9F  //TVAR_wbt_pOutdoorCcm[6] //  
+{ 0x0F12, 0x0002  },  //FFF0 0018 0011   //0011  //0011  //0011  //TVAR_wbt_pOutdoorCcm[7] //  
+{ 0x0F12, 0x0211  },  //023A 0235 0237   //0237  //0237  //0237  //TVAR_wbt_pOutdoorCcm[8] //  
+{ 0x0F12, 0x00F6  },  //00EB 0101 00EB   //00D1  //012A  //0143  //TVAR_wbt_pOutdoorCcm[9] //  
+{ 0x0F12, 0x0120  },  //012A 0116 012A   //0125  //00CA  //00F6  //TVAR_wbt_pOutdoorCcm[10] // 
+{ 0x0F12, 0xFF01  },  //FF02 FF00 FF02   //FEF5  //FEF6  //FEB1  //TVAR_wbt_pOutdoorCcm[11] // 
+{ 0x0F12, 0x01A4  },  //01A4 01C5 01C5   //01C5  //01C5  //01C5  //TVAR_wbt_pOutdoorCcm[12] // 
+{ 0x0F12, 0xFF95  },  //FF95 FF80 FF80   //FF80  //FF80  //FF80  //TVAR_wbt_pOutdoorCcm[13] // 
+{ 0x0F12, 0x01A9  },  //01A9 019D 019D   //019D  //019D  //019D  //TVAR_wbt_pOutdoorCcm[14] // 
+{ 0x0F12, 0xFEA3  },  //FE7A FE7A FE7A   //FE7A  //FE7A  //FE7A  //TVAR_wbt_pOutdoorCcm[15] // 
+{ 0x0F12, 0x0164  },  //0179 0179 0179   //0179  //0179  //0179  //TVAR_wbt_pOutdoorCcm[16] // 
+{ 0x0F12, 0x0164  },  //0179 0179 0179   //0179  //0179  //0179  //TVAR_wbt_pOutdoorCcm[17] // 
+                      
+                           
+                           
+{ 0x002A, 0x0764  },       
+{ 0x0F12, 0x0049  },	//afit_uNoiseIndInDoor[0] //                                                                         
+{ 0x0F12, 0x005F  },	//afit_uNoiseIndInDoor[1] //                                                                         
+{ 0x0F12, 0x00CB  },	//afit_uNoiseIndInDoor[2] // 203//                                                                   
+{ 0x0F12, 0x01E0  },	//afit_uNoiseIndInDoor[3] // Indoor_NB below 1500 _Noise index 300-400d //                           
+{ 0x0F12, 0x0220  },	//afit_uNoiseIndInDoor[4] // DNP NB 4600 _ Noisenidex :560d-230h //                                  
+                           
+                           
+{ 0x002A, 0x07C4  },       
+{ 0x0F12, 0x0014  },	//700007C4 //TVAR_afit_pBaseValS[0] // AFIT16_BRIGHTNESS                                                                                  
+{ 0x0F12, 0x0000  },	//700007C6 //TVAR_afit_pBaseValS[1] // AFIT16_CONTRAST                                                                                    
+{ 0x0F12, 0x0014  },	//700007C8 //TVAR_afit_pBaseValS[2] // AFIT16_SATURATION                                                                                  
+{ 0x0F12, 0x0000  },	//700007CA //TVAR_afit_pBaseValS[3] // AFIT16_SHARP_BLUR                                                                                  
+{ 0x0F12, 0x0000  },	//700007CC //TVAR_afit_pBaseValS[4] // AFIT16_GLAMOUR                                                                                     
+{ 0x0F12, 0x00C1  },	//700007CE //TVAR_afit_pBaseValS[5] // AFIT16_sddd8a_edge_high                                                                            
+{ 0x0F12, 0x03FF  },	//700007D0 //TVAR_afit_pBaseValS[6] // AFIT16_Demosaicing_iSatVal                                                                         
+{ 0x0F12, 0x009C  },	//700007D2 //TVAR_afit_pBaseValS[7] // AFIT16_Sharpening_iReduceEdgeThresh                                                                
+{ 0x0F12, 0x0251  },	//700007D4 //TVAR_afit_pBaseValS[8] // AFIT16_demsharpmix1_iRGBOffset                                                                     
+{ 0x0F12, 0x03FF  },	//700007D6 //TVAR_afit_pBaseValS[9] // AFIT16_demsharpmix1_iDemClamp                                                                      
+{ 0x0F12, 0x000C  },	//700007D8 //TVAR_afit_pBaseValS[10] //AFIT16_demsharpmix1_iLowThreshold                                                                  
+{ 0x0F12, 0x0010  },	//700007DA //TVAR_afit_pBaseValS[11] //AFIT16_demsharpmix1_iHighThreshold                                                                 
+{ 0x0F12, 0x012C  },	//700007DC //TVAR_afit_pBaseValS[12] //AFIT16_demsharpmix1_iLowBright                                                                     
+{ 0x0F12, 0x03E8  },	//700007DE //TVAR_afit_pBaseValS[13] //AFIT16_demsharpmix1_iHighBright                                                                    
+{ 0x0F12, 0x0046  },	//700007E0 //TVAR_afit_pBaseValS[14] //AFIT16_demsharpmix1_iLowSat                                                                        
+{ 0x0F12, 0x005A  },	//700007E2 //TVAR_afit_pBaseValS[15] //AFIT16_demsharpmix1_iHighSat                                                                       
+{ 0x0F12, 0x0070  },	//700007E4 //TVAR_afit_pBaseValS[16] //AFIT16_demsharpmix1_iTune                                                                          
+{ 0x0F12, 0x0000  },	//700007E6 //TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0000  },	//700007E8 //TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh                                                                    
+{ 0x0F12, 0x01AA  },	//700007EA //TVAR_afit_pBaseValS[19] //AFIT16_demsharpmix1_iHystCenter                                                                    
+{ 0x0F12, 0x003C  },	//700007EC //TVAR_afit_pBaseValS[20] //AFIT16_YUV422_DENOISE_iUVLowThresh                                                                 
+{ 0x0F12, 0x003C  },	//700007EE //TVAR_afit_pBaseValS[21] //AFIT16_YUV422_DENOISE_iUVHighThresh                                                                
+{ 0x0F12, 0x0000  },	//700007F0 //TVAR_afit_pBaseValS[22] //AFIT16_YUV422_DENOISE_iYLowThresh                                                                  
+{ 0x0F12, 0x0000  },	//700007F2 //TVAR_afit_pBaseValS[23] //AFIT16_YUV422_DENOISE_iYHighThresh                                                                 
+{ 0x0F12, 0x003E  },	//700007F4 //TVAR_afit_pBaseValS[24] //AFIT16_Sharpening_iLowSharpClamp                                                                   
+{ 0x0F12, 0x0008  },	//700007F6 //TVAR_afit_pBaseValS[25] //AFIT16_Sharpening_iHighSharpClamp                                                                  
+{ 0x0F12, 0x003C  },	//700007F8 //TVAR_afit_pBaseValS[26] //AFIT16_Sharpening_iLowSharpClamp_Bin                                                               
+{ 0x0F12, 0x001E  },	//700007FA //TVAR_afit_pBaseValS[27] //AFIT16_Sharpening_iHighSharpClamp_Bin                                                              
+{ 0x0F12, 0x003C  },	//700007FC //TVAR_afit_pBaseValS[28] //AFIT16_Sharpening_iLowSharpClamp_sBin                                                              
+{ 0x0F12, 0x001E  },	//700007FE //TVAR_afit_pBaseValS[29] //AFIT16_Sharpening_iHighSharpClamp_sBin                                                             
+{ 0x0F12, 0x0A24  },	//70000800 //TVAR_afit_pBaseValS[30] //AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                     
+{ 0x0F12, 0x1701  },	//70000802 //TVAR_afit_pBaseValS[31] //AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                      
+{ 0x0F12, 0x0229  },	//70000804 //TVAR_afit_pBaseValS[32] //AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                            
+{ 0x0F12, 0x1403  },	//70000806 //TVAR_afit_pBaseValS[33] //AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                 
+{ 0x0F12, 0x0000  },	//70000808 //TVAR_afit_pBaseValS[34] //AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                               
+{ 0x0F12, 0x0000  },	//7000080A //TVAR_afit_pBaseValS[35] //AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                             
+{ 0x0F12, 0x0000  },	//7000080C //TVAR_afit_pBaseValS[36] //AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                              
+{ 0x0F12, 0x00FF  },	//7000080E //TVAR_afit_pBaseValS[37] //AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                       
+{ 0x0F12, 0x045A  },	//70000810 //TVAR_afit_pBaseValS[38] //AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                                
+{ 0x0F12, 0x1414  },	//70000812 //TVAR_afit_pBaseValS[39] //AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                  
+{ 0x0F12, 0x0301  },	//70000814 //TVAR_afit_pBaseValS[40] //AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                          
+{ 0x0F12, 0xFF07  },	//70000816 //TVAR_afit_pBaseValS[41] //AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                          
+{ 0x0F12, 0x081E  },	//70000818 //TVAR_afit_pBaseValS[42] //AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                     
+{ 0x0F12, 0x0A14  },	//7000081A //TVAR_afit_pBaseValS[43] //AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                        
+{ 0x0F12, 0x0F0F  },	//7000081C //TVAR_afit_pBaseValS[44] //AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                    
+{ 0x0F12, 0x0A00  },	//7000081E //TVAR_afit_pBaseValS[45] //AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                 
+{ 0x0F12, 0x0032  },	//70000820 //TVAR_afit_pBaseValS[46] //AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                             
+{ 0x0F12, 0x000E  },	//70000822 //TVAR_afit_pBaseValS[47] //AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                             
+{ 0x0F12, 0x0002  },	//70000824 //TVAR_afit_pBaseValS[48] //AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                      
+{ 0x0F12, 0x00FF  },	//70000826 //TVAR_afit_pBaseValS[49] //AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                     
+{ 0x0F12, 0x1102  },	//70000828 //TVAR_afit_pBaseValS[50] //AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                          
+{ 0x0F12, 0x001B  },	//7000082A //TVAR_afit_pBaseValS[51] //AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                            
+{ 0x0F12, 0x0900  },	//7000082C //TVAR_afit_pBaseValS[52] //AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                       
+{ 0x0F12, 0x0600  },	//7000082E //TVAR_afit_pBaseValS[53] //AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                      
+{ 0x0F12, 0x0504  },	//70000830 //TVAR_afit_pBaseValS[54] //AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                   
+{ 0x0F12, 0x0306  },	//70000832 //TVAR_afit_pBaseValS[55] //AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                      
+{ 0x0F12, 0x4603  },	//70000834 //TVAR_afit_pBaseValS[56] //AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                       
+{ 0x0F12, 0x0480  },	//70000836 //TVAR_afit_pBaseValS[57] //AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                              
+{ 0x0F12, 0x003C  },	//70000838 //TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                  
+{ 0x0F12, 0x0080  },	//7000083A //TVAR_afit_pBaseValS[59] //AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                   
+{ 0x0F12, 0x0101  },	//7000083C //TVAR_afit_pBaseValS[60] //AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                             
+{ 0x0F12, 0x0707  },	//7000083E //TVAR_afit_pBaseValS[61] //AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                                
+{ 0x0F12, 0x4601  },	//70000840 //TVAR_afit_pBaseValS[62] //AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                 
+{ 0x0F12, 0x4944  },	//70000842 //TVAR_afit_pBaseValS[63] //AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                                
+{ 0x0F12, 0x5044  },	//70000844 //TVAR_afit_pBaseValS[64] //AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                            
+{ 0x0F12, 0x0500  },	//70000846 //TVAR_afit_pBaseValS[65] //AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]             
+{ 0x0F12, 0x0003  },	//70000848 //TVAR_afit_pBaseValS[66] //AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                   
+{ 0x0F12, 0x5400  },	//7000084A //TVAR_afit_pBaseValS[67] //AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                 
+{ 0x0F12, 0x0714  },	//7000084C //TVAR_afit_pBaseValS[68] //AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]           
+{ 0x0F12, 0x32FF  },	//7000084E //TVAR_afit_pBaseValS[69] //AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                        
+{ 0x0F12, 0x5A04  },	//70000850 //TVAR_afit_pBaseValS[70] //AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                     
+{ 0x0F12, 0x201E  },	//70000852 //TVAR_afit_pBaseValS[71] //AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                     
+{ 0x0F12, 0x4012  },	//70000854 //TVAR_afit_pBaseValS[72] //AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]                
+{ 0x0F12, 0x0204  },	//70000856 //TVAR_afit_pBaseValS[73] //AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]                
+{ 0x0F12, 0x1403  },	//70000858 //TVAR_afit_pBaseValS[74] //AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                  
+{ 0x0F12, 0x0114  },	//7000085A //TVAR_afit_pBaseValS[75] //AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                      
+{ 0x0F12, 0x0101  },	//7000085C //TVAR_afit_pBaseValS[76] //AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                       
+{ 0x0F12, 0x4446  },	//7000085E //TVAR_afit_pBaseValS[77] //AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                           
+{ 0x0F12, 0x646E  },	//70000860 //TVAR_afit_pBaseValS[78] //AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                     
+{ 0x0F12, 0x0028  },	//70000862 //TVAR_afit_pBaseValS[79] //AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]             
+{ 0x0F12, 0x030A  },	//70000864 //TVAR_afit_pBaseValS[80] //AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]       
+{ 0x0F12, 0x0000  },	//70000866 //TVAR_afit_pBaseValS[81] //AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]          
+{ 0x0F12, 0x141E  },	//70000868 //TVAR_afit_pBaseValS[82] //AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]          
+{ 0x0F12, 0xFF07  },	//7000086A //TVAR_afit_pBaseValS[83] //AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]       
+{ 0x0F12, 0x0432  },	//7000086C //TVAR_afit_pBaseValS[84] //AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]              
+{ 0x0F12, 0x0000  },	//7000086E //TVAR_afit_pBaseValS[85] //AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]            
+{ 0x0F12, 0x0F0F  },	//70000870 //TVAR_afit_pBaseValS[86] //AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]              
+{ 0x0F12, 0x0440  },	//70000872 //TVAR_afit_pBaseValS[87] //AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]       
+{ 0x0F12, 0x0302  },	//70000874 //TVAR_afit_pBaseValS[88] //AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]       
+{ 0x0F12, 0x1414  },	//70000876 //TVAR_afit_pBaseValS[89] //AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                   
+{ 0x0F12, 0x0101  },	//70000878 //TVAR_afit_pBaseValS[90] //AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                      
+{ 0x0F12, 0x4601  },	//7000087A //TVAR_afit_pBaseValS[91] //AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                       
+{ 0x0F12, 0x6E44  },	//7000087C //TVAR_afit_pBaseValS[92] //AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                      
+{ 0x0F12, 0x2864  },	//7000087E //TVAR_afit_pBaseValS[93] //AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                  
+{ 0x0F12, 0x0A00  },	//70000880 //TVAR_afit_pBaseValS[94] //AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]    
+{ 0x0F12, 0x0003  },	//70000882 //TVAR_afit_pBaseValS[95] //AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]        
+{ 0x0F12, 0x1E00  },	//70000884 //TVAR_afit_pBaseValS[96] //AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]       
+{ 0x0F12, 0x0714  },	//70000886 //TVAR_afit_pBaseValS[97] //AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8]  
+{ 0x0F12, 0x32FF  },	//70000888 //TVAR_afit_pBaseValS[98] //AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]              
+{ 0x0F12, 0x0004  },	//7000088A //TVAR_afit_pBaseValS[99] //AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]           
+{ 0x0F12, 0x0F00  },	//7000088C //TVAR_afit_pBaseValS[100] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x400F  },	//7000088E //TVAR_afit_pBaseValS[101] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000890 //TVAR_afit_pBaseValS[102] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000892 //TVAR_afit_pBaseValS[103] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000894 //TVAR_afit_pBaseValS[104] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000896 //TVAR_afit_pBaseValS[105] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0014  },	//70000898 //TVAR_afit_pBaseValS[106] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//7000089A //TVAR_afit_pBaseValS[107] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//7000089C //TVAR_afit_pBaseValS[108] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//7000089E //TVAR_afit_pBaseValS[109] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//700008A0 //TVAR_afit_pBaseValS[110] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//700008A2 //TVAR_afit_pBaseValS[111] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//700008A4 //TVAR_afit_pBaseValS[112] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//700008A6 //TVAR_afit_pBaseValS[113] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//700008A8 //TVAR_afit_pBaseValS[114] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//700008AA //TVAR_afit_pBaseValS[115] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x012C  },	//700008AC //TVAR_afit_pBaseValS[116] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x03E8  },	//700008AE //TVAR_afit_pBaseValS[117] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0046  },	//700008B0 //TVAR_afit_pBaseValS[118] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x005A  },	//700008B2 //TVAR_afit_pBaseValS[119] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//700008B4 //TVAR_afit_pBaseValS[120] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//700008B6 //TVAR_afit_pBaseValS[121] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//700008B8 //TVAR_afit_pBaseValS[122] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x01AE  },	//700008BA //TVAR_afit_pBaseValS[123] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x001E  },	//700008BC //TVAR_afit_pBaseValS[124] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x001E  },	//700008BE //TVAR_afit_pBaseValS[125] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//700008C0 //TVAR_afit_pBaseValS[126] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//700008C2 //TVAR_afit_pBaseValS[127] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x003E  },	//700008C4 //TVAR_afit_pBaseValS[128] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0008  },	//700008C6 //TVAR_afit_pBaseValS[129] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x003C  },	//700008C8 //TVAR_afit_pBaseValS[130] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x001E  },	//700008CA //TVAR_afit_pBaseValS[131] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x003C  },	//700008CC //TVAR_afit_pBaseValS[132] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x001E  },	//700008CE //TVAR_afit_pBaseValS[133] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//700008D0 //TVAR_afit_pBaseValS[134] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//700008D2 //TVAR_afit_pBaseValS[135] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//700008D4 //TVAR_afit_pBaseValS[136] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x1403  },	//700008D6 //TVAR_afit_pBaseValS[137] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x0000  },	//700008D8 //TVAR_afit_pBaseValS[138] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0000  },	//700008DA //TVAR_afit_pBaseValS[139] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0000  },	//700008DC //TVAR_afit_pBaseValS[140] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//700008DE //TVAR_afit_pBaseValS[141] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x045A  },	//700008E0 //TVAR_afit_pBaseValS[142] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//700008E2 //TVAR_afit_pBaseValS[143] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//700008E4 //TVAR_afit_pBaseValS[144] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//700008E6 //TVAR_afit_pBaseValS[145] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x081E  },	//700008E8 //TVAR_afit_pBaseValS[146] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A14  },	//700008EA //TVAR_afit_pBaseValS[147] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0F0F  },	//700008EC //TVAR_afit_pBaseValS[148] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A00  },	//700008EE //TVAR_afit_pBaseValS[149] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x0032  },	//700008F0 //TVAR_afit_pBaseValS[150] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x000E  },	//700008F2 //TVAR_afit_pBaseValS[151] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0002  },	//700008F4 //TVAR_afit_pBaseValS[152] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//700008F6 //TVAR_afit_pBaseValS[153] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1102  },	//700008F8 //TVAR_afit_pBaseValS[154] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001B  },	//700008FA //TVAR_afit_pBaseValS[155] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//700008FC //TVAR_afit_pBaseValS[156] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//700008FE //TVAR_afit_pBaseValS[157] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//70000900 //TVAR_afit_pBaseValS[158] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0306  },	//70000902 //TVAR_afit_pBaseValS[159] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x4603  },	//70000904 //TVAR_afit_pBaseValS[160] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0480  },	//70000906 //TVAR_afit_pBaseValS[161] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0046  },	//70000908 //TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//7000090A //TVAR_afit_pBaseValS[163] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x0101  },	//7000090C //TVAR_afit_pBaseValS[164] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0707  },	//7000090E //TVAR_afit_pBaseValS[165] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x1E01  },	//70000910 //TVAR_afit_pBaseValS[166] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x491E  },	//70000912 //TVAR_afit_pBaseValS[167] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /
+{ 0x0F12, 0x5044  },	//70000914 //TVAR_afit_pBaseValS[168] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0500  },	//70000916 //TVAR_afit_pBaseValS[169] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x0004  },	//70000918 //TVAR_afit_pBaseValS[170] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /
+{ 0x0F12, 0x3C0A  },	//7000091A //TVAR_afit_pBaseValS[171] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x0714  },	//7000091C //TVAR_afit_pBaseValS[172] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /
+{ 0x0F12, 0x3214  },	//7000091E //TVAR_afit_pBaseValS[173] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x5A03  },	//70000920 //TVAR_afit_pBaseValS[174] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x121E  },	//70000922 //TVAR_afit_pBaseValS[175] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//70000924 //TVAR_afit_pBaseValS[176] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//70000926 //TVAR_afit_pBaseValS[177] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x1E06  },	//70000928 //TVAR_afit_pBaseValS[178] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x011E  },	//7000092A //TVAR_afit_pBaseValS[179] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//7000092C //TVAR_afit_pBaseValS[180] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x3A3C  },	//7000092E //TVAR_afit_pBaseValS[181] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x585A  },	//70000930 //TVAR_afit_pBaseValS[182] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000932 //TVAR_afit_pBaseValS[183] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000934 //TVAR_afit_pBaseValS[184] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0000  },	//70000936 //TVAR_afit_pBaseValS[185] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x141E  },	//70000938 //TVAR_afit_pBaseValS[186] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF07  },	//7000093A //TVAR_afit_pBaseValS[187] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//7000093C //TVAR_afit_pBaseValS[188] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x0000  },	//7000093E //TVAR_afit_pBaseValS[189] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x0F0F  },	//70000940 //TVAR_afit_pBaseValS[190] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000942 //TVAR_afit_pBaseValS[191] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000944 //TVAR_afit_pBaseValS[192] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x1E1E  },	//70000946 //TVAR_afit_pBaseValS[193] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000948 //TVAR_afit_pBaseValS[194] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x3C01  },	//7000094A //TVAR_afit_pBaseValS[195] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x5A3A  },	//7000094C //TVAR_afit_pBaseValS[196] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x2858  },	//7000094E //TVAR_afit_pBaseValS[197] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000950 //TVAR_afit_pBaseValS[198] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x0003  },	//70000952 //TVAR_afit_pBaseValS[199] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1E00  },	//70000954 //TVAR_afit_pBaseValS[200] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x0714  },	//70000956 //TVAR_afit_pBaseValS[201] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000958 //TVAR_afit_pBaseValS[202] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x0004  },	//7000095A //TVAR_afit_pBaseValS[203] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x0F00  },	//7000095C //TVAR_afit_pBaseValS[204] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x400F  },	//7000095E //TVAR_afit_pBaseValS[205] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000960 //TVAR_afit_pBaseValS[206] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000962 //TVAR_afit_pBaseValS[207] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000964 //TVAR_afit_pBaseValS[208] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000966 //TVAR_afit_pBaseValS[209] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0000  },	//70000968 //TVAR_afit_pBaseValS[210] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//7000096A //TVAR_afit_pBaseValS[211] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//7000096C //TVAR_afit_pBaseValS[212] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//7000096E //TVAR_afit_pBaseValS[213] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//70000970 //TVAR_afit_pBaseValS[214] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//70000972 //TVAR_afit_pBaseValS[215] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//70000974 //TVAR_afit_pBaseValS[216] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//70000976 //TVAR_afit_pBaseValS[217] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//70000978 //TVAR_afit_pBaseValS[218] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//7000097A //TVAR_afit_pBaseValS[219] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x012C  },	//7000097C //TVAR_afit_pBaseValS[220] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x03E8  },	//7000097E //TVAR_afit_pBaseValS[221] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0046  },	//70000980 //TVAR_afit_pBaseValS[222] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x005A  },	//70000982 //TVAR_afit_pBaseValS[223] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//70000984 //TVAR_afit_pBaseValS[224] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//70000986 //TVAR_afit_pBaseValS[225] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//70000988 //TVAR_afit_pBaseValS[226] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x0226  },	//7000098A //TVAR_afit_pBaseValS[227] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x001E  },	//7000098C //TVAR_afit_pBaseValS[228] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x001E  },	//7000098E //TVAR_afit_pBaseValS[229] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//70000990 //TVAR_afit_pBaseValS[230] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//70000992 //TVAR_afit_pBaseValS[231] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x004E  },	//70000994 //TVAR_afit_pBaseValS[232] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0000  },	//70000996 //TVAR_afit_pBaseValS[233] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x003C  },	//70000998 //TVAR_afit_pBaseValS[234] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x001E  },	//7000099A //TVAR_afit_pBaseValS[235] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x003C  },	//7000099C //TVAR_afit_pBaseValS[236] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x001E  },	//7000099E //TVAR_afit_pBaseValS[237] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//700009A0 //TVAR_afit_pBaseValS[238] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//700009A2 //TVAR_afit_pBaseValS[239] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//700009A4 //TVAR_afit_pBaseValS[240] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x1403  },	//700009A6 //TVAR_afit_pBaseValS[241] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x0000  },	//700009A8 //TVAR_afit_pBaseValS[242] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0000  },	//700009AA //TVAR_afit_pBaseValS[243] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0906  },	//700009AC //TVAR_afit_pBaseValS[244] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//700009AE //TVAR_afit_pBaseValS[245] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x045A  },	//700009B0 //TVAR_afit_pBaseValS[246] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//700009B2 //TVAR_afit_pBaseValS[247] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//700009B4 //TVAR_afit_pBaseValS[248] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//700009B6 //TVAR_afit_pBaseValS[249] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x081E  },	//700009B8 //TVAR_afit_pBaseValS[250] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A14  },	//700009BA //TVAR_afit_pBaseValS[251] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0F0F  },	//700009BC //TVAR_afit_pBaseValS[252] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A00  },	//700009BE //TVAR_afit_pBaseValS[253] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x0090  },	//700009C0 //TVAR_afit_pBaseValS[254] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x000A  },	//700009C2 //TVAR_afit_pBaseValS[255] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0002  },	//700009C4 //TVAR_afit_pBaseValS[256] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//700009C6 //TVAR_afit_pBaseValS[257] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1102  },	//700009C8 //TVAR_afit_pBaseValS[258] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001B  },	//700009CA //TVAR_afit_pBaseValS[259] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//700009CC //TVAR_afit_pBaseValS[260] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//700009CE //TVAR_afit_pBaseValS[261] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//700009D0 //TVAR_afit_pBaseValS[262] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0306  },	//700009D2 //TVAR_afit_pBaseValS[263] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x4602  },	//700009D4 //TVAR_afit_pBaseValS[264] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0880  },	//700009D6 //TVAR_afit_pBaseValS[265] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0080  },	//700009D8 //TVAR_afit_pBaseValS[266] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//700009DA //TVAR_afit_pBaseValS[267] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x0101  },	//700009DC //TVAR_afit_pBaseValS[268] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0707  },	//700009DE //TVAR_afit_pBaseValS[269] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x1E01  },	//700009E0 //TVAR_afit_pBaseValS[270] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x3C1E  },	//700009E2 //TVAR_afit_pBaseValS[271] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /
+{ 0x0F12, 0x5028  },	//700009E4 //TVAR_afit_pBaseValS[272] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0500  },	//700009E6 //TVAR_afit_pBaseValS[273] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x1A04  },	//700009E8 //TVAR_afit_pBaseValS[274] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /
+{ 0x0F12, 0x280A  },	//700009EA //TVAR_afit_pBaseValS[275] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x080C  },	//700009EC //TVAR_afit_pBaseValS[276] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /
+{ 0x0F12, 0x1414  },	//700009EE //TVAR_afit_pBaseValS[277] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x6A03  },	//700009F0 //TVAR_afit_pBaseValS[278] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x121E  },	//700009F2 //TVAR_afit_pBaseValS[279] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//700009F4 //TVAR_afit_pBaseValS[280] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//700009F6 //TVAR_afit_pBaseValS[281] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x2806  },	//700009F8 //TVAR_afit_pBaseValS[282] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x0128  },	//700009FA //TVAR_afit_pBaseValS[283] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//700009FC //TVAR_afit_pBaseValS[284] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x2224  },	//700009FE //TVAR_afit_pBaseValS[285] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x3236  },	//70000A00 //TVAR_afit_pBaseValS[286] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000A02 //TVAR_afit_pBaseValS[287] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000A04 //TVAR_afit_pBaseValS[288] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0410  },	//70000A06 //TVAR_afit_pBaseValS[289] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x141E  },	//70000A08 //TVAR_afit_pBaseValS[290] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF07  },	//70000A0A //TVAR_afit_pBaseValS[291] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//70000A0C //TVAR_afit_pBaseValS[292] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x4050  },	//70000A0E //TVAR_afit_pBaseValS[293] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x0F0F  },	//70000A10 //TVAR_afit_pBaseValS[294] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000A12 //TVAR_afit_pBaseValS[295] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000A14 //TVAR_afit_pBaseValS[296] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x2828  },	//70000A16 //TVAR_afit_pBaseValS[297] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000A18 //TVAR_afit_pBaseValS[298] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x2401  },	//70000A1A //TVAR_afit_pBaseValS[299] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x3622  },	//70000A1C //TVAR_afit_pBaseValS[300] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x2832  },	//70000A1E //TVAR_afit_pBaseValS[301] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000A20 //TVAR_afit_pBaseValS[302] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x1003  },	//70000A22 //TVAR_afit_pBaseValS[303] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1E04  },	//70000A24 //TVAR_afit_pBaseValS[304] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x0714  },	//70000A26 //TVAR_afit_pBaseValS[305] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000A28 //TVAR_afit_pBaseValS[306] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x5004  },	//70000A2A //TVAR_afit_pBaseValS[307] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x0F40  },	//70000A2C //TVAR_afit_pBaseValS[308] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x400F  },	//70000A2E //TVAR_afit_pBaseValS[309] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000A30 //TVAR_afit_pBaseValS[310] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000A32 //TVAR_afit_pBaseValS[311] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000A34 //TVAR_afit_pBaseValS[312] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000A36 //TVAR_afit_pBaseValS[313] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0000  },	//70000A38 //TVAR_afit_pBaseValS[314] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//70000A3A //TVAR_afit_pBaseValS[315] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//70000A3C //TVAR_afit_pBaseValS[316] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//70000A3E //TVAR_afit_pBaseValS[317] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//70000A40 //TVAR_afit_pBaseValS[318] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//70000A42 //TVAR_afit_pBaseValS[319] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//70000A44 //TVAR_afit_pBaseValS[320] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//70000A46 //TVAR_afit_pBaseValS[321] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//70000A48 //TVAR_afit_pBaseValS[322] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//70000A4A //TVAR_afit_pBaseValS[323] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x00C8  },	//70000A4C //TVAR_afit_pBaseValS[324] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x03E8  },	//70000A4E //TVAR_afit_pBaseValS[325] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0046  },	//70000A50 //TVAR_afit_pBaseValS[326] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x0050  },	//70000A52 //TVAR_afit_pBaseValS[327] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//70000A54 //TVAR_afit_pBaseValS[328] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//70000A56 //TVAR_afit_pBaseValS[329] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//70000A58 //TVAR_afit_pBaseValS[330] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x0226  },	//70000A5A //TVAR_afit_pBaseValS[331] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x0014  },	//70000A5C //TVAR_afit_pBaseValS[332] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x0014  },	//70000A5E //TVAR_afit_pBaseValS[333] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//70000A60 //TVAR_afit_pBaseValS[334] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//70000A62 //TVAR_afit_pBaseValS[335] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x004E  },	//70000A64 //TVAR_afit_pBaseValS[336] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0000  },	//70000A66 //TVAR_afit_pBaseValS[337] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x002D  },	//70000A68 //TVAR_afit_pBaseValS[338] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x0019  },	//70000A6A //TVAR_afit_pBaseValS[339] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x002D  },	//70000A6C //TVAR_afit_pBaseValS[340] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x0019  },	//70000A6E //TVAR_afit_pBaseValS[341] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//70000A70 //TVAR_afit_pBaseValS[342] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//70000A72 //TVAR_afit_pBaseValS[343] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//70000A74 //TVAR_afit_pBaseValS[344] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x1403  },	//70000A76 //TVAR_afit_pBaseValS[345] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x0000  },	//70000A78 //TVAR_afit_pBaseValS[346] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0000  },	//70000A7A //TVAR_afit_pBaseValS[347] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0906  },	//70000A7C //TVAR_afit_pBaseValS[348] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//70000A7E //TVAR_afit_pBaseValS[349] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x045A  },	//70000A80 //TVAR_afit_pBaseValS[350] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//70000A82 //TVAR_afit_pBaseValS[351] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//70000A84 //TVAR_afit_pBaseValS[352] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//70000A86 //TVAR_afit_pBaseValS[353] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x081E  },	//70000A88 //TVAR_afit_pBaseValS[354] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A14  },	//70000A8A //TVAR_afit_pBaseValS[355] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0F0F  },	//70000A8C //TVAR_afit_pBaseValS[356] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A00  },	//70000A8E //TVAR_afit_pBaseValS[357] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x0090  },	//70000A90 //TVAR_afit_pBaseValS[358] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x000A  },	//70000A92 //TVAR_afit_pBaseValS[359] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0001  },	//70000A94 //TVAR_afit_pBaseValS[360] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//70000A96 //TVAR_afit_pBaseValS[361] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1002  },	//70000A98 //TVAR_afit_pBaseValS[362] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001E  },	//70000A9A //TVAR_afit_pBaseValS[363] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//70000A9C //TVAR_afit_pBaseValS[364] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//70000A9E //TVAR_afit_pBaseValS[365] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//70000AA0 //TVAR_afit_pBaseValS[366] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0307  },	//70000AA2 //TVAR_afit_pBaseValS[367] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x5002  },	//70000AA4 //TVAR_afit_pBaseValS[368] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0080  },	//70000AA6 //TVAR_afit_pBaseValS[369] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0080  },	//70000AA8 //TVAR_afit_pBaseValS[370] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//70000AAA //TVAR_afit_pBaseValS[371] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x0101  },	//70000AAC //TVAR_afit_pBaseValS[372] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0707  },	//70000AAE //TVAR_afit_pBaseValS[373] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x1E01  },	//70000AB0 //TVAR_afit_pBaseValS[374] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x2A1E  },	//70000AB2 //TVAR_afit_pBaseValS[375] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /
+{ 0x0F12, 0x5020  },	//70000AB4 //TVAR_afit_pBaseValS[376] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0500  },	//70000AB6 //TVAR_afit_pBaseValS[377] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x1A04  },	//70000AB8 //TVAR_afit_pBaseValS[378] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /
+{ 0x0F12, 0x280A  },	//70000ABA //TVAR_afit_pBaseValS[379] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x080C  },	//70000ABC //TVAR_afit_pBaseValS[380] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /
+{ 0x0F12, 0x1414  },	//70000ABE //TVAR_afit_pBaseValS[381] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x6A03  },	//70000AC0 //TVAR_afit_pBaseValS[382] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x121E  },	//70000AC2 //TVAR_afit_pBaseValS[383] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//70000AC4 //TVAR_afit_pBaseValS[384] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//70000AC6 //TVAR_afit_pBaseValS[385] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x3C06  },	//70000AC8 //TVAR_afit_pBaseValS[386] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x013C  },	//70000ACA //TVAR_afit_pBaseValS[387] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//70000ACC //TVAR_afit_pBaseValS[388] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x1C1E  },	//70000ACE //TVAR_afit_pBaseValS[389] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x1E22  },	//70000AD0 //TVAR_afit_pBaseValS[390] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000AD2 //TVAR_afit_pBaseValS[391] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000AD4 //TVAR_afit_pBaseValS[392] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0214  },	//70000AD6 //TVAR_afit_pBaseValS[393] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x0E14  },	//70000AD8 //TVAR_afit_pBaseValS[394] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF06  },	//70000ADA //TVAR_afit_pBaseValS[395] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//70000ADC //TVAR_afit_pBaseValS[396] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x4052  },	//70000ADE //TVAR_afit_pBaseValS[397] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x150C  },	//70000AE0 //TVAR_afit_pBaseValS[398] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000AE2 //TVAR_afit_pBaseValS[399] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000AE4 //TVAR_afit_pBaseValS[400] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x3C3C  },	//70000AE6 //TVAR_afit_pBaseValS[401] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000AE8 //TVAR_afit_pBaseValS[402] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x1E01  },	//70000AEA //TVAR_afit_pBaseValS[403] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x221C  },	//70000AEC //TVAR_afit_pBaseValS[404] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x281E  },	//70000AEE //TVAR_afit_pBaseValS[405] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000AF0 //TVAR_afit_pBaseValS[406] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x1403  },	//70000AF2 //TVAR_afit_pBaseValS[407] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1402  },	//70000AF4 //TVAR_afit_pBaseValS[408] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x060E  },	//70000AF6 //TVAR_afit_pBaseValS[409] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000AF8 //TVAR_afit_pBaseValS[410] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x5204  },	//70000AFA //TVAR_afit_pBaseValS[411] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x0C40  },	//70000AFC //TVAR_afit_pBaseValS[412] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x4015  },	//70000AFE //TVAR_afit_pBaseValS[413] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000B00 //TVAR_afit_pBaseValS[414] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000B02 //TVAR_afit_pBaseValS[415] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000B04 //TVAR_afit_pBaseValS[416] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000B06 //TVAR_afit_pBaseValS[417] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0000  },	//70000B08 //TVAR_afit_pBaseValS[418] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//70000B0A //TVAR_afit_pBaseValS[419] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//70000B0C //TVAR_afit_pBaseValS[420] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//70000B0E //TVAR_afit_pBaseValS[421] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//70000B10 //TVAR_afit_pBaseValS[422] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//70000B12 //TVAR_afit_pBaseValS[423] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//70000B14 //TVAR_afit_pBaseValS[424] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//70000B16 //TVAR_afit_pBaseValS[425] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//70000B18 //TVAR_afit_pBaseValS[426] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//70000B1A //TVAR_afit_pBaseValS[427] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x0032  },	//70000B1C //TVAR_afit_pBaseValS[428] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x028A  },	//70000B1E //TVAR_afit_pBaseValS[429] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0032  },	//70000B20 //TVAR_afit_pBaseValS[430] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x01F4  },	//70000B22 //TVAR_afit_pBaseValS[431] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//70000B24 //TVAR_afit_pBaseValS[432] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//70000B26 //TVAR_afit_pBaseValS[433] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//70000B28 //TVAR_afit_pBaseValS[434] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x01AA  },	//70000B2A //TVAR_afit_pBaseValS[435] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x003C  },	//70000B2C //TVAR_afit_pBaseValS[436] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x0050  },	//70000B2E //TVAR_afit_pBaseValS[437] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//70000B30 //TVAR_afit_pBaseValS[438] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//70000B32 //TVAR_afit_pBaseValS[439] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x0044  },	//70000B34 //TVAR_afit_pBaseValS[440] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0014  },	//70000B36 //TVAR_afit_pBaseValS[441] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x0046  },	//70000B38 //TVAR_afit_pBaseValS[442] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x0019  },	//70000B3A //TVAR_afit_pBaseValS[443] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x0046  },	//70000B3C //TVAR_afit_pBaseValS[444] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x0019  },	//70000B3E //TVAR_afit_pBaseValS[445] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//70000B40 //TVAR_afit_pBaseValS[446] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//70000B42 //TVAR_afit_pBaseValS[447] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//70000B44 //TVAR_afit_pBaseValS[448] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x0503  },	//70000B46 //TVAR_afit_pBaseValS[449] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x080F  },	//70000B48 //TVAR_afit_pBaseValS[450] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0808  },	//70000B4A //TVAR_afit_pBaseValS[451] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0000  },	//70000B4C //TVAR_afit_pBaseValS[452] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//70000B4E //TVAR_afit_pBaseValS[453] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x012D  },	//70000B50 //TVAR_afit_pBaseValS[454] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//70000B52 //TVAR_afit_pBaseValS[455] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//70000B54 //TVAR_afit_pBaseValS[456] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//70000B56 //TVAR_afit_pBaseValS[457] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x061E  },	//70000B58 //TVAR_afit_pBaseValS[458] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A1E  },	//70000B5A //TVAR_afit_pBaseValS[459] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0606  },	//70000B5C //TVAR_afit_pBaseValS[460] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A03  },	//70000B5E //TVAR_afit_pBaseValS[461] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x378B  },	//70000B60 //TVAR_afit_pBaseValS[462] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x1028  },	//70000B62 //TVAR_afit_pBaseValS[463] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0001  },	//70000B64 //TVAR_afit_pBaseValS[464] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//70000B66 //TVAR_afit_pBaseValS[465] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1002  },	//70000B68 //TVAR_afit_pBaseValS[466] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001E  },	//70000B6A //TVAR_afit_pBaseValS[467] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//70000B6C //TVAR_afit_pBaseValS[468] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//70000B6E //TVAR_afit_pBaseValS[469] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//70000B70 //TVAR_afit_pBaseValS[470] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0307  },	//70000B72 //TVAR_afit_pBaseValS[471] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x5001  },	//70000B74 //TVAR_afit_pBaseValS[472] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0080  },	//70000B76 //TVAR_afit_pBaseValS[473] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0080  },	//70000B78 //TVAR_afit_pBaseValS[474] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//70000B7A //TVAR_afit_pBaseValS[475] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x5050  },	//70000B7C //TVAR_afit_pBaseValS[476] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0101  },	//70000B7E //TVAR_afit_pBaseValS[477] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x3201  },	//70000B80 //TVAR_afit_pBaseValS[478] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x1832  },	//70000B82 //TVAR_afit_pBaseValS[479] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /        iden 12
+{ 0x0F12, 0x210C  },	//70000B84 //TVAR_afit_pBaseValS[480] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0A00  },	//70000B86 //TVAR_afit_pBaseValS[481] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x1E04  },	//70000B88 //TVAR_afit_pBaseValS[482] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /    1E demhsharplow
+{ 0x0F12, 0x0A08  },	//70000B8A //TVAR_afit_pBaseValS[483] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x070C  },	//70000B8C //TVAR_afit_pBaseValS[484] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /    c8 clamp
+{ 0x0F12, 0x3264  },	//70000B8E //TVAR_afit_pBaseValS[485] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x5A02  },	//70000B90 //TVAR_afit_pBaseValS[486] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x1040  },	//70000B92 //TVAR_afit_pBaseValS[487] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//70000B94 //TVAR_afit_pBaseValS[488] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//70000B96 //TVAR_afit_pBaseValS[489] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x4606  },	//70000B98 //TVAR_afit_pBaseValS[490] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x0146  },	//70000B9A //TVAR_afit_pBaseValS[491] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//70000B9C //TVAR_afit_pBaseValS[492] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x1C18  },	//70000B9E //TVAR_afit_pBaseValS[493] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x1819  },	//70000BA0 //TVAR_afit_pBaseValS[494] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000BA2 //TVAR_afit_pBaseValS[495] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000BA4 //TVAR_afit_pBaseValS[496] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0514  },	//70000BA6 //TVAR_afit_pBaseValS[497] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x0C14  },	//70000BA8 //TVAR_afit_pBaseValS[498] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF05  },	//70000BAA //TVAR_afit_pBaseValS[499] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//70000BAC //TVAR_afit_pBaseValS[500] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x4052  },	//70000BAE //TVAR_afit_pBaseValS[501] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x1514  },	//70000BB0 //TVAR_afit_pBaseValS[502] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000BB2 //TVAR_afit_pBaseValS[503] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000BB4 //TVAR_afit_pBaseValS[504] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x4646  },	//70000BB6 //TVAR_afit_pBaseValS[505] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000BB8 //TVAR_afit_pBaseValS[506] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x1801  },	//70000BBA //TVAR_afit_pBaseValS[507] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x191C  },	//70000BBC //TVAR_afit_pBaseValS[508] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x2818  },	//70000BBE //TVAR_afit_pBaseValS[509] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000BC0 //TVAR_afit_pBaseValS[510] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x1403  },	//70000BC2 //TVAR_afit_pBaseValS[511] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1405  },	//70000BC4 //TVAR_afit_pBaseValS[512] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x050C  },	//70000BC6 //TVAR_afit_pBaseValS[513] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000BC8 //TVAR_afit_pBaseValS[514] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x5204  },	//70000BCA //TVAR_afit_pBaseValS[515] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x1440  },	//70000BCC //TVAR_afit_pBaseValS[516] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x4015  },	//70000BCE //TVAR_afit_pBaseValS[517] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000BD0 //TVAR_afit_pBaseValS[518] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000BD2 //TVAR_afit_pBaseValS[519] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+                           
+{ 0x0F12, 0x7DFA  },	//afit_pConstBaseValS[0] //                                                                          
+{ 0x0F12, 0xFFBD  },	//afit_pConstBaseValS[1] //                                                                          
+{ 0x0F12, 0x26FE  },	//afit_pConstBaseValS[2] //                                                                          
+{ 0x0F12, 0xF7BC  },	//afit_pConstBaseValS[3] //                                                                          
+{ 0x0F12, 0x7E06  },	//afit_pConstBaseValS[4] //                                                                          
+{ 0x0F12, 0x00D3  },	//afit_pConstBaseValS[5] //                                                                          
+                        
+                        
+{ 0x002A, 0x2CE8  },    
+{ 0x0F12, 0x0007  },	// Modify LSB to control AWBB_YThreshLow //    	                                                                        
+{ 0x0F12, 0x00E2  },	//                                         
+{ 0x0F12, 0x0005  },	// Modify LSB to control AWBB_YThreshLowBrLow//                                                                        
+{ 0x0F12, 0x00E2  },	//                                         
+                                                                       
+                                                                                     
+{ 0x002A, 0x0F7E  },    //ae weight    //                                
+{ 0x0F12, 0x0000  },  //0000  //0000
+{ 0x0F12, 0x0000  },  //0000  //0000
+{ 0x0F12, 0x0000  },  //0000  //0000
+{ 0x0F12, 0x0000  },  //0000  //0000                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0201  },  //0201  //0201
+{ 0x0F12, 0x0102  },  //0102  //0102
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0201  },  //0101  //0101
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0102  },  //0101  //0101                     
+{ 0x0F12, 0x0201  },  //0101  //0201
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0102  },  //0101  //0102                     
+{ 0x0F12, 0x0101  },  //0101  //0201
+{ 0x0F12, 0x0101  },  //0101  //0202
+{ 0x0F12, 0x0101  },  //0101  //0202
+{ 0x0F12, 0x0101  },  //0101  //0102
+                        
+                               
+{ 0x002A, 0x01CC  },    
+{ 0x0F12, 0x5DC0  },	//REG_TC_IPRM_InClockLSBs//input clock=24MHz                        	                                                                        
+{ 0x0F12, 0x0000  },    //REG_TC_IPRM_InClockMSBs                                           
+{ 0x002A, 0x01EE  },                                                                        
+{ 0x0F12, 0x0003  },	//REG_TC_IPRM_UseNPviClocks                                     
+                  
+{ 0x002A, 0x01F6  },                                                                        
+{ 0x0F12, 0x1F40  },    //REG_TC_IPRM_OpClk4KHz_0                   	2   700001F6         
+{ 0x0F12, 0x32A8  },	//3A88    //REG_TC_IPRM_MinOutRate4KHz_0              	2   700001F8                                                                        
+{ 0x0F12, 0x32E8  },	//3AA8    //REG_TC_IPRM_MaxOutRate4KHz_0                        
+                        
+{ 0x0F12, 0x1F40  },	 //REG_TC_IPRM_OpClk4KHz_1                   	2   700001FC    
+{ 0x0F12, 0x2ea0  },    //REG_TC_IPRM_MinOutRate4KHz_1              	2   700001FE 
+{ 0x0F12, 0x2f00  },    //REG_TC_IPRM_MaxOutRate4KHz_1              	2   70000200 
+                  
+{ 0x0F12, 0x0BB8  },    //REG_TC_IPRM_OpClk4KHz_2                   	2   70000202 
+{ 0x0F12, 0x05DC  },    //REG_TC_IPRM_MinOutRate4KHz_2              	2   70000204 
+{ 0x0F12, 0x1770  },    //REG_TC_IPRM_MaxOutRate4KHz_2              	2   70000206 
+                  
+{ 0x002A, 0x0208  },                                                                
+{ 0x0F12, 0x0001  },      //REG_TC_IPRM_InitParamsUpdated                           
+                        
+{ 0xdddd, 0x0064  },  //delay 100ms  
+                  
+{ 0x0028, 0x7000  },	    
+{ 0x002A, 0x026C  },   //Normal preview 15fps
+{ 0x0F12, 0x0280  },	//REG_0TC_PCFG_usWidth                      	2   7000026C			// cys  640                          
+{ 0x0F12, 0x01e0  },   //REG_0TC_PCFG_usHeight                     	2   7000026E    //  480                                       
+{ 0x0F12, 0x0006  },   //REG_0TC_PCFG_Format                       	2   70000270    //   rgb565                                      
+{ 0x0F12, 0x32E8  },	//3AA8//REG_0TC_PCFG_usMaxOut4KHzRate             	2   70000272  //                              
+{ 0x0F12, 0x32a8  },	//3A88//REG_0TC_PCFG_usMinOut4KHzRate             	2   70000274  //                              
+{ 0x0F12, 0x0100  },   //REG_0TC_PCFG_OutClkPerPix88               	2   70000276    //                                         
+{ 0x0F12, 0x0800  },   //REG_0TC_PCFG_uMaxBpp88                    	2   70000278    //                                         
+{ 0x0F12, 0x0042  },   //REG_0TC_PCFG_PVIMask                      	2   7000027A    //92  (1) PCLK inversion  (4)1b_C first (5) UV First                                       
+{ 0x0F12, 0x0010  },   //REG_0TC_PCFG_OIFMask                      	2   7000027C    //                                         
+{ 0x0F12, 0x01E0  },   //REG_0TC_PCFG_usJpegPacketSize             	2   7000027E    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_usJpegTotalPackets           	2   70000280    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_uClockInd                    	2   70000282    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_usFrTimeType                 	2   70000284    //                                         
+{ 0x0F12, 0x0001  },   //REG_0TC_PCFG_FrRateQualityType            	2   70000286    //cys 0x0001          
+{ 0x0F12, 0x0535  },   //REG_0TC_PCFG_usMaxFrTimeMsecMult10        	2   70000288    // cys 0x535 
+{ 0x0F12, 0x0535  },   //REG_0TC_PCFG_usMinFrTimeMsecMult10        	2   7000028A    //cys                              
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_bSmearOutput                 	2   7000028C    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_sSaturation                  	2   7000028E    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_sSharpBlur                   	2   70000290    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_sColorTemp                   	2   70000292    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_uDeviceGammaIndex            	2   70000294    //                                         
+{ 0x0F12, 0x0003  },   //REG_0TC_PCFG_uPrevMirror                  	2   70000296    //                                         
+{ 0x0F12, 0x0003  },   //REG_0TC_PCFG_uCaptureMirror               	2   70000298    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_uRotation                    	2   7000029A    //                                         
+                       
+                       //comcoder frame fix 15                                        
+{ 0x0F12, 0x0400  },   //REG_1TC_PCFG_usWidth                      	2   7000029C    //                                         
+{ 0x0F12, 0x0300  },   //REG_1TC_PCFG_usHeight                     	2   7000029E    //                                         
+{ 0x0F12, 0x0005  },   //REG_1TC_PCFG_Format                       	2   700002A0    //                                         
+{ 0x0F12, 0x32E8  },   //REG_1TC_PCFG_usMaxOut4KHzRate             	2   700002A2    //                                         
+{ 0x0F12, 0x32a8  },   //REG_1TC_PCFG_usMinOut4KHzRate             	2   700002A4    //                                         
+{ 0x0F12, 0x0100  },   //REG_1TC_PCFG_OutClkPerPix88               	2   700002A6    //                                         
+{ 0x0F12, 0x0800  },   //REG_1TC_PCFG_uMaxBpp88                    	2   700002A8    //                                         
+{ 0x0F12, 0x0072  },   //REG_1TC_PCFG_PVIMask                      	2   700002AA    //                                         
+{ 0x0F12, 0x0010  },   //REG_1TC_PCFG_OIFMask                      	2   700002AC    //                                         
+{ 0x0F12, 0x01E0  },   //REG_1TC_PCFG_usJpegPacketSize             	2   700002AE    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_usJpegTotalPackets           	2   700002B0    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_uClockInd                    	2   700002B2    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_usFrTimeType                 	2   700002B4    //                                         
+{ 0x0F12, 0x0001  },   //REG_1TC_PCFG_FrRateQualityType            	2   700002B6    //                                         
+{ 0x0F12, 0x0535  },   //REG_1TC_PCFG_usMaxFrTimeMsecMult10        	2   700002B8    //cys 0x29a         
+{ 0x0F12, 0x0535  },   //REG_1TC_PCFG_usMinFrTimeMsecMult10        	2   700002BA    //cys  0x29a                                        
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_bSmearOutput                 	2   700002BC    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_sSaturation                  	2   700002BE    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_sSharpBlur                   	2   700002C0    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_sColorTemp                   	2   700002C2    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_uDeviceGammaIndex            	2   700002C4    //                                         
+{ 0x0F12, 0x0003  },   //REG_1TC_PCFG_uPrevMirror                  	2   700002C6    //                                         
+{ 0x0F12, 0x0003  },   //REG_1TC_PCFG_uCaptureMirror               	2   700002C8    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_uRotation                    	2   700002CA    //                                         
+                                       
+                            
+{ 0x002A, 0x035C  },   //Normal capture //    
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_uCaptureMode                 	2   7000035C						// 
+{ 0x0F12, 0x0280  },   //REG_0TC_CCFG_usWidth                      	2   7000035E          //cys 640                                   
+{ 0x0F12, 0x01e0  },   //REG_0TC_CCFG_usHeight                     	2   70000360          //    480                               
+{ 0x0F12, 0x0005  },   //REG_0TC_CCFG_Format                       	2   70000362          //     rgb565                              
+{ 0x0F12, 0x32E8  },	//2f00//3AA8//REG_0TC_CCFG_usMaxOut4KHzRate             	2   70000364  //                      
+{ 0x0F12, 0x32a8  },	//2ea0//3A88//REG_0TC_CCFG_usMinOut4KHzRate             	2   70000366  //                      
+{ 0x0F12, 0x0100  },   //REG_0TC_CCFG_OutClkPerPix88               	2   70000368          //                                   
+{ 0x0F12, 0x0800  },   //REG_0TC_CCFG_uMaxBpp88                    	2   7000036A          //                                   
+{ 0x0F12, 0x0042  },   //REG_0TC_CCFG_PVIMask                      	2   7000036C          //                                   
+{ 0x0F12, 0x0010  },   //REG_0TC_CCFG_OIFMask                      	2   7000036E          //                                   
+{ 0x0F12, 0x01E0  },   //REG_0TC_CCFG_usJpegPacketSize             	2   70000370          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_usJpegTotalPackets           	2   70000372          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_uClockInd                    	2   70000374          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_usFrTimeType                 	2   70000376          //                                   
+{ 0x0F12, 0x0002  },   //REG_0TC_CCFG_FrRateQualityType            	2   70000378          //                                   
+{ 0x0F12, 0x0535  },   //REG_0TC_CCFG_usMaxFrTimeMsecMult10        	2   7000037A          //                                   
+{ 0x0F12, 0x0535  },   //REG_0TC_CCFG_usMinFrTimeMsecMult10        	2   7000037C          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_bSmearOutput                 	2   7000037E          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_sSaturation                  	2   70000380          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_sSharpBlur                   	2   70000382          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_sColorTemp                   	2   70000384          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_uDeviceGammaIndex            	2   70000386          //                                   
+                            
+                       // Low_lux capture//    
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_uCaptureMode                 	2   70000388						// 
+{ 0x0F12, 0x0280  },   //REG_1TC_CCFG_usWidth                      	2   7000038A          //  cys 640                                 
+{ 0x0F12, 0x01e0  },   //REG_1TC_CCFG_usHeight                     	2   7000038C          //  cys 480                                 
+{ 0x0F12, 0x0005  },   //REG_1TC_CCFG_Format                       	2   7000038E          //                                   
+{ 0x0F12, 0x32E8  },   //REG_1TC_CCFG_usMaxOut4KHzRate             	2   70000390          //                                   
+{ 0x0F12, 0x32a8  },   //REG_1TC_CCFG_usMinOut4KHzRate             	2   70000392          //                                   
+{ 0x0F12, 0x0100  },   //REG_1TC_CCFG_OutClkPerPix88               	2   70000394          //                                   
+{ 0x0F12, 0x0800  },   //REG_1TC_CCFG_uMaxBpp88                    	2   70000396          //                                   
+{ 0x0F12, 0x0072  },   //REG_1TC_CCFG_PVIMask                      	2   70000398          //                                   
+{ 0x0F12, 0x0010  },   //REG_1TC_CCFG_OIFMask                      	2   7000039A          //                                   
+{ 0x0F12, 0x01E0  },   //REG_1TC_CCFG_usJpegPacketSize             	2   7000039C          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_usJpegTotalPackets           	2   7000039E          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_uClockInd                    	2   700003A0          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_usFrTimeType                 	2   700003A2          //                                   
+{ 0x0F12, 0x0002  },   //REG_1TC_CCFG_FrRateQualityType            	2   700003A4          //                                   
+{ 0x0F12, 0x0535  },   //REG_1TC_CCFG_usMaxFrTimeMsecMult10        	2   700003A6          //                                   
+{ 0x0F12, 0x0535  },   //REG_1TC_CCFG_usMinFrTimeMsecMult10        	2   700003A8          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_bSmearOutput                 	2   700003AA          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_sSaturation                  	2   700003AC          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_sSharpBlur                   	2   700003AE          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_sColorTemp                   	2   700003B0          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_uDeviceGammaIndex            	2   700003B2          //                                   
+                                  
+{ 0x002A, 0x0208  },        
+{ 0x0F12, 0x0001  },      //REG_TC_IPRM_InitParamsUpdated//                                                                       
+                            
+{ 0x002A, 0x023C  },   
+{ 0x0F12, 0x0000  },	//32MHz Sys Clock//	
+{ 0x002A, 0x0244  },	                   
+{ 0x0F12, 0x0000  },       
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x0F12, 0x0001  }, 
+                     
+{ 0x1000, 0x0001  },	// Set host interrupt so main start run//                                                  
+{ 0xdddd, 0x0064  },   //delay 100ms
+                  
+{ 0x002A, 0x0DA0  },    
+{ 0x0F12, 0x0005  },    
+                        
+{ 0x002A, 0x0D88  },    
+{ 0x0F12, 0x0038  },    
+{ 0x0F12, 0x0074  },    
+{ 0x0F12, 0xFFF1  },    
+{ 0x0F12, 0x00BF  },    
+{ 0x0F12, 0xFF9B  },    
+{ 0x0F12, 0x00DB  },    
+{ 0x0F12, 0xFF56  },    
+{ 0x0F12, 0x00F0  },    
+{ 0x0F12, 0xFEFF  },    
+{ 0x0F12, 0x010F  },    
+{ 0x0F12, 0x0E74  },    
+{ 0x002A, 0x0DA8  },    
+{ 0x0F12, 0x0BB8  },    //NB 3000
+{ 0x002A, 0x0DA4  },    
+{ 0x0F12, 0x274E  },
+                  
+{ 0x002A, 0x0DCA  },
+{ 0x0F12, 0x0030  },
+
+{ 0x002A, 0x3286  },
+{ 0x0F12, 0x0001  }, //Pre/Post gamma on(ç›”æ±—)  
+
+{ 0x002A, 0x032C  },
+{ 0x0F12, 0xAAAA  },  //ESD Check  
+                  
+{ 0xffff, 0xffff },
+};
+
+  
+s5k5ca_short_t s5k5ca_capture_normal_normal_00[] =              
+{ 
+{ 0xFCFC, 0xD000  },                 
+{ 0x0028, 0x7000  },  
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0246  },
+{ 0x0F12, 0x0001  },  
+{ 0x002A, 0x0224  },
+{ 0x0F12, 0x0001  },   
+{ 0x0F12, 0x0001  },
+//{ 0xdddd, 0x012C  }, //delay 300ms //0218 delay time 300ms // 0421 0064(100ms)->0032(50ms)        
+{ 0xffff, 0xffff  },
+};
+
+
+
+// /////////////
+// / CapturewMode
+// ////////////
+s5k5ca_short_t s5k5ca_capture[] = 
+{ 
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },                                                      
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  }, 
+  
+{ 0xffff, 0xffff  },
+};
+
+
+/////////////////////
+// SnapshotLowLightMode
+/////////////////////
+s5k5ca_short_t s5k5ca_snapshot_normal_low_00[] = //light <= 0x20 0421 PV2 0020->0018
+{ 
+//LowLight + Night Off
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },            
+                  
+{ 0x002A, 0x07E6  },
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+    
+{ 0x002A, 0x0838  },
+{ 0x0F12, 0x0A3C  },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x0908  },
+{ 0x0F12, 0x0446  },	//TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]
+                                             
+{ 0x002A, 0x0244  }, //Low lux capture//
+{ 0x0F12, 0x0001  }, //config 1 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  },
+                 
+{ 0xdddd, 0x0320  }, //delay 800ms 
+
+{ 0xffff, 0xffff  },
+//sw delay time - 800ms
+};
+
+
+  
+s5k5ca_short_t s5k5ca_flashcapture_00[] =       
+{ 
+  
+//{ 0xdddd, 0x0160  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },                   
+{ 0x002A, 0x035C  }, //Capture Mode//
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  }, 
+  
+
+{ 0xffff, 0xffff  },  
+};
+
+
+/////////////////////
+// SnapshotLowLightMode
+/////////////////////
+s5k5ca_short_t s5k5ca_snapshot_low[] = 
+{
+
+//LowLight + Night Off
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },            
+                  
+{ 0x002A, 0x07E6  },
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+    
+{ 0x002A, 0x0838  },
+{ 0x0F12, 0x0A3C  },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x0908  },
+{ 0x0F12, 0x0446  },	//TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]
+                                             
+{ 0x002A, 0x0244  }, //Low lux capture//
+{ 0x0F12, 0x0001  }, //config 1 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  },
+  
+{ 0xffff, 0xffff  },  
+
+};
+
+s5k5ca_short_t s5k5ca_flashcapture_low_00[] =    
+{
+//{ 0xdddd, 0x0160  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms    
+
+//LowLight + Night Off
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },            
+{ 0x002A, 0x0388  }, //Capture Mode//
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  },
+  
+{ 0xffff, 0xffff  },  
+};
+
+
+
+////////////////////
+// SnapshotNightMode
+///////////////////
+
+s5k5ca_short_t s5k5ca_snapshot_nightmode_00[] = 
+{
+
+//LowLight
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },    
+{ 0x002A, 0x07E6  },
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+                                                     
+{ 0x002A, 0x0244  }, //Night capture//
+{ 0x0F12, 0x0002  }, //config 2 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+
+////////////////
+// NightMode_ON
+///////////////
+s5k5ca_short_t s5k5ca_nightmode_on[] = 
+{
+
+
+{ 0xffff, 0xffff  },            
+};
+
+////////////////
+// NightMode_OFF
+///////////////
+s5k5ca_short_t s5k5ca_nightmode_off[] = 
+{
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_NONFIX                     //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_nonfix[] = 
+{
+
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_15FIX                   //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_15fix[] = 
+{
+
+  
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_7FIX                    //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_7fix[] = 
+{
+
+                  
+{ 0xffff, 0xffff  },
+};
+
+
+/////////
+// ISO_AUTO
+/////////
+s5k5ca_short_t s5k5ca_iso_auto[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x1000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0x3415  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0x682A  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0x8235  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0x3415  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0x682A  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0x8235  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x01B3  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x02A0  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x0064  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  },
+  
+{ 0xffff, 0xffff  },
+};
+
+////////
+// ISO_50
+////////
+s5k5ca_short_t s5k5ca_iso50[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x1000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x0064  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// ISO_100
+////////
+s5k5ca_short_t s5k5ca_iso100[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x1800  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x0096  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+  
+// ///////
+// / ISO_200
+// ///////
+s5k5ca_short_t s5k5ca_iso200[] =
+{ 
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+  
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x2000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x00C8  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// ISO_400
+////////
+s5k5ca_short_t s5k5ca_iso400[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x3000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x012C  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+
+////////////////////
+// SCENE_PORTRAIT_OFF
+////////////////////
+s5k5ca_short_t s5k5ca_scene_portrait_off[] =
+{
+{ 0xFCFC, 0xD000  },                    
+{ 0x0028, 0x7000  },//For Scene//
+{ 0x002A, 0x020C  },
+{ 0x0F12, 0x0000  },// Brightness for controling the EV//
+{ 0x002A, 0x0210  },
+{ 0x0F12, 0x0000  },// Saturation//
+{ 0x0F12, 0x0000  },// Blur_Sharpness //  
+{ 0xffff, 0xffff  },  
+};     
+
+////////////////////
+// SCENE_LANDSCAPE_OFF
+////////////////////
+s5k5ca_short_t s5k5ca_scene_landscape_off[] =
+{
+{ 0xFCFC, 0xD000  },     
+{ 0x0028, 0x7000  },//For Scene//
+{ 0x002A, 0x020C  },
+{ 0x0F12, 0x0000  },// Brightness for controling the EV//
+{ 0x002A, 0x0210  },
+{ 0x0F12, 0x0000  },// Saturation//
+{ 0x0F12, 0x0000  },// Blur_Sharpness //  
+{ 0xffff, 0xffff  },
+};
+
+/////////////////
+// SCENE_SPORTS_OFF
+/////////////////
+s5k5ca_short_t s5k5ca_scene_sports_off[] =
+{
+{ 0x0028, 0x7000  },     
+
+{ 0x002A, 0x0530  },//lt_uMaxExp1//
+{ 0x0F12, 0x3415  },
+{ 0x002A, 0x0534  },//lt_uMaxExp2//
+{ 0x0F12, 0x682A  },
+{ 0x002A, 0x167C  },//lt_uMaxExp3//
+{ 0x0F12, 0x8235  },
+{ 0x002A, 0x1680  },//lt_uMaxExp4//
+{ 0x0F12, 0xc350  },
+{ 0x0F12, 0x0000  },
+                  
+{ 0x002A, 0x0538  },//It_uCapMaxExp1 //
+{ 0x0F12, 0x3415  },
+{ 0x002A, 0x053C  },//It_uCapMaxExp2 //
+{ 0x0F12, 0x682A  },
+{ 0x002A, 0x1684  },//It_uCapMaxExp3 // 
+{ 0x0F12, 0x8235  },
+{ 0x002A, 0x1688  },//It_uCapMaxExp4 //
+{ 0x0F12, 0xc350  },
+{ 0x0F12, 0x0000  },
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x01B3  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x02A0  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710  },   //MaxAnGain4 //
+                  
+{ 0x002A, 0x0544  },
+{ 0x0F12, 0x0100  },//It_uMaxDigGain //
+
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_sunset_off[] =
+{
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_dawn_off[] =
+{
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_againstlight_off[] =
+{
+//NOT USE
+	              
+{ 0xffff, 0xffff  }, 
+};
+
+
+s5k5ca_short_t s5k5ca_scene_text_off[] =
+{
+//NOT USE
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_portrait_on[] =
+{
+//NOT USE
+{ 0xffff, 0xffff  },
+};
+
+
+
+
+s5k5ca_t s5k5ca_reg[] = 
+{
+	// To do.
+};
+
+// For VGA ( 640 x 480) on 4CA module
+s5k5ca_t s5k5ca_reg_vga[] = 
+{
+	// To do.
+};
+
+// For SVGA ( 800 x 600) on 4CA module
+s5k5ca_t s5k5ca_reg_svga[] = 
+{
+	// To do.
+};
+
+// For SXGA (1280 x 1024 = 1.3M) on 4CA module
+s5k5ca_t s5k5ca_reg_sxga[] = 
+{
+	// To do.
+};
+
+// For UXGA (1600 x 1200 = 2M) on 4CA module
+s5k5ca_t s5k5ca_reg_uxga[] = 
+{
+	// To do.
+};
+
+// For SQVGA on 4CA module
+s5k5ca_t s5k5ca_reg_qsvga[] = 
+{
+	// To do.
+};
+
+#define S5K5CA_INIT_REGS (sizeof(s5k5ca_reg)/sizeof(s5k5ca_reg[0]))
+#define S5K5CA_UXGA_REGS (sizeof(s5k5ca_reg_uxga)/sizeof(s5k5ca_reg_uxga[0]))
+#define S5K5CA_SVGA_REGS (sizeof(s5k5ca_reg_svga)/sizeof(s5k5ca_reg_svga[0]))
+#define S5K5CA_VGA_REGS (sizeof(s5k5ca_reg_vga)/sizeof(s5k5ca_reg_vga[0]))
+#define S5K5CA_QSVGA_REGS (sizeof(s5k5ca_reg_qsvga)/sizeof(s5k5ca_reg_qsvga[0]))
+
+//#define S5K5CA_RISC_REGS 0xEB
+//#define S5K5CA_ISP_REGS 0xFB /* S5C7323X */
+//#define S5K5CA_CIS_REGS 0x2F /* S5K437LA03 */
+                                                                                                                                                                                              
+//#define S5K5CA_REGS (0x1000)
+
+
+
+//delay 100ms phone SW //
+
+
+s5k5ca_short_t s5k5ca_snapshot_fireworks_00[] = // scene mode fireworks
+{ 
+
+//LowLight
+{ 0xFCFC, 0xD000 }, 
+{ 0x0028, 0x7000 },    
+{ 0x002A, 0x07E6 },
+{ 0x0F12, 0x0028 },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0028 },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+				 
+{ 0x002A, 0x0244 }, //Night capture//
+{ 0x0F12, 0x0002 }, //config 2 //
+{ 0x002A, 0x0230 }, 
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0246 }, 
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0224 }, 
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x0001 },
+
+{ 0xdddd, 0x06A4 }, //delay 1500ms 0304 Night Mode Change 
+
+{ 0xffff, 0xffff },
+};
+
+
+
+
+
+//---------------------------------------//
+// case 23 : FPS_NONFIX                     //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_nonfix_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x0288  },
+{ 0x0F12, 0x0535  },
+{ 0x0F12, 0x029A  },
+
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0230  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x023E  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+	
+{ 0xffff, 0xffff  },	
+};
+
+//---------------------------------------//
+// case 23 : FPS_15FIX                   //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_15fix_00[] = 
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x02B8 },
+{ 0x0F12, 0x029A },
+{ 0x0F12, 0x029A },
+
+
+{ 0x002A, 0x023C }, //Normal Preview//
+{ 0x0F12, 0x0001 }, //config 1 //                                                  
+{ 0x002A, 0x0240 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0230 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x023E },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0220 }, 
+{ 0x0F12, 0x0001 },	
+{ 0x002A, 0x0222 }, 
+{ 0x0F12, 0x0001 },
+
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_7FIX                    //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_7fix_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x02B8  },
+{ 0x0F12, 0x0535  },
+{ 0x0F12, 0x0535  },
+
+
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0001  }, //config 1 //                                                  
+{ 0x002A, 0x0240  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0230  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x023E  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  },   
+                  
+{ 0xffff, 0xffff  },
+};
+
+////////////
+// EFFECT_OFF
+////////////
+s5k5ca_short_t s5k5ca_effect_off_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x3286  }, //Pre/Post gamma on(ç›”æ±—)
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0000  },
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 16 : MonoEffect                  //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_effect_gray_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0001  },
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 20 : NegativeEffect              //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_effect_negative_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0003  },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////
+// EFFECT_SEPIA
+/////////////
+s5k5ca_short_t s5k5ca_effect_sepia_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0004  },
+
+{ 0xffff, 0xffff  },
+};
+
+////////////
+// EFFECT_AQUA
+/////////////
+s5k5ca_short_t s5k5ca_effect_aqua_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0005  },
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 19 : GREENEffect(sketch)         //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_effect_sketch_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x3286  },
+{ 0x0F12, 0x0000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0006  },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////
+// WB_Auto
+/////////////
+s5k5ca_short_t s5k5ca_wb_auto_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x246E  },
+{ 0x0F12, 0x0001  },
+
+{ 0xffff, 0xffff  },
+};                
+
+///////////
+// WB_Sunny
+//////////
+s5k5ca_short_t s5k5ca_wb_sunny_00[] = 
+{ 
+{ 0xfcfc, 0xd000  }, 
+{ 0x0028, 0x7000  }, 
+{ 0x002a, 0x246E  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x002a, 0x04A0  }, 
+{ 0x0f12, 0x05E0  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0400  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0500  }, //0530
+{ 0x0f12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////
+// WB_Cloudy
+///////////
+s5k5ca_short_t s5k5ca_wb_cloudy_00[] = 
+{ 
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+{ 0x002a, 0x246E  },
+{ 0x0f12, 0x0000  },
+{ 0x002a, 0x04A0  },
+{ 0x0f12, 0x06E0  }, //06B0 
+{ 0x0f12, 0x0001  }, //0001 
+{ 0x0f12, 0x0400  }, //0400 
+{ 0x0f12, 0x0001  }, //0001 
+{ 0x0f12, 0x0448  }, //0460 
+{ 0x0f12, 0x0001  }, //0001 
+
+{ 0xffff, 0xffff  },
+};
+
+////////////
+// WB_Tungsten
+////////////
+s5k5ca_short_t s5k5ca_wb_tungsten_00[] = 
+{ 
+{ 0xfcfc, 0xd000  }, 
+{ 0x0028, 0x7000  }, 
+{ 0x002a, 0x246E  }, 
+{ 0x0f12, 0x0000  }, 
+
+{ 0x002a, 0x04A0  }, 
+{ 0x0f12, 0x03D0  },  //03D0
+{ 0x0f12, 0x0001  },  //0001
+{ 0x0f12, 0x0400  },  //0400
+{ 0x0f12, 0x0001  },  //0001
+{ 0x0f12, 0x0910  },  //0920
+{ 0x0f12, 0x0001  },  //0001 
+                  
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// WB_Flourescent
+///////////////
+s5k5ca_short_t s5k5ca_wb_fluorescent_00[] = 
+{ 
+{ 0xfcfc, 0xd000  }, 
+{ 0x0028, 0x7000  }, 
+{ 0x002a, 0x246E  }, 
+{ 0x0f12, 0x0000  }, 
+                     
+{ 0x002a, 0x04A0  }, 
+{ 0x0f12, 0x0530  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0400  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0800  }, 
+{ 0x0f12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+
+////////////
+// BR_Minus4
+///////////
+s5k5ca_short_t s5k5ca_br_minus4_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+//////////
+// BR_Minus3
+/////////
+s5k5ca_short_t s5k5ca_br_minus3_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+//////////
+// BR_Minus2
+//////////
+s5k5ca_short_t s5k5ca_br_minus2_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};                
+
+//////////
+// BR_Minus1
+//////////
+s5k5ca_short_t s5k5ca_br_minus1_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_ZERO
+////////
+s5k5ca_short_t s5k5ca_br_zero_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_Plus1
+/////////
+s5k5ca_short_t s5k5ca_br_plus1_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_Plus2
+/////////
+s5k5ca_short_t s5k5ca_br_plus2_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_Plus3
+/////////
+s5k5ca_short_t s5k5ca_br_plus3_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};                
+
+/////////
+// BR_Plus4
+/////////
+s5k5ca_short_t s5k5ca_br_plus4_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+
+////////////////////
+// SCENE_MODE_OFF
+////////////////////
+//////////////////////////////////////////////
+//////////Scene off///////////////////////////
+//////////////////////////////////////////////
+//01.None//
+//02.Sports off
+//03.Night off
+//////////////////////////////////////////////
+////////// CAM_REGSET_SCENE_NORMAL ///////////
+s5k5ca_short_t s5k5ca_scene_mode_off_00[] =
+{ 
+
+{ 0xFCFC, 0xD000 },   //WB Auto
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x246E },
+{ 0x0F12, 0x0001 },
+
+{ 0x0028, 0x7000 },   //For Scene//
+{ 0x002A, 0x020C },   
+{ 0x0F12, 0x0000 },   // Brightness for controling the EV//
+{ 0x002A, 0x0210 },   
+{ 0x0F12, 0x0000 },   // Saturation//
+{ 0x0F12, 0x0000 },   // Blur_Sharpness //  
+	
+///////////////////
+//02. Sports off //
+///////////////////
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x12B8 },  
+{ 0x0F12, 0x1000 }, 
+ 
+{ 0x002A, 0x0530 },   	                                                    
+{ 0x0F12, 0x3415 },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534 },                                                               
+{ 0x0F12, 0x682A },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C },                                                               
+{ 0x0F12, 0x8235 },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680 },                                                               
+{ 0x0F12, 0xc350 },   //MaxExp4   125ms  38ea //                           
+        
+{ 0x002A, 0x0538 },                                                               
+{ 0x0F12, 0x3415 },   // 15fps //                                                 
+{ 0x002A, 0x053C },                                                               
+{ 0x0F12, 0x682A },   // 7.5fps //                                                
+{ 0x002A, 0x1684 },                                                               
+{ 0x0F12, 0x8235 },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688 },                                                               
+{ 0x0F12, 0xC350 },   //CapMaxExp4 //                                             
+
+{ 0x002A, 0x0540 },                                                               
+{ 0x0F12, 0x01B3 },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3 },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C },                                                               
+{ 0x0F12, 0x02A0 },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710 },   //MaxAnGain4 //    
+
+{ 0x002A, 0x0544 },  
+{ 0x0F12, 0x0100 },
+{ 0x0F12, 0x8000 },
+
+{ 0x002A, 0x04B4 },  
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x0064 },
+{ 0x0F12, 0x0001 },
+
+//////////////////
+//03. Night off //
+//////////////////
+
+{ 0x0028, 0x7000 },
+
+{ 0x002A, 0x0530 },//lt_uMaxExp1//     
+{ 0x0F12, 0x3415 },                    
+{ 0x002A, 0x0534 },//lt_uMaxExp2//     
+{ 0x0F12, 0x682A },                    
+{ 0x002A, 0x167C },//lt_uMaxExp3//     
+{ 0x0F12, 0x8235 },                    
+{ 0x002A, 0x1680 },//lt_uMaxExp4//     
+{ 0x0F12, 0xc350 },                    
+{ 0x0F12, 0x0000 },                    
+                                     
+{ 0x002A, 0x0538 },//It_uCapMaxExp1 // 
+{ 0x0F12, 0x3415 },                    
+{ 0x002A, 0x053C },//It_uCapMaxExp2 // 
+{ 0x0F12, 0x682A },                    
+{ 0x002A, 0x1684 },//It_uCapMaxExp3 // 
+{ 0x0F12, 0x8235 },                    
+{ 0x002A, 0x1688 },//It_uCapMaxExp4 // 
+{ 0x0F12, 0xc350 },                    
+{ 0x0F12, 0x0000 },                    
+                                     
+{ 0x002A, 0x0540 },                                                               
+{ 0x0F12, 0x01B3 },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3 },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C },                                                               
+{ 0x0F12, 0x02A0 },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710 },   //MaxAnGain4 //
+                                     
+{ 0x002A, 0x0544 },                    
+{ 0x0F12, 0x0100 },//It_uMaxDigGain // 
+
+{ 0x002A, 0x07E6 },
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+
+{ 0x002A, 0x0838 },
+{ 0x0F12, 0x003C },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x023C },
+{ 0x0F12, 0x0000 },//REG_TC_GP_ActivePrevConfig     //Normal Preview //  
+{ 0x002A, 0x0240 },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_PrevOpenAfterChange  
+{ 0x002A, 0x0230 },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_NewConfigSync        
+{ 0x002A, 0x023E },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_PrevConfigChanged    
+{ 0x002A, 0x0220 },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_EnablePreview        
+{ 0x0F12, 0x0001 },   //REG_TC_GP_EnablePreviewChanged 
+
+//Metering Center
+{ 0xfcfc, 0xd000 },
+{ 0x0028, 0x7000 },             
+                                                            
+{ 0x002A, 0x0F7E },    //ae weight  //     
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0201 },  //0201
+{ 0x0F12, 0x0102 },  //0102
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0201 },  //0101
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0102 },  //0101
+{ 0x0F12, 0x0201 },  //0201
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0102 },  //0102
+{ 0x0F12, 0x0101 },  //0201
+{ 0x0F12, 0x0101 },  //0202
+{ 0x0F12, 0x0101 },  //0202
+{ 0x0F12, 0x0101 },  //0102
+
+{ 0xffff, 0xffff  },
+};
+
+////////////////////
+// SCENE_PORTRAIT_ON
+///////////////////
+s5k5ca_short_t s5k5ca_scene_portrait_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x020C },
+{ 0x0F12, 0x0000 },
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x0000 },
+{ 0x0F12, 0xFFF6 },
+
+{ 0xffff, 0xffff  },
+};
+
+ 
+////////////////////
+// SCENE_LANDSCAPE_ON
+///////////////////
+s5k5ca_short_t s5k5ca_scene_landscape_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x020C },
+{ 0x0F12, 0x0000 },
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x001E },
+{ 0x0F12, 0x000A },
+
+//Metering Matrix
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+                  
+{ 0x002a, 0x0F7E  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  },
+
+{ 0xffff, 0xffff  }, 
+};
+
+////////////////////
+// NIGHTMODE_ON
+///////////////////
+
+s5k5ca_short_t s5k5ca_nightmode_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },  
+{ 0x002A, 0x02CC },   //Night Preview
+{ 0x0F12, 0x0400 },	//REG_2TC_PCFG_usWidth                      	2   700002CC    // 
+{ 0x0F12, 0x0300 },   //REG_2TC_PCFG_usHeight                     	2   700002CE    // 
+{ 0x0F12, 0x0005 },   //REG_2TC_PCFG_Format                       	2   700002D0    // 
+{ 0x0F12, 0x32E8 },   //REG_2TC_PCFG_usMaxOut4KHzRate             	2   700002D2    // 
+{ 0x0F12, 0x32a8 },   //REG_2TC_PCFG_usMinOut4KHzRate             	2   700002D4    // 
+{ 0x0F12, 0x0100 },   //REG_2TC_PCFG_OutClkPerPix88               	2   700002D6    // 
+{ 0x0F12, 0x0800 },   //REG_2TC_PCFG_uMaxBpp88                    	2   700002D8    // 
+{ 0x0F12, 0x0072 },   //REG_2TC_PCFG_PVIMask                      	2   700002DA    // 
+{ 0x0F12, 0x0010 },   //REG_2TC_PCFG_OIFMask                      	2   700002DC    // 
+{ 0x0F12, 0x01E0 },   //REG_2TC_PCFG_usJpegPacketSize             	2   700002DE    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_usJpegTotalPackets           	2   700002E0    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_uClockInd                    	2   700002E2    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_usFrTimeType                 	2   700002E4    // 
+{ 0x0F12, 0x0001 },   //REG_2TC_PCFG_FrRateQualityType            	2   700002E6    // 
+{ 0x0F12, 0x09C4 },   //REG_2TC_PCFG_usMaxFrTimeMsecMult10        	2   700002E8    // 
+{ 0x0F12, 0x029A },   //REG_2TC_PCFG_usMinFrTimeMsecMult10        	2   700002EA    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_bSmearOutput                 	2   700002EC    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_sSaturation                  	2   700002EE    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_sSharpBlur                   	2   700002F0    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_sColorTemp                   	2   700002F2    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_uDeviceGammaIndex            	2   700002F4    // 
+{ 0x0F12, 0x0003 },   //REG_2TC_PCFG_uPrevMirror                  	2   700002F6    // 
+{ 0x0F12, 0x0003 },   //REG_2TC_PCFG_uCaptureMirror               	2   700002F8    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_uRotation                    	2   700002FA    // 
+                 
+{ 0x002A, 0x03B4 },   //Night Capture 
+{ 0x0F12, 0x0000 },	//REG_2TC_CCFG_uCaptureMode                 	2   700003B4          //
+{ 0x0F12, 0x0800 },   //REG_2TC_CCFG_usWidth                      	2   700003B6          //
+{ 0x0F12, 0x0600 },   //REG_2TC_CCFG_usHeight                     	2   700003B8          //
+{ 0x0F12, 0x0005 },   //REG_2TC_CCFG_Format                       	2   700003BA          //
+{ 0x0F12, 0x32E8 },   //REG_2TC_CCFG_usMaxOut4KHzRate             	2   700003BC          //
+{ 0x0F12, 0x32a8 },   //REG_2TC_CCFG_usMinOut4KHzRate             	2   700003BE          //
+{ 0x0F12, 0x0100 },   //REG_2TC_CCFG_OutClkPerPix88               	2   700003C0          //
+{ 0x0F12, 0x0800 },   //REG_2TC_CCFG_uMaxBpp88                    	2   700003C2          //
+{ 0x0F12, 0x0072 },   //REG_2TC_CCFG_PVIMask                      	2   700003C4          //
+{ 0x0F12, 0x0010 },   //REG_2TC_CCFG_OIFMask                      	2   700003C6          //
+{ 0x0F12, 0x01E0 },   //REG_2TC_CCFG_usJpegPacketSize             	2   700003C8          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_usJpegTotalPackets           	2   700003CA          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_uClockInd                    	2   700003CC          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_usFrTimeType                 	2   700003CE          //
+{ 0x0F12, 0x0002 },   //REG_2TC_CCFG_FrRateQualityType            	2   700003D0          //
+{ 0x0F12, 0x1388 },   //REG_2TC_CCFG_usMaxFrTimeMsecMult10        	2   700003D2          //
+{ 0x0F12, 0x1388 },   //REG_2TC_CCFG_usMinFrTimeMsecMult10        	2   700003D4          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_bSmearOutput                 	2   700003D6          //
+{ 0x0F12, 0x0030 },   //REG_2TC_CCFG_sSaturation                  	2   700003D8          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_sSharpBlur                   	2   700003DA          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_sColorTemp                   	2   700003DC          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_uDeviceGammaIndex            	2   700003DE          //
+                 
+                 
+{ 0x002A, 0x0208 },
+{ 0x0F12, 0x0001 },   //REG_TC_IPRM_InitParamsUpdated//
+                 
+                 
+{ 0x002A, 0x0530 },   //lt_uMaxExp1//     
+{ 0x0F12, 0x3415 },                       
+{ 0x002A, 0x0534 },   //lt_uMaxExp2//     
+{ 0x0F12, 0x682A },                       
+{ 0x002A, 0x167C },   //lt_uMaxExp3//     
+{ 0x0F12, 0x8235 },                       
+{ 0x002A, 0x1680 },   //lt_uMaxExp4//     
+{ 0x0F12, 0x1A80 },                       
+{ 0x0F12, 0x0006 },                       
+                                          
+{ 0x002A, 0x0538 },   //It_uCapMaxExp1 // 
+{ 0x0F12, 0x3415 },                       
+{ 0x002A, 0x053C },   //It_uCapMaxExp2 // 
+{ 0x0F12, 0x682A },                       
+{ 0x002A, 0x1684 },   //It_uCapMaxExp3 // 
+{ 0x0F12, 0x8235 },                       
+{ 0x002A, 0x1688 },   //It_uCapMaxExp4 // 
+{ 0x0F12, 0x1A80 },                       
+{ 0x0F12, 0x0006 },                       
+                                          
+{ 0x002A, 0x0540 },                       
+{ 0x0F12, 0x0180 },   //It_uMaxAnGain1 // 
+{ 0x0F12, 0x0250 },   //It_uMaxAnGain2 // 
+{ 0x002A, 0x168C },                       
+{ 0x0F12, 0x0340 },   //It_uMaxAnGain3 // 
+{ 0x0F12, 0x0800 },   //It_uMaxAnGain4 // 
+                                          
+{ 0x002A, 0x0544 },                       
+{ 0x0F12, 0x0100 },   //It_uMaxDigGain // 
+                 
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x07E6 },
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+                 
+{ 0x002A, 0x0838 },
+{ 0x0F12, 0x0A3C },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x023C },
+{ 0x0F12, 0x0002 },  //night preview config 2//
+{ 0x002A, 0x0240 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0230 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x023E },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0220 },
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x0001 },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////////
+// SCENE_SPORTS_ON
+////////////////
+s5k5ca_short_t s5k5ca_scene_sports_on_00[] =
+{
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+
+{ 0x002A, 0x12B8 },  
+{ 0x0F12, 0x2000 }, 
+
+{ 0x002A, 0x0530 },
+{ 0x0F12, 0x36B0 },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534 },                                                               
+{ 0x0F12, 0x36B0 },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C },                                                               
+{ 0x0F12, 0x36B0 },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680 },                                                               
+{ 0x0F12, 0x36B0 },   //MaxExp4   125ms  38ea //                           
+        
+{ 0x002A, 0x0538 },                                                               
+{ 0x0F12, 0x36B0 },   // 15fps //                                                 
+{ 0x002A, 0x053C },                                                               
+{ 0x0F12, 0x36B0 },   // 7.5fps //                                                
+{ 0x002A, 0x1684 },                                                               
+{ 0x0F12, 0x36B0 },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688 },                                                               
+{ 0x0F12, 0x36B0 },   //CapMaxExp4 //                                             
+ 
+{ 0x002A, 0x0540 },                                                               
+{ 0x0F12, 0x0200 },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200 },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C },                                                               
+{ 0x0F12, 0x0200 },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200 },   //MaxAnGain4 //    
+
+{ 0x002A, 0x0544 },  
+{ 0x0F12, 0x0100 },
+{ 0x0F12, 0x8000 },
+
+{ 0x002A, 0x04B4 },  
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x00C8 },
+{ 0x0F12, 0x0001 },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////////
+// SCENE_SUNSET_ON
+////////////////
+s5k5ca_short_t s5k5ca_scene_sunset_on_00[] =
+{ 
+{ 0xfcfc, 0xd000 },
+{ 0x0028, 0x7000 },
+{ 0x002a, 0x246E },
+{ 0x0f12, 0x0000 },
+                 
+{ 0x002a, 0x04A0 },
+{ 0x0f12, 0x05E0 },
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0400 },
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0500 },
+{ 0x0f12, 0x0001 },
+
+{ 0xffff, 0xffff  },
+};
+
+////////////////
+// SCENE_DAWN_ON
+////////////////
+s5k5ca_short_t s5k5ca_scene_dawn_on_00[] =
+{ 
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+
+//////////////////////
+// SCENE_AGAINSTLIGHT_ON
+//////////////////////
+s5k5ca_short_t s5k5ca_scene_againstlight_on_00[] =
+{ 
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_TEXT_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_text_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x020C },
+{ 0x0F12, 0x0000 },
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x0000 },
+{ 0x0F12, 0x0014 },
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_PARTY_INDOOR_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_party_indoor_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+                    // Party/indoor _ Shaturation +1
+{ 0x0028, 0x7000 }, //For Scene
+{ 0x002A, 0x020C },             
+{ 0x0F12, 0x0000 }, // Brightness for controling the EV
+{ 0x002A, 0x0210 }, 
+{ 0x0F12, 0x001e }, // Saturagon
+{ 0x0F12, 0x0000 }, // Sharpness
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_BEACH_SNOW_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_beach_snow_on_00[] =
+{ 
+//04. BEACH_SNOW
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 }, //For Scene
+{ 0x002A, 0x020C },             
+{ 0x0F12, 0x0014 }, // Brightness for controling the EV
+{ 0x002A, 0x0210 }, 
+{ 0x0F12, 0x001e }, // Saturagon
+{ 0x0F12, 0x0000 }, // Sharpness
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_CANDLELIGHT_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_candlelight_on_00[] =
+{ 
+
+{ 0xfcfc, 0xd000 }, 
+{ 0x0028, 0x7000 }, 
+{ 0x002a, 0x246E }, 	 
+{ 0x0f12, 0x0000 },
+
+{ 0x002a, 0x04A0 }, 	 
+{ 0x0f12, 0x05E0 },
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0400 }, 
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0500 },
+{ 0x0f12, 0x0001 }, 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_FIREWORKS_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_fireworks_on_00[] =
+{ 
+//09. FIRE _ Preview : (4fps Exposure 250ms) Capture : ( 1fps Exposure 1000ms )
+//Preview 4fps : Capture 1fps
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x02CC },
+{ 0x0F12, 0x0400 },    	//REG_2TC_PCFG_usWidth                      	2   700002CC        //
+{ 0x0F12, 0x0300 },    	//REG_2TC_PCFG_usHeight                     	2   700002CE        //
+{ 0x0F12, 0x0005 },    	//REG_2TC_PCFG_Format                       	2   700002D0        //
+{ 0x0F12, 0x32E8 },    	//REG_2TC_PCFG_usMaxOut4KHzRate             	2   700002D2        //
+{ 0x0F12, 0x32a8 },    	//REG_2TC_PCFG_usMinOut4KHzRate             	2   700002D4        //
+{ 0x0F12, 0x0100 },    	//REG_2TC_PCFG_OutClkPerPix88               	2   700002D6        //
+{ 0x0F12, 0x0800 },    	//REG_2TC_PCFG_uMaxBpp88                    	2   700002D8        //
+{ 0x0F12, 0x0072 },    	//REG_2TC_PCFG_PVIMask                      	2   700002DA        //
+{ 0x0F12, 0x0010 },    	//REG_2TC_PCFG_OIFMask                      	2   700002DC        //
+{ 0x0F12, 0x01E0 },    	//REG_2TC_PCFG_usJpegPacketSize             	2   700002DE        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_usJpegTotalPackets           	2   700002E0        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_uClockInd                    	2   700002E2        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_usFrTimeType                 	2   700002E4        //
+{ 0x0F12, 0x0001 },    	//REG_2TC_PCFG_FrRateQualityType            	2   700002E6        //
+{ 0x0F12, 0x09C4 },    	//REG_2TC_PCFG_usMaxFrTimeMsecMult10        	2   700002E8        //
+{ 0x0F12, 0x029A },    	//REG_2TC_PCFG_usMinFrTimeMsecMult10        	2   700002EA        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_bSmearOutput                 	2   700002EC        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_sSaturation                  	2   700002EE        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_sSharpBlur                   	2   700002F0        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_sColorTemp                   	2   700002F2        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_uDeviceGammaIndex            	2   700002F4        //
+{ 0x0F12, 0x0003 },    	//REG_2TC_PCFG_uPrevMirror                  	2   700002F6        //
+{ 0x0F12, 0x0003 },    	//REG_2TC_PCFG_uCaptureMirror               	2   700002F8        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_uRotation                    	2   700002FA        //
+
+//Night shot capture 2fps
+{ 0x002A, 0x03B4 },
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_uCaptureMode                 	2   700003B4              //
+{ 0x0F12, 0x0800 },    	//REG_2TC_CCFG_usWidth                      	2   700003B6              //
+{ 0x0F12, 0x0600 },    	//REG_2TC_CCFG_usHeight                     	2   700003B8              //
+{ 0x0F12, 0x0005 },    	//REG_2TC_CCFG_Format                       	2   700003BA              //
+{ 0x0F12, 0x32E8 },    	//REG_2TC_CCFG_usMaxOut4KHzRate             	2   700003BC              //
+{ 0x0F12, 0x32a8 },    	//REG_2TC_CCFG_usMinOut4KHzRate             	2   700003BE              //
+{ 0x0F12, 0x0100 },    	//REG_2TC_CCFG_OutClkPerPix88               	2   700003C0              //
+{ 0x0F12, 0x0800 },    	//REG_2TC_CCFG_uMaxBpp88                    	2   700003C2              //
+{ 0x0F12, 0x0072 },    	//REG_2TC_CCFG_PVIMask                      	2   700003C4              //
+{ 0x0F12, 0x0010 },    	//REG_2TC_CCFG_OIFMask                      	2   700003C6              //
+{ 0x0F12, 0x01E0 },    	//REG_2TC_CCFG_usJpegPacketSize             	2   700003C8              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_usJpegTotalPackets           	2   700003CA              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_uClockInd                    	2   700003CC              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_usFrTimeType                 	2   700003CE              //
+{ 0x0F12, 0x0002 },    	//REG_2TC_CCFG_FrRateQualityType            	2   700003D0              //
+{ 0x0F12, 0x2710 },	//REG_2TC_CCFG_usMaxFrTimeMsecMult10        	2   700003D2              //
+{ 0x0F12, 0x2710 },	//REG_2TC_CCFG_usMinFrTimeMsecMult10        	2   700003D4              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_bSmearOutput                 	2   700003D6              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_sSaturation                  	2   700003D8              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_sSharpBlur                   	2   700003DA              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_sColorTemp                   	2   700003DC              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_uDeviceGammaIndex            	2   700003DE              //
+
+{ 0x002A, 0x0208 },                                      
+{ 0x0F12, 0x0001 },       //REG_TC_IPRM_InitParamsUpdated//
+
+{ 0x002A, 0x0530 },	//lt_uMaxExp1             
+{ 0x0F12, 0x3415 },		
+{ 0x002A, 0x0534 },       //lt_uMaxExp2              
+{ 0x0F12, 0x682A },		
+{ 0x002A, 0x167C },       //lt_uMaxExp3              
+{ 0x0F12, 0x8235 },		
+{ 0x002A, 0x1680 },       //lt_uMaxExp4              
+{ 0x0F12, 0x1A80 },       //1fps
+{ 0x0F12, 0x0006 },
+                              
+{ 0x002A, 0x0538 },       //It_uCapMaxExp1 //              
+{ 0x0F12, 0x3415 },	  
+{ 0x002A, 0x053C },       //It_uCapMaxExp1 //             
+{ 0x0F12, 0x682A },	  
+{ 0x002A, 0x1684 },       //It_uCapMaxExp3 //              
+{ 0x0F12, 0x8235 },	
+{ 0x002A, 0x1688 },       //It_uCapMaxExp4 //             
+{ 0x0F12, 0x1A80 },       //1fps
+{ 0x0F12, 0x0006 },	
+                              
+{ 0x002A, 0x0540 },                     
+{ 0x0F12, 0x0180 },       //It_uMaxAnGain1 //
+{ 0x0F12, 0x0250 },	//It_uMaxAnGain2 //
+{ 0x002A, 0x168C },                     
+{ 0x0F12, 0x0340 },	//It_uMaxAnGain3 //
+{ 0x0F12, 0x0710 },	//It_uMaxAnGain4 //
+
+{ 0x002A, 0x0544 },       //It_uMaxDigGain //
+{ 0x0F12, 0x0100 },
+
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x023C },
+{ 0x0F12, 0x0002 },	//#REG_TC_GP_ActivePrevConfig     //Night Preview
+{ 0x002A, 0x0240 },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_PrevOpenAfterChange
+{ 0x002A, 0x0230 },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_NewConfigSync
+{ 0x002A, 0x023E },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_PrevConfigChanged
+{ 0x002A, 0x0220 },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_EnablePreview
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_EnablePreviewChanged
+ 
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_Dust_Dawn_On
+///////////////
+s5k5ca_short_t s5k5ca_scene_dust_dawn_00[] =
+{ 
+//Cam_Cfg_WB_Fluorescent
+{ 0xfcfc, 0xd000 }, 
+{ 0x0028, 0x7000 }, 
+{ 0x002a, 0x246E }, 	 
+{ 0x0f12, 0x0000 },
+
+{ 0x002a, 0x04A0 }, 	 
+{ 0x0f12, 0x0530 }, 
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0400 }, 
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0800 }, 
+{ 0x0f12, 0x0001 }, 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_Fall_Color_On
+///////////////
+s5k5ca_short_t s5k5ca_scene_fall_color_00[] =
+{ 
+//07. FALL
+{ 0xFCFC, 0xD000 },
+//  Fall  _ Saturation +2
+{ 0x0028, 0x7000 }, //For Scene
+{ 0x002A, 0x020C },             
+{ 0x0F12, 0x0000 }, // Brightness for controling the EV
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x0032 }, // Saturation
+{ 0x0F12, 0x0000 }, // Sharpness
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_Backlight_On
+///////////////
+s5k5ca_short_t s5k5ca_scene_backlight_00[] =
+{ 
+//Metering Center
+//Flash On Default
+{ 0xfcfc, 0xd000 },
+{ 0x0028, 0x7000 },
+                 
+{ 0x002A, 0x0F7E  },    //ae weight  //     
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0201
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0102
+
+{ 0xffff, 0xffff  },
+};
+
+
+
+
+////////////////////////
+// MeasureBrightness_SPOT
+///////////////////////
+s5k5ca_short_t s5k5ca_measure_brightness_spot_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////////////////
+// MeasureBrightness_Default
+//////////////////////////
+s5k5ca_short_t s5k5ca_measure_brightness_default_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+#if 1//PGH 
+s5k5ca_short_t s5k5ca_ae_awb_unlock[] = 
+{
+{ 0xffff, 0xffff  },
+
+};
+ 
+s5k5ca_short_t s5k5ca_ae_mwb_unlock[] = 
+{
+{ 0xffff, 0xffff  },
+
+};
+ 
+s5k5ca_short_t s5k5ca_ae_awb_lock[] = 
+{
+{ 0xffff, 0xffff  },
+
+};
+#endif//PGH
+
+
+s5k5ca_short_t s5k5ca_af_low_lux_val[] = 
+{ //0217 SEMCO
+
+{ 0xffff, 0xffff  },
+};
+	 
+s5k5ca_short_t s5k5ca_af_normal_lux_val[] = 
+{
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////////////////////
+// MeasureBrightness_CENTER
+/////////////////////////////
+s5k5ca_short_t s5k5ca_measure_brightness_center_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+// 0407 function add.
+
+s5k5ca_short_t s5k5ca_metering_spot[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+                    
+{ 0x002A, 0x0F7E  },
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0f01  }, 
+{ 0x0f12, 0x010f  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0f01  }, 
+{ 0x0f12, 0x010f  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  },
+
+{ 0xffff, 0xffff  },
+
+};
+
+s5k5ca_short_t s5k5ca_metering_matrix[] = 
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+                  
+{ 0x002a, 0x0F7E  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  },
+
+{ 0xffff, 0xffff  },
+
+};
+
+s5k5ca_short_t s5k5ca_metering_center[] = 
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },             
+                                                             
+{ 0x002A, 0x0F7E  },    //ae weight  //     
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0201
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0102
+
+{ 0xffff, 0xffff  },
+
+};
+
+
+
+
+
+//define S5K5CA_INIT_REGS (sizeof(s5k5ca_reg)/sizeof(s5k5ca_reg[0]))
+//define S5K5CA_UXGA_REGS (sizeof(s5k5ca_reg_uxga)/sizeof(s5k5ca_reg_uxga[0]))
+//define S5K5CA_SVGA_REGS (sizeof(s5k5ca_reg_svga)/sizeof(s5k5ca_reg_svga[0]))
+//define S5K5CA_VGA_REGS (sizeof(s5k5ca_reg_vga)/sizeof(s5k5ca_reg_vga[0]))
+//define S5K5CA_QSVGA_REGS (sizeof(s5k5ca_reg_qsvga)/sizeof(s5k5ca_reg_qsvga[0]))
+
+////define S5K5CA_RISC_REGS 0xEB
+////define S5K5CA_ISP_REGS 0xFB /* S5C7323X */
+////define S5K5CA_CIS_REGS 0x2F /* S5K437LA03 */
+                                                                                                                                                                                              
+////define S5K5CA_REGS (0x1000)
+
+//endif
+
+
+
+#endif
diff -uNra linux-3.0.82/drivers/media/video/s5k5ca.c linux-3.0.82x/drivers/media/video/s5k5ca.c
--- linux-3.0.82/drivers/media/video/s5k5ca.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/s5k5ca.c	2017-09-23 03:42:49.590676372 +0800
@@ -0,0 +1,1159 @@
+
+/*
+ * Copyright (c) 2008-2009 QUALCOMM USA, INC.
+ *
+ * All source code in this file is licensed under the following license
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, you can find it at http://www.fsf.org
+ */
+
+#include <linux/delay.h>
+#include <linux/types.h>
+#include <linux/i2c.h>
+//#include <linux/uaccess.h>
+//#include <linux/miscdevice.h>
+#include <linux/slab.h>
+#include "msm_camera.h"
+//#include <mach/gpio.h>
+//#include <mach/camera.h>
+#include "s5k5ca.h"
+//#include "linux/hardware_self_adapt.h"
+
+//#include <asm/mach-types.h>
+#ifdef CONFIG_HUAWEI_HW_DEV_DCT
+#include <linux/hw_dev_dec.h>
+#endif
+
+#ifdef CONFIG_HUAWEI_CAMERA_SENSOR_S5K5CA
+ #undef CDBG
+ #define CDBG(fmt, args...) printk(KERN_INFO "s5k5ca.c: " fmt, ## args)
+#endif
+
+/*=============================================================
+    SENSOR REGISTER DEFINES
+==============================================================*/
+#define S5K5CA_CHIP_ID 0x05ca
+
+enum s5k5ca_test_mode_t
+{
+    TEST_OFF,
+    TEST_1,
+    TEST_2,
+    TEST_3
+};
+
+enum s5k5ca_resolution_t
+{
+    QTR_SIZE,
+    FULL_SIZE,
+    INVALID_SIZE
+};
+
+enum s5k5ca_reg_update_t
+{
+    /* Sensor egisters that need to be updated during initialization */
+    REG_INIT,
+
+    /* Sensor egisters that needs periodic I2C writes */
+    UPDATE_PERIODIC,
+
+    /* All the sensor Registers will be updated */
+    UPDATE_ALL,
+
+    /* Not valid update */
+    UPDATE_INVALID
+};
+
+enum s5k5ca_setting_t
+{
+    RES_PREVIEW,
+    RES_CAPTURE
+};
+
+/*
+ * Time in milisecs for waiting for the sensor to reset.
+ */
+#define S5K5CA_RESET_DELAY_MSECS 66
+
+/* for 30 fps preview */
+#define S5K5CA_DEFAULT_CLOCK_RATE 24500000
+
+#define S5K5CA_ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
+
+/* FIXME: Changes from here */
+struct s5k5ca_work_t
+{
+    struct work_struct work;
+};
+
+struct s5k5ca_ctrl_t
+{
+    const struct  msm_camera_sensor_info *sensordata;
+
+    int      sensormode;
+    uint32_t fps_divider; /* init to 1 * 0x00000400 */
+    uint32_t pict_fps_divider; /* init to 1 * 0x00000400 */
+
+    uint16_t curr_lens_pos;
+    uint16_t init_curr_lens_pos;
+    uint16_t my_reg_gain;
+    uint32_t my_reg_line_count;
+
+    enum s5k5ca_resolution_t prev_res;
+    enum s5k5ca_resolution_t pict_res;
+    enum s5k5ca_resolution_t curr_res;
+    enum s5k5ca_test_mode_t  set_test;
+
+    unsigned short imgaddr;
+};
+
+/*delete antibanding enum*/
+const static char s5k5ca_supported_effect[] = "none,mono,negative,sepia,aqua";
+static bool CSI_CONFIG;
+#define MODEL_TRULY 0
+#define MODEL_SUNNY 1
+#define S5K5CA_IS_ON 1
+
+static uint16_t s5k5ca_model_id = MODEL_SUNNY;
+
+static uint8_t s5k5ca_init_flag = false;
+
+#define M660_SENSOR_PWD 32
+static int s5k5ca_pwd = 119; //pwd for camera
+static struct s5k5ca_i2c_reg_conf * p_s5k5ca_init_reg_config;
+static unsigned int reg_num;
+
+static struct  s5k5ca_work_t *s5k5casensorw = NULL;
+
+static struct  i2c_client *s5k5ca_client = NULL;
+static struct s5k5ca_ctrl_t *s5k5ca_ctrl = NULL;
+static enum s5k5ca_reg_update_t last_rupdate = -1;
+static enum s5k5ca_setting_t last_rt = -1;
+int wb_current = CAMERA_WB_AUTO;
+int effect_current = CAMERA_EFFECT_OFF;
+static long s5k5ca_set_wb(int );
+static DECLARE_WAIT_QUEUE_HEAD(s5k5ca_wait_queue);
+DEFINE_MUTEX(s5k5ca_sem);
+
+static int s5k5ca_i2c_rxdata(unsigned short saddr,
+                             unsigned char *rxdata, int length)
+{
+    struct i2c_msg msgs[] =
+    {
+        {
+            .addr  = saddr,
+            .flags = 0,
+            .len = 2,
+            .buf = rxdata,
+        },
+        {
+            .addr  = saddr,
+            .flags = I2C_M_RD,
+            .len = length,
+            .buf = rxdata,
+        },
+    };
+
+    if (i2c_transfer(s5k5ca_client->adapter, msgs, 2) < 0)
+    {
+        CDBG("s5k5ca_i2c_rxdata failed!\n");
+        return -EIO;
+    }
+
+    return 0;
+}
+
+static int32_t s5k5ca_i2c_read_w(unsigned short raddr, unsigned short *rdata)
+{
+    int32_t rc = 0;
+    unsigned char buf[4];
+
+    if (!rdata)
+    {
+        return -EIO;
+    }
+
+    memset(buf, 0, sizeof(buf));
+
+    buf[0] = (raddr & 0xFF00) >> 8;
+    buf[1] = (raddr & 0x00FF);
+
+    rc = s5k5ca_i2c_rxdata(s5k5ca_client->addr, buf, 2);
+    if (rc < 0)
+    {
+        return rc;
+    }
+
+    *rdata = buf[0] << 8 | buf[1];
+
+    if (rc < 0)
+    {
+        CDBG("s5k5ca_i2c_read failed!\n");
+    }
+
+    return rc;
+}
+
+static int32_t s5k5ca_i2c_txdata(unsigned short saddr,
+                                 unsigned char *txdata, int length)
+{
+    int32_t i  = 0;
+    int32_t rc = -EFAULT;
+    struct i2c_msg msg[] =
+    {
+        {
+            .addr  = saddr,
+            .flags = 0,
+            .len = length,
+            .buf = txdata,
+        },
+    };
+
+    for (i = 0; i < 3; i++)
+    {
+        rc = i2c_transfer(s5k5ca_client->adapter, msg, 1);
+        if (0 <= rc)
+        {
+            return 0;
+        }
+    }
+
+    if (3 == i)
+    {
+        CDBG("s5k5ca_i2c_txdata faild\n");
+        return -EIO;
+    }
+
+    return 0;
+}
+
+static int32_t s5k5ca_i2c_write_w(unsigned short waddr, unsigned short wdata)
+{
+    int32_t rc = -EFAULT;
+    unsigned char buf[4];
+
+    memset(buf, 0, sizeof(buf));
+    buf[0] = (waddr & 0xFF00) >> 8;
+    buf[1] = (waddr & 0x00FF);
+    buf[2] = (wdata & 0xFF00) >> 8;
+    buf[3] = (wdata & 0x00FF);
+
+    rc = s5k5ca_i2c_txdata(s5k5ca_client->addr, buf, 4);
+
+    if (rc < 0)
+    {
+        CDBG("i2c_write_w failed, addr = 0x%x, val = 0x%x!\n",
+             waddr, wdata);
+    }
+
+    return rc;
+}
+
+static int32_t s5k5ca_i2c_write_w_table(struct s5k5ca_i2c_reg_conf const *reg_conf_tbl,
+                                        int                               num_of_items_in_table)
+{
+    int i;
+    int32_t rc = -EFAULT;
+
+    for (i = 0; i < num_of_items_in_table; i++)
+    {
+        rc = s5k5ca_i2c_write_w(reg_conf_tbl->waddr, reg_conf_tbl->wdata);
+        if (rc < 0)
+        {
+            break;
+        }
+
+        reg_conf_tbl++;
+    }
+
+    return rc;
+}
+
+int32_t s5k5ca_set_default_focus(uint8_t af_step)
+{
+    CDBG("s5k4cdgx_set_default_focus:\n");
+
+    return 0;
+}
+
+int32_t s5k5ca_set_fps(struct fps_cfg    *fps)
+{
+    /* input is new fps in Q8 format */
+    int32_t rc = 0;
+
+    CDBG("s5k5ca_set_fps\n");
+    return rc;
+}
+
+int32_t s5k5ca_write_exp_gain(uint16_t gain, uint32_t line)
+{
+    CDBG("s5k5ca_write_exp_gain\n");
+    return 0;
+}
+
+int32_t s5k5ca_set_pict_exp_gain(uint16_t gain, uint32_t line)
+{
+    int32_t rc = 0;
+
+    CDBG("s5k5ca_set_pict_exp_gain\n");
+
+    mdelay(10);
+
+    /* camera_timed_wait(snapshot_wait*exposure_ratio); */
+    return rc;
+}
+/* Mirror from kernel space */ 
+static int32_t s5k5ca_set_mirror_mode(void)
+{
+    int32_t rc = 0;
+
+    if (HW_MIRROR_AND_FLIP == get_hw_camera_mirror_type()) 
+    {
+        rc = s5k5ca_i2c_write_w_table(s5k5ca_regs.s5k5ca_mirror_mode_reg_config,
+                                     s5k5ca_regs.s5k5ca_mirror_mode_reg_config_size);
+    }
+
+    return rc;
+}
+int32_t s5k5ca_setting(enum s5k5ca_reg_update_t rupdate,
+                       enum s5k5ca_setting_t    rt)
+{
+    struct msm_camera_csi_params s5k5ca_csi_params;
+    int32_t rc = 0;
+
+    mutex_lock(&s5k5ca_sem);
+    if ((rupdate == last_rupdate) && (rt == last_rt))
+    {
+        CDBG("s5k5ca_setting exit\n");
+        mutex_unlock(&s5k5ca_sem);
+        return rc;
+    }
+
+    CDBG("s5k5ca_setting in rupdate=%d,rt=%d\n", rupdate, rt);
+    switch (rupdate)
+    {
+    case UPDATE_PERIODIC:
+
+        /*preview setting*/
+        if (rt == RES_PREVIEW)
+        {
+            CDBG("s5k5ca:  sensor: init preview reg.\n");
+            rc = s5k5ca_i2c_write_w_table(s5k5ca_regs.s5k5ca_preview_reg_config,
+                                          s5k5ca_regs.s5k5ca_preview_reg_config_size);
+            if (!CSI_CONFIG)
+            {
+                CDBG("s5k5ca: init CSI  config!\n");
+                msm_camio_vfe_clk_rate_set(192000000);
+                s5k5ca_csi_params.data_format = CSI_8BIT;
+                s5k5ca_csi_params.lane_cnt = 1;
+                s5k5ca_csi_params.lane_assign = 0xe4;
+                s5k5ca_csi_params.dpcm_scheme = 0;
+                s5k5ca_csi_params.settle_cnt = 0x18;
+                rc = msm_camio_csi_config(&s5k5ca_csi_params);
+                CSI_CONFIG = 1;
+            }
+        }
+        /*snapshot setting*/
+        else
+        {
+            CDBG("s5k5ca:  sensor: init snapshot reg.\n");
+            rc = s5k5ca_i2c_write_w_table(s5k5ca_regs.s5k5ca_snapshot_reg_config,
+                                          s5k5ca_regs.s5k5ca_snapshot_reg_config_size);
+        }
+
+        /*increase the delay after register writing*/
+        mdelay(50);
+        break;
+
+    case REG_INIT:
+
+        /*delete one line*/
+        CDBG("s5k5ca  model is %d : init sensor!\n", s5k5ca_model_id);
+
+        /* Write init sensor register */
+
+        rc = s5k5ca_i2c_write_w_table(s5k5ca_regs.s5k5ca_init_reg_sensor_start,
+                                      s5k5ca_regs.s5k5ca_init_reg_sensor_start_size);
+        mdelay(100);
+
+        rc = s5k5ca_i2c_write_w_table(p_s5k5ca_init_reg_config, reg_num);
+        /*add a 10ms delay between registers writing*/
+        mdelay(10);
+        rc = s5k5ca_i2c_write_w_table(s5k5ca_regs.s5k5ca_init_reg_config_sunny_2,  
+                                s5k5ca_regs.s5k5ca_init_reg_config_sunny_2_size);
+        //           mdelay(100);
+        CDBG("s5k5ca model is %d: init sensor done!\n", s5k5ca_model_id);
+        if(rc >= 0)
+        {
+            rc = s5k5ca_set_mirror_mode();
+        } 
+        break;
+
+    default:
+        rc = -EFAULT;
+        break;
+    } /* switch (rupdate) */
+    if (rc == 0)
+    {
+        last_rupdate = rupdate;
+        last_rt = rt;
+    }
+
+    mutex_unlock(&s5k5ca_sem);
+    return rc;
+}
+
+int32_t s5k5ca_video_config(int mode, int res)
+{
+    int32_t rc;
+
+    switch (res)
+    {
+    case QTR_SIZE:
+        rc = s5k5ca_setting(UPDATE_PERIODIC, RES_PREVIEW);
+        if (rc < 0)
+        {
+            return rc;
+        }
+
+        CDBG("sensor configuration done!\n");
+        break;
+
+    case FULL_SIZE:
+        rc = s5k5ca_setting(UPDATE_PERIODIC, RES_CAPTURE);
+        if (rc < 0)
+        {
+            return rc;
+        }
+
+        break;
+
+    default:
+        return 0;
+    } /* switch */
+
+    s5k5ca_ctrl->prev_res   = res;
+    s5k5ca_ctrl->curr_res   = res;
+    s5k5ca_ctrl->sensormode = mode;
+
+    return rc;
+}
+
+int32_t s5k5ca_snapshot_config(int mode)
+{
+    int32_t rc = 0;
+
+    CDBG("s5k5ca_snapshot_config in\n");
+    rc = s5k5ca_setting(UPDATE_PERIODIC, RES_CAPTURE);
+    /*delete one line*/
+    if (rc < 0)
+    {
+        return rc;
+    }
+
+    s5k5ca_ctrl->curr_res = s5k5ca_ctrl->pict_res;
+
+    s5k5ca_ctrl->sensormode = mode;
+
+    return rc;
+}
+
+int32_t s5k5ca_power_down(void)
+{
+    int32_t rc = 0;
+
+    mdelay(5);
+
+    return rc;
+}
+
+int32_t s5k5ca_move_focus(int direction, int32_t num_steps)
+{
+    return 0;
+}
+
+static int s5k5ca_sensor_init_done(const struct msm_camera_sensor_info *data)
+{
+    /* Set the sensor reset when camera is not initialization. */
+    if (false == s5k5ca_init_flag)
+    {
+        gpio_direction_output(data->sensor_reset, 0);
+        gpio_free(data->sensor_reset);
+    }
+
+    gpio_direction_output(s5k5ca_pwd, 1);
+    gpio_free(s5k5ca_pwd);
+
+    if (false == s5k5ca_init_flag)
+    {
+        /*disable the power*/
+        if (data->vreg_disable_func)
+        {
+            data->vreg_disable_func(0);
+        }
+    }
+
+    last_rupdate = -1;
+    last_rt = -1;
+    return 0;
+}
+
+static int s5k5ca_probe_init_sensor(const struct msm_camera_sensor_info *data)
+{
+    int rc;
+    unsigned short chipid;
+
+    /* pull down power down */
+    rc = gpio_request(s5k5ca_pwd, "s5k5ca");
+    if (!rc || (rc == -EBUSY))
+    {
+        gpio_direction_output(s5k5ca_pwd, 1);
+    }
+    else
+    {
+        goto init_probe_fail;
+    }
+
+    /* Set the sensor reset when camera is not initialization. */
+    if (false == s5k5ca_init_flag)
+    {
+        rc = gpio_request(data->sensor_reset, "s5k5ca");
+        if (!rc)
+        {
+            rc = gpio_direction_output(data->sensor_reset, 0);
+        }
+        else
+        {
+            goto init_probe_fail;
+        }
+        mdelay(10);
+        /*enable the power*/
+        if (data->vreg_enable_func)
+        {
+           data->vreg_enable_func(1);
+        } 
+    }
+
+    mdelay(20);
+
+    {
+        rc = gpio_direction_output(s5k5ca_pwd, 0);
+        if (rc < 0)
+        {
+            goto init_probe_fail;
+        }
+
+        mdelay(20);
+
+        /*hardware reset*/
+        /* Set the sensor reset when camera is not initialization. */
+        if (false == s5k5ca_init_flag)
+        {
+            rc = gpio_direction_output(data->sensor_reset, 1);
+            if (rc < 0)
+            {
+                goto init_probe_fail;
+            }
+        }
+
+        mdelay(20);
+    }
+
+    /* Set the soft reset to reset the chip and read the chip ID when camera is not initialization. */
+    if (false == s5k5ca_init_flag)
+    {
+        rc = s5k5ca_i2c_write_w(0x0010, 0x0001);
+        if (rc < 0)
+        {
+            CDBG("s5k5ca_i2c_write_w 0x0010 0x0001 rc=%d", rc);
+            goto init_probe_fail;
+        }
+
+        mdelay(10);
+
+        rc = s5k5ca_i2c_write_w(0x0010, 0x0000);
+        if (rc < 0)
+        {
+            CDBG("s5k5ca_i2c_write_w 0x0010 0x0000 rc=%d", rc);
+            goto init_probe_fail;
+        }
+
+        mdelay(10);
+
+        rc = s5k5ca_i2c_write_w(0x002c, 0x0000);
+        if (rc < 0)
+        {
+            CDBG("s5k5ca_i2c_write_w 0x002c 0x0000 rc=%d", rc);
+            goto init_probe_fail;
+        }
+
+        rc = s5k5ca_i2c_write_w(0x002e, 0x0040);
+        if (rc < 0)
+        {
+            CDBG("s5k5ca_i2c_write_w 0x002e 0x0040 rc=%d", rc);
+            goto init_probe_fail;
+        }
+
+        /* 3. Read sensor Model ID: */
+        rc = s5k5ca_i2c_read_w(0x0f12, &chipid);
+        if (rc < 0)
+        {
+            CDBG("s5k5ca_i2c_read_w Model_ID failed!! rc=%d", rc);
+            goto init_probe_fail;
+        }
+
+        CDBG("s5k5ca chipid = 0x%x\n", chipid);
+
+        /* 4. Compare sensor ID to S5K5CA ID: */
+        if (chipid != S5K5CA_CHIP_ID)
+        {
+            CDBG("s5k5ca Model_ID error!!");
+            rc = -ENODEV;
+            goto init_probe_fail;
+        }
+
+        {
+            /* Change the method of reading model id to fit socket and FPC packing models
+             * Socket model : 0--3
+             * FPC model : 8--11
+             */
+            rc = s5k5ca_i2c_write_w(0xFCFC, 0xD000);
+            if (rc < 0)
+            {
+                goto init_probe_fail;
+            }
+
+            rc = s5k5ca_i2c_write_w(0x108E, 0x3333);
+            if (rc < 0)
+            {
+                goto init_probe_fail;
+            }
+
+            mdelay(2);
+
+            rc = s5k5ca_i2c_write_w(0x1090, 0x8888);
+            if (rc < 0)
+            {
+                goto init_probe_fail;
+            }
+
+            rc = s5k5ca_i2c_read_w(0x100C, &s5k5ca_model_id);
+            if (rc < 0)
+            {
+                CDBG("s5k5ca_i2c_read_w 0x002e rc=%d", rc);
+            }
+
+            CDBG("s5k5ca model = 0x%x\n", s5k5ca_model_id);
+
+            /* If ID out of range ,set model_id MODEL_TRULY_FPC as default */
+            if (s5k5ca_model_id > MODEL_SUNNY)
+            {
+                s5k5ca_model_id = MODEL_SUNNY;
+            }
+
+            rc = s5k5ca_i2c_write_w(0x108E, 0x0000);
+            if (rc < 0)
+            {
+                goto init_probe_fail;
+            }
+
+            switch (s5k5ca_model_id)
+            {
+            case MODEL_TRULY:
+
+            case MODEL_SUNNY:
+                p_s5k5ca_init_reg_config = (struct s5k5ca_i2c_reg_conf *)(s5k5ca_regs.s5k5ca_init_reg_config_sunny);
+                reg_num = s5k5ca_regs.s5k5ca_init_reg_config_sunny_size;
+
+                //              strncpy((char *)data->sensor_name, "23060043SF-SAM-S", strlen("23060043SF-SAM-S"));
+                CDBG("s5k5ca probe is  MODEL_SUNNY.");
+                break;
+
+            default:
+                goto init_probe_fail;
+                CDBG("s5k5ca is no this sensor model.\n");
+                break;
+            }
+        }
+        CDBG("sensor name is %s.", data->sensor_name);
+    }
+
+    goto init_probe_done;
+
+init_probe_fail:
+    s5k5ca_sensor_init_done(data);
+init_probe_done:
+    return rc;
+}
+
+int s5k5ca_sensor_open_init(const struct msm_camera_sensor_info *data)
+{
+    int32_t rc;
+
+    s5k5ca_ctrl = kzalloc(sizeof(struct s5k5ca_ctrl_t), GFP_KERNEL);
+    if (!s5k5ca_ctrl)
+    {
+        CDBG("s5k5ca_sensor_open_init failed!\n");
+        rc = -ENOMEM;
+        goto init_done;
+    }
+
+    CDBG("s5k5ca_sensor_open_*****************!\n");
+    s5k5ca_ctrl->fps_divider = 1 * 0x00000400;
+    s5k5ca_ctrl->pict_fps_divider = 1 * 0x00000400;
+    s5k5ca_ctrl->set_test = TEST_OFF;
+    s5k5ca_ctrl->prev_res = QTR_SIZE;
+    s5k5ca_ctrl->pict_res = FULL_SIZE;
+
+    if (data)
+    {
+        s5k5ca_ctrl->sensordata = data;
+    }
+
+    /* enable mclk first */
+    msm_camio_clk_rate_set(S5K5CA_DEFAULT_CLOCK_RATE);
+    mdelay(20);
+
+    rc = s5k5ca_probe_init_sensor(data);
+    if (rc < 0)
+    {
+        CDBG("s5k5ca init failed!!!!!\n");
+        goto init_fail;
+    }
+    else
+    {
+        /*delete one line*/
+        CSI_CONFIG = 0;
+        CDBG("s5k5ca init succeed!!!!! rc = %d \n", rc);
+        goto init_done;
+    }
+
+    /* Don't write sensor init register at open camera. */
+
+init_fail:
+    kfree(s5k5ca_ctrl);
+init_done:
+    return rc;
+}
+
+int s5k5ca_init_client(struct i2c_client *client)
+{
+    /* Initialize the MSM_CAMI2C Chip */
+    init_waitqueue_head(&s5k5ca_wait_queue);
+    return 0;
+}
+
+int32_t s5k5ca_set_sensor_mode(int mode, int res)
+{
+    int32_t rc = 0;
+
+    switch (mode)
+    {
+    case SENSOR_PREVIEW_MODE:
+        CDBG("SENSOR_PREVIEW_MODE,res=%d\n", res);
+        rc = s5k5ca_video_config(mode, res);
+        break;
+
+    case SENSOR_SNAPSHOT_MODE:
+    case SENSOR_RAW_SNAPSHOT_MODE:
+        CDBG("SENSOR_SNAPSHOT_MODE\n");
+        rc = s5k5ca_snapshot_config(mode);
+        break;
+
+    default:
+        rc = -EINVAL;
+        break;
+    }
+
+    return rc;
+}
+
+static long s5k5ca_set_effect(int mode, int effect)
+{
+    struct s5k5ca_i2c_reg_conf const *reg_conf_tbl = NULL;
+    int num_of_items_in_table = 0;
+    long rc = 0;
+
+    CDBG("s5k5ca_set_effect effect= %d,  current = %d \n", effect, effect_current);
+    /*if the current effect is the value to be setted , return directly*/
+    if(effect_current == effect)
+    {
+        return rc ;
+    }
+    switch (effect)
+    {
+    case CAMERA_EFFECT_OFF:
+        reg_conf_tbl = s5k5ca_regs.s5k5ca_effect_off_reg_config;
+        num_of_items_in_table = s5k5ca_regs.s5k5ca_effect_off_reg_config_size;
+        break;
+
+    case CAMERA_EFFECT_MONO:
+        reg_conf_tbl = s5k5ca_regs.s5k5ca_effect_mono_reg_config;
+        num_of_items_in_table = s5k5ca_regs.s5k5ca_effect_mono_reg_config_size;
+        break;
+
+    case CAMERA_EFFECT_NEGATIVE:
+        reg_conf_tbl = s5k5ca_regs.s5k5ca_effect_negative_reg_config;
+        num_of_items_in_table = s5k5ca_regs.s5k5ca_effect_negative_reg_config_size;
+        break;
+
+    case CAMERA_EFFECT_SEPIA:
+        reg_conf_tbl = s5k5ca_regs.s5k5ca_effect_sepia_reg_config;
+        num_of_items_in_table = s5k5ca_regs.s5k5ca_effect_sepia_reg_config_size;
+        break;
+
+    case CAMERA_EFFECT_AQUA:
+        reg_conf_tbl = s5k5ca_regs.s5k5ca_effect_aqua_reg_config;
+        num_of_items_in_table = s5k5ca_regs.s5k5ca_effect_aqua_reg_config_size;
+        break;
+
+    /*the effect we need is solarize and posterize*/
+    case CAMERA_EFFECT_SOLARIZE:
+        reg_conf_tbl = s5k5ca_regs.s5k5ca_effect_solarize_reg_config;
+        num_of_items_in_table = s5k5ca_regs.s5k5ca_effect_solarize_reg_config_size;
+        break;
+
+    case CAMERA_EFFECT_POSTERIZE:
+        reg_conf_tbl = s5k5ca_regs.s5k5ca_effect_posterize_reg_config;
+        num_of_items_in_table = s5k5ca_regs.s5k5ca_effect_posterize_reg_config_size;
+        break;
+
+    default:
+        return 0;
+    }
+    rc = s5k5ca_i2c_write_w_table(reg_conf_tbl, num_of_items_in_table);
+    /*when effect is to set auto, wb should be setted to menu value*/
+    if((CAMERA_EFFECT_OFF == effect) && (CAMERA_WB_AUTO != wb_current))
+    {
+        s5k5ca_set_wb(wb_current);
+    }
+    effect_current = effect ;
+
+    return rc;
+}
+
+static long s5k5ca_set_wb(int wb)
+{
+    struct s5k5ca_i2c_reg_conf const *reg_conf_tbl = NULL;
+    int num_of_items_in_table = 0;
+    long rc = 0;
+
+    CDBG("s5k5ca_set_wb FF wb:%d", wb);
+    switch (wb)
+    {
+    case CAMERA_WB_AUTO:
+        reg_conf_tbl = s5k5ca_regs.s5k5ca_wb_auto_reg_config;
+        num_of_items_in_table = s5k5ca_regs.s5k5ca_wb_auto_reg_config_size;
+        break;
+
+    case CAMERA_WB_INCANDESCENT:
+        reg_conf_tbl = s5k5ca_regs.s5k5ca_wb_a_reg_config;
+        num_of_items_in_table = s5k5ca_regs.s5k5ca_wb_a_reg_config_size;
+        break;
+
+    case CAMERA_WB_CUSTOM:
+        reg_conf_tbl = s5k5ca_regs.s5k5ca_wb_f_reg_config;
+        num_of_items_in_table = s5k5ca_regs.s5k5ca_wb_f_reg_config_size;
+        break;
+    case CAMERA_WB_FLUORESCENT:
+        reg_conf_tbl = s5k5ca_regs.s5k5ca_wb_tl84_reg_config;
+        num_of_items_in_table = s5k5ca_regs.s5k5ca_wb_tl84_reg_config_size;
+        break;
+
+    case CAMERA_WB_DAYLIGHT:
+        reg_conf_tbl = s5k5ca_regs.s5k5ca_wb_d65_reg_config;
+        num_of_items_in_table = s5k5ca_regs.s5k5ca_wb_d65_reg_config_size;
+        break;
+
+    case CAMERA_WB_CLOUDY_DAYLIGHT:
+        reg_conf_tbl = s5k5ca_regs.s5k5ca_wb_d50_reg_config;
+        num_of_items_in_table = s5k5ca_regs.s5k5ca_wb_d50_reg_config_size;
+        break;
+
+    case CAMERA_WB_TWILIGHT:
+        return 0;
+        break;
+
+    case CAMERA_WB_SHADE:
+        return 0;
+        break;
+
+    default:
+        return 0;
+    }
+    rc = s5k5ca_i2c_write_w_table(reg_conf_tbl, num_of_items_in_table);
+    wb_current = wb;
+    return rc;
+}
+/*delete some lines*/
+
+int s5k5ca_sensor_config(void __user *argp)
+{
+    struct sensor_cfg_data cdata;
+    long rc = 0;
+
+    if (copy_from_user(&cdata,
+                       (void *)argp,
+                       sizeof(struct sensor_cfg_data)))
+    {
+        return -EFAULT;
+    }
+
+    CDBG("s5k5ca_sensor_config: cfgtype = %d\n",
+         cdata.cfgtype);
+    switch (cdata.cfgtype)
+    {
+    case CFG_GET_PICT_FPS:
+        break;
+
+    case CFG_GET_PREV_L_PF:
+        break;
+
+    case CFG_GET_PREV_P_PL:
+        break;
+
+    case CFG_GET_PICT_L_PF:
+        break;
+
+    case CFG_GET_PICT_P_PL:
+        break;
+
+    case CFG_GET_PICT_MAX_EXP_LC:
+        break;
+
+    case CFG_SET_FPS:
+    case CFG_SET_PICT_FPS:
+        rc = s5k5ca_set_fps(&(cdata.cfg.fps));
+        break;
+
+    case CFG_SET_EXP_GAIN:
+        rc =
+            s5k5ca_write_exp_gain(
+            cdata.cfg.exp_gain.gain,
+            cdata.cfg.exp_gain.line);
+        break;
+
+    case CFG_SET_PICT_EXP_GAIN:
+        rc =
+            s5k5ca_set_pict_exp_gain(
+            cdata.cfg.exp_gain.gain,
+            cdata.cfg.exp_gain.line);
+        break;
+
+    case CFG_SET_MODE:
+        rc = s5k5ca_set_sensor_mode(cdata.mode,
+                                    cdata.rs);
+        break;
+
+    case CFG_PWR_DOWN:
+        rc = s5k5ca_power_down();
+        break;
+
+    case CFG_MOVE_FOCUS:
+        rc =
+            s5k5ca_move_focus(
+            cdata.cfg.focus.dir,
+            cdata.cfg.focus.steps);
+        break;
+
+    case CFG_SET_DEFAULT_FOCUS:
+        rc =
+            s5k5ca_set_default_focus(
+            cdata.cfg.focus.steps);
+        break;
+    case CFG_SET_EFFECT:
+        rc = s5k5ca_set_effect(cdata.mode,
+                               cdata.cfg.effect);
+        break;
+
+    case CFG_SET_WB:
+        rc = s5k5ca_set_wb(cdata.cfg.effect);
+        break;
+
+    case CFG_SET_ANTIBANDING:
+        /*delete antibanding handling*/
+        break;
+
+    case CFG_MAX:
+
+        break;
+
+    default:
+        rc = -EFAULT;
+        break;
+    }
+
+    return rc;
+}
+
+int s5k5ca_sensor_release(void)
+{
+    int rc = -EBADF;
+
+    mutex_lock(&s5k5ca_sem);
+
+    s5k5ca_power_down();
+
+    s5k5ca_sensor_init_done(s5k5ca_ctrl->sensordata);
+
+    msleep(150);
+    kfree(s5k5ca_ctrl);
+
+    mutex_unlock(&s5k5ca_sem);
+    CDBG("s5k5ca_release completed!\n");
+    return rc;
+}
+
+static int s5k5ca_i2c_probe(struct i2c_client *         client,
+                            const struct i2c_device_id *id)
+{
+    int rc = 0;
+
+    if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
+    {
+        rc = -ENOTSUPP;
+        goto probe_failure;
+    }
+
+    s5k5casensorw =
+        kzalloc(sizeof(struct s5k5ca_work_t), GFP_KERNEL);
+
+    if (!s5k5casensorw)
+    {
+        rc = -ENOMEM;
+        goto probe_failure;
+    }
+
+    i2c_set_clientdata(client, s5k5casensorw);
+    s5k5ca_init_client(client);
+    s5k5ca_client = client;
+
+    //s5k5ca_client->addr = s5k5ca_client->addr >> 1;
+    mdelay(50);
+
+    CDBG("i2c probe ok\n");
+    return 0;
+
+probe_failure:
+    kfree(s5k5casensorw);
+    s5k5casensorw = NULL;
+    pr_err("i2c probe failure %d\n", rc);
+    return rc;
+}
+
+static const struct i2c_device_id s5k5ca_i2c_id[] =
+{
+    { "s5k5ca", 0},
+    { }
+};
+
+static struct i2c_driver s5k5ca_i2c_driver =
+{
+    .id_table = s5k5ca_i2c_id,
+    .probe    = s5k5ca_i2c_probe,
+    .remove   = __exit_p(s5k5ca_i2c_remove),
+    .driver   = {
+        .name = "s5k5ca",
+    },
+};
+
+static int s5k5ca_sensor_probe(const struct msm_camera_sensor_info *info,
+                               struct msm_sensor_ctrl *             s)
+{
+    /* We expect this driver to match with the i2c device registered
+     * in the board file immediately. */
+    int rc = i2c_add_driver(&s5k5ca_i2c_driver);
+
+    if ((rc < 0) || (s5k5ca_client == NULL))
+    {
+        rc = -ENOTSUPP;
+        goto probe_done;
+    }
+
+    /* enable mclk first */
+    msm_camio_clk_rate_set(S5K5CA_DEFAULT_CLOCK_RATE);
+    mdelay(20);
+
+    /*camera shutdown is GPIO32 for M660*/
+    if(machine_is_msm7x27a_M660())
+    {
+        s5k5ca_pwd = M660_SENSOR_PWD;
+    }
+    rc = s5k5ca_probe_init_sensor(info);
+    if (rc < 0)
+    {
+        CDBG("s5k5ca probe failed!!!!\n");
+        i2c_del_driver(&s5k5ca_i2c_driver);
+        goto probe_done;
+    }
+    else
+    {
+        /*s5k5ca probe succeed, use the func to sign power should always on*/
+        info->set_s5k5ca_is_on(S5K5CA_IS_ON);
+        CDBG("s5k5ca probe succeed!!!!\n");
+    }
+    /*initialize the registers to save the time of open camera*/
+    rc = s5k5ca_setting(REG_INIT, RES_PREVIEW);
+    if (rc < 0) 
+    {
+        CDBG("s5k5ca init sensor failed!!!!\n");
+        i2c_del_driver(&s5k5ca_i2c_driver);
+        goto probe_done;
+    }
+    else
+    {
+        /*we use the variable to sign reset should't be set any more*/
+        s5k5ca_init_flag = true;
+        CDBG("s5k5ca init sensor succeed!!!!\n");
+    }
+
+#ifdef CONFIG_HUAWEI_HW_DEV_DCT
+    /* detect current device successful, set the flag as present */
+    set_hw_dev_flag(DEV_I2C_CAMERA_MAIN);
+#endif
+
+    s->s_init = s5k5ca_sensor_open_init;
+    s->s_release = s5k5ca_sensor_release;
+    s->s_config = s5k5ca_sensor_config;
+    /*set the s_mount_angle value of sensor*/
+    s->s_mount_angle = info->sensor_platform_info->mount_angle;
+    s5k5ca_sensor_init_done(info);
+
+    /* For go to sleep mode, follow the datasheet */
+    msleep(150);
+    set_camera_support(true);
+probe_done:
+    return rc;
+}
+
+static int __s5k5ca_probe(struct platform_device *pdev)
+{
+    return msm_camera_drv_start(pdev, s5k5ca_sensor_probe);
+}
+
+static struct platform_driver msm_camera_driver =
+{
+    .probe     = __s5k5ca_probe,
+    .driver    = {
+        .name  = "msm_camera_s5k5ca",
+        .owner = THIS_MODULE,
+    },
+};
+
+static int __init s5k5ca_init(void)
+{
+    return platform_driver_register(&msm_camera_driver);
+}
+
+module_init(s5k5ca_init);
+
diff -uNra linux-3.0.82/drivers/media/video/s5k5ca.h linux-3.0.82x/drivers/media/video/s5k5ca.h
--- linux-3.0.82/drivers/media/video/s5k5ca.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/s5k5ca.h	2017-09-23 03:42:49.598676347 +0800
@@ -0,0 +1,5403 @@
+
+#ifndef _SAMSUNG_SXGA_H_
+#define _SAMSUNG_SXGA_H_
+
+/*******************************************************************************************
+ #  Display resolution standards #
+
+	QCIF: 176 x 144
+	CIF: 352 x 288
+	QVGA: 320 x 240
+	VGA: 640 x 480 
+	SVGA: 800 x 600 
+	XGA: 1024 x 768 
+	WXGA: 1280 x 800 
+	QVGA: 1280 x 960 
+	SXGA: 1280 x 1024 
+	SXGA+: 1400 x 1050 
+	WSXGA+: 1680 x 1050 
+	UXGA: 1600 x 1200 
+	WUXGA: 1920 x 1200 
+	QXGA: 2048 x 1536
+********************************************************************************************/
+
+//#include "../bits.h"
+
+/* Camera information 
+ * FPC Label : Samsung MEGA Pixel Camera : V4220 REV06 
+ * Modified by charles -Initial function of '3AA' test routine
+ * Modified and tested by YongHwui.Kim <yonghwui.kim@samsung.com> for S5K3AAEX Camera
+ */
+                                                                                
+#define CHIP_DELAY 0xFF
+                                                                                
+typedef struct samsung_t{
+        unsigned short page;	
+        unsigned short subaddr;
+        unsigned short value;
+
+} s5k5ca_t;
+
+// mihee 080508 start
+typedef struct samsung_short_t{
+        unsigned short subaddr;
+        unsigned short value;
+ //       unsigned short page;
+} s5k5ca_short_t;
+// mihee 080508 end
+
+typedef struct exif_data_st{
+        unsigned short exposureTime;
+		unsigned short lux;
+		unsigned short iso;
+} exif_data_t;
+
+#ifdef CONFIG_CPU_S3C24A0A
+#define TRY_HIGH_CLOCK 1
+#endif
+
+				//***************************************************
+				//  name: 	S5K3AAEX EVT2 setfile
+				//  ver:		v2.61	
+				//  history: 	
+				//	v0.0	start from 040908 setfile
+				//	v1.0	arange register
+				//	v1.01	change MCLK(25Mhz) and Frame rate(7fps)
+				//	v2.0	adjust register setting for 3AA EVT2
+				//		- color correction, RGB shding off, hsync start position, Mirror, fps
+				//		- Color Tuning, YGRPDLY 
+				//	v2.1	change Frame rate(7.5fps) and Total gain to x4 
+				//		(because of reducing visual noise at low illumination)
+				//		- change BPRM AGC Max and FrameAE start 
+				//		improve AE speed
+				//	v2.2	modify AWB G gain and solve 50hz flicker detection fail in 25MHz 7.5fps
+				//	v2.3	Adjust gamma, Dark Slice, white point, Hue gain,
+				//		White Balance B control, Y gain On, Digital Clamp On
+				//		lower AWB G gain
+				//	v2.4	Adjust AE window weight, Y Gamma, WhitePoint, Shading and BPR Max Thres.
+				// 	v2.41	Adjust AE/AWB window and AWB internal window boundary to decrease skin color tracking
+				// 	v2.411	special version for PSCDS
+				// 	v2.412	RGB shading off
+				//	v2.5	Lens change STW to Sekonix 
+				//		adjust White point and Y shading Coef (RGB shading off)
+				//	v2.6	New Tuning because of Full YC off and YCbCr Coef change
+				//		Gamma, Dark Slice, color matrix (not use), Color suppress
+				//		R Gain and DBPR agc MIN/MAX
+				//	v2.61	VCK inversion(data rising)
+				//***************************************************
+				///////////////////////////////////////////////////
+
+//#if defined(CONFIG_VIDEO_SAMSUNG_S5K5CA)
+s5k5ca_short_t s5k5ca_preview_00[] = 
+{
+{ 0xFCFC, 0xD000  },                                                                                  
+{ 0x0028, 0x7000  }, 
+                  
+{ 0x002A, 0x07E6  },                                                            
+{ 0x0F12, 0x0000  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow 
+{ 0x0F12, 0x0000  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+                  
+{ 0x002A, 0x0838  },
+{ 0x0F12, 0x003C  },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x0908  },
+{ 0x0F12, 0x0046  },	//TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]
+
+//HIGHLUX RECOVER Value
+{ 0x002a, 0x0B2C  },
+{ 0x0F12, 0x003C  },	//70000B2C //TVAR_afit_pBaseValS[436] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x0050  },	//70000B2E //TVAR_afit_pBaseValS[437] /AFIT16_YUV422_DENOISE_iUVHighThresh  
+
+{ 0x002a, 0x0B50  },
+{ 0x0F12, 0x012D  },	//70000B50 //TVAR_afit_pBaseValS[454] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8] 
+
+{ 0x002a, 0x0B84  },
+{ 0x0F12, 0x210C  },	//70000B84 //TVAR_afit_pBaseValS[480] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]   
+
+
+{ 0x002A, 0x035C  }, //Capture Mode//
+{ 0x0F12, 0x0000  },
+{ 0x002A, 0x0388  }, //Capture Mode//
+{ 0x0F12, 0x0000  },
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },   
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+s5k5ca_short_t s5k5ca_init_00[] = 
+{
+{ 0xFCFC, 0xD000  },
+
+//************************************//
+////****************************************/																															//
+////Ver 0.1 New Analog Settings for 5CA EVT0 30FPS in Binning, including latest TnP for EVT1              //
+////20091310 - added analog settings for 430LSB, long exposure mode only. Settings are for 32MHz Sys. CLK //
+////20091102 - added all calibration data, final settings for STW EVT1 module, SCLK 32MHz, PCLK 60 MHz.   //
+////20091104 - Changed the shading alpha &Near off                                                        //
+////20091104 - Changed awbb_GridEnable from 0001h to 0002h	//awbb_GridEnable                             //
+////aetarget41-46, gamma change for improving contrast                                                    //
+////20100113 - New TnP updated//
+
+{ 0xFCFC, 0xD000  },	//Reset                                  //
+{ 0x0010, 0x0001  },   //Clear host interrupt so main will wait //
+{ 0x1030, 0x0000  },   //ARM go                                 //
+{ 0x0014, 0x0001  },   //Wait100mSec
+                  
+{ 0xdddd, 0x0064  }, //delay 100ms
+                  
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x2CF8  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0x4827  },
+{ 0x0F12, 0x21C0  },
+{ 0x0F12, 0x8041  },
+{ 0x0F12, 0x4825  },
+{ 0x0F12, 0x4A26  },
+{ 0x0F12, 0x3020  },
+{ 0x0F12, 0x8382  },
+{ 0x0F12, 0x1D12  },
+{ 0x0F12, 0x83C2  },
+{ 0x0F12, 0x4822  },
+{ 0x0F12, 0x3040  },
+{ 0x0F12, 0x8041  },
+{ 0x0F12, 0x4821  },
+{ 0x0F12, 0x4922  },
+{ 0x0F12, 0x3060  },
+{ 0x0F12, 0x8381  },
+{ 0x0F12, 0x1D09  },
+{ 0x0F12, 0x83C1  },
+{ 0x0F12, 0x4821  },
+{ 0x0F12, 0x491D  },
+{ 0x0F12, 0x8802  },
+{ 0x0F12, 0x3980  },
+{ 0x0F12, 0x804A  },
+{ 0x0F12, 0x8842  },
+{ 0x0F12, 0x808A  },
+{ 0x0F12, 0x8882  },
+{ 0x0F12, 0x80CA  },
+{ 0x0F12, 0x88C2  },
+{ 0x0F12, 0x810A  },
+{ 0x0F12, 0x8902  },
+{ 0x0F12, 0x491C  },
+{ 0x0F12, 0x80CA  },
+{ 0x0F12, 0x8942  },
+{ 0x0F12, 0x814A  },
+{ 0x0F12, 0x8982  },
+{ 0x0F12, 0x830A  },
+{ 0x0F12, 0x89C2  },
+{ 0x0F12, 0x834A  },
+{ 0x0F12, 0x8A00  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x8188  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x4819  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xFA0E  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x4819  },
+{ 0x0F12, 0x6341  },
+{ 0x0F12, 0x4919  },
+{ 0x0F12, 0x4819  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xFA07  },
+{ 0x0F12, 0x4816  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x3840  },
+{ 0x0F12, 0x62C1  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x3880  },
+{ 0x0F12, 0x63C1  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x6301  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x3040  },
+{ 0x0F12, 0x6181  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x4817  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9F7  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x4817  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9F3  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x4817  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9EF  },
+{ 0x0F12, 0xBC10  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0x1100  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x267C  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x2CE8  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x3274  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xF400  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0xF520  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2DF1  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x89A9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x2E43  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x0140  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2E7D  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xB4F7  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x2F07  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2F2B  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2FD1  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2FE5  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2FB9  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x013D  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x306B  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x5823  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x30B9  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xD789  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0xB570  },
+{ 0x0F12, 0x6804  },
+{ 0x0F12, 0x6845  },
+{ 0x0F12, 0x6881  },
+{ 0x0F12, 0x6840  },
+{ 0x0F12, 0x2900  },
+{ 0x0F12, 0x6880  },
+{ 0x0F12, 0xD007  },
+{ 0x0F12, 0x49C3  },
+{ 0x0F12, 0x8949  },
+{ 0x0F12, 0x084A  },
+{ 0x0F12, 0x1880  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9BA  },
+{ 0x0F12, 0x80A0  },
+{ 0x0F12, 0xE000  },
+{ 0x0F12, 0x80A0  },
+{ 0x0F12, 0x88A0  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD010  },
+{ 0x0F12, 0x68A9  },
+{ 0x0F12, 0x6828  },
+{ 0x0F12, 0x084A  },
+{ 0x0F12, 0x1880  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9AE  },
+{ 0x0F12, 0x8020  },
+{ 0x0F12, 0x1D2D  },
+{ 0x0F12, 0xCD03  },
+{ 0x0F12, 0x084A  },
+{ 0x0F12, 0x1880  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9A7  },
+{ 0x0F12, 0x8060  },
+{ 0x0F12, 0xBC70  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0x2000  },
+{ 0x0F12, 0x8060  },
+{ 0x0F12, 0x8020  },
+{ 0x0F12, 0xE7F8  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9A2  },
+{ 0x0F12, 0x48B2  },
+{ 0x0F12, 0x8A40  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD00C  },
+{ 0x0F12, 0x48B1  },
+{ 0x0F12, 0x49B2  },
+{ 0x0F12, 0x8800  },
+{ 0x0F12, 0x4AB2  },
+{ 0x0F12, 0x2805  },
+{ 0x0F12, 0xD003  },
+{ 0x0F12, 0x4BB1  },
+{ 0x0F12, 0x795B  },
+{ 0x0F12, 0x2B00  },
+{ 0x0F12, 0xD005  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0x8008  },
+{ 0x0F12, 0x8010  },
+{ 0x0F12, 0xBC10  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD1FA  },
+{ 0x0F12, 0x2000  },
+{ 0x0F12, 0x8008  },
+{ 0x0F12, 0x8010  },
+{ 0x0F12, 0xE7F6  },
+{ 0x0F12, 0xB5F8  },
+{ 0x0F12, 0x2407  },
+{ 0x0F12, 0x2C06  },
+{ 0x0F12, 0xD035  },
+{ 0x0F12, 0x2C07  },
+{ 0x0F12, 0xD033  },
+{ 0x0F12, 0x48A3  },
+{ 0x0F12, 0x8BC1  },
+{ 0x0F12, 0x2900  },
+{ 0x0F12, 0xD02A  },
+{ 0x0F12, 0x00A2  },
+{ 0x0F12, 0x1815  },
+{ 0x0F12, 0x4AA4  },
+{ 0x0F12, 0x6DEE  },
+{ 0x0F12, 0x8A92  },
+{ 0x0F12, 0x4296  },
+{ 0x0F12, 0xD923  },
+{ 0x0F12, 0x0028  },
+{ 0x0F12, 0x3080  },
+{ 0x0F12, 0x0007  },
+{ 0x0F12, 0x69C0  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF96B  },
+{ 0x0F12, 0x1C71  },
+{ 0x0F12, 0x0280  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF967  },
+{ 0x0F12, 0x0006  },
+{ 0x0F12, 0x4898  },
+{ 0x0F12, 0x0061  },
+{ 0x0F12, 0x1808  },
+{ 0x0F12, 0x8D80  },
+{ 0x0F12, 0x0A01  },
+{ 0x0F12, 0x0600  },
+{ 0x0F12, 0x0E00  },
+{ 0x0F12, 0x1A08  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF96A  },
+{ 0x0F12, 0x0002  },
+{ 0x0F12, 0x6DE9  },
+{ 0x0F12, 0x6FE8  },
+{ 0x0F12, 0x1A08  },
+{ 0x0F12, 0x4351  },
+{ 0x0F12, 0x0300  },
+{ 0x0F12, 0x1C49  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF953  },
+{ 0x0F12, 0x0401  },
+{ 0x0F12, 0x0430  },
+{ 0x0F12, 0x0C00  },
+{ 0x0F12, 0x4301  },
+{ 0x0F12, 0x61F9  },
+{ 0x0F12, 0xE004  },
+{ 0x0F12, 0x00A2  },
+{ 0x0F12, 0x4990  },
+{ 0x0F12, 0x1810  },
+{ 0x0F12, 0x3080  },
+{ 0x0F12, 0x61C1  },
+{ 0x0F12, 0x1E64  },
+{ 0x0F12, 0xD2C5  },
+{ 0x0F12, 0x2006  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF959  },
+{ 0x0F12, 0x2007  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF956  },
+{ 0x0F12, 0xBCF8  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF958  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD00A  },
+{ 0x0F12, 0x4881  },
+{ 0x0F12, 0x8B81  },
+{ 0x0F12, 0x0089  },
+{ 0x0F12, 0x1808  },
+{ 0x0F12, 0x6DC1  },
+{ 0x0F12, 0x4883  },
+{ 0x0F12, 0x8A80  },
+{ 0x0F12, 0x4281  },
+{ 0x0F12, 0xD901  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0xE7A1  },
+{ 0x0F12, 0x2000  },
+{ 0x0F12, 0xE79F  },
+{ 0x0F12, 0xB5F8  },
+{ 0x0F12, 0x0004  },
+{ 0x0F12, 0x4F80  },
+{ 0x0F12, 0x227D  },
+{ 0x0F12, 0x8938  },
+{ 0x0F12, 0x0152  },
+{ 0x0F12, 0x4342  },
+{ 0x0F12, 0x487E  },
+{ 0x0F12, 0x9000  },
+{ 0x0F12, 0x8A01  },
+{ 0x0F12, 0x0848  },
+{ 0x0F12, 0x1810  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91D  },
+{ 0x0F12, 0x210F  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF940  },
+{ 0x0F12, 0x497A  },
+{ 0x0F12, 0x8C49  },
+{ 0x0F12, 0x090E  },
+{ 0x0F12, 0x0136  },
+{ 0x0F12, 0x4306  },
+{ 0x0F12, 0x4979  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0xD003  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0x0240  },
+{ 0x0F12, 0x4330  },
+{ 0x0F12, 0x8108  },
+{ 0x0F12, 0x4876  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0x8D00  },
+{ 0x0F12, 0xD001  },
+{ 0x0F12, 0x2501  },
+{ 0x0F12, 0xE000  },
+{ 0x0F12, 0x2500  },
+{ 0x0F12, 0x4972  },
+{ 0x0F12, 0x4328  },
+{ 0x0F12, 0x8008  },
+{ 0x0F12, 0x207D  },
+{ 0x0F12, 0x00C0  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF92E  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0x496E  },
+{ 0x0F12, 0x0328  },
+{ 0x0F12, 0x4330  },
+{ 0x0F12, 0x8108  },
+{ 0x0F12, 0x88F8  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0x01AA  },
+{ 0x0F12, 0x4310  },
+{ 0x0F12, 0x8088  },
+{ 0x0F12, 0x9800  },
+{ 0x0F12, 0x8A01  },
+{ 0x0F12, 0x486A  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8F1  },
+{ 0x0F12, 0x496A  },
+{ 0x0F12, 0x8809  },
+{ 0x0F12, 0x4348  },
+{ 0x0F12, 0x0400  },
+{ 0x0F12, 0x0C00  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF918  },
+{ 0x0F12, 0x0020  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91D  },
+{ 0x0F12, 0x4866  },
+{ 0x0F12, 0x7004  },
+{ 0x0F12, 0xE7A3  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0x0004  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91E  },
+{ 0x0F12, 0x6020  },
+{ 0x0F12, 0x4963  },
+{ 0x0F12, 0x8B49  },
+{ 0x0F12, 0x0789  },
+{ 0x0F12, 0xD001  },
+{ 0x0F12, 0x0040  },
+{ 0x0F12, 0x6020  },
+{ 0x0F12, 0xE74C  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91B  },
+{ 0x0F12, 0x485F  },
+{ 0x0F12, 0x8880  },
+{ 0x0F12, 0x0601  },
+{ 0x0F12, 0x4854  },
+{ 0x0F12, 0x1609  },
+{ 0x0F12, 0x8141  },
+{ 0x0F12, 0xE742  },
+{ 0x0F12, 0xB5F8  },
+{ 0x0F12, 0x000F  },
+{ 0x0F12, 0x4C55  },
+{ 0x0F12, 0x3420  },
+{ 0x0F12, 0x2500  },
+{ 0x0F12, 0x5765  },
+{ 0x0F12, 0x0039  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF913  },
+{ 0x0F12, 0x9000  },
+{ 0x0F12, 0x2600  },
+{ 0x0F12, 0x57A6  },
+{ 0x0F12, 0x4C4C  },
+{ 0x0F12, 0x42AE  },
+{ 0x0F12, 0xD01B  },
+{ 0x0F12, 0x4D54  },
+{ 0x0F12, 0x8AE8  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD013  },
+{ 0x0F12, 0x484D  },
+{ 0x0F12, 0x8A01  },
+{ 0x0F12, 0x8B80  },
+{ 0x0F12, 0x4378  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8B5  },
+{ 0x0F12, 0x89A9  },
+{ 0x0F12, 0x1A41  },
+{ 0x0F12, 0x484E  },
+{ 0x0F12, 0x3820  },
+{ 0x0F12, 0x8AC0  },
+{ 0x0F12, 0x4348  },
+{ 0x0F12, 0x17C1  },
+{ 0x0F12, 0x0D89  },
+{ 0x0F12, 0x1808  },
+{ 0x0F12, 0x1280  },
+{ 0x0F12, 0x8961  },
+{ 0x0F12, 0x1A08  },
+{ 0x0F12, 0x8160  },
+{ 0x0F12, 0xE003  },
+{ 0x0F12, 0x88A8  },
+{ 0x0F12, 0x0600  },
+{ 0x0F12, 0x1600  },
+{ 0x0F12, 0x8160  },
+{ 0x0F12, 0x200A  },
+{ 0x0F12, 0x5E20  },
+{ 0x0F12, 0x42B0  },
+{ 0x0F12, 0xD011  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8AB  },
+{ 0x0F12, 0x1D40  },
+{ 0x0F12, 0x00C3  },
+{ 0x0F12, 0x1A18  },
+{ 0x0F12, 0x214B  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF897  },
+{ 0x0F12, 0x211F  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8BA  },
+{ 0x0F12, 0x210A  },
+{ 0x0F12, 0x5E61  },
+{ 0x0F12, 0x0FC9  },
+{ 0x0F12, 0x0149  },
+{ 0x0F12, 0x4301  },
+{ 0x0F12, 0x483D  },
+{ 0x0F12, 0x81C1  },
+{ 0x0F12, 0x9800  },
+{ 0x0F12, 0xE74A  },
+{ 0x0F12, 0xB5F1  },
+{ 0x0F12, 0xB082  },
+{ 0x0F12, 0x2500  },
+{ 0x0F12, 0x483A  },
+{ 0x0F12, 0x9001  },
+{ 0x0F12, 0x2400  },
+{ 0x0F12, 0x2028  },
+{ 0x0F12, 0x4368  },
+{ 0x0F12, 0x4A39  },
+{ 0x0F12, 0x4925  },
+{ 0x0F12, 0x1887  },
+{ 0x0F12, 0x1840  },
+{ 0x0F12, 0x9000  },
+{ 0x0F12, 0x9800  },
+{ 0x0F12, 0x0066  },
+{ 0x0F12, 0x9A01  },
+{ 0x0F12, 0x1980  },
+{ 0x0F12, 0x218C  },
+{ 0x0F12, 0x5A09  },
+{ 0x0F12, 0x8A80  },
+{ 0x0F12, 0x8812  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8CA  },
+{ 0x0F12, 0x53B8  },
+{ 0x0F12, 0x1C64  },
+{ 0x0F12, 0x2C14  },
+{ 0x0F12, 0xDBF1  },
+{ 0x0F12, 0x1C6D  },
+{ 0x0F12, 0x2D03  },
+{ 0x0F12, 0xDBE6  },
+{ 0x0F12, 0x9802  },
+{ 0x0F12, 0x6800  },
+{ 0x0F12, 0x0600  },
+{ 0x0F12, 0x0E00  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8C5  },
+{ 0x0F12, 0xBCFE  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0xB570  },
+{ 0x0F12, 0x6805  },
+{ 0x0F12, 0x2404  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8C5  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD103  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8C9  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2400  },
+{ 0x0F12, 0x3540  },
+{ 0x0F12, 0x88E8  },
+{ 0x0F12, 0x0500  },
+{ 0x0F12, 0xD403  },
+{ 0x0F12, 0x4822  },
+{ 0x0F12, 0x89C0  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD002  },
+{ 0x0F12, 0x2008  },
+{ 0x0F12, 0x4304  },
+{ 0x0F12, 0xE001  },
+{ 0x0F12, 0x2010  },
+{ 0x0F12, 0x4304  },
+{ 0x0F12, 0x481F  },
+{ 0x0F12, 0x8B80  },
+{ 0x0F12, 0x0700  },
+{ 0x0F12, 0x0F81  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0x2900  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x4304  },
+{ 0x0F12, 0x491C  },
+{ 0x0F12, 0x8B0A  },
+{ 0x0F12, 0x42A2  },
+{ 0x0F12, 0xD004  },
+{ 0x0F12, 0x0762  },
+{ 0x0F12, 0xD502  },
+{ 0x0F12, 0x4A19  },
+{ 0x0F12, 0x3220  },
+{ 0x0F12, 0x8110  },
+{ 0x0F12, 0x830C  },
+{ 0x0F12, 0xE691  },
+{ 0x0F12, 0x0C3C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x3274  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x26E8  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x6100  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x6500  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x1A7C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1120  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xFFFF  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x3374  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1D6C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x167C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xF400  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2C2C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x40A0  },
+{ 0x0F12, 0x00DD  },
+{ 0x0F12, 0xF520  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2C29  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1A54  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1564  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xF2A0  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2440  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x05A0  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2894  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1224  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xB000  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x1A3F  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xF004  },
+{ 0x0F12, 0xE51F  },
+{ 0x0F12, 0x1F48  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x24BD  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x36DD  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xB4CF  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xB5D7  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x36ED  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xF53F  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xF5D9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x013D  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xF5C9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xFAA9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x3723  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x5823  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xD771  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xD75B  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x8117  },
+{ 0x0F12, 0x0000  },
+
+// End TnP part
+
+//========================================================                      
+// CIs/APs/An setting        - 400LsB  sYsCLK 32MHz                             
+//========================================================                      
+// This regis are for FACTORY ONLY. If you change it without prior notification,
+// YOU are REsIBLE for the FAILURE that will happen in the future.              
+//========================================================                      
+
+
+{ 0x002A, 0x157A  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x1578  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x1576  },
+{ 0x0F12, 0x0020  },
+{ 0x002A, 0x1574  },
+{ 0x0F12, 0x0006  },
+{ 0x002A, 0x156E  },
+{ 0x0F12, 0x0001  },	// slope calibration tolerance in units of 1/256	
+{ 0x002A, 0x1568  },
+{ 0x0F12, 0x00FC  },
+                  
+// /ADC control    
+{ 0x002A, 0x155A  },
+{ 0x0F12, 0x01CC  },	//ADC sAT of 450mV for 10bit default in EVT1                         	
+{ 0x002A, 0x157E  },                                                                        
+{ 0x0F12, 0x0C80  },	// 3200 Max. Reset ramp DCLK counts (default 2048 0x800)             
+{ 0x0F12, 0x0578  },	// 1400 Max. Reset ramp DCLK counts for x3.5                         
+{ 0x002A, 0x157C  },                                                                        
+{ 0x0F12, 0x0190  },	// 400 Reset ramp for x1 in DCLK counts                              
+{ 0x002A, 0x1570  },                                                                        
+{ 0x0F12, 0x00A0  },	// 160 LsB                                                           
+{ 0x0F12, 0x0010  },	// reset threshold                                                   
+{ 0x002A, 0x12C4  },                                                                        
+{ 0x0F12, 0x006A  },	// 106 additional timing columns.                                    
+{ 0x002A, 0x12C8  },                                                                        
+{ 0x0F12, 0x08AC  },	// 2220 ADC columns in normal mode including Hold & Latch            
+{ 0x0F12, 0x0050  },	// 80 addition of ADC columns in Y-ave mode (default 244 0x74)
+                  
+{ 0x002A, 0x1696  },	// based on APs guidelines                        
+{ 0x0F12, 0x0000  },   // based on APs guidelines                        
+{ 0x0F12, 0x0000  },   // default. 1492 used for ADC dark characteristics
+{ 0x0F12, 0x00C6  },   // default. 1492 used for ADC dark characteristics
+{ 0x0F12, 0x00C6  },                                                  
+//{ 0x002A, 0x12B8  },   //disable CINTR 0                                 
+//{ 0x0F12, 0x0B00  },                                                     
+                                                                      
+{ 0x002A, 0x1690  },   // when set double sampling is activated - requires different set of pointers                                                 
+{ 0x0F12, 0x0001  },                                                     
+                                                                      
+{ 0x002A, 0x12B0  },   // comp and pixel bias control 0xF40E - default for EVT1                                                                      
+{ 0x0F12, 0x0055  },   // comp and pixel bias control 0xF40E for binning mode                                                                        
+{ 0x0F12, 0x005A  },                                                     
+                                                                      
+{ 0x002A, 0x337A  },   // [7] - is used for rest-only mode (EVT0 value is 0xD and HW 0x6)                                                            
+{ 0x0F12, 0x0006  },
+{ 0x0F12, 0x0068  },
+{ 0x002A, 0x169E  },
+{ 0x0F12, 0x0007  },
+{ 0x002A, 0x0BF6  },
+{ 0x0F12, 0x0000  },
+	                
+                    
+{ 0x002A, 0x327C  },
+{ 0x0F12, 0x1000  },
+{ 0x0F12, 0x6998  },
+{ 0x0F12, 0x0078  },
+{ 0x0F12, 0x04FE  },
+{ 0x0F12, 0x8800  },
+                    
+{ 0x002A, 0x3274  },
+{ 0x0F12, 0x0155  },	//set IO driving current 2mA for Gs500
+{ 0x0F12, 0x0155  },   //set IO driving current              
+{ 0x0F12, 0x1555  },   //set IO driving current              
+{ 0x0F12, 0x0555  },   //set IO driving current              
+                    
+                    
+{ 0x0028, 0x7000  },	
+{ 0x002A, 0x12D2  },	   
+{ 0x0F12, 0x0003  },	//senHal_pContSenModesRegsArray[0][0]2 700012D2     
+{ 0x0F12, 0x0003  },   //senHal_pContSenModesRegsArray[0][1]2 700012D4  
+{ 0x0F12, 0x0003  },   //senHal_pContSenModesRegsArray[0][2]2 700012D6  
+{ 0x0F12, 0x0003  },   //senHal_pContSenModesRegsArray[0][3]2 700012D8  
+{ 0x0F12, 0x0884  },   //senHal_pContSenModesRegsArray[1][0]2 700012DA  
+{ 0x0F12, 0x08CF  },   //senHal_pContSenModesRegsArray[1][1]2 700012DC  
+{ 0x0F12, 0x0500  },   //senHal_pContSenModesRegsArray[1][2]2 700012DE  
+{ 0x0F12, 0x054B  },   //senHal_pContSenModesRegsArray[1][3]2 700012E0  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][0]2 700012E2  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][1]2 700012E4  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][2]2 700012E6  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][3]2 700012E8  
+{ 0x0F12, 0x0885  },   //senHal_pContSenModesRegsArray[3][0]2 700012EA  
+{ 0x0F12, 0x0467  },   //senHal_pContSenModesRegsArray[3][1]2 700012EC  
+{ 0x0F12, 0x0501  },   //senHal_pContSenModesRegsArray[3][2]2 700012EE  
+{ 0x0F12, 0x02A5  },   //senHal_pContSenModesRegsArray[3][3]2 700012F0  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[4][0]2 700012F2  
+{ 0x0F12, 0x046A  },   //senHal_pContSenModesRegsArray[4][1]2 700012F4  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[4][2]2 700012F6  
+{ 0x0F12, 0x02A8  },   //senHal_pContSenModesRegsArray[4][3]2 700012F8  
+{ 0x0F12, 0x0885  },   //senHal_pContSenModesRegsArray[5][0]2 700012FA  
+{ 0x0F12, 0x08D0  },   //senHal_pContSenModesRegsArray[5][1]2 700012FC  
+{ 0x0F12, 0x0501  },   //senHal_pContSenModesRegsArray[5][2]2 700012FE  
+{ 0x0F12, 0x054C  },   //senHal_pContSenModesRegsArray[5][3]2 70001300  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[6][0]2 70001302  
+{ 0x0F12, 0x0020  },   //senHal_pContSenModesRegsArray[6][1]2 70001304  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[6][2]2 70001306  
+{ 0x0F12, 0x0020  },   //senHal_pContSenModesRegsArray[6][3]2 70001308  
+{ 0x0F12, 0x0881  },   //senHal_pContSenModesRegsArray[7][0]2 7000130A  
+{ 0x0F12, 0x0463  },   //senHal_pContSenModesRegsArray[7][1]2 7000130C  
+{ 0x0F12, 0x04FD  },   //senHal_pContSenModesRegsArray[7][2]2 7000130E  
+{ 0x0F12, 0x02A1  },   //senHal_pContSenModesRegsArray[7][3]2 70001310  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[8][0]2 70001312  
+{ 0x0F12, 0x0489  },   //senHal_pContSenModesRegsArray[8][1]2 70001314  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[8][2]2 70001316  
+{ 0x0F12, 0x02C7  },   //senHal_pContSenModesRegsArray[8][3]2 70001318  
+{ 0x0F12, 0x0881  },   //senHal_pContSenModesRegsArray[9][0]2 7000131A  
+{ 0x0F12, 0x08CC  },   //senHal_pContSenModesRegsArray[9][1]2 7000131C  
+{ 0x0F12, 0x04FD  },   //senHal_pContSenModesRegsArray[9][2]2 7000131E  
+{ 0x0F12, 0x0548  },   //senHal_pContSenModesRegsArray[9][3]2 70001320  
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[10][0] 2 70001322
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[10][1] 2 70001324
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[10][2] 2 70001326
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[10][3] 2 70001328
+{ 0x0F12, 0x03F2  },   //senHal_pContSenModesRegsArray[11][0] 2 7000132A
+{ 0x0F12, 0x0223  },   //senHal_pContSenModesRegsArray[11][1] 2 7000132C
+{ 0x0F12, 0x0230  },   //senHal_pContSenModesRegsArray[11][2] 2 7000132E
+{ 0x0F12, 0x0142  },   //senHal_pContSenModesRegsArray[11][3] 2 70001330
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[12][0] 2 70001332
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[12][1] 2 70001334
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[12][2] 2 70001336
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[12][3] 2 70001338
+{ 0x0F12, 0x03F2  },   //senHal_pContSenModesRegsArray[13][0] 2 7000133A
+{ 0x0F12, 0x068C  },   //senHal_pContSenModesRegsArray[13][1] 2 7000133C
+{ 0x0F12, 0x0230  },   //senHal_pContSenModesRegsArray[13][2] 2 7000133E
+{ 0x0F12, 0x03E9  },   //senHal_pContSenModesRegsArray[13][3] 2 70001340
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][0] 2 70001342
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][1] 2 70001344
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][2] 2 70001346
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][3] 2 70001348
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][0] 2 7000134A
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][1] 2 7000134C
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][2] 2 7000134E
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][3] 2 70001350
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[16][0] 2 70001352
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[16][1] 2 70001354
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[16][2] 2 70001356
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[16][3] 2 70001358
+{ 0x0F12, 0x020B  },   //senHal_pContSenModesRegsArray[17][0] 2 7000135A
+{ 0x0F12, 0x024A  },   //senHal_pContSenModesRegsArray[17][1] 2 7000135C
+{ 0x0F12, 0x012A  },   //senHal_pContSenModesRegsArray[17][2] 2 7000135E
+{ 0x0F12, 0x0169  },   //senHal_pContSenModesRegsArray[17][3] 2 70001360
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[18][0] 2 70001362
+{ 0x0F12, 0x046B  },   //senHal_pContSenModesRegsArray[18][1] 2 70001364
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[18][2] 2 70001366
+{ 0x0F12, 0x02A9  },   //senHal_pContSenModesRegsArray[18][3] 2 70001368
+{ 0x0F12, 0x0419  },   //senHal_pContSenModesRegsArray[19][0] 2 7000136A
+{ 0x0F12, 0x04A5  },   //senHal_pContSenModesRegsArray[19][1] 2 7000136C
+{ 0x0F12, 0x0257  },   //senHal_pContSenModesRegsArray[19][2] 2 7000136E
+{ 0x0F12, 0x02E3  },   //senHal_pContSenModesRegsArray[19][3] 2 70001370
+{ 0x0F12, 0x0630  },   //senHal_pContSenModesRegsArray[20][0] 2 70001372
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[20][1] 2 70001374
+{ 0x0F12, 0x038D  },   //senHal_pContSenModesRegsArray[20][2] 2 70001376
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[20][3] 2 70001378
+{ 0x0F12, 0x0668  },   //senHal_pContSenModesRegsArray[21][0] 2 7000137A
+{ 0x0F12, 0x06B3  },   //senHal_pContSenModesRegsArray[21][1] 2 7000137C
+{ 0x0F12, 0x03C5  },   //senHal_pContSenModesRegsArray[21][2] 2 7000137E
+{ 0x0F12, 0x0410  },   //senHal_pContSenModesRegsArray[21][3] 2 70001380
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][0] 2 70001382
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][1] 2 70001384
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][2] 2 70001386
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][3] 2 70001388
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[23][0] 2 7000138A
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[23][1] 2 7000138C
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[23][2] 2 7000138E
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[23][3] 2 70001390
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[24][0] 2 70001392
+{ 0x0F12, 0x0461  },   //senHal_pContSenModesRegsArray[24][1] 2 70001394
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[24][2] 2 70001396
+{ 0x0F12, 0x029F  },   //senHal_pContSenModesRegsArray[24][3] 2 70001398
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[25][0] 2 7000139A
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[25][1] 2 7000139C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[25][2] 2 7000139E
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[25][3] 2 700013A0
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][0] 2 700013A2
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][1] 2 700013A4
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][2] 2 700013A6
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][3] 2 700013A8
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[27][0] 2 700013AA
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[27][1] 2 700013AC
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[27][2] 2 700013AE
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[27][3] 2 700013B0
+{ 0x0F12, 0x020C  },   //senHal_pContSenModesRegsArray[28][0] 2 700013B2
+{ 0x0F12, 0x024B  },   //senHal_pContSenModesRegsArray[28][1] 2 700013B4
+{ 0x0F12, 0x012B  },   //senHal_pContSenModesRegsArray[28][2] 2 700013B6
+{ 0x0F12, 0x016A  },   //senHal_pContSenModesRegsArray[28][3] 2 700013B8
+{ 0x0F12, 0x039F  },   //senHal_pContSenModesRegsArray[29][0] 2 700013BA
+{ 0x0F12, 0x045E  },   //senHal_pContSenModesRegsArray[29][1] 2 700013BC
+{ 0x0F12, 0x01DD  },   //senHal_pContSenModesRegsArray[29][2] 2 700013BE
+{ 0x0F12, 0x029C  },   //senHal_pContSenModesRegsArray[29][3] 2 700013C0
+{ 0x0F12, 0x041A  },   //senHal_pContSenModesRegsArray[30][0] 2 700013C2
+{ 0x0F12, 0x04A6  },   //senHal_pContSenModesRegsArray[30][1] 2 700013C4
+{ 0x0F12, 0x0258  },   //senHal_pContSenModesRegsArray[30][2] 2 700013C6
+{ 0x0F12, 0x02E4  },   //senHal_pContSenModesRegsArray[30][3] 2 700013C8
+{ 0x0F12, 0x062D  },   //senHal_pContSenModesRegsArray[31][0] 2 700013CA
+{ 0x0F12, 0x0639  },   //senHal_pContSenModesRegsArray[31][1] 2 700013CC
+{ 0x0F12, 0x038A  },   //senHal_pContSenModesRegsArray[31][2] 2 700013CE
+{ 0x0F12, 0x0396  },   //senHal_pContSenModesRegsArray[31][3] 2 700013D0
+{ 0x0F12, 0x0669  },   //senHal_pContSenModesRegsArray[32][0] 2 700013D2
+{ 0x0F12, 0x06B4  },   //senHal_pContSenModesRegsArray[32][1] 2 700013D4
+{ 0x0F12, 0x03C6  },   //senHal_pContSenModesRegsArray[32][2] 2 700013D6
+{ 0x0F12, 0x0411  },   //senHal_pContSenModesRegsArray[32][3] 2 700013D8
+{ 0x0F12, 0x087C  },   //senHal_pContSenModesRegsArray[33][0] 2 700013DA
+{ 0x0F12, 0x08C7  },   //senHal_pContSenModesRegsArray[33][1] 2 700013DC
+{ 0x0F12, 0x04F8  },   //senHal_pContSenModesRegsArray[33][2] 2 700013DE
+{ 0x0F12, 0x0543  },   //senHal_pContSenModesRegsArray[33][3] 2 700013E0
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][0] 2 700013E2
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][1] 2 700013E4
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][2] 2 700013E6
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][3] 2 700013E8
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[35][0] 2 700013EA
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[35][1] 2 700013EC
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[35][2] 2 700013EE
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[35][3] 2 700013F0
+{ 0x0F12, 0x020F  },   //senHal_pContSenModesRegsArray[36][0] 2 700013F2
+{ 0x0F12, 0x024E  },   //senHal_pContSenModesRegsArray[36][1] 2 700013F4
+{ 0x0F12, 0x012E  },   //senHal_pContSenModesRegsArray[36][2] 2 700013F6
+{ 0x0F12, 0x016D  },   //senHal_pContSenModesRegsArray[36][3] 2 700013F8
+{ 0x0F12, 0x039F  },   //senHal_pContSenModesRegsArray[37][0] 2 700013FA
+{ 0x0F12, 0x045E  },   //senHal_pContSenModesRegsArray[37][1] 2 700013FC
+{ 0x0F12, 0x01DD  },   //senHal_pContSenModesRegsArray[37][2] 2 700013FE
+{ 0x0F12, 0x029C  },   //senHal_pContSenModesRegsArray[37][3] 2 70001400
+{ 0x0F12, 0x041D  },   //senHal_pContSenModesRegsArray[38][0] 2 70001402
+{ 0x0F12, 0x04A9  },   //senHal_pContSenModesRegsArray[38][1] 2 70001404
+{ 0x0F12, 0x025B  },   //senHal_pContSenModesRegsArray[38][2] 2 70001406
+{ 0x0F12, 0x02E7  },   //senHal_pContSenModesRegsArray[38][3] 2 70001408
+{ 0x0F12, 0x062D  },   //senHal_pContSenModesRegsArray[39][0] 2 7000140A
+{ 0x0F12, 0x0639  },   //senHal_pContSenModesRegsArray[39][1] 2 7000140C
+{ 0x0F12, 0x038A  },   //senHal_pContSenModesRegsArray[39][2] 2 7000140E
+{ 0x0F12, 0x0396  },   //senHal_pContSenModesRegsArray[39][3] 2 70001410
+{ 0x0F12, 0x066C  },   //senHal_pContSenModesRegsArray[40][0] 2 70001412
+{ 0x0F12, 0x06B7  },   //senHal_pContSenModesRegsArray[40][1] 2 70001414
+{ 0x0F12, 0x03C9  },   //senHal_pContSenModesRegsArray[40][2] 2 70001416
+{ 0x0F12, 0x0414  },   //senHal_pContSenModesRegsArray[40][3] 2 70001418
+{ 0x0F12, 0x087C  },   //senHal_pContSenModesRegsArray[41][0] 2 7000141A
+{ 0x0F12, 0x08C7  },   //senHal_pContSenModesRegsArray[41][1] 2 7000141C
+{ 0x0F12, 0x04F8  },   //senHal_pContSenModesRegsArray[41][2] 2 7000141E
+{ 0x0F12, 0x0543  },   //senHal_pContSenModesRegsArray[41][3] 2 70001420
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][0] 2 70001422
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][1] 2 70001424
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][2] 2 70001426
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][3] 2 70001428
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[43][0] 2 7000142A
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[43][1] 2 7000142C
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[43][2] 2 7000142E
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[43][3] 2 70001430
+{ 0x0F12, 0x020F  },   //senHal_pContSenModesRegsArray[44][0] 2 70001432
+{ 0x0F12, 0x024E  },   //senHal_pContSenModesRegsArray[44][1] 2 70001434
+{ 0x0F12, 0x012E  },   //senHal_pContSenModesRegsArray[44][2] 2 70001436
+{ 0x0F12, 0x016D  },   //senHal_pContSenModesRegsArray[44][3] 2 70001438
+{ 0x0F12, 0x039F  },   //senHal_pContSenModesRegsArray[45][0] 2 7000143A
+{ 0x0F12, 0x045E  },   //senHal_pContSenModesRegsArray[45][1] 2 7000143C
+{ 0x0F12, 0x01DD  },   //senHal_pContSenModesRegsArray[45][2] 2 7000143E
+{ 0x0F12, 0x029C  },   //senHal_pContSenModesRegsArray[45][3] 2 70001440
+{ 0x0F12, 0x041D  },   //senHal_pContSenModesRegsArray[46][0] 2 70001442
+{ 0x0F12, 0x04A9  },   //senHal_pContSenModesRegsArray[46][1] 2 70001444
+{ 0x0F12, 0x025B  },   //senHal_pContSenModesRegsArray[46][2] 2 70001446
+{ 0x0F12, 0x02E7  },   //senHal_pContSenModesRegsArray[46][3] 2 70001448
+{ 0x0F12, 0x062D  },   //senHal_pContSenModesRegsArray[47][0] 2 7000144A
+{ 0x0F12, 0x0639  },   //senHal_pContSenModesRegsArray[47][1] 2 7000144C
+{ 0x0F12, 0x038A  },   //senHal_pContSenModesRegsArray[47][2] 2 7000144E
+{ 0x0F12, 0x0396  },   //senHal_pContSenModesRegsArray[47][3] 2 70001450
+{ 0x0F12, 0x066C  },   //senHal_pContSenModesRegsArray[48][0] 2 70001452
+{ 0x0F12, 0x06B7  },   //senHal_pContSenModesRegsArray[48][1] 2 70001454
+{ 0x0F12, 0x03C9  },   //senHal_pContSenModesRegsArray[48][2] 2 70001456
+{ 0x0F12, 0x0414  },   //senHal_pContSenModesRegsArray[48][3] 2 70001458
+{ 0x0F12, 0x087C  },   //senHal_pContSenModesRegsArray[49][0] 2 7000145A
+{ 0x0F12, 0x08C7  },   //senHal_pContSenModesRegsArray[49][1] 2 7000145C
+{ 0x0F12, 0x04F8  },   //senHal_pContSenModesRegsArray[49][2] 2 7000145E
+{ 0x0F12, 0x0543  },   //senHal_pContSenModesRegsArray[49][3] 2 70001460
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][0] 2 70001462
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][1] 2 70001464
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][2] 2 70001466
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][3] 2 70001468
+{ 0x0F12, 0x01D2  },   //senHal_pContSenModesRegsArray[51][0] 2 7000146A
+{ 0x0F12, 0x01D2  },   //senHal_pContSenModesRegsArray[51][1] 2 7000146C
+{ 0x0F12, 0x00F1  },   //senHal_pContSenModesRegsArray[51][2] 2 7000146E
+{ 0x0F12, 0x00F1  },   //senHal_pContSenModesRegsArray[51][3] 2 70001470
+{ 0x0F12, 0x020C  },   //senHal_pContSenModesRegsArray[52][0] 2 70001472
+{ 0x0F12, 0x024B  },   //senHal_pContSenModesRegsArray[52][1] 2 70001474
+{ 0x0F12, 0x012B  },   //senHal_pContSenModesRegsArray[52][2] 2 70001476
+{ 0x0F12, 0x016A  },   //senHal_pContSenModesRegsArray[52][3] 2 70001478
+{ 0x0F12, 0x03A1  },   //senHal_pContSenModesRegsArray[53][0] 2 7000147A
+{ 0x0F12, 0x0460  },   //senHal_pContSenModesRegsArray[53][1] 2 7000147C
+{ 0x0F12, 0x01DF  },   //senHal_pContSenModesRegsArray[53][2] 2 7000147E
+{ 0x0F12, 0x029E  },   //senHal_pContSenModesRegsArray[53][3] 2 70001480
+{ 0x0F12, 0x041A  },   //senHal_pContSenModesRegsArray[54][0] 2 70001482
+{ 0x0F12, 0x04A6  },   //senHal_pContSenModesRegsArray[54][1] 2 70001484
+{ 0x0F12, 0x0258  },   //senHal_pContSenModesRegsArray[54][2] 2 70001486
+{ 0x0F12, 0x02E4  },   //senHal_pContSenModesRegsArray[54][3] 2 70001488
+{ 0x0F12, 0x062F  },   //senHal_pContSenModesRegsArray[55][0] 2 7000148A
+{ 0x0F12, 0x063B  },   //senHal_pContSenModesRegsArray[55][1] 2 7000148C
+{ 0x0F12, 0x038C  },   //senHal_pContSenModesRegsArray[55][2] 2 7000148E
+{ 0x0F12, 0x0398  },   //senHal_pContSenModesRegsArray[55][3] 2 70001490
+{ 0x0F12, 0x0669  },   //senHal_pContSenModesRegsArray[56][0] 2 70001492
+{ 0x0F12, 0x06B4  },   //senHal_pContSenModesRegsArray[56][1] 2 70001494
+{ 0x0F12, 0x03C6  },   //senHal_pContSenModesRegsArray[56][2] 2 70001496
+{ 0x0F12, 0x0411  },   //senHal_pContSenModesRegsArray[56][3] 2 70001498
+{ 0x0F12, 0x087E  },   //senHal_pContSenModesRegsArray[57][0] 2 7000149A
+{ 0x0F12, 0x08C9  },   //senHal_pContSenModesRegsArray[57][1] 2 7000149C
+{ 0x0F12, 0x04FA  },   //senHal_pContSenModesRegsArray[57][2] 2 7000149E
+{ 0x0F12, 0x0545  },   //senHal_pContSenModesRegsArray[57][3] 2 700014A0
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[58][0] 2 700014A2
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[58][1] 2 700014A4
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[58][2] 2 700014A6
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[58][3] 2 700014A8
+{ 0x0F12, 0x03AF  },   //senHal_pContSenModesRegsArray[59][0] 2 700014AA
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[59][1] 2 700014AC
+{ 0x0F12, 0x01ED  },   //senHal_pContSenModesRegsArray[59][2] 2 700014AE
+{ 0x0F12, 0x00FF  },   //senHal_pContSenModesRegsArray[59][3] 2 700014B0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[60][0] 2 700014B2
+{ 0x0F12, 0x0461  },   //senHal_pContSenModesRegsArray[60][1] 2 700014B4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[60][2] 2 700014B6
+{ 0x0F12, 0x029F  },   //senHal_pContSenModesRegsArray[60][3] 2 700014B8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[61][0] 2 700014BA
+{ 0x0F12, 0x046E  },   //senHal_pContSenModesRegsArray[61][1] 2 700014BC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[61][2] 2 700014BE
+{ 0x0F12, 0x02AC  },   //senHal_pContSenModesRegsArray[61][3] 2 700014C0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[62][0] 2 700014C2
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[62][1] 2 700014C4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[62][2] 2 700014C6
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[62][3] 2 700014C8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[63][0] 2 700014CA
+{ 0x0F12, 0x0649  },   //senHal_pContSenModesRegsArray[63][1] 2 700014CC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[63][2] 2 700014CE
+{ 0x0F12, 0x03A6  },   //senHal_pContSenModesRegsArray[63][3] 2 700014D0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][0] 2 700014D2
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][1] 2 700014D4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][2] 2 700014D6
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][3] 2 700014D8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][0] 2 700014DA
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][1] 2 700014DC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][2] 2 700014DE
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][3] 2 700014E0
+{ 0x0F12, 0x03AA  },   //senHal_pContSenModesRegsArray[66][0] 2 700014E2
+{ 0x0F12, 0x01DB  },   //senHal_pContSenModesRegsArray[66][1] 2 700014E4
+{ 0x0F12, 0x01E8  },   //senHal_pContSenModesRegsArray[66][2] 2 700014E6
+{ 0x0F12, 0x00FA  },   //senHal_pContSenModesRegsArray[66][3] 2 700014E8
+{ 0x0F12, 0x03B7  },   //senHal_pContSenModesRegsArray[67][0] 2 700014EA
+{ 0x0F12, 0x01E8  },   //senHal_pContSenModesRegsArray[67][1] 2 700014EC
+{ 0x0F12, 0x01F5  },   //senHal_pContSenModesRegsArray[67][2] 2 700014EE
+{ 0x0F12, 0x0107  },   //senHal_pContSenModesRegsArray[67][3] 2 700014F0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[68][0] 2 700014F2
+{ 0x0F12, 0x0469  },   //senHal_pContSenModesRegsArray[68][1] 2 700014F4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[68][2] 2 700014F6
+{ 0x0F12, 0x02A7  },   //senHal_pContSenModesRegsArray[68][3] 2 700014F8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[69][0] 2 700014FA
+{ 0x0F12, 0x0476  },   //senHal_pContSenModesRegsArray[69][1] 2 700014FC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[69][2] 2 700014FE
+{ 0x0F12, 0x02B4  },   //senHal_pContSenModesRegsArray[69][3] 2 70001500
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[70][0] 2 70001502
+{ 0x0F12, 0x0644  },   //senHal_pContSenModesRegsArray[70][1] 2 70001504
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[70][2] 2 70001506
+{ 0x0F12, 0x03A1  },   //senHal_pContSenModesRegsArray[70][3] 2 70001508
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[71][0] 2 7000150A
+{ 0x0F12, 0x0651  },   //senHal_pContSenModesRegsArray[71][1] 2 7000150C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[71][2] 2 7000150E
+{ 0x0F12, 0x03AE  },   //senHal_pContSenModesRegsArray[71][3] 2 70001510
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][0] 2 70001512
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][1] 2 70001514
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][2] 2 70001516
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][3] 2 70001518
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][0] 2 7000151A
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][1] 2 7000151C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][2] 2 7000151E
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][3] 2 70001520
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][0] 2 70001522
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][1] 2 70001524
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][2] 2 70001526
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][3] 2 70001528
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][0] 2 7000152A
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][1] 2 7000152C
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][2] 2 7000152E
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][3] 2 70001530
+{ 0x0F12, 0x05AD  },   //senHal_pContSenModesRegsArray[76][0] 2 70001532
+{ 0x0F12, 0x03DE  },   //senHal_pContSenModesRegsArray[76][1] 2 70001534
+{ 0x0F12, 0x030A  },   //senHal_pContSenModesRegsArray[76][2] 2 70001536
+{ 0x0F12, 0x021C  },   //senHal_pContSenModesRegsArray[76][3] 2 70001538
+{ 0x0F12, 0x062F  },   //senHal_pContSenModesRegsArray[77][0] 2 7000153A
+{ 0x0F12, 0x0460  },   //senHal_pContSenModesRegsArray[77][1] 2 7000153C
+{ 0x0F12, 0x038C  },   //senHal_pContSenModesRegsArray[77][2] 2 7000153E
+{ 0x0F12, 0x029E  },   //senHal_pContSenModesRegsArray[77][3] 2 70001540
+{ 0x0F12, 0x07FC  },   //senHal_pContSenModesRegsArray[78][0] 2 70001542
+{ 0x0F12, 0x0847  },   //senHal_pContSenModesRegsArray[78][1] 2 70001544
+{ 0x0F12, 0x0478  },   //senHal_pContSenModesRegsArray[78][2] 2 70001546
+{ 0x0F12, 0x04C3  },   //senHal_pContSenModesRegsArray[78][3] 2 70001548
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][0] 2 7000154A
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][1] 2 7000154C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][2] 2 7000154E
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][3] 2 70001550
+                      
+                    
+//============================================================ 
+// AF Interface setting
+//==============  ============================================== 
+{ 0x002A, 0x01D4  },
+{ 0x0F12, 0x0000  }, //REG_TC_IPRM_AuxGpios : 0 - no Flash
+{ 0x002A, 0x01DE  },
+{ 0x0F12, 0x0003  }, //REG_TC_IPRM_CM_Init_AfModeType : 3 - AFD_VCM_I2C
+{ 0x0F12, 0x0000  }, //REG_TC_IPRM_CM_Init_PwmConfig1 : 0 - no PWM
+{ 0x002A, 0x01E4  },
+{ 0x0F12, 0x0041  }, //REG_TC_IPRM_CM_Init_GpioConfig1 : 4 -  GPIO4 
+{ 0x002A, 0x01E8  },
+{ 0x0F12, 0x2A0C  }, //REG_TC_IPRM_CM_Init_Mi2cBits : MSCL - GPIO1 MSDA - GPIO2 Device ID (0C)
+{ 0x0F12, 0x0190  }, //REG_TC_IPRM_CM_Init_Mi2cRateKhz : MI2C Speed - 400KHz
+
+//============================================================ 
+// AF Parameter setting
+//============================================================ 
+// AF Window Settings
+{ 0x002A, 0x025A  },
+{ 0x0F12, 0x0100  }, //#REG_TC_AF_FstWinStartX
+{ 0x0F12, 0x00E3  }, //#REG_TC_AF_FstWinStartY
+{ 0x0F12, 0x0200  }, //#REG_TC_AF_FstWinSizeX
+{ 0x0F12, 0x0238  }, //#REG_TC_AF_FstWinSizeY
+{ 0x0F12, 0x01C6  }, //#REG_TC_AF_ScndWinStartX
+{ 0x0F12, 0x0166  }, //#REG_TC_AF_ScndWinStartY
+{ 0x0F12, 0x0074  }, //#REG_TC_AF_ScndWinSizeX
+{ 0x0F12, 0x0132  }, //#REG_TC_AF_ScndWinSizeY
+{ 0x0F12, 0x0001  }, //#REG_TC_AF_WinSizesUpdated
+
+// AF Setot Settings 
+{ 0x002A, 0x0586  },
+{ 0x0F12, 0x00FF  }, //#skl_af_StatOvlpExpFactor
+
+// AF Scene Settings 
+{ 0x002A, 0x115E  },
+{ 0x0F12, 0x0003  }, //#af_scene_usSaturatedScene
+
+// AF Fine Search Settings 
+{ 0x002A, 0x10D4  },
+{ 0x0F12, 0x1002  }, //FineSearch Disable //af_search_usSingleAfFlags 1000 : 2nd searh off, 1002 : 2nd search on
+{ 0x002A, 0x10DE  },
+{ 0x0F12, 0x0004  }, //#af_search_usFinePeakCount
+{ 0x002A, 0x106C  },
+{ 0x0F12, 0x0802  }, //#af_pos_usFineStepNumSize
+                  
+// / AF Peak Thre  shold Setting
+{ 0x002A, 0x10CA  }, //#af_search_usPeakThr
+{ 0x0F12, 0x00CC  }, 
+
+// AF Default Position 
+{ 0x002A, 0x1060  },
+{ 0x0F12, 0x0000  }, //#af_pos_usHomePos
+{ 0x0F12, 0xB020  }, //#af_pos_usLowConfPos
+
+// AF LowConfThr Setting
+{ 0x002A, 0x10F4  }, //LowEdgeBoth GRAD
+{ 0x0F12, 0x0280  }, 
+{ 0x002A, 0x1100  }, //LowLight HPF
+{ 0x0F12, 0x03A0  },  
+{ 0x0F12, 0x0320  }, 
+
+{ 0x002A, 0x1134  },
+{ 0x0F12, 0x0030  },//af_stat_usMinStatVal
+
+// AF low Br Th
+{ 0x002A, 0x1154  }, // normBrThr
+{ 0x0F12, 0x0060  },
+
+// AF Policy
+{ 0x002A, 0x10E2  },
+{ 0x0F12, 0x0000  }, //#af_search_usCapturePolicy: Focus_Priority, 0002 : Shutter_Priority_Fixed, 0001 : Shutter_Priority_Last_BFP 0000: Shutter_Priority_Current
+{ 0x002A, 0x1072  },
+{ 0x0F12, 0x003C  }, //#af_pos_usCaptureFixedPo// 0x0008
+
+// AF Lens Position Table Settings 
+{ 0x002A, 0x1074  },
+{ 0x0F12, 0x0010  }, //#af_pos_usTableLastInd // 0~16 17 Steps 100729
+
+{ 0x0F12, 0x0024  }, //#af_pos_usTable_0_  145/4 = 36  // af_pos_usTable
+{ 0x0F12, 0x002D  }, //#af_pos_usTable_1_  180/4 = 45                   
+{ 0x0F12, 0x0036  }, //#af_pos_usTable_2_  215/4 = 54                   
+{ 0x0F12, 0x003E  }, //#af_pos_usTable_3_  250/4 = 62                   
+{ 0x0F12, 0x0047  }, //#af_pos_usTable_4_  285/4 = 71
+{ 0x0F12, 0x0050  }, //#af_pos_usTable_5_  320/4 = 80                   
+{ 0x0F12, 0x0059  }, //#af_pos_usTable_6_  355/4 = 89                   
+{ 0x0F12, 0x0061  }, //#af_pos_usTable_7_  390/4 = 97                   
+{ 0x0F12, 0x006A  }, //#af_pos_usTable_8_  425/4 = 106                  
+{ 0x0F12, 0x0073  }, //#af_pos_usTable_9_  460/4 = 115                  
+{ 0x0F12, 0x007C  }, //#af_pos_usTable_10_ 495/4 = 124                  
+{ 0x0F12, 0x0084  }, //#af_pos_usTable_11_ 530/4 = 132                  
+{ 0x0F12, 0x008D  }, //#af_pos_usTable_12_ 565/4 = 141                  
+{ 0x0F12, 0x0096  }, //#af_pos_usTable_13_ 600/4 = 150                  
+{ 0x0F12, 0x009F  }, //#af_pos_usTable_14_ 635/4 = 159                  
+{ 0x0F12, 0x00A7  }, //#af_pos_usTable_15_ 670/4 = 167                  
+{ 0x0F12, 0x00B0  }, //#af_pos_usTable_16_ 705/4 = 176                  
+
+//VCM AF driver with PWM/I2C 
+{ 0x002A, 0x1198  },
+{ 0x0F12, 0x8000  }, //#afd_usParam[0]  I2C power down command
+{ 0x0F12, 0x0006  }, //#afd_usParam[1]  Position Right Shift 
+{ 0x0F12, 0x3FF0  }, //#afd_usParam[2]  I2C Data Mask
+{ 0x0F12, 0x03E8  }, //#afd_usParam[3]  PWM Period
+{ 0x0F12, 0x0000  }, //#afd_usParam[4]  PWM Divider
+{ 0x0F12, 0x0064  }, //#afd_usParam[5]  SlowMotion Delay (unit: 0.1ms)  4. reduce lens collision noise.
+{ 0x0F12, 0x0009  }, //#afd_usParam[6]  SlowMotion Threshold
+{ 0x0F12, 0x000A  }, //#afd_usParam[7]  Signal Shaping
+{ 0x0F12, 0x0080  }, //#afd_usParam[8]  Signal Shaping level 
+{ 0x0F12, 0x00C0  }, //#afd_usParam[9]  Signal Shaping level
+{ 0x0F12, 0x0000  }, //#afd_usParam[10] Signal Shaping level
+{ 0x0F12, 0x0000  }, //#afd_usParam[11] Signal Shaping level               
+
+
+{ 0x002A, 0x0252  },
+{ 0x0F12, 0x0003  }, //init 
+                  
+{ 0x002A, 0x12B8  },   //disable CINTR 0                                 
+{ 0x0F12, 0x1000  },        
+
+//============================================================
+// ISP-FE Setting
+//============================================================                    
+{ 0x002A, 0x158A  },   
+{ 0x0F12, 0xEAF0  },   
+{ 0x002A, 0x15C6  },   
+{ 0x0F12, 0x0020  },   
+{ 0x0F12, 0x0060  },   
+{ 0x002A, 0x15BC  },   
+{ 0x0F12, 0x0200  },   
+                       
+{ 0x002A, 0x1608  },   
+{ 0x0F12, 0x0100  },   
+{ 0x0F12, 0x0100  },   
+{ 0x0F12, 0x0100  },   
+{ 0x0F12, 0x0100  },   
+                       
+{ 0x002A, 0x0F70  },   
+{ 0x0F12, 0x0040  },	 //36 //TVAR_ae_BrAve  //ae Target//
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0x3415  },   //3A98 //3A98////lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0x682A  },   //68b0 //7EF4////lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0x8235  },   //8340 //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },    //F424//MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0x3415  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0x682A  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0x8235  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+// /Shutter tunpo  int//        //gain * 256 = value//
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x01B3  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x02A0  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710  },   //MaxAnGain4 //                                             
+// /Shutter tunen  d//
+                  
+{ 0x002A, 0x0544  },                                                               
+{ 0x0F12, 0x0100  },   	                                                    
+{ 0x0F12, 0x8000  },   //Max Gain 8 //                                             
+                  
+                  
+{ 0x002A, 0x1694  },                                                               
+{ 0x0F12, 0x0001  },   //expand forbidde zone //                                   
+                  
+{ 0x002A, 0x021A  },                                                               
+{ 0x0F12, 0x0000  },  //MBR off// 	                                                    
+                  
+                  
+//==============================================//
+//AFC                                          //
+//==============================================//
+{ 0x002A, 0x04d2  },
+{ 0x0F12, 0x065f  },     //065f : Manual AFC on   067f : Manual AFC off //
+{ 0x002A, 0x04ba  },     
+{ 0x0F12, 0x0002  },     // 0002: 60hz  0001 : 50hz //
+{ 0x0F12, 0x0001  },     // afc update command //
+                          
+                    
+                    
+{ 0x002A, 0x06CE  },   
+{ 0x0F12, 0x0100  },	//TVAR_ash_GAsalpha[0] // 	   
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[1] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[2] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[3] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[4] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[5] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[6] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[7] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[8] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[9] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[10] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[11] //
+{ 0x0F12, 0x00e0  },   //TVAR_ash_GAsalpha[12] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[13] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[14] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[15] //
+{ 0x0F12, 0x00e8  },   //TVAR_ash_GAsalpha[16] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[17] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[18] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[19] //
+{ 0x0F12, 0x00f0  },   //TVAR_ash_GAsalpha[20] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[21] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[22] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[23] //
+{ 0x0F12, 0x00f0  },   //TVAR_ash_GAsalpha[24] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[25] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[26] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[27] //
+                       
+{ 0x0F12, 0x00f8  },	//TVAR_ash_GAS OutdoorAlpha[0] //   
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAS OutdoorAlpha[1] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAS OutdoorAlpha[2] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAS OutdoorAlpha[3] //
+                       
+                       
+{ 0x0F12, 0x0036  },	//ash_GASBeta[0] // 	   
+{ 0x0F12, 0x001F  },	//ash_GASBeta[1] //    
+{ 0x0F12, 0x0020  },   //ash_GASBeta[2] // 
+{ 0x0F12, 0x0000  },   //ash_GASBeta[3] // 
+{ 0x0F12, 0x0036  },   //ash_GASBeta[4] // 
+{ 0x0F12, 0x001F  },   //ash_GASBeta[5] // 
+{ 0x0F12, 0x0020  },   //ash_GASBeta[6] // 
+{ 0x0F12, 0x0000  },   //ash_GASBeta[7] // 
+{ 0x0F12, 0x0036  },   //ash_GASBeta[8] // 
+{ 0x0F12, 0x001F  },   //ash_GASBeta[9] // 
+{ 0x0F12, 0x0020  },   //ash_GASBeta[10] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[11] //
+{ 0x0F12, 0x0010  },   //ash_GASBeta[12] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[13] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[14] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[15] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[16] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[17] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[18] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[19] //
+{ 0x0F12, 0x0036  },   //ash_GASBeta[20] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[21] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[22] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[23] //
+{ 0x0F12, 0x0036  },   //ash_GASBeta[24] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[25] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[26] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[27] //
+                       
+{ 0x0F12, 0x0036  },	//ash_GAS OutdoorBeta[0] //   
+{ 0x0F12, 0x001F  },   //ash_GAS OutdoorBeta[1] //
+{ 0x0F12, 0x0020  },   //ash_GAS OutdoorBeta[2] //
+{ 0x0F12, 0x0000  },   //ash_GAS OutdoorBeta[3] //
+                       
+{ 0x002A, 0x075A  },	//ash_bParabolicEstimation//   
+{ 0x0F12, 0x0000  },   //ash_uParabolicCenterX   //
+{ 0x0F12, 0x0400  },   //ash_uParabolicCenterY   //
+{ 0x0F12, 0x0300  },   //ash_uParabolicscalingA  //
+{ 0x0F12, 0x0010  },   //ash_uParabolicscalingB  //
+{ 0x0F12, 0x0011  },   
+                       
+{ 0x002A, 0x347C  },   
+{ 0x0F12, 0x01EE  },	//TVAR_ash_pGAS[0] //     
+{ 0x0F12, 0x01A9  },   //TVAR_ash_pGAS[1] //  
+{ 0x0F12, 0x016A  },   //TVAR_ash_pGAS[2] //  
+{ 0x0F12, 0x0136  },   //TVAR_ash_pGAS[3] //  
+{ 0x0F12, 0x0111  },   //TVAR_ash_pGAS[4] //  
+{ 0x0F12, 0x00F6  },   //TVAR_ash_pGAS[5] //  
+{ 0x0F12, 0x00EB  },   //TVAR_ash_pGAS[6] //  
+{ 0x0F12, 0x00F7  },   //TVAR_ash_pGAS[7] //  
+{ 0x0F12, 0x0111  },   //TVAR_ash_pGAS[8] //  
+{ 0x0F12, 0x013B  },   //TVAR_ash_pGAS[9] //  
+{ 0x0F12, 0x0174  },   //TVAR_ash_pGAS[10] // 
+{ 0x0F12, 0x01BC  },   //TVAR_ash_pGAS[11] // 
+{ 0x0F12, 0x0204  },   //TVAR_ash_pGAS[12] // 
+{ 0x0F12, 0x01BA  },   //TVAR_ash_pGAS[13] // 
+{ 0x0F12, 0x0175  },   //TVAR_ash_pGAS[14] // 
+{ 0x0F12, 0x012C  },   //TVAR_ash_pGAS[15] // 
+{ 0x0F12, 0x00F1  },   //TVAR_ash_pGAS[16] // 
+{ 0x0F12, 0x00C5  },   //TVAR_ash_pGAS[17] // 
+{ 0x0F12, 0x00AA  },   //TVAR_ash_pGAS[18] // 
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[19] // 
+{ 0x0F12, 0x00AA  },   //TVAR_ash_pGAS[20] // 
+{ 0x0F12, 0x00C8  },   //TVAR_ash_pGAS[21] // 
+{ 0x0F12, 0x00FA  },   //TVAR_ash_pGAS[22] // 
+{ 0x0F12, 0x013D  },   //TVAR_ash_pGAS[23] // 
+{ 0x0F12, 0x0187  },   //TVAR_ash_pGAS[24] // 
+{ 0x0F12, 0x01DC  },   //TVAR_ash_pGAS[25] // 
+{ 0x0F12, 0x0184  },   //TVAR_ash_pGAS[26] // 
+{ 0x0F12, 0x0139  },   //TVAR_ash_pGAS[27] // 
+{ 0x0F12, 0x00EB  },   //TVAR_ash_pGAS[28] // 
+{ 0x0F12, 0x00A8  },   //TVAR_ash_pGAS[29] // 
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[30] // 
+{ 0x0F12, 0x005E  },   //TVAR_ash_pGAS[31] // 
+{ 0x0F12, 0x0055  },   //TVAR_ash_pGAS[32] // 
+{ 0x0F12, 0x0060  },   //TVAR_ash_pGAS[33] // 
+{ 0x0F12, 0x0080  },   //TVAR_ash_pGAS[34] // 
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[35] // 
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[36] // 
+{ 0x0F12, 0x0156  },   //TVAR_ash_pGAS[37] // 
+{ 0x0F12, 0x01A8  },   //TVAR_ash_pGAS[38] // 
+{ 0x0F12, 0x015B  },   //TVAR_ash_pGAS[39] // 
+{ 0x0F12, 0x010E  },   //TVAR_ash_pGAS[40] // 
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[41] // 
+{ 0x0F12, 0x0075  },   //TVAR_ash_pGAS[42] // 
+{ 0x0F12, 0x0045  },   //TVAR_ash_pGAS[43] // 
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[44] // 
+{ 0x0F12, 0x0023  },   //TVAR_ash_pGAS[45] // 
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[46] // 
+{ 0x0F12, 0x004C  },   //TVAR_ash_pGAS[47] // 
+{ 0x0F12, 0x0086  },   //TVAR_ash_pGAS[48] // 
+{ 0x0F12, 0x00D3  },   //TVAR_ash_pGAS[49] // 
+{ 0x0F12, 0x0130  },   //TVAR_ash_pGAS[50] // 
+{ 0x0F12, 0x0188  },   //TVAR_ash_pGAS[51] // 
+{ 0x0F12, 0x0140  },   //TVAR_ash_pGAS[52] // 
+{ 0x0F12, 0x00F2  },   //TVAR_ash_pGAS[53] // 
+{ 0x0F12, 0x009E  },   //TVAR_ash_pGAS[54] // 
+{ 0x0F12, 0x0056  },   //TVAR_ash_pGAS[55] // 
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[56] // 
+{ 0x0F12, 0x0013  },   //TVAR_ash_pGAS[57] // 
+{ 0x0F12, 0x000A  },   //TVAR_ash_pGAS[58] // 
+{ 0x0F12, 0x0013  },   //TVAR_ash_pGAS[59] // 
+{ 0x0F12, 0x0030  },   //TVAR_ash_pGAS[60] // 
+{ 0x0F12, 0x006B  },   //TVAR_ash_pGAS[61] // 
+{ 0x0F12, 0x00BA  },   //TVAR_ash_pGAS[62] // 
+{ 0x0F12, 0x0117  },   //TVAR_ash_pGAS[63] // 
+{ 0x0F12, 0x0176  },   //TVAR_ash_pGAS[64] // 
+{ 0x0F12, 0x012F  },   //TVAR_ash_pGAS[65] // 
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[66] // 
+{ 0x0F12, 0x0090  },   //TVAR_ash_pGAS[67] // 
+{ 0x0F12, 0x004D  },   //TVAR_ash_pGAS[68] // 
+{ 0x0F12, 0x0020  },   //TVAR_ash_pGAS[69] // 
+{ 0x0F12, 0x0009  },   //TVAR_ash_pGAS[70] // 
+{ 0x0F12, 0x0000  },   //TVAR_ash_pGAS[71] // 
+{ 0x0F12, 0x000D  },   //TVAR_ash_pGAS[72] // 
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[73] // 
+{ 0x0F12, 0x0062  },   //TVAR_ash_pGAS[74] // 
+{ 0x0F12, 0x00B3  },   //TVAR_ash_pGAS[75] // 
+{ 0x0F12, 0x0114  },   //TVAR_ash_pGAS[76] // 
+{ 0x0F12, 0x0172  },   //TVAR_ash_pGAS[77] // 
+{ 0x0F12, 0x0137  },   //TVAR_ash_pGAS[78] // 
+{ 0x0F12, 0x00E9  },   //TVAR_ash_pGAS[79] // 
+{ 0x0F12, 0x0098  },   //TVAR_ash_pGAS[80] // 
+{ 0x0F12, 0x0054  },   //TVAR_ash_pGAS[81] // 
+{ 0x0F12, 0x002A  },   //TVAR_ash_pGAS[82] // 
+{ 0x0F12, 0x0012  },   //TVAR_ash_pGAS[83] // 
+{ 0x0F12, 0x0009  },   //TVAR_ash_pGAS[84] // 
+{ 0x0F12, 0x0017  },   //TVAR_ash_pGAS[85] // 
+{ 0x0F12, 0x0034  },   //TVAR_ash_pGAS[86] // 
+{ 0x0F12, 0x006D  },   //TVAR_ash_pGAS[87] // 
+{ 0x0F12, 0x00BF  },   //TVAR_ash_pGAS[88] // 
+{ 0x0F12, 0x011C  },   //TVAR_ash_pGAS[89] // 
+{ 0x0F12, 0x0179  },   //TVAR_ash_pGAS[90] // 
+{ 0x0F12, 0x0152  },   //TVAR_ash_pGAS[91] // 
+{ 0x0F12, 0x0106  },   //TVAR_ash_pGAS[92] // 
+{ 0x0F12, 0x00B6  },   //TVAR_ash_pGAS[93] // 
+{ 0x0F12, 0x0070  },   //TVAR_ash_pGAS[94] // 
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[95] // 
+{ 0x0F12, 0x002D  },   //TVAR_ash_pGAS[96] // 
+{ 0x0F12, 0x0024  },   //TVAR_ash_pGAS[97] // 
+{ 0x0F12, 0x0032  },   //TVAR_ash_pGAS[98] // 
+{ 0x0F12, 0x0051  },   //TVAR_ash_pGAS[99] // 
+{ 0x0F12, 0x008A  },   //TVAR_ash_pGAS[100] //
+{ 0x0F12, 0x00DB  },   //TVAR_ash_pGAS[101] //
+{ 0x0F12, 0x0139  },   //TVAR_ash_pGAS[102] //
+{ 0x0F12, 0x0191  },   //TVAR_ash_pGAS[103] //
+{ 0x0F12, 0x0174  },   //TVAR_ash_pGAS[104] //
+{ 0x0F12, 0x012B  },   //TVAR_ash_pGAS[105] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[106] //
+{ 0x0F12, 0x009D  },   //TVAR_ash_pGAS[107] //
+{ 0x0F12, 0x006E  },   //TVAR_ash_pGAS[108] //
+{ 0x0F12, 0x0055  },   //TVAR_ash_pGAS[109] //
+{ 0x0F12, 0x0050  },   //TVAR_ash_pGAS[110] //
+{ 0x0F12, 0x005C  },   //TVAR_ash_pGAS[111] //
+{ 0x0F12, 0x007B  },   //TVAR_ash_pGAS[112] //
+{ 0x0F12, 0x00B7  },   //TVAR_ash_pGAS[113] //
+{ 0x0F12, 0x0109  },   //TVAR_ash_pGAS[114] //
+{ 0x0F12, 0x015E  },   //TVAR_ash_pGAS[115] //
+{ 0x0F12, 0x01B0  },   //TVAR_ash_pGAS[116] //
+{ 0x0F12, 0x01A9  },   //TVAR_ash_pGAS[117] //
+{ 0x0F12, 0x0160  },   //TVAR_ash_pGAS[118] //
+{ 0x0F12, 0x011A  },   //TVAR_ash_pGAS[119] //
+{ 0x0F12, 0x00DE  },   //TVAR_ash_pGAS[120] //
+{ 0x0F12, 0x00B1  },   //TVAR_ash_pGAS[121] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[122] //
+{ 0x0F12, 0x0093  },   //TVAR_ash_pGAS[123] //
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[124] //
+{ 0x0F12, 0x00C3  },   //TVAR_ash_pGAS[125] //
+{ 0x0F12, 0x00FA  },   //TVAR_ash_pGAS[126] //
+{ 0x0F12, 0x0143  },   //TVAR_ash_pGAS[127] //
+{ 0x0F12, 0x0190  },   //TVAR_ash_pGAS[128] //
+{ 0x0F12, 0x01E4  },   //TVAR_ash_pGAS[129] //
+{ 0x0F12, 0x01D5  },   //TVAR_ash_pGAS[130] //
+{ 0x0F12, 0x0194  },   //TVAR_ash_pGAS[131] //
+{ 0x0F12, 0x014E  },   //TVAR_ash_pGAS[132] //
+{ 0x0F12, 0x011F  },   //TVAR_ash_pGAS[133] //
+{ 0x0F12, 0x00F9  },   //TVAR_ash_pGAS[134] //
+{ 0x0F12, 0x00E1  },   //TVAR_ash_pGAS[135] //
+{ 0x0F12, 0x00DA  },   //TVAR_ash_pGAS[136] //
+{ 0x0F12, 0x00E8  },   //TVAR_ash_pGAS[137] //
+{ 0x0F12, 0x010A  },   //TVAR_ash_pGAS[138] //
+{ 0x0F12, 0x0139  },   //TVAR_ash_pGAS[139] //
+{ 0x0F12, 0x017B  },   //TVAR_ash_pGAS[140] //
+{ 0x0F12, 0x01C5  },   //TVAR_ash_pGAS[141] //
+{ 0x0F12, 0x0205  },   //TVAR_ash_pGAS[142] //
+{ 0x0F12, 0x01A2  },   //TVAR_ash_pGAS[143] //
+{ 0x0F12, 0x015F  },   //TVAR_ash_pGAS[144] //
+{ 0x0F12, 0x0126  },   //TVAR_ash_pGAS[145] //
+{ 0x0F12, 0x00F9  },   //TVAR_ash_pGAS[146] //
+{ 0x0F12, 0x00D7  },   //TVAR_ash_pGAS[147] //
+{ 0x0F12, 0x00BF  },   //TVAR_ash_pGAS[148] //
+{ 0x0F12, 0x00B6  },   //TVAR_ash_pGAS[149] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[150] //
+{ 0x0F12, 0x00D2  },   //TVAR_ash_pGAS[151] //
+{ 0x0F12, 0x00F3  },   //TVAR_ash_pGAS[152] //
+{ 0x0F12, 0x011D  },   //TVAR_ash_pGAS[153] //
+{ 0x0F12, 0x015A  },   //TVAR_ash_pGAS[154] //
+{ 0x0F12, 0x019E  },   //TVAR_ash_pGAS[155] //
+{ 0x0F12, 0x0171  },   //TVAR_ash_pGAS[156] //
+{ 0x0F12, 0x012E  },   //TVAR_ash_pGAS[157] //
+{ 0x0F12, 0x00F1  },   //TVAR_ash_pGAS[158] //
+{ 0x0F12, 0x00BF  },   //TVAR_ash_pGAS[159] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[160] //
+{ 0x0F12, 0x0081  },   //TVAR_ash_pGAS[161] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[162] //
+{ 0x0F12, 0x0080  },   //TVAR_ash_pGAS[163] //
+{ 0x0F12, 0x0097  },   //TVAR_ash_pGAS[164] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[165] //
+{ 0x0F12, 0x00EE  },   //TVAR_ash_pGAS[166] //
+{ 0x0F12, 0x012B  },   //TVAR_ash_pGAS[167] //
+{ 0x0F12, 0x0177  },   //TVAR_ash_pGAS[168] //
+{ 0x0F12, 0x0144  },   //TVAR_ash_pGAS[169] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_pGAS[170] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[171] //
+{ 0x0F12, 0x0088  },   //TVAR_ash_pGAS[172] //
+{ 0x0F12, 0x005F  },   //TVAR_ash_pGAS[173] //
+{ 0x0F12, 0x0049  },   //TVAR_ash_pGAS[174] //
+{ 0x0F12, 0x0041  },   //TVAR_ash_pGAS[175] //
+{ 0x0F12, 0x0049  },   //TVAR_ash_pGAS[176] //
+{ 0x0F12, 0x0061  },   //TVAR_ash_pGAS[177] //
+{ 0x0F12, 0x0089  },   //TVAR_ash_pGAS[178] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[179] //
+{ 0x0F12, 0x0104  },   //TVAR_ash_pGAS[180] //
+{ 0x0F12, 0x014D  },   //TVAR_ash_pGAS[181] //
+{ 0x0F12, 0x0122  },   //TVAR_ash_pGAS[182] //
+{ 0x0F12, 0x00DD  },   //TVAR_ash_pGAS[183] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[184] //
+{ 0x0F12, 0x005F  },   //TVAR_ash_pGAS[185] //
+{ 0x0F12, 0x0036  },   //TVAR_ash_pGAS[186] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[187] //
+{ 0x0F12, 0x0019  },   //TVAR_ash_pGAS[188] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[189] //
+{ 0x0F12, 0x003A  },   //TVAR_ash_pGAS[190] //
+{ 0x0F12, 0x0066  },   //TVAR_ash_pGAS[191] //
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[192] //
+{ 0x0F12, 0x00E6  },   //TVAR_ash_pGAS[193] //
+{ 0x0F12, 0x0130  },   //TVAR_ash_pGAS[194] //
+{ 0x0F12, 0x010B  },   //TVAR_ash_pGAS[195] //
+{ 0x0F12, 0x00C6  },   //TVAR_ash_pGAS[196] //
+{ 0x0F12, 0x0082  },   //TVAR_ash_pGAS[197] //
+{ 0x0F12, 0x0047  },   //TVAR_ash_pGAS[198] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[199] //
+{ 0x0F12, 0x000D  },   //TVAR_ash_pGAS[200] //
+{ 0x0F12, 0x0007  },   //TVAR_ash_pGAS[201] //
+{ 0x0F12, 0x000F  },   //TVAR_ash_pGAS[202] //
+{ 0x0F12, 0x0027  },   //TVAR_ash_pGAS[203] //
+{ 0x0F12, 0x0053  },   //TVAR_ash_pGAS[204] //
+{ 0x0F12, 0x008F  },   //TVAR_ash_pGAS[205] //
+{ 0x0F12, 0x00D6  },   //TVAR_ash_pGAS[206] //
+{ 0x0F12, 0x0121  },   //TVAR_ash_pGAS[207] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_pGAS[208] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[209] //
+{ 0x0F12, 0x0077  },   //TVAR_ash_pGAS[210] //
+{ 0x0F12, 0x0040  },   //TVAR_ash_pGAS[211] //
+{ 0x0F12, 0x001A  },   //TVAR_ash_pGAS[212] //
+{ 0x0F12, 0x0007  },   //TVAR_ash_pGAS[213] //
+{ 0x0F12, 0x0000  },   //TVAR_ash_pGAS[214] //
+{ 0x0F12, 0x000B  },   //TVAR_ash_pGAS[215] //
+{ 0x0F12, 0x0023  },   //TVAR_ash_pGAS[216] //
+{ 0x0F12, 0x004E  },   //TVAR_ash_pGAS[217] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[218] //
+{ 0x0F12, 0x00D3  },   //TVAR_ash_pGAS[219] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[220] //
+{ 0x0F12, 0x0103  },   //TVAR_ash_pGAS[221] //
+{ 0x0F12, 0x00C1  },   //TVAR_ash_pGAS[222] //
+{ 0x0F12, 0x007D  },   //TVAR_ash_pGAS[223] //
+{ 0x0F12, 0x0046  },   //TVAR_ash_pGAS[224] //
+{ 0x0F12, 0x0024  },   //TVAR_ash_pGAS[225] //
+{ 0x0F12, 0x0010  },   //TVAR_ash_pGAS[226] //
+{ 0x0F12, 0x0008  },   //TVAR_ash_pGAS[227] //
+{ 0x0F12, 0x0014  },   //TVAR_ash_pGAS[228] //
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[229] //
+{ 0x0F12, 0x0059  },   //TVAR_ash_pGAS[230] //
+{ 0x0F12, 0x0094  },   //TVAR_ash_pGAS[231] //
+{ 0x0F12, 0x00DB  },   //TVAR_ash_pGAS[232] //
+{ 0x0F12, 0x0125  },   //TVAR_ash_pGAS[233] //
+{ 0x0F12, 0x0117  },   //TVAR_ash_pGAS[234] //
+{ 0x0F12, 0x00D5  },   //TVAR_ash_pGAS[235] //
+{ 0x0F12, 0x0092  },   //TVAR_ash_pGAS[236] //
+{ 0x0F12, 0x005C  },   //TVAR_ash_pGAS[237] //
+{ 0x0F12, 0x0038  },   //TVAR_ash_pGAS[238] //
+{ 0x0F12, 0x0026  },   //TVAR_ash_pGAS[239] //
+{ 0x0F12, 0x0020  },   //TVAR_ash_pGAS[240] //
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[241] //
+{ 0x0F12, 0x0044  },   //TVAR_ash_pGAS[242] //
+{ 0x0F12, 0x006F  },   //TVAR_ash_pGAS[243] //
+{ 0x0F12, 0x00AC  },   //TVAR_ash_pGAS[244] //
+{ 0x0F12, 0x00F2  },   //TVAR_ash_pGAS[245] //
+{ 0x0F12, 0x013B  },   //TVAR_ash_pGAS[246] //
+{ 0x0F12, 0x0131  },   //TVAR_ash_pGAS[247] //
+{ 0x0F12, 0x00EE  },   //TVAR_ash_pGAS[248] //
+{ 0x0F12, 0x00B3  },   //TVAR_ash_pGAS[249] //
+{ 0x0F12, 0x007E  },   //TVAR_ash_pGAS[250] //
+{ 0x0F12, 0x005B  },   //TVAR_ash_pGAS[251] //
+{ 0x0F12, 0x0047  },   //TVAR_ash_pGAS[252] //
+{ 0x0F12, 0x0044  },   //TVAR_ash_pGAS[253] //
+{ 0x0F12, 0x004E  },   //TVAR_ash_pGAS[254] //
+{ 0x0F12, 0x0067  },   //TVAR_ash_pGAS[255] //
+{ 0x0F12, 0x0094  },   //TVAR_ash_pGAS[256] //
+{ 0x0F12, 0x00D0  },   //TVAR_ash_pGAS[257] //
+{ 0x0F12, 0x0112  },   //TVAR_ash_pGAS[258] //
+{ 0x0F12, 0x0159  },   //TVAR_ash_pGAS[259] //
+{ 0x0F12, 0x015E  },   //TVAR_ash_pGAS[260] //
+{ 0x0F12, 0x011B  },   //TVAR_ash_pGAS[261] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[262] //
+{ 0x0F12, 0x00B1  },   //TVAR_ash_pGAS[263] //
+{ 0x0F12, 0x008E  },   //TVAR_ash_pGAS[264] //
+{ 0x0F12, 0x007E  },   //TVAR_ash_pGAS[265] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[266] //
+{ 0x0F12, 0x0084  },   //TVAR_ash_pGAS[267] //
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[268] //
+{ 0x0F12, 0x00C8  },   //TVAR_ash_pGAS[269] //
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[270] //
+{ 0x0F12, 0x013A  },   //TVAR_ash_pGAS[271] //
+{ 0x0F12, 0x0185  },   //TVAR_ash_pGAS[272] //
+{ 0x0F12, 0x0188  },   //TVAR_ash_pGAS[273] //
+{ 0x0F12, 0x0148  },   //TVAR_ash_pGAS[274] //
+{ 0x0F12, 0x010D  },   //TVAR_ash_pGAS[275] //
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[276] //
+{ 0x0F12, 0x00C7  },   //TVAR_ash_pGAS[277] //
+{ 0x0F12, 0x00B4  },   //TVAR_ash_pGAS[278] //
+{ 0x0F12, 0x00B2  },   //TVAR_ash_pGAS[279] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[280] //
+{ 0x0F12, 0x00D9  },   //TVAR_ash_pGAS[281] //
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[282] //
+{ 0x0F12, 0x012F  },   //TVAR_ash_pGAS[283] //
+{ 0x0F12, 0x016D  },   //TVAR_ash_pGAS[284] //
+{ 0x0F12, 0x01A7  },   //TVAR_ash_pGAS[285] //
+{ 0x0F12, 0x018F  },   //TVAR_ash_pGAS[286] //
+{ 0x0F12, 0x014E  },   //TVAR_ash_pGAS[287] //
+{ 0x0F12, 0x0119  },   //TVAR_ash_pGAS[288] //
+{ 0x0F12, 0x00EC  },   //TVAR_ash_pGAS[289] //
+{ 0x0F12, 0x00CD  },   //TVAR_ash_pGAS[290] //
+{ 0x0F12, 0x00BB  },   //TVAR_ash_pGAS[291] //
+{ 0x0F12, 0x00B8  },   //TVAR_ash_pGAS[292] //
+{ 0x0F12, 0x00C4  },   //TVAR_ash_pGAS[293] //
+{ 0x0F12, 0x00DE  },   //TVAR_ash_pGAS[294] //
+{ 0x0F12, 0x0105  },   //TVAR_ash_pGAS[295] //
+{ 0x0F12, 0x0135  },   //TVAR_ash_pGAS[296] //
+{ 0x0F12, 0x0176  },   //TVAR_ash_pGAS[297] //
+{ 0x0F12, 0x01B8  },   //TVAR_ash_pGAS[298] //
+{ 0x0F12, 0x0161  },   //TVAR_ash_pGAS[299] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[300] //
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[301] //
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[302] //
+{ 0x0F12, 0x0093  },   //TVAR_ash_pGAS[303] //
+{ 0x0F12, 0x0080  },   //TVAR_ash_pGAS[304] //
+{ 0x0F12, 0x007C  },   //TVAR_ash_pGAS[305] //
+{ 0x0F12, 0x0087  },   //TVAR_ash_pGAS[306] //
+{ 0x0F12, 0x00A3  },   //TVAR_ash_pGAS[307] //
+{ 0x0F12, 0x00CD  },   //TVAR_ash_pGAS[308] //
+{ 0x0F12, 0x0104  },   //TVAR_ash_pGAS[309] //
+{ 0x0F12, 0x0142  },   //TVAR_ash_pGAS[310] //
+{ 0x0F12, 0x0192  },   //TVAR_ash_pGAS[311] //
+{ 0x0F12, 0x0136  },   //TVAR_ash_pGAS[312] //
+{ 0x0F12, 0x00F4  },   //TVAR_ash_pGAS[313] //
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[314] //
+{ 0x0F12, 0x0081  },   //TVAR_ash_pGAS[315] //
+{ 0x0F12, 0x005C  },   //TVAR_ash_pGAS[316] //
+{ 0x0F12, 0x0048  },   //TVAR_ash_pGAS[317] //
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[318] //
+{ 0x0F12, 0x004E  },   //TVAR_ash_pGAS[319] //
+{ 0x0F12, 0x006A  },   //TVAR_ash_pGAS[320] //
+{ 0x0F12, 0x0097  },   //TVAR_ash_pGAS[321] //
+{ 0x0F12, 0x00D0  },   //TVAR_ash_pGAS[322] //
+{ 0x0F12, 0x0116  },   //TVAR_ash_pGAS[323] //
+{ 0x0F12, 0x0160  },   //TVAR_ash_pGAS[324] //
+{ 0x0F12, 0x0118  },   //TVAR_ash_pGAS[325] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[326] //
+{ 0x0F12, 0x0093  },   //TVAR_ash_pGAS[327] //
+{ 0x0F12, 0x005B  },   //TVAR_ash_pGAS[328] //
+{ 0x0F12, 0x0035  },   //TVAR_ash_pGAS[329] //
+{ 0x0F12, 0x0020  },   //TVAR_ash_pGAS[330] //
+{ 0x0F12, 0x001B  },   //TVAR_ash_pGAS[331] //
+{ 0x0F12, 0x0024  },   //TVAR_ash_pGAS[332] //
+{ 0x0F12, 0x0041  },   //TVAR_ash_pGAS[333] //
+{ 0x0F12, 0x006F  },   //TVAR_ash_pGAS[334] //
+{ 0x0F12, 0x00AC  },   //TVAR_ash_pGAS[335] //
+{ 0x0F12, 0x00F3  },   //TVAR_ash_pGAS[336] //
+{ 0x0F12, 0x013F  },   //TVAR_ash_pGAS[337] //
+{ 0x0F12, 0x0105  },   //TVAR_ash_pGAS[338] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[339] //
+{ 0x0F12, 0x007F  },   //TVAR_ash_pGAS[340] //
+{ 0x0F12, 0x0046  },   //TVAR_ash_pGAS[341] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[342] //
+{ 0x0F12, 0x000E  },   //TVAR_ash_pGAS[343] //
+{ 0x0F12, 0x0007  },   //TVAR_ash_pGAS[344] //
+{ 0x0F12, 0x0010  },   //TVAR_ash_pGAS[345] //
+{ 0x0F12, 0x002A  },   //TVAR_ash_pGAS[346] //
+{ 0x0F12, 0x0058  },   //TVAR_ash_pGAS[347] //
+{ 0x0F12, 0x0094  },   //TVAR_ash_pGAS[348] //
+{ 0x0F12, 0x00DB  },   //TVAR_ash_pGAS[349] //
+{ 0x0F12, 0x0127  },   //TVAR_ash_pGAS[350] //
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[351] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[352] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[353] //
+{ 0x0F12, 0x0042  },   //TVAR_ash_pGAS[354] //
+{ 0x0F12, 0x001C  },   //TVAR_ash_pGAS[355] //
+{ 0x0F12, 0x0008  },   //TVAR_ash_pGAS[356] //
+{ 0x0F12, 0x0000  },   //TVAR_ash_pGAS[357] //
+{ 0x0F12, 0x000B  },   //TVAR_ash_pGAS[358] //
+{ 0x0F12, 0x0023  },   //TVAR_ash_pGAS[359] //
+{ 0x0F12, 0x0050  },   //TVAR_ash_pGAS[360] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[361] //
+{ 0x0F12, 0x00D3  },   //TVAR_ash_pGAS[362] //
+{ 0x0F12, 0x011D  },   //TVAR_ash_pGAS[363] //
+{ 0x0F12, 0x0108  },   //TVAR_ash_pGAS[364] //
+{ 0x0F12, 0x00C4  },   //TVAR_ash_pGAS[365] //
+{ 0x0F12, 0x0083  },   //TVAR_ash_pGAS[366] //
+{ 0x0F12, 0x004C  },   //TVAR_ash_pGAS[367] //
+{ 0x0F12, 0x0027  },   //TVAR_ash_pGAS[368] //
+{ 0x0F12, 0x0011  },   //TVAR_ash_pGAS[369] //
+{ 0x0F12, 0x0008  },   //TVAR_ash_pGAS[370] //
+{ 0x0F12, 0x0013  },   //TVAR_ash_pGAS[371] //
+{ 0x0F12, 0x002A  },   //TVAR_ash_pGAS[372] //
+{ 0x0F12, 0x0055  },   //TVAR_ash_pGAS[373] //
+{ 0x0F12, 0x008F  },   //TVAR_ash_pGAS[374] //
+{ 0x0F12, 0x00D5  },   //TVAR_ash_pGAS[375] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[376] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[377] //
+{ 0x0F12, 0x00DC  },   //TVAR_ash_pGAS[378] //
+{ 0x0F12, 0x009C  },   //TVAR_ash_pGAS[379] //
+{ 0x0F12, 0x0064  },   //TVAR_ash_pGAS[380] //
+{ 0x0F12, 0x003D  },   //TVAR_ash_pGAS[381] //
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[382] //
+{ 0x0F12, 0x001F  },   //TVAR_ash_pGAS[383] //
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[384] //
+{ 0x0F12, 0x003F  },   //TVAR_ash_pGAS[385] //
+{ 0x0F12, 0x0069  },   //TVAR_ash_pGAS[386] //
+{ 0x0F12, 0x00A3  },   //TVAR_ash_pGAS[387] //
+{ 0x0F12, 0x00E8  },   //TVAR_ash_pGAS[388] //
+{ 0x0F12, 0x012D  },   //TVAR_ash_pGAS[389] //
+{ 0x0F12, 0x013D  },   //TVAR_ash_pGAS[390] //
+{ 0x0F12, 0x00FB  },   //TVAR_ash_pGAS[391] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[392] //
+{ 0x0F12, 0x0089  },   //TVAR_ash_pGAS[393] //
+{ 0x0F12, 0x0063  },   //TVAR_ash_pGAS[394] //
+{ 0x0F12, 0x004C  },   //TVAR_ash_pGAS[395] //
+{ 0x0F12, 0x0045  },   //TVAR_ash_pGAS[396] //
+{ 0x0F12, 0x004B  },   //TVAR_ash_pGAS[397] //
+{ 0x0F12, 0x0061  },   //TVAR_ash_pGAS[398] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[399] //
+{ 0x0F12, 0x00C4  },   //TVAR_ash_pGAS[400] //
+{ 0x0F12, 0x0102  },   //TVAR_ash_pGAS[401] //
+{ 0x0F12, 0x014B  },   //TVAR_ash_pGAS[402] //
+{ 0x0F12, 0x016F  },   //TVAR_ash_pGAS[403] //
+{ 0x0F12, 0x0129  },   //TVAR_ash_pGAS[404] //
+{ 0x0F12, 0x00F0  },   //TVAR_ash_pGAS[405] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[406] //
+{ 0x0F12, 0x009A  },   //TVAR_ash_pGAS[407] //
+{ 0x0F12, 0x0084  },   //TVAR_ash_pGAS[408] //
+{ 0x0F12, 0x007B  },   //TVAR_ash_pGAS[409] //
+{ 0x0F12, 0x0082  },   //TVAR_ash_pGAS[410] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[411] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[412] //
+{ 0x0F12, 0x00EF  },   //TVAR_ash_pGAS[413] //
+{ 0x0F12, 0x0129  },   //TVAR_ash_pGAS[414] //
+{ 0x0F12, 0x0173  },   //TVAR_ash_pGAS[415] //
+{ 0x0F12, 0x01A0  },   //TVAR_ash_pGAS[416] //
+{ 0x0F12, 0x015B  },   //TVAR_ash_pGAS[417] //
+{ 0x0F12, 0x0121  },   //TVAR_ash_pGAS[418] //
+{ 0x0F12, 0x00F9  },   //TVAR_ash_pGAS[419] //
+{ 0x0F12, 0x00D8  },   //TVAR_ash_pGAS[420] //
+{ 0x0F12, 0x00C2  },   //TVAR_ash_pGAS[421] //
+{ 0x0F12, 0x00B7  },   //TVAR_ash_pGAS[422] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[423] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[424] //
+{ 0x0F12, 0x00F4  },   //TVAR_ash_pGAS[425] //
+{ 0x0F12, 0x0120  },   //TVAR_ash_pGAS[426] //
+{ 0x0F12, 0x015D  },   //TVAR_ash_pGAS[427] //
+{ 0x0F12, 0x0198  },   //TVAR_ash_pGAS[428] //
+{ 0x0F12, 0x013A  },   //TVAR_ash_pGAS[429] //
+{ 0x0F12, 0x010B  },   //TVAR_ash_pGAS[430] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[431] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[432] //
+{ 0x0F12, 0x00A7  },   //TVAR_ash_pGAS[433] //
+{ 0x0F12, 0x009A  },   //TVAR_ash_pGAS[434] //
+{ 0x0F12, 0x0097  },   //TVAR_ash_pGAS[435] //
+{ 0x0F12, 0x00A2  },   //TVAR_ash_pGAS[436] //
+{ 0x0F12, 0x00B9  },   //TVAR_ash_pGAS[437] //
+{ 0x0F12, 0x00D6  },   //TVAR_ash_pGAS[438] //
+{ 0x0F12, 0x00FD  },   //TVAR_ash_pGAS[439] //
+{ 0x0F12, 0x0133  },   //TVAR_ash_pGAS[440] //
+{ 0x0F12, 0x0165  },   //TVAR_ash_pGAS[441] //
+{ 0x0F12, 0x0117  },   //TVAR_ash_pGAS[442] //
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[443] //
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[444] //
+{ 0x0F12, 0x0091  },   //TVAR_ash_pGAS[445] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[446] //
+{ 0x0F12, 0x006D  },   //TVAR_ash_pGAS[447] //
+{ 0x0F12, 0x0069  },   //TVAR_ash_pGAS[448] //
+{ 0x0F12, 0x0072  },   //TVAR_ash_pGAS[449] //
+{ 0x0F12, 0x0088  },   //TVAR_ash_pGAS[450] //
+{ 0x0F12, 0x00A9  },   //TVAR_ash_pGAS[451] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[452] //
+{ 0x0F12, 0x0108  },   //TVAR_ash_pGAS[453] //
+{ 0x0F12, 0x0148  },   //TVAR_ash_pGAS[454] //
+{ 0x0F12, 0x00F1  },   //TVAR_ash_pGAS[455] //
+{ 0x0F12, 0x00BD  },   //TVAR_ash_pGAS[456] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[457] //
+{ 0x0F12, 0x0063  },   //TVAR_ash_pGAS[458] //
+{ 0x0F12, 0x0049  },   //TVAR_ash_pGAS[459] //
+{ 0x0F12, 0x003D  },   //TVAR_ash_pGAS[460] //
+{ 0x0F12, 0x003A  },   //TVAR_ash_pGAS[461] //
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[462] //
+{ 0x0F12, 0x0057  },   //TVAR_ash_pGAS[463] //
+{ 0x0F12, 0x007A  },   //TVAR_ash_pGAS[464] //
+{ 0x0F12, 0x00A8  },   //TVAR_ash_pGAS[465] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[466] //
+{ 0x0F12, 0x011B  },   //TVAR_ash_pGAS[467] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[468] //
+{ 0x0F12, 0x00A1  },   //TVAR_ash_pGAS[469] //
+{ 0x0F12, 0x006D  },   //TVAR_ash_pGAS[470] //
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[471] //
+{ 0x0F12, 0x0027  },   //TVAR_ash_pGAS[472] //
+{ 0x0F12, 0x001B  },   //TVAR_ash_pGAS[473] //
+{ 0x0F12, 0x0019  },   //TVAR_ash_pGAS[474] //
+{ 0x0F12, 0x001E  },   //TVAR_ash_pGAS[475] //
+{ 0x0F12, 0x0033  },   //TVAR_ash_pGAS[476] //
+{ 0x0F12, 0x0057  },   //TVAR_ash_pGAS[477] //
+{ 0x0F12, 0x0087  },   //TVAR_ash_pGAS[478] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[479] //
+{ 0x0F12, 0x00FA  },   //TVAR_ash_pGAS[480] //
+{ 0x0F12, 0x00C1  },   //TVAR_ash_pGAS[481] //
+{ 0x0F12, 0x008F  },   //TVAR_ash_pGAS[482] //
+{ 0x0F12, 0x005B  },	//TVAR_ash_pGAS[483] //                                                                        
+{ 0x0F12, 0x0031  },	//TVAR_ash_pGAS[484] //                                                                        
+{ 0x0F12, 0x0016  },	//TVAR_ash_pGAS[485] //                                                                        
+{ 0x0F12, 0x000B  },	//TVAR_ash_pGAS[486] //                                                                        
+{ 0x0F12, 0x0006  },	//TVAR_ash_pGAS[487] //                                                                        
+{ 0x0F12, 0x000D  },	//TVAR_ash_pGAS[488] //                                                                        
+{ 0x0F12, 0x001F  },	//TVAR_ash_pGAS[489] //                                                                        
+{ 0x0F12, 0x0042  },	//TVAR_ash_pGAS[490] //                                                                        
+{ 0x0F12, 0x0070  },	//TVAR_ash_pGAS[491] //                                                                        
+{ 0x0F12, 0x00AA  },	//TVAR_ash_pGAS[492] //                                                                        
+{ 0x0F12, 0x00E5  },	//TVAR_ash_pGAS[493] //                                                                        
+{ 0x0F12, 0x00BD  },	//TVAR_ash_pGAS[494] //                                                                        
+{ 0x0F12, 0x008A  },	//TVAR_ash_pGAS[495] //                                                                        
+{ 0x0F12, 0x0056  },	//TVAR_ash_pGAS[496] //                                                                        
+{ 0x0F12, 0x002C  },	//TVAR_ash_pGAS[497] //                                                                        
+{ 0x0F12, 0x0011  },	//TVAR_ash_pGAS[498] //                                                                        
+{ 0x0F12, 0x0005  },	//TVAR_ash_pGAS[499] //                                                                        
+{ 0x0F12, 0x0000  },	//TVAR_ash_pGAS[500] //                                                                        
+{ 0x0F12, 0x0008  },	//TVAR_ash_pGAS[501] //                                                                        
+{ 0x0F12, 0x0018  },	//TVAR_ash_pGAS[502] //                                                                        
+{ 0x0F12, 0x0039  },	//TVAR_ash_pGAS[503] //                                                                        
+{ 0x0F12, 0x0068  },	//TVAR_ash_pGAS[504] //                                                                        
+{ 0x0F12, 0x00A1  },	//TVAR_ash_pGAS[505] //                                                                        
+{ 0x0F12, 0x00DA  },	//TVAR_ash_pGAS[506] //                                                                        
+{ 0x0F12, 0x00C4  },	//TVAR_ash_pGAS[507] //                                                                        
+{ 0x0F12, 0x0092  },	//TVAR_ash_pGAS[508] //                                                                        
+{ 0x0F12, 0x005F  },	//TVAR_ash_pGAS[509] //                                                                        
+{ 0x0F12, 0x0034  },	//TVAR_ash_pGAS[510] //                                                                        
+{ 0x0F12, 0x001B  },	//TVAR_ash_pGAS[511] //                                                                        
+{ 0x0F12, 0x000D  },	//TVAR_ash_pGAS[512] //                                                                        
+{ 0x0F12, 0x0007  },	//TVAR_ash_pGAS[513] //                                                                        
+{ 0x0F12, 0x000E  },	//TVAR_ash_pGAS[514] //                                                                        
+{ 0x0F12, 0x001E  },	//TVAR_ash_pGAS[515] //                                                                        
+{ 0x0F12, 0x003E  },	//TVAR_ash_pGAS[516] //                                                                        
+{ 0x0F12, 0x006A  },	//TVAR_ash_pGAS[517] //                                                                        
+{ 0x0F12, 0x00A2  },	//TVAR_ash_pGAS[518] //                                                                        
+{ 0x0F12, 0x00DB  },	//TVAR_ash_pGAS[519] //                                                                        
+{ 0x0F12, 0x00D7  },	//TVAR_ash_pGAS[520] //                                                                        
+{ 0x0F12, 0x00A3  },	//TVAR_ash_pGAS[521] //                                                                        
+{ 0x0F12, 0x0073  },	//TVAR_ash_pGAS[522] //                                                                        
+{ 0x0F12, 0x0049  },	//TVAR_ash_pGAS[523] //                                                                        
+{ 0x0F12, 0x002F  },	//TVAR_ash_pGAS[524] //                                                                        
+{ 0x0F12, 0x0022  },	//TVAR_ash_pGAS[525] //                                                                        
+{ 0x0F12, 0x001B  },	//TVAR_ash_pGAS[526] //                                                                        
+{ 0x0F12, 0x0023  },	//TVAR_ash_pGAS[527] //                                                                        
+{ 0x0F12, 0x0031  },	//TVAR_ash_pGAS[528] //                                                                        
+{ 0x0F12, 0x0050  },	//TVAR_ash_pGAS[529] //                                                                        
+{ 0x0F12, 0x007C  },	//TVAR_ash_pGAS[530] //                                                                        
+{ 0x0F12, 0x00B1  },	//TVAR_ash_pGAS[531] //                                                                        
+{ 0x0F12, 0x00E9  },	//TVAR_ash_pGAS[532] //                                                                        
+{ 0x0F12, 0x00F2  },	//TVAR_ash_pGAS[533] //                                                                        
+{ 0x0F12, 0x00C0  },	//TVAR_ash_pGAS[534] //                                                                        
+{ 0x0F12, 0x0091  },	//TVAR_ash_pGAS[535] //                                                                        
+{ 0x0F12, 0x006A  },	//TVAR_ash_pGAS[536] //                                                                        
+{ 0x0F12, 0x0050  },	//TVAR_ash_pGAS[537] //                                                                        
+{ 0x0F12, 0x0041  },	//TVAR_ash_pGAS[538] //                                                                        
+{ 0x0F12, 0x003C  },	//TVAR_ash_pGAS[539] //                                                                        
+{ 0x0F12, 0x0040  },	//TVAR_ash_pGAS[540] //                                                                        
+{ 0x0F12, 0x004F  },	//TVAR_ash_pGAS[541] //                                                                        
+{ 0x0F12, 0x006D  },	//TVAR_ash_pGAS[542] //                                                                        
+{ 0x0F12, 0x0099  },	//TVAR_ash_pGAS[543] //                                                                        
+{ 0x0F12, 0x00C9  },	//TVAR_ash_pGAS[544] //                                                                        
+{ 0x0F12, 0x0102  },	//TVAR_ash_pGAS[545] //                                                                        
+{ 0x0F12, 0x0120  },	//TVAR_ash_pGAS[546] //                                                                        
+{ 0x0F12, 0x00EB  },	//TVAR_ash_pGAS[547] //                                                                        
+{ 0x0F12, 0x00BE  },	//TVAR_ash_pGAS[548] //                                                                        
+{ 0x0F12, 0x0099  },	//TVAR_ash_pGAS[549] //                                                                        
+{ 0x0F12, 0x0081  },	//TVAR_ash_pGAS[550] //                                                                        
+{ 0x0F12, 0x0074  },	//TVAR_ash_pGAS[551] //                                                                        
+{ 0x0F12, 0x006F  },	//TVAR_ash_pGAS[552] //                                                                        
+{ 0x0F12, 0x0071  },	//TVAR_ash_pGAS[553] //                                                                        
+{ 0x0F12, 0x0082  },	//TVAR_ash_pGAS[554] //                                                                        
+{ 0x0F12, 0x009B  },	//TVAR_ash_pGAS[555] //                                                                        
+{ 0x0F12, 0x00C0  },	//TVAR_ash_pGAS[556] //                                                                        
+{ 0x0F12, 0x00EE  },	//TVAR_ash_pGAS[557] //                                                                        
+{ 0x0F12, 0x0126  },	//TVAR_ash_pGAS[558] //                                                                        
+{ 0x0F12, 0x0147  },	//TVAR_ash_pGAS[559] //                                                                        
+{ 0x0F12, 0x0116  },	//TVAR_ash_pGAS[560] //                                                                        
+{ 0x0F12, 0x00E7  },	//TVAR_ash_pGAS[561] //                                                                        
+{ 0x0F12, 0x00C9  },	//TVAR_ash_pGAS[562] //                                                                        
+{ 0x0F12, 0x00B4  },	//TVAR_ash_pGAS[563] //                                                                        
+{ 0x0F12, 0x00A7  },	//TVAR_ash_pGAS[564] //                                                                        
+{ 0x0F12, 0x00A0  },	//TVAR_ash_pGAS[565] //                                                                        
+{ 0x0F12, 0x00A3  },	//TVAR_ash_pGAS[566] //                                                                        
+{ 0x0F12, 0x00B1  },	//TVAR_ash_pGAS[567] //                                                                        
+{ 0x0F12, 0x00C9  },	//TVAR_ash_pGAS[568] //                                                                        
+{ 0x0F12, 0x00EA  },	//TVAR_ash_pGAS[569] //                                                                        
+{ 0x0F12, 0x011B  },	//TVAR_ash_pGAS[570] //                                                                        
+{ 0x0F12, 0x0141  },	//TVAR_ash_pGAS[571] //                                                                        
+                        
+{ 0x002A, 0x074E  },	    
+{ 0x0F12, 0x0001  },	//ash_bLumaMode //         	                                                                        
+{ 0x002A, 0x0D30  },                               
+{ 0x0F12, 0x02A8  },	//awbb_GLocu //        
+{ 0x0F12, 0x0347  },	//awbb_GLocuSB //      
+                                                   
+{ 0x002A, 0x06B8  },                               
+{ 0x0F12, 0x00C0  },	//TVAR_ash_AwbashCord[0] //                                                                        
+{ 0x0F12, 0x00E0  },	//TVAR_ash_AwbashCord[1] //                                                                        
+{ 0x0F12, 0x0120  },	//TVAR_ash_AwbashCord[2] //                                                                        
+{ 0x0F12, 0x0124  },	//TVAR_ash_AwbashCord[3] //                                                                        
+{ 0x0F12, 0x0156  },	//TVAR_ash_AwbashCord[4] //                                                                        
+{ 0x0F12, 0x017F  },	//TVAR_ash_AwbashCord[5] //                                                                        
+{ 0x0F12, 0x018F  },	//TVAR_ash_AwbashCord[6] //                                                                        
+                                                   
+                                                   
+{ 0x002A, 0x0664  },                               
+{ 0x0F12, 0x013E  },	//seti_uContrastCenter //                                                                          
+                                                   
+                                                   
+{ 0x002A, 0x06C6  },                               
+{ 0x0F12, 0x010B  },	//ash_CGrasalphaS[0] //
+{ 0x0F12, 0x0103  },	//ash_CGrasalphaS[1] //
+{ 0x0F12, 0x00FC  },	//ash_CGrasalphaS[2] //
+{ 0x0F12, 0x010C  },	//ash_CGrasalphaS[3] //
+                        
+{ 0x002A, 0x0C48  },    
+{ 0x0F12, 0x03C8  },	//awbb_IndoorGrZones_m_BGrid[0] // 		                                                                        
+{ 0x0F12, 0x03DE  },	//awbb_IndoorGrZones_m_BGrid[1] //                                                                         
+{ 0x0F12, 0x0372  },	//awbb_IndoorGrZones_m_BGrid[2] //                                                                         
+{ 0x0F12, 0x03EA  },	//awbb_IndoorGrZones_m_BGrid[3] //                                                                         
+{ 0x0F12, 0x0336  },	//awbb_IndoorGrZones_m_BGrid[4] //                                                                         
+{ 0x0F12, 0x03DE  },	//awbb_IndoorGrZones_m_BGrid[5] //                                                                         
+{ 0x0F12, 0x0302  },	//awbb_IndoorGrZones_m_BGrid[6] //                                                                         
+{ 0x0F12, 0x03A2  },	//awbb_IndoorGrZones_m_BGrid[7] //                                                                         
+{ 0x0F12, 0x02C8  },	//awbb_IndoorGrZones_m_BGrid[8] //                                                                         
+{ 0x0F12, 0x0368  },	//awbb_IndoorGrZones_m_BGrid[9] //                                                                         
+{ 0x0F12, 0x0292  },	//awbb_IndoorGrZones_m_BGrid[10] //                                                                        
+{ 0x0F12, 0x033A  },	//awbb_IndoorGrZones_m_BGrid[11] //                                                                        
+{ 0x0F12, 0x0276  },	//awbb_IndoorGrZones_m_BGrid[12] //                                                                        
+{ 0x0F12, 0x0306  },	//awbb_IndoorGrZones_m_BGrid[13] //                                                                        
+{ 0x0F12, 0x025A  },	//awbb_IndoorGrZones_m_BGrid[14] //                                                                        
+{ 0x0F12, 0x02C2  },	//awbb_IndoorGrZones_m_BGrid[15] //                                                                        
+{ 0x0F12, 0x0246  },	//awbb_IndoorGrZones_m_BGrid[16] //                                                                        
+{ 0x0F12, 0x02A2  },	//awbb_IndoorGrZones_m_BGrid[17] //                                                                        
+{ 0x0F12, 0x0232  },	//awbb_IndoorGrZones_m_BGrid[18] //                                                                        
+{ 0x0F12, 0x0298  },	//awbb_IndoorGrZones_m_BGrid[19] //                                                                        
+{ 0x0F12, 0x021E  },	//awbb_IndoorGrZones_m_BGrid[20] //                                                                        
+{ 0x0F12, 0x027E  },	//awbb_IndoorGrZones_m_BGrid[21] //                                                                        
+{ 0x0F12, 0x0208  },	//awbb_IndoorGrZones_m_BGrid[22] //                                                                        
+{ 0x0F12, 0x026C  },	//awbb_IndoorGrZones_m_BGrid[23] //                                                                        
+{ 0x0F12, 0x01EE  },	//awbb_IndoorGrZones_m_BGrid[24] //                                                                        
+{ 0x0F12, 0x025C  },	//awbb_IndoorGrZones_m_BGrid[25] //                                                                        
+{ 0x0F12, 0x01F0  },	//awbb_IndoorGrZones_m_BGrid[26] //                                                                        
+{ 0x0F12, 0x0248  },	//awbb_IndoorGrZones_m_BGrid[27] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[28] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[29] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[30] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[31] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[32] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[33] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[34] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[35] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[36] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[37] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[38] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[39] //                                                                        
+                                                           
+{ 0x0F12, 0x0005  },   //awbb_IndoorGrZones_m_Gridstep //  
+
+{ 0x002A, 0x0C9C  },
+{ 0x0F12, 0x000E  },
+{ 0x002A, 0x0CA0  },                                       
+{ 0x0F12, 0x0108  },	//awbb_IndoorGrZones_m_Boffs //
+                                                           
+{ 0x002A, 0x0CE0  },                                       
+{ 0x0F12, 0x03D4  },	//awbb_LowBrGrZones_m_BGrid[0] //                                                                          
+{ 0x0F12, 0x043E  },	//awbb_LowBrGrZones_m_BGrid[1] //                                                                          
+{ 0x0F12, 0x035C  },	//awbb_LowBrGrZones_m_BGrid[2] //                                                                          
+{ 0x0F12, 0x0438  },	//awbb_LowBrGrZones_m_BGrid[3] //                                                                          
+{ 0x0F12, 0x02F0  },	//awbb_LowBrGrZones_m_BGrid[4] //                                                                          
+{ 0x0F12, 0x042D  },	//awbb_LowBrGrZones_m_BGrid[5] //                                                                          
+{ 0x0F12, 0x029A  },	//awbb_LowBrGrZones_m_BGrid[6] //                                                                          
+{ 0x0F12, 0x03EF  },	//awbb_LowBrGrZones_m_BGrid[7] //                                                                          
+{ 0x0F12, 0x025E  },	//awbb_LowBrGrZones_m_BGrid[8] //                                                                          
+{ 0x0F12, 0x0395  },	//awbb_LowBrGrZones_m_BGrid[9] //                                                                          
+{ 0x0F12, 0x022E  },	//awbb_LowBrGrZones_m_BGrid[10] //                                                                         
+{ 0x0F12, 0x0346  },	//awbb_LowBrGrZones_m_BGrid[11] //                                                                         
+{ 0x0F12, 0x0200  },	//awbb_LowBrGrZones_m_BGrid[12] //                                                                         
+{ 0x0F12, 0x02F6  },	//awbb_LowBrGrZones_m_BGrid[13] //                                                                         
+{ 0x0F12, 0x01CE  },	//awbb_LowBrGrZones_m_BGrid[14] //                                                                         
+{ 0x0F12, 0x02C8  },	//awbb_LowBrGrZones_m_BGrid[15] //                                                                         
+{ 0x0F12, 0x01BB  },	//awbb_LowBrGrZones_m_BGrid[16] //                                                                         
+{ 0x0F12, 0x0287  },	//awbb_LowBrGrZones_m_BGrid[17] //                                                                         
+{ 0x0F12, 0x01E2  },	//awbb_LowBrGrZones_m_BGrid[18] //                                                                         
+{ 0x0F12, 0x0239  },	//awbb_LowBrGrZones_m_BGrid[19] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[20] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[21] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[22] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[23] //                                                                         
+                        
+{ 0x0F12, 0x0006  },	//awbb_LowBrGrZones_m_Gridstep //	                                                                        
+{ 0x002A, 0x0D18  },                                     
+{ 0x0F12, 0x00AE  },	//awbb_LowBrGrZones_m_Boff //
+                        
+{ 0x002A, 0x0CA4  },    
+{ 0x0F12, 0x026E  },	//0294//0286//02C2//awbb_OutdoorGrZones_m_BGrid[0] // 		                                                                        
+{ 0x0F12, 0x02A4  },	//02CB//02BD//02E0//awbb_OutdoorGrZones_m_BGrid[1] //                                                                         
+{ 0x0F12, 0x0262  },	//027A//026C//0278//awbb_OutdoorGrZones_m_BGrid[2] //                                                                         
+{ 0x0F12, 0x02A8  },	//02D7//02C9//02BC//awbb_OutdoorGrZones_m_BGrid[3] //                                                                         
+{ 0x0F12, 0x0256  },	//0266//0258//025A//awbb_OutdoorGrZones_m_BGrid[4] //                                                                         
+{ 0x0F12, 0x02AE  },	//02BF//02B1//02A2//awbb_OutdoorGrZones_m_BGrid[5] //                                                                         
+{ 0x0F12, 0x0248  },	//0252//0244//024A//awbb_OutdoorGrZones_m_BGrid[6] //                                                                         
+{ 0x0F12, 0x02A4  },	//02A8//029A//0288//awbb_OutdoorGrZones_m_BGrid[7] //                                                                         
+{ 0x0F12, 0x023E  },	//023E//0230//0240//awbb_OutdoorGrZones_m_BGrid[8] //                                                                         
+{ 0x0F12, 0x029A  },	//028F//0281//0278//awbb_OutdoorGrZones_m_BGrid[9] //                                                                         
+{ 0x0F12, 0x023A  },	//0239//022B//023E//awbb_OutdoorGrZones_m_BGrid[10] //                                                                        
+{ 0x0F12, 0x0290  },	//027A//026C//0254//awbb_OutdoorGrZones_m_BGrid[11] //                                                                        
+{ 0x0F12, 0x023A  },	//024A//023C//0000//awbb_OutdoorGrZones_m_BGrid[12] //                                                                        
+{ 0x0F12, 0x027E  },	//0260//0252//0000//awbb_OutdoorGrZones_m_BGrid[13] //                                                                        
+{ 0x0F12, 0x0244  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[14] //                                                                        
+{ 0x0F12, 0x0266  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[15] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[16] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[17] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[18] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[19] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[20] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[21] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[22] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[23] //                                                                        
+                  
+{ 0x0F12, 0x0004  },	//awbb_OutdoorGrZones_m_Gridstep //               
+{ 0x002A, 0x0CD8  },
+{ 0x0F12, 0x0008  },
+{ 0x002A, 0x0CDC  },                                                          
+{ 0x0F12, 0x0204  },	//awbb_OutdoorGrZones_m_Boff //                   
+{ 0x002A, 0x0D1C  },                                                          
+{ 0x0F12, 0x037C  },	//awbb_CrclLowT_R_c //                            
+{ 0x002A, 0x0D20  },                                                          
+{ 0x0F12, 0x0157  },	//awbb_CrclLowT_B_c //                            
+{ 0x002A, 0x0D24  },                                                          
+{ 0x0F12, 0x3EB8  },	//awbb_CrclLowT_Rad_c //                          
+                        
+{ 0x002A, 0x0D2C  },    
+{ 0x0F12, 0x013D  },	//awbb_IntcR //	                                                                        
+{ 0x0F12, 0x011E  },	//awbb_IntcB //                                                                        
+{ 0x002A, 0x0D46  },    
+{ 0x0F12, 0x04C0  },	//0554//055D//0396//04A2//awbb_MvEq_RBthresh //	                                                                        
+                        
+                        
+                        
+{ 0x002A, 0x0D28  },    //wp outdoor
+{ 0x0F12, 0x0270  },	                                                                        
+{ 0x0F12, 0x0240  },	                                                                        
+                        
+                  
+{ 0x002A, 0x0D5C  },    
+{ 0x0F12, 0x7FFF  },	                                                                        
+{ 0x0F12, 0x0050  },	                                                                        
+                        
+{ 0x002A, 0x2316  },    
+{ 0x0F12, 0x0006  },	                                                                        
+                        
+{ 0x002A, 0x0E44  },    
+{ 0x0F12, 0x0525  },	                                                                        
+{ 0x0F12, 0x0400  },	                                                                        
+{ 0x0F12, 0x078C  },	                                                                        
+                        
+{ 0x002A, 0x0E36  },    
+{ 0x0F12, 0x0028  },	 //R OFFSET                                                                       
+{ 0x0F12, 0xFFD8  },	 //B OFFSET                                                                       
+{ 0x0F12, 0x0000  },	 //G OFFSET                                                                       
+                        
+{ 0x002A, 0x0DD4  },    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[0] //        	                                                                        
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[1] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[2] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[3] //    
+{ 0x0F12, 0xFFF0  },	//awbb_GridCorr_R[4] //    
+{ 0x0F12, 0x0080  },	//awbb_GridCorr_R[5] //    
+                   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[6] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[7] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[8] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[9] //    
+{ 0x0F12, 0xFFF0  },	//awbb_GridCorr_R[10] //   
+{ 0x0F12, 0x0080  },	//awbb_GridCorr_R[11] //   
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[12] //   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[13] //   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[14] //   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[15] //   
+{ 0x0F12, 0xFFF0  },	//awbb_GridCorr_R[16] //   
+{ 0x0F12, 0x0080  },	//awbb_GridCorr_R[17] //   
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[0] ////                                                                        
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[1] //                                                                          
+{ 0x0F12, 0x0032  },	//awbb_GridCorr_B[2] //                                                                          
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[3] //                                                                          
+{ 0x0F12, 0x0020  },	//awbb_GridCorr_B[4] //                                                                          
+{ 0x0F12, 0xFFC0  },	//awbb_GridCorr_B[5] //                                                                          
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[6] //                                                                          
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[7] //                                                                          
+{ 0x0F12, 0x0032  },	//awbb_GridCorr_B[8] //                                                                          
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[9] //                                                                          
+{ 0x0F12, 0x0020  },	//awbb_GridCorr_B[10] //                                                                         
+{ 0x0F12, 0xFFC0  },	//awbb_GridCorr_B[11] //                                                                         
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[12] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[13] //                                                                         
+{ 0x0F12, 0x0032  },	//awbb_GridCorr_B[14] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[15] //                                                                         
+{ 0x0F12, 0x0020  },	//awbb_GridCorr_B[16] //   
+{ 0x0F12, 0xFFC0  },	//awbb_GridCorr_B[17] //                 
+                   
+{ 0x0F12, 0x02D9  },	//awbb_GridConst_1[0] //                                                                     
+{ 0x0F12, 0x0357  },	//awbb_GridConst_1[1] //                                                                     
+{ 0x0F12, 0x03D1  },	//awbb_GridConst_1[2] //                                                                     
+                   
+                   
+{ 0x0F12, 0x0DF6  },	//0E4F//0DE9//0DE9//awbb_GridConst_2[0] //                                                   
+{ 0x0F12, 0x0ED8  },	//0EDD//0EDD//0EDD//awbb_GridConst_2[1] //                                                   
+{ 0x0F12, 0x0F51  },	//0F42//0F42//0F42//awbb_GridConst_2[2] //                                                   
+{ 0x0F12, 0x0F5C  },	//0F4E//0F4E//0F54//awbb_GridConst_2[3] //                                                   
+{ 0x0F12, 0x0F8F  },	//0F99//0F99//0FAE//awbb_GridConst_2[4] //                                                   
+{ 0x0F12, 0x1006  },	//1006//1006//1011//awbb_GridConst_2[5] //                                                   
+                   
+{ 0x0F12, 0x00AC  },	//00BA//awbb_GridCoeff_R_1                                                                   
+{ 0x0F12, 0x00BD  },	//00AF//awbb_GridCoeff_B_1                                                                   
+{ 0x0F12, 0x0049  },	//0049//awbb_GridCoeff_R_2                                                                   
+{ 0x0F12, 0x00F5  },	//00F5//awbb_GridCoeff_B_2                                                                   
+                   
+{ 0x002A, 0x0E4A  },                         
+{ 0x0F12, 0x0002  },	//awbb_GridEnable//                                                                          
+                   
+{ 0x002A, 0x051A  },                         
+{ 0x0F12, 0x010E  },	//lt_uLimitHigh//
+{ 0x0F12, 0x00F5  },	//lt_uLimitLow// 
+                   
+                   
+{ 0x002A, 0x0F76  },                         
+{ 0x0F12, 0x0007  },	//ae_statmode BLC off : 0x0F, on : 0x0D//  illumType On : 07 , Off : 0F
+                   
+{ 0x002A, 0x1034  },                         
+{ 0x0F12, 0x00C0  },	//saRR_IllumType[0] //                                                                       
+{ 0x0F12, 0x00E0  },	//saRR_IllumType[1] //                                                                       
+{ 0x0F12, 0x0104  },	//saRR_IllumType[2] //                                                                       
+{ 0x0F12, 0x0129  },	//saRR_IllumType[3] //                                                                       
+{ 0x0F12, 0x0156  },	//saRR_IllumType[4] //                                                                       
+{ 0x0F12, 0x017F  },	//saRR_IllumType[5] //                                                                       
+{ 0x0F12, 0x018F  },	//saRR_IllumType[6] //                                                                       
+                   
+                   
+{ 0x0F12, 0x0120  },	//saRR_IllumTypeF[0] //                                                                      
+{ 0x0F12, 0x0120  },	//saRR_IllumTypeF[1] //                                                                      
+{ 0x0F12, 0x0120  },	//saRR_IllumTypeF[2] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[3] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[4] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[5] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[6] //                                                                      
+                        
+                        
+                        
+{ 0x002A, 0x3288  },	//saRR_usDualGammaLutRGBIndoor  //               	                                                                        
+{ 0x0F12, 0x0000  }, //	saRR_usDualGammaLutRGBIndoor[0] //[0] //                                                 
+{ 0x0F12, 0x0008  }, //  saRR_usDualGammaLutRGBIndoor[0] //[1] //                                                       
+{ 0x0F12, 0x0013  }, //  saRR_usDualGammaLutRGBIndoor[0] //[2] //                                                       
+{ 0x0F12, 0x002C  }, //  saRR_usDualGammaLutRGBIndoor[0] //[3] //                                                       
+{ 0x0F12, 0x0062  }, //  saRR_usDualGammaLutRGBIndoor[0] //[4] //                                                       
+{ 0x0F12, 0x00CD  }, //  saRR_usDualGammaLutRGBIndoor[0] //[5] //                                                       
+{ 0x0F12, 0x0129  }, //  saRR_usDualGammaLutRGBIndoor[0] //[6] //                                                       
+{ 0x0F12, 0x0151  }, //  saRR_usDualGammaLutRGBIndoor[0] //[7] //                                                       
+{ 0x0F12, 0x0174  }, //  saRR_usDualGammaLutRGBIndoor[0] //[8] //                                                       
+{ 0x0F12, 0x01AA  }, //  saRR_usDualGammaLutRGBIndoor[0] //[9] //                                                       
+{ 0x0F12, 0x01D7  }, //  saRR_usDualGammaLutRGBIndoor[0] //[10] //                                                      
+{ 0x0F12, 0x01FE  }, //  saRR_usDualGammaLutRGBIndoor[0] //[11] //                                                      
+{ 0x0F12, 0x0221  }, //  saRR_usDualGammaLutRGBIndoor[0] //[12] //                                                      
+{ 0x0F12, 0x025D  }, //  saRR_usDualGammaLutRGBIndoor[0] //[13] //                                                      
+{ 0x0F12, 0x0291  }, //  saRR_usDualGammaLutRGBIndoor[0] //[14] //                                                      
+{ 0x0F12, 0x02EB  }, //  saRR_usDualGammaLutRGBIndoor[0] //[15] //                                                      
+{ 0x0F12, 0x033A  }, //  saRR_usDualGammaLutRGBIndoor[0] //[16] //                                                      
+{ 0x0F12, 0x0380  }, //  saRR_usDualGammaLutRGBIndoor[0] //[17] //                                                      
+{ 0x0F12, 0x03C2  }, //  saRR_usDualGammaLutRGBIndoor[0] //[18] //                                                      
+{ 0x0F12, 0x03FF  }, //  saRR_usDualGammaLutRGBIndoor[0] //[19] //                                                      
+{ 0x0F12, 0x0000  }, //  saRR_usDualGammaLutRGBIndoor[1] //[0] //                                                       
+{ 0x0F12, 0x0008  }, //  saRR_usDualGammaLutRGBIndoor[1] //[1] //                                                       
+{ 0x0F12, 0x0013  }, //  saRR_usDualGammaLutRGBIndoor[1] //[2] //                                                       
+{ 0x0F12, 0x002C  }, //  saRR_usDualGammaLutRGBIndoor[1] //[3] //                                                       
+{ 0x0F12, 0x0062  }, //  saRR_usDualGammaLutRGBIndoor[1] //[4] //                                                       
+{ 0x0F12, 0x00CD  }, //  saRR_usDualGammaLutRGBIndoor[1] //[5] //                                                       
+{ 0x0F12, 0x0129  }, //  saRR_usDualGammaLutRGBIndoor[1] //[6] //                                                       
+{ 0x0F12, 0x0151  }, //  saRR_usDualGammaLutRGBIndoor[1] //[7] //                                                       
+{ 0x0F12, 0x0174  }, //  saRR_usDualGammaLutRGBIndoor[1] //[8] //                                                       
+{ 0x0F12, 0x01AA  }, //  saRR_usDualGammaLutRGBIndoor[1] //[9] //                                                       
+{ 0x0F12, 0x01D7  }, //  saRR_usDualGammaLutRGBIndoor[1] //[10] //                                                      
+{ 0x0F12, 0x01FE  }, //  saRR_usDualGammaLutRGBIndoor[1] //[11] //                                                      
+{ 0x0F12, 0x0221  }, //  saRR_usDualGammaLutRGBIndoor[1] //[12] //                                                      
+{ 0x0F12, 0x025D  }, //  saRR_usDualGammaLutRGBIndoor[1] //[13] //                                                      
+{ 0x0F12, 0x0291  }, //  saRR_usDualGammaLutRGBIndoor[1] //[14] //                                                      
+{ 0x0F12, 0x02EB  }, //  saRR_usDualGammaLutRGBIndoor[1] //[15] //                                                      
+{ 0x0F12, 0x033A  }, //  saRR_usDualGammaLutRGBIndoor[1] //[16] //                                                      
+{ 0x0F12, 0x0380  }, //  saRR_usDualGammaLutRGBIndoor[1] //[17] //                                                      
+{ 0x0F12, 0x03C2  }, //  saRR_usDualGammaLutRGBIndoor[1] //[18] //                                                      
+{ 0x0F12, 0x03FF  }, //  saRR_usDualGammaLutRGBIndoor[1] //[19] //                                                      
+{ 0x0F12, 0x0000  }, //  saRR_usDualGammaLutRGBIndoor[2] //[0] //                                                       
+{ 0x0F12, 0x0008  }, //  saRR_usDualGammaLutRGBIndoor[2] //[1] //                                                       
+{ 0x0F12, 0x0013  }, //  saRR_usDualGammaLutRGBIndoor[2] //[2] //                                                       
+{ 0x0F12, 0x002C  }, //  saRR_usDualGammaLutRGBIndoor[2] //[3] //                                                       
+{ 0x0F12, 0x0062  }, //  saRR_usDualGammaLutRGBIndoor[2] //[4] //                                                       
+{ 0x0F12, 0x00CD  }, //  saRR_usDualGammaLutRGBIndoor[2] //[5] //                                                       
+{ 0x0F12, 0x0129  }, //  saRR_usDualGammaLutRGBIndoor[2] //[6] //                                                       
+{ 0x0F12, 0x0151  }, //  saRR_usDualGammaLutRGBIndoor[2] //[7] //                                                       
+{ 0x0F12, 0x0174  }, //  saRR_usDualGammaLutRGBIndoor[2] //[8] //                                                       
+{ 0x0F12, 0x01AA  }, //  saRR_usDualGammaLutRGBIndoor[2] //[9] //                                                       
+{ 0x0F12, 0x01D7  }, //  saRR_usDualGammaLutRGBIndoor[2] //[10] //                                                      
+{ 0x0F12, 0x01FE  }, //  saRR_usDualGammaLutRGBIndoor[2] //[11] //                                                      
+{ 0x0F12, 0x0221  }, //  saRR_usDualGammaLutRGBIndoor[2] //[12] //                                                      
+{ 0x0F12, 0x025D  }, //  saRR_usDualGammaLutRGBIndoor[2] //[13] //                                                      
+{ 0x0F12, 0x0291  }, //  saRR_usDualGammaLutRGBIndoor[2] //[14] //                                                      
+{ 0x0F12, 0x02EB  }, //  saRR_usDualGammaLutRGBIndoor[2] //[15] //                                                      
+{ 0x0F12, 0x033A  }, //  saRR_usDualGammaLutRGBIndoor[2] //[16] //                                                      
+{ 0x0F12, 0x0380  }, //  saRR_usDualGammaLutRGBIndoor[2] //[17] //                                                      
+{ 0x0F12, 0x03C2  }, //  saRR_usDualGammaLutRGBIndoor[2] //[18] //                                                      
+{ 0x0F12, 0x03FF  }, //  saRR_usDualGammaLutRGBIndoor[2] //[19] //                                                      
+                                               
+                                               
+{ 0x0F12, 0x0000  },	//			saRR_usDualGammaLutRGBOutdoor[0] //[0] //
+{ 0x0F12, 0x0008  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[1] //                                                
+{ 0x0F12, 0x0013  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[2] //                                                
+{ 0x0F12, 0x002C  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[3] //                                                
+{ 0x0F12, 0x0062  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[4] //                                                
+{ 0x0F12, 0x00CD  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[5] //                                                
+{ 0x0F12, 0x0129  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[6] //                                                
+{ 0x0F12, 0x0151  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[7] //                                                
+{ 0x0F12, 0x0174  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[8] //                                                
+{ 0x0F12, 0x01AA  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[9] //                                                
+{ 0x0F12, 0x01D7  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[10] //                                               
+{ 0x0F12, 0x01FE  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[11] //                                               
+{ 0x0F12, 0x0221  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[12] //                                               
+{ 0x0F12, 0x025D  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[13] //                                               
+{ 0x0F12, 0x0291  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[14] //                                               
+{ 0x0F12, 0x02EB  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[15] //                                               
+{ 0x0F12, 0x033A  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[16] //                                               
+{ 0x0F12, 0x0380  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[17] //                                               
+{ 0x0F12, 0x03C2  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[18] //                                               
+{ 0x0F12, 0x03FF  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[19] //                                               
+{ 0x0F12, 0x0000  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[0] //                                                
+{ 0x0F12, 0x0008  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[1] //                                                
+{ 0x0F12, 0x0013  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[2] //                                                
+{ 0x0F12, 0x002C  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[3] //                                                
+{ 0x0F12, 0x0062  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[4] //                                                
+{ 0x0F12, 0x00CD  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[5] //                                                
+{ 0x0F12, 0x0129  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[6] //                                                
+{ 0x0F12, 0x0151  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[7] //                                                
+{ 0x0F12, 0x0174  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[8] //                                                
+{ 0x0F12, 0x01AA  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[9] //                                                
+{ 0x0F12, 0x01D7  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[10] //                                               
+{ 0x0F12, 0x01FE  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[11] //                                               
+{ 0x0F12, 0x0221  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[12] //                                               
+{ 0x0F12, 0x025D  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[13] //                                               
+{ 0x0F12, 0x0291  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[14] //                                               
+{ 0x0F12, 0x02EB  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[15] //                                               
+{ 0x0F12, 0x033A  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[16] //                                               
+{ 0x0F12, 0x0380  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[17] //                                               
+{ 0x0F12, 0x03C2  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[18] //                                               
+{ 0x0F12, 0x03FF  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[19] //                                               
+{ 0x0F12, 0x0000  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[0] //                                                
+{ 0x0F12, 0x0008  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[1] //                                                
+{ 0x0F12, 0x0013  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[2] //                                                
+{ 0x0F12, 0x002C  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[3] //                                                
+{ 0x0F12, 0x0062  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[4] //                                                
+{ 0x0F12, 0x00CD  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[5] //                                                
+{ 0x0F12, 0x0129  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[6] //                                                
+{ 0x0F12, 0x0151  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[7] //                                                
+{ 0x0F12, 0x0174  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[8] //                                                
+{ 0x0F12, 0x01AA  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[9] //                                                
+{ 0x0F12, 0x01D7  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[10] //                                               
+{ 0x0F12, 0x01FE  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[11] //                                               
+{ 0x0F12, 0x0221  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[12] //                                               
+{ 0x0F12, 0x025D  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[13] //                                               
+{ 0x0F12, 0x0291  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[14] //                                               
+{ 0x0F12, 0x02EB  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[15] //                                               
+{ 0x0F12, 0x033A  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[16] //                                               
+{ 0x0F12, 0x0380  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[17] //                                               
+{ 0x0F12, 0x03C2  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[18] //                                               
+{ 0x0F12, 0x03FF  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[19] //                                               
+                                               
+                                               
+{ 0x002A, 0x06A6  },                           
+{ 0x0F12, 0x00C0  },	//saRR_AwbCcmCord[0] //                      
+{ 0x0F12, 0x00E0  },	//saRR_AwbCcmCord[1] //                      
+{ 0x0F12, 0x0110  },	//saRR_AwbCcmCord[2] //                      
+{ 0x0F12, 0x0139  },	//saRR_AwbCcmCord[3] //                      
+{ 0x0F12, 0x0166  },	//saRR_AwbCcmCord[4] //                      
+{ 0x0F12, 0x019F  },	//saRR_AwbCcmCord[5] //                      
+                        
+{ 0x002A, 0x33A4  },    
+{ 0x0F12, 0x0181  },	  //TVAR_wbt_pBaseCcmS[0] //                                                           
+{ 0x0F12, 0xFF88  },   //TVAR_wbt_pBaseCcmS[1] //                                                        
+{ 0x0F12, 0xFF90  },   //TVAR_wbt_pBaseCcmS[2] //                                                        
+{ 0x0F12, 0xFE6B  },   //TVAR_wbt_pBaseCcmS[3] //                                                        
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[4] //                                                        
+{ 0x0F12, 0xFF0B  },   //TVAR_wbt_pBaseCcmS[5] //                                                        
+{ 0x0F12, 0xFFDD  },   //TVAR_wbt_pBaseCcmS[6] //                                                        
+{ 0x0F12, 0xFFEE  },   //TVAR_wbt_pBaseCcmS[7] //                                                        
+{ 0x0F12, 0x01CB  },   //TVAR_wbt_pBaseCcmS[8] //                                                        
+{ 0x0F12, 0x0187  },   //TVAR_wbt_pBaseCcmS[9] //                                                        
+{ 0x0F12, 0x00A6  },   //TVAR_wbt_pBaseCcmS[10] //                                                       
+{ 0x0F12, 0xFEBE  },   //TVAR_wbt_pBaseCcmS[11] //                                                       
+{ 0x0F12, 0x021C  },   //TVAR_wbt_pBaseCcmS[12] //                                                       
+{ 0x0F12, 0xFF5F  },   //TVAR_wbt_pBaseCcmS[13] //                                                       
+{ 0x0F12, 0x0175  },   //TVAR_wbt_pBaseCcmS[14] //                                                       
+{ 0x0F12, 0xFEE7  },   //TVAR_wbt_pBaseCcmS[15] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[16] //                                                       
+{ 0x0F12, 0x00F3  },   //TVAR_wbt_pBaseCcmS[17] //                                                       
+                       
+{ 0x0F12, 0x0181  },   //TVAR_wbt_pBaseCcmS[18] //                                                       
+{ 0x0F12, 0xFF88  },   //TVAR_wbt_pBaseCcmS[19] //                                                       
+{ 0x0F12, 0xFF90  },   //TVAR_wbt_pBaseCcmS[20] //                                                       
+{ 0x0F12, 0xFE6B  },   //TVAR_wbt_pBaseCcmS[21] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[22] //                                                       
+{ 0x0F12, 0xFF0B  },   //TVAR_wbt_pBaseCcmS[23] //                                                       
+{ 0x0F12, 0xFFDD  },   //TVAR_wbt_pBaseCcmS[24] //                                                       
+{ 0x0F12, 0xFFEE  },   //TVAR_wbt_pBaseCcmS[25] //                                                       
+{ 0x0F12, 0x01CB  },   //TVAR_wbt_pBaseCcmS[26] //                                                       
+{ 0x0F12, 0x0187  },   //TVAR_wbt_pBaseCcmS[27] //                                                       
+{ 0x0F12, 0x00A6  },   //TVAR_wbt_pBaseCcmS[28] //                                                       
+{ 0x0F12, 0xFEBE  },   //TVAR_wbt_pBaseCcmS[29] //                                                       
+{ 0x0F12, 0x021C  },   //TVAR_wbt_pBaseCcmS[30] //                                                       
+{ 0x0F12, 0xFF5F  },   //TVAR_wbt_pBaseCcmS[31] //                                                       
+{ 0x0F12, 0x0175  },   //TVAR_wbt_pBaseCcmS[32] //                                                       
+{ 0x0F12, 0xFEE7  },   //TVAR_wbt_pBaseCcmS[33] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[34] //                                                       
+{ 0x0F12, 0x00F3  },   //TVAR_wbt_pBaseCcmS[35] //                                                       
+                       
+{ 0x0F12, 0x0181  },   //TVAR_wbt_pBaseCcmS[36] //                                                       
+{ 0x0F12, 0xFF88  },   //TVAR_wbt_pBaseCcmS[37] //                                                       
+{ 0x0F12, 0xFF90  },   //TVAR_wbt_pBaseCcmS[38] //                                                       
+{ 0x0F12, 0xFE6B  },   //TVAR_wbt_pBaseCcmS[39] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[40] //                                                       
+{ 0x0F12, 0xFF0B  },   //TVAR_wbt_pBaseCcmS[41] //                                                       
+{ 0x0F12, 0xFFDD  },   //TVAR_wbt_pBaseCcmS[42] //                                                       
+{ 0x0F12, 0xFFEE  },   //TVAR_wbt_pBaseCcmS[43] //                                                       
+{ 0x0F12, 0x01CB  },   //TVAR_wbt_pBaseCcmS[44] //                                                       
+{ 0x0F12, 0x0187  },   //TVAR_wbt_pBaseCcmS[45] //                                                       
+{ 0x0F12, 0x00A6  },   //TVAR_wbt_pBaseCcmS[46] //                                                       
+{ 0x0F12, 0xFEBE  },   //TVAR_wbt_pBaseCcmS[47] //                                                       
+{ 0x0F12, 0x021C  },   //TVAR_wbt_pBaseCcmS[48] //                                                       
+{ 0x0F12, 0xFF5F  },   //TVAR_wbt_pBaseCcmS[49] //                                                       
+{ 0x0F12, 0x0175  },   //TVAR_wbt_pBaseCcmS[50] //                                                       
+{ 0x0F12, 0xFEE7  },   //TVAR_wbt_pBaseCcmS[51] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[52] //                                                       
+{ 0x0F12, 0x00F3  },   //TVAR_wbt_pBaseCcmS[53] //                                                                        
+                       
+{ 0x0F12, 0x01D4  },  //01E9 01FD 01FA   //TVAR_wbt_pBaseCcmS[54] //                                                       
+{ 0x0F12, 0xFFC3  },  //FFB7 FFAB FF9B   //TVAR_wbt_pBaseCcmS[55] //                                                       
+{ 0x0F12, 0xFFFE  },  //FFF5 FFED FFFF   //TVAR_wbt_pBaseCcmS[56] //                                                       
+{ 0x0F12, 0xFEB5  },  //FEB5 FEB5 FE9F   //TVAR_wbt_pBaseCcmS[57] //                                                       
+{ 0x0F12, 0x0112  },  //0112 0112 010F   //TVAR_wbt_pBaseCcmS[58] //                                                       
+{ 0x0F12, 0xFEDC  },  //FEDC FEDC FEF5   //TVAR_wbt_pBaseCcmS[59] //                                                       
+{ 0x0F12, 0xFFD2  },  //FFD2 FFD2 FFD2   //TVAR_wbt_pBaseCcmS[60] //                                                       
+{ 0x0F12, 0x0015  },  //0015 0015 0015   //TVAR_wbt_pBaseCcmS[61] //                                                       
+{ 0x0F12, 0x01A1  },  //01A1 01A1 01A1   //TVAR_wbt_pBaseCcmS[62] //                                                       
+{ 0x0F12, 0x0111  },  //0111 0111 0111   //TVAR_wbt_pBaseCcmS[63] //                                                       
+{ 0x0F12, 0x009D  },  //009D 009D 009D   //TVAR_wbt_pBaseCcmS[64] //                                                       
+{ 0x0F12, 0xFECB  },  //FECB FECB FECB   //TVAR_wbt_pBaseCcmS[65] //                                                       
+{ 0x0F12, 0x01FC  },  //01FC 01FC 01FC   //TVAR_wbt_pBaseCcmS[66] //                                                       
+{ 0x0F12, 0xFF99  },  //FF99 FF99 FF99   //TVAR_wbt_pBaseCcmS[67] //                                                       
+{ 0x0F12, 0x01A9  },  //01A9 01A9 01A9   //TVAR_wbt_pBaseCcmS[68] //                                                       
+{ 0x0F12, 0xFF26  },  //FF26 FF26 FF26   //TVAR_wbt_pBaseCcmS[69] //                                                       
+{ 0x0F12, 0x012B  },  //012B 012B 012B   //TVAR_wbt_pBaseCcmS[70] //                                                       
+{ 0x0F12, 0x00DF  },  //00DF 00DF 00DF   //TVAR_wbt_pBaseCcmS[71] //    
+                           
+{ 0x0F12, 0x01B9  },  //01CE 01E3 01E2   //TVAR_wbt_pBaseCcmS[72] //                                                 
+{ 0x0F12, 0xFFBC  },  //FFB0 FFA4 FF9A   //TVAR_wbt_pBaseCcmS[73] //                                                 
+{ 0x0F12, 0xFFED  },  //FFE4 FFDB FFE7   //TVAR_wbt_pBaseCcmS[74] //                                                 
+{ 0x0F12, 0xFEB5  },  //FEB5 FEB5 FE9F   //TVAR_wbt_pBaseCcmS[75] //                                                 
+{ 0x0F12, 0x0112  },  //0112 0112 010F   //TVAR_wbt_pBaseCcmS[76] //                                                 
+{ 0x0F12, 0xFEDC  },  //FEDC FEDC FEF5   //TVAR_wbt_pBaseCcmS[77] //                                                 
+{ 0x0F12, 0xFFD2  },  //FFD2 FFD2 FFD2   //TVAR_wbt_pBaseCcmS[78] //                                                 
+{ 0x0F12, 0xFFFE  },  //FFFE FFFE FFFE   //TVAR_wbt_pBaseCcmS[79] //                                                 
+{ 0x0F12, 0x01B7  },  //01B7 01B7 01B7   //TVAR_wbt_pBaseCcmS[80] //                                                 
+{ 0x0F12, 0x00E8  },  //00E8 00E8 00E8   //TVAR_wbt_pBaseCcmS[81] //                                                 
+{ 0x0F12, 0x0095  },  //0095 0095 0095   //TVAR_wbt_pBaseCcmS[82] //                                                 
+{ 0x0F12, 0xFF0D  },  //FF0D FF0D FF0D   //TVAR_wbt_pBaseCcmS[83] //                                                 
+{ 0x0F12, 0x0182  },  //0182 0182 0182   //TVAR_wbt_pBaseCcmS[84] //                                                 
+{ 0x0F12, 0xFF29  },  //FF29 FF29 FF29   //TVAR_wbt_pBaseCcmS[85] //                                                 
+{ 0x0F12, 0x0146  },  //0146 0146 0146   //TVAR_wbt_pBaseCcmS[86] //                                                 
+{ 0x0F12, 0xFF26  },  //FF26 FF26 FF26   //TVAR_wbt_pBaseCcmS[87] //                                                 
+{ 0x0F12, 0x012B  },  //012B 012B 012B   //TVAR_wbt_pBaseCcmS[88] //                                                 
+{ 0x0F12, 0x00DF  },  //00DF 00DF 00DF   //TVAR_wbt_pBaseCcmS[89] //                                                                         
+                  
+{ 0x0F12, 0x01B9  },  //01CE 01E3 01E2   //TVAR_wbt_pBaseCcmS[90] //                                                 
+{ 0x0F12, 0xFFBC  },  //FFB0 FFA4 FF9A   //TVAR_wbt_pBaseCcmS[91] //                                                 
+{ 0x0F12, 0xFFED  },  //FFE4 FFDB FFE7   //TVAR_wbt_pBaseCcmS[92] //                                                 
+{ 0x0F12, 0xFEB5  },  //FEB5 FEB5 FE9F   //TVAR_wbt_pBaseCcmS[93] //                                                 
+{ 0x0F12, 0x0112  },  //0112 0112 010F   //TVAR_wbt_pBaseCcmS[94] //                                                 
+{ 0x0F12, 0xFEDC  },  //FEDC FEDC FEF5   //TVAR_wbt_pBaseCcmS[95] //                                                 
+{ 0x0F12, 0xFFD2  },  //FFD2 FFD2 FFD2   //TVAR_wbt_pBaseCcmS[96] //                                                 
+{ 0x0F12, 0xFFFE  },  //FFFE FFFE FFFE   //TVAR_wbt_pBaseCcmS[97] //                                                 
+{ 0x0F12, 0x01B7  },  //01B7 01B7 01B7   //TVAR_wbt_pBaseCcmS[98] //                                                 
+{ 0x0F12, 0x00E8  },  //00E8 00E8 00E8   //TVAR_wbt_pBaseCcmS[99] //                                                 
+{ 0x0F12, 0x0095  },  //0095 0095 0095   //TVAR_wbt_pBaseCcmS[100] //                                                
+{ 0x0F12, 0xFF0D  },  //FF0D FF0D FF0D   //TVAR_wbt_pBaseCcmS[101] //                                                
+{ 0x0F12, 0x0182  },  //0182 0182 0182   //TVAR_wbt_pBaseCcmS[102] //                                                
+{ 0x0F12, 0xFF29  },  //FF29 FF29 FF29   //TVAR_wbt_pBaseCcmS[103] //                                                
+{ 0x0F12, 0x0146  },  //0146 0146 0146   //TVAR_wbt_pBaseCcmS[104] //                                                
+{ 0x0F12, 0xFF26  },  //FF26 FF26 FF26   //TVAR_wbt_pBaseCcmS[105] //                                                
+{ 0x0F12, 0x012B  },  //012B 012B 012B   //TVAR_wbt_pBaseCcmS[106] //                                                
+{ 0x0F12, 0x00DF  },  //00DF 00DF 00DF   //TVAR_wbt_pBaseCcmS[107] //                                                
+                                          
+{ 0x002A, 0x3380  },  //12çŸ«å¼¥åˆ©     
+{ 0x0F12, 0x01E5  },  //01E5 020E 0223   //0223  //01F3  //01F3  //TVAR_wbt_pOutdoorCcm[0] //  
+{ 0x0F12, 0xFFA0  },  //FFA0 FF88 FF7C   //FF7C  //FFA4  //FFA4  //TVAR_wbt_pOutdoorCcm[1] //  
+{ 0x0F12, 0xFFDF  },  //FFDF FFCE FFC5   //FFC5  //FFE4  //FFE4  //TVAR_wbt_pOutdoorCcm[2] //  
+{ 0x0F12, 0xFE3D  },  //FE3D FE3D FE3D   //FE3D  //FE3D  //FE23  //TVAR_wbt_pOutdoorCcm[3] //  
+{ 0x0F12, 0x0158  },  //0158 0158 0158   //0158  //0158  //017D  //TVAR_wbt_pOutdoorCcm[4] //  
+{ 0x0F12, 0xFF03  },  //FF03 FF03 FF03   //FF03  //FF03  //FEF9  //TVAR_wbt_pOutdoorCcm[5] //  
+{ 0x0F12, 0xFFD2  },  //FFBB FF99 FF9F   //FF9F  //FF9F  //FF9F  //TVAR_wbt_pOutdoorCcm[6] //  
+{ 0x0F12, 0x0002  },  //FFF0 0018 0011   //0011  //0011  //0011  //TVAR_wbt_pOutdoorCcm[7] //  
+{ 0x0F12, 0x0211  },  //023A 0235 0237   //0237  //0237  //0237  //TVAR_wbt_pOutdoorCcm[8] //  
+{ 0x0F12, 0x00F6  },  //00EB 0101 00EB   //00D1  //012A  //0143  //TVAR_wbt_pOutdoorCcm[9] //  
+{ 0x0F12, 0x0120  },  //012A 0116 012A   //0125  //00CA  //00F6  //TVAR_wbt_pOutdoorCcm[10] // 
+{ 0x0F12, 0xFF01  },  //FF02 FF00 FF02   //FEF5  //FEF6  //FEB1  //TVAR_wbt_pOutdoorCcm[11] // 
+{ 0x0F12, 0x01A4  },  //01A4 01C5 01C5   //01C5  //01C5  //01C5  //TVAR_wbt_pOutdoorCcm[12] // 
+{ 0x0F12, 0xFF95  },  //FF95 FF80 FF80   //FF80  //FF80  //FF80  //TVAR_wbt_pOutdoorCcm[13] // 
+{ 0x0F12, 0x01A9  },  //01A9 019D 019D   //019D  //019D  //019D  //TVAR_wbt_pOutdoorCcm[14] // 
+{ 0x0F12, 0xFEA3  },  //FE7A FE7A FE7A   //FE7A  //FE7A  //FE7A  //TVAR_wbt_pOutdoorCcm[15] // 
+{ 0x0F12, 0x0164  },  //0179 0179 0179   //0179  //0179  //0179  //TVAR_wbt_pOutdoorCcm[16] // 
+{ 0x0F12, 0x0164  },  //0179 0179 0179   //0179  //0179  //0179  //TVAR_wbt_pOutdoorCcm[17] // 
+                      
+                           
+                           
+{ 0x002A, 0x0764  },       
+{ 0x0F12, 0x0049  },	//afit_uNoiseIndInDoor[0] //                                                                         
+{ 0x0F12, 0x005F  },	//afit_uNoiseIndInDoor[1] //                                                                         
+{ 0x0F12, 0x00CB  },	//afit_uNoiseIndInDoor[2] // 203//                                                                   
+{ 0x0F12, 0x01E0  },	//afit_uNoiseIndInDoor[3] // Indoor_NB below 1500 _Noise index 300-400d //                           
+{ 0x0F12, 0x0220  },	//afit_uNoiseIndInDoor[4] // DNP NB 4600 _ Noisenidex :560d-230h //                                  
+                           
+                           
+{ 0x002A, 0x07C4  },       
+{ 0x0F12, 0x0014  },	//700007C4 //TVAR_afit_pBaseValS[0] // AFIT16_BRIGHTNESS                                                                                  
+{ 0x0F12, 0x0000  },	//700007C6 //TVAR_afit_pBaseValS[1] // AFIT16_CONTRAST                                                                                    
+{ 0x0F12, 0x0014  },	//700007C8 //TVAR_afit_pBaseValS[2] // AFIT16_SATURATION                                                                                  
+{ 0x0F12, 0x0000  },	//700007CA //TVAR_afit_pBaseValS[3] // AFIT16_SHARP_BLUR                                                                                  
+{ 0x0F12, 0x0000  },	//700007CC //TVAR_afit_pBaseValS[4] // AFIT16_GLAMOUR                                                                                     
+{ 0x0F12, 0x00C1  },	//700007CE //TVAR_afit_pBaseValS[5] // AFIT16_sddd8a_edge_high                                                                            
+{ 0x0F12, 0x03FF  },	//700007D0 //TVAR_afit_pBaseValS[6] // AFIT16_Demosaicing_iSatVal                                                                         
+{ 0x0F12, 0x009C  },	//700007D2 //TVAR_afit_pBaseValS[7] // AFIT16_Sharpening_iReduceEdgeThresh                                                                
+{ 0x0F12, 0x0251  },	//700007D4 //TVAR_afit_pBaseValS[8] // AFIT16_demsharpmix1_iRGBOffset                                                                     
+{ 0x0F12, 0x03FF  },	//700007D6 //TVAR_afit_pBaseValS[9] // AFIT16_demsharpmix1_iDemClamp                                                                      
+{ 0x0F12, 0x000C  },	//700007D8 //TVAR_afit_pBaseValS[10] //AFIT16_demsharpmix1_iLowThreshold                                                                  
+{ 0x0F12, 0x0010  },	//700007DA //TVAR_afit_pBaseValS[11] //AFIT16_demsharpmix1_iHighThreshold                                                                 
+{ 0x0F12, 0x012C  },	//700007DC //TVAR_afit_pBaseValS[12] //AFIT16_demsharpmix1_iLowBright                                                                     
+{ 0x0F12, 0x03E8  },	//700007DE //TVAR_afit_pBaseValS[13] //AFIT16_demsharpmix1_iHighBright                                                                    
+{ 0x0F12, 0x0046  },	//700007E0 //TVAR_afit_pBaseValS[14] //AFIT16_demsharpmix1_iLowSat                                                                        
+{ 0x0F12, 0x005A  },	//700007E2 //TVAR_afit_pBaseValS[15] //AFIT16_demsharpmix1_iHighSat                                                                       
+{ 0x0F12, 0x0070  },	//700007E4 //TVAR_afit_pBaseValS[16] //AFIT16_demsharpmix1_iTune                                                                          
+{ 0x0F12, 0x0000  },	//700007E6 //TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0000  },	//700007E8 //TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh                                                                    
+{ 0x0F12, 0x01AA  },	//700007EA //TVAR_afit_pBaseValS[19] //AFIT16_demsharpmix1_iHystCenter                                                                    
+{ 0x0F12, 0x003C  },	//700007EC //TVAR_afit_pBaseValS[20] //AFIT16_YUV422_DENOISE_iUVLowThresh                                                                 
+{ 0x0F12, 0x003C  },	//700007EE //TVAR_afit_pBaseValS[21] //AFIT16_YUV422_DENOISE_iUVHighThresh                                                                
+{ 0x0F12, 0x0000  },	//700007F0 //TVAR_afit_pBaseValS[22] //AFIT16_YUV422_DENOISE_iYLowThresh                                                                  
+{ 0x0F12, 0x0000  },	//700007F2 //TVAR_afit_pBaseValS[23] //AFIT16_YUV422_DENOISE_iYHighThresh                                                                 
+{ 0x0F12, 0x003E  },	//700007F4 //TVAR_afit_pBaseValS[24] //AFIT16_Sharpening_iLowSharpClamp                                                                   
+{ 0x0F12, 0x0008  },	//700007F6 //TVAR_afit_pBaseValS[25] //AFIT16_Sharpening_iHighSharpClamp                                                                  
+{ 0x0F12, 0x003C  },	//700007F8 //TVAR_afit_pBaseValS[26] //AFIT16_Sharpening_iLowSharpClamp_Bin                                                               
+{ 0x0F12, 0x001E  },	//700007FA //TVAR_afit_pBaseValS[27] //AFIT16_Sharpening_iHighSharpClamp_Bin                                                              
+{ 0x0F12, 0x003C  },	//700007FC //TVAR_afit_pBaseValS[28] //AFIT16_Sharpening_iLowSharpClamp_sBin                                                              
+{ 0x0F12, 0x001E  },	//700007FE //TVAR_afit_pBaseValS[29] //AFIT16_Sharpening_iHighSharpClamp_sBin                                                             
+{ 0x0F12, 0x0A24  },	//70000800 //TVAR_afit_pBaseValS[30] //AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                     
+{ 0x0F12, 0x1701  },	//70000802 //TVAR_afit_pBaseValS[31] //AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                      
+{ 0x0F12, 0x0229  },	//70000804 //TVAR_afit_pBaseValS[32] //AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                            
+{ 0x0F12, 0x1403  },	//70000806 //TVAR_afit_pBaseValS[33] //AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                 
+{ 0x0F12, 0x0000  },	//70000808 //TVAR_afit_pBaseValS[34] //AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                               
+{ 0x0F12, 0x0000  },	//7000080A //TVAR_afit_pBaseValS[35] //AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                             
+{ 0x0F12, 0x0000  },	//7000080C //TVAR_afit_pBaseValS[36] //AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                              
+{ 0x0F12, 0x00FF  },	//7000080E //TVAR_afit_pBaseValS[37] //AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                       
+{ 0x0F12, 0x045A  },	//70000810 //TVAR_afit_pBaseValS[38] //AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                                
+{ 0x0F12, 0x1414  },	//70000812 //TVAR_afit_pBaseValS[39] //AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                  
+{ 0x0F12, 0x0301  },	//70000814 //TVAR_afit_pBaseValS[40] //AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                          
+{ 0x0F12, 0xFF07  },	//70000816 //TVAR_afit_pBaseValS[41] //AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                          
+{ 0x0F12, 0x081E  },	//70000818 //TVAR_afit_pBaseValS[42] //AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                     
+{ 0x0F12, 0x0A14  },	//7000081A //TVAR_afit_pBaseValS[43] //AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                        
+{ 0x0F12, 0x0F0F  },	//7000081C //TVAR_afit_pBaseValS[44] //AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                    
+{ 0x0F12, 0x0A00  },	//7000081E //TVAR_afit_pBaseValS[45] //AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                 
+{ 0x0F12, 0x0032  },	//70000820 //TVAR_afit_pBaseValS[46] //AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                             
+{ 0x0F12, 0x000E  },	//70000822 //TVAR_afit_pBaseValS[47] //AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                             
+{ 0x0F12, 0x0002  },	//70000824 //TVAR_afit_pBaseValS[48] //AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                      
+{ 0x0F12, 0x00FF  },	//70000826 //TVAR_afit_pBaseValS[49] //AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                     
+{ 0x0F12, 0x1102  },	//70000828 //TVAR_afit_pBaseValS[50] //AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                          
+{ 0x0F12, 0x001B  },	//7000082A //TVAR_afit_pBaseValS[51] //AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                            
+{ 0x0F12, 0x0900  },	//7000082C //TVAR_afit_pBaseValS[52] //AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                       
+{ 0x0F12, 0x0600  },	//7000082E //TVAR_afit_pBaseValS[53] //AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                      
+{ 0x0F12, 0x0504  },	//70000830 //TVAR_afit_pBaseValS[54] //AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                   
+{ 0x0F12, 0x0306  },	//70000832 //TVAR_afit_pBaseValS[55] //AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                      
+{ 0x0F12, 0x4603  },	//70000834 //TVAR_afit_pBaseValS[56] //AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                       
+{ 0x0F12, 0x0480  },	//70000836 //TVAR_afit_pBaseValS[57] //AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                              
+{ 0x0F12, 0x003C  },	//70000838 //TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                  
+{ 0x0F12, 0x0080  },	//7000083A //TVAR_afit_pBaseValS[59] //AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                   
+{ 0x0F12, 0x0101  },	//7000083C //TVAR_afit_pBaseValS[60] //AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                             
+{ 0x0F12, 0x0707  },	//7000083E //TVAR_afit_pBaseValS[61] //AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                                
+{ 0x0F12, 0x4601  },	//70000840 //TVAR_afit_pBaseValS[62] //AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                 
+{ 0x0F12, 0x4944  },	//70000842 //TVAR_afit_pBaseValS[63] //AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                                
+{ 0x0F12, 0x5044  },	//70000844 //TVAR_afit_pBaseValS[64] //AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                            
+{ 0x0F12, 0x0500  },	//70000846 //TVAR_afit_pBaseValS[65] //AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]             
+{ 0x0F12, 0x0003  },	//70000848 //TVAR_afit_pBaseValS[66] //AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                   
+{ 0x0F12, 0x5400  },	//7000084A //TVAR_afit_pBaseValS[67] //AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                 
+{ 0x0F12, 0x0714  },	//7000084C //TVAR_afit_pBaseValS[68] //AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]           
+{ 0x0F12, 0x32FF  },	//7000084E //TVAR_afit_pBaseValS[69] //AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                        
+{ 0x0F12, 0x5A04  },	//70000850 //TVAR_afit_pBaseValS[70] //AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                     
+{ 0x0F12, 0x201E  },	//70000852 //TVAR_afit_pBaseValS[71] //AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                     
+{ 0x0F12, 0x4012  },	//70000854 //TVAR_afit_pBaseValS[72] //AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]                
+{ 0x0F12, 0x0204  },	//70000856 //TVAR_afit_pBaseValS[73] //AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]                
+{ 0x0F12, 0x1403  },	//70000858 //TVAR_afit_pBaseValS[74] //AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                  
+{ 0x0F12, 0x0114  },	//7000085A //TVAR_afit_pBaseValS[75] //AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                      
+{ 0x0F12, 0x0101  },	//7000085C //TVAR_afit_pBaseValS[76] //AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                       
+{ 0x0F12, 0x4446  },	//7000085E //TVAR_afit_pBaseValS[77] //AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                           
+{ 0x0F12, 0x646E  },	//70000860 //TVAR_afit_pBaseValS[78] //AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                     
+{ 0x0F12, 0x0028  },	//70000862 //TVAR_afit_pBaseValS[79] //AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]             
+{ 0x0F12, 0x030A  },	//70000864 //TVAR_afit_pBaseValS[80] //AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]       
+{ 0x0F12, 0x0000  },	//70000866 //TVAR_afit_pBaseValS[81] //AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]          
+{ 0x0F12, 0x141E  },	//70000868 //TVAR_afit_pBaseValS[82] //AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]          
+{ 0x0F12, 0xFF07  },	//7000086A //TVAR_afit_pBaseValS[83] //AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]       
+{ 0x0F12, 0x0432  },	//7000086C //TVAR_afit_pBaseValS[84] //AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]              
+{ 0x0F12, 0x0000  },	//7000086E //TVAR_afit_pBaseValS[85] //AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]            
+{ 0x0F12, 0x0F0F  },	//70000870 //TVAR_afit_pBaseValS[86] //AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]              
+{ 0x0F12, 0x0440  },	//70000872 //TVAR_afit_pBaseValS[87] //AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]       
+{ 0x0F12, 0x0302  },	//70000874 //TVAR_afit_pBaseValS[88] //AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]       
+{ 0x0F12, 0x1414  },	//70000876 //TVAR_afit_pBaseValS[89] //AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                   
+{ 0x0F12, 0x0101  },	//70000878 //TVAR_afit_pBaseValS[90] //AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                      
+{ 0x0F12, 0x4601  },	//7000087A //TVAR_afit_pBaseValS[91] //AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                       
+{ 0x0F12, 0x6E44  },	//7000087C //TVAR_afit_pBaseValS[92] //AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                      
+{ 0x0F12, 0x2864  },	//7000087E //TVAR_afit_pBaseValS[93] //AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                  
+{ 0x0F12, 0x0A00  },	//70000880 //TVAR_afit_pBaseValS[94] //AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]    
+{ 0x0F12, 0x0003  },	//70000882 //TVAR_afit_pBaseValS[95] //AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]        
+{ 0x0F12, 0x1E00  },	//70000884 //TVAR_afit_pBaseValS[96] //AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]       
+{ 0x0F12, 0x0714  },	//70000886 //TVAR_afit_pBaseValS[97] //AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8]  
+{ 0x0F12, 0x32FF  },	//70000888 //TVAR_afit_pBaseValS[98] //AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]              
+{ 0x0F12, 0x0004  },	//7000088A //TVAR_afit_pBaseValS[99] //AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]           
+{ 0x0F12, 0x0F00  },	//7000088C //TVAR_afit_pBaseValS[100] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x400F  },	//7000088E //TVAR_afit_pBaseValS[101] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000890 //TVAR_afit_pBaseValS[102] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000892 //TVAR_afit_pBaseValS[103] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000894 //TVAR_afit_pBaseValS[104] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000896 //TVAR_afit_pBaseValS[105] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0014  },	//70000898 //TVAR_afit_pBaseValS[106] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//7000089A //TVAR_afit_pBaseValS[107] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//7000089C //TVAR_afit_pBaseValS[108] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//7000089E //TVAR_afit_pBaseValS[109] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//700008A0 //TVAR_afit_pBaseValS[110] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//700008A2 //TVAR_afit_pBaseValS[111] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//700008A4 //TVAR_afit_pBaseValS[112] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//700008A6 //TVAR_afit_pBaseValS[113] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//700008A8 //TVAR_afit_pBaseValS[114] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//700008AA //TVAR_afit_pBaseValS[115] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x012C  },	//700008AC //TVAR_afit_pBaseValS[116] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x03E8  },	//700008AE //TVAR_afit_pBaseValS[117] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0046  },	//700008B0 //TVAR_afit_pBaseValS[118] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x005A  },	//700008B2 //TVAR_afit_pBaseValS[119] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//700008B4 //TVAR_afit_pBaseValS[120] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//700008B6 //TVAR_afit_pBaseValS[121] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//700008B8 //TVAR_afit_pBaseValS[122] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x01AE  },	//700008BA //TVAR_afit_pBaseValS[123] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x001E  },	//700008BC //TVAR_afit_pBaseValS[124] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x001E  },	//700008BE //TVAR_afit_pBaseValS[125] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//700008C0 //TVAR_afit_pBaseValS[126] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//700008C2 //TVAR_afit_pBaseValS[127] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x003E  },	//700008C4 //TVAR_afit_pBaseValS[128] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0008  },	//700008C6 //TVAR_afit_pBaseValS[129] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x003C  },	//700008C8 //TVAR_afit_pBaseValS[130] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x001E  },	//700008CA //TVAR_afit_pBaseValS[131] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x003C  },	//700008CC //TVAR_afit_pBaseValS[132] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x001E  },	//700008CE //TVAR_afit_pBaseValS[133] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//700008D0 //TVAR_afit_pBaseValS[134] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//700008D2 //TVAR_afit_pBaseValS[135] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//700008D4 //TVAR_afit_pBaseValS[136] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x1403  },	//700008D6 //TVAR_afit_pBaseValS[137] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x0000  },	//700008D8 //TVAR_afit_pBaseValS[138] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0000  },	//700008DA //TVAR_afit_pBaseValS[139] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0000  },	//700008DC //TVAR_afit_pBaseValS[140] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//700008DE //TVAR_afit_pBaseValS[141] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x045A  },	//700008E0 //TVAR_afit_pBaseValS[142] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//700008E2 //TVAR_afit_pBaseValS[143] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//700008E4 //TVAR_afit_pBaseValS[144] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//700008E6 //TVAR_afit_pBaseValS[145] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x081E  },	//700008E8 //TVAR_afit_pBaseValS[146] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A14  },	//700008EA //TVAR_afit_pBaseValS[147] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0F0F  },	//700008EC //TVAR_afit_pBaseValS[148] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A00  },	//700008EE //TVAR_afit_pBaseValS[149] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x0032  },	//700008F0 //TVAR_afit_pBaseValS[150] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x000E  },	//700008F2 //TVAR_afit_pBaseValS[151] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0002  },	//700008F4 //TVAR_afit_pBaseValS[152] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//700008F6 //TVAR_afit_pBaseValS[153] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1102  },	//700008F8 //TVAR_afit_pBaseValS[154] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001B  },	//700008FA //TVAR_afit_pBaseValS[155] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//700008FC //TVAR_afit_pBaseValS[156] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//700008FE //TVAR_afit_pBaseValS[157] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//70000900 //TVAR_afit_pBaseValS[158] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0306  },	//70000902 //TVAR_afit_pBaseValS[159] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x4603  },	//70000904 //TVAR_afit_pBaseValS[160] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0480  },	//70000906 //TVAR_afit_pBaseValS[161] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0046  },	//70000908 //TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//7000090A //TVAR_afit_pBaseValS[163] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x0101  },	//7000090C //TVAR_afit_pBaseValS[164] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0707  },	//7000090E //TVAR_afit_pBaseValS[165] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x1E01  },	//70000910 //TVAR_afit_pBaseValS[166] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x491E  },	//70000912 //TVAR_afit_pBaseValS[167] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /
+{ 0x0F12, 0x5044  },	//70000914 //TVAR_afit_pBaseValS[168] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0500  },	//70000916 //TVAR_afit_pBaseValS[169] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x0004  },	//70000918 //TVAR_afit_pBaseValS[170] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /
+{ 0x0F12, 0x3C0A  },	//7000091A //TVAR_afit_pBaseValS[171] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x0714  },	//7000091C //TVAR_afit_pBaseValS[172] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /
+{ 0x0F12, 0x3214  },	//7000091E //TVAR_afit_pBaseValS[173] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x5A03  },	//70000920 //TVAR_afit_pBaseValS[174] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x121E  },	//70000922 //TVAR_afit_pBaseValS[175] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//70000924 //TVAR_afit_pBaseValS[176] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//70000926 //TVAR_afit_pBaseValS[177] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x1E06  },	//70000928 //TVAR_afit_pBaseValS[178] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x011E  },	//7000092A //TVAR_afit_pBaseValS[179] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//7000092C //TVAR_afit_pBaseValS[180] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x3A3C  },	//7000092E //TVAR_afit_pBaseValS[181] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x585A  },	//70000930 //TVAR_afit_pBaseValS[182] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000932 //TVAR_afit_pBaseValS[183] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000934 //TVAR_afit_pBaseValS[184] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0000  },	//70000936 //TVAR_afit_pBaseValS[185] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x141E  },	//70000938 //TVAR_afit_pBaseValS[186] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF07  },	//7000093A //TVAR_afit_pBaseValS[187] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//7000093C //TVAR_afit_pBaseValS[188] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x0000  },	//7000093E //TVAR_afit_pBaseValS[189] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x0F0F  },	//70000940 //TVAR_afit_pBaseValS[190] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000942 //TVAR_afit_pBaseValS[191] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000944 //TVAR_afit_pBaseValS[192] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x1E1E  },	//70000946 //TVAR_afit_pBaseValS[193] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000948 //TVAR_afit_pBaseValS[194] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x3C01  },	//7000094A //TVAR_afit_pBaseValS[195] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x5A3A  },	//7000094C //TVAR_afit_pBaseValS[196] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x2858  },	//7000094E //TVAR_afit_pBaseValS[197] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000950 //TVAR_afit_pBaseValS[198] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x0003  },	//70000952 //TVAR_afit_pBaseValS[199] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1E00  },	//70000954 //TVAR_afit_pBaseValS[200] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x0714  },	//70000956 //TVAR_afit_pBaseValS[201] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000958 //TVAR_afit_pBaseValS[202] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x0004  },	//7000095A //TVAR_afit_pBaseValS[203] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x0F00  },	//7000095C //TVAR_afit_pBaseValS[204] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x400F  },	//7000095E //TVAR_afit_pBaseValS[205] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000960 //TVAR_afit_pBaseValS[206] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000962 //TVAR_afit_pBaseValS[207] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000964 //TVAR_afit_pBaseValS[208] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000966 //TVAR_afit_pBaseValS[209] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0000  },	//70000968 //TVAR_afit_pBaseValS[210] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//7000096A //TVAR_afit_pBaseValS[211] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//7000096C //TVAR_afit_pBaseValS[212] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//7000096E //TVAR_afit_pBaseValS[213] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//70000970 //TVAR_afit_pBaseValS[214] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//70000972 //TVAR_afit_pBaseValS[215] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//70000974 //TVAR_afit_pBaseValS[216] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//70000976 //TVAR_afit_pBaseValS[217] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//70000978 //TVAR_afit_pBaseValS[218] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//7000097A //TVAR_afit_pBaseValS[219] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x012C  },	//7000097C //TVAR_afit_pBaseValS[220] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x03E8  },	//7000097E //TVAR_afit_pBaseValS[221] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0046  },	//70000980 //TVAR_afit_pBaseValS[222] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x005A  },	//70000982 //TVAR_afit_pBaseValS[223] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//70000984 //TVAR_afit_pBaseValS[224] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//70000986 //TVAR_afit_pBaseValS[225] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//70000988 //TVAR_afit_pBaseValS[226] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x0226  },	//7000098A //TVAR_afit_pBaseValS[227] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x001E  },	//7000098C //TVAR_afit_pBaseValS[228] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x001E  },	//7000098E //TVAR_afit_pBaseValS[229] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//70000990 //TVAR_afit_pBaseValS[230] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//70000992 //TVAR_afit_pBaseValS[231] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x004E  },	//70000994 //TVAR_afit_pBaseValS[232] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0000  },	//70000996 //TVAR_afit_pBaseValS[233] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x003C  },	//70000998 //TVAR_afit_pBaseValS[234] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x001E  },	//7000099A //TVAR_afit_pBaseValS[235] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x003C  },	//7000099C //TVAR_afit_pBaseValS[236] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x001E  },	//7000099E //TVAR_afit_pBaseValS[237] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//700009A0 //TVAR_afit_pBaseValS[238] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//700009A2 //TVAR_afit_pBaseValS[239] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//700009A4 //TVAR_afit_pBaseValS[240] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x1403  },	//700009A6 //TVAR_afit_pBaseValS[241] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x0000  },	//700009A8 //TVAR_afit_pBaseValS[242] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0000  },	//700009AA //TVAR_afit_pBaseValS[243] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0906  },	//700009AC //TVAR_afit_pBaseValS[244] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//700009AE //TVAR_afit_pBaseValS[245] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x045A  },	//700009B0 //TVAR_afit_pBaseValS[246] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//700009B2 //TVAR_afit_pBaseValS[247] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//700009B4 //TVAR_afit_pBaseValS[248] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//700009B6 //TVAR_afit_pBaseValS[249] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x081E  },	//700009B8 //TVAR_afit_pBaseValS[250] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A14  },	//700009BA //TVAR_afit_pBaseValS[251] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0F0F  },	//700009BC //TVAR_afit_pBaseValS[252] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A00  },	//700009BE //TVAR_afit_pBaseValS[253] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x0090  },	//700009C0 //TVAR_afit_pBaseValS[254] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x000A  },	//700009C2 //TVAR_afit_pBaseValS[255] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0002  },	//700009C4 //TVAR_afit_pBaseValS[256] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//700009C6 //TVAR_afit_pBaseValS[257] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1102  },	//700009C8 //TVAR_afit_pBaseValS[258] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001B  },	//700009CA //TVAR_afit_pBaseValS[259] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//700009CC //TVAR_afit_pBaseValS[260] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//700009CE //TVAR_afit_pBaseValS[261] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//700009D0 //TVAR_afit_pBaseValS[262] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0306  },	//700009D2 //TVAR_afit_pBaseValS[263] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x4602  },	//700009D4 //TVAR_afit_pBaseValS[264] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0880  },	//700009D6 //TVAR_afit_pBaseValS[265] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0080  },	//700009D8 //TVAR_afit_pBaseValS[266] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//700009DA //TVAR_afit_pBaseValS[267] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x0101  },	//700009DC //TVAR_afit_pBaseValS[268] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0707  },	//700009DE //TVAR_afit_pBaseValS[269] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x1E01  },	//700009E0 //TVAR_afit_pBaseValS[270] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x3C1E  },	//700009E2 //TVAR_afit_pBaseValS[271] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /
+{ 0x0F12, 0x5028  },	//700009E4 //TVAR_afit_pBaseValS[272] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0500  },	//700009E6 //TVAR_afit_pBaseValS[273] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x1A04  },	//700009E8 //TVAR_afit_pBaseValS[274] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /
+{ 0x0F12, 0x280A  },	//700009EA //TVAR_afit_pBaseValS[275] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x080C  },	//700009EC //TVAR_afit_pBaseValS[276] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /
+{ 0x0F12, 0x1414  },	//700009EE //TVAR_afit_pBaseValS[277] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x6A03  },	//700009F0 //TVAR_afit_pBaseValS[278] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x121E  },	//700009F2 //TVAR_afit_pBaseValS[279] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//700009F4 //TVAR_afit_pBaseValS[280] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//700009F6 //TVAR_afit_pBaseValS[281] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x2806  },	//700009F8 //TVAR_afit_pBaseValS[282] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x0128  },	//700009FA //TVAR_afit_pBaseValS[283] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//700009FC //TVAR_afit_pBaseValS[284] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x2224  },	//700009FE //TVAR_afit_pBaseValS[285] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x3236  },	//70000A00 //TVAR_afit_pBaseValS[286] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000A02 //TVAR_afit_pBaseValS[287] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000A04 //TVAR_afit_pBaseValS[288] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0410  },	//70000A06 //TVAR_afit_pBaseValS[289] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x141E  },	//70000A08 //TVAR_afit_pBaseValS[290] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF07  },	//70000A0A //TVAR_afit_pBaseValS[291] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//70000A0C //TVAR_afit_pBaseValS[292] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x4050  },	//70000A0E //TVAR_afit_pBaseValS[293] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x0F0F  },	//70000A10 //TVAR_afit_pBaseValS[294] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000A12 //TVAR_afit_pBaseValS[295] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000A14 //TVAR_afit_pBaseValS[296] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x2828  },	//70000A16 //TVAR_afit_pBaseValS[297] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000A18 //TVAR_afit_pBaseValS[298] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x2401  },	//70000A1A //TVAR_afit_pBaseValS[299] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x3622  },	//70000A1C //TVAR_afit_pBaseValS[300] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x2832  },	//70000A1E //TVAR_afit_pBaseValS[301] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000A20 //TVAR_afit_pBaseValS[302] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x1003  },	//70000A22 //TVAR_afit_pBaseValS[303] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1E04  },	//70000A24 //TVAR_afit_pBaseValS[304] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x0714  },	//70000A26 //TVAR_afit_pBaseValS[305] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000A28 //TVAR_afit_pBaseValS[306] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x5004  },	//70000A2A //TVAR_afit_pBaseValS[307] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x0F40  },	//70000A2C //TVAR_afit_pBaseValS[308] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x400F  },	//70000A2E //TVAR_afit_pBaseValS[309] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000A30 //TVAR_afit_pBaseValS[310] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000A32 //TVAR_afit_pBaseValS[311] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000A34 //TVAR_afit_pBaseValS[312] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000A36 //TVAR_afit_pBaseValS[313] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0000  },	//70000A38 //TVAR_afit_pBaseValS[314] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//70000A3A //TVAR_afit_pBaseValS[315] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//70000A3C //TVAR_afit_pBaseValS[316] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//70000A3E //TVAR_afit_pBaseValS[317] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//70000A40 //TVAR_afit_pBaseValS[318] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//70000A42 //TVAR_afit_pBaseValS[319] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//70000A44 //TVAR_afit_pBaseValS[320] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//70000A46 //TVAR_afit_pBaseValS[321] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//70000A48 //TVAR_afit_pBaseValS[322] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//70000A4A //TVAR_afit_pBaseValS[323] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x00C8  },	//70000A4C //TVAR_afit_pBaseValS[324] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x03E8  },	//70000A4E //TVAR_afit_pBaseValS[325] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0046  },	//70000A50 //TVAR_afit_pBaseValS[326] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x0050  },	//70000A52 //TVAR_afit_pBaseValS[327] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//70000A54 //TVAR_afit_pBaseValS[328] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//70000A56 //TVAR_afit_pBaseValS[329] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//70000A58 //TVAR_afit_pBaseValS[330] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x0226  },	//70000A5A //TVAR_afit_pBaseValS[331] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x0014  },	//70000A5C //TVAR_afit_pBaseValS[332] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x0014  },	//70000A5E //TVAR_afit_pBaseValS[333] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//70000A60 //TVAR_afit_pBaseValS[334] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//70000A62 //TVAR_afit_pBaseValS[335] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x004E  },	//70000A64 //TVAR_afit_pBaseValS[336] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0000  },	//70000A66 //TVAR_afit_pBaseValS[337] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x002D  },	//70000A68 //TVAR_afit_pBaseValS[338] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x0019  },	//70000A6A //TVAR_afit_pBaseValS[339] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x002D  },	//70000A6C //TVAR_afit_pBaseValS[340] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x0019  },	//70000A6E //TVAR_afit_pBaseValS[341] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//70000A70 //TVAR_afit_pBaseValS[342] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//70000A72 //TVAR_afit_pBaseValS[343] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//70000A74 //TVAR_afit_pBaseValS[344] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x1403  },	//70000A76 //TVAR_afit_pBaseValS[345] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x0000  },	//70000A78 //TVAR_afit_pBaseValS[346] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0000  },	//70000A7A //TVAR_afit_pBaseValS[347] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0906  },	//70000A7C //TVAR_afit_pBaseValS[348] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//70000A7E //TVAR_afit_pBaseValS[349] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x045A  },	//70000A80 //TVAR_afit_pBaseValS[350] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//70000A82 //TVAR_afit_pBaseValS[351] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//70000A84 //TVAR_afit_pBaseValS[352] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//70000A86 //TVAR_afit_pBaseValS[353] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x081E  },	//70000A88 //TVAR_afit_pBaseValS[354] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A14  },	//70000A8A //TVAR_afit_pBaseValS[355] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0F0F  },	//70000A8C //TVAR_afit_pBaseValS[356] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A00  },	//70000A8E //TVAR_afit_pBaseValS[357] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x0090  },	//70000A90 //TVAR_afit_pBaseValS[358] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x000A  },	//70000A92 //TVAR_afit_pBaseValS[359] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0001  },	//70000A94 //TVAR_afit_pBaseValS[360] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//70000A96 //TVAR_afit_pBaseValS[361] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1002  },	//70000A98 //TVAR_afit_pBaseValS[362] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001E  },	//70000A9A //TVAR_afit_pBaseValS[363] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//70000A9C //TVAR_afit_pBaseValS[364] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//70000A9E //TVAR_afit_pBaseValS[365] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//70000AA0 //TVAR_afit_pBaseValS[366] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0307  },	//70000AA2 //TVAR_afit_pBaseValS[367] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x5002  },	//70000AA4 //TVAR_afit_pBaseValS[368] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0080  },	//70000AA6 //TVAR_afit_pBaseValS[369] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0080  },	//70000AA8 //TVAR_afit_pBaseValS[370] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//70000AAA //TVAR_afit_pBaseValS[371] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x0101  },	//70000AAC //TVAR_afit_pBaseValS[372] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0707  },	//70000AAE //TVAR_afit_pBaseValS[373] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x1E01  },	//70000AB0 //TVAR_afit_pBaseValS[374] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x2A1E  },	//70000AB2 //TVAR_afit_pBaseValS[375] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /
+{ 0x0F12, 0x5020  },	//70000AB4 //TVAR_afit_pBaseValS[376] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0500  },	//70000AB6 //TVAR_afit_pBaseValS[377] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x1A04  },	//70000AB8 //TVAR_afit_pBaseValS[378] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /
+{ 0x0F12, 0x280A  },	//70000ABA //TVAR_afit_pBaseValS[379] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x080C  },	//70000ABC //TVAR_afit_pBaseValS[380] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /
+{ 0x0F12, 0x1414  },	//70000ABE //TVAR_afit_pBaseValS[381] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x6A03  },	//70000AC0 //TVAR_afit_pBaseValS[382] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x121E  },	//70000AC2 //TVAR_afit_pBaseValS[383] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//70000AC4 //TVAR_afit_pBaseValS[384] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//70000AC6 //TVAR_afit_pBaseValS[385] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x3C06  },	//70000AC8 //TVAR_afit_pBaseValS[386] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x013C  },	//70000ACA //TVAR_afit_pBaseValS[387] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//70000ACC //TVAR_afit_pBaseValS[388] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x1C1E  },	//70000ACE //TVAR_afit_pBaseValS[389] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x1E22  },	//70000AD0 //TVAR_afit_pBaseValS[390] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000AD2 //TVAR_afit_pBaseValS[391] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000AD4 //TVAR_afit_pBaseValS[392] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0214  },	//70000AD6 //TVAR_afit_pBaseValS[393] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x0E14  },	//70000AD8 //TVAR_afit_pBaseValS[394] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF06  },	//70000ADA //TVAR_afit_pBaseValS[395] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//70000ADC //TVAR_afit_pBaseValS[396] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x4052  },	//70000ADE //TVAR_afit_pBaseValS[397] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x150C  },	//70000AE0 //TVAR_afit_pBaseValS[398] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000AE2 //TVAR_afit_pBaseValS[399] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000AE4 //TVAR_afit_pBaseValS[400] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x3C3C  },	//70000AE6 //TVAR_afit_pBaseValS[401] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000AE8 //TVAR_afit_pBaseValS[402] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x1E01  },	//70000AEA //TVAR_afit_pBaseValS[403] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x221C  },	//70000AEC //TVAR_afit_pBaseValS[404] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x281E  },	//70000AEE //TVAR_afit_pBaseValS[405] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000AF0 //TVAR_afit_pBaseValS[406] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x1403  },	//70000AF2 //TVAR_afit_pBaseValS[407] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1402  },	//70000AF4 //TVAR_afit_pBaseValS[408] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x060E  },	//70000AF6 //TVAR_afit_pBaseValS[409] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000AF8 //TVAR_afit_pBaseValS[410] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x5204  },	//70000AFA //TVAR_afit_pBaseValS[411] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x0C40  },	//70000AFC //TVAR_afit_pBaseValS[412] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x4015  },	//70000AFE //TVAR_afit_pBaseValS[413] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000B00 //TVAR_afit_pBaseValS[414] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000B02 //TVAR_afit_pBaseValS[415] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000B04 //TVAR_afit_pBaseValS[416] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000B06 //TVAR_afit_pBaseValS[417] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0000  },	//70000B08 //TVAR_afit_pBaseValS[418] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//70000B0A //TVAR_afit_pBaseValS[419] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//70000B0C //TVAR_afit_pBaseValS[420] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//70000B0E //TVAR_afit_pBaseValS[421] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//70000B10 //TVAR_afit_pBaseValS[422] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//70000B12 //TVAR_afit_pBaseValS[423] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//70000B14 //TVAR_afit_pBaseValS[424] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//70000B16 //TVAR_afit_pBaseValS[425] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//70000B18 //TVAR_afit_pBaseValS[426] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//70000B1A //TVAR_afit_pBaseValS[427] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x0032  },	//70000B1C //TVAR_afit_pBaseValS[428] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x028A  },	//70000B1E //TVAR_afit_pBaseValS[429] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0032  },	//70000B20 //TVAR_afit_pBaseValS[430] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x01F4  },	//70000B22 //TVAR_afit_pBaseValS[431] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//70000B24 //TVAR_afit_pBaseValS[432] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//70000B26 //TVAR_afit_pBaseValS[433] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//70000B28 //TVAR_afit_pBaseValS[434] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x01AA  },	//70000B2A //TVAR_afit_pBaseValS[435] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x003C  },	//70000B2C //TVAR_afit_pBaseValS[436] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x0050  },	//70000B2E //TVAR_afit_pBaseValS[437] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//70000B30 //TVAR_afit_pBaseValS[438] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//70000B32 //TVAR_afit_pBaseValS[439] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x0044  },	//70000B34 //TVAR_afit_pBaseValS[440] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0014  },	//70000B36 //TVAR_afit_pBaseValS[441] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x0046  },	//70000B38 //TVAR_afit_pBaseValS[442] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x0019  },	//70000B3A //TVAR_afit_pBaseValS[443] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x0046  },	//70000B3C //TVAR_afit_pBaseValS[444] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x0019  },	//70000B3E //TVAR_afit_pBaseValS[445] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//70000B40 //TVAR_afit_pBaseValS[446] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//70000B42 //TVAR_afit_pBaseValS[447] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//70000B44 //TVAR_afit_pBaseValS[448] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x0503  },	//70000B46 //TVAR_afit_pBaseValS[449] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x080F  },	//70000B48 //TVAR_afit_pBaseValS[450] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0808  },	//70000B4A //TVAR_afit_pBaseValS[451] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0000  },	//70000B4C //TVAR_afit_pBaseValS[452] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//70000B4E //TVAR_afit_pBaseValS[453] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x012D  },	//70000B50 //TVAR_afit_pBaseValS[454] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//70000B52 //TVAR_afit_pBaseValS[455] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//70000B54 //TVAR_afit_pBaseValS[456] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//70000B56 //TVAR_afit_pBaseValS[457] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x061E  },	//70000B58 //TVAR_afit_pBaseValS[458] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A1E  },	//70000B5A //TVAR_afit_pBaseValS[459] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0606  },	//70000B5C //TVAR_afit_pBaseValS[460] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A03  },	//70000B5E //TVAR_afit_pBaseValS[461] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x378B  },	//70000B60 //TVAR_afit_pBaseValS[462] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x1028  },	//70000B62 //TVAR_afit_pBaseValS[463] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0001  },	//70000B64 //TVAR_afit_pBaseValS[464] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//70000B66 //TVAR_afit_pBaseValS[465] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1002  },	//70000B68 //TVAR_afit_pBaseValS[466] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001E  },	//70000B6A //TVAR_afit_pBaseValS[467] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//70000B6C //TVAR_afit_pBaseValS[468] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//70000B6E //TVAR_afit_pBaseValS[469] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//70000B70 //TVAR_afit_pBaseValS[470] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0307  },	//70000B72 //TVAR_afit_pBaseValS[471] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x5001  },	//70000B74 //TVAR_afit_pBaseValS[472] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0080  },	//70000B76 //TVAR_afit_pBaseValS[473] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0080  },	//70000B78 //TVAR_afit_pBaseValS[474] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//70000B7A //TVAR_afit_pBaseValS[475] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x5050  },	//70000B7C //TVAR_afit_pBaseValS[476] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0101  },	//70000B7E //TVAR_afit_pBaseValS[477] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x3201  },	//70000B80 //TVAR_afit_pBaseValS[478] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x1832  },	//70000B82 //TVAR_afit_pBaseValS[479] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /        iden 12
+{ 0x0F12, 0x210C  },	//70000B84 //TVAR_afit_pBaseValS[480] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0A00  },	//70000B86 //TVAR_afit_pBaseValS[481] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x1E04  },	//70000B88 //TVAR_afit_pBaseValS[482] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /    1E demhsharplow
+{ 0x0F12, 0x0A08  },	//70000B8A //TVAR_afit_pBaseValS[483] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x070C  },	//70000B8C //TVAR_afit_pBaseValS[484] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /    c8 clamp
+{ 0x0F12, 0x3264  },	//70000B8E //TVAR_afit_pBaseValS[485] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x5A02  },	//70000B90 //TVAR_afit_pBaseValS[486] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x1040  },	//70000B92 //TVAR_afit_pBaseValS[487] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//70000B94 //TVAR_afit_pBaseValS[488] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//70000B96 //TVAR_afit_pBaseValS[489] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x4606  },	//70000B98 //TVAR_afit_pBaseValS[490] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x0146  },	//70000B9A //TVAR_afit_pBaseValS[491] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//70000B9C //TVAR_afit_pBaseValS[492] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x1C18  },	//70000B9E //TVAR_afit_pBaseValS[493] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x1819  },	//70000BA0 //TVAR_afit_pBaseValS[494] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000BA2 //TVAR_afit_pBaseValS[495] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000BA4 //TVAR_afit_pBaseValS[496] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0514  },	//70000BA6 //TVAR_afit_pBaseValS[497] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x0C14  },	//70000BA8 //TVAR_afit_pBaseValS[498] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF05  },	//70000BAA //TVAR_afit_pBaseValS[499] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//70000BAC //TVAR_afit_pBaseValS[500] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x4052  },	//70000BAE //TVAR_afit_pBaseValS[501] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x1514  },	//70000BB0 //TVAR_afit_pBaseValS[502] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000BB2 //TVAR_afit_pBaseValS[503] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000BB4 //TVAR_afit_pBaseValS[504] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x4646  },	//70000BB6 //TVAR_afit_pBaseValS[505] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000BB8 //TVAR_afit_pBaseValS[506] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x1801  },	//70000BBA //TVAR_afit_pBaseValS[507] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x191C  },	//70000BBC //TVAR_afit_pBaseValS[508] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x2818  },	//70000BBE //TVAR_afit_pBaseValS[509] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000BC0 //TVAR_afit_pBaseValS[510] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x1403  },	//70000BC2 //TVAR_afit_pBaseValS[511] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1405  },	//70000BC4 //TVAR_afit_pBaseValS[512] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x050C  },	//70000BC6 //TVAR_afit_pBaseValS[513] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000BC8 //TVAR_afit_pBaseValS[514] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x5204  },	//70000BCA //TVAR_afit_pBaseValS[515] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x1440  },	//70000BCC //TVAR_afit_pBaseValS[516] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x4015  },	//70000BCE //TVAR_afit_pBaseValS[517] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000BD0 //TVAR_afit_pBaseValS[518] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000BD2 //TVAR_afit_pBaseValS[519] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+                           
+{ 0x0F12, 0x7DFA  },	//afit_pConstBaseValS[0] //                                                                          
+{ 0x0F12, 0xFFBD  },	//afit_pConstBaseValS[1] //                                                                          
+{ 0x0F12, 0x26FE  },	//afit_pConstBaseValS[2] //                                                                          
+{ 0x0F12, 0xF7BC  },	//afit_pConstBaseValS[3] //                                                                          
+{ 0x0F12, 0x7E06  },	//afit_pConstBaseValS[4] //                                                                          
+{ 0x0F12, 0x00D3  },	//afit_pConstBaseValS[5] //                                                                          
+                        
+                        
+{ 0x002A, 0x2CE8  },    
+{ 0x0F12, 0x0007  },	// Modify LSB to control AWBB_YThreshLow //    	                                                                        
+{ 0x0F12, 0x00E2  },	//                                         
+{ 0x0F12, 0x0005  },	// Modify LSB to control AWBB_YThreshLowBrLow//                                                                        
+{ 0x0F12, 0x00E2  },	//                                         
+                                                                       
+                                                                                     
+{ 0x002A, 0x0F7E  },    //ae weight    //                                
+{ 0x0F12, 0x0000  },  //0000  //0000
+{ 0x0F12, 0x0000  },  //0000  //0000
+{ 0x0F12, 0x0000  },  //0000  //0000
+{ 0x0F12, 0x0000  },  //0000  //0000                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0201  },  //0201  //0201
+{ 0x0F12, 0x0102  },  //0102  //0102
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0201  },  //0101  //0101
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0102  },  //0101  //0101                     
+{ 0x0F12, 0x0201  },  //0101  //0201
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0102  },  //0101  //0102                     
+{ 0x0F12, 0x0101  },  //0101  //0201
+{ 0x0F12, 0x0101  },  //0101  //0202
+{ 0x0F12, 0x0101  },  //0101  //0202
+{ 0x0F12, 0x0101  },  //0101  //0102
+                        
+                               
+{ 0x002A, 0x01CC  },    
+{ 0x0F12, 0x5DC0  },	//REG_TC_IPRM_InClockLSBs//input clock=24MHz                        	                                                                        
+{ 0x0F12, 0x0000  },    //REG_TC_IPRM_InClockMSBs                                           
+{ 0x002A, 0x01EE  },                                                                        
+{ 0x0F12, 0x0003  },	//REG_TC_IPRM_UseNPviClocks                                     
+                  
+{ 0x002A, 0x01F6  },                                                                        
+{ 0x0F12, 0x1F40  },    //REG_TC_IPRM_OpClk4KHz_0                   	2   700001F6         
+{ 0x0F12, 0x32A8  },	//3A88    //REG_TC_IPRM_MinOutRate4KHz_0              	2   700001F8                                                                        
+{ 0x0F12, 0x32E8  },	//3AA8    //REG_TC_IPRM_MaxOutRate4KHz_0                        
+                        
+{ 0x0F12, 0x1F40  },	 //REG_TC_IPRM_OpClk4KHz_1                   	2   700001FC    
+{ 0x0F12, 0x2ea0  },    //REG_TC_IPRM_MinOutRate4KHz_1              	2   700001FE 
+{ 0x0F12, 0x2f00  },    //REG_TC_IPRM_MaxOutRate4KHz_1              	2   70000200 
+                  
+{ 0x0F12, 0x0BB8  },    //REG_TC_IPRM_OpClk4KHz_2                   	2   70000202 
+{ 0x0F12, 0x05DC  },    //REG_TC_IPRM_MinOutRate4KHz_2              	2   70000204 
+{ 0x0F12, 0x1770  },    //REG_TC_IPRM_MaxOutRate4KHz_2              	2   70000206 
+                  
+{ 0x002A, 0x0208  },                                                                
+{ 0x0F12, 0x0001  },      //REG_TC_IPRM_InitParamsUpdated                           
+                        
+{ 0xdddd, 0x0064  },  //delay 100ms  
+                  
+{ 0x0028, 0x7000  },	    
+{ 0x002A, 0x026C  },   //Normal preview 15fps
+{ 0x0F12, 0x0280  },	//REG_0TC_PCFG_usWidth                      	2   7000026C			// cys  640                          
+{ 0x0F12, 0x01e0  },   //REG_0TC_PCFG_usHeight                     	2   7000026E    //  480                                       
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_Format                       	2   70000270    //   rgb565                                      
+{ 0x0F12, 0x32E8  },	//3AA8//REG_0TC_PCFG_usMaxOut4KHzRate             	2   70000272  //                              
+{ 0x0F12, 0x32a8  },	//3A88//REG_0TC_PCFG_usMinOut4KHzRate             	2   70000274  //                              
+{ 0x0F12, 0x0100  },   //REG_0TC_PCFG_OutClkPerPix88               	2   70000276    //                                         
+{ 0x0F12, 0x0800  },   //REG_0TC_PCFG_uMaxBpp88                    	2   70000278    //                                         
+{ 0x0F12, 0x0072  },   //REG_0TC_PCFG_PVIMask                      	2   7000027A    //92  (1) PCLK inversion  (4)1b_C first (5) UV First                                       
+{ 0x0F12, 0x0010  },   //REG_0TC_PCFG_OIFMask                      	2   7000027C    //                                         
+{ 0x0F12, 0x01E0  },   //REG_0TC_PCFG_usJpegPacketSize             	2   7000027E    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_usJpegTotalPackets           	2   70000280    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_uClockInd                    	2   70000282    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_usFrTimeType                 	2   70000284    //                                         
+{ 0x0F12, 0x0001  },   //REG_0TC_PCFG_FrRateQualityType            	2   70000286    //cys 0x0001          
+{ 0x0F12, 0x029a  },   //REG_0TC_PCFG_usMaxFrTimeMsecMult10        	2   70000288    // cys 0x535 
+{ 0x0F12, 0x014d  },   //REG_0TC_PCFG_usMinFrTimeMsecMult10        	2   7000028A    //cys                              
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_bSmearOutput                 	2   7000028C    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_sSaturation                  	2   7000028E    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_sSharpBlur                   	2   70000290    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_sColorTemp                   	2   70000292    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_uDeviceGammaIndex            	2   70000294    //                                         
+{ 0x0F12, 0x0003  },   //REG_0TC_PCFG_uPrevMirror                  	2   70000296    //                                         
+{ 0x0F12, 0x0003  },   //REG_0TC_PCFG_uCaptureMirror               	2   70000298    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_uRotation                    	2   7000029A    //                                         
+                       
+                       //comcoder frame fix 15                                        
+{ 0x0F12, 0x0400  },   //REG_1TC_PCFG_usWidth                      	2   7000029C    //                                         
+{ 0x0F12, 0x0300  },   //REG_1TC_PCFG_usHeight                     	2   7000029E    //                                         
+{ 0x0F12, 0x0005  },   //REG_1TC_PCFG_Format                       	2   700002A0    //                                         
+{ 0x0F12, 0x32E8  },   //REG_1TC_PCFG_usMaxOut4KHzRate             	2   700002A2    //                                         
+{ 0x0F12, 0x32a8  },   //REG_1TC_PCFG_usMinOut4KHzRate             	2   700002A4    //                                         
+{ 0x0F12, 0x0100  },   //REG_1TC_PCFG_OutClkPerPix88               	2   700002A6    //                                         
+{ 0x0F12, 0x0800  },   //REG_1TC_PCFG_uMaxBpp88                    	2   700002A8    //                                         
+{ 0x0F12, 0x0072  },   //REG_1TC_PCFG_PVIMask                      	2   700002AA    //                                         
+{ 0x0F12, 0x0010  },   //REG_1TC_PCFG_OIFMask                      	2   700002AC    //                                         
+{ 0x0F12, 0x01E0  },   //REG_1TC_PCFG_usJpegPacketSize             	2   700002AE    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_usJpegTotalPackets           	2   700002B0    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_uClockInd                    	2   700002B2    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_usFrTimeType                 	2   700002B4    //                                         
+{ 0x0F12, 0x0001  },   //REG_1TC_PCFG_FrRateQualityType            	2   700002B6    //                                         
+{ 0x0F12, 0x014d  },   //REG_1TC_PCFG_usMaxFrTimeMsecMult10        	2   700002B8    //cys 0x29a         
+{ 0x0F12, 0x014d  },   //REG_1TC_PCFG_usMinFrTimeMsecMult10        	2   700002BA    //cys  0x29a                                        
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_bSmearOutput                 	2   700002BC    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_sSaturation                  	2   700002BE    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_sSharpBlur                   	2   700002C0    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_sColorTemp                   	2   700002C2    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_uDeviceGammaIndex            	2   700002C4    //                                         
+{ 0x0F12, 0x0003  },   //REG_1TC_PCFG_uPrevMirror                  	2   700002C6    //                                         
+{ 0x0F12, 0x0003  },   //REG_1TC_PCFG_uCaptureMirror               	2   700002C8    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_uRotation                    	2   700002CA    //                                         
+                                       
+                            
+{ 0x002A, 0x035C  },   //Normal capture //    
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_uCaptureMode                 	2   7000035C						// 
+{ 0x0F12, 0x0280  },   //REG_0TC_CCFG_usWidth                      	2   7000035E          //cys 640                                   
+{ 0x0F12, 0x01e0  },   //REG_0TC_CCFG_usHeight                     	2   70000360          //    480                               
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_Format                       	2   70000362          //     rgb565                              
+{ 0x0F12, 0x32E8  },	//2f00//3AA8//REG_0TC_CCFG_usMaxOut4KHzRate             	2   70000364  //                      
+{ 0x0F12, 0x32a8  },	//2ea0//3A88//REG_0TC_CCFG_usMinOut4KHzRate             	2   70000366  //                      
+{ 0x0F12, 0x0100  },   //REG_0TC_CCFG_OutClkPerPix88               	2   70000368          //                                   
+{ 0x0F12, 0x0800  },   //REG_0TC_CCFG_uMaxBpp88                    	2   7000036A          //                                   
+{ 0x0F12, 0x0072  },   //REG_0TC_CCFG_PVIMask                      	2   7000036C          //                                   
+{ 0x0F12, 0x0010  },   //REG_0TC_CCFG_OIFMask                      	2   7000036E          //                                   
+{ 0x0F12, 0x01E0  },   //REG_0TC_CCFG_usJpegPacketSize             	2   70000370          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_usJpegTotalPackets           	2   70000372          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_uClockInd                    	2   70000374          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_usFrTimeType                 	2   70000376          //                                   
+{ 0x0F12, 0x0002  },   //REG_0TC_CCFG_FrRateQualityType            	2   70000378          //                                   
+{ 0x0F12, 0x0535  },   //REG_0TC_CCFG_usMaxFrTimeMsecMult10        	2   7000037A          //                                   
+{ 0x0F12, 0x0535  },   //REG_0TC_CCFG_usMinFrTimeMsecMult10        	2   7000037C          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_bSmearOutput                 	2   7000037E          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_sSaturation                  	2   70000380          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_sSharpBlur                   	2   70000382          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_sColorTemp                   	2   70000384          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_uDeviceGammaIndex            	2   70000386          //                                   
+                            
+                       // Low_lux capture//    
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_uCaptureMode                 	2   70000388						// 
+{ 0x0F12, 0x0280  },   //REG_1TC_CCFG_usWidth                      	2   7000038A          //  cys 640                                 
+{ 0x0F12, 0x01e0  },   //REG_1TC_CCFG_usHeight                     	2   7000038C          //  cys 480                                 
+{ 0x0F12, 0x0005  },   //REG_1TC_CCFG_Format                       	2   7000038E          //                                   
+{ 0x0F12, 0x32E8  },   //REG_1TC_CCFG_usMaxOut4KHzRate             	2   70000390          //                                   
+{ 0x0F12, 0x32a8  },   //REG_1TC_CCFG_usMinOut4KHzRate             	2   70000392          //                                   
+{ 0x0F12, 0x0100  },   //REG_1TC_CCFG_OutClkPerPix88               	2   70000394          //                                   
+{ 0x0F12, 0x0800  },   //REG_1TC_CCFG_uMaxBpp88                    	2   70000396          //                                   
+{ 0x0F12, 0x0072  },   //REG_1TC_CCFG_PVIMask                      	2   70000398          //                                   
+{ 0x0F12, 0x0010  },   //REG_1TC_CCFG_OIFMask                      	2   7000039A          //                                   
+{ 0x0F12, 0x01E0  },   //REG_1TC_CCFG_usJpegPacketSize             	2   7000039C          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_usJpegTotalPackets           	2   7000039E          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_uClockInd                    	2   700003A0          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_usFrTimeType                 	2   700003A2          //                                   
+{ 0x0F12, 0x0002  },   //REG_1TC_CCFG_FrRateQualityType            	2   700003A4          //                                   
+{ 0x0F12, 0x0535  },   //REG_1TC_CCFG_usMaxFrTimeMsecMult10        	2   700003A6          //                                   
+{ 0x0F12, 0x0535  },   //REG_1TC_CCFG_usMinFrTimeMsecMult10        	2   700003A8          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_bSmearOutput                 	2   700003AA          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_sSaturation                  	2   700003AC          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_sSharpBlur                   	2   700003AE          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_sColorTemp                   	2   700003B0          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_uDeviceGammaIndex            	2   700003B2          //                                   
+                                  
+{ 0x002A, 0x0208  },        
+{ 0x0F12, 0x0001  },      //REG_TC_IPRM_InitParamsUpdated//                                                                       
+                            
+{ 0x002A, 0x023C  },   
+{ 0x0F12, 0x0000  },	//32MHz Sys Clock//	
+{ 0x002A, 0x0244  },	                   
+{ 0x0F12, 0x0000  },       
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x0F12, 0x0001  }, 
+                     
+{ 0x1000, 0x0001  },	// Set host interrupt so main start run//                                                  
+{ 0xdddd, 0x0064  },   //delay 100ms
+                  
+{ 0x002A, 0x0DA0  },    
+{ 0x0F12, 0x0005  },    
+                        
+{ 0x002A, 0x0D88  },    
+{ 0x0F12, 0x0038  },    
+{ 0x0F12, 0x0074  },    
+{ 0x0F12, 0xFFF1  },    
+{ 0x0F12, 0x00BF  },    
+{ 0x0F12, 0xFF9B  },    
+{ 0x0F12, 0x00DB  },    
+{ 0x0F12, 0xFF56  },    
+{ 0x0F12, 0x00F0  },    
+{ 0x0F12, 0xFEFF  },    
+{ 0x0F12, 0x010F  },    
+{ 0x0F12, 0x0E74  },    
+{ 0x002A, 0x0DA8  },    
+{ 0x0F12, 0x0BB8  },    //NB 3000
+{ 0x002A, 0x0DA4  },    
+{ 0x0F12, 0x274E  },
+                  
+{ 0x002A, 0x0DCA  },
+{ 0x0F12, 0x0030  },
+
+{ 0x002A, 0x3286  },
+{ 0x0F12, 0x0001  }, //Pre/Post gamma on(ç›”æ±—)  
+
+{ 0x002A, 0x032C  },
+{ 0x0F12, 0xAAAA  },  //ESD Check  
+                  
+{ 0xffff, 0xffff },
+};
+
+  
+s5k5ca_short_t s5k5ca_capture_normal_normal_00[] =              
+{ 
+{ 0xFCFC, 0xD000  },                 
+{ 0x0028, 0x7000  },  
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0246  },
+{ 0x0F12, 0x0001  },  
+{ 0x002A, 0x0224  },
+{ 0x0F12, 0x0001  },   
+{ 0x0F12, 0x0001  },
+//{ 0xdddd, 0x012C  }, //delay 300ms //0218 delay time 300ms // 0421 0064(100ms)->0032(50ms)        
+{ 0xffff, 0xffff  },
+};
+
+
+
+// /////////////
+// / CapturewMode
+// ////////////
+s5k5ca_short_t s5k5ca_capture[] = 
+{ 
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },                                                      
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  }, 
+  
+{ 0xffff, 0xffff  },
+};
+
+
+/////////////////////
+// SnapshotLowLightMode
+/////////////////////
+s5k5ca_short_t s5k5ca_snapshot_normal_low_00[] = //light <= 0x20 0421 PV2 0020->0018
+{ 
+//LowLight + Night Off
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },            
+                  
+{ 0x002A, 0x07E6  },
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+    
+{ 0x002A, 0x0838  },
+{ 0x0F12, 0x0A3C  },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x0908  },
+{ 0x0F12, 0x0446  },	//TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]
+                                             
+{ 0x002A, 0x0244  }, //Low lux capture//
+{ 0x0F12, 0x0001  }, //config 1 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  },
+                 
+{ 0xdddd, 0x0320  }, //delay 800ms 
+
+{ 0xffff, 0xffff  },
+//sw delay time - 800ms
+};
+
+
+  
+s5k5ca_short_t s5k5ca_flashcapture_00[] =       
+{ 
+  
+//{ 0xdddd, 0x0160  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },                   
+{ 0x002A, 0x035C  }, //Capture Mode//
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  }, 
+  
+
+{ 0xffff, 0xffff  },  
+};
+
+
+/////////////////////
+// SnapshotLowLightMode
+/////////////////////
+s5k5ca_short_t s5k5ca_snapshot_low[] = 
+{
+
+//LowLight + Night Off
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },            
+                  
+{ 0x002A, 0x07E6  },
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+    
+{ 0x002A, 0x0838  },
+{ 0x0F12, 0x0A3C  },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x0908  },
+{ 0x0F12, 0x0446  },	//TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]
+                                             
+{ 0x002A, 0x0244  }, //Low lux capture//
+{ 0x0F12, 0x0001  }, //config 1 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  },
+  
+{ 0xffff, 0xffff  },  
+
+};
+
+s5k5ca_short_t s5k5ca_flashcapture_low_00[] =    
+{
+//{ 0xdddd, 0x0160  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms    
+
+//LowLight + Night Off
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },            
+{ 0x002A, 0x0388  }, //Capture Mode//
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  },
+  
+{ 0xffff, 0xffff  },  
+};
+
+
+
+////////////////////
+// SnapshotNightMode
+///////////////////
+
+s5k5ca_short_t s5k5ca_snapshot_nightmode_00[] = 
+{
+
+//LowLight
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },    
+{ 0x002A, 0x07E6  },
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+                                                     
+{ 0x002A, 0x0244  }, //Night capture//
+{ 0x0F12, 0x0002  }, //config 2 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+
+////////////////
+// NightMode_ON
+///////////////
+s5k5ca_short_t s5k5ca_nightmode_on[] = 
+{
+
+
+{ 0xffff, 0xffff  },            
+};
+
+////////////////
+// NightMode_OFF
+///////////////
+s5k5ca_short_t s5k5ca_nightmode_off[] = 
+{
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_NONFIX                     //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_nonfix[] = 
+{
+
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_15FIX                   //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_15fix[] = 
+{
+
+  
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_7FIX                    //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_7fix[] = 
+{
+
+                  
+{ 0xffff, 0xffff  },
+};
+
+
+/////////
+// ISO_AUTO
+/////////
+s5k5ca_short_t s5k5ca_iso_auto[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x1000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0x3415  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0x682A  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0x8235  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0x3415  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0x682A  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0x8235  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x01B3  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x02A0  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x0064  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  },
+  
+{ 0xffff, 0xffff  },
+};
+
+////////
+// ISO_50
+////////
+s5k5ca_short_t s5k5ca_iso50[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x1000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x0064  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// ISO_100
+////////
+s5k5ca_short_t s5k5ca_iso100[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x1800  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x0096  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+  
+// ///////
+// / ISO_200
+// ///////
+s5k5ca_short_t s5k5ca_iso200[] =
+{ 
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+  
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x2000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x00C8  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// ISO_400
+////////
+s5k5ca_short_t s5k5ca_iso400[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x3000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x012C  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+
+////////////////////
+// SCENE_PORTRAIT_OFF
+////////////////////
+s5k5ca_short_t s5k5ca_scene_portrait_off[] =
+{
+{ 0xFCFC, 0xD000  },                    
+{ 0x0028, 0x7000  },//For Scene//
+{ 0x002A, 0x020C  },
+{ 0x0F12, 0x0000  },// Brightness for controling the EV//
+{ 0x002A, 0x0210  },
+{ 0x0F12, 0x0000  },// Saturation//
+{ 0x0F12, 0x0000  },// Blur_Sharpness //  
+{ 0xffff, 0xffff  },  
+};     
+
+////////////////////
+// SCENE_LANDSCAPE_OFF
+////////////////////
+s5k5ca_short_t s5k5ca_scene_landscape_off[] =
+{
+{ 0xFCFC, 0xD000  },     
+{ 0x0028, 0x7000  },//For Scene//
+{ 0x002A, 0x020C  },
+{ 0x0F12, 0x0000  },// Brightness for controling the EV//
+{ 0x002A, 0x0210  },
+{ 0x0F12, 0x0000  },// Saturation//
+{ 0x0F12, 0x0000  },// Blur_Sharpness //  
+{ 0xffff, 0xffff  },
+};
+
+/////////////////
+// SCENE_SPORTS_OFF
+/////////////////
+s5k5ca_short_t s5k5ca_scene_sports_off[] =
+{
+{ 0x0028, 0x7000  },     
+
+{ 0x002A, 0x0530  },//lt_uMaxExp1//
+{ 0x0F12, 0x3415  },
+{ 0x002A, 0x0534  },//lt_uMaxExp2//
+{ 0x0F12, 0x682A  },
+{ 0x002A, 0x167C  },//lt_uMaxExp3//
+{ 0x0F12, 0x8235  },
+{ 0x002A, 0x1680  },//lt_uMaxExp4//
+{ 0x0F12, 0xc350  },
+{ 0x0F12, 0x0000  },
+                  
+{ 0x002A, 0x0538  },//It_uCapMaxExp1 //
+{ 0x0F12, 0x3415  },
+{ 0x002A, 0x053C  },//It_uCapMaxExp2 //
+{ 0x0F12, 0x682A  },
+{ 0x002A, 0x1684  },//It_uCapMaxExp3 // 
+{ 0x0F12, 0x8235  },
+{ 0x002A, 0x1688  },//It_uCapMaxExp4 //
+{ 0x0F12, 0xc350  },
+{ 0x0F12, 0x0000  },
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x01B3  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x02A0  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710  },   //MaxAnGain4 //
+                  
+{ 0x002A, 0x0544  },
+{ 0x0F12, 0x0100  },//It_uMaxDigGain //
+
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_sunset_off[] =
+{
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_dawn_off[] =
+{
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_againstlight_off[] =
+{
+//NOT USE
+	              
+{ 0xffff, 0xffff  }, 
+};
+
+
+s5k5ca_short_t s5k5ca_scene_text_off[] =
+{
+//NOT USE
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_portrait_on[] =
+{
+//NOT USE
+{ 0xffff, 0xffff  },
+};
+
+
+
+
+s5k5ca_t s5k5ca_reg[] = 
+{
+	// To do.
+};
+
+// For VGA ( 640 x 480) on 4CA module
+s5k5ca_t s5k5ca_reg_vga[] = 
+{
+	// To do.
+};
+
+// For SVGA ( 800 x 600) on 4CA module
+s5k5ca_t s5k5ca_reg_svga[] = 
+{
+	// To do.
+};
+
+// For SXGA (1280 x 1024 = 1.3M) on 4CA module
+s5k5ca_t s5k5ca_reg_sxga[] = 
+{
+	// To do.
+};
+
+// For UXGA (1600 x 1200 = 2M) on 4CA module
+s5k5ca_t s5k5ca_reg_uxga[] = 
+{
+	// To do.
+};
+
+// For SQVGA on 4CA module
+s5k5ca_t s5k5ca_reg_qsvga[] = 
+{
+	// To do.
+};
+
+#define S5K5CA_INIT_REGS (sizeof(s5k5ca_reg)/sizeof(s5k5ca_reg[0]))
+#define S5K5CA_UXGA_REGS (sizeof(s5k5ca_reg_uxga)/sizeof(s5k5ca_reg_uxga[0]))
+#define S5K5CA_SVGA_REGS (sizeof(s5k5ca_reg_svga)/sizeof(s5k5ca_reg_svga[0]))
+#define S5K5CA_VGA_REGS (sizeof(s5k5ca_reg_vga)/sizeof(s5k5ca_reg_vga[0]))
+#define S5K5CA_QSVGA_REGS (sizeof(s5k5ca_reg_qsvga)/sizeof(s5k5ca_reg_qsvga[0]))
+
+//#define S5K5CA_RISC_REGS 0xEB
+//#define S5K5CA_ISP_REGS 0xFB /* S5C7323X */
+//#define S5K5CA_CIS_REGS 0x2F /* S5K437LA03 */
+                                                                                                                                                                                              
+//#define S5K5CA_REGS (0x1000)
+
+
+
+//delay 100ms phone SW //
+
+
+s5k5ca_short_t s5k5ca_snapshot_fireworks_00[] = // scene mode fireworks
+{ 
+
+//LowLight
+{ 0xFCFC, 0xD000 }, 
+{ 0x0028, 0x7000 },    
+{ 0x002A, 0x07E6 },
+{ 0x0F12, 0x0028 },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0028 },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+				 
+{ 0x002A, 0x0244 }, //Night capture//
+{ 0x0F12, 0x0002 }, //config 2 //
+{ 0x002A, 0x0230 }, 
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0246 }, 
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0224 }, 
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x0001 },
+
+{ 0xdddd, 0x06A4 }, //delay 1500ms 0304 Night Mode Change 
+
+{ 0xffff, 0xffff },
+};
+
+
+
+
+
+//---------------------------------------//
+// case 23 : FPS_NONFIX                     //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_nonfix_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x0288  },
+{ 0x0F12, 0x0535  },
+{ 0x0F12, 0x029A  },
+
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0230  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x023E  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+	
+{ 0xffff, 0xffff  },	
+};
+
+//---------------------------------------//
+// case 23 : FPS_15FIX                   //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_15fix_00[] = 
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x02B8 },
+{ 0x0F12, 0x029A },
+{ 0x0F12, 0x029A },
+
+
+{ 0x002A, 0x023C }, //Normal Preview//
+{ 0x0F12, 0x0001 }, //config 1 //                                                  
+{ 0x002A, 0x0240 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0230 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x023E },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0220 }, 
+{ 0x0F12, 0x0001 },	
+{ 0x002A, 0x0222 }, 
+{ 0x0F12, 0x0001 },
+
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_7FIX                    //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_7fix_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x02B8  },
+{ 0x0F12, 0x0535  },
+{ 0x0F12, 0x0535  },
+
+
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0001  }, //config 1 //                                                  
+{ 0x002A, 0x0240  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0230  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x023E  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  },   
+                  
+{ 0xffff, 0xffff  },
+};
+
+////////////
+// EFFECT_OFF
+////////////
+s5k5ca_short_t s5k5ca_effect_off_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x3286  }, //Pre/Post gamma on(ç›”æ±—)
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0000  },
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 16 : MonoEffect                  //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_effect_gray_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0001  },
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 20 : NegativeEffect              //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_effect_negative_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0003  },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////
+// EFFECT_SEPIA
+/////////////
+s5k5ca_short_t s5k5ca_effect_sepia_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0004  },
+
+{ 0xffff, 0xffff  },
+};
+
+////////////
+// EFFECT_AQUA
+/////////////
+s5k5ca_short_t s5k5ca_effect_aqua_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0005  },
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 19 : GREENEffect(sketch)         //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_effect_sketch_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x3286  },
+{ 0x0F12, 0x0000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0006  },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////
+// WB_Auto
+/////////////
+s5k5ca_short_t s5k5ca_wb_auto_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x246E  },
+{ 0x0F12, 0x0001  },
+
+{ 0xffff, 0xffff  },
+};                
+
+///////////
+// WB_Sunny
+//////////
+s5k5ca_short_t s5k5ca_wb_sunny_00[] = 
+{ 
+{ 0xfcfc, 0xd000  }, 
+{ 0x0028, 0x7000  }, 
+{ 0x002a, 0x246E  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x002a, 0x04A0  }, 
+{ 0x0f12, 0x05E0  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0400  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0500  }, //0530
+{ 0x0f12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////
+// WB_Cloudy
+///////////
+s5k5ca_short_t s5k5ca_wb_cloudy_00[] = 
+{ 
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+{ 0x002a, 0x246E  },
+{ 0x0f12, 0x0000  },
+{ 0x002a, 0x04A0  },
+{ 0x0f12, 0x06E0  }, //06B0 
+{ 0x0f12, 0x0001  }, //0001 
+{ 0x0f12, 0x0400  }, //0400 
+{ 0x0f12, 0x0001  }, //0001 
+{ 0x0f12, 0x0448  }, //0460 
+{ 0x0f12, 0x0001  }, //0001 
+
+{ 0xffff, 0xffff  },
+};
+
+////////////
+// WB_Tungsten
+////////////
+s5k5ca_short_t s5k5ca_wb_tungsten_00[] = 
+{ 
+{ 0xfcfc, 0xd000  }, 
+{ 0x0028, 0x7000  }, 
+{ 0x002a, 0x246E  }, 
+{ 0x0f12, 0x0000  }, 
+
+{ 0x002a, 0x04A0  }, 
+{ 0x0f12, 0x03D0  },  //03D0
+{ 0x0f12, 0x0001  },  //0001
+{ 0x0f12, 0x0400  },  //0400
+{ 0x0f12, 0x0001  },  //0001
+{ 0x0f12, 0x0910  },  //0920
+{ 0x0f12, 0x0001  },  //0001 
+                  
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// WB_Flourescent
+///////////////
+s5k5ca_short_t s5k5ca_wb_fluorescent_00[] = 
+{ 
+{ 0xfcfc, 0xd000  }, 
+{ 0x0028, 0x7000  }, 
+{ 0x002a, 0x246E  }, 
+{ 0x0f12, 0x0000  }, 
+                     
+{ 0x002a, 0x04A0  }, 
+{ 0x0f12, 0x0530  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0400  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0800  }, 
+{ 0x0f12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+
+////////////
+// BR_Minus4
+///////////
+s5k5ca_short_t s5k5ca_br_minus4_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+//////////
+// BR_Minus3
+/////////
+s5k5ca_short_t s5k5ca_br_minus3_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+//////////
+// BR_Minus2
+//////////
+s5k5ca_short_t s5k5ca_br_minus2_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};                
+
+//////////
+// BR_Minus1
+//////////
+s5k5ca_short_t s5k5ca_br_minus1_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_ZERO
+////////
+s5k5ca_short_t s5k5ca_br_zero_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_Plus1
+/////////
+s5k5ca_short_t s5k5ca_br_plus1_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_Plus2
+/////////
+s5k5ca_short_t s5k5ca_br_plus2_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_Plus3
+/////////
+s5k5ca_short_t s5k5ca_br_plus3_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};                
+
+/////////
+// BR_Plus4
+/////////
+s5k5ca_short_t s5k5ca_br_plus4_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+
+////////////////////
+// SCENE_MODE_OFF
+////////////////////
+//////////////////////////////////////////////
+//////////Scene off///////////////////////////
+//////////////////////////////////////////////
+//01.None//
+//02.Sports off
+//03.Night off
+//////////////////////////////////////////////
+////////// CAM_REGSET_SCENE_NORMAL ///////////
+s5k5ca_short_t s5k5ca_scene_mode_off_00[] =
+{ 
+
+{ 0xFCFC, 0xD000 },   //WB Auto
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x246E },
+{ 0x0F12, 0x0001 },
+
+{ 0x0028, 0x7000 },   //For Scene//
+{ 0x002A, 0x020C },   
+{ 0x0F12, 0x0000 },   // Brightness for controling the EV//
+{ 0x002A, 0x0210 },   
+{ 0x0F12, 0x0000 },   // Saturation//
+{ 0x0F12, 0x0000 },   // Blur_Sharpness //  
+	
+///////////////////
+//02. Sports off //
+///////////////////
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x12B8 },  
+{ 0x0F12, 0x1000 }, 
+ 
+{ 0x002A, 0x0530 },   	                                                    
+{ 0x0F12, 0x3415 },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534 },                                                               
+{ 0x0F12, 0x682A },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C },                                                               
+{ 0x0F12, 0x8235 },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680 },                                                               
+{ 0x0F12, 0xc350 },   //MaxExp4   125ms  38ea //                           
+        
+{ 0x002A, 0x0538 },                                                               
+{ 0x0F12, 0x3415 },   // 15fps //                                                 
+{ 0x002A, 0x053C },                                                               
+{ 0x0F12, 0x682A },   // 7.5fps //                                                
+{ 0x002A, 0x1684 },                                                               
+{ 0x0F12, 0x8235 },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688 },                                                               
+{ 0x0F12, 0xC350 },   //CapMaxExp4 //                                             
+
+{ 0x002A, 0x0540 },                                                               
+{ 0x0F12, 0x01B3 },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3 },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C },                                                               
+{ 0x0F12, 0x02A0 },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710 },   //MaxAnGain4 //    
+
+{ 0x002A, 0x0544 },  
+{ 0x0F12, 0x0100 },
+{ 0x0F12, 0x8000 },
+
+{ 0x002A, 0x04B4 },  
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x0064 },
+{ 0x0F12, 0x0001 },
+
+//////////////////
+//03. Night off //
+//////////////////
+
+{ 0x0028, 0x7000 },
+
+{ 0x002A, 0x0530 },//lt_uMaxExp1//     
+{ 0x0F12, 0x3415 },                    
+{ 0x002A, 0x0534 },//lt_uMaxExp2//     
+{ 0x0F12, 0x682A },                    
+{ 0x002A, 0x167C },//lt_uMaxExp3//     
+{ 0x0F12, 0x8235 },                    
+{ 0x002A, 0x1680 },//lt_uMaxExp4//     
+{ 0x0F12, 0xc350 },                    
+{ 0x0F12, 0x0000 },                    
+                                     
+{ 0x002A, 0x0538 },//It_uCapMaxExp1 // 
+{ 0x0F12, 0x3415 },                    
+{ 0x002A, 0x053C },//It_uCapMaxExp2 // 
+{ 0x0F12, 0x682A },                    
+{ 0x002A, 0x1684 },//It_uCapMaxExp3 // 
+{ 0x0F12, 0x8235 },                    
+{ 0x002A, 0x1688 },//It_uCapMaxExp4 // 
+{ 0x0F12, 0xc350 },                    
+{ 0x0F12, 0x0000 },                    
+                                     
+{ 0x002A, 0x0540 },                                                               
+{ 0x0F12, 0x01B3 },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3 },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C },                                                               
+{ 0x0F12, 0x02A0 },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710 },   //MaxAnGain4 //
+                                     
+{ 0x002A, 0x0544 },                    
+{ 0x0F12, 0x0100 },//It_uMaxDigGain // 
+
+{ 0x002A, 0x07E6 },
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+
+{ 0x002A, 0x0838 },
+{ 0x0F12, 0x003C },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x023C },
+{ 0x0F12, 0x0000 },//REG_TC_GP_ActivePrevConfig     //Normal Preview //  
+{ 0x002A, 0x0240 },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_PrevOpenAfterChange  
+{ 0x002A, 0x0230 },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_NewConfigSync        
+{ 0x002A, 0x023E },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_PrevConfigChanged    
+{ 0x002A, 0x0220 },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_EnablePreview        
+{ 0x0F12, 0x0001 },   //REG_TC_GP_EnablePreviewChanged 
+
+//Metering Center
+{ 0xfcfc, 0xd000 },
+{ 0x0028, 0x7000 },             
+                                                            
+{ 0x002A, 0x0F7E },    //ae weight  //     
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0201 },  //0201
+{ 0x0F12, 0x0102 },  //0102
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0201 },  //0101
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0102 },  //0101
+{ 0x0F12, 0x0201 },  //0201
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0102 },  //0102
+{ 0x0F12, 0x0101 },  //0201
+{ 0x0F12, 0x0101 },  //0202
+{ 0x0F12, 0x0101 },  //0202
+{ 0x0F12, 0x0101 },  //0102
+
+{ 0xffff, 0xffff  },
+};
+
+////////////////////
+// SCENE_PORTRAIT_ON
+///////////////////
+s5k5ca_short_t s5k5ca_scene_portrait_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x020C },
+{ 0x0F12, 0x0000 },
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x0000 },
+{ 0x0F12, 0xFFF6 },
+
+{ 0xffff, 0xffff  },
+};
+
+ 
+////////////////////
+// SCENE_LANDSCAPE_ON
+///////////////////
+s5k5ca_short_t s5k5ca_scene_landscape_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x020C },
+{ 0x0F12, 0x0000 },
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x001E },
+{ 0x0F12, 0x000A },
+
+//Metering Matrix
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+                  
+{ 0x002a, 0x0F7E  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  },
+
+{ 0xffff, 0xffff  }, 
+};
+
+////////////////////
+// NIGHTMODE_ON
+///////////////////
+
+s5k5ca_short_t s5k5ca_nightmode_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },  
+{ 0x002A, 0x02CC },   //Night Preview
+{ 0x0F12, 0x0400 },	//REG_2TC_PCFG_usWidth                      	2   700002CC    // 
+{ 0x0F12, 0x0300 },   //REG_2TC_PCFG_usHeight                     	2   700002CE    // 
+{ 0x0F12, 0x0005 },   //REG_2TC_PCFG_Format                       	2   700002D0    // 
+{ 0x0F12, 0x32E8 },   //REG_2TC_PCFG_usMaxOut4KHzRate             	2   700002D2    // 
+{ 0x0F12, 0x32a8 },   //REG_2TC_PCFG_usMinOut4KHzRate             	2   700002D4    // 
+{ 0x0F12, 0x0100 },   //REG_2TC_PCFG_OutClkPerPix88               	2   700002D6    // 
+{ 0x0F12, 0x0800 },   //REG_2TC_PCFG_uMaxBpp88                    	2   700002D8    // 
+{ 0x0F12, 0x0072 },   //REG_2TC_PCFG_PVIMask                      	2   700002DA    // 
+{ 0x0F12, 0x0010 },   //REG_2TC_PCFG_OIFMask                      	2   700002DC    // 
+{ 0x0F12, 0x01E0 },   //REG_2TC_PCFG_usJpegPacketSize             	2   700002DE    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_usJpegTotalPackets           	2   700002E0    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_uClockInd                    	2   700002E2    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_usFrTimeType                 	2   700002E4    // 
+{ 0x0F12, 0x0001 },   //REG_2TC_PCFG_FrRateQualityType            	2   700002E6    // 
+{ 0x0F12, 0x09C4 },   //REG_2TC_PCFG_usMaxFrTimeMsecMult10        	2   700002E8    // 
+{ 0x0F12, 0x029A },   //REG_2TC_PCFG_usMinFrTimeMsecMult10        	2   700002EA    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_bSmearOutput                 	2   700002EC    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_sSaturation                  	2   700002EE    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_sSharpBlur                   	2   700002F0    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_sColorTemp                   	2   700002F2    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_uDeviceGammaIndex            	2   700002F4    // 
+{ 0x0F12, 0x0003 },   //REG_2TC_PCFG_uPrevMirror                  	2   700002F6    // 
+{ 0x0F12, 0x0003 },   //REG_2TC_PCFG_uCaptureMirror               	2   700002F8    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_uRotation                    	2   700002FA    // 
+                 
+{ 0x002A, 0x03B4 },   //Night Capture 
+{ 0x0F12, 0x0000 },	//REG_2TC_CCFG_uCaptureMode                 	2   700003B4          //
+{ 0x0F12, 0x0800 },   //REG_2TC_CCFG_usWidth                      	2   700003B6          //
+{ 0x0F12, 0x0600 },   //REG_2TC_CCFG_usHeight                     	2   700003B8          //
+{ 0x0F12, 0x0005 },   //REG_2TC_CCFG_Format                       	2   700003BA          //
+{ 0x0F12, 0x32E8 },   //REG_2TC_CCFG_usMaxOut4KHzRate             	2   700003BC          //
+{ 0x0F12, 0x32a8 },   //REG_2TC_CCFG_usMinOut4KHzRate             	2   700003BE          //
+{ 0x0F12, 0x0100 },   //REG_2TC_CCFG_OutClkPerPix88               	2   700003C0          //
+{ 0x0F12, 0x0800 },   //REG_2TC_CCFG_uMaxBpp88                    	2   700003C2          //
+{ 0x0F12, 0x0072 },   //REG_2TC_CCFG_PVIMask                      	2   700003C4          //
+{ 0x0F12, 0x0010 },   //REG_2TC_CCFG_OIFMask                      	2   700003C6          //
+{ 0x0F12, 0x01E0 },   //REG_2TC_CCFG_usJpegPacketSize             	2   700003C8          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_usJpegTotalPackets           	2   700003CA          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_uClockInd                    	2   700003CC          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_usFrTimeType                 	2   700003CE          //
+{ 0x0F12, 0x0002 },   //REG_2TC_CCFG_FrRateQualityType            	2   700003D0          //
+{ 0x0F12, 0x1388 },   //REG_2TC_CCFG_usMaxFrTimeMsecMult10        	2   700003D2          //
+{ 0x0F12, 0x1388 },   //REG_2TC_CCFG_usMinFrTimeMsecMult10        	2   700003D4          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_bSmearOutput                 	2   700003D6          //
+{ 0x0F12, 0x0030 },   //REG_2TC_CCFG_sSaturation                  	2   700003D8          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_sSharpBlur                   	2   700003DA          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_sColorTemp                   	2   700003DC          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_uDeviceGammaIndex            	2   700003DE          //
+                 
+                 
+{ 0x002A, 0x0208 },
+{ 0x0F12, 0x0001 },   //REG_TC_IPRM_InitParamsUpdated//
+                 
+                 
+{ 0x002A, 0x0530 },   //lt_uMaxExp1//     
+{ 0x0F12, 0x3415 },                       
+{ 0x002A, 0x0534 },   //lt_uMaxExp2//     
+{ 0x0F12, 0x682A },                       
+{ 0x002A, 0x167C },   //lt_uMaxExp3//     
+{ 0x0F12, 0x8235 },                       
+{ 0x002A, 0x1680 },   //lt_uMaxExp4//     
+{ 0x0F12, 0x1A80 },                       
+{ 0x0F12, 0x0006 },                       
+                                          
+{ 0x002A, 0x0538 },   //It_uCapMaxExp1 // 
+{ 0x0F12, 0x3415 },                       
+{ 0x002A, 0x053C },   //It_uCapMaxExp2 // 
+{ 0x0F12, 0x682A },                       
+{ 0x002A, 0x1684 },   //It_uCapMaxExp3 // 
+{ 0x0F12, 0x8235 },                       
+{ 0x002A, 0x1688 },   //It_uCapMaxExp4 // 
+{ 0x0F12, 0x1A80 },                       
+{ 0x0F12, 0x0006 },                       
+                                          
+{ 0x002A, 0x0540 },                       
+{ 0x0F12, 0x0180 },   //It_uMaxAnGain1 // 
+{ 0x0F12, 0x0250 },   //It_uMaxAnGain2 // 
+{ 0x002A, 0x168C },                       
+{ 0x0F12, 0x0340 },   //It_uMaxAnGain3 // 
+{ 0x0F12, 0x0800 },   //It_uMaxAnGain4 // 
+                                          
+{ 0x002A, 0x0544 },                       
+{ 0x0F12, 0x0100 },   //It_uMaxDigGain // 
+                 
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x07E6 },
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+                 
+{ 0x002A, 0x0838 },
+{ 0x0F12, 0x0A3C },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x023C },
+{ 0x0F12, 0x0002 },  //night preview config 2//
+{ 0x002A, 0x0240 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0230 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x023E },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0220 },
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x0001 },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////////
+// SCENE_SPORTS_ON
+////////////////
+s5k5ca_short_t s5k5ca_scene_sports_on_00[] =
+{
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+
+{ 0x002A, 0x12B8 },  
+{ 0x0F12, 0x2000 }, 
+
+{ 0x002A, 0x0530 },
+{ 0x0F12, 0x36B0 },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534 },                                                               
+{ 0x0F12, 0x36B0 },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C },                                                               
+{ 0x0F12, 0x36B0 },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680 },                                                               
+{ 0x0F12, 0x36B0 },   //MaxExp4   125ms  38ea //                           
+        
+{ 0x002A, 0x0538 },                                                               
+{ 0x0F12, 0x36B0 },   // 15fps //                                                 
+{ 0x002A, 0x053C },                                                               
+{ 0x0F12, 0x36B0 },   // 7.5fps //                                                
+{ 0x002A, 0x1684 },                                                               
+{ 0x0F12, 0x36B0 },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688 },                                                               
+{ 0x0F12, 0x36B0 },   //CapMaxExp4 //                                             
+ 
+{ 0x002A, 0x0540 },                                                               
+{ 0x0F12, 0x0200 },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200 },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C },                                                               
+{ 0x0F12, 0x0200 },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200 },   //MaxAnGain4 //    
+
+{ 0x002A, 0x0544 },  
+{ 0x0F12, 0x0100 },
+{ 0x0F12, 0x8000 },
+
+{ 0x002A, 0x04B4 },  
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x00C8 },
+{ 0x0F12, 0x0001 },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////////
+// SCENE_SUNSET_ON
+////////////////
+s5k5ca_short_t s5k5ca_scene_sunset_on_00[] =
+{ 
+{ 0xfcfc, 0xd000 },
+{ 0x0028, 0x7000 },
+{ 0x002a, 0x246E },
+{ 0x0f12, 0x0000 },
+                 
+{ 0x002a, 0x04A0 },
+{ 0x0f12, 0x05E0 },
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0400 },
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0500 },
+{ 0x0f12, 0x0001 },
+
+{ 0xffff, 0xffff  },
+};
+
+////////////////
+// SCENE_DAWN_ON
+////////////////
+s5k5ca_short_t s5k5ca_scene_dawn_on_00[] =
+{ 
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+
+//////////////////////
+// SCENE_AGAINSTLIGHT_ON
+//////////////////////
+s5k5ca_short_t s5k5ca_scene_againstlight_on_00[] =
+{ 
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_TEXT_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_text_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x020C },
+{ 0x0F12, 0x0000 },
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x0000 },
+{ 0x0F12, 0x0014 },
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_PARTY_INDOOR_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_party_indoor_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+                    // Party/indoor _ Shaturation +1
+{ 0x0028, 0x7000 }, //For Scene
+{ 0x002A, 0x020C },             
+{ 0x0F12, 0x0000 }, // Brightness for controling the EV
+{ 0x002A, 0x0210 }, 
+{ 0x0F12, 0x001e }, // Saturagon
+{ 0x0F12, 0x0000 }, // Sharpness
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_BEACH_SNOW_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_beach_snow_on_00[] =
+{ 
+//04. BEACH_SNOW
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 }, //For Scene
+{ 0x002A, 0x020C },             
+{ 0x0F12, 0x0014 }, // Brightness for controling the EV
+{ 0x002A, 0x0210 }, 
+{ 0x0F12, 0x001e }, // Saturagon
+{ 0x0F12, 0x0000 }, // Sharpness
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_CANDLELIGHT_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_candlelight_on_00[] =
+{ 
+
+{ 0xfcfc, 0xd000 }, 
+{ 0x0028, 0x7000 }, 
+{ 0x002a, 0x246E }, 	 
+{ 0x0f12, 0x0000 },
+
+{ 0x002a, 0x04A0 }, 	 
+{ 0x0f12, 0x05E0 },
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0400 }, 
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0500 },
+{ 0x0f12, 0x0001 }, 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_FIREWORKS_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_fireworks_on_00[] =
+{ 
+//09. FIRE _ Preview : (4fps Exposure 250ms) Capture : ( 1fps Exposure 1000ms )
+//Preview 4fps : Capture 1fps
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x02CC },
+{ 0x0F12, 0x0400 },    	//REG_2TC_PCFG_usWidth                      	2   700002CC        //
+{ 0x0F12, 0x0300 },    	//REG_2TC_PCFG_usHeight                     	2   700002CE        //
+{ 0x0F12, 0x0005 },    	//REG_2TC_PCFG_Format                       	2   700002D0        //
+{ 0x0F12, 0x32E8 },    	//REG_2TC_PCFG_usMaxOut4KHzRate             	2   700002D2        //
+{ 0x0F12, 0x32a8 },    	//REG_2TC_PCFG_usMinOut4KHzRate             	2   700002D4        //
+{ 0x0F12, 0x0100 },    	//REG_2TC_PCFG_OutClkPerPix88               	2   700002D6        //
+{ 0x0F12, 0x0800 },    	//REG_2TC_PCFG_uMaxBpp88                    	2   700002D8        //
+{ 0x0F12, 0x0072 },    	//REG_2TC_PCFG_PVIMask                      	2   700002DA        //
+{ 0x0F12, 0x0010 },    	//REG_2TC_PCFG_OIFMask                      	2   700002DC        //
+{ 0x0F12, 0x01E0 },    	//REG_2TC_PCFG_usJpegPacketSize             	2   700002DE        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_usJpegTotalPackets           	2   700002E0        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_uClockInd                    	2   700002E2        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_usFrTimeType                 	2   700002E4        //
+{ 0x0F12, 0x0001 },    	//REG_2TC_PCFG_FrRateQualityType            	2   700002E6        //
+{ 0x0F12, 0x09C4 },    	//REG_2TC_PCFG_usMaxFrTimeMsecMult10        	2   700002E8        //
+{ 0x0F12, 0x029A },    	//REG_2TC_PCFG_usMinFrTimeMsecMult10        	2   700002EA        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_bSmearOutput                 	2   700002EC        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_sSaturation                  	2   700002EE        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_sSharpBlur                   	2   700002F0        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_sColorTemp                   	2   700002F2        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_uDeviceGammaIndex            	2   700002F4        //
+{ 0x0F12, 0x0003 },    	//REG_2TC_PCFG_uPrevMirror                  	2   700002F6        //
+{ 0x0F12, 0x0003 },    	//REG_2TC_PCFG_uCaptureMirror               	2   700002F8        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_uRotation                    	2   700002FA        //
+
+//Night shot capture 2fps
+{ 0x002A, 0x03B4 },
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_uCaptureMode                 	2   700003B4              //
+{ 0x0F12, 0x0800 },    	//REG_2TC_CCFG_usWidth                      	2   700003B6              //
+{ 0x0F12, 0x0600 },    	//REG_2TC_CCFG_usHeight                     	2   700003B8              //
+{ 0x0F12, 0x0005 },    	//REG_2TC_CCFG_Format                       	2   700003BA              //
+{ 0x0F12, 0x32E8 },    	//REG_2TC_CCFG_usMaxOut4KHzRate             	2   700003BC              //
+{ 0x0F12, 0x32a8 },    	//REG_2TC_CCFG_usMinOut4KHzRate             	2   700003BE              //
+{ 0x0F12, 0x0100 },    	//REG_2TC_CCFG_OutClkPerPix88               	2   700003C0              //
+{ 0x0F12, 0x0800 },    	//REG_2TC_CCFG_uMaxBpp88                    	2   700003C2              //
+{ 0x0F12, 0x0072 },    	//REG_2TC_CCFG_PVIMask                      	2   700003C4              //
+{ 0x0F12, 0x0010 },    	//REG_2TC_CCFG_OIFMask                      	2   700003C6              //
+{ 0x0F12, 0x01E0 },    	//REG_2TC_CCFG_usJpegPacketSize             	2   700003C8              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_usJpegTotalPackets           	2   700003CA              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_uClockInd                    	2   700003CC              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_usFrTimeType                 	2   700003CE              //
+{ 0x0F12, 0x0002 },    	//REG_2TC_CCFG_FrRateQualityType            	2   700003D0              //
+{ 0x0F12, 0x2710 },	//REG_2TC_CCFG_usMaxFrTimeMsecMult10        	2   700003D2              //
+{ 0x0F12, 0x2710 },	//REG_2TC_CCFG_usMinFrTimeMsecMult10        	2   700003D4              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_bSmearOutput                 	2   700003D6              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_sSaturation                  	2   700003D8              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_sSharpBlur                   	2   700003DA              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_sColorTemp                   	2   700003DC              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_uDeviceGammaIndex            	2   700003DE              //
+
+{ 0x002A, 0x0208 },                                      
+{ 0x0F12, 0x0001 },       //REG_TC_IPRM_InitParamsUpdated//
+
+{ 0x002A, 0x0530 },	//lt_uMaxExp1             
+{ 0x0F12, 0x3415 },		
+{ 0x002A, 0x0534 },       //lt_uMaxExp2              
+{ 0x0F12, 0x682A },		
+{ 0x002A, 0x167C },       //lt_uMaxExp3              
+{ 0x0F12, 0x8235 },		
+{ 0x002A, 0x1680 },       //lt_uMaxExp4              
+{ 0x0F12, 0x1A80 },       //1fps
+{ 0x0F12, 0x0006 },
+                              
+{ 0x002A, 0x0538 },       //It_uCapMaxExp1 //              
+{ 0x0F12, 0x3415 },	  
+{ 0x002A, 0x053C },       //It_uCapMaxExp1 //             
+{ 0x0F12, 0x682A },	  
+{ 0x002A, 0x1684 },       //It_uCapMaxExp3 //              
+{ 0x0F12, 0x8235 },	
+{ 0x002A, 0x1688 },       //It_uCapMaxExp4 //             
+{ 0x0F12, 0x1A80 },       //1fps
+{ 0x0F12, 0x0006 },	
+                              
+{ 0x002A, 0x0540 },                     
+{ 0x0F12, 0x0180 },       //It_uMaxAnGain1 //
+{ 0x0F12, 0x0250 },	//It_uMaxAnGain2 //
+{ 0x002A, 0x168C },                     
+{ 0x0F12, 0x0340 },	//It_uMaxAnGain3 //
+{ 0x0F12, 0x0710 },	//It_uMaxAnGain4 //
+
+{ 0x002A, 0x0544 },       //It_uMaxDigGain //
+{ 0x0F12, 0x0100 },
+
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x023C },
+{ 0x0F12, 0x0002 },	//#REG_TC_GP_ActivePrevConfig     //Night Preview
+{ 0x002A, 0x0240 },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_PrevOpenAfterChange
+{ 0x002A, 0x0230 },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_NewConfigSync
+{ 0x002A, 0x023E },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_PrevConfigChanged
+{ 0x002A, 0x0220 },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_EnablePreview
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_EnablePreviewChanged
+ 
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_Dust_Dawn_On
+///////////////
+s5k5ca_short_t s5k5ca_scene_dust_dawn_00[] =
+{ 
+//Cam_Cfg_WB_Fluorescent
+{ 0xfcfc, 0xd000 }, 
+{ 0x0028, 0x7000 }, 
+{ 0x002a, 0x246E }, 	 
+{ 0x0f12, 0x0000 },
+
+{ 0x002a, 0x04A0 }, 	 
+{ 0x0f12, 0x0530 }, 
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0400 }, 
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0800 }, 
+{ 0x0f12, 0x0001 }, 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_Fall_Color_On
+///////////////
+s5k5ca_short_t s5k5ca_scene_fall_color_00[] =
+{ 
+//07. FALL
+{ 0xFCFC, 0xD000 },
+//  Fall  _ Saturation +2
+{ 0x0028, 0x7000 }, //For Scene
+{ 0x002A, 0x020C },             
+{ 0x0F12, 0x0000 }, // Brightness for controling the EV
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x0032 }, // Saturation
+{ 0x0F12, 0x0000 }, // Sharpness
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_Backlight_On
+///////////////
+s5k5ca_short_t s5k5ca_scene_backlight_00[] =
+{ 
+//Metering Center
+//Flash On Default
+{ 0xfcfc, 0xd000 },
+{ 0x0028, 0x7000 },
+                 
+{ 0x002A, 0x0F7E  },    //ae weight  //     
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0201
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0102
+
+{ 0xffff, 0xffff  },
+};
+
+
+
+
+////////////////////////
+// MeasureBrightness_SPOT
+///////////////////////
+s5k5ca_short_t s5k5ca_measure_brightness_spot_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////////////////
+// MeasureBrightness_Default
+//////////////////////////
+s5k5ca_short_t s5k5ca_measure_brightness_default_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+#if 1//PGH 
+s5k5ca_short_t s5k5ca_ae_awb_unlock[] = 
+{
+{ 0xffff, 0xffff  },
+
+};
+ 
+s5k5ca_short_t s5k5ca_ae_mwb_unlock[] = 
+{
+{ 0xffff, 0xffff  },
+
+};
+ 
+s5k5ca_short_t s5k5ca_ae_awb_lock[] = 
+{
+{ 0xffff, 0xffff  },
+
+};
+#endif//PGH
+
+
+s5k5ca_short_t s5k5ca_af_low_lux_val[] = 
+{ //0217 SEMCO
+
+{ 0xffff, 0xffff  },
+};
+	 
+s5k5ca_short_t s5k5ca_af_normal_lux_val[] = 
+{
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////////////////////
+// MeasureBrightness_CENTER
+/////////////////////////////
+s5k5ca_short_t s5k5ca_measure_brightness_center_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+// 0407 function add.
+
+s5k5ca_short_t s5k5ca_metering_spot[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+                    
+{ 0x002A, 0x0F7E  },
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0f01  }, 
+{ 0x0f12, 0x010f  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0f01  }, 
+{ 0x0f12, 0x010f  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  },
+
+{ 0xffff, 0xffff  },
+
+};
+
+s5k5ca_short_t s5k5ca_metering_matrix[] = 
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+                  
+{ 0x002a, 0x0F7E  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  },
+
+{ 0xffff, 0xffff  },
+
+};
+
+s5k5ca_short_t s5k5ca_metering_center[] = 
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },             
+                                                             
+{ 0x002A, 0x0F7E  },    //ae weight  //     
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0201
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0102
+
+{ 0xffff, 0xffff  },
+
+};
+
+
+
+
+
+//define S5K5CA_INIT_REGS (sizeof(s5k5ca_reg)/sizeof(s5k5ca_reg[0]))
+//define S5K5CA_UXGA_REGS (sizeof(s5k5ca_reg_uxga)/sizeof(s5k5ca_reg_uxga[0]))
+//define S5K5CA_SVGA_REGS (sizeof(s5k5ca_reg_svga)/sizeof(s5k5ca_reg_svga[0]))
+//define S5K5CA_VGA_REGS (sizeof(s5k5ca_reg_vga)/sizeof(s5k5ca_reg_vga[0]))
+//define S5K5CA_QSVGA_REGS (sizeof(s5k5ca_reg_qsvga)/sizeof(s5k5ca_reg_qsvga[0]))
+
+////define S5K5CA_RISC_REGS 0xEB
+////define S5K5CA_ISP_REGS 0xFB /* S5C7323X */
+////define S5K5CA_CIS_REGS 0x2F /* S5K437LA03 */
+                                                                                                                                                                                              
+////define S5K5CA_REGS (0x1000)
+
+//endif
+
+
+
+#endif
diff -uNra linux-3.0.82/drivers/media/video/s5k5ca_new.h linux-3.0.82x/drivers/media/video/s5k5ca_new.h
--- linux-3.0.82/drivers/media/video/s5k5ca_new.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/s5k5ca_new.h	2017-09-23 03:42:49.606676323 +0800
@@ -0,0 +1,5403 @@
+
+#ifndef _SAMSUNG_SXGA_H_
+#define _SAMSUNG_SXGA_H_
+
+/*******************************************************************************************
+ #  Display resolution standards #
+
+	QCIF: 176 x 144
+	CIF: 352 x 288
+	QVGA: 320 x 240
+	VGA: 640 x 480 
+	SVGA: 800 x 600 
+	XGA: 1024 x 768 
+	WXGA: 1280 x 800 
+	QVGA: 1280 x 960 
+	SXGA: 1280 x 1024 
+	SXGA+: 1400 x 1050 
+	WSXGA+: 1680 x 1050 
+	UXGA: 1600 x 1200 
+	WUXGA: 1920 x 1200 
+	QXGA: 2048 x 1536
+********************************************************************************************/
+
+//#include "../bits.h"
+
+/* Camera information 
+ * FPC Label : Samsung MEGA Pixel Camera : V4220 REV06 
+ * Modified by charles -Initial function of '3AA' test routine
+ * Modified and tested by YongHwui.Kim <yonghwui.kim@samsung.com> for S5K3AAEX Camera
+ */
+                                                                                
+#define CHIP_DELAY 0xFF
+                                                                                
+typedef struct samsung_t{
+        unsigned short page;	
+        unsigned short subaddr;
+        unsigned short value;
+
+} s5k5ca_t;
+
+// mihee 080508 start
+typedef struct samsung_short_t{
+        unsigned short subaddr;
+        unsigned short value;
+        unsigned short page;
+} s5k5ca_short_t;
+// mihee 080508 end
+
+typedef struct exif_data_st{
+        unsigned short exposureTime;
+		unsigned short lux;
+		unsigned short iso;
+} exif_data_t;
+
+#ifdef CONFIG_CPU_S3C24A0A
+#define TRY_HIGH_CLOCK 1
+#endif
+
+				//***************************************************
+				//  name: 	S5K3AAEX EVT2 setfile
+				//  ver:		v2.61	
+				//  history: 	
+				//	v0.0	start from 040908 setfile
+				//	v1.0	arange register
+				//	v1.01	change MCLK(25Mhz) and Frame rate(7fps)
+				//	v2.0	adjust register setting for 3AA EVT2
+				//		- color correction, RGB shding off, hsync start position, Mirror, fps
+				//		- Color Tuning, YGRPDLY 
+				//	v2.1	change Frame rate(7.5fps) and Total gain to x4 
+				//		(because of reducing visual noise at low illumination)
+				//		- change BPRM AGC Max and FrameAE start 
+				//		improve AE speed
+				//	v2.2	modify AWB G gain and solve 50hz flicker detection fail in 25MHz 7.5fps
+				//	v2.3	Adjust gamma, Dark Slice, white point, Hue gain,
+				//		White Balance B control, Y gain On, Digital Clamp On
+				//		lower AWB G gain
+				//	v2.4	Adjust AE window weight, Y Gamma, WhitePoint, Shading and BPR Max Thres.
+				// 	v2.41	Adjust AE/AWB window and AWB internal window boundary to decrease skin color tracking
+				// 	v2.411	special version for PSCDS
+				// 	v2.412	RGB shading off
+				//	v2.5	Lens change STW to Sekonix 
+				//		adjust White point and Y shading Coef (RGB shading off)
+				//	v2.6	New Tuning because of Full YC off and YCbCr Coef change
+				//		Gamma, Dark Slice, color matrix (not use), Color suppress
+				//		R Gain and DBPR agc MIN/MAX
+				//	v2.61	VCK inversion(data rising)
+				//***************************************************
+				///////////////////////////////////////////////////
+
+//#if defined(CONFIG_VIDEO_SAMSUNG_S5K5CA)
+s5k5ca_short_t s5k5ca_preview_00[] = 
+{
+{ 0xFCFC, 0xD000  },                                                                                  
+{ 0x0028, 0x7000  }, 
+                  
+{ 0x002A, 0x07E6  },                                                            
+{ 0x0F12, 0x0000  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow 
+{ 0x0F12, 0x0000  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+                  
+{ 0x002A, 0x0838  },
+{ 0x0F12, 0x003C  },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x0908  },
+{ 0x0F12, 0x0046  },	//TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]
+
+//HIGHLUX RECOVER Value
+{ 0x002a, 0x0B2C  },
+{ 0x0F12, 0x003C  },	//70000B2C //TVAR_afit_pBaseValS[436] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x0050  },	//70000B2E //TVAR_afit_pBaseValS[437] /AFIT16_YUV422_DENOISE_iUVHighThresh  
+
+{ 0x002a, 0x0B50  },
+{ 0x0F12, 0x012D  },	//70000B50 //TVAR_afit_pBaseValS[454] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8] 
+
+{ 0x002a, 0x0B84  },
+{ 0x0F12, 0x210C  },	//70000B84 //TVAR_afit_pBaseValS[480] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]   
+
+
+{ 0x002A, 0x035C  }, //Capture Mode//
+{ 0x0F12, 0x0000  },
+{ 0x002A, 0x0388  }, //Capture Mode//
+{ 0x0F12, 0x0000  },
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },   
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+s5k5ca_short_t s5k5ca_init_00[] = 
+{
+{ 0xFCFC, 0xD000  },
+
+//************************************//
+////****************************************/																															//
+////Ver 0.1 New Analog Settings for 5CA EVT0 30FPS in Binning, including latest TnP for EVT1              //
+////20091310 - added analog settings for 430LSB, long exposure mode only. Settings are for 32MHz Sys. CLK //
+////20091102 - added all calibration data, final settings for STW EVT1 module, SCLK 32MHz, PCLK 60 MHz.   //
+////20091104 - Changed the shading alpha &Near off                                                        //
+////20091104 - Changed awbb_GridEnable from 0001h to 0002h	//awbb_GridEnable                             //
+////aetarget41-46, gamma change for improving contrast                                                    //
+////20100113 - New TnP updated//
+
+{ 0xFCFC, 0xD000  },	//Reset                                  //
+{ 0x0010, 0x0001  },   //Clear host interrupt so main will wait //
+{ 0x1030, 0x0000  },   //ARM go                                 //
+{ 0x0014, 0x0001  },   //Wait100mSec
+                  
+{ 0xdddd, 0x0064  }, //delay 100ms
+                  
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x2CF8  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0x4827  },
+{ 0x0F12, 0x21C0  },
+{ 0x0F12, 0x8041  },
+{ 0x0F12, 0x4825  },
+{ 0x0F12, 0x4A26  },
+{ 0x0F12, 0x3020  },
+{ 0x0F12, 0x8382  },
+{ 0x0F12, 0x1D12  },
+{ 0x0F12, 0x83C2  },
+{ 0x0F12, 0x4822  },
+{ 0x0F12, 0x3040  },
+{ 0x0F12, 0x8041  },
+{ 0x0F12, 0x4821  },
+{ 0x0F12, 0x4922  },
+{ 0x0F12, 0x3060  },
+{ 0x0F12, 0x8381  },
+{ 0x0F12, 0x1D09  },
+{ 0x0F12, 0x83C1  },
+{ 0x0F12, 0x4821  },
+{ 0x0F12, 0x491D  },
+{ 0x0F12, 0x8802  },
+{ 0x0F12, 0x3980  },
+{ 0x0F12, 0x804A  },
+{ 0x0F12, 0x8842  },
+{ 0x0F12, 0x808A  },
+{ 0x0F12, 0x8882  },
+{ 0x0F12, 0x80CA  },
+{ 0x0F12, 0x88C2  },
+{ 0x0F12, 0x810A  },
+{ 0x0F12, 0x8902  },
+{ 0x0F12, 0x491C  },
+{ 0x0F12, 0x80CA  },
+{ 0x0F12, 0x8942  },
+{ 0x0F12, 0x814A  },
+{ 0x0F12, 0x8982  },
+{ 0x0F12, 0x830A  },
+{ 0x0F12, 0x89C2  },
+{ 0x0F12, 0x834A  },
+{ 0x0F12, 0x8A00  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x8188  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x4819  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xFA0E  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x4819  },
+{ 0x0F12, 0x6341  },
+{ 0x0F12, 0x4919  },
+{ 0x0F12, 0x4819  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xFA07  },
+{ 0x0F12, 0x4816  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x3840  },
+{ 0x0F12, 0x62C1  },
+{ 0x0F12, 0x4918  },
+{ 0x0F12, 0x3880  },
+{ 0x0F12, 0x63C1  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x6301  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x3040  },
+{ 0x0F12, 0x6181  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x4817  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9F7  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x4817  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9F3  },
+{ 0x0F12, 0x4917  },
+{ 0x0F12, 0x4817  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9EF  },
+{ 0x0F12, 0xBC10  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0x1100  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x267C  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x2CE8  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x3274  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xF400  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0xF520  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2DF1  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x89A9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x2E43  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x0140  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2E7D  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xB4F7  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x2F07  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2F2B  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2FD1  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2FE5  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2FB9  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x013D  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x306B  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x5823  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x30B9  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xD789  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0xB570  },
+{ 0x0F12, 0x6804  },
+{ 0x0F12, 0x6845  },
+{ 0x0F12, 0x6881  },
+{ 0x0F12, 0x6840  },
+{ 0x0F12, 0x2900  },
+{ 0x0F12, 0x6880  },
+{ 0x0F12, 0xD007  },
+{ 0x0F12, 0x49C3  },
+{ 0x0F12, 0x8949  },
+{ 0x0F12, 0x084A  },
+{ 0x0F12, 0x1880  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9BA  },
+{ 0x0F12, 0x80A0  },
+{ 0x0F12, 0xE000  },
+{ 0x0F12, 0x80A0  },
+{ 0x0F12, 0x88A0  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD010  },
+{ 0x0F12, 0x68A9  },
+{ 0x0F12, 0x6828  },
+{ 0x0F12, 0x084A  },
+{ 0x0F12, 0x1880  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9AE  },
+{ 0x0F12, 0x8020  },
+{ 0x0F12, 0x1D2D  },
+{ 0x0F12, 0xCD03  },
+{ 0x0F12, 0x084A  },
+{ 0x0F12, 0x1880  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9A7  },
+{ 0x0F12, 0x8060  },
+{ 0x0F12, 0xBC70  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0x2000  },
+{ 0x0F12, 0x8060  },
+{ 0x0F12, 0x8020  },
+{ 0x0F12, 0xE7F8  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF9A2  },
+{ 0x0F12, 0x48B2  },
+{ 0x0F12, 0x8A40  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD00C  },
+{ 0x0F12, 0x48B1  },
+{ 0x0F12, 0x49B2  },
+{ 0x0F12, 0x8800  },
+{ 0x0F12, 0x4AB2  },
+{ 0x0F12, 0x2805  },
+{ 0x0F12, 0xD003  },
+{ 0x0F12, 0x4BB1  },
+{ 0x0F12, 0x795B  },
+{ 0x0F12, 0x2B00  },
+{ 0x0F12, 0xD005  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0x8008  },
+{ 0x0F12, 0x8010  },
+{ 0x0F12, 0xBC10  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD1FA  },
+{ 0x0F12, 0x2000  },
+{ 0x0F12, 0x8008  },
+{ 0x0F12, 0x8010  },
+{ 0x0F12, 0xE7F6  },
+{ 0x0F12, 0xB5F8  },
+{ 0x0F12, 0x2407  },
+{ 0x0F12, 0x2C06  },
+{ 0x0F12, 0xD035  },
+{ 0x0F12, 0x2C07  },
+{ 0x0F12, 0xD033  },
+{ 0x0F12, 0x48A3  },
+{ 0x0F12, 0x8BC1  },
+{ 0x0F12, 0x2900  },
+{ 0x0F12, 0xD02A  },
+{ 0x0F12, 0x00A2  },
+{ 0x0F12, 0x1815  },
+{ 0x0F12, 0x4AA4  },
+{ 0x0F12, 0x6DEE  },
+{ 0x0F12, 0x8A92  },
+{ 0x0F12, 0x4296  },
+{ 0x0F12, 0xD923  },
+{ 0x0F12, 0x0028  },
+{ 0x0F12, 0x3080  },
+{ 0x0F12, 0x0007  },
+{ 0x0F12, 0x69C0  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF96B  },
+{ 0x0F12, 0x1C71  },
+{ 0x0F12, 0x0280  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF967  },
+{ 0x0F12, 0x0006  },
+{ 0x0F12, 0x4898  },
+{ 0x0F12, 0x0061  },
+{ 0x0F12, 0x1808  },
+{ 0x0F12, 0x8D80  },
+{ 0x0F12, 0x0A01  },
+{ 0x0F12, 0x0600  },
+{ 0x0F12, 0x0E00  },
+{ 0x0F12, 0x1A08  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF96A  },
+{ 0x0F12, 0x0002  },
+{ 0x0F12, 0x6DE9  },
+{ 0x0F12, 0x6FE8  },
+{ 0x0F12, 0x1A08  },
+{ 0x0F12, 0x4351  },
+{ 0x0F12, 0x0300  },
+{ 0x0F12, 0x1C49  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF953  },
+{ 0x0F12, 0x0401  },
+{ 0x0F12, 0x0430  },
+{ 0x0F12, 0x0C00  },
+{ 0x0F12, 0x4301  },
+{ 0x0F12, 0x61F9  },
+{ 0x0F12, 0xE004  },
+{ 0x0F12, 0x00A2  },
+{ 0x0F12, 0x4990  },
+{ 0x0F12, 0x1810  },
+{ 0x0F12, 0x3080  },
+{ 0x0F12, 0x61C1  },
+{ 0x0F12, 0x1E64  },
+{ 0x0F12, 0xD2C5  },
+{ 0x0F12, 0x2006  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF959  },
+{ 0x0F12, 0x2007  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF956  },
+{ 0x0F12, 0xBCF8  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF958  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD00A  },
+{ 0x0F12, 0x4881  },
+{ 0x0F12, 0x8B81  },
+{ 0x0F12, 0x0089  },
+{ 0x0F12, 0x1808  },
+{ 0x0F12, 0x6DC1  },
+{ 0x0F12, 0x4883  },
+{ 0x0F12, 0x8A80  },
+{ 0x0F12, 0x4281  },
+{ 0x0F12, 0xD901  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0xE7A1  },
+{ 0x0F12, 0x2000  },
+{ 0x0F12, 0xE79F  },
+{ 0x0F12, 0xB5F8  },
+{ 0x0F12, 0x0004  },
+{ 0x0F12, 0x4F80  },
+{ 0x0F12, 0x227D  },
+{ 0x0F12, 0x8938  },
+{ 0x0F12, 0x0152  },
+{ 0x0F12, 0x4342  },
+{ 0x0F12, 0x487E  },
+{ 0x0F12, 0x9000  },
+{ 0x0F12, 0x8A01  },
+{ 0x0F12, 0x0848  },
+{ 0x0F12, 0x1810  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91D  },
+{ 0x0F12, 0x210F  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF940  },
+{ 0x0F12, 0x497A  },
+{ 0x0F12, 0x8C49  },
+{ 0x0F12, 0x090E  },
+{ 0x0F12, 0x0136  },
+{ 0x0F12, 0x4306  },
+{ 0x0F12, 0x4979  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0xD003  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0x0240  },
+{ 0x0F12, 0x4330  },
+{ 0x0F12, 0x8108  },
+{ 0x0F12, 0x4876  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0x8D00  },
+{ 0x0F12, 0xD001  },
+{ 0x0F12, 0x2501  },
+{ 0x0F12, 0xE000  },
+{ 0x0F12, 0x2500  },
+{ 0x0F12, 0x4972  },
+{ 0x0F12, 0x4328  },
+{ 0x0F12, 0x8008  },
+{ 0x0F12, 0x207D  },
+{ 0x0F12, 0x00C0  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF92E  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0x496E  },
+{ 0x0F12, 0x0328  },
+{ 0x0F12, 0x4330  },
+{ 0x0F12, 0x8108  },
+{ 0x0F12, 0x88F8  },
+{ 0x0F12, 0x2C00  },
+{ 0x0F12, 0x01AA  },
+{ 0x0F12, 0x4310  },
+{ 0x0F12, 0x8088  },
+{ 0x0F12, 0x9800  },
+{ 0x0F12, 0x8A01  },
+{ 0x0F12, 0x486A  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8F1  },
+{ 0x0F12, 0x496A  },
+{ 0x0F12, 0x8809  },
+{ 0x0F12, 0x4348  },
+{ 0x0F12, 0x0400  },
+{ 0x0F12, 0x0C00  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF918  },
+{ 0x0F12, 0x0020  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91D  },
+{ 0x0F12, 0x4866  },
+{ 0x0F12, 0x7004  },
+{ 0x0F12, 0xE7A3  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0x0004  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91E  },
+{ 0x0F12, 0x6020  },
+{ 0x0F12, 0x4963  },
+{ 0x0F12, 0x8B49  },
+{ 0x0F12, 0x0789  },
+{ 0x0F12, 0xD001  },
+{ 0x0F12, 0x0040  },
+{ 0x0F12, 0x6020  },
+{ 0x0F12, 0xE74C  },
+{ 0x0F12, 0xB510  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF91B  },
+{ 0x0F12, 0x485F  },
+{ 0x0F12, 0x8880  },
+{ 0x0F12, 0x0601  },
+{ 0x0F12, 0x4854  },
+{ 0x0F12, 0x1609  },
+{ 0x0F12, 0x8141  },
+{ 0x0F12, 0xE742  },
+{ 0x0F12, 0xB5F8  },
+{ 0x0F12, 0x000F  },
+{ 0x0F12, 0x4C55  },
+{ 0x0F12, 0x3420  },
+{ 0x0F12, 0x2500  },
+{ 0x0F12, 0x5765  },
+{ 0x0F12, 0x0039  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF913  },
+{ 0x0F12, 0x9000  },
+{ 0x0F12, 0x2600  },
+{ 0x0F12, 0x57A6  },
+{ 0x0F12, 0x4C4C  },
+{ 0x0F12, 0x42AE  },
+{ 0x0F12, 0xD01B  },
+{ 0x0F12, 0x4D54  },
+{ 0x0F12, 0x8AE8  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD013  },
+{ 0x0F12, 0x484D  },
+{ 0x0F12, 0x8A01  },
+{ 0x0F12, 0x8B80  },
+{ 0x0F12, 0x4378  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8B5  },
+{ 0x0F12, 0x89A9  },
+{ 0x0F12, 0x1A41  },
+{ 0x0F12, 0x484E  },
+{ 0x0F12, 0x3820  },
+{ 0x0F12, 0x8AC0  },
+{ 0x0F12, 0x4348  },
+{ 0x0F12, 0x17C1  },
+{ 0x0F12, 0x0D89  },
+{ 0x0F12, 0x1808  },
+{ 0x0F12, 0x1280  },
+{ 0x0F12, 0x8961  },
+{ 0x0F12, 0x1A08  },
+{ 0x0F12, 0x8160  },
+{ 0x0F12, 0xE003  },
+{ 0x0F12, 0x88A8  },
+{ 0x0F12, 0x0600  },
+{ 0x0F12, 0x1600  },
+{ 0x0F12, 0x8160  },
+{ 0x0F12, 0x200A  },
+{ 0x0F12, 0x5E20  },
+{ 0x0F12, 0x42B0  },
+{ 0x0F12, 0xD011  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8AB  },
+{ 0x0F12, 0x1D40  },
+{ 0x0F12, 0x00C3  },
+{ 0x0F12, 0x1A18  },
+{ 0x0F12, 0x214B  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF897  },
+{ 0x0F12, 0x211F  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8BA  },
+{ 0x0F12, 0x210A  },
+{ 0x0F12, 0x5E61  },
+{ 0x0F12, 0x0FC9  },
+{ 0x0F12, 0x0149  },
+{ 0x0F12, 0x4301  },
+{ 0x0F12, 0x483D  },
+{ 0x0F12, 0x81C1  },
+{ 0x0F12, 0x9800  },
+{ 0x0F12, 0xE74A  },
+{ 0x0F12, 0xB5F1  },
+{ 0x0F12, 0xB082  },
+{ 0x0F12, 0x2500  },
+{ 0x0F12, 0x483A  },
+{ 0x0F12, 0x9001  },
+{ 0x0F12, 0x2400  },
+{ 0x0F12, 0x2028  },
+{ 0x0F12, 0x4368  },
+{ 0x0F12, 0x4A39  },
+{ 0x0F12, 0x4925  },
+{ 0x0F12, 0x1887  },
+{ 0x0F12, 0x1840  },
+{ 0x0F12, 0x9000  },
+{ 0x0F12, 0x9800  },
+{ 0x0F12, 0x0066  },
+{ 0x0F12, 0x9A01  },
+{ 0x0F12, 0x1980  },
+{ 0x0F12, 0x218C  },
+{ 0x0F12, 0x5A09  },
+{ 0x0F12, 0x8A80  },
+{ 0x0F12, 0x8812  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8CA  },
+{ 0x0F12, 0x53B8  },
+{ 0x0F12, 0x1C64  },
+{ 0x0F12, 0x2C14  },
+{ 0x0F12, 0xDBF1  },
+{ 0x0F12, 0x1C6D  },
+{ 0x0F12, 0x2D03  },
+{ 0x0F12, 0xDBE6  },
+{ 0x0F12, 0x9802  },
+{ 0x0F12, 0x6800  },
+{ 0x0F12, 0x0600  },
+{ 0x0F12, 0x0E00  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8C5  },
+{ 0x0F12, 0xBCFE  },
+{ 0x0F12, 0xBC08  },
+{ 0x0F12, 0x4718  },
+{ 0x0F12, 0xB570  },
+{ 0x0F12, 0x6805  },
+{ 0x0F12, 0x2404  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8C5  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD103  },
+{ 0x0F12, 0xF000  },
+{ 0x0F12, 0xF8C9  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2400  },
+{ 0x0F12, 0x3540  },
+{ 0x0F12, 0x88E8  },
+{ 0x0F12, 0x0500  },
+{ 0x0F12, 0xD403  },
+{ 0x0F12, 0x4822  },
+{ 0x0F12, 0x89C0  },
+{ 0x0F12, 0x2800  },
+{ 0x0F12, 0xD002  },
+{ 0x0F12, 0x2008  },
+{ 0x0F12, 0x4304  },
+{ 0x0F12, 0xE001  },
+{ 0x0F12, 0x2010  },
+{ 0x0F12, 0x4304  },
+{ 0x0F12, 0x481F  },
+{ 0x0F12, 0x8B80  },
+{ 0x0F12, 0x0700  },
+{ 0x0F12, 0x0F81  },
+{ 0x0F12, 0x2001  },
+{ 0x0F12, 0x2900  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x4304  },
+{ 0x0F12, 0x491C  },
+{ 0x0F12, 0x8B0A  },
+{ 0x0F12, 0x42A2  },
+{ 0x0F12, 0xD004  },
+{ 0x0F12, 0x0762  },
+{ 0x0F12, 0xD502  },
+{ 0x0F12, 0x4A19  },
+{ 0x0F12, 0x3220  },
+{ 0x0F12, 0x8110  },
+{ 0x0F12, 0x830C  },
+{ 0x0F12, 0xE691  },
+{ 0x0F12, 0x0C3C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x3274  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x26E8  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x6100  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x6500  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x1A7C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1120  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xFFFF  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x3374  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1D6C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x167C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xF400  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2C2C  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x40A0  },
+{ 0x0F12, 0x00DD  },
+{ 0x0F12, 0xF520  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2C29  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1A54  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1564  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xF2A0  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x2440  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x05A0  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x2894  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0x1224  },
+{ 0x0F12, 0x7000  },
+{ 0x0F12, 0xB000  },
+{ 0x0F12, 0xD000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x1A3F  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xF004  },
+{ 0x0F12, 0xE51F  },
+{ 0x0F12, 0x1F48  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x24BD  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x36DD  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xB4CF  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xB5D7  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x36ED  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xF53F  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xF5D9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x013D  },
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xF5C9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xFAA9  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x3723  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0x5823  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xD771  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x4778  },
+{ 0x0F12, 0x46C0  },
+{ 0x0F12, 0xC000  },
+{ 0x0F12, 0xE59F  },
+{ 0x0F12, 0xFF1C  },
+{ 0x0F12, 0xE12F  },
+{ 0x0F12, 0xD75B  },
+{ 0x0F12, 0x0000  },
+{ 0x0F12, 0x8117  },
+{ 0x0F12, 0x0000  },
+
+// End TnP part
+
+//========================================================                      
+// CIs/APs/An setting        - 400LsB  sYsCLK 32MHz                             
+//========================================================                      
+// This regis are for FACTORY ONLY. If you change it without prior notification,
+// YOU are REsIBLE for the FAILURE that will happen in the future.              
+//========================================================                      
+
+
+{ 0x002A, 0x157A  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x1578  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x1576  },
+{ 0x0F12, 0x0020  },
+{ 0x002A, 0x1574  },
+{ 0x0F12, 0x0006  },
+{ 0x002A, 0x156E  },
+{ 0x0F12, 0x0001  },	// slope calibration tolerance in units of 1/256	
+{ 0x002A, 0x1568  },
+{ 0x0F12, 0x00FC  },
+                  
+// /ADC control    
+{ 0x002A, 0x155A  },
+{ 0x0F12, 0x01CC  },	//ADC sAT of 450mV for 10bit default in EVT1                         	
+{ 0x002A, 0x157E  },                                                                        
+{ 0x0F12, 0x0C80  },	// 3200 Max. Reset ramp DCLK counts (default 2048 0x800)             
+{ 0x0F12, 0x0578  },	// 1400 Max. Reset ramp DCLK counts for x3.5                         
+{ 0x002A, 0x157C  },                                                                        
+{ 0x0F12, 0x0190  },	// 400 Reset ramp for x1 in DCLK counts                              
+{ 0x002A, 0x1570  },                                                                        
+{ 0x0F12, 0x00A0  },	// 160 LsB                                                           
+{ 0x0F12, 0x0010  },	// reset threshold                                                   
+{ 0x002A, 0x12C4  },                                                                        
+{ 0x0F12, 0x006A  },	// 106 additional timing columns.                                    
+{ 0x002A, 0x12C8  },                                                                        
+{ 0x0F12, 0x08AC  },	// 2220 ADC columns in normal mode including Hold & Latch            
+{ 0x0F12, 0x0050  },	// 80 addition of ADC columns in Y-ave mode (default 244 0x74)
+                  
+{ 0x002A, 0x1696  },	// based on APs guidelines                        
+{ 0x0F12, 0x0000  },   // based on APs guidelines                        
+{ 0x0F12, 0x0000  },   // default. 1492 used for ADC dark characteristics
+{ 0x0F12, 0x00C6  },   // default. 1492 used for ADC dark characteristics
+{ 0x0F12, 0x00C6  },                                                  
+//{ 0x002A, 0x12B8  },   //disable CINTR 0                                 
+//{ 0x0F12, 0x0B00  },                                                     
+                                                                      
+{ 0x002A, 0x1690  },   // when set double sampling is activated - requires different set of pointers                                                 
+{ 0x0F12, 0x0001  },                                                     
+                                                                      
+{ 0x002A, 0x12B0  },   // comp and pixel bias control 0xF40E - default for EVT1                                                                      
+{ 0x0F12, 0x0055  },   // comp and pixel bias control 0xF40E for binning mode                                                                        
+{ 0x0F12, 0x005A  },                                                     
+                                                                      
+{ 0x002A, 0x337A  },   // [7] - is used for rest-only mode (EVT0 value is 0xD and HW 0x6)                                                            
+{ 0x0F12, 0x0006  },
+{ 0x0F12, 0x0068  },
+{ 0x002A, 0x169E  },
+{ 0x0F12, 0x0007  },
+{ 0x002A, 0x0BF6  },
+{ 0x0F12, 0x0000  },
+	                
+                    
+{ 0x002A, 0x327C  },
+{ 0x0F12, 0x1000  },
+{ 0x0F12, 0x6998  },
+{ 0x0F12, 0x0078  },
+{ 0x0F12, 0x04FE  },
+{ 0x0F12, 0x8800  },
+                    
+{ 0x002A, 0x3274  },
+{ 0x0F12, 0x0155  },	//set IO driving current 2mA for Gs500
+{ 0x0F12, 0x0155  },   //set IO driving current              
+{ 0x0F12, 0x1555  },   //set IO driving current              
+{ 0x0F12, 0x0555  },   //set IO driving current              
+                    
+                    
+{ 0x0028, 0x7000  },	
+{ 0x002A, 0x12D2  },	   
+{ 0x0F12, 0x0003  },	//senHal_pContSenModesRegsArray[0][0]2 700012D2     
+{ 0x0F12, 0x0003  },   //senHal_pContSenModesRegsArray[0][1]2 700012D4  
+{ 0x0F12, 0x0003  },   //senHal_pContSenModesRegsArray[0][2]2 700012D6  
+{ 0x0F12, 0x0003  },   //senHal_pContSenModesRegsArray[0][3]2 700012D8  
+{ 0x0F12, 0x0884  },   //senHal_pContSenModesRegsArray[1][0]2 700012DA  
+{ 0x0F12, 0x08CF  },   //senHal_pContSenModesRegsArray[1][1]2 700012DC  
+{ 0x0F12, 0x0500  },   //senHal_pContSenModesRegsArray[1][2]2 700012DE  
+{ 0x0F12, 0x054B  },   //senHal_pContSenModesRegsArray[1][3]2 700012E0  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][0]2 700012E2  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][1]2 700012E4  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][2]2 700012E6  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[2][3]2 700012E8  
+{ 0x0F12, 0x0885  },   //senHal_pContSenModesRegsArray[3][0]2 700012EA  
+{ 0x0F12, 0x0467  },   //senHal_pContSenModesRegsArray[3][1]2 700012EC  
+{ 0x0F12, 0x0501  },   //senHal_pContSenModesRegsArray[3][2]2 700012EE  
+{ 0x0F12, 0x02A5  },   //senHal_pContSenModesRegsArray[3][3]2 700012F0  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[4][0]2 700012F2  
+{ 0x0F12, 0x046A  },   //senHal_pContSenModesRegsArray[4][1]2 700012F4  
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[4][2]2 700012F6  
+{ 0x0F12, 0x02A8  },   //senHal_pContSenModesRegsArray[4][3]2 700012F8  
+{ 0x0F12, 0x0885  },   //senHal_pContSenModesRegsArray[5][0]2 700012FA  
+{ 0x0F12, 0x08D0  },   //senHal_pContSenModesRegsArray[5][1]2 700012FC  
+{ 0x0F12, 0x0501  },   //senHal_pContSenModesRegsArray[5][2]2 700012FE  
+{ 0x0F12, 0x054C  },   //senHal_pContSenModesRegsArray[5][3]2 70001300  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[6][0]2 70001302  
+{ 0x0F12, 0x0020  },   //senHal_pContSenModesRegsArray[6][1]2 70001304  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[6][2]2 70001306  
+{ 0x0F12, 0x0020  },   //senHal_pContSenModesRegsArray[6][3]2 70001308  
+{ 0x0F12, 0x0881  },   //senHal_pContSenModesRegsArray[7][0]2 7000130A  
+{ 0x0F12, 0x0463  },   //senHal_pContSenModesRegsArray[7][1]2 7000130C  
+{ 0x0F12, 0x04FD  },   //senHal_pContSenModesRegsArray[7][2]2 7000130E  
+{ 0x0F12, 0x02A1  },   //senHal_pContSenModesRegsArray[7][3]2 70001310  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[8][0]2 70001312  
+{ 0x0F12, 0x0489  },   //senHal_pContSenModesRegsArray[8][1]2 70001314  
+{ 0x0F12, 0x0006  },   //senHal_pContSenModesRegsArray[8][2]2 70001316  
+{ 0x0F12, 0x02C7  },   //senHal_pContSenModesRegsArray[8][3]2 70001318  
+{ 0x0F12, 0x0881  },   //senHal_pContSenModesRegsArray[9][0]2 7000131A  
+{ 0x0F12, 0x08CC  },   //senHal_pContSenModesRegsArray[9][1]2 7000131C  
+{ 0x0F12, 0x04FD  },   //senHal_pContSenModesRegsArray[9][2]2 7000131E  
+{ 0x0F12, 0x0548  },   //senHal_pContSenModesRegsArray[9][3]2 70001320  
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[10][0] 2 70001322
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[10][1] 2 70001324
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[10][2] 2 70001326
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[10][3] 2 70001328
+{ 0x0F12, 0x03F2  },   //senHal_pContSenModesRegsArray[11][0] 2 7000132A
+{ 0x0F12, 0x0223  },   //senHal_pContSenModesRegsArray[11][1] 2 7000132C
+{ 0x0F12, 0x0230  },   //senHal_pContSenModesRegsArray[11][2] 2 7000132E
+{ 0x0F12, 0x0142  },   //senHal_pContSenModesRegsArray[11][3] 2 70001330
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[12][0] 2 70001332
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[12][1] 2 70001334
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[12][2] 2 70001336
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[12][3] 2 70001338
+{ 0x0F12, 0x03F2  },   //senHal_pContSenModesRegsArray[13][0] 2 7000133A
+{ 0x0F12, 0x068C  },   //senHal_pContSenModesRegsArray[13][1] 2 7000133C
+{ 0x0F12, 0x0230  },   //senHal_pContSenModesRegsArray[13][2] 2 7000133E
+{ 0x0F12, 0x03E9  },   //senHal_pContSenModesRegsArray[13][3] 2 70001340
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][0] 2 70001342
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][1] 2 70001344
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][2] 2 70001346
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[14][3] 2 70001348
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][0] 2 7000134A
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][1] 2 7000134C
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][2] 2 7000134E
+{ 0x0F12, 0x003C  },   //senHal_pContSenModesRegsArray[15][3] 2 70001350
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[16][0] 2 70001352
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[16][1] 2 70001354
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[16][2] 2 70001356
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[16][3] 2 70001358
+{ 0x0F12, 0x020B  },   //senHal_pContSenModesRegsArray[17][0] 2 7000135A
+{ 0x0F12, 0x024A  },   //senHal_pContSenModesRegsArray[17][1] 2 7000135C
+{ 0x0F12, 0x012A  },   //senHal_pContSenModesRegsArray[17][2] 2 7000135E
+{ 0x0F12, 0x0169  },   //senHal_pContSenModesRegsArray[17][3] 2 70001360
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[18][0] 2 70001362
+{ 0x0F12, 0x046B  },   //senHal_pContSenModesRegsArray[18][1] 2 70001364
+{ 0x0F12, 0x0002  },   //senHal_pContSenModesRegsArray[18][2] 2 70001366
+{ 0x0F12, 0x02A9  },   //senHal_pContSenModesRegsArray[18][3] 2 70001368
+{ 0x0F12, 0x0419  },   //senHal_pContSenModesRegsArray[19][0] 2 7000136A
+{ 0x0F12, 0x04A5  },   //senHal_pContSenModesRegsArray[19][1] 2 7000136C
+{ 0x0F12, 0x0257  },   //senHal_pContSenModesRegsArray[19][2] 2 7000136E
+{ 0x0F12, 0x02E3  },   //senHal_pContSenModesRegsArray[19][3] 2 70001370
+{ 0x0F12, 0x0630  },   //senHal_pContSenModesRegsArray[20][0] 2 70001372
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[20][1] 2 70001374
+{ 0x0F12, 0x038D  },   //senHal_pContSenModesRegsArray[20][2] 2 70001376
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[20][3] 2 70001378
+{ 0x0F12, 0x0668  },   //senHal_pContSenModesRegsArray[21][0] 2 7000137A
+{ 0x0F12, 0x06B3  },   //senHal_pContSenModesRegsArray[21][1] 2 7000137C
+{ 0x0F12, 0x03C5  },   //senHal_pContSenModesRegsArray[21][2] 2 7000137E
+{ 0x0F12, 0x0410  },   //senHal_pContSenModesRegsArray[21][3] 2 70001380
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][0] 2 70001382
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][1] 2 70001384
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][2] 2 70001386
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[22][3] 2 70001388
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[23][0] 2 7000138A
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[23][1] 2 7000138C
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[23][2] 2 7000138E
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[23][3] 2 70001390
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[24][0] 2 70001392
+{ 0x0F12, 0x0461  },   //senHal_pContSenModesRegsArray[24][1] 2 70001394
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[24][2] 2 70001396
+{ 0x0F12, 0x029F  },   //senHal_pContSenModesRegsArray[24][3] 2 70001398
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[25][0] 2 7000139A
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[25][1] 2 7000139C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[25][2] 2 7000139E
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[25][3] 2 700013A0
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][0] 2 700013A2
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][1] 2 700013A4
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][2] 2 700013A6
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[26][3] 2 700013A8
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[27][0] 2 700013AA
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[27][1] 2 700013AC
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[27][2] 2 700013AE
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[27][3] 2 700013B0
+{ 0x0F12, 0x020C  },   //senHal_pContSenModesRegsArray[28][0] 2 700013B2
+{ 0x0F12, 0x024B  },   //senHal_pContSenModesRegsArray[28][1] 2 700013B4
+{ 0x0F12, 0x012B  },   //senHal_pContSenModesRegsArray[28][2] 2 700013B6
+{ 0x0F12, 0x016A  },   //senHal_pContSenModesRegsArray[28][3] 2 700013B8
+{ 0x0F12, 0x039F  },   //senHal_pContSenModesRegsArray[29][0] 2 700013BA
+{ 0x0F12, 0x045E  },   //senHal_pContSenModesRegsArray[29][1] 2 700013BC
+{ 0x0F12, 0x01DD  },   //senHal_pContSenModesRegsArray[29][2] 2 700013BE
+{ 0x0F12, 0x029C  },   //senHal_pContSenModesRegsArray[29][3] 2 700013C0
+{ 0x0F12, 0x041A  },   //senHal_pContSenModesRegsArray[30][0] 2 700013C2
+{ 0x0F12, 0x04A6  },   //senHal_pContSenModesRegsArray[30][1] 2 700013C4
+{ 0x0F12, 0x0258  },   //senHal_pContSenModesRegsArray[30][2] 2 700013C6
+{ 0x0F12, 0x02E4  },   //senHal_pContSenModesRegsArray[30][3] 2 700013C8
+{ 0x0F12, 0x062D  },   //senHal_pContSenModesRegsArray[31][0] 2 700013CA
+{ 0x0F12, 0x0639  },   //senHal_pContSenModesRegsArray[31][1] 2 700013CC
+{ 0x0F12, 0x038A  },   //senHal_pContSenModesRegsArray[31][2] 2 700013CE
+{ 0x0F12, 0x0396  },   //senHal_pContSenModesRegsArray[31][3] 2 700013D0
+{ 0x0F12, 0x0669  },   //senHal_pContSenModesRegsArray[32][0] 2 700013D2
+{ 0x0F12, 0x06B4  },   //senHal_pContSenModesRegsArray[32][1] 2 700013D4
+{ 0x0F12, 0x03C6  },   //senHal_pContSenModesRegsArray[32][2] 2 700013D6
+{ 0x0F12, 0x0411  },   //senHal_pContSenModesRegsArray[32][3] 2 700013D8
+{ 0x0F12, 0x087C  },   //senHal_pContSenModesRegsArray[33][0] 2 700013DA
+{ 0x0F12, 0x08C7  },   //senHal_pContSenModesRegsArray[33][1] 2 700013DC
+{ 0x0F12, 0x04F8  },   //senHal_pContSenModesRegsArray[33][2] 2 700013DE
+{ 0x0F12, 0x0543  },   //senHal_pContSenModesRegsArray[33][3] 2 700013E0
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][0] 2 700013E2
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][1] 2 700013E4
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][2] 2 700013E6
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[34][3] 2 700013E8
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[35][0] 2 700013EA
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[35][1] 2 700013EC
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[35][2] 2 700013EE
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[35][3] 2 700013F0
+{ 0x0F12, 0x020F  },   //senHal_pContSenModesRegsArray[36][0] 2 700013F2
+{ 0x0F12, 0x024E  },   //senHal_pContSenModesRegsArray[36][1] 2 700013F4
+{ 0x0F12, 0x012E  },   //senHal_pContSenModesRegsArray[36][2] 2 700013F6
+{ 0x0F12, 0x016D  },   //senHal_pContSenModesRegsArray[36][3] 2 700013F8
+{ 0x0F12, 0x039F  },   //senHal_pContSenModesRegsArray[37][0] 2 700013FA
+{ 0x0F12, 0x045E  },   //senHal_pContSenModesRegsArray[37][1] 2 700013FC
+{ 0x0F12, 0x01DD  },   //senHal_pContSenModesRegsArray[37][2] 2 700013FE
+{ 0x0F12, 0x029C  },   //senHal_pContSenModesRegsArray[37][3] 2 70001400
+{ 0x0F12, 0x041D  },   //senHal_pContSenModesRegsArray[38][0] 2 70001402
+{ 0x0F12, 0x04A9  },   //senHal_pContSenModesRegsArray[38][1] 2 70001404
+{ 0x0F12, 0x025B  },   //senHal_pContSenModesRegsArray[38][2] 2 70001406
+{ 0x0F12, 0x02E7  },   //senHal_pContSenModesRegsArray[38][3] 2 70001408
+{ 0x0F12, 0x062D  },   //senHal_pContSenModesRegsArray[39][0] 2 7000140A
+{ 0x0F12, 0x0639  },   //senHal_pContSenModesRegsArray[39][1] 2 7000140C
+{ 0x0F12, 0x038A  },   //senHal_pContSenModesRegsArray[39][2] 2 7000140E
+{ 0x0F12, 0x0396  },   //senHal_pContSenModesRegsArray[39][3] 2 70001410
+{ 0x0F12, 0x066C  },   //senHal_pContSenModesRegsArray[40][0] 2 70001412
+{ 0x0F12, 0x06B7  },   //senHal_pContSenModesRegsArray[40][1] 2 70001414
+{ 0x0F12, 0x03C9  },   //senHal_pContSenModesRegsArray[40][2] 2 70001416
+{ 0x0F12, 0x0414  },   //senHal_pContSenModesRegsArray[40][3] 2 70001418
+{ 0x0F12, 0x087C  },   //senHal_pContSenModesRegsArray[41][0] 2 7000141A
+{ 0x0F12, 0x08C7  },   //senHal_pContSenModesRegsArray[41][1] 2 7000141C
+{ 0x0F12, 0x04F8  },   //senHal_pContSenModesRegsArray[41][2] 2 7000141E
+{ 0x0F12, 0x0543  },   //senHal_pContSenModesRegsArray[41][3] 2 70001420
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][0] 2 70001422
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][1] 2 70001424
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][2] 2 70001426
+{ 0x0F12, 0x0040  },   //senHal_pContSenModesRegsArray[42][3] 2 70001428
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[43][0] 2 7000142A
+{ 0x0F12, 0x01D0  },   //senHal_pContSenModesRegsArray[43][1] 2 7000142C
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[43][2] 2 7000142E
+{ 0x0F12, 0x00EF  },   //senHal_pContSenModesRegsArray[43][3] 2 70001430
+{ 0x0F12, 0x020F  },   //senHal_pContSenModesRegsArray[44][0] 2 70001432
+{ 0x0F12, 0x024E  },   //senHal_pContSenModesRegsArray[44][1] 2 70001434
+{ 0x0F12, 0x012E  },   //senHal_pContSenModesRegsArray[44][2] 2 70001436
+{ 0x0F12, 0x016D  },   //senHal_pContSenModesRegsArray[44][3] 2 70001438
+{ 0x0F12, 0x039F  },   //senHal_pContSenModesRegsArray[45][0] 2 7000143A
+{ 0x0F12, 0x045E  },   //senHal_pContSenModesRegsArray[45][1] 2 7000143C
+{ 0x0F12, 0x01DD  },   //senHal_pContSenModesRegsArray[45][2] 2 7000143E
+{ 0x0F12, 0x029C  },   //senHal_pContSenModesRegsArray[45][3] 2 70001440
+{ 0x0F12, 0x041D  },   //senHal_pContSenModesRegsArray[46][0] 2 70001442
+{ 0x0F12, 0x04A9  },   //senHal_pContSenModesRegsArray[46][1] 2 70001444
+{ 0x0F12, 0x025B  },   //senHal_pContSenModesRegsArray[46][2] 2 70001446
+{ 0x0F12, 0x02E7  },   //senHal_pContSenModesRegsArray[46][3] 2 70001448
+{ 0x0F12, 0x062D  },   //senHal_pContSenModesRegsArray[47][0] 2 7000144A
+{ 0x0F12, 0x0639  },   //senHal_pContSenModesRegsArray[47][1] 2 7000144C
+{ 0x0F12, 0x038A  },   //senHal_pContSenModesRegsArray[47][2] 2 7000144E
+{ 0x0F12, 0x0396  },   //senHal_pContSenModesRegsArray[47][3] 2 70001450
+{ 0x0F12, 0x066C  },   //senHal_pContSenModesRegsArray[48][0] 2 70001452
+{ 0x0F12, 0x06B7  },   //senHal_pContSenModesRegsArray[48][1] 2 70001454
+{ 0x0F12, 0x03C9  },   //senHal_pContSenModesRegsArray[48][2] 2 70001456
+{ 0x0F12, 0x0414  },   //senHal_pContSenModesRegsArray[48][3] 2 70001458
+{ 0x0F12, 0x087C  },   //senHal_pContSenModesRegsArray[49][0] 2 7000145A
+{ 0x0F12, 0x08C7  },   //senHal_pContSenModesRegsArray[49][1] 2 7000145C
+{ 0x0F12, 0x04F8  },   //senHal_pContSenModesRegsArray[49][2] 2 7000145E
+{ 0x0F12, 0x0543  },   //senHal_pContSenModesRegsArray[49][3] 2 70001460
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][0] 2 70001462
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][1] 2 70001464
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][2] 2 70001466
+{ 0x0F12, 0x003D  },   //senHal_pContSenModesRegsArray[50][3] 2 70001468
+{ 0x0F12, 0x01D2  },   //senHal_pContSenModesRegsArray[51][0] 2 7000146A
+{ 0x0F12, 0x01D2  },   //senHal_pContSenModesRegsArray[51][1] 2 7000146C
+{ 0x0F12, 0x00F1  },   //senHal_pContSenModesRegsArray[51][2] 2 7000146E
+{ 0x0F12, 0x00F1  },   //senHal_pContSenModesRegsArray[51][3] 2 70001470
+{ 0x0F12, 0x020C  },   //senHal_pContSenModesRegsArray[52][0] 2 70001472
+{ 0x0F12, 0x024B  },   //senHal_pContSenModesRegsArray[52][1] 2 70001474
+{ 0x0F12, 0x012B  },   //senHal_pContSenModesRegsArray[52][2] 2 70001476
+{ 0x0F12, 0x016A  },   //senHal_pContSenModesRegsArray[52][3] 2 70001478
+{ 0x0F12, 0x03A1  },   //senHal_pContSenModesRegsArray[53][0] 2 7000147A
+{ 0x0F12, 0x0460  },   //senHal_pContSenModesRegsArray[53][1] 2 7000147C
+{ 0x0F12, 0x01DF  },   //senHal_pContSenModesRegsArray[53][2] 2 7000147E
+{ 0x0F12, 0x029E  },   //senHal_pContSenModesRegsArray[53][3] 2 70001480
+{ 0x0F12, 0x041A  },   //senHal_pContSenModesRegsArray[54][0] 2 70001482
+{ 0x0F12, 0x04A6  },   //senHal_pContSenModesRegsArray[54][1] 2 70001484
+{ 0x0F12, 0x0258  },   //senHal_pContSenModesRegsArray[54][2] 2 70001486
+{ 0x0F12, 0x02E4  },   //senHal_pContSenModesRegsArray[54][3] 2 70001488
+{ 0x0F12, 0x062F  },   //senHal_pContSenModesRegsArray[55][0] 2 7000148A
+{ 0x0F12, 0x063B  },   //senHal_pContSenModesRegsArray[55][1] 2 7000148C
+{ 0x0F12, 0x038C  },   //senHal_pContSenModesRegsArray[55][2] 2 7000148E
+{ 0x0F12, 0x0398  },   //senHal_pContSenModesRegsArray[55][3] 2 70001490
+{ 0x0F12, 0x0669  },   //senHal_pContSenModesRegsArray[56][0] 2 70001492
+{ 0x0F12, 0x06B4  },   //senHal_pContSenModesRegsArray[56][1] 2 70001494
+{ 0x0F12, 0x03C6  },   //senHal_pContSenModesRegsArray[56][2] 2 70001496
+{ 0x0F12, 0x0411  },   //senHal_pContSenModesRegsArray[56][3] 2 70001498
+{ 0x0F12, 0x087E  },   //senHal_pContSenModesRegsArray[57][0] 2 7000149A
+{ 0x0F12, 0x08C9  },   //senHal_pContSenModesRegsArray[57][1] 2 7000149C
+{ 0x0F12, 0x04FA  },   //senHal_pContSenModesRegsArray[57][2] 2 7000149E
+{ 0x0F12, 0x0545  },   //senHal_pContSenModesRegsArray[57][3] 2 700014A0
+{ 0x0F12, 0x03A2  },   //senHal_pContSenModesRegsArray[58][0] 2 700014A2
+{ 0x0F12, 0x01D3  },   //senHal_pContSenModesRegsArray[58][1] 2 700014A4
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[58][2] 2 700014A6
+{ 0x0F12, 0x00F2  },   //senHal_pContSenModesRegsArray[58][3] 2 700014A8
+{ 0x0F12, 0x03AF  },   //senHal_pContSenModesRegsArray[59][0] 2 700014AA
+{ 0x0F12, 0x01E0  },   //senHal_pContSenModesRegsArray[59][1] 2 700014AC
+{ 0x0F12, 0x01ED  },   //senHal_pContSenModesRegsArray[59][2] 2 700014AE
+{ 0x0F12, 0x00FF  },   //senHal_pContSenModesRegsArray[59][3] 2 700014B0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[60][0] 2 700014B2
+{ 0x0F12, 0x0461  },   //senHal_pContSenModesRegsArray[60][1] 2 700014B4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[60][2] 2 700014B6
+{ 0x0F12, 0x029F  },   //senHal_pContSenModesRegsArray[60][3] 2 700014B8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[61][0] 2 700014BA
+{ 0x0F12, 0x046E  },   //senHal_pContSenModesRegsArray[61][1] 2 700014BC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[61][2] 2 700014BE
+{ 0x0F12, 0x02AC  },   //senHal_pContSenModesRegsArray[61][3] 2 700014C0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[62][0] 2 700014C2
+{ 0x0F12, 0x063C  },   //senHal_pContSenModesRegsArray[62][1] 2 700014C4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[62][2] 2 700014C6
+{ 0x0F12, 0x0399  },   //senHal_pContSenModesRegsArray[62][3] 2 700014C8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[63][0] 2 700014CA
+{ 0x0F12, 0x0649  },   //senHal_pContSenModesRegsArray[63][1] 2 700014CC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[63][2] 2 700014CE
+{ 0x0F12, 0x03A6  },   //senHal_pContSenModesRegsArray[63][3] 2 700014D0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][0] 2 700014D2
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][1] 2 700014D4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][2] 2 700014D6
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[64][3] 2 700014D8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][0] 2 700014DA
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][1] 2 700014DC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][2] 2 700014DE
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[65][3] 2 700014E0
+{ 0x0F12, 0x03AA  },   //senHal_pContSenModesRegsArray[66][0] 2 700014E2
+{ 0x0F12, 0x01DB  },   //senHal_pContSenModesRegsArray[66][1] 2 700014E4
+{ 0x0F12, 0x01E8  },   //senHal_pContSenModesRegsArray[66][2] 2 700014E6
+{ 0x0F12, 0x00FA  },   //senHal_pContSenModesRegsArray[66][3] 2 700014E8
+{ 0x0F12, 0x03B7  },   //senHal_pContSenModesRegsArray[67][0] 2 700014EA
+{ 0x0F12, 0x01E8  },   //senHal_pContSenModesRegsArray[67][1] 2 700014EC
+{ 0x0F12, 0x01F5  },   //senHal_pContSenModesRegsArray[67][2] 2 700014EE
+{ 0x0F12, 0x0107  },   //senHal_pContSenModesRegsArray[67][3] 2 700014F0
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[68][0] 2 700014F2
+{ 0x0F12, 0x0469  },   //senHal_pContSenModesRegsArray[68][1] 2 700014F4
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[68][2] 2 700014F6
+{ 0x0F12, 0x02A7  },   //senHal_pContSenModesRegsArray[68][3] 2 700014F8
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[69][0] 2 700014FA
+{ 0x0F12, 0x0476  },   //senHal_pContSenModesRegsArray[69][1] 2 700014FC
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[69][2] 2 700014FE
+{ 0x0F12, 0x02B4  },   //senHal_pContSenModesRegsArray[69][3] 2 70001500
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[70][0] 2 70001502
+{ 0x0F12, 0x0644  },   //senHal_pContSenModesRegsArray[70][1] 2 70001504
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[70][2] 2 70001506
+{ 0x0F12, 0x03A1  },   //senHal_pContSenModesRegsArray[70][3] 2 70001508
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[71][0] 2 7000150A
+{ 0x0F12, 0x0651  },   //senHal_pContSenModesRegsArray[71][1] 2 7000150C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[71][2] 2 7000150E
+{ 0x0F12, 0x03AE  },   //senHal_pContSenModesRegsArray[71][3] 2 70001510
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][0] 2 70001512
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][1] 2 70001514
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][2] 2 70001516
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[72][3] 2 70001518
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][0] 2 7000151A
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][1] 2 7000151C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][2] 2 7000151E
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[73][3] 2 70001520
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][0] 2 70001522
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][1] 2 70001524
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][2] 2 70001526
+{ 0x0F12, 0x0001  },   //senHal_pContSenModesRegsArray[74][3] 2 70001528
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][0] 2 7000152A
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][1] 2 7000152C
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][2] 2 7000152E
+{ 0x0F12, 0x000F  },   //senHal_pContSenModesRegsArray[75][3] 2 70001530
+{ 0x0F12, 0x05AD  },   //senHal_pContSenModesRegsArray[76][0] 2 70001532
+{ 0x0F12, 0x03DE  },   //senHal_pContSenModesRegsArray[76][1] 2 70001534
+{ 0x0F12, 0x030A  },   //senHal_pContSenModesRegsArray[76][2] 2 70001536
+{ 0x0F12, 0x021C  },   //senHal_pContSenModesRegsArray[76][3] 2 70001538
+{ 0x0F12, 0x062F  },   //senHal_pContSenModesRegsArray[77][0] 2 7000153A
+{ 0x0F12, 0x0460  },   //senHal_pContSenModesRegsArray[77][1] 2 7000153C
+{ 0x0F12, 0x038C  },   //senHal_pContSenModesRegsArray[77][2] 2 7000153E
+{ 0x0F12, 0x029E  },   //senHal_pContSenModesRegsArray[77][3] 2 70001540
+{ 0x0F12, 0x07FC  },   //senHal_pContSenModesRegsArray[78][0] 2 70001542
+{ 0x0F12, 0x0847  },   //senHal_pContSenModesRegsArray[78][1] 2 70001544
+{ 0x0F12, 0x0478  },   //senHal_pContSenModesRegsArray[78][2] 2 70001546
+{ 0x0F12, 0x04C3  },   //senHal_pContSenModesRegsArray[78][3] 2 70001548
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][0] 2 7000154A
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][1] 2 7000154C
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][2] 2 7000154E
+{ 0x0F12, 0x0000  },   //senHal_pContSenModesRegsArray[79][3] 2 70001550
+                      
+                    
+//============================================================ 
+// AF Interface setting
+//==============  ============================================== 
+{ 0x002A, 0x01D4  },
+{ 0x0F12, 0x0000  }, //REG_TC_IPRM_AuxGpios : 0 - no Flash
+{ 0x002A, 0x01DE  },
+{ 0x0F12, 0x0003  }, //REG_TC_IPRM_CM_Init_AfModeType : 3 - AFD_VCM_I2C
+{ 0x0F12, 0x0000  }, //REG_TC_IPRM_CM_Init_PwmConfig1 : 0 - no PWM
+{ 0x002A, 0x01E4  },
+{ 0x0F12, 0x0041  }, //REG_TC_IPRM_CM_Init_GpioConfig1 : 4 -  GPIO4 
+{ 0x002A, 0x01E8  },
+{ 0x0F12, 0x2A0C  }, //REG_TC_IPRM_CM_Init_Mi2cBits : MSCL - GPIO1 MSDA - GPIO2 Device ID (0C)
+{ 0x0F12, 0x0190  }, //REG_TC_IPRM_CM_Init_Mi2cRateKhz : MI2C Speed - 400KHz
+
+//============================================================ 
+// AF Parameter setting
+//============================================================ 
+// AF Window Settings
+{ 0x002A, 0x025A  },
+{ 0x0F12, 0x0100  }, //#REG_TC_AF_FstWinStartX
+{ 0x0F12, 0x00E3  }, //#REG_TC_AF_FstWinStartY
+{ 0x0F12, 0x0200  }, //#REG_TC_AF_FstWinSizeX
+{ 0x0F12, 0x0238  }, //#REG_TC_AF_FstWinSizeY
+{ 0x0F12, 0x01C6  }, //#REG_TC_AF_ScndWinStartX
+{ 0x0F12, 0x0166  }, //#REG_TC_AF_ScndWinStartY
+{ 0x0F12, 0x0074  }, //#REG_TC_AF_ScndWinSizeX
+{ 0x0F12, 0x0132  }, //#REG_TC_AF_ScndWinSizeY
+{ 0x0F12, 0x0001  }, //#REG_TC_AF_WinSizesUpdated
+
+// AF Setot Settings 
+{ 0x002A, 0x0586  },
+{ 0x0F12, 0x00FF  }, //#skl_af_StatOvlpExpFactor
+
+// AF Scene Settings 
+{ 0x002A, 0x115E  },
+{ 0x0F12, 0x0003  }, //#af_scene_usSaturatedScene
+
+// AF Fine Search Settings 
+{ 0x002A, 0x10D4  },
+{ 0x0F12, 0x1002  }, //FineSearch Disable //af_search_usSingleAfFlags 1000 : 2nd searh off, 1002 : 2nd search on
+{ 0x002A, 0x10DE  },
+{ 0x0F12, 0x0004  }, //#af_search_usFinePeakCount
+{ 0x002A, 0x106C  },
+{ 0x0F12, 0x0802  }, //#af_pos_usFineStepNumSize
+                  
+// / AF Peak Thre  shold Setting
+{ 0x002A, 0x10CA  }, //#af_search_usPeakThr
+{ 0x0F12, 0x00CC  }, 
+
+// AF Default Position 
+{ 0x002A, 0x1060  },
+{ 0x0F12, 0x0000  }, //#af_pos_usHomePos
+{ 0x0F12, 0xB020  }, //#af_pos_usLowConfPos
+
+// AF LowConfThr Setting
+{ 0x002A, 0x10F4  }, //LowEdgeBoth GRAD
+{ 0x0F12, 0x0280  }, 
+{ 0x002A, 0x1100  }, //LowLight HPF
+{ 0x0F12, 0x03A0  },  
+{ 0x0F12, 0x0320  }, 
+
+{ 0x002A, 0x1134  },
+{ 0x0F12, 0x0030  },//af_stat_usMinStatVal
+
+// AF low Br Th
+{ 0x002A, 0x1154  }, // normBrThr
+{ 0x0F12, 0x0060  },
+
+// AF Policy
+{ 0x002A, 0x10E2  },
+{ 0x0F12, 0x0000  }, //#af_search_usCapturePolicy: Focus_Priority, 0002 : Shutter_Priority_Fixed, 0001 : Shutter_Priority_Last_BFP 0000: Shutter_Priority_Current
+{ 0x002A, 0x1072  },
+{ 0x0F12, 0x003C  }, //#af_pos_usCaptureFixedPo// 0x0008
+
+// AF Lens Position Table Settings 
+{ 0x002A, 0x1074  },
+{ 0x0F12, 0x0010  }, //#af_pos_usTableLastInd // 0~16 17 Steps 100729
+
+{ 0x0F12, 0x0024  }, //#af_pos_usTable_0_  145/4 = 36  // af_pos_usTable
+{ 0x0F12, 0x002D  }, //#af_pos_usTable_1_  180/4 = 45                   
+{ 0x0F12, 0x0036  }, //#af_pos_usTable_2_  215/4 = 54                   
+{ 0x0F12, 0x003E  }, //#af_pos_usTable_3_  250/4 = 62                   
+{ 0x0F12, 0x0047  }, //#af_pos_usTable_4_  285/4 = 71
+{ 0x0F12, 0x0050  }, //#af_pos_usTable_5_  320/4 = 80                   
+{ 0x0F12, 0x0059  }, //#af_pos_usTable_6_  355/4 = 89                   
+{ 0x0F12, 0x0061  }, //#af_pos_usTable_7_  390/4 = 97                   
+{ 0x0F12, 0x006A  }, //#af_pos_usTable_8_  425/4 = 106                  
+{ 0x0F12, 0x0073  }, //#af_pos_usTable_9_  460/4 = 115                  
+{ 0x0F12, 0x007C  }, //#af_pos_usTable_10_ 495/4 = 124                  
+{ 0x0F12, 0x0084  }, //#af_pos_usTable_11_ 530/4 = 132                  
+{ 0x0F12, 0x008D  }, //#af_pos_usTable_12_ 565/4 = 141                  
+{ 0x0F12, 0x0096  }, //#af_pos_usTable_13_ 600/4 = 150                  
+{ 0x0F12, 0x009F  }, //#af_pos_usTable_14_ 635/4 = 159                  
+{ 0x0F12, 0x00A7  }, //#af_pos_usTable_15_ 670/4 = 167                  
+{ 0x0F12, 0x00B0  }, //#af_pos_usTable_16_ 705/4 = 176                  
+
+//VCM AF driver with PWM/I2C 
+{ 0x002A, 0x1198  },
+{ 0x0F12, 0x8000  }, //#afd_usParam[0]  I2C power down command
+{ 0x0F12, 0x0006  }, //#afd_usParam[1]  Position Right Shift 
+{ 0x0F12, 0x3FF0  }, //#afd_usParam[2]  I2C Data Mask
+{ 0x0F12, 0x03E8  }, //#afd_usParam[3]  PWM Period
+{ 0x0F12, 0x0000  }, //#afd_usParam[4]  PWM Divider
+{ 0x0F12, 0x0064  }, //#afd_usParam[5]  SlowMotion Delay (unit: 0.1ms)  4. reduce lens collision noise.
+{ 0x0F12, 0x0009  }, //#afd_usParam[6]  SlowMotion Threshold
+{ 0x0F12, 0x000A  }, //#afd_usParam[7]  Signal Shaping
+{ 0x0F12, 0x0080  }, //#afd_usParam[8]  Signal Shaping level 
+{ 0x0F12, 0x00C0  }, //#afd_usParam[9]  Signal Shaping level
+{ 0x0F12, 0x0000  }, //#afd_usParam[10] Signal Shaping level
+{ 0x0F12, 0x0000  }, //#afd_usParam[11] Signal Shaping level               
+
+
+{ 0x002A, 0x0252  },
+{ 0x0F12, 0x0003  }, //init 
+                  
+{ 0x002A, 0x12B8  },   //disable CINTR 0                                 
+{ 0x0F12, 0x1000  },        
+
+//============================================================
+// ISP-FE Setting
+//============================================================                    
+{ 0x002A, 0x158A  },   
+{ 0x0F12, 0xEAF0  },   
+{ 0x002A, 0x15C6  },   
+{ 0x0F12, 0x0020  },   
+{ 0x0F12, 0x0060  },   
+{ 0x002A, 0x15BC  },   
+{ 0x0F12, 0x0200  },   
+                       
+{ 0x002A, 0x1608  },   
+{ 0x0F12, 0x0100  },   
+{ 0x0F12, 0x0100  },   
+{ 0x0F12, 0x0100  },   
+{ 0x0F12, 0x0100  },   
+                       
+{ 0x002A, 0x0F70  },   
+{ 0x0F12, 0x0040  },	 //36 //TVAR_ae_BrAve  //ae Target//
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0x3415  },   //3A98 //3A98////lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0x682A  },   //68b0 //7EF4////lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0x8235  },   //8340 //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },    //F424//MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0x3415  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0x682A  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0x8235  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+// /Shutter tunpo  int//        //gain * 256 = value//
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x01B3  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x02A0  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710  },   //MaxAnGain4 //                                             
+// /Shutter tunen  d//
+                  
+{ 0x002A, 0x0544  },                                                               
+{ 0x0F12, 0x0100  },   	                                                    
+{ 0x0F12, 0x8000  },   //Max Gain 8 //                                             
+                  
+                  
+{ 0x002A, 0x1694  },                                                               
+{ 0x0F12, 0x0001  },   //expand forbidde zone //                                   
+                  
+{ 0x002A, 0x021A  },                                                               
+{ 0x0F12, 0x0000  },  //MBR off// 	                                                    
+                  
+                  
+//==============================================//
+//AFC                                          //
+//==============================================//
+{ 0x002A, 0x04d2  },
+{ 0x0F12, 0x065f  },     //065f : Manual AFC on   067f : Manual AFC off //
+{ 0x002A, 0x04ba  },     
+{ 0x0F12, 0x0002  },     // 0002: 60hz  0001 : 50hz //
+{ 0x0F12, 0x0001  },     // afc update command //
+                          
+                    
+                    
+{ 0x002A, 0x06CE  },   
+{ 0x0F12, 0x0100  },	//TVAR_ash_GAsalpha[0] // 	   
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[1] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[2] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[3] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[4] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[5] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[6] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[7] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[8] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[9] // 
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[10] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[11] //
+{ 0x0F12, 0x00e0  },   //TVAR_ash_GAsalpha[12] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[13] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[14] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[15] //
+{ 0x0F12, 0x00e8  },   //TVAR_ash_GAsalpha[16] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[17] //
+{ 0x0F12, 0x00f8  },   //TVAR_ash_GAsalpha[18] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[19] //
+{ 0x0F12, 0x00f0  },   //TVAR_ash_GAsalpha[20] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[21] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[22] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[23] //
+{ 0x0F12, 0x00f0  },   //TVAR_ash_GAsalpha[24] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[25] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[26] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAsalpha[27] //
+                       
+{ 0x0F12, 0x00f8  },	//TVAR_ash_GAS OutdoorAlpha[0] //   
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAS OutdoorAlpha[1] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAS OutdoorAlpha[2] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_GAS OutdoorAlpha[3] //
+                       
+                       
+{ 0x0F12, 0x0036  },	//ash_GASBeta[0] // 	   
+{ 0x0F12, 0x001F  },	//ash_GASBeta[1] //    
+{ 0x0F12, 0x0020  },   //ash_GASBeta[2] // 
+{ 0x0F12, 0x0000  },   //ash_GASBeta[3] // 
+{ 0x0F12, 0x0036  },   //ash_GASBeta[4] // 
+{ 0x0F12, 0x001F  },   //ash_GASBeta[5] // 
+{ 0x0F12, 0x0020  },   //ash_GASBeta[6] // 
+{ 0x0F12, 0x0000  },   //ash_GASBeta[7] // 
+{ 0x0F12, 0x0036  },   //ash_GASBeta[8] // 
+{ 0x0F12, 0x001F  },   //ash_GASBeta[9] // 
+{ 0x0F12, 0x0020  },   //ash_GASBeta[10] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[11] //
+{ 0x0F12, 0x0010  },   //ash_GASBeta[12] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[13] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[14] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[15] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[16] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[17] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[18] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[19] //
+{ 0x0F12, 0x0036  },   //ash_GASBeta[20] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[21] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[22] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[23] //
+{ 0x0F12, 0x0036  },   //ash_GASBeta[24] //
+{ 0x0F12, 0x001F  },   //ash_GASBeta[25] //
+{ 0x0F12, 0x0020  },   //ash_GASBeta[26] //
+{ 0x0F12, 0x0000  },   //ash_GASBeta[27] //
+                       
+{ 0x0F12, 0x0036  },	//ash_GAS OutdoorBeta[0] //   
+{ 0x0F12, 0x001F  },   //ash_GAS OutdoorBeta[1] //
+{ 0x0F12, 0x0020  },   //ash_GAS OutdoorBeta[2] //
+{ 0x0F12, 0x0000  },   //ash_GAS OutdoorBeta[3] //
+                       
+{ 0x002A, 0x075A  },	//ash_bParabolicEstimation//   
+{ 0x0F12, 0x0000  },   //ash_uParabolicCenterX   //
+{ 0x0F12, 0x0400  },   //ash_uParabolicCenterY   //
+{ 0x0F12, 0x0300  },   //ash_uParabolicscalingA  //
+{ 0x0F12, 0x0010  },   //ash_uParabolicscalingB  //
+{ 0x0F12, 0x0011  },   
+                       
+{ 0x002A, 0x347C  },   
+{ 0x0F12, 0x01EE  },	//TVAR_ash_pGAS[0] //     
+{ 0x0F12, 0x01A9  },   //TVAR_ash_pGAS[1] //  
+{ 0x0F12, 0x016A  },   //TVAR_ash_pGAS[2] //  
+{ 0x0F12, 0x0136  },   //TVAR_ash_pGAS[3] //  
+{ 0x0F12, 0x0111  },   //TVAR_ash_pGAS[4] //  
+{ 0x0F12, 0x00F6  },   //TVAR_ash_pGAS[5] //  
+{ 0x0F12, 0x00EB  },   //TVAR_ash_pGAS[6] //  
+{ 0x0F12, 0x00F7  },   //TVAR_ash_pGAS[7] //  
+{ 0x0F12, 0x0111  },   //TVAR_ash_pGAS[8] //  
+{ 0x0F12, 0x013B  },   //TVAR_ash_pGAS[9] //  
+{ 0x0F12, 0x0174  },   //TVAR_ash_pGAS[10] // 
+{ 0x0F12, 0x01BC  },   //TVAR_ash_pGAS[11] // 
+{ 0x0F12, 0x0204  },   //TVAR_ash_pGAS[12] // 
+{ 0x0F12, 0x01BA  },   //TVAR_ash_pGAS[13] // 
+{ 0x0F12, 0x0175  },   //TVAR_ash_pGAS[14] // 
+{ 0x0F12, 0x012C  },   //TVAR_ash_pGAS[15] // 
+{ 0x0F12, 0x00F1  },   //TVAR_ash_pGAS[16] // 
+{ 0x0F12, 0x00C5  },   //TVAR_ash_pGAS[17] // 
+{ 0x0F12, 0x00AA  },   //TVAR_ash_pGAS[18] // 
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[19] // 
+{ 0x0F12, 0x00AA  },   //TVAR_ash_pGAS[20] // 
+{ 0x0F12, 0x00C8  },   //TVAR_ash_pGAS[21] // 
+{ 0x0F12, 0x00FA  },   //TVAR_ash_pGAS[22] // 
+{ 0x0F12, 0x013D  },   //TVAR_ash_pGAS[23] // 
+{ 0x0F12, 0x0187  },   //TVAR_ash_pGAS[24] // 
+{ 0x0F12, 0x01DC  },   //TVAR_ash_pGAS[25] // 
+{ 0x0F12, 0x0184  },   //TVAR_ash_pGAS[26] // 
+{ 0x0F12, 0x0139  },   //TVAR_ash_pGAS[27] // 
+{ 0x0F12, 0x00EB  },   //TVAR_ash_pGAS[28] // 
+{ 0x0F12, 0x00A8  },   //TVAR_ash_pGAS[29] // 
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[30] // 
+{ 0x0F12, 0x005E  },   //TVAR_ash_pGAS[31] // 
+{ 0x0F12, 0x0055  },   //TVAR_ash_pGAS[32] // 
+{ 0x0F12, 0x0060  },   //TVAR_ash_pGAS[33] // 
+{ 0x0F12, 0x0080  },   //TVAR_ash_pGAS[34] // 
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[35] // 
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[36] // 
+{ 0x0F12, 0x0156  },   //TVAR_ash_pGAS[37] // 
+{ 0x0F12, 0x01A8  },   //TVAR_ash_pGAS[38] // 
+{ 0x0F12, 0x015B  },   //TVAR_ash_pGAS[39] // 
+{ 0x0F12, 0x010E  },   //TVAR_ash_pGAS[40] // 
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[41] // 
+{ 0x0F12, 0x0075  },   //TVAR_ash_pGAS[42] // 
+{ 0x0F12, 0x0045  },   //TVAR_ash_pGAS[43] // 
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[44] // 
+{ 0x0F12, 0x0023  },   //TVAR_ash_pGAS[45] // 
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[46] // 
+{ 0x0F12, 0x004C  },   //TVAR_ash_pGAS[47] // 
+{ 0x0F12, 0x0086  },   //TVAR_ash_pGAS[48] // 
+{ 0x0F12, 0x00D3  },   //TVAR_ash_pGAS[49] // 
+{ 0x0F12, 0x0130  },   //TVAR_ash_pGAS[50] // 
+{ 0x0F12, 0x0188  },   //TVAR_ash_pGAS[51] // 
+{ 0x0F12, 0x0140  },   //TVAR_ash_pGAS[52] // 
+{ 0x0F12, 0x00F2  },   //TVAR_ash_pGAS[53] // 
+{ 0x0F12, 0x009E  },   //TVAR_ash_pGAS[54] // 
+{ 0x0F12, 0x0056  },   //TVAR_ash_pGAS[55] // 
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[56] // 
+{ 0x0F12, 0x0013  },   //TVAR_ash_pGAS[57] // 
+{ 0x0F12, 0x000A  },   //TVAR_ash_pGAS[58] // 
+{ 0x0F12, 0x0013  },   //TVAR_ash_pGAS[59] // 
+{ 0x0F12, 0x0030  },   //TVAR_ash_pGAS[60] // 
+{ 0x0F12, 0x006B  },   //TVAR_ash_pGAS[61] // 
+{ 0x0F12, 0x00BA  },   //TVAR_ash_pGAS[62] // 
+{ 0x0F12, 0x0117  },   //TVAR_ash_pGAS[63] // 
+{ 0x0F12, 0x0176  },   //TVAR_ash_pGAS[64] // 
+{ 0x0F12, 0x012F  },   //TVAR_ash_pGAS[65] // 
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[66] // 
+{ 0x0F12, 0x0090  },   //TVAR_ash_pGAS[67] // 
+{ 0x0F12, 0x004D  },   //TVAR_ash_pGAS[68] // 
+{ 0x0F12, 0x0020  },   //TVAR_ash_pGAS[69] // 
+{ 0x0F12, 0x0009  },   //TVAR_ash_pGAS[70] // 
+{ 0x0F12, 0x0000  },   //TVAR_ash_pGAS[71] // 
+{ 0x0F12, 0x000D  },   //TVAR_ash_pGAS[72] // 
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[73] // 
+{ 0x0F12, 0x0062  },   //TVAR_ash_pGAS[74] // 
+{ 0x0F12, 0x00B3  },   //TVAR_ash_pGAS[75] // 
+{ 0x0F12, 0x0114  },   //TVAR_ash_pGAS[76] // 
+{ 0x0F12, 0x0172  },   //TVAR_ash_pGAS[77] // 
+{ 0x0F12, 0x0137  },   //TVAR_ash_pGAS[78] // 
+{ 0x0F12, 0x00E9  },   //TVAR_ash_pGAS[79] // 
+{ 0x0F12, 0x0098  },   //TVAR_ash_pGAS[80] // 
+{ 0x0F12, 0x0054  },   //TVAR_ash_pGAS[81] // 
+{ 0x0F12, 0x002A  },   //TVAR_ash_pGAS[82] // 
+{ 0x0F12, 0x0012  },   //TVAR_ash_pGAS[83] // 
+{ 0x0F12, 0x0009  },   //TVAR_ash_pGAS[84] // 
+{ 0x0F12, 0x0017  },   //TVAR_ash_pGAS[85] // 
+{ 0x0F12, 0x0034  },   //TVAR_ash_pGAS[86] // 
+{ 0x0F12, 0x006D  },   //TVAR_ash_pGAS[87] // 
+{ 0x0F12, 0x00BF  },   //TVAR_ash_pGAS[88] // 
+{ 0x0F12, 0x011C  },   //TVAR_ash_pGAS[89] // 
+{ 0x0F12, 0x0179  },   //TVAR_ash_pGAS[90] // 
+{ 0x0F12, 0x0152  },   //TVAR_ash_pGAS[91] // 
+{ 0x0F12, 0x0106  },   //TVAR_ash_pGAS[92] // 
+{ 0x0F12, 0x00B6  },   //TVAR_ash_pGAS[93] // 
+{ 0x0F12, 0x0070  },   //TVAR_ash_pGAS[94] // 
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[95] // 
+{ 0x0F12, 0x002D  },   //TVAR_ash_pGAS[96] // 
+{ 0x0F12, 0x0024  },   //TVAR_ash_pGAS[97] // 
+{ 0x0F12, 0x0032  },   //TVAR_ash_pGAS[98] // 
+{ 0x0F12, 0x0051  },   //TVAR_ash_pGAS[99] // 
+{ 0x0F12, 0x008A  },   //TVAR_ash_pGAS[100] //
+{ 0x0F12, 0x00DB  },   //TVAR_ash_pGAS[101] //
+{ 0x0F12, 0x0139  },   //TVAR_ash_pGAS[102] //
+{ 0x0F12, 0x0191  },   //TVAR_ash_pGAS[103] //
+{ 0x0F12, 0x0174  },   //TVAR_ash_pGAS[104] //
+{ 0x0F12, 0x012B  },   //TVAR_ash_pGAS[105] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[106] //
+{ 0x0F12, 0x009D  },   //TVAR_ash_pGAS[107] //
+{ 0x0F12, 0x006E  },   //TVAR_ash_pGAS[108] //
+{ 0x0F12, 0x0055  },   //TVAR_ash_pGAS[109] //
+{ 0x0F12, 0x0050  },   //TVAR_ash_pGAS[110] //
+{ 0x0F12, 0x005C  },   //TVAR_ash_pGAS[111] //
+{ 0x0F12, 0x007B  },   //TVAR_ash_pGAS[112] //
+{ 0x0F12, 0x00B7  },   //TVAR_ash_pGAS[113] //
+{ 0x0F12, 0x0109  },   //TVAR_ash_pGAS[114] //
+{ 0x0F12, 0x015E  },   //TVAR_ash_pGAS[115] //
+{ 0x0F12, 0x01B0  },   //TVAR_ash_pGAS[116] //
+{ 0x0F12, 0x01A9  },   //TVAR_ash_pGAS[117] //
+{ 0x0F12, 0x0160  },   //TVAR_ash_pGAS[118] //
+{ 0x0F12, 0x011A  },   //TVAR_ash_pGAS[119] //
+{ 0x0F12, 0x00DE  },   //TVAR_ash_pGAS[120] //
+{ 0x0F12, 0x00B1  },   //TVAR_ash_pGAS[121] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[122] //
+{ 0x0F12, 0x0093  },   //TVAR_ash_pGAS[123] //
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[124] //
+{ 0x0F12, 0x00C3  },   //TVAR_ash_pGAS[125] //
+{ 0x0F12, 0x00FA  },   //TVAR_ash_pGAS[126] //
+{ 0x0F12, 0x0143  },   //TVAR_ash_pGAS[127] //
+{ 0x0F12, 0x0190  },   //TVAR_ash_pGAS[128] //
+{ 0x0F12, 0x01E4  },   //TVAR_ash_pGAS[129] //
+{ 0x0F12, 0x01D5  },   //TVAR_ash_pGAS[130] //
+{ 0x0F12, 0x0194  },   //TVAR_ash_pGAS[131] //
+{ 0x0F12, 0x014E  },   //TVAR_ash_pGAS[132] //
+{ 0x0F12, 0x011F  },   //TVAR_ash_pGAS[133] //
+{ 0x0F12, 0x00F9  },   //TVAR_ash_pGAS[134] //
+{ 0x0F12, 0x00E1  },   //TVAR_ash_pGAS[135] //
+{ 0x0F12, 0x00DA  },   //TVAR_ash_pGAS[136] //
+{ 0x0F12, 0x00E8  },   //TVAR_ash_pGAS[137] //
+{ 0x0F12, 0x010A  },   //TVAR_ash_pGAS[138] //
+{ 0x0F12, 0x0139  },   //TVAR_ash_pGAS[139] //
+{ 0x0F12, 0x017B  },   //TVAR_ash_pGAS[140] //
+{ 0x0F12, 0x01C5  },   //TVAR_ash_pGAS[141] //
+{ 0x0F12, 0x0205  },   //TVAR_ash_pGAS[142] //
+{ 0x0F12, 0x01A2  },   //TVAR_ash_pGAS[143] //
+{ 0x0F12, 0x015F  },   //TVAR_ash_pGAS[144] //
+{ 0x0F12, 0x0126  },   //TVAR_ash_pGAS[145] //
+{ 0x0F12, 0x00F9  },   //TVAR_ash_pGAS[146] //
+{ 0x0F12, 0x00D7  },   //TVAR_ash_pGAS[147] //
+{ 0x0F12, 0x00BF  },   //TVAR_ash_pGAS[148] //
+{ 0x0F12, 0x00B6  },   //TVAR_ash_pGAS[149] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[150] //
+{ 0x0F12, 0x00D2  },   //TVAR_ash_pGAS[151] //
+{ 0x0F12, 0x00F3  },   //TVAR_ash_pGAS[152] //
+{ 0x0F12, 0x011D  },   //TVAR_ash_pGAS[153] //
+{ 0x0F12, 0x015A  },   //TVAR_ash_pGAS[154] //
+{ 0x0F12, 0x019E  },   //TVAR_ash_pGAS[155] //
+{ 0x0F12, 0x0171  },   //TVAR_ash_pGAS[156] //
+{ 0x0F12, 0x012E  },   //TVAR_ash_pGAS[157] //
+{ 0x0F12, 0x00F1  },   //TVAR_ash_pGAS[158] //
+{ 0x0F12, 0x00BF  },   //TVAR_ash_pGAS[159] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[160] //
+{ 0x0F12, 0x0081  },   //TVAR_ash_pGAS[161] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[162] //
+{ 0x0F12, 0x0080  },   //TVAR_ash_pGAS[163] //
+{ 0x0F12, 0x0097  },   //TVAR_ash_pGAS[164] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[165] //
+{ 0x0F12, 0x00EE  },   //TVAR_ash_pGAS[166] //
+{ 0x0F12, 0x012B  },   //TVAR_ash_pGAS[167] //
+{ 0x0F12, 0x0177  },   //TVAR_ash_pGAS[168] //
+{ 0x0F12, 0x0144  },   //TVAR_ash_pGAS[169] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_pGAS[170] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[171] //
+{ 0x0F12, 0x0088  },   //TVAR_ash_pGAS[172] //
+{ 0x0F12, 0x005F  },   //TVAR_ash_pGAS[173] //
+{ 0x0F12, 0x0049  },   //TVAR_ash_pGAS[174] //
+{ 0x0F12, 0x0041  },   //TVAR_ash_pGAS[175] //
+{ 0x0F12, 0x0049  },   //TVAR_ash_pGAS[176] //
+{ 0x0F12, 0x0061  },   //TVAR_ash_pGAS[177] //
+{ 0x0F12, 0x0089  },   //TVAR_ash_pGAS[178] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[179] //
+{ 0x0F12, 0x0104  },   //TVAR_ash_pGAS[180] //
+{ 0x0F12, 0x014D  },   //TVAR_ash_pGAS[181] //
+{ 0x0F12, 0x0122  },   //TVAR_ash_pGAS[182] //
+{ 0x0F12, 0x00DD  },   //TVAR_ash_pGAS[183] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[184] //
+{ 0x0F12, 0x005F  },   //TVAR_ash_pGAS[185] //
+{ 0x0F12, 0x0036  },   //TVAR_ash_pGAS[186] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[187] //
+{ 0x0F12, 0x0019  },   //TVAR_ash_pGAS[188] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[189] //
+{ 0x0F12, 0x003A  },   //TVAR_ash_pGAS[190] //
+{ 0x0F12, 0x0066  },   //TVAR_ash_pGAS[191] //
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[192] //
+{ 0x0F12, 0x00E6  },   //TVAR_ash_pGAS[193] //
+{ 0x0F12, 0x0130  },   //TVAR_ash_pGAS[194] //
+{ 0x0F12, 0x010B  },   //TVAR_ash_pGAS[195] //
+{ 0x0F12, 0x00C6  },   //TVAR_ash_pGAS[196] //
+{ 0x0F12, 0x0082  },   //TVAR_ash_pGAS[197] //
+{ 0x0F12, 0x0047  },   //TVAR_ash_pGAS[198] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[199] //
+{ 0x0F12, 0x000D  },   //TVAR_ash_pGAS[200] //
+{ 0x0F12, 0x0007  },   //TVAR_ash_pGAS[201] //
+{ 0x0F12, 0x000F  },   //TVAR_ash_pGAS[202] //
+{ 0x0F12, 0x0027  },   //TVAR_ash_pGAS[203] //
+{ 0x0F12, 0x0053  },   //TVAR_ash_pGAS[204] //
+{ 0x0F12, 0x008F  },   //TVAR_ash_pGAS[205] //
+{ 0x0F12, 0x00D6  },   //TVAR_ash_pGAS[206] //
+{ 0x0F12, 0x0121  },   //TVAR_ash_pGAS[207] //
+{ 0x0F12, 0x0100  },   //TVAR_ash_pGAS[208] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[209] //
+{ 0x0F12, 0x0077  },   //TVAR_ash_pGAS[210] //
+{ 0x0F12, 0x0040  },   //TVAR_ash_pGAS[211] //
+{ 0x0F12, 0x001A  },   //TVAR_ash_pGAS[212] //
+{ 0x0F12, 0x0007  },   //TVAR_ash_pGAS[213] //
+{ 0x0F12, 0x0000  },   //TVAR_ash_pGAS[214] //
+{ 0x0F12, 0x000B  },   //TVAR_ash_pGAS[215] //
+{ 0x0F12, 0x0023  },   //TVAR_ash_pGAS[216] //
+{ 0x0F12, 0x004E  },   //TVAR_ash_pGAS[217] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[218] //
+{ 0x0F12, 0x00D3  },   //TVAR_ash_pGAS[219] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[220] //
+{ 0x0F12, 0x0103  },   //TVAR_ash_pGAS[221] //
+{ 0x0F12, 0x00C1  },   //TVAR_ash_pGAS[222] //
+{ 0x0F12, 0x007D  },   //TVAR_ash_pGAS[223] //
+{ 0x0F12, 0x0046  },   //TVAR_ash_pGAS[224] //
+{ 0x0F12, 0x0024  },   //TVAR_ash_pGAS[225] //
+{ 0x0F12, 0x0010  },   //TVAR_ash_pGAS[226] //
+{ 0x0F12, 0x0008  },   //TVAR_ash_pGAS[227] //
+{ 0x0F12, 0x0014  },   //TVAR_ash_pGAS[228] //
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[229] //
+{ 0x0F12, 0x0059  },   //TVAR_ash_pGAS[230] //
+{ 0x0F12, 0x0094  },   //TVAR_ash_pGAS[231] //
+{ 0x0F12, 0x00DB  },   //TVAR_ash_pGAS[232] //
+{ 0x0F12, 0x0125  },   //TVAR_ash_pGAS[233] //
+{ 0x0F12, 0x0117  },   //TVAR_ash_pGAS[234] //
+{ 0x0F12, 0x00D5  },   //TVAR_ash_pGAS[235] //
+{ 0x0F12, 0x0092  },   //TVAR_ash_pGAS[236] //
+{ 0x0F12, 0x005C  },   //TVAR_ash_pGAS[237] //
+{ 0x0F12, 0x0038  },   //TVAR_ash_pGAS[238] //
+{ 0x0F12, 0x0026  },   //TVAR_ash_pGAS[239] //
+{ 0x0F12, 0x0020  },   //TVAR_ash_pGAS[240] //
+{ 0x0F12, 0x002C  },   //TVAR_ash_pGAS[241] //
+{ 0x0F12, 0x0044  },   //TVAR_ash_pGAS[242] //
+{ 0x0F12, 0x006F  },   //TVAR_ash_pGAS[243] //
+{ 0x0F12, 0x00AC  },   //TVAR_ash_pGAS[244] //
+{ 0x0F12, 0x00F2  },   //TVAR_ash_pGAS[245] //
+{ 0x0F12, 0x013B  },   //TVAR_ash_pGAS[246] //
+{ 0x0F12, 0x0131  },   //TVAR_ash_pGAS[247] //
+{ 0x0F12, 0x00EE  },   //TVAR_ash_pGAS[248] //
+{ 0x0F12, 0x00B3  },   //TVAR_ash_pGAS[249] //
+{ 0x0F12, 0x007E  },   //TVAR_ash_pGAS[250] //
+{ 0x0F12, 0x005B  },   //TVAR_ash_pGAS[251] //
+{ 0x0F12, 0x0047  },   //TVAR_ash_pGAS[252] //
+{ 0x0F12, 0x0044  },   //TVAR_ash_pGAS[253] //
+{ 0x0F12, 0x004E  },   //TVAR_ash_pGAS[254] //
+{ 0x0F12, 0x0067  },   //TVAR_ash_pGAS[255] //
+{ 0x0F12, 0x0094  },   //TVAR_ash_pGAS[256] //
+{ 0x0F12, 0x00D0  },   //TVAR_ash_pGAS[257] //
+{ 0x0F12, 0x0112  },   //TVAR_ash_pGAS[258] //
+{ 0x0F12, 0x0159  },   //TVAR_ash_pGAS[259] //
+{ 0x0F12, 0x015E  },   //TVAR_ash_pGAS[260] //
+{ 0x0F12, 0x011B  },   //TVAR_ash_pGAS[261] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[262] //
+{ 0x0F12, 0x00B1  },   //TVAR_ash_pGAS[263] //
+{ 0x0F12, 0x008E  },   //TVAR_ash_pGAS[264] //
+{ 0x0F12, 0x007E  },   //TVAR_ash_pGAS[265] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[266] //
+{ 0x0F12, 0x0084  },   //TVAR_ash_pGAS[267] //
+{ 0x0F12, 0x00A0  },   //TVAR_ash_pGAS[268] //
+{ 0x0F12, 0x00C8  },   //TVAR_ash_pGAS[269] //
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[270] //
+{ 0x0F12, 0x013A  },   //TVAR_ash_pGAS[271] //
+{ 0x0F12, 0x0185  },   //TVAR_ash_pGAS[272] //
+{ 0x0F12, 0x0188  },   //TVAR_ash_pGAS[273] //
+{ 0x0F12, 0x0148  },   //TVAR_ash_pGAS[274] //
+{ 0x0F12, 0x010D  },   //TVAR_ash_pGAS[275] //
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[276] //
+{ 0x0F12, 0x00C7  },   //TVAR_ash_pGAS[277] //
+{ 0x0F12, 0x00B4  },   //TVAR_ash_pGAS[278] //
+{ 0x0F12, 0x00B2  },   //TVAR_ash_pGAS[279] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[280] //
+{ 0x0F12, 0x00D9  },   //TVAR_ash_pGAS[281] //
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[282] //
+{ 0x0F12, 0x012F  },   //TVAR_ash_pGAS[283] //
+{ 0x0F12, 0x016D  },   //TVAR_ash_pGAS[284] //
+{ 0x0F12, 0x01A7  },   //TVAR_ash_pGAS[285] //
+{ 0x0F12, 0x018F  },   //TVAR_ash_pGAS[286] //
+{ 0x0F12, 0x014E  },   //TVAR_ash_pGAS[287] //
+{ 0x0F12, 0x0119  },   //TVAR_ash_pGAS[288] //
+{ 0x0F12, 0x00EC  },   //TVAR_ash_pGAS[289] //
+{ 0x0F12, 0x00CD  },   //TVAR_ash_pGAS[290] //
+{ 0x0F12, 0x00BB  },   //TVAR_ash_pGAS[291] //
+{ 0x0F12, 0x00B8  },   //TVAR_ash_pGAS[292] //
+{ 0x0F12, 0x00C4  },   //TVAR_ash_pGAS[293] //
+{ 0x0F12, 0x00DE  },   //TVAR_ash_pGAS[294] //
+{ 0x0F12, 0x0105  },   //TVAR_ash_pGAS[295] //
+{ 0x0F12, 0x0135  },   //TVAR_ash_pGAS[296] //
+{ 0x0F12, 0x0176  },   //TVAR_ash_pGAS[297] //
+{ 0x0F12, 0x01B8  },   //TVAR_ash_pGAS[298] //
+{ 0x0F12, 0x0161  },   //TVAR_ash_pGAS[299] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[300] //
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[301] //
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[302] //
+{ 0x0F12, 0x0093  },   //TVAR_ash_pGAS[303] //
+{ 0x0F12, 0x0080  },   //TVAR_ash_pGAS[304] //
+{ 0x0F12, 0x007C  },   //TVAR_ash_pGAS[305] //
+{ 0x0F12, 0x0087  },   //TVAR_ash_pGAS[306] //
+{ 0x0F12, 0x00A3  },   //TVAR_ash_pGAS[307] //
+{ 0x0F12, 0x00CD  },   //TVAR_ash_pGAS[308] //
+{ 0x0F12, 0x0104  },   //TVAR_ash_pGAS[309] //
+{ 0x0F12, 0x0142  },   //TVAR_ash_pGAS[310] //
+{ 0x0F12, 0x0192  },   //TVAR_ash_pGAS[311] //
+{ 0x0F12, 0x0136  },   //TVAR_ash_pGAS[312] //
+{ 0x0F12, 0x00F4  },   //TVAR_ash_pGAS[313] //
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[314] //
+{ 0x0F12, 0x0081  },   //TVAR_ash_pGAS[315] //
+{ 0x0F12, 0x005C  },   //TVAR_ash_pGAS[316] //
+{ 0x0F12, 0x0048  },   //TVAR_ash_pGAS[317] //
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[318] //
+{ 0x0F12, 0x004E  },   //TVAR_ash_pGAS[319] //
+{ 0x0F12, 0x006A  },   //TVAR_ash_pGAS[320] //
+{ 0x0F12, 0x0097  },   //TVAR_ash_pGAS[321] //
+{ 0x0F12, 0x00D0  },   //TVAR_ash_pGAS[322] //
+{ 0x0F12, 0x0116  },   //TVAR_ash_pGAS[323] //
+{ 0x0F12, 0x0160  },   //TVAR_ash_pGAS[324] //
+{ 0x0F12, 0x0118  },   //TVAR_ash_pGAS[325] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[326] //
+{ 0x0F12, 0x0093  },   //TVAR_ash_pGAS[327] //
+{ 0x0F12, 0x005B  },   //TVAR_ash_pGAS[328] //
+{ 0x0F12, 0x0035  },   //TVAR_ash_pGAS[329] //
+{ 0x0F12, 0x0020  },   //TVAR_ash_pGAS[330] //
+{ 0x0F12, 0x001B  },   //TVAR_ash_pGAS[331] //
+{ 0x0F12, 0x0024  },   //TVAR_ash_pGAS[332] //
+{ 0x0F12, 0x0041  },   //TVAR_ash_pGAS[333] //
+{ 0x0F12, 0x006F  },   //TVAR_ash_pGAS[334] //
+{ 0x0F12, 0x00AC  },   //TVAR_ash_pGAS[335] //
+{ 0x0F12, 0x00F3  },   //TVAR_ash_pGAS[336] //
+{ 0x0F12, 0x013F  },   //TVAR_ash_pGAS[337] //
+{ 0x0F12, 0x0105  },   //TVAR_ash_pGAS[338] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[339] //
+{ 0x0F12, 0x007F  },   //TVAR_ash_pGAS[340] //
+{ 0x0F12, 0x0046  },   //TVAR_ash_pGAS[341] //
+{ 0x0F12, 0x0021  },   //TVAR_ash_pGAS[342] //
+{ 0x0F12, 0x000E  },   //TVAR_ash_pGAS[343] //
+{ 0x0F12, 0x0007  },   //TVAR_ash_pGAS[344] //
+{ 0x0F12, 0x0010  },   //TVAR_ash_pGAS[345] //
+{ 0x0F12, 0x002A  },   //TVAR_ash_pGAS[346] //
+{ 0x0F12, 0x0058  },   //TVAR_ash_pGAS[347] //
+{ 0x0F12, 0x0094  },   //TVAR_ash_pGAS[348] //
+{ 0x0F12, 0x00DB  },   //TVAR_ash_pGAS[349] //
+{ 0x0F12, 0x0127  },   //TVAR_ash_pGAS[350] //
+{ 0x0F12, 0x00FF  },   //TVAR_ash_pGAS[351] //
+{ 0x0F12, 0x00BC  },   //TVAR_ash_pGAS[352] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[353] //
+{ 0x0F12, 0x0042  },   //TVAR_ash_pGAS[354] //
+{ 0x0F12, 0x001C  },   //TVAR_ash_pGAS[355] //
+{ 0x0F12, 0x0008  },   //TVAR_ash_pGAS[356] //
+{ 0x0F12, 0x0000  },   //TVAR_ash_pGAS[357] //
+{ 0x0F12, 0x000B  },   //TVAR_ash_pGAS[358] //
+{ 0x0F12, 0x0023  },   //TVAR_ash_pGAS[359] //
+{ 0x0F12, 0x0050  },   //TVAR_ash_pGAS[360] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[361] //
+{ 0x0F12, 0x00D3  },   //TVAR_ash_pGAS[362] //
+{ 0x0F12, 0x011D  },   //TVAR_ash_pGAS[363] //
+{ 0x0F12, 0x0108  },   //TVAR_ash_pGAS[364] //
+{ 0x0F12, 0x00C4  },   //TVAR_ash_pGAS[365] //
+{ 0x0F12, 0x0083  },   //TVAR_ash_pGAS[366] //
+{ 0x0F12, 0x004C  },   //TVAR_ash_pGAS[367] //
+{ 0x0F12, 0x0027  },   //TVAR_ash_pGAS[368] //
+{ 0x0F12, 0x0011  },   //TVAR_ash_pGAS[369] //
+{ 0x0F12, 0x0008  },   //TVAR_ash_pGAS[370] //
+{ 0x0F12, 0x0013  },   //TVAR_ash_pGAS[371] //
+{ 0x0F12, 0x002A  },   //TVAR_ash_pGAS[372] //
+{ 0x0F12, 0x0055  },   //TVAR_ash_pGAS[373] //
+{ 0x0F12, 0x008F  },   //TVAR_ash_pGAS[374] //
+{ 0x0F12, 0x00D5  },   //TVAR_ash_pGAS[375] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[376] //
+{ 0x0F12, 0x011E  },   //TVAR_ash_pGAS[377] //
+{ 0x0F12, 0x00DC  },   //TVAR_ash_pGAS[378] //
+{ 0x0F12, 0x009C  },   //TVAR_ash_pGAS[379] //
+{ 0x0F12, 0x0064  },   //TVAR_ash_pGAS[380] //
+{ 0x0F12, 0x003D  },   //TVAR_ash_pGAS[381] //
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[382] //
+{ 0x0F12, 0x001F  },   //TVAR_ash_pGAS[383] //
+{ 0x0F12, 0x0029  },   //TVAR_ash_pGAS[384] //
+{ 0x0F12, 0x003F  },   //TVAR_ash_pGAS[385] //
+{ 0x0F12, 0x0069  },   //TVAR_ash_pGAS[386] //
+{ 0x0F12, 0x00A3  },   //TVAR_ash_pGAS[387] //
+{ 0x0F12, 0x00E8  },   //TVAR_ash_pGAS[388] //
+{ 0x0F12, 0x012D  },   //TVAR_ash_pGAS[389] //
+{ 0x0F12, 0x013D  },   //TVAR_ash_pGAS[390] //
+{ 0x0F12, 0x00FB  },   //TVAR_ash_pGAS[391] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[392] //
+{ 0x0F12, 0x0089  },   //TVAR_ash_pGAS[393] //
+{ 0x0F12, 0x0063  },   //TVAR_ash_pGAS[394] //
+{ 0x0F12, 0x004C  },   //TVAR_ash_pGAS[395] //
+{ 0x0F12, 0x0045  },   //TVAR_ash_pGAS[396] //
+{ 0x0F12, 0x004B  },   //TVAR_ash_pGAS[397] //
+{ 0x0F12, 0x0061  },   //TVAR_ash_pGAS[398] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[399] //
+{ 0x0F12, 0x00C4  },   //TVAR_ash_pGAS[400] //
+{ 0x0F12, 0x0102  },   //TVAR_ash_pGAS[401] //
+{ 0x0F12, 0x014B  },   //TVAR_ash_pGAS[402] //
+{ 0x0F12, 0x016F  },   //TVAR_ash_pGAS[403] //
+{ 0x0F12, 0x0129  },   //TVAR_ash_pGAS[404] //
+{ 0x0F12, 0x00F0  },   //TVAR_ash_pGAS[405] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[406] //
+{ 0x0F12, 0x009A  },   //TVAR_ash_pGAS[407] //
+{ 0x0F12, 0x0084  },   //TVAR_ash_pGAS[408] //
+{ 0x0F12, 0x007B  },   //TVAR_ash_pGAS[409] //
+{ 0x0F12, 0x0082  },   //TVAR_ash_pGAS[410] //
+{ 0x0F12, 0x0099  },   //TVAR_ash_pGAS[411] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[412] //
+{ 0x0F12, 0x00EF  },   //TVAR_ash_pGAS[413] //
+{ 0x0F12, 0x0129  },   //TVAR_ash_pGAS[414] //
+{ 0x0F12, 0x0173  },   //TVAR_ash_pGAS[415] //
+{ 0x0F12, 0x01A0  },   //TVAR_ash_pGAS[416] //
+{ 0x0F12, 0x015B  },   //TVAR_ash_pGAS[417] //
+{ 0x0F12, 0x0121  },   //TVAR_ash_pGAS[418] //
+{ 0x0F12, 0x00F9  },   //TVAR_ash_pGAS[419] //
+{ 0x0F12, 0x00D8  },   //TVAR_ash_pGAS[420] //
+{ 0x0F12, 0x00C2  },   //TVAR_ash_pGAS[421] //
+{ 0x0F12, 0x00B7  },   //TVAR_ash_pGAS[422] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[423] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[424] //
+{ 0x0F12, 0x00F4  },   //TVAR_ash_pGAS[425] //
+{ 0x0F12, 0x0120  },   //TVAR_ash_pGAS[426] //
+{ 0x0F12, 0x015D  },   //TVAR_ash_pGAS[427] //
+{ 0x0F12, 0x0198  },   //TVAR_ash_pGAS[428] //
+{ 0x0F12, 0x013A  },   //TVAR_ash_pGAS[429] //
+{ 0x0F12, 0x010B  },   //TVAR_ash_pGAS[430] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[431] //
+{ 0x0F12, 0x00BE  },   //TVAR_ash_pGAS[432] //
+{ 0x0F12, 0x00A7  },   //TVAR_ash_pGAS[433] //
+{ 0x0F12, 0x009A  },   //TVAR_ash_pGAS[434] //
+{ 0x0F12, 0x0097  },   //TVAR_ash_pGAS[435] //
+{ 0x0F12, 0x00A2  },   //TVAR_ash_pGAS[436] //
+{ 0x0F12, 0x00B9  },   //TVAR_ash_pGAS[437] //
+{ 0x0F12, 0x00D6  },   //TVAR_ash_pGAS[438] //
+{ 0x0F12, 0x00FD  },   //TVAR_ash_pGAS[439] //
+{ 0x0F12, 0x0133  },   //TVAR_ash_pGAS[440] //
+{ 0x0F12, 0x0165  },   //TVAR_ash_pGAS[441] //
+{ 0x0F12, 0x0117  },   //TVAR_ash_pGAS[442] //
+{ 0x0F12, 0x00E4  },   //TVAR_ash_pGAS[443] //
+{ 0x0F12, 0x00B5  },   //TVAR_ash_pGAS[444] //
+{ 0x0F12, 0x0091  },   //TVAR_ash_pGAS[445] //
+{ 0x0F12, 0x0079  },   //TVAR_ash_pGAS[446] //
+{ 0x0F12, 0x006D  },   //TVAR_ash_pGAS[447] //
+{ 0x0F12, 0x0069  },   //TVAR_ash_pGAS[448] //
+{ 0x0F12, 0x0072  },   //TVAR_ash_pGAS[449] //
+{ 0x0F12, 0x0088  },   //TVAR_ash_pGAS[450] //
+{ 0x0F12, 0x00A9  },   //TVAR_ash_pGAS[451] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[452] //
+{ 0x0F12, 0x0108  },   //TVAR_ash_pGAS[453] //
+{ 0x0F12, 0x0148  },   //TVAR_ash_pGAS[454] //
+{ 0x0F12, 0x00F1  },   //TVAR_ash_pGAS[455] //
+{ 0x0F12, 0x00BD  },   //TVAR_ash_pGAS[456] //
+{ 0x0F12, 0x008B  },   //TVAR_ash_pGAS[457] //
+{ 0x0F12, 0x0063  },   //TVAR_ash_pGAS[458] //
+{ 0x0F12, 0x0049  },   //TVAR_ash_pGAS[459] //
+{ 0x0F12, 0x003D  },   //TVAR_ash_pGAS[460] //
+{ 0x0F12, 0x003A  },   //TVAR_ash_pGAS[461] //
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[462] //
+{ 0x0F12, 0x0057  },   //TVAR_ash_pGAS[463] //
+{ 0x0F12, 0x007A  },   //TVAR_ash_pGAS[464] //
+{ 0x0F12, 0x00A8  },   //TVAR_ash_pGAS[465] //
+{ 0x0F12, 0x00E0  },   //TVAR_ash_pGAS[466] //
+{ 0x0F12, 0x011B  },   //TVAR_ash_pGAS[467] //
+{ 0x0F12, 0x00D4  },   //TVAR_ash_pGAS[468] //
+{ 0x0F12, 0x00A1  },   //TVAR_ash_pGAS[469] //
+{ 0x0F12, 0x006D  },   //TVAR_ash_pGAS[470] //
+{ 0x0F12, 0x0043  },   //TVAR_ash_pGAS[471] //
+{ 0x0F12, 0x0027  },   //TVAR_ash_pGAS[472] //
+{ 0x0F12, 0x001B  },   //TVAR_ash_pGAS[473] //
+{ 0x0F12, 0x0019  },   //TVAR_ash_pGAS[474] //
+{ 0x0F12, 0x001E  },   //TVAR_ash_pGAS[475] //
+{ 0x0F12, 0x0033  },   //TVAR_ash_pGAS[476] //
+{ 0x0F12, 0x0057  },   //TVAR_ash_pGAS[477] //
+{ 0x0F12, 0x0087  },   //TVAR_ash_pGAS[478] //
+{ 0x0F12, 0x00C0  },   //TVAR_ash_pGAS[479] //
+{ 0x0F12, 0x00FA  },   //TVAR_ash_pGAS[480] //
+{ 0x0F12, 0x00C1  },   //TVAR_ash_pGAS[481] //
+{ 0x0F12, 0x008F  },   //TVAR_ash_pGAS[482] //
+{ 0x0F12, 0x005B  },	//TVAR_ash_pGAS[483] //                                                                        
+{ 0x0F12, 0x0031  },	//TVAR_ash_pGAS[484] //                                                                        
+{ 0x0F12, 0x0016  },	//TVAR_ash_pGAS[485] //                                                                        
+{ 0x0F12, 0x000B  },	//TVAR_ash_pGAS[486] //                                                                        
+{ 0x0F12, 0x0006  },	//TVAR_ash_pGAS[487] //                                                                        
+{ 0x0F12, 0x000D  },	//TVAR_ash_pGAS[488] //                                                                        
+{ 0x0F12, 0x001F  },	//TVAR_ash_pGAS[489] //                                                                        
+{ 0x0F12, 0x0042  },	//TVAR_ash_pGAS[490] //                                                                        
+{ 0x0F12, 0x0070  },	//TVAR_ash_pGAS[491] //                                                                        
+{ 0x0F12, 0x00AA  },	//TVAR_ash_pGAS[492] //                                                                        
+{ 0x0F12, 0x00E5  },	//TVAR_ash_pGAS[493] //                                                                        
+{ 0x0F12, 0x00BD  },	//TVAR_ash_pGAS[494] //                                                                        
+{ 0x0F12, 0x008A  },	//TVAR_ash_pGAS[495] //                                                                        
+{ 0x0F12, 0x0056  },	//TVAR_ash_pGAS[496] //                                                                        
+{ 0x0F12, 0x002C  },	//TVAR_ash_pGAS[497] //                                                                        
+{ 0x0F12, 0x0011  },	//TVAR_ash_pGAS[498] //                                                                        
+{ 0x0F12, 0x0005  },	//TVAR_ash_pGAS[499] //                                                                        
+{ 0x0F12, 0x0000  },	//TVAR_ash_pGAS[500] //                                                                        
+{ 0x0F12, 0x0008  },	//TVAR_ash_pGAS[501] //                                                                        
+{ 0x0F12, 0x0018  },	//TVAR_ash_pGAS[502] //                                                                        
+{ 0x0F12, 0x0039  },	//TVAR_ash_pGAS[503] //                                                                        
+{ 0x0F12, 0x0068  },	//TVAR_ash_pGAS[504] //                                                                        
+{ 0x0F12, 0x00A1  },	//TVAR_ash_pGAS[505] //                                                                        
+{ 0x0F12, 0x00DA  },	//TVAR_ash_pGAS[506] //                                                                        
+{ 0x0F12, 0x00C4  },	//TVAR_ash_pGAS[507] //                                                                        
+{ 0x0F12, 0x0092  },	//TVAR_ash_pGAS[508] //                                                                        
+{ 0x0F12, 0x005F  },	//TVAR_ash_pGAS[509] //                                                                        
+{ 0x0F12, 0x0034  },	//TVAR_ash_pGAS[510] //                                                                        
+{ 0x0F12, 0x001B  },	//TVAR_ash_pGAS[511] //                                                                        
+{ 0x0F12, 0x000D  },	//TVAR_ash_pGAS[512] //                                                                        
+{ 0x0F12, 0x0007  },	//TVAR_ash_pGAS[513] //                                                                        
+{ 0x0F12, 0x000E  },	//TVAR_ash_pGAS[514] //                                                                        
+{ 0x0F12, 0x001E  },	//TVAR_ash_pGAS[515] //                                                                        
+{ 0x0F12, 0x003E  },	//TVAR_ash_pGAS[516] //                                                                        
+{ 0x0F12, 0x006A  },	//TVAR_ash_pGAS[517] //                                                                        
+{ 0x0F12, 0x00A2  },	//TVAR_ash_pGAS[518] //                                                                        
+{ 0x0F12, 0x00DB  },	//TVAR_ash_pGAS[519] //                                                                        
+{ 0x0F12, 0x00D7  },	//TVAR_ash_pGAS[520] //                                                                        
+{ 0x0F12, 0x00A3  },	//TVAR_ash_pGAS[521] //                                                                        
+{ 0x0F12, 0x0073  },	//TVAR_ash_pGAS[522] //                                                                        
+{ 0x0F12, 0x0049  },	//TVAR_ash_pGAS[523] //                                                                        
+{ 0x0F12, 0x002F  },	//TVAR_ash_pGAS[524] //                                                                        
+{ 0x0F12, 0x0022  },	//TVAR_ash_pGAS[525] //                                                                        
+{ 0x0F12, 0x001B  },	//TVAR_ash_pGAS[526] //                                                                        
+{ 0x0F12, 0x0023  },	//TVAR_ash_pGAS[527] //                                                                        
+{ 0x0F12, 0x0031  },	//TVAR_ash_pGAS[528] //                                                                        
+{ 0x0F12, 0x0050  },	//TVAR_ash_pGAS[529] //                                                                        
+{ 0x0F12, 0x007C  },	//TVAR_ash_pGAS[530] //                                                                        
+{ 0x0F12, 0x00B1  },	//TVAR_ash_pGAS[531] //                                                                        
+{ 0x0F12, 0x00E9  },	//TVAR_ash_pGAS[532] //                                                                        
+{ 0x0F12, 0x00F2  },	//TVAR_ash_pGAS[533] //                                                                        
+{ 0x0F12, 0x00C0  },	//TVAR_ash_pGAS[534] //                                                                        
+{ 0x0F12, 0x0091  },	//TVAR_ash_pGAS[535] //                                                                        
+{ 0x0F12, 0x006A  },	//TVAR_ash_pGAS[536] //                                                                        
+{ 0x0F12, 0x0050  },	//TVAR_ash_pGAS[537] //                                                                        
+{ 0x0F12, 0x0041  },	//TVAR_ash_pGAS[538] //                                                                        
+{ 0x0F12, 0x003C  },	//TVAR_ash_pGAS[539] //                                                                        
+{ 0x0F12, 0x0040  },	//TVAR_ash_pGAS[540] //                                                                        
+{ 0x0F12, 0x004F  },	//TVAR_ash_pGAS[541] //                                                                        
+{ 0x0F12, 0x006D  },	//TVAR_ash_pGAS[542] //                                                                        
+{ 0x0F12, 0x0099  },	//TVAR_ash_pGAS[543] //                                                                        
+{ 0x0F12, 0x00C9  },	//TVAR_ash_pGAS[544] //                                                                        
+{ 0x0F12, 0x0102  },	//TVAR_ash_pGAS[545] //                                                                        
+{ 0x0F12, 0x0120  },	//TVAR_ash_pGAS[546] //                                                                        
+{ 0x0F12, 0x00EB  },	//TVAR_ash_pGAS[547] //                                                                        
+{ 0x0F12, 0x00BE  },	//TVAR_ash_pGAS[548] //                                                                        
+{ 0x0F12, 0x0099  },	//TVAR_ash_pGAS[549] //                                                                        
+{ 0x0F12, 0x0081  },	//TVAR_ash_pGAS[550] //                                                                        
+{ 0x0F12, 0x0074  },	//TVAR_ash_pGAS[551] //                                                                        
+{ 0x0F12, 0x006F  },	//TVAR_ash_pGAS[552] //                                                                        
+{ 0x0F12, 0x0071  },	//TVAR_ash_pGAS[553] //                                                                        
+{ 0x0F12, 0x0082  },	//TVAR_ash_pGAS[554] //                                                                        
+{ 0x0F12, 0x009B  },	//TVAR_ash_pGAS[555] //                                                                        
+{ 0x0F12, 0x00C0  },	//TVAR_ash_pGAS[556] //                                                                        
+{ 0x0F12, 0x00EE  },	//TVAR_ash_pGAS[557] //                                                                        
+{ 0x0F12, 0x0126  },	//TVAR_ash_pGAS[558] //                                                                        
+{ 0x0F12, 0x0147  },	//TVAR_ash_pGAS[559] //                                                                        
+{ 0x0F12, 0x0116  },	//TVAR_ash_pGAS[560] //                                                                        
+{ 0x0F12, 0x00E7  },	//TVAR_ash_pGAS[561] //                                                                        
+{ 0x0F12, 0x00C9  },	//TVAR_ash_pGAS[562] //                                                                        
+{ 0x0F12, 0x00B4  },	//TVAR_ash_pGAS[563] //                                                                        
+{ 0x0F12, 0x00A7  },	//TVAR_ash_pGAS[564] //                                                                        
+{ 0x0F12, 0x00A0  },	//TVAR_ash_pGAS[565] //                                                                        
+{ 0x0F12, 0x00A3  },	//TVAR_ash_pGAS[566] //                                                                        
+{ 0x0F12, 0x00B1  },	//TVAR_ash_pGAS[567] //                                                                        
+{ 0x0F12, 0x00C9  },	//TVAR_ash_pGAS[568] //                                                                        
+{ 0x0F12, 0x00EA  },	//TVAR_ash_pGAS[569] //                                                                        
+{ 0x0F12, 0x011B  },	//TVAR_ash_pGAS[570] //                                                                        
+{ 0x0F12, 0x0141  },	//TVAR_ash_pGAS[571] //                                                                        
+                        
+{ 0x002A, 0x074E  },	    
+{ 0x0F12, 0x0001  },	//ash_bLumaMode //         	                                                                        
+{ 0x002A, 0x0D30  },                               
+{ 0x0F12, 0x02A8  },	//awbb_GLocu //        
+{ 0x0F12, 0x0347  },	//awbb_GLocuSB //      
+                                                   
+{ 0x002A, 0x06B8  },                               
+{ 0x0F12, 0x00C0  },	//TVAR_ash_AwbashCord[0] //                                                                        
+{ 0x0F12, 0x00E0  },	//TVAR_ash_AwbashCord[1] //                                                                        
+{ 0x0F12, 0x0120  },	//TVAR_ash_AwbashCord[2] //                                                                        
+{ 0x0F12, 0x0124  },	//TVAR_ash_AwbashCord[3] //                                                                        
+{ 0x0F12, 0x0156  },	//TVAR_ash_AwbashCord[4] //                                                                        
+{ 0x0F12, 0x017F  },	//TVAR_ash_AwbashCord[5] //                                                                        
+{ 0x0F12, 0x018F  },	//TVAR_ash_AwbashCord[6] //                                                                        
+                                                   
+                                                   
+{ 0x002A, 0x0664  },                               
+{ 0x0F12, 0x013E  },	//seti_uContrastCenter //                                                                          
+                                                   
+                                                   
+{ 0x002A, 0x06C6  },                               
+{ 0x0F12, 0x010B  },	//ash_CGrasalphaS[0] //
+{ 0x0F12, 0x0103  },	//ash_CGrasalphaS[1] //
+{ 0x0F12, 0x00FC  },	//ash_CGrasalphaS[2] //
+{ 0x0F12, 0x010C  },	//ash_CGrasalphaS[3] //
+                        
+{ 0x002A, 0x0C48  },    
+{ 0x0F12, 0x03C8  },	//awbb_IndoorGrZones_m_BGrid[0] // 		                                                                        
+{ 0x0F12, 0x03DE  },	//awbb_IndoorGrZones_m_BGrid[1] //                                                                         
+{ 0x0F12, 0x0372  },	//awbb_IndoorGrZones_m_BGrid[2] //                                                                         
+{ 0x0F12, 0x03EA  },	//awbb_IndoorGrZones_m_BGrid[3] //                                                                         
+{ 0x0F12, 0x0336  },	//awbb_IndoorGrZones_m_BGrid[4] //                                                                         
+{ 0x0F12, 0x03DE  },	//awbb_IndoorGrZones_m_BGrid[5] //                                                                         
+{ 0x0F12, 0x0302  },	//awbb_IndoorGrZones_m_BGrid[6] //                                                                         
+{ 0x0F12, 0x03A2  },	//awbb_IndoorGrZones_m_BGrid[7] //                                                                         
+{ 0x0F12, 0x02C8  },	//awbb_IndoorGrZones_m_BGrid[8] //                                                                         
+{ 0x0F12, 0x0368  },	//awbb_IndoorGrZones_m_BGrid[9] //                                                                         
+{ 0x0F12, 0x0292  },	//awbb_IndoorGrZones_m_BGrid[10] //                                                                        
+{ 0x0F12, 0x033A  },	//awbb_IndoorGrZones_m_BGrid[11] //                                                                        
+{ 0x0F12, 0x0276  },	//awbb_IndoorGrZones_m_BGrid[12] //                                                                        
+{ 0x0F12, 0x0306  },	//awbb_IndoorGrZones_m_BGrid[13] //                                                                        
+{ 0x0F12, 0x025A  },	//awbb_IndoorGrZones_m_BGrid[14] //                                                                        
+{ 0x0F12, 0x02C2  },	//awbb_IndoorGrZones_m_BGrid[15] //                                                                        
+{ 0x0F12, 0x0246  },	//awbb_IndoorGrZones_m_BGrid[16] //                                                                        
+{ 0x0F12, 0x02A2  },	//awbb_IndoorGrZones_m_BGrid[17] //                                                                        
+{ 0x0F12, 0x0232  },	//awbb_IndoorGrZones_m_BGrid[18] //                                                                        
+{ 0x0F12, 0x0298  },	//awbb_IndoorGrZones_m_BGrid[19] //                                                                        
+{ 0x0F12, 0x021E  },	//awbb_IndoorGrZones_m_BGrid[20] //                                                                        
+{ 0x0F12, 0x027E  },	//awbb_IndoorGrZones_m_BGrid[21] //                                                                        
+{ 0x0F12, 0x0208  },	//awbb_IndoorGrZones_m_BGrid[22] //                                                                        
+{ 0x0F12, 0x026C  },	//awbb_IndoorGrZones_m_BGrid[23] //                                                                        
+{ 0x0F12, 0x01EE  },	//awbb_IndoorGrZones_m_BGrid[24] //                                                                        
+{ 0x0F12, 0x025C  },	//awbb_IndoorGrZones_m_BGrid[25] //                                                                        
+{ 0x0F12, 0x01F0  },	//awbb_IndoorGrZones_m_BGrid[26] //                                                                        
+{ 0x0F12, 0x0248  },	//awbb_IndoorGrZones_m_BGrid[27] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[28] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[29] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[30] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[31] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[32] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[33] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[34] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[35] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[36] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[37] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[38] //                                                                        
+{ 0x0F12, 0x0000  },	//awbb_IndoorGrZones_m_BGrid[39] //                                                                        
+                                                           
+{ 0x0F12, 0x0005  },   //awbb_IndoorGrZones_m_Gridstep //  
+
+{ 0x002A, 0x0C9C  },
+{ 0x0F12, 0x000E  },
+{ 0x002A, 0x0CA0  },                                       
+{ 0x0F12, 0x0108  },	//awbb_IndoorGrZones_m_Boffs //
+                                                           
+{ 0x002A, 0x0CE0  },                                       
+{ 0x0F12, 0x03D4  },	//awbb_LowBrGrZones_m_BGrid[0] //                                                                          
+{ 0x0F12, 0x043E  },	//awbb_LowBrGrZones_m_BGrid[1] //                                                                          
+{ 0x0F12, 0x035C  },	//awbb_LowBrGrZones_m_BGrid[2] //                                                                          
+{ 0x0F12, 0x0438  },	//awbb_LowBrGrZones_m_BGrid[3] //                                                                          
+{ 0x0F12, 0x02F0  },	//awbb_LowBrGrZones_m_BGrid[4] //                                                                          
+{ 0x0F12, 0x042D  },	//awbb_LowBrGrZones_m_BGrid[5] //                                                                          
+{ 0x0F12, 0x029A  },	//awbb_LowBrGrZones_m_BGrid[6] //                                                                          
+{ 0x0F12, 0x03EF  },	//awbb_LowBrGrZones_m_BGrid[7] //                                                                          
+{ 0x0F12, 0x025E  },	//awbb_LowBrGrZones_m_BGrid[8] //                                                                          
+{ 0x0F12, 0x0395  },	//awbb_LowBrGrZones_m_BGrid[9] //                                                                          
+{ 0x0F12, 0x022E  },	//awbb_LowBrGrZones_m_BGrid[10] //                                                                         
+{ 0x0F12, 0x0346  },	//awbb_LowBrGrZones_m_BGrid[11] //                                                                         
+{ 0x0F12, 0x0200  },	//awbb_LowBrGrZones_m_BGrid[12] //                                                                         
+{ 0x0F12, 0x02F6  },	//awbb_LowBrGrZones_m_BGrid[13] //                                                                         
+{ 0x0F12, 0x01CE  },	//awbb_LowBrGrZones_m_BGrid[14] //                                                                         
+{ 0x0F12, 0x02C8  },	//awbb_LowBrGrZones_m_BGrid[15] //                                                                         
+{ 0x0F12, 0x01BB  },	//awbb_LowBrGrZones_m_BGrid[16] //                                                                         
+{ 0x0F12, 0x0287  },	//awbb_LowBrGrZones_m_BGrid[17] //                                                                         
+{ 0x0F12, 0x01E2  },	//awbb_LowBrGrZones_m_BGrid[18] //                                                                         
+{ 0x0F12, 0x0239  },	//awbb_LowBrGrZones_m_BGrid[19] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[20] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[21] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[22] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_LowBrGrZones_m_BGrid[23] //                                                                         
+                        
+{ 0x0F12, 0x0006  },	//awbb_LowBrGrZones_m_Gridstep //	                                                                        
+{ 0x002A, 0x0D18  },                                     
+{ 0x0F12, 0x00AE  },	//awbb_LowBrGrZones_m_Boff //
+                        
+{ 0x002A, 0x0CA4  },    
+{ 0x0F12, 0x026E  },	//0294//0286//02C2//awbb_OutdoorGrZones_m_BGrid[0] // 		                                                                        
+{ 0x0F12, 0x02A4  },	//02CB//02BD//02E0//awbb_OutdoorGrZones_m_BGrid[1] //                                                                         
+{ 0x0F12, 0x0262  },	//027A//026C//0278//awbb_OutdoorGrZones_m_BGrid[2] //                                                                         
+{ 0x0F12, 0x02A8  },	//02D7//02C9//02BC//awbb_OutdoorGrZones_m_BGrid[3] //                                                                         
+{ 0x0F12, 0x0256  },	//0266//0258//025A//awbb_OutdoorGrZones_m_BGrid[4] //                                                                         
+{ 0x0F12, 0x02AE  },	//02BF//02B1//02A2//awbb_OutdoorGrZones_m_BGrid[5] //                                                                         
+{ 0x0F12, 0x0248  },	//0252//0244//024A//awbb_OutdoorGrZones_m_BGrid[6] //                                                                         
+{ 0x0F12, 0x02A4  },	//02A8//029A//0288//awbb_OutdoorGrZones_m_BGrid[7] //                                                                         
+{ 0x0F12, 0x023E  },	//023E//0230//0240//awbb_OutdoorGrZones_m_BGrid[8] //                                                                         
+{ 0x0F12, 0x029A  },	//028F//0281//0278//awbb_OutdoorGrZones_m_BGrid[9] //                                                                         
+{ 0x0F12, 0x023A  },	//0239//022B//023E//awbb_OutdoorGrZones_m_BGrid[10] //                                                                        
+{ 0x0F12, 0x0290  },	//027A//026C//0254//awbb_OutdoorGrZones_m_BGrid[11] //                                                                        
+{ 0x0F12, 0x023A  },	//024A//023C//0000//awbb_OutdoorGrZones_m_BGrid[12] //                                                                        
+{ 0x0F12, 0x027E  },	//0260//0252//0000//awbb_OutdoorGrZones_m_BGrid[13] //                                                                        
+{ 0x0F12, 0x0244  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[14] //                                                                        
+{ 0x0F12, 0x0266  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[15] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[16] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[17] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[18] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[19] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[20] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[21] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[22] //                                                                        
+{ 0x0F12, 0x0000  },	//0000//0000//0000//awbb_OutdoorGrZones_m_BGrid[23] //                                                                        
+                  
+{ 0x0F12, 0x0004  },	//awbb_OutdoorGrZones_m_Gridstep //               
+{ 0x002A, 0x0CD8  },
+{ 0x0F12, 0x0008  },
+{ 0x002A, 0x0CDC  },                                                          
+{ 0x0F12, 0x0204  },	//awbb_OutdoorGrZones_m_Boff //                   
+{ 0x002A, 0x0D1C  },                                                          
+{ 0x0F12, 0x037C  },	//awbb_CrclLowT_R_c //                            
+{ 0x002A, 0x0D20  },                                                          
+{ 0x0F12, 0x0157  },	//awbb_CrclLowT_B_c //                            
+{ 0x002A, 0x0D24  },                                                          
+{ 0x0F12, 0x3EB8  },	//awbb_CrclLowT_Rad_c //                          
+                        
+{ 0x002A, 0x0D2C  },    
+{ 0x0F12, 0x013D  },	//awbb_IntcR //	                                                                        
+{ 0x0F12, 0x011E  },	//awbb_IntcB //                                                                        
+{ 0x002A, 0x0D46  },    
+{ 0x0F12, 0x04C0  },	//0554//055D//0396//04A2//awbb_MvEq_RBthresh //	                                                                        
+                        
+                        
+                        
+{ 0x002A, 0x0D28  },    //wp outdoor
+{ 0x0F12, 0x0270  },	                                                                        
+{ 0x0F12, 0x0240  },	                                                                        
+                        
+                  
+{ 0x002A, 0x0D5C  },    
+{ 0x0F12, 0x7FFF  },	                                                                        
+{ 0x0F12, 0x0050  },	                                                                        
+                        
+{ 0x002A, 0x2316  },    
+{ 0x0F12, 0x0006  },	                                                                        
+                        
+{ 0x002A, 0x0E44  },    
+{ 0x0F12, 0x0525  },	                                                                        
+{ 0x0F12, 0x0400  },	                                                                        
+{ 0x0F12, 0x078C  },	                                                                        
+                        
+{ 0x002A, 0x0E36  },    
+{ 0x0F12, 0x0028  },	 //R OFFSET                                                                       
+{ 0x0F12, 0xFFD8  },	 //B OFFSET                                                                       
+{ 0x0F12, 0x0000  },	 //G OFFSET                                                                       
+                        
+{ 0x002A, 0x0DD4  },    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[0] //        	                                                                        
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[1] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[2] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[3] //    
+{ 0x0F12, 0xFFF0  },	//awbb_GridCorr_R[4] //    
+{ 0x0F12, 0x0080  },	//awbb_GridCorr_R[5] //    
+                   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[6] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[7] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[8] //    
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[9] //    
+{ 0x0F12, 0xFFF0  },	//awbb_GridCorr_R[10] //   
+{ 0x0F12, 0x0080  },	//awbb_GridCorr_R[11] //   
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[12] //   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[13] //   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[14] //   
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_R[15] //   
+{ 0x0F12, 0xFFF0  },	//awbb_GridCorr_R[16] //   
+{ 0x0F12, 0x0080  },	//awbb_GridCorr_R[17] //   
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[0] ////                                                                        
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[1] //                                                                          
+{ 0x0F12, 0x0032  },	//awbb_GridCorr_B[2] //                                                                          
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[3] //                                                                          
+{ 0x0F12, 0x0020  },	//awbb_GridCorr_B[4] //                                                                          
+{ 0x0F12, 0xFFC0  },	//awbb_GridCorr_B[5] //                                                                          
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[6] //                                                                          
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[7] //                                                                          
+{ 0x0F12, 0x0032  },	//awbb_GridCorr_B[8] //                                                                          
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[9] //                                                                          
+{ 0x0F12, 0x0020  },	//awbb_GridCorr_B[10] //                                                                         
+{ 0x0F12, 0xFFC0  },	//awbb_GridCorr_B[11] //                                                                         
+                  
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[12] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[13] //                                                                         
+{ 0x0F12, 0x0032  },	//awbb_GridCorr_B[14] //                                                                         
+{ 0x0F12, 0x0000  },	//awbb_GridCorr_B[15] //                                                                         
+{ 0x0F12, 0x0020  },	//awbb_GridCorr_B[16] //   
+{ 0x0F12, 0xFFC0  },	//awbb_GridCorr_B[17] //                 
+                   
+{ 0x0F12, 0x02D9  },	//awbb_GridConst_1[0] //                                                                     
+{ 0x0F12, 0x0357  },	//awbb_GridConst_1[1] //                                                                     
+{ 0x0F12, 0x03D1  },	//awbb_GridConst_1[2] //                                                                     
+                   
+                   
+{ 0x0F12, 0x0DF6  },	//0E4F//0DE9//0DE9//awbb_GridConst_2[0] //                                                   
+{ 0x0F12, 0x0ED8  },	//0EDD//0EDD//0EDD//awbb_GridConst_2[1] //                                                   
+{ 0x0F12, 0x0F51  },	//0F42//0F42//0F42//awbb_GridConst_2[2] //                                                   
+{ 0x0F12, 0x0F5C  },	//0F4E//0F4E//0F54//awbb_GridConst_2[3] //                                                   
+{ 0x0F12, 0x0F8F  },	//0F99//0F99//0FAE//awbb_GridConst_2[4] //                                                   
+{ 0x0F12, 0x1006  },	//1006//1006//1011//awbb_GridConst_2[5] //                                                   
+                   
+{ 0x0F12, 0x00AC  },	//00BA//awbb_GridCoeff_R_1                                                                   
+{ 0x0F12, 0x00BD  },	//00AF//awbb_GridCoeff_B_1                                                                   
+{ 0x0F12, 0x0049  },	//0049//awbb_GridCoeff_R_2                                                                   
+{ 0x0F12, 0x00F5  },	//00F5//awbb_GridCoeff_B_2                                                                   
+                   
+{ 0x002A, 0x0E4A  },                         
+{ 0x0F12, 0x0002  },	//awbb_GridEnable//                                                                          
+                   
+{ 0x002A, 0x051A  },                         
+{ 0x0F12, 0x010E  },	//lt_uLimitHigh//
+{ 0x0F12, 0x00F5  },	//lt_uLimitLow// 
+                   
+                   
+{ 0x002A, 0x0F76  },                         
+{ 0x0F12, 0x0007  },	//ae_statmode BLC off : 0x0F, on : 0x0D//  illumType On : 07 , Off : 0F
+                   
+{ 0x002A, 0x1034  },                         
+{ 0x0F12, 0x00C0  },	//saRR_IllumType[0] //                                                                       
+{ 0x0F12, 0x00E0  },	//saRR_IllumType[1] //                                                                       
+{ 0x0F12, 0x0104  },	//saRR_IllumType[2] //                                                                       
+{ 0x0F12, 0x0129  },	//saRR_IllumType[3] //                                                                       
+{ 0x0F12, 0x0156  },	//saRR_IllumType[4] //                                                                       
+{ 0x0F12, 0x017F  },	//saRR_IllumType[5] //                                                                       
+{ 0x0F12, 0x018F  },	//saRR_IllumType[6] //                                                                       
+                   
+                   
+{ 0x0F12, 0x0120  },	//saRR_IllumTypeF[0] //                                                                      
+{ 0x0F12, 0x0120  },	//saRR_IllumTypeF[1] //                                                                      
+{ 0x0F12, 0x0120  },	//saRR_IllumTypeF[2] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[3] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[4] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[5] //                                                                      
+{ 0x0F12, 0x0100  },	//saRR_IllumTypeF[6] //                                                                      
+                        
+                        
+                        
+{ 0x002A, 0x3288  },	//saRR_usDualGammaLutRGBIndoor  //               	                                                                        
+{ 0x0F12, 0x0000  }, //	saRR_usDualGammaLutRGBIndoor[0] //[0] //                                                 
+{ 0x0F12, 0x0008  }, //  saRR_usDualGammaLutRGBIndoor[0] //[1] //                                                       
+{ 0x0F12, 0x0013  }, //  saRR_usDualGammaLutRGBIndoor[0] //[2] //                                                       
+{ 0x0F12, 0x002C  }, //  saRR_usDualGammaLutRGBIndoor[0] //[3] //                                                       
+{ 0x0F12, 0x0062  }, //  saRR_usDualGammaLutRGBIndoor[0] //[4] //                                                       
+{ 0x0F12, 0x00CD  }, //  saRR_usDualGammaLutRGBIndoor[0] //[5] //                                                       
+{ 0x0F12, 0x0129  }, //  saRR_usDualGammaLutRGBIndoor[0] //[6] //                                                       
+{ 0x0F12, 0x0151  }, //  saRR_usDualGammaLutRGBIndoor[0] //[7] //                                                       
+{ 0x0F12, 0x0174  }, //  saRR_usDualGammaLutRGBIndoor[0] //[8] //                                                       
+{ 0x0F12, 0x01AA  }, //  saRR_usDualGammaLutRGBIndoor[0] //[9] //                                                       
+{ 0x0F12, 0x01D7  }, //  saRR_usDualGammaLutRGBIndoor[0] //[10] //                                                      
+{ 0x0F12, 0x01FE  }, //  saRR_usDualGammaLutRGBIndoor[0] //[11] //                                                      
+{ 0x0F12, 0x0221  }, //  saRR_usDualGammaLutRGBIndoor[0] //[12] //                                                      
+{ 0x0F12, 0x025D  }, //  saRR_usDualGammaLutRGBIndoor[0] //[13] //                                                      
+{ 0x0F12, 0x0291  }, //  saRR_usDualGammaLutRGBIndoor[0] //[14] //                                                      
+{ 0x0F12, 0x02EB  }, //  saRR_usDualGammaLutRGBIndoor[0] //[15] //                                                      
+{ 0x0F12, 0x033A  }, //  saRR_usDualGammaLutRGBIndoor[0] //[16] //                                                      
+{ 0x0F12, 0x0380  }, //  saRR_usDualGammaLutRGBIndoor[0] //[17] //                                                      
+{ 0x0F12, 0x03C2  }, //  saRR_usDualGammaLutRGBIndoor[0] //[18] //                                                      
+{ 0x0F12, 0x03FF  }, //  saRR_usDualGammaLutRGBIndoor[0] //[19] //                                                      
+{ 0x0F12, 0x0000  }, //  saRR_usDualGammaLutRGBIndoor[1] //[0] //                                                       
+{ 0x0F12, 0x0008  }, //  saRR_usDualGammaLutRGBIndoor[1] //[1] //                                                       
+{ 0x0F12, 0x0013  }, //  saRR_usDualGammaLutRGBIndoor[1] //[2] //                                                       
+{ 0x0F12, 0x002C  }, //  saRR_usDualGammaLutRGBIndoor[1] //[3] //                                                       
+{ 0x0F12, 0x0062  }, //  saRR_usDualGammaLutRGBIndoor[1] //[4] //                                                       
+{ 0x0F12, 0x00CD  }, //  saRR_usDualGammaLutRGBIndoor[1] //[5] //                                                       
+{ 0x0F12, 0x0129  }, //  saRR_usDualGammaLutRGBIndoor[1] //[6] //                                                       
+{ 0x0F12, 0x0151  }, //  saRR_usDualGammaLutRGBIndoor[1] //[7] //                                                       
+{ 0x0F12, 0x0174  }, //  saRR_usDualGammaLutRGBIndoor[1] //[8] //                                                       
+{ 0x0F12, 0x01AA  }, //  saRR_usDualGammaLutRGBIndoor[1] //[9] //                                                       
+{ 0x0F12, 0x01D7  }, //  saRR_usDualGammaLutRGBIndoor[1] //[10] //                                                      
+{ 0x0F12, 0x01FE  }, //  saRR_usDualGammaLutRGBIndoor[1] //[11] //                                                      
+{ 0x0F12, 0x0221  }, //  saRR_usDualGammaLutRGBIndoor[1] //[12] //                                                      
+{ 0x0F12, 0x025D  }, //  saRR_usDualGammaLutRGBIndoor[1] //[13] //                                                      
+{ 0x0F12, 0x0291  }, //  saRR_usDualGammaLutRGBIndoor[1] //[14] //                                                      
+{ 0x0F12, 0x02EB  }, //  saRR_usDualGammaLutRGBIndoor[1] //[15] //                                                      
+{ 0x0F12, 0x033A  }, //  saRR_usDualGammaLutRGBIndoor[1] //[16] //                                                      
+{ 0x0F12, 0x0380  }, //  saRR_usDualGammaLutRGBIndoor[1] //[17] //                                                      
+{ 0x0F12, 0x03C2  }, //  saRR_usDualGammaLutRGBIndoor[1] //[18] //                                                      
+{ 0x0F12, 0x03FF  }, //  saRR_usDualGammaLutRGBIndoor[1] //[19] //                                                      
+{ 0x0F12, 0x0000  }, //  saRR_usDualGammaLutRGBIndoor[2] //[0] //                                                       
+{ 0x0F12, 0x0008  }, //  saRR_usDualGammaLutRGBIndoor[2] //[1] //                                                       
+{ 0x0F12, 0x0013  }, //  saRR_usDualGammaLutRGBIndoor[2] //[2] //                                                       
+{ 0x0F12, 0x002C  }, //  saRR_usDualGammaLutRGBIndoor[2] //[3] //                                                       
+{ 0x0F12, 0x0062  }, //  saRR_usDualGammaLutRGBIndoor[2] //[4] //                                                       
+{ 0x0F12, 0x00CD  }, //  saRR_usDualGammaLutRGBIndoor[2] //[5] //                                                       
+{ 0x0F12, 0x0129  }, //  saRR_usDualGammaLutRGBIndoor[2] //[6] //                                                       
+{ 0x0F12, 0x0151  }, //  saRR_usDualGammaLutRGBIndoor[2] //[7] //                                                       
+{ 0x0F12, 0x0174  }, //  saRR_usDualGammaLutRGBIndoor[2] //[8] //                                                       
+{ 0x0F12, 0x01AA  }, //  saRR_usDualGammaLutRGBIndoor[2] //[9] //                                                       
+{ 0x0F12, 0x01D7  }, //  saRR_usDualGammaLutRGBIndoor[2] //[10] //                                                      
+{ 0x0F12, 0x01FE  }, //  saRR_usDualGammaLutRGBIndoor[2] //[11] //                                                      
+{ 0x0F12, 0x0221  }, //  saRR_usDualGammaLutRGBIndoor[2] //[12] //                                                      
+{ 0x0F12, 0x025D  }, //  saRR_usDualGammaLutRGBIndoor[2] //[13] //                                                      
+{ 0x0F12, 0x0291  }, //  saRR_usDualGammaLutRGBIndoor[2] //[14] //                                                      
+{ 0x0F12, 0x02EB  }, //  saRR_usDualGammaLutRGBIndoor[2] //[15] //                                                      
+{ 0x0F12, 0x033A  }, //  saRR_usDualGammaLutRGBIndoor[2] //[16] //                                                      
+{ 0x0F12, 0x0380  }, //  saRR_usDualGammaLutRGBIndoor[2] //[17] //                                                      
+{ 0x0F12, 0x03C2  }, //  saRR_usDualGammaLutRGBIndoor[2] //[18] //                                                      
+{ 0x0F12, 0x03FF  }, //  saRR_usDualGammaLutRGBIndoor[2] //[19] //                                                      
+                                               
+                                               
+{ 0x0F12, 0x0000  },	//			saRR_usDualGammaLutRGBOutdoor[0] //[0] //
+{ 0x0F12, 0x0008  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[1] //                                                
+{ 0x0F12, 0x0013  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[2] //                                                
+{ 0x0F12, 0x002C  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[3] //                                                
+{ 0x0F12, 0x0062  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[4] //                                                
+{ 0x0F12, 0x00CD  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[5] //                                                
+{ 0x0F12, 0x0129  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[6] //                                                
+{ 0x0F12, 0x0151  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[7] //                                                
+{ 0x0F12, 0x0174  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[8] //                                                
+{ 0x0F12, 0x01AA  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[9] //                                                
+{ 0x0F12, 0x01D7  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[10] //                                               
+{ 0x0F12, 0x01FE  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[11] //                                               
+{ 0x0F12, 0x0221  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[12] //                                               
+{ 0x0F12, 0x025D  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[13] //                                               
+{ 0x0F12, 0x0291  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[14] //                                               
+{ 0x0F12, 0x02EB  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[15] //                                               
+{ 0x0F12, 0x033A  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[16] //                                               
+{ 0x0F12, 0x0380  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[17] //                                               
+{ 0x0F12, 0x03C2  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[18] //                                               
+{ 0x0F12, 0x03FF  },	//  saRR_usDualGammaLutRGBOutdoor[0] //[19] //                                               
+{ 0x0F12, 0x0000  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[0] //                                                
+{ 0x0F12, 0x0008  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[1] //                                                
+{ 0x0F12, 0x0013  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[2] //                                                
+{ 0x0F12, 0x002C  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[3] //                                                
+{ 0x0F12, 0x0062  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[4] //                                                
+{ 0x0F12, 0x00CD  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[5] //                                                
+{ 0x0F12, 0x0129  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[6] //                                                
+{ 0x0F12, 0x0151  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[7] //                                                
+{ 0x0F12, 0x0174  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[8] //                                                
+{ 0x0F12, 0x01AA  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[9] //                                                
+{ 0x0F12, 0x01D7  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[10] //                                               
+{ 0x0F12, 0x01FE  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[11] //                                               
+{ 0x0F12, 0x0221  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[12] //                                               
+{ 0x0F12, 0x025D  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[13] //                                               
+{ 0x0F12, 0x0291  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[14] //                                               
+{ 0x0F12, 0x02EB  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[15] //                                               
+{ 0x0F12, 0x033A  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[16] //                                               
+{ 0x0F12, 0x0380  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[17] //                                               
+{ 0x0F12, 0x03C2  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[18] //                                               
+{ 0x0F12, 0x03FF  },	//  saRR_usDualGammaLutRGBOutdoor[1] //[19] //                                               
+{ 0x0F12, 0x0000  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[0] //                                                
+{ 0x0F12, 0x0008  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[1] //                                                
+{ 0x0F12, 0x0013  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[2] //                                                
+{ 0x0F12, 0x002C  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[3] //                                                
+{ 0x0F12, 0x0062  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[4] //                                                
+{ 0x0F12, 0x00CD  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[5] //                                                
+{ 0x0F12, 0x0129  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[6] //                                                
+{ 0x0F12, 0x0151  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[7] //                                                
+{ 0x0F12, 0x0174  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[8] //                                                
+{ 0x0F12, 0x01AA  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[9] //                                                
+{ 0x0F12, 0x01D7  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[10] //                                               
+{ 0x0F12, 0x01FE  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[11] //                                               
+{ 0x0F12, 0x0221  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[12] //                                               
+{ 0x0F12, 0x025D  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[13] //                                               
+{ 0x0F12, 0x0291  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[14] //                                               
+{ 0x0F12, 0x02EB  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[15] //                                               
+{ 0x0F12, 0x033A  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[16] //                                               
+{ 0x0F12, 0x0380  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[17] //                                               
+{ 0x0F12, 0x03C2  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[18] //                                               
+{ 0x0F12, 0x03FF  },	//  saRR_usDualGammaLutRGBOutdoor[2] //[19] //                                               
+                                               
+                                               
+{ 0x002A, 0x06A6  },                           
+{ 0x0F12, 0x00C0  },	//saRR_AwbCcmCord[0] //                      
+{ 0x0F12, 0x00E0  },	//saRR_AwbCcmCord[1] //                      
+{ 0x0F12, 0x0110  },	//saRR_AwbCcmCord[2] //                      
+{ 0x0F12, 0x0139  },	//saRR_AwbCcmCord[3] //                      
+{ 0x0F12, 0x0166  },	//saRR_AwbCcmCord[4] //                      
+{ 0x0F12, 0x019F  },	//saRR_AwbCcmCord[5] //                      
+                        
+{ 0x002A, 0x33A4  },    
+{ 0x0F12, 0x0181  },	  //TVAR_wbt_pBaseCcmS[0] //                                                           
+{ 0x0F12, 0xFF88  },   //TVAR_wbt_pBaseCcmS[1] //                                                        
+{ 0x0F12, 0xFF90  },   //TVAR_wbt_pBaseCcmS[2] //                                                        
+{ 0x0F12, 0xFE6B  },   //TVAR_wbt_pBaseCcmS[3] //                                                        
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[4] //                                                        
+{ 0x0F12, 0xFF0B  },   //TVAR_wbt_pBaseCcmS[5] //                                                        
+{ 0x0F12, 0xFFDD  },   //TVAR_wbt_pBaseCcmS[6] //                                                        
+{ 0x0F12, 0xFFEE  },   //TVAR_wbt_pBaseCcmS[7] //                                                        
+{ 0x0F12, 0x01CB  },   //TVAR_wbt_pBaseCcmS[8] //                                                        
+{ 0x0F12, 0x0187  },   //TVAR_wbt_pBaseCcmS[9] //                                                        
+{ 0x0F12, 0x00A6  },   //TVAR_wbt_pBaseCcmS[10] //                                                       
+{ 0x0F12, 0xFEBE  },   //TVAR_wbt_pBaseCcmS[11] //                                                       
+{ 0x0F12, 0x021C  },   //TVAR_wbt_pBaseCcmS[12] //                                                       
+{ 0x0F12, 0xFF5F  },   //TVAR_wbt_pBaseCcmS[13] //                                                       
+{ 0x0F12, 0x0175  },   //TVAR_wbt_pBaseCcmS[14] //                                                       
+{ 0x0F12, 0xFEE7  },   //TVAR_wbt_pBaseCcmS[15] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[16] //                                                       
+{ 0x0F12, 0x00F3  },   //TVAR_wbt_pBaseCcmS[17] //                                                       
+                       
+{ 0x0F12, 0x0181  },   //TVAR_wbt_pBaseCcmS[18] //                                                       
+{ 0x0F12, 0xFF88  },   //TVAR_wbt_pBaseCcmS[19] //                                                       
+{ 0x0F12, 0xFF90  },   //TVAR_wbt_pBaseCcmS[20] //                                                       
+{ 0x0F12, 0xFE6B  },   //TVAR_wbt_pBaseCcmS[21] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[22] //                                                       
+{ 0x0F12, 0xFF0B  },   //TVAR_wbt_pBaseCcmS[23] //                                                       
+{ 0x0F12, 0xFFDD  },   //TVAR_wbt_pBaseCcmS[24] //                                                       
+{ 0x0F12, 0xFFEE  },   //TVAR_wbt_pBaseCcmS[25] //                                                       
+{ 0x0F12, 0x01CB  },   //TVAR_wbt_pBaseCcmS[26] //                                                       
+{ 0x0F12, 0x0187  },   //TVAR_wbt_pBaseCcmS[27] //                                                       
+{ 0x0F12, 0x00A6  },   //TVAR_wbt_pBaseCcmS[28] //                                                       
+{ 0x0F12, 0xFEBE  },   //TVAR_wbt_pBaseCcmS[29] //                                                       
+{ 0x0F12, 0x021C  },   //TVAR_wbt_pBaseCcmS[30] //                                                       
+{ 0x0F12, 0xFF5F  },   //TVAR_wbt_pBaseCcmS[31] //                                                       
+{ 0x0F12, 0x0175  },   //TVAR_wbt_pBaseCcmS[32] //                                                       
+{ 0x0F12, 0xFEE7  },   //TVAR_wbt_pBaseCcmS[33] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[34] //                                                       
+{ 0x0F12, 0x00F3  },   //TVAR_wbt_pBaseCcmS[35] //                                                       
+                       
+{ 0x0F12, 0x0181  },   //TVAR_wbt_pBaseCcmS[36] //                                                       
+{ 0x0F12, 0xFF88  },   //TVAR_wbt_pBaseCcmS[37] //                                                       
+{ 0x0F12, 0xFF90  },   //TVAR_wbt_pBaseCcmS[38] //                                                       
+{ 0x0F12, 0xFE6B  },   //TVAR_wbt_pBaseCcmS[39] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[40] //                                                       
+{ 0x0F12, 0xFF0B  },   //TVAR_wbt_pBaseCcmS[41] //                                                       
+{ 0x0F12, 0xFFDD  },   //TVAR_wbt_pBaseCcmS[42] //                                                       
+{ 0x0F12, 0xFFEE  },   //TVAR_wbt_pBaseCcmS[43] //                                                       
+{ 0x0F12, 0x01CB  },   //TVAR_wbt_pBaseCcmS[44] //                                                       
+{ 0x0F12, 0x0187  },   //TVAR_wbt_pBaseCcmS[45] //                                                       
+{ 0x0F12, 0x00A6  },   //TVAR_wbt_pBaseCcmS[46] //                                                       
+{ 0x0F12, 0xFEBE  },   //TVAR_wbt_pBaseCcmS[47] //                                                       
+{ 0x0F12, 0x021C  },   //TVAR_wbt_pBaseCcmS[48] //                                                       
+{ 0x0F12, 0xFF5F  },   //TVAR_wbt_pBaseCcmS[49] //                                                       
+{ 0x0F12, 0x0175  },   //TVAR_wbt_pBaseCcmS[50] //                                                       
+{ 0x0F12, 0xFEE7  },   //TVAR_wbt_pBaseCcmS[51] //                                                       
+{ 0x0F12, 0x0106  },   //TVAR_wbt_pBaseCcmS[52] //                                                       
+{ 0x0F12, 0x00F3  },   //TVAR_wbt_pBaseCcmS[53] //                                                                        
+                       
+{ 0x0F12, 0x01D4  },  //01E9 01FD 01FA   //TVAR_wbt_pBaseCcmS[54] //                                                       
+{ 0x0F12, 0xFFC3  },  //FFB7 FFAB FF9B   //TVAR_wbt_pBaseCcmS[55] //                                                       
+{ 0x0F12, 0xFFFE  },  //FFF5 FFED FFFF   //TVAR_wbt_pBaseCcmS[56] //                                                       
+{ 0x0F12, 0xFEB5  },  //FEB5 FEB5 FE9F   //TVAR_wbt_pBaseCcmS[57] //                                                       
+{ 0x0F12, 0x0112  },  //0112 0112 010F   //TVAR_wbt_pBaseCcmS[58] //                                                       
+{ 0x0F12, 0xFEDC  },  //FEDC FEDC FEF5   //TVAR_wbt_pBaseCcmS[59] //                                                       
+{ 0x0F12, 0xFFD2  },  //FFD2 FFD2 FFD2   //TVAR_wbt_pBaseCcmS[60] //                                                       
+{ 0x0F12, 0x0015  },  //0015 0015 0015   //TVAR_wbt_pBaseCcmS[61] //                                                       
+{ 0x0F12, 0x01A1  },  //01A1 01A1 01A1   //TVAR_wbt_pBaseCcmS[62] //                                                       
+{ 0x0F12, 0x0111  },  //0111 0111 0111   //TVAR_wbt_pBaseCcmS[63] //                                                       
+{ 0x0F12, 0x009D  },  //009D 009D 009D   //TVAR_wbt_pBaseCcmS[64] //                                                       
+{ 0x0F12, 0xFECB  },  //FECB FECB FECB   //TVAR_wbt_pBaseCcmS[65] //                                                       
+{ 0x0F12, 0x01FC  },  //01FC 01FC 01FC   //TVAR_wbt_pBaseCcmS[66] //                                                       
+{ 0x0F12, 0xFF99  },  //FF99 FF99 FF99   //TVAR_wbt_pBaseCcmS[67] //                                                       
+{ 0x0F12, 0x01A9  },  //01A9 01A9 01A9   //TVAR_wbt_pBaseCcmS[68] //                                                       
+{ 0x0F12, 0xFF26  },  //FF26 FF26 FF26   //TVAR_wbt_pBaseCcmS[69] //                                                       
+{ 0x0F12, 0x012B  },  //012B 012B 012B   //TVAR_wbt_pBaseCcmS[70] //                                                       
+{ 0x0F12, 0x00DF  },  //00DF 00DF 00DF   //TVAR_wbt_pBaseCcmS[71] //    
+                           
+{ 0x0F12, 0x01B9  },  //01CE 01E3 01E2   //TVAR_wbt_pBaseCcmS[72] //                                                 
+{ 0x0F12, 0xFFBC  },  //FFB0 FFA4 FF9A   //TVAR_wbt_pBaseCcmS[73] //                                                 
+{ 0x0F12, 0xFFED  },  //FFE4 FFDB FFE7   //TVAR_wbt_pBaseCcmS[74] //                                                 
+{ 0x0F12, 0xFEB5  },  //FEB5 FEB5 FE9F   //TVAR_wbt_pBaseCcmS[75] //                                                 
+{ 0x0F12, 0x0112  },  //0112 0112 010F   //TVAR_wbt_pBaseCcmS[76] //                                                 
+{ 0x0F12, 0xFEDC  },  //FEDC FEDC FEF5   //TVAR_wbt_pBaseCcmS[77] //                                                 
+{ 0x0F12, 0xFFD2  },  //FFD2 FFD2 FFD2   //TVAR_wbt_pBaseCcmS[78] //                                                 
+{ 0x0F12, 0xFFFE  },  //FFFE FFFE FFFE   //TVAR_wbt_pBaseCcmS[79] //                                                 
+{ 0x0F12, 0x01B7  },  //01B7 01B7 01B7   //TVAR_wbt_pBaseCcmS[80] //                                                 
+{ 0x0F12, 0x00E8  },  //00E8 00E8 00E8   //TVAR_wbt_pBaseCcmS[81] //                                                 
+{ 0x0F12, 0x0095  },  //0095 0095 0095   //TVAR_wbt_pBaseCcmS[82] //                                                 
+{ 0x0F12, 0xFF0D  },  //FF0D FF0D FF0D   //TVAR_wbt_pBaseCcmS[83] //                                                 
+{ 0x0F12, 0x0182  },  //0182 0182 0182   //TVAR_wbt_pBaseCcmS[84] //                                                 
+{ 0x0F12, 0xFF29  },  //FF29 FF29 FF29   //TVAR_wbt_pBaseCcmS[85] //                                                 
+{ 0x0F12, 0x0146  },  //0146 0146 0146   //TVAR_wbt_pBaseCcmS[86] //                                                 
+{ 0x0F12, 0xFF26  },  //FF26 FF26 FF26   //TVAR_wbt_pBaseCcmS[87] //                                                 
+{ 0x0F12, 0x012B  },  //012B 012B 012B   //TVAR_wbt_pBaseCcmS[88] //                                                 
+{ 0x0F12, 0x00DF  },  //00DF 00DF 00DF   //TVAR_wbt_pBaseCcmS[89] //                                                                         
+                  
+{ 0x0F12, 0x01B9  },  //01CE 01E3 01E2   //TVAR_wbt_pBaseCcmS[90] //                                                 
+{ 0x0F12, 0xFFBC  },  //FFB0 FFA4 FF9A   //TVAR_wbt_pBaseCcmS[91] //                                                 
+{ 0x0F12, 0xFFED  },  //FFE4 FFDB FFE7   //TVAR_wbt_pBaseCcmS[92] //                                                 
+{ 0x0F12, 0xFEB5  },  //FEB5 FEB5 FE9F   //TVAR_wbt_pBaseCcmS[93] //                                                 
+{ 0x0F12, 0x0112  },  //0112 0112 010F   //TVAR_wbt_pBaseCcmS[94] //                                                 
+{ 0x0F12, 0xFEDC  },  //FEDC FEDC FEF5   //TVAR_wbt_pBaseCcmS[95] //                                                 
+{ 0x0F12, 0xFFD2  },  //FFD2 FFD2 FFD2   //TVAR_wbt_pBaseCcmS[96] //                                                 
+{ 0x0F12, 0xFFFE  },  //FFFE FFFE FFFE   //TVAR_wbt_pBaseCcmS[97] //                                                 
+{ 0x0F12, 0x01B7  },  //01B7 01B7 01B7   //TVAR_wbt_pBaseCcmS[98] //                                                 
+{ 0x0F12, 0x00E8  },  //00E8 00E8 00E8   //TVAR_wbt_pBaseCcmS[99] //                                                 
+{ 0x0F12, 0x0095  },  //0095 0095 0095   //TVAR_wbt_pBaseCcmS[100] //                                                
+{ 0x0F12, 0xFF0D  },  //FF0D FF0D FF0D   //TVAR_wbt_pBaseCcmS[101] //                                                
+{ 0x0F12, 0x0182  },  //0182 0182 0182   //TVAR_wbt_pBaseCcmS[102] //                                                
+{ 0x0F12, 0xFF29  },  //FF29 FF29 FF29   //TVAR_wbt_pBaseCcmS[103] //                                                
+{ 0x0F12, 0x0146  },  //0146 0146 0146   //TVAR_wbt_pBaseCcmS[104] //                                                
+{ 0x0F12, 0xFF26  },  //FF26 FF26 FF26   //TVAR_wbt_pBaseCcmS[105] //                                                
+{ 0x0F12, 0x012B  },  //012B 012B 012B   //TVAR_wbt_pBaseCcmS[106] //                                                
+{ 0x0F12, 0x00DF  },  //00DF 00DF 00DF   //TVAR_wbt_pBaseCcmS[107] //                                                
+                                          
+{ 0x002A, 0x3380  },  //12çŸ«å¼¥åˆ©     
+{ 0x0F12, 0x01E5  },  //01E5 020E 0223   //0223  //01F3  //01F3  //TVAR_wbt_pOutdoorCcm[0] //  
+{ 0x0F12, 0xFFA0  },  //FFA0 FF88 FF7C   //FF7C  //FFA4  //FFA4  //TVAR_wbt_pOutdoorCcm[1] //  
+{ 0x0F12, 0xFFDF  },  //FFDF FFCE FFC5   //FFC5  //FFE4  //FFE4  //TVAR_wbt_pOutdoorCcm[2] //  
+{ 0x0F12, 0xFE3D  },  //FE3D FE3D FE3D   //FE3D  //FE3D  //FE23  //TVAR_wbt_pOutdoorCcm[3] //  
+{ 0x0F12, 0x0158  },  //0158 0158 0158   //0158  //0158  //017D  //TVAR_wbt_pOutdoorCcm[4] //  
+{ 0x0F12, 0xFF03  },  //FF03 FF03 FF03   //FF03  //FF03  //FEF9  //TVAR_wbt_pOutdoorCcm[5] //  
+{ 0x0F12, 0xFFD2  },  //FFBB FF99 FF9F   //FF9F  //FF9F  //FF9F  //TVAR_wbt_pOutdoorCcm[6] //  
+{ 0x0F12, 0x0002  },  //FFF0 0018 0011   //0011  //0011  //0011  //TVAR_wbt_pOutdoorCcm[7] //  
+{ 0x0F12, 0x0211  },  //023A 0235 0237   //0237  //0237  //0237  //TVAR_wbt_pOutdoorCcm[8] //  
+{ 0x0F12, 0x00F6  },  //00EB 0101 00EB   //00D1  //012A  //0143  //TVAR_wbt_pOutdoorCcm[9] //  
+{ 0x0F12, 0x0120  },  //012A 0116 012A   //0125  //00CA  //00F6  //TVAR_wbt_pOutdoorCcm[10] // 
+{ 0x0F12, 0xFF01  },  //FF02 FF00 FF02   //FEF5  //FEF6  //FEB1  //TVAR_wbt_pOutdoorCcm[11] // 
+{ 0x0F12, 0x01A4  },  //01A4 01C5 01C5   //01C5  //01C5  //01C5  //TVAR_wbt_pOutdoorCcm[12] // 
+{ 0x0F12, 0xFF95  },  //FF95 FF80 FF80   //FF80  //FF80  //FF80  //TVAR_wbt_pOutdoorCcm[13] // 
+{ 0x0F12, 0x01A9  },  //01A9 019D 019D   //019D  //019D  //019D  //TVAR_wbt_pOutdoorCcm[14] // 
+{ 0x0F12, 0xFEA3  },  //FE7A FE7A FE7A   //FE7A  //FE7A  //FE7A  //TVAR_wbt_pOutdoorCcm[15] // 
+{ 0x0F12, 0x0164  },  //0179 0179 0179   //0179  //0179  //0179  //TVAR_wbt_pOutdoorCcm[16] // 
+{ 0x0F12, 0x0164  },  //0179 0179 0179   //0179  //0179  //0179  //TVAR_wbt_pOutdoorCcm[17] // 
+                      
+                           
+                           
+{ 0x002A, 0x0764  },       
+{ 0x0F12, 0x0049  },	//afit_uNoiseIndInDoor[0] //                                                                         
+{ 0x0F12, 0x005F  },	//afit_uNoiseIndInDoor[1] //                                                                         
+{ 0x0F12, 0x00CB  },	//afit_uNoiseIndInDoor[2] // 203//                                                                   
+{ 0x0F12, 0x01E0  },	//afit_uNoiseIndInDoor[3] // Indoor_NB below 1500 _Noise index 300-400d //                           
+{ 0x0F12, 0x0220  },	//afit_uNoiseIndInDoor[4] // DNP NB 4600 _ Noisenidex :560d-230h //                                  
+                           
+                           
+{ 0x002A, 0x07C4  },       
+{ 0x0F12, 0x0014  },	//700007C4 //TVAR_afit_pBaseValS[0] // AFIT16_BRIGHTNESS                                                                                  
+{ 0x0F12, 0x0000  },	//700007C6 //TVAR_afit_pBaseValS[1] // AFIT16_CONTRAST                                                                                    
+{ 0x0F12, 0x0014  },	//700007C8 //TVAR_afit_pBaseValS[2] // AFIT16_SATURATION                                                                                  
+{ 0x0F12, 0x0000  },	//700007CA //TVAR_afit_pBaseValS[3] // AFIT16_SHARP_BLUR                                                                                  
+{ 0x0F12, 0x0000  },	//700007CC //TVAR_afit_pBaseValS[4] // AFIT16_GLAMOUR                                                                                     
+{ 0x0F12, 0x00C1  },	//700007CE //TVAR_afit_pBaseValS[5] // AFIT16_sddd8a_edge_high                                                                            
+{ 0x0F12, 0x03FF  },	//700007D0 //TVAR_afit_pBaseValS[6] // AFIT16_Demosaicing_iSatVal                                                                         
+{ 0x0F12, 0x009C  },	//700007D2 //TVAR_afit_pBaseValS[7] // AFIT16_Sharpening_iReduceEdgeThresh                                                                
+{ 0x0F12, 0x0251  },	//700007D4 //TVAR_afit_pBaseValS[8] // AFIT16_demsharpmix1_iRGBOffset                                                                     
+{ 0x0F12, 0x03FF  },	//700007D6 //TVAR_afit_pBaseValS[9] // AFIT16_demsharpmix1_iDemClamp                                                                      
+{ 0x0F12, 0x000C  },	//700007D8 //TVAR_afit_pBaseValS[10] //AFIT16_demsharpmix1_iLowThreshold                                                                  
+{ 0x0F12, 0x0010  },	//700007DA //TVAR_afit_pBaseValS[11] //AFIT16_demsharpmix1_iHighThreshold                                                                 
+{ 0x0F12, 0x012C  },	//700007DC //TVAR_afit_pBaseValS[12] //AFIT16_demsharpmix1_iLowBright                                                                     
+{ 0x0F12, 0x03E8  },	//700007DE //TVAR_afit_pBaseValS[13] //AFIT16_demsharpmix1_iHighBright                                                                    
+{ 0x0F12, 0x0046  },	//700007E0 //TVAR_afit_pBaseValS[14] //AFIT16_demsharpmix1_iLowSat                                                                        
+{ 0x0F12, 0x005A  },	//700007E2 //TVAR_afit_pBaseValS[15] //AFIT16_demsharpmix1_iHighSat                                                                       
+{ 0x0F12, 0x0070  },	//700007E4 //TVAR_afit_pBaseValS[16] //AFIT16_demsharpmix1_iTune                                                                          
+{ 0x0F12, 0x0000  },	//700007E6 //TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0000  },	//700007E8 //TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh                                                                    
+{ 0x0F12, 0x01AA  },	//700007EA //TVAR_afit_pBaseValS[19] //AFIT16_demsharpmix1_iHystCenter                                                                    
+{ 0x0F12, 0x003C  },	//700007EC //TVAR_afit_pBaseValS[20] //AFIT16_YUV422_DENOISE_iUVLowThresh                                                                 
+{ 0x0F12, 0x003C  },	//700007EE //TVAR_afit_pBaseValS[21] //AFIT16_YUV422_DENOISE_iUVHighThresh                                                                
+{ 0x0F12, 0x0000  },	//700007F0 //TVAR_afit_pBaseValS[22] //AFIT16_YUV422_DENOISE_iYLowThresh                                                                  
+{ 0x0F12, 0x0000  },	//700007F2 //TVAR_afit_pBaseValS[23] //AFIT16_YUV422_DENOISE_iYHighThresh                                                                 
+{ 0x0F12, 0x003E  },	//700007F4 //TVAR_afit_pBaseValS[24] //AFIT16_Sharpening_iLowSharpClamp                                                                   
+{ 0x0F12, 0x0008  },	//700007F6 //TVAR_afit_pBaseValS[25] //AFIT16_Sharpening_iHighSharpClamp                                                                  
+{ 0x0F12, 0x003C  },	//700007F8 //TVAR_afit_pBaseValS[26] //AFIT16_Sharpening_iLowSharpClamp_Bin                                                               
+{ 0x0F12, 0x001E  },	//700007FA //TVAR_afit_pBaseValS[27] //AFIT16_Sharpening_iHighSharpClamp_Bin                                                              
+{ 0x0F12, 0x003C  },	//700007FC //TVAR_afit_pBaseValS[28] //AFIT16_Sharpening_iLowSharpClamp_sBin                                                              
+{ 0x0F12, 0x001E  },	//700007FE //TVAR_afit_pBaseValS[29] //AFIT16_Sharpening_iHighSharpClamp_sBin                                                             
+{ 0x0F12, 0x0A24  },	//70000800 //TVAR_afit_pBaseValS[30] //AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                     
+{ 0x0F12, 0x1701  },	//70000802 //TVAR_afit_pBaseValS[31] //AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                      
+{ 0x0F12, 0x0229  },	//70000804 //TVAR_afit_pBaseValS[32] //AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                            
+{ 0x0F12, 0x1403  },	//70000806 //TVAR_afit_pBaseValS[33] //AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                 
+{ 0x0F12, 0x0000  },	//70000808 //TVAR_afit_pBaseValS[34] //AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                               
+{ 0x0F12, 0x0000  },	//7000080A //TVAR_afit_pBaseValS[35] //AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                             
+{ 0x0F12, 0x0000  },	//7000080C //TVAR_afit_pBaseValS[36] //AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                              
+{ 0x0F12, 0x00FF  },	//7000080E //TVAR_afit_pBaseValS[37] //AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                       
+{ 0x0F12, 0x045A  },	//70000810 //TVAR_afit_pBaseValS[38] //AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                                
+{ 0x0F12, 0x1414  },	//70000812 //TVAR_afit_pBaseValS[39] //AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                  
+{ 0x0F12, 0x0301  },	//70000814 //TVAR_afit_pBaseValS[40] //AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                          
+{ 0x0F12, 0xFF07  },	//70000816 //TVAR_afit_pBaseValS[41] //AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                          
+{ 0x0F12, 0x081E  },	//70000818 //TVAR_afit_pBaseValS[42] //AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                     
+{ 0x0F12, 0x0A14  },	//7000081A //TVAR_afit_pBaseValS[43] //AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                        
+{ 0x0F12, 0x0F0F  },	//7000081C //TVAR_afit_pBaseValS[44] //AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                    
+{ 0x0F12, 0x0A00  },	//7000081E //TVAR_afit_pBaseValS[45] //AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                 
+{ 0x0F12, 0x0032  },	//70000820 //TVAR_afit_pBaseValS[46] //AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                             
+{ 0x0F12, 0x000E  },	//70000822 //TVAR_afit_pBaseValS[47] //AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                             
+{ 0x0F12, 0x0002  },	//70000824 //TVAR_afit_pBaseValS[48] //AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                      
+{ 0x0F12, 0x00FF  },	//70000826 //TVAR_afit_pBaseValS[49] //AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                     
+{ 0x0F12, 0x1102  },	//70000828 //TVAR_afit_pBaseValS[50] //AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                          
+{ 0x0F12, 0x001B  },	//7000082A //TVAR_afit_pBaseValS[51] //AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                            
+{ 0x0F12, 0x0900  },	//7000082C //TVAR_afit_pBaseValS[52] //AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                       
+{ 0x0F12, 0x0600  },	//7000082E //TVAR_afit_pBaseValS[53] //AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                      
+{ 0x0F12, 0x0504  },	//70000830 //TVAR_afit_pBaseValS[54] //AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                   
+{ 0x0F12, 0x0306  },	//70000832 //TVAR_afit_pBaseValS[55] //AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                      
+{ 0x0F12, 0x4603  },	//70000834 //TVAR_afit_pBaseValS[56] //AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                       
+{ 0x0F12, 0x0480  },	//70000836 //TVAR_afit_pBaseValS[57] //AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                              
+{ 0x0F12, 0x003C  },	//70000838 //TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                  
+{ 0x0F12, 0x0080  },	//7000083A //TVAR_afit_pBaseValS[59] //AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                   
+{ 0x0F12, 0x0101  },	//7000083C //TVAR_afit_pBaseValS[60] //AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                             
+{ 0x0F12, 0x0707  },	//7000083E //TVAR_afit_pBaseValS[61] //AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                                
+{ 0x0F12, 0x4601  },	//70000840 //TVAR_afit_pBaseValS[62] //AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                 
+{ 0x0F12, 0x4944  },	//70000842 //TVAR_afit_pBaseValS[63] //AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                                
+{ 0x0F12, 0x5044  },	//70000844 //TVAR_afit_pBaseValS[64] //AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                            
+{ 0x0F12, 0x0500  },	//70000846 //TVAR_afit_pBaseValS[65] //AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]             
+{ 0x0F12, 0x0003  },	//70000848 //TVAR_afit_pBaseValS[66] //AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                   
+{ 0x0F12, 0x5400  },	//7000084A //TVAR_afit_pBaseValS[67] //AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                 
+{ 0x0F12, 0x0714  },	//7000084C //TVAR_afit_pBaseValS[68] //AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]           
+{ 0x0F12, 0x32FF  },	//7000084E //TVAR_afit_pBaseValS[69] //AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                        
+{ 0x0F12, 0x5A04  },	//70000850 //TVAR_afit_pBaseValS[70] //AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                     
+{ 0x0F12, 0x201E  },	//70000852 //TVAR_afit_pBaseValS[71] //AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                     
+{ 0x0F12, 0x4012  },	//70000854 //TVAR_afit_pBaseValS[72] //AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]                
+{ 0x0F12, 0x0204  },	//70000856 //TVAR_afit_pBaseValS[73] //AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]                
+{ 0x0F12, 0x1403  },	//70000858 //TVAR_afit_pBaseValS[74] //AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                  
+{ 0x0F12, 0x0114  },	//7000085A //TVAR_afit_pBaseValS[75] //AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                      
+{ 0x0F12, 0x0101  },	//7000085C //TVAR_afit_pBaseValS[76] //AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                       
+{ 0x0F12, 0x4446  },	//7000085E //TVAR_afit_pBaseValS[77] //AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                           
+{ 0x0F12, 0x646E  },	//70000860 //TVAR_afit_pBaseValS[78] //AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                     
+{ 0x0F12, 0x0028  },	//70000862 //TVAR_afit_pBaseValS[79] //AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]             
+{ 0x0F12, 0x030A  },	//70000864 //TVAR_afit_pBaseValS[80] //AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]       
+{ 0x0F12, 0x0000  },	//70000866 //TVAR_afit_pBaseValS[81] //AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]          
+{ 0x0F12, 0x141E  },	//70000868 //TVAR_afit_pBaseValS[82] //AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]          
+{ 0x0F12, 0xFF07  },	//7000086A //TVAR_afit_pBaseValS[83] //AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]       
+{ 0x0F12, 0x0432  },	//7000086C //TVAR_afit_pBaseValS[84] //AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]              
+{ 0x0F12, 0x0000  },	//7000086E //TVAR_afit_pBaseValS[85] //AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]            
+{ 0x0F12, 0x0F0F  },	//70000870 //TVAR_afit_pBaseValS[86] //AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]              
+{ 0x0F12, 0x0440  },	//70000872 //TVAR_afit_pBaseValS[87] //AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]       
+{ 0x0F12, 0x0302  },	//70000874 //TVAR_afit_pBaseValS[88] //AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]       
+{ 0x0F12, 0x1414  },	//70000876 //TVAR_afit_pBaseValS[89] //AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                   
+{ 0x0F12, 0x0101  },	//70000878 //TVAR_afit_pBaseValS[90] //AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                      
+{ 0x0F12, 0x4601  },	//7000087A //TVAR_afit_pBaseValS[91] //AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                       
+{ 0x0F12, 0x6E44  },	//7000087C //TVAR_afit_pBaseValS[92] //AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                      
+{ 0x0F12, 0x2864  },	//7000087E //TVAR_afit_pBaseValS[93] //AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                  
+{ 0x0F12, 0x0A00  },	//70000880 //TVAR_afit_pBaseValS[94] //AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]    
+{ 0x0F12, 0x0003  },	//70000882 //TVAR_afit_pBaseValS[95] //AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]        
+{ 0x0F12, 0x1E00  },	//70000884 //TVAR_afit_pBaseValS[96] //AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]       
+{ 0x0F12, 0x0714  },	//70000886 //TVAR_afit_pBaseValS[97] //AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8]  
+{ 0x0F12, 0x32FF  },	//70000888 //TVAR_afit_pBaseValS[98] //AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]              
+{ 0x0F12, 0x0004  },	//7000088A //TVAR_afit_pBaseValS[99] //AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]           
+{ 0x0F12, 0x0F00  },	//7000088C //TVAR_afit_pBaseValS[100] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x400F  },	//7000088E //TVAR_afit_pBaseValS[101] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000890 //TVAR_afit_pBaseValS[102] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000892 //TVAR_afit_pBaseValS[103] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000894 //TVAR_afit_pBaseValS[104] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000896 //TVAR_afit_pBaseValS[105] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0014  },	//70000898 //TVAR_afit_pBaseValS[106] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//7000089A //TVAR_afit_pBaseValS[107] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//7000089C //TVAR_afit_pBaseValS[108] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//7000089E //TVAR_afit_pBaseValS[109] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//700008A0 //TVAR_afit_pBaseValS[110] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//700008A2 //TVAR_afit_pBaseValS[111] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//700008A4 //TVAR_afit_pBaseValS[112] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//700008A6 //TVAR_afit_pBaseValS[113] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//700008A8 //TVAR_afit_pBaseValS[114] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//700008AA //TVAR_afit_pBaseValS[115] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x012C  },	//700008AC //TVAR_afit_pBaseValS[116] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x03E8  },	//700008AE //TVAR_afit_pBaseValS[117] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0046  },	//700008B0 //TVAR_afit_pBaseValS[118] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x005A  },	//700008B2 //TVAR_afit_pBaseValS[119] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//700008B4 //TVAR_afit_pBaseValS[120] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//700008B6 //TVAR_afit_pBaseValS[121] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//700008B8 //TVAR_afit_pBaseValS[122] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x01AE  },	//700008BA //TVAR_afit_pBaseValS[123] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x001E  },	//700008BC //TVAR_afit_pBaseValS[124] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x001E  },	//700008BE //TVAR_afit_pBaseValS[125] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//700008C0 //TVAR_afit_pBaseValS[126] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//700008C2 //TVAR_afit_pBaseValS[127] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x003E  },	//700008C4 //TVAR_afit_pBaseValS[128] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0008  },	//700008C6 //TVAR_afit_pBaseValS[129] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x003C  },	//700008C8 //TVAR_afit_pBaseValS[130] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x001E  },	//700008CA //TVAR_afit_pBaseValS[131] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x003C  },	//700008CC //TVAR_afit_pBaseValS[132] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x001E  },	//700008CE //TVAR_afit_pBaseValS[133] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//700008D0 //TVAR_afit_pBaseValS[134] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//700008D2 //TVAR_afit_pBaseValS[135] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//700008D4 //TVAR_afit_pBaseValS[136] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x1403  },	//700008D6 //TVAR_afit_pBaseValS[137] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x0000  },	//700008D8 //TVAR_afit_pBaseValS[138] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0000  },	//700008DA //TVAR_afit_pBaseValS[139] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0000  },	//700008DC //TVAR_afit_pBaseValS[140] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//700008DE //TVAR_afit_pBaseValS[141] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x045A  },	//700008E0 //TVAR_afit_pBaseValS[142] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//700008E2 //TVAR_afit_pBaseValS[143] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//700008E4 //TVAR_afit_pBaseValS[144] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//700008E6 //TVAR_afit_pBaseValS[145] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x081E  },	//700008E8 //TVAR_afit_pBaseValS[146] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A14  },	//700008EA //TVAR_afit_pBaseValS[147] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0F0F  },	//700008EC //TVAR_afit_pBaseValS[148] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A00  },	//700008EE //TVAR_afit_pBaseValS[149] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x0032  },	//700008F0 //TVAR_afit_pBaseValS[150] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x000E  },	//700008F2 //TVAR_afit_pBaseValS[151] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0002  },	//700008F4 //TVAR_afit_pBaseValS[152] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//700008F6 //TVAR_afit_pBaseValS[153] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1102  },	//700008F8 //TVAR_afit_pBaseValS[154] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001B  },	//700008FA //TVAR_afit_pBaseValS[155] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//700008FC //TVAR_afit_pBaseValS[156] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//700008FE //TVAR_afit_pBaseValS[157] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//70000900 //TVAR_afit_pBaseValS[158] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0306  },	//70000902 //TVAR_afit_pBaseValS[159] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x4603  },	//70000904 //TVAR_afit_pBaseValS[160] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0480  },	//70000906 //TVAR_afit_pBaseValS[161] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0046  },	//70000908 //TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//7000090A //TVAR_afit_pBaseValS[163] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x0101  },	//7000090C //TVAR_afit_pBaseValS[164] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0707  },	//7000090E //TVAR_afit_pBaseValS[165] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x1E01  },	//70000910 //TVAR_afit_pBaseValS[166] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x491E  },	//70000912 //TVAR_afit_pBaseValS[167] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /
+{ 0x0F12, 0x5044  },	//70000914 //TVAR_afit_pBaseValS[168] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0500  },	//70000916 //TVAR_afit_pBaseValS[169] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x0004  },	//70000918 //TVAR_afit_pBaseValS[170] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /
+{ 0x0F12, 0x3C0A  },	//7000091A //TVAR_afit_pBaseValS[171] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x0714  },	//7000091C //TVAR_afit_pBaseValS[172] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /
+{ 0x0F12, 0x3214  },	//7000091E //TVAR_afit_pBaseValS[173] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x5A03  },	//70000920 //TVAR_afit_pBaseValS[174] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x121E  },	//70000922 //TVAR_afit_pBaseValS[175] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//70000924 //TVAR_afit_pBaseValS[176] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//70000926 //TVAR_afit_pBaseValS[177] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x1E06  },	//70000928 //TVAR_afit_pBaseValS[178] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x011E  },	//7000092A //TVAR_afit_pBaseValS[179] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//7000092C //TVAR_afit_pBaseValS[180] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x3A3C  },	//7000092E //TVAR_afit_pBaseValS[181] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x585A  },	//70000930 //TVAR_afit_pBaseValS[182] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000932 //TVAR_afit_pBaseValS[183] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000934 //TVAR_afit_pBaseValS[184] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0000  },	//70000936 //TVAR_afit_pBaseValS[185] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x141E  },	//70000938 //TVAR_afit_pBaseValS[186] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF07  },	//7000093A //TVAR_afit_pBaseValS[187] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//7000093C //TVAR_afit_pBaseValS[188] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x0000  },	//7000093E //TVAR_afit_pBaseValS[189] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x0F0F  },	//70000940 //TVAR_afit_pBaseValS[190] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000942 //TVAR_afit_pBaseValS[191] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000944 //TVAR_afit_pBaseValS[192] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x1E1E  },	//70000946 //TVAR_afit_pBaseValS[193] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000948 //TVAR_afit_pBaseValS[194] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x3C01  },	//7000094A //TVAR_afit_pBaseValS[195] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x5A3A  },	//7000094C //TVAR_afit_pBaseValS[196] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x2858  },	//7000094E //TVAR_afit_pBaseValS[197] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000950 //TVAR_afit_pBaseValS[198] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x0003  },	//70000952 //TVAR_afit_pBaseValS[199] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1E00  },	//70000954 //TVAR_afit_pBaseValS[200] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x0714  },	//70000956 //TVAR_afit_pBaseValS[201] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000958 //TVAR_afit_pBaseValS[202] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x0004  },	//7000095A //TVAR_afit_pBaseValS[203] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x0F00  },	//7000095C //TVAR_afit_pBaseValS[204] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x400F  },	//7000095E //TVAR_afit_pBaseValS[205] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000960 //TVAR_afit_pBaseValS[206] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000962 //TVAR_afit_pBaseValS[207] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000964 //TVAR_afit_pBaseValS[208] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000966 //TVAR_afit_pBaseValS[209] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0000  },	//70000968 //TVAR_afit_pBaseValS[210] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//7000096A //TVAR_afit_pBaseValS[211] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//7000096C //TVAR_afit_pBaseValS[212] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//7000096E //TVAR_afit_pBaseValS[213] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//70000970 //TVAR_afit_pBaseValS[214] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//70000972 //TVAR_afit_pBaseValS[215] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//70000974 //TVAR_afit_pBaseValS[216] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//70000976 //TVAR_afit_pBaseValS[217] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//70000978 //TVAR_afit_pBaseValS[218] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//7000097A //TVAR_afit_pBaseValS[219] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x012C  },	//7000097C //TVAR_afit_pBaseValS[220] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x03E8  },	//7000097E //TVAR_afit_pBaseValS[221] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0046  },	//70000980 //TVAR_afit_pBaseValS[222] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x005A  },	//70000982 //TVAR_afit_pBaseValS[223] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//70000984 //TVAR_afit_pBaseValS[224] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//70000986 //TVAR_afit_pBaseValS[225] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//70000988 //TVAR_afit_pBaseValS[226] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x0226  },	//7000098A //TVAR_afit_pBaseValS[227] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x001E  },	//7000098C //TVAR_afit_pBaseValS[228] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x001E  },	//7000098E //TVAR_afit_pBaseValS[229] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//70000990 //TVAR_afit_pBaseValS[230] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//70000992 //TVAR_afit_pBaseValS[231] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x004E  },	//70000994 //TVAR_afit_pBaseValS[232] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0000  },	//70000996 //TVAR_afit_pBaseValS[233] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x003C  },	//70000998 //TVAR_afit_pBaseValS[234] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x001E  },	//7000099A //TVAR_afit_pBaseValS[235] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x003C  },	//7000099C //TVAR_afit_pBaseValS[236] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x001E  },	//7000099E //TVAR_afit_pBaseValS[237] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//700009A0 //TVAR_afit_pBaseValS[238] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//700009A2 //TVAR_afit_pBaseValS[239] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//700009A4 //TVAR_afit_pBaseValS[240] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x1403  },	//700009A6 //TVAR_afit_pBaseValS[241] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x0000  },	//700009A8 //TVAR_afit_pBaseValS[242] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0000  },	//700009AA //TVAR_afit_pBaseValS[243] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0906  },	//700009AC //TVAR_afit_pBaseValS[244] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//700009AE //TVAR_afit_pBaseValS[245] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x045A  },	//700009B0 //TVAR_afit_pBaseValS[246] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//700009B2 //TVAR_afit_pBaseValS[247] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//700009B4 //TVAR_afit_pBaseValS[248] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//700009B6 //TVAR_afit_pBaseValS[249] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x081E  },	//700009B8 //TVAR_afit_pBaseValS[250] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A14  },	//700009BA //TVAR_afit_pBaseValS[251] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0F0F  },	//700009BC //TVAR_afit_pBaseValS[252] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A00  },	//700009BE //TVAR_afit_pBaseValS[253] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x0090  },	//700009C0 //TVAR_afit_pBaseValS[254] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x000A  },	//700009C2 //TVAR_afit_pBaseValS[255] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0002  },	//700009C4 //TVAR_afit_pBaseValS[256] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//700009C6 //TVAR_afit_pBaseValS[257] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1102  },	//700009C8 //TVAR_afit_pBaseValS[258] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001B  },	//700009CA //TVAR_afit_pBaseValS[259] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//700009CC //TVAR_afit_pBaseValS[260] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//700009CE //TVAR_afit_pBaseValS[261] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//700009D0 //TVAR_afit_pBaseValS[262] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0306  },	//700009D2 //TVAR_afit_pBaseValS[263] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x4602  },	//700009D4 //TVAR_afit_pBaseValS[264] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0880  },	//700009D6 //TVAR_afit_pBaseValS[265] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0080  },	//700009D8 //TVAR_afit_pBaseValS[266] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//700009DA //TVAR_afit_pBaseValS[267] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x0101  },	//700009DC //TVAR_afit_pBaseValS[268] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0707  },	//700009DE //TVAR_afit_pBaseValS[269] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x1E01  },	//700009E0 //TVAR_afit_pBaseValS[270] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x3C1E  },	//700009E2 //TVAR_afit_pBaseValS[271] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /
+{ 0x0F12, 0x5028  },	//700009E4 //TVAR_afit_pBaseValS[272] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0500  },	//700009E6 //TVAR_afit_pBaseValS[273] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x1A04  },	//700009E8 //TVAR_afit_pBaseValS[274] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /
+{ 0x0F12, 0x280A  },	//700009EA //TVAR_afit_pBaseValS[275] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x080C  },	//700009EC //TVAR_afit_pBaseValS[276] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /
+{ 0x0F12, 0x1414  },	//700009EE //TVAR_afit_pBaseValS[277] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x6A03  },	//700009F0 //TVAR_afit_pBaseValS[278] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x121E  },	//700009F2 //TVAR_afit_pBaseValS[279] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//700009F4 //TVAR_afit_pBaseValS[280] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//700009F6 //TVAR_afit_pBaseValS[281] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x2806  },	//700009F8 //TVAR_afit_pBaseValS[282] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x0128  },	//700009FA //TVAR_afit_pBaseValS[283] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//700009FC //TVAR_afit_pBaseValS[284] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x2224  },	//700009FE //TVAR_afit_pBaseValS[285] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x3236  },	//70000A00 //TVAR_afit_pBaseValS[286] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000A02 //TVAR_afit_pBaseValS[287] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000A04 //TVAR_afit_pBaseValS[288] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0410  },	//70000A06 //TVAR_afit_pBaseValS[289] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x141E  },	//70000A08 //TVAR_afit_pBaseValS[290] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF07  },	//70000A0A //TVAR_afit_pBaseValS[291] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//70000A0C //TVAR_afit_pBaseValS[292] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x4050  },	//70000A0E //TVAR_afit_pBaseValS[293] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x0F0F  },	//70000A10 //TVAR_afit_pBaseValS[294] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000A12 //TVAR_afit_pBaseValS[295] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000A14 //TVAR_afit_pBaseValS[296] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x2828  },	//70000A16 //TVAR_afit_pBaseValS[297] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000A18 //TVAR_afit_pBaseValS[298] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x2401  },	//70000A1A //TVAR_afit_pBaseValS[299] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x3622  },	//70000A1C //TVAR_afit_pBaseValS[300] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x2832  },	//70000A1E //TVAR_afit_pBaseValS[301] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000A20 //TVAR_afit_pBaseValS[302] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x1003  },	//70000A22 //TVAR_afit_pBaseValS[303] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1E04  },	//70000A24 //TVAR_afit_pBaseValS[304] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x0714  },	//70000A26 //TVAR_afit_pBaseValS[305] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000A28 //TVAR_afit_pBaseValS[306] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x5004  },	//70000A2A //TVAR_afit_pBaseValS[307] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x0F40  },	//70000A2C //TVAR_afit_pBaseValS[308] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x400F  },	//70000A2E //TVAR_afit_pBaseValS[309] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000A30 //TVAR_afit_pBaseValS[310] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000A32 //TVAR_afit_pBaseValS[311] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000A34 //TVAR_afit_pBaseValS[312] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000A36 //TVAR_afit_pBaseValS[313] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0000  },	//70000A38 //TVAR_afit_pBaseValS[314] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//70000A3A //TVAR_afit_pBaseValS[315] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//70000A3C //TVAR_afit_pBaseValS[316] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//70000A3E //TVAR_afit_pBaseValS[317] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//70000A40 //TVAR_afit_pBaseValS[318] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//70000A42 //TVAR_afit_pBaseValS[319] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//70000A44 //TVAR_afit_pBaseValS[320] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//70000A46 //TVAR_afit_pBaseValS[321] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//70000A48 //TVAR_afit_pBaseValS[322] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//70000A4A //TVAR_afit_pBaseValS[323] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x00C8  },	//70000A4C //TVAR_afit_pBaseValS[324] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x03E8  },	//70000A4E //TVAR_afit_pBaseValS[325] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0046  },	//70000A50 //TVAR_afit_pBaseValS[326] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x0050  },	//70000A52 //TVAR_afit_pBaseValS[327] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//70000A54 //TVAR_afit_pBaseValS[328] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//70000A56 //TVAR_afit_pBaseValS[329] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//70000A58 //TVAR_afit_pBaseValS[330] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x0226  },	//70000A5A //TVAR_afit_pBaseValS[331] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x0014  },	//70000A5C //TVAR_afit_pBaseValS[332] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x0014  },	//70000A5E //TVAR_afit_pBaseValS[333] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//70000A60 //TVAR_afit_pBaseValS[334] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//70000A62 //TVAR_afit_pBaseValS[335] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x004E  },	//70000A64 //TVAR_afit_pBaseValS[336] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0000  },	//70000A66 //TVAR_afit_pBaseValS[337] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x002D  },	//70000A68 //TVAR_afit_pBaseValS[338] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x0019  },	//70000A6A //TVAR_afit_pBaseValS[339] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x002D  },	//70000A6C //TVAR_afit_pBaseValS[340] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x0019  },	//70000A6E //TVAR_afit_pBaseValS[341] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//70000A70 //TVAR_afit_pBaseValS[342] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//70000A72 //TVAR_afit_pBaseValS[343] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//70000A74 //TVAR_afit_pBaseValS[344] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x1403  },	//70000A76 //TVAR_afit_pBaseValS[345] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x0000  },	//70000A78 //TVAR_afit_pBaseValS[346] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0000  },	//70000A7A //TVAR_afit_pBaseValS[347] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0906  },	//70000A7C //TVAR_afit_pBaseValS[348] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//70000A7E //TVAR_afit_pBaseValS[349] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x045A  },	//70000A80 //TVAR_afit_pBaseValS[350] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//70000A82 //TVAR_afit_pBaseValS[351] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//70000A84 //TVAR_afit_pBaseValS[352] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//70000A86 //TVAR_afit_pBaseValS[353] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x081E  },	//70000A88 //TVAR_afit_pBaseValS[354] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A14  },	//70000A8A //TVAR_afit_pBaseValS[355] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0F0F  },	//70000A8C //TVAR_afit_pBaseValS[356] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A00  },	//70000A8E //TVAR_afit_pBaseValS[357] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x0090  },	//70000A90 //TVAR_afit_pBaseValS[358] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x000A  },	//70000A92 //TVAR_afit_pBaseValS[359] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0001  },	//70000A94 //TVAR_afit_pBaseValS[360] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//70000A96 //TVAR_afit_pBaseValS[361] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1002  },	//70000A98 //TVAR_afit_pBaseValS[362] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001E  },	//70000A9A //TVAR_afit_pBaseValS[363] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//70000A9C //TVAR_afit_pBaseValS[364] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//70000A9E //TVAR_afit_pBaseValS[365] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//70000AA0 //TVAR_afit_pBaseValS[366] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0307  },	//70000AA2 //TVAR_afit_pBaseValS[367] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x5002  },	//70000AA4 //TVAR_afit_pBaseValS[368] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0080  },	//70000AA6 //TVAR_afit_pBaseValS[369] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0080  },	//70000AA8 //TVAR_afit_pBaseValS[370] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//70000AAA //TVAR_afit_pBaseValS[371] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x0101  },	//70000AAC //TVAR_afit_pBaseValS[372] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0707  },	//70000AAE //TVAR_afit_pBaseValS[373] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x1E01  },	//70000AB0 //TVAR_afit_pBaseValS[374] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x2A1E  },	//70000AB2 //TVAR_afit_pBaseValS[375] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /
+{ 0x0F12, 0x5020  },	//70000AB4 //TVAR_afit_pBaseValS[376] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0500  },	//70000AB6 //TVAR_afit_pBaseValS[377] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x1A04  },	//70000AB8 //TVAR_afit_pBaseValS[378] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /
+{ 0x0F12, 0x280A  },	//70000ABA //TVAR_afit_pBaseValS[379] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x080C  },	//70000ABC //TVAR_afit_pBaseValS[380] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /
+{ 0x0F12, 0x1414  },	//70000ABE //TVAR_afit_pBaseValS[381] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x6A03  },	//70000AC0 //TVAR_afit_pBaseValS[382] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x121E  },	//70000AC2 //TVAR_afit_pBaseValS[383] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//70000AC4 //TVAR_afit_pBaseValS[384] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//70000AC6 //TVAR_afit_pBaseValS[385] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x3C06  },	//70000AC8 //TVAR_afit_pBaseValS[386] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x013C  },	//70000ACA //TVAR_afit_pBaseValS[387] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//70000ACC //TVAR_afit_pBaseValS[388] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x1C1E  },	//70000ACE //TVAR_afit_pBaseValS[389] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x1E22  },	//70000AD0 //TVAR_afit_pBaseValS[390] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000AD2 //TVAR_afit_pBaseValS[391] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000AD4 //TVAR_afit_pBaseValS[392] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0214  },	//70000AD6 //TVAR_afit_pBaseValS[393] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x0E14  },	//70000AD8 //TVAR_afit_pBaseValS[394] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF06  },	//70000ADA //TVAR_afit_pBaseValS[395] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//70000ADC //TVAR_afit_pBaseValS[396] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x4052  },	//70000ADE //TVAR_afit_pBaseValS[397] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x150C  },	//70000AE0 //TVAR_afit_pBaseValS[398] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000AE2 //TVAR_afit_pBaseValS[399] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000AE4 //TVAR_afit_pBaseValS[400] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x3C3C  },	//70000AE6 //TVAR_afit_pBaseValS[401] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000AE8 //TVAR_afit_pBaseValS[402] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x1E01  },	//70000AEA //TVAR_afit_pBaseValS[403] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x221C  },	//70000AEC //TVAR_afit_pBaseValS[404] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x281E  },	//70000AEE //TVAR_afit_pBaseValS[405] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000AF0 //TVAR_afit_pBaseValS[406] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x1403  },	//70000AF2 //TVAR_afit_pBaseValS[407] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1402  },	//70000AF4 //TVAR_afit_pBaseValS[408] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x060E  },	//70000AF6 //TVAR_afit_pBaseValS[409] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000AF8 //TVAR_afit_pBaseValS[410] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x5204  },	//70000AFA //TVAR_afit_pBaseValS[411] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x0C40  },	//70000AFC //TVAR_afit_pBaseValS[412] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x4015  },	//70000AFE //TVAR_afit_pBaseValS[413] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000B00 //TVAR_afit_pBaseValS[414] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000B02 //TVAR_afit_pBaseValS[415] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+{ 0x0F12, 0x0000  },	//70000B04 //TVAR_afit_pBaseValS[416] /AFIT16_BRIGHTNESS                                                                                 /
+{ 0x0F12, 0x0000  },	//70000B06 //TVAR_afit_pBaseValS[417] /AFIT16_CONTRAST                                                                                   /
+{ 0x0F12, 0x0000  },	//70000B08 //TVAR_afit_pBaseValS[418] /AFIT16_SATURATION                                                                                 /
+{ 0x0F12, 0x0000  },	//70000B0A //TVAR_afit_pBaseValS[419] /AFIT16_SHARP_BLUR                                                                                 /
+{ 0x0F12, 0x0000  },	//70000B0C //TVAR_afit_pBaseValS[420] /AFIT16_GLAMOUR                                                                                    /
+{ 0x0F12, 0x00C1  },	//70000B0E //TVAR_afit_pBaseValS[421] /AFIT16_sddd8a_edge_high                                                                           /
+{ 0x0F12, 0x03FF  },	//70000B10 //TVAR_afit_pBaseValS[422] /AFIT16_Demosaicing_iSatVal                                                                        /
+{ 0x0F12, 0x009C  },	//70000B12 //TVAR_afit_pBaseValS[423] /AFIT16_Sharpening_iReduceEdgeThresh                                                               /
+{ 0x0F12, 0x0251  },	//70000B14 //TVAR_afit_pBaseValS[424] /AFIT16_demsharpmix1_iRGBOffset                                                                    /
+{ 0x0F12, 0x03FF  },	//70000B16 //TVAR_afit_pBaseValS[425] /AFIT16_demsharpmix1_iDemClamp                                                                     /
+{ 0x0F12, 0x000C  },	//70000B18 //TVAR_afit_pBaseValS[426] /AFIT16_demsharpmix1_iLowThreshold                                                                 /
+{ 0x0F12, 0x0010  },	//70000B1A //TVAR_afit_pBaseValS[427] /AFIT16_demsharpmix1_iHighThreshold                                                                /
+{ 0x0F12, 0x0032  },	//70000B1C //TVAR_afit_pBaseValS[428] /AFIT16_demsharpmix1_iLowBright                                                                    /
+{ 0x0F12, 0x028A  },	//70000B1E //TVAR_afit_pBaseValS[429] /AFIT16_demsharpmix1_iHighBright                                                                   /
+{ 0x0F12, 0x0032  },	//70000B20 //TVAR_afit_pBaseValS[430] /AFIT16_demsharpmix1_iLowSat                                                                       /
+{ 0x0F12, 0x01F4  },	//70000B22 //TVAR_afit_pBaseValS[431] /AFIT16_demsharpmix1_iHighSat                                                                      /
+{ 0x0F12, 0x0070  },	//70000B24 //TVAR_afit_pBaseValS[432] /AFIT16_demsharpmix1_iTune                                                                         /
+{ 0x0F12, 0x0000  },	//70000B26 //TVAR_afit_pBaseValS[433] /AFIT16_demsharpmix1_iHystThLow                                                                    /
+{ 0x0F12, 0x0000  },	//70000B28 //TVAR_afit_pBaseValS[434] /AFIT16_demsharpmix1_iHystThHigh                                                                   /
+{ 0x0F12, 0x01AA  },	//70000B2A //TVAR_afit_pBaseValS[435] /AFIT16_demsharpmix1_iHystCenter                                                                   /
+{ 0x0F12, 0x003C  },	//70000B2C //TVAR_afit_pBaseValS[436] /AFIT16_YUV422_DENOISE_iUVLowThresh                                                                /
+{ 0x0F12, 0x0050  },	//70000B2E //TVAR_afit_pBaseValS[437] /AFIT16_YUV422_DENOISE_iUVHighThresh                                                               /
+{ 0x0F12, 0x0000  },	//70000B30 //TVAR_afit_pBaseValS[438] /AFIT16_YUV422_DENOISE_iYLowThresh                                                                 /
+{ 0x0F12, 0x0000  },	//70000B32 //TVAR_afit_pBaseValS[439] /AFIT16_YUV422_DENOISE_iYHighThresh                                                                /
+{ 0x0F12, 0x0044  },	//70000B34 //TVAR_afit_pBaseValS[440] /AFIT16_Sharpening_iLowSharpClamp                                                                  /
+{ 0x0F12, 0x0014  },	//70000B36 //TVAR_afit_pBaseValS[441] /AFIT16_Sharpening_iHighSharpClamp                                                                 /
+{ 0x0F12, 0x0046  },	//70000B38 //TVAR_afit_pBaseValS[442] /AFIT16_Sharpening_iLowSharpClamp_Bin                                                              /
+{ 0x0F12, 0x0019  },	//70000B3A //TVAR_afit_pBaseValS[443] /AFIT16_Sharpening_iHighSharpClamp_Bin                                                             /
+{ 0x0F12, 0x0046  },	//70000B3C //TVAR_afit_pBaseValS[444] /AFIT16_Sharpening_iLowSharpClamp_sBin                                                             /
+{ 0x0F12, 0x0019  },	//70000B3E //TVAR_afit_pBaseValS[445] /AFIT16_Sharpening_iHighSharpClamp_sBin                                                            /
+{ 0x0F12, 0x0A24  },	//70000B40 //TVAR_afit_pBaseValS[446] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]                                    /
+{ 0x0F12, 0x1701  },	//70000B42 //TVAR_afit_pBaseValS[447] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]                                     /
+{ 0x0F12, 0x0229  },	//70000B44 //TVAR_afit_pBaseValS[448] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]                                           /
+{ 0x0F12, 0x0503  },	//70000B46 //TVAR_afit_pBaseValS[449] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]                                /
+{ 0x0F12, 0x080F  },	//70000B48 //TVAR_afit_pBaseValS[450] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]                              /
+{ 0x0F12, 0x0808  },	//70000B4A //TVAR_afit_pBaseValS[451] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]                            /
+{ 0x0F12, 0x0000  },	//70000B4C //TVAR_afit_pBaseValS[452] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]                             /
+{ 0x0F12, 0x00FF  },	//70000B4E //TVAR_afit_pBaseValS[453] /AFIT8_sddd8a_iSatSat[7:0],   AFIT8_sddd8a_iRadialTune [15:8]                                      /
+{ 0x0F12, 0x012D  },	//70000B50 //TVAR_afit_pBaseValS[454] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]                               /
+{ 0x0F12, 0x1414  },	//70000B52 //TVAR_afit_pBaseValS[455] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],  AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]                 /
+{ 0x0F12, 0x0301  },	//70000B54 //TVAR_afit_pBaseValS[456] /AFIT8_sddd8a_iLowSlopeThresh[7:0],   AFIT8_sddd8a_iHighSlopeThresh [15:8]                         /
+{ 0x0F12, 0xFF07  },	//70000B56 //TVAR_afit_pBaseValS[457] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]                         /
+{ 0x0F12, 0x061E  },	//70000B58 //TVAR_afit_pBaseValS[458] /AFIT8_Demosaicing_iMonochrom [7:0],   AFIT8_Demosaicing_iDecisionThresh [15:8]                    /
+{ 0x0F12, 0x0A1E  },	//70000B5A //TVAR_afit_pBaseValS[459] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]                       /
+{ 0x0F12, 0x0606  },	//70000B5C //TVAR_afit_pBaseValS[460] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],   AFIT8_Demosaicing_iGBDenoiseVal [15:8]                   /
+{ 0x0F12, 0x0A03  },	//70000B5E //TVAR_afit_pBaseValS[461] /AFIT8_Demosaicing_iNearGrayDesat[7:0],   AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]                /
+{ 0x0F12, 0x378B  },	//70000B60 //TVAR_afit_pBaseValS[462] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]                            /
+{ 0x0F12, 0x1028  },	//70000B62 //TVAR_afit_pBaseValS[463] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]                            /
+{ 0x0F12, 0x0001  },	//70000B64 //TVAR_afit_pBaseValS[464] /AFIT8_Sharpening_nSharpWidth [7:0],   AFIT8_Sharpening_iReduceNegative [15:8]                     /
+{ 0x0F12, 0x00FF  },	//70000B66 //TVAR_afit_pBaseValS[465] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]                    /
+{ 0x0F12, 0x1002  },	//70000B68 //TVAR_afit_pBaseValS[466] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]                         /
+{ 0x0F12, 0x001E  },	//70000B6A //TVAR_afit_pBaseValS[467] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]                           /
+{ 0x0F12, 0x0900  },	//70000B6C //TVAR_afit_pBaseValS[468] /AFIT8_demsharpmix1_iNarrMult [7:0],   AFIT8_demsharpmix1_iHystFalloff [15:8]                      /
+{ 0x0F12, 0x0600  },	//70000B6E //TVAR_afit_pBaseValS[469] /AFIT8_demsharpmix1_iHystMinMult [7:0],   AFIT8_demsharpmix1_iHystWidth [15:8]                     /
+{ 0x0F12, 0x0504  },	//70000B70 //TVAR_afit_pBaseValS[470] /AFIT8_demsharpmix1_iHystFallLow [7:0],   AFIT8_demsharpmix1_iHystFallHigh [15:8]                  /
+{ 0x0F12, 0x0307  },	//70000B72 //TVAR_afit_pBaseValS[471] /AFIT8_demsharpmix1_iHystTune [7:0],  * AFIT8_YUV422_DENOISE_iUVSupport [15:8]                     /
+{ 0x0F12, 0x5001  },	//70000B74 //TVAR_afit_pBaseValS[472] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]                      /
+{ 0x0F12, 0x0080  },	//70000B76 //TVAR_afit_pBaseValS[473] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]                             /
+{ 0x0F12, 0x0080  },	//70000B78 //TVAR_afit_pBaseValS[474] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]                                 /
+{ 0x0F12, 0x0080  },	//70000B7A //TVAR_afit_pBaseValS[475] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]                                  /
+{ 0x0F12, 0x5050  },	//70000B7C //TVAR_afit_pBaseValS[476] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]                            /
+{ 0x0F12, 0x0101  },	//70000B7E //TVAR_afit_pBaseValS[477] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]                               /
+{ 0x0F12, 0x3201  },	//70000B80 //TVAR_afit_pBaseValS[478] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]                                /
+{ 0x0F12, 0x1832  },	//70000B82 //TVAR_afit_pBaseValS[479] /AFIT8_sddd8a_DispTH_High [7:0],   AFIT8_sddd8a_iDenThreshLow [15:8]                               /        iden 12
+{ 0x0F12, 0x210C  },	//70000B84 //TVAR_afit_pBaseValS[480] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]                           /
+{ 0x0F12, 0x0A00  },	//70000B86 //TVAR_afit_pBaseValS[481] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]            /
+{ 0x0F12, 0x1E04  },	//70000B88 //TVAR_afit_pBaseValS[482] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],  AFIT8_Demosaicing_iDemSharpenLow [15:8]                  /    1E demhsharplow
+{ 0x0F12, 0x0A08  },	//70000B8A //TVAR_afit_pBaseValS[483] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],   AFIT8_Demosaicing_iDemSharpThresh [15:8]                /
+{ 0x0F12, 0x070C  },	//70000B8C //TVAR_afit_pBaseValS[484] /AFIT8_Demosaicing_iDemShLowLimit [7:0],   AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]          /    c8 clamp
+{ 0x0F12, 0x3264  },	//70000B8E //TVAR_afit_pBaseValS[485] /AFIT8_Demosaicing_iDemBlurLow[7:0],   AFIT8_Demosaicing_iDemBlurHigh [15:8]                       /
+{ 0x0F12, 0x5A02  },	//70000B90 //TVAR_afit_pBaseValS[486] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]                    /
+{ 0x0F12, 0x1040  },	//70000B92 //TVAR_afit_pBaseValS[487] /AFIT8_Sharpening_iHighSharpPower[7:0],   AFIT8_Sharpening_iLowShDenoise [15:8]                    /
+{ 0x0F12, 0x4012  },	//70000B94 //TVAR_afit_pBaseValS[488] /AFIT8_Sharpening_iHighShDenoise [7:0],   AFIT8_Sharpening_iReduceEdgeMinMult [15:8]               /
+{ 0x0F12, 0x0604  },	//70000B96 //TVAR_afit_pBaseValS[489] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]               /
+{ 0x0F12, 0x4606  },	//70000B98 //TVAR_afit_pBaseValS[490] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]                 /
+{ 0x0F12, 0x0146  },	//70000B9A //TVAR_afit_pBaseValS[491] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],   AFIT8_sddd8a_iClustMulT_H_Bin [15:8]                     /
+{ 0x0F12, 0x0101  },	//70000B9C //TVAR_afit_pBaseValS[492] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]                      /
+{ 0x0F12, 0x1C18  },	//70000B9E //TVAR_afit_pBaseValS[493] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],   AFIT8_sddd8a_DispTH_High_Bin [15:8]                          /
+{ 0x0F12, 0x1819  },	//70000BA0 //TVAR_afit_pBaseValS[494] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]                    /
+{ 0x0F12, 0x0028  },	//70000BA2 //TVAR_afit_pBaseValS[495] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],   AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]            /
+{ 0x0F12, 0x030A  },	//70000BA4 //TVAR_afit_pBaseValS[496] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]      /
+{ 0x0F12, 0x0514  },	//70000BA6 //TVAR_afit_pBaseValS[497] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],  AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]         /
+{ 0x0F12, 0x0C14  },	//70000BA8 //TVAR_afit_pBaseValS[498] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]         /
+{ 0x0F12, 0xFF05  },	//70000BAA //TVAR_afit_pBaseValS[499] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]      /
+{ 0x0F12, 0x0432  },	//70000BAC //TVAR_afit_pBaseValS[500] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]             /
+{ 0x0F12, 0x4052  },	//70000BAE //TVAR_afit_pBaseValS[501] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]           /
+{ 0x0F12, 0x1514  },	//70000BB0 //TVAR_afit_pBaseValS[502] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]             /
+{ 0x0F12, 0x0440  },	//70000BB2 //TVAR_afit_pBaseValS[503] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]      /
+{ 0x0F12, 0x0302  },	//70000BB4 //TVAR_afit_pBaseValS[504] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]      /
+{ 0x0F12, 0x4646  },	//70000BB6 //TVAR_afit_pBaseValS[505] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],   AFIT8_sddd8a_iClustThresh_C_sBin [15:8]                  /
+{ 0x0F12, 0x0101  },	//70000BB8 //TVAR_afit_pBaseValS[506] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]                     /
+{ 0x0F12, 0x1801  },	//70000BBA //TVAR_afit_pBaseValS[507] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],   AFIT8_sddd8a_DispTH_Low_sBin [15:8]                      /
+{ 0x0F12, 0x191C  },	//70000BBC //TVAR_afit_pBaseValS[508] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]                     /
+{ 0x0F12, 0x2818  },	//70000BBE //TVAR_afit_pBaseValS[509] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],   AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]                 /
+{ 0x0F12, 0x0A00  },	//70000BC0 //TVAR_afit_pBaseValS[510] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]   /
+{ 0x0F12, 0x1403  },	//70000BC2 //TVAR_afit_pBaseValS[511] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]       /
+{ 0x0F12, 0x1405  },	//70000BC4 //TVAR_afit_pBaseValS[512] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]      /
+{ 0x0F12, 0x050C  },	//70000BC6 //TVAR_afit_pBaseValS[513] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8] /
+{ 0x0F12, 0x32FF  },	//70000BC8 //TVAR_afit_pBaseValS[514] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]             /
+{ 0x0F12, 0x5204  },	//70000BCA //TVAR_afit_pBaseValS[515] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],  AFIT8_Sharpening_iLowSharpPower_sBin [15:8]          /
+{ 0x0F12, 0x1440  },	//70000BCC //TVAR_afit_pBaseValS[516] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]          /
+{ 0x0F12, 0x4015  },	//70000BCE //TVAR_afit_pBaseValS[517] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],  AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]      /
+{ 0x0F12, 0x0204  },	//70000BD0 //TVAR_afit_pBaseValS[518] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]     /
+{ 0x0F12, 0x0003  },	//70000BD2 //TVAR_afit_pBaseValS[519] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]                                                     /
+                           
+{ 0x0F12, 0x7DFA  },	//afit_pConstBaseValS[0] //                                                                          
+{ 0x0F12, 0xFFBD  },	//afit_pConstBaseValS[1] //                                                                          
+{ 0x0F12, 0x26FE  },	//afit_pConstBaseValS[2] //                                                                          
+{ 0x0F12, 0xF7BC  },	//afit_pConstBaseValS[3] //                                                                          
+{ 0x0F12, 0x7E06  },	//afit_pConstBaseValS[4] //                                                                          
+{ 0x0F12, 0x00D3  },	//afit_pConstBaseValS[5] //                                                                          
+                        
+                        
+{ 0x002A, 0x2CE8  },    
+{ 0x0F12, 0x0007  },	// Modify LSB to control AWBB_YThreshLow //    	                                                                        
+{ 0x0F12, 0x00E2  },	//                                         
+{ 0x0F12, 0x0005  },	// Modify LSB to control AWBB_YThreshLowBrLow//                                                                        
+{ 0x0F12, 0x00E2  },	//                                         
+                                                                       
+                                                                                     
+{ 0x002A, 0x0F7E  },    //ae weight    //                                
+{ 0x0F12, 0x0000  },  //0000  //0000
+{ 0x0F12, 0x0000  },  //0000  //0000
+{ 0x0F12, 0x0000  },  //0000  //0000
+{ 0x0F12, 0x0000  },  //0000  //0000                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0201  },  //0201  //0201
+{ 0x0F12, 0x0102  },  //0102  //0102
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0101  },  //0101  //0101
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0101  },  //0101  //0101                     
+{ 0x0F12, 0x0201  },  //0101  //0101
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0102  },  //0101  //0101                     
+{ 0x0F12, 0x0201  },  //0101  //0201
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0202  },  //0202  //0202
+{ 0x0F12, 0x0102  },  //0101  //0102                     
+{ 0x0F12, 0x0101  },  //0101  //0201
+{ 0x0F12, 0x0101  },  //0101  //0202
+{ 0x0F12, 0x0101  },  //0101  //0202
+{ 0x0F12, 0x0101  },  //0101  //0102
+                        
+                               
+{ 0x002A, 0x01CC  },    
+{ 0x0F12, 0x5DC0  },	//REG_TC_IPRM_InClockLSBs//input clock=24MHz                        	                                                                        
+{ 0x0F12, 0x0000  },    //REG_TC_IPRM_InClockMSBs                                           
+{ 0x002A, 0x01EE  },                                                                        
+{ 0x0F12, 0x0003  },	//REG_TC_IPRM_UseNPviClocks                                     
+                  
+{ 0x002A, 0x01F6  },                                                                        
+{ 0x0F12, 0x1F40  },    //REG_TC_IPRM_OpClk4KHz_0                   	2   700001F6         
+{ 0x0F12, 0x32A8  },	//3A88    //REG_TC_IPRM_MinOutRate4KHz_0              	2   700001F8                                                                        
+{ 0x0F12, 0x32E8  },	//3AA8    //REG_TC_IPRM_MaxOutRate4KHz_0                        
+                        
+{ 0x0F12, 0x1F40  },	 //REG_TC_IPRM_OpClk4KHz_1                   	2   700001FC    
+{ 0x0F12, 0x2ea0  },    //REG_TC_IPRM_MinOutRate4KHz_1              	2   700001FE 
+{ 0x0F12, 0x2f00  },    //REG_TC_IPRM_MaxOutRate4KHz_1              	2   70000200 
+                  
+{ 0x0F12, 0x0BB8  },    //REG_TC_IPRM_OpClk4KHz_2                   	2   70000202 
+{ 0x0F12, 0x05DC  },    //REG_TC_IPRM_MinOutRate4KHz_2              	2   70000204 
+{ 0x0F12, 0x1770  },    //REG_TC_IPRM_MaxOutRate4KHz_2              	2   70000206 
+                  
+{ 0x002A, 0x0208  },                                                                
+{ 0x0F12, 0x0001  },      //REG_TC_IPRM_InitParamsUpdated                           
+                        
+{ 0xdddd, 0x0064  },  //delay 100ms  
+                  
+{ 0x0028, 0x7000  },	    
+{ 0x002A, 0x026C  },   //Normal preview 15fps
+{ 0x0F12, 0x0400  },	//REG_0TC_PCFG_usWidth                      	2   7000026C			//                            
+{ 0x0F12, 0x0300  },   //REG_0TC_PCFG_usHeight                     	2   7000026E    //                                         
+{ 0x0F12, 0x0005  },   //REG_0TC_PCFG_Format                       	2   70000270    //                                         
+{ 0x0F12, 0x32E8  },	//3AA8//REG_0TC_PCFG_usMaxOut4KHzRate             	2   70000272  //                              
+{ 0x0F12, 0x32a8  },	//3A88//REG_0TC_PCFG_usMinOut4KHzRate             	2   70000274  //                              
+{ 0x0F12, 0x0100  },   //REG_0TC_PCFG_OutClkPerPix88               	2   70000276    //                                         
+{ 0x0F12, 0x0800  },   //REG_0TC_PCFG_uMaxBpp88                    	2   70000278    //                                         
+{ 0x0F12, 0x0072  },   //REG_0TC_PCFG_PVIMask                      	2   7000027A    //92  (1) PCLK inversion  (4)1b_C first (5) UV First                                       
+{ 0x0F12, 0x0010  },   //REG_0TC_PCFG_OIFMask                      	2   7000027C    //                                         
+{ 0x0F12, 0x01E0  },   //REG_0TC_PCFG_usJpegPacketSize             	2   7000027E    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_usJpegTotalPackets           	2   70000280    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_uClockInd                    	2   70000282    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_usFrTimeType                 	2   70000284    //                                         
+{ 0x0F12, 0x0001  },   //REG_0TC_PCFG_FrRateQualityType            	2   70000286    //                                         
+{ 0x0F12, 0x0535  },   //REG_0TC_PCFG_usMaxFrTimeMsecMult10        	2   70000288    //                                         
+{ 0x0F12, 0x029A  },   //REG_0TC_PCFG_usMinFrTimeMsecMult10        	2   7000028A    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_bSmearOutput                 	2   7000028C    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_sSaturation                  	2   7000028E    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_sSharpBlur                   	2   70000290    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_sColorTemp                   	2   70000292    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_uDeviceGammaIndex            	2   70000294    //                                         
+{ 0x0F12, 0x0003  },   //REG_0TC_PCFG_uPrevMirror                  	2   70000296    //                                         
+{ 0x0F12, 0x0003  },   //REG_0TC_PCFG_uCaptureMirror               	2   70000298    //                                         
+{ 0x0F12, 0x0000  },   //REG_0TC_PCFG_uRotation                    	2   7000029A    //                                         
+                       
+                       //comcoder frame fix 15                                        
+{ 0x0F12, 0x0400  },   //REG_1TC_PCFG_usWidth                      	2   7000029C    //                                         
+{ 0x0F12, 0x0300  },   //REG_1TC_PCFG_usHeight                     	2   7000029E    //                                         
+{ 0x0F12, 0x0005  },   //REG_1TC_PCFG_Format                       	2   700002A0    //                                         
+{ 0x0F12, 0x32E8  },   //REG_1TC_PCFG_usMaxOut4KHzRate             	2   700002A2    //                                         
+{ 0x0F12, 0x32a8  },   //REG_1TC_PCFG_usMinOut4KHzRate             	2   700002A4    //                                         
+{ 0x0F12, 0x0100  },   //REG_1TC_PCFG_OutClkPerPix88               	2   700002A6    //                                         
+{ 0x0F12, 0x0800  },   //REG_1TC_PCFG_uMaxBpp88                    	2   700002A8    //                                         
+{ 0x0F12, 0x0072  },   //REG_1TC_PCFG_PVIMask                      	2   700002AA    //                                         
+{ 0x0F12, 0x0010  },   //REG_1TC_PCFG_OIFMask                      	2   700002AC    //                                         
+{ 0x0F12, 0x01E0  },   //REG_1TC_PCFG_usJpegPacketSize             	2   700002AE    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_usJpegTotalPackets           	2   700002B0    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_uClockInd                    	2   700002B2    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_usFrTimeType                 	2   700002B4    //                                         
+{ 0x0F12, 0x0001  },   //REG_1TC_PCFG_FrRateQualityType            	2   700002B6    //                                         
+{ 0x0F12, 0x029a  },   //REG_1TC_PCFG_usMaxFrTimeMsecMult10        	2   700002B8    //                                         
+{ 0x0F12, 0x029a  },   //REG_1TC_PCFG_usMinFrTimeMsecMult10        	2   700002BA    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_bSmearOutput                 	2   700002BC    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_sSaturation                  	2   700002BE    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_sSharpBlur                   	2   700002C0    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_sColorTemp                   	2   700002C2    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_uDeviceGammaIndex            	2   700002C4    //                                         
+{ 0x0F12, 0x0003  },   //REG_1TC_PCFG_uPrevMirror                  	2   700002C6    //                                         
+{ 0x0F12, 0x0003  },   //REG_1TC_PCFG_uCaptureMirror               	2   700002C8    //                                         
+{ 0x0F12, 0x0000  },   //REG_1TC_PCFG_uRotation                    	2   700002CA    //                                         
+                                       
+                            
+{ 0x002A, 0x035C  },   //Normal capture //    
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_uCaptureMode                 	2   7000035C						// 
+{ 0x0F12, 0x0800  },   //REG_0TC_CCFG_usWidth                      	2   7000035E          //                                   
+{ 0x0F12, 0x0600  },   //REG_0TC_CCFG_usHeight                     	2   70000360          //                                   
+{ 0x0F12, 0x0005  },   //REG_0TC_CCFG_Format                       	2   70000362          //                                   
+{ 0x0F12, 0x32E8  },	//2f00//3AA8//REG_0TC_CCFG_usMaxOut4KHzRate             	2   70000364  //                      
+{ 0x0F12, 0x32a8  },	//2ea0//3A88//REG_0TC_CCFG_usMinOut4KHzRate             	2   70000366  //                      
+{ 0x0F12, 0x0100  },   //REG_0TC_CCFG_OutClkPerPix88               	2   70000368          //                                   
+{ 0x0F12, 0x0800  },   //REG_0TC_CCFG_uMaxBpp88                    	2   7000036A          //                                   
+{ 0x0F12, 0x0072  },   //REG_0TC_CCFG_PVIMask                      	2   7000036C          //                                   
+{ 0x0F12, 0x0010  },   //REG_0TC_CCFG_OIFMask                      	2   7000036E          //                                   
+{ 0x0F12, 0x01E0  },   //REG_0TC_CCFG_usJpegPacketSize             	2   70000370          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_usJpegTotalPackets           	2   70000372          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_uClockInd                    	2   70000374          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_usFrTimeType                 	2   70000376          //                                   
+{ 0x0F12, 0x0002  },   //REG_0TC_CCFG_FrRateQualityType            	2   70000378          //                                   
+{ 0x0F12, 0x0535  },   //REG_0TC_CCFG_usMaxFrTimeMsecMult10        	2   7000037A          //                                   
+{ 0x0F12, 0x0535  },   //REG_0TC_CCFG_usMinFrTimeMsecMult10        	2   7000037C          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_bSmearOutput                 	2   7000037E          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_sSaturation                  	2   70000380          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_sSharpBlur                   	2   70000382          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_sColorTemp                   	2   70000384          //                                   
+{ 0x0F12, 0x0000  },   //REG_0TC_CCFG_uDeviceGammaIndex            	2   70000386          //                                   
+                            
+                       // Low_lux capture//    
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_uCaptureMode                 	2   70000388						// 
+{ 0x0F12, 0x0800  },   //REG_1TC_CCFG_usWidth                      	2   7000038A          //                                   
+{ 0x0F12, 0x0600  },   //REG_1TC_CCFG_usHeight                     	2   7000038C          //                                   
+{ 0x0F12, 0x0005  },   //REG_1TC_CCFG_Format                       	2   7000038E          //                                   
+{ 0x0F12, 0x32E8  },   //REG_1TC_CCFG_usMaxOut4KHzRate             	2   70000390          //                                   
+{ 0x0F12, 0x32a8  },   //REG_1TC_CCFG_usMinOut4KHzRate             	2   70000392          //                                   
+{ 0x0F12, 0x0100  },   //REG_1TC_CCFG_OutClkPerPix88               	2   70000394          //                                   
+{ 0x0F12, 0x0800  },   //REG_1TC_CCFG_uMaxBpp88                    	2   70000396          //                                   
+{ 0x0F12, 0x0072  },   //REG_1TC_CCFG_PVIMask                      	2   70000398          //                                   
+{ 0x0F12, 0x0010  },   //REG_1TC_CCFG_OIFMask                      	2   7000039A          //                                   
+{ 0x0F12, 0x01E0  },   //REG_1TC_CCFG_usJpegPacketSize             	2   7000039C          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_usJpegTotalPackets           	2   7000039E          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_uClockInd                    	2   700003A0          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_usFrTimeType                 	2   700003A2          //                                   
+{ 0x0F12, 0x0002  },   //REG_1TC_CCFG_FrRateQualityType            	2   700003A4          //                                   
+{ 0x0F12, 0x0535  },   //REG_1TC_CCFG_usMaxFrTimeMsecMult10        	2   700003A6          //                                   
+{ 0x0F12, 0x0535  },   //REG_1TC_CCFG_usMinFrTimeMsecMult10        	2   700003A8          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_bSmearOutput                 	2   700003AA          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_sSaturation                  	2   700003AC          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_sSharpBlur                   	2   700003AE          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_sColorTemp                   	2   700003B0          //                                   
+{ 0x0F12, 0x0000  },   //REG_1TC_CCFG_uDeviceGammaIndex            	2   700003B2          //                                   
+                                  
+{ 0x002A, 0x0208  },        
+{ 0x0F12, 0x0001  },      //REG_TC_IPRM_InitParamsUpdated//                                                                       
+                            
+{ 0x002A, 0x023C  },   
+{ 0x0F12, 0x0000  },	//32MHz Sys Clock//	
+{ 0x002A, 0x0244  },	                   
+{ 0x0F12, 0x0000  },       
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0x0F12, 0x0001  }, 
+                     
+{ 0x1000, 0x0001  },	// Set host interrupt so main start run//                                                  
+{ 0xdddd, 0x0064  },   //delay 100ms
+                  
+{ 0x002A, 0x0DA0  },    
+{ 0x0F12, 0x0005  },    
+                        
+{ 0x002A, 0x0D88  },    
+{ 0x0F12, 0x0038  },    
+{ 0x0F12, 0x0074  },    
+{ 0x0F12, 0xFFF1  },    
+{ 0x0F12, 0x00BF  },    
+{ 0x0F12, 0xFF9B  },    
+{ 0x0F12, 0x00DB  },    
+{ 0x0F12, 0xFF56  },    
+{ 0x0F12, 0x00F0  },    
+{ 0x0F12, 0xFEFF  },    
+{ 0x0F12, 0x010F  },    
+{ 0x0F12, 0x0E74  },    
+{ 0x002A, 0x0DA8  },    
+{ 0x0F12, 0x0BB8  },    //NB 3000
+{ 0x002A, 0x0DA4  },    
+{ 0x0F12, 0x274E  },
+                  
+{ 0x002A, 0x0DCA  },
+{ 0x0F12, 0x0030  },
+
+{ 0x002A, 0x3286  },
+{ 0x0F12, 0x0001  }, //Pre/Post gamma on(ç›”æ±—)  
+
+{ 0x002A, 0x032C  },
+{ 0x0F12, 0xAAAA  },  //ESD Check  
+                  
+{ 0xffff, 0xffff },
+};
+
+  
+s5k5ca_short_t s5k5ca_capture_normal_normal_00[] =              
+{ 
+{ 0xFCFC, 0xD000  },                 
+{ 0x0028, 0x7000  },  
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0246  },
+{ 0x0F12, 0x0001  },  
+{ 0x002A, 0x0224  },
+{ 0x0F12, 0x0001  },   
+{ 0x0F12, 0x0001  },
+//{ 0xdddd, 0x012C  }, //delay 300ms //0218 delay time 300ms // 0421 0064(100ms)->0032(50ms)        
+{ 0xffff, 0xffff  },
+};
+
+
+
+// /////////////
+// / CapturewMode
+// ////////////
+s5k5ca_short_t s5k5ca_capture[] = 
+{ 
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },                                                      
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  }, 
+  
+{ 0xffff, 0xffff  },
+};
+
+
+/////////////////////
+// SnapshotLowLightMode
+/////////////////////
+s5k5ca_short_t s5k5ca_snapshot_normal_low_00[] = //light <= 0x20 0421 PV2 0020->0018
+{ 
+//LowLight + Night Off
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },            
+                  
+{ 0x002A, 0x07E6  },
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+    
+{ 0x002A, 0x0838  },
+{ 0x0F12, 0x0A3C  },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x0908  },
+{ 0x0F12, 0x0446  },	//TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]
+                                             
+{ 0x002A, 0x0244  }, //Low lux capture//
+{ 0x0F12, 0x0001  }, //config 1 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  },
+                 
+{ 0xdddd, 0x0320  }, //delay 800ms 
+
+{ 0xffff, 0xffff  },
+//sw delay time - 800ms
+};
+
+
+  
+s5k5ca_short_t s5k5ca_flashcapture_00[] =       
+{ 
+  
+//{ 0xdddd, 0x0160  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },                   
+{ 0x002A, 0x035C  }, //Capture Mode//
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  }, 
+  
+
+{ 0xffff, 0xffff  },  
+};
+
+
+/////////////////////
+// SnapshotLowLightMode
+/////////////////////
+s5k5ca_short_t s5k5ca_snapshot_low[] = 
+{
+
+//LowLight + Night Off
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },            
+                  
+{ 0x002A, 0x07E6  },
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+    
+{ 0x002A, 0x0838  },
+{ 0x0F12, 0x0A3C  },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x0908  },
+{ 0x0F12, 0x0446  },	//TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]
+                                             
+{ 0x002A, 0x0244  }, //Low lux capture//
+{ 0x0F12, 0x0001  }, //config 1 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  },
+  
+{ 0xffff, 0xffff  },  
+
+};
+
+s5k5ca_short_t s5k5ca_flashcapture_low_00[] =    
+{
+//{ 0xdddd, 0x0160  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms
+//{ 0xdddd, 0x0064  }, //delay 100ms    
+
+//LowLight + Night Off
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },            
+{ 0x002A, 0x0388  }, //Capture Mode//
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0244  }, //Normal capture//
+{ 0x0F12, 0x0000  }, //config 0 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  },
+  
+{ 0xffff, 0xffff  },  
+};
+
+
+
+////////////////////
+// SnapshotNightMode
+///////////////////
+
+s5k5ca_short_t s5k5ca_snapshot_nightmode_00[] = 
+{
+
+//LowLight
+{ 0xFCFC, 0xD000  },   
+{ 0x0028, 0x7000  },    
+{ 0x002A, 0x07E6  },
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0020  },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+                                                     
+{ 0x002A, 0x0244  }, //Night capture//
+{ 0x0F12, 0x0002  }, //config 2 //
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0246  }, 
+{ 0x0F12, 0x0001  },              
+{ 0x002A, 0x0224  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x0F12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+
+////////////////
+// NightMode_ON
+///////////////
+s5k5ca_short_t s5k5ca_nightmode_on[] = 
+{
+
+
+{ 0xffff, 0xffff  },            
+};
+
+////////////////
+// NightMode_OFF
+///////////////
+s5k5ca_short_t s5k5ca_nightmode_off[] = 
+{
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_NONFIX                     //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_nonfix[] = 
+{
+
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_15FIX                   //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_15fix[] = 
+{
+
+  
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_7FIX                    //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_7fix[] = 
+{
+
+                  
+{ 0xffff, 0xffff  },
+};
+
+
+/////////
+// ISO_AUTO
+/////////
+s5k5ca_short_t s5k5ca_iso_auto[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x1000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0x3415  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0x682A  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0x8235  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0x3415  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0x682A  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0x8235  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x01B3  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x02A0  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x0064  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  },
+  
+{ 0xffff, 0xffff  },
+};
+
+////////
+// ISO_50
+////////
+s5k5ca_short_t s5k5ca_iso50[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x1000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x0064  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// ISO_100
+////////
+s5k5ca_short_t s5k5ca_iso100[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x1800  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x0096  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+  
+// ///////
+// / ISO_200
+// ///////
+s5k5ca_short_t s5k5ca_iso200[] =
+{ 
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+  
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x2000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x00C8  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// ISO_400
+////////
+s5k5ca_short_t s5k5ca_iso400[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+
+{ 0x002A, 0x12B8  },  
+{ 0x0F12, 0x3000  }, 
+                  
+{ 0x002A, 0x0530  },   	                                                    
+{ 0x0F12, 0xC350  },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534  },                                                               
+{ 0x0F12, 0xC350  },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C  },                                                               
+{ 0x0F12, 0xC350  },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680  },                                                               
+{ 0x0F12, 0xc350  },   //MaxExp4   125ms  38ea //                           
+                  
+{ 0x002A, 0x0538  },                                                               
+{ 0x0F12, 0xC350  },   // 15fps //                                                 
+{ 0x002A, 0x053C  },                                                               
+{ 0x0F12, 0xC350  },   // 7.5fps //                                                
+{ 0x002A, 0x1684  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688  },                                                               
+{ 0x0F12, 0xC350  },   //CapMaxExp4 //                                             
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x0200  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x0200  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200  },   //MaxAnGain4 //    
+                  
+{ 0x002A, 0x0544  },  
+{ 0x0F12, 0x0100  },
+{ 0x0F12, 0x8000  },
+                  
+{ 0x002A, 0x04B4  },  
+{ 0x0F12, 0x0001  },
+{ 0x0F12, 0x012C  },
+{ 0x0F12, 0x0001  },
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0230  }, 
+{ 0x0F12, 0x0001  },	           
+{ 0x002A, 0x023E  }, 
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+{ 0xffff, 0xffff  },
+};
+
+////////////////////
+// SCENE_PORTRAIT_OFF
+////////////////////
+s5k5ca_short_t s5k5ca_scene_portrait_off[] =
+{
+{ 0xFCFC, 0xD000  },                    
+{ 0x0028, 0x7000  },//For Scene//
+{ 0x002A, 0x020C  },
+{ 0x0F12, 0x0000  },// Brightness for controling the EV//
+{ 0x002A, 0x0210  },
+{ 0x0F12, 0x0000  },// Saturation//
+{ 0x0F12, 0x0000  },// Blur_Sharpness //  
+{ 0xffff, 0xffff  },  
+};     
+
+////////////////////
+// SCENE_LANDSCAPE_OFF
+////////////////////
+s5k5ca_short_t s5k5ca_scene_landscape_off[] =
+{
+{ 0xFCFC, 0xD000  },     
+{ 0x0028, 0x7000  },//For Scene//
+{ 0x002A, 0x020C  },
+{ 0x0F12, 0x0000  },// Brightness for controling the EV//
+{ 0x002A, 0x0210  },
+{ 0x0F12, 0x0000  },// Saturation//
+{ 0x0F12, 0x0000  },// Blur_Sharpness //  
+{ 0xffff, 0xffff  },
+};
+
+/////////////////
+// SCENE_SPORTS_OFF
+/////////////////
+s5k5ca_short_t s5k5ca_scene_sports_off[] =
+{
+{ 0x0028, 0x7000  },     
+
+{ 0x002A, 0x0530  },//lt_uMaxExp1//
+{ 0x0F12, 0x3415  },
+{ 0x002A, 0x0534  },//lt_uMaxExp2//
+{ 0x0F12, 0x682A  },
+{ 0x002A, 0x167C  },//lt_uMaxExp3//
+{ 0x0F12, 0x8235  },
+{ 0x002A, 0x1680  },//lt_uMaxExp4//
+{ 0x0F12, 0xc350  },
+{ 0x0F12, 0x0000  },
+                  
+{ 0x002A, 0x0538  },//It_uCapMaxExp1 //
+{ 0x0F12, 0x3415  },
+{ 0x002A, 0x053C  },//It_uCapMaxExp2 //
+{ 0x0F12, 0x682A  },
+{ 0x002A, 0x1684  },//It_uCapMaxExp3 // 
+{ 0x0F12, 0x8235  },
+{ 0x002A, 0x1688  },//It_uCapMaxExp4 //
+{ 0x0F12, 0xc350  },
+{ 0x0F12, 0x0000  },
+                  
+{ 0x002A, 0x0540  },                                                               
+{ 0x0F12, 0x01B3  },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3  },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C  },                                                               
+{ 0x0F12, 0x02A0  },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710  },   //MaxAnGain4 //
+                  
+{ 0x002A, 0x0544  },
+{ 0x0F12, 0x0100  },//It_uMaxDigGain //
+
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_sunset_off[] =
+{
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_dawn_off[] =
+{
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_againstlight_off[] =
+{
+//NOT USE
+	              
+{ 0xffff, 0xffff  }, 
+};
+
+
+s5k5ca_short_t s5k5ca_scene_text_off[] =
+{
+//NOT USE
+{ 0xffff, 0xffff  },
+};
+
+
+s5k5ca_short_t s5k5ca_scene_portrait_on[] =
+{
+//NOT USE
+{ 0xffff, 0xffff  },
+};
+
+
+
+
+s5k5ca_t s5k5ca_reg[] = 
+{
+	// To do.
+};
+
+// For VGA ( 640 x 480) on 4CA module
+s5k5ca_t s5k5ca_reg_vga[] = 
+{
+	// To do.
+};
+
+// For SVGA ( 800 x 600) on 4CA module
+s5k5ca_t s5k5ca_reg_svga[] = 
+{
+	// To do.
+};
+
+// For SXGA (1280 x 1024 = 1.3M) on 4CA module
+s5k5ca_t s5k5ca_reg_sxga[] = 
+{
+	// To do.
+};
+
+// For UXGA (1600 x 1200 = 2M) on 4CA module
+s5k5ca_t s5k5ca_reg_uxga[] = 
+{
+	// To do.
+};
+
+// For SQVGA on 4CA module
+s5k5ca_t s5k5ca_reg_qsvga[] = 
+{
+	// To do.
+};
+
+#define S5K5CA_INIT_REGS (sizeof(s5k5ca_reg)/sizeof(s5k5ca_reg[0]))
+#define S5K5CA_UXGA_REGS (sizeof(s5k5ca_reg_uxga)/sizeof(s5k5ca_reg_uxga[0]))
+#define S5K5CA_SVGA_REGS (sizeof(s5k5ca_reg_svga)/sizeof(s5k5ca_reg_svga[0]))
+#define S5K5CA_VGA_REGS (sizeof(s5k5ca_reg_vga)/sizeof(s5k5ca_reg_vga[0]))
+#define S5K5CA_QSVGA_REGS (sizeof(s5k5ca_reg_qsvga)/sizeof(s5k5ca_reg_qsvga[0]))
+
+//#define S5K5CA_RISC_REGS 0xEB
+//#define S5K5CA_ISP_REGS 0xFB /* S5C7323X */
+//#define S5K5CA_CIS_REGS 0x2F /* S5K437LA03 */
+                                                                                                                                                                                              
+//#define S5K5CA_REGS (0x1000)
+
+
+
+//delay 100ms phone SW //
+
+
+s5k5ca_short_t s5k5ca_snapshot_fireworks_00[] = // scene mode fireworks
+{ 
+
+//LowLight
+{ 0xFCFC, 0xD000 }, 
+{ 0x0028, 0x7000 },    
+{ 0x002A, 0x07E6 },
+{ 0x0F12, 0x0028 },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0028 },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+				 
+{ 0x002A, 0x0244 }, //Night capture//
+{ 0x0F12, 0x0002 }, //config 2 //
+{ 0x002A, 0x0230 }, 
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0246 }, 
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0224 }, 
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x0001 },
+
+{ 0xdddd, 0x06A4 }, //delay 1500ms 0304 Night Mode Change 
+
+{ 0xffff, 0xffff },
+};
+
+
+
+
+
+//---------------------------------------//
+// case 23 : FPS_NONFIX                     //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_nonfix_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x0288  },
+{ 0x0F12, 0x0535  },
+{ 0x0F12, 0x029A  },
+
+                  
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0000  }, //config 0 //                                                  
+{ 0x002A, 0x0240  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0230  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x023E  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  }, 
+	
+{ 0xffff, 0xffff  },	
+};
+
+//---------------------------------------//
+// case 23 : FPS_15FIX                   //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_15fix_00[] = 
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x02B8 },
+{ 0x0F12, 0x029A },
+{ 0x0F12, 0x029A },
+
+
+{ 0x002A, 0x023C }, //Normal Preview//
+{ 0x0F12, 0x0001 }, //config 1 //                                                  
+{ 0x002A, 0x0240 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0230 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x023E },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0220 }, 
+{ 0x0F12, 0x0001 },	
+{ 0x002A, 0x0222 }, 
+{ 0x0F12, 0x0001 },
+
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 23 : FPS_7FIX                    //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_fps_7fix_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x02B8  },
+{ 0x0F12, 0x0535  },
+{ 0x0F12, 0x0535  },
+
+
+{ 0x002A, 0x023C  }, //Normal Preview//
+{ 0x0F12, 0x0001  }, //config 1 //                                                  
+{ 0x002A, 0x0240  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0230  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x023E  },
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x0220  }, 
+{ 0x0F12, 0x0001  },	
+{ 0x002A, 0x0222  }, 
+{ 0x0F12, 0x0001  },   
+                  
+{ 0xffff, 0xffff  },
+};
+
+////////////
+// EFFECT_OFF
+////////////
+s5k5ca_short_t s5k5ca_effect_off_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x3286  }, //Pre/Post gamma on(ç›”æ±—)
+{ 0x0F12, 0x0001  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0000  },
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 16 : MonoEffect                  //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_effect_gray_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0001  },
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 20 : NegativeEffect              //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_effect_negative_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0003  },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////
+// EFFECT_SEPIA
+/////////////
+s5k5ca_short_t s5k5ca_effect_sepia_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0004  },
+
+{ 0xffff, 0xffff  },
+};
+
+////////////
+// EFFECT_AQUA
+/////////////
+s5k5ca_short_t s5k5ca_effect_aqua_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0005  },
+
+{ 0xffff, 0xffff  },
+};
+
+//---------------------------------------//
+// case 19 : GREENEffect(sketch)         //
+//---------------------------------------//
+s5k5ca_short_t s5k5ca_effect_sketch_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x3286  },
+{ 0x0F12, 0x0000  },
+{ 0x002A, 0x021E  },
+{ 0x0F12, 0x0006  },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////
+// WB_Auto
+/////////////
+s5k5ca_short_t s5k5ca_wb_auto_00[] = 
+{ 
+{ 0xFCFC, 0xD000  },
+{ 0x0028, 0x7000  },
+{ 0x002A, 0x246E  },
+{ 0x0F12, 0x0001  },
+
+{ 0xffff, 0xffff  },
+};                
+
+///////////
+// WB_Sunny
+//////////
+s5k5ca_short_t s5k5ca_wb_sunny_00[] = 
+{ 
+{ 0xfcfc, 0xd000  }, 
+{ 0x0028, 0x7000  }, 
+{ 0x002a, 0x246E  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x002a, 0x04A0  }, 
+{ 0x0f12, 0x05E0  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0400  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0500  }, //0530
+{ 0x0f12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////
+// WB_Cloudy
+///////////
+s5k5ca_short_t s5k5ca_wb_cloudy_00[] = 
+{ 
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+{ 0x002a, 0x246E  },
+{ 0x0f12, 0x0000  },
+{ 0x002a, 0x04A0  },
+{ 0x0f12, 0x06E0  }, //06B0 
+{ 0x0f12, 0x0001  }, //0001 
+{ 0x0f12, 0x0400  }, //0400 
+{ 0x0f12, 0x0001  }, //0001 
+{ 0x0f12, 0x0448  }, //0460 
+{ 0x0f12, 0x0001  }, //0001 
+
+{ 0xffff, 0xffff  },
+};
+
+////////////
+// WB_Tungsten
+////////////
+s5k5ca_short_t s5k5ca_wb_tungsten_00[] = 
+{ 
+{ 0xfcfc, 0xd000  }, 
+{ 0x0028, 0x7000  }, 
+{ 0x002a, 0x246E  }, 
+{ 0x0f12, 0x0000  }, 
+
+{ 0x002a, 0x04A0  }, 
+{ 0x0f12, 0x03D0  },  //03D0
+{ 0x0f12, 0x0001  },  //0001
+{ 0x0f12, 0x0400  },  //0400
+{ 0x0f12, 0x0001  },  //0001
+{ 0x0f12, 0x0910  },  //0920
+{ 0x0f12, 0x0001  },  //0001 
+                  
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// WB_Flourescent
+///////////////
+s5k5ca_short_t s5k5ca_wb_fluorescent_00[] = 
+{ 
+{ 0xfcfc, 0xd000  }, 
+{ 0x0028, 0x7000  }, 
+{ 0x002a, 0x246E  }, 
+{ 0x0f12, 0x0000  }, 
+                     
+{ 0x002a, 0x04A0  }, 
+{ 0x0f12, 0x0530  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0400  }, 
+{ 0x0f12, 0x0001  }, 
+{ 0x0f12, 0x0800  }, 
+{ 0x0f12, 0x0001  }, 
+
+{ 0xffff, 0xffff  },
+};
+
+
+////////////
+// BR_Minus4
+///////////
+s5k5ca_short_t s5k5ca_br_minus4_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+//////////
+// BR_Minus3
+/////////
+s5k5ca_short_t s5k5ca_br_minus3_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+//////////
+// BR_Minus2
+//////////
+s5k5ca_short_t s5k5ca_br_minus2_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};                
+
+//////////
+// BR_Minus1
+//////////
+s5k5ca_short_t s5k5ca_br_minus1_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_ZERO
+////////
+s5k5ca_short_t s5k5ca_br_zero_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_Plus1
+/////////
+s5k5ca_short_t s5k5ca_br_plus1_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_Plus2
+/////////
+s5k5ca_short_t s5k5ca_br_plus2_00[] = 
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+/////////
+// BR_Plus3
+/////////
+s5k5ca_short_t s5k5ca_br_plus3_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};                
+
+/////////
+// BR_Plus4
+/////////
+s5k5ca_short_t s5k5ca_br_plus4_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+
+////////////////////
+// SCENE_MODE_OFF
+////////////////////
+//////////////////////////////////////////////
+//////////Scene off///////////////////////////
+//////////////////////////////////////////////
+//01.None//
+//02.Sports off
+//03.Night off
+//////////////////////////////////////////////
+////////// CAM_REGSET_SCENE_NORMAL ///////////
+s5k5ca_short_t s5k5ca_scene_mode_off_00[] =
+{ 
+
+{ 0xFCFC, 0xD000 },   //WB Auto
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x246E },
+{ 0x0F12, 0x0001 },
+
+{ 0x0028, 0x7000 },   //For Scene//
+{ 0x002A, 0x020C },   
+{ 0x0F12, 0x0000 },   // Brightness for controling the EV//
+{ 0x002A, 0x0210 },   
+{ 0x0F12, 0x0000 },   // Saturation//
+{ 0x0F12, 0x0000 },   // Blur_Sharpness //  
+	
+///////////////////
+//02. Sports off //
+///////////////////
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x12B8 },  
+{ 0x0F12, 0x1000 }, 
+ 
+{ 0x002A, 0x0530 },   	                                                    
+{ 0x0F12, 0x3415 },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534 },                                                               
+{ 0x0F12, 0x682A },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C },                                                               
+{ 0x0F12, 0x8235 },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680 },                                                               
+{ 0x0F12, 0xc350 },   //MaxExp4   125ms  38ea //                           
+        
+{ 0x002A, 0x0538 },                                                               
+{ 0x0F12, 0x3415 },   // 15fps //                                                 
+{ 0x002A, 0x053C },                                                               
+{ 0x0F12, 0x682A },   // 7.5fps //                                                
+{ 0x002A, 0x1684 },                                                               
+{ 0x0F12, 0x8235 },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688 },                                                               
+{ 0x0F12, 0xC350 },   //CapMaxExp4 //                                             
+
+{ 0x002A, 0x0540 },                                                               
+{ 0x0F12, 0x01B3 },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3 },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C },                                                               
+{ 0x0F12, 0x02A0 },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710 },   //MaxAnGain4 //    
+
+{ 0x002A, 0x0544 },  
+{ 0x0F12, 0x0100 },
+{ 0x0F12, 0x8000 },
+
+{ 0x002A, 0x04B4 },  
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x0064 },
+{ 0x0F12, 0x0001 },
+
+//////////////////
+//03. Night off //
+//////////////////
+
+{ 0x0028, 0x7000 },
+
+{ 0x002A, 0x0530 },//lt_uMaxExp1//     
+{ 0x0F12, 0x3415 },                    
+{ 0x002A, 0x0534 },//lt_uMaxExp2//     
+{ 0x0F12, 0x682A },                    
+{ 0x002A, 0x167C },//lt_uMaxExp3//     
+{ 0x0F12, 0x8235 },                    
+{ 0x002A, 0x1680 },//lt_uMaxExp4//     
+{ 0x0F12, 0xc350 },                    
+{ 0x0F12, 0x0000 },                    
+                                     
+{ 0x002A, 0x0538 },//It_uCapMaxExp1 // 
+{ 0x0F12, 0x3415 },                    
+{ 0x002A, 0x053C },//It_uCapMaxExp2 // 
+{ 0x0F12, 0x682A },                    
+{ 0x002A, 0x1684 },//It_uCapMaxExp3 // 
+{ 0x0F12, 0x8235 },                    
+{ 0x002A, 0x1688 },//It_uCapMaxExp4 // 
+{ 0x0F12, 0xc350 },                    
+{ 0x0F12, 0x0000 },                    
+                                     
+{ 0x002A, 0x0540 },                                                               
+{ 0x0F12, 0x01B3 },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x01B3 },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C },                                                               
+{ 0x0F12, 0x02A0 },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0710 },   //MaxAnGain4 //
+                                     
+{ 0x002A, 0x0544 },                    
+{ 0x0F12, 0x0100 },//It_uMaxDigGain // 
+
+{ 0x002A, 0x07E6 },
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+
+{ 0x002A, 0x0838 },
+{ 0x0F12, 0x003C },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x023C },
+{ 0x0F12, 0x0000 },//REG_TC_GP_ActivePrevConfig     //Normal Preview //  
+{ 0x002A, 0x0240 },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_PrevOpenAfterChange  
+{ 0x002A, 0x0230 },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_NewConfigSync        
+{ 0x002A, 0x023E },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_PrevConfigChanged    
+{ 0x002A, 0x0220 },                                    
+{ 0x0F12, 0x0001 },   //REG_TC_GP_EnablePreview        
+{ 0x0F12, 0x0001 },   //REG_TC_GP_EnablePreviewChanged 
+
+//Metering Center
+{ 0xfcfc, 0xd000 },
+{ 0x0028, 0x7000 },             
+                                                            
+{ 0x002A, 0x0F7E },    //ae weight  //     
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0000 },  //0000
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0201 },  //0201
+{ 0x0F12, 0x0102 },  //0102
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0101 },  //0101
+{ 0x0F12, 0x0201 },  //0101
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0102 },  //0101
+{ 0x0F12, 0x0201 },  //0201
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0202 },  //0202
+{ 0x0F12, 0x0102 },  //0102
+{ 0x0F12, 0x0101 },  //0201
+{ 0x0F12, 0x0101 },  //0202
+{ 0x0F12, 0x0101 },  //0202
+{ 0x0F12, 0x0101 },  //0102
+
+{ 0xffff, 0xffff  },
+};
+
+////////////////////
+// SCENE_PORTRAIT_ON
+///////////////////
+s5k5ca_short_t s5k5ca_scene_portrait_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x020C },
+{ 0x0F12, 0x0000 },
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x0000 },
+{ 0x0F12, 0xFFF6 },
+
+{ 0xffff, 0xffff  },
+};
+
+ 
+////////////////////
+// SCENE_LANDSCAPE_ON
+///////////////////
+s5k5ca_short_t s5k5ca_scene_landscape_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x020C },
+{ 0x0F12, 0x0000 },
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x001E },
+{ 0x0F12, 0x000A },
+
+//Metering Matrix
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+                  
+{ 0x002a, 0x0F7E  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  },
+
+{ 0xffff, 0xffff  }, 
+};
+
+////////////////////
+// NIGHTMODE_ON
+///////////////////
+
+s5k5ca_short_t s5k5ca_nightmode_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },  
+{ 0x002A, 0x02CC },   //Night Preview
+{ 0x0F12, 0x0400 },	//REG_2TC_PCFG_usWidth                      	2   700002CC    // 
+{ 0x0F12, 0x0300 },   //REG_2TC_PCFG_usHeight                     	2   700002CE    // 
+{ 0x0F12, 0x0005 },   //REG_2TC_PCFG_Format                       	2   700002D0    // 
+{ 0x0F12, 0x32E8 },   //REG_2TC_PCFG_usMaxOut4KHzRate             	2   700002D2    // 
+{ 0x0F12, 0x32a8 },   //REG_2TC_PCFG_usMinOut4KHzRate             	2   700002D4    // 
+{ 0x0F12, 0x0100 },   //REG_2TC_PCFG_OutClkPerPix88               	2   700002D6    // 
+{ 0x0F12, 0x0800 },   //REG_2TC_PCFG_uMaxBpp88                    	2   700002D8    // 
+{ 0x0F12, 0x0072 },   //REG_2TC_PCFG_PVIMask                      	2   700002DA    // 
+{ 0x0F12, 0x0010 },   //REG_2TC_PCFG_OIFMask                      	2   700002DC    // 
+{ 0x0F12, 0x01E0 },   //REG_2TC_PCFG_usJpegPacketSize             	2   700002DE    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_usJpegTotalPackets           	2   700002E0    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_uClockInd                    	2   700002E2    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_usFrTimeType                 	2   700002E4    // 
+{ 0x0F12, 0x0001 },   //REG_2TC_PCFG_FrRateQualityType            	2   700002E6    // 
+{ 0x0F12, 0x09C4 },   //REG_2TC_PCFG_usMaxFrTimeMsecMult10        	2   700002E8    // 
+{ 0x0F12, 0x029A },   //REG_2TC_PCFG_usMinFrTimeMsecMult10        	2   700002EA    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_bSmearOutput                 	2   700002EC    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_sSaturation                  	2   700002EE    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_sSharpBlur                   	2   700002F0    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_sColorTemp                   	2   700002F2    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_uDeviceGammaIndex            	2   700002F4    // 
+{ 0x0F12, 0x0003 },   //REG_2TC_PCFG_uPrevMirror                  	2   700002F6    // 
+{ 0x0F12, 0x0003 },   //REG_2TC_PCFG_uCaptureMirror               	2   700002F8    // 
+{ 0x0F12, 0x0000 },   //REG_2TC_PCFG_uRotation                    	2   700002FA    // 
+                 
+{ 0x002A, 0x03B4 },   //Night Capture 
+{ 0x0F12, 0x0000 },	//REG_2TC_CCFG_uCaptureMode                 	2   700003B4          //
+{ 0x0F12, 0x0800 },   //REG_2TC_CCFG_usWidth                      	2   700003B6          //
+{ 0x0F12, 0x0600 },   //REG_2TC_CCFG_usHeight                     	2   700003B8          //
+{ 0x0F12, 0x0005 },   //REG_2TC_CCFG_Format                       	2   700003BA          //
+{ 0x0F12, 0x32E8 },   //REG_2TC_CCFG_usMaxOut4KHzRate             	2   700003BC          //
+{ 0x0F12, 0x32a8 },   //REG_2TC_CCFG_usMinOut4KHzRate             	2   700003BE          //
+{ 0x0F12, 0x0100 },   //REG_2TC_CCFG_OutClkPerPix88               	2   700003C0          //
+{ 0x0F12, 0x0800 },   //REG_2TC_CCFG_uMaxBpp88                    	2   700003C2          //
+{ 0x0F12, 0x0072 },   //REG_2TC_CCFG_PVIMask                      	2   700003C4          //
+{ 0x0F12, 0x0010 },   //REG_2TC_CCFG_OIFMask                      	2   700003C6          //
+{ 0x0F12, 0x01E0 },   //REG_2TC_CCFG_usJpegPacketSize             	2   700003C8          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_usJpegTotalPackets           	2   700003CA          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_uClockInd                    	2   700003CC          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_usFrTimeType                 	2   700003CE          //
+{ 0x0F12, 0x0002 },   //REG_2TC_CCFG_FrRateQualityType            	2   700003D0          //
+{ 0x0F12, 0x1388 },   //REG_2TC_CCFG_usMaxFrTimeMsecMult10        	2   700003D2          //
+{ 0x0F12, 0x1388 },   //REG_2TC_CCFG_usMinFrTimeMsecMult10        	2   700003D4          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_bSmearOutput                 	2   700003D6          //
+{ 0x0F12, 0x0030 },   //REG_2TC_CCFG_sSaturation                  	2   700003D8          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_sSharpBlur                   	2   700003DA          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_sColorTemp                   	2   700003DC          //
+{ 0x0F12, 0x0000 },   //REG_2TC_CCFG_uDeviceGammaIndex            	2   700003DE          //
+                 
+                 
+{ 0x002A, 0x0208 },
+{ 0x0F12, 0x0001 },   //REG_TC_IPRM_InitParamsUpdated//
+                 
+                 
+{ 0x002A, 0x0530 },   //lt_uMaxExp1//     
+{ 0x0F12, 0x3415 },                       
+{ 0x002A, 0x0534 },   //lt_uMaxExp2//     
+{ 0x0F12, 0x682A },                       
+{ 0x002A, 0x167C },   //lt_uMaxExp3//     
+{ 0x0F12, 0x8235 },                       
+{ 0x002A, 0x1680 },   //lt_uMaxExp4//     
+{ 0x0F12, 0x1A80 },                       
+{ 0x0F12, 0x0006 },                       
+                                          
+{ 0x002A, 0x0538 },   //It_uCapMaxExp1 // 
+{ 0x0F12, 0x3415 },                       
+{ 0x002A, 0x053C },   //It_uCapMaxExp2 // 
+{ 0x0F12, 0x682A },                       
+{ 0x002A, 0x1684 },   //It_uCapMaxExp3 // 
+{ 0x0F12, 0x8235 },                       
+{ 0x002A, 0x1688 },   //It_uCapMaxExp4 // 
+{ 0x0F12, 0x1A80 },                       
+{ 0x0F12, 0x0006 },                       
+                                          
+{ 0x002A, 0x0540 },                       
+{ 0x0F12, 0x0180 },   //It_uMaxAnGain1 // 
+{ 0x0F12, 0x0250 },   //It_uMaxAnGain2 // 
+{ 0x002A, 0x168C },                       
+{ 0x0F12, 0x0340 },   //It_uMaxAnGain3 // 
+{ 0x0F12, 0x0800 },   //It_uMaxAnGain4 // 
+                                          
+{ 0x002A, 0x0544 },                       
+{ 0x0F12, 0x0100 },   //It_uMaxDigGain // 
+                 
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x07E6 },
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow                                                                     
+{ 0x0F12, 0x0000 },	//TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+                 
+{ 0x002A, 0x0838 },
+{ 0x0F12, 0x0A3C },	//TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]  
+
+{ 0x002A, 0x023C },
+{ 0x0F12, 0x0002 },  //night preview config 2//
+{ 0x002A, 0x0240 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0230 },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x023E },
+{ 0x0F12, 0x0001 },
+{ 0x002A, 0x0220 },
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x0001 },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////////
+// SCENE_SPORTS_ON
+////////////////
+s5k5ca_short_t s5k5ca_scene_sports_on_00[] =
+{
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+
+{ 0x002A, 0x12B8 },  
+{ 0x0F12, 0x2000 }, 
+
+{ 0x002A, 0x0530 },
+{ 0x0F12, 0x36B0 },   //lt_uMaxExp1	32 30ms  9~10ea// 15fps  // 
+{ 0x002A, 0x0534 },                                                               
+{ 0x0F12, 0x36B0 },   //lt_uMaxExp2	67 65ms	18~20ea // 7.5fps //
+{ 0x002A, 0x167C },                                                               
+{ 0x0F12, 0x36B0 },   //9C40//MaxExp3  83 80ms  24~25ea //                 
+{ 0x002A, 0x1680 },                                                               
+{ 0x0F12, 0x36B0 },   //MaxExp4   125ms  38ea //                           
+        
+{ 0x002A, 0x0538 },                                                               
+{ 0x0F12, 0x36B0 },   // 15fps //                                                 
+{ 0x002A, 0x053C },                                                               
+{ 0x0F12, 0x36B0 },   // 7.5fps //                                                
+{ 0x002A, 0x1684 },                                                               
+{ 0x0F12, 0x36B0 },   //CapMaxExp3 //                                             
+{ 0x002A, 0x1688 },                                                               
+{ 0x0F12, 0x36B0 },   //CapMaxExp4 //                                             
+ 
+{ 0x002A, 0x0540 },                                                               
+{ 0x0F12, 0x0200 },    //0170//0150//lt_uMaxAnGain1_700lux//                                              
+{ 0x0F12, 0x0200 },   //0200//0400//lt_uMaxAnGain2_400lux//                              
+{ 0x002A, 0x168C },                                                               
+{ 0x0F12, 0x0200 },   //0300//MaxAnGain3_200lux//                                       
+{ 0x0F12, 0x0200 },   //MaxAnGain4 //    
+
+{ 0x002A, 0x0544 },  
+{ 0x0F12, 0x0100 },
+{ 0x0F12, 0x8000 },
+
+{ 0x002A, 0x04B4 },  
+{ 0x0F12, 0x0001 },
+{ 0x0F12, 0x00C8 },
+{ 0x0F12, 0x0001 },
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////////
+// SCENE_SUNSET_ON
+////////////////
+s5k5ca_short_t s5k5ca_scene_sunset_on_00[] =
+{ 
+{ 0xfcfc, 0xd000 },
+{ 0x0028, 0x7000 },
+{ 0x002a, 0x246E },
+{ 0x0f12, 0x0000 },
+                 
+{ 0x002a, 0x04A0 },
+{ 0x0f12, 0x05E0 },
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0400 },
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0500 },
+{ 0x0f12, 0x0001 },
+
+{ 0xffff, 0xffff  },
+};
+
+////////////////
+// SCENE_DAWN_ON
+////////////////
+s5k5ca_short_t s5k5ca_scene_dawn_on_00[] =
+{ 
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+
+//////////////////////
+// SCENE_AGAINSTLIGHT_ON
+//////////////////////
+s5k5ca_short_t s5k5ca_scene_againstlight_on_00[] =
+{ 
+//NOT USE
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_TEXT_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_text_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x020C },
+{ 0x0F12, 0x0000 },
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x0000 },
+{ 0x0F12, 0x0014 },
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_PARTY_INDOOR_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_party_indoor_on_00[] =
+{ 
+{ 0xFCFC, 0xD000 },
+                    // Party/indoor _ Shaturation +1
+{ 0x0028, 0x7000 }, //For Scene
+{ 0x002A, 0x020C },             
+{ 0x0F12, 0x0000 }, // Brightness for controling the EV
+{ 0x002A, 0x0210 }, 
+{ 0x0F12, 0x001e }, // Saturagon
+{ 0x0F12, 0x0000 }, // Sharpness
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_BEACH_SNOW_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_beach_snow_on_00[] =
+{ 
+//04. BEACH_SNOW
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 }, //For Scene
+{ 0x002A, 0x020C },             
+{ 0x0F12, 0x0014 }, // Brightness for controling the EV
+{ 0x002A, 0x0210 }, 
+{ 0x0F12, 0x001e }, // Saturagon
+{ 0x0F12, 0x0000 }, // Sharpness
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_CANDLELIGHT_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_candlelight_on_00[] =
+{ 
+
+{ 0xfcfc, 0xd000 }, 
+{ 0x0028, 0x7000 }, 
+{ 0x002a, 0x246E }, 	 
+{ 0x0f12, 0x0000 },
+
+{ 0x002a, 0x04A0 }, 	 
+{ 0x0f12, 0x05E0 },
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0400 }, 
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0500 },
+{ 0x0f12, 0x0001 }, 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_FIREWORKS_ON
+///////////////
+s5k5ca_short_t s5k5ca_scene_fireworks_on_00[] =
+{ 
+//09. FIRE _ Preview : (4fps Exposure 250ms) Capture : ( 1fps Exposure 1000ms )
+//Preview 4fps : Capture 1fps
+{ 0xFCFC, 0xD000 },
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x02CC },
+{ 0x0F12, 0x0400 },    	//REG_2TC_PCFG_usWidth                      	2   700002CC        //
+{ 0x0F12, 0x0300 },    	//REG_2TC_PCFG_usHeight                     	2   700002CE        //
+{ 0x0F12, 0x0005 },    	//REG_2TC_PCFG_Format                       	2   700002D0        //
+{ 0x0F12, 0x32E8 },    	//REG_2TC_PCFG_usMaxOut4KHzRate             	2   700002D2        //
+{ 0x0F12, 0x32a8 },    	//REG_2TC_PCFG_usMinOut4KHzRate             	2   700002D4        //
+{ 0x0F12, 0x0100 },    	//REG_2TC_PCFG_OutClkPerPix88               	2   700002D6        //
+{ 0x0F12, 0x0800 },    	//REG_2TC_PCFG_uMaxBpp88                    	2   700002D8        //
+{ 0x0F12, 0x0072 },    	//REG_2TC_PCFG_PVIMask                      	2   700002DA        //
+{ 0x0F12, 0x0010 },    	//REG_2TC_PCFG_OIFMask                      	2   700002DC        //
+{ 0x0F12, 0x01E0 },    	//REG_2TC_PCFG_usJpegPacketSize             	2   700002DE        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_usJpegTotalPackets           	2   700002E0        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_uClockInd                    	2   700002E2        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_usFrTimeType                 	2   700002E4        //
+{ 0x0F12, 0x0001 },    	//REG_2TC_PCFG_FrRateQualityType            	2   700002E6        //
+{ 0x0F12, 0x09C4 },    	//REG_2TC_PCFG_usMaxFrTimeMsecMult10        	2   700002E8        //
+{ 0x0F12, 0x029A },    	//REG_2TC_PCFG_usMinFrTimeMsecMult10        	2   700002EA        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_bSmearOutput                 	2   700002EC        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_sSaturation                  	2   700002EE        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_sSharpBlur                   	2   700002F0        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_sColorTemp                   	2   700002F2        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_uDeviceGammaIndex            	2   700002F4        //
+{ 0x0F12, 0x0003 },    	//REG_2TC_PCFG_uPrevMirror                  	2   700002F6        //
+{ 0x0F12, 0x0003 },    	//REG_2TC_PCFG_uCaptureMirror               	2   700002F8        //
+{ 0x0F12, 0x0000 },    	//REG_2TC_PCFG_uRotation                    	2   700002FA        //
+
+//Night shot capture 2fps
+{ 0x002A, 0x03B4 },
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_uCaptureMode                 	2   700003B4              //
+{ 0x0F12, 0x0800 },    	//REG_2TC_CCFG_usWidth                      	2   700003B6              //
+{ 0x0F12, 0x0600 },    	//REG_2TC_CCFG_usHeight                     	2   700003B8              //
+{ 0x0F12, 0x0005 },    	//REG_2TC_CCFG_Format                       	2   700003BA              //
+{ 0x0F12, 0x32E8 },    	//REG_2TC_CCFG_usMaxOut4KHzRate             	2   700003BC              //
+{ 0x0F12, 0x32a8 },    	//REG_2TC_CCFG_usMinOut4KHzRate             	2   700003BE              //
+{ 0x0F12, 0x0100 },    	//REG_2TC_CCFG_OutClkPerPix88               	2   700003C0              //
+{ 0x0F12, 0x0800 },    	//REG_2TC_CCFG_uMaxBpp88                    	2   700003C2              //
+{ 0x0F12, 0x0072 },    	//REG_2TC_CCFG_PVIMask                      	2   700003C4              //
+{ 0x0F12, 0x0010 },    	//REG_2TC_CCFG_OIFMask                      	2   700003C6              //
+{ 0x0F12, 0x01E0 },    	//REG_2TC_CCFG_usJpegPacketSize             	2   700003C8              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_usJpegTotalPackets           	2   700003CA              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_uClockInd                    	2   700003CC              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_usFrTimeType                 	2   700003CE              //
+{ 0x0F12, 0x0002 },    	//REG_2TC_CCFG_FrRateQualityType            	2   700003D0              //
+{ 0x0F12, 0x2710 },	//REG_2TC_CCFG_usMaxFrTimeMsecMult10        	2   700003D2              //
+{ 0x0F12, 0x2710 },	//REG_2TC_CCFG_usMinFrTimeMsecMult10        	2   700003D4              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_bSmearOutput                 	2   700003D6              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_sSaturation                  	2   700003D8              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_sSharpBlur                   	2   700003DA              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_sColorTemp                   	2   700003DC              //
+{ 0x0F12, 0x0000 },    	//REG_2TC_CCFG_uDeviceGammaIndex            	2   700003DE              //
+
+{ 0x002A, 0x0208 },                                      
+{ 0x0F12, 0x0001 },       //REG_TC_IPRM_InitParamsUpdated//
+
+{ 0x002A, 0x0530 },	//lt_uMaxExp1             
+{ 0x0F12, 0x3415 },		
+{ 0x002A, 0x0534 },       //lt_uMaxExp2              
+{ 0x0F12, 0x682A },		
+{ 0x002A, 0x167C },       //lt_uMaxExp3              
+{ 0x0F12, 0x8235 },		
+{ 0x002A, 0x1680 },       //lt_uMaxExp4              
+{ 0x0F12, 0x1A80 },       //1fps
+{ 0x0F12, 0x0006 },
+                              
+{ 0x002A, 0x0538 },       //It_uCapMaxExp1 //              
+{ 0x0F12, 0x3415 },	  
+{ 0x002A, 0x053C },       //It_uCapMaxExp1 //             
+{ 0x0F12, 0x682A },	  
+{ 0x002A, 0x1684 },       //It_uCapMaxExp3 //              
+{ 0x0F12, 0x8235 },	
+{ 0x002A, 0x1688 },       //It_uCapMaxExp4 //             
+{ 0x0F12, 0x1A80 },       //1fps
+{ 0x0F12, 0x0006 },	
+                              
+{ 0x002A, 0x0540 },                     
+{ 0x0F12, 0x0180 },       //It_uMaxAnGain1 //
+{ 0x0F12, 0x0250 },	//It_uMaxAnGain2 //
+{ 0x002A, 0x168C },                     
+{ 0x0F12, 0x0340 },	//It_uMaxAnGain3 //
+{ 0x0F12, 0x0710 },	//It_uMaxAnGain4 //
+
+{ 0x002A, 0x0544 },       //It_uMaxDigGain //
+{ 0x0F12, 0x0100 },
+
+{ 0x0028, 0x7000 },
+{ 0x002A, 0x023C },
+{ 0x0F12, 0x0002 },	//#REG_TC_GP_ActivePrevConfig     //Night Preview
+{ 0x002A, 0x0240 },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_PrevOpenAfterChange
+{ 0x002A, 0x0230 },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_NewConfigSync
+{ 0x002A, 0x023E },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_PrevConfigChanged
+{ 0x002A, 0x0220 },
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_EnablePreview
+{ 0x0F12, 0x0001 },	//#REG_TC_GP_EnablePreviewChanged
+ 
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_Dust_Dawn_On
+///////////////
+s5k5ca_short_t s5k5ca_scene_dust_dawn_00[] =
+{ 
+//Cam_Cfg_WB_Fluorescent
+{ 0xfcfc, 0xd000 }, 
+{ 0x0028, 0x7000 }, 
+{ 0x002a, 0x246E }, 	 
+{ 0x0f12, 0x0000 },
+
+{ 0x002a, 0x04A0 }, 	 
+{ 0x0f12, 0x0530 }, 
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0400 }, 
+{ 0x0f12, 0x0001 },
+{ 0x0f12, 0x0800 }, 
+{ 0x0f12, 0x0001 }, 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_Fall_Color_On
+///////////////
+s5k5ca_short_t s5k5ca_scene_fall_color_00[] =
+{ 
+//07. FALL
+{ 0xFCFC, 0xD000 },
+//  Fall  _ Saturation +2
+{ 0x0028, 0x7000 }, //For Scene
+{ 0x002A, 0x020C },             
+{ 0x0F12, 0x0000 }, // Brightness for controling the EV
+{ 0x002A, 0x0210 },
+{ 0x0F12, 0x0032 }, // Saturation
+{ 0x0F12, 0x0000 }, // Sharpness
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////
+// SCENE_Backlight_On
+///////////////
+s5k5ca_short_t s5k5ca_scene_backlight_00[] =
+{ 
+//Metering Center
+//Flash On Default
+{ 0xfcfc, 0xd000 },
+{ 0x0028, 0x7000 },
+                 
+{ 0x002A, 0x0F7E  },    //ae weight  //     
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0201
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0102
+
+{ 0xffff, 0xffff  },
+};
+
+
+
+
+////////////////////////
+// MeasureBrightness_SPOT
+///////////////////////
+s5k5ca_short_t s5k5ca_measure_brightness_spot_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+///////////////////////////
+// MeasureBrightness_Default
+//////////////////////////
+s5k5ca_short_t s5k5ca_measure_brightness_default_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+#if 1//PGH 
+s5k5ca_short_t s5k5ca_ae_awb_unlock[] = 
+{
+{ 0xffff, 0xffff  },
+
+};
+ 
+s5k5ca_short_t s5k5ca_ae_mwb_unlock[] = 
+{
+{ 0xffff, 0xffff  },
+
+};
+ 
+s5k5ca_short_t s5k5ca_ae_awb_lock[] = 
+{
+{ 0xffff, 0xffff  },
+
+};
+#endif//PGH
+
+
+s5k5ca_short_t s5k5ca_af_low_lux_val[] = 
+{ //0217 SEMCO
+
+{ 0xffff, 0xffff  },
+};
+	 
+s5k5ca_short_t s5k5ca_af_normal_lux_val[] = 
+{
+
+{ 0xffff, 0xffff  },
+};
+
+/////////////////////////////
+// MeasureBrightness_CENTER
+/////////////////////////////
+s5k5ca_short_t s5k5ca_measure_brightness_center_00[] =
+{ 
+
+{ 0xffff, 0xffff  },
+};
+
+// 0407 function add.
+
+s5k5ca_short_t s5k5ca_metering_spot[] =
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+                    
+{ 0x002A, 0x0F7E  },
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0f01  }, 
+{ 0x0f12, 0x010f  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0f01  }, 
+{ 0x0f12, 0x010f  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  }, 
+{ 0x0f12, 0x0000  },
+
+{ 0xffff, 0xffff  },
+
+};
+
+s5k5ca_short_t s5k5ca_metering_matrix[] = 
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },
+                  
+{ 0x002a, 0x0F7E  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  }, 
+{ 0x0f12, 0x0101  },
+
+{ 0xffff, 0xffff  },
+
+};
+
+s5k5ca_short_t s5k5ca_metering_center[] = 
+{
+{ 0xfcfc, 0xd000  },
+{ 0x0028, 0x7000  },             
+                                                             
+{ 0x002A, 0x0F7E  },    //ae weight  //     
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0000  },  //0000
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0101  },  //0101
+{ 0x0F12, 0x0201  },  //0101
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0101
+{ 0x0F12, 0x0201  },  //0201
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0202  },  //0202
+{ 0x0F12, 0x0102  },  //0102
+{ 0x0F12, 0x0101  },  //0201
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0202
+{ 0x0F12, 0x0101  },  //0102
+
+{ 0xffff, 0xffff  },
+
+};
+
+
+
+
+
+//define S5K5CA_INIT_REGS (sizeof(s5k5ca_reg)/sizeof(s5k5ca_reg[0]))
+//define S5K5CA_UXGA_REGS (sizeof(s5k5ca_reg_uxga)/sizeof(s5k5ca_reg_uxga[0]))
+//define S5K5CA_SVGA_REGS (sizeof(s5k5ca_reg_svga)/sizeof(s5k5ca_reg_svga[0]))
+//define S5K5CA_VGA_REGS (sizeof(s5k5ca_reg_vga)/sizeof(s5k5ca_reg_vga[0]))
+//define S5K5CA_QSVGA_REGS (sizeof(s5k5ca_reg_qsvga)/sizeof(s5k5ca_reg_qsvga[0]))
+
+////define S5K5CA_RISC_REGS 0xEB
+////define S5K5CA_ISP_REGS 0xFB /* S5C7323X */
+////define S5K5CA_CIS_REGS 0x2F /* S5K437LA03 */
+                                                                                                                                                                                              
+////define S5K5CA_REGS (0x1000)
+
+//endif
+
+
+
+#endif
diff -uNra linux-3.0.82/drivers/media/video/s5k5ca_sunny_reg.c linux-3.0.82x/drivers/media/video/s5k5ca_sunny_reg.c
--- linux-3.0.82/drivers/media/video/s5k5ca_sunny_reg.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/s5k5ca_sunny_reg.c	2017-09-23 03:42:49.614676298 +0800
@@ -0,0 +1,3443 @@
+
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "s5k5ca_0723.h"
+#define S5K5CA_ARRAY_SIZE_2(x) (sizeof(x) / sizeof(x[0]))
+
+struct s5k5ca_i2c_reg_conf s5k5ca_init_reg_config_sunny_settings[] =
+{
+    // Start T&P part
+    {0x0028, 0x7000},
+    {0x002A, 0x2CF8},
+    {0x0F12, 0xB510},
+    {0x0F12, 0x4827},
+    {0x0F12, 0x21C0},
+    {0x0F12, 0x8041},
+    {0x0F12, 0x4825},
+    {0x0F12, 0x4A26},
+    {0x0F12, 0x3020},
+    {0x0F12, 0x8382},
+    {0x0F12, 0x1D12},
+    {0x0F12, 0x83C2},
+    {0x0F12, 0x4822},
+    {0x0F12, 0x3040},
+    {0x0F12, 0x8041},
+    {0x0F12, 0x4821},
+    {0x0F12, 0x4922},
+    {0x0F12, 0x3060},
+    {0x0F12, 0x8381},
+    {0x0F12, 0x1D09},
+    {0x0F12, 0x83C1},
+    {0x0F12, 0x4821},
+    {0x0F12, 0x491D},
+    {0x0F12, 0x8802},
+    {0x0F12, 0x3980},
+    {0x0F12, 0x804A},
+    {0x0F12, 0x8842},
+    {0x0F12, 0x808A},
+    {0x0F12, 0x8882},
+    {0x0F12, 0x80CA},
+    {0x0F12, 0x88C2},
+    {0x0F12, 0x810A},
+    {0x0F12, 0x8902},
+    {0x0F12, 0x491C},
+    {0x0F12, 0x80CA},
+    {0x0F12, 0x8942},
+    {0x0F12, 0x814A},
+    {0x0F12, 0x8982},
+    {0x0F12, 0x830A},
+    {0x0F12, 0x89C2},
+    {0x0F12, 0x834A},
+    {0x0F12, 0x8A00},
+    {0x0F12, 0x4918},
+    {0x0F12, 0x8188},
+    {0x0F12, 0x4918},
+    {0x0F12, 0x4819},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xFA0E},
+    {0x0F12, 0x4918},
+    {0x0F12, 0x4819},
+    {0x0F12, 0x6341},
+    {0x0F12, 0x4919},
+    {0x0F12, 0x4819},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xFA07},
+    {0x0F12, 0x4816},
+    {0x0F12, 0x4918},
+    {0x0F12, 0x3840},
+    {0x0F12, 0x62C1},
+    {0x0F12, 0x4918},
+    {0x0F12, 0x3880},
+    {0x0F12, 0x63C1},
+    {0x0F12, 0x4917},
+    {0x0F12, 0x6301},
+    {0x0F12, 0x4917},
+    {0x0F12, 0x3040},
+    {0x0F12, 0x6181},
+    {0x0F12, 0x4917},
+    {0x0F12, 0x4817},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF9F7},
+    {0x0F12, 0x4917},
+    {0x0F12, 0x4817},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF9F3},
+    {0x0F12, 0x4917},
+    {0x0F12, 0x4817},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF9EF},
+    {0x0F12, 0xBC10},
+    {0x0F12, 0xBC08},
+    {0x0F12, 0x4718},
+    {0x0F12, 0x1100},
+    {0x0F12, 0xD000},
+    {0x0F12, 0x267C},
+    {0x0F12, 0x0000},
+    {0x0F12, 0x2CE8},
+    {0x0F12, 0x0000},
+    {0x0F12, 0x3274},
+    {0x0F12, 0x7000},
+    {0x0F12, 0xF400},
+    {0x0F12, 0xD000},
+    {0x0F12, 0xF520},
+    {0x0F12, 0xD000},
+    {0x0F12, 0x2DF1},
+    {0x0F12, 0x7000},
+    {0x0F12, 0x89A9},
+    {0x0F12, 0x0000},
+    {0x0F12, 0x2E43},
+    {0x0F12, 0x7000},
+    {0x0F12, 0x0140},
+    {0x0F12, 0x7000},
+    {0x0F12, 0x2E7D},
+    {0x0F12, 0x7000},
+    {0x0F12, 0xB4F7},
+    {0x0F12, 0x0000},
+    {0x0F12, 0x2F07},
+    {0x0F12, 0x7000},
+    {0x0F12, 0x2F2B},
+    {0x0F12, 0x7000},
+    {0x0F12, 0x2FD1},
+    {0x0F12, 0x7000},
+    {0x0F12, 0x2FE5},
+    {0x0F12, 0x7000},
+    {0x0F12, 0x2FB9},
+    {0x0F12, 0x7000},
+    {0x0F12, 0x013D},
+    {0x0F12, 0x0001},
+    {0x0F12, 0x306B},
+    {0x0F12, 0x7000},
+    {0x0F12, 0x5823},
+    {0x0F12, 0x0000},
+    {0x0F12, 0x30B9},
+    {0x0F12, 0x7000},
+    {0x0F12, 0xD789},
+    {0x0F12, 0x0000},
+    {0x0F12, 0xB570},
+    {0x0F12, 0x6804},
+    {0x0F12, 0x6845},
+    {0x0F12, 0x6881},
+    {0x0F12, 0x6840},
+    {0x0F12, 0x2900},
+    {0x0F12, 0x6880},
+    {0x0F12, 0xD007},
+    {0x0F12, 0x49C3},
+    {0x0F12, 0x8949},
+    {0x0F12, 0x084A},
+    {0x0F12, 0x1880},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF9BA},
+    {0x0F12, 0x80A0},
+    {0x0F12, 0xE000},
+    {0x0F12, 0x80A0},
+    {0x0F12, 0x88A0},
+    {0x0F12, 0x2800},
+    {0x0F12, 0xD010},
+    {0x0F12, 0x68A9},
+    {0x0F12, 0x6828},
+    {0x0F12, 0x084A},
+    {0x0F12, 0x1880},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF9AE},
+    {0x0F12, 0x8020},
+    {0x0F12, 0x1D2D},
+    {0x0F12, 0xCD03},
+    {0x0F12, 0x084A},
+    {0x0F12, 0x1880},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF9A7},
+    {0x0F12, 0x8060},
+    {0x0F12, 0xBC70},
+    {0x0F12, 0xBC08},
+    {0x0F12, 0x4718},
+    {0x0F12, 0x2000},
+    {0x0F12, 0x8060},
+    {0x0F12, 0x8020},
+    {0x0F12, 0xE7F8},
+    {0x0F12, 0xB510},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF9A2},
+    {0x0F12, 0x48B2},
+    {0x0F12, 0x8A40},
+    {0x0F12, 0x2800},
+    {0x0F12, 0xD00C},
+    {0x0F12, 0x48B1},
+    {0x0F12, 0x49B2},
+    {0x0F12, 0x8800},
+    {0x0F12, 0x4AB2},
+    {0x0F12, 0x2805},
+    {0x0F12, 0xD003},
+    {0x0F12, 0x4BB1},
+    {0x0F12, 0x795B},
+    {0x0F12, 0x2B00},
+    {0x0F12, 0xD005},
+    {0x0F12, 0x2001},
+    {0x0F12, 0x8008},
+    {0x0F12, 0x8010},
+    {0x0F12, 0xBC10},
+    {0x0F12, 0xBC08},
+    {0x0F12, 0x4718},
+    {0x0F12, 0x2800},
+    {0x0F12, 0xD1FA},
+    {0x0F12, 0x2000},
+    {0x0F12, 0x8008},
+    {0x0F12, 0x8010},
+    {0x0F12, 0xE7F6},
+    {0x0F12, 0xB5F8},
+    {0x0F12, 0x2407},
+    {0x0F12, 0x2C06},
+    {0x0F12, 0xD035},
+    {0x0F12, 0x2C07},
+    {0x0F12, 0xD033},
+    {0x0F12, 0x48A3},
+    {0x0F12, 0x8BC1},
+    {0x0F12, 0x2900},
+    {0x0F12, 0xD02A},
+    {0x0F12, 0x00A2},
+    {0x0F12, 0x1815},
+    {0x0F12, 0x4AA4},
+    {0x0F12, 0x6DEE},
+    {0x0F12, 0x8A92},
+    {0x0F12, 0x4296},
+    {0x0F12, 0xD923},
+    {0x0F12, 0x0028},
+    {0x0F12, 0x3080},
+    {0x0F12, 0x0007},
+    {0x0F12, 0x69C0},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF96B},
+    {0x0F12, 0x1C71},
+    {0x0F12, 0x0280},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF967},
+    {0x0F12, 0x0006},
+    {0x0F12, 0x4898},
+    {0x0F12, 0x0061},
+    {0x0F12, 0x1808},
+    {0x0F12, 0x8D80},
+    {0x0F12, 0x0A01},
+    {0x0F12, 0x0600},
+    {0x0F12, 0x0E00},
+    {0x0F12, 0x1A08},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF96A},
+    {0x0F12, 0x0002},
+    {0x0F12, 0x6DE9},
+    {0x0F12, 0x6FE8},
+    {0x0F12, 0x1A08},
+    {0x0F12, 0x4351},
+    {0x0F12, 0x0300},
+    {0x0F12, 0x1C49},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF953},
+    {0x0F12, 0x0401},
+    {0x0F12, 0x0430},
+    {0x0F12, 0x0C00},
+    {0x0F12, 0x4301},
+    {0x0F12, 0x61F9},
+    {0x0F12, 0xE004},
+    {0x0F12, 0x00A2},
+    {0x0F12, 0x4990},
+    {0x0F12, 0x1810},
+    {0x0F12, 0x3080},
+    {0x0F12, 0x61C1},
+    {0x0F12, 0x1E64},
+    {0x0F12, 0xD2C5},
+    {0x0F12, 0x2006},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF959},
+    {0x0F12, 0x2007},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF956},
+    {0x0F12, 0xBCF8},
+    {0x0F12, 0xBC08},
+    {0x0F12, 0x4718},
+    {0x0F12, 0xB510},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF958},
+    {0x0F12, 0x2800},
+    {0x0F12, 0xD00A},
+    {0x0F12, 0x4881},
+    {0x0F12, 0x8B81},
+    {0x0F12, 0x0089},
+    {0x0F12, 0x1808},
+    {0x0F12, 0x6DC1},
+    {0x0F12, 0x4883},
+    {0x0F12, 0x8A80},
+    {0x0F12, 0x4281},
+    {0x0F12, 0xD901},
+    {0x0F12, 0x2001},
+    {0x0F12, 0xE7A1},
+    {0x0F12, 0x2000},
+    {0x0F12, 0xE79F},
+    {0x0F12, 0xB5F8},
+    {0x0F12, 0x0004},
+    {0x0F12, 0x4F80},
+    {0x0F12, 0x227D},
+    {0x0F12, 0x8938},
+    {0x0F12, 0x0152},
+    {0x0F12, 0x4342},
+    {0x0F12, 0x487E},
+    {0x0F12, 0x9000},
+    {0x0F12, 0x8A01},
+    {0x0F12, 0x0848},
+    {0x0F12, 0x1810},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF91D},
+    {0x0F12, 0x210F},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF940},
+    {0x0F12, 0x497A},
+    {0x0F12, 0x8C49},
+    {0x0F12, 0x090E},
+    {0x0F12, 0x0136},
+    {0x0F12, 0x4306},
+    {0x0F12, 0x4979},
+    {0x0F12, 0x2C00},
+    {0x0F12, 0xD003},
+    {0x0F12, 0x2001},
+    {0x0F12, 0x0240},
+    {0x0F12, 0x4330},
+    {0x0F12, 0x8108},
+    {0x0F12, 0x4876},
+    {0x0F12, 0x2C00},
+    {0x0F12, 0x8D00},
+    {0x0F12, 0xD001},
+    {0x0F12, 0x2501},
+    {0x0F12, 0xE000},
+    {0x0F12, 0x2500},
+    {0x0F12, 0x4972},
+    {0x0F12, 0x4328},
+    {0x0F12, 0x8008},
+    {0x0F12, 0x207D},
+    {0x0F12, 0x00C0},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF92E},
+    {0x0F12, 0x2C00},
+    {0x0F12, 0x496E},
+    {0x0F12, 0x0328},
+    {0x0F12, 0x4330},
+    {0x0F12, 0x8108},
+    {0x0F12, 0x88F8},
+    {0x0F12, 0x2C00},
+    {0x0F12, 0x01AA},
+    {0x0F12, 0x4310},
+    {0x0F12, 0x8088},
+    {0x0F12, 0x9800},
+    {0x0F12, 0x8A01},
+    {0x0F12, 0x486A},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF8F1},
+    {0x0F12, 0x496A},
+    {0x0F12, 0x8809},
+    {0x0F12, 0x4348},
+    {0x0F12, 0x0400},
+    {0x0F12, 0x0C00},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF918},
+    {0x0F12, 0x0020},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF91D},
+    {0x0F12, 0x4866},
+    {0x0F12, 0x7004},
+    {0x0F12, 0xE7A3},
+    {0x0F12, 0xB510},
+    {0x0F12, 0x0004},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF91E},
+    {0x0F12, 0x6020},
+    {0x0F12, 0x4963},
+    {0x0F12, 0x8B49},
+    {0x0F12, 0x0789},
+    {0x0F12, 0xD001},
+    {0x0F12, 0x0040},
+    {0x0F12, 0x6020},
+    {0x0F12, 0xE74C},
+    {0x0F12, 0xB510},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF91B},
+    {0x0F12, 0x485F},
+    {0x0F12, 0x8880},
+    {0x0F12, 0x0601},
+    {0x0F12, 0x4854},
+    {0x0F12, 0x1609},
+    {0x0F12, 0x8141},
+    {0x0F12, 0xE742},
+    {0x0F12, 0xB5F8},
+    {0x0F12, 0x000F},
+    {0x0F12, 0x4C55},
+    {0x0F12, 0x3420},
+    {0x0F12, 0x2500},
+    {0x0F12, 0x5765},
+    {0x0F12, 0x0039},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF913},
+    {0x0F12, 0x9000},
+    {0x0F12, 0x2600},
+    {0x0F12, 0x57A6},
+    {0x0F12, 0x4C4C},
+    {0x0F12, 0x42AE},
+    {0x0F12, 0xD01B},
+    {0x0F12, 0x4D54},
+    {0x0F12, 0x8AE8},
+    {0x0F12, 0x2800},
+    {0x0F12, 0xD013},
+    {0x0F12, 0x484D},
+    {0x0F12, 0x8A01},
+    {0x0F12, 0x8B80},
+    {0x0F12, 0x4378},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF8B5},
+    {0x0F12, 0x89A9},
+    {0x0F12, 0x1A41},
+    {0x0F12, 0x484E},
+    {0x0F12, 0x3820},
+    {0x0F12, 0x8AC0},
+    {0x0F12, 0x4348},
+    {0x0F12, 0x17C1},
+    {0x0F12, 0x0D89},
+    {0x0F12, 0x1808},
+    {0x0F12, 0x1280},
+    {0x0F12, 0x8961},
+    {0x0F12, 0x1A08},
+    {0x0F12, 0x8160},
+    {0x0F12, 0xE003},
+    {0x0F12, 0x88A8},
+    {0x0F12, 0x0600},
+    {0x0F12, 0x1600},
+    {0x0F12, 0x8160},
+    {0x0F12, 0x200A},
+    {0x0F12, 0x5E20},
+    {0x0F12, 0x42B0},
+    {0x0F12, 0xD011},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF8AB},
+    {0x0F12, 0x1D40},
+    {0x0F12, 0x00C3},
+    {0x0F12, 0x1A18},
+    {0x0F12, 0x214B},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF897},
+    {0x0F12, 0x211F},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF8BA},
+    {0x0F12, 0x210A},
+    {0x0F12, 0x5E61},
+    {0x0F12, 0x0FC9},
+    {0x0F12, 0x0149},
+    {0x0F12, 0x4301},
+    {0x0F12, 0x483D},
+    {0x0F12, 0x81C1},
+    {0x0F12, 0x9800},
+    {0x0F12, 0xE74A},
+    {0x0F12, 0xB5F1},
+    {0x0F12, 0xB082},
+    {0x0F12, 0x2500},
+    {0x0F12, 0x483A},
+    {0x0F12, 0x9001},
+    {0x0F12, 0x2400},
+    {0x0F12, 0x2028},
+    {0x0F12, 0x4368},
+    {0x0F12, 0x4A39},
+    {0x0F12, 0x4925},
+    {0x0F12, 0x1887},
+    {0x0F12, 0x1840},
+    {0x0F12, 0x9000},
+    {0x0F12, 0x9800},
+    {0x0F12, 0x0066},
+    {0x0F12, 0x9A01},
+    {0x0F12, 0x1980},
+    {0x0F12, 0x218C},
+    {0x0F12, 0x5A09},
+    {0x0F12, 0x8A80},
+    {0x0F12, 0x8812},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF8CA},
+    {0x0F12, 0x53B8},
+    {0x0F12, 0x1C64},
+    {0x0F12, 0x2C14},
+    {0x0F12, 0xDBF1},
+    {0x0F12, 0x1C6D},
+    {0x0F12, 0x2D03},
+    {0x0F12, 0xDBE6},
+    {0x0F12, 0x9802},
+    {0x0F12, 0x6800},
+    {0x0F12, 0x0600},
+    {0x0F12, 0x0E00},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF8C5},
+    {0x0F12, 0xBCFE},
+    {0x0F12, 0xBC08},
+    {0x0F12, 0x4718},
+    {0x0F12, 0xB570},
+    {0x0F12, 0x6805},
+    {0x0F12, 0x2404},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF8C5},
+    {0x0F12, 0x2800},
+    {0x0F12, 0xD103},
+    {0x0F12, 0xF000},
+    {0x0F12, 0xF8C9},
+    {0x0F12, 0x2800},
+    {0x0F12, 0xD000},
+    {0x0F12, 0x2400},
+    {0x0F12, 0x3540},
+    {0x0F12, 0x88E8},
+    {0x0F12, 0x0500},
+    {0x0F12, 0xD403},
+    {0x0F12, 0x4822},
+    {0x0F12, 0x89C0},
+    {0x0F12, 0x2800},
+    {0x0F12, 0xD002},
+    {0x0F12, 0x2008},
+    {0x0F12, 0x4304},
+    {0x0F12, 0xE001},
+    {0x0F12, 0x2010},
+    {0x0F12, 0x4304},
+    {0x0F12, 0x481F},
+    {0x0F12, 0x8B80},
+    {0x0F12, 0x0700},
+    {0x0F12, 0x0F81},
+    {0x0F12, 0x2001},
+    {0x0F12, 0x2900},
+    {0x0F12, 0xD000},
+    {0x0F12, 0x4304},
+    {0x0F12, 0x491C},
+    {0x0F12, 0x8B0A},
+    {0x0F12, 0x42A2},
+    {0x0F12, 0xD004},
+    {0x0F12, 0x0762},
+    {0x0F12, 0xD502},
+    {0x0F12, 0x4A19},
+    {0x0F12, 0x3220},
+    {0x0F12, 0x8110},
+    {0x0F12, 0x830C},
+    {0x0F12, 0xE691},
+    {0x0F12, 0x0C3C},
+    {0x0F12, 0x7000},
+    {0x0F12, 0x3274},
+    {0x0F12, 0x7000},
+    {0x0F12, 0x26E8},
+    {0x0F12, 0x7000},
+    {0x0F12, 0x6100},
+    {0x0F12, 0xD000},
+    {0x0F12, 0x6500},
+    {0x0F12, 0xD000},
+    {0x0F12, 0x1A7C},
+    {0x0F12, 0x7000},
+    {0x0F12, 0x1120},
+    {0x0F12, 0x7000},
+    {0x0F12, 0xFFFF},
+    {0x0F12, 0x0000},
+    {0x0F12, 0x3374},
+    {0x0F12, 0x7000},
+    {0x0F12, 0x1D6C},
+    {0x0F12, 0x7000},
+    {0x0F12, 0x167C},
+    {0x0F12, 0x7000},
+    {0x0F12, 0xF400},
+    {0x0F12, 0xD000},
+    {0x0F12, 0x2C2C},
+    {0x0F12, 0x7000},
+    {0x0F12, 0x40A0},
+    {0x0F12, 0x00DD},
+    {0x0F12, 0xF520},
+    {0x0F12, 0xD000},
+    {0x0F12, 0x2C29},
+    {0x0F12, 0x7000},
+    {0x0F12, 0x1A54},
+    {0x0F12, 0x7000},
+    {0x0F12, 0x1564},
+    {0x0F12, 0x7000},
+    {0x0F12, 0xF2A0},
+    {0x0F12, 0xD000},
+    {0x0F12, 0x2440},
+    {0x0F12, 0x7000},
+    {0x0F12, 0x05A0},
+    {0x0F12, 0x7000},
+    {0x0F12, 0x2894},
+    {0x0F12, 0x7000},
+    {0x0F12, 0x1224},
+    {0x0F12, 0x7000},
+    {0x0F12, 0xB000},
+    {0x0F12, 0xD000},
+    {0x0F12, 0x4778},
+    {0x0F12, 0x46C0},
+    {0x0F12, 0xC000},
+    {0x0F12, 0xE59F},
+    {0x0F12, 0xFF1C},
+    {0x0F12, 0xE12F},
+    {0x0F12, 0x1A3F},
+    {0x0F12, 0x0001},
+    {0x0F12, 0x4778},
+    {0x0F12, 0x46C0},
+    {0x0F12, 0xF004},
+    {0x0F12, 0xE51F},
+    {0x0F12, 0x1F48},
+    {0x0F12, 0x0001},
+    {0x0F12, 0x4778},
+    {0x0F12, 0x46C0},
+    {0x0F12, 0xC000},
+    {0x0F12, 0xE59F},
+    {0x0F12, 0xFF1C},
+    {0x0F12, 0xE12F},
+    {0x0F12, 0x24BD},
+    {0x0F12, 0x0000},
+    {0x0F12, 0x4778},
+    {0x0F12, 0x46C0},
+    {0x0F12, 0xC000},
+    {0x0F12, 0xE59F},
+    {0x0F12, 0xFF1C},
+    {0x0F12, 0xE12F},
+    {0x0F12, 0x36DD},
+    {0x0F12, 0x0000},
+    {0x0F12, 0x4778},
+    {0x0F12, 0x46C0},
+    {0x0F12, 0xC000},
+    {0x0F12, 0xE59F},
+    {0x0F12, 0xFF1C},
+    {0x0F12, 0xE12F},
+    {0x0F12, 0xB4CF},
+    {0x0F12, 0x0000},
+    {0x0F12, 0x4778},
+    {0x0F12, 0x46C0},
+    {0x0F12, 0xC000},
+    {0x0F12, 0xE59F},
+    {0x0F12, 0xFF1C},
+    {0x0F12, 0xE12F},
+    {0x0F12, 0xB5D7},
+    {0x0F12, 0x0000},
+    {0x0F12, 0x4778},
+    {0x0F12, 0x46C0},
+    {0x0F12, 0xC000},
+    {0x0F12, 0xE59F},
+    {0x0F12, 0xFF1C},
+    {0x0F12, 0xE12F},
+    {0x0F12, 0x36ED},
+    {0x0F12, 0x0000},
+    {0x0F12, 0x4778},
+    {0x0F12, 0x46C0},
+    {0x0F12, 0xC000},
+    {0x0F12, 0xE59F},
+    {0x0F12, 0xFF1C},
+    {0x0F12, 0xE12F},
+    {0x0F12, 0xF53F},
+    {0x0F12, 0x0000},
+    {0x0F12, 0x4778},
+    {0x0F12, 0x46C0},
+    {0x0F12, 0xC000},
+    {0x0F12, 0xE59F},
+    {0x0F12, 0xFF1C},
+    {0x0F12, 0xE12F},
+    {0x0F12, 0xF5D9},
+    {0x0F12, 0x0000},
+    {0x0F12, 0x4778},
+    {0x0F12, 0x46C0},
+    {0x0F12, 0xC000},
+    {0x0F12, 0xE59F},
+    {0x0F12, 0xFF1C},
+    {0x0F12, 0xE12F},
+    {0x0F12, 0x013D},
+    {0x0F12, 0x0001},
+    {0x0F12, 0x4778},
+    {0x0F12, 0x46C0},
+    {0x0F12, 0xC000},
+    {0x0F12, 0xE59F},
+    {0x0F12, 0xFF1C},
+    {0x0F12, 0xE12F},
+    {0x0F12, 0xF5C9},
+    {0x0F12, 0x0000},
+    {0x0F12, 0x4778},
+    {0x0F12, 0x46C0},
+    {0x0F12, 0xC000},
+    {0x0F12, 0xE59F},
+    {0x0F12, 0xFF1C},
+    {0x0F12, 0xE12F},
+    {0x0F12, 0xFAA9},
+    {0x0F12, 0x0000},
+    {0x0F12, 0x4778},
+    {0x0F12, 0x46C0},
+    {0x0F12, 0xC000},
+    {0x0F12, 0xE59F},
+    {0x0F12, 0xFF1C},
+    {0x0F12, 0xE12F},
+    {0x0F12, 0x3723},
+    {0x0F12, 0x0000},
+    {0x0F12, 0x4778},
+    {0x0F12, 0x46C0},
+    {0x0F12, 0xC000},
+    {0x0F12, 0xE59F},
+    {0x0F12, 0xFF1C},
+    {0x0F12, 0xE12F},
+    {0x0F12, 0x5823},
+    {0x0F12, 0x0000},
+    {0x0F12, 0x4778},
+    {0x0F12, 0x46C0},
+    {0x0F12, 0xC000},
+    {0x0F12, 0xE59F},
+    {0x0F12, 0xFF1C},
+    {0x0F12, 0xE12F},
+    {0x0F12, 0xD771},
+    {0x0F12, 0x0000},
+    {0x0F12, 0x4778},
+    {0x0F12, 0x46C0},
+    {0x0F12, 0xC000},
+    {0x0F12, 0xE59F},
+    {0x0F12, 0xFF1C},
+    {0x0F12, 0xE12F},
+    {0x0F12, 0xD75B},
+    {0x0F12, 0x0000},
+    {0x0F12, 0x8117},
+    {0x0F12, 0x0000},
+
+    // End T&P part
+
+    // CIS/APS/Analog setting- 400LSBSYSCLK 45MHz
+    {0x0028, 0x7000},
+    {0x002A, 0x157A},
+    {0x0F12, 0x0001},
+    {0x002A, 0x1578},
+    {0x0F12, 0x0001},
+    {0x002A, 0x1576},
+    {0x0F12, 0x0020},
+    {0x002A, 0x1574},
+    {0x0F12, 0x0006},
+    {0x002A, 0x156E},
+    {0x0F12, 0x0001}, // Slope calibration tolerance in units of 1/256
+    {0x002A, 0x1568},
+    {0x0F12, 0x00FC},
+
+    //ADC control
+    {0x002A, 0x155A},
+    {0x0F12, 0x01CC}, //ADC SAT of 450mV for 10bit default in EVT1
+    {0x002A, 0x157E},
+    {0x0F12, 0x0C80}, // 3200 Max. Reset ramp DCLK counts (default 2048 0x800)
+    {0x0F12, 0x0578}, // 1400 Max. Reset ramp DCLK counts for x3.5
+    {0x002A, 0x157C},
+    {0x0F12, 0x0190}, // 400 Reset ramp for x1 in DCLK counts
+    {0x002A, 0x1570},
+    {0x0F12, 0x00A0}, // 224 LSB
+    {0x0F12, 0x0010}, // reset threshold
+    {0x002A, 0x12C4},
+    {0x0F12, 0x006A}, // 106 additional timing columns.
+    {0x002A, 0x12C8},
+    {0x0F12, 0x08AC}, //0834// 2100 ADC columns in normal mode including Hold & Latch    ***
+    {0x0F12, 0x0050}, //0028// 40 addition of ADC columns in Y-ave mode (default 244 0x74) ***
+    //WRITE #senHal_ForceModeType 0001 // Long exposure mode
+
+    {0x002A, 0x1696},
+    {0x0F12, 0x0000}, //0001// based on APS guidelines ****
+    {0x0F12, 0x0000}, //0001// based on APS guidelines ****
+    {0x0F12, 0x00C6}, // default. 1492 used for ADC dark characteristics
+    {0x0F12, 0x00C6}, // default. 1492 used for ADC dark characteristics
+    {0x002A, 0x1690},
+    {0x0F12, 0x0001}, // when set double sampling is activated - requires different set of pointers
+    {0x002A, 0x12B0},
+    {0x0F12, 0x0055}, // comp and pixel bias control 0xF40E - default for EVT1
+    {0x0F12, 0x005A}, // comp and pixel bias control 0xF40E for binning mode
+    {0x002A, 0x337A},
+    {0x0F12, 0x0006}, // [7] - is used for rest-only mode (EVT0 value is 0xD and HW 0x6)
+    {0x0F12, 0x0068},
+    {0x002A, 0x169E},
+    {0x0F12, 0x0007}, //000D// [3:0]- specifies the target (default 7)- DCLK = 64MHz instead of 116MHz. ****
+    {0x002A, 0x0BF6},
+    {0x0F12, 0x0000},
+
+    {0x002A, 0x327C},
+    {0x0F12, 0x1000},
+    {0x0F12, 0x6998},
+    {0x0F12, 0x0078},
+    {0x0F12, 0x04FE},
+    {0x0F12, 0x8800},
+
+    {0x002A, 0x3274},
+    {0x0F12, 0x0155}, //set IO driving current 2mA for Gs500
+    {0x0F12, 0x0155}, //set IO driving current
+    {0x0F12, 0x1555}, //set IO driving current
+    {0x0F12, 0x0555}, //set IO driving current
+    {0x0028, 0x7000},
+    {0x002A, 0x0572},
+    {0x0F12, 0x0007}, //#skl_usConfigStbySettings // Enable T&P code after HW stby + skip ZI part on HW wakeup.
+
+    {0x0028, 0x7000},
+    {0x002A, 0x12D2},
+    {0x0F12, 0x0003}, //0006 // #senHal_pContSenModesRegsArray[0][0]2 700012D2
+    {0x0F12, 0x0003}, //0006 // #senHal_pContSenModesRegsArray[0][1]2 700012D4
+    {0x0F12, 0x0003}, //0003 // #senHal_pContSenModesRegsArray[0][2]2 700012D6
+    {0x0F12, 0x0003}, //0003 // #senHal_pContSenModesRegsArray[0][3]2 700012D8
+    {0x0F12, 0x0884}, //0801 // #senHal_pContSenModesRegsArray[1][0]2 700012DA
+    {0x0F12, 0x08CF}, //0829 // #senHal_pContSenModesRegsArray[1][1]2 700012DC
+    {0x0F12, 0x0500}, //047D // #senHal_pContSenModesRegsArray[1][2]2 700012DE
+    {0x0F12, 0x054B}, //04A5 // #senHal_pContSenModesRegsArray[1][3]2 700012E0
+    {0x0F12, 0x0001}, //0001 // #senHal_pContSenModesRegsArray[2][0]2 700012E2
+    {0x0F12, 0x0001}, //0001 // #senHal_pContSenModesRegsArray[2][1]2 700012E4
+    {0x0F12, 0x0001}, //0001 // #senHal_pContSenModesRegsArray[2][2]2 700012E6
+    {0x0F12, 0x0001}, //0001 // #senHal_pContSenModesRegsArray[2][3]2 700012E8
+    {0x0F12, 0x0885}, //0802 // #senHal_pContSenModesRegsArray[3][0]2 700012EA
+    {0x0F12, 0x0467}, //0415 // #senHal_pContSenModesRegsArray[3][1]2 700012EC
+    {0x0F12, 0x0501}, //047E // #senHal_pContSenModesRegsArray[3][2]2 700012EE
+    {0x0F12, 0x02A5}, //0253 // #senHal_pContSenModesRegsArray[3][3]2 700012F0
+    {0x0F12, 0x0001}, //0001 // #senHal_pContSenModesRegsArray[4][0]2 700012F2
+    {0x0F12, 0x046A}, //0416 // #senHal_pContSenModesRegsArray[4][1]2 700012F4
+    {0x0F12, 0x0001}, //0001 // #senHal_pContSenModesRegsArray[4][2]2 700012F6
+    {0x0F12, 0x02A8}, //0254 // #senHal_pContSenModesRegsArray[4][3]2 700012F8
+    {0x0F12, 0x0885}, //0802 // #senHal_pContSenModesRegsArray[5][0]2 700012FA
+    {0x0F12, 0x08D0}, //082A // #senHal_pContSenModesRegsArray[5][1]2 700012FC
+    {0x0F12, 0x0501}, //047E // #senHal_pContSenModesRegsArray[5][2]2 700012FE
+    {0x0F12, 0x054C}, //04A6 // #senHal_pContSenModesRegsArray[5][3]2 70001300
+    {0x0F12, 0x0006}, //0010 // #senHal_pContSenModesRegsArray[6][0]2 70001302
+    {0x0F12, 0x0020}, //0012 // #senHal_pContSenModesRegsArray[6][1]2 70001304
+    {0x0F12, 0x0006}, //0006 // #senHal_pContSenModesRegsArray[6][2]2 70001306
+    {0x0F12, 0x0020}, //000C // #senHal_pContSenModesRegsArray[6][3]2 70001308
+    {0x0F12, 0x0881}, //07FE // #senHal_pContSenModesRegsArray[7][0]2 7000130A
+    {0x0F12, 0x0463}, //0411 // #senHal_pContSenModesRegsArray[7][1]2 7000130C
+    {0x0F12, 0x04FD}, //047A // #senHal_pContSenModesRegsArray[7][2]2 7000130E
+    {0x0F12, 0x02A1}, //024F // #senHal_pContSenModesRegsArray[7][3]2 70001310
+    {0x0F12, 0x0006}, //0010 // #senHal_pContSenModesRegsArray[8][0]2 70001312
+    {0x0F12, 0x0489}, //0424 // #senHal_pContSenModesRegsArray[8][1]2 70001314
+    {0x0F12, 0x0006}, //0006 // #senHal_pContSenModesRegsArray[8][2]2 70001316
+    {0x0F12, 0x02C7}, //0262 // #senHal_pContSenModesRegsArray[8][3]2 70001318
+    {0x0F12, 0x0881}, //07FE // #senHal_pContSenModesRegsArray[9][0]2 7000131A
+    {0x0F12, 0x08CC}, //0826 // #senHal_pContSenModesRegsArray[9][1]2 7000131C
+    {0x0F12, 0x04FD}, //047A // #senHal_pContSenModesRegsArray[9][2]2 7000131E
+    {0x0F12, 0x0548}, //04A2 // #senHal_pContSenModesRegsArray[9][3]2 70001320
+    {0x0F12, 0x03A2}, //036F // #senHal_pContSenModesRegsArray[10][0] 2 70001322
+    {0x0F12, 0x01D3}, //01B7 // #senHal_pContSenModesRegsArray[10][1] 2 70001324
+    {0x0F12, 0x01E0}, //01AD // #senHal_pContSenModesRegsArray[10][2] 2 70001326
+    {0x0F12, 0x00F2}, //00D6 // #senHal_pContSenModesRegsArray[10][3] 2 70001328
+    {0x0F12, 0x03F2}, //039B // #senHal_pContSenModesRegsArray[11][0] 2 7000132A
+    {0x0F12, 0x0223}, //01E3 // #senHal_pContSenModesRegsArray[11][1] 2 7000132C
+    {0x0F12, 0x0230}, //01D9 // #senHal_pContSenModesRegsArray[11][2] 2 7000132E
+    {0x0F12, 0x0142}, //0102 // #senHal_pContSenModesRegsArray[11][3] 2 70001330
+    {0x0F12, 0x03A2}, //036F // #senHal_pContSenModesRegsArray[12][0] 2 70001332
+    {0x0F12, 0x063C}, //05CC // #senHal_pContSenModesRegsArray[12][1] 2 70001334
+    {0x0F12, 0x01E0}, //01AD // #senHal_pContSenModesRegsArray[12][2] 2 70001336
+    {0x0F12, 0x0399}, //0329 // #senHal_pContSenModesRegsArray[12][3] 2 70001338
+    {0x0F12, 0x03F2}, //039B // #senHal_pContSenModesRegsArray[13][0] 2 7000133A
+    {0x0F12, 0x068C}, //05F8 // #senHal_pContSenModesRegsArray[13][1] 2 7000133C
+    {0x0F12, 0x0230}, //01D9 // #senHal_pContSenModesRegsArray[13][2] 2 7000133E
+    {0x0F12, 0x03E9}, //0355 // #senHal_pContSenModesRegsArray[13][3] 2 70001340
+    {0x0F12, 0x0002}, //0002 // #senHal_pContSenModesRegsArray[14][0] 2 70001342
+    {0x0F12, 0x0002}, //0002 // #senHal_pContSenModesRegsArray[14][1] 2 70001344
+    {0x0F12, 0x0002}, //0002 // #senHal_pContSenModesRegsArray[14][2] 2 70001346
+    {0x0F12, 0x0002}, //0002 // #senHal_pContSenModesRegsArray[14][3] 2 70001348
+    {0x0F12, 0x003C}, //0022 // #senHal_pContSenModesRegsArray[15][0] 2 7000134A
+    {0x0F12, 0x003C}, //0020 // #senHal_pContSenModesRegsArray[15][1] 2 7000134C
+    {0x0F12, 0x003C}, //0022 // #senHal_pContSenModesRegsArray[15][2] 2 7000134E
+    {0x0F12, 0x003C}, //0020 // #senHal_pContSenModesRegsArray[15][3] 2 70001350
+    {0x0F12, 0x01D3}, //01B9 // #senHal_pContSenModesRegsArray[16][0] 2 70001352
+    {0x0F12, 0x01D3}, //01B7 // #senHal_pContSenModesRegsArray[16][1] 2 70001354
+    {0x0F12, 0x00F2}, //00D8 // #senHal_pContSenModesRegsArray[16][2] 2 70001356
+    {0x0F12, 0x00F2}, //00D6 // #senHal_pContSenModesRegsArray[16][3] 2 70001358
+    {0x0F12, 0x020B}, //01D7 // #senHal_pContSenModesRegsArray[17][0] 2 7000135A
+    {0x0F12, 0x024A}, //01F8 // #senHal_pContSenModesRegsArray[17][1] 2 7000135C
+    {0x0F12, 0x012A}, //00F6 // #senHal_pContSenModesRegsArray[17][2] 2 7000135E
+    {0x0F12, 0x0169}, //0117 // #senHal_pContSenModesRegsArray[17][3] 2 70001360
+    {0x0F12, 0x0002}, //0002 // #senHal_pContSenModesRegsArray[18][0] 2 70001362
+    {0x0F12, 0x046B}, //0417 // #senHal_pContSenModesRegsArray[18][1] 2 70001364
+    {0x0F12, 0x0002}, //0002 // #senHal_pContSenModesRegsArray[18][2] 2 70001366
+    {0x0F12, 0x02A9}, //0255 // #senHal_pContSenModesRegsArray[18][3] 2 70001368
+    {0x0F12, 0x0419}, //03B0 // #senHal_pContSenModesRegsArray[19][0] 2 7000136A
+    {0x0F12, 0x04A5}, //0435 // #senHal_pContSenModesRegsArray[19][1] 2 7000136C
+    {0x0F12, 0x0257}, //01EE // #senHal_pContSenModesRegsArray[19][2] 2 7000136E
+    {0x0F12, 0x02E3}, //0273 // #senHal_pContSenModesRegsArray[19][3] 2 70001370
+    {0x0F12, 0x0630}, //05C7 // #senHal_pContSenModesRegsArray[20][0] 2 70001372
+    {0x0F12, 0x063C}, //05CC // #senHal_pContSenModesRegsArray[20][1] 2 70001374
+    {0x0F12, 0x038D}, //0324 // #senHal_pContSenModesRegsArray[20][2] 2 70001376
+    {0x0F12, 0x0399}, //0329 // #senHal_pContSenModesRegsArray[20][3] 2 70001378
+    {0x0F12, 0x0668}, //05E5 // #senHal_pContSenModesRegsArray[21][0] 2 7000137A
+    {0x0F12, 0x06B3}, //060D // #senHal_pContSenModesRegsArray[21][1] 2 7000137C
+    {0x0F12, 0x03C5}, //0342 // #senHal_pContSenModesRegsArray[21][2] 2 7000137E
+    {0x0F12, 0x0410}, //036A // #senHal_pContSenModesRegsArray[21][3] 2 70001380
+    {0x0F12, 0x0001}, //0001 // #senHal_pContSenModesRegsArray[22][0] 2 70001382
+    {0x0F12, 0x0001}, //0001 // #senHal_pContSenModesRegsArray[22][1] 2 70001384
+    {0x0F12, 0x0001}, //0001 // #senHal_pContSenModesRegsArray[22][2] 2 70001386
+    {0x0F12, 0x0001}, //0001 // #senHal_pContSenModesRegsArray[22][3] 2 70001388
+    {0x0F12, 0x03A2}, //036E // #senHal_pContSenModesRegsArray[23][0] 2 7000138A
+    {0x0F12, 0x01D3}, //01B7 // #senHal_pContSenModesRegsArray[23][1] 2 7000138C
+    {0x0F12, 0x01E0}, //01AC // #senHal_pContSenModesRegsArray[23][2] 2 7000138E
+    {0x0F12, 0x00F2}, //00D6 // #senHal_pContSenModesRegsArray[23][3] 2 70001390
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[24][0] 2 70001392
+    {0x0F12, 0x0461}, //040F // #senHal_pContSenModesRegsArray[24][1] 2 70001394
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[24][2] 2 70001396
+    {0x0F12, 0x029F}, //024D // #senHal_pContSenModesRegsArray[24][3] 2 70001398
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[25][0] 2 7000139A
+    {0x0F12, 0x063C}, //05CC // #senHal_pContSenModesRegsArray[25][1] 2 7000139C
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[25][2] 2 7000139E
+    {0x0F12, 0x0399}, //0329 // #senHal_pContSenModesRegsArray[25][3] 2 700013A0
+    {0x0F12, 0x003D}, //0023 // #senHal_pContSenModesRegsArray[26][0] 2 700013A2
+    {0x0F12, 0x003D}, //0021 // #senHal_pContSenModesRegsArray[26][1] 2 700013A4
+    {0x0F12, 0x003D}, //0023 // #senHal_pContSenModesRegsArray[26][2] 2 700013A6
+    {0x0F12, 0x003D}, //0021 // #senHal_pContSenModesRegsArray[26][3] 2 700013A8
+    {0x0F12, 0x01D0}, //01B6 // #senHal_pContSenModesRegsArray[27][0] 2 700013AA
+    {0x0F12, 0x01D0}, //01B4 // #senHal_pContSenModesRegsArray[27][1] 2 700013AC
+    {0x0F12, 0x00EF}, //00D5 // #senHal_pContSenModesRegsArray[27][2] 2 700013AE
+    {0x0F12, 0x00EF}, //00D3 // #senHal_pContSenModesRegsArray[27][3] 2 700013B0
+    {0x0F12, 0x020C}, //01D8 // #senHal_pContSenModesRegsArray[28][0] 2 700013B2
+    {0x0F12, 0x024B}, //01F9 // #senHal_pContSenModesRegsArray[28][1] 2 700013B4
+    {0x0F12, 0x012B}, //00F7 // #senHal_pContSenModesRegsArray[28][2] 2 700013B6
+    {0x0F12, 0x016A}, //0118 // #senHal_pContSenModesRegsArray[28][3] 2 700013B8
+    {0x0F12, 0x039F}, //036B // #senHal_pContSenModesRegsArray[29][0] 2 700013BA
+    {0x0F12, 0x045E}, //040C // #senHal_pContSenModesRegsArray[29][1] 2 700013BC
+    {0x0F12, 0x01DD}, //01A9 // #senHal_pContSenModesRegsArray[29][2] 2 700013BE
+    {0x0F12, 0x029C}, //024A // #senHal_pContSenModesRegsArray[29][3] 2 700013C0
+    {0x0F12, 0x041A}, //03B1 // #senHal_pContSenModesRegsArray[30][0] 2 700013C2
+    {0x0F12, 0x04A6}, //0436 // #senHal_pContSenModesRegsArray[30][1] 2 700013C4
+    {0x0F12, 0x0258}, //01EF // #senHal_pContSenModesRegsArray[30][2] 2 700013C6
+    {0x0F12, 0x02E4}, //0274 // #senHal_pContSenModesRegsArray[30][3] 2 700013C8
+    {0x0F12, 0x062D}, //05C4 // #senHal_pContSenModesRegsArray[31][0] 2 700013CA
+    {0x0F12, 0x0639}, //05C9 // #senHal_pContSenModesRegsArray[31][1] 2 700013CC
+    {0x0F12, 0x038A}, //0321 // #senHal_pContSenModesRegsArray[31][2] 2 700013CE
+    {0x0F12, 0x0396}, //0326 // #senHal_pContSenModesRegsArray[31][3] 2 700013D0
+    {0x0F12, 0x0669}, //05E6 // #senHal_pContSenModesRegsArray[32][0] 2 700013D2
+    {0x0F12, 0x06B4}, //060E // #senHal_pContSenModesRegsArray[32][1] 2 700013D4
+    {0x0F12, 0x03C6}, //0343 // #senHal_pContSenModesRegsArray[32][2] 2 700013D6
+    {0x0F12, 0x0411}, //036B // #senHal_pContSenModesRegsArray[32][3] 2 700013D8
+    {0x0F12, 0x087C}, //07F9 // #senHal_pContSenModesRegsArray[33][0] 2 700013DA
+    {0x0F12, 0x08C7}, //0821 // #senHal_pContSenModesRegsArray[33][1] 2 700013DC
+    {0x0F12, 0x04F8}, //0475 // #senHal_pContSenModesRegsArray[33][2] 2 700013DE
+    {0x0F12, 0x0543}, //049D // #senHal_pContSenModesRegsArray[33][3] 2 700013E0
+    {0x0F12, 0x0040}, //0026 // #senHal_pContSenModesRegsArray[34][0] 2 700013E2
+    {0x0F12, 0x0040}, //0024 // #senHal_pContSenModesRegsArray[34][1] 2 700013E4
+    {0x0F12, 0x0040}, //0026 // #senHal_pContSenModesRegsArray[34][2] 2 700013E6
+    {0x0F12, 0x0040}, //0024 // #senHal_pContSenModesRegsArray[34][3] 2 700013E8
+    {0x0F12, 0x01D0}, //01B6 // #senHal_pContSenModesRegsArray[35][0] 2 700013EA
+    {0x0F12, 0x01D0}, //01B4 // #senHal_pContSenModesRegsArray[35][1] 2 700013EC
+    {0x0F12, 0x00EF}, //00D5 // #senHal_pContSenModesRegsArray[35][2] 2 700013EE
+    {0x0F12, 0x00EF}, //00D3 // #senHal_pContSenModesRegsArray[35][3] 2 700013F0
+    {0x0F12, 0x020F}, //01DB // #senHal_pContSenModesRegsArray[36][0] 2 700013F2
+    {0x0F12, 0x024E}, //01FC // #senHal_pContSenModesRegsArray[36][1] 2 700013F4
+    {0x0F12, 0x012E}, //00FA // #senHal_pContSenModesRegsArray[36][2] 2 700013F6
+    {0x0F12, 0x016D}, //011B // #senHal_pContSenModesRegsArray[36][3] 2 700013F8
+    {0x0F12, 0x039F}, //036B // #senHal_pContSenModesRegsArray[37][0] 2 700013FA
+    {0x0F12, 0x045E}, //040C // #senHal_pContSenModesRegsArray[37][1] 2 700013FC
+    {0x0F12, 0x01DD}, //01A9 // #senHal_pContSenModesRegsArray[37][2] 2 700013FE
+    {0x0F12, 0x029C}, //024A // #senHal_pContSenModesRegsArray[37][3] 2 70001400
+    {0x0F12, 0x041D}, //03B4 // #senHal_pContSenModesRegsArray[38][0] 2 70001402
+    {0x0F12, 0x04A9}, //0439 // #senHal_pContSenModesRegsArray[38][1] 2 70001404
+    {0x0F12, 0x025B}, //01F2 // #senHal_pContSenModesRegsArray[38][2] 2 70001406
+    {0x0F12, 0x02E7}, //0277 // #senHal_pContSenModesRegsArray[38][3] 2 70001408
+    {0x0F12, 0x062D}, //05C4 // #senHal_pContSenModesRegsArray[39][0] 2 7000140A
+    {0x0F12, 0x0639}, //05C9 // #senHal_pContSenModesRegsArray[39][1] 2 7000140C
+    {0x0F12, 0x038A}, //0321 // #senHal_pContSenModesRegsArray[39][2] 2 7000140E
+    {0x0F12, 0x0396}, //0326 // #senHal_pContSenModesRegsArray[39][3] 2 70001410
+    {0x0F12, 0x066C}, //05E9 // #senHal_pContSenModesRegsArray[40][0] 2 70001412
+    {0x0F12, 0x06B7}, //0611 // #senHal_pContSenModesRegsArray[40][1] 2 70001414
+    {0x0F12, 0x03C9}, //0346 // #senHal_pContSenModesRegsArray[40][2] 2 70001416
+    {0x0F12, 0x0414}, //036E // #senHal_pContSenModesRegsArray[40][3] 2 70001418
+    {0x0F12, 0x087C}, //07F9 // #senHal_pContSenModesRegsArray[41][0] 2 7000141A
+    {0x0F12, 0x08C7}, //0821 // #senHal_pContSenModesRegsArray[41][1] 2 7000141C
+    {0x0F12, 0x04F8}, //0475 // #senHal_pContSenModesRegsArray[41][2] 2 7000141E
+    {0x0F12, 0x0543}, //049D // #senHal_pContSenModesRegsArray[41][3] 2 70001420
+    {0x0F12, 0x0040}, //0026 // #senHal_pContSenModesRegsArray[42][0] 2 70001422
+    {0x0F12, 0x0040}, //0024 // #senHal_pContSenModesRegsArray[42][1] 2 70001424
+    {0x0F12, 0x0040}, //0026 // #senHal_pContSenModesRegsArray[42][2] 2 70001426
+    {0x0F12, 0x0040}, //0024 // #senHal_pContSenModesRegsArray[42][3] 2 70001428
+    {0x0F12, 0x01D0}, //01B6 // #senHal_pContSenModesRegsArray[43][0] 2 7000142A
+    {0x0F12, 0x01D0}, //01B4 // #senHal_pContSenModesRegsArray[43][1] 2 7000142C
+    {0x0F12, 0x00EF}, //00D5 // #senHal_pContSenModesRegsArray[43][2] 2 7000142E
+    {0x0F12, 0x00EF}, //00D3 // #senHal_pContSenModesRegsArray[43][3] 2 70001430
+    {0x0F12, 0x020F}, //01DB // #senHal_pContSenModesRegsArray[44][0] 2 70001432
+    {0x0F12, 0x024E}, //01FC // #senHal_pContSenModesRegsArray[44][1] 2 70001434
+    {0x0F12, 0x012E}, //00FA // #senHal_pContSenModesRegsArray[44][2] 2 70001436
+    {0x0F12, 0x016D}, //011B // #senHal_pContSenModesRegsArray[44][3] 2 70001438
+    {0x0F12, 0x039F}, //036B // #senHal_pContSenModesRegsArray[45][0] 2 7000143A
+    {0x0F12, 0x045E}, //040C // #senHal_pContSenModesRegsArray[45][1] 2 7000143C
+    {0x0F12, 0x01DD}, //01A9 // #senHal_pContSenModesRegsArray[45][2] 2 7000143E
+    {0x0F12, 0x029C}, //024A // #senHal_pContSenModesRegsArray[45][3] 2 70001440
+    {0x0F12, 0x041D}, //03B4 // #senHal_pContSenModesRegsArray[46][0] 2 70001442
+    {0x0F12, 0x04A9}, //0439 // #senHal_pContSenModesRegsArray[46][1] 2 70001444
+    {0x0F12, 0x025B}, //01F2 // #senHal_pContSenModesRegsArray[46][2] 2 70001446
+    {0x0F12, 0x02E7}, //0277 // #senHal_pContSenModesRegsArray[46][3] 2 70001448
+    {0x0F12, 0x062D}, //05C4 // #senHal_pContSenModesRegsArray[47][0] 2 7000144A
+    {0x0F12, 0x0639}, //05C9 // #senHal_pContSenModesRegsArray[47][1] 2 7000144C
+    {0x0F12, 0x038A}, //0321 // #senHal_pContSenModesRegsArray[47][2] 2 7000144E
+    {0x0F12, 0x0396}, //0326 // #senHal_pContSenModesRegsArray[47][3] 2 70001450
+    {0x0F12, 0x066C}, //05E9 // #senHal_pContSenModesRegsArray[48][0] 2 70001452
+    {0x0F12, 0x06B7}, //0611 // #senHal_pContSenModesRegsArray[48][1] 2 70001454
+    {0x0F12, 0x03C9}, //0346 // #senHal_pContSenModesRegsArray[48][2] 2 70001456
+    {0x0F12, 0x0414}, //036E // #senHal_pContSenModesRegsArray[48][3] 2 70001458
+    {0x0F12, 0x087C}, //07F9 // #senHal_pContSenModesRegsArray[49][0] 2 7000145A
+    {0x0F12, 0x08C7}, //0821 // #senHal_pContSenModesRegsArray[49][1] 2 7000145C
+    {0x0F12, 0x04F8}, //0475 // #senHal_pContSenModesRegsArray[49][2] 2 7000145E
+    {0x0F12, 0x0543}, //049D // #senHal_pContSenModesRegsArray[49][3] 2 70001460
+    {0x0F12, 0x003D}, //0023 // #senHal_pContSenModesRegsArray[50][0] 2 70001462
+    {0x0F12, 0x003D}, //0021 // #senHal_pContSenModesRegsArray[50][1] 2 70001464
+    {0x0F12, 0x003D}, //0023 // #senHal_pContSenModesRegsArray[50][2] 2 70001466
+    {0x0F12, 0x003D}, //0021 // #senHal_pContSenModesRegsArray[50][3] 2 70001468
+    {0x0F12, 0x01D2}, //01B8 // #senHal_pContSenModesRegsArray[51][0] 2 7000146A
+    {0x0F12, 0x01D2}, //01B6 // #senHal_pContSenModesRegsArray[51][1] 2 7000146C
+    {0x0F12, 0x00F1}, //00D7 // #senHal_pContSenModesRegsArray[51][2] 2 7000146E
+    {0x0F12, 0x00F1}, //00D5 // #senHal_pContSenModesRegsArray[51][3] 2 70001470
+    {0x0F12, 0x020C}, //01D8 // #senHal_pContSenModesRegsArray[52][0] 2 70001472
+    {0x0F12, 0x024B}, //01F9 // #senHal_pContSenModesRegsArray[52][1] 2 70001474
+    {0x0F12, 0x012B}, //00F7 // #senHal_pContSenModesRegsArray[52][2] 2 70001476
+    {0x0F12, 0x016A}, //0118 // #senHal_pContSenModesRegsArray[52][3] 2 70001478
+    {0x0F12, 0x03A1}, //036D // #senHal_pContSenModesRegsArray[53][0] 2 7000147A
+    {0x0F12, 0x0460}, //040E // #senHal_pContSenModesRegsArray[53][1] 2 7000147C
+    {0x0F12, 0x01DF}, //01AB // #senHal_pContSenModesRegsArray[53][2] 2 7000147E
+    {0x0F12, 0x029E}, //024C // #senHal_pContSenModesRegsArray[53][3] 2 70001480
+    {0x0F12, 0x041A}, //03B1 // #senHal_pContSenModesRegsArray[54][0] 2 70001482
+    {0x0F12, 0x04A6}, //0436 // #senHal_pContSenModesRegsArray[54][1] 2 70001484
+    {0x0F12, 0x0258}, //01EF // #senHal_pContSenModesRegsArray[54][2] 2 70001486
+    {0x0F12, 0x02E4}, //0274 // #senHal_pContSenModesRegsArray[54][3] 2 70001488
+    {0x0F12, 0x062F}, //05C6 // #senHal_pContSenModesRegsArray[55][0] 2 7000148A
+    {0x0F12, 0x063B}, //05CB // #senHal_pContSenModesRegsArray[55][1] 2 7000148C
+    {0x0F12, 0x038C}, //0323 // #senHal_pContSenModesRegsArray[55][2] 2 7000148E
+    {0x0F12, 0x0398}, //0328 // #senHal_pContSenModesRegsArray[55][3] 2 70001490
+    {0x0F12, 0x0669}, //05E6 // #senHal_pContSenModesRegsArray[56][0] 2 70001492
+    {0x0F12, 0x06B4}, //060E // #senHal_pContSenModesRegsArray[56][1] 2 70001494
+    {0x0F12, 0x03C6}, //0343 // #senHal_pContSenModesRegsArray[56][2] 2 70001496
+    {0x0F12, 0x0411}, //036B // #senHal_pContSenModesRegsArray[56][3] 2 70001498
+    {0x0F12, 0x087E}, //07FB // #senHal_pContSenModesRegsArray[57][0] 2 7000149A
+    {0x0F12, 0x08C9}, //0823 // #senHal_pContSenModesRegsArray[57][1] 2 7000149C
+    {0x0F12, 0x04FA}, //0477 // #senHal_pContSenModesRegsArray[57][2] 2 7000149E
+    {0x0F12, 0x0545}, //049F // #senHal_pContSenModesRegsArray[57][3] 2 700014A0
+    {0x0F12, 0x03A2}, //036E // #senHal_pContSenModesRegsArray[58][0] 2 700014A2
+    {0x0F12, 0x01D3}, //01B7 // #senHal_pContSenModesRegsArray[58][1] 2 700014A4
+    {0x0F12, 0x01E0}, //01AC // #senHal_pContSenModesRegsArray[58][2] 2 700014A6
+    {0x0F12, 0x00F2}, //00D6 // #senHal_pContSenModesRegsArray[58][3] 2 700014A8
+    {0x0F12, 0x03AF}, //037B // #senHal_pContSenModesRegsArray[59][0] 2 700014AA
+    {0x0F12, 0x01E0}, //01C4 // #senHal_pContSenModesRegsArray[59][1] 2 700014AC
+    {0x0F12, 0x01ED}, //01B9 // #senHal_pContSenModesRegsArray[59][2] 2 700014AE
+    {0x0F12, 0x00FF}, //00E3 // #senHal_pContSenModesRegsArray[59][3] 2 700014B0
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[60][0] 2 700014B2
+    {0x0F12, 0x0461}, //040F // #senHal_pContSenModesRegsArray[60][1] 2 700014B4
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[60][2] 2 700014B6
+    {0x0F12, 0x029F}, //024D // #senHal_pContSenModesRegsArray[60][3] 2 700014B8
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[61][0] 2 700014BA
+    {0x0F12, 0x046E}, //041C // #senHal_pContSenModesRegsArray[61][1] 2 700014BC
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[61][2] 2 700014BE
+    {0x0F12, 0x02AC}, //025A // #senHal_pContSenModesRegsArray[61][3] 2 700014C0
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[62][0] 2 700014C2
+    {0x0F12, 0x063C}, //05CC // #senHal_pContSenModesRegsArray[62][1] 2 700014C4
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[62][2] 2 700014C6
+    {0x0F12, 0x0399}, //0329 // #senHal_pContSenModesRegsArray[62][3] 2 700014C8
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[63][0] 2 700014CA
+    {0x0F12, 0x0649}, //05D9 // #senHal_pContSenModesRegsArray[63][1] 2 700014CC
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[63][2] 2 700014CE
+    {0x0F12, 0x03A6}, //0336 // #senHal_pContSenModesRegsArray[63][3] 2 700014D0
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[64][0] 2 700014D2
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[64][1] 2 700014D4
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[64][2] 2 700014D6
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[64][3] 2 700014D8
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[65][0] 2 700014DA
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[65][1] 2 700014DC
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[65][2] 2 700014DE
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[65][3] 2 700014E0
+    {0x0F12, 0x03AA}, //0376 // #senHal_pContSenModesRegsArray[66][0] 2 700014E2
+    {0x0F12, 0x01DB}, //01BF // #senHal_pContSenModesRegsArray[66][1] 2 700014E4
+    {0x0F12, 0x01E8}, //01B4 // #senHal_pContSenModesRegsArray[66][2] 2 700014E6
+    {0x0F12, 0x00FA}, //00DE // #senHal_pContSenModesRegsArray[66][3] 2 700014E8
+    {0x0F12, 0x03B7}, //0383 // #senHal_pContSenModesRegsArray[67][0] 2 700014EA
+    {0x0F12, 0x01E8}, //01CC // #senHal_pContSenModesRegsArray[67][1] 2 700014EC
+    {0x0F12, 0x01F5}, //01C1 // #senHal_pContSenModesRegsArray[67][2] 2 700014EE
+    {0x0F12, 0x0107}, //00EB // #senHal_pContSenModesRegsArray[67][3] 2 700014F0
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[68][0] 2 700014F2
+    {0x0F12, 0x0469}, //0417 // #senHal_pContSenModesRegsArray[68][1] 2 700014F4
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[68][2] 2 700014F6
+    {0x0F12, 0x02A7}, //0255 // #senHal_pContSenModesRegsArray[68][3] 2 700014F8
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[69][0] 2 700014FA
+    {0x0F12, 0x0476}, //0424 // #senHal_pContSenModesRegsArray[69][1] 2 700014FC
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[69][2] 2 700014FE
+    {0x0F12, 0x02B4}, //0262 // #senHal_pContSenModesRegsArray[69][3] 2 70001500
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[70][0] 2 70001502
+    {0x0F12, 0x0644}, //05D4 // #senHal_pContSenModesRegsArray[70][1] 2 70001504
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[70][2] 2 70001506
+    {0x0F12, 0x03A1}, //0331 // #senHal_pContSenModesRegsArray[70][3] 2 70001508
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[71][0] 2 7000150A
+    {0x0F12, 0x0651}, //05E1 // #senHal_pContSenModesRegsArray[71][1] 2 7000150C
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[71][2] 2 7000150E
+    {0x0F12, 0x03AE}, //033E // #senHal_pContSenModesRegsArray[71][3] 2 70001510
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[72][0] 2 70001512
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[72][1] 2 70001514
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[72][2] 2 70001516
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[72][3] 2 70001518
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[73][0] 2 7000151A
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[73][1] 2 7000151C
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[73][2] 2 7000151E
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[73][3] 2 70001520
+    {0x0F12, 0x0001}, //0001 // #senHal_pContSenModesRegsArray[74][0] 2 70001522
+    {0x0F12, 0x0001}, //0001 // #senHal_pContSenModesRegsArray[74][1] 2 70001524
+    {0x0F12, 0x0001}, //0001 // #senHal_pContSenModesRegsArray[74][2] 2 70001526
+    {0x0F12, 0x0001}, //0001 // #senHal_pContSenModesRegsArray[74][3] 2 70001528
+    {0x0F12, 0x000F}, //000F // #senHal_pContSenModesRegsArray[75][0] 2 7000152A
+    {0x0F12, 0x000F}, //000F // #senHal_pContSenModesRegsArray[75][1] 2 7000152C
+    {0x0F12, 0x000F}, //000F // #senHal_pContSenModesRegsArray[75][2] 2 7000152E
+    {0x0F12, 0x000F}, //000F // #senHal_pContSenModesRegsArray[75][3] 2 70001530
+    {0x0F12, 0x05AD}, //0544 // #senHal_pContSenModesRegsArray[76][0] 2 70001532
+    {0x0F12, 0x03DE}, //038C // #senHal_pContSenModesRegsArray[76][1] 2 70001534
+    {0x0F12, 0x030A}, //02A1 // #senHal_pContSenModesRegsArray[76][2] 2 70001536
+    {0x0F12, 0x021C}, //01CA // #senHal_pContSenModesRegsArray[76][3] 2 70001538
+    {0x0F12, 0x062F}, //05C6 // #senHal_pContSenModesRegsArray[77][0] 2 7000153A
+    {0x0F12, 0x0460}, //040E // #senHal_pContSenModesRegsArray[77][1] 2 7000153C
+    {0x0F12, 0x038C}, //0323 // #senHal_pContSenModesRegsArray[77][2] 2 7000153E
+    {0x0F12, 0x029E}, //024C // #senHal_pContSenModesRegsArray[77][3] 2 70001540
+    {0x0F12, 0x07FC}, //0779 // #senHal_pContSenModesRegsArray[78][0] 2 70001542
+    {0x0F12, 0x0847}, //07A1 // #senHal_pContSenModesRegsArray[78][1] 2 70001544
+    {0x0F12, 0x0478}, //03F5 // #senHal_pContSenModesRegsArray[78][2] 2 70001546
+    {0x0F12, 0x04C3}, //041D // #senHal_pContSenModesRegsArray[78][3] 2 70001548
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[79][0] 2 7000154A
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[79][1] 2 7000154C
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[79][2] 2 7000154E
+    {0x0F12, 0x0000}, //0000 // #senHal_pContSenModesRegsArray[79][3] 2 70001550
+
+    {0x002A, 0x12B8}, //disable CINTR 0
+    {0x0F12, 0x1000},
+
+    //============================================================
+    //ISP-FE Setting
+    //============================================================
+    {0x002A, 0x158A},
+    {0x0F12, 0xEAF0},
+    {0x002A, 0x15C6},
+    {0x0F12, 0x0020},
+    {0x0F12, 0x0060},
+    {0x002A, 0x15BC},
+    {0x0F12, 0x0200}, // added by Shy.
+
+    //Analog Offset for MSM
+    {0x002A, 0x1608},
+    {0x0F12, 0x0100}, // #gisp_msm_sAnalogOffset[0]
+    {0x0F12, 0x0100}, // #gisp_msm_sAnalogOffset[1]
+    {0x0F12, 0x0100}, // #gisp_msm_sAnalogOffset[2]
+    {0x0F12, 0x0100}, // #gisp_msm_sAnalogOffset[3]
+    //================================================================================================
+    // SET AE
+    //================================================================================================
+    // AE target
+    {0x002A, 0x0F70},
+    {0x0F12, 0x0038}, //#TVAR_ae_BrAve 091222
+    // AE mode
+    {0x002A, 0x0F76},
+    {0x0F12, 0x000F}, //Disable illumination & contrast  // #ae_StatMode
+    {0x002A, 0x051A},
+    {0x0F12, 0x0111}, //#lt_uLimitHigh
+    {0x0F12, 0x00F0}, //#lt_uLimitLow
+    // AE weight
+    {0x002A, 0x0F7E},
+    {0x0F12, 0x0101}, // #ae_WeightTbl_16_0_
+    {0x0F12, 0x0101}, // #ae_WeightTbl_16_1_
+    {0x0F12, 0x0101}, // #ae_WeightTbl_16_2_
+    {0x0F12, 0x0101}, // #ae_WeightTbl_16_3_
+    {0x0F12, 0x0101}, // #ae_WeightTbl_16_4_
+    {0x0F12, 0x0101}, // #ae_WeightTbl_16_5_
+    {0x0F12, 0x0101}, // #ae_WeightTbl_16_6_
+    {0x0F12, 0x0101}, // #ae_WeightTbl_16_7_
+    {0x0F12, 0x0101}, // #ae_WeightTbl_16_8_
+    {0x0F12, 0x0303}, // #ae_WeightTbl_16_9_	0303
+    {0x0F12, 0x0303}, // #ae_WeightTbl_16_10	0303
+    {0x0F12, 0x0101}, // #ae_WeightTbl_16_11
+    {0x0F12, 0x0101}, // #ae_WeightTbl_16_12
+    {0x0F12, 0x0303}, // #ae_WeightTbl_16_13	0303
+    {0x0F12, 0x0303}, // #ae_WeightTbl_16_14	0303
+    {0x0F12, 0x0101}, // #ae_WeightTbl_16_15
+    {0x0F12, 0x0101}, // #ae_WeightTbl_16_16
+    {0x0F12, 0x0303}, // #ae_WeightTbl_16_17	0303
+    {0x0F12, 0x0303}, // #ae_WeightTbl_16_18	0303
+    {0x0F12, 0x0101}, // #ae_WeightTbl_16_19
+    {0x0F12, 0x0101}, // #ae_WeightTbl_16_20
+    {0x0F12, 0x0303}, // #ae_WeightTbl_16_21	0303
+    {0x0F12, 0x0303}, // #ae_WeightTbl_16_22	0303
+    {0x0F12, 0x0101}, // #ae_WeightTbl_16_23
+    {0x0F12, 0x0101}, // #ae_WeightTbl_16_24
+    {0x0F12, 0x0101}, // #ae_WeightTbl_16_25
+    {0x0F12, 0x0101}, // #ae_WeightTbl_16_26
+    {0x0F12, 0x0101}, // #ae_WeightTbl_16_27
+    {0x0F12, 0x0101}, // #ae_WeightTbl_16_28
+    {0x0F12, 0x0101}, // #ae_WeightTbl_16_29
+    {0x0F12, 0x0101}, // #ae_WeightTbl_16_30
+    {0x0F12, 0x0101}, // #ae_WeightTbl_16_31
+
+    //================================================================================================
+    // SET FLICKER
+    //================================================================================================
+    {0x002A, 0x0C18},
+    {0x0F12, 0x0000}, // 0001: 60Hz start auto / 0000: 50Hz start auto
+    {0x002A, 0x04D2},
+    {0x0F12, 0x067F},
+
+    //002A   04BA
+    //0F12   0001//0001(50Hz) 0002(60Hz)
+    //0F12   0001//REG_SF_USER_FlickerQuantChanged
+
+    //================================================================================================
+    // SET GAS
+    //================================================================================================
+    // GAS alpha
+    // R, Gr, Gb, B per light source
+    {0x002A, 0x06CE},
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[0] // Horizon
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[1]
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[2]
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[3]
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[4] // IncandA
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[5]
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[6]
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[7]
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[8] // WW
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[9]
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[10]
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[11] ///
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[12]// CWF
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[13]
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[14]
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[15] ///
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[16]// D50
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[17]
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[18]
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[19]
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[20]// D65
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[21]
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[22]
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[23]
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[24]// D75
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[25]
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[26]
+    {0x0F12, 0x0100}, // #TVAR_ash_GASAlpha[27]
+    {0x0F12, 0x0100}, // #TVAR_ash_GASOutdoorAlpha[0] // Outdoor
+    {0x0F12, 0x0100}, // #TVAR_ash_GASOutdoorAlpha[1]
+    {0x0F12, 0x0100}, // #TVAR_ash_GASOutdoorAlpha[2]
+    {0x0F12, 0x0100}, // #TVAR_ash_GASOutdoorAlpha[3] // GAS beta
+    {0x0F12, 0x0000}, // #ash_GASBeta[0]// Horizon
+    {0x0F12, 0x0000}, // #ash_GASBeta[1]
+    {0x0F12, 0x0000}, // #ash_GASBeta[2]
+    {0x0F12, 0x0000}, // #ash_GASBeta[3]
+    {0x0F12, 0x0000}, // #ash_GASBeta[4]// IncandA
+    {0x0F12, 0x0000}, // #ash_GASBeta[5]
+    {0x0F12, 0x0000}, // #ash_GASBeta[6]
+    {0x0F12, 0x0000}, // #ash_GASBeta[7]
+    {0x0F12, 0x0000}, // #ash_GASBeta[8]// WW
+    {0x0F12, 0x0000}, // #ash_GASBeta[9]
+    {0x0F12, 0x0000}, // #ash_GASBeta[10]
+    {0x0F12, 0x0000}, // #ash_GASBeta[11]
+    {0x0F12, 0x0000}, // #ash_GASBeta[12] // CWF
+    {0x0F12, 0x0000}, // #ash_GASBeta[13]
+    {0x0F12, 0x0000}, // #ash_GASBeta[14]
+    {0x0F12, 0x0000}, // #ash_GASBeta[15]
+    {0x0F12, 0x0000}, // #ash_GASBeta[16] // D50
+    {0x0F12, 0x0000}, // #ash_GASBeta[17]
+    {0x0F12, 0x0000}, // #ash_GASBeta[18]
+    {0x0F12, 0x0000}, // #ash_GASBeta[19]
+    {0x0F12, 0x0000}, // #ash_GASBeta[20] // D65
+    {0x0F12, 0x0000}, // #ash_GASBeta[21]
+    {0x0F12, 0x0000}, // #ash_GASBeta[22]
+    {0x0F12, 0x0000}, // #ash_GASBeta[23]
+    {0x0F12, 0x0000}, // #ash_GASBeta[24] // D75
+    {0x0F12, 0x0000}, // #ash_GASBeta[25]
+    {0x0F12, 0x0000}, // #ash_GASBeta[26]
+    {0x0F12, 0x0000}, // #ash_GASBeta[27]
+    {0x0F12, 0x0000}, // #ash_GASOutdoorBeta[0] // Outdoor
+    {0x0F12, 0x0000}, // #ash_GASOutdoorBeta[1]
+    {0x0F12, 0x0000}, // #ash_GASOutdoorBeta[2]
+    {0x0F12, 0x0000}, // #ash_GASOutdoorBeta[3]
+    {0x002A, 0x06B4},
+    {0x0F12, 0x0000}, // #wbt_bUseOutdoorASH ON:1 OFF:0
+
+    // Parabloic function
+    {0x002A, 0x075A},
+    {0x0F12, 0x0000}, // #ash_bParabolicEstimation
+    {0x0F12, 0x0400}, // #ash_uParabolicCenterX
+    {0x0F12, 0x0300}, // #ash_uParabolicCenterY
+    {0x0F12, 0x0010}, // #ash_uParabolicScalingA
+    {0x0F12, 0x0011}, // #ash_uParabolicScalingB
+    {0x002A, 0x06C6},
+    {0x0F12, 0x0100}, //ash_CGrasAlphas_0_
+    {0x0F12, 0x0100}, //ash_CGrasAlphas_1_
+    {0x0F12, 0x0100}, //ash_CGrasAlphas_2_
+    {0x0F12, 0x0100}, //ash_CGrasAlphas_3_
+    {0x002A, 0x0E3C},
+    {0x0F12, 0x00C0}, // #awbb_Alpha_Comp_Mode
+    {0x002A, 0x074E},
+    {0x0F12, 0x0000}, // #ash_bLumaMode //use Beta : 0001 not use Beta : 0000
+
+    // GAS LUT start address // 7000_347C
+    {0x002A, 0x0754},
+    {0x0F12, 0x347C},
+    {0x0F12, 0x7000},
+
+    // GAS LUT
+    {0x002A, 0x347C}, ///
+    {0x0F12, 0x020B}, // #TVAR_ash_pGAS[0]
+    {0x0F12, 0x019E}, // #TVAR_ash_pGAS[1]
+    {0x0F12, 0x0155}, // #TVAR_ash_pGAS[2]
+    {0x0F12, 0x0121}, // #TVAR_ash_pGAS[3]
+    {0x0F12, 0x00FA}, // #TVAR_ash_pGAS[4]
+    {0x0F12, 0x00E2}, // #TVAR_ash_pGAS[5]
+    {0x0F12, 0x00D7}, // #TVAR_ash_pGAS[6]
+    {0x0F12, 0x00DC}, // #TVAR_ash_pGAS[7]
+    {0x0F12, 0x00F0}, // #TVAR_ash_pGAS[8]
+    {0x0F12, 0x0114}, // #TVAR_ash_pGAS[9]
+    {0x0F12, 0x0148}, // #TVAR_ash_pGAS[10]
+    {0x0F12, 0x0196}, // #TVAR_ash_pGAS[11]
+    {0x0F12, 0x01F5}, // #TVAR_ash_pGAS[12]
+    {0x0F12, 0x01B0}, // #TVAR_ash_pGAS[13]
+    {0x0F12, 0x0160}, // #TVAR_ash_pGAS[14]
+    {0x0F12, 0x0118}, // #TVAR_ash_pGAS[15]
+    {0x0F12, 0x00E0}, // #TVAR_ash_pGAS[16]
+    {0x0F12, 0x00B6}, // #TVAR_ash_pGAS[17]
+    {0x0F12, 0x009B}, // #TVAR_ash_pGAS[18]
+    {0x0F12, 0x008F}, // #TVAR_ash_pGAS[19]
+    {0x0F12, 0x0094}, // #TVAR_ash_pGAS[20]
+    {0x0F12, 0x00AD}, // #TVAR_ash_pGAS[21]
+    {0x0F12, 0x00D8}, // #TVAR_ash_pGAS[22]
+    {0x0F12, 0x0110}, // #TVAR_ash_pGAS[23]
+    {0x0F12, 0x0156}, // #TVAR_ash_pGAS[24]
+    {0x0F12, 0x01AC}, // #TVAR_ash_pGAS[25]
+    {0x0F12, 0x0172}, // #TVAR_ash_pGAS[26]
+    {0x0F12, 0x0124}, // #TVAR_ash_pGAS[27]
+    {0x0F12, 0x00DB}, // #TVAR_ash_pGAS[28]
+    {0x0F12, 0x009F}, // #TVAR_ash_pGAS[29]
+    {0x0F12, 0x0073}, // #TVAR_ash_pGAS[30]
+    {0x0F12, 0x0057}, // #TVAR_ash_pGAS[31]
+    {0x0F12, 0x004C}, // #TVAR_ash_pGAS[32]
+    {0x0F12, 0x0054}, // #TVAR_ash_pGAS[33]
+    {0x0F12, 0x006C}, // #TVAR_ash_pGAS[34]
+    {0x0F12, 0x0097}, // #TVAR_ash_pGAS[35]
+    {0x0F12, 0x00D5}, // #TVAR_ash_pGAS[36]
+    {0x0F12, 0x0120}, // #TVAR_ash_pGAS[37]
+    {0x0F12, 0x0170}, // #TVAR_ash_pGAS[38]
+    {0x0F12, 0x0147}, // #TVAR_ash_pGAS[39]
+    {0x0F12, 0x00FC}, // #TVAR_ash_pGAS[40]
+    {0x0F12, 0x00AC}, // #TVAR_ash_pGAS[41]
+    {0x0F12, 0x006F}, // #TVAR_ash_pGAS[42]
+    {0x0F12, 0x0044}, // #TVAR_ash_pGAS[43]
+    {0x0F12, 0x002A}, // #TVAR_ash_pGAS[44]
+    {0x0F12, 0x0020}, // #TVAR_ash_pGAS[45]
+    {0x0F12, 0x0027}, // #TVAR_ash_pGAS[46]
+    {0x0F12, 0x0040}, // #TVAR_ash_pGAS[47]
+    {0x0F12, 0x006C}, // #TVAR_ash_pGAS[48]
+    {0x0F12, 0x00AB}, // #TVAR_ash_pGAS[49]
+    {0x0F12, 0x00FB}, // #TVAR_ash_pGAS[50]
+    {0x0F12, 0x014B}, // #TVAR_ash_pGAS[51]
+    {0x0F12, 0x0131}, // #TVAR_ash_pGAS[52]
+    {0x0F12, 0x00E4}, // #TVAR_ash_pGAS[53]
+    {0x0F12, 0x0090}, // #TVAR_ash_pGAS[54]
+    {0x0F12, 0x0052}, // #TVAR_ash_pGAS[55]
+    {0x0F12, 0x0027}, // #TVAR_ash_pGAS[56]
+    {0x0F12, 0x0010}, // #TVAR_ash_pGAS[57]
+    {0x0F12, 0x0008}, // #TVAR_ash_pGAS[58]
+    {0x0F12, 0x000F}, // #TVAR_ash_pGAS[59]
+    {0x0F12, 0x0027}, // #TVAR_ash_pGAS[60]
+    {0x0F12, 0x0053}, // #TVAR_ash_pGAS[61]
+    {0x0F12, 0x0093}, // #TVAR_ash_pGAS[62]
+    {0x0F12, 0x00EA}, // #TVAR_ash_pGAS[63]
+    {0x0F12, 0x0138}, // #TVAR_ash_pGAS[64]
+    {0x0F12, 0x0129}, // #TVAR_ash_pGAS[65]
+    {0x0F12, 0x00DA}, // #TVAR_ash_pGAS[66]
+    {0x0F12, 0x0085}, // #TVAR_ash_pGAS[67]
+    {0x0F12, 0x0046}, // #TVAR_ash_pGAS[68]
+    {0x0F12, 0x001D}, // #TVAR_ash_pGAS[69]
+    {0x0F12, 0x0007}, // #TVAR_ash_pGAS[70]
+    {0x0F12, 0x0000}, // #TVAR_ash_pGAS[71]
+    {0x0F12, 0x0007}, // #TVAR_ash_pGAS[72]
+    {0x0F12, 0x001F}, // #TVAR_ash_pGAS[73]
+    {0x0F12, 0x004B}, // #TVAR_ash_pGAS[74]
+    {0x0F12, 0x008E}, // #TVAR_ash_pGAS[75]
+    {0x0F12, 0x00E4}, // #TVAR_ash_pGAS[76]
+    {0x0F12, 0x0138}, // #TVAR_ash_pGAS[77]
+    {0x0F12, 0x0130}, // #TVAR_ash_pGAS[78]
+    {0x0F12, 0x00E2}, // #TVAR_ash_pGAS[79]
+    {0x0F12, 0x008D}, // #TVAR_ash_pGAS[80]
+    {0x0F12, 0x004E}, // #TVAR_ash_pGAS[81]
+    {0x0F12, 0x0025}, // #TVAR_ash_pGAS[82]
+    {0x0F12, 0x000E}, // #TVAR_ash_pGAS[83]
+    {0x0F12, 0x0007}, // #TVAR_ash_pGAS[84]
+    {0x0F12, 0x000F}, // #TVAR_ash_pGAS[85]
+    {0x0F12, 0x0027}, // #TVAR_ash_pGAS[86]
+    {0x0F12, 0x0055}, // #TVAR_ash_pGAS[87]
+    {0x0F12, 0x009A}, // #TVAR_ash_pGAS[88]
+    {0x0F12, 0x00F2}, // #TVAR_ash_pGAS[89]
+    {0x0F12, 0x0142}, // #TVAR_ash_pGAS[90]
+    {0x0F12, 0x0145}, // #TVAR_ash_pGAS[91]
+    {0x0F12, 0x00F9}, // #TVAR_ash_pGAS[92]
+    {0x0F12, 0x00A6}, // #TVAR_ash_pGAS[93]
+    {0x0F12, 0x0067}, // #TVAR_ash_pGAS[94]
+    {0x0F12, 0x003C}, // #TVAR_ash_pGAS[95]
+    {0x0F12, 0x0024}, // #TVAR_ash_pGAS[96]
+    {0x0F12, 0x001D}, // #TVAR_ash_pGAS[97]
+    {0x0F12, 0x0025}, // #TVAR_ash_pGAS[98]
+    {0x0F12, 0x0041}, // #TVAR_ash_pGAS[99]
+    {0x0F12, 0x0071}, // #TVAR_ash_pGAS[100]
+    {0x0F12, 0x00B5}, // #TVAR_ash_pGAS[101]
+    {0x0F12, 0x010B}, // #TVAR_ash_pGAS[102]
+    {0x0F12, 0x015A}, // #TVAR_ash_pGAS[103]
+    {0x0F12, 0x0169}, // #TVAR_ash_pGAS[104]
+    {0x0F12, 0x011F}, // #TVAR_ash_pGAS[105]
+    {0x0F12, 0x00CF}, // #TVAR_ash_pGAS[106]
+    {0x0F12, 0x0092}, // #TVAR_ash_pGAS[107]
+    {0x0F12, 0x0066}, // #TVAR_ash_pGAS[108]
+    {0x0F12, 0x004D}, // #TVAR_ash_pGAS[109]
+    {0x0F12, 0x0044}, // #TVAR_ash_pGAS[110]
+    {0x0F12, 0x004F}, // #TVAR_ash_pGAS[111]
+    {0x0F12, 0x006B}, // #TVAR_ash_pGAS[112]
+    {0x0F12, 0x009E}, // #TVAR_ash_pGAS[113]
+    {0x0F12, 0x00E2}, // #TVAR_ash_pGAS[114]
+    {0x0F12, 0x0136}, // #TVAR_ash_pGAS[115]
+    {0x0F12, 0x0183}, // #TVAR_ash_pGAS[116]
+    {0x0F12, 0x01A9}, // #TVAR_ash_pGAS[117]
+    {0x0F12, 0x0157}, // #TVAR_ash_pGAS[118]
+    {0x0F12, 0x010E}, // #TVAR_ash_pGAS[119]
+    {0x0F12, 0x00D2}, // #TVAR_ash_pGAS[120]
+    {0x0F12, 0x00A7}, // #TVAR_ash_pGAS[121]
+    {0x0F12, 0x008C}, // #TVAR_ash_pGAS[122]
+    {0x0F12, 0x0086}, // #TVAR_ash_pGAS[123]
+    {0x0F12, 0x0090}, // #TVAR_ash_pGAS[124]
+    {0x0F12, 0x00AE}, // #TVAR_ash_pGAS[125]
+    {0x0F12, 0x00E0}, // #TVAR_ash_pGAS[126]
+    {0x0F12, 0x0121}, // #TVAR_ash_pGAS[127]
+    {0x0F12, 0x0170}, // #TVAR_ash_pGAS[128]
+    {0x0F12, 0x01C5}, // #TVAR_ash_pGAS[129]
+    {0x0F12, 0x01F7}, // #TVAR_ash_pGAS[130]
+    {0x0F12, 0x0193}, // #TVAR_ash_pGAS[131]
+    {0x0F12, 0x014B}, // #TVAR_ash_pGAS[132]
+    {0x0F12, 0x0114}, // #TVAR_ash_pGAS[133]
+    {0x0F12, 0x00F0}, // #TVAR_ash_pGAS[134]
+    {0x0F12, 0x00D7}, // #TVAR_ash_pGAS[135]
+    {0x0F12, 0x00D0}, // #TVAR_ash_pGAS[136]
+    {0x0F12, 0x00D7}, // #TVAR_ash_pGAS[137]
+    {0x0F12, 0x00F4}, // #TVAR_ash_pGAS[138]
+    {0x0F12, 0x0125}, // #TVAR_ash_pGAS[139]
+    {0x0F12, 0x0160}, // #TVAR_ash_pGAS[140]
+    {0x0F12, 0x01B2}, // #TVAR_ash_pGAS[141]
+    {0x0F12, 0x021A}, // #TVAR_ash_pGAS[142]
+    {0x0F12, 0x01DF}, // #TVAR_ash_pGAS[143]
+    {0x0F12, 0x0172}, // #TVAR_ash_pGAS[144]
+    {0x0F12, 0x012C}, // #TVAR_ash_pGAS[145]
+    {0x0F12, 0x00FB}, // #TVAR_ash_pGAS[146]
+    {0x0F12, 0x00D5}, // #TVAR_ash_pGAS[147]
+    {0x0F12, 0x00BB}, // #TVAR_ash_pGAS[148]
+    {0x0F12, 0x00AF}, // #TVAR_ash_pGAS[149]
+    {0x0F12, 0x00B3}, // #TVAR_ash_pGAS[150]
+    {0x0F12, 0x00C7}, // #TVAR_ash_pGAS[151]
+    {0x0F12, 0x00E7}, // #TVAR_ash_pGAS[152]
+    {0x0F12, 0x0110}, // #TVAR_ash_pGAS[153]
+    {0x0F12, 0x0155}, // #TVAR_ash_pGAS[154]
+    {0x0F12, 0x01B2}, // #TVAR_ash_pGAS[155]
+    {0x0F12, 0x018C}, // #TVAR_ash_pGAS[156]
+    {0x0F12, 0x0135}, // #TVAR_ash_pGAS[157]
+    {0x0F12, 0x00F5}, // #TVAR_ash_pGAS[158]
+    {0x0F12, 0x00C0}, // #TVAR_ash_pGAS[159]
+    {0x0F12, 0x0097}, // #TVAR_ash_pGAS[160]
+    {0x0F12, 0x007C}, // #TVAR_ash_pGAS[161]
+    {0x0F12, 0x0072}, // #TVAR_ash_pGAS[162]
+    {0x0F12, 0x0078}, // #TVAR_ash_pGAS[163]
+    {0x0F12, 0x008D}, // #TVAR_ash_pGAS[164]
+    {0x0F12, 0x00B2}, // #TVAR_ash_pGAS[165]
+    {0x0F12, 0x00E0}, // #TVAR_ash_pGAS[166]
+    {0x0F12, 0x011E}, // #TVAR_ash_pGAS[167]
+    {0x0F12, 0x0170}, // #TVAR_ash_pGAS[168]
+    {0x0F12, 0x0159}, // #TVAR_ash_pGAS[169]
+    {0x0F12, 0x0106}, // #TVAR_ash_pGAS[170]
+    {0x0F12, 0x00C2}, // #TVAR_ash_pGAS[171]
+    {0x0F12, 0x008B}, // #TVAR_ash_pGAS[172]
+    {0x0F12, 0x0061}, // #TVAR_ash_pGAS[173]
+    {0x0F12, 0x0046}, // #TVAR_ash_pGAS[174]
+    {0x0F12, 0x003C}, // #TVAR_ash_pGAS[175]
+    {0x0F12, 0x0043}, // #TVAR_ash_pGAS[176]
+    {0x0F12, 0x0058}, // #TVAR_ash_pGAS[177]
+    {0x0F12, 0x007E}, // #TVAR_ash_pGAS[178]
+    {0x0F12, 0x00B3}, // #TVAR_ash_pGAS[179]
+    {0x0F12, 0x00F4}, // #TVAR_ash_pGAS[180]
+    {0x0F12, 0x0141}, // #TVAR_ash_pGAS[181]
+    {0x0F12, 0x0132}, // #TVAR_ash_pGAS[182]
+    {0x0F12, 0x00E5}, // #TVAR_ash_pGAS[183]
+    {0x0F12, 0x009C}, // #TVAR_ash_pGAS[184]
+    {0x0F12, 0x0062}, // #TVAR_ash_pGAS[185]
+    {0x0F12, 0x0039}, // #TVAR_ash_pGAS[186]
+    {0x0F12, 0x0021}, // #TVAR_ash_pGAS[187]
+    {0x0F12, 0x0018}, // #TVAR_ash_pGAS[188]
+    {0x0F12, 0x0020}, // #TVAR_ash_pGAS[189]
+    {0x0F12, 0x0034}, // #TVAR_ash_pGAS[190]
+    {0x0F12, 0x005B}, // #TVAR_ash_pGAS[191]
+    {0x0F12, 0x0092}, // #TVAR_ash_pGAS[192]
+    {0x0F12, 0x00D6}, // #TVAR_ash_pGAS[193]
+    {0x0F12, 0x0121}, // #TVAR_ash_pGAS[194]
+    {0x0F12, 0x011D}, // #TVAR_ash_pGAS[195]
+    {0x0F12, 0x00CC}, // #TVAR_ash_pGAS[196]
+    {0x0F12, 0x0083}, // #TVAR_ash_pGAS[197]
+    {0x0F12, 0x004A}, // #TVAR_ash_pGAS[198]
+    {0x0F12, 0x0023}, // #TVAR_ash_pGAS[199]
+    {0x0F12, 0x000C}, // #TVAR_ash_pGAS[200]
+    {0x0F12, 0x0005}, // #TVAR_ash_pGAS[201]
+    {0x0F12, 0x000D}, // #TVAR_ash_pGAS[202]
+    {0x0F12, 0x0022}, // #TVAR_ash_pGAS[203]
+    {0x0F12, 0x0048}, // #TVAR_ash_pGAS[204]
+    {0x0F12, 0x007F}, // #TVAR_ash_pGAS[205]
+    {0x0F12, 0x00C9}, // #TVAR_ash_pGAS[206]
+    {0x0F12, 0x0115}, // #TVAR_ash_pGAS[207]
+    {0x0F12, 0x0115}, // #TVAR_ash_pGAS[208]
+    {0x0F12, 0x00C4}, // #TVAR_ash_pGAS[209]
+    {0x0F12, 0x007A}, // #TVAR_ash_pGAS[210]
+    {0x0F12, 0x0041}, // #TVAR_ash_pGAS[211]
+    {0x0F12, 0x001B}, // #TVAR_ash_pGAS[212]
+    {0x0F12, 0x0006}, // #TVAR_ash_pGAS[213]
+    {0x0F12, 0x0000}, // #TVAR_ash_pGAS[214]
+    {0x0F12, 0x0008}, // #TVAR_ash_pGAS[215]
+    {0x0F12, 0x001E}, // #TVAR_ash_pGAS[216]
+    {0x0F12, 0x0044}, // #TVAR_ash_pGAS[217]
+    {0x0F12, 0x007D}, // #TVAR_ash_pGAS[218]
+    {0x0F12, 0x00C9}, // #TVAR_ash_pGAS[219]
+    {0x0F12, 0x0115}, // #TVAR_ash_pGAS[220]
+    {0x0F12, 0x011C}, // #TVAR_ash_pGAS[221]
+    {0x0F12, 0x00CB}, // #TVAR_ash_pGAS[222]
+    {0x0F12, 0x0081}, // #TVAR_ash_pGAS[223]
+    {0x0F12, 0x0048}, // #TVAR_ash_pGAS[224]
+    {0x0F12, 0x0022}, // #TVAR_ash_pGAS[225]
+    {0x0F12, 0x000D}, // #TVAR_ash_pGAS[226]
+    {0x0F12, 0x0007}, // #TVAR_ash_pGAS[227]
+    {0x0F12, 0x0010}, // #TVAR_ash_pGAS[228]
+    {0x0F12, 0x0027}, // #TVAR_ash_pGAS[229]
+    {0x0F12, 0x004E}, // #TVAR_ash_pGAS[230]
+    {0x0F12, 0x0088}, // #TVAR_ash_pGAS[231]
+    {0x0F12, 0x00D5}, // #TVAR_ash_pGAS[232]
+    {0x0F12, 0x011C}, // #TVAR_ash_pGAS[233]
+    {0x0F12, 0x012D}, // #TVAR_ash_pGAS[234]
+    {0x0F12, 0x00E0}, // #TVAR_ash_pGAS[235]
+    {0x0F12, 0x0097}, // #TVAR_ash_pGAS[236]
+    {0x0F12, 0x005F}, // #TVAR_ash_pGAS[237]
+    {0x0F12, 0x0038}, // #TVAR_ash_pGAS[238]
+    {0x0F12, 0x0021}, // #TVAR_ash_pGAS[239]
+    {0x0F12, 0x001C}, // #TVAR_ash_pGAS[240]
+    {0x0F12, 0x0026}, // #TVAR_ash_pGAS[241]
+    {0x0F12, 0x003D}, // #TVAR_ash_pGAS[242]
+    {0x0F12, 0x0068}, // #TVAR_ash_pGAS[243]
+    {0x0F12, 0x00A3}, // #TVAR_ash_pGAS[244]
+    {0x0F12, 0x00EE}, // #TVAR_ash_pGAS[245]
+    {0x0F12, 0x0138}, // #TVAR_ash_pGAS[246]
+    {0x0F12, 0x0151}, // #TVAR_ash_pGAS[247]
+    {0x0F12, 0x0102}, // #TVAR_ash_pGAS[248]
+    {0x0F12, 0x00BC}, // #TVAR_ash_pGAS[249]
+    {0x0F12, 0x0083}, // #TVAR_ash_pGAS[250]
+    {0x0F12, 0x005C}, // #TVAR_ash_pGAS[251]
+    {0x0F12, 0x0046}, // #TVAR_ash_pGAS[252]
+    {0x0F12, 0x0041}, // #TVAR_ash_pGAS[253]
+    {0x0F12, 0x004B}, // #TVAR_ash_pGAS[254]
+    {0x0F12, 0x0066}, // #TVAR_ash_pGAS[255]
+    {0x0F12, 0x0092}, // #TVAR_ash_pGAS[256]
+    {0x0F12, 0x00CD}, // #TVAR_ash_pGAS[257]
+    {0x0F12, 0x0115}, // #TVAR_ash_pGAS[258]
+    {0x0F12, 0x015F}, // #TVAR_ash_pGAS[259]
+    {0x0F12, 0x018A}, // #TVAR_ash_pGAS[260]
+    {0x0F12, 0x0133}, // #TVAR_ash_pGAS[261]
+    {0x0F12, 0x00F0}, // #TVAR_ash_pGAS[262]
+    {0x0F12, 0x00BB}, // #TVAR_ash_pGAS[263]
+    {0x0F12, 0x0097}, // #TVAR_ash_pGAS[264]
+    {0x0F12, 0x007F}, // #TVAR_ash_pGAS[265]
+    {0x0F12, 0x0079}, // #TVAR_ash_pGAS[266]
+    {0x0F12, 0x0084}, // #TVAR_ash_pGAS[267]
+    {0x0F12, 0x00A1}, // #TVAR_ash_pGAS[268]
+    {0x0F12, 0x00CD}, // #TVAR_ash_pGAS[269]
+    {0x0F12, 0x0105}, // #TVAR_ash_pGAS[270]
+    {0x0F12, 0x014C}, // #TVAR_ash_pGAS[271]
+    {0x0F12, 0x01A0}, // #TVAR_ash_pGAS[272]
+    {0x0F12, 0x01D5}, // #TVAR_ash_pGAS[273]
+    {0x0F12, 0x0171}, // #TVAR_ash_pGAS[274]
+    {0x0F12, 0x012D}, // #TVAR_ash_pGAS[275]
+    {0x0F12, 0x00FE}, // #TVAR_ash_pGAS[276]
+    {0x0F12, 0x00D9}, // #TVAR_ash_pGAS[277]
+    {0x0F12, 0x00C2}, // #TVAR_ash_pGAS[278]
+    {0x0F12, 0x00BD}, // #TVAR_ash_pGAS[279]
+    {0x0F12, 0x00C9}, // #TVAR_ash_pGAS[280]
+    {0x0F12, 0x00E5}, // #TVAR_ash_pGAS[281]
+    {0x0F12, 0x0111}, // #TVAR_ash_pGAS[282]
+    {0x0F12, 0x0146}, // #TVAR_ash_pGAS[283]
+    {0x0F12, 0x018E}, // #TVAR_ash_pGAS[284]
+    {0x0F12, 0x01EE}, // #TVAR_ash_pGAS[285]
+    {0x0F12, 0x01CF}, // #TVAR_ash_pGAS[286]
+    {0x0F12, 0x0162}, // #TVAR_ash_pGAS[287]
+    {0x0F12, 0x011E}, // #TVAR_ash_pGAS[288]
+    {0x0F12, 0x00F1}, // #TVAR_ash_pGAS[289]
+    {0x0F12, 0x00CF}, // #TVAR_ash_pGAS[290]
+    {0x0F12, 0x00B9}, // #TVAR_ash_pGAS[291]
+    {0x0F12, 0x00B0}, // #TVAR_ash_pGAS[292]
+    {0x0F12, 0x00BB}, // #TVAR_ash_pGAS[293]
+    {0x0F12, 0x00D6}, // #TVAR_ash_pGAS[294]
+    {0x0F12, 0x00F9}, // #TVAR_ash_pGAS[295]
+    {0x0F12, 0x0128}, // #TVAR_ash_pGAS[296]
+    {0x0F12, 0x016F}, // #TVAR_ash_pGAS[297]
+    {0x0F12, 0x01D3}, // #TVAR_ash_pGAS[298]
+    {0x0F12, 0x017B}, // #TVAR_ash_pGAS[299]
+    {0x0F12, 0x0127}, // #TVAR_ash_pGAS[300]
+    {0x0F12, 0x00E9}, // #TVAR_ash_pGAS[301]
+    {0x0F12, 0x00B7}, // #TVAR_ash_pGAS[302]
+    {0x0F12, 0x0091}, // #TVAR_ash_pGAS[303]
+    {0x0F12, 0x007B}, // #TVAR_ash_pGAS[304]
+    {0x0F12, 0x0074}, // #TVAR_ash_pGAS[305]
+    {0x0F12, 0x007F}, // #TVAR_ash_pGAS[306]
+    {0x0F12, 0x0099}, // #TVAR_ash_pGAS[307]
+    {0x0F12, 0x00C2}, // #TVAR_ash_pGAS[308]
+    {0x0F12, 0x00F6}, // #TVAR_ash_pGAS[309]
+    {0x0F12, 0x0139}, // #TVAR_ash_pGAS[310]
+    {0x0F12, 0x018E}, // #TVAR_ash_pGAS[311]
+    {0x0F12, 0x014A}, // #TVAR_ash_pGAS[312]
+    {0x0F12, 0x00FA}, // #TVAR_ash_pGAS[313]
+    {0x0F12, 0x00B9}, // #TVAR_ash_pGAS[314]
+    {0x0F12, 0x0084}, // #TVAR_ash_pGAS[315]
+    {0x0F12, 0x005D}, // #TVAR_ash_pGAS[316]
+    {0x0F12, 0x0046}, // #TVAR_ash_pGAS[317]
+    {0x0F12, 0x003E}, // #TVAR_ash_pGAS[318]
+    {0x0F12, 0x0049}, // #TVAR_ash_pGAS[319]
+    {0x0F12, 0x0061}, // #TVAR_ash_pGAS[320]
+    {0x0F12, 0x008C}, // #TVAR_ash_pGAS[321]
+    {0x0F12, 0x00C5}, // #TVAR_ash_pGAS[322]
+    {0x0F12, 0x0107}, // #TVAR_ash_pGAS[323]
+    {0x0F12, 0x0155}, // #TVAR_ash_pGAS[324]
+    {0x0F12, 0x0129}, // #TVAR_ash_pGAS[325]
+    {0x0F12, 0x00DA}, // #TVAR_ash_pGAS[326]
+    {0x0F12, 0x0096}, // #TVAR_ash_pGAS[327]
+    {0x0F12, 0x005F}, // #TVAR_ash_pGAS[328]
+    {0x0F12, 0x0037}, // #TVAR_ash_pGAS[329]
+    {0x0F12, 0x0021}, // #TVAR_ash_pGAS[330]
+    {0x0F12, 0x001A}, // #TVAR_ash_pGAS[331]
+    {0x0F12, 0x0023}, // #TVAR_ash_pGAS[332]
+    {0x0F12, 0x003B}, // #TVAR_ash_pGAS[333]
+    {0x0F12, 0x0065}, // #TVAR_ash_pGAS[334]
+    {0x0F12, 0x009F}, // #TVAR_ash_pGAS[335]
+    {0x0F12, 0x00E5}, // #TVAR_ash_pGAS[336]
+    {0x0F12, 0x012F}, // #TVAR_ash_pGAS[337]
+    {0x0F12, 0x0116}, // #TVAR_ash_pGAS[338]
+    {0x0F12, 0x00C7}, // #TVAR_ash_pGAS[339]
+    {0x0F12, 0x0080}, // #TVAR_ash_pGAS[340]
+    {0x0F12, 0x0049}, // #TVAR_ash_pGAS[341]
+    {0x0F12, 0x0022}, // #TVAR_ash_pGAS[342]
+    {0x0F12, 0x000C}, // #TVAR_ash_pGAS[343]
+    {0x0F12, 0x0006}, // #TVAR_ash_pGAS[344]
+    {0x0F12, 0x000E}, // #TVAR_ash_pGAS[345]
+    {0x0F12, 0x0026}, // #TVAR_ash_pGAS[346]
+    {0x0F12, 0x004E}, // #TVAR_ash_pGAS[347]
+    {0x0F12, 0x0086}, // #TVAR_ash_pGAS[348]
+    {0x0F12, 0x00CF}, // #TVAR_ash_pGAS[349]
+    {0x0F12, 0x011C}, // #TVAR_ash_pGAS[350]
+    {0x0F12, 0x0113}, // #TVAR_ash_pGAS[351]
+    {0x0F12, 0x00C4}, // #TVAR_ash_pGAS[352]
+    {0x0F12, 0x007A}, // #TVAR_ash_pGAS[353]
+    {0x0F12, 0x0042}, // #TVAR_ash_pGAS[354]
+    {0x0F12, 0x001D}, // #TVAR_ash_pGAS[355]
+    {0x0F12, 0x0007}, // #TVAR_ash_pGAS[356]
+    {0x0F12, 0x0000}, // #TVAR_ash_pGAS[357]
+    {0x0F12, 0x0008}, // #TVAR_ash_pGAS[358]
+    {0x0F12, 0x001F}, // #TVAR_ash_pGAS[359]
+    {0x0F12, 0x0045}, // #TVAR_ash_pGAS[360]
+    {0x0F12, 0x007F}, // #TVAR_ash_pGAS[361]
+    {0x0F12, 0x00C9}, // #TVAR_ash_pGAS[362]
+    {0x0F12, 0x0112}, // #TVAR_ash_pGAS[363]
+    {0x0F12, 0x011C}, // #TVAR_ash_pGAS[364]
+    {0x0F12, 0x00CF}, // #TVAR_ash_pGAS[365]
+    {0x0F12, 0x0086}, // #TVAR_ash_pGAS[366]
+    {0x0F12, 0x004C}, // #TVAR_ash_pGAS[367]
+    {0x0F12, 0x0025}, // #TVAR_ash_pGAS[368]
+    {0x0F12, 0x000F}, // #TVAR_ash_pGAS[369]
+    {0x0F12, 0x0007}, // #TVAR_ash_pGAS[370]
+    {0x0F12, 0x000E}, // #TVAR_ash_pGAS[371]
+    {0x0F12, 0x0025}, // #TVAR_ash_pGAS[372]
+    {0x0F12, 0x004B}, // #TVAR_ash_pGAS[373]
+    {0x0F12, 0x0084}, // #TVAR_ash_pGAS[374]
+    {0x0F12, 0x00CD}, // #TVAR_ash_pGAS[375]
+    {0x0F12, 0x0115}, // #TVAR_ash_pGAS[376]
+    {0x0F12, 0x0134}, // #TVAR_ash_pGAS[377]
+    {0x0F12, 0x00E7}, // #TVAR_ash_pGAS[378]
+    {0x0F12, 0x009E}, // #TVAR_ash_pGAS[379]
+    {0x0F12, 0x0065}, // #TVAR_ash_pGAS[380]
+    {0x0F12, 0x003C}, // #TVAR_ash_pGAS[381]
+    {0x0F12, 0x0024}, // #TVAR_ash_pGAS[382]
+    {0x0F12, 0x001B}, // #TVAR_ash_pGAS[383]
+    {0x0F12, 0x0022}, // #TVAR_ash_pGAS[384]
+    {0x0F12, 0x0039}, // #TVAR_ash_pGAS[385]
+    {0x0F12, 0x0062}, // #TVAR_ash_pGAS[386]
+    {0x0F12, 0x0099}, // #TVAR_ash_pGAS[387]
+    {0x0F12, 0x00DF}, // #TVAR_ash_pGAS[388]
+    {0x0F12, 0x0126}, // #TVAR_ash_pGAS[389]
+    {0x0F12, 0x0157}, // #TVAR_ash_pGAS[390]
+    {0x0F12, 0x010C}, // #TVAR_ash_pGAS[391]
+    {0x0F12, 0x00C6}, // #TVAR_ash_pGAS[392]
+    {0x0F12, 0x008D}, // #TVAR_ash_pGAS[393]
+    {0x0F12, 0x0063}, // #TVAR_ash_pGAS[394]
+    {0x0F12, 0x0049}, // #TVAR_ash_pGAS[395]
+    {0x0F12, 0x0041}, // #TVAR_ash_pGAS[396]
+    {0x0F12, 0x0047}, // #TVAR_ash_pGAS[397]
+    {0x0F12, 0x005F}, // #TVAR_ash_pGAS[398]
+    {0x0F12, 0x0087}, // #TVAR_ash_pGAS[399]
+    {0x0F12, 0x00BF}, // #TVAR_ash_pGAS[400]
+    {0x0F12, 0x0100}, // #TVAR_ash_pGAS[401]
+    {0x0F12, 0x0149}, // #TVAR_ash_pGAS[402]
+    {0x0F12, 0x0194}, // #TVAR_ash_pGAS[403]
+    {0x0F12, 0x0140}, // #TVAR_ash_pGAS[404]
+    {0x0F12, 0x00FF}, // #TVAR_ash_pGAS[405]
+    {0x0F12, 0x00CA}, // #TVAR_ash_pGAS[406]
+    {0x0F12, 0x00A0}, // #TVAR_ash_pGAS[407]
+    {0x0F12, 0x0083}, // #TVAR_ash_pGAS[408]
+    {0x0F12, 0x007B}, // #TVAR_ash_pGAS[409]
+    {0x0F12, 0x007F}, // #TVAR_ash_pGAS[410]
+    {0x0F12, 0x0097}, // #TVAR_ash_pGAS[411]
+    {0x0F12, 0x00BE}, // #TVAR_ash_pGAS[412]
+    {0x0F12, 0x00F2}, // #TVAR_ash_pGAS[413]
+    {0x0F12, 0x0131}, // #TVAR_ash_pGAS[414]
+    {0x0F12, 0x0181}, // #TVAR_ash_pGAS[415]
+    {0x0F12, 0x01E4}, // #TVAR_ash_pGAS[416]
+    {0x0F12, 0x017E}, // #TVAR_ash_pGAS[417]
+    {0x0F12, 0x013B}, // #TVAR_ash_pGAS[418]
+    {0x0F12, 0x010C}, // #TVAR_ash_pGAS[419]
+    {0x0F12, 0x00E5}, // #TVAR_ash_pGAS[420]
+    {0x0F12, 0x00CA}, // #TVAR_ash_pGAS[421]
+    {0x0F12, 0x00BF}, // #TVAR_ash_pGAS[422]
+    {0x0F12, 0x00C4}, // #TVAR_ash_pGAS[423]
+    {0x0F12, 0x00D8}, // #TVAR_ash_pGAS[424]
+    {0x0F12, 0x00FE}, // #TVAR_ash_pGAS[425]
+    {0x0F12, 0x012D}, // #TVAR_ash_pGAS[426]
+    {0x0F12, 0x016E}, // #TVAR_ash_pGAS[427]
+    {0x0F12, 0x01CC}, // #TVAR_ash_pGAS[428]
+    {0x0F12, 0x0194}, // #TVAR_ash_pGAS[429]
+    {0x0F12, 0x0138}, // #TVAR_ash_pGAS[430]
+    {0x0F12, 0x00FA}, // #TVAR_ash_pGAS[431]
+    {0x0F12, 0x00D2}, // #TVAR_ash_pGAS[432]
+    {0x0F12, 0x00B5}, // #TVAR_ash_pGAS[433]
+    {0x0F12, 0x00A4}, // #TVAR_ash_pGAS[434]
+    {0x0F12, 0x009E}, // #TVAR_ash_pGAS[435]
+    {0x0F12, 0x00A7}, // #TVAR_ash_pGAS[436]
+    {0x0F12, 0x00BC}, // #TVAR_ash_pGAS[437]
+    {0x0F12, 0x00DC}, // #TVAR_ash_pGAS[438]
+    {0x0F12, 0x0106}, // #TVAR_ash_pGAS[439]
+    {0x0F12, 0x0147}, // #TVAR_ash_pGAS[440]
+    {0x0F12, 0x0199}, // #TVAR_ash_pGAS[441]
+    {0x0F12, 0x0145}, // #TVAR_ash_pGAS[442]
+    {0x0F12, 0x0101}, // #TVAR_ash_pGAS[443]
+    {0x0F12, 0x00CA}, // #TVAR_ash_pGAS[444]
+    {0x0F12, 0x00A0}, // #TVAR_ash_pGAS[445]
+    {0x0F12, 0x0081}, // #TVAR_ash_pGAS[446]
+    {0x0F12, 0x006D}, // #TVAR_ash_pGAS[447]
+    {0x0F12, 0x0069}, // #TVAR_ash_pGAS[448]
+    {0x0F12, 0x0072}, // #TVAR_ash_pGAS[449]
+    {0x0F12, 0x0089}, // #TVAR_ash_pGAS[450]
+    {0x0F12, 0x00AD}, // #TVAR_ash_pGAS[451]
+    {0x0F12, 0x00DA}, // #TVAR_ash_pGAS[452]
+    {0x0F12, 0x0117}, // #TVAR_ash_pGAS[453]
+    {0x0F12, 0x0160}, // #TVAR_ash_pGAS[454]
+    {0x0F12, 0x0117}, // #TVAR_ash_pGAS[455]
+    {0x0F12, 0x00D7}, // #TVAR_ash_pGAS[456]
+    {0x0F12, 0x009D}, // #TVAR_ash_pGAS[457]
+    {0x0F12, 0x0070}, // #TVAR_ash_pGAS[458]
+    {0x0F12, 0x0050}, // #TVAR_ash_pGAS[459]
+    {0x0F12, 0x003F}, // #TVAR_ash_pGAS[460]
+    {0x0F12, 0x0038}, // #TVAR_ash_pGAS[461]
+    {0x0F12, 0x0041}, // #TVAR_ash_pGAS[462]
+    {0x0F12, 0x0057}, // #TVAR_ash_pGAS[463]
+    {0x0F12, 0x0079}, // #TVAR_ash_pGAS[464]
+    {0x0F12, 0x00AD}, // #TVAR_ash_pGAS[465]
+    {0x0F12, 0x00EA}, // #TVAR_ash_pGAS[466]
+    {0x0F12, 0x0129}, // #TVAR_ash_pGAS[467]
+    {0x0F12, 0x00F4}, // #TVAR_ash_pGAS[468]
+    {0x0F12, 0x00B7}, // #TVAR_ash_pGAS[469]
+    {0x0F12, 0x007C}, // #TVAR_ash_pGAS[470]
+    {0x0F12, 0x004E}, // #TVAR_ash_pGAS[471]
+    {0x0F12, 0x002F}, // #TVAR_ash_pGAS[472]
+    {0x0F12, 0x001D}, // #TVAR_ash_pGAS[473]
+    {0x0F12, 0x0018}, // #TVAR_ash_pGAS[474]
+    {0x0F12, 0x001F}, // #TVAR_ash_pGAS[475]
+    {0x0F12, 0x0033}, // #TVAR_ash_pGAS[476]
+    {0x0F12, 0x0056}, // #TVAR_ash_pGAS[477]
+    {0x0F12, 0x0088}, // #TVAR_ash_pGAS[478]
+    {0x0F12, 0x00C6}, // #TVAR_ash_pGAS[479]
+    {0x0F12, 0x0104}, // #TVAR_ash_pGAS[480]
+    {0x0F12, 0x00E2}, // #TVAR_ash_pGAS[481]
+    {0x0F12, 0x00A5}, // #TVAR_ash_pGAS[482]
+    {0x0F12, 0x0066}, // #TVAR_ash_pGAS[483]
+    {0x0F12, 0x0038}, // #TVAR_ash_pGAS[484]
+    {0x0F12, 0x001A}, // #TVAR_ash_pGAS[485]
+    {0x0F12, 0x0009}, // #TVAR_ash_pGAS[486]
+    {0x0F12, 0x0006}, // #TVAR_ash_pGAS[487]
+    {0x0F12, 0x000C}, // #TVAR_ash_pGAS[488]
+    {0x0F12, 0x001E}, // #TVAR_ash_pGAS[489]
+    {0x0F12, 0x003F}, // #TVAR_ash_pGAS[490]
+    {0x0F12, 0x006F}, // #TVAR_ash_pGAS[491]
+    {0x0F12, 0x00B2}, // #TVAR_ash_pGAS[492]
+    {0x0F12, 0x00EE}, // #TVAR_ash_pGAS[493]
+    {0x0F12, 0x00DD}, // #TVAR_ash_pGAS[494]
+    {0x0F12, 0x009E}, // #TVAR_ash_pGAS[495]
+    {0x0F12, 0x0060}, // #TVAR_ash_pGAS[496]
+    {0x0F12, 0x0030}, // #TVAR_ash_pGAS[497]
+    {0x0F12, 0x0013}, // #TVAR_ash_pGAS[498]
+    {0x0F12, 0x0004}, // #TVAR_ash_pGAS[499]
+    {0x0F12, 0x0000}, // #TVAR_ash_pGAS[500]
+    {0x0F12, 0x0005}, // #TVAR_ash_pGAS[501]
+    {0x0F12, 0x0017}, // #TVAR_ash_pGAS[502]
+    {0x0F12, 0x0036}, // #TVAR_ash_pGAS[503]
+    {0x0F12, 0x0066}, // #TVAR_ash_pGAS[504]
+    {0x0F12, 0x00A7}, // #TVAR_ash_pGAS[505]
+    {0x0F12, 0x00E4}, // #TVAR_ash_pGAS[506]
+    {0x0F12, 0x00E5}, // #TVAR_ash_pGAS[507]
+    {0x0F12, 0x00A6}, // #TVAR_ash_pGAS[508]
+    {0x0F12, 0x0067}, // #TVAR_ash_pGAS[509]
+    {0x0F12, 0x0039}, // #TVAR_ash_pGAS[510]
+    {0x0F12, 0x001B}, // #TVAR_ash_pGAS[511]
+    {0x0F12, 0x000B}, // #TVAR_ash_pGAS[512]
+    {0x0F12, 0x0006}, // #TVAR_ash_pGAS[513]
+    {0x0F12, 0x000B}, // #TVAR_ash_pGAS[514]
+    {0x0F12, 0x001C}, // #TVAR_ash_pGAS[515]
+    {0x0F12, 0x003B}, // #TVAR_ash_pGAS[516]
+    {0x0F12, 0x006B}, // #TVAR_ash_pGAS[517]
+    {0x0F12, 0x00AC}, // #TVAR_ash_pGAS[518]
+    {0x0F12, 0x00E6}, // #TVAR_ash_pGAS[519]
+    {0x0F12, 0x00F9}, // #TVAR_ash_pGAS[520]
+    {0x0F12, 0x00BC}, // #TVAR_ash_pGAS[521]
+    {0x0F12, 0x007E}, // #TVAR_ash_pGAS[522]
+    {0x0F12, 0x0051}, // #TVAR_ash_pGAS[523]
+    {0x0F12, 0x0030}, // #TVAR_ash_pGAS[524]
+    {0x0F12, 0x001E}, // #TVAR_ash_pGAS[525]
+    {0x0F12, 0x0018}, // #TVAR_ash_pGAS[526]
+    {0x0F12, 0x001E}, // #TVAR_ash_pGAS[527]
+    {0x0F12, 0x002F}, // #TVAR_ash_pGAS[528]
+    {0x0F12, 0x0050}, // #TVAR_ash_pGAS[529]
+    {0x0F12, 0x007E}, // #TVAR_ash_pGAS[530]
+    {0x0F12, 0x00BD}, // #TVAR_ash_pGAS[531]
+    {0x0F12, 0x00F7}, // #TVAR_ash_pGAS[532]
+    {0x0F12, 0x011A}, // #TVAR_ash_pGAS[533]
+    {0x0F12, 0x00DF}, // #TVAR_ash_pGAS[534]
+    {0x0F12, 0x00A5}, // #TVAR_ash_pGAS[535]
+    {0x0F12, 0x0076}, // #TVAR_ash_pGAS[536]
+    {0x0F12, 0x0054}, // #TVAR_ash_pGAS[537]
+    {0x0F12, 0x0041}, // #TVAR_ash_pGAS[538]
+    {0x0F12, 0x003A}, // #TVAR_ash_pGAS[539]
+    {0x0F12, 0x003E}, // #TVAR_ash_pGAS[540]
+    {0x0F12, 0x0051}, // #TVAR_ash_pGAS[541]
+    {0x0F12, 0x0073}, // #TVAR_ash_pGAS[542]
+    {0x0F12, 0x00A1}, // #TVAR_ash_pGAS[543]
+    {0x0F12, 0x00DB}, // #TVAR_ash_pGAS[544]
+    {0x0F12, 0x0115}, // #TVAR_ash_pGAS[545]
+    {0x0F12, 0x0157}, // #TVAR_ash_pGAS[546]
+    {0x0F12, 0x0112}, // #TVAR_ash_pGAS[547]
+    {0x0F12, 0x00DA}, // #TVAR_ash_pGAS[548]
+    {0x0F12, 0x00AE}, // #TVAR_ash_pGAS[549]
+    {0x0F12, 0x008D}, // #TVAR_ash_pGAS[550]
+    {0x0F12, 0x0078}, // #TVAR_ash_pGAS[551]
+    {0x0F12, 0x006F}, // #TVAR_ash_pGAS[552]
+    {0x0F12, 0x0074}, // #TVAR_ash_pGAS[553]
+    {0x0F12, 0x0087}, // #TVAR_ash_pGAS[554]
+    {0x0F12, 0x00A7}, // #TVAR_ash_pGAS[555]
+    {0x0F12, 0x00D4}, // #TVAR_ash_pGAS[556]
+    {0x0F12, 0x010E}, // #TVAR_ash_pGAS[557]
+    {0x0F12, 0x014F}, // #TVAR_ash_pGAS[558]
+    {0x0F12, 0x0195}, // #TVAR_ash_pGAS[559]
+    {0x0F12, 0x0147}, // #TVAR_ash_pGAS[560]
+    {0x0F12, 0x0111}, // #TVAR_ash_pGAS[561]
+    {0x0F12, 0x00E6}, // #TVAR_ash_pGAS[562]
+    {0x0F12, 0x00C9}, // #TVAR_ash_pGAS[563]
+    {0x0F12, 0x00B4}, // #TVAR_ash_pGAS[564]
+    {0x0F12, 0x00AA}, // #TVAR_ash_pGAS[565]
+    {0x0F12, 0x00AE}, // #TVAR_ash_pGAS[566]
+    {0x0F12, 0x00C0}, // #TVAR_ash_pGAS[567]
+    {0x0F12, 0x00DF}, // #TVAR_ash_pGAS[568]
+    {0x0F12, 0x0106}, // #TVAR_ash_pGAS[569]
+    {0x0F12, 0x0143}, // #TVAR_ash_pGAS[570]
+    {0x0F12, 0x018F}, // #TVAR_ash_pGAS[571]
+    {0x002A, 0x0D30},
+    {0x0F12, 0x02A7}, // #awbb_GLocusR
+    {0x0F12, 0x0343}, // #awbb_GLocusB
+    {0x002A, 0x06B8},
+    {0x0F12, 0x00C0}, // #TVAR_ash_AwbAshCord_0_
+    {0x0F12, 0x00E0}, // #TVAR_ash_AwbAshCord_1_
+    {0x0F12, 0x00FA}, // #TVAR_ash_AwbAshCord_2_
+    {0x0F12, 0x011D}, // #TVAR_ash_AwbAshCord_3_
+    {0x0F12, 0x0144}, // #TVAR_ash_AwbAshCord_4_
+    {0x0F12, 0x0173}, // #TVAR_ash_AwbAshCord_5_
+    {0x0F12, 0x0180}, // #TVAR_ash_AwbAshCord_6_
+    //================================================================================================
+    // SET CCM
+    //================================================================================================
+    // CCM start address // 7000_33A4
+    {0x002A, 0x0698},
+    {0x0F12, 0x33A4},
+    {0x0F12, 0x7000},
+    {0x002A, 0x33A4},
+    {0x0F12, 0x01C3}, //01CB //#TVAR_wbt_pBaseCcms// Horizon
+    {0x0F12, 0xFF89}, //FF8E //#TVAR_wbt_pBaseCcms
+    {0x0F12, 0xFFE5}, //FFD2 //#TVAR_wbt_pBaseCcms
+    {0x0F12, 0xFF26}, //FF3C  //FF64 //#TVAR_wbt_pBaseCcms
+    {0x0F12, 0x028E}, //0305  //01B2 //#TVAR_wbt_pBaseCcms
+    {0x0F12, 0xFF80}, //FED8  //FF35 //#TVAR_wbt_pBaseCcms
+    {0x0F12, 0x0002}, //FFEC  //FFDF //#TVAR_wbt_pBaseCcms
+    {0x0F12, 0xFFA8}, //FFFD  //FFE9 //#TVAR_wbt_pBaseCcms
+    {0x0F12, 0x01F0}, //0354  //01BD //#TVAR_wbt_pBaseCcms
+    {0x0F12, 0x0125}, //011C //#TVAR_wbt_pBaseCcms
+    {0x0F12, 0x0119}, //011B //#TVAR_wbt_pBaseCcms
+    {0x0F12, 0xFE5A}, //FF43 //#TVAR_wbt_pBaseCcms
+    {0x0F12, 0x0179}, //019D //#TVAR_wbt_pBaseCcms
+    {0x0F12, 0xFF8A}, //FF4C //#TVAR_wbt_pBaseCcms
+    {0x0F12, 0x0180}, //01CC //#TVAR_wbt_pBaseCcms
+    {0x0F12, 0xFEC2}, //FF33 //#TVAR_wbt_pBaseCcms
+    {0x0F12, 0x0176}, //0173 //#TVAR_wbt_pBaseCcms
+    {0x0F12, 0x0094}, //#TVAR_wbt_pBaseCcms /
+
+    {0x0F12, 0x01C3}, //0206 //01C8 //#TVAR_wbt_pBaseCcms[18]// Inca
+    {0x0F12, 0xFF89}, //FF84 //FF7F //#TVAR_wbt_pBaseCcms[19]
+    {0x0F12, 0xFFE5}, //FFC7 //FFE4 //#TVAR_wbt_pBaseCcms[20]
+    {0x0F12, 0xFF26}, //FF3C  //FF42 //FF64 //#TVAR_wbt_pBaseCcms[21]
+    {0x0F12, 0x028E}, //0305  //0319 //01B2 //#TVAR_wbt_pBaseCcms[22]
+    {0x0F12, 0xFF80}, //FED8  //FEEE //FF35 //#TVAR_wbt_pBaseCcms[23]
+    {0x0F12, 0x0002}, //FFEC  //001F //FFDF //#TVAR_wbt_pBaseCcms[24]
+    {0x0F12, 0xFFA8}, //FFFD  //001E //FFE9 //#TVAR_wbt_pBaseCcms[25]
+    {0x0F12, 0x01F0}, //0354  //0396 //01BD //#TVAR_wbt_pBaseCcms[26]
+    {0x0F12, 0x0125}, //0184 //011C //#TVAR_wbt_pBaseCcms[27]
+    {0x0F12, 0x0119}, //018A //011B //#TVAR_wbt_pBaseCcms[28]
+    {0x0F12, 0xFE5A}, //FDBA //FF43 //#TVAR_wbt_pBaseCcms[29]
+    {0x0F12, 0x0179}, //0215 //019D //#TVAR_wbt_pBaseCcms[30] //
+    {0x0F12, 0xFF8A}, //FEC1 //FF4C //#TVAR_wbt_pBaseCcms[31]
+    {0x0F12, 0x0180}, //0356 //01CC //#TVAR_wbt_pBaseCcms[32]
+    {0x0F12, 0xFEC2}, //FF89 //FF33 //#TVAR_wbt_pBaseCcms[33]
+    {0x0F12, 0x0176}, //021A //0173 //#TVAR_wbt_pBaseCcms[34]
+    {0x0F12, 0x0094}, //008E //012F //#TVAR_wbt_pBaseCcms[35]
+
+    {0x0F12, 0x01CA}, //01F4  //01C8 //#TVAR_wbt_pBaseCcms[36]
+    {0x0F12, 0xFF89}, //FF6B  //FF7F //#TVAR_wbt_pBaseCcms[37]
+    {0x0F12, 0xFFE0}, //FFD9  //FFE4 //#TVAR_wbt_pBaseCcms[38]
+    {0x0F12, 0xFF26}, //FF66  //FF64 //#TVAR_wbt_pBaseCcms[39]
+    {0x0F12, 0x028E}, //01FA  //01B2 //#TVAR_wbt_pBaseCcms[40]
+    {0x0F12, 0xFF80}, //FEF8  //FF35 //#TVAR_wbt_pBaseCcms[41]
+    {0x0F12, 0x0020}, //FFB8  //FFDF //#TVAR_wbt_pBaseCcms[42]
+    {0x0F12, 0xFFF8}, //FFE3  //FFE9 //#TVAR_wbt_pBaseCcms[43]
+    {0x0F12, 0x01E0}, //01F7  //01BD //#TVAR_wbt_pBaseCcms[44]
+    {0x0F12, 0x0120}, //0290  //011C //#TVAR_wbt_pBaseCcms[45]
+    {0x0F12, 0x00FA}, //0189  //011B //#TVAR_wbt_pBaseCcms[46]
+    {0x0F12, 0xFF12}, //FD6F  //FF43 //#TVAR_wbt_pBaseCcms[47]
+    {0x0F12, 0x0179}, //019D //#TVAR_wbt_pBaseCcms[48]
+    {0x0F12, 0xFF8A}, //FF4C //#TVAR_wbt_pBaseCcms[49]
+    {0x0F12, 0x0180}, //01CC //#TVAR_wbt_pBaseCcms[50]
+    {0x0F12, 0xFEC2}, //FEF8  //FF33 //#TVAR_wbt_pBaseCcms[51]
+    {0x0F12, 0x0176}, //019B  //0173 //#TVAR_wbt_pBaseCcms[52]
+    {0x0F12, 0x0094}, //014E  //012F //#TVAR_wbt_pBaseCcms[53]
+    // CWF
+    {0x0F12, 0x01CA}, //01C8  //01C8 //#TVAR_wbt_pBaseCcms[54]
+    {0x0F12, 0xFF89}, //FFA5  //FF7F //#TVAR_wbt_pBaseCcms[55]
+    {0x0F12, 0xFFE0}, //FFFC  //FFE4 //#TVAR_wbt_pBaseCcms[56]
+    {0x0F12, 0xFF26}, //FFAC  //FF64 //#TVAR_wbt_pBaseCcms[57]
+    {0x0F12, 0x028E}, //0229  //01B2 //#TVAR_wbt_pBaseCcms[58]
+    {0x0F12, 0xFF80}, //FF0E  //FF35 //#TVAR_wbt_pBaseCcms[59]
+    {0x0F12, 0x0020}, //FF89  //FFDF //#TVAR_wbt_pBaseCcms[60]
+    {0x0F12, 0xFFF8}, //0010  //FFE9 //#TVAR_wbt_pBaseCcms[61]
+    {0x0F12, 0x01E0}, //0314  //01BD //#TVAR_wbt_pBaseCcms[62]
+    {0x0F12, 0x0120}, //0252  //011C //#TVAR_wbt_pBaseCcms[63]
+    {0x0F12, 0x00FA}, //00F5  //011B //#TVAR_wbt_pBaseCcms[64]
+    {0x0F12, 0xFF12}, //FE15  //FF43 //#TVAR_wbt_pBaseCcms[65]
+    {0x0F12, 0x0179}, //#TVAR_wbt_pBaseCcms[66]
+    {0x0F12, 0xFF8A}, //#TVAR_wbt_pBaseCcms[67]
+    {0x0F12, 0x0180}, //#TVAR_wbt_pBaseCcms[68]
+    {0x0F12, 0xFEC2}, //FF32  //FF33 //#TVAR_wbt_pBaseCcms[69]
+    {0x0F12, 0x0176}, //019E  //0173 //#TVAR_wbt_pBaseCcms[70]
+    {0x0F12, 0x0094}, //0159  //012F //#TVAR_wbt_pBaseCcms[71]
+    // D50
+    {0x0F12, 0x018A}, //01C8  //#TVAR_wbt_pBaseCcms[72]
+    {0x0F12, 0xFFC9}, //FF7F  //#TVAR_wbt_pBaseCcms[73]
+    {0x0F12, 0x0005}, //FFE4  //#TVAR_wbt_pBaseCcms[74]
+    {0x0F12, 0xFF56}, //#TVAR_wbt_pBaseCcms[75]
+    {0x0F12, 0x0230}, //#TVAR_wbt_pBaseCcms[76]
+    {0x0F12, 0xFFA0}, //#TVAR_wbt_pBaseCcms[77]
+    {0x0F12, 0x0020}, //FFDF  //#TVAR_wbt_pBaseCcms[78]
+    {0x0F12, 0xFFF8}, //FFE9  //#TVAR_wbt_pBaseCcms[79]
+    {0x0F12, 0x01E0}, //01BD  //#TVAR_wbt_pBaseCcms[80]
+    {0x0F12, 0x00FF}, //011C  //#TVAR_wbt_pBaseCcms[81]
+    {0x0F12, 0x00E2}, //011B  //#TVAR_wbt_pBaseCcms[82]
+    {0x0F12, 0xFF4D}, //FF43  //#TVAR_wbt_pBaseCcms[83]
+    {0x0F12, 0x0179}, //#TVAR_wbt_pBaseCcms[84]
+    {0x0F12, 0xFF8A}, //#TVAR_wbt_pBaseCcms[85]
+    {0x0F12, 0x0180}, //#TVAR_wbt_pBaseCcms[86]
+    {0x0F12, 0xFEC2}, //#TVAR_wbt_pBaseCcms[87]
+    {0x0F12, 0x0176}, //#TVAR_wbt_pBaseCcms[88]
+    {0x0F12, 0x0094}, //#TVAR_wbt_pBaseCcms[89]
+    //  D65
+    {0x0F12, 0x018A}, //01DC  //01C8 //#TVAR_wbt_pBaseCcms[90]
+    {0x0F12, 0xFFC9}, //FF76  //FF7F //#TVAR_wbt_pBaseCcms[91]
+    {0x0F12, 0x0005}, //FFE0  //FFE4 //#TVAR_wbt_pBaseCcms[92]
+    {0x0F12, 0xFF56}, //FF4F  //#TVAR_wbt_pBaseCcms[93]
+    {0x0F12, 0x0230}, //01F5  //#TVAR_wbt_pBaseCcms[94]
+    {0x0F12, 0xFFA0}, //FF77  //#TVAR_wbt_pBaseCcms[95]
+    {0x0F12, 0x0020}, //FFCA  //FFDF //#TVAR_wbt_pBaseCcms[96]
+    {0x0F12, 0xFFF8}, //FFD5  //FFE9 //#TVAR_wbt_pBaseCcms[97]
+    {0x0F12, 0x01E0}, //01EC  //01BD //#TVAR_wbt_pBaseCcms[98]
+    {0x0F12, 0x00FF}, //0126  //011C //#TVAR_wbt_pBaseCcms[99]
+    {0x0F12, 0x00E2}, //0125  //011B //#TVAR_wbt_pBaseCcms[100]
+    {0x0F12, 0xFF4D}, //FF35  //FF43 //#TVAR_wbt_pBaseCcms[101]
+    {0x0F12, 0x0179}, //01BE  //#TVAR_wbt_pBaseCcms[102]
+    {0x0F12, 0xFF8A}, //FF44  //#TVAR_wbt_pBaseCcms[103]
+    {0x0F12, 0x0180}, //013E  //#TVAR_wbt_pBaseCcms[104]
+    {0x0F12, 0xFEC2}, //FF2E  //#TVAR_wbt_pBaseCcms[105]
+    {0x0F12, 0x0176}, //01C0  //#TVAR_wbt_pBaseCcms[106]
+    {0x0F12, 0x0094}, //011C  //#TVAR_wbt_pBaseCcms[107]
+    {0x002A, 0x06A0}, // Outdoor CCM address // 7000_3380
+    {0x0F12, 0x3380},
+    {0x0F12, 0x7000},
+    {0x002A, 0x3380}, // Outdoor CCM
+    {0x0F12, 0x01E0}, //#TVAR_wbt_pOutdoorCcm[0]
+    {0x0F12, 0xFF80}, //#TVAR_wbt_pOutdoorCcm[1]
+    {0x0F12, 0xFFD0}, //#TVAR_wbt_pOutdoorCcm[2]
+    {0x0F12, 0xFF61}, //#TVAR_wbt_pOutdoorCcm[3]
+    {0x0F12, 0x01BD}, //#TVAR_wbt_pOutdoorCcm[4]
+    {0x0F12, 0xFF34}, //#TVAR_wbt_pOutdoorCcm[5]
+    {0x0F12, 0xFFFE}, //#TVAR_wbt_pOutdoorCcm[6]
+    {0x0F12, 0xFFF6}, //#TVAR_wbt_pOutdoorCcm[7]
+    {0x0F12, 0x019D}, //#TVAR_wbt_pOutdoorCcm[8]
+    {0x0F12, 0x0107}, //#TVAR_wbt_pOutdoorCcm[9]
+    {0x0F12, 0x010F}, //#TVAR_wbt_pOutdoorCcm[10]
+    {0x0F12, 0xFF67}, //#TVAR_wbt_pOutdoorCcm[11]
+    {0x0F12, 0x016C}, //#TVAR_wbt_pOutdoorCcm[12]
+    {0x0F12, 0xFF54}, //#TVAR_wbt_pOutdoorCcm[13]
+    {0x0F12, 0x01FC}, //#TVAR_wbt_pOutdoorCcm[14]
+    {0x0F12, 0xFF82}, //#TVAR_wbt_pOutdoorCcm[15]
+    {0x0F12, 0x015D}, //#TVAR_wbt_pOutdoorCcm[16]
+    {0x0F12, 0x00FD}, //#TVAR_wbt_pOutdoorCcm[17]
+    //White balance
+    //AWB Rgain initial value
+    //{0x002A   0E44//
+    //{0x0F12   05B0//06CC//053C //awbb_GainsInit[0] R
+    //{0x0F12   0400//0400 //awbb_GainsInit[1] G
+    //{0x0F12   05A0//055C//0600//055C //awbb_GainsInit[2] B
+
+    //AWB offset
+    //{0x002A   0E36
+    //{0x0F12   0030 //R	0x0030
+    //{0x0F12   FFD0 //B
+    //{0x0F12   0000 //G
+
+    // param_start awbb_IndoorGrZones_m_BGrid
+    {0x002A, 0x0C48},
+    {0x0F12, 0x038B}, //awbb_IndoorGrZones_m_BGrid[0]
+    {0x0F12, 0x03C0}, //awbb_IndoorGrZones_m_BGrid[1]
+    {0x0F12, 0x033D}, //awbb_IndoorGrZones_m_BGrid[2]
+    {0x0F12, 0x03C5}, //awbb_IndoorGrZones_m_BGrid[3]
+    {0x0F12, 0x0303}, //awbb_IndoorGrZones_m_BGrid[4]
+    {0x0F12, 0x03AE}, //awbb_IndoorGrZones_m_BGrid[5]
+    {0x0F12, 0x02CF}, //awbb_IndoorGrZones_m_BGrid[6]
+    {0x0F12, 0x0387}, //awbb_IndoorGrZones_m_BGrid[7]
+    {0x0F12, 0x02A0}, //awbb_IndoorGrZones_m_BGrid[8]
+    {0x0F12, 0x0360}, //awbb_IndoorGrZones_m_BGrid[9]
+    {0x0F12, 0x027C}, //awbb_IndoorGrZones_m_BGrid[10]
+    {0x0F12, 0x0335}, //awbb_IndoorGrZones_m_BGrid[11]
+    {0x0F12, 0x025D}, //awbb_IndoorGrZones_m_BGrid[12]
+    {0x0F12, 0x030A}, //awbb_IndoorGrZones_m_BGrid[13]
+    {0x0F12, 0x0243}, //awbb_IndoorGrZones_m_BGrid[14]
+    {0x0F12, 0x02E5}, //awbb_IndoorGrZones_m_BGrid[15]
+    {0x0F12, 0x0227}, //awbb_IndoorGrZones_m_BGrid[16]
+    {0x0F12, 0x02BD}, //awbb_IndoorGrZones_m_BGrid[17]
+    {0x0F12, 0x020E}, //awbb_IndoorGrZones_m_BGrid[18]
+    {0x0F12, 0x029E}, //awbb_IndoorGrZones_m_BGrid[19]
+    {0x0F12, 0x01F7}, //awbb_IndoorGrZones_m_BGrid[20]
+    {0x0F12, 0x027F}, //awbb_IndoorGrZones_m_BGrid[21]
+    {0x0F12, 0x01E3}, //awbb_IndoorGrZones_m_BGrid[22]
+    {0x0F12, 0x0262}, //awbb_IndoorGrZones_m_BGrid[23]
+    {0x0F12, 0x01D1}, //awbb_IndoorGrZones_m_BGrid[24]
+    {0x0F12, 0x024D}, //awbb_IndoorGrZones_m_BGrid[25]
+    {0x0F12, 0x01BD}, //awbb_IndoorGrZones_m_BGrid[26]
+    {0x0F12, 0x0232}, //awbb_IndoorGrZones_m_BGrid[27]
+    {0x0F12, 0x01B2}, //awbb_IndoorGrZones_m_BGrid[28]
+    {0x0F12, 0x021A}, //awbb_IndoorGrZones_m_BGrid[29]
+    {0x0F12, 0x01B3}, //awbb_IndoorGrZones_m_BGrid[30]
+    {0x0F12, 0x0201}, //awbb_IndoorGrZones_m_BGrid[31]
+    {0x0F12, 0x01BC}, //awbb_IndoorGrZones_m_BGrid[32]
+    {0x0F12, 0x01DD}, //awbb_IndoorGrZones_m_BGrid[33]
+    {0x0F12, 0x0000}, //awbb_IndoorGrZones_m_BGrid[34]
+    {0x0F12, 0x0000}, //awbb_IndoorGrZones_m_BGrid[35]
+    {0x0F12, 0x0000}, //awbb_IndoorGrZones_m_BGrid[36]
+    {0x0F12, 0x0000}, //awbb_IndoorGrZones_m_BGrid[37]
+    {0x0F12, 0x0000}, //awbb_IndoorGrZones_m_BGrid[38]
+    {0x0F12, 0x0000}, //awbb_IndoorGrZones_m_BGrid[39]
+    {0x0F12, 0x0005}, //awbb_IndoorGrZones_m_GridStep // param_end awbb_IndoorGrZones_m_BGrid
+    {0x0F12, 0x0000},
+    {0x002A, 0x0CA0},
+    {0x0F12, 0x011A}, //awbb_IndoorGrZones_m_Boffs
+    {0x0F12, 0x0000},
+    {0x002A, 0x0CE0}, // param_start awbb_LowBrGrZones_m_BGrid
+    {0x0F12, 0x0376}, //awbb_LowBrGrZones_m_BGrid[0]
+    {0x0F12, 0x03F4}, //awbb_LowBrGrZones_m_BGrid[1]
+    {0x0F12, 0x0304}, //awbb_LowBrGrZones_m_BGrid[2]
+    {0x0F12, 0x03F4}, //awbb_LowBrGrZones_m_BGrid[3]
+    {0x0F12, 0x029A}, //awbb_LowBrGrZones_m_BGrid[4]
+    {0x0F12, 0x03E6}, //awbb_LowBrGrZones_m_BGrid[5]
+    {0x0F12, 0x024E}, //awbb_LowBrGrZones_m_BGrid[6]
+    {0x0F12, 0x039A}, //awbb_LowBrGrZones_m_BGrid[7]
+    {0x0F12, 0x020E}, //awbb_LowBrGrZones_m_BGrid[8]
+    {0x0F12, 0x034C}, //awbb_LowBrGrZones_m_BGrid[9]
+    {0x0F12, 0x01E0}, //awbb_LowBrGrZones_m_BGrid[10]
+    {0x0F12, 0x02FF}, //awbb_LowBrGrZones_m_BGrid[11]
+    {0x0F12, 0x01AD}, //awbb_LowBrGrZones_m_BGrid[12]
+    {0x0F12, 0x02B8}, //awbb_LowBrGrZones_m_BGrid[13]
+    {0x0F12, 0x018A}, //awbb_LowBrGrZones_m_BGrid[14]
+    {0x0F12, 0x0284}, //awbb_LowBrGrZones_m_BGrid[15]
+    {0x0F12, 0x0187}, //awbb_LowBrGrZones_m_BGrid[16]
+    {0x0F12, 0x025A}, //awbb_LowBrGrZones_m_BGrid[17]
+    {0x0F12, 0x018D}, //awbb_LowBrGrZones_m_BGrid[18]
+    {0x0F12, 0x01F6}, //awbb_LowBrGrZones_m_BGrid[19]
+    {0x0F12, 0x0000}, //awbb_LowBrGrZones_m_BGrid[20]
+    {0x0F12, 0x0000}, //awbb_LowBrGrZones_m_BGrid[21]
+    {0x0F12, 0x0000}, //awbb_LowBrGrZones_m_BGrid[22]
+    {0x0F12, 0x0000}, //awbb_LowBrGrZones_m_BGrid[23]
+    {0x0F12, 0x0006}, //awbb_LowBrGrZones_m_GridStep // param_end awbb_LowBrGrZones_m_BGrid
+    {0x0F12, 0x0000},
+    {0x002A, 0x0D18},
+    {0x0F12, 0x00FA}, //awbb_LowBrGrZones_m_Boffs
+    {0x0F12, 0x0000},
+    {0x002A, 0x0CA4}, // param_start awbb_OutdoorGrZones_m_BGrid
+    {0x0F12, 0x026F}, //awbb_OutdoorGrZones_m_BGrid[0]
+    {0x0F12, 0x029C}, //awbb_OutdoorGrZones_m_BGrid[1]
+    {0x0F12, 0x0238}, //awbb_OutdoorGrZones_m_BGrid[2]
+    {0x0F12, 0x0284}, //awbb_OutdoorGrZones_m_BGrid[3]
+    {0x0F12, 0x0206}, //awbb_OutdoorGrZones_m_BGrid[4]
+    {0x0F12, 0x0250}, //awbb_OutdoorGrZones_m_BGrid[5]
+    {0x0F12, 0x01D6}, //awbb_OutdoorGrZones_m_BGrid[6]
+    {0x0F12, 0x0226}, //awbb_OutdoorGrZones_m_BGrid[7]
+    {0x0F12, 0x01BC}, //awbb_OutdoorGrZones_m_BGrid[8]
+    {0x0F12, 0x01F6}, //awbb_OutdoorGrZones_m_BGrid[9]
+    {0x0F12, 0x0000}, //awbb_OutdoorGrZones_m_BGrid[10]
+    {0x0F12, 0x0000}, //awbb_OutdoorGrZones_m_BGrid[11]
+    {0x0F12, 0x0000}, //awbb_OutdoorGrZones_m_BGrid[12]
+    {0x0F12, 0x0000}, //awbb_OutdoorGrZones_m_BGrid[13]
+    {0x0F12, 0x0000}, //awbb_OutdoorGrZones_m_BGrid[14]
+    {0x0F12, 0x0000}, //awbb_OutdoorGrZones_m_BGrid[15]
+    {0x0F12, 0x0000}, //awbb_OutdoorGrZones_m_BGrid[16]
+    {0x0F12, 0x0000}, //awbb_OutdoorGrZones_m_BGrid[17]
+    {0x0F12, 0x0000}, //awbb_OutdoorGrZones_m_BGrid[18]
+    {0x0F12, 0x0000}, //awbb_OutdoorGrZones_m_BGrid[19]
+    {0x0F12, 0x0000}, //awbb_OutdoorGrZones_m_BGrid[20]
+    {0x0F12, 0x0000}, //awbb_OutdoorGrZones_m_BGrid[21]
+    {0x0F12, 0x0000}, //awbb_OutdoorGrZones_m_BGrid[22]
+    {0x0F12, 0x0000}, //awbb_OutdoorGrZones_m_BGrid[23]
+    {0x0F12, 0x0006}, //awbb_OutdoorGrZones_m_GridStep // param_end awbb_OutdoorGrZones_m_BGrid
+    {0x0F12, 0x0000},
+    {0x002A, 0x0CDC},
+    {0x0F12, 0x0212}, //awbb_OutdoorGrZones_m_Boffs
+    {0x0F12, 0x0000},
+    {0x002A, 0x0D1C},
+    {0x0F12, 0x034D}, //awbb_CrclLowT_R_c
+    {0x0F12, 0x0000},
+    {0x002A, 0x0D20},
+    {0x0F12, 0x016C}, //awbb_CrclLowT_B_c
+    {0x0F12, 0x0000},
+    {0x002A, 0x0D24},
+    {0x0F12, 0x49D5}, //awbb_CrclLowT_Rad_c
+    {0x0F12, 0x0000},
+    {0x002A, 0x0D46},
+    {0x0F12, 0x0470}, //awbb_MvEq_RBthresh
+    {0x002A, 0x0D5C},
+    {0x0F12, 0x0534}, //awbb_LowTempRB
+    {0x002A, 0x0D2C},
+    {0x0F12, 0x0131}, //awbb_IntcR
+    {0x0F12, 0x012C}, //awbb_IntcB
+    {0x002A, 0x0E4A}, //Grid Correction Settings - new
+    {0x0F12, 0x0002}, //awbb_GridEnable
+    //	param_start	awbb_GridConst_2
+    {0x002A, 0x0E22},
+    {0x0F12, 0x0EC6}, //awbb_GridConst_2[0]
+    {0x0F12, 0x0F3B}, //awbb_GridConst_2[1]
+    {0x0F12, 0x0FC7}, //awbb_GridConst_2[2]
+    {0x0F12, 0x107E}, //awbb_GridConst_2[3]
+    {0x0F12, 0x10F4}, //awbb_GridConst_2[4]
+    {0x0F12, 0x1198}, //awbb_GridConst_2[5]
+    //	param_end	awbb_GridConst_2
+    {0x002A, 0x0E2E},
+    {0x0F12, 0x00B2}, //awbb_GridCoeff_R_1
+    {0x0F12, 0x00B8}, //awbb_GridCoeff_B_1
+    {0x0F12, 0x00A6}, //awbb_GridCoeff_R_2
+    {0x0F12, 0x00C3}, //awbb_GridCoeff_B_2
+
+    //	param_start	awbb_GridConst_1
+    {0x002A, 0x0E1C},
+    {0x0F12, 0x02F4}, //awbb_GridConst_1[0]
+    {0x0F12, 0x0347}, //awbb_GridConst_1[1]
+    {0x0F12, 0x0390}, //awbb_GridConst_1[2]
+    //	param_end	awbb_GridConst_1
+    //	param_start	awbb_GridCorr_R
+    {0x002A, 0x0DD4},
+    {0x0F12, 0x0000}, //awbb_GridCorr_R[0]
+    {0x0F12, 0x0000}, //awbb_GridCorr_R[1]
+    {0x0F12, 0x0000}, //awbb_GridCorr_R[2]
+    {0x0F12, 0x0000}, //awbb_GridCorr_R[3]
+    {0x0F12, 0x0000}, //awbb_GridCorr_R[4]
+    {0x0F12, 0x0000}, //awbb_GridCorr_R[5]
+    {0x0F12, 0x0000}, //awbb_GridCorr_R[6]
+    {0x0F12, 0x0000}, //awbb_GridCorr_R[7]
+    {0x0F12, 0x0000}, //awbb_GridCorr_R[8]
+    {0x0F12, 0x0000}, //awbb_GridCorr_R[9]
+    {0x0F12, 0xFFB0}, //awbb_GridCorr_R[10]
+    {0x0F12, 0x0000}, //awbb_GridCorr_R[11]
+    {0x0F12, 0x0000}, //awbb_GridCorr_R[12]
+    {0x0F12, 0x0000}, //awbb_GridCorr_R[13]
+    {0x0F12, 0x0000}, //awbb_GridCorr_R[14]
+    {0x0F12, 0x0000}, //awbb_GridCorr_R[15]
+    {0x0F12, 0x0000}, //awbb_GridCorr_R[16]
+    {0x0F12, 0x0000}, //awbb_GridCorr_R[17]
+    //	param_end	awbb_GridCorr_R
+    //	param_start	awbb_GridCorr_B
+    {0x002A, 0x0DF8},
+    {0x0F12, 0x0000}, //awbb_GridCorr_B[0]
+    {0x0F12, 0x0000}, //awbb_GridCorr_B[1]
+    {0x0F12, 0x0000}, //awbb_GridCorr_B[2]
+    {0x0F12, 0x0000}, //awbb_GridCorr_B[3]
+    {0x0F12, 0x0000}, //awbb_GridCorr_B[4]
+    {0x0F12, 0x0000}, //awbb_GridCorr_B[5]
+    {0x0F12, 0x0000}, //awbb_GridCorr_B[6]
+    {0x0F12, 0x0000}, //awbb_GridCorr_B[7]
+    {0x0F12, 0x0000}, //awbb_GridCorr_B[8]
+    {0x0F12, 0x0000}, //awbb_GridCorr_B[9]
+    {0x0F12, 0x0050}, //awbb_GridCorr_B[10]
+    {0x0F12, 0x0000}, //awbb_GridCorr_B[11]
+    {0x0F12, 0x0000}, //awbb_GridCorr_B[12]
+    {0x0F12, 0x0000}, //awbb_GridCorr_B[13]
+    {0x0F12, 0x0000}, //awbb_GridCorr_B[14]
+    {0x0F12, 0x0000}, //awbb_GridCorr_B[15]
+    {0x0F12, 0x0000}, //awbb_GridCorr_B[16]
+    {0x0F12, 0x0000}, //awbb_GridCorr_B[17]
+    //	param_end	awbb_GridCorr_B
+
+    //================================================================================================
+    // SET GAMMA
+    //================================================================================================
+    //Our //old	//STW
+    {0x002A, 0x3288},
+    {0x0F12, 0x0000}, //0000	//#SARR_usDualGammaLutRGBIndoor_0__0_ 0x70003288
+    {0x0F12, 0x0004}, //0004	//#SARR_usDualGammaLutRGBIndoor_0__1_ 0x7000328A
+    {0x0F12, 0x0010}, //0010	//#SARR_usDualGammaLutRGBIndoor_0__2_ 0x7000328C
+    {0x0F12, 0x002A}, //002A	//#SARR_usDualGammaLutRGBIndoor_0__3_ 0x7000328E
+    {0x0F12, 0x0062}, //0062	//#SARR_usDualGammaLutRGBIndoor_0__4_ 0x70003290
+    {0x0F12, 0x00D5}, //00D5	//#SARR_usDualGammaLutRGBIndoor_0__5_ 0x70003292
+    {0x0F12, 0x0138}, //0138	//#SARR_usDualGammaLutRGBIndoor_0__6_ 0x70003294
+    {0x0F12, 0x0161}, //0161	//#SARR_usDualGammaLutRGBIndoor_0__7_ 0x70003296
+    {0x0F12, 0x0186}, //0186	//#SARR_usDualGammaLutRGBIndoor_0__8_ 0x70003298
+    {0x0F12, 0x01CA}, //01BC	//#SARR_usDualGammaLutRGBIndoor_0__9_ 0x7000329A
+    {0x0F12, 0x01F8}, //01E8	//#SARR_usDualGammaLutRGBIndoor_0__10_ 0x7000329C
+    {0x0F12, 0x0225}, //020F	//#SARR_usDualGammaLutRGBIndoor_0__11_ 0x7000329E
+    {0x0F12, 0x0251}, //0232	//#SARR_usDualGammaLutRGBIndoor_0__12_ 0x700032A0
+    {0x0F12, 0x0296}, //0273	//#SARR_usDualGammaLutRGBIndoor_0__13_ 0x700032A2
+    {0x0F12, 0x02D3}, //02AF	//#SARR_usDualGammaLutRGBIndoor_0__14_ 0x700032A4
+    {0x0F12, 0x032D}, //0309	//#SARR_usDualGammaLutRGBIndoor_0__15_ 0x700032A6
+    {0x0F12, 0x0379}, //0355	//#SARR_usDualGammaLutRGBIndoor_0__16_ 0x700032A8
+    {0x0F12, 0x03B3}, //0394	//#SARR_usDualGammaLutRGBIndoor_0__17_ 0x700032AA
+    {0x0F12, 0x03DC}, //03CE	//#SARR_usDualGammaLutRGBIndoor_0__18_ 0x700032AC
+    {0x0F12, 0x03FF}, //03FF	//#SARR_usDualGammaLutRGBIndoor_0__19_ 0x700032AE
+    {0x0F12, 0x0000}, //0000	//#SARR_usDualGammaLutRGBIndoor_1__0_ 0x700032B0
+    {0x0F12, 0x0004}, //0004	//#SARR_usDualGammaLutRGBIndoor_1__1_ 0x700032B2
+    {0x0F12, 0x0010}, //0010	//#SARR_usDualGammaLutRGBIndoor_1__2_ 0x700032B4
+    {0x0F12, 0x002A}, //002A	//#SARR_usDualGammaLutRGBIndoor_1__3_ 0x700032B6
+    {0x0F12, 0x0062}, //0062	//#SARR_usDualGammaLutRGBIndoor_1__4_ 0x700032B8
+    {0x0F12, 0x00D5}, //00D5	//#SARR_usDualGammaLutRGBIndoor_1__5_ 0x700032BA
+    {0x0F12, 0x0138}, //0138	//#SARR_usDualGammaLutRGBIndoor_1__6_ 0x700032BC
+    {0x0F12, 0x0161}, //0161	//#SARR_usDualGammaLutRGBIndoor_1__7_ 0x700032BE
+    {0x0F12, 0x0186}, //0186	//#SARR_usDualGammaLutRGBIndoor_1__8_ 0x700032C0
+    {0x0F12, 0x01CA}, //01BC	//#SARR_usDualGammaLutRGBIndoor_1__9_ 0x700032C2
+    {0x0F12, 0x01F8}, //01E8	//#SARR_usDualGammaLutRGBIndoor_1__10_ 0x700032C4
+    {0x0F12, 0x0225}, //020F	//#SARR_usDualGammaLutRGBIndoor_1__11_ 0x700032C6
+    {0x0F12, 0x0251}, //0232	//#SARR_usDualGammaLutRGBIndoor_1__12_ 0x700032C8
+    {0x0F12, 0x0296}, //0273	//#SARR_usDualGammaLutRGBIndoor_1__13_ 0x700032CA
+    {0x0F12, 0x02D3}, //02AF	//#SARR_usDualGammaLutRGBIndoor_1__14_ 0x700032CC
+    {0x0F12, 0x032D}, //0309	//#SARR_usDualGammaLutRGBIndoor_1__15_ 0x700032CE
+    {0x0F12, 0x0379}, //0355	//#SARR_usDualGammaLutRGBIndoor_1__16_ 0x700032D0
+    {0x0F12, 0x03B3}, //0394	//#SARR_usDualGammaLutRGBIndoor_1__17_ 0x700032D2
+    {0x0F12, 0x03DC}, //03CE	//#SARR_usDualGammaLutRGBIndoor_1__18_ 0x700032D4
+    {0x0F12, 0x03FF}, //03FF	//#SARR_usDualGammaLutRGBIndoor_1__19_ 0x700032D6
+    {0x0F12, 0x0000}, //0000	//#SARR_usDualGammaLutRGBIndoor_2__0_ 0x700032D8
+    {0x0F12, 0x0004}, //0004	//#SARR_usDualGammaLutRGBIndoor_2__1_ 0x700032DA
+    {0x0F12, 0x0010}, //0010	//#SARR_usDualGammaLutRGBIndoor_2__2_ 0x700032DC
+    {0x0F12, 0x002A}, //002A	//#SARR_usDualGammaLutRGBIndoor_2__3_ 0x700032DE
+    {0x0F12, 0x0062}, //0062	//#SARR_usDualGammaLutRGBIndoor_2__4_ 0x700032E0
+    {0x0F12, 0x00D5}, //00D5	//#SARR_usDualGammaLutRGBIndoor_2__5_ 0x700032E2
+    {0x0F12, 0x0138}, //0138	//#SARR_usDualGammaLutRGBIndoor_2__6_ 0x700032E4
+    {0x0F12, 0x0161}, //0161	//#SARR_usDualGammaLutRGBIndoor_2__7_ 0x700032E6
+    {0x0F12, 0x0186}, //0186	//#SARR_usDualGammaLutRGBIndoor_2__8_ 0x700032E8
+    {0x0F12, 0x01CA}, //01BC	//#SARR_usDualGammaLutRGBIndoor_2__9_ 0x700032EA
+    {0x0F12, 0x01F8}, //01E8	//#SARR_usDualGammaLutRGBIndoor_2__10_ 0x700032EC
+    {0x0F12, 0x0225}, //020F	//#SARR_usDualGammaLutRGBIndoor_2__11_ 0x700032EE
+    {0x0F12, 0x0251}, //0232	//#SARR_usDualGammaLutRGBIndoor_2__12_ 0x700032F0
+    {0x0F12, 0x0296}, //0273	//#SARR_usDualGammaLutRGBIndoor_2__13_ 0x700032F2
+    {0x0F12, 0x02D3}, //02AF	//#SARR_usDualGammaLutRGBIndoor_2__14_ 0x700032F4
+    {0x0F12, 0x032D}, //0309	//#SARR_usDualGammaLutRGBIndoor_2__15_ 0x700032F6
+    {0x0F12, 0x0379}, //0355	//#SARR_usDualGammaLutRGBIndoor_2__16_ 0x700032F8
+    {0x0F12, 0x03B3}, //0394	//#SARR_usDualGammaLutRGBIndoor_2__17_ 0x700032FA
+    {0x0F12, 0x03DC}, //03CE	//#SARR_usDualGammaLutRGBIndoor_2__18_ 0x700032FC
+    {0x0F12, 0x03FF}, //03FF	//#SARR_usDualGammaLutRGBIndoor_2__19_ 0x700032FE
+
+    {0x0F12, 0x0000}, //#SARR_usDualGammaLutRGBOutdoor_0__0_ 0x70003300
+    {0x0F12, 0x0004}, //#SARR_usDualGammaLutRGBOutdoor_0__1_ 0x70003302
+    {0x0F12, 0x0010}, //#SARR_usDualGammaLutRGBOutdoor_0__2_ 0x70003304
+    {0x0F12, 0x002A}, //#SARR_usDualGammaLutRGBOutdoor_0__3_ 0x70003306
+    {0x0F12, 0x0062}, //#SARR_usDualGammaLutRGBOutdoor_0__4_ 0x70003308
+    {0x0F12, 0x00D5}, //#SARR_usDualGammaLutRGBOutdoor_0__5_ 0x7000330A
+    {0x0F12, 0x0138}, //#SARR_usDualGammaLutRGBOutdoor_0__6_ 0x7000330C
+    {0x0F12, 0x0161}, //#SARR_usDualGammaLutRGBOutdoor_0__7_ 0x7000330E
+    {0x0F12, 0x0186}, //#SARR_usDualGammaLutRGBOutdoor_0__8_ 0x70003310
+    {0x0F12, 0x01BC}, //#SARR_usDualGammaLutRGBOutdoor_0__9_ 0x70003312
+    {0x0F12, 0x01E8}, //#SARR_usDualGammaLutRGBOutdoor_0__10_0x70003314
+    {0x0F12, 0x020F}, //#SARR_usDualGammaLutRGBOutdoor_0__11_0x70003316
+    {0x0F12, 0x0232}, //#SARR_usDualGammaLutRGBOutdoor_0__12_0x70003318
+    {0x0F12, 0x0273}, //#SARR_usDualGammaLutRGBOutdoor_0__13_0x7000331A
+    {0x0F12, 0x02AF}, //#SARR_usDualGammaLutRGBOutdoor_0__14_0x7000331C
+    {0x0F12, 0x0309}, //#SARR_usDualGammaLutRGBOutdoor_0__15_0x7000331E
+    {0x0F12, 0x0355}, //#SARR_usDualGammaLutRGBOutdoor_0__16_0x70003320
+    {0x0F12, 0x0394}, //#SARR_usDualGammaLutRGBOutdoor_0__17_0x70003322
+    {0x0F12, 0x03CE}, //#SARR_usDualGammaLutRGBOutdoor_0__18_0x70003324
+    {0x0F12, 0x03FF}, //#SARR_usDualGammaLutRGBOutdoor_0__19_0x70003326
+    {0x0F12, 0x0000}, //#SARR_usDualGammaLutRGBOutdoor_1__0_ 0x70003328
+    {0x0F12, 0x0004}, //#SARR_usDualGammaLutRGBOutdoor_1__1_ 0x7000332A
+    {0x0F12, 0x0010}, //#SARR_usDualGammaLutRGBOutdoor_1__2_ 0x7000332C
+    {0x0F12, 0x002A}, //#SARR_usDualGammaLutRGBOutdoor_1__3_ 0x7000332E
+    {0x0F12, 0x0062}, //#SARR_usDualGammaLutRGBOutdoor_1__4_ 0x70003330
+    {0x0F12, 0x00D5}, //#SARR_usDualGammaLutRGBOutdoor_1__5_ 0x70003332
+    {0x0F12, 0x0138}, //#SARR_usDualGammaLutRGBOutdoor_1__6_ 0x70003334
+    {0x0F12, 0x0161}, //#SARR_usDualGammaLutRGBOutdoor_1__7_ 0x70003336
+    {0x0F12, 0x0186}, //#SARR_usDualGammaLutRGBOutdoor_1__8_ 0x70003338
+    {0x0F12, 0x01BC}, //#SARR_usDualGammaLutRGBOutdoor_1__9_ 0x7000333A
+    {0x0F12, 0x01E8}, //#SARR_usDualGammaLutRGBOutdoor_1__10_0x7000333C
+    {0x0F12, 0x020F}, //#SARR_usDualGammaLutRGBOutdoor_1__11_0x7000333E
+    {0x0F12, 0x0232}, //#SARR_usDualGammaLutRGBOutdoor_1__12_0x70003340
+    {0x0F12, 0x0273}, //#SARR_usDualGammaLutRGBOutdoor_1__13_0x70003342
+    {0x0F12, 0x02AF}, //#SARR_usDualGammaLutRGBOutdoor_1__14_0x70003344
+    {0x0F12, 0x0309}, //#SARR_usDualGammaLutRGBOutdoor_1__15_0x70003346
+    {0x0F12, 0x0355}, //#SARR_usDualGammaLutRGBOutdoor_1__16_0x70003348
+    {0x0F12, 0x0394}, //#SARR_usDualGammaLutRGBOutdoor_1__17_0x7000334A
+    {0x0F12, 0x03CE}, //#SARR_usDualGammaLutRGBOutdoor_1__18_0x7000334C
+    {0x0F12, 0x03FF}, //#SARR_usDualGammaLutRGBOutdoor_1__19_0x7000334E
+    {0x0F12, 0x0000}, //#SARR_usDualGammaLutRGBOutdoor_2__0_ 0x70003350
+    {0x0F12, 0x0004}, //#SARR_usDualGammaLutRGBOutdoor_2__1_ 0x70003352
+    {0x0F12, 0x0010}, //#SARR_usDualGammaLutRGBOutdoor_2__2_ 0x70003354
+    {0x0F12, 0x002A}, //#SARR_usDualGammaLutRGBOutdoor_2__3_ 0x70003356
+    {0x0F12, 0x0062}, //#SARR_usDualGammaLutRGBOutdoor_2__4_ 0x70003358
+    {0x0F12, 0x00D5}, //#SARR_usDualGammaLutRGBOutdoor_2__5_ 0x7000335A
+    {0x0F12, 0x0138}, //#SARR_usDualGammaLutRGBOutdoor_2__6_ 0x7000335C
+    {0x0F12, 0x0161}, //#SARR_usDualGammaLutRGBOutdoor_2__7_ 0x7000335E
+    {0x0F12, 0x0186}, //#SARR_usDualGammaLutRGBOutdoor_2__8_ 0x70003360
+    {0x0F12, 0x01BC}, //#SARR_usDualGammaLutRGBOutdoor_2__9_ 0x70003362
+    {0x0F12, 0x01E8}, //#SARR_usDualGammaLutRGBOutdoor_2__10_0x70003364
+    {0x0F12, 0x020F}, //#SARR_usDualGammaLutRGBOutdoor_2__11_0x70003366
+    {0x0F12, 0x0232}, //#SARR_usDualGammaLutRGBOutdoor_2__12_0x70003368
+    {0x0F12, 0x0273}, //#SARR_usDualGammaLutRGBOutdoor_2__13_0x7000336A
+    {0x0F12, 0x02AF}, //#SARR_usDualGammaLutRGBOutdoor_2__14_0x7000336C
+    {0x0F12, 0x0309}, //#SARR_usDualGammaLutRGBOutdoor_2__15_0x7000336E
+    {0x0F12, 0x0355}, //#SARR_usDualGammaLutRGBOutdoor_2__16_0x70003370
+    {0x0F12, 0x0394}, //#SARR_usDualGammaLutRGBOutdoor_2__17_0x70003372
+    {0x0F12, 0x03CE}, //#SARR_usDualGammaLutRGBOutdoor_2__18_0x70003374
+    {0x0F12, 0x03FF}, //#SARR_usDualGammaLutRGBOutdoor_2__19_0x70003376
+
+    {0x002A, 0x06A6},
+    {0x0F12, 0x00C0}, // #SARR_AwbCcmCord_0_
+    {0x0F12, 0x00F8}, // #SARR_AwbCcmCord_1_
+    {0x0F12, 0x0112}, // #SARR_AwbCcmCord_2_
+    {0x0F12, 0x014A}, // #SARR_AwbCcmCord_3_
+    {0x0F12, 0x0156}, // #SARR_AwbCcmCord_4_
+    {0x0F12, 0x017F}, // #SARR_AwbCcmCord_5_
+
+    {0x002A, 0x1034}, // Hong  1123
+    {0x0F12, 0x00B5}, // #SARR_IllumType[0]
+    {0x0F12, 0x00CF}, // #SARR_IllumType[1]
+    {0x0F12, 0x0116}, // #SARR_IllumType[2]
+    {0x0F12, 0x0140}, // #SARR_IllumType[3]
+    {0x0F12, 0x0150}, // #SARR_IllumType[4]
+    {0x0F12, 0x0174}, // #SARR_IllumType[5]
+    {0x0F12, 0x018E}, // #SARR_IllumType[6]
+
+    {0x0F12, 0x00B8}, // #SARR_IllumTypeF[0]
+    {0x0F12, 0x00BA}, // #SARR_IllumTypeF[1]
+    {0x0F12, 0x00C0}, // #SARR_IllumTypeF[2]
+    {0x0F12, 0x00F0}, // #SARR_IllumTypeF[3]
+    {0x0F12, 0x0100}, // #SARR_IllumTypeF[4]
+    {0x0F12, 0x0100}, // #SARR_IllumTypeF[5]
+    {0x0F12, 0x0100}, // #SARR_IllumTypeF[6]
+
+    //================================================================================================
+    // SET AFIT
+    //================================================================================================
+    // Noise index
+    {0x002A, 0x0764},
+    {0x0F12, 0x0041}, //afit_uNoiseIndInDoor[0] //
+    {0x0F12, 0x0063}, //afit_uNoiseIndInDoor[1] //
+    {0x0F12, 0x00BB}, //afit_uNoiseIndInDoor[2] // 203//
+    {0x0F12, 0x0193}, //afit_uNoiseIndInDoor[3] // Indoor_NB below 1500 _Noise index 300-400d //
+    {0x0F12, 0x02BC}, //afit_uNoiseIndInDoor[4] // DNP NB 4600 _ Noisenidex :560d-230h //
+    // AFIT table start address // 7000_07C4
+    {0x002A, 0x0770},
+    {0x0F12, 0x07C4},
+    {0x0F12, 0x7000},
+
+    // AFIT table (Variables)
+    {0x002A, 0x07C4},
+    {0x0F12, 0x0000}, //700007C4 //TVAR_afit_pBaseValS[0] // AFIT16_BRIGHTNESS
+    {0x0F12, 0x0000}, //700007C6 //TVAR_afit_pBaseValS[1] // AFIT16_CONTRAST
+    {0x0F12, 0x0001}, //700007C8 //TVAR_afit_pBaseValS[2] // AFIT16_SATURATION
+    {0x0F12, 0x0005}, //700007CA //TVAR_afit_pBaseValS[3] // AFIT16_SHARP_BLUR
+    {0x0F12, 0xFFF6}, //700007CC //TVAR_afit_pBaseValS[4] // AFIT16_GLAMOUR
+    {0x0F12, 0x00C4}, //700007CE //TVAR_afit_pBaseValS[5] // AFIT16_sddd8a_edge_high
+    {0x0F12, 0x03FF}, //700007D0 //TVAR_afit_pBaseValS[6] // AFIT16_Demosaicing_iSatVal
+    {0x0F12, 0x009C}, //700007D2 //TVAR_afit_pBaseValS[7] // AFIT16_Sharpening_iReduceEdgeThresh
+    {0x0F12, 0x017C}, //700007D4 //TVAR_afit_pBaseValS[8] // AFIT16_demsharpmix1_iRGBOffset
+    {0x0F12, 0x03FF}, //700007D6 //TVAR_afit_pBaseValS[9] // AFIT16_demsharpmix1_iDemClamp
+    {0x0F12, 0x000C}, //700007D8 //TVAR_afit_pBaseValS[10] //AFIT16_demsharpmix1_iLowThreshold
+    {0x0F12, 0x0010}, //700007DA //TVAR_afit_pBaseValS[11] //AFIT16_demsharpmix1_iHighThreshold
+    {0x0F12, 0x012C}, //700007DC //TVAR_afit_pBaseValS[12] //AFIT16_demsharpmix1_iLowBright
+    {0x0F12, 0x03E8}, //700007DE //TVAR_afit_pBaseValS[13] //AFIT16_demsharpmix1_iHighBright
+    {0x0F12, 0x0046}, //700007E0 //TVAR_afit_pBaseValS[14] //AFIT16_demsharpmix1_iLowSat
+    {0x0F12, 0x005A}, //700007E2 //TVAR_afit_pBaseValS[15] //AFIT16_demsharpmix1_iHighSat
+    {0x0F12, 0x0070}, //700007E4 //TVAR_afit_pBaseValS[16] //AFIT16_demsharpmix1_iTune
+    {0x0F12, 0x0019}, //700007E6 //TVAR_afit_pBaseValS[17] //AFIT16_demsharpmix1_iHystThLow
+    {0x0F12, 0x0019}, //700007E8 //TVAR_afit_pBaseValS[18] //AFIT16_demsharpmix1_iHystThHigh
+    {0x0F12, 0x01AA}, //700007EA //TVAR_afit_pBaseValS[19] //AFIT16_demsharpmix1_iHystCenter
+    {0x0F12, 0x0064}, //700007EC //TVAR_afit_pBaseValS[20] //AFIT16_YUV422_DENOISE_iUVLowThresh
+    {0x0F12, 0x0064}, //700007EE //TVAR_afit_pBaseValS[21] //AFIT16_YUV422_DENOISE_iUVHighThresh
+    {0x0F12, 0x000A}, //700007F0 //TVAR_afit_pBaseValS[22] //AFIT16_YUV422_DENOISE_iYLowThresh
+    {0x0F12, 0x000A}, //700007F2 //TVAR_afit_pBaseValS[23] //AFIT16_YUV422_DENOISE_iYHighThresh
+    {0x0F12, 0x0032}, //700007F4 //TVAR_afit_pBaseValS[24] //AFIT16_Sharpening_iLowSharpClamp
+    {0x0F12, 0x0012}, //700007F6 //TVAR_afit_pBaseValS[25] //AFIT16_Sharpening_iHighSharpClamp
+    {0x0F12, 0x002A}, //700007F8 //TVAR_afit_pBaseValS[26] //AFIT16_Sharpening_iLowSharpClamp_Bin
+    {0x0F12, 0x0024}, //700007FA //TVAR_afit_pBaseValS[27] //AFIT16_Sharpening_iHighSharpClamp_Bin
+    {0x0F12, 0x002A}, //700007FC //TVAR_afit_pBaseValS[28] //AFIT16_Sharpening_iLowSharpClamp_sBin
+    {0x0F12, 0x0024}, //700007FE //TVAR_afit_pBaseValS[29] //AFIT16_Sharpening_iHighSharpClamp_sBin
+    {0x0F12, 0x0A24}, //70000800 //TVAR_afit_pBaseValS[30] //AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]
+    {0x0F12, 0x1701}, //70000802 //TVAR_afit_pBaseValS[31] //AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]
+    {0x0F12, 0x0229}, //70000804 //TVAR_afit_pBaseValS[32] //AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]
+    {0x0F12, 0x1403}, //70000806 //TVAR_afit_pBaseValS[33] //AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]
+    {0x0F12, 0x0000}, //70000808 //TVAR_afit_pBaseValS[34] //AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]
+    {0x0F12, 0x0000}, //7000080A //TVAR_afit_pBaseValS[35] //AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]
+    {0x0F12, 0x0000}, //7000080C //TVAR_afit_pBaseValS[36] //AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]
+    {0x0F12, 0x00FF}, //7000080E //TVAR_afit_pBaseValS[37] //AFIT8_sddd8a_iSatSat[7:0],	AFIT8_sddd8a_iRadialTune [15:8]
+    {0x0F12, 0x043B}, //70000810 //TVAR_afit_pBaseValS[38] //AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]
+    {0x0F12, 0x1414}, //70000812 //TVAR_afit_pBaseValS[39] //AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],	AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]
+    {0x0F12, 0x0301}, //70000814 //TVAR_afit_pBaseValS[40] //AFIT8_sddd8a_iLowSlopeThresh[7:0],	AFIT8_sddd8a_iHighSlopeThresh [15:8]
+    {0x0F12, 0xFF07}, //70000816 //TVAR_afit_pBaseValS[41] //AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]
+    {0x0F12, 0x051E}, //70000818 //TVAR_afit_pBaseValS[42] //AFIT8_Demosaicing_iMonochrom [7:0],	 AFIT8_Demosaicing_iDecisionThresh [15:8]
+    {0x0F12, 0x0A1E}, //7000081A //TVAR_afit_pBaseValS[43] //AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]
+    {0x0F12, 0x0F0F}, //7000081C //TVAR_afit_pBaseValS[44] //AFIT8_Demosaicing_iGRDenoiseVal [7:0],	AFIT8_Demosaicing_iGBDenoiseVal [15:8]
+    {0x0F12, 0x0A05}, //7000081E //TVAR_afit_pBaseValS[45] //AFIT8_Demosaicing_iNearGrayDesat[7:0],	AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]
+    {0x0F12, 0x0A3C}, //70000820 //TVAR_afit_pBaseValS[46] //AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]
+    {0x0F12, 0x0A28}, //70000822 //TVAR_afit_pBaseValS[47] //AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]
+    {0x0F12, 0x0002}, //70000824 //TVAR_afit_pBaseValS[48] //AFIT8_Sharpening_nSharpWidth [7:0],	 AFIT8_Sharpening_iReduceNegative [15:8]
+    {0x0F12, 0x00FF}, //70000826 //TVAR_afit_pBaseValS[49] //AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]
+    {0x0F12, 0x1102}, //70000828 //TVAR_afit_pBaseValS[50] //AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]
+    {0x0F12, 0x001B}, //7000082A //TVAR_afit_pBaseValS[51] //AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]
+    {0x0F12, 0x0900}, //7000082C //TVAR_afit_pBaseValS[52] //AFIT8_demsharpmix1_iNarrMult [7:0],	 AFIT8_demsharpmix1_iHystFalloff [15:8]
+    {0x0F12, 0x0600}, //7000082E //TVAR_afit_pBaseValS[53] //AFIT8_demsharpmix1_iHystMinMult [7:0],	AFIT8_demsharpmix1_iHystWidth [15:8]
+    {0x0F12, 0x0504}, //70000830 //TVAR_afit_pBaseValS[54] //AFIT8_demsharpmix1_iHystFallLow [7:0],	AFIT8_demsharpmix1_iHystFallHigh [15:8]
+    {0x0F12, 0x0305}, //70000832 //TVAR_afit_pBaseValS[55] //AFIT8_demsharpmix1_iHystTune [7:0],	* AFIT8_YUV422_DENOISE_iUVSupport [15:8]
+    {0x0F12, 0x3C03}, //70000834 //TVAR_afit_pBaseValS[56] //AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]
+    {0x0F12, 0x006E}, //70000836 //TVAR_afit_pBaseValS[57] //AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]
+    {0x0F12, 0x0178}, //70000838 //TVAR_afit_pBaseValS[58] //AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]
+    {0x0F12, 0x0080}, //7000083A //TVAR_afit_pBaseValS[59] //AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]
+    {0x0F12, 0x1414}, //7000083C //TVAR_afit_pBaseValS[60] //AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]
+    {0x0F12, 0x0101}, //7000083E //TVAR_afit_pBaseValS[61] //AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]
+    {0x0F12, 0x5002}, //70000840 //TVAR_afit_pBaseValS[62] //AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]
+    {0x0F12, 0x7850}, //70000842 //TVAR_afit_pBaseValS[63] //AFIT8_sddd8a_DispTH_High [7:0],	 AFIT8_sddd8a_iDenThreshLow [15:8]
+    {0x0F12, 0x2878}, //70000844 //TVAR_afit_pBaseValS[64] //AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]
+    {0x0F12, 0x0A00}, //70000846 //TVAR_afit_pBaseValS[65] //AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]
+    {0x0F12, 0x1403}, //70000848 //TVAR_afit_pBaseValS[66] //AFIT8_Demosaicing_iEdgeDesatLimit[7:0],	AFIT8_Demosaicing_iDemSharpenLow [15:8]
+    {0x0F12, 0x1E0C}, //7000084A //TVAR_afit_pBaseValS[67] //AFIT8_Demosaicing_iDemSharpenHigh[7:0],	 AFIT8_Demosaicing_iDemSharpThresh [15:8]
+    {0x0F12, 0x070A}, //7000084C //TVAR_afit_pBaseValS[68] //AFIT8_Demosaicing_iDemShLowLimit [7:0],	 AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]
+    {0x0F12, 0x32FF}, //7000084E //TVAR_afit_pBaseValS[69] //AFIT8_Demosaicing_iDemBlurLow[7:0],	 AFIT8_Demosaicing_iDemBlurHigh [15:8]
+    {0x0F12, 0x4104}, //70000850 //TVAR_afit_pBaseValS[70] //AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]
+    {0x0F12, 0x123C}, //70000852 //TVAR_afit_pBaseValS[71] //AFIT8_Sharpening_iHighSharpPower[7:0],	AFIT8_Sharpening_iLowShDenoise [15:8]
+    {0x0F12, 0x4012}, //70000854 //TVAR_afit_pBaseValS[72] //AFIT8_Sharpening_iHighShDenoise [7:0],	AFIT8_Sharpening_iReduceEdgeMinMult [15:8]
+    {0x0F12, 0x0204}, //70000856 //TVAR_afit_pBaseValS[73] //AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]
+    {0x0F12, 0x1E03}, //70000858 //TVAR_afit_pBaseValS[74] //AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]
+    {0x0F12, 0x011E}, //7000085A //TVAR_afit_pBaseValS[75] //AFIT8_sddd8a_iClustThresh_C_Bin [7:0],	AFIT8_sddd8a_iClustMulT_H_Bin [15:8]
+    {0x0F12, 0x0201}, //7000085C //TVAR_afit_pBaseValS[76] //AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]
+    {0x0F12, 0x5050}, //7000085E //TVAR_afit_pBaseValS[77] //AFIT8_sddd8a_DispTH_Low_Bin [7:0],	AFIT8_sddd8a_DispTH_High_Bin [15:8]
+    {0x0F12, 0x3C3C}, //70000860 //TVAR_afit_pBaseValS[78] //AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]
+    {0x0F12, 0x0028}, //70000862 //TVAR_afit_pBaseValS[79] //AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],	AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]
+    {0x0F12, 0x030A}, //70000864 //TVAR_afit_pBaseValS[80] //AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]
+    {0x0F12, 0x0714}, //70000866 //TVAR_afit_pBaseValS[81] //AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],	AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]
+    {0x0F12, 0x0A1E}, //70000868 //TVAR_afit_pBaseValS[82] //AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]
+    {0x0F12, 0xFF07}, //7000086A //TVAR_afit_pBaseValS[83] //AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]
+    {0x0F12, 0x0432}, //7000086C //TVAR_afit_pBaseValS[84] //AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]
+    {0x0F12, 0x4050}, //7000086E //TVAR_afit_pBaseValS[85] //AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]
+    {0x0F12, 0x0F0F}, //70000870 //TVAR_afit_pBaseValS[86] //AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]
+    {0x0F12, 0x0440}, //70000872 //TVAR_afit_pBaseValS[87] //AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]
+    {0x0F12, 0x0302}, //70000874 //TVAR_afit_pBaseValS[88] //AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]
+    {0x0F12, 0x1E1E}, //70000876 //TVAR_afit_pBaseValS[89] //AFIT8_sddd8a_iClustThresh_H_sBin[7:0],	AFIT8_sddd8a_iClustThresh_C_sBin [15:8]
+    {0x0F12, 0x0101}, //70000878 //TVAR_afit_pBaseValS[90] //AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]
+    {0x0F12, 0x5002}, //7000087A //TVAR_afit_pBaseValS[91] //AFIT8_sddd8a_nClustLevel_H_sBin [7:0],	AFIT8_sddd8a_DispTH_Low_sBin [15:8]
+    {0x0F12, 0x3C50}, //7000087C //TVAR_afit_pBaseValS[92] //AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]
+    {0x0F12, 0x283C}, //7000087E //TVAR_afit_pBaseValS[93] //AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],	AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]
+    {0x0F12, 0x0A00}, //70000880 //TVAR_afit_pBaseValS[94] //AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]
+    {0x0F12, 0x1403}, //70000882 //TVAR_afit_pBaseValS[95] //AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]
+    {0x0F12, 0x1E07}, //70000884 //TVAR_afit_pBaseValS[96] //AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]
+    {0x0F12, 0x070A}, //70000886 //TVAR_afit_pBaseValS[97] //AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8]
+    {0x0F12, 0x32FF}, //70000888 //TVAR_afit_pBaseValS[98] //AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]
+    {0x0F12, 0x5004}, //7000088A //TVAR_afit_pBaseValS[99] //AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],	AFIT8_Sharpening_iLowSharpPower_sBin [15:8]
+    {0x0F12, 0x0F40}, //7000088C //TVAR_afit_pBaseValS[100] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]
+    {0x0F12, 0x400F}, //7000088E //TVAR_afit_pBaseValS[101] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],	AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]
+    {0x0F12, 0x0204}, //70000890 //TVAR_afit_pBaseValS[102] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]
+    {0x0F12, 0x0003}, //70000892 //TVAR_afit_pBaseValS[103] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]
+    {0x0F12, 0x0000}, //70000894 //TVAR_afit_pBaseValS[104] /AFIT16_BRIGHTNESS
+    {0x0F12, 0x0000}, //70000896 //TVAR_afit_pBaseValS[105] /AFIT16_CONTRAST
+    {0x0F12, 0x0005}, //70000898 //TVAR_afit_pBaseValS[106] /AFIT16_SATURATION
+    {0x0F12, 0x0005}, //7000089A //TVAR_afit_pBaseValS[107] /AFIT16_SHARP_BLUR
+    {0x0F12, 0xFFF6}, //7000089C //TVAR_afit_pBaseValS[108] /AFIT16_GLAMOUR
+    {0x0F12, 0x00C4}, //7000089E //TVAR_afit_pBaseValS[109] /AFIT16_sddd8a_edge_high
+    {0x0F12, 0x03FF}, //700008A0 //TVAR_afit_pBaseValS[110] /AFIT16_Demosaicing_iSatVal
+    {0x0F12, 0x009C}, //700008A2 //TVAR_afit_pBaseValS[111] /AFIT16_Sharpening_iReduceEdgeThresh
+    {0x0F12, 0x017C}, //700008A4 //TVAR_afit_pBaseValS[112] /AFIT16_demsharpmix1_iRGBOffset
+    {0x0F12, 0x03FF}, //700008A6 //TVAR_afit_pBaseValS[113] /AFIT16_demsharpmix1_iDemClamp
+    {0x0F12, 0x000C}, //700008A8 //TVAR_afit_pBaseValS[114] /AFIT16_demsharpmix1_iLowThreshold
+    {0x0F12, 0x0010}, //700008AA //TVAR_afit_pBaseValS[115] /AFIT16_demsharpmix1_iHighThreshold
+    {0x0F12, 0x012C}, //700008AC //TVAR_afit_pBaseValS[116] /AFIT16_demsharpmix1_iLowBright
+    {0x0F12, 0x03E8}, //700008AE //TVAR_afit_pBaseValS[117] /AFIT16_demsharpmix1_iHighBright
+    {0x0F12, 0x0046}, //700008B0 //TVAR_afit_pBaseValS[118] /AFIT16_demsharpmix1_iLowSat
+    {0x0F12, 0x005A}, //700008B2 //TVAR_afit_pBaseValS[119] /AFIT16_demsharpmix1_iHighSat
+    {0x0F12, 0x0070}, //700008B4 //TVAR_afit_pBaseValS[120] /AFIT16_demsharpmix1_iTune
+    {0x0F12, 0x000F}, //700008B6 //TVAR_afit_pBaseValS[121] /AFIT16_demsharpmix1_iHystThLow
+    {0x0F12, 0x000F}, //700008B8 //TVAR_afit_pBaseValS[122] /AFIT16_demsharpmix1_iHystThHigh
+    {0x0F12, 0x01AA}, //700008BA //TVAR_afit_pBaseValS[123] /AFIT16_demsharpmix1_iHystCenter
+    {0x0F12, 0x003C}, //700008BC //TVAR_afit_pBaseValS[124] /AFIT16_YUV422_DENOISE_iUVLowThresh
+    {0x0F12, 0x003C}, //700008BE //TVAR_afit_pBaseValS[125] /AFIT16_YUV422_DENOISE_iUVHighThresh
+    {0x0F12, 0x0005}, //700008C0 //TVAR_afit_pBaseValS[126] /AFIT16_YUV422_DENOISE_iYLowThresh
+    {0x0F12, 0x0005}, //700008C2 //TVAR_afit_pBaseValS[127] /AFIT16_YUV422_DENOISE_iYHighThresh
+    {0x0F12, 0x0046}, //700008C4 //TVAR_afit_pBaseValS[128] /AFIT16_Sharpening_iLowSharpClamp
+    {0x0F12, 0x0019}, //700008C6 //TVAR_afit_pBaseValS[129] /AFIT16_Sharpening_iHighSharpClamp
+    {0x0F12, 0x002A}, //700008C8 //TVAR_afit_pBaseValS[130] /AFIT16_Sharpening_iLowSharpClamp_Bin
+    {0x0F12, 0x0024}, //700008CA //TVAR_afit_pBaseValS[131] /AFIT16_Sharpening_iHighSharpClamp_Bin
+    {0x0F12, 0x002A}, //700008CC //TVAR_afit_pBaseValS[132] /AFIT16_Sharpening_iLowSharpClamp_sBin
+    {0x0F12, 0x0024}, //700008CE //TVAR_afit_pBaseValS[133] /AFIT16_Sharpening_iHighSharpClamp_sBin
+    {0x0F12, 0x0A24}, //700008D0 //TVAR_afit_pBaseValS[134] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]
+    {0x0F12, 0x1701}, //700008D2 //TVAR_afit_pBaseValS[135] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]
+    {0x0F12, 0x0229}, //700008D4 //TVAR_afit_pBaseValS[136] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]
+    {0x0F12, 0x1403}, //700008D6 //TVAR_afit_pBaseValS[137] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]
+    {0x0F12, 0x0000}, //700008D8 //TVAR_afit_pBaseValS[138] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]
+    {0x0F12, 0x0000}, //700008DA //TVAR_afit_pBaseValS[139] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]
+    {0x0F12, 0x0000}, //700008DC //TVAR_afit_pBaseValS[140] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]
+    {0x0F12, 0x00FF}, //700008DE //TVAR_afit_pBaseValS[141] /AFIT8_sddd8a_iSatSat[7:0],	AFIT8_sddd8a_iRadialTune [15:8]
+    {0x0F12, 0x043B}, //700008E0 //TVAR_afit_pBaseValS[142] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]
+    {0x0F12, 0x1414}, //700008E2 //TVAR_afit_pBaseValS[143] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],	AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]
+    {0x0F12, 0x0301}, //700008E4 //TVAR_afit_pBaseValS[144] /AFIT8_sddd8a_iLowSlopeThresh[7:0],	AFIT8_sddd8a_iHighSlopeThresh [15:8]
+    {0x0F12, 0xFF07}, //700008E6 //TVAR_afit_pBaseValS[145] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]
+    {0x0F12, 0x051E}, //700008E8 //TVAR_afit_pBaseValS[146] /AFIT8_Demosaicing_iMonochrom [7:0],	 AFIT8_Demosaicing_iDecisionThresh [15:8]
+    {0x0F12, 0x0A1E}, //700008EA //TVAR_afit_pBaseValS[147] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]
+    {0x0F12, 0x0F0F}, //700008EC //TVAR_afit_pBaseValS[148] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],	AFIT8_Demosaicing_iGBDenoiseVal [15:8]
+    {0x0F12, 0x0A03}, //700008EE //TVAR_afit_pBaseValS[149] /AFIT8_Demosaicing_iNearGrayDesat[7:0],	AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]
+    {0x0F12, 0x0A3C}, //700008F0 //TVAR_afit_pBaseValS[150] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]
+    {0x0F12, 0x0A28}, //700008F2 //TVAR_afit_pBaseValS[151] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]
+    {0x0F12, 0x0002}, //700008F4 //TVAR_afit_pBaseValS[152] /AFIT8_Sharpening_nSharpWidth [7:0],	 AFIT8_Sharpening_iReduceNegative [15:8]
+    {0x0F12, 0x00FF}, //700008F6 //TVAR_afit_pBaseValS[153] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]
+    {0x0F12, 0x1102}, //700008F8 //TVAR_afit_pBaseValS[154] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]
+    {0x0F12, 0x001B}, //700008FA //TVAR_afit_pBaseValS[155] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]
+    {0x0F12, 0x0900}, //700008FC //TVAR_afit_pBaseValS[156] /AFIT8_demsharpmix1_iNarrMult [7:0],	 AFIT8_demsharpmix1_iHystFalloff [15:8]
+    {0x0F12, 0x0600}, //700008FE //TVAR_afit_pBaseValS[157] /AFIT8_demsharpmix1_iHystMinMult [7:0],	AFIT8_demsharpmix1_iHystWidth [15:8]
+    {0x0F12, 0x0504}, //70000900 //TVAR_afit_pBaseValS[158] /AFIT8_demsharpmix1_iHystFallLow [7:0],	AFIT8_demsharpmix1_iHystFallHigh [15:8]
+    {0x0F12, 0x0305}, //70000902 //TVAR_afit_pBaseValS[159] /AFIT8_demsharpmix1_iHystTune [7:0],	* AFIT8_YUV422_DENOISE_iUVSupport [15:8]
+    {0x0F12, 0x4603}, //70000904 //TVAR_afit_pBaseValS[160] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]
+    {0x0F12, 0x0080}, //70000906 //TVAR_afit_pBaseValS[161] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]
+    {0x0F12, 0x0180}, //70000908 //TVAR_afit_pBaseValS[162] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]
+    {0x0F12, 0x0080}, //7000090A //TVAR_afit_pBaseValS[163] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]
+    {0x0F12, 0x1919}, //7000090C //TVAR_afit_pBaseValS[164] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]
+    {0x0F12, 0x0101}, //7000090E //TVAR_afit_pBaseValS[165] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]
+    {0x0F12, 0x3C02}, //70000910 //TVAR_afit_pBaseValS[166] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]
+    {0x0F12, 0x643C}, //70000912 //TVAR_afit_pBaseValS[167] /AFIT8_sddd8a_DispTH_High [7:0],	 AFIT8_sddd8a_iDenThreshLow [15:8]
+    {0x0F12, 0x2864}, //70000914 //TVAR_afit_pBaseValS[168] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]
+    {0x0F12, 0x0A00}, //70000916 //TVAR_afit_pBaseValS[169] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]
+    {0x0F12, 0x1403}, //70000918 //TVAR_afit_pBaseValS[170] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],	AFIT8_Demosaicing_iDemSharpenLow [15:8]
+    {0x0F12, 0x1E0C}, //7000091A //TVAR_afit_pBaseValS[171] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],	 AFIT8_Demosaicing_iDemSharpThresh [15:8]
+    {0x0F12, 0x070A}, //7000091C //TVAR_afit_pBaseValS[172] /AFIT8_Demosaicing_iDemShLowLimit [7:0],	 AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]
+    {0x0F12, 0x32FF}, //7000091E //TVAR_afit_pBaseValS[173] /AFIT8_Demosaicing_iDemBlurLow[7:0],	 AFIT8_Demosaicing_iDemBlurHigh [15:8]
+    {0x0F12, 0x4104}, //70000920 //TVAR_afit_pBaseValS[174] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]
+    {0x0F12, 0x123C}, //70000922 //TVAR_afit_pBaseValS[175] /AFIT8_Sharpening_iHighSharpPower[7:0],	AFIT8_Sharpening_iLowShDenoise [15:8]
+    {0x0F12, 0x4012}, //70000924 //TVAR_afit_pBaseValS[176] /AFIT8_Sharpening_iHighShDenoise [7:0],	AFIT8_Sharpening_iReduceEdgeMinMult [15:8]
+    {0x0F12, 0x0204}, //70000926 //TVAR_afit_pBaseValS[177] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]
+    {0x0F12, 0x1E03}, //70000928 //TVAR_afit_pBaseValS[178] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]
+    {0x0F12, 0x011E}, //7000092A //TVAR_afit_pBaseValS[179] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],	AFIT8_sddd8a_iClustMulT_H_Bin [15:8]
+    {0x0F12, 0x0201}, //7000092C //TVAR_afit_pBaseValS[180] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]
+    {0x0F12, 0x3232}, //7000092E //TVAR_afit_pBaseValS[181] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],	AFIT8_sddd8a_DispTH_High_Bin [15:8]
+    {0x0F12, 0x3C3C}, //70000930 //TVAR_afit_pBaseValS[182] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]
+    {0x0F12, 0x0028}, //70000932 //TVAR_afit_pBaseValS[183] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],	AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]
+    {0x0F12, 0x030A}, //70000934 //TVAR_afit_pBaseValS[184] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]
+    {0x0F12, 0x0714}, //70000936 //TVAR_afit_pBaseValS[185] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],	AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]
+    {0x0F12, 0x0A1E}, //70000938 //TVAR_afit_pBaseValS[186] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]
+    {0x0F12, 0xFF07}, //7000093A //TVAR_afit_pBaseValS[187] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]
+    {0x0F12, 0x0432}, //7000093C //TVAR_afit_pBaseValS[188] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]
+    {0x0F12, 0x4050}, //7000093E //TVAR_afit_pBaseValS[189] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]
+    {0x0F12, 0x0F0F}, //70000940 //TVAR_afit_pBaseValS[190] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]
+    {0x0F12, 0x0440}, //70000942 //TVAR_afit_pBaseValS[191] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]
+    {0x0F12, 0x0302}, //70000944 //TVAR_afit_pBaseValS[192] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]
+    {0x0F12, 0x1E1E}, //70000946 //TVAR_afit_pBaseValS[193] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],	AFIT8_sddd8a_iClustThresh_C_sBin [15:8]
+    {0x0F12, 0x0101}, //70000948 //TVAR_afit_pBaseValS[194] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]
+    {0x0F12, 0x3202}, //7000094A //TVAR_afit_pBaseValS[195] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],	AFIT8_sddd8a_DispTH_Low_sBin [15:8]
+    {0x0F12, 0x3C32}, //7000094C //TVAR_afit_pBaseValS[196] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]
+    {0x0F12, 0x283C}, //7000094E //TVAR_afit_pBaseValS[197] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],	AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]
+    {0x0F12, 0x0A00}, //70000950 //TVAR_afit_pBaseValS[198] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]
+    {0x0F12, 0x1403}, //70000952 //TVAR_afit_pBaseValS[199] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]
+    {0x0F12, 0x1E07}, //70000954 //TVAR_afit_pBaseValS[200] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]
+    {0x0F12, 0x070A}, //70000956 //TVAR_afit_pBaseValS[201] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8]
+    {0x0F12, 0x32FF}, //70000958 //TVAR_afit_pBaseValS[202] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]
+    {0x0F12, 0x5004}, //7000095A //TVAR_afit_pBaseValS[203] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],	AFIT8_Sharpening_iLowSharpPower_sBin [15:8]
+    {0x0F12, 0x0F40}, //7000095C //TVAR_afit_pBaseValS[204] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]
+    {0x0F12, 0x400F}, //7000095E //TVAR_afit_pBaseValS[205] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],	AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]
+    {0x0F12, 0x0204}, //70000960 //TVAR_afit_pBaseValS[206] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]
+    {0x0F12, 0x0003}, //70000962 //TVAR_afit_pBaseValS[207] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]
+    {0x0F12, 0x0000}, //70000964 //TVAR_afit_pBaseValS[208] /AFIT16_BRIGHTNESS
+    {0x0F12, 0x0000}, //70000966 //TVAR_afit_pBaseValS[209] /AFIT16_CONTRAST
+    /*increase the power shading, reduce the saturation*/
+    {0x0F12, 0x0014}, //70000968 //TVAR_afit_pBaseValS[210] /AFIT16_SATURATION
+    {0x0F12, 0x0005}, //7000096A //TVAR_afit_pBaseValS[211] /AFIT16_SHARP_BLUR
+    {0x0F12, 0xFFF6}, //7000096C //TVAR_afit_pBaseValS[212] /AFIT16_GLAMOUR
+    {0x0F12, 0x00C4}, //7000096E //TVAR_afit_pBaseValS[213] /AFIT16_sddd8a_edge_high
+    {0x0F12, 0x03FF}, //70000970 //TVAR_afit_pBaseValS[214] /AFIT16_Demosaicing_iSatVal
+    {0x0F12, 0x009C}, //70000972 //TVAR_afit_pBaseValS[215] /AFIT16_Sharpening_iReduceEdgeThresh
+    {0x0F12, 0x017C}, //70000974 //TVAR_afit_pBaseValS[216] /AFIT16_demsharpmix1_iRGBOffset
+    {0x0F12, 0x03FF}, //70000976 //TVAR_afit_pBaseValS[217] /AFIT16_demsharpmix1_iDemClamp
+    {0x0F12, 0x000C}, //70000978 //TVAR_afit_pBaseValS[218] /AFIT16_demsharpmix1_iLowThreshold
+    {0x0F12, 0x0010}, //7000097A //TVAR_afit_pBaseValS[219] /AFIT16_demsharpmix1_iHighThreshold
+    {0x0F12, 0x012C}, //7000097C //TVAR_afit_pBaseValS[220] /AFIT16_demsharpmix1_iLowBright
+    {0x0F12, 0x03E8}, //7000097E //TVAR_afit_pBaseValS[221] /AFIT16_demsharpmix1_iHighBright
+    {0x0F12, 0x0046}, //70000980 //TVAR_afit_pBaseValS[222] /AFIT16_demsharpmix1_iLowSat
+    {0x0F12, 0x0078}, //70000982 //TVAR_afit_pBaseValS[223] /AFIT16_demsharpmix1_iHighSat
+    {0x0F12, 0x0070}, //70000984 //TVAR_afit_pBaseValS[224] /AFIT16_demsharpmix1_iTune
+    {0x0F12, 0x0004}, //70000986 //TVAR_afit_pBaseValS[225] /AFIT16_demsharpmix1_iHystThLow
+    {0x0F12, 0x0004}, //70000988 //TVAR_afit_pBaseValS[226] /AFIT16_demsharpmix1_iHystThHigh
+    {0x0F12, 0x01AA}, //7000098A //TVAR_afit_pBaseValS[227] /AFIT16_demsharpmix1_iHystCenter
+    {0x0F12, 0x001E}, //7000098C //TVAR_afit_pBaseValS[228] /AFIT16_YUV422_DENOISE_iUVLowThresh
+    {0x0F12, 0x001E}, //7000098E //TVAR_afit_pBaseValS[229] /AFIT16_YUV422_DENOISE_iUVHighThresh
+    {0x0F12, 0x0005}, //70000990 //TVAR_afit_pBaseValS[230] /AFIT16_YUV422_DENOISE_iYLowThresh
+    {0x0F12, 0x0005}, //70000992 //TVAR_afit_pBaseValS[231] /AFIT16_YUV422_DENOISE_iYHighThresh
+    {0x0F12, 0x0064}, //70000994 //TVAR_afit_pBaseValS[232] /AFIT16_Sharpening_iLowSharpClamp
+    {0x0F12, 0x001B}, //70000996 //TVAR_afit_pBaseValS[233] /AFIT16_Sharpening_iHighSharpClamp
+    {0x0F12, 0x002A}, //70000998 //TVAR_afit_pBaseValS[234] /AFIT16_Sharpening_iLowSharpClamp_Bin
+    {0x0F12, 0x0024}, //7000099A //TVAR_afit_pBaseValS[235] /AFIT16_Sharpening_iHighSharpClamp_Bin
+    {0x0F12, 0x002A}, //7000099C //TVAR_afit_pBaseValS[236] /AFIT16_Sharpening_iLowSharpClamp_sBin
+    {0x0F12, 0x0024}, //7000099E //TVAR_afit_pBaseValS[237] /AFIT16_Sharpening_iHighSharpClamp_sBin
+    {0x0F12, 0x0A24}, //700009A0 //TVAR_afit_pBaseValS[238] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]
+    {0x0F12, 0x1701}, //700009A2 //TVAR_afit_pBaseValS[239] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]
+    {0x0F12, 0x0229}, //700009A4 //TVAR_afit_pBaseValS[240] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]
+    {0x0F12, 0x1403}, //700009A6 //TVAR_afit_pBaseValS[241] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]
+    {0x0F12, 0x0000}, //700009A8 //TVAR_afit_pBaseValS[242] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]
+    {0x0F12, 0x0000}, //700009AA //TVAR_afit_pBaseValS[243] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]
+    {0x0F12, 0x0000}, //700009AC //TVAR_afit_pBaseValS[244] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]
+    {0x0F12, 0x00FF}, //700009AE //TVAR_afit_pBaseValS[245] /AFIT8_sddd8a_iSatSat[7:0],	AFIT8_sddd8a_iRadialTune [15:8]
+    {0x0F12, 0x043B}, //700009B0 //TVAR_afit_pBaseValS[246] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]
+    {0x0F12, 0x1414}, //700009B2 //TVAR_afit_pBaseValS[247] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],	AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]
+    {0x0F12, 0x0301}, //700009B4 //TVAR_afit_pBaseValS[248] /AFIT8_sddd8a_iLowSlopeThresh[7:0],	AFIT8_sddd8a_iHighSlopeThresh [15:8]
+    {0x0F12, 0xFF07}, //700009B6 //TVAR_afit_pBaseValS[249] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]
+    {0x0F12, 0x051E}, //700009B8 //TVAR_afit_pBaseValS[250] /AFIT8_Demosaicing_iMonochrom [7:0],	 AFIT8_Demosaicing_iDecisionThresh [15:8]
+    {0x0F12, 0x0A1E}, //700009BA //TVAR_afit_pBaseValS[251] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]
+    {0x0F12, 0x0F0F}, //700009BC //TVAR_afit_pBaseValS[252] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],	AFIT8_Demosaicing_iGBDenoiseVal [15:8]
+    {0x0F12, 0x0A03}, //700009BE //TVAR_afit_pBaseValS[253] /AFIT8_Demosaicing_iNearGrayDesat[7:0],	AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]
+    {0x0F12, 0x0A3C}, //700009C0 //TVAR_afit_pBaseValS[254] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]
+    {0x0F12, 0x0528}, //700009C2 //TVAR_afit_pBaseValS[255] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]
+    {0x0F12, 0x0002}, //700009C4 //TVAR_afit_pBaseValS[256] /AFIT8_Sharpening_nSharpWidth [7:0],	 AFIT8_Sharpening_iReduceNegative [15:8]
+    {0x0F12, 0x00FF}, //700009C6 //TVAR_afit_pBaseValS[257] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]
+    {0x0F12, 0x1102}, //700009C8 //TVAR_afit_pBaseValS[258] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]
+    {0x0F12, 0x001B}, //700009CA //TVAR_afit_pBaseValS[259] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]
+    {0x0F12, 0x0900}, //700009CC //TVAR_afit_pBaseValS[260] /AFIT8_demsharpmix1_iNarrMult [7:0],	 AFIT8_demsharpmix1_iHystFalloff [15:8]
+    {0x0F12, 0x0600}, //700009CE //TVAR_afit_pBaseValS[261] /AFIT8_demsharpmix1_iHystMinMult [7:0],	AFIT8_demsharpmix1_iHystWidth [15:8]
+    {0x0F12, 0x0504}, //700009D0 //TVAR_afit_pBaseValS[262] /AFIT8_demsharpmix1_iHystFallLow [7:0],	AFIT8_demsharpmix1_iHystFallHigh [15:8]
+    {0x0F12, 0x0305}, //700009D2 //TVAR_afit_pBaseValS[263] /AFIT8_demsharpmix1_iHystTune [7:0],	* AFIT8_YUV422_DENOISE_iUVSupport [15:8]
+    {0x0F12, 0x5A03}, //4603  //// #TVAR_afit_pBaseVals[264]
+    {0x0F12, 0x0080}, //700009D6 //TVAR_afit_pBaseValS[265] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]
+    {0x0F12, 0x0180}, //700009D8 //TVAR_afit_pBaseValS[266] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]
+    {0x0F12, 0x0080}, //700009DA //TVAR_afit_pBaseValS[267] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]
+    {0x0F12, 0x2323}, //700009DC //TVAR_afit_pBaseValS[268] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]
+    {0x0F12, 0x0101}, //700009DE //TVAR_afit_pBaseValS[269] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]
+    {0x0F12, 0x2A02}, //700009E0 //TVAR_afit_pBaseValS[270] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]
+    {0x0F12, 0x3C2A}, //700009E2 //TVAR_afit_pBaseValS[271] /AFIT8_sddd8a_DispTH_High [7:0],	 AFIT8_sddd8a_iDenThreshLow [15:8]
+    {0x0F12, 0x283C}, //700009E4 //TVAR_afit_pBaseValS[272] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]
+    {0x0F12, 0x0A00}, //700009E6 //TVAR_afit_pBaseValS[273] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]
+    {0x0F12, 0x1403}, //700009E8 //TVAR_afit_pBaseValS[274] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],	AFIT8_Demosaicing_iDemSharpenLow [15:8]
+    {0x0F12, 0x1E0C}, //700009EA //TVAR_afit_pBaseValS[275] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],	 AFIT8_Demosaicing_iDemSharpThresh [15:8]
+    {0x0F12, 0x070A}, //700009EC //TVAR_afit_pBaseValS[276] /AFIT8_Demosaicing_iDemShLowLimit [7:0],	 AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]
+    {0x0F12, 0x32FF}, //700009EE //TVAR_afit_pBaseValS[277] /AFIT8_Demosaicing_iDemBlurLow[7:0],	 AFIT8_Demosaicing_iDemBlurHigh [15:8]
+    {0x0F12, 0x4B04}, //700009F0 //TVAR_afit_pBaseValS[278] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]
+    {0x0F12, 0x0F40}, //700009F2 //TVAR_afit_pBaseValS[279] /AFIT8_Sharpening_iHighSharpPower[7:0],	AFIT8_Sharpening_iLowShDenoise [15:8]
+    {0x0F12, 0x400F}, //700009F4 //TVAR_afit_pBaseValS[280] /AFIT8_Sharpening_iHighShDenoise [7:0],	AFIT8_Sharpening_iReduceEdgeMinMult [15:8]
+    {0x0F12, 0x0204}, //700009F6 //TVAR_afit_pBaseValS[281] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]
+    {0x0F12, 0x2303}, //700009F8 //TVAR_afit_pBaseValS[282] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]
+    {0x0F12, 0x0123}, //700009FA //TVAR_afit_pBaseValS[283] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],	AFIT8_sddd8a_iClustMulT_H_Bin [15:8]
+    {0x0F12, 0x0201}, //700009FC //TVAR_afit_pBaseValS[284] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]
+    {0x0F12, 0x262A}, //700009FE //TVAR_afit_pBaseValS[285] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],	AFIT8_sddd8a_DispTH_High_Bin [15:8]
+    {0x0F12, 0x2C2C}, //70000A00 //TVAR_afit_pBaseValS[286] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]
+    {0x0F12, 0x0028}, //70000A02 //TVAR_afit_pBaseValS[287] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],	AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]
+    {0x0F12, 0x030A}, //70000A04 //TVAR_afit_pBaseValS[288] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]
+    {0x0F12, 0x0714}, //70000A06 //TVAR_afit_pBaseValS[289] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],	AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]
+    {0x0F12, 0x0A1E}, //70000A08 //TVAR_afit_pBaseValS[290] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]
+    {0x0F12, 0xFF07}, //70000A0A //TVAR_afit_pBaseValS[291] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]
+    {0x0F12, 0x0432}, //70000A0C //TVAR_afit_pBaseValS[292] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]
+    {0x0F12, 0x4050}, //70000A0E //TVAR_afit_pBaseValS[293] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]
+    {0x0F12, 0x0F0F}, //70000A10 //TVAR_afit_pBaseValS[294] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]
+    {0x0F12, 0x0440}, //70000A12 //TVAR_afit_pBaseValS[295] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]
+    {0x0F12, 0x0302}, //70000A14 //TVAR_afit_pBaseValS[296] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]
+    {0x0F12, 0x2323}, //70000A16 //TVAR_afit_pBaseValS[297] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],	AFIT8_sddd8a_iClustThresh_C_sBin [15:8]
+    {0x0F12, 0x0101}, //70000A18 //TVAR_afit_pBaseValS[298] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]
+    {0x0F12, 0x2A02}, //70000A1A //TVAR_afit_pBaseValS[299] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],	AFIT8_sddd8a_DispTH_Low_sBin [15:8]
+    {0x0F12, 0x2C26}, //70000A1C //TVAR_afit_pBaseValS[300] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]
+    {0x0F12, 0x282C}, //70000A1E //TVAR_afit_pBaseValS[301] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],	AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]
+    {0x0F12, 0x0A00}, //70000A20 //TVAR_afit_pBaseValS[302] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]
+    {0x0F12, 0x1403}, //70000A22 //TVAR_afit_pBaseValS[303] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]
+    {0x0F12, 0x1E07}, //70000A24 //TVAR_afit_pBaseValS[304] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]
+    {0x0F12, 0x070A}, //70000A26 //TVAR_afit_pBaseValS[305] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8]
+    {0x0F12, 0x32FF}, //70000A28 //TVAR_afit_pBaseValS[306] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]
+    {0x0F12, 0x5004}, //70000A2A //TVAR_afit_pBaseValS[307] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],	AFIT8_Sharpening_iLowSharpPower_sBin [15:8]
+    {0x0F12, 0x0F40}, //70000A2C //TVAR_afit_pBaseValS[308] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]
+    {0x0F12, 0x400F}, //70000A2E //TVAR_afit_pBaseValS[309] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],	AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]
+    {0x0F12, 0x0204}, //70000A30 //TVAR_afit_pBaseValS[310] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]
+    {0x0F12, 0x0003}, //70000A32 //TVAR_afit_pBaseValS[311] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]
+    {0x0F12, 0x0000}, //70000A34 //TVAR_afit_pBaseValS[312] /AFIT16_BRIGHTNESS
+    {0x0F12, 0x0000}, //70000A36 //TVAR_afit_pBaseValS[313] /AFIT16_CONTRAST
+    {0x0F12, 0x0014}, //70000A38 //TVAR_afit_pBaseValS[314] /AFIT16_SATURATION
+    {0x0F12, 0x0000}, //70000A3A //TVAR_afit_pBaseValS[315] /AFIT16_SHARP_BLUR
+    {0x0F12, 0x0000}, //70000A3C //TVAR_afit_pBaseValS[316] /AFIT16_GLAMOUR
+    {0x0F12, 0x00C4}, //70000A3E //TVAR_afit_pBaseValS[317] /AFIT16_sddd8a_edge_high
+    {0x0F12, 0x03FF}, //70000A40 //TVAR_afit_pBaseValS[318] /AFIT16_Demosaicing_iSatVal
+    {0x0F12, 0x009C}, //70000A42 //TVAR_afit_pBaseValS[319] /AFIT16_Sharpening_iReduceEdgeThresh
+    {0x0F12, 0x017C}, //70000A44 //TVAR_afit_pBaseValS[320] /AFIT16_demsharpmix1_iRGBOffset
+    {0x0F12, 0x03FF}, //70000A46 //TVAR_afit_pBaseValS[321] /AFIT16_demsharpmix1_iDemClamp
+    {0x0F12, 0x000C}, //70000A48 //TVAR_afit_pBaseValS[322] /AFIT16_demsharpmix1_iLowThreshold
+    {0x0F12, 0x0010}, //70000A4A //TVAR_afit_pBaseValS[323] /AFIT16_demsharpmix1_iHighThreshold
+    {0x0F12, 0x00C8}, //70000A4C //TVAR_afit_pBaseValS[324] /AFIT16_demsharpmix1_iLowBright
+    {0x0F12, 0x0384}, //70000A4E //TVAR_afit_pBaseValS[325] /AFIT16_demsharpmix1_iHighBright
+    {0x0F12, 0x0046}, //70000A50 //TVAR_afit_pBaseValS[326] /AFIT16_demsharpmix1_iLowSat
+    {0x0F12, 0x0082}, //70000A52 //TVAR_afit_pBaseValS[327] /AFIT16_demsharpmix1_iHighSat
+    {0x0F12, 0x0070}, //70000A54 //TVAR_afit_pBaseValS[328] /AFIT16_demsharpmix1_iTune
+    {0x0F12, 0x0000}, //70000A56 //TVAR_afit_pBaseValS[329] /AFIT16_demsharpmix1_iHystThLow
+    {0x0F12, 0x0000}, //70000A58 //TVAR_afit_pBaseValS[330] /AFIT16_demsharpmix1_iHystThHigh
+    {0x0F12, 0x01AA}, //70000A5A //TVAR_afit_pBaseValS[331] /AFIT16_demsharpmix1_iHystCenter
+    {0x0F12, 0x001E}, //70000A5C //TVAR_afit_pBaseValS[332] /AFIT16_YUV422_DENOISE_iUVLowThresh
+    {0x0F12, 0x001E}, //70000A5E //TVAR_afit_pBaseValS[333] /AFIT16_YUV422_DENOISE_iUVHighThresh
+    {0x0F12, 0x000A}, //70000A60 //TVAR_afit_pBaseValS[334] /AFIT16_YUV422_DENOISE_iYLowThresh
+    {0x0F12, 0x000A}, //70000A62 //TVAR_afit_pBaseValS[335] /AFIT16_YUV422_DENOISE_iYHighThresh
+    {0x0F12, 0x010E}, //70000A64 //TVAR_afit_pBaseValS[336] /AFIT16_Sharpening_iLowSharpClamp
+    {0x0F12, 0x0028}, //70000A66 //TVAR_afit_pBaseValS[337] /AFIT16_Sharpening_iHighSharpClamp
+    {0x0F12, 0x0032}, //70000A68 //TVAR_afit_pBaseValS[338] /AFIT16_Sharpening_iLowSharpClamp_Bin
+    {0x0F12, 0x0028}, //70000A6A //TVAR_afit_pBaseValS[339] /AFIT16_Sharpening_iHighSharpClamp_Bin
+    {0x0F12, 0x0032}, //70000A6C //TVAR_afit_pBaseValS[340] /AFIT16_Sharpening_iLowSharpClamp_sBin
+    {0x0F12, 0x0028}, //70000A6E //TVAR_afit_pBaseValS[341] /AFIT16_Sharpening_iHighSharpClamp_sBin
+    {0x0F12, 0x0A24}, //70000A70 //TVAR_afit_pBaseValS[342] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]
+    {0x0F12, 0x1701}, //70000A72 //TVAR_afit_pBaseValS[343] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]
+    {0x0F12, 0x0229}, //70000A74 //TVAR_afit_pBaseValS[344] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]
+    {0x0F12, 0x1403}, //70000A76 //TVAR_afit_pBaseValS[345] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]
+    {0x0F12, 0x0000}, //70000A78 //TVAR_afit_pBaseValS[346] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]
+    {0x0F12, 0x0000}, //70000A7A //TVAR_afit_pBaseValS[347] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]
+    {0x0F12, 0x0504}, //70000A7C //TVAR_afit_pBaseValS[348] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]
+    {0x0F12, 0x00FF}, //70000A7E //TVAR_afit_pBaseValS[349] /AFIT8_sddd8a_iSatSat[7:0],	AFIT8_sddd8a_iRadialTune [15:8]
+    {0x0F12, 0x043B}, //70000A80 //TVAR_afit_pBaseValS[350] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]
+    {0x0F12, 0x1414}, //70000A82 //TVAR_afit_pBaseValS[351] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],	AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]
+    {0x0F12, 0x0301}, //70000A84 //TVAR_afit_pBaseValS[352] /AFIT8_sddd8a_iLowSlopeThresh[7:0],	AFIT8_sddd8a_iHighSlopeThresh [15:8]
+    {0x0F12, 0xFF07}, //70000A86 //TVAR_afit_pBaseValS[353] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]
+    {0x0F12, 0x051E}, //70000A88 //TVAR_afit_pBaseValS[354] /AFIT8_Demosaicing_iMonochrom [7:0],	 AFIT8_Demosaicing_iDecisionThresh [15:8]
+    {0x0F12, 0x0A1E}, //70000A8A //TVAR_afit_pBaseValS[355] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]
+    {0x0F12, 0x0F0F}, //70000A8C //TVAR_afit_pBaseValS[356] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],	AFIT8_Demosaicing_iGBDenoiseVal [15:8]
+    {0x0F12, 0x0A00}, //70000A8E //TVAR_afit_pBaseValS[357] /AFIT8_Demosaicing_iNearGrayDesat[7:0],	AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]
+    {0x0F12, 0x0A3C}, //70000A90 //TVAR_afit_pBaseValS[358] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]
+    {0x0F12, 0x0532}, //70000A92 //TVAR_afit_pBaseValS[359] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]
+    {0x0F12, 0x0002}, //70000A94 //TVAR_afit_pBaseValS[360] /AFIT8_Sharpening_nSharpWidth [7:0],	 AFIT8_Sharpening_iReduceNegative [15:8]
+    {0x0F12, 0x00FF}, //70000A96 //TVAR_afit_pBaseValS[361] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]
+    {0x0F12, 0x1002}, //70000A98 //TVAR_afit_pBaseValS[362] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]
+    {0x0F12, 0x001E}, //70000A9A //TVAR_afit_pBaseValS[363] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]
+    {0x0F12, 0x0900}, //70000A9C //TVAR_afit_pBaseValS[364] /AFIT8_demsharpmix1_iNarrMult [7:0],	 AFIT8_demsharpmix1_iHystFalloff [15:8]
+    {0x0F12, 0x0600}, //70000A9E //TVAR_afit_pBaseValS[365] /AFIT8_demsharpmix1_iHystMinMult [7:0],	AFIT8_demsharpmix1_iHystWidth [15:8]
+    {0x0F12, 0x0504}, //70000AA0 //TVAR_afit_pBaseValS[366] /AFIT8_demsharpmix1_iHystFallLow [7:0],	AFIT8_demsharpmix1_iHystFallHigh [15:8]
+    {0x0F12, 0x0305}, //70000AA2 //TVAR_afit_pBaseValS[367] /AFIT8_demsharpmix1_iHystTune [7:0],	* AFIT8_YUV422_DENOISE_iUVSupport [15:8]
+    {0x0F12, 0x6E02}, //4602  //// #TVAR_afit_pBaseVals[368]
+    {0x0F12, 0x0080}, //70000AA6 //TVAR_afit_pBaseValS[369] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]
+    {0x0F12, 0x0180}, //70000AA8 //TVAR_afit_pBaseValS[370] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]
+    {0x0F12, 0x0080}, //70000AAA //TVAR_afit_pBaseValS[371] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]
+    {0x0F12, 0x2328}, //70000AAC //TVAR_afit_pBaseValS[372] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]
+    {0x0F12, 0x0101}, //70000AAE //TVAR_afit_pBaseValS[373] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]
+    {0x0F12, 0x2A02}, //70000AB0 //TVAR_afit_pBaseValS[374] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]
+    {0x0F12, 0x2228}, //70000AB2 //TVAR_afit_pBaseValS[375] /AFIT8_sddd8a_DispTH_High [7:0],	 AFIT8_sddd8a_iDenThreshLow [15:8]
+    {0x0F12, 0x2822}, //70000AB4 //TVAR_afit_pBaseValS[376] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]
+    {0x0F12, 0x0A00}, //70000AB6 //TVAR_afit_pBaseValS[377] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]
+    {0x0F12, 0x1903}, //70000AB8 //TVAR_afit_pBaseValS[378] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],	AFIT8_Demosaicing_iDemSharpenLow [15:8]
+    {0x0F12, 0x1E0F}, //70000ABA //TVAR_afit_pBaseValS[379] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],	 AFIT8_Demosaicing_iDemSharpThresh [15:8]
+    {0x0F12, 0x070A}, //70000ABC //TVAR_afit_pBaseValS[380] /AFIT8_Demosaicing_iDemShLowLimit [7:0],	 AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]
+    {0x0F12, 0x32FF}, //70000ABE //TVAR_afit_pBaseValS[381] /AFIT8_Demosaicing_iDemBlurLow[7:0],	 AFIT8_Demosaicing_iDemBlurHigh [15:8]
+    {0x0F12, 0x9604}, //70000AC0 //TVAR_afit_pBaseValS[382] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]
+    {0x0F12, 0x0F42}, //70000AC2 //TVAR_afit_pBaseValS[383] /AFIT8_Sharpening_iHighSharpPower[7:0],	AFIT8_Sharpening_iLowShDenoise [15:8]
+    {0x0F12, 0x400F}, //70000AC4 //TVAR_afit_pBaseValS[384] /AFIT8_Sharpening_iHighShDenoise [7:0],	AFIT8_Sharpening_iReduceEdgeMinMult [15:8]
+    {0x0F12, 0x0504}, //70000AC6 //TVAR_afit_pBaseValS[385] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]
+    {0x0F12, 0x2805}, //70000AC8 //TVAR_afit_pBaseValS[386] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]
+    {0x0F12, 0x0123}, //70000ACA //TVAR_afit_pBaseValS[387] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],	AFIT8_sddd8a_iClustMulT_H_Bin [15:8]
+    {0x0F12, 0x0201}, //70000ACC //TVAR_afit_pBaseValS[388] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]
+    {0x0F12, 0x2024}, //70000ACE //TVAR_afit_pBaseValS[389] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],	AFIT8_sddd8a_DispTH_High_Bin [15:8]
+    {0x0F12, 0x1C1C}, //70000AD0 //TVAR_afit_pBaseValS[390] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]
+    {0x0F12, 0x0028}, //70000AD2 //TVAR_afit_pBaseValS[391] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],	AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]
+    {0x0F12, 0x030A}, //70000AD4 //TVAR_afit_pBaseValS[392] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]
+    {0x0F12, 0x0A0A}, //70000AD6 //TVAR_afit_pBaseValS[393] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],	AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]
+    {0x0F12, 0x0A2D}, //70000AD8 //TVAR_afit_pBaseValS[394] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]
+    {0x0F12, 0xFF07}, //70000ADA //TVAR_afit_pBaseValS[395] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]
+    {0x0F12, 0x0432}, //70000ADC //TVAR_afit_pBaseValS[396] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]
+    {0x0F12, 0x4050}, //70000ADE //TVAR_afit_pBaseValS[397] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]
+    {0x0F12, 0x0F0F}, //70000AE0 //TVAR_afit_pBaseValS[398] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]
+    {0x0F12, 0x0440}, //70000AE2 //TVAR_afit_pBaseValS[399] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]
+    {0x0F12, 0x0302}, //70000AE4 //TVAR_afit_pBaseValS[400] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]
+    {0x0F12, 0x2328}, //70000AE6 //TVAR_afit_pBaseValS[401] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],	AFIT8_sddd8a_iClustThresh_C_sBin [15:8]
+    {0x0F12, 0x0101}, //70000AE8 //TVAR_afit_pBaseValS[402] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]
+    {0x0F12, 0x3C02}, //70000AEA //TVAR_afit_pBaseValS[403] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],	AFIT8_sddd8a_DispTH_Low_sBin [15:8]
+    {0x0F12, 0x1C3C}, //70000AEC //TVAR_afit_pBaseValS[404] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]
+    {0x0F12, 0x281C}, //70000AEE //TVAR_afit_pBaseValS[405] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],	AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]
+    {0x0F12, 0x0A00}, //70000AF0 //TVAR_afit_pBaseValS[406] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]
+    {0x0F12, 0x0A03}, //70000AF2 //TVAR_afit_pBaseValS[407] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]
+    {0x0F12, 0x2D0A}, //70000AF4 //TVAR_afit_pBaseValS[408] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]
+    {0x0F12, 0x070A}, //70000AF6 //TVAR_afit_pBaseValS[409] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8]
+    {0x0F12, 0x32FF}, //70000AF8 //TVAR_afit_pBaseValS[410] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]
+    {0x0F12, 0x5004}, //70000AFA //TVAR_afit_pBaseValS[411] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],	AFIT8_Sharpening_iLowSharpPower_sBin [15:8]
+    {0x0F12, 0x0F40}, //70000AFC //TVAR_afit_pBaseValS[412] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]
+    {0x0F12, 0x400F}, //70000AFE //TVAR_afit_pBaseValS[413] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],	AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]
+    {0x0F12, 0x0204}, //70000B00 //TVAR_afit_pBaseValS[414] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]
+    {0x0F12, 0x0003}, //70000B02 //TVAR_afit_pBaseValS[415] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]
+    {0x0F12, 0x0000}, //70000B04 //TVAR_afit_pBaseValS[416] /AFIT16_BRIGHTNESS
+    {0x0F12, 0x0000}, //70000B06 //TVAR_afit_pBaseValS[417] /AFIT16_CONTRAST
+    {0x0F12, 0x0014}, //70000B08 //TVAR_afit_pBaseValS[418] /AFIT16_SATURATION
+    {0x0F12, 0x0000}, //70000B0A //TVAR_afit_pBaseValS[419] /AFIT16_SHARP_BLUR
+    {0x0F12, 0x0000}, //70000B0C //TVAR_afit_pBaseValS[420] /AFIT16_GLAMOUR
+    {0x0F12, 0x00C4}, //70000B0E //TVAR_afit_pBaseValS[421] /AFIT16_sddd8a_edge_high
+    {0x0F12, 0x03FF}, //70000B10 //TVAR_afit_pBaseValS[422] /AFIT16_Demosaicing_iSatVal
+    {0x0F12, 0x009C}, //70000B12 //TVAR_afit_pBaseValS[423] /AFIT16_Sharpening_iReduceEdgeThresh
+    {0x0F12, 0x017C}, //70000B14 //TVAR_afit_pBaseValS[424] /AFIT16_demsharpmix1_iRGBOffset
+    {0x0F12, 0x03FF}, //70000B16 //TVAR_afit_pBaseValS[425] /AFIT16_demsharpmix1_iDemClamp
+    {0x0F12, 0x000C}, //70000B18 //TVAR_afit_pBaseValS[426] /AFIT16_demsharpmix1_iLowThreshold
+    {0x0F12, 0x0010}, //70000B1A //TVAR_afit_pBaseValS[427] /AFIT16_demsharpmix1_iHighThreshold
+    {0x0F12, 0x00C8}, //70000B1C //TVAR_afit_pBaseValS[428] /AFIT16_demsharpmix1_iLowBright
+    {0x0F12, 0x0320}, //70000B1E //TVAR_afit_pBaseValS[429] /AFIT16_demsharpmix1_iHighBright
+    {0x0F12, 0x0046}, //70000B20 //TVAR_afit_pBaseValS[430] /AFIT16_demsharpmix1_iLowSat
+    {0x0F12, 0x015E}, //70000B22 //TVAR_afit_pBaseValS[431] /AFIT16_demsharpmix1_iHighSat
+    {0x0F12, 0x0070}, //70000B24 //TVAR_afit_pBaseValS[432] /AFIT16_demsharpmix1_iTune
+    {0x0F12, 0x0000}, //70000B26 //TVAR_afit_pBaseValS[433] /AFIT16_demsharpmix1_iHystThLow
+    {0x0F12, 0x0000}, //70000B28 //TVAR_afit_pBaseValS[434] /AFIT16_demsharpmix1_iHystThHigh
+    {0x0F12, 0x01AA}, //70000B2A //TVAR_afit_pBaseValS[435] /AFIT16_demsharpmix1_iHystCenter
+    {0x0F12, 0x0014}, //70000B2C //TVAR_afit_pBaseValS[436] /AFIT16_YUV422_DENOISE_iUVLowThresh
+    {0x0F12, 0x0014}, //70000B2E //TVAR_afit_pBaseValS[437] /AFIT16_YUV422_DENOISE_iUVHighThresh
+    {0x0F12, 0x000A}, //70000B30 //TVAR_afit_pBaseValS[438] /AFIT16_YUV422_DENOISE_iYLowThresh
+    {0x0F12, 0x000A}, //70000B32 //TVAR_afit_pBaseValS[439] /AFIT16_YUV422_DENOISE_iYHighThresh
+    {0x0F12, 0x0140}, //70000B34 //TVAR_afit_pBaseValS[440] /AFIT16_Sharpening_iLowSharpClamp
+    {0x0F12, 0x003C}, //70000B36 //TVAR_afit_pBaseValS[441] /AFIT16_Sharpening_iHighSharpClamp
+    {0x0F12, 0x0032}, //70000B38 //TVAR_afit_pBaseValS[442] /AFIT16_Sharpening_iLowSharpClamp_Bin
+    {0x0F12, 0x0023}, //70000B3A //TVAR_afit_pBaseValS[443] /AFIT16_Sharpening_iHighSharpClamp_Bin
+    {0x0F12, 0x0023}, //70000B3C //TVAR_afit_pBaseValS[444] /AFIT16_Sharpening_iLowSharpClamp_sBin
+    {0x0F12, 0x0032}, //70000B3E //TVAR_afit_pBaseValS[445] /AFIT16_Sharpening_iHighSharpClamp_sBin
+    {0x0F12, 0x0A24}, //70000B40 //TVAR_afit_pBaseValS[446] /AFIT8_sddd8a_edge_low [7:0],   AFIT8_sddd8a_repl_thresh [15:8]
+    {0x0F12, 0x1701}, //70000B42 //TVAR_afit_pBaseValS[447] /AFIT8_sddd8a_repl_force [7:0],  AFIT8_sddd8a_sat_level [15:8]
+    {0x0F12, 0x0229}, //70000B44 //TVAR_afit_pBaseValS[448] /AFIT8_sddd8a_sat_thr[7:0],  AFIT8_sddd8a_sat_mpl [15:8]
+    {0x0F12, 0x1403}, //70000B46 //TVAR_afit_pBaseValS[449] /AFIT8_sddd8a_sat_noise[7:0],  AFIT8_sddd8a_iMaxSlopeAllowed [15:8]
+    {0x0F12, 0x0000}, //70000B48 //TVAR_afit_pBaseValS[450] /AFIT8_sddd8a_iHotThreshHigh[7:0],  AFIT8_sddd8a_iHotThreshLow [15:8]
+    {0x0F12, 0x0000}, //70000B4A //TVAR_afit_pBaseValS[451] /AFIT8_sddd8a_iColdThreshHigh[7:0],  AFIT8_sddd8a_iColdThreshLow [15:8]
+    {0x0F12, 0x0505}, //70000B4C //TVAR_afit_pBaseValS[452] /AFIT8_sddd8a_AddNoisePower1[7:0],  AFIT8_sddd8a_AddNoisePower2 [15:8]
+    {0x0F12, 0x00FF}, //70000B4E //TVAR_afit_pBaseValS[453] /AFIT8_sddd8a_iSatSat[7:0],	AFIT8_sddd8a_iRadialTune [15:8]
+    {0x0F12, 0x043B}, //70000B50 //TVAR_afit_pBaseValS[454] /AFIT8_sddd8a_iRadialLimit [7:0],   AFIT8_sddd8a_iRadialPower [15:8]
+    {0x0F12, 0x1414}, //70000B52 //TVAR_afit_pBaseValS[455] /AFIT8_sddd8a_iLowMaxSlopeAllowed [7:0],	AFIT8_sddd8a_iHighMaxSlopeAllowed [15:8]
+    {0x0F12, 0x0301}, //70000B54 //TVAR_afit_pBaseValS[456] /AFIT8_sddd8a_iLowSlopeThresh[7:0],	AFIT8_sddd8a_iHighSlopeThresh [15:8]
+    {0x0F12, 0xFF07}, //70000B56 //TVAR_afit_pBaseValS[457] /AFIT8_sddd8a_iSquaresRounding [7:0],   AFIT8_Demosaicing_iCentGrad [15:8]
+    {0x0F12, 0x051E}, //70000B58 //TVAR_afit_pBaseValS[458] /AFIT8_Demosaicing_iMonochrom [7:0],	 AFIT8_Demosaicing_iDecisionThresh [15:8]
+    {0x0F12, 0x0A1E}, //70000B5A //TVAR_afit_pBaseValS[459] /AFIT8_Demosaicing_iDesatThresh [7:0],   AFIT8_Demosaicing_iEnhThresh [15:8]
+    {0x0F12, 0x0000}, //70000B5C //TVAR_afit_pBaseValS[460] /AFIT8_Demosaicing_iGRDenoiseVal [7:0],	AFIT8_Demosaicing_iGBDenoiseVal [15:8]
+    {0x0F12, 0x0A00}, //70000B5E //TVAR_afit_pBaseValS[461] /AFIT8_Demosaicing_iNearGrayDesat[7:0],	AFIT8_Demosaicing_iDFD_ReduceCoeff [15:8]
+    {0x0F12, 0x143C}, //70000B60 //TVAR_afit_pBaseValS[462] /AFIT8_Sharpening_iMSharpen [7:0],   AFIT8_Sharpening_iMShThresh [15:8]
+    {0x0F12, 0x0532}, //70000B62 //TVAR_afit_pBaseValS[463] /AFIT8_Sharpening_iWSharpen [7:0],   AFIT8_Sharpening_iWShThresh [15:8]
+    {0x0F12, 0x0002}, //70000B64 //TVAR_afit_pBaseValS[464] /AFIT8_Sharpening_nSharpWidth [7:0],	 AFIT8_Sharpening_iReduceNegative [15:8]
+    {0x0F12, 0x0096}, //70000B66 //TVAR_afit_pBaseValS[465] /AFIT8_Sharpening_iShDespeckle [7:0],  AFIT8_demsharpmix1_iRGBMultiplier [15:8]
+    {0x0F12, 0x1002}, //70000B68 //TVAR_afit_pBaseValS[466] /AFIT8_demsharpmix1_iFilterPower [7:0],  AFIT8_demsharpmix1_iBCoeff [15:8]
+    {0x0F12, 0x001E}, //70000B6A //TVAR_afit_pBaseValS[467] /AFIT8_demsharpmix1_iGCoeff [7:0],   AFIT8_demsharpmix1_iWideMult [15:8]
+    {0x0F12, 0x0900}, //70000B6C //TVAR_afit_pBaseValS[468] /AFIT8_demsharpmix1_iNarrMult [7:0],	 AFIT8_demsharpmix1_iHystFalloff [15:8]
+    {0x0F12, 0x0600}, //70000B6E //TVAR_afit_pBaseValS[469] /AFIT8_demsharpmix1_iHystMinMult [7:0],	AFIT8_demsharpmix1_iHystWidth [15:8]
+    {0x0F12, 0x0504}, //70000B70 //TVAR_afit_pBaseValS[470] /AFIT8_demsharpmix1_iHystFallLow [7:0],	AFIT8_demsharpmix1_iHystFallHigh [15:8]
+    {0x0F12, 0x0305}, //70000B72 //TVAR_afit_pBaseValS[471] /AFIT8_demsharpmix1_iHystTune [7:0],	* AFIT8_YUV422_DENOISE_iUVSupport [15:8]
+    {0x0F12, 0x7802}, //70000B74 //TVAR_afit_pBaseValS[472] /AFIT8_YUV422_DENOISE_iYSupport [7:0],   AFIT8_byr_cgras_iShadingPower [15:8]
+    {0x0F12, 0x0080}, //70000B76 //TVAR_afit_pBaseValS[473] /AFIT8_RGBGamma2_iLinearity [7:0],  AFIT8_RGBGamma2_iDarkReduce [15:8]
+    {0x0F12, 0x0180}, //70000B78 //TVAR_afit_pBaseValS[474] /AFIT8_ccm_oscar_iSaturation[7:0],   AFIT8_RGB2YUV_iYOffset [15:8]
+    {0x0F12, 0x0080}, //70000B7A //TVAR_afit_pBaseValS[475] /AFIT8_RGB2YUV_iRGBGain [7:0],   AFIT8_RGB2YUV_iSaturation [15:8]
+    {0x0F12, 0x5050}, //70000B7C //TVAR_afit_pBaseValS[476] /AFIT8_sddd8a_iClustThresh_H [7:0],  AFIT8_sddd8a_iClustThresh_C [15:8]
+    {0x0F12, 0x0101}, //70000B7E //TVAR_afit_pBaseValS[477] /AFIT8_sddd8a_iClustMulT_H [7:0],   AFIT8_sddd8a_iClustMulT_C [15:8]
+    {0x0F12, 0x1C02}, //70000B80 //TVAR_afit_pBaseValS[478] /AFIT8_sddd8a_nClustLevel_H [7:0],   AFIT8_sddd8a_DispTH_Low [15:8]
+    {0x0F12, 0x191C}, //70000B82 //TVAR_afit_pBaseValS[479] /AFIT8_sddd8a_DispTH_High [7:0],	 AFIT8_sddd8a_iDenThreshLow [15:8]
+    {0x0F12, 0x2819}, //70000B84 //TVAR_afit_pBaseValS[480] /AFIT8_sddd8a_iDenThreshHigh[7:0],   AFIT8_Demosaicing_iEdgeDesat [15:8]
+    {0x0F12, 0x0A00}, //70000B86 //TVAR_afit_pBaseValS[481] /AFIT8_Demosaicing_iEdgeDesatThrLow [7:0],   AFIT8_Demosaicing_iEdgeDesatThrHigh [15:8]
+    {0x0F12, 0x1E03}, //70000B88 //TVAR_afit_pBaseValS[482] /AFIT8_Demosaicing_iEdgeDesatLimit[7:0],	AFIT8_Demosaicing_iDemSharpenLow [15:8]
+    {0x0F12, 0x1E0F}, //70000B8A //TVAR_afit_pBaseValS[483] /AFIT8_Demosaicing_iDemSharpenHigh[7:0],	 AFIT8_Demosaicing_iDemSharpThresh [15:8]
+    {0x0F12, 0x0508}, //70000B8C //TVAR_afit_pBaseValS[484] /AFIT8_Demosaicing_iDemShLowLimit [7:0],	 AFIT8_Demosaicing_iDespeckleForDemsharp [15:8]
+    {0x0F12, 0x32FF}, //70000B8E //TVAR_afit_pBaseValS[485] /AFIT8_Demosaicing_iDemBlurLow[7:0],	 AFIT8_Demosaicing_iDemBlurHigh [15:8]
+    {0x0F12, 0xAA04}, //70000B90 //TVAR_afit_pBaseValS[486] /AFIT8_Demosaicing_iDemBlurRange[7:0],   AFIT8_Sharpening_iLowSharpPower [15:8]
+    {0x0F12, 0x1452}, //70000B92 //TVAR_afit_pBaseValS[487] /AFIT8_Sharpening_iHighSharpPower[7:0],	AFIT8_Sharpening_iLowShDenoise [15:8]
+    {0x0F12, 0x4015}, //70000B94 //TVAR_afit_pBaseValS[488] /AFIT8_Sharpening_iHighShDenoise [7:0],	AFIT8_Sharpening_iReduceEdgeMinMult [15:8]
+    {0x0F12, 0x0604}, //70000B96 //TVAR_afit_pBaseValS[489] /AFIT8_Sharpening_iReduceEdgeSlope [7:0],  AFIT8_demsharpmix1_iWideFiltReduce [15:8]
+    {0x0F12, 0x5006}, //70000B98 //TVAR_afit_pBaseValS[490] /AFIT8_demsharpmix1_iNarrFiltReduce [7:0],  AFIT8_sddd8a_iClustThresh_H_Bin [15:8]
+    {0x0F12, 0x0150}, //70000B9A //TVAR_afit_pBaseValS[491] /AFIT8_sddd8a_iClustThresh_C_Bin [7:0],	AFIT8_sddd8a_iClustMulT_H_Bin [15:8]
+    {0x0F12, 0x0201}, //70000B9C //TVAR_afit_pBaseValS[492] /AFIT8_sddd8a_iClustMulT_C_Bin [7:0],   AFIT8_sddd8a_nClustLevel_H_Bin [15:8]
+    {0x0F12, 0x1E1E}, //70000B9E //TVAR_afit_pBaseValS[493] /AFIT8_sddd8a_DispTH_Low_Bin [7:0],	AFIT8_sddd8a_DispTH_High_Bin [15:8]
+    {0x0F12, 0x1212}, //70000BA0 //TVAR_afit_pBaseValS[494] /AFIT8_sddd8a_iDenThreshLow_Bin [7:0],   AFIT8_sddd8a_iDenThreshHigh_Bin [15:8]
+    {0x0F12, 0x0028}, //70000BA2 //TVAR_afit_pBaseValS[495] /AFIT8_Demosaicing_iEdgeDesat_Bin[7:0],	AFIT8_Demosaicing_iEdgeDesatThrLow_Bin [15:8]
+    {0x0F12, 0x030A}, //70000BA4 //TVAR_afit_pBaseValS[496] /AFIT8_Demosaicing_iEdgeDesatThrHigh_Bin [7:0],  AFIT8_Demosaicing_iEdgeDesatLimit_Bin [15:8]
+    {0x0F12, 0x0A10}, //70000BA6 //TVAR_afit_pBaseValS[497] /AFIT8_Demosaicing_iDemSharpenLow_Bin [7:0],	AFIT8_Demosaicing_iDemSharpenHigh_Bin [15:8]
+    {0x0F12, 0x0819}, //70000BA8 //TVAR_afit_pBaseValS[498] /AFIT8_Demosaicing_iDemSharpThresh_Bin [7:0],  AFIT8_Demosaicing_iDemShLowLimit_Bin [15:8]
+    {0x0F12, 0xFF05}, //70000BAA //TVAR_afit_pBaseValS[499] /AFIT8_Demosaicing_iDespeckleForDemsharp_Bin [7:0],  AFIT8_Demosaicing_iDemBlurLow_Bin [15:8]
+    {0x0F12, 0x0432}, //70000BAC //TVAR_afit_pBaseValS[500] /AFIT8_Demosaicing_iDemBlurHigh_Bin [7:0],  AFIT8_Demosaicing_iDemBlurRange_Bin [15:8]
+    {0x0F12, 0x4052}, //70000BAE //TVAR_afit_pBaseValS[501] /AFIT8_Sharpening_iLowSharpPower_Bin [7:0],  AFIT8_Sharpening_iHighSharpPower_Bin [15:8]
+    {0x0F12, 0x1514}, //70000BB0 //TVAR_afit_pBaseValS[502] /AFIT8_Sharpening_iLowShDenoise_Bin [7:0],  AFIT8_Sharpening_iHighShDenoise_Bin [15:8]
+    {0x0F12, 0x0440}, //70000BB2 //TVAR_afit_pBaseValS[503] /AFIT8_Sharpening_iReduceEdgeMinMult_Bin [7:0],  AFIT8_Sharpening_iReduceEdgeSlope_Bin [15:8]
+    {0x0F12, 0x0302}, //70000BB4 //TVAR_afit_pBaseValS[504] /AFIT8_demsharpmix1_iWideFiltReduce_Bin [7:0],  AFIT8_demsharpmix1_iNarrFiltReduce_Bin [15:8]
+    {0x0F12, 0x5050}, //70000BB6 //TVAR_afit_pBaseValS[505] /AFIT8_sddd8a_iClustThresh_H_sBin[7:0],	AFIT8_sddd8a_iClustThresh_C_sBin [15:8]
+    {0x0F12, 0x0101}, //70000BB8 //TVAR_afit_pBaseValS[506] /AFIT8_sddd8a_iClustMulT_H_sBin [7:0],   AFIT8_sddd8a_iClustMulT_C_sBin [15:8]
+    {0x0F12, 0x1E02}, //70000BBA //TVAR_afit_pBaseValS[507] /AFIT8_sddd8a_nClustLevel_H_sBin [7:0],	AFIT8_sddd8a_DispTH_Low_sBin [15:8]
+    {0x0F12, 0x121E}, //70000BBC //TVAR_afit_pBaseValS[508] /AFIT8_sddd8a_DispTH_High_sBin [7:0],   AFIT8_sddd8a_iDenThreshLow_sBin [15:8]
+    {0x0F12, 0x2812}, //70000BBE //TVAR_afit_pBaseValS[509] /AFIT8_sddd8a_iDenThreshHigh_sBin[7:0],	AFIT8_Demosaicing_iEdgeDesat_sBin [15:8]
+    {0x0F12, 0x0A00}, //70000BC0 //TVAR_afit_pBaseValS[510] /AFIT8_Demosaicing_iEdgeDesatThrLow_sBin [7:0],  AFIT8_Demosaicing_iEdgeDesatThrHigh_sBin [15:8]
+    {0x0F12, 0x1003}, //70000BC2 //TVAR_afit_pBaseValS[511] /AFIT8_Demosaicing_iEdgeDesatLimit_sBin [7:0],  AFIT8_Demosaicing_iDemSharpenLow_sBin [15:8]
+    {0x0F12, 0x190A}, //70000BC4 //TVAR_afit_pBaseValS[512] /AFIT8_Demosaicing_iDemSharpenHigh_sBin [7:0],  AFIT8_Demosaicing_iDemSharpThresh_sBin [15:8]
+    {0x0F12, 0x0508}, //70000BC6 //TVAR_afit_pBaseValS[513] /AFIT8_Demosaicing_iDemShLowLimit_sBin [7:0],  AFIT8_Demosaicing_iDespeckleForDemsharp_sBin [15:8]
+    {0x0F12, 0x32FF}, //70000BC8 //TVAR_afit_pBaseValS[514] /AFIT8_Demosaicing_iDemBlurLow_sBin [7:0],  AFIT8_Demosaicing_iDemBlurHigh_sBin [15:8]
+    {0x0F12, 0x5204}, //70000BCA //TVAR_afit_pBaseValS[515] /AFIT8_Demosaicing_iDemBlurRange_sBin [7:0],	AFIT8_Sharpening_iLowSharpPower_sBin [15:8]
+    {0x0F12, 0x1440}, //70000BCC //TVAR_afit_pBaseValS[516] /AFIT8_Sharpening_iHighSharpPower_sBin [7:0],  AFIT8_Sharpening_iLowShDenoise_sBin [15:8]
+    {0x0F12, 0x4015}, //70000BCE //TVAR_afit_pBaseValS[517] /AFIT8_Sharpening_iHighShDenoise_sBin [7:0],	AFIT8_Sharpening_iReduceEdgeMinMult_sBin [15:8]
+    {0x0F12, 0x0204}, //70000BD0 //TVAR_afit_pBaseValS[518] /AFIT8_Sharpening_iReduceEdgeSlope_sBin [7:0],  AFIT8_demsharpmix1_iWideFiltReduce_sBin [15:8]
+    {0x0F12, 0x0003}, //70000BD2 //TVAR_afit_pBaseValS[519] /AFIT8_demsharpmix1_iNarrFiltReduce_sBin [7:0]
+
+    {0x0F12, 0x7F7A}, //// #afit_pConstBaseVals[0]
+    {0x0F12, 0x7F9D}, //afit_pConstBaseValS[1]
+    {0x0F12, 0xBEFC}, //afit_pConstBaseValS[2]
+    {0x0F12, 0xF7BC}, //afit_pConstBaseValS[3]
+    {0x0F12, 0x7E06}, //afit_pConstBaseValS[4]
+    {0x0F12, 0x0053}, //afit_pConstBaseValS[5]
+
+    // Update Changed Registers
+    {0x002A, 0x0664},
+    {0x0F12, 0x013E}, //seti_uContrastCenter
+
+    {0x002A, 0x04D6},
+    {0x0F12, 0x0001}, // #REG_TC_DBG_ReInitCmd
+    {0x0028, 0xD000},
+    {0x002A, 0x1102},
+    {0x0F12, 0x00C0}, // Use T&P index 22 and 23
+    {0x002A, 0x113C},
+    {0x0F12, 0x267C}, // Trap 22 address 0x71aa
+    {0x0F12, 0x2680}, // Trap 23 address 0x71b4
+    {0x002A, 0x1142},
+    {0x0F12, 0x00C0}, // Trap Up Set (trap Addr are > 0x10000)
+    {0x002A, 0x117C},
+    {0x0F12, 0x2CE8}, // Patch 22 address (TrapAndPatchOpCodes array index 22)
+    {0x0F12, 0x2CeC}, // Patch 23 address (TrapAndPatchOpCodes array index 23)
+    // Fill RAM with alternative op-codes
+    {0x0028, 0x7000}, // start add MSW
+    {0x002A, 0x2CE8}, // start add LSW
+    {0x0F12, 0x0007}, // Modify LSB to control AWBB_YThreshLow
+    {0x0F12, 0x00e2}, //
+    {0x0F12, 0x0005}, // Modify LSB to control AWBB_YThreshLowBrLow
+    {0x0F12, 0x00e2}, //
+    // Update T&P tuning parameters
+    {0x002A, 0x337A},
+    {0x0F12, 0x0006}, // #Tune_TP_atop_dbus_reg // 6 is the default HW value
+
+    //================================================================================================
+    // SET PLL
+    //================================================================================================
+    //How to set
+    //h)ex(CLK you want) * 1000)
+    //h)ex((CLK you want) * 1000 / 4)
+    //h)ex((CLK you want) * 1000 / 4)
+    //===============================================================================================
+    //Set input CLK // 26MHz
+    {0x002A, 0x01CC},
+    {0x0F12, 0x5DC0}, //5FB4 // #REG_TC_IPRM_InClockLSBs  //Set input CLK // 24MHz
+    {0x0F12, 0x0000}, // #REG_TC_IPRM_InClockMSBs
+                      //{0x002A   01EE
+                      //{0x0F12   0000  // #REG_TC_IPRM_UseNPviClocks // Number of PLL setting  0x0002
+                      //{0x0F12   0003  // #REG_TC_IPRM_UseNMiPiClocks
+                      //   //Set system CLK // 50MHz
+                      //{0x002A   01F6
+                      //{0x0F12   1F40  //34BC //2710 //2904	//2BF2 // #REG_TC_IPRM_OpClk4KHz_0
+                      //   //Set pixel CLK // 42MHz
+                      //{0x0F12   28C3  //157C //3A88 // #REG_TC_IPRM_MinOutRate4KHz_0
+                      //{0x0F12   2C06  //157C //3AA8 // #REG_TC_IPRM_MaxOutRate4KHz_0
+                      //{0x0F12   1F40  //34BC //2710 //2904	//2BF2 // #REG_TC_IPRM_OpClk4KHz_1
+                      //   //Set pixel CLK // 42MHz
+                      //{0x0F12   28C3  //157C //3A88 // #REG_TC_IPRM_MinOutRate4KHz_1
+                      //{0x0F12   2C06  //157C //3AA8 // #REG_TC_IPRM_MaxOutRate4KHz_1
+
+    {0x002A, 0x01EE},
+    {0x0F12, 0x0000}, //#REG_TC_IPRM_UseNPviClocks		// Number of PLL setting
+    {0x0F12, 0x0003}, //#REG_TC_IPRM_UseNMiPiClocks		// Number of PLL setting
+
+    {0x002A, 0x01F6},
+    {0x0F12, 0x1F40}, //REG_TC_IPRM_OpClk4KHz_0                   	2   700001F6
+    {0x0F12, 0x32A8}, //3
+    {0x0F12, 0x32E8},
+
+    {0x0F12, 0x1F40}, //REG_TC_IPRM_OpClk4KHz_1                   	2   700001FC
+    {0x0F12, 0x2ea0}, //REG_TC_IPRM_MinOutRate4KHz_1              	2   700001FE
+    {0x0F12, 0x2f00}, //REG_TC_IPRM_MaxOutRate4KHz_1              	2   70000200
+
+    {0x0F12, 0x0BB8}, //REG_TC_IPRM_OpClk4KHz_2                   	2   70000202
+    {0x0F12, 0x05DC}, //REG_TC_IPRM_MinOutRate4KHz_2              	2   70000204
+    {0x0F12, 0x1770}, //REG_TC_IPRM_MaxOutRate4KHz_2              	2   70000206
+
+    //Update PLL
+    {0x002A, 0x0208},
+    {0x0F12, 0x0001}, // #REG_TC_IPRM_InitParamsUpdated
+
+    //============================================================
+    // Frame rate setting
+    //============================================================
+    // How to set
+    // 1. Exposure value
+    // dec2hex((1 / (frame rate you want(ms))) * 100d * 4d)
+    // 2. Analog Digital gain
+    // dec2hex((Analog gain you want) * 256d)
+    //============================================================
+    // Set preview exposure time
+    {0x002A, 0x0530},
+    {0x0F12, 0x5DC0}, // #lt_uMaxExp1			60ms
+    {0x0F12, 0x0000},
+    {0x0F12, 0x6590}, // #lt_uMaxExp2			70ms
+    {0x0F12, 0x0000},
+    {0x002A, 0x167C},
+    {0x0F12, 0x8CA0}, // #evt1_lt_uMaxExp3	100ms
+    {0x0F12, 0x0000},
+    {0x0F12, 0xABE0}, // #evt1_lt_uMaxExp4	120ms
+    {0x0F12, 0x0000},
+
+    // Set capture exposure time
+    {0x002A, 0x0538},
+    {0x0F12, 0x5DC0}, // #lt_uCapMaxExp1 		60ms
+    {0x0F12, 0x0000},
+    {0x0F12, 0x6590}, // #lt_uCapMaxExp2 	 70ms
+    {0x0F12, 0x0000},
+    {0x002A, 0x1684},
+    {0x0F12, 0x8CA0}, // #evt1_lt_uCapMaxExp3 100ms
+    {0x0F12, 0x0000},
+    {0x0F12, 0xABE0}, // #evt1_lt_uCapMaxExp4 120ms
+    {0x0F12, 0x0000},
+
+    // Set gain
+    {0x002A, 0x0540},
+    {0x0F12, 0x0150}, // #lt_uMaxAnGain1
+    {0x0F12, 0x0280}, // #lt_uMaxAnGain2
+    {0x002A, 0x168C},
+    {0x0F12, 0x0350}, // #evt1_lt_uMaxAnGain3
+    {0x0F12, 0x0800}, // #evt1_lt_uMaxAnGain4
+
+    {0x002A, 0x0544},
+    {0x0F12, 0x0100}, // #lt_uMaxDigGain
+    {0x0F12, 0x0A00}, //#lt_uMaxTotGain
+
+    {0x002A, 0x1694},
+    {0x0F12, 0x0001}, // #evt1_senHal_bExpandForbid
+
+    //delay 10ms
+};
+
+struct s5k5ca_i2c_reg_conf s5k5ca_init_reg_config_sunny_settings_2[] =
+{
+    //===============================================================================================
+    //SET PREVIEW CONFIGURATION_0
+    //# Foramt : YUV422
+    //# Size: VGA
+    //# FPS : 7.5~15fps for normal mode
+    //===============================================================================================
+    {0x002A, 0x026C},
+    {0x0F12, 0x0280}, //0320//// +10 //0400 //#REG_0TC_PCFG_usWidth//1024
+    {0x0F12, 0x01e0}, //0258//// +8//0300 //#REG_0TC_PCFG_usHeight //768	026E
+    {0x0F12, 0x0006}, //#REG_0TC_PCFG_Format			0270
+    {0x0F12, 0x32E8}, //157C //3AA8 //#REG_0TC_PCFG_usMaxOut4KHzRate  0272
+    {0x0F12, 0x32a8}, //157C //3A88 //#REG_0TC_PCFG_usMinOut4KHzRate  0274
+    {0x0F12, 0x0100}, //#REG_0TC_PCFG_OutClkPerPix88	0276
+    {0x0F12, 0x0800}, //#REG_0TC_PCFG_uMaxBpp88 		027
+    {0x0F12, 0x0030}, //0052 //#REG_0TC_PCFG_PVIMask //s0050 = FALSE in MSM6290 : s0052 = TRUE in MSM6800 //reg 027A
+    {0x0F12, 0x0010}, //#REG_0TC_PCFG_OIFMask
+    {0x0F12, 0x01E0}, //01E0 //#REG_0TC_PCFG_usJpegPacketSize  jpeg_packet_size = 1024	400
+    {0x0F12, 0x0000}, //0000 //#REG_0TC_PCFG_usJpegTotalPackets    jpeg_packets = 600		258
+    {0x0F12, 0x0000}, //#REG_0TC_PCFG_uClockInd
+    {0x0F12, 0x0000}, //#REG_0TC_PCFG_usFrTimeType
+    {0x0F12, 0x0001}, //2  Jack 20100420//#REG_0TC_PCFG_FrRateQualityType 01:Always achieve the best frame rate. 02:Always achieve the best possible image quality (no-binning mode)
+    {0x0F12, 0x0535}, //03E8 //#REG_0TC_PCFG_usMaxFrTimeMsecMult10 //10fps
+    {0x0F12, 0x029A}, //01C6 //#REG_0TC_PCFG_usMinFrTimeMsecMult10 //22fps
+    {0x0F12, 0x0000}, //#REG_0TC_PCFG_bSmearOutput
+    {0x0F12, 0x0000}, //#REG_0TC_PCFG_sSaturation
+    {0x0F12, 0x0000}, //#REG_0TC_PCFG_sSharpBlur
+    {0x0F12, 0x0000}, //#REG_0TC_PCFG_sColorTemp
+    {0x0F12, 0x0000}, //#REG_0TC_PCFG_uDeviceGammaIndex
+    {0x0F12, 0x0000}, //#REG_0TC_PCFG_uPrevMirror  0x0003
+    {0x0F12, 0x0000}, //#REG_0TC_PCFG_uCaptureMirror  0x0003
+    {0x0F12, 0x0000}, //#REG_0TC_PCFG_uRotation
+    //===============================================================================================
+    //SET PREVIEW CONFIGURATION_1
+    //# Foramt : YUV422
+    //# Size: VGA
+    //# FPS : 5~15fps for Night mode
+    //===============================================================================================
+    {0x002A, 0x029C},
+    {0x0F12, 0x0400}, //0320////  +10//0400 //#REG_0TC_PCFG_usWidth//1024
+    {0x0F12, 0x0300}, //0258////  +8//0300 //#REG_0TC_PCFG_usHeight //768	 026E
+    {0x0F12, 0x0005}, //#REG_0TC_PCFG_Format			0270
+    {0x0F12, 0x32E8}, //157C //3AA8 //#REG_0TC_PCFG_usMaxOut4KHzRate  0272
+    {0x0F12, 0x32a8}, //157C //3A88 //#REG_0TC_PCFG_usMinOut4KHzRate  0274
+    {0x0F12, 0x0100}, //#REG_0TC_PCFG_OutClkPerPix88	0276
+    {0x0F12, 0x0800}, //#REG_0TC_PCFG_uMaxBpp88 		027
+    {0x0F12, 0x0050}, //0052 //#REG_0TC_PCFG_PVIMask //s0050 = FALSE in MSM6290 : s0052 = TRUE in MSM6800 //reg 027A
+    {0x0F12, 0x0010}, //#REG_0TC_PCFG_OIFMask
+    {0x0F12, 0x01E0}, //01E0 //#REG_0TC_PCFG_usJpegPacketSize
+    {0x0F12, 0x0000}, //0000 //#REG_0TC_PCFG_usJpegTotalPackets
+    {0x0F12, 0x0000}, //#REG_0TC_PCFG_uClockInd
+    {0x0F12, 0x0000}, //#REG_0TC_PCFG_usFrTimeType
+    {0x0F12, 0x0001},
+    {0x0F12, 0x07D0}, //0535 //03E8 //#REG_0TC_PCFG_usMaxFrTimeMsecMult10 //5fps
+    {0x0F12, 0x029A}, //01C6 //#REG_0TC_PCFG_usMinFrTimeMsecMult10 //22fps
+    {0x0F12, 0x0000}, //#REG_0TC_PCFG_bSmearOutput
+    {0x0F12, 0x0000}, //#REG_0TC_PCFG_sSaturation
+    {0x0F12, 0x0000}, //#REG_0TC_PCFG_sSharpBlur
+    {0x0F12, 0x0000}, //#REG_0TC_PCFG_sColorTemp
+    {0x0F12, 0x0000}, //#REG_0TC_PCFG_uDeviceGammaIndex
+    {0x0F12, 0x0000}, //#REG_0TC_PCFG_uPrevMirror  0x0003
+    {0x0F12, 0x0000}, //#REG_0TC_PCFG_uCaptureMirror  0x0003
+    {0x0F12, 0x0000}, //#REG_0TC_PCFG_uRotation
+
+    //===============================================================================================
+    //APPLY PREVIEW CONFIGURATION & RUN PREVIEW
+    //===============================================================================================
+    {0x002A, 0x023C},
+    {0x0F12, 0x0000}, // #REG_TC_GP_ActivePrevConfig // Select preview configuration_0
+    {0x002A, 0x0240},
+    {0x0F12, 0x0001}, // #REG_TC_GP_PrevOpenAfterChange
+    {0x002A, 0x0230},
+    {0x0F12, 0x0001}, // #REG_TC_GP_NewConfigSync // Update preview configuration
+    {0x002A, 0x023E},
+    {0x0F12, 0x0001}, // #REG_TC_GP_PrevConfigChanged
+    {0x002A, 0x0220},
+    {0x0F12, 0x0001}, // #REG_TC_GP_EnablePreview // Start preview
+    {0x0F12, 0x0001}, // #REG_TC_GP_EnablePreviewChanged
+    //===============================================================================================
+    //SET CAPTURE CONFIGURATION_0
+    //# Foramt :YUV
+    //# Size: 2048*1536
+    //# FPS : 5fps
+    //===============================================================================================
+    {0x002A, 0x035C},
+    {0x0F12, 0x0000}, //#REG_0TC_CCFG_uCaptureModeJpEG
+    {0x0F12, 0x0280}, //0800 //#REG_0TC_CCFG_usWidth
+    {0x0F12, 0x01e0}, //0600 //#REG_0TC_CCFG_usHeight
+    {0x0F12, 0x0006}, //#REG_0TC_CCFG_Format//5:YUV9:JPEG
+    {0x0F12, 0x32E8}, //157C //3AA8 //#REG_0TC_CCFG_usMaxOut4KHzRate
+    {0x0F12, 0x32a8}, //157C //3A88 //#REG_0TC_CCFG_usMinOut4KHzRate
+    {0x0F12, 0x0100}, //#REG_0TC_CCFG_OutClkPerPix88
+    {0x0F12, 0x0800}, //#REG_0TC_CCFG_uMaxBpp88
+    {0x0F12, 0x0030}, //0052 //#REG_0TC_CCFG_PVIMask
+    {0x0F12, 0x0010}, //#REG_0TC_CCFG_OIFMask
+    {0x0F12, 0x01E0}, //01E0 //#REG_0TC_CCFG_usJpegPacketSize
+    {0x0F12, 0x08FC}, //08fc //#REG_0TC_CCFG_usJpegTotalPackets
+    {0x0F12, 0x0000}, //#REG_0TC_CCFG_uClockInd
+    {0x0F12, 0x0000}, //#REG_0TC_CCFG_usFrTimeType
+    {0x0F12, 0x0002}, //2 //#REG_0TC_CCFG_FrRateQualityType  0000 Jack 20100420
+    {0x0F12, 0x07D0}, //029A //0535 //#REG_0TC_CCFG_usMaxFrTimeMsecMult10 //7.5fps
+    {0x0F12, 0x07D0}, //#REG_0TC_CCFG_usMinFrTimeMsecMult10 //10fps
+    {0x0F12, 0x0000}, //#REG_0TC_CCFG_bSmearOutput
+    {0x0F12, 0x0000}, //#REG_0TC_CCFG_sSaturation
+    {0x0F12, 0x0000}, //#REG_0TC_CCFG_sSharpBlur
+    {0x0F12, 0x0000}, //#REG_0TC_CCFG_sColorTemp
+    {0x0F12, 0x0000}, //#REG_0TC_CCFG_uDeviceGammaIndex
+
+    {0x0028, 0xD000},
+    {0x002A, 0x1000},
+    {0x0F12, 0x0001},
+    {0x0028, 0x7000},
+};
+
+const static struct s5k5ca_i2c_reg_conf s5k5ca_init_reg_sensor_start_settings[] =
+{
+    //#ARM GO
+    //#Direct mode
+    {0xFCFC, 0xD000},
+    {0x0010, 0x0001}, //Reset
+    {0x1030, 0x0000}, //Clear host interrupt so main will wait
+    {0x0014, 0x0001}, //ARM go
+    //p100 //delay 100ms
+};
+
+/*modify the register settings of effect aqua*/
+struct s5k5ca_i2c_reg_conf s5k5ca_effect_off_reg_config_settings[] =
+{
+    {0x0028, 0x7000},
+    {0x002A, 0x021E},
+    {0x0F12, 0x0000}, // #REG_TC_GP_SpecialEffects
+    {0x002A, 0x04D2},
+    {0x0F12, 0x067F},
+};
+struct s5k5ca_i2c_reg_conf s5k5ca_effect_mono_reg_config_settings[] =
+{
+    {0x0028, 0x7000},
+    {0x002A, 0x021E},
+    {0x0F12, 0x0001}, // #REG_TC_GP_SpecialEffects
+    {0x002A, 0x04D2},
+    {0x0F12, 0x067F},
+};
+
+struct s5k5ca_i2c_reg_conf s5k5ca_effect_negative_reg_config_settings[] =
+{
+    {0x0028, 0x7000},
+    {0x002A, 0x021E},
+    {0x0F12, 0x0003}, // #REG_TC_GP_SpecialEffects
+    {0x002A, 0x04D2},
+    {0x0F12, 0x067F},
+};
+struct s5k5ca_i2c_reg_conf s5k5ca_effect_solarize_reg_config_settings[] =
+{
+    {0x0028, 0x7000},
+    {0x002A, 0x021E},
+    {0x0F12, 0x0002}, // #REG_TC_GP_SpecialEffects
+};
+
+struct s5k5ca_i2c_reg_conf s5k5ca_effect_posterize_reg_config_settings[] =
+{
+    {0x0028, 0x7000},
+    {0x002A, 0x021E},
+    {0x0F12, 0x0006}, // #REG_TC_GP_SpecialEffects
+};
+
+struct s5k5ca_i2c_reg_conf s5k5ca_effect_sepia_reg_config_settings[] =
+{
+    {0x0028, 0x7000},
+    {0x002A, 0x021E},
+    {0x0F12, 0x0004}, // #REG_TC_GP_SpecialEffects
+    {0x002A, 0x04D2},
+    {0x0F12, 0x067F},
+};
+struct s5k5ca_i2c_reg_conf s5k5ca_effect_aqua_reg_config_settings[] =
+{
+    {0x0028, 0x7000},
+    {0x002A, 0x021E},
+    {0x0F12, 0x0005}, // #REG_TC_GP_SpecialEffects
+
+    {0x002A, 0x04D2},
+    {0x0F12, 0x0677},
+    {0x002A, 0x04a0},
+    {0x0F12, 0x0100}, //R_gain 
+    {0x0F12, 0x0001},
+    {0x0F12, 0x0100},
+    {0x0F12, 0x0001},
+    {0x0F12, 0x0300}, //B_gain
+    {0x0F12, 0x0001},
+};
+/*delete some lines*/
+
+struct s5k5ca_i2c_reg_conf s5k5ca_preview_reg_config_settings[] =
+{
+    //================================================================================================
+    // APPLY PREVIEW CONFIGURATION & RUN PREVIEW
+    //================================================================================================
+    {0x0028, 0x7000},
+    {0x002A, 0x023C},
+    {0x0F12, 0x0000},
+    {0x002A, 0x0240},
+    {0x0F12, 0x0001},
+    {0x002A, 0x0230},
+    {0x0F12, 0x0001},
+    {0x002A, 0x023E},
+    {0x0F12, 0x0001},
+    {0x002A, 0x0220},
+    {0x0F12, 0x0001},
+    {0x0028, 0xD000},
+    {0x002A, 0xB0A0},
+    {0x0F12, 0x0000},
+    {0x0028, 0x7000},
+    {0x002A, 0x0222},
+    {0x0F12, 0x0001},
+};
+
+struct s5k5ca_i2c_reg_conf s5k5ca_snapshot_reg_config_settings[] =
+{
+    {0x0028, 0x7000},
+    {0x002A, 0x0244},
+    {0x0F12, 0x0000}, //REG_TC_GP_ActiveCapConfig
+    {0x002A, 0x0230},
+    {0x0F12, 0x0001}, //REG_TC_GP_NewConfigSync
+    {0x002A, 0x0246},
+    {0x0F12, 0x0001}, //REG_TC_GP_CapConfigChanged
+    {0x002A, 0x0224},
+    {0x0F12, 0x0001}, //REG_TC_GP_EnableCapture       g change
+    {0x0028, 0xD000},
+    {0x002A, 0xB0A0},
+    {0x0F12, 0x0000}, // Clear cont. clock befor confi
+    {0x0028, 0x7000},
+    {0x002A, 0x0226}, //0224
+    {0x0F12, 0x0001}, //REG_TC_GP_EnableCaptureChanged
+};
+
+struct s5k5ca_i2c_reg_conf s5k5ca_wb_auto_reg_config_settings[] =
+{
+    {0x0028, 0x7000},
+    {0x002A, 0x04D2},
+    {0x0F12, 0x067F}, // #REG_TC_DBG_AutoAlgEnBits
+};
+
+struct s5k5ca_i2c_reg_conf s5k5ca_wb_a_reg_config_settings[] =
+{
+    {0x002A, 0x04D2},
+    {0x0F12, 0x0677}, // #REG_TC_DBG_AutoAlgEnBits
+    {0x002A, 0x04A0},
+    {0x0F12, 0x0420}, // #REG_SF_USER_Rgain
+    {0x0F12, 0x0001}, // #REG_SF_USER_RgainChanged
+    {0x002A, 0x04A4},
+    {0x0F12, 0x0400}, // #REG_SF_USER_Ggain
+    {0x0F12, 0x0001}, // #REG_SF_USER_GgainChanged
+    {0x002A, 0x04A8},
+    {0x0F12, 0x0880}, // #REG_SF_USER_Bgain
+    {0x0F12, 0x0001}, // #REG_SF_USER_BgainChanged
+};
+
+struct s5k5ca_i2c_reg_conf s5k5ca_wb_tl84_reg_config_settings[] =
+{
+    {0x002A, 0x04D2},
+    {0x0F12, 0x0677}, // #REG_TC_DBG_AutoAlgEnBits
+    {0x002A, 0x04A0},
+    {0x0F12, 0x0480}, // #REG_SF_USER_Rgain
+    {0x0F12, 0x0001}, // #REG_SF_USER_RgainChanged
+    {0x002A, 0x04A4},
+    {0x0F12, 0x0400}, // #REG_SF_USER_Ggain
+    {0x0F12, 0x0001}, // #REG_SF_USER_GgainChanged
+    {0x002A, 0x04A8},
+    {0x0F12, 0x07C0}, // #REG_SF_USER_Bgain
+    {0x0F12, 0x0001}, // #REG_SF_USER_BgainChanged
+};
+
+struct s5k5ca_i2c_reg_conf s5k5ca_wb_f_reg_config_settings[] =
+{
+    {0x002A, 0x04D2},
+    {0x0F12, 0x0677}, // #REG_TC_DBG_AutoAlgEnBits
+    {0x002A, 0x04A0},
+    {0x0F12, 0x054C}, // #REG_SF_USER_Rgain
+    {0x0F12, 0x0001}, // #REG_SF_USER_RgainChanged
+    {0x002A, 0x04A4},
+    {0x0F12, 0x0400}, // #REG_SF_USER_Ggain
+    {0x0F12, 0x0001}, // #REG_SF_USER_GgainChanged
+    {0x002A, 0x04A8},
+    {0x0F12, 0x085A}, // #REG_SF_USER_Bgain
+    {0x0F12, 0x0001}, // #REG_SF_USER_BgainChanged
+};
+
+struct s5k5ca_i2c_reg_conf s5k5ca_wb_d65_reg_config_settings[] =
+{
+    {0x002A, 0x04D2},
+    {0x0F12, 0x0677}, // #REG_TC_DBG_AutoAlgEnBits
+    {0x002A, 0x04A0},
+    {0x0F12, 0x0584}, // #REG_SF_USER_Rgain
+    {0x0F12, 0x0001}, // #REG_SF_USER_RgainChanged
+    {0x002A, 0x04A4},
+    {0x0F12, 0x0400}, // #REG_SF_USER_Ggain
+    {0x0F12, 0x0001}, // #REG_SF_USER_GgainChanged
+    {0x002A, 0x04A8},
+    {0x0F12, 0x060A}, // #REG_SF_USER_Bgain
+    {0x0F12, 0x0001}, // #REG_SF_USER_BgainChanged
+};
+
+struct s5k5ca_i2c_reg_conf s5k5ca_wb_d50_reg_config_settings[] =
+{
+    {0x002A, 0x04D2},
+    {0x0F12, 0x0677}, // #REG_TC_DBG_AutoAlgEnBits
+    {0x002A, 0x04A0},
+    {0x0F12, 0x0631}, // #REG_SF_USER_Rgain
+    {0x0F12, 0x0001}, // #REG_SF_USER_RgainChanged
+    {0x002A, 0x04A4},
+    {0x0F12, 0x0400}, // #REG_SF_USER_Ggain
+    {0x0F12, 0x0001}, // #REG_SF_USER_GgainChanged
+    {0x002A, 0x04A8},
+    {0x0F12, 0x04E6}, // #REG_SF_USER_Bgain
+    {0x0F12, 0x0001}, // #REG_SF_USER_BgainChanged
+};
+
+struct s5k5ca_i2c_reg_conf s5k5ca_antibanding_off_reg_config_settings[] =
+{
+    {0x0028, 0x7000},
+    {0x002A, 0x04BA},
+    {0x0F12, 0x0000}, // #REG_SF_USER_FlickerQuant
+};
+
+struct s5k5ca_i2c_reg_conf s5k5ca_antibanding_auto_reg_config_settings[] =
+{
+    {0x0028, 0x7000},
+    {0x002A, 0x0C18}, //#AFC_Default60Hz
+    {0x0F12, 0x0001}, // #AFC_Default60Hz  1: Auto Flicker 60Hz start 0: Auto Flicker 50Hz start
+    {0x002A, 0x04D2}, // #REG_TC_DBG_AutoAlgEnBits
+    {0x0F12, 0x067F},
+};
+
+struct s5k5ca_i2c_reg_conf s5k5ca_antibanding_50hz_reg_config_settings[] =
+{
+    {0x0028, 0x7000},
+    {0x002A, 0x04BA},
+    {0x0F12, 0x0001}, // #REG_SF_USER_FlickerQuant
+};
+
+struct s5k5ca_i2c_reg_conf s5k5ca_antibanding_60hz_reg_config_settings[] =
+{
+    {0x0028, 0x7000},
+    {0x002A, 0x04BA},
+    {0x0F12, 0x0002}, // #REG_SF_USER_FlickerQuant
+};
+struct s5k5ca_i2c_reg_conf s5k5ca_mirror_mode_reg_config_setting[] =
+{
+    {0x0028, 0x7000},
+    {0x002A, 0x0296}, //configure0
+    {0x0F12, 0x0003}, //#REG_0TC_PCFG_uPrevMirror  0x0003
+    {0x0F12, 0x0003}, //#REG_0TC_PCFG_uCaptureMirror  0x0003
+    {0x002A, 0x023E}, //REG_TC_GP_PrevConfigChanged
+    {0x0F12, 0x0001}, 
+    {0x002A, 0x0246}, //REG_TC_GP_CapConfigChanged
+    {0x0F12, 0x0001},
+    
+};
+struct s5k5ca_reg s5k5ca_regs =
+{
+    .s5k5ca_init_reg_config_sunny             = s5k5ca_init_reg_config_sunny_settings,
+    .s5k5ca_init_reg_config_sunny_size        = S5K5CA_ARRAY_SIZE_2(s5k5ca_init_reg_config_sunny_settings),
+    .s5k5ca_init_reg_config_sunny_2           = s5k5ca_init_reg_config_sunny_settings_2,
+    .s5k5ca_init_reg_config_sunny_2_size      = S5K5CA_ARRAY_SIZE_2(s5k5ca_init_reg_config_sunny_settings_2),
+    .s5k5ca_init_reg_sensor_start             = s5k5ca_init_reg_sensor_start_settings,
+    .s5k5ca_init_reg_sensor_start_size        = S5K5CA_ARRAY_SIZE_2(s5k5ca_init_reg_sensor_start_settings),
+    .s5k5ca_effect_off_reg_config             = s5k5ca_effect_off_reg_config_settings,
+    .s5k5ca_effect_off_reg_config_size        = S5K5CA_ARRAY_SIZE_2(s5k5ca_effect_off_reg_config_settings),
+    .s5k5ca_effect_mono_reg_config            = s5k5ca_effect_mono_reg_config_settings,
+    .s5k5ca_effect_mono_reg_config_size       = S5K5CA_ARRAY_SIZE_2(s5k5ca_effect_mono_reg_config_settings),
+    .s5k5ca_effect_negative_reg_config        = s5k5ca_effect_negative_reg_config_settings,
+    .s5k5ca_effect_negative_reg_config_size   = S5K5CA_ARRAY_SIZE_2(s5k5ca_effect_negative_reg_config_settings),
+    .s5k5ca_effect_sepia_reg_config           = s5k5ca_effect_sepia_reg_config_settings,
+    .s5k5ca_effect_sepia_reg_config_size      = S5K5CA_ARRAY_SIZE_2(s5k5ca_effect_sepia_reg_config_settings),
+    .s5k5ca_effect_aqua_reg_config            = s5k5ca_effect_aqua_reg_config_settings,
+    .s5k5ca_effect_aqua_reg_config_size       = S5K5CA_ARRAY_SIZE_2(s5k5ca_effect_aqua_reg_config_settings),
+    .s5k5ca_effect_solarize_reg_config      = s5k5ca_effect_solarize_reg_config_settings,
+    .s5k5ca_effect_solarize_reg_config_size = S5K5CA_ARRAY_SIZE_2(s5k5ca_effect_solarize_reg_config_settings),
+    .s5k5ca_effect_posterize_reg_config      = s5k5ca_effect_posterize_reg_config_settings,
+    .s5k5ca_effect_posterize_reg_config_size = S5K5CA_ARRAY_SIZE_2(s5k5ca_effect_posterize_reg_config_settings),
+    .s5k5ca_preview_reg_config                = s5k5ca_preview_reg_config_settings,
+    .s5k5ca_preview_reg_config_size           = S5K5CA_ARRAY_SIZE_2(s5k5ca_preview_reg_config_settings),
+    .s5k5ca_snapshot_reg_config               = s5k5ca_snapshot_reg_config_settings,
+    .s5k5ca_snapshot_reg_config_size          = S5K5CA_ARRAY_SIZE_2(s5k5ca_snapshot_reg_config_settings),
+    .s5k5ca_wb_auto_reg_config                = s5k5ca_wb_auto_reg_config_settings,
+    .s5k5ca_wb_auto_reg_config_size           = S5K5CA_ARRAY_SIZE_2(s5k5ca_wb_auto_reg_config_settings),
+    .s5k5ca_wb_a_reg_config                   = s5k5ca_wb_a_reg_config_settings,
+    .s5k5ca_wb_a_reg_config_size              = S5K5CA_ARRAY_SIZE_2(s5k5ca_wb_a_reg_config_settings),
+    .s5k5ca_wb_tl84_reg_config                = s5k5ca_wb_tl84_reg_config_settings,
+    .s5k5ca_wb_tl84_reg_config_size           = S5K5CA_ARRAY_SIZE_2(s5k5ca_wb_tl84_reg_config_settings),
+    .s5k5ca_wb_f_reg_config                   = s5k5ca_wb_f_reg_config_settings,
+    .s5k5ca_wb_f_reg_config_size              = S5K5CA_ARRAY_SIZE_2(s5k5ca_wb_f_reg_config_settings),
+    .s5k5ca_wb_d65_reg_config                 = s5k5ca_wb_d65_reg_config_settings,
+    .s5k5ca_wb_d65_reg_config_size            = S5K5CA_ARRAY_SIZE_2(s5k5ca_wb_d65_reg_config_settings),
+    .s5k5ca_wb_d50_reg_config                 = s5k5ca_wb_d50_reg_config_settings,
+    .s5k5ca_wb_d50_reg_config_size            = S5K5CA_ARRAY_SIZE_2(s5k5ca_wb_d50_reg_config_settings),
+    .s5k5ca_mirror_mode_reg_config                 = s5k5ca_mirror_mode_reg_config_setting,
+    .s5k5ca_mirror_mode_reg_config_size            = S5K5CA_ARRAY_SIZE_2(s5k5ca_mirror_mode_reg_config_setting),
+    /*delete some lines*/
+};
+
diff -uNra linux-3.0.82/drivers/media/video/soc_camera.c linux-3.0.82x/drivers/media/video/soc_camera.c
--- linux-3.0.82/drivers/media/video/soc_camera.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/soc_camera.c	2017-09-23 03:42:49.614676298 +0800
@@ -266,7 +266,7 @@
 		if (ret < 0)
 			return ret;
 
-		ret = ici->ops->reqbufs(icd, p);
+		ret = ici->ops->reqbufs(icd, p);  //dbg-yg ???
 	} else {
 		ret = vb2_reqbufs(&icd->vb2_vidq, p);
 	}
@@ -333,16 +333,16 @@
 	unsigned int i, fmts = 0, raw_fmts = 0;
 	int ret;
 	enum v4l2_mbus_pixelcode code;
-
 	while (!v4l2_subdev_call(sd, video, enum_mbus_fmt, raw_fmts, &code))
 		raw_fmts++;
 
-	if (!ici->ops->get_formats)
+	if (!ici->ops->get_formats) {
 		/*
 		 * Fallback mode - the host will have to serve all
 		 * sensor-provided formats one-to-one to the user
 		 */
 		fmts = raw_fmts;
+	}
 	else
 		/*
 		 * First pass - only count formats this host-sensor
@@ -364,7 +364,7 @@
 		return -ENOMEM;
 
 	dev_dbg(&icd->dev, "Found %d supported formats.\n", fmts);
-
+	
 	/* Second pass - actually fill data formats */
 	fmts = 0;
 	for (i = 0; i < raw_fmts; i++)
@@ -389,6 +389,7 @@
 
 egfmt:
 	vfree(icd->user_formats);
+
 	return ret;
 }
 
@@ -430,7 +431,6 @@
 			"Host driver hasn't set up current format correctly!\n");
 		return -EINVAL;
 	}
-
 	icd->user_width		= pix->width;
 	icd->user_height	= pix->height;
 	icd->bytesperline	= pix->bytesperline;
@@ -484,7 +484,6 @@
 					icd->current_fmt->host_fmt->fourcc,
 			},
 		};
-
 		ret = soc_camera_power_set(icd, icl, 1);
 		if (ret < 0)
 			goto epower;
@@ -513,7 +512,7 @@
 		ret = soc_camera_set_fmt(icd, &f);
 		if (ret < 0)
 			goto esfmt;
-
+		
 		if (ici->ops->init_videobuf) {
 			ici->ops->init_videobuf(&icd->vb_vidq, icd);
 		} else {
@@ -655,7 +654,6 @@
 {
 	struct soc_camera_device *icd = file->private_data;
 	int ret;
-
 	WARN_ON(priv != file->private_data);
 
 	if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) {
@@ -703,7 +701,6 @@
 {
 	struct soc_camera_device *icd = file->private_data;
 	struct v4l2_pix_format *pix = &f->fmt.pix;
-
 	WARN_ON(priv != file->private_data);
 
 	if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
@@ -718,6 +715,7 @@
 	pix->colorspace		= icd->colorspace;
 	dev_dbg(&icd->dev, "current_fmt->fourcc: 0x%08x\n",
 		icd->current_fmt->host_fmt->fourcc);
+
 	return 0;
 }
 
@@ -1009,7 +1007,6 @@
 	struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
 	struct i2c_adapter *adap = i2c_get_adapter(icl->i2c_adapter_id);
 	struct v4l2_subdev *subdev;
-
 	if (!adap) {
 		dev_err(&icd->dev, "Cannot get I2C adapter #%d. No driver?\n",
 			icl->i2c_adapter_id);
@@ -1020,6 +1017,7 @@
 
 	subdev = v4l2_i2c_new_subdev_board(&ici->v4l2_dev, adap,
 				icl->board_info, NULL);
+
 	if (!subdev)
 		goto ei2cnd;
 
@@ -1062,9 +1060,8 @@
 	struct v4l2_subdev *sd;
 	struct v4l2_mbus_framefmt mf;
 	int ret;
-
 	dev_info(dev, "Probing %s\n", dev_name(dev));
-
+	
 	ret = regulator_bulk_get(icd->pdev, icl->num_regulators,
 				 icl->regulators);
 	if (ret < 0)
@@ -1073,7 +1070,6 @@
 	ret = soc_camera_power_set(icd, icl, 1);
 	if (ret < 0)
 		goto epower;
-
 	/* The camera could have been already on, try to reset */
 	if (icl->reset)
 		icl->reset(icd->pdev);
@@ -1117,12 +1113,11 @@
 
 	sd = soc_camera_to_subdev(icd);
 	sd->grp_id = (long)icd;
-
 	/* At this point client .probe() should have run already */
 	ret = soc_camera_init_user_formats(icd);
-	if (ret < 0)
+	if (ret < 0) {
 		goto eiufmt;
-
+	}
 	icd->field = V4L2_FIELD_ANY;
 
 	icd->vdev->lock = &icd->video_lock;
@@ -1135,9 +1130,9 @@
 	mutex_lock(&icd->video_lock);
 
 	ret = soc_camera_video_start(icd);
-	if (ret < 0)
+	if (ret < 0) {
 		goto evidstart;
-
+	}
 	/* Try to improve our guess of a reasonable window format */
 	if (!v4l2_subdev_call(sd, video, g_mbus_fmt, &mf)) {
 		icd->user_width		= mf.width;
@@ -1152,7 +1147,6 @@
 		dev_warn(&icd->dev, "Failed creating the control symlink\n");
 
 	ici->ops->remove(icd);
-
 	soc_camera_power_set(icd, icl, 0);
 
 	mutex_unlock(&icd->video_lock);
@@ -1342,7 +1336,6 @@
 	    !ici->ops->poll ||
 	    !ici->v4l2_dev.dev)
 		return -EINVAL;
-
 	if (!ici->ops->set_crop)
 		ici->ops->set_crop = default_s_crop;
 	if (!ici->ops->get_crop)
@@ -1494,7 +1487,6 @@
 		return -ENOMEM;
 
 	strlcpy(vdev->name, ici->drv_name, sizeof(vdev->name));
-
 	vdev->parent		= &icd->dev;
 	vdev->current_norm	= V4L2_STD_UNKNOWN;
 	vdev->fops		= &soc_camera_fops;
@@ -1520,8 +1512,9 @@
 
 	if (!icd->ops ||
 	    !icd->ops->query_bus_param ||
-	    !icd->ops->set_bus_param)
+	    !icd->ops->set_bus_param) {
 		return -EINVAL;
+	}
 
 	ret = video_register_device(icd->vdev, VFL_TYPE_GRABBER, -1);
 	if (ret < 0) {
@@ -1540,7 +1533,6 @@
 	struct soc_camera_link *icl = pdev->dev.platform_data;
 	struct soc_camera_device *icd;
 	int ret;
-
 	if (!icl)
 		return -EINVAL;
 
diff -uNra linux-3.0.82/drivers/media/video/uvc/gc0303/hv7131.c linux-3.0.82x/drivers/media/video/uvc/gc0303/hv7131.c
--- linux-3.0.82/drivers/media/video/uvc/gc0303/hv7131.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/uvc/gc0303/hv7131.c	2017-09-23 03:42:49.618676286 +0800
@@ -0,0 +1,603 @@
+/*
+ * HV7131 CMOS camera sensor initialization
+ */
+
+/*
+#include "camera.h"
+#include "jz4740.h"
+#include "clock.h"
+#include "i2c.h"
+*/
+
+#include <media/v4l2-common.h>
+#include <media/v4l2-ioctl.h>
+
+#include "../uvcvideo.h"
+
+#include "stub.h"
+
+#include "sb2f_i2c.h"
+
+/* error code */
+#define ETIMEDOUT       1
+#define ENODEV          2
+
+/*
+ * hv7131 registers
+ */
+#define DEVID    0x00 /* Dev ID */
+#define SCTRA    0x01 /* Sensor Control A */
+#define SCTRB    0x02 /* Sensor Control B */
+#define OUTIV    0x03 /* Output Inversion */
+
+#define RSAU     0x10 /* Row Start Address Upper */
+#define RSAL     0x11 /* Row Start Address Lower */
+#define CSAU     0x12 /* Col Start Address Upper */
+#define CSAL     0x13 /* Col Start Address Lower */
+#define WIHU     0x14 /* Window Height Upper */
+#define WIHL     0x15 /* Window Height Lower */
+#define WIWU     0x16 /* Window Width Upper */
+#define WIWL     0x17 /* Window Width Lower */
+
+#define HBLU     0x20 /* HBLANK Time Upper */
+#define HBLL     0x21 /* HBLANK Time Lower */
+#define VBLU     0x22 /* VBLANK Time Upper */
+#define VBLL     0x23 /* VBLANK Time Lower */
+#define INTH     0x25 /* Integration Time High */
+#define INTM     0x26 /* Integration Time Middle */
+#define INTL     0x27 /* Integration Time Low */
+
+#define PAG      0x30 /* Pre-amp Gain */
+#define RCG      0x31 /* Red Color Gain */
+#define GCG      0x32 /* Green Color Gain */
+#define BCG      0x33 /* Blue Color Gain */
+#define ACTRA    0x34 /* Analog Bias Control A */
+#define ACTRB    0x35 /* Analog Bias Control B */
+
+#define BLCTH    0x40 /* Black Level Threshod */
+#define ORedI    0x41 /* Initial ADC Offset Red */
+#define OGrnI    0x42 /* Initial ADC Offset Green */
+#define OBluI    0x43 /* Initial ADC Offset Blue */
+
+
+/*
+ * Define the starting (x, y)
+ */
+/* cam2 */
+#define XSTART 0x02
+#define YSTART 0x02
+
+#define VAL_INT_TIME_GC303  0x0050
+#define VAL_INT_TIME  35
+#define VAL_PAG       0x30
+#define VAL_DIV       16	//16		//360Mhz
+/* cam2 */
+
+/* integration time */
+//static unsigned int integration_time = 35; /* unit: ms */
+static unsigned int integration_time = VAL_INT_TIME; /* unit: ms */
+static unsigned int integration_time_GC303 = VAL_INT_TIME_GC303; /* unit: ms */
+static int m_sensor_opt = 0;
+
+/* master clock and video clock */
+static unsigned int mclk_hz = 25000000;    /* 25 MHz */
+static unsigned int vclk_div = VAL_DIV;          /* VCLK = MCLK/vclk_div: 2,4,8,16,32 */
+static int i2c_ok = 0;
+int DEV_ADDR = 0x22>>1;
+
+int GC0303_NoCoat=FALSE;
+
+void i2c_set_addr(unsigned int addr)
+{
+	DEV_ADDR=addr>>1;
+	//DEV_ADDR=addr;
+}
+
+int sensor_write_reg(unsigned char reg, unsigned char val)
+{
+	if(-ENODEV == i2c_write(DEV_ADDR, &val, reg, 1)) 
+	{
+    	//	OSTaskDel(OS_PRIO_SELF);
+		i2c_ok = -1;
+		return -ENODEV;
+  	}
+	return 0;
+}
+
+unsigned char sensor_read_reg(unsigned char reg)
+{
+ 	unsigned char val;
+  	if(-ENODEV==i2c_read(DEV_ADDR, &val, reg, 1))
+	{
+		i2c_ok=-1;
+		return -ENODEV;
+	}
+  	return val;
+}
+
+//303/305 support
+#define GC_BIAS		0x9C
+#define GC_TEST		0x9D
+#define GC_MCRT		0x9E
+#define GC_FRAME	0x9F
+#define GC_EXP_H        0x83
+#define GC_EXP_L        0x84
+
+#define GC_ROW_H        0x92
+#define GC_ROW_L        0x93
+#define GC_COL_H        0x94
+#define GC_COL_L        0x95
+#define GC_WINH_H       0x96
+#define GC_WINH_L       0x97
+#define GC_WINW_H       0x98
+#define GC_WINW_L       0x99
+#define GC_VSYNC	0xA0
+
+static void set_window_GC303(int l, int t, int w, int h)
+{
+	int ltemp=0;
+	if(GC0303_NoCoat)
+	{
+		ltemp = 640 - w - l;
+                l=(ltemp>=0?ltemp:(640-w))/2*2; //nocoatting sensor have a manual correcting param,that is 36
+                t=(480 - h - t)/2*2;
+                if(t<0)
+                        t=0;
+	}
+	else
+	{
+		l=(640 - w - l)/2*2;
+        	t=(480 - h - t)/2*2;
+	}
+        /* Set the row start address */
+        sensor_write_reg(GC_ROW_H, (t >> 8) & 0xff);
+        sensor_write_reg(GC_ROW_L, t & 0xff);
+
+        /* Set the column start address */
+        sensor_write_reg(GC_COL_H, (l >> 8) & 0xff);
+        sensor_write_reg(GC_COL_L, l & 0xff);
+
+        /* Set the image window width*/
+        sensor_write_reg(GC_WINW_H, (w >> 8) & 0xff);
+        sensor_write_reg(GC_WINW_L, w & 0xff);
+
+        /* Set the image window height*/
+        sensor_write_reg(GC_WINH_H, (h >> 8) & 0xff);
+        sensor_write_reg(GC_WINH_L, h & 0xff);
+}
+
+void set_BLANK_GC303(int d3,int d4)
+{
+        sensor_write_reg(0x85, d3);
+        sensor_write_reg(0x9a, d4);
+//        val = sensor_read_reg(0x9a);
+//        printk("0x9a:%x\n",val);
+}
+
+void set_BRGB_GC303(int d1,int d2,int d3,int d4)
+{
+        sensor_write_reg(0x86, d1);
+        sensor_write_reg(0x87, d2);
+        sensor_write_reg(0x88, d3);
+        sensor_write_reg(0x89, d4);
+}
+
+void set_PRGB_GC303(int d1,int d2,int d3,int d4,int d5)
+{
+//        unsigned char val;
+
+        sensor_write_reg(0x8a, d1/256);
+        sensor_write_reg(0x8b, d1%256);
+        sensor_write_reg(0x8c, d2/256);
+        sensor_write_reg(0x8d, d2%256);
+        sensor_write_reg(0x8e, d3/256);
+        sensor_write_reg(0x8f, d3%256);
+        sensor_write_reg(0x90, d4/256);
+        sensor_write_reg(0x91, d4%256);
+
+//        val = sensor_read_reg(0x9c);
+//        printk("0x9c:%x\n",val);
+}
+
+void set_integration_time_GC303(void)
+{
+	if(GC0303_NoCoat)
+	{
+        	sensor_write_reg(GC_EXP_H, 0x00);
+        	sensor_write_reg(GC_EXP_L, 0xe0);
+	}
+	else
+	{
+        	sensor_write_reg(GC_EXP_H, (integration_time_GC303>>8)&0xff);
+        	sensor_write_reg(GC_EXP_L, integration_time_GC303&0xff);
+	}
+}
+
+void sensor_power_down_GC303(void)
+{
+        sensor_write_reg(0x9b, 0x24);
+}
+
+void sensor_power_on_GC303(void)
+{
+        sensor_write_reg(0x9b, 0x20);
+}
+
+static void set_gc303_clock(int div)
+{
+#define ABLC_EN (1 << 3)
+        /* ABLC enable */
+        switch (div) {
+        case 2:
+                sensor_write_reg(GC_MCRT, ABLC_EN | 0x0);       // DCF=MCLK
+                break;
+        case 4:
+                sensor_write_reg(GC_MCRT, ABLC_EN | 0x1);       // DCF=MCLK/2
+                break;
+        case 8:
+                sensor_write_reg(GC_MCRT, ABLC_EN | 0x2);       // DCF=MCLK/4
+                break;
+        case 16:
+                sensor_write_reg(GC_MCRT, ABLC_EN | 0x3);       // DCF=MCLK/8
+                break;
+        default:
+                break;
+        }
+}
+
+static int sensor_init_GC303(int left, int top, int width, int height)
+{
+        unsigned char timeout=5;
+	unsigned char val;
+
+try_again:
+        i2c_ok = 0;
+
+        sensor_write_reg(GC_BIAS, 0x17);
+        sensor_write_reg(GC_TEST, 0x80);  
+        sensor_write_reg(GC_FRAME, 0x89/*0x49*/); /* upside down, output pclk all the time, pclk inversion */
+        sensor_write_reg(GC_VSYNC, 0x00);
+
+        /* set clock */
+        set_gc303_clock(vclk_div);
+
+        set_BLANK_GC303(0x00,2);
+
+        set_BRGB_GC303(0,0,0,0);
+	if(GC0303_NoCoat)
+        	set_PRGB_GC303(0x0230,0x0350,0x0350,0x0230,0x25);
+	else
+        	set_PRGB_GC303(0x180,0x180,0x180,0x130,0x25);
+	
+        set_window_GC303(left, top, width, height);
+	set_integration_time_GC303();
+
+        sensor_power_on_GC303();
+	val = sensor_read_reg(GC_MCRT);
+	//printk("read gc clock reg:%x\n",val);
+	if( (val&0x3) != 0x3)
+	{
+		uvc_printk(KERN_ERR,"gc303 set clock failed ......\n");
+		i2c_ok = -1;
+	}
+
+	val = sensor_read_reg(GC_FRAME);
+        printk("read gc frame reg:%x\n",val);
+
+        if( val!= 0x89)
+        {
+                printk("gc303 set frame failed ......\n");
+                i2c_ok = -1;
+        }
+
+        if(i2c_ok==0)
+        {
+                printk("Initialized sensor GC303 register OK\n");
+                return 0;
+        }
+        else
+        {
+                if(timeout--)
+                        goto try_again;
+                else
+                {
+                        printk("Initialize sensor GC303 register ERROR!\n");
+                        return -1;
+                }
+        }
+
+}
+
+//303/305 end
+
+void sensor_power_down(void)
+{
+        unsigned char val;
+
+	i2c_set_addr(0x22);
+        val = sensor_read_reg(SCTRB);
+        val |= 0x08;
+        sensor_write_reg(SCTRB, val);
+}
+
+void sensor_power_on(void)
+{
+        unsigned char val;
+
+	i2c_set_addr(0x22);
+        val = sensor_read_reg(SCTRB);
+        val &= ~0x08;
+        sensor_write_reg(SCTRB, val);
+}
+
+/* left, top, width, height */
+static void set_window(int l, int t, int w, int h)
+{
+	l = (l/2)*2;
+	t = (t/2)*2;
+
+	/* Set the column start address */
+	sensor_write_reg(CSAU, (l >> 8) & 0xff);
+	sensor_write_reg(CSAL, l & 0xff);
+
+
+	/* Set the row start address */
+	sensor_write_reg(RSAU, (t >> 8) & 0xff);
+	sensor_write_reg(RSAL, t & 0xff);
+
+	/* Set the image window width*/
+	sensor_write_reg(WIWU, (w >> 8) & 0xff);
+	sensor_write_reg(WIWL, w & 0xff);
+
+	/* Set the image window height*/
+	sensor_write_reg(WIHU, (h >> 8) & 0xff);
+	sensor_write_reg(WIHL, h & 0xff);
+}
+
+static void set_blanking_time(unsigned short hb_time, unsigned short vb_time)
+{
+	hb_time = (hb_time < 0xd0)? 0xd0 : hb_time;
+	vb_time = (vb_time < 0x08)? 0x08 : vb_time;
+
+	sensor_write_reg(HBLU, (hb_time >> 8) & 0xff);
+	sensor_write_reg(HBLL, hb_time & 0xff);
+	sensor_write_reg(VBLU, (vb_time >> 8) & 0xff);
+	sensor_write_reg(VBLL, vb_time & 0xff);
+}
+
+static void set_integration_time(void)
+{
+        unsigned int regval;
+
+	if (vclk_div == 0) vclk_div = 2;
+
+	regval = (integration_time * mclk_hz)/ (1000*vclk_div); /* default: 0x065b9a */
+
+	sensor_write_reg(INTH, (regval & 0xff0000) >> 16);
+	sensor_write_reg(INTM, (regval & 0xff00) >> 8);
+	sensor_write_reg(INTL, regval & 0xff);
+}
+
+/* VCLK = MCLK/div */
+static void set_hv7131_clock(int div)
+{
+#define ABLC_EN (1 << 3)
+	/* ABLC enable */
+	switch (div) {
+	case 2:
+		sensor_write_reg(SCTRA, ABLC_EN | 0x01);       // DCF=MCLK
+		break;
+	case 4:
+		sensor_write_reg(SCTRA, ABLC_EN | 0x11);       // DCF=MCLK/2
+		break;
+	case 8:
+		sensor_write_reg(SCTRA, ABLC_EN | 0x21);       // DCF=MCLK/4
+		break;
+	case 16:
+		sensor_write_reg(SCTRA, ABLC_EN | 0x31);       // DCF=MCLK/8
+		break;
+	case 32:
+		sensor_write_reg(SCTRA, ABLC_EN | 0x41);       // DCF=MCLK/16
+		break;
+	case 64:
+		sensor_write_reg(SCTRA, ABLC_EN | 0x51);       // DCF=MCLK/32
+		break;
+	default:
+		break;
+	}
+}
+
+static int CMOSGain=0x30;
+
+int sensor_init_HV7131(int left, int top, int width, int height, int FPReaderOpt)
+{
+	unsigned char timeout=5;
+
+try_again:
+	i2c_ok = 0;
+/*	sensor_power_down();
+	mdelay(200); */
+	set_hv7131_clock(vclk_div);
+
+//	sensor_write_reg(SCTRB, 0x15);       // VsHsEn, HSYNC mode
+	sensor_write_reg(SCTRB, 0x11);      // VsHsEn, HSYNC mode
+        sensor_write_reg(OUTIV, 0x00); /*modified, Wolfwang */
+
+	set_window(left, top, width, height);
+	set_integration_time();
+	set_blanking_time(0xff, 0x08); // ZK value
+
+	if(FPReaderOpt&0x01)
+        {
+                CMOSGain=0x90;
+                sensor_write_reg(PAG, CMOSGain);
+        }
+        else
+        {
+                CMOSGain=0x30;
+                sensor_write_reg(PAG, CMOSGain);
+        }
+
+        sensor_write_reg(RCG, 0x08);
+        sensor_write_reg(GCG, 0x08);
+        sensor_write_reg(BCG, 0x08);
+
+        sensor_write_reg(ACTRA, 0x17);
+        sensor_write_reg(ACTRB, 0x7f);
+
+	sensor_write_reg(BLCTH, 0xff);       // set black level threshold
+
+        sensor_write_reg(ORedI, 0x7f);
+        sensor_write_reg(OGrnI, 0x7f);
+        sensor_write_reg(OBluI, 0x7f);
+
+	sensor_power_on();
+	if(i2c_ok==0)
+	{
+		printk("Initialized sensor hv7131 register OK\n");
+		return 0;
+	}
+	else
+	{
+		if(timeout--)
+			goto try_again;
+		else
+		{	
+			printk("Initialize sensor hv7131 register ERROR!\n");
+			return -1;
+		}
+	}
+}
+
+
+int sensor_init(int left, int top, int width, int height, int FPReaderOpt)
+{
+        int ret = 0;
+
+        i2c_init();
+
+        m_sensor_opt = FPReaderOpt;
+        i2c_set_addr(0x30);
+        ret = sensor_read_reg(0x80);
+	printk("Device ID from CMOS GC0303: %2x\n",ret);
+        if(ret == 0x11)
+        {
+        	m_sensor_opt |= 0x20;
+                printk("Found GC303\n");
+                return sensor_init_GC303(left, top ,width, height);
+        }
+        
+        /*
+	else if(ret==0x29)
+	{
+		printk("Found GC305\n");
+		// support GC305 in the furture
+		return -1;
+	}
+
+        i2c_set_addr(0x42);
+        select_page_gc307(0);
+        ret = sensor_read_reg(0x00);
+        printk("Device ID from CMOS GC0307: %2x\n",ret);
+        if(ret == 0x99)
+        {
+                printk("Found GC307\n");
+                return sensor_init_GC307(left, top ,width, height);
+        }
+
+        i2c_set_addr(0x22);
+        ret = sensor_read_reg(0x0);
+	printk("Device ID from CMOS HV7131: %2x\n",ret);
+	if(ret==0x02)
+        {
+                printk("Found HV7131\n");
+                return sensor_init_HV7131(left,top,width,height,FPReaderOpt);
+        }*/
+	else
+	{
+		i2c_set_addr(0x42);
+		sensor_write_reg(0xfe, 0x00);	//lxy
+		ret = sensor_read_reg(0x00);
+		printk("Device ID: 0x00 = %2x\n",ret);
+		ret = sensor_read_reg(0x80);
+		printk("Device ID: 0x80 = %2x\n",ret);
+		if(ret == 0x9b)
+		{
+		        printk("Found GC307\n");
+		        return ;
+		}
+		
+		
+		printk("No CMOS!!!\n");
+		return -1;
+	}
+}
+
+void sensor_close(void)
+{
+	if(m_sensor_opt & 0x20)
+        	sensor_power_down_GC303();
+        else
+                sensor_power_down();
+}
+
+int SetCMOSGain(int Gain)
+{
+	if(m_sensor_opt & 0x20)
+		i2c_set_addr(0x30);
+	else
+		i2c_set_addr(0x22);
+        return sensor_write_reg(PAG, Gain);//Pre-amp Gain
+}
+
+int IncCMOSGain(void)
+{
+        if(CMOSGain>4)
+                CMOSGain=(CMOSGain*5+2)/4;
+        else
+                CMOSGain=10;
+        if(CMOSGain>255) CMOSGain=255;
+        return SetCMOSGain(CMOSGain);
+}
+
+int DecCMOSGain(void)
+{
+        CMOSGain=CMOSGain*2/3;
+        if(CMOSGain==0) CMOSGain=1;
+        return SetCMOSGain(CMOSGain);
+}
+
+void FilterRGB(char *PixelsBuffer, int Width, int Height)
+{
+        int i,j;
+        unsigned char p,*p1,*p2,*p3,*p4;
+        p1 = (unsigned char *)PixelsBuffer; p2 = p1+1;
+        p3 = p1+Width; p4 = p3+1;
+        for(i = 0; i<Height-1; i++)
+        {
+                for(j = 0; j<Width-1; j++)
+                {
+                        p=(*p1+*p2+++*p3+++*p4+++2) / 4;
+                        *p1++=p;
+                }
+                p1++; p2++; p3++; p4++;
+        }
+}
+
+int Read24WC02(int Address, unsigned char *data, int size)
+{
+	i2c_set_addr(0xA0);
+	if(-ENODEV==i2c_read(DEV_ADDR, data, Address, size))
+		return 0;
+	else
+		return 1;
+}
+
+int Write24WC02(int Address, unsigned  char *data, int size)
+{
+	i2c_set_addr(0xA0);
+	if(-ENODEV == i2c_write(DEV_ADDR, data, Address, size))
+		return 0;
+	else
+		return 1;
+}
diff -uNra linux-3.0.82/drivers/media/video/uvc/gc0303/hv7131.h linux-3.0.82x/drivers/media/video/uvc/gc0303/hv7131.h
--- linux-3.0.82/drivers/media/video/uvc/gc0303/hv7131.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/uvc/gc0303/hv7131.h	2017-09-23 03:42:49.618676286 +0800
@@ -0,0 +1,14 @@
+
+#ifndef __HV7131_H__
+#define __HV7131_H__
+
+int sensor_init(int left, int top, int width, int height, int FPReaderOpt);
+void sensor_close(void);
+int SetCMOSGain(int Gain);
+int IncCMOSGain(void);
+int DecCMOSGain(void);
+void FilterRGB(char *PixelsBuffer, int Width, int Height);
+int Read24WC02(int Address, unsigned char *data, int size);
+int Write24WC02(int Address, unsigned  char *data, int size);
+
+#endif
diff -uNra linux-3.0.82/drivers/media/video/uvc/gc0303/i2c-gs2fsb.c linux-3.0.82x/drivers/media/video/uvc/gc0303/i2c-gs2fsb.c
--- linux-3.0.82/drivers/media/video/uvc/gc0303/i2c-gs2fsb.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/uvc/gc0303/i2c-gs2fsb.c	2017-09-23 03:42:49.618676286 +0800
@@ -0,0 +1,295 @@
+
+#include "sb2f_i2c.h"
+//#include "stub.h"
+
+#define i2c_delay()		//udelay(100)
+
+static char i2c_writeb(struct gs2fsb_i2c *i2c, unsigned int reg, unsigned char  data)
+{
+	
+	(*(volatile unsigned char *)(i2c->base + reg)) = data;
+}
+
+static unsigned char i2c_readb (struct gs2fsb_i2c *i2c, unsigned char reg)
+{
+	unsigned char data;
+	
+	data = (*(volatile unsigned char *)(i2c->base + reg));
+
+	return data;
+}
+
+
+static int gs2fsb_xfer_read(struct gs2fsb_i2c *i2c, unsigned char *buf, int len) 
+{
+
+	int x;
+
+	for(x=0; x<len; x++) {
+
+		//i2c_writeb(i2c, REG_I2C_CR, I2C_C_READ);
+//send ACK last not send ACK
+		if(x == (len -1)) 
+			i2c_writeb(i2c, REG_I2C_CR,   I2C_C_READ);	 //the laset
+		else
+			i2c_writeb(i2c, REG_I2C_CR, I2C_C_WACK |I2C_C_READ);
+
+		while(i2c_readb(i2c, REG_I2C_SR) & I2C_S_RUN);
+
+		buf[x] = i2c_readb(i2c,REG_I2C_TXR);
+
+		i2c_delay();
+
+	}
+	
+	i2c_writeb(i2c,REG_I2C_CR, I2C_C_STOP);
+		
+	return len;
+}
+
+static int gs2fsb_xfer_write(struct gs2fsb_i2c *i2c, unsigned char *buf, int len)
+{
+
+	int j;
+
+	for(j=0; j< len; j++) {
+			i2c_writeb(i2c, REG_I2C_TXR, buf[j]);
+			i2c_writeb(i2c, REG_I2C_CR, I2C_C_WRITE);
+			while(i2c_readb(i2c, REG_I2C_SR) & I2C_S_RUN);
+			if(i2c_readb(i2c, REG_I2C_SR) & I2C_S_RNOACK) {
+				i2c_writeb(i2c, REG_I2C_CR, I2C_C_STOP);
+				return len;
+			}
+ 			i2c_delay();
+		}
+
+	i2c_writeb(i2c, REG_I2C_CR, I2C_C_STOP);
+
+	return len;
+
+}
+
+#if 0
+int gs2fsb_xfer(struct gs2fsb_i2c *i2c, struct i2c_msg *pmsg)
+{
+	int i,j, ret, ret0;
+
+
+	char flags;
+
+	//printk("gs2fsb_xfer().\n");
+
+	//printk("pmsg->flags:0x%x, i2c base reg:0x%x.\n", pmsg->flags, i2c->base);
+	
+	while(i2c_readb(i2c, REG_I2C_SR) & I2C_S_BUSY);
+
+	/*set slave addr*/
+	flags = (pmsg->flags & I2C_M_RD)?1:0;
+	i2c_writeb(i2c, REG_I2C_TXR, ((pmsg->addr << 1 ) | flags));
+	i2c_writeb(i2c, REG_I2C_CR, (I2C_C_WRITE | I2C_C_START | I2C_C_WACK));
+	while(i2c_readb(i2c, REG_I2C_SR) & I2C_S_RUN);
+	if (i2c_readb(i2c, REG_I2C_SR) & I2C_S_RNOACK) {
+		printk(" slave addr no ack !!\n");
+		i2c_writeb(i2c, REG_I2C_CR, I2C_C_STOP); 
+		return -1;
+	}
+
+	if (pmsg->sub_addr != -1) {
+		i2c_writeb(i2c, REG_I2C_TXR, (unsigned char)pmsg->sub_addr);
+		while(i2c_readb(i2c, REG_I2C_SR) & I2C_S_RUN);
+		if (i2c_readb(i2c, REG_I2C_SR) & I2C_S_RNOACK) {
+			printk(" sub addr no ack !!\n");
+			i2c_writeb(i2c, REG_I2C_CR, I2C_C_STOP); 
+			return -1;
+		}
+	}
+
+	printk("slave addr: 0x%x have ack. len: %d.\n", pmsg->addr, pmsg->len);
+	
+	if(flags )
+	ret = gs2fsb_xfer_read(i2c, pmsg->buf, pmsg->len);
+	else
+	ret = gs2fsb_xfer_write(i2c, pmsg->buf, pmsg->len);
+
+	return ret;
+}
+#endif
+
+#define TSC2003_CMD(cn,pdn,m) (((cn) << 4) | ((pdn) << 2) | ((m) << 1))
+
+enum tsc2003_pd {
+  PD_POWERDOWN = 0, /* penirq */
+  PD_IREFOFF_ADCON = 1, /* no penirq */
+  PD_IREFON_ADCOFF = 2, /* penirq */
+  PD_IREFON_ADCON = 3, /* no penirq */
+  PD_PENIRQ_ARM = PD_IREFON_ADCOFF,
+  PD_PENIRQ_DISARM = PD_IREFON_ADCON,
+};
+
+enum tsc2003_m {
+  M_12BIT = 0,
+  M_8BIT = 1
+};
+
+enum tsc2003_cmd {
+  MEAS_TEMP0 = 0,
+  MEAS_VBAT1 = 1,
+  MEAS_IN1 = 2,
+  MEAS_TEMP1 = 4,
+  MEAS_VBAT2 = 5,
+  MEAS_IN2 = 6,
+  ACTIVATE_NX_DRIVERS = 8,
+  ACTIVATE_NY_DRIVERS = 9,
+  ACTIVATE_YNX_DRIVERS = 10,
+  MEAS_XPOS = 12,
+  MEAS_YPOS = 13,
+  MEAS_Z1POS = 14,
+  MEAS_Z2POS = 15
+};
+
+struct gs2fsb_i2c	g_i2c0;
+struct i2c_msg 	g_msg;
+
+int i2c_read(int dev_addr, unsigned char *data, unsigned char addr, int size)
+{
+	int ret;
+	struct gs2fsb_i2c *i2c = &g_i2c0;
+	/*
+	printk("-->read dev address:0x%x, reg address:0x%x, data size:0x%x.\n",
+		dev_addr, addr, size);
+	*/
+	
+	
+	while(i2c_readb(i2c, REG_I2C_SR) & I2C_S_BUSY);
+
+	//printk("send slave address.\n");
+	/*set slave addr*/
+	i2c_writeb(i2c, REG_I2C_TXR, ((dev_addr << 1 ) | 0));
+	//i2c_writeb(i2c, REG_I2C_CR, (I2C_C_WRITE | I2C_C_START | I2C_C_WACK));
+	i2c_writeb(i2c, REG_I2C_CR, (I2C_C_WRITE | I2C_C_START));
+	while(i2c_readb(i2c, REG_I2C_SR) & I2C_S_RUN);
+	if (i2c_readb(i2c, REG_I2C_SR) & I2C_S_RNOACK) {
+		//printk(" reg addr:0x%2x no ack !!\n", addr);
+		i2c_writeb(i2c, REG_I2C_CR, I2C_C_STOP); 
+		return -1;
+	}
+
+	i2c_delay();
+	//printk("send reg address.\n");
+	i2c_writeb(i2c, REG_I2C_TXR, addr);
+	//i2c_writeb(i2c, REG_I2C_CR, I2C_C_WRITE);
+	i2c_writeb(i2c, REG_I2C_CR, I2C_C_WRITE);
+	while(i2c_readb(i2c, REG_I2C_SR) & I2C_S_RUN);
+	if (i2c_readb(i2c, REG_I2C_SR) & I2C_S_RNOACK) {
+		//printk(" reg addr no ack !!\n");
+		i2c_writeb(i2c, REG_I2C_CR, I2C_C_STOP); 
+		return -1;
+	}
+
+	//i2c_writeb(i2c, REG_I2C_CR, I2C_C_STOP); 
+
+	//printk("read reg data.\n");
+	i2c_writeb(i2c, REG_I2C_TXR, ((dev_addr << 1 ) | 1));
+	i2c_writeb(i2c, REG_I2C_CR, (I2C_C_WRITE | I2C_C_START));
+	while(i2c_readb(i2c, REG_I2C_SR) & I2C_S_RUN);
+	if (i2c_readb(i2c, REG_I2C_SR) & I2C_S_RNOACK) {
+		//printk(" reg addr:0x%2x no ack !!\n", addr);
+		i2c_writeb(i2c, REG_I2C_CR, I2C_C_STOP); 
+		return -1;
+	}
+	
+	ret = gs2fsb_xfer_read(i2c,  data,  size);
+
+	//here();
+	return ret;
+}
+
+int i2c_init(void)
+{
+	struct gs2fsb_i2c *i2c;
+	
+	g_i2c0.base = (void *)I2C0_BASE;
+	i2c_writeb(&g_i2c0, REG_I2C_CTR, 0x00); 
+	i2c_writeb(&g_i2c0, REG_I2C_PRER_LO, 0x0/*0*/); 
+	i2c_writeb(&g_i2c0, REG_I2C_PRER_HI, 0x64/*0x64*/); 
+	i2c_writeb(&g_i2c0, REG_I2C_CTR, 0x80); 
+
+	i2c = &g_i2c0;
+	
+	/* send 9 sclks to release bus */
+	/*
+	i2c_writeb(i2c, REG_I2C_CR,   I2C_C_READ);
+	i2c_readb(i2c,REG_I2C_TXR);
+	i2c_writeb(i2c, REG_I2C_CR,   I2C_C_READ);
+	i2c_readb(i2c,REG_I2C_TXR);
+	*/
+	//here();
+}
+
+int i2c_write(int dev_addr, unsigned char *data, unsigned char addr, int size)
+{
+	int ret;
+	struct gs2fsb_i2c *i2c = &g_i2c0;
+	/*
+	printk("-->write dev address:0x%x, reg address:0x%x, data size:0x%x.\n",
+		dev_addr, addr, size);
+	*/
+	while(i2c_readb(i2c, REG_I2C_SR) & I2C_S_BUSY);
+
+	/*set slave addr*/
+	i2c_writeb(i2c, REG_I2C_TXR, (dev_addr << 1 ) | 0);
+	i2c_writeb(i2c, REG_I2C_CR, (I2C_C_WRITE | I2C_C_START));
+	while(i2c_readb(i2c, REG_I2C_SR) & I2C_S_RUN);
+	if (i2c_readb(i2c, REG_I2C_SR) & I2C_S_RNOACK) {
+		//printk(" slave addr no ack !!\n");
+		i2c_writeb(i2c, REG_I2C_CR, I2C_C_STOP); 
+		return -1;
+	}
+
+	i2c_writeb(i2c, REG_I2C_TXR, addr);
+	i2c_writeb(i2c, REG_I2C_CR, I2C_C_WRITE);
+	while(i2c_readb(i2c, REG_I2C_SR) & I2C_S_RUN);
+	if (i2c_readb(i2c, REG_I2C_SR) & I2C_S_RNOACK) {
+		//printk(" reg addr:0x%2x no ack !!\n", addr);
+		i2c_writeb(i2c, REG_I2C_CR, I2C_C_STOP); 
+		return -1;
+	}
+
+	ret = gs2fsb_xfer_write(i2c, data,  size);
+
+	//here();
+	return ret;
+}
+
+static unsigned char t_buf[1024] = {0};
+
+#define TEST_LEN 	32
+
+void print_gc0303_reg(void)
+{
+/*
+	int i;
+	
+	i2c_set_addr(0x30);
+        sensor_read_reg(0x80);
+		
+	printk("\n------------- show gc0303 register ---------------\n");
+	for (i = 0x80; i < 0xa1; i++) {
+		printk("reg:0x%2x = 0x%2x.\n", i, sensor_read_reg(i));
+	}
+*/	
+}
+
+void i2c_test(void)
+{
+	unsigned char buf[10];
+	int ret;
+	unsigned char c;
+	unsigned char temp0;
+	unsigned char send, rec;
+	int i;
+	int j;
+
+
+}
+
diff -uNra linux-3.0.82/drivers/media/video/uvc/gc0303/Kconfig linux-3.0.82x/drivers/media/video/uvc/gc0303/Kconfig
--- linux-3.0.82/drivers/media/video/uvc/gc0303/Kconfig	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/uvc/gc0303/Kconfig	2017-09-23 03:42:49.618676286 +0800
@@ -0,0 +1,7 @@
+config LOONGSON_GC0303
+	tristate "loongson_gc0303"
+	depends on USB_VIDEO_CLASS=y
+	---help---
+	  Support for the USB Video Class (UVC)-gc0303
+
+
diff -uNra linux-3.0.82/drivers/media/video/uvc/gc0303/Makefile linux-3.0.82x/drivers/media/video/uvc/gc0303/Makefile
--- linux-3.0.82/drivers/media/video/uvc/gc0303/Makefile	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/uvc/gc0303/Makefile	2017-09-23 03:42:49.618676286 +0800
@@ -0,0 +1 @@
+obj-$(CONFIG_LOONGSON_GC0303) += i2c-gs2fsb.o hv7131.o
diff -uNra linux-3.0.82/drivers/media/video/uvc/gc0303/sb2f_i2c.h linux-3.0.82x/drivers/media/video/uvc/gc0303/sb2f_i2c.h
--- linux-3.0.82/drivers/media/video/uvc/gc0303/sb2f_i2c.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/uvc/gc0303/sb2f_i2c.h	2017-09-23 03:42:49.618676286 +0800
@@ -0,0 +1,71 @@
+
+#ifndef __SB2F_I2C_H__
+#define __SB2F_I2C_H__
+
+#include <asm/types.h>
+
+/*register*/
+#define REG_I2C_PRER_LO	0x0
+#define REG_I2C_PRER_HI	0x1
+#define REG_I2C_CTR		0x2
+#define REG_I2C_TXR		0x3
+#define REG_I2C_RXR		0x3
+#define REG_I2C_CR		0X4
+#define	REG_I2C_SR		0X4
+
+/*control*/
+#define I2C_C_START		0x80
+#define I2C_C_STOP		0x40
+#define	I2C_C_READ		0x20
+#define I2C_C_WRITE		0x10
+#define I2C_C_WACK		0x8
+#define I2C_C_IACK		0x1
+
+/*status*/
+#define	I2C_S_RNOACK	0x80
+#define I2C_S_BUSY		0x40
+#define I2C_S_RUN		0x2
+#define	I2C_S_IF		0x1
+
+int i2c_read(int dev_addr, unsigned char *data, unsigned char addr, int size);
+
+int i2c_init(void);
+
+int i2c_write(int dev_addr, unsigned char *data, unsigned char addr, int size);
+
+void i2c_test(void);
+
+void print_gc0303_reg(void);
+
+
+#define I2C0_BASE		0xbfe58000
+
+struct gs2fsb_i2c {
+	void *base;
+	unsigned int interrupt;
+	int irq;
+	unsigned int flags;
+};
+
+/*
+ * I2C Message - used for pure i2c transaction, also from /dev interface
+ */
+struct i2c_msg {
+	unsigned short addr;	/* slave address			*/
+	unsigned short flags;	/* 1: write, 0: read */
+#define I2C_M_TEN               0x0010  /* this is a ten bit chip address */
+#define I2C_M_RD                0x0001  /* read data, from slave to master */
+#define I2C_M_NOSTART           0x4000  /* if I2C_FUNC_PROTOCOL_MANGLING */
+#define I2C_M_REV_DIR_ADDR      0x2000  /* if I2C_FUNC_PROTOCOL_MANGLING */
+#define I2C_M_IGNORE_NAK        0x1000  /* if I2C_FUNC_PROTOCOL_MANGLING */
+#define I2C_M_NO_RD_ACK         0x0800  /* if I2C_FUNC_PROTOCOL_MANGLING */
+#define I2C_M_RECV_LEN          0x0400  /* length will be first received byte */
+	unsigned short len;		/* msg length				*/
+	unsigned char *buf;		/* pointer to msg data			*/
+	int sub_addr;			/* if sub address = -1, mean no sub address */
+};
+
+extern struct gs2fsb_i2c	g_i2c0;
+extern struct i2c_msg 	g_msg;
+
+#endif
diff -uNra linux-3.0.82/drivers/media/video/uvc/gc0303/stub.h linux-3.0.82x/drivers/media/video/uvc/gc0303/stub.h
--- linux-3.0.82/drivers/media/video/uvc/gc0303/stub.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/uvc/gc0303/stub.h	2017-09-23 03:42:49.618676286 +0800
@@ -0,0 +1,85 @@
+
+//#ifndef __STUB_H__
+#define __STUB_H__
+
+#define CMOS_WIDTH	480
+#define CMOS_HEIGHT 640
+
+#define ZKFPV10		0
+#define ZKFP_PARAM_CODE_DBMM 0
+#define ZKFP_DBMM_EXTERNAL	0
+#define IDENTIFYSPEED	0
+#define ONLY_LOCAL		0
+
+#define IMG_WIDTH	640
+#define IMG_HEIGHT	480
+#define IMG_BPP		16
+
+#define IRQ_GPIO_0	15
+
+#ifndef FALSE
+#define FALSE 0
+#endif
+
+#ifndef TRUE
+#define TRUE 1
+#endif
+
+#ifndef u8
+#define u8	unsigned char
+#endif
+
+#ifndef u16
+#define u16	unsigned short
+#endif
+
+#ifndef u32
+#define u32	unsigned int
+#endif
+
+#ifndef U32
+#define U32	unsigned int
+#endif
+
+#ifndef BYTE
+#define BYTE   unsigned char
+#endif
+
+#ifndef WORD
+#define WORD unsigned short
+#endif
+
+#ifndef NULL
+#define NULL	0
+#endif
+
+#ifndef BOOL
+#define BOOL int
+#endif
+
+struct sensor_interface{
+	unsigned char *buf;
+	int img_width;
+	int img_height;
+	unsigned int frame_size;
+}sensor_if;
+
+#define here()	printk("-->%s, %dline.\n", __FILE__, __LINE__)
+//int i2c_read(int dev_addr, unsigned char *data, unsigned char addr, int size);
+//int i2c_write(int dev_addr, unsigned char *data, unsigned char addr, int size);
+//
+
+/**
+	#define gOHeight gOptions.OImageHeight
+	#define gOWidth gOptions.OImageWidth
+	#define gOSize gOptions.OImageWidth*gOptions.OImageHeight
+	gOptions.ZKFPVersion
+	gOptions.NewFPReader
+	gOptions.MThreshold
+	gOptions.MaxNoiseThr
+	gOptions.MinMinutiae
+	gOptions.MaxTempLen
+ */
+ 
+ //#endif
+
diff -uNra linux-3.0.82/drivers/media/video/uvc/Kconfig linux-3.0.82x/drivers/media/video/uvc/Kconfig
--- linux-3.0.82/drivers/media/video/uvc/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/uvc/Kconfig	2017-09-23 03:42:49.618676286 +0800
@@ -15,3 +15,6 @@
 	  to report button events.
 
 	  If you are in doubt, say Y.
+	  
+	  
+source "drivers/media/video/uvc/gc0303/Kconfig"
diff -uNra linux-3.0.82/drivers/media/video/uvc/Makefile linux-3.0.82x/drivers/media/video/uvc/Makefile
--- linux-3.0.82/drivers/media/video/uvc/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/uvc/Makefile	2017-09-23 03:42:49.618676286 +0800
@@ -4,3 +4,5 @@
 uvcvideo-objs  += uvc_entity.o
 endif
 obj-$(CONFIG_USB_VIDEO_CLASS) += uvcvideo.o
+
+obj-$(CONFIG_LOONGSON_GC0303)	+= gc0303/
diff -uNra linux-3.0.82/drivers/media/video/uvc/uvc_driver.c linux-3.0.82x/drivers/media/video/uvc/uvc_driver.c
--- linux-3.0.82/drivers/media/video/uvc/uvc_driver.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/uvc/uvc_driver.c	2017-09-23 03:42:49.622676274 +0800
@@ -113,6 +113,16 @@
 		.guid		= UVC_GUID_FORMAT_RGBP,
 		.fcc		= V4L2_PIX_FMT_RGB565,
 	},
+	{
+		.name		= "MPEG2 TS",
+		.guid		= UVC_GUID_FORMAT_MPEG,
+		.fcc		= V4L2_PIX_FMT_MPEG,	
+	},
+	{
+		.name		= "H.264",
+		.guid		= UVC_GUID_FORMAT_H264,
+		.fcc		= V4L2_PIX_FMT_H264,
+	},
 };
 
 /* ------------------------------------------------------------------------
@@ -408,6 +418,33 @@
 		break;
 
 	case UVC_VS_FORMAT_MPEG2TS:
+		n = dev->uvc_version >= 0x0110 ? 23 : 7;
+		if (buflen < n) {
+			uvc_trace(UVC_TRACE_DESCR, "device %d videostreaming "
+				   "interface %d FORMAT error\n",
+				   dev->udev->devnum,
+				   alts->desc.bInterfaceNumber);
+			return -EINVAL;
+		}
+		
+		strlcpy(format->name, "MPEG2 TS", sizeof format->name);
+		format->fcc = V4L2_PIX_FMT_H264;
+		format->flags = UVC_FMT_FLAG_COMPRESSED | UVC_FMT_FLAG_STREAM;
+		format->bpp = 0;
+		ftype = 0;
+		/* Create a dummy frame descriptor. */
+		frame = &format->frame[0];
+		memset(&format->frame[0], 0, sizeof format->frame[0]);
+		frame->wWidth  = 1280;
+		frame->wHeight = 720;
+		frame->bFrameIntervalType = 0;
+		frame->dwDefaultFrameInterval = 1;
+		frame->dwFrameInterval = *intervals;
+		*(*intervals)++ = 1;
+		*(*intervals)++ = 10000000;
+		*(*intervals)++ = 1;
+		format->nframes = 1;
+		break;
 	case UVC_VS_FORMAT_STREAM_BASED:
 		/* Not supported yet. */
 	default:
@@ -683,6 +720,10 @@
 			break;
 
 		case UVC_VS_FORMAT_MPEG2TS:
+			nformats++;
+			nframes++;
+			nintervals += 3;
+			break;
 		case UVC_VS_FORMAT_STREAM_BASED:
 			uvc_trace(UVC_TRACE_DESCR, "device %d videostreaming "
 				"interface %d FORMAT %u is not supported.\n",
@@ -736,6 +777,7 @@
 		case UVC_VS_FORMAT_MJPEG:
 		case UVC_VS_FORMAT_DV:
 		case UVC_VS_FORMAT_FRAME_BASED:
+		case UVC_VS_FORMAT_MPEG2TS:
 			format->frame = frame;
 			ret = uvc_parse_format(dev, streaming, format,
 				&interval, buffer, buflen);
diff -uNra linux-3.0.82/drivers/media/video/uvc/uvc_v4l2.c linux-3.0.82x/drivers/media/video/uvc/uvc_v4l2.c
--- linux-3.0.82/drivers/media/video/uvc/uvc_v4l2.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/uvc/uvc_v4l2.c	2017-09-23 03:42:49.622676274 +0800
@@ -27,6 +27,9 @@
 #include <media/v4l2-ioctl.h>
 
 #include "uvcvideo.h"
+#include "gc0303/hv7131.h"
+
+
 
 /* ------------------------------------------------------------------------
  * UVC ioctls
@@ -1006,6 +1009,8 @@
 			return -EBUSY;
 
 		mutex_lock(&stream->mutex);
+
+//		sensor_init(0, 0, 320, 240, 0);		//lxy
 		ret = uvc_video_enable(stream, 1);
 		mutex_unlock(&stream->mutex);
 		if (ret < 0)
diff -uNra linux-3.0.82/drivers/media/video/uvc/uvcvideo.h linux-3.0.82x/drivers/media/video/uvc/uvcvideo.h
--- linux-3.0.82/drivers/media/video/uvc/uvcvideo.h	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/uvc/uvcvideo.h	2017-09-23 03:42:49.626676262 +0800
@@ -126,6 +126,8 @@
 /* ------------------------------------------------------------------------
  * GUIDs
  */
+
+#define V4L2_PIX_FMT_H264     v4l2_fourcc('H', '2', '6', '4') /* H.264 Annex-B NAL Units */
 #define UVC_GUID_UVC_CAMERA \
 	{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, \
 	 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01}
@@ -178,6 +180,12 @@
 #define UVC_GUID_FORMAT_M420 \
 	{ 'M',  '4',  '2',  '0', 0x00, 0x00, 0x10, 0x00, \
 	 0x80, 0x00, 0x00, 0xaa, 0x00, 0x38, 0x9b, 0x71}
+#define UVC_GUID_FORMAT_MPEG \	
+	{ 'M',  'P',  'E',  'G', 0x00, 0x00, 0x10, 0x00, \	 
+	 0x80, 0x00, 0x00, 0xaa, 0x00, 0x38, 0x9b, 0x71}
+#define UVC_GUID_FORMAT_H264 \
+	{ 'H',  '2',  '6',  '4', 0x00, 0x00, 0x10, 0x00, \
+	 0x80, 0x00, 0x00, 0xaa, 0x00, 0x38, 0x9b, 0x71}
 
 /* ------------------------------------------------------------------------
  * Driver specific constants.
diff -uNra linux-3.0.82/drivers/media/video/v4l2-ioctl.c linux-3.0.82x/drivers/media/video/v4l2-ioctl.c
--- linux-3.0.82/drivers/media/video/v4l2-ioctl.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/v4l2-ioctl.c	2017-09-23 03:42:49.630676249 +0800
@@ -342,6 +342,7 @@
 static inline void v4l_print_pix_fmt(struct video_device *vfd,
 						struct v4l2_pix_format *fmt)
 {
+
 	dbgarg2("width=%d, height=%d, format=%c%c%c%c, field=%s, "
 		"bytesperline=%d sizeimage=%d, colorspace=%d\n",
 		fmt->width, fmt->height,
@@ -543,7 +544,7 @@
 	struct v4l2_format f_copy;
 	int use_fh_prio = 0;
 	long ret = -EINVAL;
-
+//	printk("\r\n====================> video_do_ioctl dbg-yg \r\n");
 	if (ops == NULL) {
 		printk(KERN_WARNING "videodev: \"%s\" has no ioctl_ops.\n",
 				vfd->name);
@@ -821,10 +822,8 @@
 	case VIDIOC_S_FMT:
 	{
 		struct v4l2_format *f = (struct v4l2_format *)arg;
-
 		/* FIXME: Should be one dump per type */
 		dbgarg(cmd, "type=%s\n", prt_names(f->type, v4l2_type_names));
-
 		switch (f->type) {
 		case V4L2_BUF_TYPE_VIDEO_CAPTURE:
 			CLEAR_AFTER_FIELD(f, fmt.pix);
@@ -1297,7 +1296,6 @@
 	case VIDIOC_QUERYSTD:
 	{
 		v4l2_std_id *p = arg;
-
 		if (!ops->vidioc_querystd)
 			break;
 		ret = ops->vidioc_querystd(file, fh, arg);
diff -uNra linux-3.0.82/drivers/media/video/videobuf-core.c linux-3.0.82x/drivers/media/video/videobuf-core.c
--- linux-3.0.82/drivers/media/video/videobuf-core.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/videobuf-core.c	2017-09-23 03:42:49.634676237 +0800
@@ -55,7 +55,6 @@
 struct videobuf_buffer *videobuf_alloc_vb(struct videobuf_queue *q)
 {
 	struct videobuf_buffer *vb;
-
 	BUG_ON(q->msize < sizeof(*vb));
 
 	if (!q->int_ops || !q->int_ops->alloc_vb) {
@@ -487,7 +486,6 @@
 		dprintk(1, "reqbufs: mmap setup returned %d\n", retval);
 		goto done;
 	}
-
 	req->count = retval;
 	retval = 0;
 
diff -uNra linux-3.0.82/drivers/media/video/videobuf-dma-contig.c linux-3.0.82x/drivers/media/video/videobuf-dma-contig.c
--- linux-3.0.82/drivers/media/video/videobuf-dma-contig.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/videobuf-dma-contig.c	2017-09-23 03:42:49.634676237 +0800
@@ -142,11 +142,10 @@
 	unsigned long pages_done, user_address;
 	unsigned int offset;
 	int ret;
-
 	offset = vb->baddr & ~PAGE_MASK;
 	mem->size = PAGE_ALIGN(vb->size + offset);
 	ret = -EINVAL;
-
+	printk(" dbg-yg enter  >>>>>>>>>>>>>>>>>>>>>>>>> video_dma_contig_user_get().............\r\n");
 	down_read(&mm->mmap_sem);
 
 	vma = find_vma(mm, vb->baddr);
@@ -188,8 +187,8 @@
 {
 	struct videobuf_dma_contig_memory *mem;
 	struct videobuf_buffer *vb;
-
 	vb = kzalloc(size + sizeof(*mem), GFP_KERNEL);
+
 	if (vb) {
 		mem = vb->priv = ((char *)vb) + size;
 		mem->magic = MAGIC_DC_MEM;
@@ -204,7 +203,7 @@
 
 	BUG_ON(!mem);
 	MAGIC_CHECK(mem->magic, MAGIC_DC_MEM);
-
+	printk(" dbg-yg  mem->vaddr:0x%08x ...\r\n",mem->vaddr);
 	return mem->vaddr;
 }
 
@@ -265,7 +264,6 @@
 	struct videobuf_mapping *map;
 	int retval;
 	unsigned long size;
-
 	dev_dbg(q->dev, "%s\n", __func__);
 
 	/* create mapping + update buffer list */
@@ -277,7 +275,6 @@
 	map->q = q;
 
 	buf->baddr = vma->vm_start;
-
 	mem = buf->priv;
 	BUG_ON(!mem);
 	MAGIC_CHECK(mem->magic, MAGIC_DC_MEM);
diff -uNra linux-3.0.82/drivers/media/video/videobuf-vmalloc.c linux-3.0.82x/drivers/media/video/videobuf-vmalloc.c
--- linux-3.0.82/drivers/media/video/videobuf-vmalloc.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/videobuf-vmalloc.c	2017-09-23 03:42:49.634676237 +0800
@@ -237,8 +237,7 @@
 	struct videobuf_mapping *map;
 	int retval, pages;
 
-	dprintk(1, "%s\n", __func__);
-
+	dprintk(1, "%s\n", __func__);	
 	/* create mapping + update buffer list */
 	map = kzalloc(sizeof(struct videobuf_mapping), GFP_KERNEL);
 	if (NULL == map)
diff -uNra linux-3.0.82/drivers/media/video/video_decoder.h linux-3.0.82x/drivers/media/video/video_decoder.h
--- linux-3.0.82/drivers/media/video/video_decoder.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/video_decoder.h	2017-09-23 03:42:49.634676237 +0800
@@ -0,0 +1,48 @@
+#ifndef _LINUX_VIDEO_DECODER_H
+#define _LINUX_VIDEO_DECODER_H
+
+#include <linux/types.h>
+
+#define HAVE_VIDEO_DECODER 1
+
+struct video_decoder_capability { /* this name is too long */
+	__u32	flags;
+#define	VIDEO_DECODER_PAL	1	/* can decode PAL signal */
+#define	VIDEO_DECODER_NTSC	2	/* can decode NTSC */
+#define	VIDEO_DECODER_SECAM	4	/* can decode SECAM */
+#define	VIDEO_DECODER_AUTO	8	/* can autosense norm */
+#define	VIDEO_DECODER_CCIR	16	/* CCIR-601 pixel rate (720 pixels per line) instead of square pixel rate */
+	int	inputs;			/* number of inputs */
+	int	outputs;		/* number of outputs */
+};
+
+/*
+DECODER_GET_STATUS returns the following flags.  The only one you need is
+DECODER_STATUS_GOOD, the others are just nice things to know.
+*/
+#define	DECODER_STATUS_GOOD	1	/* receiving acceptable input */
+#define	DECODER_STATUS_COLOR	2	/* receiving color information */
+#define	DECODER_STATUS_PAL	4	/* auto detected */
+#define	DECODER_STATUS_NTSC	8	/* auto detected */
+#define	DECODER_STATUS_SECAM	16	/* auto detected */
+
+struct video_decoder_init {
+	unsigned char len;
+	const unsigned char *data;
+};
+
+#define	DECODER_GET_CAPABILITIES _IOR('d', 1, struct video_decoder_capability)
+#define	DECODER_GET_STATUS    	_IOR('d', 2, int)
+#define	DECODER_SET_NORM	_IOW('d', 3, int)
+#define	DECODER_SET_INPUT	_IOW('d', 4, int)	/* 0 <= input < #inputs */
+#define	DECODER_SET_OUTPUT	_IOW('d', 5, int)	/* 0 <= output < #outputs */
+#define	DECODER_ENABLE_OUTPUT	_IOW('d', 6, int)	/* boolean output enable control */
+#define	DECODER_SET_PICTURE   	_IOW('d', 7, struct video_picture)
+#define	DECODER_SET_GPIO	_IOW('d', 8, int)	/* switch general purpose pin */
+#define	DECODER_INIT		_IOW('d', 9, struct video_decoder_init)	/* init internal registers at once */
+#define	DECODER_SET_VBI_BYPASS	_IOW('d', 10, int)	/* switch vbi bypass */
+
+#define	DECODER_DUMP		_IO('d', 192)		/* debug hook */
+
+
+#endif
diff -uNra linux-3.0.82/drivers/media/video/videodev2.h linux-3.0.82x/drivers/media/video/videodev2.h
--- linux-3.0.82/drivers/media/video/videodev2.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/videodev2.h	2017-09-23 03:42:49.638676225 +0800
@@ -0,0 +1,1637 @@
+/*
+ *  Video for Linux Two header file
+ *
+ *  Copyright (C) 1999-2007 the contributors
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  Alternatively you can redistribute this file under the terms of the
+ *  BSD license as stated below:
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *  1. Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *  2. Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in
+ *     the documentation and/or other materials provided with the
+ *     distribution.
+ *  3. The names of its contributors may not be used to endorse or promote
+ *     products derived from this software without specific prior written
+ *     permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ *  TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *	Header file for v4l or V4L2 drivers and applications
+ * with public API.
+ * All kernel-specific stuff were moved to media/v4l2-dev.h, so
+ * no #if __KERNEL tests are allowed here
+ *
+ *	See http://linuxtv.org for more info
+ *
+ *	Author: Bill Dirks <bill@thedirks.org>
+ *		Justin Schoeman
+ *              Hans Verkuil <hverkuil@xs4all.nl>
+ *		et al.
+ */
+#ifndef __LINUX_VIDEODEV2_H
+#define __LINUX_VIDEODEV2_H
+
+#ifdef __KERNEL__
+#include <linux/time.h>     /* need struct timeval */
+#else
+#include <sys/time.h>
+#endif
+#include <linux/compiler.h>
+#include <linux/ioctl.h>
+#include <linux/types.h>
+
+/*
+ * Common stuff for both V4L1 and V4L2
+ * Moved from videodev.h
+ */
+#define VIDEO_MAX_FRAME               32
+
+#ifndef __KERNEL__
+
+/* These defines are V4L1 specific and should not be used with the V4L2 API!
+   They will be removed from this header in the future. */
+
+#define VID_TYPE_CAPTURE	1	/* Can capture */
+#define VID_TYPE_TUNER		2	/* Can tune */
+#define VID_TYPE_TELETEXT	4	/* Does teletext */
+#define VID_TYPE_OVERLAY	8	/* Overlay onto frame buffer */
+#define VID_TYPE_CHROMAKEY	16	/* Overlay by chromakey */
+#define VID_TYPE_CLIPPING	32	/* Can clip */
+#define VID_TYPE_FRAMERAM	64	/* Uses the frame buffer memory */
+#define VID_TYPE_SCALES		128	/* Scalable */
+#define VID_TYPE_MONOCHROME	256	/* Monochrome only */
+#define VID_TYPE_SUBCAPTURE	512	/* Can capture subareas of the image */
+#define VID_TYPE_MPEG_DECODER	1024	/* Can decode MPEG streams */
+#define VID_TYPE_MPEG_ENCODER	2048	/* Can encode MPEG streams */
+#define VID_TYPE_MJPEG_DECODER	4096	/* Can decode MJPEG streams */
+#define VID_TYPE_MJPEG_ENCODER	8192	/* Can encode MJPEG streams */
+#endif
+
+/*
+ *	M I S C E L L A N E O U S
+ */
+
+/*  Four-character-code (FOURCC) */
+#define v4l2_fourcc(a, b, c, d)\
+	((__u32)(a) | ((__u32)(b) << 8) | ((__u32)(c) << 16) | ((__u32)(d) << 24))
+
+/*
+ *	E N U M S
+ */
+enum v4l2_field {
+	V4L2_FIELD_ANY           = 0, /* driver can choose from none,
+					 top, bottom, interlaced
+					 depending on whatever it thinks
+					 is approximate ... */
+	V4L2_FIELD_NONE          = 1, /* this device has no fields ... */
+	V4L2_FIELD_TOP           = 2, /* top field only */
+	V4L2_FIELD_BOTTOM        = 3, /* bottom field only */
+	V4L2_FIELD_INTERLACED    = 4, /* both fields interlaced */
+	V4L2_FIELD_SEQ_TB        = 5, /* both fields sequential into one
+					 buffer, top-bottom order */
+	V4L2_FIELD_SEQ_BT        = 6, /* same as above + bottom-top order */
+	V4L2_FIELD_ALTERNATE     = 7, /* both fields alternating into
+					 separate buffers */
+	V4L2_FIELD_INTERLACED_TB = 8, /* both fields interlaced, top field
+					 first and the top field is
+					 transmitted first */
+	V4L2_FIELD_INTERLACED_BT = 9, /* both fields interlaced, top field
+					 first and the bottom field is
+					 transmitted first */
+};
+#define V4L2_FIELD_HAS_TOP(field)	\
+	((field) == V4L2_FIELD_TOP 	||\
+	 (field) == V4L2_FIELD_INTERLACED ||\
+	 (field) == V4L2_FIELD_INTERLACED_TB ||\
+	 (field) == V4L2_FIELD_INTERLACED_BT ||\
+	 (field) == V4L2_FIELD_SEQ_TB	||\
+	 (field) == V4L2_FIELD_SEQ_BT)
+#define V4L2_FIELD_HAS_BOTTOM(field)	\
+	((field) == V4L2_FIELD_BOTTOM 	||\
+	 (field) == V4L2_FIELD_INTERLACED ||\
+	 (field) == V4L2_FIELD_INTERLACED_TB ||\
+	 (field) == V4L2_FIELD_INTERLACED_BT ||\
+	 (field) == V4L2_FIELD_SEQ_TB	||\
+	 (field) == V4L2_FIELD_SEQ_BT)
+#define V4L2_FIELD_HAS_BOTH(field)	\
+	((field) == V4L2_FIELD_INTERLACED ||\
+	 (field) == V4L2_FIELD_INTERLACED_TB ||\
+	 (field) == V4L2_FIELD_INTERLACED_BT ||\
+	 (field) == V4L2_FIELD_SEQ_TB ||\
+	 (field) == V4L2_FIELD_SEQ_BT)
+
+enum v4l2_buf_type {
+	V4L2_BUF_TYPE_VIDEO_CAPTURE        = 1,
+	V4L2_BUF_TYPE_VIDEO_OUTPUT         = 2,
+	V4L2_BUF_TYPE_VIDEO_OVERLAY        = 3,
+	V4L2_BUF_TYPE_VBI_CAPTURE          = 4,
+	V4L2_BUF_TYPE_VBI_OUTPUT           = 5,
+	V4L2_BUF_TYPE_SLICED_VBI_CAPTURE   = 6,
+	V4L2_BUF_TYPE_SLICED_VBI_OUTPUT    = 7,
+#if 1
+	/* Experimental */
+	V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY = 8,
+#endif
+	V4L2_BUF_TYPE_PRIVATE              = 0x80,
+};
+
+enum v4l2_ctrl_type {
+	V4L2_CTRL_TYPE_INTEGER	     = 1,
+	V4L2_CTRL_TYPE_BOOLEAN	     = 2,
+	V4L2_CTRL_TYPE_MENU	     = 3,
+	V4L2_CTRL_TYPE_BUTTON	     = 4,
+	V4L2_CTRL_TYPE_INTEGER64     = 5,
+	V4L2_CTRL_TYPE_CTRL_CLASS    = 6,
+	V4L2_CTRL_TYPE_STRING        = 7,
+};
+
+enum v4l2_tuner_type {
+	V4L2_TUNER_RADIO	     = 1,
+	V4L2_TUNER_ANALOG_TV	     = 2,
+	V4L2_TUNER_DIGITAL_TV	     = 3,
+};
+
+enum v4l2_memory {
+	V4L2_MEMORY_MMAP             = 1,
+	V4L2_MEMORY_USERPTR          = 2,
+	V4L2_MEMORY_OVERLAY          = 3,
+};
+
+/* see also http://vektor.theorem.ca/graphics/ycbcr/ */
+enum v4l2_colorspace {
+	/* ITU-R 601 -- broadcast NTSC/PAL */
+	V4L2_COLORSPACE_SMPTE170M     = 1,
+
+	/* 1125-Line (US) HDTV */
+	V4L2_COLORSPACE_SMPTE240M     = 2,
+
+	/* HD and modern captures. */
+	V4L2_COLORSPACE_REC709        = 3,
+
+	/* broken BT878 extents (601, luma range 16-253 instead of 16-235) */
+	V4L2_COLORSPACE_BT878         = 4,
+
+	/* These should be useful.  Assume 601 extents. */
+	V4L2_COLORSPACE_470_SYSTEM_M  = 5,
+	V4L2_COLORSPACE_470_SYSTEM_BG = 6,
+
+	/* I know there will be cameras that send this.  So, this is
+	 * unspecified chromaticities and full 0-255 on each of the
+	 * Y'CbCr components
+	 */
+	V4L2_COLORSPACE_JPEG          = 7,
+
+	/* For RGB colourspaces, this is probably a good start. */
+	V4L2_COLORSPACE_SRGB          = 8,
+};
+
+enum v4l2_priority {
+	V4L2_PRIORITY_UNSET       = 0,  /* not initialized */
+	V4L2_PRIORITY_BACKGROUND  = 1,
+	V4L2_PRIORITY_INTERACTIVE = 2,
+	V4L2_PRIORITY_RECORD      = 3,
+	V4L2_PRIORITY_DEFAULT     = V4L2_PRIORITY_INTERACTIVE,
+};
+
+struct v4l2_rect {
+	__s32   left;
+	__s32   top;
+	__s32   width;
+	__s32   height;
+};
+
+struct v4l2_fract {
+	__u32   numerator;
+	__u32   denominator;
+};
+
+/*
+ *	D R I V E R   C A P A B I L I T I E S
+ */
+struct v4l2_capability {
+	__u8	driver[16];	/* i.e. "bttv" */
+	__u8	card[32];	/* i.e. "Hauppauge WinTV" */
+	__u8	bus_info[32];	/* "PCI:" + pci_name(pci_dev) */
+	__u32   version;        /* should use KERNEL_VERSION() */
+	__u32	capabilities;	/* Device capabilities */
+	__u32	reserved[4];
+};
+
+/* Values for 'capabilities' field */
+#define V4L2_CAP_VIDEO_CAPTURE		0x00000001  /* Is a video capture device */
+#define V4L2_CAP_VIDEO_OUTPUT		0x00000002  /* Is a video output device */
+#define V4L2_CAP_VIDEO_OVERLAY		0x00000004  /* Can do video overlay */
+#define V4L2_CAP_VBI_CAPTURE		0x00000010  /* Is a raw VBI capture device */
+#define V4L2_CAP_VBI_OUTPUT		0x00000020  /* Is a raw VBI output device */
+#define V4L2_CAP_SLICED_VBI_CAPTURE	0x00000040  /* Is a sliced VBI capture device */
+#define V4L2_CAP_SLICED_VBI_OUTPUT	0x00000080  /* Is a sliced VBI output device */
+#define V4L2_CAP_RDS_CAPTURE		0x00000100  /* RDS data capture */
+#define V4L2_CAP_VIDEO_OUTPUT_OVERLAY	0x00000200  /* Can do video output overlay */
+#define V4L2_CAP_HW_FREQ_SEEK		0x00000400  /* Can do hardware frequency seek  */
+#define V4L2_CAP_RDS_OUTPUT		0x00000800  /* Is an RDS encoder */
+
+#define V4L2_CAP_TUNER			0x00010000  /* has a tuner */
+#define V4L2_CAP_AUDIO			0x00020000  /* has audio support */
+#define V4L2_CAP_RADIO			0x00040000  /* is a radio device */
+#define V4L2_CAP_MODULATOR		0x00080000  /* has a modulator */
+
+#define V4L2_CAP_READWRITE              0x01000000  /* read/write systemcalls */
+#define V4L2_CAP_ASYNCIO                0x02000000  /* async I/O */
+#define V4L2_CAP_STREAMING              0x04000000  /* streaming I/O ioctls */
+
+/*
+ *	V I D E O   I M A G E   F O R M A T
+ */
+struct v4l2_pix_format {
+	__u32         		width;
+	__u32			height;
+	__u32			pixelformat;
+	enum v4l2_field  	field;
+	__u32            	bytesperline;	/* for padding, zero if unused */
+	__u32          		sizeimage;
+	enum v4l2_colorspace	colorspace;
+	__u32			priv;		/* private data, depends on pixelformat */
+};
+
+/*      Pixel format         FOURCC                          depth  Description  */
+
+/* RGB formats */
+#define V4L2_PIX_FMT_RGB332  v4l2_fourcc('R', 'G', 'B', '1') /*  8  RGB-3-3-2     */
+#define V4L2_PIX_FMT_RGB444  v4l2_fourcc('R', '4', '4', '4') /* 16  xxxxrrrr ggggbbbb */
+#define V4L2_PIX_FMT_RGB555  v4l2_fourcc('R', 'G', 'B', 'O') /* 16  RGB-5-5-5     */
+#define V4L2_PIX_FMT_RGB565  v4l2_fourcc('R', 'G', 'B', 'P') /* 16  RGB-5-6-5     */
+#define V4L2_PIX_FMT_RGB555X v4l2_fourcc('R', 'G', 'B', 'Q') /* 16  RGB-5-5-5 BE  */
+#define V4L2_PIX_FMT_RGB565X v4l2_fourcc('R', 'G', 'B', 'R') /* 16  RGB-5-6-5 BE  */
+#define V4L2_PIX_FMT_BGR24   v4l2_fourcc('B', 'G', 'R', '3') /* 24  BGR-8-8-8     */
+#define V4L2_PIX_FMT_RGB24   v4l2_fourcc('R', 'G', 'B', '3') /* 24  RGB-8-8-8     */
+#define V4L2_PIX_FMT_BGR32   v4l2_fourcc('B', 'G', 'R', '4') /* 32  BGR-8-8-8-8   */
+#define V4L2_PIX_FMT_RGB32   v4l2_fourcc('R', 'G', 'B', '4') /* 32  RGB-8-8-8-8   */
+
+/* Grey formats */
+#define V4L2_PIX_FMT_GREY    v4l2_fourcc('G', 'R', 'E', 'Y') /*  8  Greyscale     */
+#define V4L2_PIX_FMT_Y16     v4l2_fourcc('Y', '1', '6', ' ') /* 16  Greyscale     */
+
+/* Palette formats */
+#define V4L2_PIX_FMT_PAL8    v4l2_fourcc('P', 'A', 'L', '8') /*  8  8-bit palette */
+
+/* Luminance+Chrominance formats */
+#define V4L2_PIX_FMT_YVU410  v4l2_fourcc('Y', 'V', 'U', '9') /*  9  YVU 4:1:0     */
+#define V4L2_PIX_FMT_YVU420  v4l2_fourcc('Y', 'V', '1', '2') /* 12  YVU 4:2:0     */
+#define V4L2_PIX_FMT_YUYV    v4l2_fourcc('Y', 'U', 'Y', 'V') /* 16  YUV 4:2:2     */
+#define V4L2_PIX_FMT_YYUV    v4l2_fourcc('Y', 'Y', 'U', 'V') /* 16  YUV 4:2:2     */
+#define V4L2_PIX_FMT_YVYU    v4l2_fourcc('Y', 'V', 'Y', 'U') /* 16 YVU 4:2:2 */
+#define V4L2_PIX_FMT_UYVY    v4l2_fourcc('U', 'Y', 'V', 'Y') /* 16  YUV 4:2:2     */
+#define V4L2_PIX_FMT_VYUY    v4l2_fourcc('V', 'Y', 'U', 'Y') /* 16  YUV 4:2:2     */
+#define V4L2_PIX_FMT_YUV422P v4l2_fourcc('4', '2', '2', 'P') /* 16  YVU422 planar */
+#define V4L2_PIX_FMT_YUV411P v4l2_fourcc('4', '1', '1', 'P') /* 16  YVU411 planar */
+#define V4L2_PIX_FMT_Y41P    v4l2_fourcc('Y', '4', '1', 'P') /* 12  YUV 4:1:1     */
+#define V4L2_PIX_FMT_YUV444  v4l2_fourcc('Y', '4', '4', '4') /* 16  xxxxyyyy uuuuvvvv */
+#define V4L2_PIX_FMT_YUV555  v4l2_fourcc('Y', 'U', 'V', 'O') /* 16  YUV-5-5-5     */
+#define V4L2_PIX_FMT_YUV565  v4l2_fourcc('Y', 'U', 'V', 'P') /* 16  YUV-5-6-5     */
+#define V4L2_PIX_FMT_YUV32   v4l2_fourcc('Y', 'U', 'V', '4') /* 32  YUV-8-8-8-8   */
+#define V4L2_PIX_FMT_YUV410  v4l2_fourcc('Y', 'U', 'V', '9') /*  9  YUV 4:1:0     */
+#define V4L2_PIX_FMT_YUV420  v4l2_fourcc('Y', 'U', '1', '2') /* 12  YUV 4:2:0     */
+#define V4L2_PIX_FMT_HI240   v4l2_fourcc('H', 'I', '2', '4') /*  8  8-bit color   */
+#define V4L2_PIX_FMT_HM12    v4l2_fourcc('H', 'M', '1', '2') /*  8  YUV 4:2:0 16x16 macroblocks */
+
+/* two planes -- one Y, one Cr + Cb interleaved  */
+#define V4L2_PIX_FMT_NV12    v4l2_fourcc('N', 'V', '1', '2') /* 12  Y/CbCr 4:2:0  */
+#define V4L2_PIX_FMT_NV21    v4l2_fourcc('N', 'V', '2', '1') /* 12  Y/CrCb 4:2:0  */
+#define V4L2_PIX_FMT_NV16    v4l2_fourcc('N', 'V', '1', '6') /* 16  Y/CbCr 4:2:2  */
+#define V4L2_PIX_FMT_NV61    v4l2_fourcc('N', 'V', '6', '1') /* 16  Y/CrCb 4:2:2  */
+
+/* Bayer formats - see http://www.siliconimaging.com/RGB%20Bayer.htm */
+#define V4L2_PIX_FMT_SBGGR8  v4l2_fourcc('B', 'A', '8', '1') /*  8  BGBG.. GRGR.. */
+#define V4L2_PIX_FMT_SGBRG8  v4l2_fourcc('G', 'B', 'R', 'G') /*  8  GBGB.. RGRG.. */
+#define V4L2_PIX_FMT_SGRBG8  v4l2_fourcc('G', 'R', 'B', 'G') /*  8  GRGR.. BGBG.. */
+#define V4L2_PIX_FMT_SGRBG10 v4l2_fourcc('B', 'A', '1', '0') /* 10bit raw bayer */
+	/* 10bit raw bayer DPCM compressed to 8 bits */
+#define V4L2_PIX_FMT_SGRBG10DPCM8 v4l2_fourcc('B', 'D', '1', '0')
+	/*
+	 * 10bit raw bayer, expanded to 16 bits
+	 * xxxxrrrrrrrrrrxxxxgggggggggg xxxxggggggggggxxxxbbbbbbbbbb...
+	 */
+#define V4L2_PIX_FMT_SBGGR16 v4l2_fourcc('B', 'Y', 'R', '2') /* 16  BGBG.. GRGR.. */
+
+/* compressed formats */
+#define V4L2_PIX_FMT_MJPEG    v4l2_fourcc('M', 'J', 'P', 'G') /* Motion-JPEG   */
+#define V4L2_PIX_FMT_JPEG     v4l2_fourcc('J', 'P', 'E', 'G') /* JFIF JPEG     */
+#define V4L2_PIX_FMT_DV       v4l2_fourcc('d', 'v', 's', 'd') /* 1394          */
+#define V4L2_PIX_FMT_MPEG     v4l2_fourcc('M', 'P', 'E', 'G') /* MPEG-1/2/4    */
+
+/*  Vendor-specific formats   */
+#define V4L2_PIX_FMT_WNVA     v4l2_fourcc('W', 'N', 'V', 'A') /* Winnov hw compress */
+#define V4L2_PIX_FMT_SN9C10X  v4l2_fourcc('S', '9', '1', '0') /* SN9C10x compression */
+#define V4L2_PIX_FMT_SN9C20X_I420 v4l2_fourcc('S', '9', '2', '0') /* SN9C20x YUV 4:2:0 */
+#define V4L2_PIX_FMT_PWC1     v4l2_fourcc('P', 'W', 'C', '1') /* pwc older webcam */
+#define V4L2_PIX_FMT_PWC2     v4l2_fourcc('P', 'W', 'C', '2') /* pwc newer webcam */
+#define V4L2_PIX_FMT_ET61X251 v4l2_fourcc('E', '6', '2', '5') /* ET61X251 compression */
+#define V4L2_PIX_FMT_SPCA501  v4l2_fourcc('S', '5', '0', '1') /* YUYV per line */
+#define V4L2_PIX_FMT_SPCA505  v4l2_fourcc('S', '5', '0', '5') /* YYUV per line */
+#define V4L2_PIX_FMT_SPCA508  v4l2_fourcc('S', '5', '0', '8') /* YUVY per line */
+#define V4L2_PIX_FMT_SPCA561  v4l2_fourcc('S', '5', '6', '1') /* compressed GBRG bayer */
+#define V4L2_PIX_FMT_PAC207   v4l2_fourcc('P', '2', '0', '7') /* compressed BGGR bayer */
+#define V4L2_PIX_FMT_MR97310A v4l2_fourcc('M', '3', '1', '0') /* compressed BGGR bayer */
+#define V4L2_PIX_FMT_SQ905C   v4l2_fourcc('9', '0', '5', 'C') /* compressed RGGB bayer */
+#define V4L2_PIX_FMT_PJPG     v4l2_fourcc('P', 'J', 'P', 'G') /* Pixart 73xx JPEG */
+#define V4L2_PIX_FMT_OV511    v4l2_fourcc('O', '5', '1', '1') /* ov511 JPEG */
+#define V4L2_PIX_FMT_OV518    v4l2_fourcc('O', '5', '1', '8') /* ov518 JPEG */
+
+/*
+ *	F O R M A T   E N U M E R A T I O N
+ */
+struct v4l2_fmtdesc {
+	__u32		    index;             /* Format number      */
+	enum v4l2_buf_type  type;              /* buffer type        */
+	__u32               flags;
+	__u8		    description[32];   /* Description string */
+	__u32		    pixelformat;       /* Format fourcc      */
+	__u32		    reserved[4];
+};
+
+#define V4L2_FMT_FLAG_COMPRESSED 0x0001
+#define V4L2_FMT_FLAG_EMULATED   0x0002
+
+#if 1
+	/* Experimental Frame Size and frame rate enumeration */
+/*
+ *	F R A M E   S I Z E   E N U M E R A T I O N
+ */
+enum v4l2_frmsizetypes {
+	V4L2_FRMSIZE_TYPE_DISCRETE	= 1,
+	V4L2_FRMSIZE_TYPE_CONTINUOUS	= 2,
+	V4L2_FRMSIZE_TYPE_STEPWISE	= 3,
+};
+
+struct v4l2_frmsize_discrete {
+	__u32			width;		/* Frame width [pixel] */
+	__u32			height;		/* Frame height [pixel] */
+};
+
+struct v4l2_frmsize_stepwise {
+	__u32			min_width;	/* Minimum frame width [pixel] */
+	__u32			max_width;	/* Maximum frame width [pixel] */
+	__u32			step_width;	/* Frame width step size [pixel] */
+	__u32			min_height;	/* Minimum frame height [pixel] */
+	__u32			max_height;	/* Maximum frame height [pixel] */
+	__u32			step_height;	/* Frame height step size [pixel] */
+};
+
+struct v4l2_frmsizeenum {
+	__u32			index;		/* Frame size number */
+	__u32			pixel_format;	/* Pixel format */
+	__u32			type;		/* Frame size type the device supports. */
+
+	union {					/* Frame size */
+		struct v4l2_frmsize_discrete	discrete;
+		struct v4l2_frmsize_stepwise	stepwise;
+	};
+
+	__u32   reserved[2];			/* Reserved space for future use */
+};
+
+/*
+ *	F R A M E   R A T E   E N U M E R A T I O N
+ */
+enum v4l2_frmivaltypes {
+	V4L2_FRMIVAL_TYPE_DISCRETE	= 1,
+	V4L2_FRMIVAL_TYPE_CONTINUOUS	= 2,
+	V4L2_FRMIVAL_TYPE_STEPWISE	= 3,
+};
+
+struct v4l2_frmival_stepwise {
+	struct v4l2_fract	min;		/* Minimum frame interval [s] */
+	struct v4l2_fract	max;		/* Maximum frame interval [s] */
+	struct v4l2_fract	step;		/* Frame interval step size [s] */
+};
+
+struct v4l2_frmivalenum {
+	__u32			index;		/* Frame format index */
+	__u32			pixel_format;	/* Pixel format */
+	__u32			width;		/* Frame width */
+	__u32			height;		/* Frame height */
+	__u32			type;		/* Frame interval type the device supports. */
+
+	union {					/* Frame interval */
+		struct v4l2_fract		discrete;
+		struct v4l2_frmival_stepwise	stepwise;
+	};
+
+	__u32	reserved[2];			/* Reserved space for future use */
+};
+#endif
+
+/*
+ *	T I M E C O D E
+ */
+struct v4l2_timecode {
+	__u32	type;
+	__u32	flags;
+	__u8	frames;
+	__u8	seconds;
+	__u8	minutes;
+	__u8	hours;
+	__u8	userbits[4];
+};
+
+/*  Type  */
+#define V4L2_TC_TYPE_24FPS		1
+#define V4L2_TC_TYPE_25FPS		2
+#define V4L2_TC_TYPE_30FPS		3
+#define V4L2_TC_TYPE_50FPS		4
+#define V4L2_TC_TYPE_60FPS		5
+
+/*  Flags  */
+#define V4L2_TC_FLAG_DROPFRAME		0x0001 /* "drop-frame" mode */
+#define V4L2_TC_FLAG_COLORFRAME		0x0002
+#define V4L2_TC_USERBITS_field		0x000C
+#define V4L2_TC_USERBITS_USERDEFINED	0x0000
+#define V4L2_TC_USERBITS_8BITCHARS	0x0008
+/* The above is based on SMPTE timecodes */
+
+struct v4l2_jpegcompression {
+	int quality;
+
+	int  APPn;              /* Number of APP segment to be written,
+				 * must be 0..15 */
+	int  APP_len;           /* Length of data in JPEG APPn segment */
+	char APP_data[60];      /* Data in the JPEG APPn segment. */
+
+	int  COM_len;           /* Length of data in JPEG COM segment */
+	char COM_data[60];      /* Data in JPEG COM segment */
+
+	__u32 jpeg_markers;     /* Which markers should go into the JPEG
+				 * output. Unless you exactly know what
+				 * you do, leave them untouched.
+				 * Inluding less markers will make the
+				 * resulting code smaller, but there will
+				 * be fewer aplications which can read it.
+				 * The presence of the APP and COM marker
+				 * is influenced by APP_len and COM_len
+				 * ONLY, not by this property! */
+
+#define V4L2_JPEG_MARKER_DHT (1<<3)    /* Define Huffman Tables */
+#define V4L2_JPEG_MARKER_DQT (1<<4)    /* Define Quantization Tables */
+#define V4L2_JPEG_MARKER_DRI (1<<5)    /* Define Restart Interval */
+#define V4L2_JPEG_MARKER_COM (1<<6)    /* Comment segment */
+#define V4L2_JPEG_MARKER_APP (1<<7)    /* App segment, driver will
+					* allways use APP0 */
+};
+
+/*
+ *	M E M O R Y - M A P P I N G   B U F F E R S
+ */
+struct v4l2_requestbuffers {
+	__u32			count;
+	enum v4l2_buf_type      type;
+	enum v4l2_memory        memory;
+	__u32			reserved[2];
+};
+
+struct v4l2_buffer {
+	__u32			index;
+	enum v4l2_buf_type      type;
+	__u32			bytesused;
+	__u32			flags;
+	enum v4l2_field		field;
+	struct timeval		timestamp;
+	struct v4l2_timecode	timecode;
+	__u32			sequence;
+
+	/* memory location */
+	enum v4l2_memory        memory;
+	union {
+		__u32           offset;
+		unsigned long   userptr;
+	} m;
+	__u32			length;
+	__u32			input;
+	__u32			reserved;
+};
+
+/*  Flags for 'flags' field */
+#define V4L2_BUF_FLAG_MAPPED	0x0001  /* Buffer is mapped (flag) */
+#define V4L2_BUF_FLAG_QUEUED	0x0002	/* Buffer is queued for processing */
+#define V4L2_BUF_FLAG_DONE	0x0004	/* Buffer is ready */
+#define V4L2_BUF_FLAG_KEYFRAME	0x0008	/* Image is a keyframe (I-frame) */
+#define V4L2_BUF_FLAG_PFRAME	0x0010	/* Image is a P-frame */
+#define V4L2_BUF_FLAG_BFRAME	0x0020	/* Image is a B-frame */
+#define V4L2_BUF_FLAG_TIMECODE	0x0100	/* timecode field is valid */
+#define V4L2_BUF_FLAG_INPUT     0x0200  /* input field is valid */
+
+/*
+ *	O V E R L A Y   P R E V I E W
+ */
+struct v4l2_framebuffer {
+	__u32			capability;
+	__u32			flags;
+/* FIXME: in theory we should pass something like PCI device + memory
+ * region + offset instead of some physical address */
+	void                    *base;
+	struct v4l2_pix_format	fmt;
+};
+/*  Flags for the 'capability' field. Read only */
+#define V4L2_FBUF_CAP_EXTERNOVERLAY	0x0001
+#define V4L2_FBUF_CAP_CHROMAKEY		0x0002
+#define V4L2_FBUF_CAP_LIST_CLIPPING     0x0004
+#define V4L2_FBUF_CAP_BITMAP_CLIPPING	0x0008
+#define V4L2_FBUF_CAP_LOCAL_ALPHA	0x0010
+#define V4L2_FBUF_CAP_GLOBAL_ALPHA	0x0020
+#define V4L2_FBUF_CAP_LOCAL_INV_ALPHA	0x0040
+/*  Flags for the 'flags' field. */
+#define V4L2_FBUF_FLAG_PRIMARY		0x0001
+#define V4L2_FBUF_FLAG_OVERLAY		0x0002
+#define V4L2_FBUF_FLAG_CHROMAKEY	0x0004
+#define V4L2_FBUF_FLAG_LOCAL_ALPHA	0x0008
+#define V4L2_FBUF_FLAG_GLOBAL_ALPHA	0x0010
+#define V4L2_FBUF_FLAG_LOCAL_INV_ALPHA	0x0020
+
+struct v4l2_clip {
+	struct v4l2_rect        c;
+	struct v4l2_clip	__user *next;
+};
+
+struct v4l2_window {
+	struct v4l2_rect        w;
+	enum v4l2_field  	field;
+	__u32			chromakey;
+	struct v4l2_clip	__user *clips;
+	__u32			clipcount;
+	void			__user *bitmap;
+	__u8                    global_alpha;
+};
+
+/*
+ *	C A P T U R E   P A R A M E T E R S
+ */
+struct v4l2_captureparm {
+	__u32		   capability;	  /*  Supported modes */
+	__u32		   capturemode;	  /*  Current mode */
+	struct v4l2_fract  timeperframe;  /*  Time per frame in .1us units */
+	__u32		   extendedmode;  /*  Driver-specific extensions */
+	__u32              readbuffers;   /*  # of buffers for read */
+	__u32		   reserved[4];
+};
+
+/*  Flags for 'capability' and 'capturemode' fields */
+#define V4L2_MODE_HIGHQUALITY	0x0001	/*  High quality imaging mode */
+#define V4L2_CAP_TIMEPERFRAME	0x1000	/*  timeperframe field is supported */
+
+struct v4l2_outputparm {
+	__u32		   capability;	 /*  Supported modes */
+	__u32		   outputmode;	 /*  Current mode */
+	struct v4l2_fract  timeperframe; /*  Time per frame in seconds */
+	__u32		   extendedmode; /*  Driver-specific extensions */
+	__u32              writebuffers; /*  # of buffers for write */
+	__u32		   reserved[4];
+};
+
+/*
+ *	I N P U T   I M A G E   C R O P P I N G
+ */
+struct v4l2_cropcap {
+	enum v4l2_buf_type      type;
+	struct v4l2_rect        bounds;
+	struct v4l2_rect        defrect;
+	struct v4l2_fract       pixelaspect;
+};
+
+struct v4l2_crop {
+	enum v4l2_buf_type      type;
+	struct v4l2_rect        c;
+};
+
+/*
+ *      A N A L O G   V I D E O   S T A N D A R D
+ */
+
+typedef __u64 v4l2_std_id;
+
+/* one bit for each */
+#define V4L2_STD_PAL_B          ((v4l2_std_id)0x00000001)
+#define V4L2_STD_PAL_B1         ((v4l2_std_id)0x00000002)
+#define V4L2_STD_PAL_G          ((v4l2_std_id)0x00000004)
+#define V4L2_STD_PAL_H          ((v4l2_std_id)0x00000008)
+#define V4L2_STD_PAL_I          ((v4l2_std_id)0x00000010)
+#define V4L2_STD_PAL_D          ((v4l2_std_id)0x00000020)
+#define V4L2_STD_PAL_D1         ((v4l2_std_id)0x00000040)
+#define V4L2_STD_PAL_K          ((v4l2_std_id)0x00000080)
+
+#define V4L2_STD_PAL_M          ((v4l2_std_id)0x00000100)
+#define V4L2_STD_PAL_N          ((v4l2_std_id)0x00000200)
+#define V4L2_STD_PAL_Nc         ((v4l2_std_id)0x00000400)
+#define V4L2_STD_PAL_60         ((v4l2_std_id)0x00000800)
+
+#define V4L2_STD_NTSC_M         ((v4l2_std_id)0x00001000)
+#define V4L2_STD_NTSC_M_JP      ((v4l2_std_id)0x00002000)
+#define V4L2_STD_NTSC_443       ((v4l2_std_id)0x00004000)
+#define V4L2_STD_NTSC_M_KR      ((v4l2_std_id)0x00008000)
+
+#define V4L2_STD_SECAM_B        ((v4l2_std_id)0x00010000)
+#define V4L2_STD_SECAM_D        ((v4l2_std_id)0x00020000)
+#define V4L2_STD_SECAM_G        ((v4l2_std_id)0x00040000)
+#define V4L2_STD_SECAM_H        ((v4l2_std_id)0x00080000)
+#define V4L2_STD_SECAM_K        ((v4l2_std_id)0x00100000)
+#define V4L2_STD_SECAM_K1       ((v4l2_std_id)0x00200000)
+#define V4L2_STD_SECAM_L        ((v4l2_std_id)0x00400000)
+#define V4L2_STD_SECAM_LC       ((v4l2_std_id)0x00800000)
+
+/* ATSC/HDTV */
+#define V4L2_STD_ATSC_8_VSB     ((v4l2_std_id)0x01000000)
+#define V4L2_STD_ATSC_16_VSB    ((v4l2_std_id)0x02000000)
+
+/* FIXME:
+   Although std_id is 64 bits, there is an issue on PPC32 architecture that
+   makes switch(__u64) to break. So, there's a hack on v4l2-common.c rounding
+   this value to 32 bits.
+   As, currently, the max value is for V4L2_STD_ATSC_16_VSB (30 bits wide),
+   it should work fine. However, if needed to add more than two standards,
+   v4l2-common.c should be fixed.
+ */
+
+/* some merged standards */
+#define V4L2_STD_MN	(V4L2_STD_PAL_M|V4L2_STD_PAL_N|V4L2_STD_PAL_Nc|V4L2_STD_NTSC)
+#define V4L2_STD_B	(V4L2_STD_PAL_B|V4L2_STD_PAL_B1|V4L2_STD_SECAM_B)
+#define V4L2_STD_GH	(V4L2_STD_PAL_G|V4L2_STD_PAL_H|V4L2_STD_SECAM_G|V4L2_STD_SECAM_H)
+#define V4L2_STD_DK	(V4L2_STD_PAL_DK|V4L2_STD_SECAM_DK)
+
+/* some common needed stuff */
+#define V4L2_STD_PAL_BG		(V4L2_STD_PAL_B		|\
+				 V4L2_STD_PAL_B1	|\
+				 V4L2_STD_PAL_G)
+#define V4L2_STD_PAL_DK		(V4L2_STD_PAL_D		|\
+				 V4L2_STD_PAL_D1	|\
+				 V4L2_STD_PAL_K)
+#define V4L2_STD_PAL		(V4L2_STD_PAL_BG	|\
+				 V4L2_STD_PAL_DK	|\
+				 V4L2_STD_PAL_H		|\
+				 V4L2_STD_PAL_I)
+#define V4L2_STD_NTSC           (V4L2_STD_NTSC_M	|\
+				 V4L2_STD_NTSC_M_JP     |\
+				 V4L2_STD_NTSC_M_KR)
+#define V4L2_STD_SECAM_DK      	(V4L2_STD_SECAM_D	|\
+				 V4L2_STD_SECAM_K	|\
+				 V4L2_STD_SECAM_K1)
+#define V4L2_STD_SECAM		(V4L2_STD_SECAM_B	|\
+				 V4L2_STD_SECAM_G	|\
+				 V4L2_STD_SECAM_H	|\
+				 V4L2_STD_SECAM_DK	|\
+				 V4L2_STD_SECAM_L       |\
+				 V4L2_STD_SECAM_LC)
+
+#define V4L2_STD_525_60		(V4L2_STD_PAL_M		|\
+				 V4L2_STD_PAL_60	|\
+				 V4L2_STD_NTSC		|\
+				 V4L2_STD_NTSC_443)
+#define V4L2_STD_625_50		(V4L2_STD_PAL		|\
+				 V4L2_STD_PAL_N		|\
+				 V4L2_STD_PAL_Nc	|\
+				 V4L2_STD_SECAM)
+#define V4L2_STD_ATSC           (V4L2_STD_ATSC_8_VSB    |\
+				 V4L2_STD_ATSC_16_VSB)
+
+#define V4L2_STD_UNKNOWN        0
+#define V4L2_STD_ALL            (V4L2_STD_525_60	|\
+				 V4L2_STD_625_50)
+
+struct v4l2_standard {
+	__u32		     index;
+	v4l2_std_id          id;
+	__u8		     name[24];
+	struct v4l2_fract    frameperiod; /* Frames, not fields */
+	__u32		     framelines;
+	__u32		     reserved[4];
+};
+
+/*
+ *	V I D E O   I N P U T S
+ */
+struct v4l2_input {
+	__u32	     index;		/*  Which input */
+	__u8	     name[32];		/*  Label */
+	__u32	     type;		/*  Type of input */
+	__u32	     audioset;		/*  Associated audios (bitfield) */
+	__u32        tuner;             /*  Associated tuner */
+	v4l2_std_id  std;
+	__u32	     status;
+	__u32	     reserved[4];
+};
+
+/*  Values for the 'type' field */
+#define V4L2_INPUT_TYPE_TUNER		1
+#define V4L2_INPUT_TYPE_CAMERA		2
+
+/* field 'status' - general */
+#define V4L2_IN_ST_NO_POWER    0x00000001  /* Attached device is off */
+#define V4L2_IN_ST_NO_SIGNAL   0x00000002
+#define V4L2_IN_ST_NO_COLOR    0x00000004
+
+/* field 'status' - sensor orientation */
+/* If sensor is mounted upside down set both bits */
+#define V4L2_IN_ST_HFLIP       0x00000010 /* Frames are flipped horizontally */
+#define V4L2_IN_ST_VFLIP       0x00000020 /* Frames are flipped vertically */
+
+/* field 'status' - analog */
+#define V4L2_IN_ST_NO_H_LOCK   0x00000100  /* No horizontal sync lock */
+#define V4L2_IN_ST_COLOR_KILL  0x00000200  /* Color killer is active */
+
+/* field 'status' - digital */
+#define V4L2_IN_ST_NO_SYNC     0x00010000  /* No synchronization lock */
+#define V4L2_IN_ST_NO_EQU      0x00020000  /* No equalizer lock */
+#define V4L2_IN_ST_NO_CARRIER  0x00040000  /* Carrier recovery failed */
+
+/* field 'status' - VCR and set-top box */
+#define V4L2_IN_ST_MACROVISION 0x01000000  /* Macrovision detected */
+#define V4L2_IN_ST_NO_ACCESS   0x02000000  /* Conditional access denied */
+#define V4L2_IN_ST_VTR         0x04000000  /* VTR time constant */
+
+/*
+ *	V I D E O   O U T P U T S
+ */
+struct v4l2_output {
+	__u32	     index;		/*  Which output */
+	__u8	     name[32];		/*  Label */
+	__u32	     type;		/*  Type of output */
+	__u32	     audioset;		/*  Associated audios (bitfield) */
+	__u32	     modulator;         /*  Associated modulator */
+	v4l2_std_id  std;
+	__u32	     reserved[4];
+};
+/*  Values for the 'type' field */
+#define V4L2_OUTPUT_TYPE_MODULATOR		1
+#define V4L2_OUTPUT_TYPE_ANALOG			2
+#define V4L2_OUTPUT_TYPE_ANALOGVGAOVERLAY	3
+
+/*
+ *	C O N T R O L S
+ */
+struct v4l2_control {
+	__u32		     id;
+	__s32		     value;
+};
+
+struct v4l2_ext_control {
+	__u32 id;
+	__u32 size;
+	__u32 reserved2[1];
+	union {
+		__s32 value;
+		__s64 value64;
+		char *string;
+	};
+} __attribute__ ((packed));
+
+struct v4l2_ext_controls {
+	__u32 ctrl_class;
+	__u32 count;
+	__u32 error_idx;
+	__u32 reserved[2];
+	struct v4l2_ext_control *controls;
+};
+
+/*  Values for ctrl_class field */
+#define V4L2_CTRL_CLASS_USER 0x00980000	/* Old-style 'user' controls */
+#define V4L2_CTRL_CLASS_MPEG 0x00990000	/* MPEG-compression controls */
+#define V4L2_CTRL_CLASS_CAMERA 0x009a0000	/* Camera class controls */
+#define V4L2_CTRL_CLASS_FM_TX 0x009b0000	/* FM Modulator control class */
+
+#define V4L2_CTRL_ID_MASK      	  (0x0fffffff)
+#define V4L2_CTRL_ID2CLASS(id)    ((id) & 0x0fff0000UL)
+#define V4L2_CTRL_DRIVER_PRIV(id) (((id) & 0xffff) >= 0x1000)
+
+/*  Used in the VIDIOC_QUERYCTRL ioctl for querying controls */
+struct v4l2_queryctrl {
+	__u32		     id;
+	enum v4l2_ctrl_type  type;
+	__u8		     name[32];	/* Whatever */
+	__s32		     minimum;	/* Note signedness */
+	__s32		     maximum;
+	__s32		     step;
+	__s32		     default_value;
+	__u32                flags;
+	__u32		     reserved[2];
+};
+
+/*  Used in the VIDIOC_QUERYMENU ioctl for querying menu items */
+struct v4l2_querymenu {
+	__u32		id;
+	__u32		index;
+	__u8		name[32];	/* Whatever */
+	__u32		reserved;
+};
+
+/*  Control flags  */
+#define V4L2_CTRL_FLAG_DISABLED		0x0001
+#define V4L2_CTRL_FLAG_GRABBED		0x0002
+#define V4L2_CTRL_FLAG_READ_ONLY 	0x0004
+#define V4L2_CTRL_FLAG_UPDATE 		0x0008
+#define V4L2_CTRL_FLAG_INACTIVE 	0x0010
+#define V4L2_CTRL_FLAG_SLIDER 		0x0020
+#define V4L2_CTRL_FLAG_WRITE_ONLY 	0x0040
+
+/*  Query flag, to be ORed with the control ID */
+#define V4L2_CTRL_FLAG_NEXT_CTRL	0x80000000
+
+/*  User-class control IDs defined by V4L2 */
+#define V4L2_CID_BASE			(V4L2_CTRL_CLASS_USER | 0x900)
+#define V4L2_CID_USER_BASE 		V4L2_CID_BASE
+/*  IDs reserved for driver specific controls */
+#define V4L2_CID_PRIVATE_BASE		0x08000000
+
+#define V4L2_CID_USER_CLASS 		(V4L2_CTRL_CLASS_USER | 1)
+#define V4L2_CID_BRIGHTNESS		(V4L2_CID_BASE+0)
+#define V4L2_CID_CONTRAST		(V4L2_CID_BASE+1)
+#define V4L2_CID_SATURATION		(V4L2_CID_BASE+2)
+#define V4L2_CID_HUE			(V4L2_CID_BASE+3)
+#define V4L2_CID_AUDIO_VOLUME		(V4L2_CID_BASE+5)
+#define V4L2_CID_AUDIO_BALANCE		(V4L2_CID_BASE+6)
+#define V4L2_CID_AUDIO_BASS		(V4L2_CID_BASE+7)
+#define V4L2_CID_AUDIO_TREBLE		(V4L2_CID_BASE+8)
+#define V4L2_CID_AUDIO_MUTE		(V4L2_CID_BASE+9)
+#define V4L2_CID_AUDIO_LOUDNESS		(V4L2_CID_BASE+10)
+#define V4L2_CID_BLACK_LEVEL		(V4L2_CID_BASE+11) /* Deprecated */
+#define V4L2_CID_AUTO_WHITE_BALANCE	(V4L2_CID_BASE+12)
+#define V4L2_CID_DO_WHITE_BALANCE	(V4L2_CID_BASE+13)
+#define V4L2_CID_RED_BALANCE		(V4L2_CID_BASE+14)
+#define V4L2_CID_BLUE_BALANCE		(V4L2_CID_BASE+15)
+#define V4L2_CID_GAMMA			(V4L2_CID_BASE+16)
+#define V4L2_CID_WHITENESS		(V4L2_CID_GAMMA) /* Deprecated */
+#define V4L2_CID_EXPOSURE		(V4L2_CID_BASE+17)
+#define V4L2_CID_AUTOGAIN		(V4L2_CID_BASE+18)
+#define V4L2_CID_GAIN			(V4L2_CID_BASE+19)
+#define V4L2_CID_HFLIP			(V4L2_CID_BASE+20)
+#define V4L2_CID_VFLIP			(V4L2_CID_BASE+21)
+
+/* Deprecated; use V4L2_CID_PAN_RESET and V4L2_CID_TILT_RESET */
+#define V4L2_CID_HCENTER		(V4L2_CID_BASE+22)
+#define V4L2_CID_VCENTER		(V4L2_CID_BASE+23)
+
+#define V4L2_CID_POWER_LINE_FREQUENCY	(V4L2_CID_BASE+24)
+enum v4l2_power_line_frequency {
+	V4L2_CID_POWER_LINE_FREQUENCY_DISABLED	= 0,
+	V4L2_CID_POWER_LINE_FREQUENCY_50HZ	= 1,
+	V4L2_CID_POWER_LINE_FREQUENCY_60HZ	= 2,
+};
+#define V4L2_CID_HUE_AUTO			(V4L2_CID_BASE+25)
+#define V4L2_CID_WHITE_BALANCE_TEMPERATURE	(V4L2_CID_BASE+26)
+#define V4L2_CID_SHARPNESS			(V4L2_CID_BASE+27)
+#define V4L2_CID_BACKLIGHT_COMPENSATION 	(V4L2_CID_BASE+28)
+#define V4L2_CID_CHROMA_AGC                     (V4L2_CID_BASE+29)
+#define V4L2_CID_COLOR_KILLER                   (V4L2_CID_BASE+30)
+#define V4L2_CID_COLORFX			(V4L2_CID_BASE+31)
+enum v4l2_colorfx {
+	V4L2_COLORFX_NONE	= 0,
+	V4L2_COLORFX_BW		= 1,
+	V4L2_COLORFX_SEPIA	= 2,
+};
+#define V4L2_CID_AUTOBRIGHTNESS			(V4L2_CID_BASE+32)
+#define V4L2_CID_BAND_STOP_FILTER		(V4L2_CID_BASE+33)
+
+/* last CID + 1 */
+#define V4L2_CID_LASTP1                         (V4L2_CID_BASE+34)
+
+/*  MPEG-class control IDs defined by V4L2 */
+#define V4L2_CID_MPEG_BASE 			(V4L2_CTRL_CLASS_MPEG | 0x900)
+#define V4L2_CID_MPEG_CLASS 			(V4L2_CTRL_CLASS_MPEG | 1)
+
+/*  MPEG streams */
+#define V4L2_CID_MPEG_STREAM_TYPE 		(V4L2_CID_MPEG_BASE+0)
+enum v4l2_mpeg_stream_type {
+	V4L2_MPEG_STREAM_TYPE_MPEG2_PS   = 0, /* MPEG-2 program stream */
+	V4L2_MPEG_STREAM_TYPE_MPEG2_TS   = 1, /* MPEG-2 transport stream */
+	V4L2_MPEG_STREAM_TYPE_MPEG1_SS   = 2, /* MPEG-1 system stream */
+	V4L2_MPEG_STREAM_TYPE_MPEG2_DVD  = 3, /* MPEG-2 DVD-compatible stream */
+	V4L2_MPEG_STREAM_TYPE_MPEG1_VCD  = 4, /* MPEG-1 VCD-compatible stream */
+	V4L2_MPEG_STREAM_TYPE_MPEG2_SVCD = 5, /* MPEG-2 SVCD-compatible stream */
+};
+#define V4L2_CID_MPEG_STREAM_PID_PMT 		(V4L2_CID_MPEG_BASE+1)
+#define V4L2_CID_MPEG_STREAM_PID_AUDIO 		(V4L2_CID_MPEG_BASE+2)
+#define V4L2_CID_MPEG_STREAM_PID_VIDEO 		(V4L2_CID_MPEG_BASE+3)
+#define V4L2_CID_MPEG_STREAM_PID_PCR 		(V4L2_CID_MPEG_BASE+4)
+#define V4L2_CID_MPEG_STREAM_PES_ID_AUDIO 	(V4L2_CID_MPEG_BASE+5)
+#define V4L2_CID_MPEG_STREAM_PES_ID_VIDEO 	(V4L2_CID_MPEG_BASE+6)
+#define V4L2_CID_MPEG_STREAM_VBI_FMT 		(V4L2_CID_MPEG_BASE+7)
+enum v4l2_mpeg_stream_vbi_fmt {
+	V4L2_MPEG_STREAM_VBI_FMT_NONE = 0,  /* No VBI in the MPEG stream */
+	V4L2_MPEG_STREAM_VBI_FMT_IVTV = 1,  /* VBI in private packets, IVTV format */
+};
+
+/*  MPEG audio */
+#define V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ 	(V4L2_CID_MPEG_BASE+100)
+enum v4l2_mpeg_audio_sampling_freq {
+	V4L2_MPEG_AUDIO_SAMPLING_FREQ_44100 = 0,
+	V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000 = 1,
+	V4L2_MPEG_AUDIO_SAMPLING_FREQ_32000 = 2,
+};
+#define V4L2_CID_MPEG_AUDIO_ENCODING 		(V4L2_CID_MPEG_BASE+101)
+enum v4l2_mpeg_audio_encoding {
+	V4L2_MPEG_AUDIO_ENCODING_LAYER_1 = 0,
+	V4L2_MPEG_AUDIO_ENCODING_LAYER_2 = 1,
+	V4L2_MPEG_AUDIO_ENCODING_LAYER_3 = 2,
+	V4L2_MPEG_AUDIO_ENCODING_AAC     = 3,
+	V4L2_MPEG_AUDIO_ENCODING_AC3     = 4,
+};
+#define V4L2_CID_MPEG_AUDIO_L1_BITRATE 		(V4L2_CID_MPEG_BASE+102)
+enum v4l2_mpeg_audio_l1_bitrate {
+	V4L2_MPEG_AUDIO_L1_BITRATE_32K  = 0,
+	V4L2_MPEG_AUDIO_L1_BITRATE_64K  = 1,
+	V4L2_MPEG_AUDIO_L1_BITRATE_96K  = 2,
+	V4L2_MPEG_AUDIO_L1_BITRATE_128K = 3,
+	V4L2_MPEG_AUDIO_L1_BITRATE_160K = 4,
+	V4L2_MPEG_AUDIO_L1_BITRATE_192K = 5,
+	V4L2_MPEG_AUDIO_L1_BITRATE_224K = 6,
+	V4L2_MPEG_AUDIO_L1_BITRATE_256K = 7,
+	V4L2_MPEG_AUDIO_L1_BITRATE_288K = 8,
+	V4L2_MPEG_AUDIO_L1_BITRATE_320K = 9,
+	V4L2_MPEG_AUDIO_L1_BITRATE_352K = 10,
+	V4L2_MPEG_AUDIO_L1_BITRATE_384K = 11,
+	V4L2_MPEG_AUDIO_L1_BITRATE_416K = 12,
+	V4L2_MPEG_AUDIO_L1_BITRATE_448K = 13,
+};
+#define V4L2_CID_MPEG_AUDIO_L2_BITRATE 		(V4L2_CID_MPEG_BASE+103)
+enum v4l2_mpeg_audio_l2_bitrate {
+	V4L2_MPEG_AUDIO_L2_BITRATE_32K  = 0,
+	V4L2_MPEG_AUDIO_L2_BITRATE_48K  = 1,
+	V4L2_MPEG_AUDIO_L2_BITRATE_56K  = 2,
+	V4L2_MPEG_AUDIO_L2_BITRATE_64K  = 3,
+	V4L2_MPEG_AUDIO_L2_BITRATE_80K  = 4,
+	V4L2_MPEG_AUDIO_L2_BITRATE_96K  = 5,
+	V4L2_MPEG_AUDIO_L2_BITRATE_112K = 6,
+	V4L2_MPEG_AUDIO_L2_BITRATE_128K = 7,
+	V4L2_MPEG_AUDIO_L2_BITRATE_160K = 8,
+	V4L2_MPEG_AUDIO_L2_BITRATE_192K = 9,
+	V4L2_MPEG_AUDIO_L2_BITRATE_224K = 10,
+	V4L2_MPEG_AUDIO_L2_BITRATE_256K = 11,
+	V4L2_MPEG_AUDIO_L2_BITRATE_320K = 12,
+	V4L2_MPEG_AUDIO_L2_BITRATE_384K = 13,
+};
+#define V4L2_CID_MPEG_AUDIO_L3_BITRATE 		(V4L2_CID_MPEG_BASE+104)
+enum v4l2_mpeg_audio_l3_bitrate {
+	V4L2_MPEG_AUDIO_L3_BITRATE_32K  = 0,
+	V4L2_MPEG_AUDIO_L3_BITRATE_40K  = 1,
+	V4L2_MPEG_AUDIO_L3_BITRATE_48K  = 2,
+	V4L2_MPEG_AUDIO_L3_BITRATE_56K  = 3,
+	V4L2_MPEG_AUDIO_L3_BITRATE_64K  = 4,
+	V4L2_MPEG_AUDIO_L3_BITRATE_80K  = 5,
+	V4L2_MPEG_AUDIO_L3_BITRATE_96K  = 6,
+	V4L2_MPEG_AUDIO_L3_BITRATE_112K = 7,
+	V4L2_MPEG_AUDIO_L3_BITRATE_128K = 8,
+	V4L2_MPEG_AUDIO_L3_BITRATE_160K = 9,
+	V4L2_MPEG_AUDIO_L3_BITRATE_192K = 10,
+	V4L2_MPEG_AUDIO_L3_BITRATE_224K = 11,
+	V4L2_MPEG_AUDIO_L3_BITRATE_256K = 12,
+	V4L2_MPEG_AUDIO_L3_BITRATE_320K = 13,
+};
+#define V4L2_CID_MPEG_AUDIO_MODE 		(V4L2_CID_MPEG_BASE+105)
+enum v4l2_mpeg_audio_mode {
+	V4L2_MPEG_AUDIO_MODE_STEREO       = 0,
+	V4L2_MPEG_AUDIO_MODE_JOINT_STEREO = 1,
+	V4L2_MPEG_AUDIO_MODE_DUAL         = 2,
+	V4L2_MPEG_AUDIO_MODE_MONO         = 3,
+};
+#define V4L2_CID_MPEG_AUDIO_MODE_EXTENSION 	(V4L2_CID_MPEG_BASE+106)
+enum v4l2_mpeg_audio_mode_extension {
+	V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_4  = 0,
+	V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_8  = 1,
+	V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_12 = 2,
+	V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_16 = 3,
+};
+#define V4L2_CID_MPEG_AUDIO_EMPHASIS 		(V4L2_CID_MPEG_BASE+107)
+enum v4l2_mpeg_audio_emphasis {
+	V4L2_MPEG_AUDIO_EMPHASIS_NONE         = 0,
+	V4L2_MPEG_AUDIO_EMPHASIS_50_DIV_15_uS = 1,
+	V4L2_MPEG_AUDIO_EMPHASIS_CCITT_J17    = 2,
+};
+#define V4L2_CID_MPEG_AUDIO_CRC 		(V4L2_CID_MPEG_BASE+108)
+enum v4l2_mpeg_audio_crc {
+	V4L2_MPEG_AUDIO_CRC_NONE  = 0,
+	V4L2_MPEG_AUDIO_CRC_CRC16 = 1,
+};
+#define V4L2_CID_MPEG_AUDIO_MUTE 		(V4L2_CID_MPEG_BASE+109)
+#define V4L2_CID_MPEG_AUDIO_AAC_BITRATE		(V4L2_CID_MPEG_BASE+110)
+#define V4L2_CID_MPEG_AUDIO_AC3_BITRATE		(V4L2_CID_MPEG_BASE+111)
+enum v4l2_mpeg_audio_ac3_bitrate {
+	V4L2_MPEG_AUDIO_AC3_BITRATE_32K  = 0,
+	V4L2_MPEG_AUDIO_AC3_BITRATE_40K  = 1,
+	V4L2_MPEG_AUDIO_AC3_BITRATE_48K  = 2,
+	V4L2_MPEG_AUDIO_AC3_BITRATE_56K  = 3,
+	V4L2_MPEG_AUDIO_AC3_BITRATE_64K  = 4,
+	V4L2_MPEG_AUDIO_AC3_BITRATE_80K  = 5,
+	V4L2_MPEG_AUDIO_AC3_BITRATE_96K  = 6,
+	V4L2_MPEG_AUDIO_AC3_BITRATE_112K = 7,
+	V4L2_MPEG_AUDIO_AC3_BITRATE_128K = 8,
+	V4L2_MPEG_AUDIO_AC3_BITRATE_160K = 9,
+	V4L2_MPEG_AUDIO_AC3_BITRATE_192K = 10,
+	V4L2_MPEG_AUDIO_AC3_BITRATE_224K = 11,
+	V4L2_MPEG_AUDIO_AC3_BITRATE_256K = 12,
+	V4L2_MPEG_AUDIO_AC3_BITRATE_320K = 13,
+	V4L2_MPEG_AUDIO_AC3_BITRATE_384K = 14,
+	V4L2_MPEG_AUDIO_AC3_BITRATE_448K = 15,
+	V4L2_MPEG_AUDIO_AC3_BITRATE_512K = 16,
+	V4L2_MPEG_AUDIO_AC3_BITRATE_576K = 17,
+	V4L2_MPEG_AUDIO_AC3_BITRATE_640K = 18,
+};
+
+/*  MPEG video */
+#define V4L2_CID_MPEG_VIDEO_ENCODING 		(V4L2_CID_MPEG_BASE+200)
+enum v4l2_mpeg_video_encoding {
+	V4L2_MPEG_VIDEO_ENCODING_MPEG_1     = 0,
+	V4L2_MPEG_VIDEO_ENCODING_MPEG_2     = 1,
+	V4L2_MPEG_VIDEO_ENCODING_MPEG_4_AVC = 2,
+};
+#define V4L2_CID_MPEG_VIDEO_ASPECT 		(V4L2_CID_MPEG_BASE+201)
+enum v4l2_mpeg_video_aspect {
+	V4L2_MPEG_VIDEO_ASPECT_1x1     = 0,
+	V4L2_MPEG_VIDEO_ASPECT_4x3     = 1,
+	V4L2_MPEG_VIDEO_ASPECT_16x9    = 2,
+	V4L2_MPEG_VIDEO_ASPECT_221x100 = 3,
+};
+#define V4L2_CID_MPEG_VIDEO_B_FRAMES 		(V4L2_CID_MPEG_BASE+202)
+#define V4L2_CID_MPEG_VIDEO_GOP_SIZE 		(V4L2_CID_MPEG_BASE+203)
+#define V4L2_CID_MPEG_VIDEO_GOP_CLOSURE 	(V4L2_CID_MPEG_BASE+204)
+#define V4L2_CID_MPEG_VIDEO_PULLDOWN 		(V4L2_CID_MPEG_BASE+205)
+#define V4L2_CID_MPEG_VIDEO_BITRATE_MODE 	(V4L2_CID_MPEG_BASE+206)
+enum v4l2_mpeg_video_bitrate_mode {
+	V4L2_MPEG_VIDEO_BITRATE_MODE_VBR = 0,
+	V4L2_MPEG_VIDEO_BITRATE_MODE_CBR = 1,
+};
+#define V4L2_CID_MPEG_VIDEO_BITRATE 		(V4L2_CID_MPEG_BASE+207)
+#define V4L2_CID_MPEG_VIDEO_BITRATE_PEAK 	(V4L2_CID_MPEG_BASE+208)
+#define V4L2_CID_MPEG_VIDEO_TEMPORAL_DECIMATION (V4L2_CID_MPEG_BASE+209)
+#define V4L2_CID_MPEG_VIDEO_MUTE 		(V4L2_CID_MPEG_BASE+210)
+#define V4L2_CID_MPEG_VIDEO_MUTE_YUV 		(V4L2_CID_MPEG_BASE+211)
+
+/*  MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */
+#define V4L2_CID_MPEG_CX2341X_BASE 				(V4L2_CTRL_CLASS_MPEG | 0x1000)
+#define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE 	(V4L2_CID_MPEG_CX2341X_BASE+0)
+enum v4l2_mpeg_cx2341x_video_spatial_filter_mode {
+	V4L2_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE_MANUAL = 0,
+	V4L2_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE_AUTO   = 1,
+};
+#define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER 		(V4L2_CID_MPEG_CX2341X_BASE+1)
+#define V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE 	(V4L2_CID_MPEG_CX2341X_BASE+2)
+enum v4l2_mpeg_cx2341x_video_luma_spatial_filter_type {
+	V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_OFF                  = 0,
+	V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_1D_HOR               = 1,
+	V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_1D_VERT              = 2,
+	V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_2D_HV_SEPARABLE      = 3,
+	V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_2D_SYM_NON_SEPARABLE = 4,
+};
+#define V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE 	(V4L2_CID_MPEG_CX2341X_BASE+3)
+enum v4l2_mpeg_cx2341x_video_chroma_spatial_filter_type {
+	V4L2_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE_OFF    = 0,
+	V4L2_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE_1D_HOR = 1,
+};
+#define V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE 	(V4L2_CID_MPEG_CX2341X_BASE+4)
+enum v4l2_mpeg_cx2341x_video_temporal_filter_mode {
+	V4L2_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE_MANUAL = 0,
+	V4L2_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE_AUTO   = 1,
+};
+#define V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER 		(V4L2_CID_MPEG_CX2341X_BASE+5)
+#define V4L2_CID_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE 		(V4L2_CID_MPEG_CX2341X_BASE+6)
+enum v4l2_mpeg_cx2341x_video_median_filter_type {
+	V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_OFF      = 0,
+	V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_HOR      = 1,
+	V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_VERT     = 2,
+	V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_HOR_VERT = 3,
+	V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_DIAG     = 4,
+};
+#define V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_BOTTOM 	(V4L2_CID_MPEG_CX2341X_BASE+7)
+#define V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_TOP 	(V4L2_CID_MPEG_CX2341X_BASE+8)
+#define V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_BOTTOM	(V4L2_CID_MPEG_CX2341X_BASE+9)
+#define V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_TOP 	(V4L2_CID_MPEG_CX2341X_BASE+10)
+#define V4L2_CID_MPEG_CX2341X_STREAM_INSERT_NAV_PACKETS 	(V4L2_CID_MPEG_CX2341X_BASE+11)
+
+/*  Camera class control IDs */
+#define V4L2_CID_CAMERA_CLASS_BASE 	(V4L2_CTRL_CLASS_CAMERA | 0x900)
+#define V4L2_CID_CAMERA_CLASS 		(V4L2_CTRL_CLASS_CAMERA | 1)
+
+#define V4L2_CID_EXPOSURE_AUTO			(V4L2_CID_CAMERA_CLASS_BASE+1)
+enum  v4l2_exposure_auto_type {
+	V4L2_EXPOSURE_AUTO = 0,
+	V4L2_EXPOSURE_MANUAL = 1,
+	V4L2_EXPOSURE_SHUTTER_PRIORITY = 2,
+	V4L2_EXPOSURE_APERTURE_PRIORITY = 3
+};
+#define V4L2_CID_EXPOSURE_ABSOLUTE		(V4L2_CID_CAMERA_CLASS_BASE+2)
+#define V4L2_CID_EXPOSURE_AUTO_PRIORITY		(V4L2_CID_CAMERA_CLASS_BASE+3)
+
+#define V4L2_CID_PAN_RELATIVE			(V4L2_CID_CAMERA_CLASS_BASE+4)
+#define V4L2_CID_TILT_RELATIVE			(V4L2_CID_CAMERA_CLASS_BASE+5)
+#define V4L2_CID_PAN_RESET			(V4L2_CID_CAMERA_CLASS_BASE+6)
+#define V4L2_CID_TILT_RESET			(V4L2_CID_CAMERA_CLASS_BASE+7)
+
+#define V4L2_CID_PAN_ABSOLUTE			(V4L2_CID_CAMERA_CLASS_BASE+8)
+#define V4L2_CID_TILT_ABSOLUTE			(V4L2_CID_CAMERA_CLASS_BASE+9)
+
+#define V4L2_CID_FOCUS_ABSOLUTE			(V4L2_CID_CAMERA_CLASS_BASE+10)
+#define V4L2_CID_FOCUS_RELATIVE			(V4L2_CID_CAMERA_CLASS_BASE+11)
+#define V4L2_CID_FOCUS_AUTO			(V4L2_CID_CAMERA_CLASS_BASE+12)
+
+#define V4L2_CID_ZOOM_ABSOLUTE			(V4L2_CID_CAMERA_CLASS_BASE+13)
+#define V4L2_CID_ZOOM_RELATIVE			(V4L2_CID_CAMERA_CLASS_BASE+14)
+#define V4L2_CID_ZOOM_CONTINUOUS		(V4L2_CID_CAMERA_CLASS_BASE+15)
+
+#define V4L2_CID_PRIVACY			(V4L2_CID_CAMERA_CLASS_BASE+16)
+
+/* FM Modulator class control IDs */
+#define V4L2_CID_FM_TX_CLASS_BASE		(V4L2_CTRL_CLASS_FM_TX | 0x900)
+#define V4L2_CID_FM_TX_CLASS			(V4L2_CTRL_CLASS_FM_TX | 1)
+
+#define V4L2_CID_RDS_TX_DEVIATION		(V4L2_CID_FM_TX_CLASS_BASE + 1)
+#define V4L2_CID_RDS_TX_PI			(V4L2_CID_FM_TX_CLASS_BASE + 2)
+#define V4L2_CID_RDS_TX_PTY			(V4L2_CID_FM_TX_CLASS_BASE + 3)
+#define V4L2_CID_RDS_TX_PS_NAME			(V4L2_CID_FM_TX_CLASS_BASE + 5)
+#define V4L2_CID_RDS_TX_RADIO_TEXT		(V4L2_CID_FM_TX_CLASS_BASE + 6)
+
+#define V4L2_CID_AUDIO_LIMITER_ENABLED		(V4L2_CID_FM_TX_CLASS_BASE + 64)
+#define V4L2_CID_AUDIO_LIMITER_RELEASE_TIME	(V4L2_CID_FM_TX_CLASS_BASE + 65)
+#define V4L2_CID_AUDIO_LIMITER_DEVIATION	(V4L2_CID_FM_TX_CLASS_BASE + 66)
+
+#define V4L2_CID_AUDIO_COMPRESSION_ENABLED	(V4L2_CID_FM_TX_CLASS_BASE + 80)
+#define V4L2_CID_AUDIO_COMPRESSION_GAIN		(V4L2_CID_FM_TX_CLASS_BASE + 81)
+#define V4L2_CID_AUDIO_COMPRESSION_THRESHOLD	(V4L2_CID_FM_TX_CLASS_BASE + 82)
+#define V4L2_CID_AUDIO_COMPRESSION_ATTACK_TIME	(V4L2_CID_FM_TX_CLASS_BASE + 83)
+#define V4L2_CID_AUDIO_COMPRESSION_RELEASE_TIME	(V4L2_CID_FM_TX_CLASS_BASE + 84)
+
+#define V4L2_CID_PILOT_TONE_ENABLED		(V4L2_CID_FM_TX_CLASS_BASE + 96)
+#define V4L2_CID_PILOT_TONE_DEVIATION		(V4L2_CID_FM_TX_CLASS_BASE + 97)
+#define V4L2_CID_PILOT_TONE_FREQUENCY		(V4L2_CID_FM_TX_CLASS_BASE + 98)
+
+#define V4L2_CID_TUNE_PREEMPHASIS		(V4L2_CID_FM_TX_CLASS_BASE + 112)
+enum v4l2_preemphasis {
+	V4L2_PREEMPHASIS_DISABLED	= 0,
+	V4L2_PREEMPHASIS_50_uS		= 1,
+	V4L2_PREEMPHASIS_75_uS		= 2,
+};
+#define V4L2_CID_TUNE_POWER_LEVEL		(V4L2_CID_FM_TX_CLASS_BASE + 113)
+#define V4L2_CID_TUNE_ANTENNA_CAPACITOR		(V4L2_CID_FM_TX_CLASS_BASE + 114)
+
+/*
+ *	T U N I N G
+ */
+struct v4l2_tuner {
+	__u32                   index;
+	__u8			name[32];
+	enum v4l2_tuner_type    type;
+	__u32			capability;
+	__u32			rangelow;
+	__u32			rangehigh;
+	__u32			rxsubchans;
+	__u32			audmode;
+	__s32			signal;
+	__s32			afc;
+	__u32			reserved[4];
+};
+
+struct v4l2_modulator {
+	__u32			index;
+	__u8			name[32];
+	__u32			capability;
+	__u32			rangelow;
+	__u32			rangehigh;
+	__u32			txsubchans;
+	__u32			reserved[4];
+};
+
+/*  Flags for the 'capability' field */
+#define V4L2_TUNER_CAP_LOW		0x0001
+#define V4L2_TUNER_CAP_NORM		0x0002
+#define V4L2_TUNER_CAP_STEREO		0x0010
+#define V4L2_TUNER_CAP_LANG2		0x0020
+#define V4L2_TUNER_CAP_SAP		0x0020
+#define V4L2_TUNER_CAP_LANG1		0x0040
+#define V4L2_TUNER_CAP_RDS		0x0080
+
+/*  Flags for the 'rxsubchans' field */
+#define V4L2_TUNER_SUB_MONO		0x0001
+#define V4L2_TUNER_SUB_STEREO		0x0002
+#define V4L2_TUNER_SUB_LANG2		0x0004
+#define V4L2_TUNER_SUB_SAP		0x0004
+#define V4L2_TUNER_SUB_LANG1		0x0008
+#define V4L2_TUNER_SUB_RDS		0x0010
+
+/*  Values for the 'audmode' field */
+#define V4L2_TUNER_MODE_MONO		0x0000
+#define V4L2_TUNER_MODE_STEREO		0x0001
+#define V4L2_TUNER_MODE_LANG2		0x0002
+#define V4L2_TUNER_MODE_SAP		0x0002
+#define V4L2_TUNER_MODE_LANG1		0x0003
+#define V4L2_TUNER_MODE_LANG1_LANG2	0x0004
+
+struct v4l2_frequency {
+	__u32		      tuner;
+	enum v4l2_tuner_type  type;
+	__u32		      frequency;
+	__u32		      reserved[8];
+};
+
+struct v4l2_hw_freq_seek {
+	__u32		      tuner;
+	enum v4l2_tuner_type  type;
+	__u32		      seek_upward;
+	__u32		      wrap_around;
+	__u32		      reserved[8];
+};
+
+/*
+ *	R D S
+ */
+
+struct v4l2_rds_data {
+	__u8 	lsb;
+	__u8 	msb;
+	__u8 	block;
+} __attribute__ ((packed));
+
+#define V4L2_RDS_BLOCK_MSK 	 0x7
+#define V4L2_RDS_BLOCK_A 	 0
+#define V4L2_RDS_BLOCK_B 	 1
+#define V4L2_RDS_BLOCK_C 	 2
+#define V4L2_RDS_BLOCK_D 	 3
+#define V4L2_RDS_BLOCK_C_ALT 	 4
+#define V4L2_RDS_BLOCK_INVALID 	 7
+
+#define V4L2_RDS_BLOCK_CORRECTED 0x40
+#define V4L2_RDS_BLOCK_ERROR 	 0x80
+
+/*
+ *	A U D I O
+ */
+struct v4l2_audio {
+	__u32	index;
+	__u8	name[32];
+	__u32	capability;
+	__u32	mode;
+	__u32	reserved[2];
+};
+
+/*  Flags for the 'capability' field */
+#define V4L2_AUDCAP_STEREO		0x00001
+#define V4L2_AUDCAP_AVL			0x00002
+
+/*  Flags for the 'mode' field */
+#define V4L2_AUDMODE_AVL		0x00001
+
+struct v4l2_audioout {
+	__u32	index;
+	__u8	name[32];
+	__u32	capability;
+	__u32	mode;
+	__u32	reserved[2];
+};
+
+/*
+ *	M P E G   S E R V I C E S
+ *
+ *	NOTE: EXPERIMENTAL API
+ */
+#if 1
+#define V4L2_ENC_IDX_FRAME_I    (0)
+#define V4L2_ENC_IDX_FRAME_P    (1)
+#define V4L2_ENC_IDX_FRAME_B    (2)
+#define V4L2_ENC_IDX_FRAME_MASK (0xf)
+
+struct v4l2_enc_idx_entry {
+	__u64 offset;
+	__u64 pts;
+	__u32 length;
+	__u32 flags;
+	__u32 reserved[2];
+};
+
+#define V4L2_ENC_IDX_ENTRIES (64)
+struct v4l2_enc_idx {
+	__u32 entries;
+	__u32 entries_cap;
+	__u32 reserved[4];
+	struct v4l2_enc_idx_entry entry[V4L2_ENC_IDX_ENTRIES];
+};
+
+
+#define V4L2_ENC_CMD_START      (0)
+#define V4L2_ENC_CMD_STOP       (1)
+#define V4L2_ENC_CMD_PAUSE      (2)
+#define V4L2_ENC_CMD_RESUME     (3)
+
+/* Flags for V4L2_ENC_CMD_STOP */
+#define V4L2_ENC_CMD_STOP_AT_GOP_END    (1 << 0)
+
+struct v4l2_encoder_cmd {
+	__u32 cmd;
+	__u32 flags;
+	union {
+		struct {
+			__u32 data[8];
+		} raw;
+	};
+};
+
+#endif
+
+
+/*
+ *	D A T A   S E R V I C E S   ( V B I )
+ *
+ *	Data services API by Michael Schimek
+ */
+
+/* Raw VBI */
+struct v4l2_vbi_format {
+	__u32	sampling_rate;		/* in 1 Hz */
+	__u32	offset;
+	__u32	samples_per_line;
+	__u32	sample_format;		/* V4L2_PIX_FMT_* */
+	__s32	start[2];
+	__u32	count[2];
+	__u32	flags;			/* V4L2_VBI_* */
+	__u32	reserved[2];		/* must be zero */
+};
+
+/*  VBI flags  */
+#define V4L2_VBI_UNSYNC		(1 << 0)
+#define V4L2_VBI_INTERLACED	(1 << 1)
+
+/* Sliced VBI
+ *
+ *    This implements is a proposal V4L2 API to allow SLICED VBI
+ * required for some hardware encoders. It should change without
+ * notice in the definitive implementation.
+ */
+
+struct v4l2_sliced_vbi_format {
+	__u16   service_set;
+	/* service_lines[0][...] specifies lines 0-23 (1-23 used) of the first field
+	   service_lines[1][...] specifies lines 0-23 (1-23 used) of the second field
+				 (equals frame lines 313-336 for 625 line video
+				  standards, 263-286 for 525 line standards) */
+	__u16   service_lines[2][24];
+	__u32   io_size;
+	__u32   reserved[2];            /* must be zero */
+};
+
+/* Teletext World System Teletext
+   (WST), defined on ITU-R BT.653-2 */
+#define V4L2_SLICED_TELETEXT_B          (0x0001)
+/* Video Program System, defined on ETS 300 231*/
+#define V4L2_SLICED_VPS                 (0x0400)
+/* Closed Caption, defined on EIA-608 */
+#define V4L2_SLICED_CAPTION_525         (0x1000)
+/* Wide Screen System, defined on ITU-R BT1119.1 */
+#define V4L2_SLICED_WSS_625             (0x4000)
+
+#define V4L2_SLICED_VBI_525             (V4L2_SLICED_CAPTION_525)
+#define V4L2_SLICED_VBI_625             (V4L2_SLICED_TELETEXT_B | V4L2_SLICED_VPS | V4L2_SLICED_WSS_625)
+
+struct v4l2_sliced_vbi_cap {
+	__u16   service_set;
+	/* service_lines[0][...] specifies lines 0-23 (1-23 used) of the first field
+	   service_lines[1][...] specifies lines 0-23 (1-23 used) of the second field
+				 (equals frame lines 313-336 for 625 line video
+				  standards, 263-286 for 525 line standards) */
+	__u16   service_lines[2][24];
+	enum v4l2_buf_type type;
+	__u32   reserved[3];    /* must be 0 */
+};
+
+struct v4l2_sliced_vbi_data {
+	__u32   id;
+	__u32   field;          /* 0: first field, 1: second field */
+	__u32   line;           /* 1-23 */
+	__u32   reserved;       /* must be 0 */
+	__u8    data[48];
+};
+
+/*
+ * Sliced VBI data inserted into MPEG Streams
+ */
+
+/*
+ * V4L2_MPEG_STREAM_VBI_FMT_IVTV:
+ *
+ * Structure of payload contained in an MPEG 2 Private Stream 1 PES Packet in an
+ * MPEG-2 Program Pack that contains V4L2_MPEG_STREAM_VBI_FMT_IVTV Sliced VBI
+ * data
+ *
+ * Note, the MPEG-2 Program Pack and Private Stream 1 PES packet header
+ * definitions are not included here.  See the MPEG-2 specifications for details
+ * on these headers.
+ */
+
+/* Line type IDs */
+#define V4L2_MPEG_VBI_IVTV_TELETEXT_B     (1)
+#define V4L2_MPEG_VBI_IVTV_CAPTION_525    (4)
+#define V4L2_MPEG_VBI_IVTV_WSS_625        (5)
+#define V4L2_MPEG_VBI_IVTV_VPS            (7)
+
+struct v4l2_mpeg_vbi_itv0_line {
+	__u8 id;	/* One of V4L2_MPEG_VBI_IVTV_* above */
+	__u8 data[42];	/* Sliced VBI data for the line */
+} __attribute__ ((packed));
+
+struct v4l2_mpeg_vbi_itv0 {
+	__le32 linemask[2]; /* Bitmasks of VBI service lines present */
+	struct v4l2_mpeg_vbi_itv0_line line[35];
+} __attribute__ ((packed));
+
+struct v4l2_mpeg_vbi_ITV0 {
+	struct v4l2_mpeg_vbi_itv0_line line[36];
+} __attribute__ ((packed));
+
+#define V4L2_MPEG_VBI_IVTV_MAGIC0	"itv0"
+#define V4L2_MPEG_VBI_IVTV_MAGIC1	"ITV0"
+
+struct v4l2_mpeg_vbi_fmt_ivtv {
+	__u8 magic[4];
+	union {
+		struct v4l2_mpeg_vbi_itv0 itv0;
+		struct v4l2_mpeg_vbi_ITV0 ITV0;
+	};
+} __attribute__ ((packed));
+
+/*
+ *	A G G R E G A T E   S T R U C T U R E S
+ */
+
+/*	Stream data format
+ */
+struct v4l2_format {
+	enum v4l2_buf_type type;
+	union {
+		struct v4l2_pix_format		pix;     /* V4L2_BUF_TYPE_VIDEO_CAPTURE */
+		struct v4l2_window		win;     /* V4L2_BUF_TYPE_VIDEO_OVERLAY */
+		struct v4l2_vbi_format		vbi;     /* V4L2_BUF_TYPE_VBI_CAPTURE */
+		struct v4l2_sliced_vbi_format	sliced;  /* V4L2_BUF_TYPE_SLICED_VBI_CAPTURE */
+		__u8	raw_data[200];                   /* user-defined */
+	} fmt;
+};
+
+
+/*	Stream type-dependent parameters
+ */
+struct v4l2_streamparm {
+	enum v4l2_buf_type type;
+	union {
+		struct v4l2_captureparm	capture;
+		struct v4l2_outputparm	output;
+		__u8	raw_data[200];  /* user-defined */
+	} parm;
+};
+
+/*
+ *	A D V A N C E D   D E B U G G I N G
+ *
+ *	NOTE: EXPERIMENTAL API, NEVER RELY ON THIS IN APPLICATIONS!
+ *	FOR DEBUGGING, TESTING AND INTERNAL USE ONLY!
+ */
+
+/* VIDIOC_DBG_G_REGISTER and VIDIOC_DBG_S_REGISTER */
+
+#define V4L2_CHIP_MATCH_HOST       0  /* Match against chip ID on host (0 for the host) */
+#define V4L2_CHIP_MATCH_I2C_DRIVER 1  /* Match against I2C driver name */
+#define V4L2_CHIP_MATCH_I2C_ADDR   2  /* Match against I2C 7-bit address */
+#define V4L2_CHIP_MATCH_AC97       3  /* Match against anciliary AC97 chip */
+
+struct v4l2_dbg_match {
+	__u32 type; /* Match type */
+	union {     /* Match this chip, meaning determined by type */
+		__u32 addr;
+		char name[32];
+	};
+} __attribute__ ((packed));
+
+struct v4l2_dbg_register {
+	struct v4l2_dbg_match match;
+	__u32 size;	/* register size in bytes */
+	__u64 reg;
+	__u64 val;
+} __attribute__ ((packed));
+
+/* VIDIOC_DBG_G_CHIP_IDENT */
+struct v4l2_dbg_chip_ident {
+	struct v4l2_dbg_match match;
+	__u32 ident;       /* chip identifier as specified in <media/v4l2-chip-ident.h> */
+	__u32 revision;    /* chip revision, chip specific */
+} __attribute__ ((packed));
+
+/*
+ *	I O C T L   C O D E S   F O R   V I D E O   D E V I C E S
+ *
+ */
+#define VIDIOC_QUERYCAP		 _IOR('V',  0, struct v4l2_capability)
+#define VIDIOC_RESERVED		  _IO('V',  1)
+#define VIDIOC_ENUM_FMT         _IOWR('V',  2, struct v4l2_fmtdesc)
+#define VIDIOC_G_FMT		_IOWR('V',  4, struct v4l2_format)
+#define VIDIOC_S_FMT		_IOWR('V',  5, struct v4l2_format)
+#define VIDIOC_REQBUFS		_IOWR('V',  8, struct v4l2_requestbuffers)
+#define VIDIOC_QUERYBUF		_IOWR('V',  9, struct v4l2_buffer)
+#define VIDIOC_G_FBUF		 _IOR('V', 10, struct v4l2_framebuffer)
+#define VIDIOC_S_FBUF		 _IOW('V', 11, struct v4l2_framebuffer)
+#define VIDIOC_OVERLAY		 _IOW('V', 14, int)
+#define VIDIOC_QBUF		_IOWR('V', 15, struct v4l2_buffer)
+#define VIDIOC_DQBUF		_IOWR('V', 17, struct v4l2_buffer)
+#define VIDIOC_STREAMON		 _IOW('V', 18, int)
+#define VIDIOC_STREAMOFF	 _IOW('V', 19, int)
+#define VIDIOC_G_PARM		_IOWR('V', 21, struct v4l2_streamparm)
+#define VIDIOC_S_PARM		_IOWR('V', 22, struct v4l2_streamparm)
+#define VIDIOC_G_STD		 _IOR('V', 23, v4l2_std_id)
+#define VIDIOC_S_STD		 _IOW('V', 24, v4l2_std_id)
+#define VIDIOC_ENUMSTD		_IOWR('V', 25, struct v4l2_standard)
+#define VIDIOC_ENUMINPUT	_IOWR('V', 26, struct v4l2_input)
+#define VIDIOC_G_CTRL		_IOWR('V', 27, struct v4l2_control)
+#define VIDIOC_S_CTRL		_IOWR('V', 28, struct v4l2_control)
+#define VIDIOC_G_TUNER		_IOWR('V', 29, struct v4l2_tuner)
+#define VIDIOC_S_TUNER		 _IOW('V', 30, struct v4l2_tuner)
+#define VIDIOC_G_AUDIO		 _IOR('V', 33, struct v4l2_audio)
+#define VIDIOC_S_AUDIO		 _IOW('V', 34, struct v4l2_audio)
+#define VIDIOC_QUERYCTRL	_IOWR('V', 36, struct v4l2_queryctrl)
+#define VIDIOC_QUERYMENU	_IOWR('V', 37, struct v4l2_querymenu)
+#define VIDIOC_G_INPUT		 _IOR('V', 38, int)
+#define VIDIOC_S_INPUT		_IOWR('V', 39, int)
+#define VIDIOC_G_OUTPUT		 _IOR('V', 46, int)
+#define VIDIOC_S_OUTPUT		_IOWR('V', 47, int)
+#define VIDIOC_ENUMOUTPUT	_IOWR('V', 48, struct v4l2_output)
+#define VIDIOC_G_AUDOUT		 _IOR('V', 49, struct v4l2_audioout)
+#define VIDIOC_S_AUDOUT		 _IOW('V', 50, struct v4l2_audioout)
+#define VIDIOC_G_MODULATOR	_IOWR('V', 54, struct v4l2_modulator)
+#define VIDIOC_S_MODULATOR	 _IOW('V', 55, struct v4l2_modulator)
+#define VIDIOC_G_FREQUENCY	_IOWR('V', 56, struct v4l2_frequency)
+#define VIDIOC_S_FREQUENCY	 _IOW('V', 57, struct v4l2_frequency)
+#define VIDIOC_CROPCAP		_IOWR('V', 58, struct v4l2_cropcap)
+#define VIDIOC_G_CROP		_IOWR('V', 59, struct v4l2_crop)
+#define VIDIOC_S_CROP		 _IOW('V', 60, struct v4l2_crop)
+#define VIDIOC_G_JPEGCOMP	 _IOR('V', 61, struct v4l2_jpegcompression)
+#define VIDIOC_S_JPEGCOMP	 _IOW('V', 62, struct v4l2_jpegcompression)
+#define VIDIOC_QUERYSTD      	 _IOR('V', 63, v4l2_std_id)
+#define VIDIOC_TRY_FMT      	_IOWR('V', 64, struct v4l2_format)
+#define VIDIOC_ENUMAUDIO	_IOWR('V', 65, struct v4l2_audio)
+#define VIDIOC_ENUMAUDOUT	_IOWR('V', 66, struct v4l2_audioout)
+#define VIDIOC_G_PRIORITY        _IOR('V', 67, enum v4l2_priority)
+#define VIDIOC_S_PRIORITY        _IOW('V', 68, enum v4l2_priority)
+#define VIDIOC_G_SLICED_VBI_CAP _IOWR('V', 69, struct v4l2_sliced_vbi_cap)
+#define VIDIOC_LOG_STATUS         _IO('V', 70)
+#define VIDIOC_G_EXT_CTRLS	_IOWR('V', 71, struct v4l2_ext_controls)
+#define VIDIOC_S_EXT_CTRLS	_IOWR('V', 72, struct v4l2_ext_controls)
+#define VIDIOC_TRY_EXT_CTRLS	_IOWR('V', 73, struct v4l2_ext_controls)
+#if 1
+#define VIDIOC_ENUM_FRAMESIZES	_IOWR('V', 74, struct v4l2_frmsizeenum)
+#define VIDIOC_ENUM_FRAMEINTERVALS _IOWR('V', 75, struct v4l2_frmivalenum)
+#define VIDIOC_G_ENC_INDEX       _IOR('V', 76, struct v4l2_enc_idx)
+#define VIDIOC_ENCODER_CMD      _IOWR('V', 77, struct v4l2_encoder_cmd)
+#define VIDIOC_TRY_ENCODER_CMD  _IOWR('V', 78, struct v4l2_encoder_cmd)
+#endif
+
+#if 1
+/* Experimental, meant for debugging, testing and internal use.
+   Only implemented if CONFIG_VIDEO_ADV_DEBUG is defined.
+   You must be root to use these ioctls. Never use these in applications! */
+#define	VIDIOC_DBG_S_REGISTER 	 _IOW('V', 79, struct v4l2_dbg_register)
+#define	VIDIOC_DBG_G_REGISTER 	_IOWR('V', 80, struct v4l2_dbg_register)
+
+/* Experimental, meant for debugging, testing and internal use.
+   Never use this ioctl in applications! */
+#define VIDIOC_DBG_G_CHIP_IDENT _IOWR('V', 81, struct v4l2_dbg_chip_ident)
+#endif
+
+#define VIDIOC_S_HW_FREQ_SEEK	 _IOW('V', 82, struct v4l2_hw_freq_seek)
+/* Reminder: when adding new ioctls please add support for them to
+   drivers/media/video/v4l2-compat-ioctl32.c as well! */
+
+#ifdef __OLD_VIDIOC_
+/* for compatibility, will go away some day */
+#define VIDIOC_OVERLAY_OLD     	_IOWR('V', 14, int)
+#define VIDIOC_S_PARM_OLD      	 _IOW('V', 22, struct v4l2_streamparm)
+#define VIDIOC_S_CTRL_OLD      	 _IOW('V', 28, struct v4l2_control)
+#define VIDIOC_G_AUDIO_OLD     	_IOWR('V', 33, struct v4l2_audio)
+#define VIDIOC_G_AUDOUT_OLD    	_IOWR('V', 49, struct v4l2_audioout)
+#define VIDIOC_CROPCAP_OLD     	 _IOR('V', 58, struct v4l2_cropcap)
+#endif
+
+#define BASE_VIDIOC_PRIVATE	192		/* 192-255 are private */
+
+#endif /* __LINUX_VIDEODEV2_H */
diff -uNra linux-3.0.82/drivers/media/video/videodev.h linux-3.0.82x/drivers/media/video/videodev.h
--- linux-3.0.82/drivers/media/video/videodev.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/media/video/videodev.h	2017-09-23 03:42:49.638676225 +0800
@@ -0,0 +1,340 @@
+/*
+ *	Video for Linux version 1 - OBSOLETE
+ *
+ *	Header file for v4l1 drivers and applications, for
+ *	Linux kernels 2.2.x or 2.4.x.
+ *
+ *	Provides header for legacy drivers and applications
+ *
+ *	See http://linuxtv.org for more info
+ *
+ */
+#ifndef __LINUX_VIDEODEV_H
+#define __LINUX_VIDEODEV_H
+
+#include <linux/types.h>
+#include <linux/ioctl.h>
+#include <linux/videodev2.h>
+
+#if defined(__MIN_V4L1) && defined (__KERNEL__)
+
+/*
+ * Used by those V4L2 core functions that need a minimum V4L1 support,
+ * in order to allow V4L1 Compatibilty code compilation.
+ */
+
+struct video_mbuf
+{
+	int	size;		/* Total memory to map */
+	int	frames;		/* Frames */
+	int	offsets[VIDEO_MAX_FRAME];
+};
+
+#define VIDIOCGMBUF		_IOR('v',20, struct video_mbuf)		/* Memory map buffer info */
+
+#else
+#if defined(CONFIG_VIDEO_V4L1_COMPAT) || !defined (__KERNEL__)
+
+#define VID_TYPE_CAPTURE	1	/* Can capture */
+#define VID_TYPE_TUNER		2	/* Can tune */
+#define VID_TYPE_TELETEXT	4	/* Does teletext */
+#define VID_TYPE_OVERLAY	8	/* Overlay onto frame buffer */
+#define VID_TYPE_CHROMAKEY	16	/* Overlay by chromakey */
+#define VID_TYPE_CLIPPING	32	/* Can clip */
+#define VID_TYPE_FRAMERAM	64	/* Uses the frame buffer memory */
+#define VID_TYPE_SCALES		128	/* Scalable */
+#define VID_TYPE_MONOCHROME	256	/* Monochrome only */
+#define VID_TYPE_SUBCAPTURE	512	/* Can capture subareas of the image */
+#define VID_TYPE_MPEG_DECODER	1024	/* Can decode MPEG streams */
+#define VID_TYPE_MPEG_ENCODER	2048	/* Can encode MPEG streams */
+#define VID_TYPE_MJPEG_DECODER	4096	/* Can decode MJPEG streams */
+#define VID_TYPE_MJPEG_ENCODER	8192	/* Can encode MJPEG streams */
+
+struct video_capability
+{
+	char name[32];
+	int type;
+	int channels;	/* Num channels */
+	int audios;	/* Num audio devices */
+	int maxwidth;	/* Supported width */
+	int maxheight;	/* And height */
+	int minwidth;	/* Supported width */
+	int minheight;	/* And height */
+};
+
+
+struct video_channel
+{
+	int channel;
+	char name[32];
+	int tuners;
+	__u32  flags;
+#define VIDEO_VC_TUNER		1	/* Channel has a tuner */
+#define VIDEO_VC_AUDIO		2	/* Channel has audio */
+	__u16  type;
+#define VIDEO_TYPE_TV		1
+#define VIDEO_TYPE_CAMERA	2
+	__u16 norm;			/* Norm set by channel */
+};
+
+struct video_tuner
+{
+	int tuner;
+	char name[32];
+	unsigned long rangelow, rangehigh;	/* Tuner range */
+	__u32 flags;
+#define VIDEO_TUNER_PAL		1
+#define VIDEO_TUNER_NTSC	2
+#define VIDEO_TUNER_SECAM	4
+#define VIDEO_TUNER_LOW		8	/* Uses KHz not MHz */
+#define VIDEO_TUNER_NORM	16	/* Tuner can set norm */
+#define VIDEO_TUNER_STEREO_ON	128	/* Tuner is seeing stereo */
+#define VIDEO_TUNER_RDS_ON      256     /* Tuner is seeing an RDS datastream */
+#define VIDEO_TUNER_MBS_ON      512     /* Tuner is seeing an MBS datastream */
+	__u16 mode;			/* PAL/NTSC/SECAM/OTHER */
+#define VIDEO_MODE_PAL		0
+#define VIDEO_MODE_NTSC		1
+#define VIDEO_MODE_SECAM	2
+#define VIDEO_MODE_AUTO		3
+	__u16 signal;			/* Signal strength 16bit scale */
+};
+
+struct video_picture
+{
+	__u16	brightness;
+	__u16	hue;
+	__u16	colour;
+	__u16	contrast;
+	__u16	whiteness;	/* Black and white only */
+	__u16	depth;		/* Capture depth */
+	__u16   palette;	/* Palette in use */
+#define VIDEO_PALETTE_GREY	1	/* Linear greyscale */
+#define VIDEO_PALETTE_HI240	2	/* High 240 cube (BT848) */
+#define VIDEO_PALETTE_RGB565	3	/* 565 16 bit RGB */
+#define VIDEO_PALETTE_RGB24	4	/* 24bit RGB */
+#define VIDEO_PALETTE_RGB32	5	/* 32bit RGB */
+#define VIDEO_PALETTE_RGB555	6	/* 555 15bit RGB */
+#define VIDEO_PALETTE_YUV422	7	/* YUV422 capture */
+#define VIDEO_PALETTE_YUYV	8
+#define VIDEO_PALETTE_UYVY	9	/* The great thing about standards is ... */
+#define VIDEO_PALETTE_YUV420	10
+#define VIDEO_PALETTE_YUV411	11	/* YUV411 capture */
+#define VIDEO_PALETTE_RAW	12	/* RAW capture (BT848) */
+#define VIDEO_PALETTE_YUV422P	13	/* YUV 4:2:2 Planar */
+#define VIDEO_PALETTE_YUV411P	14	/* YUV 4:1:1 Planar */
+#define VIDEO_PALETTE_YUV420P	15	/* YUV 4:2:0 Planar */
+#define VIDEO_PALETTE_YUV410P	16	/* YUV 4:1:0 Planar */
+#define VIDEO_PALETTE_PLANAR	13	/* start of planar entries */
+#define VIDEO_PALETTE_COMPONENT 7	/* start of component entries */
+};
+
+struct video_audio
+{
+	int	audio;		/* Audio channel */
+	__u16	volume;		/* If settable */
+	__u16	bass, treble;
+	__u32	flags;
+#define VIDEO_AUDIO_MUTE	1
+#define VIDEO_AUDIO_MUTABLE	2
+#define VIDEO_AUDIO_VOLUME	4
+#define VIDEO_AUDIO_BASS	8
+#define VIDEO_AUDIO_TREBLE	16
+#define VIDEO_AUDIO_BALANCE	32
+	char    name[16];
+#define VIDEO_SOUND_MONO	1
+#define VIDEO_SOUND_STEREO	2
+#define VIDEO_SOUND_LANG1	4
+#define VIDEO_SOUND_LANG2	8
+	__u16   mode;
+	__u16	balance;	/* Stereo balance */
+	__u16	step;		/* Step actual volume uses */
+};
+
+struct video_clip
+{
+	__s32	x,y;
+	__s32	width, height;
+	struct	video_clip *next;	/* For user use/driver use only */
+};
+
+struct video_window
+{
+	__u32	x,y;			/* Position of window */
+	__u32	width,height;		/* Its size */
+	__u32	chromakey;
+	__u32	flags;
+	struct	video_clip __user *clips;	/* Set only */
+	int	clipcount;
+#define VIDEO_WINDOW_INTERLACE	1
+#define VIDEO_WINDOW_CHROMAKEY	16	/* Overlay by chromakey */
+#define VIDEO_CLIP_BITMAP	-1
+/* bitmap is 1024x625, a '1' bit represents a clipped pixel */
+#define VIDEO_CLIPMAP_SIZE	(128 * 625)
+};
+
+struct video_capture
+{
+	__u32 	x,y;			/* Offsets into image */
+	__u32	width, height;		/* Area to capture */
+	__u16	decimation;		/* Decimation divider */
+	__u16	flags;			/* Flags for capture */
+#define VIDEO_CAPTURE_ODD		0	/* Temporal */
+#define VIDEO_CAPTURE_EVEN		1
+};
+
+struct video_buffer
+{
+	void	*base;
+	int	height,width;
+	int	depth;
+	int	bytesperline;
+};
+
+struct video_mmap
+{
+	unsigned	int frame;		/* Frame (0 - n) for double buffer */
+	int		height,width;
+	unsigned	int format;		/* should be VIDEO_PALETTE_* */
+};
+
+struct video_key
+{
+	__u8	key[8];
+	__u32	flags;
+};
+
+struct video_mbuf
+{
+	int	size;		/* Total memory to map */
+	int	frames;		/* Frames */
+	int	offsets[VIDEO_MAX_FRAME];
+};
+
+#define 	VIDEO_NO_UNIT	(-1)
+
+struct video_unit
+{
+	int 	video;		/* Video minor */
+	int	vbi;		/* VBI minor */
+	int	radio;		/* Radio minor */
+	int	audio;		/* Audio minor */
+	int	teletext;	/* Teletext minor */
+};
+
+struct vbi_format {
+	__u32	sampling_rate;	/* in Hz */
+	__u32	samples_per_line;
+	__u32	sample_format;	/* VIDEO_PALETTE_RAW only (1 byte) */
+	__s32	start[2];	/* starting line for each frame */
+	__u32	count[2];	/* count of lines for each frame */
+	__u32	flags;
+#define	VBI_UNSYNC	1	/* can distingues between top/bottom field */
+#define	VBI_INTERLACED	2	/* lines are interlaced */
+};
+
+/* video_info is biased towards hardware mpeg encode/decode */
+/* but it could apply generically to any hardware compressor/decompressor */
+struct video_info
+{
+	__u32	frame_count;	/* frames output since decode/encode began */
+	__u32	h_size;		/* current unscaled horizontal size */
+	__u32	v_size;		/* current unscaled veritcal size */
+	__u32	smpte_timecode;	/* current SMPTE timecode (for current GOP) */
+	__u32	picture_type;	/* current picture type */
+	__u32	temporal_reference;	/* current temporal reference */
+	__u8	user_data[256];	/* user data last found in compressed stream */
+	/* user_data[0] contains user data flags, user_data[1] has count */
+};
+
+/* generic structure for setting playback modes */
+struct video_play_mode
+{
+	int	mode;
+	int	p1;
+	int	p2;
+};
+
+/* for loading microcode / fpga programming */
+struct video_code
+{
+	char	loadwhat[16];	/* name or tag of file being passed */
+	int	datasize;
+	__u8	*data;
+};
+
+#define VIDIOCGCAP		_IOR('v',1,struct video_capability)	/* Get capabilities */
+#define VIDIOCGCHAN		_IOWR('v',2,struct video_channel)	/* Get channel info (sources) */
+#define VIDIOCSCHAN		_IOW('v',3,struct video_channel)	/* Set channel 	*/
+#define VIDIOCGTUNER		_IOWR('v',4,struct video_tuner)		/* Get tuner abilities */
+#define VIDIOCSTUNER		_IOW('v',5,struct video_tuner)		/* Tune the tuner for the current channel */
+#define VIDIOCGPICT		_IOR('v',6,struct video_picture)	/* Get picture properties */
+#define VIDIOCSPICT		_IOW('v',7,struct video_picture)	/* Set picture properties */
+#define VIDIOCCAPTURE		_IOW('v',8,int)				/* Start, end capture */
+#define VIDIOCGWIN		_IOR('v',9, struct video_window)	/* Get the video overlay window */
+#define VIDIOCSWIN		_IOW('v',10, struct video_window)	/* Set the video overlay window - passes clip list for hardware smarts , chromakey etc */
+#define VIDIOCGFBUF		_IOR('v',11, struct video_buffer)	/* Get frame buffer */
+#define VIDIOCSFBUF		_IOW('v',12, struct video_buffer)	/* Set frame buffer - root only */
+#define VIDIOCKEY		_IOR('v',13, struct video_key)		/* Video key event - to dev 255 is to all - cuts capture on all DMA windows with this key (0xFFFFFFFF == all) */
+#define VIDIOCGFREQ		_IOR('v',14, unsigned long)		/* Set tuner */
+#define VIDIOCSFREQ		_IOW('v',15, unsigned long)		/* Set tuner */
+#define VIDIOCGAUDIO		_IOR('v',16, struct video_audio)	/* Get audio info */
+#define VIDIOCSAUDIO		_IOW('v',17, struct video_audio)	/* Audio source, mute etc */
+#define VIDIOCSYNC		_IOW('v',18, int)			/* Sync with mmap grabbing */
+#define VIDIOCMCAPTURE		_IOW('v',19, struct video_mmap)		/* Grab frames */
+#define VIDIOCGMBUF		_IOR('v',20, struct video_mbuf)		/* Memory map buffer info */
+#define VIDIOCGUNIT		_IOR('v',21, struct video_unit)		/* Get attached units */
+#define VIDIOCGCAPTURE		_IOR('v',22, struct video_capture)	/* Get subcapture */
+#define VIDIOCSCAPTURE		_IOW('v',23, struct video_capture)	/* Set subcapture */
+#define VIDIOCSPLAYMODE		_IOW('v',24, struct video_play_mode)	/* Set output video mode/feature */
+#define VIDIOCSWRITEMODE	_IOW('v',25, int)			/* Set write mode */
+#define VIDIOCGPLAYINFO		_IOR('v',26, struct video_info)		/* Get current playback info from hardware */
+#define VIDIOCSMICROCODE	_IOW('v',27, struct video_code)		/* Load microcode into hardware */
+#define	VIDIOCGVBIFMT		_IOR('v',28, struct vbi_format)		/* Get VBI information */
+#define	VIDIOCSVBIFMT		_IOW('v',29, struct vbi_format)		/* Set VBI information */
+
+
+#define BASE_VIDIOCPRIVATE	192		/* 192-255 are private */
+
+/* VIDIOCSWRITEMODE */
+#define VID_WRITE_MPEG_AUD		0
+#define VID_WRITE_MPEG_VID		1
+#define VID_WRITE_OSD			2
+#define VID_WRITE_TTX			3
+#define VID_WRITE_CC			4
+#define VID_WRITE_MJPEG			5
+
+/* VIDIOCSPLAYMODE */
+#define VID_PLAY_VID_OUT_MODE		0
+	/* p1: = VIDEO_MODE_PAL, VIDEO_MODE_NTSC, etc ... */
+#define VID_PLAY_GENLOCK		1
+	/* p1: 0 = OFF, 1 = ON */
+	/* p2: GENLOCK FINE DELAY value */
+#define VID_PLAY_NORMAL			2
+#define VID_PLAY_PAUSE			3
+#define VID_PLAY_SINGLE_FRAME		4
+#define VID_PLAY_FAST_FORWARD		5
+#define VID_PLAY_SLOW_MOTION		6
+#define VID_PLAY_IMMEDIATE_NORMAL	7
+#define VID_PLAY_SWITCH_CHANNELS	8
+#define VID_PLAY_FREEZE_FRAME		9
+#define VID_PLAY_STILL_MODE		10
+#define VID_PLAY_MASTER_MODE		11
+	/* p1: see below */
+#define		VID_PLAY_MASTER_NONE	1
+#define		VID_PLAY_MASTER_VIDEO	2
+#define		VID_PLAY_MASTER_AUDIO	3
+#define VID_PLAY_ACTIVE_SCANLINES	12
+	/* p1 = first active; p2 = last active */
+#define VID_PLAY_RESET			13
+#define VID_PLAY_END_MARK		14
+
+#endif /* CONFIG_VIDEO_V4L1_COMPAT */
+#endif /* __MIN_V4L1 */
+
+#endif /* __LINUX_VIDEODEV_H */
+
+/*
+ * Local variables:
+ * c-basic-offset: 8
+ * End:
+ */
diff -uNra linux-3.0.82/drivers/misc/easy_spi_dab.c linux-3.0.82x/drivers/misc/easy_spi_dab.c
--- linux-3.0.82/drivers/misc/easy_spi_dab.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/misc/easy_spi_dab.c	2017-09-23 03:42:49.638676225 +0800
@@ -0,0 +1,207 @@
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/device.h>
+#include <linux/interrupt.h>
+#include <linux/mutex.h>
+#include <linux/spi/spi.h>
+#include <linux/miscdevice.h>
+#include <linux/completion.h>
+#include <linux/workqueue.h>
+#include <linux/fs.h>
+#include <asm/ioctl.h>
+
+#define	CMD_DAB_ON	_IO('E', 0x11)
+#define	CMD_DAB_OFF	_IO('E', 0x12)
+
+#define	BUF_LENGTH	2048
+#define	SINGLE_LENGTH	8
+#define	BUF_COUNT	(BUF_LENGTH / SINGLE_LENGTH)
+
+struct easy_dab_ring
+{
+	int ring_head;	//for recorde read pos
+	int ring_tail;	//for recorde write pos
+	int state;
+	unsigned char *ring_buf;
+	struct mutex easy_dab_mutex;
+	struct completion easy_dab_completion;
+	struct work_struct easy_work;
+};
+
+static struct easy_dab_ring *ring = NULL;
+static struct spi_device *easy_dab_spi = NULL;
+static int __devinit easy_dab_probe(struct spi_device *spi);
+
+static int easy_dab_open(struct inode *inode, struct file *file)
+{
+	schedule_work (&ring->easy_work);
+	ring->state = 1;
+	return 0;
+}
+
+static int easy_dab_close(struct inode *inode, struct file *file)
+{
+	cancel_work_sync (&ring->easy_work);
+	ring->state = 0;
+	return 0;
+}
+
+static long easy_dab_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+	switch (cmd)
+	{
+		case	CMD_DAB_ON:
+			if (ring->state == 1)
+				break;
+			schedule_work (&ring->easy_work);
+			ring->state = 1;
+			break;
+
+		case	CMD_DAB_OFF:
+			if (ring->state == 0)
+				break;
+			cancel_work_sync (&ring->easy_work);
+			ring->state = 0;
+			break;
+	}
+	return 0;
+}
+
+static int easy_dab_read (struct file *file, char __user *buf, size_t count, loff_t *ptr)
+{
+	int count1 = 0;
+	int write_pos;
+	int read_pos;
+
+	wait_for_completion (&ring->easy_dab_completion);
+	init_completion(&ring->easy_dab_completion);
+	
+	mutex_lock(&ring->easy_dab_mutex);
+	write_pos = ring->ring_tail;
+	read_pos = ring->ring_head;
+	mutex_unlock(&ring->easy_dab_mutex);
+
+	count1 = write_pos - read_pos;
+	if (count1 > 0)
+	{
+		count1 = (count1 > count) ? count : count1;
+		if (copy_to_user (buf, (ring->ring_buf + read_pos), count1))
+		{
+			printk ("Copy data to userspace error !\n");
+			return -EFAULT;
+		}
+		ring->ring_head = read_pos + count1;
+	}
+	else if (count1 < 0)
+	{
+		count1 = BUF_LENGTH - read_pos - 1;
+		if (count1 != 0)
+			if (copy_to_user (buf, (ring->ring_buf + read_pos), count1))
+			{
+				printk ("Copy data to userspace error !\n");
+				return -EFAULT;
+			}
+
+		buf += count1;
+		count1 += (write_pos + 1);
+		if (copy_to_user (buf, ring->ring_buf, (write_pos + 1)))
+		{
+			printk ("Copy data to userspace error !\n");
+			return -EFAULT;
+		}
+
+		ring->ring_head = write_pos;
+	}
+
+	return count1;
+}
+
+static void easy_get_data_work(struct work_struct *work)
+{
+	unsigned char *ptr;
+	int retval = 0;
+	ptr = ring->ring_buf;
+	while (1)
+	{
+		retval = spi_write_then_read(easy_dab_spi, NULL, 0, ptr, SINGLE_LENGTH);
+		if (retval < 0)
+		{
+			printk ("easy_dab get data error %d \n", retval);
+			continue;
+		}
+		
+		mutex_lock(&ring->easy_dab_mutex);
+		ring->ring_tail = (ring->ring_tail + SINGLE_LENGTH) % BUF_LENGTH;
+		ptr = ring->ring_buf + ring->ring_tail;
+		mutex_unlock(&ring->easy_dab_mutex);
+		complete(&ring->easy_dab_completion);
+	}
+}
+
+static const struct file_operations easy_dab_ops = {
+	.owner		= THIS_MODULE,
+	.open		= easy_dab_open,
+	.release	= easy_dab_close,
+	.read		= easy_dab_read,
+	.unlocked_ioctl	= easy_dab_ioctl,
+};
+
+static struct miscdevice easy_dab_miscdev = {
+	MISC_DYNAMIC_MINOR,
+	"easy_dab",
+	&easy_dab_ops,
+};
+
+static struct spi_driver easy_dab_driver = {
+	.driver = {
+		.name	= "easy_dab",	
+		.bus	= &spi_bus_type,
+		.owner	= THIS_MODULE,
+	},
+	.probe	= easy_dab_probe,
+};
+
+static int __devinit easy_dab_probe(struct spi_device *spi)
+{
+	ring = kzalloc (sizeof *ring, GFP_KERNEL); 
+	if (!ring)
+		return -ENOMEM;
+	ring->ring_buf = kmalloc (BUF_LENGTH, GFP_KERNEL);
+	if (!ring->ring_buf)
+	{
+		kfree (ring);
+		return -ENOMEM;
+	}	
+	ring->ring_head = ring->ring_tail = 0;
+
+	mutex_init(&ring->easy_dab_mutex);
+	init_completion(&ring->easy_dab_completion);
+	INIT_WORK(&ring->easy_work, easy_get_data_work);
+
+	if (misc_register (&easy_dab_miscdev))
+	{
+		printk ("register easy_dab misc device error !\n");
+		return -EBUSY;
+	}
+	easy_dab_spi = spi;
+	return 0;
+}
+
+
+static int __init easy_dab_init(void)
+{
+	return spi_register_driver(&easy_dab_driver);
+}
+
+static void __exit easy_dab_exit(void)
+{
+	spi_unregister_driver(&easy_dab_driver);
+}
+
+module_init(easy_dab_init);
+module_exit(easy_dab_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("linxiyuan");
+MODULE_DESCRIPTION("loongson-gz for easynetting of spi-dab audio driver");
diff -uNra linux-3.0.82/drivers/misc/ili9341.c linux-3.0.82x/drivers/misc/ili9341.c
--- linux-3.0.82/drivers/misc/ili9341.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/misc/ili9341.c	2017-09-23 03:42:49.642676213 +0800
@@ -0,0 +1,1320 @@
+/*  */
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/miscdevice.h>
+#include <linux/fcntl.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/fs.h>
+#include <linux/capability.h>
+
+#include <asm/uaccess.h>
+#include <asm/sections.h>
+#include <asm/io.h>
+#include <asm/ioctl.h>
+#include <asm/gpio.h>
+
+#include <ls1b_board.h>
+
+#include "ili9341.h"
+
+#define dis_zero  0
+#define ILI9341_LCD_MINOR			156
+
+#define ILI9341LCD_CLEAR			0x01		//æ¸…å±�ï¼Ÿ
+#define ILI9341LCD_SENDCTRL			0x02		//å�‘é€�Ctrl
+#define ILI9341LCD_SETSHORTDELAY	0x03		//SETçŸ­æš‚çš„å»¶è¿Ÿ
+#define ILI9341LCD_SETLONGDELAY		0x04		//SETé•¿å»¶è¿Ÿ
+#define ILI9341LCD_REST				0x05
+#define ILI9341LCD_WRITE_DOT		0x06
+#define ILI9341LCD_LINE				0x07
+#define ILI9341LCD_RECTANGLE		0x08
+#define ILI9341LCD_CIRCLE			0x09
+#define SET_PRINT_MODE				0x0a
+#define PUT_CHAR					0x0b
+
+static DEFINE_MUTEX(ili9341_lcd_mutex);
+
+//extern unsigned int Asii8[];		//6X8çš„ASIIå­—ç¬¦åº“
+extern unsigned char Asii1529[];	//15X29çš„ASIIå­—ç¬¦åº“
+extern unsigned char GB32[];		//32*32è‡ªå®šä¹‰çš„æ±‰å­—åº“
+
+int x_witch;				//å­—ç¬¦å†™å…¥æ—¶çš„å®½åº¦
+int y_witch;				//å­—ç¬¦å†™å…¥æ—¶çš„é«˜åº¦
+int font_wrod;				//å­—ä½“çš„å¤§
+unsigned char *char_tab;	//å­—åº“æŒ‡é’ˆ
+int plot_mode;				//ç»˜å›¾æ¨¡å¼�
+unsigned int bmp_color;
+unsigned int char_color;
+
+
+#define STLS1B_N_GPIO		64
+#define STLS1B_GPIO_IN_OFFSET	16
+
+#define LOONGSON_REG(x)	\
+	(*(volatile u32 *)((char *)CKSEG1ADDR(x)))
+
+#define LOONGSON_GPIOCFG0	LOONGSON_REG(0xbfd010c0)
+#define LOONGSON_GPIOCFG1	LOONGSON_REG(0xbfd010c4)
+#define LOONGSON_GPIOIE0 	LOONGSON_REG(0xbfd010d0)
+#define LOONGSON_GPIOIE1	LOONGSON_REG(0xbfd010d4)
+#define LOONGSON_GPIOIN0	LOONGSON_REG(0xbfd010e0)
+#define LOONGSON_GPIOIN1	LOONGSON_REG(0xbfd010e4)
+#define LOONGSON_GPIOOUT0	LOONGSON_REG(0xbfd010f0)
+#define LOONGSON_GPIOOUT1	LOONGSON_REG(0xbfd010f4)
+static void gpio_set_value(unsigned int gpio, int state)
+{
+	u32 val;
+	u32 mask;
+
+	if (gpio >= STLS1B_N_GPIO) {
+		return ;
+	}
+
+	if(gpio >= 32){
+		mask = 1 << (gpio - 32);
+		val = LOONGSON_GPIOOUT1;
+		if (state)
+			val |= mask;
+		else
+			val &= (~mask);
+		LOONGSON_GPIOOUT1 = val;
+	}else{
+		mask = 1 << gpio;
+		val = LOONGSON_GPIOOUT0;
+		if(state)	
+			val |= mask;
+		else
+			val &= ~mask;
+		LOONGSON_GPIOOUT0 = val;
+	}
+}
+
+static int ls1b_gpio_direction_output(struct gpio_chip *chip,
+		unsigned int gpio, int level)
+{
+	u32 temp;
+	u32 mask;
+
+	if (gpio >= STLS1B_N_GPIO)
+		return -EINVAL;
+
+	gpio_set_value(gpio, level);
+	
+	if(gpio >= 32){
+		mask = 1 << (gpio - 32);
+		temp = LOONGSON_GPIOCFG1;
+		temp |= mask;
+		LOONGSON_GPIOCFG1 = temp;
+		temp = LOONGSON_GPIOIE1;
+		temp &= (~mask);
+		LOONGSON_GPIOIE1 = temp;
+	}else{
+		mask = 1 << gpio;
+		temp = LOONGSON_GPIOCFG0;
+		temp |= mask;
+		LOONGSON_GPIOCFG0 = temp;
+		temp = LOONGSON_GPIOIE0;
+		temp &= (~mask);
+		LOONGSON_GPIOIE0 = temp;
+	}
+
+	return 0;
+}
+
+static void gpio_init(void)
+{
+	u32 ret;
+
+	ls1b_gpio_direction_output(NULL, LCDCS, 0);
+	ls1b_gpio_direction_output(NULL, LCDA0, 1);
+	ls1b_gpio_direction_output(NULL, LCDWR, 1);
+	ls1b_gpio_direction_output(NULL, LCDRD, 1);
+	ls1b_gpio_direction_output(NULL, LCDRES, 1);
+//	gpio_set_value(LCDCS, 0);
+//	gpio_set_value(LCDA0, 1);
+//	gpio_set_value(LCDWR, 1);
+//	gpio_set_value(LCDRD, 1);
+//	gpio_set_value(LCDRES, 1);
+
+	ret = readl(0xbfd010c0);
+	ret |= 0xFFFF << 8;
+	writel(ret, 0xbfd010c0);
+	
+	ret = readl(0xbfd010d0);
+	ret &= ~(0xFFFF << 8);
+	writel(ret, 0xbfd010d0);
+
+}
+
+static void write_data16(unsigned int dat)
+{
+	u32 ret;
+	ret = readl(0xbfd010f0);
+	ret &= ~(0xFFFF << 8);
+	writel(ret | (dat<<8), 0xbfd010f0);
+	gpio_set_value(LCDWR, 0);
+	gpio_set_value(LCDWR, 1);
+}
+
+static void write_data8(unsigned int dat)
+{
+	u32 ret;
+	
+	ret = readl(0xbfd010f0);
+	ret &= ~(0xFFFF << 8);
+//	tmp1 = (0x1F & data) << 19;	/* ä½Ž5bit */
+//	tmp2 = ((0xE0 & data) >> 5) << 10;	/* é«˜3bit ((0xE0 & dat) >> 5) << 10; */
+	writel(ret | ((0x1F & dat) << 19) | ((0xE0 & dat) << 5), 0xbfd010f0);
+	gpio_set_value(LCDWR, 0);
+	gpio_set_value(LCDWR, 1);
+}
+
+static void write_command(unsigned int command)
+{
+	gpio_set_value(LCDCS, 0);
+	gpio_set_value(LCDA0, 0);
+	write_data8(command);
+	gpio_set_value(LCDA0, 1);
+}
+
+static unsigned int read_data16(void)
+{
+	u32 ret;
+	u32 tmp1;
+
+	ret = readl(0xbfd010d0);
+	ret |= 0xFFFF << 8;
+	writel(ret, 0xbfd010d0);
+	
+	gpio_set_value(LCDRD, 0);
+	tmp1 = ((readl(0xbfd010e0) >> 8) & 0xFFFF);
+	gpio_set_value(LCDRD, 1);
+
+	ret = readl(0xbfd010d0);
+	ret &= ~(0xFFFF << 8);
+	writel(ret, 0xbfd010d0);
+	
+	return tmp1;
+}
+
+static unsigned int read_data8(void)
+{
+	u32 ret;
+	u32 tmp1;
+	u32 data1, data2;
+
+	ret = readl(0xbfd010d0);
+	ret |= 0xFFFF << 8;
+	writel(ret, 0xbfd010d0);
+	
+	gpio_set_value(LCDRD, 0);
+	tmp1 = readl(0xbfd010e0);
+	data1 = (tmp1 >> 19) & 0x1F;
+	data2 = (tmp1 >> 5) & 0xE0;
+	tmp1 = data1 | data2;
+	gpio_set_value(LCDRD, 1);
+
+	ret = readl(0xbfd010d0);
+	ret &= ~(0xFFFF << 8);
+	writel(ret, 0xbfd010d0);
+	
+	return tmp1;
+}
+
+static void ili9341_rest(void)
+{
+	gpio_set_value(LCDRES, 0);	//LCD å¤�ä½�æœ‰æ•ˆ(L) 
+	mdelay(100); // å»¶æ—¶100ms , Datasheet è¦�æ±‚è‡³å°‘å¤§äºŽ1us
+	gpio_set_value(LCDRES, 1);	//LCD å¤�ä½�æ— æ•ˆ(H)
+	mdelay(100); //ç¡¬ä»¶å¤�ä½�
+}
+
+static void read_id4(void)
+{
+	u32 parameter1, parameter2, parameter3, parameter4;
+	write_command(0xd3);
+	parameter1 = read_data8();
+	parameter2 = read_data8();
+	parameter3 = read_data8();
+	parameter4 = read_data8();
+	printk("ID: %x %x %x %x\n", parameter1, parameter2, parameter3, parameter4);
+}
+
+//========================================================================
+// å‡½æ•°: void clear_dot_lcd(int x, int y)
+// æ��è¿°: æ¸…é™¤åœ¨LCDçš„çœŸå®žå��æ ‡ç³»ä¸Šçš„Xã€�Yç‚¹ï¼ˆæ¸…é™¤å�Žè¯¥ç‚¹ä¸ºé»‘è‰²ï¼‰
+// å�‚æ•°: x 		Xè½´å��æ ‡
+//		 y 		Yè½´å��æ ‡
+// è¿”å›ž: æ— 
+// å¤‡æ³¨: 
+// ç‰ˆæœ¬:
+//========================================================================
+static void clear_dot_lcd(int x, int y)
+{
+	x = y;//æ— æ„�ä¹‰ï¼Œä»…ä¸ºäº†ä¸�æ��è­¦å‘Š
+}
+
+//========================================================================
+// å‡½æ•°: unsigned int get_dot_lcd(int x, int y)
+// æ��è¿°: èŽ·å�–åœ¨LCDçš„çœŸå®žå��æ ‡ç³»ä¸Šçš„Xã€�Yç‚¹ä¸Šçš„å½“å‰�å¡«å……è‰²æ•°æ�®
+// å�‚æ•°: x 		Xè½´å��æ ‡
+//		 y 		Yè½´å��æ ‡
+// è¿”å›ž: è¯¥ç‚¹çš„é¢œè‰²
+// å¤‡æ³¨: 
+// ç‰ˆæœ¬:
+//========================================================================
+static unsigned int get_dot_lcd(int x, int y)
+{
+/*
+	unsigned int Read_Data;
+	LCD_RegWrite(0x20,x);
+	LCD_RegWrite(0x21,y);
+	LCD_Reg22();
+	Read_Data = LCD_DataRead();
+	return Read_Data;
+*/
+	return 0;
+}
+
+//========================================================================
+// å‡½æ•°: void set_dot_addr_lcd(int x, int y)
+// æ��è¿°: è®¾ç½®åœ¨LCDçš„çœŸå®žå��æ ‡ç³»ä¸Šçš„Xã€�Yç‚¹å¯¹åº”çš„RAMåœ°å�€
+// å�‚æ•°: x 		Xè½´å��æ ‡
+//		 y 		Yè½´å��æ ‡
+// è¿”å›ž: æ— 
+// å¤‡æ³¨: ä»…è®¾ç½®å½“å‰�æ“�ä½œåœ°å�€ï¼Œä¸ºå�Žé�¢çš„è¿žç»­æ“�ä½œä½œå¥½å‡†å¤‡
+// ç‰ˆæœ¬:
+//========================================================================
+static void set_dot_addr_lcd(int x, int y)
+{
+	//åˆ—åœ°å�€ x
+	write_command(0x2A);
+	write_data8((x>>8) & 0xFF);	//é«˜8ä½�
+	write_data8(x & 0xFF);		//ä½Ž8ä½�
+	write_data8(0x00);			//æ”¹å�˜xyåƒ�ç´ å¤§å°�æ—¶éœ€è¦�ä¿®æ”¹è¿™é‡Œ.
+	write_data8(0xEF);
+	//é¡µåœ°å�€ y
+	write_command(0x2B);
+	write_data8((y>>8) & 0xFF);	//é«˜8ä½�
+	write_data8(y & 0xFF);		//ä½Ž8ä½�
+	write_data8(0x01);
+	write_data8(0x3F);
+	
+	write_command(0x2c);
+}
+
+//========================================================================
+// å‡½æ•°: void fill_dot_lcd(unsigned int color)
+// æ��è¿°: å¡«å……ä¸€ä¸ªç‚¹åˆ°LCDæ˜¾ç¤ºç¼“å†²RAMå½“ä¸­ï¼Œè€Œä¸�ç®¡å½“å‰�è¦�å¡«å……çš„åœ°å�€å¦‚ä½•
+// å�‚æ•°: color 		è¦�å¡«å……çš„ç‚¹çš„é¢œè‰² 
+// è¿”å›ž: æ— 
+// å¤‡æ³¨: 
+// ç‰ˆæœ¬:
+//========================================================================
+static void fill_dot_lcd(unsigned int color)
+{
+//	write_command(0x2c);
+	write_data16(color);
+}
+//========================================================================
+// å‡½æ•°: void write_dot_lcd(int x, int y, unsigned int i)
+// æ��è¿°: åœ¨LCDçš„çœŸå®žå��æ ‡ç³»ä¸Šçš„Xã€�Yç‚¹ç»˜åˆ¶å¡«å……è‰²ä¸ºiçš„ç‚¹
+// å�‚æ•°: x 		Xè½´å��æ ‡
+//		 y 		Yè½´å��æ ‡
+//		 i 		è¦�å¡«å……çš„ç‚¹çš„é¢œè‰² 
+// è¿”å›ž: æ— 
+// å¤‡æ³¨: 
+// ç‰ˆæœ¬:
+//========================================================================
+static void write_dot_lcd(int x, int y, unsigned int i)
+{
+/*	//åˆ—åœ°å�€
+	write_command(0x2A);
+	write_data8((x>>8) & 0xFF);	//é«˜8ä½�
+	write_data8(x & 0xFF);		//ä½Ž8ä½�
+	write_data8(0x01);
+	write_data8(0x3F);
+	//é¡µåœ°å�€
+	write_command(0x2B);
+	write_data8((y>>8) & 0xFF);	//é«˜8ä½�
+	write_data8(y & 0xFF);		//ä½Ž8ä½�
+	write_data8(0x00);
+	write_data8(0xEF);
+	
+	write_command(0x2c);*/
+	set_dot_addr_lcd(x, y);
+	write_data16(i);
+}
+
+//========================================================================
+// å‡½æ•°: void lcd_fill(unsigned int dat)
+// æ��è¿°: ä¼šå±�å¡«å……ä»¥datçš„æ•°æ�®è‡³å�„ç‚¹ä¸­
+// å�‚æ•°: dat   è¦�å¡«å……çš„é¢œè‰²æ•°æ�®
+// è¿”å›ž: æ— 
+// å¤‡æ³¨: ä»…åœ¨LCDåˆ�å§‹åŒ–ç¨‹åº�å½“ä¸­è°ƒç”¨
+// ç‰ˆæœ¬:
+//========================================================================
+static void lcd_fill(unsigned int dat)
+{
+	int i;
+	int j;
+	set_dot_addr_lcd(0, 0);
+	//æ”¹å�˜xyåƒ�ç´ å¤§å°�æ—¶éœ€è¦�ä¿®æ”¹è¿™é‡Œ.
+	for(i=0; i<240; i++){
+		for(j=0; j<320; j++){
+			fill_dot_lcd(dat);
+		}
+	}
+}
+
+//========================================================================
+// å‡½æ•°: void lcd_fill_s(unsigned int number, unsigned int color)
+// æ��è¿°: è¿žç»­å¡«å……ä»¥colorè‰²è°ƒçš„numberä¸ªç‚¹
+// å�‚æ•°: number å¡«å……çš„æ•°é‡�    color  åƒ�ç´ ç‚¹çš„é¢œè‰²  
+// è¿”å›ž:
+// å¤‡æ³¨:
+// ç‰ˆæœ¬:
+//========================================================================
+static void lcd_fill_s(unsigned int number, unsigned int color)
+{
+//	LCD_Reg22();
+	while(number != 0){
+		fill_dot_lcd(color);
+		number--;
+	}
+}
+
+//========================æ¶²æ™¶æ˜¾ç¤ºæ¨¡å�—åˆ�å§‹åŒ–================================= 
+static void ili9341_init(void)
+{ 
+	gpio_init();
+	gpio_set_value(LCDRES, 0);       //LCD å¤�ä½�æœ‰æ•ˆ(L) 
+	mdelay(100); // å»¶æ—¶100ms , Datasheet è¦�æ±‚è‡³å°‘å¤§äºŽ1us
+	gpio_set_value(LCDRES, 1);    //LCD å¤�ä½�æ— æ•ˆ(H)
+	mdelay(100); //ç¡¬ä»¶å¤�ä½�
+	read_id4();
+	//************* Start Initial Sequence **********//
+	write_command(0x11);	//Sleep OUT
+	mdelay(100);
+//	write_command(0xCB);
+//	write_data8(0x01);
+
+	write_command(0xC0);	//Power Control 1 
+	write_data8(0x23);
+	write_data8(0x08);
+
+
+	write_command(0xC1);	//Power Control 2 
+	write_data8(0x04);     
+
+	write_command(0xC5);	//VCOM Control 1
+	write_data8(0x25);
+	write_data8(0x2b);
+
+	write_command(0x36);	//Memory Access Control å†…å­˜è®¿é—®æŽ§åˆ¶
+	write_data8(0x48);		//æ”¹å�˜xyåƒ�ç´ å¤§å°�æ—¶éœ€è¦�ä¿®æ”¹è¿™é‡Œ.
+
+	write_command(0xB1);	//Frame Control å¸§é¢‘æŽ§åˆ¶
+	write_data8(0x00);
+	write_data8(0x1b);		//OSC 0x16,0x18
+
+	write_command(0xB6);	//æ˜¾ç¤ºåŠŸèƒ½æŽ§åˆ¶
+	write_data8(0x0A);
+	write_data8(0x82);
+
+	write_command(0xC7);	//VCOM Control 2 
+	write_data8(0xBC);
+
+	write_command(0xF2);	//??
+	write_data8(0x00);
+
+	write_command(0x26);	//ä¼½çŽ›æ›²çº¿è®¾ç½®
+	write_data8(0x01);
+
+	write_command(0x3a);	//åƒ�ç´ æ ¼å¼�è®¾ç½®
+	write_data8(0x55);		//16 bits / pixel 
+
+	write_command(0x2a);	//åˆ—åœ°å�€è®¾ç½®
+	write_data8(0x00);
+	write_data8(0x00);
+	write_data8(0x00);
+	write_data8(0xef);		//239
+	write_command(0x2b);	//
+	write_data8(0x00);
+	write_data8(0x00);
+	write_data8(0x01);
+	write_data8(0x3f);		//319
+
+	//=======================================
+	write_command(0xE0);	//æ­£ä¼½çŽ›æ ¡æ­£
+	write_data8(0x1f);
+	write_data8(0x25);
+	write_data8(0x25);
+	write_data8(0x0c);
+	write_data8(0x11);
+	write_data8(0x0a);
+	write_data8(0x4e);
+	write_data8(0xcb);
+	write_data8(0x37);
+	write_data8(0x03);
+	write_data8(0x00);
+	write_data8(0x00);
+	write_data8(0x00);
+	write_data8(0x00);
+	write_data8(0x00);
+
+	write_command(0XE1);	//è´Ÿä¼½çŽ›æ ¡æ­£
+	write_data8(0x00);
+	write_data8(0x1a);
+	write_data8(0x1c);
+	write_data8(0x02);
+	write_data8(0x0e);
+	write_data8(0x06);
+	write_data8(0x31);
+	write_data8(0x36);
+	write_data8(0x48);
+	write_data8(0x0c);
+	write_data8(0x1f);
+	write_data8(0x1f);
+	write_data8(0x3f);
+	write_data8(0x3f);
+	write_data8(0x1F);
+
+	write_command(0x29);	//DISPON (Display ON) 
+	
+	udelay(800000);
+	lcd_fill(LCD_INITIAL_COLOR);
+/*	
+	lcd_fill(RED);
+	delay(1000000);
+	lcd_fill(GREEN);
+	delay(1000000);
+	lcd_fill(WHITE);
+	delay(1000000);
+	lcd_fill(BLACK);
+	delay(1000000);
+	lcd_fill(CYAN);
+	delay(1000000);
+	lcd_fill(YELLOW);
+	delay(1000000);
+	lcd_fill(PURPLE);
+	delay(1000000);
+	lcd_fill(OLIVE);
+	delay(1000000);
+	lcd_fill(MAROON);
+	delay(1000000);
+	lcd_fill(WHITE);
+	delay(1000000);
+
+	write_dot_lcd(0, 0, RED);
+	write_dot_lcd(239, 0, RED);
+	write_dot_lcd(0, 319, RED);
+	write_dot_lcd(239, 319, RED);
+	write_dot_lcd(1, 0, RED);
+	write_dot_lcd(2, 0, RED);
+	write_dot_lcd(100, 100, RED);
+	write_dot_lcd(101, 100, RED);
+	write_dot_lcd(102, 100, RED);
+	write_dot_lcd(103, 100, RED);
+*/
+}
+
+//========================================================================
+// å‡½æ•°: void font_set(int font_num, unsigned int color)
+// æ��è¿°: æ–‡æœ¬å­—ä½“è®¾ç½®
+// å�‚æ•°: font_num å­—ä½“é€‰æ‹©,ä»¥é©±åŠ¨æ‰€å¸¦çš„å­—åº“ä¸ºå‡†
+//		 color  æ–‡æœ¬é¢œè‰²,ä»…ä½œç”¨äºŽè‡ªå¸¦å­—åº“  
+// è¿”å›ž: æ— 
+// å¤‡æ³¨: 
+// ç‰ˆæœ¬:
+//========================================================================
+static void font_set(int font_num, unsigned int color)
+{
+	switch(font_num)
+	{
+/*		case 0: font_wrod = 3;	//ASIIå­—ç¬¦A
+				x_witch = 6;
+				y_witch = 1;
+				char_color = color;
+//				char_tab = (Asii8 - 32*3);
+		break;*/
+		case 1: font_wrod = 58;	//ASIIå­—ç¬¦B
+				x_witch = 15;
+				y_witch = 29;
+				char_color = color;
+				char_tab = (unsigned char *)(Asii1529 - (32*58));
+		break;
+		case 2: font_wrod = 128;	//æ±‰å­—A
+				x_witch = 32;
+				y_witch = 32;
+				char_color = color;
+				char_tab = (unsigned char *)GB32;
+		break;
+/*		case 3: font_wrod = 16;	//æ±‰å­—B
+				x_witch = 16;
+				y_witch = 2;
+				char_color = color;
+				char_tab = GB16;
+		break;*/
+		default: break;
+	}
+}
+
+//========================================================================
+// å‡½æ•°: void put_char(int x, int y, unsigned int a)
+// æ��è¿°: å†™å…¥ä¸€ä¸ªæ ‡å‡†å­—ç¬¦
+// å�‚æ•°: x  Xè½´å��æ ‡     y  Yè½´å��æ ‡
+//		 a  è¦�æ˜¾ç¤ºçš„å­—ç¬¦åœ¨å­—åº“ä¸­çš„å��ç§»é‡�  
+// è¿”å›ž: æ— 
+// å¤‡æ³¨: ASCIIå­—ç¬¦å�¯ç›´æŽ¥è¾“å…¥ASCIIç �å�³å�¯
+// ç‰ˆæœ¬:
+//========================================================================
+static void put_char(int x, int y, unsigned int a)
+{
+	int i,j;//,K;		//æ•°æ�®æš‚å­˜
+	unsigned char *p_data;
+	unsigned char temp;
+	p_data = char_tab + a*font_wrod;	//è¦�å†™å­—ç¬¦çš„é¦–åœ°å�€
+	j = 0;
+	while((j ++) < y_witch){
+		if(y > DIS_Y_MAX) break;
+		i = 0;
+		while(i < x_witch){
+			if((i&0x07) == 0){
+				temp = *(p_data ++);
+			}
+//			K = 0;
+			if((x+i) > DIS_X_MAX) break;
+			if((temp & 0x80) > 0) writ_dot(x+i,y,char_color);
+			temp = temp << 1;
+			i++;
+		}
+		y ++;
+	}
+}
+
+//========================================================================
+// å‡½æ•°: void put_string(int x, int y, char *p)
+// æ��è¿°: åœ¨xã€�yä¸ºèµ·å§‹å��æ ‡å¤„å†™å…¥ä¸€ä¸²æ ‡å‡†å­—ç¬¦
+// å�‚æ•°: x  Xè½´å��æ ‡     y  Yè½´å��æ ‡
+//		 p  è¦�æ˜¾ç¤ºçš„å­—ç¬¦ä¸²  
+// è¿”å›ž: æ— 
+// å¤‡æ³¨: ä»…èƒ½ç”¨äºŽè‡ªå¸¦çš„ASCIIå­—ç¬¦ä¸²æ˜¾ç¤º
+// ç‰ˆæœ¬:
+//========================================================================
+static void put_string(int x, int y, char *p)
+{
+	while(*p!=0){
+		put_char(x,y,*p);
+		x += x_witch;
+		if((x + x_witch) > DIS_X_MAX){
+			x = dis_zero;
+			if((DIS_Y_MAX - y) < y_witch) break;
+			else y += y_witch;
+		}
+		p++;
+	}
+}
+/*
+//========================================================================
+// å‡½æ•°: void bit_map(unsigned int *p, int x, int y)
+// æ��è¿°: å†™å…¥ä¸€ä¸ªBMPå›¾ç‰‡,èµ·ç‚¹ä¸º(x,y)
+// å�‚æ•°:   
+// è¿”å›ž: æ— 
+// å¤‡æ³¨:
+// ç‰ˆæœ¬:
+//========================================================================
+static void bit_map(unsigned int *p, int x, int y)
+{
+	int temp_with,temp_High,i,j;	//æ•°æ�®æš‚å­˜
+	temp_High = *(p ++);
+	temp_with = *(p ++);			//å›¾ç‰‡å®½åº¦
+	i = 0;
+	while((i ++) < temp_High){
+		j = 0;
+		while((j ++) < temp_with){
+			if(i < DIS_X_MAX) writ_dot(x+j,y+i,*p);
+			else break;
+		}
+	}
+}
+*/
+//========================================================================
+// å‡½æ•°: void set_paint_mode(int mode, unsigned int color)
+// æ��è¿°: ç»˜å›¾æ¨¡å¼�è®¾ç½®
+// å�‚æ•°: mode ç»˜å›¾æ¨¡å¼�    color  åƒ�ç´ ç‚¹çš„é¢œè‰²,ç›¸å½“äºŽå‰�æ™¯è‰²  
+// è¿”å›ž: æ— 
+// å¤‡æ³¨: modeæ— æ•ˆ
+// ç‰ˆæœ¬:
+//========================================================================
+static void set_paint_mode(int mode, unsigned int color)
+{
+	plot_mode = mode;
+	bmp_color = color;
+}
+//========================================================================
+// å‡½æ•°: void put_pixel(int x, int y)
+// æ��è¿°: åœ¨xã€�yç‚¹ä¸Šç»˜åˆ¶ä¸€ä¸ªå‰�æ™¯è‰²çš„ç‚¹
+// å�‚æ•°: x  Xè½´å��æ ‡     y  Yè½´å��æ ‡
+// è¿”å›ž: æ— 
+// å¤‡æ³¨: ä½¿ç”¨å‰�æ™¯è‰²
+// ç‰ˆæœ¬:
+//========================================================================
+static void put_pixel(int x, int y)
+{
+	writ_dot(x, y, bmp_color);
+}
+//========================================================================
+// å‡½æ•°: void line_my(int s_x, int s_y, int e_x, int e_y)
+// æ��è¿°: åœ¨s_xã€�s_yä¸ºèµ·å§‹å��æ ‡ï¼Œe_xã€�e_yä¸ºç»“æ�Ÿå��æ ‡ç»˜åˆ¶ä¸€æ�¡ç›´çº¿
+// å�‚æ•°: x  Xè½´å��æ ‡     y  Yè½´å��æ ‡
+// è¿”å›ž: æ— 
+// å¤‡æ³¨: ä½¿ç”¨å‰�æ™¯è‰²
+// ç‰ˆæœ¬:
+//========================================================================
+static void line_my(int s_x, int s_y, int e_x, int e_y)
+{  
+	int offset_x,offset_y,offset_k = 0;
+	int err_d = 1;
+	if(s_y > e_y){
+		offset_x = s_x;
+		s_x = e_x;
+		e_x = offset_x;
+		offset_x = s_y;
+		s_y = e_y;
+		e_y = offset_x;
+	}
+	offset_x = e_x-s_x;
+	offset_y = e_y-s_y;
+	writ_dot(s_x, s_y, bmp_color);
+	if(offset_x <= 0){
+		offset_x = s_x-e_x;
+		err_d = -1;
+	}
+	if(offset_x > offset_y){
+		while(s_x != e_x){
+			if(offset_k > 0){
+				s_y += 1;
+				offset_k += (offset_y-offset_x);
+			}
+			else offset_k += offset_y; 
+			s_x += err_d;
+			if(s_x>LCD_X_MAX || s_y>LCD_Y_MAX) break;
+			writ_dot(s_x, s_y, bmp_color);
+		}	
+	}
+	else{
+		while(s_y != e_y){
+			if(offset_k > 0){
+				s_x += err_d;
+				offset_k += (offset_x-offset_y);
+			}
+			else offset_k += offset_x;
+			s_y += 1;
+			if(s_x>=LCD_X_MAX || s_y>=LCD_Y_MAX) break;
+			writ_dot(s_x, s_y, bmp_color);
+		}
+	}    
+}
+/*
+//========================================================================
+// å‡½æ•°: void w_db_line(int *p)
+// æ��è¿°: ç”»ä¸€ä¸ªä»»æ„�å¤šè¾¹å½¢
+// å�‚æ•°: p
+// è¿”å›ž: è¯¥å‡½æ•°æ— æ•ˆ
+// å¤‡æ³¨: ä½¿ç”¨å‰�æ™¯è‰²
+// ç‰ˆæœ¬:
+//========================================================================
+static void w_db_line(int *p)
+{
+     int dot_sun,i;
+     dot_sun = *p++;
+     i = 0;
+     while((i ++) < dot_sun)
+     {
+        W_line((*p >> 8)&0xff,*(p + 1)&0xff,(*(p + 1)>>8)&0xff,*(p + 1)&0xff);
+        p += 1;
+     }
+}*/
+
+//========================================================================
+// å‡½æ•°: void w_red_dot(int x, int y, int a, int b, int mode)
+// æ��è¿°: ç»˜åˆ¶åœ†çš„å�„ä¸ªåƒ�é™�ä¸­çš„ç‚¹å’Œçº¿
+// å�‚æ•°: 
+// è¿”å›ž: æ— 
+// å¤‡æ³¨: è¯¥å‡½æ•°å¯¹ç”¨æˆ·ä¸�å�¯è§�ï¼Œä½¿ç”¨å‰�æ™¯è‰²
+// ç‰ˆæœ¬:
+//========================================================================
+static void line_f(int s_x, int s_y, int e_x);//,int e_y);
+static void w_red_dot(int x, int y, int a, int b, int mode)
+{
+	if(mode > 0){
+		line_f(x+a, y+b, x-a);//,y+b);
+		line_f(x+a, y-b, x-a);//,y-b);
+	}
+	else{
+		put_pixel(x+a, y+b);
+		put_pixel(x-a, y+b);
+		put_pixel(x+a, y-b);
+		put_pixel(x-a, y-b);
+	}
+}
+//========================================================================
+// å‡½æ•°: void w_red_err(int *a, int *b, int *r)
+// æ��è¿°: ç”»åœ†è¯¯å·®è®¡ç®—
+// å�‚æ•°: 
+// è¿”å›ž: æ— 
+// å¤‡æ³¨: è¯¥å‡½æ•°å¯¹ç”¨æˆ·ä¸�å�¯è§�
+// ç‰ˆæœ¬:
+//========================================================================
+static void w_red_err(int *a, int *b, int *r)
+{
+	int r_error;
+	unsigned int uitemp;
+	
+	r_error = (*a+1)*(*a+1);
+	uitemp = (*b)*(*b);
+	r_error += uitemp;
+	uitemp = (*r)*(*r);
+	r_error -= uitemp;
+	if(r_error >= 0){
+		r_error = r_error-*b;
+		if(r_error >= 0) *b = *b-1;
+	}
+	*a = *a+1;
+}
+
+//========================================================================
+// å‡½æ•°: void circle(int x, int y, int r, int mode)
+// æ��è¿°: ä»¥x,yä¸ºåœ†å¿ƒRä¸ºå�Šå¾„ç”»ä¸€ä¸ªåœ†(mode = 0) or åœ†é�¢(mode = 1)
+// å�‚æ•°: 
+// è¿”å›ž: æ— 
+// å¤‡æ³¨: ç”»åœ†å‡½æ•°æ‰§è¡Œè¾ƒæ…¢ï¼Œå¦‚æžœMCUæœ‰çœ‹é—¨ç‹—ï¼Œè¯·ä½œå¥½æ¸…ç‹—çš„æ“�ä½œ
+// ç‰ˆæœ¬:
+//      2006/10/16      First version
+//========================================================================
+static void circle(int x, int y, int r, int mode)
+{
+	int arx1=0, ary1, arx2, ary2=0;
+	
+	pos_switch(&x, &y);						//å��æ ‡å�˜æ�¢
+	x += 4;
+	ary1 = r;
+	arx2 = r;
+	while(1){
+        w_red_dot(x, y, arx1, ary1, mode);
+        w_red_err(&arx1, &ary1, &r);
+		if(arx1 == arx2){
+			w_red_dot(x, y, arx1, ary1, mode);
+			break; 
+		}
+		w_red_dot(x, y, arx2, ary2, mode);
+		w_red_err(&ary2, &arx2, &r);
+		if(arx1 == arx2) {
+			w_red_dot(x, y, arx2, ary2, mode);
+			break;
+		}
+	}
+}
+//========================================================================
+// å‡½æ•°: void rectangle(left, top, right, 
+//		 			 bottom, mode)
+// æ��è¿°: ä»¥x,yä¸ºåœ†å¿ƒRä¸ºå�Šå¾„ç”»ä¸€ä¸ªåœ†(mode = 0) or åœ†é�¢(mode = 1)
+// å�‚æ•°: left - çŸ©å½¢çš„å·¦ä¸Šè§’æ¨ªå��æ ‡ï¼ŒèŒƒå›´0åˆ°118
+//		 top - çŸ©å½¢çš„å·¦ä¸Šè§’çºµå��æ ‡ï¼ŒèŒƒå›´0åˆ°50
+//		 right - çŸ©å½¢çš„å�³ä¸‹è§’æ¨ªå��æ ‡ï¼ŒèŒƒå›´1åˆ°119
+//		 bottom - çŸ©å½¢çš„å�³ä¸‹è§’çºµå��æ ‡ï¼ŒèŒƒå›´1åˆ°51
+//		 mode - ç»˜åˆ¶æ¨¡å¼�ï¼Œå�¯ä»¥æ˜¯ä¸‹åˆ—æ•°å€¼ä¹‹ä¸€ï¼š
+//				0:	çŸ©å½¢æ¡†ï¼ˆç©ºå¿ƒçŸ©å½¢ï¼‰
+//				1:	çŸ©å½¢é�¢ï¼ˆå®žå¿ƒçŸ©å½¢ï¼‰
+// è¿”å›ž: æ— 
+// å¤‡æ³¨: ç”»åœ†å‡½æ•°æ‰§è¡Œè¾ƒæ…¢ï¼Œå¦‚æžœMCUæœ‰çœ‹é—¨ç‹—ï¼Œè¯·ä½œå¥½æ¸…ç‹—çš„æ“�ä½œ
+// ç‰ˆæœ¬:
+//========================================================================
+static void rectangle(int left, int top, int right, 
+					int bottom, int mode)
+{
+	unsigned int uitemp;
+	
+	pos_switch(&left, &top);						//å��æ ‡å�˜æ�¢
+	pos_switch(&right, &bottom);					//å��æ ‡å�˜æ�¢
+	if(left > right){
+		uitemp = left;
+		left = right;
+		right = uitemp;
+	}
+	if(top > bottom){
+		uitemp = top;
+		top = bottom;
+		bottom = uitemp;
+	}
+	if(mode == 0){
+		line_my(left, top, left, bottom);
+		line_my(left, top, right, top);
+		line_my(right, bottom, left+1, bottom);
+		line_my(right, bottom, right, top+1);
+	}
+	else{
+		for(uitemp=top; uitemp<=bottom; uitemp++){
+			line_f(left, uitemp, right);//,uitemp);
+		}
+	}
+}
+//========================================================================
+// å‡½æ•°: void writ_dot(int x, int y, unsigned int color)
+// æ��è¿°: å¡«å……ä»¥x,yä¸ºå��æ ‡çš„è±¡ç´ 
+// å�‚æ•°: x  Xè½´å��æ ‡     y  Yè½´å��æ ‡      color  åƒ�ç´ é¢œè‰² 
+// è¿”å›ž: æ— 
+// å¤‡æ³¨: è¿™é‡Œä»¥å�Šä¹‹å‰�çš„æ‰€æœ‰xå’Œyå��æ ‡ç³»éƒ½æ˜¯ç”¨æˆ·å±‚çš„ï¼Œå¹¶ä¸�æ˜¯å®žé™…LCDçš„å��æ ‡ä½“ç³»
+//		 æœ¬å‡½æ•°æ��ä¾›å�¯è¿›è¡Œå��æ ‡å�˜æ�¢çš„æŽ¥å�£
+// ç‰ˆæœ¬:
+//========================================================================
+static void writ_dot(int x, int y, unsigned int color)
+{
+#if	LCD_XY_SWITCH == 0
+	#if (LCD_X_REV == 0)&&(LCD_Y_REV == 0)
+		write_dot_lcd(x,y,color);
+	#endif
+	#if (LCD_X_REV == 1)&&(LCD_Y_REV == 0)
+		write_dot_lcd(LCD_X_MAX - x,y,color);
+	#endif
+	#if (LCD_X_REV == 0)&&(LCD_Y_REV == 1)
+		write_dot_lcd(x,LCD_Y_MAX - y,color);
+	#endif
+	#if (LCD_X_REV == 1)&&(LCD_Y_REV == 1)
+		write_dot_lcd(LCD_X_MAX - x,LCD_Y_MAX - y,color);
+	#endif
+#endif
+#if	LCD_XY_SWITCH == 1
+	#if (LCD_X_REV == 0)&&(LCD_Y_REV == 0)
+		write_dot_lcd(y,x,color);
+	#endif
+	#if (LCD_X_REV == 1)&&(LCD_Y_REV == 0)
+		write_dot_lcd(y,LCD_Y_MAX - x,color);
+	#endif
+	#if (LCD_X_REV == 0)&&(LCD_Y_REV == 1)
+		write_dot_lcd(LCD_X_MAX - y,x,color);
+	#endif
+	#if (LCD_X_REV == 1)&&(LCD_Y_REV == 1)
+		write_dot_lcd(LCD_X_MAX - y,LCD_Y_MAX - x,color);
+	#endif
+#endif	
+}
+//========================================================================
+// å‡½æ•°: unsigned int get_dot(int x, int y)
+// æ��è¿°: èŽ·å�–x,yä¸ºå��æ ‡çš„è±¡ç´ 
+// å�‚æ•°: x  Xè½´å��æ ‡     y  Yè½´å��æ ‡      
+// è¿”å›ž: color  åƒ�ç´ é¢œè‰² 
+// å¤‡æ³¨: è¿™é‡Œä»¥å�Šä¹‹å‰�çš„æ‰€æœ‰xå’Œyå��æ ‡ç³»éƒ½æ˜¯ç”¨æˆ·å±‚çš„ï¼Œå¹¶ä¸�æ˜¯å®žé™…LCDçš„å��æ ‡ä½“ç³»
+//		 æœ¬å‡½æ•°æ��ä¾›å�¯è¿›è¡Œå��æ ‡å�˜æ�¢çš„æŽ¥å�£
+// ç‰ˆæœ¬:
+//========================================================================
+static unsigned int get_dot(int x, int y)
+{
+#if	LCD_XY_SWITCH == 0
+	#if (LCD_X_REV == 0)&&(LCD_Y_REV == 0)
+		return get_dot_lcd(x,y);
+	#endif
+	#if (LCD_X_REV == 1)&&(LCD_Y_REV == 0)
+		return get_dot_lcd(LCD_X_MAX - x,y);
+	#endif
+	#if (LCD_X_REV == 0)&&(LCD_Y_REV == 1)
+		return get_dot_lcd(x,LCD_Y_MAX - y);
+	#endif
+	#if (LCD_X_REV == 1)&&(LCD_Y_REV == 1)
+		return get_dot_lcd(LCD_X_MAX - x,LCD_Y_MAX - y);
+	#endif
+#endif
+#if	LCD_XY_SWITCH == 1
+	#if (LCD_X_REV == 0)&&(LCD_Y_REV == 0)
+		return get_dot_lcd(y,x);
+	#endif
+	#if (LCD_X_REV == 1)&&(LCD_Y_REV == 0)
+		return get_dot_lcd(y,LCD_Y_MAX - x);
+	#endif
+	#if (LCD_X_REV == 0)&&(LCD_Y_REV == 1)
+		return get_dot_lcd(LCD_X_MAX - y,x);
+	#endif
+	#if (LCD_X_REV == 1)&&(LCD_Y_REV == 1)
+		return get_dot_lcd(LCD_X_MAX - y,LCD_Y_MAX - x);
+	#endif
+#endif	
+}
+
+//========================================================================
+// å‡½æ•°: void clear_dot(int x, int y)
+// æ��è¿°: æ¸…é™¤ä»¥x,yä¸ºå��æ ‡çš„è±¡ç´ 
+// å�‚æ•°: x  Xè½´å��æ ‡     y  Yè½´å��æ ‡      
+// è¿”å›ž: æ—  
+// å¤‡æ³¨: è¿™é‡Œä»¥å�Šä¹‹å‰�çš„æ‰€æœ‰xå’Œyå��æ ‡ç³»éƒ½æ˜¯ç”¨æˆ·å±‚çš„ï¼Œå¹¶ä¸�æ˜¯å®žé™…LCDçš„å��æ ‡ä½“ç³»
+//		 æœ¬å‡½æ•°æ��ä¾›å�¯è¿›è¡Œå��æ ‡å�˜æ�¢çš„æŽ¥å�£
+// ç‰ˆæœ¬:
+//========================================================================
+static void clear_dot(int x, int y)
+{
+#if	LCD_XY_SWITCH == 0
+	#if (LCD_X_REV == 0)&&(LCD_Y_REV == 0)
+		clear_dot_lcd(x,y);
+	#endif
+	#if (LCD_X_REV == 1)&&(LCD_Y_REV == 0)
+		clear_dot_lcd(LCD_X_MAX - x,y);
+	#endif
+	#if (LCD_X_REV == 0)&&(LCD_Y_REV == 1)
+		clear_dot_lcd(x,LCD_Y_MAX - y);
+	#endif
+	#if (LCD_X_REV == 1)&&(LCD_Y_REV == 1)
+		clear_dot_lcd(LCD_X_MAX - x,LCD_Y_MAX - y);
+	#endif
+#endif
+#if	LCD_XY_SWITCH == 1
+	#if (LCD_X_REV == 0)&&(LCD_Y_REV == 0)
+		clear_dot_lcd(y,x);
+	#endif
+	#if (LCD_X_REV == 1)&&(LCD_Y_REV == 0)
+		clear_dot_lcd(y,LCD_Y_MAX - x);
+	#endif
+	#if (LCD_X_REV == 0)&&(LCD_Y_REV == 1)
+		clear_dot_lcd(LCD_X_MAX - y,x);
+	#endif
+	#if (LCD_X_REV == 1)&&(LCD_Y_REV == 1)
+		clear_dot_lcd(LCD_X_MAX - y,LCD_Y_MAX - x);
+	#endif
+#endif	
+}
+//========================================================================
+// å‡½æ•°: void set_dot_addr(int x, int y)
+// æ��è¿°: è®¾ç½®å½“å‰�éœ€è¦�æ“�ä½œçš„è±¡ç´ åœ°å�€
+// å�‚æ•°: x  Xè½´å��æ ‡     y  Yè½´å��æ ‡      
+// è¿”å›ž: æ—  
+// å¤‡æ³¨: è¿™é‡Œä»¥å�Šä¹‹å‰�çš„æ‰€æœ‰xå’Œyå��æ ‡ç³»éƒ½æ˜¯ç”¨æˆ·å±‚çš„ï¼Œå¹¶ä¸�æ˜¯å®žé™…LCDçš„å��æ ‡ä½“ç³»
+//		 æœ¬å‡½æ•°æ��ä¾›å�¯è¿›è¡Œå��æ ‡å�˜æ�¢çš„æŽ¥å�£
+// ç‰ˆæœ¬:
+//========================================================================
+static void set_dot_addr(int x, int y)
+{
+#if	LCD_XY_SWITCH == 0
+	#if (LCD_X_REV == 0)&&(LCD_Y_REV == 0)
+		set_dot_addr_lcd(x,y);
+	#endif
+	#if (LCD_X_REV == 1)&&(LCD_Y_REV == 0)
+		set_dot_addr_lcd(LCD_X_MAX - x,y);
+	#endif
+	#if (LCD_X_REV == 0)&&(LCD_Y_REV == 1)
+		set_dot_addr_lcd(x,LCD_Y_MAX - y);
+	#endif
+	#if (LCD_X_REV == 1)&&(LCD_Y_REV == 1)
+		set_dot_addr_lcd(LCD_X_MAX - x,LCD_Y_MAX - y);
+	#endif
+#endif
+#if	LCD_XY_SWITCH == 1
+	#if (LCD_X_REV == 0)&&(LCD_Y_REV == 0)
+		set_dot_addr_lcd(y,x);
+	#endif
+	#if (LCD_X_REV == 1)&&(LCD_Y_REV == 0)
+		set_dot_addr_lcd(y,LCD_Y_MAX - x);
+	#endif
+	#if (LCD_X_REV == 0)&&(LCD_Y_REV == 1)
+		set_dot_addr_lcd(LCD_X_MAX - y,x);
+	#endif
+	#if (LCD_X_REV == 1)&&(LCD_Y_REV == 1)
+		set_dot_addr_lcd(LCD_X_MAX - y,LCD_Y_MAX - x);
+	#endif
+#endif		
+}
+//========================================================================
+// å‡½æ•°: void pos_switch(unsigned int * x, unsigned int * y)
+// æ��è¿°: å°†ç”»é�¢çš„å��æ ‡å�˜æ�¢ä¸ºå®žé™…LCDçš„å��æ ‡ä½“ç³»ï¼Œä»¥ä¾¿äºŽå¿«é€Ÿç”»åœ†å½¢ä»¥å�ŠçŸ©å½¢
+// å�‚æ•°: x  Xè½´å��æ ‡     y  Yè½´å��æ ‡      
+// è¿”å›ž: æ—  
+// å¤‡æ³¨: è¿™é‡Œä»¥å�Šä¹‹å‰�çš„æ‰€æœ‰xå’Œyå��æ ‡ç³»éƒ½æ˜¯ç”¨æˆ·å±‚çš„ï¼Œå¹¶ä¸�æ˜¯å®žé™…LCDçš„å��æ ‡ä½“ç³»
+//		 æœ¬å‡½æ•°æ��ä¾›å�¯è¿›è¡Œå��æ ‡å�˜æ�¢çš„æŽ¥å�£
+// ç‰ˆæœ¬:
+//========================================================================
+static void pos_switch(unsigned int * x, unsigned int * y)
+{
+	*x = *x;
+	*y = *y;
+#if	LCD_XY_SWITCH == 0
+	#if (LCD_X_REV == 0)&&(LCD_Y_REV == 0)
+	#endif
+	#if (LCD_X_REV == 1)&&(LCD_Y_REV == 0)
+		*x = LCD_X_MAX-*x;
+	#endif
+	#if (LCD_X_REV == 0)&&(LCD_Y_REV == 1)
+		*y = LCD_Y_MAX-*y;
+	#endif
+	#if (LCD_X_REV == 1)&&(LCD_Y_REV == 1)
+		*x = LCD_X_MAX-*x;
+		*y = LCD_Y_MAX-*y;
+	#endif
+#endif
+#if	LCD_XY_SWITCH == 1
+	unsigned int uitemp;
+	#if (LCD_X_REV == 0)&&(LCD_Y_REV == 0)
+		uitemp = *x;
+		*x = y;
+		*y = uitemp;
+	#endif
+	#if (LCD_X_REV == 1)&&(LCD_Y_REV == 0)
+		uitemp = LCD_Y_MAX-*x;
+		*x = *y;
+		*y = uitemp;
+	#endif
+	#if (LCD_X_REV == 0)&&(LCD_Y_REV == 1)
+		uitemp = *x;
+		*x = LCD_X_MAX-*y;
+		*y = uitemp;
+	#endif
+	#if (LCD_X_REV == 1)&&(LCD_Y_REV == 1)
+		uitemp = LCD_Y_MAX - *x;
+		*x = LCD_X_MAX-*y;
+		*y = uitemp;
+	#endif
+#endif
+}
+//========================================================================
+// å‡½æ•°: void line_f(int s_x, int s_y, int e_x, int e_y, int mode)
+// æ��è¿°: ä»¥s_x,s_yä¸ºèµ·ç‚¹,e_x,e_yä¸ºç»ˆç‚¹è¿žç»­å¡«å……ä¸€æ�¡ç›´çº¿ä¸Šçš„ç‚¹.ç”¨äºŽç”»çŸ©å½¢ã€�åœ†
+// å�‚æ•°: x  Xè½´å��æ ‡     y  Yè½´å��æ ‡      
+// è¿”å›ž: æ—  
+// å¤‡æ³¨: ä»¥å®žé™…çš„LCDå��æ ‡ä½“ç³»ä¸ºå‡†
+// ç‰ˆæœ¬:
+//========================================================================
+static void line_f(int s_x, int s_y, int e_x)//,int e_y)
+{  
+	unsigned int uitemp;
+	if(s_x>e_x) 
+	{
+		uitemp = s_x;
+		s_x = e_x;
+		e_x = uitemp;
+	}
+	write_dot_lcd(s_x++,s_y,bmp_color);
+	for(;s_x<=e_x;s_x++)
+		fill_dot_lcd(bmp_color);
+}
+//========================================================================
+// å‡½æ•°: void clr_screen(void)
+// æ��è¿°: å…¨å±�ä»¥åˆ�å§‹åŒ–å±�å¹•è‰²çš„é¢œè‰²è¿›è¡Œæ¸…å±�
+// å�‚æ•°: æ—       
+// è¿”å›ž: æ—  
+// å¤‡æ³¨: æ— 
+// ç‰ˆæœ¬:
+//========================================================================
+static void clr_screen(void)
+{  
+	set_dot_addr_lcd(0,0);
+	lcd_fill(LCD_INITIAL_COLOR);
+}
+
+static void ili9341_test(void)
+{
+	ili9341_init();							//LCDåˆ�å§‹åŒ–
+	font_set(1,0xf800);
+	put_string(10,10,"Mz Design!");
+//	clr_screen();
+	font_set(1,0x07e0);
+	put_string(10,42,"Mz");
+	font_set(2,0x07e0);
+	put_char(42,40,0);
+	put_char(74,40,1);
+
+	set_paint_mode(0,0x001f);
+	put_pixel(10,72);
+	put_pixel(12,72);
+	put_pixel(14,72);
+	line_my(10, 75, 230, 75);
+	rectangle(20,80,100,120,1);
+	rectangle(18,78,102,122,0);
+	circle(60,180,30,1);
+	circle(60,180,32,0);
+}
+
+static ssize_t ili9341_lcd_write( struct file * file, const u16 __user * buf, 
+				                  size_t count, loff_t *ppos )
+{
+	const u16 __user *p = (u16)buf;
+	u16 c;
+	int i;
+
+#ifdef DEBUG
+	printk(KERN_DEBUG "LCD: write\n");
+#endif
+	//access_ok()å‡½æ•° æ£€æŸ¥ç”¨æˆ·ç©ºé—´æŒ‡é’ˆæ˜¯å�¦å�¯ç”¨
+	//buf  :   ç”¨æˆ·ç©ºé—´çš„æŒ‡é’ˆå�˜é‡�ï¼Œå…¶æŒ‡å�‘ä¸€ä¸ªè¦�æ£€æŸ¥çš„å†…å­˜å�—å¼€å§‹å¤„ã€‚
+	//count   :   è¦�æ£€æŸ¥å†…å­˜å�—çš„å¤§å°�ã€‚
+	//æ­¤å‡½æ•°æ£€æŸ¥ç”¨æˆ·ç©ºé—´ä¸­çš„å†…å­˜å�—æ˜¯å�¦å�¯ç”¨ã€‚å¦‚æžœå�¯ç”¨ï¼Œåˆ™è¿”å›žçœŸ(é�ž0å€¼)ï¼Œå�¦åˆ™è¿”å›žå�‡(0)ã€‚
+	if (!access_ok(VERIFY_READ, buf, count))
+		return -EFAULT;
+
+	mutex_lock(&ili9341_lcd_mutex);
+	for ( i = *ppos; count > 0; ++i, ++p, --count ){
+		__get_user(c, p);
+		write_data16(c);
+	}
+	mutex_unlock(&ili9341_lcd_mutex);
+	*ppos = i;
+	return p-buf;
+}
+
+static ssize_t ili9341_lcd_read( struct file * file, char __user * buf, 
+				                 size_t count, loff_t *ppos )
+{}
+
+static long ili9341_lcd_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+	long ret = 0;
+#ifdef DEBUG
+	printk(KERN_DEBUG "LCD: ioctl(%d,%d)\n",cmd,arg);
+#endif
+	mutex_lock(&ili9341_lcd_mutex);
+//	if (_IOC_TYPE(cmd) != LSLCD_IOC_MAGIC) return -EINVAL;
+//	if (_IOC_NR(cmd) > LSLCD_IOC_MAXNR) return -EINVAL;
+	switch (cmd){
+		case ILI9341LCD_CLEAR:
+			clr_screen();
+		break;
+		case ILI9341LCD_SENDCTRL:
+			if (!capable(CAP_SYS_ADMIN))
+				ret = -EACCES;
+			else
+				write_command(arg);
+			break;
+		case ILI9341LCD_REST:
+			if (!capable(CAP_SYS_ADMIN))
+				ret = -EACCES;
+			else
+				ili9341_rest();
+			break;
+		case ILI9341LCD_WRITE_DOT:
+			{
+			int dot_info[3];
+			__copy_from_user(dot_info, (int __user *)arg, sizeof(dot_info));
+			write_dot_lcd(dot_info[0], dot_info[1], dot_info[2]);
+			}
+			break;
+		case ILI9341LCD_LINE:
+			{
+			int line_info[4];
+			__copy_from_user(line_info, (int __user *)arg, sizeof(line_info));
+			line_my(line_info[0], line_info[1], line_info[2], line_info[3]);
+			}
+		break;
+		case ILI9341LCD_RECTANGLE:
+			{
+			int rectangle_info[5];
+			__copy_from_user(rectangle_info, (int __user *)arg, sizeof(rectangle_info));
+			rectangle(rectangle_info[0], rectangle_info[1], rectangle_info[2], rectangle_info[3], rectangle_info[4]);
+			}
+		break;
+		case ILI9341LCD_CIRCLE:
+			{
+			int circle_info[4];
+			__copy_from_user(circle_info, (int __user *)arg, sizeof(circle_info));
+			circle(circle_info[0], circle_info[1], circle_info[2], circle_info[3]);
+			}
+		break;
+		case SET_PRINT_MODE:
+			bmp_color = arg;
+		break;
+		default:
+			ret = -EINVAL;
+	}
+	mutex_unlock(&ili9341_lcd_mutex);
+	return ret;
+}
+
+static int ili9341_lcd_open( struct inode * inode, struct file * file )
+{
+	return 0;
+}
+
+const struct file_operations ili9341_lcd_fops = {
+	.owner			= THIS_MODULE,
+	.write			= ili9341_lcd_write,
+	.read			= ili9341_lcd_read,
+	.unlocked_ioctl	= ili9341_lcd_ioctl,
+	.open			= ili9341_lcd_open,
+	.llseek			= default_llseek,
+};
+
+static struct miscdevice ili9341_lcd_dev = {
+	.minor	= ILI9341_LCD_MINOR,
+	.name	= "ili9341_lcd",
+	.fops	= &ili9341_lcd_fops
+};
+
+const unsigned char ili9341_lcd_logo[] =	"*********************"  /* Line #1 */
+											"*                   *"  /* Line #1 */
+											"*     Welcome to    *"  /* Line #3 */
+											"*                   *"  /* Line #1 */
+				              				"*       LINUX!      *"  /* Line #2 */
+				              				"*********************"; /* Line #4 */
+
+static int __init ili9341_lcd_init(void)
+{
+	int retval;
+	
+	retval = misc_register(&ili9341_lcd_dev);
+	if(retval < 0){
+		printk(KERN_INFO "LCD: misc_register failed\n");
+		return retval;
+	}
+#ifdef DEBUG
+	printk(KERN_DEBUG "LCD: init\n");
+#endif
+	
+	mutex_lock(&ili9341_lcd_mutex);
+	
+	ili9341_init();
+	/*
+	write_dot_lcd(0, 0, 1);
+	write_dot_lcd(127, 0, 1);
+	write_dot_lcd(0, 63, 1);
+	write_dot_lcd(127, 63, 1);
+	write_dot_lcd(0, 1, 1);
+	write_dot_lcd(0, 2, 1);
+	write_dot_lcd(0, 3, 1);
+	write_dot_lcd(0, 4, 1);
+	
+	write_dot_lcd(2, 7, 1);
+	write_dot_lcd(3, 7, 1);
+	write_dot_lcd(4, 7, 1);
+	write_dot_lcd(5, 7, 1);
+	
+	line(4,4,50,60);
+	line(4,4,100,4);
+	line(4,4,4,60);
+	line(0,0,120,60);
+	rectangle(12,12,42,42,1);
+	rectangle(12,12,62,62,0);
+	mdelay(8000);
+	
+	circle(10,10,10,1);
+	circle(118,54,10,0);
+	circle(800,30,16,0);
+	mdelay(8000);
+	
+//	mdelay(5000);
+*/
+//	font_set(1,1);
+//	put_string(0, 0, ili9341_lcd_logo);//åœ¨æŒ‡å®šä½�ç½®æ˜¾ç¤ºå­—ç¬¦ä¸²
+	
+	mutex_unlock(&ili9341_lcd_mutex);
+	printk(KERN_EMERG "ili9341_lcd\n");
+	return 0;
+}
+
+static void __exit ili9341_lcd_exit(void)
+{
+	misc_deregister(&ili9341_lcd_dev);
+}
+
+module_init(ili9341_lcd_init);
+module_exit(ili9341_lcd_exit);
+
+MODULE_DESCRIPTION("ILI9341 Driver");
+MODULE_AUTHOR("loongson THF");
+MODULE_LICENSE("GPL");
diff -uNra linux-3.0.82/drivers/misc/ili9341.h linux-3.0.82x/drivers/misc/ili9341.h
--- linux-3.0.82/drivers/misc/ili9341.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/misc/ili9341.h	2017-09-23 03:42:49.642676213 +0800
@@ -0,0 +1,1242 @@
+ï»¿#ifndef	__ILI9341_h__
+#define	__ILI9341_h__
+
+//	write your header here
+/*
+typedef unsigned int  u32;
+typedef unsigned short u16;
+typedef unsigned char  u8;
+typedef signed int  s32;
+typedef signed short s16;
+typedef signed char  s8;
+typedef int bool;
+typedef unsigned long dma_addr_t;
+
+#define writeb(val, addr) (*(volatile u8*)(addr) = (val))
+#define writew(val, addr) (*(volatile u16*)(addr) = (val))
+#define writel(val, addr) (*(volatile u32*)(addr) = (val))
+#define readb(addr) (*(volatile u8*)(addr))
+#define readw(addr) (*(volatile u16*)(addr))
+#define readl(addr) (*(volatile u32*)(addr))
+*/
+
+#define   BLACK                0x0000                // é»‘è‰²ï¼š    0,   0,   0 //
+#define   BLUE                 0x001F                // è“�è‰²ï¼š    0,   0, 255 //
+#define   GREEN                0x07E0                // ç»¿è‰²ï¼š    0, 255,   0 //
+#define   CYAN                 0x07FF                // é�’è‰²ï¼š    0, 255, 255 //
+#define   RED                  0xF800                // çº¢è‰²ï¼š  255,   0,   0 //
+#define   MAGENTA              0xF81F                // å“�çº¢ï¼š  255,   0, 255 //
+#define   YELLOW               0xFFE0                // é»„è‰²ï¼š  255, 255, 0   //
+#define   WHITE                0xFFFF                // ç™½è‰²ï¼š  255, 255, 255 //
+#define   NAVY                 0x000F                // æ·±è“�è‰²ï¼š  0,   0, 128 //
+#define   DGREEN               0x03E0                // æ·±ç»¿è‰²ï¼š  0, 128,   0 //
+#define   DCYAN                0x03EF                // æ·±é�’è‰²ï¼š  0, 128, 128 //
+#define   MAROON               0x7800                // æ·±çº¢è‰²ï¼š128,   0,   0 //
+#define   PURPLE               0x780F                // ç´«è‰²ï¼š  128,   0, 128 //
+#define   OLIVE                0x7BE0                // æ©„æ¦„ç»¿ï¼š128, 128,   0 //
+#define   LGRAY                0xC618                // ç�°ç™½è‰²ï¼š192, 192, 192 //
+#define   DGRAY                0x7BEF                // æ·±ç�°è‰²ï¼š128, 128, 128 //
+
+//=========================LCDæŽ¥å�£å¼•è„šå®šä¹‰======================
+#define LCDCS	29		//ç‰‡é€‰ä¿¡å�·
+#define LCDA0	36		//å‘½ä»¤ä¿¡å�·
+#define LCDWR	37		//æ—¶é’Ÿä¿¡å�·
+#define LCDRD	35		//æ•°æ�®ä¿¡å�·
+#define LCDRES	34		//å¤�ä½�ä¿¡å�·
+
+
+#define LCD_X_MAX			240-1			//å±�å¹•çš„Xè½´çš„ç‰©ç�†å®½åº¦
+#define LCD_Y_MAX			320-1			//å±�å¹•çš„Yè½´çš„ç‰©ç�†å®½åº¦
+
+#define LCD_XY_SWITCH		0				//æ˜¾ç¤ºæ—¶Xè½´å’ŒYç”±äº¤æ�¢
+#define LCD_X_REV			0				//æ˜¾ç¤ºæ—¶Xè½´å��è½¬
+#define LCD_Y_REV			0				//æ˜¾ç¤ºæ—¶Yè½´å��è½¬
+
+#if LCD_XY_SWITCH == 0
+	#define DIS_X_MAX		LCD_X_MAX
+	#define DIS_Y_MAX		LCD_Y_MAX
+#endif
+
+#if LCD_XY_SWITCH == 1
+	#define DIS_X_MAX		LCD_Y_MAX
+	#define DIS_Y_MAX		LCD_X_MAX
+#endif
+
+#define LCD_INITIAL_COLOR	0x0000			//å®šä¹‰LCDå±�åˆ�å§‹åŒ–æ—¶çš„èƒŒæ™¯è‰²
+
+/*
+void write_dot_lcd(int x, int y, unsigned int color);
+void fill_dot_lcd(unsigned int color);
+//unsigned int get_dot_lcd(int x,int y);
+//void clear_dot_lcd(int x,int y);
+//void set_dot_addr_lcd(int x,int y);
+void lcd_fill(unsigned int a);
+void lcd_fill_s(unsigned int number,unsigned int color);
+
+//LCD åˆ�å§‹åŒ–å‡½æ•°ï¼Œä¸€èˆ¬ç”¨äºŽLCDå±�çš„å¯„å­˜å™¨åˆ�å§‹åŒ–
+//void LCD_Init(void);	//åœ¨LCD_Driver_User.cä¸­å®šä¹‰çš„å‡½æ•°ï¼Œå¦‚æœ‰å¿…è¦�è¯¥å‡½æ•°è¿˜ä¼šåŒ…å�«ç«¯å�£åˆ�å§‹åŒ–ã€�å¤�ä½�ç­‰æ“�ä½œ
+
+//ç”»ç›´çº¿å‡½æ•°ï¼Œs_xã€�s_yä¸ºèµ·å§‹ç‚¹ï¼Œe_xã€�e_yä¸ºç»“æ�Ÿç‚¹
+void line_my(int s_x, int s_y, int e_x, int e_y);
+//ç»˜å›¾æ¨¡å¼�ã€�å½“å‰�ç»˜å›¾é¢œè‰²è®¾ç½®
+void set_paint_mode(int mode, unsigned int color);
+//æ ‡å‡†å­—ç¬¦è®¾ç½®ï¼ŒåŒ…æ‹¬ä¸¤åž‹å�·ASCIIç �çš„å¤§å°�å°ºå¯¸ï¼Œä»¥å�Šå­—ä½“é¢œè‰²çš„è®¾ç½®
+void font_set(int font_num, unsigned int color);
+//äºŽxã€�yçš„å��æ ‡ä¸Šå†™å…¥ä¸€ä¸ªæ ‡å‡†å­—ç¬¦
+void put_char(int x, int y, unsigned int a);
+//äºŽxã€�yçš„å��æ ‡ä¸ºèµ·å§‹å†™å…¥ä¸€ä¸²æ ‡å‡†å­—ç¬¦ä¸²
+void put_string(int x, int y, char *p);
+//äºŽxã€�yçš„å��æ ‡ä¸ºä¸­å¿ƒï¼Œç»˜åˆ¶ä¸€ä¸ªåœ†è¾¹æˆ–å®žå¿ƒåœ†
+void put_pixel(int x, int y);
+void circle(int x, int y, int r, int mode);
+//ç»˜åˆ¶ä¸€ä¸ªä»¥leftã€�topå’Œrightã€�bottomä¸ºä¸¤ä¸ªå¯¹è§’çš„çŸ©å½¢æ¡†æˆ–è€…å®žå¿ƒçŸ©å½¢
+void rectangle(int left, int top, int right, int bottom, int mode);
+//å…¨å±�ä»¥åˆ�å§‹åŒ–å±�å¹•è‰²çš„é¢œè‰²è¿›è¡Œæ¸…å±�,åˆ�å§‹åŒ–å±�å¹•è‰²åœ¨LCD_Config.hå½“ä¸­å®šä¹‰â€œLCD_INITIAL_COLORâ€�
+void clr_screen(void);
+*/
+
+//ä»¥ä¸‹å‡½æ•°ä»¥å�Šå�˜é‡�çš„å£°æ˜Žä¸€èˆ¬å»ºè®®ç”¨æˆ·ä¸�è¦�è°ƒç”¨ï¼Œä»…ä¾›é«˜çº§ç”¨æˆ·åœ¨è‡ªè¡Œç¼–å†™ç‰¹æ®Šæ˜¾ç¤ºæ•ˆæžœä»¥å�Šç‰¹æ€§åº”ç”¨ç¨‹åº�æ—¶ä½¿ç”¨
+static void pos_switch(unsigned int * x, unsigned int * y);
+static void writ_dot(int x, int y, unsigned int color);
+static void line_f(int s_x, int s_y, int e_x);//,int e_y);
+static unsigned int get_dot(int x, int y);
+static void clear_dot(int x, int y);
+static void set_dot_addr(int x, int y);
+
+unsigned char GB32[] = 
+{
+	//ç§‘
+	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+	0x00,0x00,0x04,0x00,0x00,0x78,0x0f,0x00,0x01,0xfc,0x0f,0x00,0x0f,0xc0,0x0f,0x00,
+	0x01,0xc1,0xcf,0x00,0x01,0xc0,0xef,0x00,0x01,0xc8,0x6f,0x00,0x01,0xdc,0x6f,0x00,
+	0x3f,0xfe,0x0f,0x00,0x01,0xc0,0x0f,0x00,0x03,0xc1,0x0f,0x00,0x03,0xf1,0xcf,0x00,
+	0x07,0xf8,0xef,0x00,0x07,0xdc,0xef,0x00,0x07,0xcc,0x6f,0x70,0x0d,0xc0,0x0f,0xf8,
+	0x09,0xc0,0x0f,0xc0,0x19,0xc1,0xff,0x00,0x31,0xde,0x0f,0x00,0x01,0xc0,0x0f,0x00,
+	0x01,0xc0,0x0f,0x00,0x01,0xc0,0x0f,0x00,0x01,0xc0,0x0f,0x00,0x01,0xc0,0x0f,0x00,
+	0x01,0xc0,0x0f,0x00,0x01,0xc0,0x0e,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+	//æŠ€
+	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+	0x01,0x00,0xe0,0x00,0x03,0x80,0xf0,0x00,0x03,0x80,0xf0,0x00,0x03,0x80,0xf0,0x80,
+	0x03,0x80,0xf1,0xc0,0x03,0x8f,0xff,0xe0,0x03,0xb0,0xf0,0x00,0x3f,0xf8,0xf0,0x00,
+	0x03,0x80,0xf0,0x00,0x03,0x80,0xf0,0x00,0x03,0x90,0xf3,0x00,0x03,0xff,0xff,0x80,
+	0x03,0xc2,0x03,0x00,0x0f,0x82,0x07,0x00,0x3f,0x83,0x06,0x00,0x1b,0x83,0x0e,0x00,
+	0x03,0x81,0x8c,0x00,0x03,0x81,0x9c,0x00,0x03,0x80,0xf8,0x00,0x03,0x80,0xf0,0x00,
+	0x03,0x80,0xf8,0x00,0x03,0x81,0xfc,0x00,0x03,0x83,0x9f,0x80,0x3f,0x86,0x0f,0xf0,
+	0x0f,0x18,0x03,0xc0,0x07,0x60,0x01,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+};
+
+unsigned char Asii1529[] =
+{
+/*--  æ–‡å­—:     --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+/*--  æ–‡å­—:  !  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x80,0x03,0x80,0x03,0x80,
+0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x01,0x00,
+0x01,0x00,0x01,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x80,0x03,0x80,
+0x03,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+/*--  æ–‡å­—:  "  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x03,0x18,0x07,0x38,0x0F,0x78,0x0E,0x70,0x1C,0xE0,0x39,0xC0,
+0x31,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+/*--  æ–‡å­—:  #  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x20,0x08,0x20,
+0x18,0x60,0x18,0x60,0x7F,0xF8,0x7F,0xF8,0x18,0x60,0x18,0x60,0x18,0x60,0x18,0x60,
+0x18,0x60,0x18,0x60,0x7F,0xF8,0x7F,0xF8,0x18,0x60,0x18,0x60,0x18,0x60,0x10,0x40,
+0x10,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+/*--  æ–‡å­—:  $  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x01,0x00,0x07,0xE0,0x0F,0x78,
+0x1D,0x18,0x19,0x38,0x19,0x38,0x1D,0x00,0x1F,0x00,0x0F,0x00,0x07,0x80,0x03,0xE0,
+0x01,0xF0,0x01,0x78,0x01,0x38,0x39,0x38,0x39,0x18,0x39,0x18,0x31,0x38,0x1D,0xF0,
+0x0F,0xE0,0x01,0x00,0x01,0x00,0x01,0x00,0x00,0x00,
+/*--  æ–‡å­—:  %  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x78,0x60,0xCC,0x60,
+0xCC,0x60,0x84,0xC0,0x84,0xC0,0x85,0x80,0x85,0x80,0xCF,0x00,0xEF,0x00,0x7B,0xF0,
+0x07,0xD8,0x07,0x98,0x0D,0x08,0x0D,0x08,0x19,0x08,0x19,0x08,0x19,0x98,0x31,0xD8,
+0x30,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+/*--  æ–‡å­—:  &  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1E,0x00,0x37,0x00,
+0x33,0x00,0x23,0x00,0x23,0x00,0x37,0x00,0x37,0xF8,0x3E,0x70,0x38,0x20,0x7C,0x20,
+0x7C,0x60,0xEE,0x60,0xCE,0x60,0xC7,0xC0,0xC3,0xC0,0xE3,0xC0,0xE1,0xC4,0x73,0xEC,
+0x3E,0x78,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+/*--  æ–‡å­—:  '  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x0C,0x00,0x1C,0x00,0x38,0x00,
+0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+/*--  æ–‡å­—:  (  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x18,0x00,0x38,0x00,0x70,0x00,0x60,0x00,0xE0,0x01,0xC0,
+0x01,0xC0,0x01,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x00,0x03,0x00,0x03,0x00,
+0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x01,0xC0,0x01,0xC0,0x00,0xC0,0x00,0x60,
+0x00,0x70,0x00,0x38,0x00,0x18,0x00,0x00,0x00,0x00,
+/*--  æ–‡å­—:  )  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x60,0x00,0x70,0x00,0x38,0x00,0x18,0x00,0x1C,0x00,0x0E,0x00,
+0x0E,0x00,0x06,0x00,0x07,0x00,0x07,0x00,0x07,0x00,0x03,0x00,0x03,0x00,0x03,0x00,
+0x07,0x00,0x07,0x00,0x07,0x00,0x07,0x00,0x0E,0x00,0x0E,0x00,0x0C,0x00,0x18,0x00,
+0x38,0x00,0x70,0x00,0x60,0x00,0x00,0x00,0x00,0x00,
+/*--  æ–‡å­—:  *  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x80,
+0x03,0x80,0x03,0x80,0x73,0x9C,0x7B,0xBC,0x7D,0x7C,0x1F,0xF0,0x07,0xC0,0x1F,0xF0,
+0x7D,0x7C,0x7B,0xBC,0x73,0x9C,0x03,0x80,0x03,0x80,0x03,0x80,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+/*--  æ–‡å­—:  +  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x7F,0xFC,0x01,0x00,
+0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+/*--  æ–‡å­—:  ,  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3C,0x00,0x3C,0x00,
+0x3C,0x00,0x0C,0x00,0x1C,0x00,0x38,0x00,0x70,0x00,
+/*--  æ–‡å­—:  -  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xFC,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+/*--  æ–‡å­—:  .  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x38,0x00,0x38,0x00,
+0x38,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+/*--  æ–‡å­—:  /  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x18,0x00,0x18,0x00,0x38,0x00,0x30,0x00,0x30,0x00,0x60,
+
+0x00,0x60,0x00,0xC0,0x00,0xC0,0x01,0x80,0x01,0x80,0x03,0x00,0x03,0x00,0x03,0x00,
+
+0x06,0x00,0x06,0x00,0x0C,0x00,0x0C,0x00,0x18,0x00,0x18,0x00,0x30,0x00,0x30,0x00,
+
+0x70,0x00,0x60,0x00,0x60,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  0  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xC0,0x1C,0xE0,
+
+0x38,0x70,0x38,0x30,0x70,0x38,0x70,0x38,0x70,0x38,0x60,0x18,0x60,0x18,0x60,0x18,
+
+0x60,0x18,0x60,0x18,0x70,0x38,0x70,0x38,0x70,0x38,0x30,0x30,0x38,0x70,0x1C,0xE0,
+
+0x0F,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  1  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x07,0x00,
+
+0x1F,0x00,0x07,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,
+
+0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x07,0x80,
+
+0x1F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  2  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xC0,0x39,0xE0,
+
+0x60,0x70,0x60,0x70,0x60,0x30,0x60,0x30,0x60,0x70,0x00,0x70,0x00,0xE0,0x00,0xC0,
+
+0x01,0x80,0x03,0x00,0x06,0x00,0x0C,0x00,0x18,0x10,0x30,0x30,0x60,0x70,0x7F,0xF0,
+
+0x7F,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  3  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xC0,0x39,0xE0,
+
+0x30,0x70,0x30,0x70,0x30,0x30,0x00,0x70,0x00,0x70,0x01,0xE0,0x03,0xC0,0x00,0xF0,
+
+0x00,0x30,0x00,0x38,0x00,0x18,0x00,0x18,0x30,0x18,0x30,0x38,0x30,0x38,0x38,0xF0,
+
+0x0F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  4  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xE0,0x00,0xE0,0x01,0xE0,
+
+0x01,0xE0,0x03,0xE0,0x06,0xE0,0x06,0xE0,0x0C,0xE0,0x18,0xE0,0x18,0xE0,0x30,0xE0,
+
+0x20,0xE0,0x60,0xE0,0x7F,0xFC,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x03,0xF8,
+
+0x07,0xFC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  5  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xF8,0x1F,0xF8,
+
+0x18,0x00,0x18,0x00,0x18,0x00,0x18,0x00,0x18,0x00,0x1F,0xE0,0x1E,0x70,0x18,0x38,
+
+0x10,0x38,0x00,0x18,0x00,0x18,0x30,0x18,0x30,0x38,0x30,0x38,0x30,0x38,0x1C,0xF0,
+
+0x0F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  6  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xE0,0x0E,0x70,
+
+0x18,0x30,0x30,0x30,0x30,0x00,0x70,0x00,0x70,0x00,0x67,0xE0,0x7E,0xF0,0x78,0x38,
+
+0x70,0x38,0x60,0x18,0x60,0x18,0x70,0x18,0x70,0x38,0x70,0x38,0x38,0x38,0x1C,0xF0,
+
+0x0F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  7  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xF8,0x3F,0xF8,
+
+0x38,0x30,0x30,0x30,0x20,0x60,0x00,0x40,0x00,0xC0,0x00,0x80,0x01,0x80,0x01,0x00,
+
+0x03,0x00,0x03,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,
+
+0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  8  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xE0,0x3C,0xF0,
+
+0x70,0x38,0x70,0x38,0x60,0x18,0x70,0x18,0x78,0x38,0x3E,0x70,0x1F,0xE0,0x1F,0xE0,
+
+0x39,0xF0,0x70,0x78,0x70,0x38,0x60,0x38,0x60,0x18,0x70,0x38,0x70,0x38,0x3C,0xF0,
+
+0x1F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  9  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xC0,0x3C,0xE0,
+
+0x30,0x30,0x70,0x38,0x70,0x38,0x60,0x18,0x60,0x18,0x60,0x38,0x70,0x38,0x70,0x78,
+
+0x3D,0xF8,0x1F,0xB8,0x00,0x38,0x00,0x38,0x00,0x30,0x30,0x70,0x30,0xE0,0x39,0xC0,
+
+0x1F,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  :  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x07,0x00,0x07,0x00,0x00,0x00,0x00,0x00,
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x07,0x00,
+
+0x07,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  ;  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x00,0x03,0x00,0x00,0x00,0x00,0x00,
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x00,
+
+0x03,0x00,0x01,0x00,0x03,0x00,0x03,0x00,0x03,0x00,
+
+/*--  æ–‡å­—:  <  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x00,0x38,0x00,0x70,0x00,0xE0,
+
+0x01,0xC0,0x03,0x80,0x07,0x00,0x0E,0x00,0x1C,0x00,0x38,0x00,0x30,0x00,0x38,0x00,
+
+0x1C,0x00,0x0E,0x00,0x07,0x00,0x03,0x80,0x01,0xC0,0x00,0xE0,0x00,0x70,0x00,0x38,
+
+0x00,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  =  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xFC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+0x00,0x00,0x7F,0xFC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  >  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x00,0x38,0x00,0x1C,0x00,0x0E,0x00,
+
+0x07,0x00,0x03,0x80,0x01,0xC0,0x00,0xE0,0x00,0x70,0x00,0x38,0x00,0x18,0x00,0x38,
+
+0x00,0x70,0x00,0xE0,0x01,0xC0,0x03,0x80,0x07,0x00,0x0E,0x00,0x1C,0x00,0x38,0x00,
+
+0x30,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  ?  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xE0,0x3C,0xF0,0x70,0x38,
+
+0x60,0x38,0x60,0x18,0x70,0x18,0x70,0x38,0x00,0x38,0x00,0x70,0x01,0xE0,0x03,0x80,
+
+0x03,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x07,0x00,
+
+0x07,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  @  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xE0,0x0E,0x70,
+
+0x1C,0x18,0x38,0x0C,0x31,0xFC,0x73,0x7C,0x76,0x64,0x64,0x64,0x6C,0x64,0x6C,0xE4,
+
+0x6C,0xEC,0x68,0xEC,0x78,0xCC,0x7D,0xD8,0x7F,0x74,0x38,0x0C,0x18,0x18,0x1E,0x70,
+
+0x07,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  A  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x00,0x03,0x80,0x07,0x80,
+
+0x07,0x80,0x07,0x80,0x0D,0xC0,0x0D,0xC0,0x0D,0xC0,0x08,0xC0,0x18,0xE0,0x18,0xE0,
+
+0x18,0xE0,0x1F,0xE0,0x30,0x70,0x30,0x70,0x30,0x70,0x20,0x30,0x60,0x38,0x60,0x38,
+
+0xF8,0xFC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  B  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xE0,0x79,0xF0,
+
+0x30,0x70,0x30,0x30,0x30,0x30,0x30,0x70,0x30,0x70,0x31,0xE0,0x3F,0xC0,0x30,0xF0,
+
+0x30,0x30,0x30,0x38,0x30,0x18,0x30,0x18,0x30,0x18,0x30,0x38,0x30,0x38,0x38,0xF0,
+
+0xFF,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  C  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xF8,0x0E,0x78,
+
+0x1C,0x1C,0x38,0x0C,0x30,0x04,0x70,0x00,0x70,0x00,0x70,0x00,0x60,0x00,0x60,0x00,
+
+0x60,0x00,0x60,0x00,0x70,0x00,0x70,0x04,0x70,0x0C,0x38,0x0C,0x38,0x18,0x1E,0x70,
+
+0x0F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  D  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x80,0x79,0xE0,
+
+0x30,0x70,0x30,0x30,0x30,0x38,0x30,0x38,0x30,0x38,0x30,0x18,0x30,0x18,0x30,0x18,
+
+0x30,0x18,0x30,0x18,0x30,0x38,0x30,0x38,0x30,0x38,0x30,0x70,0x30,0x70,0x7B,0xE0,
+
+0xFF,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  E  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xF8,0x3C,0x3C,
+
+0x18,0x0C,0x18,0x04,0x18,0x00,0x18,0x20,0x18,0x20,0x18,0x60,0x1F,0xE0,0x18,0x60,
+
+0x18,0x60,0x18,0x20,0x18,0x00,0x18,0x00,0x18,0x04,0x18,0x0C,0x18,0x0C,0x3C,0x3C,
+
+0x7F,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  F  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xF8,0x3C,0x3C,
+
+0x18,0x0C,0x18,0x04,0x18,0x00,0x18,0x20,0x18,0x20,0x18,0x60,0x1F,0xE0,0x18,0x60,
+
+0x18,0x20,0x18,0x20,0x18,0x00,0x18,0x00,0x18,0x00,0x18,0x00,0x18,0x00,0x3C,0x00,
+
+0x7E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  G  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xF0,0x1E,0xF0,
+
+0x18,0x30,0x38,0x30,0x30,0x10,0x70,0x00,0x70,0x00,0x60,0x00,0x60,0x00,0x60,0x00,
+
+0x60,0x00,0x60,0xFC,0x70,0x78,0x70,0x30,0x70,0x30,0x30,0x30,0x38,0x30,0x1E,0xF0,
+
+0x0F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  H  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFC,0xFC,0x78,0x78,
+
+0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x3F,0xF0,
+
+0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x78,0x78,
+
+0xFC,0xFC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  I  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xF0,0x07,0x80,
+
+0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,
+
+0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x07,0x80,
+
+0x3F,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  J  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFC,0x00,0xE0,
+
+0x00,0xC0,0x00,0xC0,0x00,0xC0,0x00,0xC0,0x00,0xC0,0x00,0xC0,0x00,0xC0,0x00,0xC0,
+
+0x00,0xC0,0x00,0xC0,0x00,0xC0,0x00,0xC0,0x00,0xC0,0x00,0xC0,0x00,0xC0,0x00,0xC0,
+
+0x71,0xC0,0x71,0xC0,0x7B,0x80,0x3F,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  K  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFC,0xF8,0x78,0x70,
+
+0x30,0x60,0x30,0xC0,0x31,0x80,0x33,0x80,0x33,0x00,0x37,0x00,0x3F,0x00,0x3F,0x80,
+
+0x3B,0x80,0x31,0xC0,0x31,0xC0,0x30,0xE0,0x30,0xE0,0x30,0x70,0x30,0x70,0x78,0x38,
+
+0xFC,0xFC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  L  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7E,0x00,0x3C,0x00,
+
+0x18,0x00,0x18,0x00,0x18,0x00,0x18,0x00,0x18,0x00,0x18,0x00,0x18,0x00,0x18,0x00,
+
+0x18,0x00,0x18,0x00,0x18,0x00,0x18,0x00,0x18,0x04,0x18,0x0C,0x18,0x0C,0x3C,0x3C,
+
+0x7F,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  M  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xF8,0x3E,0x78,0x3C,
+
+0x38,0x38,0x3C,0x78,0x3C,0x78,0x3C,0x78,0x3C,0xD8,0x2E,0xD8,0x2E,0xD8,0x2E,0xD8,
+
+0x2F,0xD8,0x27,0x98,0x27,0x98,0x27,0x98,0x27,0x98,0x27,0x18,0x23,0x18,0x73,0x3C,
+
+0xFB,0x7E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  N  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xF8,0x7C,0x78,0x18,
+
+0x3C,0x10,0x3C,0x10,0x2E,0x10,0x2E,0x10,0x27,0x10,0x27,0x10,0x27,0x90,0x23,0x90,
+
+0x23,0x90,0x21,0xD0,0x21,0xD0,0x20,0xF0,0x20,0xF0,0x20,0x70,0x20,0x70,0x30,0x30,
+
+0xF8,0x30,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  O  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xE0,0x1E,0xF0,
+
+0x38,0x38,0x30,0x18,0x70,0x1C,0x70,0x1C,0x70,0x1C,0x60,0x0C,0x60,0x0C,0x60,0x0C,
+
+0x60,0x0C,0x60,0x0C,0x70,0x1C,0x70,0x1C,0x70,0x1C,0x30,0x18,0x18,0x38,0x1E,0xF0,
+
+0x07,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  P  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xF0,0x3C,0x78,
+
+0x18,0x1C,0x18,0x1C,0x18,0x0C,0x18,0x0C,0x18,0x1C,0x18,0x1C,0x18,0x78,0x1F,0xF0,
+
+0x18,0x00,0x18,0x00,0x18,0x00,0x18,0x00,0x18,0x00,0x18,0x00,0x18,0x00,0x3C,0x00,
+
+0x7E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  Q  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xE0,0x1E,0xF0,
+
+0x38,0x38,0x30,0x18,0x70,0x1C,0x70,0x1C,0x70,0x1C,0x60,0x0C,0x60,0x0C,0x60,0x0C,
+
+0x60,0x0C,0x60,0x0C,0x70,0x1C,0x7F,0x9C,0x7D,0xDC,0x38,0xD8,0x38,0xF0,0x1E,0xE0,
+
+0x0F,0xF4,0x00,0x7C,0x00,0x38,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  R  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xE0,0x3C,0xF8,
+
+0x18,0x38,0x18,0x18,0x18,0x18,0x18,0x38,0x18,0x38,0x18,0xF0,0x1F,0xE0,0x19,0xC0,
+
+0x19,0xC0,0x19,0xE0,0x18,0xE0,0x18,0xE0,0x18,0x70,0x18,0x70,0x18,0x70,0x3C,0x38,
+
+0x7E,0x3C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  S  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xA0,0x39,0xE0,
+
+0x70,0x60,0x70,0x60,0x60,0x20,0x70,0x00,0x70,0x00,0x7C,0x00,0x1F,0x00,0x0F,0xC0,
+
+0x03,0xE0,0x00,0xF0,0x00,0x70,0x40,0x30,0x40,0x30,0x60,0x70,0x70,0x70,0x7D,0xE0,
+
+0x7F,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  T  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xF8,0x73,0x38,
+
+0x63,0x18,0x43,0x08,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,
+
+0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x80,
+
+0x0F,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  U  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFC,0x7C,0x78,0x38,
+
+0x30,0x10,0x30,0x10,0x30,0x10,0x30,0x10,0x30,0x10,0x30,0x10,0x30,0x10,0x30,0x10,
+
+0x30,0x10,0x30,0x10,0x30,0x10,0x30,0x10,0x30,0x10,0x30,0x30,0x38,0x30,0x1C,0xE0,
+
+0x0F,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  V  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xF8,0xF8,0x70,0x30,
+
+0x70,0x30,0x38,0x60,0x38,0x60,0x38,0x60,0x38,0x60,0x1C,0xC0,0x1C,0xC0,0x1C,0xC0,
+
+0x1C,0xC0,0x0F,0x80,0x0F,0x80,0x0F,0x80,0x0F,0x80,0x07,0x00,0x07,0x00,0x07,0x00,
+
+0x07,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  W  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFB,0xDE,0x73,0x8C,
+
+0x71,0x8C,0x71,0x8C,0x71,0xCC,0x71,0xC8,0x31,0xC8,0x3B,0xD8,0x3B,0xD8,0x3B,0xF8,
+
+0x3A,0xF8,0x3E,0xF8,0x1E,0xF0,0x1E,0x70,0x1C,0x70,0x1C,0x70,0x1C,0x70,0x1C,0x70,
+
+0x08,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  X  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7E,0x7C,0x38,0x38,
+
+0x1C,0x30,0x1C,0x30,0x0E,0x60,0x0E,0x60,0x0F,0xC0,0x07,0xC0,0x07,0x80,0x03,0x80,
+
+0x03,0x80,0x03,0xC0,0x07,0xC0,0x04,0xE0,0x0C,0xE0,0x08,0x70,0x18,0x70,0x38,0x38,
+
+0x7C,0xFC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  Y  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFC,0x7C,0x70,0x38,
+
+0x38,0x30,0x38,0x30,0x38,0x60,0x1C,0x60,0x1C,0xC0,0x0E,0xC0,0x0E,0x80,0x07,0x80,
+
+0x07,0x80,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x80,
+
+0x0F,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  Z  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xF8,0x3C,0x78,
+
+0x30,0x70,0x20,0xF0,0x00,0xE0,0x01,0xE0,0x01,0xC0,0x03,0xC0,0x03,0x80,0x07,0x80,
+
+0x07,0x00,0x0F,0x00,0x0E,0x00,0x1E,0x00,0x1C,0x08,0x3C,0x18,0x38,0x18,0x78,0x78,
+
+0x7F,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  [  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x03,0xF8,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,
+
+0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,
+
+0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,
+
+0x02,0x00,0x02,0x00,0x03,0xF8,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  \  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x00,0x38,0x00,0x18,0x00,0x18,0x00,
+
+0x0C,0x00,0x0C,0x00,0x0E,0x00,0x06,0x00,0x06,0x00,0x03,0x00,0x03,0x00,0x03,0x80,
+
+0x01,0x80,0x01,0x80,0x00,0xC0,0x00,0xC0,0x00,0xE0,0x00,0x60,0x00,0x60,0x00,0x30,
+
+0x00,0x30,0x00,0x38,0x00,0x18,0x00,0x18,0x00,0x00,
+
+/*--  æ–‡å­—:  ]  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x3F,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,
+
+0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,
+
+0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,
+
+0x00,0x80,0x00,0x80,0x3F,0x80,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  ^  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x0F,0x80,0x0F,0x80,0x18,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  _  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFC,
+
+/*--  æ–‡å­—:  `  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x3C,0x00,0x0E,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  a  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xE0,0x1C,0x70,0x18,0x30,0x00,0x30,
+
+0x03,0xF0,0x0F,0xB0,0x1C,0x30,0x38,0x30,0x30,0x30,0x30,0x30,0x38,0x74,0x3D,0xFC,
+
+0x1F,0xBC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  b  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x00,0xF0,0x00,0x70,0x00,
+
+0x30,0x00,0x30,0x00,0x30,0x00,0x30,0x00,0x37,0xE0,0x3E,0x70,0x38,0x38,0x38,0x38,
+
+0x30,0x38,0x30,0x18,0x30,0x18,0x30,0x18,0x30,0x38,0x30,0x38,0x38,0x38,0x3C,0xF0,
+
+0x2F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  c  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xE0,0x0E,0x70,0x1C,0x30,0x38,0x30,
+
+0x38,0x00,0x30,0x00,0x30,0x00,0x30,0x00,0x38,0x00,0x38,0x08,0x18,0x18,0x1E,0x70,
+
+0x0F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  d  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x00,0xF0,0x00,0x70,
+
+0x00,0x30,0x00,0x30,0x00,0x30,0x00,0x30,0x0F,0xB0,0x1C,0xF0,0x38,0x70,0x38,0x30,
+
+0x38,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x38,0x70,0x38,0x78,0x1C,0xFC,
+
+0x0F,0xB0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  e  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xE0,0x1E,0x70,0x18,0x38,0x38,0x18,
+
+0x30,0x18,0x3F,0xF8,0x30,0x00,0x30,0x00,0x38,0x00,0x38,0x08,0x1C,0x18,0x1E,0x70,
+
+0x07,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  f  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xFC,0x03,0x9C,
+
+0x07,0x0C,0x06,0x00,0x06,0x00,0x06,0x00,0x7F,0xF0,0x06,0x00,0x06,0x00,0x06,0x00,
+
+0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x07,0x00,
+
+0x3F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  g  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFC,0x1E,0xFC,0x1C,0x70,0x18,0x30,
+
+0x18,0x30,0x1C,0x70,0x0E,0xF0,0x1F,0xE0,0x18,0x00,0x1F,0x00,0x1F,0xF0,0x1F,0xF8,
+
+0x38,0x38,0x30,0x18,0x38,0x38,0x3C,0x78,0x1F,0xE0,
+
+/*--  æ–‡å­—:  h  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x00,0xF0,0x00,0x70,0x00,
+
+0x30,0x00,0x30,0x00,0x30,0x00,0x30,0x00,0x33,0xF0,0x3F,0x78,0x38,0x38,0x30,0x18,
+
+0x30,0x18,0x30,0x18,0x30,0x18,0x30,0x18,0x30,0x18,0x30,0x18,0x30,0x18,0x78,0x3C,
+
+0xFC,0x7E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  i  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x80,0x03,0x80,
+
+0x03,0x80,0x00,0x00,0x00,0x00,0x03,0x00,0x1F,0x00,0x07,0x00,0x03,0x00,0x03,0x00,
+
+0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x80,
+
+0x1F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  j  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x70,0x00,0x70,
+
+0x00,0x70,0x00,0x00,0x00,0x00,0x00,0xE0,0x03,0xE0,0x00,0xE0,0x00,0x60,0x00,0x60,
+
+0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,
+
+0x00,0x60,0x00,0xE0,0x30,0xE0,0x39,0xC0,0x3F,0x80,
+
+/*--  æ–‡å­—:  k  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x00,0x78,0x00,0x38,0x00,
+
+0x18,0x00,0x18,0x00,0x18,0x00,0x18,0x00,0x18,0xF8,0x18,0x70,0x18,0xC0,0x19,0xC0,
+
+0x19,0x80,0x1B,0x80,0x1F,0xC0,0x1D,0xC0,0x1C,0xE0,0x18,0xF0,0x18,0x70,0x3C,0x78,
+
+0x7E,0xFC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  l  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x3F,0x00,0x07,0x00,
+
+0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,
+
+0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x07,0x80,
+
+0x3F,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  m  --*/
+
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xEF,0xF8,0x7F,0xF8,0x73,0x98,0x63,0x18,
+
+0x63,0x18,0x63,0x18,0x63,0x18,0x63,0x18,0x63,0x18,0x63,0x18,0x63,0x18,0x63,0x18,
+
+0xF7,0xBC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:  n  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x00,0xF3,0xF0,0x3F,0x78,0x3C,0x38,0x38,0x18,
+0x30,0x18,0x30,0x18,0x30,0x18,0x30,0x18,0x30,0x18,0x30,0x18,0x30,0x18,0x78,0x3C,
+0xFC,0x7E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+/*--  æ–‡å­—:  o  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xE0,0x1E,0xF0,0x18,0x30,0x38,0x38,
+0x38,0x38,0x30,0x18,0x30,0x18,0x30,0x18,0x38,0x38,0x38,0x38,0x18,0x30,0x1E,0xF0,
+0x0F,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+/*--  æ–‡å­—:  p  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x00,0xF7,0xE0,0x7E,0x70,0x38,0x38,0x30,0x38,
+0x30,0x38,0x30,0x18,0x30,0x18,0x30,0x18,0x30,0x38,0x30,0x38,0x38,0x30,0x3C,0xF0,
+0x37,0xE0,0x30,0x00,0x30,0x00,0x78,0x00,0xFC,0x00,
+/*--  æ–‡å­—:  q  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x90,0x1E,0xF0,0x18,0x70,0x38,0x30,
+0x38,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x38,0x30,0x38,0x70,0x1C,0xF0,
+0x0F,0xB0,0x00,0x30,0x00,0x30,0x00,0x38,0x00,0xFC,
+/*--  æ–‡å­—:  r  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x1C,0x00,0x7C,0xF8,0x1D,0xD8,0x0F,0x18,0x0E,0x00,
+0x0E,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0E,0x00,
+0x7F,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+/*--  æ–‡å­—:  s  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xF8,0x3C,0x78,0x30,0x18,0x30,0x08,
+0x3C,0x00,0x3F,0x80,0x0F,0xE0,0x01,0xF8,0x00,0x38,0x20,0x18,0x30,0x38,0x3C,0x78,
+0x3F,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+/*--  æ–‡å­—:  t  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x02,0x00,0x06,0x00,0x06,0x00,0x0E,0x00,0x3F,0xE0,0x06,0x00,0x06,0x00,0x06,0x00,
+0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x10,0x07,0x10,0x07,0x30,
+0x03,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+/*--  æ–‡å­—:  u  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x18,0xF0,0x78,0x70,0x38,0x30,0x18,0x30,0x18,
+0x30,0x18,0x30,0x18,0x30,0x18,0x30,0x18,0x30,0x18,0x30,0x38,0x38,0x3C,0x3C,0xFE,
+0x1F,0xD8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+/*--  æ–‡å­—:  v  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7E,0x7C,0x3C,0x38,0x1C,0x30,0x1C,0x30,
+0x1C,0x30,0x0E,0x60,0x0E,0x60,0x07,0x40,0x07,0xC0,0x07,0xC0,0x03,0x80,0x03,0x80,
+0x03,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+/*--  æ–‡å­—:  w  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xF7,0xFC,0x73,0x98,0x73,0x98,0x73,0x90,
+0x37,0xB0,0x3F,0xF0,0x3F,0xF0,0x3F,0xE0,0x1D,0xE0,0x1C,0xE0,0x1C,0xE0,0x1C,0xE0,
+0x18,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+/*--  æ–‡å­—:  x  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7E,0xF8,0x3C,0x70,0x1C,0x60,0x0E,0xC0,
+0x0F,0xC0,0x07,0x80,0x03,0x80,0x07,0x80,0x07,0xC0,0x0D,0xE0,0x18,0xE0,0x38,0xF0,
+0x7D,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+/*--  æ–‡å­—:  y  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7E,0xF8,0x38,0x70,0x1C,0x60,0x1C,0x60,
+0x1C,0x40,0x0E,0xC0,0x0E,0xC0,0x07,0x80,0x07,0x80,0x07,0x80,0x03,0x00,0x03,0x00,
+0x03,0x00,0x03,0x00,0x02,0x00,0x3E,0x00,0x3C,0x00,
+/*--  æ–‡å­—:  z  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xF0,0x38,0x70,0x30,0xE0,0x21,0xE0,
+0x01,0xC0,0x03,0x80,0x07,0x80,0x07,0x00,0x0E,0x08,0x1E,0x18,0x1C,0x18,0x38,0x38,
+0x3F,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+/*--  æ–‡å­—:  {  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x38,0x00,0x70,0x00,0x60,0x00,0x40,0x00,0x40,0x00,0x40,
+0x00,0x40,0x00,0x40,0x00,0x40,0x00,0x40,0x00,0xC0,0x01,0xC0,0x01,0x80,0x00,0xC0,
+0x00,0xC0,0x00,0x40,0x00,0x40,0x00,0x40,0x00,0x40,0x00,0x40,0x00,0x40,0x00,0x40,
+0x00,0x60,0x00,0x70,0x00,0x38,0x00,0x00,0x00,0x00,
+/*--  æ–‡å­—:  |  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,
+0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,
+0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,
+0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,
+/*--  æ–‡å­—:  }  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x38,0x00,0x1C,0x00,0x0C,0x00,0x04,0x00,0x04,0x00,0x04,0x00,
+0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x06,0x00,0x07,0x00,0x03,0x80,0x07,0x00,
+0x06,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,
+0x0C,0x00,0x1C,0x00,0x38,0x00,0x00,0x00,0x00,0x00,
+/*--  æ–‡å­—:  ~  --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x3E,0x00,0x77,0x0C,0x63,0x8C,0x61,0xDC,0x00,0xF8,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+
+/*--  æ–‡å­—:     --*/
+/*--  å®‹ä½“22;  æ­¤å­—ä½“ä¸‹å¯¹åº”çš„ç‚¹é˜µä¸ºï¼šå®½xé«˜=15x29   --*/
+/*--  å®½åº¦ä¸�æ˜¯8çš„å€�æ•°ï¼ŒçŽ°è°ƒæ•´ä¸ºï¼šå®½åº¦xé«˜åº¦=16x29  --*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+};
+#endif
diff -uNra linux-3.0.82/drivers/misc/Kconfig linux-3.0.82x/drivers/misc/Kconfig
--- linux-3.0.82/drivers/misc/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/misc/Kconfig	2017-09-23 03:42:49.642676213 +0800
@@ -20,6 +20,26 @@
 
 if MISC_DEVICES
 
+config EASY_DAB_AUDIO
+	tristate "easynetting spi dab autio supported"
+	depends on SPI
+	default n
+	help
+	  loongson-gz for easynetting network radio project
+
+config ILI9341
+	tristate "ili9341 a-Si TFT LCD Single Chip Driver"
+	default n
+	help
+	  240RGBx320 Resolution and 262K color,a-Si TFT LCD Single Chip Driver.
+	  Used for parallel 8-/9-/16-/18-bit data bus MCU interface.
+	  Say Y here if you have ILI9341.
+
+	  If unsure, say N .
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called ILI9341.
+
 config AD525X_DPOT
 	tristate "Analog Devices Digital Potentiometers"
 	depends on (I2C || SPI) && SYSFS
diff -uNra linux-3.0.82/drivers/misc/Makefile linux-3.0.82x/drivers/misc/Makefile
--- linux-3.0.82/drivers/misc/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/misc/Makefile	2017-09-23 03:42:49.642676213 +0800
@@ -2,7 +2,9 @@
 # Makefile for misc devices that really don't fit anywhere else.
 #
 
+obj-$(CONFIG_EASY_DAB_AUDIO)	+= easy_spi_dab.o	
 obj-$(CONFIG_IBM_ASM)		+= ibmasm/
+obj-$(CONFIG_ILI9341)	+= ili9341.o
 obj-$(CONFIG_AD525X_DPOT)	+= ad525x_dpot.o
 obj-$(CONFIG_AD525X_DPOT_I2C)	+= ad525x_dpot-i2c.o
 obj-$(CONFIG_AD525X_DPOT_SPI)	+= ad525x_dpot-spi.o
diff -uNra linux-3.0.82/drivers/misc/st7565r.c linux-3.0.82x/drivers/misc/st7565r.c
--- linux-3.0.82/drivers/misc/st7565r.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/misc/st7565r.c	2017-09-23 03:42:49.646676200 +0800
@@ -0,0 +1,1083 @@
+/*
+ * ST7565R driver
+ */
+
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/miscdevice.h>
+#include <linux/fcntl.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/fs.h>
+#include <linux/capability.h>
+
+#include <asm/uaccess.h>
+#include <asm/sections.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+
+#include <ls1b_board.h>
+
+#include "st7565r.h"
+
+static DEFINE_MUTEX(st7565r_lcd_mutex);
+
+static void st7565r_rest(void);
+static void write_dot_lcd(int x, int y, int i);
+
+//=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
+//  Global Variables
+//=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
+#define XLevelL		0x00
+#define XLevelH		0x10
+#define XLevel		((XLevelH&0x0F)*16+XLevelL)
+#define Max_Column	128
+#define Max_Row		64
+//#define Brightness	0x6F
+#define Brightness	0xFF
+
+static unsigned char x_witch;					//å­—ç¬¦å†™å…¥æ—¶çš„å®½åº¦
+static unsigned char y_witch;					//å­—ç¬¦å†™å…¥æ—¶çš„é«˜åº¦
+static int font_wrod;							//å­—ä½“çš„æ¯�ä¸ªå­—æ¨¡å� ç”¨å¤šå°‘ä¸ªå­˜å‚¨å�•å…ƒæ•°
+static unsigned char *char_tab;					//å­—åº“æŒ‡é’ˆ
+
+static int font_type = 0;						//æ ‡è¯†å­—ç¬¦ç±»åž‹
+static int font_cover = 0;						//å­—ç¬¦æ˜¾ç¤ºçš„æ¨¡å¼�
+static int char_backcolor = 0;					//è®¾ç½®è¦†ç›–æ¨¡å¼�æ—¶,å­—ç¬¦çš„èƒŒæ™¯è‰²
+
+//unsigned char Plot_Mode;						//ç»˜å›¾æ¨¡å¼�
+static int bmp_color = 1;
+static int char_color = 1;
+
+#undef DEBUG
+//#define	DEBUG
+//#define	M68			// 8-bit 68XX Parallel
+						//   BS1=0; BS2=1
+#define	I80				// 8-bit 80XX Parallel
+						//   BS1=1; BS2=1
+//#define	SPI			// 4-wire SPI
+						//   BS1=0; BS2=0
+						//   The unused pins should be connected with VSS mostly or floating (D2).
+/*
+#define LCDCS	16	//ç‰‡é€‰ä¿¡å�·
+#define LCDRS	17	//å¤�ä½�ä¿¡å�·
+#define LCDA0	18	//å‘½ä»¤ä¿¡å�·
+#define LCDSK	11	//æ—¶é’Ÿä¿¡å�·
+#define LCDSI	12	//æ•°æ�®ä¿¡å�·
+
+//M68
+#define	LCDRW	19
+#define	LCDE	20
+
+//I80
+#define	LCDWR	19
+#define	LCDRD	20
+*/
+
+#define	RES		(1 << 17)
+#define	CS		(1 << 16)
+#define	DC		(1 << 18)
+
+//M68
+#define	E		(1 << 20)
+#define	RW		(1 << 19)
+
+//I80
+#define	RD		(1 << 20)
+#define	WR		(1 << 19)
+
+//-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
+//  Read/Write Sequence
+//-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
+#ifdef M68					// 8-bit 68XX Parallel
+static void write_command(unsigned char Data)
+{
+	
+}
+
+
+static void write_data(unsigned char Data)
+{
+	
+}
+#endif
+
+
+#ifdef I80					// 8-bit 80XX Parallel
+static void inline write_command(unsigned char dat)
+{
+	unsigned int ret;
+	ret = *(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_OUT0)); //
+	ret &= 0xFFE000FF;	//ret &= ~(0x1FFF << 8); æ¸…é›¶
+	
+	//1 0010 xxxx xxxx
+//	ret &= ~CS;
+//	ret |= RES;
+//	ret &= ~DC;
+//	ret &= ~WR;
+//	ret |= RD;
+//	ret &= ~(0xFF << 8);
+	ret |= ((0x00120000) | (dat << 8));
+	*(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_OUT0)) = ret;
+//	udelay(5);
+	
+	ret = *(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_OUT0)); //
+	
+	//1 1111
+//	ret |= CS;
+//	ret |= RES;
+//	ret |= DC;
+//	ret |= WR;
+//	ret |= RD;
+	ret |= 0x001F0000;
+	*(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_OUT0)) = ret;
+//	udelay(800);
+//	printk(KERN_EMERG "RET = %x \n", ret);
+}
+
+
+static void inline write_data(unsigned char dat)
+{
+	unsigned int ret;
+	ret = *(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_OUT0)); //
+	ret &= 0xFFE000FF;	//ret &= ~(0x1FFF << 8); æ¸…é›¶
+	
+	//1 0110 xxxx xxxx
+//	ret &= ~CS;
+//	ret |= RES;
+//	ret |= DC;
+//	ret &= ~WR;
+//	ret |= RD;
+//	ret &= ~(0xFF << 8);
+	ret |= ((0x00160000) | (dat << 8));
+	*(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_OUT0)) = ret;
+//	udelay(5);
+	
+	ret = *(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_OUT0)); //
+	//1 1111
+//	ret |= CS;
+//	ret |= RES;
+//	ret |= DC;
+//	ret |= WR;
+//	ret |= RD;
+	ret |= 0x001F0000;
+	*(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_OUT0)) = ret;
+//	udelay(800);
+//	printk(KERN_EMERG "RET = %x \n", ret);
+}
+
+static unsigned char inline read_data(void)
+{
+	unsigned int ret;
+	unsigned char data;
+	
+	ret = *(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_OE0)); //è¾“å…¥ ä½¿èƒ½GPIO
+	ret |= (0xFF << 8);
+	*(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_OE0)) = ret;
+	
+	ret = *(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_OUT0)); //
+	ret &= 0xFFE0FFFF;	//ret &= ~(0x1FFF << 8); æ¸…é›¶
+	//0 1110
+//	ret &= ~CS;
+//	ret |= RES;
+//	ret |= DC;
+//	ret |= WR;
+//	ret &= ~RD;
+	ret |= 0x000E0000;
+	*(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_OUT0)) = ret;
+	
+	ret = *(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_OUT0)); //
+	ret &= 0xFFE0FFFF;	//ret &= ~(0x1FFF << 8); æ¸…é›¶
+	// 1 1110
+//	ret &= ~CS;
+//	ret |= RES;
+//	ret |= DC;
+//	ret |= WR;
+//	ret |= RD;
+	ret |= 0x001E0000;
+	*(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_OUT0)) = ret;
+	
+	ret = *(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_OUT0)); //
+	ret &= 0xFFE0FFFF;	//ret &= ~(0x1FFF << 8); æ¸…é›¶
+	//0 1110
+//	ret &= ~CS;
+//	ret |= RES;
+//	ret |= DC;
+//	ret |= WR;
+//	ret &= ~RD;
+	ret |= 0x000E0000;
+	*(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_OUT0)) = ret;
+	
+//	udelay(5);
+	ret = *(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_IN0)); //è¯»å›žçš„æ•°å€¼æ˜¯å��ç �ï¼Ÿ
+//	printk(KERN_EMERG "RET = %x \n", ret);
+	data = (unsigned char)(ret >> 8);
+//	printk(KERN_EMERG "Dat = %x \n", data);
+	
+	ret = *(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_OUT0)); //
+	ret &= 0xFFE0FFFF;	//ret &= ~(0x1FFF << 8); æ¸…é›¶
+	//1 1111
+//	ret |= CS;
+//	ret |= RES;
+//	ret |= DC;
+//	ret |= WR;
+//	ret |= RD;
+	ret |= 0x001F0000;
+	*(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_OUT0)) = ret;
+	
+	ret = *(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_OE0)); //è¾“å‡º ä½¿èƒ½GPIO
+	ret &= ~(0xFF << 8);
+	*(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_OE0)) = ret;
+	
+	return data;
+//	udelay(800);
+//	printk(KERN_EMERG "RET = %x \n", ret);
+}
+#endif
+
+
+#ifdef SPI					// 4-wire SPI
+static void write_command(unsigned char Data)
+{
+	unsigned char i;                                      //å®šä¹‰å±€éƒ¨å�˜é‡� 
+	unsigned char series,temp;                           //å®šä¹‰å±€éƒ¨å�˜é‡� 
+
+	gpio_set_value(LCDA0, 0);
+	gpio_set_value(LCDSK, 0);	//SCL=0   
+	series = dat;   
+	for(i=0; i<8; i++){
+		gpio_set_value(LCDSK, 0);	//SCL=0   
+		temp = series & 0x80;                    //å±�è”½ä½Ž7ä½�   
+		//å¦‚æžœtemp=1,åˆ™ä½¿SI=1.å¦‚æžœtemp+0,åˆ™ä½¿SI=0 
+		if(temp){   
+			gpio_set_value(LCDSI, 1);	//SI=1   
+		}   
+		else{   
+			gpio_set_value(LCDSI, 0);	//SI=0   
+		} 
+		gpio_set_value(LCDSK, 1);	//SCL=1ä¸Šå�‡æ²¿å†™
+		series = series << 1;               //å·¦ç§»1ä½�    
+	}
+}
+
+
+static void write_data(unsigned char Data)
+{
+	unsigned char i;                                      //å®šä¹‰å±€éƒ¨å�˜é‡� 
+	unsigned char series,temp;                           //å®šä¹‰å±€éƒ¨å�˜é‡� 
+
+	gpio_set_value(LCDA0, 1);
+	gpio_set_value(LCDSK, 0);	//SCL=0   
+	series = dat;   
+	for(i=0; i<8; i++){
+		gpio_set_value(LCDSK, 0);	//SCL=0   
+		temp = series & 0x80;                    //å±�è”½ä½Ž7ä½�   
+		//å¦‚æžœtemp=1,åˆ™ä½¿SI=1.å¦‚æžœtemp+0,åˆ™ä½¿SI=0 
+		if(temp){   
+			gpio_set_value(LCDSI, 1);	//SI=1   
+		}   
+		else{   
+			gpio_set_value(LCDSI, 0);	//SI=0   
+		} 
+		gpio_set_value(LCDSK, 1);	//SCL=1ä¸Šå�‡æ²¿å†™
+		series = series << 1;               //å·¦ç§»1ä½�    
+	}
+}
+#endif
+
+//-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
+//  Instruction Setting
+//-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
+static void inline set_lcd_bias(unsigned char d)
+{
+	write_command(0xA2|d);
+}
+
+static void inline set_power_control(unsigned char d)
+{
+	write_command(0x28|d);
+}
+
+static void inline set_resistor_ratio(unsigned char d)
+{
+	write_command(0x20|d);
+}
+
+static void inline set_start_column(unsigned char d)
+{
+	write_command(0x10+d/16);	// Set Higher Column Start Address for Page Addressing Mode
+									// Default => 0x10
+	write_command(0x00+d%16);	// Set Lower Column Start Address for Page Addressing Mode
+									// Default => 0x00
+}
+
+static void inline set_start_line(unsigned char d)
+{
+	write_command(0x40|d);	// Set Display Start Line
+								// Default => 0x40 (0x00)
+}
+
+static void inline set_contrast_control(unsigned char d)
+{
+	write_command(0x81);		// Set Contrast Control for Bank 0
+	write_command(d);			// Default => 0x80
+}
+
+static void inline set_segment_remap(unsigned char d)
+{
+	write_command(0xA0|d);	// Set Segment Re-Map
+							// Default => 0xA0
+							// 0xA0 (0x00) => Column Address 0 Mapped to SEG0
+							// 0xA1 (0x01) => Column Address 0 Mapped to SEG131
+}
+
+
+static void inline set_entire_display(unsigned char d)
+{
+	write_command(0xA4|d);	// Set Entire Display On / Off
+							// Default => 0xA4
+							// 0xA4 (0x00) => Normal Display
+							// 0xA5 (0x01) => Entire Display On
+}
+
+
+static void inline set_inverse_display(unsigned char d)
+{
+	write_command(0xA6|d);	// Set Inverse Display On/Off
+							// Default => 0xA6
+							// 0xA6 (0x00) => Normal Display
+							// 0xA7 (0x01) => Inverse Display On
+}
+
+static void inline set_display_on_off(unsigned char d)	
+{
+	write_command(0xAE|d);	// Set Display On/Off
+							// Default => 0xAE
+							// 0xAE (0x00) => Display Off
+							// 0xAF (0x01) => Display On
+}
+
+
+static void inline set_start_page(unsigned char d)
+{
+	write_command(0xB0|d);	// Set Page Start Address for Page Addressing Mode
+							// Default => 0xB0 (0x00)
+}
+
+
+static void inline set_common_remap(unsigned char d)
+{
+	write_command(0xC0|d);	// Set COM Output Scan Direction
+							// Default => 0xC0
+							// 0xC0 (0x00) => Scan from COM0 to 63
+							// 0xC8 (0x08) => Scan from COM63 to 0
+}
+
+static void inline set_read_modify_write(unsigned char d)
+{
+	write_command(0xE0|d);	// Set Read Modify Write Mode
+							// Default => 0xE0
+							// 0xE0 (0x00) => Enter Read Modify Write
+							// 0xEE (0x0E) => Exit Read Modify Write
+}
+
+
+static void inline set_nop(void)
+{
+	write_command(0xE3);		// Command for No Operation
+}
+
+
+//-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
+//  Show Regular Pattern (Full Screen)
+//-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
+static void fill_ram(unsigned char Data)
+{
+	unsigned char i,j;
+
+	for(i=0; i<8; i++){
+		set_start_page(i);
+		set_start_column(LCD_X_OFFSET);//è¿™é‡Œæ³¨æ„�ä¸�å�Œçš„LCDçš„å��ç§»
+
+		for(j=0; j<128; j++){
+			write_data(Data);
+		}
+	}
+}
+
+//=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
+//  Initialization GPIO
+//=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
+
+static void gpio_init(void)
+{
+	unsigned int ret;
+	ret = *(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_CFG0)); //GPIO0	0xbfd010c0 ä½¿èƒ½GPIO
+	ret |= 0x1FFF << 8;
+	*(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_CFG0)) = ret;
+	
+	ret = *(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_OE0)); //è¾“å‡º ä½¿èƒ½GPIO
+	ret &= ~(0x1FFF << 8);
+	*(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_OE0)) = ret;
+}
+
+static void st7565r_rest(void)
+{
+	unsigned int ret;
+	ret = *(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_OUT0)); //GPIO0	0xbfd010c0 ä½¿èƒ½GPIO
+	ret &= ~RES;
+	*(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_OUT0)) = ret;
+	mdelay(2);
+	ret = *(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_OUT0)); //GPIO0	0xbfd010c0 ä½¿èƒ½GPIO
+	ret |= RES;
+	*(volatile unsigned int *)(KSEG1ADDR(REG_GPIO_OUT0)) = ret;
+}
+
+//=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
+//  Initialization
+//=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
+static void st7565r_init(void)
+{
+	gpio_init();
+	st7565r_rest();
+	
+	write_command(0xe2);	//å¯„å­˜å™¨å¤�ä½�
+	udelay(1000);
+/*
+	// ç”µæº�ç®¡ç�†åˆ�å§‹ 
+	write_command(0xaf);	//0xafæ˜¾ç¤ºå™¨å¼€,0xaeæ˜¾ç¤ºå™¨å…³
+	write_command(0x40);	//å¼€å§‹è¡Œåœ°å�€
+	write_command(0xa2);	//1/7 bias
+	write_command(0x2f);	//0x2få�‡åŽ‹ç”µè·¯,ç”µåŽ‹ç®¡ç�†ç”µè·¯,
+							//ç”µåŽ‹è·Ÿéš�ç”µè·¯å�‡å¼€(0x28-0x2fä¸ºè®¾ç½®ä¸Šç”µæŽ§åˆ¶æ¨¡å¼�) 
+	write_command(0x26);	//0x20-0x27ä¸ºV5ç”µåŽ‹å†…éƒ¨ç”µé˜»è°ƒæ•´è®¾ç½® å¯¹æ¯”åº¦è°ƒèŠ‚
+	
+	write_command(0x81);	//ç”µé‡�è®¾ç½®æ¨¡å¼� 
+	write_command(0x0f);	//0x01-0x3fç”µé‡�å¯„å­˜å™¨è®¾ç½®æ¨¡å¼� 
+
+	// æ ¹æ�®å±�çš„æ–¹å�‘åˆ�å§‹åŒ–å®‰è£…æ–¹å�‘(å¤�ä½�å�Žé»˜è®¤ä¸‹é�¢é…�ç½®)
+	write_command(0xa0);	//0xa0ä¸ºSegmentæ­£å�‘,0xa1 ä¸ºSegmentå��å�‘
+							//(0xa0-0xa1ä¸ºADCæ–¹å�‘é€‰æ‹©)
+//	write_command(0xa1);
+//	write_command(0xc0);	//0xc0æ­£å�‘æ‰«æ��,0xc8å��å°„æ‰«æ��
+	write_command(0xc8);	//com0-com63-com1
+	// æ˜¾ç¤ºç®¡ç�†åˆ�å§‹(å¤�ä½�å�Žé»˜è®¤ä¸‹é�¢é…�ç½®)
+	write_command(0xa6);	//0xa6æ­£å�‘æ˜¾ç¤º,0xa7å��å�‘æ˜¾ç¤º
+	write_command(0xa4);	//0xa4æ­£å¸¸æ˜¾ç¤º,0xa5å…¨å±�ç‚¹äº®
+
+	// æŒ‡ç¤ºå™¨è®¾ç½®
+	write_command(0xac);	//Sleep mode set 0xac:Sleep mode, 0xad:Normal mode 
+	write_command(0x01);
+	//èƒŒåŽ‹æ¯”è®¾ç½®
+	write_command(0xf8);
+	write_command(0x00);
+	//Page address set
+//	write_command(0xb0);
+	//Column address set
+//	write_command(0x10);
+//	write_command(0x00);
+
+//	write_command(0xa5);	//0xa4æ­£å¸¸æ˜¾ç¤º,0xa5å…¨å±�ç‚¹äº®
+*/
+	write_command(0xa2);
+	write_command(0xa1);
+	write_command(0xc0);
+	
+	write_command(0x24);
+	write_command(0x81);
+	write_command(0x30);
+	
+	write_command(0x2f);
+	
+	write_command(0x60);
+	
+	write_command(0xa6);
+	write_command(0xa4);
+	
+	write_command(0xaf);
+	
+	fill_ram(0x00);
+}
+
+
+//========================================================================
+// å‡½æ•°: void Write_Dot_OLED(DOTBYTE x, DOTBYTE y, LCDBYTE i)
+// æ��è¿°: åœ¨LCDçš„çœŸå®žå��æ ‡ç³»ä¸Šçš„Xã€�Yç‚¹ç»˜åˆ¶å¡«å……è‰²ä¸ºiçš„ç‚¹
+// å�‚æ•°: x 		Xè½´å��æ ‡
+//		 y 		Yè½´å��æ ‡
+//		 i 		è¦�å¡«å……çš„ç‚¹çš„é¢œè‰² 
+// è¿”å›ž: æ— 
+//========================================================================
+static void write_dot_lcd(int x, int y, int i)
+{
+	int x_low, x_hight;						//å®šä¹‰åˆ—åœ°å�€çš„é«˜ä½Žä½�æŒ‡ä»¤
+	int dot_mask_buf = 0x01;
+	int y_page;								//ç”¨äºŽå­˜æ”¾è¦�ç”»ç‚¹çš„ä½�ç½®æ‰€åœ¨çš„byteæ•°æ�®ä½�ç½®
+	x = x + LCD_X_OFFSET;
+	x_low = (x & 0x0F);							//å®šä½�åˆ—åœ°å�€è®¾ç½®çš„ä½Žä½�æŒ‡ä»¤
+	x_hight = ((x >> 4) & 0x0F) + 0x10;		//å®šä½�åˆ—åœ°å�€è®¾ç½®çš„é«˜ä½�æŒ‡ä»¤
+	switch (y & 0x07){
+		case 0: dot_mask_buf = 0x01;break;
+		case 1: dot_mask_buf = 0x02;break;
+		case 2: dot_mask_buf = 0x04;break;
+		case 3: dot_mask_buf = 0x08;break;
+		case 4: dot_mask_buf = 0x10;break;
+		case 5: dot_mask_buf = 0x20;break;
+		case 6: dot_mask_buf = 0x40;break;
+		case 7: dot_mask_buf = 0x80;break;
+	}
+	y_page = (y >> 3) + 0xB0;			//Get the page of the byte
+	write_command(y_page);
+	write_command(x_low);
+	write_command(x_hight);
+	write_command(0xE0);
+	y_page = read_data();
+	if (i){
+		y_page |= dot_mask_buf;
+	}
+	else{
+		y_page &= ~dot_mask_buf;
+	}
+	write_data(y_page);
+	write_command(0xEE);
+}
+
+//========================================================================
+// å‡½æ•°: void line(unsigned char s_x,unsigned char s_y,unsigned char e_x,unsigned char e_y)
+// æ��è¿°: åœ¨s_xã€�s_yä¸ºèµ·å§‹å��æ ‡ï¼Œe_xã€�e_yä¸ºç»“æ�Ÿå��æ ‡ç»˜åˆ¶ä¸€æ�¡ç›´çº¿
+// å�‚æ•°: x  Xè½´å��æ ‡     y  Yè½´å��æ ‡
+// è¿”å›ž: æ— 
+// å¤‡æ³¨: ä½¿ç”¨å‰�æ™¯è‰²
+// ç‰ˆæœ¬:
+//      2006/10/15      First version
+//========================================================================
+static void line(int s_x, int s_y, int e_x, int e_y)
+{  
+	int offset_x, offset_y, offset_k = 0;
+	int Err_d = 1;
+
+	if(s_y > e_y){
+		offset_x = s_x;
+		s_x = e_x;
+		e_x = offset_x;
+		offset_x = s_y;
+		s_y = e_y;
+		e_y = offset_x;
+	} 
+	offset_x = e_x-s_x;
+	offset_y = e_y-s_y;
+	writ_dot(s_x, s_y, bmp_color);
+
+	if(offset_x < 0){
+		offset_x = s_x-e_x;
+		// Err_d = s_x;
+		// s_x = e_x;
+		// e_x = Err_d;
+		Err_d = -1;
+	}
+	if(offset_x == 0){
+		while(s_y < e_y){
+			s_y++;
+			if(s_y > Dis_Y_MAX) return;
+			writ_dot/*write_dot_lcd*/(s_x, s_y, bmp_color);
+		}
+		return;
+	}
+	else if(offset_y == 0){
+		while(s_x != e_x){
+			s_x += Err_d;
+			if(s_x > Dis_X_MAX) return;
+			writ_dot/*write_dot_lcd*/(s_x, s_y, bmp_color);
+		}
+		return;
+	}
+	if(offset_x > offset_y){
+		offset_k += offset_y;
+		while(s_x != e_x){
+			if(offset_k > 0){
+				s_y += 1;
+				offset_k += (offset_y-offset_x);
+			}
+			else offset_k += offset_y;
+			s_x += Err_d;
+			if(s_x>Dis_X_MAX||s_y>Dis_Y_MAX) break;
+			writ_dot/*write_dot_lcd*/(s_x, s_y, bmp_color);
+		}
+	}
+	else{
+		offset_k += offset_x;
+		while(s_y != e_y){
+			if(offset_k > 0){
+				s_x += Err_d;
+				offset_k += (offset_x - offset_y);
+			}
+			else offset_k += offset_x;
+			s_y += 1;
+			if(s_x>Dis_X_MAX||s_y>Dis_Y_MAX) break;
+			writ_dot/*write_dot_lcd*/(s_x, s_y, bmp_color);
+		}
+	}
+}
+
+//========================================================================
+// å‡½æ•°: void rectangle(DOTBYTE left, DOTBYTE top, DOTBYTE right, 
+//						DOTBYTE bottom, BYTE mode)
+// æ��è¿°: 
+// å�‚æ•°: left - çŸ©å½¢çš„å·¦ä¸Šè§’æ¨ªå��æ ‡ï¼ŒèŒƒå›´0åˆ°118
+//		 top - çŸ©å½¢çš„å·¦ä¸Šè§’çºµå��æ ‡ï¼ŒèŒƒå›´0åˆ°50
+//		 right - çŸ©å½¢çš„å�³ä¸‹è§’æ¨ªå��æ ‡ï¼ŒèŒƒå›´1åˆ°119
+//		 bottom - çŸ©å½¢çš„å�³ä¸‹è§’çºµå��æ ‡ï¼ŒèŒƒå›´1åˆ°51
+//		 mode - ç»˜åˆ¶æ¨¡å¼�ï¼Œå�¯ä»¥æ˜¯ä¸‹åˆ—æ•°å€¼ä¹‹ä¸€ï¼š
+//				0:	çŸ©å½¢æ¡†ï¼ˆç©ºå¿ƒçŸ©å½¢ï¼‰
+//				1:	çŸ©å½¢é�¢ï¼ˆå®žå¿ƒçŸ©å½¢ï¼‰
+// è¿”å›ž: æ— 
+// å¤‡æ³¨: ç”»åœ†å‡½æ•°æ‰§è¡Œè¾ƒæ…¢ï¼Œå¦‚æžœMCUæœ‰çœ‹é—¨ç‹—ï¼Œè¯·ä½œå¥½æ¸…ç‹—çš„æ“�ä½œ
+// ç‰ˆæœ¬:
+//      2005/05/21      First version
+//========================================================================
+static void rectangle(int left, int top, int right, int bottom, int mode)
+{
+	int uitemp;
+	
+	if(mode == 0){
+		line(left, top, left, bottom);
+		line(left, top, right, top);
+		line(right, bottom, left, bottom);
+		line(right, bottom, right, top);
+	}
+	else{
+//		pos_switch(&left,&top);						// å��æ ‡å�˜æ�¢
+//		pos_switch(&right,&bottom);					//å��æ ‡å�˜æ�¢
+		if(left > right){
+			uitemp = left;
+			left = right;
+			right = uitemp;
+		}
+		if(top > bottom){
+			uitemp = top;
+			top = bottom;
+			bottom = uitemp;
+		}
+		for(uitemp=top; uitemp<=bottom; uitemp++){
+			line(left, uitemp, right, uitemp);
+		}
+	}
+}
+
+//========================================================================
+// å‡½æ•°: void w_red_dot(unsigned char x,unsigned char y,char a,char b,unsigned char mode)
+// æ��è¿°: ç»˜åˆ¶åœ†çš„å�„ä¸ªåƒ�é™�ä¸­çš„ç‚¹å’Œçº¿
+// å�‚æ•°: 
+// è¿”å›ž: æ— 
+// å¤‡æ³¨: è¯¥å‡½æ•°å¯¹ç”¨æˆ·ä¸�å�¯è§�ï¼Œä½¿ç”¨å‰�æ™¯è‰²
+// ç‰ˆæœ¬:
+//      2006/10/15      First version
+//========================================================================
+static void w_red_dot(int x, int y, int a, int b, int mode)
+{
+	if(mode > 0){
+		line(x+a, y+b, x-a, y+b);
+		line(x+a, y-b, x-a, y-b);
+	}
+	else{
+		writ_dot(x+a, y+b, bmp_color);
+		writ_dot(x-a, y+b, bmp_color);
+		writ_dot(x+a, y-b, bmp_color);
+		writ_dot(x-a, y-b, bmp_color);
+	}
+}
+//========================================================================
+// å‡½æ•°: void w_red_err(int *a,int *b,int *r)
+// æ��è¿°: ç”»åœ†è¯¯å·®è®¡ç®—
+// å�‚æ•°: 
+// è¿”å›ž: æ— 
+// å¤‡æ³¨: è¯¥å‡½æ•°å¯¹ç”¨æˆ·ä¸�å�¯è§�
+// ç‰ˆæœ¬:
+//      2006/10/16      First version
+//========================================================================
+static void w_red_err(int *a, int *b, int *r)
+{
+	int r_error;
+	int uitemp;
+	
+	r_error = (*a+1) * (*a+1);
+	uitemp = (*b) * (*b);
+	r_error += uitemp;
+	uitemp = (*r) * (*r);
+	r_error -= uitemp;
+	if(r_error >= 0){
+		r_error = r_error - *b;
+		if(r_error>=0) *b = *b - 1;
+	}
+	*a = *a + 1;
+}
+//========================================================================
+// å‡½æ•°: void circle(unsigned char x,unsigned char y,unsigned char r,unsigned char mode)
+// æ��è¿°: ä»¥x,yä¸ºåœ†å¿ƒRä¸ºå�Šå¾„ç”»ä¸€ä¸ªåœ†(mode = 0) or åœ†é�¢(mode = 1)
+// å�‚æ•°: 
+// è¿”å›ž: æ— 
+// å¤‡æ³¨: ç”»åœ†å‡½æ•°æ‰§è¡Œè¾ƒæ…¢ï¼Œå¦‚æžœMCUæœ‰çœ‹é—¨ç‹—ï¼Œè¯·ä½œå¥½æ¸…ç‹—çš„æ“�ä½œ
+// ç‰ˆæœ¬:
+//      2006/10/16      First version
+//========================================================================
+static void circle(int x, int y, int r, int mode)
+{
+	int arx1 = 0, ary1, arx2, ary2 = 0;
+//	pos_switch(&x,&y);						//å��æ ‡å�˜æ�¢
+//	x += 4;
+	ary1 = r;
+	arx2 = r;
+	while(1){
+		w_red_dot(x, y, arx1, ary1, mode);
+		w_red_err(&arx1,&ary1,&r);
+		if(arx1 == arx2){
+			w_red_dot(x, y, arx1, ary1, mode);
+			break;
+		}
+		w_red_dot(x, y, arx2, ary2, mode);
+		w_red_err(&ary2, &arx2, &r);
+		if(arx1 == arx2) {
+			w_red_dot(x, y, arx2, ary2, mode);
+			break;
+		}
+	}
+}
+
+//========================================================================
+// å‡½æ•°: void FontSet(unsigned char Font_NUM, unsigned char color)
+// æ��è¿°: æ–‡æœ¬å­—ä½“è®¾ç½®
+// å�‚æ•°: Font_NUM å­—ä½“é€‰æ‹©,ä»¥é©±åŠ¨æ‰€å¸¦çš„å­—åº“ä¸ºå‡†
+//		 color  æ–‡æœ¬é¢œè‰²,ä»…ä½œç”¨äºŽè‡ªå¸¦å­—åº“  
+// è¿”å›ž: æ— 
+// å¤‡æ³¨: 
+// ç‰ˆæœ¬:
+//========================================================================
+static void font_set(unsigned char font_num, unsigned char color)
+{
+	switch(font_num){
+		case 0: font_wrod = 16;	//ASIIå­—ç¬¦A
+				x_witch = 8;
+				y_witch = 16;
+				char_color = color;
+				font_type = 1;
+				char_tab = asii0816;
+		break;
+		case 1: font_wrod = 10;	//ASIIå­—ç¬¦B
+				x_witch = 6;
+				y_witch = 10;
+				char_color = color;
+				font_type = 1;
+				char_tab = asii0610;
+		break;		
+/*		case 2: font_wrod = 48;	//æ±‰å­—A
+				x_witch = 17;
+				y_witch = 16;
+				char_color = color;
+				font_type = 0;
+				char_tab = GB1716;
+		break;*/
+/*		case 3: font_wrod = 16;	//æ±‰å­—B
+				x_witch = 16;
+				y_witch = 2;
+				char_color = color;
+				font_type = 0;
+				char_tab = GB16;
+		break;*/
+		default: break;
+	}
+}
+//========================================================================
+// å‡½æ•°: void font_mode(BYTE Mode,LCDBYTE FontBackcolor) 
+// æ��è¿°: è®¾ç½®å­—ç¬¦æ˜¾ç¤ºçš„æ¨¡å¼�,å¹¶è®¾ç½®èƒŒæ™¯è‰²
+// å�‚æ•°: Mode	0: å­—ç¬¦æ˜¾ç¤ºæ—¶ä»…å¯¹å­—ç¬¦çš„æœ‰æ•ˆç‚¹è¿›è¡Œæ˜¾ç¤ºæ“�ä½œ,ä¹Ÿå°±æ˜¯ä¸�ä½œèƒŒæ™¯è¦†ç›–
+//					ä¸ºå� åŠ æ¨¡å¼�
+//				1: è¦†ç›–æ¨¡å¼�
+//		FontBackcolor	è®¾ç½®è¦†ç›–æ¨¡å¼�æ—¶,å­—ç¬¦çš„èƒŒæ™¯è‰² 
+// è¿”å›ž: æ— 
+// å¤‡æ³¨: ä»…å¯¹å­—ç¬¦æ˜¾ç¤ºæœ‰æ•ˆ
+// ç‰ˆæœ¬:
+//========================================================================
+static void font_mode(unsigned char mode, unsigned char font_back_color)
+{
+	font_cover = mode;
+	char_backcolor = font_back_color;
+}
+//========================================================================
+// å‡½æ•°: void put_char(unsigned char x,unsigned char y,char a)  
+// æ��è¿°: å†™å…¥ä¸€ä¸ªæ ‡å‡†å­—ç¬¦
+// å�‚æ•°: x  Xè½´å��æ ‡     y  Yè½´å��æ ‡
+//		 a  è¦�æ˜¾ç¤ºçš„å­—ç¬¦åœ¨å­—åº“ä¸­çš„å��ç§»é‡�  
+// è¿”å›ž: æ— 
+// å¤‡æ³¨: ASCIIå­—ç¬¦å�¯ç›´æŽ¥è¾“å…¥ASCIIç �å�³å�¯
+// ç‰ˆæœ¬:
+//========================================================================
+static void put_char(int x, int y, int a)
+{
+	int i,j;		//æ•°æ�®æš‚å­˜
+	unsigned char *p_data;
+	unsigned char temp = 0;
+	unsigned char index = 0;
+	
+	if(font_type == 1)
+		p_data = char_tab + (a-32)*font_wrod;
+	else
+		p_data = char_tab + a*font_wrod;	//è¦�å†™å­—ç¬¦çš„é¦–åœ°å�€
+	j = 0;
+	while((j++) < y_witch){
+		if(y > Dis_Y_MAX) break;
+		i = 0;
+		while(i < x_witch){
+			if((i&0x07) == 0){
+//				temp = *(p_data + (index>>1));
+//				if((index&0x01)==0)temp = temp>>8; 
+				temp = *(p_data+index);
+				index++;
+			}
+			if((temp & 0x80) > 0) writ_dot(x+i,y,char_color);//write_dot_lcd
+			else if(font_cover) writ_dot(x+i,y,char_backcolor);//*write_dot_lcd
+			temp = temp << 1;
+			if((x+i) >= Dis_X_MAX){
+				index += (x_witch-i) >> 3;
+				break;
+			}
+			i++;
+		}
+		y ++;
+	}
+}
+
+//========================================================================
+// å‡½æ•°: void PutString(unsigned char x,unsigned char y, unsigned char *p)
+// æ��è¿°: åœ¨xã€�yä¸ºèµ·å§‹å��æ ‡å¤„å†™å…¥ä¸€ä¸²æ ‡å‡†å­—ç¬¦
+// å�‚æ•°: x  Xè½´å��æ ‡     y  Yè½´å��æ ‡
+//		 p  è¦�æ˜¾ç¤ºçš„å­—ç¬¦ä¸²  
+// è¿”å›ž: æ— 
+// å¤‡æ³¨: ä»…èƒ½ç”¨äºŽè‡ªå¸¦çš„ASCIIå­—ç¬¦ä¸²æ˜¾ç¤º
+// ç‰ˆæœ¬:
+//========================================================================
+static void put_string(unsigned char x, unsigned char y, const unsigned char *p)
+{
+	while(*p != 0){
+		put_char(x, y, *p);
+		x += x_witch;
+		if((x + x_witch) > Dis_X_MAX){
+			x = 0;
+			if((Dis_Y_MAX - y) < y_witch) break;
+			else y += y_witch;
+		}
+		p++;
+	}
+}
+
+
+/******************************************************************************/
+static ssize_t st7565r_lcd_read( struct file * file, char __user * buf, 
+				                 size_t count, loff_t *ppos )
+{
+	const char __user *p = buf;
+	char c;
+	int i;
+
+#ifdef DEBUG
+	printk(KERN_DEBUG "LCD: read\n");
+#endif
+	//access_ok()å‡½æ•° æ£€æŸ¥ç”¨æˆ·ç©ºé—´æŒ‡é’ˆæ˜¯å�¦å�¯ç”¨
+	//buf  :   ç”¨æˆ·ç©ºé—´çš„æŒ‡é’ˆå�˜é‡�ï¼Œå…¶æŒ‡å�‘ä¸€ä¸ªè¦�æ£€æŸ¥çš„å†…å­˜å�—å¼€å§‹å¤„ã€‚
+	//count   :   è¦�æ£€æŸ¥å†…å­˜å�—çš„å¤§å°�ã€‚
+	//æ­¤å‡½æ•°æ£€æŸ¥ç”¨æˆ·ç©ºé—´ä¸­çš„å†…å­˜å�—æ˜¯å�¦å�¯ç”¨ã€‚å¦‚æžœå�¯ç”¨ï¼Œåˆ™è¿”å›žçœŸ(é�ž0å€¼)ï¼Œå�¦åˆ™è¿”å›žå�‡(0)ã€‚
+	if (!access_ok(VERIFY_READ, buf, count))
+		return -EFAULT;
+
+	mutex_lock(&st7565r_lcd_mutex);
+	for ( i = *ppos; count > 0; ++i, ++p, --count ){
+		c = read_data();
+		__put_user(c, p);
+	}
+	mutex_unlock(&st7565r_lcd_mutex);
+	*ppos = i;
+	return p - buf;
+}
+
+static ssize_t st7565r_lcd_write( struct file * file, const char __user * buf, 
+				                  size_t count, loff_t *ppos )
+{
+	const char __user *p = buf;
+	char c;
+	int i;
+
+#ifdef DEBUG
+	printk(KERN_DEBUG "LCD: write\n");
+#endif
+	//access_ok()å‡½æ•° æ£€æŸ¥ç”¨æˆ·ç©ºé—´æŒ‡é’ˆæ˜¯å�¦å�¯ç”¨
+	//buf  :   ç”¨æˆ·ç©ºé—´çš„æŒ‡é’ˆå�˜é‡�ï¼Œå…¶æŒ‡å�‘ä¸€ä¸ªè¦�æ£€æŸ¥çš„å†…å­˜å�—å¼€å§‹å¤„ã€‚
+	//count   :   è¦�æ£€æŸ¥å†…å­˜å�—çš„å¤§å°�ã€‚
+	//æ­¤å‡½æ•°æ£€æŸ¥ç”¨æˆ·ç©ºé—´ä¸­çš„å†…å­˜å�—æ˜¯å�¦å�¯ç”¨ã€‚å¦‚æžœå�¯ç”¨ï¼Œåˆ™è¿”å›žçœŸ(é�ž0å€¼)ï¼Œå�¦åˆ™è¿”å›žå�‡(0)ã€‚
+	if (!access_ok(VERIFY_READ, buf, count))
+		return -EFAULT;
+
+	mutex_lock(&st7565r_lcd_mutex);
+	for ( i = *ppos; count > 0; ++i, ++p, --count ){
+		__get_user(c, p);
+		write_data(c);
+	}
+	mutex_unlock(&st7565r_lcd_mutex);
+	*ppos = i;
+	return p - buf;
+}
+
+static long st7565r_lcd_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+	long ret = 0;
+#ifdef DEBUG
+	printk(KERN_DEBUG "LCD: ioctl(%d,%d)\n",cmd,arg);
+#endif
+	mutex_lock(&st7565r_lcd_mutex);
+//	if (_IOC_TYPE(cmd) != LSLCD_IOC_MAGIC) return -EINVAL;
+//	if (_IOC_NR(cmd) > LSLCD_IOC_MAXNR) return -EINVAL;
+	switch (cmd){
+		case ST7565RLCD_CLEAR:
+			fill_ram(arg);
+		break;
+		case ST7565RLCD_SENDCTRL:
+			if (!capable(CAP_SYS_ADMIN))
+				ret = -EACCES;
+			else
+				write_command(arg);
+			break;
+		case ST7565RLCD_REST:
+			if (!capable(CAP_SYS_ADMIN))
+				ret = -EACCES;
+			else
+				st7565r_rest();
+			break;
+		case ST7565RLCD_WRITE_DOT:
+			{
+			int dot_info[3];
+			__copy_from_user(dot_info, (int __user *)arg, sizeof(dot_info));
+			write_dot_lcd(dot_info[0], dot_info[1], dot_info[2]);
+			}
+			break;
+		case ST7565RLCD_LINE:
+			{
+			int line_info[4];
+			__copy_from_user(line_info, (int __user *)arg, sizeof(line_info));
+			line(line_info[0], line_info[1], line_info[2], line_info[3]);
+			}
+		break;
+		case ST7565RLCD_RECTANGLE:
+			{
+			int rectangle_info[5];
+			__copy_from_user(rectangle_info, (int __user *)arg, sizeof(rectangle_info));
+			rectangle(rectangle_info[0], rectangle_info[1], rectangle_info[2], rectangle_info[3], rectangle_info[4]);
+			}
+		break;
+		case ST7565RLCD_CIRCLE:
+			{
+			int circle_info[4];
+			__copy_from_user(circle_info, (int __user *)arg, sizeof(circle_info));
+			circle(circle_info[0], circle_info[1], circle_info[2], circle_info[3]);
+			}
+		break;
+		case SET_PRINT_MODE:
+			bmp_color = arg;
+		break;
+		default:
+			ret = -EINVAL;
+	}
+	mutex_unlock(&st7565r_lcd_mutex);
+	return ret;
+}
+
+static int st7565r_lcd_open( struct inode * inode, struct file * file )
+{
+	return 0;
+}
+
+const struct file_operations st7565r_lcd_fops = {
+	.owner			= THIS_MODULE,
+	.write			= st7565r_lcd_write,
+	.read			= st7565r_lcd_read,
+	.unlocked_ioctl	= st7565r_lcd_ioctl,
+	.open			= st7565r_lcd_open,
+	.llseek			= default_llseek,
+};
+
+static struct miscdevice st7565r_lcd_dev = {
+	.minor	= ST7565R_LCD_MINOR,
+	.name	= "st7565r_lcd",
+	.fops	= &st7565r_lcd_fops
+};
+
+const unsigned char st7565r_lcd_logo[] =	"*********************"  /* Line #1 */
+											"*                   *"  /* Line #1 */
+											"*     Welcome to    *"  /* Line #3 */
+											"*                   *"  /* Line #1 */
+				              				"*       LINUX!      *"  /* Line #2 */
+				              				"*********************"; /* Line #4 */
+
+static int __init st7565r_lcd_init(void)
+{
+	int retval;
+	
+	retval = misc_register(&st7565r_lcd_dev);
+	if(retval < 0){
+		printk(KERN_INFO "LCD: misc_register failed\n");
+		return retval;
+	}
+#ifdef DEBUG
+	printk(KERN_DEBUG "LCD: init\n");
+#endif
+	
+	mutex_lock(&st7565r_lcd_mutex);
+	
+	st7565r_init();
+	/*
+	write_dot_lcd(0, 0, 1);
+	write_dot_lcd(127, 0, 1);
+	write_dot_lcd(0, 63, 1);
+	write_dot_lcd(127, 63, 1);
+	write_dot_lcd(0, 1, 1);
+	write_dot_lcd(0, 2, 1);
+	write_dot_lcd(0, 3, 1);
+	write_dot_lcd(0, 4, 1);
+	
+	write_dot_lcd(2, 7, 1);
+	write_dot_lcd(3, 7, 1);
+	write_dot_lcd(4, 7, 1);
+	write_dot_lcd(5, 7, 1);
+	
+	line(4,4,50,60);
+	line(4,4,100,4);
+	line(4,4,4,60);
+	line(0,0,120,60);
+	rectangle(12,12,42,42,1);
+	rectangle(12,12,62,62,0);
+	mdelay(8000);
+	
+	circle(10,10,10,1);
+	circle(118,54,10,0);
+	circle(800,30,16,0);
+	mdelay(8000);
+	
+//	mdelay(5000);
+*/
+	font_set(1,1);
+	put_string(0, 0, st7565r_lcd_logo);//åœ¨æŒ‡å®šä½�ç½®æ˜¾ç¤ºå­—ç¬¦ä¸²
+	
+	mutex_unlock(&st7565r_lcd_mutex);
+	printk(KERN_EMERG "st7565r_lcd\n");
+	return 0;
+}
+
+static void __exit st7565r_lcd_exit(void)
+{
+	misc_deregister(&st7565r_lcd_dev);
+}
+
+module_init(st7565r_lcd_init);
+module_exit(st7565r_lcd_exit);
+
+MODULE_DESCRIPTION("ST7565R Driver");
+MODULE_AUTHOR("loongson THF");
+MODULE_LICENSE("GPL");
diff -uNra linux-3.0.82/drivers/misc/st7565r.h linux-3.0.82x/drivers/misc/st7565r.h
--- linux-3.0.82/drivers/misc/st7565r.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/misc/st7565r.h	2017-09-23 03:42:49.646676200 +0800
@@ -0,0 +1,734 @@
+#ifndef _ST7565R_H
+#define _ST7565R_H
+
+#define ST7565R_LCD_MINOR			156
+
+#define ST7565RLCD_CLEAR			0x01			//ÇåÆÁ£¿
+#define ST7565RLCD_SENDCTRL			0x02		//·¢ËÍCtrl
+#define ST7565RLCD_SETSHORTDELAY	0x03	//SET¶ÌÔÝµÄÑÓ³Ù
+#define ST7565RLCD_SETLONGDELAY		0x04		//SET³¤ÑÓ³Ù
+#define ST7565RLCD_REST				0x05
+#define ST7565RLCD_WRITE_DOT		0x06
+#define ST7565RLCD_LINE				0x07
+#define ST7565RLCD_RECTANGLE		0x08
+#define ST7565RLCD_CIRCLE			0x09
+#define SET_PRINT_MODE				0x0a
+#define PUT_CHAR					0x0b
+
+#define LSLCD_IOC_MAGIC	'k'
+
+#define LSLCD_SENDCTRL	_IOW(LSLCD_IOC_MAGIC, 0, int)
+#define LSLCD_REST		_IOW(LSLCD_IOC_MAGIC, 5, int)
+
+#define LSLCD_IOC_MAXNR	6
+
+
+#define LCD_X_MAX			131				//ÆÁÄ»µÄXÖáµÄÎïÀí¿í¶È
+#define LCD_Y_MAX			63				//ÆÁÄ»µÄYÖáµÄÎïÀí¿í¶È
+#define LCD_X_OFFSET		4
+
+#define LCD_XY_Switch	0				//ÏÔÊ¾Ê±XÖáºÍYÓÉ½»»»
+#define LCD_X_Rev			0				//ÏÔÊ¾Ê±XÖá·´×ª
+#define LCD_Y_Rev			0				//ÏÔÊ¾Ê±YÖá·´×ª
+
+#if LCD_XY_Switch == 0
+	#define Dis_X_MAX		LCD_X_MAX
+	#define Dis_Y_MAX		LCD_Y_MAX	
+#endif
+
+#if LCD_XY_Switch == 1
+	#define Dis_X_MAX		LCD_Y_MAX
+	#define Dis_Y_MAX		LCD_X_MAX	
+#endif
+
+#define LCD_INITIAL_COLOR	0x00			//¶¨ÒåLCDÆÁ³õÊ¼»¯Ê±µÄ±³¾°É«
+#define LCD_DIS_CIRCLE		0				//¶¨ÒåÊÇ·ñÐèÒª»æÖÆÔ²ÐÎµÄ¹¦ÄÜ
+
+//========================================================================
+// º¯Êý: void pos_switch(unsigned int * x,unsigned int * y)
+// ÃèÊö: ½«»­ÃæµÄ×ø±ê±ä»»ÎªÊµ¼ÊLCDµÄ×ø±êÌåÏµ£¬ÒÔ±ãÓÚ¿ìËÙ»­Ô²ÐÎÒÔ¼°¾ØÐÎ
+// ²ÎÊý: x  XÖá×ø±ê     y  YÖá×ø±ê      
+// ·µ»Ø: ÎÞ 
+// ±¸×¢: ÕâÀïÒÔ¼°Ö®Ç°µÄËùÓÐxºÍy×ø±êÏµ¶¼ÊÇÓÃ»§²ãµÄ£¬²¢²»ÊÇÊµ¼ÊLCDµÄ×ø±êÌåÏµ
+//		 ±¾º¯ÊýÌá¹©¿É½øÐÐ×ø±ê±ä»»µÄ½Ó¿Ú
+// °æ±¾:
+//      2006/10/15      First version
+//========================================================================
+//========================================================================
+// º¯Êý: void writ_dot(int x,int y,unsigned int Color)
+// ÃèÊö: Ìî³äÒÔx,yÎª×ø±êµÄÏóËØ
+// ²ÎÊý: x  XÖá×ø±ê     y  YÖá×ø±ê      Color  ÏñËØÑÕÉ« 
+// ·µ»Ø: ÎÞ
+// ±¸×¢: ÕâÀïÒÔ¼°Ö®Ç°µÄËùÓÐxºÍy×ø±êÏµ¶¼ÊÇÓÃ»§²ãµÄ£¬²¢²»ÊÇÊµ¼ÊLCDµÄ×ø±êÌåÏµ
+//		 ±¾º¯ÊýÌá¹©¿É½øÐÐ×ø±ê±ä»»µÄ½Ó¿Ú
+// °æ±¾:
+//      2006/10/15      First version
+//========================================================================
+//========================================================================
+// º¯Êý: unsigned int get_dot(int x,int y)
+// ÃèÊö: »ñÈ¡x,yÎª×ø±êµÄÏóËØ
+// ²ÎÊý: x  XÖá×ø±ê     y  YÖá×ø±ê      
+// ·µ»Ø: Color  ÏñËØÑÕÉ« 
+// ±¸×¢: ÕâÀïÒÔ¼°Ö®Ç°µÄËùÓÐxºÍy×ø±êÏµ¶¼ÊÇÓÃ»§²ãµÄ£¬²¢²»ÊÇÊµ¼ÊLCDµÄ×ø±êÌåÏµ
+//		 ±¾º¯ÊýÌá¹©¿É½øÐÐ×ø±ê±ä»»µÄ½Ó¿Ú
+// °æ±¾:
+//      2006/10/15      First version
+//========================================================================
+//========================================================================
+// º¯Êý: void set_dot_addr(int x,int y)
+// ÃèÊö: ÉèÖÃµ±Ç°ÐèÒª²Ù×÷µÄÏóËØµØÖ·
+// ²ÎÊý: x  XÖá×ø±ê     y  YÖá×ø±ê      
+// ·µ»Ø: ÎÞ 
+// ±¸×¢: ÕâÀïÒÔ¼°Ö®Ç°µÄËùÓÐxºÍy×ø±êÏµ¶¼ÊÇÓÃ»§²ãµÄ£¬²¢²»ÊÇÊµ¼ÊLCDµÄ×ø±êÌåÏµ
+//		 ±¾º¯ÊýÌá¹©¿É½øÐÐ×ø±ê±ä»»µÄ½Ó¿Ú
+// °æ±¾:
+//      2006/10/15      First version
+//========================================================================
+#if LCD_XY_Switch==0&&LCD_X_Rev==0&&LCD_Y_Rev==0
+	#define pos_switch(x,y)	
+	#define writ_dot(x,y,c)			write_dot_lcd(x,y,c)
+	#define get_dot(x,y)			get_dot_lcd(x,y)
+	#define set_dot_addr(x,y)		set_dot_addr_lcd(x,y)	
+#endif
+#if LCD_XY_Switch==0&&LCD_X_Rev==1&&LCD_Y_Rev==0
+	#define pos_switch(x,y)			x = Dis_X_MAX-x
+	#define writ_dot(x,y,c)			write_dot_lcd(Dis_X_MAX-x,y,c)
+	#define get_dot(x,y)			get_dot_lcd(Dis_X_MAX-x,y)
+	#define set_dot_addr(x,y)		set_dot_addr_lcd(Dis_X_MAX-x,y)		
+#endif
+#if LCD_XY_Switch==0&&LCD_X_Rev==0&&LCD_Y_Rev==1
+	#define pos_switch(x,y)			y = Dis_Y_MAX-y	
+	#define writ_dot(x,y,c)			write_dot_lcd(x,Dis_Y_MAX-y,c)
+	#define get_dot(x,y)			get_dot_lcd(x,Dis_Y_MAX-y)
+	#define set_dot_addr(x,y)		set_dot_addr_lcd(x,Dis_Y_MAX-y)		
+#endif
+#if LCD_XY_Switch==0&&LCD_X_Rev==1&&LCD_Y_Rev==1
+	#define pos_switch(x,y)			x = Dis_X_MAX-x;\
+									y = Dos_Y_MAX-y	
+	#define writ_dot(x,y,c)			write_dot_lcd(Dis_X_MAX-x,Dis_Y_MAX-y,c)
+	#define get_dot(x,y)			get_dot_lcd(Dis_X_MAX-x,Dis_Y_MAX-y)
+	#define set_dot_addr(x,y)		set_dot_addr_lcd(Dis_X_MAX-x,Dis_Y_MAX-y)	
+#endif
+
+#if LCD_XY_Switch==1&&LCD_X_Rev==0&&LCD_Y_Rev==0
+	#define pos_switch(x,y)			x = x+y;\
+									y = x-y;\
+									x = x-y;
+	#define writ_dot(x,y,c)			write_dot_lcd(y,x,c)
+	#define get_dot(x,y)			get_dot_lcd(y,x)
+	#define set_dot_addr(x,y)		set_dot_addr_lcd(y,x)		
+#endif
+#if LCD_XY_Switch==1&&LCD_X_Rev==1&&LCD_Y_Rev==0
+	#define pos_switch(x,y)			x = Dis_X_MAX-x;\
+									x = x+y;\
+									y = x-y;\
+									x = x-y;
+	#define writ_dot(x,y,c)			write_dot_lcd(y,Dis_X_MAX-x,c)
+	#define get_dot(x,y)			get_dot_lcd(y,Dis_X_MAX-x)
+	#define set_dot_addr(x,y)		set_dot_addr_lcd(y,Dis_X_MAX-x)		
+#endif
+#if LCD_XY_Switch==1&&LCD_X_Rev==0&&LCD_Y_Rev==1
+	#define pos_switch(x,y)			y = Dis_Y_MAX-y;\
+									x = x+y;\
+									y = x-y;\
+									x = x-y;
+	#define writ_dot(x,y,c)			write_dot_lcd(Dis_Y_MAX-y,x,c)
+	#define get_dot(x,y)			get_dot_lcd(Dis_Y_MAX-y,x)
+	#define set_dot_addr(x,y)		set_dot_addr_lcd(Dis_Y_MAX-y,x)		
+#endif
+#if LCD_XY_Switch==1&&LCD_X_Rev==1&&LCD_Y_Rev==1
+	#define pos_switch(x,y)			x = Dis_X_MAX-x;\
+									y = Dis_Y_MAX-y;\
+									x = x+y;\
+									y = x-y;\
+									x = x-y;
+	#define writ_dot(x,y,c)			write_dot_lcd(Dis_Y_MAX-y,Dis_X_MAX-x,c)
+	#define get_dot(x,y)			get_dot_lcd(Dis_Y_MAX-y,Dis_X_MAX-x)
+	#define set_dot_addr(x,y)		set_dot_addr_lcd(Dis_Y_MAX-y,Dis_X_MAX-x)		
+#endif
+//
+#define match_xy(s,e)	if(s>e){s = s+e;e = s-e;s = s-e;}
+
+
+
+unsigned char asii0610[] = 
+{
+//--  MS Gothic8;  ´Ë×ÖÌåÏÂ¶ÔÓ¦µÄµãÕóÎª£º¿íx¸ß=6x10   --
+//--  ¿í¶È²»ÊÇ8µÄ±¶Êý£¬ÏÖµ÷ÕûÎª£º¿í¶Èx¸ß¶È=8x10  --
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,//1
+0x00,0x40,0x40,0x40,0x40,0x40,0x00,0x60,0x00,0x00,//2
+0xA0,0xA0,0xA0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,//3
+0x00,0x28,0x28,0xFC,0x50,0xFC,0x50,0x50,0x00,0x00,//4
+0x20,0x70,0xA8,0xA0,0x70,0x28,0xA8,0x70,0x20,0x00,//5
+0x00,0xC8,0xD0,0xD0,0x20,0x58,0x58,0x98,0x00,0x00,//6
+0x00,0x20,0x50,0x20,0x60,0x98,0x90,0x68,0x00,0x00,//7
+0x40,0x40,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,//8
+0x10,0x20,0x40,0x40,0x40,0x40,0x40,0x20,0x10,0x00,//9
+0x80,0x40,0x20,0x20,0x20,0x20,0x20,0x40,0x80,0x00,//10
+0x00,0x20,0xA8,0x70,0x70,0xA8,0x20,0x00,0x00,0x00,
+0x00,0x00,0x20,0x20,0x70,0x20,0x20,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0xC0,0x40,0x80,0x00,
+0x00,0x00,0x00,0x00,0xF0,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xC0,0x00,0x00,
+0x10,0x10,0x20,0x20,0x40,0x40,0x80,0x80,0x00,0x00,
+0x00,0x60,0x90,0x90,0x90,0x90,0x90,0x60,0x00,0x00,
+0x00,0x20,0x60,0x20,0x20,0x20,0x20,0x20,0x00,0x00,
+0x00,0x60,0x90,0x10,0x20,0x40,0x80,0xF0,0x00,0x00,
+0x00,0x60,0x90,0x10,0x60,0x10,0x90,0x60,0x00,0x00,
+0x00,0x30,0x30,0x50,0x50,0x90,0xF8,0x10,0x00,0x00,
+0x00,0xF0,0x80,0xE0,0x10,0x10,0x90,0x60,0x00,0x00,
+0x00,0x60,0x90,0x80,0xE0,0x90,0x90,0x60,0x00,0x00,
+0x00,0xF0,0x10,0x20,0x20,0x40,0x40,0x40,0x00,0x00,
+0x00,0x60,0x90,0x90,0x60,0x90,0x90,0x60,0x00,0x00,
+0x00,0x60,0x90,0x90,0x70,0x10,0x90,0x60,0x00,0x00,
+0x00,0x00,0x60,0x00,0x00,0x00,0x00,0x60,0x00,0x00,
+0x00,0x00,0x60,0x00,0x00,0x00,0x60,0x20,0x40,0x00,
+0x00,0x10,0x20,0x40,0x80,0x40,0x20,0x10,0x00,0x00,
+0x00,0x00,0x00,0xF0,0x00,0xF0,0x00,0x00,0x00,0x00,
+0x00,0x80,0x40,0x20,0x10,0x20,0x40,0x80,0x00,0x00,
+0x00,0x60,0x90,0x10,0x20,0x20,0x00,0x20,0x20,0x00,
+0x00,0x70,0x88,0xB8,0xA8,0xB8,0x80,0x70,0x00,0x00,
+0x00,0x60,0x60,0x90,0x90,0xF0,0x90,0x90,0x00,0x00,
+0x00,0xE0,0x90,0x90,0xE0,0x90,0x90,0xE0,0x00,0x00,
+0x00,0x60,0x90,0x80,0x80,0x80,0x90,0x60,0x00,0x00,
+0x00,0xE0,0x90,0x90,0x90,0x90,0x90,0xE0,0x00,0x00,
+0x00,0xF0,0x80,0x80,0xE0,0x80,0x80,0xF0,0x00,0x00,
+0x00,0xF0,0x80,0x80,0xE0,0x80,0x80,0x80,0x00,0x00,
+0x00,0x60,0x90,0x80,0xB0,0x90,0x90,0x70,0x00,0x00,
+0x00,0x90,0x90,0x90,0xF0,0x90,0x90,0x90,0x00,0x00,
+0x00,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x00,0x00,
+0x00,0x10,0x10,0x10,0x10,0x10,0x90,0x60,0x00,0x00,
+0x00,0x90,0x90,0xA0,0xC0,0xA0,0x90,0x90,0x00,0x00,
+0x00,0x80,0x80,0x80,0x80,0x80,0x80,0xF0,0x00,0x00,
+0x00,0x88,0x88,0xD8,0xD8,0xA8,0xA8,0xA8,0x00,0x00,
+0x00,0x90,0x90,0xD0,0xD0,0xB0,0xB0,0x90,0x00,0x00,
+0x00,0x60,0x90,0x90,0x90,0x90,0x90,0x60,0x00,0x00,
+0x00,0xE0,0x90,0x90,0x90,0xE0,0x80,0x80,0x00,0x00,
+0x00,0x60,0x90,0x90,0x90,0xD0,0xA0,0x50,0x00,0x00,
+0x00,0xE0,0x90,0x90,0xE0,0x90,0x90,0x90,0x00,0x00,
+0x00,0x60,0x90,0x80,0x60,0x10,0x90,0x60,0x00,0x00,
+0x00,0xF0,0x40,0x40,0x40,0x40,0x40,0x40,0x00,0x00,
+0x00,0x90,0x90,0x90,0x90,0x90,0x90,0x60,0x00,0x00,
+0x00,0x88,0x88,0x88,0x50,0x50,0x20,0x20,0x00,0x00,
+0x00,0xA8,0xA8,0xA8,0xA8,0x50,0x50,0x50,0x00,0x00,
+0x00,0x90,0x90,0x60,0x60,0x60,0x90,0x90,0x00,0x00,
+0x00,0x88,0x88,0x50,0x20,0x20,0x20,0x20,0x00,0x00,
+0x00,0xF0,0x10,0x20,0x20,0x40,0x80,0xF0,0x00,0x00,
+0x30,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x30,0x00,
+0x00,0x88,0x50,0x20,0xF0,0x20,0xF0,0x20,0x00,0x00,
+0xC0,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0xC0,0x00,
+0x40,0xA0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xF8,0x00,
+0x80,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0xE0,0x10,0x70,0x90,0x70,0x00,0x00,
+0x00,0x80,0x80,0xE0,0x90,0x90,0x90,0xE0,0x00,0x00,
+0x00,0x00,0x00,0x60,0x90,0x80,0x90,0x60,0x00,0x00,
+0x00,0x10,0x10,0x70,0x90,0x90,0x90,0x70,0x00,0x00,
+0x00,0x00,0x00,0x60,0x90,0xF0,0x80,0x70,0x00,0x00,
+0x00,0x60,0x40,0xF0,0x40,0x40,0x40,0x40,0x00,0x00,
+0x00,0x00,0x00,0x50,0xA0,0xA0,0x40,0xB0,0x90,0x60,
+0x00,0x80,0x80,0xE0,0x90,0x90,0x90,0x90,0x00,0x00,
+0x00,0x20,0x00,0x20,0x20,0x20,0x20,0x20,0x00,0x00,
+0x00,0x20,0x00,0x20,0x20,0x20,0x20,0x20,0xE0,0x00,
+0x00,0x80,0x80,0x90,0xA0,0xE0,0x90,0x90,0x00,0x00,
+0x00,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x00,0x00,
+0x00,0x00,0x00,0xD0,0xA8,0xA8,0xA8,0xA8,0x00,0x00,
+0x00,0x00,0x00,0xE0,0x90,0x90,0x90,0x90,0x00,0x00,
+0x00,0x00,0x00,0x60,0x90,0x90,0x90,0x60,0x00,0x00,
+0x00,0x00,0x00,0xE0,0x90,0x90,0xE0,0x80,0x80,0x00,
+0x00,0x00,0x00,0x70,0x90,0x90,0x70,0x10,0x10,0x00,
+0x00,0x00,0x00,0xA0,0xC0,0x80,0x80,0x80,0x00,0x00,
+0x00,0x00,0x00,0x70,0x80,0x60,0x10,0xE0,0x00,0x00,
+0x00,0x40,0x40,0xF0,0x40,0x40,0x40,0x60,0x00,0x00,
+0x00,0x00,0x00,0x90,0x90,0x90,0x90,0x60,0x00,0x00,
+0x00,0x00,0x00,0x90,0x90,0x90,0x60,0x60,0x00,0x00,
+0x00,0x00,0x00,0xA8,0xA8,0xA8,0x50,0x50,0x00,0x00,
+0x00,0x00,0x00,0x90,0x60,0x60,0x90,0x90,0x00,0x00,
+0x00,0x00,0x00,0x90,0x90,0x50,0x20,0x20,0x40,0x00,
+0x00,0x00,0x00,0xF0,0x20,0x40,0x80,0xF0,0x00,0x00,
+0x30,0x20,0x20,0x20,0x40,0x20,0x20,0x20,0x30,0x00,
+0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,
+0xC0,0x40,0x40,0x40,0x20,0x40,0x40,0x40,0xC0,0x00,
+0x50,0xA0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+};
+
+
+unsigned char asii0816[] = 
+{
+//--  MS Gothic12;  ´Ë×ÖÌåÏÂ¶ÔÓ¦µÄµãÕóÎª£º¿íx¸ß=8x16   --//
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x00,0x00,0x18,0x18,0x00,0x00,
+0x36,0x24,0x48,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x24,0x24,0x24,0xFE,0x48,0x48,0x48,0xFE,0x48,0x48,0x48,0x00,0x00,
+0x10,0x38,0x54,0x92,0x92,0x50,0x30,0x18,0x14,0x12,0x92,0x92,0x54,0x38,0x10,0x00,
+0x00,0x62,0x92,0x94,0x94,0x68,0x08,0x10,0x20,0x2C,0x52,0x52,0x92,0x8C,0x00,0x00,
+0x00,0x30,0x48,0x48,0x48,0x48,0x30,0x20,0x54,0x94,0x88,0x88,0x94,0x62,0x00,0x00,
+0x30,0x30,0x10,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x04,0x08,0x10,0x10,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x10,0x10,0x08,0x04,0x00,
+0x40,0x20,0x10,0x10,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x10,0x10,0x20,0x40,0x00,
+0x00,0x00,0x00,0x10,0x92,0x54,0x38,0x10,0x38,0x54,0x92,0x10,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x10,0x10,0x10,0xFE,0x10,0x10,0x10,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x30,0x10,0x20,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x30,0x00,0x00,
+0x00,0x02,0x02,0x04,0x04,0x08,0x08,0x10,0x20,0x20,0x40,0x40,0x80,0x80,0x00,0x00,
+0x00,0x30,0x48,0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x48,0x30,0x00,0x00,
+0x00,0x10,0x70,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x00,0x00,
+0x00,0x30,0x48,0x84,0x84,0x04,0x08,0x08,0x10,0x20,0x20,0x40,0x80,0xFC,0x00,0x00,
+0x00,0x30,0x48,0x84,0x84,0x04,0x08,0x30,0x08,0x04,0x84,0x84,0x48,0x30,0x00,0x00,
+0x00,0x08,0x08,0x18,0x18,0x28,0x28,0x48,0x48,0x88,0xFC,0x08,0x08,0x08,0x00,0x00,
+0x00,0xFC,0x80,0x80,0x80,0xB0,0xC8,0x84,0x04,0x04,0x04,0x84,0x48,0x30,0x00,0x00,
+0x00,0x30,0x48,0x84,0x84,0x80,0xB0,0xC8,0x84,0x84,0x84,0x84,0x48,0x30,0x00,0x00,
+0x00,0xFC,0x04,0x04,0x08,0x08,0x08,0x10,0x10,0x10,0x20,0x20,0x20,0x20,0x00,0x00,
+0x00,0x30,0x48,0x84,0x84,0x84,0x48,0x30,0x48,0x84,0x84,0x84,0x48,0x30,0x00,0x00,
+0x00,0x30,0x48,0x84,0x84,0x84,0x84,0x4C,0x34,0x04,0x84,0x84,0x48,0x30,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x30,0x30,0x00,0x00,0x00,0x00,0x30,0x30,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x30,0x30,0x00,0x00,0x00,0x00,0x30,0x30,0x10,0x20,0x00,
+0x00,0x00,0x04,0x08,0x10,0x20,0x40,0x80,0x40,0x20,0x10,0x08,0x04,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x7C,0x00,0x00,0x00,0x7C,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x80,0x40,0x20,0x10,0x08,0x04,0x08,0x10,0x20,0x40,0x80,0x00,0x00,0x00,
+0x00,0x30,0x48,0x84,0x84,0x04,0x08,0x10,0x20,0x20,0x00,0x00,0x30,0x30,0x00,0x00,
+0x00,0x38,0x44,0x82,0x9A,0xAA,0xAA,0xAA,0xAA,0xAA,0x9C,0x80,0x42,0x3C,0x00,0x00,
+0x00,0x10,0x10,0x28,0x28,0x28,0x28,0x44,0x44,0x44,0x7C,0x82,0x82,0x82,0x00,0x00,
+0x00,0xF8,0x84,0x82,0x82,0x82,0x84,0xF8,0x84,0x82,0x82,0x82,0x84,0xF8,0x00,0x00,
+0x00,0x38,0x44,0x82,0x82,0x80,0x80,0x80,0x80,0x80,0x82,0x82,0x44,0x38,0x00,0x00,
+0x00,0xF8,0x84,0x82,0x82,0x82,0x82,0x82,0x82,0x82,0x82,0x82,0x84,0xF8,0x00,0x00,
+0x00,0xFE,0x80,0x80,0x80,0x80,0x80,0xFC,0x80,0x80,0x80,0x80,0x80,0xFE,0x00,0x00,
+0x00,0xFE,0x80,0x80,0x80,0x80,0x80,0xFC,0x80,0x80,0x80,0x80,0x80,0x80,0x00,0x00,
+0x00,0x38,0x44,0x82,0x82,0x80,0x80,0x80,0x8E,0x82,0x82,0x82,0x46,0x3A,0x00,0x00,
+0x00,0x82,0x82,0x82,0x82,0x82,0x82,0xFE,0x82,0x82,0x82,0x82,0x82,0x82,0x00,0x00,
+0x00,0x38,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x38,0x00,0x00,
+0x00,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x84,0x84,0x48,0x30,0x00,0x00,
+0x00,0x82,0x84,0x84,0x88,0x90,0x90,0xA0,0xD0,0x88,0x88,0x84,0x82,0x82,0x00,0x00,
+0x00,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0xFE,0x00,0x00,
+0x00,0x82,0x82,0xC6,0xC6,0xC6,0xC6,0xAA,0xAA,0xAA,0xAA,0x92,0x92,0x92,0x00,0x00,
+0x00,0x82,0x82,0xC2,0xC2,0xA2,0xA2,0x92,0x92,0x8A,0x8A,0x86,0x86,0x82,0x00,0x00,
+0x00,0x38,0x44,0x82,0x82,0x82,0x82,0x82,0x82,0x82,0x82,0x82,0x44,0x38,0x00,0x00,
+0x00,0xF8,0x84,0x82,0x82,0x82,0x84,0xF8,0x80,0x80,0x80,0x80,0x80,0x80,0x00,0x00,
+0x00,0x38,0x44,0x82,0x82,0x82,0x82,0x82,0x82,0x82,0x92,0x8A,0x44,0x3A,0x00,0x00,
+0x00,0xF8,0x84,0x82,0x82,0x82,0x84,0xF8,0x88,0x88,0x84,0x84,0x82,0x82,0x00,0x00,
+0x00,0x38,0x44,0x82,0x82,0x80,0x60,0x18,0x04,0x02,0x82,0x82,0x44,0x38,0x00,0x00,
+0x00,0xFE,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x00,0x00,
+0x00,0x82,0x82,0x82,0x82,0x82,0x82,0x82,0x82,0x82,0x82,0x82,0x44,0x38,0x00,0x00,
+0x00,0x82,0x82,0x82,0x44,0x44,0x44,0x44,0x28,0x28,0x28,0x10,0x10,0x10,0x00,0x00,
+0x00,0x92,0x92,0x92,0x92,0xAA,0xAA,0xAA,0xAA,0x44,0x44,0x44,0x44,0x44,0x00,0x00,
+0x00,0x82,0x82,0x44,0x44,0x28,0x28,0x10,0x28,0x28,0x44,0x44,0x82,0x82,0x00,0x00,
+0x00,0x82,0x82,0x44,0x44,0x28,0x28,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x00,0x00,
+0x00,0xFE,0x02,0x04,0x04,0x08,0x08,0x10,0x20,0x20,0x40,0x40,0x80,0xFE,0x00,0x00,
+0x7C,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x7C,0x00,
+0x00,0x82,0x82,0x44,0x44,0x28,0x28,0x7C,0x10,0x10,0x7C,0x10,0x10,0x10,0x00,0x00,
+0x7C,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x7C,0x00,
+0x10,0x28,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,
+0x20,0x10,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x78,0x84,0x04,0x3C,0x44,0x84,0x8C,0x76,0x00,0x00,
+0x00,0x80,0x80,0x80,0x80,0x80,0xB8,0xC4,0x82,0x82,0x82,0x82,0xC4,0xB8,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x3C,0x42,0x80,0x80,0x80,0x80,0x42,0x3C,0x00,0x00,
+0x00,0x02,0x02,0x02,0x02,0x02,0x3A,0x46,0x82,0x82,0x82,0x82,0x46,0x3A,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x38,0x44,0x82,0xFE,0x80,0x80,0x42,0x3C,0x00,0x00,
+0x00,0x18,0x20,0x20,0x20,0x20,0xF8,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x3A,0x44,0x44,0x38,0x40,0x7C,0x82,0x82,0x7C,0x00,
+0x00,0x80,0x80,0x80,0x80,0x80,0xB8,0xC4,0x82,0x82,0x82,0x82,0x82,0x82,0x00,0x00,
+0x00,0x00,0x10,0x10,0x00,0x00,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x00,0x00,
+0x00,0x00,0x10,0x10,0x00,0x00,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x60,0x00,
+0x00,0x80,0x80,0x80,0x80,0x80,0x84,0x88,0x90,0xA0,0xD0,0x88,0x84,0x82,0x00,0x00,
+0x00,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0xAC,0xD2,0x92,0x92,0x92,0x92,0x92,0x92,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0xB8,0xC4,0x82,0x82,0x82,0x82,0x82,0x82,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x38,0x44,0x82,0x82,0x82,0x82,0x44,0x38,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0xB8,0xC4,0x82,0x82,0x82,0xC4,0xB8,0x80,0x80,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x3A,0x46,0x82,0x82,0x82,0x46,0x3A,0x02,0x02,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x2E,0x30,0x20,0x20,0x20,0x20,0x20,0x20,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x7C,0x82,0x80,0x60,0x1C,0x02,0x82,0x7C,0x00,0x00,
+0x00,0x00,0x20,0x20,0x20,0x20,0xF8,0x20,0x20,0x20,0x20,0x20,0x20,0x18,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x82,0x82,0x82,0x82,0x82,0x82,0x46,0x3A,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x82,0x82,0x44,0x44,0x28,0x28,0x10,0x10,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x92,0x92,0x92,0xAA,0xAA,0x44,0x44,0x44,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x82,0x44,0x28,0x10,0x10,0x28,0x44,0x82,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x82,0x82,0x44,0x44,0x28,0x28,0x10,0x20,0xC0,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0x04,0x08,0x10,0x20,0x40,0x80,0xFE,0x00,0x00,
+0x1C,0x10,0x10,0x10,0x10,0x10,0x10,0x20,0x10,0x10,0x10,0x10,0x10,0x10,0x1C,0x00,
+0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
+0x70,0x10,0x10,0x10,0x10,0x10,0x10,0x08,0x10,0x10,0x10,0x10,0x10,0x10,0x70,0x00,
+0x64,0x98,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+}; 
+
+
+
+#if 0
+//#ifdef SSD1305Z_TEST
+//=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
+//  Patterns
+//=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
+static unsigned char UniV[][48]={			// UniV OLED
+	{0x00,0x00,0xFC,0xFC,0xFC,0xFC,0x00,0x00,0x00,0xFC, 0xFC,0xFC,0xFC,0x00,0x00,0x00,0xE0,0xE0,0xE0,0xE0, 0x60,0xE0,0xE0,0xE0,0xC0,0x00,0x00,0x00,0xEC,0xEC, 0xEC,0xEC,0x00,0x00,0x00,0x04,0x3C,0xFC,0xFC,0xF0, 0x80,0x80,0xF0,0xFC,0xFC,0x3C,0x04,0x00},
+	{0x00,0x00,0x07,0x0F,0x1F,0x1F,0x1C,0x18,0x1C,0x1F,0x1F,0x0F,0x07,0x00,0x00,0x00,0x1F,0x1F,0x1F,0x1F,0x00,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x01,0x0F,0x1F,0x1F,0x1F,0x1F,0x0F,0x01,0x00,0x00,0x00},
+	{0x00,0x80,0xE0,0xE0,0xF0,0x70,0x30,0x70,0xF0,0xE0,0xE0,0x80,0x00,0x00,0x00,0xF0,0xF0,0xF0,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xF0,0xF0,0xF0,0xF0,0x30,0x30,0x30,0x30,0x30,0x00,0x00,0x00,0xF0,0xF0,0xF0,0xF0,0x30,0x70,0xF0,0xF0,0xE0,0x80},
+	{0x00,0x0F,0x3F,0x3F,0x7F,0x70,0x60,0x70,0x7F,0x3F,0x3F,0x0F,0x00,0x00,0x00,0x7F,0x7F,0x7F,0x7F,0x60,0x60,0x60,0x60,0x00,0x00,0x00,0x7F,0x7F,0x7F,0x7F,0x63,0x63,0x63,0x63,0x60,0x00,0x00,0x00,0x7F,0x7F,0x7F,0x7F,0x60,0x70,0x7F,0x7F,0x3F,0x0F},
+};
+
+
+static unsigned char Ascii_1[241][5]={		// Refer to "Times New Roman" Font Database...
+						//   Basic Characters
+	{0x00,0x00,0x00,0x00,0x00},		//
+	{0x00,0x00,0x4F,0x00,0x00},		//   (  1)  ! - 0x0021 Exclamation Mark
+	{0x00,0x07,0x00,0x07,0x00},		//   (  2)  " - 0x0022 Quotation Mark
+	{0x14,0x7F,0x14,0x7F,0x14},		//   (  3)  # - 0x0023 Number Sign
+	{0x24,0x2A,0x7F,0x2A,0x12},		//   (  4)  $ - 0x0024 Dollar Sign
+	{0x23,0x13,0x08,0x64,0x62},		//   (  5)  % - 0x0025 Percent Sign
+	{0x36,0x49,0x55,0x22,0x50},		//   (  6)  & - 0x0026 Ampersand
+	{0x00,0x05,0x03,0x00,0x00},		//   (  7)  ' - 0x0027 Apostrophe
+	{0x00,0x1C,0x22,0x41,0x00},		//   (  8)  ( - 0x0028 Left Parenthesis
+	{0x00,0x41,0x22,0x1C,0x00},		//   (  9)  ) - 0x0029 Right Parenthesis
+	{0x14,0x08,0x3E,0x08,0x14},		//   ( 10)  * - 0x002A Asterisk
+	{0x08,0x08,0x3E,0x08,0x08},		//   ( 11)  + - 0x002B Plus Sign
+	{0x00,0x50,0x30,0x00,0x00},		//   ( 12)  , - 0x002C Comma
+	{0x08,0x08,0x08,0x08,0x08},		//   ( 13)  - - 0x002D Hyphen-Minus
+	{0x00,0x60,0x60,0x00,0x00},		//   ( 14)  . - 0x002E Full Stop
+	{0x20,0x10,0x08,0x04,0x02},		//   ( 15)  / - 0x002F Solidus
+	{0x3E,0x51,0x49,0x45,0x3E},		//   ( 16)  0 - 0x0030 Digit Zero
+	{0x00,0x42,0x7F,0x40,0x00},		//   ( 17)  1 - 0x0031 Digit One
+	{0x42,0x61,0x51,0x49,0x46},		//   ( 18)  2 - 0x0032 Digit Two
+	{0x21,0x41,0x45,0x4B,0x31},		//   ( 19)  3 - 0x0033 Digit Three
+	{0x18,0x14,0x12,0x7F,0x10},		//   ( 20)  4 - 0x0034 Digit Four
+	{0x27,0x45,0x45,0x45,0x39},		//   ( 21)  5 - 0x0035 Digit Five
+	{0x3C,0x4A,0x49,0x49,0x30},		//   ( 22)  6 - 0x0036 Digit Six
+	{0x01,0x71,0x09,0x05,0x03},		//   ( 23)  7 - 0x0037 Digit Seven
+	{0x36,0x49,0x49,0x49,0x36},		//   ( 24)  8 - 0x0038 Digit Eight
+	{0x06,0x49,0x49,0x29,0x1E},		//   ( 25)  9 - 0x0039 Dight Nine
+	{0x00,0x36,0x36,0x00,0x00},		//   ( 26)  : - 0x003A Colon
+	{0x00,0x56,0x36,0x00,0x00},		//   ( 27)  ; - 0x003B Semicolon
+	{0x08,0x14,0x22,0x41,0x00},		//   ( 28)  < - 0x003C Less-Than Sign
+	{0x14,0x14,0x14,0x14,0x14},		//   ( 29)  = - 0x003D Equals Sign
+	{0x00,0x41,0x22,0x14,0x08},		//   ( 30)  > - 0x003E Greater-Than Sign
+	{0x02,0x01,0x51,0x09,0x06},		//   ( 31)  ? - 0x003F Question Mark
+	{0x32,0x49,0x79,0x41,0x3E},		//   ( 32)  @ - 0x0040 Commercial At
+	{0x7E,0x11,0x11,0x11,0x7E},		//   ( 33)  A - 0x0041 Latin Capital Letter A
+	{0x7F,0x49,0x49,0x49,0x36},		//   ( 34)  B - 0x0042 Latin Capital Letter B
+	{0x3E,0x41,0x41,0x41,0x22},		//   ( 35)  C - 0x0043 Latin Capital Letter C
+	{0x7F,0x41,0x41,0x22,0x1C},		//   ( 36)  D - 0x0044 Latin Capital Letter D
+	{0x7F,0x49,0x49,0x49,0x41},		//   ( 37)  E - 0x0045 Latin Capital Letter E
+	{0x7F,0x09,0x09,0x09,0x01},		//   ( 38)  F - 0x0046 Latin Capital Letter F
+	{0x3E,0x41,0x49,0x49,0x7A},		//   ( 39)  G - 0x0047 Latin Capital Letter G
+	{0x7F,0x08,0x08,0x08,0x7F},		//   ( 40)  H - 0x0048 Latin Capital Letter H
+	{0x00,0x41,0x7F,0x41,0x00},		//   ( 41)  I - 0x0049 Latin Capital Letter I
+	{0x20,0x40,0x41,0x3F,0x01},		//   ( 42)  J - 0x004A Latin Capital Letter J
+	{0x7F,0x08,0x14,0x22,0x41},		//   ( 43)  K - 0x004B Latin Capital Letter K
+	{0x7F,0x40,0x40,0x40,0x40},		//   ( 44)  L - 0x004C Latin Capital Letter L
+	{0x7F,0x02,0x0C,0x02,0x7F},		//   ( 45)  M - 0x004D Latin Capital Letter M
+	{0x7F,0x04,0x08,0x10,0x7F},		//   ( 46)  N - 0x004E Latin Capital Letter N
+	{0x3E,0x41,0x41,0x41,0x3E},		//   ( 47)  O - 0x004F Latin Capital Letter O
+	{0x7F,0x09,0x09,0x09,0x06},		//   ( 48)  P - 0x0050 Latin Capital Letter P
+	{0x3E,0x41,0x51,0x21,0x5E},		//   ( 49)  Q - 0x0051 Latin Capital Letter Q
+	{0x7F,0x09,0x19,0x29,0x46},		//   ( 50)  R - 0x0052 Latin Capital Letter R
+	{0x46,0x49,0x49,0x49,0x31},		//   ( 51)  S - 0x0053 Latin Capital Letter S
+	{0x01,0x01,0x7F,0x01,0x01},		//   ( 52)  T - 0x0054 Latin Capital Letter T
+	{0x3F,0x40,0x40,0x40,0x3F},		//   ( 53)  U - 0x0055 Latin Capital Letter U
+	{0x1F,0x20,0x40,0x20,0x1F},		//   ( 54)  V - 0x0056 Latin Capital Letter V
+	{0x3F,0x40,0x38,0x40,0x3F},		//   ( 55)  W - 0x0057 Latin Capital Letter W
+	{0x63,0x14,0x08,0x14,0x63},		//   ( 56)  X - 0x0058 Latin Capital Letter X
+	{0x07,0x08,0x70,0x08,0x07},		//   ( 57)  Y - 0x0059 Latin Capital Letter Y
+	{0x61,0x51,0x49,0x45,0x43},		//   ( 58)  Z - 0x005A Latin Capital Letter Z
+	{0x00,0x7F,0x41,0x41,0x00},		//   ( 59)  [ - 0x005B Left Square Bracket
+	{0x02,0x04,0x08,0x10,0x20},		//   ( 60)  \ - 0x005C Reverse Solidus
+	{0x00,0x41,0x41,0x7F,0x00},		//   ( 61)  ] - 0x005D Right Square Bracket
+	{0x04,0x02,0x01,0x02,0x04},		//   ( 62)  ^ - 0x005E Circumflex Accent
+	{0x40,0x40,0x40,0x40,0x40},		//   ( 63)  _ - 0x005F Low Line
+	{0x01,0x02,0x04,0x00,0x00},		//   ( 64)  ` - 0x0060 Grave Accent
+	{0x20,0x54,0x54,0x54,0x78},		//   ( 65)  a - 0x0061 Latin Small Letter A
+	{0x7F,0x48,0x44,0x44,0x38},		//   ( 66)  b - 0x0062 Latin Small Letter B
+	{0x38,0x44,0x44,0x44,0x20},		//   ( 67)  c - 0x0063 Latin Small Letter C
+	{0x38,0x44,0x44,0x48,0x7F},		//   ( 68)  d - 0x0064 Latin Small Letter D
+	{0x38,0x54,0x54,0x54,0x18},		//   ( 69)  e - 0x0065 Latin Small Letter E
+	{0x08,0x7E,0x09,0x01,0x02},		//   ( 70)  f - 0x0066 Latin Small Letter F
+	{0x06,0x49,0x49,0x49,0x3F},		//   ( 71)  g - 0x0067 Latin Small Letter G
+	{0x7F,0x08,0x04,0x04,0x78},		//   ( 72)  h - 0x0068 Latin Small Letter H
+	{0x00,0x44,0x7D,0x40,0x00},		//   ( 73)  i - 0x0069 Latin Small Letter I
+	{0x20,0x40,0x44,0x3D,0x00},		//   ( 74)  j - 0x006A Latin Small Letter J
+	{0x7F,0x10,0x28,0x44,0x00},		//   ( 75)  k - 0x006B Latin Small Letter K
+	{0x00,0x41,0x7F,0x40,0x00},		//   ( 76)  l - 0x006C Latin Small Letter L
+	{0x7C,0x04,0x18,0x04,0x7C},		//   ( 77)  m - 0x006D Latin Small Letter M
+	{0x7C,0x08,0x04,0x04,0x78},		//   ( 78)  n - 0x006E Latin Small Letter N
+	{0x38,0x44,0x44,0x44,0x38},		//   ( 79)  o - 0x006F Latin Small Letter O
+	{0x7C,0x14,0x14,0x14,0x08},		//   ( 80)  p - 0x0070 Latin Small Letter P
+	{0x08,0x14,0x14,0x18,0x7C},		//   ( 81)  q - 0x0071 Latin Small Letter Q
+	{0x7C,0x08,0x04,0x04,0x08},		//   ( 82)  r - 0x0072 Latin Small Letter R
+	{0x48,0x54,0x54,0x54,0x20},		//   ( 83)  s - 0x0073 Latin Small Letter S
+	{0x04,0x3F,0x44,0x40,0x20},		//   ( 84)  t - 0x0074 Latin Small Letter T
+	{0x3C,0x40,0x40,0x20,0x7C},		//   ( 85)  u - 0x0075 Latin Small Letter U
+	{0x1C,0x20,0x40,0x20,0x1C},		//   ( 86)  v - 0x0076 Latin Small Letter V
+	{0x3C,0x40,0x30,0x40,0x3C},		//   ( 87)  w - 0x0077 Latin Small Letter W
+	{0x44,0x28,0x10,0x28,0x44},		//   ( 88)  x - 0x0078 Latin Small Letter X
+	{0x0C,0x50,0x50,0x50,0x3C},		//   ( 89)  y - 0x0079 Latin Small Letter Y
+	{0x44,0x64,0x54,0x4C,0x44},		//   ( 90)  z - 0x007A Latin Small Letter Z
+	{0x00,0x08,0x36,0x41,0x00},		//   ( 91)  { - 0x007B Left Curly Bracket
+	{0x00,0x00,0x7F,0x00,0x00},		//   ( 92)  | - 0x007C Vertical Line
+	{0x00,0x41,0x36,0x08,0x00},		//   ( 93)  } - 0x007D Right Curly Bracket
+	{0x02,0x01,0x02,0x04,0x02},		//   ( 94)  ~ - 0x007E Tilde
+	{0x3E,0x55,0x55,0x41,0x22},		//   ( 95)  C - 0x0080 <Control>
+	{0x00,0x00,0x00,0x00,0x00},		//   ( 96)    - 0x00A0 No-Break Space
+	{0x00,0x00,0x79,0x00,0x00},		//   ( 97)  ! - 0x00A1 Inverted Exclamation Mark
+	{0x18,0x24,0x74,0x2E,0x24},		//   ( 98)  c - 0x00A2 Cent Sign
+	{0x48,0x7E,0x49,0x42,0x40},		//   ( 99)  L - 0x00A3 Pound Sign
+	{0x5D,0x22,0x22,0x22,0x5D},		//   (100)  o - 0x00A4 Currency Sign
+	{0x15,0x16,0x7C,0x16,0x15},		//   (101)  Y - 0x00A5 Yen Sign
+	{0x00,0x00,0x77,0x00,0x00},		//   (102)  | - 0x00A6 Broken Bar
+	{0x0A,0x55,0x55,0x55,0x28},		//   (103)    - 0x00A7 Section Sign
+	{0x00,0x01,0x00,0x01,0x00},		//   (104)  " - 0x00A8 Diaeresis
+	{0x00,0x0A,0x0D,0x0A,0x04},		//   (105)    - 0x00AA Feminine Ordinal Indicator
+	{0x08,0x14,0x2A,0x14,0x22},		//   (106) << - 0x00AB Left-Pointing Double Angle Quotation Mark
+	{0x04,0x04,0x04,0x04,0x1C},		//   (107)    - 0x00AC Not Sign
+	{0x00,0x08,0x08,0x08,0x00},		//   (108)  - - 0x00AD Soft Hyphen
+	{0x01,0x01,0x01,0x01,0x01},		//   (109)    - 0x00AF Macron
+	{0x00,0x02,0x05,0x02,0x00},		//   (110)    - 0x00B0 Degree Sign
+	{0x44,0x44,0x5F,0x44,0x44},		//   (111) +- - 0x00B1 Plus-Minus Sign
+	{0x00,0x00,0x04,0x02,0x01},		//   (112)  ` - 0x00B4 Acute Accent
+	{0x7E,0x20,0x20,0x10,0x3E},		//   (113)  u - 0x00B5 Micro Sign
+	{0x06,0x0F,0x7F,0x00,0x7F},		//   (114)    - 0x00B6 Pilcrow Sign
+	{0x00,0x18,0x18,0x00,0x00},		//   (115)  . - 0x00B7 Middle Dot
+	{0x00,0x40,0x50,0x20,0x00},		//   (116)    - 0x00B8 Cedilla
+	{0x00,0x0A,0x0D,0x0A,0x00},		//   (117)    - 0x00BA Masculine Ordinal Indicator
+	{0x22,0x14,0x2A,0x14,0x08},		//   (118) >> - 0x00BB Right-Pointing Double Angle Quotation Mark
+	{0x17,0x08,0x34,0x2A,0x7D},		//   (119) /4 - 0x00BC Vulgar Fraction One Quarter
+	{0x17,0x08,0x04,0x6A,0x59},		//   (120) /2 - 0x00BD Vulgar Fraction One Half
+	{0x30,0x48,0x45,0x40,0x20},		//   (121)  ? - 0x00BF Inverted Question Mark
+	{0x70,0x29,0x26,0x28,0x70},		//   (122) `A - 0x00C0 Latin Capital Letter A with Grave
+	{0x70,0x28,0x26,0x29,0x70},		//   (123) 'A - 0x00C1 Latin Capital Letter A with Acute
+	{0x70,0x2A,0x25,0x2A,0x70},		//   (124) ^A - 0x00C2 Latin Capital Letter A with Circumflex
+	{0x72,0x29,0x26,0x29,0x70},		//   (125) ~A - 0x00C3 Latin Capital Letter A with Tilde
+	{0x70,0x29,0x24,0x29,0x70},		//   (126) "A - 0x00C4 Latin Capital Letter A with Diaeresis
+	{0x70,0x2A,0x2D,0x2A,0x70},		//   (127)  A - 0x00C5 Latin Capital Letter A with Ring Above
+	{0x7E,0x11,0x7F,0x49,0x49},		//   (128) AE - 0x00C6 Latin Capital Letter Ae
+	{0x0E,0x51,0x51,0x71,0x11},		//   (129)  C - 0x00C7 Latin Capital Letter C with Cedilla
+	{0x7C,0x55,0x56,0x54,0x44},		//   (130) `E - 0x00C8 Latin Capital Letter E with Grave
+	{0x7C,0x55,0x56,0x54,0x44},		//   (131) 'E - 0x00C9 Latin Capital Letter E with Acute
+	{0x7C,0x56,0x55,0x56,0x44},		//   (132) ^E - 0x00CA Latin Capital Letter E with Circumflex
+	{0x7C,0x55,0x54,0x55,0x44},		//   (133) "E - 0x00CB Latin Capital Letter E with Diaeresis
+	{0x00,0x45,0x7E,0x44,0x00},		//   (134) `I - 0x00CC Latin Capital Letter I with Grave
+	{0x00,0x44,0x7E,0x45,0x00},		//   (135) 'I - 0x00CD Latin Capital Letter I with Acute
+	{0x00,0x46,0x7D,0x46,0x00},		//   (136) ^I - 0x00CE Latin Capital Letter I with Circumflex
+	{0x00,0x45,0x7C,0x45,0x00},		//   (137) "I - 0x00CF Latin Capital Letter I with Diaeresis
+	{0x7F,0x49,0x49,0x41,0x3E},		//   (138)  D - 0x00D0 Latin Capital Letter Eth
+	{0x7C,0x0A,0x11,0x22,0x7D},		//   (139) ~N - 0x00D1 Latin Capital Letter N with Tilde
+	{0x38,0x45,0x46,0x44,0x38},		//   (140) `O - 0x00D2 Latin Capital Letter O with Grave
+	{0x38,0x44,0x46,0x45,0x38},		//   (141) 'O - 0x00D3 Latin Capital Letter O with Acute
+	{0x38,0x46,0x45,0x46,0x38},		//   (142) ^O - 0x00D4 Latin Capital Letter O with Circumflex
+	{0x38,0x46,0x45,0x46,0x39},		//   (143) ~O - 0x00D5 Latin Capital Letter O with Tilde
+	{0x38,0x45,0x44,0x45,0x38},		//   (144) "O - 0x00D6 Latin Capital Letter O with Diaeresis
+	{0x22,0x14,0x08,0x14,0x22},		//   (145)  x - 0x00D7 Multiplcation Sign
+	{0x2E,0x51,0x49,0x45,0x3A},		//   (146)  O - 0x00D8 Latin Capital Letter O with Stroke
+	{0x3C,0x41,0x42,0x40,0x3C},		//   (147) `U - 0x00D9 Latin Capital Letter U with Grave
+	{0x3C,0x40,0x42,0x41,0x3C},		//   (148) 'U - 0x00DA Latin Capital Letter U with Acute
+	{0x3C,0x42,0x41,0x42,0x3C},		//   (149) ^U - 0x00DB Latin Capital Letter U with Circumflex
+	{0x3C,0x41,0x40,0x41,0x3C},		//   (150) "U - 0x00DC Latin Capital Letter U with Diaeresis
+	{0x0C,0x10,0x62,0x11,0x0C},		//   (151) `Y - 0x00DD Latin Capital Letter Y with Acute
+	{0x7F,0x12,0x12,0x12,0x0C},		//   (152)  P - 0x00DE Latin Capital Letter Thom
+	{0x40,0x3E,0x01,0x49,0x36},		//   (153)  B - 0x00DF Latin Capital Letter Sharp S
+	{0x20,0x55,0x56,0x54,0x78},		//   (154) `a - 0x00E0 Latin Small Letter A with Grave
+	{0x20,0x54,0x56,0x55,0x78},		//   (155) 'a - 0x00E1 Latin Small Letter A with Acute
+	{0x20,0x56,0x55,0x56,0x78},		//   (156) ^a - 0x00E2 Latin Small Letter A with Circumflex
+	{0x20,0x55,0x56,0x55,0x78},		//   (157) ~a - 0x00E3 Latin Small Letter A with Tilde
+	{0x20,0x55,0x54,0x55,0x78},		//   (158) "a - 0x00E4 Latin Small Letter A with Diaeresis
+	{0x20,0x56,0x57,0x56,0x78},		//   (159)  a - 0x00E5 Latin Small Letter A with Ring Above
+	{0x24,0x54,0x78,0x54,0x58},		//   (160) ae - 0x00E6 Latin Small Letter Ae
+	{0x0C,0x52,0x52,0x72,0x13},		//   (161)  c - 0x00E7 Latin Small Letter c with Cedilla
+	{0x38,0x55,0x56,0x54,0x18},		//   (162) `e - 0x00E8 Latin Small Letter E with Grave
+	{0x38,0x54,0x56,0x55,0x18},		//   (163) 'e - 0x00E9 Latin Small Letter E with Acute
+	{0x38,0x56,0x55,0x56,0x18},		//   (164) ^e - 0x00EA Latin Small Letter E with Circumflex
+	{0x38,0x55,0x54,0x55,0x18},		//   (165) "e - 0x00EB Latin Small Letter E with Diaeresis
+	{0x00,0x49,0x7A,0x40,0x00},		//   (166) `i - 0x00EC Latin Small Letter I with Grave
+	{0x00,0x48,0x7A,0x41,0x00},		//   (167) 'i - 0x00ED Latin Small Letter I with Acute
+	{0x00,0x4A,0x79,0x42,0x00},		//   (168) ^i - 0x00EE Latin Small Letter I with Circumflex
+	{0x00,0x4A,0x78,0x42,0x00},		//   (169) "i - 0x00EF Latin Small Letter I with Diaeresis
+	{0x31,0x4A,0x4E,0x4A,0x30},		//   (170)    - 0x00F0 Latin Small Letter Eth
+	{0x7A,0x11,0x0A,0x09,0x70},		//   (171) ~n - 0x00F1 Latin Small Letter N with Tilde
+	{0x30,0x49,0x4A,0x48,0x30},		//   (172) `o - 0x00F2 Latin Small Letter O with Grave
+	{0x30,0x48,0x4A,0x49,0x30},		//   (173) 'o - 0x00F3 Latin Small Letter O with Acute
+	{0x30,0x4A,0x49,0x4A,0x30},		//   (174) ^o - 0x00F4 Latin Small Letter O with Circumflex
+	{0x30,0x4A,0x49,0x4A,0x31},		//   (175) ~o - 0x00F5 Latin Small Letter O with Tilde
+	{0x30,0x4A,0x48,0x4A,0x30},		//   (176) "o - 0x00F6 Latin Small Letter O with Diaeresis
+	{0x08,0x08,0x2A,0x08,0x08},		//   (177)  + - 0x00F7 Division Sign
+	{0x38,0x64,0x54,0x4C,0x38},		//   (178)  o - 0x00F8 Latin Small Letter O with Stroke
+	{0x38,0x41,0x42,0x20,0x78},		//   (179) `u - 0x00F9 Latin Small Letter U with Grave
+	{0x38,0x40,0x42,0x21,0x78},		//   (180) 'u - 0x00FA Latin Small Letter U with Acute
+	{0x38,0x42,0x41,0x22,0x78},		//   (181) ^u - 0x00FB Latin Small Letter U with Circumflex
+	{0x38,0x42,0x40,0x22,0x78},		//   (182) "u - 0x00FC Latin Small Letter U with Diaeresis
+	{0x0C,0x50,0x52,0x51,0x3C},		//   (183) 'y - 0x00FD Latin Small Letter Y with Acute
+	{0x7E,0x14,0x14,0x14,0x08},		//   (184)  p - 0x00FE Latin Small Letter Thom
+	{0x0C,0x51,0x50,0x51,0x3C},		//   (185) "y - 0x00FF Latin Small Letter Y with Diaeresis
+	{0x1E,0x09,0x09,0x29,0x5E},		//   (186)  A - 0x0104 Latin Capital Letter A with Ogonek
+	{0x08,0x15,0x15,0x35,0x4E},		//   (187)  a - 0x0105 Latin Small Letter A with Ogonek
+	{0x38,0x44,0x46,0x45,0x20},		//   (188) 'C - 0x0106 Latin Capital Letter C with Acute
+	{0x30,0x48,0x4A,0x49,0x20},		//   (189) 'c - 0x0107 Latin Small Letter C with Acute
+	{0x38,0x45,0x46,0x45,0x20},		//   (190)  C - 0x010C Latin Capital Letter C with Caron
+	{0x30,0x49,0x4A,0x49,0x20},		//   (191)  c - 0x010D Latin Small Letter C with Caron
+	{0x7C,0x45,0x46,0x45,0x38},		//   (192)  D - 0x010E Latin Capital Letter D with Caron
+	{0x20,0x50,0x50,0x7C,0x03},		//   (193) d' - 0x010F Latin Small Letter D with Caron
+	{0x1F,0x15,0x15,0x35,0x51},		//   (194)  E - 0x0118 Latin Capital Letter E with Ogonek
+	{0x0E,0x15,0x15,0x35,0x46},		//   (195)  e - 0x0119 Latin Small Letter E with Ogonek
+	{0x7C,0x55,0x56,0x55,0x44},		//   (196)  E - 0x011A Latin Capital Letter E with Caron
+	{0x38,0x55,0x56,0x55,0x18},		//   (197)  e - 0x011B Latin Small Letter E with Caron
+	{0x00,0x44,0x7C,0x40,0x00},		//   (198)  i - 0x0131 Latin Small Letter Dotless I
+	{0x7F,0x48,0x44,0x40,0x40},		//   (199)  L - 0x0141 Latin Capital Letter L with Stroke
+	{0x00,0x49,0x7F,0x44,0x00},		//   (200)  l - 0x0142 Latin Small Letter L with Stroke
+	{0x7C,0x08,0x12,0x21,0x7C},		//   (201) 'N - 0x0143 Latin Capital Letter N with Acute
+	{0x78,0x10,0x0A,0x09,0x70},		//   (202) 'n - 0x0144 Latin Small Letter N with Acute
+	{0x7C,0x09,0x12,0x21,0x7C},		//   (203)  N - 0x0147 Latin Capital Letter N with Caron
+	{0x78,0x11,0x0A,0x09,0x70},		//   (204)  n - 0x0148 Latin Small Letter N with Caron
+	{0x38,0x47,0x44,0x47,0x38},		//   (205) "O - 0x0150 Latin Capital Letter O with Double Acute
+	{0x30,0x4B,0x48,0x4B,0x30},		//   (206) "o - 0x0151 Latin Small Letter O with Double Acute
+	{0x3E,0x41,0x7F,0x49,0x49},		//   (207) OE - 0x0152 Latin Capital Ligature Oe
+	{0x38,0x44,0x38,0x54,0x58},		//   (208) oe - 0x0153 Latin Small Ligature Oe
+	{0x7C,0x15,0x16,0x35,0x48},		//   (209)  R - 0x0158 Latin Capital Letter R with Caron
+	{0x78,0x11,0x0A,0x09,0x10},		//   (210)  r - 0x0159 Latin Small Letter R with Caron
+	{0x48,0x54,0x56,0x55,0x20},		//   (211) 'S - 0x015A Latin Capital Letter S with Acute
+	{0x20,0x48,0x56,0x55,0x20},		//   (212) 's - 0x015B Latin Small Letter S with Acute
+	{0x48,0x55,0x56,0x55,0x20},		//   (213)  S - 0x0160 Latin Capital Letter S with Caron
+	{0x20,0x49,0x56,0x55,0x20},		//   (214)  s - 0x0161 Latin Small Letter S with Caron
+	{0x04,0x05,0x7E,0x05,0x04},		//   (215)  T - 0x0164 Latin Capital Letter T with Caron
+	{0x08,0x3C,0x48,0x22,0x01},		//   (216) t' - 0x0165 Latin Small Letter T with Caron
+	{0x3C,0x42,0x45,0x42,0x3C},		//   (217)  U - 0x016E Latin Capital Letter U with Ring Above
+	{0x38,0x42,0x45,0x22,0x78},		//   (218)  u - 0x016F Latin Small Letter U with Ring Above
+	{0x3C,0x43,0x40,0x43,0x3C},		//   (219) "U - 0x0170 Latin Capital Letter U with Double Acute
+	{0x38,0x43,0x40,0x23,0x78},		//   (220) "u - 0x0171 Latin Small Letter U with Double Acute
+	{0x0C,0x11,0x60,0x11,0x0C},		//   (221) "Y - 0x0178 Latin Capital Letter Y with Diaeresis
+	{0x44,0x66,0x55,0x4C,0x44},		//   (222) 'Z - 0x0179 Latin Capital Letter Z with Acute
+	{0x48,0x6A,0x59,0x48,0x00},		//   (223) 'z - 0x017A Latin Small Letter Z with Acute
+	{0x44,0x64,0x55,0x4C,0x44},		//   (224)  Z - 0x017B Latin Capital Letter Z with Dot Above
+	{0x48,0x68,0x5A,0x48,0x00},		//   (225)  z - 0x017C Latin Small Letter Z with Dot Above
+	{0x44,0x65,0x56,0x4D,0x44},		//   (226)  Z - 0x017D Latin Capital Letter Z with Caron
+	{0x48,0x69,0x5A,0x49,0x00},		//   (227)  z - 0x017E Latin Small Letter Z with Caron
+	{0x00,0x02,0x01,0x02,0x00},		//   (228)  ^ - 0x02C6 Modifier Letter Circumflex Accent
+	{0x00,0x01,0x02,0x01,0x00},		//   (229)    - 0x02C7 Caron
+	{0x00,0x01,0x01,0x01,0x00},		//   (230)    - 0x02C9 Modifier Letter Macron
+	{0x01,0x02,0x02,0x01,0x00},		//   (231)    - 0x02D8 Breve
+	{0x00,0x00,0x01,0x00,0x00},		//   (232)    - 0x02D9 Dot Above
+	{0x00,0x02,0x05,0x02,0x00},		//   (233)    - 0x02DA Ring Above
+	{0x02,0x01,0x02,0x01,0x00},		//   (234)  ~ - 0x02DC Small Tilde
+	{0x7F,0x05,0x15,0x3A,0x50},		//   (235) Pt - 0x20A7 Peseta Sign
+	{0x3E,0x55,0x55,0x41,0x22},		//   (236)  C - 0x20AC Euro Sign
+	{0x18,0x14,0x08,0x14,0x0C},		//   (237)    - 0x221E Infinity
+	{0x44,0x4A,0x4A,0x51,0x51},		//   (238)  < - 0x2264 Less-Than or Equal to
+	{0x51,0x51,0x4A,0x4A,0x44},		//   (239)  > - 0x2265 Greater-Than or Equal to
+	{0x74,0x42,0x41,0x42,0x74},		//   (240)    - 0x2302 House
+};
+
+
+static unsigned char Ascii_2[108][5]={		// Refer to "Times New Roman" Font Database...
+						//   Greek & Japanese Letters
+	{0x00,0x00,0x00,0x00,0x00},		//
+	{0x7E,0x11,0x11,0x11,0x7E},		//   (  1)  A - 0x0391 Greek Capital Letter Alpha
+	{0x7F,0x49,0x49,0x49,0x36},		//   (  2)  B - 0x0392 Greek Capital Letter Beta
+	{0x7F,0x02,0x01,0x01,0x03},		//   (  3)    - 0x0393 Greek Capital Letter Gamma
+	{0x70,0x4E,0x41,0x4E,0x70},		//   (  4)    - 0x0394 Greek Capital Letter Delta
+	{0x7F,0x49,0x49,0x49,0x41},		//   (  5)  E - 0x0395 Greek Capital Letter Epsilon
+	{0x61,0x51,0x49,0x45,0x43},		//   (  6)  Z - 0x0396 Greek Capital Letter Zeta
+	{0x7F,0x08,0x08,0x08,0x7F},		//   (  7)  H - 0x0397 Greek Capital Letter Eta
+	{0x3E,0x49,0x49,0x49,0x3E},		//   (  8)    - 0x0398 Greek Capital Letter Theta
+	{0x00,0x41,0x7F,0x41,0x00},		//   (  9)  I - 0x0399 Greek Capital Letter Iota
+	{0x7F,0x08,0x14,0x22,0x41},		//   ( 10)  K - 0x039A Greek Capital Letter Kappa
+	{0x70,0x0E,0x01,0x0E,0x70},		//   ( 11)    - 0x039B Greek Capital Letter Lamda
+	{0x7F,0x02,0x0C,0x02,0x7F},		//   ( 12)  M - 0x039C Greek Capital Letter Mu
+	{0x7F,0x04,0x08,0x10,0x7F},		//   ( 13)  N - 0x039D Greek Capital Letter Nu
+	{0x63,0x5D,0x49,0x5D,0x63},		//   ( 14)    - 0x039E Greek Capital Letter Xi
+	{0x3E,0x41,0x41,0x41,0x3E},		//   ( 15)  O - 0x039F Greek Capital Letter Omicron
+	{0x41,0x3F,0x01,0x3F,0x41},		//   ( 16)    - 0x03A0 Greek Capital Letter Pi
+	{0x7F,0x09,0x09,0x09,0x06},		//   ( 17)  P - 0x03A1 Greek Capital Letter Rho
+	{0x63,0x55,0x49,0x41,0x41},		//   ( 18)    - 0x03A3 Greek Capital Letter Sigma
+	{0x01,0x01,0x7F,0x01,0x01},		//   ( 19)  T - 0x03A4 Greek Capital Letter Tau
+	{0x03,0x01,0x7E,0x01,0x03},		//   ( 20)    - 0x03A5 Greek Capital Letter Upsilon
+	{0x08,0x55,0x7F,0x55,0x08},		//   ( 21)    - 0x03A6 Greek Capital Letter Phi
+	{0x63,0x14,0x08,0x14,0x63},		//   ( 22)  X - 0x03A7 Greek Capital Letter Chi
+	{0x07,0x48,0x7F,0x48,0x07},		//   ( 23)    - 0x03A8 Greek Capital Letter Psi
+	{0x5E,0x61,0x01,0x61,0x5E},		//   ( 24)    - 0x03A9 Greek Capital Letter Omega
+	{0x38,0x44,0x48,0x30,0x4C},		//   ( 25)  a - 0x03B1 Greek Small Letter Alpha
+	{0x7C,0x2A,0x2A,0x2A,0x14},		//   ( 26)  B - 0x03B2 Greek Small Letter Beta
+	{0x44,0x38,0x04,0x04,0x08},		//   ( 27)  r - 0x03B3 Greek Small Letter Gamma
+	{0x30,0x4B,0x4D,0x59,0x30},		//   ( 28)    - 0x03B4 Greek Small Letter Delta
+	{0x28,0x54,0x54,0x44,0x20},		//   ( 29)    - 0x03B5 Greek Small Letter Epsilon
+	{0x00,0x18,0x55,0x52,0x22},		//   ( 30)    - 0x03B6 Greek Small Letter Zeta
+	{0x3E,0x04,0x02,0x02,0x7C},		//   ( 31)  n - 0x03B7 Greek Small Letter Eta
+	{0x3C,0x4A,0x4A,0x4A,0x3C},		//   ( 32)    - 0x03B8 Greek Small Letter Theta
+	{0x00,0x3C,0x40,0x20,0x00},		//   ( 33)  i - 0x03B9 Greek Small Letter Iota
+	{0x7C,0x10,0x28,0x44,0x40},		//   ( 34)  k - 0x03BA Greek Small Letter Kappa
+	{0x41,0x32,0x0C,0x30,0x40},		//   ( 35)    - 0x03BB Greek Small Letter Lamda
+	{0x7E,0x20,0x20,0x10,0x3E},		//   ( 36)  u - 0x03BC Greek Small Letter Mu
+	{0x1C,0x20,0x40,0x20,0x1C},		//   ( 37)  v - 0x03BD Greek Small Letter Nu
+	{0x14,0x2B,0x2A,0x2A,0x60},		//   ( 38)    - 0x03BE Greek Small Letter Xi
+	{0x38,0x44,0x44,0x44,0x38},		//   ( 39)  o - 0x03BF Greek Small Letter Omicron
+	{0x44,0x3C,0x04,0x7C,0x44},		//   ( 40)    - 0x03C0 Greek Small Letter Pi
+	{0x70,0x28,0x24,0x24,0x18},		//   ( 41)  p - 0x03C1 Greek Small Letter Rho
+	{0x0C,0x12,0x12,0x52,0x60},		//   ( 42)    - 0x03C2 Greek Small Letter Final Sigma
+	{0x38,0x44,0x4C,0x54,0x24},		//   ( 43)    - 0x03C3 Greek Small Letter Sigma
+	{0x04,0x3C,0x44,0x20,0x00},		//   ( 44)  t - 0x03C4 Greek Small Letter Tau
+	{0x3C,0x40,0x40,0x20,0x1C},		//   ( 45)  v - 0x03C5 Greek Small Letter Upsilon
+	{0x18,0x24,0x7E,0x24,0x18},		//   ( 46)    - 0x03C6 Greek Small Letter Phi
+	{0x44,0x28,0x10,0x28,0x44},		//   ( 47)  x - 0x03C7 Greek Small Letter Chi
+	{0x0C,0x10,0x7E,0x10,0x0C},		//   ( 48)    - 0x03C8 Greek Small Letter Psi
+	{0x38,0x44,0x30,0x44,0x38},		//   ( 49)  w - 0x03C9 Greek Small Letter Omega
+	{0x0A,0x0A,0x4A,0x2A,0x1E},		//   ( 50)    - 0xFF66 Katakana Letter Wo
+	{0x04,0x44,0x34,0x14,0x0C},		//   ( 51)    - 0xFF67 Katakana Letter Small A
+	{0x20,0x10,0x78,0x04,0x00},		//   ( 52)    - 0xFF68 Katakana Letter Small I
+	{0x18,0x08,0x4C,0x48,0x38},		//   ( 53)    - 0xFF69 Katakana Letter Small U
+	{0x48,0x48,0x78,0x48,0x48},		//   ( 54)    - 0xFF6A Katakana Letter Small E
+	{0x48,0x28,0x18,0x7C,0x08},		//   ( 55)    - 0xFF6B Katakana Letter Small O
+	{0x08,0x7C,0x08,0x28,0x18},		//   ( 56)    - 0xFF6C Katakana Letter Small Ya
+	{0x40,0x48,0x48,0x78,0x40},		//   ( 57)    - 0xFF6D Katakana Letter Small Yu
+	{0x54,0x54,0x54,0x7C,0x00},		//   ( 58)    - 0xFF6E Katakana Letter Small Yo
+	{0x18,0x00,0x58,0x40,0x38},		//   ( 59)    - 0xFF6F Katakana Letter Small Tu
+	{0x08,0x08,0x08,0x08,0x08},		//   ( 60)    - 0xFF70 Katakana-Hiragana Prolonged Sound Mark
+	{0x01,0x41,0x3D,0x09,0x07},		//   ( 61)    - 0xFF71 Katakana Letter A
+	{0x10,0x08,0x7C,0x02,0x01},		//   ( 62)    - 0xFF72 Katakana Letter I
+	{0x0E,0x02,0x43,0x22,0x1E},		//   ( 63)    - 0xFF73 Katakana Letter U
+	{0x42,0x42,0x7E,0x42,0x42},		//   ( 64)    - 0xFF74 Katakana Letter E
+	{0x22,0x12,0x0A,0x7F,0x02},		//   ( 65)    - 0xFF75 Katakana Letter O
+	{0x42,0x3F,0x02,0x42,0x3E},		//   ( 66)    - 0xFF76 Katakana Letter Ka
+	{0x0A,0x0A,0x7F,0x0A,0x0A},		//   ( 67)    - 0xFF77 Katakana Letter Ki
+	{0x08,0x46,0x42,0x22,0x1E},		//   ( 68)    - 0xFF78 Katakana Letter Ku
+	{0x04,0x03,0x42,0x3E,0x02},		//   ( 69)    - 0xFF79 Katakana Letter Ke
+	{0x42,0x42,0x42,0x42,0x7E},		//   ( 70)    - 0xFF7A Katakana Letter Ko
+	{0x02,0x4F,0x22,0x1F,0x02},		//   ( 71)    - 0xFF7B Katakana Letter Sa
+	{0x4A,0x4A,0x40,0x20,0x1C},		//   ( 72)    - 0xFF7C Katakana Letter Shi
+	{0x42,0x22,0x12,0x2A,0x46},		//   ( 73)    - 0xFF7D Katakana Letter Su
+	{0x02,0x3F,0x42,0x4A,0x46},		//   ( 74)    - 0xFF7E Katakana Letter Se
+	{0x06,0x48,0x40,0x20,0x1E},		//   ( 75)    - 0xFF7F Katakana Letter So
+	{0x08,0x46,0x4A,0x32,0x1E},		//   ( 76)    - 0xFF80 Katakana Letter Ta
+	{0x0A,0x4A,0x3E,0x09,0x08},		//   ( 77)    - 0xFF81 Katakana Letter Chi
+	{0x0E,0x00,0x4E,0x20,0x1E},		//   ( 78)    - 0xFF82 Katakana Letter Tsu
+	{0x04,0x45,0x3D,0x05,0x04},		//   ( 79)    - 0xFF83 Katakana Letter Te
+	{0x00,0x7F,0x08,0x10,0x00},		//   ( 80)    - 0xFF84 Katakana Letter To
+	{0x44,0x24,0x1F,0x04,0x04},		//   ( 81)    - 0xFF85 Katakana Letter Na
+	{0x40,0x42,0x42,0x42,0x40},		//   ( 82)    - 0xFF86 Katakana Letter Ni
+	{0x42,0x2A,0x12,0x2A,0x06},		//   ( 83)    - 0xFF87 Katakana Letter Nu
+	{0x22,0x12,0x7B,0x16,0x22},		//   ( 84)    - 0xFF88 Katakana Letter Ne
+	{0x00,0x40,0x20,0x1F,0x00},		//   ( 85)    - 0xFF89 Katakana Letter No
+	{0x78,0x00,0x02,0x04,0x78},		//   ( 86)    - 0xFF8A Katakana Letter Ha
+	{0x3F,0x44,0x44,0x44,0x44},		//   ( 87)    - 0xFF8B Katakana Letter Hi
+	{0x02,0x42,0x42,0x22,0x1E},		//   ( 88)    - 0xFF8C Katakana Letter Fu
+	{0x04,0x02,0x04,0x08,0x30},		//   ( 89)    - 0xFF8D Katakana Letter He
+	{0x32,0x02,0x7F,0x02,0x32},		//   ( 90)    - 0xFF8E Katakana Letter Ho
+	{0x02,0x12,0x22,0x52,0x0E},		//   ( 91)    - 0xFF8F Katakana Letter Ma
+	{0x00,0x2A,0x2A,0x2A,0x40},		//   ( 92)    - 0xFF90 Katakana Letter Mi
+	{0x38,0x24,0x22,0x20,0x70},		//   ( 93)    - 0xFF91 Katakana Letter Mu
+	{0x40,0x28,0x10,0x28,0x06},		//   ( 94)    - 0xFF92 Katakana Letter Me
+	{0x0A,0x3E,0x4A,0x4A,0x4A},		//   ( 95)    - 0xFF93 Katakana Letter Mo
+	{0x04,0x7F,0x04,0x14,0x0C},		//   ( 96)    - 0xFF94 Katakana Letter Ya
+	{0x40,0x42,0x42,0x7E,0x40},		//   ( 97)    - 0xFF95 Katakana Letter Yu
+	{0x4A,0x4A,0x4A,0x4A,0x7E},		//   ( 98)    - 0xFF96 Katakana Letter Yo
+	{0x04,0x05,0x45,0x25,0x1C},		//   ( 99)    - 0xFF97 Katakana Letter Ra
+	{0x0F,0x40,0x20,0x1F,0x00},		//   (100)    - 0xFF98 Katakana Letter Ri
+	{0x7C,0x00,0x7E,0x40,0x30},		//   (101)    - 0xFF99 Katakana Letter Ru
+	{0x7E,0x40,0x20,0x10,0x08},		//   (102)    - 0xFF9A Katakana Letter Re
+	{0x7E,0x42,0x42,0x42,0x7E},		//   (103)    - 0xFF9B Katakana Letter Ro
+	{0x0E,0x02,0x42,0x22,0x1E},		//   (104)    - 0xFF9C Katakana Letter Wa
+	{0x42,0x42,0x40,0x20,0x18},		//   (105)    - 0xFF9D Katakana Letter N
+	{0x02,0x04,0x01,0x02,0x00},		//   (106)    - 0xFF9E Katakana Voiced Sound Mark
+	{0x07,0x05,0x07,0x00,0x00},		//   (107)    - 0xFF9F Katakana Semi-Voiced Sound Mark
+};
+
+#endif
+
+#endif
diff -uNra linux-3.0.82/drivers/mmc/card/block.c linux-3.0.82x/drivers/mmc/card/block.c
--- linux-3.0.82/drivers/mmc/card/block.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/mmc/card/block.c	2017-09-23 03:42:49.646676200 +0800
@@ -682,7 +682,7 @@
 	struct mmc_blk_data *md = mq->data;
 	struct mmc_card *card = md->queue.card;
 	struct mmc_blk_request brq;
-	int ret = 1, disable_multi = 0;
+	int ret = 1, disable_multi = 1; //dbg-yg  disable_multi=0;
 
 	/*
 	 * Reliable writes are used to implement Forced Unit Access and
@@ -808,7 +808,6 @@
 		mmc_queue_bounce_pre(mq);
 
 		mmc_wait_for_req(card->host, &brq.mrq);
-
 		mmc_queue_bounce_post(mq);
 
 		/*
@@ -825,6 +824,7 @@
 				disable_multi = 1;
 				continue;
 			}
+
 			status = get_card_status(card, req);
 		}
 
@@ -909,7 +909,9 @@
 		 * A block was successfully transferred.
 		 */
 		spin_lock_irq(&md->lock);
+
 		ret = __blk_end_request(req, 0, brq.data.bytes_xfered);
+	//	ret = 0;
 		spin_unlock_irq(&md->lock);
 	} while (ret);
 
diff -uNra linux-3.0.82/drivers/mmc/core/core.c linux-3.0.82x/drivers/mmc/core/core.c
--- linux-3.0.82/drivers/mmc/core/core.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/mmc/core/core.c	2017-09-23 03:42:49.646676200 +0800
@@ -657,9 +657,10 @@
 
 void mmc_set_clock(struct mmc_host *host, unsigned int hz)
 {
-	mmc_host_clk_hold(host);
+//	printk(" host->clk_old:%d hz .....................\r\n",host->clk_old );
+//	mmc_host_clk_hold(host);
 	__mmc_set_clock(host, hz);
-	mmc_host_clk_release(host);
+//	mmc_host_clk_release(host);
 }
 
 #ifdef CONFIG_MMC_CLKGATE
@@ -1569,14 +1570,16 @@
 	 * if the card is being re-initialized, just send it.  CMD52
 	 * should be ignored by SD/eMMC cards.
 	 */
-	sdio_reset(host);
+//dbg-yg  ls1c sdio host  not support  send cmd52 2times,
+/*	sdio_reset(host); */
 	mmc_go_idle(host);
-
+	mdelay(50);
 	mmc_send_if_cond(host, host->ocr_avail);
 
 	/* Order's important: probe SDIO, then SD, then MMC */
-	if (!mmc_attach_sdio(host))
+/*	if (!mmc_attach_sdio(host))
 		return 0;
+*/	mdelay(50);
 	if (!mmc_attach_sd(host))
 		return 0;
 	if (!mmc_attach_mmc(host))
diff -uNra linux-3.0.82/drivers/mmc/core/sd.c linux-3.0.82x/drivers/mmc/core/sd.c
--- linux-3.0.82/drivers/mmc/core/sd.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/mmc/core/sd.c	2017-09-23 03:42:49.650676189 +0800
@@ -366,7 +366,6 @@
 {
 	int err;
 	u8 *status;
-
 	if (card->scr.sda_vsn < SCR_SPEC_VER_1)
 		return 0;
 
@@ -957,7 +956,6 @@
 			err = mmc_app_set_bus_width(card, MMC_BUS_WIDTH_4);
 			if (err)
 				goto free_card;
-
 			mmc_set_bus_width(host, MMC_BUS_WIDTH_4);
 		}
 	}
@@ -1165,6 +1163,7 @@
 		goto err;
 
 	mmc_release_host(host);
+	mdelay(100);
 	err = mmc_add_card(host->card);
 	mmc_claim_host(host);
 	if (err)
diff -uNra linux-3.0.82/drivers/mmc/core/sdio.c linux-3.0.82x/drivers/mmc/core/sdio.c
--- linux-3.0.82/drivers/mmc/core/sdio.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/mmc/core/sdio.c	2017-09-23 03:42:49.650676189 +0800
@@ -430,7 +430,7 @@
 		err = mmc_select_card(card);
 		if (err)
 			goto remove;
-	}
+ 	}
 
 	if (card->quirks & MMC_QUIRK_NONSTD_SDIO) {
 		/*
diff -uNra linux-3.0.82/drivers/mmc/core/sd_ops.c linux-3.0.82x/drivers/mmc/core/sd_ops.c
--- linux-3.0.82/drivers/mmc/core/sd_ops.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/mmc/core/sd_ops.c	2017-09-23 03:42:49.650676189 +0800
@@ -255,11 +255,12 @@
 	BUG_ON(!scr);
 
 	/* NOTE: caller guarantees scr is heap-allocated */
-
-	err = mmc_app_cmd(card->host, card);
+	/* dbg-yg  ls1c not support this cmd */
+/* 
+	err = mmc_app_cmd(card->host, card); 
 	if (err)
 		return err;
-
+*/
 	/* dma onto stack is unsafe/nonportable, but callers to this
 	 * routine normally provide temporary on-stack buffers ...
 	 */
@@ -284,9 +285,11 @@
 
 	mmc_set_data_timeout(&data, card);
 
-	mmc_wait_for_req(card->host, &mrq);
-
-	memcpy(scr, data_buf, sizeof(card->raw_scr));
+	/* changed  because  ls1c is not support acmd51*/
+//	mmc_wait_for_req(card->host, &mrq);
+	scr[0] = 0x00f00200;
+	scr[1] = 0x02358000;
+//	memcpy(scr, data_buf, sizeof(card->raw_scr));
 	kfree(data_buf);
 
 	if (cmd.error)
@@ -315,7 +318,7 @@
 
 	mode = !!mode;
 	value &= 0xF;
-
+	printk("dbg-yg enter mmc_sd_switch().......................\r\n");
 	mrq.cmd = &cmd;
 	mrq.data = &data;
 
@@ -353,13 +356,27 @@
 	struct mmc_data data = {0};
 	struct scatterlist sg;
 
+	/************* add dbg-yg **********/ 	
+	unsigned int buf[64];
+	int i;
+	for (i=0; i<64; i++)
+		buf[i] = 0;
+	buf[58]=0x10;
+	buf[55]=0x2;
+	buf[54]=0x1;
+	buf[53]=0x70;
+	buf[51]=0x07;
+	buf[50]=0x1d;
+	memcpy(ssr,buf,64);
+	/****************************************/
 	BUG_ON(!card);
 	BUG_ON(!card->host);
 	BUG_ON(!ssr);
 
 	/* NOTE: caller guarantees ssr is heap-allocated */
 
-	err = mmc_app_cmd(card->host, card);
+//	err = mmc_app_cmd(card->host, card);
+	err = 0;  //dbg-yg
 	if (err)
 		return err;
 
@@ -380,7 +397,7 @@
 
 	mmc_set_data_timeout(&data, card);
 
-	mmc_wait_for_req(card->host, &mrq);
+//	mmc_wait_for_req(card->host, &mrq); //dbg-yg ls1c not support  acmd13
 
 	if (cmd.error)
 		return cmd.error;
diff -uNra linux-3.0.82/drivers/mmc/host/Kconfig linux-3.0.82x/drivers/mmc/host/Kconfig
--- linux-3.0.82/drivers/mmc/host/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/mmc/host/Kconfig	2017-09-23 03:42:49.650676189 +0800
@@ -429,6 +429,17 @@
 
 endchoice
 
+config MMC_LS1C
+	tristate "Loongson LS1C SD/MMC Card Interface support"
+	depends on LS1C_MACH
+	help
+	  This selects a driver for the MCI interface found in
+          Loongson's LS1C CPUs.
+	  If you have a board based on one of those and a MMC/SD
+	  slot, say Y or M here.
+
+	  If unsure, say N.
+
 config MMC_SDRICOH_CS
 	tristate "MMC/SD driver for Ricoh Bay1Controllers (EXPERIMENTAL)"
 	depends on EXPERIMENTAL && PCI && PCMCIA
diff -uNra linux-3.0.82/drivers/mmc/host/ls1cmci.c linux-3.0.82x/drivers/mmc/host/ls1cmci.c
--- linux-3.0.82/drivers/mmc/host/ls1cmci.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/mmc/host/ls1cmci.c	2017-09-23 03:42:49.654676176 +0800
@@ -0,0 +1,1586 @@
+/*
+ *  linux/drivers/mmc/ls1cmci.h - Samsung ls1c MCI driver
+ *
+ *  Copyright (C) 2004-2006 maintech GmbH, Thomas Kleffel <tk@maintech.de>
+ *
+ * Current driver maintained by Ben Dooks and Simtec Electronics
+ *  Copyright (C) 2008 Simtec Electronics <ben-linux@fluff.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/dma-mapping.h>
+#include <linux/clk.h>
+#include <linux/mmc/host.h>
+#include <linux/platform_device.h>
+#include <linux/cpufreq.h>
+#include <linux/debugfs.h>
+#include <linux/seq_file.h>
+#include <linux/gpio.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/delay.h>
+/*
+#include <mach/dma.h>
+
+#include <mach/regs-sdi.h>
+#include <mach/regs-gpio.h>
+
+#include <plat/mci.h>
+*/
+#include "ls1cmci.h"
+
+#define DRIVER_NAME "ls1c_sdio"
+
+#define dbg-yg  0
+
+
+
+enum dbg_channels {
+	dbg_err   = (1 << 0),
+	dbg_debug = (1 << 1),
+	dbg_info  = (1 << 2),
+	dbg_irq   = (1 << 3),
+	dbg_sg    = (1 << 4),
+	dbg_dma   = (1 << 5),
+	dbg_pio   = (1 << 6),
+	dbg_fail  = (1 << 7),
+	dbg_conf  = (1 << 8),
+};
+
+static const int dbgmap_err   = dbg_fail;
+static const int dbgmap_info  = dbg_info | dbg_conf;
+static const int dbgmap_debug = dbg_err | dbg_debug;
+
+#define dbg(host, channels, args...)		  \
+	do {					  \
+	if (dbgmap_err & channels) 		  \
+		dev_err(&host->pdev->dev, args);  \
+	else if (dbgmap_info & channels)	  \
+		dev_info(&host->pdev->dev, args); \
+	else if (dbgmap_debug & channels)	  \
+		dev_dbg(&host->pdev->dev, args);  \
+	} while (0)
+#if 0
+static struct ls1c_dma_client ls1cmci_dma_client = {
+	.name		= "ls1c_sdio",
+};
+#endif
+static void finalize_request(struct ls1cmci_host *host);
+static void ls1cmci_send_request(struct mmc_host *mmc);
+static void ls1cmci_reset(struct ls1cmci_host *host);
+
+#ifdef CONFIG_MMC_DEBUG
+
+static void dbg_dumpregs(struct ls1cmci_host *host, char *prefix)
+{
+	u32 con, pre, cmdarg, cmdcon, cmdsta, r0, r1, r2, r3, timer, bsize;
+	u32 datcon, datcnt, datsta, fsta, imask;
+
+	con 	= readl(host->base + ls1c_SDICON);
+	pre 	= readl(host->base + ls1c_SDIPRE);
+	cmdarg 	= readl(host->base + ls1c_SDICMDARG);
+	cmdcon 	= readl(host->base + ls1c_SDICMDCON);
+	cmdsta 	= readl(host->base + ls1c_SDICMDSTAT);
+	r0 	= readl(host->base + ls1c_SDIRSP0);
+	r1 	= readl(host->base + ls1c_SDIRSP1);
+	r2 	= readl(host->base + ls1c_SDIRSP2);
+	r3 	= readl(host->base + ls1c_SDIRSP3);
+	timer 	= readl(host->base + ls1c_SDITIMER);
+	bsize 	= readl(host->base + ls1c_SDIBSIZE);
+	datcon 	= readl(host->base + ls1c_SDIDCON);
+	datcnt 	= readl(host->base + ls1c_SDIDCNT);
+	datsta 	= readl(host->base + ls1c_SDIDSTA);
+	fsta 	= readl(host->base + ls1c_SDIFSTA);
+	imask   = readl(host->base + host->sdiimsk);
+
+	dbg(host, dbg_debug, "%s  CON:[%08x]  PRE:[%08x]  TMR:[%08x]\n",
+				prefix, con, pre, timer);
+
+	dbg(host, dbg_debug, "%s CCON:[%08x] CARG:[%08x] CSTA:[%08x]\n",
+				prefix, cmdcon, cmdarg, cmdsta);
+
+	dbg(host, dbg_debug, "%s DCON:[%08x] FSTA:[%08x]"
+			       " DSTA:[%08x] DCNT:[%08x]\n",
+				prefix, datcon, fsta, datsta, datcnt);
+
+	dbg(host, dbg_debug, "%s   R0:[%08x]   R1:[%08x]"
+			       "   R2:[%08x]   R3:[%08x]\n",
+				prefix, r0, r1, r2, r3);
+}
+
+static void prepare_dbgmsg(struct ls1cmci_host *host, struct mmc_command *cmd,
+			   int stop)
+{
+	snprintf(host->dbgmsg_cmd, 300,
+		 "#%u%s op:%i arg:0x%08x flags:0x08%x retries:%u",
+		 host->ccnt, (stop ? " (STOP)" : ""),
+		 cmd->opcode, cmd->arg, cmd->flags, cmd->retries);
+
+	if (cmd->data) {
+		snprintf(host->dbgmsg_dat, 300,
+			 "#%u bsize:%u blocks:%u bytes:%u",
+			 host->dcnt, cmd->data->blksz,
+			 cmd->data->blocks,
+			 cmd->data->blocks * cmd->data->blksz);
+	} else {
+		host->dbgmsg_dat[0] = '\0';
+	}
+}
+
+static void dbg_dumpcmd(struct ls1cmci_host *host, struct mmc_command *cmd,
+			int fail)
+{
+	unsigned int dbglvl = fail ? dbg_fail : dbg_debug;
+
+	if (!cmd)
+		return;
+
+	if (cmd->error == 0) {
+		dbg(host, dbglvl, "CMD[OK] %s R0:0x%08x\n",
+			host->dbgmsg_cmd, cmd->resp[0]);
+	} else {
+		dbg(host, dbglvl, "CMD[ERR %i] %s Status:%s\n",
+			cmd->error, host->dbgmsg_cmd, host->status);
+	}
+
+	if (!cmd->data)
+		return;
+
+	if (cmd->data->error == 0) {
+		dbg(host, dbglvl, "DAT[OK] %s\n", host->dbgmsg_dat);
+	} else {
+		dbg(host, dbglvl, "DAT[ERR %i] %s DCNT:0x%08x\n",
+			cmd->data->error, host->dbgmsg_dat,
+			readl(host->base + ls1c_SDIDCNT));
+	}
+}
+#else
+static void dbg_dumpcmd(struct ls1cmci_host *host,
+			struct mmc_command *cmd, int fail) { }
+
+static void prepare_dbgmsg(struct ls1cmci_host *host, struct mmc_command *cmd,
+			   int stop) { }
+
+static void dbg_dumpregs(struct ls1cmci_host *host, char *prefix) { }
+
+#endif /* CONFIG_MMC_DEBUG */
+
+
+/**********************************************************************************************************/
+/**********************************************************************************************************/
+/*********************************  ls1c-sdio-start ***
+ * *************************************************************************/
+#define SDIO_DEV_ADDR   0x1fe6c040
+
+
+/**
+ * ls1cmci_enable_irq - enable IRQ, after having disabled it.
+ * @host: The device state.
+ * @more: True if more IRQs are expected from transfer.
+ *
+ * Enable the main IRQ if needed after it has been disabled.
+ *
+ * The IRQ can be one of the following states:
+ *	- disabled during IDLE
+ *	- disabled whilst processing data
+ *	- enabled during transfer
+ *	- enabled whilst awaiting SDIO interrupt detection
+ */
+static void ls1cmci_enable_irq(struct ls1cmci_host *host, bool more)
+{
+	unsigned long flags;
+	bool enable = false;
+
+	local_irq_save(flags);
+
+	host->irq_enabled = more;
+	host->irq_disabled = false;
+
+	enable = more | host->sdio_irqen;
+
+	if (host->irq_state != enable) {
+		host->irq_state = enable;
+
+		if (enable)
+			enable_irq(host->irq);
+		else
+			disable_irq(host->irq);
+	}
+
+	local_irq_restore(flags);
+}
+
+
+static inline bool ls1cmci_host_usedma(struct ls1cmci_host *host)
+{
+	return true;
+/*	
+#ifdef CONFIG_MMC_LS1C_PIO
+	return false;
+#elif defined(CONFIG_MMC_LS1C_DMA)
+	return true;
+#else
+	return host->dodma;
+#endif
+*/
+}
+
+
+static void ls1cmci_check_sdio_irq(struct ls1cmci_host *host)
+{
+	if (host->sdio_irqen) {
+		if (gpio_get_value(84) == 0) {
+			printk(KERN_DEBUG "%s: signalling irq\n", __func__);
+			mmc_signal_sdio_irq(host->mmc);
+		}
+	}
+}
+
+/***************************************************************************
+ * Description:
+ *          
+ * Version : 1.00
+ * Author  : zhanghualiang
+ * Language: C
+ * Date    : 2013-07-01
+ ***************************************************************************/
+
+static void ls1cmci_disable_irq(struct ls1cmci_host *host, bool transfer)
+{
+	unsigned long flags;
+
+	local_irq_save(flags);
+
+	//printk(KERN_DEBUG "%s: transfer %d\n", __func__, transfer);
+	host->irq_disabled = transfer;
+
+	if (transfer && host->irq_state) {
+		host->irq_state = false;
+		disable_irq(host->irq);
+	}
+	local_irq_restore(flags);
+}
+
+
+/***************************************************************************
+ * Description:
+ *          
+ * Version : 1.00
+ * Author  : Sunyoung 
+ * Language: C
+ * Date    : 2013-06-20
+ ***************************************************************************/
+
+static void ls1cmci_enable_sdio_irq(struct mmc_host *mmc, int enable)
+{
+	struct ls1cmci_host *host = mmc_priv(mmc);
+	unsigned long flags;
+	u32 con;
+#if 1
+	local_irq_save(flags);
+
+	con = readl(host->base + SDICON);
+	host->sdio_irqen = enable;
+
+	if (enable == host->sdio_irqen)
+		goto same_state;
+
+	if (enable) {
+		//con |= INT0_EN_SDIOIRQ;
+		//enable_imask(host, SDIIMSK_SDIOIRQ);
+		*(volatile unsigned int *)(0xbfd01044) |= 0x1 << 31;  //int0_en bit[31]  //sdio
+		writel(readl(0xbfd01044)|(0x1 << 31),0xbfd01044);	
+
+		if (!host->irq_state && !host->irq_disabled) {
+			host->irq_state = true;
+			enable_irq(host->irq);
+		}
+	} else {
+
+		writel(readl(0xbfd01044)&(~(0x1 << 31)),0xbfd01044);	
+//		disable_imask(host, ls1c_SDIIMSK_SDIOIRQ);
+//		con &= ~ls1c_SDICON_SDIOIRQ;
+
+		if (!host->irq_enabled && host->irq_state) {
+			disable_irq_nosync(host->irq);
+			host->irq_state = false;
+		}
+	}
+//	writel(con, host->base + ls1c_SDICON);
+
+ same_state:
+	local_irq_restore(flags);
+
+	ls1cmci_check_sdio_irq(host);
+#endif
+}
+
+
+
+
+static inline void clear_imask(struct ls1cmci_host *host)
+{
+	u32 mask = readl(host->base + host->sdiimsk);
+
+	/* preserve the SDIO IRQ mask state */
+//	mask &= SDIIMSK_SDIOIRQ;
+	writel(mask, host->base + host->sdiimsk);
+}
+
+
+
+/***************************************************************************
+ * Description:  call by pio_tasklet()
+ *      
+ * Version : 1.00
+ * Author  : Sunyoung 
+ * Language: C
+ * Date    : 2013-11-21
+ ***************************************************************************/
+static void finalize_request(struct ls1cmci_host *host)
+{
+	struct mmc_request *mrq = host->mrq;
+	struct mmc_command *cmd;
+	int debug_as_failure = 0;
+//	printk(" dbg-yg ======================> finalize_request().............\r\n");
+	if (host->complete_what != COMPLETION_FINALIZE)
+		return;
+
+//	printk(" dbg-yg ======================> 1 .............\r\n");
+	if (!mrq)
+		return;
+	cmd = host->cmd_is_stop ? mrq->stop : mrq->cmd;
+
+	if (cmd->data && (cmd->error == 0) &&
+	    (cmd->data->error == 0)) {
+		if (ls1cmci_host_usedma(host) && (!host->dma_complete)) {
+			dbg(host, dbg_dma, "DMA Missing (%d)!\n",
+			    host->dma_complete);
+			return;
+		}
+	}
+
+//	printk(" dbg-yg ======================> 2 .............\r\n");
+	/* Read response from controller. */
+	cmd->resp[0] = readl(host->base + SDIRSP0);
+	cmd->resp[1] = readl(host->base + SDIRSP1);
+	cmd->resp[2] = readl(host->base + SDIRSP2);
+	cmd->resp[3] = readl(host->base + SDIRSP3);
+
+//	writel(host->prescaler, host->base + S3C2410_SDIPRE);
+
+	if (cmd->error)
+		debug_as_failure = 1;
+
+	if (cmd->data && cmd->data->error)
+		debug_as_failure = 1;
+
+//	dbg_dumpcmd(host, cmd, debug_as_failure);
+
+	/* Cleanup controller */
+	writel(0, host->base + SDICMDARG);
+//	writel(SDIDCON_STOP, host->base + SDIDCON);
+	writel(0, host->base + SDICMDCON);
+	clear_imask(host);
+
+	if (cmd->data && cmd->error)
+		cmd->data->error = cmd->error;
+
+	if (cmd->data && cmd->data->stop && (!host->cmd_is_stop)) {
+		host->cmd_is_stop = 1;
+		ls1cmci_send_request(host->mmc);
+		return;
+	}
+
+//	printk(" dbg-yg ======================> 3 .............\r\n");
+	/* If we have no data transfer we are finished here */
+	if (!mrq->data)
+		goto request_done;
+
+//	printk(" dbg-yg ======================> 4 .............\r\n");
+	/* Calculate the amout of bytes transfer if there was no error */
+	if (mrq->data->error == 0) {
+		mrq->data->bytes_xfered =
+			(mrq->data->blocks * mrq->data->blksz);
+//		printk(" dbg-yg =============> mrq->data->bytes_xfered = %d ...\r\n", mrq->data->bytes_xfered);
+	} else {
+		mrq->data->bytes_xfered = 0;
+	}
+
+	/* If we had an error while transferring data we flush the
+	 * DMA channel and the fifo to clear out any garbage. */
+	if (mrq->data->error != 0) {
+		if (ls1cmci_host_usedma(host))
+		//	s3c2410_dma_ctrl(host->dma, S3C2410_DMAOP_FLUSH);
+			printk(" dbg-yg =============> ls1cmci dma data error!\r\n");
+#if 0
+		if (host->is2440) {
+			/* Clear failure register and reset fifo. */
+			writel(S3C2440_SDIFSTA_FIFORESET |
+			       S3C2440_SDIFSTA_FIFOFAIL,
+			       host->base + S3C2410_SDIFSTA);
+		} else {
+			u32 mci_con;
+
+			/* reset fifo */
+			mci_con = readl(host->base + S3C2410_SDICON);
+			mci_con |= S3C2410_SDICON_FIFORESET;
+
+			writel(mci_con, host->base + S3C2410_SDICON);
+		}
+#endif
+	}
+
+request_done:
+	host->complete_what = COMPLETION_NONE;
+	host->mrq = NULL;
+
+//	ls1cmci_check_sdio_irq(host);
+	mmc_request_done(host->mmc, mrq);
+//	printk(" finalize request ==================================================end !\r\n");
+}   
+
+
+
+/***************************************************************************
+ * Description:  sdio irq tasklet
+ *          
+ * Version : 1.00
+ * Author  : Sunyoung 
+ * Language: C
+ * Date    : 2013-11-21
+ ***************************************************************************/
+
+
+static void pio_tasklet(unsigned long data)
+{
+	struct ls1cmci_host *host = (struct ls1cmci_host *) data;
+
+	ls1cmci_disable_irq(host, true);
+	//printk(" dbg-yg .....enter pio_tasklet()........\r\n");
+
+/*
+	if (host->pio_active == XFER_WRITE)
+		do_pio_write(host);
+
+	if (host->pio_active == XFER_READ)
+		do_pio_read(host);
+*/
+	if (host->complete_what == COMPLETION_FINALIZE) {
+	//	printk(" host->complete_whta == COMPLETION_FINALIZE\r\n");
+		clear_imask(host);
+		/*
+		if (host->pio_active != XFER_NONE) {
+			dbg(host, dbg_err, "unfinished %s "
+			    "- pio_count:[%u] pio_bytes:[%u]\n",
+			    (host->pio_active == XFER_READ) ? "read" : "write",
+			    host->pio_count, host->pio_bytes);
+
+			if (host->mrq->data)
+				host->mrq->data->error = -EINVAL;
+		}
+		*/
+		ls1cmci_enable_irq(host, false);
+		finalize_request(host);
+	} else
+		ls1cmci_enable_irq(host, true);
+	//printk(" ...................... finish pio_tasklet().................\r\n");
+}
+
+
+/***************************************************************************
+ * Description:
+ *          
+ * Version : 1.00
+ * Author  : Sunyoung_yg
+ * Language: C
+ * Date    : 2013-06-19
+ ***************************************************************************/
+ static irqreturn_t ls1cmci_irq(int irq, void *dev_id)
+{
+	struct ls1cmci_host *host = dev_id;
+	struct mmc_command *cmd;
+	u32 mci_csta, mci_dsta, mci_fsta, mci_dcnt, mci_imsk;
+	u32 mci_cclear = 0, mci_dclear;
+	unsigned long iflags;
+	
+//	spin_lock_irqsave(&host->complete_lock, iflags);
+//	printk("\r\n\r\nenter ===============================> ls1cmci_irq()\r\n");
+
+	mci_csta = readl(host->base + SDICMDSTA);
+	mci_imsk = readl(host->base + SDIINTMSK);
+	mci_dsta = readl(host->base + SDIDSTA);
+//	printk(" =========> dbg-yg ls1cmci_irq: sdio csta:0x%08x  dsta:0x%08x  imsk:0x%08x \r\n", mci_csta, mci_dsta, mci_imsk );
+
+
+	if ((host->complete_what == COMPLETION_NONE) ||
+	    (host->complete_what == COMPLETION_FINALIZE)) {
+		host->status = "nothing to complete";
+		clear_imask(host);
+		goto irq_out;
+	}
+//	printk("  ls1cmci_irq  1 \r\n");
+	if (!host->mrq) {
+		host->status = "no active mrq";
+		clear_imask(host);
+		goto irq_out;
+	}
+
+//	printk("  ls1cmci_irq  2 \r\n");
+	cmd = host->cmd_is_stop ? host->mrq->stop : host->mrq->cmd;
+/*	
+	//è‹¥æœ‰æ•°æ�®æ“�ä½œï¼Œéœ€è¦�ç­‰å¾… æ•°æ�®æ�¬è¿�å®Œæˆ�
+	while((mci_dsta = readl(host->base + SDIDSTA)) & 0x03);
+	mci_imsk = readl(host->base + SDIINTMSK);
+*/
+	if (!cmd) {
+		host->status = "no active cmd";
+		clear_imask(host);
+		goto irq_out;
+	}
+
+//	printk("  ls1cmci_irq  3 \r\n");
+	//if (mci_csta & SDICMDSTAT_CMDTIMEOUT) {
+	if (mci_imsk & SDIIMSK_CMDTIMEOUT) {
+		dbg(host, dbg_err, "CMDSTAT: error CMDTIMEOUT\n");
+		cmd->error = -ETIMEDOUT;
+		host->status = "error: command timeout";
+		goto fail_transfer;
+	}
+
+//	printk("  ls1cmci_irq  4 \r\n");
+//	if ((mci_csta & SDICMDSTAT_CMDSENT) {
+	if((mci_imsk & SDIIMSK_CMDSENT)){
+//		printk("  ls1cmci_irq  4-1 \r\n");
+		if (host->complete_what == COMPLETION_CMDSENT) {
+			host->status = "ok: command sent";
+			goto close_transfer;
+		}
+//		mci_cclear |= S3C2410_SDICMDSTAT_CMDSENT;
+	}
+
+//	printk("  ls1cmci_irq  5 \r\n");
+//	if (mci_csta & SDICMDSTAT_CRCFAIL) {
+	if (mci_imsk & SDIIMSK_RESPONSECRC){
+		if (cmd->flags & MMC_RSP_CRC) {
+			if (host->mrq->cmd->flags & MMC_RSP_136) {
+				dbg(host, dbg_irq,
+				    "fixup: ignore CRC fail with long rsp\n");
+			} else {
+				/* note, we used to fail the transfer
+				 * here, but it seems that this is just
+				 * the hardware getting it wrong.
+				 *
+				 * cmd->error = -EILSEQ;
+				 * host->status = "error: bad command crc";
+				 * goto fail_transfer;
+				*/
+			}
+		}
+	//	mci_cclear |= S3C2410_SDICMDSTAT_CRCFAIL;
+	}
+
+//	if ((mci_csta & SDICMDSTAT_RSPFIN)) {
+	if ((mci_imsk & SDIIMSK_CMDSENT)) {
+		if (host->complete_what == COMPLETION_RSPFIN) {
+			host->status = "ok: command response received";
+//			printk(" mci_csta: 0x%08x ... status: %s ...\r\n", mci_csta, host->status);
+			goto close_transfer;
+		}
+//		printk("  ls1cmci_irq  6 \r\n");
+		if (host->complete_what == COMPLETION_XFERFINISH_RSPFIN)
+			host->complete_what = COMPLETION_XFERFINISH;
+	//	mci_cclear |= S3C2410_SDICMDSTAT_RSPFIN;
+	}
+	
+	if (!cmd->data)
+		goto clear_status_bits;
+
+//	printk("  ls1cmci_irq  7 \r\n");
+//	if (mci_dsta & SDIDSTA_RXCRCFAIL) {
+	if (mci_imsk & SDIIMSK_RXCRCFAIL) {
+		dbg(host, dbg_err, "bad data crc (outgoing)\n");
+		cmd->data->error = -EILSEQ;
+		host->status = "error: bad data crc (outgoing)";
+		goto fail_transfer;
+	}
+
+//	printk("  ls1cmci_irq  8 \r\n");
+	//if (mci_dsta & SDIDSTA_CRCFAIL) {
+	if (mci_imsk & SDIIMSK_TXCRCFAIL) {
+		dbg(host, dbg_err, "bad data crc (incoming)\n");
+		cmd->data->error = -EILSEQ;
+		host->status = "error: bad data crc (incoming)";
+		goto fail_transfer;
+	}
+
+//	printk("  ls1cmci_irq  9 \r\n");
+	//if (mci_dsta & SDIDSTA_DATATIMEOUT) {
+	if (mci_imsk & SDIIMSK_DATATIMEOUT) {
+		dbg(host, dbg_err, "data timeout\n");
+		cmd->data->error = -ETIMEDOUT;
+		host->status = "error: data timeout";
+		goto fail_transfer;
+	}
+
+//	printk("  ls1cmci_irq  10 \r\n");
+
+	//if ((mci_dsta & SDIDSTA_XFERFINISH) || (mci_imsk & SDIIMSK_DATAFINISH )){
+	if ((mci_imsk & SDIIMSK_DATAFINISH )){
+		if (host->complete_what == COMPLETION_XFERFINISH) {
+			host->status = "ok: data transfer completed";
+			host->dma_complete = 1;
+		//	host->complete_what = COMPLETION_FINALIZE;
+			goto close_transfer;
+		}
+
+//		printk("  ls1cmci_irq  11 \r\n");
+		if (host->complete_what == COMPLETION_XFERFINISH_RSPFIN)
+			host->complete_what = COMPLETION_RSPFIN;
+//		mci_dclear |= S3C2410_SDIDSTA_XFERFINISH;
+	}
+	//mci_dcnt = readl(host->base + SDIDCNT);
+
+//	printk(" resp[0]:0x%08x   resp[1]:0x%08x  resp[2]:0x%08x  resp[3]:0x%08x ...\r\n", cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
+
+//	printk("  no int????????????????????????\r\n");
+
+#if 0	
+	if (mci_csta == 0x1ff) {
+//		printk(" 2 \r\n");
+		 cmd->error = EPFNOSUPPORT;
+		 host->status = "error: not support";
+	mmc_request_done(host->mmc, host->mrq);
+			return IRQ_HANDLED;
+	}
+	if (mci_imsk & (1 << 7)) {   //cmd time out
+
+		printk(" \r\n cmd time out \r\n\r\n");
+		dbg(host, dbg_err, "CMDSTAT: error CMDTIMEOUT\n");
+		cmd->error = ETIMEDOUT;
+		host->status = "error: command timeout";
+		mmc_request_done(host->mmc, host->mrq);
+	//	printk(" \r\n return \r\n\r\n");
+			return IRQ_HANDLED;
+	}
+#endif
+#if 0
+	mci_csta = readl(host->base + SDICMDSTA);
+	mci_imsk = readl(host->base + SDIINTMSK);
+	mci_dsta = readl(host->base + SDIDSTA);
+#endif
+//	printk(" end =========> dbg-yg ls1cmci_irq: sdio csta:0x%08x  dsta:0x%08x  imsk:0x%08x \r\n", mci_csta, mci_dsta, mci_imsk );
+	
+
+clear_status_bits:
+//	writel(mci_cclear, host->base + S3C2410_SDICMDSTAT);
+//	writel(mci_dclear, host->base + S3C2410_SDIDSTA);
+
+	goto irq_out;
+
+fail_transfer:
+	host->pio_active = XFER_NONE;
+
+close_transfer:
+	host->complete_what = COMPLETION_FINALIZE;
+
+	writel(mci_imsk, host->base + SDIINTMSK);  //write "1" clear  imsk ,
+	clear_imask(host);
+	tasklet_schedule(&host->pio_tasklet);
+//	printk(" host->status : %s ...\r\n", host->status);
+	goto irq_out;
+
+irq_out:
+//	dbg(host, dbg_irq,	    "csta:0x%08x dsta:0x%08x fsta:0x%08x dcnt:0x%08x status:%s.\n", mci_csta, mci_dsta, mci_fsta, mci_dcnt, host->status);
+//	printk(" irq_out....\r\n");	
+//	spin_unlock_irqrestore(&host->complete_lock, iflags);
+
+	writel(mci_imsk, host->base + SDIINTMSK);  //write "1" clear  imsk ,
+//	printk(" after clear imsk: 0x%08x ...\r\n", readl(host->base + SDIINTMSK));	
+//	spin_unlock_irqrestore(&host->complete_lock, iflags);
+	return IRQ_HANDLED;
+
+}
+
+
+
+
+
+/*******************************************************/
+
+static void ls1cmci_set_clk(struct ls1cmci_host *host, struct mmc_ios *ios)
+{
+	u32 mci_psc;
+//	printk(" in  ls1cmci_set_clk()...\r\n");
+	/* Set clock */
+	for (mci_psc = 0; mci_psc < 255; mci_psc++) {
+		host->real_rate = host->clk_rate / ((mci_psc+1));
+
+		if (host->real_rate <= ios->clock)
+			break;
+	}
+	printk(" in ls1cmci_set_clk() ...host->clk_rate:%d ...host->real_rate:%d\r\n",host->clk_rate,host->real_rate);
+	if (mci_psc > 255)
+		mci_psc = 255;
+
+	host->prescaler = mci_psc;
+	writel(host->prescaler, host->base + SDIPRE);
+//	printk("host->prescaler is :%d \r\n",host->prescaler);
+	/* If requested clock is 0, real_rate will be 0, too */
+	if (ios->clock == 0)
+		host->real_rate = 0;
+//	printk(" ios->clock:%d  \r\n",ios->clock);
+}
+
+
+
+static void ls1cmci_reset(struct ls1cmci_host *host)
+{
+	u32 con = readl(host->base + SDICON);
+
+	con |= SDICON_SDRESET;
+	writel(con, host->base + SDICON);
+	printk(" ls1cmci host reset()");
+}
+/************************************************************************/
+
+/************************************************/
+/**
+ *ls1c_dma_enqueue - set dma desc chain
+ *
+ *
+ */
+static void ls1c_dma_enqueue(int dma_num, int dma_len, struct ls1cmci_host *host, dma_addr_t addr, unsigned int size)
+{
+#if 0	
+	struct ls1c_dma_desc * dma_desc =  (struct ls1c_dma_desc *) (host->dma_send_phy_mem + (dma_num*0x40));
+	
+		dma_desc->order_addr =  (unsigned int ) (dma_desc + 0x40);
+		if ( dma_num == (dma_len - 1))
+			dma_desc->order_addr &= ~(1<<0);
+		else 
+			dma_desc->order_addr |= 1;  //next desc in effect
+		dma_desc->saddr = addr;
+		dma_desc->daddr  = SDIO_DEV_ADDR;
+		dma_desc->length = size/4;
+		dma_desc->step_length  = 0;   //??? question  ???
+		dma_desc->step_times = 1;   //???
+		dma_desc->cmd = 0x1000;  //  write deva
+#endif
+#if 0
+	struct ls1c_dma_desc * first_desc =  (struct ls1c_dma_desc *) host->dma_send_phy_mem;
+	unsigned int offset = dma_num * 0x40;
+
+		first_desc->order_addr + offset = first_desc + (offset + 0x40); //0x40 means low 6bit align
+		if ( dma_num == (dma_len - 1))
+			first_desc->order_addr + offset &= ~(1<<0);
+		else 
+			first_desc->order_addr + offset |= 1;  //next desc in effect
+		first_desc->saddr + offset = addr;
+		first_desc->daddr + offset = SDIO_DEV_ADDR;
+		first_desc->length + offset = size/4;
+		first_desc->step_length + offset = 0;   //??? question  ???
+		first_desc->step_times + offset = 1;   //???
+		first_desc->dma_cmd + offset = 0x1000;  //  write dev
+#endif 
+}
+
+
+static void ls1cmci_send_command(struct ls1cmci_host *host,
+					struct mmc_command *cmd)
+{
+	u32 ccon, imsk;
+/*
+	imsk  = ls1c_SDIIMSK_CRCSTATUS | ls1c_SDIIMSK_CMDTIMEOUT |
+		ls1c_SDIIMSK_RESPONSEND | ls1c_SDIIMSK_CMDSENT |
+		ls1c_SDIIMSK_RESPONSECRC;
+	enable_imask(host, imsk);
+*/
+//	printk(" enter ls1cmci_send_commend()...\r\n cmd_index:%d\r\n",cmd->opcode & SDICMDCON_INDEX);
+
+//	printk(" ls1c send cmd:%d .................\r\n", cmd->opcode);
+	if (cmd->data){
+		host->complete_what = COMPLETION_XFERFINISH_RSPFIN;
+	}
+	else if (cmd->flags & MMC_RSP_PRESENT)
+		host->complete_what = COMPLETION_RSPFIN;
+	else
+		host->complete_what = COMPLETION_CMDSENT;
+
+	writel(cmd->arg, host->base + SDICMDARG);
+//	printk("write  regs cmd->arg(08): 0x%08x...\r\n",cmd->arg);
+	ccon  = cmd->opcode & SDICMDCON_INDEX;
+	ccon |= SDICMDCON_SENDERHOST | SDICMDCON_CMDSTART;
+
+	if (cmd->flags & MMC_RSP_PRESENT)
+		ccon |= SDICMDCON_WAITRSP;
+
+	if (cmd->flags & MMC_RSP_136)
+		ccon |= SDICMDCON_LONGRSP;
+//	printk("dbg-yg  ls1cmci_send_command write  regs cmd_con(0c): 0x%08x...\r\n",ccon);
+	writel(ccon, host->base + SDICMDCON);
+//	printk("read  regs cmd_con(0c): 0x%08x...\r\n",readl(host->base+SDICMDCON ));
+}
+/*******************************************************************/
+#if 0
+static void ls1cmci_dma_setup(struct ls1cmci_host *host,
+			     enum ls1c_dmasrc source)
+{
+	static enum ls1c_dmasrc last_source = -1;
+	static int setup_ok;
+
+	if (last_source == source)
+		return;
+
+	last_source = source;
+
+	s3c2410_dma_devconfig(host->dma, source,
+			      host->mem->start + host->sdidata);
+
+	if (!setup_ok) {
+		ls1c_dma_config(host->dma, 4);
+		ls1c_dma_set_buffdone_fn(host->dma,
+					    ls1cmci_dma_done_callback);
+		ls1c_dma_setflags(host->dma, ls1c_DMAF_AUTOSTART);
+		setup_ok = 1;
+	}
+}
+#endif
+
+static int ls1cmci_prepare_dma(struct ls1cmci_host *host, struct mmc_data *data)
+{
+	int dma_len, i, j;
+	int rw = data->flags & MMC_DATA_WRITE;
+	unsigned int  dcon;
+	unsigned char *ptr;
+
+//	printk(" enter ls1cmci_prepare_dma().......\r\n");    //dbg-yg
+//	writel(data->blksz, host->base + SDIBSIZE);    //write in  setup_data();
+	dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
+			     rw ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
+//	printk(" dma_len:%d   blksz:0x%08x   blocks:%d  \r\n",dma_len, data->blksz, data->blocks);    //dbg-yg
+	if (dma_len == 0)
+		return -ENOMEM;
+
+	host->dma_complete = 0;
+	host->dmatogo = dma_len;
+	for (i = 0; i < dma_len; i++) {
+		host->sg_cpu[i].length = sg_dma_len(&data->sg[i])  / 4;  //unit is  word
+//		printk(" dbg-yg  sg_dma_len :0x%08x ...\r\n",sg_dma_len(&data->sg[i]));
+		host->sg_cpu[i].step_length = 0;
+		host->sg_cpu[i].step_times = data->blocks;
+		host->sg_cpu[i].saddr = sg_dma_address(&data->sg[i]);
+		host->sg_cpu[i].daddr = SDIO_DEV_ADDR;
+//		printk(" dbg-yg  =================> sg_cpu[%d].saddr:0x%08x ...\r\n", i, host->sg_cpu[i].saddr);
+		if (data->flags & MMC_DATA_READ) {						  //  dma read
+		    
+			host->sg_cpu[i].cmd = 0x1<<0;   //bit12:0(default) & disable dma int 
+	//		printk(">>>>>>>>>>>read sd to sg_cpu[%d].saddr:0x%08x\r\n", i, host->sg_cpu[i].saddr);
+		#if  dbg-yg // dbg-yg  debug test sd card  read 	
+			ptr = (unsigned char *) (host->sg_cpu[i].saddr|0xa0000000);
+			for( j=0; j<20; j++)
+			{
+				if (j % 16 == 0)  printk("\r\n");
+				printk(" %3x   ",(ptr[j]));
+			}
+			printk("\r\n");
+		#endif	
+		} else {												  //  dma write
+			host->sg_cpu[i].cmd = ((0x1<<12) | (0x1<<0));   //ddr > dev  & disable dma int 
+#if dbg-yg
+			/*  watch the write data*/
+			//printk(">>>>>>>>>>>>write sd from sg_cpu[%d].saddr:0x%08x\r\n", i, host->sg_cpu[i].saddr);
+			ptr = (unsigned char *) (host->sg_cpu[i].saddr|0xa0000000);
+			for( j=0; j<20; j++)
+			{
+				if (j%16 == 0)  printk("\r\n");
+				printk(" %3x   ",(ptr[j]));
+			}
+			printk("\r\n");
+#endif 
+		}
+		
+
+		host->sg_cpu[i].order_addr = host->sg_dma+(i+1)*sizeof(struct ls1c_dma_desc);
+		host->sg_cpu[i].order_addr |= 0x1<<0;   //next desc in effect  
+	}
+		host->sg_cpu[dma_len-1].order_addr &= ~(0x1<<0);  // last order no effect 
+
+		*(volatile unsigned int *) (0xbfd01160) = (host->sg_dma | 0x8 | 0x1);    //dma start  use dma1
+//	printk("host->sg_cpu[dma_len-1].order_addr:0x%08x ...\r\n",host->sg_cpu[dma_len-1].order_addr);
+
+#if 0
+		dbg(host, dbg_dma, "enqueue %i: %08x@%u\n", i,
+		    sg_dma_address(&data->sg[i]),
+		    sg_dma_len(&data->sg[i]));
+	    ls1c_dma_enqueue(i, dma_len, host,sg_dma_address(&data->sg[i]),
+							   sg_dma_len(&data->sg[i]));
+	}
+#endif
+/*		if (res) {
+			ls1c_dma_ctrl(host->dma, ls1c_DMAOP_FLUSH);
+			return -EBUSY;
+		}
+*/
+
+	return 0;
+}
+
+
+
+static int ls1cmci_setup_data(struct ls1cmci_host *host, struct mmc_data *data)
+{
+	u32 dcon, imsk, stoptries = 3, tmp;
+
+	/* write DCON register */
+
+	if (!data) {
+		writel(0, host->base + SDIDCON);
+		return 0;
+	}
+
+	if ((data->blksz & 3) != 0) {
+		/* We cannot deal with unaligned blocks with more than
+		 * one block being transferred. */
+
+		if (data->blocks > 1) {
+			pr_warning("%s: can't do non-word sized block transfers (blksz %d)\n", __func__, data->blksz);
+			return -EINVAL;
+		}
+	}
+//	printk(" dma setup data ,sdi data stat: 0x%08x  ...\r\n" , readl(host->base + SDIDSTA));
+#if 0
+	while (readl(host->base + SDIDSTA) & (SDIDSTA_TXDATAON | SDIDSTA_RXDATAON)) 
+	{
+		dbg(host, dbg_err,"mci_setup_data() transfer stillin progress.\n");
+	//	writel(SDIDCON_STOP, host->base + SDIDCON);
+		ls1cmci_reset(host);
+		if ((stoptries--) == 0) {
+			dbg_dumpregs(host, "DRF");
+			return -EINVAL;
+		}
+	}
+#endif
+	dcon  = data->blocks & SDIDCON_BLKNUM_MASK;
+	if (ls1cmci_host_usedma(host)){
+		tmp = readl(MISC_CTRL);
+		tmp &= ~(0x3 << 23);
+		writel(tmp | (2<<23), MISC_CTRL);  // use dma1
+	}
+	if (host->bus_width == MMC_BUS_WIDTH_4){
+		printk(" sdio  bus width : 4 \r\n");
+		dcon |= SDIDCON_WIDEBUS;    //bit16
+	}
+/*
+	if (!(data->flags & MMC_DATA_STREAM))
+		dcon |= SDIDCON_BLOCKMODE;
+*/
+/*	if (data->flags & MMC_DATA_WRITE) {
+		dcon |= SDIDCON_TXAFTERRESP;
+		dcon |= SDIDCON_XFER_TXSTART;
+	}
+
+	if (data->flags & MMC_DATA_READ) {
+		dcon |= SDIDCON_RXAFTERCMD;
+		dcon |= SDIDCON_XFER_RXSTART;
+	}
+
+	if (host->is) {
+		dcon |= SDIDCON_DS_WORD;
+		dcon |= SDIDCON_DATSTART;
+	}
+*/
+	dcon |= 3 << 14;  //bit15:dma_en bit14:  start
+	//printk(" sdi dat con:0x%08x ...\r\n",dcon);
+	writel(dcon, host->base + SDIDCON);
+	writel(data->blksz, host->base + SDIBSIZE);  //block  size 
+	//printk("block size:%d \r\n", data->blksz);
+	/* write TIMER register */
+	writel(0x007FFFFF, host->base + SDITIMER);
+
+		/* FIX: set slow clock to prevent timeouts on read */
+//	if (data->flags & MMC_DATA_READ)  //???
+	//	writel(0xFF, host->base + SDIPRE);
+
+	return 0;
+}
+
+
+/*********************************************************************************/
+static void ls1cmci_send_request(struct mmc_host *mmc)
+{
+	int res;
+	struct ls1cmci_host *host = mmc_priv(mmc);
+	struct mmc_request *mrq = host->mrq;
+	struct mmc_command *cmd = host->cmd_is_stop ? mrq->stop : mrq->cmd;
+	host->ccnt++;
+//	printk(" send request:  cmd_index:%d ...\r\n", cmd->opcode);
+	if (cmd->data) {
+		host->dcnt++;
+
+			res = ls1cmci_setup_data(host, cmd->data);
+			if (res) {
+				dbg(host, dbg_err, "setup data error %d\n", res);
+				cmd->error = res;
+				cmd->data->error = res;
+				mmc_request_done(mmc, mrq);
+				return;
+			}
+			res = ls1cmci_prepare_dma(host, cmd->data);
+			if (res) {
+				dbg(host, dbg_err, "data prepare error %d\n", res);
+				cmd->error = res;
+				cmd->data->error = res;
+				mmc_request_done(mmc, mrq);
+				return;
+			}
+	}
+
+	/* Send command */
+	ls1cmci_send_command(host, cmd);
+//		ls1c_dma_ctrl(host->dma, DMAOP_START);
+	/* Enable Interrupt */
+	ls1cmci_enable_irq(host, true);
+}
+
+
+/***************************************************************************
+ * Description:
+ *          
+ * Version : 1.00
+ * Author  : Sunyoung 
+ * Language: C
+ * Date    : 2013-06-20
+ ***************************************************************************/
+
+static void ls1cmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
+{
+	struct ls1cmci_host *host = mmc_priv(mmc);
+	u32 mci_con, val;
+	/* Set the power state */
+#if 1
+	mci_con = readl(host->base + SDICON);
+
+	switch (ios->power_mode) {
+	case MMC_POWER_ON:
+	case MMC_POWER_UP:
+/* config mux: sdio mux with spi0,*/
+		val = readl(MISC_CTRL);
+		val &= ~(0x3 << 16);
+		val |= (1<<16);
+		*(volatile unsigned int *)(MISC_CTRL) = val;
+
+		*(volatile unsigned int *)(SDIO_BASE + SDICON) = 0x100; // reset sdio ctl reg
+		mdelay(100);
+		*(volatile unsigned int *)(SDIO_BASE + SDICON) = 0x01; // enable clk
+		*(volatile unsigned int *)(SDIO_BASE + SDIINTEN) = 0x1ff; // enable  int *************
+	//	*(volatile unsigned int *)(SDIO_BASE + SDIPRE) = 0x8000000f; // config pre_scale???
+	//  *(volatile unsigned int *)(SDIO_BASE + SDIPRE) = 2; // config pre_scale
+	
+	//**********************************************************
+
+	//	if (host->pdata->set_power)
+	//		host->pdata->set_power(ios->power_mode, ios->vdd);
+
+		break;
+
+	case MMC_POWER_OFF:
+	default:
+			mci_con |= SDICON_SDRESET;
+//		if (host->pdata->set_power)
+//			host->pdata->set_power(ios->power_mode, ios->vdd);
+		break;
+	}
+	ls1cmci_set_clk(host, ios);
+	/* Set CLOCK_ENABLE */
+	if (ios->clock)
+		mci_con |= SDICON_CLOCKTYPE;   //clk enable
+//	else
+//		mci_con &= ~SDICON_CLOCKTYPE;
+	writel(mci_con, host->base + SDICON);
+	if ((ios->power_mode == MMC_POWER_ON) ||
+	    (ios->power_mode == MMC_POWER_UP)) {
+		dbg(host, dbg_conf, "running at %lukHz (requested: %ukHz).\n",
+			host->real_rate/1000, ios->clock/1000);
+	} else {
+		dbg(host, dbg_conf, "powered down.\n");
+	}
+//	printk(" bus_width:%d \r\n",ios->bus_width);
+	host->bus_width = ios->bus_width;
+#endif	
+}
+/***************************************************************************
+ * Description:
+ *          
+ * Version : 1.00
+ * Author  : Sunyoung 
+ * Language: C
+ * Date    : 2013-06-20
+ ***************************************************************************/
+
+static int ls1cmci_card_present(struct mmc_host *mmc)
+{
+	struct ls1cmci_host *host = mmc_priv(mmc);
+	struct ls1c_mci_pdata *pdata = host->pdata;
+	int ret = 0;
+
+		return 1; // beijing banzi  dont have  detect io
+#if 1
+	if (pdata->no_detect)
+		return -ENOSYS;
+	ret = gpio_get_value(pdata->gpio_detect) ? 0 : 1;
+#endif
+	return ret ^ pdata->detect_invert;
+}
+
+/***************************************************************************
+ * Description:
+ *          
+ * Version : 1.00
+ * Author  : Sunyoung 
+ * Language: C
+ * Date    : 2013-06-20
+ ***************************************************************************/
+ static void ls1cmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
+{
+	struct ls1cmci_host *host = mmc_priv(mmc);
+//	printk(" enter ls1cmci_request()...\r\n");
+	host->status = "mmc request";
+	host->cmd_is_stop = 0;
+	host->mrq = mrq;
+
+	if (ls1cmci_card_present(mmc) == 0) {
+		dbg(host, dbg_err, "%s: no medium present\n", __func__);
+		host->mrq->cmd->error = -ENOMEDIUM;
+		mmc_request_done(mmc, mrq);
+	} else
+		ls1cmci_send_request(mmc);
+
+}
+
+/***************************************************************************
+ * Description:
+ *          
+ * Version : 1.00
+ * Author  : Sunyoung 
+ * Language: C
+ * Date    : 2013-06-20
+ ***************************************************************************/
+
+static int ls1cmci_get_ro(struct mmc_host *mmc)
+{
+	struct ls1cmci_host *host = mmc_priv(mmc);
+	struct ls1c_mci_pdata *pdata = host->pdata;
+	int ret=0;
+	//printk(" enter ls1cmci_get_ro()...\r\n");
+#if 0
+	if (pdata->no_wprotect)
+		return 0;
+
+	ret = gpio_get_value(pdata->gpio_wprotect) ? 1 : 0;
+	ret ^= pdata->wprotect_invert;
+#endif
+	return ret;
+}
+
+/***************************************************************************
+ * Description:
+ *          
+ * Version : 1.00
+ * Author  : Sunyoung_yg
+ * Language: C
+ * Date    : 2013-06-20
+ ***************************************************************************/
+ static struct mmc_host_ops ls1cmci_ops = {
+	.request	= ls1cmci_request,
+	.set_ios	= ls1cmci_set_ios,
+	.get_ro		= ls1cmci_get_ro,
+	.get_cd		= ls1cmci_card_present,
+	.enable_sdio_irq = ls1cmci_enable_sdio_irq,
+};
+/***************************************************************************
+ * Description:
+ *          
+ * Version : 1.00
+ * Author  : Sunyoung 
+ * Language: C
+ * Date    : 2013-06-19
+ ***************************************************************************/
+static irqreturn_t ls1cmci_irq_cd(int irq, void *dev_id)
+{
+	struct ls1cmci_host *host = (struct ls1cmci_host *)dev_id;
+	int ret;
+	dbg(host, dbg_irq, "card detect\n");
+	ret = gpio_get_value(84) ? 0 : 1;
+	if (ret)
+		printk(" sd card is detect\r\n");
+	else
+		printk("sd card is  removed\r\n");
+	mmc_detect_change(host->mmc, msecs_to_jiffies(500));
+
+	return IRQ_HANDLED;
+}
+ static irqreturn_t mci_detect_irq(int irq, void *dev_id)
+{
+	printk(" int mci_detect_irq() \r\n");
+	return IRQ_HANDLED;
+}
+
+/***************************************************************************
+ * Description:
+ *  
+ * Version : 1.00
+ * Author  : Sunyoung_yg 
+ * Language: C
+ * Date    : 2013-06-19
+ ***************************************************************************/
+
+static struct ls1c_mci_pdata ls1cmci_def_pdata = {
+	/* This is currently here to avoid a number of if (host->pdata)
+	 * checks. Any zero fields to ensure reasonable defaults are picked. */
+	 .no_wprotect = 1,
+	 .no_detect = 0,
+	 .gpio_detect = 84,
+};
+
+/***************************************************************************
+ * Description: probe()
+ *          
+ * Version : 1.00
+ * Author  : Sunyoung 
+ * Language: C
+ * Date    : 2013-06-19
+ ***************************************************************************/
+
+/* #################### probe #######################*/
+static int __devinit ls1cmci_probe(struct platform_device *pdev)
+{
+	struct ls1cmci_host *host;
+	struct mmc_host	*mmc;
+	int ret;
+	int i;
+	unsigned int tmp;
+	mmc = mmc_alloc_host(sizeof(struct ls1cmci_host), &pdev->dev);//* alloc a    mmc_host + ls1cmci_host  */ 
+	if (!mmc) {
+		ret = -ENOMEM;
+//		goto probe_out;
+	}
+
+	//config sdio use dma1, & spi0 pin.
+	tmp = *(volatile unsigned int *)(MISC_CTRL);
+	tmp &= ~(0x3<<23);
+	tmp &= ~(0x3<<16);
+	tmp |= (0x2<<23) | (0x1<<16);
+	*(volatile unsigned int *)(MISC_CTRL) = tmp;
+
+	tmp = *(volatile unsigned int *)(MISC_CTRL);
+	printk(" --------------------dbg-yg  misc_ctrl:0x%08x ....\r\n", tmp);
+//	*(volatile unsigned int *)(SDIO_BASE + SDICON) = 0x100; // reset sdio ctl reg
+	mdelay(1);
+
+//**********************************************************
+	
+//	printk(" config spi0 gpio mux to sdio\r\n");
+	/* config gpio mux */
+	*(volatile unsigned int *)(0xbfd011c8) |= (0x1f << (79-64));
+	*(volatile unsigned int *)(0xbfd011d8) &= ~(0x3f << (79-64));
+	*(volatile unsigned int *)(0xbfd011e8) &= ~(0x3f << (79-64));
+	*(volatile unsigned int *)(0xbfd011f8) &= ~(0x3f << (79-64));
+	
+	/* config gpio84 in INT mode */
+	*(volatile unsigned int *)(0xbfd011c8) &= ~(0x1 << (84-64));
+
+	*(volatile unsigned int *)(0xbfd010c8) |= (0x1 << (84-64)); //cfg enable
+	*(volatile unsigned int *)(0xbfd010d8) |= (0x1 << (84-64)); //input enable
+	*(volatile unsigned int *)(0xbfd010f8) |= (0x1 << (84-64)); //  output 1
+
+	*(volatile unsigned int *)(0xbfd010a4) |= (0x1 << (84-64)); //  int enable
+	*(volatile unsigned int *)(0xbfd010b4) |= (0x1 << (84-64));   // edge int
+	
+	/* sdio  int */	
+//	*(volatile unsigned int *)(0xbfd01054) |= (0x1 << (31));   // sdio edge triger
+	*(volatile unsigned int *)(0xbfd01050) |= (0x1 << (31));   // sdio high level triger | edge = raise edge triger
+
+//***********************************************************
+	*(volatile unsigned int *)(SDIO_BASE + SDIINTEN) = 0x1ff; // enable all sdio int *************
+
+
+
+	host = mmc_priv(mmc);
+	host->mmc 	= mmc;
+	host->pdev	= pdev;
+	//host->is	= is;
+
+	host->pdata = pdev->dev.platform_data;
+	if (!host->pdata) {
+		pdev->dev.platform_data = &ls1cmci_def_pdata;
+		host->pdata = &ls1cmci_def_pdata;
+	}
+	
+	spin_lock_init(&host->complete_lock);
+	tasklet_init(&host->pio_tasklet, pio_tasklet, (unsigned long) host);
+	host->sdiimsk	= 0x3c;
+	host->sdidata	= 0x40;//ls1c sd card å�ªèƒ½dma ä¼ è¾“ 
+	host->clk_div	= 0x10; //0x7;
+
+	host->complete_what 	= COMPLETION_NONE;
+	host->pio_active 	= XFER_NONE;
+
+
+    host->base = 0xbfe6c000;
+	host->irq = platform_get_irq(pdev, 0);
+	if (host->irq == 0) {
+		dev_err(&pdev->dev, "failed to get interrupt resouce.\n");
+		ret = -EINVAL;
+		goto probe_iounmap;
+	}
+
+	if (request_irq(host->irq, ls1cmci_irq, 0, DRIVER_NAME, host)) {
+		dev_err(&pdev->dev, "failed to request mci interrupt.\n");
+		ret = -ENOENT;
+		goto probe_iounmap;
+	}
+
+	disable_irq(host->irq);
+//	printk("  host->irq is :%d ... \r\n",host->irq);
+	host->irq_state = false;
+
+   // gpio interupt 
+	if (!host->pdata->no_detect) {
+		host->irq_cd = gpio_to_irq(host->pdata->gpio_detect);
+		host->irq_cd = host->pdata->gpio_detect + LS1X_GPIO_FIRST_IRQ;  //64 is  gpio irq base
+//		printk(" host->irq_cd (gpio_detect irq is:%d\r\n",host->irq_cd);
+		if (host->irq_cd >= 0) {
+			if (request_irq(host->irq_cd, ls1cmci_irq_cd,
+					IRQF_TRIGGER_RISING |
+					IRQF_TRIGGER_FALLING,
+					DRIVER_NAME, host)) {
+				dev_err(&pdev->dev,
+					"can't get card detect irq.\n");
+				ret = -ENOENT;
+				goto probe_free_gpio_cd;
+			}
+		} else {
+			dev_warn(&pdev->dev,
+				 "host detect has no irq available\n");
+			//gpio_direction_input(host->pdata->gpio_detect);
+		}
+	} else
+		host->irq_cd = -1;
+	
+	disable_irq(host->irq_cd);
+
+	/* depending on the dma state, get a dma channel to use. */
+
+	if (ls1cmci_host_usedma(host)) {
+		host->dma = 0; 
+	}
+	host->sg_cpu = dma_alloc_coherent(&pdev->dev, 0x100*28, &host->sg_dma, GFP_KERNEL);
+	memset(host->sg_cpu, 0 , 0x100*28);
+//	printk(" DMA_MEM sg_cpu:0x%08x  sg_dma:0x%08x ...\r\n", host->sg_cpu, host->sg_dma); 
+
+//	host->clk_rate = clk_get_rate(host->clk);
+	host->clk_rate = 120000000;  //sdram rate
+	mmc->ops 	= &ls1cmci_ops;
+	mmc->ocr_avail	= MMC_VDD_32_33 | MMC_VDD_33_34;
+#ifdef CONFIG_MMC_ls1c_HW_SDIO_IRQ
+	mmc->caps	= MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
+#else
+	mmc->caps	= MMC_CAP_4_BIT_DATA;
+#endif
+	mmc->f_min 	= host->clk_rate / (host->clk_div * 256);
+	mmc->f_max 	= host->clk_rate / host->clk_div;
+
+	if (host->pdata->ocr_avail)
+		mmc->ocr_avail = host->pdata->ocr_avail;
+
+	mmc->max_blk_count	= 4095;
+	mmc->max_blk_size	= 4095;
+	mmc->max_req_size	= 4095 * 512;
+	mmc->max_seg_size	= mmc->max_req_size;
+
+	mmc->max_segs		= 128;
+  	dbg(host, dbg_debug, "mapped mci_base:%p irq:%u irq_cd:%u dma:%u.\n",host->base, host->irq, host->irq_cd, host->dma);
+
+	ret = mmc_add_host(mmc);
+	if (ret) {
+		dev_err(&pdev->dev, "failed to add mmc host.\n");
+		goto free_cpufreq;
+	}
+//	ls1cmci_debugfs_attach(host);
+	platform_set_drvdata(pdev, mmc);
+	dev_info(&pdev->dev, "%s - using %s, %s SDIO IRQ\n", mmc_hostname(mmc),
+		 ls1cmci_host_usedma(host) ? "dma" : "pio",
+		 mmc->caps & MMC_CAP_SDIO_IRQ ? "hw" : "sw");
+
+//	enable_irq(host->irq_cd);  // beijing board  dont have  card detect gpio
+	tmp = read_c0_status();//???	
+	tmp |= 1 << 14;
+	write_c0_status(tmp);
+	return 0;
+
+ free_cpufreq:
+//	ls1cmci_cpufreq_deregister(host);
+
+ free_dmabuf:
+	clk_disable(host->clk);
+
+ clk_free:
+	clk_put(host->clk);
+
+ probe_free_dma:
+//	if (ls1cmci_host_usedma(host))
+//		ls1c_dma_free(host->dma, &ls1cmci_dma_client);
+
+ probe_free_gpio_wp:
+	if (!host->pdata->no_wprotect)
+		gpio_free(host->pdata->gpio_wprotect);
+
+ probe_free_gpio_cd:
+	if (!host->pdata->no_detect)
+		gpio_free(host->pdata->gpio_detect);
+
+ probe_free_irq_cd:
+	if (host->irq_cd >= 0)
+		free_irq(host->irq_cd, host);
+
+ probe_free_irq:
+	free_irq(host->irq, host);
+
+ probe_iounmap:
+	iounmap(host->base);
+
+ probe_free_mem_region:
+//	release_mem_region(host->mem->start, resource_size(host->mem));
+
+ probe_free_gpio:
+/*	for (i = ls1c_GPE(5); i <= ls1c_GPE(10); i++)
+		gpio_free(i);
+*/
+ probe_free_host:
+	mmc_free_host(mmc);
+
+ probe_out:
+	return ret;
+	return 0;
+}
+
+static void ls1cmci_shutdown(struct platform_device *pdev)
+{
+	struct mmc_host	*mmc = platform_get_drvdata(pdev);
+	struct ls1cmci_host *host = mmc_priv(mmc);
+
+	if (host->irq_cd >= 0)
+		free_irq(host->irq_cd, host);
+
+//	ls1cmci_debugfs_remove(host);
+//	ls1cmci_cpufreq_deregister(host);
+	mmc_remove_host(mmc);
+	clk_disable(host->clk);
+}
+
+static int __devexit ls1cmci_remove(struct platform_device *pdev)
+{
+	struct mmc_host		*mmc  = platform_get_drvdata(pdev);
+	struct ls1cmci_host	*host = mmc_priv(mmc);
+	struct ls1c_mci_pdata *pd = host->pdata;
+	int i;
+
+	ls1cmci_shutdown(pdev);
+
+	clk_put(host->clk);
+
+//	tasklet_disable(&host->pio_tasklet);
+
+//	if (ls1cmci_host_usedma(host))
+//		ls1c_dma_free(host->dma, &ls1cmci_dma_client);
+
+	free_irq(host->irq, host);
+#if 0
+	if (!pd->no_wprotect)
+		gpio_free(pd->gpio_wprotect);
+
+	if (!pd->no_detect)
+		gpio_free(pd->gpio_detect);
+
+	for (i = ls1c_GPE(5); i <= ls1c_GPE(10); i++)
+		gpio_free(i);
+#endif
+
+	iounmap(host->base);
+	release_mem_region(host->mem->start, resource_size(host->mem));
+
+	mmc_free_host(mmc);
+	return 0;
+}
+
+static struct platform_device_id ls1cmci_driver_ids[] = {
+	{
+		.name	= "ls1c_sdio",
+		.driver_data	= 0,
+	}, 
+	{ }
+};
+
+MODULE_DEVICE_TABLE(platform, ls1cmci_driver_ids);
+
+
+#ifdef CONFIG_PM
+
+static int ls1cmci_suspend(struct device *dev)
+{
+	struct mmc_host *mmc = platform_get_drvdata(to_platform_device(dev));
+
+	return mmc_suspend_host(mmc);
+}
+
+static int ls1cmci_resume(struct device *dev)
+{
+	struct mmc_host *mmc = platform_get_drvdata(to_platform_device(dev));
+
+	return mmc_resume_host(mmc);
+}
+
+static const struct dev_pm_ops ls1cmci_pm = {
+	.suspend	= ls1cmci_suspend,
+	.resume		= ls1cmci_resume,
+};
+
+#define ls1cmci_pm_ops &ls1cmci_pm
+#else /* CONFIG_PM */
+#define ls1cmci_pm_ops NULL
+#endif /* CONFIG_PM */
+
+
+static struct platform_driver ls1cmci_driver = {
+	.driver	= {
+		.name	= "ls1c_sdio",
+		.owner	= THIS_MODULE,
+		.pm	= ls1cmci_pm_ops,
+	},
+	.id_table	= ls1cmci_driver_ids,
+	.probe		= ls1cmci_probe,
+	.remove		= __devexit_p(ls1cmci_remove),
+	.shutdown	= ls1cmci_shutdown,
+};
+
+static int __init ls1cmci_init(void)
+{
+	return platform_driver_register(&ls1cmci_driver);
+}
+
+static void __exit ls1cmci_exit(void)
+{
+	platform_driver_unregister(&ls1cmci_driver);
+}
+
+module_init(ls1cmci_init);
+module_exit(ls1cmci_exit);
+
+MODULE_DESCRIPTION("Loongson ls1c MMC/SD Card Interface driver");
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR(" Loongson embed team");
diff -uNra linux-3.0.82/drivers/mmc/host/ls1cmci.h linux-3.0.82x/drivers/mmc/host/ls1cmci.h
--- linux-3.0.82/drivers/mmc/host/ls1cmci.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/mmc/host/ls1cmci.h	2017-09-23 03:42:49.654676176 +0800
@@ -0,0 +1,312 @@
+/*
+ *  linux/drivers/mmc/ls1cmci.h - Samsung ls1c MCI driver
+ *
+ *  Copyright (C) 2004-2006 Thomas Kleffel, All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef FCR_SDIO_H_
+#define FCR_SDIO_H_
+
+#define _REG(x) 	((volatile u32 *)(x))
+#define _REG2(b,o) 	((volatile u32 *)((b)+(o)))
+
+//#define LSON_AC_FMT  		AFM_S16_LE
+//#define LSON_AC_MAXCHNL 	2
+
+
+//#define DMA_FROMAC_DESCs 4
+//#define DMA_TOAC_DESCs 4
+
+
+//sdio_controler
+#define LS1C_SDIO_REGS_BASE 0x1fe6c040
+
+#define SDIO_REG(off)       _REG2(KSEG1ADDR(LS1C_SDIO_REGS_BASE),(off))
+
+
+#define SDIO_DES_ADDR   0x1fe6c040
+#define CONFREG_BASE    0xbfd00000
+#define SDIO_RD_MEM_ADDR 0x900000
+#define SDIO_WR_MEM_ADDR 0x800000
+
+
+#define SDIO_BASE  0xbfe6c000
+#define SDICON     0x00
+#define SDIPRE     0x04
+#define SDICMDARG  0x08
+#define SDICMDCON  0x0c
+#define SDICMDSTA  0x10
+#define SDIRSP0    0x14
+#define SDIRSP1    0x18
+#define SDIRSP2    0x1C
+#define SDIRSP3    0x20
+#define SDIDTIMER  0x24
+#define SDIBSIZE   0x28
+#define SDIDATCON  0x2C
+//#define SDIDCON               (0x2C)
+#define SDIDATCNT  0x30
+#define SDIDSTA               (0x34)
+#define SDIFSTA    0x38
+#define SDIINTMSK  0x3C
+#define SDIWRDAT   0x40
+#define SDISTAADD0 0x44
+#define SDISTAADD1 0x48
+#define SDISTAADD2 0x4c
+#define SDISTAADD3 0x50
+#define SDISTAADD4 0x54
+#define SDISTAADD5 0x58
+#define SDISTAADD6 0x5c
+#define SDISTAADD7 0x60
+#define SDIINTEN   0x64
+
+
+#define DAT_4_WIRE 1
+#define ERASE_START_ADDR 0x5000
+#define ERASE_End_ADDR   0x5000
+#define	MISC_CTRL		0xbfd00424
+
+
+
+#if  1   //add from s3c2410
+//arch/arm/mach-s3c2410/include/mach/regs-sdi.h 
+//#define SDICON                (0x00)   // already  define
+//#define SDIPRE                (0x04)
+//#define SDICMDARG             (0x08)
+//#define SDICMDCON             (0x0C)
+#define SDICMDSTAT            (0x10)
+/*
+#define SDIRSP0               (0x14)
+#define SDIRSP1               (0x18)
+#define SDIRSP2               (0x1C)
+#define SDIRSP3               (0x20)
+*/
+#define SDITIMER              (0x24)
+//#define SDIBSIZE              (0x28)
+#define SDIDCON               (0x2C)
+#define SDIDCNT               (0x30)
+#define SDIDSTA               (0x34)
+//#define SDIFSTA               (0x38)
+
+#define SDIDATA               (0x3C)
+#define SDIIMSK               (0x40)
+
+#define S3C2440_SDIDATA               (0x40)
+#define S3C2440_SDIIMSK               (0x3C)
+
+#define SDICON_SDRESET        (1<<8)
+#define SDICON_MMCCLOCK       (1<<5)
+#define SDICON_BYTEORDER      (1<<4)
+#define SDICON_SDIOIRQ        (1<<3)
+#define SDICON_RWAITEN        (1<<2)
+#define SDICON_FIFORESET      (1<<1)
+#define SDICON_CLOCKTYPE      (1<<0)
+
+#define SDICMDCON_ABORT       (1<<12)
+#define SDICMDCON_WITHDATA    (1<<11)
+#define SDICMDCON_LONGRSP     (1<<10)
+#define SDICMDCON_WAITRSP     (1<<9)
+#define SDICMDCON_CMDSTART    (1<<8)
+#define SDICMDCON_SENDERHOST  (1<<6)
+#define SDICMDCON_INDEX       (0x3f)
+
+#define SDICMDSTAT_CRCFAIL    (1<<12)
+#define SDICMDSTAT_CMDSENT    (1<<11)
+#define SDICMDSTAT_CMDTIMEOUT (1<<10)
+#define SDICMDSTAT_RSPFIN     (1<<9)
+#define SDICMDSTAT_XFERING    (1<<8)
+#define SDICMDSTAT_INDEX      (0xff)
+
+#define S3C2440_SDIDCON_DS_BYTE       (0<<22)
+#define S3C2440_SDIDCON_DS_HALFWORD   (1<<22)
+#define S3C2440_SDIDCON_DS_WORD       (2<<22)
+#define SDIDCON_IRQPERIOD     (1<<21)
+#define SDIDCON_TXAFTERRESP   (1<<20)
+#define SDIDCON_RXAFTERCMD    (1<<19)
+#define SDIDCON_BUSYAFTERCMD  (1<<18)
+#define SDIDCON_BLOCKMODE     (1<<17)
+#define SDIDCON_WIDEBUS       (1<<16)
+#define MISC_CTRL_SDIO_DMAEN         (1<<15)
+#define SDIDCON_STOP          (1<<14)
+#define S3C2440_SDIDCON_DATSTART      (1<<14)
+#define SDIDCON_DATMODE	      (3<<12)
+#define SDIDCON_BLKNUM        (0x7ff)
+
+/* constants for SDIDCON_DATMODE */
+#define SDIDCON_XFER_READY    (0<<12)
+#define SDIDCON_XFER_CHKSTART (1<<12)
+#define SDIDCON_XFER_RXSTART  (2<<12)
+#define SDIDCON_XFER_TXSTART  (3<<12)
+
+#define SDIDCON_BLKNUM_MASK   (0xFFF)
+#define SDIDCNT_BLKNUM_SHIFT  (12)
+
+#define SDIDSTA_RDYWAITREQ    (1<<10)
+#define SDIDSTA_SDIOIRQDETECT (1<<9)
+#define SDIDSTA_FIFOFAIL      (1<<8)	/* reserved on 2440 */
+#define SDIDSTA_CRCFAIL       (1<<7)
+#define SDIDSTA_RXCRCFAIL     (1<<6)
+#define SDIDSTA_DATATIMEOUT   (1<<5)
+#define SDIDSTA_XFERFINISH    (1<<4)
+#define SDIDSTA_BUSYFINISH    (1<<3)
+#define SDIDSTA_SBITERR       (1<<2)	/* reserved on 2410a/2440 */
+#define SDIDSTA_TXDATAON      (1<<1)
+#define SDIDSTA_RXDATAON      (1<<0)
+
+#define S3C2440_SDIFSTA_FIFORESET      (1<<16)
+#define S3C2440_SDIFSTA_FIFOFAIL       (3<<14)  /* 3 is correct (2 bits) */
+#define SDIFSTA_TFDET          (1<<13)
+#define SDIFSTA_RFDET          (1<<12)
+#define SDIFSTA_TFHALF         (1<<11)
+#define SDIFSTA_TFEMPTY        (1<<10)
+#define SDIFSTA_RFLAST         (1<<9)
+#define SDIFSTA_RFFULL         (1<<8)
+#define SDIFSTA_RFHALF         (1<<7)
+#define SDIFSTA_COUNTMASK      (0x7f)
+
+#define SDIIMSK_RESPONSECRC    (1<<17)
+#define SDIIMSK_RESPONSEND     (1<<14)
+#define SDIIMSK_READWAIT       (1<<13)
+#define SDIIMSK_SDIOIRQ        (1<<12)
+#define SDIIMSK_FIFOFAIL       (1<<11)
+
+
+#define SDIIMSK_RESPONSECRC    (1<<8)
+#define SDIIMSK_CMDTIMEOUT     (1<<7)
+#define SDIIMSK_CMDSENT        (1<<6)	//dbg-yg
+#define SDIIMSK_PROGERR        (1<<4)	//dbg-yg
+#define SDIIMSK_TXCRCFAIL      (1<<3)
+#define SDIIMSK_RXCRCFAIL      (1<<2)
+#define SDIIMSK_DATATIMEOUT    (1<<1)
+#define SDIIMSK_DATAFINISH     (1<<0)   //dbg-yg
+
+#define SDIIMSK_BUSYFINISH     (1<<6)
+#define SDIIMSK_SBITERR        (1<<5)	/* reserved 2440/2410a */
+#define SDIIMSK_TXFIFOHALF     (1<<4)
+#define SDIIMSK_TXFIFOEMPTY    (1<<3)
+#define SDIIMSK_RXFIFOLAST     (1<<2)
+#define SDIIMSK_RXFIFOFULL     (1<<1)
+#define SDIIMSK_RXFIFOHALF     (1<<0)  
+
+
+#endif 
+#define nr_strtol strtoul
+
+struct ls1c_mci_pdata {
+	unsigned int	no_wprotect : 1;
+	unsigned int	no_detect : 1;
+	unsigned int	wprotect_invert : 1;
+	unsigned int	detect_invert : 1;   /* set => detect active high. */
+	unsigned int	use_dma : 1;
+
+	unsigned int	gpio_detect;
+	unsigned int	gpio_wprotect;
+	unsigned long	ocr_avail;
+	void		(*set_power)(unsigned char power_mode,
+				     unsigned short vdd);
+};
+
+/**
+ * s3c24xx_mci_set_platdata - set platform data for mmc/sdi device
+ * @pdata: The platform data
+ *
+ * Copy the platform data supplied by @pdata so that this can be marked
+ * __initdata.
+ */
+extern void ls1c_mci_set_platdata(struct ls1c_mci_pdata *pdata);
+
+
+enum ls1cmci_waitfor {
+	COMPLETION_NONE,
+	COMPLETION_FINALIZE,
+	COMPLETION_CMDSENT,
+	COMPLETION_RSPFIN,
+	COMPLETION_XFERFINISH,
+	COMPLETION_XFERFINISH_RSPFIN,
+};
+
+typedef struct ls1c_dma_desc{
+	volatile u32 order_addr;
+	volatile u32 saddr;
+	volatile u32 daddr;
+	volatile u32 length;
+	volatile u32 step_length;
+	volatile u32 step_times;
+	volatile u32 cmd;
+}ls1c_dma_desc;
+
+struct ls1cmci_host {
+	struct platform_device	*pdev;
+	struct ls1c_mci_pdata *pdata;
+	struct mmc_host		*mmc;
+	struct resource		*mem;
+	struct clk		*clk;
+	void __iomem		*base;
+	int			irq;
+	int			irq_cd;
+	int			dma;
+	unsigned long dma_send_vir_mem; //add by yg
+	unsigned long dma_send_phy_mem;
+	unsigned long dma_rec_vir_mem;
+	unsigned long dma_rec_phy_mem;
+	struct ls1c_dma_desc *sg_cpu;
+	dma_addr_t sg_dma;
+
+	unsigned long		clk_rate;
+	unsigned long		clk_div;
+	unsigned long		real_rate;
+	u8			prescaler;
+
+	int			is2440;
+	unsigned		sdiimsk;
+	unsigned		sdidata;
+	int			dodma;
+	int			dmatogo;
+
+	bool			irq_disabled;
+	bool			irq_enabled;
+	bool			irq_state;
+	int			sdio_irqen;
+
+	struct mmc_request	*mrq;
+	int			cmd_is_stop;
+
+	spinlock_t		complete_lock;
+	enum ls1cmci_waitfor	complete_what;
+
+	int			dma_complete;
+
+	u32			pio_sgptr;
+	u32			pio_bytes;
+	u32			pio_count;
+	u32			*pio_ptr;
+#define XFER_NONE 0
+#define XFER_READ 1
+#define XFER_WRITE 2
+	u32			pio_active;
+
+	int			bus_width;
+
+	char 			dbgmsg_cmd[301];
+	char 			dbgmsg_dat[301];
+	char			*status;
+
+	unsigned int		ccnt, dcnt;
+	struct tasklet_struct	pio_tasklet;
+
+#ifdef CONFIG_DEBUG_FS
+	struct dentry		*debug_root;
+	struct dentry		*debug_state;
+	struct dentry		*debug_regs;
+#endif
+
+#ifdef CONFIG_CPU_FREQ
+	struct notifier_block	freq_transition;
+#endif
+};
+
+
+#endif  //_SDIO_H_
diff -uNra linux-3.0.82/drivers/mmc/host/Makefile linux-3.0.82x/drivers/mmc/host/Makefile
--- linux-3.0.82/drivers/mmc/host/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/mmc/host/Makefile	2017-09-23 03:42:49.654676176 +0800
@@ -27,6 +27,7 @@
 obj-$(CONFIG_MMC_SPI)		+= of_mmc_spi.o
 endif
 obj-$(CONFIG_MMC_S3C)   	+= s3cmci.o
+obj-$(CONFIG_MMC_LS1C)   	+= ls1cmci.o
 obj-$(CONFIG_MMC_SDRICOH_CS)	+= sdricoh_cs.o
 obj-$(CONFIG_MMC_TMIO)		+= tmio_mmc.o
 obj-$(CONFIG_MMC_TMIO_CORE)	+= tmio_mmc_core.o
diff -uNra linux-3.0.82/drivers/mtd/devices/m25p80.c linux-3.0.82x/drivers/mtd/devices/m25p80.c
--- linux-3.0.82/drivers/mtd/devices/m25p80.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/mtd/devices/m25p80.c	2017-09-23 03:42:49.654676176 +0800
@@ -100,6 +100,7 @@
 	return container_of(mtd, struct m25p, mtd);
 }
 
+struct m25p *flash_tmp;
 /****************************************************************************/
 
 /*
@@ -337,6 +338,7 @@
 	return 0;
 }
 
+
 /*
  * Read an address range from the flash chip.  The address range
  * may be any size provided it is within the physical boundaries.
@@ -347,7 +349,6 @@
 	struct m25p *flash = mtd_to_m25p(mtd);
 	struct spi_transfer t[2];
 	struct spi_message m;
-
 	DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %zd\n",
 			dev_name(&flash->spi->dev), __func__, "from",
 			(u32)from, len);
@@ -358,7 +359,6 @@
 
 	if (from + len > flash->mtd.size)
 		return -EINVAL;
-
 	spi_message_init(&m);
 	memset(t, 0, (sizeof t));
 
@@ -373,7 +373,6 @@
 	t[1].rx_buf = buf;
 	t[1].len = len;
 	spi_message_add_tail(&t[1], &m);
-
 	/* Byte count starts at zero. */
 	*retlen = 0;
 
@@ -396,7 +395,6 @@
 	m25p_addr2cmd(flash, from, flash->command);
 
 	spi_sync(flash->spi, &m);
-
 	*retlen = m.actual_length - m25p_cmdsz(flash) - FAST_READ_DUMMY_BYTE;
 
 	mutex_unlock(&flash->lock);
@@ -404,6 +402,7 @@
 	return 0;
 }
 
+
 /*
  * Write an address range to the flash chip.  Data must be written in
  * FLASH_PAGESIZE chunks.  The address range may be any size provided
@@ -501,6 +500,7 @@
 	return 0;
 }
 
+
 static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
 		size_t *retlen, const u_char *buf)
 {
@@ -707,7 +707,8 @@
 	{ "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024,  64, 0) },
 	{ "s25fl129p1", INFO(0x012018, 0x4d01,  64 * 1024, 256, 0) },
 	{ "s25fl016k",  INFO(0xef4015,      0,  64 * 1024,  32, SECT_4K) },
-	{ "s25fl064k",  INFO(0xef4017,      0,  64 * 1024, 128, SECT_4K) },
+	{ "s25fl064k",  INFO(0xef4017,      0,  64 * 1024, 128, 0) },
+//	{ "s25fl064k",  INFO(0xef4017,      0,  64 * 1024, 128, SECT_4K) },
 
 	/* SST -- large erase sizes are "overlays", "sectors" are 4K */
 	{ "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024,  8, SECT_4K) },
@@ -762,6 +763,8 @@
 	{ "w25q32", INFO(0xef4016, 0, 64 * 1024,  64, SECT_4K) },
 	{ "w25x64", INFO(0xef3017, 0, 64 * 1024, 128, SECT_4K) },
 	{ "w25q64", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) },
+	{ "w25q64dw", INFO(0xef6017, 0, 64 * 1024, 128, 0) },
+	{ "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, 0) },
 
 	/* Catalyst / On Semiconductor -- non-JEDEC */
 	{ "cat25c11", CAT25_INFO(  16, 8, 16, 1) },
@@ -1002,6 +1005,8 @@
 		flash->partitioned = 1;
 	}
 
+	flash_tmp = flash;
+
 	return mtd_device_register(&flash->mtd, parts, nr_parts) == 1 ?
 		-ENODEV : 0;
 }
@@ -1024,7 +1029,7 @@
 
 static struct spi_driver m25p80_driver = {
 	.driver = {
-		.name	= "m25p80",
+		.name	= "w25q64",	//"m25p80",
 		.bus	= &spi_bus_type,
 		.owner	= THIS_MODULE,
 	},
diff -uNra linux-3.0.82/drivers/mtd/mtdcore.c linux-3.0.82x/drivers/mtd/mtdcore.c
--- linux-3.0.82/drivers/mtd/mtdcore.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/mtd/mtdcore.c	2017-09-23 03:42:49.658676164 +0800
@@ -446,11 +446,51 @@
 			const struct mtd_partition *parts,
 			int nr_parts)
 {
+	printk("--------------dbg-yg-----> enter mtd_device_register()....\r\n");
 	return parts ? add_mtd_partitions(master, parts, nr_parts) :
 		add_mtd_device(master);
 }
 EXPORT_SYMBOL_GPL(mtd_device_register);
 
+/***************************************************************************
+ * Description:
+ * Parameters: 
+ * Author  :Sunyoung_yg 
+ * Date    : 2014-05-05
+ ***************************************************************************/
+extern int mtd_device_parse_register(struct mtd_info *mtd, const char **types,
+			      struct mtd_part_parser_data *parser_data,
+			      const struct mtd_partition *parts,
+			      int nr_parts)
+{
+	int err;
+	struct mtd_partition *real_parts;
+	printk("------------->dbg-yg.......---> mtd_device_parse_register()...\r\n");
+	err = parse_mtd_partitions(mtd, types, &real_parts, parser_data);
+	if (err <= 0 && nr_parts && parts) {
+		real_parts = kmemdup(parts, sizeof(*parts) * nr_parts,
+				     GFP_KERNEL);
+		if (!real_parts)
+			err = -ENOMEM;
+		else
+			err = nr_parts;
+	}
+
+	if (err > 0) {
+		err = add_mtd_partitions(mtd, real_parts, err);
+		kfree(real_parts);
+	} else if (err == 0) {
+		err = add_mtd_device(mtd);
+		if (err == 1)
+			err = -ENODEV;
+	}
+
+	return err;
+}
+EXPORT_SYMBOL_GPL(mtd_device_parse_register);
+
+
+
 /**
  * mtd_device_unregister - unregister an existing MTD device.
  *
diff -uNra linux-3.0.82/drivers/mtd/mtdpart.c linux-3.0.82x/drivers/mtd/mtdpart.c
--- linux-3.0.82/drivers/mtd/mtdpart.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/mtd/mtdpart.c	2017-09-23 03:42:49.658676164 +0800
@@ -717,7 +717,6 @@
 {
 	struct mtd_part_parser *parser;
 	int ret = 0;
-
 	for ( ; ret <= 0 && *types; types++) {
 		parser = get_partition_parser(*types);
 		if (!parser && !request_module("%s", *types))
@@ -731,6 +730,7 @@
 		}
 		put_partition_parser(parser);
 	}
+
 	return ret;
 }
 EXPORT_SYMBOL_GPL(parse_mtd_partitions);
diff -uNra linux-3.0.82/drivers/mtd/nand/Kconfig linux-3.0.82x/drivers/mtd/nand/Kconfig
--- linux-3.0.82/drivers/mtd/nand/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/mtd/nand/Kconfig	2017-09-23 03:42:49.658676164 +0800
@@ -102,6 +102,7 @@
 	help
 	  This enables a GPIO based NAND flash driver.
 
+
 config MTD_NAND_SPIA
 	tristate "NAND Flash device on SPIA board"
 	depends on ARCH_P720T
@@ -523,6 +524,25 @@
 	help
 		Enables support for NAND Flash on JZ4740 SoC based boards.
 
+config MTD_NAND_LS1X
+	tristate "NAND Flash device on loongson-1a/1b/1c"
+	depends on MTD_NAND && (LS1B_MACH || LS1A_MACH || LS1C_MACH)
+	help
+	  The loongson-1a/1b BOARD NAND FLASH controller.
+
+choice
+	prompt "Multiplexing selection for LS1A"
+	depends on (MTD_NAND_LS1X) && (LS1A_MACH)
+	default NAND_USE_SPI1_PWM23
+
+config NAND_USE_LPC_PWM01
+	bool "nand d0-d5 use LCP and pwm01"
+
+config NAND_USE_SPI1_PWM23
+	bool "nand d0-d5 use SPI1 and pwm23"
+
+endchoice
+
 config MTD_NAND_FSMC
 	tristate "Support for NAND on ST Micros FSMC"
 	depends on PLAT_SPEAR || PLAT_NOMADIK || MACH_U300
diff -uNra linux-3.0.82/drivers/mtd/nand/ls1b-nand-3.3.c linux-3.0.82x/drivers/mtd/nand/ls1b-nand-3.3.c
--- linux-3.0.82/drivers/mtd/nand/ls1b-nand-3.3.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/mtd/nand/ls1b-nand-3.3.c	2017-09-23 03:42:49.662676151 +0800
@@ -0,0 +1,1015 @@
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/delay.h>
+#include <linux/clk.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <asm/dma.h>
+#include <linux/slab.h>
+
+
+#define DMA_ACCESS_ADDR     0x1fe78040
+#define ORDER_REG_ADDR      (KSEG1ADDR(0x1fd01160))
+#define MAX_BUFF_SIZE	4096
+#define PAGE_SHIFT      12
+#define NO_SPARE_ADDRH(x)   ((x) >> (32 - (PAGE_SHIFT - 1 )))   
+#define NO_SPARE_ADDRL(x)   ((x) << (PAGE_SHIFT - 1))
+#define SPARE_ADDRH(x)      ((x) >> (32 - (PAGE_SHIFT )))   
+#define SPARE_ADDRL(x)      ((x) << (PAGE_SHIFT ))
+#define ALIGN_DMA(x)       (((x)+ 3)/4)
+
+
+
+#define CHIP_DELAY_TIMEOUT (2*HZ/10)
+
+#define STATUS_TIME_LOOP_R  30 
+#define STATUS_TIME_LOOP_WS  60  
+#define STATUS_TIME_LOOP_WM  60  
+#define STATUS_TIME_LOOP_E  100  
+
+#define NAND_CMD        0x1
+#define NAND_ADDRL      0x2
+#define NAND_ADDRH      0x4
+#define NAND_TIMING     0x8
+#define NAND_IDL        0x10
+#define NAND_STATUS_IDL 0x20
+#define NAND_PARAM      0x40
+#define NAND_OP_NUM     0X80
+#define NAND_CS_RDY_MAP 0x100
+
+#define DMA_ORDERAD     0x1
+#define DMA_SADDR       0x2
+#define DMA_DADDR       0x4
+#define DMA_LENGTH      0x8
+#define DMA_STEP_LENGTH 0x10
+#define DMA_STEP_TIMES  0x20
+#define DMA_CMD         0x40
+
+
+#define  _NAND_IDL      ( *((volatile unsigned int*)(0xbfe78010)))
+#define  _NAND_IDH       (*((volatile unsigned int*)(0xbfe78014)))
+#define  _NAND_BASE      0xbfe78000
+#define  _NAND_SET_REG(x,y)   do{*((volatile unsigned int*)(_NAND_BASE+x)) = (y);}while(0)                           
+#define  _NAND_READ_REG(x,y)  do{(y) =  *((volatile unsigned int*)(_NAND_BASE+x));}while(0) 
+
+#define _NAND_TIMING_TO_READ    _NAND_SET_REG(0xc,0x205)
+#define _NAND_TIMING_TO_WRITE   _NAND_SET_REG(0xc,0x205)
+
+//#define _NADN_TIMING_TO_READ(x)  _NAND_STORE_TIMING(0x209)}while(0)
+//#define _NADN_TIMING_TO_WRITE(x)  NAND_STORE_TIMING(0x209)}while(0)
+extern mtd_device_parse_register(struct mtd_info *mtd, const char **types,
+			      struct mtd_part_parser_data *parser_data,
+			      const struct mtd_partition *parts,
+			      int nr_parts);
+
+enum{
+    ERR_NONE        = 0,
+    ERR_DMABUSERR   = -1,
+    ERR_SENDCMD     = -2,
+    ERR_DBERR       = -3,
+    ERR_BBERR       = -4,
+};
+enum{
+    STATE_READY = 0,
+    STATE_BUSY  ,
+};
+
+struct ls1b_nand_platform_data{
+        int enable_arbiter;
+        struct mtd_partition *parts;
+        unsigned int nr_parts;
+};
+struct ls1b_nand_cmdset {
+        uint32_t    cmd_valid:1;
+	uint32_t    read:1;
+	uint32_t    write:1;
+	uint32_t    erase_one:1;
+	uint32_t    erase_con:1;
+	uint32_t    read_id:1;
+	uint32_t    reset:1;
+	uint32_t    read_sr:1;
+	uint32_t    op_main:1;
+	uint32_t    op_spare:1;
+	uint32_t    done:1;
+        uint32_t    resv1:5;//11-15 reserved
+        uint32_t    nand_rdy:4;//16-19
+        uint32_t    nand_ce:4;//20-23
+        uint32_t    resv2:8;//24-32 reserved
+};
+struct ls1b_nand_dma_desc{
+        uint32_t    orderad;
+        uint32_t    saddr;
+        uint32_t    daddr;
+        uint32_t    length;
+        uint32_t    step_length;
+        uint32_t    step_times;
+        uint32_t    cmd;
+};
+struct ls1b_nand_dma_cmd{
+        uint32_t    dma_int_mask:1;
+        uint32_t    dma_int:1;
+        uint32_t    dma_sl_tran_over:1;
+        uint32_t    dma_tran_over:1;
+        uint32_t    dma_r_state:4;
+        uint32_t    dma_w_state:4;
+        uint32_t    dma_r_w:1;
+        uint32_t    dma_cmd:2;
+        uint32_t    revl:17;
+};
+struct ls1b_nand_desc{
+        uint32_t    cmd;
+        uint32_t    addrl;
+        uint32_t    addrh;
+        uint32_t    timing;
+        uint32_t    idl;//readonly
+        uint32_t    status_idh;//readonly
+        uint32_t    param;
+        uint32_t    op_num;
+        uint32_t    cs_rdy_map;
+};
+struct ls1b_nand_info {
+	struct nand_chip	nand_chip;
+
+	struct platform_device	    *pdev;
+        /* MTD data control*/
+	unsigned int 		buf_start;
+	unsigned int		buf_count;
+        /* NAND registers*/
+	void __iomem		*mmio_base;
+        struct ls1b_nand_desc   nand_regs;
+        unsigned int            nand_addrl;
+        unsigned int            nand_addrh;
+        unsigned int            nand_timing;
+        unsigned int            nand_op_num;
+        unsigned int            nand_cs_rdy_map;
+        unsigned int            nand_cmd;
+
+	/* DMA information */
+
+        struct ls1b_nand_dma_desc  dma_regs;
+        unsigned int            order_reg_addr;  
+        unsigned int            dma_orderad;
+        unsigned int            dma_saddr;
+        unsigned int            dma_daddr;
+        unsigned int            dma_length;
+        unsigned int            dma_step_length;
+        unsigned int            dma_step_times;
+        unsigned int            dma_cmd;
+        int			drcmr_dat;//dma descriptor address;
+	dma_addr_t 		drcmr_dat_phys;
+        size_t                  drcmr_dat_size;
+	unsigned char		*data_buff;//dma data buffer;
+	dma_addr_t 		data_buff_phys;
+	size_t			data_buff_size;
+        unsigned long           cac_size;
+        unsigned long           num;
+        unsigned long           size;
+        struct timer_list       test_timer;
+        unsigned int            dma_ask;
+        unsigned int            dma_ask_phy;
+
+	/* relate to the command */
+	unsigned int		state;
+//	int			use_ecc;	/* use HW ECC ? */
+	size_t			data_size;	/* data size in FIFO */
+        unsigned int            cmd;
+        unsigned int            page_addr;
+        struct completion 	cmd_complete;
+        unsigned int            seqin_column;
+        unsigned int            seqin_page_addr;
+        unsigned int            timing_flag;
+        unsigned int            timing_val;
+};
+
+
+static struct nand_ecclayout hw_largepage_ecclayout = {
+	.eccbytes = 24,
+	.eccpos = {
+		40, 41, 42, 43, 44, 45, 46, 47,
+		48, 49, 50, 51, 52, 53, 54, 55,
+		56, 57, 58, 59, 60, 61, 62, 63},
+	.oobfree = { {2, 38} }
+};
+#define show_data_debug  0
+#define show_debug(x,y)     show_debug_msk(x,y)
+#define show_debug_msk(x,y)   do{ if(show_data_debug) {printk(KERN_ERR "%s:\n",__func__);show_data(x,y);} }while(0)
+
+static void show_data(void * base,int num)
+{
+    int i=0;
+    unsigned char *arry=( unsigned char *) base;
+    for(i=0;i<num;i++){
+        if(!(i % 32)){
+            printk(KERN_ERR "\n");
+        }
+        if(!(i % 16)){
+            printk("  ");
+        }
+        printk("%02x ",arry[i]);
+    }
+    printk(KERN_ERR "\n");
+    
+}
+
+
+static int ls1b_nand_init_buff(struct ls1b_nand_info *info)
+{
+        struct platform_device *pdev = info->pdev;
+    	info->data_buff = dma_alloc_coherent(&pdev->dev, MAX_BUFF_SIZE,
+				&info->data_buff_phys, GFP_KERNEL);
+        info->data_buff = CAC_ADDR(info->data_buff);
+//        printk("info->data_buff===================0x%08x\n",info->data_buff);
+	if (info->data_buff == NULL) {
+		dev_err(&pdev->dev, "failed to allocate dma buffer\n");
+		return -ENOMEM;
+	}
+       	info->data_buff_size = MAX_BUFF_SIZE;
+        return 0;
+}
+static int ls1b_nand_ecc_calculate(struct mtd_info *mtd,
+		const uint8_t *dat, uint8_t *ecc_code)
+{
+	return 0;
+}
+static int ls1b_nand_ecc_correct(struct mtd_info *mtd,
+		uint8_t *dat, uint8_t *read_ecc, uint8_t *calc_ecc)
+{
+	struct ls1b_nand_info *info = mtd->priv;
+	/*
+	 * Any error include ERR_SEND_CMD, ERR_DBERR, ERR_BUSERR, we
+	 * consider it as a ecc error which will tell the caller the
+	 * read fail We have distinguish all the errors, but the
+	 * nand_read_ecc only check this function return value
+	 */
+	return 0;
+}
+
+static void ls1b_nand_ecc_hwctl(struct mtd_info *mtd, int mode)
+{
+	return;
+}
+
+
+
+
+static int ls1b_nand_waitfunc(struct mtd_info *mtd, struct nand_chip *this)
+{
+    udelay(50);
+    return 0;
+}
+static void ls1b_nand_select_chip(struct mtd_info *mtd, int chip)
+{
+	return;
+}
+static int ls1b_nand_dev_ready(struct mtd_info *mtd)
+{
+	return 1;
+}
+static void ls1b_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+        struct ls1b_nand_info *info = mtd->priv;
+        int i,real_len = min_t(size_t, len, info->buf_count - info->buf_start);
+/*
+        if(!(info->coherent)){
+            dma_cache_inv((unsigned long)(info->data_buff),info->cac_size);
+            info->coherent = 1; 
+        }
+*/
+	memcpy(buf, info->data_buff + info->buf_start, real_len);
+
+        show_debug(info->data_buff,0x40);
+
+        info->buf_start += real_len;
+}
+static u16 ls1b_nand_read_word(struct mtd_info *mtd)
+{
+        struct ls1b_nand_info *info = mtd->priv;
+        u16 retval = 0xFFFF;
+/*
+        if(!(info->coherent)){
+            dma_cache_inv((unsigned long)(info->data_buff),info->cac_size);
+            info->coherent = 1; 
+        }
+*/        
+        if(!(info->buf_start & 0x1) && info->buf_start < info->buf_count){
+            retval = *(u16 *)(info->data_buff + info->buf_start);
+        }
+        info->buf_start += 2;
+        return retval;
+
+
+}
+static uint8_t ls1b_nand_read_byte(struct mtd_info *mtd)
+{
+        struct ls1b_nand_info *info = mtd->priv;
+	char retval = 0xFF;
+/*
+        if(!(info->coherent)){
+            dma_cache_inv((unsigned long)(info->data_buff),info->cac_size);
+            info->coherent = 1; 
+        }
+*/
+	if (info->buf_start < info->buf_count)
+		retval = info->data_buff[(info->buf_start)++];
+       // show_debug(info->data_buff,6);
+	return retval;
+}
+static void ls1b_nand_write_buf(struct mtd_info *mtd,const uint8_t *buf, int len)
+{
+        int i;
+        struct ls1b_nand_info *info = mtd->priv;
+	int real_len = min_t(size_t, len, info->buf_count - info->buf_start);
+
+	memcpy(info->data_buff + info->buf_start, buf, real_len);
+            show_debug(info->data_buff,0x20);
+ //           show_debug(info->data_buff+2048,0x20);
+	info->buf_start += real_len;
+}
+static int ls1b_nand_verify_buf(struct mtd_info *mtd,const uint8_t *buf, int len)
+{
+       int i=0;
+        struct ls1b_nand_info *info = mtd->priv;
+		return 0;
+		show_debug(info->data_buff,0x20);
+        while(len--){
+            if(buf[i++] != ls1b_nand_read_byte(mtd) ){
+                printk("?????????????????????????????????????????????????????verify error...\n\n");
+                return -1;
+            }
+        }
+	return 0;
+}
+static void ls1b_nand_cmdfunc(struct mtd_info *mtd, unsigned command,int column, int page_addr);
+static void ls1b_nand_init_mtd(struct mtd_info *mtd,struct ls1b_nand_info *info)
+{
+	struct nand_chip *this = &info->nand_chip;
+
+
+	this->options = 8;//(f->flash_width == 16) ? NAND_BUSWIDTH_16: 0;
+
+	this->waitfunc		= ls1b_nand_waitfunc;
+	this->select_chip	= ls1b_nand_select_chip;
+	this->dev_ready		= ls1b_nand_dev_ready;
+	this->cmdfunc		= ls1b_nand_cmdfunc;
+	this->read_word		= ls1b_nand_read_word;
+	this->read_byte		= ls1b_nand_read_byte;
+	this->read_buf		= ls1b_nand_read_buf;
+	this->write_buf		= ls1b_nand_write_buf;
+	this->verify_buf	= ls1b_nand_verify_buf;
+
+        this->ecc.mode		= NAND_ECC_NONE;
+	this->ecc.hwctl		= ls1b_nand_ecc_hwctl;
+	this->ecc.calculate	= ls1b_nand_ecc_calculate;
+	this->ecc.correct	= ls1b_nand_ecc_correct;
+	this->ecc.size		= 2048;
+        this->ecc.bytes         = 24;
+
+//	this->ecc.layout = &hw_largepage_ecclayout;
+        mtd->owner = THIS_MODULE;
+}
+static void show_dma_regs(void *dma_regs,int flag)
+{
+    return ;
+    unsigned int *regs=dma_regs;
+    printk("\n");
+    printk("0x%08x:0x%08x\n",regs,*regs);
+    printk("0x%08x:0x%08x\n",++regs,*regs);
+    printk("0x%08x:0x%08x\n",++regs,*regs);
+    printk("0x%08x:0x%08x\n",++regs,*regs);
+    printk("0x%08x:0x%08x\n",++regs,*regs);
+    printk("0x%08x:0x%08x\n",++regs,*regs);
+    printk("0x%08x:0x%08x\n",++regs,*regs);
+    if(flag)
+    printk("0xbfd01160:0x%08x\n",*(volatile unsigned int *)0xbfd01160);
+}
+static unsigned ls1b_nand_status(struct ls1b_nand_info *info)
+{
+    return(*((volatile unsigned int*)0xbfe78000) & (0x1<<16));
+}
+#define write_z_cmd  do{                                    \
+            *((volatile unsigned int *)(0xbfe78000)) = 0;   \
+            *((volatile unsigned int *)(0xbfe78000)) = 0;   \
+            *((volatile unsigned int *)(0xbfe78000)) = 400; \
+    }while(0)
+static int nand_num=0;
+static irqreturn_t ls1b_nand_irq(int irq,void *devid)
+{
+    int status_time;
+    struct ls1b_nand_info *info = devid;
+    struct ls1b_nand_dma_desc *dma_regs = (volatile struct ls1b_nand_dma_desc *)(info->drcmr_dat);
+    struct ls1b_nand_dma_cmd *dma_cmd = (struct ls1b_nand_dma_cmd *)(&(dma_regs->cmd));
+    switch(info->cmd){
+        case NAND_CMD_READOOB:
+        case NAND_CMD_READ0:
+            udelay(1);
+            info->state = STATE_READY;
+            break;
+        case NAND_CMD_PAGEPROG:
+            udelay(10);
+            status_time=STATUS_TIME_LOOP_WS;
+            while(!(ls1b_nand_status(info))){
+                if(!(status_time--)){
+                    write_z_cmd;
+                    nand_num++;
+                    break;
+                }
+                udelay(50);
+            }
+            info->state = STATE_READY;
+            break;
+        default:
+       //     printk(KERN_ERR "this never happend!!!^^^^^^^^^^^^^^&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&\n");
+            break;
+    }
+    complete(&info->cmd_complete);
+    return IRQ_HANDLED;
+   
+}
+/*
+ *  flags & 0x1   orderad
+ *  flags & 0x2   saddr
+ *  flags & 0x4   daddr
+ *  flags & 0x8   length
+ *  flags & 0x10  step_length
+ *  flags & 0x20  step_times
+ *  flags & 0x40  cmd
+ ***/
+static void dma_setup(unsigned int flags,struct ls1b_nand_info *info)
+{
+    struct ls1b_nand_dma_desc *dma_base = (volatile struct ls1b_nand_dma_desc *)(info->drcmr_dat);
+    dma_base->orderad = (flags & DMA_ORDERAD)== DMA_ORDERAD ? info->dma_regs.orderad : info->dma_orderad;
+    dma_base->saddr = (flags & DMA_SADDR)== DMA_SADDR ? info->dma_regs.saddr : info->dma_saddr;
+    dma_base->daddr = (flags & DMA_DADDR)== DMA_DADDR ? info->dma_regs.daddr : info->dma_daddr;
+    dma_base->length = (flags & DMA_LENGTH)== DMA_LENGTH ? info->dma_regs.length: info->dma_length;
+    dma_base->step_length = (flags & DMA_STEP_LENGTH)== DMA_STEP_LENGTH ? info->dma_regs.step_length: info->dma_step_length;
+    dma_base->step_times = (flags & DMA_STEP_TIMES)== DMA_STEP_TIMES ? info->dma_regs.step_times: info->dma_step_times;
+    dma_base->cmd = (flags & DMA_CMD)== DMA_CMD ? info->dma_regs.cmd: info->dma_cmd;
+
+    if((dma_base->cmd)&(0x1 << 12)){    
+        dma_cache_wback((unsigned long)(info->data_buff),info->cac_size);
+    }
+    dma_cache_wback((unsigned long)(info->drcmr_dat),0x20);
+
+    {
+    long flags;
+    local_irq_save(flags);
+    *(volatile unsigned int *)info->order_reg_addr = ((unsigned int )info->drcmr_dat_phys) | 0x1<<3;
+    while (*(volatile unsigned int *)info->order_reg_addr & 0x8 );
+    local_irq_restore(flags);
+    }
+}
+/**
+ *  flags & 0x1     cmd
+ *  flags & 0x2     addrl
+ *  flags & 0x4     addrh
+ *  flags & 0x8     timing
+ *  flags & 0x10    idl
+ *  flags & 0x20    status_idh
+ *  flags & 0x40    param
+ *  flags & 0x80    op_num
+ *  flags & 0x100   cs_rdy_map
+ ****/
+static void nand_setup(unsigned int flags ,struct ls1b_nand_info *info)
+{
+    int i,val1,val2,val3;
+    struct ls1b_nand_desc *nand_base = (struct ls1b_nand_desc *)(info->mmio_base);
+    nand_base->cmd = 0;
+    nand_base->addrl = (flags & NAND_ADDRL)==NAND_ADDRL ? info->nand_regs.addrl: info->nand_addrl;
+    nand_base->addrh = (flags & NAND_ADDRH)==NAND_ADDRH ? info->nand_regs.addrh: info->nand_addrh;
+    nand_base->timing = (flags & NAND_TIMING)==NAND_TIMING ? info->nand_regs.timing: info->nand_timing;
+    nand_base->op_num = (flags & NAND_OP_NUM)==NAND_OP_NUM ? info->nand_regs.op_num: info->nand_op_num;
+    nand_base->cs_rdy_map = (flags & NAND_CS_RDY_MAP)==NAND_CS_RDY_MAP ? info->nand_regs.cs_rdy_map: info->nand_cs_rdy_map;
+    if(flags & NAND_CMD){
+            nand_base->cmd = (info->nand_regs.cmd) & (~0xff);
+            nand_base->cmd = info->nand_regs.cmd;
+#if 0
+            if(info->nand_regs.cmd & 0x20){
+            i = 100;
+            while(!ls1b_nand_status(info)){
+                if(!(i--)){
+                    write_z_cmd;
+                    break;
+                }
+                udelay(30);
+            }
+            *(int *)(info->data_buff) = nand_base->idl;
+        }
+#endif            
+    }
+    else
+        nand_base->cmd = info->nand_cmd;
+    
+}
+static void ls1b_nand_cmdfunc(struct mtd_info *mtd, unsigned command,int column, int page_addr)
+{
+        struct ls1b_nand_info *info = mtd->priv;
+        unsigned cmd_prev;
+        int status_time,page_prev;
+        int timeout = CHIP_DELAY_TIMEOUT;
+        init_completion(&info->cmd_complete);
+        cmd_prev = info->cmd;
+        page_prev = info->page_addr;
+        info->cmd = command;
+        info->page_addr = page_addr;
+        switch(command){
+#if 1 
+            case NAND_CMD_READOOB:
+                if(info->state == STATE_BUSY){
+                    printk("nandflash chip if busy...\n");
+                    return;
+                }
+
+                info->state = STATE_BUSY; 
+                info->buf_count = mtd->oobsize;
+                info->buf_start = 0;
+                info->cac_size = info->buf_count;
+                if(info->buf_count <=0 )
+                    break;
+                /*nand regs set*/
+                info->nand_regs.addrh =  SPARE_ADDRH(page_addr);
+                info->nand_regs.addrl = SPARE_ADDRL(page_addr) + mtd->writesize;
+                info->nand_regs.op_num = info->buf_count;
+               /*nand cmd set */ 
+                info->nand_regs.cmd = 0; 
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->read = 1;
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->op_spare = 1;
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->cmd_valid = 1;
+                /*dma regs config*/
+                info->dma_regs.length =ALIGN_DMA(info->buf_count);
+                ((struct ls1b_nand_dma_cmd *)&(info->dma_regs.cmd))->dma_int_mask = 1;
+                /*dma GO set*/       
+                nand_setup(NAND_ADDRL|NAND_ADDRH|NAND_OP_NUM|NAND_CMD,info);
+                dma_setup(DMA_LENGTH|DMA_CMD,info);
+                break;
+#endif
+//            case NAND_CMD_READOOB:
+            case NAND_CMD_READ0:
+                if(info->state == STATE_BUSY){
+                    printk("nandflash chip if busy...\n");
+                    return;
+                }
+                info->state = STATE_BUSY;
+                info->buf_count = mtd->oobsize + mtd->writesize ;
+                info->buf_start =  0 ;
+                info->cac_size = info->buf_count;
+                if(info->buf_count <=0 )
+                    break;
+                info->nand_regs.addrh = SPARE_ADDRH(page_addr);
+                info->nand_regs.addrl = SPARE_ADDRL(page_addr);
+                info->nand_regs.op_num = info->buf_count;
+               /*nand cmd set */ 
+                info->nand_regs.cmd = 0; 
+                info->dma_regs.cmd = 0;
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->read = 1;
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->op_spare = 1;
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->op_main = 1;
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->cmd_valid = 1; 
+                /*dma regs config*/
+                info->dma_regs.length = ALIGN_DMA(info->buf_count);
+                ((struct ls1b_nand_dma_cmd *)&(info->dma_regs.cmd))->dma_int_mask = 1;
+                dma_setup(DMA_LENGTH|DMA_CMD,info);
+                nand_setup(NAND_ADDRL|NAND_ADDRH|NAND_OP_NUM|NAND_CMD,info);
+                break;
+            case NAND_CMD_SEQIN:
+                if(info->state == STATE_BUSY){
+                    printk("nandflash chip if busy...\n");
+                    return;
+                }
+//                printk("writing :page_addr===========%d\n",page_addr);
+                info->state = STATE_BUSY;
+                info->buf_count = mtd->oobsize + mtd->writesize - column;
+                info->buf_start = 0;
+                info->seqin_column = column;
+                info->seqin_page_addr = page_addr;
+                complete(&info->cmd_complete);
+                break;
+            case NAND_CMD_PAGEPROG:
+//                info->coherent = 0;
+                if(info->state != STATE_BUSY){
+                    printk("nandflash chip ops error...\n");
+                    return;
+                }
+//                info->state = STATE_BUSY;
+                if(cmd_prev != NAND_CMD_SEQIN){
+                    printk("Prev cmd don't complete...\n");
+                    break;
+                }
+                if(info->buf_count <= 0 )
+                    break;
+
+#if 0                
+                if(((info->num)++) % 512 == 0){
+                    printk("nand have write : %d M\n",(info->size)++); 
+                }
+#endif
+                /*nand regs set*/
+                info->nand_regs.addrh =  SPARE_ADDRH(info->seqin_page_addr);
+                info->nand_regs.addrl =  SPARE_ADDRL(info->seqin_page_addr) + info->seqin_column;
+                info->nand_regs.op_num = info->buf_start;
+                /*nand cmd set */ 
+                info->nand_regs.cmd = 0; 
+                info->dma_regs.cmd = 0;
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->write = 1;
+                if(info->seqin_column < mtd->writesize)
+                    ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->op_main = 1;
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->op_spare = 1;
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->cmd_valid = 1; 
+                /*dma regs config*/
+                info->dma_regs.length = ALIGN_DMA(info->buf_start);
+                ((struct ls1b_nand_dma_cmd *)&(info->dma_regs.cmd))->dma_int_mask = 1;
+                ((struct ls1b_nand_dma_cmd *)&(info->dma_regs.cmd))->dma_r_w = 1;
+                nand_setup(NAND_ADDRL|NAND_ADDRH|NAND_OP_NUM|NAND_CMD,info);
+                dma_setup(DMA_LENGTH|DMA_CMD,info);
+                break;
+            case NAND_CMD_RESET:
+                /*Do reset op anytime*/
+//                info->state = STATE_BUSY;
+               /*nand cmd set */ 
+                info->nand_regs.cmd = 0; 
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->reset = 1;
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->cmd_valid = 1; 
+                nand_setup(NAND_CMD,info);
+                status_time = STATUS_TIME_LOOP_R;
+                while(!ls1b_nand_status(info)){
+                    if(!(status_time--)){
+                        write_z_cmd;
+                        break;
+                    }
+                    udelay(50);
+                }
+//                info->state = STATE_READY;
+                complete(&info->cmd_complete);
+                break;
+            case NAND_CMD_ERASE1:
+                if(info->state == STATE_BUSY){
+                    printk("nandflash chip if busy...\n");
+                    return;
+                }
+                info->state = STATE_BUSY;
+                
+                /*nand regs set*/
+                info->nand_regs.addrh =  NO_SPARE_ADDRH(page_addr);
+                info->nand_regs.addrl =  NO_SPARE_ADDRL(page_addr) ;
+               /*nand cmd set */
+                info->nand_regs.cmd = 0; 
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->erase_one = 1;
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->cmd_valid = 1;
+                nand_setup(NAND_ADDRL|NAND_ADDRH|NAND_OP_NUM|NAND_CMD,info);
+//                show_dma_regs(0xbfe78000,0);
+                status_time = STATUS_TIME_LOOP_E;
+ //               printk("erasing :page_addr===========%d\n",page_addr);
+                udelay(2000);    
+                while(!ls1b_nand_status(info)){
+                    if(!(status_time--)){
+                        write_z_cmd;
+                        break;
+                    }
+                    udelay(50);    
+                }
+                complete(&info->cmd_complete);
+                info->state = STATE_READY;
+                break;
+            case NAND_CMD_STATUS:
+                if(info->state == STATE_BUSY){
+                    printk("nandflash chip if busy...\n");
+                    return;
+                }
+                info->state = STATE_BUSY;
+                info->buf_count = 0x1;
+                info->buf_start = 0x0;
+                *(unsigned char *)info->data_buff=ls1b_nand_status(info) | 0x80;
+                complete(&info->cmd_complete);
+                info->state = STATE_READY;
+                break;
+            case NAND_CMD_READID:
+                if(info->state == STATE_BUSY){
+                    printk("nandflash chip if busy...\n");
+                    return;
+                }
+                info->state = STATE_BUSY;
+                info->buf_count = 0x4;
+                info->buf_start = 0;
+
+//                printk(KERN_ERR "IDS=============================0x%x\n",*((int *)(info->data_buff)));
+
+               {
+
+                   unsigned int id_val_l=0,id_val_h=0;
+                   unsigned int timing = 0;
+                   unsigned char *data = (unsigned char *)(info->data_buff);
+                   _NAND_READ_REG(0xc,timing);
+                   _NAND_SET_REG(0xc,0x30f0); 
+                   _NAND_SET_REG(0x0,0x21); 
+
+                   while(((id_val_l |= _NAND_IDL) & 0xff)  == 0){
+                       id_val_h = _NAND_IDH;
+                   }
+
+//                   printk("id_val_l=0x%08x\nid_val_h=0x%08x\n",id_val_l,id_val_h);
+                   _NAND_SET_REG(0xc,timing);
+                   data[0]  = (id_val_h & 0xff);
+                   data[1]  = (id_val_l & 0xff000000)>>24;
+                   data[2]  = (id_val_l & 0x00ff0000)>>16;
+                   data[3]  = (id_val_l & 0x0000ff00)>>8;
+//                printk(KERN_ERR "IDS=============================0x%x\n",*((int *)(info->data_buff)));
+
+               }
+//                info->state = STATE_READY;
+                complete(&info->cmd_complete);
+                info->state = STATE_READY;
+                break;
+            case NAND_CMD_ERASE2:
+            case NAND_CMD_READ1:
+                complete(&info->cmd_complete);
+                break;
+            default :
+                printk(KERN_ERR "non-supported command.\n");
+                complete(&info->cmd_complete);
+		break;
+        }
+        wait_for_completion_timeout(&info->cmd_complete,timeout);
+        if(info->cmd == NAND_CMD_READ0 || info->cmd == NAND_CMD_READOOB ){
+            dma_cache_inv((unsigned long)(info->data_buff),info->cac_size);
+        }
+//        info->state = STATE_READY;
+
+}
+static int ls1b_nand_detect(struct mtd_info *mtd)
+{
+        return (mtd->erasesize != 1<<17 || mtd->writesize != 1<<11 || mtd->oobsize != 1<<6);
+
+}
+
+static void test_handler(unsigned long data)
+{
+    u32 val;
+
+//    printk("%s.\n",__func__);
+    struct ls1b_nand_info *s = (struct ls1b_nand_info *)data;
+    mod_timer(&s->test_timer, jiffies+1);
+    val = s->dma_ask_phy | 0x4;
+    *((volatile unsigned int *)0xbfd01160) = val;
+    udelay(1000);
+}
+
+
+static void ls1b_nand_init_info(struct ls1b_nand_info *info)
+{
+
+
+    *((volatile unsigned int *)0xbfe78018) = 0x30000;
+    info->timing_flag = 1;/*0:read; 1:write;*/
+    info->num=0;
+    info->size=0;
+//    info->coherent = 0;
+    info->cac_size = 0; 
+    info->state = STATE_READY;
+    info->cmd = -1;
+    info->page_addr = -1;
+    info->nand_addrl = 0x0;
+    info->nand_addrh = 0x0;
+    info->nand_timing =0x206;// 0x4<<8 | 0x12;
+//    info->nand_timing = 0x4<<8 | 0x12;
+    info->nand_op_num = 0x0;
+    info->nand_cs_rdy_map = 0x88442200;
+    info->nand_cmd = 0;
+
+    info->dma_orderad = 0x0;
+    info->dma_saddr = info->data_buff_phys;
+    info->dma_daddr = DMA_ACCESS_ADDR;
+    info->dma_length = 0x0;
+    info->dma_step_length = 0x0;
+    info->dma_step_times = 0x1;
+    info->dma_cmd = 0x0;
+
+
+    init_timer(&info->test_timer);
+    info->test_timer.function = test_handler;
+    info->test_timer.expires = jiffies + 10;
+    info->test_timer.data = (unsigned long)info;
+//    add_timer(&info->test_timer);
+
+
+    info->order_reg_addr = ORDER_REG_ADDR;
+}
+#if 0
+/***************************************************************************
+ * Description:
+ * Parameters: 
+ * Author  :Sunyoung_yg 
+ * Date    : 2014-05-05
+ ***************************************************************************/
+ int mtd_device_parse_register(struct mtd_info *mtd, const char **types,
+			      struct mtd_part_parser_data *parser_data,
+			      const struct mtd_partition *parts,
+			      int nr_parts)
+{
+	int err;
+	struct mtd_partition *real_parts;
+
+	err = parse_mtd_partitions(mtd, types, &real_parts, parser_data);
+	if (err <= 0 && nr_parts && parts) {
+		real_parts = kmemdup(parts, sizeof(*parts) * nr_parts,
+				     GFP_KERNEL);
+		if (!real_parts)
+			err = -ENOMEM;
+		else
+			err = nr_parts;
+	}
+
+	if (err > 0) {
+		err = add_mtd_partitions(mtd, real_parts, err);
+		kfree(real_parts);
+	} else if (err == 0) {
+		err = add_mtd_device(mtd);
+		if (err == 1)
+			err = -ENODEV;
+	}
+
+	return err;
+}
+EXPORT_SYMBOL_GPL(mtd_device_parse_register);
+#endif
+
+static int ls1b_nand_probe(struct platform_device *pdev)
+{
+        struct ls1b_nand_platform_data *pdata;
+	struct ls1b_nand_info *info;
+	struct nand_chip *this;
+	struct mtd_info *mtd;
+	struct resource *r;
+	int ret = 0, irq;
+
+	pdata = pdev->dev.platform_data;
+
+	if (!pdata) {
+		dev_err(&pdev->dev, "no platform data defined\n");
+		return -ENODEV;
+	}
+
+	mtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct ls1b_nand_info),
+			GFP_KERNEL);
+	if (!mtd) {
+		dev_err(&pdev->dev, "failed to allocate memory\n");
+		return -ENOMEM;
+	}
+
+	info = (struct ls1b_nand_info *)(&mtd[1]);
+	info->pdev = pdev;
+
+	this = &info->nand_chip;
+	mtd->priv = info;
+        info->drcmr_dat =(unsigned int ) dma_alloc_coherent(&pdev->dev, MAX_BUFF_SIZE,
+				&info->drcmr_dat_phys, GFP_KERNEL);
+        info->drcmr_dat = CAC_ADDR(info->drcmr_dat);
+        info->dma_ask =(unsigned int ) dma_alloc_coherent(&pdev->dev, MAX_BUFF_SIZE,
+				&info->dma_ask_phy, GFP_KERNEL);
+
+//        printk("info->drcmr_dat===================0x%08x\n",info->drcmr_dat);
+        if(!info->drcmr_dat){
+                dev_err(&pdev->dev,"fialed to allocate memory\n");
+                return ENOMEM;
+        }
+        r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (r == NULL) {
+		dev_err(&pdev->dev, "no IO memory resource defined\n");
+		ret = -ENODEV;
+		goto fail_put_clk;
+	}
+
+	r = request_mem_region(r->start, r->end - r->start + 1, pdev->name);
+	if (r == NULL) {
+		dev_err(&pdev->dev, "failed to request memory resource\n");
+		ret = -EBUSY;
+		goto fail_put_clk;
+	}
+
+	info->mmio_base = ioremap(r->start, r->end - r->start + 1);
+	if (info->mmio_base == NULL) {
+		dev_err(&pdev->dev, "ioremap() failed\n");
+		ret = -ENODEV;
+		goto fail_free_res;
+	}
+        ret = ls1b_nand_init_buff(info);
+	if (ret)
+		goto fail_free_io;
+        
+        irq = platform_get_irq(pdev, 0);
+	if (irq < 0) {
+		dev_err(&pdev->dev, "no IRQ resource defined\n");
+		ret = -ENXIO;
+		goto fail_put_clk;
+	}
+	ret = request_irq(irq, ls1b_nand_irq, IRQF_DISABLED,pdev->name, info);
+	if (ret < 0) {
+		dev_err(&pdev->dev, "failed to request IRQ\n");
+		goto fail_free_buf;
+	}
+
+        ls1b_nand_init_mtd(mtd, info);
+
+         ls1b_nand_init_info(info);
+        platform_set_drvdata(pdev, mtd);   
+
+        if (nand_scan(mtd, 1)) {
+		dev_err(&pdev->dev, "failed to scan nand\n");
+		ret = -ENXIO;
+		goto fail_free_irq;
+	}
+        if(ls1b_nand_detect(mtd)){
+                dev_err(&pdev->dev, "driver don't support the Flash!\n");
+                ret = -ENXIO;
+                goto fail_free_irq;
+        }
+
+	return  mtd_device_parse_register(mtd, NULL, 0,
+			pdata ? pdata->parts : NULL,
+			pdata ? pdata->nr_parts: 0);
+fail_free_irq:
+	free_irq(13, info);
+fail_free_buf:
+    	dma_free_coherent(&pdev->dev, info->data_buff_size,info->data_buff, info->data_buff_phys);
+fail_free_io:
+	iounmap(info->mmio_base);
+fail_free_res:
+	release_mem_region(r->start, r->end - r->start + 1);
+fail_put_clk:
+fail_free_mtd:
+	kfree(mtd);
+	return ret;
+}
+
+static int ls1b_nand_remove(struct platform_device *pdev)
+{
+    	struct mtd_info *mtd = platform_get_drvdata(pdev);
+	struct ls1b_nand_info *info = mtd->priv;
+
+	platform_set_drvdata(pdev, NULL);
+
+	nand_release(mtd);
+	free_irq(13, info);
+        kfree(info->drcmr_dat);
+struct ls1b_nand_platform_data{
+    int enable_arbiter;
+    struct mtd_partition *parts;
+    unsigned int nr_parts;
+};
+        kfree(mtd);
+
+	return 0;
+}
+static int ls1b_nand_suspend(struct platform_device *pdev)
+{
+	struct mtd_info *mtd = (struct mtd_info *)platform_get_drvdata(pdev);
+	struct ls1b_nand_info *info = mtd->priv;
+
+	//printk("%s",__FUNCTION__);
+	if (info->state != STATE_READY) {
+		dev_err(&pdev->dev, "driver busy, state = %d\n", info->state);
+		return -EAGAIN;
+	}
+
+	return 0;
+}
+static int ls1b_nand_resume(struct platform_device *pdev)
+{
+	//printk("%s",__FUNCTION__);
+    *((volatile unsigned int *)0xbfd00420) = 0x14000000;
+        return 0;
+}
+static struct platform_driver ls1b_nand_driver = {
+	.driver = {
+		.name	= "ls1b-nand",
+                .owner	= THIS_MODULE,
+	},
+	.probe		= ls1b_nand_probe,
+	.remove		= ls1b_nand_remove,
+	.suspend	= ls1b_nand_suspend,
+	.resume		= ls1b_nand_resume,
+};
+
+static int __init ls1b_nand_init(void)
+{
+    int ret = 0;
+
+    *((volatile unsigned int *)0xbfd00420) = 0x14000000;
+    ret = platform_driver_register(&ls1b_nand_driver);
+    if(ret){
+        printk(KERN_ERR "failed to register ls1b_1g_nand_driver");
+    }
+    return ret;
+}
+static void __exit ls1b_nand_exit(void)
+{
+    platform_driver_unregister(&ls1b_nand_driver);
+}
+module_init(ls1b_nand_init);
+module_exit(ls1b_nand_exit);
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("ls1b_1a NAND controller driver");
diff -uNra linux-3.0.82/drivers/mtd/nand/ls1b-nand.c linux-3.0.82x/drivers/mtd/nand/ls1b-nand.c
--- linux-3.0.82/drivers/mtd/nand/ls1b-nand.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/mtd/nand/ls1b-nand.c	2017-09-23 03:42:49.662676151 +0800
@@ -0,0 +1,1423 @@
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/delay.h>
+#include <linux/clk.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <asm/dma.h>
+#include <linux/slab.h>
+
+
+#define DMA_ACCESS_ADDR     0x1fe78040
+#define ORDER_REG_ADDR      (KSEG1ADDR(0x1fd01160))
+#define LS1X_NAND_REG_BASE      (0xbfe78000)
+#define MAX_BUFF_SIZE	4096
+#define PAGE_SHIFT      12
+#define LS1CSOC	1
+#ifdef	CONFIG_LS1A_MACH 
+	#define NO_SPARE_ADDRH(x)   ((x))   
+	#define NO_SPARE_ADDRL(x)   ((x) << (PAGE_SHIFT))
+	#define SPARE_ADDRH(x)      ((x))   
+	#define SPARE_ADDRL(x)      ((x) << (PAGE_SHIFT))
+#elif (defined LS1CSOC)
+	#define NO_SPARE_ADDRH(x)   (x)
+	#define NO_SPARE_ADDRL(x)   0
+	#define SPARE_ADDRH(x)      (x)
+	#define SPARE_ADDRL(x)      0
+#else
+	#define NO_SPARE_ADDRH(x)   ((x) >> (32 - (PAGE_SHIFT - 1 )))   
+	#define NO_SPARE_ADDRL(x)   ((x) << (PAGE_SHIFT - 1))
+	#define SPARE_ADDRH(x)      ((x) >> (32 - (PAGE_SHIFT )))   
+	#define SPARE_ADDRL(x)      ((x) << (PAGE_SHIFT ))
+#endif
+#define ALIGN_DMA(x)       (((x)+ 3)/4)
+
+#define	GPIO_CONF1	(ioremap(0x1fd010c4, 4))
+#define	GPIO_CONF2	(ioremap(0x1fd010c8, 4))
+#define	GPIO_MUX	(ioremap(0x1fd00420, 4))
+
+/*
+//#define USE_POLL
+#undef	USE_POLL
+#ifdef USE_POLL
+#define complete(...)
+#define init_completion(...)
+#define wait_for_completion_timeout(...)
+#define wait_for_completion(...)
+#define request_irq(...) (0)
+#define free_irq(...) 
+#endif
+*/
+
+
+#define CHIP_DELAY_TIMEOUT (2*HZ/10)
+
+#define STATUS_TIME_LOOP_R  100 
+#define STATUS_TIME_LOOP_WS  300  
+#define STATUS_TIME_LOOP_WM  60  
+#define STATUS_TIME_LOOP_E  100  
+
+#define NAND_CMD        0x1
+#define NAND_ADDRL      0x2
+#define NAND_ADDRH      0x4
+#define NAND_TIMING     0x8
+#define NAND_IDL        0x10
+#define NAND_STATUS_IDL 0x20
+#define NAND_PARAM      0x40
+#define NAND_OP_NUM     0X80
+#define NAND_CS_RDY_MAP 0x100
+
+#define DMA_ORDERAD     0x1
+#define DMA_SADDR       0x2
+#define DMA_DADDR       0x4
+#define DMA_LENGTH      0x8
+#define DMA_STEP_LENGTH 0x10
+#define DMA_STEP_TIMES  0x20
+#define DMA_CMD         0x40
+
+#define NAND_ECC_OFF    0
+#define NAND_ECC_ON     1
+#define RAM_OP_OFF      0
+#define RAM_OP_ON       1
+
+
+#if 0  /* read ids use gpio*/
+
+#define NAND_GPIO_MUX  0x0a000000
+#define GPIO_MUX_CTRL  0xbfd00420
+
+#define GPIO_CONF3      0xbfd010c8
+#define GPIO_IEN3        0xbfd010d8
+#define GPIO_IDATA3      0xbfd010e8
+#define GPIO_ODATA3      0xbfd010f8
+
+#define NAND_D0         6  //70 - 64
+#define NAND_D1         7  //71 - 64
+#define NAND_D2         8  //72 - 64
+#define NAND_D3         9  //73 - 64
+#define NAND_D4         10 //74 - 64
+#define NAND_D5         11 //75 - 64
+#define NAND_CLE        12 //76 - 64
+#define NAND_ALE        13 //77 - 64
+#define NAND_RE         14 //78 - 64
+#define NAND_WE         15 //79 - 64
+#define NAND_CE         16 //80 - 64
+#define NAND_RDY        17 //81 - 64
+#define NAND_D6         18 //82 - 64 
+#define NAND_D7         19 //83 - 64
+
+#define _EN_PIN(x)      (*((volatile unsigned int*)(GPIO_CONF3)) = *((volatile unsigned int *)GPIO_CONF3) | (0x1 << (x)))          
+#define _DIS_PIN(x)      (*((volatile unsigned int*)(GPIO_CONF3)) = *((volatile unsigned int *)GPIO_CONF3) & (~(0x1 << (x))))          
+#define _EN_IN(x)      (*((volatile unsigned int*)(GPIO_IEN3)) = *((volatile unsigned int *)GPIO_IEN3) | (0x1 << (x)))          
+#define _DIS_IN(x)      (*((volatile unsigned int*)(GPIO_IEN3)) = *((volatile unsigned int *)GPIO_IEN3) & (~(0x1 << (x))))          
+#define _SET_ONE(x)      (*((volatile unsigned int*)(GPIO_ODATA3)) = *((volatile unsigned int *)GPIO_ODATA3) | (0x1 << (x)))          
+#define _SET_ZERO(x)      (*((volatile unsigned int*)(GPIO_ODATA3)) = *((volatile unsigned int *)GPIO_ODATA3) & (~(0x1 << (x))))          
+#define  _READ_GPIO3     (*(volatile unsigned int *)(GPIO_ODATA3))
+
+#define _EN_OUT(x)      _DIS_IN(x)
+
+#define _DIS_CTRL_IO            do{     \
+            _DIS_PIN(NAND_CLE);         \
+            _DIS_PIN(NAND_ALE);         \
+            _DIS_PIN(NAND_RE);          \
+            _DIS_PIN(NAND_WE);          \
+            _DIS_PIN(NAND_CE);          \
+            _DIS_PIN(NAND_RDY);         \
+            }while(0)
+
+#define _DIS_DATA_IO            do{     \
+            _DIS_PIN(NAND_D0);           \
+            _DIS_PIN(NAND_D1);           \
+            _DIS_PIN(NAND_D2);           \
+            _DIS_PIN(NAND_D3);           \
+            _DIS_PIN(NAND_D4);           \
+            _DIS_PIN(NAND_D5);           \
+            _DIS_PIN(NAND_D6);           \
+            _DIS_PIN(NAND_D7);           \
+        }while(0)
+#define DIS_GPIO_READ_ID    do{         \
+            _DIS_CTRL_IO;               \
+            _DIS_DATA_IO;               \
+        }while(0)
+
+#define _EN_DATA_IO             do{     \
+            _EN_PIN(NAND_D0) ;           \
+            _EN_PIN(NAND_D1) ;           \
+            _EN_PIN(NAND_D2) ;           \
+            _EN_PIN(NAND_D3) ;           \
+            _EN_PIN(NAND_D4) ;           \
+            _EN_PIN(NAND_D5) ;           \
+            _EN_PIN(NAND_D6) ;           \
+            _EN_PIN(NAND_D7) ;           \
+        }while(0)
+
+#define _EN_IN_DATA_IO          do{     \
+            _EN_IN(NAND_D0) ;            \
+            _EN_IN(NAND_D1) ;            \
+            _EN_IN(NAND_D2) ;            \
+            _EN_IN(NAND_D3) ;            \
+            _EN_IN(NAND_D4) ;            \
+            _EN_IN(NAND_D5) ;            \
+            _EN_IN(NAND_D6) ;            \
+            _EN_IN(NAND_D7) ;            \
+        }while(0)
+           
+#define  _EN_OUT_DATA_IO            do{   \
+            _EN_OUT(NAND_D0);            \
+            _EN_OUT(NAND_D1);            \
+            _EN_OUT(NAND_D2);            \
+            _EN_OUT(NAND_D3);            \
+            _EN_OUT(NAND_D4);            \
+            _EN_OUT(NAND_D5);            \
+            _EN_OUT(NAND_D6);            \
+            _EN_OUT(NAND_D7);           \
+        }while(0)    
+
+#define DIS_DATA_IO    _DIS_DATA_IO
+
+#define _DIS_GPIO3    *((volatile unsigned int *)GPIO_CONF3) = 0
+
+
+#define _PUTODATA32(x)      *((volatile unsigned int *)GPIO_ODATA3) = (x)
+#define _GETODATA32(x)      (x) = *((volatile unsigned int *)GPIO_ODATA3)  
+
+#define _PUTIDATA32(x)      *((volatile unsigned int *)GPIO_IDATA3) = (x)
+#define _GETIDATA32(x)      (x) = *((volatile unsigned int *)GPIO_IDATA3)  
+
+
+#define SET_UP(x)    do{                \
+                _EN_PIN((x));           \
+                _EN_OUT((x));           \
+                _SET_ONE((x));          \
+                _READ_GPIO3;            \
+            }while(0)
+
+#define SET_DOWN(x)    do{                \
+                _EN_PIN((x));           \
+                _EN_OUT((x));           \
+                _SET_ZERO((x));          \
+                _READ_GPIO3;            \
+            }while(0)
+/*EN_SEND_DATA_IO*/
+#define  EN_SEND_DATA_IO        do{      \
+            _EN_DATA_IO     ;            \
+            _EN_OUT_DATA_IO ;           \
+            _READ_GPIO3;                \
+        }while(0)
+/*EN_GET_DATA_IO*/
+#define  EN_GET_DATA_IO         do{     \
+            _EN_DATA_IO;                 \
+            _EN_IN_DATA_IO;              \
+            _READ_GPIO3;               \
+        }while(0)
+ 
+static void nand_gpio_init(void)
+{
+//    *((unsigned int *)GPIO_MUX_CTRL) = NAND_GPIO_MUX;
+//    *((unsigned int *)GPIO_MUX_CTRL) = NAND_GPIO_MUX;
+#ifdef	CONFIG_LS1A_MACH
+{
+	int val;
+#ifdef CONFIG_NAND_USE_LPC_PWM01 //NANDå¤�ç”¨LPC PWM01
+	val = __raw_readl(GPIO_MUX);
+	val |= 0x2a000000;
+	__raw_writel(val, GPIO_MUX);
+
+	val = __raw_readl(GPIO_CONF2);
+	val &= ~(0xffff<<6);			//nand_D0~D7 & nand_control pin
+	__raw_writel(val, GPIO_CONF2);
+#elif CONFIG_NAND_USE_SPI1_PWM23 //NANDå¤�ç”¨SPI1 PWM23
+	val = __raw_readl(GPIO_MUX);
+	val |= 0x14000000;
+	__raw_writel(val, GPIO_MUX);
+
+	val = __raw_readl(GPIO_CONF1);
+	val &= ~(0xf<<12);				//nand_D0~D3
+	__raw_writel(val, GPIO_CONF1);
+
+	val = __raw_readl(GPIO_CONF2);
+	val &= ~(0xfff<<12);			//nand_D4~D7 & nand_control pin
+	__raw_writel(val, GPIO_CONF2);
+#endif
+}
+#endif
+}
+
+static void gpio_senddata8(unsigned char val)
+{
+    unsigned int d32=0;
+//    EN_SEND_DATA_IO;
+    _GETODATA32(d32);
+    d32 = (d32 & (~(0x3f << 6)) | ((val & 0x3f)<<6));
+    d32 = (d32 & (~(0x3 << 18)) | (((val >> 6) & 0x3)<<18));
+    _PUTODATA32(d32);
+    _READ_GPIO3;
+    SET_DOWN(NAND_WE);
+    SET_UP(NAND_WE);
+    //delay;
+
+//   DIS_DATA_IO;
+}
+
+static unsigned char gpio_getdata8(void)
+{
+    unsigned int d32=0;
+    unsigned char val=0;
+    //EN_GET_DATA_IO;
+    //delay
+    SET_DOWN(NAND_RE);
+    _GETIDATA32(d32);
+    SET_UP(NAND_RE);
+ //   DIS_DATA_IO;
+    val = (d32 >> 18) & 0x3;
+    val = (val << 6) |(d32 >> 6) & 0x3f;
+    return val;
+
+}
+static unsigned int nand_gpio_read_id(void)
+{
+    unsigned char val[4]={0}; //4 bytes
+    nand_gpio_init();
+    EN_SEND_DATA_IO;
+
+    SET_DOWN(NAND_CE);
+
+    /*send command*/
+    SET_DOWN(NAND_ALE);
+    SET_UP(NAND_RE);
+    SET_UP(NAND_CLE);
+    gpio_senddata8(NAND_CMD_READID);
+    //delay
+    SET_DOWN(NAND_CLE);
+
+    /*send addr*/
+    SET_UP(NAND_ALE);
+    gpio_senddata8(0x00);
+    SET_DOWN(NAND_ALE);
+    //delay min 60ns
+    /*read id*/
+    EN_GET_DATA_IO;
+    val[0] = gpio_getdata8();
+//    printk("1th:%x\n",val[0]);
+    val[1] = gpio_getdata8();
+//    printk("2th:%x\n",val[1]);
+    val[2] = gpio_getdata8();
+//    printk("3th:%x\n",val[2]);
+    val[3] = gpio_getdata8();
+//    printk("4th:%x\n",val[3]);
+    DIS_GPIO_READ_ID;
+return *((unsigned int *)val);
+}
+
+#endif /* end:read ids use gpio*/
+
+#define  _NAND_IDL      ( *((volatile unsigned int*)(0xbfe78010)))
+#define  _NAND_IDH       (*((volatile unsigned int*)(0xbfe78014)))
+#define  _NAND_BASE      0xbfe78000
+#define  _NAND_SET_REG(x,y)   do{*((volatile unsigned int*)(_NAND_BASE+x)) = (y);}while(0)                           
+#define  _NAND_READ_REG(x,y)  do{(y) =  *((volatile unsigned int*)(_NAND_BASE+x));}while(0) 
+
+#define _NAND_TIMING_TO_READ    _NAND_SET_REG(0xc,0x205)
+#define _NAND_TIMING_TO_WRITE   _NAND_SET_REG(0xc,0x205)
+
+enum{
+	ERR_NONE = 0,
+	ERR_DMABUSERR = -1,
+	ERR_SENDCMD = -2,
+	ERR_DBERR = -3,
+	ERR_BBERR = -4,
+};
+enum{
+	STATE_READY = 0, 
+	STATE_BUSY,
+};
+
+struct ls1b_nand_platform_data{
+	int enable_arbiter;
+	struct mtd_partition *parts;
+	unsigned int nr_parts;
+};
+struct ls1b_nand_cmdset{
+	uint32_t cmd_valid :1;
+	uint32_t read :1;
+	uint32_t write :1;
+	uint32_t erase_one :1;
+	uint32_t erase_con :1;
+	uint32_t read_id :1;
+	uint32_t reset :1;
+	uint32_t read_sr :1;
+	uint32_t op_main :1;
+	uint32_t op_spare :1;
+	uint32_t done :1;
+#if defined LS1CSOC
+	uint32_t ecc_rd :1; //11
+	uint32_t ecc_wr :1; //12
+	uint32_t int_en :1; //13
+	uint32_t resv14 :1; //14
+	uint32_t ram_op :1; //15
+#else
+	uint32_t resv1:5; //11-15 reserved
+#endif
+	uint32_t nand_rdy :4;//16-19
+	uint32_t nand_ce :4;//20-23
+#if defined LS1CSOC
+	uint32_t ecc_dma_req :1; //24
+	uint32_t nul_dma_req :1; //25
+	uint32_t resv26 :6;//26-31 reserved
+#else
+	uint32_t resv24:8;//24-31 reserved
+#endif        
+
+};
+
+struct ls1b_nand_dma_desc{
+	uint32_t orderad;
+	uint32_t saddr;
+	uint32_t daddr;
+	uint32_t length;
+	uint32_t step_length;
+	uint32_t step_times;
+	uint32_t cmd;
+};
+
+struct ls1b_nand_dma_cmd{
+	uint32_t dma_int_mask :1;
+	uint32_t dma_int :1;
+	uint32_t dma_sl_tran_over :1;
+	uint32_t dma_tran_over :1;
+	uint32_t dma_r_state :4;
+	uint32_t dma_w_state :4;
+	uint32_t dma_r_w :1;
+	uint32_t dma_cmd :2;
+	uint32_t revl :17;
+};
+
+struct ls1b_nand_desc{
+	uint32_t cmd;
+	uint32_t addrl;
+	uint32_t addrh;
+	uint32_t timing;
+	uint32_t idl;//readonly
+	uint32_t status_idh;//readonly
+	uint32_t param;
+	uint32_t op_num;
+	uint32_t cs_rdy_map;
+};
+
+struct ls1b_nand_info{
+	struct nand_chip nand_chip;
+	struct platform_device *pdev;
+	/* MTD data control*/
+	unsigned int buf_start;
+	unsigned int buf_count;
+	/* NAND registers*/
+	void __iomem *mmio_base;
+	struct ls1b_nand_desc nand_regs;
+	unsigned int nand_addrl;
+	unsigned int nand_addrh;
+	unsigned int nand_timing;
+	unsigned int nand_op_num;
+	unsigned int nand_cs_rdy_map;
+	unsigned int nand_cmd;
+	/* DMA information */
+	struct ls1b_nand_dma_desc dma_regs;
+	unsigned int order_reg_addr;
+	unsigned int dma_orderad;
+	unsigned int dma_saddr;
+	unsigned int dma_daddr;
+	unsigned int dma_length;
+	unsigned int dma_step_length;
+	unsigned int dma_step_times;
+	unsigned int dma_cmd;
+	int drcmr_dat;//dma descriptor address;
+	dma_addr_t drcmr_dat_phys;
+	size_t drcmr_dat_size;
+	unsigned char *data_buff;//dma data buffer;
+	dma_addr_t data_buff_phys;
+	size_t data_buff_size;
+	unsigned long cac_size;
+	unsigned long num;
+	unsigned long size;
+	struct timer_list test_timer;
+	unsigned int dma_ask;
+	unsigned int dma_ask_phy;
+
+	/* relate to the command */
+	unsigned int state;
+	//	int			use_ecc;	/* use HW ECC ? */
+	size_t data_size; /* data size in FIFO */
+	unsigned int cmd;
+	unsigned int page_addr;
+	struct completion cmd_complete;
+	unsigned int seqin_column;
+	unsigned int seqin_page_addr;
+	unsigned int timing_flag;
+	unsigned int timing_val;
+};
+
+
+/*static struct nand_ecclayout hw_largepage_ecclayout = {
+	.eccbytes = 24,
+	.eccpos = {
+		40, 41, 42, 43, 44, 45, 46, 47,
+		48, 49, 50, 51, 52, 53, 54, 55,
+		56, 57, 58, 59, 60, 61, 62, 63},
+	.oobfree = { {2, 38} }
+};*/
+#define show_data_debug  0
+#define show_debug(x,y)     show_debug_msk(x,y)
+#define show_debug_msk(x,y)   do{ if(show_data_debug) {printk(KERN_ERR "%s:\n",__func__);show_data(x,y);} }while(0)
+
+//static void show_data(void * base,int num)
+//{
+//    int i=0;
+//    unsigned char *arry=( unsigned char *) base;
+//    for(i=0;i<num;i++){
+//        if(!(i % 32)){
+//            printk(KERN_ERR "\n");
+//        }
+//        if(!(i % 16)){
+//            printk("  ");
+//        }
+//        printk("%02x ",arry[i]);
+//    }
+//    printk(KERN_ERR "\n");
+//
+//}
+
+
+static int ls1b_nand_init_buff(struct ls1b_nand_info *info)
+{
+	struct platform_device *pdev = info->pdev;
+	info->data_buff = dma_alloc_coherent(&pdev->dev, MAX_BUFF_SIZE,
+			&info->data_buff_phys, GFP_KERNEL);
+	info->data_buff = CAC_ADDR(info->data_buff);
+	if (info->data_buff == NULL)	{
+		dev_err(&pdev->dev, "failed to allocate dma buffer\n");
+		return -ENOMEM;
+	}
+	info->data_buff_size = MAX_BUFF_SIZE;
+	return 0;
+}
+//static int ls1b_nand_ecc_calculate(struct mtd_info *mtd, const uint8_t *dat,
+//		uint8_t *ecc_code)
+//{
+//	return 0;
+//}
+//static int ls1b_nand_ecc_correct(struct mtd_info *mtd, uint8_t *dat,
+//		uint8_t *read_ecc, uint8_t *calc_ecc)
+//{
+//	/*
+//	 * Any error include ERR_SEND_CMD, ERR_DBERR, ERR_BUSERR, we
+//	 * consider it as a ecc error which will tell the caller the
+//	 * read fail We have distinguish all the errors, but the
+//	 * nand_read_ecc only check this function return value
+//	 */
+//	return 0;
+//}
+
+//static void ls1b_nand_ecc_hwctl(struct mtd_info *mtd, int mode)
+//{
+//	return;
+//}
+
+
+static int ls1b_nand_waitfunc(struct mtd_info *mtd, struct nand_chip *this)
+{
+	udelay(50);
+	return 0;
+}
+
+static void ls1b_nand_select_chip(struct mtd_info *mtd, int chip)
+{
+	return;
+}
+
+static int ls1b_nand_dev_ready(struct mtd_info *mtd)
+{
+	return 1;
+}
+
+static void ls1b_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+	struct ls1b_nand_info *info = mtd->priv;
+	int real_len = min_t(size_t, len, info->buf_count - info->buf_start);
+	memcpy(buf, info->data_buff + info->buf_start, real_len);
+	info->buf_start += real_len;
+}
+static u16 ls1b_nand_read_word(struct mtd_info *mtd)
+{
+	struct ls1b_nand_info *info = mtd->priv;
+	u16 retval = 0xFFFF;
+	if (!(info->buf_start & 0x1) && info->buf_start < info->buf_count)	{
+		retval = *(u16 *) (info->data_buff + info->buf_start);
+	}
+	info->buf_start += 2;
+	return retval;
+}
+static uint8_t ls1b_nand_read_byte(struct mtd_info *mtd)
+{
+	struct ls1b_nand_info *info = mtd->priv;
+	char retval = 0xFF;
+	if (info->buf_start < info->buf_count){
+		retval = info->data_buff[(info->buf_start)++];
+	}
+	return retval;
+}
+
+static void ls1b_nand_write_buf(struct mtd_info *mtd, const uint8_t *buf,
+		int len)
+{
+	struct ls1b_nand_info *info = mtd->priv;
+	int real_len = min_t(size_t, len, info->buf_count - info->buf_start);
+	memcpy(info->data_buff + info->buf_start, buf, real_len);
+	info->buf_start += real_len;
+}
+
+static int ls1b_nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf,
+		int len)
+{
+	int i = 0;
+	while (len--){
+		if (buf[i++] != ls1b_nand_read_byte(mtd)){
+			return -1;
+		}
+	}
+	return 0;
+}
+static void ls1b_nand_cmdfunc(struct mtd_info *mtd, unsigned command,int column, int page_addr);
+static void ls1b_nand_init_mtd(struct mtd_info *mtd,struct ls1b_nand_info *info)
+{
+	struct nand_chip *this = &info->nand_chip;
+	this->options = 8;//(f->flash_width == 16) ? NAND_BUSWIDTH_16: 0;
+	this->waitfunc		= ls1b_nand_waitfunc;
+	this->select_chip	= ls1b_nand_select_chip;
+	this->dev_ready		= ls1b_nand_dev_ready;
+	this->cmdfunc		= ls1b_nand_cmdfunc;
+	this->read_word		= ls1b_nand_read_word;
+	this->read_byte		= ls1b_nand_read_byte;
+	this->read_buf		= ls1b_nand_read_buf;
+	this->write_buf		= ls1b_nand_write_buf;
+	this->verify_buf	= ls1b_nand_verify_buf;
+//  this->ecc.mode		= NAND_ECC_NONE;
+ 	this->ecc.mode		= NAND_ECC_NONE;
+//	this->ecc.hwctl		= ls1b_nand_ecc_hwctl;
+//	this->ecc.calculate	= ls1b_nand_ecc_calculate;
+//	this->ecc.correct	= ls1b_nand_ecc_correct;
+//	this->ecc.size		= 2048;
+//  this->ecc.bytes         = 24;
+//	this->ecc.layout = &hw_largepage_ecclayout;
+	mtd->owner = THIS_MODULE;
+}
+static unsigned ls1b_nand_status(struct ls1b_nand_info *info)
+{
+	return (*((volatile unsigned int*) 0xbfe78000) & (0x1 << 10));
+}
+
+#define	clear_flag	do {*((volatile unsigned int *)(0xbfe78000)) &= 0x0;}while(0)
+#define write_z_cmd  do{                                    \
+	*((volatile unsigned int *)(0xbfe78000)) = 0;   \
+	*((volatile unsigned int *)(0xbfe78000)) = 0;   \
+	*((volatile unsigned int *)(0xbfe78000)) = 0x400; \
+}while(0)
+
+static irqreturn_t ls1b_nand_irq(int irq,void *devid)
+{
+	int status_time;
+	struct ls1b_nand_info *info = devid;
+	switch(info->cmd){
+		case NAND_CMD_READOOB:
+		case NAND_CMD_READ0:
+            udelay(1);
+            info->state = STATE_READY;
+            break;
+        case NAND_CMD_PAGEPROG:
+            udelay(10);
+            status_time=STATUS_TIME_LOOP_WS;
+            while(!(ls1b_nand_status(info))){
+                if(!(status_time--)){
+                    write_z_cmd;
+                    break;
+                }
+                udelay(50);
+            }
+            info->state = STATE_READY;
+            break;
+        default:
+            break;
+    }
+    complete(&info->cmd_complete);
+    return IRQ_HANDLED;
+   
+}
+/*
+ *  flags & 0x1   orderad
+ *  flags & 0x2   saddr
+ *  flags & 0x4   daddr
+ *  flags & 0x8   length
+ *  flags & 0x10  step_length
+ *  flags & 0x20  step_times
+ *  flags & 0x40  cmd
+ ***/
+static void dma_setup(unsigned int flags, struct ls1b_nand_info *info)
+{
+	long irqflags;
+	struct ls1b_nand_dma_desc *dma_base = (volatile struct ls1b_nand_dma_desc *) (info->drcmr_dat);
+	dma_base->orderad
+			= (flags & DMA_ORDERAD) == DMA_ORDERAD ? info->dma_regs.orderad
+					: info->dma_orderad;
+	dma_base->saddr = (flags & DMA_SADDR) == DMA_SADDR ? info->dma_regs.saddr
+			: info->dma_saddr;
+	dma_base->daddr = (flags & DMA_DADDR) == DMA_DADDR ? info->dma_regs.daddr
+			: info->dma_daddr;
+	dma_base->length
+			= (flags & DMA_LENGTH) == DMA_LENGTH ? info->dma_regs.length
+					: info->dma_length;
+	dma_base->step_length
+			= (flags & DMA_STEP_LENGTH) == DMA_STEP_LENGTH ? info->dma_regs.step_length
+					: info->dma_step_length;
+	dma_base->step_times
+			= (flags & DMA_STEP_TIMES) == DMA_STEP_TIMES ? info->dma_regs.step_times
+					: info->dma_step_times;
+	dma_base->cmd = (flags & DMA_CMD) == DMA_CMD ? info->dma_regs.cmd
+			: info->dma_cmd;
+
+	if ((dma_base->cmd) & (0x1 << 12))
+	{
+		dma_cache_wback((unsigned long)(info->data_buff), info->cac_size);
+	}
+	dma_cache_wback((unsigned long)(info->drcmr_dat),0x20);
+	local_irq_save(irqflags);
+	*(volatile unsigned int *) info->order_reg_addr
+			= ((unsigned int) info->drcmr_dat_phys) | 0x1 << 3;
+	while (*(volatile unsigned int *) info->order_reg_addr & 0x8){
+		;
+	}
+ local_irq_restore(irqflags);
+}
+
+static void sync_dma(struct ls1b_nand_info *info)
+{
+	int status_time;
+	status_time = STATUS_TIME_LOOP_WS;
+	while (!(*((volatile unsigned int*) (LS1X_NAND_REG_BASE)) & (0x1 << 10))) {
+		if (!(status_time--)) {
+			write_z_cmd;
+			break;
+		}
+		udelay(60);
+	}
+}
+/**
+ *  flags & 0x1     cmd
+ *  flags & 0x2     addrl
+ *  flags & 0x4     addrh
+ *  flags & 0x8     timing
+ *  flags & 0x10    idl
+ *  flags & 0x20    status_idh
+ *  flags & 0x40    param
+ *  flags & 0x80    op_num
+ *  flags & 0x100   cs_rdy_map
+ ****/
+static void nand_setup(unsigned int flags, struct ls1b_nand_info *info)
+{
+	volatile struct ls1b_nand_desc *nand_base =
+			(struct ls1b_nand_desc *) (info->mmio_base);
+	nand_base->cmd = 0;
+	nand_base->addrl
+			= (flags & NAND_ADDRL) == NAND_ADDRL ? info->nand_regs.addrl
+					: info->nand_addrl;
+	nand_base->addrh
+			= (flags & NAND_ADDRH) == NAND_ADDRH ? info->nand_regs.addrh
+					: info->nand_addrh;
+	nand_base->timing
+			= (flags & NAND_TIMING) == NAND_TIMING ? info->nand_regs.timing
+					: info->nand_timing;
+	nand_base->op_num
+			= (flags & NAND_OP_NUM) == NAND_OP_NUM ? info->nand_regs.op_num
+					: info->nand_op_num;
+	nand_base->cs_rdy_map
+			= (flags & NAND_CS_RDY_MAP) == NAND_CS_RDY_MAP ? info->nand_regs.cs_rdy_map
+					: info->nand_cs_rdy_map;
+	nand_base->param = ((nand_base->param) & 0xc000ffff) | (nand_base->op_num
+			<< 16);
+	if (flags & NAND_CMD){
+		nand_base->cmd = (info->nand_regs.cmd & (~1));
+		nand_base->cmd = info->nand_regs.cmd;
+	}
+	else{
+		nand_base->cmd = info->nand_cmd;
+	}
+}
+
+static void ls1b_nand_cmdfunc(struct mtd_info *mtd, unsigned command,
+		int column, int page_addr)
+{
+	struct ls1b_nand_info *info = mtd->priv;
+	unsigned cmd_prev;
+	int status_time, page_prev;
+	/*int timeout = CHIP_DELAY_TIMEOUT;*/
+	init_completion(&info->cmd_complete);
+	cmd_prev = info->cmd;
+	page_prev = info->page_addr;
+
+	info->cmd = command;
+	info->page_addr = page_addr;
+	switch (command)
+	{
+	case NAND_CMD_READOOB:
+		if (info->state == STATE_BUSY) {
+			printk(KERN_INFO "nandflash chip if busy...\n");
+			return;
+		}
+
+		info->state = STATE_BUSY;
+		info->buf_count = mtd->oobsize;
+		info->buf_start = 0;
+		info->cac_size = info->buf_count;
+		if (info->buf_count <= 0)
+			break;
+		dma_cache_wback_inv((unsigned long)(info->data_buff), info->buf_count);
+		/*nand regs set*/
+		info->nand_regs.addrh = SPARE_ADDRH(page_addr);
+		info->nand_regs.addrl = SPARE_ADDRL(page_addr) + mtd->writesize;
+		info->nand_regs.op_num = info->buf_count;
+		/*nand cmd set */
+		info->nand_regs.cmd = 0;
+		info->dma_regs.cmd = 0;
+#if defined LS1CSOC
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->int_en = 1;
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->ram_op
+				= RAM_OP_OFF;
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->ecc_rd
+				= NAND_ECC_OFF;
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->ecc_wr
+				= NAND_ECC_OFF;
+#endif
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->read = 1;
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->op_spare = 1;
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->cmd_valid = 1;
+		/*dma regs config*/
+		info->dma_regs.length = ALIGN_DMA(info->buf_count);
+		((struct ls1b_nand_dma_cmd *) &(info->dma_regs.cmd))->dma_int_mask = 1;
+		/*dma GO set*/
+		nand_setup(NAND_ADDRL | NAND_ADDRH | NAND_OP_NUM | NAND_CMD, info);
+		dma_setup(DMA_LENGTH | DMA_CMD, info);
+		sync_dma(info);
+		complete(&info->cmd_complete);
+		//printk("NAND_CMD_READOOB %08X  %08X\n",info->nand_regs.addrh, info->nand_regs.addrl);
+		break;
+	case NAND_CMD_READ0:
+		if (info->state == STATE_BUSY)
+		{
+			printk(KERN_INFO "nandflash chip if busy...\n");
+			return;
+		}
+		info->state = STATE_BUSY;
+		info->buf_count = mtd->oobsize + mtd->writesize;
+		info->buf_start = 0;
+		info->cac_size = info->buf_count;
+		if (info->buf_count <= 0)
+			break;
+		dma_cache_wback_inv((unsigned long)(info->data_buff), info->buf_count);
+		info->nand_regs.addrh = SPARE_ADDRH(page_addr);
+		info->nand_regs.addrl = SPARE_ADDRL(page_addr);
+		info->nand_regs.op_num = info->buf_count;
+		//		printk ("READ0: column=0x%x, page_addr=0x%x !                 ", column, page_addr);
+		//		printk ("lxy: READ0's addrl= 0x%x !\n", info->nand_regs.addrl);
+		/*nand cmd set */
+		info->nand_regs.cmd = 0;
+		info->dma_regs.cmd = 0;
+#if defined LS1CSOC
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->int_en = 0;
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->ram_op
+				= RAM_OP_OFF;
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->ecc_rd
+				= NAND_ECC_OFF;
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->ecc_wr
+				= NAND_ECC_OFF;
+#endif
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->read = 1;
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->op_spare = 1;
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->op_main = 1;
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->cmd_valid = 1;
+		/*dma regs config*/
+		info->dma_regs.length = ALIGN_DMA(info->buf_count);
+		((struct ls1b_nand_dma_cmd *) &(info->dma_regs.cmd))->dma_int_mask = 0;
+		nand_setup(NAND_ADDRL | NAND_ADDRH | NAND_OP_NUM | NAND_CMD, info);
+		dma_setup(DMA_LENGTH | DMA_CMD, info);
+		sync_dma(info);
+		complete(&info->cmd_complete);
+		break;
+	case NAND_CMD_SEQIN:
+		if (info->state == STATE_BUSY)
+		{
+			printk(KERN_INFO "nandflash chip if busy...\n");
+			return;
+		}
+		info->state = STATE_BUSY;
+		info->buf_count = mtd->oobsize + mtd->writesize - column;
+		info->buf_start = 0;
+		info->seqin_column = column;
+		info->seqin_page_addr = page_addr;
+		complete(&info->cmd_complete);
+		break;
+	case NAND_CMD_PAGEPROG:
+		//                info->coherent = 0;
+		if (info->state == STATE_BUSY){
+			printk(KERN_INFO "nandflash chip if busy...\n");
+			return;
+		}
+		info->state = STATE_BUSY;
+		if (cmd_prev != NAND_CMD_SEQIN){
+			printk(KERN_INFO "Prev cmd don't complete...\n");
+			break;
+		}
+		if (info->buf_count <= 0)
+			break;
+
+#if 0                
+		if(((info->num)++) % 512 == 0){
+			printk("nand have write : %d M\n",(info->size)++);
+		}
+#endif
+	
+		/*nand regs set*/
+		info->nand_regs.addrh = SPARE_ADDRH(info->seqin_page_addr);
+		info->nand_regs.addrl = SPARE_ADDRL(info->seqin_page_addr)
+				+ info->seqin_column;
+		//		printk ("lxy: program's addrl= 0x%x !\n", info->nand_regs.addrl);
+		info->nand_regs.op_num = info->buf_start;
+		info->cac_size = info->buf_start;
+		/*nand cmd set */
+		info->nand_regs.cmd = 0;
+		info->dma_regs.cmd = 0;
+#if defined LS1CSOC
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->int_en = 0;
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->ram_op
+				= RAM_OP_OFF;
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->ecc_rd
+				= NAND_ECC_OFF;
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->ecc_wr
+				= NAND_ECC_OFF;
+#endif                
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->write = 1;
+		if (info->seqin_column < mtd->writesize)
+			((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->op_main = 1;
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->op_spare = 1;
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->cmd_valid = 1;
+		/*dma regs config*/
+		info->dma_regs.length = ALIGN_DMA(info->buf_start);
+		((struct ls1b_nand_dma_cmd *) &(info->dma_regs.cmd))->dma_int_mask = 1;
+		((struct ls1b_nand_dma_cmd *) &(info->dma_regs.cmd))->dma_r_w = 1;
+		nand_setup(NAND_ADDRL | NAND_ADDRH | NAND_OP_NUM | NAND_CMD, info);
+		dma_setup(DMA_LENGTH | DMA_CMD, info);
+		sync_dma(info);
+		complete(&info->cmd_complete);
+		//printk("NAND_CMD_PAGEPROG %08X\n",info->seqin_page_addr);
+		break;
+	case NAND_CMD_RESET:
+		/*Do reset op anytime*/
+		//                info->state = STATE_BUSY;
+		/*nand cmd set */
+		info->nand_regs.cmd = 0;
+#if defined LS1CSOC
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->int_en = 0;
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->ram_op
+				= RAM_OP_OFF;
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->ecc_rd
+				= NAND_ECC_OFF;
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->ecc_wr
+				= NAND_ECC_OFF;
+#endif
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->reset = 1;
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->cmd_valid = 1;
+		nand_setup(NAND_CMD, info);
+		status_time = STATUS_TIME_LOOP_R;
+		while (!ls1b_nand_status(info)){
+			if (!(status_time--)){
+				write_z_cmd;
+				break;
+			}
+			udelay(50);
+		}
+		info->state = STATE_READY;
+		complete(&info->cmd_complete);
+		break;
+	case NAND_CMD_ERASE1:
+		if (info->state == STATE_BUSY) {
+			printk(KERN_INFO "nandflash chip if busy...\n");
+			return;
+		}
+		info->state = STATE_BUSY;
+		/*nand regs set*/
+		info->nand_regs.addrh = NO_SPARE_ADDRH(page_addr);
+		info->nand_regs.addrl = NO_SPARE_ADDRL(page_addr);
+		/*nand cmd set */
+		info->nand_regs.cmd = 0;
+#if defined LS1CSOC
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->int_en = 0;
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->ram_op
+				= RAM_OP_OFF;
+#endif                
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->erase_one = 1;
+		((struct ls1b_nand_cmdset*) &(info->nand_regs.cmd))->cmd_valid = 1;
+		nand_setup(NAND_ADDRL | NAND_ADDRH | NAND_OP_NUM | NAND_CMD, info);
+		status_time = STATUS_TIME_LOOP_E;
+		udelay(2000); //lxy
+		while (!ls1b_nand_status(info)){
+			if (!(status_time--)){
+				write_z_cmd;
+				break;
+			}
+			udelay(50);
+		}
+		info->state = STATE_READY;
+		complete(&info->cmd_complete);
+		break;
+	case NAND_CMD_STATUS:
+		if (info->state == STATE_BUSY){
+			printk(KERN_INFO "nandflash chip if busy...\n");
+			return;
+		}
+		info->state = STATE_BUSY;
+		info->buf_count = 0x1;
+		info->buf_start = 0x0;
+		*(unsigned char *) info->data_buff = ls1b_nand_status(info) | 0x80;
+		complete(&info->cmd_complete);
+		break;
+	case NAND_CMD_READID:
+		if (info->state == STATE_BUSY){
+			printk(KERN_INFO "nandflash chip if busy...\n");
+			return;
+		}
+		info->state = STATE_BUSY;
+		info->buf_count = 0x4;
+		info->buf_start = 0;
+		{
+
+			unsigned int id_val_l = 0, id_val_h = 0;
+			unsigned int timing = 0;
+			unsigned char *data = (unsigned char *) (info->data_buff);
+			_NAND_READ_REG(0xc,timing);
+			_NAND_SET_REG(0xc,0x30f0);
+			_NAND_SET_REG(0x0,0x21);
+
+			while (((id_val_l |= _NAND_IDL) & 0xff) == 0){
+				id_val_h = _NAND_IDH;
+			}
+
+			while (id_val_h == 0) //lxy
+			{
+				id_val_h = _NAND_IDH;
+			}
+
+			//while (((id_val_h = _NAND_IDH) & 0xff000000) == 0xec)
+			//id_val_l = _NAND_IDL;
+
+			_NAND_SET_REG(0xc,timing);
+			udelay(50);
+			data[0] = (id_val_h & 0xff);
+			data[1] = (id_val_l & 0xff000000) >> 24;
+			data[2] = (id_val_l & 0x00ff0000) >> 16;
+			data[3] = (id_val_l & 0x0000ff00) >> 8;
+
+		}
+		//info->state = STATE_READY;
+		complete(&info->cmd_complete);
+		break;
+	case NAND_CMD_ERASE2:
+	case NAND_CMD_READ1:
+		complete(&info->cmd_complete);
+		break;
+
+	case NAND_CMD_RNDOUT: //lxy
+		if (info->state == STATE_BUSY){
+			printk(KERN_INFO "nandflash chip if busy...\n");
+			return;
+		}
+		info->buf_count = mtd->oobsize + mtd->writesize;
+		info->buf_start = column;
+		complete(&info->cmd_complete);
+		break;
+
+	default:
+		printk(KERN_ERR "non-supported command.\n");
+		complete(&info->cmd_complete);
+		break;
+	}
+	wait_for_completion(&info->cmd_complete);
+	//	clear_flag;	//lxy
+	//        wait_for_completion_timeout(&info->cmd_complete,timeout);
+	if (info->cmd == NAND_CMD_READ0 || info->cmd == NAND_CMD_READOOB){
+		dma_cache_inv((unsigned long)(info->data_buff),info->cac_size);
+	}
+	info->state = STATE_READY;
+
+}
+static int ls1b_nand_detect(struct mtd_info *mtd)
+{
+        return (mtd->erasesize != 1<<17 || mtd->writesize != 1<<11 || mtd->oobsize != 1<<6);
+}
+
+//static void test_handler(unsigned long data)
+//{
+//    u32 val;
+//    struct ls1b_nand_info *s = (struct ls1b_nand_info *)data;
+//    mod_timer(&s->test_timer, jiffies+1);
+//    val = s->dma_ask_phy | 0x4;
+//    *((volatile unsigned int *)0xbfd01160) = val;
+//    udelay(1000);
+//}
+
+
+static void ls1b_nand_init_info(struct ls1b_nand_info *info)
+{
+	//*((volatile unsigned int *)0xbfe78018) = 0x30000;
+	info->timing_flag = 1;/*0:read; 1:write;*/
+	info->num = 0;
+	info->size = 0;
+	//info->coherent = 0;
+	info->cac_size = 0;
+	info->state = STATE_READY;
+	info->cmd = -1;
+	info->page_addr = -1;
+	info->nand_addrl = 0x0;
+	info->nand_addrh = 0x0;
+#if defined LS1CSOC  
+	info->nand_timing = 0x209;
+#else    
+	info->nand_timing = 0x209;
+#endif
+	info->nand_op_num = 0x0;
+	info->nand_cs_rdy_map = 0x00000000;
+	info->nand_cmd = 0;
+
+	info->dma_orderad = 0x0;
+	info->dma_saddr = info->data_buff_phys;
+	info->dma_daddr = DMA_ACCESS_ADDR;
+	info->dma_length = 0x0;
+	info->dma_step_length = 0x0;
+	info->dma_step_times = 0x1;
+	info->dma_cmd = 0x0;
+
+//	init_timer(&info->test_timer);
+//	info->test_timer.function = test_handler;
+//	info->test_timer.expires = jiffies + 10;
+//	info->test_timer.data = (unsigned long) info;
+
+	info->order_reg_addr = ORDER_REG_ADDR;
+}
+
+static int ls1b_nand_probe(struct platform_device *pdev)
+{
+	struct ls1b_nand_platform_data *pdata;
+	struct ls1b_nand_info *info;
+	struct nand_chip *this;
+	struct mtd_info *mtd;
+	struct resource *r;
+	int ret = 0, irq;
+	//#ifdef CONFIG_MTD_PARTITIONS
+	const char *part_probes[] =
+	{ "cmdlinepart", NULL };
+	struct mtd_partition *partitions = NULL;
+	int num_partitions = 0;
+	//#endif
+	//nand_gpio_init();
+	pdata = pdev->dev.platform_data;
+	if (!pdata)
+	{
+		dev_err(&pdev->dev, "no platform data defined\n");
+		return -ENODEV;
+	}
+	mtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct ls1b_nand_info),
+			GFP_KERNEL);
+	if (!mtd)
+	{
+		dev_err(&pdev->dev, "failed to allocate memory\n");
+		return -ENOMEM;
+	}
+
+	info = (struct ls1b_nand_info *) (&mtd[1]);
+	info->pdev = pdev;
+
+	this = &info->nand_chip;
+	mtd->priv = info;
+	info->drcmr_dat = (unsigned int) dma_alloc_coherent(&pdev->dev,
+			MAX_BUFF_SIZE, &info->drcmr_dat_phys, GFP_KERNEL);
+	info->drcmr_dat = CAC_ADDR(info->drcmr_dat);
+	info->dma_ask = (unsigned int) dma_alloc_coherent(&pdev->dev,
+			MAX_BUFF_SIZE, &info->dma_ask_phy, GFP_KERNEL);
+
+	if (!info->drcmr_dat)
+	{
+		dev_err(&pdev->dev, "fialed to allocate memory\n");
+		return ENOMEM;
+	}
+	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (r == NULL)
+	{
+		dev_err(&pdev->dev, "no IO memory resource defined\n");
+		ret = -ENODEV;
+		goto fail_put_clk;
+	}
+
+	r = request_mem_region(r->start, r->end - r->start + 1, pdev->name);
+	if (r == NULL)
+	{
+		dev_err(&pdev->dev, "failed to request memory resource\n");
+		ret = -EBUSY;
+		goto fail_put_clk;
+	}
+
+	info->mmio_base = ioremap(r->start, r->end - r->start + 1);
+	if (info->mmio_base == NULL)
+	{
+		dev_err(&pdev->dev, "ioremap() failed\n");
+		ret = -ENODEV;
+		goto fail_free_res;
+	}
+	ret = ls1b_nand_init_buff(info);
+	if (ret)
+		goto fail_free_io;
+
+	irq = platform_get_irq(pdev, 0);
+	if (irq < 0)
+	{
+		dev_err(&pdev->dev, "no IRQ resource defined\n");
+		ret = -ENXIO;
+		goto fail_put_clk;
+	}
+	ret = request_irq(irq, ls1b_nand_irq, IRQF_DISABLED, pdev->name, info);
+	if (ret < 0)
+	{
+		dev_err(&pdev->dev, "failed to request IRQ\n");
+		goto fail_free_buf;
+	}
+
+	ls1b_nand_init_mtd(mtd, info);
+
+	ls1b_nand_init_info(info);
+	platform_set_drvdata(pdev, mtd);
+
+	if (nand_scan(mtd, 1))
+	{
+		dev_err(&pdev->dev, "failed to scan nand\n");
+		ret = -ENXIO;
+		goto fail_free_irq;
+	}
+	if (ls1b_nand_detect(mtd))
+	{
+		dev_err(&pdev->dev, "driver don't support the Flash!\n");
+		ret = -ENXIO;
+		goto fail_free_irq;
+	}
+	//#ifdef CONFIG_MTD_PARTITIONS
+	//#ifdef CONFIG_MTD_CMDLINE_PARTS
+	mtd->name = "mtdparts";
+	num_partitions = parse_mtd_partitions(mtd, part_probes, &partitions, 0);
+	//#endif
+	if (num_partitions <= 0)
+	{
+		partitions = pdata->parts;
+		num_partitions = pdata->nr_parts;
+
+	}
+	//         return add_mtd_partitions(mtd, partitions , num_partitions);
+	return mtd_device_register(mtd, partitions, num_partitions);
+	//#else
+	//		 return add_mtd_device(mtd);
+	//#endif
+fail_free_irq:
+	free_irq(13, info);
+fail_free_buf:
+	dma_free_coherent(&pdev->dev, info->data_buff_size,
+			info->data_buff, info->data_buff_phys);
+fail_free_io:
+	iounmap(info->mmio_base);
+fail_free_res:
+	release_mem_region(r->start, r->end - r->start + 1);
+fail_put_clk:
+/*fail_free_mtd:*/
+	kfree(mtd);
+	return ret;
+}
+
+static int ls1b_nand_remove(struct platform_device *pdev)
+{
+	struct mtd_info *mtd = platform_get_drvdata(pdev);
+	struct ls1b_nand_info *info = mtd->priv;
+
+	platform_set_drvdata(pdev, NULL);
+	//	del_mtd_device(mtd);
+	//	del_mtd_partitions(mtd);
+	nand_release(mtd);
+	free_irq(13, info);
+	kfree((const void *)info->drcmr_dat);
+	/*struct ls1b_nand_platform_data{
+	 int enable_arbiter;
+	 struct mtd_partition *parts;
+	 unsigned int nr_parts;
+	 };*/
+	kfree(mtd);
+	return 0;
+}
+
+//void nandwrite_testoob(struct mtd_info *nand, unsigned int off)/*cmd addr(L,page num) timing op_num(byte) */
+//{
+//	int i,retlen;
+//	int ooboffset;
+//	u_char datbuf[3000], oobbuf[100], *p;
+//	struct ls1b_nand_info *info= (struct ls1b_nand_info *)nand->priv;
+//	struct nand_chip * chip= &info->nand_chip;
+//	struct mtd_oob_ops ops;
+//	struct erase_info ei;
+//	off &= ~(nand->writesize - 1);
+//	loff_t addr = (loff_t) off;
+//	memset(&ops, 0, sizeof(ops));
+//	memset(datbuf,0, sizeof(datbuf));
+//	memset(oobbuf,0, sizeof(oobbuf));
+//
+//	for(i = 0;i<2048;i++){
+//		datbuf[i]=(u_char)(i&0xFF);
+//	}
+//	for(i=2;i<64;i++)
+//	{
+//		oobbuf[i] = (u_char)(i&0xFF);
+//	}
+//
+//	ops.datbuf = datbuf;
+//	ops.oobbuf = oobbuf;
+//	ops.len = nand->writesize;
+//	ops.ooblen = nand->oobsize;
+//	ops.mode = MTD_OOB_AUTO;
+//	retlen = nand->write_oob(nand, addr, &ops);
+//	printk("nand->write_oob retlen %d\n",retlen);
+//
+//	memset(datbuf,0, sizeof(datbuf));
+//	memset(oobbuf,0, sizeof(oobbuf));
+//	ops.datbuf = datbuf;
+//	ops.oobbuf = oobbuf;
+//	ops.len = nand->writesize;
+//	ops.ooblen = nand->oobsize;
+//	ops.mode = MTD_OOB_RAW;
+//	i = nand->read_oob(nand, addr, &ops);
+//	printk("Page %08lx dump:\n", off);
+//	i = nand->writesize >> 4;
+//	p = datbuf;
+//	while (i--) {
+//			printk("%08lX:%02X %02X %02X %02X %02X %02X %02X %02X"
+//			       "  %02X %02X %02X %02X %02X %02X %02X %02X\n",
+//			       off, p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7],
+//			       p[8], p[9], p[10], p[11], p[12], p[13], p[14],
+//			       p[15]);
+//		p += 16;
+//		off += 16;
+//	}
+//
+//	printk("OOB:\n");
+//	i = nand->oobsize >> 3;
+//	ooboffset = 0;
+//	p = ops.oobbuf;
+//	while (i--) {
+//		printk("%08X: %02X %02X %02X %02X %02X %02X %02X %02X\n",
+//			ooboffset, p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7]);
+//		p += 8;
+//		ooboffset += 8;
+//	}
+//
+//	memset(&ei, 0, sizeof(struct erase_info));
+//	ei.mtd  = nand;
+//	ei.addr = addr;
+//	ei.len  = nand->erasesize;
+//
+//	retlen = nand->erase(nand, &ei);
+//	printk("nand->erase retlen %d\n",retlen);
+//
+//	memset(datbuf,0, sizeof(datbuf));
+//	memset(oobbuf,0, sizeof(oobbuf));
+//	ops.datbuf = datbuf;
+//	ops.oobbuf = oobbuf;
+//	ops.len = nand->writesize;
+//	ops.ooblen = nand->oobsize;
+//	ops.mode = MTD_OOB_RAW;
+//	i = nand->read_oob(nand, addr, &ops);
+//	printk("Page %08lx dump:\n", addr);
+//	off = addr;
+//	i = nand->writesize >> 4;
+//	p = datbuf;
+//	while (i--) {
+//			printk("%08lX:%02X %02X %02X %02X %02X %02X %02X %02X"
+//			       "  %02X %02X %02X %02X %02X %02X %02X %02X\n",
+//			       off, p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7],
+//			       p[8], p[9], p[10], p[11], p[12], p[13], p[14],
+//			       p[15]);
+//		p += 16;
+//		off += 16;
+//	}
+//
+//	printk("OOB:\n");
+//	i = nand->oobsize >> 3;
+//	ooboffset = 0;
+//	p = ops.oobbuf;
+//	while (i--) {
+//		printk("%08X: %02X %02X %02X %02X %02X %02X %02X %02X\n",
+//			ooboffset, p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7]);
+//		p += 8;
+//		ooboffset += 8;
+//	}
+//	panic("nandwrite_testoob\n");
+//	return ;
+//}
+
+static int ls1b_nand_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	struct mtd_info *mtd = (struct mtd_info *) platform_get_drvdata(pdev);
+	struct ls1b_nand_info *info = mtd->priv;
+
+	if (info->state != STATE_READY){
+		dev_err(&pdev->dev, "driver busy, state = %d\n", info->state);
+		return -EAGAIN;
+	}
+
+	return 0;
+}
+static int ls1b_nand_resume(struct platform_device *pdev)
+{
+	return 0;
+}
+static struct platform_driver ls1b_nand_driver = {
+	.driver = {
+		.name	= "ls1b-nand",
+        .owner	= THIS_MODULE,
+	},
+	.probe		= ls1b_nand_probe,
+	.remove		= ls1b_nand_remove,
+	.suspend	= ls1b_nand_suspend,
+	.resume		= ls1b_nand_resume,
+};
+
+static int __init ls1b_nand_init(void)
+{
+	int ret = 0;
+	ret = platform_driver_register(&ls1b_nand_driver);
+	if (ret){
+		printk(KERN_ERR "failed to register loongson_1g_nand_driver");
+	}
+	return ret;
+}
+static void __exit ls1b_nand_exit(void)
+{
+	platform_driver_unregister(&ls1b_nand_driver);
+}
+module_init(ls1b_nand_init);
+module_exit(ls1b_nand_exit);
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Loongson_1g NAND controller driver");
+
diff -uNra linux-3.0.82/drivers/mtd/nand/ls1b-nand-ori.c linux-3.0.82x/drivers/mtd/nand/ls1b-nand-ori.c
--- linux-3.0.82/drivers/mtd/nand/ls1b-nand-ori.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/mtd/nand/ls1b-nand-ori.c	2017-09-23 03:42:49.662676151 +0800
@@ -0,0 +1,1354 @@
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/delay.h>
+#include <linux/clk.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <asm/dma.h>
+#include <linux/slab.h>
+
+
+#define DMA_ACCESS_ADDR     0x1fe78040
+#define ORDER_REG_ADDR      (KSEG1ADDR(0x1fd01160))
+#define MAX_BUFF_SIZE	4096
+#define PAGE_SHIFT      12
+#ifdef	CONFIG_LS1A_MACH 
+	#define NO_SPARE_ADDRH(x)   ((x))   
+	#define NO_SPARE_ADDRL(x)   ((x) << (PAGE_SHIFT))
+	#define SPARE_ADDRH(x)      ((x))   
+	#define SPARE_ADDRL(x)      ((x) << (PAGE_SHIFT))
+#else
+	#define NO_SPARE_ADDRH(x)   ((x) >> (32 - (PAGE_SHIFT - 1 )))   
+	#define NO_SPARE_ADDRL(x)   ((x) << (PAGE_SHIFT - 1))
+	#define SPARE_ADDRH(x)      ((x) >> (32 - (PAGE_SHIFT )))   
+	#define SPARE_ADDRL(x)      ((x) << (PAGE_SHIFT ))
+#endif
+#define ALIGN_DMA(x)       (((x)+ 3)/4)
+
+#define	GPIO_CONF1	(ioremap(0x1fd010c4, 4))
+#define	GPIO_CONF2	(ioremap(0x1fd010c8, 4))
+#define	GPIO_MUX	(ioremap(0x1fd00420, 4))
+
+//#define USE_POLL
+#undef	USE_POLL
+#ifdef USE_POLL
+#define complete(...)
+#define init_completion(...)
+#define wait_for_completion_timeout(...)
+#define wait_for_completion(...)
+#define request_irq(...) (0)
+#define free_irq(...) 
+#endif
+
+
+#define CHIP_DELAY_TIMEOUT (2*HZ/10)
+
+#define STATUS_TIME_LOOP_R  30 
+#define STATUS_TIME_LOOP_WS  100  
+#define STATUS_TIME_LOOP_WM  60  
+#define STATUS_TIME_LOOP_E  100  
+
+#define NAND_CMD        0x1
+#define NAND_ADDRL      0x2
+#define NAND_ADDRH      0x4
+#define NAND_TIMING     0x8
+#define NAND_IDL        0x10
+#define NAND_STATUS_IDL 0x20
+#define NAND_PARAM      0x40
+#define NAND_OP_NUM     0X80
+#define NAND_CS_RDY_MAP 0x100
+
+#define DMA_ORDERAD     0x1
+#define DMA_SADDR       0x2
+#define DMA_DADDR       0x4
+#define DMA_LENGTH      0x8
+#define DMA_STEP_LENGTH 0x10
+#define DMA_STEP_TIMES  0x20
+#define DMA_CMD         0x40
+
+#if 1  /* read ids use gpio*/
+
+#define NAND_GPIO_MUX  0x0a000000
+#define GPIO_MUX_CTRL  0xbfd00420
+
+#define GPIO_CONF3      0xbfd010c8
+#define GPIO_IEN3        0xbfd010d8
+#define GPIO_IDATA3      0xbfd010e8
+#define GPIO_ODATA3      0xbfd010f8
+
+#define NAND_D0         6  //70 - 64
+#define NAND_D1         7  //71 - 64
+#define NAND_D2         8  //72 - 64
+#define NAND_D3         9  //73 - 64
+#define NAND_D4         10 //74 - 64
+#define NAND_D5         11 //75 - 64
+#define NAND_CLE        12 //76 - 64
+#define NAND_ALE        13 //77 - 64
+#define NAND_RE         14 //78 - 64
+#define NAND_WE         15 //79 - 64
+#define NAND_CE         16 //80 - 64
+#define NAND_RDY        17 //81 - 64
+#define NAND_D6         18 //82 - 64 
+#define NAND_D7         19 //83 - 64
+
+#define _EN_PIN(x)      (*((volatile unsigned int*)(GPIO_CONF3)) = *((volatile unsigned int *)GPIO_CONF3) | (0x1 << (x)))          
+#define _DIS_PIN(x)      (*((volatile unsigned int*)(GPIO_CONF3)) = *((volatile unsigned int *)GPIO_CONF3) & (~(0x1 << (x))))          
+#define _EN_IN(x)      (*((volatile unsigned int*)(GPIO_IEN3)) = *((volatile unsigned int *)GPIO_IEN3) | (0x1 << (x)))          
+#define _DIS_IN(x)      (*((volatile unsigned int*)(GPIO_IEN3)) = *((volatile unsigned int *)GPIO_IEN3) & (~(0x1 << (x))))          
+#define _SET_ONE(x)      (*((volatile unsigned int*)(GPIO_ODATA3)) = *((volatile unsigned int *)GPIO_ODATA3) | (0x1 << (x)))          
+#define _SET_ZERO(x)      (*((volatile unsigned int*)(GPIO_ODATA3)) = *((volatile unsigned int *)GPIO_ODATA3) & (~(0x1 << (x))))          
+#define  _READ_GPIO3     (*(volatile unsigned int *)(GPIO_ODATA3))
+
+#define _EN_OUT(x)      _DIS_IN(x)
+
+#define _DIS_CTRL_IO            do{     \
+            _DIS_PIN(NAND_CLE);         \
+            _DIS_PIN(NAND_ALE);         \
+            _DIS_PIN(NAND_RE);          \
+            _DIS_PIN(NAND_WE);          \
+            _DIS_PIN(NAND_CE);          \
+            _DIS_PIN(NAND_RDY);         \
+            }while(0)
+
+#define _DIS_DATA_IO            do{     \
+            _DIS_PIN(NAND_D0);           \
+            _DIS_PIN(NAND_D1);           \
+            _DIS_PIN(NAND_D2);           \
+            _DIS_PIN(NAND_D3);           \
+            _DIS_PIN(NAND_D4);           \
+            _DIS_PIN(NAND_D5);           \
+            _DIS_PIN(NAND_D6);           \
+            _DIS_PIN(NAND_D7);           \
+        }while(0)
+#define DIS_GPIO_READ_ID    do{         \
+            _DIS_CTRL_IO;               \
+            _DIS_DATA_IO;               \
+        }while(0)
+
+#define _EN_DATA_IO             do{     \
+            _EN_PIN(NAND_D0) ;           \
+            _EN_PIN(NAND_D1) ;           \
+            _EN_PIN(NAND_D2) ;           \
+            _EN_PIN(NAND_D3) ;           \
+            _EN_PIN(NAND_D4) ;           \
+            _EN_PIN(NAND_D5) ;           \
+            _EN_PIN(NAND_D6) ;           \
+            _EN_PIN(NAND_D7) ;           \
+        }while(0)
+
+#define _EN_IN_DATA_IO          do{     \
+            _EN_IN(NAND_D0) ;            \
+            _EN_IN(NAND_D1) ;            \
+            _EN_IN(NAND_D2) ;            \
+            _EN_IN(NAND_D3) ;            \
+            _EN_IN(NAND_D4) ;            \
+            _EN_IN(NAND_D5) ;            \
+            _EN_IN(NAND_D6) ;            \
+            _EN_IN(NAND_D7) ;            \
+        }while(0)
+           
+#define  _EN_OUT_DATA_IO            do{   \
+            _EN_OUT(NAND_D0);            \
+            _EN_OUT(NAND_D1);            \
+            _EN_OUT(NAND_D2);            \
+            _EN_OUT(NAND_D3);            \
+            _EN_OUT(NAND_D4);            \
+            _EN_OUT(NAND_D5);            \
+            _EN_OUT(NAND_D6);            \
+            _EN_OUT(NAND_D7);           \
+        }while(0)    
+
+#define DIS_DATA_IO    _DIS_DATA_IO
+
+#define _DIS_GPIO3    *((volatile unsigned int *)GPIO_CONF3) = 0
+
+
+#define _PUTODATA32(x)      *((volatile unsigned int *)GPIO_ODATA3) = (x)
+#define _GETODATA32(x)      (x) = *((volatile unsigned int *)GPIO_ODATA3)  
+
+#define _PUTIDATA32(x)      *((volatile unsigned int *)GPIO_IDATA3) = (x)
+#define _GETIDATA32(x)      (x) = *((volatile unsigned int *)GPIO_IDATA3)  
+
+
+#define SET_UP(x)    do{                \
+                _EN_PIN((x));           \
+                _EN_OUT((x));           \
+                _SET_ONE((x));          \
+                _READ_GPIO3;            \
+            }while(0)
+
+#define SET_DOWN(x)    do{                \
+                _EN_PIN((x));           \
+                _EN_OUT((x));           \
+                _SET_ZERO((x));          \
+                _READ_GPIO3;            \
+            }while(0)
+/*EN_SEND_DATA_IO*/
+#define  EN_SEND_DATA_IO        do{      \
+            _EN_DATA_IO     ;            \
+            _EN_OUT_DATA_IO ;           \
+            _READ_GPIO3;                \
+        }while(0)
+/*EN_GET_DATA_IO*/
+#define  EN_GET_DATA_IO         do{     \
+            _EN_DATA_IO;                 \
+            _EN_IN_DATA_IO;              \
+            _READ_GPIO3;               \
+        }while(0)
+ 
+static void nand_gpio_init(void)
+{
+//    *((unsigned int *)GPIO_MUX_CTRL) = NAND_GPIO_MUX;
+//    *((unsigned int *)GPIO_MUX_CTRL) = NAND_GPIO_MUX;
+#ifdef	CONFIG_LS1A_MACH
+{
+	int val;
+#ifdef CONFIG_NAND_USE_LPC_PWM01 //NANDå¤�ç”¨LPC PWM01
+	val = __raw_readl(GPIO_MUX);
+	val |= 0x2a000000;
+	__raw_writel(val, GPIO_MUX);
+
+	val = __raw_readl(GPIO_CONF2);
+	val &= ~(0xffff<<6);			//nand_D0~D7 & nand_control pin
+	__raw_writel(val, GPIO_CONF2);
+#elif CONFIG_NAND_USE_SPI1_PWM23 //NANDå¤�ç”¨SPI1 PWM23
+	val = __raw_readl(GPIO_MUX);
+	val |= 0x14000000;
+	__raw_writel(val, GPIO_MUX);
+
+	val = __raw_readl(GPIO_CONF1);
+	val &= ~(0xf<<12);				//nand_D0~D3
+	__raw_writel(val, GPIO_CONF1);
+
+	val = __raw_readl(GPIO_CONF2);
+	val &= ~(0xfff<<12);			//nand_D4~D7 & nand_control pin
+	__raw_writel(val, GPIO_CONF2);
+#endif
+}
+#endif
+}
+
+static void gpio_senddata8(unsigned char val)
+{
+    unsigned int d32=0;
+//    EN_SEND_DATA_IO;
+    _GETODATA32(d32);
+    d32 = (d32 & (~(0x3f << 6)) | ((val & 0x3f)<<6));
+    d32 = (d32 & (~(0x3 << 18)) | (((val >> 6) & 0x3)<<18));
+    _PUTODATA32(d32);
+    _READ_GPIO3;
+    SET_DOWN(NAND_WE);
+    SET_UP(NAND_WE);
+    //delay;
+
+//   DIS_DATA_IO;     
+}
+
+static unsigned char gpio_getdata8(void)
+{
+    unsigned int d32=0;
+    unsigned char val=0;
+    //EN_GET_DATA_IO;
+    //delay
+    SET_DOWN(NAND_RE);
+    _GETIDATA32(d32);
+    SET_UP(NAND_RE);
+ //   DIS_DATA_IO;
+    val = (d32 >> 18) & 0x3;
+    val = (val << 6) |(d32 >> 6) & 0x3f;
+    return val;
+
+}
+static unsigned int nand_gpio_read_id(void)
+{
+    unsigned char val[4]={0}; //4 bytes
+    nand_gpio_init();
+    EN_SEND_DATA_IO;
+
+    SET_DOWN(NAND_CE);
+
+    /*send command*/
+    SET_DOWN(NAND_ALE);
+    SET_UP(NAND_RE);
+    SET_UP(NAND_CLE);
+    gpio_senddata8(NAND_CMD_READID);
+    //delay
+    SET_DOWN(NAND_CLE);
+
+    /*send addr*/
+    SET_UP(NAND_ALE);
+    gpio_senddata8(0x00);
+    SET_DOWN(NAND_ALE);
+    //delay min 60ns
+    /*read id*/
+    EN_GET_DATA_IO;
+    val[0] = gpio_getdata8();
+//    printk("1th:%x\n",val[0]);
+    val[1] = gpio_getdata8();
+//    printk("2th:%x\n",val[1]);
+    val[2] = gpio_getdata8();
+//    printk("3th:%x\n",val[2]);
+    val[3] = gpio_getdata8();
+//    printk("4th:%x\n",val[3]);
+    DIS_GPIO_READ_ID;
+return *((unsigned int *)val);
+}
+
+#endif /* end:read ids use gpio*/
+
+#define  _NAND_IDL      ( *((volatile unsigned int*)(0xbfe78010)))
+#define  _NAND_IDH       (*((volatile unsigned int*)(0xbfe78014)))
+#define  _NAND_BASE      0xbfe78000
+#define  _NAND_SET_REG(x,y)   do{*((volatile unsigned int*)(_NAND_BASE+x)) = (y);}while(0)                           
+#define  _NAND_READ_REG(x,y)  do{(y) =  *((volatile unsigned int*)(_NAND_BASE+x));}while(0) 
+
+#define _NAND_TIMING_TO_READ    _NAND_SET_REG(0xc,0x205)
+#define _NAND_TIMING_TO_WRITE   _NAND_SET_REG(0xc,0x205)
+
+//#define _NADN_TIMING_TO_READ(x)  _NAND_STORE_TIMING(0x209)}while(0)
+//#define _NADN_TIMING_TO_WRITE(x)  NAND_STORE_TIMING(0x209)}while(0)
+
+
+enum{
+    ERR_NONE        = 0,
+    ERR_DMABUSERR   = -1,
+    ERR_SENDCMD     = -2,
+    ERR_DBERR       = -3,
+    ERR_BBERR       = -4,
+};
+enum{
+    STATE_READY = 0,
+    STATE_BUSY  ,
+};
+
+struct ls1b_nand_platform_data{
+        int enable_arbiter;
+        struct mtd_partition *parts;
+        unsigned int nr_parts;
+};
+struct ls1b_nand_cmdset {
+        uint32_t    cmd_valid:1;
+	uint32_t    read:1;
+	uint32_t    write:1;
+	uint32_t    erase_one:1;
+	uint32_t    erase_con:1;
+	uint32_t    read_id:1;
+	uint32_t    reset:1;
+	uint32_t    read_sr:1;
+	uint32_t    op_main:1;
+	uint32_t    op_spare:1;
+	uint32_t    done:1;
+        uint32_t    resv1:5;//11-15 reserved
+        uint32_t    nand_rdy:4;//16-19
+        uint32_t    nand_ce:4;//20-23
+        uint32_t    resv2:8;//24-32 reserved
+};
+struct ls1b_nand_dma_desc{
+        uint32_t    orderad;
+        uint32_t    saddr;
+        uint32_t    daddr;
+        uint32_t    length;
+        uint32_t    step_length;
+        uint32_t    step_times;
+        uint32_t    cmd;
+};
+struct ls1b_nand_dma_cmd{
+        uint32_t    dma_int_mask:1;
+        uint32_t    dma_int:1;
+        uint32_t    dma_sl_tran_over:1;
+        uint32_t    dma_tran_over:1;
+        uint32_t    dma_r_state:4;
+        uint32_t    dma_w_state:4;
+        uint32_t    dma_r_w:1;
+        uint32_t    dma_cmd:2;
+        uint32_t    revl:17;
+};
+struct ls1b_nand_desc{
+        uint32_t    cmd;
+        uint32_t    addrl;
+        uint32_t    addrh;
+        uint32_t    timing;
+        uint32_t    idl;//readonly
+        uint32_t    status_idh;//readonly
+        uint32_t    param;
+        uint32_t    op_num;
+        uint32_t    cs_rdy_map;
+};
+struct ls1b_nand_info {
+	struct nand_chip	nand_chip;
+
+	struct platform_device	    *pdev;
+        /* MTD data control*/
+	unsigned int 		buf_start;
+	unsigned int		buf_count;
+        /* NAND registers*/
+	void __iomem		*mmio_base;
+        struct ls1b_nand_desc   nand_regs;
+        unsigned int            nand_addrl;
+        unsigned int            nand_addrh;
+        unsigned int            nand_timing;
+        unsigned int            nand_op_num;
+        unsigned int            nand_cs_rdy_map;
+        unsigned int            nand_cmd;
+
+	/* DMA information */
+
+        struct ls1b_nand_dma_desc  dma_regs;
+        unsigned int            order_reg_addr;  
+        unsigned int            dma_orderad;
+        unsigned int            dma_saddr;
+        unsigned int            dma_daddr;
+        unsigned int            dma_length;
+        unsigned int            dma_step_length;
+        unsigned int            dma_step_times;
+        unsigned int            dma_cmd;
+        int			drcmr_dat;//dma descriptor address;
+	dma_addr_t 		drcmr_dat_phys;
+        size_t                  drcmr_dat_size;
+	unsigned char		*data_buff;//dma data buffer;
+	dma_addr_t 		data_buff_phys;
+	size_t			data_buff_size;
+        unsigned long           cac_size;
+        unsigned long           num;
+        unsigned long           size;
+        struct timer_list       test_timer;
+        unsigned int            dma_ask;
+        unsigned int            dma_ask_phy;
+
+	/* relate to the command */
+	unsigned int		state;
+//	int			use_ecc;	/* use HW ECC ? */
+	size_t			data_size;	/* data size in FIFO */
+        unsigned int            cmd;
+        unsigned int            page_addr;
+        struct completion 	cmd_complete;
+        unsigned int            seqin_column;
+        unsigned int            seqin_page_addr;
+        unsigned int            timing_flag;
+        unsigned int            timing_val;
+};
+
+
+static struct nand_ecclayout hw_largepage_ecclayout = {
+	.eccbytes = 24,
+	.eccpos = {
+		40, 41, 42, 43, 44, 45, 46, 47,
+		48, 49, 50, 51, 52, 53, 54, 55,
+		56, 57, 58, 59, 60, 61, 62, 63},
+	.oobfree = { {2, 38} }
+};
+#define show_data_debug  0
+#define show_debug(x,y)     show_debug_msk(x,y)
+#define show_debug_msk(x,y)   do{ if(show_data_debug) {printk(KERN_ERR "%s:\n",__func__);show_data(x,y);} }while(0)
+
+static void show_data(void * base,int num)
+{
+    int i=0;
+    unsigned char *arry=( unsigned char *) base;
+    for(i=0;i<num;i++){
+        if(!(i % 32)){
+            printk(KERN_ERR "\n");
+        }
+        if(!(i % 16)){
+            printk("  ");
+        }
+        printk("%02x ",arry[i]);
+    }
+    printk(KERN_ERR "\n");
+    
+}
+
+
+static int ls1b_nand_init_buff(struct ls1b_nand_info *info)
+{
+        struct platform_device *pdev = info->pdev;
+    	info->data_buff = dma_alloc_coherent(&pdev->dev, MAX_BUFF_SIZE,
+				&info->data_buff_phys, GFP_KERNEL);
+        info->data_buff = CAC_ADDR(info->data_buff);
+//        printk("info->data_buff===================0x%08x\n",info->data_buff);
+	if (info->data_buff == NULL) {
+		dev_err(&pdev->dev, "failed to allocate dma buffer\n");
+		return -ENOMEM;
+	}
+       	info->data_buff_size = MAX_BUFF_SIZE;
+        return 0;
+}
+static int ls1b_nand_ecc_calculate(struct mtd_info *mtd,
+		const uint8_t *dat, uint8_t *ecc_code)
+{
+	return 0;
+}
+static int ls1b_nand_ecc_correct(struct mtd_info *mtd,
+		uint8_t *dat, uint8_t *read_ecc, uint8_t *calc_ecc)
+{
+	struct ls1b_nand_info *info = mtd->priv;
+	/*
+	 * Any error include ERR_SEND_CMD, ERR_DBERR, ERR_BUSERR, we
+	 * consider it as a ecc error which will tell the caller the
+	 * read fail We have distinguish all the errors, but the
+	 * nand_read_ecc only check this function return value
+	 */
+	return 0;
+}
+
+static void ls1b_nand_ecc_hwctl(struct mtd_info *mtd, int mode)
+{
+	return;
+}
+
+
+
+
+static int ls1b_nand_waitfunc(struct mtd_info *mtd, struct nand_chip *this)
+{
+//        struct ls1b_nand_info *info = mtd->priv;	//lxy
+//	while(info->state == STATE_BUSY)
+	udelay(50);
+	return 0;
+}
+static void ls1b_nand_select_chip(struct mtd_info *mtd, int chip)
+{
+	return;
+}
+static int ls1b_nand_dev_ready(struct mtd_info *mtd)
+{
+//        struct ls1b_nand_info *info = mtd->priv;
+//	while(info->state == STATE_BUSY)
+//		udelay(50);
+	return 1;
+}
+static void ls1b_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+        struct ls1b_nand_info *info = mtd->priv;
+        int i,real_len = min_t(size_t, len, info->buf_count - info->buf_start);
+	int com_addr;
+/*
+        if(!(info->coherent)){
+            dma_cache_inv((unsigned long)(info->data_buff),info->cac_size);
+            info->coherent = 1; 
+        }
+*/
+	memcpy(buf, info->data_buff + info->buf_start, real_len);
+
+//        show_debug(info->data_buff,0x40);
+
+        info->buf_start += real_len;
+
+/*
+	    com_addr = info->nand_regs.addrl;
+//	    if ((com_addr == 0x6c54000) || (com_addr == 0xec54000))
+	    if (com_addr == 0xd8a8000) 
+	    {
+		    printk ("lxy: in %s !\n", __FUNCTION__);
+		    printk ("lxy: seqin_page= 0x%08x , length= %d!\n", com_addr, real_len);
+		    show_data((void *)buf, real_len);
+	    }
+*/
+}
+static u16 ls1b_nand_read_word(struct mtd_info *mtd)
+{
+        struct ls1b_nand_info *info = mtd->priv;
+        u16 retval = 0xFFFF;
+/*
+        if(!(info->coherent)){
+            dma_cache_inv((unsigned long)(info->data_buff),info->cac_size);
+            info->coherent = 1; 
+        }
+*/        
+        if(!(info->buf_start & 0x1) && info->buf_start < info->buf_count){
+            retval = *(u16 *)(info->data_buff + info->buf_start);
+        }
+        info->buf_start += 2;
+        return retval;
+
+
+}
+static uint8_t ls1b_nand_read_byte(struct mtd_info *mtd)
+{
+        struct ls1b_nand_info *info = mtd->priv;
+	char retval = 0xFF;
+/*
+        if(!(info->coherent)){
+            dma_cache_inv((unsigned long)(info->data_buff),info->cac_size);
+            info->coherent = 1; 
+        }
+*/
+	if (info->buf_start < info->buf_count)
+		retval = info->data_buff[(info->buf_start)++];
+       // show_debug(info->data_buff,6);
+	return retval;
+}
+static void ls1b_nand_write_buf(struct mtd_info *mtd,const uint8_t *buf, int len)
+{
+        int i;
+        struct ls1b_nand_info *info = mtd->priv;
+	int real_len = min_t(size_t, len, info->buf_count - info->buf_start);
+	int com_addr;
+
+	memcpy(info->data_buff + info->buf_start, buf, real_len);
+ //           show_debug(info->data_buff,0x20);
+ //           show_debug(info->data_buff+2048,0x20);
+ //
+ 
+//        dma_cache_wback((void *)(info->data_buff + info->buf_start), real_len);	//lxy
+
+	info->buf_start += real_len;
+
+/*
+	    com_addr = (info->seqin_page_addr << 11) ;
+	    if ((com_addr == 0x6c54000) || (com_addr == 0xec54000))
+	    {
+		    printk ("lxy: in %s !\n", __FUNCTION__);
+		    printk ("lxy: seqin_page= 0x%08x , length= %d!\n", com_addr, real_len);
+		    show_data((void *)buf, real_len);
+	    }
+*/
+}
+static int ls1b_nand_verify_buf(struct mtd_info *mtd,const uint8_t *buf, int len)
+{
+       int i=0; 
+        struct ls1b_nand_info *info = mtd->priv;
+            show_debug(info->data_buff,0x20);
+        while(len--){
+            if(buf[i++] != ls1b_nand_read_byte(mtd) ){
+//                printk(KERN_INFO "????????? verify error..., i= %d !                ", i-1);
+                return -1;
+            }
+        }
+	return 0;
+}
+static void ls1b_nand_cmdfunc(struct mtd_info *mtd, unsigned command,int column, int page_addr);
+static void ls1b_nand_init_mtd(struct mtd_info *mtd,struct ls1b_nand_info *info)
+{
+	struct nand_chip *this = &info->nand_chip;
+
+
+	this->options = 8;//(f->flash_width == 16) ? NAND_BUSWIDTH_16: 0;
+
+	this->waitfunc		= ls1b_nand_waitfunc;
+	this->select_chip	= ls1b_nand_select_chip;
+	this->dev_ready		= ls1b_nand_dev_ready;
+	this->cmdfunc		= ls1b_nand_cmdfunc;
+	this->read_word		= ls1b_nand_read_word;
+	this->read_byte		= ls1b_nand_read_byte;
+	this->read_buf		= ls1b_nand_read_buf;
+	this->write_buf		= ls1b_nand_write_buf;
+	this->verify_buf	= ls1b_nand_verify_buf;
+
+//        this->ecc.mode		= NAND_ECC_NONE;
+ 	this->ecc.mode		= NAND_ECC_SOFT;
+//	this->ecc.hwctl		= ls1b_nand_ecc_hwctl;
+//	this->ecc.calculate	= ls1b_nand_ecc_calculate;
+//	this->ecc.correct	= ls1b_nand_ecc_correct;
+//	this->ecc.size		= 2048;
+//        this->ecc.bytes         = 24;
+
+//	this->ecc.layout = &hw_largepage_ecclayout;
+	mtd->owner = THIS_MODULE;
+}
+static void show_dma_regs(void *dma_regs,int flag)
+{
+	return ;
+	/*    unsigned int *regs=dma_regs;
+	      printk("\n");
+	      printk("0x%08x:0x%08x\n",regs,*regs);
+	      printk("0x%08x:0x%08x\n",++regs,*regs);
+	      printk("0x%08x:0x%08x\n",++regs,*regs);
+	      printk("0x%08x:0x%08x\n",++regs,*regs);
+	      printk("0x%08x:0x%08x\n",++regs,*regs);
+	      printk("0x%08x:0x%08x\n",++regs,*regs);
+	      printk("0x%08x:0x%08x\n",++regs,*regs);
+	      if(flag)
+	      printk("0xbfd01160:0x%08x\n",*(volatile unsigned int *)0xbfd01160);
+	      */
+}
+static unsigned ls1b_nand_status(struct ls1b_nand_info *info)
+{
+	return(*((volatile unsigned int*)0xbfe78000) & (0x1<<10));
+}
+
+#define	clear_flag	do {*((volatile unsigned int *)(0xbfe78000)) &= 0x0;}while(0)
+
+#define write_z_cmd  do{                                    \
+	*((volatile unsigned int *)(0xbfe78000)) = 0;   \
+	*((volatile unsigned int *)(0xbfe78000)) = 0;   \
+	*((volatile unsigned int *)(0xbfe78000)) = 400; \
+}while(0)
+//static int nand_num=0;
+static irqreturn_t ls1b_nand_irq(int irq,void *devid)
+{
+	int status_time;
+	struct ls1b_nand_info *info = devid;
+	struct ls1b_nand_dma_desc *dma_regs = (volatile struct ls1b_nand_dma_desc *)(info->drcmr_dat);
+	struct ls1b_nand_dma_cmd *dma_cmd = (struct ls1b_nand_dma_cmd *)(&(dma_regs->cmd));
+	switch(info->cmd){
+		case NAND_CMD_READOOB:
+		case NAND_CMD_READ0:
+//			udelay(20);
+			//            info->state = STATE_READY;
+			//            break;
+		case NAND_CMD_PAGEPROG:
+			status_time=STATUS_TIME_LOOP_WS;
+			while(!(ls1b_nand_status(info))){
+				/*                if(!(status_time--)){
+						  write_z_cmd;
+				//                    nand_num++;
+				break;
+				}	*/
+				udelay(50);
+			}
+			//            info->state = STATE_READY;	//lxy
+			udelay(50);	//lxy
+			break;
+		default:
+//			printk(KERN_ERR "this never happend!!!^^^^^^^^^^^^^^&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&\n");
+			break;
+	}
+	complete(&info->cmd_complete);
+	return IRQ_HANDLED;
+
+}
+/*
+ *  flags & 0x1   orderad
+ *  flags & 0x2   saddr
+ *  flags & 0x4   daddr
+ *  flags & 0x8   length
+ *  flags & 0x10  step_length
+ *  flags & 0x20  step_times
+ *  flags & 0x40  cmd
+ ***/
+unsigned int cpy_buf[2112];
+static unsigned char flagsss=0;
+static void dma_setup(unsigned int flags,struct ls1b_nand_info *info)
+{
+    struct ls1b_nand_dma_desc *dma_base = (volatile struct ls1b_nand_dma_desc *)(info->drcmr_dat);
+    int status_time;
+    int k=0;
+	unsigned int *uncache_buf;
+
+    dma_base->orderad = (flags & DMA_ORDERAD)== DMA_ORDERAD ? info->dma_regs.orderad : info->dma_orderad;
+    dma_base->saddr = (flags & DMA_SADDR)== DMA_SADDR ? info->dma_regs.saddr : info->dma_saddr;
+    dma_base->daddr = (flags & DMA_DADDR)== DMA_DADDR ? info->dma_regs.daddr : info->dma_daddr;
+    dma_base->length = (flags & DMA_LENGTH)== DMA_LENGTH ? info->dma_regs.length: info->dma_length;
+    dma_base->step_length = (flags & DMA_STEP_LENGTH)== DMA_STEP_LENGTH ? info->dma_regs.step_length: info->dma_step_length;
+    dma_base->step_times = (flags & DMA_STEP_TIMES)== DMA_STEP_TIMES ? info->dma_regs.step_times: info->dma_step_times;
+    dma_base->cmd = (flags & DMA_CMD)== DMA_CMD ? info->dma_regs.cmd: info->dma_cmd;
+//	printk("----------dbg-yg---> orderad:0x%08x, saddr:0x%08x, daddr:0x%08x, length:0x%08x, step_length:0x%08x, step_times:0x%08x, cmd:0x%08x...\r\n", dma_base->orderad, dma_base->saddr, dma_base->daddr,dma_base->length,dma_base->step_times, dma_base->cmd);
+#if 1
+    if((dma_base->cmd)&(0x1 << 12)){  /*** dbg-yg write ddr data to device  ***/
+
+//	memcpy((unsigned char*)cpy_buf, info->data_buff, info->cac_size);
+        dma_cache_wback((void *)(info->data_buff), info->cac_size);
+//        dma_cache_wback((unsigned long)(info->data_buff),info->cac_size);
+
+#if 0
+//	memcpy((unsigned char*)cpy_buf, info->data_buff, info->cac_size);
+	uncache_buf = (unsigned int *)((unsigned int)info->data_buff | 0xa0000000);
+	for (; k<info->cac_size/4; k++)
+	{
+		if (cpy_buf[k] != uncache_buf[k])
+			printk ("error data at: %, 0x%x --> 0x%x \n", k, cpy_buf[k], uncache_buf[k]);
+	}
+#endif
+    }
+#endif
+
+    dma_cache_wback((unsigned long)(info->drcmr_dat),0x20);
+
+    {
+    long flags;
+    local_irq_save(flags);
+    *(volatile unsigned int *)info->order_reg_addr = ((unsigned int )info->drcmr_dat_phys) | 0x1<<3;
+    while (*(volatile unsigned int *)info->order_reg_addr & 0x8 );
+#ifdef USE_POLL
+	/*wait nand irq*/
+    while (*(volatile unsigned int*)(0xbfd01040) &0x2000 == 0 );
+	/*clear irq*/
+    *(volatile unsigned int *)(0xbfd0104c) |=0x2000;
+//    udelay(5);
+    //if(flagsss){
+//    if(1){
+    status_time=STATUS_TIME_LOOP_WS;
+    while(!(ls1b_nand_status(info))){
+        if(!(status_time--)){
+			/*time out,so clear cmd,fixme */
+            write_z_cmd;
+            break;
+        }
+        udelay(60);
+    }
+    info->state = STATE_READY;
+//    }
+#endif
+    local_irq_restore(flags);
+    }
+}
+/**
+ *  flags & 0x1     cmd
+ *  flags & 0x2     addrl
+ *  flags & 0x4     addrh
+ *  flags & 0x8     timing
+ *  flags & 0x10    idl
+ *  flags & 0x20    status_idh
+ *  flags & 0x40    param
+ *  flags & 0x80    op_num
+ *  flags & 0x100   cs_rdy_map
+ ****/
+static void nand_setup(unsigned int flags ,struct ls1b_nand_info *info)
+{
+    int i,val1,val2,val3;
+    volatile struct ls1b_nand_desc *nand_base = (struct ls1b_nand_desc *)(info->mmio_base);
+    nand_base->cmd = 0;
+    nand_base->addrl = (flags & NAND_ADDRL)==NAND_ADDRL ? info->nand_regs.addrl: info->nand_addrl;
+    nand_base->addrh = (flags & NAND_ADDRH)==NAND_ADDRH ? info->nand_regs.addrh: info->nand_addrh;
+    nand_base->timing = (flags & NAND_TIMING)==NAND_TIMING ? info->nand_regs.timing: info->nand_timing;
+    nand_base->op_num = (flags & NAND_OP_NUM)==NAND_OP_NUM ? info->nand_regs.op_num: info->nand_op_num;
+    nand_base->cs_rdy_map = (flags & NAND_CS_RDY_MAP)==NAND_CS_RDY_MAP ? info->nand_regs.cs_rdy_map: info->nand_cs_rdy_map;
+    if(flags & NAND_CMD){
+            if(info->nand_regs.cmd & 0x4)
+                flagsss=1;
+            else
+                flagsss=0;
+        
+            nand_base->cmd = (info->nand_regs.cmd) & (~0xff);
+            nand_base->cmd = info->nand_regs.cmd;
+#if 0
+            if(info->nand_regs.cmd & 0x20){
+            i = 100;
+            while(!ls1b_nand_status(info)){
+                if(!(i--)){
+                    write_z_cmd;
+                    break;
+                }
+                udelay(30);
+            }
+            *(int *)(info->data_buff) = nand_base->idl;
+        }
+#endif            
+    }
+    else
+        nand_base->cmd = info->nand_cmd;
+
+//	printk("---------dbg-yg cmd:0x%08x , addrl:0x%08x ,addrh:0x%08x, timing:0x%08x, op_num:0x%08x,cs_rdy_map:0x%08x......\r\n", nand_base->cmd, nand_base->addrl, nand_base->addrh, nand_base->timing, nand_base->op_num, nand_base->cs_rdy_map);
+}
+static void ls1b_nand_cmdfunc(struct mtd_info *mtd, unsigned command,int column, int page_addr)
+{
+        struct ls1b_nand_info *info = mtd->priv;
+        unsigned cmd_prev;
+        int status_time,page_prev;
+        int timeout = CHIP_DELAY_TIMEOUT;
+        init_completion(&info->cmd_complete);
+        cmd_prev = info->cmd;
+        page_prev = info->page_addr;
+
+        info->cmd = command;
+        info->page_addr = page_addr;
+        switch(command){
+#if 1 
+            case NAND_CMD_READOOB:
+                if(info->state == STATE_BUSY){
+                    printk(KERN_INFO "nandflash chip if busy...\n");
+                    return;
+                }
+
+                info->state = STATE_BUSY; 
+                info->buf_count = mtd->oobsize;
+                info->buf_start = 0;
+                info->cac_size = info->buf_count;
+                if(info->buf_count <=0 )
+                    break;
+                /*nand regs set*/
+                info->nand_regs.addrh =  SPARE_ADDRH(page_addr);
+                info->nand_regs.addrl = SPARE_ADDRL(page_addr) + mtd->writesize;
+                info->nand_regs.op_num = info->buf_count;
+               /*nand cmd set */ 
+                info->nand_regs.cmd = 0; 
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->read = 1;
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->op_spare = 1;
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->cmd_valid = 1;
+                /*dma regs config*/
+                info->dma_regs.length =ALIGN_DMA(info->buf_count);
+                ((struct ls1b_nand_dma_cmd *)&(info->dma_regs.cmd))->dma_int_mask = 1;
+                /*dma GO set*/       
+                nand_setup(NAND_ADDRL|NAND_ADDRH|NAND_OP_NUM|NAND_CMD,info);
+                dma_setup(DMA_LENGTH|DMA_CMD,info);
+                break;
+#endif
+//            case NAND_CMD_READOOB:
+            case NAND_CMD_READ0:
+                if(info->state == STATE_BUSY){
+                    printk(KERN_INFO "nandflash chip if busy...\n");
+                    return;
+                }
+                info->state = STATE_BUSY;
+                info->buf_count = mtd->oobsize + mtd->writesize ;
+                info->buf_start =  0 ;
+                info->cac_size = info->buf_count;
+                if(info->buf_count <=0 )
+                    break;
+                info->nand_regs.addrh = SPARE_ADDRH(page_addr);
+                info->nand_regs.addrl = SPARE_ADDRL(page_addr);
+                info->nand_regs.op_num = info->buf_count;
+//		printk ("READ0: column=0x%x, page_addr=0x%x !                 ", column, page_addr);
+//		printk ("lxy: READ0's addrl= 0x%x !\n", info->nand_regs.addrl);
+               /*nand cmd set */ 
+                info->nand_regs.cmd = 0; 
+                info->dma_regs.cmd = 0;
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->read = 1;
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->op_spare = 1;
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->op_main = 1;
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->cmd_valid = 1; 
+                /*dma regs config*/
+                info->dma_regs.length = ALIGN_DMA(info->buf_count);
+                ((struct ls1b_nand_dma_cmd *)&(info->dma_regs.cmd))->dma_int_mask = 1;
+                nand_setup(NAND_ADDRL|NAND_ADDRH|NAND_OP_NUM|NAND_CMD,info);
+                dma_setup(DMA_LENGTH|DMA_CMD,info);
+                break;
+            case NAND_CMD_SEQIN:
+                if(info->state == STATE_BUSY){
+                    printk(KERN_INFO "nandflash chip if busy...\n");
+                    return;
+                }
+                info->state = STATE_BUSY;
+                info->buf_count = mtd->oobsize + mtd->writesize - column;
+                info->buf_start = 0;
+                info->seqin_column = column;
+                info->seqin_page_addr = page_addr;
+                complete(&info->cmd_complete);
+                break;
+            case NAND_CMD_PAGEPROG:
+//                info->coherent = 0;
+                if(info->state == STATE_BUSY){
+                    printk(KERN_INFO "nandflash chip if busy...\n");
+                    return;
+                }
+                info->state = STATE_BUSY;
+                if(cmd_prev != NAND_CMD_SEQIN){
+                    printk(KERN_INFO "Prev cmd don't complete...\n");
+                    break;
+                }
+                if(info->buf_count <= 0 )
+                    break;
+
+#if 0                
+                if(((info->num)++) % 512 == 0){
+                    printk("nand have write : %d M\n",(info->size)++); 
+                }
+#endif
+                /*nand regs set*/
+                info->nand_regs.addrh =  SPARE_ADDRH(info->seqin_page_addr);
+                info->nand_regs.addrl =  SPARE_ADDRL(info->seqin_page_addr) + info->seqin_column;
+//		printk ("lxy: program's addrl= 0x%x !\n", info->nand_regs.addrl);
+                info->nand_regs.op_num = info->buf_start;
+                info->cac_size = info->buf_start;	//lxy
+                /*nand cmd set */ 
+                info->nand_regs.cmd = 0; 
+                info->dma_regs.cmd = 0;
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->write = 1;
+                if(info->seqin_column < mtd->writesize)
+                    ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->op_main = 1;
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->op_spare = 1;
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->cmd_valid = 1; 
+                /*dma regs config*/
+                info->dma_regs.length = ALIGN_DMA(info->buf_start);
+                ((struct ls1b_nand_dma_cmd *)&(info->dma_regs.cmd))->dma_int_mask = 1;
+                ((struct ls1b_nand_dma_cmd *)&(info->dma_regs.cmd))->dma_r_w = 1;
+                nand_setup(NAND_ADDRL|NAND_ADDRH|NAND_OP_NUM|NAND_CMD,info);
+                dma_setup(DMA_LENGTH|DMA_CMD,info);
+                break;
+            case NAND_CMD_RESET:
+                /*Do reset op anytime*/
+//                info->state = STATE_BUSY;
+               /*nand cmd set */ 
+                info->nand_regs.cmd = 0; 
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->reset = 1;
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->cmd_valid = 1; 
+                nand_setup(NAND_CMD,info);
+                status_time = STATUS_TIME_LOOP_R;
+                while(!ls1b_nand_status(info)){
+                    if(!(status_time--)){
+                        write_z_cmd;
+                        break;
+                    }
+                    udelay(50);
+                }
+//                info->state = STATE_READY;
+                complete(&info->cmd_complete);
+                break;
+            case NAND_CMD_ERASE1:
+                if(info->state == STATE_BUSY){
+                    printk(KERN_INFO "nandflash chip if busy...\n");
+                    return;
+                }
+                info->state = STATE_BUSY;
+                /*nand regs set*/
+                info->nand_regs.addrh =  NO_SPARE_ADDRH(page_addr);
+                info->nand_regs.addrl =  NO_SPARE_ADDRL(page_addr) ;
+//		printk ("lxy: erase's addrl= 0x%x !\n", info->nand_regs.addrl);
+               /*nand cmd set */
+                info->nand_regs.cmd = 0; 
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->erase_one = 1;
+                ((struct ls1b_nand_cmdset*)&(info->nand_regs.cmd))->cmd_valid = 1;
+                nand_setup(NAND_ADDRL|NAND_ADDRH|NAND_OP_NUM|NAND_CMD,info);
+//                show_dma_regs(0xbfe78000,0);
+                status_time = STATUS_TIME_LOOP_E;
+		mdelay(50);    //lxy
+                while(!ls1b_nand_status(info)){
+/*                    if(!(status_time--)){
+                        write_z_cmd;
+                        break;
+                    }	*/
+                    udelay(50);    
+                }
+			udelay(50);    
+                info->state = STATE_READY;
+                complete(&info->cmd_complete);
+                break;
+            case NAND_CMD_STATUS:
+                if(info->state == STATE_BUSY){
+                    printk(KERN_INFO "nandflash chip if busy...\n");
+                    return;
+                }
+                info->state = STATE_BUSY;
+                info->buf_count = 0x1;
+                info->buf_start = 0x0;
+                *(unsigned char *)info->data_buff=ls1b_nand_status(info) | 0x80;
+                complete(&info->cmd_complete);
+                break;
+            case NAND_CMD_READID:
+                if(info->state == STATE_BUSY){
+                    printk(KERN_INFO "nandflash chip if busy...\n");
+                    return;
+                }
+                info->state = STATE_BUSY;
+                info->buf_count = 0x4;
+                info->buf_start = 0;
+                /*
+                 * read id use GPIO
+                 *
+                 * */
+//                *((int *)(info->data_buff)) = nand_gpio_read_id();
+//                printk(KERN_ERR "IDS=============================0x%x\n",*((int *)(info->data_buff)));
+
+               {
+
+                   unsigned int id_val_l=0,id_val_h=0;
+                   unsigned int timing = 0;
+                   unsigned char *data = (unsigned char *)(info->data_buff);
+                   _NAND_READ_REG(0xc,timing);
+                   _NAND_SET_REG(0xc,0x30f0); 
+                   _NAND_SET_REG(0x0,0x21); 
+
+                   while(((id_val_l |= _NAND_IDL) & 0xff)  == 0){
+                       id_val_h = _NAND_IDH;
+                   }
+
+		   while (id_val_h == 0)	//lxy
+		   {
+			   id_val_h = _NAND_IDH;
+		   }
+
+//		   while (((id_val_h = _NAND_IDH) & 0xff000000) == 0xec)
+//			   id_val_l = _NAND_IDL;
+
+//                   printk("id_val_l=0x%08x\nid_val_h=0x%08x\n",id_val_l,id_val_h);
+                   _NAND_SET_REG(0xc,timing);
+		   udelay(50);
+                   data[0]  = (id_val_h & 0xff);
+                   data[1]  = (id_val_l & 0xff000000)>>24;
+                   data[2]  = (id_val_l & 0x00ff0000)>>16;
+                   data[3]  = (id_val_l & 0x0000ff00)>>8;
+//                printk(KERN_ERR "IDS=============================0x%x\n",*((int *)(info->data_buff)));
+
+               }
+//                info->state = STATE_READY;
+                complete(&info->cmd_complete);
+                break;
+            case NAND_CMD_ERASE2:
+            case NAND_CMD_READ1:
+                complete(&info->cmd_complete);
+                break;
+
+	    case NAND_CMD_RNDOUT:	//lxy
+                if(info->state == STATE_BUSY){
+                    printk(KERN_INFO "nandflash chip if busy...\n");
+                    return;
+                }
+		info->buf_count = mtd->oobsize + mtd->writesize;
+		info->buf_start = column;         
+		complete(&info->cmd_complete);
+		break;
+
+            default :
+                printk(KERN_ERR "non-supported command.\n");
+                complete(&info->cmd_complete);
+		break;
+        }
+        wait_for_completion(&info->cmd_complete);
+	clear_flag;	//lxy
+//        wait_for_completion_timeout(&info->cmd_complete,timeout);
+        if(info->cmd == NAND_CMD_READ0 || info->cmd == NAND_CMD_READOOB ){
+            dma_cache_inv((unsigned long)(info->data_buff),info->cac_size);
+        }
+        info->state = STATE_READY;
+
+}
+static int ls1b_nand_detect(struct mtd_info *mtd)
+{
+        return (mtd->erasesize != 1<<17 || mtd->writesize != 1<<11 || mtd->oobsize != 1<<6);
+
+}
+
+static void test_handler(unsigned long data)
+{
+    u32 val;
+
+//    printk("%s.\n",__func__);
+    struct ls1b_nand_info *s = (struct ls1b_nand_info *)data;
+    mod_timer(&s->test_timer, jiffies+1);
+    val = s->dma_ask_phy | 0x4;
+    *((volatile unsigned int *)0xbfd01160) = val;
+    udelay(1000);
+}
+
+
+static void ls1b_nand_init_info(struct ls1b_nand_info *info)
+{
+
+
+//    *((volatile unsigned int *)0xbfe78018) = 0x30000;
+    info->timing_flag = 1;/*0:read; 1:write;*/
+    info->num=0;
+    info->size=0;
+//    info->coherent = 0;
+    info->cac_size = 0; 
+    info->state = STATE_READY;
+    info->cmd = -1;
+    info->page_addr = -1;
+    info->nand_addrl = 0x0;
+    info->nand_addrh = 0x0;
+    info->nand_timing = 0x513; //0xa40;// 0x4<<8 | 0x12;
+//    info->nand_timing = 0x6<<8 | 0x16;	//lxy
+    info->nand_op_num = 0x0;
+    info->nand_cs_rdy_map = 0x00000000;
+    info->nand_cmd = 0;
+
+    info->dma_orderad = 0x0;
+    info->dma_saddr = info->data_buff_phys;
+    info->dma_daddr = DMA_ACCESS_ADDR;
+    info->dma_length = 0x0;
+    info->dma_step_length = 0x0;
+    info->dma_step_times = 0x1;
+    info->dma_cmd = 0x0;
+
+
+    init_timer(&info->test_timer);
+    info->test_timer.function = test_handler;
+    info->test_timer.expires = jiffies + 10;
+    info->test_timer.data = (unsigned long)info;
+//    add_timer(&info->test_timer);
+
+
+    info->order_reg_addr = ORDER_REG_ADDR;
+}
+static int ls1b_nand_probe(struct platform_device *pdev)
+{
+	struct ls1b_nand_platform_data *pdata;
+	struct ls1b_nand_info *info;
+	struct nand_chip *this;
+	struct mtd_info *mtd;
+	struct resource *r;
+	int ret = 0, irq;
+//#ifdef CONFIG_MTD_PARTITIONS
+	const char *part_probes[] = { "cmdlinepart", NULL };
+	struct mtd_partition *partitions = NULL;
+	int num_partitions = 0;
+//#endif
+
+	printk(" ----------------------dbg-yg-----> ls1b_nand_probe 1 \r\n");
+	nand_gpio_init();
+
+	pdata = pdev->dev.platform_data;
+
+	if (!pdata) {
+		dev_err(&pdev->dev, "no platform data defined\n");
+		return -ENODEV;
+	}
+
+	mtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct ls1b_nand_info),
+			GFP_KERNEL);
+	if (!mtd) {
+		dev_err(&pdev->dev, "failed to allocate memory\n");
+		return -ENOMEM;
+	}
+
+	info = (struct ls1b_nand_info *)(&mtd[1]);
+	info->pdev = pdev;
+
+	this = &info->nand_chip;
+	mtd->priv = info;
+        info->drcmr_dat =(unsigned int ) dma_alloc_coherent(&pdev->dev, MAX_BUFF_SIZE,
+				&info->drcmr_dat_phys, GFP_KERNEL);
+        info->drcmr_dat = CAC_ADDR(info->drcmr_dat);
+        info->dma_ask =(unsigned int ) dma_alloc_coherent(&pdev->dev, MAX_BUFF_SIZE,
+				&info->dma_ask_phy, GFP_KERNEL);
+
+//        printk("info->drcmr_dat===================0x%08x\n",info->drcmr_dat);
+        if(!info->drcmr_dat){
+                dev_err(&pdev->dev,"fialed to allocate memory\n");
+                return ENOMEM;
+        }
+        r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (r == NULL) {
+		dev_err(&pdev->dev, "no IO memory resource defined\n");
+		ret = -ENODEV;
+		goto fail_put_clk;
+	}
+
+	r = request_mem_region(r->start, r->end - r->start + 1, pdev->name);
+	if (r == NULL) {
+		dev_err(&pdev->dev, "failed to request memory resource\n");
+		ret = -EBUSY;
+		goto fail_put_clk;
+	}
+
+	info->mmio_base = ioremap(r->start, r->end - r->start + 1);
+	if (info->mmio_base == NULL) {
+		dev_err(&pdev->dev, "ioremap() failed\n");
+		ret = -ENODEV;
+		goto fail_free_res;
+	}
+        ret = ls1b_nand_init_buff(info);
+	if (ret)
+		goto fail_free_io;
+        
+        irq = platform_get_irq(pdev, 0);
+	if (irq < 0) {
+		dev_err(&pdev->dev, "no IRQ resource defined\n");
+		ret = -ENXIO;
+		goto fail_put_clk;
+	}
+	ret = request_irq(irq, ls1b_nand_irq, IRQF_DISABLED,pdev->name, info);
+	if (ret < 0) {
+		dev_err(&pdev->dev, "failed to request IRQ\n");
+		goto fail_free_buf;
+	}
+
+        ls1b_nand_init_mtd(mtd, info);
+
+         ls1b_nand_init_info(info);
+        platform_set_drvdata(pdev, mtd);   
+
+        if (nand_scan(mtd, 1)) {
+		dev_err(&pdev->dev, "failed to scan nand\n");
+		ret = -ENXIO;
+		goto fail_free_irq;
+	}
+        if(ls1b_nand_detect(mtd)){
+                dev_err(&pdev->dev, "driver don't support the Flash!\n");
+                ret = -ENXIO;
+                goto fail_free_irq;
+        }
+//#ifdef CONFIG_MTD_PARTITIONS
+//#ifdef CONFIG_MTD_CMDLINE_PARTS
+	mtd->name = "mtd0";
+	num_partitions = parse_mtd_partitions(mtd, part_probes,
+					      &partitions, 0);
+//#endif
+	if (num_partitions <= 0 )
+		{
+		  partitions = pdata->parts;
+		  num_partitions = pdata->nr_parts;
+			
+		}
+//         return add_mtd_partitions(mtd, partitions , num_partitions);
+		return mtd_device_register(mtd, partitions , num_partitions);
+//#else
+//		 return add_mtd_device(mtd);
+//#endif
+fail_free_irq:
+	free_irq(13, info);
+fail_free_buf:
+    	dma_free_coherent(&pdev->dev, info->data_buff_size,info->data_buff, info->data_buff_phys);
+fail_free_io:
+	iounmap(info->mmio_base);
+fail_free_res:
+	release_mem_region(r->start, r->end - r->start + 1);
+fail_put_clk:
+fail_free_mtd:
+	kfree(mtd);
+	return ret;
+}
+
+static int ls1b_nand_remove(struct platform_device *pdev)
+{
+	struct mtd_info *mtd = platform_get_drvdata(pdev);
+	struct ls1b_nand_info *info = mtd->priv;
+
+	platform_set_drvdata(pdev, NULL);
+
+//	del_mtd_device(mtd);
+//	del_mtd_partitions(mtd);
+	nand_release(mtd);
+	free_irq(13, info);
+        kfree(info->drcmr_dat);
+/*struct ls1b_nand_platform_data{
+    int enable_arbiter;
+    struct mtd_partition *parts;
+    unsigned int nr_parts;
+};*/
+	kfree(mtd);
+	return 0;
+}
+static int ls1b_nand_suspend(struct platform_device *pdev)
+{
+	struct mtd_info *mtd = (struct mtd_info *)platform_get_drvdata(pdev);
+	struct ls1b_nand_info *info = mtd->priv;
+
+	if (info->state != STATE_READY) {
+		dev_err(&pdev->dev, "driver busy, state = %d\n", info->state);
+		return -EAGAIN;
+	}
+
+	return 0;
+}
+static int ls1b_nand_resume(struct platform_device *pdev)
+{
+        return 0;
+}
+static struct platform_driver ls1b_nand_driver = {
+	.driver = {
+		.name	= "ls1b-nand",
+                .owner	= THIS_MODULE,
+	},
+	.probe		= ls1b_nand_probe,
+	.remove		= ls1b_nand_remove,
+	.suspend	= ls1b_nand_suspend,
+	.resume		= ls1b_nand_resume,
+};
+
+static int __init ls1b_nand_init(void)
+{
+    int ret = 0;
+	printk(" ----------------------dbg-yg-----> ls1b_nand_init 1 \r\n");
+    ret = platform_driver_register(&ls1b_nand_driver);
+    if(ret){
+        printk(KERN_ERR "failed to register loongson_1g_nand_driver");
+    }
+    return ret;
+}
+static void __exit ls1b_nand_exit(void)
+{
+    platform_driver_unregister(&ls1b_nand_driver);
+}
+module_init(ls1b_nand_init);
+module_exit(ls1b_nand_exit);
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Loongson_1g NAND controller driver");
+
diff -uNra linux-3.0.82/drivers/mtd/nand/Makefile linux-3.0.82x/drivers/mtd/nand/Makefile
--- linux-3.0.82/drivers/mtd/nand/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/mtd/nand/Makefile	2017-09-23 03:42:49.662676151 +0800
@@ -8,6 +8,7 @@
 obj-$(CONFIG_MTD_NAND_IDS)		+= nand_ids.o
 obj-$(CONFIG_MTD_SM_COMMON) 		+= sm_common.o
 
+obj-$(CONFIG_MTD_NAND_LS1X)		+= ls1b-nand.o
 obj-$(CONFIG_MTD_NAND_CAFE)		+= cafe_nand.o
 obj-$(CONFIG_MTD_NAND_SPIA)		+= spia.o
 obj-$(CONFIG_MTD_NAND_AMS_DELTA)	+= ams-delta.o
diff -uNra linux-3.0.82/drivers/mtd/nand/nand_base.c linux-3.0.82x/drivers/mtd/nand/nand_base.c
--- linux-3.0.82/drivers/mtd/nand/nand_base.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/mtd/nand/nand_base.c	2017-09-23 03:42:49.666676140 +0800
@@ -49,6 +49,10 @@
 #include <linux/io.h>
 #include <linux/mtd/partitions.h>
 
+
+
+int com_flag = 0;
+
 /* Define default oob placement schemes for large and small page devices */
 static struct nand_ecclayout nand_oob_8 = {
 	.eccbytes = 3,
@@ -1124,6 +1128,8 @@
 	uint8_t *ecc_code = chip->buffers->ecccode;
 	uint32_t *eccpos = chip->ecc.layout->eccpos;
 
+//	if ((page << 11) == 0x6c54000)
+//		printk ("ecc read......, page= 0x%08x\n", page);
 	chip->ecc.read_page_raw(mtd, chip, buf, page);
 
 	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
@@ -1132,6 +1138,24 @@
 	for (i = 0; i < chip->ecc.total; i++)
 		ecc_code[i] = chip->oob_poi[eccpos[i]];
 
+/*
+	if ((page << 11) == 0x6c54000)
+	{
+		printk ("print ecc data......\n");
+		printk ("ecc_code= ");
+		for (i = 0; i < chip->ecc.total; i++)
+		{
+			printk ("%02x ", ecc_code[i]);
+		}
+		printk ("\necc_cale= ");
+		for (i = 0; i < chip->ecc.total; i++)
+		{
+			printk ("%02x ", ecc_calc[i]);
+		}
+		printk ("\necc read end......\n");
+	}
+*/
+	
 	eccsteps = chip->ecc.steps;
 	p = buf;
 
@@ -1147,6 +1171,25 @@
 	return 0;
 }
 
+
+
+static void show_data(void * base,int num)
+{
+    int i=0;
+    unsigned char *arry=( unsigned char *) base;
+    for(i=0;i<num;i++){
+        if(!(i % 32)){
+            printk(KERN_ERR "\n");
+        }
+        if(!(i % 16)){
+            printk("  ");
+        }
+        printk("%02x ",arry[i]);
+    }
+    printk(KERN_ERR "\n");
+    
+}
+
 /**
  * nand_read_subpage - [REPLACABLE] software ecc based sub-page read function
  * @mtd:	mtd info structure
@@ -1166,6 +1209,8 @@
 	int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1;
 	int index = 0;
 
+	int k;
+
 	/* Column address wihin the page aligned to ECC size (256bytes). */
 	start_step = data_offs / chip->ecc.size;
 	end_step = (data_offs + readlen - 1) / chip->ecc.size;
@@ -1183,6 +1228,14 @@
 	p = bufpoi + data_col_addr;
 	chip->read_buf(mtd, p, datafrag_len);
 
+/*
+	if (com_flag == 1)
+	{
+		printk ("lxy: in %s, coladdr= 0x%x, len= %d", __FUNCTION__, data_col_addr, datafrag_len);
+		show_data((void *)p, datafrag_len);
+	}
+*/
+
 	/* Calculate  ECC */
 	for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size)
 		chip->ecc.calculate(mtd, p, &chip->buffers->ecccalc[i]);
@@ -1469,6 +1522,15 @@
 	buf = ops->datbuf;
 	oob = ops->oobbuf;
 
+/*
+	if (from == 0x6c54000)
+	{
+		printk ("from= 0x%08Lx, readlen= 0x%x, ", (unsigned long long)from, readlen);
+		printk ("chip_shift= %d, page_shift= %d, col= 0x%x, page= 0x%x, realpage= 0x%x, pagemask= 0x%x !\n", chip->chip_shift, chip->page_shift, col, page, realpage, chip->pagemask);
+		com_flag = 1;
+	}
+*/
+
 	while (1) {
 		bytes = min(mtd->writesize - col, readlen);
 		aligned = (bytes == mtd->writesize);
@@ -1484,14 +1546,28 @@
 
 			/* Now read the page into the buffer */
 			if (unlikely(ops->mode == MTD_OOB_RAW))
+			{
 				ret = chip->ecc.read_page_raw(mtd, chip,
 							      bufpoi, page);
+//				if (com_flag == 1)
+//					printk ("lxy: read_page_raw    ------->");
+			}
 			else if (!aligned && NAND_SUBPAGE_READ(chip) && !oob)
+			{
 				ret = chip->ecc.read_subpage(mtd, chip,
 							col, bytes, bufpoi);
+//				if (com_flag == 1)
+//					printk ("lxy: read_subpage------->");
+			}
 			else
+			{
+//				if (com_flag == 1)
+//					printk ("lxy: read_page ************************>\n");
 				ret = chip->ecc.read_page(mtd, chip, bufpoi,
 							  page);
+//				if (com_flag == 1)
+//					printk ("lxy: read_page++++++++++++++>");
+			}
 			if (ret < 0)
 				break;
 
@@ -1530,6 +1606,8 @@
 					nand_wait_ready(mtd);
 			}
 		} else {
+//			if (com_flag == 1)
+//				printk ("lxy: %s, memcpy !\n", __FUNCTION__);
 			memcpy(buf, chip->buffers->databuf + col, bytes);
 			buf += bytes;
 		}
@@ -1564,12 +1642,33 @@
 		ops->oobretlen = ops->ooblen - oobreadlen;
 
 	if (ret)
+	{
+		printk ("lxy: page= 0x%x, col= 0x%x, from=0x%08Lx!\n", page, col, (unsigned long long)from);
+		printk ("lxy: ret = %d !\n", ret);
+		com_flag = 0;
 		return ret;
+	}
 
 	if (mtd->ecc_stats.failed - stats.failed)
+	{
+		printk ("lxy: page= 0x%x, col= 0x%x, from=0x%08Lx!\n", page, col, (unsigned long long)from);
+		printk ("lxy: %s, return -EBADMSG !\n", __FUNCTION__);
+		com_flag = 0;
 		return -EBADMSG;
+	}
+	
+	if ((mtd->ecc_stats.corrected - stats.corrected))
+	{
+		printk ("lxy: page= 0x%x, col= 0x%x, from=0x%08Lx!\n", page, col, (unsigned long long)from);
+		printk ("lxy: %s, retern -EUCLEAN !\n", __FUNCTION__);
+		com_flag = 0;
+		return -EUCLEAN;
+	}
+	else
+		com_flag = 0;
+		return 0;
 
-	return  mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
+//	return  mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
 }
 
 /**
@@ -2085,12 +2184,21 @@
 		status = chip->waitfunc(mtd, chip);
 	}
 
+
 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
 	/* Send command to read back the data */
 	chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
 
 	if (chip->verify_buf(mtd, buf, mtd->writesize))
+	{
+		printk ("virify main-area error.......                ,page= 0x%x !\n", page);
 		return -EIO;
+	}
+	if (chip->verify_buf(mtd, chip->oob_poi, mtd->oobsize))
+	{
+		printk ("virify oob-area error.......                 ,page= 0x%x !\n", page);
+		return -EIO;
+	}
 #endif
 	return 0;
 }
@@ -2180,10 +2288,12 @@
 	if (!writelen)
 		return 0;
 
+	uint32_t tem_len = chip->subpagesize - 1;
+
 	/* reject writes, which are not page aligned */
 	if (NOTALIGNED(to) || NOTALIGNED(ops->len)) {
 		printk(KERN_NOTICE "%s: Attempt to write not "
-				"page aligned data\n", __func__);
+				"page aligned data at 0x%08x\n", __func__, (unsigned long long)to);
 		return -EINVAL;
 	}
 
@@ -2925,6 +3035,17 @@
 	/* Send the command for reading device ID */
 	chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
 
+//	printk ("\nread_id =  ");
+	for (i = 0; i < 8; i++)		//lxy
+	{
+		id_data[i] = chip->read_byte(mtd);
+//		printk ("%02x,  ", id_data[i]);
+	}
+//	printk ("\n");
+	*maf_id = id_data[0];
+	*dev_id = id_data[1];
+
+#if 0
 	/* Read manufacturer and device IDs */
 	*maf_id = chip->read_byte(mtd);
 	*dev_id = chip->read_byte(mtd);
@@ -2935,7 +3056,7 @@
 	 * not match, ignore the device completely.
 	 */
 
-	chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
+	chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);	//lxy
 
 	for (i = 0; i < 2; i++)
 		id_data[i] = chip->read_byte(mtd);
@@ -2946,6 +3067,7 @@
 		       *maf_id, *dev_id, id_data[0], id_data[1]);
 		return ERR_PTR(-ENODEV);
 	}
+#endif
 
 	if (!type)
 		type = nand_flash_ids;
@@ -2955,6 +3077,7 @@
 			break;
 
 	chip->onfi_version = 0;
+#if 0	//lxy
 	if (!type->name || !type->pagesize) {
 		/* Check is chip is ONFI compliant */
 		ret = nand_flash_detect_onfi(mtd, chip, busw);
@@ -2962,12 +3085,14 @@
 			goto ident_done;
 	}
 
+
 	chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
 
 	/* Read entire ID string */
 
 	for (i = 0; i < 8; i++)
 		id_data[i] = chip->read_byte(mtd);
+#endif
 
 	if (!type->name)
 		return ERR_PTR(-ENODEV);
@@ -3162,6 +3287,9 @@
 		nand_manuf_ids[maf_idx].name,
 		chip->onfi_version ? chip->onfi_params.model : type->name);
 
+	
+	printk ("lxy: erasesize= 0x%x, wirtesize= 0x%x, oobsize= 0x%x !\n", mtd->erasesize, mtd->writesize, mtd->oobsize);
+
 	return type;
 }
 
@@ -3518,7 +3646,6 @@
 				__func__);
 		BUG();
 	}
-
 	ret = nand_scan_ident(mtd, maxchips, NULL);
 	if (!ret)
 		ret = nand_scan_tail(mtd);
diff -uNra linux-3.0.82/drivers/net/can/sja1000/Kconfig linux-3.0.82x/drivers/net/can/sja1000/Kconfig
--- linux-3.0.82/drivers/net/can/sja1000/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/can/sja1000/Kconfig	2017-09-23 03:42:49.666676140 +0800
@@ -20,6 +20,26 @@
 	  boards from Phytec (http://www.phytec.de) like the PCM027,
 	  PCM038.
 
+config LS1X_CAN0
+	bool "Loongson1 CAN Controller 0"
+	depends on CAN_SJA1000_PLATFORM
+	depends on (LS1B_MACH || LS1A_MACH || LS1C_MACH)
+	default n
+	---help---
+	  This is the driver for the Loongson 1A/1B SOC CAN Controller 0.
+	  Be careful, some module's Pin multiplexing with the CAN Controller 0,
+	  as I2C UART or SPI.
+	  
+config LS1X_CAN1
+	bool "Loongson1 CAN Controller 1"
+	depends on CAN_SJA1000_PLATFORM
+	depends on (LS1B_MACH || LS1A_MACH || LS1C_MACH)
+	default n
+	---help---
+	  This is the driver for the Loongson 1A/1B SOC CAN Controller 1.
+	  Be careful, some module's Pin multiplexing with the CAN Controller 1,
+	  as I2C UART or SPI.
+
 config CAN_SJA1000_OF_PLATFORM
 	tristate "Generic OF Platform Bus based SJA1000 driver"
 	depends on PPC_OF
diff -uNra linux-3.0.82/drivers/net/can/sja1000/sja1000.c linux-3.0.82x/drivers/net/can/sja1000/sja1000.c
--- linux-3.0.82/drivers/net/can/sja1000/sja1000.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/can/sja1000/sja1000.c	2017-09-23 03:42:49.666676140 +0800
@@ -153,7 +153,11 @@
 		}
 
 		/* set chip to normal mode */
+	#if defined(CONFIG_LS1X_CAN0) || defined(CONFIG_LS1X_CAN1)
+		priv->write_reg(priv, REG_MOD, MOD_STM);	/* LS1A/1B CAN operating mode */
+	#else
 		priv->write_reg(priv, REG_MOD, 0x00);
+	#endif
 		udelay(10);
 		status = priv->read_reg(priv, REG_MOD);
 	}
@@ -244,7 +248,11 @@
 	struct sja1000_priv *priv = netdev_priv(dev);
 
 	/* set clock divider and output control register */
+#if defined(CONFIG_LS1X_CAN0) || defined(CONFIG_LS1X_CAN1)
+	sja1000_write_cmdreg(priv, 0x80);
+#else
 	priv->write_reg(priv, REG_CDR, priv->cdr | CDR_PELICAN);
+#endif
 
 	/* set acceptance filter (accept all) */
 	priv->write_reg(priv, REG_ACCC0, 0x00);
diff -uNra linux-3.0.82/drivers/net/Kconfig linux-3.0.82x/drivers/net/Kconfig
--- linux-3.0.82/drivers/net/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/Kconfig	2017-09-23 03:42:49.670676127 +0800
@@ -234,6 +234,7 @@
 	  will be called macb.
 
 source "drivers/net/arm/Kconfig"
+source "drivers/net/loongson/Kconfig"
 
 config AX88796
 	tristate "ASIX AX88796 NE2000 clone support"
@@ -2050,6 +2051,31 @@
 	  If you say N, all options in this submenu will be skipped and disabled.
 
 if NETDEV_1000
+config LS1X_GMAC0
+	bool "Loongson1 GMAC0 support"
+	default y
+	depends on LS1A_MACH || LS1B_MACH || LS1C_MACH
+
+choice
+		prompt "ls1x gmac0 config"
+		depends on LS1X_GMAC0
+
+config LS1X_GMAC0_100M
+		bool "100Mb MII mode"
+
+config LS1X_GMAC0_1000M
+		bool "1000Mb MII mode"
+
+config LS1X_GMAC0_RMII
+		bool "100Mb RMII mode"
+		depends on LS1C_MACH
+endchoice
+
+
+config FIX_COHERENT_UNALIGNED
+	bool "fix coherent unaligned"
+	depends on GMAC_COHERENT
+	default n
 
 config ACENIC
 	tristate "Alteon AceNIC/3Com 3C985/NetGear GA620 Gigabit support"
@@ -3452,3 +3478,4 @@
 	  module will be called vmxnet3.
 
 endif # NETDEVICES
+
diff -uNra linux-3.0.82/drivers/net/loongson/gmac/LICENSE.txt linux-3.0.82x/drivers/net/loongson/gmac/LICENSE.txt
--- linux-3.0.82/drivers/net/loongson/gmac/LICENSE.txt	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/loongson/gmac/LICENSE.txt	2017-09-23 03:42:49.670676127 +0800
@@ -0,0 +1,14 @@
+Linux Driver for 3504 DWC Ether MAC 10/100/1000 Universal
+Linux Driver for 3507 DWC Ether MAC 10/100 Universal
+
+IMPORTANT: Synopsys Ethernet MAC Linux Software Drivers and documentation (hereinafter, "Software") are unsupported proprietary works of Synopsys, Inc. unless otherwise expressly agreed to in writing between Synopsys and you.
+
+The Software uses certain Linux kernel functionality and may therefore be subject to the GNU Public License which is available at:
+http://www.gnu.org/licenses/gpl.html
+
+The Software IS NOT an item of Licensed Software or Licensed Product under any End User Software License Agreement or Agreement for Licensed Product with Synopsys or any supplement thereto. Synopsys permits you to use and redistribute this Software in source and binary forms, with or without modification, provided that redistributions of source code must retain this notice.  Synopsys does not permit you to view, use, disclose, copy or distribute this file or any information contained herein except pursuant to this license grant from Synopsys, or to the extent it applies, the GNU Public License.  If you do not agree with this notice, including the disclaimer below, then you are not authorized by Synopsys to use the Software.
+
+THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+
+
diff -uNra linux-3.0.82/drivers/net/loongson/gmac/Makefile linux-3.0.82x/drivers/net/loongson/gmac/Makefile
--- linux-3.0.82/drivers/net/loongson/gmac/Makefile	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/loongson/gmac/Makefile	2017-09-23 03:42:49.670676127 +0800
@@ -0,0 +1,53 @@
+
+###################################################
+# Makefile for the Synopsys GMAC driver
+###################################################
+
+KERNELDIR ?= /lib/modules/$(shell uname -r)/build
+PWD := $(shell pwd)
+
+all:
+	gmake -C $(KERNELDIR) CONFIG_SYNOPGMACHOST_PCI=m  M=$(PWD)
+####################################################
+# Different CONFIG_XXXXXXXXXXXXXX
+# CONFIG_SYNOPGMACHOST_PCI    => for pci driver 
+####################################################
+clean:
+	rm -rf *.o
+	rm -rf *.ko
+	rm -rf *.mod.*
+	rm -rf .synop*
+	rm -rf .built*
+	rm -rf .tmp*
+	
+
+#obj-$(CONFIG_SYNOPGMACHOST_PCI) += synop_GMAC_ether.o
+obj-$(CONFIG_LOONGSON_GMAC) += synop_GMAC_ether.o
+synop_GMAC_ether-objs =   synopGMAC_plat.o synopGMAC_network_interface.o synopGMAC_Dev.o synopGMAC_platform_interface.o $(synop_GMAC_ether-objs-y)
+synop_GMAC_ether-objs-$(CONFIG_PCI) += synopGMAC_pci_bus_interface.o synopGMAC_Host.o
+####################################################
+# Explanation for EXTRA_FLAGS
+# -DDEBUG		     => Enable the debug trace for driver
+# -DIPC_OFFLOAD		     => Enables the IP and TCP checksum offloading feature in HW (IPV4 only)
+# -DENH_DESC		     => Enables Enhanced Descriptors 
+# -DENH_DESC_8W              => Enable Enhanced Descriptors of 8words or else Descriptor will be of 4words.
+####################################################
+
+
+#with the below flags enables Debug messages
+
+#EXTRA_CFLAGS += -DDEBUG 
+#EXTRA_CFLAGS +=-DDEBUG -DIPC_OFFLOAD
+#EXTRA_CFLAGS += -DDEBUG -DIPC_OFFLOAD 
+#EXTRA_CFLAGS += -DIPC_OFFLOAD 
+
+
+#Enhanced Descriptor
+#EXTRA_CFLAGS += -DENH_DESC 
+#EXTRA_CFLAGS += -DENH_DESC -DIPC_OFFLOAD 
+#EXTRA_CFLAGS += -DENH_DESC -DENH_DESC_8W
+#EXTRA_CFLAGS += -DDEBUG -DENH_DESC -DENH_DESC_8W
+#EXTRA_CFLAGS += -DDEBUG -DENH_DESC -DENH_DESC_8W -DIPC_OFFLOAD
+#EXTRA_CFLAGS += -DENH_DESC -DENH_DESC_8W -DIPC_OFFLOAD
+
+#EXTRA_CFLAGS  += -DDEBUG
diff -uNra linux-3.0.82/drivers/net/loongson/gmac/.Makefile.swp linux-3.0.82x/drivers/net/loongson/gmac/.Makefile.swp
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/drivers/net/loongson/gmac/README linux-3.0.82x/drivers/net/loongson/gmac/README
--- linux-3.0.82/drivers/net/loongson/gmac/README	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/loongson/gmac/README	2017-09-23 03:42:49.670676127 +0800
@@ -0,0 +1,28 @@
+*************************************README***************************************
+
+
+**********************************************************************************
+
+This is a README file for the sample device driver software for Synopsys Universal 
+GMAC IP. The files listed below are available in this directory.
+
+./README (this file)
+./synopGMAC_banner.h
+./synopGMAC_plat.c
+./synopGMAC_plat.h
+./synopGMAC_Dev.c
+./synopGMAC_Dev.h
+./synopGMAC_network_interface.c
+./synopGMAC_network_interface.h
+./synopGMAC_pci_bus_interface.c
+./synopGMAC_pci_bus_interface.h
+./synopGMAC_Host.c
+./synopGMAC_Host.h
+./Makefile
+./synopGMAC_Debug.c
+./synopGMAC_driver_ug.pdf
+
+The User Guide (synopGMAC_driver_ug.pdf) provides details about driver architecture, flow 
+diagrams and driver APIs. Please refer to compilation subsection of chapter 1 to compile
+the driver and the debug utility. The same section explains how to use the kernel module 
+in Linux platform.
diff -uNra linux-3.0.82/drivers/net/loongson/gmac/synopGMAC_banner.h linux-3.0.82x/drivers/net/loongson/gmac/synopGMAC_banner.h
--- linux-3.0.82/drivers/net/loongson/gmac/synopGMAC_banner.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/loongson/gmac/synopGMAC_banner.h	2017-09-23 03:42:49.670676127 +0800
@@ -0,0 +1,7 @@
+#ifndef SYNOP_GMAC_BANNER_H
+#define SYNOP_GMAC_BANNER_H
+#include "synopGMAC_plat.h"
+const static u8 synopGMAC_driver_string[]  = "This is Synopsys GMAC-UNIV PCI-Network Driver for RTL (3.50a)";
+const static u8 synopGMAC_driver_version[] = "1.2";
+const static u8 synopGMAC_copyright[]      = "Copyright (c) 2007-2009 Synopsys, Inc";
+#endif
diff -uNra linux-3.0.82/drivers/net/loongson/gmac/synopGMAC_Debug.c linux-3.0.82x/drivers/net/loongson/gmac/synopGMAC_Debug.c
--- linux-3.0.82/drivers/net/loongson/gmac/synopGMAC_Debug.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/loongson/gmac/synopGMAC_Debug.c	2017-09-23 03:42:49.670676127 +0800
@@ -0,0 +1,685 @@
+/*
+ * This is userland program. This opens the network interface and attaches a data gram socket.
+ * The communication to the hardware is accomplished through the Ioctl's sent through the 
+ * datagram socket.
+ */
+
+#include <stdio.h>
+#define ENH_DESC_8W  //comment this if intended to use normal descriptor or 4 words
+#include <sys/types.h>
+#include <sys/socket.h>
+#include <linux/sockios.h>
+#include <string.h>
+#include <linux/netdevice.h>
+
+#define IOCTL_READ_REGISTER  SIOCDEVPRIVATE+1
+#define IOCTL_WRITE_REGISTER SIOCDEVPRIVATE+2
+#define IOCTL_READ_IPSTRUCT  SIOCDEVPRIVATE+3
+#define IOCTL_READ_RXDESC    SIOCDEVPRIVATE+4
+#define IOCTL_READ_TXDESC    SIOCDEVPRIVATE+5
+#define IOCTL_POWER_DOWN     SIOCDEVPRIVATE+6
+
+typedef unsigned long  u32;
+typedef unsigned short u16;
+typedef unsigned char  u8;
+typedef signed long  s32;
+typedef signed short s16;
+typedef signed char  s8;
+typedef int bool;
+typedef unsigned long dma_addr_t;
+
+struct ifr_data_struct
+{
+  u32 unit;
+  u32 addr;
+  u32 data;
+};
+
+struct reg
+{
+  u32    addr;
+  char   * name;
+};
+
+enum WcsCmd
+{
+	wcs_write = 1,
+	wcs_set,
+	wcs_clr
+};
+
+/*
+DMA Descriptor Structure
+The structure is common for both receive and transmit descriptors
+*/
+#ifdef ENH_DESC_8W
+typedef struct DmaDescStruct    
+{                               
+  u32   status;         /* Status 									*/
+  u32   length;         /* Buffer 1  and Buffer 2 length 						*/
+  u32   buffer1;        /* Network Buffer 1 pointer (Dma-able) 							*/
+  u32   buffer2;        /* Network Buffer 2 pointer or next descriptor pointer (Dma-able)in chain structure 	*/
+  			/* This data below is used only by driver					*/
+  u32   extstatus;      /* Extended status of a Rx Descriptor                                           */
+  u32   reserved1;      /* Reserved word                                                                */
+  u32   timestamplow;   /* Lower 32 bits of the 64 bit timestamp value                                  */
+  u32   timestamphigh;  /* Higher 32 bits of the 64 bit timestamp value                                  */
+  u32   data1;          /* This holds virtual address of buffer1, not used by DMA  			*/
+  u32   data2;          /* This holds virtual address of buffer2, not used by DMA  			*/
+} DmaDesc;
+
+#else
+typedef struct DmaDescStruct    
+{                               /* put it here to allow the caller to know its size */
+  u32   status;         /* Status */
+  u32   length;         /* Buffer length */
+  u32   buffer1;        /* Buffer 1 pointer */
+  u32   buffer2;        /* Buffer 2 pointer or next descriptor pointer in chain structure */
+
+  u32   data1;          /* driver data, are not used by DMA engine,                       */
+  u32   data2;          /* set DmaDescriptorSkip2 in DmaBusModeInit to skip these words */
+
+} DmaDesc;
+#endif
+
+/* synopGMACdevice data */
+
+typedef struct synopGMACDeviceStruct      
+{
+  u32 MacBase;          /* base address of MAC registers       */
+  u32 DmaBase;          /* base address of DMA registers       */
+  u32 PhyBase;          /* PHY device address on MII interface */
+  u32 Version;		/* Gmac Revision version	       */		
+	
+
+  dma_addr_t TxDescDma;
+  dma_addr_t RxDescDma;  
+  DmaDesc *TxDesc;      /* start of TX descriptors ring/chain  */
+  DmaDesc *RxDesc;      /* start of RX descriptors ring/chain  */  
+ 
+  u32 BusyTxDesc;		 /* Number of Tx Descriptors owned by DMA at any given time*/  
+  u32 BusyRxDesc;		 /* Number of Rx Descriptors owned by DMA at any given time*/  
+  
+  u32  RxDescCount;     /* number of rx descriptors */
+  u32  TxDescCount;     /* number of tx descriptors */
+  
+  u32  TxBusy;          /* first descriptor owned by DMA engine, moved by DmaTxGet */
+  u32  TxNext;          /* next available tx descriptor, moved by DmaTxSet */
+  u32  RxBusy;          /* first descripror owned by DMA engine, moved by DmaRxGet */
+  u32  RxNext;          /* next available rx descriptor, moved by DmaRxSet */
+
+  DmaDesc * TxBusyDesc;    /* first descriptor owned by DMA engine, moved by DmaTxGet */
+  DmaDesc * TxNextDesc;    /* next available tx descriptor, moved by DmaTxSet */
+  DmaDesc * RxBusyDesc;    /* first descripror owned by DMA engine, moved by DmaRxGet */
+  DmaDesc * RxNextDesc;    /* next available rx descriptor, moved by DmaRxSet */
+
+  /*Phy related stuff*/
+  u32 ClockDivMdc;
+  /* The status of the link */
+  u32 LinkState;
+  u32 DuplexMode;
+  u32 Speed;
+  u32 LoopBackMode; 
+  
+} synopGMACdevice;
+
+
+
+static struct reg mac[] =
+{
+  { 0x0000, "          Config" },
+  { 0x0004, "    Frame Filter" },
+  { 0x0008, "     MAC HT High" },
+  { 0x000C, "      MAC HT Low" },
+  { 0x0010, "       GMII Addr" },
+  { 0x0014, "       GMII Data" },
+  { 0x0018, "    Flow Control" },
+  { 0x001C, "        VLAN Tag" },
+  { 0x0020, "    GMAC Version" },
+  { 0x0024, "    GMAC Debug  " },
+  { 0x0040, "  MAC Addr0 High" },
+  { 0x0044, "   MAC Addr0 Low" },
+  { 0x0048, "  MAC Addr1 High" },
+  { 0x004c, "   MAC Addr1 Low" },
+  { 0x0100, "   MMC Ctrl Reg " },
+  { 0x010c, "MMC Intr Reg(rx)" },
+  { 0x0110, "MMC Intr Reg(tx)" },
+  { 0x0200, "MMC Intr Reg(rx ipc)" },
+  { 0, 0 }
+};
+static struct reg ts[] =
+{
+  { 0x0700, "     TS Ctrl Reg" },
+  { 0x0704, "Sub Sec Incr Reg" },
+  { 0x0708, "     TS High Reg" },
+  { 0x070C, "     TS Low  Reg" },
+  { 0x0710, "TS High Updt Reg" },
+  { 0x0714, "TS Low  Updt Reg" },
+  { 0x0718, "   TS Addend Reg" },
+  { 0x071C, "Tgt Time (H) Reg" },
+  { 0x0720, "Tgt Time (L) Reg" },
+  { 0x0724, "TS High Word Reg" },
+  { 0x0728, "   TS Status Reg" },
+  { 0x072C, " TS PPS Ctrl Reg" },
+  { 0, 0 }
+};
+
+static struct reg dma[] =
+{
+  { 0x0000, "CSR0   Bus Mode" },
+  { 0x0004, "CSR1   TxPlDmnd" },
+  { 0x0008, "CSR2   RxPlDmnd" },
+  { 0x000C, "CSR3    Rx Base" },
+  { 0x0010, "CSR4    Tx Base" },
+  { 0x0014, "CSR5     Status" },
+  { 0x0018, "CSR6    Control" },
+  { 0x001C, "CSR7 Int Enable" },
+  { 0x0020, "CSR8 Missed Fr." },
+  { 0x0048, "CSR18 Tx Desc  " },
+  { 0x004C, "CSR19 Rx Desc  " },
+  { 0x0050, "CSR20 Tx Buffer" },
+  { 0x0054, "CSR21 Rx Buffer" },
+  { 0x0058, "CSR22 HWCFG    " },
+  { 0, 0 }
+};
+
+static struct reg mii[] =
+{
+  { 0x0000, "Phy Control Reg" },
+  { 0x0001, "Phy Status  Reg" },
+  { 0x0002, "Phy Id (02)    " },
+  { 0x0003, "Phy Id (03)    " },
+  { 0x0004, "Auto-nego   Adv" },
+  { 0x0005, "Auto-nego   Lpa" },
+  { 0x0006, "Auto-nego   Exp" },
+  { 0x0007, "Auto-nego    Np" },
+  { 0x0009, "1000 Ctl    Reg" },
+  { 0x000a, "1000 Sts    Reg" },
+  { 0x0010, "PHY  Ctl    Reg" },
+  { 0x0011, "PHY  Sts    Reg" },
+  { 0, 0 }
+};
+
+static struct reg mmc[] = 
+{
+
+  { 0x0114, "No. Of Bytes  Transmitted (Good/Bad)                            " },
+  { 0x0164, "No. Of Bytes  Transmitted (Good)                                " },
+  { 0x0118, "No. Of Frames Trsnsmitted (Good/Bad)                            " },
+  { 0x0168, "No. Of Frames Trsnsmitted (Good)                                " },
+  
+  { 0x013C, "No. Of Unicast Frames Transmitted (Good/Bad)                    " },
+  { 0x011C, "No. Of Broadcast Frames Transmitted (Good)                      " },
+  { 0x0140, "No. Of Broadcast Frames Transmitted (Good/Bad)                  " },
+  { 0x0120, "No. Of Multicast Frames Transmitted (Good)                      " },
+  { 0x0144, "No. Of Multicast Frames Transmitted (Good/Bad)                  " },
+  
+  { 0x0124, "No. Of Tx frames with Length 64 bytes (Good/Bad)                " },
+  { 0x0128, "No. Of Tx frames with Length <064,128> bytes (Good/Bad)         " },
+  { 0x012C, "No. Of Tx frames with Length <128,256> bytes (Good/Bad)         " },
+  { 0x0130, "No. Of Tx frames with Length <256,512> bytes (Good/Bad)         " },
+  { 0x0134, "No. Of Tx frames with Length <512,1024> bytes (Good/Bad)        " },
+  { 0x0138, "No. Of Tx frames with Length <1024,MaxSize> bytes (Good/Bad)    " },
+  
+  { 0x0148, "No. Of Tx aborted due to Underflow error                        " },
+  { 0x0158, "No. Of Tx aborted due to Late Collision                         " },
+  { 0x015C, "No. Of Tx aborted due to Excessive Collision                    " },
+  { 0x0160, "No. Of Tx aborted due to Carrier Sense error                    " },
+  { 0x016C, "No. Of Tx aborted due to Excessive Defferal error               " },
+  
+  { 0x014C, "No. Of Tx frames after single collision in Half Duplex mode     " },
+  { 0x0150, "No. Of Tx frames after multiple collision in Half Duplex mode   " },
+  { 0x0154, "No. Of Tx frames after a deferral                               " },
+
+  { 0x0170, "No. Of Pause frames Transmitted   (Good)                        " },
+  { 0x0174, "No. Of VLAM tagged frames Transmitted  (Good)                   " },
+
+ 
+
+  { 0x0184, "No. Of Bytes  Received    (Good/Bad)                            " },
+  { 0x0188, "No. Of Bytes  Received    (Good)                                " },
+  { 0x0180, "No. Of Frames Received    (Good/Bad)                            " },
+  
+  { 0x01C4, "No. Of Unicast Frames Received (Good)                           " },
+  { 0x018C, "No. Of Broadcast Frames Transmitted (Good)                      " },
+  { 0x0190, "No. Of Multicast Frames Transmitted (Good)                      " },
+
+  { 0x01AC, "No. Of Rx frames with Length 64 bytes (Good/Bad)                " },
+  { 0x01B0, "No. Of Rx frames with Length <064,128> bytes (Good/Bad)         " },
+  { 0x01B4, "No. Of Rx frames with Length <128,256> bytes (Good/Bad)         " },
+  { 0x01B8, "No. Of Rx frames with Length <256,512> bytes (Good/Bad)         " },
+  { 0x01BC, "No. Of Rx frames with Length <512,1024> bytes (Good/Bad)        " },
+  { 0x01C0, "No. Of Rx frames with Length <1024,MaxSize> bytes (Good/Bad)    " },
+
+  { 0x01A4, "No. Of Runt Rx frames with frames (<64)                         " },
+  { 0x01A8, "No. Of Jabber Rx frames with frames (>1518)                     " },
+  { 0x0194, "No. Of Rx frames with CRC error                                 " },
+  { 0x0198, "No. Of Rx frames with dribble error (only in 10/100)            " },
+  { 0x019C, "No. Of Rx frames with runt error (<64 and CRC error)            " },
+  { 0x01A0, "No. Of Rx frames with jabber error (>1518 and CRC)              " },
+  { 0x01D4, "No. Of Rx frames missed due to FIFO overflow                    " },
+  { 0x01DC, "No. Of Rx frames received with watchdog timeout error           " },
+  { 0x01C8, "No. Of Rx frames with Length != Frame Size                      " },
+  { 0x01CC, "No. Of Rx frames with Length != Valid Frame Size                " },
+
+  { 0x0170, "No. Of Pause frames Received (Good)                             " },
+  { 0x0174, "No. Of VLAM tagged frames Received (Good)                       " },
+
+
+
+  { 0x0210, "No. Of IPV4 Packets  Received (Good)                            " },
+  { 0x021C, "No. Of IPV4 Packets with fragmentation Received                 " },
+  { 0x0220, "No. Of IPV4 Packets with UDP checksum disabled                  " },
+
+  { 0x0214, "No. Of IPV4 Packets with Header Error Received                  " },
+  { 0x0218, "No. Of IPV4 Packets with No Payload Error Received              " },
+
+  { 0x0224, "No. Of IPV6 Packets  Received (Good)                            " },
+
+  { 0x0228, "No. Of IPV4 Packets with Header Error Received                  " },
+  { 0x022C, "No. Of IPV6 Packets with No Payload Error Received              " },
+
+  { 0x0240, "No. Of ICMP Frames Received (Good)                              " },
+  { 0x0244, "No. Of ICMP Frames Received with Error                          " },
+
+  { 0x0230, "No. Of UDP Frames Received (Good)                               " },
+  { 0x0234, "No. Of UDP Frames Received with Error                           " },
+
+  { 0x0238, "No. Of TCP Frames Received (Good)                               " },
+  { 0x023C, "No. Of TCP Frames Received with Error                           " },
+
+  { 0, 0 }
+};
+
+
+static char copyright[] =
+    "\n"
+    " ********************************************\n"
+    " *  synopGMAC debug Utility for Linux       *\n"
+    " *  Copyright(c) 2007-2007 Synopsys, Inc    *\n"
+    " ********************************************\n\n"
+    ;
+
+
+static char usage[] =
+    "  Usage:\n"
+    "    synopGMAC_Debug  <interface> <command> {<parameters>}\n"
+    "\n"
+    "  Commands:\n"
+    "    dump          <unit>  - dump registers,     unit ::= {mac|ts|dma|mii|mmc}\n"
+    "    read          <unit> <reg>                  unit ::= {mac|ts|dma|mii}\n"
+    "    write/set/clr <unit> <reg> <value>          unit ::= {mac|ts|dma|mii}\n"
+    "                 - write/set/clr bits\n"
+    "    status       - print driver's internal data and dump DMA descriptors\n"
+    "    powerdown  <on/off>\n"
+    "\n"
+    ;
+
+
+static int powerdown(char *ifname, int argc, char *argv[] )
+{
+
+  int socket_desc;
+  int retval = 0;
+  struct ifreq ifr;  //defined in if.h
+
+  struct ifr_data_struct data;
+  struct reg *regs;
+
+  if(argc != 1) return 1;
+  
+  if     ( strcmp( argv[0], "on"  ) == 0 ) { data.unit = 1;}
+  else if( strcmp( argv[0], "off" ) == 0 ) { data.unit = 2;}
+  else return 1;
+
+  socket_desc = socket( PF_INET, SOCK_DGRAM, 0 );
+  if( socket_desc < 0 )
+  {
+  	perror("Socket error");
+	return -1;
+  }
+
+  strcpy( ifr.ifr_name, ifname );
+
+  ifr.ifr_data = (void *) &data;
+
+  retval = ioctl( socket_desc, IOCTL_POWER_DOWN, &ifr );
+  if( retval < 0 )
+   {
+      printf("IOCTL Error");
+      goto close_socket;
+   }
+
+  printf("The GMAC is Successfully powered %s\n", (( data.unit == 1 ) ? "Down":"Up" ) );
+  
+ close_socket:  close(socket_desc);
+  return retval;
+}
+
+static int dump( char *ifname, int argc, char *argv[] )
+{
+  int socket_desc;
+  int retval = 0;
+  struct ifreq ifr;  //defined in if.h
+
+  struct ifr_data_struct data;
+  struct reg *regs;
+  
+  if(argc!=1) return 1;
+  if     ( strcmp( argv[0], "mac" ) == 0 ) { data.unit = 0; regs = mac; }
+  else if( strcmp( argv[0], "ts" ) == 0 ) { data.unit = 0; regs = ts; }
+  else if( strcmp( argv[0], "dma" ) == 0 ) { data.unit = 1; regs = dma; }
+  else if( strcmp( argv[0], "mii" ) == 0 ) { data.unit = 2; regs = mii; }
+  else if( strcmp( argv[0], "mmc" ) == 0 ) { data.unit = 0; regs = mmc; }
+  else return 1;
+
+  printf("%s Dump %s Registers: \n", ifname, argv[0]);
+
+  socket_desc = socket( PF_INET, SOCK_DGRAM, 0 );
+  if( socket_desc < 0 )
+  {
+  	perror("Socket error");
+	return -1;
+  }
+
+  strcpy( ifr.ifr_name, ifname );
+
+  ifr.ifr_data = (void *) &data;
+
+  while( regs->name != 0 )
+  {
+    data.addr = regs->addr;
+    retval = ioctl( socket_desc, IOCTL_READ_REGISTER, &ifr );
+  
+    if( retval < 0 )
+    {
+      printf("IOCTL Error");
+      break;
+    }
+    printf( "%s (0x%04x) = 0x%08x\n", regs->name, regs->addr, data.data );
+
+    regs++;
+  }
+  close(socket_desc);
+  return retval;
+}
+
+static int read(char *ifname, int argc, char *argv[])
+{
+  int socket_desc;
+  int retval = 0;
+  struct ifreq ifr;  //defined in if.h
+
+  struct ifr_data_struct data;
+  struct reg *regs;
+
+  if(argc != 2) return 1;
+  if     ( strcmp( argv[0], "mac" ) == 0 ) { data.unit = 0; regs = mac; }
+  else if( strcmp( argv[0], "ts" ) == 0 ) { data.unit = 0; regs = ts; }
+  else if( strcmp( argv[0], "dma" ) == 0 ) { data.unit = 1; regs = dma; }
+  else if( strcmp( argv[0], "mii" ) == 0 ) { data.unit = 2; regs = mii; }
+  else return 1;
+  
+  strcpy( ifr.ifr_name, ifname );
+
+  ifr.ifr_data = (void *) &data;
+
+ 
+   data.addr = strtol(argv[1],NULL,16); 		//convert the register address argument from string to long
+   if(((data.unit == 0) && (data.addr > 0x000002FC)) || ((data.addr & 0x00000003) != 0))
+	return 1;
+   if(((data.unit == 1) && (data.addr > 0x00000058)) || ((data.addr & 0x00000003) != 0))
+	return 1;
+   if((data.unit == 2) && (data.addr > 0x0000001c))
+	return 1;
+
+  socket_desc = socket( PF_INET, SOCK_DGRAM, 0 );
+  if( socket_desc < 0 )
+  {
+  	perror("Socket error");
+	return -1;
+  }
+   retval = ioctl( socket_desc, IOCTL_READ_REGISTER, &ifr );
+  
+    if(retval < 0)
+    {
+	printf("IOCTL Error");
+ 	goto close_socket;		
+    }
+   printf( "[%s](0x%04x) = 0x%08x\n ",argv[0],data.addr, data.data);
+  
+close_socket:  close(socket_desc);
+	  return retval;
+}
+
+
+
+
+static int wcs(int cmd, char * ifname, char * cmdname, int argc,  char *argv[])
+{
+int socket_desc;
+int retval = 0;
+struct ifreq ifr; //defined in if.h
+
+struct ifr_data_struct data;
+struct reg *regs;
+u32 data_to_write;
+
+if (argc != 3) return -1;
+
+if     (strcmp (argv[0],"mac") == 0){
+	data.unit = 0;
+	regs = mac;
+}
+else if (strcmp (argv[0],"ts") == 0){
+	data.unit = 0;
+	regs = ts;
+}
+else if (strcmp (argv[0],"dma") == 0){
+	data.unit = 1;
+	regs = dma;
+}
+else if (strcmp (argv[0],"mii") == 0){
+	data.unit = 2;
+	regs = mii;
+}
+else return -1;
+
+sscanf(argv[1], "%x", &data.addr);
+while(regs->name != 0){
+	if(regs->addr == data.addr) break;
+	regs++;
+}
+if(regs->name == 0){
+	printf("Invalid %s Register   - 0x%02x\n",argv[0],data.addr);
+	return -1;
+}
+sscanf(argv[2],"%x", &data_to_write);
+printf("%s %s 0x%08x to %s Register 0x%02x\n",ifname,cmdname,data_to_write,argv[0],data.addr);
+
+socket_desc = socket( PF_INET, SOCK_DGRAM, 0 );
+if( socket_desc < 0 )
+{
+	perror("Socket error");
+	return -1;
+}
+
+strcpy( ifr.ifr_name, ifname );
+ifr.ifr_data = (void *) &data;
+
+if(cmd == wcs_set || cmd == wcs_clr){
+	retval = ioctl(socket_desc,IOCTL_READ_REGISTER, &ifr);
+	if(retval < 0){
+		perror("IOCTL Error");
+	}
+}
+
+if(retval == 0){
+	if(cmd == wcs_set  ) data.data |= data_to_write;
+	if(cmd == wcs_clr) data.data &= (~data_to_write);
+	if(cmd == wcs_write) data.data  = data_to_write;
+}
+
+retval = ioctl(socket_desc,IOCTL_WRITE_REGISTER, &ifr);
+if(retval < 0)
+	perror("IOCTL Error");
+
+close(socket_desc);
+return retval;
+
+
+}
+
+
+
+static int status(char * ifname, int argc, char *argv[])
+{
+  int socket_desc;
+  int retval = 0;
+  int count = 0;
+  struct ifreq ifr;  //defined in if.h
+  
+  DmaDesc    dmadesc;
+  synopGMACdevice  gmacdev;
+       
+  if(argc!=0) return 1;
+
+  printf("%s Dump Status: \n", ifname);
+
+  socket_desc = socket( PF_INET, SOCK_DGRAM, 0 );
+  if( socket_desc < 0 )
+  {
+  	perror("Socket error");
+	return -1;
+  }
+
+  strcpy( ifr.ifr_name, ifname );
+
+  ifr.ifr_data = (void *) &gmacdev;
+  
+  retval = ioctl( socket_desc, IOCTL_READ_IPSTRUCT, &ifr );
+
+  if( retval < 0 )
+  {
+  	printf("IOCTL Error");
+  } 
+
+  else
+  {
+    printf("GMAC ip Version                              = 0x%08x\n", gmacdev.Version );	
+    printf("GMAC   Register Base Address                 = 0x%08x\n", gmacdev.MacBase );
+    printf("DMA    Register Base Address                 = 0x%08x\n", gmacdev.DmaBase );
+    printf("PHY device Base Address(32 phys possible)    = 0x%08x\n", gmacdev.PhyBase );
+    printf("Start of Rx Desc Ring                        = %p\n", gmacdev.RxDesc );
+    printf("Start of Tx Desc Ring                        = %p\n", gmacdev.TxDesc );
+    
+    printf("Busy Rx Desc Count                           = %d\n", gmacdev.BusyRxDesc );
+    printf("Busy Tx Desc Count                           = %d\n", gmacdev.BusyTxDesc );
+
+    printf("Start of Rx Desc Ring(DMA)                   = %p\n", gmacdev.RxDescDma );
+    printf("Start of Tx Desc Ring(DMA)                   = %p\n", gmacdev.TxDescDma );
+    printf("Number of Rx Descriptors                     = %d\n", gmacdev.RxDescCount );
+    printf("Number of Tx Descriptors                     = %d\n", gmacdev.TxDescCount );
+    printf("First Rx Descriptor Owned by DMA Engine      = %d\n", gmacdev.RxBusy );
+    printf("Next Available Rx Descriptor                 = %d\n", gmacdev.RxNext );
+    printf("First Tx Descriptor Owned by DMA Engine      = %d\n", gmacdev.TxBusy );
+    printf("Next Available Tx Descriptor                 = %d\n", gmacdev.TxNext );
+    printf("MDC clock division number                    = 0x%08x\n", gmacdev.ClockDivMdc);	
+    printf("Link State information                       = 0x%08x\n", gmacdev.LinkState );
+    printf("Duplex Mode of the Interface                 = 0x%08x\n", gmacdev.DuplexMode );
+    printf("Speed of the Interface                       = 0x%08x\n", gmacdev.Speed );
+    printf("LoopBack status of the Interface             = 0x%08x\n", gmacdev.LoopBackMode);
+
+    printf("\n");
+#ifdef ENH_DESC
+  printf("RxD Idx:   Status      length      buffer1     buffer2     data1       data2     Ext_status  reserved       TSL         TSH    \n");
+    printf("---------------------------------------------------------------------------------------------------------------------------- \n");
+	    for(count = 0; count < gmacdev.RxDescCount; count++ ){
+		dmadesc.data1 = count;
+		ifr.ifr_data = (void *) &dmadesc;
+		retval = ioctl(socket_desc, IOCTL_READ_RXDESC,&ifr);
+		if(retval < 0)
+			break;
+		printf("RxD  %02x: 0x%08x  0x%08x  0x%08x  0x%08x  0x%08x  0x%08x  0x%08x  0x%08x  0x%08x  0x%08x\n",
+                       count,dmadesc.status, dmadesc.length,dmadesc.buffer1,dmadesc.buffer2,
+			dmadesc.data1,dmadesc.data2,dmadesc.extstatus,dmadesc.reserved1,dmadesc.timestamplow,dmadesc.timestamphigh);
+	    }
+	    if(retval < 0)
+		perror("IOCTL Error");
+	    
+            printf("\n");
+
+    printf("TxD Idx:   Status      length      buffer1     buffer2     data1       data2   reserved      reserved      TSL           TSH \n");
+    printf("---------------------------------------------------------------------------------------------------------------------------- \n");
+	    for(count = 0; count < gmacdev.TxDescCount; count++ ){
+		dmadesc.data1 = count;
+		ifr.ifr_data = (void *) &dmadesc;
+		retval = ioctl(socket_desc, IOCTL_READ_TXDESC,&ifr);
+		if(retval < 0)
+			break;
+		printf("TxD  %02x: 0x%08x  0x%08x  0x%08x  0x%08x  0x%08x  0x%08x   0x%08x  0x%08x  0x%08x  0x%08x\n",
+                       count,dmadesc.status, dmadesc.length,dmadesc.buffer1,dmadesc.buffer2,
+			dmadesc.data1,dmadesc.data2,dmadesc.extstatus,dmadesc.reserved1,dmadesc.timestamplow,dmadesc.timestamphigh);
+	    }
+	    if(retval < 0)
+		perror("IOCTL Error");
+#else
+  printf("RxD Idx:   Status      length      buffer1     buffer2     data1       data2 \n");
+    printf("---------------------------------------------------------------------------\n");
+	    for(count = 0; count < gmacdev.RxDescCount; count++ ){
+		dmadesc.data1 = count;
+		ifr.ifr_data = (void *) &dmadesc;
+		retval = ioctl(socket_desc, IOCTL_READ_RXDESC,&ifr);
+		if(retval < 0)
+			break;
+		printf("RxD  %02x: 0x%08x  0x%08x  0x%08x  0x%08x  0x%08x  0x%08x\n",
+                       count,dmadesc.status, dmadesc.length,dmadesc.buffer1,dmadesc.buffer2,
+			dmadesc.data1,dmadesc.data2);
+	    }
+	    if(retval < 0)
+		perror("IOCTL Error");
+	    
+            printf("\n");
+
+    printf("TxD Idx:   Status      length      buffer1     buffer2     data1       data2 \n");
+    printf("-----------------------------------------------------------------------------\n");
+	    for(count = 0; count < gmacdev.TxDescCount; count++ ){
+		dmadesc.data1 = count;
+		ifr.ifr_data = (void *) &dmadesc;
+		retval = ioctl(socket_desc, IOCTL_READ_TXDESC,&ifr);
+		if(retval < 0)
+			break;
+		printf("TxD  %02x: 0x%08x  0x%08x  0x%08x  0x%08x  0x%08x  0x%08x \n",
+                       count,dmadesc.status, dmadesc.length,dmadesc.buffer1,dmadesc.buffer2,
+			dmadesc.data1,dmadesc.data2);
+	    }
+	    if(retval < 0)
+		perror("IOCTL Error");
+#endif  
+  }
+   close(socket_desc);
+   return 0;
+
+}
+
+int main( int argc, char *argv[] )
+{
+  int retval = 1;
+  
+  printf(copyright);
+  
+  if( argc>=3 )
+  {
+//    if( strcmp( argv[2], "debug" ) == 0 )    retval = debug( argv[1], argc-3, argv+3 );
+    if( strcmp( argv[2], "dump" ) == 0 )     retval = dump( argv[1], argc-3, argv+3 );
+    if( strcmp( argv[2], "write" ) == 0 )    retval = wcs( wcs_write, argv[1], argv[2], argc-3, argv+3 );
+    if( strcmp( argv[2], "read" ) == 0 )    retval = read(  argv[1], argc-3, argv+3 );
+    if( strcmp( argv[2], "set" ) == 0 )      retval = wcs( wcs_set, argv[1], argv[2], argc-3, argv+3 );
+    if( strcmp( argv[2], "clr" ) == 0 )    retval = wcs( wcs_clr, argv[1], argv[2], argc-3, argv+3 );
+    if( strcmp( argv[2], "status" ) == 0 )   retval = status( argv[1], argc-3, argv+3 );
+    if( strcmp( argv[2], "powerdown") == 0)  retval = powerdown(argv[1],argc-3,argv+3);
+  }
+
+  if( retval==1 ) printf( usage );
+  return retval;
+}
diff -uNra linux-3.0.82/drivers/net/loongson/gmac/synopGMAC_Dev.c linux-3.0.82x/drivers/net/loongson/gmac/synopGMAC_Dev.c
--- linux-3.0.82/drivers/net/loongson/gmac/synopGMAC_Dev.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/loongson/gmac/synopGMAC_Dev.c	2017-09-23 03:42:49.674676115 +0800
@@ -0,0 +1,3435 @@
+/** \file
+ * This file defines the synopsys GMAC device dependent functions.
+ * Most of the operations on the GMAC device are available in this file.
+ * Functions for initiliasing and accessing MAC/DMA/PHY registers and the DMA descriptors
+ * are encapsulated in this file. The functions are platform/host/OS independent.
+ * These functions in turn use the low level device dependent (HAL) functions to 
+ * access the register space.
+ * \internal
+ * ------------------------REVISION HISTORY---------------------------------
+ * Synopsys                 01/Aug/2007                              Created
+ */
+#include "synopGMAC_Dev.h"
+#include "synopGMAC_Host.h"
+
+/**
+  * Function to set the MDC clock for mdio transactiona
+  *
+  * @param[in] pointer to device structure.
+  * @param[in] clk divider value.
+  * \return Reuturns 0 on success else return the error value.
+  */
+s32 synopGMAC_set_mdc_clk_div(synopGMACdevice *gmacdev,u32 clk_div_val)
+{
+	u32 orig_data;
+	orig_data = synopGMACReadReg((u32 *)gmacdev->MacBase,GmacGmiiAddr); //set the mdc clock to the user defined value
+	orig_data &= (~ GmiiCsrClkMask);	   
+	orig_data |= clk_div_val;
+	synopGMACWriteReg((u32 *)gmacdev->MacBase, GmacGmiiAddr ,orig_data);
+	return 0;
+}
+
+/**
+  * Returns the current MDC divider value programmed in the ip.
+  *
+  * @param[in] pointer to device structure.
+  * @param[in] clk divider value.
+  * \return Returns the MDC divider value read.
+  */
+u32 synopGMAC_get_mdc_clk_div(synopGMACdevice *gmacdev)
+{
+	u32 data;
+	data = synopGMACReadReg((u32 *)gmacdev->MacBase,GmacGmiiAddr);
+	data &= GmiiCsrClkMask;
+	return data;
+}
+
+
+
+/**
+  * Function to read the Phy register. The access to phy register
+  * is a slow process as the data is moved accross MDI/MDO interface
+  * @param[in] pointer to Register Base (It is the mac base in our case) .
+  * @param[in] PhyBase register is the index of one of supported 32 PHY devices.
+  * @param[in] Register offset is the index of one of the 32 phy register.
+  * @param[out] u16 data read from the respective phy register (only valid iff return value is 0).
+  * \return Returns 0 on success else return the error status.
+  */
+s32 synopGMAC_read_phy_reg(u32 *RegBase,u32 PhyBase, u32 RegOffset, u16 * data)
+{
+u32 addr;
+u32 loop_variable;
+addr = ((PhyBase << GmiiDevShift) & GmiiDevMask) | ((RegOffset << GmiiRegShift) & GmiiRegMask);
+addr = addr | GmiiBusy ; //Gmii busy bit
+synopGMACWriteReg(RegBase,GmacGmiiAddr,addr); //write the address from where the data to be read in GmiiGmiiAddr register of synopGMAC ip
+
+        for(loop_variable = 0; loop_variable < DEFAULT_LOOP_VARIABLE; loop_variable++){ //Wait till the busy bit gets cleared with in a certain amount of time
+                if (!(synopGMACReadReg(RegBase,GmacGmiiAddr) & GmiiBusy)){
+                break;
+                }
+        plat_delay(DEFAULT_DELAY_VARIABLE);
+        }
+        if(loop_variable < DEFAULT_LOOP_VARIABLE)
+               * data = (u16)(synopGMACReadReg(RegBase,GmacGmiiData) & 0xFFFF);
+        else{
+        TR("Error::: PHY not responding Busy bit didnot get cleared !!!!!!\n");
+	return -ESYNOPGMACPHYERR;
+        }
+return -ESYNOPGMACNOERR;
+}
+
+/**
+  * Function to write to the Phy register. The access to phy register
+  * is a slow process as the data is moved accross MDI/MDO interface
+  * @param[in] pointer to Register Base (It is the mac base in our case) .
+  * @param[in] PhyBase register is the index of one of supported 32 PHY devices.
+  * @param[in] Register offset is the index of one of the 32 phy register.
+  * @param[in] data to be written to the respective phy register.
+  * \return Returns 0 on success else return the error status.
+  */
+s32 synopGMAC_write_phy_reg(u32 *RegBase, u32 PhyBase, u32 RegOffset, u16 data)
+{
+u32 addr;
+u32 loop_variable;
+
+synopGMACWriteReg(RegBase,GmacGmiiData,data); // write the data in to GmacGmiiData register of synopGMAC ip
+
+addr = ((PhyBase << GmiiDevShift) & GmiiDevMask) | ((RegOffset << GmiiRegShift) & GmiiRegMask) | GmiiWrite;
+
+addr = addr | GmiiBusy ; //set Gmii clk to 20-35 Mhz and Gmii busy bit
+ 
+synopGMACWriteReg(RegBase,GmacGmiiAddr,addr);
+        for(loop_variable = 0; loop_variable < DEFAULT_LOOP_VARIABLE; loop_variable++){
+                if (!(synopGMACReadReg(RegBase,GmacGmiiAddr) & GmiiBusy)){
+                break;
+                }
+        plat_delay(DEFAULT_DELAY_VARIABLE);
+        }
+
+        if(loop_variable < DEFAULT_LOOP_VARIABLE){
+	return -ESYNOPGMACNOERR;
+	}
+        else{
+        TR("Error::: PHY not responding Busy bit didnot get cleared !!!!!!\n");
+	return -ESYNOPGMACPHYERR;
+        }
+}
+
+/**
+  * Function to configure the phy in loopback mode. 
+  *
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] enable or disable the loopback.
+  * \return 0 on success else return the error status.
+  * \note Don't get confused with mac loop-back synopGMAC_loopback_on(synopGMACdevice *) 
+  * and synopGMAC_loopback_off(synopGMACdevice *) functions.
+  */
+s32 synopGMAC_phy_loopback(synopGMACdevice *gmacdev, bool loopback)
+{
+s32 status = -ESYNOPGMACNOERR;
+if(loopback)
+	status = synopGMAC_write_phy_reg((u32 *)gmacdev->MacBase, gmacdev->PhyBase, PHY_CONTROL_REG, Mii_Loopback);
+else
+	status = synopGMAC_write_phy_reg((u32 *)gmacdev->MacBase, gmacdev->PhyBase, PHY_CONTROL_REG, Mii_NoLoopback);
+
+return status;
+}
+
+
+
+/**
+  * Function to read the GMAC IP Version and populates the same in device data structure.
+  * @param[in] pointer to synopGMACdevice.
+  * \return Always return 0.
+  */
+
+s32 synopGMAC_read_version (synopGMACdevice * gmacdev) 
+{	
+	u32 data = 0;
+	data = synopGMACReadReg((u32 *)gmacdev->MacBase, GmacVersion );
+	gmacdev->Version = data;
+	TR("The data read from %p is %08x\n",(gmacdev->MacBase+GmacVersion),data);
+	return 0;
+}
+
+
+/**
+  * Function to reset the GMAC core. 
+  * This reests the DMA and GMAC core. After reset all the registers holds their respective reset value
+  * @param[in] pointer to synopGMACdevice.
+  * \return 0 on success else return the error status.
+  */
+s32 synopGMAC_reset (synopGMACdevice * gmacdev ) 
+{	
+	u32 data = 0;
+	synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaBusMode ,DmaResetOn);
+        plat_delay(DEFAULT_LOOP_VARIABLE);
+	data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaBusMode);
+	TR("DATA after Reset = %08x\n",data);
+	
+	return 0;	
+}
+
+
+/**
+  * Function to program DMA bus mode register. 
+  * 
+  * The Bus Mode register is programmed with the value given. The bits to be set are
+  * bit wise or'ed and sent as the second argument to this function.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] the data to be programmed.
+  * \return 0 on success else return the error status.
+  */
+s32 synopGMAC_dma_bus_mode_init(synopGMACdevice * gmacdev, u32 init_value )
+{
+	synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaBusMode ,init_value);
+	return 0;
+
+}
+
+/**
+  * Function to program DMA Control register. 
+  * 
+  * The Dma Control register is programmed with the value given. The bits to be set are
+  * bit wise or'ed and sent as the second argument to this function.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] the data to be programmed.
+  * \return 0 on success else return the error status.
+  */
+s32 synopGMAC_dma_control_init(synopGMACdevice * gmacdev, u32 init_value)
+{
+	synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaControl, init_value);
+	return 0;
+}
+
+
+/*Gmac configuration functions*/
+
+/**
+  * Enable the watchdog timer on the receiver. 
+  * When enabled, Gmac enables Watchdog timer, and GMAC allows no more than
+  * 2048 bytes of data (10,240 if Jumbo frame enabled).
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_wd_enable(synopGMACdevice * gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase, GmacConfig, GmacWatchdog);
+	return;
+}
+/**
+  * Disable the watchdog timer on the receiver. 
+  * When disabled, Gmac disabled watchdog timer, and can receive frames up to
+  * 16,384 bytes.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_wd_disable(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacConfig, GmacWatchdog);
+	return;
+}
+
+/**
+  * Enables the Jabber frame support. 
+  * When enabled, GMAC disabled the jabber timer, and can transfer 16,384 byte frames.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_jab_enable(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacConfig, GmacJabber);
+	return;
+}
+/**
+  * Disables the Jabber frame support. 
+  * When disabled, GMAC enables jabber timer. It cuts of transmitter if application 
+  * sends more than 2048 bytes of data (10240 if Jumbo frame enabled).
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_jab_disable(synopGMACdevice * gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase, GmacConfig, GmacJabber);
+	return;
+}
+
+/**
+  * Enables Frame bursting (Only in Half Duplex Mode). 
+  * When enabled, GMAC allows frame bursting in GMII Half Duplex mode.
+  * Reserved in 10/100 and Full-Duplex configurations.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_frame_burst_enable(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacConfig, GmacFrameBurst);
+	return;
+}
+/**
+  * Disables Frame bursting. 
+  * When Disabled, frame bursting is not supported.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_frame_burst_disable(synopGMACdevice * gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase, GmacConfig, GmacFrameBurst);
+	return;
+}
+
+/**
+  * Enable Jumbo frame support. 
+  * When Enabled GMAC supports jumbo frames of 9018/9022(VLAN tagged).
+  * Giant frame error is not reported in receive frame status.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_jumbo_frame_enable(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacConfig, GmacJumboFrame);
+	return;
+}
+/**
+  * Disable Jumbo frame support. 
+  * When Disabled GMAC does not supports jumbo frames.
+  * Giant frame error is reported in receive frame status.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_jumbo_frame_disable(synopGMACdevice * gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase, GmacConfig, GmacJumboFrame);
+	return;
+}
+
+/**
+  * Disable Carrier sense. 
+  * When Disabled GMAC ignores CRS signal during frame transmission
+  * in half duplex mode.
+  * @param[in] pointer to synopGMACdevice.
+  * \return void.
+  */
+
+void synopGMAC_disable_crs(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacConfig, GmacDisableCrs);
+	return;
+}
+
+
+
+/**
+  * Selects the GMII port. 
+  * When called GMII (1000Mbps) port is selected (programmable only in 10/100/1000 Mbps configuration).
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_select_gmii(synopGMACdevice * gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase, GmacConfig, GmacMiiGmii);
+	return;
+}
+/**
+  * Selects the MII port. 
+  * When called MII (10/100Mbps) port is selected (programmable only in 10/100/1000 Mbps configuration).
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_select_mii(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacConfig, GmacMiiGmii);
+	return;
+}
+
+/**
+  * Enables Receive Own bit (Only in Half Duplex Mode). 
+  * When enaled GMAC receives all the packets given by phy while transmitting.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_rx_own_enable(synopGMACdevice * gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase, GmacConfig, GmacRxOwn);
+	return;
+}
+/**
+  * Disables Receive Own bit (Only in Half Duplex Mode). 
+  * When enaled GMAC disables the reception of frames when gmii_txen_o is asserted.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_rx_own_disable(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacConfig, GmacRxOwn);
+	return;
+}
+
+/**
+  * Sets the GMAC in loopback mode. 
+  * When on GMAC operates in loop-back mode at GMII/MII.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  * \note (G)MII Receive clock is required for loopback to work properly, as transmit clock is
+  * not looped back internally.
+  */
+void synopGMAC_loopback_on(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacConfig, GmacLoopback);
+	return;
+}
+/**
+  * Sets the GMAC in Normal mode. 
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_loopback_off(synopGMACdevice * gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase, GmacConfig, GmacLoopback);
+	return;
+}
+
+/**
+  * Sets the GMAC core in Full-Duplex mode. 
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_set_full_duplex(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacConfig, GmacDuplex);
+	return;
+}
+/**
+  * Sets the GMAC core in Half-Duplex mode. 
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_set_half_duplex(synopGMACdevice * gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase, GmacConfig, GmacDuplex);
+	return;
+}
+
+/**
+  * GMAC tries retransmission (Only in Half Duplex mode).
+  * If collision occurs on the GMII/MII, GMAC attempt retries based on the 
+  * back off limit configured. 
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  * \note This function is tightly coupled with synopGMAC_back_off_limit(synopGMACdev *, u32).
+  */
+void synopGMAC_retry_enable(synopGMACdevice * gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase, GmacConfig, GmacRetry);
+	return;
+}
+/**
+  * GMAC tries only one transmission (Only in Half Duplex mode).
+  * If collision occurs on the GMII/MII, GMAC will ignore the current frami
+  * transmission and report a frame abort with excessive collision in tranmit frame status. 
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_retry_disable(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacConfig, GmacRetry);
+	return;
+}
+
+/**
+  * GMAC strips the Pad/FCS field of incoming frames.
+  * This is true only if the length field value is less than or equal to
+  * 1500 bytes. All received frames with length field greater than or equal to
+  * 1501 bytes are passed to the application without stripping the Pad/FCS field. 
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_pad_crc_strip_enable(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacConfig, GmacPadCrcStrip);
+	return;
+}
+/**
+  * GMAC doesnot strips the Pad/FCS field of incoming frames.
+  * GMAC will pass all the incoming frames to Host unmodified. 
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_pad_crc_strip_disable(synopGMACdevice * gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase, GmacConfig, GmacPadCrcStrip);
+	return;
+}
+/**
+  * GMAC programmed with the back off limit value.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  * \note This function is tightly coupled with synopGMAC_retry_enable(synopGMACdevice * gmacdev)
+  */
+void synopGMAC_back_off_limit(synopGMACdevice * gmacdev, u32 value)
+{
+	u32 data;
+	data = synopGMACReadReg((u32 *)gmacdev->MacBase, GmacConfig);
+	data &= (~GmacBackoffLimit);
+	data |= value;
+	synopGMACWriteReg((u32 *)gmacdev->MacBase, GmacConfig,data);
+	return;
+}
+
+/**
+  * Enables the Deferral check in GMAC (Only in Half Duplex mode)
+  * GMAC issues a Frame Abort Status, along with the excessive deferral error bit set in the 
+  * transmit frame status when transmit state machine is deferred for more than
+  * 	- 24,288 bit times in 10/100Mbps mode
+  * 	- 155,680 bit times in 1000Mbps mode or Jumbo frame mode in 10/100Mbps operation. 
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  * \note Deferral begins when transmitter is ready to transmit, but is prevented because  of
+  * an active CRS (carrier sense) 
+  */
+void synopGMAC_deferral_check_enable(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacConfig, GmacDeferralCheck);
+	return;
+}
+/**
+  * Disables the Deferral check in GMAC (Only in Half Duplex mode).
+  * GMAC defers until the CRS signal goes inactive.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_deferral_check_disable(synopGMACdevice * gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase, GmacConfig, GmacDeferralCheck);
+	return;
+}
+/**
+  * Enable the reception of frames on GMII/MII.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_rx_enable(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacConfig, GmacRx);
+	return;
+}
+/**
+  * Disable the reception of frames on GMII/MII.
+  * GMAC receive state machine is disabled after completion of reception of current frame.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_rx_disable(synopGMACdevice * gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase, GmacConfig, GmacRx);
+	return;
+}
+/**
+  * Enable the transmission of frames on GMII/MII.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_tx_enable(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacConfig, GmacTx);
+	return;
+}
+/**
+  * Disable the transmission of frames on GMII/MII.
+  * GMAC transmit state machine is disabled after completion of transmission of current frame.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_tx_disable(synopGMACdevice * gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase, GmacConfig, GmacTx);
+	return;
+}
+
+
+/*Receive frame filter configuration functions*/
+
+/**
+  * Enables reception of all the frames to application.
+  * GMAC passes all the frames received to application irrespective of whether they
+  * pass SA/DA address filtering or not.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_frame_filter_enable(synopGMACdevice * gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase, GmacFrameFilter, GmacFilter);
+	return;
+}
+/**
+  * Disables reception of all the frames to application.
+  * GMAC passes only those received frames to application which 
+  * pass SA/DA address filtering.
+  * @param[in] pointer to synopGMACdevice.
+  * \return void. 
+  */
+void synopGMAC_frame_filter_disable(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacFrameFilter, GmacFilter);
+	return;
+}
+
+/**
+  * Populates the Hash High register with the data supplied.
+  * This function is called when the Hash filtering is to be enabled.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] data to be written to hash table high register.
+  * \return void. 
+  */
+void synopGMAC_write_hash_table_high(synopGMACdevice * gmacdev, u32 data)
+{
+	synopGMACWriteReg((u32 *)gmacdev->MacBase,GmacHashHigh,data);
+	return;
+}
+
+/**
+  * Populates the Hash Low register with the data supplied.
+  * This function is called when the Hash filtering is to be enabled.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] data to be written to hash table low register.
+  * \return void. 
+  */
+void synopGMAC_write_hash_table_low(synopGMACdevice * gmacdev, u32 data)
+{
+	synopGMACWriteReg((u32 *)gmacdev->MacBase,GmacHashLow,data);
+	return;
+}
+
+/**
+  * Enables Hash or Perfect filter (only if Hash filter is enabled in H/W).
+  * Only frames matching either perfect filtering or Hash Filtering as per HMC and HUC 
+  * configuration are sent to application.
+  * @param[in] pointer to synopGMACdevice.
+  * \return void. 
+  */
+void synopGMAC_hash_perfect_filter_enable(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacFrameFilter, GmacHashPerfectFilter);
+	return;
+}
+
+/**
+  * Enables only Hash(only if Hash filter is enabled in H/W).
+  * Only frames matching Hash Filtering as per HMC and HUC 
+  * configuration are sent to application.
+  * @param[in] pointer to synopGMACdevice.
+  * \return void. 
+  */
+void synopGMAC_Hash_filter_only_enable(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacFrameFilter, GmacHashPerfectFilter);
+	return;
+}
+
+/**
+  * Enables Source address filtering.
+  * When enabled source address filtering is performed. Only frames matching SA filtering are passed  to application with 
+  * SAMatch bit of RxStatus is set. GMAC drops failed frames. 
+  * @param[in] pointer to synopGMACdevice.
+  * \return void.
+  * \note This function is overriden by synopGMAC_frame_filter_disable(synopGMACdevice *) 
+  */
+void synopGMAC_src_addr_filter_enable(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacFrameFilter, GmacSrcAddrFilter);
+	return;
+}
+/**
+  * Disables Source address filtering.
+  * When disabled GMAC forwards the received frames with updated SAMatch bit in RxStatus. 
+  * @param[in] pointer to synopGMACdevice.
+  * \return void.
+  */
+void synopGMAC_src_addr_filter_disable(synopGMACdevice * gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase, GmacFrameFilter, GmacSrcAddrFilter);
+	return;
+}
+/**
+  * Enables Inverse Destination address filtering.
+  * @param[in] pointer to synopGMACdevice.
+  * \return void.
+  */
+void synopGMAC_dst_addr_filter_inverse(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacFrameFilter, GmacDestAddrFilterNor);
+	return;
+}
+/**
+  * Enables the normal Destination address filtering.
+  * @param[in] pointer to synopGMACdevice.
+  * \return void.
+  */
+void synopGMAC_dst_addr_filter_normal(synopGMACdevice * gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase, GmacFrameFilter, GmacDestAddrFilterNor);
+	return;
+}
+
+/**
+  * Enables forwarding of control frames.
+  * When set forwards all the control frames (incl. unicast and multicast PAUSE frames).
+  * @param[in] pointer to synopGMACdevice.
+  * \return void.
+  * \note Depends on RFE of FlowControlRegister[2]
+  */
+void synopGMAC_set_pass_control(synopGMACdevice * gmacdev,u32 passcontrol)
+{	
+	u32 data;
+	data = synopGMACReadReg((u32 *)gmacdev->MacBase, GmacFrameFilter);
+	data &= (~GmacPassControl);
+	data |= passcontrol;
+	synopGMACWriteReg((u32 *)gmacdev->MacBase,GmacFrameFilter,data);
+	return;
+}
+
+/**
+  * Enables Broadcast frames.
+  * When enabled Address filtering module passes all incoming broadcast frames.
+  * @param[in] pointer to synopGMACdevice.
+  * \return void.
+  */
+void synopGMAC_broadcast_enable(synopGMACdevice * gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase, GmacFrameFilter, GmacBroadcast);
+	return;
+}
+/**
+  * Disable Broadcast frames.
+  * When disabled Address filtering module filters all incoming broadcast frames.
+  * @param[in] pointer to synopGMACdevice.
+  * \return void.
+  */
+void synopGMAC_broadcast_disable(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacFrameFilter, GmacBroadcast);
+	return;
+}
+
+/**
+  * Enables Multicast frames.
+  * When enabled all multicast frames are passed.
+  * @param[in] pointer to synopGMACdevice.
+  * \return void.
+  */
+void synopGMAC_multicast_enable(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacFrameFilter, GmacMulticastFilter);
+	return;
+}
+/**
+  * Disable Multicast frames.
+  * When disabled multicast frame filtering depends on HMC bit.
+  * @param[in] pointer to synopGMACdevice.
+  * \return void.
+  */
+void synopGMAC_multicast_disable(synopGMACdevice * gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase, GmacFrameFilter, GmacMulticastFilter);
+	return;
+}
+
+/**
+  * Enables multicast hash filtering.
+  * When enabled GMAC performs teh destination address filtering according to the hash table.
+  * @param[in] pointer to synopGMACdevice.
+  * \return void.
+  */
+void synopGMAC_multicast_hash_filter_enable(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacFrameFilter, GmacMcastHashFilter);
+	return;
+}
+/**
+  * Disables multicast hash filtering.
+  * When disabled GMAC performs perfect destination address filtering for multicast frames, it compares 
+  * DA field with the value programmed in DA register.
+  * @param[in] pointer to synopGMACdevice.
+  * \return void.
+  */
+void synopGMAC_multicast_hash_filter_disable(synopGMACdevice * gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase, GmacFrameFilter, GmacMcastHashFilter);
+	return;
+}
+
+/**
+  * Enables promiscous mode.
+  * When enabled Address filter modules pass all incoming frames regardless of their Destination
+  * and source addresses.
+  * @param[in] pointer to synopGMACdevice.
+  * \return void.
+  */
+void synopGMAC_promisc_enable(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacFrameFilter, GmacPromiscuousMode);
+	return;
+}
+/**
+  * Clears promiscous mode.
+  * When called the GMAC falls back to normal operation from promiscous mode.
+  * @param[in] pointer to synopGMACdevice.
+  * \return void.
+  */
+void synopGMAC_promisc_disable(synopGMACdevice * gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase, GmacFrameFilter, GmacPromiscuousMode);
+	return;
+}
+
+
+/**
+  * Enables unicast hash filtering.
+  * When enabled GMAC performs the destination address filtering of unicast frames according to the hash table.
+  * @param[in] pointer to synopGMACdevice.
+  * \return void.
+  */
+void synopGMAC_unicast_hash_filter_enable(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacFrameFilter, GmacUcastHashFilter);
+	return;
+}
+/**
+  * Disables multicast hash filtering.
+  * When disabled GMAC performs perfect destination address filtering for unicast frames, it compares 
+  * DA field with the value programmed in DA register.
+  * @param[in] pointer to synopGMACdevice.
+  * \return void.
+  */
+void synopGMAC_unicast_hash_filter_disable(synopGMACdevice * gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase, GmacFrameFilter, GmacUcastHashFilter);
+	return;
+}
+	
+/*Flow control configuration functions*/
+
+/**
+  * Enables detection of pause frames with stations unicast address.
+  * When enabled GMAC detects the pause frames with stations unicast address in addition to the
+  * detection of pause frames with unique multicast address.
+  * @param[in] pointer to synopGMACdevice.
+  * \return void.
+  */
+void synopGMAC_unicast_pause_frame_detect_enable(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacFlowControl, GmacUnicastPauseFrame);
+	return;
+}
+/**
+  * Disables detection of pause frames with stations unicast address.
+  * When disabled GMAC only detects with the unique multicast address (802.3x).
+  * @param[in] pointer to synopGMACdevice.
+  * \return void.
+  */
+void synopGMAC_unicast_pause_frame_detect_disable(synopGMACdevice * gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase, GmacFlowControl, GmacUnicastPauseFrame);
+	return;
+}
+/**
+  * Rx flow control enable.
+  * When Enabled GMAC will decode the rx pause frame and disable the tx for a specified time.
+  * @param[in] pointer to synopGMACdevice.
+  * \return void.
+  */
+void synopGMAC_rx_flow_control_enable(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacFlowControl, GmacRxFlowControl);
+	return;
+}
+/**
+  * Rx flow control disable.
+  * When disabled GMAC will not decode pause frame.
+  * @param[in] pointer to synopGMACdevice.
+  * \return void.
+  */
+void synopGMAC_rx_flow_control_disable(synopGMACdevice * gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase, GmacFlowControl, GmacRxFlowControl);
+	return;
+}
+/**
+  * Tx flow control enable.
+  * When Enabled 
+  * 	- In full duplex GMAC enables flow control operation to transmit pause frames.
+  *	- In Half duplex GMAC enables the back pressure operation
+  * @param[in] pointer to synopGMACdevice.
+  * \return void.
+  */
+void synopGMAC_tx_flow_control_enable(synopGMACdevice * gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacFlowControl, GmacTxFlowControl);
+	return;
+}
+
+/**
+  * Tx flow control disable.
+  * When Disabled 
+  * 	- In full duplex GMAC will not transmit any pause frames.
+  *	- In Half duplex GMAC disables the back pressure feature.
+  * @param[in] pointer to synopGMACdevice.
+  * \return void.
+  */
+void synopGMAC_tx_flow_control_disable(synopGMACdevice * gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase, GmacFlowControl, GmacTxFlowControl);
+	return;
+}
+
+/**
+  * Initiate Flowcontrol operation.
+  * When Set
+  * 	- In full duplex GMAC initiates pause control frame.
+  *	- In Half duplex GMAC initiates back pressure function.
+  * @param[in] pointer to synopGMACdevice.
+  * \return void.
+  */
+void synopGMAC_tx_activate_flow_control(synopGMACdevice * gmacdev)
+{
+	//In case of full duplex check for this bit to b'0. if it is read as b'1 indicates that
+        //control frame transmission is in progress.
+	if(gmacdev->Speed == FULLDUPLEX){
+		if(!synopGMACCheckBits((u32 *)gmacdev->MacBase, GmacFlowControl, GmacFlowControlBackPressure))
+			synopGMACSetBits((u32 *)gmacdev->MacBase, GmacFlowControl, GmacFlowControlBackPressure);
+	}
+	else{ //if half duplex mode
+		
+		synopGMACSetBits((u32 *)gmacdev->MacBase, GmacFlowControl, GmacFlowControlBackPressure);
+	}
+
+	return;
+}
+
+/**
+  * stops Flowcontrol operation.
+  * @param[in] pointer to synopGMACdevice.
+  * \return void.
+  */
+void synopGMAC_tx_deactivate_flow_control(synopGMACdevice * gmacdev)
+{
+	//In full duplex this bit is automatically cleared after transmitting a pause control frame.
+	if(gmacdev->Speed == HALFDUPLEX){
+	synopGMACSetBits((u32 *)gmacdev->MacBase, GmacFlowControl, GmacFlowControlBackPressure);
+	}
+	return;
+}
+
+/**
+  * This enables the pause frame generation after programming the appropriate registers.
+  * presently activation is set at 3k and deactivation set at 4k. These may have to tweaked
+  * if found any issues
+  * @param[in] pointer to synopGMACdevice.
+  * \return void.
+  */
+void synopGMAC_pause_control(synopGMACdevice *gmacdev)
+{
+	u32 omr_reg;
+	u32 mac_flow_control_reg;
+	omr_reg = synopGMACReadReg((u32 *)gmacdev->DmaBase,DmaControl);
+	omr_reg |= DmaRxFlowCtrlAct4K | DmaRxFlowCtrlDeact5K |DmaEnHwFlowCtrl;
+	synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaControl, omr_reg);
+
+	mac_flow_control_reg = synopGMACReadReg((u32 *)gmacdev->MacBase,GmacFlowControl);
+	mac_flow_control_reg |= GmacRxFlowControl | GmacTxFlowControl | 0xFFFF0000;
+	synopGMACWriteReg((u32 *)gmacdev->MacBase,GmacFlowControl,mac_flow_control_reg);
+
+	return;
+
+}
+
+/**
+  * Example mac initialization sequence.
+  * This function calls the initialization routines to initialize the GMAC register.
+  * One can change the functions invoked here to have different configuration as per the requirement
+  * @param[in] pointer to synopGMACdevice.
+  * \return Returns 0 on success.
+  */
+s32 synopGMAC_mac_init(synopGMACdevice * gmacdev)
+{
+	u32 PHYreg;
+	
+	if(gmacdev->DuplexMode == FULLDUPLEX){
+		synopGMAC_wd_enable(gmacdev);
+		synopGMAC_jab_enable(gmacdev);
+		synopGMAC_frame_burst_enable(gmacdev);
+		synopGMAC_jumbo_frame_disable(gmacdev);
+		synopGMAC_rx_own_enable(gmacdev);
+		synopGMAC_loopback_off(gmacdev);
+		synopGMAC_set_full_duplex(gmacdev);
+		synopGMAC_retry_enable(gmacdev);
+		synopGMAC_pad_crc_strip_disable(gmacdev);
+		synopGMAC_back_off_limit(gmacdev,GmacBackoffLimit0);
+		synopGMAC_deferral_check_disable(gmacdev);
+		synopGMAC_tx_enable(gmacdev);	
+		synopGMAC_rx_enable(gmacdev);
+
+		synopGMACSetBits((u32 *)gmacdev->DmaBase,DmaControl, DmaStoreAndForward);//3
+		synopGMACSetBits((u32 *)gmacdev->DmaBase,DmaControl, DmaFwdErrorFrames);
+		synopGMACSetBits((u32 *)gmacdev->DmaBase,DmaControl, 0x02000000);
+
+		if(gmacdev->Speed == SPEED1000)
+			synopGMAC_select_gmii(gmacdev);
+		else
+		{
+			synopGMAC_select_mii(gmacdev);
+			if(gmacdev->Speed == SPEED100)
+				synopGMACSetBits((u64 *)gmacdev->MacBase, GmacConfig, GmacFESpeed100);
+			else
+				synopGMACSetBits((u64 *)gmacdev->MacBase, GmacConfig, GmacFESpeed10);
+		}
+
+		/*Frame Filter Configuration*/
+	 	//synopGMAC_frame_filter_enable(gmacdev);
+	 	synopGMAC_frame_filter_disable(gmacdev);
+		synopGMAC_set_pass_control(gmacdev,GmacPassControl0);
+		synopGMAC_broadcast_enable(gmacdev);
+		synopGMAC_src_addr_filter_disable(gmacdev);
+		synopGMAC_multicast_disable(gmacdev);
+		synopGMAC_dst_addr_filter_normal(gmacdev);
+		synopGMAC_multicast_hash_filter_disable(gmacdev);
+		synopGMAC_promisc_disable(gmacdev);
+		synopGMAC_unicast_hash_filter_disable(gmacdev);
+	
+		/*Flow Control Configuration*/
+		synopGMAC_unicast_pause_frame_detect_disable(gmacdev);
+		synopGMAC_rx_flow_control_enable(gmacdev);
+		synopGMAC_tx_flow_control_enable(gmacdev);
+	}
+	else{//for Half Duplex configuration
+		
+		synopGMAC_wd_enable(gmacdev);
+		synopGMAC_jab_enable(gmacdev);
+		synopGMAC_frame_burst_enable(gmacdev);
+		synopGMAC_jumbo_frame_disable(gmacdev);
+		synopGMAC_rx_own_enable(gmacdev);
+		synopGMAC_loopback_off(gmacdev);
+		synopGMAC_set_half_duplex(gmacdev);
+		synopGMAC_retry_enable(gmacdev);
+		synopGMAC_pad_crc_strip_disable(gmacdev);
+		synopGMAC_back_off_limit(gmacdev,GmacBackoffLimit0);
+		synopGMAC_deferral_check_disable(gmacdev);
+
+		synopGMACSetBits((u64 *)gmacdev->DmaBase,DmaControl, DmaStoreAndForward);
+		synopGMACSetBits((u64 *)gmacdev->DmaBase,DmaControl, DmaFwdErrorFrames);
+		synopGMAC_tx_enable(gmacdev);	
+		synopGMAC_rx_enable(gmacdev);
+
+		if(gmacdev->Speed == SPEED1000)
+			synopGMAC_select_gmii(gmacdev);
+		else
+		{
+			synopGMAC_select_mii(gmacdev);
+			if(gmacdev->Speed == SPEED100)
+				synopGMACSetBits((u64 *)gmacdev->MacBase, GmacConfig, GmacFESpeed100);
+			else
+				synopGMACSetBits((u64 *)gmacdev->MacBase, GmacConfig, GmacFESpeed10);
+		}
+
+		/*Frame Filter Configuration*/
+	 	synopGMAC_frame_filter_enable(gmacdev);
+		synopGMAC_set_pass_control(gmacdev,GmacPassControl0);
+		synopGMAC_broadcast_enable(gmacdev);
+		synopGMAC_src_addr_filter_disable(gmacdev);
+		synopGMAC_multicast_disable(gmacdev);
+		synopGMAC_dst_addr_filter_normal(gmacdev);
+		synopGMAC_multicast_hash_filter_disable(gmacdev);
+		synopGMAC_promisc_disable(gmacdev);
+		synopGMAC_unicast_hash_filter_disable(gmacdev);
+		
+		/*Flow Control Configuration*/
+		synopGMAC_unicast_pause_frame_detect_disable(gmacdev);
+		synopGMAC_rx_flow_control_disable(gmacdev);
+		synopGMAC_tx_flow_control_disable(gmacdev);
+
+		/*To set PHY register to enable CRS on Transmit*/
+/*
+		synopGMACWriteReg((u32 *)gmacdev->MacBase, GmacGmiiAddr, GmiiBusy | 0x00000408);
+		PHYreg = synopGMACReadReg((u32 *)gmacdev->MacBase,GmacGmiiData);
+		synopGMACWriteReg((u32 *)gmacdev->MacBase, GmacGmiiData, PHYreg   | 0x00000800);
+		synopGMACWriteReg((u32 *)gmacdev->MacBase, GmacGmiiAddr, GmiiBusy | 0x0000040a);
+*/
+	}
+	return 0;
+}
+
+/*
+phy 88e1111 rx/tx phase init.
+*/
+
+s32 synopGMAC_phy88e1111_phase_init (synopGMACdevice * gmacdev) 
+{
+	u16 data;
+	s32 status = -ESYNOPGMACNOERR;		
+
+		status = synopGMAC_read_phy_reg((u32 *)gmacdev->MacBase,gmacdev->PhyBase,PHY_EXT_PHY_SPC_CTRL	 , &data);
+	data = data | 0x0082;
+		status = synopGMAC_write_phy_reg((u32 *)gmacdev->MacBase,gmacdev->PhyBase,PHY_EXT_PHY_SPC_CTRL	, data);
+		status = synopGMAC_read_phy_reg((u32 *)gmacdev->MacBase,gmacdev->PhyBase,0x0	 , &data);
+	data = data | 0x8000;
+		status = synopGMAC_write_phy_reg((u32 *)gmacdev->MacBase,gmacdev->PhyBase,0x0	, data);
+	return status;
+}
+
+/**
+  * Sets the Mac address in to GMAC register.
+  * This function sets the MAC address to the MAC register in question.
+  * @param[in] pointer to synopGMACdevice to populate mac dma and phy addresses.
+  * @param[in] Register offset for Mac address high
+  * @param[in] Register offset for Mac address low
+  * @param[in] buffer containing mac address to be programmed.
+  * \return 0 upon success. Error code upon failure.
+  */
+s32 synopGMAC_set_mac_addr(synopGMACdevice *gmacdev, u32 MacHigh, u32 MacLow, u8 *MacAddr)
+{
+	u32 data;
+	
+	data = (MacAddr[5] << 8) | MacAddr[4];
+	synopGMACWriteReg((u32 *)gmacdev->MacBase,MacHigh,data);
+	data = (MacAddr[3] << 24) | (MacAddr[2] << 16) | (MacAddr[1] << 8) | MacAddr[0] ;
+	synopGMACWriteReg((u32 *)gmacdev->MacBase,MacLow,data);
+	return 0;
+}
+
+
+/**
+  * Get the Mac address in to the address specified.
+  * The mac register contents are read and written to buffer passed.
+  * @param[in] pointer to synopGMACdevice to populate mac dma and phy addresses.
+  * @param[in] Register offset for Mac address high
+  * @param[in] Register offset for Mac address low
+  * @param[out] buffer containing the device mac address.
+  * \return 0 upon success. Error code upon failure.
+  */
+s32 synopGMAC_get_mac_addr(synopGMACdevice *gmacdev, u32 MacHigh, u32 MacLow, u8 *MacAddr)
+{
+	u32 data;
+		
+	data = synopGMACReadReg((u32 *)gmacdev->MacBase,MacHigh);
+	MacAddr[5] = (data >> 8) & 0xff;
+	MacAddr[4] = (data)        & 0xff;
+
+	data = synopGMACReadReg((u32 *)gmacdev->MacBase,MacLow);
+	MacAddr[3] = (data >> 24) & 0xff;
+	MacAddr[2] = (data >> 16) & 0xff;
+	MacAddr[1] = (data >> 8 ) & 0xff;
+	MacAddr[0] = (data )      & 0xff;
+
+	return 0;
+}
+
+
+/**
+  * Attaches the synopGMAC device structure to the hardware.
+  * Device structure is populated with MAC/DMA and PHY base addresses.
+  * @param[in] pointer to synopGMACdevice to populate mac dma and phy addresses.
+  * @param[in] GMAC IP mac base address.
+  * @param[in] GMAC IP dma base address.
+  * @param[in] GMAC IP phy base address.
+  * \return 0 upon success. Error code upon failure.
+  * \note This is important function. No kernel api provided by Synopsys 
+  */
+
+s32 synopGMAC_attach (synopGMACdevice * gmacdev, void *macBase,void *dmaBase,u32 phyBase,u8 *mac_addr0) 
+{
+	/*Make sure the Device data strucure is cleared before we proceed further*/
+	memset((void *) gmacdev,0,sizeof(synopGMACdevice));
+	/*Populate the mac and dma base addresses*/
+	gmacdev->MacBase = macBase;
+	gmacdev->DmaBase = dmaBase;
+	gmacdev->PhyBase = phyBase;
+	{
+		int i,j;
+		u16 data;
+
+		for (i = phyBase,j=0;j<32;i=(i+1)&0x1f,j++) 
+		{
+			synopGMAC_read_phy_reg(gmacdev->MacBase,i,2,&data);
+			if(data != 0 && data != 0xffff) break;
+			synopGMAC_read_phy_reg(gmacdev->MacBase,i,3,&data);
+			if(data != 0 && data != 0xffff) break;
+		}
+
+		if(j==32) { 
+			printk("phy_detect: can't find PHY!\n");
+		}
+
+		gmacdev->PhyBase = i;
+	}
+
+	/* Program/flash in the station/IP's Mac address */
+	synopGMAC_set_mac_addr(gmacdev,GmacAddr0High,GmacAddr0Low, mac_addr0); 
+
+	return 0;	
+}
+
+
+
+
+/**
+  * Initialize the rx descriptors for ring or chain mode operation.
+  * 	- Status field is initialized to 0.
+  *	- EndOfRing set for the last descriptor.
+  *	- buffer1 and buffer2 set to 0 for ring mode of operation. (note)
+  *	- data1 and data2 set to 0. (note)
+  * @param[in] pointer to DmaDesc structure.
+  * @param[in] whether end of ring
+  * \return void.
+  * \note Initialization of the buffer1, buffer2, data1,data2 and status are not done here. This only initializes whether one wants to use this descriptor
+  * in chain mode or ring mode. For chain mode of operation the buffer2 and data2 are programmed before calling this function.
+  */
+void synopGMAC_rx_desc_init_ring(DmaDesc *desc, bool last_ring_desc)
+{
+	desc->status = 0;
+	desc->length = last_ring_desc ? RxDescEndOfRing : 0;
+	desc->buffer1 = 0;
+	desc->buffer2 = 0;
+	desc->data1 = 0;
+	desc->data2 = 0;
+	return;
+}
+/**
+  * Initialize the tx descriptors for ring or chain mode operation.
+  * 	- Status field is initialized to 0.
+  *	- EndOfRing set for the last descriptor.
+  *	- buffer1 and buffer2 set to 0 for ring mode of operation. (note)
+  *	- data1 and data2 set to 0. (note)
+  * @param[in] pointer to DmaDesc structure.
+  * @param[in] whether end of ring
+  * \return void.
+  * \note Initialization of the buffer1, buffer2, data1,data2 and status are not done here. This only initializes whether one wants to use this descriptor
+  * in chain mode or ring mode. For chain mode of operation the buffer2 and data2 are programmed before calling this function.
+  */
+void synopGMAC_tx_desc_init_ring(DmaDesc *desc, bool last_ring_desc)
+{
+	#ifdef ENH_DESC
+	desc->status = last_ring_desc? TxDescEndOfRing : 0;
+	desc->length = 0; 
+	#else
+	desc->length = last_ring_desc? TxDescEndOfRing : 0;
+	#endif
+	desc->buffer1 = 0;
+	desc->buffer2 = 0;
+	desc->data1 = 0;
+	desc->data2 = 0;
+	return;
+}
+
+
+
+/**
+  * Initialize the rx descriptors for chain mode of operation.
+  * 	- Status field is initialized to 0.
+  *	- EndOfRing set for the last descriptor.
+  *	- buffer1 and buffer2 set to 0.
+  *	- data1 and data2 set to 0.
+  * @param[in] pointer to DmaDesc structure.
+  * @param[in] whether end of ring
+  * \return void.
+  */
+
+void synopGMAC_rx_desc_init_chain(DmaDesc * desc)
+{
+	desc->status = 0;
+	desc->length = RxDescChain;
+	desc->buffer1 = 0;
+	desc->data1 = 0;
+	return;
+}
+/**
+  * Initialize the rx descriptors for chain mode of operation.
+  * 	- Status field is initialized to 0.
+  *	- EndOfRing set for the last descriptor.
+  *	- buffer1 and buffer2 set to 0.
+  *	- data1 and data2 set to 0.
+  * @param[in] pointer to DmaDesc structure.
+  * @param[in] whether end of ring
+  * \return void.
+  */
+void synopGMAC_tx_desc_init_chain(DmaDesc * desc)
+{
+	#ifdef ENH_DESC
+	desc->status = TxDescChain;
+	desc->length = 0;
+	#else
+	desc->length = TxDescChain;
+	#endif
+	desc->buffer1 = 0;
+	desc->data1 = 0;
+	return;
+}
+
+
+s32 synopGMAC_init_tx_rx_desc_queue(synopGMACdevice *gmacdev)
+{
+	s32 i;
+	for(i =0; i < gmacdev -> TxDescCount; i++){
+	synopGMAC_tx_desc_init_ring(gmacdev->TxDesc + i, i == gmacdev->TxDescCount-1);
+	}
+	TR("At line %d\n",__LINE__);
+	for(i =0; i < gmacdev -> RxDescCount; i++){
+	synopGMAC_rx_desc_init_ring(gmacdev->RxDesc + i, i == gmacdev->RxDescCount-1);
+	}
+	
+	gmacdev->TxNext = 0;
+	gmacdev->TxBusy = 0;
+	gmacdev->RxNext = 0;
+	gmacdev->RxBusy = 0;
+	
+	return -ESYNOPGMACNOERR;
+}
+/**
+  * Programs the DmaRxBaseAddress with the Rx descriptor base address.
+  * Rx Descriptor's base address is available in the gmacdev structure. This function progrms the 
+  * Dma Rx Base address with the starting address of the descriptor ring or chain.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_init_rx_desc_base(synopGMACdevice *gmacdev)
+{
+	synopGMACWriteReg((u32 *)gmacdev->DmaBase,DmaRxBaseAddr,(u32)gmacdev->RxDescDma);
+	return;
+}
+
+/**
+  * Programs the DmaTxBaseAddress with the Tx descriptor base address.
+  * Tx Descriptor's base address is available in the gmacdev structure. This function progrms the 
+  * Dma Tx Base address with the starting address of the descriptor ring or chain.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_init_tx_desc_base(synopGMACdevice *gmacdev)
+{
+	synopGMACWriteReg((u32 *)gmacdev->DmaBase,DmaTxBaseAddr,(u32)gmacdev->TxDescDma);
+	return;
+}
+
+
+/** 
+  * Makes the Dma as owner for this descriptor.
+  * This function sets the own bit of status field of the DMA descriptor,
+  * indicating the DMA is the owner for this descriptor. 
+  * @param[in] pointer to DmaDesc structure.
+  * \return returns void.
+  */
+void synopGMAC_set_owner_dma(DmaDesc *desc)
+{
+desc->status |=  DescOwnByDma;
+}
+
+/** 
+  * set tx descriptor to indicate SOF.
+  * This Descriptor contains the start of ethernet frame.
+  * @param[in] pointer to DmaDesc structure.
+  * \return returns void.
+  */
+void synopGMAC_set_desc_sof(DmaDesc *desc)
+{
+#ifdef ENH_DESC
+desc->status |= DescTxFirst;//ENH_DESC
+#else
+desc->length |= DescTxFirst;
+#endif
+
+}
+
+/** 
+  * set tx descriptor to indicate EOF.
+  * This descriptor contains the End of ethernet frame.
+  * @param[in] pointer to DmaDesc structure.
+  * \return returns void.
+  */
+void synopGMAC_set_desc_eof(DmaDesc *desc)
+{
+#ifdef ENH_DESC
+desc->status |= DescTxLast;//ENH_DESC
+#else
+desc->length |= DescTxLast;
+#endif
+}
+
+
+/** 
+  * checks whether this descriptor contains start of frame.
+  * This function is to check whether the descriptor's data buffer 
+  * contains a fresh ethernet frame?
+  * @param[in] pointer to DmaDesc structure.
+  * \return returns true if SOF in current descriptor, else returns fail.
+  */
+bool synopGMAC_is_sof_in_rx_desc(DmaDesc *desc)
+{
+return ((desc->status & DescRxFirst) == DescRxFirst);                      
+}
+
+/** 
+  * checks whether this descriptor contains end of frame.
+  * This function is to check whether the descriptor's data buffer 
+  * contains end of ethernet frame?
+  * @param[in] pointer to DmaDesc structure.
+  * \return returns true if SOF in current descriptor, else returns fail.
+  */
+bool synopGMAC_is_eof_in_rx_desc(DmaDesc *desc)
+{
+return ((desc->status & DescRxLast) == DescRxLast);                      
+}
+
+/** 
+  * checks whether destination address filter failed in the rx frame.
+  * @param[in] pointer to DmaDesc structure.
+  * \return returns true if Failed, false if not.
+  */
+bool synopGMAC_is_da_filter_failed(DmaDesc *desc)
+{
+return ((desc->status & DescDAFilterFail) == DescDAFilterFail);                      
+}
+
+/** 
+  * checks whether source address filter failed in the rx frame.
+  * @param[in] pointer to DmaDesc structure.
+  * \return returns true if Failed, false if not.
+  */
+bool synopGMAC_is_sa_filter_failed(DmaDesc *desc)
+{
+return ((desc->status & DescSAFilterFail) == DescSAFilterFail);                      
+}
+
+/** 
+  * Checks whether the descriptor is owned by DMA.
+  * If descriptor is owned by DMA then the OWN bit is set to 1. This API is same for both ring and chain mode.
+  * @param[in] pointer to DmaDesc structure.
+  * \return returns true if Dma owns descriptor and false if not.
+  */
+bool synopGMAC_is_desc_owned_by_dma(DmaDesc *desc)
+{
+return ((desc->status & DescOwnByDma) == DescOwnByDma );
+}
+
+/**
+  * returns the byte length of received frame including CRC.
+  * This returns the no of bytes received in the received ethernet frame including CRC(FCS).
+  * @param[in] pointer to DmaDesc structure.
+  * \return returns the length of received frame lengths in bytes.
+  */
+u32 synopGMAC_get_rx_desc_frame_length(u32 status)
+{
+	return ((status & DescFrameLengthMask) >> DescFrameLengthShift);
+}
+
+/**
+  * Checks whether the descriptor is valid
+  * if no errors such as CRC/Receive Error/Watchdog Timeout/Late collision/Giant Frame/Overflow/Descriptor
+  * error the descritpor is said to be a valid descriptor.
+  * @param[in] pointer to DmaDesc structure.
+  * \return True if desc valid. false if error.
+  */
+bool synopGMAC_is_desc_valid(u32 status)
+{
+	return ((status & DescError) == 0);
+}
+
+/**
+  * Checks whether the descriptor is empty.
+  * If the buffer1 and buffer2 lengths are zero in ring mode descriptor is empty.
+  * In chain mode buffer2 length is 0 but buffer2 itself contains the next descriptor address.
+  * @param[in] pointer to DmaDesc structure.
+  * \return returns true if descriptor is empty, false if not empty.
+  */
+bool synopGMAC_is_desc_empty(DmaDesc *desc)
+{
+	//if both the buffer1 length and buffer2 length are zero desc is empty
+	return(((desc->length  & DescSize1Mask) == 0) && ((desc->length  & DescSize2Mask) == 0) );
+}
+
+
+/**
+  * Checks whether the rx descriptor is valid.
+  * if rx descripor is not in error and complete frame is available in the same descriptor
+  * @param[in] pointer to DmaDesc structure.
+  * \return returns true if no error and first and last desc bits are set, otherwise it returns false.
+  */
+bool synopGMAC_is_rx_desc_valid(u32 status)
+{
+	return ((status & DescError) == 0) && ((status & DescRxFirst) == DescRxFirst) && ((status & DescRxLast) == DescRxLast);
+}
+
+/**
+  * Checks whether the tx is aborted due to collisions.
+  * @param[in] pointer to DmaDesc structure.
+  * \return returns true if collisions, else returns false.
+  */
+bool synopGMAC_is_tx_aborted(u32 status)
+{
+	return (((status & DescTxLateCollision) == DescTxLateCollision) | ((status & DescTxExcCollisions) == DescTxExcCollisions));
+
+}
+
+/**
+  * Checks whether the tx carrier error.
+  * @param[in] pointer to DmaDesc structure.
+  * \return returns true if carrier error occured, else returns falser.
+  */
+bool synopGMAC_is_tx_carrier_error(u32 status)
+{
+	return (((status & DescTxLostCarrier) == DescTxLostCarrier)  | ((status & DescTxNoCarrier) == DescTxNoCarrier));
+}
+
+
+/**
+  * Gives the transmission collision count.
+  * returns the transmission collision count indicating number of collisions occured before the frame was transmitted.
+  * Make sure to check excessive collision didnot happen to ensure the count is valid.
+  * @param[in] pointer to DmaDesc structure.
+  * \return returns the count value of collision.
+  */
+u32 synopGMAC_get_tx_collision_count(u32 status)
+{
+	return ((status & DescTxCollMask) >> DescTxCollShift);
+}
+u32 synopGMAC_is_exc_tx_collisions(u32 status)
+{
+	return ((status & DescTxExcCollisions) == DescTxExcCollisions);
+}
+
+
+/**
+  * Check for damaged frame due to overflow or collision.
+  * Retruns true if rx frame was damaged due to buffer overflow in MTL or late collision in half duplex mode.
+  * @param[in] pointer to DmaDesc structure.
+  * \return returns true if error else returns false.
+  */
+bool synopGMAC_is_rx_frame_damaged(u32 status)
+{
+//bool synopGMAC_dma_rx_collisions(u32 status)
+	return (((status & DescRxDamaged) == DescRxDamaged) | ((status & DescRxCollision) == DescRxCollision));
+}
+
+/**
+  * Check for damaged frame due to collision.
+  * Retruns true if rx frame was damaged due to late collision in half duplex mode.
+  * @param[in] pointer to DmaDesc structure.
+  * \return returns true if error else returns false.
+  */
+bool synopGMAC_is_rx_frame_collision(u32 status)
+{
+//bool synopGMAC_dma_rx_collisions(u32 status)
+	return ((status & DescRxCollision) == DescRxCollision);
+}
+
+/**
+  * Check for receive CRC error.
+  * Retruns true if rx frame CRC error occured.
+  * @param[in] pointer to DmaDesc structure.
+  * \return returns true if error else returns false.
+  */
+bool synopGMAC_is_rx_crc(u32 status)
+{
+//u32 synopGMAC_dma_rx_crc(u32 status)
+	return ((status & DescRxCrc) == DescRxCrc);
+}
+
+/**
+  * Indicates rx frame has non integer multiple of bytes. (odd nibbles).
+  * Retruns true if dribbling error in rx frame.
+  * @param[in] pointer to DmaDesc structure.
+  * \return returns true if error else returns false.
+  */
+bool synopGMAC_is_frame_dribbling_errors(u32 status)
+{
+//u32 synopGMAC_dma_rx_frame_errors(u32 status)
+	return ((status & DescRxDribbling) == DescRxDribbling);
+}
+
+/**
+  * Indicates error in rx frame length.
+  * Retruns true if received frame length doesnot match with the length field
+  * @param[in] pointer to DmaDesc structure.
+  * \return returns true if error else returns false.
+  */
+bool synopGMAC_is_rx_frame_length_errors(u32 status)
+{
+//u32 synopGMAC_dma_rx_length_errors(u32 status)
+	return((status & DescRxLengthError) == DescRxLengthError);
+}
+
+/**
+  * Checks whether this rx descriptor is last rx descriptor.
+  * This returns true if it is last descriptor either in ring mode or in chain mode.
+  * @param[in] pointer to devic structure.
+  * @param[in] pointer to DmaDesc structure.
+  * \return returns true if it is last descriptor, false if not.
+  * \note This function should not be called before initializing the descriptor using synopGMAC_desc_init().
+  */
+bool synopGMAC_is_last_rx_desc(synopGMACdevice * gmacdev,DmaDesc *desc)
+{
+//bool synopGMAC_is_last_desc(DmaDesc *desc)
+return (((desc->length & RxDescEndOfRing) == RxDescEndOfRing) || ((u64)gmacdev->RxDesc == desc->data2));
+}
+
+/**
+  * Checks whether this tx descriptor is last tx descriptor.
+  * This returns true if it is last descriptor either in ring mode or in chain mode.
+  * @param[in] pointer to devic structure.
+  * @param[in] pointer to DmaDesc structure.
+  * \return returns true if it is last descriptor, false if not.
+  * \note This function should not be called before initializing the descriptor using synopGMAC_desc_init().
+  */
+bool synopGMAC_is_last_tx_desc(synopGMACdevice * gmacdev,DmaDesc *desc)
+{
+//bool synopGMAC_is_last_desc(DmaDesc *desc)
+#ifdef ENH_DESC
+	return (((desc->status & TxDescEndOfRing) == TxDescEndOfRing) || ((u64)gmacdev->TxDesc == desc->data2));
+#else
+	return (((desc->length & TxDescEndOfRing) == TxDescEndOfRing) || ((u64)gmacdev->TxDesc == desc->data2));
+#endif
+}
+
+/**
+  * Checks whether this rx descriptor is in chain mode.
+  * This returns true if it is this descriptor is in chain mode.
+  * @param[in] pointer to DmaDesc structure.
+  * \return returns true if chain mode is set, false if not.
+  */
+bool synopGMAC_is_rx_desc_chained(DmaDesc * desc)
+{
+	return((desc->length & RxDescChain) == RxDescChain);             
+}
+
+/**
+  * Checks whether this tx descriptor is in chain mode.
+  * This returns true if it is this descriptor is in chain mode.
+  * @param[in] pointer to DmaDesc structure.
+  * \return returns true if chain mode is set, false if not.
+  */
+bool synopGMAC_is_tx_desc_chained(DmaDesc * desc)
+{
+#ifdef ENH_DESC
+	return((desc->status & TxDescChain) == TxDescChain);             
+#else
+	return((desc->length & TxDescChain) == TxDescChain);             
+#endif
+}
+
+/**
+  * Driver Api to get the descriptor field information.
+  * This returns the status, dma-able address of buffer1, the length of buffer1, virtual address of buffer1
+  * dma-able address of buffer2, length of buffer2, virtural adddress of buffer2.
+  * @param[in]  pointer to DmaDesc structure.
+  * @param[out] pointer to status field fo descriptor.
+  * @param[out] dma-able address of buffer1.
+  * @param[out] length of buffer1.
+  * @param[out] virtual address of buffer1.
+  * @param[out] dma-able address of buffer2.
+  * @param[out] length of buffer2.
+  * @param[out] virtual address of buffer2.
+  * \return returns void.
+  */
+void synopGMAC_get_desc_data(DmaDesc * desc, u32 * Status, dma_addr_t * Buffer1, u32 * Length1, u64 * Data1, dma_addr_t * Buffer2, u32 * Length2, u64 * Data2)
+{
+
+	if(Status != 0)   
+		*Status = desc->status;
+
+	if(Buffer1 != 0)
+		*Buffer1 = desc->buffer1;
+	if(Length1 != 0)
+		*Length1 = (desc->length & DescSize1Mask) >> DescSize1Shift;
+	if(Data1 != 0)
+		*Data1 = desc->data1;
+
+	if(Buffer2 != 0)
+		*Buffer2 = desc->buffer2;
+	if(Length2 != 0)
+		*Length2 = (desc->length & DescSize2Mask) >> DescSize2Shift;
+	if(Data1 != 0)
+		*Data2 = desc->data2;
+	
+	return;
+
+}
+
+#ifdef ENH_DESC_8W
+/**
+  * This function is defined two times. Once when the code is compiled for ENHANCED DESCRIPTOR SUPPORT and Once for Normal descriptor
+  * Get the index and address of Tx desc.
+  * This api is same for both ring mode and chain mode.
+  * This function tracks the tx descriptor the DMA just closed after the transmission of data from this descriptor is 
+  * over. This returns the descriptor fields to the caller.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[out] status field of the descriptor.
+  * @param[out] Dma-able buffer1 pointer.
+  * @param[out] length of buffer1 (Max is 2048).
+  * @param[out] virtual pointer for buffer1.
+  * @param[out] Dma-able buffer2 pointer.
+  * @param[out] length of buffer2 (Max is 2048).
+  * @param[out] virtual pointer for buffer2.
+  * @param[out] u32 data indicating whether the descriptor is in ring mode or chain mode.
+  * \return returns present tx descriptor index on success. Negative value if error.
+  */
+s32 synopGMAC_get_tx_qptr(synopGMACdevice * gmacdev, u32 * Status, u32 * Buffer1, u32 * Length1, u64 * Data1, u32 * Buffer2, u32 * Length2, u64 * Data2,
+                          u32 * Ext_Status, u32 * Time_Stamp_High, u32 * Time_Stamp_Low)
+{
+	u32  txover      = gmacdev->TxBusy;
+	DmaDesc * txdesc = gmacdev->TxBusyDesc;
+	
+	if(synopGMAC_is_desc_owned_by_dma(txdesc))
+		return -1;
+	if(synopGMAC_is_desc_empty(txdesc))
+		return -1;
+
+	(gmacdev->BusyTxDesc)--; //busy tx descriptor is reduced by one as it will be handed over to Processor now
+
+	if(Status != 0)   
+		*Status = txdesc->status;
+
+	if(Ext_Status != 0)
+		*Ext_Status = txdesc->extstatus;
+        if(Time_Stamp_High != 0)
+		*Time_Stamp_High = txdesc->timestamphigh; 
+        if(Time_Stamp_Low != 0)
+		*Time_Stamp_High = txdesc->timestamplow; 
+
+	if(Buffer1 != 0)
+		*Buffer1 = txdesc->buffer1;
+	if(Length1 != 0)
+		*Length1 = (txdesc->length & DescSize1Mask) >> DescSize1Shift;
+	if(Data1 != 0)
+		*Data1 = txdesc->data1;
+
+	if(Buffer2 != 0)
+		*Buffer2 = txdesc->buffer2;
+	if(Length2 != 0)
+		*Length2 = (txdesc->length & DescSize2Mask) >> DescSize2Shift;
+	if(Data1 != 0)
+		*Data2 = txdesc->data2;
+
+	gmacdev->TxBusy     = synopGMAC_is_last_tx_desc(gmacdev,txdesc) ? 0 : txover + 1;
+
+	if(synopGMAC_is_tx_desc_chained(txdesc)){
+	   	gmacdev->TxBusyDesc = (DmaDesc *)txdesc->data2;
+		synopGMAC_tx_desc_init_chain(txdesc);
+	}
+	else{
+		gmacdev->TxBusyDesc = synopGMAC_is_last_tx_desc(gmacdev,txdesc) ? gmacdev->TxDesc : (txdesc + 1);
+		synopGMAC_tx_desc_init_ring(txdesc, synopGMAC_is_last_tx_desc(gmacdev,txdesc));
+	}
+	TR("%02d %08x %08x %08x %08x %08x %08x %08x\n",txover,(u32)txdesc,txdesc->status,txdesc->length,txdesc->buffer1,txdesc->buffer2,txdesc->data1,txdesc->data2);
+
+	return txover;	
+}
+#else
+
+/**
+  * Get the index and address of Tx desc.
+  * This api is same for both ring mode and chain mode.
+  * This function tracks the tx descriptor the DMA just closed after the transmission of data from this descriptor is 
+  * over. This returns the descriptor fields to the caller.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[out] status field of the descriptor.
+  * @param[out] Dma-able buffer1 pointer.
+  * @param[out] length of buffer1 (Max is 2048).
+  * @param[out] virtual pointer for buffer1.
+  * @param[out] Dma-able buffer2 pointer.
+  * @param[out] length of buffer2 (Max is 2048).
+  * @param[out] virtual pointer for buffer2.
+  * @param[out] u32 data indicating whether the descriptor is in ring mode or chain mode.
+  * \return returns present tx descriptor index on success. Negative value if error.
+  */
+s32 synopGMAC_get_tx_qptr(synopGMACdevice * gmacdev, u32 * Status, u32 * Buffer1, u32 * Length1, u64 * Data1, u32 * Buffer2, u32 * Length2, u64 * Data2 )
+{
+	u32  txover      = gmacdev->TxBusy;
+	DmaDesc * txdesc = gmacdev->TxBusyDesc;
+	
+	if(synopGMAC_is_desc_owned_by_dma(txdesc))
+		return -1;
+	if(synopGMAC_is_desc_empty(txdesc))
+		return -1;
+
+	(gmacdev->BusyTxDesc)--; //busy tx descriptor is reduced by one as it will be handed over to Processor now
+
+	if(Status != 0)   
+		*Status = txdesc->status;
+
+	if(Buffer1 != 0)
+		*Buffer1 = txdesc->buffer1;
+	if(Length1 != 0)
+		*Length1 = (txdesc->length & DescSize1Mask) >> DescSize1Shift;
+	if(Data1 != 0)
+		*Data1 = txdesc->data1;
+
+	if(Buffer2 != 0)
+		*Buffer2 = txdesc->buffer2;
+	if(Length2 != 0)
+		*Length2 = (txdesc->length & DescSize2Mask) >> DescSize2Shift;
+	if(Data1 != 0)
+		*Data2 = txdesc->data2;
+
+	gmacdev->TxBusy     = synopGMAC_is_last_tx_desc(gmacdev,txdesc) ? 0 : txover + 1;
+
+	if(synopGMAC_is_tx_desc_chained(txdesc)){
+	   	gmacdev->TxBusyDesc = (DmaDesc *)txdesc->data2;
+		synopGMAC_tx_desc_init_chain(txdesc);
+	}
+	else{
+		gmacdev->TxBusyDesc = synopGMAC_is_last_tx_desc(gmacdev,txdesc) ? gmacdev->TxDesc : (txdesc + 1);
+		synopGMAC_tx_desc_init_ring(txdesc, synopGMAC_is_last_tx_desc(gmacdev,txdesc));
+	}
+	TR("%02d %p %08x %08x %08x %08x %lx %lx\n",txover,txdesc,txdesc->status,txdesc->length,txdesc->buffer1,txdesc->buffer2,txdesc->data1,txdesc->data2);
+
+	return txover;	
+}
+
+#endif
+/**
+  * Populate the tx desc structure with the buffer address.
+  * Once the driver has a packet ready to be transmitted, this function is called with the 
+  * valid dma-able buffer addresses and their lengths. This function populates the descriptor
+  * and make the DMA the owner for the descriptor. This function also controls whetther Checksum
+  * offloading to be done in hardware or not. 
+  * This api is same for both ring mode and chain mode.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] Dma-able buffer1 pointer.
+  * @param[in] length of buffer1 (Max is 2048).
+  * @param[in] virtual pointer for buffer1.
+  * @param[in] Dma-able buffer2 pointer.
+  * @param[in] length of buffer2 (Max is 2048).
+  * @param[in] virtual pointer for buffer2.
+  * @param[in] u32 data indicating whether the descriptor is in ring mode or chain mode.
+  * @param[in] u32 indicating whether the checksum offloading in HW/SW.
+  * \return returns present tx descriptor index on success. Negative value if error.
+  */
+s32 synopGMAC_set_tx_qptr(synopGMACdevice * gmacdev, u32 Buffer1, u32 Length1, u64 Data1, u32 Buffer2, u32 Length2, u64 Data2,u32 offload_needed)
+{
+	u32  txnext      = gmacdev->TxNext;
+	DmaDesc * txdesc = gmacdev->TxNextDesc;
+	if(!synopGMAC_is_desc_empty(txdesc))
+		return -1;
+
+	(gmacdev->BusyTxDesc)++; //busy tx descriptor is reduced by one as it will be handed over to Processor now
+	
+	if(synopGMAC_is_tx_desc_chained(txdesc)){
+		txdesc->length |= ((Length1 <<DescSize1Shift) & DescSize1Mask);
+		#ifdef ENH_DESC
+		txdesc->status |=  (DescTxFirst | DescTxLast | DescTxIntEnable); //ENH_DESC
+		#else
+		txdesc->length |=  (DescTxFirst | DescTxLast | DescTxIntEnable); //Its always assumed that complete data will fit in to one descriptor
+		#endif
+
+	 	txdesc->buffer1 = Buffer1;
+		txdesc->data1 = Data1;
+
+	if(offload_needed){
+		/*
+		 Make sure that the OS you are running supports the IP and TCP checkusm offloaidng,
+		 before calling any of the functions given below.		 
+		 */
+		synopGMAC_tx_checksum_offload_ipv4hdr(gmacdev, txdesc);
+		synopGMAC_tx_checksum_offload_tcponly(gmacdev, txdesc);
+//		synopGMAC_tx_checksum_offload_tcp_pseudo(gmacdev, txdesc);
+	}
+		#ifdef ENH_DESC
+		txdesc->status |= DescOwnByDma;//ENH_DESC
+		#else
+		txdesc->status = DescOwnByDma;
+		#endif
+
+		gmacdev->TxNext = synopGMAC_is_last_tx_desc(gmacdev,txdesc) ? 0 : txnext + 1;
+	   	gmacdev->TxNextDesc = (DmaDesc *)txdesc->data2;
+	}
+	else{
+		txdesc->length |= (((Length1 <<DescSize1Shift) & DescSize1Mask) | ((Length2 <<DescSize2Shift) & DescSize2Mask));
+		#ifdef ENH_DESC
+		txdesc->status |=  (DescTxFirst | DescTxLast | DescTxIntEnable); //ENH_DESC
+		#else
+		txdesc->length |=  (DescTxFirst | DescTxLast | DescTxIntEnable); //Its always assumed that complete data will fit in to one descriptor
+		#endif
+
+	 	txdesc->buffer1 = Buffer1;
+		txdesc->data1 = Data1;
+
+	 	txdesc->buffer2 = Buffer2;
+		txdesc->data2 = Data2;
+
+		if(offload_needed){
+		/*
+		 Make sure that the OS you are running supports the IP and TCP checkusm offloaidng,
+		 before calling any of the functions given below.		 
+		 */
+		synopGMAC_tx_checksum_offload_ipv4hdr(gmacdev, txdesc);
+		synopGMAC_tx_checksum_offload_tcponly(gmacdev, txdesc);
+//		synopGMAC_tx_checksum_offload_tcp_pseudo(gmacdev, txdesc);
+		}
+		#ifdef ENH_DESC	
+		txdesc->status |= DescOwnByDma;//ENH_DESC
+		#else
+		txdesc->status = DescOwnByDma;
+		#endif
+
+		gmacdev->TxNext = synopGMAC_is_last_tx_desc(gmacdev,txdesc) ? 0 : txnext + 1;
+		gmacdev->TxNextDesc = synopGMAC_is_last_tx_desc(gmacdev,txdesc) ? gmacdev->TxDesc : (txdesc + 1);
+	}
+
+
+	TR("%02d %p %08x %08x %08x %08x %lx %lx\n",txnext,txdesc,txdesc->status,txdesc->length,txdesc->buffer1,txdesc->buffer2,txdesc->data1,txdesc->data2);
+	return txnext;	
+}
+#ifdef ENH_DESC_8W
+/**
+  * Prepares the descriptor to receive packets.
+  * The descriptor is allocated with the valid buffer addresses (sk_buff address) and the length fields
+  * and handed over to DMA by setting the ownership. After successful return from this function the
+  * descriptor is added to the receive descriptor pool/queue.
+  * This api is same for both ring mode and chain mode.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] Dma-able buffer1 pointer.
+  * @param[in] length of buffer1 (Max is 2048).
+  * @param[in] Dma-able buffer2 pointer.
+  * @param[in] length of buffer2 (Max is 2048).
+  * @param[in] u32 data indicating whether the descriptor is in ring mode or chain mode.
+  * \return returns present rx descriptor index on success. Negative value if error.
+  */
+s32 synopGMAC_set_rx_qptr(synopGMACdevice * gmacdev, u32 Buffer1, u32 Length1, u64 Data1, u32 Buffer2, u32 Length2, u64 Data2)
+{
+	u32  rxnext      = gmacdev->RxNext;
+	DmaDesc * rxdesc = gmacdev->RxNextDesc;
+
+	if(!synopGMAC_is_desc_empty(rxdesc))
+		return -1;
+
+
+	if(synopGMAC_is_rx_desc_chained(rxdesc)){
+		rxdesc->length |= ((Length1 <<DescSize1Shift) & DescSize1Mask);
+
+		rxdesc->buffer1 = Buffer1;
+		rxdesc->data1 = Data1;
+
+		rxdesc->extstatus = 0;
+		rxdesc->reserved1 = 0;
+		rxdesc->timestamplow = 0;
+		rxdesc->timestamphigh = 0;
+
+		if((rxnext % MODULO_INTERRUPT) !=0)
+		rxdesc->length |= RxDisIntCompl;		
+  
+		rxdesc->status = DescOwnByDma;
+
+		gmacdev->RxNext     = synopGMAC_is_last_rx_desc(gmacdev,rxdesc) ? 0 : rxnext + 1;
+	   	gmacdev->RxNextDesc = (DmaDesc *)rxdesc->data2;
+	}
+	else{
+		rxdesc->length |= (((Length1 <<DescSize1Shift) & DescSize1Mask) | ((Length2 << DescSize2Shift) & DescSize2Mask));
+
+		rxdesc->buffer1 = Buffer1;
+		rxdesc->data1 = Data1;
+
+		rxdesc->extstatus = 0;
+		rxdesc->reserved1 = 0;
+		rxdesc->timestamplow = 0;
+		rxdesc->timestamphigh = 0;
+
+		rxdesc->buffer2 = Buffer2;
+		rxdesc->data2 = Data2;
+	
+		if((rxnext % MODULO_INTERRUPT) !=0)
+		rxdesc->length |= RxDisIntCompl;		
+
+		rxdesc->status = DescOwnByDma;
+
+		gmacdev->RxNext     = synopGMAC_is_last_rx_desc(gmacdev,rxdesc) ? 0 : rxnext + 1;
+		gmacdev->RxNextDesc = synopGMAC_is_last_rx_desc(gmacdev,rxdesc) ? gmacdev->RxDesc : (rxdesc + 1);
+	}
+	TR("%02d %p %08x %08x %08x %08x %lx %lx\n",rxnext,rxdesc,rxdesc->status,rxdesc->length,rxdesc->buffer1,rxdesc->buffer2,rxdesc->data1,rxdesc->data2);
+
+	(gmacdev->BusyRxDesc)++; //One descriptor will be given to Hardware. So busy count incremented by one
+	return rxnext;
+}
+
+#else
+/**
+  * Prepares the descriptor to receive packets.
+  * The descriptor is allocated with the valid buffer addresses (sk_buff address) and the length fields
+  * and handed over to DMA by setting the ownership. After successful return from this function the
+  * descriptor is added to the receive descriptor pool/queue.
+  * This api is same for both ring mode and chain mode.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] Dma-able buffer1 pointer.
+  * @param[in] length of buffer1 (Max is 2048).
+  * @param[in] Dma-able buffer2 pointer.
+  * @param[in] length of buffer2 (Max is 2048).
+  * @param[in] u32 data indicating whether the descriptor is in ring mode or chain mode.
+  * \return returns present rx descriptor index on success. Negative value if error.
+  */
+s32 synopGMAC_set_rx_qptr(synopGMACdevice * gmacdev, u32 Buffer1, u32 Length1, u64 Data1, u32 Buffer2, u32 Length2, u64 Data2)
+{
+	u32  rxnext      = gmacdev->RxNext;
+	DmaDesc * rxdesc = gmacdev->RxNextDesc;
+
+	TR("<0>synopGMAC_set_rx_qptr length=%x\n", rxdesc->length );
+	if(!synopGMAC_is_desc_empty(rxdesc))
+        {
+        TR("not empty\n");
+		return -1;
+        }
+
+	if(synopGMAC_is_rx_desc_chained(rxdesc)){
+		rxdesc->length |= ((Length1 <<DescSize1Shift) & DescSize1Mask);
+
+		rxdesc->buffer1 = Buffer1;
+		rxdesc->data1 = Data1;
+
+		if((rxnext % MODULO_INTERRUPT) !=0)
+		rxdesc->length |= RxDisIntCompl;		
+
+		rxdesc->status = DescOwnByDma;
+
+		gmacdev->RxNext     = synopGMAC_is_last_rx_desc(gmacdev,rxdesc) ? 0 : rxnext + 1;
+	   	gmacdev->RxNextDesc = (DmaDesc *)rxdesc->data2;
+	}
+	else{
+		rxdesc->length |= (((Length1 <<DescSize1Shift) & DescSize1Mask) | ((Length2 << DescSize2Shift) & DescSize2Mask));
+
+		rxdesc->buffer1 = Buffer1;
+		rxdesc->data1 = Data1;
+
+		rxdesc->buffer2 = Buffer2;
+		rxdesc->data2 = Data2;
+	
+		if((rxnext % MODULO_INTERRUPT) !=0)
+		rxdesc->length |= RxDisIntCompl;		
+
+		rxdesc->status = DescOwnByDma;
+
+		gmacdev->RxNext     = synopGMAC_is_last_rx_desc(gmacdev,rxdesc) ? 0 : rxnext + 1;
+		gmacdev->RxNextDesc = synopGMAC_is_last_rx_desc(gmacdev,rxdesc) ? gmacdev->RxDesc : (rxdesc + 1);
+                TR("<0>RxNext=%x,RxNextDesc=%p\n", gmacdev->RxNext,gmacdev->RxNextDesc);
+	}
+	TR("%02d %p %08x %08x %08x %08x %lx %lx\n",rxnext,rxdesc,rxdesc->status,rxdesc->length,rxdesc->buffer1,rxdesc->buffer2,rxdesc->data1,rxdesc->data2);
+	(gmacdev->BusyRxDesc)++; //One descriptor will be given to Hardware. So busy count incremented by one
+	return rxnext;
+}
+
+#endif
+#ifdef ENH_DESC_8W
+/**
+  * This function is defined two times. Once when the code is compiled for ENHANCED DESCRIPTOR SUPPORT and Once for Normal descriptor
+  * Get back the descriptor from DMA after data has been received.
+  * When the DMA indicates that the data is received (interrupt is generated), this function should be
+  * called to get the descriptor and hence the data buffers received. With successful return from this
+  * function caller gets the descriptor fields for processing. check the parameters to understand the 
+  * fields returned.`
+  * @param[in] pointer to synopGMACdevice.
+  * @param[out] pointer to hold the status of DMA.
+  * @param[out] Dma-able buffer1 pointer.
+  * @param[out] pointer to hold length of buffer1 (Max is 2048).
+  * @param[out] virtual pointer for buffer1.
+  * @param[out] Dma-able buffer2 pointer.
+  * @param[out] pointer to hold length of buffer2 (Max is 2048).
+  * @param[out] virtual pointer for buffer2.
+  * \return returns present rx descriptor index on success. Negative value if error.
+  */
+s32 synopGMAC_get_rx_qptr(synopGMACdevice * gmacdev, u32 * Status, u32 * Buffer1, u32 * Length1, u32 * Data1, u32 * Buffer2, u32 * Length2, u32 * Data2,
+                          u32 * Ext_Status, u32 * Time_Stamp_High, u32 * Time_Stamp_Low)
+{
+	u32 rxnext       = gmacdev->RxBusy;	// index of descriptor the DMA just completed. May be useful when data 
+						//is spread over multiple buffers/descriptors
+	DmaDesc * rxdesc = gmacdev->RxBusyDesc;
+	if(synopGMAC_is_desc_owned_by_dma(rxdesc))
+		return -1;
+	if(synopGMAC_is_desc_empty(rxdesc))
+		return -1;
+	
+
+	if(Status != 0)
+		*Status = rxdesc->status;// send the status of this descriptor
+
+	if(Ext_Status != 0)
+		*Ext_Status = rxdesc->extstatus;
+        if(Time_Stamp_High != 0)
+		*Time_Stamp_High = rxdesc->timestamphigh; 
+        if(Time_Stamp_Low != 0)
+		*Time_Stamp_Low = rxdesc->timestamplow; 
+
+	if(Length1 != 0)
+		*Length1 = (rxdesc->length & DescSize1Mask) >> DescSize1Shift;
+	if(Buffer1 != 0)
+		*Buffer1 = rxdesc->buffer1;
+	if(Data1 != 0)
+		*Data1 = rxdesc->data1;
+
+	if(Length2 != 0)
+		*Length2 = (rxdesc->length & DescSize2Mask) >> DescSize2Shift;
+	if(Buffer2 != 0)
+		*Buffer2 = rxdesc->buffer2;
+	if(Data1 != 0)
+		*Data2 = rxdesc->data2;
+
+	gmacdev->RxBusy     = synopGMAC_is_last_rx_desc(gmacdev,rxdesc) ? 0 : rxnext + 1;
+
+	if(synopGMAC_is_rx_desc_chained(rxdesc)){
+	   	gmacdev->RxBusyDesc = (DmaDesc *)rxdesc->data2;
+		synopGMAC_rx_desc_init_chain(rxdesc);
+		//synopGMAC_desc_init_chain(rxdesc, synopGMAC_is_last_rx_desc(gmacdev,rxdesc),0,0);
+	}
+	else{
+		gmacdev->RxBusyDesc = synopGMAC_is_last_rx_desc(gmacdev,rxdesc) ? gmacdev->RxDesc : (rxdesc + 1);
+		synopGMAC_rx_desc_init_ring(rxdesc, synopGMAC_is_last_rx_desc(gmacdev,rxdesc));
+	}
+	TR("%02d %08x %08x %08x %08x %08x %08x %08x\n",rxnext,(u32)rxdesc,rxdesc->status,rxdesc->length,rxdesc->buffer1,rxdesc->buffer2,rxdesc->data1,rxdesc->data2);
+	(gmacdev->BusyRxDesc)--; //busy tx descriptor is reduced by one as it will be handed over to Processor now
+	return(rxnext);
+
+}
+#else
+
+/**
+  * Get back the descriptor from DMA after data has been received.
+  * When the DMA indicates that the data is received (interrupt is generated), this function should be
+  * called to get the descriptor and hence the data buffers received. With successful return from this
+  * function caller gets the descriptor fields for processing. check the parameters to understand the 
+  * fields returned.`
+  * @param[in] pointer to synopGMACdevice.
+  * @param[out] pointer to hold the status of DMA.
+  * @param[out] Dma-able buffer1 pointer.
+  * @param[out] pointer to hold length of buffer1 (Max is 2048).
+  * @param[out] virtual pointer for buffer1.
+  * @param[out] Dma-able buffer2 pointer.
+  * @param[out] pointer to hold length of buffer2 (Max is 2048).
+  * @param[out] virtual pointer for buffer2.
+  * \return returns present rx descriptor index on success. Negative value if error.
+  */
+s32 synopGMAC_get_rx_qptr(synopGMACdevice * gmacdev, u32 * Status, u32 * Buffer1, u32 * Length1, u64 * Data1, u32 * Buffer2, u32 * Length2, u64 * Data2)
+{
+	u32 rxnext       = gmacdev->RxBusy;	// index of descriptor the DMA just completed. May be useful when data 
+						//is spread over multiple buffers/descriptors
+	DmaDesc * rxdesc = gmacdev->RxBusyDesc;
+        TR("rxdesc=%p\n",rxdesc);
+	if(synopGMAC_is_desc_owned_by_dma(rxdesc))
+        {
+                TR("by dma\n");
+		return -1;
+        }
+	if(synopGMAC_is_desc_empty(rxdesc))
+        {
+                TR("empty\n");
+		return -1;
+        }
+	
+
+	if(Status != 0)
+		*Status = rxdesc->status;// send the status of this descriptor
+
+	if(Length1 != 0)
+		*Length1 = (rxdesc->length & DescSize1Mask) >> DescSize1Shift;
+	if(Buffer1 != 0)
+		*Buffer1 = rxdesc->buffer1;
+	if(Data1 != 0)
+		*Data1 = rxdesc->data1;
+
+	if(Length2 != 0)
+		*Length2 = (rxdesc->length & DescSize2Mask) >> DescSize2Shift;
+	if(Buffer2 != 0)
+		*Buffer2 = rxdesc->buffer2;
+	if(Data1 != 0)
+		*Data2 = rxdesc->data2;
+
+	gmacdev->RxBusy     = synopGMAC_is_last_rx_desc(gmacdev,rxdesc) ? 0 : rxnext + 1;
+
+	if(synopGMAC_is_rx_desc_chained(rxdesc)){
+	   	gmacdev->RxBusyDesc = (DmaDesc *)rxdesc->data2;
+		synopGMAC_rx_desc_init_chain(rxdesc);
+		//synopGMAC_desc_init_chain(rxdesc, synopGMAC_is_last_rx_desc(gmacdev,rxdesc),0,0);
+	}
+	else{
+		gmacdev->RxBusyDesc = synopGMAC_is_last_rx_desc(gmacdev,rxdesc) ? gmacdev->RxDesc : (rxdesc + 1);
+		synopGMAC_rx_desc_init_ring(rxdesc, synopGMAC_is_last_rx_desc(gmacdev,rxdesc));
+	}
+	TR("%02d %p %08x %08x %08x %08x %lx %lx\n",rxnext,rxdesc,rxdesc->status,rxdesc->length,rxdesc->buffer1,rxdesc->buffer2,rxdesc->data1,rxdesc->data2);
+	(gmacdev->BusyRxDesc)--; //This returns one descriptor to processor. So busy count will be decremented by one
+
+	return(rxnext);
+
+}
+
+#endif
+
+/**
+  * Clears all the pending interrupts.
+  * If the Dma status register is read then all the interrupts gets cleared
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_clear_interrupt(synopGMACdevice *gmacdev)
+{
+	u32 data;
+	data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaStatus);
+	synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaStatus ,data);
+}
+
+/**
+  * Returns the all unmasked interrupt status after reading the DmaStatus register.
+  * @param[in] pointer to synopGMACdevice.
+  * \return 0 upon success. Error code upon failure.
+  */
+u32 synopGMAC_get_interrupt_type(synopGMACdevice *gmacdev)
+{
+	u32 data;
+	u32 interrupts = 0;
+	data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaStatus);
+	synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaStatus ,data); //manju: I think this is the appropriate location to clear the interrupts
+	TR("DMA status reg is  %08x\n",data);
+	if(data & DmaIntErrorMask)	interrupts |= synopGMACDmaError;
+	if(data & DmaIntRxNormMask)	interrupts |= synopGMACDmaRxNormal;
+	if(data & DmaIntRxAbnMask)	interrupts |= synopGMACDmaRxAbnormal;
+	if(data & DmaIntRxStoppedMask)	interrupts |= synopGMACDmaRxStopped;
+	if(data & DmaIntTxNormMask)	interrupts |= synopGMACDmaTxNormal;
+	if(data & DmaIntTxAbnMask)	interrupts |= synopGMACDmaTxAbnormal;
+	if(data & DmaIntTxStoppedMask)	interrupts |= synopGMACDmaTxStopped;
+
+	return interrupts;
+}
+
+/**
+  * Returns the interrupt mask.
+  * @param[in] pointer to synopGMACdevice.
+  * \return 0 upon success. Error code upon failure.
+  */
+u32 synopGMAC_get_interrupt_mask(synopGMACdevice *gmacdev)
+{
+	return(synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaInterrupt));
+}
+
+/**
+  * Enable all the interrupts.
+  * Enables the DMA interrupt as specified by the bit mask.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] bit mask of interrupts to be enabled.
+  * \return returns void.
+  */
+void synopGMAC_enable_interrupt(synopGMACdevice *gmacdev, u32 interrupts)
+{
+	synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaInterrupt, interrupts);
+	return;
+}
+
+
+/**
+  * Disable all the interrupts.
+  * Disables all DMA interrupts.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  * \note This function disabled all the interrupts, if you want to disable a particular interrupt then
+  *  use synopGMAC_disable_interrupt().
+  */
+void synopGMAC_disable_interrupt_all(synopGMACdevice *gmacdev)
+{
+	synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaInterrupt, DmaIntDisable);
+	return;
+}
+
+/**
+  * Disable interrupt according to the bitfield supplied.
+  * Disables only those interrupts specified in the bit mask in second argument.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] bit mask for interrupts to be disabled.
+  * \return returns void.
+  */
+void synopGMAC_disable_interrupt(synopGMACdevice *gmacdev, u32 interrupts)
+{
+	synopGMACClearBits((u32 *)gmacdev->DmaBase, DmaInterrupt, interrupts);
+	return;
+}
+/**
+  * Enable the DMA Reception.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_enable_dma_rx(synopGMACdevice * gmacdev)
+{
+//	synopGMACSetBits((u32 *)gmacdev->DmaBase, DmaControl, DmaRxStart);
+	u32 data;
+	data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaControl);
+  	data |= DmaRxStart; 
+	synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaControl ,data);
+
+}
+
+/**
+  * Enable the DMA Transmission.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_enable_dma_tx(synopGMACdevice * gmacdev)
+{
+//	synopGMACSetBits((u32 *)gmacdev->DmaBase, DmaControl, DmaTxStart);
+	u32 data;
+	data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaControl);
+  	data |= DmaTxStart; 
+	synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaControl ,data);
+
+}
+
+/**
+  * Resumes the DMA Transmission.
+  * the DmaTxPollDemand is written. (the data writeen could be anything).
+  * This forces the DMA to resume transmission.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_resume_dma_tx(synopGMACdevice * gmacdev)
+{
+	synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaTxPollDemand, 0);
+
+}
+/**
+  * Resumes the DMA Reception.
+  * the DmaRxPollDemand is written. (the data writeen could be anything).
+  * This forces the DMA to resume reception.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_resume_dma_rx(synopGMACdevice * gmacdev)
+{
+	synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaRxPollDemand, 0);
+
+}
+/**
+  * Take ownership of this Descriptor.
+  * The function is same for both the ring mode and the chain mode DMA structures.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_take_desc_ownership(DmaDesc * desc)
+{
+	if(desc){
+		desc->status &= ~DescOwnByDma;  //Clear the DMA own bit
+//		desc->status |= DescError;	// Set the error to indicate this descriptor is bad
+	}
+}
+
+/**
+  * Take ownership of all the rx Descriptors.
+  * This function is called when there is fatal error in DMA transmission.
+  * When called it takes the ownership of all the rx descriptor in rx descriptor pool/queue from DMA.
+  * The function is same for both the ring mode and the chain mode DMA structures.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  * \note Make sure to disable the transmission before calling this function, otherwise may result in racing situation.
+  */
+void synopGMAC_take_desc_ownership_rx(synopGMACdevice * gmacdev)
+{
+	s32 i;
+	DmaDesc *desc;
+	desc = gmacdev->RxDesc;
+	for(i = 0; i < gmacdev->RxDescCount; i++){
+		if(synopGMAC_is_rx_desc_chained(desc)){	//This descriptor is in chain mode
+	
+			synopGMAC_take_desc_ownership(desc);
+			desc = (DmaDesc *)desc->data2;
+		}
+		else{
+			synopGMAC_take_desc_ownership(desc + i);
+		}
+	}
+}
+
+/**
+  * Take ownership of all the rx Descriptors.
+  * This function is called when there is fatal error in DMA transmission.
+  * When called it takes the ownership of all the tx descriptor in tx descriptor pool/queue from DMA.
+  * The function is same for both the ring mode and the chain mode DMA structures.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  * \note Make sure to disable the transmission before calling this function, otherwise may result in racing situation.
+  */
+void synopGMAC_take_desc_ownership_tx(synopGMACdevice * gmacdev)
+{
+	s32 i;
+	DmaDesc *desc;
+	desc = gmacdev->TxDesc;
+	for(i = 0; i < gmacdev->TxDescCount; i++){
+		if(synopGMAC_is_tx_desc_chained(desc)){	//This descriptor is in chain mode
+			synopGMAC_take_desc_ownership(desc);
+			desc = (DmaDesc *)desc->data2;
+		}
+		else{
+			synopGMAC_take_desc_ownership(desc + i);
+		}
+	}
+	
+}
+
+/**
+  * Disable the DMA for Transmission.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+
+void synopGMAC_disable_dma_tx(synopGMACdevice * gmacdev)
+{	
+//	synopGMACClearBits((u32 *)gmacdev->DmaBase, DmaControl, DmaTxStart);
+	u32 data;
+	data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaControl);
+  	data &= (~DmaTxStart); 
+	synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaControl ,data);
+}
+/**
+  * Disable the DMA for Reception.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_disable_dma_rx(synopGMACdevice * gmacdev)
+{	
+//	synopGMACClearBits((u32 *)gmacdev->DmaBase, DmaControl, DmaRxStart);
+	u32 data;
+	data = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaControl);
+  	data &= (~DmaRxStart); 
+	synopGMACWriteReg((u32 *)gmacdev->DmaBase, DmaControl ,data);
+}
+
+
+	
+/*******************PMT APIs***************************************/
+
+
+
+
+/**
+  * Enables the assertion of PMT interrupt.
+  * This enables the assertion of PMT interrupt due to Magic Pkt or Wakeup frame
+  * reception.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_pmt_int_enable(synopGMACdevice *gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase,GmacInterruptMask,GmacPmtIntMask); 
+        return;
+}
+/**
+  * Disables the assertion of PMT interrupt.
+  * This disables the assertion of PMT interrupt due to Magic Pkt or Wakeup frame
+  * reception.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_pmt_int_disable(synopGMACdevice *gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase,GmacInterruptMask,GmacPmtIntMask); 
+        return;
+}
+/**
+  * Enables the power down mode of GMAC.
+  * This function puts the Gmac in power down mode.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_power_down_enable(synopGMACdevice *gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase,GmacPmtCtrlStatus,GmacPmtPowerDown);	
+	return;
+}
+/**
+  * Disables the powerd down setting of GMAC.
+  * If the driver wants to bring up the GMAC from powerdown mode, even though the magic packet or the
+  * wake up frames received from the network, this function should be called.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_power_down_disable(synopGMACdevice *gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase,GmacPmtCtrlStatus,GmacPmtPowerDown);	
+	return;
+}
+/**
+  * Enables the pmt interrupt generation in powerdown mode.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_enable_pmt_interrupt(synopGMACdevice *gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase,GmacInterruptMask,GmacPmtIntMask);	
+}
+/**
+  * Disables the pmt interrupt generation in powerdown mode.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_disable_pmt_interrupt(synopGMACdevice *gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase,GmacInterruptMask,GmacPmtIntMask);	
+}
+/**
+  * Enables GMAC to look for Magic packet.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_magic_packet_enable(synopGMACdevice *gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase,GmacPmtCtrlStatus,GmacPmtMagicPktEnable);	
+	return;
+}
+
+/**
+  * Enables GMAC to look for wake up frame. 
+  * Wake up frame is defined by the user.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_wakeup_frame_enable(synopGMACdevice *gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase,GmacPmtCtrlStatus,GmacPmtWakeupFrameEnable);	
+	return;
+}
+
+/**
+  * Enables wake-up frame filter to handle unicast packets.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_pmt_unicast_enable(synopGMACdevice *gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase,GmacPmtCtrlStatus,GmacPmtGlobalUnicast);	
+	return;
+}
+/**
+  * Checks whether the packet received is a magic packet?.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns True if magic packet received else returns false.
+  */
+bool synopGMAC_is_magic_packet_received(synopGMACdevice *gmacdev)
+{
+	u32 data;
+	data = 	synopGMACReadReg((u32 *)gmacdev->MacBase,GmacPmtCtrlStatus);	
+	return((data & GmacPmtMagicPktReceived) == GmacPmtMagicPktReceived);
+}
+/**
+  * Checks whether the packet received is a wakeup frame?.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns true if wakeup frame received else returns false.
+  */
+bool synopGMAC_is_wakeup_frame_received(synopGMACdevice *gmacdev)
+{
+	u32 data;
+	data = 	synopGMACReadReg((u32 *)gmacdev->MacBase,GmacPmtCtrlStatus);	
+	return((data & GmacPmtWakeupFrameReceived) == GmacPmtWakeupFrameReceived);
+}
+
+/**
+  * Populates the remote wakeup frame registers.
+  * Consecutive 8 writes to GmacWakeupAddr writes the wakeup frame filter registers.
+  * Before commensing a new write, frame filter pointer is reset to 0x0000.
+  * A small delay is introduced to allow frame filter pointer reset operation.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] pointer to frame filter contents array.
+  * \return returns void.
+  */
+void synopGMAC_write_wakeup_frame_register(synopGMACdevice *gmacdev, u32 * filter_contents)
+{
+	s32 i;
+	synopGMACSetBits((u32 *)gmacdev->MacBase,GmacPmtCtrlStatus,GmacPmtFrmFilterPtrReset);
+	plat_delay(10);	
+	for(i =0; i<WAKEUP_REG_LENGTH; i++)
+		synopGMACWriteReg((u32 *)gmacdev->MacBase, GmacWakeupAddr,  *(filter_contents + i));
+	return;
+
+}
+/*******************PMT APIs***************************************/
+/*******************MMC APIs***************************************/
+
+/**
+  * Freezes the MMC counters.
+  * This function call freezes the MMC counters. None of the MMC counters are updated
+  * due to any tx or rx frames until synopGMAC_mmc_counters_resume is called.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_mmc_counters_stop(synopGMACdevice *gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase,GmacMmcCntrl,GmacMmcCounterFreeze);
+	return;
+}
+/**
+  * Resumes the MMC counter updation.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_mmc_counters_resume(synopGMACdevice *gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase,GmacMmcCntrl,GmacMmcCounterFreeze);
+	return;
+}
+/**
+  * Configures the MMC in Self clearing mode.
+  * Programs MMC interface so that counters are cleared when the counters are read.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_mmc_counters_set_selfclear(synopGMACdevice *gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase,GmacMmcCntrl,GmacMmcCounterResetOnRead);
+	return;
+}
+/**
+  * Configures the MMC in non-Self clearing mode.
+  * Programs MMC interface so that counters are cleared when the counters are read.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_mmc_counters_reset_selfclear(synopGMACdevice *gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase,GmacMmcCntrl,GmacMmcCounterResetOnRead);
+	return;
+}
+/**
+  * Configures the MMC to stop rollover.
+  * Programs MMC interface so that counters will not rollover after reaching maximum value.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_mmc_counters_disable_rollover(synopGMACdevice *gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase,GmacMmcCntrl,GmacMmcCounterStopRollover);
+	return;
+}
+/**
+  * Configures the MMC to rollover.
+  * Programs MMC interface so that counters will rollover after reaching maximum value.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_mmc_counters_enable_rollover(synopGMACdevice *gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase,GmacMmcCntrl,GmacMmcCounterStopRollover);
+	return;
+}
+
+/**
+  * Read the MMC Counter.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] the counter to be read.
+  * \return returns the read count value.
+  */
+u32 synopGMAC_read_mmc_counter(synopGMACdevice *gmacdev, u32 counter)
+{
+	return(	synopGMACReadReg((u32 *)gmacdev->MacBase,counter));
+}
+/**
+  * Read the MMC Rx interrupt status.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns the Rx interrupt status.
+  */
+u32 synopGMAC_read_mmc_rx_int_status(synopGMACdevice *gmacdev)
+{
+	return(	synopGMACReadReg((u32 *)gmacdev->MacBase,GmacMmcIntrRx));
+}
+/**
+  * Read the MMC Tx interrupt status.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns the Tx interrupt status.
+  */
+u32 synopGMAC_read_mmc_tx_int_status(synopGMACdevice *gmacdev)
+{
+	return(	synopGMACReadReg((u32 *)gmacdev->MacBase,GmacMmcIntrTx));
+}
+/**
+  * Disable the MMC Tx interrupt.
+  * The MMC tx interrupts are masked out as per the mask specified.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] tx interrupt bit mask for which interrupts needs to be disabled.
+  * \return returns void.
+  */
+void synopGMAC_disable_mmc_tx_interrupt(synopGMACdevice *gmacdev, u32 mask)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase,GmacMmcIntrMaskTx,mask);
+	return;
+}
+/**
+  * Enable the MMC Tx interrupt.
+  * The MMC tx interrupts are enabled as per the mask specified.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] tx interrupt bit mask for which interrupts needs to be enabled.
+  * \return returns void.
+  */
+void synopGMAC_enable_mmc_tx_interrupt(synopGMACdevice *gmacdev, u32 mask)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase,GmacMmcIntrMaskTx,mask);
+}
+/**
+  * Disable the MMC Rx interrupt.
+  * The MMC rx interrupts are masked out as per the mask specified.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] rx interrupt bit mask for which interrupts needs to be disabled.
+  * \return returns void.
+  */
+void synopGMAC_disable_mmc_rx_interrupt(synopGMACdevice *gmacdev, u32 mask)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase,GmacMmcIntrMaskRx,mask);
+	return;
+}
+/**
+  * Enable the MMC Rx interrupt.
+  * The MMC rx interrupts are enabled as per the mask specified.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] rx interrupt bit mask for which interrupts needs to be enabled.
+  * \return returns void.
+  */
+void synopGMAC_enable_mmc_rx_interrupt(synopGMACdevice *gmacdev, u32 mask)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase,GmacMmcIntrMaskRx,mask);
+	return;
+}
+/**
+  * Disable the MMC ipc rx checksum offload interrupt.
+  * The MMC ipc rx checksum offload interrupts are masked out as per the mask specified.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] rx interrupt bit mask for which interrupts needs to be disabled.
+  * \return returns void.
+  */
+void synopGMAC_disable_mmc_ipc_rx_interrupt(synopGMACdevice *gmacdev, u32 mask)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase,GmacMmcRxIpcIntrMask,mask);
+	return;
+}
+/**
+  * Enable the MMC ipc rx checksum offload interrupt.
+  * The MMC ipc rx checksum offload interrupts are enabled as per the mask specified.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] rx interrupt bit mask for which interrupts needs to be enabled.
+  * \return returns void.
+  */
+void synopGMAC_enable_mmc_ipc_rx_interrupt(synopGMACdevice *gmacdev, u32 mask)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase,GmacMmcRxIpcIntrMask,mask);
+	return;
+}
+/*******************MMC APIs***************************************/
+/*******************Ip checksum offloading APIs***************************************/
+
+/**
+  * Enables the ip checksum offloading in receive path.
+  * When set GMAC calculates 16 bit 1's complement of all received ethernet frame payload.
+  * It also checks IPv4 Header checksum is correct. GMAC core appends the 16 bit checksum calculated
+  * for payload of IP datagram and appends it to Ethernet frame transferred to the application.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_enable_rx_chksum_offload(synopGMACdevice *gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase,GmacConfig,GmacRxIpcOffload);
+	return;
+}
+/**
+  * Disable the ip checksum offloading in receive path.
+  * Ip checksum offloading is disabled in the receive path.
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_disable_rx_Ipchecksum_offload(synopGMACdevice *gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase,GmacConfig,GmacRxIpcOffload);
+}
+/**
+  * Instruct the DMA to drop the packets fails tcp ip checksum.
+  * This is to instruct the receive DMA engine to drop the recevied packet if they 
+  * fails the tcp/ip checksum in hardware. Valid only when full checksum offloading is enabled(type-2).
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_rx_tcpip_chksum_drop_enable(synopGMACdevice *gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->DmaBase,DmaControl,DmaDisableDropTcpCs);
+	return;
+}
+/**
+  * Instruct the DMA not to drop the packets even if it fails tcp ip checksum.
+  * This is to instruct the receive DMA engine to allow the packets even if recevied packet
+  * fails the tcp/ip checksum in hardware. Valid only when full checksum offloading is enabled(type-2).
+  * @param[in] pointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_rx_tcpip_chksum_drop_disable(synopGMACdevice *gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->DmaBase,DmaControl,DmaDisableDropTcpCs);
+	return;
+}
+
+/** 
+  * When the Enhanced Descriptor is enabled then the bit 0 of RDES0 indicates whether the
+  * Extended Status is available (RDES4). Time Stamp feature and the Checksum Offload Engine2
+  * makes use of this extended status to provide the status of the received packet.
+  * @param[in] pointer to synopGMACdevice
+  * \return returns TRUE or FALSE
+  */
+#ifdef ENH_DESC_8W
+
+/**
+  * This function indicates whether extended status is available in the RDES0.
+  * Any function which accesses the fields of extended status register must ensure a check on this has been made
+  * This is valid only for Enhanced Descriptor.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] u32 status field of the corresponding descriptor.
+  * \return returns TRUE or FALSE.
+  */
+bool synopGMAC_is_ext_status(synopGMACdevice *gmacdev,u32 status) 		      // extended status present indicates that the RDES4 need to be probed
+{
+	return((status & DescRxEXTsts ) != 0 ); // if extstatus set then it returns 1
+}
+/**
+  * This function returns true if the IP header checksum bit is set in the extended status.
+  * Valid only when enhaced status available is set in RDES0 bit 0.
+  * This is valid only for Enhanced Descriptor.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] u32 status field of the corresponding descriptor.
+  * \return returns TRUE or FALSE.
+  */
+bool synopGMAC_ES_is_IP_header_error(synopGMACdevice *gmacdev,u32 ext_status)          // IP header (IPV4) checksum error
+{
+	return((ext_status & DescRxIpHeaderError) != 0 ); // if IPV4 header error return 1
+}
+/**
+  * This function returns true if the Checksum is bypassed in the hardware.
+  * Valid only when enhaced status available is set in RDES0 bit 0.
+  * This is valid only for Enhanced Descriptor.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] u32 status field of the corresponding descriptor.
+  * \return returns TRUE or FALSE.
+  */
+bool synopGMAC_ES_is_rx_checksum_bypassed(synopGMACdevice *gmacdev,u32 ext_status)     // Hardware engine bypassed the checksum computation/checking
+{
+	return((ext_status & DescRxChkSumBypass ) != 0 ); // if checksum offloading bypassed return 1
+}
+/**
+  * This function returns true if payload checksum error is set in the extended status.
+  * Valid only when enhaced status available is set in RDES0 bit 0.
+  * This is valid only for Enhanced Descriptor.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] u32 status field of the corresponding descriptor.
+  * \return returns TRUE or FALSE.
+  */
+bool synopGMAC_ES_is_IP_payload_error(synopGMACdevice *gmacdev,u32 ext_status)         // IP payload checksum is in error (UDP/TCP/ICMP checksum error)
+{
+	return((ext_status & DescRxIpPayloadError) != 0 ); // if IP payload error return 1
+}
+#endif
+
+
+
+/**
+  * Decodes the Rx Descriptor status to various checksum error conditions.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] u32 status field of the corresponding descriptor.
+  * \return returns decoded enum (u32) indicating the status.
+  */
+u32 synopGMAC_is_rx_checksum_error(synopGMACdevice *gmacdev, u32 status)
+{
+	if     (((status & DescRxChkBit5) == 0) && ((status & DescRxChkBit7) == 0) && ((status & DescRxChkBit0) == 0))
+	return RxLenLT600;
+	else if(((status & DescRxChkBit5) == 0) && ((status & DescRxChkBit7) == 0) && ((status & DescRxChkBit0) != 0))
+	return RxIpHdrPayLoadChkBypass;
+	else if(((status & DescRxChkBit5) == 0) && ((status & DescRxChkBit7) != 0) && ((status & DescRxChkBit0) != 0))
+	return RxChkBypass;
+	else if(((status & DescRxChkBit5) != 0) && ((status & DescRxChkBit7) == 0) && ((status & DescRxChkBit0) == 0))
+	return RxNoChkError;
+	else if(((status & DescRxChkBit5) != 0) && ((status & DescRxChkBit7) == 0) && ((status & DescRxChkBit0) != 0))
+	return RxPayLoadChkError;
+	else if(((status & DescRxChkBit5) != 0) && ((status & DescRxChkBit7) != 0) && ((status & DescRxChkBit0) == 0))
+	return RxIpHdrChkError;
+	else if(((status & DescRxChkBit5) != 0) && ((status & DescRxChkBit7) != 0) && ((status & DescRxChkBit0) != 0))
+	return RxIpHdrPayLoadChkError;
+	else
+	return RxIpHdrPayLoadRes;
+}
+/**
+  * Checks if any Ipv4 header checksum error in the frame just transmitted.
+  * This serves as indication that error occureed in the IPv4 header checksum insertion.
+  * The sent out frame doesnot carry any ipv4 header checksum inserted by the hardware.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] u32 status field of the corresponding descriptor.
+  * \return returns true if error in ipv4 header checksum, else returns false.
+  */
+bool synopGMAC_is_tx_ipv4header_checksum_error(synopGMACdevice *gmacdev, u32 status)
+{
+	return((status & DescTxIpv4ChkError) == DescTxIpv4ChkError);
+}
+
+
+/**
+  * Checks if any payload checksum error in the frame just transmitted.
+  * This serves as indication that error occureed in the payload checksum insertion.
+  * The sent out frame doesnot carry any payload checksum inserted by the hardware.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] u32 status field of the corresponding descriptor.
+  * \return returns true if error in ipv4 header checksum, else returns false.
+  */
+bool synopGMAC_is_tx_payload_checksum_error(synopGMACdevice *gmacdev, u32 status)
+{
+	return((status & DescTxPayChkError) == DescTxPayChkError);
+}
+/**
+  * The check summ offload engine is bypassed in the tx path.
+  * Checksum is not computed in the Hardware.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] Pointer to tx descriptor for which  ointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_tx_checksum_offload_bypass(synopGMACdevice *gmacdev, DmaDesc *desc)
+{
+	#ifdef ENH_DESC
+	desc->status = (desc->length & (~DescTxCisMask));//ENH_DESC
+	#else
+	desc->length = (desc->length & (~DescTxCisMask));
+	#endif
+
+}
+/**
+  * The check summ offload engine is enabled to do only IPV4 header checksum.
+  * IPV4 header Checksum is computed in the Hardware.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] Pointer to tx descriptor for which  ointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_tx_checksum_offload_ipv4hdr(synopGMACdevice *gmacdev, DmaDesc *desc)
+{
+	#ifdef ENH_DESC
+	desc->status = ((desc->status & (~DescTxCisMask)) | DescTxCisIpv4HdrCs);//ENH_DESC
+	#else
+	desc->length = ((desc->length & (~DescTxCisMask)) | DescTxCisIpv4HdrCs);
+	#endif
+
+}
+
+/**
+  * The check summ offload engine is enabled to do TCPIP checsum assuming Pseudo header is available.
+  * Hardware computes the tcp ip checksum assuming pseudo header checksum is computed in software.
+  * Ipv4 header checksum is also inserted.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] Pointer to tx descriptor for which  ointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_tx_checksum_offload_tcponly(synopGMACdevice *gmacdev, DmaDesc *desc)
+{
+	#ifdef ENH_DESC
+	desc->status = ((desc->status & (~DescTxCisMask)) | DescTxCisTcpOnlyCs);//ENH_DESC
+	#else
+	desc->length = ((desc->length & (~DescTxCisMask)) | DescTxCisTcpOnlyCs);
+	#endif
+
+}
+/**
+  * The check summ offload engine is enabled to do complete checksum computation.
+  * Hardware computes the tcp ip checksum including the pseudo header checksum.
+  * Here the tcp payload checksum field should be set to 0000.
+  * Ipv4 header checksum is also inserted.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] Pointer to tx descriptor for which  ointer to synopGMACdevice.
+  * \return returns void.
+  */
+void synopGMAC_tx_checksum_offload_tcp_pseudo(synopGMACdevice *gmacdev, DmaDesc *desc)
+{
+	#ifdef ENH_DESC
+	desc->status = ((desc->length & (~DescTxCisMask)) | DescTxCisTcpPseudoCs);
+	#else
+	desc->length = ((desc->length & (~DescTxCisMask)) | DescTxCisTcpPseudoCs);
+	#endif
+
+}
+/*******************Ip checksum offloading APIs***************************************/
+
+
+
+
+
+/*******************IEEE 1588 Timestamping API***************************************/
+
+
+/*
+ * At this time the driver supports the IEEE time stamping feature when the Enhanced Descriptors are enabled.
+ * For normal descriptor and the IEEE time stamp (version 1), driver support is not proviced
+ * Please make sure you have enabled the Advanced timestamp feature in the hardware and the driver should
+ * be compiled with the ADV_TME_STAMP feature. 
+ * Some of the APIs provided here may not be valid for all configurations. Please make sure you call the
+ * API with due care.
+ */
+
+/**
+  * This function enables the timestamping. This enables the timestamping for transmit and receive frames.
+  * When disabled timestamp is not added to tx and receive frames and timestamp generator is suspended.
+  * @param[in] pointer to synopGMACdevice
+  * \return returns void
+  */
+void synopGMAC_TS_enable(synopGMACdevice *gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase,GmacTSControl,GmacTSENA);
+	return;
+}
+/**
+  * This function disables the timestamping. 
+  * When disabled timestamp is not added to tx and receive frames and timestamp generator is suspended.
+  * @param[in] pointer to synopGMACdevice
+  * \return returns void
+  */
+void synopGMAC_TS_disable(synopGMACdevice *gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase,GmacInterruptMask, GmacTSIntMask);
+	return;
+}
+
+
+/**
+  * Enable the interrupt to get timestamping interrupt. 
+  * This enables the host to get the interrupt when (1) system time is greater or equal to the 
+  * target time high and low register or (2) there is a overflow in th esecond register.
+  * @param[in] pointer to synopGMACdevice
+  * \return returns void
+  */
+void synopGMAC_TS_int_enable(synopGMACdevice *gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase,GmacInterruptMask,GmacPmtIntMask); 
+        return;
+}
+
+/**
+  * Disable the interrupt to get timestamping interrupt. 
+  * @param[in] pointer to synopGMACdevice
+  * \return returns void
+  */
+void synopGMAC_TS_int_disable(synopGMACdevice *gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase,GmacInterruptMask,GmacPmtIntMask); 
+        return;
+}
+
+/**
+  * Enable MAC address for PTP frame filtering. 
+  * When enabled, uses MAC address (apart from MAC address 0) to filter the PTP frames when
+  * PTP is sent directly over Ethernet.
+  * @param[in] pointer to synopGMACdevice
+  * \return returns void
+  */
+void synopGMAC_TS_mac_addr_filt_enable(synopGMACdevice *gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase,GmacTSControl,GmacTSENMACADDR);
+	return;
+}
+
+/**
+  * Disables MAC address for PTP frame filtering. 
+  * @param[in] pointer to synopGMACdevice
+  * \return returns void
+  */
+void synopGMAC_TS_mac_addr_filt_disable(synopGMACdevice *gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase,GmacTSControl,GmacTSENMACADDR);
+	return;
+}
+
+
+/**
+  * Selet the type of clock mode for PTP. 
+  * Please note to use one of the follwoing as the clk_type argument.
+  * GmacTSOrdClk		  = 0x00000000,	     00=> Ordinary clock
+  * GmacTSBouClk		  = 0x00010000,	     01=> Boundary clock
+  * GmacTSEtoEClk		  = 0x00020000,	     10=> End-to-End transparent clock
+  * GmacTSPtoPClk		  = 0x00030000,	     11=> P-to-P transparent clock
+  * @param[in] pointer to synopGMACdevice
+  * @param[in] u32 value representing one of the above clk value
+  * \return returns void
+  */
+void synopGMAC_TS_set_clk_type(synopGMACdevice *gmacdev, u32 clk_type)
+{
+	u32 clkval;
+	clkval = synopGMACReadReg((u32 *)gmacdev->MacBase,GmacTSControl); //set the mdc clock to the user defined value
+	clkval = clkval | clk_type;	   
+	synopGMACWriteReg((u32 *)gmacdev->MacBase,GmacTSControl,clkval);
+	return;
+}
+
+/**
+  * Enable Snapshot for messages relevant to Master. 
+  * When enabled, snapshot is taken for messages relevant to master mode only, else snapshot is taken for messages relevant 
+  * to slave node. 
+  * Valid only for Ordinary clock and Boundary clock
+  * Reserved when "Advanced Time Stamp" is not selected
+  * @param[in] pointer to synopGMACdevice
+  * \return returns void
+  */
+void synopGMAC_TS_master_enable(synopGMACdevice *gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase,GmacTSControl,GmacTSMSTRENA);
+	return;
+}
+/**
+  * Disable Snapshot for messages relevant to Master. 
+  * When disabled, snapshot is taken for messages relevant 
+  * to slave node. 
+  * Valid only for Ordinary clock and Boundary clock
+  * Reserved when "Advanced Time Stamp" is not selected
+  * @param[in] pointer to synopGMACdevice
+  * \return returns void
+  */
+void synopGMAC_TS_master_disable(synopGMACdevice *gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase,GmacTSControl,GmacTSMSTRENA);
+	return;
+}
+/**
+  * Enable Snapshot for Event messages. 
+  * When enabled, snapshot is taken for event messages only (SYNC, Delay_Req, Pdelay_Req or Pdelay_Resp)
+  * When disabled, snapshot is taken for all messages except Announce, Management and Signaling.
+  * Reserved when "Advanced Time Stamp" is not selected
+  * @param[in] pointer to synopGMACdevice
+  * \return returns void
+  */
+void synopGMAC_TS_event_enable(synopGMACdevice *gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase,GmacTSControl,GmacTSEVNTENA);
+	return;
+}
+/**
+  * Disable Snapshot for Event messages. 
+  * When disabled, snapshot is taken for all messages except Announce, Management and Signaling.
+  * Reserved when "Advanced Time Stamp" is not selected
+  * @param[in] pointer to synopGMACdevice
+  * \return returns void
+  */
+void synopGMAC_TS_event_disable(synopGMACdevice *gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase,GmacTSControl,GmacTSEVNTENA);
+	return;
+}
+
+/**
+  * Enable time stamp snapshot for IPV4 frames. 
+  * When enabled, time stamp snapshot is taken for IPV4 frames
+  * Reserved when "Advanced Time Stamp" is not selected
+  * @param[in] pointer to synopGMACdevice
+  * \return returns void
+  */
+void synopGMAC_TS_IPV4_enable(synopGMACdevice *gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase,GmacTSControl,GmacTSIPV4ENA);
+	return;
+}
+/**
+  * Disable time stamp snapshot for IPV4 frames. 
+  * When disabled, time stamp snapshot is not taken for IPV4 frames
+  * Reserved when "Advanced Time Stamp" is not selected
+  * @param[in] pointer to synopGMACdevice
+  * \return returns void
+  */
+void synopGMAC_TS_IPV4_disable(synopGMACdevice *gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase,GmacTSControl,GmacTSIPV4ENA);
+	return;
+}                    // Only for "Advanced Time Stamp"
+/**
+  * Enable time stamp snapshot for IPV6 frames. 
+  * When enabled, time stamp snapshot is taken for IPV6 frames
+  * Reserved when "Advanced Time Stamp" is not selected
+  * @param[in] pointer to synopGMACdevice
+  * \return returns void
+  */
+void synopGMAC_TS_IPV6_enable(synopGMACdevice *gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase,GmacTSControl,GmacTSIPV6ENA);
+	return;
+}
+/**
+  * Disable time stamp snapshot for IPV6 frames. 
+  * When disabled, time stamp snapshot is not taken for IPV6 frames
+  * Reserved when "Advanced Time Stamp" is not selected
+  * @param[in] pointer to synopGMACdevice
+  * \return returns void
+  */
+void synopGMAC_TS_IPV6_disable(synopGMACdevice *gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase,GmacTSControl,GmacTSIPV6ENA);
+	return;
+}
+
+/**
+  * Enable time stamp snapshot for PTP over Ethernet frames. 
+  * When enabled, time stamp snapshot is taken for PTP over Ethernet frames
+  * Reserved when "Advanced Time Stamp" is not selected
+  * @param[in] pointer to synopGMACdevice
+  * \return returns void
+  */
+void synopGMAC_TS_ptp_over_ethernet_enable(synopGMACdevice *gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase,GmacTSControl,GmacTSIPENA);
+	return;
+}
+/**
+  * Disable time stamp snapshot for PTP over Ethernet frames. 
+  * When disabled, time stamp snapshot is not taken for PTP over Ethernet frames
+  * Reserved when "Advanced Time Stamp" is not selected
+  * @param[in] pointer to synopGMACdevice
+  * \return returns void
+  */
+void synopGMAC_TS_ptp_over_ethernet_disable(synopGMACdevice *gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase,GmacTSControl,GmacTSIPENA);
+	return;
+}
+
+
+/**
+  * Snoop PTP packet for version 2 format 
+  * When set the PTP packets are snooped using the version 2 format.
+  * @param[in] pointer to synopGMACdevice
+  * \return returns void
+  */
+void synopGMAC_TS_pkt_snoop_ver2(synopGMACdevice *gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase,GmacTSControl,GmacTSVER2ENA);
+	return;
+}
+/**
+  * Snoop PTP packet for version 2 format 
+  * When set the PTP packets are snooped using the version 2 format.
+  * @param[in] pointer to synopGMACdevice
+  * \return returns void
+  */
+void synopGMAC_TS_pkt_snoop_ver1(synopGMACdevice *gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase,GmacTSControl,GmacTSVER2ENA);
+	return;
+}
+
+/**
+  * Timestamp digital rollover 
+  * When set the timestamp low register rolls over after 0x3B9A_C9FF value.
+  * @param[in] pointer to synopGMACdevice
+  * \return returns void
+  */
+void synopGMAC_TS_digital_rollover_enable(synopGMACdevice *gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase,GmacTSControl,GmacTSCTRLSSR);
+	return;
+}	
+/**
+  * Timestamp binary rollover 
+  * When set the timestamp low register rolls over after 0x7FFF_FFFF value.
+  * @param[in] pointer to synopGMACdevice
+  * \return returns void
+  */
+void synopGMAC_TS_binary_rollover_enable(synopGMACdevice *gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase,GmacTSControl,GmacTSCTRLSSR);
+	return;
+}
+/**
+  * Enable Time Stamp for All frames 
+  * When set the timestamp snap shot is enabled for all frames received by the core.
+  * Reserved when "Advanced Time Stamp" is not selected
+  * @param[in] pointer to synopGMACdevice
+  * \return returns void
+  */
+void synopGMAC_TS_all_frames_enable(synopGMACdevice *gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase,GmacTSControl,GmacTSENALL);
+	return;
+}
+/**
+  * Disable Time Stamp for All frames 
+  * When reset the timestamp snap shot is not enabled for all frames received by the core.
+  * Reserved when "Advanced Time Stamp" is not selected
+  * @param[in] pointer to synopGMACdevice
+  * \return returns void
+  */
+void synopGMAC_TS_all_frames_disable(synopGMACdevice *gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase,GmacTSControl,GmacTSENALL);
+	return;
+}
+/**
+  * Addend Register Update 
+  * This function loads the contents of Time stamp addend register with the supplied 32 value.
+  * This is reserved function when only coarse correction option is selected
+  * @param[in] pointer to synopGMACdevice
+  * @param[in] 32 bit addend value
+  * \return returns 0 for Success or else Failure
+  */
+s32 synopGMAC_TS_addend_update(synopGMACdevice *gmacdev, u32 addend_value)
+{
+	u32 loop_variable;
+        synopGMACWriteReg((u32 *)gmacdev->MacBase,GmacTSAddend,addend_value);// Load the addend_value in to Addend register
+        for(loop_variable = 0; loop_variable < DEFAULT_LOOP_VARIABLE; loop_variable++){ //Wait till the busy bit gets cleared with in a certain amount of time
+		if(!((synopGMACReadReg((u32 *)gmacdev->MacBase,GmacTSControl)) & GmacTSADDREG)){ // if it is cleared then break
+		break;
+		} 
+        plat_delay(DEFAULT_DELAY_VARIABLE);
+        }
+        if(loop_variable < DEFAULT_LOOP_VARIABLE)
+               synopGMACSetBits((u32 *)gmacdev->MacBase,GmacTSControl,GmacTSADDREG);
+        else{
+        TR("Error::: The TSADDREG bit is not getting cleared !!!!!!\n");
+	return -ESYNOPGMACPHYERR;
+        }
+return -ESYNOPGMACNOERR;
+
+}
+/**
+  * time stamp Update 
+  * This function updates (adds/subtracts) with the value specified in the Timestamp High Update and
+  * Timestamp Low Update register.
+  * @param[in] pointer to synopGMACdevice
+  * @param[in] Timestamp High Update value
+  * @param[in] Timestamp Low Update value
+  * \return returns 0 for Success or else Failure
+  */
+s32 synopGMAC_TS_timestamp_update(synopGMACdevice *gmacdev, u32 high_value, u32 low_value)
+{
+	u32 loop_variable;
+        synopGMACWriteReg((u32 *)gmacdev->MacBase,GmacTSHighUpdate,high_value);// Load the high value to Timestamp High register
+        synopGMACWriteReg((u32 *)gmacdev->MacBase,GmacTSLowUpdate,low_value);// Load the high value to Timestamp High register
+        for(loop_variable = 0; loop_variable < DEFAULT_LOOP_VARIABLE; loop_variable++){ //Wait till the busy bit gets cleared with in a certain amount of time
+		if(!((synopGMACReadReg((u32 *)gmacdev->MacBase,GmacTSControl)) & GmacTSUPDT)){ // if it is cleared then break
+		break;
+		} 
+        plat_delay(DEFAULT_DELAY_VARIABLE);
+        }
+        if(loop_variable < DEFAULT_LOOP_VARIABLE)
+               synopGMACSetBits((u32 *)gmacdev->MacBase,GmacTSControl,GmacTSUPDT);
+        else{
+        TR("Error::: The TSADDREG bit is not getting cleared !!!!!!\n");
+	return -ESYNOPGMACPHYERR;
+        }
+return -ESYNOPGMACNOERR;
+}
+
+/**
+  * time stamp Initialize 
+  * This function Loads/Initializes h the value specified in the Timestamp High Update and
+  * Timestamp Low Update register.
+  * @param[in] pointer to synopGMACdevice
+  * @param[in] Timestamp High Load value
+  * @param[in] Timestamp Low Load value
+  * \return returns 0 for Success or else Failure
+  */
+s32 synopGMAC_TS_timestamp_init(synopGMACdevice *gmacdev, u32 high_value, u32 low_value)
+{
+	u32 loop_variable;
+        synopGMACWriteReg((u32 *)gmacdev->MacBase,GmacTSHighUpdate,high_value);// Load the high value to Timestamp High register
+        synopGMACWriteReg((u32 *)gmacdev->MacBase,GmacTSLowUpdate,low_value);// Load the high value to Timestamp High register
+        for(loop_variable = 0; loop_variable < DEFAULT_LOOP_VARIABLE; loop_variable++){ //Wait till the busy bit gets cleared with in a certain amount of time
+		if(!((synopGMACReadReg((u32 *)gmacdev->MacBase,GmacTSControl)) & GmacTSINT)){ // if it is cleared then break
+		break;
+		} 
+        plat_delay(DEFAULT_DELAY_VARIABLE);
+        }
+        if(loop_variable < DEFAULT_LOOP_VARIABLE)
+               synopGMACSetBits((u32 *)gmacdev->MacBase,GmacTSControl,GmacTSINT);
+        else{
+        TR("Error::: The TSADDREG bit is not getting cleared !!!!!!\n");
+	return -ESYNOPGMACPHYERR;
+        }
+return -ESYNOPGMACNOERR;
+}
+
+/**
+  * Time Stamp Update Coarse 
+  * When reset the timestamp update is done using coarse method.
+  * @param[in] pointer to synopGMACdevice
+  * \return returns void
+  */
+void synopGMAC_TS_coarse_update(synopGMACdevice *gmacdev)
+{
+	synopGMACClearBits((u32 *)gmacdev->MacBase,GmacTSControl,GmacTSCFUPDT);
+	return;
+}
+/**
+  * Time Stamp Update Fine 
+  * When reset the timestamp update is done using Fine method.
+  * @param[in] pointer to synopGMACdevice
+  * \return returns void
+  */
+void synopGMAC_TS_fine_update(synopGMACdevice *gmacdev)
+{
+	synopGMACSetBits((u32 *)gmacdev->MacBase,GmacTSControl,GmacTSCFUPDT);
+	return;
+}
+
+/**
+  * Load the Sub Second Increment value in to Sub Second increment register 
+  * @param[in] pointer to synopGMACdevice
+  * \return returns void
+  */
+void synopGMAC_TS_subsecond_init(synopGMACdevice *gmacdev, u32 sub_sec_inc_value)
+{
+	synopGMACWriteReg((u32 *)gmacdev->MacBase,GmacTSSubSecIncr,(sub_sec_inc_value & GmacSSINCMsk));
+	return;
+}
+/**
+  * Reads the time stamp contents in to the respective pointers 
+  * These registers are readonly.
+  * This function returns the 48 bit time stamp assuming Version 2 timestamp with higher word is selected.
+  * @param[in] pointer to synopGMACdevice
+  * @param[in] pointer to hold 16 higher bit second register contents
+  * @param[in] pointer to hold 32 bit second register contents
+  * @param[in] pointer to hold 32 bit subnanosecond register contents
+  * \return returns void
+  * \note Please note that since the atomic access to the timestamp registers is not possible, 
+  *  the contents read may be different from the actual time stamp. 
+  */
+void synopGMAC_TS_read_timestamp(synopGMACdevice *gmacdev, u16 * higher_sec_val, u32 * sec_val, u32 *  sub_sec_val)
+{
+	* higher_sec_val = (u16)(synopGMACReadReg((u32 *)gmacdev->MacBase,GmacTSHighWord) & GmacTSHighWordMask);
+        * sec_val        = synopGMACReadReg((u32 *)gmacdev->MacBase,GmacTSHigh);
+        * sub_sec_val    = synopGMACReadReg((u32 *)gmacdev->MacBase,GmacTSLow);
+	return;
+}
+/**
+  * Loads the time stamp higher sec value from the value supplied 
+  * @param[in] pointer to synopGMACdevice
+  * @param[in] 16 higher bit second register contents passed as 32 bit value
+  * \return returns void
+  */
+void synopGMAC_TS_load_timestamp_higher_val(synopGMACdevice *gmacdev, u32 higher_sec_val)
+{
+	synopGMACWriteReg((u32 *)gmacdev->MacBase,GmacTSHighWord, (higher_sec_val & GmacTSHighWordMask));
+	return;
+}
+/**
+  * Reads the time stamp higher sec value to respective pointers 
+  * @param[in] pointer to synopGMACdevice
+  * @param[in] pointer to hold 16 higher bit second register contents
+  * \return returns void
+  */
+void synopGMAC_TS_read_timestamp_higher_val(synopGMACdevice *gmacdev, u16 * higher_sec_val)
+{
+	* higher_sec_val = (u16)(synopGMACReadReg((u32 *)gmacdev->MacBase,GmacTSHighWord) & GmacTSHighWordMask);
+	return;
+}
+/**
+  * Load the Target time stamp registers 
+  * This function Loads the target time stamp registers with the values proviced
+  * @param[in] pointer to synopGMACdevice
+  * @param[in] target Timestamp High value
+  * @param[in] target Timestamp Low  value
+  * \return returns 0 for Success or else Failure
+  */
+void synopGMAC_TS_load_target_timestamp(synopGMACdevice *gmacdev, u32 sec_val, u32 sub_sec_val)
+{
+	synopGMACWriteReg((u32 *)gmacdev->MacBase,GmacTSTargetTimeHigh,sec_val);
+	synopGMACWriteReg((u32 *)gmacdev->MacBase,GmacTSTargetTimeLow,sub_sec_val);
+	return;
+}
+/**
+  * Reads the Target time stamp registers 
+  * This function Loads the target time stamp registers with the values proviced
+  * @param[in] pointer to synopGMACdevice
+  * @param[in] pointer to hold target Timestamp High value
+  * @param[in] pointer to hold target Timestamp Low  value
+  * \return returns 0 for Success or else Failure
+  */
+void synopGMAC_TS_read_target_timestamp(synopGMACdevice *gmacdev, u32 * sec_val, u32 * sub_sec_val)
+{
+	* sec_val     = synopGMACReadReg((u32 *)gmacdev->MacBase,GmacTSTargetTimeHigh);
+	* sub_sec_val = synopGMACReadReg((u32 *)gmacdev->MacBase,GmacTSTargetTimeLow);
+	return;
+}
diff -uNra linux-3.0.82/drivers/net/loongson/gmac/synopGMAC_Dev.h linux-3.0.82x/drivers/net/loongson/gmac/synopGMAC_Dev.h
--- linux-3.0.82/drivers/net/loongson/gmac/synopGMAC_Dev.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/loongson/gmac/synopGMAC_Dev.h	2017-09-23 03:42:49.678676103 +0800
@@ -0,0 +1,1712 @@
+/**\file
+ * This file defines the function prototypes for the Synopsys GMAC device and the 
+ * Marvell 88E1011/88E1011S integrated 10/100/1000 Gigabit Ethernet Transceiver.
+ * Since the phy register mapping are standardised, the phy register map and the 
+ * bit definitions remain the same for other phy as well.
+ * This also defines some of the Ethernet related parmeters.
+ * \internal
+ *  -----------------------------REVISION HISTORY------------------------------------
+ * Synopsys			   01/Aug/2007				Created
+ */
+ 
+ 
+#ifndef SYNOP_GMAC_DEV_H
+#define SYNOP_GMAC_DEV_H 1
+
+#include "synopGMAC_plat.h"
+
+/*SynopGMAC can support up to 32 phys*/
+
+enum GMACPhyBase
+{
+	PHY0  = 0,			//The device can support 32 phys, but we use first phy only
+	PHY1  = 1,
+	PHY3  = 3,
+	PHY16 = 16,
+	PHY31 = 31,
+};
+
+#define DEFAULT_PHY_BASE PHY3		//We use First Phy 
+#define MACBASE 0x0000			// The Mac Base address offset is 0x0000
+#define DMABASE 0x1000			// Dma base address starts with an offset 0x1000
+
+
+//#define TRANSMIT_DESC_SIZE  256		//Tx Descriptors needed in the Descriptor pool/queue
+//#define RECEIVE_DESC_SIZE   256 	//Rx Descriptors needed in the Descriptor pool/queue
+#define TRANSMIT_DESC_SIZE  90	//Tx Descriptors needed in the Descriptor pool/queue
+#define RECEIVE_DESC_SIZE   90	//Rx Descriptors needed in the Descriptor pool/queue
+
+#define ETHERNET_HEADER             14	//6 byte Dest addr, 6 byte Src addr, 2 byte length/type
+#define ETHERNET_CRC                 4	//Ethernet CRC
+#define ETHERNET_EXTRA		     2  //Only God knows about this?????
+#define ETHERNET_PACKET_COPY	   250  // Maximum length when received data is copied on to a new skb  
+#define ETHERNET_PACKET_EXTRA	    18  // Preallocated length for the rx packets is MTU + ETHERNET_PACKET_EXTRA  
+#define VLAN_TAG		     4  //optional 802.1q VLAN Tag
+#define MIN_ETHERNET_PAYLOAD        46  //Minimum Ethernet payload size
+#define MAX_ETHERNET_PAYLOAD      1500  //Maximum Ethernet payload size
+#define JUMBO_FRAME_PAYLOAD       9000  //Jumbo frame payload size
+
+#define TX_BUF_SIZE        ETHERNET_HEADER + ETHERNET_CRC + MAX_ETHERNET_PAYLOAD + VLAN_TAG
+
+
+// This is the IP's phy address. This is unique address for every MAC in the universe
+#define DEFAULT_MAC_ADDRESS {0x00, 0x55, 0x7B, 0xB5, 0x7D, 0xF7}
+
+/*
+DMA Descriptor Structure
+The structure is common for both receive and transmit descriptors
+The descriptor is of 4 words, but our structrue contains 6 words where
+last two words are to hold the virtual address of the network buffer pointers
+for driver's use
+From the GMAC core release 3.50a onwards, the Enhanced Descriptor structure got changed.
+The descriptor (both transmit and receive) are of 8 words each rather the 4 words of normal 
+descriptor structure.
+Whenever IEEE 1588 Timestamping is enabled TX/RX DESC6 provides the lower 32 bits of Timestamp value and
+                                           TX/RX DESC7 provides the upper 32 bits of Timestamp value
+In addition to this whenever extended status bit is set (RX DESC0 bit 0), RX DESC4 contains the extended status information
+*/
+
+#define MODULO_INTERRUPT   1 // if it is set to 1, interrupt is available for all the descriptors or else interrupt is available only for 
+			     // descriptor whose index%MODULO_INTERRUPT is zero
+#ifdef ENH_DESC_8W
+typedef struct DmaDescStruct    
+{         
+  u32   status;         /* Status 									*/
+  u32   length;         /* Buffer 1  and Buffer 2 length 						*/
+  u32   buffer1;        /* Network Buffer 1 pointer (Dma-able) 							*/
+  u32   buffer2;        /* Network Buffer 2 pointer or next descriptor pointer (Dma-able)in chain structure 	*/
+  			/* This data below is used only by driver					*/
+  u32   extstatus;      /* Extended status of a Rx Descriptor                                           */
+  u32   reserved1;      /* Reserved word                                                                */
+  u32   timestamplow;   /* Lower 32 bits of the 64 bit timestamp value                                  */
+  u32   timestamphigh;  /* Higher 32 bits of the 64 bit timestamp value                                  */
+  u32   data1;          /* This holds virtual address of buffer1, not used by DMA  			*/
+  u32   data2;          /* This holds virtual address of buffer2, not used by DMA  			*/
+} DmaDesc;
+#else
+typedef struct DmaDescStruct    
+{                               
+  u32   status;         /* Status 									*/
+  u32   length;         /* Buffer 1  and Buffer 2 length 						*/
+  u32   buffer1;        /* Network Buffer 1 pointer (Dma-able) 							*/
+  u32   buffer2;        /* Network Buffer 2 pointer or next descriptor pointer (Dma-able)in chain structure 	*/
+  			/* This data below is used only by driver					*/
+  u64   data1;          /* This holds virtual address of buffer1, not used by DMA  			*/
+  u64   data2;          /* This holds virtual address of buffer2, not used by DMA  			*/
+} __attribute__((packed)) DmaDesc;
+#endif
+
+enum DescMode
+{
+	RINGMODE	= 0x00000001,
+	CHAINMODE	= 0x00000002,
+};
+
+enum BufferMode
+{
+	SINGLEBUF	= 0x00000001,
+	DUALBUF		= 0x00000002,
+};
+
+/* synopGMAC device data */
+
+typedef struct synopGMACDeviceStruct      
+{
+  void * MacBase; 		         /* base address of MAC registers         */
+  void * DmaBase;         		 /* base address of DMA registers         */
+  u32 PhyBase;          	 /* PHY device address on MII interface   */
+  u32 Version;	                 /* Gmac Revision version	          */		
+	
+
+  dma_addr_t TxDescDma;		 /* Dma-able address of first tx descriptor either in ring or chain mode, this is used by the GMAC device*/
+  dma_addr_t RxDescDma; 	 /* Dma-albe address of first rx descriptor either in ring or chain mode, this is used by the GMAC device*/ 
+  DmaDesc *TxDesc;               /* start address of TX descriptors ring or chain, this is used by the driver  */
+  DmaDesc *RxDesc;               /* start address of RX descriptors ring or chain, this is used by the driver  */
+
+  u32 BusyTxDesc;		 /* Number of Tx Descriptors owned by DMA at any given time*/  
+  u32 BusyRxDesc;		 /* Number of Rx Descriptors owned by DMA at any given time*/  
+  
+  u32  RxDescCount;              /* number of rx descriptors in the tx descriptor queue/pool */
+  u32  TxDescCount;              /* number of tx descriptors in the rx descriptor queue/pool */
+  
+  u32  TxBusy;                   /* index of the tx descriptor owned by DMA, is obtained by synopGMAC_get_tx_qptr()                */
+  u32  TxNext;                   /* index of the tx descriptor next available with driver, given to DMA by synopGMAC_set_tx_qptr() */
+  u32  RxBusy;                   /* index of the rx descriptor owned by DMA, obtained by synopGMAC_get_rx_qptr()                   */
+  u32  RxNext;                   /* index of the rx descriptor next available with driver, given to DMA by synopGMAC_set_rx_qptr() */
+
+  DmaDesc * TxBusyDesc;          /* Tx Descriptor address corresponding to the index TxBusy */
+  DmaDesc * TxNextDesc;          /* Tx Descriptor address corresponding to the index TxNext */
+  DmaDesc * RxBusyDesc;          /* Rx Descriptor address corresponding to the index TxBusy */
+  DmaDesc * RxNextDesc;          /* Rx Descriptor address corresponding to the index RxNext */
+
+  /*Phy related stuff*/
+  u32 ClockDivMdc;		/* Clock divider value programmed in the hardware           */
+  /* The status of the link */
+  u32 LinkState;		/* Link status as reported by the Marvel Phy                */
+  u32 DuplexMode;               /* Duplex mode of the Phy				    */
+  u32 Speed;			/* Speed of the Phy					    */
+  u32 LoopBackMode; 		/* Loopback status of the Phy				    */
+  
+} synopGMACdevice;
+
+
+
+/* Below is "88E1011/88E1011S Integrated 10/100/1000 Gigabit Ethernet Transceiver" 
+ * Register and their layouts. This Phy has been used in the Dot Aster GMAC Phy daughter.
+ * Since the Phy register map is standard, this map hardly changes to a different Ppy
+ */
+
+enum MiiRegisters
+{
+  PHY_CONTROL_REG           = 0x0000,		/*Control Register*/
+  PHY_STATUS_REG            = 0x0001,		/*Status Register */
+  PHY_ID_HI_REG             = 0x0002,		/*PHY Identifier High Register*/
+  PHY_ID_LOW_REG            = 0x0003,		/*PHY Identifier High Register*/
+  PHY_AN_ADV_REG            = 0x0004,		/*Auto-Negotiation Advertisement Register*/
+  PHY_LNK_PART_ABl_REG      = 0x0005,		/*Link Partner Ability Register (Base Page)*/
+  PHY_AN_EXP_REG            = 0x0006,		/*Auto-Negotiation Expansion Register*/
+  PHY_AN_NXT_PAGE_TX_REG    = 0x0007,		/*Next Page Transmit Register*/
+  PHY_LNK_PART_NXT_PAGE_REG = 0x0008,		/*Link Partner Next Page Register*/
+  PHY_1000BT_CTRL_REG       = 0x0009,		/*1000BASE-T Control Register*/
+  PHY_1000BT_STATUS_REG     = 0x000a,		/*1000BASE-T Status Register*/
+  PHY_SPECIFIC_CTRL_REG     = 0x0010,		/*Phy specific control register*/
+  PHY_SPECIFIC_STATUS_REG   = 0x0011,		/*Phy specific status register*/
+  PHY_INTERRUPT_ENABLE_REG  = 0x0012,		/*Phy interrupt enable register*/
+  PHY_INTERRUPT_STATUS_REG  = 0x0013,		/*Phy interrupt status register*/
+  PHY_EXT_PHY_SPC_CTRL	    = 0x0014,		/*Extended Phy specific control*/
+  PHY_RX_ERR_COUNTER	    = 0x0015,		/*Receive Error Counter*/
+  PHY_EXT_ADDR_CBL_DIAG     = 0x0016,		/*Extended address for cable diagnostic register*/
+  PHY_LED_CONTROL	    = 0x0018,		/*LED Control*/			
+  PHY_MAN_LED_OVERIDE       = 0x0019,		/*Manual LED override register*/
+  PHY_EXT_PHY_SPC_CTRL2     = 0x001a,		/*Extended Phy specific control 2*/
+  PHY_EXT_PHY_SPC_STATUS    = 0x001b,		/*Extended Phy specific status*/
+  PHY_CBL_DIAG_REG	    = 0x001c,		/*Cable diagnostic registers*/
+};
+
+
+/* This is Control register layout. Control register is of 16 bit wide.
+*/
+
+enum Mii_GEN_CTRL
+{		                      /*	Description	               bits	       R/W	default value  */
+	Mii_reset		 = 0x8000, 
+  	Mii_Speed_10   		 = 0x0000,   /* 10   Mbps                    6:13         	RW                      */
+	Mii_Speed_100   	 = 0x2000,   /* 100  Mbps                    6:13         	RW                      */
+	Mii_Speed_1000 		 = 0x0040,   /* 1000 Mbit/s                  6:13         	RW                      */
+
+	Mii_Duplex     		 = 0x0100,   /* Full Duplex mode             8               	RW                      */
+ 	
+	Mii_Manual_Master_Config = 0x0800,   /* Manual Master Config         11              	RW			*/
+	
+	Mii_Loopback   		 = 0x4000,   /* Enable Loop back             14              	RW                      */
+	Mii_NoLoopback 		 = 0x0000,   /* Enable Loop back             14              	RW                      */
+};
+
+enum Mii_Phy_Status
+{
+	Mii_phy_status_speed_10	 	= 0x0000,
+	Mii_phy_status_speed_100  	= 0x4000,
+	Mii_phy_status_speed_1000	= 0x8000,
+	
+	Mii_phy_status_full_duplex	= 0x2000,
+	Mii_phy_status_half_duplex	= 0x0000,
+	
+	Mii_phy_status_link_up		= 0x0400,
+};
+/* This is Status register layout. Status register is of 16 bit wide.
+*/
+enum Mii_GEN_STATUS
+{
+	Mii_AutoNegCmplt     = 0x0020,   /* Autonegotiation completed      5              RW                   */
+	Mii_Link             = 0x0004,   /* Link status                    2              RW                   */
+};
+
+enum Mii_Link_Status
+{
+	LINKDOWN	= 0,
+	LINKUP		= 1,
+};
+
+enum Mii_Duplex_Mode
+{
+	HALFDUPLEX = 1,
+	FULLDUPLEX = 2,
+};
+enum Mii_Link_Speed
+{
+	SPEED10     = 1,
+	SPEED100    = 2,
+	SPEED1000   = 3,
+};
+
+enum Mii_Loop_Back
+{
+	NOLOOPBACK  = 0,
+	LOOPBACK    = 1,
+};
+
+
+
+/**********************************************************
+ * GMAC registers Map
+ * For Pci based system address is BARx + GmacRegisterBase
+ * For any other system translation is done accordingly
+ **********************************************************/
+enum GmacRegisters              
+{
+  GmacConfig     	  = 0x0000,    /* Mac config Register                       */
+  GmacFrameFilter  	  = 0x0004,    /* Mac frame filtering controls              */
+  GmacHashHigh     	  = 0x0008,    /* Multi-cast hash table high                */
+  GmacHashLow      	  = 0x000C,    /* Multi-cast hash table low                 */
+  GmacGmiiAddr     	  = 0x0010,    /* GMII address Register(ext. Phy)           */
+  GmacGmiiData     	  = 0x0014,    /* GMII data Register(ext. Phy)              */
+  GmacFlowControl  	  = 0x0018,    /* Flow control Register                     */
+  GmacVlan         	  = 0x001C,    /* VLAN tag Register (IEEE 802.1Q)           */
+  
+  GmacVersion     	  = 0x0020,    /* GMAC Core Version Register                */ 
+  GmacWakeupAddr  	  = 0x0028,    /* GMAC wake-up frame filter adrress reg     */ 
+  GmacPmtCtrlStatus  	  = 0x002C,    /* PMT control and status register           */ 
+  
+  GmacInterruptStatus	  = 0x0038,    /* Mac Interrupt ststus register	       */  
+  GmacInterruptMask       = 0x003C,    /* Mac Interrupt Mask register	       */  
+ 
+  GmacAddr0High    	  = 0x0040,    /* Mac address0 high Register                */
+  GmacAddr0Low    	  = 0x0044,    /* Mac address0 low Register                 */
+  GmacAddr1High    	  = 0x0048,    /* Mac address1 high Register                */
+  GmacAddr1Low     	  = 0x004C,    /* Mac address1 low Register                 */
+  GmacAddr2High   	  = 0x0050,    /* Mac address2 high Register                */
+  GmacAddr2Low     	  = 0x0054,    /* Mac address2 low Register                 */
+  GmacAddr3High    	  = 0x0058,    /* Mac address3 high Register                */
+  GmacAddr3Low     	  = 0x005C,    /* Mac address3 low Register                 */
+  GmacAddr4High    	  = 0x0060,    /* Mac address4 high Register                */
+  GmacAddr4Low     	  = 0x0064,    /* Mac address4 low Register                 */
+  GmacAddr5High    	  = 0x0068,    /* Mac address5 high Register                */
+  GmacAddr5Low     	  = 0x006C,    /* Mac address5 low Register                 */
+  GmacAddr6High    	  = 0x0070,    /* Mac address6 high Register                */
+  GmacAddr6Low     	  = 0x0074,    /* Mac address6 low Register                 */
+  GmacAddr7High    	  = 0x0078,    /* Mac address7 high Register                */
+  GmacAddr7Low     	  = 0x007C,    /* Mac address7 low Register                 */
+  GmacAddr8High    	  = 0x0080,    /* Mac address8 high Register                */
+  GmacAddr8Low     	  = 0x0084,    /* Mac address8 low Register                 */
+  GmacAddr9High    	  = 0x0088,    /* Mac address9 high Register                */
+  GmacAddr9Low      	  = 0x008C,    /* Mac address9 low Register                 */
+  GmacAddr10High          = 0x0090,    /* Mac address10 high Register               */
+  GmacAddr10Low    	  = 0x0094,    /* Mac address10 low Register                */
+  GmacAddr11High   	  = 0x0098,    /* Mac address11 high Register               */
+  GmacAddr11Low    	  = 0x009C,    /* Mac address11 low Register                */
+  GmacAddr12High   	  = 0x00A0,    /* Mac address12 high Register               */
+  GmacAddr12Low     	  = 0x00A4,    /* Mac address12 low Register                */
+  GmacAddr13High   	  = 0x00A8,    /* Mac address13 high Register               */
+  GmacAddr13Low   	  = 0x00AC,    /* Mac address13 low Register                */
+  GmacAddr14High   	  = 0x00B0,    /* Mac address14 high Register               */
+  GmacAddr14Low        	  = 0x00B4,    /* Mac address14 low Register                */
+  GmacAddr15High     	  = 0x00B8,    /* Mac address15 high Register               */
+  GmacAddr15Low  	  = 0x00BC,    /* Mac address15 low Register                */
+  GmacStatus		  = 0x00d8,    /*MAC status*/
+
+  /*Time Stamp Register Map*/
+  GmacTSControl	          = 0x0700,  /* Controls the Timestamp update logic                         : only when IEEE 1588 time stamping is enabled in corekit            */
+
+  GmacTSSubSecIncr     	  = 0x0704,  /* 8 bit value by which sub second register is incremented     : only when IEEE 1588 time stamping without external timestamp input */
+
+  GmacTSHigh  	          = 0x0708,  /* 32 bit seconds(MS)                                          : only when IEEE 1588 time stamping without external timestamp input */
+  GmacTSLow   	          = 0x070C,  /* 32 bit nano seconds(MS)                                     : only when IEEE 1588 time stamping without external timestamp input */
+  
+  GmacTSHighUpdate        = 0x0710,  /* 32 bit seconds(MS) to be written/added/subtracted           : only when IEEE 1588 time stamping without external timestamp input */
+  GmacTSLowUpdate         = 0x0714,  /* 32 bit nano seconds(MS) to be writeen/added/subtracted      : only when IEEE 1588 time stamping without external timestamp input */
+  
+  GmacTSAddend            = 0x0718,  /* Used by Software to readjust the clock frequency linearly   : only when IEEE 1588 time stamping without external timestamp input */
+  
+  GmacTSTargetTimeHigh 	  = 0x071C,  /* 32 bit seconds(MS) to be compared with system time          : only when IEEE 1588 time stamping without external timestamp input */
+  GmacTSTargetTimeLow     = 0x0720,  /* 32 bit nano seconds(MS) to be compared with system time     : only when IEEE 1588 time stamping without external timestamp input */
+
+  GmacTSHighWord          = 0x0724,  /* Time Stamp Higher Word Register (Version 2 only); only lower 16 bits are valid                                                   */
+  //GmacTSHighWordUpdate    = 0x072C,  /* Time Stamp Higher Word Update Register (Version 2 only); only lower 16 bits are valid                                            */
+  
+  GmacTSStatus            = 0x0728,  /* Time Stamp Status Register                                                                                                       */
+};
+
+/**********************************************************
+ * GMAC Network interface registers
+ * This explains the Register's Layout
+ 
+ * FES is Read only by default and is enabled only when Tx 
+ * Config Parameter is enabled for RGMII/SGMII interface
+ * during CoreKit Config.
+ 
+ * DM is Read only with value 1'b1 in Full duplex only Config
+ **********************************************************/
+
+/* GmacConfig              = 0x0000,    Mac config Register  Layout */
+enum GmacConfigReg      
+{ 
+                                           /* Bit description                      Bits         R/W   Reset value  */
+  GmacWatchdog		   = 0x00800000,
+  GmacWatchdogDisable      = 0x00800000,     /* (WD)Disable watchdog timer on Rx      23           RW                */
+  GmacWatchdogEnable       = 0x00000000,     /* Enable watchdog timer                                        0       */
+
+  GmacJabber		   = 0x00400000,
+  GmacJabberDisable        = 0x00400000,     /* (JD)Disable jabber timer on Tx        22           RW                */
+  GmacJabberEnable         = 0x00000000,     /* Enable jabber timer                                          0       */
+
+  GmacFrameBurst           = 0x00200000,
+  GmacFrameBurstEnable     = 0x00200000,     /* (BE)Enable frame bursting during Tx   21           RW                */
+  GmacFrameBurstDisable    = 0x00000000,     /* Disable frame bursting                                       0       */
+  
+  GmacJumboFrame           = 0x00100000,
+  GmacJumboFrameEnable     = 0x00100000,     /* (JE)Enable jumbo frame for Tx         20           RW                */
+  GmacJumboFrameDisable    = 0x00000000,     /* Disable jumbo frame                                          0       */
+
+  GmacInterFrameGap7       = 0x000E0000,     /* (IFG) Config7 - 40 bit times          19:17        RW                */
+  GmacInterFrameGap6       = 0x000C0000,     /* (IFG) Config6 - 48 bit times                                         */
+  GmacInterFrameGap5       = 0x000A0000,     /* (IFG) Config5 - 56 bit times                                         */
+  GmacInterFrameGap4       = 0x00080000,     /* (IFG) Config4 - 64 bit times                                         */
+  GmacInterFrameGap3       = 0x00040000,     /* (IFG) Config3 - 72 bit times                                         */
+  GmacInterFrameGap2       = 0x00020000,     /* (IFG) Config2 - 80 bit times                                         */
+  GmacInterFrameGap1       = 0x00010000,     /* (IFG) Config1 - 88 bit times                                         */
+  GmacInterFrameGap0       = 0x00000000,     /* (IFG) Config0 - 96 bit times                                 000     */
+ 
+  GmacDisableCrs	   = 0x00010000, 
+  GmacMiiGmii		   = 0x00008000,
+  GmacSelectMii            = 0x00008000,     /* (PS)Port Select-MII mode              15           RW                */
+  GmacSelectGmii           = 0x00000000,     /* GMII mode                                                    0       */
+
+  GmacFESpeed100           = 0x00004000,     /*(FES)Fast Ethernet speed 100Mbps       14           RW                */ 
+  GmacFESpeed10            = 0x00000000,     /* 10Mbps                                                       0       */ 
+
+  GmacRxOwn		   = 0x00002000, 
+  GmacDisableRxOwn         = 0x00002000,     /* (DO)Disable receive own packets       13           RW                */
+  GmacEnableRxOwn          = 0x00000000,     /* Enable receive own packets                                   0       */
+  
+  GmacLoopback		   = 0x00001000,
+  GmacLoopbackOn           = 0x00001000,     /* (LM)Loopback mode for GMII/MII        12           RW                */
+  GmacLoopbackOff          = 0x00000000,     /* Normal mode                                                  0       */
+
+  GmacDuplex		   = 0x00000800,
+  GmacFullDuplex           = 0x00000800,     /* (DM)Full duplex mode                  11           RW                */
+  GmacHalfDuplex           = 0x00000000,     /* Half duplex mode                                             0       */
+
+  GmacRxIpcOffload	   = 0x00000400,     /*IPC checksum offload		      10           RW        0       */
+
+  GmacRetry		   = 0x00000200,
+  GmacRetryDisable         = 0x00000200,     /* (DR)Disable Retry                      9           RW                */
+  GmacRetryEnable          = 0x00000000,     /* Enable retransmission as per BL                              0       */
+
+  GmacLinkUp               = 0x00000100,     /* (LUD)Link UP                           8           RW                */ 
+  GmacLinkDown             = 0x00000100,     /* Link Down                                                    0       */ 
+  
+  GmacPadCrcStrip	   = 0x00000080,
+  GmacPadCrcStripEnable    = 0x00000080,     /* (ACS) Automatic Pad/Crc strip enable   7           RW                */
+  GmacPadCrcStripDisable   = 0x00000000,     /* Automatic Pad/Crc stripping disable                          0       */
+  
+  GmacBackoffLimit	   = 0x00000060,
+  GmacBackoffLimit3        = 0x00000060,     /* (BL)Back-off limit in HD mode          6:5         RW                */
+  GmacBackoffLimit2        = 0x00000040,     /*                                                                      */
+  GmacBackoffLimit1        = 0x00000020,     /*                                                                      */
+  GmacBackoffLimit0        = 0x00000000,     /*                                                              00      */
+
+  GmacDeferralCheck	   = 0x00000010,
+  GmacDeferralCheckEnable  = 0x00000010,     /* (DC)Deferral check enable in HD mode   4           RW                */
+  GmacDeferralCheckDisable = 0x00000000,     /* Deferral check disable                                       0       */
+   
+  GmacTx		   = 0x00000008,
+  GmacTxEnable             = 0x00000008,     /* (TE)Transmitter enable                 3           RW                */
+  GmacTxDisable            = 0x00000000,     /* Transmitter disable                                          0       */
+
+  GmacRx		   = 0x00000004,
+  GmacRxEnable             = 0x00000004,     /* (RE)Receiver enable                    2           RW                */
+  GmacRxDisable            = 0x00000000,     /* Receiver disable                                             0       */
+};
+
+/* GmacFrameFilter    = 0x0004,     Mac frame filtering controls Register Layout*/
+enum GmacFrameFilterReg 
+{
+  GmacFilter		   = 0x80000000,
+  GmacFilterOff            = 0x80000000,     /* (RA)Receive all incoming packets       31         RW                 */
+  GmacFilterOn             = 0x00000000,     /* Receive filtered packets only                                0       */
+
+  GmacHashPerfectFilter	   = 0x00000400,     /*Hash or Perfect Filter enable           10         RW         0       */
+
+  GmacSrcAddrFilter	   = 0x00000200,
+  GmacSrcAddrFilterEnable  = 0x00000200,     /* (SAF)Source Address Filter enable       9         RW                 */
+  GmacSrcAddrFilterDisable = 0x00000000,     /*                                                              0       */
+
+  GmacSrcInvaAddrFilter    = 0x00000100,
+  GmacSrcInvAddrFilterEn   = 0x00000100,     /* (SAIF)Inv Src Addr Filter enable        8         RW                 */
+  GmacSrcInvAddrFilterDis  = 0x00000000,     /*                                                              0       */
+
+  GmacPassControl	   = 0x000000C0,
+  GmacPassControl3         = 0x000000C0,     /* (PCS)Forwards ctrl frms that pass AF    7:6       RW                 */
+  GmacPassControl2         = 0x00000080,     /* Forwards all control frames                                          */
+  GmacPassControl1         = 0x00000040,     /* Does not pass control frames                                         */
+  GmacPassControl0         = 0x00000000,     /* Does not pass control frames                                 00      */
+
+  GmacBroadcast		   = 0x00000020,
+  GmacBroadcastDisable     = 0x00000020,     /* (DBF)Disable Rx of broadcast frames     5         RW                 */
+  GmacBroadcastEnable      = 0x00000000,     /* Enable broadcast frames                                      0       */
+
+  GmacMulticastFilter      = 0x00000010,
+  GmacMulticastFilterOff   = 0x00000010,     /* (PM) Pass all multicast packets         4         RW                 */
+  GmacMulticastFilterOn    = 0x00000000,     /* Pass filtered multicast packets                              0       */
+
+  GmacDestAddrFilter       = 0x00000008,
+  GmacDestAddrFilterInv    = 0x00000008,     /* (DAIF)Inverse filtering for DA          3         RW                 */
+  GmacDestAddrFilterNor    = 0x00000000,     /* Normal filtering for DA                                      0       */
+
+  GmacMcastHashFilter      = 0x00000004,
+  GmacMcastHashFilterOn    = 0x00000004,     /* (HMC)perfom multicast hash filtering    2         RW                 */
+  GmacMcastHashFilterOff   = 0x00000000,     /* perfect filtering only                                       0       */
+
+  GmacUcastHashFilter      = 0x00000002,
+  GmacUcastHashFilterOn    = 0x00000002,     /* (HUC)Unicast Hash filtering only        1         RW                 */
+  GmacUcastHashFilterOff   = 0x00000000,     /* perfect filtering only                                       0       */
+
+  GmacPromiscuousMode      = 0x00000001,
+  GmacPromiscuousModeOn    = 0x00000001,     /* Receive all frames                      0         RW                 */
+  GmacPromiscuousModeOff   = 0x00000000,     /* Receive filtered packets only                                0       */
+};
+
+ 
+/*GmacGmiiAddr             = 0x0010,    GMII address Register(ext. Phy) Layout          */
+enum GmacGmiiAddrReg      
+{
+  GmiiDevMask              = 0x0000F800,     /* (PA)GMII device address                 15:11     RW         0x00    */
+  GmiiDevShift             = 11,
+
+  GmiiRegMask              = 0x000007C0,     /* (GR)GMII register in selected Phy       10:6      RW         0x00    */
+  GmiiRegShift             = 6,
+  
+  GmiiCsrClkMask	   = 0x0000001C,     /*CSR Clock bit Mask			 4:2			     */
+  GmiiCsrClk5              = 0x00000014,     /* (CR)CSR Clock Range     250-300 MHz      4:2      RW         000     */
+  GmiiCsrClk4              = 0x00000010,     /*                         150-250 MHz                                  */
+  GmiiCsrClk3              = 0x0000000C,     /*                         35-60 MHz                                    */
+  GmiiCsrClk2              = 0x00000008,     /*                         20-35 MHz                                    */
+  GmiiCsrClk1              = 0x00000004,     /*                         100-150 MHz                                  */
+  GmiiCsrClk0              = 0x00000000,     /*                         60-100 MHz                                   */
+
+  GmiiWrite                = 0x00000002,     /* (GW)Write to register                      1      RW                 */
+  GmiiRead                 = 0x00000000,     /* Read from register                                            0      */
+
+  GmiiBusy                 = 0x00000001,     /* (GB)GMII interface is busy                 0      RW          0      */
+};
+
+/* GmacGmiiData            = 0x0014,    GMII data Register(ext. Phy) Layout             */
+enum GmacGmiiDataReg      
+{
+  GmiiDataMask             = 0x0000FFFF,     /* (GD)GMII Data                             15:0    RW         0x0000  */
+};
+
+
+/*GmacFlowControl    = 0x0018,    Flow control Register   Layout                  */
+enum GmacFlowControlReg  
+{                                          
+  GmacPauseTimeMask        = 0xFFFF0000,     /* (PT) PAUSE TIME field in the control frame  31:16   RW       0x0000  */
+  GmacPauseTimeShift       = 16,
+  
+  GmacPauseLowThresh	   = 0x00000030,
+  GmacPauseLowThresh3      = 0x00000030,     /* (PLT)thresh for pause tmr 256 slot time      5:4    RW               */
+  GmacPauseLowThresh2      = 0x00000020,     /*                           144 slot time                              */
+  GmacPauseLowThresh1      = 0x00000010,     /*                            28 slot time                              */
+  GmacPauseLowThresh0      = 0x00000000,     /*                             4 slot time                       000    */
+
+  GmacUnicastPauseFrame    = 0x00000008,
+  GmacUnicastPauseFrameOn  = 0x00000008,     /* (UP)Detect pause frame with unicast addr.     3    RW                */
+  GmacUnicastPauseFrameOff = 0x00000000,     /* Detect only pause frame with multicast addr.                   0     */
+
+  GmacRxFlowControl	   = 0x00000004,
+  GmacRxFlowControlEnable  = 0x00000004,     /* (RFE)Enable Rx flow control                   2    RW                */
+  GmacRxFlowControlDisable = 0x00000000,     /* Disable Rx flow control                                        0     */
+
+  GmacTxFlowControl   	   = 0x00000002,
+  GmacTxFlowControlEnable  = 0x00000002,     /* (TFE)Enable Tx flow control                   1    RW                */
+  GmacTxFlowControlDisable = 0x00000000,     /* Disable flow control                                           0     */
+
+  GmacFlowControlBackPressure= 0x00000001,
+  GmacSendPauseFrame       = 0x00000001,     /* (FCB/PBA)send pause frm/Apply back pressure   0    RW          0     */
+};
+
+/*  GmacInterruptStatus	  = 0x0038,     Mac Interrupt ststus register	       */  
+enum GmacInterruptStatusBitDefinition
+{
+  GmacTSIntSts		   = 0x00000200,    /* set if int generated due to TS (Read Time Stamp Status Register to know details)*/
+  GmacMmcRxChksumOffload   = 0x00000080,    /* set if int generated in MMC RX CHECKSUM OFFLOAD int register	                  */ 
+  GmacMmcTxIntSts	   = 0x00000040,    /* set if int generated in MMC TX Int register			   */
+  GmacMmcRxIntSts	   = 0x00000020,    /* set if int generated in MMC RX Int register 			   */
+  GmacMmcIntSts		   = 0x00000010,    /* set if any of the above bit [7:5] is set			   */
+  GmacPmtIntSts		   = 0x00000008,    /* set whenver magic pkt/wake-on-lan frame is received		   */
+  GmacPcsAnComplete	   = 0x00000004,    /* set when AN is complete in TBI/RTBI/SGMIII phy interface        */
+  GmacPcsLnkStsChange	   = 0x00000002,    /* set if any lnk status change in TBI/RTBI/SGMII interface        */
+  GmacRgmiiIntSts	   = 0x00000001,    /* set if any change in lnk status of RGMII interface		   */
+
+};
+
+/*  GmacInterruptMask       = 0x003C,     Mac Interrupt Mask register	       */  
+enum GmacInterruptMaskBitDefinition
+{
+  GmacTSIntMask		   = 0x00000200,    /* when set disables the time stamp interrupt generation            */
+  GmacPmtIntMask	   = 0x00000008,    /* when set Disables the assertion of PMT interrupt     	    	*/
+  GmacPcsAnIntMask	   = 0x00000004,    /* When set disables the assertion of PCS AN complete interrupt	      	*/
+  GmacPcsLnkStsIntMask	   = 0x00000002,    /* when set disables the assertion of PCS lnk status change interrupt	*/
+  GmacRgmiiIntMask	   = 0x00000001,    /* when set disables the assertion of RGMII int 			*/
+};
+
+/**********************************************************
+ * GMAC DMA registers
+ * For Pci based system address is BARx + GmaDmaBase
+ * For any other system translation is done accordingly
+ **********************************************************/
+
+enum DmaRegisters             
+{
+  DmaBusMode        = 0x0000,    /* CSR0 - Bus Mode Register                          */
+  DmaTxPollDemand   = 0x0004,    /* CSR1 - Transmit Poll Demand Register              */
+  DmaRxPollDemand   = 0x0008,    /* CSR2 - Receive Poll Demand Register               */
+  DmaRxBaseAddr     = 0x000C,    /* CSR3 - Receive Descriptor list base address       */
+  DmaTxBaseAddr     = 0x0010,    /* CSR4 - Transmit Descriptor list base address      */
+  DmaStatus         = 0x0014,    /* CSR5 - Dma status Register                        */
+  DmaControl        = 0x0018,    /* CSR6 - Dma Operation Mode Register                */
+  DmaInterrupt      = 0x001C,    /* CSR7 - Interrupt enable                           */
+  DmaMissedFr       = 0x0020,    /* CSR8 - Missed Frame & Buffer overflow Counter     */
+  DmaTxCurrDesc     = 0x0048,    /*      - Current host Tx Desc Register              */ 
+  DmaRxCurrDesc     = 0x004C,    /*      - Current host Rx Desc Register              */ 
+  DmaTxCurrAddr     = 0x0050,    /* CSR20 - Current host transmit buffer address      */
+  DmaRxCurrAddr     = 0x0054,    /* CSR21 - Current host receive buffer address       */
+};
+
+/**********************************************************
+ * DMA Engine registers Layout
+ **********************************************************/
+
+/*DmaBusMode               = 0x0000,    CSR0 - Bus Mode */
+enum DmaBusModeReg         
+{                                         /* Bit description                                Bits     R/W   Reset value */
+  DmaFixedBurstEnable     = 0x00010000,   /* (FB)Fixed Burst SINGLE, INCR4, INCR8 or INCR16   16     RW                */
+  DmaFixedBurstDisable    = 0x00000000,   /*             SINGLE, INCR                                          0       */
+
+  DmaTxPriorityRatio11    = 0x00000000,   /* (PR)TX:RX DMA priority ratio 1:1                15:14   RW        00      */ 
+  DmaTxPriorityRatio21    = 0x00004000,   /* (PR)TX:RX DMA priority ratio 2:1                                          */ 
+  DmaTxPriorityRatio31    = 0x00008000,   /* (PR)TX:RX DMA priority ratio 3:1                                          */ 
+  DmaTxPriorityRatio41    = 0x0000C000,   /* (PR)TX:RX DMA priority ratio 4:1                                          */ 
+  
+  DmaBurstLengthx8        = 0x01000000,   /* When set mutiplies the PBL by 8                  24      RW        0      */ 
+  
+  DmaBurstLength256       = 0x01002000,   /*(DmaBurstLengthx8 | DmaBurstLength32) = 256      [24]:13:8                 */  
+  DmaBurstLength128       = 0x01001000,   /*(DmaBurstLengthx8 | DmaBurstLength16) = 128      [24]:13:8                 */
+  DmaBurstLength64        = 0x01000800,   /*(DmaBurstLengthx8 | DmaBurstLength8) = 64        [24]:13:8                 */
+  DmaBurstLength32        = 0x00002000,   /* (PBL) programmable Dma burst length = 32        13:8    RW                */
+  DmaBurstLength16        = 0x00001000,   /* Dma burst length = 16                                                     */
+  DmaBurstLength8         = 0x00000800,   /* Dma burst length = 8                                                      */
+  DmaBurstLength4         = 0x00000400,   /* Dma burst length = 4                                                      */
+  DmaBurstLength2         = 0x00000200,   /* Dma burst length = 2                                                      */
+  DmaBurstLength1         = 0x00000100,   /* Dma burst length = 1                                                      */
+  DmaBurstLength0         = 0x00000000,   /* Dma burst length = 0                                               0x00   */
+
+  DmaDescriptor8Words     = 0x00000080,   /* Enh Descriptor works  1=> 8 word descriptor      7                  0    */
+  DmaDescriptor4Words     = 0x00000000,   /* Enh Descriptor works  0=> 4 word descriptor      7                  0    */
+
+  DmaDescriptorSkip16     = 0x00000040,   /* (DSL)Descriptor skip length (no.of dwords)       6:2     RW               */
+  DmaDescriptorSkip8      = 0x00000020,   /* between two unchained descriptors                                         */
+  DmaDescriptorSkip4      = 0x00000010,   /*                                                                           */
+  DmaDescriptorSkip2      = 0x00000008,   /*                                                                           */
+  DmaDescriptorSkip1      = 0x00000004,   /*                                                                           */
+  DmaDescriptorSkip0      = 0x00000000,   /*                                                                    0x00   */
+
+  DmaArbitRr              = 0x00000000,   /* (DA) DMA RR arbitration                            1     RW         0     */ 
+  DmaArbitPr              = 0x00000002,   /* Rx has priority over Tx                                                   */  
+  
+  DmaResetOn              = 0x00000001,   /* (SWR)Software Reset DMA engine                     0     RW               */
+  DmaResetOff             = 0x00000000,   /*                                                                      0    */
+};
+
+
+/*DmaStatus         = 0x0014,    CSR5 - Dma status Register                        */
+enum DmaStatusReg         
+{ 
+  /*Bit 28 27 and 26 indicate whether the interrupt due to PMT GMACMMC or GMAC LINE Remaining bits are DMA interrupts*/                      
+  GmacPmtIntr             = 0x10000000,   /* (GPI)Gmac subsystem interrupt                      28     RO       0       */ 
+  GmacMmcIntr             = 0x08000000,   /* (GMI)Gmac MMC subsystem interrupt                  27     RO       0       */ 
+  GmacLineIntfIntr        = 0x04000000,   /* Line interface interrupt                           26     RO       0       */
+
+  DmaErrorBit2            = 0x02000000,   /* (EB)Error bits 0-data buffer, 1-desc. access       25     RO       0       */
+  DmaErrorBit1            = 0x01000000,   /* (EB)Error bits 0-write trnsf, 1-read transfr       24     RO       0       */
+  DmaErrorBit0            = 0x00800000,   /* (EB)Error bits 0-Rx DMA, 1-Tx DMA                  23     RO       0       */
+
+  DmaTxState              = 0x00700000,   /* (TS)Transmit process state                         22:20  RO               */
+  DmaTxStopped            = 0x00000000,   /* Stopped - Reset or Stop Tx Command issued                         000      */
+  DmaTxFetching           = 0x00100000,   /* Running - fetching the Tx descriptor                                       */
+  DmaTxWaiting            = 0x00200000,   /* Running - waiting for status                                               */
+  DmaTxReading            = 0x00300000,   /* Running - reading the data from host memory                                */
+  DmaTxSuspended          = 0x00600000,   /* Suspended - Tx Descriptor unavailabe                                       */
+  DmaTxClosing            = 0x00700000,   /* Running - closing Rx descriptor                                            */
+
+  DmaRxState              = 0x000E0000,   /* (RS)Receive process state                         19:17  RO                */
+  DmaRxStopped            = 0x00000000,   /* Stopped - Reset or Stop Rx Command issued                         000      */
+  DmaRxFetching           = 0x00020000,   /* Running - fetching the Rx descriptor                                       */
+  DmaRxWaiting            = 0x00060000,   /* Running - waiting for packet                                               */
+  DmaRxSuspended          = 0x00080000,   /* Suspended - Rx Descriptor unavailable                                      */
+  DmaRxClosing            = 0x000A0000,   /* Running - closing descriptor                                               */
+  DmaRxQueuing            = 0x000E0000,   /* Running - queuing the recieve frame into host memory                       */
+
+  DmaIntNormal            = 0x00010000,   /* (NIS)Normal interrupt summary                     16     RW        0       */
+  DmaIntAbnormal          = 0x00008000,   /* (AIS)Abnormal interrupt summary                   15     RW        0       */
+
+  DmaIntEarlyRx           = 0x00004000,   /* Early receive interrupt (Normal)       RW        0       */
+  DmaIntBusError          = 0x00002000,   /* Fatal bus error (Abnormal)             RW        0       */
+  DmaIntEarlyTx           = 0x00000400,   /* Early transmit interrupt (Abnormal)    RW        0       */
+  DmaIntRxWdogTO          = 0x00000200,   /* Receive Watchdog Timeout (Abnormal)    RW        0       */
+  DmaIntRxStopped         = 0x00000100,   /* Receive process stopped (Abnormal)     RW        0       */
+  DmaIntRxNoBuffer        = 0x00000080,   /* Receive buffer unavailable (Abnormal)  RW        0       */
+  DmaIntRxCompleted       = 0x00000040,   /* Completion of frame reception (Normal) RW        0       */
+  DmaIntTxUnderflow       = 0x00000020,   /* Transmit underflow (Abnormal)          RW        0       */
+  DmaIntRcvOverflow       = 0x00000010,   /* Receive Buffer overflow interrupt      RW        0       */
+  DmaIntTxJabberTO        = 0x00000008,   /* Transmit Jabber Timeout (Abnormal)     RW        0       */
+  DmaIntTxNoBuffer        = 0x00000004,   /* Transmit buffer unavailable (Normal)   RW        0       */
+  DmaIntTxStopped         = 0x00000002,   /* Transmit process stopped (Abnormal)    RW        0       */
+  DmaIntTxCompleted       = 0x00000001,   /* Transmit completed (Normal)            RW        0       */
+};
+
+/*DmaControl        = 0x0018,     CSR6 - Dma Operation Mode Register                */
+enum DmaControlReg        
+{ 
+  DmaDisableDropTcpCs	  = 0x04000000,   /* (DT) Dis. drop. of tcp/ip CS error frames        26      RW        0       */
+                                        
+  DmaStoreAndForward      = 0x00200000,   /* (SF)Store and forward                            21      RW        0       */
+  DmaFlushTxFifo          = 0x00100000,   /* (FTF)Tx FIFO controller is reset to default      20      RW        0       */ 
+  
+  DmaTxThreshCtrl         = 0x0001C000,   /* (TTC)Controls thre Threh of MTL tx Fifo          16:14   RW                */ 
+  DmaTxThreshCtrl16       = 0x0001C000,   /* (TTC)Controls thre Threh of MTL tx Fifo 16       16:14   RW                */ 
+  DmaTxThreshCtrl24       = 0x00018000,   /* (TTC)Controls thre Threh of MTL tx Fifo 24       16:14   RW                */ 
+  DmaTxThreshCtrl32       = 0x00014000,   /* (TTC)Controls thre Threh of MTL tx Fifo 32       16:14   RW                */ 
+  DmaTxThreshCtrl40       = 0x00010000,   /* (TTC)Controls thre Threh of MTL tx Fifo 40       16:14   RW                */   
+  DmaTxThreshCtrl256      = 0x0000c000,   /* (TTC)Controls thre Threh of MTL tx Fifo 256      16:14   RW                */   
+  DmaTxThreshCtrl192      = 0x00008000,   /* (TTC)Controls thre Threh of MTL tx Fifo 192      16:14   RW                */   
+  DmaTxThreshCtrl128      = 0x00004000,   /* (TTC)Controls thre Threh of MTL tx Fifo 128      16:14   RW                */   
+  DmaTxThreshCtrl64       = 0x00000000,   /* (TTC)Controls thre Threh of MTL tx Fifo 64       16:14   RW        000     */ 
+  
+  DmaTxStart              = 0x00002000,   /* (ST)Start/Stop transmission                      13      RW        0       */
+
+  DmaRxFlowCtrlDeact      = 0x00401800,   /* (RFD)Rx flow control deact. threhold             [22]:12:11   RW                 */ 
+  DmaRxFlowCtrlDeact1K    = 0x00000000,   /* (RFD)Rx flow control deact. threhold (1kbytes)   [22]:12:11   RW        00       */ 
+  DmaRxFlowCtrlDeact2K    = 0x00000800,   /* (RFD)Rx flow control deact. threhold (2kbytes)   [22]:12:11   RW                 */ 
+  DmaRxFlowCtrlDeact3K    = 0x00001000,   /* (RFD)Rx flow control deact. threhold (3kbytes)   [22]:12:11   RW                 */ 
+  DmaRxFlowCtrlDeact4K    = 0x00001800,   /* (RFD)Rx flow control deact. threhold (4kbytes)   [22]:12:11   RW                 */ 	
+  DmaRxFlowCtrlDeact5K    = 0x00400000,   /* (RFD)Rx flow control deact. threhold (4kbytes)   [22]:12:11   RW                 */ 	
+  DmaRxFlowCtrlDeact6K    = 0x00400800,   /* (RFD)Rx flow control deact. threhold (4kbytes)   [22]:12:11   RW                 */ 	
+  DmaRxFlowCtrlDeact7K    = 0x00401000,   /* (RFD)Rx flow control deact. threhold (4kbytes)   [22]:12:11   RW                 */ 	
+  
+  DmaRxFlowCtrlAct        = 0x00800600,   /* (RFA)Rx flow control Act. threhold              [23]:10:09   RW                 */ 
+  DmaRxFlowCtrlAct1K      = 0x00000000,   /* (RFA)Rx flow control Act. threhold (1kbytes)    [23]:10:09   RW        00       */ 
+  DmaRxFlowCtrlAct2K      = 0x00000200,   /* (RFA)Rx flow control Act. threhold (2kbytes)    [23]:10:09   RW                 */ 
+  DmaRxFlowCtrlAct3K      = 0x00000400,   /* (RFA)Rx flow control Act. threhold (3kbytes)    [23]:10:09   RW                 */ 
+  DmaRxFlowCtrlAct4K      = 0x00000300,   /* (RFA)Rx flow control Act. threhold (4kbytes)    [23]:10:09   RW                 */ 	
+  DmaRxFlowCtrlAct5K      = 0x00800000,   /* (RFA)Rx flow control Act. threhold (5kbytes)    [23]:10:09   RW                 */ 	
+  DmaRxFlowCtrlAct6K      = 0x00800200,   /* (RFA)Rx flow control Act. threhold (6kbytes)    [23]:10:09   RW                 */ 	
+  DmaRxFlowCtrlAct7K      = 0x00800400,   /* (RFA)Rx flow control Act. threhold (7kbytes)    [23]:10:09   RW                 */ 	
+  
+  DmaRxThreshCtrl         = 0x00000018,   /* (RTC)Controls thre Threh of MTL rx Fifo          4:3   RW                */ 
+  DmaRxThreshCtrl64       = 0x00000000,   /* (RTC)Controls thre Threh of MTL tx Fifo 64       4:3   RW                */ 
+  DmaRxThreshCtrl32       = 0x00000008,   /* (RTC)Controls thre Threh of MTL tx Fifo 32       4:3   RW                */ 
+  DmaRxThreshCtrl96       = 0x00000010,   /* (RTC)Controls thre Threh of MTL tx Fifo 96       4:3   RW                */ 
+  DmaRxThreshCtrl128      = 0x00000018,   /* (RTC)Controls thre Threh of MTL tx Fifo 128      4:3   RW                */ 
+
+  DmaEnHwFlowCtrl         = 0x00000100,   /* (EFC)Enable HW flow control                      8       RW                 */ 
+  DmaDisHwFlowCtrl        = 0x00000000,   /* Disable HW flow control                                            0        */ 
+        
+  DmaFwdErrorFrames       = 0x00000080,   /* (FEF)Forward error frames                        7       RW        0       */
+  DmaFwdUnderSzFrames     = 0x00000040,   /* (FUF)Forward undersize frames                    6       RW        0       */
+  DmaTxSecondFrame        = 0x00000004,   /* (OSF)Operate on second frame                     4       RW        0       */
+  DmaRxStart              = 0x00000002,   /* (SR)Start/Stop reception                         1       RW        0       */
+};
+
+
+/*DmaInterrupt      = 0x001C,    CSR7 - Interrupt enable Register Layout     */
+enum  DmaInterruptReg
+{                     
+  DmaIeNormal            = DmaIntNormal     ,   /* Normal interrupt enable                 RW        0       */
+  DmaIeAbnormal          = DmaIntAbnormal   ,   /* Abnormal interrupt enable               RW        0       */
+
+  DmaIeEarlyRx           = DmaIntEarlyRx    ,   /* Early receive interrupt enable          RW        0       */
+  DmaIeBusError          = DmaIntBusError   ,   /* Fatal bus error enable                  RW        0       */
+  DmaIeEarlyTx           = DmaIntEarlyTx    ,   /* Early transmit interrupt enable         RW        0       */
+  DmaIeRxWdogTO          = DmaIntRxWdogTO   ,   /* Receive Watchdog Timeout enable         RW        0       */
+  DmaIeRxStopped         = DmaIntRxStopped  ,   /* Receive process stopped enable          RW        0       */
+  DmaIeRxNoBuffer        = DmaIntRxNoBuffer ,   /* Receive buffer unavailable enable       RW        0       */
+  DmaIeRxCompleted       = DmaIntRxCompleted,   /* Completion of frame reception enable    RW        0       */
+  DmaIeTxUnderflow       = DmaIntTxUnderflow,   /* Transmit underflow enable               RW        0       */
+
+  DmaIeRxOverflow        = DmaIntRcvOverflow,   /* Receive Buffer overflow interrupt       RW        0       */
+  DmaIeTxJabberTO        = DmaIntTxJabberTO ,   /* Transmit Jabber Timeout enable          RW        0       */
+  DmaIeTxNoBuffer        = DmaIntTxNoBuffer ,   /* Transmit buffer unavailable enable      RW        0       */
+  DmaIeTxStopped         = DmaIntTxStopped  ,   /* Transmit process stopped enable         RW        0       */
+  DmaIeTxCompleted       = DmaIntTxCompleted,   /* Transmit completed enable               RW        0       */
+};
+
+
+
+/**********************************************************
+ * DMA Engine descriptors
+ **********************************************************/
+#ifdef ENH_DESC
+/*
+**********Enhanced Descritpor structure to support 8K buffer per buffer ****************************
+	
+DmaRxBaseAddr     = 0x000C,   CSR3 - Receive Descriptor list base address       
+DmaRxBaseAddr is the pointer to the first Rx Descriptors. the Descriptor format in Little endian with a
+32 bit Data bus is as shown below 
+
+Similarly 
+DmaTxBaseAddr     = 0x0010,  CSR4 - Transmit Descriptor list base address
+DmaTxBaseAddr is the pointer to the first Rx Descriptors. the Descriptor format in Little endian with a
+32 bit Data bus is as shown below
+                  --------------------------------------------------------------------------
+    RDES0	  |OWN (31)| Status                                                        |
+ 		  --------------------------------------------------------------------------
+    RDES1	  | Ctrl | Res | Byte Count Buffer 2 | Ctrl | Res | Byte Count Buffer 1    |
+		  --------------------------------------------------------------------------
+    RDES2	  |  Buffer 1 Address                                                      |
+		  --------------------------------------------------------------------------
+    RDES3	  |  Buffer 2 Address / Next Descriptor Address                            |
+		  --------------------------------------------------------------------------
+
+                  --------------------------------------------------------------------------
+    TDES0	  |OWN (31)| Ctrl | Res | Ctrl | Res | Status                              |
+ 		  --------------------------------------------------------------------------
+    TDES1	  | Res | Byte Count Buffer 2 | Res |         Byte Count Buffer 1          |
+		  --------------------------------------------------------------------------
+    TDES2	  |  Buffer 1 Address                                                      |
+		  --------------------------------------------------------------------------
+    TDES3         |  Buffer 2 Address / Next Descriptor Address                            |
+		  --------------------------------------------------------------------------
+
+*/
+
+enum DmaDescriptorStatus    /* status word of DMA descriptor */
+{
+  DescOwnByDma          = 0x80000000,   /* (OWN)Descriptor is owned by DMA engine              31      RW                  */
+
+  DescDAFilterFail      = 0x40000000,   /* (AFM)Rx - DA Filter Fail for the rx frame           30                          */
+  
+  DescFrameLengthMask   = 0x3FFF0000,   /* (FL)Receive descriptor frame length                 29:16                       */
+  DescFrameLengthShift  = 16,
+
+  DescError             = 0x00008000,   /* (ES)Error summary bit  - OR of the follo. bits:     15                          */
+					/*  DE || OE || IPC || LC || RWT || RE || CE */
+  DescRxTruncated       = 0x00004000,   /* (DE)Rx - no more descriptors for receive frame      14                          */
+  DescSAFilterFail      = 0x00002000,   /* (SAF)Rx - SA Filter Fail for the received frame     13                          */
+  DescRxLengthError	= 0x00001000,   /* (LE)Rx - frm size not matching with len field       12                          */
+  DescRxDamaged         = 0x00000800,   /* (OE)Rx - frm was damaged due to buffer overflow     11                          */
+  DescRxVLANTag         = 0x00000400,   /* (VLAN)Rx - received frame is a VLAN frame           10                          */
+  DescRxFirst           = 0x00000200,   /* (FS)Rx - first descriptor of the frame              9                          */
+  DescRxLast            = 0x00000100,   /* (LS)Rx - last descriptor of the frame               8                          */
+  DescRxLongFrame       = 0x00000080,   /* (Giant Frame)Rx - frame is longer than 1518/1522    7                          */
+  DescRxCollision       = 0x00000040,   /* (LC)Rx - late collision occurred during reception   6                          */
+  DescRxFrameEther      = 0x00000020,   /* (FT)Rx - Frame type - Ethernet, otherwise 802.3     5                          */
+  DescRxWatchdog        = 0x00000010,   /* (RWT)Rx - watchdog timer expired during reception   4                          */
+  DescRxMiiError        = 0x00000008,   /* (RE)Rx - error reported by MII interface            3                          */
+  DescRxDribbling       = 0x00000004,   /* (DE)Rx - frame contains non int multiple of 8 bits  2                          */
+  DescRxCrc             = 0x00000002,   /* (CE)Rx - CRC error                                  1                          */
+//  DescRxMacMatch        = 0x00000001,   /* (RX MAC Address) Rx mac address reg(1 to 15)match   0                          */ 
+
+  DescRxEXTsts          = 0x00000001,   /* Extended Status Available (RDES4)                           0                          */ 
+  
+  DescTxIntEnable       = 0x40000000,   /* (IC)Tx - interrupt on completion                    30                       */
+  DescTxLast            = 0x20000000,   /* (LS)Tx - Last segment of the frame                  29                       */
+  DescTxFirst           = 0x10000000,   /* (FS)Tx - First segment of the frame                 28                       */
+  DescTxDisableCrc      = 0x08000000,   /* (DC)Tx - Add CRC disabled (first segment only)      27                       */
+  DescTxDisablePadd	= 0x04000000,   /* (DP)disable padding, added by - reyaz               26                       */
+
+  DescTxCisMask  	= 0x00c00000,   /* Tx checksum offloading control mask		       23:22			*/
+  DescTxCisBypass	= 0x00000000,   /* Checksum bypass								*/
+  DescTxCisIpv4HdrCs	= 0x00400000,	/* IPv4 header checksum								*/
+  DescTxCisTcpOnlyCs    = 0x00800000,	/* TCP/UDP/ICMP checksum. Pseudo header checksum is assumed to be present	*/
+  DescTxCisTcpPseudoCs  = 0x00c00000,	/* TCP/UDP/ICMP checksum fully in hardware including pseudo header		*/
+
+  TxDescEndOfRing       = 0x00200000,   /* (TER)End of descriptors ring                        21                       */
+  TxDescChain           = 0x00100000,   /* (TCH)Second buffer address is chain address         20                       */
+  
+  DescRxChkBit0		= 0x00000001,   /*()  Rx - Rx Payload Checksum Error                   0                          */
+  DescRxChkBit7		= 0x00000080,   /* (IPC CS ERROR)Rx - Ipv4 header checksum error       7                          */
+  DescRxChkBit5		= 0x00000020,   /* (FT)Rx - Frame type - Ethernet, otherwise 802.3     5                          */
+  
+  DescRxTSavail         = 0x00000080,   /* Time stamp available                                7                          */  
+  DescRxFrameType	= 0x00000020,   /* (FT)Rx - Frame type - Ethernet, otherwise 802.3     5                          */
+
+  DescTxIpv4ChkError    = 0x00010000,   /* (IHE) Tx Ip header error                            16                         */
+  DescTxTimeout         = 0x00004000,   /* (JT)Tx - Transmit jabber timeout                    14                         */
+  DescTxFrameFlushed    = 0x00002000,   /* (FF)Tx - DMA/MTL flushed the frame due to SW flush  13                         */
+  DescTxPayChkError     = 0x00001000,   /* (PCE) Tx Payload checksum Error                     12                         */
+  DescTxLostCarrier     = 0x00000800,   /* (LC)Tx - carrier lost during tramsmission           11                         */
+  DescTxNoCarrier       = 0x00000400,   /* (NC)Tx - no carrier signal from the tranceiver      10                         */
+  DescTxLateCollision   = 0x00000200,   /* (LC)Tx - transmission aborted due to collision      9                         */
+  DescTxExcCollisions   = 0x00000100,   /* (EC)Tx - transmission aborted after 16 collisions   8                         */
+  DescTxVLANFrame       = 0x00000080,   /* (VF)Tx - VLAN-type frame                            7                         */
+ 
+  DescTxCollMask        = 0x00000078,   /* (CC)Tx - Collision count                            6:3                        */
+  DescTxCollShift       = 3,
+  
+  DescTxExcDeferral     = 0x00000004,   /* (ED)Tx - excessive deferral                         2                        */
+  DescTxUnderflow       = 0x00000002,   /* (UF)Tx - late data arrival from the memory          1                        */
+  DescTxDeferred        = 0x00000001,   /* (DB)Tx - frame transmision deferred                 0                        */
+
+	/*
+	This explains the RDES1/TDES1 bits layout
+			  --------------------------------------------------------------------
+	    RDES1/TDES1  | Control Bits | Byte Count Buffer 2 | Byte Count Buffer 1          |
+			  --------------------------------------------------------------------
+
+	*/
+// DmaDescriptorLength     length word of DMA descriptor 
+
+
+  RxDisIntCompl		= 0x80000000,	/* (Disable Rx int on completion) 			31			*/
+  RxDescEndOfRing       = 0x00008000,   /* (TER)End of descriptors ring                         15                       */
+  RxDescChain           = 0x00004000,   /* (TCH)Second buffer address is chain address          14                       */
+
+
+  DescSize2Mask         = 0x1FFF0000,   /* (TBS2) Buffer 2 size                                28:16                    */
+  DescSize2Shift        = 16,
+  DescSize1Mask         = 0x00001FFF,   /* (TBS1) Buffer 1 size                                12:0                     */
+  DescSize1Shift        = 0,
+
+
+	/*
+	This explains the RDES4 Extended Status bits layout
+			  --------------------------------------------------------------------
+	    RDES4        |                             Extended Status                        |
+			  --------------------------------------------------------------------
+	*/
+  DescRxPtpAvail        = 0x00004000,    /* PTP snapshot available                              14                        */
+  DescRxPtpVer          = 0x00002000,    /* When set indicates IEEE1584 Version 2 (else Ver1)   13                        */
+  DescRxPtpFrameType    = 0x00001000,    /* PTP frame type Indicates PTP sent over ethernet     12                        */
+  DescRxPtpMessageType  = 0x00000F00,    /* Message Type                                        11:8                      */
+  DescRxPtpNo           = 0x00000000,    /* 0000 => No PTP message received                                               */
+  DescRxPtpSync         = 0x00000100,    /* 0001 => Sync (all clock types) received                                       */
+  DescRxPtpFollowUp     = 0x00000200,    /* 0010 => Follow_Up (all clock types) received                                  */
+  DescRxPtpDelayReq     = 0x00000300,    /* 0011 => Delay_Req (all clock types) received                                  */
+  DescRxPtpDelayResp    = 0x00000400,    /* 0100 => Delay_Resp (all clock types) received                                 */
+  DescRxPtpPdelayReq    = 0x00000500,    /* 0101 => Pdelay_Req (in P to P tras clk)  or Announce in Ord and Bound clk     */
+  DescRxPtpPdelayResp   = 0x00000600,    /* 0110 => Pdealy_Resp(in P to P trans clk) or Management in Ord and Bound clk   */
+  DescRxPtpPdelayRespFP = 0x00000700,    /* 0111 => Pdealy_Resp_Follow_Up (in P to P trans clk) or Signaling in Ord and Bound clk   */
+  DescRxPtpIPV6         = 0x00000080,    /* Received Packet is  in IPV6 Packet                  7                         */
+  DescRxPtpIPV4         = 0x00000040,    /* Received Packet is  in IPV4 Packet                  6                         */
+ 
+  DescRxChkSumBypass    = 0x00000020,    /* When set indicates checksum offload engine          5
+                                            is bypassed                                                                   */
+  DescRxIpPayloadError  = 0x00000010,    /* When set indicates 16bit IP payload CS is in error  4                         */
+  DescRxIpHeaderError   = 0x00000008,    /* When set indicates 16bit IPV4 header CS is in       3
+                                            error or IP datagram version is not consistent 
+                                            with Ethernet type value                                                      */
+  DescRxIpPayloadType   = 0x00000007,     /* Indicate the type of payload encapsulated          2:0
+                                             in IPdatagram processed by COE (Rx)                                          */
+  DescRxIpPayloadUnknown= 0x00000000,     /* Unknown or didnot process IP payload                                         */
+  DescRxIpPayloadUDP    = 0x00000001,     /* UDP                                                                          */
+  DescRxIpPayloadTCP    = 0x00000002,     /* TCP                                                                          */
+  DescRxIpPayloadICMP   = 0x00000003,     /* ICMP                                                                         */
+
+};
+
+#else
+/*
+
+********** Default Descritpor structure  ****************************
+DmaRxBaseAddr     = 0x000C,   CSR3 - Receive Descriptor list base address       
+DmaRxBaseAddr is the pointer to the first Rx Descriptors. the Descriptor format in Little endian with a
+32 bit Data bus is as shown below 
+
+Similarly 
+DmaTxBaseAddr     = 0x0010,  CSR4 - Transmit Descriptor list base address
+DmaTxBaseAddr is the pointer to the first Rx Descriptors. the Descriptor format in Little endian with a
+32 bit Data bus is as shown below
+                  --------------------------------------------------------------------
+    RDES0/TDES0  |OWN (31)| Status                                                   |
+ 		  --------------------------------------------------------------------
+    RDES1/TDES1  | Control Bits | Byte Count Buffer 2 | Byte Count Buffer 1          |
+		  --------------------------------------------------------------------
+    RDES2/TDES2  |  Buffer 1 Address                                                 |
+		  --------------------------------------------------------------------
+    RDES3/TDES3  |  Buffer 2 Address / Next Descriptor Address                       |
+		  --------------------------------------------------------------------
+*/
+enum DmaDescriptorStatus    /* status word of DMA descriptor */
+{
+  DescOwnByDma          = 0x80000000,   /* (OWN)Descriptor is owned by DMA engine            31      RW                  */
+
+  DescDAFilterFail      = 0x40000000,   /* (AFM)Rx - DA Filter Fail for the rx frame         30                          */
+  
+  DescFrameLengthMask   = 0x3FFF0000,   /* (FL)Receive descriptor frame length               29:16                       */
+  DescFrameLengthShift  = 16,
+
+  DescError             = 0x00008000,   /* (ES)Error summary bit  - OR of the follo. bits:   15                          */
+					/*  DE || OE || IPC || LC || RWT || RE || CE */
+  DescRxTruncated       = 0x00004000,   /* (DE)Rx - no more descriptors for receive frame    14                          */
+  DescSAFilterFail      = 0x00002000,   /* (SAF)Rx - SA Filter Fail for the received frame   13                          */
+  DescRxLengthError	= 0x00001000,   /* (LE)Rx - frm size not matching with len field     12                          */
+  DescRxDamaged         = 0x00000800,   /* (OE)Rx - frm was damaged due to buffer overflow   11                          */
+  DescRxVLANTag         = 0x00000400,   /* (VLAN)Rx - received frame is a VLAN frame         10                          */
+  DescRxFirst           = 0x00000200,   /* (FS)Rx - first descriptor of the frame             9                          */
+  DescRxLast            = 0x00000100,   /* (LS)Rx - last descriptor of the frame              8                          */
+  DescRxLongFrame       = 0x00000080,   /* (Giant Frame)Rx - frame is longer than 1518/1522   7                          */
+  DescRxCollision       = 0x00000040,   /* (LC)Rx - late collision occurred during reception  6                          */
+  DescRxFrameEther      = 0x00000020,   /* (FT)Rx - Frame type - Ethernet, otherwise 802.3    5                          */
+  DescRxWatchdog        = 0x00000010,   /* (RWT)Rx - watchdog timer expired during reception  4                          */
+  DescRxMiiError        = 0x00000008,   /* (RE)Rx - error reported by MII interface           3                          */
+  DescRxDribbling       = 0x00000004,   /* (DE)Rx - frame contains non int multiple of 8 bits 2                          */
+  DescRxCrc             = 0x00000002,   /* (CE)Rx - CRC error                                 1                          */
+  DescRxMacMatch        = 0x00000001,   /* (RX MAC Address) Rx mac address reg(1 to 15)match  0                          */ 
+
+  //Rx Descriptor Checksum Offload engine (type 2) encoding
+  //DescRxPayChkError     = 0x00000001,   /* ()  Rx - Rx Payload Checksum Error                 0                          */  
+  //DescRxIpv4ChkError    = 0x00000080,   /* (IPC CS ERROR)Rx - Ipv4 header checksum error      7                          */
+  
+  DescRxChkBit0		= 0x00000001,   /*()  Rx - Rx Payload Checksum Error                  0                          */
+  DescRxChkBit7		= 0x00000080,   /* (IPC CS ERROR)Rx - Ipv4 header checksum error      7                          */
+  DescRxChkBit5		= 0x00000020,   /* (FT)Rx - Frame type - Ethernet, otherwise 802.3    5                          */
+  
+  DescTxIpv4ChkError    = 0x00010000,   /* (IHE) Tx Ip header error                           16                         */
+  DescTxTimeout         = 0x00004000,   /* (JT)Tx - Transmit jabber timeout                   14                         */
+  DescTxFrameFlushed    = 0x00002000,   /* (FF)Tx - DMA/MTL flushed the frame due to SW flush 13                         */
+  DescTxPayChkError     = 0x00001000,   /* (PCE) Tx Payload checksum Error                    12                         */
+  DescTxLostCarrier     = 0x00000800,   /* (LC)Tx - carrier lost during tramsmission          11                         */
+  DescTxNoCarrier       = 0x00000400,   /* (NC)Tx - no carrier signal from the tranceiver     10                         */
+  DescTxLateCollision   = 0x00000200,   /* (LC)Tx - transmission aborted due to collision      9                         */
+  DescTxExcCollisions   = 0x00000100,   /* (EC)Tx - transmission aborted after 16 collisions   8                         */
+  DescTxVLANFrame       = 0x00000080,   /* (VF)Tx - VLAN-type frame                            7                         */
+ 
+  DescTxCollMask        = 0x00000078,   /* (CC)Tx - Collision count                           6:3                        */
+  DescTxCollShift       = 3,
+  
+  DescTxExcDeferral     = 0x00000004,   /* (ED)Tx - excessive deferral                          2                        */
+  DescTxUnderflow       = 0x00000002,   /* (UF)Tx - late data arrival from the memory           1                        */
+  DescTxDeferred        = 0x00000001,   /* (DB)Tx - frame transmision deferred                  0                        */
+  
+	/*
+	This explains the RDES1/TDES1 bits layout
+			  --------------------------------------------------------------------
+	    RDES1/TDES1  | Control Bits | Byte Count Buffer 2 | Byte Count Buffer 1          |
+			  --------------------------------------------------------------------
+
+	*/	
+//DmaDescriptorLength     length word of DMA descriptor
+
+  DescTxIntEnable       = 0x80000000,   /* (IC)Tx - interrupt on completion                    31                       */
+  DescTxLast            = 0x40000000,   /* (LS)Tx - Last segment of the frame                  30                       */
+  DescTxFirst           = 0x20000000,   /* (FS)Tx - First segment of the frame                 29                       */
+  DescTxDisableCrc      = 0x04000000,   /* (DC)Tx - Add CRC disabled (first segment only)      26                       */
+
+  RxDisIntCompl		= 0x80000000,	/* (Disable Rx int on completion) 			31			*/
+  RxDescEndOfRing       = 0x02000000,   /* (TER)End of descriptors ring                                                 */
+  RxDescChain           = 0x01000000,   /* (TCH)Second buffer address is chain address         24                       */
+  
+  DescTxDisablePadd	= 0x00800000,   /* (DP)disable padding, added by - reyaz               23                       */
+
+  TxDescEndOfRing       = 0x02000000,   /* (TER)End of descriptors ring                                                 */
+  TxDescChain           = 0x01000000,   /* (TCH)Second buffer address is chain address         24                       */
+  
+  DescSize2Mask         = 0x003FF800,   /* (TBS2) Buffer 2 size                                21:11                    */
+  DescSize2Shift        = 11,
+  DescSize1Mask         = 0x000007FF,   /* (TBS1) Buffer 1 size                                10:0                     */
+  DescSize1Shift        = 0,
+
+
+  DescTxCisMask  	= 0x18000000,   /* Tx checksum offloading control mask			28:27			*/
+  DescTxCisBypass	= 0x00000000,   /* Checksum bypass								*/
+  DescTxCisIpv4HdrCs	= 0x08000000,	/* IPv4 header checksum								*/
+  DescTxCisTcpOnlyCs    = 0x10000000,	/* TCP/UDP/ICMP checksum. Pseudo header checksum is assumed to be present	*/
+  DescTxCisTcpPseudoCs  = 0x18000000,	/* TCP/UDP/ICMP checksum fully in hardware including pseudo header		*/
+};
+#endif
+
+// Rx Descriptor COE type2 encoding
+enum RxDescCOEEncode
+{
+  RxLenLT600			= 0,	/* Bit(5:7:0)=>0 IEEE 802.3 type frame Length field is Lessthan 0x0600			*/
+  RxIpHdrPayLoadChkBypass	= 1,	/* Bit(5:7:0)=>1 Payload & Ip header checksum bypassed (unsuppported payload) 		*/
+  RxIpHdrPayLoadRes		= 2,	/* Bit(5:7:0)=>2 Reserved						 		*/
+  RxChkBypass			= 3,	/* Bit(5:7:0)=>3 Neither IPv4 nor IPV6. So checksum bypassed 		 		*/
+  RxNoChkError			= 4,	/* Bit(5:7:0)=>4 No IPv4/IPv6 Checksum error detected					*/
+  RxPayLoadChkError		= 5,	/* Bit(5:7:0)=>5 Payload checksum error detected for Ipv4/Ipv6 frames			*/
+  RxIpHdrChkError		= 6,	/* Bit(5:7:0)=>6 Ip header checksum error detected for Ipv4 frames			*/
+  RxIpHdrPayLoadChkError	= 7,	/* Bit(5:7:0)=>7 Payload & Ip header checksum error detected for Ipv4/Ipv6 frames	*/
+};
+
+/**********************************************************
+ * DMA engine interrupt handling functions
+ **********************************************************/
+ 
+ enum synopGMACDmaIntEnum  /* Intrerrupt types */
+{
+  synopGMACDmaRxNormal   = 0x01,   /* normal receiver interrupt */
+  synopGMACDmaRxAbnormal = 0x02,   /* abnormal receiver interrupt */
+  synopGMACDmaRxStopped  = 0x04,   /* receiver stopped */
+  synopGMACDmaTxNormal   = 0x08,   /* normal transmitter interrupt */
+  synopGMACDmaTxAbnormal = 0x10,   /* abnormal transmitter interrupt */
+  synopGMACDmaTxStopped  = 0x20,   /* transmitter stopped */
+  synopGMACDmaError      = 0x80,   /* Dma engine error */
+};
+
+
+/**********************************************************
+ * Initial register values
+ **********************************************************/
+enum InitialRegisters
+{
+   /* Full-duplex mode with perfect filter on */
+  GmacConfigInitFdx1000   = GmacWatchdogEnable | GmacJabberEnable         | GmacFrameBurstEnable | GmacJumboFrameDisable
+                          | GmacSelectGmii     | GmacEnableRxOwn          | GmacLoopbackOff
+                          | GmacFullDuplex     | GmacRetryEnable          | GmacPadCrcStripDisable
+                          | GmacBackoffLimit0  | GmacDeferralCheckDisable | GmacTxEnable          | GmacRxEnable,
+  
+  /* Full-duplex mode with perfect filter on */
+  GmacConfigInitFdx110    = GmacWatchdogEnable | GmacJabberEnable         | GmacFrameBurstEnable  | GmacJumboFrameDisable
+                          | GmacSelectMii      | GmacEnableRxOwn          | GmacLoopbackOff
+                          | GmacFullDuplex     | GmacRetryEnable          | GmacPadCrcStripDisable
+                          | GmacBackoffLimit0  | GmacDeferralCheckDisable | GmacTxEnable          | GmacRxEnable,
+
+   /* Full-duplex mode */
+   // CHANGED: Pass control config, dest addr filter normal, added source address filter, multicast & unicast 
+   // Hash filter. 
+   /*                        = GmacFilterOff         | GmacPassControlOff | GmacBroadcastEnable */
+   GmacFrameFilterInitFdx = GmacFilterOn          | GmacPassControl0   | GmacBroadcastEnable |  GmacSrcAddrFilterDisable
+                           | GmacMulticastFilterOn | GmacDestAddrFilterNor | GmacMcastHashFilterOff
+                          | GmacPromiscuousModeOff | GmacUcastHashFilterOff,
+   
+   /* Full-duplex mode */
+   GmacFlowControlInitFdx = GmacUnicastPauseFrameOff | GmacRxFlowControlEnable | GmacTxFlowControlEnable,
+
+   /* Full-duplex mode */
+   GmacGmiiAddrInitFdx    = GmiiCsrClk2,
+
+
+   /* Half-duplex mode with perfect filter on */
+   // CHANGED: Removed Endian configuration, added single bit config for PAD/CRC strip,   			  
+   /*| GmacSelectMii      | GmacLittleEndian         | GmacDisableRxOwn      | GmacLoopbackOff*/
+   GmacConfigInitHdx1000  = GmacWatchdogEnable | GmacJabberEnable         | GmacFrameBurstEnable  | GmacJumboFrameDisable
+                          | GmacSelectGmii     | GmacDisableRxOwn         | GmacLoopbackOff
+                          | GmacHalfDuplex     | GmacRetryEnable          | GmacPadCrcStripDisable   
+                          | GmacBackoffLimit0  | GmacDeferralCheckDisable | GmacTxEnable          | GmacRxEnable,
+
+   /* Half-duplex mode with perfect filter on */
+   GmacConfigInitHdx110   = GmacWatchdogEnable | GmacJabberEnable         | GmacFrameBurstEnable  | GmacJumboFrameDisable
+                          | GmacSelectMii      | GmacDisableRxOwn         | GmacLoopbackOff
+                          | GmacHalfDuplex     | GmacRetryEnable          | GmacPadCrcStripDisable 
+                          | GmacBackoffLimit0  | GmacDeferralCheckDisable | GmacTxEnable          | GmacRxEnable,
+
+   /* Half-duplex mode */
+   GmacFrameFilterInitHdx = GmacFilterOn          | GmacPassControl0        | GmacBroadcastEnable | GmacSrcAddrFilterDisable
+                          | GmacMulticastFilterOn | GmacDestAddrFilterNor   | GmacMcastHashFilterOff
+                          | GmacUcastHashFilterOff| GmacPromiscuousModeOff,
+
+   /* Half-duplex mode */
+   GmacFlowControlInitHdx = GmacUnicastPauseFrameOff | GmacRxFlowControlDisable | GmacTxFlowControlDisable,
+
+   /* Half-duplex mode */
+   GmacGmiiAddrInitHdx    = GmiiCsrClk2,
+
+
+
+   /**********************************************
+   *DMA configurations
+   **********************************************/
+
+  DmaBusModeInit         = DmaFixedBurstEnable |   DmaBurstLength8   | DmaDescriptorSkip2       | DmaResetOff,
+//   DmaBusModeInit         = DmaFixedBurstEnable |   DmaBurstLength8   | DmaDescriptorSkip4       | DmaResetOff,
+   
+   /* 1000 Mb/s mode */
+   DmaControlInit1000     = DmaStoreAndForward,//       | DmaTxSecondFrame ,
+
+   /* 100 Mb/s mode */
+   DmaControlInit100      = DmaStoreAndForward,
+   
+   /* 10 Mb/s mode */
+   DmaControlInit10       = DmaStoreAndForward,
+
+  /* Interrupt groups */
+  DmaIntErrorMask         = DmaIntBusError,           /* Error */
+  DmaIntRxAbnMask         = DmaIntRxNoBuffer,         /* receiver abnormal interrupt */
+  DmaIntRxNormMask        = DmaIntRxCompleted,        /* receiver normal interrupt   */
+  DmaIntRxStoppedMask     = DmaIntRxStopped,          /* receiver stopped */
+  DmaIntTxAbnMask         = DmaIntTxUnderflow,        /* transmitter abnormal interrupt */
+  DmaIntTxNormMask        = DmaIntTxCompleted,        /* transmitter normal interrupt */
+  DmaIntTxStoppedMask     = DmaIntTxStopped,          /* transmitter stopped */
+
+  DmaIntEnable            = DmaIeNormal     | DmaIeAbnormal    | DmaIntErrorMask
+                          | DmaIntRxAbnMask | DmaIntRxNormMask | DmaIntRxStoppedMask
+                          | DmaIntTxAbnMask | DmaIntTxNormMask | DmaIntTxStoppedMask,
+  DmaIntDisable           = 0,
+};
+
+
+/**********************************************************
+ * Mac Management Counters (MMC)
+ **********************************************************/
+
+enum MMC_ENABLE
+{
+	GmacMmcCntrl			= 0x0100,	/* mmc control for operating mode of MMC						*/
+	GmacMmcIntrRx			= 0x0104,	/* maintains interrupts generated by rx counters					*/
+	GmacMmcIntrTx			= 0x0108,	/* maintains interrupts generated by tx counters					*/
+	GmacMmcIntrMaskRx		= 0x010C,	/* mask for interrupts generated from rx counters					*/
+	GmacMmcIntrMaskTx		= 0x0110,	/* mask for interrupts generated from tx counters					*/
+};
+enum MMC_TX
+{
+	GmacMmcTxOctetCountGb		= 0x0114,	/*Bytes Tx excl. of preamble and retried bytes     (Good or Bad)			*/
+	GmacMmcTxFrameCountGb		= 0x0118,	/*Frames Tx excl. of retried frames	           (Good or Bad)			*/
+	GmacMmcTxBcFramesG		= 0x011C,	/*Broadcast Frames Tx 				   (Good)				*/
+	GmacMmcTxMcFramesG		= 0x0120,	/*Multicast Frames Tx				   (Good)				*/
+	
+	GmacMmcTx64OctetsGb		= 0x0124,	/*Tx with len 64 bytes excl. of pre and retried    (Good or Bad)			*/
+	GmacMmcTx65To127OctetsGb	= 0x0128,	/*Tx with len >64 bytes <=127 excl. of pre and retried    (Good or Bad)			*/
+	GmacMmcTx128To255OctetsGb	= 0x012C,	/*Tx with len >128 bytes <=255 excl. of pre and retried   (Good or Bad)			*/
+	GmacMmcTx256To511OctetsGb	= 0x0130,	/*Tx with len >256 bytes <=511 excl. of pre and retried   (Good or Bad)			*/
+	GmacMmcTx512To1023OctetsGb	= 0x0134,	/*Tx with len >512 bytes <=1023 excl. of pre and retried  (Good or Bad)			*/
+	GmacMmcTx1024ToMaxOctetsGb	= 0x0138,	/*Tx with len >1024 bytes <=MaxSize excl. of pre and retried (Good or Bad)		*/
+	
+	GmacMmcTxUcFramesGb		= 0x013C,	/*Unicast Frames Tx 					 (Good or Bad)			*/
+	GmacMmcTxMcFramesGb		= 0x0140,	/*Multicast Frames Tx				   (Good and Bad)			*/
+	GmacMmcTxBcFramesGb		= 0x0144,	/*Broadcast Frames Tx 				   (Good and Bad)			*/
+	GmacMmcTxUnderFlowError		= 0x0148,	/*Frames aborted due to Underflow error							*/
+	GmacMmcTxSingleColG		= 0x014C,	/*Successfully Tx Frames after singel collision in Half duplex mode			*/
+	GmacMmcTxMultiColG		= 0x0150,	/*Successfully Tx Frames after more than singel collision in Half duplex mode		*/
+	GmacMmcTxDeferred		= 0x0154,	/*Successfully Tx Frames after a deferral in Half duplex mode				*/
+	GmacMmcTxLateCol		= 0x0158,	/*Frames aborted due to late collision error						*/
+	GmacMmcTxExessCol		= 0x015C,	/*Frames aborted due to excessive (16) collision errors					*/
+	GmacMmcTxCarrierError		= 0x0160,	/*Frames aborted due to carrier sense error (No carrier or Loss of carrier)		*/
+	GmacMmcTxOctetCountG		= 0x0164,	/*Bytes Tx excl. of preamble and retried bytes     (Good) 				*/
+	GmacMmcTxFrameCountG		= 0x0168,	/*Frames Tx 				           (Good)				*/
+	GmacMmcTxExessDef		= 0x016C,	/*Frames aborted due to excessive deferral errors (deferred for more than 2 max-sized frame times)*/
+	
+	GmacMmcTxPauseFrames		= 0x0170,	/*Number of good pause frames Tx.							*/
+	GmacMmcTxVlanFramesG		= 0x0174,	/*Number of good Vlan frames Tx excl. retried frames					*/
+};
+enum MMC_RX
+{
+	GmacMmcRxFrameCountGb		= 0x0180,	/*Frames Rx 				           (Good or Bad)			*/
+	GmacMmcRxOctetCountGb		= 0x0184,	/*Bytes Rx excl. of preamble and retried bytes     (Good or Bad)			*/
+	GmacMmcRxOctetCountG		= 0x0188,	/*Bytes Rx excl. of preamble and retried bytes     (Good) 				*/
+	GmacMmcRxBcFramesG		= 0x018C,	/*Broadcast Frames Rx 				   (Good)				*/
+	GmacMmcRxMcFramesG		= 0x0190,	/*Multicast Frames Rx				   (Good)				*/
+	
+	GmacMmcRxCrcError		= 0x0194,	/*Number of frames received with CRC error						*/
+	GmacMmcRxAlignError		= 0x0198,	/*Number of frames received with alignment (dribble) error. Only in 10/100mode		*/
+	GmacMmcRxRuntError		= 0x019C,	/*Number of frames received with runt (<64 bytes and CRC error) error			*/
+	GmacMmcRxJabberError		= 0x01A0,	/*Number of frames rx with jabber (>1518/1522 or >9018/9022 and CRC) 			*/
+	GmacMmcRxUnderSizeG		= 0x01A4,	/*Number of frames received with <64 bytes without any error				*/
+	GmacMmcRxOverSizeG		= 0x01A8,	/*Number of frames received with >1518/1522 bytes without any error			*/
+	
+	GmacMmcRx64OctetsGb		= 0x01AC,	/*Rx with len 64 bytes excl. of pre and retried    (Good or Bad)			*/
+	GmacMmcRx65To127OctetsGb	= 0x01B0,	/*Rx with len >64 bytes <=127 excl. of pre and retried    (Good or Bad)			*/
+	GmacMmcRx128To255OctetsGb	= 0x01B4,	/*Rx with len >128 bytes <=255 excl. of pre and retried   (Good or Bad)			*/
+	GmacMmcRx256To511OctetsGb	= 0x01B8,	/*Rx with len >256 bytes <=511 excl. of pre and retried   (Good or Bad)			*/
+	GmacMmcRx512To1023OctetsGb	= 0x01BC,	/*Rx with len >512 bytes <=1023 excl. of pre and retried  (Good or Bad)			*/
+	GmacMmcRx1024ToMaxOctetsGb	= 0x01C0,	/*Rx with len >1024 bytes <=MaxSize excl. of pre and retried (Good or Bad)		*/
+	
+	GmacMmcRxUcFramesG		= 0x01C4,	/*Unicast Frames Rx 					 (Good)				*/
+	GmacMmcRxLengthError		= 0x01C8,	/*Number of frames received with Length type field != frame size			*/
+	GmacMmcRxOutOfRangeType		= 0x01CC,	/*Number of frames received with length field != valid frame size			*/
+	
+	GmacMmcRxPauseFrames		= 0x01D0,	/*Number of good pause frames Rx.							*/
+	GmacMmcRxFifoOverFlow		= 0x01D4,	/*Number of missed rx frames due to FIFO overflow					*/
+	GmacMmcRxVlanFramesGb		= 0x01D8,	/*Number of good Vlan frames Rx 							*/
+	
+	GmacMmcRxWatchdobError		= 0x01DC,	/*Number of frames rx with error due to watchdog timeout error				*/
+};
+enum MMC_IP_RELATED
+{
+	GmacMmcRxIpcIntrMask		= 0x0200,	/*Maintains the mask for interrupt generated from rx IPC statistic counters 		*/
+	GmacMmcRxIpcIntr		= 0x0208,	/*Maintains the interrupt that rx IPC statistic counters generate			*/
+	
+	GmacMmcRxIpV4FramesG		= 0x0210,	/*Good IPV4 datagrams received								*/
+	GmacMmcRxIpV4HdrErrFrames	= 0x0214,	/*Number of IPV4 datagrams received with header errors					*/
+	GmacMmcRxIpV4NoPayFrames	= 0x0218,	/*Number of IPV4 datagrams received which didnot have TCP/UDP/ICMP payload		*/
+	GmacMmcRxIpV4FragFrames		= 0x021C,	/*Number of IPV4 datagrams received with fragmentation					*/
+	GmacMmcRxIpV4UdpChkDsblFrames	= 0x0220,	/*Number of IPV4 datagrams received that had a UDP payload checksum disabled		*/
+	
+	GmacMmcRxIpV6FramesG		= 0x0224,	/*Good IPV6 datagrams received								*/
+	GmacMmcRxIpV6HdrErrFrames	= 0x0228,	/*Number of IPV6 datagrams received with header errors					*/
+	GmacMmcRxIpV6NoPayFrames	= 0x022C,	/*Number of IPV6 datagrams received which didnot have TCP/UDP/ICMP payload		*/
+	
+	GmacMmcRxUdpFramesG		= 0x0230,	/*Number of good IP datagrams with good UDP payload					*/
+	GmacMmcRxUdpErrorFrames		= 0x0234,	/*Number of good IP datagrams with UDP payload having checksum error			*/
+	
+	GmacMmcRxTcpFramesG		= 0x0238,	/*Number of good IP datagrams with good TDP payload					*/
+	GmacMmcRxTcpErrorFrames		= 0x023C,	/*Number of good IP datagrams with TCP payload having checksum error			*/
+
+	GmacMmcRxIcmpFramesG		= 0x0240,	/*Number of good IP datagrams with good Icmp payload					*/
+	GmacMmcRxIcmpErrorFrames	= 0x0244,	/*Number of good IP datagrams with Icmp payload having checksum error			*/
+	
+	GmacMmcRxIpV4OctetsG		= 0x0250,	/*Good IPV4 datagrams received excl. Ethernet hdr,FCS,Pad,Ip Pad bytes			*/
+	GmacMmcRxIpV4HdrErrorOctets	= 0x0254,	/*Number of bytes in IPV4 datagram with header errors					*/
+	GmacMmcRxIpV4NoPayOctets	= 0x0258,	/*Number of bytes in IPV4 datagram with no TCP/UDP/ICMP payload				*/
+	GmacMmcRxIpV4FragOctets		= 0x025C,	/*Number of bytes received in fragmented IPV4 datagrams 				*/
+	GmacMmcRxIpV4UdpChkDsblOctets	= 0x0260,	/*Number of bytes received in UDP segment that had UDP checksum disabled		*/
+	
+	GmacMmcRxIpV6OctetsG		= 0x0264,	/*Good IPV6 datagrams received excl. Ethernet hdr,FCS,Pad,Ip Pad bytes			*/
+	GmacMmcRxIpV6HdrErrorOctets	= 0x0268,	/*Number of bytes in IPV6 datagram with header errors					*/
+	GmacMmcRxIpV6NoPayOctets	= 0x026C,	/*Number of bytes in IPV6 datagram with no TCP/UDP/ICMP payload				*/
+	
+	GmacMmcRxUdpOctetsG		= 0x0270,	/*Number of bytes in IP datagrams with good UDP payload					*/
+	GmacMmcRxUdpErrorOctets		= 0x0274,	/*Number of bytes in IP datagrams with UDP payload having checksum error		*/
+	
+	GmacMmcRxTcpOctetsG		= 0x0278,	/*Number of bytes in IP datagrams with good TDP payload					*/
+	GmacMmcRxTcpErrorOctets		= 0x027C,	/*Number of bytes in IP datagrams with TCP payload having checksum error		*/
+	
+	GmacMmcRxIcmpOctetsG		= 0x0280,	/*Number of bytes in IP datagrams with good Icmp payload				*/
+	GmacMmcRxIcmpErrorOctets	= 0x0284,	/*Number of bytes in IP datagrams with Icmp payload having checksum error		*/
+};
+
+
+enum MMC_CNTRL_REG_BIT_DESCRIPTIONS
+{
+	GmacMmcCounterFreeze		= 0x00000008,		/* when set MMC counters freeze to current value				*/
+	GmacMmcCounterResetOnRead	= 0x00000004,		/* when set MMC counters will be reset to 0 after read				*/
+	GmacMmcCounterStopRollover	= 0x00000002,		/* when set counters will not rollover after max value				*/
+	GmacMmcCounterReset		= 0x00000001,		/* when set all counters wil be reset (automatically cleared after 1 clk)	*/
+	
+};
+
+enum MMC_RX_INTR_MASK_AND_STATUS_BIT_DESCRIPTIONS
+{
+	GmacMmcRxWDInt			= 0x00800000,		/* set when rxwatchdog error reaches half of max value				*/
+	GmacMmcRxVlanInt		= 0x00400000,		/* set when GmacMmcRxVlanFramesGb counter reaches half of max value		*/
+	GmacMmcRxFifoOverFlowInt	= 0x00200000,		/* set when GmacMmcRxFifoOverFlow counter reaches half of max value		*/
+	GmacMmcRxPauseFrameInt		= 0x00100000,		/* set when GmacMmcRxPauseFrames counter reaches half of max value		*/
+	GmacMmcRxOutOfRangeInt		= 0x00080000,		/* set when GmacMmcRxOutOfRangeType counter reaches half of max value		*/
+	GmacMmcRxLengthErrorInt		= 0x00040000,		/* set when GmacMmcRxLengthError counter reaches half of max value		*/
+	GmacMmcRxUcFramesInt		= 0x00020000,		/* set when GmacMmcRxUcFramesG counter reaches half of max value		*/
+	GmacMmcRx1024OctInt		= 0x00010000,		/* set when GmacMmcRx1024ToMaxOctetsGb counter reaches half of max value	*/
+	GmacMmcRx512OctInt		= 0x00008000,		/* set when GmacMmcRx512To1023OctetsGb counter reaches half of max value	*/
+	GmacMmcRx256OctInt		= 0x00004000,		/* set when GmacMmcRx256To511OctetsGb counter reaches half of max value		*/
+	GmacMmcRx128OctInt		= 0x00002000,		/* set when GmacMmcRx128To255OctetsGb counter reaches half of max value		*/
+	GmacMmcRx65OctInt		= 0x00001000,		/* set when GmacMmcRx65To127OctetsG counter reaches half of max value		*/
+	GmacMmcRx64OctInt		= 0x00000800,		/* set when GmacMmcRx64OctetsGb counter reaches half of max value		*/
+	GmacMmcRxOverSizeInt		= 0x00000400,		/* set when GmacMmcRxOverSizeG counter reaches half of max value		*/
+	GmacMmcRxUnderSizeInt		= 0x00000200,		/* set when GmacMmcRxUnderSizeG counter reaches half of max value		*/
+	GmacMmcRxJabberErrorInt		= 0x00000100,		/* set when GmacMmcRxJabberError counter reaches half of max value		*/
+	GmacMmcRxRuntErrorInt		= 0x00000080,		/* set when GmacMmcRxRuntError counter reaches half of max value		*/
+	GmacMmcRxAlignErrorInt		= 0x00000040,		/* set when GmacMmcRxAlignError counter reaches half of max value		*/
+	GmacMmcRxCrcErrorInt		= 0x00000020,		/* set when GmacMmcRxCrcError counter reaches half of max value			*/
+	GmacMmcRxMcFramesInt		= 0x00000010,		/* set when GmacMmcRxMcFramesG counter reaches half of max value		*/
+	GmacMmcRxBcFramesInt		= 0x00000008,		/* set when GmacMmcRxBcFramesG counter reaches half of max value		*/
+	GmacMmcRxOctetGInt		= 0x00000004,		/* set when GmacMmcRxOctetCountG counter reaches half of max value		*/
+	GmacMmcRxOctetGbInt		= 0x00000002,		/* set when GmacMmcRxOctetCountGb counter reaches half of max value		*/
+	GmacMmcRxFrameInt		= 0x00000001,		/* set when GmacMmcRxFrameCountGb counter reaches half of max value		*/
+};
+
+enum MMC_TX_INTR_MASK_AND_STATUS_BIT_DESCRIPTIONS
+{
+
+	GmacMmcTxVlanInt		= 0x01000000,		/* set when GmacMmcTxVlanFramesG counter reaches half of max value		*/
+	GmacMmcTxPauseFrameInt		= 0x00800000,		/* set when GmacMmcTxPauseFrames counter reaches half of max value		*/
+	GmacMmcTxExessDefInt		= 0x00400000,		/* set when GmacMmcTxExessDef counter reaches half of max value			*/
+	GmacMmcTxFrameInt		= 0x00200000,		/* set when GmacMmcTxFrameCount counter reaches half of max value		*/
+	GmacMmcTxOctetInt		= 0x00100000,		/* set when GmacMmcTxOctetCountG counter reaches half of max value		*/
+	GmacMmcTxCarrierErrorInt	= 0x00080000,		/* set when GmacMmcTxCarrierError counter reaches half of max value		*/
+	GmacMmcTxExessColInt		= 0x00040000,		/* set when GmacMmcTxExessCol counter reaches half of max value			*/
+	GmacMmcTxLateColInt		= 0x00020000,		/* set when GmacMmcTxLateCol counter reaches half of max value			*/
+	GmacMmcTxDeferredInt		= 0x00010000,		/* set when GmacMmcTxDeferred counter reaches half of max value			*/
+	GmacMmcTxMultiColInt		= 0x00008000,		/* set when GmacMmcTxMultiColG counter reaches half of max value		*/
+	GmacMmcTxSingleCol		= 0x00004000,		/* set when GmacMmcTxSingleColG	counter reaches half of max value		*/
+	GmacMmcTxUnderFlowErrorInt	= 0x00002000,		/* set when GmacMmcTxUnderFlowError counter reaches half of max value		*/
+	GmacMmcTxBcFramesGbInt 		= 0x00001000,		/* set when GmacMmcTxBcFramesGb	counter reaches half of max value		*/
+	GmacMmcTxMcFramesGbInt 		= 0x00000800,		/* set when GmacMmcTxMcFramesGb	counter reaches half of max value		*/
+	GmacMmcTxUcFramesInt 		= 0x00000400,		/* set when GmacMmcTxUcFramesGb counter reaches half of max value		*/
+	GmacMmcTx1024OctInt 		= 0x00000200,		/* set when GmacMmcTx1024ToMaxOctetsGb counter reaches half of max value	*/
+	GmacMmcTx512OctInt 		= 0x00000100,		/* set when GmacMmcTx512To1023OctetsGb counter reaches half of max value	*/
+	GmacMmcTx256OctInt 		= 0x00000080,		/* set when GmacMmcTx256To511OctetsGb counter reaches half of max value		*/
+	GmacMmcTx128OctInt 		= 0x00000040,		/* set when GmacMmcTx128To255OctetsGb counter reaches half of max value		*/
+	GmacMmcTx65OctInt 		= 0x00000020,		/* set when GmacMmcTx65To127OctetsGb counter reaches half of max value		*/
+	GmacMmcTx64OctInt 		= 0x00000010,		/* set when GmacMmcTx64OctetsGb	counter reaches half of max value		*/
+	GmacMmcTxMcFramesInt 		= 0x00000008,		/* set when GmacMmcTxMcFramesG counter reaches half of max value		*/
+	GmacMmcTxBcFramesInt 		= 0x00000004,		/* set when GmacMmcTxBcFramesG counter reaches half of max value		*/
+	GmacMmcTxFrameGbInt 		= 0x00000002,		/* set when GmacMmcTxFrameCountGb counter reaches half of max value		*/
+	GmacMmcTxOctetGbInt 		= 0x00000001,		/* set when GmacMmcTxOctetCountGb counter reaches half of max value		*/
+	
+};
+
+
+/**********************************************************
+ * Power Management (PMT) Block 
+ **********************************************************/
+
+/**
+  * PMT supports the reception of network (remote) wake-up frames and Magic packet frames.
+  * It generates interrupts for wake-up frames and Magic packets received by GMAC.
+  * PMT sits in Rx path and is enabled with remote wake-up frame enable and Magic packet enable.
+  * These enable are in PMT control and Status register and are programmed by apllication.
+  *
+  * When power down mode is enabled in PMT, all rx frames are dropped by the core. Core comes
+  * out of power down mode only when either Magic packe tor a Remote wake-up frame is received 
+  * and the corresponding detection is enabled.
+  *
+  * Driver need not be modified to support this feature. Only Api to put the device in to power 
+  * down mode is sufficient
+  */
+
+#define WAKEUP_REG_LENGTH	8 				/*This is the reg length for wake up register configuration*/
+
+enum GmacPmtCtrlStatusBitDefinition
+{
+	GmacPmtFrmFilterPtrReset	= 0x80000000,		/* when set remote wake-up frame filter register pointer to 3'b000 */
+	GmacPmtGlobalUnicast		= 0x00000200,		/* When set enables any unicast packet to be a wake-up frame       */
+	GmacPmtWakeupFrameReceived	= 0x00000040,		/* Wake up frame received					   */
+	GmacPmtMagicPktReceived		= 0x00000020,		/* Magic Packet received					   */
+	GmacPmtWakeupFrameEnable	= 0x00000004,		/* Wake-up frame enable						   */
+	GmacPmtMagicPktEnable		= 0x00000002,		/* Magic packet enable						   */
+	GmacPmtPowerDown		= 0x00000001,		/* Power Down							   */
+};
+
+
+
+
+/**********************************************************
+ * IEEE 1588-2008 Precision Time Protocol (PTP) Support 
+ **********************************************************/
+enum PTPMessageType
+{
+    SYNC        	   = 0x0,
+    Delay_Req    	   = 0x1,
+    Pdelay_Req             = 0x2,
+    Pdelay_Resp            = 0x3,
+    Follow_up              = 0x8,
+    Delay_Resp             = 0x9,
+    Pdelay_Resp_Follow_Up  = 0xA,
+    Announce               = 0xB,
+    Signaling              = 0xC,
+    Management             = 0xD,
+};
+
+
+
+typedef struct TimeStampStruct    
+{ 
+  u32   TSversion;      /* PTP Version 1 or PTP version2                                                                          */
+  u32   TSmessagetype;  /* Message type associated with this time stamp                                                           */                              
+
+  u16   TShighest16;    /* Highest 16 bit time stamp value, Valid onley when ADV_TIME_HIGH_WORD configured in corekit		  */
+  u32   TSupper32;      /* Most significant 32 bit time stamp value								  */
+  u32   TSlower32;      /* Least Significat 32 bit time stamp value								  */
+
+} TimeStamp;
+
+
+/**
+  * IEEE 1588-2008 is the optional module to support Ethernet frame time stamping.
+  * Sixty four (+16) bit time stamps are given in each frames transmit and receive status.
+  * The driver assumes the following
+  *  1. "IEEE 1588 Time Stamping" "TIME_STAMPING"is ENABLED in corekit
+  *  2. "IEEE 1588 External Time Stamp Input Enable" "EXT_TIME_STAMPING" is DISABLED in corekit
+  *  3. "IEEE 1588 Advanced Time Stamp support" "ADV_TIME_STAMPING" is ENABLED in corekit
+  *  4. "IEEE 1588 Higher Word Register Enable" "ADV_TIME_HIGH_WORD" is ENABLED in corekit
+  */
+
+/* GmacTSControl  = 0x0700,   Controls the Timestamp update logic  : only when IEEE 1588 time stamping is enabled in corekit         */
+enum GmacTSControlReg
+{
+  GmacTSENMACADDR	  = 0x00040000,     /* Enable Mac Addr for PTP filtering     18            RW         0     */
+  
+  GmacTSCLKTYPE		  = 0x00030000,     /* Select the type of clock node         17:16         RW         00    */
+  /*
+      TSCLKTYPE        TSMSTRENA      TSEVNTENA         Messages for wihich TS snapshot is taken
+       00/01                X             0              SYNC, FOLLOW_UP, DELAY_REQ, DELAY_RESP
+       00/01                1             0              DELAY_REQ
+       00/01                0             1              SYNC
+        10                  NA            0              SYNC, FOLLOW_UP, DELAY_REQ, DELAY_RESP
+        10                  NA            1              SYNC, FOLLOW_UP
+        11                  NA            0              SYNC, FOLLOW_UP, DELAY_REQ, DELAY_RESP, PDELAY_REQ, PDELAY_RESP
+        11                  NA            1              SYNC, PDELAY_REQ, PDELAY_RESP        
+  */
+  GmacTSOrdClk		  = 0x00000000,	    /* 00=> Ordinary clock*/
+  GmacTSBouClk		  = 0x00010000,	    /* 01=> Boundary clock*/
+  GmacTSEtoEClk		  = 0x00020000,	    /* 10=> End-to-End transparent clock*/
+  GmacTSPtoPClk		  = 0x00030000,	    /* 11=> P-to-P transparent clock*/
+
+  GmacTSMSTRENA		  = 0x00008000,	    /* Ena TS Snapshot for Master Messages   15            RW         0     */
+  GmacTSEVNTENA		  = 0x00004000,	    /* Ena TS Snapshot for Event Messages    14            RW         0     */
+  GmacTSIPV4ENA		  = 0x00002000,	    /* Ena TS snapshot for IPv4              13            RW         1     */
+  GmacTSIPV6ENA		  = 0x00001000,	    /* Ena TS snapshot for IPv6              12            RW         0     */
+  GmacTSIPENA		  = 0x00000800,	    /* Ena TS snapshot for PTP over E'net    11            RW         0     */
+  GmacTSVER2ENA		  = 0x00000400,	    /* Ena PTP snooping for version 2        10            RW         0     */
+
+  GmacTSCTRLSSR           = 0x00000200,      /* Digital or Binary Rollover           9             RW         0     */
+
+  GmacTSENALL             = 0x00000100,      /* Enable TS fro all frames (Ver2 only) 8             RW         0     */
+
+  GmacTSADDREG		  = 0x00000020,	     /* Addend Register Update		     5             RW_SC      0     */
+  GmacTSUPDT		  = 0x00000008,	     /* Time Stamp Update		     3             RW_SC      0     */
+  GmacTSINT		  = 0x00000004,	     /* Time Atamp Initialize		     2             RW_SC      0     */
+ 
+  GmacTSTRIG		  = 0x00000010,	     /* Time stamp interrupt Trigger Enable  4             RW_SC      0     */
+
+  GmacTSCFUPDT		  = 0x00000002,	     /* Time Stamp Fine/Coarse		     1             RW         0     */
+  GmacTSCUPDTCoarse	  = 0x00000000,	     /* 0=> Time Stamp update method is coarse			            */
+  GmacTSCUPDTFine	  = 0x00000002,	     /* 1=> Time Stamp update method is fine				    */
+
+  GmacTSENA		  = 0x00000001,      /* Time Stamp Enable                    0             RW         0     */
+};
+
+
+/*  GmacTSSubSecIncr     	  = 0x0704,   8 bit value by which sub second register is incremented     : only when IEEE 1588 time stamping without external timestamp input */
+enum GmacTSSubSecIncrReg
+{
+  GmacSSINCMsk            = 0x000000FF,       /* Only Lower 8 bits are valid bits     7:0           RW         00    */
+};
+
+/*  GmacTSLow   	  = 0x070C,   Indicates whether the timestamp low count is positive or negative; for Adv timestamp it is always zero */
+enum GmacTSSign
+{
+  GmacTSSign              = 0x80000000,      /* PSNT                                  31            RW          0    */
+  GmacTSPositive          = 0x00000000,
+  GmacTSNegative          = 0x80000000,
+};
+
+/*GmacTargetTimeLow   	  = 0x0718,   32 bit nano seconds(MS) to be compared with system time     : only when IEEE 1588 time stamping without external timestamp input */
+enum GmacTSLowReg
+{
+  GmacTSDecThr            = 0x3B9AC9FF,      /*when TSCTRLSSR is set the max value for GmacTargetTimeLowReg and GmacTimeStampLow register is 0x3B9AC9FF at 1ns precision       */
+};
+
+/* GmacTSHighWord          = 0x0724,   Time Stamp Higher Word Register (Version 2 only); only lower 16 bits are valid                                                   */
+enum GmacTSHighWordReg          
+{
+  GmacTSHighWordMask      = 0x0000FFFF,     /* Time Stamp Higher work register has only lower 16 bits valid			*/
+};
+/*GmacTSStatus            = 0x0728,   Time Stamp Status Register                                                                                                       */
+enum GmacTSStatusReg
+{
+  GmacTSTargTimeReached   = 0x00000002,     /* Time Stamp Target Time Reached          1             RO          0    */
+  GmacTSSecondsOverflow   = 0x00000001,     /* Time Stamp Seconds Overflow             0             RO          0    */
+};            
+
+
+/**********************************************************
+ * Time stamp related functions
+ **********************************************************/
+void synopGMAC_TS_enable(synopGMACdevice *gmacdev);
+void synopGMAC_TS_disable(synopGMACdevice *gmacdev);
+
+void synopGMAC_TS_int_enable(synopGMACdevice *gmacdev);
+void synopGMAC_TS_int_disable(synopGMACdevice *gmacdev);
+
+void synopGMAC_TS_mac_addr_filt_enable(synopGMACdevice *gmacdev);
+void synopGMAC_TS_mac_addr_filt_disable(synopGMACdevice *gmacdev);
+void synopGMAC_TS_set_clk_type(synopGMACdevice *gmacdev, u32 clk_type);
+void synopGMAC_TS_master_enable(synopGMACdevice *gmacdev);			// Only for Ordinary clock and Boundary clock and "Advanced Time Stamp"
+void synopGMAC_TS_master_disable(synopGMACdevice *gmacdev);			// Only for Ordinary clock and Boundary clock and "Advanced Time Stamp"
+void synopGMAC_TS_event_enable(synopGMACdevice *gmacdev);			// Only for "Advanced Time Stamp"
+void synopGMAC_TS_event_disable(synopGMACdevice *gmacdev);                   // Only for "Advanced Time Stamp"
+void synopGMAC_TS_IPV4_enable(synopGMACdevice *gmacdev);                     // Only for "Advanced Time Stamp"
+void synopGMAC_TS_IPV4_disable(synopGMACdevice *gmacdev);                    // Only for "Advanced Time Stamp"
+void synopGMAC_TS_IPV6_enable(synopGMACdevice *gmacdev);                     // Only for "Advanced Time Stamp"
+void synopGMAC_TS_IPV6_disable(synopGMACdevice *gmacdev);                    // Only for "Advanced Time Stamp"
+void synopGMAC_TS_ptp_over_ethernet_enable(synopGMACdevice *gmacdev);        // Only for "Advanced Time Stamp"
+void synopGMAC_TS_ptp_over_ethernet_disable(synopGMACdevice *gmacdev);       // Only for "Advanced Time Stamp"
+void synopGMAC_TS_pkt_snoop_ver2(synopGMACdevice *gmacdev);                  // Only for "Advanced Time Stamp"
+void synopGMAC_TS_pkt_snoop_ver1(synopGMACdevice *gmacdev);                  // Only for "Advanced Time Stamp"
+
+void synopGMAC_TS_digital_rollover_enable(synopGMACdevice *gmacdev);		
+void synopGMAC_TS_binary_rollover_enable(synopGMACdevice *gmacdev);
+void synopGMAC_TS_all_frames_enable(synopGMACdevice *gmacdev);               // Only for "Advanced Time Stamp"
+void synopGMAC_TS_all_frames_disable(synopGMACdevice *gmacdev);              // Only for "Advanced Time Stamp"
+
+s32 synopGMAC_TS_addend_update(synopGMACdevice *gmacdev, u32 addend_value);
+s32 synopGMAC_TS_timestamp_update(synopGMACdevice *gmacdev, u32 high_value, u32 low_value);
+s32 synopGMAC_TS_timestamp_init(synopGMACdevice *gmacdev, u32 high_value, u32 low_value);
+
+void synopGMAC_TS_coarse_update(synopGMACdevice *gmacdev);			// Only if "fine correction" enabled
+void synopGMAC_TS_fine_update(synopGMACdevice *gmacdev);			// Only if "fine correction" enabled
+
+void synopGMAC_TS_subsecond_init(synopGMACdevice *gmacdev, u32 sub_sec_inc_val); // Update should happen making use of subsecond mask
+void synopGMAC_TS_read_timestamp(synopGMACdevice *gmacdev, u16 * higher_sec_val, 
+                           u32 * sec_val, u32 *  sub_sec_val);                   // Reads the timestamp low,high and higher(Ver2) registers in the the struct pointer; readonly contents
+void synopGMAC_TS_load_target_timestamp(synopGMACdevice *gmacdev, u32 sec_val, u32 sub_sec_val); //Loads the timestamp target register with the values provided
+
+void synopGMAC_TS_load_timestamp_higher_val(synopGMACdevice *gmacdev, u32 higher_sec_val);
+void synopGMAC_TS_read_timestamp_higher_val(synopGMACdevice *gmacdev, u16 * higher_sec_val);
+void synopGMAC_TS_read_target_timestamp(synopGMACdevice *gmacdev, u32 * sec_val, u32 * sub_sec_val); //Read the target time stamp register contents
+
+
+/**********************************************************
+ * Common functions
+ **********************************************************/
+s32 synopGMAC_set_mdc_clk_div(synopGMACdevice *gmacdev,u32 clk_div_val);
+u32 synopGMAC_get_mdc_clk_div(synopGMACdevice *gmacdev);
+s32 synopGMAC_read_phy_reg(u32 *RegBase,u32 PhyBase, u32 RegOffset, u16 * data);
+s32 synopGMAC_write_phy_reg(u32 *RegBase, u32 PhyBase, u32 RegOffset, u16 data);
+s32 synopGMAC_phy_loopback(synopGMACdevice *gmacdev, bool loopback);
+s32 synopGMAC_read_version (synopGMACdevice * gmacdev) ;
+s32 synopGMAC_reset (synopGMACdevice * gmacdev ); 
+s32 synopGMAC_dma_bus_mode_init(synopGMACdevice * gmacdev, u32 init_value );
+s32 synopGMAC_dma_control_init(synopGMACdevice * gmacdev, u32 init_value);
+void synopGMAC_wd_enable(synopGMACdevice * gmacdev);
+void synopGMAC_wd_disable(synopGMACdevice * gmacdev);
+void synopGMAC_jab_enable(synopGMACdevice * gmacdev);
+void synopGMAC_jab_disable(synopGMACdevice * gmacdev);
+void synopGMAC_frame_burst_enable(synopGMACdevice * gmacdev);
+void synopGMAC_frame_burst_disable(synopGMACdevice * gmacdev);
+void synopGMAC_jumbo_frame_enable(synopGMACdevice * gmacdev);
+void synopGMAC_jumbo_frame_disable(synopGMACdevice * gmacdev);
+void synopGMAC_select_gmii(synopGMACdevice * gmacdev);
+void synopGMAC_select_mii(synopGMACdevice * gmacdev);
+void synopGMAC_rx_own_enable(synopGMACdevice * gmacdev);
+void synopGMAC_rx_own_disable(synopGMACdevice * gmacdev);
+void synopGMAC_loopback_on(synopGMACdevice * gmacdev);
+void synopGMAC_loopback_off(synopGMACdevice * gmacdev);
+void synopGMAC_set_full_duplex(synopGMACdevice * gmacdev);
+void synopGMAC_set_half_duplex(synopGMACdevice * gmacdev);
+void synopGMAC_retry_enable(synopGMACdevice * gmacdev);
+void synopGMAC_retry_disable(synopGMACdevice * gmacdev);
+void synopGMAC_pad_crc_strip_enable(synopGMACdevice * gmacdev);
+void synopGMAC_pad_crc_strip_disable(synopGMACdevice * gmacdev);
+void synopGMAC_back_off_limit(synopGMACdevice * gmacdev, u32 value);
+void synopGMAC_deferral_check_enable(synopGMACdevice * gmacdev);
+void synopGMAC_deferral_check_disable(synopGMACdevice * gmacdev);
+void synopGMAC_rx_enable(synopGMACdevice * gmacdev);
+void synopGMAC_rx_disable(synopGMACdevice * gmacdev);
+void synopGMAC_tx_enable(synopGMACdevice * gmacdev);
+void synopGMAC_tx_disable(synopGMACdevice * gmacdev);
+void synopGMAC_frame_filter_enable(synopGMACdevice * gmacdev);
+void synopGMAC_frame_filter_disable(synopGMACdevice * gmacdev);
+void synopGMAC_write_hash_table_high(synopGMACdevice * gmacdev, u32 data);
+void synopGMAC_write_hash_table_low(synopGMACdevice * gmacdev, u32 data);
+void synopGMAC_hash_perfect_filter_enable(synopGMACdevice * gmacdev);
+void synopGMAC_Hash_filter_only_enable(synopGMACdevice * gmacdev);
+void synopGMAC_src_addr_filter_enable(synopGMACdevice * gmacdev);
+void synopGMAC_src_addr_filter_disable(synopGMACdevice * gmacdev);
+void synopGMAC_dst_addr_filter_inverse(synopGMACdevice * gmacdev);
+void synopGMAC_dst_addr_filter_normal(synopGMACdevice * gmacdev);
+void synopGMAC_set_pass_control(synopGMACdevice * gmacdev,u32 passcontrol);
+void synopGMAC_broadcast_enable(synopGMACdevice * gmacdev);
+void synopGMAC_broadcast_disable(synopGMACdevice * gmacdev);
+void synopGMAC_multicast_enable(synopGMACdevice * gmacdev);
+void synopGMAC_multicast_disable(synopGMACdevice * gmacdev);
+void synopGMAC_multicast_hash_filter_enable(synopGMACdevice * gmacdev);
+void synopGMAC_multicast_hash_filter_disable(synopGMACdevice * gmacdev);
+void synopGMAC_promisc_enable(synopGMACdevice * gmacdev);
+void synopGMAC_promisc_disable(synopGMACdevice * gmacdev);
+void synopGMAC_unicast_hash_filter_enable(synopGMACdevice * gmacdev);
+void synopGMAC_unicast_hash_filter_disable(synopGMACdevice * gmacdev);
+void synopGMAC_unicast_pause_frame_detect_enable(synopGMACdevice * gmacdev);
+void synopGMAC_unicast_pause_frame_detect_disable(synopGMACdevice * gmacdev);
+void synopGMAC_rx_flow_control_enable(synopGMACdevice * gmacdev);
+void synopGMAC_rx_flow_control_disable(synopGMACdevice * gmacdev);
+void synopGMAC_tx_flow_control_enable(synopGMACdevice * gmacdev);
+void synopGMAC_tx_flow_control_disable(synopGMACdevice * gmacdev);
+void synopGMAC_tx_activate_flow_control(synopGMACdevice * gmacdev);
+void synopGMAC_tx_deactivate_flow_control(synopGMACdevice * gmacdev);
+void synopGMAC_pause_control(synopGMACdevice *gmacdev);
+s32 synopGMAC_mac_init(synopGMACdevice * gmacdev);
+s32 synopGMAC_set_mac_addr(synopGMACdevice *gmacdev, u32 MacHigh, u32 MacLow, u8 *MacAddr);
+s32 synopGMAC_get_mac_addr(synopGMACdevice *gmacdev, u32 MacHigh, u32 MacLow, u8 *MacAddr);
+s32 synopGMAC_attach (synopGMACdevice * gmacdev, void *macBase, void *dmaBase, u32 phyBase,u8 *MacAddr); 
+void synopGMAC_rx_desc_init_ring(DmaDesc *desc, bool last_ring_desc);
+void synopGMAC_tx_desc_init_ring(DmaDesc *desc, bool last_ring_desc);
+void synopGMAC_rx_desc_init_chain(DmaDesc * desc);
+void synopGMAC_tx_desc_init_chain(DmaDesc * desc);
+s32 synopGMAC_init_tx_rx_desc_queue(synopGMACdevice *gmacdev);
+void synopGMAC_init_rx_desc_base(synopGMACdevice *gmacdev);
+void synopGMAC_init_tx_desc_base(synopGMACdevice *gmacdev);
+void synopGMAC_set_owner_dma(DmaDesc *desc);
+void synopGMAC_set_desc_sof(DmaDesc *desc);
+void synopGMAC_set_desc_eof(DmaDesc *desc);
+bool synopGMAC_is_sof_in_rx_desc(DmaDesc *desc);
+bool synopGMAC_is_eof_in_rx_desc(DmaDesc *desc);
+bool synopGMAC_is_da_filter_failed(DmaDesc *desc);
+bool synopGMAC_is_sa_filter_failed(DmaDesc *desc);
+bool synopGMAC_is_desc_owned_by_dma(DmaDesc *desc);
+u32 synopGMAC_get_rx_desc_frame_length(u32 status);
+bool synopGMAC_is_desc_valid(u32 status);
+bool synopGMAC_is_desc_empty(DmaDesc *desc);
+bool synopGMAC_is_rx_desc_valid(u32 status);
+bool synopGMAC_is_tx_aborted(u32 status);
+bool synopGMAC_is_tx_carrier_error(u32 status);
+u32 synopGMAC_get_tx_collision_count(u32 status);
+u32 synopGMAC_is_exc_tx_collisions(u32 status);
+bool synopGMAC_is_rx_frame_damaged(u32 status);
+bool synopGMAC_is_rx_frame_collision(u32 status);
+bool synopGMAC_is_rx_crc(u32 status);
+bool synopGMAC_is_frame_dribbling_errors(u32 status);
+bool synopGMAC_is_rx_frame_length_errors(u32 status);
+bool synopGMAC_is_last_rx_desc(synopGMACdevice * gmacdev,DmaDesc *desc);
+bool synopGMAC_is_last_tx_desc(synopGMACdevice * gmacdev,DmaDesc *desc);
+bool synopGMAC_is_rx_desc_chained(DmaDesc * desc);
+bool synopGMAC_is_tx_desc_chained(DmaDesc * desc);
+void synopGMAC_get_desc_data(DmaDesc * desc, u32 * Status, dma_addr_t * Buffer1, u32 * Length1, u64 * Data1, dma_addr_t * Buffer2, u32 * Length2, u64 * Data2);
+#ifdef ENH_DESC_8W
+s32 synopGMAC_get_tx_qptr(synopGMACdevice * gmacdev, u32 * Status, u32 * Buffer1, u32 * Length1, u64 * Data1, u32 * Buffer2, u32 * Length2, u64 * Data2, 
+			  u32 * Ext_Status, u32 * Time_Stamp_High, u32 * Time_Stamp_low);
+#else
+s32 synopGMAC_get_tx_qptr(synopGMACdevice * gmacdev, u32 * Status, u32 * Buffer1, u32 * Length1, u64 * Data1, u32 * Buffer2, u32 * Length2, u64 * Data2 );
+#endif
+s32 synopGMAC_set_tx_qptr(synopGMACdevice * gmacdev, u32 Buffer1, u32 Length1, u64 Data1, u32 Buffer2, u32 Length2, u64 Data2,u32 offload_needed);
+s32 synopGMAC_set_rx_qptr(synopGMACdevice * gmacdev, u32 Buffer1, u32 Length1, u64 Data1, u32 Buffer2, u32 Length2, u64 Data2);
+#ifdef ENH_DESC_8W
+s32 synopGMAC_get_rx_qptr(synopGMACdevice * gmacdev, u32 * Status, u32 * Buffer1, u32 * Length1, u64 * Data1, u32 * Buffer2, u32 * Length2, u64 * Data2, 
+                           u32 * Ext_Status, u32 * Time_Stamp_High, u32 * Time_Stamp_low);
+#else
+s32 synopGMAC_get_rx_qptr(synopGMACdevice * gmacdev, u32 * Status, u32 * Buffer1, u32 * Length1, u64 * Data1, u32 * Buffer2, u32 * Length2, u64 * Data2);
+#endif
+void synopGMAC_clear_interrupt(synopGMACdevice *gmacdev);
+u32 synopGMAC_get_interrupt_type(synopGMACdevice *gmacdev);
+u32 synopGMAC_get_interrupt_mask(synopGMACdevice *gmacdev);
+void synopGMAC_enable_interrupt(synopGMACdevice *gmacdev, u32 interrupts);
+void synopGMAC_disable_interrupt_all(synopGMACdevice *gmacdev);
+void synopGMAC_disable_interrupt(synopGMACdevice *gmacdev, u32 interrupts);
+void synopGMAC_enable_dma_rx(synopGMACdevice * gmacdev);
+void synopGMAC_enable_dma_tx(synopGMACdevice * gmacdev);
+void synopGMAC_resume_dma_tx(synopGMACdevice * gmacdev);
+void synopGMAC_resume_dma_rx(synopGMACdevice * gmacdev);
+void synopGMAC_take_desc_ownership(DmaDesc * desc);
+void synopGMAC_take_desc_ownership_rx(synopGMACdevice * gmacdev);
+void synopGMAC_take_desc_ownership_tx(synopGMACdevice * gmacdev);
+void synopGMAC_disable_dma_tx(synopGMACdevice * gmacdev);
+void synopGMAC_disable_dma_rx(synopGMACdevice * gmacdev);
+/******Following APIs are valid only for Enhanced Descriptor from 3.50a release onwards*******/
+bool synopGMAC_is_ext_status(synopGMACdevice *gmacdev,u32 status); 		      
+bool synopGMAC_ES_is_IP_header_error(synopGMACdevice *gmacdev,u32 ext_status);         
+bool synopGMAC_ES_is_rx_checksum_bypassed(synopGMACdevice *gmacdev,u32 ext_status);
+bool synopGMAC_ES_is_IP_payload_error(synopGMACdevice *gmacdev,u32 ext_status);
+/*******************PMT APIs***************************************/
+void synopGMAC_pmt_int_enable(synopGMACdevice *gmacdev);
+void synopGMAC_pmt_int_disable(synopGMACdevice *gmacdev);
+void synopGMAC_power_down_enable(synopGMACdevice *gmacdev);
+void synopGMAC_power_down_disable(synopGMACdevice *gmacdev);
+void synopGMAC_enable_pmt_interrupt(synopGMACdevice *gmacdev);
+void synopGMAC_disable_pmt_interrupt(synopGMACdevice *gmacdev);
+void synopGMAC_magic_packet_enable(synopGMACdevice *gmacdev);
+void synopGMAC_wakeup_frame_enable(synopGMACdevice *gmacdev);
+void synopGMAC_pmt_unicast_enable(synopGMACdevice *gmacdev);
+bool synopGMAC_is_magic_packet_received(synopGMACdevice *gmacdev);
+bool synopGMAC_is_wakeup_frame_received(synopGMACdevice *gmacdev);
+void synopGMAC_write_wakeup_frame_register(synopGMACdevice *gmacdev, u32 * filter_contents);
+/*******************MMC APIs***************************************/
+void synopGMAC_mmc_counters_stop(synopGMACdevice *gmacdev);
+void synopGMAC_mmc_counters_resume(synopGMACdevice *gmacdev);
+void synopGMAC_mmc_counters_set_selfclear(synopGMACdevice *gmacdev);
+void synopGMAC_mmc_counters_reset_selfclear(synopGMACdevice *gmacdev);
+void synopGMAC_mmc_counters_disable_rollover(synopGMACdevice *gmacdev);
+void synopGMAC_mmc_counters_enable_rollover(synopGMACdevice *gmacdev);
+u32 synopGMAC_read_mmc_counter(synopGMACdevice *gmacdev, u32 counter);
+u32 synopGMAC_read_mmc_rx_int_status(synopGMACdevice *gmacdev);
+u32 synopGMAC_read_mmc_tx_int_status(synopGMACdevice *gmacdev);
+void synopGMAC_disable_mmc_tx_interrupt(synopGMACdevice *gmacdev, u32 mask);
+void synopGMAC_enable_mmc_tx_interrupt(synopGMACdevice *gmacdev, u32 mask);
+void synopGMAC_disable_mmc_rx_interrupt(synopGMACdevice *gmacdev, u32 mask);
+void synopGMAC_enable_mmc_rx_interrupt(synopGMACdevice *gmacdev, u32 mask);
+void synopGMAC_enable_mmc_ipc_rx_interrupt(synopGMACdevice *gmacdev, u32 mask);
+void synopGMAC_disable_mmc_ipc_rx_interrupt(synopGMACdevice *gmacdev, u32 mask);
+/*******************Ip checksum offloading APIs***************************************/
+void synopGMAC_enable_rx_chksum_offload(synopGMACdevice *gmacdev);
+void synopGMAC_disable_rx_Ipchecksum_offload(synopGMACdevice *gmacdev);
+void synopGMAC_rx_tcpip_chksum_drop_enable(synopGMACdevice *gmacdev);
+void synopGMAC_rx_tcpip_chksum_drop_disable(synopGMACdevice *gmacdev);
+u32  synopGMAC_is_rx_checksum_error(synopGMACdevice *gmacdev, u32 status);
+bool synopGMAC_is_tx_ipv4header_checksum_error(synopGMACdevice *gmacdev, u32 status);
+bool synopGMAC_is_tx_payload_checksum_error(synopGMACdevice *gmacdev, u32 status);
+void synopGMAC_tx_checksum_offload_bypass(synopGMACdevice *gmacdev, DmaDesc *desc);
+void synopGMAC_tx_checksum_offload_ipv4hdr(synopGMACdevice *gmacdev, DmaDesc *desc);
+void synopGMAC_tx_checksum_offload_tcponly(synopGMACdevice *gmacdev, DmaDesc *desc);
+void synopGMAC_tx_checksum_offload_tcp_pseudo(synopGMACdevice *gmacdev, DmaDesc *desc);
+s32 synopGMAC_phy88e1111_phase_init (synopGMACdevice * gmacdev);
+
+#endif /* End of file */
diff -uNra linux-3.0.82/drivers/net/loongson/gmac/.synopGMAC_Dev.h.swp linux-3.0.82x/drivers/net/loongson/gmac/.synopGMAC_Dev.h.swp
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/drivers/net/loongson/gmac/synopGMAC_Host.c linux-3.0.82x/drivers/net/loongson/gmac/synopGMAC_Host.c
--- linux-3.0.82/drivers/net/loongson/gmac/synopGMAC_Host.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/loongson/gmac/synopGMAC_Host.c	2017-09-23 03:42:49.678676103 +0800
@@ -0,0 +1,81 @@
+/**\file
+ *  The top most file which makes use of synopsys GMAC driver code.
+ *
+ *  This file can be treated as the example code for writing a application driver
+ *  for synopsys GMAC device using the driver provided by Synopsys.
+ *  This exmple is for Linux 2.6.xx kernel 
+ *  - Uses 32 bit 33MHz PCI Interface as the host bus interface
+ *  - Uses Linux network driver and the TCP/IP stack framework
+ *  - Uses the Device Specific Synopsys GMAC Kernel APIs
+ *  \internal
+ * ---------------------------REVISION HISTORY--------------------------------
+ * Synopsys 			01/Aug/2007			Created
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/device.h>
+
+#include <linux/pci.h>
+
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+
+#include "synopGMAC_Host.h"
+#include "synopGMAC_banner.h"
+#include "synopGMAC_plat.h"
+#include "synopGMAC_pci_bus_interface.h"
+#include "synopGMAC_network_interface.h"
+#include "synopGMAC_Dev.h"
+
+/****************************************************/
+
+
+/* Global declarations: these are required to handle 
+   Os and Platform dependent functionalities        */
+
+/*GMAC IP Base address and Size   */
+
+/*global adapter gmacdev pcidev and netdev pointers */
+
+/***************************************************/
+
+int __init SynopGMAC_Host_Interface_init(void)
+{
+
+        int retval;
+
+	TR0("**********************************************************\n");
+	TR0("* Driver    :%s\n",synopGMAC_driver_string);
+	TR0("* Version   :%s\n",synopGMAC_driver_version);
+	TR0("* Copyright :%s\n",synopGMAC_copyright);
+	TR0("**********************************************************\n");
+
+        TR0("Initializing synopsys GMAC interfaces ..\n") ;
+        /* Initialize the bus interface for the hostcontroller E.g PCI in our case */
+        if ((retval = synopGMAC_init_pci_bus_interface())) {
+	        TR0("Could not initiliase the bus interface. Is PCI device connected ?\n");
+                return retval;
+        }
+	
+	
+      return 0 ;
+}
+
+void __exit SynopGMAC_Host_Interface_exit(void)
+{
+
+        TR0("Exiting synopsys GMAC interfaces ..\n") ;
+}
+
+module_init(SynopGMAC_Host_Interface_init);
+module_exit(SynopGMAC_Host_Interface_exit);
+
+MODULE_AUTHOR("Synopsys India");
+MODULE_LICENSE("GPL/BSD");
+MODULE_DESCRIPTION("SYNOPSYS GMAC NETWORK DRIVER WITH PCI INTERFACE");
+
diff -uNra linux-3.0.82/drivers/net/loongson/gmac/synopGMAC_Host.h linux-3.0.82x/drivers/net/loongson/gmac/synopGMAC_Host.h
--- linux-3.0.82/drivers/net/loongson/gmac/synopGMAC_Host.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/loongson/gmac/synopGMAC_Host.h	2017-09-23 03:42:49.678676103 +0800
@@ -0,0 +1,31 @@
+#ifndef SYNOP_GMAC_HOST_H
+#define SYNOP_GMAC_HOST_H
+
+
+#include <linux/pci.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/mii.h>
+
+#include "synopGMAC_plat.h"
+#include "synopGMAC_pci_bus_interface.h"
+#include "synopGMAC_Dev.h"
+
+typedef struct synopGMACAdapterStruct{
+
+/*Device Dependent Data structur*/
+synopGMACdevice * synopGMACdev;
+/*Os/Platform Dependent Data Structures*/
+struct device * dev;
+struct net_device *synopGMACnetdev;
+struct net_device_stats synopGMACNetStats;
+struct mii_if_info mii;
+u32 synopGMACPciState[16];
+u8* synopGMACMappedAddr;
+u32 synopGMACMappedAddrSize;
+int irq;
+
+} synopGMACPciNetworkAdapter;
+
+
+#endif
diff -uNra linux-3.0.82/drivers/net/loongson/gmac/synopGMAC_network_interface.c linux-3.0.82x/drivers/net/loongson/gmac/synopGMAC_network_interface.c
--- linux-3.0.82/drivers/net/loongson/gmac/synopGMAC_network_interface.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/loongson/gmac/synopGMAC_network_interface.c	2017-09-23 03:42:49.678676103 +0800
@@ -0,0 +1,2001 @@
+/** \file
+ * This is the network dependent layer to handle network related functionality.
+ * This file is tightly coupled to neworking frame work of linux 2.6.xx kernel.
+ * The functionality carried out in this file should be treated as an example only
+ * if the underlying operating system is not Linux. 
+ * 
+ * \note Many of the functions other than the device specific functions
+ *  changes for operating system other than Linux 2.6.xx
+ * \internal 
+ *-----------------------------REVISION HISTORY-----------------------------------
+ * Synopsys			01/Aug/2007				Created
+ */
+
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/mii.h>
+
+
+#include <linux/ip.h>
+#include <linux/tcp.h>
+#include <linux/udp.h>
+#include <linux/ethtool.h>
+#include <linux/string.h>
+
+#include "synopGMAC_Host.h"
+#include "synopGMAC_plat.h"
+#include "synopGMAC_network_interface.h"
+#include "synopGMAC_Dev.h"
+s32 synopGMAC_check_phy_init (synopGMACPciNetworkAdapter * gmacdev);
+
+//#define USE_CHAIN_MODE
+
+
+#define BUS_SIZE_ALIGN(x) ((x+15)&~15)
+
+#define ETHER_MAX_LEN	1518
+
+#define IOCTL_READ_REGISTER  SIOCDEVPRIVATE+1
+#define IOCTL_WRITE_REGISTER SIOCDEVPRIVATE+2
+#define IOCTL_READ_IPSTRUCT  SIOCDEVPRIVATE+3
+#define IOCTL_READ_RXDESC    SIOCDEVPRIVATE+4
+#define IOCTL_READ_TXDESC    SIOCDEVPRIVATE+5
+#define IOCTL_POWER_DOWN     SIOCDEVPRIVATE+6
+
+static const struct net_device_ops loongson_gmac_netdev_ops = {
+	.ndo_open = &synopGMAC_linux_open, 
+	.ndo_stop = &synopGMAC_linux_close,
+	.ndo_start_xmit = &synopGMAC_linux_xmit_frames,
+	.ndo_get_stats = &synopGMAC_linux_get_stats,
+	//.ndo_set_multicast_list = &synopGMAC_linux_set_multicast_list,
+	.ndo_set_mac_address = &synopGMAC_linux_set_mac_address,
+	.ndo_change_mtu = &synopGMAC_linux_change_mtu,
+	.ndo_do_ioctl = &synopGMAC_linux_do_ioctl,
+	.ndo_tx_timeout = &synopGMAC_linux_tx_timeout,
+};
+static struct timer_list synopGMAC_cable_unplug_timer;
+static u32 GMAC_Power_down; // This global variable is used to indicate the ISR whether the interrupts occured in the process of powering down the mac or not
+
+
+/*These are the global pointers for their respecive structures*/
+
+
+/*these are the global data for base address and its size*/
+u32 synop_pci_using_dac;
+
+/*Sample Wake-up frame filter configurations*/
+
+u32 synopGMAC_wakeup_filter_config0[] = {
+					0x00000000,	// For Filter0 CRC is not computed may be it is 0x0000
+					0x00000000,	// For Filter1 CRC is not computed may be it is 0x0000
+					0x00000000,	// For Filter2 CRC is not computed may be it is 0x0000
+					0x5F5F5F5F,     // For Filter3 CRC is based on 0,1,2,3,4,6,8,9,10,11,12,14,16,17,18,19,20,22,24,25,26,27,28,30 bytes from offset
+					0x09000000,     // Filter 0,1,2 are disabled, Filter3 is enabled and filtering applies to only multicast packets
+					0x1C000000,     // Filter 0,1,2 (no significance), filter 3 offset is 28 bytes from start of Destination MAC address 
+					0x00000000,     // No significance of CRC for Filter0 and Filter1
+					0xBDCC0000      // No significance of CRC for Filter2, Filter3 CRC is 0xBDCC
+					};
+u32 synopGMAC_wakeup_filter_config1[] = {
+					0x00000000,	// For Filter0 CRC is not computed may be it is 0x0000
+					0x00000000,	// For Filter1 CRC is not computed may be it is 0x0000
+					0x7A7A7A7A,	// For Filter2 CRC is based on 1,3,4,5,6,9,11,12,13,14,17,19,20,21,25,27,28,29,30 bytes from offset
+					0x00000000,     // For Filter3 CRC is not computed may be it is 0x0000
+					0x00010000,     // Filter 0,1,3 are disabled, Filter2 is enabled and filtering applies to only unicast packets
+					0x00100000,     // Filter 0,1,3 (no significance), filter 2 offset is 16 bytes from start of Destination MAC address 
+					0x00000000,     // No significance of CRC for Filter0 and Filter1
+					0x0000A0FE      // No significance of CRC for Filter3, Filter2 CRC is 0xA0FE
+					};
+u32 synopGMAC_wakeup_filter_config2[] = {
+					0x00000000,	// For Filter0 CRC is not computed may be it is 0x0000
+					0x000000FF,	// For Filter1 CRC is computed on 0,1,2,3,4,5,6,7 bytes from offset
+					0x00000000,	// For Filter2 CRC is not computed may be it is 0x0000
+					0x00000000,     // For Filter3 CRC is not computed may be it is 0x0000
+					0x00000100,     // Filter 0,2,3 are disabled, Filter 1 is enabled and filtering applies to only unicast packets
+					0x0000DF00,     // Filter 0,2,3 (no significance), filter 1 offset is 223 bytes from start of Destination MAC address 
+					0xDB9E0000,     // No significance of CRC for Filter0, Filter1 CRC is 0xDB9E
+					0x00000000      // No significance of CRC for Filter2 and Filter3 
+					};
+
+/*
+The synopGMAC_wakeup_filter_config3[] is a sample configuration for wake up filter. 
+Filter1 is used here
+Filter1 offset is programmed to 50 (0x32)
+Filter1 mask is set to 0x000000FF, indicating First 8 bytes are used by the filter
+Filter1 CRC= 0x7EED this is the CRC computed on data 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55
+
+Refer accompanied software DWC_gmac_crc_example.c for CRC16 generation and how to use the same.
+*/
+
+u32 synopGMAC_wakeup_filter_config3[] = {
+					0x00000000,	// For Filter0 CRC is not computed may be it is 0x0000
+					0x000000FF,	// For Filter1 CRC is computed on 0,1,2,3,4,5,6,7 bytes from offset
+					0x00000000,	// For Filter2 CRC is not computed may be it is 0x0000
+					0x00000000,     // For Filter3 CRC is not computed may be it is 0x0000
+					0x00000100,     // Filter 0,2,3 are disabled, Filter 1 is enabled and filtering applies to only unicast packets
+					0x00003200,     // Filter 0,2,3 (no significance), filter 1 offset is 50 bytes from start of Destination MAC address 
+					0x7eED0000,     // No significance of CRC for Filter0, Filter1 CRC is 0x7EED, 
+					0x00000000      // No significance of CRC for Filter2 and Filter3 
+					};
+/**
+ * Function used to detect the cable plugging and unplugging.
+ * This function gets scheduled once in every second and polls
+ * the PHY register for network cable plug/unplug. Once the 
+ * connection is back the GMAC device is configured as per
+ * new Duplex mode and Speed of the connection.
+ * @param[in] u32 type but is not used currently. 
+ * \return returns void.
+ * \note This function is tightly coupled with Linux 2.6.xx.
+ * \callgraph
+ */
+
+static u32 gmac_get_link(struct net_device *dev);
+static int gmac_get_settings(struct net_device *dev, struct ethtool_cmd *cmd);
+static void synopGMAC_linux_cable_unplug_function(synopGMACPciNetworkAdapter *adapter)
+{
+s32 status;
+u16 data,data1;
+synopGMACdevice            *gmacdev = adapter->synopGMACdev;
+struct ethtool_cmd cmd;
+
+init_timer(&synopGMAC_cable_unplug_timer);
+synopGMAC_cable_unplug_timer.expires = CHECK_TIME + jiffies;
+
+
+
+if(!gmac_get_link(adapter->synopGMACnetdev)){
+	if(gmacdev->LinkState)
+	TR0("No Link: %08x %08x\n",data,data1);
+	gmacdev->DuplexMode = 0;
+	gmacdev->Speed = 0;
+	gmacdev->LoopBackMode = 0; 
+	gmacdev->LinkState = 0; 
+}
+else{
+	data = synopGMAC_check_phy_init(adapter);
+
+	if(gmacdev->LinkState != data){
+		gmacdev->LinkState = data;
+		synopGMAC_mac_init(gmacdev);
+	TR("Link UP data=%08x\n",data);
+	TR("Link is up in %s mode\n",(gmacdev->DuplexMode == FULLDUPLEX) ? "FULL DUPLEX": "HALF DUPLEX");
+	if(gmacdev->Speed == SPEED1000)	
+		TR0("Link is with 1000M Speed \n");
+	if(gmacdev->Speed == SPEED100)	
+		TR0("Link is with 100M Speed \n");
+	if(gmacdev->Speed == SPEED10)	
+		TR0("Link is with 10M Speed \n");
+	}
+//	synopGMAC_intr_handler(0, adapter->synopGMACnetdev);
+}
+	add_timer(&synopGMAC_cable_unplug_timer);
+	
+}
+
+s32 synopGMAC_check_phy_init (synopGMACPciNetworkAdapter *adapter) 
+{	
+struct ethtool_cmd cmd;
+synopGMACdevice            *gmacdev = adapter->synopGMACdev;
+	
+
+
+	if(!gmac_get_link(adapter->synopGMACnetdev))
+	{
+		gmacdev->DuplexMode = FULLDUPLEX;
+		gmacdev->Speed      =   SPEED100;
+		printk(" gmac_get_link  return speed100M...............\r\n");
+		return 0;
+	}
+	else
+	
+	{
+		gmac_get_settings(adapter->synopGMACnetdev,&cmd);
+
+	gmacdev->DuplexMode = (cmd.duplex == DUPLEX_FULL)  ? FULLDUPLEX: HALFDUPLEX ;
+	if(cmd.speed == SPEED_1000)
+	        gmacdev->Speed      =   SPEED1000;
+	else if(cmd.speed == SPEED_100)
+		gmacdev->Speed      =   SPEED100;
+	else
+		gmacdev->Speed      =   SPEED10;
+
+	}
+
+	return gmacdev->Speed|(gmacdev->DuplexMode<<4);
+}
+
+static void synopGMAC_linux_powerdown_mac(synopGMACdevice *gmacdev)
+{
+	TR0("Put the GMAC to power down mode..\n");
+	// Disable the Dma engines in tx path
+	GMAC_Power_down = 1;	// Let ISR know that Mac is going to be in the power down mode
+	synopGMAC_disable_dma_tx(gmacdev);
+	plat_delay(10000);		//allow any pending transmission to complete
+	// Disable the Mac for both tx and rx
+	synopGMAC_tx_disable(gmacdev);
+	synopGMAC_rx_disable(gmacdev);
+        plat_delay(10000); 		//Allow any pending buffer to be read by host
+	//Disable the Dma in rx path
+        synopGMAC_disable_dma_rx(gmacdev);
+
+	//enable the power down mode
+	//synopGMAC_pmt_unicast_enable(gmacdev);
+	
+	//prepare the gmac for magic packet reception and wake up frame reception
+	synopGMAC_magic_packet_enable(gmacdev);
+	synopGMAC_write_wakeup_frame_register(gmacdev, synopGMAC_wakeup_filter_config3);
+
+	synopGMAC_wakeup_frame_enable(gmacdev);
+
+	//gate the application and transmit clock inputs to the code. This is not done in this driver :).
+
+	//enable the Mac for reception
+	synopGMAC_rx_enable(gmacdev);
+
+	//Enable the assertion of PMT interrupt
+	synopGMAC_pmt_int_enable(gmacdev);
+	//enter the power down mode
+	synopGMAC_power_down_enable(gmacdev);
+	return;
+}
+
+static void synopGMAC_linux_powerup_mac(synopGMACdevice *gmacdev)
+{
+	GMAC_Power_down = 0;	// Let ISR know that MAC is out of power down now
+	if( synopGMAC_is_magic_packet_received(gmacdev))
+		TR("GMAC wokeup due to Magic Pkt Received\n");
+	if(synopGMAC_is_wakeup_frame_received(gmacdev))
+		TR("GMAC wokeup due to Wakeup Frame Received\n");
+	//Disable the assertion of PMT interrupt
+	synopGMAC_pmt_int_disable(gmacdev);
+	//Enable the mac and Dma rx and tx paths
+	synopGMAC_rx_enable(gmacdev);
+       	synopGMAC_enable_dma_rx(gmacdev);
+
+	synopGMAC_tx_enable(gmacdev);
+	synopGMAC_enable_dma_tx(gmacdev);
+	return;
+}
+/**
+  * This sets up the transmit Descriptor queue in ring or chain mode.
+  * This function is tightly coupled to the platform and operating system
+  * Device is interested only after the descriptors are setup. Therefore this function
+  * is not included in the device driver API. This function should be treated as an
+  * example code to design the descriptor structures for ring mode or chain mode.
+  * This function depends on the dev structure for allocation consistent dma-able memory in case of linux.
+  * This limitation is due to the fact that linux uses pci structure to allocate a dmable memory
+  *	- Allocates the memory for the descriptors.
+  *	- Initialize the Busy and Next descriptors indices to 0(Indicating first descriptor).
+  *	- Initialize the Busy and Next descriptors to first descriptor address.
+  * 	- Initialize the last descriptor with the endof ring in case of ring mode.
+  *	- Initialize the descriptors in chain mode.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] pointer to pci_device structure.
+  * @param[in] number of descriptor expected in tx descriptor queue.
+  * @param[in] whether descriptors to be created in RING mode or CHAIN mode.
+  * \return 0 upon success. Error code upon failure.
+  * \note This function fails if allocation fails for required number of descriptors in Ring mode, but in chain mode
+  *  function returns -ESYNOPGMACNOMEM in the process of descriptor chain creation. once returned from this function
+  *  user should for gmacdev->TxDescCount to see how many descriptors are there in the chain. Should continue further
+  *  only if the number of descriptors in the chain meets the requirements  
+  */
+
+s32 synopGMAC_setup_tx_desc_queue(synopGMACdevice * gmacdev,struct device * dev,u32 no_of_desc, u32 desc_mode)
+{
+s32 i;
+
+DmaDesc *first_desc = NULL;
+DmaDesc *second_desc = NULL;
+dma_addr_t dma_addr;
+gmacdev->TxDescCount = 0;
+
+if(desc_mode == RINGMODE){
+	TR("Total size of memory required for Tx Descriptors in Ring Mode = 0x%08lx\n",((sizeof(DmaDesc) * no_of_desc)));
+	first_desc = plat_alloc_consistent_dmaable_memory (dev, sizeof(DmaDesc) * no_of_desc,&dma_addr);
+	if(first_desc == NULL){
+		TR("Error in Tx Descriptors memory allocation\n");
+		return -ESYNOPGMACNOMEM;
+	}
+	gmacdev->TxDescCount = no_of_desc;
+	gmacdev->TxDesc      = first_desc;
+	gmacdev->TxDescDma   = dma_addr;
+	
+	for(i =0; i < gmacdev -> TxDescCount; i++){
+		synopGMAC_tx_desc_init_ring(gmacdev->TxDesc + i, i == gmacdev->TxDescCount-1);
+		TR("%02d %p \n",i, (gmacdev->TxDesc + i) );
+	}
+}
+else{
+//Allocate the head descriptor
+	first_desc = plat_alloc_consistent_dmaable_memory (dev, sizeof(DmaDesc),&dma_addr);
+	if(first_desc == NULL){
+		TR("Error in Tx Descriptor Memory allocation in Ring mode\n");
+		return -ESYNOPGMACNOMEM;
+	}
+	gmacdev->TxDesc       = first_desc;
+	gmacdev->TxDescDma    = dma_addr;
+
+	TR("Tx===================================================================Tx\n");
+	first_desc->buffer2   = gmacdev->TxDescDma;
+ 	first_desc->data2     = (u64)gmacdev->TxDesc;
+
+	gmacdev->TxDescCount = 1;
+	
+	for(i =0; i <(no_of_desc-1); i++){
+		second_desc = plat_alloc_consistent_dmaable_memory(dev, sizeof(DmaDesc),&dma_addr);
+		if(second_desc == NULL){	
+			TR("Error in Tx Descriptor Memory allocation in Chain mode\n");
+			return -ESYNOPGMACNOMEM;
+		}
+		first_desc->buffer2  = dma_addr;
+		first_desc->data2    = (u64)second_desc;
+		
+		second_desc->buffer2 = gmacdev->TxDescDma;
+		second_desc->data2   = (u64)gmacdev->TxDesc;
+
+	        synopGMAC_tx_desc_init_chain(first_desc);
+		TR("%02d %p %08x %08x %08x %08x %lx %lx \n",gmacdev->TxDescCount, first_desc, first_desc->status, first_desc->length, first_desc->buffer1,first_desc->buffer2, first_desc->data1, first_desc->data2);
+		gmacdev->TxDescCount += 1;
+		first_desc = second_desc;
+	}
+		
+		synopGMAC_tx_desc_init_chain(first_desc);
+		TR("%02d %p %08x %08x %08x %08x %lx %lx \n",gmacdev->TxDescCount, first_desc, first_desc->status, first_desc->length, first_desc->buffer1,first_desc->buffer2, first_desc->data1, first_desc->data2);
+	TR("Tx===================================================================Tx\n");
+}
+
+	gmacdev->TxNext = 0;
+	gmacdev->TxBusy = 0;
+	gmacdev->TxNextDesc = gmacdev->TxDesc;
+	gmacdev->TxBusyDesc = gmacdev->TxDesc;
+	gmacdev->BusyTxDesc  = 0; 
+
+	return -ESYNOPGMACNOERR;
+}
+
+
+/**
+  * This sets up the receive Descriptor queue in ring or chain mode.
+  * This function is tightly coupled to the platform and operating system
+  * Device is interested only after the descriptors are setup. Therefore this function
+  * is not included in the device driver API. This function should be treated as an
+  * example code to design the descriptor structures in ring mode or chain mode.
+  * This function depends on the dev structure for allocation of consistent dma-able memory in case of linux.
+  * This limitation is due to the fact that linux uses pci structure to allocate a dmable memory
+  *	- Allocates the memory for the descriptors.
+  *	- Initialize the Busy and Next descriptors indices to 0(Indicating first descriptor).
+  *	- Initialize the Busy and Next descriptors to first descriptor address.
+  * 	- Initialize the last descriptor with the endof ring in case of ring mode.
+  *	- Initialize the descriptors in chain mode.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] pointer to pci_device structure.
+  * @param[in] number of descriptor expected in rx descriptor queue.
+  * @param[in] whether descriptors to be created in RING mode or CHAIN mode.
+  * \return 0 upon success. Error code upon failure.
+  * \note This function fails if allocation fails for required number of descriptors in Ring mode, but in chain mode
+  *  function returns -ESYNOPGMACNOMEM in the process of descriptor chain creation. once returned from this function
+  *  user should for gmacdev->RxDescCount to see how many descriptors are there in the chain. Should continue further
+  *  only if the number of descriptors in the chain meets the requirements  
+  */
+s32 synopGMAC_setup_rx_desc_queue(synopGMACdevice * gmacdev,struct device * dev,u32 no_of_desc, u32 desc_mode)
+{
+s32 i;
+
+DmaDesc *first_desc = NULL;
+DmaDesc *second_desc = NULL;
+dma_addr_t dma_addr;
+gmacdev->RxDescCount = 0;
+
+if(desc_mode == RINGMODE){
+	TR("total size of memory required for Rx Descriptors in Ring Mode = 0x%08lx\n",((sizeof(DmaDesc) * no_of_desc)));
+	first_desc = plat_alloc_consistent_dmaable_memory (dev, sizeof(DmaDesc) * no_of_desc, &dma_addr);
+	if(first_desc == NULL){
+		TR("Error in Rx Descriptor Memory allocation in Ring mode\n");
+		return -ESYNOPGMACNOMEM;
+	}
+	gmacdev->RxDescCount = no_of_desc;
+	gmacdev->RxDesc      = first_desc;
+	gmacdev->RxDescDma   = dma_addr;
+	
+	for(i =0; i < gmacdev -> RxDescCount; i++){
+		synopGMAC_rx_desc_init_ring(gmacdev->RxDesc + i, i == gmacdev->RxDescCount-1);
+		TR("%02d %p \n",i, (gmacdev->RxDesc + i));
+	}
+
+}
+else{
+//Allocate the head descriptor
+	first_desc = plat_alloc_consistent_dmaable_memory (dev, sizeof(DmaDesc),&dma_addr);
+	if(first_desc == NULL){
+		TR("Error in Rx Descriptor Memory allocation in Ring mode\n");
+		return -ESYNOPGMACNOMEM;
+	}
+	gmacdev->RxDesc       = first_desc;
+	gmacdev->RxDescDma    = dma_addr;
+
+	TR("Rx===================================================================Rx\n");
+	first_desc->buffer2   = gmacdev->RxDescDma;
+	first_desc->data2     = (u64) gmacdev->RxDesc;
+
+	gmacdev->RxDescCount = 1;
+	
+	for(i =0; i < (no_of_desc-1); i++){
+		second_desc = plat_alloc_consistent_dmaable_memory(dev, sizeof(DmaDesc),&dma_addr);
+		if(second_desc == NULL){	
+			TR("Error in Rx Descriptor Memory allocation in Chain mode\n");
+			return -ESYNOPGMACNOMEM;
+		}
+		first_desc->buffer2  = dma_addr;
+		first_desc->data2    = (u64)second_desc;
+		
+		second_desc->buffer2 = gmacdev->RxDescDma;
+		second_desc->data2   = (u64)gmacdev->RxDesc;
+
+		synopGMAC_rx_desc_init_chain(first_desc);
+		TR("%02d  %p %08x %08x %08x %08x %lx %lx \n",gmacdev->RxDescCount, first_desc, first_desc->status, first_desc->length, first_desc->buffer1,first_desc->buffer2, first_desc->data1, first_desc->data2);
+		gmacdev->RxDescCount += 1;
+		first_desc = second_desc;
+	}
+                synopGMAC_rx_desc_init_chain(first_desc);
+		TR("%02d  %p %08x %08x %08x %08x %lx %lx \n",gmacdev->RxDescCount, first_desc, first_desc->status, first_desc->length, first_desc->buffer1,first_desc->buffer2, first_desc->data1, first_desc->data2);
+	TR("Rx===================================================================Rx\n");
+
+}
+
+	gmacdev->RxNext = 0;
+	gmacdev->RxBusy = 0;
+	gmacdev->RxNextDesc = gmacdev->RxDesc;
+	gmacdev->RxBusyDesc = gmacdev->RxDesc;
+
+	gmacdev->BusyRxDesc   = 0; 
+
+	return -ESYNOPGMACNOERR;
+}
+
+/**
+  * This gives up the receive Descriptor queue in ring or chain mode.
+  * This function is tightly coupled to the platform and operating system
+  * Once device's Dma is stopped the memory descriptor memory and the buffer memory deallocation,
+  * is completely handled by the operating system, this call is kept outside the device driver Api.
+  * This function should be treated as an example code to de-allocate the descriptor structures in ring mode or chain mode
+  * and network buffer deallocation.
+  * This function depends on the dev structure for dma-able memory deallocation for both descriptor memory and the
+  * network buffer memory under linux.
+  * The responsibility of this function is to 
+  *     - Free the network buffer memory if any.
+  *	- Fee the memory allocated for the descriptors.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] pointer to pci_device structure.
+  * @param[in] number of descriptor expected in rx descriptor queue.
+  * @param[in] whether descriptors to be created in RING mode or CHAIN mode.
+  * \return 0 upon success. Error code upon failure.
+  * \note No referece should be made to descriptors once this function is called. This function is invoked when the device is closed.
+  */
+void synopGMAC_giveup_rx_desc_queue(synopGMACdevice * gmacdev, struct device *dev, u32 desc_mode)
+{
+s32 i;
+
+DmaDesc *first_desc = NULL;
+dma_addr_t first_desc_dma_addr;
+u32 status;
+dma_addr_t dma_addr1;
+dma_addr_t dma_addr2;
+u32 length1;
+u32 length2;
+u64 data1;
+u64 data2;
+
+if(desc_mode == RINGMODE){
+	for(i =0; i < gmacdev -> RxDescCount; i++){
+		synopGMAC_get_desc_data(gmacdev->RxDesc + i, &status, &dma_addr1, &length1, &data1, &dma_addr2, &length2, &data2);
+		if((length1 != 0) && (data1 != 0)){
+			dma_unmap_single(dev,dma_addr1,ETHER_MAX_LEN,PCI_DMA_FROMDEVICE);
+			dev_kfree_skb((struct sk_buff *) data1);	// free buffer1
+			TR("(Ring mode) rx buffer1 %lx of size %d from %d rx descriptor is given back\n",data1, length1, i);
+		}
+		if((length2 != 0) && (data2 != 0)){
+			dma_unmap_single(dev,dma_addr2,ETHER_MAX_LEN,PCI_DMA_FROMDEVICE);
+			dev_kfree_skb((struct sk_buff *) data2);	//free buffer2
+			TR("(Ring mode) rx buffer2 %lx of size %d from %d rx descriptor is given back\n",data2, length2, i);
+		}
+	}
+	plat_free_consistent_dmaable_memory(dev,(sizeof(DmaDesc) * gmacdev->RxDescCount),gmacdev->RxDesc,gmacdev->RxDescDma); //free descriptors memory
+	TR("Memory allocated %p  for Rx Desriptors (ring) is given back\n",gmacdev->RxDesc);
+}
+else{
+	TR("rx-------------------------------------------------------------------rx\n");
+	first_desc          = gmacdev->RxDesc;
+	first_desc_dma_addr = gmacdev->RxDescDma;
+	for(i =0; i < gmacdev -> RxDescCount; i++){
+		synopGMAC_get_desc_data(first_desc, &status, &dma_addr1, &length1, &data1, &dma_addr2, &length2, &data2);
+		TR("%02d %p %08x %08x %08x %08x %lx %lx\n",i,first_desc,first_desc->status,first_desc->length,first_desc->buffer1,first_desc->buffer2,first_desc->data1,first_desc->data2);
+		if((length1 != 0) && (data1 != 0)){
+			dma_unmap_single(dev,dma_addr1,ETHER_MAX_LEN,PCI_DMA_FROMDEVICE);
+			dev_kfree_skb((struct sk_buff *) data1);	// free buffer1
+			TR("(Chain mode) rx buffer1 %lx of size %d from %d rx descriptor is given back\n",data1, length1, i);
+		}
+		plat_free_consistent_dmaable_memory(dev,(sizeof(DmaDesc)),first_desc,first_desc_dma_addr); //free descriptors
+		TR("Memory allocated %lx for Rx Descriptor (chain) at  %d is given back\n",data2,i);
+
+		first_desc = (DmaDesc *)data2;
+		first_desc_dma_addr = dma_addr2;
+	}
+
+	TR("rx-------------------------------------------------------------------rx\n");
+}
+gmacdev->RxDesc    = NULL;
+gmacdev->RxDescDma = 0;
+return;
+}
+
+/**
+  * This gives up the transmit Descriptor queue in ring or chain mode.
+  * This function is tightly coupled to the platform and operating system
+  * Once device's Dma is stopped the memory descriptor memory and the buffer memory deallocation,
+  * is completely handled by the operating system, this call is kept outside the device driver Api.
+  * This function should be treated as an example code to de-allocate the descriptor structures in ring mode or chain mode
+  * and network buffer deallocation.
+  * This function depends on the dev structure for dma-able memory deallocation for both descriptor memory and the
+  * network buffer memory under linux.
+  * The responsibility of this function is to 
+  *     - Free the network buffer memory if any.
+  *	- Fee the memory allocated for the descriptors.
+  * @param[in] pointer to synopGMACdevice.
+  * @param[in] pointer to pci_device structure.
+  * @param[in] number of descriptor expected in tx descriptor queue.
+  * @param[in] whether descriptors to be created in RING mode or CHAIN mode.
+  * \return 0 upon success. Error code upon failure.
+  * \note No reference should be made to descriptors once this function is called. This function is invoked when the device is closed.
+  */
+void synopGMAC_giveup_tx_desc_queue(synopGMACdevice * gmacdev,struct device * dev, u32 desc_mode)
+{
+s32 i;
+
+DmaDesc *first_desc = NULL;
+dma_addr_t first_desc_dma_addr;
+u32 status;
+dma_addr_t dma_addr1;
+dma_addr_t dma_addr2;
+u32 length1;
+u32 length2;
+u64 data1;
+u64 data2;
+
+if(desc_mode == RINGMODE){
+	for(i =0; i < gmacdev -> TxDescCount; i++){
+		synopGMAC_get_desc_data(gmacdev->TxDesc + i,&status, &dma_addr1, &length1, &data1, &dma_addr2, &length2, &data2);
+		if((length1 != 0) && (data1 != 0)){
+			dma_unmap_single(dev,dma_addr1,ETHER_MAX_LEN,PCI_DMA_TODEVICE);
+			dev_kfree_skb((struct sk_buff *) data1);	// free buffer1
+			TR("(Ring mode) tx buffer1 %lx of size %d from %d rx descriptor is given back\n",data1, length1, i);
+		}
+		if((length2 != 0) && (data2 != 0)){
+			dma_unmap_single(dev,dma_addr2,ETHER_MAX_LEN,PCI_DMA_TODEVICE);
+			dev_kfree_skb((struct sk_buff *) data2);	//free buffer2
+			TR("(Ring mode) tx buffer2 %lx of size %d from %d rx descriptor is given back\n",data2, length2, i);
+		}
+	}
+	plat_free_consistent_dmaable_memory(dev,(sizeof(DmaDesc) * gmacdev->TxDescCount),gmacdev->TxDesc,gmacdev->TxDescDma); //free descriptors
+	TR("Memory allocated %p for Tx Desriptors (ring) is given back\n",gmacdev->TxDesc);
+}
+else{
+	TR("tx-------------------------------------------------------------------tx\n");
+	first_desc          = gmacdev->TxDesc;
+	first_desc_dma_addr = gmacdev->TxDescDma;
+	for(i =0; i < gmacdev -> TxDescCount; i++){
+		synopGMAC_get_desc_data(first_desc, &status, &dma_addr1, &length1, &data1, &dma_addr2, &length2, &data2);
+		TR("%02d %p %08x %08x %08x %08x %lx %lx\n",i,first_desc,first_desc->status,first_desc->length,first_desc->buffer1,first_desc->buffer2,first_desc->data1,first_desc->data2);
+		if((length1 != 0) && (data1 != 0)){
+			dma_unmap_single(dev,dma_addr1,ETHER_MAX_LEN,PCI_DMA_TODEVICE);
+			dev_kfree_skb((struct sk_buff *) data2);	// free buffer1
+			TR("(Chain mode) tx buffer1 %lx of size %d from %d rx descriptor is given back\n",data1, length1, i);
+		}
+		plat_free_consistent_dmaable_memory(dev,(sizeof(DmaDesc)),first_desc,first_desc_dma_addr); //free descriptors
+		TR("Memory allocated %lx for Tx Descriptor (chain) at  %d is given back\n",data2,i);
+
+		first_desc = (DmaDesc *)data2;
+		first_desc_dma_addr = dma_addr2;
+	}
+	TR("tx-------------------------------------------------------------------tx\n");
+
+}
+gmacdev->TxDesc    = NULL;
+gmacdev->TxDescDma = 0;
+return;
+}
+
+
+/**
+ * Function to handle housekeeping after a packet is transmitted over the wire.
+ * After the transmission of a packet DMA generates corresponding interrupt 
+ * (if it is enabled). It takes care of returning the sk_buff to the linux
+ * kernel, updating the networking statistics and tracking the descriptors.
+ * @param[in] pointer to net_device structure. 
+ * \return void.
+ * \note This function runs in interrupt context
+ */
+void synop_handle_transmit_over(struct net_device *netdev)
+{
+	synopGMACPciNetworkAdapter *adapter;
+	synopGMACdevice * gmacdev;
+	struct device *dev;
+	s32 desc_index;
+	u64 data1, data2;
+	u32 status;
+	u32 length1, length2;
+	u32 dma_addr1, dma_addr2;
+#ifdef ENH_DESC_8W
+	u32 ext_status;
+	u16 time_stamp_higher;
+	u32 time_stamp_high;
+	u32 time_stamp_low;
+#endif
+	//adapter = netdev->priv;
+	adapter = netdev_priv(netdev);
+	if(adapter == NULL){
+		TR("Unknown Device\n");
+		return;
+	}
+	
+	gmacdev = adapter->synopGMACdev;
+	if(gmacdev == NULL){
+		TR("GMAC device structure is missing\n");
+		return;
+	}
+
+ 	dev  = adapter->dev;	
+	/*Handle the transmit Descriptors*/
+	do {
+#ifdef ENH_DESC_8W
+	desc_index = synopGMAC_get_tx_qptr(gmacdev, &status, &dma_addr1, &length1, &data1, &dma_addr2, &length2, &data2,&ext_status,&time_stamp_high,&time_stamp_low);
+        synopGMAC_TS_read_timestamp_higher_val(gmacdev, &time_stamp_higher);
+#else
+	desc_index = synopGMAC_get_tx_qptr(gmacdev, &status, &dma_addr1, &length1, &data1, &dma_addr2, &length2, &data2);
+#endif
+	//desc_index = synopGMAC_get_tx_qptr(gmacdev, &status, &dma_addr, &length, &data1);
+		if(desc_index >= 0 && data1 != 0){
+			TR("Finished Transmit at Tx Descriptor %d for skb 0x%lx and buffer = %08x whose status is %08x \n", desc_index,data1,dma_addr1,status);
+			#ifdef	IPC_OFFLOAD
+			if(synopGMAC_is_tx_ipv4header_checksum_error(gmacdev, status)){
+			TR("Harware Failed to Insert IPV4 Header Checksum\n");
+			}
+			if(synopGMAC_is_tx_payload_checksum_error(gmacdev, status)){
+			TR("Harware Failed to Insert Payload Checksum\n");
+			}
+			#endif
+		
+//			dma_unmap_single(dev,dma_addr1,length1,PCI_DMA_TODEVICE);
+			dev_kfree_skb_irq((struct sk_buff *)data1);
+
+			if(synopGMAC_is_desc_valid(status)){
+				adapter->synopGMACNetStats.tx_bytes += length1;
+				adapter->synopGMACNetStats.tx_packets++;
+			}
+			else {	
+				TR("Error in Status %08x\n",status);
+				adapter->synopGMACNetStats.tx_errors++;
+				adapter->synopGMACNetStats.tx_aborted_errors += synopGMAC_is_tx_aborted(status);
+				adapter->synopGMACNetStats.tx_carrier_errors += synopGMAC_is_tx_carrier_error(status);
+			}
+		}	adapter->synopGMACNetStats.collisions += synopGMAC_get_tx_collision_count(status);
+	} while(desc_index >= 0);
+	netif_wake_queue(netdev);
+}
+
+
+
+
+/**
+ * Function to Receive a packet from the interface.
+ * After Receiving a packet, DMA transfers the received packet to the system memory
+ * and generates corresponding interrupt (if it is enabled). This function prepares
+ * the sk_buff for received packet after removing the ethernet CRC, and hands it over
+ * to linux networking stack.
+ * 	- Updataes the networking interface statistics
+ *	- Keeps track of the rx descriptors
+ * @param[in] pointer to net_device structure. 
+ * \return void.
+ * \note This function runs in interrupt context.
+ */
+
+void synop_handle_received_data(struct net_device *netdev)
+{
+	synopGMACPciNetworkAdapter *adapter;
+	synopGMACdevice * gmacdev;
+	struct device *dev;
+	s32 desc_index;
+	
+	u64 data1;
+	u64 data2;
+	u32 len;
+	u32 status;
+	u32 dma_addr1;
+	u32 dma_addr2;
+#ifdef ENH_DESC_8W
+	u32 ext_status;
+	u16 time_stamp_higher;
+	u32 time_stamp_high;
+	u32 time_stamp_low;
+#endif
+	//u32 length;
+	
+	struct sk_buff *skb; //This is the pointer to hold the received data
+	
+	TR("%s haha\n",__FUNCTION__);	
+	
+	//adapter = netdev->priv;
+	adapter = netdev_priv(netdev);
+	if(adapter == NULL){
+		TR("Unknown Device\n");
+		return;
+	}
+	
+	gmacdev = adapter->synopGMACdev;
+	if(gmacdev == NULL){
+		TR("GMAC device structure is missing\n");
+		return;
+	}
+
+ 	dev  = adapter->dev;	
+	/*Handle the Receive Descriptors*/
+	do{
+#ifdef ENH_DESC_8W
+	desc_index = synopGMAC_get_rx_qptr(gmacdev, &status,&dma_addr1,NULL, &data1,&dma_addr2,NULL,&data2,&ext_status,&time_stamp_high,&time_stamp_low);
+	if(desc_index >0){ 
+        synopGMAC_TS_read_timestamp_higher_val(gmacdev, &time_stamp_higher);
+	TR("S:%08x ES:%08x DA1:%08x d1:%08x DA2:%08x d2:%08x TSH:%08x TSL:%08x TSHW:%08x \n",status,ext_status,dma_addr1, data1,dma_addr2,data2, time_stamp_high,time_stamp_low,time_stamp_higher);
+	}
+#else
+	desc_index = synopGMAC_get_rx_qptr(gmacdev, &status,&dma_addr1,NULL, &data1,&dma_addr2,NULL,&data2);
+#endif
+	//desc_index = synopGMAC_get_rx_qptr(gmacdev, &status,&dma_addr,NULL, &data1);
+	TR("<0>desc_index=%d\n",desc_index);
+
+		if(desc_index >= 0 && data1 != 0){
+			TR("<0>Received Data at Rx Descriptor %d for skb 0x%lx whose status is %08x\n",desc_index,data1,status);
+
+			skb = (struct sk_buff *)data1;
+			if(synopGMAC_is_rx_desc_valid(status)){
+				len =  synopGMAC_get_rx_desc_frame_length(status) - 4; //Not interested in Ethernet CRC bytes
+			/*At first step unmapped the dma address*/
+			dma_unmap_single(dev,dma_addr1,len,PCI_DMA_FROMDEVICE);
+
+				skb_put(skb,len);
+			#ifdef IPC_OFFLOAD
+				// Now lets check for the IPC offloading
+				/*  Since we have enabled the checksum offloading in hardware, lets inform the kernel
+				    not to perform the checksum computation on the incoming packet. Note that ip header 
+  				    checksum will be computed by the kernel immaterial of what we inform. Similary TCP/UDP/ICMP
+				    pseudo header checksum will be computed by the stack. What we can inform is not to perform
+				    payload checksum. 		
+   				    When CHECKSUM_UNNECESSARY is set kernel bypasses the checksum computation.		    
+				*/
+	
+				TR("Checksum Offloading will be done now\n");
+				skb->ip_summed = CHECKSUM_UNNECESSARY;
+				
+				#ifdef ENH_DESC_8W
+				if(synopGMAC_is_ext_status(gmacdev, status)){ // extended status present indicates that the RDES4 need to be probed
+					TR("Extended Status present\n");
+					if(synopGMAC_ES_is_IP_header_error(gmacdev,ext_status)){       // IP header (IPV4) checksum error
+					//Linux Kernel doesnot care for ipv4 header checksum. So we will simply proceed by printing a warning ....
+					TR("(EXTSTS)Error in IP header error\n");
+					skb->ip_summed = CHECKSUM_NONE;     //Let Kernel compute the checkssum
+					}	
+					if(synopGMAC_ES_is_rx_checksum_bypassed(gmacdev,ext_status)){   // Hardware engine bypassed the checksum computation/checking
+					TR("(EXTSTS)Hardware bypassed checksum computation\n");	
+					skb->ip_summed = CHECKSUM_NONE;             // Let Kernel compute the checksum
+					}
+					if(synopGMAC_ES_is_IP_payload_error(gmacdev,ext_status)){       // IP payload checksum is in error (UDP/TCP/ICMP checksum error)
+					TR("(EXTSTS) Error in EP payload\n");	
+					skb->ip_summed = CHECKSUM_NONE;             // Let Kernel compute the checksum
+					}				
+				}
+				else{ // No extended status. So relevant information is available in the status itself
+					if(synopGMAC_is_rx_checksum_error(gmacdev, status) == RxNoChkError ){
+					TR("Ip header and TCP/UDP payload checksum Bypassed <Chk Status = 4>  \n");
+					skb->ip_summed = CHECKSUM_UNNECESSARY;	//Let Kernel bypass computing the Checksum
+					}
+					if(synopGMAC_is_rx_checksum_error(gmacdev, status) == RxIpHdrChkError ){
+					//Linux Kernel doesnot care for ipv4 header checksum. So we will simply proceed by printing a warning ....
+					TR(" Error in 16bit IPV4 Header Checksum <Chk Status = 6>  \n");
+					skb->ip_summed = CHECKSUM_UNNECESSARY;	//Let Kernel bypass the TCP/UDP checksum computation
+					}				
+					if(synopGMAC_is_rx_checksum_error(gmacdev, status) == RxLenLT600 ){
+					TR("IEEE 802.3 type frame with Length field Lesss than 0x0600 <Chk Status = 0> \n");
+					skb->ip_summed = CHECKSUM_NONE;	//Let Kernel compute the Checksum
+					}
+					if(synopGMAC_is_rx_checksum_error(gmacdev, status) == RxIpHdrPayLoadChkBypass ){
+					TR("Ip header and TCP/UDP payload checksum Bypassed <Chk Status = 1>\n");
+					skb->ip_summed = CHECKSUM_NONE;	//Let Kernel compute the Checksum
+					}
+					if(synopGMAC_is_rx_checksum_error(gmacdev, status) == RxChkBypass ){
+					TR("Ip header and TCP/UDP payload checksum Bypassed <Chk Status = 3>  \n");
+					skb->ip_summed = CHECKSUM_NONE;	//Let Kernel compute the Checksum
+					}
+					if(synopGMAC_is_rx_checksum_error(gmacdev, status) == RxPayLoadChkError ){
+					TR(" TCP/UDP payload checksum Error <Chk Status = 5>  \n");
+					skb->ip_summed = CHECKSUM_NONE;	//Let Kernel compute the Checksum
+					}
+					if(synopGMAC_is_rx_checksum_error(gmacdev, status) == RxIpHdrChkError ){
+					//Linux Kernel doesnot care for ipv4 header checksum. So we will simply proceed by printing a warning ....
+					TR(" Both IP header and Payload Checksum Error <Chk Status = 7>  \n");
+					skb->ip_summed = CHECKSUM_NONE;	        //Let Kernel compute the Checksum
+					}
+				}
+				#else	
+				if(synopGMAC_is_rx_checksum_error(gmacdev, status) == RxNoChkError ){
+				TR("Ip header and TCP/UDP payload checksum Bypassed <Chk Status = 4>  \n");
+				skb->ip_summed = CHECKSUM_UNNECESSARY;	//Let Kernel bypass computing the Checksum
+				}
+				if(synopGMAC_is_rx_checksum_error(gmacdev, status) == RxIpHdrChkError ){
+				//Linux Kernel doesnot care for ipv4 header checksum. So we will simply proceed by printing a warning ....
+				TR(" Error in 16bit IPV4 Header Checksum <Chk Status = 6>  \n");
+				skb->ip_summed = CHECKSUM_UNNECESSARY;	//Let Kernel bypass the TCP/UDP checksum computation
+				}				
+				if(synopGMAC_is_rx_checksum_error(gmacdev, status) == RxLenLT600 ){
+				TR("IEEE 802.3 type frame with Length field Lesss than 0x0600 <Chk Status = 0> \n");
+				skb->ip_summed = CHECKSUM_NONE;	//Let Kernel compute the Checksum
+				}
+				if(synopGMAC_is_rx_checksum_error(gmacdev, status) == RxIpHdrPayLoadChkBypass ){
+				TR("Ip header and TCP/UDP payload checksum Bypassed <Chk Status = 1>\n");
+				skb->ip_summed = CHECKSUM_NONE;	//Let Kernel compute the Checksum
+				}
+				if(synopGMAC_is_rx_checksum_error(gmacdev, status) == RxChkBypass ){
+				TR("Ip header and TCP/UDP payload checksum Bypassed <Chk Status = 3>  \n");
+				skb->ip_summed = CHECKSUM_NONE;	//Let Kernel compute the Checksum
+				}
+				if(synopGMAC_is_rx_checksum_error(gmacdev, status) == RxPayLoadChkError ){
+				TR(" TCP/UDP payload checksum Error <Chk Status = 5>  \n");
+				skb->ip_summed = CHECKSUM_NONE;	//Let Kernel compute the Checksum
+				}
+				if(synopGMAC_is_rx_checksum_error(gmacdev, status) == RxIpHdrChkError ){
+				//Linux Kernel doesnot care for ipv4 header checksum. So we will simply proceed by printing a warning ....
+				TR(" Both IP header and Payload Checksum Error <Chk Status = 7>  \n");
+				skb->ip_summed = CHECKSUM_NONE;	        //Let Kernel compute the Checksum
+				}
+				
+				#endif
+			#endif //IPC_OFFLOAD	
+				skb->dev = netdev;
+				skb->protocol = eth_type_trans(skb, netdev);
+				netif_rx(skb);
+
+				netdev->last_rx = jiffies;
+				adapter->synopGMACNetStats.rx_packets++;
+				adapter->synopGMACNetStats.rx_bytes += len;
+			}
+			else{
+				/*Now the present skb should be set free*/
+				dev_kfree_skb_irq(skb);
+				printk(KERN_CRIT "s: %08x\n",status);
+				adapter->synopGMACNetStats.rx_errors++;
+				adapter->synopGMACNetStats.collisions       += synopGMAC_is_rx_frame_collision(status);
+				adapter->synopGMACNetStats.rx_crc_errors    += synopGMAC_is_rx_crc(status);
+				adapter->synopGMACNetStats.rx_frame_errors  += synopGMAC_is_frame_dribbling_errors(status);
+				adapter->synopGMACNetStats.rx_length_errors += synopGMAC_is_rx_frame_length_errors(status);
+			}
+			
+			//Now lets allocate the skb for the emptied descriptor
+			skb = alloc_skb(BUS_SIZE_ALIGN(netdev->mtu + ETHERNET_PACKET_EXTRA)+2,GFP_ATOMIC);
+			if(skb == NULL){
+				TR("SKB memory allocation failed \n");
+				adapter->synopGMACNetStats.rx_dropped++;
+			}
+			skb_reserve(skb,2);
+						
+			dma_addr1 = dma_map_single(dev,skb->data,BUS_SIZE_ALIGN(netdev->mtu + ETHERNET_PACKET_EXTRA),PCI_DMA_FROMDEVICE);
+			desc_index = synopGMAC_set_rx_qptr(gmacdev,dma_addr1, BUS_SIZE_ALIGN(netdev->mtu + ETHERNET_PACKET_EXTRA), (u64)skb,0,0,0);
+			
+			
+			if(desc_index < 0){
+				TR("Cannot set Rx Descriptor for skb %p\n",skb);
+				dev_kfree_skb_irq(skb);
+			}
+					
+		}
+	}while(desc_index >= 0);
+}
+
+
+/**
+ * Interrupt service routing.
+ * This is the function registered as ISR for device interrupts.
+ * @param[in] interrupt number. 
+ * @param[in] void pointer to device unique structure (Required for shared interrupts in Linux).
+ * @param[in] pointer to pt_regs (not used).
+ * \return Returns IRQ_NONE if not device interrupts IRQ_HANDLED for device interrupts.
+ * \note This function runs in interrupt context
+ *
+ */
+irqreturn_t synopGMAC_intr_handler(s32 intr_num, void * dev_id)
+{       
+	/*Kernels passes the netdev structure in the dev_id. So grab it*/
+        struct net_device *netdev;
+        synopGMACPciNetworkAdapter *adapter;
+        synopGMACdevice * gmacdev;
+	struct device *dev;
+        u32 interrupt,dma_status_reg;
+	s32 status;
+	u32 dma_addr;
+//	printk("synopGMAC_intr_handler==%d\n",intr_num);
+//	dump_stack();
+        netdev  = (struct net_device *) dev_id;
+        if(netdev == NULL){
+                TR("Unknown Device\n");
+                return -1;
+        }
+
+        //adapter  = netdev->priv;
+		adapter = netdev_priv(netdev);
+        if(adapter == NULL){
+                TR("Adapter Structure Missing\n");
+                return -1;
+        }
+
+        gmacdev = adapter->synopGMACdev;
+        if(gmacdev == NULL){
+                TR("GMAC device structure Missing\n");
+                return -1;
+        }
+
+	dev  = adapter->dev;	
+
+	/*Read the Dma interrupt status to know whether the interrupt got generated by our device or not*/
+	dma_status_reg = synopGMACReadReg((u32 *)gmacdev->DmaBase, DmaStatus);
+	
+	TR("<0>dma_status_reg=%x\n",dma_status_reg);
+	
+	if(dma_status_reg == 0)
+		return IRQ_HANDLED;
+
+        synopGMAC_disable_interrupt_all(gmacdev);
+	synopGMACReadReg((u32 *)gmacdev->MacBase,GmacStatus);
+
+       	TR("%s:Dma Status Reg: 0x%08x\n",__FUNCTION__,dma_status_reg);
+	
+	if(dma_status_reg & GmacPmtIntr){
+		TR("%s:: Interrupt due to PMT module\n",__FUNCTION__);
+		synopGMAC_linux_powerup_mac(gmacdev);
+	}
+	
+	if(dma_status_reg & GmacMmcIntr){
+		TR("%s:: Interrupt due to MMC module\n",__FUNCTION__);
+		TR("%s:: synopGMAC_rx_int_status = %08x\n",__FUNCTION__,synopGMAC_read_mmc_rx_int_status(gmacdev));
+		TR("%s:: synopGMAC_tx_int_status = %08x\n",__FUNCTION__,synopGMAC_read_mmc_tx_int_status(gmacdev));
+	}
+
+	if(dma_status_reg & GmacLineIntfIntr){
+		TR("%s:: Interrupt due to GMAC LINE module\n",__FUNCTION__);
+	//synopGMAC_linux_cable_unplug_function(adapter);
+	}
+
+	/*Now lets handle the DMA interrupts*/  
+        interrupt = synopGMAC_get_interrupt_type(gmacdev);
+       	TR("%s:Interrupts to be handled: 0x%08x\n",__FUNCTION__,interrupt);
+
+
+        if(interrupt & synopGMACDmaError){
+		u8 mac_addr0[6];//after soft reset, configure the MAC address to default value
+		TR("%s::Fatal Bus Error Inetrrupt Seen\n",__FUNCTION__);
+
+		memcpy(mac_addr0,netdev->dev_addr,6);
+		synopGMAC_disable_dma_tx(gmacdev);
+                synopGMAC_disable_dma_rx(gmacdev);
+                
+		synopGMAC_take_desc_ownership_tx(gmacdev);
+		synopGMAC_take_desc_ownership_rx(gmacdev);
+		
+		synopGMAC_init_tx_rx_desc_queue(gmacdev);
+		
+		synopGMAC_reset(gmacdev);//reset the DMA engine and the GMAC ip
+		
+		synopGMAC_set_mac_addr(gmacdev,GmacAddr0High,GmacAddr0Low, mac_addr0); 
+		synopGMAC_dma_bus_mode_init(gmacdev,DmaFixedBurstEnable| DmaBurstLength8 | DmaDescriptorSkip2 );
+	 	synopGMAC_dma_control_init(gmacdev,DmaStoreAndForward);	
+		synopGMAC_init_rx_desc_base(gmacdev);
+		synopGMAC_init_tx_desc_base(gmacdev);
+		synopGMAC_mac_init(gmacdev);
+		synopGMAC_enable_dma_rx(gmacdev);
+		synopGMAC_enable_dma_tx(gmacdev);
+
+        }
+
+
+	if(interrupt & synopGMACDmaRxNormal){
+		TR("%s:: Rx Normal \n", __FUNCTION__);
+                synop_handle_received_data(netdev);
+	}
+
+        if(interrupt & synopGMACDmaRxAbnormal){
+	        TR("%s::Abnormal Rx Interrupt Seen\n",__FUNCTION__);
+		#if 1
+	
+	       if(GMAC_Power_down == 0){	// If Mac is not in powerdown
+                adapter->synopGMACNetStats.rx_over_errors++;
+		/*Now Descriptors have been created in synop_handle_received_data(). Just issue a poll demand to resume DMA operation*/
+//		synopGMACWriteReg(gmacdev->DmaBase, DmaStatus ,0x80); 	//sw: clear the rxb ua bit
+		synopGMAC_resume_dma_rx(gmacdev);//To handle GBPS with 12 descriptors
+		}
+		#endif
+	}
+
+
+
+        if(interrupt & synopGMACDmaRxStopped){
+        	TR("%s::Receiver stopped seeing Rx interrupts\n",__FUNCTION__); //Receiver gone in to stopped state
+		#if 1
+	        if(GMAC_Power_down == 0){	// If Mac is not in powerdown
+		adapter->synopGMACNetStats.rx_over_errors++;
+		do{
+			struct sk_buff *skb = alloc_skb(BUS_SIZE_ALIGN(netdev->mtu + ETHERNET_PACKET_EXTRA)+2, GFP_ATOMIC);
+			if(skb == NULL){
+				TR("%s::ERROR in skb buffer allocation Better Luck Next time\n",__FUNCTION__);
+				break;
+				//			return -ESYNOPGMACNOMEM;
+			}
+			skb_reserve(skb,2);
+			
+			dma_addr = dma_map_single(dev,skb->data,BUS_SIZE_ALIGN(netdev->mtu + ETHERNET_PACKET_EXTRA),PCI_DMA_FROMDEVICE);
+			status = synopGMAC_set_rx_qptr(gmacdev,dma_addr, BUS_SIZE_ALIGN(netdev->mtu + ETHERNET_PACKET_EXTRA), (u64)skb,0,0,0);
+			TR("%s::Set Rx Descriptor no %08x for skb %p \n",__FUNCTION__,status,skb);
+			if(status < 0)
+				dev_kfree_skb_irq(skb);//changed from dev_free_skb. If problem check this again--manju
+		
+		}while(status >= 0);
+		
+		synopGMAC_enable_dma_rx(gmacdev);
+		}
+		#endif
+	}
+
+	if(interrupt & synopGMACDmaTxNormal){
+		//xmit function has done its job
+		TR("%s::Finished Normal Transmission \n",__FUNCTION__);
+		synop_handle_transmit_over(netdev);//Do whatever you want after the transmission is over
+
+		
+	}
+
+        if(interrupt & synopGMACDmaTxAbnormal){
+		TR("%s::Abnormal Tx Interrupt Seen\n",__FUNCTION__);
+		#if 1
+	       if(GMAC_Power_down == 0){	// If Mac is not in powerdown
+                synop_handle_transmit_over(netdev);
+		}
+		#endif
+	}
+
+
+
+	if(interrupt & synopGMACDmaTxStopped){
+		TR("%s::Transmitter stopped sending the packets\n",__FUNCTION__);
+		#if 1
+	       if(GMAC_Power_down == 0){	// If Mac is not in powerdown
+		synopGMAC_disable_dma_tx(gmacdev);
+                synopGMAC_take_desc_ownership_tx(gmacdev);
+		
+		synopGMAC_enable_dma_tx(gmacdev);
+		netif_wake_queue(netdev);
+		TR("%s::Transmission Resumed\n",__FUNCTION__);
+		}
+		#endif
+	}
+
+        /* Enable the interrrupt before returning from ISR*/
+        synopGMAC_enable_interrupt(gmacdev,DmaIntEnable);
+        return IRQ_HANDLED;
+}
+
+
+/**
+ * Function used when the interface is opened for use.
+ * We register synopGMAC_linux_open function to linux open(). Basically this 
+ * function prepares the the device for operation . This function is called whenever ifconfig (in Linux)
+ * activates the device (for example "ifconfig eth0 up"). This function registers
+ * system resources needed 
+ * 	- Attaches device to device specific structure
+ * 	- Programs the MDC clock for PHY configuration
+ * 	- Check and initialize the PHY interface 
+ *	- ISR registration
+ * 	- Setup and initialize Tx and Rx descriptors
+ *	- Initialize MAC and DMA
+ *	- Allocate Memory for RX descriptors (The should be DMAable)
+ * 	- Initialize one second timer to detect cable plug/unplug
+ *	- Configure and Enable Interrupts
+ *	- Enable Tx and Rx
+ *	- start the Linux network queue interface
+ * @param[in] pointer to net_device structure. 
+ * \return Returns 0 on success and error status upon failure.
+ * \callgraph
+ */
+
+s32 synopGMAC_linux_open(struct net_device *netdev)
+{
+	s32 status = 0;
+	s32 retval = 0;
+	s32 ijk;
+	//s32 reserve_len=2;
+	u32 dma_addr;
+	struct sk_buff *skb;
+        synopGMACPciNetworkAdapter *adapter;
+        synopGMACdevice * gmacdev;
+	struct device *dev;
+	TR0("%s called \n",__FUNCTION__);
+	//adapter = (synopGMACPciNetworkAdapter *) netdev->priv;
+	adapter = netdev_priv(netdev);
+	gmacdev = (synopGMACdevice *)adapter->synopGMACdev;
+ 	dev  = adapter->dev;	
+#if 1
+	//dbg-yg  set ls1c mac  RMII mode
+	*((volatile unsigned int *)0xbfd00424) &= ~(7 << 28); //lxy  MII mode
+	*((volatile unsigned int *)0xbfd00424) |= (1 << 30); //wl    RMII mode 
+#endif	
+	/*Now platform dependent initialization.*/
+
+	/*Lets reset the IP*/
+	TR("adapter= %p gmacdev = %p netdev = %p dev= %p\n",adapter,gmacdev,netdev,dev);
+	synopGMAC_reset(gmacdev);
+	
+	/*Attach the device to MAC struct This will configure all the required base addresses
+	  such as Mac base, configuration base, phy base address(out of 32 possible phys )*/
+	synopGMAC_attach(adapter->synopGMACdev, adapter->synopGMACMappedAddr + MACBASE, adapter->synopGMACMappedAddr + DMABASE, DEFAULT_PHY_BASE,netdev->dev_addr);
+	/*Lets read the version of ip in to device structure*/	
+	synopGMAC_read_version(gmacdev);
+	
+	synopGMAC_get_mac_addr(adapter->synopGMACdev,GmacAddr0High,GmacAddr0Low, netdev->dev_addr); 
+	/*Now set the broadcast address*/	
+	for(ijk = 0; ijk <6; ijk++){
+	netdev->broadcast[ijk] = 0xff;
+	}
+
+	for(ijk = 0; ijk <6; ijk++){
+	TR("netdev->dev_addr[%d] = %02x and netdev->broadcast[%d] = %02x\n",ijk,netdev->dev_addr[ijk],ijk,netdev->broadcast[ijk]);
+	}
+	/*Check for Phy initialization*/
+	synopGMAC_set_mdc_clk_div(gmacdev,GmiiCsrClk3); 
+	gmacdev->ClockDivMdc = synopGMAC_get_mdc_clk_div(gmacdev);
+#if 1 //dbg-yg
+	/* set  phy RMII setup*/	
+	u16 data;
+
+	synopGMAC_read_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x10,&data);
+	data |= (1 << 8);  //set RMII mode 
+	synopGMAC_write_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x10,data); //set RMII mode
+	synopGMAC_read_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x10,&data);
+//	TR("phy reg16 is 0x%0x \n",data);
+    
+	synopGMAC_read_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x0,&data);
+	data = 0x3100;  //set auto-
+	synopGMAC_write_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x0,data);
+	synopGMAC_read_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x0,&data);
+#endif
+
+	{
+	unsigned short data;
+	synopGMAC_read_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,2,&data);
+       /*set 88e1111 clock phase delay*/
+       if(data == 0x141)
+	synopGMAC_phy88e1111_phase_init(gmacdev);
+	printk("haha data=0x%x\n", data);
+#if 0
+	if(data == 0x181)
+	{
+		printk(" phy:DM9161A ............dbg-yg.........\r\n");
+		
+	    data = 0x100;    // set RMII mode
+        synopGMAC_write_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x10,data);
+        synopGMAC_read_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x10,&data);
+	   data = 0x3100;    //set  100M speed
+       synopGMAC_write_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x0,data);
+	*((volatile unsigned int *)0xbfd00424) &= ~(7 << 28); //lxy  MII mode
+	*((volatile unsigned int *)0xbfd00424) |= (1 << 30); //wl    RMII mode 
+
+	}
+	else
+	{
+#if 0
+	synopGMAC_read_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x10,&data);
+	data |= (1 << 8);  //set RMII mode 
+	synopGMAC_write_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x10,data); //set RMII mode	
+#endif
+	}
+#endif	
+	}
+
+	status = synopGMAC_check_phy_init(adapter);
+	 /*must reinit mac after check phy state status change*/
+	synopGMAC_mac_init(gmacdev);
+	/*Request for an shared interrupt. Instead of using netdev->irq lets use adapter->irq*/
+	if(request_irq (adapter->irq, synopGMAC_intr_handler, IRQF_SHARED, netdev->name,netdev)){
+ 		TR0("Error in request_irq %d\n",adapter->irq);
+		goto error_in_irq;	
+	}
+ 	TR("%s owns a shared interrupt on line %d\n",netdev->name, adapter->irq);
+//	disable_irq_nosync(adapter->irq);//fsy
+//	enable_irq(adapter->irq);
+	/*Set up the tx and rx descriptor queue/ring*/
+
+#ifndef USE_CHAIN_MODE
+	synopGMAC_setup_tx_desc_queue(gmacdev,dev,TRANSMIT_DESC_SIZE, RINGMODE);
+#else
+	synopGMAC_setup_tx_desc_queue(gmacdev,dev,TRANSMIT_DESC_SIZE, CHAINMODE);
+#endif
+	synopGMAC_init_tx_desc_base(gmacdev);	//Program the transmit descriptor base address in to DmaTxBase addr
+
+
+#ifndef USE_CHAIN_MODE
+	synopGMAC_setup_rx_desc_queue(gmacdev,dev,RECEIVE_DESC_SIZE, RINGMODE);
+#else
+	synopGMAC_setup_rx_desc_queue(gmacdev,dev,RECEIVE_DESC_SIZE, CHAINMODE);
+#endif
+
+
+	synopGMAC_init_rx_desc_base(gmacdev);	//Program the transmit descriptor base address in to DmaTxBase addr
+
+//	synopGMAC_dma_bus_mode_init(gmacdev,DmaFixedBurstEnable| DmaBurstLength8 | DmaDescriptorSkip2 );
+//	synopGMAC_dma_bus_mode_init(gmacdev, DmaBurstLength32 | DmaDescriptorSkip2 );
+//	synopGMAC_dma_control_init(gmacdev,DmaStoreAndForward |DmaTxSecondFrame);	
+	
+//	synopGMAC_dma_bus_mode_init(gmacdev,DmaFixedBurstEnable | DmaBurstLength8 | DmaDescriptorSkip2 ); //pbl8 incrx
+//	synopGMAC_dma_control_init(gmacdev,DmaStoreAndForward |DmaTxSecondFrame|DmaRxThreshCtrl64);	
+
+//	synopGMAC_dma_bus_mode_init(gmacdev, DmaBurstLength8 | DmaDescriptorSkip2 );                      //pbl8 incr
+//	synopGMAC_dma_control_init(gmacdev,DmaStoreAndForward |DmaTxSecondFrame|DmaRxThreshCtrl64);	
+
+//	synopGMAC_dma_bus_mode_init(gmacdev,DmaFixedBurstEnable | DmaBurstLength16 | DmaDescriptorSkip2 ); //pbl16 incrx
+//	synopGMAC_dma_control_init(gmacdev,DmaStoreAndForward |DmaTxSecondFrame|DmaRxThreshCtrl64);	
+
+//	synopGMAC_dma_bus_mode_init(gmacdev, DmaBurstLength16 | DmaDescriptorSkip2 );                      //pbl16 incr
+//	synopGMAC_dma_control_init(gmacdev,DmaStoreAndForward |DmaTxSecondFrame|DmaRxThreshCtrl64);	
+
+#ifdef ENH_DESC_8W
+	synopGMAC_dma_bus_mode_init(gmacdev, DmaBurstLength32 | DmaDescriptorSkip2 | DmaDescriptor8Words ); //pbl32 incr with rxthreshold 128 and Desc is 8 Words
+#else
+	synopGMAC_dma_bus_mode_init(gmacdev, DmaBurstLength4 | DmaDescriptorSkip2);                      //pbl32 incr with rxthreshold 128
+//	synopGMAC_dma_bus_mode_init(gmacdev, DmaResetOn | DmaDescriptorSkip2);                      //pbl32 incr with rxthreshold 128
+#endif
+	synopGMAC_dma_control_init(gmacdev,DmaStoreAndForward |DmaTxSecondFrame|DmaRxThreshCtrl128);
+
+//	synopGMAC_dma_bus_mode_init(gmacdev, DmaBurstLength64 | DmaDescriptorSkip2 );                      //pbl64 incr with rxthreshold 128
+//	synopGMAC_dma_control_init(gmacdev,DmaStoreAndForward |DmaTxSecondFrame|DmaRxThreshCtrl128);	
+
+//	synopGMAC_dma_bus_mode_init(gmacdev, DmaBurstLength64 | DmaDescriptorSkip2 );                      //pbl64 incr with rxthreshold 128
+//	synopGMAC_dma_control_init(gmacdev,DmaStoreAndForward |DmaRxThreshCtrl128);	
+
+	/*Initialize the mac interface*/
+
+	synopGMAC_pause_control(gmacdev); // This enables the pause control in Full duplex mode of operation
+	#ifdef IPC_OFFLOAD
+	/*IPC Checksum offloading is enabled for this driver. Should only be used if Full Ip checksumm offload engine is configured in the hardware*/
+	synopGMAC_enable_rx_chksum_offload(gmacdev);  	//Enable the offload engine in the receive path
+	synopGMAC_rx_tcpip_chksum_drop_enable(gmacdev); // This is default configuration, DMA drops the packets if error in encapsulated ethernet payload
+							// The FEF bit in DMA control register is configured to 0 indicating DMA to drop the errored frames.
+	/*Inform the Linux Networking stack about the hardware capability of checksum offloading*/
+	netdev->features = NETIF_F_HW_CSUM;
+	#endif
+
+     do{
+		skb = alloc_skb(BUS_SIZE_ALIGN(netdev->mtu + ETHERNET_PACKET_EXTRA)+2, GFP_ATOMIC);
+		if(skb == NULL){
+			TR0("ERROR in skb buffer allocation\n");
+			break;
+//			return -ESYNOPGMACNOMEM;
+		}
+		skb_reserve(skb,2);
+//		skb_reserve(skb,reserve_len);
+//		TR("skb = %08x skb->tail = %08x skb_tailroom(skb)=%08x skb->data = %08x\n",(u32)skb,(u32)skb->tail,(skb_tailroom(skb)),(u32)skb->data);
+//		skb->dev = netdev;
+		//TR("skb_tailroom(skb)=%x,len=%x\n",skb_tailroom(skb),netdev->mtu + ETHERNET_PACKET_EXTRA);
+		dma_addr = dma_map_single(dev,skb->data,BUS_SIZE_ALIGN(netdev->mtu + ETHERNET_PACKET_EXTRA),PCI_DMA_FROMDEVICE);
+		status = synopGMAC_set_rx_qptr(gmacdev,dma_addr, BUS_SIZE_ALIGN(netdev->mtu + ETHERNET_PACKET_EXTRA), (u64)skb,0,0,0);
+		if(status < 0)
+			dev_kfree_skb(skb);
+			
+	}while(status >= 0);
+	
+
+	TR("Setting up the cable unplug timer\n");
+	init_timer(&synopGMAC_cable_unplug_timer);
+	synopGMAC_cable_unplug_timer.function = (void *)synopGMAC_linux_cable_unplug_function;
+	synopGMAC_cable_unplug_timer.data = (ulong) adapter;
+	synopGMAC_cable_unplug_timer.expires = CHECK_TIME + jiffies;
+	add_timer(&synopGMAC_cable_unplug_timer);
+
+	synopGMAC_clear_interrupt(gmacdev);
+	/*
+	Disable the interrupts generated by MMC and IPC counters.
+	If these are not disabled ISR should be modified accordingly to handle these interrupts.
+	*/	
+	synopGMAC_disable_mmc_tx_interrupt(gmacdev, 0xFFFFFFFF);
+	synopGMAC_disable_mmc_rx_interrupt(gmacdev, 0xFFFFFFFF);
+	synopGMAC_disable_mmc_ipc_rx_interrupt(gmacdev, 0xFFFFFFFF);
+
+	synopGMAC_enable_interrupt(gmacdev,DmaIntEnable);
+	synopGMAC_enable_dma_rx(gmacdev);
+	synopGMAC_enable_dma_tx(gmacdev);
+	
+	netif_start_queue(netdev);
+	printk("fsy::open over\n");
+	return retval;
+
+error_in_irq:
+	/*Lets free the allocated memory*/
+	plat_free_memory(gmacdev);
+	return -ESYNOPGMACBUSY;
+}
+
+/**
+ * Function used when the interface is closed.
+ *
+ * This function is registered to linux stop() function. This function is 
+ * called whenever ifconfig (in Linux) closes the device (for example "ifconfig eth0 down").
+ * This releases all the system resources allocated during open call.
+ * system resources int needs 
+ * 	- Disable the device interrupts
+ * 	- Stop the receiver and get back all the rx descriptors from the DMA
+ * 	- Stop the transmitter and get back all the tx descriptors from the DMA 
+ * 	- Stop the Linux network queue interface
+ *	- Free the irq (ISR registered is removed from the kernel)
+ * 	- Release the TX and RX descripor memory
+ *	- De-initialize one second timer rgistered for cable plug/unplug tracking
+ * @param[in] pointer to net_device structure. 
+ * \return Returns 0 on success and error status upon failure.
+ * \callgraph
+ */
+
+s32 synopGMAC_linux_close(struct net_device *netdev)
+{
+	
+//	s32 status = 0;
+//	s32 retval = 0;
+//	u32 dma_addr;
+	synopGMACPciNetworkAdapter *adapter;
+        synopGMACdevice * gmacdev;
+	struct device *dev;
+	
+	TR0("%s\n",__FUNCTION__);
+//	adapter = (synopGMACPciNetworkAdapter *) netdev->priv;
+	adapter = netdev_priv(netdev);
+	if(adapter == NULL){
+		TR0("OOPS adapter is null\n");
+		return -1;
+	}
+
+	gmacdev = (synopGMACdevice *) adapter->synopGMACdev;
+	if(gmacdev == NULL){
+		TR0("OOPS gmacdev is null\n");
+		return -1;
+	}
+
+	dev = adapter->dev;
+	if(dev == NULL){
+		TR("OOPS dev is null\n");
+		return -1;
+	}
+
+	/*Disable all the interrupts*/
+	synopGMAC_disable_interrupt_all(gmacdev);
+	TR("the synopGMAC interrupt has been disabled\n");
+
+	/*Disable the reception*/	
+	synopGMAC_disable_dma_rx(gmacdev);
+        synopGMAC_take_desc_ownership_rx(gmacdev);
+	TR("the synopGMAC Reception has been disabled\n");
+
+	/*Disable the transmission*/
+	synopGMAC_disable_dma_tx(gmacdev);
+        synopGMAC_take_desc_ownership_tx(gmacdev);
+
+	TR("the synopGMAC Transmission has been disabled\n");
+	netif_stop_queue(netdev);
+	/*Now free the irq: This will detach the interrupt handler registered*/
+	free_irq(adapter->irq, netdev);
+	TR("the synopGMAC interrupt handler has been removed\n");
+	
+	/*Free the Rx Descriptor contents*/
+	TR("Now calling synopGMAC_giveup_rx_desc_queue \n");
+#ifndef USE_CHAIN_MODE
+	synopGMAC_giveup_rx_desc_queue(gmacdev, dev, RINGMODE);
+#else
+	synopGMAC_giveup_rx_desc_queue(gmacdev, dev, CHAINMODE);
+#endif
+	TR("Now calling synopGMAC_giveup_tx_desc_queue \n");
+#ifndef USE_CHAIN_MODE
+	synopGMAC_giveup_tx_desc_queue(gmacdev, dev, RINGMODE);
+#else
+	synopGMAC_giveup_tx_desc_queue(gmacdev, dev, CHAINMODE);
+#endif
+	
+	TR("Freeing the cable unplug timer\n");	
+	del_timer(&synopGMAC_cable_unplug_timer);
+
+	return -ESYNOPGMACNOERR;
+
+//	TR("%s called \n",__FUNCTION__);
+}
+
+/**
+ * Function to transmit a given packet on the wire.
+ * Whenever Linux Kernel has a packet ready to be transmitted, this function is called.
+ * The function prepares a packet and prepares the descriptor and 
+ * enables/resumes the transmission.
+ * @param[in] pointer to sk_buff structure. 
+ * @param[in] pointer to net_device structure.
+ * \return Returns 0 on success and Error code on failure. 
+ * \note structure sk_buff is used to hold packet in Linux networking stacks.
+ */
+s32 synopGMAC_linux_xmit_frames(struct sk_buff *skb, struct net_device *netdev)
+{
+	s32 status = 0;
+//	s32 counter =0;
+	u32 offload_needed = 0;
+	u32 dma_addr;
+	//u32 flags;
+	synopGMACPciNetworkAdapter *adapter;
+	synopGMACdevice * gmacdev;
+	struct device * dev;
+	TR("%s called \n",__FUNCTION__);
+	if(skb == NULL){
+		TR0("skb is NULL What happened to Linux Kernel? \n ");
+		return -1;
+	}
+	
+	//adapter = (synopGMACPciNetworkAdapter *) netdev->priv;
+	adapter = netdev_priv(netdev);
+	if(adapter == NULL)
+		return -1;
+
+	gmacdev = (synopGMACdevice *) adapter->synopGMACdev;
+	if(gmacdev == NULL)
+		return -1;
+
+ 	dev  = adapter->dev;	
+	/*Stop the network queue*/	
+	netif_stop_queue(netdev); 
+
+		
+		if(skb->ip_summed == CHECKSUM_PARTIAL){
+		TR("ip_summed=%x\n",skb->ip_summed);
+		/*	
+		   In Linux networking, if kernel indicates skb->ip_summed = CHECKSUM_HW, then only checksum offloading should be performed
+		   Make sure that the OS on which this code runs have proper support to enable offloading.
+		*/
+		offload_needed = 0x00000001;
+		#if 0
+		printk(KERN_CRIT"skb->ip_summed = CHECKSUM_HW\n");
+		printk(KERN_CRIT"skb->h.th=%08x skb->h.th->check=%08x\n",(u32)(skb->h.th),(u32)(skb->h.th->check));
+		printk(KERN_CRIT"skb->h.uh=%08x skb->h.uh->check=%08x\n",(u32)(skb->h.uh),(u32)(skb->h.uh->check));
+		printk(KERN_CRIT"\n skb->len = %d skb->mac_len = %d skb->data = %08x skb->csum = %08x skb->h.raw = %08x\n",skb->len,skb->mac_len,(u32)(skb->data),skb->csum,(u32)(skb->h.raw));
+		printk(KERN_CRIT"DST MAC addr:%02x %02x %02x %02x %02x %02x\n",*(skb->data+0),*(skb->data+1),*(skb->data+2),*(skb->data+3),*(skb->data+4),*(skb->data+5));
+		printk(KERN_CRIT"SRC MAC addr:%02x %02x %02x %02x %02x %02x\n",*(skb->data+6),*(skb->data+7),*(skb->data+8),*(skb->data+9),*(skb->data+10),*(skb->data+11));
+		printk(KERN_CRIT"Len/type    :%02x %02x\n",*(skb->data+12),*(skb->data+13));
+		if(((*(skb->data+14)) & 0xF0) == 0x40){
+			printk(KERN_CRIT"IPV4 Header:\n");
+			printk(KERN_CRIT"%02x %02x %02x %02x\n",*(skb->data+14),*(skb->data+15),*(skb->data+16),*(skb->data+17));
+			printk(KERN_CRIT"%02x %02x %02x %02x\n",*(skb->data+18),*(skb->data+19),*(skb->data+20),*(skb->data+21));
+			printk(KERN_CRIT"%02x %02x %02x %02x\n",*(skb->data+22),*(skb->data+23),*(skb->data+24),*(skb->data+25));
+			printk(KERN_CRIT"%02x %02x %02x %02x\n",*(skb->data+26),*(skb->data+27),*(skb->data+28),*(skb->data+29));
+			printk(KERN_CRIT"%02x %02x %02x %02x\n\n",*(skb->data+30),*(skb->data+31),*(skb->data+32),*(skb->data+33));
+			for(counter = 34; counter < skb->len; counter++)
+				printk("%02X ",*(skb->data + counter));
+		}
+		else{
+			printk(KERN_CRIT"IPV6 FRAME:\n");
+			for(counter = 14; counter < skb->len; counter++)
+				printk("%02X ",*(skb->data + counter));
+		}
+		#endif
+		}
+
+#ifdef CONFIG_FIX_COHERENT_UNALIGNED
+	if(((long)skb->data)&0x10)
+	{
+		struct sk_buff *oldskb;
+		oldskb=skb;
+		skb = alloc_skb(oldskb->len,GFP_ATOMIC);
+
+			skb_copy_from_linear_data (oldskb, skb->data, oldskb->len);
+			skb_put (skb, oldskb->len);
+		
+			dev_kfree_skb(oldskb);
+	}
+#endif
+
+	
+	/*Now we have skb ready and OS invoked this function. Lets make our DMA know about this*/
+	dma_addr = dma_map_single(dev,skb->data,skb->len,PCI_DMA_TODEVICE);
+	status = synopGMAC_set_tx_qptr(gmacdev, dma_addr, skb->len, (u64)skb,0,0,0,offload_needed);
+	if(status < 0){
+		TR0("%s No More Free Tx Descriptors\n",__FUNCTION__);
+//		dev_kfree_skb (skb); //with this, system used to freeze.. ??
+		return -EBUSY;
+	}
+	
+	/*Now force the DMA to start transmission*/	
+	synopGMAC_resume_dma_tx(gmacdev);
+	netdev->trans_start = jiffies;
+	
+	/*Now start the netdev queue*/
+	netif_wake_queue(netdev);
+	
+	return -ESYNOPGMACNOERR;
+}
+
+/**
+ * Function provides the network interface statistics.
+ * Function is registered to linux get_stats() function. This function is 
+ * called whenever ifconfig (in Linux) asks for networkig statistics
+ * (for example "ifconfig eth0").
+ * @param[in] pointer to net_device structure. 
+ * \return Returns pointer to net_device_stats structure.
+ * \callgraph
+ */
+struct net_device_stats *  synopGMAC_linux_get_stats(struct net_device *netdev)
+{
+	synopGMACPciNetworkAdapter *adapter;
+TR("%s called \n",__FUNCTION__);
+	adapter = netdev_priv(netdev);
+return( &(adapter->synopGMACNetStats) );
+}
+
+/**
+ * Function to set multicast and promiscous mode.
+ * @param[in] pointer to net_device structure. 
+ * \return returns void.
+ */
+void synopGMAC_linux_set_multicast_list(struct net_device *netdev)
+{
+synopGMACPciNetworkAdapter *adapter;
+synopGMACdevice * gmacdev;
+adapter = netdev_priv(netdev);
+gmacdev = adapter->synopGMACdev;
+
+if(netdev->flags & IFF_PROMISC)
+{
+synopGMAC_promisc_enable(gmacdev);
+}
+else
+{
+synopGMAC_promisc_disable(gmacdev);
+}
+TR("%s called \n",__FUNCTION__);
+//todo Function not yet implemented.
+return;
+}
+
+/**
+ * Function to set ethernet address of the NIC.
+ * @param[in] pointer to net_device structure. 
+ * @param[in] pointer to an address structure. 
+ * \return Returns 0 on success Errorcode on failure.
+ */
+s32 synopGMAC_linux_set_mac_address(struct net_device *netdev, void * macaddr)
+{
+
+synopGMACPciNetworkAdapter *adapter = NULL;
+synopGMACdevice * gmacdev = NULL;
+struct sockaddr *addr = macaddr;
+
+//adapter = (synopGMACPciNetworkAdapter *) netdev->priv;
+	adapter = netdev_priv(netdev);
+if(adapter == NULL)
+	return -1;
+
+gmacdev = adapter->synopGMACdev;
+if(gmacdev == NULL)
+	return -1;
+
+if(!is_valid_ether_addr(addr->sa_data))
+	return -EADDRNOTAVAIL;
+
+synopGMAC_set_mac_addr(gmacdev,GmacAddr0High,GmacAddr0Low, addr->sa_data); 
+synopGMAC_get_mac_addr(gmacdev,GmacAddr0High,GmacAddr0Low, netdev->dev_addr); 
+
+TR("%s called \n",__FUNCTION__);
+return 0;
+}
+
+/**
+ * Function to change the Maximum Transfer Unit.
+ * @param[in] pointer to net_device structure. 
+ * @param[in] New value for maximum frame size.
+ * \return Returns 0 on success Errorcode on failure.
+ */
+s32 synopGMAC_linux_change_mtu(struct net_device *netdev, s32 newmtu)
+{
+TR("%s called \n",__FUNCTION__);
+//todo Function not yet implemented.
+return 0;
+
+}
+
+/**
+ * IOCTL interface.
+ * This function is mainly for debugging purpose.
+ * This provides hooks for Register read write, Retrieve descriptor status
+ * and Retreiving Device structure information.
+ * @param[in] pointer to net_device structure. 
+ * @param[in] pointer to ifreq structure.
+ * @param[in] ioctl command. 
+ * \return Returns 0 on success Error code on failure.
+ */
+s32 synopGMAC_linux_do_ioctl(struct net_device *netdev, struct ifreq *ifr, s32 cmd)
+{
+s32 retval = 0;
+u16 temp_data = 0;
+synopGMACPciNetworkAdapter *adapter = NULL;
+synopGMACdevice * gmacdev = NULL;
+struct ifr_data_struct
+{
+	u32 unit;
+	u32 addr;
+	u32 data;
+} *req;
+
+
+if(netdev == NULL)
+	return -1;
+if(ifr == NULL)
+	return -1;
+
+req = (struct ifr_data_struct *)ifr->ifr_data;
+
+//adapter = (synopGMACPciNetworkAdapter *) netdev->priv;
+	adapter = netdev_priv(netdev);
+if(adapter == NULL)
+	return -1;
+
+gmacdev = adapter->synopGMACdev;
+if(gmacdev == NULL)
+	return -1;
+//TR("%s :: on device %s req->unit = %08x req->addr = %08x req->data = %08x cmd = %08x \n",__FUNCTION__,netdev->name,req->unit,req->addr,req->data,cmd);
+
+switch(cmd)
+{
+	case IOCTL_READ_REGISTER:		//IOCTL for reading IP registers : Read Registers
+		if      (req->unit == 0)	// Read Mac Register
+			req->data = synopGMACReadReg((u32 *)gmacdev->MacBase,req->addr);
+		else if (req->unit == 1)	// Read DMA Register
+			req->data = synopGMACReadReg((u32 *)gmacdev->DmaBase,req->addr);
+		else if (req->unit == 2){	// Read Phy Register
+			retval = synopGMAC_read_phy_reg((u32 *)gmacdev->MacBase,gmacdev->PhyBase,req->addr,&temp_data);
+			req->data = (u32)temp_data;
+			if(retval != -ESYNOPGMACNOERR)
+				TR("ERROR in Phy read\n");	
+		}
+		break;
+
+	case IOCTL_WRITE_REGISTER:		//IOCTL for reading IP registers : Read Registers
+		if      (req->unit == 0)	// Write Mac Register
+			synopGMACWriteReg((u32 *)gmacdev->MacBase,req->addr,req->data);
+		else if (req->unit == 1)	// Write DMA Register
+			synopGMACWriteReg((u32 *)gmacdev->DmaBase,req->addr,req->data);
+		else if (req->unit == 2){	// Write Phy Register
+			retval = synopGMAC_write_phy_reg((u32 *)gmacdev->MacBase,gmacdev->PhyBase,req->addr,req->data);
+			if(retval != -ESYNOPGMACNOERR)
+				TR("ERROR in Phy read\n");	
+		}
+		break;
+
+	case IOCTL_READ_IPSTRUCT:		//IOCTL for reading GMAC DEVICE IP private structure
+	        memcpy(ifr->ifr_data, gmacdev, sizeof(synopGMACdevice));
+		break;
+
+	case IOCTL_READ_RXDESC:			//IOCTL for Reading Rx DMA DESCRIPTOR
+		memcpy(ifr->ifr_data, gmacdev->RxDesc + ((DmaDesc *) (ifr->ifr_data))->data1, sizeof(DmaDesc) );
+		break;
+
+	case IOCTL_READ_TXDESC:			//IOCTL for Reading Tx DMA DESCRIPTOR
+		memcpy(ifr->ifr_data, gmacdev->TxDesc + ((DmaDesc *) (ifr->ifr_data))->data1, sizeof(DmaDesc) );
+		break;
+	case IOCTL_POWER_DOWN:
+		if	(req->unit == 1){	//power down the mac
+			TR("============I will Power down the MAC now =============\n");
+			// If it is already in power down don't power down again
+			retval = 0;
+			if(((synopGMACReadReg((u32 *)gmacdev->MacBase,GmacPmtCtrlStatus)) & GmacPmtPowerDown) != GmacPmtPowerDown){
+			synopGMAC_linux_powerdown_mac(gmacdev);			
+			retval = 0;
+			}
+		}
+		if	(req->unit == 2){	//Disable the power down  and wake up the Mac locally
+			TR("============I will Power up the MAC now =============\n");
+			//If already powered down then only try to wake up
+			retval = -1;
+			if(((synopGMACReadReg((u32 *)gmacdev->MacBase,GmacPmtCtrlStatus)) & GmacPmtPowerDown) == GmacPmtPowerDown){
+			synopGMAC_power_down_disable(gmacdev);
+			synopGMAC_linux_powerup_mac(gmacdev);
+			retval = 0;
+			}
+		}
+		break;
+	default:
+		retval = -1;
+
+}
+
+
+return retval;
+}
+
+/**
+ * Function to handle a Tx Hang.
+ * This is a software hook (Linux) to handle transmitter hang if any.
+ * We get transmitter hang in the device interrupt status, and is handled
+ * in ISR. This function is here as a place holder.
+ * @param[in] pointer to net_device structure 
+ * \return void.
+ */
+void synopGMAC_linux_tx_timeout(struct net_device *netdev)
+{
+TR("%s called \n",__FUNCTION__);
+//todo Function not yet implemented
+return;
+}
+
+#define GMAC_NET_STATS_LEN	21
+#define GMAC_STATS_LEN	ARRAY_SIZE(gmac_gstrings_stats)
+static const char gmac_gstrings_stats[][ETH_GSTRING_LEN] = {
+	"rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
+	"tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
+	"rx_length_errors", "rx_over_errors", "rx_crc_errors",
+	"rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
+	"tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
+	"tx_heartbeat_errors", "tx_window_errors",
+	/* device-specific stats */
+	"tx_deferred", "tx_single_collisions", "tx_multi_collisions",
+	"tx_flow_control_pause", "rx_flow_control_pause",
+	"rx_flow_control_unsupported", "tx_tco_packets", "rx_tco_packets",
+};
+
+static int mdio_read(struct net_device *netdev, int addr, int reg)
+{
+	synopGMACPciNetworkAdapter *adapter;
+	synopGMACdevice * gmacdev;
+	u16 data;
+	//adapter = netdev->priv;
+	adapter = netdev_priv(netdev);
+	gmacdev = adapter->synopGMACdev;
+	
+	synopGMAC_read_phy_reg((u32 *)gmacdev->MacBase,addr,reg, &data);
+	return data;
+}
+
+static void mdio_write(struct net_device *netdev, int addr, int reg, int data)
+{
+	synopGMACPciNetworkAdapter *adapter;
+	synopGMACdevice * gmacdev;
+	//adapter = netdev->priv;
+	adapter = netdev_priv(netdev);
+	gmacdev = adapter->synopGMACdev;
+	synopGMAC_write_phy_reg((u32 *)gmacdev->MacBase,addr,reg,data);
+}
+
+static void gmac_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
+{
+#define DRV_NAME "gmac"
+#define DRV_VERSION "0.1"
+	strcpy(info->driver, DRV_NAME);
+	strcpy(info->version, DRV_VERSION);
+	strcpy(info->bus_info, "platform");
+	info->regdump_len = 256;
+}
+
+static int gmac_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
+{
+	synopGMACPciNetworkAdapter *adapter = netdev_priv(dev);
+	mii_ethtool_gset(&adapter->mii, cmd);
+	return 0;
+}
+
+static int gmac_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
+{
+	synopGMACPciNetworkAdapter *adapter = netdev_priv(dev);
+	synopGMACdevice            *gmacdev = adapter->synopGMACdev;
+	int rc;
+	mdio_write(dev, adapter->mii.phy_id, MII_BMCR, BMCR_RESET);
+	rc = mii_ethtool_sset(&adapter->mii, cmd);
+	return rc;
+}
+
+static int gmac_get_regs_len(struct net_device *dev)
+{
+	return DMABASE - MACBASE + 0x58;
+}
+
+static void gmac_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *regbuf)
+{
+	synopGMACPciNetworkAdapter *adapter = netdev_priv(dev);
+	synopGMACdevice            *gmacdev = adapter->synopGMACdev;
+	int i;
+	u32 data;
+	for(i = 0;i < regs->len; i += 4)
+	{
+	data=readl(gmacdev->MacBase + i);
+	memcpy(regbuf + i,&data,4);
+	}
+}
+
+
+
+static int gmac_nway_reset(struct net_device *dev)
+{
+	//synopGMACPciNetworkAdapter *adapter = dev->priv;
+	synopGMACPciNetworkAdapter *adapter = netdev_priv(dev);
+	return mii_nway_restart(&adapter->mii);
+}
+
+static u32 gmac_get_link(struct net_device *dev)
+{
+	//synopGMACPciNetworkAdapter *adapter = dev->priv;
+	synopGMACPciNetworkAdapter *adapter = netdev_priv(dev);
+	return mii_link_ok(&adapter->mii);
+}
+
+static int gmac_get_sset_count(struct net_device *dev, int sset)
+{
+	switch (sset) {
+	case ETH_SS_STATS:
+		return GMAC_STATS_LEN;
+	default:
+		return -EOPNOTSUPP;
+	}
+}
+
+static void gmac_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
+{
+//	int i;
+
+//	for(i = 0; i < GMAC_NET_STATS_LEN; i++)
+//		data[i] = ((unsigned long *)&dev->stats)[i];
+}
+
+
+static void gmac_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
+{
+	switch(stringset) {
+	case ETH_SS_STATS:
+		memcpy(data, *gmac_gstrings_stats, sizeof(gmac_gstrings_stats));
+		break;
+	}
+}
+
+
+static const struct ethtool_ops gmac_ethtool_ops = {
+	.get_drvinfo		= gmac_get_drvinfo,
+	.get_settings		= gmac_get_settings,
+	.set_settings		= gmac_set_settings,
+	.get_regs_len		= gmac_get_regs_len,
+	.get_regs		= gmac_get_regs,
+	.nway_reset		= gmac_nway_reset,
+	.get_link		= gmac_get_link,
+	.get_strings		= gmac_get_strings,
+	//.get_sset_count		= gmac_get_sset_count,
+	.get_ethtool_stats	= gmac_get_ethtool_stats,
+};
+
+static int ether_set=0;
+static char hwaddr[ETH_ALEN]=DEFAULT_MAC_ADDRESS;
+static int __init setether(char *str)
+{
+int i;
+for(i=0;i<6;i++,str+=3)
+hwaddr[i]=simple_strtoul(str,0,16);
+ether_set=1;
+	return 1;
+}
+
+__setup("ethaddr=", setether);
+/**
+ * Function to initialize the Linux network interface.
+ * 
+ * Linux dependent Network interface is setup here. This provides 
+ * an example to handle the network dependent functionality.
+ *
+ * \return Returns 0 on success and Error code on failure.
+ */
+void * __init synopGMAC_init_network_interface(struct device *dev,u8* synopGMACMappedAddr,u32 synopGMACMappedAddrSize,int irq)
+{
+	s32 err;
+	struct net_device *netdev;
+	synopGMACPciNetworkAdapter *synopGMACadapter;
+
+	TR("Now Going to Call register_netdev to register the network interface for GMAC core\n");
+	/*
+	Lets allocate and set up an ethernet device, it takes the sizeof the private structure. This is mandatory as a 32 byte 
+	allignment is required for the private data structure.
+	*/
+	netdev = alloc_etherdev(sizeof(synopGMACPciNetworkAdapter));
+	if(!netdev){
+	err = -ESYNOPGMACNOMEM;
+	goto err_alloc_etherdev;
+	}
+	
+	synopGMACadapter = netdev_priv(netdev);
+	synopGMACadapter->synopGMACnetdev = netdev;
+	synopGMACadapter->dev = dev;
+	synopGMACadapter->synopGMACdev    = NULL;
+    synopGMACadapter->synopGMACMappedAddr=synopGMACMappedAddr;
+	synopGMACadapter->synopGMACMappedAddrSize=synopGMACMappedAddrSize;
+    synopGMACadapter->irq=irq;
+	
+	/*Allocate Memory for the the GMACip structure*/
+	synopGMACadapter->synopGMACdev = (synopGMACdevice *) plat_alloc_memory(sizeof (synopGMACdevice));
+	if(!synopGMACadapter->synopGMACdev){
+	TR0("Error in Memory Allocataion \n");
+	}
+
+	if(1){
+	static int index=0;
+	if(!ether_set)
+	{
+		get_random_bytes(&hwaddr[3], 3);
+		ether_set = 1;
+	}
+	hwaddr[5] += index;
+	memcpy(netdev->dev_addr,hwaddr,6);
+	index++;
+	}
+
+	/*Attach the device to MAC struct This will configure all the required base addresses
+	  such as Mac base, configuration base, phy base address(out of 32 possible phys )*/
+	printk("<0>adapter=%p\n",synopGMACadapter);
+	synopGMAC_attach(synopGMACadapter->synopGMACdev, synopGMACMappedAddr + MACBASE, synopGMACMappedAddr + DMABASE, DEFAULT_PHY_BASE,netdev->dev_addr);
+
+	synopGMAC_reset(synopGMACadapter->synopGMACdev);
+	if(synop_pci_using_dac){
+
+	TR("netdev->features = %08lx\n",netdev->features);
+	TR("synop_pci_using dac is %08x\n",synop_pci_using_dac);
+	netdev->features |= NETIF_F_HIGHDMA;
+	TR("netdev->features = %08lx\n",netdev->features);
+	}
+	
+
+	netdev->netdev_ops	= &loongson_gmac_netdev_ops;  
+	netdev->ethtool_ops	= &gmac_ethtool_ops;
+
+	netdev->watchdog_timeo = 5 * HZ;
+
+	/*Now start the network interface*/
+	TR("Now Registering the netdevice\n");
+	if((err = register_netdev(netdev)) != 0) {
+		TR0("Error in Registering netdevice\n");
+		return 0;
+	}  
+
+
+
+	/* MII setup */
+	synopGMACadapter->mii.phy_id_mask = 0x1F;
+	synopGMACadapter->mii.reg_num_mask = 0x1F;
+	synopGMACadapter->mii.dev = netdev;
+	synopGMACadapter->mii.mdio_read = mdio_read;
+	synopGMACadapter->mii.mdio_write = mdio_write;
+	synopGMACadapter->mii.phy_id = synopGMACadapter->synopGMACdev->PhyBase;
+	synopGMACadapter->mii.supports_gmii = mii_check_gmii_support(&synopGMACadapter->mii);
+ 	return synopGMACadapter;
+err_alloc_etherdev:
+	TR0("Problem in alloc_etherdev()..Take Necessary action\n");
+	return 0;
+}
+
+
+
+/*
+module_init(synopGMAC_init_network_interface);
+module_exit(synopGMAC_exit_network_interface);
+
+MODULE_AUTHOR("Synopsys India");
+MODULE_LICENSE("GPL/BSD");
+MODULE_DESCRIPTION("SYNOPSYS GMAC DRIVER Network INTERFACE");
+
+EXPORT_SYMBOL(synopGMAC_init_pci_bus_interface);
+*/
diff -uNra linux-3.0.82/drivers/net/loongson/gmac/synopGMAC_network_interface.h linux-3.0.82x/drivers/net/loongson/gmac/synopGMAC_network_interface.h
--- linux-3.0.82/drivers/net/loongson/gmac/synopGMAC_network_interface.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/loongson/gmac/synopGMAC_network_interface.h	2017-09-23 03:42:49.682676090 +0800
@@ -0,0 +1,31 @@
+/** \file
+ * Header file for the nework dependent functionality.
+ * The function prototype listed here are linux dependent.
+ *   
+ * \internal
+ * ---------------------------REVISION HISTORY-------------------
+ * Synopsys 			01/Aug/2007		Created
+ */
+ 
+ 
+ 
+#ifndef SYNOP_GMAC_NETWORK_INTERFACE_H
+#define SYNOP_GMAC_NETWORK_INTERFACE_H 1
+
+#define NET_IF_TIMEOUT (10*HZ)
+#define CHECK_TIME (HZ)
+
+void *synopGMAC_init_network_interface(struct device *dev,u8* synopGMACMappedAddr,u32 synopGMACMappedAddrSize,int irq);
+void  synopGMAC_exit_network_interface(void);
+
+s32 synopGMAC_linux_open(struct net_device *);
+s32 synopGMAC_linux_close(struct net_device *);
+s32 synopGMAC_linux_xmit_frames(struct sk_buff *, struct net_device *);
+struct net_device_stats * synopGMAC_linux_get_stats(struct net_device *);
+void synopGMAC_linux_set_multicast_list(struct net_device *);
+s32 synopGMAC_linux_set_mac_address(struct net_device *,void *);
+s32 synopGMAC_linux_change_mtu(struct net_device *,s32);
+s32 synopGMAC_linux_do_ioctl(struct net_device *,struct ifreq *,s32);
+void synopGMAC_linux_tx_timeout(struct net_device *);
+
+#endif /* End of file */
diff -uNra linux-3.0.82/drivers/net/loongson/gmac/synopGMAC_pci_bus_interface.c linux-3.0.82x/drivers/net/loongson/gmac/synopGMAC_pci_bus_interface.c
--- linux-3.0.82/drivers/net/loongson/gmac/synopGMAC_pci_bus_interface.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/loongson/gmac/synopGMAC_pci_bus_interface.c	2017-09-23 03:42:49.682676090 +0800
@@ -0,0 +1,259 @@
+/**\file
+ * This file encapsulates all the PCI dependent initialization and resource allocation
+ * on Linux
+ */  
+  
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/init.h>
+#include <linux/dma-mapping.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+  
+#include "synopGMAC_Host.h"
+#include "synopGMAC_plat.h"
+#include "synopGMAC_pci_bus_interface.h"
+#include "synopGMAC_network_interface.h"
+  
+/**********************************************************************************/ 
+  
+#define SYNOPGMAC_VENDOR_ID  0x0700
+#define SYNOPGMAC_DEVICE_ID  0x1108
+  
+#define BAR0  0
+#define BAR1  1
+#define BAR2  2
+#define BAR3  3
+#define BAR4  4
+#define BAR5  5
+static u8 synopGMAC_driver_name[] = "synopGMAC_pci_driver";
+static struct pci_device_id ids[] = { 
+    {PCI_DEVICE (SYNOPGMAC_VENDOR_ID, SYNOPGMAC_DEVICE_ID),}, {0,} 
+};
+
+extern u32 synop_pci_using_dac;
+
+/**********************************************************************************/ 
+
+/* Get the pci revision id */ 
+  static unsigned char
+get_revision (struct pci_dev *dev) 
+{
+  u8 revision;
+  pci_read_config_byte (dev, PCI_REVISION_ID, &revision);
+  return revision;
+}
+
+
+/**
+ * probe function of Linux pci driver.
+ * 	- Ioremap the BARx memory (It is BAR0 here) 
+ *	- lock the memory for the device
+ * \return Returns 0 on success and Error code on failure.
+ */ 
+static int probe (struct pci_dev *pdev, const struct pci_device_id *my_pci_id) 
+{
+  s32 retval;
+  u16 word_data = 0;
+  u32 double_word_data = 0;
+  u32 the_register_resource_base, the_register_resource_size;
+  synopGMACPciNetworkAdapter *synopGMACadapter;
+  u8 *synopGMACMappedAddr;
+  u32 synopGMACMappedAddrSize;
+  
+    /* Do probing type stuff here.  
+     * Like calling request_region();
+     */ 
+    TR ("ENABLING PCI DEVICE\n");
+  
+    /* Enable the device */ 
+    if (pci_enable_device (pdev))
+    {
+      return -ENODEV;
+    }
+  if (!(retval = pci_set_dma_mask (pdev, DMA_64BIT_MASK))
+	&& !(retval = pci_set_consistent_dma_mask (pdev, DMA_64BIT_MASK)))
+    {
+      synop_pci_using_dac = 1;
+    }
+  
+  else
+    {
+      if ((pci_set_dma_mask (pdev, DMA_32BIT_MASK))
+	   && (retval = pci_set_consistent_dma_mask (pdev, DMA_32BIT_MASK)))
+	{
+	  TR0 ("NO usable DMA Configuration, aborting\n");
+	  return retval;
+	}
+      synop_pci_using_dac = 0;
+    }
+  if (synop_pci_using_dac)
+    TR ("64 bit double-address cycle Supported with this device\n");
+  
+  else
+    TR ("32 bit double-address cycle Supported with this device\n");
+  
+    //Setting the pci as master
+    pci_set_master (pdev);
+  
+    /* Get the pci revision id */ 
+    if (get_revision (pdev) == 0x42)
+    return -ENODEV;
+ 
+    TR ("synopGMAC device found at slot %d, func %d\n",PCI_SLOT (pdev->devfn), PCI_FUNC (pdev->devfn));
+  
+  {
+    
+      //u16 w  = 0, dw = 0;
+    TR ("****************************************************\n");
+    pci_read_config_word (pdev, PCI_COMMAND, &word_data);
+    TR ("COMMAND = %04x\n", word_data);
+    pci_read_config_word (pdev, PCI_STATUS, &word_data);
+    TR ("STATUS  = %04x\n", word_data);
+    pci_read_config_dword (pdev, PCI_CLASS_REVISION, &double_word_data);
+    TR ("CLASS_REVISION = %08x\n", double_word_data);
+    pci_read_config_dword (pdev, PCI_BASE_ADDRESS_0, &double_word_data);
+    TR ("BASE_ADDRESS_0 = %08x\n", double_word_data);
+    pci_read_config_dword (pdev, PCI_BASE_ADDRESS_1, &double_word_data);
+    TR ("BASE_ADDRESS_1 = %08x\n", double_word_data);
+    pci_read_config_dword (pdev, PCI_BASE_ADDRESS_2, &double_word_data);
+    TR ("BASE_ADDRESS_2 = %08x\n", double_word_data);
+    pci_read_config_dword (pdev, PCI_BASE_ADDRESS_3, &double_word_data);
+    TR ("BASE_ADDRESS_3 = %08x\n", double_word_data);
+    pci_read_config_dword (pdev, PCI_BASE_ADDRESS_4, &double_word_data);
+    TR ("BASE_ADDRESS_4 = %08x\n", double_word_data);
+    pci_read_config_dword (pdev, PCI_BASE_ADDRESS_5, &double_word_data);
+    TR ("BASE_ADDRESS_5 = %08x\n", double_word_data);
+    TR ("****************************************************\n");
+    
+    /*These are the retry counts without which driver fais to run movies :) */ 
+    pci_write_config_byte (pdev, 0x40, 0xff);
+    pci_write_config_byte (pdev, 0x41, 0xff);
+  }
+  
+    /* Get the resource start address and the size for BARx in question In this case BAR0 */ 
+  the_register_resource_base = pci_resource_start (pdev, BAR0);
+  the_register_resource_size = pci_resource_len (pdev, BAR0);
+  TR ("BAR0 Base is %x size is %d\n", the_register_resource_base,the_register_resource_size);
+  
+    /*
+       Get the iomapped address which is nothing but the physical to virtual mapped address 
+       ioremap_nocahe  is similare to ioremap on most of the architectures. But The pci-ahb bridge 
+       BAR0 is mapped to 16M address space. If we ask for this much memory, Kernel refuses to 
+       give the same. 
+       
+       Note that 16M is too much of memory to request from kernel. 
+       Lets ask for less memory so that kernel is happy giving it  :)
+     */ 
+    synopGMACMappedAddr = (u8 *) ioremap_nocache ((u32) the_register_resource_base, (size_t) (128 * 1024));
+    synopGMACMappedAddrSize = (128 * 1024);	// this is needed for remove function
+  
+  if (!synopGMACMappedAddr){
+      TR0 ("ioremap_nocache failed with addrrss %p\n",  synopGMACMappedAddr);
+  }
+  
+  TR ("Physical address = %08x\n", the_register_resource_base);
+  TR ("Remapped address = %p\n",  synopGMACMappedAddr);
+  
+    /*Check if region is already locked by any other driver ? */ 
+    if (check_mem_region ( (resource_size_t)synopGMACMappedAddr, synopGMACMappedAddrSize))
+    {
+      synopGMACMappedAddr = 0;	// Errored in checking memory region   
+      TR0("Memory Already Locked !!\n");
+      iounmap (synopGMACMappedAddr);
+      return -EBUSY;
+    }
+  
+    /*Great We have free memory of required size.. Lets Lock it... */ 
+    request_mem_region ((resource_size_t) synopGMACMappedAddr, synopGMACMappedAddrSize,"synopGMACmemory");
+    TR ("Requested memory region for synopGMACMappedAddr = 0x%p\n",  synopGMACMappedAddr);
+  
+    /*Now pci interface is ready. Let give this information the the HOST module */ 
+	if((synopGMACadapter=synopGMAC_init_network_interface(&pdev->dev,synopGMACMappedAddr,synopGMACMappedAddrSize,pdev->irq)))
+	pci_set_drvdata(pdev,synopGMACadapter);
+  return 0;			// Everything is fine. So return 0.
+}
+
+
+/**
+ * remove function of Linux pci driver.
+ * 
+ * 	- Releases the memory allocated by probe function
+ *	- Unmaps the memory region 
+ *
+ * \return Returns 0 on success and Error code on failure.
+ */ 
+  static void remove (struct pci_dev *dev) 
+{
+synopGMACPciNetworkAdapter *adapter=pci_get_drvdata(dev);
+struct net_device *netdev=adapter->synopGMACnetdev;
+
+  
+    /* Do the reverse of what probe does */ 
+    if (adapter->synopGMACMappedAddr)
+    {
+      TR0 ("Releaseing synopGMACMappedAddr 0x%p whose size is %d\n",  adapter->synopGMACMappedAddr, adapter->synopGMACMappedAddrSize);
+      
+      /*release the memory region which we locked using request_mem_region */ 
+      release_mem_region ((resource_size_t) adapter->synopGMACMappedAddr, adapter->synopGMACMappedAddrSize);
+    }
+  TR0 ("Unmapping synopGMACMappedAddr =0x%p\n",  adapter->synopGMACMappedAddr);
+  iounmap (adapter->synopGMACMappedAddr);
+	if(netdev) {
+		unregister_netdev(netdev);
+		free_netdev(netdev);
+		pci_release_regions(dev);
+		pci_disable_device(dev);
+		pci_set_drvdata(dev, NULL);
+	}
+}
+
+static struct pci_driver pci_driver = 
+{ .name = synopGMAC_driver_name,
+  .id_table = ids, 
+  .probe = probe,
+  .remove = remove, 
+};
+
+
+/**
+ * Function to initialize the Linux Pci Bus Interface.
+ * Registers the pci_driver 
+ * \return Returns 0 on success and Error code on failure.
+ */ 
+  s32 __init synopGMAC_init_pci_bus_interface (void) 
+{
+  s32 retval;
+  TR ("Now Going to Call pci_register_driver\n");
+  if ((retval = pci_register_driver (&pci_driver)))
+    {
+      return retval;
+    }
+  return 0;
+}
+
+
+/**
+ * Function to De-initialize the Linux Pci Bus Interface.
+ * 
+ * Unregisters the pci_driver 
+ *
+ * \return Returns 0 on success and Error code on failure.
+ */ 
+ void __exit synopGMAC_exit_pci_bus_interface (void) 
+{
+  TR0 ("Now Calling pci_unregister_driver\n");
+  pci_unregister_driver (&pci_driver);
+} 
+
+/*
+module_init(synopGMAC_init_pci_bus_interface);
+module_exit(synopGMAC_exit_pci_bus_interface);
+
+MODULE_AUTHOR("Synopsys India");
+MODULE_LICENSE("GPL/BSD");
+MODULE_DESCRIPTION("SYNOPSYS GMAC DRIVER PCI INTERFACE");
+
+EXPORT_SYMBOL(synopGMAC_init_pci_bus_interface);
+*/ 
diff -uNra linux-3.0.82/drivers/net/loongson/gmac/synopGMAC_pci_bus_interface.h linux-3.0.82x/drivers/net/loongson/gmac/synopGMAC_pci_bus_interface.h
--- linux-3.0.82/drivers/net/loongson/gmac/synopGMAC_pci_bus_interface.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/loongson/gmac/synopGMAC_pci_bus_interface.h	2017-09-23 03:42:49.682676090 +0800
@@ -0,0 +1,14 @@
+/* This is the header file for the pci related functions
+ * This may also incorporate the netwrok related stuff as well
+ */
+ 
+ 
+ 
+#ifndef SYNOP_GMAC_PCI_BUS_INTERFACE_H
+#define SYNOP_GMAC_PCI_BUS_INTERFACE_H 1
+
+s32   synopGMAC_init_pci_bus_interface(void);
+void  synopGMAC_exit_pci_bus_interface(void);
+
+
+#endif /* End of file */
diff -uNra linux-3.0.82/drivers/net/loongson/gmac/synopGMAC_plat.c linux-3.0.82x/drivers/net/loongson/gmac/synopGMAC_plat.c
--- linux-3.0.82/drivers/net/loongson/gmac/synopGMAC_plat.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/loongson/gmac/synopGMAC_plat.c	2017-09-23 03:42:49.682676090 +0800
@@ -0,0 +1,83 @@
+/**\file
+ *  This file defines the wrapper for the platform/OS related functions
+ *  The function definitions needs to be modified according to the platform 
+ *  and the Operating system used.
+ *  This file should be handled with greatest care while porting the driver
+ *  to a different platform running different operating system other than
+ *  Linux 2.6.xx.
+ * \internal
+ * ----------------------------REVISION HISTORY-----------------------------
+ * Synopsys			01/Aug/2007			Created
+ */
+ 
+#include "synopGMAC_plat.h"
+
+/**
+  * This is a wrapper function for Memory allocation routine. In linux Kernel 
+  * it it kmalloc function
+  * @param[in] bytes in bytes to allocate
+  */
+
+void *plat_alloc_memory(u32 bytes) 
+{
+	return kmalloc((size_t)bytes, GFP_KERNEL);
+}
+
+/**
+  * This is a wrapper function for consistent dma-able Memory allocation routine. 
+  * In linux Kernel, it depends on pci dev structure
+  * @param[in] bytes in bytes to allocate
+  */
+
+void *plat_alloc_consistent_dmaable_memory(struct device *dev, u32 size, dma_addr_t *addr) 
+{
+#ifdef CONFIG_GMAC_COHERENT
+ return (dma_alloc_noncoherent(dev,size,addr,GFP_ATOMIC));
+#else
+ return (dma_alloc_coherent(dev,size,addr,GFP_ATOMIC));
+#endif
+}
+
+/**
+  * This is a wrapper function for freeing consistent dma-able Memory.
+  * In linux Kernel, it depends on pci dev structure
+  * @param[in] bytes in bytes to allocate
+  */
+
+void plat_free_consistent_dmaable_memory(struct device *dev, u32 size, void * addr,u32 dma_addr) 
+{
+#ifdef CONFIG_GMAC_COHERENT
+ dma_free_noncoherent (dev,size,addr,dma_addr);
+#else
+ dma_free_coherent (dev,size,addr,dma_addr);
+#endif
+ return;
+}
+
+
+
+/**
+  * This is a wrapper function for Memory free routine. In linux Kernel 
+  * it it kfree function
+  * @param[in] buffer pointer to be freed
+  */
+void plat_free_memory(void *buffer) 
+{
+	kfree(buffer);
+	return ;
+}
+
+
+/**
+  * This is a wrapper function for platform dependent delay 
+  * Take care while passing the argument to this function 
+  * @param[in] buffer pointer to be freed
+  */
+void plat_delay(u32 delay)
+{
+	while (delay--);
+	return;
+}
+
+
+
diff -uNra linux-3.0.82/drivers/net/loongson/gmac/.synopGMAC_plat.c.swp linux-3.0.82x/drivers/net/loongson/gmac/.synopGMAC_plat.c.swp
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diff -uNra linux-3.0.82/drivers/net/loongson/gmac/synopGMAC_platform_interface.c linux-3.0.82x/drivers/net/loongson/gmac/synopGMAC_platform_interface.c
--- linux-3.0.82/drivers/net/loongson/gmac/synopGMAC_platform_interface.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/loongson/gmac/synopGMAC_platform_interface.c	2017-09-23 03:42:49.682676090 +0800
@@ -0,0 +1,139 @@
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include "synopGMAC_Host.h"
+#include "synopGMAC_network_interface.h"
+
+static int init_one_platform(struct platform_device *pdev)
+{
+	synopGMACPciNetworkAdapter *synopGMACadapter;
+	u8 *synopGMACMappedAddr;
+	u32 synopGMACMappedAddrSize;
+	u32 irq;
+	struct resource *res;
+
+
+	irq = platform_get_irq(pdev, 0);
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	synopGMACMappedAddrSize=res->end-res->start+1;
+	synopGMACMappedAddr=ioremap_nocache(res->start,synopGMACMappedAddrSize);
+	printk("<0>init_one_platform %p\n",synopGMACMappedAddr);
+
+	if((synopGMACadapter=synopGMAC_init_network_interface(&pdev->dev,synopGMACMappedAddr,synopGMACMappedAddrSize,irq)))
+		platform_set_drvdata(pdev,synopGMACadapter);
+	return 0;
+}
+
+static int remove_one_platform(struct platform_device *pdev)
+{
+	synopGMACPciNetworkAdapter *adapter=platform_get_drvdata(pdev);
+	struct net_device *netdev=adapter->synopGMACnetdev;
+
+	/* Do the reverse of what probe does */ 
+	if (adapter->synopGMACMappedAddr)
+	{
+		TR0 ("Releaseing synopGMACMappedAddr 0x%p whose size is %d\n",  adapter->synopGMACMappedAddr, adapter->synopGMACMappedAddrSize);
+
+		/*release the memory region which we locked using request_mem_region */ 
+		release_mem_region ((resource_size_t) adapter->synopGMACMappedAddr, adapter->synopGMACMappedAddrSize);
+	}
+	TR0 ("Unmapping synopGMACMappedAddr =0x%p\n",  adapter->synopGMACMappedAddr);
+	iounmap (adapter->synopGMACMappedAddr);
+	if(netdev) {
+		unregister_netdev(netdev);
+		free_netdev(netdev);
+		platform_set_drvdata(pdev, NULL);
+	}
+
+	return 0;
+}
+
+#ifdef CONFIG_PM
+
+extern void synopGMAC_linux_powerdown_mac(synopGMACdevice *gmacdev);
+extern void synopGMAC_linux_powerup_mac(synopGMACdevice *gmacdev);
+extern s32 synopGMAC_linux_open(struct net_device *netdev);
+extern s32 synopGMAC_linux_close(struct net_device *netdev);
+extern void prom_printf(char *fmt, ...);
+#define MYDBG prom_printf("%d\n", __LINE__);
+
+static int loongson_gmac_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	synopGMACPciNetworkAdapter *adapter=platform_get_drvdata(pdev);
+	synopGMACdevice * gmacdev = adapter->synopGMACdev;
+	struct net_device *ndev = adapter->synopGMACnetdev;
+
+	if (ndev) {
+		if (!netif_running(ndev))
+			return 0;
+
+		netif_device_detach(ndev);
+
+		synopGMAC_linux_close(ndev);			
+		//dev_close(ndev);			
+		//synopGMAC_linux_powerdown_mac(gmacdev);			
+	}
+
+	//printk("%s",__FUNCTION__);
+	return 0;
+}
+static int loongson_gmac_resume(struct platform_device *pdev)
+{
+	synopGMACPciNetworkAdapter *adapter=platform_get_drvdata(pdev);
+	synopGMACdevice * gmacdev = adapter->synopGMACdev;
+	struct net_device *ndev = adapter->synopGMACnetdev;
+
+
+	if (ndev) {
+		if (!netif_running(ndev)) 
+			return 0;
+
+		//synopGMAC_power_down_disable(gmacdev);
+		//synopGMAC_linux_powerup_mac(gmacdev);
+		netif_device_attach(ndev);
+		synopGMAC_linux_open(ndev);			
+		//dev_open(ndev);			
+
+	}
+
+	//printk("%s",__FUNCTION__);
+	return 0;
+}
+#else
+#define loongson_gmac_suspend	NULL
+#define loongson_gmac_resume	NULL
+#endif
+static struct platform_driver loongson_gmac_driver = {
+	.probe			= init_one_platform,
+	.remove			= remove_one_platform,
+	.suspend		= loongson_gmac_suspend,
+	.resume			= loongson_gmac_resume,
+	.driver		= {
+		.name	= "loongson-gmac",
+		.owner	= THIS_MODULE,
+	},
+};
+
+static int __init loongson_gmac_init(void)
+{
+	platform_driver_register(&loongson_gmac_driver);
+	return 0;
+}
+
+
+module_init(loongson_gmac_init);
+
+static void __exit loongson_gmac_exit(void)
+{
+	platform_driver_unregister(&loongson_gmac_driver);
+}
+
+module_exit(loongson_gmac_exit);
+
+MODULE_AUTHOR("China Loongson");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("SYNOPSYS GMAC DRIVER Network INTERFACE");
diff -uNra linux-3.0.82/drivers/net/loongson/gmac/.synopGMAC_platform_interface.c.swp linux-3.0.82x/drivers/net/loongson/gmac/.synopGMAC_platform_interface.c.swp
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diff -uNra linux-3.0.82/drivers/net/loongson/gmac/synopGMAC_plat.h linux-3.0.82x/drivers/net/loongson/gmac/synopGMAC_plat.h
--- linux-3.0.82/drivers/net/loongson/gmac/synopGMAC_plat.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/loongson/gmac/synopGMAC_plat.h	2017-09-23 03:42:49.682676090 +0800
@@ -0,0 +1,180 @@
+/**\file
+ *  This file serves as the wrapper for the platform/OS dependent functions
+ *  It is needed to modify these functions accordingly based on the platform and the
+ *  OS. Whenever the synopsys GMAC driver ported on to different platform, this file
+ *  should be handled at most care.
+ *  The corresponding function definitions for non-inline functions are available in 
+ *  synopGMAC_plat.c file.
+ * \internal
+ * -------------------------------------REVISION HISTORY---------------------------
+ * Synopsys 				01/Aug/2007		 	   Created
+ */
+ 
+ 
+#ifndef SYNOP_GMAC_PLAT_H
+#define SYNOP_GMAC_PLAT_H 1
+
+
+#include <linux/kernel.h>
+#include <asm/io.h>
+#include <linux/gfp.h>
+#include <linux/slab.h>
+#include <linux/pci.h>
+
+#define TR0(fmt, args...) printk(KERN_CRIT "SynopGMAC: " fmt, ##args)				
+
+#ifdef DEBUG
+#undef TR
+#  define TR(fmt, args...) printk(KERN_CRIT "SynopGMAC: " fmt, ##args)
+#else
+# define TR(fmt, args...) /* not debugging: nothing */
+#endif
+
+
+#ifdef CONFIG_GMAC_COHERENT
+#include <dma-coherence.h>
+#define dma_map_single(dev,ptr,size,dir) plat_map_dma_mem(dev,ptr,size)
+#define dma_unmap_single(dev,ptr,size,dir) plat_unmap_dma_mem(ptr)
+#endif
+
+#if 0
+typedef int bool;
+enum synopGMAC_boolean
+ { 
+    false = 0,
+    true = 1 
+ };
+#endif
+
+#define DEFAULT_DELAY_VARIABLE  10
+#define DEFAULT_LOOP_VARIABLE   10000
+
+/* There are platform related endian conversions
+ *
+ */
+
+#define LE32_TO_CPU	__le32_to_cpu
+#define BE32_TO_CPU	__be32_to_cpu
+#define CPU_TO_LE32	__cpu_to_le32
+
+/* Error Codes */
+#define ESYNOPGMACNOERR   0
+#define ESYNOPGMACNOMEM   1
+#define ESYNOPGMACPHYERR  2
+#define ESYNOPGMACBUSY    3
+
+struct Network_interface_data
+{
+	u32 unit;
+	u32 addr;
+	u32 data;
+};
+
+
+/**
+  * These are the wrapper function prototypes for OS/platform related routines
+  */ 
+
+void * plat_alloc_memory(u32 );
+void   plat_free_memory(void *);
+
+void * plat_alloc_consistent_dmaable_memory(struct device *, u32, dma_addr_t *);
+void   plat_free_consistent_dmaable_memory (struct device *, u32, void *, u32);
+
+void   plat_delay(u32);
+
+
+/**
+ * The Low level function to read register contents from Hardware.
+ * 
+ * @param[in] pointer to the base of register map  
+ * @param[in] Offset from the base
+ * \return  Returns the register contents 
+ */
+static u32 __inline__ synopGMACReadReg(u32 *RegBase, u32 RegOffset)
+{
+
+  void *addr = (void *)RegBase + RegOffset;
+  u32 data = readl((void *)addr);
+  //TR("%s RegBase = 0x%08x RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__, (u32)RegBase, RegOffset, data );
+  return data;
+
+}
+
+/**
+ * The Low level function to write to a register in Hardware.
+ * 
+ * @param[in] pointer to the base of register map  
+ * @param[in] Offset from the base
+ * @param[in] Data to be written 
+ * \return  void 
+ */
+static void  __inline__ synopGMACWriteReg(u32 *RegBase, u32 RegOffset, u32 RegData)
+{
+
+  void *addr = (void *)RegBase + RegOffset;
+//  TR("%s RegBase = 0x%08x RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__,(u32) RegBase, RegOffset, RegData );
+  writel(RegData,addr);
+  return;
+}
+
+/**
+ * The Low level function to set bits of a register in Hardware.
+ * 
+ * @param[in] pointer to the base of register map  
+ * @param[in] Offset from the base
+ * @param[in] Bit mask to set bits to logical 1 
+ * \return  void 
+ */
+static void __inline__ synopGMACSetBits(u32 *RegBase, u32 RegOffset, u32 BitPos)
+{
+  void * addr = (void *)RegBase + RegOffset;
+  u32 data = readl((void *)addr);
+  data |= BitPos; 
+//  TR("%s !!!!!!!!!!!!! RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__, RegOffset, data );
+  writel(data,(void *)addr);
+//  TR("%s !!!!!!!!!!!!! RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__, RegOffset, data );
+  return;
+}
+
+
+/**
+ * The Low level function to clear bits of a register in Hardware.
+ * 
+ * @param[in] pointer to the base of register map  
+ * @param[in] Offset from the base
+ * @param[in] Bit mask to clear bits to logical 0 
+ * \return  void 
+ */
+static void __inline__ synopGMACClearBits(u32 *RegBase, u32 RegOffset, u32 BitPos)
+{
+  void *addr = (void *)RegBase + RegOffset;
+  u32 data = readl((void *)addr);
+  data &= (~BitPos); 
+//  TR("%s !!!!!!!!!!!!!! RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__, RegOffset, data );
+  writel(data,(void *)addr);
+//  TR("%s !!!!!!!!!!!!! RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__, RegOffset, data );
+  return;
+}
+
+/**
+ * The Low level function to Check the setting of the bits.
+ * 
+ * @param[in] pointer to the base of register map  
+ * @param[in] Offset from the base
+ * @param[in] Bit mask to set bits to logical 1 
+ * \return  returns TRUE if set to '1' returns FALSE if set to '0'. Result undefined there are no bit set in the BitPos argument.
+ * 
+ */
+static bool __inline__ synopGMACCheckBits(u32 *RegBase, u32 RegOffset, u32 BitPos)
+{
+  void *addr = (void *)RegBase + RegOffset;
+  u32 data = readl((void *)addr);
+  data &= BitPos; 
+  if(data)  return true;
+  else	    return false;
+
+}
+
+
+#endif
diff -uNra linux-3.0.82/drivers/net/loongson/Kconfig linux-3.0.82x/drivers/net/loongson/Kconfig
--- linux-3.0.82/drivers/net/loongson/Kconfig	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/loongson/Kconfig	2017-09-23 03:42:49.682676090 +0800
@@ -0,0 +1,14 @@
+config LOONGSON_GMAC
+	tristate "Loongson GMAC support"
+	default y
+
+config GMAC_COHERENT
+	bool "loongson gmac coherent"
+	default n
+	depends on LOONGSON_GMAC && !CPU_LS232
+
+config FIX_COHERENT_UNALIGNED
+        bool "fix coherent unaligned"
+        depends on GMAC_COHERENT
+        default y
+
diff -uNra linux-3.0.82/drivers/net/loongson/.Kconfig.swp linux-3.0.82x/drivers/net/loongson/.Kconfig.swp
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diff -uNra linux-3.0.82/drivers/net/loongson/Makefile linux-3.0.82x/drivers/net/loongson/Makefile
--- linux-3.0.82/drivers/net/loongson/Makefile	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/loongson/Makefile	2017-09-23 03:42:49.686676079 +0800
@@ -0,0 +1 @@
+obj-$(CONFIG_LOONGSON_GMAC) += gmac/
diff -uNra linux-3.0.82/drivers/net/loongson/.Makefile.swp linux-3.0.82x/drivers/net/loongson/.Makefile.swp
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/drivers/net/Makefile linux-3.0.82x/drivers/net/Makefile
--- linux-3.0.82/drivers/net/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/Makefile	2017-09-23 03:42:49.686676079 +0800
@@ -6,6 +6,7 @@
 obj-$(CONFIG_MDIO) += mdio.o
 obj-$(CONFIG_PHYLIB) += phy/
 
+obj-$(CONFIG_CPU_LS232) += loongson/
 obj-$(CONFIG_TI_DAVINCI_EMAC) += davinci_emac.o
 obj-$(CONFIG_TI_DAVINCI_MDIO) += davinci_mdio.o
 obj-$(CONFIG_TI_DAVINCI_CPDMA) += davinci_cpdma.o
diff -uNra linux-3.0.82/drivers/net/phy/phy_device.c linux-3.0.82x/drivers/net/phy/phy_device.c
--- linux-3.0.82/drivers/net/phy/phy_device.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/phy/phy_device.c	2017-09-23 03:42:49.686676079 +0800
@@ -732,7 +732,11 @@
 		return status;
 
 	if ((status & BMSR_LSTATUS) == 0)
+#ifdef CONFIG_RTL8305SC
+		phydev->link = 1;
+#else
 		phydev->link = 0;
+#endif
 	else
 		phydev->link = 1;
 
@@ -789,10 +793,15 @@
 			return adv;
 
 		lpa &= adv;
-
+#ifdef CONFIG_RTL8305SC	
+		phydev->speed = SPEED_100;
+		phydev->duplex = DUPLEX_FULL;
+		phydev->pause = phydev->asym_pause = 0;
+#else
 		phydev->speed = SPEED_10;
 		phydev->duplex = DUPLEX_HALF;
 		phydev->pause = phydev->asym_pause = 0;
+#endif
 
 		if (lpagb & (LPA_1000FULL | LPA_1000HALF)) {
 			phydev->speed = SPEED_1000;
diff -uNra linux-3.0.82/drivers/net/stmmac/dwmac_lib.c linux-3.0.82x/drivers/net/stmmac/dwmac_lib.c
--- linux-3.0.82/drivers/net/stmmac/dwmac_lib.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/stmmac/dwmac_lib.c	2017-09-23 03:42:49.686676079 +0800
@@ -23,6 +23,22 @@
 #include <linux/io.h>
 #include "common.h"
 #include "dwmac_dma.h"
+#include <linux/mtd/mtd.h>
+#include <linux/types.h>
+
+struct m25p {
+        struct spi_device       *spi;
+        struct mutex            lock;
+        struct mtd_info         mtd;
+        unsigned                partitioned:1;
+        u16                     page_size;
+        u16                     addr_width;
+        u8                      erase_opcode;
+        u8                      *command;
+};
+
+extern struct m25p *flash_tmp;
+extern unsigned char *hwaddr;
 
 #undef DWMAC_DMA_DEBUG
 #ifdef DWMAC_DMA_DEBUG
@@ -231,16 +247,55 @@
 			 unsigned int high, unsigned int low)
 {
 	unsigned long data;
-
+	
 	data = (addr[5] << 8) | addr[4];
 	writel(data, ioaddr + high);
 	data = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0];
 	writel(data, ioaddr + low);
+
+#ifdef CONFIG_MTD_M25P80
+{
+	struct erase_info instr;
+	size_t retlen;
+	int ret;
+	u8 buf[512];
+	u8 *tmp;
+
+	flash_tmp->mtd.read(&flash_tmp->mtd, 0x70000, 512, &retlen, buf);
+	tmp = buf + 512 - 6;	
+	*(tmp+0) = addr[0];
+	*(tmp+1) = addr[1];
+ 	*(tmp+2) = addr[2];
+ 	*(tmp+3) = addr[3];
+ 	*(tmp+4) = addr[4];
+ 	*(tmp+5) = addr[5];
+
+	instr.addr = 0x70000;
+	instr.len = 0x10000;
+	instr.callback = NULL;
+	instr.mtd = &flash_tmp->mtd;
+	ret = flash_tmp->mtd.erase(&flash_tmp->mtd, &instr);
+	if(ret < 0)
+		DWMAC_LIB_DBG("m25p80_erase is failed.\n");
+
+	ret = flash_tmp->mtd.write(&flash_tmp->mtd, 0x70000, 512, &retlen, buf);
+	if(ret < 0)
+		DWMAC_LIB_DBG("m25p80_write_by_mac is failed.\n");
+}
+#endif
 }
 
 void stmmac_get_mac_addr(void __iomem *ioaddr, unsigned char *addr,
 			 unsigned int high, unsigned int low)
 {
+#ifdef CONFIG_MTD_M25P80
+	addr[0] = hwaddr[0];
+	addr[1] = hwaddr[1];
+	addr[2] = hwaddr[2];
+	addr[3] = hwaddr[3];
+	addr[4] = hwaddr[4];
+	addr[5] = hwaddr[5];
+#else
 	unsigned int hi_addr, lo_addr;
 
 	/* Read the MAC address from the hardware */
@@ -254,5 +309,5 @@
 	addr[3] = (lo_addr >> 24) & 0xff;
 	addr[4] = hi_addr & 0xff;
 	addr[5] = (hi_addr >> 8) & 0xff;
+#endif
 }
-
diff -uNra linux-3.0.82/drivers/net/stmmac/Kconfig linux-3.0.82x/drivers/net/stmmac/Kconfig
--- linux-3.0.82/drivers/net/stmmac/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/stmmac/Kconfig	2017-09-23 03:42:49.686676079 +0800
@@ -11,6 +11,49 @@
 
 if STMMAC_ETH
 
+config LS1X_GMAC0
+	bool "Loongson1 GMAC0 support"
+	default y
+	depends on LS1A_MACH || LS1B_MACH || LS1C_MACH
+
+choice
+		prompt "ls1x gmac0 config"
+		depends on LS1X_GMAC0
+
+config LS1X_GMAC0_100M
+		bool "100Mb MII mode"
+
+config LS1X_GMAC0_1000M
+		bool "1000Mb MII mode"
+
+config LS1X_GMAC0_RMII
+		bool "100Mb RMII mode"
+		depends on LS1C_MACH
+endchoice
+
+config LS1X_GMAC1
+	bool "Loongson1 GMAC1 support"
+	default n
+	depends on LS1A_MACH || LS1B_MACH
+
+choice
+		prompt "ls1x gmac1 config"
+		depends on LS1X_GMAC1
+
+config LS1X_GMAC1_100M
+		bool "100Mb MII mode"
+
+config LS1X_GMAC1_1000M
+		bool "1000Mb MII mode"
+endchoice
+
+config RTL8305SC
+	bool "STMMAC support RTL8305SC"
+	default n
+	help
+	  Selecting this option, stmmac will support switch controller
+	  rtl8305sc.
+
 config STMMAC_DA
 	bool "STMMAC DMA arbitration scheme"
 	default n
diff -uNra linux-3.0.82/drivers/net/stmmac/stmmac_main.c linux-3.0.82x/drivers/net/stmmac/stmmac_main.c
--- linux-3.0.82/drivers/net/stmmac/stmmac_main.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/stmmac/stmmac_main.c	2017-09-23 03:42:49.690676066 +0800
@@ -112,6 +112,11 @@
 module_param(pause, int, S_IRUGO | S_IWUSR);
 MODULE_PARM_DESC(pause, "Flow Control Pause Time");
 
+static unsigned char hwaddr_buf[6];
+char *hwaddr = hwaddr_buf;
+module_param(hwaddr, charp, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(hwaddr, "gmac hardware address.");
+
 #define TC_DEFAULT 64
 static int tc = TC_DEFAULT;
 module_param(tc, int, S_IRUGO | S_IWUSR);
@@ -1358,7 +1363,8 @@
 {
 	struct net_device *dev = (struct net_device *)dev_id;
 	struct stmmac_priv *priv = netdev_priv(dev);
-
+	printk("stmmac_interrupt\n");
+//	dump_stack();
 	if (unlikely(!dev)) {
 		pr_err("%s: invalid dev pointer\n", __func__);
 		return IRQ_NONE;
@@ -1946,6 +1952,8 @@
 				       (unsigned long *)&flow_ctrl);
 		else if (!strncmp(opt, "pause:", 6))
 			strict_strtoul(opt + 6, 0, (unsigned long *)&pause);
+		else if (!strncmp(opt, "hw_addr:", 8))
+			strict_strtoul(opt + 8, 0, (unsigned long *)&hwaddr);
 #ifdef CONFIG_STMMAC_TIMER
 		else if (!strncmp(opt, "tmrate:", 7))
 			strict_strtoul(opt + 7, 0, (unsigned long *)&tmrate);
diff -uNra linux-3.0.82/drivers/net/wireless/Kconfig linux-3.0.82x/drivers/net/wireless/Kconfig
--- linux-3.0.82/drivers/net/wireless/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/Kconfig	2017-09-23 03:42:49.690676066 +0800
@@ -217,8 +217,8 @@
 
 	  If you choose to build a module, it'll be called rndis_wlan.
 
-source "drivers/net/wireless/rtl818x/Kconfig"
-
+#source "drivers/net/wireless/rtl818x/Kconfig"  #lv
+source "drivers/net/wireless/rtl8188/Kconfig"   #lv
 config ADM8211
 	tristate "ADMtek ADM8211 support"
 	depends on MAC80211 && PCI && EXPERIMENTAL
@@ -268,6 +268,13 @@
 	  To compile this driver as a module, choose M here: the module
 	  will be called mwl8k.  If unsure, say N.
 
+#config lxy_rt3070_test
+#	tristate "lxy rt3070 Wireless module support"
+#	depends on MAC80211
+#	select CRC_CCITT
+#	select WIRELESS_EXT
+#	select WEXT_PRIV
+
 source "drivers/net/wireless/ath/Kconfig"
 source "drivers/net/wireless/b43/Kconfig"
 source "drivers/net/wireless/b43legacy/Kconfig"
@@ -280,10 +287,13 @@
 source "drivers/net/wireless/orinoco/Kconfig"
 source "drivers/net/wireless/p54/Kconfig"
 source "drivers/net/wireless/rt2x00/Kconfig"
-source "drivers/net/wireless/rtlwifi/Kconfig"
+source "drivers/net/wireless/rt3070_ls1b/Kconfig"		#lxy
+#source "drivers/net/wireless/rtlwifi/Kconfig"       #lv
+#source  "drivers/net/wireless/rt3070/Kconfig"    #lv
 source "drivers/net/wireless/wl1251/Kconfig"
 source "drivers/net/wireless/wl12xx/Kconfig"
 source "drivers/net/wireless/zd1211rw/Kconfig"
 source "drivers/net/wireless/mwifiex/Kconfig"
+source "drivers/net/wireless/wm8782/Kconfig"	#lxy
 
 endif # WLAN
diff -uNra linux-3.0.82/drivers/net/wireless/Makefile linux-3.0.82x/drivers/net/wireless/Makefile
--- linux-3.0.82/drivers/net/wireless/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/Makefile	2017-09-23 03:42:49.690676066 +0800
@@ -5,6 +5,10 @@
 obj-$(CONFIG_IPW2100) += ipw2x00/
 obj-$(CONFIG_IPW2200) += ipw2x00/
 
+obj-$(CONFIG_RTL8192CU) += rtl8188/
+
+obj-$(CONFIG_RT3070_LS1B) += rt3070_ls1b/
+
 obj-$(CONFIG_HERMES)		+= orinoco/
 
 obj-$(CONFIG_AIRO)		+= airo.o
@@ -58,3 +62,4 @@
 obj-$(CONFIG_IWM)	+= iwmc3200wifi/
 
 obj-$(CONFIG_MWIFIEX)	+= mwifiex/
+obj-$(CONFIG_WM8782_LS1X)	+= wm8782/
diff -uNra linux-3.0.82/drivers/net/wireless/rt2x00/Kconfig linux-3.0.82x/drivers/net/wireless/rt2x00/Kconfig
--- linux-3.0.82/drivers/net/wireless/rt2x00/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt2x00/Kconfig	2017-09-23 03:42:49.690676066 +0800
@@ -135,6 +135,8 @@
 	select RT2X00_LIB_FIRMWARE
 	select RT2X00_LIB_CRYPTO
 	select CRC_CCITT
+	select WIRELESS_EXT
+	select WEXT_PRIV
 	---help---
 	  This adds support for rt27xx/rt28xx/rt30xx wireless chipset family.
 	  Supported chips: RT2770, RT2870 & RT3070, RT3071 & RT3072
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/chips/rt28xx.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/chips/rt28xx.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/chips/rt28xx.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/chips/rt28xx.c	2017-09-23 03:42:49.690676066 +0800
@@ -0,0 +1,305 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifdef RT28xx
+
+#include "rt_config.h"
+
+VOID RT28xx_ChipSwitchChannel(
+	IN PRTMP_ADAPTER 			pAd,
+	IN UCHAR					Channel,
+	IN BOOLEAN					bScan) 
+{
+	CHAR    TxPwer = 0, TxPwer2 = DEFAULT_RF_TX_POWER; /*Bbp94 = BBPR94_DEFAULT, TxPwer2 = DEFAULT_RF_TX_POWER;*/
+	UCHAR	index;
+	UINT32 	Value = 0; /*BbpReg, Value;*/
+	UCHAR 	RFValue;
+	UINT32 i = 0;
+	ULONG	R2 = 0, R3 = DEFAULT_RF_TX_POWER, R4 = 0;
+	RTMP_RF_REGS *RFRegTable;
+
+	i = i; /* avoid compile warning */
+	RFValue = 0;
+
+	/* Search Tx power value*/
+	/*
+		We can't use ChannelList to search channel, since some central channl's txpowr doesn't list 
+		in ChannelList, so use TxPower array instead.
+	*/
+	for (index = 0; index < MAX_NUM_OF_CHANNELS; index++)
+	{
+		if (Channel == pAd->TxPower[index].Channel)
+		{
+			TxPwer = pAd->TxPower[index].Power;
+			TxPwer2 = pAd->TxPower[index].Power2;
+			break;
+		}
+	}
+
+
+	if (index == MAX_NUM_OF_CHANNELS)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("AsicSwitchChannel: Can't find the Channel#%d \n", Channel));
+	}
+
+	RFRegTable = RF2850RegTable;
+
+	switch (pAd->RfIcType)
+	{
+		case RFIC_2820:
+		case RFIC_2850:
+		case RFIC_2720:
+		case RFIC_2750:
+			for (index = 0; index < NUM_OF_2850_CHNL; index++)
+			{
+				if (Channel == RFRegTable[index].Channel)
+				{
+					R2 = RFRegTable[index].R2;
+					if (pAd->Antenna.field.TxPath == 1)
+					{
+						R2 |= 0x4000;	/*If TXpath is 1, bit 14 = 1;*/
+					}
+
+					if ((pAd->Antenna.field.RxPath == 2)
+						)
+					{
+						R2 |= 0x40;	/*write 1 to off Rxpath.*/
+					}
+					else if ((pAd->Antenna.field.RxPath == 1)
+							)
+					{
+						R2 |= 0x20040;	/*write 1 to off RxPath*/
+					}
+
+					if (Channel > 14)
+					{
+						/* initialize R3, R4*/
+						R3 = (RFRegTable[index].R3 & 0xffffc1ff);
+						R4 = (RFRegTable[index].R4 & (~0x001f87c0)) | (pAd->RfFreqOffset << 15);
+
+						/* 5G band power range: 0xF9~0X0F, TX0 Reg3 bit9/TX1 Reg4 bit6="0" means the TX power reduce 7dB*/
+						/*R3*/
+						if ((TxPwer >= -7) && (TxPwer < 0))
+						{
+							TxPwer = (7+TxPwer);
+
+							/* TxPwer is not possible larger than 15 */
+
+							R3 |= (TxPwer << 10);
+							DBGPRINT(RT_DEBUG_TRACE, ("AsicSwitchChannel: TxPwer=%d \n", TxPwer));
+						}
+						else
+						{
+							TxPwer = (TxPwer > 0xF) ? (0xF) : (TxPwer);
+							R3 |= (TxPwer << 10) | (1 << 9);
+						}
+
+						/* R4*/
+						if ((TxPwer2 >= -7) && (TxPwer2 < 0))
+						{
+							TxPwer2 = (7+TxPwer2);
+							
+							R4 |= (TxPwer2 << 7);
+							DBGPRINT(RT_DEBUG_TRACE, ("AsicSwitchChannel: TxPwer2=%d \n", TxPwer2));
+						}
+						else
+						{
+							TxPwer2 = (TxPwer2 > 0xF) ? (0xF) : (TxPwer2);
+							R4 |= (TxPwer2 << 7) | (1 << 6);
+						}                        
+					}
+					else
+					{
+						R3 = (RFRegTable[index].R3 & 0xffffc1ff) | (TxPwer << 9); /* set TX power0*/
+						R4 = (RFRegTable[index].R4 & (~0x001f87c0)) | (pAd->RfFreqOffset << 15) | (TxPwer2 <<6);/* Set freq Offset & TxPwr1*/
+					}
+
+					/* Based on BBP current mode before changing RF channel.*/
+					if (!bScan && (pAd->CommonCfg.BBPCurrentBW == BW_40)
+						)
+					{
+						R4 |=0x200000;
+					}
+
+					/* Update variables*/
+					pAd->LatchRfRegs.Channel = Channel;
+					pAd->LatchRfRegs.R1 = RFRegTable[index].R1;
+					pAd->LatchRfRegs.R2 = R2;
+					pAd->LatchRfRegs.R3 = R3;
+					pAd->LatchRfRegs.R4 = R4;
+
+					/* Set RF value 1's set R3[bit2] = [0]*/
+					RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R1);
+					RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R2);
+					RTMP_RF_IO_WRITE32(pAd, (pAd->LatchRfRegs.R3 & (~0x04)));
+					RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R4);
+
+					RTMPusecDelay(200);
+
+					/* Set RF value 2's set R3[bit2] = [1]*/
+					RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R1);
+					RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R2);
+					RTMP_RF_IO_WRITE32(pAd, (pAd->LatchRfRegs.R3 | 0x04));
+					RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R4);
+
+					RTMPusecDelay(200);
+
+					/* Set RF value 3's set R3[bit2] = [0]*/
+					RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R1);
+					RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R2);
+					RTMP_RF_IO_WRITE32(pAd, (pAd->LatchRfRegs.R3 & (~0x04)));
+					RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R4);
+
+					break;
+				}
+			}
+
+			DBGPRINT(RT_DEBUG_TRACE, ("SwitchChannel#%d(RF=%d, Pwr0=%lu, Pwr1=%lu, %dT) to , R1=0x%08x, R2=0x%08x, R3=0x%08x, R4=0x%08x\n",
+										Channel, 
+										pAd->RfIcType, 
+										(R3 & 0x00003e00) >> 9,
+										(R4 & 0x000007c0) >> 6,
+										pAd->Antenna.field.TxPath,
+										pAd->LatchRfRegs.R1, 
+										pAd->LatchRfRegs.R2, 
+										pAd->LatchRfRegs.R3, 
+										pAd->LatchRfRegs.R4));
+			break;
+
+		default:
+			DBGPRINT(RT_DEBUG_TRACE, ("SwitchChannel#%d : unknown RFIC=%d\n", Channel, pAd->RfIcType));
+			break;
+	}	
+
+	/* Change BBP setting during siwtch from a->g, g->a*/
+	if (Channel <= 14)
+	{
+		ULONG	TxPinCfg = 0x00050F0A;/*Gary 2007/08/09 0x050A0A*/
+
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0);/*(0x44 - GET_LNA_GAIN(pAd)));	According the Rory's suggestion to solve the middle range issue.*/
+
+		/* Rx High power VGA offset for LNA select*/
+		{
+			if (pAd->NicConfig2.field.ExternalLNAForG)
+			{
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0x62);
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x46);
+			}
+			else
+			{
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0x84);
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x50);
+			}
+		}
+
+		/* 5G band selection PIN, bit1 and bit2 are complement*/
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
+		Value &= (~0x6);
+		Value |= (0x04);
+		RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
+
+		/* Turn off unused PA or LNA when only 1T or 1R*/
+		if (pAd->Antenna.field.TxPath == 1)
+		{
+			TxPinCfg &= 0xFFFFFFF3;
+		}
+		if (pAd->Antenna.field.RxPath == 1)
+		{
+			TxPinCfg &= 0xFFFFF3FF;
+		}
+
+		RTMP_IO_WRITE32(pAd, TX_PIN_CFG, TxPinCfg);
+	}
+	else
+	{
+		ULONG	TxPinCfg = 0x00050F05;/*Gary 2007/8/9 0x050505*/
+		UINT8	bbpValue;
+
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0);/*(0x44 - GET_LNA_GAIN(pAd)));   According the Rory's suggestion to solve the middle range issue.  */   
+
+		/* Set the BBP_R82 value here */
+		bbpValue = 0xF2;
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, bbpValue);
+
+
+		/* Rx High power VGA offset for LNA select*/
+		if (pAd->NicConfig2.field.ExternalLNAForA)
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x46);
+		}
+		else
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x50);
+		}
+
+		/* 5G band selection PIN, bit1 and bit2 are complement*/
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
+		Value &= (~0x6);
+		Value |= (0x02);
+		RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
+
+		/* Turn off unused PA or LNA when only 1T or 1R*/
+		{
+			/* Turn off unused PA or LNA when only 1T or 1R*/
+			if (pAd->Antenna.field.TxPath == 1)
+			{
+				TxPinCfg &= 0xFFFFFFF3;
+			}
+			if (pAd->Antenna.field.RxPath == 1)
+			{
+				TxPinCfg &= 0xFFFFF3FF;
+			}
+		}
+
+		RTMP_IO_WRITE32(pAd, TX_PIN_CFG, TxPinCfg);
+	}
+
+	/* R66 should be set according to Channel and use 20MHz when scanning*/
+
+	if (bScan)
+		RTMPSetAGCInitValue(pAd, BW_20);
+	else
+		RTMPSetAGCInitValue(pAd, pAd->CommonCfg.BBPCurrentBW);
+
+	/*
+
+		On 11A, We should delay and wait RF/BBP to be stable
+		and the appropriate time should be 1000 micro seconds 
+		005/06/05 - On 11G, We also need this delay time. Otherwise it's difficult to pass the WHQL.
+
+	*/
+	RTMPusecDelay(1000);  
+}
+
+#endif /*RT28xx */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/chips/rt3070.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/chips/rt3070.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/chips/rt3070.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/chips/rt3070.c	2017-09-23 03:42:49.690676066 +0800
@@ -0,0 +1,184 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifdef RT3070
+
+#include "rt_config.h"
+
+
+#ifndef RTMP_RF_RW_SUPPORT
+#error "You Should Enable compile flag RTMP_RF_RW_SUPPORT for this chip"
+#endif /* RTMP_RF_RW_SUPPORT */
+
+
+VOID NICInitRT3070RFRegisters(IN PRTMP_ADAPTER pAd)
+{
+	INT i;
+	UCHAR RFValue;
+	
+	/* 
+	   Driver must read EEPROM to get RfIcType before initial RF registers 
+	   Initialize RF register to default value 
+	*/
+	if (IS_RT3070(pAd) || IS_RT3071(pAd))
+	{
+		/* 
+		   Init RF calibration
+		   Driver should toggle RF R30 bit7 before init RF registers
+		*/
+		UINT8 RfReg = 0;          
+		UINT32 data;
+
+        RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RfReg);
+        RfReg |= 0x80;
+        RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
+        RTMPusecDelay(1000);
+        RfReg &= 0x7F;
+        RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);        
+
+		/* set default antenna as main */
+		if (pAd->RfIcType == RFIC_3020 || pAd->RfIcType == RFIC_2020)
+			AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);	
+
+        /* Initialize RF register to default value */
+		for (i = 0; i < NUM_RF_3020_REG_PARMS; i++)
+        {
+            RT30xxWriteRFRegister(pAd, RT3020_RFRegTable[i].Register, RT3020_RFRegTable[i].Value);
+        }
+ 
+		RT30xxWriteRFRegister(pAd, RF_R31, 0x14);
+
+		/* add by johnli */
+		if (IS_RT3070(pAd))
+		{
+			/*
+			   The DAC issue(LDO_CFG0) has been fixed in RT3070(F). 
+			   The voltage raising patch is no longer needed for RT3070(F)	
+			*/
+			if ((pAd->MACVersion & 0xffff) < 0x0201)
+			{
+				/* Update MAC 0x05D4 from 01xxxxxx to 0Dxxxxxx (voltage 1.2V to 1.35V) for RT3070 to improve yield rate */
+				RTUSBReadMACRegister(pAd, LDO_CFG0, &data);
+				data = ((data & 0xF0FFFFFF) | 0x0D000000);
+				RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
+			}
+		}
+		else if (IS_RT3071(pAd))
+		{
+			/* Driver should set RF R6 bit6 on before init RF registers */
+			RT30xxReadRFRegister(pAd, RF_R06, (PUCHAR)&RfReg);
+			RfReg |= 0x40;
+			RT30xxWriteRFRegister(pAd, RF_R06, (UCHAR)RfReg);
+
+			/* RT3071 version E has fixed this issue */
+			if ((pAd->NicConfig2.field.DACTestBit == 1) && ((pAd->MACVersion & 0xffff) < 0x0211))
+			{
+				/* patch tx EVM issue temporarily */
+				RTUSBReadMACRegister(pAd, LDO_CFG0, &data);
+				data = ((data & 0xE0FFFFFF) | 0x0D000000);
+				RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
+			}
+			else
+			{
+				RTMP_IO_READ32(pAd, LDO_CFG0, &data);
+				data = ((data & 0xE0FFFFFF) | 0x01000000);
+				RTMP_IO_WRITE32(pAd, LDO_CFG0, data);
+			}
+
+			/* patch LNA_PE_G1 failed issue */
+			RTUSBReadMACRegister(pAd, GPIO_SWITCH, &data);
+			data &= ~(0x20);
+			RTUSBWriteMACRegister(pAd, GPIO_SWITCH, data);
+		}
+		
+        /* For RF filter Calibration */
+		RTMPFilterCalibration(pAd);
+
+		/* 
+		   Initialize RF R27 register, set RF R27 must be behind RTMPFilterCalibration()
+		   TX to RX IQ glitch(RF_R27) has been fixed in RT3070(F). 
+		   Raising RF voltage is no longer needed for RT3070(F)
+		*/	
+		if ((IS_RT3070(pAd)) && ((pAd->MACVersion & 0xffff) < 0x0201))
+		{
+			RT30xxWriteRFRegister(pAd, RF_R27, 0x3);
+		}
+		else if ((IS_RT3071(pAd)) && ((pAd->MACVersion & 0xffff) < 0x0211))
+		{
+			RT30xxWriteRFRegister(pAd, RF_R27, 0x3);
+		}
+
+		/* set led open drain enable */
+		RTUSBReadMACRegister(pAd, OPT_14, &data);
+		data |= 0x01;
+		RTUSBWriteMACRegister(pAd, OPT_14, data);
+
+		if (IS_RT3071(pAd))
+		{
+			/* RF power sequence setup, load RF normal operation-mode setup */
+			RT30xxLoadRFNormalModeSetup(pAd);
+		}
+		else if (IS_RT3070(pAd))
+		{	
+		/* TX_LO1_en, RF R17 register Bit 3 to 0 */
+		RT30xxReadRFRegister(pAd, RF_R17, &RFValue);
+		RFValue &= (~0x08);
+		/* to fix rx long range issue */
+		if (pAd->NicConfig2.field.ExternalLNAForG == 0)
+		{
+			if ((IS_RT3071(pAd) && ((pAd->MACVersion & 0xffff) >= 0x0211)) || IS_RT3070(pAd))
+			{
+				RFValue |= 0x20;
+			}
+		}
+		/* set RF_R17_bit[2:0] equal to EEPROM setting at 0x48h */
+		if (pAd->TxMixerGain24G >= 1)
+		{
+			RFValue &= (~0x7);  /* clean bit [2:0] */
+			RFValue |= pAd->TxMixerGain24G;
+		}
+		RT30xxWriteRFRegister(pAd, RF_R17, RFValue);
+		
+			/* add by johnli, reset RF_R27 when interface down & up to fix throughput problem */
+			/* LDORF_VC, RF R27 register Bit 2 to 0 */
+			RT30xxReadRFRegister(pAd, RF_R27, &RFValue);
+			/* 
+			   TX to RX IQ glitch(RF_R27) has been fixed in RT3070(F). 
+			   Raising RF voltage is no longer needed for RT3070(F)
+			*/
+			if ((pAd->MACVersion & 0xffff) < 0x0201)
+				RFValue = (RFValue & (~0x77)) | 0x3;
+			else
+				RFValue = (RFValue & (~0x77));
+			RT30xxWriteRFRegister(pAd, RF_R27, RFValue);
+			/* end johnli */
+		}
+        }	
+
+}
+#endif /* RT3070 */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/chips/rt30xx.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/chips/rt30xx.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/chips/rt30xx.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/chips/rt30xx.c	2017-09-23 03:42:49.694676054 +0800
@@ -0,0 +1,1052 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifdef RT30xx
+
+#ifndef RTMP_RF_RW_SUPPORT
+#error "You Should Enable compile flag RTMP_RF_RW_SUPPORT for this chip"
+#endif /* RTMP_RF_RW_SUPPORT */
+
+#include "rt_config.h"
+
+/*
+  RF register initialization set
+*/
+REG_PAIR   RT3020_RFRegTable[] = {
+        {RF_R04,          0x40},
+        {RF_R05,          0x03},
+        {RF_R06,          0x02},
+        {RF_R07,          0x60},      
+        {RF_R09,          0x0F},
+        {RF_R10,          0x41},
+        {RF_R11,          0x21},
+        {RF_R12,          0x7B},
+        {RF_R14,          0x90},
+        {RF_R15,          0x58},
+        {RF_R16,          0xB3},
+        {RF_R17,          0x92},
+        {RF_R18,          0x2C},
+        {RF_R19,          0x02},
+        {RF_R20,          0xBA},
+        {RF_R21,          0xDB},
+        {RF_R24,          0x16},      
+        {RF_R25,          0x03},
+        {RF_R29,          0x1F},
+};
+
+UCHAR NUM_RF_3020_REG_PARMS = (sizeof(RT3020_RFRegTable) / sizeof(REG_PAIR));
+
+
+
+
+/*
+========================================================================
+Routine Description:
+	Initialize RT35xx.
+
+Arguments:
+	pAd					- WLAN control block pointer
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RT30xx_Init(
+	IN PRTMP_ADAPTER		pAd)
+{
+	RTMP_CHIP_OP *pChipOps = &pAd->chipOps;
+	RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
+
+
+	/* init capability */
+	/* 
+		WARNING: 
+			Currently following table are shared by all RT30xx based IC, change it carefully when you add a new IC here.
+	*/
+	pChipCap->pRFRegTable = RT3020_RFRegTable;
+	pChipCap->MaxNumOfBbpId = 185;
+ 
+
+	/* init operator */
+	if((IS_RT3070(pAd) || IS_RT3071(pAd)) || IS_RT3090(pAd))
+	{
+#ifdef RT3070
+		if (pAd->infType == RTMP_DEV_INF_USB)
+		{
+			pChipOps->AsicRfInit = NICInitRT3070RFRegisters;
+		}
+#endif /* RT3070 */
+
+		pChipOps->AsicHaltAction = RT30xxHaltAction;
+		pChipOps->AsicRfTurnOff = RT30xxLoadRFSleepModeSetup;
+		pChipOps->AsicReverseRfFromSleepMode = RT30xxReverseRFSleepModeSetup;
+		pChipOps->ChipSwitchChannel = RT30xx_ChipSwitchChannel;
+		pChipOps->ChipBBPAdjust = RT30xx_ChipBBPAdjust;
+		pChipOps->RTMPSetAGCInitValue = RT30xx_RTMPSetAGCInitValue;
+
+		/* 1T1R only */
+		if (!IS_RT3071(pAd))
+		{
+			pChipOps->SetRxAnt = RT30xxSetRxAnt; 
+			pAd->Mlme.bEnableAutoAntennaCheck = FALSE;
+		}
+
+		pChipOps->ChipResumeMsduTransmission = NULL;
+		pChipOps->VdrTuning1 = NULL;
+		pChipOps->RxSensitivityTuning = NULL;
+#ifdef RTMP_FREQ_CALIBRATION_SUPPORT
+		pChipOps->AsicFreqCalInit = NULL;
+		pChipOps->AsicFreqCalStop = NULL;
+		pChipOps->AsicFreqCal = NULL;
+		pChipOps->AsicFreqOffsetGet = NULL;
+#endif /* RTMP_FREQ_CALIBRATION_SUPPORT */
+
+	}
+}
+
+
+/*
+ Antenna divesity use GPIO3 and EESK pin for control
+ Antenna and EEPROM access are both using EESK pin,
+ Therefor we should avoid accessing EESK at the same time
+ Then restore antenna after EEPROM access
+ The original name of this function is AsicSetRxAnt(), now change to 
+*/
+VOID RT30xxSetRxAnt(
+	IN PRTMP_ADAPTER	pAd,
+	IN UCHAR			Ant)
+{
+	UINT32	Value;
+
+	if (/*(!pAd->NicConfig2.field.AntDiversity) ||*/
+		(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS))	||
+		(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS))	||
+		(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF)) ||
+		(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)))
+	{
+		return;
+	}
+
+	/* the antenna selection is through firmware and MAC register(GPIO3) */
+	if (IS_RT2070(pAd) || (IS_RT3070(pAd) && pAd->RfIcType == RFIC_3020) ||
+			(IS_RT3090(pAd) && pAd->RfIcType == RFIC_3020))
+	{
+		if (Ant == 0)
+		{
+			/*
+				Main antenna
+				E2PROM_CSR only in PCI bus Reg., USB Bus need MCU commad to control the EESK pin.
+			*/
+#ifdef RTMP_MAC_USB
+			AsicSendCommandToMcu(pAd, 0x73, 0xFF, 0x1, 0x0);
+#endif /* RTMP_MAC_USB */
+
+			RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &Value);
+			Value &= ~(0x0808);
+			RTMP_IO_WRITE32(pAd, GPIO_CTRL_CFG, Value);
+			DBGPRINT(RT_DEBUG_TRACE, ("AsicSetRxAnt, switch to main antenna\n"));
+		}
+		else
+		{
+			/*
+				Aux antenna
+			 	E2PROM_CSR only in PCI bus Reg., USB Bus need MCU commad to control the EESK pin.
+			*/
+#ifdef RTMP_MAC_USB
+			AsicSendCommandToMcu(pAd, 0x73, 0xFF, 0x0, 0x0);
+#endif /* RTMP_MAC_USB */
+			RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &Value);
+			Value &= ~(0x0808);
+			Value |= 0x08;
+			RTMP_IO_WRITE32(pAd, GPIO_CTRL_CFG, Value);
+			DBGPRINT(RT_DEBUG_TRACE, ("AsicSetRxAnt, switch to aux antenna\n"));
+		}
+	}
+}
+
+
+/*
+	========================================================================
+
+	Routine Description:
+		For RF filter calibration purpose
+
+	Arguments:
+		pAd                          Pointer to our adapter
+
+	Return Value:
+		None
+
+	IRQL = PASSIVE_LEVEL
+
+	========================================================================
+*/
+VOID RTMPFilterCalibration(
+	IN PRTMP_ADAPTER pAd)
+{
+	UCHAR	R55x = 0, value, FilterTarget = 0x1E, BBPValue=0;
+	UINT	loop = 0, count = 0, loopcnt = 0, ReTry = 0;
+	UCHAR	RF_R24_Value = 0;
+
+	/* Give bbp filter initial value */
+	pAd->Mlme.CaliBW20RfR24 = 0x1F;
+	pAd->Mlme.CaliBW40RfR24 = 0x2F; /* Bit[5] must be 1 for BW 40 */
+
+
+	do 
+	{
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))				
+			return;
+		if (loop == 1)	/*BandWidth = 40 MHz*/
+		{
+			/* Write 0x27 to RF_R24 to program filter*/
+			RT30xxReadRFRegister(pAd, RF_R24, (PUCHAR)(&RF_R24_Value));
+			RF_R24_Value = (RF_R24_Value & 0xC0) | 0x27; /* <bit 5>:tx_h20M<bit 5> and <bit 4:0>:tx_agc_fc<bit 4:0>*/
+			RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
+			if (IS_RT3071(pAd) || IS_RT3572(pAd))
+				FilterTarget = 0x15;
+			else
+				FilterTarget = 0x19;
+
+			/* when calibrate BW40, BBP mask must set to BW40.*/
+			RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
+			BBPValue&= (~0x18);
+			BBPValue|= (0x10);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
+
+			/* set to BW40*/
+			RT30xxReadRFRegister(pAd, RF_R31, &value);
+			value |= 0x20;
+			RT30xxWriteRFRegister(pAd, RF_R31, value);
+		}
+		else	/*BandWidth = 20 MHz*/
+		{
+			/* Write 0x07 to RF_R24 to program filter*/
+			RT30xxReadRFRegister(pAd, RF_R24, (PUCHAR)(&RF_R24_Value));
+			RF_R24_Value = (RF_R24_Value & 0xC0) | 0x07; /* <bit 5>:tx_h20M<bit 5> and <bit 4:0>:tx_agc_fc<bit 4:0>*/
+			RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
+			if (IS_RT3071(pAd) || IS_RT3572(pAd))
+				FilterTarget = 0x13;
+			else
+				FilterTarget = 0x16;
+
+			/*set to BW20*/
+			RT30xxReadRFRegister(pAd, RF_R31, &value);
+			value &= (~0x20);
+			RT30xxWriteRFRegister(pAd, RF_R31, value);
+		}
+
+		/* Write 0x01 to RF_R22 to enable baseband loopback mode*/
+		RT30xxReadRFRegister(pAd, RF_R22, &value);
+		value |= 0x01;
+		RT30xxWriteRFRegister(pAd, RF_R22, value);
+
+		/* Write 0x00 to BBP_R24 to set power & frequency of passband test tone*/
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
+
+		do
+		{
+			if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))				
+				return;
+			/* Write 0x90 to BBP_R25 to transmit test tone*/
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
+
+			RTMPusecDelay(1000);
+			/* Read BBP_R55[6:0] for received power, set R55x = BBP_R55[6:0]*/
+			RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
+			R55x = value & 0xFF;
+
+		} while ((ReTry++ < 100) && (R55x == 0));
+		
+		/* Write 0x06 to BBP_R24 to set power & frequency of stopband test tone*/
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0x06);
+
+		while(TRUE)
+		{
+			if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))				
+				return;
+			
+			/* Write 0x90 to BBP_R25 to transmit test tone*/
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
+
+			/*We need to wait for calibration*/
+			RTMPusecDelay(1000);
+			RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
+			value &= 0xFF;
+			if ((R55x - value) < FilterTarget)
+			{
+				RF_R24_Value ++;
+			}
+			else if ((R55x - value) == FilterTarget)
+			{
+				RF_R24_Value ++;
+				count ++;
+			}
+			else
+			{
+				break;
+			}
+
+			/* prevent infinite loop cause driver hang.*/
+			if (loopcnt++ > 100)
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("RTMPFilterCalibration - can't find a valid value, loopcnt=%d stop calibrating", loopcnt));
+				break;
+			}
+
+			/*Write RF_R24 to program filter*/
+			RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
+		}
+
+		if (count > 0)
+		{
+			RF_R24_Value = RF_R24_Value - ((count) ? (1) : (0));
+		}
+
+		/* Store for future usage*/
+		if (loopcnt < 100)
+		{
+			if (loop++ == 0)
+			{
+				/*BandWidth = 20 MHz*/
+				pAd->Mlme.CaliBW20RfR24 = (UCHAR)RF_R24_Value;
+			}
+			else
+			{
+				/*BandWidth = 40 MHz*/
+				pAd->Mlme.CaliBW40RfR24 = (UCHAR)RF_R24_Value;
+				break;
+			}
+		}
+		else 
+			break;
+
+		RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
+
+		/* reset count*/
+		count = 0;
+	} while(TRUE);
+
+
+	/* Set back to initial state*/
+
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
+
+	RT30xxReadRFRegister(pAd, RF_R22, &value);
+	value &= ~(0x01);
+	RT30xxWriteRFRegister(pAd, RF_R22, value);
+
+	/* set BBP back to BW20*/
+	RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
+	BBPValue&= (~0x18);
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("RTMPFilterCalibration - CaliBW20RfR24=0x%x, CaliBW40RfR24=0x%x\n", pAd->Mlme.CaliBW20RfR24, pAd->Mlme.CaliBW40RfR24));
+}
+
+
+/*
+	add by johnli, RF power sequence setup
+
+	==========================================================================
+	Description:
+
+	Load RF normal operation-mode setup
+	
+	==========================================================================
+ */
+VOID RT30xxLoadRFNormalModeSetup(
+	IN PRTMP_ADAPTER 	pAd)
+{
+	UCHAR RFValue, bbpreg = 0;
+
+	{
+		/* improve power consumption */
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R138, &bbpreg);
+		if (pAd->Antenna.field.TxPath == 1)
+		{
+			/* turn off tx DAC_1*/
+			bbpreg = (bbpreg | 0x20);
+		}
+
+		if (pAd->Antenna.field.RxPath == 1)
+		{
+			/* turn off tx ADC_1*/
+			bbpreg &= (~0x2);
+		}
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R138, bbpreg);
+	}
+
+	/*RX0_PD & TX0_PD, RF R1 register Bit 2 & Bit 3 to 0 and RF_BLOCK_en,RX1_PD & TX1_PD, Bit0, Bit 4 & Bit5 to 1*/
+	RT30xxReadRFRegister(pAd, RF_R01, &RFValue);
+	RFValue = (RFValue & (~0x0C)) | 0x31;
+	RT30xxWriteRFRegister(pAd, RF_R01, RFValue);
+
+	/* TX_LO2_en, RF R15 register Bit 3 to 0*/
+	RT30xxReadRFRegister(pAd, RF_R15, &RFValue);
+	RFValue &= (~0x08);
+	RT30xxWriteRFRegister(pAd, RF_R15, RFValue);
+
+
+	/* TX_LO1_en, RF R17 register Bit 3 to 0*/
+	RT30xxReadRFRegister(pAd, RF_R17, &RFValue);
+	RFValue &= (~0x08);
+	/* to fix rx long range issue*/
+	if (((pAd->MACVersion & 0xffff) >= 0x0211) && (pAd->NicConfig2.field.ExternalLNAForG == 0))
+	{
+		RFValue |= 0x20;
+	}
+	/* set RF_R17_bit[2:0] equal to EEPROM setting at 0x48h*/
+	if (pAd->TxMixerGain24G >= 2)
+	{
+		RFValue &= (~0x7);  /* clean bit [2:0]*/
+		RFValue |= pAd->TxMixerGain24G;
+	}
+	RT30xxWriteRFRegister(pAd, RF_R17, RFValue);
+
+	/* RX_LO1_en, RF R20 register Bit 3 to 0*/
+	RT30xxReadRFRegister(pAd, RF_R20, &RFValue);
+	RFValue &= (~0x08);
+	RT30xxWriteRFRegister(pAd, RF_R20, RFValue);
+
+	/* RX_LO2_en, RF R21 register Bit 3 to 0*/
+	RT30xxReadRFRegister(pAd, RF_R21, &RFValue);
+	RFValue &= (~0x08);
+	RT30xxWriteRFRegister(pAd, RF_R21, RFValue);
+}
+
+/*
+	==========================================================================
+	Description:
+
+	Load RF sleep-mode setup
+	
+	==========================================================================
+ */
+VOID RT30xxLoadRFSleepModeSetup(
+	IN PRTMP_ADAPTER 	pAd)
+{
+	UCHAR RFValue;
+	UINT32 MACValue;
+
+
+	if(!IS_RT3572(pAd))
+	{
+		{
+			/* RF_BLOCK_en. RF R1 register Bit 0 to 0*/
+			RT30xxReadRFRegister(pAd, RF_R01, &RFValue);
+			RFValue &= (~0x01);
+			RT30xxWriteRFRegister(pAd, RF_R01, RFValue);
+
+			/* VCO_IC, RF R7 register Bit 4 & Bit 5 to 0*/
+			RT30xxReadRFRegister(pAd, RF_R07, &RFValue);
+			RFValue &= (~0x30);
+			RT30xxWriteRFRegister(pAd, RF_R07, RFValue);
+
+			/* Idoh, RF R9 register Bit 1, Bit 2 & Bit 3 to 0*/
+			RT30xxReadRFRegister(pAd, RF_R09, &RFValue);
+			RFValue &= (~0x0E);
+			RT30xxWriteRFRegister(pAd, RF_R09, RFValue);
+
+			/* RX_CTB_en, RF R21 register Bit 7 to 0*/
+			RT30xxReadRFRegister(pAd, RF_R21, &RFValue);
+			RFValue &= (~0x80);
+			RT30xxWriteRFRegister(pAd, RF_R21, RFValue);
+		}
+	}
+
+
+	/* Don't touch LDO_CFG0 for 3090F & 3593, possibly the board is single power scheme*/
+	if (IS_RT3090(pAd) ||	/*IS_RT3090 including RT309x and RT3071/72*/
+		IS_RT3572(pAd) ||
+		(IS_RT3070(pAd) && ((pAd->MACVersion & 0xffff) < 0x0201)))
+	{
+		if (!IS_RT3572(pAd))
+		{
+			RT30xxReadRFRegister(pAd, RF_R27, &RFValue);
+			RFValue |= 0x77;
+			RT30xxWriteRFRegister(pAd, RF_R27, RFValue);
+		}
+
+		RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue);
+		MACValue |= 0x1D000000;
+		RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue);
+	}
+}
+
+/*
+	==========================================================================
+	Description:
+
+	Reverse RF sleep-mode setup
+	
+	==========================================================================
+ */
+VOID RT30xxReverseRFSleepModeSetup(
+	IN PRTMP_ADAPTER 	pAd,
+	IN BOOLEAN			FlgIsInitState)
+{
+	UCHAR RFValue;
+	UINT32 MACValue;
+
+	if(!IS_RT3572(pAd))
+	{
+		{
+			/* RF_BLOCK_en, RF R1 register Bit 0 to 1*/
+			RT30xxReadRFRegister(pAd, RF_R01, &RFValue);
+			RFValue |= 0x01;
+			RT30xxWriteRFRegister(pAd, RF_R01, RFValue);
+
+			/* VCO_IC, RF R7 register Bit 4 & Bit 5 to 1*/
+			RT30xxReadRFRegister(pAd, RF_R07, &RFValue);
+			RFValue |= 0x20;
+			RT30xxWriteRFRegister(pAd, RF_R07, RFValue);
+
+			/* Idoh, RF R9 register Bit 1, Bit 2 & Bit 3 to 1*/
+			RT30xxReadRFRegister(pAd, RF_R09, &RFValue);
+			RFValue |= 0x0E;
+			RT30xxWriteRFRegister(pAd, RF_R09, RFValue);
+
+			/* RX_CTB_en, RF R21 register Bit 7 to 1*/
+			RT30xxReadRFRegister(pAd, RF_R21, &RFValue);
+			RFValue |= 0x80;
+			RT30xxWriteRFRegister(pAd, RF_R21, RFValue);
+		}
+	}
+
+	if (IS_RT3090(pAd) ||	/* IS_RT3090 including RT309x and RT3071/72*/
+		IS_RT3572(pAd) ||
+		IS_RT3390(pAd) ||
+		IS_RT3593(pAd) ||
+		(IS_RT3070(pAd) && ((pAd->MACVersion & 0xffff) < 0x0201)))
+	{
+		if ((!IS_RT3572(pAd)) && (!IS_RT3593(pAd)))
+		{
+			RT30xxReadRFRegister(pAd, RF_R27, &RFValue);
+			if ((pAd->MACVersion & 0xffff) < 0x0211)
+				RFValue = (RFValue & (~0x77)) | 0x3;
+			else
+				RFValue = (RFValue & (~0x77));
+			RT30xxWriteRFRegister(pAd, RF_R27, RFValue);
+		}
+
+		/* RT3071 version E has fixed this issue*/
+		if ((pAd->NicConfig2.field.DACTestBit == 1) && ((pAd->MACVersion & 0xffff) < 0x0211))
+		{
+			/* patch tx EVM issue temporarily*/
+			RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue);
+			MACValue = ((MACValue & 0xE0FFFFFF) | 0x0D000000);
+			RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue);
+		}
+		else if ((!IS_RT3090(pAd) && !IS_RT3593(pAd)))
+		{
+			RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue);
+			MACValue = ((MACValue & 0xE0FFFFFF) | 0x01000000);
+			RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue);
+		}
+	}
+
+	if(IS_RT3572(pAd))
+		RT30xxWriteRFRegister(pAd, RF_R08, 0x80);
+}
+/* end johnli*/
+
+VOID RT30xxHaltAction(
+	IN PRTMP_ADAPTER 	pAd)
+{
+	UINT32		TxPinCfg = 0x00050F0F;
+
+
+	/* Turn off LNA_PE or TRSW_POL*/
+
+	if (IS_RT3070(pAd) || IS_RT3071(pAd) || IS_RT3572(pAd))
+	{
+		if ((IS_RT3071(pAd) || IS_RT3572(pAd))
+#ifdef RTMP_EFUSE_SUPPORT
+			&& (pAd->bUseEfuse)
+#endif /* RTMP_EFUSE_SUPPORT */
+			)
+		{
+			TxPinCfg &= 0xFFFBF0F0; /* bit18 off */
+		}
+		else
+		{
+			TxPinCfg &= 0xFFFFF0F0;
+		}
+
+		RTMP_IO_WRITE32(pAd, TX_PIN_CFG, TxPinCfg);   
+	}
+}
+
+
+VOID RT30xx_ChipSwitchChannel(
+	IN PRTMP_ADAPTER 			pAd,
+	IN UCHAR					Channel,
+	IN BOOLEAN					bScan)
+{
+	CHAR    TxPwer = 0, TxPwer2 = DEFAULT_RF_TX_POWER; /*Bbp94 = BBPR94_DEFAULT, TxPwer2 = DEFAULT_RF_TX_POWER;*/
+	UCHAR	index;
+	UINT32 	Value = 0; /*BbpReg, Value;*/
+	UCHAR 	RFValue;
+	UINT32 i = 0;
+	UCHAR Tx0FinePowerCtrl = 0, Tx1FinePowerCtrl = 0;
+	BBP_R109_STRUC BbpR109 = {{0}};
+
+
+	i = i; /* avoid compile warning */
+	RFValue = 0;
+	/* Search Tx power value*/
+
+	/*
+		We can't use ChannelList to search channel, since some central channl's txpowr doesn't list 
+		in ChannelList, so use TxPower array instead.
+	*/
+	for (index = 0; index < MAX_NUM_OF_CHANNELS; index++)
+	{
+		if (Channel == pAd->TxPower[index].Channel)
+		{
+			TxPwer = pAd->TxPower[index].Power;
+			TxPwer2 = pAd->TxPower[index].Power2;
+
+#ifdef RT33xx
+#endif /* RT33xx */
+			break;
+		}
+	}
+
+	if (index == MAX_NUM_OF_CHANNELS)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("AsicSwitchChannel: Can't find the Channel#%d \n", Channel));
+	}
+#ifdef RT30xx
+	/* The RF programming sequence is difference between 3xxx and 2xxx*/
+	if ((IS_RT30xx(pAd)) && 
+		((pAd->RfIcType == RFIC_3020) || (pAd->RfIcType == RFIC_2020) ||
+		(pAd->RfIcType == RFIC_3021) || (pAd->RfIcType == RFIC_3022) || (pAd->RfIcType == RFIC_3320)))
+	{
+		/* modify by WY for Read RF Reg. error */
+		UCHAR	calRFValue;
+		for (index = 0; index < NUM_OF_3020_CHNL; index++)
+		{
+			if (Channel == FreqItems3020[index].Channel)
+			{
+				/* Programming channel parameters*/
+				RT30xxWriteRFRegister(pAd, RF_R02, FreqItems3020[index].N);
+				/*
+					RT3370/RT3390 RF version is 0x3320 RF_R3 [7:4] is not reserved bits
+					RF_R3[6:4] (pa1_bc_cck) : PA1 Bias CCK
+					RF_R3[7] (pa2_cc_cck) : PA2 Cascode Bias CCK
+				 */
+				RT30xxReadRFRegister(pAd, RF_R03, (PUCHAR)(&RFValue));
+				RFValue = (RFValue & 0xF0) | (FreqItems3020[index].K & ~0xF0); /* <bit 3:0>:K<bit 3:0>*/
+				RT30xxWriteRFRegister(pAd, RF_R03, RFValue);
+				RT30xxReadRFRegister(pAd, RF_R06, &RFValue);
+				RFValue = (RFValue & 0xFC) | FreqItems3020[index].R;
+				RT30xxWriteRFRegister(pAd, RF_R06, RFValue);
+
+				/* Set Tx0 Power*/
+				RT30xxReadRFRegister(pAd, RF_R12, &RFValue);
+				RFValue = (RFValue & 0xE0) | TxPwer;
+				RT30xxWriteRFRegister(pAd, RF_R12, RFValue);
+
+				/*Set Tx1 Power*/
+				RT30xxReadRFRegister(pAd, RF_R13, &RFValue);
+				RFValue = (RFValue & 0xE0) | TxPwer2;
+				RT30xxWriteRFRegister(pAd, RF_R13, RFValue);
+
+#ifdef RT33xx
+#endif /* RT33xx */
+
+				/* Tx/Rx Stream setting*/
+				RT30xxReadRFRegister(pAd, RF_R01, &RFValue);
+
+				RFValue &= 0x03; /*clear bit[7~2]*/
+				if (pAd->Antenna.field.TxPath == 1)
+					RFValue |= 0xA0;
+				else if (pAd->Antenna.field.TxPath == 2)
+					RFValue |= 0x80;
+				if (pAd->Antenna.field.RxPath == 1)
+					RFValue |= 0x50;
+				else if (pAd->Antenna.field.RxPath == 2)
+					RFValue |= 0x40;
+				RT30xxWriteRFRegister(pAd, RF_R01, RFValue);
+
+				RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RFValue);
+				RFValue |= 0x80;
+				RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RFValue);
+				RTMPusecDelay(1000);
+				RFValue &= 0x7F;
+				RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RFValue);
+
+				/* Set RF offset*/
+				RT30xxReadRFRegister(pAd, RF_R23, &RFValue);
+				RFValue = (RFValue & 0x80) | pAd->RfFreqOffset;
+				RT30xxWriteRFRegister(pAd, RF_R23, RFValue);
+
+				/* Set BW*/
+				if (!bScan && (pAd->CommonCfg.BBPCurrentBW == BW_40))
+				{
+					calRFValue = pAd->Mlme.CaliBW40RfR24;
+				}
+				else
+				{
+					calRFValue = pAd->Mlme.CaliBW20RfR24;
+				}
+				/*
+					RT3370/RT3390 RF version is 0x3320 RF_R24 [7:6] is not reserved bits
+					RF_R24[6] (BB_Rx1_out_en) : enable baseband output and ADC input
+					RF_R24[7] (BB_Tx1_out_en) : enable DAC output or baseband input
+				 */
+				RT30xxReadRFRegister(pAd, RF_R24, (PUCHAR)(&RFValue));
+				calRFValue = (RFValue & 0xC0) | (calRFValue & ~0xC0); /* <bit 5>:tx_h20M<bit 5> and <bit 4:0>:tx_agc_fc<bit 4:0>*/
+				RT30xxWriteRFRegister(pAd, RF_R24, calRFValue);
+
+				/*
+					RT3370/RT3390 RF version is 0x3320 RF_R31 [7:6] is not reserved bits
+					RF_R31[4:0] (rx_agc_fc) : capacitor control in baseband filter
+					RF_R31[5] (rx_ h20M) : rx_ h20M: 0=10 MHz and 1=20MHz
+					RF_R31[7:6] (drv_bc_cck) : Driver Bias CCK
+				 */
+				/* Set BW*/
+				if (IS_RT3390(pAd)) /* RT3390 has different AGC for Tx and Rx*/
+				{
+					if (!bScan && (pAd->CommonCfg.BBPCurrentBW == BW_40))
+					{
+						calRFValue = pAd->Mlme.CaliBW40RfR31;
+					}
+					else
+					{
+						calRFValue = pAd->Mlme.CaliBW20RfR31;
+					}
+				}
+				RT30xxReadRFRegister(pAd, RF_R31, (PUCHAR)(&RFValue));
+				calRFValue = (RFValue & 0xC0) | (calRFValue & ~0xC0); /* <bit 5>:rx_h20M<bit 5> and <bit 4:0>:rx_agc_fc<bit 4:0>*/				
+				RT30xxWriteRFRegister(pAd, RF_R31, calRFValue);
+
+				/* Enable RF tuning*/
+				RT30xxReadRFRegister(pAd, RF_R07, &RFValue);
+				RFValue = RFValue | 0x1;
+				RT30xxWriteRFRegister(pAd, RF_R07, RFValue);
+				
+                                RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RFValue);
+                                RFValue |= 0x80;
+                                RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RFValue);
+                                RTMPusecDelay(1000);
+                                RFValue &= 0x7F;
+                                RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RFValue);    
+
+				/* latch channel for future usage.*/
+				pAd->LatchRfRegs.Channel = Channel;
+				
+		DBGPRINT(RT_DEBUG_TRACE, ("SwitchChannel#%d(RF=%d, Pwr0=%d, Pwr1=%d, %dT), N=0x%02X, K=0x%02X, R=0x%02X\n",
+			Channel, 
+			pAd->RfIcType, 
+			TxPwer,
+			TxPwer2,
+			pAd->Antenna.field.TxPath,
+			FreqItems3020[index].N, 
+			FreqItems3020[index].K, 
+			FreqItems3020[index].R));
+
+				break;
+			}
+		}
+	}
+	else
+#endif /* RT30xx */
+	{
+		switch (pAd->RfIcType)
+		{
+			default:
+				DBGPRINT(RT_DEBUG_TRACE, ("SwitchChannel#%d : unknown RFIC=%d\n",
+					  Channel, pAd->RfIcType));
+				break;
+		}	
+	}
+
+	/* Change BBP setting during siwtch from a->g, g->a*/
+	if (Channel <= 14)
+	{
+		ULONG	TxPinCfg = 0x00050F0A;/*Gary 2007/08/09 0x050A0A*/
+
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0);/*(0x44 - GET_LNA_GAIN(pAd)));	According the Rory's suggestion to solve the middle range issue.*/
+
+		/* Rx High power VGA offset for LNA select*/
+		{
+			if (pAd->NicConfig2.field.ExternalLNAForG)
+			{
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0x62);
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x46);
+			}
+			else
+			{
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0x84);
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x50);
+			}
+		}
+
+		/* 5G band selection PIN, bit1 and bit2 are complement*/
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
+		Value &= (~0x6);
+		Value |= (0x04);
+		RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
+
+		{
+			/* Turn off unused PA or LNA when only 1T or 1R*/
+			if (pAd->Antenna.field.TxPath == 1)
+			{
+				TxPinCfg &= 0xFFFFFFF3;
+			}
+			if (pAd->Antenna.field.RxPath == 1)
+			{
+				TxPinCfg &= 0xFFFFF3FF;
+			}
+		}
+
+		RTMP_IO_WRITE32(pAd, TX_PIN_CFG, TxPinCfg);
+
+	}
+	else
+	{
+		ULONG	TxPinCfg = 0x00050F05;/*Gary 2007/8/9 0x050505*/
+		UINT8	bbpValue;
+		
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0);/*(0x44 - GET_LNA_GAIN(pAd)));    According the Rory's suggestion to solve the middle range issue.*/   
+
+		/* Set the BBP_R82 value here */
+		bbpValue = 0xF2;
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, bbpValue);
+
+
+		/* Rx High power VGA offset for LNA select*/
+		if (pAd->NicConfig2.field.ExternalLNAForA)
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x46);
+		}
+		else
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x50);
+		}
+
+		/* 5G band selection PIN, bit1 and bit2 are complement*/
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
+		Value &= (~0x6);
+		Value |= (0x02);
+		RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
+
+		/* Turn off unused PA or LNA when only 1T or 1R*/
+		{
+			/* Turn off unused PA or LNA when only 1T or 1R*/
+			if (pAd->Antenna.field.TxPath == 1)
+			{
+				TxPinCfg &= 0xFFFFFFF3;
+			}
+			if (pAd->Antenna.field.RxPath == 1)
+			{
+				TxPinCfg &= 0xFFFFF3FF;
+			}
+		}
+
+		RTMP_IO_WRITE32(pAd, TX_PIN_CFG, TxPinCfg);
+	}
+
+	/* R66 should be set according to Channel and use 20MHz when scanning*/
+
+	if (bScan)
+		RTMPSetAGCInitValue(pAd, BW_20);
+	else
+		RTMPSetAGCInitValue(pAd, pAd->CommonCfg.BBPCurrentBW);
+
+	/*
+		On 11A, We should delay and wait RF/BBP to be stable
+		and the appropriate time should be 1000 micro seconds 
+		2005/06/05 - On 11G, We also need this delay time. Otherwise it's difficult to pass the WHQL.
+	*/
+	RTMPusecDelay(1000);
+}
+
+VOID RT30xx_ChipBBPAdjust(
+	IN RTMP_ADAPTER			*pAd)
+{
+	UINT32 Value;
+	UCHAR byteValue = 0;
+
+#ifdef DOT11_N_SUPPORT
+	if ((pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth  == BW_40) && 
+		(pAd->CommonCfg.RegTransmitSetting.field.EXTCHA == EXTCHA_ABOVE)
+		/*(pAd->CommonCfg.AddHTInfo.AddHtInfo.ExtChanOffset == EXTCHA_ABOVE)*/
+	)
+	{
+		{
+		pAd->CommonCfg.BBPCurrentBW = BW_40;
+		pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel + 2;
+		}
+		/*  TX : control channel at lower */
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
+		Value &= (~0x1);
+		RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
+
+		/*  RX : control channel at lower */
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &byteValue);
+		byteValue &= (~0x20);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, byteValue);
+
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &byteValue);
+		byteValue &= (~0x18);
+		byteValue |= 0x10;
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, byteValue);
+
+
+		/* request by Gary 20070208 for middle and long range G Band*/
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, 0x38);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x12);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x10);
+			
+
+		DBGPRINT(RT_DEBUG_TRACE, ("ApStartUp : ExtAbove, ChannelWidth=%d, Channel=%d, ExtChanOffset=%d(%d) \n",
+									pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth, 
+									pAd->CommonCfg.Channel, 
+									pAd->CommonCfg.RegTransmitSetting.field.EXTCHA,
+									pAd->CommonCfg.AddHTInfo.AddHtInfo.ExtChanOffset));
+	}
+	else if ((pAd->CommonCfg.Channel > 2) && 
+			(pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth  == BW_40) && 
+			(pAd->CommonCfg.RegTransmitSetting.field.EXTCHA == EXTCHA_BELOW)
+			/*(pAd->CommonCfg.AddHTInfo.AddHtInfo.ExtChanOffset == EXTCHA_BELOW)*/)
+	{
+		pAd->CommonCfg.BBPCurrentBW = BW_40;
+
+		if (pAd->CommonCfg.Channel == 14)
+			pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel - 1;
+		else
+			pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel - 2;
+		/*  TX : control channel at upper */
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
+		Value |= (0x1);		
+		RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
+
+		/*  RX : control channel at upper */
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &byteValue);
+		byteValue |= (0x20);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, byteValue);
+
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &byteValue);
+		byteValue &= (~0x18);
+		byteValue |= 0x10;
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, byteValue);
+		
+
+	 	/* request by Gary 20070208 for middle and long range G band*/
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, 0x38);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x12);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x10);
+		
+		DBGPRINT(RT_DEBUG_TRACE, ("ApStartUp : ExtBlow, ChannelWidth=%d, Channel=%d, ExtChanOffset=%d(%d) \n",
+									pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth, 
+									pAd->CommonCfg.Channel, 
+									pAd->CommonCfg.RegTransmitSetting.field.EXTCHA,
+									pAd->CommonCfg.AddHTInfo.AddHtInfo.ExtChanOffset));
+	}
+	else
+#endif /* DOT11_N_SUPPORT */
+	{
+		pAd->CommonCfg.BBPCurrentBW = BW_20;
+		pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel;
+		
+		/*  TX : control channel at lower */
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
+		Value &= (~0x1);
+		RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
+
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &byteValue);
+		byteValue &= (~0x18);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, byteValue);
+		
+		/* 20 MHz bandwidth*/
+
+		/* request by Gary 20070208*/
+		/*RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, 0x30);*/
+		/* request by Brian 20070306*/
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, 0x38);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x12);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0a);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x10);
+	
+
+#ifdef DOT11_N_SUPPORT
+		DBGPRINT(RT_DEBUG_TRACE, ("ApStartUp : 20MHz, ChannelWidth=%d, Channel=%d, ExtChanOffset=%d(%d) \n",
+										pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth, 
+										pAd->CommonCfg.Channel, 
+										pAd->CommonCfg.RegTransmitSetting.field.EXTCHA,
+										pAd->CommonCfg.AddHTInfo.AddHtInfo.ExtChanOffset));
+#endif /* DOT11_N_SUPPORT */
+	}
+	
+	
+ 	/* request by Gary 20070208 for middle and long range G band*/
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, 0x2D);
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, 0x2D);
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, 0x2D);
+	/*RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0x2D);*/
+		
+
+}	
+
+VOID RT30xx_RTMPSetAGCInitValue(
+	IN PRTMP_ADAPTER		pAd,
+	IN UCHAR				BandWidth)
+{
+
+	UCHAR	R66 = 0x30;
+	
+	if (pAd->LatchRfRegs.Channel <= 14)
+	{	/* BG band*/
+		/* Gary was verified Amazon AP and find that RT307x has BBP_R66 invalid default value */
+		if (IS_RT3070(pAd)||IS_RT3090(pAd) || IS_RT3390(pAd) || IS_RT3593(pAd))
+		{
+			R66 = 0x1C + 2*GET_LNA_GAIN(pAd);
+			{
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
+			}
+		}
+	}	
+
+
+}
+
+#endif /* RT30xx */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/chips/rt3370.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/chips/rt3370.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/chips/rt3370.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/chips/rt3370.c	2017-09-23 03:42:49.694676054 +0800
@@ -0,0 +1,136 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifdef RT3370
+
+#include "rt_config.h"
+
+
+#ifndef RTMP_RF_RW_SUPPORT
+#error "You Should Enable compile flag RTMP_RF_RW_SUPPORT for this chip"
+#endif /* RTMP_RF_RW_SUPPORT */
+
+REG_PAIR RT3370_BBPRegTable[]=
+{
+	{BBP_R68,               0x0B},
+	{BBP_R83,		0x4A},  /* Increase the possibility of using medium power to receive packets*/
+};
+
+UCHAR RT3370_NUM_BBP_REG_PARMS = (sizeof(RT3370_BBPRegTable) / sizeof(REG_PAIR));
+
+
+VOID NICInitRT3370RFRegisters(IN PRTMP_ADAPTER pAd)
+{
+	INT i;
+	UINT8 RfReg = 0;
+	UINT32 data;
+	CHAR bbpreg;
+
+	/* Driver must read EEPROM to get RfIcType before initial RF registers*/
+	/* Initialize RF register to default value*/
+
+		/* Init RF calibration*/
+		/* Driver should toggle RF R30 bit7 before init RF registers*/
+		
+		RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RfReg);
+		RfReg |= 0x80;
+		RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
+		RTMPusecDelay(1000);
+		RfReg &= 0x7F;
+		RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
+
+		for (i = 0; i < RT3370_NUM_RF_REG_PARMS; i++)
+		{
+			RT30xxWriteRFRegister(pAd, RT3370_RFRegTable[i].Register, RT3370_RFRegTable[i].Value);
+		}
+
+		/* Driver should set RF R6 bit6 on before init RF registers		*/
+		RT30xxReadRFRegister(pAd, RF_R06, (PUCHAR)&RfReg);
+		RfReg |= 0x40;
+		RT30xxWriteRFRegister(pAd, RF_R06, (UCHAR)RfReg);
+
+
+		/* RT3071 version E has fixed this issue*/
+		if ((pAd->NicConfig2.field.DACTestBit == 1) && ((pAd->MACVersion & 0xffff) < 0x0211))
+			{
+			/* patch tx EVM issue temporarily*/
+			RTUSBReadMACRegister(pAd, LDO_CFG0, &data);
+			data = ((data & 0xE0FFFFFF) | 0x0D000000);
+			RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
+			}
+		else
+		{
+			/* patch CCK ok, OFDM failed issue, just toggle and restore LDO_CFG0.*/
+			RTUSBReadMACRegister(pAd, LDO_CFG0, &data);
+			data = ((data & 0xE0FFFFFF) | 0x0D000000);
+			RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
+
+			RTMPusecDelay(1000);
+
+			data = ((data & 0xE0FFFFFF) | 0x01000000);
+			RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
+		}
+
+		/* patch LNA_PE_G1 failed issue*/
+		RTMP_IO_READ32(pAd, GPIO_SWITCH, &data);
+		data &= ~(0x20);
+		RTMP_IO_WRITE32(pAd, GPIO_SWITCH, data);
+
+		if (IS_RT3390(pAd)) /* Disable RF filter calibration*/
+		{
+			pAd->Mlme.CaliBW20RfR24 = BW20RFR24;
+			pAd->Mlme.CaliBW40RfR24 = BW40RFR24;
+
+			pAd->Mlme.CaliBW20RfR31 = BW20RFR31;
+			pAd->Mlme.CaliBW40RfR31 = BW40RFR31;
+		}
+		else
+		{
+		/*For RF filter Calibration*/
+		/*RTMPFilterCalibration(pAd);*/
+		}
+
+
+		/* set led open drain enable*/
+		RTMP_IO_READ32(pAd, OPT_14, &data);
+		data |= 0x01;
+		RTMP_IO_WRITE32(pAd, OPT_14, data);
+		
+		/* set default antenna as main*/
+		if (pAd->RfIcType == RFIC_3320)
+			AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
+
+/*
+		From RT3071 Power Sequence v1.1 document, the Normal Operation Setting Registers as follow :
+		BBP_R138 / RF_R1 / RF_R15 / RF_R17 / RF_R20 / RF_R21.
+ */
+		/* add by johnli, RF power sequence setup, load RF normal operation-mode setup*/
+		RT33xxLoadRFNormalModeSetup(pAd);
+
+}
+#endif /* RT3070 */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/chips/rt33xx.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/chips/rt33xx.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/chips/rt33xx.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/chips/rt33xx.c	2017-09-23 03:42:49.694676054 +0800
@@ -0,0 +1,696 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifdef RT33xx
+
+
+#ifndef RTMP_RF_RW_SUPPORT
+#error "You Should Enable compile flag RTMP_RF_RW_SUPPORT for this chip"
+#endif /* RTMP_RF_RW_SUPPORT */
+
+#include "rt_config.h"
+
+
+
+/* RF register initialization set*/
+
+#ifdef RT3370
+REG_PAIR RT3370_RFRegTable[] = {
+	{RF_R00,		0xA0},
+	{RF_R01,		0xF1},
+	{RF_R02,		0xF1},
+	{RF_R03,		0x32},
+	{RF_R04,		0x41},
+	{RF_R05,		0x8F},
+	{RF_R06,		0x4A},
+	{RF_R07,		0xE0},
+	{RF_R08,		0x4B}, /* Read only*/
+	{RF_R09,		0x81},
+
+	{RF_R10,		0x71}, /* Default value changed from 0x41 to 0x71*/
+	{RF_R11,		0x11},
+	{RF_R12,		0x28},
+	{RF_R13,		0xE0},
+	{RF_R14,		0x90},
+	{RF_R15,		0x73},
+	{RF_R16,		0x44},
+	{RF_R17,		0x93},
+	{RF_R18,		0x5C},
+	{RF_R19,		0x84}, /* Default value changed from 0x82 to 0x84*/
+
+	{RF_R20,		0xB2},
+	{RF_R21,		0xE7},
+	{RF_R22,		0x04},	
+	{RF_R23,		0x26},
+	{RF_R24,		BW20RFR24},
+	{RF_R25,		0x23},
+	{RF_R26,		0x85},
+	{RF_R27,		0x02},
+	{RF_R28,		0x60},
+	{RF_R29,		0x90},
+	{RF_R30,		0x29},
+	{RF_R31,		BW20RFR31},
+};
+
+UCHAR RT3370_NUM_RF_REG_PARMS = (sizeof(RT3370_RFRegTable) / sizeof(REG_PAIR));
+#endif /* RT3370 */
+
+
+/*
+========================================================================
+Routine Description:
+	Initialize RT35xx.
+
+Arguments:
+	pAd					- WLAN control block pointer
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RT33xx_Init(
+	IN PRTMP_ADAPTER		pAd)
+{
+	RTMP_CHIP_OP *pChipOps = &pAd->chipOps;
+	RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
+
+
+	/* init capability */
+	/* 
+		WARNING: 
+			Currently following table are shared by all RT30xx based IC, change it carefully when you add a new IC here.
+	*/
+	pChipCap->pRFRegTable = RT3020_RFRegTable;
+	pChipCap->MaxNumOfBbpId = 185;
+
+
+	/* init operator */
+	if (IS_RT3390(pAd))
+	{
+#ifdef RT3370
+		if (pAd->infType == RTMP_DEV_INF_USB)
+		{
+			pChipCap->pRFRegTable = RT3370_RFRegTable;
+			pChipCap->pBBPRegTable = RT3370_BBPRegTable;
+			pChipCap->bbpRegTbSize = RT3370_NUM_BBP_REG_PARMS;
+			pChipOps->AsicRfInit = NICInitRT3370RFRegisters;
+		}
+#endif /* RT3370 */
+
+		pChipOps->AsicHaltAction = RT33xxHaltAction;
+		pChipOps->AsicRfTurnOff = RT33xxLoadRFSleepModeSetup;		
+		pChipOps->AsicReverseRfFromSleepMode = RT33xxReverseRFSleepModeSetup;
+		pChipOps->ChipSwitchChannel = RT33xx_ChipSwitchChannel;
+		pChipOps->ChipBBPAdjust = RT30xx_ChipBBPAdjust;
+		pChipOps->RTMPSetAGCInitValue = RT30xx_RTMPSetAGCInitValue;
+		/* 1T1R only */
+		pChipOps->SetRxAnt = RT33xxSetRxAnt;
+		pAd->Mlme.bEnableAutoAntennaCheck = FALSE;
+
+		pChipOps->ChipResumeMsduTransmission = NULL;
+		pChipOps->VdrTuning1 = NULL;
+		pChipOps->RxSensitivityTuning = NULL;
+		pChipCap->MaxNumOfBbpId = 185;
+
+#ifdef RTMP_FREQ_CALIBRATION_SUPPORT
+#ifdef CONFIG_STA_SUPPORT
+		pChipOps->AsicFreqCalInit = InitFrequencyCalibration;
+		pChipOps->AsicFreqCalStop = StopFrequencyCalibration;
+		pChipOps->AsicFreqCal = FrequencyCalibration;
+		pChipOps->AsicFreqOffsetGet = GetFrequencyOffset;
+#endif /* CONFIG_STA_SUPPORT */		
+#endif /* RTMP_FREQ_CALIBRATION_SUPPORT */
+ 	}
+}
+
+/* Antenna divesity use GPIO3 and EESK pin for control*/
+/* Antenna and EEPROM access are both using EESK pin,*/
+/* Therefor we should avoid accessing EESK at the same time*/
+/* Then restore antenna after EEPROM access*/
+/* The original name of this function is AsicSetRxAnt(), now change to */
+/*VOID AsicSetRxAnt(*/
+
+VOID RT33xxSetRxAnt(
+	IN PRTMP_ADAPTER	pAd,
+	IN UCHAR			Ant)
+{
+	UINT32	Value;
+	UINT32	x;
+
+	if (/*(!pAd->NicConfig2.field.AntDiversity) ||*/
+		(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS))	||
+		(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS))	||
+		(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF)) ||
+		(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)))
+	{
+		return;
+	}
+
+	/* the antenna selection is through firmware and MAC register(GPIO3)*/
+	if (IS_RT3390(pAd) && pAd->RfIcType == RFIC_3320)
+	{
+		if (Ant == 0)
+		{
+			/* Main antenna*/
+			/* E2PROM_CSR only in PCI bus Reg., USB Bus need MCU commad to control the EESK pin.*/
+#ifdef RTMP_MAC_USB
+			AsicSendCommandToMcu(pAd, 0x73, 0xff, 0x1, 0x0);
+#endif /* RTMP_MAC_USB */
+
+			RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &Value);
+			Value &= ~(0x0808);
+			RTMP_IO_WRITE32(pAd, GPIO_CTRL_CFG, Value);
+			DBGPRINT(RT_DEBUG_TRACE, ("AsicSetRxAnt, switch to main antenna\n"));
+		}
+		else
+		{
+			/* Aux antenna*/
+			/* E2PROM_CSR only in PCI bus Reg., USB Bus need MCU commad to control the EESK pin.*/
+#ifdef RTMP_MAC_USB
+			AsicSendCommandToMcu(pAd, 0x73, 0xff, 0x0, 0x0);
+#endif /* RTMP_MAC_USB */
+			RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &Value);
+			Value &= ~(0x0808);
+			Value |= 0x08;
+			RTMP_IO_WRITE32(pAd, GPIO_CTRL_CFG, Value);
+			DBGPRINT(RT_DEBUG_TRACE, ("AsicSetRxAnt, switch to aux antenna\n"));
+		}
+	}
+}
+
+
+
+/* add by johnli, RF power sequence setup*/
+/*
+	==========================================================================
+	Description:
+
+	Load RF normal operation-mode setup
+	
+	==========================================================================
+ */
+VOID RT33xxLoadRFNormalModeSetup(
+	IN PRTMP_ADAPTER 	pAd)
+{
+	UCHAR RFValue = 0, bbpreg = 0 ;
+
+	/* improve power consumption */
+	RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R138, &bbpreg);
+	if (pAd->Antenna.field.TxPath == 1)
+	{
+		/* turn off tx DAC_1*/
+		bbpreg = (bbpreg | 0x20);
+	}
+
+	if (pAd->Antenna.field.RxPath == 1)
+	{
+		/* turn off tx ADC_1*/
+		bbpreg &= (~0x2);
+	}
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R138, bbpreg);
+
+	/* RX0_PD & TX0_PD, RF R1 register Bit 2 & Bit 3 to 0 and RF_BLOCK_en,RX1_PD & TX1_PD, Bit0, Bit 4 & Bit5 to 1*/
+	RT30xxReadRFRegister(pAd, RF_R01, &RFValue);
+	RFValue = (RFValue & (~0x0C)) | 0x31;
+	RT30xxWriteRFRegister(pAd, RF_R01, RFValue);
+
+	/* TX_LO2_en, RF R15 register Bit 3 to 0*/
+	RT30xxReadRFRegister(pAd, RF_R15, &RFValue);
+	RFValue &= (~0x08);
+	RT30xxWriteRFRegister(pAd, RF_R15, RFValue);
+
+	/* TX_LO1_en, RF R17 register Bit 3 to 0*/
+	RT30xxReadRFRegister(pAd, RF_R17, &RFValue);
+	RFValue &= (~0x08);
+	/* to fix rx long range issue*/
+	if (((pAd->MACVersion & 0xffff) >= 0x0211) && (pAd->NicConfig2.field.ExternalLNAForG == 0))
+	{
+		RFValue |= 0x20;
+	}
+	/* set RF_R17_bit[2:0] equal to EEPROM setting at 0x48h*/
+	if (pAd->TxMixerGain24G >= 2)
+	{
+		RFValue &= (~0x7);  /* clean bit [2:0]*/
+		RFValue |= pAd->TxMixerGain24G;
+	}
+	RT30xxWriteRFRegister(pAd, RF_R17, RFValue);
+
+	/* RX_LO1_en, RF R20 register Bit 3 to 0*/
+	RT30xxReadRFRegister(pAd, RF_R20, &RFValue);
+	RFValue &= (~0x08);
+	RT30xxWriteRFRegister(pAd, RF_R20, RFValue);
+
+	/* RX_LO2_en, RF R21 register Bit 3 to 0*/
+	RT30xxReadRFRegister(pAd, RF_R21, &RFValue);
+	RFValue &= (~0x08);
+	RT30xxWriteRFRegister(pAd, RF_R21, RFValue);
+}
+
+/*
+	==========================================================================
+	Description:
+
+	Load RF sleep-mode setup
+	
+	==========================================================================
+ */
+VOID RT33xxLoadRFSleepModeSetup(
+	IN PRTMP_ADAPTER 	pAd)
+{
+	UCHAR RFValue;
+	UINT32 MACValue;
+
+		/* RF_BLOCK_en. RF R1 register Bit 0 to 0*/
+		RT30xxReadRFRegister(pAd, RF_R01, &RFValue);
+		RFValue &= (~0x01);
+		RT30xxWriteRFRegister(pAd, RF_R01, RFValue);
+
+		/* VCO_IC, RF R7 register Bit 4 & Bit 5 to 0*/
+		RT30xxReadRFRegister(pAd, RF_R07, &RFValue);
+		RFValue &= (~0x30);
+		RT30xxWriteRFRegister(pAd, RF_R07, RFValue);
+
+
+		/* RX_CTB_en, RF R21 register Bit 7 to 0*/
+		RT30xxReadRFRegister(pAd, RF_R21, &RFValue);
+		RFValue &= (~0x80);
+		RT30xxWriteRFRegister(pAd, RF_R21, RFValue);
+
+	if (IS_RT3390(pAd))
+	{
+		RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue);
+		MACValue |= 0x1D000000;
+		RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue);
+	}
+}
+
+/*
+	==========================================================================
+	Description:
+
+	Reverse RF sleep-mode setup
+	
+	==========================================================================
+ */
+VOID RT33xxReverseRFSleepModeSetup(
+	IN PRTMP_ADAPTER 	pAd,
+	IN BOOLEAN			FlgIsInitState)
+{
+	UCHAR RFValue;
+	UINT32 MACValue;
+
+		/* RF_BLOCK_en, RF R1 register Bit 0 to 1*/
+		RT30xxReadRFRegister(pAd, RF_R01, &RFValue);
+		RFValue |= 0x01;
+		RT30xxWriteRFRegister(pAd, RF_R01, RFValue);
+
+		/* VCO_IC, RF R7 register Bit 4 & Bit 5 to 1*/
+		RT30xxReadRFRegister(pAd, RF_R07, &RFValue);
+		/* According to HK's comment for Max Input power issue.
+		    RF 07 must set to 0x60. */
+		RFValue |= 0x20; /* 0x30. */
+		RT30xxWriteRFRegister(pAd, RF_R07, RFValue);
+
+		/* RX_CTB_en, RF R21 register Bit 7 to 1*/
+		RT30xxReadRFRegister(pAd, RF_R21, &RFValue);
+		RFValue |= 0x80;
+		RT30xxWriteRFRegister(pAd, RF_R21, RFValue);
+
+	if (IS_RT3390(pAd))
+		{
+		/* RT3071 version E has fixed this issue*/
+		if ((pAd->NicConfig2.field.DACTestBit == 1) && ((pAd->MACVersion & 0xffff) < 0x0211))
+		{
+			/* patch tx EVM issue temporarily*/
+			RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue);
+			MACValue = ((MACValue & 0xE0FFFFFF) | 0x0D000000);
+			RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue);
+		}
+		else
+		{
+			RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue);
+			MACValue = ((MACValue & 0xE0FFFFFF) | 0x01000000);
+			RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue);
+		}
+	}
+}
+/* end johnli*/
+
+VOID RT33xxHaltAction(
+	IN PRTMP_ADAPTER 	pAd)
+{
+	UINT32		TxPinCfg = 0x00050F0F;
+
+	
+	/* Turn off LNA_PE or TRSW_POL*/
+	
+        /* Fixed suspend leakage current*/
+                /* According to MAC 0x0580 bit [31], set MAC 0x1328 bit[18] during suspend mode.*/
+                /* If SEL_EFUSE=0, set TRSW_POL=0 in suspend mode.*/
+                /* If SEL_EFUSE=1, set TRSW_POL=1 in suspend mode.*/
+	
+		if (IS_RT3390(pAd)
+#ifdef RTMP_EFUSE_SUPPORT
+			&& (pAd->bUseEfuse)
+#endif /* RTMP_EFUSE_SUPPORT */
+			)
+		{
+			TxPinCfg &= 0xFFFBF0F0; /* bit18 off*/
+		}
+		else
+		{
+			TxPinCfg &= 0xFFFFF0F0;
+		}
+
+		RTMP_IO_WRITE32(pAd, TX_PIN_CFG, TxPinCfg);   
+	}
+
+VOID RT33xx_ChipSwitchChannel(
+	IN PRTMP_ADAPTER 			pAd,
+	IN UCHAR					Channel,
+	IN BOOLEAN					bScan)
+{
+	CHAR    TxPwer = 0, TxPwer2 = DEFAULT_RF_TX_POWER; /*Bbp94 = BBPR94_DEFAULT, TxPwer2 = DEFAULT_RF_TX_POWER;*/
+	UCHAR	index;
+	UINT32 	Value = 0; /*BbpReg, Value;*/
+	UCHAR 	RFValue;
+#ifdef DOT11N_SS3_SUPPORT
+	CHAR    TxPwer3 = 0;
+#endif /* DOT11N_SS3_SUPPORT */
+
+#ifdef RT30xx
+	UCHAR Tx0FinePowerCtrl = 0, Tx1FinePowerCtrl = 0;
+	BBP_R109_STRUC BbpR109 = {{0}};
+#endif /* RT30xx */
+
+
+	RFValue = 0;
+	/* Search Tx power value*/
+
+	/*
+		We can't use ChannelList to search channel, since some central channl's txpowr doesn't list 
+		in ChannelList, so use TxPower array instead.
+	*/
+	for (index = 0; index < MAX_NUM_OF_CHANNELS; index++)
+	{
+		if (Channel == pAd->TxPower[index].Channel)
+		{
+			TxPwer = pAd->TxPower[index].Power;
+			TxPwer2 = pAd->TxPower[index].Power2;
+#ifdef DOT11N_SS3_SUPPORT
+			if (IS_RT2883(pAd) || IS_RT3593(pAd) || IS_RT3883(pAd))
+		    	TxPwer3 = pAd->TxPower[index].Power3;
+#endif /* DOT11N_SS3_SUPPORT */
+
+#ifdef RT30xx /*RT33xx*/
+			if ((IS_RT3090A(pAd) || IS_RT3390(pAd) || IS_RT5390(pAd)))/*&&*/
+				/*(pAd->infType == RTMP_DEV_INF_PCI || pAd->infType == RTMP_DEV_INF_PCIE))*/
+			{
+				Tx0FinePowerCtrl = pAd->TxPower[index].Tx0FinePowerCtrl;
+				Tx1FinePowerCtrl = pAd->TxPower[index].Tx1FinePowerCtrl;
+			}
+#endif /* RT30xx */
+
+			break;
+		}
+	}
+
+	if (index == MAX_NUM_OF_CHANNELS)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("AsicSwitchChannel: Can't find the Channel#%d \n", Channel));
+	}
+#ifdef RT30xx
+	/* The RF programming sequence is difference between 3xxx and 2xxx*/
+	if ((IS_RT30xx(pAd)) && 
+		((pAd->RfIcType == RFIC_3020) || (pAd->RfIcType == RFIC_2020) ||
+		(pAd->RfIcType == RFIC_3021) || (pAd->RfIcType == RFIC_3022) || (pAd->RfIcType == RFIC_3320)))
+	{
+		/* modify by WY for Read RF Reg. error */
+		UCHAR	calRFValue;
+		for (index = 0; index < NUM_OF_3020_CHNL; index++)
+		{
+			if (Channel == FreqItems3020[index].Channel)
+			{
+				/* Programming channel parameters*/
+				RT30xxWriteRFRegister(pAd, RF_R02, FreqItems3020[index].N);
+				/*
+					RT3370/RT3390 RF version is 0x3320 RF_R3 [7:4] is not reserved bits
+					RF_R3[6:4] (pa1_bc_cck) : PA1 Bias CCK
+					RF_R3[7] (pa2_cc_cck) : PA2 Cascode Bias CCK
+				 */
+				RT30xxReadRFRegister(pAd, RF_R03, (PUCHAR)(&RFValue));
+				RFValue = (RFValue & 0xF0) | (FreqItems3020[index].K & ~0xF0); /* <bit 3:0>:K<bit 3:0>*/
+				RT30xxWriteRFRegister(pAd, RF_R03, RFValue);
+				RT30xxReadRFRegister(pAd, RF_R06, &RFValue);
+				RFValue = (RFValue & 0xFC) | FreqItems3020[index].R;
+				RT30xxWriteRFRegister(pAd, RF_R06, RFValue);
+
+				/* Set Tx0 Power*/
+				RT30xxReadRFRegister(pAd, RF_R12, &RFValue);
+				RFValue = (RFValue & 0xE0) | TxPwer;
+				RT30xxWriteRFRegister(pAd, RF_R12, RFValue);
+
+				/* Set Tx1 Power*/
+				RT30xxReadRFRegister(pAd, RF_R13, &RFValue);
+				RFValue = (RFValue & 0xE0) | TxPwer2;
+				RT30xxWriteRFRegister(pAd, RF_R13, RFValue);
+
+#ifdef RT33xx
+#endif /* RT33xx */
+
+				/* Tx/Rx Stream setting*/
+				RT30xxReadRFRegister(pAd, RF_R01, &RFValue);
+				/*if (IS_RT3090(pAd))*/
+				/*	RFValue |= 0x01;  Enable RF block.*/
+				RFValue &= 0xC3;	/*clear bit[7~2]*/
+				if (pAd->Antenna.field.TxPath == 1)
+					RFValue |= 0x20;
+				else if (pAd->Antenna.field.TxPath == 2)
+					;
+				if (pAd->Antenna.field.RxPath == 1)
+					RFValue |= 0x10;
+				else if (pAd->Antenna.field.RxPath == 2)
+					;
+				RT30xxWriteRFRegister(pAd, RF_R01, RFValue);
+
+                                RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RFValue);
+                                RFValue |= 0x80;
+                                RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RFValue);
+                                RTMPusecDelay(1000);
+                                RFValue &= 0x7F;
+                                RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RFValue);
+
+				/* Set RF offset*/
+				RT30xxReadRFRegister(pAd, RF_R23, &RFValue);
+				RFValue = (RFValue & 0x80) | pAd->RfFreqOffset;
+				RT30xxWriteRFRegister(pAd, RF_R23, RFValue);
+
+				/* Set BW*/
+				if (!bScan && (pAd->CommonCfg.BBPCurrentBW == BW_40))
+				{
+					calRFValue = pAd->Mlme.CaliBW40RfR24;
+					/*DISABLE_11N_CHECK(pAd);*/
+				}
+				else
+				{
+					calRFValue = pAd->Mlme.CaliBW20RfR24;
+				}
+				/*
+					RT3370/RT3390 RF version is 0x3320 RF_R24 [7:6] is not reserved bits
+					RF_R24[6] (BB_Rx1_out_en) : enable baseband output and ADC input
+					RF_R24[7] (BB_Tx1_out_en) : enable DAC output or baseband input
+				 */
+				RT30xxReadRFRegister(pAd, RF_R24, (PUCHAR)(&RFValue));
+				calRFValue = (RFValue & 0xC0) | (calRFValue & ~0xC0); /* <bit 5>:tx_h20M<bit 5> and <bit 4:0>:tx_agc_fc<bit 4:0>*/
+				RT30xxWriteRFRegister(pAd, RF_R24, calRFValue);
+
+				/*
+					RT3370/RT3390 RF version is 0x3320 RF_R31 [7:6] is not reserved bits
+					RF_R31[4:0] (rx_agc_fc) : capacitor control in baseband filter
+					RF_R31[5] (rx_ h20M) : rx_ h20M: 0=10 MHz and 1=20MHz
+					RF_R31[7:6] (drv_bc_cck) : Driver Bias CCK
+				 */
+				/* Set BW*/
+				if (IS_RT3390(pAd)) /* RT3390 has different AGC for Tx and Rx*/
+				{
+					if (!bScan && (pAd->CommonCfg.BBPCurrentBW == BW_40))
+					{
+						calRFValue = pAd->Mlme.CaliBW40RfR31;
+					}
+					else
+					{
+						calRFValue = pAd->Mlme.CaliBW20RfR31;
+					}
+				}
+				RT30xxReadRFRegister(pAd, RF_R31, (PUCHAR)(&RFValue));
+				calRFValue = (RFValue & 0xC0) | (calRFValue & ~0xC0); /* <bit 5>:rx_h20M<bit 5> and <bit 4:0>:rx_agc_fc<bit 4:0>				*/
+				RT30xxWriteRFRegister(pAd, RF_R31, calRFValue);
+
+				/* Enable RF tuning*/
+				RT30xxReadRFRegister(pAd, RF_R07, &RFValue);
+				RFValue = RFValue | 0x1;
+				RT30xxWriteRFRegister(pAd, RF_R07, RFValue);
+
+          			RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RFValue);
+                            RFValue |= 0x80;
+                            RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RFValue);
+                            RTMPusecDelay(1000);
+                            RFValue &= 0x7F;
+                            RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RFValue);   
+
+				/* latch channel for future usage.*/
+				pAd->LatchRfRegs.Channel = Channel;
+				
+		DBGPRINT(RT_DEBUG_TRACE, ("SwitchChannel#%d(RF=%d, Pwr0=%d, Pwr1=%d, %dT), N=0x%02X, K=0x%02X, R=0x%02X\n",
+			Channel, 
+			pAd->RfIcType, 
+			TxPwer,
+			TxPwer2,
+			pAd->Antenna.field.TxPath,
+			FreqItems3020[index].N, 
+			FreqItems3020[index].K, 
+			FreqItems3020[index].R));
+
+				break;
+			}
+		}
+	}
+	
+#endif /* RT30xx */	
+
+	/* Change BBP setting during siwtch from a->g, g->a*/
+	if (Channel <= 14)
+	{
+		ULONG	TxPinCfg = 0x00050F0A;/*Gary 2007/08/09 0x050A0A*/
+
+
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0);/*(0x44 - GET_LNA_GAIN(pAd)));	 According the Rory's suggestion to solve the middle range issue.*/
+
+		/* Rx High power VGA offset for LNA select*/
+		
+		if (pAd->NicConfig2.field.ExternalLNAForG)
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0x62);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x46);
+		}
+		else
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0x84);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x50);
+		}	
+
+
+		
+
+		/* Turn off unused PA or LNA when only 1T or 1R*/
+		if (pAd->Antenna.field.TxPath == 1)
+		{
+			TxPinCfg &= 0xFFFFFFF3;
+		}
+		if (pAd->Antenna.field.RxPath == 1)
+		{
+			TxPinCfg &= 0xFFFFF3FF;
+		}		
+
+		RTMP_IO_WRITE32(pAd, TX_PIN_CFG, TxPinCfg);
+
+
+	}
+	else
+	{
+		ULONG	TxPinCfg = 0x00050F05;/*Gary 2007/8/9 0x050505*/
+		UINT8	bbpValue;
+		
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0);/*(0x44 - GET_LNA_GAIN(pAd)));    According the Rory's suggestion to solve the middle range issue.     */
+
+		/* Set the BBP_R82 value here */
+		bbpValue = 0xF2;
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, bbpValue);
+
+
+		/* Rx High power VGA offset for LNA select*/
+		if (pAd->NicConfig2.field.ExternalLNAForA)
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x46);
+		}
+		else
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x50);
+		}
+
+		/* 5G band selection PIN, bit1 and bit2 are complement*/
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
+		Value &= (~0x6);
+		Value |= (0x02);
+		RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
+
+		/* Turn off unused PA or LNA when only 1T or 1R*/
+
+		/* Turn off unused PA or LNA when only 1T or 1R*/
+		if (pAd->Antenna.field.TxPath == 1)
+		{
+			TxPinCfg &= 0xFFFFFFF3;
+		}
+		if (pAd->Antenna.field.RxPath == 1)
+		{
+			TxPinCfg &= 0xFFFFF3FF;
+		}
+	
+
+		RTMP_IO_WRITE32(pAd, TX_PIN_CFG, TxPinCfg);
+
+	}
+
+	
+	/* GPIO control*/
+	
+
+	/* R66 should be set according to Channel and use 20MHz when scanning*/
+	/*RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, (0x2E + GET_LNA_GAIN(pAd)));*/
+	if (bScan)
+		RTMPSetAGCInitValue(pAd, BW_20);
+	else
+		RTMPSetAGCInitValue(pAd, pAd->CommonCfg.BBPCurrentBW);
+
+	
+	/* On 11A, We should delay and wait RF/BBP to be stable*/
+	/* and the appropriate time should be 1000 micro seconds */
+	/* 2005/06/05 - On 11G, We also need this delay time. Otherwise it's difficult to pass the WHQL.*/
+	
+	RTMPusecDelay(1000);  
+}
+
+#endif /* RT33xx */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/chips/rt5390.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/chips/rt5390.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/chips/rt5390.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/chips/rt5390.c	2017-09-23 03:42:49.698676042 +0800
@@ -0,0 +1,3929 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+
+#ifndef RTMP_RF_RW_SUPPORT
+#error "You Should Enable compile flag RTMP_RF_RW_SUPPORT for this chip"
+#endif /* RTMP_RF_RW_SUPPORT */
+#ifdef RTMP_FLASH_SUPPORT
+UCHAR RT5390_EeBuffer[EEPROM_SIZE] = { 
+0x92, 0x30, 0x02, 0x01, 0x00, 0x0c, 0x43, 0x30, 0x92, 0x00, 0x92, 0x30, 0x14, 0x18, 0x01, 0x80, 
+0x00, 0x00, 0x92, 0x30, 0x14, 0x18, 0x00, 0x00, 0x01, 0x00, 0x6a, 0xff, 0x13, 0x02, 0xff, 0xff, 
+0xff, 0xff, 0xc1, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 
+0x8e, 0x75, 0x01, 0x43, 0x22, 0x08, 0x27, 0x00, 0xff, 0xff, 0x16, 0x01, 0xff, 0xff, 0xd9, 0xfa, 
+0xcc, 0x88, 0xff, 0xff, 0x0a, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 
+0xff, 0xff, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 
+0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x1d, 0x1a, 
+0x15, 0x11, 0x0f, 0x0d, 0x0a, 0x07, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x88, 0x88, 
+0xcc, 0xcc, 0xaa, 0x88, 0xcc, 0xcc, 0xaa, 0x88, 0xcc, 0xcc, 0xaa, 0x88, 0xcc, 0xcc, 0xaa, 0x88, 
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, };
+#endif /* RTMP_FLASH_SUPPORT */
+
+REG_PAIR RF5390RegTable[] = 
+{
+/*	{RF_R00,		0x20},  //Read only */
+	{RF_R01,		0x0F}, 
+	{RF_R02,		0x80}, 
+	{RF_R03,		0x88}, /* vcocal_double_step */ 
+/*	{RF_R04,		0x51}, // Read only */
+	{RF_R05,		0x10}, 
+	{RF_R06,		0xA0}, 
+	{RF_R07,		0x00}, 
+/*	{RF_R08,		0xF1}, // By channel plan */
+/*	{RF_R09,		0x02}, // By channel plan */
+
+	{RF_R10,		0x53},
+	{RF_R11,		0x4A},
+	{RF_R12,		0x46},
+	{RF_R13,		0x9F},
+	{RF_R14,		0x00}, 
+	{RF_R15,		0x00}, 
+	{RF_R16,		0x00}, 
+	/*{RF_R17,		0x00}, // Based on the frequency offset in the EEPROM */
+	{RF_R18,		0x03}, 
+	{RF_R19,		0x00}, /* Spare */
+
+	{RF_R20,		0x00}, 
+	{RF_R21,		0x00}, /* Spare */
+	{RF_R22,		0x20},	
+	{RF_R23,		0x00}, /* Spare */
+	{RF_R24,		0x00}, /* Spare */
+	{RF_R25,		0xC0}, 
+	{RF_R26,		0x00}, /* Spare */
+	{RF_R27,		0x09}, 
+	{RF_R28,		0x00}, 
+	{RF_R29,		0x10}, 
+
+	{RF_R30,		0x10},
+	{RF_R31,		0x80}, 
+	{RF_R32,		0x80}, 
+	{RF_R33,		0x00}, /* Spare */
+	{RF_R34,		0x07}, 
+	{RF_R35,		0x12}, 
+	{RF_R36,		0x00}, 
+	{RF_R37,		0x08}, 
+	{RF_R38,		0x85}, 
+	{RF_R39,		0x1B}, 
+
+	{RF_R40,		0x0B}, 
+	{RF_R41,		0xBB}, 
+	{RF_R42,		0xD2}, 
+	{RF_R43,		0x9A}, 
+	{RF_R44,		0x0E},
+	{RF_R45,		0xA2}, 
+	{RF_R46,		0x7B}, 
+	{RF_R47,		0x00}, 
+	{RF_R48,		0x10}, 
+	{RF_R49,		0x94},
+
+/*	{RF_R50,		0x00}, // NC */
+/*	{RF_R51,		0x00}, // NC */
+ 	{RF_R52,		0x38}, 
+	{RF_R53,		0x84}, /* RT5370 only. RT5390, RT5370F and RT5390F will re-write to 0x00 */
+	{RF_R54,		0x78},
+	{RF_R55,		0x44},
+	{RF_R56,		0x22}, 
+	{RF_R57,		0x80},
+	{RF_R58,		0x7F}, 
+	{RF_R59,		0x8F}, 
+
+	{RF_R60,		0x45}, 
+	{RF_R61,		0xB5}, 
+	{RF_R62,		0x00}, /* Spare */
+	{RF_R63,		0x00}, /* Spare */
+};
+
+#define NUM_RF_5390_REG_PARMS (sizeof(RF5390RegTable) / sizeof(REG_PAIR))
+
+/* 5390U (5370 using PCIe interface) */
+
+REG_PAIR RF5390URegTable[] = 
+{
+/*	{RF_R00,		0x20},    Read only */
+	{RF_R01,		0x0F}, 
+	{RF_R02,		0x80}, 
+	{RF_R03,		0x88}, /* vcocal_double_step */
+/*	{RF_R04,		0x51},    Read only */
+	{RF_R05,		0x10}, 
+	{RF_R06,		0xE0}, 
+	{RF_R07,		0x00}, 
+/*	{RF_R08,		0xF1},    By channel plan */
+/*	{RF_R09,		0x02},    By channel plan */
+
+	{RF_R10,		0x53},
+	{RF_R11,		0x4A},
+	{RF_R12,		0x46},
+	{RF_R13,		0x9F},
+	{RF_R14,		0x00}, 
+	{RF_R15,		0x00}, 
+	{RF_R16,		0x00}, 
+/*	{RF_R17,		0x00},    Based on the frequency offset in the EEPROM */
+	{RF_R18,		0x03}, 
+	{RF_R19,		0x00}, /* Spare */
+
+	{RF_R20,		0x00}, 
+	{RF_R21,		0x00}, /* Spare */
+	{RF_R22,		0x20},	
+	{RF_R23,		0x00}, /* Spare */
+	{RF_R24,		0x00}, /* Spare */
+	{RF_R25,		0x80}, 
+	{RF_R26,		0x00}, /* Spare */
+	{RF_R27,		0x09}, 
+	{RF_R28,		0x00}, 
+	{RF_R29,		0x10}, 
+
+	{RF_R30,		0x10},
+	{RF_R31,		0x80}, 
+	{RF_R32,		0x80}, 
+	{RF_R33,		0x00}, /* Spare */
+	{RF_R34,		0x07}, 
+	{RF_R35,		0x12}, 
+	{RF_R36,		0x00}, 
+	{RF_R37,		0x08}, 
+	{RF_R38,		0x85}, 
+	{RF_R39,		0x1B}, 
+
+	{RF_R40,		0x0B}, 
+	{RF_R41,		0xBB}, 
+	{RF_R42,		0xD2}, 
+	{RF_R43,		0x9A}, 
+	{RF_R44,		0x0E},
+	{RF_R45,		0xA2}, 
+	{RF_R46,		0x73}, 
+	{RF_R47,		0x00}, 
+	{RF_R48,		0x10}, 
+	{RF_R49,		0x94},
+
+/*	{RF_R50,		0x00},    NC */
+/*	{RF_R51,		0x00},    NC */
+	{RF_R52,		0x38}, 
+	{RF_R53,		0x00},
+	{RF_R54,		0x78},
+	{RF_R55,		0x23},
+	{RF_R56,		0x22}, 
+	{RF_R57,		0x80},
+	{RF_R58,		0x7F}, 
+	{RF_R59,		0x07}, 
+
+	{RF_R60,		0x45}, 
+	{RF_R61,		0xD1}, 
+	{RF_R62,		0x00}, /* Spare */
+	{RF_R63,		0x00}, /* Spare */
+};
+
+#define NUM_RF_5390U_REG_PARMS (sizeof(RF5390URegTable) / sizeof(REG_PAIR))
+
+REG_PAIR RF5392RegTable[] = 
+{
+/*	{RF_R00,		0x20}, // Read only */
+	{RF_R01,		0x07},
+	{RF_R02,		0x80},
+	{RF_R03,		0x88}, /* vcocal_double_step */
+/*	{RF_R04,		0x51}, // Read only */
+	{RF_R05,		0x10},
+	{RF_R06,		0xE0}, /* 20101018 update */
+	{RF_R07,		0x00}, 
+/*	{RF_R08,		0xF1}, // By channel plan */
+/*	{RF_R09,		0x02}, // By channel plan */
+	{RF_R10,		0x53},
+	{RF_R11,		0x4A},
+	{RF_R12,		0x46},
+	{RF_R13,		0x9F},
+	{RF_R14,		0x00}, 
+	{RF_R15,		0x00}, 
+	{RF_R16,		0x00}, 
+/*	{RF_R17,		0x00}, // Based on the frequency offset in the EEPROM */
+	{RF_R18,		0x03}, 
+	{RF_R19,		0x4D}, /* Spare */
+	{RF_R20,		0x00}, 
+	{RF_R21,		0x8D}, /* Spare 20101018 update. */
+	{RF_R22,		0x20},	
+	{RF_R23,		0x0B}, /* Spare 20101018 update. */
+	{RF_R24,		0x44}, /* Spare */
+	{RF_R25,		0x80}, /* 20101018 update. */
+	{RF_R26,		0x82}, /* Spare */
+	{RF_R27,		0x09}, 
+	{RF_R28,		0x00}, 
+	{RF_R29,		0x10}, 
+	{RF_R30,		0x10},
+	{RF_R31,		0x80}, 
+	{RF_R32,		0x20}, /* 20110621 update */
+	{RF_R33,		0xC0}, /* Spare */
+	{RF_R34,		0x07}, 
+	{RF_R35,		0x12}, 
+	{RF_R36,		0x00}, 
+	{RF_R37,		0x08}, 
+	{RF_R38,		0x89}, /* 20101118 update. */
+	{RF_R39,		0x1B}, 
+
+	{RF_R40,		0x0F}, /* 20101118 update. */
+	{RF_R41,		0xBB}, 
+	{RF_R42,		0xD5}, /* 20101018 update.*/
+	{RF_R43,		0x9B}, /* 20101018 update. */
+	{RF_R44,		0x0E},
+	{RF_R45,		0xA2}, 
+	{RF_R46,		0x73}, 
+	{RF_R47,		0x0C}, 
+	{RF_R48,		0x10}, 
+	{RF_R49,		0x94},
+	{RF_R50,		0x94}, /* 5392_todo */
+	{RF_R51,		0x3A}, /* 20101018 update */
+	{RF_R52,		0x48}, /* 20101018 update. */
+	{RF_R53,		0x44}, /* 20101018 update. */
+	{RF_R54,		0x38},
+	{RF_R55,		0x43},
+	{RF_R56,		0xA1}, /* 20101018 update. */
+	{RF_R57,		0x00}, /* 20101018 update.*/
+	{RF_R58,		0x39}, 
+	{RF_R59,		0x07}, /* 20101018 update. */
+	{RF_R60,		0x45}, /* 20101018 update.*/
+	{RF_R61,		0x91}, /* 20101018 update. */
+	{RF_R62,		0x39}, /* Spare */
+	{RF_R63,		0x00}, /* Spare */
+};
+
+#define NUM_RF_5392_REG_PARMS (sizeof(RF5392RegTable) / sizeof(REG_PAIR))
+
+
+RTMP_REG_PAIR	RT5390_MACRegTable[] =	{
+	{TX_SW_CFG0,		0x404},   // 2010-07-20
+};
+
+UCHAR RT5390_NUM_MAC_REG_PARMS = (sizeof(RT5390_MACRegTable) / sizeof(RTMP_REG_PAIR));
+
+#ifdef RTMP_INTERNAL_TX_ALC
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+
+/* The Tx power tuning entry */
+
+TX_POWER_TUNING_ENTRY_STRUCT RT5390_TxPowerTuningTable[] = 
+{
+/*	idxTxPowerTable		Tx power control over RF		Tx power control over MAC */
+/*	(zero-based array)		{ RF R49[5:0]: Tx0 ALC},		{MAC 0x1314~0x1324} */
+/*     0       */				{0x00,					-15}, 
+/*     1       */ 				{0x01,					-15}, 
+/*     2       */ 				{0x00,					-14}, 
+/*     3       */ 				{0x01,					-14}, 
+/*     4       */ 				{0x00,					-13}, 
+/*     5       */				{0x01,					-13}, 
+/*     6       */ 				{0x00,					-12}, 
+/*     7       */ 				{0x01,					-12}, 
+/*     8       */ 				{0x00,					-11}, 
+/*     9       */ 				{0x01,					-11}, 
+/*     10     */ 				{0x00,					-10}, 
+/*     11     */ 				{0x01,					-10}, 
+/*     12     */ 				{0x00,					-9}, 
+/*     13     */ 				{0x01,					-9}, 
+/*     14     */ 				{0x00,					-8}, 
+/*     15     */ 				{0x01,					-8}, 
+/*     16     */ 				{0x00,					-7}, 
+/*     17     */ 				{0x01,					-7}, 
+/*     18     */ 				{0x00,					-6}, 
+/*     19     */ 				{0x01,					-6}, 
+/*     20     */ 				{0x00,					-5}, 
+/*     21     */ 				{0x01,					-5}, 
+/*     22     */ 				{0x00,					-4}, 
+/*     23     */ 				{0x01,					-4}, 
+/*     24     */ 				{0x00,					-3}, 
+/*     25     */ 				{0x01,					-3}, 
+/*     26     */ 				{0x00,					-2}, 
+/*     27     */ 				{0x01,					-2}, 
+/*     28     */ 				{0x00,					-1}, 
+/*     29     */ 				{0x01,					-1}, 
+/*     30     */ 				{0x00,					0}, 
+/*     31     */ 				{0x01,					0}, 
+/*     32     */ 				{0x02,					0}, 
+/*     33     */ 				{0x03,					0}, 
+/*     34     */ 				{0x04,					0}, 
+/*     35     */ 				{0x05,					0}, 
+/*     36     */ 				{0x06,					0}, 
+/*     37     */ 				{0x07,					0}, 
+/*     38     */ 				{0x08,					0}, 
+/*     39     */ 				{0x09,					0}, 
+/*     40     */ 				{0x0A,					0}, 
+/*     41     */ 				{0x0B,					0}, 
+/*     42     */ 				{0x0C,					0}, 
+/*     43     */ 				{0x0D,					0}, 
+/*     44     */ 				{0x0E,					0}, 
+/*     45     */ 				{0x0F,					0}, 
+/*     46     */ 				{0x0F,					0}, 
+/*     47     */ 				{0x10,					0}, 
+/*     48     */ 				{0x11,					0}, 
+/*     49     */ 				{0x12,					0}, 
+/*     50     */ 				{0x13,					0}, 
+/*     51     */ 				{0x14,					0}, 
+/*     52     */ 				{0x15,					0}, 
+/*     53     */ 				{0x16,					0}, 
+/*     54     */ 				{0x17,					0}, 
+/*     55     */ 				{0x18,					0}, 
+/*     56     */ 				{0x19,					0}, 
+/*     57     */ 				{0x1A,					0}, 
+/*     58     */ 				{0x1B,					0}, 
+/*     59     */ 				{0x1C,					0}, 
+/*     60     */ 				{0x1D,					0}, 
+/*     61     */ 				{0x1E,					0}, 
+/*     62     */ 				{0x1F,					0}, 
+/*     63     */                                 	{0x20,                                       0}, 
+/*     64     */                                 	{0x21,                                       0}, 
+/*     65     */                                 	{0x22,                                       0}, 
+/*     66     */                                 	{0x23,                                       0}, 
+/*     67     */                                 	{0x24,                                       0}, 
+/*     68     */                                 	{0x25,                                       0}, 
+/*     69     */                                 	{0x26,                                       0}, 
+/*     70     */                                 	{0x27,                                       0}, 
+/*     71     */                                 	{0x27-1,                                   1}, 
+/*     72     */                                 	{0x27,                                       1}, 
+/*     73     */                                 	{0x27-1,                                   2}, 
+/*     74     */                                 	{0x27,                                       2}, 
+/*     75     */                                 	{0x27-1,                                   3}, 
+/*     76     */                       		{0x27,                                       3}, 
+/*     77     */                       		{0x27-1,                                   4}, 
+/*     78     */                       		{0x27,                                       4}, 
+/*     79     */                       		{0x27-1,                                   5}, 
+/*     80     */                       		{0x27,                                       5}, 
+/*     81     */                       		{0x27-1,                                   6}, 
+/*     82     */                       		{0x27,                                       6}, 
+/*     83     */                       		{0x27-1,                                   7}, 
+/*     84     */                       		{0x27,                                       7}, 
+/*     85     */                       		{0x27-1,                                   8}, 
+/*     86     */                       		{0x27,                                       8}, 
+/*     87     */                       		{0x27-1,                                   9}, 
+/*     88     */                       		{0x27,                                       9}, 
+/*     89     */                       		{0x27-1,                                   10}, 
+/*     90     */                       		{0x27,                                       10}, 
+/*     91     */                       		{0x27-1,                                   11}, 
+/*     92     */                       		{0x27,                                       11}, 
+/*     93     */                       		{0x27-1,                                   12}, 
+/*     94     */                       		{0x27,                                       12}, 
+/*     95     */                      		{0x27-1,                                   13}, 
+/*     96     */                       		{0x27,                                       13}, 
+/*     97     */                       		{0x27-1,                                   14}, 
+/*     98     */                       		{0x27,                                       14}, 
+/*     99     */                       		{0x27-1,                                   15}, 
+/*     100   */                        		{0x27,                                       15}, 
+};
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+ULONG TssiRatioTable[][2] = 
+	{
+/*	{numerator,	denominator}	Power delta (dBm)	Ratio		Index */
+	{955,		10000}, 		/* -12			0.0955	0 */
+	{1161, 		10000},		/* -11			0.1161	1 */
+	{1413,		10000}, 		/* -10			0.1413	2 */
+	{1718,		10000},		/* -9			0.1718	3 */
+	{2089, 		10000},		/* -8			0.2089	4 */
+	{2541, 		10000}, 		/* -7 			0.2541	5 */
+	{3090, 		10000}, 		/* -6 			0.3090	6 */
+	{3758, 		10000}, 		/* -5 			0.3758	7 */
+	{4571, 		10000}, 		/* -4 			0.4571	8 */
+	{5559, 		10000}, 		/* -3 			0.5559	9 */
+	{6761, 		10000}, 		/* -2 			0.6761	10 */
+	{8222, 		10000}, 		/* -1 			0.8222	11 */
+	{1, 			1}, 			/* 0	 			1		12 */
+	{12162, 		10000}, 		/* 1				1.2162	13 */
+	{14791, 		10000}, 		/* 2				1.4791	14 */
+	{17989, 		10000}, 		/* 3				1.7989	15 */
+	{21878, 		10000}, 		/* 4				2.1878	16 */
+	{26607, 		10000}, 		/* 5				2.6607	17 */
+	{32359, 		10000}, 		/* 6				3.2359	18 */
+	{39355, 		10000}, 		/* 7				3.9355	19 */
+	{47863, 		10000}, 		/* 8				4.7863	20 */
+	{58210, 		10000}, 		/* 9				5.8210	21 */
+	{70795, 		10000}, 		/* 10			7.0795	22 */
+	{86099, 		10000}, 		/* 11			8.6099	23 */
+	{104713, 		10000}, 		/* 12			10.4713	24 */
+};
+
+
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+
+/* The desired TSSI over CCK (with extended TSSI information) */
+CHAR RT5390_desiredTSSIOverCCKExt[NUM_OF_CH_FOR_PER_CH_TX_PWR_OFFSET + 1][4];
+
+/* The desired TSSI over OFDM (with extended TSSI information) */
+CHAR RT5390_desiredTSSIOverOFDMExt[NUM_OF_CH_FOR_PER_CH_TX_PWR_OFFSET + 1][8];
+
+/* The desired TSSI over HT (with extended TSSI information) */
+CHAR RT5390_desiredTSSIOverHTExt[NUM_OF_CH_FOR_PER_CH_TX_PWR_OFFSET + 1][8];
+
+/* The desired TSSI over HT using STBC (with extended TSSI information) */
+CHAR RT5390_desiredTSSIOverHTUsingSTBCExt[NUM_OF_CH_FOR_PER_CH_TX_PWR_OFFSET + 1][8];
+
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+
+
+/*
+========================================================================
+Routine Description:
+	Initialize RT5390.
+
+Arguments:
+	pAd					- WLAN control block pointer
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RT5390_Init(
+	IN PRTMP_ADAPTER		pAd)
+{
+#ifdef RTMP_INTERNAL_TX_ALC
+	extern TX_POWER_TUNING_ENTRY_STRUCT *TxPowerTuningTable;
+#endif /* RTMP_INTERNAL_TX_ALC */
+	RTMP_CHIP_OP *pChipOps = &pAd->chipOps;
+	RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
+
+
+	/* ??? */
+/*	pAd->RfIcType = RFIC_3320; */
+
+	/* init capability */
+	pChipCap->MaxNumOfRfId = 63;
+	pChipCap->MaxNumOfBbpId = 255;
+	
+	pChipCap->pRFRegTable = RF5390RegTable;
+	if (IS_RT5392(pAd))
+		pChipCap->pRFRegTable = RF5392RegTable;
+		
+	pChipCap->pBBPRegTable = NULL; /* The same with BBPRegTable */
+	pChipCap->bbpRegTbSize = NULL;
+	pChipCap->SnrFormula = SNR_FORMULA3;
+	pChipCap->RfReg17WtMethod = RF_REG_WT_METHOD_STEP_ON;
+	pChipOps->AsicRfInit = NICInitRT5390RFRegisters;
+	pChipOps->AsicHaltAction = RT5390HaltAction;
+	pChipOps->AsicRfTurnOff = RT5390LoadRFSleepModeSetup;
+	pChipOps->AsicReverseRfFromSleepMode = RT5390ReverseRFSleepModeSetup;
+	pChipCap->FlgIsHwWapiSup = TRUE;
+	pChipCap->FlgIsVcoReCalSup = FALSE;/*is RT5390 need to do VCORecalibration ?*/
+	if (IS_RT5370G(pAd) || IS_RT5390R(pAd))
+	{
+		DBGPRINT(RT_DEBUG_OFF, ("\x1b[31m%s: FlgIsHwAntennaDiversitySup --> True\x1b[m\n", __FUNCTION__));
+		pChipCap->FlgIsHwAntennaDiversitySup = TRUE; 
+	}
+	else
+		pChipCap->FlgIsHwAntennaDiversitySup = FALSE; /*Do RT5390 support HwAntennaDiversity  ?*/
+	/* init operator */
+	pChipOps->AsicBbpInit = NICInitRT5390BbpRegisters;
+	pChipOps->AsicMacInit = NICInitRT5390MacRegisters;
+/*	pChipOps->AsicEeBufferInit = RT5390_AsicEeBufferInit; */
+	pChipOps->RxSensitivityTuning = RT5390_RxSensitivityTuning;
+/*	pChipOps->ChipResumeMsduTransmission = RT5390_ChipResumeMsduTransmission;*/
+#ifdef CONFIG_STA_SUPPORT
+	pChipOps->ChipStaBBPAdjust = RT5390_ChipStaBBPAdjust;
+#endif /* CONFIG_STA_SUPPORT */
+	pChipOps->ChipBBPAdjust = RT5390_ChipBBPAdjust;
+	pChipOps->ChipSwitchChannel = RT5390_ChipSwitchChannel;
+
+#ifdef RTMP_INTERNAL_TX_ALC
+	pChipCap->TxAlcTxPowerUpperBound = 61;
+	pChipCap->TxAlcMaxMCS = 7;
+	if (IS_RT5392(pAd))
+		pChipCap->TxAlcMaxMCS = 15;
+	TxPowerTuningTable = RT5390_TxPowerTuningTable;
+
+	pChipOps->InitDesiredTSSITable = RT5390_InitDesiredTSSITable;
+	if (IS_RT5392(pAd))
+	{
+		pChipOps->ATETssiCalibration = NULL;	
+		pChipOps->ATETssiCalibrationExtend = NULL;
+	}
+	else
+	{
+#ifdef RALINK_ATE	
+		pChipOps->ATETssiCalibration = RT5390_ATETssiCalibration;	
+		pChipOps->ATETssiCalibrationExtend = RT5390_ATETssiCalibrationExtend;
+#endif /* RALINK_ATE */		
+	}	
+	pChipOps->AsicTxAlcGetAutoAgcOffset = RT5390_AsicTxAlcGetAutoAgcOffset;
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+#ifdef RTMP_TEMPERATURE_COMPENSATION
+	if (IS_RT5392(pAd))
+		pChipOps->ATEReadExternalTSSI = RT5392_ATEReadExternalTSSI;
+#endif /* RTMP_TEMPERATURE_COMPENSATION */
+
+#ifdef RTMP_FREQ_CALIBRATION_SUPPORT
+#ifdef CONFIG_STA_SUPPORT
+	pChipOps->AsicFreqCalInit = InitFrequencyCalibration;
+	pChipOps->AsicFreqCalStop = StopFrequencyCalibration;
+	pChipOps->AsicFreqCal = FrequencyCalibration;
+	pChipOps->AsicFreqOffsetGet = GetFrequencyOffset;
+#endif /* CONFIG_STA_SUPPORT */
+#endif /* RTMP_FREQ_CALIBRATION_SUPPORT */
+	if (!IS_RT5392(pAd)) /* 1T1R only */
+	{
+		pChipOps->SetRxAnt = RT5390SetRxAnt;
+#ifdef ANT_DIVERSITY_SUPPORT
+		pChipOps->HwAntEnable = HWAntennaDiversityEnable;
+#endif /* ANT_DIVERSITY_SUPPORT */
+#ifdef TXRX_SW_ANTDIV_SUPPORT
+		pChipCap->bTxRxSwAntDiv = FALSE;
+#endif /* TXRX_SW_ANTDIV_SUPPORT */
+
+		pAd->Mlme.bEnableAutoAntennaCheck = FALSE;
+	}
+	pChipOps->RTMPSetAGCInitValue = RT5390_RTMPSetAGCInitValue;
+	pChipOps->AsicResetBbpAgent = RT5390_AsicResetBbpAgent;
+	RtmpChipBcnSpecInit(pAd);
+}
+
+
+
+VOID NICInitRT5390RFRegisters(IN PRTMP_ADAPTER pAd)
+{
+		INT i;
+		ULONG		RfReg = 0, data;
+	/* Init RF calibration */
+	/* Driver should toggle RF R30 bit7 before init RF registers */
+	RT30xxReadRFRegister(pAd, RF_R02, (PUCHAR)&RfReg);
+	RfReg = ((RfReg & ~0x80) | 0x80); /* rescal_en (initiate calbration) */
+	RT30xxWriteRFRegister(pAd, RF_R02, (UCHAR)RfReg);
+		
+	RTMPusecDelay(1000);
+		
+	RfReg = ((RfReg & ~0x80) | 0x00); /* rescal_en (initiate calbration) */
+	RT30xxWriteRFRegister(pAd, RF_R02, (UCHAR)RfReg);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: Initialize the RF registers to the default values", __FUNCTION__));
+		
+	/* Initialize RF register to default value */
+	if (IS_RT5392(pAd))
+	{
+		/* Initialize RF register to default value */
+		for (i = 0; i < NUM_RF_5392_REG_PARMS; i++)
+		{
+#ifdef RT5370 /* For RT5372 */
+			if (RF5392RegTable[i].Register == RF_R23)
+			{
+				RF5392RegTable[i].Value = 0x0f; /* 20101018 update. */
+			}
+			else if (RF5392RegTable[i].Register == RF_R24)
+			{
+				RF5392RegTable[i].Value = 0x3e; /* 20101018 update. */
+			}
+			else if (RF5392RegTable[i].Register == RF_R51)
+			{
+				RF5392RegTable[i].Value = 0x32; /* 20101018 update. */
+			}
+			else if (RF5392RegTable[i].Register == RF_R53)
+			{
+				RF5392RegTable[i].Value = 0x22; /* 20101018 update. */
+			}
+			else if (RF5392RegTable[i].Register == RF_R56)
+			{
+				RF5392RegTable[i].Value = 0xc1; /* 20101018 update. */
+			}
+			else if (RF5392RegTable[i].Register == RF_R59)
+			{
+				RF5392RegTable[i].Value = 0x0f; /* 20101018 update. */
+			}
+#endif /* RT5370 */	
+				RT30xxWriteRFRegister(pAd, RF5392RegTable[i].Register, RF5392RegTable[i].Value);
+		}
+	}
+	else if (IS_RT5390U(pAd))
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("%s: Initialize the RF registers to the default values (5390U)", __FUNCTION__));
+
+		// Initialize RF register to default value
+		for (i = 0; i < NUM_RF_5390U_REG_PARMS; i++)
+		{	
+			RT30xxWriteRFRegister(pAd, RF5390URegTable[i].Register, RF5390URegTable[i].Value);
+		}
+	}
+	else if (IS_RT5390(pAd) && !IS_MINI_CARD(pAd))
+	{
+		/* Initialize RF register to default value */
+	for (i = 0; i < NUM_RF_5390_REG_PARMS; i++)
+	{
+#ifdef RT5370
+			if (IS_RT5390F(pAd) && (RF5390RegTable[i].Register == RF_R06)) /* >= RT5390F */
+			{
+				RF5390RegTable[i].Value = 0xE0;
+			}
+			else if (IS_RT5390F(pAd) && (RF5390RegTable[i].Register == RF_R25)) /* >= RT5390F */
+			{
+				RF5390RegTable[i].Value = 0x80;
+			}
+			else if (IS_RT5390F(pAd) && (RF5390RegTable[i].Register == RF_R40)) /* >= RT5390F */
+			{
+				RF5390RegTable[i].Value = 0x0B;
+			}
+			else if (IS_RT5390F(pAd) && (RF5390RegTable[i].Register == RF_R46)) /* >= RT5390F */
+			{
+				RF5390RegTable[i].Value = 0x73;
+			}
+			else if (IS_RT5390F(pAd) && (RF5390RegTable[i].Register == RF_R53)) /* >= RT5390F */
+			{
+				RF5390RegTable[i].Value = 0x00;
+			}
+			else if (IS_RT5390F(pAd) && (RF5390RegTable[i].Register == RF_R56)) /* >= RT5390F */
+			{
+				RF5390RegTable[i].Value = 0x42;
+			}
+			else if (IS_RT5390F(pAd) && (RF5390RegTable[i].Register == RF_R61)) /* >= RT5390F */
+			{
+				RF5390RegTable[i].Value = 0xD1;
+			}
+#endif /* RT5370 */
+
+		RT30xxWriteRFRegister(pAd, RF5390RegTable[i].Register, RF5390RegTable[i].Value);
+	}
+	}
+
+			/* 
+		        Where to add the following codes?
+			 RT5390BC8, Disable RF_R40 bit[6] to save power consumption
+		*/
+		if (pAd->NicConfig2.field.CoexBit == TRUE)
+		{
+			RT30xxReadRFRegister(pAd, RF_R40, (PUCHAR)&RfReg);
+			RfReg &= (~0x40);
+			RT30xxWriteRFRegister(pAd, RF_R40, (UCHAR)RfReg);
+		}
+		/* Give bbp filter initial value   Moved here from RTMPFilterCalibration( ) */
+	pAd->Mlme.CaliBW20RfR24 = 0x1F;
+	pAd->Mlme.CaliBW40RfR24 = 0x2F; /* Bit[5] must be 1 for BW 40 */
+	/* For RF filter Calibration */
+	/* RTMPFilterCalibration(pAd); */
+
+	/* Initialize RF R27 register, set RF R27 must be behind RTMPFilterCalibration() */
+	if ((pAd->MACVersion & 0xffff) < 0x0211)
+		RT30xxWriteRFRegister(pAd, RF_R27, 0x3);
+
+	/* set led open drain enable */
+	RTMP_IO_READ32(pAd, OPT_14, &data);
+	data |= 0x01;
+	RTMP_IO_WRITE32(pAd, OPT_14, data);
+
+	RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
+	RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0);
+
+	/* set default antenna as main */
+
+	if (!IS_RT5392(pAd)) /* 1T1R only */
+		RT5390SetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
+
+	/* patch RSSI inaccurate issue, due to design change */
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R79, 0x13);
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R80, 0x05);
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R81, 0x33);
+
+	/* enable DC filter */
+	if ((pAd->MACVersion & 0xffff) >= 0x0211)
+	{
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xc0);
+	}
+	/*
+		From RT3071 Power Sequence v1.1 document, the Normal Operation Setting Registers as follow :
+	 	BBP_R138 / RF_R1 / RF_R15 / RF_R17 / RF_R20 / RF_R21.
+		add by johnli, RF power sequence setup, load RF normal operation-mode setup 
+	*/
+	RT5390LoadRFNormalModeSetup(pAd);
+	
+	/* adjust some BBP register contents */
+	/* also can put these BBP registers to pBBPRegTable */
+	
+}
+
+
+#ifdef RTMP_FLASH_SUPPORT
+
+VOID RT5390_AsicEeBufferInit(
+	IN	RTMP_ADAPTER *pAd)
+{
+	extern UCHAR *EeBuffer;
+
+
+	EeBuffer = RT5390_EeBuffer;
+}
+
+#endif /* RTMP_FLASH_SUPPORT */
+
+
+/*
+ Antenna divesity use GPIO3 and EESK pin for control
+ Antenna and EEPROM access are both using EESK pin,
+ Therefor we should avoid accessing EESK at the same time
+ Then restore antenna after EEPROM access
+ The original name of this function is AsicSetRxAnt(), now change to 
+*/
+VOID RT5390SetRxAnt(
+	IN PRTMP_ADAPTER	pAd,
+	IN UCHAR			Ant)
+{
+	UINT32	Value;
+
+	if (/*(!pAd->NicConfig2.field.AntDiversity) || */
+		(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS))	||
+		(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS))	||
+		(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF)) ||
+		(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)))
+	{
+		return;
+	}
+
+	if ((IS_RT5390(pAd)) && (!IS_RT5392(pAd))
+		)
+	{
+		UCHAR BbpValue = 0;
+
+#ifdef TXRX_SW_ANTDIV_SUPPORT
+        /* EEPROM 34h bit 13 = 1, support SW antenna diverity TX/RX boundle switch */
+
+        if (pAd->chipCap.bTxRxSwAntDiv) /* Mini card with TX/RX Diversity (RT5390U) & USB with TX/RX Diversity (RT5370) */
+        {
+            RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R152, &BbpValue);
+            BbpValue = (BbpValue  | 0x80); /* MSB =1 , TX/RX is the same path */
+            RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R152, BbpValue);
+
+
+            if (Ant == 0) /* 0: Main antenna */
+            {
+                RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &Value);
+                DBGPRINT(RT_DEBUG_ERROR, ("AsicSetRxTxAnt, before switch to main antenna(%X)\n", Value));
+                Value &= ~(0x04000808); /* GPIO3 = 0, GIPO10 = 1 */
+                Value |= (0x00040000);
+                RTMP_IO_WRITE32(pAd, GPIO_CTRL_CFG, Value);
+                DBGPRINT(RT_DEBUG_ERROR, ("AsicSetRxTxAnt, after switch to main antenna(%X)\n", Value));
+            }
+            else if (Ant == 1) /* 1: Aux. antenna */
+            {
+                RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &Value);
+                DBGPRINT(RT_DEBUG_ERROR, ("AsicSetRxTxAnt, before switch to aux antenna(%X)\n", Value));
+                Value &= ~(0x04040800); /* GPIO3 = 1, GIPO10 = 0 */
+                Value |= (0x8);
+                RTMP_IO_WRITE32(pAd, GPIO_CTRL_CFG, Value);
+                DBGPRINT(RT_DEBUG_ERROR, ("AsicSetRxTxAnt, after switch to aux antenna(%X)\n", Value));
+            }
+        }else
+#endif  /* TXRX_SW_ANTDIV_SUPPORT */
+
+		if (IS_RT5370G(pAd) || IS_RT5390R(pAd)) /*PPAD support */
+		{
+    		/* For PPAD Debug, BBP R153[7] = 1 --> Main Ant, R153[7] = 0 --> Aux Ant */
+			if (Ant == 0)
+			{
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R150, 0x00); // Disable ANTSW_OFDM		
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R151, 0x00); // Disable ANTSW_CCK			
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R152, 0x80); // Main Ant				
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R154, 0x00); // Clear R154[4], Rx Ant is not bound to the previous rx packet selected Ant
+
+				DBGPRINT(RT_DEBUG_OFF, ("\x1b[31m%s: rt5370G/rt5390R --> switch to main\x1b[m\n", __FUNCTION__));
+			}
+			else
+			{
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R150, 0x00); // Disable ANTSW_OFDM		
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R151, 0x00); // Disable ANTSW_CCK			
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R152, 0x00); // Aux Ant				
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R154, 0x00); // Clear R154[4], Rx Ant is not bound to the previous rx packet selected Ant
+				DBGPRINT(RT_DEBUG_OFF, ("\x1b[31m%s: rt5370G/rt5390R --> switch to aux\x1b[m\n", __FUNCTION__));
+			}
+			
+			
+		}	
+		else
+		{
+			if (Ant == 0) /* 0: Main antenna */
+			{
+				RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R152, &BbpValue);
+				BbpValue = ((BbpValue & ~0x80) | (0x80));
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R152, BbpValue);
+
+				DBGPRINT(RT_DEBUG_OFF, ("AsicSetRxAnt, switch to main antenna\n"));
+			}
+			else /* 1: Aux. antenna */
+			{
+				RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R152, &BbpValue);
+				BbpValue = ((BbpValue & ~0x80) | (0x00));
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R152, BbpValue);
+
+				DBGPRINT(RT_DEBUG_OFF, ("AsicSetRxAnt, switch to aux. antenna\n"));
+			}
+		}	
+	}
+}
+
+/*
+	add by johnli, RF power sequence setup
+
+	==========================================================================
+	Description:
+
+	Load RF normal operation-mode setup
+	
+	==========================================================================
+ */
+VOID RT5390LoadRFNormalModeSetup(
+	IN PRTMP_ADAPTER 	pAd)
+{
+	UCHAR RFValue, bbpreg = 0;
+
+	/* improve power consumption */
+	RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R138, &bbpreg);
+	if (pAd->Antenna.field.TxPath == 1)
+	{
+		/* turn off tx DAC_1 */
+		bbpreg = (bbpreg | 0x20);
+	}
+	if (pAd->Antenna.field.RxPath == 1)
+	{
+		/* turn off tx ADC_1 */
+		bbpreg &= (~0x2);
+	}
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R138, bbpreg);
+	
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+	if (IS_RT5390(pAd))
+	{
+		
+		RT30xxReadRFRegister(pAd, RF_R38, (PUCHAR)&RFValue);
+		RFValue = ((RFValue & ~0x20) | 0x00); /* rx_lo1_en (enable RX LO1, 0: LO1 follows TR switch) */
+		RT30xxWriteRFRegister(pAd, RF_R38, (UCHAR)RFValue);
+
+		RT30xxReadRFRegister(pAd, RF_R39, (PUCHAR)&RFValue);
+		RFValue = ((RFValue & ~0x80) | 0x00); /* rx_lo2_en (enable RX LO2, 0: LO2 follows TR switch) */
+		RT30xxWriteRFRegister(pAd, RF_R39, (UCHAR)RFValue);
+
+		
+		/* Avoid data lost and CRC error */
+		
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &bbpreg);
+		bbpreg = ((bbpreg & ~0x40) | 0x40); /* MAC interface control (MAC_IF_80M, 1: 80 MHz) */
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, bbpreg);
+
+		RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RFValue);
+		RFValue = ((RFValue & ~0x18) | 0x10); /* rxvcm (Rx BB filter VCM) */
+		RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RFValue);
+	}
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+	
+}
+
+/*
+	==========================================================================
+	Description:
+
+	Load RF sleep-mode setup
+	
+	==========================================================================
+ */
+VOID RT5390LoadRFSleepModeSetup(
+	IN PRTMP_ADAPTER 	pAd)
+{
+	UCHAR RFValue;
+	UINT32 MACValue;
+
+
+	if (IS_RT5390(pAd))
+	{
+		UCHAR	rfreg;
+		
+		RT30xxReadRFRegister(pAd, RF_R01, &rfreg);
+		rfreg = ((rfreg & ~0x01) | 0x00); /* vco_en */
+		RT30xxWriteRFRegister(pAd, RF_R01, rfreg);
+
+		RT30xxReadRFRegister(pAd, RF_R06, &rfreg);
+		rfreg = ((rfreg & ~0xC0) | 0x00); /* vco_ic (VCO bias current control, 00: off) */
+		RT30xxWriteRFRegister(pAd, RF_R06, rfreg);
+
+		RT30xxReadRFRegister(pAd, RF_R22, &rfreg);
+		rfreg = ((rfreg & ~0xE0) | 0x00); /* cp_ic (reference current control, 000: 0.25 mA) */
+		RT30xxWriteRFRegister(pAd, RF_R22, rfreg);
+
+		RT30xxReadRFRegister(pAd, RF_R42, &rfreg);
+		rfreg = ((rfreg & ~0x40) | 0x00); /* rx_ctb_en */
+		RT30xxWriteRFRegister(pAd, RF_R42, rfreg);
+
+		RT30xxReadRFRegister(pAd, RF_R20, &rfreg);
+		rfreg = ((rfreg & ~0x77) | 0x77); /* ldo_pll_vc and ldo_rf_vc (111: -0.15) */
+		RT30xxWriteRFRegister(pAd, RF_R20, rfreg);
+	}
+		
+	/* Don't touch LDO_CFG0 for 3090F & 3593, possibly the board is single power scheme */
+
+	RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue);
+	MACValue |= 0x1D000000;
+	RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue);
+	
+}
+
+VOID RT5390HaltAction(
+	IN PRTMP_ADAPTER 	pAd)
+{
+	UINT32		TxPinCfg = 0x00050F0F;
+
+	
+	/* Turn off LNA_PE or TRSW_POL */
+	
+	
+	if ( IS_RT5390(pAd)
+#ifdef RTMP_EFUSE_SUPPORT
+		&& (pAd->bUseEfuse)
+#endif /* RTMP_EFUSE_SUPPORT */
+		)
+	{
+		TxPinCfg &= 0xFFFBF0F0; /* bit18 off */
+	}
+	else
+	{
+		TxPinCfg &= 0xFFFFF0F0;
+	}
+
+	RTMP_IO_WRITE32(pAd, TX_PIN_CFG, TxPinCfg);   
+	
+}
+
+
+/*
+	==========================================================================
+	Description:
+
+	Reverse RF sleep-mode setup
+	
+	==========================================================================
+ */
+VOID RT5390ReverseRFSleepModeSetup(
+	IN PRTMP_ADAPTER 	pAd,
+	IN BOOLEAN			FlgIsInitState)
+{
+	UCHAR RFValue;
+	UINT32 MACValue;
+
+
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+		if (IS_RT5390(pAd))
+		{
+				UCHAR	rfreg;
+				
+				RT30xxReadRFRegister(pAd, RF_R01, &rfreg);
+				if (IS_RT5392(pAd))
+				{
+					rfreg = ((rfreg & ~0x3F) | 0x3F);
+				}
+				else
+				{
+				rfreg = ((rfreg & ~0x0F) | 0x0F); /* Enable rf_block_en, pll_en, rx0_en and tx0_en */
+				}
+				RT30xxWriteRFRegister(pAd, RF_R01, rfreg);
+
+				RT30xxReadRFRegister(pAd, RF_R06, &rfreg);
+				if (IS_RT5390F(pAd) || IS_RT5392C(pAd))
+				{
+					rfreg = ((rfreg & ~0xC0) | 0xC0); /* vco_ic (VCO bias current control, 11: high) */
+				}
+				else
+				{
+				rfreg = ((rfreg & ~0xC0) | 0x80); /* vco_ic (VCO bias current control, 10: mid.) */
+				}
+				RT30xxWriteRFRegister(pAd, RF_R06, rfreg);
+				
+				RT30xxReadRFRegister(pAd, RF_R02, &rfreg);
+				rfreg = ((rfreg & ~0x80) | 0x80); /* rescal_en (initiate calibration) */
+				RT30xxWriteRFRegister(pAd, RF_R02, rfreg);
+
+				RT30xxReadRFRegister(pAd, RF_R22, &rfreg);
+				rfreg = ((rfreg & ~0xE0) | 0x20); /* cp_ic (reference current control, 001: 0.33 mA) */
+				RT30xxWriteRFRegister(pAd, RF_R22, rfreg);
+
+				RT30xxReadRFRegister(pAd, RF_R42, &rfreg);
+				rfreg = ((rfreg & ~0x40) | 0x40); /* rx_ctb_en */
+				RT30xxWriteRFRegister(pAd, RF_R42, rfreg);
+				RT30xxReadRFRegister(pAd, RF_R20, &rfreg);
+				rfreg = ((rfreg & ~0x77) | 0x00); /* ldo_rf_vc and ldo_pll_vc ( 111: +0.15) */
+				RT30xxWriteRFRegister(pAd, RF_R20, rfreg);
+				RT30xxReadRFRegister(pAd, RF_R03, &rfreg);
+				rfreg = ((rfreg & ~0x80) | 0x80); /* vcocal_en (initiate VCO calibration (reset after completion)) */
+				RT30xxWriteRFRegister(pAd, RF_R03, rfreg);
+				
+			
+		}
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+		/* RT3071 version E has fixed this issue */
+		if ((pAd->NicConfig2.field.DACTestBit == 1) && ((pAd->MACVersion & 0xffff) < 0x0211))
+		{
+			// patch tx EVM issue temporarily
+			RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue);
+			MACValue = ((MACValue & 0xE0FFFFFF) | 0x0D000000);
+			RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue);
+		}
+
+
+}
+/* end johnli*/
+
+VOID RT5390_RxSensitivityTuning(
+	IN PRTMP_ADAPTER			pAd)
+{
+
+/*How to tuning rxsensitivity ?*/	
+//	DBGPRINT(RT_DEBUG_TRACE,("turn off R17 tuning, restore to 0x%02x\n", R66));
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Initialize specific MAC registers.
+
+Arguments:
+	pAd					- WLAN control block pointer
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID NICInitRT5390MacRegisters(
+	IN	PRTMP_ADAPTER pAd)
+{
+	UINT32 IdReg;
+
+
+	for(IdReg=0; IdReg<RT5390_NUM_MAC_REG_PARMS; IdReg++)
+	{
+		RTMP_IO_WRITE32(pAd, RT5390_MACRegTable[IdReg].Register,
+								RT5390_MACRegTable[IdReg].Value);
+	}
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Initialize specific BBP registers.
+
+Arguments:
+	pAd					- WLAN control block pointer
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID NICInitRT5390BbpRegisters(
+	IN	PRTMP_ADAPTER pAd)
+{
+	UCHAR BbpReg = 0;
+	BBP_R105_STRUC BBPR105 = { { 0 } };
+/*	BBP_R106_STRUC BBPR106 = { { 0 } }; */
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("--> %s\n", __FUNCTION__));
+
+	
+	/*  The channel estimation updates based on remodulation of L-SIG and HT-SIG symbols. */
+	
+	RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R105, &BBPR105.byte);
+	
+	 /* Apply Maximum Likelihood Detection (MLD) for 2 stream case (reserved field if single RX) */
+	
+	{
+	if (pAd->Antenna.field.RxPath == 1) /* Single RX */
+	{
+		BBPR105.field.MLDFor2Stream = 0;
+	}
+	else
+	{
+		BBPR105.field.MLDFor2Stream = 1;
+	}
+	}
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R105, BBPR105.byte);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: BBP_R105: BBPR105.field.EnableSIGRemodulation = %d, BBPR105.field.MLDFor2Stream = %d\n", 
+		__FUNCTION__, 
+		BBPR105.field.EnableSIGRemodulation, 
+		BBPR105.field.MLDFor2Stream));
+
+	{
+		/*   Avoid data lost and CRC error */		
+		
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BbpReg);
+		BbpReg = ((BbpReg & ~0x40) | 0x40); /* MAC interface control (MAC_IF_80M, 1: 80 MHz) */
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BbpReg);
+
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R31, 0x08); /* ADC/DAC contro */
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R68, 0x0B); /* Rx AGC energy lower bound in log2 */
+		
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A); /* Rx AGC SQ CCK Xcorr threshold */
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x13); /* Rx AGC SQ ACorr threshold */
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x46); /* Rx high power VGA offset for LNA offset */
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R76, 0x28); /* Rx medium power VGA offset for LNA offset */
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R77, 0x59); /* Rx high/medium power threshold in log2 */
+		
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0x62); /* Rx AGC LNA select threshold in log2 */
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R83, 0x7A); /* Rx AGC LNA MM select threshold in log2 */
+		
+		if (IS_RT5392(pAd))
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x9A); /* Rx AGC VGA/LNA delay */
+		else
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19); /* Rx AGC VGA/LNA delay */
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0x38); /* Rx AGC high gain threshold in dB */
+		
+		if (IS_RT5392(pAd))
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R88, 0x90); // 2011-0503, add this register
+		
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R91, 0x04); /* Guard interval delay counter for 20M band */
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R92, 0x02); /* Guard interval delay counter for 40M band */
+
+		if (IS_RT5392(pAd))
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R95, 0x9A); /* CCK MRC decode */
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R98, 0x12); /* TX CCK higher gain */ 
+		}
+
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xC0); /* Rx - 11b adaptive equalizer gear down control and signal energy average period */
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R104, 0x92); /* SIGN detection threshold/GF CDD control */
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R105, 0x3C); /* FEQ control */
+
+		if (IS_RT5392(pAd))
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R106, 0x12); /* GI remover 2011-0513, from 05 to 12*/
+		else			
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R106, 0x03); /* GI remover */
+
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R128, 0x12); /* R/W remodulation control */
+		
+		if (IS_RT5392(pAd))
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R134, 0xD0); /* TX CCK higher gain */
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R135, 0xF6); /* TX CCK higher gain */ 
+		}
+		
+
+
+
+	}
+
+
+
+
+	
+
+	if (!IS_RT5392(pAd))
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R154, 0x0); /* Disable HW Antenna Diversity (5390/5370 only) */
+	DBGPRINT(RT_DEBUG_TRACE, ("<-- %s\n", __FUNCTION__));
+}
+#ifdef CONFIG_STA_SUPPORT
+/*
+	==========================================================================
+	Description:
+		dynamic tune BBP R66 to find a balance between sensibility and 
+		noise isolation
+
+	IRQL = DISPATCH_LEVEL
+
+	==========================================================================
+ */
+UCHAR RT5390_ChipStaBBPAdjust(
+	IN PRTMP_ADAPTER		pAd,
+	IN CHAR					Rssi,
+	IN UCHAR				R66)
+{
+	UCHAR	OrigR66Value = 0;/* R66UpperBound = 0x30, R66LowerBound = 0x30; */
+	
+	/* work as a STA */
+	
+	if (pAd->Mlme.CntlMachine.CurrState != CNTL_IDLE)  /* no R66 tuning when SCANNING */
+		return 0;
+
+	if ((pAd->OpMode == OPMODE_STA) 
+		&& (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED)
+			)
+		&& !(OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE))
+		)
+	{
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R66, &OrigR66Value);
+		R66 = OrigR66Value;
+		if (pAd->Antenna.field.RxPath > 1)
+			Rssi = (pAd->StaCfg.RssiSample.AvgRssi0 + pAd->StaCfg.RssiSample.AvgRssi1) >> 1;
+		else
+			Rssi = pAd->StaCfg.RssiSample.AvgRssi0;
+	
+		if (pAd->LatchRfRegs.Channel <= 14)
+		{	/* BG band */
+
+			/* RT3070 is a no LNA solution, it should have different control regarding to AGC gain control */
+			/* Otherwise, it will have some throughput side effect when low RSSI */
+			
+			{
+				if (Rssi > RSSI_FOR_MID_LOW_SENSIBILITY)
+				{
+					R66 = 0x1C + 2*GET_LNA_GAIN(pAd) + 0x20;
+					if (OrigR66Value != R66)
+					{
+						if (IS_RT5390(pAd))
+						{
+							if (IS_RT5392(pAd))
+								RT5392WriteBBPR66(pAd, R66);
+							else	
+								RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
+							
+							RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R83, 0x4A);
+						}				
+						else
+							RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);		
+					}
+				}
+				else
+				{
+					R66 = 0x1C + 2*GET_LNA_GAIN(pAd);
+					if (OrigR66Value != R66)
+					{
+						if (IS_RT5390(pAd))
+						{
+							if (IS_RT5392(pAd))
+								RT5392WriteBBPR66(pAd, R66);
+							else	
+								RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
+							
+							RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R83, 0x7A);
+
+						}	
+						else
+							RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
+					}
+				}
+			}
+		}
+
+		return R66;
+	}
+	return 0;
+}
+#endif // CONFIG_STA_SUPPORT //
+
+VOID RT5390_ChipBBPAdjust(
+	IN RTMP_ADAPTER			*pAd)
+{
+	UINT32 Value;
+	UCHAR byteValue = 0;
+
+#ifdef DOT11_N_SUPPORT
+	if ((pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth  == BW_40) && 
+		(pAd->CommonCfg.RegTransmitSetting.field.EXTCHA == EXTCHA_ABOVE)
+		/*(pAd->CommonCfg.AddHTInfo.AddHtInfo.ExtChanOffset == EXTCHA_ABOVE)*/
+	)
+	{
+		{
+		pAd->CommonCfg.BBPCurrentBW = BW_40;
+		pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel + 2;
+		}
+		/* TX : control channel at lower */ 
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
+		Value &= (~0x1);
+		RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
+
+		/*  RX : control channel at lower */ 
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &byteValue);
+		byteValue &= (~0x20);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, byteValue);
+
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &byteValue);
+		byteValue &= (~0x18);
+		byteValue |= 0x10;
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, byteValue);
+
+		if (pAd->CommonCfg.Channel > 14)
+		{ 	/* request by Gary 20070208 for middle and long range A Band */
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, 0x48);
+		}
+		else
+		{	/* request by Gary 20070208 for middle and long range G Band */
+			if (IS_RT5392(pAd))
+					RT5392WriteBBPR66(pAd, 0x38);
+			else	
+					RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, 0x38);
+		}	 
+		if (pAd->MACVersion == 0x28600100)
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
+		}
+		else
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x12);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x10);
+		}	
+
+		DBGPRINT(RT_DEBUG_TRACE, ("ApStartUp : ExtAbove, ChannelWidth=%d, Channel=%d, ExtChanOffset=%d(%d) \n",
+									pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth, 
+									pAd->CommonCfg.Channel, 
+									pAd->CommonCfg.RegTransmitSetting.field.EXTCHA,
+									pAd->CommonCfg.AddHTInfo.AddHtInfo.ExtChanOffset));
+	}
+	else if ((pAd->CommonCfg.Channel > 2) && 
+			(pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth  == BW_40) && 
+			(pAd->CommonCfg.RegTransmitSetting.field.EXTCHA == EXTCHA_BELOW)
+			/*(pAd->CommonCfg.AddHTInfo.AddHtInfo.ExtChanOffset == EXTCHA_BELOW)*/)
+	{
+		pAd->CommonCfg.BBPCurrentBW = BW_40;
+
+		if (pAd->CommonCfg.Channel == 14)
+			pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel - 1;
+		else
+			pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel - 2;
+		/*  TX : control channel at upper */ 
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
+		Value |= (0x1);		
+		RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
+
+		/*  RX : control channel at upper */
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &byteValue);
+		byteValue |= (0x20);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, byteValue);
+
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &byteValue);
+		byteValue &= (~0x18);
+		byteValue |= 0x10;
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, byteValue);
+		
+		if (pAd->CommonCfg.Channel > 14)
+		{ 	/* request by Gary 20070208 for middle and long range A Band */
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, 0x48);
+		}
+		else
+		{ 	/* request by Gary 20070208 for middle and long range G band */
+			if (IS_RT5392(pAd))
+				RT5392WriteBBPR66(pAd, 0x38);
+			else	
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, 0x38);
+		}	
+			
+		if (pAd->MACVersion == 0x28600100)
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
+		}
+		else
+		{	
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x12);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x10);
+		}
+		DBGPRINT(RT_DEBUG_TRACE, ("ApStartUp : ExtBlow, ChannelWidth=%d, Channel=%d, ExtChanOffset=%d(%d) \n",
+									pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth, 
+									pAd->CommonCfg.Channel, 
+									pAd->CommonCfg.RegTransmitSetting.field.EXTCHA,
+									pAd->CommonCfg.AddHTInfo.AddHtInfo.ExtChanOffset));
+	}
+	else
+#endif /* DOT11_N_SUPPORT */
+	{
+		pAd->CommonCfg.BBPCurrentBW = BW_20;
+		pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel;
+		
+		/*  TX : control channel at lower */ 
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
+		Value &= (~0x1);
+		RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
+
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &byteValue);
+		byteValue &= (~0x18);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, byteValue);
+		
+		/* 20 MHz bandwidth */
+ 		if (pAd->CommonCfg.Channel > 14)
+		{	 /* request by Gary 20070208 */
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, 0x40);
+		}	
+		else
+		{	/* request by Gary 20070208 */
+			/* RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, 0x30); */
+			/* request by Brian 20070306 */
+			if (IS_RT5392(pAd))
+				RT5392WriteBBPR66(pAd, 0x38);
+			else	
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, 0x38);
+		}	
+				 		if (pAd->MACVersion == 0x28600100)
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x08);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x11);
+		}
+		else
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x12);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0a);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x10);
+		}
+
+#ifdef DOT11_N_SUPPORT
+		DBGPRINT(RT_DEBUG_TRACE, ("ApStartUp : 20MHz, ChannelWidth=%d, Channel=%d, ExtChanOffset=%d(%d) \n",
+										pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth, 
+										pAd->CommonCfg.Channel, 
+										pAd->CommonCfg.RegTransmitSetting.field.EXTCHA,
+										pAd->CommonCfg.AddHTInfo.AddHtInfo.ExtChanOffset));
+#endif /* DOT11_N_SUPPORT */
+	}
+	
+	if (pAd->CommonCfg.Channel > 14)
+	{	/* request by Gary 20070208 for middle and long range A Band */
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, 0x1D);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, 0x1D);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, 0x1D);
+		/* RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0x1D); */
+	}
+	else
+	{ 	/* request by Gary 20070208 for middle and long range G band */
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, 0x2D);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, 0x2D);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, 0x2D);
+			/* RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0x2D); */
+	}	
+
+}
+
+VOID RT5390_ChipSwitchChannel(
+	IN PRTMP_ADAPTER 			pAd,
+	IN UCHAR					Channel,
+	IN BOOLEAN					bScan) 
+{
+	CHAR    TxPwer = 0, TxPwer2 = DEFAULT_RF_TX_POWER; /* Bbp94 = BBPR94_DEFAULT, TxPwer2 = DEFAULT_RF_TX_POWER; */
+	UCHAR	index;
+	UINT32 	Value = 0; /* BbpReg, Value; */
+	UCHAR 	RFValue;
+#ifdef DOT11N_SS3_SUPPORT
+	CHAR    TxPwer3 = 0;
+#endif /* DOT11N_SS3_SUPPORT */
+
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+       UCHAR Tx0FinePowerCtrl = 0, Tx1FinePowerCtrl = 0;
+       BBP_R109_STRUC BbpR109 = {{0}};
+	BBP_R110_STRUC BbpR110 = {{0}};
+	UCHAR TxRxh20M = 0;
+	UCHAR PreRFValue = 0;
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+
+
+
+	RFValue = 0;
+	/* Search Tx power value */
+
+
+	/*
+		We can't use ChannelList to search channel, since some central channl's txpowr doesn't list 
+		in ChannelList, so use TxPower array instead.
+	*/
+	for (index = 0; index < MAX_NUM_OF_CHANNELS; index++)
+	{
+		if (Channel == pAd->TxPower[index].Channel)
+		{
+			TxPwer = pAd->TxPower[index].Power;
+			TxPwer2 = pAd->TxPower[index].Power2;
+#ifdef DOT11N_SS3_SUPPORT
+			if (IS_RT2883(pAd) || IS_RT3593(pAd) || IS_RT3883(pAd))
+		    	TxPwer3 = pAd->TxPower[index].Power3;
+#endif /* DOT11N_SS3_SUPPORT */
+
+
+			if (IS_RT5390(pAd))/*&&
+				//(pAd->infType == RTMP_DEV_INF_PCI || pAd->infType == RTMP_DEV_INF_PCIE))*/
+			{
+				Tx0FinePowerCtrl = pAd->TxPower[index].Tx0FinePowerCtrl;
+				Tx1FinePowerCtrl = pAd->TxPower[index].Tx1FinePowerCtrl;
+			}
+
+			break;
+		}
+	}
+
+
+	if (index == MAX_NUM_OF_CHANNELS)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("AsicSwitchChannel: Can't find the Channel#%d \n", Channel));
+	}
+
+
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+	if (IS_RT5390(pAd))
+	{	
+		for (index = 0; index < NUM_OF_3020_CHNL; index++)
+		{
+
+			if (Channel == FreqItems3020[index].Channel)
+			{
+				/* Programming channel parameters */
+				RT30xxWriteRFRegister(pAd, RF_R08, FreqItems3020[index].N); /* N */
+				RT30xxWriteRFRegister(pAd, RF_R09, (FreqItems3020[index].K & 0x0F)); /* K, N<11:8> is set to zero */
+
+				RT30xxReadRFRegister(pAd, RF_R11, (PUCHAR)&RFValue);
+				RFValue = ((RFValue & ~0x03) | (FreqItems3020[index].R & 0x03)); /* R */
+				RT30xxWriteRFRegister(pAd, RF_R11, (UCHAR)RFValue);
+
+				RT30xxReadRFRegister(pAd, RF_R49, (PUCHAR)&RFValue);
+				RFValue = ((RFValue & ~0x3F) | (TxPwer & 0x3F)); /* tx0_alc */
+
+				if ((RFValue & 0x3F) > 0x27) /* The valid range of the RF R49 (<5:0>tx0_alc<5:0>) is 0x00~0x27 */
+				{
+					RFValue = ((RFValue & ~0x3F) | 0x27);
+				}
+
+				RT30xxWriteRFRegister(pAd, RF_R49, (UCHAR)RFValue);
+
+				if (IS_RT5392(pAd))
+				{
+					RT30xxReadRFRegister(pAd, RF_R50, &RFValue);
+					RFValue = ((RFValue & ~0x3F) | (TxPwer2 & 0x3F)); /* tx0_alc */
+					
+					if ((RFValue & 0x3F) > 0x27) // The valid range of the RF R49 (<5:0>tx0_alc<5:0>) is 0x00~0x27
+					{
+						RFValue = ((RFValue & ~0x3F) | 0x27);
+					}
+					
+					RT30xxWriteRFRegister(pAd, RF_R50, RFValue);
+				}
+
+				RT30xxReadRFRegister(pAd, RF_R01, (PUCHAR)&RFValue);
+
+				if (IS_RT5392(pAd))
+				{
+					RFValue = ((RFValue & ~0x3F) | 0x3F);
+				}
+				else
+
+				{
+				RFValue = ((RFValue & ~0x0F) | 0x0F); /* Enable rf_block_en, pll_en, rx0_en and tx0_en */
+				}
+				RT30xxWriteRFRegister(pAd, RF_R01, (UCHAR)RFValue);
+				          RT30xxReadRFRegister(pAd, RF_R02, (PUCHAR)&RFValue);
+                                RFValue |= 0x80;
+                                RT30xxWriteRFRegister(pAd, RF_R02, (UCHAR)RFValue);
+                                RTMPusecDelay(1000);
+                                RFValue &= 0x7F;
+                                RT30xxWriteRFRegister(pAd, RF_R02, (UCHAR)RFValue);   
+#ifdef CONFIG_STA_SUPPORT
+#ifdef RTMP_FREQ_CALIBRATION_SUPPORT
+				if (pAd->FreqCalibrationCtrl.bEnableFrequencyCalibration == TRUE)
+				{
+				        if (INFRA_ON(pAd)) /* Update the frequency offset from the adaptive frequency offset */
+					{
+						RT30xxReadRFRegister(pAd, RF_R17, (PUCHAR)&RFValue);
+						PreRFValue = RFValue;
+						RFValue = ((RFValue & ~0x7F) | (pAd->FreqCalibrationCtrl.AdaptiveFreqOffset & 0x7F)); /* xo_code (C1 value control) - Crystal calibration */
+						RFValue = min(RFValue, 0x5F);
+						if (PreRFValue != RFValue)
+						{
+							AsicSendCommandToMcu(pAd, 0x74, 0xff, RFValue, PreRFValue);
+						}
+					}
+					else /* Update the frequency offset from EEPROM */
+					{
+						RT30xxReadRFRegister(pAd, RF_R17, (PUCHAR)&RFValue);
+						PreRFValue = RFValue;
+						RFValue = ((RFValue & ~0x7F) | (pAd->RfFreqOffset & 0x7F)); /* xo_code (C1 value control) - Crystal calibration */
+						RFValue = min(RFValue, 0x5F);
+						if (PreRFValue != RFValue)
+						{
+							AsicSendCommandToMcu(pAd, 0x74, 0xff, RFValue, PreRFValue);
+						}
+					}
+				}
+				else
+#endif /* RTMP_FREQ_CALIBRATION_SUPPORT */					
+#endif /* CONFIG_STA_SUPPORT */					
+				{
+					RT30xxReadRFRegister(pAd, RF_R17, (PUCHAR)&RFValue);
+					PreRFValue = RFValue;
+					RFValue = ((RFValue & ~0x7F) | (pAd->RfFreqOffset & 0x7F)); /* xo_code (C1 value control) - Crystal calibration */
+					RFValue = min(RFValue, 0x5F);
+					if (PreRFValue != RFValue)
+					{
+						AsicSendCommandToMcu(pAd, 0x74, 0xff, RFValue, PreRFValue);
+					}
+				}
+
+				if ((!bScan) && (pAd->CommonCfg.BBPCurrentBW == BW_40)) /* BW 40 */
+				{
+					TxRxh20M = ((pAd->Mlme.CaliBW40RfR24 & 0x20) >> 5); /* Tx/Rx h20M */
+				}
+				else // BW 20
+				{
+					TxRxh20M = ((pAd->Mlme.CaliBW20RfR24 & 0x20) >> 5); /* Tx/Rx h20M */
+				}
+#ifdef RT5370
+				if (IS_RT5392(pAd))
+				{
+					if ((Channel >= 1) && (Channel <= 11)) // chanel 1~10
+					{
+						RT30xxWriteRFRegister(pAd, RF_R59, 0x0F);
+					}
+					else if ((Channel >= 12) && (Channel <= 14)) // channel 11~14
+					{
+						RT30xxWriteRFRegister(pAd, RF_R59, 0x0B);
+					}
+				}
+				else if (IS_RT5390U(pAd))
+				{
+					if ((Channel >= 1) && (Channel <= 4))
+					{
+						RT30xxWriteRFRegister(pAd, RF_R55, 0x23); // txvga_cc and pa1_cc_cck
+					}
+					else if ((Channel >= 5) && (Channel <= 6))
+					{
+						RT30xxWriteRFRegister(pAd, RF_R55, 0x13); // txvga_cc and pa1_cc_cck
+					}
+					else if ((Channel >= 7) && (Channel <= 14))
+					{
+						RT30xxWriteRFRegister(pAd, RF_R55, 0x03); // txvga_cc and pa1_cc_cck
+					}			
+
+					if ((Channel >= 1) && (Channel <= 10))
+					{
+						RT30xxWriteRFRegister(pAd, RF_R59, 0x07); // pa2_cc_ofdm and pa1_cc_ofdm
+					}
+					else if (Channel == 11)
+					{
+						RT30xxWriteRFRegister(pAd, RF_R59, 0x06); // pa2_cc_ofdm and pa1_cc_ofdm
+					}
+					else if (Channel == 12)
+					{
+						RT30xxWriteRFRegister(pAd, RF_R59, 0x05); // pa2_cc_ofdm and pa1_cc_ofdm
+					}
+					else if ((Channel >= 13) && (Channel <= 14))
+					{
+						RT30xxWriteRFRegister(pAd, RF_R59, 0x04); // pa2_cc_ofdm and pa1_cc_ofdm
+					}
+
+				}
+
+				/* For RT5370F support */
+/*				else if (IS_RT5390F(pAd)) */
+				else if (IS_RT5390F(pAd) && !IS_MINI_CARD(pAd))
+				{
+					if ((Channel >= 1) && (Channel <= 11))
+					{
+						RT30xxWriteRFRegister(pAd, RF_R55, 0x43); /* txvga_cc and pa1_cc_cck */
+					}
+					else if ((Channel >= 12) && (Channel <= 14))
+					{
+						RT30xxWriteRFRegister(pAd, RF_R55, 0x23); /* txvga_cc and pa1_cc_cck */
+					}
+
+					if ((Channel >= 1) && (Channel <= 11))
+					{
+						RT30xxWriteRFRegister(pAd, RF_R59, 0x0F); /* pa2_cc_ofdm and pa1_cc_ofdm */
+					}
+					else if (Channel == 12)
+					{
+						RT30xxWriteRFRegister(pAd, RF_R59, 0x0D); /* pa2_cc_ofdm and pa1_cc_ofdm */
+					}
+					else if ((Channel >= 13) && (Channel <= 14))
+					{
+						RT30xxWriteRFRegister(pAd, RF_R59, 0x0B); /* pa2_cc_ofdm and pa1_cc_ofdms */
+					}
+				}
+				else
+#endif /* RT5370 */
+				RFValue=0;
+				RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RFValue);
+				RFValue = ((RFValue & ~0x06) | (TxRxh20M << 1) | (TxRxh20M << 2)); /* tx_h20M and rx_h20M */
+				RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RFValue);
+
+				RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RFValue);
+				RFValue = ((RFValue & ~0x18) | 0x10); /* rxvcm (Rx BB filter VCM) */
+				RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RFValue);
+
+				RT30xxReadRFRegister(pAd, RF_R03, (PUCHAR)&RFValue);
+				RFValue = ((RFValue & ~0x80) | 0x80); /* vcocal_en (initiate VCO calibration (reset after completion)) - It should be at the end of RF configuration. */
+				RT30xxWriteRFRegister(pAd, RF_R03, (UCHAR)RFValue);					
+				pAd->LatchRfRegs.Channel = Channel; /* Channel latch */
+
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: 5390: SwitchChannel#%d(RF=%d, Pwr0=%d, Pwr1=%d, %dT), N=0x%02X, K=0x%02X, R=0x%02X\n",
+					__FUNCTION__, 
+					Channel, 
+					pAd->RfIcType, 
+					TxPwer, 
+					TxPwer2, 
+					pAd->Antenna.field.TxPath, 
+					FreqItems3020[index].N, 
+					FreqItems3020[index].K, 
+					FreqItems3020[index].R));
+
+				break;
+			}
+		}
+	}
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+
+	/* Change BBP setting during siwtch from a->g, g->a */
+	if (Channel <= 14)
+	{
+		ULONG	TxPinCfg = 0x00050F0A;/* Gary 2007/08/09 0x050A0A */
+
+
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, (0x37 - GET_LNA_GAIN(pAd)));
+/*		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0);//(0x44 - GET_LNA_GAIN(pAd)));	// According the Rory's suggestion to solve the middle range issue. */
+
+		/* Rx High power VGA offset for LNA select */
+//#ifdef RT3593
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+		if (IS_RT5390(pAd))
+		{
+			//2 TODO: Check with Julian
+/*			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0x62); */
+
+			if (pAd->NicConfig2.field.ExternalLNAForG)
+			{
+#ifdef RT5370
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x52);
+#else
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x46);
+#endif /* RT5370 */
+			}
+			else
+			{
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x50);
+			}
+		}
+		else
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+		{
+			if (pAd->NicConfig2.field.ExternalLNAForG)
+			{
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0x62);
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x46);
+			}
+			else
+			{
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0x84);
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x50);
+			}
+		}
+
+		/* 5G band selection PIN, bit1 and bit2 are complement */
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
+		Value &= (~0x6);
+		Value |= (0x04);
+		RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
+
+			
+		/* Turn off unused PA or LNA when only 1T or 1R */
+		if (pAd->Antenna.field.TxPath == 1)
+		{
+			TxPinCfg &= 0xFFFFFFF3;
+		}
+		if (pAd->Antenna.field.RxPath == 1)
+		{
+			TxPinCfg &= 0xFFFFF3FF;
+		}
+			
+		RTMP_IO_WRITE32(pAd, TX_PIN_CFG, TxPinCfg);
+
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+		/* PCIe PHY Transmit attenuation adjustment */
+		if (IS_RT3090A(pAd) || IS_RT3390(pAd) || IS_RT3593(pAd) || IS_RT5390(pAd))
+		{
+			TX_ATTENUATION_CTRL_STRUC TxAttenuationCtrl = { { 0 } };
+
+			RTMP_IO_READ32(pAd, PCIE_PHY_TX_ATTENUATION_CTRL, &TxAttenuationCtrl.word);
+
+			if (Channel == 14) /* Channel #14 */
+			{
+				TxAttenuationCtrl.field.PCIE_PHY_TX_ATTEN_EN = 1; /* Enable PCIe PHY Tx attenuation */
+				TxAttenuationCtrl.field.PCIE_PHY_TX_ATTEN_VALUE = 4; /* 9/16 full drive level */
+			}
+			else /* Channel #1~#13 */
+			{
+				TxAttenuationCtrl.field.PCIE_PHY_TX_ATTEN_EN = 0; /* Disable PCIe PHY Tx attenuation */
+				TxAttenuationCtrl.field.PCIE_PHY_TX_ATTEN_VALUE = 0; /* n/a */
+			}
+
+			RTMP_IO_WRITE32(pAd, PCIE_PHY_TX_ATTENUATION_CTRL, TxAttenuationCtrl.word);
+		}
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+	}
+	else
+	{
+		ULONG	TxPinCfg = 0x00050F05;/* Gary 2007/8/9 0x050505 */
+		UINT8	bbpValue;
+		
+
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, (0x37 - GET_LNA_GAIN(pAd)));
+/*			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0);//(0x44 - GET_LNA_GAIN(pAd)));   // According the Rory's suggestion to solve the middle range issue.     */
+
+		/* Set the BBP_R82 value here */
+		bbpValue = 0xF2;
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, bbpValue);
+
+
+		/* Rx High power VGA offset for LNA select */
+		if (pAd->NicConfig2.field.ExternalLNAForA)
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x46);
+		}
+		else
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x50);
+		}
+
+		// 5G band selection PIN, bit1 and bit2 are complement */
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
+		Value &= (~0x6);
+		Value |= (0x02);
+		RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
+
+		/* Turn off unused PA or LNA when only 1T or 1R */
+
+			if (pAd->Antenna.field.TxPath == 1)
+			{
+				TxPinCfg &= 0xFFFFFFF3;
+			}
+			if (pAd->Antenna.field.RxPath == 1)
+			{
+				TxPinCfg &= 0xFFFFF3FF;
+			}
+		
+
+		RTMP_IO_WRITE32(pAd, TX_PIN_CFG, TxPinCfg);
+
+	}
+
+	
+	/* GPIO control */
+	
+
+	/* R66 should be set according to Channel and use 20MHz when scanning */
+	/* RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, (0x2E + GET_LNA_GAIN(pAd))); */
+	if (bScan)
+		RTMPSetAGCInitValue(pAd, BW_20);
+	else
+		RTMPSetAGCInitValue(pAd, pAd->CommonCfg.BBPCurrentBW);
+
+	/*
+	  On 11A, We should delay and wait RF/BBP to be stable
+	  and the appropriate time should be 1000 micro seconds 
+	  2005/06/05 - On 11G, We also need this delay time. Otherwise it's difficult to pass the WHQL.
+	*/
+	RTMPusecDelay(1000);  
+}
+
+
+
+
+/*
+	========================================================================
+	
+	Routine Description: 5392 R66 writing must select BBP_R27
+
+	Arguments:
+
+	Return Value:
+
+	IRQL = 
+	
+	Note: This function copy from RT3572WriteBBPR66. The content almost the same.
+	
+	========================================================================
+*/
+NTSTATUS	RT5392WriteBBPR66(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			Value)
+{
+	NTSTATUS NStatus = STATUS_UNSUCCESSFUL;
+	UCHAR	bbpData = 0;
+
+	if (!IS_RT5392(pAd))
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: Incorrect MAC version, pAd->MACVersion = 0x%X\n", 
+			__FUNCTION__, 
+			pAd->MACVersion));
+		return NStatus;
+	}
+	RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R27, &bbpData);
+
+	/* R66 controls the gain of Rx0 */
+	bbpData &= ~(0x60);	/* clear bit 5,6 */
+#ifdef RTMP_MAC_USB
+	if (RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R27, bbpData) == STATUS_SUCCESS)
+#endif /* RTMP_MAC_USB */
+	{
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, Value);
+	}
+
+	/* R66 controls the gain of Rx1 */
+	bbpData |= 0x20;		/* set bit 5 */
+#ifdef RTMP_MAC_USB
+	if (RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R27, bbpData) == STATUS_SUCCESS)
+#endif /* RTMP_MAC_USB */
+	{
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, Value);
+		NStatus = STATUS_SUCCESS;
+	}
+	return NStatus;
+}
+
+
+
+
+#ifdef RTMP_INTERNAL_TX_ALC
+#if defined(RT5370) || defined(RT5390)
+VOID RT5390_InitDesiredTSSITable(
+	IN PRTMP_ADAPTER			pAd)
+{
+	UCHAR TSSIBase = 0; /* The TSSI over OFDM 54Mbps */
+	UCHAR RFValue = 0;
+	USHORT TxPower = 0, TxPowerOFDM54 = 0;
+
+	UCHAR index = 0;
+	CHAR DesiredTssi = 0;
+	USHORT Value = 0;
+	UCHAR BbpR47 = 0;
+	INT		i=0;
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+
+	BOOLEAN bExtendedTssiMode = FALSE;
+	EEPROM_TX_PWR_OFFSET_STRUC TxPwrOffset = {{0}};
+
+	UCHAR ch = 0;
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+
+	if (pAd->TxPowerCtrl.bInternalTxALC == FALSE)
+	{
+		return;
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("---> %s\n", __FUNCTION__));
+
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+	if (IS_RT5390(pAd))
+	{
+		RT28xx_EEPROM_READ16(pAd, EEPROM_TSSI_OVER_OFDM_54, Value);
+#ifdef RT5370
+		TSSIBase = (Value & 0x007F); /* range: bit6~bit0 */
+#endif /* RT5370 */
+
+		RT28xx_EEPROM_READ16(pAd, (EEPROM_TSSI_STEP_OVER_2DOT4G - 1), Value);
+		if (((Value >> 8) & 0x80) == 0x80) /* Enable the extended TSSI mode */
+		{
+			bExtendedTssiMode = TRUE;
+		}
+		else
+		{
+			bExtendedTssiMode = FALSE;
+		}
+
+		if (bExtendedTssiMode == TRUE) /* Tx power offset for the extended TSSI mode */
+		{
+			pAd->TxPowerCtrl.bExtendedTssiMode = TRUE;
+
+			
+			/* Get the per-channel Tx power offset */
+			
+			RT28xx_EEPROM_READ16(pAd, (EEPROM_TX_POWER_OFFSET_OVER_CH_1 - 1), TxPwrOffset.word);
+			pAd->TxPowerCtrl.PerChTxPwrOffset[1] = (TxPwrOffset.field.Byte1 & 0x0F); /* Tx power offset over channel 1 */
+			pAd->TxPowerCtrl.PerChTxPwrOffset[2] = (((TxPwrOffset.field.Byte1 & 0xF0) >> 4) & 0x0F); /* Tx power offset over channel 2 */
+
+			RT28xx_EEPROM_READ16(pAd, EEPROM_TX_POWER_OFFSET_OVER_CH_3, TxPwrOffset.word);
+			pAd->TxPowerCtrl.PerChTxPwrOffset[3] = (TxPwrOffset.field.Byte0 & 0x0F); /* Tx power offset over channel 3 */
+			pAd->TxPowerCtrl.PerChTxPwrOffset[4] = (((TxPwrOffset.field.Byte0 & 0xF0) >> 4) & 0x0F); /* Tx power offset over channel 4 */
+			pAd->TxPowerCtrl.PerChTxPwrOffset[5] = (TxPwrOffset.field.Byte1 & 0x0F); /* Tx power offset over channel 5 */
+			pAd->TxPowerCtrl.PerChTxPwrOffset[6] = (((TxPwrOffset.field.Byte1 & 0xF0) >> 4) & 0x0F); /* Tx power offset over channel 6 */
+
+			RT28xx_EEPROM_READ16(pAd, EEPROM_TX_POWER_OFFSET_OVER_CH_7, TxPwrOffset.word);
+			pAd->TxPowerCtrl.PerChTxPwrOffset[7] = (TxPwrOffset.field.Byte0 & 0x0F); /* Tx power offset over channel 7 */
+			pAd->TxPowerCtrl.PerChTxPwrOffset[8] = (((TxPwrOffset.field.Byte0 & 0xF0) >> 4) & 0x0F); /* Tx power offset over channel 8 */
+			pAd->TxPowerCtrl.PerChTxPwrOffset[9] = (TxPwrOffset.field.Byte1 & 0x0F); /* Tx power offset over channel 9 */
+			pAd->TxPowerCtrl.PerChTxPwrOffset[10] = (((TxPwrOffset.field.Byte1 & 0xF0) >> 4) & 0x0F); /* Tx power offset over channel 10 */
+
+			RT28xx_EEPROM_READ16(pAd, EEPROM_TX_POWER_OFFSET_OVER_CH_11, TxPwrOffset.word);
+			pAd->TxPowerCtrl.PerChTxPwrOffset[11] = (TxPwrOffset.field.Byte0 & 0x0F); /* Tx power offset over channel 11 */
+			pAd->TxPowerCtrl.PerChTxPwrOffset[12] = (((TxPwrOffset.field.Byte0 & 0xF0) >> 4) & 0x0F); /* Tx power offset over channel 12 */
+			pAd->TxPowerCtrl.PerChTxPwrOffset[13] = (TxPwrOffset.field.Byte1 & 0x0F); /* Tx power offset over channel 13 */
+			pAd->TxPowerCtrl.PerChTxPwrOffset[14] = (((TxPwrOffset.field.Byte1 & 0xF0) >> 4) & 0x0F); /* Tx power offset over channel 14 */
+
+			
+			/* 4-bit representation ==> 8-bit representation (2's complement) */
+			
+			for (i = 1; i <= NUM_OF_CH_FOR_PER_CH_TX_PWR_OFFSET; i++)
+			{
+				if ((pAd->TxPowerCtrl.PerChTxPwrOffset[i] & 0x08) == 0x00) /* Positive number */
+				{
+					pAd->TxPowerCtrl.PerChTxPwrOffset[i] = (pAd->TxPowerCtrl.PerChTxPwrOffset[i] & ~0xF8);
+				}
+				else /* 0x08: Negative number */
+				{
+					pAd->TxPowerCtrl.PerChTxPwrOffset[i] = (pAd->TxPowerCtrl.PerChTxPwrOffset[i] | 0xF0);
+				}
+			}
+
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: TxPwrOffset[1] = %d, TxPwrOffset[2] = %d, TxPwrOffset[3] = %d, TxPwrOffset[4] = %d\n", 
+				__FUNCTION__, 
+				pAd->TxPowerCtrl.PerChTxPwrOffset[1], 
+				pAd->TxPowerCtrl.PerChTxPwrOffset[2], 
+				pAd->TxPowerCtrl.PerChTxPwrOffset[3], 
+				pAd->TxPowerCtrl.PerChTxPwrOffset[4]));
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: TxPwrOffset[5] = %d, TxPwrOffset[6] = %d, TxPwrOffset[7] = %d, TxPwrOffset[8] = %d\n", 
+				__FUNCTION__, 
+				pAd->TxPowerCtrl.PerChTxPwrOffset[5], 
+				pAd->TxPowerCtrl.PerChTxPwrOffset[6], 
+				pAd->TxPowerCtrl.PerChTxPwrOffset[7], 
+				pAd->TxPowerCtrl.PerChTxPwrOffset[8]));
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: TxPwrOffset[9] = %d, TxPwrOffset[10] = %d, TxPwrOffset[11] = %d, TxPwrOffset[12] = %d\n", 
+				__FUNCTION__, 
+				pAd->TxPowerCtrl.PerChTxPwrOffset[9], 
+				pAd->TxPowerCtrl.PerChTxPwrOffset[10], 
+				pAd->TxPowerCtrl.PerChTxPwrOffset[11], 
+				pAd->TxPowerCtrl.PerChTxPwrOffset[12]));
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: TxPwrOffset[13] = %d, TxPwrOffset[14] = %d\n", 
+				__FUNCTION__, 
+				pAd->TxPowerCtrl.PerChTxPwrOffset[13], 
+				pAd->TxPowerCtrl.PerChTxPwrOffset[14]));
+		}
+		else
+		{
+			pAd->TxPowerCtrl.bExtendedTssiMode = FALSE;
+			RTMPZeroMemory(pAd->TxPowerCtrl.PerChTxPwrOffset, sizeof (pAd->TxPowerCtrl.PerChTxPwrOffset));
+		}
+
+		
+		RT28xx_EEPROM_READ16(pAd, (EEPROM_OFDM_MCS6_MCS7 - 1), Value);
+		TxPowerOFDM54 = (0x000F & (Value >> 8));
+
+		DBGPRINT(RT_DEBUG_TRACE, ("%s: TSSIBase = 0x%X, TxPowerOFDM54 = 0x%X\n", 
+			__FUNCTION__, 
+			TSSIBase, 
+			TxPowerOFDM54));
+
+		/* The desired TSSI over CCK */
+		
+		RT28xx_EEPROM_READ16(pAd, EEPROM_CCK_MCS0_MCS1, Value);
+		TxPower = (Value & 0x000F);
+		DBGPRINT(RT_DEBUG_TRACE, ("%s: eFuse 0xDE = 0x%X\n", __FUNCTION__, TxPower));
+		for (ch = 1; ch <= NUM_OF_CH_FOR_PER_CH_TX_PWR_OFFSET; ch++)
+		{
+			index = GET_TSSI_RATE_TABLE_INDEX(TxPower - TxPowerOFDM54 + 3 + pAd->TxPowerCtrl.PerChTxPwrOffset[ch] + TSSI_RATIO_TABLE_OFFSET);
+			DesiredTssi = (SHORT)Rounding(pAd, (TSSIBase * TssiRatioTable[index][0] / TssiRatioTable[index][1]), (TSSIBase * TssiRatioTable[index][0] % TssiRatioTable[index][1]), TssiRatioTable[index][1]);
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: ch = %d, index = %d, DesiredTssi = 0x%02X\n", __FUNCTION__, ch, index, DesiredTssi));
+
+			
+			/* Boundary verification: the desired TSSI value */
+			
+			if (DesiredTssi < 0x00)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+
+				DesiredTssi = 0x00;
+			}
+			else if (DesiredTssi > 0x7C)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+
+				DesiredTssi = 0x7C;
+			}
+
+			RT5390_desiredTSSIOverCCKExt[ch][MCS_0] = (CHAR)DesiredTssi;
+			RT5390_desiredTSSIOverCCKExt[ch][MCS_1] = (CHAR)DesiredTssi;
+		}
+		RT28xx_EEPROM_READ16(pAd, (EEPROM_CCK_MCS2_MCS3 - 1), Value);
+		TxPower = ((Value >> 8) & 0x000F);
+		DBGPRINT(RT_DEBUG_TRACE, ("%s: eFuse 0xDF = 0x%X\n", __FUNCTION__, TxPower));
+
+		for (ch = 1; ch <= NUM_OF_CH_FOR_PER_CH_TX_PWR_OFFSET; ch++)
+		{
+			index = GET_TSSI_RATE_TABLE_INDEX(TxPower - TxPowerOFDM54 + 3 + pAd->TxPowerCtrl.PerChTxPwrOffset[ch] + TSSI_RATIO_TABLE_OFFSET);
+			DesiredTssi = (SHORT)Rounding(pAd, (TSSIBase * TssiRatioTable[index][0] / TssiRatioTable[index][1]), (TSSIBase * TssiRatioTable[index][0] % TssiRatioTable[index][1]), TssiRatioTable[index][1]);
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: ch = %d, index = %d, DesiredTssi = 0x%02X\n", __FUNCTION__, ch, index, DesiredTssi));
+
+			
+			/* Boundary verification: the desired TSSI value */
+			
+			if (DesiredTssi < 0x00)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+				
+				DesiredTssi = 0x00;
+			}
+			else if (DesiredTssi > 0x7C)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+				DesiredTssi = 0x7C;
+
+				
+			}
+
+			RT5390_desiredTSSIOverCCKExt[ch][MCS_2] = (CHAR)DesiredTssi;
+			RT5390_desiredTSSIOverCCKExt[ch][MCS_3] = (CHAR)DesiredTssi;
+
+		}
+
+		for (ch = 1; ch <= NUM_OF_CH_FOR_PER_CH_TX_PWR_OFFSET; ch++)
+		{
+			index = GET_TSSI_RATE_TABLE_INDEX(TxPower - TxPowerOFDM54 + 3 + pAd->TxPowerCtrl.PerChTxPwrOffset[ch] + TSSI_RATIO_TABLE_OFFSET);
+			DesiredTssi = (SHORT)Rounding(pAd, (TSSIBase * TssiRatioTable[index][0] / TssiRatioTable[index][1]), (TSSIBase * TssiRatioTable[index][0] % TssiRatioTable[index][1]), TssiRatioTable[index][1]);
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: ch = %d, index = %d, DesiredTssi = 0x%02X\n", __FUNCTION__, ch, index, DesiredTssi));
+
+			
+			/* Boundary verification: the desired TSSI value */
+			
+			if (DesiredTssi < 0x00)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+				
+				DesiredTssi = 0x00;
+			}
+			else if (DesiredTssi > 0x7C)			
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+				DesiredTssi = 0x7C;
+
+			}
+
+			RT5390_desiredTSSIOverCCKExt[ch][MCS_2] = (CHAR)DesiredTssi;
+			RT5390_desiredTSSIOverCCKExt[ch][MCS_3] = (CHAR)DesiredTssi;
+		}
+
+		for (ch = 1; ch <= NUM_OF_CH_FOR_PER_CH_TX_PWR_OFFSET; ch++)
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: ch = %d, RT5390_desiredTSSIOverCCK[%d][0] = %d, RT5390_desiredTSSIOverCCK[%d][1] = %d, RT5390_desiredTSSIOverCCK[%d][2] = %d, RT5390_desiredTSSIOverCCK[%d][3] = %d\n", 
+				__FUNCTION__, 
+				ch, 
+				ch, 
+				RT5390_desiredTSSIOverCCKExt[ch][0], 
+				ch, 
+				RT5390_desiredTSSIOverCCKExt[ch][1], 
+				ch, 
+				RT5390_desiredTSSIOverCCKExt[ch][2], 
+				ch, 
+				RT5390_desiredTSSIOverCCKExt[ch][3]));
+		}
+
+		
+		/* The desired TSSI over OFDM */
+		
+		RT28xx_EEPROM_READ16(pAd, EEPROM_OFDM_MCS0_MCS1, Value);
+		TxPower = (Value & 0x000F);
+		DBGPRINT(RT_DEBUG_TRACE, ("%s: eFuse 0xE0 = 0x%X\n", __FUNCTION__, TxPower));
+
+		for (ch = 1; ch <= NUM_OF_CH_FOR_PER_CH_TX_PWR_OFFSET; ch++)
+		{
+			index = GET_TSSI_RATE_TABLE_INDEX(TxPower - TxPowerOFDM54 + pAd->TxPowerCtrl.PerChTxPwrOffset[ch] + TSSI_RATIO_TABLE_OFFSET);
+			DesiredTssi = (SHORT)Rounding(pAd, (TSSIBase * TssiRatioTable[index][0] / TssiRatioTable[index][1]), (TSSIBase * TssiRatioTable[index][0] % TssiRatioTable[index][1]), TssiRatioTable[index][1]);
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: ch = %d, index = %d, DesiredTssi = 0x%02X\n", __FUNCTION__, ch, index, DesiredTssi));
+
+			
+			/* Boundary verification: the desired TSSI value */
+			
+			if (DesiredTssi < 0x00)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+				
+				DesiredTssi = 0x00;
+			}
+			else if (DesiredTssi > 0x7C)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+
+				DesiredTssi = 0x7C;
+			}
+
+			RT5390_desiredTSSIOverOFDMExt[ch][MCS_0] = (CHAR)DesiredTssi;
+			RT5390_desiredTSSIOverOFDMExt[ch][MCS_1] = (CHAR)DesiredTssi;
+		}
+
+		RT28xx_EEPROM_READ16(pAd, (EEPROM_OFDM_MCS2_MCS3 - 1), Value);
+		TxPower = ((Value >> 8) & 0x000F);
+		DBGPRINT(RT_DEBUG_TRACE, ("%s: eFuse 0xE1 = 0x%X\n", __FUNCTION__, TxPower));
+
+		for (ch = 1; ch <= NUM_OF_CH_FOR_PER_CH_TX_PWR_OFFSET; ch++)
+		{
+			index = GET_TSSI_RATE_TABLE_INDEX(TxPower - TxPowerOFDM54 + pAd->TxPowerCtrl.PerChTxPwrOffset[ch] + TSSI_RATIO_TABLE_OFFSET);
+			DesiredTssi = (SHORT)Rounding(pAd, (TSSIBase * TssiRatioTable[index][0] / TssiRatioTable[index][1]), (TSSIBase * TssiRatioTable[index][0] % TssiRatioTable[index][1]), TssiRatioTable[index][1]);
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: ch = %d, index = %d, DesiredTssi = 0x%02X\n", __FUNCTION__, ch, index, DesiredTssi));
+
+			
+			/* Boundary verification: the desired TSSI value */
+			
+			if (DesiredTssi < 0x00)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+				
+				DesiredTssi = 0x00;
+			}
+			else if (DesiredTssi > 0x7C)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+
+				DesiredTssi = 0x7C;
+			}
+
+			RT5390_desiredTSSIOverOFDMExt[ch][MCS_2] = (CHAR)DesiredTssi;
+			RT5390_desiredTSSIOverOFDMExt[ch][MCS_3] = (CHAR)DesiredTssi;
+		}
+		
+		RT28xx_EEPROM_READ16(pAd, EEPROM_OFDM_MCS4_MCS5, Value);
+		TxPower = (Value & 0x000F);
+		DBGPRINT(RT_DEBUG_TRACE, ("%s: eFuse 0xE2 = 0x%X\n", __FUNCTION__, TxPower));
+
+		for (ch = 1; ch <= NUM_OF_CH_FOR_PER_CH_TX_PWR_OFFSET; ch++)
+		{
+			index = GET_TSSI_RATE_TABLE_INDEX(TxPower - TxPowerOFDM54 + pAd->TxPowerCtrl.PerChTxPwrOffset[ch] + TSSI_RATIO_TABLE_OFFSET);
+			DesiredTssi = (SHORT)Rounding(pAd, (TSSIBase * TssiRatioTable[index][0] / TssiRatioTable[index][1]), (TSSIBase * TssiRatioTable[index][0] % TssiRatioTable[index][1]), TssiRatioTable[index][1]);
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: ch = %d, index = %d, DesiredTssi = 0x%02X\n", __FUNCTION__, ch, index, DesiredTssi));
+
+			
+			/* Boundary verification: the desired TSSI value */
+			
+			if (DesiredTssi < 0x00)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+				
+				DesiredTssi = 0x00;
+			}
+			else if (DesiredTssi > 0x7C)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+
+				DesiredTssi = 0x7C;
+			}
+
+			RT5390_desiredTSSIOverOFDMExt[ch][MCS_4] = (CHAR)DesiredTssi;
+			RT5390_desiredTSSIOverOFDMExt[ch][MCS_5] = (CHAR)DesiredTssi;
+
+			index = GET_TSSI_RATE_TABLE_INDEX(pAd->TxPowerCtrl.PerChTxPwrOffset[ch] + TSSI_RATIO_TABLE_OFFSET);
+			DesiredTssi = (SHORT)Rounding(pAd, (TSSIBase * TssiRatioTable[index][0] / TssiRatioTable[index][1]), (TSSIBase * TssiRatioTable[index][0] % TssiRatioTable[index][1]), TssiRatioTable[index][1]);
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: ch = %d, index = %d, DesiredTssi = 0x%02X\n", __FUNCTION__, ch, index, DesiredTssi));
+
+			
+			/* Boundary verification: the desired TSSI value */
+			
+			if (DesiredTssi < 0x00)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+				
+				DesiredTssi = 0x00;
+			}
+			else if (DesiredTssi > 0x7C)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+
+				DesiredTssi = 0x7C;
+			}
+
+			RT5390_desiredTSSIOverOFDMExt[ch][MCS_6] = (CHAR)DesiredTssi;
+			RT5390_desiredTSSIOverOFDMExt[ch][MCS_7] =(CHAR) DesiredTssi;
+		}
+		
+		for (ch = 1; ch <= NUM_OF_CH_FOR_PER_CH_TX_PWR_OFFSET; ch++)
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: ch = %d, desiredTSSIOverOFDM[%d][0] = %d, desiredTSSIOverOFDM[%d][1] = %d, desiredTSSIOverOFDM[%d][2] = %d, desiredTSSIOverOFDM[%d][3] = %d\n", 
+				__FUNCTION__, 
+				ch, 
+				ch, 
+				RT5390_desiredTSSIOverOFDMExt[ch][0], 
+				ch, 
+				RT5390_desiredTSSIOverOFDMExt[ch][1], 
+				ch, 
+				RT5390_desiredTSSIOverOFDMExt[ch][2], 
+				ch, 
+				RT5390_desiredTSSIOverOFDMExt[ch][3]));
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: ch = %d, desiredTSSIOverOFDM[%d][4] = %d, desiredTSSIOverOFDM[%d][5] = %d, desiredTSSIOverOFDM[[%d]6] = %d, desiredTSSIOverOFDM[%d][7] = %d\n", 
+				__FUNCTION__, 
+				ch, 
+				ch, 
+				RT5390_desiredTSSIOverOFDMExt[ch][4], 
+				ch, 
+				RT5390_desiredTSSIOverOFDMExt[ch][5], 
+				ch, 
+				RT5390_desiredTSSIOverOFDMExt[ch][6], 
+				ch, 
+				RT5390_desiredTSSIOverOFDMExt[ch][7]));
+		}
+
+		
+		/* The desired TSSI over HT */
+		
+		RT28xx_EEPROM_READ16(pAd, EEPROM_HT_MCS0_MCS1, Value);
+		TxPower = (Value & 0x000F);
+		DBGPRINT(RT_DEBUG_TRACE, ("%s: eFuse 0xE4 = 0x%X\n", __FUNCTION__, TxPower));
+
+		for (ch = 1; ch <= NUM_OF_CH_FOR_PER_CH_TX_PWR_OFFSET; ch++)
+		{
+			index = GET_TSSI_RATE_TABLE_INDEX(TxPower - TxPowerOFDM54 + pAd->TxPowerCtrl.PerChTxPwrOffset[ch] + TSSI_RATIO_TABLE_OFFSET);
+			DesiredTssi = (SHORT)Rounding(pAd, (TSSIBase * TssiRatioTable[index][0] / TssiRatioTable[index][1]), (TSSIBase * TssiRatioTable[index][0] % TssiRatioTable[index][1]), TssiRatioTable[index][1]);
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: ch = %d, index = %d, DesiredTssi = 0x%02X\n", __FUNCTION__, ch, index, DesiredTssi));
+
+			
+			/* Boundary verification: the desired TSSI value */
+		
+			if (DesiredTssi < 0x00)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+				
+				DesiredTssi = 0x00;
+			}
+			else if (DesiredTssi > 0x7F)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+
+				DesiredTssi = 0x7F;
+			}
+
+			RT5390_desiredTSSIOverHTExt[ch][MCS_0] = (CHAR)DesiredTssi;
+			RT5390_desiredTSSIOverHTExt[ch][MCS_1] = (CHAR)DesiredTssi;
+		}
+		
+		RT28xx_EEPROM_READ16(pAd, (EEPROM_HT_MCS2_MCS3 - 1), Value);
+		TxPower = ((Value >> 8) & 0x000F);
+
+		for (ch = 1; ch <= NUM_OF_CH_FOR_PER_CH_TX_PWR_OFFSET; ch++)
+		{
+			index = GET_TSSI_RATE_TABLE_INDEX(TxPower - TxPowerOFDM54 + pAd->TxPowerCtrl.PerChTxPwrOffset[ch] + TSSI_RATIO_TABLE_OFFSET);
+			DesiredTssi = (SHORT)Rounding(pAd, (TSSIBase * TssiRatioTable[index][0] / TssiRatioTable[index][1]), (TSSIBase * TssiRatioTable[index][0] % TssiRatioTable[index][1]), TssiRatioTable[index][1]);
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: ch = %d, index = %d, DesiredTssi = 0x%02X\n", __FUNCTION__, ch, index, DesiredTssi));
+
+			
+			/* Boundary verification: the desired TSSI value */
+			
+			if (DesiredTssi < 0x00)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+				
+				DesiredTssi = 0x00;
+			}
+			else if (DesiredTssi > 0x7F)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+
+				DesiredTssi = 0x7F;
+			}
+
+			RT5390_desiredTSSIOverHTExt[ch][MCS_2] = (CHAR)DesiredTssi;
+			RT5390_desiredTSSIOverHTExt[ch][MCS_3] = (CHAR)DesiredTssi;
+		}
+
+		RT28xx_EEPROM_READ16(pAd, EEPROM_HT_MCS4_MCS5, Value);
+		TxPower = (Value & 0x000F);
+
+		for (ch = 1; ch <= NUM_OF_CH_FOR_PER_CH_TX_PWR_OFFSET; ch++)
+		{
+			index = GET_TSSI_RATE_TABLE_INDEX(TxPower - TxPowerOFDM54 + pAd->TxPowerCtrl.PerChTxPwrOffset[ch] + TSSI_RATIO_TABLE_OFFSET);
+			DesiredTssi = (SHORT)Rounding(pAd, (TSSIBase * TssiRatioTable[index][0] / TssiRatioTable[index][1]), (TSSIBase * TssiRatioTable[index][0] % TssiRatioTable[index][1]), TssiRatioTable[index][1]);
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: ch = %d, index = %d, DesiredTssi = 0x%02X\n", __FUNCTION__, ch, index, DesiredTssi));
+
+			
+			/* Boundary verification: the desired TSSI value */
+			
+			if (DesiredTssi < 0x00)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+				
+				DesiredTssi = 0x00;
+			}
+			else if (DesiredTssi > 0x7F)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+
+				DesiredTssi = 0x7F;
+			}
+
+			RT5390_desiredTSSIOverHTExt[ch][MCS_4] = (CHAR)DesiredTssi;
+			RT5390_desiredTSSIOverHTExt[ch][MCS_5] = (CHAR)DesiredTssi;
+		}
+
+		RT28xx_EEPROM_READ16(pAd, (EEPROM_HT_MCS6_MCS7 - 1), Value);
+		TxPower = ((Value >> 8) & 0x000F);
+
+		for (ch = 1; ch <= NUM_OF_CH_FOR_PER_CH_TX_PWR_OFFSET; ch++)
+		{
+			index = GET_TSSI_RATE_TABLE_INDEX(TxPower - TxPowerOFDM54 + pAd->TxPowerCtrl.PerChTxPwrOffset[ch] + TSSI_RATIO_TABLE_OFFSET);
+			DesiredTssi = (SHORT)Rounding(pAd, (TSSIBase * TssiRatioTable[index][0] / TssiRatioTable[index][1]), (TSSIBase * TssiRatioTable[index][0] % TssiRatioTable[index][1]), TssiRatioTable[index][1]);
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: ch = %d, index = %d, DesiredTssi = 0x%02X\n", __FUNCTION__, ch, index, DesiredTssi));
+
+			
+			/* Boundary verification: the desired TSSI value */
+			
+			if (DesiredTssi < 0x00)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+				
+				DesiredTssi = 0x00;
+			}
+			else if (DesiredTssi > 0x7F)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+
+				DesiredTssi = 0x7F;
+			}
+
+			RT5390_desiredTSSIOverHTExt[ch][MCS_6] = (CHAR)DesiredTssi;
+			RT5390_desiredTSSIOverHTExt[ch][MCS_7] = (CHAR)DesiredTssi;
+		}
+		
+
+		for (ch = 1; ch <= NUM_OF_CH_FOR_PER_CH_TX_PWR_OFFSET; ch++)
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: ch = %d, desiredTSSIOverHT[%d][0] = %d, desiredTSSIOverHT[%d][1] = %d, desiredTSSIOverHT[%d][2] = %d, desiredTSSIOverHT[%d][3] = %d\n", 
+				__FUNCTION__, 
+				ch, 
+				ch, 
+				RT5390_desiredTSSIOverHTExt[ch][0], 
+				ch, 
+				RT5390_desiredTSSIOverHTExt[ch][1], 
+				ch, 
+				RT5390_desiredTSSIOverHTExt[ch][2], 
+				ch, 
+				RT5390_desiredTSSIOverHTExt[ch][3]));
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: ch = %d, desiredTSSIOverHT[%d][4] = %d, desiredTSSIOverHT[%d][5] = %d, desiredTSSIOverHT[%d][6] = %d, desiredTSSIOverHT[%d][7] = %d\n", 
+				__FUNCTION__, 
+				ch, 
+				ch, 
+				RT5390_desiredTSSIOverHTExt[ch][4], 
+				ch, 
+				RT5390_desiredTSSIOverHTExt[ch][5], 
+				ch, 
+				RT5390_desiredTSSIOverHTExt[ch][6], 
+				ch, 
+				RT5390_desiredTSSIOverHTExt[ch][7]));
+		}
+
+		
+		/* The desired TSSI over HT using STBC */
+		
+		RT28xx_EEPROM_READ16(pAd, EEPROM_HT_USING_STBC_MCS0_MCS1, Value);
+		TxPower = (Value & 0x000F);
+
+			for (ch = 1; ch <= NUM_OF_CH_FOR_PER_CH_TX_PWR_OFFSET; ch++)
+		{
+			index = GET_TSSI_RATE_TABLE_INDEX(TxPower - TxPowerOFDM54 + pAd->TxPowerCtrl.PerChTxPwrOffset[ch] + TSSI_RATIO_TABLE_OFFSET);
+			DesiredTssi = (SHORT)Rounding(pAd, (TSSIBase * TssiRatioTable[index][0] / TssiRatioTable[index][1]), (TSSIBase * TssiRatioTable[index][0] % TssiRatioTable[index][1]), TssiRatioTable[index][1]);
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: ch = %d, index = %d, DesiredTssi = 0x%02X\n", __FUNCTION__, ch, index, DesiredTssi));
+
+			
+			/* Boundary verification: the desired TSSI value */
+			
+			if (DesiredTssi < 0x00)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+				
+				DesiredTssi = 0x00;
+			}
+			else if (DesiredTssi > 0x7F)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+
+				DesiredTssi = 0x7F;
+			}
+
+			RT5390_desiredTSSIOverHTUsingSTBCExt[ch][MCS_0] = (CHAR)DesiredTssi;
+			RT5390_desiredTSSIOverHTUsingSTBCExt[ch][MCS_1] = (CHAR)DesiredTssi;
+		}
+
+		RT28xx_EEPROM_READ16(pAd, (EEPROM_HT_USING_STBC_MCS2_MCS3 - 1), Value);
+		TxPower = ((Value >> 8) & 0x000F);
+
+		for (ch = 1; ch <= NUM_OF_CH_FOR_PER_CH_TX_PWR_OFFSET; ch++)
+		{
+			index = GET_TSSI_RATE_TABLE_INDEX(TxPower - TxPowerOFDM54 + pAd->TxPowerCtrl.PerChTxPwrOffset[ch] + TSSI_RATIO_TABLE_OFFSET);
+			DesiredTssi = (SHORT)Rounding(pAd, (TSSIBase * TssiRatioTable[index][0] / TssiRatioTable[index][1]), (TSSIBase * TssiRatioTable[index][0] % TssiRatioTable[index][1]), TssiRatioTable[index][1]);
+			DBGPRINT(RT_DEBUG_TRACE, ("%s:ch = %d, index = %d, DesiredTssi = 0x%02X\n", __FUNCTION__, ch, index, DesiredTssi));
+
+			
+			/* Boundary verification: the desired TSSI value */
+			
+			if (DesiredTssi < 0x00)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+				
+				DesiredTssi = 0x00;
+			}
+			else if (DesiredTssi > 0x7F)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+
+				DesiredTssi = 0x7F;
+			}
+
+			RT5390_desiredTSSIOverHTUsingSTBCExt[ch][MCS_2] = (CHAR)DesiredTssi;
+			RT5390_desiredTSSIOverHTUsingSTBCExt[ch][MCS_3] = (CHAR)DesiredTssi;
+		}
+
+		RT28xx_EEPROM_READ16(pAd, EEPROM_HT_USING_STBC_MCS4_MCS5, Value);
+		TxPower = (Value & 0x000F);
+
+		for (ch = 1; ch <= NUM_OF_CH_FOR_PER_CH_TX_PWR_OFFSET; ch++)
+		{
+			index = GET_TSSI_RATE_TABLE_INDEX(TxPower - TxPowerOFDM54 + pAd->TxPowerCtrl.PerChTxPwrOffset[ch] + TSSI_RATIO_TABLE_OFFSET);
+			DesiredTssi = (SHORT)Rounding(pAd, (TSSIBase * TssiRatioTable[index][0] / TssiRatioTable[index][1]), (TSSIBase * TssiRatioTable[index][0] % TssiRatioTable[index][1]), TssiRatioTable[index][1]);
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: ch = %d, index = %d, DesiredTssi = 0x%02X\n", __FUNCTION__, ch, index, DesiredTssi));
+
+			
+			/* Boundary verification: the desired TSSI value */
+			
+			if (DesiredTssi < 0x00)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+				
+				DesiredTssi = 0x00;
+			}
+			else if (DesiredTssi > 0x7F)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+
+				DesiredTssi = 0x7F;
+			}
+
+			RT5390_desiredTSSIOverHTUsingSTBCExt[ch][MCS_4] = (CHAR)DesiredTssi;
+			RT5390_desiredTSSIOverHTUsingSTBCExt[ch][MCS_5] = (CHAR)DesiredTssi;
+		}
+
+		RT28xx_EEPROM_READ16(pAd, (EEPROM_HT_USING_STBC_MCS6_MCS7 - 1), Value);
+		TxPower = ((Value >> 8) & 0x000F);
+
+		for (ch = 1; ch <= NUM_OF_CH_FOR_PER_CH_TX_PWR_OFFSET; ch++)
+		{
+			index = GET_TSSI_RATE_TABLE_INDEX(TxPower - TxPowerOFDM54 + pAd->TxPowerCtrl.PerChTxPwrOffset[ch] + TSSI_RATIO_TABLE_OFFSET);
+			DesiredTssi = (SHORT)Rounding(pAd, (TSSIBase * TssiRatioTable[index][0] / TssiRatioTable[index][1]), (TSSIBase * TssiRatioTable[index][0] % TssiRatioTable[index][1]), TssiRatioTable[index][1]);
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: ch = %d, index = %d, DesiredTssi = 0x%02X\n", __FUNCTION__, ch, index, DesiredTssi));
+
+			
+			/* Boundary verification: the desired TSSI value */
+			
+			if (DesiredTssi < 0x00)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+				
+				DesiredTssi = 0x00;
+			}
+			else if (DesiredTssi > 0x7F)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: Out of range, DesiredTssi = 0x%02X\n", 
+					__FUNCTION__, 
+					DesiredTssi));
+
+				DesiredTssi = 0x7F;
+			}
+
+			RT5390_desiredTSSIOverHTUsingSTBCExt[ch][MCS_6] = (CHAR)DesiredTssi;
+			RT5390_desiredTSSIOverHTUsingSTBCExt[ch][MCS_7] = (CHAR)DesiredTssi;
+		}
+
+		
+		/* Boundary verification: the desired TSSI value */
+		
+		for (ch = 1; ch <= NUM_OF_CH_FOR_PER_CH_TX_PWR_OFFSET; ch++)
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: ch = %d, desiredTSSIOverHTUsingSTBC[%d][0] = %d, desiredTSSIOverHTUsingSTBC[%d][1] = %d, desiredTSSIOverHTUsingSTBC[%d][2] = %d, desiredTSSIOverHTUsingSTBC[%d][3] = %d\n", 
+				__FUNCTION__, 
+				ch, 
+				ch, 
+				RT5390_desiredTSSIOverHTUsingSTBCExt[ch][0], 
+				ch, 
+				RT5390_desiredTSSIOverHTUsingSTBCExt[ch][1], 
+				ch, 
+				RT5390_desiredTSSIOverHTUsingSTBCExt[ch][2], 
+				ch, 
+				RT5390_desiredTSSIOverHTUsingSTBCExt[ch][3]));
+			
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: ch = %d, desiredTSSIOverHTUsingSTBC[%d][4] = %d, desiredTSSIOverHTUsingSTBC[%d][5] = %d, desiredTSSIOverHTUsingSTBC[%d][6] = %d, desiredTSSIOverHTUsingSTBC[%d][7] = %d\n", 
+				__FUNCTION__, 
+				ch, 
+				ch, 
+				RT5390_desiredTSSIOverHTUsingSTBCExt[ch][4], 
+				ch, 
+				RT5390_desiredTSSIOverHTUsingSTBCExt[ch][5], 
+				ch, 
+				RT5390_desiredTSSIOverHTUsingSTBCExt[ch][6], 
+				ch, 
+				RT5390_desiredTSSIOverHTUsingSTBCExt[ch][7]));
+		}
+
+		
+		/* 5390 RF TSSI configuraiton */
+		
+		RT30xxReadRFRegister(pAd, RF_R28, (PUCHAR)(&RFValue));
+		RFValue = 0;
+		RT30xxWriteRFRegister(pAd, RF_R28, RFValue);
+
+		RT30xxReadRFRegister(pAd, RF_R29, (PUCHAR)(&RFValue));
+		RFValue = ((RFValue & ~0x03) | 0x00);
+		RT30xxWriteRFRegister(pAd, RF_R29, RFValue);
+
+		RT30xxReadRFRegister(pAd, RF_R27, (PUCHAR)(&RFValue));
+		RFValue = (RFValue & ~0xFC); /* [7:4] = 0, [3:2] = 0 */
+		RFValue = (RFValue | 0x03); /* [1:0] = 0x03 (tssi_gain = 12dB) */
+		RT30xxWriteRFRegister(pAd, RF_R27, RFValue);
+		
+/* Zero's Release without the following codes */
+		  RT28xx_EEPROM_READ16(pAd, EEPROM_TSSI_GAIN_AND_ATTENUATION,Value);
+		Value = (Value & 0x00FF);
+		DBGPRINT(RT_DEBUG_TRACE, ("%s: EEPROM_TSSI_GAIN_AND_ATTENUATION = 0x%X\n", 
+			__FUNCTION__, 
+			Value));
+
+		if ((Value != 0x00) && (Value != 0xFF))
+		{
+			RT30xxReadRFRegister(pAd, RF_R27, (PUCHAR)(&RFValue));
+			Value = (Value & 0x000F);
+			RFValue = ((RFValue & 0xF0) | Value); /* [3:0] = (tssi_gain and tssi_atten) */
+			RT30xxWriteRFRegister(pAd, RF_R27, RFValue);
+		}
+		
+		/* 5390 BBP TSSI configuration */
+		
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BbpR47);
+		BbpR47 = ((BbpR47 & ~0x80) | 0x80); /* ADC6 on */
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R47, BbpR47);
+		
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BbpR47);
+		BbpR47 = ((BbpR47 & ~0x18) | 0x10); /* TSSI_MODE (new averaged TSSI mode for 3290/5390) */
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R47, BbpR47);
+
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BbpR47);
+		BbpR47 = ((BbpR47 & ~0x07) | 0x04); /* TSSI_REPORT_SEL (TSSI INFO 0 - TSSI) and enable TSSI INFO udpate */
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R47, BbpR47);
+
+		
+	}
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("<--- %s\n", __FUNCTION__));
+}
+
+VOID RT5390_AsicTxAlcGetAutoAgcOffset(
+	IN PRTMP_ADAPTER			pAd,
+	IN PCHAR					pDeltaPwr,
+	IN PCHAR					pTotalDeltaPwr,
+	IN PCHAR					pAgcCompensate,
+	IN PUCHAR					pBbpR49)
+{
+	extern TX_POWER_TUNING_ENTRY_STRUCT *TxPowerTuningTable;
+	CHAR TotalDeltaPower = 0; 
+	BBP_R49_STRUC BbpR49;
+	UINT32 desiredTSSI = 0, currentTSSI = 0;
+	PTX_POWER_TUNING_ENTRY_STRUCT pTxPowerTuningEntry = NULL;
+	UCHAR RFValue = 0;
+
+	/* Locate the internal Tx ALC tuning entry */
+	if (pAd->TxPowerCtrl.bInternalTxALC == TRUE  && (IS_RT3390(pAd)))
+	{
+		if (pAd->Mlme.OneSecPeriodicRound % 4 == 0)
+		{
+			desiredTSSI = RT5390_GetDesiredTSSI(pAd);
+
+			RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R49, &BbpR49.byte);
+			currentTSSI = BbpR49.field.TSSI;
+
+			if (desiredTSSI > currentTSSI)
+			{
+				pAd->TxPowerCtrl.idxTxPowerTable++;
+			}
+
+			if (desiredTSSI < currentTSSI)
+			{
+				pAd->TxPowerCtrl.idxTxPowerTable--;
+			}
+
+			if (pAd->TxPowerCtrl.idxTxPowerTable < LOWERBOUND_TX_POWER_TUNING_ENTRY)
+			{
+				pAd->TxPowerCtrl.idxTxPowerTable = LOWERBOUND_TX_POWER_TUNING_ENTRY;
+			}
+
+			if (pAd->TxPowerCtrl.idxTxPowerTable >= UPPERBOUND_TX_POWER_TUNING_ENTRY(pAd))
+			{
+				pAd->TxPowerCtrl.idxTxPowerTable = UPPERBOUND_TX_POWER_TUNING_ENTRY(pAd);
+			}
+
+			
+			/* Valide pAd->TxPowerCtrl.idxTxPowerTable: -30 ~ 45 */
+			
+
+			pTxPowerTuningEntry = &TxPowerTuningTable[pAd->TxPowerCtrl.idxTxPowerTable + TX_POWER_TUNING_ENTRY_OFFSET]; // zero-based array
+			pAd->TxPowerCtrl.RF_R12_Value = pTxPowerTuningEntry->RF_R12_Value;
+			pAd->TxPowerCtrl.MAC_PowerDelta = pTxPowerTuningEntry->MAC_PowerDelta;
+
+			
+			/* Tx power adjustment over RF */
+			
+			RT30xxReadRFRegister(pAd, RF_R12, (PUCHAR)(&RFValue));
+			RFValue = ((RFValue & 0xE0) | pAd->TxPowerCtrl.RF_R12_Value);
+			RT30xxWriteRFRegister(pAd, RF_R12, (UCHAR)(RFValue));
+
+			
+			/* Tx power adjustment over MAC */
+			
+			TotalDeltaPower += pAd->TxPowerCtrl.MAC_PowerDelta;
+
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: desiredTSSI = %d, currentTSSI = %d, idxTxPowerTable = %d, {RF_R12_Value = %d, MAC_PowerDelta = %d}\n", 
+				__FUNCTION__, 
+				desiredTSSI, 
+				currentTSSI, 
+				pAd->TxPowerCtrl.idxTxPowerTable, 
+				pTxPowerTuningEntry->RF_R12_Value, 
+				pTxPowerTuningEntry->MAC_PowerDelta));
+		}
+		else
+		{
+			
+			/* Tx power adjustment over RF */
+			
+			RT30xxReadRFRegister(pAd, RF_R12, (PUCHAR)(&RFValue));
+				RFValue = ((RFValue & 0xE0) | pAd->TxPowerCtrl.RF_R12_Value);
+			RT30xxWriteRFRegister(pAd, RF_R12, (UCHAR)(RFValue));
+
+			
+			/* Tx power adjustment over MAC */
+			
+			TotalDeltaPower += pAd->TxPowerCtrl.MAC_PowerDelta;
+		}
+	}
+
+}
+
+
+/*
+        ==========================================================================
+        Description:
+                Get the desired TSSI based on the latest packet
+
+        Arguments:
+                pAd
+		pBbpR49
+
+        Return Value:
+                The desired TSSI
+        ==========================================================================
+ */
+UINT32 RT5390_GetDesiredTSSI(
+	IN PRTMP_ADAPTER		pAd)
+{
+	PHTTRANSMIT_SETTING pLatestTxHTSetting = (PHTTRANSMIT_SETTING)(&pAd->LastTxRate);
+	UCHAR desiredTSSI = 0;
+	UCHAR MCS = 0;
+	UCHAR ch=0;
+	UCHAR MaxMCS = 7;
+	MCS = (UCHAR)(pLatestTxHTSetting->field.MCS);
+
+	if ((pAd->CommonCfg.CentralChannel >= 1) && (pAd->CommonCfg.CentralChannel <= 14))
+			{
+				ch = pAd->CommonCfg.CentralChannel;
+			}
+			else
+			{
+				ch = 1;
+	
+				DBGPRINT(RT_DEBUG_ERROR, ("%s: Incorrect channel #%d\n", __FUNCTION__, pAd->CommonCfg.CentralChannel));
+			}
+
+		if (pLatestTxHTSetting->field.MODE == MODE_CCK)
+	{
+		if (MCS > 3) /* boundary verification */
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("%s: incorrect MCS: MCS = %d\n", 
+				__FUNCTION__, 
+				MCS));
+			
+			MCS = 0;
+		}
+		desiredTSSI = RT5390_desiredTSSIOverCCKExt[ch][MCS];
+	}
+	else if (pLatestTxHTSetting->field.MODE == MODE_OFDM)
+	{
+		if (MCS > 7) /* boundary verification */
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("%s: incorrect MCS: MCS = %d\n", 
+				__FUNCTION__, 
+				MCS));
+
+			MCS = 0;
+		}
+
+ 		desiredTSSI = RT5390_desiredTSSIOverOFDMExt[ch][MCS];
+
+	}
+	else if ((pLatestTxHTSetting->field.MODE == MODE_HTMIX) || (pLatestTxHTSetting->field.MODE == MODE_HTGREENFIELD))
+	{
+		MaxMCS = pAd->chipCap.TxAlcMaxMCS - 1;
+
+		if (MCS > MaxMCS) /* boundary verification */
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("%s: incorrect MCS: MCS = %d\n", 
+				__FUNCTION__, 
+				MCS));
+
+			MCS = 0;
+		}
+
+		if (pLatestTxHTSetting->field.STBC == 1)
+		{
+			desiredTSSI = RT5390_desiredTSSIOverHTExt[ch][MCS];
+		}
+		else
+		{
+			desiredTSSI = RT5390_desiredTSSIOverHTUsingSTBCExt[ch][MCS];
+		}
+		
+		/* For HT BW40 MCS 7 with/without STBC configuration, the desired TSSI value should subtract one from the formula. */
+		
+		if ((pLatestTxHTSetting->field.BW == BW_40) && (MCS == MCS_7))
+		{
+			desiredTSSI -= 1;
+		}
+	}
+
+	DBGPRINT(RT_DEBUG_INFO, ("%s: desiredTSSI = %d, Latest Tx HT setting: MODE = %d, MCS = %d, STBC = %d\n", 
+		__FUNCTION__, 
+		desiredTSSI, 
+		pLatestTxHTSetting->field.MODE, 
+		pLatestTxHTSetting->field.MCS, 
+		pLatestTxHTSetting->field.STBC));
+
+	DBGPRINT(RT_DEBUG_INFO, ("<--- %s\n", __FUNCTION__));
+
+	return desiredTSSI;
+}
+
+/*
+   Rounding to integer
+   e.g., +16.9 ~= 17 and -16.9 ~= -17
+
+   Parameters
+	  pAd: The adapter data structure
+	  Integer: Integer part
+	  Fraction: Fraction part
+	  DenominatorOfTssiRatio: The denominator of the TSSI ratio
+
+    Return Value:
+	  Rounding result
+*/
+LONG Rounding(
+	IN PRTMP_ADAPTER pAd, 
+	IN LONG Integer, 
+	IN LONG Fraction, 
+	IN LONG DenominatorOfTssiRatio)
+{
+	LONG temp = 0;
+
+	DBGPRINT(RT_DEBUG_INFO, ("%s: Integer = %d, Fraction = %d, DenominatorOfTssiRatio = %d\n", 
+		__FUNCTION__, 
+		(INT)Integer, 
+		(INT)Fraction, 
+		(INT)DenominatorOfTssiRatio));
+
+	if (Fraction >= 0)
+	{
+		if (Fraction < (DenominatorOfTssiRatio / 10))
+		{
+			return Integer; /* e.g., 32.08059 ~= 32 */
+		}
+	}
+	else
+	{
+		if (-Fraction < (DenominatorOfTssiRatio / 10))
+		{
+			return Integer; /* e.g., -32.08059 ~= -32 */
+		}
+	}
+
+	if (Integer >= 0)
+	{
+		if (Fraction == 0)
+		{
+			return Integer;
+		}
+		else
+		{
+			do {
+				if (Fraction == 0)
+				{
+					break;
+				}
+				else
+				{
+					temp = Fraction / 10;
+					if (temp == 0)
+					{
+						break;
+					}
+					else
+					{
+						Fraction = temp;
+					}
+				}
+			} while (1);
+
+			DBGPRINT(RT_DEBUG_INFO, ("%s: [+] temp = %d, Fraction = %d\n", __FUNCTION__, (INT)temp, (INT)Fraction));
+
+			if (Fraction >= 5)
+			{
+				return (Integer + 1);
+			}
+			else
+			{
+				return Integer;
+			}
+		}
+	}
+	else
+	{
+		if (Fraction == 0)
+		{
+			return Integer;
+		}
+		else
+		{
+			do {
+				if (Fraction == 0)
+				{
+					break;
+				}
+				else
+				{
+					temp = Fraction / 10;
+					if (temp == 0)
+					{
+						break;
+					}
+					else
+					{
+						Fraction = temp;
+					}
+				}
+			} while (1);
+
+			DBGPRINT(RT_DEBUG_INFO, ("%s: [-] temp = %d, Fraction = %d\n", __FUNCTION__, (INT)temp, (INT)Fraction));
+
+			if (Fraction <= -5)
+			{
+				return (Integer - 1);
+			}
+			else
+			{
+				return Integer;
+			}
+		}
+	}
+}
+
+/*
+   Get the desired TSSI based on the latest packet
+
+   Parameters
+	  pAd: The adapter data structure
+	  pDesiredTssi: The desired TSSI
+	  pCurrentTssi: The current TSSI/
+	
+   Return Value:
+	  Success or failure
+*/
+BOOLEAN GetDesiredTssiAndCurrentTssi(
+	IN PRTMP_ADAPTER pAd, 
+	IN OUT PCHAR pDesiredTssi, 
+	IN OUT PCHAR pCurrentTssi)
+{
+	UCHAR BbpR47 = 0;
+	UCHAR RateInfo = 0;
+	CCK_TSSI_INFO cckTssiInfo = {{0}};
+	OFDM_TSSI_INFO ofdmTssiInfo = {{0}};
+	HT_TSSI_INFO htTssiInfo = {{0}};
+
+	UCHAR ch=0;
+
+	DBGPRINT(RT_DEBUG_INFO, ("---> %s\n", __FUNCTION__));
+
+	if (IS_RT5390F(pAd))
+	{
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BbpR47);
+		if ((BbpR47 & 0x04) == 0x04) /* The TSSI INFO is not ready. */
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("%s: BBP TSSI INFO is not ready. (BbpR47 = 0x%X)\n", __FUNCTION__, BbpR47));
+
+			return FALSE;
+		}
+		
+		
+		/* Get TSSI */
+		
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R49, (PUCHAR)(pCurrentTssi));
+#ifdef RT5370
+		if ((*pCurrentTssi < 0) || (*pCurrentTssi > 0x7C))
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("%s: Out of range, *pCurrentTssi = %d\n", __FUNCTION__, *pCurrentTssi));
+			
+			*pCurrentTssi = 0;
+		}
+#endif /* RT5370 */
+		DBGPRINT(RT_DEBUG_TRACE, ("%s: *pCurrentTssi = %d\n", __FUNCTION__, *pCurrentTssi));
+
+		
+		/* Get packet information */
+		
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BbpR47);
+		BbpR47 = ((BbpR47 & ~0x03) | 0x01); /* TSSI_REPORT_SEL (TSSI INFO 1 - Packet infomation) */
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R47, BbpR47);
+
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R49, (PUCHAR)(&RateInfo));
+
+		if ((*pCurrentTssi < 0) || (*pCurrentTssi > 0x7C))	
+
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("%s: Out of range, *pCurrentTssi = %d\n", __FUNCTION__, *pCurrentTssi));
+			
+			*pCurrentTssi = 0;
+		}
+		if ((RateInfo & 0x03) == MODE_CCK) /* CCK */
+		{
+			cckTssiInfo.value = RateInfo;
+
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: CCK, cckTssiInfo.field.Rate = %d\n", 
+				__FUNCTION__, 
+				cckTssiInfo.field.Rate));
+
+			DBGPRINT(RT_DEBUG_INFO, ("%s: RateInfo = 0x%X\n", __FUNCTION__, RateInfo));
+
+			if (((cckTssiInfo.field.Rate >= 4) && (cckTssiInfo.field.Rate <= 7)) || 
+			      (cckTssiInfo.field.Rate > 11)) /* boundary verification */
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("%s: incorrect MCS: cckTssiInfo.field.Rate = %d\n", 
+					__FUNCTION__, 
+					cckTssiInfo.field.Rate));
+				
+				return FALSE;
+			}
+
+			/* Data rate mapping for short/long preamble over CCK */
+			if (cckTssiInfo.field.Rate == 8)
+			{
+				cckTssiInfo.field.Rate = 0; /* Short preamble CCK 1Mbps => Long preamble CCK 1Mbps */
+			}
+			else if (cckTssiInfo.field.Rate == 9)
+			{
+				cckTssiInfo.field.Rate = 1; /* Short preamble CCK 2Mbps => Long preamble CCK 2Mbps */
+			}
+			else if (cckTssiInfo.field.Rate == 10)
+			{
+				cckTssiInfo.field.Rate = 2; /* Short preamble CCK 5.5Mbps => Long preamble CCK 5.5Mbps */
+			}
+			else if (cckTssiInfo.field.Rate == 11)
+			{
+				cckTssiInfo.field.Rate = 3; /* Short preamble CCK 11Mbps => Long preamble CCK 11Mbps */
+			}
+
+			if ((pAd->CommonCfg.CentralChannel >= 1) && (pAd->CommonCfg.CentralChannel <= 14))
+			{
+				ch = pAd->CommonCfg.CentralChannel;
+			}
+			else
+			{
+				ch = 1;
+
+				DBGPRINT(RT_DEBUG_ERROR, ("%s: Incorrect channel #%d\n", __FUNCTION__, pAd->CommonCfg.CentralChannel));
+			}
+		
+			*pDesiredTssi = RT5390_desiredTSSIOverCCKExt[ch][cckTssiInfo.field.Rate];
+
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: ch = %d, *pDesiredTssi = %d\n", __FUNCTION__, ch, *pDesiredTssi));
+
+		}
+		else if ((RateInfo & 0x03) == MODE_OFDM) // OFDM
+		{
+			ofdmTssiInfo.value = RateInfo;
+
+			
+			/* BBP OFDM rate format ==> MAC OFDM rate format */
+			
+			switch (ofdmTssiInfo.field.Rate)
+			{
+				case 0x0B: /* 6 Mbits/s */
+				{
+					ofdmTssiInfo.field.Rate = MCS_0;
+				}
+				break;
+
+				case 0x0F: /* 9 Mbits/s */
+				{
+					ofdmTssiInfo.field.Rate = MCS_1;
+				}
+				break;
+
+				case 0x0A: /* 12 Mbits/s */
+				{
+					ofdmTssiInfo.field.Rate = MCS_2;
+				}
+				break;
+
+				case 0x0E: /* 18  Mbits/s */
+				{
+					ofdmTssiInfo.field.Rate = MCS_3;
+				}
+				break;
+
+				case 0x09: /* 24  Mbits/s */
+				{
+					ofdmTssiInfo.field.Rate = MCS_4;
+				}
+				break;
+
+				case 0x0D: /* 36  Mbits/s */
+				{
+					ofdmTssiInfo.field.Rate = MCS_5;
+				}
+				break;
+
+				case 0x08: /* 48  Mbits/s */
+				{
+					ofdmTssiInfo.field.Rate = MCS_6;
+				}
+				break;
+
+				case 0x0C: /* 54  Mbits/s */
+				{
+					ofdmTssiInfo.field.Rate = MCS_7;
+				}
+				break;
+
+				default: 
+				{
+					DBGPRINT(RT_DEBUG_ERROR, ("%s: Incorrect OFDM rate = 0x%X\n", __FUNCTION__, ofdmTssiInfo.field.Rate));
+					
+					return FALSE;
+				}
+				break;
+			}
+
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: OFDM, ofdmTssiInfo.field.Rate = %d\n", 
+				__FUNCTION__, 
+				ofdmTssiInfo.field.Rate));
+
+			if ((ofdmTssiInfo.field.Rate < 0) || (ofdmTssiInfo.field.Rate > 7)) /* boundary verification */
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("%s: incorrect MCS: ofdmTssiInfo.field.Rate = %d\n", 
+					__FUNCTION__, 
+					ofdmTssiInfo.field.Rate));
+
+				return FALSE;
+			}
+
+			if ((pAd->CommonCfg.CentralChannel >= 1) && (pAd->CommonCfg.CentralChannel <= 14))
+			{
+				ch = pAd->CommonCfg.CentralChannel;
+			}
+			else
+			{
+				ch = 1;
+
+				DBGPRINT(RT_DEBUG_ERROR, ("%s: Incorrect channel #%d\n", __FUNCTION__, pAd->CommonCfg.CentralChannel));
+			}
+
+			*pDesiredTssi = RT5390_desiredTSSIOverOFDMExt[ch][ofdmTssiInfo.field.Rate];
+
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: ch = %d, *pDesiredTssi = %d\n", __FUNCTION__, ch, *pDesiredTssi));
+			DBGPRINT(RT_DEBUG_INFO, ("%s: RateInfo = 0x%X\n", __FUNCTION__, RateInfo));
+		}
+		else /* Mixed mode or green-field mode */
+		{
+			htTssiInfo.PartA.value = RateInfo;
+			DBGPRINT(RT_DEBUG_INFO, ("%s: RateInfo = 0x%X\n", __FUNCTION__, RateInfo));
+
+			RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BbpR47);
+			BbpR47 = ((BbpR47 & ~0x03) | 0x02); /* TSSI_REPORT_SEL (TSSI INFO 2 - Packet infomation) */
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R47, 0x92);
+			RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R49, (PUCHAR)(&RateInfo));
+
+			htTssiInfo.PartB.value = RateInfo;
+			DBGPRINT(RT_DEBUG_INFO, ("%s: RateInfo = 0x%X\n", __FUNCTION__, RateInfo));
+
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: HT, htTssiInfo.PartA.field.STBC = %d, htTssiInfo.PartB.field.MCS = %d\n", 
+				__FUNCTION__, 
+				htTssiInfo.PartA.field.STBC, 
+				htTssiInfo.PartB.field.MCS));
+
+			if ((htTssiInfo.PartB.field.MCS < 0) || (htTssiInfo.PartB.field.MCS > 7)) /* boundary verification */
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("%s: incorrect MCS: htTssiInfo.PartB.field.MCS = %d\n", 
+					__FUNCTION__, 
+					htTssiInfo.PartB.field.MCS));
+
+				return FALSE;
+			}
+
+			if ((pAd->CommonCfg.CentralChannel >= 1) && (pAd->CommonCfg.CentralChannel <= 14))
+			{
+				ch = pAd->CommonCfg.CentralChannel;
+			}
+			else
+			{
+				ch = 1;
+
+				DBGPRINT(RT_DEBUG_ERROR, ("%s: Incorrect channel #%d\n", __FUNCTION__, pAd->CommonCfg.CentralChannel));
+			}
+
+			if (htTssiInfo.PartA.field.STBC == 0)
+			{
+				*pDesiredTssi = RT5390_desiredTSSIOverHTExt[ch][htTssiInfo.PartB.field.MCS];
+			}
+			else
+			{
+				*pDesiredTssi = RT5390_desiredTSSIOverHTUsingSTBCExt[ch][htTssiInfo.PartB.field.MCS];
+			}
+
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: ch = %d, *pDesiredTssi = %d\n", __FUNCTION__, ch, *pDesiredTssi));			
+		}	
+
+		if (*pDesiredTssi < 0x00)
+		{
+			*pDesiredTssi = 0x00;
+		}	
+		else if (*pDesiredTssi > 0x7C)
+		{
+			*pDesiredTssi = 0x7C;
+		}
+
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BbpR47);
+		BbpR47 = ((BbpR47 & ~0x07) | 0x04); /* TSSI_REPORT_SEL (TSSI INFO 0 - TSSI) and enable TSSI INFO udpate */
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R47, BbpR47);
+	}
+
+	DBGPRINT(RT_DEBUG_INFO, ("<--- %s\n", __FUNCTION__));
+
+	return TRUE;
+}
+
+#ifdef RALINK_ATE
+INT RT5390_ATETssiCalibration(
+	IN	PRTMP_ADAPTER		pAd,
+	IN	PSTRING				arg)
+{    
+	UCHAR inputDAC;
+	
+	inputDAC = simple_strtol(arg, 0, 10);
+
+	if (!IS_RT5390(pAd) || !(pAd->TxPowerCtrl.bInternalTxALC))                          
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("Not support TSSI calibration since not 5390 chip or EEPROM not set!!!\n"));
+		return FALSE;
+	}
+	
+	UINT 		i = 0;
+	UCHAR		BbpData, RFValue, OrgBbp47Value, ChannelPower;
+	USHORT		EEPData;
+	UCHAR 		BSSID_ADDR[MAC_ADDR_LEN] = {0x11, 0x22, 0x33, 0x44, 0x55, 0x66};
+	BBP_R47_STRUC	BBPR47;
+
+	/* Set RF R27[3:0] TSSI gain */		
+	RT30xxReadRFRegister(pAd, RF_R27, (PUCHAR)(&RFValue));			
+	RFValue = ((RFValue & 0xF0) | pAd->TssiGain); /* [3:0] = (tssi_gain and tssi_atten) */
+	RT30xxWriteRFRegister(pAd, RF_R27, RFValue);	
+
+	/* Set RF R28 bit[7:6] = 00 */
+	RT30xxReadRFRegister(pAd, RF_R28, &RFValue);
+	/* RF28Value = RFValue; */
+	RFValue &= (~0xC0); 
+	RT30xxWriteRFRegister(pAd, RF_R28, RFValue);
+
+	/* set BBP R47[7] = 1(ADC6 ON), R47[4:3] = 0x2(new average TSSI mode), R47[2] = 1(TSSI_UPDATE_REQ), R49[1:0] = 0(TSSI info 0 - TSSI) */
+	RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BBPR47.byte);
+	OrgBbp47Value = BBPR47.byte;
+	BBPR47.field.Adc6On = 1;
+	BBPR47.field.TssiMode = 0x02;
+	BBPR47.field.TssiUpdateReq = 1;
+	BBPR47.field.TssiReportSel = 0;							
+	DBGPRINT(RT_DEBUG_TRACE, ("Write BBP R47 = 0x%x\n", BBPR47.byte));
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R47, BBPR47.byte);		
+
+	/* start TX at 54Mbps, we use channel and power value passed from upper layer program */
+	NdisZeroMemory(&pAd->ate, sizeof(struct _ATE_INFO));
+	pAd->ate.TxCount = 100;
+	pAd->ate.TxLength = 1024;
+	 pAd->ate.Channel = 1;
+	COPY_MAC_ADDR(pAd->ate.Addr1, BROADCAST_ADDR);
+	COPY_MAC_ADDR(pAd->ate.Addr2, pAd->PermanentAddress);                                                     
+	COPY_MAC_ADDR(pAd->ate.Addr3, BSSID_ADDR);    
+
+	Set_ATE_TX_MODE_Proc(pAd, "1");		/* MODE_OFDM */
+	Set_ATE_TX_MCS_Proc(pAd, "7");		/* 54Mbps */
+	Set_ATE_TX_BW_Proc(pAd, "0");		/* 20MHz */
+			
+	/* set power value calibrated DAC */		
+	pAd->ate.TxPower0 = inputDAC;
+     	DBGPRINT(RT_DEBUG_TRACE, ("(Calibrated) Tx.Power0= 0x%x\n", pAd->ate.TxPower0));
+		 
+	/* read frequency offset from EEPROM */                       
+	RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, EEPData);
+	pAd->ate.RFFreqOffset = (UCHAR) (EEPData & 0xff);
+		
+	Set_ATE_Proc(pAd, "TXFRAME"); 
+	RTMPusecDelay(200000);
+
+	while (i < 500)
+	{
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BbpData);
+
+		if ((BbpData & 0x04) == 0)
+			break;
+
+		RTMPusecDelay(2);
+		i++;	
+	}
+
+	if (i >= 500)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("TSSI status not ready!!! (i=%d)\n", i));
+		return FALSE;
+	}	
+
+	/* read BBP R49[6:0] and write to EEPROM 0x6E */
+	DBGPRINT(RT_DEBUG_TRACE, ("Read  BBP_R49\n")); 
+	RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R49, &BbpData);
+	DBGPRINT(RT_DEBUG_TRACE, ("BBP R49 = 0x%x\n", BbpData)); 
+	BbpData &= 0x7f;
+
+	/* the upper boundary of 0x6E (TSSI base) is 0x7C */
+	if (BbpData > 0x7C)
+		BbpData = 0;
+
+	RT28xx_EEPROM_READ16(pAd, EEPROM_TSSI_OVER_OFDM_54, EEPData);
+	EEPData &= 0xff00;
+	EEPData |= BbpData;
+	DBGPRINT(RT_DEBUG_TRACE, ("Write  E2P 0x6e: 0x%x\n", EEPData)); 		
+	
+#ifdef RTMP_EFUSE_SUPPORT
+	if (pAd->bUseEfuse)
+	{
+		if (pAd->bFroceEEPROMBuffer)
+			NdisMoveMemory(&(pAd->EEPROMImage[EEPROM_TSSI_OVER_OFDM_54]), (PUCHAR)(&EEPData) ,2);
+		else
+			eFuseWrite(pAd, EEPROM_TSSI_OVER_OFDM_54, (PUCHAR)(&EEPData), 2);
+	}
+#endif /* RTMP_EFUSE_SUPPORT */
+	else
+	{
+		RT28xx_EEPROM_WRITE16(pAd, EEPROM_TSSI_OVER_OFDM_54, EEPData);
+		RTMPusecDelay(10);
+	}    
+
+	/* restore RF R27 and R28, BBP R47 */
+	/* RT30xxWriteRFRegister(pAd, RF_R27, RF27Value); */				
+	/* RT30xxWriteRFRegister(pAd, RF_R28, RF28Value); */
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R47, OrgBbp47Value);
+
+	Set_ATE_Proc(pAd, "ATESTART");
+
+	return TRUE;
+}
+
+/* Vx = V0 + t(V1 - V0) ? f(x), where t = (x-x0) / (x1 - x0) */
+CHAR RTATEInsertTssi(UCHAR InChannel, UCHAR Channel0, UCHAR Channel1,CHAR Tssi0, CHAR Tssi1)
+{
+	CHAR	InTssi, TssiDelta, ChannelDelta, InChannelDelta;
+	
+	ChannelDelta = Channel1 - Channel0;
+	InChannelDelta = InChannel - Channel0;
+	TssiDelta = Tssi1 - Tssi0;
+
+	/* channel delta should not be 0 */
+	if (ChannelDelta == 0)
+		InTssi = Tssi0;
+
+	DBGPRINT(RT_DEBUG_WARN, ("--->RTATEInsertTssi\n")); 	
+	
+	if ((TssiDelta > 0) && (((InChannelDelta * TssiDelta * 10) / ChannelDelta) % 10 >= 5))
+	{
+		InTssi = Tssi0 + ((InChannelDelta * TssiDelta) / ChannelDelta);
+		InTssi += 1;
+	}
+	else	if ((TssiDelta < 0) && (((InChannelDelta * TssiDelta * 10) / ChannelDelta) % 10 <= -5))
+	{
+		InTssi = Tssi0 + ((InChannelDelta * TssiDelta) / ChannelDelta);
+		InTssi -= 1;
+	}
+	else
+	{
+		InTssi = Tssi0 + ((InChannelDelta * TssiDelta) / ChannelDelta);	
+	}	
+
+	DBGPRINT(RT_DEBUG_WARN, ("<---RTATEInsertTssi\n")); 		
+	
+	return InTssi;
+}
+
+UCHAR RTATEGetTssiByChannel(PRTMP_ADAPTER pAd, UCHAR Channel)
+{
+	UINT	i = 0;
+	UCHAR	BbpData =0;
+	UCHAR	ChannelPower;
+	UCHAR 	BSSID_ADDR[MAC_ADDR_LEN] = {0x11, 0x22, 0x33, 0x44, 0x55, 0x66};
+	USHORT	EEPData;
+	BBP_R47_STRUC BBPR47;
+
+	RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BBPR47.byte);
+	BBPR47.field.Adc6On = 1;
+	BBPR47.field.TssiMode = 0x02;
+	BBPR47.field.TssiUpdateReq = 1;
+	BBPR47.field.TssiReportSel = 0;							
+	DBGPRINT(RT_DEBUG_WARN, ("Write BBP R47 = 0x%x\n", BBPR47.byte));
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R47, BBPR47.byte);
+		
+	/* start TX at 54Mbps */
+	NdisZeroMemory(&pAd->ate, sizeof(ATE_INFO));
+	pAd->ate.TxCount = 100;
+	pAd->ate.TxLength = 1024;
+	pAd->ate.Channel = Channel;
+	COPY_MAC_ADDR(pAd->ate.Addr1, BROADCAST_ADDR);
+	COPY_MAC_ADDR(pAd->ate.Addr2, pAd->PermanentAddress);                                                     
+	COPY_MAC_ADDR(pAd->ate.Addr3, BSSID_ADDR);    		
+
+	Set_ATE_TX_MODE_Proc(pAd, "1");		/* MODE_OFDM */
+	Set_ATE_TX_MCS_Proc(pAd, "7");		/* 54Mbps */
+	Set_ATE_TX_BW_Proc(pAd, "0");		/* 20MHz */
+		
+	/* read calibrated channel power value from EEPROM */
+	RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET+Channel-1, ChannelPower);
+	pAd->ate.TxPower0 = (UCHAR)(ChannelPower & 0xff);
+	DBGPRINT(RT_DEBUG_TRACE, ("Channel %d, Calibrated Tx.Power0= 0x%x\n", Channel, pAd->ate.TxPower0));
+	
+	/* read frequency offset from EEPROM */                        
+	RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, EEPData);
+	pAd->ate.RFFreqOffset = (UCHAR)(EEPData & 0xff);
+		
+	Set_ATE_Proc(pAd, "TXFRAME"); 
+	RTMPusecDelay(200000);
+
+	while (i < 500)
+	{
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BbpData);
+
+		if ((BbpData & 0x04) == 0)
+			break;
+
+		RTMPusecDelay(2);
+		i++;	
+	}
+
+	if (i >= 500)
+		DBGPRINT(RT_DEBUG_WARN, ("TSSI status not ready!!! (i=%d)\n", i));
+
+	/* read BBP R49[6:0] and write to EEPROM 0x6E */
+	DBGPRINT(RT_DEBUG_WARN, ("Read  BBP_R49\n")); 
+	RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R49, &BbpData);
+	DBGPRINT(RT_DEBUG_WARN, ("BBP R49 = 0x%x\n", BbpData)); 
+	BbpData &= 0x7f;
+
+	/* the upper boundary of 0x6E (TSSI base) is 0x7C */
+	if (BbpData > 0x7C)
+		BbpData = 0;
+
+	/* back to ATE IDLE state */
+	Set_ATE_Proc(pAd, "ATESTART");
+
+	return BbpData;	
+}
+
+/* Get the power delta bound */
+#define GET_TSSI_RATE_TABLE_INDEX(x) (((x) > UPPER_POWER_DELTA_INDEX) ? (UPPER_POWER_DELTA_INDEX) : (((x) < LOWER_POWER_DELTA_INDEX) ? (LOWER_POWER_DELTA_INDEX) : ((x))))
+
+CHAR GetPowerDeltaFromTssiRatio(CHAR TssiOfChannel, CHAR TssiBase)
+{
+	LONG	TssiRatio, TssiDelta, MinTssiDelta;
+	CHAR	i, PowerDeltaStatIndex, PowerDeltaEndIndex, MinTssiDeltaIndex;	
+	CHAR	PowerDelta;
+	extern ULONG TssiRatioTable[][2];
+
+	// TODO: If 0 is a valid value for TSSI base
+	if (TssiBase == 0)
+		return 0;
+	
+	TssiRatio = TssiOfChannel * TssiRatioTable[0][1] / TssiBase;
+
+	DBGPRINT(RT_DEBUG_WARN, ("TssiOfChannel = %d, TssiBase = %d, TssiRatio = %d\n", TssiOfChannel,  TssiBase, TssiRatio));
+
+	PowerDeltaStatIndex = 4;
+	PowerDeltaEndIndex = 19;
+
+	MinTssiDeltaIndex= PowerDeltaStatIndex;
+	MinTssiDelta = TssiRatio - TssiRatioTable[MinTssiDeltaIndex][0];
+	
+	if (MinTssiDelta < 0)
+		MinTssiDelta = -MinTssiDelta;
+
+	for (i = PowerDeltaStatIndex+1; i <= PowerDeltaEndIndex; i++)
+	{
+		TssiDelta = TssiRatio -TssiRatioTable[i][0];
+		
+		if (TssiDelta < 0)
+		{
+			TssiDelta = -TssiDelta;
+		}
+
+		if (TssiDelta < MinTssiDelta)
+		{
+			MinTssiDelta = TssiDelta;
+			MinTssiDeltaIndex = i;
+		}
+	}
+
+	PowerDelta = MinTssiDeltaIndex - TSSI_RATIO_TABLE_OFFSET;
+
+	DBGPRINT(RT_DEBUG_WARN, ("MinTssiDeltaIndex = %d, MinTssiDelta = %d, PowerDelta = %d\n", MinTssiDeltaIndex,  MinTssiDelta, PowerDelta));
+	
+	return (PowerDelta);
+}
+
+INT RT5390_ATETssiCalibrationExtend(
+	IN	PRTMP_ADAPTER		pAd,
+	IN	PSTRING				arg)
+{  
+	UCHAR inputData;
+	
+	inputData = simple_strtol(arg, 0, 10);
+	
+	if (!(IS_RT5390(pAd) && (pAd->TxPowerCtrl.bInternalTxALC) && (pAd->TxPowerCtrl.bExtendedTssiMode)))			
+	{
+		DBGPRINT(RT_DEBUG_WARN, ("Not support TSSI calibration since not 5390 chip or EEPROM not set!!!\n"));
+		return FALSE;
+	}			
+	else
+	{				
+		UCHAR	RFValue;
+		CHAR	TssiRefPerChannel[14+1], PowerDeltaPerChannel[14+1], TssiBase;
+		USHORT	EEPData;
+		UCHAR	CurrentChannel;
+
+		/* step 0: set init register values for TSSI calibration */
+		/* Set RF R27[3:2] = 00, R27[1:0] = 11 */
+		RT30xxReadRFRegister(pAd, RF_R27, &RFValue);
+		/* RF27Value = RFValue; */
+		/* RFValue &= (~0x0F); */
+		/* RFValue |= 0x02; */ 
+		RFValue = ((RFValue & 0xF0) | pAd->TssiGain); /* [3:0] = (tssi_gain and tssi_atten) */
+		RT30xxWriteRFRegister(pAd, RF_R27, RFValue);
+
+		/* Set RF R28 bit[7:6] = 00 */
+		RT30xxReadRFRegister(pAd, RF_R28, &RFValue);
+		/* RF28Value = RFValue; */
+		RFValue &= (~0xC0); 
+		RT30xxWriteRFRegister(pAd, RF_R28, RFValue);
+
+		/* step 1: get channel 7 TSSI as reference value */
+		CurrentChannel = 7;
+		TssiRefPerChannel[CurrentChannel] = RTATEGetTssiByChannel(pAd, CurrentChannel);
+		TssiBase = TssiRefPerChannel[CurrentChannel];
+		PowerDeltaPerChannel[CurrentChannel] = GetPowerDeltaFromTssiRatio(TssiRefPerChannel[CurrentChannel], TssiBase);
+
+		/* Save TSSI ref base to EEPROM 0x6E */
+		RT28xx_EEPROM_READ16(pAd, EEPROM_TSSI_OVER_OFDM_54, EEPData);
+		EEPData &= 0xff00;
+		EEPData |= TssiBase;
+		DBGPRINT(RT_DEBUG_WARN, ("Write  E2P 0x6E: 0x%x\n", EEPData)); 				
+		RT28xx_EEPROM_WRITE16(pAd, EEPROM_TSSI_OVER_OFDM_54, EEPData);
+		RTMPusecDelay(10); /* delay for twp(MAX)=10ms */
+		
+		/* step 2: get channel 1 and 13 TSSI values */
+		/* start TX at 54Mbps */
+		CurrentChannel = 1;
+		TssiRefPerChannel[CurrentChannel] = RTATEGetTssiByChannel(pAd, CurrentChannel);
+		PowerDeltaPerChannel[CurrentChannel] = GetPowerDeltaFromTssiRatio(TssiRefPerChannel[CurrentChannel], TssiBase);
+
+		/* start TX at 54Mbps */
+		CurrentChannel = 13;
+		TssiRefPerChannel[CurrentChannel] = RTATEGetTssiByChannel(pAd, CurrentChannel);
+		PowerDeltaPerChannel[CurrentChannel] = GetPowerDeltaFromTssiRatio(TssiRefPerChannel[CurrentChannel], TssiBase);
+
+		/* step 3: insert the power table */
+		/* insert channel 2 to 6 TSSI values */
+		/*
+			for(CurrentChannel = 2; CurrentChannel <7; CurrentChannel++)
+				TssiRefPerChannel[CurrentChannel] = RTATEInsertTssi(CurrentChannel, 1, 7, TssiRefPerChannel[1], TssiRefPerChannel[7]);
+		*/
+		for (CurrentChannel = 2; CurrentChannel < 7; CurrentChannel++)
+			PowerDeltaPerChannel[CurrentChannel] = RTATEInsertTssi(CurrentChannel, 1, 7, PowerDeltaPerChannel[1], PowerDeltaPerChannel[7]);
+
+		/* insert channel 8 to 12 TSSI values */
+		/*
+			for(CurrentChannel = 8; CurrentChannel < 13; CurrentChannel++)
+				TssiRefPerChannel[CurrentChannel] = RTATEInsertTssi(CurrentChannel, 7, 13, TssiRefPerChannel[7], TssiRefPerChannel[13]);
+		*/
+		for (CurrentChannel = 8; CurrentChannel < 13; CurrentChannel++)
+			PowerDeltaPerChannel[CurrentChannel] = RTATEInsertTssi(CurrentChannel, 7, 13, PowerDeltaPerChannel[7], PowerDeltaPerChannel[13]);
+
+
+		/* channel 14 TSSI equals channel 13 TSSI */
+		/* TssiRefPerChannel[14] = TssiRefPerChannel[13]; */
+		PowerDeltaPerChannel[14] = PowerDeltaPerChannel[13];
+
+		for (CurrentChannel = 1; CurrentChannel <= 14; CurrentChannel++)
+		{
+			DBGPRINT(RT_DEBUG_WARN, ("Channel %d, PowerDeltaPerChannel= 0x%x\n", CurrentChannel, PowerDeltaPerChannel[CurrentChannel]));
+		
+			/* PowerDeltaPerChannel[CurrentChannel] = GetPowerDeltaFromTssiRatio(TssiRefPerChannel[CurrentChannel], TssiBase); */
+
+			/* boundary check */
+			if (PowerDeltaPerChannel[CurrentChannel] > 7)
+				PowerDeltaPerChannel[CurrentChannel] = 7;
+			if (PowerDeltaPerChannel[CurrentChannel] < -8)
+				PowerDeltaPerChannel[CurrentChannel] = -8;
+
+			/* eeprom only use 4 bit for TSSI delta */
+			PowerDeltaPerChannel[CurrentChannel] &= 0x0f;
+			DBGPRINT(RT_DEBUG_WARN, ("Channel = %d, PowerDeltaPerChannel=0x%x\n", CurrentChannel, PowerDeltaPerChannel[CurrentChannel]));	
+		}
+	
+
+		/* step 4: store TSSI delta values to EEPROM 0x6f - 0x75 */
+		RT28xx_EEPROM_READ16(pAd, EEPROM_TX_POWER_OFFSET_OVER_CH_1-1, EEPData);
+		EEPData &= 0x00ff;
+		EEPData |= (PowerDeltaPerChannel[1] << 8) | (PowerDeltaPerChannel[2] << 12);
+		RT28xx_EEPROM_WRITE16(pAd, EEPROM_TX_POWER_OFFSET_OVER_CH_1-1, EEPData);
+		
+		for (CurrentChannel = 3; CurrentChannel <= 14; CurrentChannel += 4)
+		{
+			/* EEPData = ( TssiDeltaPerChannel[CurrentChannel+2]  << 12) |(  TssiDeltaPerChannel[CurrentChannel+1]  << 8); */
+			/* DBGPRINT(RT_DEBUG_TRACE, ("CurrentChannel=%d, TssiDeltaPerChannel[CurrentChannel+2] = 0x%x, EEPData=0x%x\n", CurrentChannel, TssiDeltaPerChannel[CurrentChannel+2], EEPData)); */
+			EEPData = (PowerDeltaPerChannel[CurrentChannel + 3] << 12) | (PowerDeltaPerChannel[CurrentChannel + 2] << 8) | 
+				(PowerDeltaPerChannel[CurrentChannel + 1] << 4) | PowerDeltaPerChannel[CurrentChannel];
+			RT28xx_EEPROM_WRITE16(pAd, (EEPROM_TX_POWER_OFFSET_OVER_CH_3 + ((CurrentChannel - 3) / 2)), EEPData);
+			/* DBGPRINT(RT_DEBUG_TRACE, ("offset=0x%x, EEPData = 0x%x\n", (EEPROM_TSSI_DELTA_CH3_CH4 +((CurrentChannel-3)/2)),EEPData));	*/
+		}
+						
+		/* restore RF R27 and R28, BBP R47 */
+		/* RT30xxWriteRFRegister(pAd, RF_R27, RF27Value); */				
+		/* RT30xxWriteRFRegister(pAd, RF_R28, RF28Value); */
+
+		Set_ATE_Proc(pAd, "ATESTART");
+	}
+
+	return TRUE;
+}
+#endif /* RALINK_ATE */
+#endif /* defined(RT5370) || defined(RT5390) */
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+#ifdef RTMP_TEMPERATURE_COMPENSATION
+INT RT5392_ATEReadExternalTSSI(
+	IN	PRTMP_ADAPTER		pAd,
+	IN	PSTRING				arg)
+{
+	UCHAR	inputData, RFValue, BbpData;
+	USHORT	EEPData, EEPTemp;
+
+	inputData = simple_strtol(arg, 0, 10);
+	
+	RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, EEPData);
+
+	if (!(IS_RT5392(pAd) && ((EEPData & 0x02) != 0)))			
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("Not support TSSI calibration since not 5392 chip or EEPROM not set!!!\n"));
+		return FALSE;
+	}
+	else
+	{	
+		/* BBP R47[7]=1 : ADC 6 on */
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BbpData);
+		BbpData |= 0x80;
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R47, BbpData);
+
+		/* RF R27[7:6]=0x1 : Adc_insel 01:Temp */	
+		/* Write RF R27[3:0]=EEPROM 0x76 bit[3:0] */
+		RT30xxReadRFRegister(pAd, RF_R27, &RFValue);	
+		RFValue &= ~0xC0;
+		RFValue |= 0x40;
+		RFValue = ((RFValue & 0xF0) | pAd->TssiGain); /* [3:0] = (tssi_gain and tssi_atten) */
+		RT30xxWriteRFRegister(pAd, RF_R27, RFValue);			
+
+		/* Wait 1ms. */					
+		RTMPusecDelay(1000);
+
+		/* Read BBP R49 reading as return value. */
+		DBGPRINT(RT_DEBUG_TRACE, ("Read  BBP_R49\n")); 
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R49, &BbpData);
+		DBGPRINT(RT_DEBUG_TRACE, ("BBP R49=0x%x\n", BbpData));
+
+		RT28xx_EEPROM_READ16(pAd, EEPROM_TSSI_STEP_OVER_2DOT4G, EEPData);
+		/* RT28xx_EEPROM_READ16(pAd, EEPROM_TSSI_STEP_OVER_2DOT4G, EEPTemp); */
+		/* BbpData = (BbpData + (UCHAR) (EEPTemp & 0xff)) / 2; */
+		EEPData &= 0xff00;
+		EEPData |= BbpData;
+			
+#ifdef RTMP_EFUSE_SUPPORT
+		if (pAd->bUseEfuse)
+		{
+			if (pAd->bFroceEEPROMBuffer)
+				NdisMoveMemory(&(pAd->EEPROMImage[EEPROM_TSSI_STEP_OVER_2DOT4G]), (PUCHAR)(&EEPData) ,2);
+			else
+			    	eFuseWrite(pAd, EEPROM_TSSI_STEP_OVER_2DOT4G, (PUCHAR)(&EEPData), 2);
+		}
+		else
+#endif /* RTMP_EFUSE_SUPPORT */
+		{
+			RT28xx_EEPROM_WRITE16(pAd, EEPROM_TSSI_STEP_OVER_2DOT4G, EEPData);
+			RTMPusecDelay(10);
+		}   
+
+		/* RF R27[7:6]=0x0 */
+		RT30xxReadRFRegister(pAd, RF_R27, &RFValue);	
+		RFValue &= ~0xC0;
+		RT30xxWriteRFRegister(pAd, RF_R27, RFValue);		
+	}
+
+	return TRUE;
+}
+#endif /* RTMP_TEMPERATURE_COMPENSATION */
+
+VOID RT5390_RTMPSetAGCInitValue(
+	IN PRTMP_ADAPTER		pAd,
+	IN UCHAR				BandWidth)
+{
+	UCHAR	R66 = 0x30;
+	
+	if (pAd->LatchRfRegs.Channel <= 14)
+	{	/* BG band */
+
+		/* Gary was verified Amazon AP and find that RT307x has BBP_R66 invalid default value */
+		if (IS_RT5390(pAd))
+		{
+			R66 = 0x1C + 2*GET_LNA_GAIN(pAd);
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+			if (IS_RT5390(pAd))
+			{
+				if (IS_RT5392(pAd))
+				{
+					RT5392WriteBBPR66(pAd, R66);
+				}
+				else
+				{
+					RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
+				}	
+			}	
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+		}
+		else
+		{
+			R66 = 0x2E + GET_LNA_GAIN(pAd);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
+		}
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+/*20100902 update for Rx Sensitive*/
+	if (IS_RT5392(pAd))
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R135 ,0xF6);
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+	}
+	else
+	{	/*A band */
+		{	
+			if (BandWidth == BW_20)
+			{
+				R66 = (UCHAR)(0x32 + (GET_LNA_GAIN(pAd)*5)/3);
+
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
+			}
+#ifdef DOT11_N_SUPPORT
+			else
+			{
+				R66 = (UCHAR)(0x3A + (GET_LNA_GAIN(pAd)*5)/3);
+
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
+			}
+#endif /* DOT11_N_SUPPORT */
+		}		
+	}
+
+}
+
+VOID RT5390_ChipResumeMsduTransmission(
+	IN	PRTMP_ADAPTER		pAd)
+{    
+	if (IS_RT5392(pAd))
+		RT5392WriteBBPR66(pAd, pAd->BbpTuning.R66CurrentValue);
+	else
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, pAd->BbpTuning.R66CurrentValue);
+}
+
+VOID RT5390_AsicResetBbpAgent(
+	IN PRTMP_ADAPTER		pAd)	
+{	
+	if (IS_RT5392(pAd))
+	{
+	ULONG loop = 0;
+	UINT8 BBPValue = 0;
+	UINT32 MacValue = 0;
+		
+	/* step 1: disable PA. */
+	RTMP_IO_READ32(pAd, 0x1328, &MacValue);
+	RTMP_IO_WRITE32(pAd, 0x1328, (MacValue & 0xfffff0f0));
+
+	/* step 2: re-calibarate BBP IQ. */
+	BBP_IO_WRITE8_BY_REG_ID(pAd,158,0x00);
+	BBP_IO_WRITE8_BY_REG_ID(pAd,159,0x80);
+
+	/* step3: check re-calibarate BBP IQ done. */
+	do
+	{
+		BBP_IO_READ8_BY_REG_ID(pAd,159,&BBPValue);
+		RTMPusecDelay(5);
+	} while ((BBPValue != 0) || (loop++ <= 100));
+		
+	if (loop == 101)
+		DBGPRINT(RT_DEBUG_OFF, ("BBP re-calibaration fail! \n"));
+
+	/* step4: enable PA. */
+	RTMP_IO_READ32(pAd, 0x1328, &MacValue);
+	RTMP_IO_WRITE32(pAd, 0x1328, (MacValue | 0x00050f0f));	
+	}
+}
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/chips/rtmp_chip.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/chips/rtmp_chip.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/chips/rtmp_chip.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/chips/rtmp_chip.c	2017-09-23 03:42:49.698676042 +0800
@@ -0,0 +1,1762 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+
+
+FREQUENCY_ITEM RtmpFreqItems3020[] =
+{	
+	/* ISM : 2.4 to 2.483 GHz                         */
+	/* 11g*/
+	/*-CH---N-------R---K-----------*/
+	{1,    241,  2,  2},
+	{2,    241,	 2,  7},
+	{3,    242,	 2,  2},
+	{4,    242,	 2,  7},
+	{5,    243,	 2,  2},
+	{6,    243,	 2,  7},
+	{7,    244,	 2,  2},
+	{8,    244,	 2,  7},
+	{9,    245,	 2,  2},
+	{10,   245,	 2,  7},
+	{11,   246,	 2,  2},
+	{12,   246,	 2,  7},
+	{13,   247,	 2,  2},
+	{14,   248,	 2,  4},
+};
+
+FREQUENCY_ITEM FreqItems3020_Xtal20M[] =
+{	
+	/*
+	 * RF_R08:
+	 * <7:0>: pll_N<7:0>
+	 *
+	 * RF_R09:
+	 * <3:0>: pll_K<3:0>
+	 * <4>: pll_N<8>
+	 * <7:5>pll_N<11:9>
+	 *
+	 */
+	/*-CH---N--------R---N[7:4]K[3:0]------*/
+	{1,    0xE2,     2,  0x14},
+	{2,    0xE3,	 2,  0x14},
+	{3,    0xE4,	 2,  0x14},
+	{4,    0xE5,	 2,  0x14},
+	{5,    0xE6,	 2,  0x14},
+	{6,    0xE7,	 2,  0x14},
+	{7,    0xE8,	 2,  0x14},
+	{8,    0xE9,	 2,  0x14},
+	{9,    0xEA,	 2,  0x14},
+	{10,   0xEB,	 2,  0x14},
+	{11,   0xEC,	 2,  0x14},
+	{12,   0xED,	 2,  0x14},
+	{13,   0xEE,	 2,  0x14},
+	{14,   0xF0,	 2,  0x18},
+};
+
+UCHAR	NUM_OF_3020_CHNL = (sizeof(RtmpFreqItems3020) / sizeof(FREQUENCY_ITEM));
+
+FREQUENCY_ITEM *FreqItems3020 = RtmpFreqItems3020;
+
+#if defined(RT28xx) || defined(RT2883)
+/* Reset the RFIC setting to new series    */
+RTMP_RF_REGS RF2850RegTable[] = {
+/*		ch	 R1 		 R2 		 R3(TX0~4=0) R4*/
+		{1,  0x98402ecc, 0x984c0786, 0x9816b455, 0x9800510b},
+		{2,  0x98402ecc, 0x984c0786, 0x98168a55, 0x9800519f},
+		{3,  0x98402ecc, 0x984c078a, 0x98168a55, 0x9800518b},
+		{4,  0x98402ecc, 0x984c078a, 0x98168a55, 0x9800519f},
+		{5,  0x98402ecc, 0x984c078e, 0x98168a55, 0x9800518b},
+		{6,  0x98402ecc, 0x984c078e, 0x98168a55, 0x9800519f},
+		{7,  0x98402ecc, 0x984c0792, 0x98168a55, 0x9800518b},
+		{8,  0x98402ecc, 0x984c0792, 0x98168a55, 0x9800519f},
+		{9,  0x98402ecc, 0x984c0796, 0x98168a55, 0x9800518b},
+		{10, 0x98402ecc, 0x984c0796, 0x98168a55, 0x9800519f},
+		{11, 0x98402ecc, 0x984c079a, 0x98168a55, 0x9800518b},
+		{12, 0x98402ecc, 0x984c079a, 0x98168a55, 0x9800519f},
+		{13, 0x98402ecc, 0x984c079e, 0x98168a55, 0x9800518b},
+		{14, 0x98402ecc, 0x984c07a2, 0x98168a55, 0x98005193},
+
+		/* 802.11 UNI / HyperLan 2*/
+		{36, 0x98402ecc, 0x984c099a, 0x98158a55, 0x980ed1a3},
+		{38, 0x98402ecc, 0x984c099e, 0x98158a55, 0x980ed193},
+		{40, 0x98402ec8, 0x984c0682, 0x98158a55, 0x980ed183},
+		{44, 0x98402ec8, 0x984c0682, 0x98158a55, 0x980ed1a3},
+		{46, 0x98402ec8, 0x984c0686, 0x98158a55, 0x980ed18b},
+		{48, 0x98402ec8, 0x984c0686, 0x98158a55, 0x980ed19b},
+		{52, 0x98402ec8, 0x984c068a, 0x98158a55, 0x980ed193},
+		{54, 0x98402ec8, 0x984c068a, 0x98158a55, 0x980ed1a3},
+		{56, 0x98402ec8, 0x984c068e, 0x98158a55, 0x980ed18b},
+		{60, 0x98402ec8, 0x984c0692, 0x98158a55, 0x980ed183},
+		{62, 0x98402ec8, 0x984c0692, 0x98158a55, 0x980ed193},
+		{64, 0x98402ec8, 0x984c0692, 0x98158a55, 0x980ed1a3}, /* Plugfest#4, Day4, change RFR3 left4th 9->5.*/
+
+		/* 802.11 HyperLan 2*/
+		{100, 0x98402ec8, 0x984c06b2, 0x98178a55, 0x980ed783},
+		
+		/* 2008.04.30 modified */
+		/* The system team has AN to improve the EVM value */
+		/* for channel 102 to 108 for the RT2850/RT2750 dual band solution.*/
+		{102, 0x98402ec8, 0x985c06b2, 0x98578a55, 0x980ed793},
+		{104, 0x98402ec8, 0x985c06b2, 0x98578a55, 0x980ed1a3},
+		{108, 0x98402ecc, 0x985c0a32, 0x98578a55, 0x980ed193},
+
+		{110, 0x98402ecc, 0x984c0a36, 0x98178a55, 0x980ed183},
+		{112, 0x98402ecc, 0x984c0a36, 0x98178a55, 0x980ed19b},
+		{116, 0x98402ecc, 0x984c0a3a, 0x98178a55, 0x980ed1a3},
+		{118, 0x98402ecc, 0x984c0a3e, 0x98178a55, 0x980ed193},
+		{120, 0x98402ec4, 0x984c0382, 0x98178a55, 0x980ed183},
+		{124, 0x98402ec4, 0x984c0382, 0x98178a55, 0x980ed193},
+		{126, 0x98402ec4, 0x984c0382, 0x98178a55, 0x980ed15b}, /* 0x980ed1bb->0x980ed15b required by Rory 20070927*/
+		{128, 0x98402ec4, 0x984c0382, 0x98178a55, 0x980ed1a3},
+		{132, 0x98402ec4, 0x984c0386, 0x98178a55, 0x980ed18b},
+		{134, 0x98402ec4, 0x984c0386, 0x98178a55, 0x980ed193},
+		{136, 0x98402ec4, 0x984c0386, 0x98178a55, 0x980ed19b},
+		{140, 0x98402ec4, 0x984c038a, 0x98178a55, 0x980ed183},
+
+		/* 802.11 UNII*/
+		{149, 0x98402ec4, 0x984c038a, 0x98178a55, 0x980ed1a7},
+		{151, 0x98402ec4, 0x984c038e, 0x98178a55, 0x980ed187},
+		{153, 0x98402ec4, 0x984c038e, 0x98178a55, 0x980ed18f},
+		{157, 0x98402ec4, 0x984c038e, 0x98178a55, 0x980ed19f},
+		{159, 0x98402ec4, 0x984c038e, 0x98178a55, 0x980ed1a7},
+		{161, 0x98402ec4, 0x984c0392, 0x98178a55, 0x980ed187},
+		{165, 0x98402ec4, 0x984c0392, 0x98178a55, 0x980ed197},
+		{167, 0x98402ec4, 0x984c03d2, 0x98179855, 0x9815531f},
+		{169, 0x98402ec4, 0x984c03d2, 0x98179855, 0x98155327},
+		{171, 0x98402ec4, 0x984c03d6, 0x98179855, 0x98155307},
+		{173, 0x98402ec4, 0x984c03d6, 0x98179855, 0x9815530f},
+
+		/* Japan*/
+		{184, 0x95002ccc, 0x9500491e, 0x9509be55, 0x950c0a0b},
+		{188, 0x95002ccc, 0x95004922, 0x9509be55, 0x950c0a13},
+		{192, 0x95002ccc, 0x95004926, 0x9509be55, 0x950c0a1b},
+		{196, 0x95002ccc, 0x9500492a, 0x9509be55, 0x950c0a23},
+		{208, 0x95002ccc, 0x9500493a, 0x9509be55, 0x950c0a13},
+		{212, 0x95002ccc, 0x9500493e, 0x9509be55, 0x950c0a1b},
+		{216, 0x95002ccc, 0x95004982, 0x9509be55, 0x950c0a23},
+
+		/* still lack of MMAC(Japan) ch 34,38,42,46*/
+};
+UCHAR	NUM_OF_2850_CHNL = (sizeof(RF2850RegTable) / sizeof(RTMP_RF_REGS));
+#endif /* defined(RT28xx) || defined(RT2883) */
+
+#ifdef RTMP_INTERNAL_TX_ALC
+/* The desired TSSI over CCK */
+CHAR desiredTSSIOverCCK[4] = {0};
+
+/* The desired TSSI over OFDM */
+CHAR desiredTSSIOverOFDM[8] = {0};
+
+/* The desired TSSI over HT */
+CHAR desiredTSSIOverHT[16] = {0};
+
+/* The desired TSSI over HT using STBC */
+CHAR desiredTSSIOverHTUsingSTBC[8] = {0};
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+
+
+
+/* private function prototype */
+
+static VOID RxSensitivityTuning(
+	IN PRTMP_ADAPTER		pAd);
+
+static VOID ChipResumeMsduTransmission(
+	IN	PRTMP_ADAPTER		pAd);
+
+#ifdef CONFIG_STA_SUPPORT
+static UCHAR ChipStaBBPAdjust(
+	IN PRTMP_ADAPTER		pAd,
+	IN CHAR					Rssi,
+	IN UCHAR				R66);
+#endif /* CONFIG_STA_SUPPORT */
+
+static VOID ChipBBPAdjust(
+	IN RTMP_ADAPTER			*pAd);
+
+static VOID ChipSwitchChannel(
+	IN PRTMP_ADAPTER 		pAd,
+	IN UCHAR				Channel,
+	IN BOOLEAN				bScan);
+
+#ifdef RTMP_INTERNAL_TX_ALC
+static VOID InitDesiredTSSITableDefault(
+	IN PRTMP_ADAPTER		pAd);
+
+static VOID AsicTxAlcGetAutoAgcOffset(
+	IN PRTMP_ADAPTER		pAd,
+	IN PCHAR			pDeltaPwr,
+	IN PCHAR			pTotalDeltaPwr,
+	IN PCHAR			pAgcCompensate,
+	IN PUCHAR			pBbpR49);
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+static VOID AsicSetAGCInitValue(
+	IN PRTMP_ADAPTER		pAd,
+	IN UCHAR				BandWidth);
+
+static VOID AsicAntennaDefaultReset(
+	IN PRTMP_ADAPTER		pAd,
+	IN EEPROM_ANTENNA_STRUC	*pAntenna);
+
+static VOID NetDevNickNameInit(
+	IN PRTMP_ADAPTER		pAd);
+
+
+
+
+/*
+========================================================================
+Routine Description:
+	Initialize specific beacon frame architecture.
+
+Arguments:
+	pAd				- WLAN control block pointer
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpChipBcnSpecInit(
+	IN RTMP_ADAPTER			*pAd)
+{
+#ifdef MBSS_SUPPORT
+#ifdef SPECIFIC_BCN_BUF_SUPPORT
+	RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
+
+
+	pChipCap->FlgIsSupSpecBcnBuf = TRUE;
+	pChipCap->BcnMaxHwNum = 16;
+	pChipCap->WcidHwRsvNum = 255;
+
+/* 	In 16-MBSS support mode, if AP-Client is enabled, 
+	the last 8-MBSS would be occupied for AP-Client using. */
+#ifdef APCLI_SUPPORT
+	pChipCap->BcnMaxNum = (8 - MAX_MESH_NUM);
+#else
+	pChipCap->BcnMaxNum = (16 - MAX_MESH_NUM);
+#endif /* APCLI_SUPPORT */
+
+	pChipCap->BcnMaxHwSize = 0x2000;
+
+	/* It's allowed to use the higher(secordary) 8KB shared memory */
+	pChipCap->BcnBase[0] = 0x4000;
+	pChipCap->BcnBase[1] = 0x4200;
+	pChipCap->BcnBase[2] = 0x4400;
+	pChipCap->BcnBase[3] = 0x4600;
+	pChipCap->BcnBase[4] = 0x4800;
+	pChipCap->BcnBase[5] = 0x4A00;
+	pChipCap->BcnBase[6] = 0x4C00;
+	pChipCap->BcnBase[7] = 0x4E00;
+	pChipCap->BcnBase[8] = 0x5000;
+	pChipCap->BcnBase[9] = 0x5200;
+	pChipCap->BcnBase[10] = 0x5400;
+	pChipCap->BcnBase[11] = 0x5600;
+	pChipCap->BcnBase[12] = 0x5800;
+	pChipCap->BcnBase[13] = 0x5A00;
+	pChipCap->BcnBase[14] = 0x5C00;
+	pChipCap->BcnBase[15] = 0x5E00;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<<<<< Beacon Spec Information: >>>>>\n"));
+	DBGPRINT(RT_DEBUG_TRACE, ("\tBcnMaxHwNum = \t%d\n", pChipCap->BcnMaxHwNum));
+	DBGPRINT(RT_DEBUG_TRACE, ("\tBcnMaxNum = \t%d\n", pChipCap->BcnMaxNum));
+	DBGPRINT(RT_DEBUG_TRACE, ("\tBcnMaxHwSize = \t0x%x\n", pChipCap->BcnMaxHwSize));
+	DBGPRINT(RT_DEBUG_TRACE, ("\tWcidHwRsvNum = \t%d\n", pChipCap->WcidHwRsvNum));
+	DBGPRINT(RT_DEBUG_TRACE, ("\tBcnBase[0] = \t0x%x\n", pChipCap->BcnBase[0]));
+	DBGPRINT(RT_DEBUG_TRACE, ("\tBcnBase[8] = \t0x%x\n", pChipCap->BcnBase[8]));
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */
+#endif /* MBSS_SUPPORT */
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Initialize normal beacon frame architecture.
+
+Arguments:
+	pAd				- WLAN control block pointer
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpChipBcnInit(
+	IN RTMP_ADAPTER *pAd)
+{
+	RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
+
+
+	pChipCap->FlgIsSupSpecBcnBuf = FALSE;
+	pChipCap->BcnMaxHwNum = 8;
+	pChipCap->BcnMaxNum = (pChipCap->BcnMaxHwNum - MAX_MESH_NUM - MAX_APCLI_NUM);
+	pChipCap->BcnMaxHwSize = 0x1000;
+
+	pChipCap->BcnBase[0] = 0x7800;
+	pChipCap->BcnBase[1] = 0x7A00;
+	pChipCap->BcnBase[2] = 0x7C00;
+	pChipCap->BcnBase[3] = 0x7E00;
+	pChipCap->BcnBase[4] = 0x7200;
+	pChipCap->BcnBase[5] = 0x7400;
+	pChipCap->BcnBase[6] = 0x5DC0;
+	pChipCap->BcnBase[7] = 0x5BC0;
+
+	/* If the MAX_MBSSID_NUM is larger than 6, */
+	/* it shall reserve some WCID space(wcid 222~253) for beacon frames. */
+	/* -	these wcid 238~253 are reserved for beacon#6(ra6).*/
+	/* -	these wcid 222~237 are reserved for beacon#7(ra7).*/
+	if (pChipCap->BcnMaxNum == 8)
+		pChipCap->WcidHwRsvNum = 222;
+	else if (pChipCap->BcnMaxNum == 7)
+		pChipCap->WcidHwRsvNum = 238;
+	else
+		pChipCap->WcidHwRsvNum = 255;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<<<<< Beacon Information: >>>>>\n"));
+	DBGPRINT(RT_DEBUG_TRACE, ("\tBcnMaxHwNum = \t%d\n", pChipCap->BcnMaxHwNum));
+	DBGPRINT(RT_DEBUG_TRACE, ("\tBcnMaxNum = \t%d\n", pChipCap->BcnMaxNum));
+	DBGPRINT(RT_DEBUG_TRACE, ("\tBcnMaxHwSize = \t0x%x\n", pChipCap->BcnMaxHwSize));
+	DBGPRINT(RT_DEBUG_TRACE, ("\tWcidHwRsvNum = \t%d\n", pChipCap->WcidHwRsvNum));
+	DBGPRINT(RT_DEBUG_TRACE, ("\tBcnBase[0] = \t0x%x\n", pChipCap->BcnBase[0]));
+	DBGPRINT(RT_DEBUG_TRACE, ("\tBcnBase[1] = \t0x%x\n", pChipCap->BcnBase[1]));
+	DBGPRINT(RT_DEBUG_TRACE, ("\tBcnBase[2] = \t0x%x\n", pChipCap->BcnBase[2]));
+	DBGPRINT(RT_DEBUG_TRACE, ("\tBcnBase[3] = \t0x%x\n", pChipCap->BcnBase[3]));
+	DBGPRINT(RT_DEBUG_TRACE, ("\tBcnBase[4] = \t0x%x\n", pChipCap->BcnBase[4]));
+	DBGPRINT(RT_DEBUG_TRACE, ("\tBcnBase[5] = \t0x%x\n", pChipCap->BcnBase[5]));
+	DBGPRINT(RT_DEBUG_TRACE, ("\tBcnBase[6] = \t0x%x\n", pChipCap->BcnBase[6]));
+	DBGPRINT(RT_DEBUG_TRACE, ("\tBcnBase[7] = \t0x%x\n", pChipCap->BcnBase[7]));
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Initialize chip related information.
+
+Arguments:
+	pCB				- WLAN control block pointer
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpChipOpsHook(
+	IN VOID			*pCB)
+{
+	RTMP_ADAPTER *pAd = (RTMP_ADAPTER *)pCB;
+	RTMP_CHIP_OP *pChipOps = &pAd->chipOps;
+	RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
+	EEPROM_ANTENNA_STRUC Antenna;
+	USHORT value;
+
+
+	/* get RF IC type */
+	RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
+	pAd->EEPROMDefaultValue[EEPROM_NIC_CFG1_OFFSET] = value;
+	Antenna.word = pAd->EEPROMDefaultValue[EEPROM_NIC_CFG1_OFFSET];
+	pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
+	DBGPRINT(RT_DEBUG_TRACE, ("RF IC Type: %d\n", pAd->RfIcType));
+
+	/* save the antenna for future use */
+	pAd->Antenna.word = Antenna.word;
+
+
+	/* init default value whatever chipsets */
+	/* default pChipOps content will be 0x00 */
+	pChipCap->bbpRegTbSize = 0;
+	pChipCap->MaxNumOfRfId = 31;
+	pChipCap->MaxNumOfBbpId = 136;
+	pChipCap->SnrFormula = SNR_FORMULA1;
+	pChipCap->RfReg17WtMethod = RF_REG_WT_METHOD_NONE;
+
+#ifdef RTMP_INTERNAL_TX_ALC
+	pChipCap->TxAlcTxPowerUpperBound = 45;
+	pChipCap->TxAlcMaxMCS = 8;
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+#ifdef RTMP_EFUSE_SUPPORT
+	pChipCap->EFUSE_USAGE_MAP_START = 0x2d0;
+	pChipCap->EFUSE_USAGE_MAP_END = 0x2fc;
+{     
+        pChipCap->EFUSE_USAGE_MAP_SIZE = 45;
+}
+
+	DBGPRINT(RT_DEBUG_ERROR, ("(Efuse for 3062/3562/3572) Size=0x%x [%x-%x] \n",pAd->chipCap.EFUSE_USAGE_MAP_SIZE,pAd->chipCap.EFUSE_USAGE_MAP_START,pAd->chipCap.EFUSE_USAGE_MAP_END));
+#endif /* RTMP_EFUSE_SUPPORT */
+
+	pChipCap->FlgIsVcoReCalSup = FALSE;
+
+	RtmpChipBcnInit(pAd);
+
+
+	pChipOps->RxSensitivityTuning = RxSensitivityTuning;
+	pChipOps->ChipResumeMsduTransmission = ChipResumeMsduTransmission;
+#ifdef CONFIG_STA_SUPPORT
+	pChipOps->ChipStaBBPAdjust = ChipStaBBPAdjust;
+#endif /* CONFIG_STA_SUPPORT */
+	pChipOps->ChipBBPAdjust = ChipBBPAdjust;
+	pChipOps->ChipSwitchChannel = ChipSwitchChannel;
+
+#ifdef RTMP_INTERNAL_TX_ALC
+	pChipOps->InitDesiredTSSITable = InitDesiredTSSITableDefault;
+	pChipOps->AsicTxAlcGetAutoAgcOffset = AsicTxAlcGetAutoAgcOffset;
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+	pChipOps->RTMPSetAGCInitValue = AsicSetAGCInitValue;
+
+	pChipOps->AsicAntennaDefaultReset = AsicAntennaDefaultReset;
+	pChipOps->NetDevNickNameInit = NetDevNickNameInit;
+	/* Init value. If pChipOps->AsicResetBbpAgent==NULL, "AsicResetBbpAgent" as default. If your chipset has specific routine, please re-hook it at self init function */
+	pChipOps->AsicResetBbpAgent = NULL;
+
+#ifdef RT28xx
+	pChipOps->ChipSwitchChannel = RT28xx_ChipSwitchChannel;
+#endif /* RT28xx */
+
+	/* We depends on RfICType and MACVersion to assign the corresponding operation callbacks. */
+
+
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+	if (IS_RT5390(pAd))
+	{
+		RT5390_Init(pAd);
+	}
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+
+
+
+
+
+
+#ifdef RT30xx
+
+
+	if (IS_RT30xx(pAd))
+	{
+		if (IS_RT3390(pAd))
+			;
+//			RT33xx_Init(pAd);	//lxy
+		else
+			RT30xx_Init(pAd);
+	}
+#endif /* RT30xx */
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Chip specific bbpRegTbSize=%d!\n", pChipCap->bbpRegTbSize));
+	
+}
+
+
+
+
+
+static VOID RxSensitivityTuning(
+	IN PRTMP_ADAPTER		pAd)
+{
+	UCHAR R66;
+
+
+	R66 = 0x26 + GET_LNA_GAIN(pAd);
+#ifdef RALINK_ATE
+	if (ATE_ON(pAd))
+	{
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, (0x26 + GET_LNA_GAIN(pAd)));
+	}
+	else
+#endif /* RALINK_ATE */
+	{
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, (0x26 + GET_LNA_GAIN(pAd)));
+	}
+	DBGPRINT(RT_DEBUG_TRACE,("turn off R17 tuning, restore to 0x%02x\n", R66));
+}
+
+
+/*
+	========================================================================
+
+	Routine Description:
+		Resume MSDU transmission
+		
+	Arguments:
+		pAd 	Pointer to our adapter
+		
+	Return Value:
+		None
+		
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+	
+	========================================================================
+*/
+static VOID ChipResumeMsduTransmission(
+	IN	PRTMP_ADAPTER		pAd)
+{
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, pAd->BbpTuning.R66CurrentValue);
+}
+
+
+#ifdef CONFIG_STA_SUPPORT
+static UCHAR ChipStaBBPAdjust(
+	IN PRTMP_ADAPTER		pAd,
+	IN CHAR					Rssi,
+	IN UCHAR				R66)
+{
+	UCHAR	OrigR66Value = 0;/*, R66UpperBound = 0x30, R66LowerBound = 0x30;*/
+
+	if (pAd->LatchRfRegs.Channel <= 14)
+	{	/*BG band*/
+		{
+			if (Rssi > RSSI_FOR_MID_LOW_SENSIBILITY)
+			{
+				R66 = (0x2E + GET_LNA_GAIN(pAd)) + 0x10;
+				if (OrigR66Value != R66)
+				{
+					RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
+				}
+			}
+			else
+			{
+				R66 = 0x2E + GET_LNA_GAIN(pAd);
+				if (OrigR66Value != R66)
+				{
+					RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
+				}
+			}
+		}
+	}
+	else
+	{	/*A band*/
+		if (pAd->CommonCfg.BBPCurrentBW == BW_20)
+		{
+			if (Rssi > RSSI_FOR_MID_LOW_SENSIBILITY)
+			{
+				R66 = 0x32 + (GET_LNA_GAIN(pAd)*5)/3 + 0x10;
+
+				if (OrigR66Value != R66)
+				{
+						RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
+				}
+			}
+			else
+			{
+				R66 = 0x32 + (GET_LNA_GAIN(pAd)*5)/3;
+
+				if (OrigR66Value != R66)
+				{
+						RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
+				}
+			}
+		}
+		else
+		{
+			if (Rssi > RSSI_FOR_MID_LOW_SENSIBILITY)
+			{
+				R66 = 0x3A + (GET_LNA_GAIN(pAd)*5)/3 + 0x10;
+
+				if (OrigR66Value != R66)
+				{
+						RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
+				}
+			}
+			else
+			{
+				R66 = 0x3A + (GET_LNA_GAIN(pAd)*5)/3;
+
+				if (OrigR66Value != R66)
+				{
+						RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
+				}
+			}
+		}
+	}
+
+	return R66;
+}
+#endif /* CONFIG_STA_SUPPORT */
+
+
+static VOID ChipBBPAdjust(
+	IN RTMP_ADAPTER			*pAd)
+{
+	UINT32 Value;
+	UCHAR byteValue = 0;
+
+
+#ifdef DOT11_N_SUPPORT
+	if ((pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth  == BW_40) && 
+		(pAd->CommonCfg.RegTransmitSetting.field.EXTCHA == EXTCHA_ABOVE)
+		/*(pAd->CommonCfg.AddHTInfo.AddHtInfo.ExtChanOffset == EXTCHA_ABOVE)*/
+	)
+	{
+		{
+		pAd->CommonCfg.BBPCurrentBW = BW_40;
+		pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel + 2;
+		}
+		/*  TX : control channel at lower */
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
+		Value &= (~0x1);
+		RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
+
+		/*  RX : control channel at lower */
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &byteValue);
+		byteValue &= (~0x20);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, byteValue);
+
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &byteValue);
+		byteValue &= (~0x18);
+		byteValue |= 0x10;
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, byteValue);
+
+		if (pAd->CommonCfg.Channel > 14)
+		{ 	/* request by Gary 20070208 for middle and long range A Band*/
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, 0x48);
+		}
+		else
+		{	/* request by Gary 20070208 for middle and long range G Band*/
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, 0x38);
+		}	
+		/* */
+		if (pAd->MACVersion == 0x28600100)
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
+		}
+		else
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x12);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x10);
+		}	
+
+		DBGPRINT(RT_DEBUG_TRACE, ("ApStartUp : ExtAbove, ChannelWidth=%d, Channel=%d, ExtChanOffset=%d(%d) \n",
+									pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth, 
+									pAd->CommonCfg.Channel, 
+									pAd->CommonCfg.RegTransmitSetting.field.EXTCHA,
+									pAd->CommonCfg.AddHTInfo.AddHtInfo.ExtChanOffset));
+	}
+	else if ((pAd->CommonCfg.Channel > 2) && 
+			(pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth  == BW_40) && 
+			(pAd->CommonCfg.RegTransmitSetting.field.EXTCHA == EXTCHA_BELOW)
+			/*(pAd->CommonCfg.AddHTInfo.AddHtInfo.ExtChanOffset == EXTCHA_BELOW)*/)
+	{
+		pAd->CommonCfg.BBPCurrentBW = BW_40;
+
+		if (pAd->CommonCfg.Channel == 14)
+			pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel - 1;
+		else
+			pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel - 2;
+		/*  TX : control channel at upper */
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
+		Value |= (0x1);		
+		RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
+
+		/*  RX : control channel at upper */
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &byteValue);
+		byteValue |= (0x20);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, byteValue);
+
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &byteValue);
+		byteValue &= (~0x18);
+		byteValue |= 0x10;
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, byteValue);
+		
+		if (pAd->CommonCfg.Channel > 14)
+		{ 	/* request by Gary 20070208 for middle and long range A Band*/
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, 0x48);
+		}
+		else
+		{ 	/* request by Gary 20070208 for middle and long range G band*/
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, 0x38);
+		}	
+	
+		
+		if (pAd->MACVersion == 0x28600100)
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
+		}
+		else
+		{	
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x12);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x10);
+		}
+		DBGPRINT(RT_DEBUG_TRACE, ("ApStartUp : ExtBlow, ChannelWidth=%d, Channel=%d, ExtChanOffset=%d(%d) \n",
+									pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth, 
+									pAd->CommonCfg.Channel, 
+									pAd->CommonCfg.RegTransmitSetting.field.EXTCHA,
+									pAd->CommonCfg.AddHTInfo.AddHtInfo.ExtChanOffset));
+	}
+	else
+#endif /* DOT11_N_SUPPORT */
+	{
+		pAd->CommonCfg.BBPCurrentBW = BW_20;
+		pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel;
+		
+		/*  TX : control channel at lower */
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
+		Value &= (~0x1);
+		RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
+
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &byteValue);
+		byteValue &= (~0x18);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, byteValue);
+		
+		/* 20 MHz bandwidth*/
+		if (pAd->CommonCfg.Channel > 14)
+		{	 /* request by Gary 20070208*/
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, 0x40);
+		}	
+		else
+		{	/* request by Gary 20070208*/
+			/*RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, 0x30);*/
+			/* request by Brian 20070306*/
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, 0x38);
+		}	
+				 
+		if (pAd->MACVersion == 0x28600100)
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x08);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x11);
+		}
+		else
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x12);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0a);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x10);
+		}
+
+#ifdef DOT11_N_SUPPORT
+		DBGPRINT(RT_DEBUG_TRACE, ("ApStartUp : 20MHz, ChannelWidth=%d, Channel=%d, ExtChanOffset=%d(%d) \n",
+										pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth, 
+										pAd->CommonCfg.Channel, 
+										pAd->CommonCfg.RegTransmitSetting.field.EXTCHA,
+										pAd->CommonCfg.AddHTInfo.AddHtInfo.ExtChanOffset));
+#endif /* DOT11_N_SUPPORT */
+	}
+	
+	if (pAd->CommonCfg.Channel > 14)
+	{	/* request by Gary 20070208 for middle and long range A Band*/
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, 0x1D);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, 0x1D);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, 0x1D);
+		/*RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0x1D);*/
+	}
+	else
+	{ 	/* request by Gary 20070208 for middle and long range G band*/
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, 0x2D);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, 0x2D);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, 0x2D);
+			/*RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0x2D);*/
+	}	
+}
+
+
+static VOID ChipSwitchChannel(
+	IN PRTMP_ADAPTER 		pAd,
+	IN UCHAR				Channel,
+	IN BOOLEAN				bScan) 
+{
+	CHAR    TxPwer = 0, TxPwer2 = DEFAULT_RF_TX_POWER; /*Bbp94 = BBPR94_DEFAULT, TxPwer2 = DEFAULT_RF_TX_POWER;*/
+	UCHAR	index;
+	UINT32 	Value = 0; /*BbpReg, Value;*/
+	UCHAR 	RFValue;
+	UINT32 i = 0;
+
+	i = i; /* avoid compile warning */
+	RFValue = 0;
+	/* Search Tx power value*/
+
+	/*
+		We can't use ChannelList to search channel, since some central channl's txpowr doesn't list 
+		in ChannelList, so use TxPower array instead.
+	*/
+	for (index = 0; index < MAX_NUM_OF_CHANNELS; index++)
+	{
+		if (Channel == pAd->TxPower[index].Channel)
+		{
+			TxPwer = pAd->TxPower[index].Power;
+			TxPwer2 = pAd->TxPower[index].Power2;
+			break;
+		}
+	}
+
+	if (index == MAX_NUM_OF_CHANNELS)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("AsicSwitchChannel: Can't find the Channel#%d \n", Channel));
+	}
+
+	{
+#if defined(RT28xx)
+		ULONG	R2 = 0, R3 = DEFAULT_RF_TX_POWER, R4 = 0;
+		RTMP_RF_REGS *RFRegTable;
+
+		RFRegTable = RF2850RegTable;
+#endif /* Rdefined(RT28xx) */
+	
+		switch (pAd->RfIcType)
+		{
+#if defined(RT28xx)
+#if defined(RT28xx)
+			case RFIC_2820:
+			case RFIC_2850:
+			case RFIC_2720:
+			case RFIC_2750:
+#endif /* defined(RT28xx) */
+				for (index = 0; index < NUM_OF_2850_CHNL; index++)
+				{
+					if (Channel == RFRegTable[index].Channel)
+					{
+						R2 = RFRegTable[index].R2;
+						if (pAd->Antenna.field.TxPath == 1)
+						{
+							R2 |= 0x4000;	/* If TXpath is 1, bit 14 = 1;*/
+						}
+
+						if (pAd->Antenna.field.RxPath == 2
+)
+						{
+							R2 |= 0x40;	/* write 1 to off Rxpath.*/
+						}
+						else if (pAd->Antenna.field.RxPath == 1
+)
+						{
+							R2 |= 0x20040;	/* write 1 to off RxPath*/
+						}
+
+						if (Channel > 14)
+						{
+							/* initialize R3, R4*/
+							R3 = (RFRegTable[index].R3 & 0xffffc1ff);
+							R4 = (RFRegTable[index].R4 & (~0x001f87c0)) | (pAd->RfFreqOffset << 15);
+
+							/* 5G band power range: 0xF9~0X0F, TX0 Reg3 bit9/TX1 Reg4 bit6="0" means the TX power reduce 7dB*/
+							/* R3*/
+							if ((TxPwer >= -7) && (TxPwer < 0))
+							{
+								TxPwer = (7+TxPwer);
+
+								/* TxPwer is not possible larger than 15 */
+/*								TxPwer = (TxPwer > 0xF) ? (0xF) : (TxPwer);*/
+
+								R3 |= (TxPwer << 10);
+								DBGPRINT(RT_DEBUG_TRACE, ("AsicSwitchChannel: TxPwer=%d \n", TxPwer));
+							}
+							else
+							{
+								TxPwer = (TxPwer > 0xF) ? (0xF) : (TxPwer);
+								R3 |= (TxPwer << 10) | (1 << 9);
+							}
+
+							/* R4*/
+							if ((TxPwer2 >= -7) && (TxPwer2 < 0))
+							{
+								TxPwer2 = (7+TxPwer2);
+								R4 |= (TxPwer2 << 7);
+								DBGPRINT(RT_DEBUG_TRACE, ("AsicSwitchChannel: TxPwer2=%d \n", TxPwer2));
+							}
+							else
+							{
+								TxPwer2 = (TxPwer2 > 0xF) ? (0xF) : (TxPwer2);
+								R4 |= (TxPwer2 << 7) | (1 << 6);
+							}                        
+						}
+						else
+						{
+							R3 = (RFRegTable[index].R3 & 0xffffc1ff) | (TxPwer << 9); /* set TX power0*/
+							R4 = (RFRegTable[index].R4 & (~0x001f87c0)) | (pAd->RfFreqOffset << 15) | (TxPwer2 <<6);/* Set freq Offset & TxPwr1*/
+						}
+
+						/* Based on BBP current mode before changing RF channel.*/
+						if (!bScan && (pAd->CommonCfg.BBPCurrentBW == BW_40)
+							)
+						{
+							R4 |=0x200000;
+						}
+
+						/* Update variables*/
+						pAd->LatchRfRegs.Channel = Channel;
+						pAd->LatchRfRegs.R1 = RFRegTable[index].R1;
+						pAd->LatchRfRegs.R2 = R2;
+						pAd->LatchRfRegs.R3 = R3;
+						pAd->LatchRfRegs.R4 = R4;
+
+						/* Set RF value 1's set R3[bit2] = [0]*/
+						RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R1);
+						RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R2);
+						RTMP_RF_IO_WRITE32(pAd, (pAd->LatchRfRegs.R3 & (~0x04)));
+						RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R4);
+
+						RTMPusecDelay(200);
+
+						/* Set RF value 2's set R3[bit2] = [1]*/
+						RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R1);
+						RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R2);
+						RTMP_RF_IO_WRITE32(pAd, (pAd->LatchRfRegs.R3 | 0x04));
+						RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R4);
+
+						RTMPusecDelay(200);
+
+						/* Set RF value 3's set R3[bit2] = [0]*/
+						RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R1);
+						RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R2);
+						RTMP_RF_IO_WRITE32(pAd, (pAd->LatchRfRegs.R3 & (~0x04)));
+						RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R4);
+
+						break;
+					}
+				}
+
+				DBGPRINT(RT_DEBUG_TRACE, ("SwitchChannel#%d(RF=%d, Pwr0=%lu, Pwr1=%lu, %dT) to , R1=0x%08x, R2=0x%08x, R3=0x%08x, R4=0x%08x\n",
+							  Channel, 
+							  pAd->RfIcType, 
+							  (R3 & 0x00003e00) >> 9,
+							  (R4 & 0x000007c0) >> 6,
+							  pAd->Antenna.field.TxPath,
+							  pAd->LatchRfRegs.R1, 
+							  pAd->LatchRfRegs.R2, 
+							  pAd->LatchRfRegs.R3, 
+							  pAd->LatchRfRegs.R4));
+			
+				break;
+#endif /* defined(RT28xx) */
+			default:
+				DBGPRINT(RT_DEBUG_TRACE, ("SwitchChannel#%d : unknown RFIC=%d\n",
+					  Channel, pAd->RfIcType));
+				break;
+		}	
+	}
+
+	/* Change BBP setting during siwtch from a->g, g->a*/
+	if (Channel <= 14)
+	{
+		ULONG	TxPinCfg = 0x00050F0A;/*Gary 2007/08/09 0x050A0A*/
+
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0);/*(0x44 - GET_LNA_GAIN(pAd)));	 According the Rory's suggestion to solve the middle range issue.*/
+
+		/* Rx High power VGA offset for LNA select*/
+		{
+			if (pAd->NicConfig2.field.ExternalLNAForG)
+			{
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0x62);
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x46);
+			}
+			else
+			{
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0x84);
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x50);
+			}
+		}
+
+		/* 5G band selection PIN, bit1 and bit2 are complement*/
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
+		Value &= (~0x6);
+		Value |= (0x04);
+		RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
+
+		{
+			/* Turn off unused PA or LNA when only 1T or 1R*/
+			if (pAd->Antenna.field.TxPath == 1)
+			{
+				TxPinCfg &= 0xFFFFFFF3;
+			}
+			if (pAd->Antenna.field.RxPath == 1)
+			{
+				TxPinCfg &= 0xFFFFF3FF;
+			}
+		}
+
+		RTMP_IO_WRITE32(pAd, TX_PIN_CFG, TxPinCfg);
+	}
+	else
+	{
+		ULONG	TxPinCfg = 0x00050F05;/*Gary 2007/8/9 0x050505*/
+		UINT8	bbpValue;
+		
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, (0x37 - GET_LNA_GAIN(pAd)));
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0);/*(0x44 - GET_LNA_GAIN(pAd)));    According the Rory's suggestion to solve the middle range issue.     */
+
+		/* Set the BBP_R82 value here */
+		bbpValue = 0xF2;
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, bbpValue);
+
+
+		/* Rx High power VGA offset for LNA select*/
+		if (pAd->NicConfig2.field.ExternalLNAForA)
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x46);
+		}
+		else
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x50);
+		}
+
+		/* 5G band selection PIN, bit1 and bit2 are complement*/
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
+		Value &= (~0x6);
+		Value |= (0x02);
+		RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
+
+		/* Turn off unused PA or LNA when only 1T or 1R*/
+		{
+			/* Turn off unused PA or LNA when only 1T or 1R*/
+			if (pAd->Antenna.field.TxPath == 1)
+			{
+				TxPinCfg &= 0xFFFFFFF3;
+			}
+			if (pAd->Antenna.field.RxPath == 1)
+			{
+				TxPinCfg &= 0xFFFFF3FF;
+			}
+		}
+
+		RTMP_IO_WRITE32(pAd, TX_PIN_CFG, TxPinCfg);
+	}
+
+	/* R66 should be set according to Channel and use 20MHz when scanning*/
+	/*RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, (0x2E + GET_LNA_GAIN(pAd)));*/
+	if (bScan)
+		RTMPSetAGCInitValue(pAd, BW_20);
+	else
+		RTMPSetAGCInitValue(pAd, pAd->CommonCfg.BBPCurrentBW);
+
+	
+	/* On 11A, We should delay and wait RF/BBP to be stable*/
+	/* and the appropriate time should be 1000 micro seconds */
+	/* 2005/06/05 - On 11G, We also need this delay time. Otherwise it's difficult to pass the WHQL.*/
+	
+	RTMPusecDelay(1000);  
+}
+
+
+#ifdef RTMP_INTERNAL_TX_ALC
+static VOID AsicTxAlcGetAutoAgcOffset(
+	IN PRTMP_ADAPTER		pAd,
+	IN PCHAR				pDeltaPwr,
+	IN PCHAR				pTotalDeltaPwr,
+	IN PCHAR				pAgcCompensate,
+	IN PUCHAR				pBbpR49)
+{
+	extern TX_POWER_TUNING_ENTRY_STRUCT *TxPowerTuningTable;
+	BBP_R49_STRUC BbpR49;
+	CHAR desiredTSSI = 0, currentTSSI = 0;
+	PTX_POWER_TUNING_ENTRY_STRUCT pTxPowerTuningEntry = NULL;
+	UCHAR RFValue = 0;
+	CHAR DeltaPwr = 0;
+	CHAR TotalDeltaPower = 0; // (non-positive number) including the transmit power controlled by the MAC and the BBP R1
+
+
+	BbpR49.byte = 0;
+
+	if (pAd->Mlme.OneSecPeriodicRound % 4 == 0)
+	{
+		desiredTSSI = GetDesiredTSSI(pAd);
+
+		if(desiredTSSI == -1) {
+			goto LabelFail;
+		}
+
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R49, &BbpR49.byte);
+		currentTSSI = BbpR49.field.TSSI;
+
+		if (desiredTSSI > currentTSSI)
+		{
+			pAd->TxPowerCtrl.idxTxPowerTable++;
+		}
+
+		if (desiredTSSI < currentTSSI)
+		{
+			pAd->TxPowerCtrl.idxTxPowerTable--;
+		}
+
+		if (pAd->TxPowerCtrl.idxTxPowerTable < LOWERBOUND_TX_POWER_TUNING_ENTRY)
+		{
+			pAd->TxPowerCtrl.idxTxPowerTable = LOWERBOUND_TX_POWER_TUNING_ENTRY;
+		}
+
+		if (pAd->TxPowerCtrl.idxTxPowerTable >= UPPERBOUND_TX_POWER_TUNING_ENTRY(pAd))
+		{
+			pAd->TxPowerCtrl.idxTxPowerTable = UPPERBOUND_TX_POWER_TUNING_ENTRY(pAd);
+		}
+
+		//
+		// Valide pAd->TxPowerCtrl.idxTxPowerTable: -30 ~ 45
+		//
+
+		pTxPowerTuningEntry = &TxPowerTuningTable[pAd->TxPowerCtrl.idxTxPowerTable + TX_POWER_TUNING_ENTRY_OFFSET]; // zero-based array
+		pAd->TxPowerCtrl.RF_R12_Value = pTxPowerTuningEntry->RF_R12_Value;
+		pAd->TxPowerCtrl.MAC_PowerDelta = pTxPowerTuningEntry->MAC_PowerDelta;
+
+		//
+		// Tx power adjustment over RF
+		//
+
+		{
+			RT30xxReadRFRegister(pAd, RF_R12, (PUCHAR)(&RFValue));
+			RFValue = ((RFValue & 0xE0) | pAd->TxPowerCtrl.RF_R12_Value);
+			RT30xxWriteRFRegister(pAd, RF_R12, (UCHAR)(RFValue));
+		}
+
+		//
+		// Tx power adjustment over MAC
+		//
+		TotalDeltaPower = pAd->TxPowerCtrl.MAC_PowerDelta;
+
+		DBGPRINT(RT_DEBUG_TRACE, ("%s: desiredTSSI = %d, currentTSSI = %d, idxTxPowerTable = %d, {RF_R12_Value = %d, MAC_PowerDelta = %d}\n", 
+			__FUNCTION__, 
+			desiredTSSI, 
+			currentTSSI, 
+			pAd->TxPowerCtrl.idxTxPowerTable, 
+			pTxPowerTuningEntry->RF_R12_Value, 
+			pTxPowerTuningEntry->MAC_PowerDelta));
+	}
+
+LabelFail:
+	*pBbpR49 = BbpR49.byte;
+	*pDeltaPwr = DeltaPwr;
+	*pTotalDeltaPwr = TotalDeltaPower;
+}
+#endif // RTMP_INTERNAL_TX_ALC //
+
+
+static VOID AsicSetAGCInitValue(
+	IN PRTMP_ADAPTER		pAd,
+	IN UCHAR				BandWidth)
+{
+	UCHAR	R66 = 0x30;
+	
+	if (pAd->LatchRfRegs.Channel <= 14)
+	{	// BG band
+#ifdef RT30xx
+		/* Gary was verified Amazon AP and find that RT307x has BBP_R66 invalid default value */
+		if (IS_RT3070(pAd)||IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd) || IS_RT3593(pAd))
+		{
+			R66 = 0x1C + 2*GET_LNA_GAIN(pAd);
+			{
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
+			}
+		}
+		else
+#endif // RT30xx //
+		{
+			R66 = 0x2E + GET_LNA_GAIN(pAd);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
+		}
+	}
+	else
+	{	//A band
+		{	
+			if (BandWidth == BW_20)
+			{
+				R66 = (UCHAR)(0x32 + (GET_LNA_GAIN(pAd)*5)/3);
+
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
+			}
+#ifdef DOT11_N_SUPPORT
+			else
+			{
+				R66 = (UCHAR)(0x3A + (GET_LNA_GAIN(pAd)*5)/3);
+
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
+			}
+#endif // DOT11_N_SUPPORT //
+		}		
+	}
+
+}
+
+
+#ifdef ANT_DIVERSITY_SUPPORT
+VOID HWAntennaDiversityEnable(
+	IN PRTMP_ADAPTER		pAd)
+{
+#if defined(RT5350)
+	UINT8 regs[7] = { 0xC0, 0xB0, 0x23, 0x34, 0x10, 0x3B, 0x05 };
+#elif defined(RT5370) || defined(RT5390)
+	UINT8 regs[7] = { 0xBE, 0xAE, 0x20, 0x34, 0x40, 0x3B, 0x04 };
+#endif
+	UINT8 BBPValue = 0, RFValue = 0;
+
+	// RF_R29 bit[7:6] = b'11
+	RT30xxReadRFRegister(pAd, RF_R29, &RFValue);
+	RFValue |= 0xC0; //rssi_gain
+	RT30xxWriteRFRegister(pAd, RF_R29, RFValue);
+
+	// BBP_R47 bit7=1
+	RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BBPValue);
+	BBPValue |= 0x80; //ADC6 on
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R47, BBPValue);
+	
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R150, regs[0]); // ENABLE_ANTSW_OFDM and RSSI_ANTSWT
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R151, regs[1]); // ENABLE_ANTSW_CCK and RSSI_LNASWTH_HM
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R152, regs[2]); // RSSI_LNASWTH_HL /*aux ant */
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R153, regs[3]); // RSSI_ANALOG_LOWTH
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R154, regs[4]); // ANTSW_PWROFFSET, ANTSW_DELAYOFFSET and auto-control BBP R152[7] (RX_DEFAULT_ANT)
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R155, regs[5]); // RSSI_OFFSET
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R253, regs[6]); // MEASURE_RSSI_OFFSET
+
+	DBGPRINT(RT_DEBUG_TRACE, ("HwAnDiv --> Enable!\n"));
+}
+#endif // ANT_DIVERSITY_SUPPORT // 
+
+
+#ifdef RTMP_INTERNAL_TX_ALC
+//
+// Initialize the desired TSSI table
+//
+// Parameters
+//	pAd: The adapter data structure
+//
+// Return Value:
+//	None
+//
+static VOID InitDesiredTSSITableDefault(
+	IN PRTMP_ADAPTER			pAd)
+{
+	UCHAR TSSIBase = 0; // The TSSI over OFDM 54Mbps
+	USHORT TSSIStepOver2dot4G = 0; // The TSSI value/step (0.5 dB/unit)
+	UCHAR RFValue = 0;
+	BBP_R49_STRUC BbpR49 = {{0}};
+	ULONG i = 0;
+	USHORT TxPower = 0, TxPowerOFDM54 = 0, temp = 0;
+	UINT32 MaxMCS;
+
+	if (pAd->TxPowerCtrl.bInternalTxALC == FALSE)
+	{
+		return;
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("---> %s\n", __FUNCTION__));
+
+	RT28xx_EEPROM_READ16(pAd, EEPROM_TSSI_OVER_OFDM_54, temp);
+	TSSIBase = (temp & 0x000F);
+	
+	RT28xx_EEPROM_READ16(pAd, (EEPROM_TSSI_STEP_OVER_2DOT4G - 1), TSSIStepOver2dot4G);
+	TSSIStepOver2dot4G = (0x000F & (TSSIStepOver2dot4G >> 8));
+
+	RT28xx_EEPROM_READ16(pAd, (EEPROM_OFDM_MCS6_MCS7 - 1), TxPowerOFDM54);
+	TxPowerOFDM54 = (0x000F & (TxPowerOFDM54 >> 8));
+
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: TSSIBase = %d, TSSIStepOver2dot4G = %d, TxPowerOFDM54 = %d\n", 
+		__FUNCTION__, 
+		TSSIBase, 
+		TSSIStepOver2dot4G, 
+		TxPowerOFDM54));
+
+	//
+	// The desired TSSI over CCK
+	//
+	RT28xx_EEPROM_READ16(pAd, EEPROM_CCK_MCS0_MCS1, TxPower);
+	TxPower = (TxPower & 0x000F);
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: 0xDE = 0x%X\n", __FUNCTION__, TxPower));
+	desiredTSSIOverCCK[MCS_0] = (TSSIBase + ((TxPower - TxPowerOFDM54) * (TSSIStepOver2dot4G * 2)) + 6);
+	desiredTSSIOverCCK[MCS_1] = desiredTSSIOverCCK[MCS_0];
+	RT28xx_EEPROM_READ16(pAd, (EEPROM_CCK_MCS2_MCS3 - 1), TxPower);
+	TxPower = ((TxPower >> 8) & 0x000F);
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: 0xDF = 0x%X\n", __FUNCTION__, TxPower));
+	desiredTSSIOverCCK[MCS_2] = (TSSIBase + ((TxPower - TxPowerOFDM54) * (TSSIStepOver2dot4G * 2)) + 6);
+	desiredTSSIOverCCK[MCS_3] = desiredTSSIOverCCK[MCS_2];
+
+	//
+	// Boundary verification: the desired TSSI value
+	//
+	for (i = 0; i < 4; i++) // CCK: MCS 0 ~ MCS 3
+	{
+		if (desiredTSSIOverCCK[i] < 0x00)
+		{
+			desiredTSSIOverCCK[i] = 0x00;
+		}
+		else if (desiredTSSIOverCCK[i] > 0x1F)
+		{
+			desiredTSSIOverCCK[i] = 0x1F;
+		}
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: desiredTSSIOverCCK[0] = %d, desiredTSSIOverCCK[1] = %d, desiredTSSIOverCCK[2] = %d, desiredTSSIOverCCK[3] = %d\n", 
+		__FUNCTION__, 
+		desiredTSSIOverCCK[0], 
+		desiredTSSIOverCCK[1], 
+		desiredTSSIOverCCK[2], 
+		desiredTSSIOverCCK[3]));
+
+	//
+	// The desired TSSI over OFDM
+	//
+	RT28xx_EEPROM_READ16(pAd, EEPROM_OFDM_MCS0_MCS1, TxPower);
+	TxPower = (TxPower & 0x000F);
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: 0xE0 = 0x%X\n", __FUNCTION__, TxPower));
+	desiredTSSIOverOFDM[MCS_0] = (TSSIBase + ((TxPower - TxPowerOFDM54) * (TSSIStepOver2dot4G * 2)));
+	desiredTSSIOverOFDM[MCS_1] = desiredTSSIOverOFDM[MCS_0];
+	RT28xx_EEPROM_READ16(pAd, (EEPROM_OFDM_MCS2_MCS3 - 1), TxPower);
+	TxPower = ((TxPower >> 8) & 0x000F);
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: 0xE1 = 0x%X\n", __FUNCTION__, TxPower));
+	desiredTSSIOverOFDM[MCS_2] = (TSSIBase + ((TxPower - TxPowerOFDM54) * (TSSIStepOver2dot4G * 2)));
+	desiredTSSIOverOFDM[MCS_3] = desiredTSSIOverOFDM[MCS_2];
+	RT28xx_EEPROM_READ16(pAd, EEPROM_OFDM_MCS4_MCS5, TxPower);
+	TxPower = (TxPower & 0x000F);
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: 0xE2 = 0x%X\n", __FUNCTION__, TxPower));
+	desiredTSSIOverOFDM[MCS_4] = (TSSIBase + ((TxPower - TxPowerOFDM54) * (TSSIStepOver2dot4G * 2)));
+	desiredTSSIOverOFDM[MCS_5] = desiredTSSIOverOFDM[MCS_4];
+	desiredTSSIOverOFDM[MCS_6] = TSSIBase;
+	desiredTSSIOverOFDM[MCS_7] = TSSIBase;
+
+	//
+	// Boundary verification: the desired TSSI value
+	//
+	for (i = 0; i < 8; i++) // OFDM: MCS 0 ~ MCS 7
+	{
+		if (desiredTSSIOverOFDM[i] < 0x00)
+		{
+			desiredTSSIOverOFDM[i] = 0x00;
+		}
+		else if (desiredTSSIOverOFDM[i] > 0x1F)
+		{
+			desiredTSSIOverOFDM[i] = 0x1F;
+		}
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: desiredTSSIOverOFDM[0] = %d, desiredTSSIOverOFDM[1] = %d, desiredTSSIOverOFDM[2] = %d, desiredTSSIOverOFDM[3] = %d\n", 
+		__FUNCTION__, 
+		desiredTSSIOverOFDM[0], 
+		desiredTSSIOverOFDM[1], 
+		desiredTSSIOverOFDM[2], 
+		desiredTSSIOverOFDM[3]));
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: desiredTSSIOverOFDM[4] = %d, desiredTSSIOverOFDM[5] = %d, desiredTSSIOverOFDM[6] = %d, desiredTSSIOverOFDM[7] = %d\n", 
+		__FUNCTION__, 
+		desiredTSSIOverOFDM[4], 
+		desiredTSSIOverOFDM[5], 
+		desiredTSSIOverOFDM[6], 
+		desiredTSSIOverOFDM[7]));
+
+	//
+	// The desired TSSI over HT
+	//
+	RT28xx_EEPROM_READ16(pAd, EEPROM_HT_MCS0_MCS1, TxPower);
+	TxPower = (TxPower & 0x000F);
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: 0xE4 = 0x%X\n", __FUNCTION__, TxPower));
+	desiredTSSIOverHT[MCS_0] = (TSSIBase + ((TxPower - TxPowerOFDM54) * (TSSIStepOver2dot4G * 2)));
+	desiredTSSIOverHT[MCS_1] = desiredTSSIOverHT[MCS_0];
+	RT28xx_EEPROM_READ16(pAd, (EEPROM_HT_MCS2_MCS3 - 1), TxPower);
+	TxPower = ((TxPower >> 8) & 0x000F);
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: 0xE5 = 0x%X\n", __FUNCTION__, TxPower));
+	desiredTSSIOverHT[MCS_2] = (TSSIBase + ((TxPower - TxPowerOFDM54) * (TSSIStepOver2dot4G * 2)));
+	desiredTSSIOverHT[MCS_3] = desiredTSSIOverHT[MCS_2];
+	RT28xx_EEPROM_READ16(pAd, EEPROM_HT_MCS4_MCS5, TxPower);
+	TxPower = (TxPower & 0x000F);
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: 0xE6 = 0x%X\n", __FUNCTION__, TxPower));
+	desiredTSSIOverHT[MCS_4] = (TSSIBase + ((TxPower - TxPowerOFDM54) * (TSSIStepOver2dot4G * 2)));
+	desiredTSSIOverHT[MCS_5] = desiredTSSIOverHT[MCS_4];
+	RT28xx_EEPROM_READ16(pAd, (EEPROM_HT_MCS6_MCS7 - 1), TxPower);
+	TxPower = ((TxPower >> 8) & 0x000F);
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: 0xE7 = 0x%X\n", __FUNCTION__, TxPower));
+	desiredTSSIOverHT[MCS_6] = (TSSIBase + ((TxPower - TxPowerOFDM54) * (TSSIStepOver2dot4G * 2)));
+	desiredTSSIOverHT[MCS_7] = desiredTSSIOverHT[MCS_6];
+
+	MaxMCS = 8;
+
+	if (pAd->chipCap.TxAlcMaxMCS > 8)
+	{
+		MaxMCS = 16;
+		RT28xx_EEPROM_READ16(pAd, EEPROM_HT_MCS8_MCS9, TxPower);
+		TxPower = (TxPower & 0x000F);
+		DBGPRINT(RT_DEBUG_TRACE, ("EEPROM_HT_MCS9_MCS9(0xE8) = 0x%X\n", TxPower));
+		desiredTSSIOverHT[MCS_8] = (TSSIBase + ((TxPower - TxPowerOFDM54) * (TSSIStepOver2dot4G * 2)));
+		desiredTSSIOverHT[MCS_9] = desiredTSSIOverHT[MCS_8];
+
+		RT28xx_EEPROM_READ16(pAd, (EEPROM_HT_MCS10_MCS11-1), TxPower);
+		TxPower = ((TxPower >> 8) & 0x000F);
+		DBGPRINT(RT_DEBUG_TRACE, ("EEPROM_HT_MCS10_MCS11(0xE9) = 0x%X\n", TxPower));
+		desiredTSSIOverHT[MCS_10] = (TSSIBase + ((TxPower - TxPowerOFDM54) * (TSSIStepOver2dot4G * 2)));
+		desiredTSSIOverHT[MCS_11] = desiredTSSIOverHT[MCS_10];
+
+		RT28xx_EEPROM_READ16(pAd, EEPROM_HT_MCS12_MCS13, TxPower);
+		TxPower = (TxPower & 0x000F);
+		DBGPRINT(RT_DEBUG_TRACE, ("EEPROM_HT_MCS12_MCS13(0xEA) = 0x%X\n", TxPower));
+		desiredTSSIOverHT[MCS_12] = (TSSIBase + ((TxPower - TxPowerOFDM54) * (TSSIStepOver2dot4G * 2)));
+		desiredTSSIOverHT[MCS_13] = desiredTSSIOverHT[MCS_12];
+
+		RT28xx_EEPROM_READ16(pAd, (EEPROM_HT_MCS14_MCS15-1), TxPower);
+		TxPower = ((TxPower >> 8) & 0x000F);
+		DBGPRINT(RT_DEBUG_TRACE, ("EEPROM_HT_MCS14_MCS15(0xEB) = 0x%X\n", TxPower));
+		desiredTSSIOverHT[MCS_14] = (TSSIBase + ((TxPower - TxPowerOFDM54) * (TSSIStepOver2dot4G * 2)));
+		desiredTSSIOverHT[MCS_15] = desiredTSSIOverHT[MCS_14]-1;
+	}
+
+	//
+	// Boundary verification: the desired TSSI value
+	//
+	for (i = 0; i < MaxMCS; i++) // HT: MCS 0 ~ MCS 7 or MCS 15
+	{
+		if (desiredTSSIOverHT[i] < 0x00)
+		{
+			desiredTSSIOverHT[i] = 0x00;
+		}
+		else if (desiredTSSIOverHT[i] > 0x1F)
+		{
+			desiredTSSIOverHT[i] = 0x1F;
+		}
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: desiredTSSIOverHT[0] = %d, desiredTSSIOverHT[1] = %d, desiredTSSIOverHT[2] = %d, desiredTSSIOverHT[3] = %d\n", 
+		__FUNCTION__, 
+		desiredTSSIOverHT[0], 
+		desiredTSSIOverHT[1], 
+		desiredTSSIOverHT[2], 
+		desiredTSSIOverHT[3]));
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: desiredTSSIOverHT[4] = %d, desiredTSSIOverHT[5] = %d, desiredTSSIOverHT[6] = %d, desiredTSSIOverHT[7] = %d\n", 
+		__FUNCTION__, 
+		desiredTSSIOverHT[4], 
+		desiredTSSIOverHT[5], 
+		desiredTSSIOverHT[6], 
+		desiredTSSIOverHT[7]));
+
+	//
+	// The desired TSSI over HT using STBC
+	//
+	RT28xx_EEPROM_READ16(pAd, EEPROM_HT_USING_STBC_MCS0_MCS1, TxPower);
+	TxPower = (TxPower & 0x000F);
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: 0xEC = 0x%X\n", __FUNCTION__, TxPower));
+	desiredTSSIOverHTUsingSTBC[MCS_0] = (TSSIBase + ((TxPower - TxPowerOFDM54) * (TSSIStepOver2dot4G * 2)));
+	desiredTSSIOverHTUsingSTBC[MCS_1] = desiredTSSIOverHTUsingSTBC[MCS_0];
+	RT28xx_EEPROM_READ16(pAd, (EEPROM_HT_USING_STBC_MCS2_MCS3 - 1), TxPower);
+	TxPower = ((TxPower >> 8) & 0x000F);
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: 0xED = 0x%X\n", __FUNCTION__, TxPower));
+	desiredTSSIOverHTUsingSTBC[MCS_2] = (TSSIBase + ((TxPower - TxPowerOFDM54) * (TSSIStepOver2dot4G * 2)));
+	desiredTSSIOverHTUsingSTBC[MCS_3] = desiredTSSIOverHTUsingSTBC[MCS_2];
+	RT28xx_EEPROM_READ16(pAd, EEPROM_HT_USING_STBC_MCS4_MCS5, TxPower);
+	TxPower = (TxPower & 0x000F);
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: 0xEE = 0x%X\n", __FUNCTION__, TxPower));
+	desiredTSSIOverHTUsingSTBC[MCS_4] = (TSSIBase + ((TxPower - TxPowerOFDM54) * (TSSIStepOver2dot4G * 2)));
+	desiredTSSIOverHTUsingSTBC[MCS_5] = desiredTSSIOverHTUsingSTBC[MCS_4];
+	RT28xx_EEPROM_READ16(pAd, (EEPROM_HT_USING_STBC_MCS6_MCS7 - 1), TxPower);
+	TxPower = ((TxPower >> 8) & 0x000F);
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: 0xEF = 0x%X\n", __FUNCTION__, TxPower));
+	desiredTSSIOverHTUsingSTBC[MCS_6] = (TSSIBase + ((TxPower - TxPowerOFDM54) * (TSSIStepOver2dot4G * 2)));
+	desiredTSSIOverHTUsingSTBC[MCS_7] = desiredTSSIOverHTUsingSTBC[MCS_6];
+
+	//
+	// Boundary verification: the desired TSSI value
+	//
+	for (i = 0; i < 8; i++) // HT using STBC: MCS 0 ~ MCS 7
+	{
+		if (desiredTSSIOverHTUsingSTBC[i] < 0x00)
+		{
+			desiredTSSIOverHTUsingSTBC[i] = 0x00;
+		}
+		else if (desiredTSSIOverHTUsingSTBC[i] > 0x1F)
+		{
+			desiredTSSIOverHTUsingSTBC[i] = 0x1F;
+		}
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: desiredTSSIOverHTUsingSTBC[0] = %d, desiredTSSIOverHTUsingSTBC[1] = %d, desiredTSSIOverHTUsingSTBC[2] = %d, desiredTSSIOverHTUsingSTBC[3] = %d\n", 
+		__FUNCTION__, 
+		desiredTSSIOverHTUsingSTBC[0], 
+		desiredTSSIOverHTUsingSTBC[1], 
+		desiredTSSIOverHTUsingSTBC[2], 
+		desiredTSSIOverHTUsingSTBC[3]));
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: desiredTSSIOverHTUsingSTBC[4] = %d, desiredTSSIOverHTUsingSTBC[5] = %d, desiredTSSIOverHTUsingSTBC[6] = %d, desiredTSSIOverHTUsingSTBC[7] = %d\n", 
+		__FUNCTION__, 
+		desiredTSSIOverHTUsingSTBC[4], 
+		desiredTSSIOverHTUsingSTBC[5], 
+		desiredTSSIOverHTUsingSTBC[6], 
+		desiredTSSIOverHTUsingSTBC[7]));
+
+	{
+		RT30xxReadRFRegister(pAd, RF_R27, (PUCHAR)(&RFValue));
+		RFValue = (RFValue | 0x88); // <7>: IF_Rxout_en, <3>: IF_Txout_en
+		RT30xxWriteRFRegister(pAd, RF_R27, RFValue);
+
+		RT30xxReadRFRegister(pAd, RF_R28, (PUCHAR)(&RFValue));
+		RFValue = (RFValue & (~0x60)); // <6:5>: tssi_atten
+		RT30xxWriteRFRegister(pAd, RF_R28, RFValue);
+	}
+
+#if defined (RT3350)
+	if (IS_RT3350(pAd))
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R255, 0); 
+#endif /* RT3350 */
+
+	RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R49, &BbpR49.byte);
+	//BbpR49.field.adc5_in_sel = 0; // (default): TSSI
+	BbpR49.field.adc5_in_sel = 1; // PSI
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R49, BbpR49.byte);		
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<--- %s\n", __FUNCTION__));
+}
+
+
+/*
+	==========================================================================
+	Description:
+		Get the desired TSSI based on the latest packet
+
+	Arguments:
+		pAd
+
+	Return Value:
+		The desired TSSI
+	==========================================================================
+ */
+CHAR GetDesiredTSSI(
+	IN PRTMP_ADAPTER		pAd)
+{
+	PHTTRANSMIT_SETTING pLatestTxHTSetting = (PHTTRANSMIT_SETTING)(&pAd->LastTxRate);
+	UCHAR desiredTSSI = 0;
+	UCHAR MCS = 0;
+	UCHAR MaxMCS = 7;
+
+	MCS = (UCHAR)(pLatestTxHTSetting->field.MCS);
+	
+	if (pLatestTxHTSetting->field.MODE == MODE_CCK)
+	{
+		if (MCS > 3) /* boundary verification */
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("%s: incorrect MCS: MCS = %d\n", 
+				__FUNCTION__, 
+				MCS));
+			
+			MCS = 0;
+		}
+	
+		desiredTSSI = desiredTSSIOverCCK[MCS];
+	}
+	else if (pLatestTxHTSetting->field.MODE == MODE_OFDM)
+	{
+		if (MCS > 7) /* boundary verification */
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("%s: incorrect MCS: MCS = %d\n", 
+				__FUNCTION__, 
+				MCS));
+
+			MCS = 0;
+		}
+
+		desiredTSSI = desiredTSSIOverOFDM[MCS];
+	}
+	else if ((pLatestTxHTSetting->field.MODE == MODE_HTMIX) || (pLatestTxHTSetting->field.MODE == MODE_HTGREENFIELD))
+	{
+		MaxMCS = pAd->chipCap.TxAlcMaxMCS - 1;
+
+		if (MCS > MaxMCS) /* boundary verification */
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("%s: incorrect MCS: MCS = %d\n", 
+				__FUNCTION__, 
+				MCS));
+
+			MCS = 0;
+		}
+
+		if (pLatestTxHTSetting->field.STBC == 1)
+		{
+			desiredTSSI = desiredTSSIOverHT[MCS];
+		}
+		else
+		{
+			desiredTSSI = desiredTSSIOverHTUsingSTBC[MCS];
+		}
+
+		
+		/* For HT BW40 MCS 7 with/without STBC configuration, the desired TSSI value should subtract one from the formula. */
+		
+		if ((pLatestTxHTSetting->field.BW == BW_40) && (MCS == MCS_7))
+		{
+			desiredTSSI -= 1;
+		}
+	}
+
+	DBGPRINT(RT_DEBUG_INFO, ("%s: desiredTSSI = %d, Latest Tx HT setting: MODE = %d, MCS = %d, STBC = %d\n", 
+		__FUNCTION__, 
+		desiredTSSI, 
+		pLatestTxHTSetting->field.MODE, 
+		pLatestTxHTSetting->field.MCS, 
+		pLatestTxHTSetting->field.STBC));
+
+	DBGPRINT(RT_DEBUG_INFO, ("<--- %s\n", __FUNCTION__));
+
+	return desiredTSSI;
+}
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+
+VOID AsicGetTxPowerOffset(
+	IN PRTMP_ADAPTER pAd,
+	IN PULONG TxPwr)
+{
+	CONFIGURATION_OF_TX_POWER_CONTROL_OVER_MAC CfgOfTxPwrCtrlOverMAC;
+
+	/* non-3593 */
+	{
+		CfgOfTxPwrCtrlOverMAC.NumOfEntries = 5; // MAC 0x1314, 0x1318, 0x131C, 0x1320 and 1324
+
+		if (pAd->CommonCfg.BBPCurrentBW == BW_40)
+		{
+			if (pAd->CommonCfg.CentralChannel > 14)
+			{
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[0].MACRegisterOffset = TX_PWR_CFG_0;
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[0].RegisterValue = pAd->Tx40MPwrCfgABand[0];
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[1].MACRegisterOffset = TX_PWR_CFG_1;
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[1].RegisterValue = pAd->Tx40MPwrCfgABand[1];
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[2].MACRegisterOffset = TX_PWR_CFG_2;
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[2].RegisterValue = pAd->Tx40MPwrCfgABand[2];
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[3].MACRegisterOffset = TX_PWR_CFG_3;
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[3].RegisterValue = pAd->Tx40MPwrCfgABand[3];
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[4].MACRegisterOffset = TX_PWR_CFG_4;
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[4].RegisterValue = pAd->Tx40MPwrCfgABand[4];
+			}
+			else
+			{
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[0].MACRegisterOffset = TX_PWR_CFG_0;
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[0].RegisterValue = pAd->Tx40MPwrCfgGBand[0];
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[1].MACRegisterOffset = TX_PWR_CFG_1;
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[1].RegisterValue = pAd->Tx40MPwrCfgGBand[1];
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[2].MACRegisterOffset = TX_PWR_CFG_2;
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[2].RegisterValue = pAd->Tx40MPwrCfgGBand[2];
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[3].MACRegisterOffset = TX_PWR_CFG_3;
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[3].RegisterValue = pAd->Tx40MPwrCfgGBand[3];
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[4].MACRegisterOffset = TX_PWR_CFG_4;
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[4].RegisterValue = pAd->Tx40MPwrCfgGBand[4];
+			}
+		}
+		else
+		{
+			if (pAd->CommonCfg.CentralChannel > 14)
+			{
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[0].MACRegisterOffset = TX_PWR_CFG_0;
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[0].RegisterValue = pAd->Tx20MPwrCfgABand[0];
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[1].MACRegisterOffset = TX_PWR_CFG_1;
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[1].RegisterValue = pAd->Tx20MPwrCfgABand[1];
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[2].MACRegisterOffset = TX_PWR_CFG_2;
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[2].RegisterValue = pAd->Tx20MPwrCfgABand[2];
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[3].MACRegisterOffset = TX_PWR_CFG_3;
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[3].RegisterValue = pAd->Tx20MPwrCfgABand[3];
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[4].MACRegisterOffset = TX_PWR_CFG_4;
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[4].RegisterValue = pAd->Tx20MPwrCfgABand[4];
+			}
+			else
+			{
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[0].MACRegisterOffset = TX_PWR_CFG_0;
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[0].RegisterValue = pAd->Tx20MPwrCfgGBand[0];
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[1].MACRegisterOffset = TX_PWR_CFG_1;
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[1].RegisterValue = pAd->Tx20MPwrCfgGBand[1];
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[2].MACRegisterOffset = TX_PWR_CFG_2;
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[2].RegisterValue = pAd->Tx20MPwrCfgGBand[2];
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[3].MACRegisterOffset = TX_PWR_CFG_3;
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[3].RegisterValue = pAd->Tx20MPwrCfgGBand[3];
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[4].MACRegisterOffset = TX_PWR_CFG_4;
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[4].RegisterValue = pAd->Tx20MPwrCfgGBand[4];
+			}
+		}
+
+		NdisCopyMemory(TxPwr, (UCHAR *)&CfgOfTxPwrCtrlOverMAC, sizeof(CfgOfTxPwrCtrlOverMAC));
+	}
+
+
+}
+
+
+static VOID AsicAntennaDefaultReset(
+	IN PRTMP_ADAPTER		pAd,
+	IN EEPROM_ANTENNA_STRUC	*pAntenna)
+{
+#ifdef RT30xx
+	if(IS_RT3090(pAd))
+	{
+		pAntenna->word = 0;
+		pAntenna->field.RfIcType = RFIC_3020;
+		pAntenna->field.TxPath = 1;
+		pAntenna->field.RxPath = 1;		
+	}
+	else
+#endif /* RT30xx */
+#ifdef RT33xx
+	if (IS_RT3390(pAd))
+	{
+		pAntenna->word = 0;
+		pAntenna->field.RfIcType = RFIC_3320;
+		pAntenna->field.TxPath = 1;
+		pAntenna->field.RxPath = 1;
+	}
+	else
+#endif /* RT33xx */
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+		if (IS_RT5390(pAd))
+		{
+			pAntenna->word = 0;
+			pAntenna->field.RfIcType = 0xF; /* Reserved */
+			if (IS_RT5392(pAd))
+			{
+				pAntenna->field.TxPath = 2;
+				pAntenna->field.RxPath = 2;
+			}
+			else
+			{
+			pAntenna->field.TxPath = 1;
+			pAntenna->field.RxPath = 1;
+			}
+		}
+		else
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+	{
+
+		pAntenna->word = 0;
+		pAntenna->field.RfIcType = RFIC_2820;
+		pAntenna->field.TxPath = 1;
+		pAntenna->field.RxPath = 2;
+	}
+	DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", pAntenna->word));	
+}
+
+
+static VOID NetDevNickNameInit(
+	IN PRTMP_ADAPTER		pAd)
+{
+#ifdef CONFIG_STA_SUPPORT
+#ifdef RTMP_MAC_USB
+		snprintf((PSTRING) pAd->nickname, sizeof(pAd->nickname), "RT2870STA");
+#endif /* RTMP_MAC_USB */
+#endif /* CONFIG_STA_SUPPORT */
+}
+
+/* End of rtmp_chip.c */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/action.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/action.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/action.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/action.c	2017-09-23 03:42:49.698676042 +0800
@@ -0,0 +1,1130 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+#include "action.h"
+
+extern UCHAR  ZeroSsid[32];
+
+static VOID ReservedAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem);
+
+
+/*  
+    ==========================================================================
+    Description: 
+        association state machine init, including state transition and timer init
+    Parameters: 
+        S - pointer to the association state machine
+    Note:
+        The state machine looks like the following 
+        
+                                    ASSOC_IDLE             
+        MT2_MLME_DISASSOC_REQ    mlme_disassoc_req_action 
+        MT2_PEER_DISASSOC_REQ    peer_disassoc_action     
+        MT2_PEER_ASSOC_REQ       drop                     
+        MT2_PEER_REASSOC_REQ     drop                     
+        MT2_CLS3ERR              cls3err_action           
+    ==========================================================================
+ */
+VOID ActionStateMachineInit(
+    IN	PRTMP_ADAPTER	pAd, 
+    IN  STATE_MACHINE *S, 
+    OUT STATE_MACHINE_FUNC Trans[]) 
+{
+	StateMachineInit(S, (STATE_MACHINE_FUNC *)Trans, MAX_ACT_STATE, MAX_ACT_MSG, (STATE_MACHINE_FUNC)Drop, ACT_IDLE, ACT_MACHINE_BASE);
+
+	StateMachineSetAction(S, ACT_IDLE, MT2_PEER_SPECTRUM_CATE, (STATE_MACHINE_FUNC)PeerSpectrumAction);
+	StateMachineSetAction(S, ACT_IDLE, MT2_PEER_QOS_CATE, (STATE_MACHINE_FUNC)PeerQOSAction);
+
+	StateMachineSetAction(S, ACT_IDLE, MT2_PEER_DLS_CATE, (STATE_MACHINE_FUNC)ReservedAction);
+#ifdef QOS_DLS_SUPPORT
+		StateMachineSetAction(S, ACT_IDLE, MT2_PEER_DLS_CATE, (STATE_MACHINE_FUNC)PeerDLSAction);
+#endif /* QOS_DLS_SUPPORT */
+
+#ifdef DOT11_N_SUPPORT
+	StateMachineSetAction(S, ACT_IDLE, MT2_PEER_BA_CATE, (STATE_MACHINE_FUNC)PeerBAAction);
+	StateMachineSetAction(S, ACT_IDLE, MT2_PEER_HT_CATE, (STATE_MACHINE_FUNC)PeerHTAction);
+	StateMachineSetAction(S, ACT_IDLE, MT2_MLME_ADD_BA_CATE, (STATE_MACHINE_FUNC)MlmeADDBAAction);
+	StateMachineSetAction(S, ACT_IDLE, MT2_MLME_ORI_DELBA_CATE, (STATE_MACHINE_FUNC)MlmeDELBAAction);
+	StateMachineSetAction(S, ACT_IDLE, MT2_MLME_REC_DELBA_CATE, (STATE_MACHINE_FUNC)MlmeDELBAAction);
+#endif /* DOT11_N_SUPPORT */
+
+	StateMachineSetAction(S, ACT_IDLE, MT2_PEER_PUBLIC_CATE, (STATE_MACHINE_FUNC)PeerPublicAction);
+	StateMachineSetAction(S, ACT_IDLE, MT2_PEER_RM_CATE, (STATE_MACHINE_FUNC)PeerRMAction);
+	
+	StateMachineSetAction(S, ACT_IDLE, MT2_MLME_QOS_CATE, (STATE_MACHINE_FUNC)MlmeQOSAction);
+	StateMachineSetAction(S, ACT_IDLE, MT2_MLME_DLS_CATE, (STATE_MACHINE_FUNC)MlmeDLSAction);
+	StateMachineSetAction(S, ACT_IDLE, MT2_ACT_INVALID, (STATE_MACHINE_FUNC)MlmeInvalidAction);
+
+
+
+
+
+}
+
+#ifdef DOT11_N_SUPPORT
+VOID MlmeADDBAAction(
+    IN PRTMP_ADAPTER pAd, 
+    IN MLME_QUEUE_ELEM *Elem) 
+
+{
+	MLME_ADDBA_REQ_STRUCT *pInfo;
+	UCHAR           Addr[6];
+	PUCHAR         pOutBuffer = NULL;
+	NDIS_STATUS     NStatus;
+	ULONG		Idx;
+	FRAME_ADDBA_REQ  Frame;
+	ULONG		FrameLen;
+	BA_ORI_ENTRY			*pBAEntry = NULL;
+
+	pInfo = (MLME_ADDBA_REQ_STRUCT *)Elem->Msg;
+	NdisZeroMemory(&Frame, sizeof(FRAME_ADDBA_REQ));
+	
+	if(MlmeAddBAReqSanity(pAd, Elem->Msg, Elem->MsgLen, Addr) &&
+		VALID_WCID(pInfo->Wcid)) 
+	{
+		NStatus = MlmeAllocateMemory(pAd, &pOutBuffer);  /*Get an unused nonpaged memory*/
+		if(NStatus != NDIS_STATUS_SUCCESS) 
+		{
+			DBGPRINT(RT_DEBUG_TRACE,("BA - MlmeADDBAAction() allocate memory failed \n"));
+			return;
+		}
+		/* 1. find entry*/
+		Idx = pAd->MacTab.Content[pInfo->Wcid].BAOriWcidArray[pInfo->TID];
+		if (Idx == 0)
+		{
+			MlmeFreeMemory(pAd, pOutBuffer);
+			DBGPRINT(RT_DEBUG_ERROR,("BA - MlmeADDBAAction() can't find BAOriEntry \n"));
+			return;
+		} 
+		else
+		{
+			pBAEntry =&pAd->BATable.BAOriEntry[Idx];
+		}
+		
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			if (ADHOC_ON(pAd)
+#ifdef QOS_DLS_SUPPORT
+				|| (IS_ENTRY_DLS(&pAd->MacTab.Content[pInfo->Wcid]))
+#endif /* QOS_DLS_SUPPORT */
+				)
+				ActHeaderInit(pAd, &Frame.Hdr, pInfo->pAddr, pAd->CurrentAddress, pAd->CommonCfg.Bssid);
+			else
+				ActHeaderInit(pAd, &Frame.Hdr, pAd->CommonCfg.Bssid, pAd->CurrentAddress, pInfo->pAddr);
+		}
+#endif /* CONFIG_STA_SUPPORT */ 
+
+		Frame.Category = CATEGORY_BA;
+		Frame.Action = ADDBA_REQ;
+		Frame.BaParm.AMSDUSupported = 0;
+		Frame.BaParm.BAPolicy = IMMED_BA;
+		Frame.BaParm.TID = pInfo->TID;
+		Frame.BaParm.BufSize = pInfo->BaBufSize;
+		Frame.Token = pInfo->Token;
+		Frame.TimeOutValue = pInfo->TimeOutValue;
+		Frame.BaStartSeq.field.FragNum = 0;
+		Frame.BaStartSeq.field.StartSeq = pAd->MacTab.Content[pInfo->Wcid].TxSeq[pInfo->TID];
+
+		*(USHORT *)(&(Frame.BaParm)) = cpu2le16((*(USHORT *)(&(Frame.BaParm))));
+		Frame.TimeOutValue = cpu2le16(Frame.TimeOutValue);
+		Frame.BaStartSeq.word = cpu2le16(Frame.BaStartSeq.word);
+
+		MakeOutgoingFrame(pOutBuffer,		   &FrameLen,
+		              sizeof(FRAME_ADDBA_REQ), &Frame,
+		              END_OF_ARGS);
+
+		MiniportMMRequest(pAd, (MGMT_USE_QUEUE_FLAG | MapUserPriorityToAccessCategory[pInfo->TID]), pOutBuffer, FrameLen);
+
+		MlmeFreeMemory(pAd, pOutBuffer);
+		
+		DBGPRINT(RT_DEBUG_TRACE, ("BA - Send ADDBA request. StartSeq = %x,  FrameLen = %ld. BufSize = %d\n", Frame.BaStartSeq.field.StartSeq, FrameLen, Frame.BaParm.BufSize));
+    }
+}
+
+/*
+    ==========================================================================
+    Description:
+        send DELBA and delete BaEntry if any
+    Parametrs:
+        Elem - MLME message MLME_DELBA_REQ_STRUCT
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+VOID MlmeDELBAAction(
+    IN PRTMP_ADAPTER pAd, 
+    IN MLME_QUEUE_ELEM *Elem) 
+{
+	MLME_DELBA_REQ_STRUCT *pInfo;
+	PUCHAR         pOutBuffer = NULL;
+	PUCHAR		   pOutBuffer2 = NULL;
+	NDIS_STATUS     NStatus;
+	ULONG		Idx;
+	FRAME_DELBA_REQ  Frame;
+	ULONG		FrameLen;
+	FRAME_BAR	FrameBar;
+	
+	pInfo = (MLME_DELBA_REQ_STRUCT *)Elem->Msg;	
+	/* must send back DELBA */
+	NdisZeroMemory(&Frame, sizeof(FRAME_DELBA_REQ));
+	DBGPRINT(RT_DEBUG_TRACE, ("==> MlmeDELBAAction(), Initiator(%d) \n", pInfo->Initiator));
+	
+	if(MlmeDelBAReqSanity(pAd, Elem->Msg, Elem->MsgLen) &&
+		VALID_WCID(pInfo->Wcid)) 
+	{
+		NStatus = MlmeAllocateMemory(pAd, &pOutBuffer);  /*Get an unused nonpaged memory*/
+		if(NStatus != NDIS_STATUS_SUCCESS) 
+		{
+			DBGPRINT(RT_DEBUG_ERROR,("BA - MlmeDELBAAction() allocate memory failed 1. \n"));
+			return;
+		}
+
+		NStatus = MlmeAllocateMemory(pAd, &pOutBuffer2);  /*Get an unused nonpaged memory*/
+		if(NStatus != NDIS_STATUS_SUCCESS) 
+		{
+			MlmeFreeMemory(pAd, pOutBuffer);
+			DBGPRINT(RT_DEBUG_ERROR, ("BA - MlmeDELBAAction() allocate memory failed 2. \n"));
+			return;
+		}
+
+		/* SEND BAR (Send BAR to refresh peer reordering buffer.)*/
+		Idx = pAd->MacTab.Content[pInfo->Wcid].BAOriWcidArray[pInfo->TID];
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+			BarHeaderInit(pAd, &FrameBar, pAd->MacTab.Content[pInfo->Wcid].Addr, pAd->CurrentAddress);
+#endif /* CONFIG_STA_SUPPORT */
+
+		FrameBar.StartingSeq.field.FragNum = 0; /* make sure sequence not clear in DEL funciton.*/
+		FrameBar.StartingSeq.field.StartSeq = pAd->MacTab.Content[pInfo->Wcid].TxSeq[pInfo->TID]; /* make sure sequence not clear in DEL funciton.*/
+		FrameBar.BarControl.TID = pInfo->TID; /* make sure sequence not clear in DEL funciton.*/
+		FrameBar.BarControl.ACKPolicy = IMMED_BA; /* make sure sequence not clear in DEL funciton.*/
+		FrameBar.BarControl.Compressed = 1; /* make sure sequence not clear in DEL funciton.*/
+		FrameBar.BarControl.MTID = 0; /* make sure sequence not clear in DEL funciton.*/
+
+		MakeOutgoingFrame(pOutBuffer2,				&FrameLen,
+					  sizeof(FRAME_BAR),	  &FrameBar,
+					  END_OF_ARGS);
+		MiniportMMRequest(pAd, QID_AC_BE, pOutBuffer2, FrameLen);
+		MlmeFreeMemory(pAd, pOutBuffer2);
+		DBGPRINT(RT_DEBUG_TRACE,("BA - MlmeDELBAAction() . Send BAR to refresh peer reordering buffer \n"));
+
+		/* SEND DELBA FRAME*/
+		FrameLen = 0;
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			if (ADHOC_ON(pAd)
+#ifdef QOS_DLS_SUPPORT
+				|| (IS_ENTRY_DLS(&pAd->MacTab.Content[pInfo->Wcid]))
+#endif /* QOS_DLS_SUPPORT */
+				)
+				ActHeaderInit(pAd, &Frame.Hdr, pAd->MacTab.Content[pInfo->Wcid].Addr, pAd->CurrentAddress, pAd->CommonCfg.Bssid);
+			else
+				ActHeaderInit(pAd, &Frame.Hdr,  pAd->CommonCfg.Bssid, pAd->CurrentAddress, pAd->MacTab.Content[pInfo->Wcid].Addr);
+		}
+#endif /* CONFIG_STA_SUPPORT */
+
+		Frame.Category = CATEGORY_BA;
+		Frame.Action = DELBA;
+		Frame.DelbaParm.Initiator = pInfo->Initiator;
+		Frame.DelbaParm.TID = pInfo->TID;
+		Frame.ReasonCode = 39; /* Time Out*/
+		*(USHORT *)(&Frame.DelbaParm) = cpu2le16(*(USHORT *)(&Frame.DelbaParm));
+		Frame.ReasonCode = cpu2le16(Frame.ReasonCode);
+		
+		MakeOutgoingFrame(pOutBuffer,               &FrameLen,
+		              sizeof(FRAME_DELBA_REQ),    &Frame,
+		              END_OF_ARGS);
+		MiniportMMRequest(pAd, QID_AC_BE, pOutBuffer, FrameLen);
+		MlmeFreeMemory(pAd, pOutBuffer);
+		DBGPRINT(RT_DEBUG_TRACE, ("BA - MlmeDELBAAction() . 3 DELBA sent. Initiator(%d)\n", pInfo->Initiator));
+    	}
+}
+#endif /* DOT11_N_SUPPORT */
+
+VOID MlmeQOSAction(
+    IN PRTMP_ADAPTER pAd, 
+    IN MLME_QUEUE_ELEM *Elem) 
+{
+}
+
+VOID MlmeDLSAction(
+    IN PRTMP_ADAPTER pAd, 
+    IN MLME_QUEUE_ELEM *Elem) 
+{
+}
+
+VOID MlmeInvalidAction(
+    IN PRTMP_ADAPTER pAd, 
+    IN MLME_QUEUE_ELEM *Elem) 
+{
+	/*PUCHAR		   pOutBuffer = NULL;*/
+	/*Return the receiving frame except the MSB of category filed set to 1.  7.3.1.11*/
+}
+
+VOID PeerQOSAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+{
+}
+
+#ifdef QOS_DLS_SUPPORT
+VOID PeerDLSAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+{
+	UCHAR	Action = Elem->Msg[LENGTH_802_11+1];
+
+	switch(Action)
+	{
+		case ACTION_DLS_REQUEST:
+#ifdef CONFIG_STA_SUPPORT
+			IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+			PeerDlsReqAction(pAd, Elem);
+#endif /* CONFIG_STA_SUPPORT */
+			break;
+
+		case ACTION_DLS_RESPONSE:
+#ifdef CONFIG_STA_SUPPORT
+			IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+			PeerDlsRspAction(pAd, Elem);
+#endif /* CONFIG_STA_SUPPORT */
+			break;
+
+		case ACTION_DLS_TEARDOWN:
+#ifdef CONFIG_STA_SUPPORT
+			IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+			PeerDlsTearDownAction(pAd, Elem);
+#endif /* CONFIG_STA_SUPPORT */
+			break;
+	}
+}
+#endif /* QOS_DLS_SUPPORT */
+
+
+
+#ifdef DOT11_N_SUPPORT
+VOID PeerBAAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+{
+	UCHAR	Action = Elem->Msg[LENGTH_802_11+1];
+	
+	switch(Action)
+	{
+		case ADDBA_REQ:
+			PeerAddBAReqAction(pAd,Elem);
+			break;
+		case ADDBA_RESP:
+			PeerAddBARspAction(pAd,Elem);
+			break;
+		case DELBA:
+			PeerDelBAAction(pAd,Elem);
+			break;
+	}
+}
+
+
+#ifdef DOT11N_DRAFT3
+
+#ifdef CONFIG_STA_SUPPORT
+VOID StaPublicAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN BSS_2040_COEXIST_IE *pBssCoexIE) 
+{
+	MLME_SCAN_REQ_STRUCT ScanReq;
+
+	DBGPRINT(RT_DEBUG_TRACE,("ACTION - StaPeerPublicAction  Bss2040Coexist = %x\n", *((PUCHAR)pBssCoexIE)));
+
+	/* AP asks Station to return a 20/40 BSS Coexistence mgmt frame.  So we first starts a scan, then send back 20/40 BSS Coexistence mgmt frame */
+	if ((pBssCoexIE->field.InfoReq == 1) && (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_SCAN_2040)))
+	{
+		/* Clear record first.  After scan , will update those bit and send back to transmiter.*/
+		pAd->CommonCfg.BSSCoexist2040.field.InfoReq = 1;
+		pAd->CommonCfg.BSSCoexist2040.field.Intolerant40 = 0;
+		pAd->CommonCfg.BSSCoexist2040.field.BSS20WidthReq = 0;
+		/* Clear Trigger event table*/
+		TriEventInit(pAd);
+		/* Fill out stuff for scan request  and kick to scan*/
+		ScanParmFill(pAd, &ScanReq, ZeroSsid, 0, BSS_ANY, SCAN_2040_BSS_COEXIST);
+		MlmeEnqueue(pAd, SYNC_STATE_MACHINE, MT2_MLME_SCAN_REQ, sizeof(MLME_SCAN_REQ_STRUCT), &ScanReq, 0);
+		pAd->Mlme.CntlMachine.CurrState = CNTL_WAIT_OID_LIST_SCAN;
+		RTMP_MLME_HANDLER(pAd);
+	}
+}
+
+
+/*
+Description : Build Intolerant Channel Rerpot from Trigger event table.
+return : how many bytes copied. 
+*/
+ULONG BuildIntolerantChannelRep(
+	IN	PRTMP_ADAPTER	pAd,
+	IN    PUCHAR  pDest) 
+{
+	ULONG			FrameLen = 0;
+	ULONG			ReadOffset = 0;
+	UCHAR			i, j, k, idx = 0;
+	/*UCHAR			LastRegClass = 0xff;*/
+	UCHAR			ChannelList[MAX_TRIGGER_EVENT];
+	UCHAR			TmpRegClass;
+	UCHAR			RegClassArray[7] = {0, 11,12, 32, 33, 54,55}; /* Those regulatory class has channel in 2.4GHz. See Annex J.*/
+
+
+	RTMPZeroMemory(ChannelList, MAX_TRIGGER_EVENT);
+
+	/* Find every regulatory class*/
+	for ( k = 0;k < 7;k++)
+	{
+		TmpRegClass = RegClassArray[k];
+		
+		idx = 0;
+		/* Find Channel report with the same regulatory class in 2.4GHz.*/
+		for ( i = 0;i < pAd->CommonCfg.TriggerEventTab.EventANo;i++)
+		{
+			if (pAd->CommonCfg.TriggerEventTab.EventA[i].bValid == TRUE)
+			{
+				if (pAd->CommonCfg.TriggerEventTab.EventA[i].RegClass == TmpRegClass)
+				{				
+					for (j = 0;j < idx;j++)
+					{
+						if (ChannelList[j] == (UCHAR)pAd->CommonCfg.TriggerEventTab.EventA[i].Channel)
+							break;
+					}
+					if ((j == idx))
+					{
+						ChannelList[idx] = (UCHAR)pAd->CommonCfg.TriggerEventTab.EventA[i].Channel;
+						idx++;
+					} 
+					pAd->CommonCfg.TriggerEventTab.EventA[i].bValid = FALSE;
+				}
+				DBGPRINT(RT_DEBUG_ERROR,("ACT - BuildIntolerantChannelRep , Total Channel number = %d \n", idx));
+			}
+		}
+
+		/* idx > 0 means this regulatory class has some channel report and need to copy to the pDest.*/
+		if (idx > 0)
+		{
+			/* For each regaulatory IE report, contains all channels that has the same regulatory class.*/
+			*(pDest + ReadOffset) = IE_2040_BSS_INTOLERANT_REPORT;  /* IE*/
+			*(pDest + ReadOffset + 1) = 1+ idx;	/* Len = RegClass byte + channel byte.*/
+			*(pDest + ReadOffset + 2) = TmpRegClass;	/* Len = RegClass byte + channel byte.*/
+			RTMPMoveMemory(pDest + ReadOffset + 3, ChannelList, idx);
+
+			FrameLen += (3 + idx);
+			ReadOffset += (3 + idx);
+		}
+		
+	}
+
+	DBGPRINT(RT_DEBUG_ERROR,("ACT-BuildIntolerantChannelRep(Size=%ld)\n", FrameLen));
+	hex_dump("ACT-pDestMsg", pDest, FrameLen);
+
+	return FrameLen;
+}
+
+/*	
+	==========================================================================
+	Description: 
+	After scan, Update 20/40 BSS Coexistence IE and send out.
+	According to 802.11n D3.03 11.14.10
+		
+	Parameters: 
+	==========================================================================
+ */
+VOID Update2040CoexistFrameAndNotify(
+	IN	PRTMP_ADAPTER	pAd,
+	IN    UCHAR  Wcid,
+	IN	BOOLEAN	bAddIntolerantCha) 
+{
+	BSS_2040_COEXIST_IE		OldValue;
+
+	DBGPRINT(RT_DEBUG_ERROR,("ACT - Update2040CoexistFrameAndNotify. BSSCoexist2040 = %x. EventANo = %d. \n", pAd->CommonCfg.BSSCoexist2040.word, pAd->CommonCfg.TriggerEventTab.EventANo));
+	OldValue.word = pAd->CommonCfg.BSSCoexist2040.word;
+	/* Reset value.*/
+	pAd->CommonCfg.BSSCoexist2040.word = 0;
+
+	if (pAd->CommonCfg.TriggerEventTab.EventBCountDown > 0)
+		pAd->CommonCfg.BSSCoexist2040.field.BSS20WidthReq = 1;
+
+	/* Need to check !!!!*/
+	/* How STA will set Intolerant40 if implementation dependent. Now we don't set this bit first!!!!!*/
+	/* So Only check BSS20WidthReq change.*/
+	/*if (OldValue.field.BSS20WidthReq != pAd->CommonCfg.BSSCoexist2040.field.BSS20WidthReq)*/
+	{
+		Send2040CoexistAction(pAd, Wcid, bAddIntolerantCha);
+	}
+}
+
+/*
+Description : Send 20/40 BSS Coexistence Action frame If one trigger event is triggered.
+*/
+VOID Send2040CoexistAction(
+	IN	PRTMP_ADAPTER	pAd,
+	IN    UCHAR  Wcid,
+	IN	BOOLEAN	bAddIntolerantCha) 
+{
+	PUCHAR			pOutBuffer = NULL;
+	NDIS_STATUS 	NStatus;
+	FRAME_ACTION_HDR	Frame;
+	ULONG			FrameLen;
+	UINT32			IntolerantChaRepLen;
+	UCHAR			HtLen = 1;
+
+	IntolerantChaRepLen = 0;
+	NStatus = MlmeAllocateMemory(pAd, &pOutBuffer);  /*Get an unused nonpaged memory*/
+	if(NStatus != NDIS_STATUS_SUCCESS) 
+	{
+		DBGPRINT(RT_DEBUG_ERROR,("ACT - Send2040CoexistAction() allocate memory failed \n"));
+		return;
+	}
+
+	ActHeaderInit(pAd, &Frame.Hdr, pAd->MacTab.Content[Wcid].Addr, pAd->CurrentAddress, pAd->CommonCfg.Bssid);	
+
+	Frame.Category = CATEGORY_PUBLIC;
+	Frame.Action = ACTION_BSS_2040_COEXIST; /*COEXIST_2040_ACTION;*/
+	
+	MakeOutgoingFrame(pOutBuffer,				&FrameLen,
+				  sizeof(FRAME_ACTION_HDR),	  &Frame,
+				  1,                                &BssCoexistIe,
+				  1,                                &HtLen,
+				  1,                                &pAd->CommonCfg.BSSCoexist2040.word,
+				  END_OF_ARGS);
+	
+	if (bAddIntolerantCha == TRUE)
+		IntolerantChaRepLen = BuildIntolerantChannelRep(pAd, pOutBuffer + FrameLen);
+
+	/*2009 PF#3: IOT issue with Motorola AP. It will not check the field of BSSCoexist2040.*/
+	/*11.14.12 Switching between 40 MHz and 20 MHz*/
+	DBGPRINT(RT_DEBUG_TRACE, ("IntolerantChaRepLen=%d, BSSCoexist2040=0x%x!\n", 
+								IntolerantChaRepLen, pAd->CommonCfg.BSSCoexist2040.word));
+	if (!((IntolerantChaRepLen == 0) && (pAd->CommonCfg.BSSCoexist2040.word == 0)))
+		MiniportMMRequest(pAd, QID_AC_BE, pOutBuffer, FrameLen + IntolerantChaRepLen);
+		
+	MlmeFreeMemory(pAd, pOutBuffer);
+	
+	DBGPRINT(RT_DEBUG_TRACE,("ACT - Send2040CoexistAction( BSSCoexist2040 = 0x%x )  \n", pAd->CommonCfg.BSSCoexist2040.word));
+}
+
+VOID UpdateBssScanParm(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	OVERLAP_BSS_SCAN_IE	APBssScan) 
+{									 
+	pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor = le2cpu16(APBssScan.DelayFactor); /*APBssScan.DelayFactor[1] * 256 + APBssScan.DelayFactor[0];*/
+	/* out of range defined in MIB... So fall back to default value.*/
+	if ((pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor <5) || (pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor > 100))
+	{
+		/*DBGPRINT(RT_DEBUG_ERROR,("ACT - UpdateBssScanParm( Dot11BssWidthChanTranDelayFactor out of range !!!!)  \n"));*/
+		pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor = 5;
+	}
+
+	pAd->CommonCfg.Dot11BssWidthTriggerScanInt = le2cpu16(APBssScan.TriggerScanInt); /*APBssScan.TriggerScanInt[1] * 256 + APBssScan.TriggerScanInt[0];*/
+	/* out of range defined in MIB... So fall back to default value.*/
+	if ((pAd->CommonCfg.Dot11BssWidthTriggerScanInt < 10) ||(pAd->CommonCfg.Dot11BssWidthTriggerScanInt > 900))
+	{
+		/*DBGPRINT(RT_DEBUG_ERROR,("ACT - UpdateBssScanParm( Dot11BssWidthTriggerScanInt out of range !!!!)  \n"));*/
+		pAd->CommonCfg.Dot11BssWidthTriggerScanInt = 900;
+	}
+		
+	pAd->CommonCfg.Dot11OBssScanPassiveDwell = le2cpu16(APBssScan.ScanPassiveDwell); /*APBssScan.ScanPassiveDwell[1] * 256 + APBssScan.ScanPassiveDwell[0];*/
+	/* out of range defined in MIB... So fall back to default value.*/
+	if ((pAd->CommonCfg.Dot11OBssScanPassiveDwell < 5) ||(pAd->CommonCfg.Dot11OBssScanPassiveDwell > 1000))
+	{
+		/*DBGPRINT(RT_DEBUG_ERROR,("ACT - UpdateBssScanParm( Dot11OBssScanPassiveDwell out of range !!!!)  \n"));*/
+		pAd->CommonCfg.Dot11OBssScanPassiveDwell = 20;
+	}
+	
+	pAd->CommonCfg.Dot11OBssScanActiveDwell = le2cpu16(APBssScan.ScanActiveDwell); /*APBssScan.ScanActiveDwell[1] * 256 + APBssScan.ScanActiveDwell[0];*/
+	/* out of range defined in MIB... So fall back to default value.*/
+	if ((pAd->CommonCfg.Dot11OBssScanActiveDwell < 10) ||(pAd->CommonCfg.Dot11OBssScanActiveDwell > 1000))
+	{
+		/*DBGPRINT(RT_DEBUG_ERROR,("ACT - UpdateBssScanParm( Dot11OBssScanActiveDwell out of range !!!!)  \n"));*/
+		pAd->CommonCfg.Dot11OBssScanActiveDwell = 10;
+	}
+	
+	pAd->CommonCfg.Dot11OBssScanPassiveTotalPerChannel = le2cpu16(APBssScan.PassiveTalPerChannel); /*APBssScan.PassiveTalPerChannel[1] * 256 + APBssScan.PassiveTalPerChannel[0];*/
+	/* out of range defined in MIB... So fall back to default value.*/
+	if ((pAd->CommonCfg.Dot11OBssScanPassiveTotalPerChannel < 200) ||(pAd->CommonCfg.Dot11OBssScanPassiveTotalPerChannel > 10000))
+	{
+		/*DBGPRINT(RT_DEBUG_ERROR,("ACT - UpdateBssScanParm( Dot11OBssScanPassiveTotalPerChannel out of range !!!!)  \n"));*/
+		pAd->CommonCfg.Dot11OBssScanPassiveTotalPerChannel = 200;
+	}
+	
+	pAd->CommonCfg.Dot11OBssScanActiveTotalPerChannel = le2cpu16(APBssScan.ActiveTalPerChannel); /*APBssScan.ActiveTalPerChannel[1] * 256 + APBssScan.ActiveTalPerChannel[0];*/
+	/* out of range defined in MIB... So fall back to default value.*/
+	if ((pAd->CommonCfg.Dot11OBssScanActiveTotalPerChannel < 20) ||(pAd->CommonCfg.Dot11OBssScanActiveTotalPerChannel > 10000))
+	{
+		/*DBGPRINT(RT_DEBUG_ERROR,("ACT - UpdateBssScanParm( Dot11OBssScanActiveTotalPerChannel out of range !!!!)  \n"));*/
+		pAd->CommonCfg.Dot11OBssScanActiveTotalPerChannel = 20;
+	}
+	
+	pAd->CommonCfg.Dot11OBssScanActivityThre = le2cpu16(APBssScan.ScanActThre); /*APBssScan.ScanActThre[1] * 256 + APBssScan.ScanActThre[0];*/
+	/* out of range defined in MIB... So fall back to default value.*/
+	if (pAd->CommonCfg.Dot11OBssScanActivityThre > 100)
+	{
+		/*DBGPRINT(RT_DEBUG_ERROR,("ACT - UpdateBssScanParm( Dot11OBssScanActivityThre out of range !!!!)  \n"));*/
+		pAd->CommonCfg.Dot11OBssScanActivityThre = 25;
+	}
+
+	pAd->CommonCfg.Dot11BssWidthChanTranDelay = (pAd->CommonCfg.Dot11BssWidthTriggerScanInt * pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor);
+	/*DBGPRINT(RT_DEBUG_LOUD,("ACT - UpdateBssScanParm( Dot11BssWidthTriggerScanInt = %d )  \n", pAd->CommonCfg.Dot11BssWidthTriggerScanInt));*/
+}
+
+#endif /* CONFIG_STA_SUPPORT */
+
+
+BOOLEAN ChannelSwitchSanityCheck(
+	IN	PRTMP_ADAPTER	pAd,
+	IN    UCHAR  Wcid,
+	IN    UCHAR  NewChannel,
+	IN    UCHAR  Secondary) 
+{
+	UCHAR		i;
+	
+	if (Wcid >= MAX_LEN_OF_MAC_TABLE)
+		return FALSE;
+
+	if ((NewChannel > 7) && (Secondary == 1))
+		return FALSE;
+
+	if ((NewChannel < 5) && (Secondary == 3))
+		return FALSE;
+
+	/* 0. Check if new channel is in the channellist.*/
+	for (i = 0;i < pAd->ChannelListNum;i++)
+	{
+		if (pAd->ChannelList[i].Channel == NewChannel)
+		{
+			break;
+		}
+	}
+
+	if (i == pAd->ChannelListNum)
+		return FALSE;
+	
+	return TRUE;
+}
+
+
+VOID ChannelSwitchAction(
+	IN	PRTMP_ADAPTER	pAd,
+	IN    UCHAR  Wcid,
+	IN    UCHAR  NewChannel,
+	IN    UCHAR  Secondary) 
+{
+	UCHAR		BBPValue = 0;
+	INT32		MACValue;
+	
+	DBGPRINT(RT_DEBUG_TRACE,("SPECTRUM - ChannelSwitchAction(NewChannel = %d , Secondary = %d)  \n", NewChannel, Secondary));
+
+	if (ChannelSwitchSanityCheck(pAd, Wcid, NewChannel, Secondary) == FALSE)
+		return;
+	
+	/* 1.  Switches to BW = 20.*/
+	if (Secondary == 0)
+	{
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
+		BBPValue&= (~0x18);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
+		if (pAd->MACVersion == 0x28600100)
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x08);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x11);
+			DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
+		}
+		pAd->CommonCfg.BBPCurrentBW = BW_20;
+		pAd->CommonCfg.Channel = NewChannel;
+		pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel;
+		AsicSwitchChannel(pAd, pAd->CommonCfg.Channel,FALSE);
+		AsicLockChannel(pAd, pAd->CommonCfg.Channel);
+		pAd->MacTab.Content[Wcid].HTPhyMode.field.BW = 0;
+		pAd->CommonCfg.AddHTInfo.AddHtInfo.RecomWidth = 0;
+                pAd->CommonCfg.AddHTInfo.AddHtInfo.ExtChanOffset = 0;		
+		DBGPRINT(RT_DEBUG_TRACE, ("!!!20MHz   !!! \n" ));
+	}
+	/* 1.  Switches to BW = 40 And Station supports BW = 40.*/
+	else if (((Secondary == 1) || (Secondary == 3)) && (pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth == 1))
+	{
+		pAd->CommonCfg.Channel = NewChannel;
+
+		if (Secondary == 1)
+		{
+			/* Secondary above.*/
+			pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel + 2;
+			RTMP_IO_READ32(pAd, TX_BAND_CFG, &MACValue);
+			MACValue &= 0xfe;
+			RTMP_IO_WRITE32(pAd, TX_BAND_CFG, MACValue);
+			RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
+			BBPValue&= (~0x18);
+
+			BBPValue|= (0x10);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
+			RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPValue);
+			BBPValue&= (~0x20);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPValue);
+			DBGPRINT(RT_DEBUG_TRACE, ("!!!40MHz Lower LINK UP !!! Control Channel at Below. Central = %d \n", pAd->CommonCfg.CentralChannel ));
+		}
+		else
+		{
+
+			/* Secondary below.*/
+			pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel - 2;
+			RTMP_IO_READ32(pAd, TX_BAND_CFG, &MACValue);
+			MACValue &= 0xfe;
+			MACValue |= 0x1;
+			RTMP_IO_WRITE32(pAd, TX_BAND_CFG, MACValue);
+			RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
+			BBPValue&= (~0x18);
+			BBPValue|= (0x10);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
+			RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPValue);
+			BBPValue&= (~0x20);
+			BBPValue|= (0x20);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPValue);
+			DBGPRINT(RT_DEBUG_TRACE, ("!!!40MHz Upper LINK UP !!! Control Channel at UpperCentral = %d \n", pAd->CommonCfg.CentralChannel ));
+		}
+		pAd->CommonCfg.BBPCurrentBW = BW_40;
+		AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
+		AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
+		pAd->MacTab.Content[Wcid].HTPhyMode.field.BW = 1;
+	}
+}
+#endif /* DOT11N_DRAFT3 */
+#endif /* DOT11_N_SUPPORT */
+
+VOID PeerPublicAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+{
+	UCHAR	Action = Elem->Msg[LENGTH_802_11+1];
+	if (Elem->Wcid >= MAX_LEN_OF_MAC_TABLE)
+		return;
+
+
+	switch(Action)
+	{
+#ifdef DOT11_N_SUPPORT
+#ifdef DOT11N_DRAFT3
+		case ACTION_BSS_2040_COEXIST:	/* Format defined in IEEE 7.4.7a.1 in 11n Draf3.03*/
+			{
+				/*UCHAR	BssCoexist;*/
+				BSS_2040_COEXIST_ELEMENT		*pCoexistInfo;
+				BSS_2040_COEXIST_IE 			*pBssCoexistIe;
+				BSS_2040_INTOLERANT_CH_REPORT	*pIntolerantReport = NULL;
+				
+				if (Elem->MsgLen <= (LENGTH_802_11 + sizeof(BSS_2040_COEXIST_ELEMENT)) )
+				{
+					DBGPRINT(RT_DEBUG_ERROR, ("ACTION - 20/40 BSS Coexistence Management Frame length too short! len = %ld!\n", Elem->MsgLen));
+					break;
+				}			
+				DBGPRINT(RT_DEBUG_TRACE, ("ACTION - 20/40 BSS Coexistence Management action----> \n"));
+				hex_dump("CoexistenceMgmtFrame", Elem->Msg, Elem->MsgLen);
+
+				
+				pCoexistInfo = (BSS_2040_COEXIST_ELEMENT *) &Elem->Msg[LENGTH_802_11+2];
+				/*hex_dump("CoexistInfo", (PUCHAR)pCoexistInfo, sizeof(BSS_2040_COEXIST_ELEMENT));*/
+				if (Elem->MsgLen >= (LENGTH_802_11 + sizeof(BSS_2040_COEXIST_ELEMENT) + sizeof(BSS_2040_INTOLERANT_CH_REPORT)))
+				{
+					pIntolerantReport = (BSS_2040_INTOLERANT_CH_REPORT *)((PUCHAR)pCoexistInfo + sizeof(BSS_2040_COEXIST_ELEMENT));
+				}
+				/*hex_dump("IntolerantReport ", (PUCHAR)pIntolerantReport, sizeof(BSS_2040_INTOLERANT_CH_REPORT));*/
+				
+				if(pAd->CommonCfg.bBssCoexEnable == FALSE || (pAd->CommonCfg.bForty_Mhz_Intolerant == TRUE))
+				{
+					DBGPRINT(RT_DEBUG_TRACE, ("20/40 BSS CoexMgmt=%d, bForty_Mhz_Intolerant=%d, ignore this action!!\n", 
+												pAd->CommonCfg.bBssCoexEnable,
+												pAd->CommonCfg.bForty_Mhz_Intolerant));
+					break;
+				}
+
+				pBssCoexistIe = (BSS_2040_COEXIST_IE *)(&pCoexistInfo->BssCoexistIe);
+
+#ifdef CONFIG_STA_SUPPORT
+				IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+				{
+					if (INFRA_ON(pAd))
+					{
+						StaPublicAction(pAd, pBssCoexistIe);
+					}
+				}
+#endif /* CONFIG_STA_SUPPORT */
+
+			}
+			break;
+#endif /* DOT11N_DRAFT3 */
+#endif /* DOT11_N_SUPPORT */
+
+	}
+
+
+}	
+
+
+static VOID ReservedAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	UCHAR Category;
+
+	if (Elem->MsgLen <= LENGTH_802_11)
+	{
+		return;
+	}
+
+	Category = Elem->Msg[LENGTH_802_11];
+	DBGPRINT(RT_DEBUG_TRACE,("Rcv reserved category(%d) Action Frame\n", Category));
+	hex_dump("Reserved Action Frame", &Elem->Msg[0], Elem->MsgLen);
+}
+
+VOID PeerRMAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+
+{
+	return;
+}
+
+#ifdef DOT11_N_SUPPORT
+static VOID respond_ht_information_exchange_action(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem) 
+{
+	PUCHAR			pOutBuffer = NULL;
+	NDIS_STATUS		NStatus;
+	ULONG			FrameLen;
+	FRAME_HT_INFO	HTINFOframe, *pFrame;
+	UCHAR   		*pAddr;
+
+
+	/* 2. Always send back ADDBA Response */
+	NStatus = MlmeAllocateMemory(pAd, &pOutBuffer);	 /*Get an unused nonpaged memory*/
+
+	if (NStatus != NDIS_STATUS_SUCCESS)
+	{
+		DBGPRINT(RT_DEBUG_TRACE,("ACTION - respond_ht_information_exchange_action() allocate memory failed \n"));
+		return;
+	}
+
+	/* get RA*/
+	pFrame = (FRAME_HT_INFO *) &Elem->Msg[0];
+	pAddr = pFrame->Hdr.Addr2;
+
+	NdisZeroMemory(&HTINFOframe, sizeof(FRAME_HT_INFO));
+	/* 2-1. Prepare ADDBA Response frame.*/
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		if (ADHOC_ON(pAd))
+			ActHeaderInit(pAd, &HTINFOframe.Hdr, pAddr, pAd->CurrentAddress, pAd->CommonCfg.Bssid);
+		else
+		ActHeaderInit(pAd, &HTINFOframe.Hdr, pAd->CommonCfg.Bssid, pAd->CurrentAddress, pAddr);
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	HTINFOframe.Category = CATEGORY_HT;
+	HTINFOframe.Action = HT_INFO_EXCHANGE;
+	HTINFOframe.HT_Info.Request = 0;
+	HTINFOframe.HT_Info.Forty_MHz_Intolerant = pAd->CommonCfg.HtCapability.HtCapInfo.Forty_Mhz_Intolerant;
+	HTINFOframe.HT_Info.STA_Channel_Width	 = pAd->CommonCfg.AddHTInfo.AddHtInfo.RecomWidth;	
+
+	MakeOutgoingFrame(pOutBuffer,					&FrameLen,
+					  sizeof(FRAME_HT_INFO),	&HTINFOframe,
+					  END_OF_ARGS);
+
+	MiniportMMRequest(pAd, QID_AC_BE, pOutBuffer, FrameLen);
+	MlmeFreeMemory(pAd, pOutBuffer);
+}
+
+
+
+
+VOID PeerHTAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+{
+	UCHAR	Action = Elem->Msg[LENGTH_802_11+1];
+	
+	if (Elem->Wcid >= MAX_LEN_OF_MAC_TABLE)
+		return;
+	
+	switch(Action)
+	{
+		case NOTIFY_BW_ACTION:
+			DBGPRINT(RT_DEBUG_TRACE,("ACTION - HT Notify Channel bandwidth action----> \n"));
+#ifdef CONFIG_STA_SUPPORT
+			if(pAd->StaActive.SupportedPhyInfo.bHtEnable == FALSE)
+			{
+				/* Note, this is to patch DIR-1353 AP. When the AP set to Wep, it will use legacy mode. But AP still keeps */
+				/* sending BW_Notify Action frame, and cause us to linkup and linkdown. */
+				/* In legacy mode, don't need to parse HT action frame.*/
+				DBGPRINT(RT_DEBUG_TRACE,("ACTION -Ignore HT Notify Channel BW when link as legacy mode. BW = %d---> \n", 
+								Elem->Msg[LENGTH_802_11+2] ));
+				break;
+			}
+#endif /* CONFIG_STA_SUPPORT */
+
+			if (Elem->Msg[LENGTH_802_11+2] == 0)	/* 7.4.8.2. if value is 1, keep the same as supported channel bandwidth. */
+				pAd->MacTab.Content[Elem->Wcid].HTPhyMode.field.BW = 0;
+			else 
+			{
+				pAd->MacTab.Content[Elem->Wcid].HTPhyMode.field.BW = 
+					pAd->MacTab.Content[Elem->Wcid].MaxHTPhyMode.field.BW & pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth;
+			}
+			
+			break;
+
+		case SMPS_ACTION:
+			/* 7.3.1.25*/
+ 			DBGPRINT(RT_DEBUG_TRACE,("ACTION - SMPS action----> \n"));
+			if (((Elem->Msg[LENGTH_802_11+2]&0x1) == 0))
+			{
+				pAd->MacTab.Content[Elem->Wcid].MmpsMode = MMPS_ENABLE;
+			}
+			else if (((Elem->Msg[LENGTH_802_11+2]&0x2) == 0))
+			{
+				pAd->MacTab.Content[Elem->Wcid].MmpsMode = MMPS_STATIC;
+			}
+			else
+			{			
+				pAd->MacTab.Content[Elem->Wcid].MmpsMode = MMPS_DYNAMIC;
+			}
+
+			DBGPRINT(RT_DEBUG_TRACE,("Aid(%d) MIMO PS = %d\n", Elem->Wcid, pAd->MacTab.Content[Elem->Wcid].MmpsMode));
+			/* rt2860c : add something for smps change.*/
+			break;
+ 
+		case SETPCO_ACTION:
+			break;
+			
+		case MIMO_CHA_MEASURE_ACTION:
+			break;
+			
+		case HT_INFO_EXCHANGE:
+			{			
+				HT_INFORMATION_OCTET	*pHT_info;
+
+				pHT_info = (HT_INFORMATION_OCTET *) &Elem->Msg[LENGTH_802_11+2];
+    				/* 7.4.8.10*/
+    				DBGPRINT(RT_DEBUG_TRACE,("ACTION - HT Information Exchange action----> \n"));
+    				if (pHT_info->Request)
+    				{
+    					respond_ht_information_exchange_action(pAd, Elem);
+    				}
+			}
+    		break;
+	}
+}
+
+
+/*
+	==========================================================================
+	Description:
+		Retry sending ADDBA Reqest.
+		
+	IRQL = DISPATCH_LEVEL
+	
+	Parametrs:
+	p8023Header: if this is already 802.3 format, p8023Header is NULL
+	
+	Return	: TRUE if put into rx reordering buffer, shouldn't indicaterxhere.
+				FALSE , then continue indicaterx at this moment.
+	==========================================================================
+ */
+VOID ORIBATimerTimeout(
+	IN	PRTMP_ADAPTER	pAd) 
+{
+	MAC_TABLE_ENTRY	*pEntry;
+	INT			i, total;
+/*	FRAME_BAR			FrameBar;*/
+/*	ULONG			FrameLen;*/
+/*	NDIS_STATUS 	NStatus;*/
+/*	PUCHAR			pOutBuffer = NULL;*/
+/*	USHORT			Sequence;*/
+	UCHAR			TID;
+
+#ifdef RALINK_ATE
+	if (ATE_ON(pAd))
+		return;
+#endif /* RALINK_ATE */
+
+	total = pAd->MacTab.Size * NUM_OF_TID;
+
+	for (i = 1; ((i <MAX_LEN_OF_BA_ORI_TABLE) && (total > 0)) ; i++)
+	{
+		if  (pAd->BATable.BAOriEntry[i].ORI_BA_Status == Originator_Done)
+		{
+			pEntry = &pAd->MacTab.Content[pAd->BATable.BAOriEntry[i].Wcid];
+			TID = pAd->BATable.BAOriEntry[i].TID;
+
+			ASSERT(pAd->BATable.BAOriEntry[i].Wcid < MAX_LEN_OF_MAC_TABLE);
+		}
+		total --;
+	}
+}
+
+
+VOID SendRefreshBAR(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	MAC_TABLE_ENTRY	*pEntry) 
+{
+	FRAME_BAR		FrameBar;
+	ULONG			FrameLen;
+	NDIS_STATUS 	NStatus;
+	PUCHAR			pOutBuffer = NULL;
+	USHORT			Sequence;
+	UCHAR			i, TID;
+	USHORT			idx;
+	BA_ORI_ENTRY	*pBAEntry;
+
+	for (i = 0; i <NUM_OF_TID; i++)
+	{
+		idx = pEntry->BAOriWcidArray[i];
+		if (idx == 0)
+		{
+			continue;
+		}
+		pBAEntry = &pAd->BATable.BAOriEntry[idx];
+
+		if  (pBAEntry->ORI_BA_Status == Originator_Done)
+		{
+			TID = pBAEntry->TID;
+
+			ASSERT(pBAEntry->Wcid < MAX_LEN_OF_MAC_TABLE);
+
+			NStatus = MlmeAllocateMemory(pAd, &pOutBuffer);  /*Get an unused nonpaged memory*/
+			if(NStatus != NDIS_STATUS_SUCCESS) 
+			{
+				DBGPRINT(RT_DEBUG_ERROR,("BA - MlmeADDBAAction() allocate memory failed \n"));
+				return;
+			}
+				
+			Sequence = pEntry->TxSeq[TID];
+
+
+#ifdef CONFIG_STA_SUPPORT
+			IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+				BarHeaderInit(pAd, &FrameBar, pEntry->Addr, pAd->CurrentAddress);
+#endif /* CONFIG_STA_SUPPORT */
+
+			FrameBar.StartingSeq.field.FragNum = 0; /* make sure sequence not clear in DEL function.*/
+			FrameBar.StartingSeq.field.StartSeq = Sequence; /* make sure sequence not clear in DEL funciton.*/
+			FrameBar.BarControl.TID = TID; /* make sure sequence not clear in DEL funciton.*/
+
+			MakeOutgoingFrame(pOutBuffer,				&FrameLen,
+							  sizeof(FRAME_BAR),	  &FrameBar,
+							  END_OF_ARGS);
+			/*if (!(CLIENT_STATUS_TEST_FLAG(pEntry, fCLIENT_STATUS_RALINK_CHIPSET)))*/
+			if (1)	/* Now we always send BAR.*/
+			{
+				/*MiniportMMRequestUnlock(pAd, 0, pOutBuffer, FrameLen);*/
+				MiniportMMRequest(pAd, (MGMT_USE_QUEUE_FLAG | MapUserPriorityToAccessCategory[TID]), pOutBuffer, FrameLen);				
+
+			}
+			MlmeFreeMemory(pAd, pOutBuffer);
+		}
+	}
+}
+#endif /* DOT11_N_SUPPORT */
+
+VOID ActHeaderInit(
+    IN	PRTMP_ADAPTER	pAd, 
+    IN OUT PHEADER_802_11 pHdr80211, 
+    IN PUCHAR Addr1, 
+    IN PUCHAR Addr2,
+    IN PUCHAR Addr3) 
+{
+    NdisZeroMemory(pHdr80211, sizeof(HEADER_802_11));
+    pHdr80211->FC.Type = BTYPE_MGMT;
+    pHdr80211->FC.SubType = SUBTYPE_ACTION;
+
+    COPY_MAC_ADDR(pHdr80211->Addr1, Addr1);
+	COPY_MAC_ADDR(pHdr80211->Addr2, Addr2);
+    COPY_MAC_ADDR(pHdr80211->Addr3, Addr3);
+}
+
+VOID BarHeaderInit(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN OUT PFRAME_BAR pCntlBar, 
+	IN PUCHAR pDA,
+	IN PUCHAR pSA) 
+{
+/*	USHORT	Duration;*/
+
+	NdisZeroMemory(pCntlBar, sizeof(FRAME_BAR));
+	pCntlBar->FC.Type = BTYPE_CNTL;
+	pCntlBar->FC.SubType = SUBTYPE_BLOCK_ACK_REQ;
+   	pCntlBar->BarControl.MTID = 0;
+	pCntlBar->BarControl.Compressed = 1;
+	pCntlBar->BarControl.ACKPolicy = 0;
+
+
+	pCntlBar->Duration = 16 + RTMPCalcDuration(pAd, RATE_1, sizeof(FRAME_BA));
+
+	COPY_MAC_ADDR(pCntlBar->Addr1, pDA);
+	COPY_MAC_ADDR(pCntlBar->Addr2, pSA);
+}
+
+
+/*
+	==========================================================================
+	Description:
+		Insert Category and action code into the action frame.
+		
+	Parametrs:
+		1. frame buffer pointer.
+		2. frame length.
+		3. category code of the frame.
+		4. action code of the frame.
+	
+	Return	: None.
+	==========================================================================
+ */
+VOID InsertActField(
+	IN PRTMP_ADAPTER pAd,
+	OUT PUCHAR pFrameBuf,
+	OUT PULONG pFrameLen,
+	IN UINT8 Category,
+	IN UINT8 ActCode)
+{
+	ULONG TempLen;
+
+	MakeOutgoingFrame(	pFrameBuf,		&TempLen,
+						1,				&Category,
+						1,				&ActCode,
+						END_OF_ARGS);
+
+	*pFrameLen = *pFrameLen + TempLen;
+
+	return;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/ba_action.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/ba_action.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/ba_action.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/ba_action.c	2017-09-23 03:42:49.702676030 +0800
@@ -0,0 +1,1878 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifdef DOT11_N_SUPPORT
+
+#include "rt_config.h"
+
+
+
+#define BA_ORI_INIT_SEQ		(pEntry->TxSeq[TID]) /*1			 inital sequence number of BA session*/
+
+#define ORI_SESSION_MAX_RETRY	8
+#define ORI_BA_SESSION_TIMEOUT	(2000)	/* ms*/
+#define REC_BA_SESSION_IDLE_TIMEOUT	(1000)	/* ms*/
+
+#define REORDERING_PACKET_TIMEOUT		((100 * OS_HZ)/1000)	/* system ticks -- 100 ms*/
+#define MAX_REORDERING_PACKET_TIMEOUT	((3000 * OS_HZ)/1000)	/* system ticks -- 100 ms*/
+
+#define RESET_RCV_SEQ		(0xFFFF)
+
+static void ba_mpdu_blk_free(PRTMP_ADAPTER pAd, struct reordering_mpdu *mpdu_blk);
+
+
+BA_ORI_ENTRY *BATableAllocOriEntry(
+								  IN  PRTMP_ADAPTER   pAd,
+								  OUT USHORT          *Idx);
+
+BA_REC_ENTRY *BATableAllocRecEntry(
+								  IN  PRTMP_ADAPTER   pAd,
+								  OUT USHORT          *Idx);
+
+VOID BAOriSessionSetupTimeout(
+    IN PVOID SystemSpecific1, 
+    IN PVOID FunctionContext, 
+    IN PVOID SystemSpecific2, 
+    IN PVOID SystemSpecific3);
+
+VOID BARecSessionIdleTimeout(
+    IN PVOID SystemSpecific1, 
+    IN PVOID FunctionContext, 
+    IN PVOID SystemSpecific2, 
+    IN PVOID SystemSpecific3);
+
+
+BUILD_TIMER_FUNCTION(BAOriSessionSetupTimeout);
+BUILD_TIMER_FUNCTION(BARecSessionIdleTimeout);
+
+#define ANNOUNCE_REORDERING_PACKET(_pAd, _mpdu_blk)	\
+			Announce_Reordering_Packet(_pAd, _mpdu_blk);
+
+VOID BA_MaxWinSizeReasign(
+	IN PRTMP_ADAPTER	pAd,
+	IN MAC_TABLE_ENTRY  *pEntryPeer,
+	OUT UCHAR			*pWinSize)
+{
+	UCHAR MaxSize;
+	UCHAR MaxPeerRxSize;
+
+
+	MaxPeerRxSize = (((1 << (pEntryPeer->MaxRAmpduFactor + 3)) * 10) / 16) -1;
+	if (pAd->MACVersion >= RALINK_2883_VERSION)
+	{
+		if (pAd->MACVersion >= RALINK_3070_VERSION)
+		{
+			if (pEntryPeer->WepStatus != Ndis802_11EncryptionDisabled)
+				MaxSize = 7; /* for non-open mode*/
+			else
+				MaxSize = 13;
+		}
+		else
+			MaxSize = 31;
+	}
+	else if (pAd->MACVersion >= RALINK_2880E_VERSION) /* 2880 e*/
+	{
+		if (pEntryPeer->WepStatus != Ndis802_11EncryptionDisabled)
+			MaxSize = 7; /* for non-open mode*/
+		else
+			MaxSize = 13;
+	}
+	else
+		MaxSize = 7;
+
+
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("ba>WinSize=%d, MaxSize=%d, MaxPeerRxSize=%d\n", 
+			*pWinSize, MaxSize, MaxPeerRxSize));
+
+	MaxSize = min(MaxPeerRxSize, MaxSize);
+	if ((*pWinSize) > MaxSize)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("ba> reassign max win size from %d to %d\n", 
+				*pWinSize, MaxSize));
+
+		*pWinSize = MaxSize;
+	}
+}
+
+void Announce_Reordering_Packet(IN PRTMP_ADAPTER			pAd,
+								IN struct reordering_mpdu	*mpdu)
+{
+	PNDIS_PACKET    pPacket;
+
+	pPacket = mpdu->pPacket;
+
+	if (mpdu->bAMSDU)
+	{
+		/*ASSERT(0);*/
+		BA_Reorder_AMSDU_Annnounce(pAd, pPacket, mpdu->OpMode);
+	}
+	else
+	{
+		
+		/* pass this 802.3 packet to upper layer or forward this packet to WM directly*/
+		/* */
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+			ANNOUNCE_OR_FORWARD_802_3_PACKET(pAd, pPacket, RTMP_GET_PACKET_IF(pPacket));
+#endif /* CONFIG_STA_SUPPORT */
+	}
+}
+
+/*
+ * Insert a reordering mpdu into sorted linked list by sequence no.
+ */
+BOOLEAN ba_reordering_mpdu_insertsorted(struct reordering_list *list, struct reordering_mpdu *mpdu)
+{
+
+	struct reordering_mpdu **ppScan = &list->next;
+
+	while (*ppScan != NULL)
+	{
+		if (SEQ_SMALLER((*ppScan)->Sequence, mpdu->Sequence, MAXSEQ))
+		{
+			ppScan = &(*ppScan)->next;          
+		}
+		else if ((*ppScan)->Sequence == mpdu->Sequence)
+		{
+			/* give up this duplicated frame */
+			return(FALSE);         
+		}
+		else
+		{
+			/* find position */
+			break;
+		}
+	}
+
+	mpdu->next = *ppScan;
+	*ppScan = mpdu;
+	list->qlen++;
+	return TRUE;
+}
+
+
+/*
+ * caller lock critical section if necessary
+ */
+static inline void ba_enqueue(struct reordering_list *list, struct reordering_mpdu *mpdu_blk)
+{
+	list->qlen++;
+	mpdu_blk->next = list->next;
+	list->next = mpdu_blk;
+}
+
+/*
+ * caller lock critical section if necessary
+ */
+static inline struct reordering_mpdu * ba_dequeue(struct reordering_list *list)
+{
+	struct reordering_mpdu *mpdu_blk = NULL;
+
+	ASSERT(list);
+
+		if (list->qlen)
+		{
+			list->qlen--;
+			mpdu_blk = list->next;
+			if (mpdu_blk)
+			{
+				list->next = mpdu_blk->next;
+				mpdu_blk->next = NULL;
+			}
+		}
+	return mpdu_blk;
+}
+
+
+static inline struct reordering_mpdu  *ba_reordering_mpdu_dequeue(struct reordering_list *list)
+{
+	return(ba_dequeue(list));
+}
+
+
+static inline struct reordering_mpdu  *ba_reordering_mpdu_probe(struct reordering_list *list)
+	{
+	ASSERT(list);
+
+		return(list->next);
+	}
+
+
+/* 
+ * free all resource for reordering mechanism 
+ */
+void ba_reordering_resource_release(PRTMP_ADAPTER pAd) 
+{
+	BA_TABLE        *Tab;
+	PBA_REC_ENTRY   pBAEntry;
+	struct reordering_mpdu *mpdu_blk;
+	int i;
+
+	Tab = &pAd->BATable;
+
+	/* I.  release all pending reordering packet */
+	NdisAcquireSpinLock(&pAd->BATabLock);
+	for (i = 0; i < MAX_LEN_OF_BA_REC_TABLE; i++)
+	{
+		pBAEntry = &Tab->BARecEntry[i];
+		if (pBAEntry->REC_BA_Status != Recipient_NONE)
+		{
+			while ((mpdu_blk = ba_reordering_mpdu_dequeue(&pBAEntry->list)))
+			{
+				ASSERT(mpdu_blk->pPacket);
+				RELEASE_NDIS_PACKET(pAd, mpdu_blk->pPacket, NDIS_STATUS_FAILURE);
+				ba_mpdu_blk_free(pAd, mpdu_blk);
+			}           
+		}
+	}
+	NdisReleaseSpinLock(&pAd->BATabLock);
+
+	ASSERT(pBAEntry->list.qlen == 0);
+	/* II. free memory of reordering mpdu table */
+	NdisAcquireSpinLock(&pAd->mpdu_blk_pool.lock);
+	os_free_mem(pAd, pAd->mpdu_blk_pool.mem);
+	NdisReleaseSpinLock(&pAd->mpdu_blk_pool.lock);
+}
+
+
+
+/* 
+ * Allocate all resource for reordering mechanism 
+ */
+BOOLEAN ba_reordering_resource_init(PRTMP_ADAPTER pAd, int num)
+{
+	int     i;
+	PUCHAR  mem;
+	struct reordering_mpdu *mpdu_blk;
+	struct reordering_list *freelist;
+
+	/* allocate spinlock */
+	NdisAllocateSpinLock(pAd, &pAd->mpdu_blk_pool.lock);
+
+	/* initialize freelist */
+	freelist = &pAd->mpdu_blk_pool.freelist;
+	freelist->next = NULL;
+	freelist->qlen = 0;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Allocate %d memory for BA reordering\n", (UINT32)(num*sizeof(struct reordering_mpdu))));
+
+	/* allocate number of mpdu_blk memory */
+	os_alloc_mem(pAd, (PUCHAR *)&mem, (num*sizeof(struct reordering_mpdu)));
+
+	pAd->mpdu_blk_pool.mem = mem;
+
+	if (mem == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("Can't Allocate Memory for BA Reordering\n"));
+		return(FALSE);
+	}
+
+	/* build mpdu_blk free list */
+	for (i=0; i<num; i++)
+	{
+		/* get mpdu_blk */
+		mpdu_blk = (struct reordering_mpdu *) mem;
+		/* initial mpdu_blk */
+		NdisZeroMemory(mpdu_blk, sizeof(struct reordering_mpdu));
+		/* next mpdu_blk */
+		mem += sizeof(struct reordering_mpdu);
+		/* insert mpdu_blk into freelist */
+		ba_enqueue(freelist, mpdu_blk);
+	}
+
+	return(TRUE);
+}
+
+/*static int blk_count=0;  sample take off, no use*/
+
+static struct reordering_mpdu *ba_mpdu_blk_alloc(PRTMP_ADAPTER pAd)
+{
+	struct reordering_mpdu *mpdu_blk;
+
+	NdisAcquireSpinLock(&pAd->mpdu_blk_pool.lock);
+	mpdu_blk = ba_dequeue(&pAd->mpdu_blk_pool.freelist);
+	if (mpdu_blk)
+	{
+/*		blk_count++;*/
+		/* reset mpdu_blk */
+		NdisZeroMemory(mpdu_blk, sizeof(struct reordering_mpdu));
+	}
+	NdisReleaseSpinLock(&pAd->mpdu_blk_pool.lock);
+	return mpdu_blk;
+}
+
+static void ba_mpdu_blk_free(PRTMP_ADAPTER pAd, struct reordering_mpdu *mpdu_blk)
+{
+	ASSERT(mpdu_blk);
+
+	NdisAcquireSpinLock(&pAd->mpdu_blk_pool.lock);
+/*	blk_count--;*/
+	ba_enqueue(&pAd->mpdu_blk_pool.freelist, mpdu_blk);
+	NdisReleaseSpinLock(&pAd->mpdu_blk_pool.lock);
+}
+
+
+static USHORT ba_indicate_reordering_mpdus_in_order(
+												   IN PRTMP_ADAPTER    pAd, 
+												   IN PBA_REC_ENTRY    pBAEntry,
+												   IN USHORT           StartSeq)
+{
+	struct reordering_mpdu *mpdu_blk;
+	USHORT  LastIndSeq = RESET_RCV_SEQ;
+
+	NdisAcquireSpinLock(&pBAEntry->RxReRingLock);
+
+	while ((mpdu_blk = ba_reordering_mpdu_probe(&pBAEntry->list)))
+		{
+			/* find in-order frame */
+		if (!SEQ_STEPONE(mpdu_blk->Sequence, StartSeq, MAXSEQ))
+			{
+				break;
+			}
+			/* dequeue in-order frame from reodering list */
+			mpdu_blk = ba_reordering_mpdu_dequeue(&pBAEntry->list);
+			/* pass this frame up */
+		ANNOUNCE_REORDERING_PACKET(pAd, mpdu_blk);
+		/* move to next sequence */
+			StartSeq = mpdu_blk->Sequence;
+		LastIndSeq = StartSeq;
+		/* free mpdu_blk */
+			ba_mpdu_blk_free(pAd, mpdu_blk);
+	}
+
+	NdisReleaseSpinLock(&pBAEntry->RxReRingLock);
+
+	/* update last indicated sequence */
+	return LastIndSeq;
+}
+
+static void ba_indicate_reordering_mpdus_le_seq(
+											   IN PRTMP_ADAPTER    pAd, 
+											   IN PBA_REC_ENTRY    pBAEntry,
+											   IN USHORT           Sequence)
+{
+	struct reordering_mpdu *mpdu_blk;
+
+	NdisAcquireSpinLock(&pBAEntry->RxReRingLock);
+	while ((mpdu_blk = ba_reordering_mpdu_probe(&pBAEntry->list)))
+		{
+			/* find in-order frame */
+		if ((mpdu_blk->Sequence == Sequence) || SEQ_SMALLER(mpdu_blk->Sequence, Sequence, MAXSEQ))
+		{
+			/* dequeue in-order frame from reodering list */
+			mpdu_blk = ba_reordering_mpdu_dequeue(&pBAEntry->list);
+			/* pass this frame up */
+			ANNOUNCE_REORDERING_PACKET(pAd, mpdu_blk);
+			/* free mpdu_blk */
+			ba_mpdu_blk_free(pAd, mpdu_blk);            
+		}
+		else
+			{
+				break;
+			}
+	}
+	NdisReleaseSpinLock(&pBAEntry->RxReRingLock);   
+}
+
+
+static void ba_refresh_reordering_mpdus(
+									   IN PRTMP_ADAPTER    pAd, 
+									   PBA_REC_ENTRY       pBAEntry)
+{
+	struct reordering_mpdu *mpdu_blk;
+
+	NdisAcquireSpinLock(&pBAEntry->RxReRingLock);
+
+			/* dequeue in-order frame from reodering list */
+	while ((mpdu_blk = ba_reordering_mpdu_dequeue(&pBAEntry->list)))
+	{
+			/* pass this frame up */
+		ANNOUNCE_REORDERING_PACKET(pAd, mpdu_blk);
+
+		pBAEntry->LastIndSeq = mpdu_blk->Sequence;
+			ba_mpdu_blk_free(pAd, mpdu_blk);
+			
+		/* update last indicated sequence */                    
+	}
+	ASSERT(pBAEntry->list.qlen == 0);
+	pBAEntry->LastIndSeq = RESET_RCV_SEQ;
+	NdisReleaseSpinLock(&pBAEntry->RxReRingLock);   
+}
+
+
+/*static */
+void ba_flush_reordering_timeout_mpdus(
+									IN PRTMP_ADAPTER    pAd, 
+									IN PBA_REC_ENTRY    pBAEntry,
+									IN ULONG            Now32)
+
+{
+	USHORT Sequence;
+
+    if ((pBAEntry == NULL) || (pBAEntry->list.qlen <= 0))
+        return;
+
+/*	if ((RTMP_TIME_AFTER((unsigned long)Now32, (unsigned long)(pBAEntry->LastIndSeqAtTimer+REORDERING_PACKET_TIMEOUT)) &&*/
+/*		 (pBAEntry->list.qlen > ((pBAEntry->BAWinSize*7)/8))) ||*/
+/*		(RTMP_TIME_AFTER((unsigned long)Now32, (unsigned long)(pBAEntry->LastIndSeqAtTimer+(10*REORDERING_PACKET_TIMEOUT))) &&*/
+/*		 (pBAEntry->list.qlen > (pBAEntry->BAWinSize/8)))*/
+	if (RTMP_TIME_AFTER((unsigned long)Now32, (unsigned long)(pBAEntry->LastIndSeqAtTimer+(MAX_REORDERING_PACKET_TIMEOUT/6))) 
+		 &&(pBAEntry->list.qlen > 1)
+		)
+	{
+		DBGPRINT(RT_DEBUG_TRACE,("timeout[%d] (%08lx-%08lx = %d > %d): %x, flush all!\n ", pBAEntry->list.qlen, Now32, (pBAEntry->LastIndSeqAtTimer), 
+			   (int)((long) Now32 - (long)(pBAEntry->LastIndSeqAtTimer)), MAX_REORDERING_PACKET_TIMEOUT,
+			   pBAEntry->LastIndSeq));
+		ba_refresh_reordering_mpdus(pAd, pBAEntry);
+		pBAEntry->LastIndSeqAtTimer = Now32;
+	}
+	else
+	if (RTMP_TIME_AFTER((unsigned long)Now32, (unsigned long)(pBAEntry->LastIndSeqAtTimer+(REORDERING_PACKET_TIMEOUT)))
+		&& (pBAEntry->list.qlen > 0)
+	   )
+		{
+/*		DBGPRINT(RT_DEBUG_OFF, ("timeout[%d] (%lx-%lx = %d > %d): %x, ", pBAEntry->list.qlen, Now32, (pBAEntry->LastIndSeqAtTimer), */
+/*			   (int)((long) Now32 - (long)(pBAEntry->LastIndSeqAtTimer)), REORDERING_PACKET_TIMEOUT,*/
+/*			   pBAEntry->LastIndSeq));*/
+    		
+		/* force LastIndSeq to shift to LastIndSeq+1*/
+    		/* */
+    		Sequence = (pBAEntry->LastIndSeq+1) & MAXSEQ;
+    		ba_indicate_reordering_mpdus_le_seq(pAd, pBAEntry, Sequence);
+    		pBAEntry->LastIndSeqAtTimer = Now32;
+			pBAEntry->LastIndSeq = Sequence;
+    		
+    		/* indicate in-order mpdus*/
+    		/* */
+    		Sequence = ba_indicate_reordering_mpdus_in_order(pAd, pBAEntry, Sequence);
+    		if (Sequence != RESET_RCV_SEQ)
+    		{
+    			pBAEntry->LastIndSeq = Sequence;
+    		}
+
+		DBGPRINT(RT_DEBUG_ERROR, ("%x, flush one!\n", pBAEntry->LastIndSeq));
+
+	}
+}
+
+
+/* 
+ * generate ADDBA request to 
+ * set up BA agreement
+ */
+VOID BAOriSessionSetUp(
+					  IN PRTMP_ADAPTER    pAd, 
+					  IN MAC_TABLE_ENTRY  *pEntry,
+					  IN UCHAR            TID,
+					  IN USHORT           TimeOut,
+					  IN ULONG            DelayTime,
+					  IN BOOLEAN          isForced)
+
+{
+	/*MLME_ADDBA_REQ_STRUCT	AddbaReq;*/
+	BA_ORI_ENTRY            *pBAEntry = NULL;
+	USHORT                  Idx;
+	BOOLEAN                 Cancelled;
+
+	ASSERT(TID < NUM_OF_TID);
+	if (TID >= NUM_OF_TID)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("Wrong TID %d!\n", TID));
+		return;
+	}
+    
+	if ((pAd->CommonCfg.BACapability.field.AutoBA != TRUE)  &&  (isForced == FALSE))
+		return;
+
+	/* if this entry is limited to use legacy tx mode, it doesn't generate BA.  */
+	if (RTMPStaFixedTxMode(pAd, pEntry) != FIXED_TXMODE_HT)
+		return;
+
+	if ((pEntry->BADeclineBitmap & (1<<TID)) && (isForced == FALSE))
+	{
+		/* try again after 3 secs*/
+		DelayTime = 3000; 
+/*		DBGPRINT(RT_DEBUG_TRACE, ("DeCline BA from Peer\n"));*/
+/*		return;*/
+	}
+
+	
+	Idx = pEntry->BAOriWcidArray[TID];  
+	if (Idx == 0)
+	{
+		/* allocate a BA session*/
+		pBAEntry = BATableAllocOriEntry(pAd, &Idx);     
+		if (pBAEntry == NULL)
+		{
+			DBGPRINT(RT_DEBUG_TRACE,("ADDBA - MlmeADDBAAction() allocate BA session failed \n"));
+			return;
+		}
+	}
+	else
+	{
+		pBAEntry =&pAd->BATable.BAOriEntry[Idx];
+	}
+
+	if (pBAEntry->ORI_BA_Status >= Originator_WaitRes)
+	{
+		return;
+	}
+
+	pEntry->BAOriWcidArray[TID] = Idx;
+
+	/* Initialize BA session */
+	pBAEntry->ORI_BA_Status = Originator_WaitRes;       
+	pBAEntry->Wcid = pEntry->Aid;
+	pBAEntry->BAWinSize = pAd->CommonCfg.BACapability.field.RxBAWinLimit;   
+	pBAEntry->Sequence = BA_ORI_INIT_SEQ;
+	pBAEntry->Token = 1;	/* (2008-01-21) Jan Lee recommends it - this token can't be 0*/
+	pBAEntry->TID = TID;
+	pBAEntry->TimeOutValue = TimeOut;   
+	pBAEntry->pAdapter = pAd;
+	
+	if (!(pEntry->TXBAbitmap & (1<<TID)))
+	{
+		RTMPInitTimer(pAd, &pBAEntry->ORIBATimer, GET_TIMER_FUNCTION(BAOriSessionSetupTimeout), pBAEntry, FALSE);
+	}
+	else
+		RTMPCancelTimer(&pBAEntry->ORIBATimer, &Cancelled);
+
+	/* set timer to send ADDBA request */
+	RTMPSetTimer(&pBAEntry->ORIBATimer, DelayTime);
+}
+
+VOID BAOriSessionAdd(
+			IN PRTMP_ADAPTER    pAd, 
+					IN MAC_TABLE_ENTRY  *pEntry,
+			IN PFRAME_ADDBA_RSP pFrame)
+{
+	BA_ORI_ENTRY  *pBAEntry = NULL;
+	BOOLEAN       Cancelled;
+	UCHAR         TID;
+	USHORT        Idx;
+	PUCHAR          pOutBuffer2 = NULL;
+	NDIS_STATUS     NStatus;
+	ULONG           FrameLen;
+	FRAME_BAR       FrameBar;
+	UCHAR			MaxPeerBufSize;
+
+	TID = pFrame->BaParm.TID;
+	Idx = pEntry->BAOriWcidArray[TID];  
+	pBAEntry =&pAd->BATable.BAOriEntry[Idx];
+
+	MaxPeerBufSize = 0;
+
+	/* Start fill in parameters.*/
+	if ((Idx !=0) && (pBAEntry->TID == TID) && (pBAEntry->ORI_BA_Status == Originator_WaitRes))
+	{
+		MaxPeerBufSize = (UCHAR)pFrame->BaParm.BufSize;
+
+		if (MaxPeerBufSize > 0)
+			MaxPeerBufSize -= 1;
+		else
+			MaxPeerBufSize = 0;
+		pBAEntry->BAWinSize = min(pBAEntry->BAWinSize, MaxPeerBufSize);
+		BA_MaxWinSizeReasign(pAd, pEntry, &pBAEntry->BAWinSize);
+
+		pBAEntry->TimeOutValue = pFrame->TimeOutValue;
+		pBAEntry->ORI_BA_Status = Originator_Done;
+		pAd->BATable.numDoneOriginator ++;
+		
+		/* reset sequence number */
+		pBAEntry->Sequence = BA_ORI_INIT_SEQ;
+		/* Set Bitmap flag.*/
+		pEntry->TXBAbitmap |= (1<<TID);
+				RTMPCancelTimer(&pBAEntry->ORIBATimer, &Cancelled);
+
+		pBAEntry->ORIBATimer.TimerValue = 0;	/*pFrame->TimeOutValue;*/
+
+		DBGPRINT(RT_DEBUG_TRACE,("%s : TXBAbitmap = %x, BAWinSize = %d, TimeOut = %ld\n", __FUNCTION__, pEntry->TXBAbitmap, 
+								 pBAEntry->BAWinSize, pBAEntry->ORIBATimer.TimerValue));
+
+		/* SEND BAR ;*/
+		NStatus = MlmeAllocateMemory(pAd, &pOutBuffer2);  /*Get an unused nonpaged memory*/
+		if (NStatus != NDIS_STATUS_SUCCESS)
+		{
+			DBGPRINT(RT_DEBUG_TRACE,("BA - BAOriSessionAdd() allocate memory failed \n"));
+			return;
+		}
+
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+			BarHeaderInit(pAd, &FrameBar, pAd->MacTab.Content[pBAEntry->Wcid].Addr, pAd->CurrentAddress);
+#endif /* CONFIG_STA_SUPPORT */
+
+		FrameBar.StartingSeq.field.FragNum = 0;	/* make sure sequence not clear in DEL function.*/
+		FrameBar.StartingSeq.field.StartSeq = pBAEntry->Sequence; /* make sure sequence not clear in DEL funciton.*/
+		FrameBar.BarControl.TID = pBAEntry->TID; /* make sure sequence not clear in DEL funciton.*/
+		MakeOutgoingFrame(pOutBuffer2,              &FrameLen,
+						  sizeof(FRAME_BAR),      &FrameBar,
+					  END_OF_ARGS);
+		MiniportMMRequest(pAd, QID_AC_BE, pOutBuffer2, FrameLen);
+		MlmeFreeMemory(pAd, pOutBuffer2);
+
+
+		if (pBAEntry->ORIBATimer.TimerValue)
+			RTMPSetTimer(&pBAEntry->ORIBATimer, pBAEntry->ORIBATimer.TimerValue); /* in mSec */
+	}
+}
+
+BOOLEAN BARecSessionAdd(
+					   IN PRTMP_ADAPTER    pAd, 
+					   IN MAC_TABLE_ENTRY  *pEntry,
+					   IN PFRAME_ADDBA_REQ pFrame)
+{
+	BA_REC_ENTRY            *pBAEntry = NULL;
+	BOOLEAN                 Status = TRUE;
+	BOOLEAN                 Cancelled;
+	USHORT                  Idx;
+	UCHAR                   TID;
+	UCHAR                   BAWinSize;
+	/*UINT32                  Value;*/
+	/*UINT                    offset;*/
+
+
+	ASSERT(pEntry);
+
+	/* find TID*/
+	TID = pFrame->BaParm.TID;
+
+	BAWinSize = min(((UCHAR)pFrame->BaParm.BufSize), (UCHAR)pAd->CommonCfg.BACapability.field.RxBAWinLimit);
+
+	/* Intel patch*/
+	if (BAWinSize == 0)
+	{
+		BAWinSize = 64;
+	}
+
+	/* get software BA rec array index, Idx*/
+	Idx = pEntry->BARecWcidArray[TID];
+
+
+	if (Idx == 0)
+	{
+		/* allocate new array entry for the new session*/
+		pBAEntry = BATableAllocRecEntry(pAd, &Idx);     
+	}
+	else
+	{
+		pBAEntry = &pAd->BATable.BARecEntry[Idx];
+		/* flush all pending reordering mpdus*/
+		ba_refresh_reordering_mpdus(pAd, pBAEntry);
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE,("%s(%ld): Idx = %d, BAWinSize(req %d) = %d\n", __FUNCTION__, pAd->BATable.numAsRecipient, Idx, 
+							 pFrame->BaParm.BufSize, BAWinSize));
+
+	/* Start fill in parameters.*/
+	if (pBAEntry != NULL)
+	{
+		ASSERT(pBAEntry->list.qlen == 0);
+
+		pBAEntry->REC_BA_Status = Recipient_HandleRes;
+		pBAEntry->BAWinSize = BAWinSize;
+		pBAEntry->Wcid = pEntry->Aid;
+		pBAEntry->TID = TID;
+		pBAEntry->TimeOutValue = pFrame->TimeOutValue;
+		pBAEntry->REC_BA_Status = Recipient_Accept;
+		/* initial sequence number */
+		pBAEntry->LastIndSeq = RESET_RCV_SEQ; /*pFrame->BaStartSeq.field.StartSeq;*/
+
+		DBGPRINT(RT_DEBUG_OFF, ("Start Seq = %08x\n",  pFrame->BaStartSeq.field.StartSeq));
+
+		if (pEntry->RXBAbitmap & (1<<TID))
+		{
+			RTMPCancelTimer(&pBAEntry->RECBATimer, &Cancelled);
+		}
+		else
+		{
+			RTMPInitTimer(pAd, &pBAEntry->RECBATimer, GET_TIMER_FUNCTION(BARecSessionIdleTimeout), pBAEntry, TRUE);
+		}
+
+
+		/* Set Bitmap flag.*/
+		pEntry->RXBAbitmap |= (1<<TID);
+		pEntry->BARecWcidArray[TID] = Idx;
+
+		pEntry->BADeclineBitmap &= ~(1<<TID);
+
+		/* Set BA session mask in WCID table.*/
+		RTMP_ADD_BA_SESSION_TO_ASIC(pAd, pEntry->Aid, TID);
+
+		DBGPRINT(RT_DEBUG_TRACE,("MACEntry[%d]RXBAbitmap = 0x%x. BARecWcidArray=%d\n", 
+				pEntry->Aid, pEntry->RXBAbitmap, pEntry->BARecWcidArray[TID]));
+	}
+	else
+	{
+		Status = FALSE;
+		DBGPRINT(RT_DEBUG_TRACE,("Can't Accept ADDBA for %02x:%02x:%02x:%02x:%02x:%02x TID = %d\n", 
+				PRINT_MAC(pEntry->Addr), TID));
+	}
+	return(Status);
+}
+
+
+BA_REC_ENTRY *BATableAllocRecEntry(
+								  IN  PRTMP_ADAPTER   pAd,
+								  OUT USHORT          *Idx)
+{
+	int             i;
+	BA_REC_ENTRY    *pBAEntry = NULL;
+
+
+	NdisAcquireSpinLock(&pAd->BATabLock);
+
+	if (pAd->BATable.numAsRecipient >= (MAX_LEN_OF_BA_REC_TABLE - 1))
+	{
+		DBGPRINT(RT_DEBUG_OFF, ("BA Recipeint Session (%ld) > %d\n", 
+							pAd->BATable.numAsRecipient, (MAX_LEN_OF_BA_REC_TABLE - 1)));
+		goto done;
+	}
+
+	/* reserve idx 0 to identify BAWcidArray[TID] as empty*/
+	for (i=1; i < MAX_LEN_OF_BA_REC_TABLE; i++)
+	{
+		pBAEntry =&pAd->BATable.BARecEntry[i];
+		if ((pBAEntry->REC_BA_Status == Recipient_NONE))
+		{
+			/* get one */
+			pAd->BATable.numAsRecipient++;
+			pBAEntry->REC_BA_Status = Recipient_USED;
+			*Idx = i;
+			break;
+		}
+	}
+
+done:
+	NdisReleaseSpinLock(&pAd->BATabLock);
+	return pBAEntry;
+}
+
+BA_ORI_ENTRY *BATableAllocOriEntry(
+								  IN  PRTMP_ADAPTER   pAd,
+								  OUT USHORT          *Idx)
+{
+	int             i;
+	BA_ORI_ENTRY    *pBAEntry = NULL;
+
+	NdisAcquireSpinLock(&pAd->BATabLock);
+
+	if (pAd->BATable.numAsOriginator >= (MAX_LEN_OF_BA_ORI_TABLE - 1))
+	{
+		goto done;
+	}
+		
+	/* reserve idx 0 to identify BAWcidArray[TID] as empty*/
+	for (i=1; i<MAX_LEN_OF_BA_ORI_TABLE; i++)
+	{
+		pBAEntry =&pAd->BATable.BAOriEntry[i];
+		if ((pBAEntry->ORI_BA_Status == Originator_NONE))
+		{
+			/* get one */
+			pAd->BATable.numAsOriginator++;
+			pBAEntry->ORI_BA_Status = Originator_USED;
+			pBAEntry->pAdapter = pAd;
+			*Idx = i;
+			break;
+		}
+	}
+
+done:
+	NdisReleaseSpinLock(&pAd->BATabLock);
+	return pBAEntry;
+}
+
+
+VOID BATableFreeOriEntry(
+						IN  PRTMP_ADAPTER   pAd,
+						IN  ULONG           Idx)
+{
+	BA_ORI_ENTRY    *pBAEntry = NULL;
+	MAC_TABLE_ENTRY *pEntry;
+
+
+	if ((Idx == 0) || (Idx >= MAX_LEN_OF_BA_ORI_TABLE))
+		return;
+
+	pBAEntry =&pAd->BATable.BAOriEntry[Idx];
+
+	if (pBAEntry->ORI_BA_Status != Originator_NONE)
+	{
+		pEntry = &pAd->MacTab.Content[pBAEntry->Wcid];
+		pEntry->BAOriWcidArray[pBAEntry->TID] = 0;
+		DBGPRINT(RT_DEBUG_TRACE, ("%s: Wcid = %d, TID = %d\n", __FUNCTION__, pBAEntry->Wcid, pBAEntry->TID));
+
+
+		NdisAcquireSpinLock(&pAd->BATabLock);
+		if (pBAEntry->ORI_BA_Status == Originator_Done)
+		{
+			pAd->BATable.numDoneOriginator -= 1;
+		 	pEntry->TXBAbitmap &= (~(1<<(pBAEntry->TID) ));
+			DBGPRINT(RT_DEBUG_TRACE, ("BATableFreeOriEntry numAsOriginator= %ld\n", pAd->BATable.numAsRecipient));
+			/* Erase Bitmap flag.*/
+		}
+	
+		ASSERT(pAd->BATable.numAsOriginator != 0);
+
+		pAd->BATable.numAsOriginator -= 1;
+		
+		pBAEntry->ORI_BA_Status = Originator_NONE;
+		pBAEntry->Token = 0;
+		NdisReleaseSpinLock(&pAd->BATabLock);
+	}
+}
+
+
+VOID BATableFreeRecEntry(
+						IN  PRTMP_ADAPTER   pAd,
+						IN  ULONG           Idx)
+{
+	BA_REC_ENTRY    *pBAEntry = NULL;
+	MAC_TABLE_ENTRY *pEntry;
+
+
+	if ((Idx == 0) || (Idx >= MAX_LEN_OF_BA_REC_TABLE))
+		return;
+
+	pBAEntry =&pAd->BATable.BARecEntry[Idx];
+
+	if (pBAEntry->REC_BA_Status != Recipient_NONE)
+	{
+		pEntry = &pAd->MacTab.Content[pBAEntry->Wcid];
+		pEntry->BARecWcidArray[pBAEntry->TID] = 0;
+
+		NdisAcquireSpinLock(&pAd->BATabLock);
+		
+		ASSERT(pAd->BATable.numAsRecipient != 0);
+
+		pAd->BATable.numAsRecipient -= 1;
+
+		pBAEntry->REC_BA_Status = Recipient_NONE;
+		NdisReleaseSpinLock(&pAd->BATabLock);
+	}
+}
+
+
+VOID BAOriSessionTearDown(
+						 IN OUT  PRTMP_ADAPTER   pAd, 
+						 IN      UCHAR           Wcid,
+						 IN      UCHAR           TID,
+						 IN      BOOLEAN         bPassive,
+						 IN      BOOLEAN         bForceSend)
+{
+	ULONG           Idx = 0;
+	BA_ORI_ENTRY    *pBAEntry;
+	BOOLEAN         Cancelled;
+
+	if (Wcid >= MAX_LEN_OF_MAC_TABLE)
+	{
+		return;
+	}
+
+	
+	/* Locate corresponding BA Originator Entry in BA Table with the (pAddr,TID).*/
+	
+	Idx = pAd->MacTab.Content[Wcid].BAOriWcidArray[TID];
+	if ((Idx == 0) || (Idx >= MAX_LEN_OF_BA_ORI_TABLE))
+	{
+		if (bForceSend == TRUE)
+		{
+			/* force send specified TID DelBA*/
+			MLME_DELBA_REQ_STRUCT   DelbaReq;   
+			MLME_QUEUE_ELEM *Elem; /* = (MLME_QUEUE_ELEM *) kmalloc(sizeof(MLME_QUEUE_ELEM), MEM_ALLOC_FLAG);*/
+			os_alloc_mem(NULL, (UCHAR **)&Elem, sizeof(MLME_QUEUE_ELEM));
+			if (Elem != NULL)
+			{
+				NdisZeroMemory(&DelbaReq, sizeof(DelbaReq));
+				NdisZeroMemory(Elem, sizeof(MLME_QUEUE_ELEM));
+			
+				COPY_MAC_ADDR(DelbaReq.Addr, pAd->MacTab.Content[Wcid].Addr);
+				DelbaReq.Wcid = Wcid;
+				DelbaReq.TID = TID;
+				DelbaReq.Initiator = ORIGINATOR;
+				Elem->MsgLen  = sizeof(DelbaReq);			
+				NdisMoveMemory(Elem->Msg, &DelbaReq, sizeof(DelbaReq));
+				MlmeDELBAAction(pAd, Elem);
+/*				kfree(Elem);*/
+				os_free_mem(NULL, Elem);
+			}
+			else
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("%s(bForceSend):alloc memory failed!\n", __FUNCTION__));
+			}
+		}
+
+		return;
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE,("%s===>Wcid=%d.TID=%d \n", __FUNCTION__, Wcid, TID));
+
+	pBAEntry = &pAd->BATable.BAOriEntry[Idx];
+	DBGPRINT(RT_DEBUG_TRACE,("\t===>Idx = %ld, Wcid=%d.TID=%d, ORI_BA_Status = %d \n", Idx, Wcid, TID, pBAEntry->ORI_BA_Status));
+	
+	/* Prepare DelBA action frame and send to the peer.*/
+	
+	if ((bPassive == FALSE) && (TID == pBAEntry->TID) && (pBAEntry->ORI_BA_Status == Originator_Done))
+	{
+		MLME_DELBA_REQ_STRUCT   DelbaReq;   
+		MLME_QUEUE_ELEM *Elem; /* = (MLME_QUEUE_ELEM *) kmalloc(sizeof(MLME_QUEUE_ELEM), MEM_ALLOC_FLAG);*/
+		os_alloc_mem(NULL, (UCHAR **)&Elem, sizeof(MLME_QUEUE_ELEM));
+		if (Elem != NULL)
+		{
+			NdisZeroMemory(&DelbaReq, sizeof(DelbaReq));
+			NdisZeroMemory(Elem, sizeof(MLME_QUEUE_ELEM));
+		
+			COPY_MAC_ADDR(DelbaReq.Addr, pAd->MacTab.Content[Wcid].Addr);
+			DelbaReq.Wcid = Wcid;
+			DelbaReq.TID = pBAEntry->TID;
+			DelbaReq.Initiator = ORIGINATOR;
+			Elem->MsgLen  = sizeof(DelbaReq);			
+			NdisMoveMemory(Elem->Msg, &DelbaReq, sizeof(DelbaReq));
+			MlmeDELBAAction(pAd, Elem);
+/*			kfree(Elem);*/
+			os_free_mem(NULL, Elem);
+		}
+		else
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("%s():alloc memory failed!\n", __FUNCTION__));
+			return;
+		}
+	}
+	RTMPCancelTimer(&pBAEntry->ORIBATimer, &Cancelled);
+	BATableFreeOriEntry(pAd, Idx);
+
+	if (bPassive)
+	{
+		/*BAOriSessionSetUp(pAd, &pAd->MacTab.Content[Wcid], TID, 0, 10000, TRUE);*/
+	}
+}
+
+VOID BARecSessionTearDown(
+						 IN OUT  PRTMP_ADAPTER   pAd, 
+						 IN      UCHAR           Wcid,
+						 IN      UCHAR           TID,
+						 IN      BOOLEAN         bPassive)
+{
+	ULONG           Idx = 0;
+	BA_REC_ENTRY    *pBAEntry;
+
+	if (Wcid >= MAX_LEN_OF_MAC_TABLE)
+	{
+		return;
+	}
+
+	
+	/*  Locate corresponding BA Originator Entry in BA Table with the (pAddr,TID).*/
+	
+	Idx = pAd->MacTab.Content[Wcid].BARecWcidArray[TID];
+	if (Idx == 0)
+		return;
+
+	DBGPRINT(RT_DEBUG_TRACE,("%s===>Wcid=%d.TID=%d \n", __FUNCTION__, Wcid, TID));
+	
+
+	pBAEntry = &pAd->BATable.BARecEntry[Idx];
+	DBGPRINT(RT_DEBUG_TRACE,("\t===>Idx = %ld, Wcid=%d.TID=%d, REC_BA_Status = %d \n", Idx, Wcid, TID, pBAEntry->REC_BA_Status));
+	
+	/* Prepare DelBA action frame and send to the peer.*/
+	
+	if ((TID == pBAEntry->TID) && (pBAEntry->REC_BA_Status == Recipient_Accept))
+	{
+		MLME_DELBA_REQ_STRUCT   DelbaReq;
+		BOOLEAN 				Cancelled;
+		/*ULONG   offset; */
+		/*UINT32  VALUE;*/
+				
+		RTMPCancelTimer(&pBAEntry->RECBATimer, &Cancelled);         
+
+		
+		/* 1. Send DELBA Action Frame*/
+		
+		if (bPassive == FALSE)
+		{
+			MLME_QUEUE_ELEM *Elem; /* = (MLME_QUEUE_ELEM *) kmalloc(sizeof(MLME_QUEUE_ELEM), MEM_ALLOC_FLAG);*/
+			os_alloc_mem(NULL, (UCHAR **)&Elem, sizeof(MLME_QUEUE_ELEM));
+			if (Elem != NULL)
+			{
+				NdisZeroMemory(&DelbaReq, sizeof(DelbaReq));
+				NdisZeroMemory(Elem, sizeof(MLME_QUEUE_ELEM));
+			
+				COPY_MAC_ADDR(DelbaReq.Addr, pAd->MacTab.Content[Wcid].Addr);
+				DelbaReq.Wcid = Wcid;
+				DelbaReq.TID = TID;
+				DelbaReq.Initiator = RECIPIENT;
+				Elem->MsgLen  = sizeof(DelbaReq);			
+				NdisMoveMemory(Elem->Msg, &DelbaReq, sizeof(DelbaReq));
+				MlmeDELBAAction(pAd, Elem);
+/*				kfree(Elem);*/
+				os_free_mem(NULL, Elem);
+			}
+			else
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("%s():alloc memory failed!\n", __FUNCTION__));
+				return;
+			}
+		}
+
+
+		
+		/* 2. Free resource of BA session*/
+		
+		/* flush all pending reordering mpdus */
+		ba_refresh_reordering_mpdus(pAd, pBAEntry);
+
+		NdisAcquireSpinLock(&pAd->BATabLock);
+
+		/* Erase Bitmap flag.*/
+		pBAEntry->LastIndSeq = RESET_RCV_SEQ;
+		pBAEntry->BAWinSize = 0;
+		/* Erase Bitmap flag at software mactable*/
+		pAd->MacTab.Content[Wcid].RXBAbitmap &= (~(1<<(pBAEntry->TID)));
+		pAd->MacTab.Content[Wcid].BARecWcidArray[TID] = 0;
+
+		RTMP_DEL_BA_SESSION_FROM_ASIC(pAd, Wcid, TID);
+
+		NdisReleaseSpinLock(&pAd->BATabLock);
+
+	}
+
+	BATableFreeRecEntry(pAd, Idx);
+}
+
+VOID BASessionTearDownALL(
+						 IN OUT  PRTMP_ADAPTER pAd, 
+						 IN      UCHAR Wcid)
+{
+	int i;
+
+	for (i=0; i<NUM_OF_TID; i++)
+	{
+		BAOriSessionTearDown(pAd, Wcid, i, FALSE, FALSE);
+		BARecSessionTearDown(pAd, Wcid, i, FALSE);
+	}
+}
+
+
+/*
+	==========================================================================
+	Description:
+		Retry sending ADDBA Reqest.
+		
+	IRQL = DISPATCH_LEVEL
+	
+	Parametrs:
+	p8023Header: if this is already 802.3 format, p8023Header is NULL
+	
+	Return	: TRUE if put into rx reordering buffer, shouldn't indicaterxhere.
+				FALSE , then continue indicaterx at this moment.
+	==========================================================================
+ */
+VOID BAOriSessionSetupTimeout(
+    IN PVOID SystemSpecific1, 
+    IN PVOID FunctionContext, 
+    IN PVOID SystemSpecific2, 
+    IN PVOID SystemSpecific3) 
+{
+	BA_ORI_ENTRY    *pBAEntry = (BA_ORI_ENTRY *)FunctionContext;
+	MAC_TABLE_ENTRY *pEntry;
+	PRTMP_ADAPTER   pAd;
+	
+	if (pBAEntry == NULL)
+		return;
+
+	pAd = pBAEntry->pAdapter;
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		/* Do nothing if monitor mode is on*/
+		if (MONITOR_ON(pAd))
+			return;
+	}
+#endif /* CONFIG_STA_SUPPORT */
+    
+#ifdef RALINK_ATE
+	/* Nothing to do in ATE mode. */
+	if (ATE_ON(pAd))
+		return;
+#endif /* RALINK_ATE */
+
+	pEntry = &pAd->MacTab.Content[pBAEntry->Wcid];
+
+	if ((pBAEntry->ORI_BA_Status == Originator_WaitRes) && (pBAEntry->Token < ORI_SESSION_MAX_RETRY))
+	{
+		MLME_ADDBA_REQ_STRUCT    AddbaReq;  
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			if (INFRA_ON(pAd) && 
+				RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS) &&
+				(OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED)))
+			{
+				/* In scan progress and have no chance to send out, just re-schedule to another time period */
+				RTMPSetTimer(&pBAEntry->ORIBATimer, ORI_BA_SESSION_TIMEOUT);
+				return;
+			}
+		}
+#endif /* CONFIG_STA_SUPPORT */
+
+		NdisZeroMemory(&AddbaReq, sizeof(AddbaReq));
+		COPY_MAC_ADDR(AddbaReq.pAddr, pEntry->Addr);
+		AddbaReq.Wcid = (UCHAR)(pEntry->Aid);
+		AddbaReq.TID = pBAEntry->TID;
+		AddbaReq.BaBufSize = pAd->CommonCfg.BACapability.field.RxBAWinLimit;
+		AddbaReq.TimeOutValue = 0;
+		AddbaReq.Token = pBAEntry->Token;       
+		MlmeEnqueue(pAd, ACTION_STATE_MACHINE, MT2_MLME_ADD_BA_CATE, sizeof(MLME_ADDBA_REQ_STRUCT), (PVOID)&AddbaReq, 0);
+		RTMP_MLME_HANDLER(pAd);
+		DBGPRINT(RT_DEBUG_TRACE,("BA Ori Session Timeout(%d) : Send ADD BA again\n", pBAEntry->Token));
+
+		pBAEntry->Token++;
+		RTMPSetTimer(&pBAEntry->ORIBATimer, ORI_BA_SESSION_TIMEOUT);
+	}
+	else
+	{
+		BATableFreeOriEntry(pAd, pEntry->BAOriWcidArray[pBAEntry->TID]);
+	}
+}
+
+/*
+	==========================================================================
+	Description:
+		Retry sending ADDBA Reqest.
+		
+	IRQL = DISPATCH_LEVEL
+	
+	Parametrs:
+	p8023Header: if this is already 802.3 format, p8023Header is NULL
+	
+	Return	: TRUE if put into rx reordering buffer, shouldn't indicaterxhere.
+				FALSE , then continue indicaterx at this moment.
+	==========================================================================
+ */
+VOID BARecSessionIdleTimeout(
+    IN PVOID SystemSpecific1, 
+    IN PVOID FunctionContext, 
+    IN PVOID SystemSpecific2, 
+    IN PVOID SystemSpecific3) 
+{
+	
+	BA_REC_ENTRY    *pBAEntry = (BA_REC_ENTRY *)FunctionContext;
+	PRTMP_ADAPTER   pAd;
+	ULONG           Now32;
+	
+	if (pBAEntry == NULL)
+		return;
+
+	if ((pBAEntry->REC_BA_Status == Recipient_Accept))
+	{
+		NdisGetSystemUpTime(&Now32);
+
+		if (RTMP_TIME_AFTER((unsigned long)Now32, (unsigned long)(pBAEntry->LastIndSeqAtTimer + REC_BA_SESSION_IDLE_TIMEOUT)))
+		{
+			pAd = pBAEntry->pAdapter;
+			/* flush all pending reordering mpdus */
+			ba_refresh_reordering_mpdus(pAd, pBAEntry); 
+			DBGPRINT(RT_DEBUG_OFF, ("%ld: REC BA session Timeout\n", Now32));
+		}
+	}
+}
+
+
+VOID PeerAddBAReqAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+
+{
+	/*	7.4.4.1*/
+	/*ULONG	Idx;*/
+	UCHAR   Status = 1;
+	UCHAR   pAddr[6];
+	FRAME_ADDBA_RSP ADDframe;
+	PUCHAR         pOutBuffer = NULL;
+	NDIS_STATUS     NStatus;
+	PFRAME_ADDBA_REQ  pAddreqFrame = NULL;
+	/*UCHAR		BufSize;*/
+	ULONG       FrameLen;
+	PULONG      ptemp;
+	PMAC_TABLE_ENTRY	pMacEntry;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("%s ==> (Wcid = %d)\n", __FUNCTION__, Elem->Wcid));
+
+	/*hex_dump("AddBAReq", Elem->Msg, Elem->MsgLen);*/
+
+	/*ADDBA Request from unknown peer, ignore this.*/
+	if (Elem->Wcid >= MAX_LEN_OF_MAC_TABLE)
+		return;
+	
+	pMacEntry = &pAd->MacTab.Content[Elem->Wcid];
+	DBGPRINT(RT_DEBUG_TRACE,("BA - PeerAddBAReqAction----> \n"));
+	ptemp = (PULONG)Elem->Msg;
+	/*DBGPRINT_RAW(RT_DEBUG_EMU, ("%08x:: %08x:: %08x:: %08x:: %08x:: %08x:: %08x:: %08x:: %08x\n", *(ptemp), *(ptemp+1), *(ptemp+2), *(ptemp+3), *(ptemp+4), *(ptemp+5), *(ptemp+6), *(ptemp+7), *(ptemp+8)));*/
+
+	if (PeerAddBAReqActionSanity(pAd, Elem->Msg, Elem->MsgLen, pAddr))
+	{
+
+		if ((pAd->CommonCfg.bBADecline == FALSE) && IS_HT_STA(pMacEntry))
+		{
+			pAddreqFrame = (PFRAME_ADDBA_REQ)(&Elem->Msg[0]);
+			DBGPRINT(RT_DEBUG_OFF, ("Rcv Wcid(%d) AddBAReq\n", Elem->Wcid));
+			if (BARecSessionAdd(pAd, &pAd->MacTab.Content[Elem->Wcid], pAddreqFrame))
+				Status = 0;
+			else
+				Status = 38; /* more parameters have invalid values*/
+		}
+		else
+		{
+			Status = 37; /* the request has been declined.*/
+		}
+	}
+
+	if (IS_ENTRY_CLIENT(&pAd->MacTab.Content[Elem->Wcid]))
+		ASSERT(pAd->MacTab.Content[Elem->Wcid].Sst == SST_ASSOC);
+
+	pAddreqFrame = (PFRAME_ADDBA_REQ)(&Elem->Msg[0]);
+	/* 2. Always send back ADDBA Response */
+	NStatus = MlmeAllocateMemory(pAd, &pOutBuffer);	 /*Get an unused nonpaged memory*/
+	if (NStatus != NDIS_STATUS_SUCCESS)
+	{
+		DBGPRINT(RT_DEBUG_TRACE,("ACTION - PeerBAAction() allocate memory failed \n"));
+		return;
+	}
+
+	NdisZeroMemory(&ADDframe, sizeof(FRAME_ADDBA_RSP));
+	/* 2-1. Prepare ADDBA Response frame.*/
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		if (ADHOC_ON(pAd)
+#ifdef QOS_DLS_SUPPORT
+			|| (IS_ENTRY_DLS(&pAd->MacTab.Content[Elem->Wcid]))
+#endif /* QOS_DLS_SUPPORT */
+			)
+			ActHeaderInit(pAd, &ADDframe.Hdr, pAddr, pAd->CurrentAddress, pAd->CommonCfg.Bssid);
+		else
+			ActHeaderInit(pAd, &ADDframe.Hdr, pAd->CommonCfg.Bssid, pAd->CurrentAddress, pAddr);
+	}
+#endif /* CONFIG_STA_SUPPORT */
+	ADDframe.Category = CATEGORY_BA;
+	ADDframe.Action = ADDBA_RESP;
+	ADDframe.Token = pAddreqFrame->Token;
+	/* What is the Status code??  need to check.*/
+	ADDframe.StatusCode = Status;
+	ADDframe.BaParm.BAPolicy = IMMED_BA;
+	ADDframe.BaParm.AMSDUSupported = 0;
+	ADDframe.BaParm.TID = pAddreqFrame->BaParm.TID;
+	ADDframe.BaParm.BufSize = min(((UCHAR)pAddreqFrame->BaParm.BufSize), (UCHAR)pAd->CommonCfg.BACapability.field.RxBAWinLimit);
+	if (ADDframe.BaParm.BufSize == 0)
+	{
+		ADDframe.BaParm.BufSize = 64; 
+	}
+	ADDframe.TimeOutValue = 0; /*pAddreqFrame->TimeOutValue;*/
+
+	*(USHORT *)(&ADDframe.BaParm) = cpu2le16(*(USHORT *)(&ADDframe.BaParm));
+	ADDframe.StatusCode = cpu2le16(ADDframe.StatusCode);
+	ADDframe.TimeOutValue = cpu2le16(ADDframe.TimeOutValue);
+
+	MakeOutgoingFrame(pOutBuffer,               &FrameLen,
+					  sizeof(FRAME_ADDBA_RSP),  &ADDframe,
+			  END_OF_ARGS);
+	MiniportMMRequest(pAd, QID_AC_BE, pOutBuffer, FrameLen);
+	MlmeFreeMemory(pAd, pOutBuffer);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("%s(%d): TID(%d), BufSize(%d) <== \n", __FUNCTION__, Elem->Wcid, ADDframe.BaParm.TID, 
+							  ADDframe.BaParm.BufSize));
+}
+
+
+VOID PeerAddBARspAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+
+{
+	/*UCHAR		Idx, i;*/
+	/*PUCHAR		   pOutBuffer = NULL;*/
+	PFRAME_ADDBA_RSP    pFrame = NULL;
+	/*PBA_ORI_ENTRY		pBAEntry;*/
+	
+	/*ADDBA Response from unknown peer, ignore this.*/
+	if (Elem->Wcid >= MAX_LEN_OF_MAC_TABLE)
+		return;
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("%s ==> Wcid(%d)\n", __FUNCTION__, Elem->Wcid));
+	
+	/*hex_dump("PeerAddBARspAction()", Elem->Msg, Elem->MsgLen);*/
+
+	if (PeerAddBARspActionSanity(pAd, Elem->Msg, Elem->MsgLen))
+	{
+		pFrame = (PFRAME_ADDBA_RSP)(&Elem->Msg[0]);
+
+		DBGPRINT(RT_DEBUG_TRACE, ("\t\t StatusCode = %d\n", pFrame->StatusCode));
+		switch (pFrame->StatusCode)
+		{
+			case 0:
+				/* I want a BAsession with this peer as an originator. */
+				BAOriSessionAdd(pAd, &pAd->MacTab.Content[Elem->Wcid], pFrame);
+				break;
+			default:
+				/* check status == USED ??? */
+				BAOriSessionTearDown(pAd, Elem->Wcid, pFrame->BaParm.TID, TRUE, FALSE);
+				break;
+		}
+		/* Rcv Decline StatusCode*/
+		if ((pFrame->StatusCode == 37) 
+#ifdef CONFIG_STA_SUPPORT            
+            || ((pAd->OpMode == OPMODE_STA) && STA_TGN_WIFI_ON(pAd) && (pFrame->StatusCode != 0))
+#endif /* CONFIG_STA_SUPPORT */            
+            ) 
+		{
+			pAd->MacTab.Content[Elem->Wcid].BADeclineBitmap |= 1<<pFrame->BaParm.TID;
+		}
+	}
+}
+
+VOID PeerDelBAAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+
+{
+	/*UCHAR				Idx;*/
+	/*PUCHAR				pOutBuffer = NULL;*/
+	PFRAME_DELBA_REQ    pDelFrame = NULL;
+	
+	DBGPRINT(RT_DEBUG_TRACE,("%s ==>\n", __FUNCTION__));
+	/*DELBA Request from unknown peer, ignore this.*/
+	if (PeerDelBAActionSanity(pAd, Elem->Wcid, Elem->Msg, Elem->MsgLen))
+	{
+		pDelFrame = (PFRAME_DELBA_REQ)(&Elem->Msg[0]);
+		if (pDelFrame->DelbaParm.Initiator == ORIGINATOR)
+		{
+			DBGPRINT(RT_DEBUG_TRACE,("BA - PeerDelBAAction----> ORIGINATOR\n"));
+			BARecSessionTearDown(pAd, Elem->Wcid, pDelFrame->DelbaParm.TID, TRUE);
+		}
+		else
+		{
+			DBGPRINT(RT_DEBUG_TRACE,("BA - PeerDelBAAction----> RECIPIENT, Reason = %d\n",  pDelFrame->ReasonCode));
+			/*hex_dump("DelBA Frame", pDelFrame, Elem->MsgLen);*/
+			BAOriSessionTearDown(pAd, Elem->Wcid, pDelFrame->DelbaParm.TID, TRUE, FALSE);
+		}
+	}
+}
+
+
+BOOLEAN CntlEnqueueForRecv(
+						  IN PRTMP_ADAPTER		pAd, 
+						  IN ULONG				Wcid, 
+						  IN ULONG				MsgLen, 
+						  IN PFRAME_BA_REQ		pMsg) 
+{
+	PFRAME_BA_REQ   pFrame = pMsg;
+	/*PRTMP_REORDERBUF	pBuffer;*/
+	/*PRTMP_REORDERBUF	pDmaBuf;*/
+	PBA_REC_ENTRY pBAEntry;
+	/*BOOLEAN 	Result;*/
+	ULONG   Idx;
+	/*UCHAR	NumRxPkt;*/
+	UCHAR	TID;/*, i;*/
+	
+	TID = (UCHAR)pFrame->BARControl.TID;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("%s(): BAR-Wcid(%ld), Tid (%d)\n", __FUNCTION__, Wcid, TID));
+	/*hex_dump("BAR", (PCHAR) pFrame, MsgLen);*/
+	/* Do nothing if the driver is starting halt state.*/
+	/* This might happen when timer already been fired before cancel timer with mlmehalt*/
+	if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS | fRTMP_ADAPTER_NIC_NOT_EXIST))
+		return FALSE;
+
+	/* First check the size, it MUST not exceed the mlme queue size*/
+	if (MsgLen > MGMT_DMA_BUFFER_SIZE) /* 1600B */
+	{
+		DBGPRINT_ERR(("CntlEnqueueForRecv: frame too large, size = %ld \n", MsgLen));
+		return FALSE;
+	}
+	else if (MsgLen != sizeof(FRAME_BA_REQ))
+	{
+		DBGPRINT_ERR(("CntlEnqueueForRecv: BlockAck Request frame length size = %ld incorrect\n", MsgLen));
+		return FALSE;
+	}
+	else if (MsgLen != sizeof(FRAME_BA_REQ))
+	{
+		DBGPRINT_ERR(("CntlEnqueueForRecv: BlockAck Request frame length size = %ld incorrect\n", MsgLen));
+		return FALSE;
+	}
+		
+	if ((Wcid < MAX_LEN_OF_MAC_TABLE) && (TID < 8))
+		{
+		/* if this receiving packet is from SA that is in our OriEntry. Since WCID <9 has direct mapping. no need search.*/
+		Idx = pAd->MacTab.Content[Wcid].BARecWcidArray[TID];
+		pBAEntry = &pAd->BATable.BARecEntry[Idx];
+		}
+		else
+		{
+		return FALSE;
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("BAR(%ld) : Tid (%d) - %04x:%04x\n", Wcid, TID, pFrame->BAStartingSeq.field.StartSeq, pBAEntry->LastIndSeq ));
+
+	if (SEQ_SMALLER(pBAEntry->LastIndSeq, pFrame->BAStartingSeq.field.StartSeq, MAXSEQ))
+	{
+		/*DBGPRINT(RT_DEBUG_TRACE, ("BAR Seq = %x, LastIndSeq = %x\n", pFrame->BAStartingSeq.field.StartSeq, pBAEntry->LastIndSeq));*/
+		ba_indicate_reordering_mpdus_le_seq(pAd, pBAEntry, pFrame->BAStartingSeq.field.StartSeq);
+		pBAEntry->LastIndSeq = (pFrame->BAStartingSeq.field.StartSeq == 0) ? MAXSEQ :(pFrame->BAStartingSeq.field.StartSeq -1);
+	}
+	/*ba_refresh_reordering_mpdus(pAd, pBAEntry);*/
+	return TRUE;
+}
+
+/*
+Description : Send PSMP Action frame If PSMP mode switches.
+*/
+VOID SendPSMPAction(
+				   IN PRTMP_ADAPTER		pAd,
+				   IN UCHAR				Wcid,
+				   IN UCHAR				Psmp) 
+{
+	PUCHAR          pOutBuffer = NULL;
+	NDIS_STATUS     NStatus;
+	/*ULONG           Idx;*/
+	FRAME_PSMP_ACTION   Frame;
+	ULONG           FrameLen;
+
+	NStatus = MlmeAllocateMemory(pAd, &pOutBuffer);	 /*Get an unused nonpaged memory*/
+	if (NStatus != NDIS_STATUS_SUCCESS)
+	{
+		DBGPRINT(RT_DEBUG_ERROR,("BA - MlmeADDBAAction() allocate memory failed \n"));
+		return;
+	}
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		ActHeaderInit(pAd, &Frame.Hdr, pAd->CommonCfg.Bssid, pAd->CurrentAddress, pAd->MacTab.Content[Wcid].Addr);
+#endif /* CONFIG_STA_SUPPORT */
+
+	Frame.Category = CATEGORY_HT;
+	Frame.Action = SMPS_ACTION;
+	switch (Psmp)
+	{
+		case MMPS_ENABLE:
+#ifdef RT30xx
+			/* 1x1 chip does not support MIMO Power Save mode*/
+			if ((IS_RT3071(pAd) || IS_RT3572(pAd) || IS_RT3593(pAd))
+				&&(pAd->Antenna.field.RxPath>1||pAd->Antenna.field.TxPath>1))
+			{
+				RTMP_ASIC_MMPS_DISABLE(pAd);
+			}
+#endif /* RT30xx */
+			Frame.Psmp = 0;
+			break;
+		case MMPS_DYNAMIC:
+#ifdef RT30xx
+			if ((IS_RT3071(pAd) || IS_RT3572(pAd) || IS_RT3593(pAd))
+				&&(pAd->Antenna.field.RxPath>1||pAd->Antenna.field.TxPath>1))
+			{
+				RTMP_ASIC_MMPS_ENABLE(pAd);
+			}
+#endif /* RT30xx */
+			Frame.Psmp = 3;
+			break;
+		case MMPS_STATIC:
+#ifdef RT30xx
+			if ((IS_RT3071(pAd) || IS_RT3572(pAd) || IS_RT3593(pAd))
+				&&(pAd->Antenna.field.RxPath>1||pAd->Antenna.field.TxPath>1))
+			{
+				RTMP_ASIC_MMPS_ENABLE(pAd);
+			}
+#endif /* RT30xx */
+			Frame.Psmp = 1;
+			break;
+	}
+	MakeOutgoingFrame(pOutBuffer,               &FrameLen,
+					  sizeof(FRAME_PSMP_ACTION),      &Frame,
+					  END_OF_ARGS);
+	MiniportMMRequest(pAd, QID_AC_BE, pOutBuffer, FrameLen);
+	MlmeFreeMemory(pAd, pOutBuffer);
+	DBGPRINT(RT_DEBUG_ERROR,("HT - SendPSMPAction( %d )  \n", Frame.Psmp));
+}
+
+
+#define RADIO_MEASUREMENT_REQUEST_ACTION	0
+
+typedef struct GNU_PACKED
+{
+	UCHAR	RegulatoryClass;
+	UCHAR	ChannelNumber;
+	USHORT	RandomInterval;
+	USHORT	MeasurementDuration;
+	UCHAR	MeasurementMode;
+	UCHAR   BSSID[MAC_ADDR_LEN];
+	UCHAR	ReportingCondition;
+	UCHAR	Threshold;
+	UCHAR   SSIDIE[2];			/* 2 byte*/
+} BEACON_REQUEST;
+
+typedef struct GNU_PACKED
+{
+	UCHAR	ID;
+	UCHAR	Length;
+	UCHAR	Token;
+	UCHAR	RequestMode;
+	UCHAR	Type;
+} MEASUREMENT_REQ;
+
+
+
+void convert_reordering_packet_to_preAMSDU_or_802_3_packet(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	RX_BLK			*pRxBlk,
+	IN  UCHAR			FromWhichBSSID)
+{
+	PNDIS_PACKET	pRxPkt;
+	UCHAR			Header802_3[LENGTH_802_3];
+
+	/* 1. get 802.3 Header*/
+	/* 2. remove LLC */
+	/* 		a. pointer pRxBlk->pData to payload */
+	/*      b. modify pRxBlk->DataSize*/
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		RTMP_802_11_REMOVE_LLC_AND_CONVERT_TO_802_3(pRxBlk, Header802_3);
+#endif /* CONFIG_STA_SUPPORT */
+
+	ASSERT(pRxBlk->pRxPacket);
+
+	pRxPkt = RTPKT_TO_OSPKT(pRxBlk->pRxPacket);
+
+	RTMP_OS_PKT_INIT(pRxBlk->pRxPacket,
+					get_netdev_from_bssid(pAd, FromWhichBSSID),
+					pRxBlk->pData, pRxBlk->DataSize);
+
+	
+	/* copy 802.3 header, if necessary*/
+	/* */
+	if (!RX_BLK_TEST_FLAG(pRxBlk, fRX_AMSDU))
+	{
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+#ifdef LINUX
+			UCHAR *data_p;
+			data_p = OS_PKT_HEAD_BUF_EXTEND(pRxPkt, LENGTH_802_3);
+			NdisMoveMemory(data_p, Header802_3, LENGTH_802_3);
+#endif
+		}
+#endif /* CONFIG_STA_SUPPORT */
+	}
+}
+
+
+#define INDICATE_LEGACY_OR_AMSDU(_pAd, _pRxBlk, _fromWhichBSSID)		\
+	do																	\
+	{																	\
+    	if (RX_BLK_TEST_FLAG(_pRxBlk, fRX_AMSDU))						\
+    	{																\
+    		Indicate_AMSDU_Packet(_pAd, _pRxBlk, _fromWhichBSSID);		\
+    	}																\
+		else if (RX_BLK_TEST_FLAG(_pRxBlk, fRX_EAP))					\
+		{																\
+			Indicate_EAPOL_Packet(_pAd, _pRxBlk, _fromWhichBSSID);		\
+		}																\
+    	else															\
+    	{																\
+    		Indicate_Legacy_Packet(_pAd, _pRxBlk, _fromWhichBSSID);		\
+    	}																\
+	} while (0);
+
+
+
+static VOID ba_enqueue_reordering_packet(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PBA_REC_ENTRY	pBAEntry,
+	IN	RX_BLK			*pRxBlk,
+	IN	UCHAR			FromWhichBSSID)
+{
+	struct reordering_mpdu *mpdu_blk;
+	UINT16	Sequence = (UINT16) pRxBlk->pHeader->Sequence;
+
+	mpdu_blk = ba_mpdu_blk_alloc(pAd);
+	if ((mpdu_blk != NULL) &&
+		(!RX_BLK_TEST_FLAG(pRxBlk, fRX_EAP)))
+	{
+		/* Write RxD buffer address & allocated buffer length*/
+		NdisAcquireSpinLock(&pBAEntry->RxReRingLock);
+
+		mpdu_blk->Sequence = Sequence;
+		mpdu_blk->OpMode = pRxBlk->OpMode;
+
+		mpdu_blk->bAMSDU = RX_BLK_TEST_FLAG(pRxBlk, fRX_AMSDU);
+
+		convert_reordering_packet_to_preAMSDU_or_802_3_packet(pAd, pRxBlk, FromWhichBSSID);
+
+		STATS_INC_RX_PACKETS(pAd, FromWhichBSSID);
+
+        
+		/* it is necessary for reordering packet to record */
+		/* which BSS it come from*/
+		/* */
+		RTMP_SET_PACKET_IF(pRxBlk->pRxPacket, FromWhichBSSID);
+
+		mpdu_blk->pPacket = pRxBlk->pRxPacket;
+
+		if (ba_reordering_mpdu_insertsorted(&pBAEntry->list, mpdu_blk) == FALSE)
+		{
+			/* had been already within reordering list*/
+			/* don't indicate */
+			RELEASE_NDIS_PACKET(pAd, pRxBlk->pRxPacket, NDIS_STATUS_SUCCESS);                     
+			ba_mpdu_blk_free(pAd, mpdu_blk);
+		}
+
+		ASSERT((0<= pBAEntry->list.qlen)  && (pBAEntry->list.qlen <= pBAEntry->BAWinSize));
+		NdisReleaseSpinLock(&pBAEntry->RxReRingLock);
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_ERROR,  ("!!! (%d) Can't allocate reordering mpdu blk\n",
+								   pBAEntry->list.qlen));
+		/* 
+		 * flush all pending reordering mpdus 
+		 * and receving mpdu to upper layer
+		 * make tcp/ip to take care reordering mechanism
+		 */
+		/*ba_refresh_reordering_mpdus(pAd, pBAEntry);*/
+		ba_indicate_reordering_mpdus_le_seq(pAd, pBAEntry, Sequence);
+
+		pBAEntry->LastIndSeq = Sequence;
+		INDICATE_LEGACY_OR_AMSDU(pAd, pRxBlk, FromWhichBSSID);
+	}
+}
+
+
+/*
+	==========================================================================
+	Description:
+		Indicate this packet to upper layer or put it into reordering buffer	
+	
+	Parametrs:
+		pRxBlk         : carry necessary packet info 802.11 format
+		FromWhichBSSID : the packet received from which BSS
+
+	Return	: 
+			  none
+
+	Note    :
+	          the packet queued into reordering buffer need to cover to 802.3 format 
+			  or pre_AMSDU format
+	==========================================================================
+ */
+
+VOID Indicate_AMPDU_Packet(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RX_BLK			*pRxBlk,
+	IN	UCHAR			FromWhichBSSID)
+{
+	USHORT				Idx;
+	PBA_REC_ENTRY		pBAEntry = NULL;
+	UINT16				Sequence = pRxBlk->pHeader->Sequence;
+	ULONG				Now32;
+	UCHAR				Wcid = pRxBlk->pRxWI->WirelessCliID;
+	UCHAR				TID = pRxBlk->pRxWI->TID;
+
+
+	if (!RX_BLK_TEST_FLAG(pRxBlk, fRX_AMSDU) &&  (pRxBlk->DataSize > MAX_RX_PKT_LEN))
+	{
+		static int err_size;
+
+		err_size++;
+		if (err_size > 20) {
+			 DBGPRINT(RT_DEBUG_TRACE, ("AMPDU DataSize = %d\n", pRxBlk->DataSize));
+			 hex_dump("802.11 Header", (UCHAR *)pRxBlk->pHeader, 24);
+			 hex_dump("Payload", pRxBlk->pData, 64);
+			 err_size = 0;
+		}
+
+		/* release packet*/
+		RELEASE_NDIS_PACKET(pAd, pRxBlk->pRxPacket, NDIS_STATUS_FAILURE);
+		return;
+	}
+
+
+
+	if (Wcid < MAX_LEN_OF_MAC_TABLE)
+	{
+		Idx = pAd->MacTab.Content[Wcid].BARecWcidArray[TID];
+		if (Idx == 0)
+		{
+			/* Rec BA Session had been torn down */
+			INDICATE_LEGACY_OR_AMSDU(pAd, pRxBlk, FromWhichBSSID); 
+			return;
+		}
+		pBAEntry = &pAd->BATable.BARecEntry[Idx];
+	}
+	else
+	{
+		/* impossible !!!*/
+		ASSERT(0);
+		/* release packet*/
+		RELEASE_NDIS_PACKET(pAd, pRxBlk->pRxPacket, NDIS_STATUS_FAILURE);
+		return;
+	}
+
+	ASSERT(pBAEntry);
+
+	/* update last rx time*/
+	NdisGetSystemUpTime(&Now32);
+
+	pBAEntry->rcvSeq = Sequence;
+
+
+	ba_flush_reordering_timeout_mpdus(pAd, pBAEntry, Now32);
+	pBAEntry->LastIndSeqAtTimer = Now32;
+
+	
+	/* Reset Last Indicate Sequence*/
+	/* */
+	if (pBAEntry->LastIndSeq == RESET_RCV_SEQ)
+	{
+		ASSERT((pBAEntry->list.qlen == 0) && (pBAEntry->list.next == NULL));
+
+		/* reset rcv sequence of BA session */
+		pBAEntry->LastIndSeq = Sequence;
+		pBAEntry->LastIndSeqAtTimer = Now32;
+		INDICATE_LEGACY_OR_AMSDU(pAd, pRxBlk, FromWhichBSSID);
+		return;
+	}
+
+	
+	/* I. Check if in order.*/
+	/* */
+	if (SEQ_STEPONE(Sequence, pBAEntry->LastIndSeq, MAXSEQ))
+	{
+		USHORT  LastIndSeq;
+
+		pBAEntry->LastIndSeq = Sequence;
+		INDICATE_LEGACY_OR_AMSDU(pAd, pRxBlk, FromWhichBSSID);
+ 		LastIndSeq = ba_indicate_reordering_mpdus_in_order(pAd, pBAEntry, pBAEntry->LastIndSeq);
+		if (LastIndSeq != RESET_RCV_SEQ)
+		{
+			pBAEntry->LastIndSeq = LastIndSeq;
+		}
+		pBAEntry->LastIndSeqAtTimer = Now32;
+	}
+	
+	/* II. Drop Duplicated Packet*/
+	/* */
+	else if (Sequence == pBAEntry->LastIndSeq)
+	{
+		
+		/* drop and release packet*/
+		pBAEntry->nDropPacket++;
+		RELEASE_NDIS_PACKET(pAd, pRxBlk->pRxPacket, NDIS_STATUS_FAILURE);
+	}
+	
+	/* III. Drop Old Received Packet*/
+	/* */
+	else if (SEQ_SMALLER(Sequence, pBAEntry->LastIndSeq, MAXSEQ))
+	{
+		
+		/* drop and release packet*/
+		pBAEntry->nDropPacket++;
+		RELEASE_NDIS_PACKET(pAd, pRxBlk->pRxPacket, NDIS_STATUS_FAILURE);
+	}
+	
+	/* IV. Receive Sequence within Window Size*/
+	/* */
+	else if (SEQ_SMALLER(Sequence, (((pBAEntry->LastIndSeq+pBAEntry->BAWinSize+1)) & MAXSEQ), MAXSEQ))
+	{
+		ba_enqueue_reordering_packet(pAd, pBAEntry, pRxBlk, FromWhichBSSID);
+	}
+	
+	/* V. Receive seq surpasses Win(lastseq + nMSDU). So refresh all reorder buffer*/
+	/* */
+	else
+	{
+		LONG WinStartSeq, TmpSeq;
+
+
+		TmpSeq = Sequence - (pBAEntry->BAWinSize) -1;
+		if (TmpSeq < 0)
+		{
+			TmpSeq = (MAXSEQ+1) + TmpSeq;
+		}
+		WinStartSeq = (TmpSeq+1) & MAXSEQ;
+		ba_indicate_reordering_mpdus_le_seq(pAd, pBAEntry, WinStartSeq);
+		pBAEntry->LastIndSeq = WinStartSeq; /*TmpSeq;          */
+
+		pBAEntry->LastIndSeqAtTimer = Now32;
+
+		ba_enqueue_reordering_packet(pAd, pBAEntry, pRxBlk, FromWhichBSSID);
+
+		TmpSeq = ba_indicate_reordering_mpdus_in_order(pAd, pBAEntry, pBAEntry->LastIndSeq);
+		if (TmpSeq != RESET_RCV_SEQ)
+		{
+			pBAEntry->LastIndSeq = TmpSeq;
+		}
+	}
+}
+
+
+VOID BaReOrderingBufferMaintain(
+    IN PRTMP_ADAPTER pAd)
+{
+    ULONG Now32;
+    UCHAR Wcid;
+    USHORT Idx;
+    UCHAR TID;
+    PBA_REC_ENTRY pBAEntry = NULL;
+    PMAC_TABLE_ENTRY pEntry = NULL;
+ 
+    /* update last rx time*/
+    NdisGetSystemUpTime(&Now32);
+ 
+    for (Wcid = 1; Wcid < MAX_LEN_OF_MAC_TABLE; Wcid++)
+    {
+        pEntry = &pAd->MacTab.Content[Wcid];
+        if (IS_ENTRY_NONE(pEntry))
+            continue;
+ 
+        for (TID= 0; TID < NUM_OF_TID; TID++)
+        {
+            Idx = pAd->MacTab.Content[Wcid].BARecWcidArray[TID];
+            pBAEntry = &pAd->BATable.BARecEntry[Idx];
+            ba_flush_reordering_timeout_mpdus(pAd, pBAEntry, Now32);
+        }
+    }
+}
+#endif /* DOT11_N_SUPPORT */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/client_wds.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/client_wds.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/client_wds.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/client_wds.c	2017-09-23 03:42:49.702676030 +0800
@@ -0,0 +1,200 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifdef CLIENT_WDS
+
+#include "rt_config.h"
+
+VOID CliWds_ProxyTabInit(
+	IN PRTMP_ADAPTER pAd)
+{
+	INT idx;
+	ULONG i;
+
+	NdisAllocateSpinLock(pAd, &pAd->ApCfg.CliWdsTabLock);
+
+/*	pAd->ApCfg.pCliWdsEntryPool = kmalloc(sizeof(CLIWDS_PROXY_ENTRY) * CLIWDS_POOL_SIZE, GFP_ATOMIC);*/
+	os_alloc_mem(pAd, (UCHAR **)&(pAd->ApCfg.pCliWdsEntryPool), sizeof(CLIWDS_PROXY_ENTRY) * CLIWDS_POOL_SIZE);
+	if (pAd->ApCfg.pCliWdsEntryPool)
+	{
+		NdisZeroMemory(pAd->ApCfg.pCliWdsEntryPool, sizeof(CLIWDS_PROXY_ENTRY) * CLIWDS_POOL_SIZE);
+		initList(&pAd->ApCfg.CliWdsEntryFreeList);
+		for (i = 0; i < CLIWDS_POOL_SIZE; i++)
+			insertTailList(&pAd->ApCfg.CliWdsEntryFreeList, (PLIST_ENTRY)(pAd->ApCfg.pCliWdsEntryPool + (ULONG)i));
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s Fail to alloc memory for pAd->CommonCfg.pCliWdsEntryPool", __FUNCTION__));
+	}
+
+	for (idx = 0; idx < CLIWDS_HASH_TAB_SIZE; idx++)
+		initList(&pAd->ApCfg.CliWdsProxyTab[idx]);
+
+	return;
+}
+
+
+VOID CliWds_ProxyTabDestory(
+	IN PRTMP_ADAPTER pAd)
+{
+	INT idx;
+	PCLIWDS_PROXY_ENTRY pCliWdsEntry;
+
+	NdisFreeSpinLock(&pAd->ApCfg.CliWdsTabLock);
+
+	for (idx = 0; idx < CLIWDS_HASH_TAB_SIZE; idx++)
+	{
+		pCliWdsEntry =
+			(PCLIWDS_PROXY_ENTRY)pAd->ApCfg.CliWdsProxyTab[idx].pHead;
+		while(pCliWdsEntry)
+		{
+			PCLIWDS_PROXY_ENTRY pCliWdsEntryNext = pCliWdsEntry->pNext;
+			CliWdsEntyFree(pAd, pCliWdsEntry);
+			pCliWdsEntry = pCliWdsEntryNext;
+		}
+	}
+
+	if (pAd->ApCfg.pCliWdsEntryPool)
+/*		kfree(pAd->ApCfg.pCliWdsEntryPool);*/
+		os_free_mem(NULL, pAd->ApCfg.pCliWdsEntryPool);
+	pAd->ApCfg.pCliWdsEntryPool = NULL;	
+
+	return;
+}
+
+
+PCLIWDS_PROXY_ENTRY CliWdsEntyAlloc(
+	IN PRTMP_ADAPTER pAd)
+{
+	PCLIWDS_PROXY_ENTRY pCliWdsEntry;
+
+	RTMP_SEM_LOCK(&pAd->ApCfg.CliWdsTabLock);
+
+	pCliWdsEntry = (PCLIWDS_PROXY_ENTRY)removeHeadList(&pAd->ApCfg.CliWdsEntryFreeList);
+
+	RTMP_SEM_UNLOCK(&pAd->ApCfg.CliWdsTabLock);
+
+	return pCliWdsEntry;
+}
+
+
+VOID CliWdsEntyFree(
+	IN PRTMP_ADAPTER pAd,
+	IN PCLIWDS_PROXY_ENTRY pCliWdsEntry)
+{
+	RTMP_SEM_LOCK(&pAd->ApCfg.CliWdsTabLock);
+
+	insertTailList(&pAd->ApCfg.CliWdsEntryFreeList, (PLIST_ENTRY)pCliWdsEntry);
+
+	RTMP_SEM_UNLOCK(&pAd->ApCfg.CliWdsTabLock);
+
+	return;
+}
+
+
+PUCHAR CliWds_ProxyLookup(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pMac)
+{
+	UINT8 HashId = (*(pMac + 5) & (CLIWDS_HASH_TAB_SIZE - 1));
+	PCLIWDS_PROXY_ENTRY pCliWdsEntry;
+
+	pCliWdsEntry =
+		(PCLIWDS_PROXY_ENTRY)pAd->ApCfg.CliWdsProxyTab[HashId].pHead;
+	while (pCliWdsEntry)
+	{
+		if (MAC_ADDR_EQUAL(pMac, pCliWdsEntry->Addr))
+		{
+			ULONG Now;
+			NdisGetSystemUpTime(&Now);
+
+			pCliWdsEntry->LastRefTime = Now;
+			if (VALID_WCID(pCliWdsEntry->Aid))
+				return pAd->MacTab.Content[pCliWdsEntry->Aid].Addr;
+			else
+				return NULL;
+		}
+		pCliWdsEntry = pCliWdsEntry->pNext;
+	}
+	return NULL;
+}
+
+
+VOID CliWds_ProxyTabUpdate(
+	IN PRTMP_ADAPTER pAd,
+	IN SHORT Aid,
+	IN PUCHAR pMac)
+{
+	UINT8 HashId = (*(pMac + 5) & (CLIWDS_HASH_TAB_SIZE - 1));
+	PCLIWDS_PROXY_ENTRY pCliWdsEntry;
+
+	if (CliWds_ProxyLookup(pAd, pMac) != NULL)
+		return;
+
+	pCliWdsEntry = CliWdsEntyAlloc(pAd);
+	if (pCliWdsEntry)
+	{
+		ULONG Now;
+		NdisGetSystemUpTime(&Now);
+
+		pCliWdsEntry->Aid = Aid;
+		COPY_MAC_ADDR(&pCliWdsEntry->Addr, pMac);
+		pCliWdsEntry->LastRefTime = Now;
+		pCliWdsEntry->pNext = NULL;
+		insertTailList(&pAd->ApCfg.CliWdsProxyTab[HashId], (PLIST_ENTRY)pCliWdsEntry);
+	}
+	return;
+}
+
+
+VOID CliWds_ProxyTabMaintain(
+	IN PRTMP_ADAPTER pAd)
+{
+	ULONG idx;
+	PCLIWDS_PROXY_ENTRY pCliWdsEntry;
+	ULONG Now;
+
+	NdisGetSystemUpTime(&Now);
+	for (idx = 0; idx < CLIWDS_HASH_TAB_SIZE; idx++)
+	{
+		pCliWdsEntry = (PCLIWDS_PROXY_ENTRY)(pAd->ApCfg.CliWdsProxyTab[idx].pHead);
+		while(pCliWdsEntry)
+		{
+			PCLIWDS_PROXY_ENTRY pCliWdsEntryNext = pCliWdsEntry->pNext;
+			if (RTMP_TIME_AFTER(Now, pCliWdsEntry->LastRefTime + (CLI_WDS_ENTRY_AGEOUT * OS_HZ / 1000)))
+			{
+				delEntryList(&pAd->ApCfg.CliWdsProxyTab[idx], (PLIST_ENTRY)pCliWdsEntry);
+				CliWdsEntyFree(pAd, pCliWdsEntry);
+			}
+			pCliWdsEntry = pCliWdsEntryNext;
+		}
+	}
+	return;
+}
+
+#endif /* CLIENT_WDS */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_aes.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_aes.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_aes.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_aes.c	2017-09-23 03:42:49.702676030 +0800
@@ -0,0 +1,1135 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include	"rt_config.h"
+
+
+
+/*****************************/
+/******** SBOX Table *********/
+/*****************************/
+
+UCHAR SboxTable[256] =
+{
+	0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5,
+	0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76,
+	0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0,
+	0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0,
+	0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc,
+	0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15,
+	0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a,
+	0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75,
+	0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0,
+	0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84,
+	0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b,
+	0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf,
+	0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85,
+	0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8,
+	0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5,
+	0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2,
+	0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17,
+	0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73,
+	0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88,
+	0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb,
+	0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c,
+	0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79,
+	0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9,
+	0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08,
+	0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6,
+	0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a,
+	0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e,
+	0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e,
+	0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94,
+	0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf,
+	0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68,
+	0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16
+};
+
+VOID xor_32(
+	IN  PUCHAR  a,
+	IN  PUCHAR  b,
+	OUT PUCHAR  out)
+{
+	INT i;
+
+	for (i=0;i<4; i++)
+	{
+		out[i] = a[i] ^ b[i];
+	}
+}
+
+VOID xor_128(
+	IN  PUCHAR  a,
+	IN  PUCHAR  b,
+	OUT PUCHAR  out)
+{
+	INT i;
+
+	for (i=0;i<16; i++)
+	{
+		out[i] = a[i] ^ b[i];
+	}
+}
+
+UCHAR RTMPCkipSbox(
+	IN  UCHAR   a)
+{
+	return SboxTable[(int)a];
+}
+
+VOID next_key(
+	IN  PUCHAR  key,
+	IN  INT     round)
+{
+	UCHAR       rcon;
+	UCHAR       sbox_key[4];
+	UCHAR       rcon_table[12] =
+	{
+		0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80,
+		0x1b, 0x36, 0x36, 0x36
+	};
+
+	sbox_key[0] = RTMPCkipSbox(key[13]);
+	sbox_key[1] = RTMPCkipSbox(key[14]);
+	sbox_key[2] = RTMPCkipSbox(key[15]);
+	sbox_key[3] = RTMPCkipSbox(key[12]);
+
+	rcon = rcon_table[round];
+
+	xor_32(&key[0], sbox_key, &key[0]);
+	key[0] = key[0] ^ rcon;
+
+	xor_32(&key[4], &key[0], &key[4]);
+	xor_32(&key[8], &key[4], &key[8]);
+	xor_32(&key[12], &key[8], &key[12]);
+}
+
+VOID byte_sub(
+	IN  PUCHAR  in,
+	OUT PUCHAR  out)
+{
+	INT i;
+
+	for (i=0; i< 16; i++)
+	{
+		out[i] = RTMPCkipSbox(in[i]);
+	}
+}
+
+/************************************/
+/* bitwise_xor()                    */
+/* A 128 bit, bitwise exclusive or  */
+/************************************/
+
+void bitwise_xor(unsigned char *ina, unsigned char *inb, unsigned char *out)
+{
+	int i;
+	for (i=0; i<16; i++)
+	{
+		out[i] = ina[i] ^ inb[i];
+	}
+}
+
+VOID shift_row(
+	IN  PUCHAR  in,
+	OUT PUCHAR  out)
+{
+	out[0] =  in[0];
+	out[1] =  in[5];
+	out[2] =  in[10];
+	out[3] =  in[15];
+	out[4] =  in[4];
+	out[5] =  in[9];
+	out[6] =  in[14];
+	out[7] =  in[3];
+	out[8] =  in[8];
+	out[9] =  in[13];
+	out[10] = in[2];
+	out[11] = in[7];
+	out[12] = in[12];
+	out[13] = in[1];
+	out[14] = in[6];
+	out[15] = in[11];
+}
+
+VOID mix_column(
+	IN  PUCHAR  in,
+	OUT PUCHAR  out)
+{
+	INT         i;
+	UCHAR       add1b[4];
+	UCHAR       add1bf7[4];
+	UCHAR       rotl[4];
+	UCHAR       swap_halfs[4];
+	UCHAR       andf7[4];
+	UCHAR       rotr[4];
+	UCHAR       temp[4];
+	UCHAR       tempb[4];
+
+	for (i=0 ; i<4; i++)
+	{
+		if ((in[i] & 0x80)== 0x80)
+			add1b[i] = 0x1b;
+		else
+			add1b[i] = 0x00;
+	}
+
+	swap_halfs[0] = in[2];    /* Swap halfs */
+	swap_halfs[1] = in[3];
+	swap_halfs[2] = in[0];
+	swap_halfs[3] = in[1];
+
+	rotl[0] = in[3];        /* Rotate left 8 bits */
+	rotl[1] = in[0];
+	rotl[2] = in[1];
+	rotl[3] = in[2];
+
+	andf7[0] = in[0] & 0x7f;
+	andf7[1] = in[1] & 0x7f;
+	andf7[2] = in[2] & 0x7f;
+	andf7[3] = in[3] & 0x7f;
+
+	for (i = 3; i>0; i--)    /* logical shift left 1 bit */
+	{
+		andf7[i] = andf7[i] << 1;
+		if ((andf7[i-1] & 0x80) == 0x80)
+		{
+			andf7[i] = (andf7[i] | 0x01);
+		}
+	}
+	andf7[0] = andf7[0] << 1;
+	andf7[0] = andf7[0] & 0xfe;
+
+	xor_32(add1b, andf7, add1bf7);
+
+	xor_32(in, add1bf7, rotr);
+
+	temp[0] = rotr[0];         /* Rotate right 8 bits */
+	rotr[0] = rotr[1];
+	rotr[1] = rotr[2];
+	rotr[2] = rotr[3];
+	rotr[3] = temp[0];
+
+	xor_32(add1bf7, rotr, temp);
+	xor_32(swap_halfs, rotl,tempb);
+	xor_32(temp, tempb, out);
+}
+
+
+/************************************************/
+/* construct_mic_header1()                      */
+/* Builds the first MIC header block from       */
+/* header fields.                               */
+/************************************************/
+
+void construct_mic_header1(
+	unsigned char *mic_header1,
+	int header_length,
+	unsigned char *mpdu)
+{
+	mic_header1[0] = (unsigned char)((header_length - 2) / 256);
+	mic_header1[1] = (unsigned char)((header_length - 2) % 256);
+	mic_header1[2] = mpdu[0] & 0xcf;    /* Mute CF poll & CF ack bits */
+	mic_header1[3] = mpdu[1] & 0xc7;    /* Mute retry, more data and pwr mgt bits */
+	mic_header1[4] = mpdu[4];       /* A1 */
+	mic_header1[5] = mpdu[5];
+	mic_header1[6] = mpdu[6];
+	mic_header1[7] = mpdu[7];
+	mic_header1[8] = mpdu[8];
+	mic_header1[9] = mpdu[9];
+	mic_header1[10] = mpdu[10];     /* A2 */
+	mic_header1[11] = mpdu[11];
+	mic_header1[12] = mpdu[12];
+	mic_header1[13] = mpdu[13];
+	mic_header1[14] = mpdu[14];
+	mic_header1[15] = mpdu[15];
+}
+
+/************************************************/
+/* construct_mic_header2()                      */
+/* Builds the last MIC header block from        */
+/* header fields.                               */
+/************************************************/
+
+void construct_mic_header2(
+	unsigned char *mic_header2,
+	unsigned char *mpdu,
+	int a4_exists,
+	int qc_exists)
+{
+	int i;
+
+	for (i = 0; i<16; i++) mic_header2[i]=0x00;
+
+	mic_header2[0] = mpdu[16];    /* A3 */
+	mic_header2[1] = mpdu[17];
+	mic_header2[2] = mpdu[18];
+	mic_header2[3] = mpdu[19];
+	mic_header2[4] = mpdu[20];
+	mic_header2[5] = mpdu[21];
+
+	/* In Sequence Control field, mute sequence numer bits (12-bit) */
+	mic_header2[6] = mpdu[22] & 0x0f;   /* SC */
+	mic_header2[7] = 0x00; /* mpdu[23]; */
+
+	if ((!qc_exists) & a4_exists)
+	{
+		for (i=0;i<6;i++) mic_header2[8+i] = mpdu[24+i];   /* A4 */
+
+	}
+
+	if (qc_exists && (!a4_exists))
+	{
+		mic_header2[8] = mpdu[24] & 0x0f; /* mute bits 15 - 4 */
+		mic_header2[9] = mpdu[25] & 0x00;
+	}
+
+	if (qc_exists && a4_exists)
+	{
+		for (i=0;i<6;i++) mic_header2[8+i] = mpdu[24+i];   /* A4 */
+
+		mic_header2[14] = mpdu[30] & 0x0f;
+		mic_header2[15] = mpdu[31] & 0x00;
+	}
+}
+
+
+/************************************************/
+/* construct_mic_iv()                           */
+/* Builds the MIC IV from header fields and PN  */
+/************************************************/
+
+void construct_mic_iv(
+	unsigned char *mic_iv,
+	int qc_exists,
+	int a4_exists,
+	unsigned char *mpdu,
+	unsigned int payload_length,
+	unsigned char *pn_vector)
+{
+	int i;
+
+	mic_iv[0] = 0x59;
+	if (qc_exists && a4_exists) 
+		mic_iv[1] = mpdu[30] & 0x0f;    /* QoS_TC           */
+	if (qc_exists && !a4_exists) 
+		mic_iv[1] = mpdu[24] & 0x0f;   /* mute bits 7-4    */
+	if (!qc_exists) 
+		mic_iv[1] = 0x00;
+	for (i = 2; i < 8; i++)
+		mic_iv[i] = mpdu[i + 8];                    /* mic_iv[2:7] = A2[0:5] = mpdu[10:15] */
+#ifdef CONSISTENT_PN_ORDER
+		for (i = 8; i < 14; i++)
+			mic_iv[i] = pn_vector[i - 8];           /* mic_iv[8:13] = PN[0:5] */
+#else
+		for (i = 8; i < 14; i++)
+			mic_iv[i] = pn_vector[13 - i];          /* mic_iv[8:13] = PN[5:0] */
+#endif
+	i = (payload_length / 256);
+	i = (payload_length % 256);
+	mic_iv[14] = (unsigned char) (payload_length / 256);
+	mic_iv[15] = (unsigned char) (payload_length % 256);
+
+}
+
+/****************************************/
+/* aes128k128d()                        */
+/* Performs a 128 bit AES encrypt with  */
+/* 128 bit data.                        */
+/****************************************/
+void aes128k128d(unsigned char *key, unsigned char *data, unsigned char *ciphertext)
+{
+	int round;
+	int i;
+	unsigned char intermediatea[16];
+	unsigned char intermediateb[16];
+	unsigned char round_key[16];
+
+	for(i=0; i<16; i++) round_key[i] = key[i];
+
+	for (round = 0; round < 11; round++)
+	{
+		if (round == 0)
+		{
+			xor_128(round_key, data, ciphertext);
+			next_key(round_key, round);         
+		}
+		else if (round == 10)
+		{
+			byte_sub(ciphertext, intermediatea);
+			shift_row(intermediatea, intermediateb);
+			xor_128(intermediateb, round_key, ciphertext);
+		}
+		else    /* 1 - 9 */
+		{
+			byte_sub(ciphertext, intermediatea);
+			shift_row(intermediatea, intermediateb);
+			mix_column(&intermediateb[0], &intermediatea[0]);
+			mix_column(&intermediateb[4], &intermediatea[4]);
+			mix_column(&intermediateb[8], &intermediatea[8]);
+			mix_column(&intermediateb[12], &intermediatea[12]);
+			xor_128(intermediatea, round_key, ciphertext);
+			next_key(round_key, round);
+		}
+	}
+
+}
+
+void construct_ctr_preload(
+	unsigned char *ctr_preload,
+	int a4_exists,
+	int qc_exists,
+	unsigned char *mpdu,
+	unsigned char *pn_vector,
+	int c)
+{
+
+	int i = 0;
+	for (i=0; i<16; i++) ctr_preload[i] = 0x00;
+	i = 0;
+
+	ctr_preload[0] = 0x01;                                  /* flag */
+	if (qc_exists && a4_exists) ctr_preload[1] = mpdu[30] & 0x0f;   /* QoC_Control  */
+	if (qc_exists && !a4_exists) ctr_preload[1] = mpdu[24] & 0x0f;
+
+	for (i = 2; i < 8; i++)
+		ctr_preload[i] = mpdu[i + 8];                       /* ctr_preload[2:7] = A2[0:5] = mpdu[10:15] */
+#ifdef CONSISTENT_PN_ORDER
+	  for (i = 8; i < 14; i++)
+			ctr_preload[i] =    pn_vector[i - 8];           /* ctr_preload[8:13] = PN[0:5] */
+#else
+	  for (i = 8; i < 14; i++)
+			ctr_preload[i] =    pn_vector[13 - i];          /* ctr_preload[8:13] = PN[5:0] */
+#endif
+	ctr_preload[14] =  (unsigned char) (c / 256); /* Ctr */
+	ctr_preload[15] =  (unsigned char) (c % 256);
+
+}
+
+BOOLEAN RTMPSoftDecryptAES(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR	pData,
+	IN ULONG	DataByteCnt, 
+	IN PCIPHER_KEY	pWpaKey)
+{
+	UINT			HeaderLen;
+	UCHAR			PN[6];
+	UINT			payload_len;	
+	UINT			num_blocks;
+	UINT			payload_remainder;
+	USHORT			fc;
+	UCHAR			fc0;
+	UCHAR			fc1;	
+	UINT			frame_type;
+	UINT			frame_subtype;
+	UINT			from_ds;
+	UINT			to_ds;
+	INT				a4_exists;
+	INT				qc_exists;
+	UCHAR			aes_out[16];
+	int 			payload_index;
+	UINT 			i;
+	UCHAR 			ctr_preload[16];
+	UCHAR 			chain_buffer[16];
+	UCHAR 			padded_buffer[16];
+	UCHAR 			mic_iv[16];
+	UCHAR 			mic_header1[16];
+	UCHAR 			mic_header2[16];	
+	UCHAR			MIC[8];
+	UCHAR			TrailMIC[8];
+
+#ifdef RT_BIG_ENDIAN
+	RTMPFrameEndianChange(pAd, (PUCHAR)pData, DIR_READ, FALSE);
+#endif
+
+	fc0 = *pData;
+	fc1 = *(pData + 1);
+
+	fc = *((PUSHORT)pData);	
+
+	frame_type = ((fc0 >> 2) & 0x03);
+	frame_subtype = ((fc0 >> 4) & 0x0f);	
+
+	from_ds = (fc1 & 0x2) >> 1;
+	to_ds = (fc1 & 0x1);
+
+	a4_exists = (from_ds & to_ds);
+	qc_exists = ((frame_subtype == 0x08) ||    /* Assumed QoS subtypes */
+				  (frame_subtype == 0x09) ||   /* Likely to change.    */
+				  (frame_subtype == 0x0a) || 
+				  (frame_subtype == 0x0b)
+				 );
+
+	HeaderLen = 24;
+	
+	if (a4_exists)
+		HeaderLen += 6;
+
+	if (qc_exists)
+		HeaderLen += 2;
+
+	if (pWpaKey->KeyLen == 0)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("RTMPSoftDecryptAES failed!(the Length can not be 0)\n"));
+		return FALSE;
+	}
+
+	PN[0] = *(pData+ HeaderLen);
+	PN[1] = *(pData+ HeaderLen + 1);
+	PN[2] = *(pData+ HeaderLen + 4);
+	PN[3] = *(pData+ HeaderLen + 5);
+	PN[4] = *(pData+ HeaderLen + 6);
+	PN[5] = *(pData+ HeaderLen + 7);
+
+	payload_len = DataByteCnt - HeaderLen - 8 - 8;	/* 8 bytes for CCMP header , 8 bytes for MIC*/
+	payload_remainder = (payload_len) % 16;
+	num_blocks = (payload_len) / 16; 
+	
+	
+
+	/* Find start of payload*/
+	payload_index = HeaderLen + 8; /*IV+EIV*/
+
+	for (i=0; i< num_blocks; i++)	
+	{
+		construct_ctr_preload(ctr_preload,
+								a4_exists,
+								qc_exists,
+								pData,
+								PN,
+								i+1 );
+
+		aes128k128d(pWpaKey->Key, ctr_preload, aes_out);
+
+		bitwise_xor(aes_out, pData + payload_index, chain_buffer);
+		NdisMoveMemory(pData + payload_index - 8, chain_buffer, 16);
+		payload_index += 16;
+	}
+
+	
+	/* If there is a short final block, then pad it*/
+	/* encrypt it and copy the unpadded part back */
+	
+	if (payload_remainder > 0)
+	{
+		construct_ctr_preload(ctr_preload,
+								a4_exists,
+								qc_exists,
+								pData,
+								PN,
+								num_blocks + 1);
+
+		NdisZeroMemory(padded_buffer, 16);
+		NdisMoveMemory(padded_buffer, pData + payload_index, payload_remainder);
+
+		aes128k128d(pWpaKey->Key, ctr_preload, aes_out);
+
+		bitwise_xor(aes_out, padded_buffer, chain_buffer);
+		NdisMoveMemory(pData + payload_index - 8, chain_buffer, payload_remainder);
+		payload_index += payload_remainder;
+	}
+
+	
+	/* Descrypt the MIC*/
+	/* */
+	construct_ctr_preload(ctr_preload,
+							a4_exists,
+							qc_exists,
+							pData,
+							PN,
+							0);
+	NdisZeroMemory(padded_buffer, 16);
+	NdisMoveMemory(padded_buffer, pData + payload_index, 8); 
+	
+	aes128k128d(pWpaKey->Key, ctr_preload, aes_out);
+
+	bitwise_xor(aes_out, padded_buffer, chain_buffer);	
+
+	NdisMoveMemory(TrailMIC, chain_buffer, 8);
+	
+	
+	
+	/* Calculate MIC*/
+	
+
+	/*Force the protected frame bit on*/
+	*(pData + 1) = *(pData + 1) | 0x40;
+
+	/* Find start of payload*/
+	/* Because the CCMP header has been removed*/
+	payload_index = HeaderLen;
+
+	construct_mic_iv(
+					mic_iv,
+					qc_exists,
+					a4_exists,
+					pData,
+					payload_len,
+					PN);
+
+	construct_mic_header1(
+						mic_header1,
+						HeaderLen,
+						pData);
+
+	construct_mic_header2(
+						mic_header2,
+						pData,
+						a4_exists,
+						qc_exists);
+
+	aes128k128d(pWpaKey->Key, mic_iv, aes_out);
+	bitwise_xor(aes_out, mic_header1, chain_buffer);
+	aes128k128d(pWpaKey->Key, chain_buffer, aes_out);
+	bitwise_xor(aes_out, mic_header2, chain_buffer);
+	aes128k128d(pWpaKey->Key, chain_buffer, aes_out);
+
+	/* iterate through each 16 byte payload block*/
+	for (i = 0; i < num_blocks; i++)     
+	{
+		bitwise_xor(aes_out, pData + payload_index, chain_buffer);
+		payload_index += 16;
+		aes128k128d(pWpaKey->Key, chain_buffer, aes_out);
+	}
+
+	/* Add on the final payload block if it needs padding*/
+	if (payload_remainder > 0)
+	{
+		NdisZeroMemory(padded_buffer, 16);
+		NdisMoveMemory(padded_buffer, pData + payload_index, payload_remainder);
+
+		bitwise_xor(aes_out, padded_buffer, chain_buffer);
+		aes128k128d(pWpaKey->Key, chain_buffer, aes_out);		
+	}
+
+	/* aes_out contains padded mic, discard most significant*/
+	/* 8 bytes to generate 64 bit MIC*/
+	for (i = 0 ; i < 8; i++) MIC[i] = aes_out[i];
+
+	if (!NdisEqualMemory(MIC, TrailMIC, 8))
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("RTMPSoftDecryptAES, MIC Error !\n"));	 /*MIC error.	*/
+		return FALSE;
+	}
+
+#ifdef RT_BIG_ENDIAN
+	RTMPFrameEndianChange(pAd, (PUCHAR)pData, DIR_READ, FALSE);
+#endif
+
+	return TRUE;
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Construct AAD of CCMP.
+
+	Arguments:
+		
+	Return Value:
+
+	Note:
+		It's described in IEEE Std 802.11-2007.
+		The AAD is constructed from the MPDU header.
+		
+	========================================================================
+*/
+VOID RTMPConstructCCMPAAD(
+	IN 	PUCHAR 			pHdr,
+	IN	BOOLEAN			isDataFrame,
+	IN	UINT8 			a4_exists,
+	IN	UINT8			qc_exists,
+	OUT	UCHAR			*aad_hdr,
+	OUT	UINT			*aad_len)
+{
+	UINT len = 0;
+
+	/* 	Frame control -
+		Subtype bits (bits 4 5 6) in a Data MPDU masked to 0
+		Retry bit (bit 11) masked to 0
+		PwrMgt bit (bit 12) masked to 0
+		MoreData bit (bit 13) masked to 0
+		Protected Frame bit (bit 14) always set to 1 */
+	if (isDataFrame)
+		aad_hdr[0] = (*pHdr) & 0x8f;
+	else
+		aad_hdr[0] = (*pHdr);
+	aad_hdr[1] = (*(pHdr + 1)) & 0xc7;
+	aad_hdr[1] = aad_hdr[1] | 0x40;
+	len = 2;
+	
+	/* Append Addr 1, 2 & 3 */
+	NdisMoveMemory(&aad_hdr[len], pHdr + 4, 3 * MAC_ADDR_LEN);
+	len += (3 * MAC_ADDR_LEN);
+
+	/*  SC - 
+		MPDU Sequence Control field, with the Sequence Number 
+		subfield (bits 4-15 of the Sequence Control field) 
+		masked to 0. The Fragment Number subfield is not modified. */	 
+	aad_hdr[len] = (*(pHdr + 22)) & 0x0f;   
+	aad_hdr[len + 1] = 0x00;
+	len += 2;
+	
+			
+	/* Append the Addr4 field if present. */ 
+	if (a4_exists)
+	{
+		NdisMoveMemory(&aad_hdr[len], pHdr + 24, MAC_ADDR_LEN);
+		len += MAC_ADDR_LEN;
+	}
+	
+	/*  QC - 
+		QoS Control field, if present, a 2-octet field that includes 
+		the MSDU priority. The QC TID field is used in the 
+		construction of the AAD and the remaining QC fields are 
+		set to 0 for the AAD calculation (bits 4 to 15 are set to 0). */
+	if (qc_exists & a4_exists)
+	{
+		aad_hdr[len] = (*(pHdr + 30)) & 0x0f;   /* Qos_TC*/
+		aad_hdr[len + 1] = 0x00;
+		len += 2;
+	}
+	else if (qc_exists & !a4_exists)
+	{
+		aad_hdr[len] = (*(pHdr + 24)) & 0x0f;   /* Qos_TC*/
+		aad_hdr[len + 1] = 0x00;
+		len += 2;
+	}	
+
+	*aad_len = len;	
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Construct NONCE header of CCMP.
+
+	Arguments:
+		
+	Return Value:
+
+	Note:
+				
+	========================================================================
+*/
+VOID RTMPConstructCCMPNonce(
+	IN 	PUCHAR 			pHdr,
+	IN	UINT8 			a4_exists,
+	IN	UINT8			qc_exists,
+	IN	BOOLEAN			isMgmtFrame,
+	IN	UCHAR			*pn,		
+	OUT	UCHAR			*nonce_hdr,
+	OUT UINT			*nonce_hdr_len)
+{
+	UINT	n_offset = 0;
+	INT		i;
+
+	/* 	Decide the Priority Octet 
+		The Priority sub-field of the Nonce Flags field shall 
+		be set to the fixed value 0 when there is no QC field 
+		present in the MPDU header. When the QC field is present, 
+		bits 0 to 3 of the Priority field shall be set to the 
+		value of the QC TID (bits 0 to 3 of the QC field).*/
+	if (qc_exists && a4_exists) 
+		nonce_hdr[0] = (*(pHdr + 30)) & 0x0f;
+	if (qc_exists && !a4_exists) 
+		nonce_hdr[0] = (*(pHdr + 24)) & 0x0f;
+
+	n_offset += 1;
+
+	/* Fill in MPDU Address A2 field */	
+	NdisMoveMemory(&nonce_hdr[n_offset], pHdr + 10, MAC_ADDR_LEN);
+	n_offset += MAC_ADDR_LEN;
+
+	/* 	Fill in the PN. The PN field occupies octets 7¡V12. 
+		The octets of PN shall be ordered so that PN0 is at octet index 12
+		and PN5 is at octet index 7. */
+ 	for (i = 0; i < 6; i++)
+		nonce_hdr[n_offset + i] = pn[5 - i];
+	n_offset += LEN_PN;
+
+	*nonce_hdr_len = n_offset;
+	
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Construct CCMP header.
+
+	Arguments:
+		
+	Return Value:
+
+	Note:
+		It's a 8-octets header.
+				
+	========================================================================
+*/
+VOID RTMPConstructCCMPHdr(
+	IN	UINT8 			key_idx,
+	IN	UCHAR			*pn,		
+	OUT	UCHAR			*ccmp_hdr)
+{
+	NdisZeroMemory(ccmp_hdr, LEN_CCMP_HDR);
+
+	ccmp_hdr[0] = pn[0];
+	ccmp_hdr[1] = pn[1];
+	ccmp_hdr[3] = (key_idx <<6) | 0x20;	
+	ccmp_hdr[4] = pn[2];
+	ccmp_hdr[5] = pn[3];
+	ccmp_hdr[6] = pn[4];
+	ccmp_hdr[7] = pn[5];
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+
+	Arguments:
+		
+	Return Value:
+
+	Note:
+					
+	========================================================================
+*/
+BOOLEAN RTMPSoftEncryptCCMP(
+	IN 	PRTMP_ADAPTER 	pAd,
+	IN 	PUCHAR			pHdr,
+	IN	PUCHAR			pIV,
+	IN 		PUCHAR			pKey,
+	INOUT 	PUCHAR			pData,
+	IN 	UINT32			DataLen)
+{
+	UINT8			frame_type, frame_subtype;
+	UINT8			from_ds, to_ds;
+	UINT8 			a4_exists, qc_exists;
+	UINT8			aad_hdr[30];
+	UINT			aad_len = 0;
+	UINT8			nonce_hdr[13];	
+	UINT32			nonce_hdr_len = 0;
+	UINT32			out_len = DataLen + 8;
+		
+#ifdef RT_BIG_ENDIAN
+	RTMPFrameEndianChange(pAd, (PUCHAR)pHdr, DIR_READ, FALSE);
+#endif
+
+	/* Initial variable */
+	NdisZeroMemory(aad_hdr, 30);
+	NdisZeroMemory(nonce_hdr, 13);
+
+	/* Indicate type and subtype of Frame Control field */
+	frame_type = (((*pHdr) >> 2) & 0x03);
+	frame_subtype = (((*pHdr) >> 4) & 0x0f);	
+
+	/* Indicate the fromDS and ToDS */
+	from_ds = ((*(pHdr + 1)) & 0x2) >> 1;
+	to_ds = ((*(pHdr + 1)) & 0x1);
+			
+	/* decide if the Address 4 exist or QoS exist */
+	a4_exists = (from_ds & to_ds);
+	qc_exists = ((frame_subtype == SUBTYPE_QDATA) || 
+				 (frame_subtype == SUBTYPE_QDATA_CFACK) ||
+				 (frame_subtype == SUBTYPE_QDATA_CFPOLL) ||
+				 (frame_subtype == SUBTYPE_QDATA_CFACK_CFPOLL));
+
+	/* Construct AAD header */
+	RTMPConstructCCMPAAD(pHdr, 
+						 (frame_type == BTYPE_DATA), 
+						 a4_exists,
+						 qc_exists,
+						 aad_hdr, 
+						 &aad_len);
+
+	/* Construct NONCE header */
+	RTMPConstructCCMPNonce(pHdr, 
+						   a4_exists,
+						   qc_exists,
+						   (frame_type == BTYPE_MGMT), 
+						   pIV, 
+						   nonce_hdr,
+						   &nonce_hdr_len);
+
+	/* CCM originator processing -
+	   Use the temporal key, AAD, nonce, and MPDU data to 
+	   form the cipher text and MIC. */
+	if (AES_CCM_Encrypt(pData, DataLen, 
+					pKey, 16, 
+					nonce_hdr, nonce_hdr_len, 
+					aad_hdr, aad_len, LEN_CCMP_MIC, 
+					pData, &out_len))
+		return FALSE;
+		
+#ifdef RT_BIG_ENDIAN
+	RTMPFrameEndianChange(pAd, (PUCHAR)pHdr, DIR_READ, FALSE);
+#endif
+	
+	return TRUE;
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Decrypt data with CCMP.
+
+	Arguments:
+		
+	Return Value:
+
+	Note:
+		
+	========================================================================
+*/
+BOOLEAN RTMPSoftDecryptCCMP(
+	IN 		PRTMP_ADAPTER 	pAd,
+	IN 		PUCHAR			pHdr,
+	IN 		PCIPHER_KEY		pKey,
+	INOUT 	PUCHAR			pData,
+	INOUT 	UINT16			*DataLen)
+{
+	UINT8			frame_type, frame_subtype;
+	UINT8			from_ds, to_ds;
+	UINT8 			a4_exists, qc_exists;
+	UINT8			aad_hdr[30];
+	UINT			aad_len = 0;
+	UINT8			pn[LEN_PN];	
+	PUCHAR			cipherData_ptr;
+	UINT32			cipherData_len;
+	UINT8			nonce_hdr[13];	
+	UINT32			nonce_hdr_len = 0;	
+	UINT32			out_len = *DataLen;
+
+#ifdef RT_BIG_ENDIAN
+	RTMPFrameEndianChange(pAd, (PUCHAR)pHdr, DIR_READ, FALSE);
+#endif
+
+	/* Check the key is valid */
+	if (pKey->KeyLen == 0)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s : The key is not available !\n", __FUNCTION__));
+		return FALSE;
+	}
+
+	/* Initial variable */
+	NdisZeroMemory(aad_hdr, 30);
+	NdisZeroMemory(nonce_hdr, 13);
+
+	/* Indicate type and subtype of Frame Control field */
+	frame_type = (((*pHdr) >> 2) & 0x03);
+	frame_subtype = (((*pHdr) >> 4) & 0x0f);	
+
+	/* Indicate the fromDS and ToDS */
+	from_ds = ((*(pHdr + 1)) & 0x2) >> 1;
+	to_ds = ((*(pHdr + 1)) & 0x1);
+
+	/* decide if the Address 4 exist or QoS exist */
+	a4_exists = (from_ds & to_ds);
+	qc_exists = ((frame_subtype == SUBTYPE_QDATA) || 
+				 (frame_subtype == SUBTYPE_QDATA_CFACK) ||
+				 (frame_subtype == SUBTYPE_QDATA_CFPOLL) ||
+				 (frame_subtype == SUBTYPE_QDATA_CFACK_CFPOLL));	
+			
+	/* Extract PN and from CCMP header */
+	pn[0] =	pData[0];
+	pn[1] = pData[1];
+	pn[2] = pData[4];
+	pn[3] = pData[5];
+	pn[4] = pData[6];
+	pn[5] = pData[7];
+
+	/* skip ccmp header */
+	cipherData_ptr = pData + LEN_CCMP_HDR;
+	cipherData_len = *DataLen - LEN_CCMP_HDR;
+		
+	/* Construct AAD header */
+	RTMPConstructCCMPAAD(pHdr, 
+						 (frame_type == BTYPE_DATA), 
+						 a4_exists,
+						 qc_exists,
+						 aad_hdr, 
+						 &aad_len);
+
+	/* Construct NONCE header */
+	RTMPConstructCCMPNonce(pHdr, 
+						   a4_exists,
+						   qc_exists,
+						   (frame_type == BTYPE_MGMT), 
+						   pn, 
+						   nonce_hdr,
+						   &nonce_hdr_len);
+	
+	/* CCM recipient processing -
+	   uses the temporal key, AAD, nonce, MIC, 
+	   and MPDU cipher text data */
+	if (AES_CCM_Decrypt(cipherData_ptr, cipherData_len,
+					pKey->Key, 16, 
+					nonce_hdr, nonce_hdr_len, 
+					aad_hdr, aad_len, LEN_CCMP_MIC, 
+					pData, &out_len))
+		return FALSE;
+
+	*DataLen = out_len;
+
+#ifdef RT_BIG_ENDIAN
+	RTMPFrameEndianChange(pAd, (PUCHAR)pHdr, DIR_READ, FALSE);
+#endif
+
+	return TRUE;
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+		CCMP test vector
+
+	Arguments:
+		
+	Return Value:
+
+	Note:		
+					
+	========================================================================
+*/
+VOID CCMP_test_vector(
+	IN 	PRTMP_ADAPTER 	pAd,
+	IN	INT 			input)
+{
+	UINT8 Key_ID = 0;
+	/*UINT8 A1[6] =  {0x0f, 0xd2, 0xe1, 0x28, 0xa5, 0x7c};*/
+	/*UINT8 A2[6] =  {0x50, 0x30, 0xf1, 0x84, 0x44, 0x08};*/
+	/*UINT8 A3[6] =  {0xab, 0xae, 0xa5, 0xb8, 0xfc, 0xba};*/
+	UINT8 TK[16] = {0xc9, 0x7c, 0x1f, 0x67, 0xce, 0x37, 0x11, 0x85, 
+				  	0x51, 0x4a, 0x8a, 0x19, 0xf2, 0xbd, 0xd5, 0x2f};
+	UINT8 PN[6] =  {0x0C, 0xE7, 0x76, 0x97, 0x03, 0xB5};					
+	UINT8 HDR[24]= {0x08, 0x48, 0xc3, 0x2c, 0x0f, 0xd2, 0xe1, 0x28, 
+					0xa5, 0x7c, 0x50, 0x30, 0xf1, 0x84, 0x44, 0x08, 
+					0xab, 0xae, 0xa5, 0xb8, 0xfc, 0xba, 0x80, 0x33};
+	UINT8 AAD[22] = {0x08, 0x40, 0x0f, 0xd2, 0xe1, 0x28, 0xa5, 0x7c, 
+				     0x50, 0x30, 0xf1, 0x84, 0x44, 0x08, 0xab, 0xae, 
+				     0xa5, 0xb8, 0xfc, 0xba, 0x00, 0x00};
+	UINT8 CCMP_HDR[8] = {0x0c, 0xe7, 0x00, 0x20, 0x76, 0x97, 0x03, 0xb5};
+	UINT8 CCM_NONCE[13] = {0x00, 0x50, 0x30, 0xf1, 0x84, 0x44, 0x08, 0xb5, 
+						   0x03, 0x97, 0x76, 0xe7, 0x0c};
+	UINT8 P_TEXT_DATA[20] = {0xf8, 0xba, 0x1a, 0x55, 0xd0, 0x2f, 0x85, 0xae, 
+						     0x96, 0x7b, 0xb6, 0x2f, 0xb6, 0xcd, 0xa8, 0xeb, 
+						     0x7e, 0x78, 0xa0, 0x50};
+	UINT8 C_TEXT_DATA[28] = {0xf3, 0xd0, 0xa2, 0xfe, 0x9a, 0x3d, 0xbf, 0x23,
+							 0x42, 0xa6, 0x43, 0xe4, 0x32, 0x46, 0xe8, 0x0c, 
+							 0x3c, 0x04, 0xd0, 0x19, 0x78, 0x45, 0xce, 0x0b,
+							 0x16, 0xf9, 0x76, 0x23};		
+	UINT8	res_buf[100];
+	UINT	res_len = 0;
+
+	printk("== CCMP test vector == \n");
+
+	/* Check AAD */
+	NdisZeroMemory(res_buf, 100);
+	res_len = 0;
+	RTMPConstructCCMPAAD(HDR, TRUE, 0, 0, res_buf, &res_len);
+	if (res_len == 22 && NdisEqualMemory(res_buf, AAD, res_len))
+		printk("Construct AAD is OK!!!\n");
+	else
+	{
+		printk("\n!!!Construct AAD is FAILURE!!!\n\n");
+		hex_dump("Calculate AAD", res_buf, res_len);
+	}
+	/* Check NONCE */
+	NdisZeroMemory(res_buf, 100);
+	res_len = 0;
+	RTMPConstructCCMPNonce(HDR, 0, 0, FALSE, PN, res_buf, &res_len);
+	if (res_len == 13 && NdisEqualMemory(res_buf, CCM_NONCE, res_len))
+		printk("Construct NONCE is OK!!!\n");
+	else
+	{
+		printk("\n!!!Construct NONCE is FAILURE!!!\n\n");
+		hex_dump("Calculate NONCE", res_buf, res_len);
+	}
+	/* Check CCMP-Header */
+	NdisZeroMemory(res_buf, 100);
+	res_len = 0;
+	RTMPConstructCCMPHdr(Key_ID, PN, res_buf);
+	if (NdisEqualMemory(res_buf, CCMP_HDR, 8))
+		printk("Construct CCMP_HDR is OK!!!\n");
+	else
+	{
+		printk("\n!!!Construct CCMP_HDR is FAILURE!!!\n\n");
+		hex_dump("Calculate CCMP_HDR", res_buf, 8);
+	}
+
+	/* Encrypt action */
+	NdisZeroMemory(res_buf, 100);	
+	NdisMoveMemory(res_buf, P_TEXT_DATA, sizeof(P_TEXT_DATA));
+	res_len = sizeof(C_TEXT_DATA);
+	if (AES_CCM_Encrypt(res_buf, sizeof(P_TEXT_DATA), 
+					TK, sizeof(TK), 
+					CCM_NONCE, sizeof(CCM_NONCE), 
+					AAD, sizeof(AAD), 8, 
+					res_buf, &res_len) == 0)
+	{
+		if (res_len == sizeof(C_TEXT_DATA) && 
+				NdisEqualMemory(res_buf, C_TEXT_DATA, res_len))
+			printk("CCM_Encrypt is OK!!!\n");
+		else
+		{
+			printk("\n!!!CCM_Encrypt is FAILURE!!!\n\n");
+			hex_dump("CCM_Encrypt", res_buf, res_len);
+		}
+	}
+	
+	/* Decrypt action */
+	NdisZeroMemory(res_buf, 100);
+	NdisMoveMemory(res_buf, C_TEXT_DATA, sizeof(C_TEXT_DATA));
+	res_len = sizeof(P_TEXT_DATA);
+	if (AES_CCM_Decrypt(res_buf, sizeof(C_TEXT_DATA), TK, 16, 
+					CCM_NONCE, sizeof(CCM_NONCE), 
+					AAD, sizeof(AAD), 8, 
+					res_buf, &res_len) == 0)
+	{
+		if (res_len == sizeof(P_TEXT_DATA) && 
+				NdisEqualMemory(res_buf, P_TEXT_DATA, res_len))
+			printk("CCM_Decrypt is OK!!!\n");
+		else
+		{
+			printk("\n!!!CCM_Decrypt is FAILURE!!!\n\n");
+			hex_dump("CCM_Decrypt", res_buf, res_len);
+		}
+	}	
+	
+
+	printk("== CCMP test vector == \n");
+
+	}
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_asic.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_asic.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_asic.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_asic.c	2017-09-23 03:42:49.706676017 +0800
@@ -0,0 +1,3430 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+
+
+
+
+
+#ifdef RTMP_INTERNAL_TX_ALC
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+
+/* The Tx power tuning entry */
+
+TX_POWER_TUNING_ENTRY_STRUCT TxPowerTuningTableOver5390[] = 
+{
+/*	idxTxPowerTable		Tx power control over RF		Tx power control over MAC */
+/*	(zero-based array)		{ RF R49[5:0]: Tx0 ALC},		{MAC 0x1314~0x1324} */
+/*     0       */				{0x00,					-15}, 
+/*     1       */ 				{0x01,					-15}, 
+/*     2       */ 				{0x00,					-14}, 
+/*     3       */ 				{0x01,					-14}, 
+/*     4       */ 				{0x00,					-13}, 
+/*     5       */				{0x01,					-13}, 
+/*     6       */ 				{0x00,					-12}, 
+/*     7       */ 				{0x01,					-12}, 
+/*     8       */ 				{0x00,					-11}, 
+/*     9       */ 				{0x01,					-11}, 
+/*     10     */ 				{0x00,					-10}, 
+/*     11     */ 				{0x01,					-10}, 
+/*     12     */ 				{0x00,					-9}, 
+/*     13     */ 				{0x01,					-9}, 
+/*     14     */ 				{0x00,					-8}, 
+/*     15     */ 				{0x01,					-8}, 
+/*     16     */ 				{0x00,					-7}, 
+/*     17     */ 				{0x01,					-7}, 
+/*     18     */ 				{0x00,					-6}, 
+/*     19     */ 				{0x01,					-6}, 
+/*     20     */ 				{0x00,					-5}, 
+/*     21     */ 				{0x01,					-5}, 
+/*     22     */ 				{0x00,					-4}, 
+/*     23     */ 				{0x01,					-4}, 
+/*     24     */ 				{0x00,					-3}, 
+/*     25     */ 				{0x01,					-3}, 
+/*     26     */ 				{0x00,					-2}, 
+/*     27     */ 				{0x01,					-2}, 
+/*     28     */ 				{0x00,					-1}, 
+/*     29     */ 				{0x01,					-1}, 
+/*     30     */ 				{0x00,					0}, 
+/*     31     */ 				{0x01,					0}, 
+/*     32     */ 				{0x02,					0}, 
+/*     33     */ 				{0x03,					0}, 
+/*     34     */ 				{0x04,					0}, 
+/*     35     */ 				{0x05,					0}, 
+/*     36     */ 				{0x06,					0}, 
+/*     37     */ 				{0x07,					0}, 
+/*     38     */ 				{0x08,					0}, 
+/*     39     */ 				{0x09,					0}, 
+/*     40     */ 				{0x0A,					0}, 
+/*     41     */ 				{0x0B,					0}, 
+/*     42     */ 				{0x0C,					0}, 
+/*     43     */ 				{0x0D,					0}, 
+/*     44     */ 				{0x0E,					0}, 
+/*     45     */ 				{0x0F,					0}, 
+/*     46     */ 				{0x0F,					0}, 
+/*     47     */ 				{0x10,					0}, 
+/*     48     */ 				{0x11,					0}, 
+/*     49     */ 				{0x12,					0}, 
+/*     50     */ 				{0x13,					0}, 
+/*     51     */ 				{0x14,					0}, 
+/*     52     */ 				{0x15,					0}, 
+/*     53     */ 				{0x16,					0}, 
+/*     54     */ 				{0x17,					0}, 
+/*     55     */ 				{0x18,					0}, 
+/*     56     */ 				{0x19,					0}, 
+/*     57     */ 				{0x1A,					0}, 
+/*     58     */ 				{0x1B,					0}, 
+/*     59     */ 				{0x1C,					0}, 
+/*     60     */ 				{0x1D,					0}, 
+/*     61     */ 				{0x1E,					0}, 
+/*     62     */ 				{0x1F,					0}, 
+/*     63     */                                 	{0x20,                                       0}, 
+/*     64     */                                 	{0x21,                                       0}, 
+/*     65     */                                 	{0x22,                                       0}, 
+/*     66     */                                 	{0x23,                                       0}, 
+/*     67     */                                 	{0x24,                                       0}, 
+/*     68     */                                 	{0x25,                                       0}, 
+/*     69     */                                 	{0x26,                                       0}, 
+/*     70     */                                 	{0x27,                                       0}, 
+/*     71     */                                 	{0x27-1,                                   1}, 
+/*     72     */                                 	{0x27,                                       1}, 
+/*     73     */                                 	{0x27-1,                                   2}, 
+/*     74     */                                 	{0x27,                                       2}, 
+/*     75     */                                 	{0x27-1,                                   3}, 
+/*     76     */                       		{0x27,                                       3}, 
+/*     77     */                       		{0x27-1,                                   4}, 
+/*     78     */                       		{0x27,                                       4}, 
+/*     79     */                       		{0x27-1,                                   5}, 
+/*     80     */                       		{0x27,                                       5}, 
+/*     81     */                       		{0x27-1,                                   6}, 
+/*     82     */                       		{0x27,                                       6}, 
+/*     83     */                       		{0x27-1,                                   7}, 
+/*     84     */                       		{0x27,                                       7}, 
+/*     85     */                       		{0x27-1,                                   8}, 
+/*     86     */                       		{0x27,                                       8}, 
+/*     87     */                       		{0x27-1,                                   9}, 
+/*     88     */                       		{0x27,                                       9}, 
+/*     89     */                       		{0x27-1,                                   10}, 
+/*     90     */                       		{0x27,                                       10}, 
+/*     91     */                       		{0x27-1,                                   11}, 
+/*     92     */                       		{0x27,                                       11}, 
+/*     93     */                       		{0x27-1,                                   12}, 
+/*     94     */                       		{0x27,                                       12}, 
+/*     95     */                      		{0x27-1,                                   13}, 
+/*     96     */                       		{0x27,                                       13}, 
+/*     97     */                       		{0x27-1,                                   14}, 
+/*     98     */                       		{0x27,                                       14}, 
+/*     99     */                       		{0x27-1,                                   15}, 
+/*     100   */                        		{0x27,                                       15}, 
+};
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+
+
+/* The Tx power tuning entry*/
+TX_POWER_TUNING_ENTRY_STRUCT TxPowerTuningTableOrg[] = 
+{
+/*	idxTxPowerTable		Tx power control over RF		Tx power control over MAC*/
+/*	(zero-based array)		{ RF R12[4:0]: Tx0 ALC},		{MAC 0x1314~0x1324}*/
+/*	0	*/				{0x00, 							-15}, 
+/*	1	*/				{0x01, 							-15}, 
+/*	2	*/				{0x00, 							-14}, 
+/*	3	*/				{0x01, 							-14}, 
+/*	4	*/				{0x00, 							-13}, 
+/*	5	*/				{0x01, 							-13}, 
+/*	6	*/				{0x00, 							-12}, 
+/*	7	*/				{0x01, 							-12}, 
+/*	8	*/				{0x00, 							-11}, 
+/*	9	*/				{0x01, 							-11}, 
+/*	10	*/				{0x00, 							-10}, 
+/*	11	*/				{0x01, 							-10}, 
+/*	12	*/				{0x00, 							-9}, 
+/*	13	*/				{0x01, 							-9}, 
+/*	14	*/				{0x00, 							-8}, 
+/*	15	*/				{0x01, 							-8}, 
+/*	16	*/				{0x00, 							-7}, 
+/*	17	*/				{0x01, 							-7}, 
+/*	18	*/				{0x00, 							-6}, 
+/*	19	*/				{0x01, 							-6}, 
+/*	20	*/				{0x00, 							-5}, 
+/*	21	*/				{0x01, 							-5}, 
+/*	22	*/				{0x00, 							-4}, 
+/*	23	*/				{0x01, 							-4}, 
+/*	24	*/				{0x00, 							-3}, 
+/*	25	*/				{0x01, 							-3}, 
+/*	26	*/				{0x00,							-2}, 
+/*	27	*/				{0x01, 							-2}, 
+/*	28	*/				{0x00, 							-1}, 
+/*	29	*/				{0x01, 							-1}, 
+/*	30	*/				{0x00,							0}, 
+/*	31	*/				{0x01,							0}, 
+/*	32	*/				{0x02,							0}, 
+/*	33	*/				{0x03,							0}, 
+/*	34	*/				{0x04,							0}, 
+/*	35	*/				{0x05,							0}, 
+/*	36	*/				{0x06,							0}, 
+/*	37	*/				{0x07,							0}, 
+/*	38	*/				{0x08,							0}, 
+/*	39	*/				{0x09,							0}, 
+/*	40	*/				{0x0A,							0}, 
+/*	41	*/				{0x0B,							0}, 
+/*	42	*/				{0x0C,							0}, 
+/*	43	*/				{0x0D,							0}, 
+/*	44	*/				{0x0E,							0}, 
+/*	45	*/				{0x0F,							0}, 
+/*	46	*/				{0x0F-1,							1}, 
+/*	47	*/				{0x0F,							1}, 
+/*	48	*/				{0x0F-1,							2}, 
+/*	49	*/				{0x0F,							2}, 
+/*	50	*/				{0x0F-1,							3}, 
+/*	51	*/				{0x0F,							3}, 
+/*	52	*/				{0x0F-1,							4}, 
+/*	53	*/				{0x0F,							4}, 
+/*	54	*/				{0x0F-1,							5}, 
+/*	55	*/				{0x0F,							5}, 
+/*	56	*/				{0x0F-1,							6}, 
+/*	57	*/				{0x0F,							6}, 
+/*	58	*/				{0x0F-1,							7}, 
+/*	59	*/				{0x0F,							7}, 
+/*	60	*/				{0x0F-1,							8}, 
+/*	61	*/				{0x0F,							8}, 
+/*	62	*/				{0x0F-1,							9}, 
+/*	63	*/				{0x0F,							9}, 
+/*	64	*/				{0x0F-1,							10}, 
+/*	65	*/				{0x0F,							10}, 
+/*	66	*/				{0x0F-1,							11}, 
+/*	67	*/				{0x0F,							11}, 
+/*	68	*/				{0x0F-1,							12}, 
+/*	69	*/				{0x0F,							12}, 
+/*	70	*/				{0x0F-1,							13}, 
+/*	71	*/				{0x0F,							13}, 
+/*	72	*/				{0x0F-1,							14}, 
+/*	73	*/				{0x0F,							14}, 
+/*	74	*/				{0x0F-1,							15}, 
+/*	75	*/				{0x0F,							15}, 
+};
+
+TX_POWER_TUNING_ENTRY_STRUCT *TxPowerTuningTable = TxPowerTuningTableOrg;
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+#ifdef CONFIG_STA_SUPPORT
+VOID AsicUpdateAutoFallBackTable(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PUCHAR			pRateTable)
+{
+	UCHAR					i;
+	HT_FBK_CFG0_STRUC		HtCfg0;
+	HT_FBK_CFG1_STRUC		HtCfg1;
+	LG_FBK_CFG0_STRUC		LgCfg0;
+	LG_FBK_CFG1_STRUC		LgCfg1;
+/*#ifdef DOT11N_SS3_SUPPORT*/
+	PRTMP_TX_RATE_SWITCH	pCurrTxRate, pNextTxRate;
+
+#ifdef AGS_SUPPORT
+	PRTMP_TX_RATE_SWITCH_AGS	pCurrTxRate_AGS, pNextTxRate_AGS;	
+	HT_FBK_3SS_CFG0_STRUC	Ht3SSCfg0;
+	HT_FBK_3SS_CFG1_STRUC	Ht3SSCfg1;
+	BOOLEAN					bUseAGS = FALSE;
+
+	if (AGS_IS_USING(pAd, pRateTable))
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("%s: Use AGS\n", __FUNCTION__));
+		
+		bUseAGS = TRUE;
+	}
+
+	Ht3SSCfg0.word = 0x1211100f;
+	Ht3SSCfg1.word = 0x16151413;	
+#endif /* AGS_SUPPORT */
+
+	/* set to initial value*/
+	HtCfg0.word = 0x65432100;
+	HtCfg1.word = 0xedcba980;
+	LgCfg0.word = 0xedcba988;
+	LgCfg1.word = 0x00002100;
+/*#ifdef DOT11N_SS3_SUPPORT*/
+
+#ifdef AGS_SUPPORT
+	if (bUseAGS)
+	{
+		pNextTxRate_AGS = (PRTMP_TX_RATE_SWITCH_AGS)pRateTable+1;
+		pNextTxRate = (PRTMP_TX_RATE_SWITCH)pNextTxRate_AGS;
+	}
+	else
+#endif /* AGS_SUPPORT */
+	pNextTxRate = (PRTMP_TX_RATE_SWITCH)pRateTable+1;
+
+	for (i = 1; i < *((PUCHAR) pRateTable); i++)
+	{
+#ifdef AGS_SUPPORT
+		if (bUseAGS)
+		{
+			pCurrTxRate_AGS = (PRTMP_TX_RATE_SWITCH_AGS)pRateTable+1+i;
+			pCurrTxRate = (PRTMP_TX_RATE_SWITCH)pCurrTxRate_AGS;
+		}
+		else
+#endif /* AGS_SUPPORT */
+		pCurrTxRate = (PRTMP_TX_RATE_SWITCH)pRateTable+1+i;
+
+		switch (pCurrTxRate->Mode)
+		{
+			case 0:		/*CCK*/
+				break;
+			case 1:		/*OFDM*/
+				{
+					switch(pCurrTxRate->CurrMCS)
+					{
+						case 0:
+							LgCfg0.field.OFDMMCS0FBK = (pNextTxRate->Mode == MODE_OFDM) ? (pNextTxRate->CurrMCS+8): pNextTxRate->CurrMCS;
+							break;
+						case 1:
+							LgCfg0.field.OFDMMCS1FBK = (pNextTxRate->Mode == MODE_OFDM) ? (pNextTxRate->CurrMCS+8): pNextTxRate->CurrMCS;
+							break;
+						case 2:
+							LgCfg0.field.OFDMMCS2FBK = (pNextTxRate->Mode == MODE_OFDM) ? (pNextTxRate->CurrMCS+8): pNextTxRate->CurrMCS;
+							break;
+						case 3:
+							LgCfg0.field.OFDMMCS3FBK = (pNextTxRate->Mode == MODE_OFDM) ? (pNextTxRate->CurrMCS+8): pNextTxRate->CurrMCS;
+							break;
+						case 4:
+							LgCfg0.field.OFDMMCS4FBK = (pNextTxRate->Mode == MODE_OFDM) ? (pNextTxRate->CurrMCS+8): pNextTxRate->CurrMCS;
+							break;
+						case 5:
+							LgCfg0.field.OFDMMCS5FBK = (pNextTxRate->Mode == MODE_OFDM) ? (pNextTxRate->CurrMCS+8): pNextTxRate->CurrMCS;
+							break;
+						case 6:
+							LgCfg0.field.OFDMMCS6FBK = (pNextTxRate->Mode == MODE_OFDM) ? (pNextTxRate->CurrMCS+8): pNextTxRate->CurrMCS;
+							break;
+						case 7:
+							LgCfg0.field.OFDMMCS7FBK = (pNextTxRate->Mode == MODE_OFDM) ? (pNextTxRate->CurrMCS+8): pNextTxRate->CurrMCS;
+							break;
+					}
+				}
+				break;
+#ifdef DOT11_N_SUPPORT
+			case 2:		/*HT-MIX*/
+			case 3:		/*HT-GF*/
+				{
+					if ((pNextTxRate->Mode >= MODE_HTMIX) && (pCurrTxRate->CurrMCS != pNextTxRate->CurrMCS))
+					{
+						switch(pCurrTxRate->CurrMCS)
+						{
+							case 0:
+								HtCfg0.field.HTMCS0FBK = pNextTxRate->CurrMCS;
+								break;
+							case 1:
+								HtCfg0.field.HTMCS1FBK = pNextTxRate->CurrMCS;
+								break;
+							case 2:
+								HtCfg0.field.HTMCS2FBK = pNextTxRate->CurrMCS;
+								break;
+							case 3:
+								HtCfg0.field.HTMCS3FBK = pNextTxRate->CurrMCS;
+								break;
+							case 4:
+								HtCfg0.field.HTMCS4FBK = pNextTxRate->CurrMCS;
+								break;
+							case 5:
+								HtCfg0.field.HTMCS5FBK = pNextTxRate->CurrMCS;
+								break;
+							case 6:
+								HtCfg0.field.HTMCS6FBK = pNextTxRate->CurrMCS;
+								break;
+							case 7:
+								HtCfg0.field.HTMCS7FBK = pNextTxRate->CurrMCS;
+								break;
+							case 8:
+								HtCfg1.field.HTMCS8FBK = pNextTxRate->CurrMCS;
+								break;
+							case 9:
+								HtCfg1.field.HTMCS9FBK = pNextTxRate->CurrMCS;
+								break;
+							case 10:
+								HtCfg1.field.HTMCS10FBK = pNextTxRate->CurrMCS;
+								break;
+							case 11:
+								HtCfg1.field.HTMCS11FBK = pNextTxRate->CurrMCS;
+								break;
+							case 12:
+								HtCfg1.field.HTMCS12FBK = pNextTxRate->CurrMCS;
+								break;
+							case 13:
+								HtCfg1.field.HTMCS13FBK = pNextTxRate->CurrMCS;
+								break;
+							case 14:
+								HtCfg1.field.HTMCS14FBK = pNextTxRate->CurrMCS;
+								break;
+							case 15:
+								HtCfg1.field.HTMCS15FBK = pNextTxRate->CurrMCS;
+								break;
+/*#ifdef DOT11N_SS3_SUPPORT*/
+#ifdef AGS_SUPPORT
+							case 16:
+								Ht3SSCfg0.field.HTMCS16FBK = pNextTxRate->CurrMCS;
+								break;
+							case 17:
+								Ht3SSCfg0.field.HTMCS17FBK = pNextTxRate->CurrMCS;
+								break;
+							case 18:
+								Ht3SSCfg0.field.HTMCS18FBK = pNextTxRate->CurrMCS;
+								break;
+							case 19:
+								Ht3SSCfg0.field.HTMCS19FBK = pNextTxRate->CurrMCS;
+								break;
+							case 20:
+								Ht3SSCfg1.field.HTMCS20FBK = pNextTxRate->CurrMCS;
+								break;
+							case 21:
+								Ht3SSCfg1.field.HTMCS21FBK = pNextTxRate->CurrMCS;
+								break;
+							case 22:
+								Ht3SSCfg1.field.HTMCS22FBK = pNextTxRate->CurrMCS;
+								break;
+							case 23:
+								Ht3SSCfg1.field.HTMCS23FBK = pNextTxRate->CurrMCS;
+								break;
+#endif /* AGS_SUPPORT */									
+							default:
+								DBGPRINT(RT_DEBUG_ERROR, ("AsicUpdateAutoFallBackTable: not support CurrMCS=%d\n", pCurrTxRate->CurrMCS));
+						}
+					}
+				}
+				break;
+#endif /* DOT11_N_SUPPORT */
+		}
+
+		pNextTxRate = pCurrTxRate;
+	}
+
+#ifdef AGS_SUPPORT
+	if (bUseAGS == TRUE)
+	{
+		Ht3SSCfg0.field.HTMCS16FBK = 0x8; // MCS 16 -> MCS 8
+		HtCfg1.field.HTMCS8FBK = 0x0; // MCS 8 -> MCS 0
+
+		LgCfg0.field.OFDMMCS2FBK = 0x3; // OFDM 12 -> CCK 11
+		LgCfg0.field.OFDMMCS1FBK = 0x2; // OFDM 9 -> CCK 5.5
+		LgCfg0.field.OFDMMCS0FBK = 0x2; // OFDM 6 -> CCK 5.5
+	}
+#endif /* AGS_SUPPORT */
+
+	RTMP_IO_WRITE32(pAd, HT_FBK_CFG0, HtCfg0.word);
+	RTMP_IO_WRITE32(pAd, HT_FBK_CFG1, HtCfg1.word);
+	RTMP_IO_WRITE32(pAd, LG_FBK_CFG0, LgCfg0.word);
+	RTMP_IO_WRITE32(pAd, LG_FBK_CFG1, LgCfg1.word);
+
+#ifdef AGS_SUPPORT
+	if(bUseAGS == TRUE)
+	{
+		RTMP_IO_WRITE32(pAd, HT_FBK_3SS_CFG0, Ht3SSCfg0.word);
+		RTMP_IO_WRITE32(pAd, HT_FBK_3SS_CFG1, Ht3SSCfg1.word);
+		DBGPRINT(RT_DEBUG_TRACE, ("AsicUpdateAutoFallBackTable: Ht3SSCfg0=0x%x, Ht3SSCfg1=0x%x\n", Ht3SSCfg0.word, Ht3SSCfg1.word));
+	}
+#endif /* AGS_SUPPORT */
+
+/*#ifdef DOT11N_SS3_SUPPORT*/
+}
+#endif /* CONFIG_STA_SUPPORT */
+
+/*
+	========================================================================
+
+	Routine Description:
+		Set MAC register value according operation mode.
+		OperationMode AND bNonGFExist are for MM and GF Proteciton.
+		If MM or GF mask is not set, those passing argument doesn't not take effect.
+		
+		Operation mode meaning:
+		= 0 : Pure HT, no preotection.
+		= 0x01; there may be non-HT devices in both the control and extension channel, protection is optional in BSS.
+		= 0x10: No Transmission in 40M is protected.
+		= 0x11: Transmission in both 40M and 20M shall be protected
+		if (bNonGFExist)
+			we should choose not to use GF. But still set correct ASIC registers.
+	========================================================================
+*/
+VOID 	AsicUpdateProtect(
+	IN		PRTMP_ADAPTER	pAd,
+	IN 		USHORT			OperationMode,
+	IN 		UCHAR			SetMask,
+	IN		BOOLEAN			bDisableBGProtect,
+	IN		BOOLEAN			bNonGFExist)	
+{
+	PROT_CFG_STRUC	ProtCfg, ProtCfg4;
+	UINT32 Protect[6];
+	USHORT			offset;
+	UCHAR			i;
+	UINT32 MacReg = 0;
+
+#ifdef RALINK_ATE
+	if (ATE_ON(pAd))
+		return;
+#endif /* RALINK_ATE */
+
+#ifdef DOT11_N_SUPPORT
+	if (!(pAd->CommonCfg.bHTProtect) && (OperationMode != 8))
+	{
+		return;
+	}
+
+	if (pAd->BATable.numDoneOriginator)
+	{
+		/* */
+		/* enable the RTS/CTS to avoid channel collision*/
+		/* */
+		SetMask |= ALLN_SETPROTECT;
+		OperationMode = 8;
+	}
+#endif /* DOT11_N_SUPPORT */
+
+	/* Config ASIC RTS threshold register*/
+	RTMP_IO_READ32(pAd, TX_RTS_CFG, &MacReg);
+	MacReg &= 0xFF0000FF;
+	/* If the user want disable RtsThreshold and enbale Amsdu/Ralink-Aggregation, set the RtsThreshold as 4096*/
+        if ((
+#ifdef DOT11_N_SUPPORT
+			(pAd->CommonCfg.BACapability.field.AmsduEnable) || 
+#endif /* DOT11_N_SUPPORT */
+			(pAd->CommonCfg.bAggregationCapable == TRUE))
+            && pAd->CommonCfg.RtsThreshold == MAX_RTS_THRESHOLD)
+        {
+			MacReg |= (0x1000 << 8);
+        }
+        else
+        {
+			MacReg |= (pAd->CommonCfg.RtsThreshold << 8);
+        }
+
+	RTMP_IO_WRITE32(pAd, TX_RTS_CFG, MacReg);
+
+	/* Initial common protection settings*/
+	RTMPZeroMemory(Protect, sizeof(Protect));
+	ProtCfg4.word = 0;
+	ProtCfg.word = 0;
+	ProtCfg.field.TxopAllowGF40 = 1;
+	ProtCfg.field.TxopAllowGF20 = 1;
+	ProtCfg.field.TxopAllowMM40 = 1;
+	ProtCfg.field.TxopAllowMM20 = 1;
+	ProtCfg.field.TxopAllowOfdm = 1;
+	ProtCfg.field.TxopAllowCck = 1;
+	ProtCfg.field.RTSThEn = 1;
+	ProtCfg.field.ProtectNav = ASIC_SHORTNAV;
+
+	/* update PHY mode and rate*/
+	if (pAd->OpMode == OPMODE_AP)
+	{
+		/* update PHY mode and rate*/
+		if (pAd->CommonCfg.Channel > 14)
+			ProtCfg.field.ProtectRate = 0x4000;
+		ProtCfg.field.ProtectRate |= pAd->CommonCfg.RtsRate;	
+	}
+	else if (pAd->OpMode == OPMODE_STA)
+	{
+		// Decide Protect Rate for Legacy packet
+		if (pAd->CommonCfg.Channel > 14)
+		{
+			ProtCfg.field.ProtectRate = 0x4000; // OFDM 6Mbps
+		}
+		else 
+		{
+			ProtCfg.field.ProtectRate = 0x0000; // CCK 1Mbps
+			if (pAd->CommonCfg.MinTxRate > RATE_11)
+				ProtCfg.field.ProtectRate |= 0x4000; // OFDM 6Mbps
+		}
+	}
+
+	/* Handle legacy(B/G) protection*/
+	if (bDisableBGProtect)
+	{
+		/*ProtCfg.field.ProtectRate = pAd->CommonCfg.RtsRate;*/
+		ProtCfg.field.ProtectCtrl = 0;
+		Protect[0] = ProtCfg.word;
+		Protect[1] = ProtCfg.word;
+		pAd->FlgCtsEnabled = 0; /* CTS-self is not used */
+	}
+	else
+	{
+		/*ProtCfg.field.ProtectRate = pAd->CommonCfg.RtsRate;*/
+		ProtCfg.field.ProtectCtrl = 0;			/* CCK do not need to be protected*/
+		Protect[0] = ProtCfg.word;
+		ProtCfg.field.ProtectCtrl = ASIC_CTS;	/* OFDM needs using CCK to protect*/
+		Protect[1] = ProtCfg.word;
+		pAd->FlgCtsEnabled = 1; /* CTS-self is used */
+	}
+
+#ifdef DOT11_N_SUPPORT
+	/* Decide HT frame protection.*/
+	if ((SetMask & ALLN_SETPROTECT) != 0)
+	{
+		switch(OperationMode)
+		{
+			case 0x0:
+				/* NO PROTECT */
+				/* 1.All STAs in the BSS are 20/40 MHz HT*/
+				/* 2. in ai 20/40MHz BSS*/
+				/* 3. all STAs are 20MHz in a 20MHz BSS*/
+				/* Pure HT. no protection.*/
+
+				/* MM20_PROT_CFG*/
+				/*	Reserved (31:27)*/
+				/* 	PROT_TXOP(25:20) -- 010111*/
+				/*	PROT_NAV(19:18)  -- 01 (Short NAV protection)*/
+				/*  PROT_CTRL(17:16) -- 00 (None)*/
+				/* 	PROT_RATE(15:0)  -- 0x4004 (OFDM 24M)*/
+				Protect[2] = 0x01744004;	
+
+				/* MM40_PROT_CFG*/
+				/*	Reserved (31:27)*/
+				/* 	PROT_TXOP(25:20) -- 111111*/
+				/*	PROT_NAV(19:18)  -- 01 (Short NAV protection)*/
+				/*  PROT_CTRL(17:16) -- 00 (None) */
+				/* 	PROT_RATE(15:0)  -- 0x4084 (duplicate OFDM 24M)*/
+				Protect[3] = 0x03f44084;
+
+				/* CF20_PROT_CFG*/
+				/*	Reserved (31:27)*/
+				/* 	PROT_TXOP(25:20) -- 010111*/
+				/*	PROT_NAV(19:18)  -- 01 (Short NAV protection)*/
+				/*  PROT_CTRL(17:16) -- 00 (None)*/
+				/* 	PROT_RATE(15:0)  -- 0x4004 (OFDM 24M)*/
+				Protect[4] = 0x01744004;
+
+				/* CF40_PROT_CFG*/
+				/*	Reserved (31:27)*/
+				/* 	PROT_TXOP(25:20) -- 111111*/
+				/*	PROT_NAV(19:18)  -- 01 (Short NAV protection)*/
+				/*  PROT_CTRL(17:16) -- 00 (None)*/
+				/* 	PROT_RATE(15:0)  -- 0x4084 (duplicate OFDM 24M)*/
+				Protect[5] = 0x03f44084;
+
+				if (bNonGFExist)
+				{
+					/* PROT_NAV(19:18)  -- 01 (Short NAV protectiion)*/
+					/* PROT_CTRL(17:16) -- 01 (RTS/CTS)*/
+					Protect[4] = 0x01754004;
+					Protect[5] = 0x03f54084;
+				}
+				pAd->CommonCfg.IOTestParm.bRTSLongProtOn = FALSE;
+				break;
+				
+ 			case 1:
+				/* This is "HT non-member protection mode."*/
+				/* If there may be non-HT STAs my BSS*/
+				ProtCfg.word = 0x01744004;	/* PROT_CTRL(17:16) : 0 (None)*/
+				ProtCfg4.word = 0x03f44084; /* duplicaet legacy 24M. BW set 1.*/
+				if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_BG_PROTECTION_INUSED))
+				{
+					ProtCfg.word = 0x01740003;	/*ERP use Protection bit is set, use protection rate at Clause 18..*/
+					ProtCfg4.word = 0x03f40003; /* Don't duplicate RTS/CTS in CCK mode. 0x03f40083; */
+				}
+				/*Assign Protection method for 20&40 MHz packets*/
+				ProtCfg.field.ProtectCtrl = ASIC_RTS;
+				ProtCfg.field.ProtectNav = ASIC_SHORTNAV;
+				ProtCfg4.field.ProtectCtrl = ASIC_RTS;
+				ProtCfg4.field.ProtectNav = ASIC_SHORTNAV;
+				Protect[2] = ProtCfg.word;
+				Protect[3] = ProtCfg4.word;
+				Protect[4] = ProtCfg.word;
+				Protect[5] = ProtCfg4.word;
+				pAd->CommonCfg.IOTestParm.bRTSLongProtOn = TRUE;
+				break;
+				
+			case 2:
+				/* If only HT STAs are in BSS. at least one is 20MHz. Only protect 40MHz packets*/
+				ProtCfg.word = 0x01744004;  /* PROT_CTRL(17:16) : 0 (None)*/
+				ProtCfg4.word = 0x03f44084; /* duplicaet legacy 24M. BW set 1.*/
+				if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_BG_PROTECTION_INUSED))
+				{
+					ProtCfg.word = 0x01740003;	/*ERP use Protection bit is set, use protection rate at Clause 18..*/
+					ProtCfg4.word = 0x03f40003; /* Don't duplicate RTS/CTS in CCK mode. 0x03f40083; */
+				} 
+				/*Assign Protection method for 40MHz packets*/
+				ProtCfg4.field.ProtectCtrl = ASIC_RTS;
+				ProtCfg4.field.ProtectNav = ASIC_SHORTNAV;
+				Protect[2] = ProtCfg.word;
+				Protect[3] = ProtCfg4.word;
+				if (bNonGFExist)
+				{
+					ProtCfg.field.ProtectCtrl = ASIC_RTS;
+					ProtCfg.field.ProtectNav = ASIC_SHORTNAV;
+				}
+				Protect[4] = ProtCfg.word;
+				Protect[5] = ProtCfg4.word;
+
+				pAd->CommonCfg.IOTestParm.bRTSLongProtOn = FALSE;
+				break;
+				
+			case 3:
+				/* HT mixed mode.	 PROTECT ALL!*/
+				/* Assign Rate*/
+				ProtCfg.word = 0x01744004;	/*duplicaet legacy 24M. BW set 1.*/
+				ProtCfg4.word = 0x03f44084;
+				/* both 20MHz and 40MHz are protected. Whether use RTS or CTS-to-self depends on the*/
+				if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_BG_PROTECTION_INUSED))
+				{
+					ProtCfg.word = 0x01740003;	/*ERP use Protection bit is set, use protection rate at Clause 18..*/
+					ProtCfg4.word = 0x03f40003; /* Don't duplicate RTS/CTS in CCK mode. 0x03f40083*/
+				}
+				/*Assign Protection method for 20&40 MHz packets*/
+				ProtCfg.field.ProtectCtrl = ASIC_RTS;
+				ProtCfg.field.ProtectNav = ASIC_SHORTNAV;
+				ProtCfg4.field.ProtectCtrl = ASIC_RTS;
+				ProtCfg4.field.ProtectNav = ASIC_SHORTNAV;
+				Protect[2] = ProtCfg.word;
+				Protect[3] = ProtCfg4.word;
+				Protect[4] = ProtCfg.word;
+				Protect[5] = ProtCfg4.word;
+				pAd->CommonCfg.IOTestParm.bRTSLongProtOn = TRUE;
+				break;	
+				
+			case 8:
+				/* Special on for Atheros problem n chip.*/
+				ProtCfg.word = 0x01754004;	/*duplicaet legacy 24M. BW set 1.*/
+				ProtCfg4.word = 0x03f54084;
+				if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_BG_PROTECTION_INUSED))
+				{
+					ProtCfg.word = 0x01750003;	/*ERP use Protection bit is set, use protection rate at Clause 18..*/
+					ProtCfg4.word = 0x03f50003; /* Don't duplicate RTS/CTS in CCK mode. 0x03f40083*/
+				}
+				
+				Protect[2] = ProtCfg.word; 	/*0x01754004;*/
+				Protect[3] = ProtCfg4.word; /*0x03f54084;*/
+				Protect[4] = ProtCfg.word; 	/*0x01754004;*/
+				Protect[5] = ProtCfg4.word; /*0x03f54084;*/
+				pAd->CommonCfg.IOTestParm.bRTSLongProtOn = TRUE;
+				break;		
+		}
+	}
+#endif /* DOT11_N_SUPPORT */
+	
+	offset = CCK_PROT_CFG;
+	for (i = 0;i < 6;i++)
+	{
+			if ((SetMask & (1<< i)))
+		{
+		RTMP_IO_WRITE32(pAd, offset + i*4, Protect[i]);
+	}
+}
+}
+
+
+VOID AsicBBPAdjust(RTMP_ADAPTER *pAd)
+{
+	RTMP_CHIP_ASIC_BBP_ADJUST(pAd);
+
+}
+
+	
+/*
+	==========================================================================
+	Description:
+
+	IRQL = PASSIVE_LEVEL
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+ */
+VOID AsicSwitchChannel(
+					  IN PRTMP_ADAPTER pAd, 
+	IN	UCHAR			Channel,
+	IN	BOOLEAN			bScan) 
+{
+#ifdef DOT11N_SS3_SUPPORT
+
+#endif /* DOT11N_SS3_SUPPORT */
+
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef CONFIG_PM
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND
+	POS_COOKIE  pObj = (POS_COOKIE) pAd->OS_Cookie;
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */
+#endif /* CONFIG_PM */
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef CONFIG_PM
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND
+
+		if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_CPU_SUSPEND))
+		{
+			if( (RTMP_Usb_AutoPM_Get_Interface(pObj->pUsb_Dev,pObj->intf)) == 1)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("AsicSwitchChannel: autopm_resume success\n"));
+				RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_SUSPEND);
+			}
+			else if ((RTMP_Usb_AutoPM_Get_Interface(pObj->pUsb_Dev,pObj->intf)) == (-1))
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("AsicSwitchChannel autopm_resume fail ------\n"));
+				RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_SUSPEND);
+				return;
+			}
+			else
+				DBGPRINT(RT_DEBUG_TRACE, ("AsicSwitchChannel: autopm_resume do nothing \n"));
+
+		}
+		else
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("AsicSwitchChannel: fRTMP_ADAPTER_CPU_SUSPEND\n"));
+			return;
+		}
+
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */
+#endif /* CONFIG_PM */
+#endif /* CONFIG_STA_SUPPORT */
+
+
+
+	RTMP_CHIP_ASIC_SWITCH_CHANNEL(pAd, Channel, bScan);
+
+}
+
+/*
+	==========================================================================
+	Description:
+		This function is required for 2421 only, and should not be used during
+		site survey. It's only required after NIC decided to stay at a channel
+		for a longer period.
+		When this function is called, it's always after AsicSwitchChannel().
+
+	IRQL = PASSIVE_LEVEL
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+ */
+VOID AsicLockChannel(
+	IN PRTMP_ADAPTER pAd, 
+	IN UCHAR Channel) 
+{
+}
+
+/*
+	==========================================================================
+	Description:
+
+	IRQL = PASSIVE_LEVEL
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+ */
+#ifdef ANT_DIVERSITY_SUPPORT
+VOID	AsicAntennaSelect(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			Channel) 
+{
+
+#ifdef CONFIG_STA_SUPPORT
+	if(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF))
+		return;
+
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	if (pAd->Mlme.OneSecPeriodicRound % 2 == 1)
+#endif /* CONFIG_STA_SUPPORT */
+	{
+		/* patch for AsicSetRxAnt failed*/
+		pAd->RxAnt.EvaluatePeriod = 0;
+
+		/* check every 2 second. If rcv-beacon less than 5 in the past 2 second, then AvgRSSI is no longer a */
+		/* valid indication of the distance between this AP and its clients.*/
+		if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED)  ||
+			OPSTATUS_TEST_FLAG(pAd, fOP_AP_STATUS_MEDIA_STATE_CONNECTED)) 
+		{
+			SHORT	realavgrssi1;
+
+			/* if no traffic then reset average rssi to trigger evaluation*/
+#ifdef CONFIG_STA_SUPPORT
+			if (pAd->StaCfg.NumOfAvgRssiSample < 5)
+			{
+				pAd->RxAnt.Pair1LastAvgRssi = (-99);
+				pAd->RxAnt.Pair2LastAvgRssi = (-99);
+				DBGPRINT(RT_DEBUG_TRACE, ("MlmePeriodicExec: no traffic/beacon, reset RSSI\n"));
+			}
+
+			pAd->StaCfg.NumOfAvgRssiSample = 0;
+			realavgrssi1 = (pAd->RxAnt.Pair1AvgRssi[pAd->RxAnt.Pair1PrimaryRxAnt] >> 3);
+#endif /* CONFIG_STA_SUPPORT */
+
+			DBGPRINT(RT_DEBUG_TRACE,("Ant-realrssi0(%d), Lastrssi0(%d), EvaluateStableCnt=%d\n", realavgrssi1, pAd->RxAnt.Pair1LastAvgRssi, pAd->RxAnt.EvaluateStableCnt));
+
+			/* if the difference between two rssi is larger or less than 5, then evaluate the other antenna*/
+			if ((pAd->RxAnt.EvaluateStableCnt < 2) || (realavgrssi1 > (pAd->RxAnt.Pair1LastAvgRssi + 5)) || (realavgrssi1 < (pAd->RxAnt.Pair1LastAvgRssi - 5)))
+				AsicEvaluateRxAnt(pAd);
+
+				pAd->RxAnt.Pair1LastAvgRssi = realavgrssi1;
+		}
+		else
+		{
+			/* if not connected, always switch antenna to try to connect*/
+			UCHAR	temp;
+
+			temp = pAd->RxAnt.Pair1PrimaryRxAnt;
+			pAd->RxAnt.Pair1PrimaryRxAnt = pAd->RxAnt.Pair1SecondaryRxAnt;
+			pAd->RxAnt.Pair1SecondaryRxAnt = temp;
+
+			DBGPRINT(RT_DEBUG_TRACE, ("MlmePeriodicExec: no connect, switch to another one to try connection\n"));
+
+			AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
+		}
+	}
+}
+#endif /* ANT_DIVERSITY_SUPPORT */
+
+#ifdef RTMP_INTERNAL_TX_ALC
+
+/* Initialize the desired TSSI table*/
+
+/* Parameters*/
+/*	pAd: The adapter data structure*/
+
+/* Return Value:*/
+/*	None*/
+
+VOID InitDesiredTSSITable(
+	IN PRTMP_ADAPTER pAd)
+{
+	RTMP_CHIP_ASIC_TSSI_TABLE_INIT(pAd);
+}
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+VOID AsicGetAutoAgcOffset(
+	IN PRTMP_ADAPTER pAd,
+	IN PCHAR pDeltaPwr,
+	IN PCHAR pTotalDeltaPwr,
+	IN PCHAR pAgcCompensate,
+	IN PUCHAR pBbpR49)
+{
+	CHAR            DeltaPwr = 0;
+	BOOLEAN		bAutoTxAgc = FALSE;
+	UCHAR		TssiRef, *pTssiMinusBoundary, *pTssiPlusBoundary, TxAgcStep;
+/*	UCHAR		BbpR49 = 0, idx;*/
+	UCHAR		idx;
+	PCHAR		pTxAgcCompensate = NULL;
+	BBP_R49_STRUC BbpR49;
+	CHAR		TotalDeltaPower = 0; /* (non-positive number) including the transmit power controlled by the MAC and the BBP R1*/
+#ifdef RTMP_INTERNAL_TX_ALC
+/*	UCHAR desiredTSSI = 0, currentTSSI = 0; */
+	PTX_POWER_TUNING_ENTRY_STRUCT pTxPowerTuningEntry = NULL;
+	UCHAR RFValue = 0;
+#endif /* RTMP_INTERNAL_TX_ALC */
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+	PTX_POWER_TUNING_ENTRY_STRUCT pTxPowerTuningEntry2 = NULL;
+	UCHAR BbpValue = 0;
+	INT CurrentTemp = 0;
+	INT LookupTableIndex = pAd->TxPowerCtrl.LookupTableIndex + TEMPERATURE_COMPENSATION_LOOKUP_TABLE_OFFSET;
+	BOOLEAN bTempSuccess = FALSE;	
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+
+
+	BbpR49.byte = 0;
+
+#ifdef RTMP_INTERNAL_TX_ALC
+	/* Locate the internal Tx ALC tuning entry*/
+	if (pAd->TxPowerCtrl.bInternalTxALC == TRUE)
+	{
+		RTMP_CHIP_ASIC_AUTO_AGC_OFFSET_GET(
+				pAd, &DeltaPwr, &TotalDeltaPower, pTxAgcCompensate, &BbpR49.byte);
+	}
+	/* no else; avoid pTxAgcCompensate == NULL */
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+	/* TX power compensation for temperature variation based on TSSI. try every 4 second*/
+	if (pAd->Mlme.OneSecPeriodicRound % 4 == 0)
+	{
+		if (pAd->CommonCfg.Channel <= 14)
+		{
+			/* bg channel */
+			bAutoTxAgc         = pAd->bAutoTxAgcG;
+			TssiRef            = pAd->TssiRefG;
+			pTssiMinusBoundary = &pAd->TssiMinusBoundaryG[0];
+			pTssiPlusBoundary  = &pAd->TssiPlusBoundaryG[0];
+			TxAgcStep          = pAd->TxAgcStepG;
+			pTxAgcCompensate   = &pAd->TxAgcCompensateG;
+		}
+		else
+		{
+			/* a channel */
+			bAutoTxAgc         = pAd->bAutoTxAgcA;
+			TssiRef            = pAd->TssiRefA;
+			pTssiMinusBoundary = &pAd->TssiMinusBoundaryA[0];
+			pTssiPlusBoundary  = &pAd->TssiPlusBoundaryA[0];
+			TxAgcStep          = pAd->TxAgcStepA;
+			pTxAgcCompensate   = &pAd->TxAgcCompensateA;
+		}
+
+		if (bAutoTxAgc)
+		{
+#ifdef RTMP_TEMPERATURE_COMPENSATION 
+			if (IS_RT5392(pAd))
+			{
+				BbpR49.byte = 0;
+				
+				/* If temperature compensation is enabled */
+				if (pAd->CommonCfg.TempComp != 0)
+				{
+					/*RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R49, &BbpR49); */
+					/*DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] BBP_R49 = 0x%x\n", BbpR49)); */
+
+					/* For method 1, the value is set before and /after reading temperature */
+					if (pAd->CommonCfg.TempComp == 1)
+					{
+						/* Set [7:6] = 1 */
+						RT30xxReadRFRegister(pAd, RF_R27, (PUCHAR)(&RFValue));
+						RFValue = (RFValue & 0x7f);
+						RFValue = (RFValue | 0x40);
+						RT30xxWriteRFRegister(pAd, RF_R27, RFValue);
+
+						/* Set BBP_R47[2] = 1 */
+						RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BbpValue);
+						BbpValue = (BbpValue | 0x04);
+						RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R47, BbpValue);
+
+						RTMPusecDelay(1000);
+
+						BbpValue = 0;
+						RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BbpValue);
+
+						/* if R47[2] == 0, it means reading temperature succeeds. */
+						if ((BbpValue & 0x04) == 0)
+						{
+							bTempSuccess = TRUE;
+
+							/* Current temperature */
+							RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R49, &BbpR49.byte);
+							CurrentTemp = (CHAR)BbpR49.byte;
+							DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] BBP_R49 = %02x, current temp = %d\n", BbpR49.byte, CurrentTemp));
+						}
+						else
+						{
+							bTempSuccess = FALSE;
+
+							/* set R47[2] = 0 */
+							BbpValue = BbpValue & 0xfb;
+							RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R47, BbpValue);
+						}
+
+						/* Set [7:6] = 0 */
+						RT30xxReadRFRegister(pAd, RF_R27, (PUCHAR)(&RFValue));
+						RFValue = (RFValue & 0x3f);
+						RT30xxWriteRFRegister(pAd, RF_R27, RFValue);
+					}
+					else if (pAd->CommonCfg.TempComp == 2)
+					{
+						bTempSuccess = TRUE;
+
+						/* Current temperature */
+						RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R49, &BbpR49.byte);
+						CurrentTemp = (CHAR)BbpR49.byte;
+						DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] BBP_R49 = %02x, current temp = %d\n", BbpR49.byte, CurrentTemp));
+					}
+
+					if (!bTempSuccess)
+					{
+						DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] Fail to read temperature.\n"));
+						return;
+					}
+					else
+					{
+						DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] RefTempG = %d\n", pAd->TxPowerCtrl.RefTempG));
+
+						DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] index = %d\n", pAd->TxPowerCtrl.LookupTableIndex));
+						DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] f(%d)= %d\n", pAd->TxPowerCtrl.LookupTableIndex - 1, pAd->TxPowerCtrl.LookupTable[LookupTableIndex - 1]));
+						DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] f(%d)= %d\n", pAd->TxPowerCtrl.LookupTableIndex, pAd->TxPowerCtrl.LookupTable[LookupTableIndex]));
+						DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] f(%d)= %d\n", pAd->TxPowerCtrl.LookupTableIndex + 1, pAd->TxPowerCtrl.LookupTable[LookupTableIndex + 1]));
+						if (CurrentTemp > pAd->TxPowerCtrl.RefTempG + pAd->TxPowerCtrl.LookupTable[LookupTableIndex + 1] + ((pAd->TxPowerCtrl.LookupTable[LookupTableIndex + 1] - pAd->TxPowerCtrl.LookupTable[LookupTableIndex]) >> 2) &&
+							LookupTableIndex < 32)
+						{
+							DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] ++\n"));
+							LookupTableIndex++;
+							pAd->TxPowerCtrl.LookupTableIndex++;
+						}
+						else if (CurrentTemp < pAd->TxPowerCtrl.RefTempG + pAd->TxPowerCtrl.LookupTable[LookupTableIndex] - ((pAd->TxPowerCtrl.LookupTable[LookupTableIndex] - pAd->TxPowerCtrl.LookupTable[LookupTableIndex - 1]) >> 2) &&
+							LookupTableIndex > 0)
+						{
+							DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] --\n"));
+							LookupTableIndex--;
+							pAd->TxPowerCtrl.LookupTableIndex--;
+						}
+						else
+						{
+							DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] ==\n"));
+						}
+
+
+						DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] idxTxPowerTable %d, idxTxPowerTable2 %d\n",
+							pAd->TxPowerCtrl.idxTxPowerTable + pAd->TxPowerCtrl.LookupTableIndex,
+							pAd->TxPowerCtrl.idxTxPowerTable2 + pAd->TxPowerCtrl.LookupTableIndex));
+
+						pTxPowerTuningEntry = &TxPowerTuningTableOver5390[pAd->TxPowerCtrl.idxTxPowerTable + pAd->TxPowerCtrl.LookupTableIndex + TX_POWER_TUNING_ENTRY_OFFSET_OVER_5390];
+						pTxPowerTuningEntry2 = &TxPowerTuningTableOver5390[pAd->TxPowerCtrl.idxTxPowerTable2 + pAd->TxPowerCtrl.LookupTableIndex + TX_POWER_TUNING_ENTRY_OFFSET_OVER_5390];
+						DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] (tx0)RF_R12_Value = %x, MAC_PowerDelta = %d\n",
+							pTxPowerTuningEntry->RF_R12_Value, pTxPowerTuningEntry->MAC_PowerDelta));
+						DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] (tx1)RF_R12_Value = %x, MAC_PowerDelta = %d\n",
+							pTxPowerTuningEntry2->RF_R12_Value, pTxPowerTuningEntry2->MAC_PowerDelta));
+
+						/* Update RF_R49 [0:5] */
+						RT30xxReadRFRegister(pAd, RF_R49, &RFValue);
+						RFValue = ((RFValue & ~0x3F) | pTxPowerTuningEntry->RF_R12_Value);
+						if ((RFValue & 0x3F) > 0x27) /* The valid range of the RF R49 (<5:0>tx0_alc<5:0>) is 0x00~0x27 */
+						{
+							RFValue = ((RFValue & ~0x3F) | 0x27);
+						}
+						DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] Update RF_R49[0:5] to 0x%x\n", pTxPowerTuningEntry->RF_R12_Value));
+						RT30xxWriteRFRegister(pAd, RF_R49, RFValue);
+
+						/* Update RF_R50 [0:5] */
+						RT30xxReadRFRegister(pAd, RF_R50, &RFValue);
+						RFValue = ((RFValue & ~0x3F) | pTxPowerTuningEntry2->RF_R12_Value);
+						if ((RFValue & 0x3F) > 0x27) /* The valid range of the RF R49 (<5:0>tx0_alc<5:0>) is 0x00~0x27 */
+						{
+							RFValue = ((RFValue & ~0x3F) | 0x27);
+						}
+						DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] Update RF_R50[0:5] to 0x%x\n", pTxPowerTuningEntry2->RF_R12_Value));
+						RT30xxWriteRFRegister(pAd, RF_R50, RFValue);
+					}
+				}
+			}
+			else
+#endif /* RTMP_TEMPERATURE_COMPENSATION */
+			{
+			/* BbpR1 is unsigned char */
+			RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R49, &BbpR49.byte);
+			/* (p) TssiPlusBoundaryG[0] = 0 = (m) TssiMinusBoundaryG[0] */
+			/* compensate: +4     +3   +2   +1    0   -1   -2   -3   -4 * steps */
+			/* step value is defined in pAd->TxAgcStepG for tx power value */
+
+			/* [4]+1+[4]   p4     p3   p2   p1   o1   m1   m2   m3   m4 */
+			/* ex:         0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
+			   above value are examined in mass factory production */
+			/*             [4]    [3]  [2]  [1]  [0]  [1]  [2]  [3]  [4] */
+
+			/* plus (+) is 0x00 ~ 0x45, minus (-) is 0xa0 ~ 0xf0 */
+			/* if value is between p1 ~ o1 or o1 ~ s1, no need to adjust tx power */
+			/* if value is 0xa5, tx power will be -= TxAgcStep*(2-1) */
+
+			if (BbpR49.byte > pTssiMinusBoundary[1])
+			{
+				/* Reading is larger than the reference value*/
+				/* check for how large we need to decrease the Tx power*/
+				for (idx = 1; idx < 5; idx++)
+				{
+					if (BbpR49.byte <= pTssiMinusBoundary[idx])  /* Found the range*/
+						break;
+				}
+				/* The index is the step we should decrease, idx = 0 means there is nothing to compensate*/
+/*				if (R3 > (ULONG) (TxAgcStep * (idx-1)))*/
+					*pTxAgcCompensate = -(TxAgcStep * (idx-1));
+/*				else*/
+/*					*pTxAgcCompensate = -((UCHAR)R3);*/
+				
+				DeltaPwr += (*pTxAgcCompensate);
+				DBGPRINT(RT_DEBUG_TRACE, ("-- Tx Power, BBP R49=%x, TssiRef=%x, TxAgcStep=%x, step = -%d\n",
+					                BbpR49.byte, TssiRef, TxAgcStep, idx-1));                    
+			}
+			else if (BbpR49.byte < pTssiPlusBoundary[1])
+			{
+				/* Reading is smaller than the reference value*/
+				/* check for how large we need to increase the Tx power*/
+				for (idx = 1; idx < 5; idx++)
+				{
+					if (BbpR49.byte >= pTssiPlusBoundary[idx])   /* Found the range*/
+						break;
+				}
+				/* The index is the step we should increase, idx = 0 means there is nothing to compensate*/
+				*pTxAgcCompensate = TxAgcStep * (idx-1);
+				DeltaPwr += (*pTxAgcCompensate);
+				DBGPRINT(RT_DEBUG_TRACE, ("++ Tx Power, BBP R49=%x, TssiRef=%x, TxAgcStep=%x, step = +%d\n",
+					                BbpR49.byte, TssiRef, TxAgcStep, idx-1));
+			}
+			else
+			{
+				*pTxAgcCompensate = 0;
+				DBGPRINT(RT_DEBUG_TRACE, ("   Tx Power, BBP R49=%x, TssiRef=%x, TxAgcStep=%x, step = +%d\n",
+					                BbpR49.byte, TssiRef, TxAgcStep, 0));
+			}
+		}
+	}
+	}
+	else
+	{
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+		if (IS_RT5392(pAd))
+		{
+			/* RT5392 and RT5372 only need to run suitable routine (Every 4 secs)*/
+			/* In this case (1,2,3 secs), don't need to run */
+		 	return;
+		}
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+		if (pAd->CommonCfg.Channel <= 14)
+		{
+			bAutoTxAgc         = pAd->bAutoTxAgcG;
+			pTxAgcCompensate   = &pAd->TxAgcCompensateG;
+		}
+		else
+		{
+			bAutoTxAgc         = pAd->bAutoTxAgcA;
+			pTxAgcCompensate   = &pAd->TxAgcCompensateA;
+		}
+
+		if (bAutoTxAgc)
+			DeltaPwr += (*pTxAgcCompensate);
+	}
+
+	*pBbpR49 = BbpR49.byte;
+	*pDeltaPwr = DeltaPwr;
+	*pTotalDeltaPwr = TotalDeltaPower;
+	*pAgcCompensate = *pTxAgcCompensate;
+}
+
+#ifdef SINGLE_SKU
+/*
+	==========================================================================
+	Description:
+		Gives CCK TX rate 2 more dB TX power.
+		This routine works only in LINK UP in INFRASTRUCTURE mode.
+
+		calculate desired Tx power in RF R3.Tx0~5,	should consider -
+		0. if current radio is a noisy environment (pAd->DrsCounters.fNoisyEnvironment)
+		1. TxPowerPercentage
+		2. auto calibration based on TSSI feedback
+		3. extra 2 db for CCK
+		4. -10 db upon very-short distance (AvgRSSI >= -40db) to AP
+
+	NOTE: Since this routine requires the value of (pAd->DrsCounters.fNoisyEnvironment),
+		it should be called AFTER MlmeDynamicTxRatSwitching()
+	==========================================================================
+ */
+VOID AsicAdjustSingleSkuTxPower(
+	IN PRTMP_ADAPTER pAd) 
+{
+	INT			i, j;
+	CHAR		DeltaPwr = 0;
+	UCHAR		BbpR1 = 0, BbpR49 = 0, BbpR1Offset = 0;
+	CHAR		TxAgcCompensate;
+/*	ULONG		TxPwr[MAX_TXPOWER_ARRAY_SIZE];*/
+	ULONG		TotalDeltaPwr[MAX_TXPOWER_ARRAY_SIZE];
+	CHAR		Value, MinValue = 127;
+	CHAR		TotalDeltaPower = 0; /* (non-positive number) including the transmit power controlled by the MAC and the BBP R1*/
+	CONFIGURATION_OF_TX_POWER_CONTROL_OVER_MAC CfgOfTxPwrCtrlOverMAC = {0};
+
+#ifdef CONFIG_STA_SUPPORT
+	CHAR		Rssi = -127;
+#endif /* CONFIG_STA_SUPPORT */
+	
+
+#ifdef CONFIG_STA_SUPPORT
+	if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE) || 
+		RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS))
+{
+		return;
+}
+
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		Rssi = RTMPMaxRssi(pAd, 
+						   pAd->StaCfg.RssiSample.AvgRssi0, 
+						   pAd->StaCfg.RssiSample.AvgRssi1, 
+						   pAd->StaCfg.RssiSample.AvgRssi2);
+#endif /* CONFIG_STA_SUPPORT */
+
+        NdisZeroMemory(TotalDeltaPwr, sizeof(TotalDeltaPwr));
+        /* Get Tx Rate Offset Table which from eeprom 0xDEh ~ 0xEFh */
+        AsicGetTxPowerOffset(pAd, &CfgOfTxPwrCtrlOverMAC);
+        /* Get temperature compensation Delta Power Value */
+        AsicGetAutoAgcOffset(pAd, &DeltaPwr, &TotalDeltaPower, &TxAgcCompensate, &BbpR49);
+
+	RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BbpR1);
+	BbpR1 &= 0xFC;
+
+	/* Handle regulatory max tx power constrain*/
+	do
+	{
+		UCHAR    TxPwrInEEPROM = 0xFF, CountryTxPwr = 0xFF, criterion;
+/*		UCHAR    AdjustMaxTxPwr[MAX_TXPOWER_ARRAY_SIZE * 8]; */
+		UCHAR    AdjustMaxTxPwr[(MAX_TX_PWR_CONTROL_OVER_MAC_REGISTERS * 8)]; 
+
+		{
+		if (pAd->CommonCfg.Channel > 14) /* 5G band*/
+			TxPwrInEEPROM = ((pAd->CommonCfg.DefineMaxTxPwr & 0xFF00) >> 8);
+		else /* 2.4G band*/
+			TxPwrInEEPROM = (pAd->CommonCfg.DefineMaxTxPwr & 0x00FF);
+		}
+
+		CountryTxPwr = GetCuntryMaxTxPwr(pAd, pAd->CommonCfg.Channel); 
+
+		
+		/* FAE uses OFDM 6M as criterion*/
+		
+/*		criterion = (TxPwr[0] >> 16) & 0xF;         FAE use OFDM 6M as criterion*/
+		criterion = (UCHAR)((CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[0].RegisterValue & 0x000F0000) >> 16);
+
+		DBGPRINT_RAW(RT_DEBUG_INFO, ("AsicAdjustSingleSkuTxPower (criterion=%d, TxPwrInEEPROM=%d, CountryTxPwr=%d)\n", criterion, TxPwrInEEPROM, CountryTxPwr));
+ 
+		/* Adjust max tx power according to the relationship of tx power in E2PROM*/
+/*		for (i=0; i<MAX_TXPOWER_ARRAY_SIZE; i++)*/
+		for (i=0; i<CfgOfTxPwrCtrlOverMAC.NumOfEntries; i++)
+		{
+			/* CCK will have 4dBm larger than OFDM*/
+			/* Therefore, we should separate to parse the tx power field*/
+			if (i == 0)
+			{
+				for (j=0; j<8; j++)
+				{
+/*					Value = (CHAR)((TxPwr[i] >> j*4) & 0x0F);*/
+					Value = (CHAR)((CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].RegisterValue >> j*4) & 0x0F);
+ 
+					if (j < 4)
+					{
+						/* CCK will have 4dBm larger than OFDM*/
+						AdjustMaxTxPwr[i*8+j] = TxPwrInEEPROM + (Value - criterion) + 4;
+					}
+					else
+					{
+						AdjustMaxTxPwr[i*8+j] = TxPwrInEEPROM + (Value - criterion);
+					}
+/*					DBGPRINT_RAW(RT_DEBUG_INFO, ("AsicAdjustSingleSkuTxPower (i/j=%d/%d, Value=%d, %d)\n", i, j, Value, AdjustMaxTxPwr[i*8+j]));*/
+
+					DBGPRINT_RAW(RT_DEBUG_INFO, ("AsicAdjustSingleSkuTxPower (offset = 0x%04X, i/j=%d/%d, Value=%d, %d)\n", 
+						i, 
+						j, 
+						Value, 
+						AdjustMaxTxPwr[i*8+j], 
+						CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].MACRegisterOffset));
+				}
+			}
+			else
+			{
+				for (j=0; j<8; j++)
+				{
+					Value = (CHAR)((CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].RegisterValue >> j*4) & 0x0F);
+ 
+					AdjustMaxTxPwr[i*8+j] = TxPwrInEEPROM + (Value - criterion);
+/*					DBGPRINT_RAW(RT_DEBUG_INFO, ("AsicAdjustSingleSkuTxPower (i/j=%d/%d, Value=%d, %d)\n", i, j, Value, AdjustMaxTxPwr[i*8+j]));*/
+
+					DBGPRINT_RAW(RT_DEBUG_INFO, ("AsicAdjustSingleSkuTxPower (offset = 0x%04X, i/j=%d/%d, Value=%d, %d)\n", 
+						CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].MACRegisterOffset, 
+						i, 
+						j, 
+						Value, 
+						AdjustMaxTxPwr[i*8+j]));
+				}
+			}
+		}
+ 
+		/* Adjust tx power according to the relationship*/
+/*		for (i=0; i<MAX_TXPOWER_ARRAY_SIZE; i++)*/
+		for (i=0; i<CfgOfTxPwrCtrlOverMAC.NumOfEntries; i++)
+		{
+/*			if (TxPwr[i] != 0xffffffff)*/
+			if (CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].RegisterValue != 0xffffffff)
+			{
+				for (j=0; j<8; j++)
+				{
+/*					Value = (CHAR)((TxPwr[i] >> j*4) & 0x0F);*/
+					Value = (CHAR)((CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].RegisterValue >> j*4) & 0x0F);
+
+					/* The system tx power is larger than the regulatory, the power should be restrain*/
+					if (AdjustMaxTxPwr[i*8+j] > CountryTxPwr)
+					{
+						Value = (AdjustMaxTxPwr[i*8+j] - CountryTxPwr);
+						if (Value > 0xF)
+						{
+						    /* If print the Error msg. It means the output power larger than Country Regulatory over 15dBm,
+						      * the origianl design has overflow case.
+						      */
+						    DBGPRINT_RAW(RT_DEBUG_ERROR,("AsicAdjustSingleSkuTxPower: Value overflow - %d\n", Value));
+						}
+						TotalDeltaPwr[i] = (TotalDeltaPwr[i] & ~(0x0000000F << j*4)) | (Value << j*4);
+
+/*						DBGPRINT_RAW(RT_DEBUG_INFO, ("AsicAdjustSingleSkuTxPower (i/j=%d/%d, Value=%d, %d)\n", i, j, Value, AdjustMaxTxPwr[i*8+j]));*/
+						DBGPRINT_RAW(RT_DEBUG_INFO,("AsicAdjustSingleSkuTxPower (offset = 0x%04X, i/j=%d/%d, Value=%d, %d)\n", 
+							CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].MACRegisterOffset, 
+							i, 
+							j, 
+							Value, 
+							AdjustMaxTxPwr[i*8+j]));
+					}
+					else
+					{
+/*						DBGPRINT_RAW(RT_DEBUG_INFO, ("AsicAdjustSingleSkuTxPower (i/j=%d/%d, Value=%d, %d, no change)\n", i, j, Value, AdjustMaxTxPwr[i*8+j]));*/
+						DBGPRINT_RAW(RT_DEBUG_INFO,("AsicAdjustSingleSkuTxPower (offset = 0x%04X, i/j=%d/%d, Value=%d, %d, no change)\n", 
+							CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].MACRegisterOffset, 
+							i, 
+							j, 
+							Value, 
+							AdjustMaxTxPwr[i*8+j]));
+					}
+				}
+			}
+		}
+	} while (FALSE);
+
+/*	TotalDeltaPower += DeltaPowerByBbpR1;  the transmit power controlled by the BBP R1*/
+/*	TotalDeltaPower += DeltaPwr;  the transmit power controlled by the MAC	*/
+	DeltaPwr += TotalDeltaPower;
+
+	/* calculate delta power based on the percentage specified from UI */
+	/* E2PROM setting is calibrated for maximum TX power (i.e. 100%)*/
+	/* We lower TX power here according to the percentage specified from UI*/
+	if (pAd->CommonCfg.TxPowerPercentage >= 100)       /* AUTO TX POWER control*/
+	{
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			/* to patch high power issue with some APs, like Belkin N1.*/
+			if (Rssi > -35)
+			{
+				DeltaPwr -= 12;
+			}
+			else if (Rssi > -40)
+			{
+				DeltaPwr -= 6;
+			}
+			else
+		;
+		}
+#endif /* CONFIG_STA_SUPPORT */
+	}
+	else if (pAd->CommonCfg.TxPowerPercentage > 90)  /* 91 ~ 100% & AUTO, treat as 100% in terms of mW*/
+		;
+	else if (pAd->CommonCfg.TxPowerPercentage > 60)  /* 61 ~ 90%, treat as 75% in terms of mW		 DeltaPwr -= 1;*/
+	{
+		DeltaPwr -= 1;
+	}
+	else if (pAd->CommonCfg.TxPowerPercentage > 30)  /* 31 ~ 60%, treat as 50% in terms of mW		 DeltaPwr -= 3;*/
+	{
+		DeltaPwr -= 3;
+	}
+	else if (pAd->CommonCfg.TxPowerPercentage > 15)  /* 16 ~ 30%, treat as 25% in terms of mW		 DeltaPwr -= 6;*/
+	{
+		DeltaPwr -= 6;
+	}
+	else if (pAd->CommonCfg.TxPowerPercentage > 9)   /* 10 ~ 15%, treat as 12.5% in terms of mW		 DeltaPwr -= 9;*/
+	{
+		DeltaPwr -= 9;
+	}
+	else                                           /* 0 ~ 9 %, treat as MIN(~3%) in terms of mW		 DeltaPwr -= 12;*/
+	{
+		DeltaPwr -= 12;
+	}
+
+	/* reset different new tx power for different TX rate */
+
+	/* Calcuate the minimum transmit power */
+/*	for(i=0; i<MAX_TXPOWER_ARRAY_SIZE; i++)*/
+	for(i=0; i<CfgOfTxPwrCtrlOverMAC.NumOfEntries; i++)
+	{
+/*		if (TxPwr[i] != 0xffffffff)*/
+		if (CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].RegisterValue != 0xffffffff)
+		{
+			for (j=0; j<8; j++)
+			{
+				/* After Single SKU, each data rate offset power value is saved in TotalDeltaPwr[].
+				   PwrChange will add DeltaPwr and TotalDeltaPwr[] for each data rate to calculate
+				   the final adjust output power value which is saved in MAC Reg. and BBP_R1 */
+				CHAR PwrChange;
+
+				/* Value / TxPwr[] is get from eeprom 0xDEh ~ 0xEFh and increase or decrease the  
+				   20/40 Bandwidth Delta Value in eeprom 0x50h. */
+				Value = (CHAR)((CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].RegisterValue >> j*4) & 0x0F); /* 0 ~ 15 */
+
+				/* Fix the corner case of Single SKU read eeprom offset 0xF0h ~ 0xFEh which for BBP Instruction configuration */
+				if (Value == 0xF)
+					continue;
+
+				/* Value_offset is current Pwr comapre with Country Regulation and need adjust delta value */
+				PwrChange = (CHAR)((TotalDeltaPwr[i] >> j*4) & 0x0F); /* 0 ~ 15 */
+				PwrChange -= DeltaPwr;
+
+				Value -= PwrChange;
+				
+				if(MinValue > Value)
+					MinValue = Value;				
+			}
+		}
+	}
+	
+	/* Depend on the minimum transmit power to adjust static Tx power control 
+	   Prevent the value of MAC_TX_PWR_CFG less than 0. */
+		
+	if((MinValue < 0)&&(MinValue >= -6))
+	{
+		BbpR1 |= 0x01;
+		BbpR1Offset = 6;
+	}
+	else if ((MinValue < -6)&&(MinValue >= -12))
+	{
+		BbpR1 |= 0x02;
+		BbpR1Offset = 12;
+	}
+	else if (MinValue < -12)
+	{
+		DBGPRINT(RT_DEBUG_WARN, ("AsicAdjustTxPower: ASIC limit..\n"));
+		BbpR1 |= 0x02;
+		BbpR1Offset = 12;
+	}
+
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BbpR1);
+
+
+/*	for(i=0; i<MAX_TXPOWER_ARRAY_SIZE; i++)*/
+	for (i=0; i < CfgOfTxPwrCtrlOverMAC.NumOfEntries; i++)
+	{
+/*		if (TxPwr[i] != 0xffffffff)*/
+		if (CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].RegisterValue != 0xffffffff)
+		{
+			for (j=0; j<8; j++)
+			{
+				/* After Single SKU, each data rate offset power value is saved in TotalDeltaPwr[].
+				   PwrChange will add DeltaPwr and TotalDeltaPwr[] for each data rate to calculate
+				   the final adjust output power value which is saved in MAC Reg. and BBP_R1 */
+				CHAR PwrChange;
+
+				/* Value / TxPwr[] is get from eeprom 0xDEh ~ 0xEFh and increase or decrease the  
+				   20/40 Bandwidth Delta Value in eeprom 0x50h. */
+				Value = (CHAR)((CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].RegisterValue >> j*4) & 0x0F); /* 0 ~ 15 */
+
+				/* Value_offset is current Pwr comapre with Country Regulation and need adjust delta value */
+				PwrChange = (CHAR)((TotalDeltaPwr[i] >> j*4) & 0x0F); /* 0 ~ 15 */
+				PwrChange -= DeltaPwr;
+
+				Value -= (PwrChange - BbpR1Offset);
+
+				if (Value < 0)
+					Value = 0; /* min */
+
+				if (Value > 0xF)
+					Value = 0xF; /* max */
+
+				/* fill new value to CSR offset */
+/*				TxPwr[i] = (TxPwr[i] & ~(0x0000000F << j*4)) | (Value << j*4);*/
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].RegisterValue = (CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].RegisterValue & ~(0x0000000F << j*4)) | (Value << j*4);
+			}
+
+			/* write tx power value to CSR */
+			/* TX_PWR_CFG_0 (8 tx rate) for	TX power for OFDM 12M/18M
+											TX power for OFDM 6M/9M
+											TX power for CCK5.5M/11M
+											TX power for CCK1M/2M */
+			/* TX_PWR_CFG_1 ~ TX_PWR_CFG_4 */
+				RTMP_IO_WRITE32(pAd, CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].MACRegisterOffset, CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].RegisterValue);
+
+		}
+	}
+
+
+
+}
+#endif /* SINGLE_SKU */
+
+/*
+	==========================================================================
+	Description:
+		Gives CCK TX rate 2 more dB TX power.
+		This routine works only in LINK UP in INFRASTRUCTURE mode.
+
+		calculate desired Tx power in RF R3.Tx0~5,	should consider -
+		0. if current radio is a noisy environment (pAd->DrsCounters.fNoisyEnvironment)
+		1. TxPowerPercentage
+		2. auto calibration based on TSSI feedback
+		3. extra 2 db for CCK
+		4. -10 db upon very-short distance (AvgRSSI >= -40db) to AP
+
+	NOTE: Since this routine requires the value of (pAd->DrsCounters.fNoisyEnvironment),
+		it should be called AFTER MlmeDynamicTxRatSwitching()
+	==========================================================================
+ */
+#define MDSM_NORMAL_TX_POWER							0x00
+#define MDSM_DROP_TX_POWER_BY_6dBm					0x01
+#define MDSM_DROP_TX_POWER_BY_12dBm					0x02
+#define MDSM_ADD_TX_POWER_BY_6dBm						0x03
+#define MDSM_BBP_R1_STATIC_TX_POWER_CONTROL_MASK	0x03
+VOID AsicAdjustTxPower(
+	IN PRTMP_ADAPTER pAd) 
+{
+	INT			i, j;
+	CHAR		DeltaPwr = 0;
+	UCHAR		BbpR1 = 0, BbpR49 = 0;
+	CHAR		TxAgcCompensate;
+/*	ULONG		TxPwr[MAX_TXPOWER_ARRAY_SIZE];*/
+	CHAR		Value;
+	CHAR		DeltaPowerByBbpR1 = 0; /* non-positive number*/
+	CHAR		TotalDeltaPower = 0; /* (non-positive number) including the transmit power controlled by the MAC and the BBP R1	*/
+	CONFIGURATION_OF_TX_POWER_CONTROL_OVER_MAC CfgOfTxPwrCtrlOverMAC = {0};
+
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+	ULONG		TxPwrCfg7Over5390 = 0, TxPwrCfg9Over5390 = 0;
+	CHAR 		desiredTssi = 0, currentTssi = 0;
+
+	ULONG TxPwrCfg8Over5392 = 0;
+	BOOLEAN		bAutoTxAgc = FALSE;
+
+	PTX_PWR_CFG_STRUC pFinalTxPwr = NULL;
+
+
+#ifdef RTMP_INTERNAL_TX_ALC		
+	PTX_POWER_TUNING_ENTRY_STRUCT pTxPowerTuningEntry = NULL;
+#endif /* RTMP_INTERNAL_TX_ALC */
+	UCHAR RFValue = 0;
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+
+#ifdef CONFIG_STA_SUPPORT
+	CHAR		Rssi = -127;
+#endif /* CONFIG_STA_SUPPORT */
+	
+#ifdef CONFIG_STA_SUPPORT
+
+	if(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF))
+		return;
+
+
+
+	if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE) || 
+		RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS))
+	{
+		return;
+	}
+
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		Rssi = RTMPMaxRssi(pAd, 
+						   pAd->StaCfg.RssiSample.AvgRssi0, 
+						   pAd->StaCfg.RssiSample.AvgRssi1, 
+						   pAd->StaCfg.RssiSample.AvgRssi2);
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef SINGLE_SKU
+	if (pAd->CommonCfg.bSKUMode == TRUE)
+	{
+		AsicAdjustSingleSkuTxPower(pAd);
+		return;
+	}
+#endif /* SINGLE_SKU */
+
+	/* Get Tx Rate Offset Table which from eeprom 0xDEh ~ 0xEFh */
+/*	AsicGetTxPowerOffset(pAd, (PULONG) &TxPwr);*/
+	AsicGetTxPowerOffset(pAd, (PULONG) &CfgOfTxPwrCtrlOverMAC);
+	/* Get temperature compensation Delta Power Value */
+	AsicGetAutoAgcOffset(pAd, &DeltaPwr, &TotalDeltaPower, &TxAgcCompensate, &BbpR49);
+
+	RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BbpR1);
+	BbpR1 &= 0xFC;
+
+	/* calculate delta power based on the percentage specified from UI */
+	/* E2PROM setting is calibrated for maximum TX power (i.e. 100%)*/
+	/* We lower TX power here according to the percentage specified from UI*/
+	if (pAd->CommonCfg.TxPowerPercentage >= 100)       /* AUTO TX POWER control*/
+	{
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			/* to patch high power issue with some APs, like Belkin N1.*/
+			if (Rssi > -35)
+			{
+				DeltaPwr -= 12;
+			}
+			else if (Rssi > -40)
+			{
+				DeltaPwr -= 6;
+			}
+			else
+		;
+		}
+#endif /* CONFIG_STA_SUPPORT */
+	}
+	else if (pAd->CommonCfg.TxPowerPercentage > 90)  /* 91 ~ 100% & AUTO, treat as 100% in terms of mW*/
+		;
+	else if (pAd->CommonCfg.TxPowerPercentage > 60)  /* 61 ~ 90%, treat as 75% in terms of mW		 DeltaPwr -= 1;*/
+	{
+		DeltaPwr -= 1;
+	}
+	else if (pAd->CommonCfg.TxPowerPercentage > 30)  /* 31 ~ 60%, treat as 50% in terms of mW		 DeltaPwr -= 3;*/
+	{
+		DeltaPwr -= 3;
+	}
+	else if (pAd->CommonCfg.TxPowerPercentage > 15)  /* 16 ~ 30%, treat as 25% in terms of mW		 DeltaPwr -= 6;*/
+	{
+		DeltaPowerByBbpR1 -= 6; /* -6 dBm*/
+	}
+	else if (pAd->CommonCfg.TxPowerPercentage > 9)   /* 10 ~ 15%, treat as 12.5% in terms of mW		 DeltaPwr -= 9;*/
+	{
+		DeltaPowerByBbpR1 -= 6; /* -6 dBm*/
+		DeltaPwr -= 3;
+	}
+	else                                           /* 0 ~ 9 %, treat as MIN(~3%) in terms of mW		 DeltaPwr -= 12;*/
+	{
+		DeltaPowerByBbpR1 -= 12; /* -12 dBm*/
+	}
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BbpR1);
+
+
+	TotalDeltaPower += DeltaPowerByBbpR1; /* the transmit power controlled by the BBP R1*/
+	TotalDeltaPower += DeltaPwr; /* the transmit power controlled by the MAC	*/
+
+#ifdef RTMP_INTERNAL_TX_ALC	
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+	
+	/* Locate the internal Tx ALC tuning entry */
+	
+	if ((pAd->TxPowerCtrl.bInternalTxALC == TRUE) && (IS_RT5390(pAd)))
+	{
+		if ((pAd->Mlme.OneSecPeriodicRound % 4 == 0) && (DeltaPowerByBbpR1 == 0))
+		{
+			if (GetDesiredTssiAndCurrentTssi(pAd, &desiredTssi, &currentTssi) == FALSE)
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("%s: Incorrect desired TSSI or current TSSI\n", __FUNCTION__));
+				
+				/* Tx power adjustment over RF */
+				
+
+					RT30xxReadRFRegister(pAd, RF_R49, (PUCHAR)(&RFValue));
+					RFValue = ((RFValue & ~0x3F) | pAd->TxPowerCtrl.RF_R12_Value);
+					if ((RFValue & 0x3F) > 0x27) /* The valid range of the RF R49 (<5:0>tx0_alc<5:0>) is 0x00~0x27 */
+					{
+						RFValue = ((RFValue & ~0x3F) | 0x27);
+					}
+					RT30xxWriteRFRegister(pAd, RF_R49, (UCHAR)(RFValue));
+
+				
+				/* Tx power adjustment over MAC */
+				
+				TotalDeltaPower += pAd->TxPowerCtrl.MAC_PowerDelta;
+
+
+			}
+			else
+			{
+				if (desiredTssi > currentTssi)
+				{
+					pAd->TxPowerCtrl.idxTxPowerTable++;
+				}
+
+				if (desiredTssi < currentTssi)
+				{
+					pAd->TxPowerCtrl.idxTxPowerTable--;
+				}
+
+				if (pAd->TxPowerCtrl.idxTxPowerTable < LOWERBOUND_TX_POWER_TUNING_ENTRY_OVER_5390)
+				{
+					pAd->TxPowerCtrl.idxTxPowerTable = LOWERBOUND_TX_POWER_TUNING_ENTRY_OVER_5390;
+				}
+
+				if (pAd->TxPowerCtrl.idxTxPowerTable >= UPPERBOUND_TX_POWER_TUNING_ENTRY_OVER_5390)
+				{
+					pAd->TxPowerCtrl.idxTxPowerTable = UPPERBOUND_TX_POWER_TUNING_ENTRY_OVER_5390;
+				}
+
+				
+				/* Valide pAd->TxPowerCtrl.idxTxPowerTable: -30 ~ 70 */
+				
+
+				pTxPowerTuningEntry = &TxPowerTuningTableOver5390[pAd->TxPowerCtrl.idxTxPowerTable + TX_POWER_TUNING_ENTRY_OFFSET_OVER_5390]; // zero-based array
+				pAd->TxPowerCtrl.RF_R12_Value = pTxPowerTuningEntry->RF_R12_Value;
+				pAd->TxPowerCtrl.MAC_PowerDelta = pTxPowerTuningEntry->MAC_PowerDelta;
+
+				
+				/* Tx power adjustment over RF */
+				
+				RT30xxReadRFRegister(pAd, RF_R49, (PUCHAR)(&RFValue));
+				RFValue = ((RFValue & ~0x3F) | pAd->TxPowerCtrl.RF_R12_Value);
+				if ((RFValue & 0x3F) > 0x27) /* The valid range of the RF R49 (<5:0>tx0_alc<5:0>) is 0x00~0x1F */
+				{
+					RFValue = ((RFValue & ~0x3F) | 0x27);
+				}
+				RT30xxWriteRFRegister(pAd, RF_R49, (UCHAR)(RFValue));
+
+				
+				/* Tx power adjustment over MAC */
+				
+				TotalDeltaPower += pAd->TxPowerCtrl.MAC_PowerDelta;
+
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: desiredTSSI = %d, currentTSSI = %d, idxTxPowerTable = %d, {RF_R12_Value = 0x%X, MAC_PowerDelta = %d}\n", 
+					__FUNCTION__, 
+					desiredTssi, 
+					currentTssi, 
+					pAd->TxPowerCtrl.idxTxPowerTable, 
+					pTxPowerTuningEntry->RF_R12_Value, 
+					pTxPowerTuningEntry->MAC_PowerDelta));
+			}
+		}
+		else
+		{
+			
+			/* Tx power adjustment over RF */
+			
+			RT30xxReadRFRegister(pAd, RF_R49, (PUCHAR)(&RFValue));
+			RFValue = ((RFValue & ~0x3F) | pAd->TxPowerCtrl.RF_R12_Value);
+			if ((RFValue & 0x3F) > 0x27) /* The valid range of the RF R49 (<5:0>tx0_alc<5:0>) is 0x00~0x1F */
+			{
+				RFValue = ((RFValue & ~0x3F) | 0x27);
+			}
+			RT30xxWriteRFRegister(pAd, RF_R49, (UCHAR)(RFValue));
+
+			
+			/* Tx power adjustment over MAC */
+			
+			TotalDeltaPower += pAd->TxPowerCtrl.MAC_PowerDelta;
+		}
+	}
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+
+	/* The BBP R1 controls the transmit power for all rates*/
+	RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BbpR1);
+	BbpR1 &= ~MDSM_BBP_R1_STATIC_TX_POWER_CONTROL_MASK;
+
+	if (TotalDeltaPower <= -12)
+	{
+		TotalDeltaPower += 12;
+		BbpR1 |= MDSM_DROP_TX_POWER_BY_12dBm;
+
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BbpR1);
+
+		DBGPRINT(RT_DEBUG_INFO, ("TPC: %s: Drop the transmit power by 12 dBm (BBP R1)\n", __FUNCTION__));
+	}
+	else if ((TotalDeltaPower <= -6) && (TotalDeltaPower > -12))
+	{
+		TotalDeltaPower += 6;
+		BbpR1 |= MDSM_DROP_TX_POWER_BY_6dBm;		
+
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BbpR1);
+
+		DBGPRINT(RT_DEBUG_INFO, ("TPC: %s: Drop the transmit power by 6 dBm (BBP R1)\n", __FUNCTION__));
+	}
+	else
+	{
+		/* Control the the transmit power by using the MAC only*/
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BbpR1);
+	}
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+	
+	/* For rt5392, power will be updated each 4 sec */
+
+	if ((IS_RT5392(pAd) && pAd->Mlme.OneSecPeriodicRound % 4 == 0) ||
+		!IS_RT5392(pAd))
+	{
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */	
+	/* reset different new tx power for different TX rate */
+/*	for(i=0; i<MAX_TXPOWER_ARRAY_SIZE; i++)*/
+	for (i=0; i < CfgOfTxPwrCtrlOverMAC.NumOfEntries; i++)
+	{
+		if (CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].RegisterValue != 0xffffffff)
+		{
+			for (j=0; j<8; j++)
+			{
+				Value = (CHAR)((CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].RegisterValue >> j*4) & 0x0F);
+
+#ifdef RTMP_INTERNAL_TX_ALC
+				/* The upper bounds of the MAC 0x1314~0x1324 are variable when the STA uses the internal Tx ALC.*/
+				if (pAd->TxPowerCtrl.bInternalTxALC == TRUE)
+				{
+					switch (TX_PWR_CFG_0 + (i * 4))
+					{
+						case TX_PWR_CFG_0: 
+						{
+							if ((Value + TotalDeltaPower) < 0)
+							{
+								Value = 0;
+							}
+							else if ((Value + TotalDeltaPower) > 0xE)
+							{
+								Value = 0xE;
+							}
+							else
+							{
+								Value += TotalDeltaPower;
+							}
+						}
+						break;
+
+						case TX_PWR_CFG_1: 
+						{
+							if ((j >= 0) && (j <= 3))
+							{
+								if ((Value + TotalDeltaPower) < 0)
+								{
+									Value = 0;
+								}
+								else if ((Value + TotalDeltaPower) > 0xC)
+								{
+									Value = 0xC;
+								}
+								else
+								{
+									Value += TotalDeltaPower;
+								}
+							}
+							else
+							{
+								if ((Value + TotalDeltaPower) < 0)
+								{
+									Value = 0;
+								}
+								else if ((Value + TotalDeltaPower) > 0xE)
+								{
+									Value = 0xE;
+								}
+								else
+								{
+									Value += TotalDeltaPower;
+								}
+							}
+						}
+						break;
+
+						case TX_PWR_CFG_2: 
+						{
+							if ((j == 0) || (j == 2) || (j == 3))
+							{
+								if ((Value + TotalDeltaPower) < 0)
+								{
+									Value = 0;
+								}
+								else if ((Value + TotalDeltaPower) > 0xC)
+								{
+									Value = 0xC;
+								}
+								else
+								{
+									Value += TotalDeltaPower;
+								}
+							}
+							else
+							{
+								if ((Value + TotalDeltaPower) < 0)
+								{
+									Value = 0;
+								}
+								else if ((Value + TotalDeltaPower) > 0xE)
+								{
+									Value = 0xE;
+								}
+								else
+								{
+									Value += TotalDeltaPower;
+								}
+							}
+						}
+						break;
+
+						case TX_PWR_CFG_3: 
+						{
+							if ((j == 0) || (j == 2) || (j == 3) || 
+							    ((j >= 4) && (j <= 7)))
+							{
+								if ((Value + TotalDeltaPower) < 0)
+								{
+									Value = 0;
+								}
+								else if ((Value + TotalDeltaPower) > 0xC)
+								{
+									Value = 0xC;
+								}
+								else
+								{
+									Value += TotalDeltaPower;
+								}
+							}
+							else
+							{
+								if ((Value + TotalDeltaPower) < 0)
+								{
+									Value = 0;
+								}
+								else if ((Value + TotalDeltaPower) > 0xE)
+								{
+									Value = 0xE;
+								}
+								else
+								{
+									Value += TotalDeltaPower;
+								}
+							}
+						}
+						break;
+
+						case TX_PWR_CFG_4: 
+						{
+							if ((Value + TotalDeltaPower) < 0)
+							{
+								Value = 0;
+							}
+							else if ((Value + TotalDeltaPower) > 0xC)
+							{
+								Value = 0xC;
+							}
+							else
+							{
+								Value += TotalDeltaPower;
+							}
+						}
+						break;
+
+						default: 
+						{							
+							/* do nothing*/
+							DBGPRINT(RT_DEBUG_ERROR, ("%s: unknown register = 0x%X\n", 
+								__FUNCTION__, 
+								(TX_PWR_CFG_0 + (i * 4))));
+						}
+						break;
+					}
+				}
+				else
+#endif /* RTMP_INTERNAL_TX_ALC */
+				{
+					if ((Value + TotalDeltaPower) < 0)
+					{
+						Value = 0; /* min */
+					}
+					else if ((Value + TotalDeltaPower) > 0xC)
+					{
+						Value = 0xC; /* max */
+					}
+					else
+					{
+						Value += TotalDeltaPower; /* temperature compensation */
+					}
+				}
+				/* fill new value to CSR offset */
+				CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].RegisterValue = (CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].RegisterValue & ~(0x0000000F << j*4)) | (Value << j*4);
+			}
+#ifdef RTMP_TEMPERATURE_COMPENSATION
+				/* If temperature compensation enabled... */
+				if (IS_RT5392(pAd) && bAutoTxAgc && pAd->CommonCfg.TempComp != 0)
+				{
+					pFinalTxPwr = (PTX_PWR_CFG_STRUC)&(CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].RegisterValue);
+					DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] AsicAdjustTxPower(%x), before - %x\n", 
+						(UINT)CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].MACRegisterOffset, 
+						(UINT)CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].RegisterValue));
+					pFinalTxPwr->field.Byte0 += pTxPowerTuningEntry->MAC_PowerDelta;
+					pFinalTxPwr->field.Byte1 += pTxPowerTuningEntry->MAC_PowerDelta;
+					pFinalTxPwr->field.Byte2 += pTxPowerTuningEntry->MAC_PowerDelta;
+					pFinalTxPwr->field.Byte3 += pTxPowerTuningEntry->MAC_PowerDelta;
+					DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] AsicAdjustTxPower(%x), after - %x\n", 
+						(UINT)CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].MACRegisterOffset, 
+						(UINT)CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].RegisterValue));
+				}
+				else
+				{
+					DBGPRINT(RT_DEBUG_TRACE, ("AsicAdjustTxPower %x -> %x.\n", 
+						(UINT)CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].MACRegisterOffset, 
+						(UINT)CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].RegisterValue));
+				}
+#endif /* RTMP_TEMPERATURE_COMPENSATION */				
+
+			/* write tx power value to CSR */
+			/* TX_PWR_CFG_0 (8 tx rate) for	TX power for OFDM 12M/18M
+											TX power for OFDM 6M/9M
+											TX power for CCK5.5M/11M
+											TX power for CCK1M/2M */
+			/* TX_PWR_CFG_1 ~ TX_PWR_CFG_4 */
+			{
+/*				RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, TxPwr[i]);*/
+				RTMP_IO_WRITE32(pAd, CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].MACRegisterOffset, CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].RegisterValue);
+			}
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+			
+			/* 5390 has different MAC registers for OFDM 54, HT MCS 7 and STBC MCS 7. */
+			
+			if (IS_RT5390(pAd))
+			{
+				if ((TX_PWR_CFG_0 + i * 4) == TX_PWR_CFG_1) /* Get Tx power for OFDM 54 */
+				{
+					TxPwrCfg7Over5390 |= ((CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].RegisterValue & 0x0000FF00) >> 8);
+				}
+
+				if ((TX_PWR_CFG_0 + i * 4) == TX_PWR_CFG_2) /* Get Tx power for HT MCS 7 */
+				{
+					TxPwrCfg7Over5390 |= ((CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].RegisterValue & 0x0000FF00) << 8);
+				}
+
+				if (IS_RT5392(pAd))
+				{
+					if ((TX_PWR_CFG_0 + i * 4) == TX_PWR_CFG_3) /* Get Tx power for HT MCS 15 */
+					{
+						TxPwrCfg8Over5392 |= ((CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].RegisterValue & 0x0000FF00) >> 8);
+					}
+				}
+
+				if ((TX_PWR_CFG_0 + i * 4) == TX_PWR_CFG_4) /* Get Tx power for STBC MCS 7 */
+				{
+					TxPwrCfg9Over5390 |= ((CfgOfTxPwrCtrlOverMAC.TxPwrCtrlOverMAC[i].RegisterValue & 0x0000FF00) >> 8);
+				}
+			}
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */		
+
+		}
+	}
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+	
+		/* 5390/5392 has different MAC registers for OFDM 54, HT MCS 7 and STBC MCS 7. */
+	
+#ifdef RTMP_TEMPERATURE_COMPENSATION
+		if (IS_RT5392(pAd))
+		{
+			pFinalTxPwr = (PTX_PWR_CFG_STRUC)&TxPwrCfg7Over5390;
+			if (bAutoTxAgc && pAd->CommonCfg.TempComp != 0)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] AsicAdjustTxPower(%x), before %x\n", TX_PWR_CFG_7, (UINT)TxPwrCfg7Over5390));
+				pFinalTxPwr->field.Byte0 += pTxPowerTuningEntry->MAC_PowerDelta;
+				/* pFinalTxPwr->field.Byte1 += pTxPowerTuningEntry->MAC_PowerDelta; */
+				pFinalTxPwr->field.Byte2 += pTxPowerTuningEntry->MAC_PowerDelta;
+				/* pFinalTxPwr->field.Byte3 += pTxPowerTuningEntry->MAC_PowerDelta; */
+				DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] AsicAdjustTxPower(%x), after %x\n", TX_PWR_CFG_7, (UINT)TxPwrCfg7Over5390));
+			}
+			else
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("AsicAdjustTxPower %x -> %x.\n", TX_PWR_CFG_7, (UINT)TxPwrCfg7Over5390));
+			}
+			RTMP_IO_WRITE32(pAd, TX_PWR_CFG_7, TxPwrCfg7Over5390);
+
+			pFinalTxPwr = (PTX_PWR_CFG_STRUC)&TxPwrCfg8Over5392;
+			if (bAutoTxAgc && pAd->CommonCfg.TempComp != 0)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] AsicAdjustTxPower(%x), before %x\n", TX_PWR_CFG_8, (UINT)TxPwrCfg8Over5392));
+				pFinalTxPwr->field.Byte0 += pTxPowerTuningEntry->MAC_PowerDelta;
+				/* pFinalTxPwr->field.Byte1 += pTxPowerTuningEntry->MAC_PowerDelta; */
+				/* pFinalTxPwr->field.Byte2 += pTxPowerTuningEntry->MAC_PowerDelta; */
+				/* pFinalTxPwr->field.Byte3 += pTxPowerTuningEntry->MAC_PowerDelta; */
+				DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] AsicAdjustTxPower(%x), after %x\n", TX_PWR_CFG_8, (UINT)TxPwrCfg8Over5392));
+			}
+			else
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("AsicAdjustTxPower %x -> %x.\n", TX_PWR_CFG_8, (UINT)TxPwrCfg8Over5392));
+			}
+			RTMP_IO_WRITE32(pAd, TX_PWR_CFG_8, TxPwrCfg8Over5392);
+
+			pFinalTxPwr = (PTX_PWR_CFG_STRUC)&TxPwrCfg9Over5390;
+			if (bAutoTxAgc && pAd->CommonCfg.TempComp != 0)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] AsicAdjustTxPower(%x), before %x\n", TX_PWR_CFG_9, (UINT)TxPwrCfg9Over5390));
+				pFinalTxPwr->field.Byte0 += pTxPowerTuningEntry->MAC_PowerDelta;
+				/* pFinalTxPwr->field.Byte1 += pTxPowerTuningEntry->MAC_PowerDelta; */
+				/* pFinalTxPwr->field.Byte2 += pTxPowerTuningEntry->MAC_PowerDelta; */
+				/* pFinalTxPwr->field.Byte3 += pTxPowerTuningEntry->MAC_PowerDelta; */
+				DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] AsicAdjustTxPower(%x), after %x\n", TX_PWR_CFG_9, (UINT)TxPwrCfg9Over5390));
+		}
+			else
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("AsicAdjustTxPower %x -> %x.\n", TX_PWR_CFG_9, (UINT)TxPwrCfg9Over5390));
+			}
+			RTMP_IO_WRITE32(pAd, TX_PWR_CFG_9, TxPwrCfg9Over5390);
+		}
+		else 
+#endif /* RTMP_TEMPERATURE_COMPENSATION */
+		if (IS_RT5390(pAd))
+		{
+			RTMP_IO_WRITE32(pAd, TX_PWR_CFG_7, TxPwrCfg7Over5390);
+			RTMP_IO_WRITE32(pAd, TX_PWR_CFG_9, TxPwrCfg9Over5390);
+
+		DBGPRINT(RT_DEBUG_INFO, ("AsicAdjustTxPower: offset = 0x%X, TxPwr = 0x%08X, offset = 0x%X, TxPwr = 0x%08X\n", 
+			TX_PWR_CFG_7, 
+			(UINT)TxPwrCfg7Over5390, 
+			TX_PWR_CFG_9, 
+			(UINT)TxPwrCfg9Over5390));
+		}
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)		
+       }
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+
+
+}
+
+
+VOID AsicResetBBPAgent(
+IN PRTMP_ADAPTER pAd)
+{
+	BBP_CSR_CFG_STRUC	BbpCsr;
+
+	/* Still need to find why BBP agent keeps busy, but in fact, hardware still function ok. Now clear busy first. */
+	/* IF chipOps.AsicResetBbpAgent == NULL, run "else" part */
+	RTMP_CHIP_ASIC_RESET_BBP_AGENT(pAd);
+	else
+	{
+		DBGPRINT(RT_DEBUG_INFO, ("Reset BBP Agent busy bit.!! \n"));
+		RTMP_IO_READ32(pAd, H2M_BBP_AGENT, &BbpCsr.word);
+		BbpCsr.field.Busy = 0;
+		RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, BbpCsr.word);
+		}
+
+}
+#ifdef CONFIG_STA_SUPPORT
+/*
+	==========================================================================
+	Description:
+		put PHY to sleep here, and set next wakeup timer. PHY doesn't not wakeup 
+		automatically. Instead, MCU will issue a TwakeUpInterrupt to host after
+		the wakeup timer timeout. Driver has to issue a separate command to wake
+		PHY up.
+
+	IRQL = DISPATCH_LEVEL
+
+	==========================================================================
+ */
+VOID AsicSleepThenAutoWakeup(
+	IN PRTMP_ADAPTER pAd, 
+	IN USHORT TbttNumToNextWakeUp) 
+{
+	RTMP_STA_SLEEP_THEN_AUTO_WAKEUP(pAd, TbttNumToNextWakeUp);
+}
+
+/*
+	==========================================================================
+	Description:
+		AsicForceWakeup() is used whenever manual wakeup is required
+		AsicForceSleep() should only be used when not in INFRA BSS. When
+		in INFRA BSS, we should use AsicSleepThenAutoWakeup() instead.
+	==========================================================================
+ */
+VOID AsicForceSleep(
+	IN PRTMP_ADAPTER pAd)
+{
+
+}
+
+/*
+	==========================================================================
+	Description:
+		AsicForceWakeup() is used whenever Twakeup timer (set via AsicSleepThenAutoWakeup)
+		expired.
+
+	IRQL = PASSIVE_LEVEL
+	IRQL = DISPATCH_LEVEL
+	==========================================================================
+ */
+VOID AsicForceWakeup(
+	IN PRTMP_ADAPTER pAd,
+	IN BOOLEAN    bFromTx)
+{
+    DBGPRINT(RT_DEBUG_INFO, ("--> AsicForceWakeup \n"));
+    RTMP_STA_FORCE_WAKEUP(pAd, bFromTx);	
+}
+#endif /* CONFIG_STA_SUPPORT */
+
+
+/*
+	==========================================================================
+	Description:
+		Set My BSSID
+
+	IRQL = DISPATCH_LEVEL
+
+	==========================================================================
+ */
+VOID AsicSetBssid(
+	IN PRTMP_ADAPTER pAd, 
+	IN PUCHAR pBssid) 
+{
+	ULONG		  Addr4;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("==============> AsicSetBssid %x:%x:%x:%x:%x:%x\n",
+		pBssid[0],pBssid[1],pBssid[2],pBssid[3], pBssid[4],pBssid[5]));
+	
+	Addr4 = (ULONG)(pBssid[0])		 | 
+			(ULONG)(pBssid[1] << 8)  | 
+			(ULONG)(pBssid[2] << 16) |
+			(ULONG)(pBssid[3] << 24);
+	RTMP_IO_WRITE32(pAd, MAC_BSSID_DW0, Addr4);
+
+	Addr4 = 0;
+	/* always one BSSID in STA mode*/
+	Addr4 = (ULONG)(pBssid[4]) | (ULONG)(pBssid[5] << 8);
+
+	RTMP_IO_WRITE32(pAd, MAC_BSSID_DW1, Addr4);
+}
+
+VOID AsicSetMcastWC(
+	IN PRTMP_ADAPTER pAd) 
+{
+	MAC_TABLE_ENTRY *pEntry = &pAd->MacTab.Content[MCAST_WCID];
+	USHORT		offset;
+	
+	pEntry->Sst        = SST_ASSOC;
+	pEntry->Aid        = MCAST_WCID;	/* Softap supports 1 BSSID and use WCID=0 as multicast Wcid index*/
+	pEntry->PsMode     = PWR_ACTIVE;
+	pEntry->CurrTxRate = pAd->CommonCfg.MlmeRate; 
+	offset = MAC_WCID_BASE + BSS0Mcast_WCID * HW_WCID_ENTRY_SIZE;
+}
+
+/*
+	==========================================================================
+	Description:   
+
+	IRQL = DISPATCH_LEVEL
+
+	==========================================================================
+ */
+VOID AsicDelWcidTab(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR	Wcid) 
+{
+	ULONG		  Addr0 = 0x0, Addr1 = 0x0;
+	ULONG 		offset;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("AsicDelWcidTab==>Wcid = 0x%x\n",Wcid));
+	offset = MAC_WCID_BASE + Wcid * HW_WCID_ENTRY_SIZE;
+	RTMP_IO_WRITE32(pAd, offset, Addr0);
+	offset += 4;
+	RTMP_IO_WRITE32(pAd, offset, Addr1);
+}
+
+#ifdef DOT11_N_SUPPORT
+/*
+	==========================================================================
+	Description:
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+ */
+VOID AsicEnableRDG(
+	IN PRTMP_ADAPTER pAd) 
+{
+	TX_LINK_CFG_STRUC	TxLinkCfg;
+	UINT32				Data = 0;
+
+	RTMP_IO_READ32(pAd, TX_LINK_CFG, &TxLinkCfg.word);
+	TxLinkCfg.field.TxRDGEn = 1;
+	RTMP_IO_WRITE32(pAd, TX_LINK_CFG, TxLinkCfg.word);
+
+	RTMP_IO_READ32(pAd, EDCA_AC0_CFG, &Data);
+	Data  &= 0xFFFFFF00;
+	Data  |= 0x80;
+	RTMP_IO_WRITE32(pAd, EDCA_AC0_CFG, Data);
+
+	/*OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_AGGREGATION_INUSED);*/
+}
+
+/*
+	==========================================================================
+	Description:
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+ */
+VOID AsicDisableRDG(
+	IN PRTMP_ADAPTER pAd) 
+{
+	TX_LINK_CFG_STRUC	TxLinkCfg;
+	UINT32				Data = 0;
+
+
+
+	RTMP_IO_READ32(pAd, TX_LINK_CFG, &TxLinkCfg.word);
+	TxLinkCfg.field.TxRDGEn = 0;
+	RTMP_IO_WRITE32(pAd, TX_LINK_CFG, TxLinkCfg.word);
+
+	RTMP_IO_READ32(pAd, EDCA_AC0_CFG, &Data);
+	
+	Data  &= 0xFFFFFF00;
+	/*Data  |= 0x20;*/
+#ifndef WIFI_TEST
+	/*if ( pAd->CommonCfg.bEnableTxBurst )	*/
+	/*	Data |= 0x60;  for performance issue not set the TXOP to 0*/
+#endif
+	if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_DYNAMIC_BE_TXOP_ACTIVE) 
+#ifdef DOT11_N_SUPPORT
+		&& (pAd->MacTab.fAnyStationMIMOPSDynamic == FALSE)
+#endif /* DOT11_N_SUPPORT */
+	)
+	{
+		/* For CWC test, change txop from 0x30 to 0x20 in TxBurst mode*/
+		if (pAd->CommonCfg.bEnableTxBurst)
+		Data |= 0x20;
+	}
+	RTMP_IO_WRITE32(pAd, EDCA_AC0_CFG, Data);
+
+}
+#endif /* DOT11_N_SUPPORT */
+
+/*
+	==========================================================================
+	Description:
+
+	IRQL = PASSIVE_LEVEL
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+ */
+VOID AsicDisableSync(
+	IN PRTMP_ADAPTER pAd) 
+{
+	BCN_TIME_CFG_STRUC csr;
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("--->Disable TSF synchronization\n"));
+
+	/* 2003-12-20 disable TSF and TBTT while NIC in power-saving have side effect*/
+	/*			  that NIC will never wakes up because TSF stops and no more */
+	/*			  TBTT interrupts*/
+	pAd->TbttTickCount = 0;
+	RTMP_IO_READ32(pAd, BCN_TIME_CFG, &csr.word);
+	csr.field.bBeaconGen = 0;
+	csr.field.bTBTTEnable = 0;
+	csr.field.TsfSyncMode = 0;
+	csr.field.bTsfTicking = 0;
+	RTMP_IO_WRITE32(pAd, BCN_TIME_CFG, csr.word);
+
+}
+
+/*
+	==========================================================================
+	Description:
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+ */
+VOID AsicEnableBssSync(
+	IN PRTMP_ADAPTER pAd) 
+{
+	BCN_TIME_CFG_STRUC csr;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("--->AsicEnableBssSync(INFRA mode)\n"));
+
+	RTMP_IO_READ32(pAd, BCN_TIME_CFG, &csr.word);
+/*	RTMP_IO_WRITE32(pAd, BCN_TIME_CFG, 0x00000000);*/
+#ifdef CONFIG_STA_SUPPORT	
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		csr.field.BeaconInterval = pAd->CommonCfg.BeaconPeriod << 4; /* ASIC register in units of 1/16 TU*/
+		csr.field.bTsfTicking = 1;
+		csr.field.TsfSyncMode = 1; /* sync TSF in INFRASTRUCTURE mode*/
+		csr.field.bBeaconGen  = 0; /* do NOT generate BEACON*/
+		csr.field.bTBTTEnable = 1;
+	}
+#endif /* CONFIG_STA_SUPPORT */	
+	RTMP_IO_WRITE32(pAd, BCN_TIME_CFG, csr.word);
+}
+
+/*
+	==========================================================================
+	Description:
+	Note: 
+		BEACON frame in shared memory should be built ok before this routine
+		can be called. Otherwise, a garbage frame maybe transmitted out every
+		Beacon period.
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+ */
+VOID AsicEnableIbssSync(
+	IN PRTMP_ADAPTER pAd)
+{
+	BCN_TIME_CFG_STRUC csr9;
+	PUCHAR			ptr;
+	UINT i;
+	ULONG beaconBaseLocation = 0;
+	USHORT			beaconLen = pAd->BeaconTxWI.MPDUtotalByteCount;
+#ifdef SPECIFIC_BCN_BUF_SUPPORT	
+	unsigned long irqFlag = 0;
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */
+
+#ifdef RT_BIG_ENDIAN
+	TXWI_STRUC		localTxWI;
+	
+	NdisMoveMemory((PUCHAR)&localTxWI, (PUCHAR)&pAd->BeaconTxWI, TXWI_SIZE);
+	RTMPWIEndianChange((PUCHAR)&localTxWI, TYPE_TXWI);
+	beaconLen = localTxWI.MPDUtotalByteCount;
+#endif /* RT_BIG_ENDIAN */
+
+	DBGPRINT(RT_DEBUG_TRACE, ("--->AsicEnableIbssSync(MPDUtotalByteCount=%d, beaconLen=%d)\n", pAd->BeaconTxWI.MPDUtotalByteCount, beaconLen));
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("--->AsicEnableIbssSync(ADHOC mode. MPDUtotalByteCount = %d)\n", pAd->BeaconTxWI.MPDUtotalByteCount));
+
+	RTMP_IO_READ32(pAd, BCN_TIME_CFG, &csr9.word);
+	csr9.field.bBeaconGen = 0;
+	csr9.field.bTBTTEnable = 0;
+	csr9.field.bTsfTicking = 0;
+	RTMP_IO_WRITE32(pAd, BCN_TIME_CFG, csr9.word);
+
+	{
+		beaconBaseLocation = HW_BEACON_BASE0(pAd);
+	}
+
+#ifdef SPECIFIC_BCN_BUF_SUPPORT
+	RTMP_MAC_SHR_MSEL_LOCK(pAd, HIGHER_SHRMEM, irqFlag);
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */
+
+
+#ifdef RTMP_MAC_USB
+	/* move BEACON TXD and frame content to on-chip memory*/
+	ptr = (PUCHAR)&pAd->BeaconTxWI;
+	for (i=0; i<TXWI_SIZE; i+=2)  /* 16-byte TXWI field*/
+	{
+		/*UINT32 longptr =  *ptr + (*(ptr+1)<<8) + (*(ptr+2)<<16) + (*(ptr+3)<<24);*/
+		/*RTMP_IO_WRITE32(pAd, HW_BEACON_BASE0 + i, longptr);*/
+		RTUSBMultiWrite(pAd, HW_BEACON_BASE0(pAd) + i, ptr, 2);
+		ptr += 2;
+	}
+
+	/* start right after the 16-byte TXWI field*/
+	ptr = pAd->BeaconBuf;
+	/*for (i=0; i< pAd->BeaconTxWI.MPDUtotalByteCount; i+=2)*/
+	for (i=0; i< beaconLen; i+=2)
+	{
+		/*UINT32 longptr =  *ptr + (*(ptr+1)<<8) + (*(ptr+2)<<16) + (*(ptr+3)<<24);*/
+		/*RTMP_IO_WRITE32(pAd, HW_BEACON_BASE0 + TXWI_SIZE + i, longptr);*/
+		RTUSBMultiWrite(pAd, HW_BEACON_BASE0(pAd) + TXWI_SIZE + i, ptr, 2);
+		ptr +=2;
+	}
+#endif /* RTMP_MAC_USB */
+
+	{
+		/* do nothing*/
+	}
+
+#ifdef SPECIFIC_BCN_BUF_SUPPORT
+	RTMP_MAC_SHR_MSEL_UNLOCK(pAd, LOWER_SHRMEM, irqFlag);
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */
+
+	
+	/* For Wi-Fi faily generated beacons between participating stations. */
+	/* Set TBTT phase adaptive adjustment step to 8us (default 16us)*/
+	/* don't change settings 2006-5- by Jerry*/
+	/*RTMP_IO_WRITE32(pAd, TBTT_SYNC_CFG, 0x00001010);*/
+	
+	/* start sending BEACON*/
+	csr9.field.BeaconInterval = pAd->CommonCfg.BeaconPeriod << 4; /* ASIC register in units of 1/16 TU*/
+	csr9.field.bTsfTicking = 1;
+	csr9.field.TsfSyncMode = 2; /* sync TSF in IBSS mode*/
+	csr9.field.bTBTTEnable = 1;
+	csr9.field.bBeaconGen = 1;
+	RTMP_IO_WRITE32(pAd, BCN_TIME_CFG, csr9.word);
+}
+
+/*
+	==========================================================================
+	Description:
+
+	IRQL = PASSIVE_LEVEL
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+ */
+VOID AsicSetEdcaParm(
+	IN PRTMP_ADAPTER pAd,
+	IN PEDCA_PARM	 pEdcaParm)
+{
+	EDCA_AC_CFG_STRUC   Ac0Cfg, Ac1Cfg, Ac2Cfg, Ac3Cfg;
+	AC_TXOP_CSR0_STRUC csr0;
+	AC_TXOP_CSR1_STRUC csr1;
+	AIFSN_CSR_STRUC    AifsnCsr;
+	CWMIN_CSR_STRUC    CwminCsr;
+	CWMAX_CSR_STRUC    CwmaxCsr;
+	int i;
+
+	Ac0Cfg.word = 0;
+	Ac1Cfg.word = 0;
+	Ac2Cfg.word = 0;
+	Ac3Cfg.word = 0;
+	if ((pEdcaParm == NULL) || (pEdcaParm->bValid == FALSE))
+	{
+		DBGPRINT(RT_DEBUG_TRACE,("AsicSetEdcaParm\n"));
+		OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WMM_INUSED);
+		for (i=0; i<MAX_LEN_OF_MAC_TABLE; i++)
+		{
+			if (IS_ENTRY_CLIENT(&pAd->MacTab.Content[i]) || IS_ENTRY_APCLI(&pAd->MacTab.Content[i]))
+				CLIENT_STATUS_CLEAR_FLAG(&pAd->MacTab.Content[i], fCLIENT_STATUS_WMM_CAPABLE);
+		}
+
+		/*========================================================*/
+		/*      MAC Register has a copy .*/
+		/*========================================================*/
+/*#ifndef WIFI_TEST*/
+		if( pAd->CommonCfg.bEnableTxBurst )		
+		{
+			/* For CWC test, change txop from 0x30 to 0x20 in TxBurst mode*/
+			Ac0Cfg.field.AcTxop = 0x20; /* Suggest by John for TxBurst in HT Mode*/
+		}
+		else
+			Ac0Cfg.field.AcTxop = 0;	/* QID_AC_BE*/
+/*#else*/
+/*		Ac0Cfg.field.AcTxop = 0;	 QID_AC_BE*/
+/*#endif					*/
+		Ac0Cfg.field.Cwmin = CW_MIN_IN_BITS;
+		Ac0Cfg.field.Cwmax = CW_MAX_IN_BITS;
+		Ac0Cfg.field.Aifsn = 2;
+		RTMP_IO_WRITE32(pAd, EDCA_AC0_CFG, Ac0Cfg.word);
+
+		Ac1Cfg.field.AcTxop = 0;	/* QID_AC_BK*/
+		Ac1Cfg.field.Cwmin = CW_MIN_IN_BITS;
+		Ac1Cfg.field.Cwmax = CW_MAX_IN_BITS;
+		Ac1Cfg.field.Aifsn = 2;
+		RTMP_IO_WRITE32(pAd, EDCA_AC1_CFG, Ac1Cfg.word);
+
+		if (pAd->CommonCfg.PhyMode == PHY_11B)
+		{
+			Ac2Cfg.field.AcTxop = 192;	/* AC_VI: 192*32us ~= 6ms*/
+			Ac3Cfg.field.AcTxop = 96;	/* AC_VO: 96*32us  ~= 3ms*/
+		}
+		else
+		{
+			Ac2Cfg.field.AcTxop = 96;	/* AC_VI: 96*32us ~= 3ms*/
+			Ac3Cfg.field.AcTxop = 48;	/* AC_VO: 48*32us ~= 1.5ms*/
+		}
+		Ac2Cfg.field.Cwmin = CW_MIN_IN_BITS;
+		Ac2Cfg.field.Cwmax = CW_MAX_IN_BITS;
+		Ac2Cfg.field.Aifsn = 2;
+		RTMP_IO_WRITE32(pAd, EDCA_AC2_CFG, Ac2Cfg.word);
+		Ac3Cfg.field.Cwmin = CW_MIN_IN_BITS;
+		Ac3Cfg.field.Cwmax = CW_MAX_IN_BITS;
+		Ac3Cfg.field.Aifsn = 2;
+		RTMP_IO_WRITE32(pAd, EDCA_AC3_CFG, Ac3Cfg.word);
+
+		/*========================================================*/
+		/*      DMA Register has a copy too.*/
+		/*========================================================*/
+		csr0.field.Ac0Txop = 0;		/* QID_AC_BE*/
+		csr0.field.Ac1Txop = 0;		/* QID_AC_BK*/
+		RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
+		if (pAd->CommonCfg.PhyMode == PHY_11B)
+		{
+			csr1.field.Ac2Txop = 192;		/* AC_VI: 192*32us ~= 6ms*/
+			csr1.field.Ac3Txop = 96;		/* AC_VO: 96*32us  ~= 3ms*/
+		}
+		else
+		{
+			csr1.field.Ac2Txop = 96;		/* AC_VI: 96*32us ~= 3ms*/
+			csr1.field.Ac3Txop = 48;		/* AC_VO: 48*32us ~= 1.5ms*/
+		}
+		RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr1.word);
+
+		CwminCsr.word = 0;
+		CwminCsr.field.Cwmin0 = CW_MIN_IN_BITS;
+		CwminCsr.field.Cwmin1 = CW_MIN_IN_BITS;
+		CwminCsr.field.Cwmin2 = CW_MIN_IN_BITS;
+		CwminCsr.field.Cwmin3 = CW_MIN_IN_BITS;
+		RTMP_IO_WRITE32(pAd, WMM_CWMIN_CFG, CwminCsr.word);
+
+		CwmaxCsr.word = 0;
+		CwmaxCsr.field.Cwmax0 = CW_MAX_IN_BITS;
+		CwmaxCsr.field.Cwmax1 = CW_MAX_IN_BITS;
+		CwmaxCsr.field.Cwmax2 = CW_MAX_IN_BITS;
+		CwmaxCsr.field.Cwmax3 = CW_MAX_IN_BITS;
+		RTMP_IO_WRITE32(pAd, WMM_CWMAX_CFG, CwmaxCsr.word);
+
+		RTMP_IO_WRITE32(pAd, WMM_AIFSN_CFG, 0x00002222);
+
+		NdisZeroMemory(&pAd->CommonCfg.APEdcaParm, sizeof(EDCA_PARM));
+
+	}
+	else
+	{
+		OPSTATUS_SET_FLAG(pAd, fOP_STATUS_WMM_INUSED);
+		/*========================================================*/
+		/*      MAC Register has a copy.*/
+		/*========================================================*/
+		
+		/* Modify Cwmin/Cwmax/Txop on queue[QID_AC_VI], Recommend by Jerry 2005/07/27*/
+		/* To degrade our VIDO Queue's throughput for WiFi WMM S3T07 Issue.*/
+		
+		/*pEdcaParm->Txop[QID_AC_VI] = pEdcaParm->Txop[QID_AC_VI] * 7 / 10;  rt2860c need this		*/
+
+		Ac0Cfg.field.AcTxop =  pEdcaParm->Txop[QID_AC_BE];
+		Ac0Cfg.field.Cwmin= pEdcaParm->Cwmin[QID_AC_BE];
+		Ac0Cfg.field.Cwmax = pEdcaParm->Cwmax[QID_AC_BE];
+		Ac0Cfg.field.Aifsn = pEdcaParm->Aifsn[QID_AC_BE]; /*+1;*/
+
+		Ac1Cfg.field.AcTxop =  pEdcaParm->Txop[QID_AC_BK];
+		Ac1Cfg.field.Cwmin = pEdcaParm->Cwmin[QID_AC_BK]; /*+2; */
+		Ac1Cfg.field.Cwmax = pEdcaParm->Cwmax[QID_AC_BK];
+		Ac1Cfg.field.Aifsn = pEdcaParm->Aifsn[QID_AC_BK]; /*+1;*/
+
+
+		Ac2Cfg.field.AcTxop = (pEdcaParm->Txop[QID_AC_VI] * 6) / 10;
+		{
+			Ac2Cfg.field.Cwmin = pEdcaParm->Cwmin[QID_AC_VI];
+			Ac2Cfg.field.Cwmax = pEdcaParm->Cwmax[QID_AC_VI];
+		}
+		Ac2Cfg.field.Aifsn = pEdcaParm->Aifsn[QID_AC_VI] + 1;
+#ifdef CONFIG_STA_SUPPORT
+#ifdef RTMP_MAC_USB
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			if(pAd->Antenna.field.TxPath == 1)
+				Ac2Cfg.field.Aifsn = pEdcaParm->Aifsn[QID_AC_VI] + 1;/* 5.2.27 T6 Pass Tx VI+BE, but will impack 5.2.27/28 T7. Tx VI*/
+			else
+				Ac2Cfg.field.Aifsn = pEdcaParm->Aifsn[QID_AC_VI] + 3;
+		}	
+#endif /* RTMP_MAC_USB */
+#endif /* CONFIG_STA_SUPPORT */
+		
+#ifdef INF_AMAZON_SE
+#endif /* INF_AMAZON_SE */
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			/* Tuning for Wi-Fi WMM S06*/
+			if (pAd->CommonCfg.bWiFiTest && 
+				pEdcaParm->Aifsn[QID_AC_VI] == 10)
+				Ac2Cfg.field.Aifsn -= 1; 
+
+			/* Tuning for TGn Wi-Fi 5.2.32*/
+			/* STA TestBed changes in this item: conexant legacy sta ==> broadcom 11n sta*/
+			if (STA_TGN_WIFI_ON(pAd) && 
+				pEdcaParm->Aifsn[QID_AC_VI] == 10)
+			{
+				Ac0Cfg.field.Aifsn = 3;
+				Ac2Cfg.field.AcTxop = 5;
+			}
+			
+#ifdef RT30xx
+			if (pAd->RfIcType == RFIC_3020 || pAd->RfIcType == RFIC_2020)
+			{
+				/* Tuning for WiFi WMM S3-T07: connexant legacy sta ==> broadcom 11n sta.*/
+				Ac2Cfg.field.Aifsn = 5;
+			}
+#endif /* RT30xx */
+		}
+#endif /* CONFIG_STA_SUPPORT */
+
+		Ac3Cfg.field.AcTxop = pEdcaParm->Txop[QID_AC_VO];
+		Ac3Cfg.field.Cwmin = pEdcaParm->Cwmin[QID_AC_VO];
+		Ac3Cfg.field.Cwmax = pEdcaParm->Cwmax[QID_AC_VO];
+		Ac3Cfg.field.Aifsn = pEdcaParm->Aifsn[QID_AC_VO];
+
+
+
+/*#ifdef WIFI_TEST*/
+		if (pAd->CommonCfg.bWiFiTest)
+		{
+			if (Ac3Cfg.field.AcTxop == 102)
+			{
+			Ac0Cfg.field.AcTxop = pEdcaParm->Txop[QID_AC_BE] ? pEdcaParm->Txop[QID_AC_BE] : 10;
+				Ac0Cfg.field.Aifsn  = pEdcaParm->Aifsn[QID_AC_BE]-1; /* AIFSN must >= 1 */
+			Ac1Cfg.field.AcTxop = pEdcaParm->Txop[QID_AC_BK];
+				Ac1Cfg.field.Aifsn  = pEdcaParm->Aifsn[QID_AC_BK];
+			Ac2Cfg.field.AcTxop = pEdcaParm->Txop[QID_AC_VI];
+			} /* End of if */
+		}
+/*#endif  WIFI_TEST */
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+
+		RTMP_IO_WRITE32(pAd, EDCA_AC0_CFG, Ac0Cfg.word);
+		RTMP_IO_WRITE32(pAd, EDCA_AC1_CFG, Ac1Cfg.word);
+		RTMP_IO_WRITE32(pAd, EDCA_AC2_CFG, Ac2Cfg.word);
+		RTMP_IO_WRITE32(pAd, EDCA_AC3_CFG, Ac3Cfg.word);
+
+
+		/*========================================================*/
+		/*      DMA Register has a copy too.*/
+		/*========================================================*/
+		csr0.field.Ac0Txop = Ac0Cfg.field.AcTxop;
+		csr0.field.Ac1Txop = Ac1Cfg.field.AcTxop;
+		RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
+
+		csr1.field.Ac2Txop = Ac2Cfg.field.AcTxop;
+		csr1.field.Ac3Txop = Ac3Cfg.field.AcTxop;
+		RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr1.word);
+
+		CwminCsr.word = 0;
+		CwminCsr.field.Cwmin0 = pEdcaParm->Cwmin[QID_AC_BE];
+		CwminCsr.field.Cwmin1 = pEdcaParm->Cwmin[QID_AC_BK];
+		CwminCsr.field.Cwmin2 = pEdcaParm->Cwmin[QID_AC_VI];
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+			CwminCsr.field.Cwmin3 = pEdcaParm->Cwmin[QID_AC_VO] - 1; /*for TGn wifi test*/
+#endif /* CONFIG_STA_SUPPORT */
+		RTMP_IO_WRITE32(pAd, WMM_CWMIN_CFG, CwminCsr.word);
+
+		CwmaxCsr.word = 0;
+		CwmaxCsr.field.Cwmax0 = pEdcaParm->Cwmax[QID_AC_BE];
+		CwmaxCsr.field.Cwmax1 = pEdcaParm->Cwmax[QID_AC_BK];
+		CwmaxCsr.field.Cwmax2 = pEdcaParm->Cwmax[QID_AC_VI];
+		CwmaxCsr.field.Cwmax3 = pEdcaParm->Cwmax[QID_AC_VO];
+		RTMP_IO_WRITE32(pAd, WMM_CWMAX_CFG, CwmaxCsr.word);
+
+		AifsnCsr.word = 0;
+		AifsnCsr.field.Aifsn0 = Ac0Cfg.field.Aifsn; /*pEdcaParm->Aifsn[QID_AC_BE];*/
+		AifsnCsr.field.Aifsn1 = Ac1Cfg.field.Aifsn; /*pEdcaParm->Aifsn[QID_AC_BK];*/
+#ifdef CONFIG_STA_SUPPORT
+#ifdef RTMP_MAC_USB
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			if(pAd->Antenna.field.TxPath == 1)
+				AifsnCsr.field.Aifsn1 = Ac1Cfg.field.Aifsn + 2; 	/*5.2.27 T7 Pass*/
+		}
+#endif /* RTMP_MAC_USB */
+#endif /* CONFIG_STA_SUPPORT */
+		AifsnCsr.field.Aifsn2 = Ac2Cfg.field.Aifsn; /*pEdcaParm->Aifsn[QID_AC_VI];*/
+#ifdef INF_AMAZON_SE
+#endif /* INF_AMAZON_SE */
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			/* Tuning for Wi-Fi WMM S06*/
+			if (pAd->CommonCfg.bWiFiTest &&
+				pEdcaParm->Aifsn[QID_AC_VI] == 10)
+				AifsnCsr.field.Aifsn2 = Ac2Cfg.field.Aifsn - 4;
+
+			/* Tuning for TGn Wi-Fi 5.2.32*/
+			/* STA TestBed changes in this item: connexant legacy sta ==> broadcom 11n sta*/
+			if (STA_TGN_WIFI_ON(pAd) && 
+				pEdcaParm->Aifsn[QID_AC_VI] == 10)
+			{
+				AifsnCsr.field.Aifsn0 = 3;
+				AifsnCsr.field.Aifsn2 = 7;
+			}
+
+			if (INFRA_ON(pAd))
+				CLIENT_STATUS_SET_FLAG(&pAd->MacTab.Content[BSSID_WCID], fCLIENT_STATUS_WMM_CAPABLE);
+		}
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			AifsnCsr.field.Aifsn3 = Ac3Cfg.field.Aifsn - 1; /*pEdcaParm->Aifsn[QID_AC_VO]; for TGn wifi test*/
+#ifdef RT30xx
+			/* TODO: Shiang, this modification also suitable for RT3052/RT3050 ???*/
+			if (pAd->RfIcType == RFIC_3020 || pAd->RfIcType == RFIC_2020
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+				|| IS_RT5390(pAd)
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+			)
+			{
+				IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+					AifsnCsr.field.Aifsn2 = 0x2; /*pEdcaParm->Aifsn[QID_AC_VI]; for WiFi WMM S4-T04.*/
+			}
+#endif /* RT30xx */
+		}
+#endif /* CONFIG_STA_SUPPORT */
+		RTMP_IO_WRITE32(pAd, WMM_AIFSN_CFG, AifsnCsr.word);
+
+		NdisMoveMemory(&pAd->CommonCfg.APEdcaParm, pEdcaParm, sizeof(EDCA_PARM));
+		if (!ADHOC_ON(pAd))
+		{
+			DBGPRINT(RT_DEBUG_TRACE,("EDCA [#%d]: AIFSN CWmin CWmax  TXOP(us)  ACM\n", pEdcaParm->EdcaUpdateCount));
+			DBGPRINT(RT_DEBUG_TRACE,("     AC_BE      %2d     %2d     %2d      %4d     %d\n",
+									 pEdcaParm->Aifsn[0],
+									 pEdcaParm->Cwmin[0],
+									 pEdcaParm->Cwmax[0],
+									 pEdcaParm->Txop[0]<<5,
+									 pEdcaParm->bACM[0]));
+			DBGPRINT(RT_DEBUG_TRACE,("     AC_BK      %2d     %2d     %2d      %4d     %d\n",
+									 pEdcaParm->Aifsn[1],
+									 pEdcaParm->Cwmin[1],
+									 pEdcaParm->Cwmax[1],
+									 pEdcaParm->Txop[1]<<5,
+									 pEdcaParm->bACM[1]));
+			DBGPRINT(RT_DEBUG_TRACE,("     AC_VI      %2d     %2d     %2d      %4d     %d\n",
+									 pEdcaParm->Aifsn[2],
+									 pEdcaParm->Cwmin[2],
+									 pEdcaParm->Cwmax[2],
+									 pEdcaParm->Txop[2]<<5,
+									 pEdcaParm->bACM[2]));
+			DBGPRINT(RT_DEBUG_TRACE,("     AC_VO      %2d     %2d     %2d      %4d     %d\n",
+									 pEdcaParm->Aifsn[3],
+									 pEdcaParm->Cwmin[3],
+									 pEdcaParm->Cwmax[3],
+									 pEdcaParm->Txop[3]<<5,
+									 pEdcaParm->bACM[3]));
+		}
+
+	}
+}
+
+/*
+	==========================================================================
+	Description:
+
+	IRQL = PASSIVE_LEVEL
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+ */
+VOID 	AsicSetSlotTime(
+	IN PRTMP_ADAPTER pAd,
+	IN BOOLEAN bUseShortSlotTime) 
+{
+	ULONG	SlotTime;
+	UINT32	RegValue = 0;
+
+#ifdef CONFIG_STA_SUPPORT
+	if (pAd->CommonCfg.Channel > 14)
+		bUseShortSlotTime = TRUE;
+#endif /* CONFIG_STA_SUPPORT */
+
+	if (bUseShortSlotTime && OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_SHORT_SLOT_INUSED))
+		return;
+	else if ((!bUseShortSlotTime) && (!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_SHORT_SLOT_INUSED)))
+		return;
+
+	if (bUseShortSlotTime)
+		OPSTATUS_SET_FLAG(pAd, fOP_STATUS_SHORT_SLOT_INUSED);
+	else
+		OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_SLOT_INUSED);
+
+	SlotTime = (bUseShortSlotTime)? 9 : 20;
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		/* force using short SLOT time for FAE to demo performance when TxBurst is ON*/
+		if (((pAd->StaActive.SupportedPhyInfo.bHtEnable == FALSE) && (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_WMM_INUSED)))
+#ifdef DOT11_N_SUPPORT
+			|| ((pAd->StaActive.SupportedPhyInfo.bHtEnable == TRUE) && (pAd->CommonCfg.BACapability.field.Policy == BA_NOTUSE))
+#endif /* DOT11_N_SUPPORT */
+			)
+		{
+			/* In this case, we will think it is doing Wi-Fi test*/
+			/* And we will not set to short slot when bEnableTxBurst is TRUE.*/
+		}
+		else if (pAd->CommonCfg.bEnableTxBurst)
+		{
+			OPSTATUS_SET_FLAG(pAd, fOP_STATUS_SHORT_SLOT_INUSED);
+			SlotTime = 9;
+		}
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	
+	/* For some reasons, always set it to short slot time.*/
+	/* */
+	/* ToDo: Should consider capability with 11B*/
+	
+#ifdef CONFIG_STA_SUPPORT 
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		if (pAd->StaCfg.BssType == BSS_ADHOC)	
+		{
+			OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_SLOT_INUSED);
+			SlotTime = 20;
+		}
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	RTMP_IO_READ32(pAd, BKOFF_SLOT_CFG, &RegValue);
+	RegValue = RegValue & 0xFFFFFF00;
+
+	RegValue |= SlotTime;
+
+	RTMP_IO_WRITE32(pAd, BKOFF_SLOT_CFG, RegValue);
+}
+
+/*
+	========================================================================
+	Description:
+		Add Shared key information into ASIC. 
+		Update shared key, TxMic and RxMic to Asic Shared key table
+		Update its cipherAlg to Asic Shared key Mode.
+		
+    Return:
+	========================================================================
+*/
+VOID AsicAddSharedKeyEntry(
+	IN PRTMP_ADAPTER 	pAd,
+	IN UCHAR		 	BssIndex,
+	IN UCHAR		 	KeyIdx,
+	IN PCIPHER_KEY		pCipherKey)
+{
+	ULONG offset; /*, csr0;*/
+	SHAREDKEY_MODE_STRUC csr1;
+
+	PUCHAR		pKey = pCipherKey->Key;
+	PUCHAR		pTxMic = pCipherKey->TxMic;
+	PUCHAR		pRxMic = pCipherKey->RxMic;
+	UCHAR		CipherAlg = pCipherKey->CipherAlg;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("AsicAddSharedKeyEntry BssIndex=%d, KeyIdx=%d\n", BssIndex,KeyIdx));
+/*============================================================================================*/
+
+	DBGPRINT(RT_DEBUG_TRACE,("AsicAddSharedKeyEntry: %s key #%d\n", CipherName[CipherAlg], BssIndex*4 + KeyIdx));
+	DBGPRINT_RAW(RT_DEBUG_TRACE, (" 	Key = %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n",
+		pKey[0],pKey[1],pKey[2],pKey[3],pKey[4],pKey[5],pKey[6],pKey[7],pKey[8],pKey[9],pKey[10],pKey[11],pKey[12],pKey[13],pKey[14],pKey[15]));
+	if (pRxMic)
+	{
+		DBGPRINT_RAW(RT_DEBUG_TRACE, (" 	Rx MIC Key = %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n",
+			pRxMic[0],pRxMic[1],pRxMic[2],pRxMic[3],pRxMic[4],pRxMic[5],pRxMic[6],pRxMic[7]));
+	}
+	if (pTxMic)
+	{
+		DBGPRINT_RAW(RT_DEBUG_TRACE, (" 	Tx MIC Key = %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n",
+			pTxMic[0],pTxMic[1],pTxMic[2],pTxMic[3],pTxMic[4],pTxMic[5],pTxMic[6],pTxMic[7]));
+	}
+/*============================================================================================*/
+	
+	/* fill key material - key + TX MIC + RX MIC*/
+	
+
+#ifdef RTMP_MAC_USB
+{
+	offset = SHARED_KEY_TABLE_BASE + (4*BssIndex + KeyIdx)*HW_KEY_ENTRY_SIZE;
+	RTUSBMultiWrite(pAd, offset, pKey, MAX_LEN_OF_SHARE_KEY);
+
+	offset += MAX_LEN_OF_SHARE_KEY;
+	if (pTxMic)
+	{
+		RTUSBMultiWrite(pAd, offset, pTxMic, 8);
+	}
+
+	offset += 8;
+	if (pRxMic)
+	{
+		RTUSBMultiWrite(pAd, offset, pRxMic, 8);
+	}
+}
+#endif /* RTMP_MAC_USB */
+
+	
+	/* Update cipher algorithm. WSTA always use BSS0*/
+	
+	RTMP_IO_READ32(pAd, SHARED_KEY_MODE_BASE+4*(BssIndex/2), &csr1.word);
+	DBGPRINT(RT_DEBUG_TRACE,("Read: SHARED_KEY_MODE_BASE at this Bss[%d] KeyIdx[%d]= 0x%x \n", BssIndex,KeyIdx, csr1.word));
+	if ((BssIndex%2) == 0)
+	{
+		if (KeyIdx == 0)
+			csr1.field.Bss0Key0CipherAlg = CipherAlg;
+		else if (KeyIdx == 1)
+			csr1.field.Bss0Key1CipherAlg = CipherAlg;
+		else if (KeyIdx == 2)
+			csr1.field.Bss0Key2CipherAlg = CipherAlg;
+		else
+			csr1.field.Bss0Key3CipherAlg = CipherAlg;
+	}
+	else
+	{
+		if (KeyIdx == 0)
+			csr1.field.Bss1Key0CipherAlg = CipherAlg;
+		else if (KeyIdx == 1)
+			csr1.field.Bss1Key1CipherAlg = CipherAlg;
+		else if (KeyIdx == 2)
+			csr1.field.Bss1Key2CipherAlg = CipherAlg;
+		else
+			csr1.field.Bss1Key3CipherAlg = CipherAlg;
+	}
+	DBGPRINT(RT_DEBUG_TRACE,("Write: SHARED_KEY_MODE_BASE at this Bss[%d] = 0x%x \n", BssIndex, csr1.word));
+	RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE+4*(BssIndex/2), csr1.word);
+		
+}
+
+/*	IRQL = DISPATCH_LEVEL*/
+VOID AsicRemoveSharedKeyEntry(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR		 BssIndex,
+	IN UCHAR		 KeyIdx)
+{
+	/*ULONG SecCsr0;*/
+	SHAREDKEY_MODE_STRUC csr1;
+
+	DBGPRINT(RT_DEBUG_TRACE,("AsicRemoveSharedKeyEntry: #%d \n", BssIndex*4 + KeyIdx));
+
+	RTMP_IO_READ32(pAd, SHARED_KEY_MODE_BASE+4*(BssIndex/2), &csr1.word);
+	if ((BssIndex%2) == 0)
+	{
+		if (KeyIdx == 0)
+			csr1.field.Bss0Key0CipherAlg = 0;
+		else if (KeyIdx == 1)
+			csr1.field.Bss0Key1CipherAlg = 0;
+		else if (KeyIdx == 2)
+			csr1.field.Bss0Key2CipherAlg = 0;
+		else
+			csr1.field.Bss0Key3CipherAlg = 0;
+	}
+	else
+	{
+		if (KeyIdx == 0)
+			csr1.field.Bss1Key0CipherAlg = 0;
+		else if (KeyIdx == 1)
+			csr1.field.Bss1Key1CipherAlg = 0;
+		else if (KeyIdx == 2)
+			csr1.field.Bss1Key2CipherAlg = 0;
+		else
+			csr1.field.Bss1Key3CipherAlg = 0;
+	}
+	DBGPRINT(RT_DEBUG_TRACE,("Write: SHARED_KEY_MODE_BASE at this Bss[%d] = 0x%x \n", BssIndex, csr1.word));
+	RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE+4*(BssIndex/2), csr1.word);
+	ASSERT(BssIndex < 4);
+	ASSERT(KeyIdx < 4);
+
+}
+
+VOID AsicUpdateWCIDIVEIV(
+	IN PRTMP_ADAPTER pAd,
+	IN USHORT		WCID,
+	IN ULONG        uIV,
+	IN ULONG        uEIV)
+{
+	ULONG	offset;
+
+	offset = MAC_IVEIV_TABLE_BASE + (WCID * HW_IVEIV_ENTRY_SIZE);
+
+	RTMP_IO_WRITE32(pAd, offset, uIV);
+	RTMP_IO_WRITE32(pAd, offset + 4, uEIV);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: wcid(%d) 0x%08lx, 0x%08lx \n", 
+									__FUNCTION__, WCID, uIV, uEIV));	
+}
+
+VOID AsicUpdateRxWCIDTable(
+	IN PRTMP_ADAPTER pAd,
+	IN USHORT		WCID,
+	IN PUCHAR        pAddr)
+{
+	ULONG offset;
+	ULONG Addr;
+	
+	offset = MAC_WCID_BASE + (WCID * HW_WCID_ENTRY_SIZE);	
+	Addr = pAddr[0] + (pAddr[1] << 8) +(pAddr[2] << 16) +(pAddr[3] << 24);
+	RTMP_IO_WRITE32(pAd, offset, Addr);
+	Addr = pAddr[4] + (pAddr[5] << 8);
+	RTMP_IO_WRITE32(pAd, offset + 4, Addr);	
+}
+	
+/*
+	========================================================================
+	Description:
+		Add Client security information into ASIC WCID table and IVEIV table.
+    Return:
+
+    Note :
+		The key table selection rule :
+    	1.	Wds-links and Mesh-links always use Pair-wise key table. 	
+		2. 	When the CipherAlg is TKIP, AES, SMS4 or the dynamic WEP is enabled, 
+			it needs to set key into Pair-wise Key Table.
+		3.	The pair-wise key security mode is set NONE, it means as no security.
+		4.	In STA Adhoc mode, it always use shared key table.
+		5.	Otherwise, use shared key table
+
+	========================================================================
+*/
+VOID	AsicUpdateWcidAttributeEntry(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			BssIdx,
+	IN 	UCHAR		 	KeyIdx,
+	IN 	UCHAR		 	CipherAlg,
+	IN	UINT8			Wcid,
+	IN	UINT8			KeyTabFlag)
+{
+	WCID_ATTRIBUTE_STRUC WCIDAttri;	
+	USHORT		offset;
+
+	/* Initialize the content of WCID Attribue  */
+	WCIDAttri.word = 0;
+
+	/* The limitation of HW WCID table */
+	if (/*Wcid < 1 ||*/ Wcid > 254)
+	{		
+		DBGPRINT(RT_DEBUG_WARN, ("%s: Wcid is invalid (%d). \n", 
+										__FUNCTION__, Wcid));	
+		return;
+	}
+
+	/* Update the pairwise key security mode.
+	   Use bit10 and bit3~1 to indicate the pairwise cipher mode */	
+	WCIDAttri.field.PairKeyModeExt = ((CipherAlg & 0x08) >> 3);
+	WCIDAttri.field.PairKeyMode = (CipherAlg & 0x07);
+
+	/* Update the MBSS index.
+	   Use bit11 and bit6~4 to indicate the BSS index */	
+	WCIDAttri.field.BSSIdxExt = ((BssIdx & 0x08) >> 3);
+	WCIDAttri.field.BSSIdx = (BssIdx & 0x07);
+
+	
+	/* Assign Key Table selection */		
+	WCIDAttri.field.KeyTab = KeyTabFlag;
+
+	/* Update related information to ASIC */
+	offset = MAC_WCID_ATTRIBUTE_BASE + (Wcid * HW_WCID_ATTRI_SIZE);
+	RTMP_IO_WRITE32(pAd, offset, WCIDAttri.word);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("%s : WCID #%d, KeyIndex #%d, Alg=%s\n", __FUNCTION__, Wcid, KeyIdx, CipherName[CipherAlg]));
+	DBGPRINT(RT_DEBUG_TRACE, ("		WCIDAttri = 0x%x \n", WCIDAttri.word));	
+	
+}
+	
+
+/*
+	========================================================================
+	Description:
+		Add Pair-wise key material into ASIC. 
+		Update pairwise key, TxMic and RxMic to Asic Pair-wise key table
+				
+    Return:
+	========================================================================
+*/
+VOID AsicAddPairwiseKeyEntry(
+	IN PRTMP_ADAPTER 	pAd,
+	IN UCHAR			WCID,
+	IN PCIPHER_KEY		pCipherKey)
+{
+	INT i;
+	ULONG 		offset;
+	PUCHAR		 pKey = pCipherKey->Key;
+	PUCHAR		 pTxMic = pCipherKey->TxMic;
+	PUCHAR		 pRxMic = pCipherKey->RxMic;
+	UCHAR		CipherAlg = pCipherKey->CipherAlg;
+#ifdef SPECIFIC_BCN_BUF_SUPPORT
+	unsigned long irqFlag = 0;
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */
+
+#ifdef SPECIFIC_BCN_BUF_SUPPORT
+	RTMP_MAC_SHR_MSEL_LOCK(pAd, LOWER_SHRMEM, irqFlag);
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */
+	
+	/* EKEY*/
+	offset = PAIRWISE_KEY_TABLE_BASE + (WCID * HW_KEY_ENTRY_SIZE);
+#ifdef RTMP_MAC_USB
+	RTUSBMultiWrite(pAd, offset, &pCipherKey->Key[0], MAX_LEN_OF_PEER_KEY);
+#endif /* RTMP_MAC_USB */
+	for (i=0; i<MAX_LEN_OF_PEER_KEY; i+=4)
+	{
+		UINT32 Value;
+		RTMP_IO_READ32(pAd, offset + i, &Value);
+	}
+
+	offset += MAX_LEN_OF_PEER_KEY;
+	
+	/*  MIC KEY*/
+	if (pTxMic)
+	{
+#ifdef RTMP_MAC_USB
+		RTUSBMultiWrite(pAd, offset, &pCipherKey->TxMic[0], 8);
+#endif /* RTMP_MAC_USB */
+	}
+	offset += 8;
+	if (pRxMic)
+	{
+#ifdef RTMP_MAC_USB
+		RTUSBMultiWrite(pAd, offset, &pCipherKey->RxMic[0], 8);
+#endif /* RTMP_MAC_USB */
+	}
+
+#ifdef SPECIFIC_BCN_BUF_SUPPORT
+	RTMP_MAC_SHR_MSEL_UNLOCK(pAd, LOWER_SHRMEM, irqFlag);
+#endif /* SPECIFIC_BCN_BUF_SUPPORT*/
+
+	DBGPRINT(RT_DEBUG_TRACE,("AsicAddPairwiseKeyEntry: WCID #%d Alg=%s\n",WCID, CipherName[CipherAlg]));
+	DBGPRINT(RT_DEBUG_TRACE,("	Key = %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n",
+		pKey[0],pKey[1],pKey[2],pKey[3],pKey[4],pKey[5],pKey[6],pKey[7],pKey[8],pKey[9],pKey[10],pKey[11],pKey[12],pKey[13],pKey[14],pKey[15]));
+	if (pRxMic)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("	Rx MIC Key = %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n",
+			pRxMic[0],pRxMic[1],pRxMic[2],pRxMic[3],pRxMic[4],pRxMic[5],pRxMic[6],pRxMic[7]));
+	}
+	if (pTxMic)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("	Tx MIC Key = %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n",
+			pTxMic[0],pTxMic[1],pTxMic[2],pTxMic[3],pTxMic[4],pTxMic[5],pTxMic[6],pTxMic[7]));
+	}
+}
+/*
+	========================================================================
+	Description:
+		Remove Pair-wise key material from ASIC. 
+
+    Return:
+	========================================================================
+*/	
+VOID AsicRemovePairwiseKeyEntry(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR		 Wcid)
+{
+	/* Set the specific WCID attribute entry as OPEN-NONE */
+	AsicUpdateWcidAttributeEntry(pAd, 
+							  BSS0,
+							  0,
+							  CIPHER_NONE, 
+							  Wcid,
+							  PAIRWISEKEYTABLE);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("%s : Wcid #%d \n", __FUNCTION__, Wcid));
+}
+
+BOOLEAN AsicSendCommandToMcu(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR		 Command,
+	IN UCHAR		 Token,
+	IN UCHAR		 Arg0,
+	IN UCHAR		 Arg1)
+{
+	if (pAd->chipOps.sendCommandToMcu)
+		return pAd->chipOps.sendCommandToMcu(pAd, Command, Token, Arg0, Arg1, TRUE);
+	else
+		return FALSE;
+}
+
+
+BOOLEAN AsicSendCommandToMcuBBP(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR		 Command,
+	IN UCHAR		 Token,
+	IN UCHAR		 Arg0,
+	IN UCHAR		 Arg1,
+	IN BOOLEAN		FlgIsNeedLocked)
+{
+	if (pAd->chipOps.sendCommandToMcu)
+		return pAd->chipOps.sendCommandToMcu(pAd, Command, Token, Arg0, Arg1, FlgIsNeedLocked);
+	else
+		return FALSE;
+}
+
+/*
+	========================================================================
+	Description:
+		For 1x1 chipset : 2070 / 3070 / 3090 / 3370 / 3390 / 5370 / 5390 
+		Usage :	1. Set Default Antenna as initialize
+				2. Antenna Diversity switching used
+				3. iwpriv command switch Antenna
+
+    Return:
+	========================================================================
+ */
+VOID AsicSetRxAnt(
+	IN PRTMP_ADAPTER	pAd,
+	IN UCHAR			Ant)
+{
+	if (pAd->chipOps.SetRxAnt)
+		pAd->chipOps.SetRxAnt(pAd, Ant);
+
+}
+
+
+VOID AsicTurnOffRFClk(
+	IN PRTMP_ADAPTER pAd, 
+	IN	UCHAR		Channel) 
+{
+	if (pAd->chipOps.AsicRfTurnOff)
+	{
+		pAd->chipOps.AsicRfTurnOff(pAd);
+	}
+	else
+	{
+#if defined(RT28xx) || defined(RT2880) || defined(RT2883)
+		/* RF R2 bit 18 = 0*/
+		UINT32			R1 = 0, R2 = 0, R3 = 0;
+		UCHAR			index;
+		RTMP_RF_REGS	*RFRegTable;
+	
+		RFRegTable = RF2850RegTable;
+#endif /* defined(RT28xx) || defined(RT2880) || defined(RT2883) */
+
+		switch (pAd->RfIcType)
+		{
+#if defined(RT28xx) || defined(RT2880) || defined(RT2883)
+#if defined(RT28xx) || defined(RT2880)
+			case RFIC_2820:
+			case RFIC_2850:
+			case RFIC_2720:
+			case RFIC_2750:
+#endif /* defined(RT28xx) || defined(RT2880) */
+				for (index = 0; index < NUM_OF_2850_CHNL; index++)
+				{
+					if (Channel == RFRegTable[index].Channel)
+					{
+						R1 = RFRegTable[index].R1 & 0xffffdfff;
+						R2 = RFRegTable[index].R2 & 0xfffbffff;
+						R3 = RFRegTable[index].R3 & 0xfff3ffff;
+
+						RTMP_RF_IO_WRITE32(pAd, R1);
+						RTMP_RF_IO_WRITE32(pAd, R2);
+
+						/* Program R1b13 to 1, R3/b18,19 to 0, R2b18 to 0. */
+						/* Set RF R2 bit18=0, R3 bit[18:19]=0*/
+						/*if (pAd->StaCfg.bRadio == FALSE)*/
+						if (1)
+						{
+							RTMP_RF_IO_WRITE32(pAd, R3);
+
+							DBGPRINT(RT_DEBUG_TRACE, ("AsicTurnOffRFClk#%d(RF=%d, ) , R2=0x%08x,  R3 = 0x%08x \n",
+								Channel, pAd->RfIcType, R2, R3));
+						}
+						else
+							DBGPRINT(RT_DEBUG_TRACE, ("AsicTurnOffRFClk#%d(RF=%d, ) , R2=0x%08x \n",
+								Channel, pAd->RfIcType, R2));
+						break;
+					}
+				}
+				break;
+#endif /* defined(RT28xx) || defined(RT2880) || defined(RT2883) */
+			default:
+				DBGPRINT(RT_DEBUG_TRACE, ("AsicTurnOffRFClk#%d : Unkonwn RFIC=%d\n",
+											Channel, pAd->RfIcType));
+				break;
+		}
+	}
+}
+
+
+
+
+
+#ifdef VCORECAL_SUPPORT
+VOID AsicVCORecalibration(
+	IN PRTMP_ADAPTER pAd)
+{
+	UCHAR BbpR49 = 0, Tssi = 0;
+#if defined (RT5350)
+	UCHAR BbpR47 = 0;
+#endif
+#ifdef RALINK_ATE
+	if (ATE_ON(pAd))
+		return;
+#endif
+
+	if (pAd->chipCap.FlgIsVcoReCalSup == FALSE)
+		return;
+
+#if defined (RT5350)
+	if (pAd->TxPowerCtrl.bInternalTxALC == TRUE)
+	{
+	    //TSSI_REPORT_SEL = 0
+	    RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BbpR47);
+	    BbpR47 &= ~0x3;
+	    RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R47, BbpR47 );
+	}
+#endif
+
+	RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R49, &BbpR49);
+	Tssi = BbpR49 >> 1; /* bit 0 is used for update flag*/
+	
+	/*DBGPRINT(RT_DEBUG_TRACE, ("AsicVCORecalibration: BbpR49=%x TSSI difference=%d\n", BbpR49, abs((pAd->LatchTssi) - Tssi)));*/
+	if (abs((pAd->LatchTssi) - Tssi) >= pAd->CommonCfg.VCORecalibrationThreshold)
+	{
+		UCHAR RFValue = 0;
+	
+		DBGPRINT(RT_DEBUG_TRACE, ("AsicVCORecalibration: vcocal_en=1, TSSI difference=%d\n", abs((pAd->LatchTssi) - Tssi)));
+
+		RT30xxReadRFRegister(pAd, RF_R03, (PUCHAR)&RFValue);
+		RFValue = RFValue | 0x80; /* bit 7=vcocal_en*/
+		RT30xxWriteRFRegister(pAd, RF_R03, (UCHAR)RFValue);
+		RTMPusecDelay(2000);
+
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R49, BbpR49 & 0xfe); /* clear update flag*/
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R49, &BbpR49);
+		pAd->RefreshTssi = 1;
+	}
+}
+#endif /* VCORECAL_SUPPORT */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_cfg.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_cfg.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_cfg.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_cfg.c	2017-09-23 03:42:49.706676017 +0800
@@ -0,0 +1,1087 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+
+
+INT ComputeChecksum(
+	IN UINT PIN)
+{
+	INT digit_s;
+    UINT accum = 0;
+
+	PIN *= 10;
+	accum += 3 * ((PIN / 10000000) % 10); 
+	accum += 1 * ((PIN / 1000000) % 10); 
+	accum += 3 * ((PIN / 100000) % 10); 
+	accum += 1 * ((PIN / 10000) % 10); 
+	accum += 3 * ((PIN / 1000) % 10); 
+	accum += 1 * ((PIN / 100) % 10); 
+	accum += 3 * ((PIN / 10) % 10); 
+
+	digit_s = (accum % 10);
+	return ((10 - digit_s) % 10);
+} /* ComputeChecksum*/
+
+UINT GenerateWpsPinCode(
+	IN	PRTMP_ADAPTER	pAd,
+    IN  BOOLEAN         bFromApcli,	
+	IN	UCHAR			apidx)
+{
+	UCHAR	macAddr[MAC_ADDR_LEN];
+	UINT 	iPin;
+	UINT	checksum;
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		NdisMoveMemory(&macAddr[0], pAd->CurrentAddress, MAC_ADDR_LEN);
+#endif /* CONFIG_STA_SUPPORT */
+
+	iPin = macAddr[3] * 256 * 256 + macAddr[4] * 256 + macAddr[5];
+
+	iPin = iPin % 10000000;
+	checksum = ComputeChecksum( iPin );
+	iPin = iPin*10 + checksum;
+
+	return iPin;
+}
+
+char* GetPhyMode(
+	int Mode)
+{
+	switch(Mode)
+	{
+		case MODE_CCK:
+			return "CCK";
+
+		case MODE_OFDM:
+			return "OFDM";
+#ifdef DOT11_N_SUPPORT
+		case MODE_HTMIX:
+			return "HTMIX";
+
+		case MODE_HTGREENFIELD:
+			return "GREEN";
+#endif /* DOT11_N_SUPPORT */
+		default:
+			return "N/A";
+	}
+}
+
+
+char* GetBW(
+	int BW)
+{
+	switch(BW)
+	{
+		case BW_10:
+			return "10M";
+
+		case BW_20:
+			return "20M";
+#ifdef DOT11_N_SUPPORT
+		case BW_40:
+			return "40M";
+#endif /* DOT11_N_SUPPORT */
+		default:
+			return "N/A";
+	}
+}
+
+
+/* 
+    ==========================================================================
+    Description:
+        Set Country Region to pAd->CommonCfg.CountryRegion.
+        This command will not work, if the field of CountryRegion in eeprom is programmed.
+        
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT RT_CfgSetCountryRegion(
+	IN PRTMP_ADAPTER	pAd, 
+	IN PSTRING			arg,
+	IN INT				band)
+{
+	LONG region;
+	UCHAR *pCountryRegion;
+	
+	region = simple_strtol(arg, 0, 10);
+
+	if (band == BAND_24G)
+		pCountryRegion = &pAd->CommonCfg.CountryRegion;
+	else
+		pCountryRegion = &pAd->CommonCfg.CountryRegionForABand;
+	
+	/* TODO: Is it neccesay for following check???*/
+	/* Country can be set only when EEPROM not programmed*/
+	if (*pCountryRegion & 0x80)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("CfgSetCountryRegion():CountryRegion in eeprom was programmed\n"));
+		return FALSE;
+	}
+
+	if((region >= 0) && 
+	   (((band == BAND_24G) &&((region <= REGION_MAXIMUM_BG_BAND) || 
+	   (region == REGION_31_BG_BAND) || (region == REGION_32_BG_BAND) || (region == REGION_33_BG_BAND) )) || 
+	    ((band == BAND_5G) && (region <= REGION_MAXIMUM_A_BAND) ))
+	  )
+	{
+		*pCountryRegion= (UCHAR) region;
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("CfgSetCountryRegion():region(%ld) out of range!\n", region));
+		return FALSE;
+	}
+
+	return TRUE;
+	
+}
+
+
+/* 
+    ==========================================================================
+    Description:
+        Set Wireless Mode
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT RT_CfgSetWirelessMode(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	INT		MaxPhyMode = PHY_11G;
+	LONG	WirelessMode;
+	
+#ifdef DOT11_N_SUPPORT
+	if (!RTMP_TEST_MORE_FLAG(pAd, fRTMP_ADAPTER_DISABLE_DOT_11N))
+		MaxPhyMode = PHY_11N_5G;
+#endif /* DOT11_N_SUPPORT */
+
+	WirelessMode = simple_strtol(arg, 0, 10);
+
+	/* check if chip support 5G band when WirelessMode is 5G band */
+	if (PHY_MODE_IS_5G_BAND(WirelessMode))
+	{
+		if (!RFIC_IS_5G_BAND(pAd))
+		{
+			DBGPRINT(RT_DEBUG_ERROR,
+					("phy mode> Error! The chip does not support 5G band %d!\n",
+					pAd->RfIcType));
+			return FALSE;
+		}
+	}
+
+	if (WirelessMode <= MaxPhyMode)
+	{
+		pAd->CommonCfg.PhyMode = WirelessMode;
+		pAd->CommonCfg.DesiredPhyMode = WirelessMode;
+		return TRUE;
+	}
+	
+	return FALSE;
+	
+}
+
+
+/* maybe can be moved to GPL code, ap_mbss.c, but the code will be open */
+
+
+INT RT_CfgSetShortSlot(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	LONG ShortSlot;
+
+	ShortSlot = simple_strtol(arg, 0, 10);
+
+	if (ShortSlot == 1)
+		pAd->CommonCfg.bUseShortSlotTime = TRUE;
+	else if (ShortSlot == 0)
+		pAd->CommonCfg.bUseShortSlotTime = FALSE;
+	else
+		return FALSE;  /*Invalid argument */
+
+	return TRUE;
+}
+
+
+/* 
+    ==========================================================================
+    Description:
+        Set WEP KEY base on KeyIdx
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT	RT_CfgSetWepKey(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			keyString,
+	IN	CIPHER_KEY		*pSharedKey,
+	IN	INT				keyIdx)
+{
+	INT				KeyLen;
+	INT				i;
+	/*UCHAR			CipherAlg = CIPHER_NONE;*/
+	BOOLEAN			bKeyIsHex = FALSE;
+
+	/* TODO: Shall we do memset for the original key info??*/
+	memset(pSharedKey, 0, sizeof(CIPHER_KEY));
+	KeyLen = strlen(keyString);
+	switch (KeyLen)
+	{
+		case 5: /*wep 40 Ascii type*/
+		case 13: /*wep 104 Ascii type*/
+			bKeyIsHex = FALSE;
+			pSharedKey->KeyLen = KeyLen;
+			NdisMoveMemory(pSharedKey->Key, keyString, KeyLen);
+			break;
+			
+		case 10: /*wep 40 Hex type*/
+		case 26: /*wep 104 Hex type*/
+			for(i=0; i < KeyLen; i++)
+			{
+				if( !isxdigit(*(keyString+i)) )
+					return FALSE;  /*Not Hex value;*/
+			}
+			bKeyIsHex = TRUE;
+			pSharedKey->KeyLen = KeyLen/2 ;
+			AtoH(keyString, pSharedKey->Key, pSharedKey->KeyLen);
+			break;
+			
+		default: /*Invalid argument */
+			DBGPRINT(RT_DEBUG_TRACE, ("RT_CfgSetWepKey(keyIdx=%d):Invalid argument (arg=%s)\n", keyIdx, keyString));
+			return FALSE;
+	}
+
+	pSharedKey->CipherAlg = ((KeyLen % 5) ? CIPHER_WEP128 : CIPHER_WEP64);
+	DBGPRINT(RT_DEBUG_TRACE, ("RT_CfgSetWepKey:(KeyIdx=%d,type=%s, Alg=%s)\n", 
+						keyIdx, (bKeyIsHex == FALSE ? "Ascii" : "Hex"), CipherName[pSharedKey->CipherAlg]));
+
+	return TRUE;
+}
+
+
+/* 
+    ==========================================================================
+    Description:
+        Set WPA PSK key
+
+    Arguments:
+        pAdapter	Pointer to our adapter
+        keyString	WPA pre-shared key string
+        pHashStr	String used for password hash function
+        hashStrLen	Lenght of the hash string
+        pPMKBuf		Output buffer of WPAPSK key
+
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT RT_CfgSetWPAPSKKey(
+	IN RTMP_ADAPTER	*pAd, 
+	IN PSTRING		keyString,
+	IN UCHAR		*pHashStr,
+	IN INT			hashStrLen,
+	OUT PUCHAR		pPMKBuf)
+{
+	int keyLen;
+	UCHAR keyMaterial[40];
+
+	keyLen = strlen(keyString);
+	if ((keyLen < 8) || (keyLen > 64))
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("WPAPSK Key length(%d) error, required 8 ~ 64 characters!(keyStr=%s)\n", 
+									keyLen, keyString));
+		return FALSE;
+	}
+
+	memset(pPMKBuf, 0, 32);
+	if (keyLen == 64)
+	{
+	    AtoH(keyString, pPMKBuf, 32);
+	}
+	else
+	{
+	    RtmpPasswordHash(keyString, pHashStr, hashStrLen, keyMaterial);
+	    NdisMoveMemory(pPMKBuf, keyMaterial, 32);		
+	}
+
+	return TRUE;
+}
+
+INT	RT_CfgSetFixedTxPhyMode(
+	IN	PSTRING			arg)
+{
+	INT		fix_tx_mode = FIXED_TXMODE_HT;
+	UINT32	value;
+
+	if (strcmp(arg, "OFDM") == 0 || strcmp(arg, "ofdm") == 0)
+	{
+		fix_tx_mode = FIXED_TXMODE_OFDM;
+	}	
+	else if (strcmp(arg, "CCK") == 0 || strcmp(arg, "cck") == 0)
+	{
+	    fix_tx_mode = FIXED_TXMODE_CCK;
+	}
+	else if (strcmp(arg, "HT") == 0 || strcmp(arg, "ht") == 0)
+	{
+	    fix_tx_mode = FIXED_TXMODE_HT;
+	}
+	else
+	{
+		value = simple_strtol(arg, 0, 10);
+		/* 1 : CCK*/
+		/* 2 : OFDM*/
+		/* otherwise : HT*/
+		if (value == FIXED_TXMODE_CCK || value == FIXED_TXMODE_OFDM)
+			fix_tx_mode = value;	
+		else
+			fix_tx_mode = FIXED_TXMODE_HT;
+	}
+
+	return fix_tx_mode;
+					
+}	
+
+INT	RT_CfgSetMacAddress(
+	IN 	PRTMP_ADAPTER 	pAd,
+	IN	PSTRING			arg)
+{
+	INT	i, mac_len;
+	
+	/* Mac address acceptable format 01:02:03:04:05:06 length 17 */
+	mac_len = strlen(arg);
+	if(mac_len != 17)  
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s : invalid length (%d)\n", __FUNCTION__, mac_len));
+		return FALSE;
+	}
+
+	if(strcmp(arg, "00:00:00:00:00:00") == 0)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s : invalid mac setting \n", __FUNCTION__));
+		return FALSE;
+	}
+
+	for (i = 0; i < MAC_ADDR_LEN; i++)
+	{
+		AtoH(arg, &pAd->CurrentAddress[i], 1);
+		arg = arg + 3;
+	}	
+
+	pAd->bLocalAdminMAC = TRUE;
+	return TRUE;
+}
+
+INT	RT_CfgSetTxMCSProc(
+	IN	PSTRING			arg,
+	OUT	BOOLEAN			*pAutoRate)
+{
+	INT	Value = simple_strtol(arg, 0, 10);
+	INT	TxMcs;
+	
+	if ((Value >= 0 && Value <= 23) || (Value == 32)) /* 3*3*/
+	{
+		TxMcs = Value;
+		*pAutoRate = FALSE;
+	}
+	else
+	{		
+		TxMcs = MCS_AUTO;
+		*pAutoRate = TRUE;
+	}
+
+	return TxMcs;
+
+}
+
+INT	RT_CfgSetAutoFallBack(
+	IN 	PRTMP_ADAPTER 	pAd,
+	IN	PSTRING			arg)
+{
+	TX_RTY_CFG_STRUC	tx_rty_cfg;
+	UCHAR				AutoFallBack = (UCHAR)simple_strtol(arg, 0, 10);
+
+	RTMP_IO_READ32(pAd, TX_RTY_CFG, &tx_rty_cfg.word);
+	tx_rty_cfg.field.TxautoFBEnable = (AutoFallBack) ? 1 : 0;
+	RTMP_IO_WRITE32(pAd, TX_RTY_CFG, tx_rty_cfg.word);	
+	DBGPRINT(RT_DEBUG_TRACE, ("RT_CfgSetAutoFallBack::(tx_rty_cfg=0x%x)\n", tx_rty_cfg.word));
+	return TRUE;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCGIWNAME.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT RtmpIoctl_rt_ioctl_giwname(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	UCHAR CurOpMode = OPMODE_AP;
+
+	if (CurOpMode == OPMODE_AP)
+	{
+		strcpy(pData, "RTWIFI SoftAP");
+	}
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+INT RTMP_COM_IoctlHandle(
+	IN	VOID					*pAdSrc,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN	INT						cmd,
+	IN	USHORT					subcmd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdSrc;
+	POS_COOKIE pObj = (POS_COOKIE)pAd->OS_Cookie;
+	INT Status = NDIS_STATUS_SUCCESS, i;
+	UCHAR PermanentAddress[MAC_ADDR_LEN];
+	USHORT Addr01, Addr23, Addr45;
+
+
+	pObj = pObj; /* avoid compile warning */
+
+	switch(cmd)
+	{
+		case CMD_RTPRIV_IOCTL_NETDEV_GET:
+		/* get main net_dev */
+		{
+			VOID **ppNetDev = (VOID **)pData;
+			*ppNetDev = (VOID *)(pAd->net_dev);
+		}
+			break;
+
+		case CMD_RTPRIV_IOCTL_NETDEV_SET:
+		/* set main net_dev */
+			pAd->net_dev = pData;
+
+			break;
+
+		case CMD_RTPRIV_IOCTL_OPMODE_GET:
+		/* get Operation Mode */
+			*(ULONG *)pData = pAd->OpMode;
+			break;
+
+
+		case CMD_RTPRIV_IOCTL_TASK_LIST_GET:
+		/* get all Tasks */
+		{
+			RT_CMD_WAIT_QUEUE_LIST *pList = (RT_CMD_WAIT_QUEUE_LIST *)pData;
+
+			pList->pMlmeTask = &pAd->mlmeTask;
+#ifdef RTMP_TIMER_TASK_SUPPORT
+			pList->pTimerTask = &pAd->timerTask;
+#endif /* RTMP_TIMER_TASK_SUPPORT */
+			pList->pCmdQTask = &pAd->cmdQTask;
+		}
+			break;
+
+		case CMD_RTPRIV_IOCTL_IRQ_INIT:
+		/* init IRQ */
+			RTMP_IRQ_INIT(pAd);
+			break;
+
+		case CMD_RTPRIV_IOCTL_IRQ_RELEASE:
+		/* release IRQ */
+			RTMP_OS_IRQ_RELEASE(pAd, pAd->net_dev);
+			break;
+
+
+		case CMD_RTPRIV_IOCTL_NIC_NOT_EXIST:
+		/* set driver state to fRTMP_ADAPTER_NIC_NOT_EXIST */
+			RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST);
+			break;
+
+#ifdef CONFIG_APSTA_MIXED_SUPPORT
+		case CMD_RTPRIV_IOCTL_MAX_IN_BIT:
+			/* set MAX_IN_BIT for WMM */
+			CW_MAX_IN_BITS = Data;
+			break;
+#endif /* CONFIG_APSTA_MIXED_SUPPORT */
+#ifdef CONFIG_STA_SUPPORT
+#ifdef CONFIG_PM
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND
+                case CMD_RTPRIV_IOCTL_USB_DEV_GET:
+                /* get USB DEV */
+                {
+                        VOID **ppUsb_Dev = (VOID **)pData;
+                        *ppUsb_Dev = (VOID *)(pObj->pUsb_Dev);
+                }
+                        break;
+
+                case CMD_RTPRIV_IOCTL_USB_INTF_GET:
+                /* get USB INTF */
+                {
+                        VOID **ppINTF = (VOID **)pData;
+                        *ppINTF = (VOID *)(pObj->intf);
+                }
+                        break;
+
+
+		case CMD_RTPRIV_IOCTL_ADAPTER_SUSPEND_SET:
+		/* set driver state to fRTMP_ADAPTER_SUSPEND */
+			RTMP_SET_FLAG(pAd,fRTMP_ADAPTER_SUSPEND);
+			break;
+
+		case CMD_RTPRIV_IOCTL_ADAPTER_SUSPEND_CLEAR:
+		/* clear driver state to fRTMP_ADAPTER_SUSPEND */
+			RTMP_CLEAR_FLAG(pAd,fRTMP_ADAPTER_SUSPEND);
+			break;
+
+		case CMD_RTPRIV_IOCTL_ADAPTER_SUSPEND_TEST:
+		/* test driver state to fRTMP_ADAPTER_SUSPEND */
+			*(UCHAR *)pData = RTMP_TEST_FLAG(pAd,fRTMP_ADAPTER_SUSPEND);
+			break;
+
+		case CMD_RTPRIV_IOCTL_ADAPTER_CPU_SUSPEND_SET:
+		/* set driver state to fRTMP_ADAPTER_CPU_SUSPEND */
+			RTMP_SET_FLAG(pAd,fRTMP_ADAPTER_CPU_SUSPEND);
+			break;
+
+		case CMD_RTPRIV_IOCTL_ADAPTER_CPU_SUSPEND_CLEAR:
+		/* clear driver state to fRTMP_ADAPTER_CPU_SUSPEND */
+			RTMP_CLEAR_FLAG(pAd,fRTMP_ADAPTER_CPU_SUSPEND);
+			break;
+
+		case CMD_RTPRIV_IOCTL_ADAPTER_CPU_SUSPEND_TEST:
+		/* test driver state to fRTMP_ADAPTER_CPU_SUSPEND */
+			*(UCHAR *)pData = RTMP_TEST_FLAG(pAd,fRTMP_ADAPTER_CPU_SUSPEND);
+			break;
+
+		case CMD_RTPRIV_IOCTL_ADAPTER_IDLE_RADIO_OFF_TEST:
+		/* test driver state to fRTMP_ADAPTER_IDLE_RADIO_OFF */
+			*(UCHAR *)pData = RTMP_TEST_FLAG(pAd,fRTMP_ADAPTER_IDLE_RADIO_OFF);
+			break;
+
+		case CMD_RTPRIV_IOCTL_ADAPTER_RT28XX_USB_ASICRADIO_OFF:
+		/* RT28xxUsbAsicRadioOff */
+			RT28xxUsbAsicRadioOff(pAd);
+			break;
+
+		case CMD_RTPRIV_IOCTL_ADAPTER_RT28XX_USB_ASICRADIO_ON:
+		/* RT28xxUsbAsicRadioOn */
+			RT28xxUsbAsicRadioOn(pAd);
+			break;
+
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */
+#endif /* CONFIG_PM */	
+
+		case CMD_RTPRIV_IOCTL_AP_BSSID_GET:
+			if (pAd->StaCfg.PortSecured == WPA_802_1X_PORT_NOT_SECURED)
+				NdisCopyMemory(pData, pAd->MlmeAux.Bssid, 6);
+			else
+				return NDIS_STATUS_FAILURE;
+			break;
+#endif /* CONFIG_STA_SUPPORT */
+
+		case CMD_RTPRIV_IOCTL_SANITY_CHECK:
+		/* sanity check before IOCTL */
+			if (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE))
+				return NDIS_STATUS_FAILURE;
+			break;
+
+		case CMD_RTPRIV_IOCTL_SIOCGIWFREQ:
+		/* get channel number */
+			*(ULONG *)pData = pAd->CommonCfg.Channel;
+			break;
+
+
+
+		case CMD_RTPRIV_IOCTL_BEACON_UPDATE:
+		/* update all beacon contents */
+			break;
+
+		case CMD_RTPRIV_IOCTL_RXPATH_GET:
+		/* get the number of rx path */
+			*(ULONG *)pData = pAd->Antenna.field.RxPath;
+			break;
+
+		case CMD_RTPRIV_IOCTL_CHAN_LIST_NUM_GET:
+			*(ULONG *)pData = pAd->ChannelListNum;
+			break;
+
+		case CMD_RTPRIV_IOCTL_CHAN_LIST_GET:
+		{
+			UINT32 i;
+			UCHAR *pChannel = (UCHAR *)pData;
+
+			for (i = 1; i <= pAd->ChannelListNum; i++)
+			{
+				*pChannel = pAd->ChannelList[i-1].Channel;
+				pChannel ++;
+			}
+		}
+			break;
+
+		case CMD_RTPRIV_IOCTL_FREQ_LIST_GET:
+		{
+			UINT32 i;
+			UINT32 *pFreq = (UINT32 *)pData;
+			UINT32 m;
+
+			for (i = 1; i <= pAd->ChannelListNum; i++)
+			{
+				m = 2412000;
+				MAP_CHANNEL_ID_TO_KHZ(pAd->ChannelList[i-1].Channel, m);
+				(*pFreq) = m;
+				pFreq ++;
+			}
+		}
+			break;
+
+#ifdef RTMP_USB_SUPPORT
+		case CMD_RTPRIV_IOCTL_USB_MORE_FLAG_SET:
+		{
+			RT_CMD_USB_MORE_FLAG_CONFIG *pConfig;
+			UINT32 VendorID, ProductID;
+
+
+			pConfig = (RT_CMD_USB_MORE_FLAG_CONFIG *)pData;
+			VendorID = pConfig->VendorID;
+			ProductID = pConfig->ProductID;
+
+			if (VendorID == 0x0DB0)
+			{
+				if ((ProductID == 0x871C) || (ProductID == 0x822C))
+				{
+					RTMP_SET_MORE_FLAG(pAd, (fRTMP_ADAPTER_DISABLE_DOT_11N | fRTMP_ADAPTER_WSC_PBC_PIN0));
+				}
+				if ((ProductID == 0x871A) || (ProductID == 0x822A))
+				{
+					RTMP_SET_MORE_FLAG(pAd, fRTMP_ADAPTER_DISABLE_DOT_11N);
+				}
+				if ((ProductID == 0x871B) || (ProductID == 0x822B))
+				{
+					RTMP_SET_MORE_FLAG(pAd, fRTMP_ADAPTER_WSC_PBC_PIN0);
+				}
+			}
+
+	    	if (VendorID == 0x07D1)
+	    	{
+				if (ProductID == 0x3C0F)
+					RTMP_SET_MORE_FLAG(pAd, fRTMP_ADAPTER_DISABLE_DOT_11N);
+	    	}
+		}
+			break;
+
+		case CMD_RTPRIV_IOCTL_USB_CONFIG_INIT:
+		{
+			RT_CMD_USB_DEV_CONFIG *pConfig;
+			UINT32 i;
+
+
+			pConfig = (RT_CMD_USB_DEV_CONFIG *)pData;
+			pAd->NumberOfPipes = pConfig->NumberOfPipes;
+			pAd->BulkInEpAddr = pConfig->BulkInEpAddr;
+			pAd->BulkInMaxPacketSize = pConfig->BulkInMaxPacketSize;
+			for(i=0; i<6; i++)
+			{
+				pAd->BulkOutEpAddr[i] = pConfig->BulkOutEpAddr[i];
+				pAd->BulkOutMaxPacketSize = pConfig->BulkOutMaxPacketSize;
+			}
+			pAd->config = pConfig->pConfig;
+		}
+			break;
+
+		case CMD_RTPRIV_IOCTL_USB_SUSPEND:
+			pAd->PM_FlgSuspend = 1;
+			if (Data)
+			{
+				RTUSBCancelPendingBulkInIRP(pAd);
+				RTUSBCancelPendingBulkOutIRP(pAd);
+			}
+			break;
+
+		case CMD_RTPRIV_IOCTL_USB_RESUME:
+			pAd->PM_FlgSuspend = 0;
+			break;
+#endif /* RTMP_USB_SUPPORT */
+
+
+#ifdef RT_CFG80211_SUPPORT
+		case CMD_RTPRIV_IOCTL_CFG80211_CFG_START:
+			RT_CFG80211_REINIT(pAd);
+			RT_CFG80211_CRDA_REG_RULE_APPLY(pAd);
+			break;
+#endif /* RT_CFG80211_SUPPORT */
+
+#ifdef INF_PPA_SUPPORT
+		case CMD_RTPRIV_IOCTL_INF_PPA_INIT:
+			os_alloc_mem(NULL, (UCHAR **)&(pAd->pDirectpathCb), sizeof(PPA_DIRECTPATH_CB));
+			break;
+
+		case CMD_RTPRIV_IOCTL_INF_PPA_EXIT:
+			if (ppa_hook_directpath_register_dev_fn && pAd->PPAEnable==TRUE) 
+			{
+				UINT status;
+				status=ppa_hook_directpath_register_dev_fn(&pAd->g_if_id, pAd->net_dev, NULL, 0);
+				DBGPRINT(RT_DEBUG_TRACE, ("unregister PPA:g_if_id=%d status=%d\n",pAd->g_if_id,status));
+			}
+			os_free_mem(NULL, pAd->pDirectpathCb);
+			break;
+#endif /* INF_PPA_SUPPORT*/
+
+		case CMD_RTPRIV_IOCTL_VIRTUAL_INF_UP:
+		/* interface up */
+		{
+			RT_CMD_INF_UP_DOWN *pInfConf = (RT_CMD_INF_UP_DOWN *)pData;
+
+			if (VIRTUAL_IF_NUM(pAd) == 0)
+			{
+				if (pInfConf->rt28xx_open(pAd->net_dev) != 0)
+				{
+					DBGPRINT(RT_DEBUG_TRACE, ("rt28xx_open return fail!\n"));
+					return NDIS_STATUS_FAILURE;
+				}
+			}
+			else
+			{
+			}
+			VIRTUAL_IF_INC(pAd);
+		}
+			break;
+
+		case CMD_RTPRIV_IOCTL_VIRTUAL_INF_DOWN:
+		/* interface down */
+		{
+			RT_CMD_INF_UP_DOWN *pInfConf = (RT_CMD_INF_UP_DOWN *)pData;
+
+			VIRTUAL_IF_DEC(pAd);
+			if (VIRTUAL_IF_NUM(pAd) == 0)
+				pInfConf->rt28xx_close(pAd->net_dev);
+		}
+			break;
+
+		case CMD_RTPRIV_IOCTL_VIRTUAL_INF_GET:
+		/* get virtual interface number */
+			*(ULONG *)pData = VIRTUAL_IF_NUM(pAd);
+			break;
+
+		case CMD_RTPRIV_IOCTL_INF_TYPE_GET:
+		/* get current interface type */
+			*(ULONG *)pData = pAd->infType;
+			break;
+
+		case CMD_RTPRIV_IOCTL_INF_STATS_GET:
+		/* get statistics */
+		{
+			RT_CMD_STATS *pStats = (RT_CMD_STATS *)pData;
+
+			pStats->pStats = pAd->stats;
+			pStats->rx_packets = pAd->WlanCounters.ReceivedFragmentCount.QuadPart;
+			pStats->tx_packets = pAd->WlanCounters.TransmittedFragmentCount.QuadPart;
+			pStats->rx_bytes = pAd->RalinkCounters.ReceivedByteCount;
+			pStats->tx_bytes = pAd->RalinkCounters.TransmittedByteCount;
+			pStats->rx_errors = pAd->Counters8023.RxErrors;
+			pStats->tx_errors = pAd->Counters8023.TxErrors;
+		    pStats->multicast = pAd->WlanCounters.MulticastReceivedFrameCount.QuadPart;   /* multicast packets received*/
+		    pStats->collisions = pAd->Counters8023.OneCollision + pAd->Counters8023.MoreCollisions;  /* Collision packets*/
+		    pStats->rx_over_errors = pAd->Counters8023.RxNoBuffer;                   /* receiver ring buff overflow*/
+		    pStats->rx_crc_errors = 0;/*pAd->WlanCounters.FCSErrorCount;      recved pkt with crc error*/
+		    pStats->rx_frame_errors = pAd->Counters8023.RcvAlignmentErrors;          /* recv'd frame alignment error*/
+		    pStats->rx_fifo_errors = pAd->Counters8023.RxNoBuffer;                   /* recv'r fifo overrun*/
+		}
+			break;
+
+		case CMD_RTPRIV_IOCTL_INF_IW_STATUS_GET:
+		/* get wireless statistics */
+		{
+			UCHAR CurOpMode = OPMODE_AP;
+			RT_CMD_IW_STATS *pStats = (RT_CMD_IW_STATS *)pData;
+
+			pStats->qual = 0;
+			pStats->level = 0;
+			pStats->noise = 0;
+			pStats->pStats = pAd->iw_stats;
+			
+#ifdef CONFIG_STA_SUPPORT
+			if (pAd->OpMode == OPMODE_STA)
+			{
+				CurOpMode = OPMODE_STA;
+			}
+#endif /* CONFIG_STA_SUPPORT */
+
+			/*check if the interface is down*/
+			if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE))
+				return NDIS_STATUS_FAILURE;	
+
+
+#ifdef CONFIG_STA_SUPPORT
+			if (CurOpMode == OPMODE_STA)
+				pStats->qual = ((pAd->Mlme.ChannelQuality * 12)/10 + 10);
+#endif /* CONFIG_STA_SUPPORT */
+
+			if (pStats->qual > 100)
+				pStats->qual = 100;
+
+#ifdef CONFIG_STA_SUPPORT
+			if (CurOpMode == OPMODE_STA)
+			{
+				pStats->level =
+					RTMPMaxRssi(pAd, pAd->StaCfg.RssiSample.AvgRssi0,
+									pAd->StaCfg.RssiSample.AvgRssi1,
+									pAd->StaCfg.RssiSample.AvgRssi2);
+			}
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef CONFIG_STA_SUPPORT
+			pStats->noise = RTMPMaxRssi(pAd, pAd->StaCfg.RssiSample.AvgRssi0,
+										pAd->StaCfg.RssiSample.AvgRssi1,
+										pAd->StaCfg.RssiSample.AvgRssi2) - 
+										RTMPMinSnr(pAd, pAd->StaCfg.RssiSample.AvgSnr0, 
+										pAd->StaCfg.RssiSample.AvgSnr1);
+#endif /* CONFIG_STA_SUPPORT */
+		}
+			break;
+
+		case CMD_RTPRIV_IOCTL_INF_MAIN_CREATE:
+			*(VOID **)pData = RtmpPhyNetDevMainCreate(pAd);
+			break;
+
+		case CMD_RTPRIV_IOCTL_INF_MAIN_ID_GET:
+			*(ULONG *)pData = INT_MAIN;
+			break;
+
+		case CMD_RTPRIV_IOCTL_INF_MAIN_CHECK:
+			if (Data != INT_MAIN)
+				return NDIS_STATUS_FAILURE;
+			break;
+
+		case CMD_RTPRIV_IOCTL_INF_P2P_CHECK:
+			if (Data != INT_P2P)
+				return NDIS_STATUS_FAILURE;
+			break;			
+
+
+#ifdef RALINK_ATE
+#ifdef RALINK_QA
+		case CMD_RTPRIV_IOCTL_ATE:
+			RtmpDoAte(pAd, wrq, pData);
+			break;
+#endif /* RALINK_QA */ 
+#endif /* RALINK_ATE */
+
+		case CMD_RTPRIV_IOCTL_MAC_ADDR_GET:
+
+			RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
+			RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
+			RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);			
+			
+			PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);		
+			PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
+			PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
+			PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
+			PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
+			PermanentAddress[5] = (UCHAR)(Addr45 >> 8);				
+			
+			for(i=0; i<6; i++)
+				*(UCHAR *)(pData+i) = PermanentAddress[i];
+			break;
+
+		case CMD_RTPRIV_IOCTL_SIOCGIWNAME:
+			RtmpIoctl_rt_ioctl_giwname(pAd, pData, 0);
+			break;
+
+#ifdef RT_CFG80211_SUPPORT
+		case CMD_RTPRIV_IOCTL_80211_CB_GET:
+			*(VOID **)pData = (VOID *)(pAd->pCfg80211_CB);
+			break;
+
+		case CMD_RTPRIV_IOCTL_80211_CB_SET:
+			pAd->pCfg80211_CB = pData;
+			break;
+
+		case CMD_RTPRIV_IOCTL_80211_CHAN_SET:
+			if (CFG80211DRV_OpsSetChannel(pAd, pData) != TRUE)
+				return NDIS_STATUS_FAILURE;
+			break;
+
+		case CMD_RTPRIV_IOCTL_80211_VIF_CHG:
+			if (CFG80211DRV_OpsChgVirtualInf(pAd, pData, Data) != TRUE)
+				return NDIS_STATUS_FAILURE;
+			break;
+
+		case CMD_RTPRIV_IOCTL_80211_SCAN:
+			CFG80211DRV_OpsScan(pAd);
+			break;
+
+		case CMD_RTPRIV_IOCTL_80211_IBSS_JOIN:
+			CFG80211DRV_OpsJoinIbss(pAd, pData);
+			break;
+
+		case CMD_RTPRIV_IOCTL_80211_STA_LEAVE:
+			CFG80211DRV_OpsLeave(pAd);
+			break;
+
+		case CMD_RTPRIV_IOCTL_80211_STA_GET:
+			if (CFG80211DRV_StaGet(pAd, pData) != TRUE)
+				return NDIS_STATUS_FAILURE;
+			break;
+
+		case CMD_RTPRIV_IOCTL_80211_KEY_ADD:
+			CFG80211DRV_KeyAdd(pAd, pData);
+			break;
+
+		case CMD_RTPRIV_IOCTL_80211_KEY_DEFAULT_SET:
+#ifdef CONFIG_STA_SUPPORT
+			pAd->StaCfg.DefaultKeyId = Data; /* base 0 */
+#endif /* CONFIG_STA_SUPPORT */
+			break;
+
+		case CMD_RTPRIV_IOCTL_80211_CONNECT_TO:
+			CFG80211DRV_Connect(pAd, pData);
+			break;
+
+#ifdef RFKILL_HW_SUPPORT
+		case CMD_RTPRIV_IOCTL_80211_RFKILL:
+		{
+			UINT32 data = 0;
+			BOOLEAN active;
+
+			/* Read GPIO pin2 as Hardware controlled radio state */
+			RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
+			active = !!(data & 0x04);
+
+			if (!active)
+			{
+				RTMPSetLED(pAd, LED_RADIO_OFF);
+				*(UINT8 *)pData = 0;
+			}
+			else
+				*(UINT8 *)pData = 1;
+		}
+			break;
+#endif /* RFKILL_HW_SUPPORT */
+
+		case CMD_RTPRIV_IOCTL_80211_REG_NOTIFY_TO:
+			CFG80211DRV_RegNotify(pAd, pData);
+			break;
+
+		case CMD_RTPRIV_IOCTL_80211_BANDINFO_GET:
+		{
+			CFG80211_BAND *pBandInfo = (CFG80211_BAND *)pData;
+			CFG80211_BANDINFO_FILL(pAd, pBandInfo);
+		}
+			break;
+#endif /* RT_CFG80211_SUPPORT */
+
+		default:
+			return NDIS_STATUS_FAILURE;
+	}
+
+	return Status;
+}
+
+/* 
+    ==========================================================================
+    Description:
+        Issue a site survey command to driver
+	Arguments:
+	    pAdapter                    Pointer to our adapter
+	    wrq                         Pointer to the ioctl argument
+
+    Return Value:
+        None
+
+    Note:
+        Usage: 
+               1.) iwpriv ra0 set site_survey
+    ==========================================================================
+*/
+INT Set_SiteSurvey_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	NDIS_802_11_SSID Ssid;
+	POS_COOKIE pObj;
+
+	pObj = (POS_COOKIE) pAd->OS_Cookie;
+
+	//check if the interface is down
+	if (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE))
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+		return -ENETDOWN;   
+	}
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		if (MONITOR_ON(pAd))
+    	{
+        	DBGPRINT(RT_DEBUG_TRACE, ("!!! Driver is in Monitor Mode now !!!\n"));
+        	return -EINVAL;
+    	}
+	}
+#endif // CONFIG_STA_SUPPORT //
+
+    NdisZeroMemory(&Ssid, sizeof(NDIS_802_11_SSID));
+
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		Ssid.SsidLength = 0; 
+		if ((arg != NULL) &&
+			(strlen(arg) <= MAX_LEN_OF_SSID))
+		{
+			RTMPMoveMemory(Ssid.Ssid, arg, strlen(arg));
+			Ssid.SsidLength = strlen(arg);
+		}
+
+		pAd->StaCfg.bScanReqIsFromWebUI = TRUE;
+		StaSiteSurvey(pAd, &Ssid, SCAN_ACTIVE);
+	}
+#endif // CONFIG_STA_SUPPORT //
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_SiteSurvey_Proc\n"));
+
+    return TRUE;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_cmd.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_cmd.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_cmd.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_cmd.c	2017-09-23 03:42:49.706676017 +0800
@@ -0,0 +1,166 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+	
+	IRQL = 
+	
+	Note:
+	
+	========================================================================
+*/
+VOID	RTInitializeCmdQ(
+	IN	PCmdQ	cmdq)
+{
+	cmdq->head = NULL;
+	cmdq->tail = NULL;
+	cmdq->size = 0;
+	cmdq->CmdQState = RTMP_TASK_STAT_INITED;
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+	
+	IRQL = 
+	
+	Note:
+	
+	========================================================================
+*/
+VOID	RTThreadDequeueCmd(
+	IN	PCmdQ		cmdq,
+	OUT	PCmdQElmt	*pcmdqelmt)
+{
+	*pcmdqelmt = cmdq->head;
+	
+	if (*pcmdqelmt != NULL)
+	{
+		cmdq->head = cmdq->head->next;
+		cmdq->size--;
+		if (cmdq->size == 0)
+			cmdq->tail = NULL;
+	}
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+
+	IRQL = 
+	
+	Note:
+	
+	========================================================================
+*/
+NDIS_STATUS RTEnqueueInternalCmd(
+	IN PRTMP_ADAPTER	pAd,
+	IN NDIS_OID			Oid,
+	IN PVOID			pInformationBuffer,
+	IN UINT32			InformationBufferLength)	
+{
+	NDIS_STATUS	status;
+	PCmdQElmt	cmdqelmt = NULL;
+	
+
+	status = os_alloc_mem(pAd, (PUCHAR *)&cmdqelmt, sizeof(CmdQElmt));
+	if ((status != NDIS_STATUS_SUCCESS) || (cmdqelmt == NULL))
+		return (NDIS_STATUS_RESOURCES);
+	NdisZeroMemory(cmdqelmt, sizeof(CmdQElmt));
+
+	if(InformationBufferLength > 0)
+	{
+		status = os_alloc_mem(pAd, (PUCHAR *)&cmdqelmt->buffer, InformationBufferLength);
+		if ((status != NDIS_STATUS_SUCCESS) || (cmdqelmt->buffer == NULL))
+		{
+			os_free_mem(pAd, cmdqelmt);
+			return (NDIS_STATUS_RESOURCES);
+		}
+		else
+		{
+			NdisMoveMemory(cmdqelmt->buffer, pInformationBuffer, InformationBufferLength);
+			cmdqelmt->bufferlength = InformationBufferLength;
+		}
+	}
+	else
+	{
+		cmdqelmt->buffer = NULL;
+		cmdqelmt->bufferlength = 0;
+	}
+
+	cmdqelmt->command = Oid;
+	cmdqelmt->CmdFromNdis = FALSE;
+
+	if (cmdqelmt != NULL)
+	{
+		NdisAcquireSpinLock(&pAd->CmdQLock);
+		if (pAd->CmdQ.CmdQState & RTMP_TASK_CAN_DO_INSERT)
+		{
+			EnqueueCmd((&pAd->CmdQ), cmdqelmt);
+			status = NDIS_STATUS_SUCCESS;
+		}
+		else
+		{
+			status = NDIS_STATUS_FAILURE;
+		}
+		NdisReleaseSpinLock(&pAd->CmdQLock);
+
+		if (status == NDIS_STATUS_FAILURE)
+		{
+			if (cmdqelmt->buffer)
+				os_free_mem(pAd, cmdqelmt->buffer);
+			os_free_mem(pAd, cmdqelmt);
+		}
+		else
+			RTCMDUp(&pAd->cmdQTask);
+	}
+	return(NDIS_STATUS_SUCCESS);
+}
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_data.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_data.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_data.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_data.c	2017-09-23 03:42:49.710676005 +0800
@@ -0,0 +1,2805 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+
+UCHAR	SNAP_802_1H[] = {0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00};
+UCHAR	SNAP_BRIDGE_TUNNEL[] = {0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8};
+UCHAR	EAPOL[] = {0x88, 0x8e};
+UCHAR   TPID[] = {0x81, 0x00}; /* VLAN related */
+
+UCHAR	IPX[] = {0x81, 0x37};
+UCHAR	APPLE_TALK[] = {0x80, 0xf3};
+
+UCHAR	 OfdmRateToRxwiMCS[12] = {
+	0,  0,	0,  0,
+	0,  1,	2,  3,	/* OFDM rate 6,9,12,18 = rxwi mcs 0,1,2,3*/
+	4,  5,	6,  7,	/* OFDM rate 24,36,48,54 = rxwi mcs 4,5,6,7*/
+};
+UCHAR	 RxwiMCSToOfdmRate[12] = {
+	RATE_6,  RATE_9,	RATE_12,  RATE_18,
+	RATE_24,  RATE_36,	RATE_48,  RATE_54,	/* OFDM rate 6,9,12,18 = rxwi mcs 0,1,2,3*/
+	4,  5,	6,  7,	/* OFDM rate 24,36,48,54 = rxwi mcs 4,5,6,7*/
+};
+
+UCHAR MapUserPriorityToAccessCategory[8] = {QID_AC_BE, QID_AC_BK, QID_AC_BK, QID_AC_BE, QID_AC_VI, QID_AC_VI, QID_AC_VO, QID_AC_VO};
+
+
+/*
+	========================================================================
+
+	Routine Description:
+		API for MLME to transmit management frame to AP (BSS Mode)
+	or station (IBSS Mode)
+		
+	Arguments:
+		pAd Pointer to our adapter
+		pData		Pointer to the outgoing 802.11 frame
+		Length		Size of outgoing management frame
+		
+	Return Value:
+		NDIS_STATUS_FAILURE
+		NDIS_STATUS_PENDING
+		NDIS_STATUS_SUCCESS
+
+	IRQL = PASSIVE_LEVEL
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+	
+	========================================================================
+*/
+NDIS_STATUS MiniportMMRequest(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			QueIdx,
+	IN	PUCHAR			pData,
+	IN	UINT			Length)
+{
+	PNDIS_PACKET	pPacket;
+	NDIS_STATUS  	Status = NDIS_STATUS_SUCCESS;
+	ULONG	 		FreeNum;
+	UCHAR			rtmpHwHdr[TXINFO_SIZE + TXWI_SIZE]; /*RTMP_HW_HDR_LEN];*/
+	BOOLEAN			bUseDataQ = FALSE, FlgDataQForce = FALSE, FlgIsLocked = FALSE;
+	int 			retryCnt = 0;
+
+	ASSERT(Length <= MGMT_DMA_BUFFER_SIZE);
+	
+	if ((QueIdx & MGMT_USE_QUEUE_FLAG) == MGMT_USE_QUEUE_FLAG)
+	{
+		bUseDataQ = TRUE;
+		QueIdx &= (~MGMT_USE_QUEUE_FLAG);
+	}
+
+
+	do
+	{
+		/* Reset is in progress, stop immediately*/
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS) ||
+			 RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS | fRTMP_ADAPTER_NIC_NOT_EXIST)||
+			 !RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_START_UP)
+				)
+		 {
+			Status = NDIS_STATUS_FAILURE;
+			break;
+		}
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef RTMP_MAC_USB
+
+		if(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF))
+		{
+#ifdef CONFIG_PM
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND
+			if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_CPU_SUSPEND))
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */
+#endif /* CONFIG_PM */
+			{
+				RT28xxUsbAsicRadioOn(pAd);
+			}
+		}
+
+
+#endif /* RTMP_MAC_USB */
+#endif /* CONFIG_STA_SUPPORT */
+
+
+
+		/* Check Free priority queue*/
+		/* Since we use PBF Queue2 for management frame.  Its corresponding DMA ring should be using TxRing.*/
+		{
+			FreeNum = GET_MGMTRING_FREENO(pAd);
+		}
+		
+		if ((FreeNum > 0))
+		{
+			/* We need to reserve space for rtmp hardware header. i.e., TxWI for RT2860 and TxInfo+TxWI for RT2870*/
+			NdisZeroMemory(&rtmpHwHdr, (TXINFO_SIZE + TXWI_SIZE));
+			Status = RTMPAllocateNdisPacket(pAd, &pPacket, (PUCHAR)&rtmpHwHdr, (TXINFO_SIZE + TXWI_SIZE), pData, Length);
+			if (Status != NDIS_STATUS_SUCCESS)
+			{
+				DBGPRINT(RT_DEBUG_WARN, ("MiniportMMRequest (error:: can't allocate NDIS PACKET)\n"));
+				break;
+			}
+
+			/*pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_CCK;*/
+			/*pAd->CommonCfg.MlmeRate = RATE_2;*/
+
+
+
+			Status = MlmeHardTransmit(pAd, QueIdx, pPacket, FlgDataQForce, FlgIsLocked);
+			if (Status == NDIS_STATUS_SUCCESS)
+				retryCnt = 0;
+			else
+				RTMPFreeNdisPacket(pAd, pPacket);
+		}
+		else
+		{
+			pAd->RalinkCounters.MgmtRingFullCount++;
+			DBGPRINT(RT_DEBUG_ERROR, ("Qidx(%d), not enough space in MgmtRing, MgmtRingFullCount=%ld!\n",
+										QueIdx, pAd->RalinkCounters.MgmtRingFullCount));
+		}
+	} while (retryCnt > 0);
+
+	
+
+	return Status;
+}
+
+
+
+
+/*
+	========================================================================
+
+	Routine Description:
+		Copy frame from waiting queue into relative ring buffer and set
+	appropriate ASIC register to kick hardware transmit function
+	
+	Arguments:
+		pAd Pointer to our adapter
+		pBuffer 	Pointer to	memory of outgoing frame
+		Length		Size of outgoing management frame
+		
+	Return Value:
+		NDIS_STATUS_FAILURE
+		NDIS_STATUS_PENDING
+		NDIS_STATUS_SUCCESS
+
+	IRQL = PASSIVE_LEVEL
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+	
+	========================================================================
+*/
+NDIS_STATUS MlmeHardTransmit(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			QueIdx,
+	IN	PNDIS_PACKET	pPacket,
+	IN	BOOLEAN			FlgDataQForce,
+	IN	BOOLEAN			FlgIsLocked)
+{
+	PACKET_INFO 	PacketInfo;
+	PUCHAR			pSrcBufVA;
+	UINT			SrcBufLen;
+
+
+	if ((pAd->CommonCfg.RadarDetect.RDMode != RD_NORMAL_MODE)
+#ifdef CARRIER_DETECTION_SUPPORT
+#endif /* CARRIER_DETECTION_SUPPORT */
+		)
+	{
+		return NDIS_STATUS_FAILURE;
+	}
+
+	RTMP_QueryPacketInfo(pPacket, &PacketInfo, &pSrcBufVA, &SrcBufLen);
+	if (pSrcBufVA == NULL)
+		return NDIS_STATUS_FAILURE;
+
+    {
+    		return MlmeHardTransmitMgmtRing(pAd,QueIdx,pPacket);
+    }
+}
+
+
+NDIS_STATUS MlmeHardTransmitMgmtRing(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR	QueIdx,
+	IN	PNDIS_PACKET	pPacket)
+{
+	PACKET_INFO 	PacketInfo;
+	PUCHAR			pSrcBufVA;
+	UINT			SrcBufLen;
+	PHEADER_802_11	pHeader_802_11;
+	BOOLEAN 		bAckRequired, bInsertTimestamp;
+	UCHAR			MlmeRate;
+	PTXWI_STRUC 	pFirstTxWI;
+	MAC_TABLE_ENTRY	*pMacEntry = NULL;
+	UCHAR			PID;
+
+	RTMP_QueryPacketInfo(pPacket, &PacketInfo, &pSrcBufVA, &SrcBufLen);
+
+	/* Make sure MGMT ring resource won't be used by other threads*/
+	RTMP_SEM_LOCK(&pAd->MgmtRingLock);
+	if (pSrcBufVA == NULL)
+	{
+		/* The buffer shouldn't be NULL*/
+			RTMP_SEM_UNLOCK(&pAd->MgmtRingLock);
+		return NDIS_STATUS_FAILURE;
+	}
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		/* outgoing frame always wakeup PHY to prevent frame lost*/
+		if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE))
+			AsicForceWakeup(pAd, TRUE);
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	pFirstTxWI = (PTXWI_STRUC)(pSrcBufVA +  TXINFO_SIZE);
+	pHeader_802_11 = (PHEADER_802_11) (pSrcBufVA + TXINFO_SIZE + TXWI_SIZE); /*TXWI_SIZE);*/
+	
+	if (pHeader_802_11->Addr1[0] & 0x01)
+	{
+		MlmeRate = pAd->CommonCfg.BasicMlmeRate;
+	}
+	else
+	{
+		MlmeRate = pAd->CommonCfg.MlmeRate;
+	}
+	
+	/* Verify Mlme rate for a / g bands.*/
+	if ((pAd->LatchRfRegs.Channel > 14) && (MlmeRate < RATE_6)) /* 11A band*/
+		MlmeRate = RATE_6;
+
+	if ((pHeader_802_11->FC.Type == BTYPE_DATA) &&
+		(pHeader_802_11->FC.SubType == SUBTYPE_QOS_NULL))
+	{
+		pMacEntry = MacTableLookup(pAd, pHeader_802_11->Addr1);
+	}
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		/* Fixed W52 with Activity scan issue in ABG_MIXED and ABGN_MIXED mode.*/
+		if (pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED
+#ifdef DOT11_N_SUPPORT
+			|| pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED
+#endif /* DOT11_N_SUPPORT */
+		)
+		{
+			if (pAd->LatchRfRegs.Channel > 14)
+				pAd->CommonCfg.MlmeTransmit.field.MODE = 1;
+			else
+				pAd->CommonCfg.MlmeTransmit.field.MODE = 0;
+		}
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	/* Should not be hard code to set PwrMgmt to 0 (PWR_ACTIVE)*/
+	/* Snice it's been set to 0 while on MgtMacHeaderInit*/
+	/* By the way this will cause frame to be send on PWR_SAVE failed.*/
+	
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS))
+		{
+			/* We are in scan progress, just let the PwrMgmt bit keep as it orginally should be.*/
+		}
+		else
+#endif /* CONFIG_STA_SUPPORT */
+			pHeader_802_11->FC.PwrMgmt = PWR_ACTIVE; /* (pAd->StaCfg.Psm == PWR_SAVE);*/
+#ifdef CONFIG_STA_SUPPORT
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef CONFIG_STA_SUPPORT
+	
+	/* In WMM-UAPSD, mlme frame should be set psm as power saving but probe request frame*/
+	/* Data-Null packets alse pass through MMRequest in RT2860, however, we hope control the psm bit to pass APSD*/
+/*	if ((pHeader_802_11->FC.Type != BTYPE_DATA) && (pHeader_802_11->FC.Type != BTYPE_CNTL))*/
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		if ((pHeader_802_11->FC.SubType == SUBTYPE_ACTION) ||
+			((pHeader_802_11->FC.Type == BTYPE_DATA) &&
+			((pHeader_802_11->FC.SubType == SUBTYPE_QOS_NULL) ||
+			(pHeader_802_11->FC.SubType == SUBTYPE_NULL_FUNC))))
+		{
+			if (pAd->StaCfg.Psm == PWR_SAVE)
+				pHeader_802_11->FC.PwrMgmt = PWR_SAVE;
+			else if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED) && 
+					INFRA_ON(pAd) && 
+					RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS))
+			{
+				/* We are in scan progress, just let the PwrMgmt bit keep as it orginally should be.			*/
+			}
+			else
+			{
+				pHeader_802_11->FC.PwrMgmt = pAd->CommonCfg.bAPSDForcePowerSave;
+			}
+		}
+	}
+#endif /* CONFIG_STA_SUPPORT */
+	
+
+
+
+	if ((pHeader_802_11->FC.Type == BTYPE_DATA) &&
+		(pHeader_802_11->FC.SubType == SUBTYPE_QOS_NULL))
+	{
+		printk("%s:: QoS NULL and PHY = %d.  MCS = %d.\n", __FUNCTION__, pAd->CommonCfg.MlmeTransmit.field.MODE, pAd->CommonCfg.MlmeTransmit.field.MCS);
+	}
+
+	bInsertTimestamp = FALSE;
+	if (pHeader_802_11->FC.Type == BTYPE_CNTL) /* must be PS-POLL*/
+	{
+#ifdef CONFIG_STA_SUPPORT
+		/*Set PM bit in ps-poll, to fix WLK 1.2  PowerSaveMode_ext failure issue.*/
+		if ((pAd->OpMode == OPMODE_STA) && (pHeader_802_11->FC.SubType == SUBTYPE_PS_POLL))
+		{
+			pHeader_802_11->FC.PwrMgmt = PWR_SAVE;
+		}
+#endif /* CONFIG_STA_SUPPORT */
+		bAckRequired = FALSE;
+	}
+	else /* BTYPE_MGMT or BTYPE_DATA(must be NULL frame)*/
+	{
+		if (pHeader_802_11->Addr1[0] & 0x01) /* MULTICAST, BROADCAST*/
+		{
+			bAckRequired = FALSE;
+			pHeader_802_11->Duration = 0;
+		}
+		else
+		{
+			bAckRequired = TRUE;
+			pHeader_802_11->Duration = RTMPCalcDuration(pAd, MlmeRate, 14);
+			if ((pHeader_802_11->FC.SubType == SUBTYPE_PROBE_RSP) && (pHeader_802_11->FC.Type == BTYPE_MGMT))
+			{
+				bInsertTimestamp = TRUE;
+				bAckRequired = FALSE; /* Disable ACK to prevent retry 0x1f for Probe Response*/
+			}
+			else if ((pHeader_802_11->FC.SubType == SUBTYPE_PROBE_REQ) && (pHeader_802_11->FC.Type == BTYPE_MGMT))
+			{
+				bAckRequired = FALSE; /* Disable ACK to prevent retry 0x1f for Probe Request*/
+			}
+		}
+	}
+
+	pHeader_802_11->Sequence = pAd->Sequence++;
+	if (pAd->Sequence >0xfff)
+		pAd->Sequence = 0;
+
+	/* Before radar detection done, mgmt frame can not be sent but probe req*/
+	/* Because we need to use probe req to trigger driver to send probe req in passive scan*/
+	if ((pHeader_802_11->FC.SubType != SUBTYPE_PROBE_REQ)
+		&& (pAd->CommonCfg.bIEEE80211H == 1)
+		&& (pAd->CommonCfg.RadarDetect.RDMode != RD_NORMAL_MODE))
+	{
+		DBGPRINT(RT_DEBUG_ERROR,("MlmeHardTransmit --> radar detect not in normal mode !!!\n"));
+/*		if (!IrqState)*/
+		RTMP_SEM_UNLOCK(&pAd->MgmtRingLock);
+		return (NDIS_STATUS_FAILURE);
+	}
+
+
+#ifdef RT_BIG_ENDIAN
+	RTMPFrameEndianChange(pAd, (PUCHAR)pHeader_802_11, DIR_WRITE, FALSE);
+#endif
+
+	
+	/* fill scatter-and-gather buffer list into TXD. Internally created NDIS PACKET*/
+	/* should always has only one physical buffer, and the whole frame size equals*/
+	/* to the first scatter buffer size*/
+	
+
+	/* Initialize TX Descriptor*/
+	/* For inter-frame gap, the number is for this frame and next frame*/
+	/* For MLME rate, we will fix as 2Mb to match other vendor's implement*/
+/*	pAd->CommonCfg.MlmeTransmit.field.MODE = 1;*/
+	
+/* management frame doesn't need encryption. so use RESERVED_WCID no matter u are sending to specific wcid or not.*/
+	PID = PID_MGMT;
+
+
+	if (pMacEntry == NULL)
+	{
+		RTMPWriteTxWI(pAd, pFirstTxWI, FALSE, FALSE, bInsertTimestamp, FALSE, bAckRequired, FALSE,
+		0, RESERVED_WCID, (SrcBufLen - TXINFO_SIZE - TXWI_SIZE), PID, 0,  (UCHAR)pAd->CommonCfg.MlmeTransmit.field.MCS, IFS_BACKOFF, FALSE, &pAd->CommonCfg.MlmeTransmit);
+	}
+	else
+	{
+		if (
+			((pHeader_802_11->FC.Type == BTYPE_DATA) &&
+		(pHeader_802_11->FC.SubType == SUBTYPE_QOS_NULL)))
+		{
+			printk("%s:: Using Low Rate to send QOS NULL!!\n", __FUNCTION__);
+			pMacEntry->MaxHTPhyMode.field.MODE = 1;
+			pMacEntry->MaxHTPhyMode.field.MCS = MCS_RATE_54;
+		}
+		/* dont use low rate to send QoS Null data frame */
+		RTMPWriteTxWI(pAd, pFirstTxWI, FALSE, FALSE,
+					bInsertTimestamp, FALSE, bAckRequired, FALSE,
+					0, pMacEntry->Aid, (SrcBufLen - TXINFO_SIZE - TXWI_SIZE),
+					pMacEntry->MaxHTPhyMode.field.MCS, 0,
+					(UCHAR)pMacEntry->MaxHTPhyMode.field.MCS,
+					IFS_BACKOFF, FALSE, &pMacEntry->MaxHTPhyMode);
+	}
+
+#ifdef RT_BIG_ENDIAN
+	RTMPWIEndianChange((PUCHAR)pFirstTxWI, TYPE_TXWI);
+#endif
+
+	/* Now do hardware-depened kick out.*/
+	HAL_KickOutMgmtTx(pAd, QueIdx, pPacket, pSrcBufVA, SrcBufLen);
+
+	/* Make sure to release MGMT ring resource*/
+/*	if (!IrqState)*/
+		RTMP_SEM_UNLOCK(&pAd->MgmtRingLock);
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/********************************************************************************
+		
+	New DeQueue Procedures.
+
+ ********************************************************************************/
+
+#define DEQUEUE_LOCK(lock, bIntContext, IrqFlags) 				\
+			do{													\
+				if (bIntContext == FALSE)						\
+				RTMP_IRQ_LOCK((lock), IrqFlags);		\
+			}while(0)
+
+#define DEQUEUE_UNLOCK(lock, bIntContext, IrqFlags)				\
+			do{													\
+				if (bIntContext == FALSE)						\
+					RTMP_IRQ_UNLOCK((lock), IrqFlags);	\
+			}while(0)
+
+
+
+
+/*
+	========================================================================
+	Tx Path design algorithm:
+		Basically, we divide the packets into four types, Broadcast/Multicast, 11N Rate(AMPDU, AMSDU, Normal), B/G Rate(ARALINK, Normal),
+		Specific Packet Type. Following show the classification rule and policy for each kinds of packets.
+				Classification Rule=>
+					Multicast: (*addr1 & 0x01) == 0x01
+					Specific : bDHCPFrame, bARPFrame, bEAPOLFrame, etc.
+					11N Rate : If peer support HT
+								(1).AMPDU  -- If TXBA is negotiated.
+								(2).AMSDU  -- If AMSDU is capable for both peer and ourself.
+											*). AMSDU can embedded in a AMPDU, but now we didn't support it.
+								(3).Normal -- Other packets which send as 11n rate.
+								
+					B/G Rate : If peer is b/g only.
+								(1).ARALINK-- If both of peer/us supprot Ralink proprietary Aggregation and the TxRate is large than RATE_6
+								(2).Normal -- Other packets which send as b/g rate.
+					Fragment:
+								The packet must be unicast, NOT A-RALINK, NOT A-MSDU, NOT 11n, then can consider about fragment.
+								
+				Classified Packet Handle Rule=>
+					Multicast:
+								No ACK, 		pTxBlk->bAckRequired = FALSE;
+								No WMM, 		pTxBlk->bWMM = FALSE;
+								No piggyback,   pTxBlk->bPiggyBack = FALSE;
+								Force LowRate,  pTxBlk->bForceLowRate = TRUE;
+					Specific :	Basically, for specific packet, we should handle it specifically, but now all specific packets are use
+									the same policy to handle it.
+								Force LowRate,  pTxBlk->bForceLowRate = TRUE;
+								
+					11N Rate :
+								No piggyback,	pTxBlk->bPiggyBack = FALSE;
+								
+								(1).AMSDU
+									pTxBlk->bWMM = TRUE;
+								(2).AMPDU
+									pTxBlk->bWMM = TRUE;
+								(3).Normal
+									
+					B/G Rate :
+								(1).ARALINK
+									
+								(2).Normal
+	========================================================================
+*/
+static UCHAR TxPktClassification(
+	IN RTMP_ADAPTER *pAd,
+	IN PNDIS_PACKET  pPacket)
+{
+	UCHAR			TxFrameType = TX_UNKOWN_FRAME;
+	UCHAR			Wcid;
+	MAC_TABLE_ENTRY	*pMacEntry = NULL;
+#ifdef DOT11_N_SUPPORT
+	BOOLEAN			bHTRate = FALSE;
+#endif /* DOT11_N_SUPPORT */
+
+	Wcid = RTMP_GET_PACKET_WCID(pPacket);
+	if (Wcid == MCAST_WCID)
+	{	/* Handle for RA is Broadcast/Multicast Address.*/
+		return TX_MCAST_FRAME;
+	}
+
+	/* Handle for unicast packets*/
+	pMacEntry = &pAd->MacTab.Content[Wcid];
+	if (RTMP_GET_PACKET_LOWRATE(pPacket))
+	{	/* It's a specific packet need to force low rate, i.e., bDHCPFrame, bEAPOLFrame, bWAIFrame*/
+		TxFrameType = TX_LEGACY_FRAME;
+	}
+#ifdef DOT11_N_SUPPORT
+	else if (IS_HT_RATE(pMacEntry))
+	{	/* it's a 11n capable packet*/
+
+		/* Depends on HTPhyMode to check if the peer support the HTRate transmission.*/
+		/* 	Currently didn't support A-MSDU embedded in A-MPDU*/
+		bHTRate = TRUE;
+		if (RTMP_GET_PACKET_MOREDATA(pPacket) || (pMacEntry->PsMode == PWR_SAVE))
+			TxFrameType = TX_LEGACY_FRAME;
+#ifdef UAPSD_AP_SUPPORT
+		else if (RTMP_GET_PACKET_EOSP(pPacket))
+			TxFrameType = TX_LEGACY_FRAME;
+#endif /* UAPSD_AP_SUPPORT */
+		else if((pMacEntry->TXBAbitmap & (1<<(RTMP_GET_PACKET_UP(pPacket)))) != 0)
+			return TX_AMPDU_FRAME;
+		else if(CLIENT_STATUS_TEST_FLAG(pMacEntry, fCLIENT_STATUS_AMSDU_INUSED))
+			return TX_AMSDU_FRAME;
+		else
+			TxFrameType = TX_LEGACY_FRAME;
+	}
+#endif /* DOT11_N_SUPPORT */
+	else
+	{	/* it's a legacy b/g packet.*/
+		if ((CLIENT_STATUS_TEST_FLAG(pMacEntry, fCLIENT_STATUS_AGGREGATION_CAPABLE) && pAd->CommonCfg.bAggregationCapable) &&
+			(RTMP_GET_PACKET_TXRATE(pPacket) >= RATE_6) &&
+			(!(OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_WMM_INUSED) && CLIENT_STATUS_TEST_FLAG(pMacEntry, fCLIENT_STATUS_WMM_CAPABLE))))
+		{	/* if peer support Ralink Aggregation, we use it.*/
+			TxFrameType = TX_RALINK_FRAME;
+		}
+		else
+		{
+			TxFrameType = TX_LEGACY_FRAME;
+		}
+	}
+
+	/* Currently, our fragment only support when a unicast packet send as NOT-ARALINK, NOT-AMSDU and NOT-AMPDU.*/
+	if ((RTMP_GET_PACKET_FRAGMENTS(pPacket) > 1)
+		 && (TxFrameType == TX_LEGACY_FRAME)
+#ifdef DOT11_N_SUPPORT
+		&& ((pMacEntry->TXBAbitmap & (1<<(RTMP_GET_PACKET_UP(pPacket)))) == 0)
+#endif /* DOT11_N_SUPPORT */
+		)
+		TxFrameType = TX_FRAG_FRAME;
+
+	return TxFrameType;
+}
+
+
+BOOLEAN RTMP_FillTxBlkInfo(
+	IN RTMP_ADAPTER *pAd,
+	IN TX_BLK *pTxBlk)
+{
+	PACKET_INFO			PacketInfo;
+	PNDIS_PACKET		pPacket;
+	PMAC_TABLE_ENTRY	pMacEntry = NULL;
+
+	pPacket = pTxBlk->pPacket;
+	RTMP_QueryPacketInfo(pPacket, &PacketInfo, &pTxBlk->pSrcBufHeader, &pTxBlk->SrcBufLen);
+
+	pTxBlk->Wcid	 	 		= RTMP_GET_PACKET_WCID(pPacket);
+	pTxBlk->apidx		 		= RTMP_GET_PACKET_IF(pPacket);
+	pTxBlk->UserPriority 		= RTMP_GET_PACKET_UP(pPacket);
+	pTxBlk->FrameGap = IFS_HTTXOP;		/* ASIC determine Frame Gap*/
+
+	if (RTMP_GET_PACKET_CLEAR_EAP_FRAME(pTxBlk->pPacket))
+		TX_BLK_SET_FLAG(pTxBlk, fTX_bClearEAPFrame);
+	else
+		TX_BLK_CLEAR_FLAG(pTxBlk, fTX_bClearEAPFrame);
+	
+	/* Default to clear this flag*/
+	TX_BLK_CLEAR_FLAG(pTxBlk, fTX_bForceNonQoS);
+	
+	
+	if (pTxBlk->Wcid == MCAST_WCID)
+	{
+		pTxBlk->pMacEntry = NULL;
+		{
+#ifdef MCAST_RATE_SPECIFIC
+			PUCHAR pDA = GET_OS_PKT_DATAPTR(pPacket);
+			if (((*pDA & 0x01) == 0x01) && (*pDA != 0xff))
+				pTxBlk->pTransmit = &pAd->CommonCfg.MCastPhyMode;
+			else
+#endif /* MCAST_RATE_SPECIFIC */
+				pTxBlk->pTransmit = &pAd->MacTab.Content[MCAST_WCID].HTPhyMode;
+		}
+		
+		TX_BLK_CLEAR_FLAG(pTxBlk, fTX_bAckRequired);	/* AckRequired = FALSE, when broadcast packet in Adhoc mode.*/
+		/*TX_BLK_SET_FLAG(pTxBlk, fTX_bForceLowRate);*/
+		TX_BLK_CLEAR_FLAG(pTxBlk, fTX_bAllowFrag);
+		TX_BLK_CLEAR_FLAG(pTxBlk, fTX_bWMM);
+		if (RTMP_GET_PACKET_MOREDATA(pPacket))
+		{
+			TX_BLK_SET_FLAG(pTxBlk, fTX_bMoreData);
+		}
+	}
+	else
+	{
+		pTxBlk->pMacEntry = &pAd->MacTab.Content[pTxBlk->Wcid];
+		pTxBlk->pTransmit = &pTxBlk->pMacEntry->HTPhyMode;
+
+		pMacEntry = pTxBlk->pMacEntry;
+		
+		/* For all unicast packets, need Ack unless the Ack Policy is not set as NORMAL_ACK.*/
+		if (pAd->CommonCfg.AckPolicy[pTxBlk->QueIdx] != NORMAL_ACK)
+			TX_BLK_CLEAR_FLAG(pTxBlk, fTX_bAckRequired);
+		else
+			TX_BLK_SET_FLAG(pTxBlk, fTX_bAckRequired);
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef XLINK_SUPPORT
+		if ((pAd->OpMode == OPMODE_STA) &&
+			(ADHOC_ON(pAd)) /*&& 
+			(RX_FILTER_TEST_FLAG(pAd, fRX_FILTER_ACCEPT_PROMISCUOUS))*/)
+		{
+			if(pAd->StaCfg.PSPXlink)
+				TX_BLK_CLEAR_FLAG(pTxBlk, fTX_bAckRequired);
+		}
+#endif /* XLINK_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+
+		{
+
+#ifdef CONFIG_STA_SUPPORT
+			IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+			{
+
+
+				/* If support WMM, enable it.*/
+				if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_WMM_INUSED) &&
+					CLIENT_STATUS_TEST_FLAG(pMacEntry, fCLIENT_STATUS_WMM_CAPABLE))
+					TX_BLK_SET_FLAG(pTxBlk, fTX_bWMM);
+		
+/*				if (pAd->StaCfg.bAutoTxRateSwitch)*/
+/*					TX_BLK_SET_FLAG(pTxBlk, fTX_AutoRateSwitch);*/
+			}
+#endif /* CONFIG_STA_SUPPORT */
+		}
+
+		if (pTxBlk->TxFrameType == TX_LEGACY_FRAME)
+		{
+			if ( (RTMP_GET_PACKET_LOWRATE(pPacket)) ||
+                ((pAd->OpMode == OPMODE_AP) && (pMacEntry->MaxHTPhyMode.field.MODE == MODE_CCK) && (pMacEntry->MaxHTPhyMode.field.MCS == RATE_1)))
+			{	/* Specific packet, i.e., bDHCPFrame, bEAPOLFrame, bWAIFrame, need force low rate.*/
+				pTxBlk->pTransmit = &pAd->MacTab.Content[MCAST_WCID].HTPhyMode;
+
+#ifdef DOT11_N_SUPPORT
+				/* Modify the WMM bit for ICV issue. If we have a packet with EOSP field need to set as 1, how to handle it???*/
+				if (IS_HT_STA(pTxBlk->pMacEntry) &&
+					(CLIENT_STATUS_TEST_FLAG(pMacEntry, fCLIENT_STATUS_RALINK_CHIPSET)) &&
+					((pAd->CommonCfg.bRdg == TRUE) && CLIENT_STATUS_TEST_FLAG(pMacEntry, fCLIENT_STATUS_RDG_CAPABLE)))
+				{
+					TX_BLK_CLEAR_FLAG(pTxBlk, fTX_bWMM);
+					TX_BLK_SET_FLAG(pTxBlk, fTX_bForceNonQoS);
+				}
+#endif /* DOT11_N_SUPPORT */
+			}
+			
+#ifdef DOT11_N_SUPPORT
+			if ( (IS_HT_RATE(pMacEntry) == FALSE) &&
+				(CLIENT_STATUS_TEST_FLAG(pMacEntry, fCLIENT_STATUS_PIGGYBACK_CAPABLE)))
+			{	/* Currently piggy-back only support when peer is operate in b/g mode.*/
+				TX_BLK_SET_FLAG(pTxBlk, fTX_bPiggyBack);
+			}
+#endif /* DOT11_N_SUPPORT */
+
+			if (RTMP_GET_PACKET_MOREDATA(pPacket))
+			{
+				TX_BLK_SET_FLAG(pTxBlk, fTX_bMoreData);
+			}
+#ifdef UAPSD_AP_SUPPORT
+			if (RTMP_GET_PACKET_EOSP(pPacket))
+			{
+				TX_BLK_SET_FLAG(pTxBlk, fTX_bWMM_UAPSD_EOSP);
+			}
+#endif /* UAPSD_AP_SUPPORT */
+		}
+		else if (pTxBlk->TxFrameType == TX_FRAG_FRAME)
+		{
+			TX_BLK_SET_FLAG(pTxBlk, fTX_bAllowFrag);
+		}
+		
+		pMacEntry->DebugTxCount++;
+	}
+
+	pAd->LastTxRate = (USHORT)pTxBlk->pTransmit->word;
+
+	return TRUE;
+}
+
+
+BOOLEAN CanDoAggregateTransmit(
+	IN RTMP_ADAPTER *pAd,
+	IN NDIS_PACKET *pPacket,
+	IN TX_BLK		*pTxBlk)
+{
+
+	/*DBGPRINT(RT_DEBUG_TRACE, ("Check if can do aggregation! TxFrameType=%d!\n", pTxBlk->TxFrameType));*/
+	
+	if (RTMP_GET_PACKET_WCID(pPacket) == MCAST_WCID)
+		return FALSE;
+
+	if (RTMP_GET_PACKET_DHCP(pPacket) ||
+		RTMP_GET_PACKET_EAPOL(pPacket) ||
+		RTMP_GET_PACKET_WAI(pPacket))
+		return FALSE;
+	
+	if ((pTxBlk->TxFrameType == TX_AMSDU_FRAME) &&
+		((pTxBlk->TotalFrameLen + GET_OS_PKT_LEN(pPacket))> (RX_BUFFER_AGGRESIZE - 100)))
+	{	/* For AMSDU, allow the packets with total length < max-amsdu size*/
+		return FALSE;
+	}
+	
+	if ((pTxBlk->TxFrameType == TX_RALINK_FRAME) &&
+		(pTxBlk->TxPacketList.Number == 2))
+	{	/* For RALINK-Aggregation, allow two frames in one batch.*/
+		return FALSE;
+	}
+
+#ifdef CONFIG_STA_SUPPORT
+	if ((INFRA_ON(pAd)) && (pAd->OpMode == OPMODE_STA)) /* must be unicast to AP*/
+		return TRUE;
+	else
+#endif /* CONFIG_STA_SUPPORT */
+		return FALSE;
+	
+}
+
+
+/*
+	========================================================================
+
+	Routine Description:
+		To do the enqueue operation and extract the first item of waiting
+		list. If a number of available shared memory segments could meet
+		the request of extracted item, the extracted item will be fragmented
+		into shared memory segments.
+	
+	Arguments:
+		pAd Pointer to our adapter
+		pQueue		Pointer to Waiting Queue
+		
+	Return Value:
+		None
+
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+	
+	========================================================================
+*/
+VOID RTMPDeQueuePacket(
+	IN  PRTMP_ADAPTER   pAd,
+	IN  BOOLEAN         bIntContext,
+	IN  UCHAR			QIdx, /* BulkOutPipeId */
+	IN  UCHAR           Max_Tx_Packets)
+{
+	PQUEUE_ENTRY    pEntry = NULL;
+	PNDIS_PACKET 	pPacket;
+	NDIS_STATUS     Status = NDIS_STATUS_SUCCESS;
+	UCHAR           Count=0;
+	PQUEUE_HEADER   pQueue;
+	ULONG           FreeNumber[NUM_OF_TX_RING];
+	UCHAR			QueIdx, sQIdx, eQIdx;
+	unsigned long	IrqFlags = 0;
+	BOOLEAN			hasTxDesc = FALSE;
+	TX_BLK			TxBlk;
+	TX_BLK			*pTxBlk;
+
+#ifdef DBG_DIAGNOSE
+	BOOLEAN			firstRound;
+	RtmpDiagStruct	*pDiagStruct = &pAd->DiagStruct;
+#endif
+
+
+	if (QIdx == NUM_OF_TX_RING)
+	{
+		sQIdx = 0;
+		eQIdx = 3;	/* 4 ACs, start from 0.*/
+	}
+	else
+	{
+		sQIdx = eQIdx = QIdx;
+	}
+
+	for (QueIdx=sQIdx; QueIdx <= eQIdx; QueIdx++)
+	{
+		Count=0;
+
+		RTMP_START_DEQUEUE(pAd, QueIdx, IrqFlags);
+
+#ifdef DBG_DIAGNOSE
+		firstRound = ((QueIdx == 0) ? TRUE : FALSE);
+#endif /* DBG_DIAGNOSE */
+
+		while (1)
+		{
+			if ((RTMP_TEST_FLAG(pAd, (fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS |
+										fRTMP_ADAPTER_RADIO_OFF |
+										fRTMP_ADAPTER_RESET_IN_PROGRESS |
+										fRTMP_ADAPTER_HALT_IN_PROGRESS |
+										fRTMP_ADAPTER_NIC_NOT_EXIST)))
+				)
+			{
+				RTMP_STOP_DEQUEUE(pAd, QueIdx, IrqFlags);
+				return;
+			}
+			
+			if (Count >= Max_Tx_Packets)
+				break;
+			
+			DEQUEUE_LOCK(&pAd->irq_lock, bIntContext, IrqFlags);
+			if (&pAd->TxSwQueue[QueIdx] == NULL)
+			{
+#ifdef DBG_DIAGNOSE
+				if (firstRound == TRUE)
+					pDiagStruct->TxSWQueCnt[pDiagStruct->ArrayCurIdx][0]++;
+#endif /* DBG_DIAGNOSE */
+				DEQUEUE_UNLOCK(&pAd->irq_lock, bIntContext, IrqFlags);
+				break;
+			}
+
+
+			/* probe the Queue Head*/
+			pQueue = &pAd->TxSwQueue[QueIdx];
+			if ((pEntry = pQueue->Head) == NULL)
+			{
+				DEQUEUE_UNLOCK(&pAd->irq_lock, bIntContext, IrqFlags);
+				break;
+			}
+
+			pTxBlk = &TxBlk;
+			NdisZeroMemory((PUCHAR)pTxBlk, sizeof(TX_BLK));
+			/*InitializeQueueHeader(&pTxBlk->TxPacketList);		 Didn't need it because we already memzero it.*/
+			pTxBlk->QueIdx = QueIdx;
+	
+#ifdef VENDOR_FEATURE1_SUPPORT
+			pTxBlk->HeaderBuf = (UCHAR *)pTxBlk->HeaderBuffer;
+#endif /* VENDOR_FEATURE1_SUPPORT */
+
+			pPacket = QUEUE_ENTRY_TO_PACKET(pEntry);
+
+			
+			/* Early check to make sure we have enoguh Tx Resource.*/
+			hasTxDesc = RTMP_HAS_ENOUGH_FREE_DESC(pAd, pTxBlk, FreeNumber[QueIdx], pPacket);
+			if (!hasTxDesc)
+			{
+				pAd->PrivateInfo.TxRingFullCnt++;
+
+				DEQUEUE_UNLOCK(&pAd->irq_lock, bIntContext, IrqFlags);
+				
+				break;
+			}
+
+			pTxBlk->TxFrameType = TxPktClassification(pAd, pPacket);
+			pEntry = RemoveHeadQueue(pQueue);
+			pTxBlk->TotalFrameNum++;
+			pTxBlk->TotalFragNum += RTMP_GET_PACKET_FRAGMENTS(pPacket);	/* The real fragment number maybe vary*/
+			pTxBlk->TotalFrameLen += GET_OS_PKT_LEN(pPacket);
+			pTxBlk->pPacket = pPacket;
+			InsertTailQueue(&pTxBlk->TxPacketList, PACKET_TO_QUEUE_ENTRY(pPacket));
+
+			if (pTxBlk->TxFrameType == TX_RALINK_FRAME || pTxBlk->TxFrameType == TX_AMSDU_FRAME)
+			{
+				// Enhance SW Aggregation Mechanism
+				if (NEED_QUEUE_BACK_FOR_AGG(pAd, QueIdx, FreeNumber[QueIdx], pTxBlk->TxFrameType))
+				{
+					InsertHeadQueue(pQueue, PACKET_TO_QUEUE_ENTRY(pPacket));
+					DEQUEUE_UNLOCK(&pAd->irq_lock, bIntContext, IrqFlags);
+					break;
+				}
+			}
+
+
+			if (pTxBlk->TxFrameType == TX_RALINK_FRAME || pTxBlk->TxFrameType == TX_AMSDU_FRAME)
+			{
+				do{
+					if((pEntry = pQueue->Head) == NULL)
+						break;
+
+					/* For TX_AMSDU_FRAME/TX_RALINK_FRAME, Need to check if next pakcet can do aggregation.*/
+					pPacket = QUEUE_ENTRY_TO_PACKET(pEntry);
+					FreeNumber[QueIdx] = GET_TXRING_FREENO(pAd, QueIdx);
+					hasTxDesc = RTMP_HAS_ENOUGH_FREE_DESC(pAd, pTxBlk, FreeNumber[QueIdx], pPacket);
+					if ((hasTxDesc == FALSE) || (CanDoAggregateTransmit(pAd, pPacket, pTxBlk) == FALSE))
+						break;
+
+					/*Remove the packet from the TxSwQueue and insert into pTxBlk*/
+					pEntry = RemoveHeadQueue(pQueue);
+					ASSERT(pEntry);
+					pPacket = QUEUE_ENTRY_TO_PACKET(pEntry);
+
+
+					pTxBlk->TotalFrameNum++;
+					pTxBlk->TotalFragNum += RTMP_GET_PACKET_FRAGMENTS(pPacket);	/* The real fragment number maybe vary*/
+					pTxBlk->TotalFrameLen += GET_OS_PKT_LEN(pPacket);
+					InsertTailQueue(&pTxBlk->TxPacketList, PACKET_TO_QUEUE_ENTRY(pPacket));
+				}while(1);
+
+				if (pTxBlk->TxPacketList.Number == 1)
+					pTxBlk->TxFrameType = TX_LEGACY_FRAME;
+			}
+
+#ifdef RTMP_MAC_USB
+			DEQUEUE_UNLOCK(&pAd->irq_lock, bIntContext, IrqFlags);
+#endif /* RTMP_MAC_USB */
+					
+			Count += pTxBlk->TxPacketList.Number;
+
+				/* Do HardTransmit now.*/
+#ifdef CONFIG_STA_SUPPORT
+			IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+			{
+				Status = STAHardTransmit(pAd, pTxBlk, QueIdx);
+			}
+#endif /* CONFIG_STA_SUPPORT */
+
+
+		}
+
+		RTMP_STOP_DEQUEUE(pAd, QueIdx, IrqFlags);
+
+#ifdef RTMP_MAC_USB
+		if (!hasTxDesc)
+			RTUSBKickBulkOut(pAd);
+#endif /* RTMP_MAC_USB */
+		
+#ifdef BLOCK_NET_IF
+		if ((pAd->blockQueueTab[QueIdx].SwTxQueueBlockFlag == TRUE)
+			&& (pAd->TxSwQueue[QueIdx].Number < 1))
+		{
+			releaseNetIf(&pAd->blockQueueTab[QueIdx]);
+		}
+#endif /* BLOCK_NET_IF */
+
+	}
+
+}
+
+
+/*
+	========================================================================
+
+	Routine Description:
+		Calculates the duration which is required to transmit out frames
+	with given size and specified rate.
+		
+	Arguments:
+		pAd 	Pointer to our adapter
+		Rate			Transmit rate
+		Size			Frame size in units of byte
+		
+	Return Value:
+		Duration number in units of usec
+
+	IRQL = PASSIVE_LEVEL
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+	
+	========================================================================
+*/
+USHORT	RTMPCalcDuration(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			Rate,
+	IN	ULONG			Size)
+{
+	ULONG	Duration = 0;
+
+	if (Rate < RATE_FIRST_OFDM_RATE) /* CCK*/
+	{
+		if ((Rate > RATE_1) && OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED))
+			Duration = 96;	/* 72+24 preamble+plcp*/
+		else
+			Duration = 192; /* 144+48 preamble+plcp*/
+
+		Duration += (USHORT)((Size << 4) / RateIdTo500Kbps[Rate]);
+		if ((Size << 4) % RateIdTo500Kbps[Rate])
+			Duration ++;
+	}
+	else if (Rate <= RATE_LAST_OFDM_RATE)/* OFDM rates*/
+	{
+		Duration = 20 + 6;		/* 16+4 preamble+plcp + Signal Extension*/
+		Duration += 4 * (USHORT)((11 + Size * 4) / RateIdTo500Kbps[Rate]);
+		if ((11 + Size * 4) % RateIdTo500Kbps[Rate])
+			Duration += 4;
+	}
+	else	/*mimo rate*/
+	{
+		Duration = 20 + 6;		/* 16+4 preamble+plcp + Signal Extension*/
+	}
+	
+	return (USHORT)Duration;
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Calculates the duration which is required to transmit out frames
+	with given size and specified rate.
+					  
+	Arguments:
+		pTxWI		Pointer to head of each MPDU to HW.
+		Ack 		Setting for Ack requirement bit
+		Fragment	Setting for Fragment bit
+		RetryMode	Setting for retry mode
+		Ifs 		Setting for IFS gap
+		Rate		Setting for transmit rate
+		Service 	Setting for service
+		Length		Frame length
+		TxPreamble	Short or Long preamble when using CCK rates
+		QueIdx - 0-3, according to 802.11e/d4.4 June/2003
+		
+	Return Value:
+		None
+		
+	IRQL = PASSIVE_LEVEL
+	IRQL = DISPATCH_LEVEL
+	
+    See also : BASmartHardTransmit()    !!!
+	
+	========================================================================
+*/
+VOID RTMPWriteTxWI(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PTXWI_STRUC 	pOutTxWI,
+	IN	BOOLEAN			FRAG,
+	IN	BOOLEAN			CFACK,
+	IN	BOOLEAN			InsTimestamp,
+	IN	BOOLEAN 		AMPDU,
+	IN	BOOLEAN 		Ack,
+	IN	BOOLEAN 		NSeq,		/* HW new a sequence.*/
+	IN	UCHAR			BASize,
+	IN	UCHAR			WCID,
+	IN	ULONG			Length,
+	IN	UCHAR 			PID,
+	IN	UCHAR			TID,
+	IN	UCHAR			TxRate,
+	IN	UCHAR			Txopmode,
+	IN	BOOLEAN			CfAck,
+	IN	HTTRANSMIT_SETTING	*pTransmit)
+{
+	PMAC_TABLE_ENTRY	pMac = NULL;
+	TXWI_STRUC 		TxWI;
+	PTXWI_STRUC 	pTxWI;
+
+	if (WCID < MAX_LEN_OF_MAC_TABLE)
+		pMac = &pAd->MacTab.Content[WCID];
+
+	
+	/* Always use Long preamble before verifiation short preamble functionality works well.*/
+	/* Todo: remove the following line if short preamble functionality works*/
+	
+	OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED);
+	NdisZeroMemory(&TxWI, TXWI_SIZE);
+	pTxWI = &TxWI;
+
+	pTxWI->FRAG= FRAG;
+
+	pTxWI->CFACK = CFACK;
+	pTxWI->TS= InsTimestamp;
+	pTxWI->AMPDU = AMPDU;
+	pTxWI->ACK = Ack;
+	pTxWI->txop= Txopmode;
+	
+	pTxWI->NSEQ = NSeq;
+	/* John tune the performace with Intel Client in 20 MHz performance*/
+#ifdef DOT11_N_SUPPORT
+	BASize = pAd->CommonCfg.TxBASize;
+	if (pAd->MACVersion == 0x28720200)
+	{
+		if( BASize >13 )
+			BASize =13;
+	}
+	else
+	{
+		if( BASize >7 )
+			BASize =7;
+	}
+
+	pTxWI->BAWinSize = BASize;
+	pTxWI->ShortGI = pTransmit->field.ShortGI;
+	pTxWI->STBC = pTransmit->field.STBC;
+
+#endif /* DOT11_N_SUPPORT */
+		
+	pTxWI->WirelessCliID = WCID;
+	pTxWI->MPDUtotalByteCount = Length;
+	pTxWI->PacketId = PID;
+	
+	/* If CCK or OFDM, BW must be 20*/
+	pTxWI->BW = (pTransmit->field.MODE <= MODE_OFDM) ? (BW_20) : (pTransmit->field.BW);
+#ifdef DOT11_N_SUPPORT
+#ifdef DOT11N_DRAFT3
+	if (pTxWI->BW)
+		pTxWI->BW = (pAd->CommonCfg.AddHTInfo.AddHtInfo.RecomWidth == 0) ? (BW_20) : (pTransmit->field.BW);
+#endif /* DOT11N_DRAFT3 */
+#endif /* DOT11_N_SUPPORT */
+	
+	/* P2P test case 6.1.12 */
+		{
+	pTxWI->MCS = pTransmit->field.MCS;
+	pTxWI->PHYMODE = pTransmit->field.MODE;
+		}
+	pTxWI->CFACK = CfAck;
+
+#ifdef DOT11_N_SUPPORT
+	if (pMac)
+	{
+        if (pAd->CommonCfg.bMIMOPSEnable)
+        {
+    		if ((pMac->MmpsMode == MMPS_DYNAMIC) && (pTransmit->field.MCS > 7))
+			{
+				/* Dynamic MIMO Power Save Mode*/
+				pTxWI->MIMOps = 1;
+			}
+			else if (pMac->MmpsMode == MMPS_STATIC)
+			{
+				/* Static MIMO Power Save Mode*/
+				if (pTransmit->field.MODE >= MODE_HTMIX && pTransmit->field.MCS > 7)
+				{
+					pTxWI->MCS = 7;
+					pTxWI->MIMOps = 0;
+				}
+			}
+        }
+		/*pTxWI->MIMOps = (pMac->PsMode == PWR_MMPS)? 1:0;*/
+#ifndef DOT11N_SS3_SUPPORT
+		if (pMac->bIAmBadAtheros && (pMac->WepStatus != Ndis802_11WEPDisabled))
+		{
+			pTxWI->MpduDensity = 7;
+		}
+		else
+#endif /* DOT11N_SS3_SUPPORT */
+		{
+		pTxWI->MpduDensity = pMac->MpduDensity;
+	}
+	}
+#endif /* DOT11_N_SUPPORT */
+
+
+	pTxWI->PacketId = pTxWI->MCS;
+	NdisMoveMemory(pOutTxWI, &TxWI, sizeof(TXWI_STRUC));
+}
+
+
+VOID RTMPWriteTxWI_Data(
+	IN	PRTMP_ADAPTER		pAd,
+	IN	OUT PTXWI_STRUC		pTxWI,
+	IN	TX_BLK				*pTxBlk)
+{
+	HTTRANSMIT_SETTING	*pTransmit;
+	PMAC_TABLE_ENTRY	pMacEntry;
+#ifdef DOT11_N_SUPPORT
+	UCHAR				BASize;
+#endif /* DOT11_N_SUPPORT */
+
+
+	ASSERT(pTxWI);
+
+	pTransmit = pTxBlk->pTransmit;
+	pMacEntry = pTxBlk->pMacEntry;
+
+
+	
+	/* Always use Long preamble before verifiation short preamble functionality works well.*/
+	/* Todo: remove the following line if short preamble functionality works*/
+	
+	OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED);
+	NdisZeroMemory(pTxWI, TXWI_SIZE);
+	
+	pTxWI->FRAG		= TX_BLK_TEST_FLAG(pTxBlk, fTX_bAllowFrag);
+	pTxWI->ACK		= TX_BLK_TEST_FLAG(pTxBlk, fTX_bAckRequired);
+	pTxWI->txop		= pTxBlk->FrameGap;
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef QOS_DLS_SUPPORT
+	if (pMacEntry &&
+		(pAd->StaCfg.BssType == BSS_INFRA) &&
+		IS_ENTRY_DLS(pMacEntry))
+		pTxWI->WirelessCliID = BSSID_WCID;
+	else
+#endif /* QOS_DLS_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+	pTxWI->WirelessCliID		= pTxBlk->Wcid;
+
+	pTxWI->MPDUtotalByteCount	= pTxBlk->MpduHeaderLen + pTxBlk->SrcBufLen;
+	pTxWI->CFACK				= TX_BLK_TEST_FLAG(pTxBlk, fTX_bPiggyBack);
+
+	/* If CCK or OFDM, BW must be 20*/
+	pTxWI->BW = (pTransmit->field.MODE <= MODE_OFDM) ? (BW_20) : (pTransmit->field.BW);
+#ifdef DOT11_N_SUPPORT
+#ifdef DOT11N_DRAFT3
+	if (pTxWI->BW)
+		pTxWI->BW = (pAd->CommonCfg.AddHTInfo.AddHtInfo.RecomWidth == 0) ? (BW_20) : (pTransmit->field.BW);
+#endif /* DOT11N_DRAFT3 */
+	pTxWI->AMPDU	= ((pTxBlk->TxFrameType == TX_AMPDU_FRAME) ? TRUE : FALSE);
+
+	BASize = pAd->CommonCfg.TxBASize;
+
+	if((pTxBlk->TxFrameType == TX_AMPDU_FRAME) && (pMacEntry))
+	{
+		UCHAR		RABAOriIdx = 0;	/*The RA's BA Originator table index.*/
+					
+		RABAOriIdx = pTxBlk->pMacEntry->BAOriWcidArray[pTxBlk->UserPriority];
+		BASize = pAd->BATable.BAOriEntry[RABAOriIdx].BAWinSize;
+	}
+
+
+	pTxWI->BAWinSize = BASize;
+	pTxWI->ShortGI = pTransmit->field.ShortGI;
+	pTxWI->STBC = pTransmit->field.STBC;
+
+#endif /* DOT11_N_SUPPORT */
+	
+	pTxWI->MCS = pTransmit->field.MCS;
+	pTxWI->PHYMODE = pTransmit->field.MODE;
+
+
+
+#ifdef DOT11_N_SUPPORT
+	if (pMacEntry)
+	{
+		if ((pMacEntry->MmpsMode == MMPS_DYNAMIC) && (pTransmit->field.MCS > 7))
+		{
+			/* Dynamic MIMO Power Save Mode*/
+			pTxWI->MIMOps = 1;
+		}
+		else if (pMacEntry->MmpsMode == MMPS_STATIC)
+		{
+			/* Static MIMO Power Save Mode*/
+			if (pTransmit->field.MODE >= MODE_HTMIX && pTransmit->field.MCS > 7)
+			{
+				pTxWI->MCS = 7;
+				pTxWI->MIMOps = 0;
+			}
+		}
+		
+#ifndef DOT11N_SS3_SUPPORT
+		if (pMacEntry->bIAmBadAtheros && (pMacEntry->WepStatus != Ndis802_11WEPDisabled))
+		{
+			pTxWI->MpduDensity = 7;
+		}
+		else
+#endif /* DOT11N_SS3_SUPPORT */
+		{
+		pTxWI->MpduDensity = pMacEntry->MpduDensity;
+	}
+	}
+#endif /* DOT11_N_SUPPORT */
+	
+	
+#ifdef DBG_DIAGNOSE
+		if (pTxBlk->QueIdx== 0)
+		{
+			pAd->DiagStruct.TxDataCnt[pAd->DiagStruct.ArrayCurIdx]++;
+			pAd->DiagStruct.TxMcsCnt[pAd->DiagStruct.ArrayCurIdx][pTxWI->MCS]++;
+		}
+#endif /* DBG_DIAGNOSE */
+
+	/* for rate adapation*/
+	pTxWI->PacketId = pTxWI->MCS;
+#ifdef INF_AMAZON_SE
+/*Iverson patch for WMM A5-T07 ,WirelessStaToWirelessSta do not bulk out aggregate */
+	if( RTMP_GET_PACKET_NOBULKOUT(pTxBlk->pPacket))
+	{
+		if(pTxWI->PHYMODE == MODE_CCK)
+		{
+			pTxWI->PacketId = 6;
+		}
+	}	
+#endif /* INF_AMAZON_SE */	
+
+}
+
+
+VOID RTMPWriteTxWI_Cache(
+	IN	PRTMP_ADAPTER		pAd,
+	IN	OUT PTXWI_STRUC		pTxWI,
+	IN	TX_BLK				*pTxBlk)
+{
+	PHTTRANSMIT_SETTING	/*pTxHTPhyMode,*/ pTransmit;
+	PMAC_TABLE_ENTRY	pMacEntry;
+#ifdef DOT11_N_SUPPORT
+#endif /* DOT11_N_SUPPORT */
+	
+	
+	/* update TXWI*/
+	
+	pMacEntry = pTxBlk->pMacEntry;
+	pTransmit = pTxBlk->pTransmit;
+	
+	/*if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED))*/
+	/*if (RTMPCheckEntryEnableAutoRateSwitch(pAd, pMacEntry))*/
+	/*if (TX_BLK_TEST_FLAG(pTxBlk, fTX_AutoRateSwitch))*/
+	if (pMacEntry->bAutoTxRateSwitch)
+	{
+		pTxWI->txop = IFS_HTTXOP;
+
+		/* If CCK or OFDM, BW must be 20*/
+		pTxWI->BW = (pTransmit->field.MODE <= MODE_OFDM) ? (BW_20) : (pTransmit->field.BW);
+		pTxWI->ShortGI = pTransmit->field.ShortGI;
+		pTxWI->STBC = pTransmit->field.STBC;
+
+
+		pTxWI->MCS = pTransmit->field.MCS;
+		pTxWI->PHYMODE = pTransmit->field.MODE;
+
+		/* set PID for TxRateSwitching*/
+		pTxWI->PacketId = pTransmit->field.MCS;
+	}
+
+#ifdef DOT11_N_SUPPORT
+	pTxWI->AMPDU = ((pMacEntry->NoBADataCountDown == 0) ? TRUE: FALSE);
+	pTxWI->MIMOps = 0;
+
+#ifdef DOT11N_DRAFT3
+	if (pTxWI->BW)
+		pTxWI->BW = (pAd->CommonCfg.AddHTInfo.AddHtInfo.RecomWidth == 0) ? (BW_20) : (pTransmit->field.BW);
+#endif /* DOT11N_DRAFT3 */
+
+    if (pAd->CommonCfg.bMIMOPSEnable)
+    {
+		/* MIMO Power Save Mode*/
+		if ((pMacEntry->MmpsMode == MMPS_DYNAMIC) && (pTransmit->field.MCS > 7))
+		{
+			/* Dynamic MIMO Power Save Mode*/
+			pTxWI->MIMOps = 1;
+		}
+		else if (pMacEntry->MmpsMode == MMPS_STATIC)
+		{
+			/* Static MIMO Power Save Mode*/
+			if ((pTransmit->field.MODE >= MODE_HTMIX) && (pTransmit->field.MCS > 7))
+			{
+				pTxWI->MCS = 7;
+				pTxWI->MIMOps = 0;
+			}
+		}
+    }
+
+#endif /* DOT11_N_SUPPORT */
+
+#ifdef DBG_DIAGNOSE
+	if (pTxBlk->QueIdx== 0)
+	{
+		pAd->DiagStruct.TxDataCnt[pAd->DiagStruct.ArrayCurIdx]++;
+		pAd->DiagStruct.TxMcsCnt[pAd->DiagStruct.ArrayCurIdx][pTxWI->MCS]++;
+	}
+#endif /* DBG_DIAGNOSE */
+
+
+	pTxWI->MPDUtotalByteCount = pTxBlk->MpduHeaderLen + pTxBlk->SrcBufLen;
+
+	
+}
+
+
+/*
+	========================================================================
+
+	Routine Description:
+		Suspend MSDU transmission
+		
+	Arguments:
+		pAd 	Pointer to our adapter
+		
+	Return Value:
+		None
+		
+	Note:
+	
+	========================================================================
+*/
+VOID	RTMPSuspendMsduTransmission(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	DBGPRINT(RT_DEBUG_TRACE,("SCANNING, suspend MSDU transmission ...\n"));
+
+
+	
+	/* Before BSS_SCAN_IN_PROGRESS, we need to keep Current R66 value and*/
+	/* use Lowbound as R66 value on ScanNextChannel(...)*/
+	
+	RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R66, &pAd->BbpTuning.R66CurrentValue);
+	
+	/* set BBP_R66 to 0x30/0x40 when scanning (AsicSwitchChannel will set R66 according to channel when scanning)*/
+	/*RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, (0x26 + GET_LNA_GAIN(pAd)));*/
+	RTMPSetAGCInitValue(pAd, BW_20);
+	
+	RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS);
+	/*RTMP_IO_WRITE32(pAd, TX_CNTL_CSR, 0x000f0000);		 abort all TX rings*/
+}
+
+
+/*
+	========================================================================
+
+	Routine Description:
+		Resume MSDU transmission
+		
+	Arguments:
+		pAd 	Pointer to our adapter
+		
+	Return Value:
+		None
+		
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+	
+	========================================================================
+*/
+VOID RTMPResumeMsduTransmission(
+	IN	PRTMP_ADAPTER	pAd)
+{
+/*    UCHAR			IrqState;*/
+    
+	DBGPRINT(RT_DEBUG_TRACE,("SCAN done, resume MSDU transmission ...\n"));
+
+
+	/* After finish BSS_SCAN_IN_PROGRESS, we need to restore Current R66 value*/
+	/* R66 should not be 0*/
+	if (pAd->BbpTuning.R66CurrentValue == 0)
+	{
+		pAd->BbpTuning.R66CurrentValue = 0x38;
+		DBGPRINT_ERR(("RTMPResumeMsduTransmission, R66CurrentValue=0...\n"));
+	}
+
+	RTMP_CHIP_MSDU_TRANSMISSION_RESUME(pAd);
+
+
+	RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS);
+/* sample, for IRQ LOCK to SEM LOCK*/
+/*    IrqState = pAd->irq_disabled;*/
+/*	if (IrqState)*/
+/*		RTMPDeQueuePacket(pAd, TRUE, NUM_OF_TX_RING, MAX_TX_PROCESS);*/
+/*    else*/
+	RTMPDeQueuePacket(pAd, FALSE, NUM_OF_TX_RING, MAX_TX_PROCESS);
+}
+
+
+#ifdef DOT11_N_SUPPORT
+UINT deaggregate_AMSDU_announce(
+	IN	PRTMP_ADAPTER	pAd,
+	PNDIS_PACKET		pPacket,
+	IN	PUCHAR			pData,
+	IN	ULONG			DataSize,
+	IN	UCHAR			OpMode)
+{
+	USHORT 			PayloadSize;
+	USHORT 			SubFrameSize;
+	PHEADER_802_3 	pAMSDUsubheader;
+	UINT			nMSDU;
+    UCHAR			Header802_3[14];
+
+	PUCHAR			pPayload, pDA, pSA, pRemovedLLCSNAP;
+	PNDIS_PACKET	pClonePacket;
+
+
+	nMSDU = 0;
+
+	while (DataSize > LENGTH_802_3)
+	{
+
+		nMSDU++;
+
+		/*hex_dump("subheader", pData, 64);*/
+		pAMSDUsubheader = (PHEADER_802_3)pData;
+		/*pData += LENGTH_802_3;*/
+		PayloadSize = pAMSDUsubheader->Octet[1] + (pAMSDUsubheader->Octet[0]<<8);
+		SubFrameSize = PayloadSize + LENGTH_802_3;
+
+
+		if ((DataSize < SubFrameSize) || (PayloadSize > 1518 ))
+		{
+			break;
+		}
+
+		/*DBGPRINT(RT_DEBUG_TRACE,("%d subframe: Size = %d\n",  nMSDU, PayloadSize));*/
+
+		pPayload = pData + LENGTH_802_3;
+		pDA = pData;
+		pSA = pData + MAC_ADDR_LEN;
+
+		/* convert to 802.3 header*/
+        CONVERT_TO_802_3(Header802_3, pDA, pSA, pPayload, PayloadSize, pRemovedLLCSNAP);
+
+#ifdef CONFIG_STA_SUPPORT
+		if ((Header802_3[12] == 0x88) && (Header802_3[13] == 0x8E)
+			)
+		{
+			/* avoid local heap overflow, use dyanamic allocation */
+			MLME_QUEUE_ELEM *Elem; /* = (MLME_QUEUE_ELEM *) kmalloc(sizeof(MLME_QUEUE_ELEM), MEM_ALLOC_FLAG);*/
+
+			os_alloc_mem(pAd, (UCHAR **)&Elem, sizeof(MLME_QUEUE_ELEM));
+			if (Elem != NULL)
+			{
+				memmove(Elem->Msg+(LENGTH_802_11 + LENGTH_802_1_H), pPayload, PayloadSize);
+				Elem->MsgLen = LENGTH_802_11 + LENGTH_802_1_H + PayloadSize;
+				/*WpaEAPOLKeyAction(pAd, Elem);*/
+				REPORT_MGMT_FRAME_TO_MLME(pAd, BSSID_WCID, Elem->Msg, Elem->MsgLen, 0, 0, 0, 0, OPMODE_STA);
+/*				kfree(Elem);*/
+				os_free_mem(NULL, Elem);
+			}
+		}
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+	        	if (pRemovedLLCSNAP)
+	        	{
+	    			pPayload -= LENGTH_802_3;
+	    			PayloadSize += LENGTH_802_3;
+	    			NdisMoveMemory(pPayload, &Header802_3[0], LENGTH_802_3);
+	        	}
+		}
+#endif /* CONFIG_STA_SUPPORT */
+
+		pClonePacket = ClonePacket(pAd, pPacket, pPayload, PayloadSize);
+		if (pClonePacket)
+		{
+#ifdef CONFIG_STA_SUPPORT
+			IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+				ANNOUNCE_OR_FORWARD_802_3_PACKET(pAd, pClonePacket, RTMP_GET_PACKET_IF(pPacket));
+#endif /* CONFIG_STA_SUPPORT */
+		}
+
+
+		/* A-MSDU has padding to multiple of 4 including subframe header.*/
+		/* align SubFrameSize up to multiple of 4*/
+		SubFrameSize = (SubFrameSize+3)&(~0x3);
+
+
+		if (SubFrameSize > 1528 || SubFrameSize < 32)
+		{
+			break;
+		}
+
+		if (DataSize > SubFrameSize)
+		{
+			pData += SubFrameSize;
+			DataSize -= SubFrameSize;
+		}
+		else
+		{
+			/* end of A-MSDU*/
+			DataSize = 0;
+		}
+	}
+	
+	/* finally release original rx packet*/
+	RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_SUCCESS);
+
+	return nMSDU;
+}
+
+
+UINT BA_Reorder_AMSDU_Annnounce(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PNDIS_PACKET	pPacket,
+	IN	UCHAR			OpMode)
+{
+	PUCHAR			pData;
+	USHORT			DataSize;
+	UINT			nMSDU = 0;
+
+	pData = (PUCHAR) GET_OS_PKT_DATAPTR(pPacket);
+	DataSize = (USHORT) GET_OS_PKT_LEN(pPacket);
+
+	nMSDU = deaggregate_AMSDU_announce(pAd, pPacket, pData, DataSize, OpMode);
+
+	return nMSDU;
+}
+
+VOID Indicate_AMSDU_Packet(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RX_BLK			*pRxBlk,
+	IN	UCHAR			FromWhichBSSID)
+{
+	UINT			nMSDU;
+
+	RTMP_UPDATE_OS_PACKET_INFO(pAd, pRxBlk, FromWhichBSSID);
+	RTMP_SET_PACKET_IF(pRxBlk->pRxPacket, FromWhichBSSID);
+	nMSDU = deaggregate_AMSDU_announce(pAd, pRxBlk->pRxPacket, pRxBlk->pData, pRxBlk->DataSize, pRxBlk->OpMode);
+}
+#endif /* DOT11_N_SUPPORT */
+
+/*
+	==========================================================================
+	Description:
+		Look up the MAC address in the MAC table. Return NULL if not found.
+	Return:
+		pEntry - pointer to the MAC entry; NULL is not found
+	==========================================================================
+*/
+MAC_TABLE_ENTRY *MacTableLookup(
+	IN PRTMP_ADAPTER pAd,
+	PUCHAR pAddr)
+{
+	ULONG HashIdx;
+	MAC_TABLE_ENTRY *pEntry = NULL;
+	
+	HashIdx = MAC_ADDR_HASH_INDEX(pAddr);
+	pEntry = pAd->MacTab.Hash[HashIdx];
+
+	while (pEntry && !IS_ENTRY_NONE(pEntry))
+	{
+		if (MAC_ADDR_EQUAL(pEntry->Addr, pAddr))
+		{
+			break;
+		}
+		else
+			pEntry = pEntry->pNext;
+	}
+
+	return pEntry;
+}
+
+MAC_TABLE_ENTRY *MacTableInsertEntry(
+	IN  PRTMP_ADAPTER   pAd,
+	IN  PUCHAR			pAddr,
+	IN	UCHAR			apidx,
+	IN	UCHAR			OpMode,
+	IN BOOLEAN	CleanAll)
+{
+	UCHAR HashIdx;
+	int i, FirstWcid;
+	MAC_TABLE_ENTRY *pEntry = NULL, *pCurrEntry;
+/*	USHORT	offset;*/
+/*	ULONG	addr;*/
+	BOOLEAN Cancelled;
+
+	/* if FULL, return*/
+	if (pAd->MacTab.Size >= MAX_LEN_OF_MAC_TABLE)
+		return NULL;
+
+	FirstWcid = 1;
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	if (pAd->StaCfg.BssType == BSS_INFRA)
+		FirstWcid = 2;
+#endif /* CONFIG_STA_SUPPORT */
+
+	/* allocate one MAC entry*/
+	NdisAcquireSpinLock(&pAd->MacTabLock);
+	for (i = FirstWcid; i< MAX_LEN_OF_MAC_TABLE; i++)   /* skip entry#0 so that "entry index == AID" for fast lookup*/
+	{
+		/* pick up the first available vacancy*/
+		if (IS_ENTRY_NONE(&pAd->MacTab.Content[i]))
+		{
+			pEntry = &pAd->MacTab.Content[i];
+
+			/* ENTRY PREEMPTION: initialize the entry */
+			RTMPCancelTimer(&pEntry->RetryTimer, &Cancelled);
+			RTMPCancelTimer(&pEntry->EnqueueStartForPSKTimer, &Cancelled);
+
+			NdisZeroMemory(pEntry, sizeof(MAC_TABLE_ENTRY));
+
+			if (CleanAll == TRUE)
+			{
+				pEntry->MaxSupportedRate = RATE_11;
+				pEntry->CurrTxRate = RATE_11;
+				NdisZeroMemory(pEntry, sizeof(MAC_TABLE_ENTRY));
+				pEntry->PairwiseKey.KeyLen = 0;
+				pEntry->PairwiseKey.CipherAlg = CIPHER_NONE;
+			}
+
+			do
+			{
+#ifdef CONFIG_STA_SUPPORT
+#ifdef QOS_DLS_SUPPORT
+			if (apidx >= MIN_NET_DEVICE_FOR_DLS)
+			{
+				SET_ENTRY_DLS(pEntry);
+				pEntry->isCached = FALSE;
+				break;
+			}
+			else
+#endif /* QOS_DLS_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+
+
+
+						SET_ENTRY_CLIENT(pEntry);
+
+		} while (FALSE);
+
+			pEntry->bIAmBadAtheros = FALSE;
+
+			RTMPInitTimer(pAd, &pEntry->EnqueueStartForPSKTimer, GET_TIMER_FUNCTION(EnqueueStartForPSKExec), pEntry, FALSE);
+
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+
+
+			pEntry->pAd = pAd;
+			pEntry->CMTimerRunning = FALSE;
+			pEntry->EnqueueEapolStartTimerRunning = EAPOL_START_DISABLE;
+			pEntry->RSNIE_Len = 0;
+			NdisZeroMemory(pEntry->R_Counter, sizeof(pEntry->R_Counter));
+			pEntry->ReTryCounter = PEER_MSG1_RETRY_TIMER_CTR;
+
+			if (IS_ENTRY_MESH(pEntry))
+				pEntry->apidx = (apidx - MIN_NET_DEVICE_FOR_MESH);
+			else if (IS_ENTRY_APCLI(pEntry))
+				pEntry->apidx = (apidx - MIN_NET_DEVICE_FOR_APCLI);
+			else if (IS_ENTRY_WDS(pEntry))
+				pEntry->apidx = (apidx - MIN_NET_DEVICE_FOR_WDS);
+#ifdef CONFIG_STA_SUPPORT
+#ifdef QOS_DLS_SUPPORT
+			else if (IS_ENTRY_DLS(pEntry))
+				pEntry->apidx = (apidx - MIN_NET_DEVICE_FOR_DLS);
+#endif /* QOS_DLS_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+			else
+				pEntry->apidx = apidx;
+
+
+			do
+			{
+
+
+#ifdef CONFIG_STA_SUPPORT
+				IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+				{
+					pEntry->AuthMode = pAd->StaCfg.AuthMode;
+					pEntry->WepStatus = pAd->StaCfg.WepStatus;
+					pEntry->PrivacyFilter = Ndis802_11PrivFilterAcceptAll;
+				}
+#endif /* CONFIG_STA_SUPPORT */
+			} while (FALSE);
+
+			pEntry->GTKState = REKEY_NEGOTIATING;
+			pEntry->PairwiseKey.KeyLen = 0;
+			pEntry->PairwiseKey.CipherAlg = CIPHER_NONE;
+#ifdef CONFIG_STA_SUPPORT
+#ifdef QOS_DLS_SUPPORT
+			if (IS_ENTRY_DLS(pEntry))
+				pEntry->PortSecured = WPA_802_1X_PORT_SECURED;
+			else
+#endif /* QOS_DLS_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+				pEntry->PortSecured = WPA_802_1X_PORT_NOT_SECURED;
+
+			pEntry->PMKID_CacheIdx = ENTRY_NOT_FOUND;
+			COPY_MAC_ADDR(pEntry->Addr, pAddr);
+			COPY_MAC_ADDR(pEntry->HdrAddr1, pAddr);
+
+			do
+			{
+#ifdef APCLI_SUPPORT
+				if (IS_ENTRY_APCLI(pEntry))
+				{
+					COPY_MAC_ADDR(pEntry->HdrAddr2, pAd->ApCfg.ApCliTab[pEntry->apidx].CurrentAddress);
+					COPY_MAC_ADDR(pEntry->HdrAddr3, pAddr);
+					break;
+				}
+#endif // APCLI_SUPPORT //
+#ifdef CONFIG_STA_SUPPORT
+				if (OpMode == OPMODE_STA)
+				{
+					COPY_MAC_ADDR(pEntry->HdrAddr2, pAd->CurrentAddress);
+					COPY_MAC_ADDR(pEntry->HdrAddr3, pAddr);
+					break;
+				}
+#endif // CONFIG_STA_SUPPORT //
+			} while (FALSE);
+
+			pEntry->Sst = SST_NOT_AUTH;
+			pEntry->AuthState = AS_NOT_AUTH;
+			pEntry->Aid = (USHORT)i;  /*0;*/
+			pEntry->CapabilityInfo = 0;
+			pEntry->PsMode = PWR_ACTIVE;
+			pEntry->PsQIdleCount = 0;
+			pEntry->NoDataIdleCount = 0;
+			pEntry->AssocDeadLine = MAC_TABLE_ASSOC_TIMEOUT;
+			pEntry->ContinueTxFailCnt = 0;
+			pEntry->TimeStamp_toTxRing = 0;
+			InitializeQueueHeader(&pEntry->PsQueue);
+
+
+
+			pAd->MacTab.Size ++;
+
+
+			/* Set the security mode of this entry as OPEN-NONE in ASIC */
+			RTMP_REMOVE_PAIRWISE_KEY_ENTRY(pAd, (UCHAR)i);
+
+			/* Add this entry into ASIC RX WCID search table */
+			RTMP_STA_ENTRY_ADD(pAd, pEntry);
+
+
+
+
+
+			DBGPRINT(RT_DEBUG_TRACE, ("MacTableInsertEntry - allocate entry #%d, Total= %d\n",i, pAd->MacTab.Size));
+			break;
+		}
+	}
+
+	/* add this MAC entry into HASH table*/
+	if (pEntry)
+	{
+		HashIdx = MAC_ADDR_HASH_INDEX(pAddr);
+		if (pAd->MacTab.Hash[HashIdx] == NULL)
+		{
+			pAd->MacTab.Hash[HashIdx] = pEntry;
+		}
+		else
+		{
+			pCurrEntry = pAd->MacTab.Hash[HashIdx];
+			while (pCurrEntry->pNext != NULL)
+				pCurrEntry = pCurrEntry->pNext;
+			pCurrEntry->pNext = pEntry;
+		}
+	}
+
+	NdisReleaseSpinLock(&pAd->MacTabLock);
+	return pEntry;
+}
+
+/*
+	==========================================================================
+	Description:
+		Delete a specified client from MAC table
+	==========================================================================
+ */
+BOOLEAN MacTableDeleteEntry(
+	IN PRTMP_ADAPTER pAd,
+	IN USHORT wcid,
+	IN PUCHAR pAddr)
+{
+	USHORT HashIdx;
+	MAC_TABLE_ENTRY *pEntry, *pPrevEntry, *pProbeEntry;
+	BOOLEAN Cancelled;
+	/*USHORT	offset;	 unused variable*/
+	/*UCHAR	j;			 unused variable*/
+
+	if (wcid >= MAX_LEN_OF_MAC_TABLE)
+		return FALSE;
+
+	NdisAcquireSpinLock(&pAd->MacTabLock);
+
+	HashIdx = MAC_ADDR_HASH_INDEX(pAddr);
+	/*pEntry = pAd->MacTab.Hash[HashIdx];*/
+	pEntry = &pAd->MacTab.Content[wcid];
+
+	if (pEntry && !IS_ENTRY_NONE(pEntry))
+	{
+		/* ENTRY PREEMPTION: Cancel all timers */
+		RTMPCancelTimer(&pEntry->RetryTimer, &Cancelled);
+		RTMPCancelTimer(&pEntry->EnqueueStartForPSKTimer, &Cancelled);
+
+		if (MAC_ADDR_EQUAL(pEntry->Addr, pAddr))
+		{
+
+			/* Delete this entry from ASIC on-chip WCID Table*/
+			RTMP_STA_ENTRY_MAC_RESET(pAd, wcid);
+
+#ifdef DOT11_N_SUPPORT
+			/* free resources of BA*/
+			BASessionTearDownALL(pAd, pEntry->Aid);
+#endif /* DOT11_N_SUPPORT */
+
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+
+           
+			pPrevEntry = NULL;
+			pProbeEntry = pAd->MacTab.Hash[HashIdx];
+			ASSERT(pProbeEntry);
+			if (pProbeEntry != NULL)
+			{
+				/* update Hash list*/
+				do
+				{
+					if (pProbeEntry == pEntry)
+					{
+						if (pPrevEntry == NULL)
+						{
+							pAd->MacTab.Hash[HashIdx] = pEntry->pNext;
+						}
+						else
+						{
+							pPrevEntry->pNext = pEntry->pNext;
+						}
+						break;
+					}
+
+					pPrevEntry = pProbeEntry;
+					pProbeEntry = pProbeEntry->pNext;
+				} while (pProbeEntry);
+			}
+
+			/* not found !!!*/
+			ASSERT(pProbeEntry != NULL);
+
+			/*RTMP_REMOVE_PAIRWISE_KEY_ENTRY(pAd, wcid);*/
+
+
+		if (pEntry->EnqueueEapolStartTimerRunning != EAPOL_START_DISABLE)
+		{
+            RTMPCancelTimer(&pEntry->EnqueueStartForPSKTimer, &Cancelled);
+			pEntry->EnqueueEapolStartTimerRunning = EAPOL_START_DISABLE;
+        }
+		RTMPReleaseTimer(&pEntry->EnqueueStartForPSKTimer, &Cancelled);
+
+
+
+//   			NdisZeroMemory(pEntry, sizeof(MAC_TABLE_ENTRY));
+			/* invalidate the entry */
+			SET_ENTRY_NONE(pEntry);
+			pAd->MacTab.Size --;
+			DBGPRINT(RT_DEBUG_TRACE, ("MacTableDeleteEntry1 - Total= %d\n", pAd->MacTab.Size));
+		}
+		else
+		{
+			DBGPRINT(RT_DEBUG_OFF, ("\n%s: Impossible Wcid = %d !!!!!\n", __FUNCTION__, wcid));
+		}
+	}
+
+	NdisReleaseSpinLock(&pAd->MacTabLock);
+
+	/*Reset operating mode when no Sta.*/
+	if (pAd->MacTab.Size == 0)
+	{
+#ifdef DOT11_N_SUPPORT
+		pAd->CommonCfg.AddHTInfo.AddHtInfo2.OperaionMode = 0;
+#endif /* DOT11_N_SUPPORT */
+		RTMP_UPDATE_PROTECT(pAd);  /* edit by johnli, fix "in_interrupt" error when call "MacTableDeleteEntry" in Rx tasklet*/
+	}
+
+	return TRUE;
+}
+
+
+/*
+	==========================================================================
+	Description:
+		This routine reset the entire MAC table. All packets pending in
+		the power-saving queues are freed here.
+	==========================================================================
+ */
+VOID MacTableReset(
+	IN  PRTMP_ADAPTER  pAd)
+{
+	int         i;
+	BOOLEAN     Cancelled;    
+
+	DBGPRINT(RT_DEBUG_TRACE, ("MacTableReset\n"));
+	/*NdisAcquireSpinLock(&pAd->MacTabLock);*/
+
+
+	for (i=1; i<MAX_LEN_OF_MAC_TABLE; i++)
+	{
+		if (IS_ENTRY_CLIENT(&pAd->MacTab.Content[i]))
+	   {
+	   		/* Delete a entry via WCID */
+
+			/*MacTableDeleteEntry(pAd, i, pAd->MacTab.Content[i].Addr);*/
+			RTMPReleaseTimer(&pAd->MacTab.Content[i].EnqueueStartForPSKTimer, &Cancelled);
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+            pAd->MacTab.Content[i].EnqueueEapolStartTimerRunning = EAPOL_START_DISABLE;
+
+
+			/* Delete a entry via WCID */
+			MacTableDeleteEntry(pAd, i, pAd->MacTab.Content[i].Addr);
+		}
+		else
+		{
+			/* Delete a entry via WCID */
+			MacTableDeleteEntry(pAd, i, pAd->MacTab.Content[i].Addr);
+		}
+	}
+
+	return;
+}
+
+/*
+	==========================================================================
+	Description:
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+*/
+VOID AssocParmFill(
+	IN PRTMP_ADAPTER pAd,
+	IN OUT MLME_ASSOC_REQ_STRUCT *AssocReq,
+	IN PUCHAR                     pAddr,
+	IN USHORT                     CapabilityInfo,
+	IN ULONG                      Timeout,
+	IN USHORT                     ListenIntv)
+{
+	COPY_MAC_ADDR(AssocReq->Addr, pAddr);
+	/* Add mask to support 802.11b mode only*/
+	AssocReq->CapabilityInfo = CapabilityInfo & SUPPORTED_CAPABILITY_INFO; /* not cf-pollable, not cf-poll-request*/
+	AssocReq->Timeout = Timeout;
+	AssocReq->ListenIntv = ListenIntv;
+}
+
+
+/*
+	==========================================================================
+	Description:
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+*/
+VOID DisassocParmFill(
+	IN PRTMP_ADAPTER pAd,
+	IN OUT MLME_DISASSOC_REQ_STRUCT *DisassocReq,
+	IN PUCHAR pAddr,
+	IN USHORT Reason)
+{
+	COPY_MAC_ADDR(DisassocReq->Addr, pAddr);
+	DisassocReq->Reason = Reason;
+}
+
+
+BOOLEAN RTMPCheckEtherType(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PNDIS_PACKET	pPacket,
+	IN	PMAC_TABLE_ENTRY pMacEntry,
+	IN	UCHAR			OpMode,
+	OUT PUCHAR pUserPriority,
+	OUT PUCHAR pQueIdx)
+{
+	USHORT	TypeLen;
+	UCHAR	Byte0, Byte1;
+	PUCHAR	pSrcBuf;
+	UINT32	pktLen;
+	UINT16 	srcPort, dstPort;
+	BOOLEAN bWmmReq;
+
+
+	/*
+		for bc/mc packets, if it has VLAN tag or DSCP field, we also need
+		to get UP for IGMP use.
+	*/
+	bWmmReq = (
+				OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_WMM_INUSED))
+				&& ((pMacEntry) &&
+					((VALID_WCID(pMacEntry->Aid) && CLIENT_STATUS_TEST_FLAG(pMacEntry, fCLIENT_STATUS_WMM_CAPABLE))
+						|| (pMacEntry->Aid == MCAST_WCID)));
+
+	pSrcBuf = GET_OS_PKT_DATAPTR(pPacket);
+	pktLen = GET_OS_PKT_LEN(pPacket);
+
+	ASSERT(pSrcBuf);
+
+	RTMP_SET_PACKET_SPECIFIC(pPacket, 0);
+	
+	/* get Ethernet protocol field*/
+	TypeLen = (pSrcBuf[12] << 8) | pSrcBuf[13];
+
+	pSrcBuf += LENGTH_802_3;	/* Skip the Ethernet Header.*/
+	
+	if (TypeLen <= 1500)
+	{	/* 802.3, 802.3 LLC*/
+		/*
+			DestMAC(6) + SrcMAC(6) + Lenght(2) +
+			DSAP(1) + SSAP(1) + Control(1) +
+			if the DSAP = 0xAA, SSAP=0xAA, Contorl = 0x03, it has a 5-bytes SNAP header.
+				=> + SNAP (5, OriginationID(3) + etherType(2))
+		*/
+		if (pSrcBuf[0] == 0xAA && pSrcBuf[1] == 0xAA && pSrcBuf[2] == 0x03)
+		{
+			Sniff2BytesFromNdisBuffer((PNDIS_BUFFER)pSrcBuf, 6, &Byte0, &Byte1);
+			RTMP_SET_PACKET_LLCSNAP(pPacket, 1);
+			TypeLen = (USHORT)((Byte0 << 8) + Byte1);
+			pSrcBuf += 8; /* Skip this LLC/SNAP header*/
+		}
+		else
+		{
+			/*It just has 3-byte LLC header, maybe a legacy ether type frame. we didn't handle it.*/
+		}
+	}
+	
+	/* If it's a VLAN packet, get the real Type/Length field.*/
+	if (TypeLen == 0x8100)
+	{
+
+		RTMP_SET_PACKET_VLAN(pPacket, 1);
+		Sniff2BytesFromNdisBuffer((PNDIS_BUFFER)pSrcBuf, 2, &Byte0, &Byte1);
+		TypeLen = (USHORT)((Byte0 << 8) + Byte1);
+
+		/* only use VLAN tag */
+		if (bWmmReq)
+		{
+			*pUserPriority = (*pSrcBuf & 0xe0) >> 5;
+			*pQueIdx = MapUserPriorityToAccessCategory[*pUserPriority];
+		}
+
+		pSrcBuf += 4; /* Skip the VLAN Header.*/
+	}
+	else if (TypeLen == 0x0800)
+	{
+		if (bWmmReq)
+		{
+			if ((*pSrcBuf & 0xf0) == 0x40) /* IPv4 */
+			{
+				/*
+					Version - 4-bit Internet Protocol version number.
+					Length - 4-bit IP header length.
+					Traffic Class - 8-bit TOS field.
+				*/
+				*pUserPriority = (*(pSrcBuf + 1) & 0xe0) >> 5;
+			}
+
+			*pQueIdx = MapUserPriorityToAccessCategory[*pUserPriority];
+		}
+	}
+	else if (TypeLen == 0x86dd)
+	{
+		if (bWmmReq)
+		{
+			if ((*pSrcBuf & 0xf0) == 0x60) /* IPv6 */
+			{
+				/*
+					Version - 4-bit Internet Protocol version number.
+					Traffic Class - 8-bit traffic class field.
+				*/
+				*pUserPriority = ((*pSrcBuf) & 0x0e) >> 1;
+			}
+
+			*pQueIdx = MapUserPriorityToAccessCategory[*pUserPriority];
+		}
+	}
+
+	switch (TypeLen)
+	{
+		case 0x0800:
+			{
+				/* return AC_BE if packet is not IPv4*/
+				if (bWmmReq && (*pSrcBuf & 0xf0) != 0x40)
+				{
+					*pUserPriority = 0;
+					*pQueIdx = QID_AC_BE;
+				}
+				else
+					RTMP_SET_PACKET_IPV4(pPacket, 1);
+
+				ASSERT((pktLen > 34));
+				if (*(pSrcBuf + 9) == 0x11)
+				{	/* udp packet*/
+					ASSERT((pktLen > 34));	/* 14 for ethernet header, 20 for IP header*/
+					
+					pSrcBuf += 20;	/* Skip the IP header*/
+					srcPort = OS_NTOHS(get_unaligned((PUINT16)(pSrcBuf)));
+					dstPort = OS_NTOHS(get_unaligned((PUINT16)(pSrcBuf+2)));
+		
+					if ((srcPort==0x44 && dstPort==0x43) || (srcPort==0x43 && dstPort==0x44))
+					{	/*It's a BOOTP/DHCP packet*/
+						RTMP_SET_PACKET_DHCP(pPacket, 1);
+					}
+				}
+			}
+			break;
+		case 0x86dd:
+			{
+				/* return AC_BE if packet is not IPv6 */
+				if (bWmmReq &&
+					((*pSrcBuf & 0xf0) != 0x60))
+				{
+					*pUserPriority = 0;
+					*pQueIdx = QID_AC_BE;
+				}
+			}
+			break;
+		case 0x0806:
+			{
+				/*ARP Packet.*/
+				RTMP_SET_PACKET_DHCP(pPacket, 1);
+			}
+			break;
+		case 0x888e:
+			{
+				/* EAPOL Packet.*/
+				RTMP_SET_PACKET_EAPOL(pPacket, 1);
+			}
+			break;
+		default:
+			break;
+	}
+
+#ifdef VENDOR_FEATURE1_SUPPORT
+	RTMP_SET_PACKET_PROTOCOL(pPacket, TypeLen);
+#endif /* VENDOR_FEATURE1_SUPPORT */
+
+	/* have to check ACM bit. downgrade UP & QueIdx before passing ACM*/
+	/* NOTE: AP doesn't have to negotiate TSPEC. ACM is controlled purely via user setup, not protocol handshaking*/
+	/*
+		Under WMM ACM control, we dont need to check the bit;
+		Or when a TSPEC is built for VO but we will change priority to
+		BE here and when we issue a BA session, the BA session will
+		be BE session, not VO session.
+	*/
+	if (pAd->CommonCfg.APEdcaParm.bACM[*pQueIdx])
+	{
+		*pUserPriority = 0;
+		*pQueIdx		 = QID_AC_BE;
+	}
+
+
+	return TRUE;
+	
+}
+
+
+VOID Update_Rssi_Sample(
+	IN PRTMP_ADAPTER pAd,
+	IN RSSI_SAMPLE  *pRssi,
+	IN PRXWI_STRUC  pRxWI)
+{
+	CHAR rssi0 = pRxWI->RSSI0;
+	CHAR rssi1 = pRxWI->RSSI1;
+	CHAR rssi2 = pRxWI->RSSI2;
+	UCHAR snr0 = pRxWI->SNR0;
+	UCHAR snr1 = pRxWI->SNR1;
+	CHAR Phymode = pRxWI->PHYMODE;
+	BOOLEAN bInitial = FALSE;
+ 
+	if (!(pRssi->AvgRssi0 | pRssi->AvgRssi0X8 | pRssi->LastRssi0))
+	{
+		bInitial = TRUE;
+	}
+ 
+	if (rssi0 != 0)
+	{
+ 
+		pRssi->LastRssi0 = ConvertToRssi(pAd, (CHAR)rssi0, RSSI_0);
+ 
+		if (bInitial)
+		{
+			pRssi->AvgRssi0X8 = pRssi->LastRssi0 << 3;
+			pRssi->AvgRssi0  = pRssi->LastRssi0;
+		}
+		else
+		{
+			pRssi->AvgRssi0X8 = (pRssi->AvgRssi0X8 - pRssi->AvgRssi0) + pRssi->LastRssi0;
+		}
+ 
+		pRssi->AvgRssi0 = pRssi->AvgRssi0X8 >> 3;
+	}
+
+	if (snr0 != 0 && Phymode != MODE_CCK)
+	{			
+		pRssi->LastSnr0 = ConvertToSnr(pAd, (UCHAR)snr0); 			
+					
+		if (bInitial)
+		{
+			pRssi->AvgSnr0X8 = pRssi->LastSnr0 << 3;
+			pRssi->AvgSnr0  = pRssi->LastSnr0;
+		}
+		else
+		{
+			pRssi->AvgSnr0X8 = (pRssi->AvgSnr0X8 - pRssi->AvgSnr0) + pRssi->LastSnr0;
+		}			
+
+		pRssi->AvgSnr0 = pRssi->AvgSnr0X8 >> 3;
+		/*pRssi->LastNoiseLevel0 = pRssi->AvgRssi0 - pRssi->AvgSnr0;*/
+	}
+ 
+	if (rssi1 != 0)
+	{   
+		pRssi->LastRssi1 = ConvertToRssi(pAd, (CHAR)rssi1, RSSI_1);
+
+		if (bInitial)
+		{
+			pRssi->AvgRssi1X8 = pRssi->LastRssi1 << 3;
+			pRssi->AvgRssi1  = pRssi->LastRssi1;
+		}
+		else
+		{
+			pRssi->AvgRssi1X8 = (pRssi->AvgRssi1X8 - pRssi->AvgRssi1) + pRssi->LastRssi1;
+		}
+
+		pRssi->AvgRssi1 = pRssi->AvgRssi1X8 >> 3;
+	}
+
+	if (snr1 != 0 && Phymode != MODE_CCK)
+	{			
+		pRssi->LastSnr1 = ConvertToSnr(pAd, (UCHAR)snr1);
+					
+		if (bInitial)
+		{
+			pRssi->AvgSnr1X8 = pRssi->LastSnr1 << 3;
+			pRssi->AvgSnr1  = pRssi->LastSnr1;
+		}
+		else
+		{
+			pRssi->AvgSnr1X8 = (pRssi->AvgSnr1X8 - pRssi->AvgSnr1) + pRssi->LastSnr1;
+		}			
+
+		pRssi->AvgSnr1 = pRssi->AvgSnr1X8 >> 3;
+		/*pRssi->LastNoiseLevel1 = pRssi->AvgRssi1 - pRssi->AvgSnr1;*/
+	}
+
+	if (rssi2 != 0)
+	{
+		pRssi->LastRssi2 = ConvertToRssi(pAd, (CHAR)rssi2, RSSI_2);
+
+		if (bInitial)
+		{
+			pRssi->AvgRssi2X8 = pRssi->LastRssi2 << 3;
+			pRssi->AvgRssi2  = pRssi->LastRssi2;
+		}
+		else
+		{
+			pRssi->AvgRssi2X8 = (pRssi->AvgRssi2X8 - pRssi->AvgRssi2) + pRssi->LastRssi2;
+		}
+
+		pRssi->AvgRssi2 = pRssi->AvgRssi2X8 >> 3;
+	}
+}
+
+
+
+/* Normal legacy Rx packet indication*/
+VOID Indicate_Legacy_Packet(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RX_BLK			*pRxBlk,
+	IN	UCHAR			FromWhichBSSID)
+{
+	PNDIS_PACKET	pRxPacket = pRxBlk->pRxPacket;
+	UCHAR			Header802_3[LENGTH_802_3];
+	USHORT			VLAN_VID = 0, VLAN_Priority = 0;
+
+	/* 1. get 802.3 Header*/
+	/* 2. remove LLC*/
+	/* 		a. pointer pRxBlk->pData to payload*/
+	/*      b. modify pRxBlk->DataSize*/
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		RTMP_802_11_REMOVE_LLC_AND_CONVERT_TO_802_3(pRxBlk, Header802_3);
+#endif /* CONFIG_STA_SUPPORT */
+
+	if (pRxBlk->DataSize > MAX_RX_PKT_LEN)
+	{
+
+		/* release packet*/
+		RELEASE_NDIS_PACKET(pAd, pRxPacket, NDIS_STATUS_FAILURE);
+		return;
+	}
+
+
+	STATS_INC_RX_PACKETS(pAd, FromWhichBSSID);
+
+#ifdef RTMP_MAC_USB
+#ifdef DOT11_N_SUPPORT
+	if (pAd->CommonCfg.bDisableReordering == 0)
+	{
+		PBA_REC_ENTRY		pBAEntry;
+		ULONG				Now32;
+		UCHAR				Wcid = pRxBlk->pRxWI->WirelessCliID;
+		UCHAR				TID = pRxBlk->pRxWI->TID;
+		USHORT				Idx;
+		
+#define REORDERING_PACKET_TIMEOUT		((100 * OS_HZ)/1000)	/* system ticks -- 100 ms*/
+
+		if (Wcid < MAX_LEN_OF_MAC_TABLE)
+		{
+			Idx = pAd->MacTab.Content[Wcid].BARecWcidArray[TID];
+			if (Idx != 0)
+			{
+				pBAEntry = &pAd->BATable.BARecEntry[Idx];
+				/* update last rx time*/
+				NdisGetSystemUpTime(&Now32);
+				if ((pBAEntry->list.qlen > 0) &&
+					 RTMP_TIME_AFTER((unsigned long)Now32, (unsigned long)(pBAEntry->LastIndSeqAtTimer+(REORDERING_PACKET_TIMEOUT)))
+	   				)
+				{
+					DBGPRINT(RT_DEBUG_OFF, ("Indicate_Legacy_Packet():flush reordering_timeout_mpdus! RxWI->Flags=%d, pRxWI.TID=%d, RxD->AMPDU=%d!\n", 
+												pRxBlk->Flags, pRxBlk->pRxWI->TID, pRxBlk->RxD.AMPDU));
+					hex_dump("Dump the legacy Packet:", GET_OS_PKT_DATAPTR(pRxBlk->pRxPacket), 64);
+					ba_flush_reordering_timeout_mpdus(pAd, pBAEntry, Now32);
+				}
+			}
+		}
+	}
+#endif /* DOT11_N_SUPPORT */
+#endif /* RTMP_MAC_USB */
+
+
+	RT_80211_TO_8023_PACKET(pAd, VLAN_VID, VLAN_Priority,
+							pRxBlk, Header802_3, FromWhichBSSID, TPID);
+	
+	/* pass this 802.3 packet to upper layer or forward this packet to WM directly*/
+	
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		ANNOUNCE_OR_FORWARD_802_3_PACKET(pAd, pRxPacket, FromWhichBSSID);
+#endif /* CONFIG_STA_SUPPORT */
+
+}
+
+
+/* Normal, AMPDU or AMSDU*/
+VOID CmmRxnonRalinkFrameIndicate(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RX_BLK			*pRxBlk,
+	IN	UCHAR			FromWhichBSSID)
+{
+#ifdef DOT11_N_SUPPORT
+	if (RX_BLK_TEST_FLAG(pRxBlk, fRX_AMPDU) && (pAd->CommonCfg.bDisableReordering == 0))
+	{
+		Indicate_AMPDU_Packet(pAd, pRxBlk, FromWhichBSSID);
+	}
+	else
+#endif /* DOT11_N_SUPPORT */
+	{
+#ifdef DOT11_N_SUPPORT
+		if (RX_BLK_TEST_FLAG(pRxBlk, fRX_AMSDU))
+		{
+			/* handle A-MSDU*/
+			Indicate_AMSDU_Packet(pAd, pRxBlk, FromWhichBSSID);
+		}
+		else
+#endif /* DOT11_N_SUPPORT */
+		{
+			Indicate_Legacy_Packet(pAd, pRxBlk, FromWhichBSSID);
+		}
+	}
+}
+
+
+VOID CmmRxRalinkFrameIndicate(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	MAC_TABLE_ENTRY	*pEntry,
+	IN	RX_BLK			*pRxBlk,
+	IN	UCHAR			FromWhichBSSID)
+{
+	UCHAR			Header802_3[LENGTH_802_3];
+	UINT16			Msdu2Size;
+	UINT16 			Payload1Size, Payload2Size;
+	PUCHAR 			pData2;
+	PNDIS_PACKET	pPacket2 = NULL;
+	USHORT			VLAN_VID = 0, VLAN_Priority = 0;
+
+
+	Msdu2Size = *(pRxBlk->pData) + (*(pRxBlk->pData+1) << 8);
+
+	if ((Msdu2Size <= 1536) && (Msdu2Size < pRxBlk->DataSize))
+	{
+		/* skip two byte MSDU2 len */
+		pRxBlk->pData += 2;
+		pRxBlk->DataSize -= 2;
+	}
+	else
+	{
+		/* release packet*/
+		RELEASE_NDIS_PACKET(pAd, pRxBlk->pRxPacket, NDIS_STATUS_FAILURE);
+		return;
+	}
+
+	/* get 802.3 Header and  remove LLC*/
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		RTMP_802_11_REMOVE_LLC_AND_CONVERT_TO_802_3(pRxBlk, Header802_3);
+#endif /* CONFIG_STA_SUPPORT */
+
+
+	ASSERT(pRxBlk->pRxPacket);
+
+	/* Ralink Aggregation frame*/
+	pAd->RalinkCounters.OneSecRxAggregationCount ++;
+	Payload1Size = pRxBlk->DataSize - Msdu2Size;
+	Payload2Size = Msdu2Size - LENGTH_802_3;
+
+	pData2 = pRxBlk->pData + Payload1Size + LENGTH_802_3;
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		pPacket2 = duplicate_pkt(get_netdev_from_bssid(pAd, FromWhichBSSID),
+								(pData2-LENGTH_802_3), LENGTH_802_3, pData2,
+								Payload2Size, FromWhichBSSID);
+#endif /* CONFIG_STA_SUPPORT */
+
+	if (!pPacket2)
+	{
+		/* release packet*/
+		RELEASE_NDIS_PACKET(pAd, pRxBlk->pRxPacket, NDIS_STATUS_FAILURE);
+		return;
+	}
+
+	/* update payload size of 1st packet*/
+	pRxBlk->DataSize = Payload1Size;
+	RT_80211_TO_8023_PACKET(pAd, VLAN_VID, VLAN_Priority,
+							pRxBlk, Header802_3, FromWhichBSSID, TPID);
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		ANNOUNCE_OR_FORWARD_802_3_PACKET(pAd, pRxBlk->pRxPacket, FromWhichBSSID);
+#endif /* CONFIG_STA_SUPPORT */
+
+	if (pPacket2)
+	{
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+			ANNOUNCE_OR_FORWARD_802_3_PACKET(pAd, pPacket2, FromWhichBSSID);
+#endif /* CONFIG_STA_SUPPORT */
+	}
+}
+
+
+#define RESET_FRAGFRAME(_fragFrame) \
+	{								\
+		_fragFrame.RxSize = 0;		\
+		_fragFrame.Sequence = 0;	\
+		_fragFrame.LastFrag = 0;	\
+		_fragFrame.Flags = 0;		\
+	}
+
+
+PNDIS_PACKET RTMPDeFragmentDataFrame(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RX_BLK			*pRxBlk)
+{
+	PHEADER_802_11	pHeader = pRxBlk->pHeader;
+	PNDIS_PACKET	pRxPacket = pRxBlk->pRxPacket;
+	UCHAR			*pData = pRxBlk->pData;
+	USHORT			DataSize = pRxBlk->DataSize;
+	PNDIS_PACKET	pRetPacket = NULL;
+	UCHAR			*pFragBuffer = NULL;
+	BOOLEAN 		bReassDone = FALSE;
+	UCHAR			HeaderRoom = 0;
+
+
+	ASSERT(pHeader);
+
+	HeaderRoom = pData - (UCHAR *)pHeader;
+
+	/* Re-assemble the fragmented packets*/
+	if (pHeader->Frag == 0)		/* Frag. Number is 0 : First frag or only one pkt*/
+	{
+		/* the first pkt of fragment, record it.*/
+		if (pHeader->FC.MoreFrag)
+		{
+			ASSERT(pAd->FragFrame.pFragPacket);
+			pFragBuffer = GET_OS_PKT_DATAPTR(pAd->FragFrame.pFragPacket);
+			pAd->FragFrame.RxSize   = DataSize + HeaderRoom;
+			NdisMoveMemory(pFragBuffer,	 pHeader, pAd->FragFrame.RxSize);
+			pAd->FragFrame.Sequence = pHeader->Sequence;
+			pAd->FragFrame.LastFrag = pHeader->Frag;	   /* Should be 0*/
+			ASSERT(pAd->FragFrame.LastFrag == 0);
+			goto done;	/* end of processing this frame*/
+		}
+	}
+	else	/*Middle & End of fragment*/
+	{
+		if ((pHeader->Sequence != pAd->FragFrame.Sequence) ||
+			(pHeader->Frag != (pAd->FragFrame.LastFrag + 1)))
+		{
+			/* Fragment is not the same sequence or out of fragment number order*/
+			/* Reset Fragment control blk*/
+			RESET_FRAGFRAME(pAd->FragFrame);
+			DBGPRINT(RT_DEBUG_ERROR, ("Fragment is not the same sequence or out of fragment number order.\n"));
+			goto done; /* give up this frame*/
+		}
+		else if ((pAd->FragFrame.RxSize + DataSize) > MAX_FRAME_SIZE)
+		{
+			/* Fragment frame is too large, it exeeds the maximum frame size.*/
+			/* Reset Fragment control blk*/
+			RESET_FRAGFRAME(pAd->FragFrame);
+			DBGPRINT(RT_DEBUG_ERROR, ("Fragment frame is too large, it exeeds the maximum frame size.\n"));
+			goto done; /* give up this frame*/
+		}
+
+        
+		/* Broadcom AP(BCM94704AGR) will send out LLC in fragment's packet, LLC only can accpet at first fragment.*/
+		/* In this case, we will dropt it.*/
+		
+		if (NdisEqualMemory(pData, SNAP_802_1H, sizeof(SNAP_802_1H)))
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("Find another LLC at Middle or End fragment(SN=%d, Frag=%d)\n", pHeader->Sequence, pHeader->Frag));
+			goto done; /* give up this frame*/
+		}
+
+		pFragBuffer = GET_OS_PKT_DATAPTR(pAd->FragFrame.pFragPacket);
+
+		/* concatenate this fragment into the re-assembly buffer*/
+		NdisMoveMemory((pFragBuffer + pAd->FragFrame.RxSize), pData, DataSize);
+		pAd->FragFrame.RxSize  += DataSize;
+		pAd->FragFrame.LastFrag = pHeader->Frag;	   /* Update fragment number*/
+
+		/* Last fragment*/
+		if (pHeader->FC.MoreFrag == FALSE)
+		{
+			bReassDone = TRUE;
+		}
+	}
+
+done:
+	/* always release rx fragmented packet*/
+	RELEASE_NDIS_PACKET(pAd, pRxPacket, NDIS_STATUS_FAILURE);
+
+	/* return defragmented packet if packet is reassembled completely*/
+	/* otherwise return NULL*/
+	if (bReassDone)
+	{
+		PNDIS_PACKET pNewFragPacket;
+
+		/* allocate a new packet buffer for fragment*/
+		pNewFragPacket = RTMP_AllocateFragPacketBuffer(pAd, RX_BUFFER_NORMSIZE);
+		if (pNewFragPacket)
+		{
+			/* update RxBlk*/
+			pRetPacket = pAd->FragFrame.pFragPacket;
+			pAd->FragFrame.pFragPacket = pNewFragPacket;
+			pRxBlk->pHeader = (PHEADER_802_11) GET_OS_PKT_DATAPTR(pRetPacket);
+			pRxBlk->pData = (UCHAR *)pRxBlk->pHeader + HeaderRoom;
+			pRxBlk->DataSize = pAd->FragFrame.RxSize - HeaderRoom;
+			pRxBlk->pRxPacket = pRetPacket;
+		}
+		else
+		{
+			RESET_FRAGFRAME(pAd->FragFrame);
+		}
+	}
+
+	return pRetPacket;
+}
+
+VOID Indicate_EAPOL_Packet(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RX_BLK			*pRxBlk,
+	IN	UCHAR			FromWhichBSSID)
+{
+	MAC_TABLE_ENTRY *pEntry = NULL;
+
+	
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		{
+		pEntry = &pAd->MacTab.Content[BSSID_WCID];
+		STARxEAPOLFrameIndicate(pAd, pEntry, pRxBlk, FromWhichBSSID);
+		return;
+	}
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	if (pEntry == NULL)
+	{
+		DBGPRINT(RT_DEBUG_WARN, ("Indicate_EAPOL_Packet: drop and release the invalid packet.\n"));
+		/* release packet*/
+		RELEASE_NDIS_PACKET(pAd, pRxBlk->pRxPacket, NDIS_STATUS_FAILURE);
+		return;
+	}
+}
+
+#define BCN_TBTT_OFFSET		64	/*defer 64 us*/
+VOID ReSyncBeaconTime(
+	IN  PRTMP_ADAPTER   pAd)
+{
+
+	UINT32  Offset;
+
+
+	Offset = (pAd->TbttTickCount) % (BCN_TBTT_OFFSET);
+
+	pAd->TbttTickCount++;
+
+	
+	/* The updated BeaconInterval Value will affect Beacon Interval after two TBTT*/
+	/* beacasue the original BeaconInterval had been loaded into next TBTT_TIMER*/
+	
+	if (Offset == (BCN_TBTT_OFFSET-2))
+	{
+		BCN_TIME_CFG_STRUC csr;
+		RTMP_IO_READ32(pAd, BCN_TIME_CFG, &csr.word);
+		csr.field.BeaconInterval = (pAd->CommonCfg.BeaconPeriod << 4) - 1 ;	/* ASIC register in units of 1/16 TU = 64us*/
+		RTMP_IO_WRITE32(pAd, BCN_TIME_CFG, csr.word);
+	}
+	else
+	{
+		if (Offset == (BCN_TBTT_OFFSET-1))
+		{
+			BCN_TIME_CFG_STRUC csr;
+
+			RTMP_IO_READ32(pAd, BCN_TIME_CFG, &csr.word);
+			csr.field.BeaconInterval = (pAd->CommonCfg.BeaconPeriod) << 4; /* ASIC register in units of 1/16 TU*/
+			RTMP_IO_WRITE32(pAd, BCN_TIME_CFG, csr.word);
+		}
+	}
+}
+
+#ifdef SOFT_ENCRYPT
+BOOLEAN RTMPExpandPacketForSwEncrypt(
+	IN  PRTMP_ADAPTER   pAd,
+	IN	PTX_BLK			pTxBlk)
+{
+	PACKET_INFO		PacketInfo;
+	UINT32	ex_head = 0, ex_tail = 0;
+	UCHAR 	NumberOfFrag = RTMP_GET_PACKET_FRAGMENTS(pTxBlk->pPacket);
+
+	if (pTxBlk->CipherAlg == CIPHER_AES)
+		ex_tail = LEN_CCMP_MIC;
+
+	ex_tail = (NumberOfFrag * ex_tail);
+
+	pTxBlk->pPacket = ExpandPacket(pAd, pTxBlk->pPacket, ex_head, ex_tail);
+	if (pTxBlk->pPacket == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: out of resource.\n", __FUNCTION__));
+		return FALSE;
+	}
+	RTMP_QueryPacketInfo(pTxBlk->pPacket, &PacketInfo, &pTxBlk->pSrcBufHeader, &pTxBlk->SrcBufLen);									
+
+	return TRUE;
+}
+
+VOID RTMPUpdateSwCacheCipherInfo(	
+	IN  PRTMP_ADAPTER   pAd,
+	IN	PTX_BLK			pTxBlk,
+	IN	PUCHAR			pHdr)
+{
+	PHEADER_802_11 		pHeader_802_11;
+	PMAC_TABLE_ENTRY	pMacEntry;
+
+	pHeader_802_11 = (HEADER_802_11 *) pHdr;
+	pMacEntry = pTxBlk->pMacEntry;
+
+	if (pMacEntry && pHeader_802_11->FC.Wep && 
+		CLIENT_STATUS_TEST_FLAG(pMacEntry, fCLIENT_STATUS_SOFTWARE_ENCRYPT))	
+	{
+		PCIPHER_KEY pKey = &pMacEntry->PairwiseKey;
+	
+		TX_BLK_SET_FLAG(pTxBlk, fTX_bSwEncrypt);
+
+		pTxBlk->CipherAlg = pKey->CipherAlg;
+		pTxBlk->pKey = pKey;
+		if ((pKey->CipherAlg == CIPHER_WEP64) || (pKey->CipherAlg == CIPHER_WEP128))
+			inc_iv_byte(pKey->TxTsc, LEN_WEP_TSC, 1);
+		else if ((pKey->CipherAlg == CIPHER_TKIP) || (pKey->CipherAlg == CIPHER_AES))
+			inc_iv_byte(pKey->TxTsc, LEN_WPA_TSC, 1);
+		
+	}
+
+}
+
+#endif /* SOFT_ENCRYPT */
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_data_usb.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_data_usb.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_data_usb.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_data_usb.c	2017-09-23 03:42:49.714675993 +0800
@@ -0,0 +1,1122 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifdef RTMP_MAC_USB
+
+
+#include	"rt_config.h"
+
+
+/*
+	We can do copy the frame into pTxContext when match following conditions.
+		=>
+		=>
+		=>
+*/
+static inline NDIS_STATUS RtmpUSBCanDoWrite(
+	IN RTMP_ADAPTER		*pAd,
+	IN UCHAR			QueIdx,
+	IN HT_TX_CONTEXT 	*pHTTXContext)
+{
+	NDIS_STATUS	canWrite = NDIS_STATUS_RESOURCES;
+
+#ifdef USB_BULK_BUF_ALIGMENT
+	if( ((pHTTXContext->CurWriteIdx< pHTTXContext->NextBulkIdx  ) &&   (pHTTXContext->NextBulkIdx - pHTTXContext->CurWriteIdx == 1)) 
+		|| ((pHTTXContext->CurWriteIdx ==(BUF_ALIGMENT_RINGSIZE -1) ) &&  (pHTTXContext->NextBulkIdx == 0 )))
+	{
+		DBGPRINT(RT_DEBUG_ERROR,("RtmpUSBCanDoWrite USB_BULK_BUF_ALIGMENT c1!\n"));
+		RTUSB_SET_BULK_FLAG(pAd, (fRTUSB_BULK_OUT_DATA_NORMAL << QueIdx));		
+	}
+	else if (pHTTXContext->bCurWriting == TRUE)
+	{
+		DBGPRINT(RT_DEBUG_ERROR,("RtmpUSBCanDoWrite USB_BULK_BUF_ALIGMENT c3!!\n"));
+
+	}
+#else
+
+	if (((pHTTXContext->CurWritePosition) < pHTTXContext->NextBulkOutPosition) && (pHTTXContext->CurWritePosition + LOCAL_TXBUF_SIZE) > pHTTXContext->NextBulkOutPosition)
+	{
+		DBGPRINT(RT_DEBUG_ERROR,("RtmpUSBCanDoWrite c1!\n"));
+		RTUSB_SET_BULK_FLAG(pAd, (fRTUSB_BULK_OUT_DATA_NORMAL << QueIdx));
+	}
+	else if ((pHTTXContext->CurWritePosition == 8) && (pHTTXContext->NextBulkOutPosition < LOCAL_TXBUF_SIZE))
+	{
+		DBGPRINT(RT_DEBUG_ERROR,("RtmpUSBCanDoWrite c2!\n"));
+		RTUSB_SET_BULK_FLAG(pAd, (fRTUSB_BULK_OUT_DATA_NORMAL << QueIdx));
+	}
+	else if (pHTTXContext->bCurWriting == TRUE)
+	{
+		DBGPRINT(RT_DEBUG_ERROR,("RtmpUSBCanDoWrite c3!\n"));
+	}
+#endif /* USB_BULK_BUF_ALIGMENT */
+	else
+	{
+		canWrite = NDIS_STATUS_SUCCESS;
+	}
+	
+
+	return canWrite;
+}
+
+
+USHORT RtmpUSB_WriteSubTxResource(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	TX_BLK			*pTxBlk,
+	IN	BOOLEAN			bIsLast,
+	OUT	USHORT			*FreeNumber)
+{
+
+	/* Dummy function. Should be removed in the future.*/
+	return 0;
+	
+}
+
+USHORT	RtmpUSB_WriteFragTxResource(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	TX_BLK			*pTxBlk,
+	IN	UCHAR			fragNum,
+	OUT	USHORT			*FreeNumber)
+{
+	HT_TX_CONTEXT	*pHTTXContext;
+	USHORT			hwHdrLen;	/* The hwHdrLen consist of 802.11 header length plus the header padding length.*/
+	UINT32			fillOffset;
+	TXINFO_STRUC	*pTxInfo;
+	TXWI_STRUC		*pTxWI;
+	PUCHAR			pWirelessPacket = NULL;
+	UCHAR			QueIdx;
+	NDIS_STATUS		Status;
+	unsigned long	IrqFlags;
+	UINT32			USBDMApktLen = 0, DMAHdrLen, padding;
+#ifdef USB_BULK_BUF_ALIGMENT	
+	BOOLEAN			bLasAlignmentsectiontRound = FALSE;
+#else
+	BOOLEAN			TxQLastRound = FALSE;
+#endif /* USB_BULK_BUF_ALIGMENT */
+	
+	
+	/* get Tx Ring Resource & Dma Buffer address*/
+	
+	QueIdx = pTxBlk->QueIdx;
+	pHTTXContext  = &pAd->TxContext[QueIdx];
+
+	RTMP_IRQ_LOCK(&pAd->TxContextQueueLock[QueIdx], IrqFlags);
+	
+	pHTTXContext  = &pAd->TxContext[QueIdx];
+	fillOffset = pHTTXContext->CurWritePosition;
+
+	if(fragNum == 0)
+	{
+		/* Check if we have enough space for this bulk-out batch.*/
+		Status = RtmpUSBCanDoWrite(pAd, QueIdx, pHTTXContext);
+		if (Status == NDIS_STATUS_SUCCESS)
+		{
+			pHTTXContext->bCurWriting = TRUE;
+
+#ifndef USB_BULK_BUF_ALIGMENT			
+			/* Reserve space for 8 bytes padding.*/
+			if ((pHTTXContext->ENextBulkOutPosition == pHTTXContext->CurWritePosition))
+			{
+				pHTTXContext->ENextBulkOutPosition += 8;
+				pHTTXContext->CurWritePosition += 8;
+				fillOffset += 8;
+			}
+#endif /* USB_BULK_BUF_ALIGMENT */
+			pTxBlk->Priv = 0;
+			pHTTXContext->CurWriteRealPos = pHTTXContext->CurWritePosition;
+		}
+		else
+		{
+			RTMP_IRQ_UNLOCK(&pAd->TxContextQueueLock[QueIdx], IrqFlags);
+			
+			RELEASE_NDIS_PACKET(pAd, pTxBlk->pPacket, NDIS_STATUS_FAILURE);
+			return(Status);
+		}
+	}
+	else 
+	{
+		/* For sub-sequent frames of this bulk-out batch. Just copy it to our bulk-out buffer.*/
+		Status = ((pHTTXContext->bCurWriting == TRUE) ? NDIS_STATUS_SUCCESS : NDIS_STATUS_FAILURE);
+		if (Status == NDIS_STATUS_SUCCESS)
+		{
+			fillOffset += pTxBlk->Priv;
+		}
+		else 
+		{
+			RTMP_IRQ_UNLOCK(&pAd->TxContextQueueLock[QueIdx], IrqFlags);
+			
+			RELEASE_NDIS_PACKET(pAd, pTxBlk->pPacket, NDIS_STATUS_FAILURE);
+			return(Status);
+		}
+	}
+	
+	NdisZeroMemory((PUCHAR)(&pTxBlk->HeaderBuf[0]), TXINFO_SIZE);
+	pTxInfo = (PTXINFO_STRUC)(&pTxBlk->HeaderBuf[0]);
+	pTxWI= (PTXWI_STRUC)(&pTxBlk->HeaderBuf[TXINFO_SIZE]);
+
+	pWirelessPacket = &pHTTXContext->TransferBuffer->field.WirelessPacket[fillOffset];
+
+	/* copy TXWI + WLAN Header + LLC into DMA Header Buffer*/
+	/*hwHdrLen = ROUND_UP(pTxBlk->MpduHeaderLen, 4);*/
+	hwHdrLen = pTxBlk->MpduHeaderLen + pTxBlk->HdrPadLen;
+
+	/* Build our URB for USBD*/
+	DMAHdrLen = TXWI_SIZE + hwHdrLen;
+	USBDMApktLen = DMAHdrLen + pTxBlk->SrcBufLen;
+	padding = (4 - (USBDMApktLen % 4)) & 0x03;	/* round up to 4 byte alignment*/
+	USBDMApktLen += padding;
+
+	pTxBlk->Priv += (TXINFO_SIZE + USBDMApktLen);
+
+	/* For TxInfo, the length of USBDMApktLen = TXWI_SIZE + 802.11 header + payload*/
+	RTMPWriteTxInfo(pAd, pTxInfo, (USHORT)(USBDMApktLen), FALSE, FIFO_EDCA, FALSE /*NextValid*/,  FALSE);
+	
+	if (fragNum == pTxBlk->TotalFragNum) 
+	{
+		pTxInfo->USBDMATxburst = 0;
+
+#ifdef USB_BULK_BUF_ALIGMENT	
+		/*
+			when CurWritePosition > 0x6000  mean that it is at the max bulk out  size,
+			we CurWriteIdx must move to the next alignment section.
+			Otherwirse,  CurWriteIdx will be moved to the next section at databulkout.
+
+			
+			(((pHTTXContext->CurWritePosition + 3906)& 0x00007fff) & 0xffff6000) == 0x00006000)
+			we must make sure that the last fragNun packet just over the 0x6000
+			otherwise it will error because the last frag packet will at the section but will not bulk out.
+			ex:   when secoend packet writeresouce and it > 0x6000
+				And the last packet writesource and it also > 0x6000  at this time CurWriteIdx++
+				but when data bulk out , because at second packet it will > 0x6000 , the last packet will not bulk out.
+			
+		*/
+
+		if ( ((pHTTXContext->CurWritePosition + 3906)  & 0x00006000) == 0x00006000)
+		{
+
+			bLasAlignmentsectiontRound = TRUE;
+			pTxInfo->bFragLasAlignmentsectiontRound = 1;
+		}
+#else
+		if ((pHTTXContext->CurWritePosition + pTxBlk->Priv + 3906)> MAX_TXBULK_LIMIT)
+		{
+			pTxInfo->SwUseLastRound = 1;
+			TxQLastRound = TRUE;
+		}
+#endif /* USB_BULK_BUF_ALIGMENT */
+	}
+	else
+	{
+		pTxInfo->USBDMATxburst = 1;
+	}
+
+	NdisMoveMemory(pWirelessPacket, pTxBlk->HeaderBuf, TXINFO_SIZE + TXWI_SIZE + hwHdrLen); 
+#ifdef RT_BIG_ENDIAN
+	RTMPFrameEndianChange(pAd, (PUCHAR)(pWirelessPacket + TXINFO_SIZE + TXWI_SIZE), DIR_WRITE, FALSE);
+#endif /* RT_BIG_ENDIAN */
+	pWirelessPacket += (TXINFO_SIZE + TXWI_SIZE + hwHdrLen);
+	pHTTXContext->CurWriteRealPos += (TXINFO_SIZE + TXWI_SIZE + hwHdrLen);
+	
+	RTMP_IRQ_UNLOCK(&pAd->TxContextQueueLock[QueIdx], IrqFlags);
+	
+	NdisMoveMemory(pWirelessPacket, pTxBlk->pSrcBufData, pTxBlk->SrcBufLen);
+
+	/*	Zero the last padding.*/
+	pWirelessPacket += pTxBlk->SrcBufLen;
+	NdisZeroMemory(pWirelessPacket, padding + 8);
+
+	if (fragNum == pTxBlk->TotalFragNum)
+	{
+		RTMP_IRQ_LOCK(&pAd->TxContextQueueLock[QueIdx], IrqFlags);
+		
+		/* Update the pHTTXContext->CurWritePosition. 3906 used to prevent the NextBulkOut is a A-RALINK/A-MSDU Frame.*/
+		pHTTXContext->CurWritePosition += pTxBlk->Priv;
+#ifndef USB_BULK_BUF_ALIGMENT	
+		if (TxQLastRound == TRUE)
+			pHTTXContext->CurWritePosition = 8;
+#endif /* USB_BULK_BUF_ALIGMENT */
+#ifdef USB_BULK_BUF_ALIGMENT
+		if(bLasAlignmentsectiontRound == TRUE)
+		{	
+			pHTTXContext->CurWritePosition = ((CUR_WRITE_IDX_INC(pHTTXContext->CurWriteIdx, BUF_ALIGMENT_RINGSIZE)) * 0x8000);
+		}
+#endif /* USB_BULK_BUF_ALIGMENT */
+
+		pHTTXContext->CurWriteRealPos = pHTTXContext->CurWritePosition;
+
+
+		/* Finally, set bCurWriting as FALSE*/
+	pHTTXContext->bCurWriting = FALSE;
+
+		RTMP_IRQ_UNLOCK(&pAd->TxContextQueueLock[QueIdx], IrqFlags);
+
+		/* succeed and release the skb buffer*/
+		RELEASE_NDIS_PACKET(pAd, pTxBlk->pPacket, NDIS_STATUS_SUCCESS);
+	}
+
+		
+	return(Status);
+	
+}
+
+
+USHORT RtmpUSB_WriteSingleTxResource(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	TX_BLK			*pTxBlk,
+	IN	BOOLEAN			bIsLast,
+	OUT	USHORT			*FreeNumber)
+{
+	HT_TX_CONTEXT	*pHTTXContext;
+	USHORT			hwHdrLen;
+	UINT32			fillOffset;
+	TXINFO_STRUC	*pTxInfo;
+	TXWI_STRUC		*pTxWI;
+	PUCHAR			pWirelessPacket;
+	UCHAR			QueIdx;
+	unsigned long	IrqFlags;
+	NDIS_STATUS		Status;
+	UINT32			USBDMApktLen = 0, DMAHdrLen, padding;
+#ifndef USB_BULK_BUF_ALIGMENT
+	BOOLEAN			bTxQLastRound = FALSE;
+#endif /* USB_BULK_BUF_ALIGMENT */		
+	/* For USB, didn't need PCI_MAP_SINGLE()*/
+	/*SrcBufPA = PCI_MAP_SINGLE(pAd, (char *) pTxBlk->pSrcBufData, pTxBlk->SrcBufLen, RTMP_PCI_DMA_TODEVICE);*/
+
+
+	
+	/* get Tx Ring Resource & Dma Buffer address*/
+	
+	QueIdx = pTxBlk->QueIdx;
+
+	RTMP_IRQ_LOCK(&pAd->TxContextQueueLock[QueIdx], IrqFlags);
+	pHTTXContext  = &pAd->TxContext[QueIdx];
+	fillOffset = pHTTXContext->CurWritePosition;
+
+	
+	
+	/* Check ring full.*/
+	Status = RtmpUSBCanDoWrite(pAd, QueIdx, pHTTXContext);
+	if(Status == NDIS_STATUS_SUCCESS)
+	{
+		pHTTXContext->bCurWriting = TRUE;
+		
+		pTxInfo = (PTXINFO_STRUC)(&pTxBlk->HeaderBuf[0]);
+		pTxWI= (PTXWI_STRUC)(&pTxBlk->HeaderBuf[TXINFO_SIZE]);
+
+#ifndef USB_BULK_BUF_ALIGMENT
+		/* Reserve space for 8 bytes padding.*/
+		if ((pHTTXContext->ENextBulkOutPosition == pHTTXContext->CurWritePosition))
+		{
+			pHTTXContext->ENextBulkOutPosition += 8;
+			pHTTXContext->CurWritePosition += 8;
+			fillOffset += 8;
+		}
+#endif /* USB_BULK_BUF_ALIGMENT */
+		pHTTXContext->CurWriteRealPos = pHTTXContext->CurWritePosition;
+		
+		pWirelessPacket = &pHTTXContext->TransferBuffer->field.WirelessPacket[fillOffset];
+				
+		/* copy TXWI + WLAN Header + LLC into DMA Header Buffer*/
+		/*hwHdrLen = ROUND_UP(pTxBlk->MpduHeaderLen, 4);*/
+		hwHdrLen = pTxBlk->MpduHeaderLen + pTxBlk->HdrPadLen;
+
+		/* Build our URB for USBD*/
+		DMAHdrLen = TXWI_SIZE + hwHdrLen;
+		USBDMApktLen = DMAHdrLen + pTxBlk->SrcBufLen;
+		padding = (4 - (USBDMApktLen % 4)) & 0x03;	/* round up to 4 byte alignment*/
+		USBDMApktLen += padding;
+
+		pTxBlk->Priv = (TXINFO_SIZE + USBDMApktLen);
+		
+		/* For TxInfo, the length of USBDMApktLen = TXWI_SIZE + 802.11 header + payload*/
+		RTMPWriteTxInfo(pAd, pTxInfo, (USHORT)(USBDMApktLen), FALSE, FIFO_EDCA, FALSE /*NextValid*/,  FALSE);
+#ifndef USB_BULK_BUF_ALIGMENT
+		if ((pHTTXContext->CurWritePosition + 3906 + pTxBlk->Priv) > MAX_TXBULK_LIMIT)
+		{
+			pTxInfo->SwUseLastRound = 1;
+			bTxQLastRound = TRUE;
+		}
+#endif /* USB_BULK_BUF_ALIGMENT */
+
+		NdisMoveMemory(pWirelessPacket, pTxBlk->HeaderBuf, TXINFO_SIZE + TXWI_SIZE + hwHdrLen); 
+#ifdef RT_BIG_ENDIAN
+		RTMPFrameEndianChange(pAd, (PUCHAR)(pWirelessPacket + TXINFO_SIZE + TXWI_SIZE), DIR_WRITE, FALSE);
+#endif /* RT_BIG_ENDIAN */
+		pWirelessPacket += (TXINFO_SIZE + TXWI_SIZE + hwHdrLen);
+
+		/* We unlock it here to prevent the first 8 bytes maybe over-writed issue.*/
+		/*	1. First we got CurWritePosition but the first 8 bytes still not write to the pTxcontext.*/
+		/*	2. An interrupt break our routine and handle bulk-out complete.*/
+		/*	3. In the bulk-out compllete, it need to do another bulk-out, */
+		/*			if the ENextBulkOutPosition is just the same as CurWritePosition, it will save the first 8 bytes from CurWritePosition,*/
+		/*			but the payload still not copyed. the pTxContext->SavedPad[] will save as allzero. and set the bCopyPad = TRUE.*/
+		/*	4. Interrupt complete.*/
+		/*  5. Our interrupted routine go back and fill the first 8 bytes to pTxContext.*/
+		/*	6. Next time when do bulk-out, it found the bCopyPad==TRUE and will copy the SavedPad[] to pTxContext->NextBulkOutPosition.*/
+		/*		and the packet will wrong.*/
+		pHTTXContext->CurWriteRealPos += (TXINFO_SIZE + TXWI_SIZE + hwHdrLen);
+#ifndef USB_BULK_BUF_ALIGMENT
+		RTMP_IRQ_UNLOCK(&pAd->TxContextQueueLock[QueIdx], IrqFlags);
+#endif /* USB_BULK_BUF_ALIGMENT */
+
+		NdisMoveMemory(pWirelessPacket, pTxBlk->pSrcBufData, pTxBlk->SrcBufLen);
+		pWirelessPacket += pTxBlk->SrcBufLen;
+#ifndef USB_BULK_BUF_ALIGMENT
+		NdisZeroMemory(pWirelessPacket, padding + 8);
+		RTMP_IRQ_LOCK(&pAd->TxContextQueueLock[QueIdx], IrqFlags);
+#endif /* USB_BULK_BUF_ALIGMENT */
+
+		pHTTXContext->CurWritePosition += pTxBlk->Priv;
+#ifdef USB_BULK_BUF_ALIGMENT
+		/*
+			when CurWritePosition > 0x6000  mean that it is at the max bulk out size,
+			we CurWriteIdx must move to the next alignment section.
+			Otherwirse,  CurWriteIdx will be moved to the next section at databulkout.
+
+			Writingflag = TRUE ,mean that when we writing resource ,and databulkout happen, 
+			So we bulk out when this packet finish.
+		*/
+/*		if ( ((pHTTXContext->CurWritePosition & 0x00007fff) & 0xffff6000) == 0x00006000)*/
+		if ( (pHTTXContext->CurWritePosition  & 0x00006000) == 0x00006000)
+		{
+/*			printk("pHTTXContext->CurWritePosition \n");*/
+			pHTTXContext->CurWritePosition = ((CUR_WRITE_IDX_INC(pHTTXContext->CurWriteIdx, BUF_ALIGMENT_RINGSIZE)) * 0x8000);
+		}
+#else
+		if (bTxQLastRound)
+			pHTTXContext->CurWritePosition = 8;
+#endif /* USB_BULK_BUF_ALIGMENT */
+
+		pHTTXContext->CurWriteRealPos = pHTTXContext->CurWritePosition;
+		
+	pHTTXContext->bCurWriting = FALSE;
+	}
+
+	
+	RTMP_IRQ_UNLOCK(&pAd->TxContextQueueLock[QueIdx], IrqFlags);
+
+
+	/* succeed and release the skb buffer*/
+	RELEASE_NDIS_PACKET(pAd, pTxBlk->pPacket, NDIS_STATUS_SUCCESS);
+	
+	return(Status);
+
+}
+
+
+USHORT RtmpUSB_WriteMultiTxResource(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	TX_BLK			*pTxBlk,
+	IN	UCHAR			frameNum,
+	OUT	USHORT			*FreeNumber)
+{
+	HT_TX_CONTEXT	*pHTTXContext;
+	USHORT			hwHdrLen;	/* The hwHdrLen consist of 802.11 header length plus the header padding length.*/
+	UINT32			fillOffset;
+	TXINFO_STRUC	*pTxInfo;
+	TXWI_STRUC		*pTxWI;
+	PUCHAR			pWirelessPacket = NULL;
+	UCHAR			QueIdx;
+	NDIS_STATUS		Status;
+	unsigned long	IrqFlags;
+	/*UINT32			USBDMApktLen = 0, DMAHdrLen, padding;*/
+
+	
+	/* get Tx Ring Resource & Dma Buffer address*/
+	
+	QueIdx = pTxBlk->QueIdx;
+	pHTTXContext  = &pAd->TxContext[QueIdx];
+
+	RTMP_IRQ_LOCK(&pAd->TxContextQueueLock[QueIdx], IrqFlags);
+	
+	if(frameNum == 0)	
+	{	
+		/* Check if we have enough space for this bulk-out batch.*/
+		Status = RtmpUSBCanDoWrite(pAd, QueIdx, pHTTXContext);
+		if (Status == NDIS_STATUS_SUCCESS)
+		{
+			pHTTXContext->bCurWriting = TRUE;
+
+			pTxInfo = (PTXINFO_STRUC)(&pTxBlk->HeaderBuf[0]);
+			pTxWI= (PTXWI_STRUC)(&pTxBlk->HeaderBuf[TXINFO_SIZE]);
+			
+#ifndef USB_BULK_BUF_ALIGMENT	
+			/* Reserve space for 8 bytes padding.*/
+			if ((pHTTXContext->ENextBulkOutPosition == pHTTXContext->CurWritePosition))
+			{
+				
+				pHTTXContext->CurWritePosition += 8;
+				pHTTXContext->ENextBulkOutPosition += 8;
+			}
+#endif /* USB_BULK_BUF_ALIGMENT */
+			fillOffset = pHTTXContext->CurWritePosition;
+			pHTTXContext->CurWriteRealPos = pHTTXContext->CurWritePosition;
+
+			pWirelessPacket = &pHTTXContext->TransferBuffer->field.WirelessPacket[fillOffset];
+
+			
+			/* Copy TXINFO + TXWI + WLAN Header + LLC into DMA Header Buffer*/
+			
+			if (pTxBlk->TxFrameType == TX_AMSDU_FRAME)
+				/*hwHdrLen = ROUND_UP(pTxBlk->MpduHeaderLen-LENGTH_AMSDU_SUBFRAMEHEAD, 4)+LENGTH_AMSDU_SUBFRAMEHEAD;*/
+				hwHdrLen = pTxBlk->MpduHeaderLen-LENGTH_AMSDU_SUBFRAMEHEAD + pTxBlk->HdrPadLen + LENGTH_AMSDU_SUBFRAMEHEAD;
+			else if (pTxBlk->TxFrameType == TX_RALINK_FRAME)
+				/*hwHdrLen = ROUND_UP(pTxBlk->MpduHeaderLen-LENGTH_ARALINK_HEADER_FIELD, 4)+LENGTH_ARALINK_HEADER_FIELD;*/
+				hwHdrLen = pTxBlk->MpduHeaderLen-LENGTH_ARALINK_HEADER_FIELD + pTxBlk->HdrPadLen + LENGTH_ARALINK_HEADER_FIELD;
+			else
+				/*hwHdrLen = ROUND_UP(pTxBlk->MpduHeaderLen, 4);*/
+				hwHdrLen = pTxBlk->MpduHeaderLen + pTxBlk->HdrPadLen;
+
+			/* Update the pTxBlk->Priv.*/
+			pTxBlk->Priv = TXINFO_SIZE + TXWI_SIZE + hwHdrLen;
+
+			/*	pTxInfo->USBDMApktLen now just a temp value and will to correct latter.*/
+			RTMPWriteTxInfo(pAd, pTxInfo, (USHORT)(pTxBlk->Priv), FALSE, FIFO_EDCA, FALSE /*NextValid*/,  FALSE);
+			
+			/* Copy it.*/
+			NdisMoveMemory(pWirelessPacket, pTxBlk->HeaderBuf, pTxBlk->Priv); 
+#ifdef RT_BIG_ENDIAN
+			RTMPFrameEndianChange(pAd, (PUCHAR)(pWirelessPacket+ TXINFO_SIZE + TXWI_SIZE), DIR_WRITE, FALSE);
+#endif /* RT_BIG_ENDIAN */
+			pHTTXContext->CurWriteRealPos += pTxBlk->Priv;
+			pWirelessPacket += pTxBlk->Priv;
+		}
+	}
+	else
+	{	/* For sub-sequent frames of this bulk-out batch. Just copy it to our bulk-out buffer.*/
+	
+		Status = ((pHTTXContext->bCurWriting == TRUE) ? NDIS_STATUS_SUCCESS : NDIS_STATUS_FAILURE);
+		if (Status == NDIS_STATUS_SUCCESS)
+		{
+			fillOffset =  (pHTTXContext->CurWritePosition + pTxBlk->Priv);
+			pWirelessPacket = &pHTTXContext->TransferBuffer->field.WirelessPacket[fillOffset];
+
+			/*hwHdrLen = pTxBlk->MpduHeaderLen;*/
+			NdisMoveMemory(pWirelessPacket, pTxBlk->HeaderBuf, pTxBlk->MpduHeaderLen);
+			pWirelessPacket += (pTxBlk->MpduHeaderLen);
+			pTxBlk->Priv += pTxBlk->MpduHeaderLen;
+		}
+		else
+		{	/* It should not happened now unless we are going to shutdown.*/
+			DBGPRINT(RT_DEBUG_ERROR, ("WriteMultiTxResource():bCurWriting is FALSE when handle sub-sequent frames.\n"));
+			Status = NDIS_STATUS_FAILURE;
+		}
+	}
+
+
+	/* We unlock it here to prevent the first 8 bytes maybe over-write issue.*/
+	/*	1. First we got CurWritePosition but the first 8 bytes still not write to the pTxContext.*/
+	/*	2. An interrupt break our routine and handle bulk-out complete.*/
+	/*	3. In the bulk-out compllete, it need to do another bulk-out, */
+	/*			if the ENextBulkOutPosition is just the same as CurWritePosition, it will save the first 8 bytes from CurWritePosition,*/
+	/*			but the payload still not copyed. the pTxContext->SavedPad[] will save as allzero. and set the bCopyPad = TRUE.*/
+	/*	4. Interrupt complete.*/
+	/*  5. Our interrupted routine go back and fill the first 8 bytes to pTxContext.*/
+	/*	6. Next time when do bulk-out, it found the bCopyPad==TRUE and will copy the SavedPad[] to pTxContext->NextBulkOutPosition.*/
+	/*		and the packet will wrong.*/
+	RTMP_IRQ_UNLOCK(&pAd->TxContextQueueLock[QueIdx], IrqFlags);
+
+	if (Status != NDIS_STATUS_SUCCESS)
+	{
+		DBGPRINT(RT_DEBUG_ERROR,("WriteMultiTxResource: CWPos = %ld, NBOutPos = %ld.\n", pHTTXContext->CurWritePosition, pHTTXContext->NextBulkOutPosition));
+		goto done;
+	}
+
+	/* Copy the frame content into DMA buffer and update the pTxBlk->Priv*/
+	NdisMoveMemory(pWirelessPacket, pTxBlk->pSrcBufData, pTxBlk->SrcBufLen);
+	pWirelessPacket += pTxBlk->SrcBufLen;
+	pTxBlk->Priv += pTxBlk->SrcBufLen;
+
+done:	
+	/* Release the skb buffer here*/
+	RELEASE_NDIS_PACKET(pAd, pTxBlk->pPacket, NDIS_STATUS_SUCCESS);	
+
+	return(Status);
+
+}
+
+
+VOID RtmpUSB_FinalWriteTxResource(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	TX_BLK			*pTxBlk,
+	IN	USHORT			totalMPDUSize,
+	IN	USHORT			TxIdx)
+{
+	UCHAR			QueIdx;
+	HT_TX_CONTEXT	*pHTTXContext;
+	UINT32			fillOffset;
+	TXINFO_STRUC	*pTxInfo;
+	TXWI_STRUC		*pTxWI;
+	UINT32			USBDMApktLen, padding;
+	unsigned long	IrqFlags;
+	PUCHAR			pWirelessPacket;
+
+	QueIdx = pTxBlk->QueIdx;
+	pHTTXContext  = &pAd->TxContext[QueIdx];
+	
+	RTMP_IRQ_LOCK(&pAd->TxContextQueueLock[QueIdx], IrqFlags);
+
+	if (pHTTXContext->bCurWriting == TRUE)
+	{		
+		fillOffset = pHTTXContext->CurWritePosition;
+#ifndef USB_BULK_BUF_ALIGMENT
+		if (((pHTTXContext->ENextBulkOutPosition == pHTTXContext->CurWritePosition) || ((pHTTXContext->ENextBulkOutPosition-8) == pHTTXContext->CurWritePosition))
+			&& (pHTTXContext->bCopySavePad == TRUE))
+			pWirelessPacket = (PUCHAR)(&pHTTXContext->SavedPad[0]);
+		else 
+#endif /* USB_BULK_BUF_ALIGMENT */
+			pWirelessPacket = (PUCHAR)(&pHTTXContext->TransferBuffer->field.WirelessPacket[fillOffset]);
+
+		
+		/* Update TxInfo->USBDMApktLen , */
+		/*		the length = TXWI_SIZE + 802.11_hdr + 802.11_hdr_pad + payload_of_all_batch_frames + Bulk-Out-padding*/
+		
+		pTxInfo = (PTXINFO_STRUC)(pWirelessPacket);
+
+		/* Calculate the bulk-out padding*/
+		USBDMApktLen = pTxBlk->Priv - TXINFO_SIZE;
+		padding = (4 - (USBDMApktLen % 4)) & 0x03;	/* round up to 4 byte alignment*/
+		USBDMApktLen += padding;
+		
+		pTxInfo->USBDMATxPktLen = USBDMApktLen;
+
+		
+		/* Update TXWI->MPDUtotalByteCount , */
+		/*		the length = 802.11 header + payload_of_all_batch_frames*/
+		pTxWI= (PTXWI_STRUC)(pWirelessPacket + TXINFO_SIZE);
+		pTxWI->MPDUtotalByteCount = totalMPDUSize;
+
+		
+		/* Update the pHTTXContext->CurWritePosition*/
+		
+		pHTTXContext->CurWritePosition += (TXINFO_SIZE + USBDMApktLen);
+#ifdef USB_BULK_BUF_ALIGMENT
+		/*
+			when CurWritePosition > 0x6000  mean that it is at the max bulk out size,
+			we CurWriteIdx must move to the next alignment section.
+			Otherwirse,  CurWriteIdx will be moved to the next section at databulkout.
+
+			Writingflag = TRUE ,mean that when we writing resource ,and databulkout happen, 
+			So we bulk out when this packet finish.
+		*/
+
+		if ( (pHTTXContext->CurWritePosition  & 0x00006000) == 0x00006000)
+		{
+			pHTTXContext->CurWritePosition = ((CUR_WRITE_IDX_INC(pHTTXContext->CurWriteIdx, BUF_ALIGMENT_RINGSIZE)) * 0x8000);
+		}
+#else
+		if ((pHTTXContext->CurWritePosition + 3906)> MAX_TXBULK_LIMIT)
+		{	/* Add 3906 for prevent the NextBulkOut packet size is a A-RALINK/A-MSDU Frame.*/
+			pHTTXContext->CurWritePosition = 8;
+			pTxInfo->SwUseLastRound = 1;
+		}
+#endif /* USB_BULK_BUF_ALIGMENT */		
+
+		pHTTXContext->CurWriteRealPos = pHTTXContext->CurWritePosition;
+		
+
+		
+		/*	Zero the last padding.*/
+		
+		pWirelessPacket = (&pHTTXContext->TransferBuffer->field.WirelessPacket[fillOffset + pTxBlk->Priv]);
+		NdisZeroMemory(pWirelessPacket, padding + 8);
+		
+		/* Finally, set bCurWriting as FALSE*/
+		pHTTXContext->bCurWriting = FALSE;
+
+	}
+	else
+	{	/* It should not happened now unless we are going to shutdown.*/
+		DBGPRINT(RT_DEBUG_ERROR, ("FinalWriteTxResource():bCurWriting is FALSE when handle last frames.\n"));
+	}
+	
+	RTMP_IRQ_UNLOCK(&pAd->TxContextQueueLock[QueIdx], IrqFlags);
+
+}
+
+
+VOID RtmpUSBDataLastTxIdx(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			QueIdx,
+	IN	USHORT			TxIdx)
+{
+	/* DO nothing for USB.*/
+}
+
+
+/*
+	When can do bulk-out:
+		1. TxSwFreeIdx < TX_RING_SIZE;
+			It means has at least one Ring entity is ready for bulk-out, kick it out.
+		2. If TxSwFreeIdx == TX_RING_SIZE
+			Check if the CurWriting flag is FALSE, if it's FALSE, we can do kick out.
+
+*/
+VOID RtmpUSBDataKickOut(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	TX_BLK			*pTxBlk,
+	IN	UCHAR			QueIdx)
+{
+	RTUSB_SET_BULK_FLAG(pAd, (fRTUSB_BULK_OUT_DATA_NORMAL << QueIdx));
+	RTUSBKickBulkOut(pAd);
+
+}
+
+
+/*
+	Must be run in Interrupt context
+	This function handle RT2870 specific TxDesc and cpu index update and kick the packet out.
+ */
+int RtmpUSBMgmtKickOut(
+	IN RTMP_ADAPTER 	*pAd, 
+	IN UCHAR 			QueIdx,
+	IN PNDIS_PACKET		pPacket,
+	IN PUCHAR			pSrcBufVA,
+	IN UINT 			SrcBufLen)
+{
+	PTXINFO_STRUC	pTxInfo;
+	ULONG			BulkOutSize;
+	UCHAR			padLen;
+	PUCHAR			pDest;
+	ULONG			SwIdx = pAd->MgmtRing.TxCpuIdx;
+	PTX_CONTEXT		pMLMEContext = (PTX_CONTEXT)pAd->MgmtRing.Cell[SwIdx].AllocVa;
+	unsigned long	IrqFlags;
+
+	
+	pTxInfo = (PTXINFO_STRUC)(pSrcBufVA);
+
+	/* Build our URB for USBD*/
+	BulkOutSize = SrcBufLen;
+	BulkOutSize = (BulkOutSize + 3) & (~3);
+	RTMPWriteTxInfo(pAd, pTxInfo, (USHORT)(BulkOutSize - TXINFO_SIZE), TRUE, EpToQueue[MGMTPIPEIDX], FALSE,  FALSE);
+	
+	BulkOutSize += 4; /* Always add 4 extra bytes at every packet.*/
+	
+
+/* WY , it cause Tx hang on Amazon_SE , Max said the padding is useless*/
+	/* If BulkOutSize is multiple of BulkOutMaxPacketSize, add extra 4 bytes again.*/
+/*	if ((BulkOutSize % pAd->BulkOutMaxPacketSize) == 0)*/
+/*		BulkOutSize += 4;*/
+
+	padLen = BulkOutSize - SrcBufLen;
+	ASSERT((padLen <= RTMP_PKT_TAIL_PADDING));
+	
+	/* Now memzero all extra padding bytes.*/
+	pDest = (PUCHAR)(pSrcBufVA + SrcBufLen);
+/*	skb_put(GET_OS_PKT_TYPE(pPacket), padLen);*/
+	OS_PKT_TAIL_BUF_EXTEND(pPacket, padLen);
+	NdisZeroMemory(pDest, padLen);
+
+	RTMP_IRQ_LOCK(&pAd->MLMEBulkOutLock, IrqFlags);
+	
+	pAd->MgmtRing.Cell[pAd->MgmtRing.TxCpuIdx].pNdisPacket = pPacket;
+	pMLMEContext->TransferBuffer = (PTX_BUFFER)(GET_OS_PKT_DATAPTR(pPacket));
+
+	/* Length in TxInfo should be 8 less than bulkout size.*/
+	pMLMEContext->BulkOutSize = BulkOutSize;
+	pMLMEContext->InUse = TRUE;
+	pMLMEContext->bWaitingBulkOut = TRUE;
+
+
+	/*for debug*/
+	/*hex_dump("RtmpUSBMgmtKickOut", &pMLMEContext->TransferBuffer->field.WirelessPacket[0], (pMLMEContext->BulkOutSize > 16 ? 16 : pMLMEContext->BulkOutSize));*/
+
+	/*pAd->RalinkCounters.KickTxCount++;*/
+	/*pAd->RalinkCounters.OneSecTxDoneCount++;*/
+
+	/*if (pAd->MgmtRing.TxSwFreeIdx == MGMT_RING_SIZE)*/
+	/*	needKickOut = TRUE;*/
+
+	/* Decrease the TxSwFreeIdx and Increase the TX_CTX_IDX*/
+	pAd->MgmtRing.TxSwFreeIdx--;
+	INC_RING_INDEX(pAd->MgmtRing.TxCpuIdx, MGMT_RING_SIZE);
+	
+	RTMP_IRQ_UNLOCK(&pAd->MLMEBulkOutLock, IrqFlags);	
+	
+	RTUSB_SET_BULK_FLAG(pAd, fRTUSB_BULK_OUT_MLME);
+	/*if (needKickOut)*/
+	RTUSBKickBulkOut(pAd);
+	
+	return 0;
+}
+
+
+VOID RtmpUSBNullFrameKickOut(
+	IN RTMP_ADAPTER *pAd,
+	IN UCHAR		QueIdx,
+	IN UCHAR		*pNullFrame,
+	IN UINT32		frameLen)
+{
+	if (pAd->NullContext.InUse == FALSE)
+	{
+		PTX_CONTEXT		pNullContext;
+		PTXINFO_STRUC	pTxInfo;
+		PTXWI_STRUC		pTxWI;
+		PUCHAR			pWirelessPkt;
+
+		pNullContext = &(pAd->NullContext);
+
+		/* Set the in use bit*/
+		pNullContext->InUse = TRUE;
+		pWirelessPkt = (PUCHAR)&pNullContext->TransferBuffer->field.WirelessPacket[0];
+
+		RTMPZeroMemory(&pWirelessPkt[0], 100);
+		pTxInfo = (PTXINFO_STRUC)&pWirelessPkt[0];
+		RTMPWriteTxInfo(pAd, pTxInfo, (USHORT)(frameLen+TXWI_SIZE), TRUE, EpToQueue[MGMTPIPEIDX], FALSE,  FALSE);
+		pTxInfo->QSEL = FIFO_EDCA;
+		pTxWI = (PTXWI_STRUC)&pWirelessPkt[TXINFO_SIZE];
+		RTMPWriteTxWI(pAd, pTxWI,  FALSE, FALSE, FALSE, FALSE, TRUE, FALSE, 0, BSSID_WCID, frameLen,
+			0, 0, (UCHAR)pAd->CommonCfg.MlmeTransmit.field.MCS, IFS_HTTXOP, FALSE, &pAd->CommonCfg.MlmeTransmit);
+#ifdef RT_BIG_ENDIAN
+		RTMPWIEndianChange((PUCHAR)pTxWI, TYPE_TXWI);
+#endif /* RT_BIG_ENDIAN */
+
+		RTMPMoveMemory(&pWirelessPkt[TXWI_SIZE+TXINFO_SIZE], pNullFrame, frameLen);
+#ifdef RT_BIG_ENDIAN
+		RTMPFrameEndianChange(pAd, (PUCHAR)&pWirelessPkt[TXINFO_SIZE + TXWI_SIZE], DIR_WRITE, FALSE);
+#endif /* RT_BIG_ENDIAN */
+		pAd->NullContext.BulkOutSize =  TXINFO_SIZE + TXWI_SIZE + frameLen + 4;				
+
+		/* Fill out frame length information for global Bulk out arbitor*/
+		/*pNullContext->BulkOutSize = TransferBufferLength;*/
+		DBGPRINT(RT_DEBUG_TRACE, ("%s - Send NULL Frame @%d Mbps...\n", __FUNCTION__, RateIdToMbps[pAd->CommonCfg.TxRate]));
+		RTUSB_SET_BULK_FLAG(pAd, fRTUSB_BULK_OUT_DATA_NULL);
+
+		pAd->Sequence = (pAd->Sequence+1) & MAXSEQ;
+		
+		/* Kick bulk out */
+		RTUSBKickBulkOut(pAd);
+	}
+
+}
+
+
+/*
+========================================================================
+Routine Description:
+    Get a received packet.
+
+Arguments:
+	pAd					device control block
+	pSaveRxD			receive descriptor information
+	*pbReschedule		need reschedule flag
+	*pRxPending			pending received packet flag
+
+Return Value:
+    the recieved packet
+
+Note:
+========================================================================
+*/
+PNDIS_PACKET GetPacketFromRxRing(
+	IN		PRTMP_ADAPTER		pAd,
+	OUT		PRT28XX_RXD_STRUC	pSaveRxD,
+	OUT		BOOLEAN				*pbReschedule,
+	IN OUT	UINT32				*pRxPending)
+{
+	PRX_CONTEXT		pRxContext;
+	PNDIS_PACKET	pNetPkt;
+	PUCHAR			pData;
+	ULONG			ThisFrameLen;
+	ULONG			RxBufferLength;
+	PRXWI_STRUC		pRxWI;
+	
+	pRxContext = &pAd->RxContext[pAd->NextRxBulkInReadIndex];
+	if ((pRxContext->Readable == FALSE) || (pRxContext->InUse == TRUE))
+		return NULL;
+
+	RxBufferLength = pRxContext->BulkInOffset - pAd->ReadPosition;
+	if (RxBufferLength < (RT2870_RXDMALEN_FIELD_SIZE + sizeof(RXWI_STRUC) + sizeof(RXINFO_STRUC)))
+	{
+		goto label_null;
+	}
+	
+	pData = &pRxContext->TransferBuffer[pAd->ReadPosition]; /* 4KB */
+	/* The RXDMA field is 4 bytes, now just use the first 2 bytes. The Length including the (RXWI + MSDU + Padding)*/
+	ThisFrameLen = *pData + (*(pData+1)<<8);
+    if (ThisFrameLen == 0)
+	{	    
+		DBGPRINT(RT_DEBUG_TRACE, ("BIRIdx(%d): RXDMALen is zero.[%ld], BulkInBufLen = %ld)\n", 
+								pAd->NextRxBulkInReadIndex, ThisFrameLen, pRxContext->BulkInOffset));     
+		goto label_null;
+	}   
+	if ((ThisFrameLen&0x3) != 0)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("BIRIdx(%d): RXDMALen not multiple of 4.[%ld], BulkInBufLen = %ld)\n", 
+								pAd->NextRxBulkInReadIndex, ThisFrameLen, pRxContext->BulkInOffset));
+		goto label_null;
+	}
+
+	if ((ThisFrameLen + 8)> RxBufferLength)	/* 8 for (RT2870_RXDMALEN_FIELD_SIZE + sizeof(RXINFO_STRUC))*/
+	{
+		DBGPRINT(RT_DEBUG_TRACE,("BIRIdx(%d):FrameLen(0x%lx) outranges. BulkInLen=0x%lx, remaining RxBufLen=0x%lx, ReadPos=0x%lx\n", 
+						pAd->NextRxBulkInReadIndex, ThisFrameLen, pRxContext->BulkInOffset, RxBufferLength, pAd->ReadPosition));
+
+		/* error frame. finish this loop*/
+		goto label_null;
+	}
+
+	/* skip USB frame length field*/
+	pData += RT2870_RXDMALEN_FIELD_SIZE;
+	pRxWI = (PRXWI_STRUC)pData;
+#ifdef RT_BIG_ENDIAN
+	RTMPWIEndianChange(pData, TYPE_RXWI);
+#endif /* RT_BIG_ENDIAN */
+	if (pRxWI->MPDUtotalByteCount > ThisFrameLen)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s():pRxWIMPDUtotalByteCount(%d) large than RxDMALen(%ld)\n", 
+									__FUNCTION__, pRxWI->MPDUtotalByteCount, ThisFrameLen));
+		goto label_null;
+	}
+#ifdef RT_BIG_ENDIAN
+	RTMPWIEndianChange(pData, TYPE_RXWI);
+#endif /* RT_BIG_ENDIAN */
+
+	/* allocate a rx packet*/
+	pNetPkt = RTMP_AllocateFragPacketBuffer(pAd, ThisFrameLen);
+	if (pNetPkt == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR,("%s():Cannot Allocate sk buffer for this Bulk-In buffer!\n", __FUNCTION__));
+		goto label_null;
+	}
+
+	/* copy the rx packet*/
+	RTMP_USB_PKT_COPY(get_netdev_from_bssid(pAd, BSS0), pNetPkt, ThisFrameLen, pData);
+
+	/* copy RxD*/
+	*pSaveRxD = *(PRXINFO_STRUC)(pData + ThisFrameLen);
+#ifdef RT_BIG_ENDIAN
+	RTMPDescriptorEndianChange((PUCHAR)pSaveRxD, TYPE_RXINFO);
+#endif /* RT_BIG_ENDIAN */	
+
+	/* update next packet read position.*/
+	pAd->ReadPosition += (ThisFrameLen + RT2870_RXDMALEN_FIELD_SIZE + RXINFO_SIZE);	/* 8 for (RT2870_RXDMALEN_FIELD_SIZE + sizeof(RXINFO_STRUC))*/
+
+	return pNetPkt;
+
+label_null:
+	
+	return NULL;
+}
+
+
+#ifdef CONFIG_STA_SUPPORT
+/*
+	========================================================================
+
+	Routine	Description:
+		Check Rx descriptor, return NDIS_STATUS_FAILURE if any error dound
+		
+	Arguments:
+		pRxD		Pointer	to the Rx descriptor
+		
+	Return Value:
+		NDIS_STATUS_SUCCESS		No err
+		NDIS_STATUS_FAILURE		Error
+		
+	Note:
+	
+	========================================================================
+*/
+NDIS_STATUS	RTMPCheckRxError(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PHEADER_802_11	pHeader,	
+	IN	PRXWI_STRUC	pRxWI,	
+	IN	PRT28XX_RXD_STRUC	pRxINFO)
+{	
+	PCIPHER_KEY pWpaKey;
+	INT	dBm;
+	
+	if (pAd->bPromiscuous == TRUE)
+		return(NDIS_STATUS_SUCCESS);
+	if(pRxINFO == NULL)
+		return(NDIS_STATUS_FAILURE);
+
+	/* Phy errors & CRC errors*/
+	if (pRxINFO->Crc)
+	{
+		/* Check RSSI for Noise Hist statistic collection.*/
+		dBm = (INT) (pRxWI->RSSI0) - pAd->BbpRssiToDbmDelta;
+		if (dBm <= -87)
+			pAd->StaCfg.RPIDensity[0] += 1;
+		else if (dBm <= -82)
+			pAd->StaCfg.RPIDensity[1] += 1;
+		else if (dBm <= -77)
+			pAd->StaCfg.RPIDensity[2] += 1;
+		else if (dBm <= -72)
+			pAd->StaCfg.RPIDensity[3] += 1;
+		else if (dBm <= -67)
+			pAd->StaCfg.RPIDensity[4] += 1;
+		else if (dBm <= -62)
+			pAd->StaCfg.RPIDensity[5] += 1;
+		else if (dBm <= -57)
+			pAd->StaCfg.RPIDensity[6] += 1;
+		else if (dBm > -57)
+			pAd->StaCfg.RPIDensity[7] += 1;
+		
+		return(NDIS_STATUS_FAILURE);
+	}
+	
+	/* Add Rx size to channel load counter, we should ignore error counts*/
+	pAd->StaCfg.CLBusyBytes += (pRxWI->MPDUtotalByteCount+ 14);
+
+#ifndef CLIENT_WDS
+	if (pHeader->FC.ToDs
+		)
+	{
+		DBGPRINT_RAW(RT_DEBUG_ERROR, ("Err;FC.ToDs\n"));
+		return NDIS_STATUS_FAILURE;
+	}
+#endif /* CLIENT_WDS */
+
+	/* Paul 04-03 for OFDM Rx length issue*/
+	if (pRxWI->MPDUtotalByteCount > MAX_AGGREGATION_SIZE)
+	{
+		DBGPRINT_RAW(RT_DEBUG_ERROR, ("received packet too long\n"));
+		return NDIS_STATUS_FAILURE;
+	}
+
+	/* Drop not U2M frames, cant's drop here because we will drop beacon in this case*/
+	/* I am kind of doubting the U2M bit operation*/
+	/* if (pRxD->U2M == 0)*/
+	/*	return(NDIS_STATUS_FAILURE);*/
+
+	/* drop decyption fail frame*/
+	if (pRxINFO->Decrypted && pRxINFO->CipherErr)
+	{
+						
+		if (((pRxINFO->CipherErr & 1) == 1) && INFRA_ON(pAd))
+            RTMPSendWirelessEvent(pAd, IW_ICV_ERROR_EVENT_FLAG, pAd->MacTab.Content[BSSID_WCID].Addr, BSS0, 0);			
+
+		if (((pRxINFO->CipherErr & 2) == 2) && INFRA_ON(pAd))
+                RTMPSendWirelessEvent(pAd, IW_MIC_ERROR_EVENT_FLAG, pAd->MacTab.Content[BSSID_WCID].Addr, BSS0, 0);
+
+		
+		/* MIC Error*/
+		
+		if ((pRxINFO->CipherErr == 2) && pRxINFO->MyBss)
+		{			
+			pWpaKey = &pAd->SharedKey[BSS0][pRxWI->KeyIndex];
+#ifdef WPA_SUPPLICANT_SUPPORT                                    
+            if (pAd->StaCfg.WpaSupplicantUP)
+                WpaSendMicFailureToWpaSupplicant(pAd->net_dev, 
+                                   (pWpaKey->Type == PAIRWISEKEY) ? TRUE:FALSE);
+            else
+#endif /* WPA_SUPPLICANT_SUPPORT */
+			RTMPReportMicError(pAd, pWpaKey);
+			DBGPRINT_RAW(RT_DEBUG_ERROR,("Rx MIC Value error\n"));
+		}
+		
+		if (pRxINFO->Decrypted &&
+			(pAd->SharedKey[BSS0][pRxWI->KeyIndex].CipherAlg == CIPHER_AES) &&
+			(pHeader->Sequence == pAd->FragFrame.Sequence))
+		{
+			
+			/* Acceptable since the First FragFrame no CipherErr problem.*/
+			
+			return(NDIS_STATUS_SUCCESS);
+		}
+
+		return(NDIS_STATUS_FAILURE);
+	}
+
+	return(NDIS_STATUS_SUCCESS);
+}
+
+VOID RtmpUsbStaAsicForceWakeupTimeout(
+	IN PVOID SystemSpecific1, 
+	IN PVOID FunctionContext, 
+	IN PVOID SystemSpecific2, 
+	IN PVOID SystemSpecific3)
+{
+	RTMP_ADAPTER *pAd = (RTMP_ADAPTER *)FunctionContext;
+
+	
+
+	if (pAd && pAd->Mlme.AutoWakeupTimerRunning)
+	{
+		RTUSBBulkReceive(pAd);
+
+		AsicSendCommandToMcu(pAd, 0x31, 0xff, 0x00, 0x02);
+		
+		OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
+		pAd->Mlme.AutoWakeupTimerRunning = FALSE;
+	}
+}
+
+VOID RT28xxUsbStaAsicForceWakeup(
+	IN PRTMP_ADAPTER pAd,
+	IN BOOLEAN       bFromTx)
+{
+	BOOLEAN	Canceled;
+
+	if (pAd->Mlme.AutoWakeupTimerRunning)
+	{
+		RTMPCancelTimer(&pAd->Mlme.AutoWakeupTimer, &Canceled);
+		pAd->Mlme.AutoWakeupTimerRunning = FALSE;
+	}
+
+	AsicSendCommandToMcu(pAd, 0x31, 0xff, 0x00, 0x02);
+
+	OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
+}
+
+VOID RT28xxUsbStaAsicSleepThenAutoWakeup(
+	IN PRTMP_ADAPTER pAd, 
+	IN USHORT TbttNumToNextWakeUp) 
+{
+
+
+	/* Not going to sleep if in the Count Down Time*/
+	if (pAd->CountDowntoPsm > 0)
+		return;
+
+
+	/* we have decided to SLEEP, so at least do it for a BEACON period.*/
+	if (TbttNumToNextWakeUp == 0)
+		TbttNumToNextWakeUp = 1;
+
+	RTMPSetTimer(&pAd->Mlme.AutoWakeupTimer, AUTO_WAKEUP_TIMEOUT);
+	pAd->Mlme.AutoWakeupTimerRunning = TRUE;
+
+	AsicSendCommandToMcu(pAd, 0x30, 0xff, 0xff, 0x02);   /* send POWER-SAVE command to MCU. Timeout 40us.*/
+
+	/* cancel bulk-in IRPs prevent blocking CPU enter C3.*/
+	if((pAd->PendingRx > 0) && (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)))
+	{
+		RTUSBCancelPendingBulkInIRP(pAd);
+		/* resend bulk-in IRPs to receive beacons after a period of (pAd->CommonCfg.BeaconPeriod - 40) ms*/
+		pAd->PendingRx = 0;
+	}
+
+
+	OPSTATUS_SET_FLAG(pAd, fOP_STATUS_DOZE);
+
+}
+#endif /* CONFIG_STA_SUPPORT */
+
+#endif /* RTMP_MAC_USB */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_info.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_info.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_info.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_info.c	2017-09-23 03:42:49.718675981 +0800
@@ -0,0 +1,4274 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include	"rt_config.h"
+
+
+INT	Show_SSID_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_WirelessMode_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_TxBurst_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_TxPreamble_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_TxPower_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_Channel_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_BGProtection_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_RTSThreshold_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_FragThreshold_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+#ifdef DOT11_N_SUPPORT
+INT	Show_HtBw_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_HtMcs_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_HtGi_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_HtOpMode_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_HtExtcha_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_HtMpduDensity_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_HtBaWinSize_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_HtRdg_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_HtAmsdu_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_HtAutoBa_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+#endif /* DOT11_N_SUPPORT */
+
+INT	Show_CountryRegion_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_CountryRegionABand_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_CountryCode_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+#ifdef AGGREGATION_SUPPORT
+INT	Show_PktAggregate_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+#endif /* AGGREGATION_SUPPORT */
+
+#ifdef WMM_SUPPORT
+INT	Show_WmmCapable_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+#endif /* WMM_SUPPORT */
+
+INT	Show_IEEE80211H_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+#ifdef CONFIG_STA_SUPPORT
+INT	Show_NetworkType_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+
+INT	Show_WPAPSK_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_AutoReconnect_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+#endif /* CONFIG_STA_SUPPORT */
+
+INT	Show_AuthMode_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_EncrypType_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_DefaultKeyID_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_Key1_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_Key2_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_Key3_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_Key4_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+INT	Show_PMK_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen);
+
+
+extern INT	Set_AP_WscConfStatus_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+extern INT	Set_AP_AuthMode_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+extern INT	Set_AP_EncrypType_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+extern INT	Set_AP_SSID_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+extern INT	Set_AP_WPAPSK_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+static struct {
+	PSTRING name;
+	INT (*show_proc)(PRTMP_ADAPTER pAdapter, PSTRING arg, ULONG BufLen);
+} *PRTMP_PRIVATE_STA_SHOW_CFG_VALUE_PROC, RTMP_PRIVATE_STA_SHOW_CFG_VALUE_PROC[] = {
+#ifdef DBG
+	{"SSID",					Show_SSID_Proc}, 
+	{"WirelessMode",			Show_WirelessMode_Proc},       
+	{"TxBurst",					Show_TxBurst_Proc},
+	{"TxPreamble",				Show_TxPreamble_Proc},
+	{"TxPower",					Show_TxPower_Proc},
+	{"Channel",					Show_Channel_Proc},            
+	{"BGProtection",			Show_BGProtection_Proc},
+	{"RTSThreshold",			Show_RTSThreshold_Proc},       
+	{"FragThreshold",			Show_FragThreshold_Proc},      
+#ifdef DOT11_N_SUPPORT
+	{"HtBw",					Show_HtBw_Proc},
+	{"HtMcs",					Show_HtMcs_Proc},
+	{"HtGi",					Show_HtGi_Proc},
+	{"HtOpMode",				Show_HtOpMode_Proc},
+	{"HtExtcha",				Show_HtExtcha_Proc},
+	{"HtMpduDensity",			Show_HtMpduDensity_Proc},
+	{"HtBaWinSize",		        Show_HtBaWinSize_Proc},
+	{"HtRdg",		        	Show_HtRdg_Proc},
+	{"HtAmsdu",		        	Show_HtAmsdu_Proc},
+	{"HtAutoBa",		        Show_HtAutoBa_Proc},
+#endif /* DOT11_N_SUPPORT */
+	{"CountryRegion",			Show_CountryRegion_Proc},
+	{"CountryRegionABand",		Show_CountryRegionABand_Proc},
+	{"CountryCode",				Show_CountryCode_Proc},
+#ifdef AGGREGATION_SUPPORT
+	{"PktAggregate",			Show_PktAggregate_Proc},       
+#endif
+
+#ifdef WMM_SUPPORT
+	{"WmmCapable",				Show_WmmCapable_Proc},         
+#endif         
+	{"IEEE80211H",				Show_IEEE80211H_Proc},
+#ifdef CONFIG_STA_SUPPORT	
+    {"NetworkType",				Show_NetworkType_Proc},        
+	{"WPAPSK",					Show_WPAPSK_Proc},
+	{"AutoReconnect", 			Show_AutoReconnect_Proc},
+#endif /* CONFIG_STA_SUPPORT */
+	{"AuthMode",				Show_AuthMode_Proc},           
+	{"EncrypType",				Show_EncrypType_Proc},         
+	{"DefaultKeyID",			Show_DefaultKeyID_Proc},       
+	{"Key1",					Show_Key1_Proc},               
+	{"Key2",					Show_Key2_Proc},               
+	{"Key3",					Show_Key3_Proc},               
+	{"Key4",					Show_Key4_Proc},               
+	{"PMK",						Show_PMK_Proc},
+#endif /* DBG */	
+	{NULL, NULL}
+};
+
+/*
+    ==========================================================================
+    Description:
+        Get Driver version.
+
+    Return:
+    ==========================================================================
+*/
+INT Set_DriverVersion_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		DBGPRINT(RT_DEBUG_TRACE, ("Driver version-%s\n", STA_DRIVER_VERSION));
+#endif /* CONFIG_STA_SUPPORT */
+
+    return TRUE;
+}
+
+/* 
+    ==========================================================================
+    Description:
+        Set Country Region.
+        This command will not work, if the field of CountryRegion in eeprom is programmed.
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT Set_CountryRegion_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	int retval;
+	
+#ifdef EXT_BUILD_CHANNEL_LIST
+	return -EOPNOTSUPP;
+#endif /* EXT_BUILD_CHANNEL_LIST */
+
+	retval = RT_CfgSetCountryRegion(pAd, arg, BAND_24G);
+	if (retval == FALSE)
+		return FALSE;
+	
+	/* if set country region, driver needs to be reset*/
+	BuildChannelList(pAd);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_CountryRegion_Proc::(CountryRegion=%d)\n", pAd->CommonCfg.CountryRegion));
+	
+	return TRUE;
+}
+
+
+/* 
+    ==========================================================================
+    Description:
+        Set Country Region for A band.
+        This command will not work, if the field of CountryRegion in eeprom is programmed.
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT Set_CountryRegionABand_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	int retval;
+
+#ifdef EXT_BUILD_CHANNEL_LIST
+	return -EOPNOTSUPP;
+#endif /* EXT_BUILD_CHANNEL_LIST */
+
+	retval = RT_CfgSetCountryRegion(pAd, arg, BAND_5G);
+	if (retval == FALSE)
+		return FALSE;
+
+	/* if set country region, driver needs to be reset*/
+	BuildChannelList(pAd);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_CountryRegionABand_Proc::(CountryRegion=%d)\n", pAd->CommonCfg.CountryRegionForABand));
+	
+	return TRUE;
+}
+
+
+INT	Set_Cmm_WirelessMode_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg,
+	IN	BOOLEAN			FlgIsDiffMbssModeUsed)
+{
+	INT	success = TRUE;
+	UINT32 i = 0;
+
+
+	i = i; /* aviod compile warning */
+
+#ifdef CONFIG_STA_SUPPORT
+	success = RT_CfgSetWirelessMode(pAd, arg);
+#endif /* CONFIG_STA_SUPPORT */
+
+	if (success)
+	{
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			LONG	WirelessMode = pAd->CommonCfg.PhyMode;
+
+			/* clean up previous SCAN result */
+			BssTableInit(&pAd->ScanTab);
+			if (pAd->StaCfg.LastScanTime > 10 * OS_HZ)
+				pAd->StaCfg.LastScanTime -= (10 * OS_HZ);
+			
+			RTMPSetPhyMode(pAd, WirelessMode);
+#ifdef DOT11_N_SUPPORT
+			if (WirelessMode >= PHY_11ABGN_MIXED)
+			{
+				pAd->CommonCfg.BACapability.field.AutoBA = TRUE;
+				pAd->CommonCfg.REGBACapability.field.AutoBA = TRUE;
+			}
+			else
+			{
+				pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
+				pAd->CommonCfg.REGBACapability.field.AutoBA = FALSE;
+			}
+#endif /* DOT11_N_SUPPORT */
+			/* Set AdhocMode rates*/
+			if (pAd->StaCfg.BssType == BSS_ADHOC)
+			{
+				MlmeUpdateTxRates(pAd, FALSE, 0);
+				MakeIbssBeacon(pAd);           /* re-build BEACON frame*/
+				AsicEnableIbssSync(pAd);       /* copy to on-chip memory*/
+			}
+		}
+#endif /* CONFIG_STA_SUPPORT */
+
+		/* it is needed to set SSID to take effect*/
+#ifdef DOT11_N_SUPPORT
+		SetCommonHT(pAd);
+#endif /* DOT11_N_SUPPORT */
+
+		RTMP_CHIP_SPECIFIC(pAd, RTMP_CHIP_SPEC_STATE_WMODE_CMD,
+							RTMP_CHIP_SPEC_WLAN_MODE_CHANGE, NULL, 0);
+
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("Set_WirelessMode_Proc::parameters out of range\n"));
+	}
+	
+	return success;
+}
+
+
+
+/* 
+    ==========================================================================
+    Description:
+        Set Wireless Mode
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT	Set_WirelessMode_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	return Set_Cmm_WirelessMode_Proc(pAd, arg, 0);
+}
+
+/* 
+    ==========================================================================
+    Description:
+        Set Channel
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT	Set_Channel_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+ 	INT		success = TRUE;
+	UCHAR	Channel;	
+
+	Channel = (UCHAR) simple_strtol(arg, 0, 10);
+
+	/* check if this channel is valid*/
+	if (ChannelSanity(pAd, Channel) == TRUE)
+	{
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			pAd->CommonCfg.Channel = Channel;        
+
+			/*
+				Save the channel on MlmeAux for CntlOidRTBssidProc used.
+			*/
+			pAd->MlmeAux.Channel = pAd->CommonCfg.Channel;
+
+			if (MONITOR_ON(pAd))
+			{
+#ifdef DOT11_N_SUPPORT
+				N_ChannelCheck(pAd);
+				if (pAd->CommonCfg.PhyMode >= PHY_11ABGN_MIXED &&
+					pAd->CommonCfg.RegTransmitSetting.field.BW == BW_40)
+				{
+					N_SetCenCh(pAd);
+						AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
+						AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
+					DBGPRINT(RT_DEBUG_TRACE, ("BW_40, control_channel(%d), CentralChannel(%d) \n", 
+								pAd->CommonCfg.Channel, pAd->CommonCfg.CentralChannel));
+				}
+				else
+#endif /* DOT11_N_SUPPORT */
+				{
+					AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
+					AsicLockChannel(pAd, pAd->CommonCfg.Channel);
+					DBGPRINT(RT_DEBUG_TRACE, ("BW_20, Channel(%d)\n", pAd->CommonCfg.Channel));
+				}
+
+			}
+		}
+#endif /* CONFIG_STA_SUPPORT */
+		success = TRUE;
+	}
+	else
+	{
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		success = FALSE;
+		DBGPRINT(RT_DEBUG_WARN,("This channel is out of channel list, nothing to do!\n "));
+#endif /* CONFIG_STA_SUPPORT */
+	}
+
+
+	if (success == TRUE)
+		DBGPRINT(RT_DEBUG_TRACE, ("Set_Channel_Proc::(Channel=%d)\n", pAd->CommonCfg.Channel));
+
+	return success;
+}
+
+
+/* 
+    ==========================================================================
+    Description:
+        Set Short Slot Time Enable or Disable
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT	Set_ShortSlot_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	int retval;
+	
+	retval = RT_CfgSetShortSlot(pAd, arg);
+	if (retval == TRUE)
+		DBGPRINT(RT_DEBUG_TRACE, ("Set_ShortSlot_Proc::(ShortSlot=%d)\n", pAd->CommonCfg.bUseShortSlotTime));
+
+	return retval;
+}
+
+
+/* 
+    ==========================================================================
+    Description:
+        Set Tx power
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT	Set_TxPower_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	LONG TxPower;
+	INT   success = FALSE;
+
+	TxPower = simple_strtol(arg, 0, 10);
+	if (TxPower <= 100)
+	{
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			pAd->CommonCfg.TxPowerDefault = TxPower;
+			pAd->CommonCfg.TxPowerPercentage = pAd->CommonCfg.TxPowerDefault;
+		}
+#endif /* CONFIG_STA_SUPPORT */
+		success = TRUE;
+	}
+	else
+		success = FALSE;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_TxPower_Proc::(TxPowerPercentage=%ld)\n", pAd->CommonCfg.TxPowerPercentage));
+
+	return success;
+}
+
+/* 
+    ==========================================================================
+    Description:
+        Set 11B/11G Protection
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT	Set_BGProtection_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	switch (simple_strtol(arg, 0, 10))
+	{
+		case 0: /*AUTO*/
+			pAd->CommonCfg.UseBGProtection = 0;
+			break;
+		case 1: /*Always On*/
+			pAd->CommonCfg.UseBGProtection = 1;
+			break;
+		case 2: /*Always OFF*/
+			pAd->CommonCfg.UseBGProtection = 2;
+			break;		
+		default:  /*Invalid argument */
+			return FALSE;
+	}
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_BGProtection_Proc::(BGProtection=%ld)\n", pAd->CommonCfg.UseBGProtection));	
+
+	return TRUE;
+}
+
+/* 
+    ==========================================================================
+    Description:
+        Set TxPreamble
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT	Set_TxPreamble_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	RT_802_11_PREAMBLE	Preamble;
+
+	Preamble = (RT_802_11_PREAMBLE)simple_strtol(arg, 0, 10);
+
+
+	switch (Preamble)
+	{
+		case Rt802_11PreambleShort:
+			pAd->CommonCfg.TxPreamble = Preamble;
+#ifdef CONFIG_STA_SUPPORT
+			IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+				MlmeSetTxPreamble(pAd, Rt802_11PreambleShort);
+#endif /* CONFIG_STA_SUPPORT */
+			break;
+		case Rt802_11PreambleLong:
+#ifdef CONFIG_STA_SUPPORT
+		case Rt802_11PreambleAuto:
+			/* if user wants AUTO, initialize to LONG here, then change according to AP's*/
+			/* capability upon association.*/
+#endif /* CONFIG_STA_SUPPORT */
+			pAd->CommonCfg.TxPreamble = Preamble;
+#ifdef CONFIG_STA_SUPPORT
+			IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+				MlmeSetTxPreamble(pAd, Rt802_11PreambleLong);
+#endif /* CONFIG_STA_SUPPORT */
+			break;
+		default: /*Invalid argument */
+			return FALSE;
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_TxPreamble_Proc::(TxPreamble=%ld)\n", pAd->CommonCfg.TxPreamble));
+
+	return TRUE;
+}
+
+/* 
+    ==========================================================================
+    Description:
+        Set RTS Threshold
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT	Set_RTSThreshold_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	 NDIS_802_11_RTS_THRESHOLD           RtsThresh;
+
+	RtsThresh = simple_strtol(arg, 0, 10);
+
+	if((RtsThresh > 0) && (RtsThresh <= MAX_RTS_THRESHOLD))
+		pAd->CommonCfg.RtsThreshold  = (USHORT)RtsThresh;
+#ifdef CONFIG_STA_SUPPORT
+	else if (RtsThresh == 0)
+		pAd->CommonCfg.RtsThreshold = MAX_RTS_THRESHOLD;
+#endif /* CONFIG_STA_SUPPORT */
+	else
+		return FALSE; /*Invalid argument */
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_RTSThreshold_Proc::(RTSThreshold=%d)\n", pAd->CommonCfg.RtsThreshold));
+
+	return TRUE;
+}
+
+/* 
+    ==========================================================================
+    Description:
+        Set Fragment Threshold
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT	Set_FragThreshold_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	 NDIS_802_11_FRAGMENTATION_THRESHOLD     FragThresh;
+
+	FragThresh = simple_strtol(arg, 0, 10);
+
+	if (FragThresh > MAX_FRAG_THRESHOLD || FragThresh < MIN_FRAG_THRESHOLD)
+	{ 
+		/*Illegal FragThresh so we set it to default*/
+		pAd->CommonCfg.FragmentThreshold = MAX_FRAG_THRESHOLD;
+	}
+	else if (FragThresh % 2 == 1)
+	{
+		/* The length of each fragment shall always be an even number of octets, except for the last fragment*/
+		/* of an MSDU or MMPDU, which may be either an even or an odd number of octets.*/
+		pAd->CommonCfg.FragmentThreshold = (USHORT)(FragThresh - 1);
+	}
+	else
+	{
+		pAd->CommonCfg.FragmentThreshold = (USHORT)FragThresh;
+	}
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		if (pAd->CommonCfg.FragmentThreshold == MAX_FRAG_THRESHOLD)
+			pAd->CommonCfg.bUseZeroToDisableFragment = TRUE;
+		else
+			pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_FragThreshold_Proc::(FragThreshold=%d)\n", pAd->CommonCfg.FragmentThreshold));
+
+	return TRUE;
+}
+
+/* 
+    ==========================================================================
+    Description:
+        Set TxBurst
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT	Set_TxBurst_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	LONG TxBurst;
+
+	TxBurst = simple_strtol(arg, 0, 10);
+	if (TxBurst == 1)
+		pAd->CommonCfg.bEnableTxBurst = TRUE;
+	else if (TxBurst == 0)
+		pAd->CommonCfg.bEnableTxBurst = FALSE;
+	else
+		return FALSE;  /*Invalid argument */
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_TxBurst_Proc::(TxBurst=%d)\n", pAd->CommonCfg.bEnableTxBurst));
+
+	return TRUE;
+}
+
+
+
+
+#ifdef AGGREGATION_SUPPORT
+/* 
+    ==========================================================================
+    Description:
+        Set TxBurst
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT	Set_PktAggregate_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	LONG aggre;
+
+	aggre = simple_strtol(arg, 0, 10);
+
+	if (aggre == 1)
+		pAd->CommonCfg.bAggregationCapable = TRUE;
+	else if (aggre == 0)
+		pAd->CommonCfg.bAggregationCapable = FALSE;
+	else
+		return FALSE;  /*Invalid argument */
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_PktAggregate_Proc::(AGGRE=%d)\n", pAd->CommonCfg.bAggregationCapable));
+
+	return TRUE;
+}
+#endif
+
+
+#ifdef INF_PPA_SUPPORT
+INT	Set_INF_AMAZON_SE_PPA_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PUCHAR			arg)
+{
+	ULONG aggre;
+	UINT status;
+	
+	aggre = simple_strtol(arg, 0, 10);
+
+	if (aggre == 1)
+	{
+		if(pAd->PPAEnable==TRUE)
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("INF_AMAZON_SE_PPA already enabled \n"));
+		}
+		else
+		{
+			if (ppa_hook_directpath_register_dev_fn) 
+			{
+				UINT32 g_if_id;
+				
+				if (pAd->pDirectpathCb == NULL) 
+				{
+/*					pAd->pDirectpathCb = (PPA_DIRECTPATH_CB *) kmalloc (sizeof(PPA_DIRECTPATH_CB), GFP_ATOMIC);*/
+					os_alloc_mem(NULL, (UCHAR **)&(pAd->pDirectpathCb), sizeof(PPA_DIRECTPATH_CB));
+					DBGPRINT(RT_DEBUG_TRACE, ("Realloc memory for  pDirectpathCb ??\n"));
+				}
+
+				/* register callback */
+				pAd->pDirectpathCb->rx_fn = ifx_ra_start_xmit;
+				pAd->pDirectpathCb->stop_tx_fn = NULL;
+				pAd->pDirectpathCb->start_tx_fn = NULL;
+
+				status = ppa_hook_directpath_register_dev_fn(&g_if_id, pAd->net_dev, pAd->pDirectpathCb, PPA_F_DIRECTPATH_REGISTER|PPA_F_DIRECTPATH_ETH_IF);
+
+				if(status==IFX_SUCCESS)
+				{
+					pAd->g_if_id=g_if_id;
+					DBGPRINT(RT_DEBUG_TRACE, ("register INF_AMAZON_SE_PPA success :ret:%d id:%d:%d\n",status,pAd->g_if_id,g_if_id));
+					pAd->PPAEnable=TRUE;
+				}
+				else
+				{
+					DBGPRINT(RT_DEBUG_TRACE, ("register INF_AMAZON_SE_PPA fail :ret:%d\n",status));
+				}
+
+			}
+			else
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("INF_AMAZON_SE_PPA enable fail : there is no INF_AMAZON_SE_PPA module . \n"));
+			}
+		}
+
+		
+	}
+	else if (aggre == 0)
+	{
+		if(pAd->PPAEnable==FALSE)
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("INF_AMAZON_SE_PPA already disable \n"));
+		}
+		else
+		{
+			if (ppa_hook_directpath_register_dev_fn) 
+			{
+				UINT32 g_if_id;
+				g_if_id=pAd->g_if_id;
+
+				DBGPRINT(RT_DEBUG_TRACE, ("g_if_id=%d \n",pAd->g_if_id));
+				status=ppa_hook_directpath_register_dev_fn(&g_if_id, pAd->net_dev, NULL, 0/*PPA_F_DIRECTPATH_REGISTER*/);
+
+				if(status==1)
+				{
+					pAd->g_if_id=0;
+					DBGPRINT(RT_DEBUG_TRACE, ("unregister INF_AMAZON_SE_PPA success :ret:%d\n",status));
+					pAd->PPAEnable=FALSE;
+				}
+				else
+				{
+					DBGPRINT(RT_DEBUG_TRACE, ("unregister INF_AMAZON_SE_PPA fail :ret:%d\n",status));
+				}
+
+			}
+			else
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("INF_AMAZON_SE_PPA enable fail : there is no INF_AMAZON_SE_PPA module . \n"));
+			}
+		}
+
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("Invalid argument %d \n",aggre));
+		return FALSE;  /*Invalid argument */
+	}	
+
+	return TRUE;
+
+}
+#endif /* INF_PPA_SUPPORT */
+
+
+/* 
+    ==========================================================================
+    Description:
+        Set IEEE80211H.
+        This parameter is 1 when needs radar detection, otherwise 0
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT	Set_IEEE80211H_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+    LONG ieee80211h;
+
+	ieee80211h = simple_strtol(arg, 0, 10);
+
+	if (ieee80211h == 1)
+		pAd->CommonCfg.bIEEE80211H = TRUE;
+	else if (ieee80211h == 0)
+		pAd->CommonCfg.bIEEE80211H = FALSE;
+	else
+		return FALSE;  /*Invalid argument */
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_IEEE80211H_Proc::(IEEE80211H=%d)\n", pAd->CommonCfg.bIEEE80211H));
+
+	return TRUE;
+}
+
+
+#ifdef DBG
+/* 
+    ==========================================================================
+    Description:
+        For Debug information
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT	Set_Debug_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	DBGPRINT(RT_DEBUG_TRACE, ("==> Set_Debug_Proc *******************\n"));
+
+    if(simple_strtol(arg, 0, 10) <= RT_DEBUG_LOUD)
+        RTDebugLevel = simple_strtol(arg, 0, 10);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<== Set_Debug_Proc(RTDebugLevel = %ld)\n", RTDebugLevel));
+
+	return TRUE;
+}
+#endif
+
+INT	Show_DescInfo_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+
+	return TRUE;
+}
+
+/* 
+    ==========================================================================
+    Description:
+        Reset statistics counter
+
+    Arguments:
+        pAdapter            Pointer to our adapter
+        arg                 
+
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT	Set_ResetStatCounter_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	/*UCHAR           i;*/
+	/*MAC_TABLE_ENTRY *pEntry;*/
+    
+	DBGPRINT(RT_DEBUG_TRACE, ("==>Set_ResetStatCounter_Proc\n"));
+
+	/* add the most up-to-date h/w raw counters into software counters*/
+	NICUpdateRawCounters(pAd);
+    
+	NdisZeroMemory(&pAd->WlanCounters, sizeof(COUNTER_802_11));
+	NdisZeroMemory(&pAd->Counters8023, sizeof(COUNTER_802_3));
+	NdisZeroMemory(&pAd->RalinkCounters, sizeof(COUNTER_RALINK));
+
+	/* Reset HotSpot counter*/
+
+
+
+	return TRUE;
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Add WPA key process.
+		In Adhoc WPANONE, bPairwise = 0;  KeyIdx = 0;
+
+	Arguments:
+		pAd 					Pointer to our adapter
+		pBuf							Pointer to the where the key stored
+
+	Return Value:
+		NDIS_SUCCESS					Add key successfully
+
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+		
+	========================================================================
+*/
+
+BOOLEAN RTMPCheckStrPrintAble(
+    IN  CHAR *pInPutStr, 
+    IN  UCHAR strLen)
+{
+    UCHAR i=0;
+    
+    for (i=0; i<strLen; i++)
+    {
+        if ((pInPutStr[i] < 0x20) ||
+            (pInPutStr[i] > 0x7E))
+            return FALSE;
+    }
+    
+    return TRUE;
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Remove WPA Key process
+
+	Arguments:
+		pAd 					Pointer to our adapter
+		pBuf							Pointer to the where the key stored
+
+	Return Value:
+		NDIS_SUCCESS					Add key successfully
+
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+		
+	========================================================================
+*/
+#ifdef CONFIG_STA_SUPPORT
+VOID    RTMPSetDesiredRates(
+    IN  PRTMP_ADAPTER   pAdapter,
+    IN  LONG            Rates)
+{
+    NDIS_802_11_RATES aryRates;
+
+    memset(&aryRates, 0x00, sizeof(NDIS_802_11_RATES));
+    switch (pAdapter->CommonCfg.PhyMode)
+    {
+        case PHY_11A: /* A only*/
+            switch (Rates)
+            {
+                case 6000000: /*6M*/
+                    aryRates[0] = 0x0c; /* 6M*/
+                    pAdapter->StaCfg.DesiredTransmitSetting.field.MCS = MCS_0;
+                    break;
+                case 9000000: /*9M*/
+                    aryRates[0] = 0x12; /* 9M*/
+                    pAdapter->StaCfg.DesiredTransmitSetting.field.MCS = MCS_1;
+                    break;
+                case 12000000: /*12M*/
+                    aryRates[0] = 0x18; /* 12M*/
+                    pAdapter->StaCfg.DesiredTransmitSetting.field.MCS = MCS_2;
+                    break;
+                case 18000000: /*18M*/
+                    aryRates[0] = 0x24; /* 18M*/
+                    pAdapter->StaCfg.DesiredTransmitSetting.field.MCS = MCS_3;
+                    break;
+                case 24000000: /*24M*/
+                    aryRates[0] = 0x30; /* 24M*/
+                    pAdapter->StaCfg.DesiredTransmitSetting.field.MCS = MCS_4;
+                    break;
+                case 36000000: /*36M*/
+                    aryRates[0] = 0x48; /* 36M*/
+                    pAdapter->StaCfg.DesiredTransmitSetting.field.MCS = MCS_5;
+                    break;
+                case 48000000: /*48M*/
+                    aryRates[0] = 0x60; /* 48M*/
+                    pAdapter->StaCfg.DesiredTransmitSetting.field.MCS = MCS_6;
+                    break;
+                case 54000000: /*54M*/
+                    aryRates[0] = 0x6c; /* 54M*/
+                    pAdapter->StaCfg.DesiredTransmitSetting.field.MCS = MCS_7;
+                    break;
+                case -1: /*Auto*/
+                default:
+                    aryRates[0] = 0x6c; /* 54Mbps*/
+                    aryRates[1] = 0x60; /* 48Mbps*/
+                    aryRates[2] = 0x48; /* 36Mbps*/
+                    aryRates[3] = 0x30; /* 24Mbps*/
+                    aryRates[4] = 0x24; /* 18M*/
+                    aryRates[5] = 0x18; /* 12M*/
+                    aryRates[6] = 0x12; /* 9M*/
+                    aryRates[7] = 0x0c; /* 6M*/
+                    pAdapter->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
+                    break;
+            }
+            break;
+        case PHY_11BG_MIXED: /* B/G Mixed*/
+        case PHY_11B: /* B only*/
+        case PHY_11ABG_MIXED: /* A/B/G Mixed*/
+        default:
+            switch (Rates)
+            {
+                case 1000000: /*1M*/
+                    aryRates[0] = 0x02;
+                    pAdapter->StaCfg.DesiredTransmitSetting.field.MCS = MCS_0;
+                    break;
+                case 2000000: /*2M*/
+                    aryRates[0] = 0x04;
+                    pAdapter->StaCfg.DesiredTransmitSetting.field.MCS = MCS_1;
+                    break;
+                case 5000000: /*5.5M*/
+                    aryRates[0] = 0x0b; /* 5.5M*/
+                    pAdapter->StaCfg.DesiredTransmitSetting.field.MCS = MCS_2;
+                    break;
+                case 11000000: /*11M*/
+                    aryRates[0] = 0x16; /* 11M*/
+                    pAdapter->StaCfg.DesiredTransmitSetting.field.MCS = MCS_3;
+                    break;
+                case 6000000: /*6M*/
+                    aryRates[0] = 0x0c; /* 6M*/
+                    pAdapter->StaCfg.DesiredTransmitSetting.field.MCS = MCS_0;
+                    break;
+                case 9000000: /*9M*/
+                    aryRates[0] = 0x12; /* 9M*/
+                    pAdapter->StaCfg.DesiredTransmitSetting.field.MCS = MCS_1;
+                    break;
+                case 12000000: /*12M*/
+                    aryRates[0] = 0x18; /* 12M*/
+                    pAdapter->StaCfg.DesiredTransmitSetting.field.MCS = MCS_2;
+                    break;
+                case 18000000: /*18M*/
+                    aryRates[0] = 0x24; /* 18M*/
+                    pAdapter->StaCfg.DesiredTransmitSetting.field.MCS = MCS_3;
+                    break;
+                case 24000000: /*24M*/
+                    aryRates[0] = 0x30; /* 24M*/
+                    pAdapter->StaCfg.DesiredTransmitSetting.field.MCS = MCS_4;
+                    break;
+                case 36000000: /*36M*/
+                    aryRates[0] = 0x48; /* 36M*/
+                    pAdapter->StaCfg.DesiredTransmitSetting.field.MCS = MCS_5;
+                    break;
+                case 48000000: /*48M*/
+                    aryRates[0] = 0x60; /* 48M*/
+                    pAdapter->StaCfg.DesiredTransmitSetting.field.MCS = MCS_6;
+                    break;
+                case 54000000: /*54M*/
+                    aryRates[0] = 0x6c; /* 54M*/
+                    pAdapter->StaCfg.DesiredTransmitSetting.field.MCS = MCS_7;
+                    break;
+                case -1: /*Auto*/
+                default:
+                    if (pAdapter->CommonCfg.PhyMode == PHY_11B)
+                    { /*B Only*/
+                        aryRates[0] = 0x16; /* 11Mbps*/
+                        aryRates[1] = 0x0b; /* 5.5Mbps*/
+                        aryRates[2] = 0x04; /* 2Mbps*/
+                        aryRates[3] = 0x02; /* 1Mbps*/
+                    }
+                    else
+                    { /*(B/G) Mixed or (A/B/G) Mixed*/
+                        aryRates[0] = 0x6c; /* 54Mbps*/
+                        aryRates[1] = 0x60; /* 48Mbps*/
+                        aryRates[2] = 0x48; /* 36Mbps*/
+                        aryRates[3] = 0x30; /* 24Mbps*/
+                        aryRates[4] = 0x16; /* 11Mbps*/
+                        aryRates[5] = 0x0b; /* 5.5Mbps*/
+                        aryRates[6] = 0x04; /* 2Mbps*/
+                        aryRates[7] = 0x02; /* 1Mbps*/
+                    }
+                    pAdapter->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
+                    break;
+            }
+            break;
+    }
+
+    NdisZeroMemory(pAdapter->CommonCfg.DesireRate, MAX_LEN_OF_SUPPORTED_RATES);
+    NdisMoveMemory(pAdapter->CommonCfg.DesireRate, &aryRates, sizeof(NDIS_802_11_RATES));
+    DBGPRINT(RT_DEBUG_TRACE, (" RTMPSetDesiredRates (%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x)\n",
+        pAdapter->CommonCfg.DesireRate[0],pAdapter->CommonCfg.DesireRate[1],
+        pAdapter->CommonCfg.DesireRate[2],pAdapter->CommonCfg.DesireRate[3],
+        pAdapter->CommonCfg.DesireRate[4],pAdapter->CommonCfg.DesireRate[5],
+        pAdapter->CommonCfg.DesireRate[6],pAdapter->CommonCfg.DesireRate[7] ));
+    /* Changing DesiredRate may affect the MAX TX rate we used to TX frames out*/
+    MlmeUpdateTxRates(pAdapter, FALSE, 0);
+}
+
+NDIS_STATUS RTMPWPARemoveKeyProc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PVOID			pBuf)
+{
+	PNDIS_802_11_REMOVE_KEY pKey;
+	ULONG					KeyIdx;
+	NDIS_STATUS 			Status = NDIS_STATUS_FAILURE;
+	BOOLEAN 	bTxKey; 		/* Set the key as transmit key*/
+	BOOLEAN 	bPairwise;		/* Indicate the key is pairwise key*/
+	BOOLEAN 	bKeyRSC;		/* indicate the receive  SC set by KeyRSC value.*/
+								/* Otherwise, it will set by the NIC.*/
+	BOOLEAN 	bAuthenticator; /* indicate key is set by authenticator.*/
+	INT 		i;
+	DBGPRINT(RT_DEBUG_TRACE,("---> RTMPWPARemoveKeyProc\n"));
+	
+	pKey = (PNDIS_802_11_REMOVE_KEY) pBuf;
+	KeyIdx = pKey->KeyIndex & 0xff;
+	/* Bit 31 of Add-key, Tx Key*/
+	bTxKey		   = (pKey->KeyIndex & 0x80000000) ? TRUE : FALSE;
+	/* Bit 30 of Add-key PairwiseKey*/
+	bPairwise	   = (pKey->KeyIndex & 0x40000000) ? TRUE : FALSE;
+	/* Bit 29 of Add-key KeyRSC*/
+	bKeyRSC 	   = (pKey->KeyIndex & 0x20000000) ? TRUE : FALSE;
+	/* Bit 28 of Add-key Authenticator*/
+	bAuthenticator = (pKey->KeyIndex & 0x10000000) ? TRUE : FALSE;
+
+	/* 1. If bTx is TRUE, return failure information*/
+	if (bTxKey == TRUE)
+		return(NDIS_STATUS_INVALID_DATA);
+
+	/* 2. Check Pairwise Key*/
+	if (bPairwise)
+	{
+		/* a. If BSSID is broadcast, remove all pairwise keys.*/
+		/* b. If not broadcast, remove the pairwise specified by BSSID*/
+		for (i = 0; i < SHARE_KEY_NUM; i++)
+		{
+				if (MAC_ADDR_EQUAL(pAd->SharedKey[BSS0][i].BssId, pKey->BSSID))
+				{
+					DBGPRINT(RT_DEBUG_TRACE,("RTMPWPARemoveKeyProc(KeyIdx=%d)\n", i));
+					pAd->SharedKey[BSS0][i].KeyLen = 0;
+					pAd->SharedKey[BSS0][i].CipherAlg = CIPHER_NONE;
+					AsicRemoveSharedKeyEntry(pAd, BSS0, (UCHAR)i);
+					Status = NDIS_STATUS_SUCCESS;
+					break;
+				}
+		}
+	}
+	/* 3. Group Key*/
+	else
+	{
+		/* a. If BSSID is broadcast, remove all group keys indexed*/
+		/* b. If BSSID matched, delete the group key indexed.*/
+		DBGPRINT(RT_DEBUG_TRACE,("RTMPWPARemoveKeyProc(KeyIdx=%ld)\n", KeyIdx));
+		pAd->SharedKey[BSS0][KeyIdx].KeyLen = 0;
+		pAd->SharedKey[BSS0][KeyIdx].CipherAlg = CIPHER_NONE;
+		AsicRemoveSharedKeyEntry(pAd, BSS0, (UCHAR)KeyIdx);
+		Status = NDIS_STATUS_SUCCESS;
+	}
+
+	return (Status);
+}
+#endif /* CONFIG_STA_SUPPORT */
+
+
+#ifdef CONFIG_STA_SUPPORT
+/*
+	========================================================================
+	
+	Routine Description:
+		Remove All WPA Keys
+
+	Arguments:
+		pAd 					Pointer to our adapter
+
+	Return Value:
+		None
+
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+		
+	========================================================================
+*/
+VOID	RTMPWPARemoveAllKeys(
+	IN	PRTMP_ADAPTER	pAd)
+{
+
+	UCHAR 	i;
+	
+	DBGPRINT(RT_DEBUG_TRACE,("RTMPWPARemoveAllKeys(AuthMode=%d, WepStatus=%d)\n", pAd->StaCfg.AuthMode, pAd->StaCfg.WepStatus));
+#ifdef PCIE_PS_SUPPORT
+	RTMP_CLEAR_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP);
+#endif /* PCIE_PS_SUPPORT */
+	/* For WEP/CKIP, there is no need to remove it, since WinXP won't set it again after*/
+	/* Link up. And it will be replaced if user changed it.*/
+	if (pAd->StaCfg.AuthMode < Ndis802_11AuthModeWPA)
+		return;
+
+	/* For WPA-None, there is no need to remove it, since WinXP won't set it again after*/
+	/* Link up. And it will be replaced if user changed it.*/
+	if (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPANone)
+		return;
+
+	/* set BSSID wcid entry of the Pair-wise Key table as no-security mode*/
+	AsicRemovePairwiseKeyEntry(pAd, BSSID_WCID);
+
+	/* set all shared key mode as no-security. */
+	for (i = 0; i < SHARE_KEY_NUM; i++)
+    {
+		DBGPRINT(RT_DEBUG_TRACE,("remove %s key #%d\n", CipherName[pAd->SharedKey[BSS0][i].CipherAlg], i));
+		NdisZeroMemory(&pAd->SharedKey[BSS0][i], sizeof(CIPHER_KEY));  						
+
+		AsicRemoveSharedKeyEntry(pAd, BSS0, i);
+	}
+#ifdef PCIE_PS_SUPPORT
+	RTMP_SET_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP);
+#endif /* PCIE_PS_SUPPORT */
+
+}
+#endif /* CONFIG_STA_SUPPORT */	
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+	 	As STA's BSSID is a WC too, it uses shared key table.
+	 	This function write correct unicast TX key to ASIC WCID.
+ 	 	And we still make a copy in our MacTab.Content[BSSID_WCID].PairwiseKey.
+		Caller guarantee TKIP/AES always has keyidx = 0. (pairwise key)
+		Caller guarantee WEP calls this function when set Txkey,  default key index=0~3.
+		
+	Arguments:
+		pAd 					Pointer to our adapter
+		pKey							Pointer to the where the key stored
+
+	Return Value:
+		NDIS_SUCCESS					Add key successfully
+
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+		
+	========================================================================
+*/
+/*
+	========================================================================
+	Routine Description:
+		Change NIC PHY mode. Re-association may be necessary. possible settings
+		include - PHY_11B, PHY_11BG_MIXED, PHY_11A, and PHY_11ABG_MIXED 
+
+	Arguments:
+		pAd - Pointer to our adapter
+		phymode  - 
+
+	IRQL = PASSIVE_LEVEL
+	IRQL = DISPATCH_LEVEL
+	
+	========================================================================
+*/
+VOID	RTMPSetPhyMode(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	ULONG phymode)
+{
+	INT i;
+	/* the selected phymode must be supported by the RF IC encoded in E2PROM*/
+
+	pAd->CommonCfg.PhyMode = (UCHAR)phymode;
+
+	DBGPRINT(RT_DEBUG_TRACE,("RTMPSetPhyMode : PhyMode=%d, channel=%d \n", pAd->CommonCfg.PhyMode, pAd->CommonCfg.Channel));
+#ifdef EXT_BUILD_CHANNEL_LIST
+	BuildChannelListEx(pAd);
+#else
+	BuildChannelList(pAd);
+#endif /* EXT_BUILD_CHANNEL_LIST */
+
+	/* sanity check user setting*/
+	for (i = 0; i < pAd->ChannelListNum; i++)
+	{
+		if (pAd->CommonCfg.Channel == pAd->ChannelList[i].Channel)
+			break;
+	}
+
+	if (i == pAd->ChannelListNum)
+	{
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+			pAd->CommonCfg.Channel = FirstChannel(pAd);
+#endif /* CONFIG_STA_SUPPORT */
+		DBGPRINT(RT_DEBUG_ERROR, ("RTMPSetPhyMode: channel is out of range, use first channel=%d \n", pAd->CommonCfg.Channel));
+	}
+	
+	NdisZeroMemory(pAd->CommonCfg.SupRate, MAX_LEN_OF_SUPPORTED_RATES);
+	NdisZeroMemory(pAd->CommonCfg.ExtRate, MAX_LEN_OF_SUPPORTED_RATES);
+	NdisZeroMemory(pAd->CommonCfg.DesireRate, MAX_LEN_OF_SUPPORTED_RATES);
+	switch (phymode) {
+		case PHY_11B:
+			pAd->CommonCfg.SupRate[0]  = 0x82;	  /* 1 mbps, in units of 0.5 Mbps, basic rate*/
+			pAd->CommonCfg.SupRate[1]  = 0x84;	  /* 2 mbps, in units of 0.5 Mbps, basic rate*/
+			pAd->CommonCfg.SupRate[2]  = 0x8B;	  /* 5.5 mbps, in units of 0.5 Mbps, basic rate*/
+			pAd->CommonCfg.SupRate[3]  = 0x96;	  /* 11 mbps, in units of 0.5 Mbps, basic rate*/
+			pAd->CommonCfg.SupRateLen  = 4;
+			pAd->CommonCfg.ExtRateLen  = 0;
+			pAd->CommonCfg.DesireRate[0]  = 2;	   /* 1 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.DesireRate[1]  = 4;	   /* 2 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.DesireRate[2]  = 11;    /* 5.5 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.DesireRate[3]  = 22;    /* 11 mbps, in units of 0.5 Mbps*/
+			/*pAd->CommonCfg.HTPhyMode.field.MODE = MODE_CCK;  This MODE is only FYI. not use*/
+			break;
+
+		case PHY_11G:
+		case PHY_11BG_MIXED:
+		case PHY_11ABG_MIXED:
+#ifdef DOT11_N_SUPPORT
+		case PHY_11N_2_4G:
+		case PHY_11ABGN_MIXED:
+		case PHY_11BGN_MIXED:
+		case PHY_11GN_MIXED:
+#endif /* DOT11_N_SUPPORT */
+			pAd->CommonCfg.SupRate[0]  = 0x82;	  /* 1 mbps, in units of 0.5 Mbps, basic rate*/
+			pAd->CommonCfg.SupRate[1]  = 0x84;	  /* 2 mbps, in units of 0.5 Mbps, basic rate*/
+			pAd->CommonCfg.SupRate[2]  = 0x8B;	  /* 5.5 mbps, in units of 0.5 Mbps, basic rate*/
+			pAd->CommonCfg.SupRate[3]  = 0x96;	  /* 11 mbps, in units of 0.5 Mbps, basic rate*/
+			pAd->CommonCfg.SupRate[4]  = 0x12;	  /* 9 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.SupRate[5]  = 0x24;	  /* 18 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.SupRate[6]  = 0x48;	  /* 36 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.SupRate[7]  = 0x6c;	  /* 54 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.SupRateLen  = 8;
+			pAd->CommonCfg.ExtRate[0]  = 0x0C;	  /* 6 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.ExtRate[1]  = 0x18;	  /* 12 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.ExtRate[2]  = 0x30;	  /* 24 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.ExtRate[3]  = 0x60;	  /* 48 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.ExtRateLen  = 4;
+			pAd->CommonCfg.DesireRate[0]  = 2;	   /* 1 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.DesireRate[1]  = 4;	   /* 2 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.DesireRate[2]  = 11;    /* 5.5 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.DesireRate[3]  = 22;    /* 11 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.DesireRate[4]  = 12;    /* 6 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.DesireRate[5]  = 18;    /* 9 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.DesireRate[6]  = 24;    /* 12 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.DesireRate[7]  = 36;    /* 18 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.DesireRate[8]  = 48;    /* 24 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.DesireRate[9]  = 72;    /* 36 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.DesireRate[10] = 96;    /* 48 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.DesireRate[11] = 108;   /* 54 mbps, in units of 0.5 Mbps*/
+			break;
+
+		case PHY_11A:
+#ifdef DOT11_N_SUPPORT
+		case PHY_11AN_MIXED:
+		case PHY_11AGN_MIXED:
+		case PHY_11N_5G:
+#endif /* DOT11_N_SUPPORT */
+			pAd->CommonCfg.SupRate[0]  = 0x8C;	  /* 6 mbps, in units of 0.5 Mbps, basic rate*/
+			pAd->CommonCfg.SupRate[1]  = 0x12;	  /* 9 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.SupRate[2]  = 0x98;	  /* 12 mbps, in units of 0.5 Mbps, basic rate*/
+			pAd->CommonCfg.SupRate[3]  = 0x24;	  /* 18 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.SupRate[4]  = 0xb0;	  /* 24 mbps, in units of 0.5 Mbps, basic rate*/
+			pAd->CommonCfg.SupRate[5]  = 0x48;	  /* 36 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.SupRate[6]  = 0x60;	  /* 48 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.SupRate[7]  = 0x6c;	  /* 54 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.SupRateLen  = 8;
+			pAd->CommonCfg.ExtRateLen  = 0;
+			pAd->CommonCfg.DesireRate[0]  = 12;    /* 6 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.DesireRate[1]  = 18;    /* 9 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.DesireRate[2]  = 24;    /* 12 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.DesireRate[3]  = 36;    /* 18 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.DesireRate[4]  = 48;    /* 24 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.DesireRate[5]  = 72;    /* 36 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.DesireRate[6]  = 96;    /* 48 mbps, in units of 0.5 Mbps*/
+			pAd->CommonCfg.DesireRate[7]  = 108;   /* 54 mbps, in units of 0.5 Mbps*/
+			/*pAd->CommonCfg.HTPhyMode.field.MODE = MODE_OFDM;  This MODE is only FYI. not use*/
+			break;
+
+		default:
+			break;
+	}
+
+
+
+	pAd->CommonCfg.BandState = UNKNOWN_BAND;	
+}
+
+
+#ifdef DOT11_N_SUPPORT
+/*
+	========================================================================
+	Routine Description:
+		Caller ensures we has 802.11n support.
+		Calls at setting HT from AP/STASetinformation
+
+	Arguments:
+		pAd - Pointer to our adapter
+		phymode  - 
+
+	========================================================================
+*/
+VOID	RTMPSetHT(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	OID_SET_HT_PHYMODE *pHTPhyMode)
+{
+	/*ULONG	*pmcs;*/
+	UINT32	Value = 0;
+	UCHAR	BBPValue = 0;
+	UCHAR	BBP3Value = 0;
+	UCHAR	RxStream = pAd->CommonCfg.RxStream;
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetHT : HT_mode(%d), ExtOffset(%d), MCS(%d), BW(%d), STBC(%d), SHORTGI(%d)\n",
+										pHTPhyMode->HtMode, pHTPhyMode->ExtOffset, 
+										pHTPhyMode->MCS, pHTPhyMode->BW,
+										pHTPhyMode->STBC, pHTPhyMode->SHORTGI));
+			
+	/* Don't zero supportedHyPhy structure.*/
+	RTMPZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
+	RTMPZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
+	RTMPZeroMemory(&pAd->CommonCfg.NewExtChanOffset, sizeof(pAd->CommonCfg.NewExtChanOffset));
+	RTMPZeroMemory(&pAd->CommonCfg.DesiredHtPhy, sizeof(pAd->CommonCfg.DesiredHtPhy));
+
+   	if (pAd->CommonCfg.bRdg)
+	{
+		pAd->CommonCfg.HtCapability.ExtHtCapInfo.PlusHTC = 1;
+		pAd->CommonCfg.HtCapability.ExtHtCapInfo.RDGSupport = 1;
+	}
+	else
+	{
+		pAd->CommonCfg.HtCapability.ExtHtCapInfo.PlusHTC = 0;
+		pAd->CommonCfg.HtCapability.ExtHtCapInfo.RDGSupport = 0;
+	}
+
+	if (RxStream == 1)
+	{
+		/*
+			New chip use larger buffer, we can increase MaxRAmpduFactor
+			the WPA2/AES throughput can boost from 65Mbps to 84Mbps
+			after modified the value from 3 to 2.
+			All 3070, 3370, 3090, 3390, 5390, 5370 need the modification
+			to improve Throughput.
+		*/
+		pAd->CommonCfg.HtCapability.HtCapParm.MaxRAmpduFactor = 2;
+		pAd->CommonCfg.DesiredHtPhy.MaxRAmpduFactor = 2;
+	}
+	else
+	{
+		pAd->CommonCfg.HtCapability.HtCapParm.MaxRAmpduFactor = 3;
+		pAd->CommonCfg.DesiredHtPhy.MaxRAmpduFactor = 3;
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetHT : RxBAWinLimit = %d\n", pAd->CommonCfg.BACapability.field.RxBAWinLimit));
+
+	/* Mimo power save, A-MSDU size, */
+	pAd->CommonCfg.DesiredHtPhy.AmsduEnable = (USHORT)pAd->CommonCfg.BACapability.field.AmsduEnable;
+	pAd->CommonCfg.DesiredHtPhy.AmsduSize = (UCHAR)pAd->CommonCfg.BACapability.field.AmsduSize;
+	pAd->CommonCfg.DesiredHtPhy.MimoPs = (UCHAR)pAd->CommonCfg.BACapability.field.MMPSmode;
+	pAd->CommonCfg.DesiredHtPhy.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity;
+
+	pAd->CommonCfg.HtCapability.HtCapInfo.AMsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize;
+	pAd->CommonCfg.HtCapability.HtCapInfo.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode;
+	pAd->CommonCfg.HtCapability.HtCapParm.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity;
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetHT : AMsduSize = %d, MimoPs = %d, MpduDensity = %d, MaxRAmpduFactor = %d\n", 
+													pAd->CommonCfg.DesiredHtPhy.AmsduSize, 
+													pAd->CommonCfg.DesiredHtPhy.MimoPs,
+													pAd->CommonCfg.DesiredHtPhy.MpduDensity,
+													pAd->CommonCfg.DesiredHtPhy.MaxRAmpduFactor));
+	
+	if(pHTPhyMode->HtMode == HTMODE_GF)
+	{
+		pAd->CommonCfg.HtCapability.HtCapInfo.GF = 1;
+		pAd->CommonCfg.DesiredHtPhy.GF = 1;
+	}
+	else
+		pAd->CommonCfg.DesiredHtPhy.GF = 0;
+	
+	/* Decide Rx MCSSet*/
+	switch (RxStream)
+	{
+		case 1:			
+			pAd->CommonCfg.HtCapability.MCSSet[0] =  0xff;
+			pAd->CommonCfg.HtCapability.MCSSet[1] =  0x00;
+			break;
+
+		case 2:
+			pAd->CommonCfg.HtCapability.MCSSet[0] =  0xff;
+			pAd->CommonCfg.HtCapability.MCSSet[1] =  0xff;
+			break;
+
+		case 3: /* 3*3*/
+			pAd->CommonCfg.HtCapability.MCSSet[0] =  0xff;
+			pAd->CommonCfg.HtCapability.MCSSet[1] =  0xff;
+			pAd->CommonCfg.HtCapability.MCSSet[2] =  0xff;
+			break;
+	}
+
+	if (pAd->CommonCfg.bForty_Mhz_Intolerant && (pHTPhyMode->BW == BW_40) /* && (pAd->CommonCfg.Channel <= 14)*/)
+	{
+		pHTPhyMode->BW = BW_20;
+		pAd->CommonCfg.HtCapability.HtCapInfo.Forty_Mhz_Intolerant = 1;
+	}
+
+	if(pHTPhyMode->BW == BW_40)
+	{
+		pAd->CommonCfg.HtCapability.MCSSet[4] = 0x1; /* MCS 32*/
+		pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth = 1;
+		if (pAd->CommonCfg.Channel <= 14) 		
+			pAd->CommonCfg.HtCapability.HtCapInfo.CCKmodein40 = 1;
+
+		pAd->CommonCfg.DesiredHtPhy.ChannelWidth = 1;
+		pAd->CommonCfg.AddHTInfo.AddHtInfo.RecomWidth = 1;
+		pAd->CommonCfg.AddHTInfo.AddHtInfo.ExtChanOffset = (pHTPhyMode->ExtOffset == EXTCHA_BELOW)? (EXTCHA_BELOW): EXTCHA_ABOVE;
+		/* Set Regsiter for extension channel position.*/
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBP3Value);
+		if ((pHTPhyMode->ExtOffset == EXTCHA_BELOW))
+		{
+			Value |= 0x1;
+			BBP3Value |= (0x20);
+			RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
+		}
+		else if ((pHTPhyMode->ExtOffset == EXTCHA_ABOVE))
+		{
+			Value &= 0xfe;
+			BBP3Value &= (~0x20);
+			RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
+		}
+
+		/* Turn on BBP 40MHz mode now only as AP . */
+		/* Sta can turn on BBP 40MHz after connection with 40MHz AP. Sta only broadcast 40MHz capability before connection.*/
+		if ((pAd->OpMode == OPMODE_AP) || INFRA_ON(pAd) || ADHOC_ON(pAd)
+			)
+		{
+			RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
+			BBPValue &= (~0x18);
+			BBPValue |= 0x10;
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
+
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBP3Value);
+			pAd->CommonCfg.BBPCurrentBW = BW_40;
+
+			RTMP_CHIP_SPECIFIC(pAd, RTMP_CHIP_SEPC_STATE_HT_SET,
+								RTMP_CHIP_SPEC_HT_MODE_CHANGE, NULL, BW_40);
+		}
+	}
+	else
+	{
+		pAd->CommonCfg.HtCapability.HtCapInfo.ChannelWidth = 0;
+		pAd->CommonCfg.DesiredHtPhy.ChannelWidth = 0;
+		pAd->CommonCfg.AddHTInfo.AddHtInfo.RecomWidth = 0;
+		pAd->CommonCfg.AddHTInfo.AddHtInfo.ExtChanOffset = EXTCHA_NONE;
+		pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel;
+		/* Turn on BBP 20MHz mode by request here.*/
+		{
+			RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
+			BBPValue &= (~0x18);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
+			pAd->CommonCfg.BBPCurrentBW = BW_20;
+
+			RTMP_CHIP_SPECIFIC(pAd, RTMP_CHIP_SEPC_STATE_HT_SET,
+								RTMP_CHIP_SPEC_HT_MODE_CHANGE, NULL, BW_20);
+		}
+	}
+		
+	if(pHTPhyMode->STBC == STBC_USE)
+	{
+		/*TxSTBC*/
+		/*Set to 0 if not supported, Set to 1 if supported	*/
+		if (pAd->Antenna.field.TxPath >= 2)
+		{
+			pAd->CommonCfg.HtCapability.HtCapInfo.TxSTBC = 1;
+			pAd->CommonCfg.DesiredHtPhy.TxSTBC = 1;
+		}
+		else
+		{
+			pAd->CommonCfg.HtCapability.HtCapInfo.TxSTBC = 0;
+			pAd->CommonCfg.DesiredHtPhy.TxSTBC = 0; 	
+		}
+		
+		/*RxSTBC*/
+		/*Set to 0 for no support,							Set to 1 for support of one spatial stream*/
+		/*Set to 2 for support of one and two spatial streams,	Set to 3 for support of one, two and three spatial streams*/
+		if (pAd->Antenna.field.RxPath >= 1)
+		{
+			pAd->CommonCfg.HtCapability.HtCapInfo.RxSTBC = 1;
+			pAd->CommonCfg.DesiredHtPhy.RxSTBC = 1;
+		}
+		else
+		{
+			pAd->CommonCfg.HtCapability.HtCapInfo.RxSTBC = 0; 
+			pAd->CommonCfg.DesiredHtPhy.RxSTBC = 0; 	
+		}
+	}
+	else
+	{
+		pAd->CommonCfg.DesiredHtPhy.TxSTBC = 0;
+		pAd->CommonCfg.DesiredHtPhy.RxSTBC = 0;
+	}
+
+	if(pHTPhyMode->SHORTGI == GI_400)
+	{
+		pAd->CommonCfg.HtCapability.HtCapInfo.ShortGIfor20 = 1;
+		pAd->CommonCfg.HtCapability.HtCapInfo.ShortGIfor40 = 1;
+		pAd->CommonCfg.DesiredHtPhy.ShortGIfor20 = 1;
+		pAd->CommonCfg.DesiredHtPhy.ShortGIfor40 = 1;
+	}
+	else
+	{
+		pAd->CommonCfg.HtCapability.HtCapInfo.ShortGIfor20 = 0;
+		pAd->CommonCfg.HtCapability.HtCapInfo.ShortGIfor40 = 0;
+		pAd->CommonCfg.DesiredHtPhy.ShortGIfor20 = 0;
+		pAd->CommonCfg.DesiredHtPhy.ShortGIfor40 = 0;
+	}
+	
+	/* We support link adaptation for unsolicit MCS feedback, set to 2.*/
+	/*pAd->CommonCfg.HtCapability.ExtHtCapInfo.MCSFeedback = MCSFBK_NONE; MCSFBK_UNSOLICIT;*/
+	pAd->CommonCfg.AddHTInfo.ControlChan = pAd->CommonCfg.Channel;
+	/* 1, the extension channel above the control channel. */
+	
+	/* EDCA parameters used for AP's own transmission*/
+	if (pAd->CommonCfg.APEdcaParm.bValid == FALSE)
+	{
+		pAd->CommonCfg.APEdcaParm.bValid = TRUE;
+		pAd->CommonCfg.APEdcaParm.Aifsn[0] = 3;
+		pAd->CommonCfg.APEdcaParm.Aifsn[1] = 7;
+		pAd->CommonCfg.APEdcaParm.Aifsn[2] = 1;
+		pAd->CommonCfg.APEdcaParm.Aifsn[3] = 1;
+	
+		pAd->CommonCfg.APEdcaParm.Cwmin[0] = 4;
+		pAd->CommonCfg.APEdcaParm.Cwmin[1] = 4;
+		pAd->CommonCfg.APEdcaParm.Cwmin[2] = 3;
+		pAd->CommonCfg.APEdcaParm.Cwmin[3] = 2;
+
+		pAd->CommonCfg.APEdcaParm.Cwmax[0] = 6;
+		pAd->CommonCfg.APEdcaParm.Cwmax[1] = 10;
+		pAd->CommonCfg.APEdcaParm.Cwmax[2] = 4;
+		pAd->CommonCfg.APEdcaParm.Cwmax[3] = 3;
+
+		pAd->CommonCfg.APEdcaParm.Txop[0]  = 0;
+		pAd->CommonCfg.APEdcaParm.Txop[1]  = 0;
+		pAd->CommonCfg.APEdcaParm.Txop[2]  = 94;	
+		pAd->CommonCfg.APEdcaParm.Txop[3]  = 47;	
+	}
+	AsicSetEdcaParm(pAd, &pAd->CommonCfg.APEdcaParm);
+	
+
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+
+		RTMPSetIndividualHT(pAd, 0);
+		}
+#endif /* CONFIG_STA_SUPPORT */
+
+}
+
+/*
+	========================================================================
+	Routine Description:
+		Caller ensures we has 802.11n support.
+		Calls at setting HT from AP/STASetinformation
+
+	Arguments:
+		pAd - Pointer to our adapter
+		phymode  - 
+
+	========================================================================
+*/
+VOID	RTMPSetIndividualHT(
+	IN	PRTMP_ADAPTER		pAd,
+	IN	UCHAR				apidx)
+{	
+	PRT_HT_PHY_INFO		pDesired_ht_phy = NULL;
+	UCHAR	TxStream = pAd->CommonCfg.TxStream;		
+	UCHAR	DesiredMcs	= MCS_AUTO;
+	UCHAR	encrypt_mode = Ndis802_11EncryptionDisabled;
+						
+	do
+	{
+
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{		
+			pDesired_ht_phy = &pAd->StaCfg.DesiredHtPhyInfo;					
+			DesiredMcs = pAd->StaCfg.DesiredTransmitSetting.field.MCS;
+			encrypt_mode = pAd->StaCfg.WepStatus;
+			/*pAd->StaCfg.bAutoTxRateSwitch = (DesiredMcs == MCS_AUTO) ? TRUE : FALSE;*/
+				break;
+		}	
+#endif /* CONFIG_STA_SUPPORT */
+	} while (FALSE);
+
+	if (pDesired_ht_phy == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("RTMPSetIndividualHT: invalid apidx(%d)\n", apidx));
+		return;
+	}
+	RTMPZeroMemory(pDesired_ht_phy, sizeof(RT_HT_PHY_INFO));
+
+	DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetIndividualHT : Desired MCS = %d\n", DesiredMcs));
+	/* Check the validity of MCS */
+	if ((TxStream == 1) && ((DesiredMcs >= MCS_8) && (DesiredMcs <= MCS_15)))
+	{
+		DBGPRINT(RT_DEBUG_WARN, ("RTMPSetIndividualHT: MCS(%d) is invalid in 1S, reset it as MCS_7\n", DesiredMcs));
+		DesiredMcs = MCS_7;		
+	}
+
+	if ((pAd->CommonCfg.DesiredHtPhy.ChannelWidth == BW_20) && (DesiredMcs == MCS_32))
+	{
+		DBGPRINT(RT_DEBUG_WARN, ("RTMPSetIndividualHT: MCS_32 is only supported in 40-MHz, reset it as MCS_0\n"));
+		DesiredMcs = MCS_0;		
+	}
+	   		
+#ifdef CONFIG_STA_SUPPORT
+	if ((pAd->OpMode == OPMODE_STA) && (pAd->StaCfg.BssType == BSS_INFRA) && (apidx == MIN_NET_DEVICE_FOR_MBSSID))
+		;
+	else
+#endif /* CONFIG_STA_SUPPORT */
+	/* 	
+		WFA recommend to restrict the encryption type in 11n-HT mode.
+	 	So, the WEP and TKIP are not allowed in HT rate. 
+	*/
+	if (pAd->CommonCfg.HT_DisallowTKIP && IS_INVALID_HT_SECURITY(encrypt_mode))
+	{
+		DBGPRINT(RT_DEBUG_WARN, ("%s : Use legacy rate in WEP/TKIP encryption mode (apidx=%d)\n", 
+									__FUNCTION__, apidx));
+		return;
+	}
+
+	if (pAd->CommonCfg.HT_Disable)
+	{
+#ifdef CONFIG_STA_SUPPORT
+		pAd->StaCfg.bAdhocN = FALSE;
+#endif /* CONFIG_STA_SUPPORT */
+		DBGPRINT(RT_DEBUG_TRACE, ("%s : HT is disabled\n", __FUNCTION__));
+		return;
+	}
+			
+	pDesired_ht_phy->bHtEnable = TRUE;
+					 
+	/* Decide desired Tx MCS*/
+	switch (TxStream)
+	{
+		case 1:
+			if (DesiredMcs == MCS_AUTO)
+			{
+				pDesired_ht_phy->MCSSet[0]= 0xff;
+				pDesired_ht_phy->MCSSet[1]= 0x00;
+			}
+			else if (DesiredMcs <= MCS_7)
+			{
+				pDesired_ht_phy->MCSSet[0]= 1<<DesiredMcs;
+				pDesired_ht_phy->MCSSet[1]= 0x00;
+			}			
+			break;
+
+		case 2:
+			if (DesiredMcs == MCS_AUTO)
+			{
+				pDesired_ht_phy->MCSSet[0]= 0xff;
+				pDesired_ht_phy->MCSSet[1]= 0xff;
+			}
+			else if (DesiredMcs <= MCS_15)
+			{
+				ULONG mode;
+				
+				mode = DesiredMcs / 8;
+				if (mode < 2)
+					pDesired_ht_phy->MCSSet[mode] = (1 << (DesiredMcs - mode * 8));
+			}			
+			break;
+
+		case 3: /* 3*3*/
+			if (DesiredMcs == MCS_AUTO)
+			{
+				/* MCS0 ~ MCS23, 3 bytes */
+				pDesired_ht_phy->MCSSet[0]= 0xff;
+				pDesired_ht_phy->MCSSet[1]= 0xff;
+				pDesired_ht_phy->MCSSet[2]= 0xff;
+			}
+			else if (DesiredMcs <= MCS_23)
+			{
+				ULONG mode;
+
+				mode = DesiredMcs / 8;
+				if (mode < 3)
+					pDesired_ht_phy->MCSSet[mode] = (1 << (DesiredMcs - mode * 8));
+			}
+			break;
+	}							
+
+	if(pAd->CommonCfg.DesiredHtPhy.ChannelWidth == BW_40)
+	{
+		if (DesiredMcs == MCS_AUTO || DesiredMcs == MCS_32)
+			pDesired_ht_phy->MCSSet[4] = 0x1;
+	}
+
+	/* update HT Rate setting				*/
+    if (pAd->OpMode == OPMODE_STA)
+	{
+        MlmeUpdateHtTxRates(pAd, BSS0);
+	}
+    else
+	    MlmeUpdateHtTxRates(pAd, apidx);
+}
+
+/*
+	========================================================================
+	Routine Description:
+		Clear the desire HT info per interface
+		
+	Arguments:
+	
+	========================================================================
+*/
+VOID RTMPDisableDesiredHtInfo(
+	IN	PRTMP_ADAPTER		pAd)
+{
+
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		RTMPZeroMemory(&pAd->StaCfg.DesiredHtPhyInfo, sizeof(RT_HT_PHY_INFO));
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+}
+
+
+INT	SetCommonHT(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	OID_SET_HT_PHYMODE		SetHT;
+	
+	if (pAd->CommonCfg.PhyMode < PHY_11ABGN_MIXED)
+	{
+		/* Clear previous HT information */
+		RTMPDisableDesiredHtInfo(pAd);
+		return FALSE;
+	}
+	
+	SetHT.PhyMode = (RT_802_11_PHY_MODE)pAd->CommonCfg.PhyMode;
+	SetHT.TransmitNo = ((UCHAR)pAd->Antenna.field.TxPath);
+	SetHT.HtMode = (UCHAR)pAd->CommonCfg.RegTransmitSetting.field.HTMODE;
+	SetHT.ExtOffset = (UCHAR)pAd->CommonCfg.RegTransmitSetting.field.EXTCHA;
+	SetHT.MCS = MCS_AUTO;
+	SetHT.BW = (UCHAR)pAd->CommonCfg.RegTransmitSetting.field.BW;
+	SetHT.STBC = (UCHAR)pAd->CommonCfg.RegTransmitSetting.field.STBC;
+	SetHT.SHORTGI = (UCHAR)pAd->CommonCfg.RegTransmitSetting.field.ShortGI;		
+
+	RTMPSetHT(pAd, &SetHT);
+
+	return TRUE;
+}
+
+/*
+	========================================================================
+	Routine Description:
+		Update HT IE from our capability.
+		
+	Arguments:
+		Send all HT IE in beacon/probe rsp/assoc rsp/action frame.
+		
+	
+	========================================================================
+*/
+VOID	RTMPUpdateHTIE(
+	IN	RT_HT_CAPABILITY	*pRtHt,
+	IN		UCHAR				*pMcsSet,
+	OUT		HT_CAPABILITY_IE *pHtCapability,
+	OUT		ADD_HT_INFO_IE		*pAddHtInfo)
+{
+	RTMPZeroMemory(pHtCapability, sizeof(HT_CAPABILITY_IE));
+	RTMPZeroMemory(pAddHtInfo, sizeof(ADD_HT_INFO_IE));
+	
+		pHtCapability->HtCapInfo.ChannelWidth = pRtHt->ChannelWidth;
+		pHtCapability->HtCapInfo.MimoPs = pRtHt->MimoPs;
+		pHtCapability->HtCapInfo.GF = pRtHt->GF;
+		pHtCapability->HtCapInfo.ShortGIfor20 = pRtHt->ShortGIfor20;
+		pHtCapability->HtCapInfo.ShortGIfor40 = pRtHt->ShortGIfor40;
+		pHtCapability->HtCapInfo.TxSTBC = pRtHt->TxSTBC;
+		pHtCapability->HtCapInfo.RxSTBC = pRtHt->RxSTBC;
+		pHtCapability->HtCapInfo.AMsduSize = pRtHt->AmsduSize;
+		pHtCapability->HtCapParm.MaxRAmpduFactor = pRtHt->MaxRAmpduFactor;
+		pHtCapability->HtCapParm.MpduDensity = pRtHt->MpduDensity;
+
+		pAddHtInfo->AddHtInfo.ExtChanOffset = pRtHt->ExtChanOffset ;
+		pAddHtInfo->AddHtInfo.RecomWidth = pRtHt->RecomWidth;
+		pAddHtInfo->AddHtInfo2.OperaionMode = pRtHt->OperaionMode;
+		pAddHtInfo->AddHtInfo2.NonGfPresent = pRtHt->NonGfPresent;
+		RTMPMoveMemory(pAddHtInfo->MCSSet, /*pRtHt->MCSSet*/pMcsSet, 4); /* rt2860 only support MCS max=32, no need to copy all 16 uchar.*/
+	
+        DBGPRINT(RT_DEBUG_TRACE,("RTMPUpdateHTIE <== \n"));
+}
+#endif /* DOT11_N_SUPPORT */
+
+/*
+	========================================================================
+	Description:
+		Add Client security information into ASIC WCID table and IVEIV table.
+    Return:
+	========================================================================
+*/
+VOID	RTMPAddWcidAttributeEntry(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			BssIdx,
+	IN 	UCHAR		 	KeyIdx,
+	IN 	UCHAR		 	CipherAlg,
+	IN 	MAC_TABLE_ENTRY *pEntry)
+{
+	UINT32		WCIDAttri = 0;
+	USHORT		offset;
+	UCHAR		IVEIV = 0;
+	USHORT		Wcid = 0;
+
+	{
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			if (BssIdx > BSS0)
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("RTMPAddWcidAttributeEntry: The BSS-index(%d) is out of range for Infra link. \n", BssIdx));	
+				return;
+			}
+
+			/* 1.	In ADHOC mode, the AID is wcid number. And NO mesh link exists.*/
+			/* 2.	In Infra mode, the AID:1 MUST be wcid of infra STA. */
+			/*					   the AID:2~ assign to mesh link entry. 	*/
+			if (pEntry)
+				Wcid = pEntry->Aid;
+			else
+				Wcid = MCAST_WCID;
+		}
+#endif /* CONFIG_STA_SUPPORT */
+	}
+
+	/* Update WCID attribute table*/
+	offset = MAC_WCID_ATTRIBUTE_BASE + (Wcid * HW_WCID_ATTRI_SIZE);
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		if (pEntry && IS_ENTRY_MESH(pEntry))
+			WCIDAttri = (CipherAlg<<1) | PAIRWISEKEYTABLE;
+#if defined(DOT11Z_TDLS_SUPPORT) || defined(QOS_DLS_SUPPORT)
+		else if ((pEntry) && (IS_ENTRY_DLS(pEntry) || IS_ENTRY_TDLS(pEntry)) &&
+					((CipherAlg == CIPHER_TKIP) || 
+					(CipherAlg == CIPHER_AES) || 
+				 	(CipherAlg == CIPHER_NONE))) 
+			WCIDAttri = (CipherAlg<<1) | PAIRWISEKEYTABLE;
+#endif
+		else
+		WCIDAttri = (CipherAlg<<1) | SHAREDKEYTABLE;
+	}
+#endif /* CONFIG_STA_SUPPORT */
+		
+	RTMP_IO_WRITE32(pAd, offset, WCIDAttri);
+
+		
+	/* Update IV/EIV table*/
+	offset = MAC_IVEIV_TABLE_BASE + (Wcid * HW_IVEIV_ENTRY_SIZE);
+
+	/* WPA mode*/
+	if ((CipherAlg == CIPHER_TKIP) || (CipherAlg == CIPHER_AES))
+	{	
+		/* Eiv bit on. keyid always is 0 for pairwise key 			*/
+		IVEIV = (KeyIdx <<6) | 0x20;	
+	}	 
+	else
+	{
+		/* WEP KeyIdx is default tx key. */
+		IVEIV = (KeyIdx << 6);	
+	}
+
+	/* For key index and ext IV bit, so only need to update the position(offset+3).*/
+#ifdef RTMP_MAC_USB
+	RTUSBMultiWrite_OneByte(pAd, offset+3, &IVEIV);
+#endif /* RTMP_MAC_USB */
+	
+	DBGPRINT(RT_DEBUG_TRACE,("RTMPAddWcidAttributeEntry: WCID #%d, KeyIndex #%d, Alg=%s\n",Wcid, KeyIdx, CipherName[CipherAlg]));
+	DBGPRINT(RT_DEBUG_TRACE,("	WCIDAttri = 0x%x \n",  WCIDAttri));	
+
+}
+
+/* 
+    ==========================================================================
+    Description:
+        Parse encryption type
+Arguments:
+    pAdapter                    Pointer to our adapter
+    wrq                         Pointer to the ioctl argument
+
+    Return Value:
+        None
+
+    Note:
+    ==========================================================================
+*/
+PSTRING GetEncryptType(CHAR enc)
+{
+    if(enc == Ndis802_11WEPDisabled)
+        return "NONE";
+    if(enc == Ndis802_11WEPEnabled)
+    	return "WEP";
+    if(enc == Ndis802_11Encryption2Enabled)
+    	return "TKIP";
+    if(enc == Ndis802_11Encryption3Enabled)
+    	return "AES";
+	if(enc == Ndis802_11Encryption4Enabled)
+    	return "TKIPAES";
+    else
+    	return "UNKNOW";
+}
+
+PSTRING GetAuthMode(CHAR auth)
+{
+    if(auth == Ndis802_11AuthModeOpen)
+    	return "OPEN";
+    if(auth == Ndis802_11AuthModeShared)
+    	return "SHARED";
+	if(auth == Ndis802_11AuthModeAutoSwitch)
+    	return "AUTOWEP";
+    if(auth == Ndis802_11AuthModeWPA)
+    	return "WPA";
+    if(auth == Ndis802_11AuthModeWPAPSK)
+    	return "WPAPSK";
+    if(auth == Ndis802_11AuthModeWPANone)
+    	return "WPANONE";
+    if(auth == Ndis802_11AuthModeWPA2)
+    	return "WPA2";
+    if(auth == Ndis802_11AuthModeWPA2PSK)
+    	return "WPA2PSK";
+	if(auth == Ndis802_11AuthModeWPA1WPA2)
+    	return "WPA1WPA2";
+	if(auth == Ndis802_11AuthModeWPA1PSKWPA2PSK)
+    	return "WPA1PSKWPA2PSK";
+	
+    	return "UNKNOW";
+}		
+
+
+/* 
+    ==========================================================================
+    Description:
+        Get site survey results
+	Arguments:
+	    pAdapter                    Pointer to our adapter
+	    wrq                         Pointer to the ioctl argument
+
+    Return Value:
+        None
+
+    Note:
+        Usage:
+        		1.) UI needs to wait 4 seconds after issue a site survey command
+        		2.) iwpriv ra0 get_site_survey
+        		3.) UI needs to prepare at least 4096bytes to get the results
+    ==========================================================================
+*/
+#define	LINE_LEN	(4+33+20+23+9+7+7+3)	/* Channel+SSID+Bssid+Security+Signal+WiressMode+ExtCh+NetworkType*/
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+VOID	RTMPCommSiteSurveyData(
+	IN  PSTRING		msg,
+	IN  PBSS_ENTRY	pBss,
+	IN  UINT32		MsgLen)
+{
+	INT         Rssi = 0;
+	UINT        Rssi_Quality = 0;
+	NDIS_802_11_NETWORK_TYPE    wireless_mode;
+	CHAR		Ssid[MAX_LEN_OF_SSID +1];
+	STRING		SecurityStr[32] = {0};
+	NDIS_802_11_ENCRYPTION_STATUS	ap_cipher = Ndis802_11EncryptionDisabled;
+	NDIS_802_11_AUTHENTICATION_MODE	ap_auth_mode = Ndis802_11AuthModeOpen;
+
+		/*Channel*/
+		sprintf(msg+strlen(msg),"%-4d", pBss->Channel);
+
+		/*SSID*/
+	NdisZeroMemory(Ssid, (MAX_LEN_OF_SSID +1));
+	if (RTMPCheckStrPrintAble((PCHAR)pBss->Ssid, pBss->SsidLen))
+		NdisMoveMemory(Ssid, pBss->Ssid, pBss->SsidLen);
+	else
+	{
+		INT idx = 0;
+		sprintf(Ssid, "0x");
+		for (idx = 0; (idx < 14) && (idx < pBss->SsidLen); idx++)
+			sprintf(Ssid + 2 + (idx*2), "%02X", (UCHAR)pBss->Ssid[idx]);
+	}
+		sprintf(msg+strlen(msg),"%-33s", Ssid);      
+		
+		/*BSSID*/
+		sprintf(msg+strlen(msg),"%02x:%02x:%02x:%02x:%02x:%02x   ", 
+			pBss->Bssid[0], 
+			pBss->Bssid[1],
+			pBss->Bssid[2], 
+			pBss->Bssid[3], 
+			pBss->Bssid[4], 
+			pBss->Bssid[5]);
+	
+	/*Security*/
+	if ((Ndis802_11AuthModeWPA <= pBss->AuthMode) &&
+		(pBss->AuthMode <= Ndis802_11AuthModeWPA1PSKWPA2PSK))
+	{
+		if (pBss->AuthMode == Ndis802_11AuthModeWPANone)
+		{
+			ap_auth_mode = pBss->AuthMode;
+				ap_cipher = pBss->WPA.PairCipher;
+		}
+		else if (pBss->AuthModeAux == Ndis802_11AuthModeOpen)
+		{
+			ap_auth_mode = pBss->AuthMode;
+			if ((ap_auth_mode == Ndis802_11AuthModeWPA) || 
+				(ap_auth_mode == Ndis802_11AuthModeWPAPSK))
+			{
+				if (pBss->WPA.PairCipherAux == Ndis802_11WEPDisabled)
+					ap_cipher = pBss->WPA.PairCipher;
+				else 
+					ap_cipher = Ndis802_11Encryption4Enabled;
+			}
+			else if ((ap_auth_mode == Ndis802_11AuthModeWPA2) || 
+					 (ap_auth_mode == Ndis802_11AuthModeWPA2PSK))
+			{
+				if (pBss->WPA2.PairCipherAux == Ndis802_11WEPDisabled)
+					ap_cipher = pBss->WPA2.PairCipher;
+				else 
+					ap_cipher = Ndis802_11Encryption4Enabled;
+			}
+		}
+		else if ((pBss->AuthMode == Ndis802_11AuthModeWPAPSK) || 
+				 (pBss->AuthMode == Ndis802_11AuthModeWPA2PSK))
+		{
+			if ((pBss->AuthModeAux == Ndis802_11AuthModeWPAPSK) ||
+				(pBss->AuthModeAux == Ndis802_11AuthModeWPA2PSK))
+				ap_auth_mode = Ndis802_11AuthModeWPA1PSKWPA2PSK;
+			else
+				ap_auth_mode = pBss->AuthMode;
+			
+			if (pBss->WPA.PairCipher != pBss->WPA2.PairCipher)
+				ap_cipher = Ndis802_11Encryption4Enabled;
+			else if ((pBss->WPA.PairCipher == pBss->WPA2.PairCipher) &&
+					 (pBss->WPA.PairCipherAux != pBss->WPA2.PairCipherAux))
+				ap_cipher = Ndis802_11Encryption4Enabled;
+			else if ((pBss->WPA.PairCipher == pBss->WPA2.PairCipher) &&
+					 (pBss->WPA.PairCipherAux == pBss->WPA2.PairCipherAux) &&
+					 (pBss->WPA.PairCipherAux != Ndis802_11WEPDisabled))
+				ap_cipher = Ndis802_11Encryption4Enabled;
+			else if ((pBss->WPA.PairCipher == pBss->WPA2.PairCipher) &&
+					 (pBss->WPA.PairCipherAux == pBss->WPA2.PairCipherAux) &&
+					 (pBss->WPA.PairCipherAux == Ndis802_11WEPDisabled))
+				ap_cipher = pBss->WPA.PairCipher;
+		}
+		else if ((pBss->AuthMode == Ndis802_11AuthModeWPA) || 
+				 (pBss->AuthMode == Ndis802_11AuthModeWPA2))
+		{
+			if ((pBss->AuthModeAux == Ndis802_11AuthModeWPA) ||
+				(pBss->AuthModeAux == Ndis802_11AuthModeWPA2))
+				ap_auth_mode = Ndis802_11AuthModeWPA1WPA2;
+			else
+				ap_auth_mode = pBss->AuthMode;
+			
+			if (pBss->WPA.PairCipher != pBss->WPA2.PairCipher)
+				ap_cipher = Ndis802_11Encryption4Enabled;
+			else if ((pBss->WPA.PairCipher == pBss->WPA2.PairCipher) &&
+					 (pBss->WPA.PairCipherAux != pBss->WPA2.PairCipherAux))
+				ap_cipher = Ndis802_11Encryption4Enabled;
+			else if ((pBss->WPA.PairCipher == pBss->WPA2.PairCipher) &&
+					 (pBss->WPA.PairCipherAux == pBss->WPA2.PairCipherAux) &&
+					 (pBss->WPA.PairCipherAux != Ndis802_11WEPDisabled))
+				ap_cipher = Ndis802_11Encryption4Enabled;
+			else if ((pBss->WPA.PairCipher == pBss->WPA2.PairCipher) &&
+					 (pBss->WPA.PairCipherAux == pBss->WPA2.PairCipherAux) &&
+					 (pBss->WPA.PairCipherAux == Ndis802_11WEPDisabled))
+				ap_cipher = pBss->WPA.PairCipher;
+		}
+
+		sprintf(SecurityStr, "%s/%s", GetAuthMode((CHAR)ap_auth_mode), GetEncryptType((CHAR)ap_cipher));		
+	}			
+	else
+	{
+		ap_auth_mode = pBss->AuthMode;
+		ap_cipher = pBss->WepStatus;		
+		if (ap_cipher == Ndis802_11WEPDisabled)
+			sprintf(SecurityStr, "NONE");
+		else if (ap_cipher == Ndis802_11WEPEnabled)
+			sprintf(SecurityStr, "WEP");
+		else
+			sprintf(SecurityStr, "%s/%s", GetAuthMode((CHAR)ap_auth_mode), GetEncryptType((CHAR)ap_cipher));		
+	}
+	
+	sprintf(msg+strlen(msg), "%-23s", SecurityStr);
+
+		/* Rssi*/
+		Rssi = (INT)pBss->Rssi;
+		if (Rssi >= -50)
+			Rssi_Quality = 100;
+		else if (Rssi >= -80)    /* between -50 ~ -80dbm*/
+			Rssi_Quality = (UINT)(24 + ((Rssi + 80) * 26)/10);
+		else if (Rssi >= -90)   /* between -80 ~ -90dbm*/
+			Rssi_Quality = (UINT)(((Rssi + 90) * 26)/10);
+		else    /* < -84 dbm*/
+			Rssi_Quality = 0;
+		sprintf(msg+strlen(msg),"%-9d", Rssi_Quality);
+		
+		/* Wireless Mode*/
+		wireless_mode = NetworkTypeInUseSanity(pBss);
+		if (wireless_mode == Ndis802_11FH ||
+			wireless_mode == Ndis802_11DS)
+			sprintf(msg+strlen(msg),"%-7s", "11b");
+		else if (wireless_mode == Ndis802_11OFDM5)
+			sprintf(msg+strlen(msg),"%-7s", "11a");
+		else if (wireless_mode == Ndis802_11OFDM5_N)
+			sprintf(msg+strlen(msg),"%-7s", "11a/n");
+		else if (wireless_mode == Ndis802_11OFDM24)
+			sprintf(msg+strlen(msg),"%-7s", "11b/g");
+		else if (wireless_mode == Ndis802_11OFDM24_N)
+			sprintf(msg+strlen(msg),"%-7s", "11b/g/n");
+		else
+			sprintf(msg+strlen(msg),"%-7s", "unknow");
+
+		/* Ext Channel*/
+		if (pBss->AddHtInfoLen > 0)
+		{
+			if (pBss->AddHtInfo.AddHtInfo.ExtChanOffset == EXTCHA_ABOVE)
+				sprintf(msg+strlen(msg),"%-7s", " ABOVE");
+			else if (pBss->AddHtInfo.AddHtInfo.ExtChanOffset == EXTCHA_BELOW)
+				sprintf(msg+strlen(msg),"%-7s", " BELOW");
+			else
+				sprintf(msg+strlen(msg),"%-7s", " NONE");
+		}
+		else
+		{
+			sprintf(msg+strlen(msg),"%-7s", " NONE");
+		}
+		
+		/*Network Type		*/
+		if (pBss->BssType == BSS_ADHOC)
+			sprintf(msg+strlen(msg),"%-3s", " Ad");
+		else
+			sprintf(msg+strlen(msg),"%-3s", " In");
+
+        sprintf(msg+strlen(msg),"\n");
+	
+	return;
+}
+
+#if defined (AP_SCAN_SUPPORT) || defined (CONFIG_STA_SUPPORT)
+VOID RTMPIoctlGetSiteSurvey(
+	IN	PRTMP_ADAPTER	pAdapter, 
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq)
+{
+	PSTRING		msg;
+	INT 		i=0;	 
+	INT			WaitCnt;
+	INT 		Status=0;	
+    INT         max_len = LINE_LEN;		
+	PBSS_ENTRY	pBss;
+	UINT32 TotalLen, BufLen = IW_SCAN_MAX_DATA;
+
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+
+	TotalLen = sizeof(CHAR)*((MAX_LEN_OF_BSS_TABLE)*max_len) + 100;
+
+
+	os_alloc_mem(NULL, (PUCHAR *)&msg, TotalLen);
+
+	if (msg == NULL)
+	{   
+		DBGPRINT(RT_DEBUG_TRACE, ("RTMPIoctlGetSiteSurvey - msg memory alloc fail.\n"));
+		return;
+	}
+
+	memset(msg, 0 , TotalLen);
+	sprintf(msg,"%s","\n");
+	sprintf(msg+strlen(msg),"%-4s%-33s%-20s%-23s%-9s%-7s%-7s%-3s\n",
+	    "Ch", "SSID", "BSSID", "Security", "Siganl(%)", "W-Mode", " ExtCH"," NT");	
+	
+
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+
+	WaitCnt = 0;
+#ifdef CONFIG_STA_SUPPORT
+	pAdapter->StaCfg.bScanReqIsFromWebUI = TRUE;
+#endif /* CONFIG_STA_SUPPORT */
+	while ((ScanRunning(pAdapter) == TRUE) && (WaitCnt++ < 200))
+		OS_WAIT(500);	
+
+	for(i=0; i<pAdapter->ScanTab.BssNr ;i++)
+	{
+		pBss = &pAdapter->ScanTab.BssEntry[i];
+		
+		if( pBss->Channel==0)
+			break;
+
+		if((strlen(msg)+100 ) >= BufLen)
+			break;
+
+
+		RTMPCommSiteSurveyData(msg, pBss, TotalLen);
+		
+
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+	}
+
+#ifdef CONFIG_STA_SUPPORT
+	pAdapter->StaCfg.bScanReqIsFromWebUI = FALSE;
+#endif /* CONFIG_STA_SUPPORT */
+	wrq->u.data.length = strlen(msg);
+	Status = copy_to_user(wrq->u.data.pointer, msg, wrq->u.data.length);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("RTMPIoctlGetSiteSurvey - wrq->u.data.length = %d\n", wrq->u.data.length));
+	os_free_mem(NULL, (PUCHAR)msg);	
+}
+#endif
+
+
+
+
+#define	MAC_LINE_LEN	(1+14+4+4+4+4+10+10+10+6+6+1)	/* "\n"+Addr+AP+aid+psm+AUTH+datatime+rxbyte+txbyte+current tx rate+last tx rate+"\n" */
+VOID RTMPIoctlGetMacTable(
+	IN PRTMP_ADAPTER pAd, 
+	IN RTMP_IOCTL_INPUT_STRUCT *wrq)
+{
+	INT i;
+/*	RT_802_11_MAC_TABLE MacTab;*/
+	RT_802_11_MAC_TABLE *pMacTab = NULL;
+	char *msg;
+
+	/* allocate memory */
+	os_alloc_mem(NULL, (UCHAR **)&pMacTab, sizeof(RT_802_11_MAC_TABLE));
+	if (pMacTab == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+		return;
+	}
+
+	pMacTab->Num = 0;
+	for (i=0; i<MAX_LEN_OF_MAC_TABLE; i++)
+	{
+		if (IS_ENTRY_CLIENT(&pAd->MacTab.Content[i]) && (pAd->MacTab.Content[i].Sst == SST_ASSOC))
+		{
+			pMacTab->Entry[pMacTab->Num].ApIdx = (UCHAR)pAd->MacTab.Content[i].apidx;
+			COPY_MAC_ADDR(pMacTab->Entry[pMacTab->Num].Addr, &pAd->MacTab.Content[i].Addr);
+			pMacTab->Entry[pMacTab->Num].Aid = (UCHAR)pAd->MacTab.Content[i].Aid;
+			pMacTab->Entry[pMacTab->Num].Psm = pAd->MacTab.Content[i].PsMode;
+#ifdef DOT11_N_SUPPORT
+			pMacTab->Entry[pMacTab->Num].MimoPs = pAd->MacTab.Content[i].MmpsMode;
+#endif /* DOT11_N_SUPPORT */
+
+			/* Fill in RSSI per entry*/
+			pMacTab->Entry[pMacTab->Num].AvgRssi0 = pAd->MacTab.Content[i].RssiSample.AvgRssi0;
+			pMacTab->Entry[pMacTab->Num].AvgRssi1 = pAd->MacTab.Content[i].RssiSample.AvgRssi1;
+			pMacTab->Entry[pMacTab->Num].AvgRssi2 = pAd->MacTab.Content[i].RssiSample.AvgRssi2;
+
+			/* the connected time per entry*/
+			pMacTab->Entry[pMacTab->Num].ConnectedTime = pAd->MacTab.Content[i].StaConnectTime;
+			pMacTab->Entry[pMacTab->Num].TxRate.field.MCS = pAd->MacTab.Content[i].HTPhyMode.field.MCS;
+			pMacTab->Entry[pMacTab->Num].TxRate.field.BW = pAd->MacTab.Content[i].HTPhyMode.field.BW;
+			pMacTab->Entry[pMacTab->Num].TxRate.field.ShortGI = pAd->MacTab.Content[i].HTPhyMode.field.ShortGI;
+			pMacTab->Entry[pMacTab->Num].TxRate.field.STBC = pAd->MacTab.Content[i].HTPhyMode.field.STBC;
+			pMacTab->Entry[pMacTab->Num].TxRate.field.rsv = pAd->MacTab.Content[i].HTPhyMode.field.rsv;
+			pMacTab->Entry[pMacTab->Num].TxRate.field.MODE = pAd->MacTab.Content[i].HTPhyMode.field.MODE;
+			pMacTab->Entry[pMacTab->Num].TxRate.word = pAd->MacTab.Content[i].HTPhyMode.word;
+									
+									
+			pMacTab->Num += 1;
+		}
+	}
+
+	wrq->u.data.length = sizeof(RT_802_11_MAC_TABLE);
+	if (copy_to_user(wrq->u.data.pointer, pMacTab, wrq->u.data.length))
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("%s: copy_to_user() fail\n", __FUNCTION__));
+	}
+
+
+/*	msg = kmalloc(sizeof(CHAR)*(MAX_LEN_OF_MAC_TABLE*MAC_LINE_LEN), MEM_ALLOC_FLAG);*/
+	os_alloc_mem(NULL, (UCHAR **)&msg, sizeof(CHAR)*(MAX_LEN_OF_MAC_TABLE*MAC_LINE_LEN));
+	if (msg == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s():Alloc memory failed\n", __FUNCTION__));
+		goto LabelOK;
+	}
+	memset(msg, 0 ,MAX_LEN_OF_MAC_TABLE*MAC_LINE_LEN );
+	sprintf(msg,"%s","\n");
+	sprintf(msg+strlen(msg),"%-14s%-4s%-4s%-4s%-4s%-6s%-6s%-10s%-10s%-10s\n",
+		"MAC", "AP",  "AID", "PSM", "AUTH", "CTxR", "LTxR","LDT", "RxB", "TxB");
+	
+	for (i=0; i<MAX_LEN_OF_MAC_TABLE; i++)
+	{
+		PMAC_TABLE_ENTRY pEntry = &pAd->MacTab.Content[i];
+		if (IS_ENTRY_CLIENT(pEntry) && (pEntry->Sst == SST_ASSOC))
+		{
+			if((strlen(msg)+MAC_LINE_LEN ) >= (MAX_LEN_OF_MAC_TABLE*MAC_LINE_LEN) )
+				break;	
+			sprintf(msg+strlen(msg),"%02x%02x%02x%02x%02x%02x  ",
+				pEntry->Addr[0], pEntry->Addr[1], pEntry->Addr[2],
+				pEntry->Addr[3], pEntry->Addr[4], pEntry->Addr[5]);
+			sprintf(msg+strlen(msg),"%-4d", (int)pEntry->apidx);
+			sprintf(msg+strlen(msg),"%-4d", (int)pEntry->Aid);
+			sprintf(msg+strlen(msg),"%-4d", (int)pEntry->PsMode);
+			sprintf(msg+strlen(msg),"%-4d", (int)pEntry->AuthState);
+			sprintf(msg+strlen(msg),"%-6d",RateIdToMbps[pAd->MacTab.Content[i].CurrTxRate]);
+			sprintf(msg+strlen(msg),"%-6d",0/*RateIdToMbps[pAd->MacTab.Content[i].HTPhyMode.word]*/); /* ToDo*/
+			sprintf(msg+strlen(msg),"%-10d",0/*pAd->MacTab.Content[i].HSCounter.LastDataPacketTime*/); /* ToDo*/
+			sprintf(msg+strlen(msg),"%-10d",0/*pAd->MacTab.Content[i].HSCounter.TotalRxByteCount*/); /* ToDo*/
+			sprintf(msg+strlen(msg),"%-10d\n",0/*pAd->MacTab.Content[i].HSCounter.TotalTxByteCount*/); /* ToDo*/
+
+		}
+	} 
+	/* for compatible with old API just do the printk to console*/
+
+	DBGPRINT(RT_DEBUG_TRACE, ("%s", msg));
+/*	kfree(msg);*/
+	os_free_mem(NULL, msg);
+
+LabelOK:
+	if (pMacTab != NULL)
+		os_free_mem(NULL, pMacTab);
+}
+
+#ifdef INF_AR9
+#ifdef AR9_MAPI_SUPPORT
+#endif/*AR9_MAPI_SUPPORT*/
+#endif/* INF_AR9 */
+
+#ifdef DOT11_N_SUPPORT
+INT	Set_BASetup_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+    UCHAR mac[6], tid;
+	PSTRING token;
+	STRING sepValue[] = ":", DASH = '-';
+	INT i;
+    MAC_TABLE_ENTRY *pEntry;
+
+/*
+	The BASetup inupt string format should be xx:xx:xx:xx:xx:xx-d, 
+		=>The six 2 digit hex-decimal number previous are the Mac address, 
+		=>The seventh decimal number is the tid value.
+*/
+	/*DBGPRINT(RT_DEBUG_TRACE,("\n%s\n", arg));*/
+	
+	if(strlen(arg) < 19)  /*Mac address acceptable format 01:02:03:04:05:06 length 17 plus the "-" and tid value in decimal format.*/
+		return FALSE;
+
+	token = strchr(arg, DASH);
+	if ((token != NULL) && (strlen(token)>1))
+	{
+		tid = (UCHAR) simple_strtol((token+1), 0, 10);
+		/* tid is 0 ~ 7; Or kernel will crash in BAOriSessionSetUp() */
+		if (tid > (NUM_OF_TID-1))
+			return FALSE;
+		
+		*token = '\0';
+		for (i = 0, token = rstrtok(arg, &sepValue[0]); token; token = rstrtok(NULL, &sepValue[0]), i++)
+		{
+			if((strlen(token) != 2) || (!isxdigit(*token)) || (!isxdigit(*(token+1))))
+				return FALSE;
+			AtoH(token, (&mac[i]), 1);
+		}
+		if(i != 6)
+			return FALSE;
+
+		DBGPRINT(RT_DEBUG_OFF, ("\n%02x:%02x:%02x:%02x:%02x:%02x-%02x\n", 
+								mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], tid));
+
+	    pEntry = MacTableLookup(pAd, (PUCHAR) mac);
+
+    	if (pEntry) {
+        	DBGPRINT(RT_DEBUG_OFF, ("\nSetup BA Session: Tid = %d\n", tid));
+	        BAOriSessionSetUp(pAd, pEntry, tid, 0, 100, TRUE);
+    	}
+
+		return TRUE;
+	}
+
+	return FALSE;
+
+}
+
+INT	Set_BADecline_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	ULONG bBADecline;
+
+	bBADecline = simple_strtol(arg, 0, 10);
+
+	if (bBADecline == 0)
+	{
+		pAd->CommonCfg.bBADecline = FALSE;
+	}
+	else if (bBADecline == 1)
+	{
+		pAd->CommonCfg.bBADecline = TRUE;
+	}
+	else 
+	{
+		return FALSE; /*Invalid argument*/
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_BADecline_Proc::(BADecline=%d)\n", pAd->CommonCfg.bBADecline));
+
+	return TRUE;
+}
+
+INT	Set_BAOriTearDown_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+    UCHAR mac[6], tid;
+	PSTRING token;
+	STRING sepValue[] = ":", DASH = '-';
+	INT i;
+    MAC_TABLE_ENTRY *pEntry;
+
+    /*DBGPRINT(RT_DEBUG_TRACE,("\n%s\n", arg));*/
+/*
+	The BAOriTearDown inupt string format should be xx:xx:xx:xx:xx:xx-d, 
+		=>The six 2 digit hex-decimal number previous are the Mac address, 
+		=>The seventh decimal number is the tid value.
+*/
+    if(strlen(arg) < 19)  /*Mac address acceptable format 01:02:03:04:05:06 length 17 plus the "-" and tid value in decimal format.*/
+		return FALSE;
+
+	token = strchr(arg, DASH);
+	if ((token != NULL) && (strlen(token)>1))
+	{
+		tid = simple_strtol((token+1), 0, 10);
+		/* tid will be 0 ~ 7; Or kernel will crash in BAOriSessionTearDown() */
+		if (tid > (NUM_OF_TID-1))
+			return FALSE;
+		
+		*token = '\0';
+		for (i = 0, token = rstrtok(arg, &sepValue[0]); token; token = rstrtok(NULL, &sepValue[0]), i++)
+		{
+			if((strlen(token) != 2) || (!isxdigit(*token)) || (!isxdigit(*(token+1))))
+				return FALSE;
+			AtoH(token, (&mac[i]), 1);
+		}
+		if(i != 6)
+			return FALSE;
+
+	    DBGPRINT(RT_DEBUG_OFF, ("\n%02x:%02x:%02x:%02x:%02x:%02x-%02x", 
+								mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], tid));
+
+	    pEntry = MacTableLookup(pAd, (PUCHAR) mac);
+
+	    if (pEntry) {
+	        DBGPRINT(RT_DEBUG_OFF, ("\nTear down Ori BA Session: Tid = %d\n", tid));
+	        BAOriSessionTearDown(pAd, pEntry->Aid, tid, FALSE, TRUE);
+	    }
+
+		return TRUE;
+	}
+
+	return FALSE;
+
+}
+
+INT	Set_BARecTearDown_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+    UCHAR mac[6], tid;
+	PSTRING token;
+	STRING sepValue[] = ":", DASH = '-';
+	INT i;
+    MAC_TABLE_ENTRY *pEntry;
+
+    /*DBGPRINT(RT_DEBUG_TRACE,("\n%s\n", arg));*/
+/*
+	The BARecTearDown inupt string format should be xx:xx:xx:xx:xx:xx-d, 
+		=>The six 2 digit hex-decimal number previous are the Mac address, 
+		=>The seventh decimal number is the tid value.
+*/
+    if(strlen(arg) < 19)  /*Mac address acceptable format 01:02:03:04:05:06 length 17 plus the "-" and tid value in decimal format.*/
+		return FALSE;
+
+	token = strchr(arg, DASH);
+	if ((token != NULL) && (strlen(token)>1))
+	{
+		tid = simple_strtol((token+1), 0, 10);
+		/* tid will be 0 ~ 7; Or kernel will crash in BARecSessionTearDown() */
+		if (tid > (NUM_OF_TID-1))
+			return FALSE;
+		
+		*token = '\0';
+		for (i = 0, token = rstrtok(arg, &sepValue[0]); token; token = rstrtok(NULL, &sepValue[0]), i++)
+		{
+			if((strlen(token) != 2) || (!isxdigit(*token)) || (!isxdigit(*(token+1))))
+				return FALSE;
+			AtoH(token, (&mac[i]), 1);
+		}
+		if(i != 6)
+			return FALSE;
+
+		DBGPRINT(RT_DEBUG_OFF, ("\n%02x:%02x:%02x:%02x:%02x:%02x-%02x", 
+								mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], tid));
+
+		pEntry = MacTableLookup(pAd, (PUCHAR) mac);
+
+		if (pEntry) {
+		    DBGPRINT(RT_DEBUG_OFF, ("\nTear down Rec BA Session: Tid = %d\n", tid));
+		    BARecSessionTearDown(pAd, pEntry->Aid, tid, FALSE);
+		}
+
+		return TRUE;
+	}
+
+	return FALSE;
+
+}
+
+INT	Set_HtBw_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	ULONG HtBw;
+
+	HtBw = simple_strtol(arg, 0, 10);
+	if (HtBw == BW_40)
+		pAd->CommonCfg.RegTransmitSetting.field.BW  = BW_40;
+	else if (HtBw == BW_20)
+		pAd->CommonCfg.RegTransmitSetting.field.BW  = BW_20;
+	else
+		return FALSE;  /*Invalid argument */
+
+	SetCommonHT(pAd);
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_HtBw_Proc::(HtBw=%d)\n", pAd->CommonCfg.RegTransmitSetting.field.BW));
+
+	return TRUE;
+}
+
+INT	Set_HtMcs_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	ULONG HtMcs, Mcs_tmp, ValidMcs = 15;
+#ifdef CONFIG_STA_SUPPORT    
+    BOOLEAN bAutoRate = FALSE;
+#endif /* CONFIG_STA_SUPPORT */
+
+
+	Mcs_tmp = simple_strtol(arg, 0, 10);
+		
+	if (Mcs_tmp <= ValidMcs || Mcs_tmp == 32)			
+		HtMcs = Mcs_tmp;	
+	else
+		HtMcs = MCS_AUTO;	
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		pAd->StaCfg.DesiredTransmitSetting.field.MCS = HtMcs;
+		pAd->StaCfg.bAutoTxRateSwitch = (HtMcs == MCS_AUTO) ? TRUE:FALSE;
+		DBGPRINT(RT_DEBUG_TRACE, ("Set_HtMcs_Proc::(HtMcs=%d, bAutoTxRateSwitch = %d)\n", 
+						pAd->StaCfg.DesiredTransmitSetting.field.MCS, pAd->StaCfg.bAutoTxRateSwitch));
+
+		if ((pAd->CommonCfg.PhyMode < PHY_11ABGN_MIXED) ||
+			(pAd->MacTab.Content[BSSID_WCID].HTPhyMode.field.MODE < MODE_HTMIX))
+		{
+			if ((pAd->StaCfg.DesiredTransmitSetting.field.MCS != MCS_AUTO) && 
+				(HtMcs <= 3) && 
+	            (pAd->StaCfg.DesiredTransmitSetting.field.FixedTxMode == FIXED_TXMODE_CCK))
+			{
+				RTMPSetDesiredRates(pAd, (LONG) (RateIdToMbps[HtMcs] * 1000000));
+			}
+			else if ((pAd->StaCfg.DesiredTransmitSetting.field.MCS != MCS_AUTO) && 
+					(HtMcs <= 7) &&
+	            	(pAd->StaCfg.DesiredTransmitSetting.field.FixedTxMode == FIXED_TXMODE_OFDM))
+			{
+				RTMPSetDesiredRates(pAd, (LONG) (RateIdToMbps[HtMcs+4] * 1000000));
+			}
+			else
+				bAutoRate = TRUE;
+
+			if (bAutoRate)
+			{
+	            pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
+				RTMPSetDesiredRates(pAd, -1);
+			}
+	        DBGPRINT(RT_DEBUG_TRACE, ("Set_HtMcs_Proc::(FixedTxMode=%d)\n",pAd->StaCfg.DesiredTransmitSetting.field.FixedTxMode));
+		}
+        if (ADHOC_ON(pAd))
+            return TRUE;
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	SetCommonHT(pAd);
+	
+	return TRUE;
+}
+
+INT	Set_HtGi_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	ULONG HtGi;
+
+	HtGi = simple_strtol(arg, 0, 10);
+		
+	if ( HtGi == GI_400)			
+		pAd->CommonCfg.RegTransmitSetting.field.ShortGI = GI_400;
+	else if ( HtGi == GI_800 )
+		pAd->CommonCfg.RegTransmitSetting.field.ShortGI = GI_800;
+	else 
+		return FALSE; /*Invalid argument 	*/
+
+	SetCommonHT(pAd);
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_HtGi_Proc::(ShortGI=%d)\n",pAd->CommonCfg.RegTransmitSetting.field.ShortGI));
+
+	return TRUE;
+}
+
+
+INT	Set_HtTxBASize_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	UCHAR Size;
+
+	Size = simple_strtol(arg, 0, 10);
+		
+	if (Size <=0 || Size >=64)
+	{
+		Size = 8;
+	}
+	pAd->CommonCfg.TxBASize = Size-1;
+	DBGPRINT(RT_DEBUG_ERROR, ("Set_HtTxBASize ::(TxBASize= %d)\n", Size));
+
+	return TRUE;
+}
+
+INT	Set_HtDisallowTKIP_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	ULONG Value;
+
+	Value = simple_strtol(arg, 0, 10);
+		
+	if (Value == 1)
+	{
+		pAd->CommonCfg.HT_DisallowTKIP = TRUE;
+	}
+	else
+	{
+		pAd->CommonCfg.HT_DisallowTKIP = FALSE;
+	}
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_HtDisallowTKIP_Proc ::%s\n", 
+				(pAd->CommonCfg.HT_DisallowTKIP == TRUE) ? "enabled" : "disabled"));
+
+	return TRUE;
+}
+
+INT	Set_HtOpMode_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+
+	ULONG Value;
+	
+	Value = simple_strtol(arg, 0, 10);
+
+	if (Value == HTMODE_GF)
+		pAd->CommonCfg.RegTransmitSetting.field.HTMODE  = HTMODE_GF;
+	else if ( Value == HTMODE_MM )
+		pAd->CommonCfg.RegTransmitSetting.field.HTMODE  = HTMODE_MM;
+	else 
+		return FALSE; /*Invalid argument 	*/
+
+	SetCommonHT(pAd);
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_HtOpMode_Proc::(HtOpMode=%d)\n",pAd->CommonCfg.RegTransmitSetting.field.HTMODE));
+
+	return TRUE;
+
+}	
+
+INT	Set_HtStbc_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+
+	ULONG Value;
+	
+	Value = simple_strtol(arg, 0, 10);
+	
+	if (Value == STBC_USE)
+		pAd->CommonCfg.RegTransmitSetting.field.STBC = STBC_USE;
+	else if ( Value == STBC_NONE )
+		pAd->CommonCfg.RegTransmitSetting.field.STBC = STBC_NONE;
+	else 
+		return FALSE; /*Invalid argument 	*/
+
+	SetCommonHT(pAd);
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_Stbc_Proc::(HtStbc=%d)\n",pAd->CommonCfg.RegTransmitSetting.field.STBC));
+
+	return TRUE;											
+}
+
+INT	Set_HtHtc_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+
+	ULONG Value;
+	
+	Value = simple_strtol(arg, 0, 10);
+	if (Value == 0)
+		pAd->HTCEnable = FALSE;
+	else if ( Value ==1 )
+        pAd->HTCEnable = TRUE;
+	else 
+		return FALSE; /*Invalid argument 	*/
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_HtHtc_Proc::(HtHtc=%d)\n",pAd->HTCEnable));
+
+	return TRUE;		
+}
+			
+INT	Set_HtExtcha_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+
+	ULONG Value;
+	
+	Value = simple_strtol(arg, 0, 10);
+	
+	if (Value == 0)
+		pAd->CommonCfg.RegTransmitSetting.field.EXTCHA  = EXTCHA_BELOW;
+	else if ( Value ==1 )
+        pAd->CommonCfg.RegTransmitSetting.field.EXTCHA = EXTCHA_ABOVE;
+	else 
+		return FALSE; /*Invalid argument 	*/
+	
+	SetCommonHT(pAd);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_HtExtcha_Proc::(HtExtcha=%d)\n",pAd->CommonCfg.RegTransmitSetting.field.EXTCHA));
+
+	return TRUE;			
+}
+
+INT	Set_HtMpduDensity_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	ULONG Value;
+	
+	Value = simple_strtol(arg, 0, 10);
+	
+	if (Value <=7)
+		pAd->CommonCfg.BACapability.field.MpduDensity = Value;
+	else
+		pAd->CommonCfg.BACapability.field.MpduDensity = 4;
+
+	SetCommonHT(pAd);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_HtMpduDensity_Proc::(HtMpduDensity=%d)\n",pAd->CommonCfg.BACapability.field.MpduDensity));
+
+	return TRUE;																																	
+}
+
+INT	Set_HtBaWinSize_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	ULONG Value;
+	
+	Value = simple_strtol(arg, 0, 10);
+
+
+	if (Value >=1 && Value <= 64)
+	{
+		pAd->CommonCfg.REGBACapability.field.RxBAWinLimit = Value;
+		pAd->CommonCfg.BACapability.field.RxBAWinLimit = Value;
+	}
+	else
+	{
+        pAd->CommonCfg.REGBACapability.field.RxBAWinLimit = 64;
+		pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64;
+	}
+	
+	SetCommonHT(pAd);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_HtBaWinSize_Proc::(HtBaWinSize=%d)\n",pAd->CommonCfg.BACapability.field.RxBAWinLimit));
+
+	return TRUE;																																	
+}		
+
+INT	Set_HtRdg_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	ULONG Value;
+	
+	Value = simple_strtol(arg, 0, 10);
+	
+	if (Value == 0)			
+		pAd->CommonCfg.bRdg = FALSE;
+	else if ( Value ==1 )
+	{
+		pAd->HTCEnable = TRUE;
+        pAd->CommonCfg.bRdg = TRUE;
+	}
+	else 
+		return FALSE; /*Invalid argument*/
+	
+	SetCommonHT(pAd);	
+		
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_HtRdg_Proc::(HtRdg=%d)\n",pAd->CommonCfg.bRdg));
+
+	return TRUE;																																	
+}		
+
+INT	Set_HtLinkAdapt_Proc(																																																																																																																																																																																																																																																																																																																			
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	ULONG Value;
+	
+	Value = simple_strtol(arg, 0, 10);
+	if (Value == 0)
+		pAd->bLinkAdapt = FALSE;
+	else if ( Value ==1 )
+	{
+			pAd->HTCEnable = TRUE;
+			pAd->bLinkAdapt = TRUE;
+	}
+	else
+		return FALSE; /*Invalid argument*/
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_HtLinkAdapt_Proc::(HtLinkAdapt=%d)\n",pAd->bLinkAdapt));
+
+	return TRUE;																																	
+}		
+
+INT	Set_HtAmsdu_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	ULONG Value;
+	
+	Value = simple_strtol(arg, 0, 10);
+	if (Value == 0)
+		pAd->CommonCfg.BACapability.field.AmsduEnable = FALSE;
+	else if ( Value == 1 )
+        pAd->CommonCfg.BACapability.field.AmsduEnable = TRUE;
+	else
+		return FALSE; /*Invalid argument*/
+	
+	SetCommonHT(pAd);	
+		
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_HtAmsdu_Proc::(HtAmsdu=%d)\n",pAd->CommonCfg.BACapability.field.AmsduEnable));
+
+	return TRUE;																																	
+}			
+
+INT	Set_HtAutoBa_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	ULONG Value;
+	
+	Value = simple_strtol(arg, 0, 10);
+	if (Value == 0)
+	{
+		pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
+		pAd->CommonCfg.BACapability.field.Policy = BA_NOTUSE;
+	}
+    else if (Value == 1)	
+    {
+		pAd->CommonCfg.BACapability.field.AutoBA = TRUE;
+		pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
+    }
+	else
+		return FALSE; /*Invalid argument*/
+	
+    pAd->CommonCfg.REGBACapability.field.AutoBA = pAd->CommonCfg.BACapability.field.AutoBA;
+	pAd->CommonCfg.REGBACapability.field.Policy = pAd->CommonCfg.BACapability.field.Policy;
+	SetCommonHT(pAd);	
+		
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_HtAutoBa_Proc::(HtAutoBa=%d)\n",pAd->CommonCfg.BACapability.field.AutoBA));
+
+	return TRUE;				
+		
+}		
+																																																																																																																																																																																																																																																																																																																																																																																																																																																																																																																																																																																																																																						
+INT	Set_HtProtect_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	ULONG Value;
+
+	Value = simple_strtol(arg, 0, 10);
+	if (Value == 0)
+		pAd->CommonCfg.bHTProtect = FALSE;
+    else if (Value == 1)	
+		pAd->CommonCfg.bHTProtect = TRUE;
+	else
+		return FALSE; /*Invalid argument*/
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_HtProtect_Proc::(HtProtect=%d)\n",pAd->CommonCfg.bHTProtect));
+
+	return TRUE;
+}
+
+INT	Set_SendPSMPAction_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+    UCHAR mac[6], mode;
+	PSTRING token;
+	STRING sepValue[] = ":", DASH = '-';
+	INT i;
+    MAC_TABLE_ENTRY *pEntry;
+
+    /*DBGPRINT(RT_DEBUG_TRACE,("\n%s\n", arg));*/
+/*
+	The BARecTearDown inupt string format should be xx:xx:xx:xx:xx:xx-d, 
+		=>The six 2 digit hex-decimal number previous are the Mac address, 
+		=>The seventh decimal number is the mode value.
+*/
+    if(strlen(arg) < 19)  /*Mac address acceptable format 01:02:03:04:05:06 length 17 plus the "-" and mode value in decimal format.*/
+		return FALSE;
+
+   	token = strchr(arg, DASH);
+	if ((token != NULL) && (strlen(token)>1))
+	{
+		mode = simple_strtol((token+1), 0, 10);
+		if (mode > MMPS_ENABLE)
+			return FALSE;
+		
+		*token = '\0';
+		for (i = 0, token = rstrtok(arg, &sepValue[0]); token; token = rstrtok(NULL, &sepValue[0]), i++)
+		{
+			if((strlen(token) != 2) || (!isxdigit(*token)) || (!isxdigit(*(token+1))))
+				return FALSE;
+			AtoH(token, (&mac[i]), 1);
+		}
+		if(i != 6)
+			return FALSE;
+
+		DBGPRINT(RT_DEBUG_OFF, ("\n%02x:%02x:%02x:%02x:%02x:%02x-%02x", 
+								mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], mode));
+
+		pEntry = MacTableLookup(pAd, mac);
+
+		if (pEntry) {
+		    DBGPRINT(RT_DEBUG_OFF, ("\nSendPSMPAction MIPS mode = %d\n", mode));
+		    SendPSMPAction(pAd, pEntry->Aid, mode);
+		}
+
+		return TRUE;
+	}
+
+	return FALSE;
+
+
+}
+
+INT	Set_HtMIMOPSmode_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	ULONG Value;
+	
+	Value = simple_strtol(arg, 0, 10);
+	
+	if (Value <=3)
+		pAd->CommonCfg.BACapability.field.MMPSmode = Value;
+	else
+		pAd->CommonCfg.BACapability.field.MMPSmode = 3;
+
+	SetCommonHT(pAd);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_HtMIMOPSmode_Proc::(MIMOPS mode=%d)\n",pAd->CommonCfg.BACapability.field.MMPSmode));
+
+	return TRUE;																																	
+}
+
+
+INT	Set_ForceShortGI_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	ULONG Value;
+
+	Value = simple_strtol(arg, 0, 10);
+	if (Value == 0)
+		pAd->WIFItestbed.bShortGI = FALSE;
+	else if (Value == 1)	
+		pAd->WIFItestbed.bShortGI = TRUE;
+	else
+		return FALSE; /*Invalid argument*/
+
+	SetCommonHT(pAd);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_ForceShortGI_Proc::(ForceShortGI=%d)\n", pAd->WIFItestbed.bShortGI));
+
+	return TRUE;
+}
+
+
+
+INT	Set_ForceGF_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	ULONG Value;
+
+	Value = simple_strtol(arg, 0, 10);
+	if (Value == 0)
+		pAd->WIFItestbed.bGreenField = FALSE;
+	else if (Value == 1)	
+		pAd->WIFItestbed.bGreenField = TRUE;
+	else
+		return FALSE; /*Invalid argument*/
+
+	SetCommonHT(pAd);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_ForceGF_Proc::(ForceGF=%d)\n", pAd->WIFItestbed.bGreenField));
+
+	return TRUE;
+}
+
+INT	Set_HtMimoPs_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	ULONG Value;
+
+	Value = simple_strtol(arg, 0, 10);
+	if (Value == 0)
+		pAd->CommonCfg.bMIMOPSEnable = FALSE;
+	else if (Value == 1)	
+		pAd->CommonCfg.bMIMOPSEnable = TRUE;
+	else
+		return FALSE; /*Invalid argument*/
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_HtMimoPs_Proc::(HtMimoPs=%d)\n",pAd->CommonCfg.bMIMOPSEnable));
+
+	return TRUE;
+}
+
+
+#ifdef DOT11N_DRAFT3
+INT Set_HT_BssCoex_Proc(
+	IN	PRTMP_ADAPTER		pAd,
+	IN	PSTRING				pParam)
+{
+	UCHAR bBssCoexEnable = simple_strtol(pParam, 0, 10);
+
+	pAd->CommonCfg.bBssCoexEnable = ((bBssCoexEnable == 1) ? TRUE: FALSE);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set bBssCoexEnable=%d!\n", pAd->CommonCfg.bBssCoexEnable));
+	
+	return TRUE;
+}
+
+
+INT Set_HT_BssCoexApCntThr_Proc(
+	IN	PRTMP_ADAPTER		pAd,
+	IN	PSTRING				pParam)
+{
+	pAd->CommonCfg.BssCoexApCntThr = simple_strtol(pParam, 0, 10);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set BssCoexApCntThr=%d!\n", pAd->CommonCfg.BssCoexApCntThr));
+	
+	return TRUE;
+}
+#endif /* DOT11N_DRAFT3 */
+
+#endif /* DOT11_N_SUPPORT */
+
+
+INT	Set_FixedTxMode_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	INT	fix_tx_mode = FIXED_TXMODE_HT;
+
+	fix_tx_mode = RT_CfgSetFixedTxPhyMode(arg);
+	
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		pAd->StaCfg.DesiredTransmitSetting.field.FixedTxMode = fix_tx_mode;
+#endif /* CONFIG_STA_SUPPORT */
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_FixedTxMode_Proc::(FixedTxMode=%d)\n", fix_tx_mode));
+
+	return TRUE;
+}
+
+#ifdef CONFIG_APSTA_MIXED_SUPPORT
+INT	Set_OpMode_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	ULONG Value;
+
+	Value = simple_strtol(arg, 0, 10);
+
+#ifdef RTMP_MAC_USB
+	if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_START_UP))
+#endif /* RTMP_MAC_USB */
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("Can not switch operate mode on interface up !! \n"));
+		return FALSE;
+	}
+
+	if (Value == 0)
+		pAd->OpMode = OPMODE_STA;
+	else if (Value == 1)	
+		pAd->OpMode = OPMODE_AP;
+	else
+		return FALSE; /*Invalid argument*/
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_OpMode_Proc::(OpMode=%s)\n", pAd->OpMode == 1 ? "AP Mode" : "STA Mode"));
+
+	return TRUE;
+}
+#endif /* CONFIG_APSTA_MIXED_SUPPORT */
+
+
+
+#if defined(RT305x)||defined(RT3070)
+INT Set_HiPower_Proc(
+    IN  PRTMP_ADAPTER   pAdapter, 
+    IN  PSTRING          arg)
+{
+	pAdapter->CommonCfg.HighPowerPatchDisabled = !(simple_strtol(arg, 0, 10));
+
+	if (pAdapter->CommonCfg.HighPowerPatchDisabled != 0)
+	{
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAdapter, BBP_R82, 0x62);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAdapter, BBP_R67, 0x20);
+#ifdef RT3070
+		if ((IS_RT3070(pAdapter) && ((pAdapter->MACVersion & 0xffff) < 0x0201)))
+#endif /* RT3070 */
+		RT30xxWriteRFRegister(pAdapter, RF_R27, 0x23); 
+	}
+	return TRUE;
+}
+#endif
+
+INT Set_LongRetryLimit_Proc(
+	IN	PRTMP_ADAPTER	pAdapter, 
+	IN	PSTRING			arg)
+{
+	TX_RTY_CFG_STRUC	tx_rty_cfg;
+	UCHAR				LongRetryLimit = (UCHAR)simple_strtol(arg, 0, 10);
+
+	RTMP_IO_READ32(pAdapter, TX_RTY_CFG, &tx_rty_cfg.word);
+	tx_rty_cfg.field.LongRtyLimit = LongRetryLimit;
+	RTMP_IO_WRITE32(pAdapter, TX_RTY_CFG, tx_rty_cfg.word);
+	DBGPRINT(RT_DEBUG_TRACE, ("IF Set_LongRetryLimit_Proc::(tx_rty_cfg=0x%x)\n", tx_rty_cfg.word));
+	return TRUE;
+}
+
+INT Set_ShortRetryLimit_Proc(
+	IN	PRTMP_ADAPTER	pAdapter, 
+	IN	PSTRING			arg)
+{
+	TX_RTY_CFG_STRUC	tx_rty_cfg;
+	UCHAR				ShortRetryLimit = (UCHAR)simple_strtol(arg, 0, 10);
+
+	RTMP_IO_READ32(pAdapter, TX_RTY_CFG, &tx_rty_cfg.word);
+	tx_rty_cfg.field.ShortRtyLimit = ShortRetryLimit;
+	RTMP_IO_WRITE32(pAdapter, TX_RTY_CFG, tx_rty_cfg.word);	
+	DBGPRINT(RT_DEBUG_TRACE, ("IF Set_ShortRetryLimit_Proc::(tx_rty_cfg=0x%x)\n", tx_rty_cfg.word));
+	return TRUE;
+}
+
+INT Set_AutoFallBack_Proc(
+	IN	PRTMP_ADAPTER	pAdapter, 
+	IN	PSTRING			arg)
+{
+	return RT_CfgSetAutoFallBack(pAdapter, arg);
+}
+
+
+
+PSTRING RTMPGetRalinkAuthModeStr(
+    IN  NDIS_802_11_AUTHENTICATION_MODE authMode)
+{
+	switch(authMode)
+	{
+		case Ndis802_11AuthModeOpen:
+			return "OPEN";
+		case Ndis802_11AuthModeWPAPSK:
+			return "WPAPSK";
+		case Ndis802_11AuthModeShared:
+			return "SHARED";
+		case Ndis802_11AuthModeAutoSwitch:
+			return "WEPAUTO";
+		case Ndis802_11AuthModeWPA:
+			return "WPA";
+		case Ndis802_11AuthModeWPA2:
+			return "WPA2";
+		case Ndis802_11AuthModeWPA2PSK:
+			return "WPA2PSK";
+        case Ndis802_11AuthModeWPA1PSKWPA2PSK:
+			return "WPAPSKWPA2PSK";
+        case Ndis802_11AuthModeWPA1WPA2:
+			return "WPA1WPA2";
+		case Ndis802_11AuthModeWPANone:
+			return "WPANONE";
+		default:
+			return "UNKNOW";
+	}
+}
+
+PSTRING RTMPGetRalinkEncryModeStr(
+    IN  USHORT encryMode)
+{
+	switch(encryMode)
+	{
+		case Ndis802_11WEPDisabled:
+			return "NONE";
+		case Ndis802_11WEPEnabled:
+			return "WEP";        
+		case Ndis802_11Encryption2Enabled:
+			return "TKIP";
+		case Ndis802_11Encryption3Enabled:
+			return "AES";
+        case Ndis802_11Encryption4Enabled:
+			return "TKIPAES";
+		default:
+			return "UNKNOW";
+	}
+}
+
+INT RTMPShowCfgValue(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			pName,
+	IN	PSTRING			pBuf,
+	IN	UINT32			MaxLen)
+{
+	INT	Status = 0;	
+	
+	for (PRTMP_PRIVATE_STA_SHOW_CFG_VALUE_PROC = RTMP_PRIVATE_STA_SHOW_CFG_VALUE_PROC; PRTMP_PRIVATE_STA_SHOW_CFG_VALUE_PROC->name; PRTMP_PRIVATE_STA_SHOW_CFG_VALUE_PROC++)
+	{
+		if (!strcmp(pName, PRTMP_PRIVATE_STA_SHOW_CFG_VALUE_PROC->name)) 
+		{						
+			if(PRTMP_PRIVATE_STA_SHOW_CFG_VALUE_PROC->show_proc(pAd, pBuf, MaxLen))
+				Status = -EINVAL;
+			break;  /*Exit for loop.*/
+		}
+	}
+
+	if(PRTMP_PRIVATE_STA_SHOW_CFG_VALUE_PROC->name == NULL)
+	{
+		snprintf(pBuf, MaxLen, "\n");
+		for (PRTMP_PRIVATE_STA_SHOW_CFG_VALUE_PROC = RTMP_PRIVATE_STA_SHOW_CFG_VALUE_PROC; PRTMP_PRIVATE_STA_SHOW_CFG_VALUE_PROC->name; PRTMP_PRIVATE_STA_SHOW_CFG_VALUE_PROC++)
+		{
+			if ((strlen(pBuf) + strlen(PRTMP_PRIVATE_STA_SHOW_CFG_VALUE_PROC->name)) >= MaxLen)
+				break;
+			sprintf(pBuf, "%s%s\n", pBuf, PRTMP_PRIVATE_STA_SHOW_CFG_VALUE_PROC->name);
+		}
+	}
+	
+	return Status;
+}
+
+INT	Show_SSID_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	UCHAR	ssid_str[33];
+	NdisZeroMemory(&ssid_str[0], 33);
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		NdisMoveMemory(&ssid_str[0], 
+						pAd->CommonCfg.Ssid,
+						pAd->CommonCfg.SsidLen);
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	snprintf(pBuf, BufLen, "\t%s", ssid_str);
+	return 0;
+}
+
+INT	Show_WirelessMode_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	switch(pAd->CommonCfg.PhyMode)
+	{
+		case PHY_11BG_MIXED:
+			snprintf(pBuf, BufLen, "\t11B/G");
+			break;
+		case PHY_11B:
+			snprintf(pBuf, BufLen, "\t11B");
+			break;
+		case PHY_11A:
+			snprintf(pBuf, BufLen, "\t11A");
+			break;
+		case PHY_11ABG_MIXED:
+			snprintf(pBuf, BufLen, "\t11A/B/G");
+			break;
+		case PHY_11G:
+			snprintf(pBuf, BufLen, "\t11G");
+			break;
+#ifdef DOT11_N_SUPPORT
+		case PHY_11ABGN_MIXED:
+			snprintf(pBuf, BufLen, "\t11A/B/G/N");
+			break;
+		case PHY_11N_2_4G:
+			snprintf(pBuf, BufLen, "\t11N only with 2.4G");
+			break;
+		case PHY_11GN_MIXED:
+			snprintf(pBuf, BufLen, "\t11G/N");
+			break;
+		case PHY_11AN_MIXED:
+			snprintf(pBuf, BufLen, "\t11A/N");
+			break;
+		case PHY_11BGN_MIXED:
+			snprintf(pBuf, BufLen, "\t11B/G/N");
+			break;
+		case PHY_11AGN_MIXED:
+			snprintf(pBuf, BufLen, "\t11A/G/N");
+			break;
+		case PHY_11N_5G:
+			snprintf(pBuf, BufLen, "\t11N only with 5G");
+			break;
+#endif /* DOT11_N_SUPPORT */
+		default:
+			snprintf(pBuf, BufLen, "\tUnknow Value(%d)", pAd->CommonCfg.PhyMode);
+			break;
+	}
+	return 0;
+}
+
+
+INT	Show_TxBurst_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	snprintf(pBuf, BufLen, "\t%s", pAd->CommonCfg.bEnableTxBurst ? "TRUE":"FALSE");
+	return 0;
+}
+
+INT	Show_TxPreamble_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	switch(pAd->CommonCfg.TxPreamble)
+	{
+		case Rt802_11PreambleShort:
+			snprintf(pBuf, BufLen, "\tShort");
+			break;
+		case Rt802_11PreambleLong:
+			snprintf(pBuf, BufLen, "\tLong");
+			break;
+		case Rt802_11PreambleAuto:
+			snprintf(pBuf, BufLen, "\tAuto");
+			break;
+		default:
+			snprintf(pBuf, BufLen, "\tUnknown Value(%lu)", pAd->CommonCfg.TxPreamble);
+			break;
+	}
+	
+	return 0;
+}
+
+INT	Show_TxPower_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	snprintf(pBuf, BufLen, "\t%lu", pAd->CommonCfg.TxPowerPercentage);
+	return 0;
+}
+
+INT	Show_Channel_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	snprintf(pBuf, BufLen, "\t%d", pAd->CommonCfg.Channel);
+	return 0;
+}
+
+INT	Show_BGProtection_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	switch(pAd->CommonCfg.UseBGProtection)
+	{
+		case 1: /*Always On*/
+			snprintf(pBuf, BufLen, "\tON");
+			break;
+		case 2: /*Always OFF*/
+			snprintf(pBuf, BufLen, "\tOFF");
+			break;
+		case 0: /*AUTO*/
+			snprintf(pBuf, BufLen, "\tAuto");
+			break;
+		default:
+			snprintf(pBuf, BufLen, "\tUnknow Value(%lu)", pAd->CommonCfg.UseBGProtection);
+			break;
+	}
+	return 0;
+}
+
+INT	Show_RTSThreshold_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	snprintf(pBuf, BufLen, "\t%u", pAd->CommonCfg.RtsThreshold);
+	return 0;
+}
+
+INT	Show_FragThreshold_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	snprintf(pBuf, BufLen, "\t%u", pAd->CommonCfg.FragmentThreshold);
+	return 0;
+}
+
+#ifdef DOT11_N_SUPPORT
+INT	Show_HtBw_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	if (pAd->CommonCfg.RegTransmitSetting.field.BW == BW_40)
+	{
+		snprintf(pBuf, BufLen, "\t40 MHz");
+	}
+	else
+	{
+        snprintf(pBuf, BufLen, "\t20 MHz");
+	}
+	return 0;
+}
+
+INT	Show_HtMcs_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		snprintf(pBuf, BufLen, "\t%u", pAd->StaCfg.DesiredTransmitSetting.field.MCS);
+#endif /* CONFIG_STA_SUPPORT */
+	return 0;
+}
+
+INT	Show_HtGi_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	switch(pAd->CommonCfg.RegTransmitSetting.field.ShortGI)
+	{
+		case GI_400:
+			snprintf(pBuf, BufLen, "\tGI_400");
+			break;
+		case GI_800:
+			snprintf(pBuf, BufLen, "\tGI_800");
+			break;
+		default:
+			snprintf(pBuf, BufLen, "\tUnknow Value(%u)", pAd->CommonCfg.RegTransmitSetting.field.ShortGI);
+			break;
+	}
+	return 0;
+}
+
+INT	Show_HtOpMode_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	switch(pAd->CommonCfg.RegTransmitSetting.field.HTMODE)
+	{
+		case HTMODE_GF:
+			snprintf(pBuf, BufLen, "\tGF");
+			break;
+		case HTMODE_MM:
+			snprintf(pBuf, BufLen, "\tMM");
+			break;
+		default:
+			snprintf(pBuf, BufLen, "\tUnknow Value(%u)", pAd->CommonCfg.RegTransmitSetting.field.HTMODE);
+			break;
+	}
+	return 0;
+}
+
+INT	Show_HtExtcha_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	switch(pAd->CommonCfg.RegTransmitSetting.field.EXTCHA)
+	{
+		case EXTCHA_BELOW:
+			snprintf(pBuf, BufLen, "\tBelow");
+			break;
+		case EXTCHA_ABOVE:
+			snprintf(pBuf, BufLen, "\tAbove");
+			break;
+		default:
+			snprintf(pBuf, BufLen, "\tUnknow Value(%u)", pAd->CommonCfg.RegTransmitSetting.field.EXTCHA);
+			break;
+	}
+	return 0;
+}
+
+
+INT	Show_HtMpduDensity_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	snprintf(pBuf, BufLen, "\t%u", pAd->CommonCfg.BACapability.field.MpduDensity);
+	return 0;
+}
+
+INT	Show_HtBaWinSize_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	snprintf(pBuf, BufLen, "\t%u", pAd->CommonCfg.BACapability.field.RxBAWinLimit);
+	return 0;
+}
+
+INT	Show_HtRdg_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	snprintf(pBuf, BufLen, "\t%s", pAd->CommonCfg.bRdg ? "TRUE":"FALSE");
+	return 0;
+}
+
+INT	Show_HtAmsdu_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	snprintf(pBuf, BufLen, "\t%s", pAd->CommonCfg.BACapability.field.AmsduEnable ? "TRUE":"FALSE");
+	return 0;
+}
+
+INT	Show_HtAutoBa_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	snprintf(pBuf, BufLen, "\t%s", pAd->CommonCfg.BACapability.field.AutoBA ? "TRUE":"FALSE");
+	return 0;
+}
+#endif /* DOT11_N_SUPPORT */
+
+INT	Show_CountryRegion_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	snprintf(pBuf, BufLen, "\t%d", pAd->CommonCfg.CountryRegion);
+	return 0;
+}
+
+INT	Show_CountryRegionABand_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	snprintf(pBuf, BufLen, "\t%d", pAd->CommonCfg.CountryRegionForABand);
+	return 0;
+}
+
+INT	Show_CountryCode_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	snprintf(pBuf, BufLen, "\t%s", pAd->CommonCfg.CountryCode);
+	return 0;
+}
+
+#ifdef AGGREGATION_SUPPORT
+INT	Show_PktAggregate_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	snprintf(pBuf, BufLen, "\t%s", pAd->CommonCfg.bAggregationCapable ? "TRUE":"FALSE");
+	return 0;
+}
+#endif /* AGGREGATION_SUPPORT */
+
+#ifdef WMM_SUPPORT
+INT	Show_WmmCapable_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		snprintf(pBuf, BufLen, "\t%s", pAd->CommonCfg.bWmmCapable ? "TRUE":"FALSE");
+#endif /* CONFIG_STA_SUPPORT */
+	
+	return 0;
+}
+#endif /* WMM_SUPPORT */
+
+INT	Show_IEEE80211H_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	snprintf(pBuf, BufLen, "\t%s", pAd->CommonCfg.bIEEE80211H ? "TRUE":"FALSE");
+	return 0;
+}
+
+#ifdef CONFIG_STA_SUPPORT
+INT	Show_NetworkType_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	switch(pAd->StaCfg.BssType)
+	{
+		case BSS_ADHOC:
+			snprintf(pBuf, BufLen, "\tAdhoc");
+			break;
+		case BSS_INFRA:
+			snprintf(pBuf, BufLen, "\tInfra");
+			break;
+		case BSS_ANY:
+			snprintf(pBuf, BufLen, "\tAny");
+			break;
+		case BSS_MONITOR:
+			snprintf(pBuf, BufLen, "\tMonitor");
+			break;
+		default:
+			sprintf(pBuf, "\tUnknow Value(%d)", pAd->StaCfg.BssType);
+			break;
+	}
+	return 0;
+}
+
+
+INT	Show_WPAPSK_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	if ((pAd->StaCfg.WpaPassPhraseLen >= 8) &&
+		(pAd->StaCfg.WpaPassPhraseLen < 64))
+		snprintf(pBuf, BufLen, "\tWPAPSK = %s", pAd->StaCfg.WpaPassPhrase);
+	else
+	{
+		INT idx;
+		snprintf(pBuf, BufLen, "\tWPAPSK = ");
+		for (idx = 0; idx < 32; idx++)
+			snprintf(pBuf+strlen(pBuf), BufLen-strlen(pBuf), "%02X", pAd->StaCfg.WpaPassPhrase[idx]);	
+	}
+
+	return 0;
+}
+
+INT	Show_AutoReconnect_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	snprintf(pBuf, BufLen, "\tAutoReconnect = %d", pAd->StaCfg.bAutoReconnect);
+	return 0;
+}
+
+#endif /* CONFIG_STA_SUPPORT */
+
+INT	Show_AuthMode_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	NDIS_802_11_AUTHENTICATION_MODE	AuthMode = Ndis802_11AuthModeOpen; 
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		AuthMode = pAd->StaCfg.AuthMode;
+#endif /* CONFIG_STA_SUPPORT */
+
+	if ((AuthMode >= Ndis802_11AuthModeOpen) && 
+		(AuthMode <= Ndis802_11AuthModeWPA1PSKWPA2PSK))
+		snprintf(pBuf, BufLen, "\t%s", RTMPGetRalinkAuthModeStr(AuthMode));
+	else
+		snprintf(pBuf, BufLen, "\tUnknow Value(%d)", AuthMode);
+	
+	return 0;
+}
+
+INT	Show_EncrypType_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	NDIS_802_11_WEP_STATUS	WepStatus = Ndis802_11WEPDisabled;
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		WepStatus = pAd->StaCfg.WepStatus;
+#endif /* CONFIG_STA_SUPPORT */
+
+	if ((WepStatus >= Ndis802_11WEPEnabled) && 
+		(WepStatus <= Ndis802_11Encryption4KeyAbsent))
+		snprintf(pBuf, BufLen, "\t%s", RTMPGetRalinkEncryModeStr(WepStatus));
+	else
+		snprintf(pBuf, BufLen, "\tUnknow Value(%d)", WepStatus);
+	
+	return 0;
+}
+
+INT	Show_DefaultKeyID_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	UCHAR DefaultKeyId = 0;
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		DefaultKeyId = pAd->StaCfg.DefaultKeyId;
+#endif /* CONFIG_STA_SUPPORT */
+
+	snprintf(pBuf, BufLen, "\t%d", DefaultKeyId);
+
+	return 0;
+}
+
+INT	Show_WepKey_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN  INT				KeyIdx,
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	UCHAR   Key[16] = {0}, KeyLength = 0;
+	INT		index = BSS0;
+
+	KeyLength = pAd->SharedKey[index][KeyIdx].KeyLen;
+	NdisMoveMemory(Key, pAd->SharedKey[index][KeyIdx].Key, KeyLength);		
+		
+	/*check key string is ASCII or not*/
+    if (RTMPCheckStrPrintAble((PCHAR)Key, KeyLength))
+        sprintf(pBuf, "\t%s", Key);
+    else
+    {
+        int idx;
+        sprintf(pBuf, "\t");
+        for (idx = 0; idx < KeyLength; idx++)
+            sprintf(pBuf+strlen(pBuf), "%02X", Key[idx]);
+    }
+	return 0;
+}
+
+INT	Show_Key1_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	Show_WepKey_Proc(pAd, 0, pBuf, BufLen);
+	return 0;
+}
+
+INT	Show_Key2_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	Show_WepKey_Proc(pAd, 1, pBuf, BufLen);
+	return 0;
+}
+
+INT	Show_Key3_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	Show_WepKey_Proc(pAd, 2, pBuf, BufLen);
+	return 0;
+}
+
+INT	Show_Key4_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	Show_WepKey_Proc(pAd, 3, pBuf, BufLen);
+	return 0;
+}
+
+INT	Show_PMK_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT	PSTRING			pBuf,
+	IN	ULONG			BufLen)
+{
+	INT 	idx;
+	UCHAR	PMK[32] = {0};
+
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		NdisMoveMemory(PMK, pAd->StaCfg.PMK, 32);
+#endif /* CONFIG_STA_SUPPORT */
+	
+    sprintf(pBuf, "\tPMK = ");
+    for (idx = 0; idx < 32; idx++)
+        sprintf(pBuf+strlen(pBuf), "%02X", PMK[idx]);
+
+	return 0;
+}
+
+
+#ifdef VCORECAL_SUPPORT
+/* 
+    ==========================================================================
+    Description:
+        Set VCO Re-Calibration threshold
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT	Set_VCORecalibrationThreshold_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	ULONG 	Value;	
+		
+	Value = simple_strtol(arg, 0, 10);
+	
+	pAd->CommonCfg.VCORecalibrationThreshold = Value;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_VCORecalibrationThreshold_Proc: Threshold=%d)\n", pAd->CommonCfg.VCORecalibrationThreshold));
+		
+	return TRUE;
+}
+#endif /* VCORECAL_SUPPORT */
+
+
+
+#ifdef APCLI_SUPPORT
+ INT RTMPIoctlConnStatus(
+	IN	PRTMP_ADAPTER	pAd, 
+ 	IN	PSTRING			arg)
+{
+ 
+ 	INT i=0;
+ 	POS_COOKIE pObj;
+ 	UCHAR ifIndex;
+	BOOLEAN bConnect=FALSE;
+ 	
+ 	pObj = (POS_COOKIE) pAd->OS_Cookie;
+ 
+ 
+ 
+ 	DBGPRINT(RT_DEBUG_TRACE, ("==>RTMPIoctlConnStatus\n"));
+ 
+ 	if (pObj->ioctl_if_type != INT_APCLI)
+ 		return FALSE;
+ 
+ 	ifIndex = pObj->ioctl_if;
+ 	
+ 
+ 	printk("=============================================================\n");
+ 	if((pAd->ApCfg.ApCliTab[ifIndex].CtrlCurrState == APCLI_CTRL_CONNECTED)
+ 		&& (pAd->ApCfg.ApCliTab[ifIndex].SsidLen != 0))
+ 	{
+ 		for (i=0; i<MAX_LEN_OF_MAC_TABLE; i++)
+ 		{
+ 			PMAC_TABLE_ENTRY pEntry = &pAd->MacTab.Content[i];
+ 
+ 			if ( IS_ENTRY_APCLI(pEntry)
+				&& (pEntry->Sst == SST_ASSOC)
+				&& (pEntry->PortSecured == WPA_802_1X_PORT_SECURED))
+ 				{
+ 					printk("ApCli%d Connected AP : %02X:%02X:%02X:%02X:%02X:%02X   SSID:%s\n",ifIndex,
+ 						pEntry->Addr[0], pEntry->Addr[1], pEntry->Addr[2],
+ 						pEntry->Addr[3], pEntry->Addr[4], pEntry->Addr[5],
+ 						pAd->ApCfg.ApCliTab[ifIndex].Ssid);
+					bConnect=TRUE;
+ 				}
+ 		}
+
+		if (!bConnect)
+			printk("ApCli%d Connected AP : Disconnect\n",ifIndex);
+ 	}
+ 	else
+ 	{
+ 		printk("ApCli%d Connected AP : Disconnect\n",ifIndex);
+ 	}
+ 	printk("=============================================================\n");
+     	DBGPRINT(RT_DEBUG_TRACE, ("<==RTMPIoctlConnStatus\n"));
+ 	return TRUE;
+}
+#endif/*APCLI_SUPPORT*/
+
+void  getRate(HTTRANSMIT_SETTING HTSetting, ULONG* fLastTxRxRate)
+
+{
+	 INT MCSMappingRateTable[] =
+	{2,  4,   11,  22, /* CCK*/
+	12, 18,   24,  36, 48, 72, 96, 108, /* OFDM*/
+	13, 26,   39,  52,  78, 104, 117, 130, 26,  52,  78, 104, 156, 208, 234, 260, /* 20MHz, 800ns GI, MCS: 0 ~ 15*/
+	39, 78,  117, 156, 234, 312, 351, 390,										  /* 20MHz, 800ns GI, MCS: 16 ~ 23*/
+	27, 54,   81, 108, 162, 216, 243, 270, 54, 108, 162, 216, 324, 432, 486, 540, /* 40MHz, 800ns GI, MCS: 0 ~ 15*/
+	81, 162, 243, 324, 486, 648, 729, 810,										  /* 40MHz, 800ns GI, MCS: 16 ~ 23*/
+	14, 29,   43,  57,  87, 115, 130, 144, 29, 59,   87, 115, 173, 230, 260, 288, /* 20MHz, 400ns GI, MCS: 0 ~ 15*/
+	43, 87,  130, 173, 260, 317, 390, 433,										  /* 20MHz, 400ns GI, MCS: 16 ~ 23*/
+	30, 60,   90, 120, 180, 240, 270, 300, 60, 120, 180, 240, 360, 480, 540, 600, /* 40MHz, 400ns GI, MCS: 0 ~ 15*/
+	90, 180, 270, 360, 540, 720, 810, 900};
+
+	int rate_count = sizeof(MCSMappingRateTable)/sizeof(int);
+	int rate_index = 0;  
+	int value = 0;
+
+#ifdef DOT11_N_SUPPORT
+    if (HTSetting.field.MODE >= MODE_HTMIX)
+    {
+/*    	rate_index = 12 + ((UCHAR)ht_setting.field.BW *16) + ((UCHAR)ht_setting.field.ShortGI *32) + ((UCHAR)ht_setting.field.MCS);*/
+    	rate_index = 12 + ((UCHAR)HTSetting.field.BW *24) + ((UCHAR)HTSetting.field.ShortGI *48) + ((UCHAR)HTSetting.field.MCS);
+    }
+    else 
+#endif /* DOT11_N_SUPPORT */
+    if (HTSetting.field.MODE == MODE_OFDM)                
+    	rate_index = (UCHAR)(HTSetting.field.MCS) + 4;
+    else if (HTSetting.field.MODE == MODE_CCK)   
+    	rate_index = (UCHAR)(HTSetting.field.MCS);
+
+    if (rate_index < 0)
+        rate_index = 0;
+    
+    if (rate_index >= rate_count)
+        rate_index = rate_count-1;
+
+    value = (MCSMappingRateTable[rate_index] * 5)/10;
+	*fLastTxRxRate=(ULONG)value;
+	return;
+}
+
+INT	Set_Antenna_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	ANT_DIVERSITY_TYPE UsedAnt;
+	DBGPRINT(RT_DEBUG_OFF, ("==> Set_Antenna_Proc *******************\n"));
+
+	UsedAnt = simple_strtol(arg, 0, 10);
+#ifdef ANT_DIVERSITY_SUPPORT
+    pAd->CommonCfg.bRxAntDiversity = UsedAnt;
+#endif /* ANT_DIVERSITY_SUPPORT */
+
+	switch (UsedAnt)
+	{
+#ifdef ANT_DIVERSITY_SUPPORT
+		/* 0: Disabe --> set Antenna CON1*/
+		case ANT_DIVERSITY_DISABLE:
+#endif /* ANT_DIVERSITY_SUPPORT */
+		/* 2: Fix in the PHY Antenna CON1*/
+		case ANT_FIX_ANT0:
+			AsicSetRxAnt(pAd, 0);
+			DBGPRINT(RT_DEBUG_OFF, ("<== Set_Antenna_Proc(Fix in Ant CON1), (%d,%d)\n", 
+					pAd->RxAnt.Pair1PrimaryRxAnt, pAd->RxAnt.Pair1SecondaryRxAnt));
+			break;
+#ifdef ANT_DIVERSITY_SUPPORT
+		/* 1: Enable --> HW/SW Antenna diversity*/
+		case ANT_DIVERSITY_ENABLE:
+			if ((pAd->chipCap.FlgIsHwAntennaDiversitySup) && (pAd->chipOps.HwAntEnable)) // HW_ANT_DIV (PPAD)
+			{
+				pAd->chipOps.HwAntEnable(pAd);
+				pAd->CommonCfg.bRxAntDiversity = ANT_HW_DIVERSITY_ENABLE;
+			}	
+			else // SW_ANT_DIV
+			{
+				pAd->RxAnt.EvaluateStableCnt = 0;
+				pAd->CommonCfg.bRxAntDiversity = ANT_SW_DIVERSITY_ENABLE;
+			}
+
+			DBGPRINT(RT_DEBUG_OFF, ("<== Set_Antenna_Proc(Auto Switch Mode), (%d,%d)\n", 
+					pAd->RxAnt.Pair1PrimaryRxAnt, pAd->RxAnt.Pair1SecondaryRxAnt));
+			break;
+#endif /* ANT_DIVERSITY_SUPPORT */
+    	/* 3: Fix in the PHY Antenna CON2*/
+		case ANT_FIX_ANT1:
+			AsicSetRxAnt(pAd, 1);
+			DBGPRINT(RT_DEBUG_OFF, ("<== Set_Antenna_Proc(Fix in Ant CON2), (%d,%d)\n", 
+					pAd->RxAnt.Pair1PrimaryRxAnt, pAd->RxAnt.Pair1SecondaryRxAnt));
+			break;
+#ifdef ANT_DIVERSITY_SUPPORT
+		/* 4: Enable SW Antenna Diversity */
+		case ANT_SW_DIVERSITY_ENABLE:
+			pAd->RxAnt.EvaluateStableCnt = 0;
+			DBGPRINT(RT_DEBUG_OFF, ("<== Set_Antenna_Proc(Auto Switch Mode --> SW), (%d,%d)\n", 
+					pAd->RxAnt.Pair1PrimaryRxAnt, pAd->RxAnt.Pair1SecondaryRxAnt));
+			break;
+		/* 5: Enable HW Antenna Diversity - PPAD */
+		case ANT_HW_DIVERSITY_ENABLE:
+			if ((pAd->chipCap.FlgIsHwAntennaDiversitySup) && (pAd->chipOps.HwAntEnable)) // HW_ANT_DIV (PPAD)
+				pAd->chipOps.HwAntEnable(pAd);
+			DBGPRINT(RT_DEBUG_OFF, ("<== Set_Antenna_Proc(Auto Switch Mode --> HW), (%d,%d)\n", 
+					pAd->RxAnt.Pair1PrimaryRxAnt, pAd->RxAnt.Pair1SecondaryRxAnt));
+			break;
+#endif /* ANT_DIVERSITY_SUPPORT */
+		default:
+			DBGPRINT(RT_DEBUG_ERROR, ("<== Set_Antenna_Proc(N/A cmd: %d), (%d,%d)\n", UsedAnt,
+					pAd->RxAnt.Pair1PrimaryRxAnt, pAd->RxAnt.Pair1SecondaryRxAnt));
+			break;
+	}
+	
+	return TRUE;
+}
+			
+
+#ifdef RT5350
+INT Set_Hw_Antenna_Div_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg)
+{
+	return Set_Antenna_Proc(pAd, arg);	
+}
+#endif // RT5350 //
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_mac_usb.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_mac_usb.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_mac_usb.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_mac_usb.c	2017-09-23 03:42:49.722675968 +0800
@@ -0,0 +1,2113 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifdef RTMP_MAC_USB
+
+
+#include	"rt_config.h"
+
+
+static NDIS_STATUS RTMPAllocUsbBulkBufStruct(
+	IN RTMP_ADAPTER *pAd,
+	IN PURB *ppUrb,
+	IN PVOID *ppXBuffer,
+	IN INT	bufLen,
+	IN ra_dma_addr_t *pDmaAddr,
+	IN PSTRING pBufName)
+{
+	POS_COOKIE pObj = (POS_COOKIE) pAd->OS_Cookie;
+
+	
+	*ppUrb = RTUSB_ALLOC_URB(0);
+	if (*ppUrb == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("<-- ERROR in Alloc urb struct for %s !\n", pBufName));
+		return NDIS_STATUS_RESOURCES;
+	}
+	
+	*ppXBuffer = RTUSB_URB_ALLOC_BUFFER(pObj->pUsb_Dev, bufLen, pDmaAddr);
+	if (*ppXBuffer == NULL) {
+		DBGPRINT(RT_DEBUG_ERROR, ("<-- ERROR in Alloc Bulk buffer for %s!\n", pBufName));
+		return NDIS_STATUS_RESOURCES;
+	}
+	
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static NDIS_STATUS RTMPFreeUsbBulkBufStruct(
+	IN RTMP_ADAPTER *pAd,
+	IN PURB *ppUrb,
+	IN PUCHAR *ppXBuffer,
+	IN INT bufLen,
+	IN ra_dma_addr_t data_dma)
+{
+	POS_COOKIE pObj = (POS_COOKIE) pAd->OS_Cookie;
+	
+	if (NULL != *ppUrb) {
+		RTUSB_UNLINK_URB(*ppUrb);
+		RTUSB_FREE_URB(*ppUrb);
+		*ppUrb = NULL;
+	}
+	
+	if (NULL != *ppXBuffer) {
+		RTUSB_URB_FREE_BUFFER(pObj->pUsb_Dev, bufLen,	*ppXBuffer, data_dma);
+		*ppXBuffer = NULL;
+	}
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+#ifdef RESOURCE_PRE_ALLOC
+VOID RTMPResetTxRxRingMemory(
+	IN RTMP_ADAPTER * pAd)
+{
+	UINT index, i, acidx;
+	PTX_CONTEXT pNullContext   = &pAd->NullContext;
+	PTX_CONTEXT pPsPollContext = &pAd->PsPollContext;
+	unsigned int IrqFlags;
+
+	/* Free TxSwQueue Packet*/
+	for (index = 0; index < NUM_OF_TX_RING; index++)
+	{
+		PQUEUE_ENTRY pEntry;
+		PNDIS_PACKET pPacket;
+		PQUEUE_HEADER pQueue;
+
+		RTMP_IRQ_LOCK(&pAd->irq_lock, IrqFlags);
+		pQueue = &pAd->TxSwQueue[index];
+		while (pQueue->Head)
+		{
+			pEntry = RemoveHeadQueue(pQueue);
+			pPacket = QUEUE_ENTRY_TO_PACKET(pEntry);
+			RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_FAILURE);
+		}
+		 RTMP_IRQ_UNLOCK(&pAd->irq_lock, IrqFlags);
+	}
+
+	/* unlink all urbs for the RECEIVE buffer queue.*/
+	for(i=0; i<(RX_RING_SIZE); i++)
+	{
+		PRX_CONTEXT  pRxContext = &(pAd->RxContext[i]);
+		if (pRxContext->pUrb)
+			RTUSB_UNLINK_URB(pRxContext->pUrb);
+	}
+
+	/* unlink PsPoll urb resource*/
+	if (pPsPollContext && pPsPollContext->pUrb)
+		RTUSB_UNLINK_URB(pPsPollContext->pUrb);
+
+	/* Free NULL frame urb resource*/
+	if (pNullContext && pNullContext->pUrb)
+		RTUSB_UNLINK_URB(pNullContext->pUrb);
+
+
+	/* Free mgmt frame resource*/
+	for(i = 0; i < MGMT_RING_SIZE; i++)
+	{
+		PTX_CONTEXT pMLMEContext = (PTX_CONTEXT)pAd->MgmtRing.Cell[i].AllocVa;
+		if (pMLMEContext)
+		{
+			if (NULL != pMLMEContext->pUrb)
+			{
+				RTUSB_UNLINK_URB(pMLMEContext->pUrb);
+				RTUSB_FREE_URB(pMLMEContext->pUrb);
+				pMLMEContext->pUrb = NULL;
+			}
+		}
+		
+		if (NULL != pAd->MgmtRing.Cell[i].pNdisPacket) 
+		{
+			RTMPFreeNdisPacket(pAd, pAd->MgmtRing.Cell[i].pNdisPacket);
+			pAd->MgmtRing.Cell[i].pNdisPacket = NULL;
+			if (pMLMEContext)
+				pMLMEContext->TransferBuffer = NULL; 
+		}
+		
+	}
+	
+	
+	/* Free Tx frame resource*/
+	for (acidx = 0; acidx < 4; acidx++)
+	{
+		PHT_TX_CONTEXT pHTTXContext = &(pAd->TxContext[acidx]);
+		if (pHTTXContext && pHTTXContext->pUrb)
+			RTUSB_UNLINK_URB(pHTTXContext->pUrb);
+	}
+	
+	for(i=0; i<6; i++)
+	{
+		NdisFreeSpinLock(&pAd->BulkOutLock[i]);
+	}
+
+	NdisFreeSpinLock(&pAd->BulkInLock);
+	NdisFreeSpinLock(&pAd->MLMEBulkOutLock);
+
+	NdisFreeSpinLock(&pAd->CmdQLock);
+#ifdef RALINK_ATE
+	NdisFreeSpinLock(&pAd->GenericLock);
+#endif /* RALINK_ATE */
+	/* Clear all pending bulk-out request flags.*/
+	RTUSB_CLEAR_BULK_FLAG(pAd, 0xffffffff);
+	
+	for (i = 0; i < NUM_OF_TX_RING; i++)
+	{
+		NdisFreeSpinLock(&pAd->TxContextQueueLock[i]);
+	}
+	
+/*	NdisFreeSpinLock(&pAd->MacTabLock);*/
+
+/*	for(i=0; i<MAX_LEN_OF_BA_REC_TABLE; i++)*/
+/*	{*/
+/*		NdisFreeSpinLock(&pAd->BATable.BARecEntry[i].RxReRingLock);*/
+/*	}*/
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Calls USB_InterfaceStop and frees memory allocated for the URBs
+    calls NdisMDeregisterDevice and frees the memory
+    allocated in VNetInitialize for the Adapter Object
+
+Arguments:
+	*pAd				the raxx interface data pointer
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID	RTMPFreeTxRxRingMemory(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	UINT                i, acidx;
+	PTX_CONTEXT			pNullContext   = &pAd->NullContext;
+	PTX_CONTEXT			pPsPollContext = &pAd->PsPollContext;
+
+
+	DBGPRINT(RT_DEBUG_ERROR, ("---> RTMPFreeTxRxRingMemory\n"));
+
+	/* Free all resources for the RECEIVE buffer queue.*/
+	for(i=0; i<(RX_RING_SIZE); i++)
+	{
+		PRX_CONTEXT  pRxContext = &(pAd->RxContext[i]);
+		if (pRxContext)
+			RTMPFreeUsbBulkBufStruct(pAd, 
+										&pRxContext->pUrb, 
+										&pRxContext->TransferBuffer, 
+										MAX_RXBULK_SIZE, 
+										pRxContext->data_dma);
+	}
+
+	/* Free PsPoll frame resource*/
+	RTMPFreeUsbBulkBufStruct(pAd, 
+								&pPsPollContext->pUrb, 
+								&pPsPollContext->TransferBuffer, 
+								sizeof(TX_BUFFER), 
+								pPsPollContext->data_dma);
+
+	/* Free NULL frame resource*/
+	RTMPFreeUsbBulkBufStruct(pAd, 
+								&pNullContext->pUrb, 
+								&pNullContext->TransferBuffer, 
+								sizeof(TX_BUFFER), 
+								pNullContext->data_dma);
+
+	/* Free mgmt frame resource*/
+	for(i = 0; i < MGMT_RING_SIZE; i++)
+	{
+		PTX_CONTEXT pMLMEContext = (PTX_CONTEXT)pAd->MgmtRing.Cell[i].AllocVa;
+		if (pMLMEContext)
+		{
+			if (NULL != pMLMEContext->pUrb)
+			{
+				RTUSB_UNLINK_URB(pMLMEContext->pUrb);
+				RTUSB_FREE_URB(pMLMEContext->pUrb);
+				pMLMEContext->pUrb = NULL;
+			}
+		}
+		
+		if (NULL != pAd->MgmtRing.Cell[i].pNdisPacket) 
+		{
+			RTMPFreeNdisPacket(pAd, pAd->MgmtRing.Cell[i].pNdisPacket);
+			pAd->MgmtRing.Cell[i].pNdisPacket = NULL;
+			if (pMLMEContext)
+				pMLMEContext->TransferBuffer = NULL; 
+		}
+	}
+	
+	if (pAd->MgmtDescRing.AllocVa)
+		os_free_mem(pAd, pAd->MgmtDescRing.AllocVa);
+	
+	
+	/* Free Tx frame resource*/
+	for (acidx = 0; acidx < 4; acidx++)
+	{
+		PHT_TX_CONTEXT pHTTXContext = &(pAd->TxContext[acidx]);
+		if (pHTTXContext)
+			RTMPFreeUsbBulkBufStruct(pAd, 
+										&pHTTXContext->pUrb, 
+										&pHTTXContext->TransferBuffer, 
+										sizeof(HTTX_BUFFER), 
+										pHTTXContext->data_dma);
+	}
+	
+	if (pAd->FragFrame.pFragPacket)
+		RELEASE_NDIS_PACKET(pAd, pAd->FragFrame.pFragPacket, NDIS_STATUS_SUCCESS);
+
+
+	DBGPRINT(RT_DEBUG_ERROR, ("<--- RTMPFreeTxRxRingMemory\n"));
+}
+
+
+/*
+========================================================================
+Routine Description:
+    Initialize receive data structures.
+
+Arguments:
+    pAd					Pointer to our adapter
+
+Return Value:
+	NDIS_STATUS_SUCCESS
+	NDIS_STATUS_RESOURCES
+
+Note:
+	Initialize all receive releated private buffer, include those define
+	in RTMP_ADAPTER structure and all private data structures. The major
+	work is to allocate buffer for each packet and chain buffer to 
+	NDIS packet descriptor.
+========================================================================
+*/
+NDIS_STATUS	NICInitRecv(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	UCHAR				i;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitRecv\n"));
+
+
+	pAd->PendingRx = 0;
+	pAd->NextRxBulkInReadIndex 	= 0;	/* Next Rx Read index*/
+	pAd->NextRxBulkInIndex		= 0 ; /*RX_RING_SIZE -1;  Rx Bulk pointer*/
+	pAd->NextRxBulkInPosition 	= 0;
+
+	for (i = 0; i < (RX_RING_SIZE); i++)
+	{
+		PRX_CONTEXT  pRxContext = &(pAd->RxContext[i]);
+
+		ASSERT((pRxContext->TransferBuffer != NULL));
+		ASSERT((pRxContext->pUrb != NULL));
+		
+		NdisZeroMemory(pRxContext->TransferBuffer, MAX_RXBULK_SIZE);
+
+		pRxContext->pAd	= pAd;
+		pRxContext->pIrp = NULL;
+		pRxContext->InUse = FALSE;
+		pRxContext->IRPPending = FALSE;
+		pRxContext->Readable	= FALSE;
+		pRxContext->bRxHandling = FALSE;
+		pRxContext->BulkInOffset = 0;
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitRecv()\n"));
+	
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+    Initialize transmit data structures.
+
+Arguments:
+    pAd					Pointer to our adapter
+
+Return Value:
+	NDIS_STATUS_SUCCESS
+	NDIS_STATUS_RESOURCES
+
+Note:
+========================================================================
+*/
+NDIS_STATUS	NICInitTransmit(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	UCHAR			i, acidx;
+	NDIS_STATUS     Status = NDIS_STATUS_SUCCESS;
+	PTX_CONTEXT		pNullContext   = &(pAd->NullContext);
+	PTX_CONTEXT		pPsPollContext = &(pAd->PsPollContext);
+	PTX_CONTEXT		pMLMEContext = NULL;
+	PVOID			RingBaseVa;
+	RTMP_MGMT_RING  *pMgmtRing;
+	PVOID pTransferBuffer;
+	PURB	pUrb;
+	ra_dma_addr_t data_dma;
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitTransmit\n"));
+
+
+	/* Init 4 set of Tx parameters*/
+	for(acidx = 0; acidx < NUM_OF_TX_RING; acidx++)
+	{
+		/* Initialize all Transmit releated queues*/
+		InitializeQueueHeader(&pAd->TxSwQueue[acidx]);
+
+		/* Next Local tx ring pointer waiting for buck out*/
+		pAd->NextBulkOutIndex[acidx] = acidx;
+		pAd->BulkOutPending[acidx] = FALSE; /* Buck Out control flag	*/
+	}
+
+
+	do
+	{
+		
+		/* TX_RING_SIZE, 4 ACs*/
+		
+		for(acidx=0; acidx<4; acidx++)
+		{
+			PHT_TX_CONTEXT	pHTTXContext = &(pAd->TxContext[acidx]);
+
+			pTransferBuffer = pHTTXContext->TransferBuffer;
+			pUrb = pHTTXContext->pUrb;
+			data_dma = pHTTXContext->data_dma;
+			
+			ASSERT( (pTransferBuffer != NULL));
+			ASSERT( (pUrb != NULL));
+			
+			NdisZeroMemory(pHTTXContext, sizeof(HT_TX_CONTEXT));
+			pHTTXContext->TransferBuffer = pTransferBuffer;
+			pHTTXContext->pUrb = pUrb;
+			pHTTXContext->data_dma = data_dma;
+			
+			NdisZeroMemory(pHTTXContext->TransferBuffer->Aggregation, 4);			
+			
+			pHTTXContext->pAd = pAd;
+			pHTTXContext->BulkOutPipeId = acidx;
+			pHTTXContext->bRingEmpty = TRUE;
+			pHTTXContext->bCopySavePad = FALSE;
+
+			pAd->BulkOutPending[acidx] = FALSE;
+		}
+
+		
+		
+		/* MGMT_RING_SIZE*/
+		
+		NdisZeroMemory(pAd->MgmtDescRing.AllocVa, pAd->MgmtDescRing.AllocSize);
+		RingBaseVa = pAd->MgmtDescRing.AllocVa;
+
+		/* Initialize MGMT Ring and associated buffer memory*/
+		pMgmtRing = &pAd->MgmtRing;
+		for (i = 0; i < MGMT_RING_SIZE; i++)
+		{
+			/* link the pre-allocated Mgmt buffer to MgmtRing.Cell*/
+			pMgmtRing->Cell[i].AllocSize = sizeof(TX_CONTEXT);
+			pMgmtRing->Cell[i].AllocVa = RingBaseVa;
+			pMgmtRing->Cell[i].pNdisPacket = NULL;
+			pMgmtRing->Cell[i].pNextNdisPacket = NULL;
+
+			/*Allocate URB for MLMEContext*/
+			pMLMEContext = (PTX_CONTEXT) pAd->MgmtRing.Cell[i].AllocVa;
+			pMLMEContext->pUrb = RTUSB_ALLOC_URB(0);
+			if (pMLMEContext->pUrb == NULL)
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("<-- ERROR in Alloc TX MLMEContext[%d] urb!! \n", i));
+				Status = NDIS_STATUS_RESOURCES;
+				goto err; 
+			}
+			pMLMEContext->pAd = pAd;
+			pMLMEContext->SelfIdx = i;
+			
+			/* Offset to next ring descriptor address*/
+			RingBaseVa = (PUCHAR) RingBaseVa + sizeof(TX_CONTEXT);
+		}
+		DBGPRINT(RT_DEBUG_TRACE, ("MGMT Ring: total %d entry allocated\n", i));
+		
+		/*pAd->MgmtRing.TxSwFreeIdx = (MGMT_RING_SIZE - 1);*/
+		pAd->MgmtRing.TxSwFreeIdx = MGMT_RING_SIZE;
+		pAd->MgmtRing.TxCpuIdx = 0;
+		pAd->MgmtRing.TxDmaIdx = 0;
+
+
+		
+		/* NullContext*/
+		
+		pTransferBuffer = pNullContext->TransferBuffer;
+		pUrb = pNullContext->pUrb;
+		data_dma = pNullContext->data_dma;
+		
+		NdisZeroMemory(pNullContext, sizeof(TX_CONTEXT));
+		pNullContext->TransferBuffer = pTransferBuffer;
+		pNullContext->pUrb = pUrb;
+		pNullContext->data_dma = data_dma;
+		pNullContext->pAd = pAd;
+
+
+		
+		/* PsPollContext*/
+		
+		pTransferBuffer = pPsPollContext->TransferBuffer;
+		pUrb = pPsPollContext->pUrb;
+		data_dma = pPsPollContext->data_dma;
+		NdisZeroMemory(pPsPollContext, sizeof(TX_CONTEXT));
+		pPsPollContext->TransferBuffer = pTransferBuffer;
+		pPsPollContext->pUrb = pUrb;
+		pPsPollContext->data_dma = data_dma;
+		pPsPollContext->pAd = pAd;
+		pPsPollContext->LastOne = TRUE;
+
+	}   while (FALSE);
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitTransmit(Status=%d)\n", Status));
+
+	return Status;
+
+	/* --------------------------- ERROR HANDLE --------------------------- */
+err:	
+	if (pAd->MgmtDescRing.AllocVa)
+	{
+		pMgmtRing = &pAd->MgmtRing;
+		for(i = 0; i < MGMT_RING_SIZE; i++)
+		{
+			pMLMEContext = (PTX_CONTEXT) pAd->MgmtRing.Cell[i].AllocVa;
+			if (pMLMEContext)
+				RTMPFreeUsbBulkBufStruct(pAd, 
+											&pMLMEContext->pUrb, 
+											&pMLMEContext->TransferBuffer, 
+											sizeof(TX_BUFFER), 
+											pMLMEContext->data_dma);
+		}
+		os_free_mem(pAd, pAd->MgmtDescRing.AllocVa);
+		pAd->MgmtDescRing.AllocVa = NULL;
+	}
+	
+	/* Here we didn't have any pre-allocated memory need to free.*/
+	
+	return Status;	
+}
+
+
+/*
+========================================================================
+Routine Description:
+    Allocate DMA memory blocks for send, receive.
+
+Arguments:
+    pAd					Pointer to our adapter
+
+Return Value:
+	NDIS_STATUS_SUCCESS
+	NDIS_STATUS_FAILURE
+	NDIS_STATUS_RESOURCES
+
+Note:
+========================================================================
+*/
+NDIS_STATUS	RTMPAllocTxRxRingMemory(
+	IN	PRTMP_ADAPTER	pAd)
+{	
+	NDIS_STATUS Status = NDIS_STATUS_FAILURE;
+	PTX_CONTEXT pNullContext   = &(pAd->NullContext);
+	PTX_CONTEXT pPsPollContext = &(pAd->PsPollContext);
+	INT i, acidx;
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocTxRxRingMemory\n"));
+
+	do
+	{
+		
+		/* Init send data structures and related parameters*/
+		
+
+		
+		/* TX_RING_SIZE, 4 ACs*/
+		
+		for(acidx=0; acidx<4; acidx++)
+		{
+			PHT_TX_CONTEXT	pHTTXContext = &(pAd->TxContext[acidx]);
+
+			NdisZeroMemory(pHTTXContext, sizeof(HT_TX_CONTEXT));
+			/*Allocate URB and bulk buffer*/
+			Status = RTMPAllocUsbBulkBufStruct(pAd, 
+												&pHTTXContext->pUrb, 
+												&pHTTXContext->TransferBuffer, 
+												sizeof(HTTX_BUFFER), 
+												&pHTTXContext->data_dma,
+												"HTTxContext");
+			if (Status != NDIS_STATUS_SUCCESS)
+				goto err;
+		}
+
+
+		
+		/* MGMT_RING_SIZE*/
+		
+		/* Allocate MGMT ring descriptor's memory*/
+		pAd->MgmtDescRing.AllocSize = MGMT_RING_SIZE * sizeof(TX_CONTEXT);
+		os_alloc_mem(pAd, (PUCHAR *)(&pAd->MgmtDescRing.AllocVa), pAd->MgmtDescRing.AllocSize);
+		if (pAd->MgmtDescRing.AllocVa == NULL)
+		{
+			DBGPRINT_ERR(("Failed to allocate a big buffer for MgmtDescRing!\n"));
+			Status = NDIS_STATUS_RESOURCES;
+			goto err;
+		}
+
+
+		
+		/* NullContext*/
+		
+		NdisZeroMemory(pNullContext, sizeof(TX_CONTEXT));
+		/*Allocate URB*/
+		Status = RTMPAllocUsbBulkBufStruct(pAd, 
+											&pNullContext->pUrb, 
+											&pNullContext->TransferBuffer, 
+											sizeof(TX_BUFFER), 
+											&pNullContext->data_dma,
+											"TxNullContext");
+		if (Status != NDIS_STATUS_SUCCESS)
+			goto err;
+
+		
+		/* PsPollContext*/
+		
+		NdisZeroMemory(pPsPollContext, sizeof(TX_CONTEXT));
+		/*Allocate URB*/
+		Status = RTMPAllocUsbBulkBufStruct(pAd, 
+											&pPsPollContext->pUrb, 
+											&pPsPollContext->TransferBuffer, 
+											sizeof(TX_BUFFER), 
+											&pPsPollContext->data_dma,
+											"TxPsPollContext");
+		if (Status != NDIS_STATUS_SUCCESS)
+			goto err;
+
+		
+		
+		/* Init receive data structures and related parameters*/
+		
+		for (i = 0; i < (RX_RING_SIZE); i++)
+		{
+			PRX_CONTEXT  pRxContext = &(pAd->RxContext[i]);
+
+			/*Allocate URB*/
+			Status = RTMPAllocUsbBulkBufStruct(pAd, 
+												&pRxContext->pUrb, 
+												&pRxContext->TransferBuffer, 
+												MAX_RXBULK_SIZE, 
+												&pRxContext->data_dma, 
+												"RxContext");
+			if (Status != NDIS_STATUS_SUCCESS)
+				goto err;
+		
+		}
+
+		NdisZeroMemory(&pAd->FragFrame, sizeof(FRAGMENT_FRAME));
+		pAd->FragFrame.pFragPacket =  RTMP_AllocateFragPacketBuffer(pAd, RX_BUFFER_NORMSIZE);
+
+		if (pAd->FragFrame.pFragPacket == NULL)
+		{
+			Status = NDIS_STATUS_RESOURCES;
+		}
+	} while (FALSE);
+	
+	DBGPRINT_S(Status, ("<-- RTMPAllocTxRxRingMemory, Status=%x\n", Status));
+	return Status;
+
+err:
+	Status = NDIS_STATUS_RESOURCES;
+	RTMPFreeTxRxRingMemory(pAd);
+	
+	return Status;
+}
+
+
+NDIS_STATUS RTMPInitTxRxRingMemory
+	(IN RTMP_ADAPTER *pAd)
+{
+	INT				num;
+	NDIS_STATUS		Status;
+
+	/* Init the CmdQ and CmdQLock*/
+	NdisAllocateSpinLock(pAd, &pAd->CmdQLock);	
+	NdisAcquireSpinLock(&pAd->CmdQLock);
+	RTInitializeCmdQ(&pAd->CmdQ);
+	NdisReleaseSpinLock(&pAd->CmdQLock);
+
+	
+	NdisAllocateSpinLock(pAd, &pAd->MLMEBulkOutLock);
+	NdisAllocateSpinLock(pAd, &pAd->BulkInLock);
+	for(num =0 ; num < 6; num++)
+	{
+		NdisAllocateSpinLock(pAd, &pAd->BulkOutLock[num]);
+	}
+
+
+	for (num = 0; num < NUM_OF_TX_RING; num++)
+	{
+		NdisAllocateSpinLock(pAd, &pAd->TxContextQueueLock[num]);
+	}
+	
+#ifdef RALINK_ATE
+	NdisAllocateSpinLock(pAd, &pAd->GenericLock);
+#endif /* RALINK_ATE */
+
+	NICInitRecv(pAd);
+
+
+	Status = NICInitTransmit(pAd);
+	
+	return Status;
+	
+}
+
+
+#else
+
+/*
+========================================================================
+Routine Description:
+    Initialize receive data structures.
+
+Arguments:
+    pAd					Pointer to our adapter
+
+Return Value:
+	NDIS_STATUS_SUCCESS
+	NDIS_STATUS_RESOURCES
+
+Note:
+	Initialize all receive releated private buffer, include those define
+	in RTMP_ADAPTER structure and all private data structures. The mahor
+	work is to allocate buffer for each packet and chain buffer to 
+	NDIS packet descriptor.
+========================================================================
+*/
+NDIS_STATUS	NICInitRecv(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	UCHAR				i;
+	NDIS_STATUS			Status = NDIS_STATUS_SUCCESS;
+	POS_COOKIE			pObj = (POS_COOKIE) pAd->OS_Cookie;
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitRecv\n"));
+	pObj = pObj;
+
+	/*InterlockedExchange(&pAd->PendingRx, 0);*/
+	pAd->PendingRx = 0;
+	pAd->NextRxBulkInReadIndex 	= 0;	/* Next Rx Read index*/
+	pAd->NextRxBulkInIndex		= 0 ; /*RX_RING_SIZE -1;  Rx Bulk pointer*/
+	pAd->NextRxBulkInPosition 	= 0;
+
+	for (i = 0; i < (RX_RING_SIZE); i++)
+	{
+		PRX_CONTEXT  pRxContext = &(pAd->RxContext[i]);
+
+		/*Allocate URB*/
+		pRxContext->pUrb = RTUSB_ALLOC_URB(0);		
+		if (pRxContext->pUrb == NULL) 
+		{
+			Status = NDIS_STATUS_RESOURCES;
+			goto out1;
+		}
+
+		/* Allocate transfer buffer*/
+		pRxContext->TransferBuffer = RTUSB_URB_ALLOC_BUFFER(pObj->pUsb_Dev, MAX_RXBULK_SIZE, &pRxContext->data_dma);
+		if (pRxContext->TransferBuffer == NULL)
+		{
+			Status = NDIS_STATUS_RESOURCES;
+			goto out1;
+		}
+
+		NdisZeroMemory(pRxContext->TransferBuffer, MAX_RXBULK_SIZE);
+
+		pRxContext->pAd	= pAd;
+		pRxContext->pIrp = NULL;
+		pRxContext->InUse		= FALSE;
+		pRxContext->IRPPending	= FALSE;
+		pRxContext->Readable	= FALSE;
+		/*pRxContext->ReorderInUse = FALSE;*/
+		pRxContext->bRxHandling = FALSE;
+		pRxContext->BulkInOffset = 0;
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitRecv(Status=%d)\n", Status));
+	return Status;
+
+out1:
+	for (i = 0; i < (RX_RING_SIZE); i++)
+	{
+		PRX_CONTEXT  pRxContext = &(pAd->RxContext[i]);
+
+		if (NULL != pRxContext->TransferBuffer)
+		{
+			RTUSB_URB_FREE_BUFFER(pObj->pUsb_Dev, MAX_RXBULK_SIZE, 
+								pRxContext->TransferBuffer, pRxContext->data_dma);
+			pRxContext->TransferBuffer = NULL;
+		}
+
+		if (NULL != pRxContext->pUrb)
+		{
+			RTUSB_UNLINK_URB(pRxContext->pUrb);
+			RTUSB_FREE_URB(pRxContext->pUrb);
+			pRxContext->pUrb = NULL;
+		}
+	}
+	
+	return Status;
+}
+
+
+/*
+========================================================================
+Routine Description:
+    Initialize transmit data structures.
+
+Arguments:
+    pAd					Pointer to our adapter
+
+Return Value:
+	NDIS_STATUS_SUCCESS
+	NDIS_STATUS_RESOURCES
+
+Note:
+========================================================================
+*/
+NDIS_STATUS	NICInitTransmit(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	UCHAR			i, acidx;
+	NDIS_STATUS     Status = NDIS_STATUS_SUCCESS;
+	PTX_CONTEXT		pNullContext   = &(pAd->NullContext);
+	PTX_CONTEXT		pPsPollContext = &(pAd->PsPollContext);
+	PTX_CONTEXT		pMLMEContext = NULL;
+	POS_COOKIE		pObj = (POS_COOKIE) pAd->OS_Cookie;
+	PVOID			RingBaseVa;
+	RTMP_MGMT_RING  *pMgmtRing;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitTransmit\n"));
+	pObj = pObj;
+
+	/* Init 4 set of Tx parameters*/
+	for(acidx = 0; acidx < NUM_OF_TX_RING; acidx++)
+	{
+		/* Initialize all Transmit releated queues*/
+		InitializeQueueHeader(&pAd->TxSwQueue[acidx]);
+
+		/* Next Local tx ring pointer waiting for buck out*/
+		pAd->NextBulkOutIndex[acidx] = acidx;
+		pAd->BulkOutPending[acidx] = FALSE; /* Buck Out control flag	*/
+	}
+
+
+	do
+	{
+		
+		/* TX_RING_SIZE, 4 ACs*/
+		
+		for(acidx=0; acidx<4; acidx++)
+		{
+			PHT_TX_CONTEXT	pHTTXContext = &(pAd->TxContext[acidx]);
+
+			NdisZeroMemory(pHTTXContext, sizeof(HT_TX_CONTEXT));
+			/*Allocate URB*/
+			Status = RTMPAllocUsbBulkBufStruct(pAd, 
+												&pHTTXContext->pUrb, 
+												&pHTTXContext->TransferBuffer, 
+												sizeof(HTTX_BUFFER), 
+												&pHTTXContext->data_dma, 
+												"HTTxContext");
+			if (Status != NDIS_STATUS_SUCCESS)
+				goto err;
+
+			NdisZeroMemory(pHTTXContext->TransferBuffer->Aggregation, 4);			
+			pHTTXContext->pAd = pAd;
+			pHTTXContext->pIrp = NULL;
+			pHTTXContext->IRPPending = FALSE;
+			pHTTXContext->NextBulkOutPosition = 0;
+			pHTTXContext->ENextBulkOutPosition = 0;
+			pHTTXContext->CurWritePosition = 0;
+			pHTTXContext->CurWriteRealPos = 0;
+			pHTTXContext->BulkOutSize = 0;
+			pHTTXContext->BulkOutPipeId = acidx;
+			pHTTXContext->bRingEmpty = TRUE;
+			pHTTXContext->bCopySavePad = FALSE;
+			pAd->BulkOutPending[acidx] = FALSE;
+		}
+
+		
+		
+		/* MGMT Ring*/
+		
+		
+		/* Allocate MGMT ring descriptor's memory*/
+		pAd->MgmtDescRing.AllocSize = MGMT_RING_SIZE * sizeof(TX_CONTEXT);
+		os_alloc_mem(pAd, (PUCHAR *)(&pAd->MgmtDescRing.AllocVa), pAd->MgmtDescRing.AllocSize);
+		if (pAd->MgmtDescRing.AllocVa == NULL)
+		{
+			DBGPRINT_ERR(("Failed to allocate a big buffer for MgmtDescRing!\n"));
+			Status = NDIS_STATUS_RESOURCES;
+			goto err;
+		}
+		NdisZeroMemory(pAd->MgmtDescRing.AllocVa, pAd->MgmtDescRing.AllocSize);
+		RingBaseVa     = pAd->MgmtDescRing.AllocVa;
+
+		/* Initialize MGMT Ring and associated buffer memory*/
+		pMgmtRing = &pAd->MgmtRing;
+		for (i = 0; i < MGMT_RING_SIZE; i++)
+		{
+			/* link the pre-allocated Mgmt buffer to MgmtRing.Cell*/
+			pMgmtRing->Cell[i].AllocSize = sizeof(TX_CONTEXT);
+			pMgmtRing->Cell[i].AllocVa = RingBaseVa;
+			pMgmtRing->Cell[i].pNdisPacket = NULL;
+			pMgmtRing->Cell[i].pNextNdisPacket = NULL;
+
+			/*Allocate URB for MLMEContext*/
+			pMLMEContext = (PTX_CONTEXT) pAd->MgmtRing.Cell[i].AllocVa;
+			pMLMEContext->pUrb = RTUSB_ALLOC_URB(0);
+			if (pMLMEContext->pUrb == NULL)
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("<-- ERROR in Alloc TX MLMEContext[%d] urb!! \n", i));
+				Status = NDIS_STATUS_RESOURCES;
+				goto err; 
+			}
+			pMLMEContext->pAd = pAd;
+			pMLMEContext->pIrp = NULL;
+			pMLMEContext->TransferBuffer = NULL;
+			pMLMEContext->InUse = FALSE;
+			pMLMEContext->IRPPending = FALSE;
+			pMLMEContext->bWaitingBulkOut = FALSE;
+			pMLMEContext->BulkOutSize = 0;
+			pMLMEContext->SelfIdx = i;
+			
+			/* Offset to next ring descriptor address*/
+			RingBaseVa = (PUCHAR) RingBaseVa + sizeof(TX_CONTEXT);
+		}
+		DBGPRINT(RT_DEBUG_TRACE, ("MGMT Ring: total %d entry allocated\n", i));
+		
+		/*pAd->MgmtRing.TxSwFreeIdx = (MGMT_RING_SIZE - 1);*/
+		pAd->MgmtRing.TxSwFreeIdx = MGMT_RING_SIZE;
+		pAd->MgmtRing.TxCpuIdx = 0;
+		pAd->MgmtRing.TxDmaIdx = 0;
+
+		
+		/* NullContext URB and usb buffer*/
+		
+		NdisZeroMemory(pNullContext, sizeof(TX_CONTEXT));
+		Status = RTMPAllocUsbBulkBufStruct(pAd,
+											&pNullContext->pUrb,
+											&pNullContext->TransferBuffer,
+											sizeof(TX_BUFFER),
+											&pNullContext->data_dma,
+											"TxNullContext");
+		if (Status != NDIS_STATUS_SUCCESS)
+			goto err;
+
+		pNullContext->pAd = pAd;
+		pNullContext->pIrp = NULL;
+		pNullContext->InUse = FALSE;
+		pNullContext->IRPPending = FALSE;
+
+		
+		/* PsPollContext URB and usb buffer*/
+		
+		Status = RTMPAllocUsbBulkBufStruct(pAd,
+											&pPsPollContext->pUrb,
+											&pPsPollContext->TransferBuffer,
+											sizeof(TX_BUFFER),
+											&pPsPollContext->data_dma,
+											"TxPsPollContext");
+		if (Status != NDIS_STATUS_SUCCESS)
+			goto err;
+
+		pPsPollContext->pAd = pAd;
+		pPsPollContext->pIrp = NULL;
+		pPsPollContext->InUse = FALSE;
+		pPsPollContext->IRPPending = FALSE;
+		pPsPollContext->bAggregatible = FALSE;
+		pPsPollContext->LastOne = TRUE;
+
+	}while (FALSE);
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitTransmit(Status=%d)\n", Status));
+
+	return Status;
+
+	
+	/* --------------------------- ERROR HANDLE --------------------------- */
+err:
+	/* Free PsPoll frame resource*/
+	RTMPFreeUsbBulkBufStruct(pAd, 
+								&pPsPollContext->pUrb, 
+								&pPsPollContext->TransferBuffer, 
+								sizeof(TX_BUFFER), 
+								pPsPollContext->data_dma);
+
+	/* Free NULL frame resource*/
+	RTMPFreeUsbBulkBufStruct(pAd, 
+								&pNullContext->pUrb, 
+								&pNullContext->TransferBuffer, 
+								sizeof(TX_BUFFER), 
+								pNullContext->data_dma);
+	
+	/* MGMT Ring*/
+	if (pAd->MgmtDescRing.AllocVa)
+	{
+		pMgmtRing = &pAd->MgmtRing;
+		for(i=0; i<MGMT_RING_SIZE; i++)
+		{
+			pMLMEContext = (PTX_CONTEXT) pAd->MgmtRing.Cell[i].AllocVa;
+			if (pMLMEContext)
+			{
+				RTMPFreeUsbBulkBufStruct(pAd, 
+											&pMLMEContext->pUrb, 
+											&pMLMEContext->TransferBuffer,
+											sizeof(TX_BUFFER),
+											pMLMEContext->data_dma);
+			}
+		}
+		os_free_mem(pAd, pAd->MgmtDescRing.AllocVa);
+		pAd->MgmtDescRing.AllocVa = NULL;
+	}
+	
+	
+	/* Tx Ring*/
+	for (acidx = 0; acidx < 4; acidx++)
+	{
+		PHT_TX_CONTEXT pHTTxContext = &(pAd->TxContext[acidx]);
+		if (pHTTxContext)
+		{
+			RTMPFreeUsbBulkBufStruct(pAd, 
+										&pHTTxContext->pUrb, 
+										&pHTTxContext->TransferBuffer,
+										sizeof(HTTX_BUFFER),
+										pHTTxContext->data_dma);
+		}
+	}
+
+	/* Here we didn't have any pre-allocated memory need to free.*/
+	
+	return Status;	
+}
+
+
+/*
+========================================================================
+Routine Description:
+    Allocate DMA memory blocks for send, receive.
+
+Arguments:
+    pAd					Pointer to our adapter
+
+Return Value:
+	NDIS_STATUS_SUCCESS
+	NDIS_STATUS_FAILURE
+	NDIS_STATUS_RESOURCES
+
+Note:
+========================================================================
+*/
+NDIS_STATUS	RTMPAllocTxRxRingMemory(
+	IN	PRTMP_ADAPTER	pAd)
+{
+/*	COUNTER_802_11	pCounter = &pAd->WlanCounters;*/
+	NDIS_STATUS		Status = NDIS_STATUS_SUCCESS;
+	INT				num;
+
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocTxRxRingMemory\n"));
+
+
+	do
+	{
+		/* Init the CmdQ and CmdQLock*/
+		NdisAllocateSpinLock(pAd, &pAd->CmdQLock);	
+		NdisAcquireSpinLock(&pAd->CmdQLock);
+		RTInitializeCmdQ(&pAd->CmdQ);
+		NdisReleaseSpinLock(&pAd->CmdQLock);
+
+
+		NdisAllocateSpinLock(pAd, &pAd->MLMEBulkOutLock);
+		NdisAllocateSpinLock(pAd, &pAd->BulkInLock);
+		for(num =0 ; num < 6; num++)
+		{
+			NdisAllocateSpinLock(pAd, &pAd->BulkOutLock[num]);
+		}
+
+		for (num = 0; num < NUM_OF_TX_RING; num++)
+		{
+			NdisAllocateSpinLock(pAd, &pAd->TxContextQueueLock[num]);
+		}
+		
+#ifdef RALINK_ATE
+		NdisAllocateSpinLock(pAd, &pAd->GenericLock);
+#endif /* RALINK_ATE */
+
+
+		
+		/* Init send data structures and related parameters*/
+		
+		Status = NICInitTransmit(pAd);
+		if (Status != NDIS_STATUS_SUCCESS)
+			break;
+
+		
+		/* Init receive data structures and related parameters*/
+		
+		Status = NICInitRecv(pAd);
+		if (Status != NDIS_STATUS_SUCCESS)
+			break;
+
+		NdisZeroMemory(&pAd->FragFrame, sizeof(FRAGMENT_FRAME));
+		pAd->FragFrame.pFragPacket =  RTMP_AllocateFragPacketBuffer(pAd, RX_BUFFER_NORMSIZE);
+
+		if (pAd->FragFrame.pFragPacket == NULL)
+		{
+			Status = NDIS_STATUS_RESOURCES;
+		}
+	} while (FALSE);
+	
+	DBGPRINT_S(Status, ("<-- RTMPAllocTxRxRingMemory, Status=%x\n", Status));
+	return Status;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Calls USB_InterfaceStop and frees memory allocated for the URBs
+    calls NdisMDeregisterDevice and frees the memory
+    allocated in VNetInitialize for the Adapter Object
+
+Arguments:
+	*pAd				the raxx interface data pointer
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID	RTMPFreeTxRxRingMemory(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	UINT                i, acidx;
+	PTX_CONTEXT			pNullContext   = &pAd->NullContext;
+	PTX_CONTEXT			pPsPollContext = &pAd->PsPollContext;
+
+
+	DBGPRINT(RT_DEBUG_ERROR, ("---> RTMPFreeTxRxRingMemory\n"));
+
+
+	/* Free all resources for the RxRing buffer queue.*/
+	for(i=0; i<(RX_RING_SIZE); i++)
+	{
+		PRX_CONTEXT  pRxContext = &(pAd->RxContext[i]);
+		if (pRxContext)
+			RTMPFreeUsbBulkBufStruct(pAd,
+										&pRxContext->pUrb,
+										&pRxContext->TransferBuffer,
+										MAX_RXBULK_SIZE,
+										pRxContext->data_dma);
+	}
+
+	/* Free PsPoll frame resource*/
+	RTMPFreeUsbBulkBufStruct(pAd,
+								&pPsPollContext->pUrb,
+								&pPsPollContext->TransferBuffer,
+								sizeof(TX_BUFFER),
+								pPsPollContext->data_dma);
+
+	/* Free NULL frame resource*/
+	RTMPFreeUsbBulkBufStruct(pAd,
+								&pNullContext->pUrb,
+								&pNullContext->TransferBuffer,
+								sizeof(TX_BUFFER),
+								pNullContext->data_dma);
+
+	/* Free mgmt frame resource*/
+	for(i = 0; i < MGMT_RING_SIZE; i++)
+	{
+		PTX_CONTEXT pMLMEContext = (PTX_CONTEXT)pAd->MgmtRing.Cell[i].AllocVa;
+		if (pMLMEContext)
+		{
+			if (NULL != pMLMEContext->pUrb)
+			{
+				RTUSB_UNLINK_URB(pMLMEContext->pUrb);
+				RTUSB_FREE_URB(pMLMEContext->pUrb);
+				pMLMEContext->pUrb = NULL;
+			}
+		}
+		
+		if (NULL != pAd->MgmtRing.Cell[i].pNdisPacket) 
+		{
+			RTMPFreeNdisPacket(pAd, pAd->MgmtRing.Cell[i].pNdisPacket);
+			pAd->MgmtRing.Cell[i].pNdisPacket = NULL;
+			if (pMLMEContext)
+			pMLMEContext->TransferBuffer = NULL; 
+		}
+		
+	}
+	if (pAd->MgmtDescRing.AllocVa)
+		os_free_mem(pAd, pAd->MgmtDescRing.AllocVa);
+	
+	
+	/* Free Tx frame resource*/
+	for (acidx = 0; acidx < 4; acidx++)
+		{
+		PHT_TX_CONTEXT pHTTXContext = &(pAd->TxContext[acidx]);
+			if (pHTTXContext)
+			RTMPFreeUsbBulkBufStruct(pAd,
+										&pHTTXContext->pUrb,
+										&pHTTXContext->TransferBuffer,
+										sizeof(HTTX_BUFFER),
+										pHTTXContext->data_dma);
+		}
+	
+	/* Free fragement frame buffer*/
+	if (pAd->FragFrame.pFragPacket)
+		RELEASE_NDIS_PACKET(pAd, pAd->FragFrame.pFragPacket, NDIS_STATUS_SUCCESS);
+
+
+	/* Free spinlocks*/
+	for(i=0; i<6; i++)
+	{
+		NdisFreeSpinLock(&pAd->BulkOutLock[i]);
+	}
+
+	NdisFreeSpinLock(&pAd->BulkInLock);
+	NdisFreeSpinLock(&pAd->MLMEBulkOutLock);
+
+	NdisFreeSpinLock(&pAd->CmdQLock);
+#ifdef RALINK_ATE
+	NdisFreeSpinLock(&pAd->GenericLock);
+#endif /* RALINK_ATE */
+
+	/* Clear all pending bulk-out request flags.*/
+	RTUSB_CLEAR_BULK_FLAG(pAd, 0xffffffff);
+	
+	for (i = 0; i < NUM_OF_TX_RING; i++)
+	{
+		NdisFreeSpinLock(&pAd->TxContextQueueLock[i]);
+	}
+	
+	DBGPRINT(RT_DEBUG_ERROR, ("<--- RTMPFreeTxRxRingMemory\n"));
+}
+
+#endif /* RESOURCE_PRE_ALLOC */
+
+
+/*
+========================================================================
+Routine Description:
+    Write WLAN MAC address to USB 2870.
+
+Arguments:
+    pAd					Pointer to our adapter
+
+Return Value:
+	NDIS_STATUS_SUCCESS
+
+Note:
+========================================================================
+*/
+NDIS_STATUS	RTUSBWriteHWMACAddress(
+	IN	PRTMP_ADAPTER		pAd)
+{
+	MAC_DW0_STRUC	StaMacReg0;
+	MAC_DW1_STRUC	StaMacReg1;
+	NDIS_STATUS		Status = NDIS_STATUS_SUCCESS;
+	LARGE_INTEGER	NOW;
+
+
+	/* initialize the random number generator*/
+	RTMP_GetCurrentSystemTime(&NOW);
+	
+	/* Write New MAC address to MAC_CSR2 & MAC_CSR3 & let ASIC know our new MAC*/
+	StaMacReg0.field.Byte0 = pAd->CurrentAddress[0];
+	StaMacReg0.field.Byte1 = pAd->CurrentAddress[1];
+	StaMacReg0.field.Byte2 = pAd->CurrentAddress[2];
+	StaMacReg0.field.Byte3 = pAd->CurrentAddress[3];
+	StaMacReg1.field.Byte4 = pAd->CurrentAddress[4];
+	StaMacReg1.field.Byte5 = pAd->CurrentAddress[5];
+	StaMacReg1.field.U2MeMask = 0xff;
+	DBGPRINT_RAW(RT_DEBUG_TRACE, ("Local MAC = %02x:%02x:%02x:%02x:%02x:%02x\n",
+			pAd->CurrentAddress[0], pAd->CurrentAddress[1], pAd->CurrentAddress[2],
+			pAd->CurrentAddress[3], pAd->CurrentAddress[4], pAd->CurrentAddress[5]));
+
+	RTUSBWriteMACRegister(pAd, MAC_ADDR_DW0, StaMacReg0.word);
+	RTUSBWriteMACRegister(pAd, MAC_ADDR_DW1, StaMacReg1.word);
+	return Status;
+}
+
+
+/*
+========================================================================
+Routine Description:
+    Disable DMA.
+
+Arguments:
+	*pAd				the raxx interface data pointer
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RT28XXDMADisable(
+	IN RTMP_ADAPTER 		*pAd)
+{
+	/* no use*/
+}
+
+
+/*
+========================================================================
+Routine Description:
+    Enable DMA.
+
+Arguments:
+	*pAd				the raxx interface data pointer
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RT28XXDMAEnable(
+	IN RTMP_ADAPTER 		*pAd)
+{
+	WPDMA_GLO_CFG_STRUC	GloCfg;
+	USB_DMA_CFG_STRUC	UsbCfg;
+	int					i = 0;
+	
+	
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x4);
+	do
+	{
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))
+			return;
+		RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
+		if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
+			break;
+		
+		DBGPRINT(RT_DEBUG_TRACE, ("==>  DMABusy\n"));
+		RTMPusecDelay(1000);
+		i++;
+	}while ( i <200);
+
+
+	RTMPusecDelay(50);
+	GloCfg.field.EnTXWriteBackDDONE = 1;
+	GloCfg.field.EnableRxDMA = 1;
+	GloCfg.field.EnableTxDMA = 1;
+	DBGPRINT(RT_DEBUG_TRACE, ("<== WRITE DMA offset 0x208 = 0x%x\n", GloCfg.word));	
+	RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
+	
+	UsbCfg.word = 0;
+	UsbCfg.field.phyclear = 0;
+	/* usb version is 1.1,do not use bulk in aggregation */
+	if (pAd->BulkInMaxPacketSize == 512)
+			UsbCfg.field.RxBulkAggEn = 1;
+	/* for last packet, PBF might use more than limited, so minus 2 to prevent from error */
+	UsbCfg.field.RxBulkAggLmt = (MAX_RXBULK_SIZE /1024)-3;
+	UsbCfg.field.RxBulkAggTOut = 0x80; /* 2006-10-18 */
+	UsbCfg.field.RxBulkEn = 1;
+	UsbCfg.field.TxBulkEn = 1;
+
+	RTUSBWriteMACRegister(pAd, USB_DMA_CFG, UsbCfg.word);
+
+}
+
+/********************************************************************
+  *
+  *	2870 Beacon Update Related functions.
+  *
+  ********************************************************************/
+  
+/*
+========================================================================
+Routine Description:
+    Write Beacon buffer to Asic.
+
+Arguments:
+	*pAd				the raxx interface data pointer
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RT28xx_UpdateBeaconToAsic(
+	IN RTMP_ADAPTER		*pAd,
+	IN INT				apidx,
+	IN ULONG			FrameLen,
+	IN ULONG			UpdatePos)
+{
+	PUCHAR        	pBeaconFrame = NULL;
+	UCHAR  			*ptr;
+	UINT  			i, padding;
+	BEACON_SYNC_STRUCT	*pBeaconSync = pAd->CommonCfg.pBeaconSync;
+	UINT32			longValue;
+/*	USHORT			shortValue;*/
+	BOOLEAN			bBcnReq = FALSE;
+	UCHAR			bcn_idx = 0;
+#ifdef SPECIFIC_BCN_BUF_SUPPORT	
+	unsigned long irqFlag;
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */
+
+
+	if (pBeaconFrame == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR,("pBeaconFrame is NULL!\n"));
+		return;
+	}
+
+	if (pBeaconSync == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR,("pBeaconSync is NULL!\n"));
+		return;
+	}
+	
+	if (bBcnReq == FALSE)
+	{
+#ifdef SPECIFIC_BCN_BUF_SUPPORT
+		RTMP_MAC_SHR_MSEL_LOCK(pAd, HIGHER_SHRMEM, irqFlag);
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */	
+		/* when the ra interface is down, do not send its beacon frame */
+		/* clear all zero */
+		for(i=0; i<TXWI_SIZE; i+=4) {
+			RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[bcn_idx] + i, 0x00);
+		}
+#ifdef SPECIFIC_BCN_BUF_SUPPORT
+		RTMP_MAC_SHR_MSEL_UNLOCK(pAd, LOWER_SHRMEM, irqFlag);	
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */		
+
+		pBeaconSync->BeaconBitMap &= (~(BEACON_BITMAP_MASK & (1 << bcn_idx)));
+		NdisZeroMemory(pBeaconSync->BeaconTxWI[bcn_idx], TXWI_SIZE);
+	}
+	else
+	{
+		ptr = (PUCHAR)&pAd->BeaconTxWI;
+#ifdef RT_BIG_ENDIAN
+		RTMPWIEndianChange(ptr, TYPE_TXWI);
+#endif
+		if (NdisEqualMemory(pBeaconSync->BeaconTxWI[bcn_idx], &pAd->BeaconTxWI, TXWI_SIZE) == FALSE)
+		{	/* If BeaconTxWI changed, we need to rewrite the TxWI for the Beacon frames.*/
+			pBeaconSync->BeaconBitMap &= (~(BEACON_BITMAP_MASK & (1 << bcn_idx)));
+			NdisMoveMemory(pBeaconSync->BeaconTxWI[bcn_idx], &pAd->BeaconTxWI, TXWI_SIZE);
+		}
+		
+#ifdef SPECIFIC_BCN_BUF_SUPPORT
+		/*
+			Shared memory access selection (higher 8KB shared memory)
+		*/
+		RTMP_MAC_SHR_MSEL_LOCK(pAd, HIGHER_SHRMEM, irqFlag);
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */		
+		if ((pBeaconSync->BeaconBitMap & (1 << bcn_idx)) != (1 << bcn_idx))
+		{
+			for (i=0; i<TXWI_SIZE; i+=4)  /* 16-byte TXWI field*/
+			{
+				longValue =  *ptr + (*(ptr+1)<<8) + (*(ptr+2)<<16) + (*(ptr+3)<<24);
+				RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[bcn_idx] + i, longValue);
+				ptr += 4;
+			}
+		}
+
+		ptr = pBeaconSync->BeaconBuf[bcn_idx];
+		padding = (FrameLen & 0x01);
+		NdisZeroMemory((PUCHAR)(pBeaconFrame + FrameLen), padding);
+		FrameLen += padding;
+		for (i = 0 ; i < FrameLen /*HW_BEACON_OFFSET*/; i += 2)
+		{
+			if (NdisEqualMemory(ptr, pBeaconFrame, 2) == FALSE)
+			{
+				NdisMoveMemory(ptr, pBeaconFrame, 2);
+				/*shortValue = *ptr + (*(ptr+1)<<8);*/
+				/*RTMP_IO_WRITE8(pAd, pAd->BeaconOffset[bcn_idx] + TXWI_SIZE + i, shortValue);*/
+				RTUSBMultiWrite(pAd, pAd->BeaconOffset[bcn_idx] + TXWI_SIZE + i, ptr, 2);
+			}
+			ptr +=2;
+			pBeaconFrame += 2;
+		}
+
+#ifdef SPECIFIC_BCN_BUF_SUPPORT
+		/*
+			Shared memory access selection (lower 16KB shared memory)
+		*/
+		RTMP_MAC_SHR_MSEL_UNLOCK(pAd, LOWER_SHRMEM, irqFlag);	
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */
+
+		pBeaconSync->BeaconBitMap |= (1 << bcn_idx);
+	
+		/* For AP interface, set the DtimBitOn so that we can send Bcast/Mcast frame out after this beacon frame.*/
+}
+
+}
+
+
+VOID RTUSBBssBeaconStop(
+	IN RTMP_ADAPTER *pAd)
+{
+	BEACON_SYNC_STRUCT	*pBeaconSync;
+	int i, offset;
+	BOOLEAN	Cancelled = TRUE;
+
+	pBeaconSync = pAd->CommonCfg.pBeaconSync;
+	if (pBeaconSync && pBeaconSync->EnableBeacon)
+	{
+		INT NumOfBcn = 0;
+
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			NumOfBcn = MAX_MESH_NUM;
+		}
+#endif /* CONFIG_STA_SUPPORT */
+
+		RTMPCancelTimer(&pAd->CommonCfg.BeaconUpdateTimer, &Cancelled);
+
+		for(i=0; i<NumOfBcn; i++)
+		{
+			NdisZeroMemory(pBeaconSync->BeaconBuf[i], HW_BEACON_OFFSET);
+			NdisZeroMemory(pBeaconSync->BeaconTxWI[i], TXWI_SIZE);
+
+			for (offset=0; offset<HW_BEACON_OFFSET; offset+=4)
+				RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[i] + offset, 0x00);
+			
+			pBeaconSync->CapabilityInfoLocationInBeacon[i] = 0;
+			pBeaconSync->TimIELocationInBeacon[i] = 0;
+		}
+		pBeaconSync->BeaconBitMap = 0;
+		pBeaconSync->DtimBitOn = 0;
+	}
+}
+
+
+VOID RTUSBBssBeaconStart(
+	IN RTMP_ADAPTER *pAd)
+{
+	int apidx;
+	BEACON_SYNC_STRUCT	*pBeaconSync;
+/*	LARGE_INTEGER 	tsfTime, deltaTime;*/
+
+	pBeaconSync = pAd->CommonCfg.pBeaconSync;
+	if (pBeaconSync && pBeaconSync->EnableBeacon)
+	{
+		INT NumOfBcn = 0;
+
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			NumOfBcn = MAX_MESH_NUM;
+		}
+#endif /* CONFIG_STA_SUPPORT */
+
+		for(apidx=0; apidx<NumOfBcn; apidx++)
+		{
+			UCHAR CapabilityInfoLocationInBeacon = 0;
+			UCHAR TimIELocationInBeacon = 0;
+
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+
+			NdisZeroMemory(pBeaconSync->BeaconBuf[apidx], HW_BEACON_OFFSET);
+			pBeaconSync->CapabilityInfoLocationInBeacon[apidx] = CapabilityInfoLocationInBeacon;
+			pBeaconSync->TimIELocationInBeacon[apidx] = TimIELocationInBeacon;
+			NdisZeroMemory(pBeaconSync->BeaconTxWI[apidx], TXWI_SIZE);
+		}
+		pBeaconSync->BeaconBitMap = 0;
+		pBeaconSync->DtimBitOn = 0;
+		pAd->CommonCfg.BeaconUpdateTimer.Repeat = TRUE;
+
+		pAd->CommonCfg.BeaconAdjust = 0;
+		pAd->CommonCfg.BeaconFactor = 0xffffffff / (pAd->CommonCfg.BeaconPeriod << 10);
+		pAd->CommonCfg.BeaconRemain = (0xffffffff % (pAd->CommonCfg.BeaconPeriod << 10)) + 1;
+		DBGPRINT(RT_DEBUG_TRACE, ("RTUSBBssBeaconStart:BeaconFactor=%d, BeaconRemain=%d!\n", 
+									pAd->CommonCfg.BeaconFactor, pAd->CommonCfg.BeaconRemain));
+		RTMPSetTimer(&pAd->CommonCfg.BeaconUpdateTimer, 10 /*pAd->CommonCfg.BeaconPeriod*/);
+
+	}
+}
+
+
+VOID RTUSBBssBeaconInit(
+	IN RTMP_ADAPTER *pAd)
+{
+	BEACON_SYNC_STRUCT	*pBeaconSync;
+	int i;
+
+	os_alloc_mem(pAd, (PUCHAR *)(&pAd->CommonCfg.pBeaconSync), sizeof(BEACON_SYNC_STRUCT));
+	/*NdisAllocMemory(pAd->CommonCfg.pBeaconSync, sizeof(BEACON_SYNC_STRUCT), MEM_ALLOC_FLAG);*/
+	if (pAd->CommonCfg.pBeaconSync)
+	{
+		pBeaconSync = pAd->CommonCfg.pBeaconSync;
+		NdisZeroMemory(pBeaconSync, sizeof(BEACON_SYNC_STRUCT));
+		for(i=0; i < HW_BEACON_MAX_COUNT(pAd); i++)
+		{
+			NdisZeroMemory(pBeaconSync->BeaconBuf[i], HW_BEACON_OFFSET);
+			pBeaconSync->CapabilityInfoLocationInBeacon[i] = 0;
+			pBeaconSync->TimIELocationInBeacon[i] = 0;
+			NdisZeroMemory(pBeaconSync->BeaconTxWI[i], TXWI_SIZE);
+		}
+		pBeaconSync->BeaconBitMap = 0;
+		
+		/*RTMPInitTimer(pAd, &pAd->CommonCfg.BeaconUpdateTimer, GET_TIMER_FUNCTION(BeaconUpdateExec), pAd, TRUE);*/
+		pBeaconSync->EnableBeacon = TRUE;
+	}
+}
+
+
+VOID RTUSBBssBeaconExit(
+	IN RTMP_ADAPTER *pAd)
+{
+	BEACON_SYNC_STRUCT	*pBeaconSync;
+	BOOLEAN	Cancelled = TRUE;
+	int i;
+
+	if (pAd->CommonCfg.pBeaconSync)
+	{
+		pBeaconSync = pAd->CommonCfg.pBeaconSync;
+		pBeaconSync->EnableBeacon = FALSE;
+		RTMPCancelTimer(&pAd->CommonCfg.BeaconUpdateTimer, &Cancelled);
+		pBeaconSync->BeaconBitMap = 0;
+
+		for(i=0; i<HW_BEACON_MAX_COUNT(pAd); i++)
+		{
+			NdisZeroMemory(pBeaconSync->BeaconBuf[i], HW_BEACON_OFFSET);
+			pBeaconSync->CapabilityInfoLocationInBeacon[i] = 0;
+			pBeaconSync->TimIELocationInBeacon[i] = 0;
+			NdisZeroMemory(pBeaconSync->BeaconTxWI[i], TXWI_SIZE);
+		}
+
+		os_free_mem(pAd, pAd->CommonCfg.pBeaconSync);
+		pAd->CommonCfg.pBeaconSync = NULL;
+	}
+}
+
+
+/*
+    ========================================================================
+    Routine Description:
+        For device work as AP mode but didn't have TBTT interrupt event, we need a mechanism 
+        to update the beacon context in each Beacon interval. Here we use a periodical timer 
+        to simulate the TBTT interrupt to handle the beacon context update.
+        
+    Arguments:
+        SystemSpecific1         - Not used.
+        FunctionContext         - Pointer to our Adapter context.
+        SystemSpecific2         - Not used.
+        SystemSpecific3         - Not used.
+        
+    Return Value:
+        None
+        
+    ========================================================================
+*/
+VOID BeaconUpdateExec(
+    IN PVOID SystemSpecific1, 
+    IN PVOID FunctionContext, 
+    IN PVOID SystemSpecific2, 
+    IN PVOID SystemSpecific3)
+{
+	PRTMP_ADAPTER	pAd = (PRTMP_ADAPTER)FunctionContext;
+	LARGE_INTEGER	tsfTime_a;/*, tsfTime_b, deltaTime_exp, deltaTime_ab;*/
+	UINT32			delta, delta2MS, period2US, remain, remain_low, remain_high;
+/*	BOOLEAN			positive;*/
+
+	if (pAd->CommonCfg.IsUpdateBeacon==TRUE)
+	{
+		ReSyncBeaconTime(pAd);
+		
+
+	}
+	
+	RTMP_IO_READ32(pAd, TSF_TIMER_DW0, &tsfTime_a.u.LowPart);
+	RTMP_IO_READ32(pAd, TSF_TIMER_DW1, &tsfTime_a.u.HighPart);
+	
+
+	/*
+		Calculate next beacon time to wake up to update.
+
+		BeaconRemain = (0xffffffff % (pAd->CommonCfg.BeaconPeriod << 10)) + 1;
+
+		Background: Timestamp (us) % Beacon Period (us) shall be 0 at TBTT
+
+		Formula:	(a+b) mod m = ((a mod m) + (b mod m)) mod m 
+					(a*b) mod m = ((a mod m) * (b mod m)) mod m 
+
+		==> ((HighPart * 0xFFFFFFFF) + LowPart) mod Beacon_Period
+		==> (((HighPart * 0xFFFFFFFF) mod Beacon_Period) +
+			(LowPart mod (Beacon_Period))) mod Beacon_Period
+		==> ((HighPart mod Beacon_Period) * (0xFFFFFFFF mod Beacon_Period)) mod
+			Beacon_Period
+
+		Steps:
+		1. Calculate the delta time between now and next TBTT;
+
+			delta time = (Beacon Period) - ((64-bit timestamp) % (Beacon Period))
+
+			(1) If no overflow for LowPart, 32-bit, we can calcualte the delta
+				time by using LowPart;
+
+				delta time = LowPart % (Beacon Period)
+
+			(2) If overflow for LowPart, we need to care about HighPart value;
+
+				delta time = (BeaconRemain * HighPart + LowPart) % (Beacon Period)
+
+				Ex: if the maximum value is 0x00 0xFF (255), Beacon Period = 100,
+					TBTT timestamp will be 100, 200, 300, 400, ...
+					when TBTT timestamp is 300 = 1*56 + 44, means HighPart = 1,
+					Low Part = 44
+
+		2. Adjust next update time of the timer to (delta time + 10ms).
+	*/
+
+	/*positive=getDeltaTime(tsfTime_a, expectedTime, &deltaTime_exp);*/
+	period2US = (pAd->CommonCfg.BeaconPeriod << 10);
+	remain_high = pAd->CommonCfg.BeaconRemain * tsfTime_a.u.HighPart;
+	remain_low = tsfTime_a.u.LowPart % (pAd->CommonCfg.BeaconPeriod << 10);
+	remain = (remain_high + remain_low)%(pAd->CommonCfg.BeaconPeriod << 10);
+	delta = (pAd->CommonCfg.BeaconPeriod << 10) - remain;
+
+	delta2MS = (delta>>10);
+	if (delta2MS > 150)
+	{
+		pAd->CommonCfg.BeaconUpdateTimer.TimerValue = 100;
+		pAd->CommonCfg.IsUpdateBeacon=FALSE;
+	}
+	else
+	{
+		pAd->CommonCfg.BeaconUpdateTimer.TimerValue = delta2MS + 10;
+		pAd->CommonCfg.IsUpdateBeacon=TRUE;
+	}
+
+}
+
+
+/********************************************************************
+  *
+  *	2870 Radio on/off Related functions.
+  *
+  ********************************************************************/
+VOID RT28xxUsbMlmeRadioOn(
+	IN PRTMP_ADAPTER pAd)
+{
+	
+    DBGPRINT(RT_DEBUG_TRACE,("RT28xxUsbMlmeRadioOn()\n"));
+
+	if (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF))
+		return;
+
+	RT28xxUsbAsicRadioOn(pAd);
+	
+
+	/* Clear Radio off flag*/
+	RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
+
+
+#ifdef LED_CONTROL_SUPPORT
+	/* Set LED*/
+#ifdef CONFIG_STA_SUPPORT
+	RTMPSetLED(pAd, LED_RADIO_ON);
+#endif /* CONFIG_STA_SUPPORT */
+#endif /* LED_CONTROL_SUPPORT */
+
+#if defined(RT5370) || defined(RT5390)
+	if ((IS_RT5390(pAd)) && !(IS_RT5392(pAd)))
+	{
+		if (pAd->NicConfig2.field.AntOpt == 1)
+		{
+			if (pAd->NicConfig2.field.AntDiversity == 0)
+			{
+			 /* Main antenna */
+				AsicSetRxAnt(pAd, 0);
+			}
+			else
+			{
+			 /* Aux. antenna */
+				AsicSetRxAnt(pAd, 1);
+			}
+		}
+	}
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+}
+
+
+VOID RT28xxUsbMlmeRadioOFF(
+	IN PRTMP_ADAPTER pAd)
+{
+	
+	DBGPRINT(RT_DEBUG_TRACE,("RT28xxUsbMlmeRadioOFF()\n"));
+
+	if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF))
+		return;
+
+
+#ifdef CONFIG_STA_SUPPORT	
+	/* Clear PMKID cache.*/
+	pAd->StaCfg.SavedPMKNum = 0;
+	RTMPZeroMemory(pAd->StaCfg.SavedPMK, (PMKID_NO * sizeof(BSSID_INFO)));
+
+	/* Link down first if any association exists*/
+	if (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))
+	{
+		if (INFRA_ON(pAd) || ADHOC_ON(pAd))
+		{
+			MLME_DISASSOC_REQ_STRUCT DisReq;
+			MLME_QUEUE_ELEM *pMsgElem; /* = (MLME_QUEUE_ELEM *) kmalloc(sizeof(MLME_QUEUE_ELEM), MEM_ALLOC_FLAG);*/
+
+			os_alloc_mem(pAd, (UCHAR **)&pMsgElem, sizeof(MLME_QUEUE_ELEM));
+			if (pMsgElem)
+			{
+				COPY_MAC_ADDR(&DisReq.Addr, pAd->CommonCfg.Bssid);
+				DisReq.Reason =  REASON_DISASSOC_STA_LEAVING;
+
+				pMsgElem->Machine = ASSOC_STATE_MACHINE;
+				pMsgElem->MsgType = MT2_MLME_DISASSOC_REQ;
+				pMsgElem->MsgLen = sizeof(MLME_DISASSOC_REQ_STRUCT);
+				NdisMoveMemory(pMsgElem->Msg, &DisReq, sizeof(MLME_DISASSOC_REQ_STRUCT));
+			
+				MlmeDisassocReqAction(pAd, pMsgElem);
+/*				kfree(pMsgElem);*/
+				os_free_mem(NULL, pMsgElem);
+				
+				RTMPusecDelay(1000);
+			}
+		}
+	}
+#endif /* CONFIG_STA_SUPPORT */
+		
+	/* Set Radio off flag*/
+	RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		/* Link down first if any association exists*/
+		if (INFRA_ON(pAd) || ADHOC_ON(pAd))
+			LinkDown(pAd, FALSE);
+		RTMPusecDelay(10000);
+
+		/*==========================================*/
+		/* Clean up old bss table*/
+		BssTableInit(&pAd->ScanTab);
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef LED_CONTROL_SUPPORT
+	/* Set LED*/
+	RTMPSetLEDStatus(pAd, LED_RADIO_OFF);
+#endif /* LED_CONTROL_SUPPORT */
+
+
+	RT28xxUsbAsicRadioOff(pAd);
+
+}
+
+VOID RT28xxUsbAsicRadioOff(
+	IN PRTMP_ADAPTER pAd)
+{
+	WPDMA_GLO_CFG_STRUC	GloCfg;
+       INT                              i;
+	UINT32				Value;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("--> %s\n", __FUNCTION__));
+
+	RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF);
+
+	if (pAd->CommonCfg.BBPCurrentBW == BW_40)
+	{	
+		/* Must using 40MHz.*/
+		AsicTurnOffRFClk(pAd, pAd->CommonCfg.CentralChannel);
+	}
+	else
+	{	
+		/* Must using 20MHz.*/
+		AsicTurnOffRFClk(pAd, pAd->CommonCfg.Channel);
+	}
+
+	/* Disable Tx/Rx DMA*/
+	RTUSBReadMACRegister(pAd, WPDMA_GLO_CFG, &GloCfg.word);	   /* disable DMA */
+	GloCfg.field.EnableTxDMA = 0;
+	GloCfg.field.EnableRxDMA = 0;
+	RTUSBWriteMACRegister(pAd, WPDMA_GLO_CFG, GloCfg.word);	   /* abort all TX rings*/
+
+	/* Waiting for DMA idle*/
+	i = 0;
+	do
+	{
+		RTUSBReadMACRegister(pAd, WPDMA_GLO_CFG, &GloCfg.word);
+		if ((GloCfg.field.TxDMABusy == 0) && (GloCfg.field.RxDMABusy == 0))
+			break;
+		
+		RTMPusecDelay(1000);
+	}while (i++ < 100);
+
+	/* Disable MAC Tx/Rx*/
+	RTUSBReadMACRegister(pAd, MAC_SYS_CTRL, &Value);
+	Value &= (0xfffffff3);
+	RTUSBWriteMACRegister(pAd, MAC_SYS_CTRL, Value);
+
+#ifdef CONFIG_STA_SUPPORT
+	AsicSendCommandToMcu(pAd, 0x30, 0xff, 0xff, 0x02);   /* send POWER-SAVE command to MCU. Timeout 40us.*/
+
+	/* Stop bulkin pipe*/
+	if((pAd->PendingRx > 0) && (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)))
+	{
+		RTUSBCancelPendingBulkInIRP(pAd);
+		pAd->PendingRx = 0;
+	}
+#endif /* CONFIG_STA_SUPPORT */
+	DBGPRINT(RT_DEBUG_TRACE, ("<== %s\n", __FUNCTION__));
+
+}
+
+
+VOID RT28xxUsbAsicRadioOn(
+	IN PRTMP_ADAPTER pAd)
+{
+	UINT32                MACValue = 0;
+	BOOLEAN              brc;
+	UINT                 RetryRound = 0;
+	UINT32 rx_filter_flag;
+	WPDMA_GLO_CFG_STRUC	GloCfg;
+	INT i=0;
+	UCHAR	rfreg;
+	RTMP_CHIP_OP *pChipOps = &pAd->chipOps;
+
+#ifdef CONFIG_PM
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND
+	POS_COOKIE  pObj = (POS_COOKIE) pAd->OS_Cookie;
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("--> %s\n", __FUNCTION__));
+	
+	if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_CPU_SUSPEND))
+	{
+		if( (RTMP_Usb_AutoPM_Get_Interface(pObj->pUsb_Dev,pObj->intf)) == 1)
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("RT28xxUsbAsicRadioOn: autopm_resume success\n"));
+			RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_SUSPEND);
+		}
+		else if ((RTMP_Usb_AutoPM_Get_Interface(pObj->pUsb_Dev,pObj->intf)) == (-1))
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("RT28xxUsbAsicRadioOn autopm_resume fail ------\n"));
+			RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_SUSPEND);
+			return;
+		}
+		else
+			DBGPRINT(RT_DEBUG_TRACE, ("RT28xxUsbAsicRadioOn: autopm_resume do nothing \n"));
+
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("RT28xxUsbAsicRadioOn: fRTMP_ADAPTER_CPU_SUSPEND\n"));
+		return;
+	}
+
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */
+#endif /* CONFIG_PM */
+
+	
+	/* make some traffic to invoke EvtDeviceD0Entry callback function*/
+	
+
+	RTUSBReadMACRegister(pAd,0x1000,&MACValue);
+	DBGPRINT(RT_DEBUG_TRACE,("A MAC query to invoke EvtDeviceD0Entry, MACValue = 0x%x\n",MACValue));
+
+	/* 1. Send wake up command.*/
+	RetryRound = 0;
+
+	do
+	{
+		brc = AsicSendCommandToMcu(pAd, 0x31, PowerWakeCID, 0x00, 0x02);   
+		if (brc)
+		{
+			/* Wait command ok.*/
+			brc = AsicCheckCommandOk(pAd, PowerWakeCID);
+		}
+		if(brc){
+			break;      /* PowerWakeCID cmd successed*/
+		}
+		DBGPRINT(RT_DEBUG_WARN, ("PSM :WakeUp Cmd Failed, retry %d\n", RetryRound));
+
+		/* try 10 times at most*/
+		if ((RetryRound++) > 10)
+			break;
+		/* delay and try again*/
+		RTMPusecDelay(200);
+	} while (TRUE);
+	if (RetryRound > 10)
+		DBGPRINT(RT_DEBUG_WARN, ("PSM :ASIC 0x31 WakeUp Cmd may Fail %d*******\n", RetryRound));
+
+
+
+	/* 2. Enable Tx DMA.*/
+
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x4);
+	do
+	{
+		RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
+		if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
+			break;
+		
+		DBGPRINT(RT_DEBUG_TRACE, ("==>  DMABusy\n"));
+		RTMPusecDelay(1000);
+		i++;
+	}while ( i <200);
+
+
+	RTMPusecDelay(50);
+	GloCfg.field.EnTXWriteBackDDONE = 1;
+	GloCfg.field.EnableRxDMA = 1;
+	GloCfg.field.EnableTxDMA = 1;
+	DBGPRINT(RT_DEBUG_TRACE, ("<== WRITE DMA offset 0x208 = 0x%x\n", GloCfg.word));	
+	RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
+	
+
+	/* enable RX of MAC block*/
+
+
+
+#ifdef XLINK_SUPPORT
+		if (pAd->StaCfg.PSPXlink)
+			rx_filter_flag = PSPXLINK;
+		else
+#endif /* XLINK_SUPPORT */	
+			rx_filter_flag = STANORMAL;     /* Staion not drop control frame will fail WiFi Certification.*/
+		RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);
+		RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
+
+	/* 3. Turn on RF*/
+/*	RT28xxUsbAsicRFOn(pAd);*/
+	if (pChipOps->AsicReverseRfFromSleepMode)
+		pChipOps->AsicReverseRfFromSleepMode(pAd, FALSE);
+
+#ifdef RTMP_RF_RW_SUPPORT
+/*for 3xxx ? need to reset R07 for VO......*/
+           RT30xxReadRFRegister(pAd, RF_R07, &rfreg);
+           rfreg = rfreg | 0x1;
+           RT30xxWriteRFRegister(pAd, RF_R07, rfreg);
+#endif /* RTMP_RF_RW_SUPPORT */
+
+	/* 4. Clear idle flag*/
+	RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF);
+
+
+
+
+	
+	/* Send Bulkin IRPs after flag fRTMP_ADAPTER_IDLE_RADIO_OFF is cleared.*/
+	/*	*/
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		RTUSBBulkReceive(pAd);
+#endif /* CONFIG_STA_SUPPORT */
+	DBGPRINT(RT_DEBUG_TRACE, ("<== %s\n", __FUNCTION__));
+
+
+}
+
+
+BOOLEAN AsicCheckCommandOk(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR		 Command)
+{
+	UINT32	CmdStatus, CID, i;
+	UINT32	ThisCIDMask = 0;
+	
+	i = 0;
+	do
+	{
+		RTUSBReadMACRegister(pAd, H2M_MAILBOX_CID, &CID);
+		if ((CID & CID0MASK) == Command)
+		{
+			ThisCIDMask = CID0MASK;
+			break;
+		}
+		else if ((((CID & CID1MASK)>>8) & 0xff) == Command)
+		{
+			ThisCIDMask = CID1MASK;
+			break;
+		}
+		else if ((((CID & CID2MASK)>>16) & 0xff) == Command)
+		{
+			ThisCIDMask = CID2MASK;
+			break;
+		}
+		else if ((((CID & CID3MASK)>>24) & 0xff) == Command)
+		{
+			ThisCIDMask = CID3MASK;
+			break;
+		}
+
+		RTMPusecDelay(100);
+		i++;
+	}while (i < 200);
+
+	RTUSBReadMACRegister(pAd, H2M_MAILBOX_STATUS, &CmdStatus);
+	if (i < 200)
+	{
+		if (((CmdStatus & ThisCIDMask) == 0x1) || ((CmdStatus & ThisCIDMask) == 0x100) 
+			|| ((CmdStatus & ThisCIDMask) == 0x10000) || ((CmdStatus & ThisCIDMask) == 0x1000000))
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("PSM : --> AsicCheckCommandOk CID = 0x%x, CmdStatus= 0x%x \n", CID, CmdStatus));
+			RTUSBWriteMACRegister(pAd, H2M_MAILBOX_STATUS, 0xffffffff);
+			RTUSBWriteMACRegister(pAd, H2M_MAILBOX_CID, 0xffffffff);
+			return TRUE;
+		}
+		DBGPRINT(RT_DEBUG_TRACE, ("--> AsicCheckCommanFail1 CID = 0x%x, CmdStatus= 0x%x \n", CID, CmdStatus));
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("--> AsicCheckCommanFail2 Timeout Command = %d, CmdStatus= 0x%x \n", Command, CmdStatus));
+	}
+	RTUSBWriteMACRegister(pAd, H2M_MAILBOX_STATUS, 0xffffffff);
+	RTUSBWriteMACRegister(pAd, H2M_MAILBOX_CID, 0xffffffff);
+
+	return FALSE;
+
+}
+
+
+#endif /* RTMP_MAC_USB */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_profile.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_profile.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_profile.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_profile.c	2017-09-23 03:42:49.726675956 +0800
@@ -0,0 +1,2394 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+
+#define ETH_MAC_ADDR_STR_LEN 17  /* in format of xx:xx:xx:xx:xx:xx*/
+
+/* We assume the s1 is a sting, s2 is a memory space with 6 bytes. and content of s1 will be changed.*/
+BOOLEAN rtstrmactohex(PSTRING s1, PSTRING s2)
+{
+	int i = 0;
+	PSTRING ptokS = s1, ptokE = s1;
+
+	if (strlen(s1) != ETH_MAC_ADDR_STR_LEN)
+		return FALSE;
+
+	while((*ptokS) != '\0')
+	{
+		if((ptokE = strchr(ptokS, ':')) != NULL)
+			*ptokE++ = '\0';
+		if ((strlen(ptokS) != 2) || (!isxdigit(*ptokS)) || (!isxdigit(*(ptokS+1))))
+			break; /* fail*/
+		AtoH(ptokS, (PUCHAR)&s2[i++], 1);
+		ptokS = ptokE;
+		if (ptokS == NULL)
+			break;
+		if (i == 6)
+			break; /* parsing finished*/
+	}
+
+	return ( i == 6 ? TRUE : FALSE);
+
+}
+
+
+/* we assume the s1 and s2 both are strings.*/
+BOOLEAN rtstrcasecmp(PSTRING s1, PSTRING s2)
+{
+	PSTRING p1 = s1, p2 = s2;
+	
+	if (strlen(s1) != strlen(s2))
+		return FALSE;
+	
+	while(*p1 != '\0')
+	{
+		if((*p1 != *p2) && ((*p1 ^ *p2) != 0x20))
+			return FALSE;
+		p1++;
+		p2++;
+	}
+	
+	return TRUE;
+}
+
+/* we assume the s1 (buffer) and s2 (key) both are strings.*/
+PSTRING rtstrstruncasecmp(PSTRING s1, PSTRING s2)
+{
+	INT l1, l2, i;
+	char temp1, temp2;
+
+	l2 = strlen(s2);
+	if (!l2)
+		return (char *) s1;
+
+	l1 = strlen(s1);
+
+	while (l1 >= l2)
+	{
+		l1--;
+
+		for(i=0; i<l2; i++)
+		{
+			temp1 = *(s1+i);
+			temp2 = *(s2+i);
+
+			if (('a' <= temp1) && (temp1 <= 'z'))
+				temp1 = 'A'+(temp1-'a');
+			if (('a' <= temp2) && (temp2 <= 'z'))
+				temp2 = 'A'+(temp2-'a');
+
+			if (temp1 != temp2)
+				break;
+		}
+
+		if (i == l2)
+			return (char *) s1;
+
+		s1++;
+	}
+	
+	return NULL; /* not found*/
+}
+
+/*add by kathy*/
+
+ /**
+  * strstr - Find the first substring in a %NUL terminated string
+  * @s1: The string to be searched
+  * @s2: The string to search for
+  */
+PSTRING rtstrstr(PSTRING s1,const PSTRING s2)
+{
+	INT l1, l2;
+
+	l2 = strlen(s2);
+	if (!l2)
+		return s1;
+	
+	l1 = strlen(s1);
+	
+	while (l1 >= l2)
+	{
+		l1--;
+		if (!memcmp(s1,s2,l2))
+			return s1;
+		s1++;
+	}
+	
+	return NULL;
+}
+ 
+/**
+ * rstrtok - Split a string into tokens
+ * @s: The string to be searched
+ * @ct: The characters to search for
+ * * WARNING: strtok is deprecated, use strsep instead. However strsep is not compatible with old architecture.
+ */
+PSTRING __rstrtok;
+PSTRING rstrtok(PSTRING s,const PSTRING ct)
+{
+	PSTRING sbegin, send;
+
+	sbegin  = s ? s : __rstrtok;
+	if (!sbegin)
+	{
+		return NULL;
+	}
+
+	sbegin += strspn(sbegin,ct);
+	if (*sbegin == '\0')
+	{
+		__rstrtok = NULL;
+		return( NULL );
+	}
+
+	send = strpbrk( sbegin, ct);
+	if (send && *send != '\0')
+		*send++ = '\0';
+
+	__rstrtok = send;
+
+	return (sbegin);
+}
+
+/**
+ * delimitcnt - return the count of a given delimiter in a given string.
+ * @s: The string to be searched.
+ * @ct: The delimiter to search for.
+ * Notice : We suppose the delimiter is a single-char string(for example : ";").
+ */
+INT delimitcnt(PSTRING s,PSTRING ct)
+{
+	INT count = 0;
+	/* point to the beginning of the line */
+	PSTRING token = s; 
+
+	for ( ;; )
+	{
+		token = strpbrk(token, ct); /* search for delimiters */
+
+        if ( token == NULL )
+		{
+			/* advanced to the terminating null character */
+			break; 
+		}
+		/* skip the delimiter */
+	    ++token; 
+
+		/*
+		 * Print the found text: use len with %.*s to specify field width.
+		 */
+        
+		/* accumulate delimiter count */
+	    ++count; 
+	}
+    return count;
+}
+
+/*
+  * converts the Internet host address from the standard numbers-and-dots notation
+  * into binary data.
+  * returns nonzero if the address is valid, zero if not.	
+  */
+int rtinet_aton(PSTRING cp, unsigned int *addr)
+{
+	unsigned int 	val;
+	int         	base, n;
+	STRING        	c;
+	unsigned int    parts[4];
+	unsigned int    *pp = parts;
+
+	for (;;)
+    {
+         /*
+          * Collect number up to ``.''. 
+          * Values are specified as for C: 
+          *	0x=hex, 0=octal, other=decimal.
+          */
+         val = 0;
+         base = 10;
+         if (*cp == '0')
+         {
+             if (*++cp == 'x' || *cp == 'X')
+                 base = 16, cp++;
+             else
+                 base = 8;
+         }
+         while ((c = *cp) != '\0')
+         {
+             if (isdigit((unsigned char) c))
+             {
+                 val = (val * base) + (c - '0');
+                 cp++;
+                 continue;
+             }
+             if (base == 16 && isxdigit((unsigned char) c))
+             {
+                 val = (val << 4) +
+                     (c + 10 - (islower((unsigned char) c) ? 'a' : 'A'));
+                 cp++;
+                 continue;
+             }
+             break;
+         }
+         if (*cp == '.')
+         {
+             /*
+              * Internet format: a.b.c.d a.b.c   (with c treated as 16-bits)
+              * a.b     (with b treated as 24 bits)
+              */
+             if (pp >= parts + 3 || val > 0xff)
+                 return 0;
+             *pp++ = val, cp++;
+         }
+         else
+             break;
+     }
+ 
+     /*
+      * Check for trailing junk.
+      */
+     while (*cp)
+         if (!isspace((unsigned char) *cp++))
+             return 0;
+ 
+     /*
+      * Concoct the address according to the number of parts specified.
+      */
+     n = pp - parts + 1;
+     switch (n)
+     {
+ 
+         case 1:         /* a -- 32 bits */
+             break;
+ 
+         case 2:         /* a.b -- 8.24 bits */
+             if (val > 0xffffff)
+                 return 0;
+             val |= parts[0] << 24;
+             break;
+ 
+         case 3:         /* a.b.c -- 8.8.16 bits */
+             if (val > 0xffff)
+                 return 0;
+             val |= (parts[0] << 24) | (parts[1] << 16);
+             break;
+ 
+         case 4:         /* a.b.c.d -- 8.8.8.8 bits */
+             if (val > 0xff)
+                 return 0;
+             val |= (parts[0] << 24) | (parts[1] << 16) | (parts[2] << 8);
+             break;
+     }
+	      
+     *addr = OS_HTONL(val);
+     return 1;
+
+}
+
+/*
+    ========================================================================
+
+    Routine Description:
+        Find key section for Get key parameter.
+
+    Arguments:
+        buffer                      Pointer to the buffer to start find the key section
+        section                     the key of the secion to be find
+
+    Return Value:
+        NULL                        Fail
+        Others                      Success
+    ========================================================================
+*/
+PSTRING RTMPFindSection(
+    IN  PSTRING   buffer)
+{
+    STRING temp_buf[32];
+    PSTRING  ptr;
+
+    strcpy(temp_buf, "Default");
+
+    if((ptr = rtstrstr(buffer, temp_buf)) != NULL)
+            return (ptr+strlen("\n"));
+        else
+            return NULL;
+}
+
+/*
+    ========================================================================
+
+    Routine Description:
+        Get key parameter.
+
+    Arguments:
+	key			Pointer to key string
+	dest			Pointer to destination      
+	destsize		The datasize of the destination
+	buffer		Pointer to the buffer to start find the key
+	bTrimSpace	Set true if you want to strip the space character of the result pattern
+	
+    Return Value:
+        TRUE                        Success
+        FALSE                       Fail
+
+    Note:
+	This routine get the value with the matched key (case case-sensitive)
+	For SSID and security key related parameters, we SHALL NOT trim the space(' ') character.
+    ========================================================================
+*/
+INT RTMPGetKeyParameter(
+    IN PSTRING key,
+    OUT PSTRING dest,
+    IN INT destsize,
+    IN PSTRING buffer,
+    IN BOOLEAN bTrimSpace)
+{
+	PSTRING pMemBuf, temp_buf1 = NULL, temp_buf2 = NULL;
+	PSTRING start_ptr, end_ptr;
+	PSTRING ptr;
+	PSTRING offset = NULL;
+	INT  len, keyLen;
+
+
+	keyLen = strlen(key);
+	os_alloc_mem(NULL, (PUCHAR *)&pMemBuf, MAX_PARAM_BUFFER_SIZE  * 2);
+	if (pMemBuf == NULL)
+		return (FALSE);
+	
+	memset(pMemBuf, 0, MAX_PARAM_BUFFER_SIZE * 2);
+	temp_buf1 = pMemBuf;
+	temp_buf2 = (PSTRING)(pMemBuf + MAX_PARAM_BUFFER_SIZE);
+
+
+	/*find section*/
+	if((offset = RTMPFindSection(buffer)) == NULL)
+	{
+		os_free_mem(NULL, (PUCHAR)pMemBuf);
+		return (FALSE);
+	}
+
+	strcpy(temp_buf1, "\n");
+	strcat(temp_buf1, key);
+	strcat(temp_buf1, "=");
+
+	/*search key*/
+	if((start_ptr=rtstrstr(offset, temp_buf1)) == NULL)
+	{
+		os_free_mem(NULL, (PUCHAR)pMemBuf);
+		return (FALSE);
+	}
+
+	start_ptr += strlen("\n");
+	if((end_ptr = rtstrstr(start_ptr, "\n"))==NULL)
+		end_ptr = start_ptr+strlen(start_ptr);
+
+	if (end_ptr<start_ptr)
+	{
+		os_free_mem(NULL, (PUCHAR)pMemBuf);
+		return (FALSE);
+	}
+
+	NdisMoveMemory(temp_buf2, start_ptr, end_ptr-start_ptr);
+	temp_buf2[end_ptr-start_ptr]='\0';
+
+	if((start_ptr=rtstrstr(temp_buf2, "=")) == NULL)
+	{
+		os_free_mem(NULL, (PUCHAR)pMemBuf);
+		return (FALSE);
+	}
+	ptr = (start_ptr +1);
+	/*trim special characters, i.e.,  TAB or space*/
+	while(*start_ptr != 0x00)
+	{
+		if( ((*ptr == ' ') && bTrimSpace) || (*ptr == '\t') )
+			ptr++;
+		else
+			break;
+	}
+	len = strlen(start_ptr);
+
+	memset(dest, 0x00, destsize);
+	strncpy(dest, ptr, ((len >= destsize) ? destsize: len));
+
+	os_free_mem(NULL, (PUCHAR)pMemBuf);
+	
+	return TRUE;
+}
+
+
+/*
+    ========================================================================
+
+    Routine Description:
+        Get multiple key parameter.
+
+    Arguments:
+        key                         Pointer to key string
+        dest                        Pointer to destination      
+        destsize                    The datasize of the destination
+        buffer                      Pointer to the buffer to start find the key
+
+    Return Value:
+        TRUE                        Success
+        FALSE                       Fail
+
+    Note:
+        This routine get the value with the matched key (case case-sensitive)
+    ========================================================================
+*/
+INT RTMPGetKeyParameterWithOffset(
+    IN  PSTRING   key,
+    OUT PSTRING   dest,   
+    OUT	USHORT	*end_offset,		
+    IN  INT     destsize,
+    IN  PSTRING   buffer,
+    IN	BOOLEAN	bTrimSpace)
+{
+    PSTRING temp_buf1 = NULL;
+    PSTRING temp_buf2 = NULL;
+    PSTRING start_ptr;
+    PSTRING end_ptr;
+    PSTRING ptr;
+    PSTRING offset = 0;
+    INT  len;
+
+	if (*end_offset >= MAX_INI_BUFFER_SIZE)
+		return (FALSE);
+	
+	os_alloc_mem(NULL, (PUCHAR *)&temp_buf1, MAX_PARAM_BUFFER_SIZE);
+
+	if(temp_buf1 == NULL)
+        return (FALSE);
+		
+	os_alloc_mem(NULL, (PUCHAR *)&temp_buf2, MAX_PARAM_BUFFER_SIZE);
+	if(temp_buf2 == NULL)
+	{
+		os_free_mem(NULL, (PUCHAR)temp_buf1);
+        return (FALSE);
+	}
+	
+    /*find section		*/
+	if(*end_offset == 0)
+    {
+		if ((offset = RTMPFindSection(buffer)) == NULL)
+		{
+			os_free_mem(NULL, (PUCHAR)temp_buf1);
+	    	os_free_mem(NULL, (PUCHAR)temp_buf2);
+    	    return (FALSE);
+		}
+    }
+	else
+		offset = buffer + (*end_offset);	
+		
+    strcpy(temp_buf1, "\n");
+    strcat(temp_buf1, key);
+    strcat(temp_buf1, "=");
+
+    /*search key*/
+    if((start_ptr=rtstrstr(offset, temp_buf1))==NULL)
+    {
+		os_free_mem(NULL, (PUCHAR)temp_buf1);
+    	os_free_mem(NULL, (PUCHAR)temp_buf2);
+        return (FALSE);
+    }
+
+    start_ptr+=strlen("\n");
+    if((end_ptr=rtstrstr(start_ptr, "\n"))==NULL)
+       end_ptr=start_ptr+strlen(start_ptr);
+	
+    if (end_ptr<start_ptr)
+    {
+		os_free_mem(NULL, (PUCHAR)temp_buf1);
+    	os_free_mem(NULL, (PUCHAR)temp_buf2);
+        return (FALSE);
+    }
+
+	*end_offset = end_ptr - buffer;
+
+    NdisMoveMemory(temp_buf2, start_ptr, end_ptr-start_ptr);
+    temp_buf2[end_ptr-start_ptr]='\0';
+    len = strlen(temp_buf2);
+    strcpy(temp_buf1, temp_buf2);
+    if((start_ptr=rtstrstr(temp_buf1, "=")) == NULL)
+    {
+		os_free_mem(NULL, (PUCHAR)temp_buf1);
+    	os_free_mem(NULL, (PUCHAR)temp_buf2);
+        return (FALSE);
+    }
+
+    strcpy(temp_buf2, start_ptr+1);
+    ptr = temp_buf2;
+    /*trim space or tab*/
+    while(*ptr != 0x00)
+    {
+        if((bTrimSpace && (*ptr == ' ')) || (*ptr == '\t') )
+            ptr++;
+        else
+           break;
+    }
+
+    len = strlen(ptr);    
+    memset(dest, 0x00, destsize);
+    strncpy(dest, ptr, len >= destsize ?  destsize: len);
+
+	os_free_mem(NULL, (PUCHAR)temp_buf1);
+    os_free_mem(NULL, (PUCHAR)temp_buf2);
+    return TRUE;
+}
+
+
+#ifdef CONFIG_STA_SUPPORT
+inline void RTMPSetSTADefKeyId(RTMP_ADAPTER *pAd, ULONG KeyIdx)
+{
+	if((KeyIdx >= 1 ) && (KeyIdx <= 4))
+		pAd->StaCfg.DefaultKeyId = (UCHAR) (KeyIdx - 1);
+	else
+		pAd->StaCfg.DefaultKeyId = 0;
+}
+#endif /* CONFIG_STA_SUPPORT */
+
+
+static int rtmp_parse_key_buffer_from_file(IN  PRTMP_ADAPTER pAd,IN  PSTRING buffer,IN  ULONG KeyType,IN  INT BSSIdx,IN  INT KeyIdx)
+{
+	PSTRING		keybuff;
+	/*INT			i = BSSIdx, idx = KeyIdx, retVal;*/
+	ULONG		KeyLen;
+	/*UCHAR		CipherAlg = CIPHER_WEP64;*/
+	CIPHER_KEY	*pSharedKey;
+	
+	keybuff = buffer;
+	KeyLen = strlen(keybuff);
+	pSharedKey = &pAd->SharedKey[BSSIdx][KeyIdx];
+
+	if(((KeyType != 0) && (KeyType != 1)) ||
+	    ((KeyType == 0) && (KeyLen != 10) && (KeyLen != 26)) ||
+	    ((KeyType== 1) && (KeyLen != 5) && (KeyLen != 13)))
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("Key%dStr is Invalid key length(%ld) or Type(%ld)\n", 
+								KeyIdx+1, KeyLen, KeyType));
+		return FALSE;
+	}
+	else
+	{
+		return RT_CfgSetWepKey(pAd, buffer, pSharedKey, KeyIdx);
+	}
+	
+}
+
+
+static void rtmp_read_key_parms_from_file(IN  PRTMP_ADAPTER pAd, PSTRING tmpbuf, PSTRING buffer)
+{
+	STRING		tok_str[16];
+	PSTRING		macptr;						
+	INT			i = 0, idx;
+	ULONG		KeyType[HW_BEACON_MAX_NUM];
+	ULONG		KeyIdx;
+
+	NdisZeroMemory(KeyType, sizeof(KeyType));
+
+	/*DefaultKeyID*/
+	if(RTMPGetKeyParameter("DefaultKeyID", tmpbuf, 25, buffer, TRUE))
+	{
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			KeyIdx = simple_strtol(tmpbuf, 0, 10);
+			RTMPSetSTADefKeyId(pAd, KeyIdx);
+
+			DBGPRINT(RT_DEBUG_TRACE, ("DefaultKeyID(0~3)=%d\n", pAd->StaCfg.DefaultKeyId));
+		}
+#endif /* CONFIG_STA_SUPPORT */		
+	}	   
+
+
+	for (idx = 0; idx < 4; idx++)
+	{
+		snprintf(tok_str, sizeof(tok_str), "Key%dType", idx + 1);
+		/*Key1Type*/
+		if (RTMPGetKeyParameter(tok_str, tmpbuf, 128, buffer, TRUE))
+		{
+		    for (i = 0, macptr = rstrtok(tmpbuf,";"); macptr; macptr = rstrtok(NULL,";"), i++)
+		    {
+				/*
+					do sanity check for KeyType length;
+					or in station mode, the KeyType length > 1,
+					the code will overwrite the stack of caller
+					(RTMPSetProfileParameters) and cause srcbuf = NULL
+				*/
+				if (i < MAX_MBSSID_NUM(pAd))
+					KeyType[i] = simple_strtol(macptr, 0, 10);
+		    }
+
+#ifdef CONFIG_STA_SUPPORT
+			IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+			{
+				snprintf(tok_str, sizeof(tok_str), "Key%dStr", idx + 1);
+				if (RTMPGetKeyParameter(tok_str, tmpbuf, 128, buffer, FALSE))
+				{
+					rtmp_parse_key_buffer_from_file(pAd, tmpbuf, KeyType[BSS0], BSS0, idx);
+				}
+			}
+#endif /* CONFIG_STA_SUPPORT */
+		}
+	}
+}
+
+
+
+#ifdef CONFIG_STA_SUPPORT
+static void rtmp_read_sta_wmm_parms_from_file(IN  PRTMP_ADAPTER pAd, char *tmpbuf, char *buffer)
+{
+	PSTRING					macptr;						
+	INT						i=0;
+	BOOLEAN					bWmmEnable = FALSE;
+	
+	/*WmmCapable*/
+	if(RTMPGetKeyParameter("WmmCapable", tmpbuf, 32, buffer, TRUE))
+	{
+		if(simple_strtol(tmpbuf, 0, 10) != 0) /*Enable*/
+		{
+			pAd->CommonCfg.bWmmCapable = TRUE;
+			bWmmEnable = TRUE;
+		}
+		else /*Disable*/
+		{
+			pAd->CommonCfg.bWmmCapable = FALSE;
+		}
+		
+		DBGPRINT(RT_DEBUG_TRACE, ("WmmCapable=%d\n", pAd->CommonCfg.bWmmCapable));
+	}
+
+#ifdef QOS_DLS_SUPPORT
+	/*DLSCapable*/
+	if(RTMPGetKeyParameter("DLSCapable", tmpbuf, 32, buffer, TRUE))
+	{
+		if(simple_strtol(tmpbuf, 0, 10) != 0)  /*Enable*/
+		{
+			pAd->CommonCfg.bDLSCapable = TRUE;
+		}
+		else /*Disable*/
+		{
+			pAd->CommonCfg.bDLSCapable = FALSE;
+		}
+
+		DBGPRINT(RT_DEBUG_TRACE, ("bDLSCapable=%d\n", pAd->CommonCfg.bDLSCapable));
+	}
+#endif /* QOS_DLS_SUPPORT */
+
+	/*AckPolicy for AC_BK, AC_BE, AC_VI, AC_VO*/
+	if(RTMPGetKeyParameter("AckPolicy", tmpbuf, 32, buffer, TRUE))
+	{			
+		for (i = 0, macptr = rstrtok(tmpbuf,";"); macptr; macptr = rstrtok(NULL,";"), i++)
+		{
+			pAd->CommonCfg.AckPolicy[i] = (UCHAR)simple_strtol(macptr, 0, 10);
+
+			DBGPRINT(RT_DEBUG_TRACE, ("AckPolicy[%d]=%d\n", i, pAd->CommonCfg.AckPolicy[i]));
+		}
+	}
+
+	if (bWmmEnable)
+	{
+		/*APSDCapable*/
+		if(RTMPGetKeyParameter("APSDCapable", tmpbuf, 10, buffer, TRUE))
+		{
+			if(simple_strtol(tmpbuf, 0, 10) != 0)  /*Enable*/
+				pAd->CommonCfg.bAPSDCapable = TRUE;
+			else
+				pAd->CommonCfg.bAPSDCapable = FALSE;
+
+			DBGPRINT(RT_DEBUG_TRACE, ("APSDCapable=%d\n", pAd->CommonCfg.bAPSDCapable));
+		}
+
+		/*MaxSPLength*/
+		if(RTMPGetKeyParameter("MaxSPLength", tmpbuf, 10, buffer, TRUE))
+		{
+			pAd->CommonCfg.MaxSPLength = simple_strtol(tmpbuf, 0, 10);
+
+			DBGPRINT(RT_DEBUG_TRACE, ("MaxSPLength=%d\n", pAd->CommonCfg.MaxSPLength));
+		}
+
+		/*APSDAC for AC_BE, AC_BK, AC_VI, AC_VO*/
+		if(RTMPGetKeyParameter("APSDAC", tmpbuf, 32, buffer, TRUE))
+		{
+			BOOLEAN apsd_ac[4];
+						
+			for (i = 0, macptr = rstrtok(tmpbuf,";"); macptr; macptr = rstrtok(NULL,";"), i++)
+			{
+				apsd_ac[i] = (BOOLEAN)simple_strtol(macptr, 0, 10);
+
+				DBGPRINT(RT_DEBUG_TRACE, ("APSDAC%d  %d\n", i,  apsd_ac[i]));
+			}
+					
+			pAd->CommonCfg.bAPSDAC_BE = apsd_ac[0];
+			pAd->CommonCfg.bAPSDAC_BK = apsd_ac[1];
+			pAd->CommonCfg.bAPSDAC_VI = apsd_ac[2];
+			pAd->CommonCfg.bAPSDAC_VO = apsd_ac[3];
+
+			pAd->CommonCfg.bACMAPSDTr[0] = apsd_ac[0];
+			pAd->CommonCfg.bACMAPSDTr[1] = apsd_ac[1];
+			pAd->CommonCfg.bACMAPSDTr[2] = apsd_ac[2];
+			pAd->CommonCfg.bACMAPSDTr[3] = apsd_ac[3];
+		}
+	}
+
+}
+
+#ifdef XLINK_SUPPORT
+static void rtmp_get_psp_xlink_mode_from_file(IN  PRTMP_ADAPTER pAd, char *tmpbuf, char *buffer)
+{
+	UINT32 Value = 0;
+
+	/* Xlink Mode*/
+	if (RTMPGetKeyParameter("PSP_XLINK_MODE", tmpbuf, 32, buffer, TRUE))
+	{
+		if(simple_strtol(tmpbuf, 0, 10) != 0) /* enable*/
+		{
+			pAd->StaCfg.PSPXlink = TRUE;
+		}
+		else /* disable*/
+		{
+			pAd->StaCfg.PSPXlink = FALSE;
+		}
+
+		if (pAd->StaCfg.PSPXlink)
+			Value = PSPXLINK;
+		else
+			Value = STANORMAL;
+
+		RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, Value);
+
+		DBGPRINT(RT_DEBUG_TRACE, ("PSP_XLINK_MODE=%d\n", pAd->StaCfg.PSPXlink));
+	}
+}
+#endif /* XLINK_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+
+
+#ifdef DOT11_N_SUPPORT
+static void HTParametersHook(
+	IN	PRTMP_ADAPTER pAd, 
+	IN	PSTRING		  pValueStr,
+	IN	PSTRING		  pInput)
+{
+	long Value;
+
+    if (RTMPGetKeyParameter("HT_PROTECT", pValueStr, 25, pInput, TRUE))
+    {
+        Value = simple_strtol(pValueStr, 0, 10);
+        if (Value == 0)
+        {
+            pAd->CommonCfg.bHTProtect = FALSE;
+        }
+        else
+        {
+            pAd->CommonCfg.bHTProtect = TRUE;
+        }
+        DBGPRINT(RT_DEBUG_TRACE, ("HT: Protection  = %s\n", (Value==0) ? "Disable" : "Enable"));
+    }
+
+
+    if (RTMPGetKeyParameter("HT_MIMOPSMode", pValueStr, 25, pInput, TRUE))
+    {
+        Value = simple_strtol(pValueStr, 0, 10);
+        if (Value > MMPS_ENABLE)
+        {
+			pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
+        }
+        else
+        {
+            /*TODO: add mimo power saving mechanism*/
+            pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
+			/*pAd->CommonCfg.BACapability.field.MMPSmode = Value;*/
+        }
+        DBGPRINT(RT_DEBUG_TRACE, ("HT: MIMOPS Mode  = %d\n", (INT) Value));
+    }
+
+    if (RTMPGetKeyParameter("HT_BADecline", pValueStr, 25, pInput, TRUE))
+    {
+        Value = simple_strtol(pValueStr, 0, 10);
+        if (Value == 0)
+        {
+            pAd->CommonCfg.bBADecline = FALSE;
+        }
+        else
+        {
+            pAd->CommonCfg.bBADecline = TRUE;
+        }
+        DBGPRINT(RT_DEBUG_TRACE, ("HT: BA Decline  = %s\n", (Value==0) ? "Disable" : "Enable"));
+    }
+
+
+    if (RTMPGetKeyParameter("HT_AutoBA", pValueStr, 25, pInput, TRUE))
+    {
+        Value = simple_strtol(pValueStr, 0, 10);
+        if (Value == 0)
+        {
+            pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
+			pAd->CommonCfg.BACapability.field.Policy = BA_NOTUSE;
+        }
+        else
+        {
+            pAd->CommonCfg.BACapability.field.AutoBA = TRUE;
+			pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
+        }
+        pAd->CommonCfg.REGBACapability.field.AutoBA = pAd->CommonCfg.BACapability.field.AutoBA;
+		pAd->CommonCfg.REGBACapability.field.Policy = pAd->CommonCfg.BACapability.field.Policy;
+        DBGPRINT(RT_DEBUG_TRACE, ("HT: Auto BA  = %s\n", (Value==0) ? "Disable" : "Enable"));
+    }
+
+	/* Tx_+HTC frame*/
+    if (RTMPGetKeyParameter("HT_HTC", pValueStr, 25, pInput, TRUE))
+	{
+		Value = simple_strtol(pValueStr, 0, 10);
+		if (Value == 0)
+		{
+			pAd->HTCEnable = FALSE;
+		}
+		else
+		{
+            pAd->HTCEnable = TRUE;
+		}
+		DBGPRINT(RT_DEBUG_TRACE, ("HT: Tx +HTC frame = %s\n", (Value==0) ? "Disable" : "Enable"));
+	}
+
+
+	/* Reverse Direction Mechanism*/
+    if (RTMPGetKeyParameter("HT_RDG", pValueStr, 25, pInput, TRUE))
+	{
+		Value = simple_strtol(pValueStr, 0, 10);
+		if (Value == 0)
+		{			
+			pAd->CommonCfg.bRdg = FALSE;
+		}
+		else
+		{
+			pAd->HTCEnable = TRUE;
+            pAd->CommonCfg.bRdg = TRUE;
+		}
+		DBGPRINT(RT_DEBUG_TRACE, ("HT: RDG = %s\n", (Value==0) ? "Disable" : "Enable(+HTC)"));
+	}
+
+
+
+
+	/* Tx A-MSUD ?*/
+    if (RTMPGetKeyParameter("HT_AMSDU", pValueStr, 25, pInput, TRUE))
+	{
+		Value = simple_strtol(pValueStr, 0, 10);
+		if (Value == 0)
+		{
+			pAd->CommonCfg.BACapability.field.AmsduEnable = FALSE;
+		}
+		else
+		{
+            pAd->CommonCfg.BACapability.field.AmsduEnable = TRUE;
+		}
+		DBGPRINT(RT_DEBUG_TRACE, ("HT: Tx A-MSDU = %s\n", (Value==0) ? "Disable" : "Enable"));
+	}
+
+	/* MPDU Density*/
+    if (RTMPGetKeyParameter("HT_MpduDensity", pValueStr, 25, pInput, TRUE))
+	{
+		Value = simple_strtol(pValueStr, 0, 10);
+		if (Value <=7 && Value >= 0)
+		{		
+			pAd->CommonCfg.BACapability.field.MpduDensity = Value;
+			DBGPRINT(RT_DEBUG_TRACE, ("HT: MPDU Density = %d\n", (INT) Value));
+		}
+		else
+		{
+			pAd->CommonCfg.BACapability.field.MpduDensity = 4;
+			DBGPRINT(RT_DEBUG_TRACE, ("HT: MPDU Density = %d (Default)\n", 4));
+		}
+	}
+
+	/* Max Rx BA Window Size*/
+    if (RTMPGetKeyParameter("HT_BAWinSize", pValueStr, 25, pInput, TRUE))
+	{
+		Value = simple_strtol(pValueStr, 0, 10);
+
+		if (Value >=1 && Value <= 64)
+		{		
+			pAd->CommonCfg.REGBACapability.field.RxBAWinLimit = Value;
+			pAd->CommonCfg.BACapability.field.RxBAWinLimit = Value;
+			DBGPRINT(RT_DEBUG_TRACE, ("HT: BA Windw Size = %d\n", (INT) Value));
+		}
+		else
+		{
+            pAd->CommonCfg.REGBACapability.field.RxBAWinLimit = 64;
+			pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64;
+			DBGPRINT(RT_DEBUG_TRACE, ("HT: BA Windw Size = 64 (Defualt)\n"));
+		}
+
+	}
+
+	/* Guard Interval*/
+	if (RTMPGetKeyParameter("HT_GI", pValueStr, 25, pInput, TRUE))
+	{
+		Value = simple_strtol(pValueStr, 0, 10);
+
+		if (Value == GI_400)
+		{
+			pAd->CommonCfg.RegTransmitSetting.field.ShortGI = GI_400;
+		}
+		else
+		{
+			pAd->CommonCfg.RegTransmitSetting.field.ShortGI = GI_800;
+		}
+		
+		DBGPRINT(RT_DEBUG_TRACE, ("HT: Guard Interval = %s\n", (Value==GI_400) ? "400" : "800" ));
+	}
+
+	/* HT Operation Mode : Mixed Mode , Green Field*/
+	if (RTMPGetKeyParameter("HT_OpMode", pValueStr, 25, pInput, TRUE))
+	{
+		Value = simple_strtol(pValueStr, 0, 10);
+
+		if (Value == HTMODE_GF)
+		{
+
+			pAd->CommonCfg.RegTransmitSetting.field.HTMODE  = HTMODE_GF;
+		}
+		else
+		{
+			pAd->CommonCfg.RegTransmitSetting.field.HTMODE  = HTMODE_MM;
+		}		
+
+		DBGPRINT(RT_DEBUG_TRACE, ("HT: Operate Mode = %s\n", (Value==HTMODE_GF) ? "Green Field" : "Mixed Mode" ));
+	}
+
+	/* Fixed Tx mode : CCK, OFDM*/
+	if (RTMPGetKeyParameter("FixedTxMode", pValueStr, 25, pInput, TRUE))
+	{
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			pAd->StaCfg.DesiredTransmitSetting.field.FixedTxMode = 
+										RT_CfgSetFixedTxPhyMode(pValueStr);
+			DBGPRINT(RT_DEBUG_TRACE, ("Fixed Tx Mode = %d\n", 
+											pAd->StaCfg.DesiredTransmitSetting.field.FixedTxMode));			
+		}
+#endif /* CONFIG_STA_SUPPORT */
+	}
+
+
+	/* Channel Width*/
+	if (RTMPGetKeyParameter("HT_BW", pValueStr, 25, pInput, TRUE))
+	{
+		Value = simple_strtol(pValueStr, 0, 10);
+
+		if (Value == BW_40)
+		{
+			pAd->CommonCfg.RegTransmitSetting.field.BW  = BW_40;
+		}
+		else
+		{
+            pAd->CommonCfg.RegTransmitSetting.field.BW  = BW_20;
+		}		
+
+#ifdef MCAST_RATE_SPECIFIC
+		pAd->CommonCfg.MCastPhyMode.field.BW = pAd->CommonCfg.RegTransmitSetting.field.BW;
+#endif /* MCAST_RATE_SPECIFIC */
+
+		DBGPRINT(RT_DEBUG_TRACE, ("HT: Channel Width = %s\n", (Value==BW_40) ? "40 MHz" : "20 MHz" ));
+	}
+
+	if (RTMPGetKeyParameter("HT_EXTCHA", pValueStr, 25, pInput, TRUE))
+	{
+		Value = simple_strtol(pValueStr, 0, 10);
+
+		if (Value == 0)
+		{
+			
+			pAd->CommonCfg.RegTransmitSetting.field.EXTCHA  = EXTCHA_BELOW;
+		}
+		else
+		{
+            pAd->CommonCfg.RegTransmitSetting.field.EXTCHA = EXTCHA_ABOVE;
+		}		
+
+		DBGPRINT(RT_DEBUG_TRACE, ("HT: Ext Channel = %s\n", (Value==0) ? "BELOW" : "ABOVE" ));
+	}
+
+	/* MSC*/
+	if (RTMPGetKeyParameter("HT_MCS", pValueStr, 50, pInput, TRUE))
+	{
+
+#ifdef CONFIG_STA_SUPPORT 	
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			Value = simple_strtol(pValueStr, 0, 10);
+
+/*			if ((Value >= 0 && Value <= 15) || (Value == 32))*/
+			if ((Value >= 0 && Value <= 23) || (Value == 32)) /* 3*3*/
+		{
+				pAd->StaCfg.DesiredTransmitSetting.field.MCS  = Value;
+				pAd->StaCfg.bAutoTxRateSwitch = FALSE;
+				DBGPRINT(RT_DEBUG_TRACE, ("HT: MCS = %d\n", pAd->StaCfg.DesiredTransmitSetting.field.MCS));
+		}
+		else
+		{
+				pAd->StaCfg.DesiredTransmitSetting.field.MCS  = MCS_AUTO;
+				pAd->StaCfg.bAutoTxRateSwitch = TRUE;
+				DBGPRINT(RT_DEBUG_TRACE, ("HT: MCS = AUTO\n"));
+		}
+	}
+#endif /* CONFIG_STA_SUPPORT */		
+	}
+
+	/* STBC */
+    if (RTMPGetKeyParameter("HT_STBC", pValueStr, 25, pInput, TRUE))
+	{
+		Value = simple_strtol(pValueStr, 0, 10);
+		if (Value == STBC_USE)
+		{		
+			pAd->CommonCfg.RegTransmitSetting.field.STBC = STBC_USE;
+		}
+		else
+		{
+			pAd->CommonCfg.RegTransmitSetting.field.STBC = STBC_NONE;
+		}
+		DBGPRINT(RT_DEBUG_TRACE, ("HT: STBC = %d\n", pAd->CommonCfg.RegTransmitSetting.field.STBC));
+	}
+
+	/* 40_Mhz_Intolerant*/
+	if (RTMPGetKeyParameter("HT_40MHZ_INTOLERANT", pValueStr, 25, pInput, TRUE))
+	{
+		Value = simple_strtol(pValueStr, 0, 10);
+		if (Value == 0)
+		{		
+			pAd->CommonCfg.bForty_Mhz_Intolerant = FALSE;
+		}
+		else
+		{
+			pAd->CommonCfg.bForty_Mhz_Intolerant = TRUE;
+		}
+		DBGPRINT(RT_DEBUG_TRACE, ("HT: 40MHZ INTOLERANT = %d\n", pAd->CommonCfg.bForty_Mhz_Intolerant));
+	}
+	/*HT_TxStream*/
+	if(RTMPGetKeyParameter("HT_TxStream", pValueStr, 10, pInput, TRUE))
+	{
+		switch (simple_strtol(pValueStr, 0, 10))
+		{
+			case 1:
+				pAd->CommonCfg.TxStream = 1;
+				break;
+			case 2:
+				pAd->CommonCfg.TxStream = 2;
+				break;
+			case 3: /* 3*3*/
+			default:
+				pAd->CommonCfg.TxStream = 3;
+
+				if (pAd->MACVersion < RALINK_2883_VERSION)
+					pAd->CommonCfg.TxStream = 2; /* only 2 tx streams for RT2860 series*/
+				break;
+		}
+		DBGPRINT(RT_DEBUG_TRACE, ("HT: Tx Stream = %d\n", pAd->CommonCfg.TxStream));
+	}
+	/*HT_RxStream*/
+	if(RTMPGetKeyParameter("HT_RxStream", pValueStr, 10, pInput, TRUE))
+	{
+		switch (simple_strtol(pValueStr, 0, 10))
+		{
+			case 1:
+				pAd->CommonCfg.RxStream = 1;
+				break;
+			case 2:
+				pAd->CommonCfg.RxStream = 2;
+				break;
+			case 3:
+			default:
+				pAd->CommonCfg.RxStream = 3;
+
+				if (pAd->MACVersion < RALINK_2883_VERSION)
+					pAd->CommonCfg.RxStream = 2; /* only 2 rx streams for RT2860 series*/
+				break;
+		}
+		DBGPRINT(RT_DEBUG_TRACE, ("HT: Rx Stream = %d\n", pAd->CommonCfg.RxStream));
+	}
+	/* HT_DisallowTKIP*/
+	if (RTMPGetKeyParameter("HT_DisallowTKIP", pValueStr, 25, pInput, TRUE))
+	{
+		Value = simple_strtol(pValueStr, 0, 10);
+
+		if (Value == 1)
+		{
+			pAd->CommonCfg.HT_DisallowTKIP = TRUE;
+		}
+		else
+		{
+			pAd->CommonCfg.HT_DisallowTKIP = FALSE;
+		}		
+
+		DBGPRINT(RT_DEBUG_TRACE, ("HT: Disallow TKIP mode = %s\n", (pAd->CommonCfg.HT_DisallowTKIP == TRUE) ? "ON" : "OFF" ));
+	}
+
+#ifdef DOT11_N_SUPPORT
+#ifdef DOT11N_DRAFT3
+			if (RTMPGetKeyParameter("OBSSScanParam", pValueStr, 32, pInput, TRUE))
+			{	int ObssScanValue, idx;
+				PSTRING	macptr;	
+				for (idx = 0, macptr = rstrtok(pValueStr,";"); macptr; macptr = rstrtok(NULL,";"), idx++)
+				{
+					ObssScanValue = simple_strtol(macptr, 0, 10);
+					switch (idx)
+					{
+						case 0:
+							if (ObssScanValue < 5 || ObssScanValue > 1000)
+							{
+								DBGPRINT(RT_DEBUG_ERROR, ("Invalid OBSSScanParam for Dot11OBssScanPassiveDwell(%d), should in range 5~1000\n", ObssScanValue));
+							}
+							else
+							{
+								pAd->CommonCfg.Dot11OBssScanPassiveDwell = ObssScanValue;	/* Unit : TU. 5~1000*/
+								DBGPRINT(RT_DEBUG_TRACE, ("OBSSScanParam for Dot11OBssScanPassiveDwell=%d\n", ObssScanValue));
+							}
+							break;
+						case 1:
+							if (ObssScanValue < 10 || ObssScanValue > 1000)
+							{
+								DBGPRINT(RT_DEBUG_ERROR, ("Invalid OBSSScanParam for Dot11OBssScanActiveDwell(%d), should in range 10~1000\n", ObssScanValue));
+							}
+							else
+							{
+								pAd->CommonCfg.Dot11OBssScanActiveDwell = ObssScanValue;	/* Unit : TU. 10~1000*/
+								DBGPRINT(RT_DEBUG_TRACE, ("OBSSScanParam for Dot11OBssScanActiveDwell=%d\n", ObssScanValue));
+							}
+							break;
+						case 2:
+							pAd->CommonCfg.Dot11BssWidthTriggerScanInt = ObssScanValue;	/* Unit : Second*/
+							DBGPRINT(RT_DEBUG_TRACE, ("OBSSScanParam for Dot11BssWidthTriggerScanInt=%d\n", ObssScanValue));
+							break;
+						case 3:
+							if (ObssScanValue < 200 || ObssScanValue > 10000)
+							{
+								DBGPRINT(RT_DEBUG_ERROR, ("Invalid OBSSScanParam for Dot11OBssScanPassiveTotalPerChannel(%d), should in range 200~10000\n", ObssScanValue));
+							}
+							else
+							{
+								pAd->CommonCfg.Dot11OBssScanPassiveTotalPerChannel = ObssScanValue;	/* Unit : TU. 200~10000*/
+								DBGPRINT(RT_DEBUG_TRACE, ("OBSSScanParam for Dot11OBssScanPassiveTotalPerChannel=%d\n", ObssScanValue));
+							}
+							break;
+						case 4:
+							if (ObssScanValue < 20 || ObssScanValue > 10000)
+							{
+								DBGPRINT(RT_DEBUG_ERROR, ("Invalid OBSSScanParam for Dot11OBssScanActiveTotalPerChannel(%d), should in range 20~10000\n", ObssScanValue));
+							}
+							else
+							{
+								pAd->CommonCfg.Dot11OBssScanActiveTotalPerChannel = ObssScanValue;	/* Unit : TU. 20~10000*/
+								DBGPRINT(RT_DEBUG_TRACE, ("OBSSScanParam for Dot11OBssScanActiveTotalPerChannel=%d\n", ObssScanValue));
+							}
+							break;
+						case 5:
+							pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor = ObssScanValue;
+							DBGPRINT(RT_DEBUG_TRACE, ("OBSSScanParam for Dot11BssWidthChanTranDelayFactor=%d\n", ObssScanValue));
+							break;
+						case 6:
+							pAd->CommonCfg.Dot11OBssScanActivityThre = ObssScanValue;	/* Unit : percentage*/
+							DBGPRINT(RT_DEBUG_TRACE, ("OBSSScanParam for Dot11BssWidthChanTranDelayFactor=%d\n", ObssScanValue));
+							break;
+					}			
+				}
+
+				if (idx != 7)
+				{
+					DBGPRINT(RT_DEBUG_ERROR, ("Wrong OBSSScanParamtetrs format in dat file!!!!! Use default value.\n"));
+
+					pAd->CommonCfg.Dot11OBssScanPassiveDwell = dot11OBSSScanPassiveDwell;	/* Unit : TU. 5~1000*/
+					pAd->CommonCfg.Dot11OBssScanActiveDwell = dot11OBSSScanActiveDwell;	/* Unit : TU. 10~1000*/
+					pAd->CommonCfg.Dot11BssWidthTriggerScanInt = dot11BSSWidthTriggerScanInterval;	/* Unit : Second	*/
+					pAd->CommonCfg.Dot11OBssScanPassiveTotalPerChannel = dot11OBSSScanPassiveTotalPerChannel;	/* Unit : TU. 200~10000*/
+					pAd->CommonCfg.Dot11OBssScanActiveTotalPerChannel = dot11OBSSScanActiveTotalPerChannel;	/* Unit : TU. 20~10000*/
+					pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor = dot11BSSWidthChannelTransactionDelayFactor;
+					pAd->CommonCfg.Dot11OBssScanActivityThre = dot11BSSScanActivityThreshold;	/* Unit : percentage*/
+				}
+				pAd->CommonCfg.Dot11BssWidthChanTranDelay = (pAd->CommonCfg.Dot11BssWidthTriggerScanInt * pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor);
+							DBGPRINT(RT_DEBUG_TRACE, ("OBSSScanParam for Dot11BssWidthChanTranDelay=%ld\n", pAd->CommonCfg.Dot11BssWidthChanTranDelay));
+			}
+
+			if (RTMPGetKeyParameter("HT_BSSCoexistence", pValueStr, 25, pInput, TRUE))
+			{
+				Value = simple_strtol(pValueStr, 0, 10);
+				pAd->CommonCfg.bBssCoexEnable = ((Value == 1) ? TRUE : FALSE);
+
+				DBGPRINT(RT_DEBUG_TRACE, ("HT: 20/40 BssCoexSupport = %s\n", (pAd->CommonCfg.bBssCoexEnable == TRUE) ? "ON" : "OFF" ));
+			}
+
+			
+			if (RTMPGetKeyParameter("HT_BSSCoexApCntThr", pValueStr, 25, pInput, TRUE))
+			{
+				pAd->CommonCfg.BssCoexApCntThr = simple_strtol(pValueStr, 0, 10);;
+
+				DBGPRINT(RT_DEBUG_TRACE, ("HT: 20/40 BssCoexApCntThr = %d\n", pAd->CommonCfg.BssCoexApCntThr));
+			}
+				
+#endif /* DOT11N_DRAFT3 */
+
+#endif /* DOT11_N_SUPPORT */
+
+	/*2008/11/05:KH add to support Antenna power-saving of AP-->*/
+}
+#endif /* DOT11_N_SUPPORT */
+
+
+#ifdef CONFIG_STA_SUPPORT
+void RTMPSetSTASSID(RTMP_ADAPTER *pAd, PSTRING SSID)
+{
+	pAd->CommonCfg.SsidLen = (UCHAR) strlen(SSID);
+	NdisZeroMemory(pAd->CommonCfg.Ssid, NDIS_802_11_LENGTH_SSID);
+	NdisMoveMemory(pAd->CommonCfg.Ssid, SSID, pAd->CommonCfg.SsidLen);
+	pAd->CommonCfg.LastSsidLen= pAd->CommonCfg.SsidLen;
+	NdisZeroMemory(pAd->CommonCfg.LastSsid, NDIS_802_11_LENGTH_SSID);
+	NdisMoveMemory(pAd->CommonCfg.LastSsid, SSID, pAd->CommonCfg.LastSsidLen);
+	pAd->MlmeAux.AutoReconnectSsidLen = pAd->CommonCfg.SsidLen;
+	NdisZeroMemory(pAd->MlmeAux.AutoReconnectSsid, NDIS_802_11_LENGTH_SSID);
+	NdisMoveMemory(pAd->MlmeAux.AutoReconnectSsid, SSID, pAd->MlmeAux.AutoReconnectSsidLen);
+	pAd->MlmeAux.SsidLen = pAd->CommonCfg.SsidLen;
+	NdisZeroMemory(pAd->MlmeAux.Ssid, NDIS_802_11_LENGTH_SSID);
+	NdisMoveMemory(pAd->MlmeAux.Ssid, SSID, pAd->MlmeAux.SsidLen);
+}
+
+
+void RTMPSetSTAPassPhrase(RTMP_ADAPTER *pAd, PSTRING PassPh)
+{
+	int     ret = TRUE;
+
+	PassPh[strlen(PassPh)] = '\0'; /* make STA can process .$^& for WPAPSK input */
+
+	if ((pAd->StaCfg.AuthMode != Ndis802_11AuthModeWPAPSK) &&
+		(pAd->StaCfg.AuthMode != Ndis802_11AuthModeWPA2PSK) &&
+		(pAd->StaCfg.AuthMode != Ndis802_11AuthModeWPANone) 
+		)
+	{
+		ret = FALSE;
+	}
+	else
+	{
+		ret = RT_CfgSetWPAPSKKey(pAd, PassPh, (PUCHAR)pAd->CommonCfg.Ssid, pAd->CommonCfg.SsidLen, pAd->StaCfg.PMK);
+	}
+				
+	if (ret == TRUE)
+	{
+		RTMPZeroMemory(pAd->StaCfg.WpaPassPhrase, 64);
+		RTMPMoveMemory(pAd->StaCfg.WpaPassPhrase, PassPh, strlen(PassPh));
+		pAd->StaCfg.WpaPassPhraseLen= strlen(PassPh);
+					
+	    if ((pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPAPSK) ||
+			(pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2PSK))
+		{
+			/* Start STA supplicant state machine*/
+			pAd->StaCfg.WpaState = SS_START;
+		}
+		else if (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPANone)
+		{
+			pAd->StaCfg.WpaState = SS_NOTUSE;
+		}
+		DBGPRINT(RT_DEBUG_TRACE, ("%s::(WPAPSK=%s)\n", __FUNCTION__, PassPh));
+	}
+}
+
+
+inline void RTMPSetSTACipherSuites(RTMP_ADAPTER *pAd, NDIS_802_11_ENCRYPTION_STATUS WepStatus)
+{
+	/* Update all wepstatus related*/
+	pAd->StaCfg.PairCipher		= WepStatus;
+	pAd->StaCfg.GroupCipher 	= WepStatus;
+	pAd->StaCfg.bMixCipher 		= FALSE;
+}
+#endif /* CONFIG_STA_SUPPORT */ 
+
+
+void RTMPSetCountryCode(RTMP_ADAPTER *pAd, PSTRING CountryCode)
+{
+	NdisMoveMemory(pAd->CommonCfg.CountryCode, CountryCode , 2);
+	pAd->CommonCfg.CountryCode[2] = ' ';
+#ifdef CONFIG_STA_SUPPORT
+#ifdef EXT_BUILD_CHANNEL_LIST
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		NdisMoveMemory(pAd->StaCfg.StaOriCountryCode, CountryCode , 2);
+#endif /* EXT_BUILD_CHANNEL_LIST */
+#endif /* CONFIG_STA_SUPPORT */
+	if (strlen((PSTRING) pAd->CommonCfg.CountryCode) != 0)
+		pAd->CommonCfg.bCountryFlag = TRUE;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("CountryCode=%s\n", pAd->CommonCfg.CountryCode));
+}
+
+
+NDIS_STATUS	RTMPSetProfileParameters(
+	IN RTMP_ADAPTER *pAd,
+	IN PSTRING	pBuffer)
+{
+	PSTRING					tmpbuf;
+	ULONG					RtsThresh;
+	ULONG					FragThresh;
+	PSTRING					macptr;							
+	INT						i = 0, retval;
+#ifdef DFS_HARDWARE_SUPPORT
+	INT k=0;
+#endif /* DFS_HARDWARE_SUPPORT */
+
+/*	tmpbuf = kmalloc(MAX_PARAM_BUFFER_SIZE, MEM_ALLOC_FLAG);*/
+	os_alloc_mem(NULL, (UCHAR **)&tmpbuf, MAX_PARAM_BUFFER_SIZE);
+	if(tmpbuf == NULL)
+		return NDIS_STATUS_FAILURE;
+	
+	do
+	{
+		/* set file parameter to portcfg*/
+		if (RTMPGetKeyParameter("MacAddress", tmpbuf, 25, pBuffer, TRUE))
+		{					
+			retval = RT_CfgSetMacAddress(pAd, tmpbuf);
+			if (retval)
+				DBGPRINT(RT_DEBUG_TRACE, ("MacAddress = %02x:%02x:%02x:%02x:%02x:%02x\n", 
+											PRINT_MAC(pAd->CurrentAddress)));
+		}
+		/*CountryRegion*/
+		if(RTMPGetKeyParameter("CountryRegion", tmpbuf, 25, pBuffer, TRUE))
+		{
+			retval = RT_CfgSetCountryRegion(pAd, tmpbuf, BAND_24G);
+			DBGPRINT(RT_DEBUG_TRACE, ("CountryRegion=%d\n", pAd->CommonCfg.CountryRegion));
+		}
+		/*CountryRegionABand*/
+		if(RTMPGetKeyParameter("CountryRegionABand", tmpbuf, 25, pBuffer, TRUE))
+		{
+			retval = RT_CfgSetCountryRegion(pAd, tmpbuf, BAND_5G);
+			DBGPRINT(RT_DEBUG_TRACE, ("CountryRegionABand=%d\n", pAd->CommonCfg.CountryRegionForABand));
+		}
+#ifdef RTMP_EFUSE_SUPPORT
+#ifdef RT30xx
+#ifdef RALINK_ATE
+		/*EfuseBufferMode*/
+		if(RTMPGetKeyParameter("EfuseBufferMode", tmpbuf, 25, pBuffer, TRUE))
+		{
+			pAd->bEEPROMFile = (UCHAR) simple_strtol(tmpbuf, 0, 10);
+			DBGPRINT(RT_DEBUG_TRACE, ("EfuseBufferMode=%d\n", pAd->bUseEfuse));
+		}
+#endif /* RALINK_ATE */
+#endif /* RT30xx */
+#endif /* RTMP_EFUSE_SUPPORT */
+		/*CountryCode*/
+		if(RTMPGetKeyParameter("CountryCode", tmpbuf, 25, pBuffer, TRUE))
+			RTMPSetCountryCode(pAd, tmpbuf);
+
+#ifdef EXT_BUILD_CHANNEL_LIST
+		/*ChannelGeography*/
+		if(RTMPGetKeyParameter("ChannelGeography", tmpbuf, 25, pBuffer, TRUE))
+		{
+			UCHAR Geography = (UCHAR) simple_strtol(tmpbuf, 0, 10);
+			if (Geography <= BOTH)
+			{
+				pAd->CommonCfg.Geography = Geography;
+				pAd->CommonCfg.CountryCode[2] =
+					(pAd->CommonCfg.Geography == BOTH) ? ' ' : ((pAd->CommonCfg.Geography == IDOR) ? 'I' : 'O');
+#ifdef CONFIG_STA_SUPPORT
+#ifdef EXT_BUILD_CHANNEL_LIST
+				IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+					pAd->StaCfg.StaOriGeography = pAd->CommonCfg.Geography;
+#endif /* EXT_BUILD_CHANNEL_LIST */
+#endif /* CONFIG_STA_SUPPORT */							
+				DBGPRINT(RT_DEBUG_TRACE, ("ChannelGeography=%d\n", pAd->CommonCfg.Geography));
+			}
+		}
+		else
+		{
+			pAd->CommonCfg.Geography = BOTH;
+			pAd->CommonCfg.CountryCode[2] = ' ';
+		}
+#endif /* EXT_BUILD_CHANNEL_LIST */
+
+
+
+#ifdef RTMP_TEMPERATURE_COMPENSATION
+		/* Temperature compensation */
+		if (RTMPGetKeyParameter("TempComp", tmpbuf, 10, pBuffer, TRUE))
+		{
+			pAd->CommonCfg.TempComp = (UCHAR) simple_strtol(tmpbuf, 0, 10);
+			DBGPRINT(RT_DEBUG_TRACE, ("TempComp=%d\n", (INT)pAd->CommonCfg.TempComp));
+		}
+#endif /* RTMP_TEMPERATURE_COMPENSATION */
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			/*SSID*/
+			if (RTMPGetKeyParameter("SSID", tmpbuf, 256, pBuffer, FALSE))
+			{
+				if (strlen(tmpbuf) <= 32)
+				{
+					RTMPSetSTASSID(pAd, tmpbuf);
+					DBGPRINT(RT_DEBUG_TRACE, ("%s::(SSID=%s)\n", __FUNCTION__, tmpbuf));
+				}
+			}
+		}
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			/*NetworkType*/
+			if (RTMPGetKeyParameter("NetworkType", tmpbuf, 25, pBuffer, TRUE))
+			{
+				pAd->bConfigChanged = TRUE;
+				if (strcmp(tmpbuf, "Adhoc") == 0)
+					pAd->StaCfg.BssType = BSS_ADHOC;
+				else /*Default Infrastructure mode*/
+					pAd->StaCfg.BssType = BSS_INFRA;
+				/* Reset Ralink supplicant to not use, it will be set to start when UI set PMK key*/
+				pAd->StaCfg.WpaState = SS_NOTUSE;
+				DBGPRINT(RT_DEBUG_TRACE, ("%s::(NetworkType=%d)\n", __FUNCTION__, pAd->StaCfg.BssType));
+			}
+		}
+#endif /* CONFIG_STA_SUPPORT */				
+		/*Channel*/
+		if(RTMPGetKeyParameter("Channel", tmpbuf, 10, pBuffer, TRUE))
+		{
+			pAd->CommonCfg.Channel = (UCHAR) simple_strtol(tmpbuf, 0, 10);
+			DBGPRINT(RT_DEBUG_TRACE, ("Channel=%d\n", pAd->CommonCfg.Channel));
+		}
+		/*WirelessMode*/
+		/*Note: BssidNum must be put before WirelessMode in dat file*/
+		if(RTMPGetKeyParameter("WirelessMode", tmpbuf, 32, pBuffer, TRUE))
+		{
+			for (i = 0, macptr = rstrtok(tmpbuf,";"); macptr; macptr = rstrtok(NULL,";"), i++)
+			{
+
+				if (i == 0)
+				{
+
+					/* set mode for 1st time */
+					/* in old design, we also only accept the 1st mode */
+					RT_CfgSetWirelessMode(pAd, macptr);
+				}
+			}
+
+			DBGPRINT(RT_DEBUG_TRACE, ("PhyMode=%d\n", pAd->CommonCfg.PhyMode));
+		}
+
+
+	    /*BasicRate*/
+		if(RTMPGetKeyParameter("BasicRate", tmpbuf, 10, pBuffer, TRUE))
+		{
+			pAd->CommonCfg.BasicRateBitmap = (ULONG) simple_strtol(tmpbuf, 0, 10);
+			pAd->CommonCfg.BasicRateBitmapOld = (ULONG) simple_strtol(tmpbuf, 0, 10);
+			DBGPRINT(RT_DEBUG_TRACE, ("BasicRate=%ld\n", pAd->CommonCfg.BasicRateBitmap));
+		}
+		/*BeaconPeriod*/
+		if(RTMPGetKeyParameter("BeaconPeriod", tmpbuf, 10, pBuffer, TRUE))
+		{
+			USHORT bcn_val = (USHORT) simple_strtol(tmpbuf, 0, 10);
+
+			/* The acceptable is 20~1000 ms. Refer to WiFi test plan. */
+			if (bcn_val >= 20 && bcn_val <= 1000)	
+				pAd->CommonCfg.BeaconPeriod = bcn_val;
+			else
+				pAd->CommonCfg.BeaconPeriod = 100;	/* Default value*/
+			
+			DBGPRINT(RT_DEBUG_TRACE, ("BeaconPeriod=%d\n", pAd->CommonCfg.BeaconPeriod));
+		}
+
+
+
+	    /*TxPower*/
+		if(RTMPGetKeyParameter("TxPower", tmpbuf, 10, pBuffer, TRUE))
+		{
+			pAd->CommonCfg.TxPowerPercentage = (ULONG) simple_strtol(tmpbuf, 0, 10);
+#ifdef CONFIG_STA_SUPPORT
+			IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+				pAd->CommonCfg.TxPowerDefault = pAd->CommonCfg.TxPowerPercentage;
+#endif /* CONFIG_STA_SUPPORT */
+			DBGPRINT(RT_DEBUG_TRACE, ("TxPower=%ld\n", pAd->CommonCfg.TxPowerPercentage));
+		}
+		/*BGProtection*/
+		if(RTMPGetKeyParameter("BGProtection", tmpbuf, 10, pBuffer, TRUE))
+		{
+	/*#if 0	#ifndef WIFI_TEST*/
+	/*		pAd->CommonCfg.UseBGProtection = 2; disable b/g protection for throughput test*/
+	/*#else*/
+			switch (simple_strtol(tmpbuf, 0, 10))
+			{
+				case 1: /*Always On*/
+					pAd->CommonCfg.UseBGProtection = 1;
+					break;
+				case 2: /*Always OFF*/
+					pAd->CommonCfg.UseBGProtection = 2;
+					break;
+				case 0: /*AUTO*/
+				default:
+					pAd->CommonCfg.UseBGProtection = 0;
+					break;
+			}
+	/*#endif*/
+			DBGPRINT(RT_DEBUG_TRACE, ("BGProtection=%ld\n", pAd->CommonCfg.UseBGProtection));
+		}
+
+		/*TxPreamble*/
+		if(RTMPGetKeyParameter("TxPreamble", tmpbuf, 10, pBuffer, TRUE))
+		{
+			switch (simple_strtol(tmpbuf, 0, 10))
+			{
+				case Rt802_11PreambleShort:
+					pAd->CommonCfg.TxPreamble = Rt802_11PreambleShort;
+					break;
+				case Rt802_11PreambleLong:
+				default:
+					pAd->CommonCfg.TxPreamble = Rt802_11PreambleLong;
+					break;
+			}
+			DBGPRINT(RT_DEBUG_TRACE, ("TxPreamble=%ld\n", pAd->CommonCfg.TxPreamble));
+		}
+		/*RTSThreshold*/
+		if(RTMPGetKeyParameter("RTSThreshold", tmpbuf, 10, pBuffer, TRUE))
+		{
+			RtsThresh = simple_strtol(tmpbuf, 0, 10);
+			if( (RtsThresh >= 1) && (RtsThresh <= MAX_RTS_THRESHOLD) )
+				pAd->CommonCfg.RtsThreshold  = (USHORT)RtsThresh;
+			else
+				pAd->CommonCfg.RtsThreshold = MAX_RTS_THRESHOLD;
+			
+			DBGPRINT(RT_DEBUG_TRACE, ("RTSThreshold=%d\n", pAd->CommonCfg.RtsThreshold));
+		}
+		/*FragThreshold*/
+		if(RTMPGetKeyParameter("FragThreshold", tmpbuf, 10, pBuffer, TRUE))
+		{		
+			FragThresh = simple_strtol(tmpbuf, 0, 10);
+			pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
+
+			if (FragThresh > MAX_FRAG_THRESHOLD || FragThresh < MIN_FRAG_THRESHOLD)
+			{ /*illegal FragThresh so we set it to default*/
+				pAd->CommonCfg.FragmentThreshold = MAX_FRAG_THRESHOLD;
+				pAd->CommonCfg.bUseZeroToDisableFragment = TRUE;
+			}
+			else if (FragThresh % 2 == 1)
+			{
+				/* The length of each fragment shall always be an even number of octets, except for the last fragment*/
+				/* of an MSDU or MMPDU, which may be either an even or an odd number of octets.*/
+				pAd->CommonCfg.FragmentThreshold = (USHORT)(FragThresh - 1);
+			}
+			else
+			{
+				pAd->CommonCfg.FragmentThreshold = (USHORT)FragThresh;
+			}
+			/*pAd->CommonCfg.AllowFragSize = (pAd->CommonCfg.FragmentThreshold) - LENGTH_802_11 - LENGTH_CRC;*/
+			DBGPRINT(RT_DEBUG_TRACE, ("FragThreshold=%d\n", pAd->CommonCfg.FragmentThreshold));
+		}
+		/*TxBurst*/
+		if(RTMPGetKeyParameter("TxBurst", tmpbuf, 10, pBuffer, TRUE))
+		{
+	/*#ifdef WIFI_TEST*/
+	/*						pAd->CommonCfg.bEnableTxBurst = FALSE;*/
+	/*#else*/
+			if(simple_strtol(tmpbuf, 0, 10) != 0)  /*Enable*/
+				pAd->CommonCfg.bEnableTxBurst = TRUE;
+			else /*Disable*/
+				pAd->CommonCfg.bEnableTxBurst = FALSE;
+	/*#endif*/
+			DBGPRINT(RT_DEBUG_TRACE, ("TxBurst=%d\n", pAd->CommonCfg.bEnableTxBurst));
+		}
+
+#ifdef AGGREGATION_SUPPORT
+		/*PktAggregate*/
+		if(RTMPGetKeyParameter("PktAggregate", tmpbuf, 10, pBuffer, TRUE))
+		{
+			if(simple_strtol(tmpbuf, 0, 10) != 0)  /*Enable*/
+				pAd->CommonCfg.bAggregationCapable = TRUE;
+			else /*Disable*/
+				pAd->CommonCfg.bAggregationCapable = FALSE;
+#ifdef PIGGYBACK_SUPPORT
+			pAd->CommonCfg.bPiggyBackCapable = pAd->CommonCfg.bAggregationCapable;
+#endif /* PIGGYBACK_SUPPORT */
+			DBGPRINT(RT_DEBUG_TRACE, ("PktAggregate=%d\n", pAd->CommonCfg.bAggregationCapable));
+		}
+#else
+		pAd->CommonCfg.bAggregationCapable = FALSE;
+		pAd->CommonCfg.bPiggyBackCapable = FALSE;
+#endif /* AGGREGATION_SUPPORT */
+
+		/* WmmCapable*/
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			rtmp_read_sta_wmm_parms_from_file(pAd, tmpbuf, pBuffer);
+#ifdef XLINK_SUPPORT
+			rtmp_get_psp_xlink_mode_from_file(pAd, tmpbuf, pBuffer);
+#endif /* XLINK_SUPPORT */
+		}
+#endif /* CONFIG_STA_SUPPORT */
+
+		/*ShortSlot*/
+		if(RTMPGetKeyParameter("ShortSlot", tmpbuf, 10, pBuffer, TRUE))
+		{
+			RT_CfgSetShortSlot(pAd, tmpbuf);
+			DBGPRINT(RT_DEBUG_TRACE, ("ShortSlot=%d\n", pAd->CommonCfg.bUseShortSlotTime));
+		}
+
+		/*IEEE80211H*/
+		if(RTMPGetKeyParameter("IEEE80211H", tmpbuf, 10, pBuffer, TRUE))
+		{
+		    for (i = 0, macptr = rstrtok(tmpbuf,";"); macptr; macptr = rstrtok(NULL,";"), i++)
+		    {
+				if(simple_strtol(macptr, 0, 10) != 0)  /*Enable*/
+					pAd->CommonCfg.bIEEE80211H = TRUE;
+				else /*Disable*/
+					pAd->CommonCfg.bIEEE80211H = FALSE;
+
+				DBGPRINT(RT_DEBUG_TRACE, ("IEEE80211H=%d\n", pAd->CommonCfg.bIEEE80211H));
+		    }
+		}
+		/*CSPeriod*/
+		if(RTMPGetKeyParameter("CSPeriod", tmpbuf, 10, pBuffer, TRUE))
+		{
+		    if(simple_strtol(tmpbuf, 0, 10) != 0)
+				pAd->CommonCfg.RadarDetect.CSPeriod = simple_strtol(tmpbuf, 0, 10);
+			else
+				pAd->CommonCfg.RadarDetect.CSPeriod = 0;
+
+				DBGPRINT(RT_DEBUG_TRACE, ("CSPeriod=%d\n", pAd->CommonCfg.RadarDetect.CSPeriod));
+		}
+
+
+		/*RDRegion*/
+		if(RTMPGetKeyParameter("RDRegion", tmpbuf, 128, pBuffer, TRUE))
+		{
+						RADAR_DETECT_STRUCT	*pRadarDetect = &pAd->CommonCfg.RadarDetect;
+			if ((strncmp(tmpbuf, "JAP_W53", 7) == 0) || (strncmp(tmpbuf, "jap_w53", 7) == 0))
+			{
+							pRadarDetect->RDDurRegion = JAP_W53;
+							pRadarDetect->DfsSessionTime = 15;
+			}
+			else if ((strncmp(tmpbuf, "JAP_W56", 7) == 0) || (strncmp(tmpbuf, "jap_w56", 7) == 0))
+			{
+							pRadarDetect->RDDurRegion = JAP_W56;
+							pRadarDetect->DfsSessionTime = 13;
+			}
+			else if ((strncmp(tmpbuf, "JAP", 3) == 0) || (strncmp(tmpbuf, "jap", 3) == 0))
+			{
+							pRadarDetect->RDDurRegion = JAP;
+							pRadarDetect->DfsSessionTime = 5;
+			}
+			else  if ((strncmp(tmpbuf, "FCC", 3) == 0) || (strncmp(tmpbuf, "fcc", 3) == 0))
+			{
+							pRadarDetect->RDDurRegion = FCC;
+							pRadarDetect->DfsSessionTime = 5;
+			}
+			else if ((strncmp(tmpbuf, "CE", 2) == 0) || (strncmp(tmpbuf, "ce", 2) == 0))
+			{
+							pRadarDetect->RDDurRegion = CE;
+							pRadarDetect->DfsSessionTime = 13;
+			}
+			else
+			{
+							pRadarDetect->RDDurRegion = CE;
+							pRadarDetect->DfsSessionTime = 13;
+			}
+
+						DBGPRINT(RT_DEBUG_TRACE, ("RDRegion=%d\n", pRadarDetect->RDDurRegion));
+		}
+		else
+		{
+			pAd->CommonCfg.RadarDetect.RDDurRegion = CE;
+			pAd->CommonCfg.RadarDetect.DfsSessionTime = 13;
+		}
+
+#ifdef SYSTEM_LOG_SUPPORT
+		/*WirelessEvent*/
+		if(RTMPGetKeyParameter("WirelessEvent", tmpbuf, 10, pBuffer, TRUE))
+		{
+			BOOLEAN FlgIsWEntSup = FALSE;
+
+			if(simple_strtol(tmpbuf, 0, 10) != 0)
+				FlgIsWEntSup = TRUE;
+
+			RtmpOsWlanEventSet(pAd, &pAd->CommonCfg.bWirelessEvent, FlgIsWEntSup);
+			DBGPRINT(RT_DEBUG_TRACE, ("WirelessEvent=%d\n", pAd->CommonCfg.bWirelessEvent));
+		}
+#endif /* SYSTEM_LOG_SUPPORT */
+
+			
+		/*AuthMode*/
+		if(RTMPGetKeyParameter("AuthMode", tmpbuf, 128, pBuffer, TRUE))
+		{
+#ifdef CONFIG_STA_SUPPORT
+			IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+			{
+				if ((strcmp(tmpbuf, "WEPAUTO") == 0) || (strcmp(tmpbuf, "wepauto") == 0))
+	                            pAd->StaCfg.AuthMode = Ndis802_11AuthModeAutoSwitch;
+	                        else if ((strcmp(tmpbuf, "SHARED") == 0) || (strcmp(tmpbuf, "shared") == 0))
+	                            pAd->StaCfg.AuthMode = Ndis802_11AuthModeShared;
+	                        else if ((strcmp(tmpbuf, "WPAPSK") == 0) || (strcmp(tmpbuf, "wpapsk") == 0))
+	                            pAd->StaCfg.AuthMode = Ndis802_11AuthModeWPAPSK;
+	                        else if ((strcmp(tmpbuf, "WPANONE") == 0) || (strcmp(tmpbuf, "wpanone") == 0))
+	                            pAd->StaCfg.AuthMode = Ndis802_11AuthModeWPANone;
+	                        else if ((strcmp(tmpbuf, "WPA2PSK") == 0) || (strcmp(tmpbuf, "wpa2psk") == 0))
+							    pAd->StaCfg.AuthMode = Ndis802_11AuthModeWPA2PSK;
+#ifdef WPA_SUPPLICANT_SUPPORT							
+							else if ((strcmp(tmpbuf, "WPA") == 0) || (strcmp(tmpbuf, "wpa") == 0))
+			                    pAd->StaCfg.AuthMode = Ndis802_11AuthModeWPA;
+							else if ((strcmp(tmpbuf, "WPA2") == 0) || (strcmp(tmpbuf, "wpa2") == 0))
+							    pAd->StaCfg.AuthMode = Ndis802_11AuthModeWPA2;  
+#endif /* WPA_SUPPLICANT_SUPPORT */
+	                        else
+	                            pAd->StaCfg.AuthMode = Ndis802_11AuthModeOpen;
+
+	                        pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
+
+				DBGPRINT(RT_DEBUG_TRACE, ("%s::(AuthMode=%d)\n", __FUNCTION__, pAd->StaCfg.AuthMode));
+			}
+#endif /* CONFIG_STA_SUPPORT */
+		}
+		/*EncrypType*/
+		if(RTMPGetKeyParameter("EncrypType", tmpbuf, 128, pBuffer, TRUE))
+		{
+
+#ifdef CONFIG_STA_SUPPORT 
+			IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+			{
+				if ((strcmp(tmpbuf, "WEP") == 0) || (strcmp(tmpbuf, "wep") == 0))						
+					pAd->StaCfg.WepStatus	= Ndis802_11WEPEnabled;													
+				else if ((strcmp(tmpbuf, "TKIP") == 0) || (strcmp(tmpbuf, "tkip") == 0))						
+					pAd->StaCfg.WepStatus	= Ndis802_11Encryption2Enabled;													
+				else if ((strcmp(tmpbuf, "AES") == 0) || (strcmp(tmpbuf, "aes") == 0))						
+					pAd->StaCfg.WepStatus	= Ndis802_11Encryption3Enabled;														 
+						else						
+							pAd->StaCfg.WepStatus	= Ndis802_11WEPDisabled;													
+						RTMPSetSTACipherSuites(pAd, pAd->StaCfg.WepStatus); 			
+						/*RTMPMakeRSNIE(pAd, pAd->StaCfg.AuthMode, pAd->StaCfg.WepStatus, 0);*/
+						DBGPRINT(RT_DEBUG_TRACE, ("%s::(EncrypType=%d)\n", __FUNCTION__, pAd->StaCfg.WepStatus));
+					}
+		#endif /* CONFIG_STA_SUPPORT */
+				}
+
+
+#ifdef CONFIG_STA_SUPPORT
+				IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+				{
+					if(RTMPGetKeyParameter("WPAPSK", tmpbuf, 512, pBuffer, FALSE))
+						RTMPSetSTAPassPhrase(pAd, tmpbuf);
+				}
+#endif /* CONFIG_STA_SUPPORT */													
+
+				/*DefaultKeyID, KeyType, KeyStr*/
+				rtmp_read_key_parms_from_file(pAd, tmpbuf, pBuffer);
+
+
+
+
+#ifdef DOT11_N_SUPPORT
+				HTParametersHook(pAd, tmpbuf, pBuffer);
+#endif /* DOT11_N_SUPPORT */
+
+#ifdef CARRIER_DETECTION_SUPPORT
+					/*CarrierDetect*/
+					if(RTMPGetKeyParameter("CarrierDetect", tmpbuf, 128, pBuffer, TRUE))
+					{
+						if ((strncmp(tmpbuf, "0", 1) == 0))
+							pAd->CommonCfg.CarrierDetect.Enable = FALSE;
+						else if ((strncmp(tmpbuf, "1", 1) == 0))
+							pAd->CommonCfg.CarrierDetect.Enable = TRUE;
+						else
+							pAd->CommonCfg.CarrierDetect.Enable = FALSE;
+
+						DBGPRINT(RT_DEBUG_TRACE, ("CarrierDetect.Enable=%d\n", pAd->CommonCfg.CarrierDetect.Enable));
+					}
+					else
+						pAd->CommonCfg.CarrierDetect.Enable = FALSE;
+#endif /* CARRIER_DETECTION_SUPPORT */
+
+#ifdef CONFIG_STA_SUPPORT
+				IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+				{
+					/*PSMode*/
+					if (RTMPGetKeyParameter("PSMode", tmpbuf, 10, pBuffer, TRUE))
+					{
+						if (pAd->StaCfg.BssType == BSS_INFRA)
+						{
+							if ((strcmp(tmpbuf, "MAX_PSP") == 0) || (strcmp(tmpbuf, "max_psp") == 0))
+							{
+								/* do NOT turn on PSM bit here, wait until MlmeCheckForPsmChange()*/
+								/* to exclude certain situations.*/
+								/*	   MlmeSetPsm(pAd, PWR_SAVE);*/
+								OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
+								if (pAd->StaCfg.bWindowsACCAMEnable == FALSE)
+									pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeMAX_PSP;
+								pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeMAX_PSP;
+								pAd->StaCfg.DefaultListenCount = 5;
+							}							
+							else if ((strcmp(tmpbuf, "Fast_PSP") == 0) || (strcmp(tmpbuf, "fast_psp") == 0) 
+								|| (strcmp(tmpbuf, "FAST_PSP") == 0))
+							{
+								/* do NOT turn on PSM bit here, wait until MlmeCheckForPsmChange()*/
+								/* to exclude certain situations.*/
+								OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
+								if (pAd->StaCfg.bWindowsACCAMEnable == FALSE)
+									pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeFast_PSP;
+								pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeFast_PSP;
+								pAd->StaCfg.DefaultListenCount = 3;
+							}
+							else if ((strcmp(tmpbuf, "Legacy_PSP") == 0) || (strcmp(tmpbuf, "legacy_psp") == 0) 
+								|| (strcmp(tmpbuf, "LEGACY_PSP") == 0))
+							{
+								/* do NOT turn on PSM bit here, wait until MlmeCheckForPsmChange()*/
+								/* to exclude certain situations.*/
+								OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
+								if (pAd->StaCfg.bWindowsACCAMEnable == FALSE)
+									pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeLegacy_PSP;
+								pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeLegacy_PSP;
+								pAd->StaCfg.DefaultListenCount = 3;
+							}
+							else
+							{ /*Default Ndis802_11PowerModeCAM*/
+								/* clear PSM bit immediately*/
+								RTMP_SET_PSM_BIT(pAd, PWR_ACTIVE);
+								OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
+								if (pAd->StaCfg.bWindowsACCAMEnable == FALSE)
+									pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
+								pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
+							}
+							DBGPRINT(RT_DEBUG_TRACE, ("PSMode=%ld\n", pAd->StaCfg.WindowsPowerMode));
+						}
+					}
+					/* AutoRoaming by RSSI*/
+					if (RTMPGetKeyParameter("AutoRoaming", tmpbuf, 32, pBuffer, TRUE))
+					{
+						if (simple_strtol(tmpbuf, 0, 10) == 0)
+							pAd->StaCfg.bAutoRoaming = FALSE;
+						else
+							pAd->StaCfg.bAutoRoaming = TRUE;
+
+						DBGPRINT(RT_DEBUG_TRACE, ("AutoRoaming=%d\n", pAd->StaCfg.bAutoRoaming));
+					}
+					/* RoamThreshold*/
+					if (RTMPGetKeyParameter("RoamThreshold", tmpbuf, 32, pBuffer, TRUE))
+					{
+						long lInfo = simple_strtol(tmpbuf, 0, 10);
+
+						if (lInfo > 90 || lInfo < 60)
+							pAd->StaCfg.dBmToRoam = -70;
+						else    
+							pAd->StaCfg.dBmToRoam = (CHAR)(-1)*lInfo;
+
+						DBGPRINT(RT_DEBUG_TRACE, ("RoamThreshold=%d  dBm\n", pAd->StaCfg.dBmToRoam));
+					}
+
+		
+						 
+
+					if(RTMPGetKeyParameter("TGnWifiTest", tmpbuf, 10, pBuffer, TRUE))
+					{				
+						if(simple_strtol(tmpbuf, 0, 10) == 0)
+							pAd->StaCfg.bTGnWifiTest = FALSE;
+						else
+							pAd->StaCfg.bTGnWifiTest = TRUE;
+							DBGPRINT(RT_DEBUG_TRACE, ("TGnWifiTest=%d\n", pAd->StaCfg.bTGnWifiTest));
+					}
+
+					/* Beacon Lost Time*/
+					if (RTMPGetKeyParameter("BeaconLostTime", tmpbuf, 32, pBuffer, TRUE))
+					{
+						ULONG lInfo = (ULONG)simple_strtol(tmpbuf, 0, 10);
+
+						if ((lInfo != 0) && (lInfo <= 60))
+							pAd->StaCfg.BeaconLostTime = (lInfo * OS_HZ);
+						DBGPRINT(RT_DEBUG_TRACE, ("BeaconLostTime=%ld \n", pAd->StaCfg.BeaconLostTime));
+					}
+
+					/* Auto Connet Setting if no SSID			*/
+					if (RTMPGetKeyParameter("AutoConnect", tmpbuf, 32, pBuffer, TRUE))
+					{
+						if (simple_strtol(tmpbuf, 0, 10) == 0)
+							pAd->StaCfg.bAutoConnectIfNoSSID = FALSE;
+						else
+							pAd->StaCfg.bAutoConnectIfNoSSID = TRUE;
+					}
+
+					
+
+					/* FastConnect*/
+					if(RTMPGetKeyParameter("FastConnect", tmpbuf, 32, pBuffer, TRUE))
+					{
+						if (simple_strtol(tmpbuf, 0, 10) == 0)
+							pAd->StaCfg.bFastConnect = FALSE;
+						else
+							pAd->StaCfg.bFastConnect = TRUE;
+				
+						DBGPRINT(RT_DEBUG_TRACE, ("FastConnect=%d\n", pAd->StaCfg.bFastConnect));
+					}
+				}
+#endif /* CONFIG_STA_SUPPORT */
+
+
+
+
+#ifdef RT30xx
+#ifdef ANT_DIVERSITY_SUPPORT
+				/*IF_DEV_CONFIG_OPMODE_ON_STA(pAd)*/
+				{
+					if (RTMPGetKeyParameter("AntDiversity", tmpbuf, 10, pBuffer, TRUE))
+					{
+						for (i = 0, macptr = rstrtok(tmpbuf,";"); macptr; macptr = rstrtok(NULL,";"), i++)
+						{
+							ANT_DIVERSITY_TYPE Ant = simple_strtol(tmpbuf, 0, 10);
+							if ((Ant <= ANT_FIX_ANT1) && (Ant >= ANT_DIVERSITY_DISABLE))
+								pAd->CommonCfg.bRxAntDiversity = Ant;
+							else
+								pAd->CommonCfg.bRxAntDiversity = ANT_DIVERSITY_DEFAULT;
+
+						}
+					}
+					else
+						pAd->CommonCfg.bRxAntDiversity = ANT_DIVERSITY_DEFAULT;
+
+					switch (pAd->CommonCfg.bRxAntDiversity)
+					{
+						case ANT_DIVERSITY_DISABLE:
+						case ANT_FIX_ANT0:
+							pAd->RxAnt.Pair1PrimaryRxAnt = 0;
+							pAd->RxAnt.Pair1SecondaryRxAnt = 1;
+							break;
+						case ANT_FIX_ANT1:
+							pAd->RxAnt.Pair1PrimaryRxAnt = 1;
+							pAd->RxAnt.Pair1SecondaryRxAnt = 0;
+							break;
+						case ANT_DIVERSITY_ENABLE:
+							if ((pAd->chipCap.FlgIsHwAntennaDiversitySup)) // HW_ANT_DIV (PPAD)
+								pAd->CommonCfg.bRxAntDiversity = ANT_HW_DIVERSITY_ENABLE;
+							else // SW_ANT_DIV
+							{
+								pAd->RxAnt.EvaluateStableCnt = 0;
+								pAd->CommonCfg.bRxAntDiversity = ANT_SW_DIVERSITY_ENABLE;
+							}
+							break;
+					}
+
+					DBGPRINT(RT_DEBUG_ERROR, ("AntDiversity=%d\n", pAd->CommonCfg.bRxAntDiversity));
+				}
+#endif /* ANT_DIVERSITY_SUPPORT */
+#endif /* RT30xx */
+
+
+
+#ifdef SINGLE_SKU
+				if(RTMPGetKeyParameter("AntGain", tmpbuf, 10, pBuffer, TRUE))
+				{
+					UCHAR AntGain = simple_strtol(tmpbuf, 0, 10);
+					pAd->CommonCfg.AntGain= AntGain;
+			
+					DBGPRINT(RT_DEBUG_TRACE, ("AntGain=%d\n", pAd->CommonCfg.AntGain));
+				}
+				if(RTMPGetKeyParameter("BandedgeDelta", tmpbuf, 10, pBuffer, TRUE))
+				{
+					UCHAR Bandedge = simple_strtol(tmpbuf, 0, 10);
+					pAd->CommonCfg.BandedgeDelta = Bandedge;
+
+					DBGPRINT(RT_DEBUG_TRACE, ("BandedgeDelta=%d\n", pAd->CommonCfg.BandedgeDelta));
+				}
+#endif /* SINGLE_SKU */
+
+	
+
+			}while(0);
+
+/*			kfree(tmpbuf);*/
+			os_free_mem(NULL, tmpbuf);
+			
+			return NDIS_STATUS_SUCCESS;
+		}
+
+
+#ifdef MULTIPLE_CARD_SUPPORT
+		/* record whether the card in the card list is used in the card file*/
+		UINT8  MC_CardUsed[MAX_NUM_OF_MULTIPLE_CARD];
+		/* record used card mac address in the card list*/
+		static UINT8  MC_CardMac[MAX_NUM_OF_MULTIPLE_CARD][6];
+
+		/*
+		========================================================================
+		Routine Description:
+			Get card profile path.
+
+		Arguments:
+			pAd
+
+		Return Value:
+			TRUE		- Find a card profile
+			FALSE		- use default profile
+
+		Note:
+		========================================================================
+		*/
+		BOOLEAN RTMP_CardInfoRead(
+			IN	PRTMP_ADAPTER pAd)
+		{
+		#define MC_SELECT_CARDID		0	/* use CARD ID (0 ~ 31) to identify different cards */
+		#define MC_SELECT_MAC			1	/* use CARD MAC to identify different cards */
+		#define MC_SELECT_CARDTYPE		2	/* use CARD type (abgn or bgn) to identify different cards */
+
+		#define LETTER_CASE_TRANSLATE(txt_p, card_id)			\
+			{	UINT32 _len; char _char;						\
+				for(_len=0; _len<strlen(card_id); _len++) {		\
+					_char = *(txt_p + _len);					\
+					if (('A' <= _char) && (_char <= 'Z'))		\
+						*(txt_p+_len) = 'a'+(_char-'A');		\
+				} }
+
+			RTMP_OS_FD srcf;
+			INT retval;
+			PSTRING buffer, tmpbuf;
+			STRING card_id_buf[30], RFIC_word[30];
+			BOOLEAN flg_match_ok = FALSE;
+			INT32 card_select_method;
+			INT32 card_free_id, card_nouse_id, card_same_mac_id, card_match_id;
+			EEPROM_ANTENNA_STRUC antenna;
+			USHORT addr01, addr23, addr45;
+			UINT8 mac[6];
+			UINT32 data, card_index;
+			UCHAR *start_ptr;
+			RTMP_OS_FS_INFO osFSInfo;
+
+			/* init*/
+/*			buffer = kmalloc(MAX_INI_BUFFER_SIZE, MEM_ALLOC_FLAG);*/
+			os_alloc_mem(NULL, (UCHAR **)&buffer, MAX_INI_BUFFER_SIZE);
+			if (buffer == NULL)
+				return FALSE;
+
+/*			tmpbuf = kmalloc(MAX_PARAM_BUFFER_SIZE, MEM_ALLOC_FLAG);*/
+			os_alloc_mem(NULL, (UCHAR **)&tmpbuf, MAX_PARAM_BUFFER_SIZE);
+			if(tmpbuf == NULL)
+			{
+/*				kfree(buffer);*/
+				os_free_mem(NULL, buffer);
+				return NDIS_STATUS_FAILURE;
+			}
+
+			/* get RF IC type*/
+			RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
+
+			if ((data & 0x30) == 0)
+				pAd->EEPROMAddressNum = 6;	/* 93C46*/
+			else if ((data & 0x30) == 0x10)
+				pAd->EEPROMAddressNum = 8;	/* 93C66*/
+			else
+				pAd->EEPROMAddressNum = 8;	/* 93C86*/
+			
+			RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, antenna.word);
+
+			if ((antenna.field.RfIcType == RFIC_2850) ||
+				(antenna.field.RfIcType == RFIC_2750) || 
+				(antenna.field.RfIcType == RFIC_2853) || 
+				(antenna.field.RfIcType == RFIC_3853))
+			{
+				/* ABGN card */
+				strcpy(RFIC_word, "abgn");
+			}
+			else
+			{
+				/* BGN card */
+				strcpy(RFIC_word, "bgn");
+			}
+
+			/* get MAC address*/
+			RT28xx_EEPROM_READ16(pAd, 0x04, addr01);
+			RT28xx_EEPROM_READ16(pAd, 0x06, addr23);
+			RT28xx_EEPROM_READ16(pAd, 0x08, addr45);
+
+			mac[0] = (UCHAR)(addr01 & 0xff);
+			mac[1] = (UCHAR)(addr01 >> 8);
+	mac[2] = (UCHAR)(addr23 & 0xff);
+	mac[3] = (UCHAR)(addr23 >> 8);
+	mac[4] = (UCHAR)(addr45 & 0xff);
+	mac[5] = (UCHAR)(addr45 >> 8);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("mac addr=%02x:%02x:%02x:%02x:%02x:%02x!\n", PRINT_MAC(mac)));
+	
+	RtmpOSFSInfoChange(&osFSInfo, TRUE);
+	/* open card information file*/
+	srcf = RtmpOSFileOpen(CARD_INFO_PATH, O_RDONLY, 0);
+	if (IS_FILE_OPEN_ERR(srcf)) 
+	{
+		/* card information file does not exist */
+			DBGPRINT(RT_DEBUG_TRACE,
+				("--> Error opening %s\n", CARD_INFO_PATH));
+		goto  free_resource;
+	}
+
+	/* card information file exists so reading the card information */
+	memset(buffer, 0x00, MAX_INI_BUFFER_SIZE);
+	retval = RtmpOSFileRead(srcf, buffer, MAX_INI_BUFFER_SIZE);
+	if (retval < 0)
+	{
+		/* read fail */
+			DBGPRINT(RT_DEBUG_TRACE,
+				("--> Read %s error %d\n", CARD_INFO_PATH, -retval));
+	}
+	else
+	{
+		/* get card selection method */
+		memset(tmpbuf, 0x00, MAX_PARAM_BUFFER_SIZE);
+		card_select_method = MC_SELECT_CARDTYPE; /* default*/
+
+		if (RTMPGetKeyParameter("SELECT", tmpbuf, 256, buffer, TRUE))
+		{
+			if (strcmp(tmpbuf, "CARDID") == 0)
+				card_select_method = MC_SELECT_CARDID;
+			else if (strcmp(tmpbuf, "MAC") == 0)
+				card_select_method = MC_SELECT_MAC;
+			else if (strcmp(tmpbuf, "CARDTYPE") == 0)
+				card_select_method = MC_SELECT_CARDTYPE;
+		}
+
+		DBGPRINT(RT_DEBUG_TRACE,
+				("MC> Card Selection = %d\n", card_select_method));
+
+		/* init*/
+		card_free_id = -1;
+		card_nouse_id = -1;
+		card_same_mac_id = -1;
+		card_match_id = -1;
+
+		/* search current card information records*/
+		for(card_index=0;
+			card_index<MAX_NUM_OF_MULTIPLE_CARD;
+			card_index++)
+		{
+			if ((*(UINT32 *)&MC_CardMac[card_index][0] == 0) &&
+				(*(UINT16 *)&MC_CardMac[card_index][4] == 0))
+			{
+				/* MAC is all-0 so the entry is available*/
+				MC_CardUsed[card_index] = 0;
+
+				if (card_free_id < 0)
+					card_free_id = card_index; /* 1st free entry*/
+			}
+			else
+			{
+				if (memcmp(MC_CardMac[card_index], mac, 6) == 0)
+				{
+					/* we find the entry with same MAC*/
+					if (card_same_mac_id < 0)
+						card_same_mac_id = card_index; /* 1st same entry*/
+				}
+				else
+				{
+					/* MAC is not all-0 but used flag == 0*/
+					if ((MC_CardUsed[card_index] == 0) &&
+						(card_nouse_id < 0))
+					{
+						card_nouse_id = card_index; /* 1st available entry*/
+					}
+				}
+			}
+		}
+
+		DBGPRINT(RT_DEBUG_TRACE,
+				("MC> Free = %d, Same = %d, NOUSE = %d\n",
+				card_free_id, card_same_mac_id, card_nouse_id));
+
+		if ((card_same_mac_id >= 0) &&
+			((card_select_method == MC_SELECT_CARDID) ||
+			(card_select_method == MC_SELECT_CARDTYPE)))
+		{
+			/* same MAC entry is found*/
+			card_match_id = card_same_mac_id;
+
+			if (card_select_method == MC_SELECT_CARDTYPE)
+			{
+				/* for CARDTYPE*/
+				snprintf(card_id_buf, sizeof(card_id_buf), "%02dCARDTYPE%s",
+						card_match_id, RFIC_word);
+
+				if ((start_ptr = (PUCHAR)rtstrstruncasecmp(buffer, card_id_buf)) != NULL)
+				{
+					/* we found the card ID*/
+					LETTER_CASE_TRANSLATE(start_ptr, card_id_buf);
+				}
+			}
+		}
+		else
+		{
+			/* the card is 1st plug-in, try to find the match card profile*/
+			switch(card_select_method)
+			{
+				case MC_SELECT_CARDID: /* CARDID*/
+				default:
+					if (card_free_id >= 0)
+						card_match_id = card_free_id;
+					else
+						card_match_id = card_nouse_id;
+					break;
+
+				case MC_SELECT_MAC: /* MAC*/
+					snprintf(card_id_buf, sizeof(card_id_buf), "MAC%02x:%02x:%02x:%02x:%02x:%02x",
+							mac[0], mac[1], mac[2],
+							mac[3], mac[4], mac[5]);
+
+					/* try to find the key word in the card file */
+					if ((start_ptr = (PUCHAR)rtstrstruncasecmp(buffer, card_id_buf)) != NULL)
+					{
+						LETTER_CASE_TRANSLATE(start_ptr, card_id_buf);
+
+						/* get the row ID (2 ASCII characters) */
+						start_ptr -= 2;
+						card_id_buf[0] = *(start_ptr);
+						card_id_buf[1] = *(start_ptr+1);
+						card_id_buf[2] = 0x00;
+
+						card_match_id = simple_strtol(card_id_buf, 0, 10);
+					}
+					break;
+
+				case MC_SELECT_CARDTYPE: /* CARDTYPE*/
+					card_nouse_id = -1;
+
+					for(card_index=0;
+						card_index<MAX_NUM_OF_MULTIPLE_CARD;
+						card_index++)
+					{
+						snprintf(card_id_buf, sizeof(card_id_buf), "%02dCARDTYPE%s",
+								card_index, RFIC_word);
+
+						if ((start_ptr = (PUCHAR)rtstrstruncasecmp(buffer,
+													card_id_buf)) != NULL)
+						{
+							LETTER_CASE_TRANSLATE(start_ptr, card_id_buf);
+
+							if (MC_CardUsed[card_index] == 0)
+							{
+								/* current the card profile is not used */
+								if ((*(UINT32 *)&MC_CardMac[card_index][0] == 0) &&
+									(*(UINT16 *)&MC_CardMac[card_index][4] == 0))
+								{
+									/* find it and no previous card use it*/
+									card_match_id = card_index;
+									break;
+								}
+								else
+								{
+									/* ever a card use it*/
+									if (card_nouse_id < 0)
+										card_nouse_id = card_index;
+								}
+							}
+						}
+					}
+
+					/* if not find a free one, use the available one*/
+					if (card_match_id < 0)
+						card_match_id = card_nouse_id;
+					break;
+			}
+		}
+
+		if (card_match_id >= 0)
+		{
+			/* make up search keyword*/
+			switch(card_select_method)
+			{
+				case MC_SELECT_CARDID: /* CARDID*/
+					snprintf(card_id_buf, sizeof(card_id_buf), "%02dCARDID", card_match_id);
+					break;
+
+				case MC_SELECT_MAC: /* MAC*/
+					snprintf(card_id_buf, sizeof(card_id_buf),
+							"%02dmac%02x:%02x:%02x:%02x:%02x:%02x",
+							card_match_id,
+							mac[0], mac[1], mac[2],
+							mac[3], mac[4], mac[5]);
+					break;
+
+				case MC_SELECT_CARDTYPE: /* CARDTYPE*/
+				default:
+					snprintf(card_id_buf, sizeof(card_id_buf), "%02dcardtype%s",
+							card_match_id, RFIC_word);
+					break;
+			}
+
+			DBGPRINT(RT_DEBUG_TRACE, ("Search Keyword = %s\n", card_id_buf));
+
+			/* read card file path*/
+			if (RTMPGetKeyParameter(card_id_buf, tmpbuf, 256, buffer, TRUE))
+			{
+				if (strlen(tmpbuf) < sizeof(pAd->MC_FileName))
+				{
+					/* backup card information*/
+					pAd->MC_RowID = card_match_id; /* base 0 */
+					MC_CardUsed[card_match_id] = 1;
+					memcpy(MC_CardMac[card_match_id], mac, sizeof(mac));
+
+					/* backup card file path*/
+					NdisMoveMemory(pAd->MC_FileName, tmpbuf , strlen(tmpbuf));
+					pAd->MC_FileName[strlen(tmpbuf)] = '\0';
+					flg_match_ok = TRUE;
+
+					DBGPRINT(RT_DEBUG_TRACE,
+							("Card Profile Name = %s\n", pAd->MC_FileName));
+				}
+				else
+				{
+					DBGPRINT(RT_DEBUG_ERROR,
+							("Card Profile Name length too large!\n"));
+				}
+			}
+			else
+			{
+				DBGPRINT(RT_DEBUG_ERROR,
+						("Can not find search key word in card.dat!\n"));
+			}
+
+			if ((flg_match_ok != TRUE) &&
+				(card_match_id < MAX_NUM_OF_MULTIPLE_CARD))
+			{
+				MC_CardUsed[card_match_id] = 0;
+				memset(MC_CardMac[card_match_id], 0, sizeof(mac));
+			}
+		} /* if (card_match_id >= 0)*/
+	}
+
+
+	/* close file*/
+	retval = RtmpOSFileClose(srcf);
+
+free_resource:
+	RtmpOSFSInfoChange(&osFSInfo, FALSE);
+/*	kfree(buffer);*/
+/*	kfree(tmpbuf);*/
+	os_free_mem(NULL, buffer);
+	os_free_mem(NULL, tmpbuf);
+
+	return flg_match_ok;
+}
+#endif /* MULTIPLE_CARD_SUPPORT */
+
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_sanity.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_sanity.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_sanity.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_sanity.c	2017-09-23 03:42:49.726675956 +0800
@@ -0,0 +1,1635 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+extern UCHAR	CISCO_OUI[];
+
+extern UCHAR	WPA_OUI[];
+extern UCHAR	RSN_OUI[];
+extern UCHAR	WME_INFO_ELEM[];
+extern UCHAR	WME_PARM_ELEM[];
+extern UCHAR	RALINK_OUI[];
+extern UCHAR	BROADCOM_OUI[];
+extern UCHAR    WPS_OUI[];
+
+
+typedef struct wsc_ie_probreq_data
+{
+	UCHAR	ssid[32];
+	UCHAR	macAddr[6];
+	UCHAR	data[2];
+} WSC_IE_PROBREQ_DATA;
+
+/* 
+    ==========================================================================
+    Description:
+        MLME message sanity check
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+BOOLEAN MlmeAddBAReqSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN VOID *Msg, 
+    IN ULONG MsgLen, 
+    OUT PUCHAR pAddr2) 
+{
+    PMLME_ADDBA_REQ_STRUCT   pInfo;
+
+    pInfo = (MLME_ADDBA_REQ_STRUCT *)Msg;
+
+    if ((MsgLen != sizeof(MLME_ADDBA_REQ_STRUCT)))
+    {
+        DBGPRINT(RT_DEBUG_TRACE, ("MlmeAddBAReqSanity fail - message lenght not correct.\n"));
+        return FALSE;
+    }	
+	
+    if ((pInfo->Wcid >= MAX_LEN_OF_MAC_TABLE))
+    {
+        DBGPRINT(RT_DEBUG_TRACE, ("MlmeAddBAReqSanity fail - The peer Mac is not associated yet.\n"));
+        return FALSE;
+    }	
+
+	/*
+    if ((pInfo->BaBufSize > MAX_RX_REORDERBUF) || (pInfo->BaBufSize < 2))
+    {
+        DBGPRINT(RT_DEBUG_TRACE, ("MlmeAddBAReqSanity fail - Rx Reordering buffer too big or too small\n"));
+        return FALSE;
+    } 
+	*/  
+
+    if ((pInfo->pAddr[0]&0x01) == 0x01)
+    {
+        DBGPRINT(RT_DEBUG_TRACE, ("MlmeAddBAReqSanity fail - broadcast address not support BA\n"));
+        return FALSE;
+    }	
+    
+    return TRUE;
+}
+
+/* 
+    ==========================================================================
+    Description:
+        MLME message sanity check
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+BOOLEAN MlmeDelBAReqSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN VOID *Msg, 
+    IN ULONG MsgLen) 
+{
+	MLME_DELBA_REQ_STRUCT *pInfo;
+	pInfo = (MLME_DELBA_REQ_STRUCT *)Msg;
+
+    if ((MsgLen != sizeof(MLME_DELBA_REQ_STRUCT)))
+    {
+        DBGPRINT(RT_DEBUG_ERROR, ("MlmeDelBAReqSanity fail - message lenght not correct.\n"));
+        return FALSE;
+    }	
+	
+    if ((pInfo->Wcid >= MAX_LEN_OF_MAC_TABLE))
+    {
+        DBGPRINT(RT_DEBUG_ERROR, ("MlmeDelBAReqSanity fail - The peer Mac is not associated yet.\n"));
+        return FALSE;
+    }	
+
+    if ((pInfo->TID & 0xf0))
+    {
+        DBGPRINT(RT_DEBUG_ERROR, ("MlmeDelBAReqSanity fail - The peer TID is incorrect.\n"));
+        return FALSE;
+    }	
+
+	if (NdisEqualMemory(pAd->MacTab.Content[pInfo->Wcid].Addr, pInfo->Addr, MAC_ADDR_LEN) == 0)
+    {    	
+        DBGPRINT(RT_DEBUG_ERROR, ("MlmeDelBAReqSanity fail - the peer addr dosen't exist.\n"));		
+        return FALSE;
+    }	
+    
+    return TRUE;
+}
+
+BOOLEAN PeerAddBAReqActionSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN VOID *pMsg, 
+    IN ULONG MsgLen,
+	OUT PUCHAR pAddr2)
+{
+	PFRAME_802_11 pFrame = (PFRAME_802_11)pMsg;
+	PFRAME_ADDBA_REQ pAddFrame;
+	pAddFrame = (PFRAME_ADDBA_REQ)(pMsg);
+	if (MsgLen < (sizeof(FRAME_ADDBA_REQ)))
+	{
+		DBGPRINT(RT_DEBUG_ERROR,("PeerAddBAReqActionSanity: ADDBA Request frame length size = %ld incorrect\n", MsgLen));
+		return FALSE;
+	}
+	/* we support immediate BA.*/
+#ifdef UNALIGNMENT_SUPPORT
+	{
+		BA_PARM		tmpBaParm;
+
+		NdisMoveMemory((PUCHAR)(&tmpBaParm), (PUCHAR)(&pAddFrame->BaParm), sizeof(BA_PARM));
+		*(USHORT *)(&tmpBaParm) = cpu2le16(*(USHORT *)(&tmpBaParm));
+		NdisMoveMemory((PUCHAR)(&pAddFrame->BaParm), (PUCHAR)(&tmpBaParm), sizeof(BA_PARM));
+	}
+#else
+	*(USHORT *)(&pAddFrame->BaParm) = cpu2le16(*(USHORT *)(&pAddFrame->BaParm));
+#endif
+	pAddFrame->TimeOutValue = cpu2le16(pAddFrame->TimeOutValue);
+	pAddFrame->BaStartSeq.word = cpu2le16(pAddFrame->BaStartSeq.word); 
+
+	if (pAddFrame->BaParm.BAPolicy != IMMED_BA)
+	{
+		DBGPRINT(RT_DEBUG_ERROR,("PeerAddBAReqActionSanity: ADDBA Request Ba Policy[%d] not support\n", pAddFrame->BaParm.BAPolicy));
+		DBGPRINT(RT_DEBUG_ERROR,("ADDBA Request. tid=%x, Bufsize=%x, AMSDUSupported=%x \n", pAddFrame->BaParm.TID, pAddFrame->BaParm.BufSize, pAddFrame->BaParm.AMSDUSupported));
+		return FALSE;
+	}
+
+	COPY_MAC_ADDR(pAddr2, pFrame->Hdr.Addr2);
+	return TRUE;
+}
+
+BOOLEAN PeerAddBARspActionSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN VOID *pMsg, 
+    IN ULONG MsgLen)
+{
+	/*PFRAME_802_11 pFrame = (PFRAME_802_11)pMsg;*/
+	PFRAME_ADDBA_RSP pAddFrame;
+	
+	pAddFrame = (PFRAME_ADDBA_RSP)(pMsg);
+	if (MsgLen < (sizeof(FRAME_ADDBA_RSP)))
+	{
+		DBGPRINT(RT_DEBUG_ERROR,("PeerAddBARspActionSanity: ADDBA Response frame length size = %ld incorrect\n", MsgLen));
+		return FALSE;
+	}
+	/* we support immediate BA.*/
+#ifdef UNALIGNMENT_SUPPORT
+	{
+		BA_PARM		tmpBaParm;
+
+		NdisMoveMemory((PUCHAR)(&tmpBaParm), (PUCHAR)(&pAddFrame->BaParm), sizeof(BA_PARM));
+		*(USHORT *)(&tmpBaParm) = cpu2le16(*(USHORT *)(&tmpBaParm));
+		NdisMoveMemory((PUCHAR)(&pAddFrame->BaParm), (PUCHAR)(&tmpBaParm), sizeof(BA_PARM));
+	}
+#else
+	*(USHORT *)(&pAddFrame->BaParm) = cpu2le16(*(USHORT *)(&pAddFrame->BaParm));
+#endif
+	pAddFrame->StatusCode = cpu2le16(pAddFrame->StatusCode);
+	pAddFrame->TimeOutValue = cpu2le16(pAddFrame->TimeOutValue);
+
+	if (pAddFrame->BaParm.BAPolicy != IMMED_BA)
+	{
+		DBGPRINT(RT_DEBUG_ERROR,("PeerAddBAReqActionSanity: ADDBA Response Ba Policy[%d] not support\n", pAddFrame->BaParm.BAPolicy));
+		return FALSE;
+	}
+
+	return TRUE;
+
+}
+
+BOOLEAN PeerDelBAActionSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN UCHAR Wcid, 
+    IN VOID *pMsg, 
+    IN ULONG MsgLen )
+{
+	/*PFRAME_802_11 pFrame = (PFRAME_802_11)pMsg;*/
+	PFRAME_DELBA_REQ  pDelFrame;
+	if (MsgLen != (sizeof(FRAME_DELBA_REQ)))
+		return FALSE;
+	
+	if (Wcid >= MAX_LEN_OF_MAC_TABLE)
+		return FALSE;
+	
+	pDelFrame = (PFRAME_DELBA_REQ)(pMsg);
+
+	*(USHORT *)(&pDelFrame->DelbaParm) = cpu2le16(*(USHORT *)(&pDelFrame->DelbaParm));
+	pDelFrame->ReasonCode = cpu2le16(pDelFrame->ReasonCode);
+
+	return TRUE;
+}
+
+/* 
+    ==========================================================================
+    Description:
+        MLME message sanity check
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+BOOLEAN PeerBeaconAndProbeRspSanity(
+    IN PRTMP_ADAPTER pAd,
+    IN VOID *Msg, 
+    IN ULONG MsgLen, 
+    IN UCHAR  MsgChannel,
+    OUT PUCHAR pAddr2, 
+    OUT PUCHAR pBssid, 
+    OUT CHAR Ssid[], 
+    OUT UCHAR *pSsidLen, 
+    OUT UCHAR *pBssType, 
+    OUT USHORT *pBeaconPeriod, 
+    OUT UCHAR *pChannel, 
+    OUT UCHAR *pNewChannel, 
+    OUT LARGE_INTEGER *pTimestamp, 
+    OUT CF_PARM *pCfParm, 
+    OUT USHORT *pAtimWin, 
+    OUT USHORT *pCapabilityInfo, 
+    OUT UCHAR *pErp,
+    OUT UCHAR *pDtimCount, 
+    OUT UCHAR *pDtimPeriod, 
+    OUT UCHAR *pBcastFlag, 
+    OUT UCHAR *pMessageToMe, 
+    OUT UCHAR SupRate[],
+    OUT UCHAR *pSupRateLen,
+    OUT UCHAR ExtRate[],
+    OUT UCHAR *pExtRateLen,
+    OUT	UCHAR *pCkipFlag,
+    OUT	UCHAR *pAironetCellPowerLimit,
+    OUT PEDCA_PARM       pEdcaParm,
+    OUT PQBSS_LOAD_PARM  pQbssLoad,
+    OUT PQOS_CAPABILITY_PARM pQosCapability,
+    OUT ULONG *pRalinkIe,
+    OUT UCHAR		 *pHtCapabilityLen,
+#ifdef CONFIG_STA_SUPPORT
+    OUT UCHAR		 *pPreNHtCapabilityLen,
+#endif /* CONFIG_STA_SUPPORT */
+    OUT HT_CAPABILITY_IE *pHtCapability,
+    OUT EXT_CAP_INFO_ELEMENT	*pExtCapInfo,
+	OUT UCHAR		 *AddHtInfoLen,
+	OUT ADD_HT_INFO_IE *AddHtInfo,
+	OUT UCHAR *NewExtChannelOffset,		/* Ht extension channel offset(above or below)*/
+    OUT USHORT *LengthVIE,	
+    OUT	PNDIS_802_11_VARIABLE_IEs pVIE) 
+{
+    UCHAR				*Ptr;
+#ifdef CONFIG_STA_SUPPORT
+	UCHAR 				TimLen;
+#endif /* CONFIG_STA_SUPPORT */
+    PFRAME_802_11		pFrame;
+    PEID_STRUCT         pEid;
+    UCHAR				SubType;
+    UCHAR				Sanity;
+    /*UCHAR				ECWMin, ECWMax;*/
+    /*MAC_CSR9_STRUC		Csr9;*/
+    ULONG				Length = 0;
+
+	/* For some 11a AP which didn't have DS_IE, we use two conditions to decide the channel*/
+	/*	1. If the AP is 11n enabled, then check the control channel.*/
+	/*	2. If the AP didn't have any info about channel, use the channel we received this frame as the channel. (May inaccuracy!!)*/
+	UCHAR			CtrlChannel = 0;
+	
+	
+    /* Add for 3 necessary EID field check*/
+    Sanity = 0;
+
+    *pAtimWin = 0;
+    *pErp = 0;	
+    *pDtimCount = 0;
+    *pDtimPeriod = 0;
+    *pBcastFlag = 0;
+    *pMessageToMe = 0;
+    *pExtRateLen = 0;
+    *pCkipFlag = 0;			        /* Default of CkipFlag is 0*/
+    *pAironetCellPowerLimit = 0xFF;  /* Default of AironetCellPowerLimit is 0xFF*/
+    *LengthVIE = 0;					/* Set the length of VIE to init value 0*/
+    *pHtCapabilityLen = 0;					/* Set the length of VIE to init value 0*/
+#ifdef CONFIG_STA_SUPPORT
+	if (pAd->OpMode == OPMODE_STA)
+		*pPreNHtCapabilityLen = 0;					/* Set the length of VIE to init value 0*/
+#endif /* CONFIG_STA_SUPPORT */
+    *AddHtInfoLen = 0;					/* Set the length of VIE to init value 0*/
+    NdisZeroMemory(pExtCapInfo, sizeof(EXT_CAP_INFO_ELEMENT));
+    *pRalinkIe = 0;
+    *pNewChannel = 0;
+    *NewExtChannelOffset = 0xff;	/*Default 0xff means no such IE*/
+    pCfParm->bValid = FALSE;        /* default: no IE_CF found*/
+    pQbssLoad->bValid = FALSE;      /* default: no IE_QBSS_LOAD found*/
+    pEdcaParm->bValid = FALSE;      /* default: no IE_EDCA_PARAMETER found*/
+    pQosCapability->bValid = FALSE; /* default: no IE_QOS_CAPABILITY found*/
+    
+    pFrame = (PFRAME_802_11)Msg;
+    
+    /* get subtype from header*/
+    SubType = (UCHAR)pFrame->Hdr.FC.SubType;
+
+    /* get Addr2 and BSSID from header*/
+    COPY_MAC_ADDR(pAddr2, pFrame->Hdr.Addr2);
+    COPY_MAC_ADDR(pBssid, pFrame->Hdr.Addr3);
+    
+/*	hex_dump("Beacon", Msg, MsgLen);*/
+
+    Ptr = pFrame->Octet;
+    Length += LENGTH_802_11;
+    
+    /* get timestamp from payload and advance the pointer*/
+    NdisMoveMemory(pTimestamp, Ptr, TIMESTAMP_LEN);
+
+	pTimestamp->u.LowPart = cpu2le32(pTimestamp->u.LowPart);
+	pTimestamp->u.HighPart = cpu2le32(pTimestamp->u.HighPart);
+
+    Ptr += TIMESTAMP_LEN;
+    Length += TIMESTAMP_LEN;
+
+    /* get beacon interval from payload and advance the pointer*/
+    NdisMoveMemory(pBeaconPeriod, Ptr, 2);
+    Ptr += 2;
+    Length += 2;
+
+    /* get capability info from payload and advance the pointer*/
+    NdisMoveMemory(pCapabilityInfo, Ptr, 2);
+    Ptr += 2;
+    Length += 2;
+
+    if (CAP_IS_ESS_ON(*pCapabilityInfo)) 
+        *pBssType = BSS_INFRA;
+    else 
+        *pBssType = BSS_ADHOC;
+
+    pEid = (PEID_STRUCT) Ptr;
+
+    /* get variable fields from payload and advance the pointer*/
+    while ((Length + 2 + pEid->Len) <= MsgLen)    
+    {
+        
+        /* Secure copy VIE to VarIE[MAX_VIE_LEN] didn't overflow.*/
+        
+        if ((*LengthVIE + pEid->Len + 2) >= MAX_VIE_LEN)
+        {
+            DBGPRINT(RT_DEBUG_WARN, ("PeerBeaconAndProbeRspSanity - Variable IEs out of resource [len(=%d) > MAX_VIE_LEN(=%d)]\n",
+                    (*LengthVIE + pEid->Len + 2), MAX_VIE_LEN));
+            break;
+        }
+
+        switch(pEid->Eid)
+        {
+            case IE_SSID:
+                /* Already has one SSID EID in this beacon, ignore the second one*/
+                if (Sanity & 0x1)
+                    break;
+                if(pEid->Len <= MAX_LEN_OF_SSID)
+                {
+                    NdisMoveMemory(Ssid, pEid->Octet, pEid->Len);
+                    *pSsidLen = pEid->Len;
+                    Sanity |= 0x1;
+                }
+                else
+                {
+                    DBGPRINT(RT_DEBUG_TRACE, ("PeerBeaconAndProbeRspSanity - wrong IE_SSID (len=%d)\n",pEid->Len));
+                    return FALSE;
+                }
+                break;
+
+            case IE_SUPP_RATES:
+                if(pEid->Len <= MAX_LEN_OF_SUPPORTED_RATES)
+                {
+                    Sanity |= 0x2;
+                    NdisMoveMemory(SupRate, pEid->Octet, pEid->Len);
+                    *pSupRateLen = pEid->Len;
+
+                    /* TODO: 2004-09-14 not a good design here, cause it exclude extra rates */
+                    /* from ScanTab. We should report as is. And filter out unsupported*/
+                    /* rates in MlmeAux.*/
+                    /* Check against the supported rates*/
+                    /* RTMPCheckRates(pAd, SupRate, pSupRateLen);*/
+                }
+                else
+                {
+                    DBGPRINT(RT_DEBUG_TRACE, ("PeerBeaconAndProbeRspSanity - wrong IE_SUPP_RATES (len=%d)\n",pEid->Len));
+                    return FALSE;
+                }
+                break;
+
+            case IE_HT_CAP:
+			if (pEid->Len >= SIZE_HT_CAP_IE)  /*Note: allow extension.!!*/
+			{
+				NdisMoveMemory(pHtCapability, pEid->Octet, sizeof(HT_CAPABILITY_IE));
+				*pHtCapabilityLen = SIZE_HT_CAP_IE;	/* Nnow we only support 26 bytes.*/
+
+				*(USHORT *)(&pHtCapability->HtCapInfo) = cpu2le16(*(USHORT *)(&pHtCapability->HtCapInfo));
+#ifdef UNALIGNMENT_SUPPORT
+				{
+					EXT_HT_CAP_INFO extHtCapInfo;
+					NdisMoveMemory((PUCHAR)(&extHtCapInfo), (PUCHAR)(&pHtCapability->ExtHtCapInfo), sizeof(EXT_HT_CAP_INFO));
+					*(USHORT *)(&extHtCapInfo) = cpu2le16(*(USHORT *)(&extHtCapInfo));
+					NdisMoveMemory((PUCHAR)(&pHtCapability->ExtHtCapInfo), (PUCHAR)(&extHtCapInfo), sizeof(EXT_HT_CAP_INFO));
+				}
+#else
+				*(USHORT *)(&pHtCapability->ExtHtCapInfo) = cpu2le16(*(USHORT *)(&pHtCapability->ExtHtCapInfo));
+#endif /* UNALIGNMENT_SUPPORT */
+
+#ifdef CONFIG_STA_SUPPORT
+				IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+				{
+					*pPreNHtCapabilityLen = 0;	/* Now we only support 26 bytes.*/
+
+					Ptr = (PUCHAR) pVIE;
+					NdisMoveMemory(Ptr + *LengthVIE, &pEid->Eid, pEid->Len + 2);
+					*LengthVIE += (pEid->Len + 2);
+				}
+#endif /* CONFIG_STA_SUPPORT */
+			}
+			else
+			{
+				DBGPRINT(RT_DEBUG_WARN, ("PeerBeaconAndProbeRspSanity - wrong IE_HT_CAP. pEid->Len = %d\n", pEid->Len));
+			}
+			
+		break;
+            case IE_ADD_HT:
+			if (pEid->Len >= sizeof(ADD_HT_INFO_IE))				
+			{
+				/* This IE allows extension, but we can ignore extra bytes beyond our knowledge , so only*/
+				/* copy first sizeof(ADD_HT_INFO_IE)*/
+				NdisMoveMemory(AddHtInfo, pEid->Octet, sizeof(ADD_HT_INFO_IE));
+				*AddHtInfoLen = SIZE_ADD_HT_INFO_IE;
+
+				CtrlChannel = AddHtInfo->ControlChan;
+				
+				*(USHORT *)(&AddHtInfo->AddHtInfo2) = cpu2le16(*(USHORT *)(&AddHtInfo->AddHtInfo2));
+				*(USHORT *)(&AddHtInfo->AddHtInfo3) = cpu2le16(*(USHORT *)(&AddHtInfo->AddHtInfo3));
+           
+#ifdef CONFIG_STA_SUPPORT
+				IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+				{
+			                Ptr = (PUCHAR) pVIE;
+			                NdisMoveMemory(Ptr + *LengthVIE, &pEid->Eid, pEid->Len + 2);
+			                *LengthVIE += (pEid->Len + 2);
+				}
+#endif /* CONFIG_STA_SUPPORT */
+			}
+			else
+			{
+				DBGPRINT(RT_DEBUG_WARN, ("PeerBeaconAndProbeRspSanity - wrong IE_ADD_HT. \n"));
+			}
+				
+		break;
+            case IE_SECONDARY_CH_OFFSET:
+			if (pEid->Len == 1)
+			{
+				*NewExtChannelOffset = pEid->Octet[0];
+			}
+			else
+			{
+				DBGPRINT(RT_DEBUG_WARN, ("PeerBeaconAndProbeRspSanity - wrong IE_SECONDARY_CH_OFFSET. \n"));
+			}
+				
+		break;
+            case IE_FH_PARM:
+                DBGPRINT(RT_DEBUG_TRACE, ("PeerBeaconAndProbeRspSanity(IE_FH_PARM) \n"));
+                break;
+
+            case IE_DS_PARM:
+                if(pEid->Len == 1)
+                {
+                    *pChannel = *pEid->Octet;
+#ifdef CONFIG_STA_SUPPORT
+					IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+					{
+						if (ChannelSanity(pAd, *pChannel) == 0)
+						{
+							
+							return FALSE;
+						}
+					}
+#endif /* CONFIG_STA_SUPPORT */
+                    Sanity |= 0x4;
+                }
+                else
+                {
+                    DBGPRINT(RT_DEBUG_TRACE, ("PeerBeaconAndProbeRspSanity - wrong IE_DS_PARM (len=%d)\n",pEid->Len));
+                    return FALSE;
+                }
+                break;
+
+            case IE_CF_PARM:
+                if(pEid->Len == 6)
+                {
+                    pCfParm->bValid = TRUE;
+                    pCfParm->CfpCount = pEid->Octet[0];
+                    pCfParm->CfpPeriod = pEid->Octet[1];
+                    pCfParm->CfpMaxDuration = pEid->Octet[2] + 256 * pEid->Octet[3];
+                    pCfParm->CfpDurRemaining = pEid->Octet[4] + 256 * pEid->Octet[5];
+                }
+                else
+                {
+                    DBGPRINT(RT_DEBUG_TRACE, ("PeerBeaconAndProbeRspSanity - wrong IE_CF_PARM\n"));
+                    return FALSE;
+                }
+                break;
+
+            case IE_IBSS_PARM:
+                if(pEid->Len == 2)
+                {
+                    NdisMoveMemory(pAtimWin, pEid->Octet, pEid->Len);
+                }
+                else
+                {
+                    DBGPRINT(RT_DEBUG_TRACE, ("PeerBeaconAndProbeRspSanity - wrong IE_IBSS_PARM\n"));
+                    return FALSE;
+                }
+                break;
+
+#ifdef CONFIG_STA_SUPPORT
+            case IE_TIM:
+                if(INFRA_ON(pAd) && SubType == SUBTYPE_BEACON)
+                {
+                    GetTimBit((PCHAR)pEid, pAd->StaActive.Aid, &TimLen, pBcastFlag, pDtimCount, pDtimPeriod, pMessageToMe);
+                }
+                break;
+#endif /* CONFIG_STA_SUPPORT */
+            case IE_CHANNEL_SWITCH_ANNOUNCEMENT:
+                if(pEid->Len == 3)
+                {
+                	*pNewChannel = pEid->Octet[1];	/*extract new channel number*/
+                }
+                break;
+
+            /* New for WPA*/
+            /* CCX v2 has the same IE, we need to parse that too*/
+            /* Wifi WMM use the same IE vale, need to parse that too*/
+            /* case IE_WPA:*/
+            case IE_VENDOR_SPECIFIC:
+                /* Check the OUI version, filter out non-standard usage*/
+                if (NdisEqualMemory(pEid->Octet, RALINK_OUI, 3) && (pEid->Len == 7))
+                {
+                    /**pRalinkIe = pEid->Octet[3];*/
+                    if (pEid->Octet[3] != 0)
+        				*pRalinkIe = pEid->Octet[3];
+        			else
+        				*pRalinkIe = 0xf0000000; /* Set to non-zero value (can't set bit0-2) to represent this is Ralink Chip. So at linkup, we will set ralinkchip flag.*/
+                }
+#ifdef CONFIG_STA_SUPPORT
+#ifdef DOT11_N_SUPPORT
+		/* This HT IE is before IEEE draft set HT IE value.2006-09-28 by Jan.*/
+                
+                /* Other vendors had production before IE_HT_CAP value is assigned. To backward support those old-firmware AP,*/
+                /* Check broadcom-defiend pre-802.11nD1.0 OUI for HT related IE, including HT Capatilities IE and HT Information IE*/
+                else if ((*pHtCapabilityLen == 0) && NdisEqualMemory(pEid->Octet, PRE_N_HT_OUI, 3) && (pEid->Len >= 4) && (pAd->OpMode == OPMODE_STA))
+                {
+                    if ((pEid->Octet[3] == OUI_PREN_HT_CAP) && (pEid->Len >= 30) && (*pHtCapabilityLen == 0))
+                    {
+                        NdisMoveMemory(pHtCapability, &pEid->Octet[4], sizeof(HT_CAPABILITY_IE));
+                        *pPreNHtCapabilityLen = SIZE_HT_CAP_IE;
+                    }
+
+                    if ((pEid->Octet[3] == OUI_PREN_ADD_HT) && (pEid->Len >= 26))
+                    {
+                        NdisMoveMemory(AddHtInfo, &pEid->Octet[4], sizeof(ADD_HT_INFO_IE));
+                        *AddHtInfoLen = SIZE_ADD_HT_INFO_IE;
+                    }
+                }
+#endif /* DOT11_N_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+                else if (NdisEqualMemory(pEid->Octet, WPA_OUI, 4))
+                {
+                    /* Copy to pVIE which will report to bssid list.*/
+                    Ptr = (PUCHAR) pVIE;
+                    NdisMoveMemory(Ptr + *LengthVIE, &pEid->Eid, pEid->Len + 2);
+                    *LengthVIE += (pEid->Len + 2);
+                }
+                else if (NdisEqualMemory(pEid->Octet, WME_PARM_ELEM, 6) && (pEid->Len == 24))
+                {
+                    PUCHAR ptr;
+                    int i;
+
+                    /* parsing EDCA parameters*/
+                    pEdcaParm->bValid          = TRUE;
+                    pEdcaParm->bQAck           = FALSE; /* pEid->Octet[0] & 0x10;*/
+                    pEdcaParm->bQueueRequest   = FALSE; /* pEid->Octet[0] & 0x20;*/
+                    pEdcaParm->bTxopRequest    = FALSE; /* pEid->Octet[0] & 0x40;*/
+                    pEdcaParm->EdcaUpdateCount = pEid->Octet[6] & 0x0f;
+                    pEdcaParm->bAPSDCapable    = (pEid->Octet[6] & 0x80) ? 1 : 0;
+                    ptr = &pEid->Octet[8];
+                    for (i=0; i<4; i++)
+                    {
+                        UCHAR aci = (*ptr & 0x60) >> 5; /* b5~6 is AC INDEX*/
+                        pEdcaParm->bACM[aci]  = (((*ptr) & 0x10) == 0x10);   /* b5 is ACM*/
+                        pEdcaParm->Aifsn[aci] = (*ptr) & 0x0f;               /* b0~3 is AIFSN*/
+                        pEdcaParm->Cwmin[aci] = *(ptr+1) & 0x0f;             /* b0~4 is Cwmin*/
+                        pEdcaParm->Cwmax[aci] = *(ptr+1) >> 4;               /* b5~8 is Cwmax*/
+                        pEdcaParm->Txop[aci]  = *(ptr+2) + 256 * (*(ptr+3)); /* in unit of 32-us*/
+                        ptr += 4; /* point to next AC*/
+                    }
+                }
+                else if (NdisEqualMemory(pEid->Octet, WME_INFO_ELEM, 6) && (pEid->Len == 7))
+                {
+                    /* parsing EDCA parameters*/
+                    pEdcaParm->bValid          = TRUE;
+                    pEdcaParm->bQAck           = FALSE; /* pEid->Octet[0] & 0x10;*/
+                    pEdcaParm->bQueueRequest   = FALSE; /* pEid->Octet[0] & 0x20;*/
+                    pEdcaParm->bTxopRequest    = FALSE; /* pEid->Octet[0] & 0x40;*/
+                    pEdcaParm->EdcaUpdateCount = pEid->Octet[6] & 0x0f;
+                    pEdcaParm->bAPSDCapable    = (pEid->Octet[6] & 0x80) ? 1 : 0;
+
+                    /* use default EDCA parameter*/
+                    pEdcaParm->bACM[QID_AC_BE]  = 0;
+                    pEdcaParm->Aifsn[QID_AC_BE] = 3;
+                    pEdcaParm->Cwmin[QID_AC_BE] = CW_MIN_IN_BITS;
+                    pEdcaParm->Cwmax[QID_AC_BE] = CW_MAX_IN_BITS;
+                    pEdcaParm->Txop[QID_AC_BE]  = 0;
+
+                    pEdcaParm->bACM[QID_AC_BK]  = 0;
+                    pEdcaParm->Aifsn[QID_AC_BK] = 7;
+                    pEdcaParm->Cwmin[QID_AC_BK] = CW_MIN_IN_BITS;
+                    pEdcaParm->Cwmax[QID_AC_BK] = CW_MAX_IN_BITS;
+                    pEdcaParm->Txop[QID_AC_BK]  = 0;
+
+                    pEdcaParm->bACM[QID_AC_VI]  = 0;
+                    pEdcaParm->Aifsn[QID_AC_VI] = 2;
+                    pEdcaParm->Cwmin[QID_AC_VI] = CW_MIN_IN_BITS-1;
+                    pEdcaParm->Cwmax[QID_AC_VI] = CW_MAX_IN_BITS;
+                    pEdcaParm->Txop[QID_AC_VI]  = 96;   /* AC_VI: 96*32us ~= 3ms*/
+
+                    pEdcaParm->bACM[QID_AC_VO]  = 0;
+                    pEdcaParm->Aifsn[QID_AC_VO] = 2;
+                    pEdcaParm->Cwmin[QID_AC_VO] = CW_MIN_IN_BITS-2;
+                    pEdcaParm->Cwmax[QID_AC_VO] = CW_MAX_IN_BITS-1;
+                    pEdcaParm->Txop[QID_AC_VO]  = 48;   /* AC_VO: 48*32us ~= 1.5ms*/
+                }
+				else if (NdisEqualMemory(pEid->Octet, WPS_OUI, 4))
+                {
+                	/* Copy to pVIE which will report to bssid list.*/
+                    Ptr = (PUCHAR) pVIE;
+                    NdisMoveMemory(Ptr + *LengthVIE, &pEid->Eid, pEid->Len + 2);
+                    *LengthVIE += (pEid->Len + 2);
+
+					
+                }
+
+                
+                break;
+
+            case IE_EXT_SUPP_RATES:
+                if (pEid->Len <= MAX_LEN_OF_SUPPORTED_RATES)
+                {
+                    NdisMoveMemory(ExtRate, pEid->Octet, pEid->Len);
+                    *pExtRateLen = pEid->Len;
+
+                    /* TODO: 2004-09-14 not a good design here, cause it exclude extra rates */
+                    /* from ScanTab. We should report as is. And filter out unsupported*/
+                    /* rates in MlmeAux.*/
+                    /* Check against the supported rates*/
+                    /* RTMPCheckRates(pAd, ExtRate, pExtRateLen);*/
+                }
+                break;
+
+            case IE_ERP:
+                if (pEid->Len == 1)
+                {
+                    *pErp = (UCHAR)pEid->Octet[0];
+                }
+                break;
+
+            case IE_AIRONET_CKIP:
+                /* 0. Check Aironet IE length, it must be larger or equal to 28*/
+                /* Cisco AP350 used length as 28*/
+                /* Cisco AP12XX used length as 30*/
+                if (pEid->Len < (CKIP_NEGOTIATION_LENGTH - 2))
+                    break;
+
+                /* 1. Copy CKIP flag byte to buffer for process*/
+                *pCkipFlag = *(pEid->Octet + 8);				
+                break;
+
+            case IE_AP_TX_POWER:
+                /* AP Control of Client Transmit Power*/
+                /*0. Check Aironet IE length, it must be 6*/
+                if (pEid->Len != 0x06)
+                    break;
+
+                /* Get cell power limit in dBm*/
+                if (NdisEqualMemory(pEid->Octet, CISCO_OUI, 3) == 1)
+                    *pAironetCellPowerLimit = *(pEid->Octet + 4);	
+                break;
+
+            /* WPA2 & 802.11i RSN*/
+            case IE_RSN:
+                /* There is no OUI for version anymore, check the group cipher OUI before copying*/
+                if (RTMPEqualMemory(pEid->Octet + 2, RSN_OUI, 3))
+                {
+                    /* Copy to pVIE which will report to microsoft bssid list.*/
+                    Ptr = (PUCHAR) pVIE;
+                    NdisMoveMemory(Ptr + *LengthVIE, &pEid->Eid, pEid->Len + 2);
+                    *LengthVIE += (pEid->Len + 2);
+                }
+                break;
+
+#ifdef CONFIG_STA_SUPPORT
+#if defined (EXT_BUILD_CHANNEL_LIST) || defined (RT_CFG80211_SUPPORT)
+			case IE_COUNTRY:
+				Ptr = (PUCHAR) pVIE;
+                NdisMoveMemory(Ptr + *LengthVIE, &pEid->Eid, pEid->Len + 2);
+                *LengthVIE += (pEid->Len + 2);
+				break;
+#endif /* EXT_BUILD_CHANNEL_LIST */
+#endif /* CONFIG_STA_SUPPORT */
+
+            case IE_QBSS_LOAD:
+                if (pEid->Len == 5)
+                {
+                    pQbssLoad->bValid = TRUE;
+                    pQbssLoad->StaNum = pEid->Octet[0] + pEid->Octet[1] * 256;
+                    pQbssLoad->ChannelUtilization = pEid->Octet[2];
+                    pQbssLoad->RemainingAdmissionControl = pEid->Octet[3] + pEid->Octet[4] * 256;
+
+					/* Copy to pVIE*/
+                    Ptr = (PUCHAR) pVIE;
+                    NdisMoveMemory(Ptr + *LengthVIE, &pEid->Eid, pEid->Len + 2);
+                    *LengthVIE += (pEid->Len + 2);
+                }
+                break;
+                
+
+
+			case IE_EXT_CAPABILITY:
+			if (pEid->Len >= 1)
+			{
+				NdisMoveMemory(pExtCapInfo,&pEid->Octet[0], sizeof(EXT_CAP_INFO_ELEMENT) /*4*/);
+				break;
+			}
+
+            default:
+                break;
+        }
+        
+        Length = Length + 2 + pEid->Len;  /* Eid[1] + Len[1]+ content[Len]*/
+        pEid = (PEID_STRUCT)((UCHAR*)pEid + 2 + pEid->Len);        
+    }
+
+    /* For some 11a AP. it did not have the channel EID, patch here*/
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		UCHAR LatchRfChannel = MsgChannel;
+		if ((pAd->LatchRfRegs.Channel > 14) && ((Sanity & 0x4) == 0))
+		{
+			if (CtrlChannel != 0)
+				*pChannel = CtrlChannel;
+			else
+				*pChannel = LatchRfChannel;
+			Sanity |= 0x4;
+		}
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+
+	if (Sanity != 0x7)
+	{
+		DBGPRINT(RT_DEBUG_LOUD, ("PeerBeaconAndProbeRspSanity - missing field, Sanity=0x%02x\n", Sanity));
+		return FALSE;
+	}
+	else
+	{
+		return TRUE;
+	}
+
+}
+
+#ifdef DOT11N_DRAFT3
+/* 
+	==========================================================================
+	Description:
+		MLME message sanity check for some IE addressed  in 802.11n d3.03.
+	Return:
+		TRUE if all parameters are OK, FALSE otherwise
+
+	IRQL = DISPATCH_LEVEL
+
+	==========================================================================
+ */
+BOOLEAN PeerBeaconAndProbeRspSanity2(
+	IN PRTMP_ADAPTER pAd, 
+	IN VOID *Msg, 
+	IN ULONG MsgLen, 
+	IN OVERLAP_BSS_SCAN_IE *BssScan,
+	OUT UCHAR 	*RegClass)
+{
+	CHAR				*Ptr;
+	PFRAME_802_11		pFrame;
+	PEID_STRUCT			pEid;
+	ULONG				Length = 0;	
+	BOOLEAN				brc;
+
+	pFrame = (PFRAME_802_11)Msg;
+
+	*RegClass = 0;
+	Ptr = pFrame->Octet;
+	Length += LENGTH_802_11;
+
+	/* get timestamp from payload and advance the pointer*/
+	Ptr += TIMESTAMP_LEN;
+	Length += TIMESTAMP_LEN;
+
+	/* get beacon interval from payload and advance the pointer*/
+	Ptr += 2;
+	Length += 2;
+
+	/* get capability info from payload and advance the pointer*/
+	Ptr += 2;
+	Length += 2;
+
+	pEid = (PEID_STRUCT) Ptr;
+	brc = FALSE;
+
+	RTMPZeroMemory(BssScan, sizeof(OVERLAP_BSS_SCAN_IE));
+	/* get variable fields from payload and advance the pointer*/
+	while ((Length + 2 + pEid->Len) <= MsgLen)	  
+	{	
+		switch(pEid->Eid)
+		{
+			case IE_SUPP_REG_CLASS:
+				if(pEid->Len > 0)
+				{
+					*RegClass = *pEid->Octet;
+				}
+				else
+				{
+					DBGPRINT(RT_DEBUG_TRACE, ("PeerBeaconAndProbeRspSanity - wrong IE_SUPP_REG_CLASS (len=%d)\n",pEid->Len));
+				}
+				break;
+			case IE_OVERLAPBSS_SCAN_PARM:
+				if (pEid->Len == sizeof(OVERLAP_BSS_SCAN_IE))
+				{
+					brc = TRUE;
+					RTMPMoveMemory(BssScan, pEid->Octet, sizeof(OVERLAP_BSS_SCAN_IE));
+				}
+				else
+				{
+					DBGPRINT(RT_DEBUG_TRACE, ("PeerBeaconAndProbeRspSanity - wrong IE_OVERLAPBSS_SCAN_PARM (len=%d)\n",pEid->Len));
+				}
+				break;
+
+			case IE_EXT_CHANNEL_SWITCH_ANNOUNCEMENT:
+				DBGPRINT(RT_DEBUG_TRACE, ("PeerBeaconAndProbeRspSanity - IE_EXT_CHANNEL_SWITCH_ANNOUNCEMENT\n"));
+				break;
+
+		}
+
+		Length = Length + 2 + pEid->Len;  /* Eid[1] + Len[1]+ content[Len]	*/
+		pEid = (PEID_STRUCT)((UCHAR*)pEid + 2 + pEid->Len); 	   
+	}
+
+	return brc;
+
+}
+#endif /* DOT11N_DRAFT3 */
+
+#if defined(AP_SCAN_SUPPORT) || defined(CONFIG_STA_SUPPORT)
+/* 
+    ==========================================================================
+    Description:
+        MLME message sanity check
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+ */
+BOOLEAN MlmeScanReqSanity(
+	IN PRTMP_ADAPTER pAd, 
+	IN VOID *Msg, 
+	IN ULONG MsgLen, 
+	OUT UCHAR *pBssType, 
+	OUT CHAR Ssid[], 
+	OUT UCHAR *pSsidLen, 
+	OUT UCHAR *pScanType) 
+{
+	MLME_SCAN_REQ_STRUCT *Info;
+
+	Info = (MLME_SCAN_REQ_STRUCT *)(Msg);
+	*pBssType = Info->BssType;
+	*pSsidLen = Info->SsidLen;	
+	NdisMoveMemory(Ssid, Info->Ssid, *pSsidLen);
+	*pScanType = Info->ScanType;
+
+	if ((*pBssType == BSS_INFRA || *pBssType == BSS_ADHOC || *pBssType == BSS_ANY)
+		&& (*pScanType == SCAN_ACTIVE || *pScanType == SCAN_PASSIVE
+#ifdef DOT11_N_SUPPORT
+#ifdef DOT11N_DRAFT3
+		|| (*pScanType == SCAN_2040_BSS_COEXIST) 
+#endif /*DOT11N_DRAFT3 */
+#endif /* DOT11_N_SUPPORT */
+		))
+	{
+		return TRUE;
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("MlmeScanReqSanity fail - wrong BssType or ScanType\n"));
+		return FALSE;
+	}
+}
+#endif
+
+/* IRQL = DISPATCH_LEVEL*/
+UCHAR ChannelSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN UCHAR channel)
+{
+    int i;
+
+    for (i = 0; i < pAd->ChannelListNum; i ++)
+    {
+        if (channel == pAd->ChannelList[i].Channel)
+            return 1;
+    }
+    return 0;
+}
+
+/* 
+    ==========================================================================
+    Description:
+        MLME message sanity check
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+BOOLEAN PeerDeauthSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN VOID *Msg, 
+    IN ULONG MsgLen, 
+    OUT PUCHAR pAddr1, 
+    OUT PUCHAR pAddr2, 
+    OUT PUCHAR pAddr3, 
+    OUT USHORT *pReason) 
+{
+    PFRAME_802_11 pFrame = (PFRAME_802_11)Msg;
+
+	COPY_MAC_ADDR(pAddr1, pFrame->Hdr.Addr1);
+    COPY_MAC_ADDR(pAddr2, pFrame->Hdr.Addr2);
+	COPY_MAC_ADDR(pAddr3, pFrame->Hdr.Addr3);
+    NdisMoveMemory(pReason, &pFrame->Octet[0], 2);
+
+    return TRUE;
+}
+
+/* 
+    ==========================================================================
+    Description:
+        MLME message sanity check
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+BOOLEAN PeerAuthSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN VOID *Msg, 
+    IN ULONG MsgLen, 
+    OUT PUCHAR pAddr, 
+    OUT USHORT *pAlg, 
+    OUT USHORT *pSeq, 
+    OUT USHORT *pStatus, 
+    CHAR *pChlgText) 
+{
+    PFRAME_802_11 pFrame = (PFRAME_802_11)Msg;
+
+    COPY_MAC_ADDR(pAddr,   pFrame->Hdr.Addr2);
+    NdisMoveMemory(pAlg,    &pFrame->Octet[0], 2);
+    NdisMoveMemory(pSeq,    &pFrame->Octet[2], 2);
+    NdisMoveMemory(pStatus, &pFrame->Octet[4], 2);
+
+    if (*pAlg == AUTH_MODE_OPEN)
+    {
+        if (*pSeq == 1 || *pSeq == 2) 
+        {
+            return TRUE;
+        } 
+        else 
+        {
+            DBGPRINT(RT_DEBUG_TRACE, ("PeerAuthSanity fail - wrong Seg#\n"));
+            return FALSE;
+        }
+    } 
+    else if (*pAlg == AUTH_MODE_KEY) 
+    {
+        if (*pSeq == 1 || *pSeq == 4) 
+        {
+            return TRUE;
+        } 
+        else if (*pSeq == 2 || *pSeq == 3) 
+        {
+            NdisMoveMemory(pChlgText, &pFrame->Octet[8], CIPHER_TEXT_LEN);
+            return TRUE;
+        } 
+        else 
+        {
+            DBGPRINT(RT_DEBUG_TRACE, ("PeerAuthSanity fail - wrong Seg#\n"));
+            return FALSE;
+        }
+    } 
+    else 
+    {
+        DBGPRINT(RT_DEBUG_TRACE, ("PeerAuthSanity fail - wrong algorithm\n"));
+        return FALSE;
+    }
+}
+
+/* 
+    ==========================================================================
+    Description:
+        MLME message sanity check
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+ */
+BOOLEAN MlmeAuthReqSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN VOID *Msg, 
+    IN ULONG MsgLen, 
+    OUT PUCHAR pAddr, 
+    OUT ULONG *pTimeout, 
+    OUT USHORT *pAlg) 
+{
+    MLME_AUTH_REQ_STRUCT *pInfo;
+
+    pInfo  = (MLME_AUTH_REQ_STRUCT *)Msg;
+    COPY_MAC_ADDR(pAddr, pInfo->Addr);
+    *pTimeout = pInfo->Timeout;
+    *pAlg = pInfo->Alg;
+    
+    if (((*pAlg == AUTH_MODE_KEY) ||(*pAlg == AUTH_MODE_OPEN)
+     	) && 
+        ((*pAddr & 0x01) == 0)) 
+    {
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+        return TRUE;
+    } 
+    else 
+    {
+        DBGPRINT(RT_DEBUG_TRACE, ("MlmeAuthReqSanity fail - wrong algorithm\n"));
+        return FALSE;
+    }
+}
+
+/* 
+    ==========================================================================
+    Description:
+        MLME message sanity check
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+BOOLEAN MlmeAssocReqSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN VOID *Msg, 
+    IN ULONG MsgLen, 
+    OUT PUCHAR pApAddr, 
+    OUT USHORT *pCapabilityInfo, 
+    OUT ULONG *pTimeout, 
+    OUT USHORT *pListenIntv) 
+{
+    MLME_ASSOC_REQ_STRUCT *pInfo;
+
+    pInfo = (MLME_ASSOC_REQ_STRUCT *)Msg;
+    *pTimeout = pInfo->Timeout;                             /* timeout*/
+    COPY_MAC_ADDR(pApAddr, pInfo->Addr);                   /* AP address*/
+    *pCapabilityInfo = pInfo->CapabilityInfo;               /* capability info*/
+    *pListenIntv = pInfo->ListenIntv;
+    
+    return TRUE;
+}
+
+/* 
+    ==========================================================================
+    Description:
+        MLME message sanity check
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+BOOLEAN PeerDisassocSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN VOID *Msg, 
+    IN ULONG MsgLen, 
+    OUT PUCHAR pAddr2, 
+    OUT USHORT *pReason) 
+{
+    PFRAME_802_11 pFrame = (PFRAME_802_11)Msg;
+
+    COPY_MAC_ADDR(pAddr2, pFrame->Hdr.Addr2);
+    NdisMoveMemory(pReason, &pFrame->Octet[0], 2);
+
+    return TRUE;
+}
+
+/*
+	========================================================================
+	Routine Description:
+		Sanity check NetworkType (11b, 11g or 11a)
+		
+	Arguments:
+		pBss - Pointer to BSS table.
+
+	Return Value:
+        Ndis802_11DS .......(11b)
+        Ndis802_11OFDM24....(11g)
+        Ndis802_11OFDM5.....(11a)
+        
+	IRQL = DISPATCH_LEVEL
+	
+	========================================================================
+*/
+NDIS_802_11_NETWORK_TYPE NetworkTypeInUseSanity(
+    IN PBSS_ENTRY pBss)
+{
+	NDIS_802_11_NETWORK_TYPE	NetWorkType;
+	UCHAR						rate, i;
+
+	NetWorkType = Ndis802_11DS;
+	
+	if (pBss->Channel <= 14)
+	{
+		
+		/* First check support Rate.*/
+		
+		for (i = 0; i < pBss->SupRateLen; i++)
+		{
+			rate = pBss->SupRate[i] & 0x7f; /* Mask out basic rate set bit*/
+			if ((rate == 2) || (rate == 4) || (rate == 11) || (rate == 22))
+			{
+				continue;
+			}
+			else
+			{
+				
+				/* Otherwise (even rate > 108) means Ndis802_11OFDM24*/
+				
+				NetWorkType = Ndis802_11OFDM24;
+				break;
+			}	
+		}
+
+		
+		/* Second check Extend Rate.*/
+		
+		if (NetWorkType != Ndis802_11OFDM24)
+		{
+			for (i = 0; i < pBss->ExtRateLen; i++)
+			{
+				rate = pBss->SupRate[i] & 0x7f; /* Mask out basic rate set bit*/
+				if ((rate == 2) || (rate == 4) || (rate == 11) || (rate == 22))
+				{
+					continue;
+				}
+				else
+				{
+					
+					/* Otherwise (even rate > 108) means Ndis802_11OFDM24*/
+					
+					NetWorkType = Ndis802_11OFDM24;
+					break;
+				}
+			}
+		}
+	}
+	else
+	{
+		NetWorkType = Ndis802_11OFDM5;
+	}
+
+    if (pBss->HtCapabilityLen != 0)
+    {
+        if (NetWorkType == Ndis802_11OFDM5)
+            NetWorkType = Ndis802_11OFDM5_N;
+        else
+            NetWorkType = Ndis802_11OFDM24_N;
+    }
+
+	return NetWorkType;
+}	
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef QOS_DLS_SUPPORT
+BOOLEAN MlmeDlsReqSanity(
+	IN PRTMP_ADAPTER pAd, 
+    IN VOID *Msg, 
+    IN ULONG MsgLen,
+    OUT PRT_802_11_DLS *pDLS,
+    OUT PUSHORT pReason)
+{
+	MLME_DLS_REQ_STRUCT *pInfo;
+
+    pInfo = (MLME_DLS_REQ_STRUCT *)Msg;
+    
+	*pDLS = pInfo->pDLS;
+	*pReason = pInfo->Reason;
+
+	return TRUE;
+}
+#endif /* QOS_DLS_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef QOS_DLS_SUPPORT
+BOOLEAN PeerDlsReqSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN VOID *Msg, 
+    IN ULONG MsgLen,
+    OUT PUCHAR pDA,
+    OUT PUCHAR pSA,
+    OUT USHORT *pCapabilityInfo, 
+    OUT USHORT *pDlsTimeout,
+    OUT UCHAR *pRatesLen,
+    OUT UCHAR Rates[],
+	OUT UCHAR *pHtCapabilityLen,
+    OUT HT_CAPABILITY_IE *pHtCapability)
+{
+	CHAR            *Ptr;
+    PFRAME_802_11	Fr = (PFRAME_802_11)Msg;
+	PEID_STRUCT  eid_ptr;
+
+    /* to prevent caller from using garbage output value*/
+    *pCapabilityInfo	= 0;
+    *pDlsTimeout	= 0;
+	*pHtCapabilityLen = 0;
+
+    Ptr = (PCHAR)Fr->Octet;
+
+	/* offset to destination MAC address (Category and Action field)*/
+    Ptr += 2;
+
+    /* get DA from payload and advance the pointer*/
+    NdisMoveMemory(pDA, Ptr, MAC_ADDR_LEN);
+    Ptr += MAC_ADDR_LEN;
+
+    /* get SA from payload and advance the pointer*/
+    NdisMoveMemory(pSA, Ptr, MAC_ADDR_LEN);
+    Ptr += MAC_ADDR_LEN;
+
+    /* get capability info from payload and advance the pointer*/
+    NdisMoveMemory(pCapabilityInfo, Ptr, 2);
+    Ptr += 2;
+
+    /* get capability info from payload and advance the pointer*/
+    NdisMoveMemory(pDlsTimeout, Ptr, 2);
+    Ptr += 2;
+
+	/* Category and Action field + DA + SA + capability + Timeout*/
+	eid_ptr = (PEID_STRUCT) &Fr->Octet[18];	
+
+	while (((UCHAR*)eid_ptr + eid_ptr->Len + 1) < ((UCHAR*)Fr + MsgLen))
+	{
+		switch(eid_ptr->Eid)
+		{
+			case IE_SUPP_RATES:
+                if ((eid_ptr->Len <= MAX_LEN_OF_SUPPORTED_RATES) && (eid_ptr->Len > 0))
+                {
+                    NdisMoveMemory(Rates, eid_ptr->Octet, eid_ptr->Len);
+                    DBGPRINT(RT_DEBUG_TRACE, ("PeerDlsReqSanity - IE_SUPP_RATES., Len=%d. Rates[0]=%x\n",eid_ptr->Len, Rates[0]));
+                    DBGPRINT(RT_DEBUG_TRACE, ("Rates[1]=%x %x %x %x %x %x %x\n", Rates[1], Rates[2], Rates[3], Rates[4], Rates[5], Rates[6], Rates[7]));
+                    *pRatesLen = eid_ptr->Len;
+                }
+                else
+                {
+                    *pRatesLen = 8;
+					Rates[0] = 0x82;
+					Rates[1] = 0x84;
+					Rates[2] = 0x8b;
+					Rates[3] = 0x96;
+					Rates[4] = 0x12;
+					Rates[5] = 0x24;
+					Rates[6] = 0x48;
+					Rates[7] = 0x6c;
+                    DBGPRINT(RT_DEBUG_TRACE, ("PeerDlsReqSanity - wrong IE_SUPP_RATES., Len=%d\n",eid_ptr->Len));
+                }
+				break;
+
+			case IE_EXT_SUPP_RATES:
+                if (eid_ptr->Len + *pRatesLen <= MAX_LEN_OF_SUPPORTED_RATES)
+                {
+                    NdisMoveMemory(&Rates[*pRatesLen], eid_ptr->Octet, eid_ptr->Len);
+                    *pRatesLen = (*pRatesLen) + eid_ptr->Len;
+                }
+                else
+                {
+                    NdisMoveMemory(&Rates[*pRatesLen], eid_ptr->Octet, MAX_LEN_OF_SUPPORTED_RATES - (*pRatesLen));
+                    *pRatesLen = MAX_LEN_OF_SUPPORTED_RATES;
+                }
+				break;
+
+			case IE_HT_CAP:
+				if (eid_ptr->Len >= sizeof(HT_CAPABILITY_IE))
+				{
+					NdisMoveMemory(pHtCapability, eid_ptr->Octet, sizeof(HT_CAPABILITY_IE));
+
+					*(USHORT *)(&pHtCapability->HtCapInfo) = cpu2le16(*(USHORT *)(&pHtCapability->HtCapInfo));
+#ifdef UNALIGNMENT_SUPPORT
+					{
+						EXT_HT_CAP_INFO extHtCapInfo;
+
+						NdisMoveMemory((PUCHAR)(&extHtCapInfo), (PUCHAR)(&pHtCapability->ExtHtCapInfo), sizeof(EXT_HT_CAP_INFO));
+						*(USHORT *)(&extHtCapInfo) = cpu2le16(*(USHORT *)(&extHtCapInfo));
+						NdisMoveMemory((PUCHAR)(&pHtCapability->ExtHtCapInfo), (PUCHAR)(&extHtCapInfo), sizeof(EXT_HT_CAP_INFO));		
+					}
+#else				
+					*(USHORT *)(&pHtCapability->ExtHtCapInfo) = cpu2le16(*(USHORT *)(&pHtCapability->ExtHtCapInfo));
+#endif /* UNALIGNMENT_SUPPORT */
+					*pHtCapabilityLen = sizeof(HT_CAPABILITY_IE);
+
+					DBGPRINT(RT_DEBUG_TRACE, ("PeerDlsReqSanity - IE_HT_CAP\n"));
+				}
+				else
+				{
+					DBGPRINT(RT_DEBUG_TRACE, ("PeerDlsReqSanity - wrong IE_HT_CAP.eid_ptr->Len = %d\n", eid_ptr->Len));
+				}
+				break;
+
+			default:
+				break;
+		}
+
+		eid_ptr = (PEID_STRUCT)((UCHAR*)eid_ptr + 2 + eid_ptr->Len);
+	}
+
+    return TRUE;
+}
+
+BOOLEAN PeerDlsRspSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN VOID *Msg, 
+    IN ULONG MsgLen,
+    OUT PUCHAR pDA,
+    OUT PUCHAR pSA,
+    OUT USHORT *pCapabilityInfo, 
+    OUT USHORT *pStatus,
+    OUT UCHAR *pRatesLen,
+    OUT UCHAR Rates[],
+    OUT UCHAR *pHtCapabilityLen,
+    OUT HT_CAPABILITY_IE *pHtCapability) 
+{
+    CHAR            *Ptr;
+    PFRAME_802_11	Fr = (PFRAME_802_11)Msg;
+	PEID_STRUCT  eid_ptr;
+
+    /* to prevent caller from using garbage output value*/
+	if (pStatus)
+    *pStatus		= 0;
+    *pCapabilityInfo	= 0;
+	*pHtCapabilityLen = 0;
+
+    Ptr = (PCHAR)Fr->Octet;
+
+	/* offset to destination MAC address (Category and Action field)*/
+    Ptr += 2;
+
+	/* get status code from payload and advance the pointer*/
+	if (pStatus)
+		NdisMoveMemory(pStatus, Ptr, 2);
+    Ptr += 2;
+
+    /* get DA from payload and advance the pointer*/
+    NdisMoveMemory(pDA, Ptr, MAC_ADDR_LEN);
+    Ptr += MAC_ADDR_LEN;
+
+    /* get SA from payload and advance the pointer*/
+    NdisMoveMemory(pSA, Ptr, MAC_ADDR_LEN);
+    Ptr += MAC_ADDR_LEN;
+
+	if (pStatus == 0)
+	{
+	    /* get capability info from payload and advance the pointer*/
+	    NdisMoveMemory(pCapabilityInfo, Ptr, 2);
+	    Ptr += 2;
+	}
+
+	/* Category and Action field + status code + DA + SA + capability*/
+	eid_ptr = (PEID_STRUCT) &Fr->Octet[18];	
+
+	while (((UCHAR*)eid_ptr + eid_ptr->Len + 1) < ((UCHAR*)Fr + MsgLen))
+	{
+		switch(eid_ptr->Eid)
+		{
+			case IE_SUPP_RATES:
+                if ((eid_ptr->Len <= MAX_LEN_OF_SUPPORTED_RATES) && (eid_ptr->Len > 0))
+                {
+                    NdisMoveMemory(Rates, eid_ptr->Octet, eid_ptr->Len);
+                    DBGPRINT(RT_DEBUG_TRACE, ("PeerDlsRspSanity - IE_SUPP_RATES., Len=%d. Rates[0]=%x\n",eid_ptr->Len, Rates[0]));
+                    DBGPRINT(RT_DEBUG_TRACE, ("Rates[1]=%x %x %x %x %x %x %x\n", Rates[1], Rates[2], Rates[3], Rates[4], Rates[5], Rates[6], Rates[7]));
+                    *pRatesLen = eid_ptr->Len;
+                }
+                else
+                {
+                    *pRatesLen = 8;
+					Rates[0] = 0x82;
+					Rates[1] = 0x84;
+					Rates[2] = 0x8b;
+					Rates[3] = 0x96;
+					Rates[4] = 0x12;
+					Rates[5] = 0x24;
+					Rates[6] = 0x48;
+					Rates[7] = 0x6c;
+                    DBGPRINT(RT_DEBUG_TRACE, ("PeerDlsRspSanity - wrong IE_SUPP_RATES., Len=%d\n",eid_ptr->Len));
+                }
+				break;
+
+			case IE_EXT_SUPP_RATES:
+                if (eid_ptr->Len + *pRatesLen <= MAX_LEN_OF_SUPPORTED_RATES)
+                {
+                    NdisMoveMemory(&Rates[*pRatesLen], eid_ptr->Octet, eid_ptr->Len);
+                    *pRatesLen = (*pRatesLen) + eid_ptr->Len;
+                }
+                else
+                {
+                    NdisMoveMemory(&Rates[*pRatesLen], eid_ptr->Octet, MAX_LEN_OF_SUPPORTED_RATES - (*pRatesLen));
+                    *pRatesLen = MAX_LEN_OF_SUPPORTED_RATES;
+                }
+				break;
+
+			case IE_HT_CAP:
+				if (eid_ptr->Len >= sizeof(HT_CAPABILITY_IE))
+				{
+					NdisMoveMemory(pHtCapability, eid_ptr->Octet, sizeof(HT_CAPABILITY_IE));
+
+					*(USHORT *)(&pHtCapability->HtCapInfo) = cpu2le16(*(USHORT *)(&pHtCapability->HtCapInfo));
+#ifdef UNALIGNMENT_SUPPORT
+					{
+						EXT_HT_CAP_INFO extHtCapInfo;
+
+						NdisMoveMemory((PUCHAR)(&extHtCapInfo), (PUCHAR)(&pHtCapability->ExtHtCapInfo), sizeof(EXT_HT_CAP_INFO));
+						*(USHORT *)(&extHtCapInfo) = cpu2le16(*(USHORT *)(&extHtCapInfo));
+						NdisMoveMemory((PUCHAR)(&pHtCapability->ExtHtCapInfo), (PUCHAR)(&extHtCapInfo), sizeof(EXT_HT_CAP_INFO));		
+					}
+#else				
+					*(USHORT *)(&pHtCapability->ExtHtCapInfo) = cpu2le16(*(USHORT *)(&pHtCapability->ExtHtCapInfo));
+#endif /* UNALIGNMENT_SUPPORT */
+					*pHtCapabilityLen = sizeof(HT_CAPABILITY_IE);
+
+					DBGPRINT(RT_DEBUG_TRACE, ("PeerDlsRspSanity - IE_HT_CAP\n"));
+				}
+				else
+				{
+					DBGPRINT(RT_DEBUG_TRACE, ("PeerDlsRspSanity - wrong IE_HT_CAP.eid_ptr->Len = %d\n", eid_ptr->Len));
+				}
+				break;
+
+			default:
+				break;
+		}
+
+		eid_ptr = (PEID_STRUCT)((UCHAR*)eid_ptr + 2 + eid_ptr->Len);
+	}
+
+    return TRUE;
+}
+
+BOOLEAN PeerDlsTearDownSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN VOID *Msg, 
+    IN ULONG MsgLen,
+    OUT PUCHAR pDA,
+    OUT PUCHAR pSA,
+    OUT USHORT *pReason) 
+{
+    CHAR            *Ptr;
+    PFRAME_802_11	Fr = (PFRAME_802_11)Msg;
+
+    /* to prevent caller from using garbage output value*/
+    *pReason	= 0;
+
+    Ptr = (PCHAR)Fr->Octet;
+
+	/* offset to destination MAC address (Category and Action field)*/
+    Ptr += 2;
+
+    /* get DA from payload and advance the pointer*/
+    NdisMoveMemory(pDA, Ptr, MAC_ADDR_LEN);
+    Ptr += MAC_ADDR_LEN;
+
+    /* get SA from payload and advance the pointer*/
+    NdisMoveMemory(pSA, Ptr, MAC_ADDR_LEN);
+    Ptr += MAC_ADDR_LEN;
+
+	/* get reason code from payload and advance the pointer*/
+    NdisMoveMemory(pReason, Ptr, 2);
+    Ptr += 2;
+
+    return TRUE;
+}
+#endif /* QOS_DLS_SUPPORT */
+
+/* 
+    ==========================================================================
+    Description:
+        MLME message sanity check
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+ */
+BOOLEAN PeerProbeReqSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN VOID *Msg, 
+    IN ULONG MsgLen, 
+    OUT PUCHAR pAddr2,
+    OUT CHAR Ssid[], 
+    OUT UCHAR *SsidLen, 
+    OUT BOOLEAN *bRssiRequested)
+{
+    PFRAME_802_11 Fr = (PFRAME_802_11)Msg;
+    UCHAR		*Ptr;
+    UCHAR		eid =0, eid_len = 0, *eid_data;
+	UINT		total_ie_len = 0;	
+
+    /* to prevent caller from using garbage output value*/
+    *SsidLen = 0;
+
+    COPY_MAC_ADDR(pAddr2, &Fr->Hdr.Addr2);
+
+    if (Fr->Octet[0] != IE_SSID || Fr->Octet[1] > MAX_LEN_OF_SSID) 
+    {
+        DBGPRINT(RT_DEBUG_TRACE, ("APPeerProbeReqSanity fail - wrong SSID IE\n"));
+        return FALSE;
+    } 
+    
+    *SsidLen = Fr->Octet[1];
+    NdisMoveMemory(Ssid, &Fr->Octet[2], *SsidLen);
+	
+
+    Ptr = Fr->Octet;
+    eid = Ptr[0];
+    eid_len = Ptr[1];
+	total_ie_len = eid_len + 2;
+	eid_data = Ptr+2;
+    
+    /* get variable fields from payload and advance the pointer*/
+	while((eid_data + eid_len) <= ((UCHAR*)Fr + MsgLen))
+    {    	
+        switch(eid)
+        {
+	        case IE_VENDOR_SPECIFIC:
+				if (eid_len <= 4)
+					break;
+#ifdef RSSI_FEEDBACK
+                if (bRssiRequested && NdisEqualMemory(eid_data, RALINK_OUI, 3) && (eid_len == 7))
+                {
+					if (*(eid_data + 3/* skip RALINK_OUI */) & 0x8)
+                    	*bRssiRequested = TRUE;
+                    break;
+                }
+#endif /* RSSI_FEEDBACK */
+
+                if (NdisEqualMemory(eid_data, WPS_OUI, 4))
+                {
+
+                    break;
+                }
+
+            default:
+                break;
+        }
+		eid = Ptr[total_ie_len];
+    	eid_len = Ptr[total_ie_len + 1];
+		eid_data = Ptr + total_ie_len + 2;
+		total_ie_len += (eid_len + 2);
+	}
+
+
+    return TRUE;
+}
+
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_sync.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_sync.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_sync.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_sync.c	2017-09-23 03:42:49.730675944 +0800
@@ -0,0 +1,850 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+/*BaSizeArray follows the 802.11n definition as MaxRxFactor.  2^(13+factor) bytes. When factor =0, it's about Ba buffer size =8.*/
+UCHAR BaSizeArray[4] = {8,16,32,64};
+
+
+extern COUNTRY_REGION_CH_DESC Country_Region_ChDesc_2GHZ[];
+extern UINT16 const Country_Region_GroupNum_2GHZ;
+extern COUNTRY_REGION_CH_DESC Country_Region_ChDesc_5GHZ[];
+extern UINT16 const Country_Region_GroupNum_5GHZ;
+
+/* 
+	==========================================================================
+	Description:
+		Update StaCfg->ChannelList[] according to 1) Country Region 2) RF IC type,
+		and 3) PHY-mode user selected.
+		The outcome is used by driver when doing site survey.
+
+	IRQL = PASSIVE_LEVEL
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+ */
+VOID BuildChannelList(
+	IN PRTMP_ADAPTER pAd)
+{
+	UCHAR i, j, index=0, num=0;
+	PCH_DESC pChDesc = NULL;
+	BOOLEAN bRegionFound = FALSE;
+	PUCHAR pChannelList;
+	PUCHAR pChannelListFlag;
+
+	NdisZeroMemory(pAd->ChannelList, MAX_NUM_OF_CHANNELS * sizeof(CHANNEL_TX_POWER));
+
+	/* if not 11a-only mode, channel list starts from 2.4Ghz band*/
+	if ((pAd->CommonCfg.PhyMode != PHY_11A) 
+#ifdef DOT11_N_SUPPORT
+		&& (pAd->CommonCfg.PhyMode != PHY_11AN_MIXED) && (pAd->CommonCfg.PhyMode != PHY_11N_5G)
+#endif /* DOT11_N_SUPPORT */
+	)
+	{
+		for (i = 0; i < Country_Region_GroupNum_2GHZ; i++)
+		{
+			if ((pAd->CommonCfg.CountryRegion & 0x7f) ==
+				Country_Region_ChDesc_2GHZ[i].RegionIndex)
+			{
+				pChDesc = Country_Region_ChDesc_2GHZ[i].pChDesc;
+				num = TotalChNum(pChDesc);
+				bRegionFound = TRUE;
+				break;
+			}
+		}
+
+		if (!bRegionFound)
+		{
+			DBGPRINT(RT_DEBUG_ERROR,("CountryRegion=%d not support", pAd->CommonCfg.CountryRegion));
+			return;		
+		}
+
+		if (num > 0)
+		{
+			os_alloc_mem(NULL, (UCHAR **)&pChannelList, num * sizeof(UCHAR));
+
+			if (!pChannelList)
+			{
+				DBGPRINT(RT_DEBUG_ERROR,("%s:Allocate memory for ChannelList failed\n", __FUNCTION__));
+				return;
+			}
+
+			os_alloc_mem(NULL, (UCHAR **)&pChannelListFlag, num * sizeof(UCHAR));
+
+			if (!pChannelListFlag)
+			{
+				DBGPRINT(RT_DEBUG_ERROR,("%s:Allocate memory for ChannelListFlag failed\n", __FUNCTION__));
+				os_free_mem(NULL, pChannelList);
+				return;	
+			}
+
+			for (i = 0; i < num; i++)
+			{
+				pChannelList[i] = GetChannel_2GHZ(pChDesc, i);
+				pChannelListFlag[i] = GetChannelFlag(pChDesc, i);
+			}
+
+			for (i = 0; i < num; i++)
+			{
+				for (j = 0; j < MAX_NUM_OF_CHANNELS; j++)
+				{
+					if (pChannelList[i] == pAd->TxPower[j].Channel)
+						NdisMoveMemory(&pAd->ChannelList[index+i], &pAd->TxPower[j], sizeof(CHANNEL_TX_POWER));
+						pAd->ChannelList[index + i].Flags = pChannelListFlag[i];
+				}
+
+				pAd->ChannelList[index+i].MaxTxPwr = 20;
+			}
+
+			index += num;
+
+			os_free_mem(NULL, pChannelList);
+			os_free_mem(NULL, pChannelListFlag);
+		}
+		bRegionFound = FALSE;
+		num = 0;
+	}
+
+	if ((pAd->CommonCfg.PhyMode == PHY_11A) || (pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) 
+#ifdef DOT11_N_SUPPORT
+		|| (pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED) || (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED) 
+		|| (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED) || (pAd->CommonCfg.PhyMode == PHY_11N_5G)
+#endif /* DOT11_N_SUPPORT */
+	)
+	{
+		for (i = 0; i < Country_Region_GroupNum_5GHZ; i++)
+		{
+			if ((pAd->CommonCfg.CountryRegionForABand & 0x7f) ==
+				Country_Region_ChDesc_5GHZ[i].RegionIndex)
+			{
+				pChDesc = Country_Region_ChDesc_5GHZ[i].pChDesc;
+				num = TotalChNum(pChDesc);
+				bRegionFound = TRUE;
+				break;
+			}
+		}
+
+		if (!bRegionFound)
+		{
+			DBGPRINT(RT_DEBUG_ERROR,("CountryRegionABand=%d not support", pAd->CommonCfg.CountryRegionForABand));
+			return;
+		}
+
+		if (num > 0)
+		{
+			UCHAR RadarCh[15]={52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140};
+			os_alloc_mem(NULL, (UCHAR **)&pChannelList, num * sizeof(UCHAR));
+
+			if (!pChannelList)
+			{
+				DBGPRINT(RT_DEBUG_ERROR,("%s:Allocate memory for ChannelList failed\n", __FUNCTION__));
+				return;
+			}
+
+			os_alloc_mem(NULL, (UCHAR **)&pChannelListFlag, num * sizeof(UCHAR));
+
+			if (!pChannelListFlag)
+			{
+				DBGPRINT(RT_DEBUG_ERROR,("%s:Allocate memory for ChannelListFlag failed\n", __FUNCTION__));
+				os_free_mem(NULL, pChannelList);
+				return;
+			}
+
+			for (i = 0; i < num; i++)
+			{
+				pChannelList[i] = GetChannel_5GHZ(pChDesc, i);
+				pChannelListFlag[i] = GetChannelFlag(pChDesc, i);
+			}
+
+			for (i=0; i<num; i++)
+			{
+				for (j=0; j<MAX_NUM_OF_CHANNELS; j++)
+				{
+					if (pChannelList[i] == pAd->TxPower[j].Channel)
+						NdisMoveMemory(&pAd->ChannelList[index+i], &pAd->TxPower[j], sizeof(CHANNEL_TX_POWER));
+						pAd->ChannelList[index + i].Flags = pChannelListFlag[i];
+				}
+
+				for (j=0; j<15; j++)
+				{
+					if (pChannelList[i] == RadarCh[j])
+						pAd->ChannelList[index+i].DfsReq = TRUE;
+				}
+				pAd->ChannelList[index+i].MaxTxPwr = 20;
+			}
+			index += num;
+
+			os_free_mem(NULL, pChannelList);
+			os_free_mem(NULL, pChannelListFlag);
+		}
+	}
+
+	pAd->ChannelListNum = index;	
+	DBGPRINT(RT_DEBUG_TRACE,("country code=%d/%d, RFIC=%d, PHY mode=%d, support %d channels\n", 
+		pAd->CommonCfg.CountryRegion, pAd->CommonCfg.CountryRegionForABand, pAd->RfIcType, pAd->CommonCfg.PhyMode, pAd->ChannelListNum));
+
+
+#ifdef DBG	
+	for (i=0;i<pAd->ChannelListNum;i++)
+	{
+		DBGPRINT_RAW(RT_DEBUG_TRACE,("BuildChannel # %d :: Pwr0 = %d, Pwr1 =%d, Flags = %x\n ", 
+									 pAd->ChannelList[i].Channel, 
+									 pAd->ChannelList[i].Power, 
+									 pAd->ChannelList[i].Power2, 
+									 pAd->ChannelList[i].Flags));
+	}
+#endif
+}
+
+/* 
+	==========================================================================
+	Description:
+		This routine return the first channel number according to the country 
+		code selection and RF IC selection (signal band or dual band). It is called
+		whenever driver need to start a site survey of all supported channels.
+	Return:
+		ch - the first channel number of current country code setting
+
+	IRQL = PASSIVE_LEVEL
+
+	==========================================================================
+ */
+UCHAR FirstChannel(
+	IN PRTMP_ADAPTER pAd)
+{
+	return pAd->ChannelList[0].Channel;
+}
+
+/* 
+	==========================================================================
+	Description:
+		This routine returns the next channel number. This routine is called
+		during driver need to start a site survey of all supported channels.
+	Return:
+		next_channel - the next channel number valid in current country code setting.
+	Note:
+		return 0 if no more next channel
+	==========================================================================
+ */
+UCHAR NextChannel(
+	IN PRTMP_ADAPTER pAd, 
+	IN UCHAR channel)
+{
+	int i;
+	UCHAR next_channel = 0;
+			
+	for (i = 0; i < (pAd->ChannelListNum - 1); i++)
+	{
+		if (channel == pAd->ChannelList[i].Channel)
+		{
+#ifdef DOT11_N_SUPPORT
+#ifdef DOT11N_DRAFT3
+			/* Only scan effected channel if this is a SCAN_2040_BSS_COEXIST*/
+			/* 2009 PF#2: Nee to handle the second channel of AP fall into affected channel range.*/
+			if ((pAd->MlmeAux.ScanType == SCAN_2040_BSS_COEXIST) && (pAd->ChannelList[i+1].Channel >14))
+			{
+				channel = pAd->ChannelList[i+1].Channel;
+				continue;
+			}
+			else
+#endif /* DOT11N_DRAFT3 */
+#endif /* DOT11_N_SUPPORT */
+			{
+				/* Record this channel's idx in ChannelList array.*/
+			next_channel = pAd->ChannelList[i+1].Channel;
+			break;
+	}
+		}
+		
+	}
+	return next_channel;
+}
+
+/* 
+	==========================================================================
+	Description:
+		This routine is for Cisco Compatible Extensions 2.X 
+		Spec31. AP Control of Client Transmit Power
+	Return:
+		None
+	Note:
+	   Required by Aironet dBm(mW)
+		   0dBm(1mW),   1dBm(5mW), 13dBm(20mW), 15dBm(30mW),
+		  17dBm(50mw), 20dBm(100mW)
+
+	   We supported 
+		   3dBm(Lowest), 6dBm(10%), 9dBm(25%), 12dBm(50%),
+		  14dBm(75%),   15dBm(100%)
+
+		The client station's actual transmit power shall be within +/- 5dB of
+		the minimum value or next lower value.
+	==========================================================================
+ */
+VOID ChangeToCellPowerLimit(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR         AironetCellPowerLimit)
+{
+	/*valud 0xFF means that hasn't found power limit information */
+	/*from the AP's Beacon/Probe response.*/
+	if (AironetCellPowerLimit == 0xFF)
+		return;  
+	
+	if (AironetCellPowerLimit < 6) /*Used Lowest Power Percentage.*/
+		pAd->CommonCfg.TxPowerPercentage = 6; 
+	else if (AironetCellPowerLimit < 9)
+		pAd->CommonCfg.TxPowerPercentage = 10;
+	else if (AironetCellPowerLimit < 12)
+		pAd->CommonCfg.TxPowerPercentage = 25;
+	else if (AironetCellPowerLimit < 14)
+		pAd->CommonCfg.TxPowerPercentage = 50;
+	else if (AironetCellPowerLimit < 15)
+		pAd->CommonCfg.TxPowerPercentage = 75;
+	else
+		pAd->CommonCfg.TxPowerPercentage = 100; /*else used maximum*/
+
+	if (pAd->CommonCfg.TxPowerPercentage > pAd->CommonCfg.TxPowerDefault)
+		pAd->CommonCfg.TxPowerPercentage = pAd->CommonCfg.TxPowerDefault;
+	
+}
+
+CHAR	ConvertToRssi(
+	IN PRTMP_ADAPTER	pAd,
+	IN CHAR				Rssi,
+	IN UCHAR			RssiNumber)
+{
+	UCHAR	RssiOffset, LNAGain;
+
+	/* Rssi equals to zero should be an invalid value*/
+	if (Rssi == 0)
+		return -99;
+
+	LNAGain = GET_LNA_GAIN(pAd);
+    if (pAd->LatchRfRegs.Channel > 14)
+    {
+        if (RssiNumber == 0)
+			RssiOffset = pAd->ARssiOffset0;
+		else if (RssiNumber == 1)
+			RssiOffset = pAd->ARssiOffset1;
+		else
+			RssiOffset = pAd->ARssiOffset2;
+    }
+    else
+    {
+        if (RssiNumber == 0)
+			RssiOffset = pAd->BGRssiOffset0;
+		else if (RssiNumber == 1)
+			RssiOffset = pAd->BGRssiOffset1;
+		else
+			RssiOffset = pAd->BGRssiOffset2;
+    }
+	
+    return (-12 - RssiOffset - LNAGain - Rssi);
+}
+
+CHAR	ConvertToSnr(
+	IN PRTMP_ADAPTER	pAd,
+	IN UCHAR				Snr)	
+{
+	if (pAd->chipCap.SnrFormula == SNR_FORMULA2)
+	{
+		return (Snr * 3 + 8) >> 4;
+	}
+	else
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+/* Maybe someday SNR_FORMULA3 should open to other chipsets. */
+	if (pAd->chipCap.SnrFormula == SNR_FORMULA3)
+	{
+		return (Snr * 3 / 16 ); /* * 0.1881 */
+	}
+	else
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+	{
+		return ((0xeb	- Snr) * 3) /	16 ;
+	}
+}
+
+#if defined(AP_SCAN_SUPPORT) || defined(CONFIG_STA_SUPPORT)
+/*
+	==========================================================================
+	Description:
+		Scan next channel
+	==========================================================================
+ */
+VOID ScanNextChannel(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR OpMode) 
+{
+	HEADER_802_11   Hdr80211;
+	PUCHAR          pOutBuffer = NULL;
+	NDIS_STATUS     NStatus;
+	ULONG           FrameLen = 0;
+	UCHAR           SsidLen = 0, ScanType = pAd->MlmeAux.ScanType, BBPValue = 0;
+#ifdef CONFIG_STA_SUPPORT
+	USHORT          Status;
+/*	PHEADER_802_11  pHdr80211;  no use*/
+#endif /* CONFIG_STA_SUPPORT */
+	UINT			ScanTimeIn5gChannel = SHORT_CHANNEL_TIME;
+	BOOLEAN			ScanPending = FALSE;
+
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		if (MONITOR_ON(pAd))
+			return;
+	}
+
+	ScanPending = ((pAd->StaCfg.bImprovedScan) && (pAd->StaCfg.ScanChannelCnt>=7));
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef RALINK_ATE
+	/* Nothing to do in ATE mode. */
+	if (ATE_ON(pAd))
+		return;
+#endif /* RALINK_ATE */
+
+	if ((pAd->MlmeAux.Channel == 0) || ScanPending) 
+	{
+		if ((pAd->CommonCfg.BBPCurrentBW == BW_40) &&
+			((OpMode == OPMODE_AP)
+#ifdef CONFIG_STA_SUPPORT
+				|| (INFRA_ON(pAd) || ADHOC_ON(pAd)
+			)
+#endif /* CONFIG_STA_SUPPORT */
+			))
+		{
+			AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
+			AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
+			RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
+			BBPValue &= (~0x18);
+			BBPValue |= 0x10;
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
+			DBGPRINT(RT_DEBUG_TRACE, ("SYNC - End of SCAN, restore to 40MHz channel %d, Total BSS[%02d]\n",pAd->CommonCfg.CentralChannel, pAd->ScanTab.BssNr));
+		}
+		else
+		{
+			AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
+			AsicLockChannel(pAd, pAd->CommonCfg.Channel);
+			DBGPRINT(RT_DEBUG_TRACE, ("SYNC - End of SCAN, restore to channel %d, Total BSS[%02d]\n",pAd->CommonCfg.Channel, pAd->ScanTab.BssNr));
+		}
+		
+#ifdef CONFIG_STA_SUPPORT
+		if (OpMode == OPMODE_STA)
+		{
+
+			/*
+				If all peer Ad-hoc clients leave, driver would do LinkDown and LinkUp.
+				In LinkUp, CommonCfg.Ssid would copy SSID from MlmeAux. 
+				To prevent SSID is zero or wrong in Beacon, need to recover MlmeAux.SSID here.
+			*/
+			if (ADHOC_ON(pAd))
+			{
+				NdisZeroMemory(pAd->MlmeAux.Ssid, MAX_LEN_OF_SSID);
+				pAd->MlmeAux.SsidLen = pAd->CommonCfg.SsidLen;
+				NdisMoveMemory(pAd->MlmeAux.Ssid, pAd->CommonCfg.Ssid, pAd->CommonCfg.SsidLen);
+			}
+		
+			
+			/* To prevent data lost.*/
+			/* Send an NULL data with turned PSM bit on to current associated AP before SCAN progress.*/
+			/* Now, we need to send an NULL data with turned PSM bit off to AP, when scan progress done */
+			
+			if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED) && (INFRA_ON(pAd)))
+			{
+				RTMPSendNullFrame(pAd, 
+								  pAd->CommonCfg.TxRate, 
+								  (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_WMM_INUSED) ? TRUE:FALSE));
+				DBGPRINT(RT_DEBUG_TRACE, ("%s -- Send PSM Data frame\n", __FUNCTION__));
+			}
+
+			/* keep the latest scan channel, could be 0 for scan complete, or other channel*/
+			pAd->StaCfg.LastScanChannel = pAd->MlmeAux.Channel;
+
+			pAd->StaCfg.ScanChannelCnt = 0;
+
+			/* Suspend scanning and Resume TxData for Fast Scanning*/
+			if ((pAd->MlmeAux.Channel != 0) &&
+				(pAd->StaCfg.bImprovedScan))	/* it is scan pending*/
+			{
+				pAd->Mlme.SyncMachine.CurrState = SCAN_PENDING;
+				Status = MLME_SUCCESS;
+				DBGPRINT(RT_DEBUG_WARN, ("bFastRoamingScan ~~~~~~~~~~~~~ Get back to send data ~~~~~~~~~~~~~\n"));
+
+				RTMPResumeMsduTransmission(pAd);
+			}
+			else
+			{
+				pAd->StaCfg.BssNr = pAd->ScanTab.BssNr;
+				pAd->StaCfg.bImprovedScan = FALSE;
+
+				pAd->Mlme.SyncMachine.CurrState = SYNC_IDLE;
+				Status = MLME_SUCCESS;
+				MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_SCAN_CONF, 2, &Status, 0);
+
+			}
+
+#ifdef LINUX
+#ifdef RT_CFG80211_SUPPORT
+			RTEnqueueInternalCmd(pAd, CMDTHREAD_SCAN_END, NULL, 0);
+#endif /* RT_CFG80211_SUPPORT */
+#endif /* LINUX */
+		}
+#endif /* CONFIG_STA_SUPPORT */
+
+
+	} 
+#ifdef RTMP_MAC_USB
+#ifdef CONFIG_STA_SUPPORT
+	else if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST) &&
+		(OpMode == OPMODE_STA))
+	{
+		pAd->Mlme.SyncMachine.CurrState = SYNC_IDLE;
+		MlmeCntlConfirm(pAd, MT2_SCAN_CONF, MLME_FAIL_NO_RESOURCE);
+	}	
+#endif /* CONFIG_STA_SUPPORT */
+#endif /* RTMP_MAC_USB */
+	else 
+	{
+#ifdef CONFIG_STA_SUPPORT
+		if (OpMode == OPMODE_STA)
+		{
+			/* BBP and RF are not accessible in PS mode, we has to wake them up first*/
+			if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE))
+				AsicForceWakeup(pAd, TRUE);
+
+			/* leave PSM during scanning. otherwise we may lost ProbeRsp & BEACON*/
+			if (pAd->StaCfg.Psm == PWR_SAVE)
+				RTMP_SET_PSM_BIT(pAd, PWR_ACTIVE);
+		}
+#endif /* CONFIG_STA_SUPPORT */
+
+		AsicSwitchChannel(pAd, pAd->MlmeAux.Channel, TRUE);
+		AsicLockChannel(pAd, pAd->MlmeAux.Channel);
+
+#ifdef CONFIG_STA_SUPPORT
+		if (OpMode == OPMODE_STA)
+		{
+			if (pAd->MlmeAux.Channel > 14)
+			{
+				if ((pAd->CommonCfg.bIEEE80211H == 1) && RadarChannelCheck(pAd, pAd->MlmeAux.Channel))
+				{
+					ScanType = SCAN_PASSIVE;
+					ScanTimeIn5gChannel = MIN_CHANNEL_TIME;
+				}
+			}
+
+#ifdef CARRIER_DETECTION_SUPPORT /* Roger sync Carrier*/
+			/* carrier detection*/
+			if (pAd->CommonCfg.CarrierDetect.Enable == TRUE)
+			{
+				ScanType = SCAN_PASSIVE;
+				ScanTimeIn5gChannel = MIN_CHANNEL_TIME;
+			}
+#endif /* CARRIER_DETECTION_SUPPORT */ 
+		}
+
+#endif /* CONFIG_STA_SUPPORT */
+
+		/* Check if channel if passive scan under current regulatory domain */
+		if (CHAN_PropertyCheck(pAd, pAd->MlmeAux.Channel, CHANNEL_PASSIVE_SCAN) == TRUE)
+			ScanType = SCAN_PASSIVE;
+
+		/* We need to shorten active scan time in order for WZC connect issue*/
+		/* Chnage the channel scan time for CISCO stuff based on its IAPP announcement*/
+		if (ScanType == FAST_SCAN_ACTIVE)
+			RTMPSetTimer(&pAd->MlmeAux.ScanTimer, FAST_ACTIVE_SCAN_TIME);
+		else /* must be SCAN_PASSIVE or SCAN_ACTIVE*/
+		{
+#ifdef CONFIG_STA_SUPPORT
+			pAd->StaCfg.ScanChannelCnt++;
+#endif /* CONFIG_STA_SUPPORT */
+			if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) 
+#ifdef DOT11_N_SUPPORT
+				|| (pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED) || (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED)
+#endif /* DOT11_N_SUPPORT */
+			)
+			{
+				{
+					if (pAd->MlmeAux.Channel > 14)
+					{
+						if (OpMode == OPMODE_AP)
+							RTMPSetTimer(&pAd->MlmeAux.APScanTimer, ScanTimeIn5gChannel);
+						else
+						RTMPSetTimer(&pAd->MlmeAux.ScanTimer, ScanTimeIn5gChannel);
+					}
+					else
+					{
+						if (OpMode == OPMODE_AP)
+							RTMPSetTimer(&pAd->MlmeAux.APScanTimer, MIN_CHANNEL_TIME);
+						else	
+						RTMPSetTimer(&pAd->MlmeAux.ScanTimer, MIN_CHANNEL_TIME);
+					}
+				}
+			}
+			else
+			{
+				{
+					if (OpMode == OPMODE_AP)
+						RTMPSetTimer(&pAd->MlmeAux.APScanTimer, MAX_CHANNEL_TIME);
+					else
+					RTMPSetTimer(&pAd->MlmeAux.ScanTimer, MAX_CHANNEL_TIME);
+				}
+			}
+		}
+		if ((ScanType == SCAN_ACTIVE)
+			|| (ScanType == FAST_SCAN_ACTIVE)
+#ifdef DOT11_N_SUPPORT
+#ifdef DOT11N_DRAFT3
+			|| (ScanType == SCAN_2040_BSS_COEXIST)
+#endif /* DOT11N_DRAFT3 */
+#endif /* DOT11_N_SUPPORT */
+			)
+		{
+			NStatus = MlmeAllocateMemory(pAd, &pOutBuffer);  /*Get an unused nonpaged memory*/
+			if (NStatus != NDIS_STATUS_SUCCESS)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("SYNC - ScanNextChannel() allocate memory fail\n"));
+#ifdef CONFIG_STA_SUPPORT
+				if (OpMode == OPMODE_STA)
+				{
+					pAd->Mlme.SyncMachine.CurrState = SYNC_IDLE;
+					Status = MLME_FAIL_NO_RESOURCE;
+					MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_SCAN_CONF, 2, &Status, 0);
+				}
+#endif /* CONFIG_STA_SUPPORT */
+
+				return;
+			}
+
+#ifdef DOT11_N_SUPPORT
+#ifdef DOT11N_DRAFT3
+			if (ScanType == SCAN_2040_BSS_COEXIST)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("SYNC - SCAN_2040_BSS_COEXIST !! Prepare to send Probe Request\n"));
+			}
+#endif /* DOT11N_DRAFT3 */
+#endif /* DOT11_N_SUPPORT */
+			
+			/* There is no need to send broadcast probe request if active scan is in effect.*/
+			SsidLen = 0;
+			if ((ScanType == SCAN_ACTIVE) || (ScanType == FAST_SCAN_ACTIVE)
+				)
+				SsidLen = pAd->MlmeAux.SsidLen;
+
+			{
+#ifdef CONFIG_STA_SUPPORT
+				/*IF_DEV_CONFIG_OPMODE_ON_STA(pAd) */
+				if (OpMode == OPMODE_STA)
+				{
+					MgtMacHeaderInit(pAd, &Hdr80211, SUBTYPE_PROBE_REQ, 0, BROADCAST_ADDR, 
+										BROADCAST_ADDR);
+				}
+#endif /* CONFIG_STA_SUPPORT */
+
+				MakeOutgoingFrame(pOutBuffer,               &FrameLen,
+								  sizeof(HEADER_802_11),    &Hdr80211,
+								  1,                        &SsidIe,
+								  1,                        &SsidLen,
+								  SsidLen,			        pAd->MlmeAux.Ssid,
+								  1,                        &SupRateIe,
+								  1,                        &pAd->CommonCfg.SupRateLen,
+								  pAd->CommonCfg.SupRateLen,  pAd->CommonCfg.SupRate, 
+								  END_OF_ARGS);
+
+				if (pAd->CommonCfg.ExtRateLen)
+				{
+					ULONG Tmp;
+					MakeOutgoingFrame(pOutBuffer + FrameLen,            &Tmp,
+									  1,                                &ExtRateIe,
+									  1,                                &pAd->CommonCfg.ExtRateLen,
+									  pAd->CommonCfg.ExtRateLen,          pAd->CommonCfg.ExtRate, 
+									  END_OF_ARGS);
+					FrameLen += Tmp;
+				}
+			}
+#ifdef DOT11_N_SUPPORT
+			if (pAd->CommonCfg.PhyMode >= PHY_11ABGN_MIXED)
+			{
+				ULONG	Tmp;
+				UCHAR	HtLen;
+				UCHAR	BROADCOM[4] = {0x0, 0x90, 0x4c, 0x33};
+#ifdef RT_BIG_ENDIAN
+				HT_CAPABILITY_IE HtCapabilityTmp;
+#endif
+				if (pAd->bBroadComHT == TRUE)
+				{
+					HtLen = pAd->MlmeAux.HtCapabilityLen + 4;
+#ifdef RT_BIG_ENDIAN
+					NdisMoveMemory(&HtCapabilityTmp, &pAd->MlmeAux.HtCapability, SIZE_HT_CAP_IE);
+					*(USHORT *)(&HtCapabilityTmp.HtCapInfo) = SWAP16(*(USHORT *)(&HtCapabilityTmp.HtCapInfo));
+#ifdef UNALIGNMENT_SUPPORT
+					{
+						EXT_HT_CAP_INFO extHtCapInfo;
+
+						NdisMoveMemory((PUCHAR)(&extHtCapInfo), (PUCHAR)(&HtCapabilityTmp.ExtHtCapInfo), sizeof(EXT_HT_CAP_INFO));
+						*(USHORT *)(&extHtCapInfo) = cpu2le16(*(USHORT *)(&extHtCapInfo));
+						NdisMoveMemory((PUCHAR)(&HtCapabilityTmp.ExtHtCapInfo), (PUCHAR)(&extHtCapInfo), sizeof(EXT_HT_CAP_INFO));		
+					}
+#else				
+					*(USHORT *)(&HtCapabilityTmp.ExtHtCapInfo) = cpu2le16(*(USHORT *)(&HtCapabilityTmp.ExtHtCapInfo));
+#endif /* UNALIGNMENT_SUPPORT */
+
+					MakeOutgoingFrame(pOutBuffer + FrameLen,          &Tmp,
+									1,                                &WpaIe,
+									1,                                &HtLen,
+									4,                                &BROADCOM[0],
+									pAd->MlmeAux.HtCapabilityLen,     &HtCapabilityTmp, 
+									END_OF_ARGS);
+#else
+					MakeOutgoingFrame(pOutBuffer + FrameLen,          &Tmp,
+									1,                                &WpaIe,
+									1,                                &HtLen,
+									4,                                &BROADCOM[0],
+									pAd->MlmeAux.HtCapabilityLen,     &pAd->MlmeAux.HtCapability, 
+									END_OF_ARGS);
+#endif /* RT_BIG_ENDIAN */
+				}
+				else				
+				{
+					HtLen = sizeof(HT_CAPABILITY_IE);
+#ifdef RT_BIG_ENDIAN
+					NdisMoveMemory(&HtCapabilityTmp, &pAd->CommonCfg.HtCapability, SIZE_HT_CAP_IE);
+					*(USHORT *)(&HtCapabilityTmp.HtCapInfo) = SWAP16(*(USHORT *)(&HtCapabilityTmp.HtCapInfo));
+#ifdef UNALIGNMENT_SUPPORT
+					{
+						EXT_HT_CAP_INFO extHtCapInfo;
+
+						NdisMoveMemory((PUCHAR)(&extHtCapInfo), (PUCHAR)(&HtCapabilityTmp.ExtHtCapInfo), sizeof(EXT_HT_CAP_INFO));
+						*(USHORT *)(&extHtCapInfo) = cpu2le16(*(USHORT *)(&extHtCapInfo));
+						NdisMoveMemory((PUCHAR)(&HtCapabilityTmp.ExtHtCapInfo), (PUCHAR)(&extHtCapInfo), sizeof(EXT_HT_CAP_INFO));		
+					}
+#else				
+					*(USHORT *)(&HtCapabilityTmp.ExtHtCapInfo) = cpu2le16(*(USHORT *)(&HtCapabilityTmp.ExtHtCapInfo));
+#endif /* UNALIGNMENT_SUPPORT */
+
+					MakeOutgoingFrame(pOutBuffer + FrameLen,          &Tmp,
+									1,                                &HtCapIe,
+									1,                                &HtLen,
+									HtLen,                            &HtCapabilityTmp, 
+									END_OF_ARGS);
+#else
+					MakeOutgoingFrame(pOutBuffer + FrameLen,          &Tmp,
+									1,                                &HtCapIe,
+									1,                                &HtLen,
+									HtLen,                            &pAd->CommonCfg.HtCapability, 
+									END_OF_ARGS);
+#endif /* RT_BIG_ENDIAN */
+				}
+				FrameLen += Tmp;
+
+#ifdef DOT11N_DRAFT3
+				if ((pAd->MlmeAux.Channel <= 14) && (pAd->CommonCfg.bBssCoexEnable == TRUE))
+				{
+					ULONG		Tmp;
+					HtLen = 1;
+					MakeOutgoingFrame(pOutBuffer + FrameLen,            &Tmp,
+									  1,					&ExtHtCapIe,
+									  1,					&HtLen,
+									  1,          			&pAd->CommonCfg.BSSCoexist2040.word, 
+									  END_OF_ARGS);
+
+					FrameLen += Tmp;
+				}
+#endif /* DOT11N_DRAFT3 */
+			}
+#endif /* DOT11_N_SUPPORT */
+
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+			if ((OpMode == OPMODE_STA) &&
+				(pAd->StaCfg.WpaSupplicantUP != WPA_SUPPLICANT_DISABLE) &&
+				(pAd->StaCfg.WpsProbeReqIeLen != 0))
+			{
+				ULONG 		WpsTmpLen = 0;
+				
+				MakeOutgoingFrame(pOutBuffer + FrameLen,              &WpsTmpLen,
+								pAd->StaCfg.WpsProbeReqIeLen,	pAd->StaCfg.pWpsProbeReqIe,
+								END_OF_ARGS);
+
+				FrameLen += WpsTmpLen;
+			}
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+
+			MiniportMMRequest(pAd, 0, pOutBuffer, FrameLen);
+
+#ifdef CONFIG_STA_SUPPORT
+			if (OpMode == OPMODE_STA)
+			{
+				
+				/*
+					To prevent data lost.
+					Send an NULL data with turned PSM bit on to current associated AP when SCAN in the channel where
+					associated AP located.
+				*/
+				if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED) && 
+					(INFRA_ON(pAd)) &&
+					(pAd->CommonCfg.Channel == pAd->MlmeAux.Channel))
+				{
+					RTMPSendNullFrame(pAd, 
+								  pAd->CommonCfg.TxRate, 
+								  (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_WMM_INUSED) ? TRUE:FALSE));
+					DBGPRINT(RT_DEBUG_TRACE, ("ScanNextChannel():Send PWA NullData frame to notify the associated AP!\n"));
+				}
+			}
+#endif /* CONFIG_STA_SUPPORT */
+
+			MlmeFreeMemory(pAd, pOutBuffer);
+		}
+
+		/* For SCAN_CISCO_PASSIVE, do nothing and silently wait for beacon or other probe reponse*/
+		
+#ifdef CONFIG_STA_SUPPORT
+		if (OpMode == OPMODE_STA)
+			pAd->Mlme.SyncMachine.CurrState = SCAN_LISTEN;
+#endif /* CONFIG_STA_SUPPORT */
+	}
+}
+#endif
+
+
+
+
+BOOLEAN ScanRunning(
+		IN PRTMP_ADAPTER pAd)
+{
+	BOOLEAN	rv = FALSE;
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+			rv = ((pAd->Mlme.SyncMachine.CurrState == SCAN_LISTEN) ? TRUE : FALSE);
+#endif /* CONFIG_STA_SUPPORT */
+
+	return rv;
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_tkip.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_tkip.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_tkip.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_tkip.c	2017-09-23 03:42:49.730675944 +0800
@@ -0,0 +1,896 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include	"rt_config.h"
+
+/* Rotation functions on 32 bit values */
+#define ROL32( A, n ) \
+	( ((A) << (n)) | ( ((A)>>(32-(n))) & ( (1UL << (n)) - 1 ) ) ) 
+#define ROR32( A, n ) ROL32( (A), 32-(n) ) 
+
+UINT Tkip_Sbox_Lower[256] = 
+{ 
+	0xA5,0x84,0x99,0x8D,0x0D,0xBD,0xB1,0x54, 
+	0x50,0x03,0xA9,0x7D,0x19,0x62,0xE6,0x9A, 
+	0x45,0x9D,0x40,0x87,0x15,0xEB,0xC9,0x0B, 
+	0xEC,0x67,0xFD,0xEA,0xBF,0xF7,0x96,0x5B, 
+	0xC2,0x1C,0xAE,0x6A,0x5A,0x41,0x02,0x4F, 
+	0x5C,0xF4,0x34,0x08,0x93,0x73,0x53,0x3F, 
+	0x0C,0x52,0x65,0x5E,0x28,0xA1,0x0F,0xB5, 
+	0x09,0x36,0x9B,0x3D,0x26,0x69,0xCD,0x9F, 
+	0x1B,0x9E,0x74,0x2E,0x2D,0xB2,0xEE,0xFB, 
+	0xF6,0x4D,0x61,0xCE,0x7B,0x3E,0x71,0x97, 
+	0xF5,0x68,0x00,0x2C,0x60,0x1F,0xC8,0xED, 
+	0xBE,0x46,0xD9,0x4B,0xDE,0xD4,0xE8,0x4A, 
+	0x6B,0x2A,0xE5,0x16,0xC5,0xD7,0x55,0x94, 
+	0xCF,0x10,0x06,0x81,0xF0,0x44,0xBA,0xE3, 
+	0xF3,0xFE,0xC0,0x8A,0xAD,0xBC,0x48,0x04, 
+	0xDF,0xC1,0x75,0x63,0x30,0x1A,0x0E,0x6D, 
+	0x4C,0x14,0x35,0x2F,0xE1,0xA2,0xCC,0x39, 
+	0x57,0xF2,0x82,0x47,0xAC,0xE7,0x2B,0x95, 
+	0xA0,0x98,0xD1,0x7F,0x66,0x7E,0xAB,0x83, 
+	0xCA,0x29,0xD3,0x3C,0x79,0xE2,0x1D,0x76, 
+	0x3B,0x56,0x4E,0x1E,0xDB,0x0A,0x6C,0xE4, 
+	0x5D,0x6E,0xEF,0xA6,0xA8,0xA4,0x37,0x8B, 
+	0x32,0x43,0x59,0xB7,0x8C,0x64,0xD2,0xE0, 
+	0xB4,0xFA,0x07,0x25,0xAF,0x8E,0xE9,0x18, 
+	0xD5,0x88,0x6F,0x72,0x24,0xF1,0xC7,0x51, 
+	0x23,0x7C,0x9C,0x21,0xDD,0xDC,0x86,0x85, 
+	0x90,0x42,0xC4,0xAA,0xD8,0x05,0x01,0x12, 
+	0xA3,0x5F,0xF9,0xD0,0x91,0x58,0x27,0xB9, 
+	0x38,0x13,0xB3,0x33,0xBB,0x70,0x89,0xA7, 
+	0xB6,0x22,0x92,0x20,0x49,0xFF,0x78,0x7A, 
+	0x8F,0xF8,0x80,0x17,0xDA,0x31,0xC6,0xB8, 
+	0xC3,0xB0,0x77,0x11,0xCB,0xFC,0xD6,0x3A 
+};
+
+UINT Tkip_Sbox_Upper[256] = 
+{ 
+	0xC6,0xF8,0xEE,0xF6,0xFF,0xD6,0xDE,0x91, 
+	0x60,0x02,0xCE,0x56,0xE7,0xB5,0x4D,0xEC, 
+	0x8F,0x1F,0x89,0xFA,0xEF,0xB2,0x8E,0xFB, 
+	0x41,0xB3,0x5F,0x45,0x23,0x53,0xE4,0x9B, 
+	0x75,0xE1,0x3D,0x4C,0x6C,0x7E,0xF5,0x83, 
+	0x68,0x51,0xD1,0xF9,0xE2,0xAB,0x62,0x2A, 
+	0x08,0x95,0x46,0x9D,0x30,0x37,0x0A,0x2F, 
+	0x0E,0x24,0x1B,0xDF,0xCD,0x4E,0x7F,0xEA, 
+	0x12,0x1D,0x58,0x34,0x36,0xDC,0xB4,0x5B, 
+	0xA4,0x76,0xB7,0x7D,0x52,0xDD,0x5E,0x13, 
+	0xA6,0xB9,0x00,0xC1,0x40,0xE3,0x79,0xB6, 
+	0xD4,0x8D,0x67,0x72,0x94,0x98,0xB0,0x85, 
+	0xBB,0xC5,0x4F,0xED,0x86,0x9A,0x66,0x11, 
+	0x8A,0xE9,0x04,0xFE,0xA0,0x78,0x25,0x4B, 
+	0xA2,0x5D,0x80,0x05,0x3F,0x21,0x70,0xF1, 
+	0x63,0x77,0xAF,0x42,0x20,0xE5,0xFD,0xBF, 
+	0x81,0x18,0x26,0xC3,0xBE,0x35,0x88,0x2E, 
+	0x93,0x55,0xFC,0x7A,0xC8,0xBA,0x32,0xE6, 
+	0xC0,0x19,0x9E,0xA3,0x44,0x54,0x3B,0x0B, 
+	0x8C,0xC7,0x6B,0x28,0xA7,0xBC,0x16,0xAD, 
+	0xDB,0x64,0x74,0x14,0x92,0x0C,0x48,0xB8, 
+	0x9F,0xBD,0x43,0xC4,0x39,0x31,0xD3,0xF2, 
+	0xD5,0x8B,0x6E,0xDA,0x01,0xB1,0x9C,0x49, 
+	0xD8,0xAC,0xF3,0xCF,0xCA,0xF4,0x47,0x10, 
+	0x6F,0xF0,0x4A,0x5C,0x38,0x57,0x73,0x97, 
+	0xCB,0xA1,0xE8,0x3E,0x96,0x61,0x0D,0x0F, 
+	0xE0,0x7C,0x71,0xCC,0x90,0x06,0xF7,0x1C, 
+	0xC2,0x6A,0xAE,0x69,0x17,0x99,0x3A,0x27, 
+	0xD9,0xEB,0x2B,0x22,0xD2,0xA9,0x07,0x33, 
+	0x2D,0x3C,0x15,0xC9,0x87,0xAA,0x50,0xA5, 
+	0x03,0x59,0x09,0x1A,0x65,0xD7,0x84,0xD0, 
+	0x82,0x29,0x5A,0x1E,0x7B,0xA8,0x6D,0x2C 
+}; 
+
+
+/* Expanded IV for TKIP function.*/
+
+typedef	struct	GNU_PACKED _IV_CONTROL_
+{
+	union GNU_PACKED
+	{
+		struct GNU_PACKED
+		{
+			UCHAR		rc0;
+			UCHAR		rc1;
+			UCHAR		rc2;
+
+			union GNU_PACKED
+			{
+				struct GNU_PACKED
+				{
+#ifdef RT_BIG_ENDIAN
+					UCHAR	KeyID:2;
+					UCHAR	ExtIV:1;
+					UCHAR	Rsvd:5;
+#else
+					UCHAR	Rsvd:5;
+					UCHAR	ExtIV:1;
+					UCHAR	KeyID:2;
+#endif
+				}	field;
+				UCHAR		Byte;
+			}	CONTROL;
+		}	field;
+		
+		ULONG	word;
+	}	IV16;
+	
+	ULONG	IV32;
+}	TKIP_IV, *PTKIP_IV;
+
+
+/*
+	========================================================================
+
+	Routine	Description:
+		Convert from UCHAR[] to ULONG in a portable way 
+		
+	Arguments:
+      pMICKey		pointer to MIC Key
+		
+	Return Value:
+		None
+
+	Note:
+		
+	========================================================================
+*/
+ULONG	RTMPTkipGetUInt32( 	
+	IN	PUCHAR	pMICKey)
+{  	
+	ULONG	res = 0; 
+	INT		i;
+	
+	for (i = 0; i < 4; i++) 
+	{ 
+		res |= (*pMICKey++) << (8 * i); 
+	}
+
+	return res; 
+} 
+
+/*
+	========================================================================
+
+	Routine	Description:
+		Convert from ULONG to UCHAR[] in a portable way 
+		
+	Arguments:
+      pDst			pointer to destination for convert ULONG to UCHAR[]
+      val			the value for convert
+		
+	Return Value:
+		None
+
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+		
+	========================================================================
+*/
+VOID	RTMPTkipPutUInt32(
+	IN OUT	PUCHAR		pDst,
+	IN		ULONG		val)					  
+{ 	
+	INT i;
+	
+	for(i = 0; i < 4; i++) 
+	{ 
+		*pDst++ = (UCHAR) (val & 0xff); 
+		val >>= 8; 
+	} 
+} 
+
+/*
+	========================================================================
+
+	Routine	Description:
+		Set the MIC Key.
+		
+	Arguments:
+      pAd		Pointer to our adapter
+      pMICKey		pointer to MIC Key
+		
+	Return Value:
+		None
+
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+		
+	========================================================================
+*/
+VOID RTMPTkipSetMICKey(  
+	IN	PTKIP_KEY_INFO	pTkip,	
+	IN	PUCHAR			pMICKey)
+{ 
+	/* Set the key */
+	pTkip->K0 = RTMPTkipGetUInt32(pMICKey); 
+	pTkip->K1 = RTMPTkipGetUInt32(pMICKey + 4); 
+	/* and reset the message */
+	pTkip->L = pTkip->K0;
+	pTkip->R = pTkip->K1;
+	pTkip->nBytesInM = 0;
+	pTkip->M = 0;
+} 
+
+/*
+	========================================================================
+
+	Routine	Description:
+		Calculate the MIC Value.
+		
+	Arguments:
+      pAd		Pointer to our adapter
+      uChar			Append this uChar
+		
+	Return Value:
+		None
+
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+		
+	========================================================================
+*/
+VOID	RTMPTkipAppendByte( 
+	IN	PTKIP_KEY_INFO	pTkip,	
+	IN	UCHAR 			uChar)
+{ 
+	/* Append the byte to our word-sized buffer */
+	pTkip->M |= (uChar << (8* pTkip->nBytesInM)); 
+	pTkip->nBytesInM++; 
+	/* Process the word if it is full. */
+	if( pTkip->nBytesInM >= 4 ) 
+	{ 
+		pTkip->L ^= pTkip->M; 
+		pTkip->R ^= ROL32( pTkip->L, 17 ); 
+		pTkip->L += pTkip->R; 
+		pTkip->R ^= ((pTkip->L & 0xff00ff00) >> 8) | ((pTkip->L & 0x00ff00ff) << 8); 
+		pTkip->L += pTkip->R; 
+		pTkip->R ^= ROL32( pTkip->L, 3 ); 
+		pTkip->L += pTkip->R; 
+		pTkip->R ^= ROR32( pTkip->L, 2 ); 
+		pTkip->L += pTkip->R; 
+		/* Clear the buffer */
+		pTkip->M = 0; 
+		pTkip->nBytesInM = 0; 
+	} 
+} 
+
+/*
+	========================================================================
+
+	Routine	Description:
+		Calculate the MIC Value.
+		
+	Arguments:
+      pAd		Pointer to our adapter
+      pSrc			Pointer to source data for Calculate MIC Value
+      Len			Indicate the length of the source data
+		
+	Return Value:
+		None
+
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+		
+	========================================================================
+*/
+VOID	RTMPTkipAppend( 
+	IN	PTKIP_KEY_INFO	pTkip,	
+	IN	PUCHAR			pSrc,
+	IN	UINT			nBytes)						  
+{ 
+	/* This is simple */
+	while(nBytes > 0) 
+	{ 
+		RTMPTkipAppendByte(pTkip, *pSrc++); 
+		nBytes--; 
+	} 
+} 
+
+/*
+	========================================================================
+
+	Routine	Description:
+		Get the MIC Value.
+		
+	Arguments:
+      pAd		Pointer to our adapter
+		
+	Return Value:
+		None
+
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+		the MIC Value is store in pAd->PrivateInfo.MIC
+	========================================================================
+*/
+VOID	RTMPTkipGetMIC( 
+	IN	PTKIP_KEY_INFO	pTkip)
+{ 
+	/* Append the minimum padding*/
+	RTMPTkipAppendByte(pTkip, 0x5a );	
+	RTMPTkipAppendByte(pTkip, 0 ); 
+	RTMPTkipAppendByte(pTkip, 0 ); 
+	RTMPTkipAppendByte(pTkip, 0 ); 
+	RTMPTkipAppendByte(pTkip, 0 ); 
+	/* and then zeroes until the length is a multiple of 4 */
+	while( pTkip->nBytesInM != 0 ) 
+	{ 
+		RTMPTkipAppendByte(pTkip, 0 ); 
+	} 
+	/* The appendByte function has already computed the result. */
+	RTMPTkipPutUInt32(pTkip->MIC, pTkip->L);
+	RTMPTkipPutUInt32(pTkip->MIC + 4, pTkip->R);
+} 
+
+
+/*
+	========================================================================
+
+	Routine	Description:
+		Init MIC Value calculation function which include set MIC key & 
+		calculate first 16 bytes (DA + SA + priority +  0)
+		
+	Arguments:
+      pAd		Pointer to our adapter
+		pTKey       Pointer to the Temporal Key (TK), TK shall be 128bits.
+		pDA			Pointer to DA address
+		pSA			Pointer to SA address
+		pMICKey		pointer to MIC Key
+		
+	Return Value:
+		None
+
+	Note:
+	
+	========================================================================
+*/
+VOID	RTMPInitMICEngine(
+	IN	PRTMP_ADAPTER	pAd,	
+	IN	PUCHAR			pKey,
+	IN	PUCHAR			pDA,
+	IN	PUCHAR			pSA,
+	IN  UCHAR           UserPriority,
+	IN	PUCHAR			pMICKey)
+{
+	ULONG Priority = UserPriority;
+
+	/* Init MIC value calculation*/
+	RTMPTkipSetMICKey(&pAd->PrivateInfo.Tx, pMICKey);
+	/* DA*/
+	RTMPTkipAppend(&pAd->PrivateInfo.Tx, pDA, MAC_ADDR_LEN);
+	/* SA*/
+	RTMPTkipAppend(&pAd->PrivateInfo.Tx, pSA, MAC_ADDR_LEN);
+	/* Priority + 3 bytes of 0*/
+	RTMPTkipAppend(&pAd->PrivateInfo.Tx, (PUCHAR)&Priority, 4);
+}
+
+/*
+	========================================================================
+
+	Routine	Description:
+		Compare MIC value of received MSDU
+		
+	Arguments:
+		pAd	Pointer to our adapter
+		pSrc        Pointer to the received Plain text data
+		pDA			Pointer to DA address
+		pSA			Pointer to SA address
+		pMICKey		pointer to MIC Key
+		Len         the length of the received plain text data exclude MIC value
+		
+	Return Value:
+		TRUE        MIC value matched
+		FALSE       MIC value mismatched
+		
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+	
+	========================================================================
+*/
+BOOLEAN	RTMPTkipCompareMICValue(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PUCHAR			pSrc,
+	IN	PUCHAR			pDA,
+	IN	PUCHAR			pSA,
+	IN	PUCHAR			pMICKey,
+	IN	UCHAR			UserPriority,
+	IN	UINT			Len)
+{
+	UCHAR	OldMic[8];
+	ULONG	Priority = UserPriority;
+
+	/* Init MIC value calculation*/
+	RTMPTkipSetMICKey(&pAd->PrivateInfo.Rx, pMICKey);
+	/* DA*/
+	RTMPTkipAppend(&pAd->PrivateInfo.Rx, pDA, MAC_ADDR_LEN);
+	/* SA*/
+	RTMPTkipAppend(&pAd->PrivateInfo.Rx, pSA, MAC_ADDR_LEN);
+	/* Priority + 3 bytes of 0*/
+	RTMPTkipAppend(&pAd->PrivateInfo.Rx, (PUCHAR)&Priority, 4);
+	
+	/* Calculate MIC value from plain text data*/
+	RTMPTkipAppend(&pAd->PrivateInfo.Rx, pSrc, Len);
+
+	/* Get MIC valude from received frame*/
+	NdisMoveMemory(OldMic, pSrc + Len, 8);
+	
+	/* Get MIC value from decrypted plain data*/
+	RTMPTkipGetMIC(&pAd->PrivateInfo.Rx);
+		
+	/* Move MIC value from MSDU, this steps should move to data path.*/
+	/* Since the MIC value might cross MPDUs.*/
+	if(!NdisEqualMemory(pAd->PrivateInfo.Rx.MIC, OldMic, 8))
+	{
+		DBGPRINT_RAW(RT_DEBUG_ERROR, ("RTMPTkipCompareMICValue(): TKIP MIC Error !\n"));  /*MIC error.*/
+
+		
+		return (FALSE);
+	}
+	return (TRUE);
+}
+
+/*
+	========================================================================
+
+	Routine	Description:
+		Copy frame from waiting queue into relative ring buffer and set 
+	appropriate ASIC register to kick hardware transmit function
+		
+	Arguments:
+		pAd		Pointer	to our adapter
+		PNDIS_PACKET	Pointer to Ndis Packet for MIC calculation
+		pEncap			Pointer to LLC encap data
+		LenEncap		Total encap length, might be 0 which indicates no encap
+		
+	Return Value:
+		None
+
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+	
+	========================================================================
+*/
+VOID	RTMPCalculateMICValue(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PNDIS_PACKET	pPacket,
+	IN	PUCHAR			pEncap,
+	IN	PCIPHER_KEY		pKey,
+	IN	UCHAR			apidx)
+{
+	PACKET_INFO		PacketInfo;
+	PUCHAR			pSrcBufVA;
+	UINT			SrcBufLen;
+	PUCHAR			pSrc;
+    UCHAR           UserPriority;
+	UCHAR			vlan_offset = 0;
+
+	RTMP_QueryPacketInfo(pPacket, &PacketInfo, &pSrcBufVA, &SrcBufLen);
+
+	UserPriority = RTMP_GET_PACKET_UP(pPacket);
+	pSrc = pSrcBufVA;
+    
+	/* determine if this is a vlan packet */
+	if (((*(pSrc + 12) << 8) + *(pSrc + 13)) == 0x8100)
+		vlan_offset = 4;
+	
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+	{
+		RTMPInitMICEngine(
+			pAd,
+			pKey->Key,
+			pSrc,
+			pSrc + 6,
+			UserPriority,
+			pKey->TxMic);
+	}
+	
+
+	if (pEncap != NULL)
+	{
+		/* LLC encapsulation*/
+		RTMPTkipAppend(&pAd->PrivateInfo.Tx, pEncap, 6);
+		/* Protocol Type*/
+		RTMPTkipAppend(&pAd->PrivateInfo.Tx, pSrc + 12 + vlan_offset, 2);		
+	}
+	SrcBufLen -= (14 + vlan_offset);
+	pSrc += (14 + vlan_offset);
+	do
+	{
+		if (SrcBufLen > 0)
+		{
+			RTMPTkipAppend(&pAd->PrivateInfo.Tx, pSrc, SrcBufLen);
+		}
+		
+		break;	/* No need handle next packet	*/
+
+	}	while (TRUE);		/* End of copying payload*/
+
+	/* Compute the final MIC Value*/
+	RTMPTkipGetMIC(&pAd->PrivateInfo.Tx);
+}
+
+
+/************************************************************/ 
+/* tkip_sbox()																*/ 
+/* Returns a 16 bit value from a 64K entry table. The Table */ 
+/* is synthesized from two 256 entry byte wide tables.		*/ 
+/************************************************************/ 
+
+UINT tkip_sbox(UINT index) 
+{ 
+	UINT index_low; 
+	UINT index_high; 
+	UINT left, right; 
+
+	index_low = (index % 256); 
+	index_high = ((index >> 8) % 256); 
+
+	left = Tkip_Sbox_Lower[index_low] + (Tkip_Sbox_Upper[index_low] * 256); 
+	right = Tkip_Sbox_Upper[index_high] + (Tkip_Sbox_Lower[index_high] * 256); 
+
+	return (left ^ right); 
+}
+
+UINT rotr1(UINT a) 
+{ 
+	unsigned int b; 
+
+	if ((a & 0x01) == 0x01) 
+	{ 
+		b = (a >> 1) | 0x8000; 
+	} 
+	else 
+	{ 
+		b = (a >> 1) & 0x7fff; 
+	} 
+	b = b % 65536; 
+	return b; 
+} 
+
+VOID RTMPTkipMixKey(
+	UCHAR *key, 
+	UCHAR *ta, 
+	ULONG pnl, /* Least significant 16 bits of PN */
+	ULONG pnh, /* Most significant 32 bits of PN */ 
+	UCHAR *rc4key, 
+	UINT *p1k)
+{
+
+	UINT tsc0; 
+	UINT tsc1;
+	UINT tsc2; 
+
+	UINT ppk0; 
+	UINT ppk1; 
+	UINT ppk2; 
+	UINT ppk3; 
+	UINT ppk4; 
+	UINT ppk5; 
+
+	INT i; 
+	INT j; 
+
+	tsc0 = (unsigned int)((pnh >> 16) % 65536); /* msb */ 
+	tsc1 = (unsigned int)(pnh % 65536); 
+	tsc2 = (unsigned int)(pnl % 65536); /* lsb */ 
+
+	/* Phase 1, step 1 */ 
+	p1k[0] = tsc1; 
+	p1k[1] = tsc0; 
+	p1k[2] = (UINT)(ta[0] + (ta[1]*256)); 
+	p1k[3] = (UINT)(ta[2] + (ta[3]*256)); 
+	p1k[4] = (UINT)(ta[4] + (ta[5]*256)); 
+
+	/* Phase 1, step 2 */ 
+	for (i=0; i<8; i++) 
+	{ 
+		j = 2*(i & 1); 
+		p1k[0] = (p1k[0] + tkip_sbox( (p1k[4] ^ ((256*key[1+j]) + key[j])) % 65536 )) % 65536; 
+		p1k[1] = (p1k[1] + tkip_sbox( (p1k[0] ^ ((256*key[5+j]) + key[4+j])) % 65536 )) % 65536; 
+		p1k[2] = (p1k[2] + tkip_sbox( (p1k[1] ^ ((256*key[9+j]) + key[8+j])) % 65536 )) % 65536; 
+		p1k[3] = (p1k[3] + tkip_sbox( (p1k[2] ^ ((256*key[13+j]) + key[12+j])) % 65536 )) % 65536; 
+		p1k[4] = (p1k[4] + tkip_sbox( (p1k[3] ^ (((256*key[1+j]) + key[j]))) % 65536 )) % 65536; 
+		p1k[4] = (p1k[4] + i) % 65536; 
+	} 
+
+	/* Phase 2, Step 1 */ 
+	ppk0 = p1k[0]; 
+	ppk1 = p1k[1]; 
+	ppk2 = p1k[2]; 
+	ppk3 = p1k[3]; 
+	ppk4 = p1k[4]; 
+	ppk5 = (p1k[4] + tsc2) % 65536; 
+
+	/* Phase2, Step 2 */ 
+	ppk0 = ppk0 + tkip_sbox( (ppk5 ^ ((256*key[1]) + key[0])) % 65536); 
+	ppk1 = ppk1 + tkip_sbox( (ppk0 ^ ((256*key[3]) + key[2])) % 65536); 
+	ppk2 = ppk2 + tkip_sbox( (ppk1 ^ ((256*key[5]) + key[4])) % 65536); 
+	ppk3 = ppk3 + tkip_sbox( (ppk2 ^ ((256*key[7]) + key[6])) % 65536); 
+	ppk4 = ppk4 + tkip_sbox( (ppk3 ^ ((256*key[9]) + key[8])) % 65536); 
+	ppk5 = ppk5 + tkip_sbox( (ppk4 ^ ((256*key[11]) + key[10])) % 65536); 
+
+	ppk0 = ppk0 + rotr1(ppk5 ^ ((256*key[13]) + key[12])); 
+	ppk1 = ppk1 + rotr1(ppk0 ^ ((256*key[15]) + key[14])); 
+	ppk2 = ppk2 + rotr1(ppk1); 
+	ppk3 = ppk3 + rotr1(ppk2); 
+	ppk4 = ppk4 + rotr1(ppk3); 
+	ppk5 = ppk5 + rotr1(ppk4); 
+
+	/* Phase 2, Step 3 */ 
+    /* Phase 2, Step 3 */
+
+	tsc0 = (unsigned int)((pnh >> 16) % 65536); /* msb */ 
+	tsc1 = (unsigned int)(pnh % 65536); 
+	tsc2 = (unsigned int)(pnl % 65536); /* lsb */ 
+
+	rc4key[0] = (tsc2 >> 8) % 256; 
+	rc4key[1] = (((tsc2 >> 8) % 256) | 0x20) & 0x7f; 
+	rc4key[2] = tsc2 % 256; 
+	rc4key[3] = ((ppk5 ^ ((256*key[1]) + key[0])) >> 1) % 256; 
+
+	rc4key[4] = ppk0 % 256; 
+	rc4key[5] = (ppk0 >> 8) % 256; 
+
+	rc4key[6] = ppk1 % 256; 
+	rc4key[7] = (ppk1 >> 8) % 256; 
+
+	rc4key[8] = ppk2 % 256; 
+	rc4key[9] = (ppk2 >> 8) % 256; 
+
+	rc4key[10] = ppk3 % 256; 
+	rc4key[11] = (ppk3 >> 8) % 256; 
+
+	rc4key[12] = ppk4 % 256; 
+	rc4key[13] = (ppk4 >> 8) % 256; 
+
+	rc4key[14] = ppk5 % 256; 
+	rc4key[15] = (ppk5 >> 8) % 256; 
+}
+
+
+
+/* TRUE: Success!*/
+/* FALSE: Decrypt Error!*/
+
+BOOLEAN RTMPSoftDecryptTKIP(
+	IN 		PRTMP_ADAPTER 	pAd,
+	IN 		PUCHAR			pHdr,
+	IN 		UCHAR    		UserPriority,
+	IN 		PCIPHER_KEY		pKey,
+	INOUT 	PUCHAR			pData,
+	IN 		UINT16			*DataByteCnt)
+{
+	PHEADER_802_11	pFrame;
+	UINT8			frame_type;
+	UINT8			frame_subtype;
+	UINT8			from_ds;
+    UINT8			to_ds;
+	UINT8			a4_exists;
+	UINT8			qc_exists;
+	UCHAR			TA[MAC_ADDR_LEN];
+	UCHAR			DA[MAC_ADDR_LEN];
+	UCHAR			SA[MAC_ADDR_LEN];	
+	UCHAR			RC4Key[16];
+	UINT			p1k[5]; /*for mix_key;*/
+	ULONG			pnl;/* Least significant 16 bits of PN */
+	ULONG			pnh;/* Most significant 32 bits of PN */ 
+	ARC4_CTX_STRUC 	ARC4_CTX;
+	PUCHAR			plaintext_ptr;
+	UINT32			plaintext_len;
+	PUCHAR			ciphertext_ptr;
+	UINT32			ciphertext_len;
+	UINT			crc32 = 0;
+	UINT			trailfcs = 0;
+	UCHAR			MIC[8];
+	UCHAR			TrailMIC[8];
+
+#ifdef RT_BIG_ENDIAN
+	RTMPFrameEndianChange(pAd, pHdr, DIR_READ, FALSE);
+#endif
+
+	if (pKey->KeyLen == 0)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s : the key is empty)\n", __FUNCTION__));
+		return FALSE;
+	}
+
+	/* Indicate type and subtype of Frame Control field */
+	frame_type = (((*pHdr) >> 2) & 0x03);
+	frame_subtype = (((*pHdr) >> 4) & 0x0f);	
+
+	/* Indicate the fromDS and ToDS */
+	from_ds = ((*(pHdr + 1)) & 0x2) >> 1;
+	to_ds = ((*(pHdr + 1)) & 0x1);
+
+	/* decide if the Address 4 exist or QoS exist */
+	a4_exists = (from_ds & to_ds);
+	qc_exists = ((frame_subtype == SUBTYPE_QDATA) || 
+				 (frame_subtype == SUBTYPE_QDATA_CFACK) ||
+				 (frame_subtype == SUBTYPE_QDATA_CFPOLL) ||
+				 (frame_subtype == SUBTYPE_QDATA_CFACK_CFPOLL));
+
+	/* pointer to 802.11 header */
+	pFrame = (PHEADER_802_11)pHdr;
+
+	/* Assign DA, SA and TA for TKIP calculation */
+	if (to_ds == 0 && from_ds == 1)
+	{
+		NdisMoveMemory(DA, pFrame->Addr1, MAC_ADDR_LEN);
+		NdisMoveMemory(TA, pFrame->Addr2, MAC_ADDR_LEN);  /*BSSID		*/
+		NdisMoveMemory(SA, pFrame->Addr3, MAC_ADDR_LEN);
+	}	
+	else if (to_ds == 0 && from_ds == 0 )
+	{
+		NdisMoveMemory(DA, pFrame->Addr1, MAC_ADDR_LEN);
+		NdisMoveMemory(TA, pFrame->Addr2, MAC_ADDR_LEN);		
+		NdisMoveMemory(SA, pFrame->Addr2, MAC_ADDR_LEN);
+	}
+	else if (to_ds == 1 && from_ds == 0)
+	{
+		NdisMoveMemory(SA, pFrame->Addr2, MAC_ADDR_LEN);
+		NdisMoveMemory(TA, pFrame->Addr2, MAC_ADDR_LEN);
+		NdisMoveMemory(DA, pFrame->Addr3, MAC_ADDR_LEN);
+	}
+	else if (to_ds == 1 && from_ds == 1)
+	{
+		NdisMoveMemory(TA, pFrame->Addr2, MAC_ADDR_LEN);
+		NdisMoveMemory(DA, pFrame->Addr3, MAC_ADDR_LEN);
+		NdisMoveMemory(SA, pFrame->Octet, MAC_ADDR_LEN);
+	}
+
+	pnl = (*(pData)) << 8 | (*(pData + 2));	
+	pnh = *((PULONG)(pData + 4));
+	pnh = cpu2le32(pnh);	
+	RTMPTkipMixKey(pKey->Key, TA, pnl, pnh, RC4Key, p1k);
+
+	/* skip 8-bytes TKIP IV/EIV header */
+	ciphertext_ptr = pData + LEN_TKIP_IV_HDR;
+	ciphertext_len = *DataByteCnt - LEN_TKIP_IV_HDR;
+
+	/* WEP Decapsulation */
+	/* Generate an RC4 key stream */
+	ARC4_INIT(&ARC4_CTX, &RC4Key[0], 16);
+
+	/* Decrypt the TKIP MPDU by ARC4. 
+	   It shall include plaintext, MIC and ICV.
+	   The result output would overwrite the original TKIP IV/EIV header position */
+	ARC4_Compute(&ARC4_CTX, ciphertext_ptr, ciphertext_len, pData);
+
+	/* Point to the decrypted data frame and its length shall exclude ICV length */
+	plaintext_ptr = pData;
+	plaintext_len = ciphertext_len - LEN_ICV;
+
+	/* Extract peer's ICV */	
+	NdisMoveMemory(&trailfcs, plaintext_ptr + plaintext_len, LEN_ICV);
+	
+	/* Re-computes the ICV and 
+	   bit-wise compares with the peer's ICV. */
+	crc32 = RTMP_CALC_FCS32(PPPINITFCS32, plaintext_ptr, plaintext_len);
+	crc32 ^= 0xffffffff;             /* complement */
+
+    if(crc32 != cpu2le32(trailfcs))
+    {
+		DBGPRINT(RT_DEBUG_ERROR, ("! WEP Data CRC Error !\n"));	 /*CRC error.*/
+		return FALSE;
+	}
+
+	/* Extract peer's MIC and subtract MIC length from total data length */
+	plaintext_len -= LEN_TKIP_MIC;
+	NdisMoveMemory(TrailMIC, plaintext_ptr + plaintext_len, LEN_TKIP_MIC);
+	RTMPInitMICEngine(pAd, pKey->Key, DA, SA, UserPriority, pKey->RxMic);
+	RTMPTkipAppend(&pAd->PrivateInfo.Tx, plaintext_ptr, plaintext_len);
+	RTMPTkipGetMIC(&pAd->PrivateInfo.Tx);
+	NdisMoveMemory(MIC, pAd->PrivateInfo.Tx.MIC, LEN_TKIP_MIC);
+
+	if (!NdisEqualMemory(MIC, TrailMIC, LEN_TKIP_MIC))
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("! TKIP MIC Error !\n"));	 /*MIC error.*/
+		/*RTMPReportMicError(pAd, &pWpaKey[KeyID]);	 marked by AlbertY @ 20060630 */
+		return FALSE;		
+	}
+
+	/* Update the total data length */
+	*DataByteCnt = plaintext_len;
+
+#ifdef RT_BIG_ENDIAN
+	RTMPFrameEndianChange(pAd, pHdr, DIR_READ, FALSE);
+#endif	
+	return TRUE;
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Use RC4 to protect the Key Data field of EAPoL frame. 
+		It's defined in IEEE 802.11i-2004 p.84 
+
+	Arguments:
+		
+	Return Value:
+		None
+		
+	Note:
+		
+	========================================================================
+*/
+VOID TKIP_GTK_KEY_WRAP( 
+    IN UCHAR    *key,
+    IN UCHAR	*iv,
+    IN UCHAR    *input_text,
+    IN UINT32    input_len,
+    OUT UCHAR   *output_text)
+{	
+	UCHAR	ekey[LEN_KEY_DESC_IV + LEN_PTK_KEK];	
+/*	ARC4_CTX_STRUC ARC4_CTX;*/
+	ARC4_CTX_STRUC *pARC4_CTX = NULL;
+
+
+	/* allocate memory */
+	os_alloc_mem(NULL, (UCHAR **)&pARC4_CTX, sizeof(ARC4_CTX_STRUC));
+	if (pARC4_CTX == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+		return;
+	}
+
+	/* The encryption key is generated by concatenating the
+	   EAPOL-Key IV field and the KEK. */
+	NdisMoveMemory(ekey, iv, LEN_KEY_DESC_IV);
+	NdisMoveMemory(&ekey[LEN_KEY_DESC_IV], key, LEN_PTK_KEK);
+
+	/* RC4 stream cipher initialization with the KEK */	
+	ARC4_INIT(pARC4_CTX, &ekey[0], LEN_KEY_DESC_IV + LEN_PTK_KEK);
+
+	/* The first 256 octets of the RC4 key stream shall be discarded */
+	ARC4_Discard_KeyLength(pARC4_CTX, 256);
+
+	/* encryption begins using the 257th key stream octet */
+	ARC4_Compute(pARC4_CTX, input_text, input_len, output_text);
+
+	if (pARC4_CTX != NULL)
+		os_free_mem(NULL, pARC4_CTX);
+}
+
+VOID TKIP_GTK_KEY_UNWRAP( 
+    IN UCHAR    *key,
+    IN UCHAR	*iv,
+    IN UCHAR    *input_text,
+    IN UINT32    input_len,
+    OUT UCHAR   *output_text)
+{
+	TKIP_GTK_KEY_WRAP(key, iv, input_text, input_len, output_text);
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_txbf.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_txbf.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_txbf.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_txbf.c	2017-09-23 03:42:49.730675944 +0800
@@ -0,0 +1,130 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include	"rt_config.h"
+
+#ifdef TXBF_SUPPORT
+#define ETXBF_PROBE_TIME 500/*500msec*/
+
+UCHAR mcsToLowerMcs[] = {
+/*   originalMfb, newMfb1s, newMfb2s, newMfb3s*/
+	0,	0,	0,	0,
+	1,	1,	1,	1,
+	2,	2,	2,	2,
+	3,	3,	3,	3,
+	4,	4,	4,	4,
+	5,	5,	5,	5,
+	6,	6,	6,	6,
+	7,	7,	7,	7,
+	8,	0,	8,	8,
+	9,	1,	9,	9,
+	10,	2,	10,	10,
+	11,	3,	11,	11,
+	12,	4,	12,	12,
+	13,	5,	13,	13,
+	14,	6,	14,	14,
+	15,	7,	15,	15,
+	16,	0,	8,	16,
+	17,	1,	9,	17,
+	18,	2,	10,	18,
+	19,	3,	11,	19,
+	20,	4,	12,	20,
+	21,	5,	13,	21,
+	22,	6,	14,	22,
+	23,	7,	15,	23,
+	24,	0,	8,	16,
+	25,	1,	9,	17,
+	26,	2,	10,	18,
+	27,	3,	11,	19,
+	28,	4,	12,	20,
+	29,	5,	13,	21,
+	30,	6,	14,	22,
+	31,	7,	15,	23,
+	32,	0,	0,	0,
+	33,	3,	3,	3,
+	34,	3,	3,	3,
+	35,	3,	11,	11,
+	36,	4,	4,	4,
+	37,	6,	6,	6,
+	38,	6,	12,	12,
+	39,	3,	3,	17,
+	40,	3,	11,	11,
+	41,	3,	3,	17,
+	42,	3,	11,	11,
+	43,	3,	11,	19,
+	44,	3,	11,	11,
+	45,	3,	11,	19,
+	46,	4,	4,	18,
+	47,	4,	12,	12,
+	48,	6,	6,	6,
+	49,	6,	12,	12,
+	50,	6,	12,	20,
+	51,	6,	14,	14,
+	52,	6,	14,	14,
+	53,	3,	3,	17,
+	54,	3,	11,	11,
+	55,	3,	11,	19,
+	56,	3,	3,	17,
+	57,	3,	11,	11,
+	58,	3,	11,	19,
+	59,	3,	11,	19,
+	60,	3,	11,	11,
+	61,	3,	11,	19,
+	62,	3,	11,	19,
+	63,	3,	11,	19,
+	64,	3,	11,	19,
+	65,	4,	4,	18,
+	66,	4,	12,	12,
+	67,	4,	12,	20,
+	68,	6,	6,	6,
+	69,	6,	12,	12,
+	70,	6,	12,	20,
+	71,	6,	12,	20,
+	72,	6,	14,	14,
+	73,	6,	14,	14,
+	74,	6,	14,	14,
+	75,	6,	14,	22,
+	76,	6,	14,	22
+};
+UCHAR groupShift[] = {4, 4, 4}; 
+UCHAR groupMethod[] = {0, 0, 0, 0, 0, 0, 0, 0,
+						0, 0, 1, 0, 1, 1, 1, 1,
+						0, 0, 1, 0, 1, 1, 1, 1};
+SHORT groupThrd[] = {-8, 4, 20, 32, 52, 68, 80, 88,
+					  -16, 8, 12, 64, 40, 60, 80, 88,
+					  -24, 12, 12, 96, 40, 60, 80, 88};
+UINT dataRate[] = {65, 130, 195, 260, 390, 520, 585, 650,
+				130, 260, 390, 520, 780, 1040, 1170, 1300,
+				190, 390, 585, 780, 1170, 1560, 1755, 1950};
+
+/* 4. determine the best method among  mfb0, mfb1, snrComb0, snrComb1*/
+/* 5. use the best method. if necessary, sndg with the mcs which resulting in the best snrComb. */
+
+
+#endif /* TXBF_SUPPORT */
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_video.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_video.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_video.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_video.c	2017-09-23 03:42:49.730675944 +0800
@@ -0,0 +1,120 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+
+#ifdef VIDEO_TURBINE_SUPPORT
+
+BOOLEAN UpdateFromGlobal = FALSE;
+
+void VideoTurbineUpdate(
+	IN PRTMP_ADAPTER pAd)
+{
+	if (UpdateFromGlobal == TRUE) 
+	{
+		pAd->VideoTurbine.Enable = GLOBAL_AP_VIDEO_CONFIG.Enable;
+		pAd->VideoTurbine.ClassifierEnable = GLOBAL_AP_VIDEO_CONFIG.ClassifierEnable;
+		pAd->VideoTurbine.HighTxMode = GLOBAL_AP_VIDEO_CONFIG.HighTxMode;
+		pAd->VideoTurbine.TxPwr = GLOBAL_AP_VIDEO_CONFIG.TxPwr;
+		pAd->VideoTurbine.VideoMCSEnable = GLOBAL_AP_VIDEO_CONFIG.VideoMCSEnable;
+		pAd->VideoTurbine.VideoMCS = GLOBAL_AP_VIDEO_CONFIG.VideoMCS;
+		pAd->VideoTurbine.TxBASize = GLOBAL_AP_VIDEO_CONFIG.TxBASize;
+		pAd->VideoTurbine.TxLifeTimeMode = GLOBAL_AP_VIDEO_CONFIG.TxLifeTimeMode;
+		pAd->VideoTurbine.TxLifeTime = GLOBAL_AP_VIDEO_CONFIG.TxLifeTime;
+		pAd->VideoTurbine.TxRetryLimit = GLOBAL_AP_VIDEO_CONFIG.TxRetryLimit;
+	}
+}
+
+VOID VideoTurbineDynamicTune(
+	IN PRTMP_ADAPTER pAd)
+{
+	if (pAd->VideoTurbine.Enable == TRUE) 
+	{
+			UINT32 MacReg = 0;
+
+		/* Tx retry limit = 2F,1F */
+		RTMP_IO_READ32(pAd, TX_RTY_CFG, &MacReg);
+		MacReg &= 0xFFFF0000;
+			MacReg |= GetAsicVideoRetry(pAd);
+		RTMP_IO_WRITE32(pAd, TX_RTY_CFG, MacReg);
+
+		pAd->VideoTurbine.TxBASize = GetAsicVideoTxBA(pAd);
+	}
+	else 
+	{
+			UINT32 MacReg = 0;
+
+		/* Default Tx retry limit = 1F,0F */
+		RTMP_IO_READ32(pAd, TX_RTY_CFG, &MacReg);
+		MacReg &= 0xFFFF0000;
+			MacReg |= GetAsicDefaultRetry(pAd);
+		RTMP_IO_WRITE32(pAd, TX_RTY_CFG, MacReg);
+
+		pAd->VideoTurbine.TxBASize = GetAsicDefaultTxBA(pAd);
+	}
+}
+
+UINT32 GetAsicDefaultRetry(
+	IN PRTMP_ADAPTER pAd)
+{
+	UINT32 RetryLimit;
+
+	RetryLimit = 0x1F0F;
+
+	return RetryLimit;
+}
+
+UCHAR GetAsicDefaultTxBA(
+	IN PRTMP_ADAPTER pAd)
+{
+        return pAd->CommonCfg.TxBASize;
+}
+
+UINT32 GetAsicVideoRetry(
+	IN PRTMP_ADAPTER pAd)
+{
+	return pAd->VideoTurbine.TxRetryLimit;
+}
+
+UCHAR GetAsicVideoTxBA(
+	IN PRTMP_ADAPTER pAd)
+{
+	return pAd->VideoTurbine.TxBASize;
+}
+
+VOID VideoConfigInit(
+	IN PRTMP_ADAPTER pAd)
+{
+	pAd->VideoTurbine.Enable = FALSE;
+	pAd->VideoTurbine.TxRetryLimit = 0x2F1F;
+	pAd->VideoTurbine.TxBASize = pAd->CommonCfg.TxBASize; 
+}
+
+#endif /* VIDEO_TURBINE_SUPPORT */
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_wep.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_wep.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_wep.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_wep.c	2017-09-23 03:42:49.730675944 +0800
@@ -0,0 +1,364 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include	"rt_config.h"
+
+UINT FCSTAB_32[256] = 
+{
+	0x00000000, 0x77073096, 0xee0e612c, 0x990951ba,
+	0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3,
+	0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988,
+	0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91,
+	0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de,
+	0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
+	0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec,
+	0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5,
+	0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172,
+	0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b,
+	0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940,
+	0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
+	0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116,
+	0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f,
+	0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924,
+	0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d,
+	0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a,
+	0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
+	0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818,
+	0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01,
+	0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, 
+	0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, 
+	0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c, 
+	0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65, 
+	0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 
+	0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb, 
+	0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0, 
+	0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, 
+	0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086, 
+	0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f, 
+	0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 
+	0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad, 
+	0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a, 
+	0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, 
+	0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8, 
+	0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1, 
+	0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 
+	0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7, 
+	0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc, 
+	0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, 
+	0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, 
+	0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b, 
+	0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 
+	0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79, 
+	0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, 
+	0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, 
+	0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, 
+	0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d, 
+	0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 
+	0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713, 
+	0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, 
+	0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, 
+	0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e, 
+	0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777, 
+	0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 
+	0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45, 
+	0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2, 
+	0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, 
+	0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0, 
+	0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9, 
+	0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 
+	0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf, 
+	0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94, 
+	0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d 
+}; 
+
+/*
+	========================================================================
+
+	Routine	Description:
+		Calculate a new FCS given the current FCS and the new data.
+		
+	Arguments:
+		Fcs	      the original FCS value
+		Cp          pointer to the data which will be calculate the FCS
+		Len         the length of the data
+		
+	Return Value:
+		UINT - FCS 32 bits
+		        
+	IRQL = DISPATCH_LEVEL
+
+	Note:
+	
+	========================================================================
+*/
+UINT	RTMP_CALC_FCS32(
+	IN	UINT	Fcs,
+	IN	PUCHAR	Cp,
+	IN	INT		Len)
+{
+	while (Len--)
+	   Fcs = (((Fcs) >> 8) ^ FCSTAB_32[((Fcs) ^ (*Cp++)) & 0xff]);
+
+	return (Fcs); 
+} 
+
+/*
+	========================================================================
+
+	Routine	Description:
+		Init WEP function.	
+		
+	Arguments:
+      pAd		Pointer to our adapter
+		pKey        Pointer to the WEP KEY
+		KeyId		   WEP Key ID
+		KeyLen      the length of WEP KEY
+		pDest       Pointer to the destination which Encryption data will store in.
+		
+	Return Value:
+		None
+
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+	
+	========================================================================
+*/
+VOID	RTMPInitWepEngine(
+	IN	PUCHAR			pIv,
+	IN	PUCHAR			pKey,
+	IN	UCHAR			KeyLen,
+	OUT	ARC4_CTX_STRUC  *pARC4_CTX)
+{	
+/*	UCHAR   seed[16];*/
+	PUCHAR	seed = NULL;
+	UINT8	seed_len;
+		
+	os_alloc_mem(NULL, (UCHAR **)&seed, sizeof(UCHAR)*16);
+	if (seed == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: seed Allocate memory fail!!!\n", __FUNCTION__));
+		return;
+	}
+	
+	/* WEP seed construction */
+	NdisZeroMemory(seed, 16);
+	NdisMoveMemory(seed, pIv, 3);
+	NdisMoveMemory(&seed[3], pKey, KeyLen);
+	seed_len = 3 + KeyLen;
+
+	/* RC4 uses a pseudo-random number generator (PRNG) 
+	   to generate a key stream */
+	ARC4_INIT(pARC4_CTX, &seed[0], seed_len);    		
+
+	if (seed != NULL)
+		os_free_mem(NULL, seed);
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Construct WEP IV header.
+
+	Arguments:
+		
+	Return Value:
+
+	Note:
+		It's a 4-octets header.
+				
+	========================================================================
+*/
+VOID RTMPConstructWEPIVHdr(
+	IN	UINT8 			key_idx,
+	IN	UCHAR			*pn,	
+	OUT	UCHAR			*iv_hdr)
+{	
+	NdisZeroMemory(iv_hdr, LEN_WEP_IV_HDR);
+
+	NdisMoveMemory(iv_hdr, pn, LEN_WEP_TSC);
+
+	/* Append key index */
+	iv_hdr[3] = (key_idx << 6);        
+}
+
+/*
+	========================================================================
+
+	Routine	Description:
+		WEP MPDU cryptographic encapsulation 	
+		
+	Arguments:
+		pAdapter		Pointer to our adapter
+		pSrc        Pointer to the received data
+		Len         the length of the received data
+		
+	Return Value:
+		
+	Note:
+	
+	========================================================================
+*/
+BOOLEAN	RTMPSoftEncryptWEP(
+	IN 		PRTMP_ADAPTER 	pAd,
+	IN 		PUCHAR			pIvHdr,
+	IN 		PCIPHER_KEY		pKey,
+	INOUT 	PUCHAR			pData,
+	IN 		ULONG			DataByteCnt)
+{
+	ARC4_CTX_STRUC *ARC4_CTX = NULL;
+	UINT 	FCSCRC32;
+
+	os_alloc_mem(NULL, (UCHAR **)&ARC4_CTX, sizeof(ARC4_CTX_STRUC));
+	if (ARC4_CTX == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: ARC4_CTX Allocate memory fail!!!\n", __FUNCTION__));
+		return FALSE;
+	}
+
+	if (pKey->KeyLen == 0)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s : The key is empty !\n", __FUNCTION__));
+		return FALSE;
+	}
+
+	/* Initialize WEP key stream */
+	RTMPInitWepEngine(pIvHdr, 
+					  pKey->Key, 					   
+					  pKey->KeyLen,
+					  ARC4_CTX);
+
+	/* WEP computes the ICV over the plaintext data */
+	FCSCRC32 = RTMP_CALC_FCS32(PPPINITFCS32, pData, DataByteCnt);
+	FCSCRC32 ^= 0xffffffff;             /* complement */
+	FCSCRC32 = cpu2le32(FCSCRC32);
+
+	/* Append 4-bytes ICV after the MPDU data */
+	NdisMoveMemory(pData + DataByteCnt, (PUCHAR)&FCSCRC32, LEN_ICV);
+
+	/* Encrypt the MPDU plaintext data and ICV using ARC4 with a seed */
+	ARC4_Compute(ARC4_CTX, pData, DataByteCnt + LEN_ICV, pData);
+
+	if (ARC4_CTX != NULL)
+		os_free_mem(NULL, ARC4_CTX);
+
+	return TRUE;
+}
+
+
+/*
+	========================================================================
+
+	Routine	Description:
+		Decrypt received WEP data	
+		
+	Arguments:
+		pAdapter		Pointer to our adapter
+		pSrc        Pointer to the received data
+		Len         the length of the received data
+		
+	Return Value:
+		TRUE        Decrypt WEP data success
+		FALSE       Decrypt WEP data failed
+		
+	Note:
+	
+	========================================================================
+*/
+BOOLEAN	RTMPSoftDecryptWEP(
+	IN 		PRTMP_ADAPTER 	pAd,
+	IN 		PCIPHER_KEY		pKey,
+	INOUT 	PUCHAR			pData,
+	INOUT 	UINT16			*DataByteCnt)
+{
+	/*ARC4_CTX_STRUC 	ARC4_CTX;*/
+	ARC4_CTX_STRUC 	*ARC4_CTX = NULL;
+	PUCHAR			plaintext_ptr;
+	UINT16			plaintext_len;
+	PUCHAR			ciphertext_ptr;
+	UINT16			ciphertext_len;
+	UINT			trailfcs;
+	UINT    		crc32;
+	
+	os_alloc_mem(NULL, (UCHAR **)&ARC4_CTX, sizeof(ARC4_CTX_STRUC));
+	if (ARC4_CTX == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: ARC4_CTX Allocate memory fail!!!\n", __FUNCTION__));
+		return FALSE;
+	}
+
+	if (pKey->KeyLen == 0)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s : The key is not available !\n", __FUNCTION__));
+		return FALSE;
+	}
+
+	/* Initialize WEP key stream */
+	RTMPInitWepEngine(pData, 
+					  pKey->Key, 					   
+					  pKey->KeyLen,
+					  ARC4_CTX);
+
+	/* Skip the WEP IV header (4-bytes) */
+	ciphertext_ptr = pData + LEN_WEP_IV_HDR;
+	ciphertext_len = *DataByteCnt - LEN_WEP_IV_HDR;
+	
+	/* Decrypt the WEP MPDU. It shall include plaintext and ICV.
+	   The result output would overwrite the original WEP IV header position */
+	ARC4_Compute(ARC4_CTX, 
+				 ciphertext_ptr, 
+				 ciphertext_len, 
+				 pData);
+
+	/* Point to the decrypted data frame and its length shall exclude ICV length */
+	plaintext_ptr = pData;
+	plaintext_len = ciphertext_len - LEN_ICV;
+
+	/* Extract peer's the ICV */
+	NdisMoveMemory(&trailfcs, plaintext_ptr + plaintext_len, LEN_ICV);
+
+	/* WEP recomputes the ICV and 
+	   bit-wise compares it with the decrypted ICV from the MPDU. */
+	crc32 = RTMP_CALC_FCS32(PPPINITFCS32, plaintext_ptr, plaintext_len);
+	crc32 ^= 0xffffffff;             /* complement */
+
+    if(crc32 != cpu2le32(trailfcs))
+    {
+		DBGPRINT(RT_DEBUG_ERROR, ("! WEP Data CRC Error !\n"));	 /*CRC error.*/
+		return FALSE;
+	}
+
+	/* Update the total data length */
+	*DataByteCnt = plaintext_len;
+	
+	if (ARC4_CTX != NULL)
+		os_free_mem(NULL, ARC4_CTX);
+
+	return TRUE;
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_wpa.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_wpa.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/cmm_wpa.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/cmm_wpa.c	2017-09-23 03:42:49.734675932 +0800
@@ -0,0 +1,4177 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+/* WPA OUI*/
+UCHAR		OUI_WPA[3]				= {0x00, 0x50, 0xF2};
+UCHAR		OUI_WPA_NONE_AKM[4]		= {0x00, 0x50, 0xF2, 0x00};
+UCHAR       OUI_WPA_VERSION[4]      = {0x00, 0x50, 0xF2, 0x01};
+UCHAR       OUI_WPA_WEP40[4]      = {0x00, 0x50, 0xF2, 0x01};
+UCHAR       OUI_WPA_TKIP[4]     = {0x00, 0x50, 0xF2, 0x02};
+UCHAR       OUI_WPA_CCMP[4]     = {0x00, 0x50, 0xF2, 0x04};
+UCHAR       OUI_WPA_WEP104[4]      = {0x00, 0x50, 0xF2, 0x05};
+UCHAR       OUI_WPA_8021X_AKM[4]	= {0x00, 0x50, 0xF2, 0x01};
+UCHAR       OUI_WPA_PSK_AKM[4]      = {0x00, 0x50, 0xF2, 0x02};
+/* WPA2 OUI*/
+UCHAR		OUI_WPA2[3]				= {0x00, 0x0F, 0xAC};
+UCHAR       OUI_WPA2_WEP40[4]   = {0x00, 0x0F, 0xAC, 0x01};
+UCHAR       OUI_WPA2_TKIP[4]        = {0x00, 0x0F, 0xAC, 0x02};
+UCHAR       OUI_WPA2_CCMP[4]        = {0x00, 0x0F, 0xAC, 0x04};
+UCHAR       OUI_WPA2_8021X_AKM[4]   = {0x00, 0x0F, 0xAC, 0x01};
+UCHAR       OUI_WPA2_PSK_AKM[4]   	= {0x00, 0x0F, 0xAC, 0x02};
+UCHAR       OUI_WPA2_WEP104[4]   = {0x00, 0x0F, 0xAC, 0x05};
+
+
+
+static VOID	ConstructEapolKeyData(
+	IN	PMAC_TABLE_ENTRY	pEntry,
+	IN	UCHAR			GroupKeyWepStatus,	
+	IN	UCHAR			keyDescVer,
+	IN 	UCHAR			MsgType,
+	IN	UCHAR			DefaultKeyIdx,
+	IN	UCHAR			*GTK,
+	IN	UCHAR			*RSNIE,
+	IN	UCHAR			RSNIE_LEN,
+	OUT PEAPOL_PACKET   pMsg);
+
+static VOID WpaEAPPacketAction(
+    IN PRTMP_ADAPTER pAd, 
+    IN MLME_QUEUE_ELEM *Elem); 
+
+static VOID WpaEAPOLASFAlertAction(
+    IN PRTMP_ADAPTER pAd, 
+    IN MLME_QUEUE_ELEM *Elem); 
+
+static VOID WpaEAPOLLogoffAction(
+    IN PRTMP_ADAPTER pAd, 
+    IN MLME_QUEUE_ELEM *Elem); 
+
+static VOID WpaEAPOLStartAction(
+    IN PRTMP_ADAPTER    pAd, 
+    IN MLME_QUEUE_ELEM  *Elem);
+
+static VOID WpaEAPOLKeyAction(
+    IN PRTMP_ADAPTER    pAd, 
+    IN MLME_QUEUE_ELEM  *Elem);
+
+/*  
+    ==========================================================================
+    Description: 
+        association state machine init, including state transition and timer init
+    Parameters: 
+        S - pointer to the association state machine
+    ==========================================================================
+ */
+VOID WpaStateMachineInit(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  STATE_MACHINE *S, 
+    OUT STATE_MACHINE_FUNC Trans[]) 
+{
+    StateMachineInit(S, (STATE_MACHINE_FUNC *)Trans, MAX_WPA_PTK_STATE, MAX_WPA_MSG, (STATE_MACHINE_FUNC)Drop, WPA_PTK, WPA_MACHINE_BASE);
+
+    StateMachineSetAction(S, WPA_PTK, MT2_EAPPacket, (STATE_MACHINE_FUNC)WpaEAPPacketAction);
+    StateMachineSetAction(S, WPA_PTK, MT2_EAPOLStart, (STATE_MACHINE_FUNC)WpaEAPOLStartAction);
+    StateMachineSetAction(S, WPA_PTK, MT2_EAPOLLogoff, (STATE_MACHINE_FUNC)WpaEAPOLLogoffAction);
+    StateMachineSetAction(S, WPA_PTK, MT2_EAPOLKey, (STATE_MACHINE_FUNC)WpaEAPOLKeyAction);
+    StateMachineSetAction(S, WPA_PTK, MT2_EAPOLASFAlert, (STATE_MACHINE_FUNC)WpaEAPOLASFAlertAction);
+}
+
+/*
+    ==========================================================================
+    Description:
+        this is state machine function. 
+        When receiving EAP packets which is  for 802.1x authentication use. 
+        Not use in PSK case
+    Return:
+    ==========================================================================
+*/
+VOID WpaEAPPacketAction(
+    IN PRTMP_ADAPTER pAd, 
+    IN MLME_QUEUE_ELEM *Elem) 
+{   
+}
+
+VOID WpaEAPOLASFAlertAction(
+    IN PRTMP_ADAPTER pAd, 
+    IN MLME_QUEUE_ELEM *Elem) 
+{   
+}
+
+VOID WpaEAPOLLogoffAction(
+    IN PRTMP_ADAPTER pAd, 
+    IN MLME_QUEUE_ELEM *Elem) 
+{   
+}
+
+/*
+    ==========================================================================
+    Description:
+       Start 4-way HS when rcv EAPOL_START which may create by our driver in assoc.c
+    Return:
+    ==========================================================================
+*/
+VOID WpaEAPOLStartAction(
+    IN PRTMP_ADAPTER    pAd, 
+    IN MLME_QUEUE_ELEM  *Elem) 
+{   
+    MAC_TABLE_ENTRY     *pEntry;
+    PHEADER_802_11      pHeader;
+
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */    
+
+    DBGPRINT(RT_DEBUG_TRACE, ("WpaEAPOLStartAction ===> \n"));
+    
+    pHeader = (PHEADER_802_11)Elem->Msg;
+    
+    /*For normaol PSK, we enqueue an EAPOL-Start command to trigger the process.*/
+    if (Elem->MsgLen == 6)
+        pEntry = MacTableLookup(pAd, Elem->Msg);
+    else
+    {
+        pEntry = MacTableLookup(pAd, pHeader->Addr2);
+    }
+    
+    if (pEntry) 
+    {
+		DBGPRINT(RT_DEBUG_TRACE, (" PortSecured(%d), WpaState(%d), AuthMode(%d), PMKID_CacheIdx(%d) \n", pEntry->PortSecured, pEntry->WpaState, pEntry->AuthMode, pEntry->PMKID_CacheIdx));
+
+        if ((pEntry->PortSecured == WPA_802_1X_PORT_NOT_SECURED)
+			&& (pEntry->WpaState < AS_PTKSTART)
+            && ((pEntry->AuthMode == Ndis802_11AuthModeWPAPSK) || (pEntry->AuthMode == Ndis802_11AuthModeWPA2PSK) || ((pEntry->AuthMode == Ndis802_11AuthModeWPA2) && (pEntry->PMKID_CacheIdx != ENTRY_NOT_FOUND))))
+        {
+            pEntry->PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
+            pEntry->WpaState = AS_INITPSK;
+            pEntry->PortSecured = WPA_802_1X_PORT_NOT_SECURED;
+            NdisZeroMemory(pEntry->R_Counter, sizeof(pEntry->R_Counter));
+            pEntry->ReTryCounter = PEER_MSG1_RETRY_TIMER_CTR;
+            
+            WPAStart4WayHS(pAd, pEntry, PEER_MSG1_RETRY_EXEC_INTV);
+        }
+    }
+}
+
+/*
+    ==========================================================================
+    Description:
+        This is state machine function. 
+        When receiving EAPOL packets which is  for 802.1x key management. 
+        Use both in WPA, and WPAPSK case. 
+        In this function, further dispatch to different functions according to the received packet.  3 categories are : 
+          1.  normal 4-way pairwisekey and 2-way groupkey handshake
+          2.  MIC error (Countermeasures attack)  report packet from STA.
+          3.  Request for pairwise/group key update from STA
+    Return:
+    ==========================================================================
+*/
+VOID WpaEAPOLKeyAction(
+    IN PRTMP_ADAPTER    pAd, 
+    IN MLME_QUEUE_ELEM  *Elem) 
+{	
+    MAC_TABLE_ENTRY     *pEntry;
+    PHEADER_802_11      pHeader;
+    PEAPOL_PACKET       pEapol_packet;	
+	KEY_INFO			peerKeyInfo;
+	UINT				eapol_len;
+
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */   
+
+    DBGPRINT(RT_DEBUG_TRACE, ("WpaEAPOLKeyAction ===>\n"));
+
+    pHeader = (PHEADER_802_11)Elem->Msg;
+    pEapol_packet = (PEAPOL_PACKET)&Elem->Msg[LENGTH_802_11 + LENGTH_802_1_H];
+	eapol_len = CONV_ARRARY_TO_UINT16(pEapol_packet->Body_Len) + LENGTH_EAPOL_H;
+
+	NdisZeroMemory((PUCHAR)&peerKeyInfo, sizeof(peerKeyInfo));
+	NdisMoveMemory((PUCHAR)&peerKeyInfo, (PUCHAR)&pEapol_packet->KeyDesc.KeyInfo, sizeof(KEY_INFO));
+
+
+	*((USHORT *)&peerKeyInfo) = cpu2le16(*((USHORT *)&peerKeyInfo));
+
+    do
+    {
+        pEntry = MacTableLookup(pAd, pHeader->Addr2);
+
+		if (!pEntry || (!IS_ENTRY_CLIENT(pEntry) && !IS_ENTRY_APCLI(pEntry)))		
+            break;
+
+		if (pEntry->AuthMode < Ndis802_11AuthModeWPA)
+				break;		
+
+		DBGPRINT(RT_DEBUG_TRACE, ("Receive EAPoL-Key frame from STA %02X-%02X-%02X-%02X-%02X-%02X\n", PRINT_MAC(pEntry->Addr)));
+
+		if (eapol_len > Elem->MsgLen - LENGTH_802_11 - LENGTH_802_1_H)
+		{
+            DBGPRINT(RT_DEBUG_ERROR, ("The length of EAPoL packet is invalid \n"));
+            break;
+        }
+
+        if (((pEapol_packet->ProVer != EAPOL_VER) && (pEapol_packet->ProVer != EAPOL_VER2)) || 
+			((pEapol_packet->KeyDesc.Type != WPA1_KEY_DESC) && (pEapol_packet->KeyDesc.Type != WPA2_KEY_DESC)))
+        {
+            DBGPRINT(RT_DEBUG_ERROR, ("Key descripter does not match with WPA rule\n"));
+            break;
+        }
+
+		/* The value 1 shall be used for all EAPOL-Key frames to and from a STA when */
+		/* neither the group nor pairwise ciphers are CCMP for Key Descriptor 1.*/
+		if ((pEntry->WepStatus == Ndis802_11Encryption2Enabled) && (peerKeyInfo.KeyDescVer != KEY_DESC_TKIP))
+        {
+	        DBGPRINT(RT_DEBUG_ERROR, ("Key descripter version not match(TKIP) \n"));
+    	    break;
+    	}	
+		/* The value 2 shall be used for all EAPOL-Key frames to and from a STA when */
+		/* either the pairwise or the group cipher is AES-CCMP for Key Descriptor 2.*/
+    	else if ((pEntry->WepStatus == Ndis802_11Encryption3Enabled) && (peerKeyInfo.KeyDescVer != KEY_DESC_AES))
+    	{
+        	DBGPRINT(RT_DEBUG_ERROR, ("Key descripter version not match(AES) \n"));
+        	break;
+    	}
+
+		/* Check if this STA is in class 3 state and the WPA state is started 						*/
+        if ((pEntry->Sst == SST_ASSOC) && (pEntry->WpaState >= AS_INITPSK))
+        {			 		
+			/* Check the Key Ack (bit 7) of the Key Information to determine the Authenticator */
+			/* or not.*/
+			/* An EAPOL-Key frame that is sent by the Supplicant in response to an EAPOL-*/
+			/* Key frame from the Authenticator must not have the Ack bit set.*/
+			if (peerKeyInfo.KeyAck == 1)
+			{
+				/* The frame is snet by Authenticator. */
+				/* So the Supplicant side shall handle this.*/
+
+				if ((peerKeyInfo.Secure == 0) && (peerKeyInfo.Request == 0) && 
+					(peerKeyInfo.Error == 0) && (peerKeyInfo.KeyType == PAIRWISEKEY))
+				{
+					/* Process 1. the message 1 of 4-way HS in WPA or WPA2 */
+					/*			  EAPOL-Key(0,0,1,0,P,0,0,ANonce,0,DataKD_M1)*/
+					/*		   2. the message 3 of 4-way HS in WPA	*/
+					/*			  EAPOL-Key(0,1,1,1,P,0,KeyRSC,ANonce,MIC,DataKD_M3)*/
+					if (peerKeyInfo.KeyMic == 0)
+                    	PeerPairMsg1Action(pAd, pEntry, Elem);
+	                else                	                	
+    	                PeerPairMsg3Action(pAd, pEntry, Elem);
+				}
+				else if ((peerKeyInfo.Secure == 1) && 
+						 (peerKeyInfo.KeyMic == 1) &&
+						 (peerKeyInfo.Request == 0) && 
+						 (peerKeyInfo.Error == 0))
+				{
+					/* Process 1. the message 3 of 4-way HS in WPA2 */
+					/*			  EAPOL-Key(1,1,1,1,P,0,KeyRSC,ANonce,MIC,DataKD_M3)*/
+					/*		   2. the message 1 of group KS in WPA or WPA2*/
+					/*			  EAPOL-Key(1,1,1,0,G,0,Key RSC,0, MIC,GTK[N])*/
+					if (peerKeyInfo.KeyType == PAIRWISEKEY)
+						PeerPairMsg3Action(pAd, pEntry, Elem);
+					else
+						PeerGroupMsg1Action(pAd, pEntry, Elem);					
+				}
+			}
+			else
+			{
+				/* The frame is snet by Supplicant.		*/
+				/* So the Authenticator side shall handle this.*/
+				if ((peerKeyInfo.Request == 0) && 
+					 	 (peerKeyInfo.Error == 0) && 
+					 	 (peerKeyInfo.KeyMic == 1))
+				{
+					if (peerKeyInfo.Secure == 0 && peerKeyInfo.KeyType == PAIRWISEKEY)
+					{
+						/* EAPOL-Key(0,1,0,0,P,0,0,SNonce,MIC,Data)*/
+						/* Process 1. message 2 of 4-way HS in WPA or WPA2 */
+						/*		   2. message 4 of 4-way HS in WPA											*/
+						if (CONV_ARRARY_TO_UINT16(pEapol_packet->KeyDesc.KeyDataLen) == 0)
+						{
+							PeerPairMsg4Action(pAd, pEntry, Elem);
+    	            	}
+						else
+						{
+							PeerPairMsg2Action(pAd, pEntry, Elem);
+						}
+					}
+					else if (peerKeyInfo.Secure == 1 && peerKeyInfo.KeyType == PAIRWISEKEY)
+					{
+						/* EAPOL-Key(1,1,0,0,P,0,0,0,MIC,0)						*/
+						/* Process message 4 of 4-way HS in WPA2*/
+						PeerPairMsg4Action(pAd, pEntry, Elem);
+					}
+					else if (peerKeyInfo.Secure == 1 && peerKeyInfo.KeyType == GROUPKEY)
+					{
+						/* EAPOL-Key(1,1,0,0,G,0,0,0,MIC,0)*/
+						/* Process message 2 of Group key HS in WPA or WPA2 */
+						PeerGroupMsg2Action(pAd, pEntry, &Elem->Msg[LENGTH_802_11], (Elem->MsgLen - LENGTH_802_11));
+					}
+				}
+			}			            
+        }
+    }while(FALSE);
+}
+
+/*
+	========================================================================
+
+	Routine	Description:
+		Copy frame from waiting queue into relative ring buffer and set 
+	appropriate ASIC register to kick hardware encryption before really
+	sent out to air.
+		
+	Arguments:
+		pAd		Pointer	to our adapter
+		PNDIS_PACKET	Pointer to outgoing Ndis frame
+		NumberOfFrag	Number of fragment required
+		
+	Return Value:
+		None
+
+	Note:
+	
+	========================================================================
+*/
+VOID RTMPToWirelessSta(
+    IN  PRTMP_ADAPTER   	pAd,
+    IN  PMAC_TABLE_ENTRY 	pEntry,
+    IN  PUCHAR          	pHeader802_3,
+    IN  UINT            	HdrLen,
+    IN  PUCHAR          	pData,
+    IN  UINT            	DataLen,
+    IN	BOOLEAN				bClearFrame)
+{
+    PNDIS_PACKET    pPacket;
+    NDIS_STATUS     Status;
+
+	if ((!pEntry) || (!IS_ENTRY_CLIENT(pEntry) && !IS_ENTRY_APCLI(pEntry)
+	))
+		return;
+
+	do {
+        	/* build a NDIS packet*/
+        	Status = RTMPAllocateNdisPacket(pAd, &pPacket, pHeader802_3, HdrLen, pData, DataLen);
+        	if (Status != NDIS_STATUS_SUCCESS)
+            	break;
+
+        
+			if (bClearFrame)
+				RTMP_SET_PACKET_CLEAR_EAP_FRAME(pPacket, 1);
+			else
+				RTMP_SET_PACKET_CLEAR_EAP_FRAME(pPacket, 0);	
+		{
+			RTMP_SET_PACKET_SOURCE(pPacket, PKTSRC_NDIS);
+
+			RTMP_SET_PACKET_NET_DEVICE_MBSSID(pPacket, MAIN_MBSSID);	/* set a default value*/
+			if(pEntry->apidx != 0)
+        		RTMP_SET_PACKET_NET_DEVICE_MBSSID(pPacket, pEntry->apidx);
+		
+        	RTMP_SET_PACKET_WCID(pPacket, (UCHAR)pEntry->Aid);
+			RTMP_SET_PACKET_MOREDATA(pPacket, FALSE);
+		}
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			/* send out the packet*/
+			Status = STASendPacket(pAd, pPacket);
+			if (Status == NDIS_STATUS_SUCCESS)
+			{
+				UCHAR   Index;
+				
+				/* Dequeue one frame from TxSwQueue0..3 queue and process it*/
+				/* There are three place calling dequeue for TX ring.*/
+				/* 1. Here, right after queueing the frame.*/
+				/* 2. At the end of TxRingTxDone service routine.*/
+				/* 3. Upon NDIS call RTMPSendPackets*/
+				if((!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS)) && 
+					(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS)))
+				{
+					for(Index = 0; Index < 5; Index ++)
+						if(pAd->TxSwQueue[Index].Number > 0)
+							RTMPDeQueuePacket(pAd, FALSE, Index, MAX_TX_PROCESS);
+				}
+			}
+		}
+#endif /* CONFIG_STA_SUPPORT */
+  
+    } while (FALSE);
+}
+
+/*
+    ==========================================================================
+    Description:
+        Check the validity of the received EAPoL frame
+    Return:
+        TRUE if all parameters are OK, 
+        FALSE otherwise
+    ==========================================================================
+ */
+BOOLEAN PeerWpaMessageSanity(
+    IN 	PRTMP_ADAPTER 		pAd, 
+    IN 	PEAPOL_PACKET 		pMsg, 
+    IN 	ULONG 				MsgLen, 
+    IN 	UCHAR				MsgType,
+    IN 	MAC_TABLE_ENTRY  	*pEntry)
+{
+	UCHAR			mic[LEN_KEY_DESC_MIC], digest[80]; /*, KEYDATA[MAX_LEN_OF_RSNIE];*/
+	UCHAR			*KEYDATA = NULL;
+	BOOLEAN			bReplayDiff = FALSE;
+	BOOLEAN			bWPA2 = FALSE;
+	KEY_INFO		EapolKeyInfo;	
+	UCHAR			GroupKeyIndex = 0;
+
+
+	/* allocate memory */
+	os_alloc_mem(NULL, (UCHAR **)&KEYDATA, MAX_LEN_OF_RSNIE);
+	if (KEYDATA == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+		return FALSE;
+	}
+
+	NdisZeroMemory(mic, sizeof(mic));
+	NdisZeroMemory(digest, sizeof(digest));
+	NdisZeroMemory(KEYDATA, sizeof(KEYDATA));
+	NdisZeroMemory((PUCHAR)&EapolKeyInfo, sizeof(EapolKeyInfo));
+	
+	NdisMoveMemory((PUCHAR)&EapolKeyInfo, (PUCHAR)&pMsg->KeyDesc.KeyInfo, sizeof(KEY_INFO));
+
+	*((USHORT *)&EapolKeyInfo) = cpu2le16(*((USHORT *)&EapolKeyInfo));
+
+	/* Choose WPA2 or not*/
+	if ((pEntry->AuthMode == Ndis802_11AuthModeWPA2) || (pEntry->AuthMode == Ndis802_11AuthModeWPA2PSK))
+		bWPA2 = TRUE;
+
+	/* 0. Check MsgType*/
+	if ((MsgType > EAPOL_GROUP_MSG_2) || (MsgType < EAPOL_PAIR_MSG_1))
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("The message type is invalid(%d)! \n", MsgType));
+		goto LabelErr;
+	}
+				
+	/* 1. Replay counter check	*/
+ 	if (MsgType == EAPOL_PAIR_MSG_1 || MsgType == EAPOL_PAIR_MSG_3 || MsgType == EAPOL_GROUP_MSG_1)	/* For supplicant*/
+    {
+    	/* First validate replay counter, only accept message with larger replay counter.*/
+		/* Let equal pass, some AP start with all zero replay counter*/
+		UCHAR	ZeroReplay[LEN_KEY_DESC_REPLAY];
+		
+        NdisZeroMemory(ZeroReplay, LEN_KEY_DESC_REPLAY);
+		if ((RTMPCompareMemory(pMsg->KeyDesc.ReplayCounter, pEntry->R_Counter, LEN_KEY_DESC_REPLAY) != 1) &&
+			(RTMPCompareMemory(pMsg->KeyDesc.ReplayCounter, ZeroReplay, LEN_KEY_DESC_REPLAY) != 0))
+    	{
+			bReplayDiff = TRUE;
+    	}						
+ 	}
+	else if (MsgType == EAPOL_PAIR_MSG_2 || MsgType == EAPOL_PAIR_MSG_4 || MsgType == EAPOL_GROUP_MSG_2)	/* For authenticator*/
+	{
+		/* check Replay Counter coresponds to MSG from authenticator, otherwise discard*/
+    	if (!NdisEqualMemory(pMsg->KeyDesc.ReplayCounter, pEntry->R_Counter, LEN_KEY_DESC_REPLAY))
+    	{	
+			bReplayDiff = TRUE;	        
+    	}
+	}
+
+	/* Replay Counter different condition*/
+	if (bReplayDiff)
+	{
+		/* send wireless event - for replay counter different*/
+			RTMPSendWirelessEvent(pAd, IW_REPLAY_COUNTER_DIFF_EVENT_FLAG, pEntry->Addr, pEntry->apidx, 0); 
+
+		if (MsgType < EAPOL_GROUP_MSG_1)
+		{
+           	DBGPRINT(RT_DEBUG_ERROR, ("Replay Counter Different in pairwise msg %d of 4-way handshake!\n", MsgType));
+		}
+		else
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("Replay Counter Different in group msg %d of 2-way handshake!\n", (MsgType - EAPOL_PAIR_MSG_4)));
+		}
+		
+		hex_dump("Receive replay counter ", pMsg->KeyDesc.ReplayCounter, LEN_KEY_DESC_REPLAY);
+		hex_dump("Current replay counter ", pEntry->R_Counter, LEN_KEY_DESC_REPLAY);	
+        goto LabelErr;
+	}
+
+	/* 2. Verify MIC except Pairwise Msg1*/
+	if (MsgType != EAPOL_PAIR_MSG_1)
+	{
+		UCHAR			rcvd_mic[LEN_KEY_DESC_MIC];
+		UINT			eapol_len = CONV_ARRARY_TO_UINT16(pMsg->Body_Len) + 4;
+
+		/* Record the received MIC for check later*/
+		NdisMoveMemory(rcvd_mic, pMsg->KeyDesc.KeyMic, LEN_KEY_DESC_MIC);
+		NdisZeroMemory(pMsg->KeyDesc.KeyMic, LEN_KEY_DESC_MIC);
+							
+        if (EapolKeyInfo.KeyDescVer == KEY_DESC_TKIP)	/* TKIP*/
+        {	
+            RT_HMAC_MD5(pEntry->PTK, LEN_PTK_KCK, (PUCHAR)pMsg, eapol_len, mic, MD5_DIGEST_SIZE);
+        }
+        else if (EapolKeyInfo.KeyDescVer == KEY_DESC_AES)	/* AES        */
+        {                        
+            RT_HMAC_SHA1(pEntry->PTK, LEN_PTK_KCK, (PUCHAR)pMsg, eapol_len, digest, SHA1_DIGEST_SIZE);
+            NdisMoveMemory(mic, digest, LEN_KEY_DESC_MIC);
+        }
+	
+        if (!NdisEqualMemory(rcvd_mic, mic, LEN_KEY_DESC_MIC))
+        {
+			/* send wireless event - for MIC different*/
+				RTMPSendWirelessEvent(pAd, IW_MIC_DIFF_EVENT_FLAG, pEntry->Addr, pEntry->apidx, 0); 
+
+			if (MsgType < EAPOL_GROUP_MSG_1)
+			{
+            	DBGPRINT(RT_DEBUG_ERROR, ("MIC Different in pairwise msg %d of 4-way handshake!\n", MsgType));
+			}
+			else
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("MIC Different in group msg %d of 2-way handshake!\n", (MsgType - EAPOL_PAIR_MSG_4)));
+			}
+	
+			hex_dump("Received MIC", rcvd_mic, LEN_KEY_DESC_MIC);
+			hex_dump("Desired  MIC", mic, LEN_KEY_DESC_MIC);
+
+			goto LabelErr;
+        }        
+	}
+
+	/* 1. Decrypt the Key Data field if GTK is included.*/
+	/* 2. Extract the context of the Key Data field if it exist.	 */
+	/* The field in pairwise_msg_2_WPA1(WPA2) & pairwise_msg_3_WPA1 is clear.*/
+	/* The field in group_msg_1_WPA1(WPA2) & pairwise_msg_3_WPA2 is encrypted.*/
+	if (CONV_ARRARY_TO_UINT16(pMsg->KeyDesc.KeyDataLen) > 0)
+	{		
+		/* Decrypt this field		*/
+		if ((MsgType == EAPOL_PAIR_MSG_3 && bWPA2) || (MsgType == EAPOL_GROUP_MSG_1))
+		{					
+			if(
+				(EapolKeyInfo.KeyDescVer == KEY_DESC_AES))
+			{
+				UINT aes_unwrap_len = 0;
+				
+				/* AES */
+				AES_Key_Unwrap(pMsg->KeyDesc.KeyData, 
+									CONV_ARRARY_TO_UINT16(pMsg->KeyDesc.KeyDataLen),
+							   &pEntry->PTK[LEN_PTK_KCK], LEN_PTK_KEK, 
+							   KEYDATA, &aes_unwrap_len);
+				SET_UINT16_TO_ARRARY(pMsg->KeyDesc.KeyDataLen, aes_unwrap_len);
+			} 
+			else	  
+			{
+				TKIP_GTK_KEY_UNWRAP(&pEntry->PTK[LEN_PTK_KCK], 
+									pMsg->KeyDesc.KeyIv,									
+									pMsg->KeyDesc.KeyData, 
+									CONV_ARRARY_TO_UINT16(pMsg->KeyDesc.KeyDataLen),
+									KEYDATA);
+			}	
+
+			if (!bWPA2 && (MsgType == EAPOL_GROUP_MSG_1))
+				GroupKeyIndex = EapolKeyInfo.KeyIndex;
+			
+		}
+		else if ((MsgType == EAPOL_PAIR_MSG_2) || (MsgType == EAPOL_PAIR_MSG_3 && !bWPA2))
+		{					
+			NdisMoveMemory(KEYDATA, pMsg->KeyDesc.KeyData, CONV_ARRARY_TO_UINT16(pMsg->KeyDesc.KeyDataLen));			     
+		}
+		else
+		{
+			
+			goto LabelOK;
+		}
+
+		/* Parse Key Data field to */
+		/* 1. verify RSN IE for pairwise_msg_2_WPA1(WPA2) ,pairwise_msg_3_WPA1(WPA2)*/
+		/* 2. verify KDE format for pairwise_msg_3_WPA2, group_msg_1_WPA2*/
+		/* 3. update shared key for pairwise_msg_3_WPA2, group_msg_1_WPA1(WPA2)*/
+		if (!RTMPParseEapolKeyData(pAd, KEYDATA, 
+								  CONV_ARRARY_TO_UINT16(pMsg->KeyDesc.KeyDataLen), 
+								  GroupKeyIndex, MsgType, bWPA2, pEntry))
+		{
+			goto LabelErr;
+		}
+	}
+
+LabelOK:
+	if (KEYDATA != NULL)
+		os_free_mem(NULL, KEYDATA);
+	return TRUE;
+	
+LabelErr:
+	if (KEYDATA != NULL)
+		os_free_mem(NULL, KEYDATA);
+	return FALSE;
+}
+
+
+/*
+    ==========================================================================
+    Description:
+        This is a function to initilize 4-way handshake
+        
+    Return:
+         
+    ==========================================================================
+*/
+VOID WPAStart4WayHS(
+    IN PRTMP_ADAPTER    pAd, 
+    IN MAC_TABLE_ENTRY  *pEntry,
+    IN ULONG			TimeInterval) 
+{
+    UCHAR           Header802_3[14];
+	UCHAR   		*mpool;
+    PEAPOL_PACKET	pEapolFrame;
+	PUINT8			pBssid = NULL;
+	UCHAR			group_cipher = Ndis802_11WEPDisabled;
+
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */  
+
+    DBGPRINT(RT_DEBUG_TRACE, ("===> WPAStart4WayHS\n"));
+
+	if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS | fRTMP_ADAPTER_HALT_IN_PROGRESS))
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("[ERROR]WPAStart4WayHS : The interface is closed...\n"));
+		return;		
+	}
+
+
+	if (pBssid == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("[ERROR]WPAStart4WayHS : No corresponding Authenticator.\n"));		
+		return;
+    }
+
+	/* Check the status*/
+    if ((pEntry->WpaState > AS_PTKSTART) || (pEntry->WpaState < AS_INITPMK))
+    {
+        DBGPRINT(RT_DEBUG_ERROR, ("[ERROR]WPAStart4WayHS : Not expect calling\n"));
+        return;
+    }
+    
+    
+	/* Increment replay counter by 1*/
+	ADD_ONE_To_64BIT_VAR(pEntry->R_Counter);
+	
+	/* Randomly generate ANonce		*/
+	GenRandom(pAd, (UCHAR *)pBssid, pEntry->ANonce);	
+
+	/* Allocate memory for output*/
+	os_alloc_mem(NULL, (PUCHAR *)&mpool, TX_EAPOL_BUFFER);
+	if (mpool == NULL)
+    {
+        DBGPRINT(RT_DEBUG_ERROR, ("!!!%s : no memory!!!\n", __FUNCTION__));
+        return;
+    }
+
+	pEapolFrame = (PEAPOL_PACKET)mpool;
+	NdisZeroMemory(pEapolFrame, TX_EAPOL_BUFFER);
+	
+	/* Construct EAPoL message - Pairwise Msg 1*/
+	/* EAPOL-Key(0,0,1,0,P,0,0,ANonce,0,DataKD_M1)		*/
+	ConstructEapolMsg(pEntry,
+					  group_cipher,
+					  EAPOL_PAIR_MSG_1,
+					  0,					/* Default key index*/
+					  pEntry->ANonce,
+					  NULL,					/* TxRSC*/
+					  NULL,					/* GTK*/
+					  NULL,					/* RSNIE*/
+					  0,					/* RSNIE length	*/
+					  pEapolFrame);
+
+		
+	/* Make outgoing frame*/
+    MAKE_802_3_HEADER(Header802_3, pEntry->Addr, pBssid, EAPOL);            
+    RTMPToWirelessSta(pAd, pEntry, Header802_3, 
+					  LENGTH_802_3, (PUCHAR)pEapolFrame, 
+					  CONV_ARRARY_TO_UINT16(pEapolFrame->Body_Len) + 4, 
+					  (pEntry->PortSecured == WPA_802_1X_PORT_SECURED) ? FALSE : TRUE);
+
+	/* Trigger Retry Timer*/
+    RTMPModTimer(&pEntry->RetryTimer, TimeInterval);		
+
+	/* Update State*/
+    pEntry->WpaState = AS_PTKSTART;
+
+	os_free_mem(NULL, mpool);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<=== WPAStart4WayHS: send Msg1 of 4-way \n"));
+        
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Process Pairwise key Msg-1 of 4-way handshaking and send Msg-2 
+
+	Arguments:
+		pAd			Pointer	to our adapter
+		Elem		Message body
+		
+	Return Value:
+		None
+		
+	Note:
+		
+	========================================================================
+*/
+VOID PeerPairMsg1Action(
+	IN PRTMP_ADAPTER    pAd, 
+    IN MAC_TABLE_ENTRY  *pEntry,
+    IN MLME_QUEUE_ELEM  *Elem) 
+{
+	UCHAR				PTK[80];
+	UCHAR               Header802_3[14];
+	PEAPOL_PACKET		pMsg1;
+	UINT            	MsgLen;	
+	UCHAR   			*mpool;
+    PEAPOL_PACKET		pEapolFrame;
+	PUINT8				pCurrentAddr = NULL;
+	PUINT8				pmk_ptr = NULL;
+	UCHAR				group_cipher = Ndis802_11WEPDisabled;
+	PUINT8				rsnie_ptr = NULL;
+	UCHAR				rsnie_len = 0;
+	   
+	DBGPRINT(RT_DEBUG_TRACE, ("===> PeerPairMsg1Action \n"));
+
+	if ((!pEntry) || (!IS_ENTRY_CLIENT(pEntry) && !IS_ENTRY_APCLI(pEntry)))
+		return;
+
+    if (Elem->MsgLen < (LENGTH_802_11 + LENGTH_802_1_H + LENGTH_EAPOL_H + MIN_LEN_OF_EAPOL_KEY_MSG))
+        return;
+	
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{				
+		{
+		pCurrentAddr = pAd->CurrentAddress;
+		pmk_ptr = pAd->StaCfg.PMK;
+		group_cipher = pAd->StaCfg.GroupCipher;
+		rsnie_ptr = pAd->StaCfg.RSN_IE;
+		rsnie_len = pAd->StaCfg.RSNIE_Len;
+	}
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	if (pCurrentAddr == NULL)
+		return;
+
+	/* Store the received frame*/
+	pMsg1 = (PEAPOL_PACKET) &Elem->Msg[LENGTH_802_11 + LENGTH_802_1_H];
+	MsgLen = Elem->MsgLen - LENGTH_802_11 - LENGTH_802_1_H;
+	
+	/* Sanity Check peer Pairwise message 1 - Replay Counter*/
+	if (PeerWpaMessageSanity(pAd, pMsg1, MsgLen, EAPOL_PAIR_MSG_1, pEntry) == FALSE)
+		return;
+	
+	/* Store Replay counter, it will use to verify message 3 and construct message 2*/
+	NdisMoveMemory(pEntry->R_Counter, pMsg1->KeyDesc.ReplayCounter, LEN_KEY_DESC_REPLAY);		
+
+	/* Store ANonce*/
+	NdisMoveMemory(pEntry->ANonce, pMsg1->KeyDesc.KeyNonce, LEN_KEY_DESC_NONCE);
+		
+	/* Generate random SNonce*/
+	GenRandom(pAd, (UCHAR *)pCurrentAddr, pEntry->SNonce);
+
+	{
+	    /* Calculate PTK(ANonce, SNonce)*/
+	    WpaDerivePTK(pAd,
+	    			pmk_ptr,
+			     	pEntry->ANonce,
+				 	pEntry->Addr, 
+				 	pEntry->SNonce,
+				 	pCurrentAddr, 
+				    PTK, 
+				    LEN_PTK);
+
+		/* Save key to PTK entry*/
+		NdisMoveMemory(pEntry->PTK, PTK, LEN_PTK);
+	}		    
+		
+	/* Update WpaState*/
+	pEntry->WpaState = AS_PTKINIT_NEGOTIATING;
+
+	/* Allocate memory for output*/
+	os_alloc_mem(NULL, (PUCHAR *)&mpool, TX_EAPOL_BUFFER);
+	if (mpool == NULL)
+    {
+        DBGPRINT(RT_DEBUG_ERROR, ("!!!%s : no memory!!!\n", __FUNCTION__));
+        return;
+    }
+
+	pEapolFrame = (PEAPOL_PACKET)mpool;
+	NdisZeroMemory(pEapolFrame, TX_EAPOL_BUFFER);
+
+	/* Construct EAPoL message - Pairwise Msg 2*/
+	/*  EAPOL-Key(0,1,0,0,P,0,0,SNonce,MIC,DataKD_M2)*/
+	ConstructEapolMsg(pEntry,
+					  group_cipher,
+					  EAPOL_PAIR_MSG_2,  
+					  0,				/* DefaultKeyIdx*/
+					  pEntry->SNonce,
+					  NULL,				/* TxRsc*/
+					  NULL,				/* GTK*/
+					  (UCHAR *)rsnie_ptr,
+					  rsnie_len,
+					  pEapolFrame);
+
+	/* Make outgoing frame*/
+	MAKE_802_3_HEADER(Header802_3, pEntry->Addr, pCurrentAddr, EAPOL);	
+	
+	RTMPToWirelessSta(pAd, pEntry, 
+					  Header802_3, sizeof(Header802_3), (PUCHAR)pEapolFrame, 
+					  CONV_ARRARY_TO_UINT16(pEapolFrame->Body_Len) + 4, TRUE);
+
+	os_free_mem(NULL, mpool);
+		
+	DBGPRINT(RT_DEBUG_TRACE, ("<=== PeerPairMsg1Action: send Msg2 of 4-way \n"));
+}	
+
+
+/*
+    ==========================================================================
+    Description:
+        When receiving the second packet of 4-way pairwisekey handshake.
+    Return:
+    ==========================================================================
+*/
+VOID PeerPairMsg2Action(
+    IN PRTMP_ADAPTER    pAd, 
+    IN MAC_TABLE_ENTRY  *pEntry,
+    IN MLME_QUEUE_ELEM  *Elem) 
+{   
+	UCHAR				PTK[80];
+    BOOLEAN             Cancelled;
+    PHEADER_802_11      pHeader;
+	UCHAR   			*mpool;
+	PEAPOL_PACKET		pEapolFrame;
+	PEAPOL_PACKET       pMsg2;
+	UINT            	MsgLen;
+    UCHAR               Header802_3[LENGTH_802_3];
+	UCHAR 				TxTsc[6];	
+	PUINT8				pBssid = NULL;
+	PUINT8				pmk_ptr = NULL;
+	PUINT8				gtk_ptr = NULL;
+	UCHAR				default_key = 0;
+	UCHAR				group_cipher = Ndis802_11WEPDisabled;
+	PUINT8				rsnie_ptr = NULL;
+	UCHAR				rsnie_len = 0;
+
+    DBGPRINT(RT_DEBUG_TRACE, ("===> PeerPairMsg2Action \n"));
+
+    if ((!pEntry) || !IS_ENTRY_CLIENT(pEntry))
+        return;
+        
+    if (Elem->MsgLen < (LENGTH_802_11 + LENGTH_802_1_H + LENGTH_EAPOL_H + MIN_LEN_OF_EAPOL_KEY_MSG))
+        return;
+
+    /* check Entry in valid State*/
+    if (pEntry->WpaState < AS_PTKSTART)
+        return;
+
+	
+
+    /* pointer to 802.11 header*/
+	pHeader = (PHEADER_802_11)Elem->Msg;
+
+	/* skip 802.11_header(24-byte) and LLC_header(8) */
+	pMsg2 = (PEAPOL_PACKET)&Elem->Msg[LENGTH_802_11 + LENGTH_802_1_H];       
+	MsgLen = Elem->MsgLen - LENGTH_802_11 - LENGTH_802_1_H;
+
+	/* Store SNonce*/
+	NdisMoveMemory(pEntry->SNonce, pMsg2->KeyDesc.KeyNonce, LEN_KEY_DESC_NONCE);
+
+	{
+		/* Derive PTK*/
+		WpaDerivePTK(pAd, 
+					(UCHAR *)pmk_ptr,  
+					pEntry->ANonce, 		/* ANONCE*/
+					(UCHAR *)pBssid, 
+					pEntry->SNonce, 		/* SNONCE*/
+					pEntry->Addr, 
+					PTK, 
+					LEN_PTK); 		
+
+    	NdisMoveMemory(pEntry->PTK, PTK, LEN_PTK);
+	}
+
+	/* Sanity Check peer Pairwise message 2 - Replay Counter, MIC, RSNIE*/
+	if (PeerWpaMessageSanity(pAd, pMsg2, MsgLen, EAPOL_PAIR_MSG_2, pEntry) == FALSE)
+		return;
+
+    do
+    {
+		/* Allocate memory for input*/
+		os_alloc_mem(NULL, (PUCHAR *)&mpool, TX_EAPOL_BUFFER);
+		if (mpool == NULL)
+	    {
+	        DBGPRINT(RT_DEBUG_ERROR, ("!!!%s : no memory!!!\n", __FUNCTION__));
+	        return;
+	    }
+
+		pEapolFrame = (PEAPOL_PACKET)mpool;
+		NdisZeroMemory(pEapolFrame, TX_EAPOL_BUFFER);
+	    
+        /* delete retry timer*/
+		RTMPCancelTimer(&pEntry->RetryTimer, &Cancelled);
+
+		/* Change state*/
+        pEntry->WpaState = AS_PTKINIT_NEGOTIATING;
+
+		/* Increment replay counter by 1*/
+		ADD_ONE_To_64BIT_VAR(pEntry->R_Counter);
+
+		/* Construct EAPoL message - Pairwise Msg 3*/
+		ConstructEapolMsg(pEntry,
+						  group_cipher,
+						  EAPOL_PAIR_MSG_3,
+						  default_key,
+						  pEntry->ANonce,
+						  TxTsc,
+						  (UCHAR *)gtk_ptr,
+						  (UCHAR *)rsnie_ptr,
+						  rsnie_len,
+						  pEapolFrame);
+            
+        /* Make outgoing frame*/
+        MAKE_802_3_HEADER(Header802_3, pEntry->Addr, pBssid, EAPOL);            
+        RTMPToWirelessSta(pAd, pEntry, Header802_3, LENGTH_802_3, 
+						  (PUCHAR)pEapolFrame, 
+						  CONV_ARRARY_TO_UINT16(pEapolFrame->Body_Len) + 4, 
+						  (pEntry->PortSecured == WPA_802_1X_PORT_SECURED) ? FALSE : TRUE);
+
+        pEntry->ReTryCounter = PEER_MSG3_RETRY_TIMER_CTR;
+		RTMPSetTimer(&pEntry->RetryTimer, PEER_MSG3_RETRY_EXEC_INTV);
+        
+		/* Update State*/
+        pEntry->WpaState = AS_PTKINIT_NEGOTIATING;
+		
+		os_free_mem(NULL, mpool);
+	
+    }while(FALSE);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<=== PeerPairMsg2Action: send Msg3 of 4-way \n"));
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Process Pairwise key Msg 3 of 4-way handshaking and send Msg 4 
+
+	Arguments:
+		pAd	Pointer	to our adapter
+		Elem		Message body
+		
+	Return Value:
+		None
+		
+	Note:
+		
+	========================================================================
+*/
+VOID PeerPairMsg3Action(
+    IN PRTMP_ADAPTER    pAd, 
+    IN MAC_TABLE_ENTRY  *pEntry,
+    IN MLME_QUEUE_ELEM  *Elem) 
+{
+	PHEADER_802_11		pHeader;
+	UCHAR               Header802_3[14];
+	UCHAR				*mpool;
+	PEAPOL_PACKET		pEapolFrame;
+	PEAPOL_PACKET		pMsg3;
+	UINT            	MsgLen;				
+	PUINT8				pCurrentAddr = NULL;
+	UCHAR				group_cipher = Ndis802_11WEPDisabled;
+	   
+	DBGPRINT(RT_DEBUG_TRACE, ("===> PeerPairMsg3Action \n"));
+	
+	if ((!pEntry) || (!IS_ENTRY_CLIENT(pEntry) && !IS_ENTRY_APCLI(pEntry)))
+		return;
+
+    if (Elem->MsgLen < (LENGTH_802_11 + LENGTH_802_1_H + LENGTH_EAPOL_H + MIN_LEN_OF_EAPOL_KEY_MSG))
+		return;
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{				
+		{
+		pCurrentAddr = pAd->CurrentAddress;
+		group_cipher = pAd->StaCfg.GroupCipher;
+
+	}	
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	if (pCurrentAddr == NULL)
+		return;
+	
+	/* Record 802.11 header & the received EAPOL packet Msg3*/
+	pHeader	= (PHEADER_802_11) Elem->Msg;
+	pMsg3 = (PEAPOL_PACKET) &Elem->Msg[LENGTH_802_11 + LENGTH_802_1_H];
+	MsgLen = Elem->MsgLen - LENGTH_802_11 - LENGTH_802_1_H;
+
+	/* Sanity Check peer Pairwise message 3 - Replay Counter, MIC, RSNIE*/
+	if (PeerWpaMessageSanity(pAd, pMsg3, MsgLen, EAPOL_PAIR_MSG_3, pEntry) == FALSE)
+		return;
+	
+	/* Save Replay counter, it will use construct message 4*/
+	NdisMoveMemory(pEntry->R_Counter, pMsg3->KeyDesc.ReplayCounter, LEN_KEY_DESC_REPLAY);
+
+	/* Double check ANonce*/
+	if (!NdisEqualMemory(pEntry->ANonce, pMsg3->KeyDesc.KeyNonce, LEN_KEY_DESC_NONCE))
+	{
+		return;
+	}
+
+	/* Allocate memory for output*/
+	os_alloc_mem(NULL, (PUCHAR *)&mpool, TX_EAPOL_BUFFER);
+	if (mpool == NULL)
+    {
+        DBGPRINT(RT_DEBUG_ERROR, ("!!!%s : no memory!!!\n", __FUNCTION__));
+        return;
+    }
+
+	pEapolFrame = (PEAPOL_PACKET)mpool;
+	NdisZeroMemory(pEapolFrame, TX_EAPOL_BUFFER);
+
+	/* Construct EAPoL message - Pairwise Msg 4*/
+	ConstructEapolMsg(pEntry,
+					  group_cipher,
+					  EAPOL_PAIR_MSG_4,  
+					  0,					/* group key index not used in message 4*/
+					  NULL,					/* Nonce not used in message 4*/
+					  NULL,					/* TxRSC not used in message 4*/
+					  NULL,					/* GTK not used in message 4*/
+					  NULL,					/* RSN IE not used in message 4*/
+					  0,
+					  pEapolFrame);
+
+	/* Update WpaState*/
+	pEntry->WpaState = AS_PTKINITDONE;	 	
+
+
+	/* Update pairwise key		*/
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		{
+		NdisMoveMemory(pAd->StaCfg.PTK, pEntry->PTK, LEN_PTK);
+		WPAInstallPairwiseKey(pAd, 
+							  BSS0, 
+							  pEntry, 
+							  FALSE);
+		NdisMoveMemory(&pAd->SharedKey[BSS0][0], &pEntry->PairwiseKey, sizeof(CIPHER_KEY));
+	}
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	/* open 802.1x port control and privacy filter*/
+	if (pEntry->AuthMode == Ndis802_11AuthModeWPA2PSK || 
+		pEntry->AuthMode == Ndis802_11AuthModeWPA2)
+	{
+		pEntry->PortSecured = WPA_802_1X_PORT_SECURED;
+		pEntry->PrivacyFilter = Ndis802_11PrivFilterAcceptAll;	
+
+#ifdef CONFIG_STA_SUPPORT
+		STA_PORT_SECURED(pAd);
+#endif /* CONFIG_STA_SUPPORT */
+		DBGPRINT(RT_DEBUG_TRACE, ("PeerPairMsg3Action: AuthMode(%s) PairwiseCipher(%s) GroupCipher(%s) \n",
+									GetAuthMode(pEntry->AuthMode),
+									GetEncryptType(pEntry->WepStatus),
+									GetEncryptType(group_cipher)));
+	}
+	else
+	{	
+	}
+
+	/* Init 802.3 header and send out*/
+	MAKE_802_3_HEADER(Header802_3, pEntry->Addr, pCurrentAddr, EAPOL);	
+	RTMPToWirelessSta(pAd, pEntry, 
+					  Header802_3, sizeof(Header802_3), 
+					  (PUCHAR)pEapolFrame, 
+					  CONV_ARRARY_TO_UINT16(pEapolFrame->Body_Len) + 4, TRUE);
+
+	os_free_mem(NULL, mpool);
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<=== PeerPairMsg3Action: send Msg4 of 4-way \n"));
+}
+
+/*
+    ==========================================================================
+    Description:
+        When receiving the last packet of 4-way pairwisekey handshake.
+        Initilize 2-way groupkey handshake following.
+    Return:
+    ==========================================================================
+*/
+VOID PeerPairMsg4Action(
+    IN PRTMP_ADAPTER    pAd, 
+    IN MAC_TABLE_ENTRY  *pEntry,
+    IN MLME_QUEUE_ELEM  *Elem) 
+{    
+	PEAPOL_PACKET   	pMsg4;    
+    PHEADER_802_11      pHeader;
+    UINT            	MsgLen;
+    BOOLEAN             Cancelled;
+	UCHAR				group_cipher = Ndis802_11WEPDisabled;
+
+    DBGPRINT(RT_DEBUG_TRACE, ("===> PeerPairMsg4Action\n"));
+
+    do
+    {
+        if ((!pEntry) || !IS_ENTRY_CLIENT(pEntry))
+            break;
+		
+        if (Elem->MsgLen < (LENGTH_802_11 + LENGTH_802_1_H + LENGTH_EAPOL_H + MIN_LEN_OF_EAPOL_KEY_MSG ) )
+            break;
+
+        if (pEntry->WpaState < AS_PTKINIT_NEGOTIATING)
+            break;
+
+
+        /* pointer to 802.11 header*/
+        pHeader = (PHEADER_802_11)Elem->Msg;
+
+		/* skip 802.11_header(24-byte) and LLC_header(8) */
+		pMsg4 = (PEAPOL_PACKET)&Elem->Msg[LENGTH_802_11 + LENGTH_802_1_H]; 
+		MsgLen = Elem->MsgLen - LENGTH_802_11 - LENGTH_802_1_H;
+
+        /* Sanity Check peer Pairwise message 4 - Replay Counter, MIC*/
+		if (PeerWpaMessageSanity(pAd, pMsg4, MsgLen, EAPOL_PAIR_MSG_4, pEntry) == FALSE)
+			break;
+
+        /* 3. Install pairwise key */
+		WPAInstallPairwiseKey(pAd, pEntry->apidx, pEntry, TRUE);
+        
+        /* 4. upgrade state */
+        pEntry->PrivacyFilter = Ndis802_11PrivFilterAcceptAll;
+        pEntry->WpaState = AS_PTKINITDONE;
+		pEntry->PortSecured = WPA_802_1X_PORT_SECURED;
+        
+
+		if (pEntry->AuthMode == Ndis802_11AuthModeWPA2 || 
+			pEntry->AuthMode == Ndis802_11AuthModeWPA2PSK)
+		{
+			pEntry->GTKState = REKEY_ESTABLISHED;
+			RTMPCancelTimer(&pEntry->RetryTimer, &Cancelled);
+
+
+			/* send wireless event - for set key done WPA2*/
+				RTMPSendWirelessEvent(pAd, IW_SET_KEY_DONE_WPA2_EVENT_FLAG, pEntry->Addr, pEntry->apidx, 0); 
+	
+ 
+	        DBGPRINT(RT_DEBUG_OFF, ("AP SETKEYS DONE - WPA2, AuthMode(%d)=%s, WepStatus(%d)=%s, GroupWepStatus(%d)=%s\n\n", 
+									pEntry->AuthMode, GetAuthMode(pEntry->AuthMode), 
+									pEntry->WepStatus, GetEncryptType(pEntry->WepStatus), 
+									group_cipher, 
+									GetEncryptType(group_cipher)));
+		}
+		else
+		{
+        	/* 5. init Group 2-way handshake if necessary.*/
+	        WPAStart2WayGroupHS(pAd, pEntry);
+
+        	pEntry->ReTryCounter = GROUP_MSG1_RETRY_TIMER_CTR;
+			RTMPModTimer(&pEntry->RetryTimer, PEER_MSG3_RETRY_EXEC_INTV);
+		}
+    }while(FALSE);
+    
+}
+
+/*
+    ==========================================================================
+    Description:
+        This is a function to send the first packet of 2-way groupkey handshake
+    Return:
+         
+    ==========================================================================
+*/
+VOID WPAStart2WayGroupHS(
+    IN PRTMP_ADAPTER    pAd, 
+    IN MAC_TABLE_ENTRY  *pEntry) 
+{
+    UCHAR               Header802_3[14];
+	UCHAR   			TxTsc[6]; 
+	UCHAR   			*mpool;
+	PEAPOL_PACKET		pEapolFrame;
+	UCHAR				group_cipher = Ndis802_11WEPDisabled;	
+	UCHAR				default_key = 0;
+	PUINT8				gnonce_ptr = NULL;
+	PUINT8				gtk_ptr = NULL;
+	PUINT8				pBssid = NULL;
+    
+	DBGPRINT(RT_DEBUG_TRACE, ("===> WPAStart2WayGroupHS\n"));
+
+    if ((!pEntry) || !IS_ENTRY_CLIENT(pEntry))
+        return;
+
+
+	/* Allocate memory for output*/
+	os_alloc_mem(NULL, (PUCHAR *)&mpool, TX_EAPOL_BUFFER);
+	if (mpool == NULL)
+    {
+        DBGPRINT(RT_DEBUG_ERROR, ("!!!%s : no memory!!!\n", __FUNCTION__));
+        return;
+    }
+
+	pEapolFrame = (PEAPOL_PACKET)mpool;
+	NdisZeroMemory(pEapolFrame, TX_EAPOL_BUFFER);
+
+    /* Increment replay counter by 1*/
+	ADD_ONE_To_64BIT_VAR(pEntry->R_Counter);
+		
+	/* Construct EAPoL message - Group Msg 1*/
+	ConstructEapolMsg(pEntry,
+					  group_cipher, 
+					  EAPOL_GROUP_MSG_1,
+					  default_key,
+					  (UCHAR *)gnonce_ptr,
+					  TxTsc,
+					  (UCHAR *)gtk_ptr,
+					  NULL,
+					  0,
+				  	  pEapolFrame);
+
+	/* Make outgoing frame*/
+    MAKE_802_3_HEADER(Header802_3, pEntry->Addr, pBssid, EAPOL);            
+    RTMPToWirelessSta(pAd, pEntry, 
+					  Header802_3, LENGTH_802_3, 
+					  (PUCHAR)pEapolFrame, 
+					  CONV_ARRARY_TO_UINT16(pEapolFrame->Body_Len) + 4, FALSE);
+
+	os_free_mem(NULL, mpool);
+
+    DBGPRINT(RT_DEBUG_TRACE, ("<=== WPAStart2WayGroupHS : send out Group Message 1 \n"));
+        
+    return;
+}
+     
+/*
+	========================================================================
+	
+	Routine Description:
+		Process Group key 2-way handshaking
+
+	Arguments:
+		pAd	Pointer	to our adapter
+		Elem		Message body
+		
+	Return Value:
+		None
+		
+	Note:
+		
+	========================================================================
+*/
+VOID	PeerGroupMsg1Action(
+	IN PRTMP_ADAPTER    pAd, 
+    IN MAC_TABLE_ENTRY  *pEntry,
+    IN MLME_QUEUE_ELEM  *Elem) 
+{
+    UCHAR               Header802_3[14];
+	UCHAR				*mpool;
+	PEAPOL_PACKET		pEapolFrame;
+	PEAPOL_PACKET		pGroup;
+	UINT            	MsgLen;
+	UCHAR				default_key = 0;
+	UCHAR				group_cipher = Ndis802_11WEPDisabled;
+	PUINT8				pCurrentAddr = NULL;
+#ifdef APCLI_SUPPORT
+	BOOLEAN             Cancelled;
+#endif /* APCLI_SUPPORT */
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("===> PeerGroupMsg1Action \n"));
+
+	if ((!pEntry) || (!IS_ENTRY_CLIENT(pEntry) && !IS_ENTRY_APCLI(pEntry)))
+        return;
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{				
+		pCurrentAddr = pAd->CurrentAddress;
+		group_cipher = pAd->StaCfg.GroupCipher;
+		default_key = pAd->StaCfg.DefaultKeyId;
+	}	
+#endif /* CONFIG_STA_SUPPORT */
+
+	if (pCurrentAddr == NULL)
+		return;
+	   
+	/* Process Group Message 1 frame. skip 802.11 header(24) & LLC_SNAP header(8)*/
+	pGroup = (PEAPOL_PACKET) &Elem->Msg[LENGTH_802_11 + LENGTH_802_1_H];
+	MsgLen = Elem->MsgLen - LENGTH_802_11 - LENGTH_802_1_H;
+
+	/* Sanity Check peer group message 1 - Replay Counter, MIC, RSNIE*/
+	if (PeerWpaMessageSanity(pAd, pGroup, MsgLen, EAPOL_GROUP_MSG_1, pEntry) == FALSE)
+		return;
+
+	/* delete retry timer*/
+
+	/* Save Replay counter, it will use to construct message 2*/
+	NdisMoveMemory(pEntry->R_Counter, pGroup->KeyDesc.ReplayCounter, LEN_KEY_DESC_REPLAY);	
+
+	/* Allocate memory for output*/
+	os_alloc_mem(NULL, (PUCHAR *)&mpool, TX_EAPOL_BUFFER);
+	if (mpool == NULL)
+    {
+        DBGPRINT(RT_DEBUG_ERROR, ("!!!%s : no memory!!!\n", __FUNCTION__));
+        return;
+    }
+
+	pEapolFrame = (PEAPOL_PACKET)mpool;
+	NdisZeroMemory(pEapolFrame, TX_EAPOL_BUFFER);
+
+
+	/* Construct EAPoL message - Group Msg 2*/
+	ConstructEapolMsg(pEntry,
+					  group_cipher,
+					  EAPOL_GROUP_MSG_2,  
+					  default_key,
+					  NULL,					/* Nonce not used*/
+					  NULL,					/* TxRSC not used*/
+					  NULL,					/* GTK not used*/
+					  NULL,					/* RSN IE not used*/
+					  0,
+					  pEapolFrame);
+					
+    /* open 802.1x port control and privacy filter*/
+	pEntry->PortSecured = WPA_802_1X_PORT_SECURED;
+	pEntry->PrivacyFilter = Ndis802_11PrivFilterAcceptAll;
+
+#ifdef CONFIG_STA_SUPPORT
+	STA_PORT_SECURED(pAd);
+#endif /* CONFIG_STA_SUPPORT */
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("PeerGroupMsg1Action: AuthMode(%s) PairwiseCipher(%s) GroupCipher(%s) \n",
+									GetAuthMode(pEntry->AuthMode),
+									GetEncryptType(pEntry->WepStatus),
+									GetEncryptType(group_cipher)));
+		
+	/* init header and Fill Packet and send Msg 2 to authenticator	*/
+	MAKE_802_3_HEADER(Header802_3, pEntry->Addr, pCurrentAddr, EAPOL);	
+	
+#ifdef CONFIG_STA_SUPPORT
+	if ((pAd->OpMode == OPMODE_STA) && INFRA_ON(pAd) && 
+		OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED) &&
+		RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS) &&
+		(pAd->MlmeAux.Channel == pAd->CommonCfg.Channel)
+		)
+	{
+		/* Now stop the scanning and need to send the rekey packet out */
+		pAd->MlmeAux.Channel = 0;
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	RTMPToWirelessSta(pAd, pEntry, 
+					  Header802_3, sizeof(Header802_3), 
+					  (PUCHAR)pEapolFrame, 
+					  CONV_ARRARY_TO_UINT16(pEapolFrame->Body_Len) + 4, FALSE);
+
+	os_free_mem(NULL, mpool);
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<=== PeerGroupMsg1Action: send group message 2\n"));
+}	
+
+
+VOID EnqueueStartForPSKExec(
+    IN PVOID SystemSpecific1, 
+    IN PVOID FunctionContext, 
+    IN PVOID SystemSpecific2, 
+    IN PVOID SystemSpecific3) 
+{
+	MAC_TABLE_ENTRY     *pEntry = (PMAC_TABLE_ENTRY) FunctionContext;
+
+	if ((pEntry) && IS_ENTRY_CLIENT(pEntry) && (pEntry->WpaState < AS_PTKSTART))
+	{
+		PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pEntry->pAd;
+
+		switch (pEntry->EnqueueEapolStartTimerRunning)
+		{
+			case EAPOL_START_PSK:								
+				DBGPRINT(RT_DEBUG_TRACE, ("Enqueue EAPoL-Start-PSK for sta(%02x:%02x:%02x:%02x:%02x:%02x) \n", PRINT_MAC(pEntry->Addr)));
+
+				MlmeEnqueue(pAd, WPA_STATE_MACHINE, MT2_EAPOLStart, 6, &pEntry->Addr, 0);
+				break;
+			default:
+				break;
+			
+		}
+	}			
+		pEntry->EnqueueEapolStartTimerRunning = EAPOL_START_DISABLE;
+		
+}
+
+
+VOID MlmeDeAuthAction(
+    IN PRTMP_ADAPTER    pAd, 
+    IN MAC_TABLE_ENTRY  *pEntry,
+	IN USHORT           Reason,
+	IN BOOLEAN          bDataFrameFirst)
+{
+    PUCHAR          pOutBuffer = NULL;
+    ULONG           FrameLen = 0;
+    HEADER_802_11   DeAuthHdr;
+    NDIS_STATUS     NStatus;
+
+    if (pEntry)
+    {
+        /* Send out a Deauthentication request frame*/
+        NStatus = MlmeAllocateMemory(pAd, &pOutBuffer);
+        if (NStatus != NDIS_STATUS_SUCCESS)
+            return;
+
+		/* send wireless event - for send disassication */
+			RTMPSendWirelessEvent(pAd, IW_DEAUTH_EVENT_FLAG, pEntry->Addr, pEntry->apidx, 0); 
+
+        DBGPRINT(RT_DEBUG_TRACE, ("Send DEAUTH frame with ReasonCode(%d) to %02x:%02x:%02x:%02x:%02x:%02x \n",Reason, PRINT_MAC(pEntry->Addr)));
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+        MgtMacHeaderInit(pAd, &DeAuthHdr, SUBTYPE_DEAUTH, 0, pEntry->Addr, pAd->CommonCfg.Bssid);	
+	}
+#endif /* CONFIG_STA_SUPPORT */
+        MakeOutgoingFrame(pOutBuffer,               &FrameLen, 
+                          sizeof(HEADER_802_11),    &DeAuthHdr,
+                          2,                        &Reason,
+                          END_OF_ARGS);
+
+
+
+		if (bDataFrameFirst)
+            MiniportMMRequest(pAd, MGMT_USE_QUEUE_FLAG, pOutBuffer, FrameLen);
+        else
+            MiniportMMRequest(pAd, 0, pOutBuffer, FrameLen);
+        MlmeFreeMemory(pAd, pOutBuffer);
+    
+        /* ApLogEvent(pAd, pEntry->Addr, EVENT_DISASSOCIATED);*/
+        MacTableDeleteEntry(pAd, pEntry->Aid, pEntry->Addr);
+    }
+}
+
+
+/*
+    ==========================================================================
+    Description:
+        When receiving the last packet of 2-way groupkey handshake.
+    Return:
+    ==========================================================================
+*/
+VOID PeerGroupMsg2Action(
+    IN PRTMP_ADAPTER    pAd, 
+    IN MAC_TABLE_ENTRY  *pEntry,
+    IN VOID             *Msg,
+    IN UINT             MsgLen) 
+{
+    UINT            	Len;
+    PUCHAR          	pData;
+    BOOLEAN         	Cancelled;
+	PEAPOL_PACKET       pMsg2;	
+	UCHAR				group_cipher = Ndis802_11WEPDisabled;	
+
+	DBGPRINT(RT_DEBUG_TRACE, ("===> PeerGroupMsg2Action \n"));
+
+    if ((!pEntry) || !IS_ENTRY_CLIENT(pEntry))
+        return;
+            
+    if (MsgLen < (LENGTH_802_1_H + LENGTH_EAPOL_H + MIN_LEN_OF_EAPOL_KEY_MSG))
+        return;
+            
+    if (pEntry->WpaState != AS_PTKINITDONE)
+        return;
+
+
+    do
+    {
+
+        
+        pData = (PUCHAR)Msg;
+		pMsg2 = (PEAPOL_PACKET) (pData + LENGTH_802_1_H);
+        Len = MsgLen - LENGTH_802_1_H;
+
+		/* Sanity Check peer group message 2 - Replay Counter, MIC*/
+		if (PeerWpaMessageSanity(pAd, pMsg2, Len, EAPOL_GROUP_MSG_2, pEntry) == FALSE)
+            break;
+
+        /* 3.  upgrade state*/
+
+		RTMPCancelTimer(&pEntry->RetryTimer, &Cancelled);
+        pEntry->GTKState = REKEY_ESTABLISHED;
+        
+		if ((pEntry->AuthMode == Ndis802_11AuthModeWPA2) || (pEntry->AuthMode == Ndis802_11AuthModeWPA2PSK))
+		{
+			/* send wireless event - for set key done WPA2*/
+				RTMPSendWirelessEvent(pAd, IW_SET_KEY_DONE_WPA2_EVENT_FLAG, pEntry->Addr, pEntry->apidx, 0); 
+
+			DBGPRINT(RT_DEBUG_OFF, ("AP SETKEYS DONE - WPA2, AuthMode(%d)=%s, WepStatus(%d)=%s, GroupWepStatus(%d)=%s\n\n", 
+										pEntry->AuthMode, GetAuthMode(pEntry->AuthMode), 
+										pEntry->WepStatus, GetEncryptType(pEntry->WepStatus), 
+										group_cipher, GetEncryptType(group_cipher)));
+		}
+		else
+		{
+			/* send wireless event - for set key done WPA*/
+				RTMPSendWirelessEvent(pAd, IW_SET_KEY_DONE_WPA1_EVENT_FLAG, pEntry->Addr, pEntry->apidx, 0); 
+
+        	DBGPRINT(RT_DEBUG_OFF, ("AP SETKEYS DONE - WPA1, AuthMode(%d)=%s, WepStatus(%d)=%s, GroupWepStatus(%d)=%s\n\n", 
+										pEntry->AuthMode, GetAuthMode(pEntry->AuthMode), 
+										pEntry->WepStatus, GetEncryptType(pEntry->WepStatus), 
+										group_cipher, GetEncryptType(group_cipher)));
+		}	
+    }while(FALSE);  
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Classify WPA EAP message type
+
+	Arguments:
+		EAPType		Value of EAP message type
+		MsgType		Internal Message definition for MLME state machine
+		
+	Return Value:
+		TRUE		Found appropriate message type
+		FALSE		No appropriate message type
+
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+		All these constants are defined in wpa_cmm.h
+		For supplicant, there is only EAPOL Key message avaliable
+		
+	========================================================================
+*/
+BOOLEAN	WpaMsgTypeSubst(
+	IN	UCHAR	EAPType,
+	OUT	INT		*MsgType)	
+{
+	switch (EAPType)
+	{
+		case EAPPacket:
+			*MsgType = MT2_EAPPacket;
+			break;
+		case EAPOLStart:
+			*MsgType = MT2_EAPOLStart;
+			break;
+		case EAPOLLogoff:
+			*MsgType = MT2_EAPOLLogoff;
+			break;
+		case EAPOLKey:
+			*MsgType = MT2_EAPOLKey;
+			break;
+		case EAPOLASFAlert:
+			*MsgType = MT2_EAPOLASFAlert;
+			break;
+		default:
+			return FALSE;		
+	}	
+	return TRUE;
+}
+
+/**
+ * inc_iv_byte - Increment arbitrary length byte array
+ * @counter: Pointer to byte array
+ * @len: Length of the counter in bytes
+ *
+ * This function increments the least byte of the counter by one and continues
+ * rolling over to more significant bytes if the byte was incremented from
+ * 0xff to 0x00.
+ */
+void inc_iv_byte(UCHAR *iv, UINT len, UINT cnt)
+{
+	int 	pos = 0;
+	int 	carry = 0;
+	UCHAR	pre_iv;
+
+	while (pos < len)
+	{
+		pre_iv = iv[pos];
+	
+		if (carry == 1)
+			iv[pos] ++;
+		else
+			iv[pos] += cnt;
+		
+		if (iv[pos] > pre_iv)
+			break;	
+		
+		carry = 1;
+		pos++;
+	}
+
+	if (pos >= len)
+		DBGPRINT(RT_DEBUG_WARN, ("!!! inc_iv_byte overflow !!!\n"));	
+}
+
+
+
+/*
+	========================================================================
+
+	Routine Description:
+		The pseudo-random function(PRF) that hashes various inputs to 
+		derive a pseudo-random value. To add liveness to the pseudo-random 
+		value, a nonce should be one of the inputs.
+
+		It is used to generate PTK, GTK or some specific random value.  
+
+	Arguments:
+		UCHAR	*key,		-	the key material for HMAC_SHA1 use
+		INT		key_len		-	the length of key
+		UCHAR	*prefix		-	a prefix label
+		INT		prefix_len	-	the length of the label
+		UCHAR	*data		-	a specific data with variable length		
+		INT		data_len	-	the length of a specific data	
+		INT		len			-	the output lenght
+
+	Return Value:
+		UCHAR	*output		-	the calculated result 
+
+	Note:
+		802.11i-2004	Annex H.3
+
+	========================================================================
+*/
+VOID	PRF(
+	IN	UCHAR	*key,
+	IN	INT		key_len,
+	IN	UCHAR	*prefix,
+	IN	INT		prefix_len,
+	IN	UCHAR	*data,
+	IN	INT		data_len,
+	OUT	UCHAR	*output,
+	IN	INT		len)
+{
+	INT		i;
+    UCHAR   *input;
+	INT		currentindex = 0;
+	INT		total_len;
+
+	/* Allocate memory for input*/
+	os_alloc_mem(NULL, (PUCHAR *)&input, 1024);
+	
+    if (input == NULL)
+    {
+        DBGPRINT(RT_DEBUG_ERROR, ("!!!PRF: no memory!!!\n"));
+        return;
+    }
+	
+	/* Generate concatenation input*/
+	NdisMoveMemory(input, prefix, prefix_len);
+
+	/* Concatenate a single octet containing 0*/
+	input[prefix_len] =	0;
+
+	/* Concatenate specific data*/
+	NdisMoveMemory(&input[prefix_len + 1], data, data_len);
+	total_len =	prefix_len + 1 + data_len;
+
+	/* Concatenate a single octet containing 0*/
+	/* This octet shall be update later*/
+	input[total_len] = 0;
+	total_len++;
+
+	/* Iterate to calculate the result by hmac-sha-1*/
+	/* Then concatenate to last result*/
+	for	(i = 0;	i <	(len + 19) / 20; i++)
+	{
+		RT_HMAC_SHA1(key, key_len, input, total_len, &output[currentindex], SHA1_DIGEST_SIZE);
+		currentindex +=	20;
+
+		/* update the last octet */
+		input[total_len - 1]++;
+	}	
+    os_free_mem(NULL, input);
+}
+
+/*
+* F(P, S, c, i) = U1 xor U2 xor ... Uc 
+* U1 = PRF(P, S || Int(i)) 
+* U2 = PRF(P, U1) 
+* Uc = PRF(P, Uc-1) 
+*/ 
+
+static void F(char *password, unsigned char *ssid, int ssidlength, int iterations, int count, unsigned char *output) 
+{ 
+    unsigned char digest[36], digest1[SHA1_DIGEST_SIZE]; 
+    int i, j, len; 
+	
+	len = strlen(password);
+		
+    /* U1 = PRF(P, S || int(i)) */ 
+    memcpy(digest, ssid, ssidlength); 
+    digest[ssidlength] = (unsigned char)((count>>24) & 0xff); 
+    digest[ssidlength+1] = (unsigned char)((count>>16) & 0xff); 
+    digest[ssidlength+2] = (unsigned char)((count>>8) & 0xff); 
+    digest[ssidlength+3] = (unsigned char)(count & 0xff); 
+    RT_HMAC_SHA1((unsigned char*) password, len, digest, ssidlength+4, digest1, SHA1_DIGEST_SIZE); /* for WPA update*/
+
+    /* output = U1 */ 
+    memcpy(output, digest1, SHA1_DIGEST_SIZE); 
+    for (i = 1; i < iterations; i++) 
+    { 
+    
+        /* Un = PRF(P, Un-1) */ 
+        RT_HMAC_SHA1((unsigned char*) password, len, digest1, SHA1_DIGEST_SIZE, digest, SHA1_DIGEST_SIZE); /* for WPA update*/
+        memcpy(digest1, digest, SHA1_DIGEST_SIZE); 
+
+        /* output = output xor Un */ 
+        for (j = 0; j < SHA1_DIGEST_SIZE; j++) 
+        { 
+            output[j] ^= digest[j]; 
+        } 
+    } 
+}
+
+/* 
+* password - ascii string up to 63 characters in length 
+* ssid - octet string up to 32 octets 
+* ssidlength - length of ssid in octets 
+* output must be 40 octets in length and outputs 256 bits of key 
+*/ 
+int RtmpPasswordHash(PSTRING password, PUCHAR ssid, INT ssidlength, PUCHAR output) 
+{ 
+    if ((strlen(password) > 63) || (ssidlength > 32))
+        return 0; 
+
+    F(password, ssid, ssidlength, 4096, 1, output); 
+    F(password, ssid, ssidlength, 4096, 2, &output[SHA1_DIGEST_SIZE]); 
+    return 1; 
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+		The key derivation function(KDF) is defined in IEEE 802.11r/D9.0, 8.5.1.5.2
+
+	Arguments:
+
+	Return Value:
+
+	Note:
+		Output ¡ö KDF-Length (K, label, Context) where
+		Input:    K, a 256-bit key derivation key
+				  label, a string identifying the purpose of the keys derived using this KDF
+				  Context, a bit string that provides context to identify the derived key
+				  Length, the length of the derived key in bits
+		Output: a Length-bit derived key
+
+		result ¡ö ""
+		iterations ¡ö (Length+255)/256 
+		do i = 1 to iterations
+			result ¡ö result || HMAC-SHA256(K, i || label || Context || Length)
+		od
+		return first Length bits of result, and securely delete all unused bits
+
+		In this algorithm, i and Length are encoded as 16-bit unsigned integers.
+
+	========================================================================
+*/
+VOID	KDF(
+	IN	PUINT8	key,
+	IN	INT		key_len,
+	IN	PUINT8	label,
+	IN	INT		label_len,
+	IN	PUINT8	data,
+	IN	INT		data_len,
+	OUT	PUINT8	output,
+	IN	USHORT	len)
+{
+	USHORT	i;
+    UCHAR   *input;
+	INT		currentindex = 0;
+	INT		total_len;
+	UINT	len_in_bits = (len << 3);
+
+	os_alloc_mem(NULL, (PUCHAR *)&input, 1024);
+	
+    if (input == NULL)
+    {
+        DBGPRINT(RT_DEBUG_ERROR, ("!!!KDF: no memory!!!\n"));
+        return;
+    } /* End of if */
+
+	NdisZeroMemory(input, 1024);
+	
+	/* Initial concatenated value (i || label || Context || Length)*/
+	/* concatenate 16-bit unsigned integer, its initial value is 1.	*/
+	input[0] = 1;
+	input[1] = 0;	
+	total_len = 2;
+
+	/* concatenate a prefix string*/
+	NdisMoveMemory(&input[total_len], label, label_len);
+	total_len += label_len;
+
+	/* concatenate the context*/
+	NdisMoveMemory(&input[total_len], data, data_len);
+	total_len += data_len;
+
+	/* concatenate the length in bits (16-bit unsigned integer)*/
+	input[total_len] = (len_in_bits & 0xFF);
+	input[total_len + 1] = (len_in_bits & 0xFF00) >> 8;	
+	total_len += 2;
+	 
+	for	(i = 1;	i <= ((len_in_bits + 255) / 256); i++)
+	{
+		/* HMAC-SHA256 derives output */
+		RT_HMAC_SHA256((UCHAR *)key, key_len, input, total_len, (UCHAR *)&output[currentindex], 32);		
+
+		currentindex +=	32; /* next concatenation location*/
+		input[0]++;			/* increment octet count*/
+
+	}			
+    os_free_mem(NULL, input);
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+
+	Arguments:
+		
+	Return Value:
+		
+	Note:
+		
+	========================================================================
+*/
+VOID RTMPDerivePMKID(
+	IN	PUINT8			pAaddr,
+	IN	PUINT8			pSpaddr,
+	IN	PUINT8			pKey,
+	IN	PUINT8			pAkm_oui,
+	OUT	PUINT8			pPMKID)
+{
+	UCHAR	digest[80], text_buf[20];
+	UINT8	text_len;
+			
+	/* Concatenate the text for PMKID calculation*/
+	NdisMoveMemory(&text_buf[0], "PMK Name", 8);	
+	NdisMoveMemory(&text_buf[8], pAaddr, MAC_ADDR_LEN);
+	NdisMoveMemory(&text_buf[14], pSpaddr, MAC_ADDR_LEN);
+	text_len = 20;
+
+	{
+		RT_HMAC_SHA1(pKey, PMK_LEN, text_buf, text_len, digest, SHA1_DIGEST_SIZE);
+	}
+
+	/* Truncate the first 128-bit of output result */
+	NdisMoveMemory(pPMKID, digest, LEN_PMKID);
+
+}
+
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		It utilizes PRF-384 or PRF-512 to derive session-specific keys from a PMK.
+		It shall be called by 4-way handshake processing.
+
+	Arguments:
+		pAd 	-	pointer to our pAdapter context
+		PMK		-	pointer to PMK
+		ANonce	-	pointer to ANonce
+		AA		-	pointer to Authenticator Address
+		SNonce	-	pointer to SNonce
+		SA		-	pointer to Supplicant Address		
+		len		-	indicate the length of PTK (octet)		
+		
+	Return Value:
+		Output		pointer to the PTK
+
+	Note:
+		Refer to IEEE 802.11i-2004 8.5.1.2
+		
+	========================================================================
+*/
+VOID WpaDerivePTK(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	UCHAR	*PMK,
+	IN	UCHAR	*ANonce,
+	IN	UCHAR	*AA,
+	IN	UCHAR	*SNonce,
+	IN	UCHAR	*SA,
+	OUT	UCHAR	*output,
+	IN	UINT	len)
+{	
+	UCHAR	concatenation[76];
+	UINT	CurrPos = 0;
+	UCHAR	temp[32];
+	UCHAR	Prefix[] = {'P', 'a', 'i', 'r', 'w', 'i', 's', 'e', ' ', 'k', 'e', 'y', ' ', 
+						'e', 'x', 'p', 'a', 'n', 's', 'i', 'o', 'n'};
+
+	/* initiate the concatenation input*/
+	NdisZeroMemory(temp, sizeof(temp));
+	NdisZeroMemory(concatenation, 76);
+
+	/* Get smaller address*/
+	if (RTMPCompareMemory(SA, AA, 6) == 1)
+		NdisMoveMemory(concatenation, AA, 6);
+	else
+		NdisMoveMemory(concatenation, SA, 6);
+	CurrPos += 6;
+
+	/* Get larger address*/
+	if (RTMPCompareMemory(SA, AA, 6) == 1)
+		NdisMoveMemory(&concatenation[CurrPos], SA, 6);
+	else
+		NdisMoveMemory(&concatenation[CurrPos], AA, 6);
+		
+	/* store the larger mac address for backward compatible of */
+	/* ralink proprietary STA-key issue		*/
+	NdisMoveMemory(temp, &concatenation[CurrPos], MAC_ADDR_LEN);		
+	CurrPos += 6;
+
+	/* Get smaller Nonce*/
+	if (RTMPCompareMemory(ANonce, SNonce, 32) == 0)
+		NdisMoveMemory(&concatenation[CurrPos], temp, 32);	/* patch for ralink proprietary STA-key issue*/
+	else if (RTMPCompareMemory(ANonce, SNonce, 32) == 1)
+		NdisMoveMemory(&concatenation[CurrPos], SNonce, 32);
+	else
+		NdisMoveMemory(&concatenation[CurrPos], ANonce, 32);
+	CurrPos += 32;
+
+	/* Get larger Nonce*/
+	if (RTMPCompareMemory(ANonce, SNonce, 32) == 0)
+		NdisMoveMemory(&concatenation[CurrPos], temp, 32);	/* patch for ralink proprietary STA-key issue*/
+	else if (RTMPCompareMemory(ANonce, SNonce, 32) == 1)
+		NdisMoveMemory(&concatenation[CurrPos], ANonce, 32);
+	else
+		NdisMoveMemory(&concatenation[CurrPos], SNonce, 32);
+	CurrPos += 32;
+
+	hex_dump("PMK", PMK, LEN_PMK);
+	hex_dump("concatenation=", concatenation, 76);
+
+	/* Use PRF to generate PTK*/
+	PRF(PMK, LEN_PMK, Prefix, 22, concatenation, 76, output, len);
+
+}
+
+VOID WpaDeriveGTK(
+    IN  UCHAR   *GMK,
+    IN  UCHAR   *GNonce,
+    IN  UCHAR   *AA,
+    OUT UCHAR   *output,
+    IN  UINT    len)
+{
+    UCHAR   concatenation[76];
+    UINT    CurrPos=0;
+    UCHAR   Prefix[19];
+    UCHAR   temp[80];   
+
+    NdisMoveMemory(&concatenation[CurrPos], AA, 6);
+    CurrPos += 6;
+
+    NdisMoveMemory(&concatenation[CurrPos], GNonce , 32);
+    CurrPos += 32;
+
+    Prefix[0] = 'G';
+    Prefix[1] = 'r';
+    Prefix[2] = 'o';
+    Prefix[3] = 'u';
+    Prefix[4] = 'p';
+    Prefix[5] = ' ';
+    Prefix[6] = 'k';
+    Prefix[7] = 'e';
+    Prefix[8] = 'y';
+    Prefix[9] = ' ';
+    Prefix[10] = 'e';
+    Prefix[11] = 'x';
+    Prefix[12] = 'p';
+    Prefix[13] = 'a';
+    Prefix[14] = 'n';
+    Prefix[15] = 's';
+    Prefix[16] = 'i';
+    Prefix[17] = 'o';
+    Prefix[18] = 'n';
+
+    PRF(GMK, PMK_LEN, Prefix,  19, concatenation, 38 , temp, len);
+    NdisMoveMemory(output, temp, len);
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Generate random number by software.
+
+	Arguments:
+		pAd		-	pointer to our pAdapter context 
+		macAddr	-	pointer to local MAC address
+		
+	Return Value:
+
+	Note:
+		802.1ii-2004  Annex H.5
+		
+	========================================================================
+*/
+VOID	GenRandom(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	UCHAR			*macAddr,
+	OUT	UCHAR			*random)
+{	
+	INT		i, curr;
+	UCHAR	local[80], KeyCounter[32];
+	UCHAR	result[80];
+	ULONG	CurrentTime;
+	UCHAR	prefix[] = {'I', 'n', 'i', 't', ' ', 'C', 'o', 'u', 'n', 't', 'e', 'r'};
+
+	/* Zero the related information*/
+	NdisZeroMemory(result, 80);
+	NdisZeroMemory(local, 80);
+	NdisZeroMemory(KeyCounter, 32);	
+
+	for	(i = 0;	i <	32;	i++)
+	{		
+		/* copy the local MAC address*/
+		COPY_MAC_ADDR(local, macAddr);
+		curr =	MAC_ADDR_LEN;
+
+		/* concatenate the current time*/
+		NdisGetSystemUpTime(&CurrentTime);
+		NdisMoveMemory(&local[curr],  &CurrentTime,	sizeof(CurrentTime));
+		curr +=	sizeof(CurrentTime);
+
+		/* concatenate the last result*/
+		NdisMoveMemory(&local[curr],  result, 32);
+		curr +=	32;
+		
+		/* concatenate a variable */
+		NdisMoveMemory(&local[curr],  &i,  2);		
+		curr +=	2;
+
+		/* calculate the result*/
+		PRF(KeyCounter, 32, prefix,12, local, curr, result, 32); 
+	}
+	
+	NdisMoveMemory(random, result,	32);	
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Build cipher suite in RSN-IE. 
+		It only shall be called by RTMPMakeRSNIE. 
+
+	Arguments:
+		pAd			-	pointer to our pAdapter context	
+    	ElementID	-	indicate the WPA1 or WPA2
+    	WepStatus	-	indicate the encryption type
+		bMixCipher	-	a boolean to indicate the pairwise cipher and group 
+						cipher are the same or not
+		
+	Return Value:
+		
+	Note:
+		
+	========================================================================
+*/
+static VOID RTMPMakeRsnIeCipher(
+	IN  PRTMP_ADAPTER   pAd,
+	IN	UCHAR			ElementID,	
+	IN	UINT			WepStatus,
+	IN	UCHAR			apidx,
+	IN	BOOLEAN			bMixCipher,
+	IN	UCHAR			FlexibleCipher,
+	OUT	PUCHAR			pRsnIe,
+	OUT	UCHAR			*rsn_len)
+{		
+	UCHAR	PairwiseCnt;
+
+	*rsn_len = 0;
+
+	/* decide WPA2 or WPA1	*/
+	if (ElementID == Wpa2Ie)
+	{
+		RSNIE2	*pRsnie_cipher = (RSNIE2*)pRsnIe;
+
+		/* Assign the verson as 1*/
+		pRsnie_cipher->version = 1;
+
+        switch (WepStatus)
+        {
+        	/* TKIP mode*/
+            case Ndis802_11Encryption2Enabled:
+                NdisMoveMemory(pRsnie_cipher->mcast, OUI_WPA2_TKIP, 4);
+                pRsnie_cipher->ucount = 1;
+                NdisMoveMemory(pRsnie_cipher->ucast[0].oui, OUI_WPA2_TKIP, 4);
+                *rsn_len = sizeof(RSNIE2);
+                break;
+
+			/* AES mode*/
+            case Ndis802_11Encryption3Enabled:
+				if (bMixCipher)
+					NdisMoveMemory(pRsnie_cipher->mcast, OUI_WPA2_TKIP, 4);
+				else
+					NdisMoveMemory(pRsnie_cipher->mcast, OUI_WPA2_CCMP, 4);								
+                pRsnie_cipher->ucount = 1;
+                NdisMoveMemory(pRsnie_cipher->ucast[0].oui, OUI_WPA2_CCMP, 4);
+                *rsn_len = sizeof(RSNIE2);
+                break;
+
+			/* TKIP-AES mix mode*/
+            case Ndis802_11Encryption4Enabled:
+                NdisMoveMemory(pRsnie_cipher->mcast, OUI_WPA2_TKIP, 4);
+
+				PairwiseCnt = 1;
+				/* Insert WPA2 TKIP as the first pairwise cipher */
+				if (MIX_CIPHER_WPA2_TKIP_ON(FlexibleCipher))
+				{
+                	NdisMoveMemory(pRsnie_cipher->ucast[0].oui, OUI_WPA2_TKIP, 4);
+					/* Insert WPA2 AES as the secondary pairwise cipher*/
+					if (MIX_CIPHER_WPA2_AES_ON(FlexibleCipher))
+					{
+						NdisMoveMemory(pRsnIe + sizeof(RSNIE2), OUI_WPA2_CCMP, 4);
+						PairwiseCnt = 2;
+					}	
+				}
+				else
+				{
+					/* Insert WPA2 AES as the first pairwise cipher */
+					NdisMoveMemory(pRsnie_cipher->ucast[0].oui, OUI_WPA2_CCMP, 4);	
+				}
+							
+                pRsnie_cipher->ucount = PairwiseCnt;				
+                *rsn_len = sizeof(RSNIE2) + (4 * (PairwiseCnt - 1));
+                break;			
+        }   
+
+#ifdef CONFIG_STA_SUPPORT
+		if ((pAd->OpMode == OPMODE_STA) &&
+			(pAd->StaCfg.GroupCipher != Ndis802_11Encryption2Enabled) &&
+			(pAd->StaCfg.GroupCipher != Ndis802_11Encryption3Enabled)
+			)
+		{
+			UINT	GroupCipher = pAd->StaCfg.GroupCipher;
+			switch(GroupCipher)
+			{
+				case Ndis802_11GroupWEP40Enabled:
+					NdisMoveMemory(pRsnie_cipher->mcast, OUI_WPA2_WEP40, 4);
+					break;
+				case Ndis802_11GroupWEP104Enabled:
+					NdisMoveMemory(pRsnie_cipher->mcast, OUI_WPA2_WEP104, 4);
+					break;
+			}
+		}
+#endif /* CONFIG_STA_SUPPORT */
+
+		/* swap for big-endian platform*/
+		pRsnie_cipher->version = cpu2le16(pRsnie_cipher->version);
+	    pRsnie_cipher->ucount = cpu2le16(pRsnie_cipher->ucount);
+	}
+	else
+	{
+		RSNIE	*pRsnie_cipher = (RSNIE*)pRsnIe;
+
+		/* Assign OUI and version*/
+		NdisMoveMemory(pRsnie_cipher->oui, OUI_WPA_VERSION, 4);
+        pRsnie_cipher->version = 1;
+
+		switch (WepStatus)
+		{
+			/* TKIP mode*/
+            case Ndis802_11Encryption2Enabled:
+                NdisMoveMemory(pRsnie_cipher->mcast, OUI_WPA_TKIP, 4);
+                pRsnie_cipher->ucount = 1;
+                NdisMoveMemory(pRsnie_cipher->ucast[0].oui, OUI_WPA_TKIP, 4);
+                *rsn_len = sizeof(RSNIE);
+                break;
+
+			/* AES mode*/
+            case Ndis802_11Encryption3Enabled:				
+				if (bMixCipher)
+					NdisMoveMemory(pRsnie_cipher->mcast, OUI_WPA_TKIP, 4);
+				else
+					NdisMoveMemory(pRsnie_cipher->mcast, OUI_WPA_CCMP, 4);			
+                pRsnie_cipher->ucount = 1;
+                NdisMoveMemory(pRsnie_cipher->ucast[0].oui, OUI_WPA_CCMP, 4);
+                *rsn_len = sizeof(RSNIE);
+                break;
+
+			/* TKIP-AES mix mode*/
+            case Ndis802_11Encryption4Enabled:
+                NdisMoveMemory(pRsnie_cipher->mcast, OUI_WPA_TKIP, 4);
+
+				PairwiseCnt = 1;
+				/* Insert WPA TKIP as the first pairwise cipher */
+				if (MIX_CIPHER_WPA_TKIP_ON(FlexibleCipher))
+				{
+                	NdisMoveMemory(pRsnie_cipher->ucast[0].oui, OUI_WPA_TKIP, 4);
+					/* Insert WPA AES as the secondary pairwise cipher*/
+					if (MIX_CIPHER_WPA_AES_ON(FlexibleCipher))
+					{
+						NdisMoveMemory(pRsnIe + sizeof(RSNIE), OUI_WPA_CCMP, 4);						
+						PairwiseCnt = 2;
+					}	
+				}
+				else
+				{
+					/* Insert WPA AES as the first pairwise cipher */
+					NdisMoveMemory(pRsnie_cipher->ucast[0].oui, OUI_WPA_CCMP, 4);	
+				}
+						
+                pRsnie_cipher->ucount = PairwiseCnt;				
+                *rsn_len = sizeof(RSNIE) + (4 * (PairwiseCnt - 1));				
+                break;					
+        }
+
+#ifdef CONFIG_STA_SUPPORT
+		if ((pAd->OpMode == OPMODE_STA) &&
+			(pAd->StaCfg.GroupCipher != Ndis802_11Encryption2Enabled) &&
+			(pAd->StaCfg.GroupCipher != Ndis802_11Encryption3Enabled)
+			)
+		{
+			UINT	GroupCipher = pAd->StaCfg.GroupCipher;
+			switch(GroupCipher)
+			{
+				case Ndis802_11GroupWEP40Enabled:
+					NdisMoveMemory(pRsnie_cipher->mcast, OUI_WPA_WEP40, 4);
+					break;
+				case Ndis802_11GroupWEP104Enabled:
+					NdisMoveMemory(pRsnie_cipher->mcast, OUI_WPA_WEP104, 4);
+					break;
+			}
+		}
+#endif /* CONFIG_STA_SUPPORT */
+
+		/* swap for big-endian platform*/
+		pRsnie_cipher->version = cpu2le16(pRsnie_cipher->version);
+	    pRsnie_cipher->ucount = cpu2le16(pRsnie_cipher->ucount);
+	}
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Build AKM suite in RSN-IE. 
+		It only shall be called by RTMPMakeRSNIE. 
+
+	Arguments:
+		pAd			-	pointer to our pAdapter context	
+    	ElementID	-	indicate the WPA1 or WPA2
+    	AuthMode	-	indicate the authentication mode
+		apidx		-	indicate the interface index
+		
+	Return Value:
+		
+	Note:
+		
+	========================================================================
+*/
+static VOID RTMPMakeRsnIeAKM(	
+	IN  PRTMP_ADAPTER   pAd,	
+	IN	UCHAR			ElementID,	
+	IN	UINT			AuthMode,
+	IN	UCHAR			apidx,
+	OUT	PUCHAR			pRsnIe,
+	OUT	UCHAR			*rsn_len)
+{
+	RSNIE_AUTH		*pRsnie_auth;	
+	UCHAR			AkmCnt = 1;		/* default as 1*/
+
+	pRsnie_auth = (RSNIE_AUTH*)(pRsnIe + (*rsn_len));
+
+	/* decide WPA2 or WPA1	 */
+	if (ElementID == Wpa2Ie)
+	{
+
+		switch (AuthMode)
+        {
+            case Ndis802_11AuthModeWPA2:
+            case Ndis802_11AuthModeWPA1WPA2:
+                	NdisMoveMemory(pRsnie_auth->auth[0].oui, OUI_WPA2_8021X_AKM, 4);
+                break;
+
+            case Ndis802_11AuthModeWPA2PSK:
+            case Ndis802_11AuthModeWPA1PSKWPA2PSK:
+                	NdisMoveMemory(pRsnie_auth->auth[0].oui, OUI_WPA2_PSK_AKM, 4);
+                break;
+			default:
+				AkmCnt = 0;
+				break;
+				
+        }
+	}
+	else
+	{
+		switch (AuthMode)
+        {
+            case Ndis802_11AuthModeWPA:
+            case Ndis802_11AuthModeWPA1WPA2:
+                NdisMoveMemory(pRsnie_auth->auth[0].oui, OUI_WPA_8021X_AKM, 4);
+                break;
+
+            case Ndis802_11AuthModeWPAPSK:
+            case Ndis802_11AuthModeWPA1PSKWPA2PSK:
+                NdisMoveMemory(pRsnie_auth->auth[0].oui, OUI_WPA_PSK_AKM, 4);
+                break;
+
+			case Ndis802_11AuthModeWPANone:
+                NdisMoveMemory(pRsnie_auth->auth[0].oui, OUI_WPA_NONE_AKM, 4);
+                break;
+			default:
+				AkmCnt = 0;
+				break;	
+        }			
+	}
+		 
+	pRsnie_auth->acount = AkmCnt;
+	pRsnie_auth->acount = cpu2le16(pRsnie_auth->acount);
+	
+	/* update current RSNIE length*/
+	(*rsn_len) += (sizeof(RSNIE_AUTH) + (4 * (AkmCnt - 1)));	
+
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Build capability in RSN-IE. 
+		It only shall be called by RTMPMakeRSNIE. 
+
+	Arguments:
+		pAd			-	pointer to our pAdapter context	
+    	ElementID	-	indicate the WPA1 or WPA2    	
+		apidx		-	indicate the interface index
+		
+	Return Value:
+		
+	Note:
+		
+	========================================================================
+*/
+static VOID RTMPMakeRsnIeCap(	
+	IN  PRTMP_ADAPTER   pAd,	
+	IN	UCHAR			ElementID,
+	IN	UCHAR			apidx,
+	OUT	PUCHAR			pRsnIe,
+	OUT	UCHAR			*rsn_len)
+{
+	RSN_CAPABILITIES    *pRSN_Cap;
+
+	/* it could be ignored in WPA1 mode*/
+	if (ElementID == WpaIe)
+		return;
+	
+	pRSN_Cap = (RSN_CAPABILITIES*)(pRsnIe + (*rsn_len));
+	
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{		
+	}
+
+#endif /* CONFIG_STA_SUPPORT */			      
+					 
+	pRSN_Cap->word = cpu2le16(pRSN_Cap->word);
+	
+	(*rsn_len) += sizeof(RSN_CAPABILITIES);	/* update current RSNIE length*/
+
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Build PMKID in RSN-IE. 
+		It only shall be called by RTMPMakeRSNIE. 
+
+	Arguments:
+		pAd			-	pointer to our pAdapter context	
+    	ElementID	-	indicate the WPA1 or WPA2    	
+		apidx		-	indicate the interface index
+		
+	Return Value:
+		
+	Note:
+		
+	========================================================================
+*/
+
+/*
+	========================================================================
+
+	Routine Description:
+		Build RSN IE context. It is not included element-ID and length.
+
+	Arguments:
+		pAd			-	pointer to our pAdapter context	
+    	AuthMode	-	indicate the authentication mode
+    	WepStatus	-	indicate the encryption type
+		apidx		-	indicate the interface index
+		
+	Return Value:
+		
+	Note:
+		
+	========================================================================
+*/
+VOID RTMPMakeRSNIE(
+    IN  PRTMP_ADAPTER   pAd,
+    IN  UINT            AuthMode,
+    IN  UINT            WepStatus,
+	IN	UCHAR			apidx)
+{
+	PUCHAR		pRsnIe = NULL;			/* primary RSNIE*/
+	UCHAR 		*rsnielen_cur_p = 0;	/* the length of the primary RSNIE 		*/
+	UCHAR		*rsnielen_ex_cur_p = 0;	/* the length of the secondary RSNIE	  	*/
+	UCHAR		PrimaryRsnie;			
+	BOOLEAN		bMixCipher = FALSE;	/* indicate the pairwise and group cipher are different*/
+	UCHAR		p_offset;		
+	WPA_MIX_PAIR_CIPHER		FlexibleCipher = MIX_CIPHER_NOTUSE;	/* it provide the more flexible cipher combination in WPA-WPA2 and TKIPAES mode*/
+		
+	rsnielen_cur_p = NULL;
+	rsnielen_ex_cur_p = NULL;
+
+	do
+	{
+
+#ifdef APCLI_SUPPORT	
+		if (apidx >= MIN_NET_DEVICE_FOR_APCLI)
+		{
+			UINT	apcliIfidx = 0;
+
+			/* Only support WPAPSK or WPA2PSK for AP-Client mode */
+				if ((AuthMode != Ndis802_11AuthModeWPAPSK) && 
+					(AuthMode != Ndis802_11AuthModeWPA2PSK))
+			    	return;
+			DBGPRINT(RT_DEBUG_TRACE,("==> RTMPMakeRSNIE(ApCli)\n"));
+	
+			apcliIfidx = apidx - MIN_NET_DEVICE_FOR_APCLI;
+
+			/* Initiate some related information */
+				if (apcliIfidx < MAX_APCLI_NUM)
+				{
+			pAd->ApCfg.ApCliTab[apcliIfidx].RSNIE_Len = 0;
+			NdisZeroMemory(pAd->ApCfg.ApCliTab[apcliIfidx].RSN_IE, MAX_LEN_OF_RSNIE);
+			rsnielen_cur_p = &pAd->ApCfg.ApCliTab[apcliIfidx].RSNIE_Len;
+			pRsnIe = pAd->ApCfg.ApCliTab[apcliIfidx].RSN_IE;
+	
+			bMixCipher = pAd->ApCfg.ApCliTab[apcliIfidx].bMixCipher;
+			break;
+				}
+				else
+				{
+					DBGPRINT(RT_DEBUG_ERROR, ("RTMPMakeRSNIE: invalid apcliIfidx(%d)\n", apcliIfidx));
+					return;
+				}
+	}
+#endif /* APCLI_SUPPORT */
+
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+#ifdef WPA_SUPPLICANT_SUPPORT
+			if (pAd->StaCfg.WpaSupplicantUP != WPA_SUPPLICANT_DISABLE)
+			{
+				if (AuthMode < Ndis802_11AuthModeWPA)
+					return;
+			}
+			else
+#endif /* WPA_SUPPLICANT_SUPPORT */
+			{
+				/* Support WPAPSK or WPA2PSK in STA-Infra mode */
+				/* Support WPANone in STA-Adhoc mode */
+				if ((AuthMode != Ndis802_11AuthModeWPAPSK) && 
+					(AuthMode != Ndis802_11AuthModeWPA2PSK) && 
+					(AuthMode != Ndis802_11AuthModeWPANone)
+					)
+					return;
+			}	
+	
+			DBGPRINT(RT_DEBUG_TRACE,("==> RTMPMakeRSNIE(STA)\n"));
+
+			/* Zero RSNIE context */
+			pAd->StaCfg.RSNIE_Len = 0;
+			NdisZeroMemory(pAd->StaCfg.RSN_IE, MAX_LEN_OF_RSNIE);
+
+			/* Pointer to RSNIE */
+			rsnielen_cur_p = &pAd->StaCfg.RSNIE_Len;
+			pRsnIe = pAd->StaCfg.RSN_IE;
+
+			bMixCipher = pAd->StaCfg.bMixCipher;
+			break;
+		}
+#endif /* CONFIG_STA_SUPPORT */
+	} while(FALSE);
+
+	/* indicate primary RSNIE as WPA or WPA2*/
+	if ((AuthMode == Ndis802_11AuthModeWPA) || 
+		(AuthMode == Ndis802_11AuthModeWPAPSK) || 
+		(AuthMode == Ndis802_11AuthModeWPANone) || 
+		(AuthMode == Ndis802_11AuthModeWPA1WPA2) || 
+		(AuthMode == Ndis802_11AuthModeWPA1PSKWPA2PSK))
+		PrimaryRsnie = WpaIe;
+	else
+		PrimaryRsnie = Wpa2Ie;
+
+	{
+		/* Build the primary RSNIE*/
+		/* 1. insert cipher suite*/
+		RTMPMakeRsnIeCipher(pAd, PrimaryRsnie, WepStatus, apidx, bMixCipher, FlexibleCipher, pRsnIe, &p_offset);
+
+		/* 2. insert AKM*/
+		RTMPMakeRsnIeAKM(pAd, PrimaryRsnie, AuthMode, apidx, pRsnIe, &p_offset);
+
+		/* 3. insert capability*/
+		RTMPMakeRsnIeCap(pAd, PrimaryRsnie, apidx, pRsnIe, &p_offset);
+
+	}
+
+	/* 4. update the RSNIE length*/
+	*rsnielen_cur_p = p_offset; 
+
+	hex_dump("The primary RSNIE", pRsnIe, (*rsnielen_cur_p));
+
+
+}
+
+/*
+    ==========================================================================
+    Description:
+		Check whether the received frame is EAP frame.
+
+	Arguments:
+		pAd				-	pointer to our pAdapter context	
+		pEntry			-	pointer to active entry
+		pData			-	the received frame
+		DataByteCount 	-	the received frame's length		
+		FromWhichBSSID	-	indicate the interface index
+       
+    Return:
+         TRUE 			-	This frame is EAP frame
+         FALSE 			-	otherwise
+    ==========================================================================
+*/
+BOOLEAN RTMPCheckWPAframe(
+    IN PRTMP_ADAPTER    pAd,
+    IN PMAC_TABLE_ENTRY	pEntry,
+    IN PUCHAR           pData,
+    IN ULONG            DataByteCount,
+	IN UCHAR			FromWhichBSSID)
+{
+	ULONG	Body_len;
+	BOOLEAN Cancelled;
+
+	do
+	{
+	} while (FALSE);
+
+    if(DataByteCount < (LENGTH_802_1_H + LENGTH_EAPOL_H))
+        return FALSE;
+
+    
+	/* Skip LLC header	*/
+    if (NdisEqualMemory(SNAP_802_1H, pData, 6) ||
+        /* Cisco 1200 AP may send packet with SNAP_BRIDGE_TUNNEL*/
+        NdisEqualMemory(SNAP_BRIDGE_TUNNEL, pData, 6)) 
+    {
+        pData += 6;
+    }
+	/* Skip 2-bytes EAPoL type */
+    if (NdisEqualMemory(EAPOL, pData, 2)) 
+/*	if (*(UINT16 *)EAPOL == *(UINT16 *)pData)*/
+    {
+        pData += 2;         
+    }
+    else    
+        return FALSE;
+
+    switch (*(pData+1))     
+    {   
+        case EAPPacket:
+			Body_len = (*(pData+2)<<8) | (*(pData+3));
+            DBGPRINT(RT_DEBUG_TRACE, ("Receive EAP-Packet frame, TYPE = 0, Length = %ld\n", Body_len));
+            break;
+        case EAPOLStart:
+            DBGPRINT(RT_DEBUG_TRACE, ("Receive EAPOL-Start frame, TYPE = 1 \n"));
+			if (pEntry->EnqueueEapolStartTimerRunning != EAPOL_START_DISABLE)
+            {    
+            	DBGPRINT(RT_DEBUG_TRACE, ("Cancel the EnqueueEapolStartTimerRunning \n"));
+                RTMPCancelTimer(&pEntry->EnqueueStartForPSKTimer, &Cancelled);
+                pEntry->EnqueueEapolStartTimerRunning = EAPOL_START_DISABLE;             
+            }				
+            break;
+        case EAPOLLogoff:
+            DBGPRINT(RT_DEBUG_TRACE, ("Receive EAPOLLogoff frame, TYPE = 2 \n"));
+            break;
+        case EAPOLKey:
+			Body_len = (*(pData+2)<<8) | (*(pData+3));
+            DBGPRINT(RT_DEBUG_TRACE, ("Receive EAPOL-Key frame, TYPE = 3, Length = %ld\n", Body_len));
+            break;
+        case EAPOLASFAlert:
+            DBGPRINT(RT_DEBUG_TRACE, ("Receive EAPOLASFAlert frame, TYPE = 4 \n"));
+            break;
+        default:
+            return FALSE;
+    
+    }   
+    return TRUE;
+}
+
+/*
+    ==========================================================================
+    Description:
+		Report the EAP message type
+
+	Arguments:
+		msg		-	EAPOL_PAIR_MSG_1
+					EAPOL_PAIR_MSG_2
+					EAPOL_PAIR_MSG_3
+					EAPOL_PAIR_MSG_4
+					EAPOL_GROUP_MSG_1
+					EAPOL_GROUP_MSG_2
+											       
+    Return:
+         message type string
+
+    ==========================================================================
+*/
+PSTRING GetEapolMsgType(CHAR msg)
+{
+    if(msg == EAPOL_PAIR_MSG_1)
+        return "Pairwise Message 1";
+    else if(msg == EAPOL_PAIR_MSG_2)
+        return "Pairwise Message 2";
+	else if(msg == EAPOL_PAIR_MSG_3)
+        return "Pairwise Message 3";
+	else if(msg == EAPOL_PAIR_MSG_4)
+        return "Pairwise Message 4";
+	else if(msg == EAPOL_GROUP_MSG_1)
+        return "Group Message 1";
+	else if(msg == EAPOL_GROUP_MSG_2)
+        return "Group Message 2";
+    else
+    	return "Invalid Message";
+}
+
+
+/*
+    ========================================================================
+    
+    Routine Description:
+    Check Sanity RSN IE of EAPoL message
+
+    Arguments:
+        
+    Return Value:
+
+		
+    ========================================================================
+*/
+BOOLEAN RTMPCheckRSNIE(
+	IN  PRTMP_ADAPTER   pAd,
+	IN  PUCHAR          pData,
+	IN  UCHAR           DataLen,
+	IN  MAC_TABLE_ENTRY *pEntry,
+	OUT	UCHAR			*Offset)
+{
+	PUCHAR              pVIE;
+	UCHAR               len;
+	PEID_STRUCT         pEid;
+	BOOLEAN				result = FALSE;
+		
+	pVIE = pData;
+	len	 = DataLen;
+	*Offset = 0;
+
+	while (len > sizeof(RSNIE2))
+	{
+		pEid = (PEID_STRUCT) pVIE;	
+		/* WPA RSN IE*/
+		if ((pEid->Eid == IE_WPA) && (NdisEqualMemory(pEid->Octet, WPA_OUI, 4)))
+		{			
+			if ((pEntry->AuthMode == Ndis802_11AuthModeWPA || pEntry->AuthMode == Ndis802_11AuthModeWPAPSK) &&
+				(NdisEqualMemory(pVIE, pEntry->RSN_IE, pEntry->RSNIE_Len)) &&
+				(pEntry->RSNIE_Len == (pEid->Len + 2)))
+			{
+					result = TRUE;				
+			}		
+			
+			*Offset += (pEid->Len + 2);			
+		}
+		/* WPA2 RSN IE, doesn't need to check RSNIE Capabilities field        */
+		else if ((pEid->Eid == IE_RSN) && (NdisEqualMemory(pEid->Octet + 2, RSN_OUI, 3)))
+		{
+			if ((pEntry->AuthMode == Ndis802_11AuthModeWPA2 || pEntry->AuthMode == Ndis802_11AuthModeWPA2PSK) &&
+				(pEid->Eid == pEntry->RSN_IE[0]) &&
+				((pEid->Len + 2) >= pEntry->RSNIE_Len) &&
+				(NdisEqualMemory(pEid->Octet, &pEntry->RSN_IE[2], pEntry->RSNIE_Len - 4)))
+			{
+
+					result = TRUE;				
+			}			
+
+			*Offset += (pEid->Len + 2);
+		}		
+		else
+		{			
+			break;
+		}
+
+		pVIE += (pEid->Len + 2);
+		len  -= (pEid->Len + 2);
+	}
+	
+		
+	return result;
+	
+}
+
+
+/*
+    ========================================================================
+    
+    Routine Description:
+    Parse KEYDATA field.  KEYDATA[] May contain 2 RSN IE and optionally GTK.  
+    GTK  is encaptulated in KDE format at  p.83 802.11i D10
+
+    Arguments:
+        
+    Return Value:
+
+    Note:
+        802.11i D10  
+        
+    ========================================================================
+*/
+BOOLEAN RTMPParseEapolKeyData(
+	IN  PRTMP_ADAPTER   pAd,
+	IN  PUCHAR          pKeyData,
+	IN  UCHAR           KeyDataLen,
+	IN	UCHAR			GroupKeyIndex,
+	IN	UCHAR			MsgType,
+	IN	BOOLEAN			bWPA2,
+	IN  MAC_TABLE_ENTRY *pEntry)
+{
+    PUCHAR              pMyKeyData = pKeyData;
+    UCHAR               KeyDataLength = KeyDataLen;
+	UCHAR				GTK[MAX_LEN_GTK];
+    UCHAR               GTKLEN = 0;
+	UCHAR				DefaultIdx = 0;
+	UCHAR				skip_offset = 0;			
+	    
+	/* Verify The RSN IE contained in pairewise_msg_2 && pairewise_msg_3 and skip it*/
+	if (MsgType == EAPOL_PAIR_MSG_2 || MsgType == EAPOL_PAIR_MSG_3)
+    {
+		{
+			if (bWPA2 && MsgType == EAPOL_PAIR_MSG_3)
+			{
+				/*WpaShowAllsuite(pMyKeyData, skip_offset);*/
+			
+				/* skip RSN IE*/
+				pMyKeyData += skip_offset;
+				KeyDataLength -= skip_offset;
+				DBGPRINT(RT_DEBUG_TRACE, ("RTMPParseEapolKeyData ==> WPA2/WPA2PSK RSN IE matched in Msg 3, Length(%d) \n", skip_offset));
+			}
+			else
+				return TRUE;			
+		}
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE,("RTMPParseEapolKeyData ==> KeyDataLength %d without RSN_IE \n", KeyDataLength));
+	/*hex_dump("remain data", pMyKeyData, KeyDataLength);*/
+
+
+	/* Parse KDE format in pairwise_msg_3_WPA2 && group_msg_1_WPA2*/
+	if (bWPA2 && (MsgType == EAPOL_PAIR_MSG_3 || MsgType == EAPOL_GROUP_MSG_1))
+	{				
+		PEID_STRUCT     pEid;
+			
+		pEid = (PEID_STRUCT) pMyKeyData;
+		skip_offset = 0;
+		while ((skip_offset + 2 + pEid->Len) <= KeyDataLength)
+		{
+			switch(pEid->Eid)
+			{
+				case WPA_KDE_TYPE:
+					{
+						PKDE_HDR	pKDE;
+
+						pKDE = (PKDE_HDR)pEid;
+						if (NdisEqualMemory(pKDE->OUI, OUI_WPA2, 3))
+    					{
+							if (pKDE->DataType == KDE_GTK)
+							{
+								PGTK_KDE pKdeGtk;
+								
+								pKdeGtk = (PGTK_KDE) &pKDE->octet[0];
+								DefaultIdx = pKdeGtk->Kid;
+
+								/* Get GTK length - refer to IEEE 802.11i-2004 p.82 */
+								GTKLEN = pKDE->Len -6;
+								if (GTKLEN < LEN_WEP64)
+								{
+									DBGPRINT(RT_DEBUG_ERROR, ("ERROR: GTK Key length is too short (%d) \n", GTKLEN));
+        							return FALSE;
+								}
+								NdisMoveMemory(GTK, pKdeGtk->GTK, GTKLEN);
+								DBGPRINT(RT_DEBUG_TRACE, ("GTK in KDE format ,DefaultKeyID=%d, KeyLen=%d \n", DefaultIdx, GTKLEN));
+    						}
+						}
+					}
+					break;
+			}
+			skip_offset = skip_offset + 2 + pEid->Len;
+	        pEid = (PEID_STRUCT)((UCHAR*)pEid + 2 + pEid->Len);   
+		}
+
+		/* skip KDE Info*/
+		pMyKeyData += skip_offset;
+		KeyDataLength -= skip_offset;		
+	}
+	else if (!bWPA2 && MsgType == EAPOL_GROUP_MSG_1)
+	{
+		DefaultIdx = GroupKeyIndex;
+		GTKLEN = KeyDataLength;
+		NdisMoveMemory(GTK, pMyKeyData, KeyDataLength);
+		DBGPRINT(RT_DEBUG_TRACE, ("GTK without KDE, DefaultKeyID=%d, KeyLen=%d \n", DefaultIdx, GTKLEN));
+	}
+		
+	/* Sanity check - shared key index must be 0 ~ 3*/
+	if (DefaultIdx > 3)	
+    {
+     	DBGPRINT(RT_DEBUG_ERROR, ("ERROR: GTK Key index(%d) is invalid in %s %s \n", DefaultIdx, ((bWPA2) ? "WPA2" : "WPA"), GetEapolMsgType(MsgType)));
+        return FALSE;
+    } 
+
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{			
+       {                        
+        {                        
+    		/* set key material, TxMic and RxMic		*/
+    		NdisMoveMemory(pAd->StaCfg.GTK, GTK, GTKLEN);
+    		pAd->StaCfg.DefaultKeyId = DefaultIdx;
+
+    		WPAInstallSharedKey(pAd, 
+    							pAd->StaCfg.GroupCipher, 
+    							BSS0, 
+    							pAd->StaCfg.DefaultKeyId, 
+    							MCAST_WCID, 
+    							FALSE, 
+    							pAd->StaCfg.GTK,
+    							GTKLEN);
+			}
+        }            
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	return TRUE;
+ 
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Construct KDE common format  
+		Its format is below,
+		
+		+--------------------+
+		| Type (0xdd)		 |  1 octet
+		+--------------------+
+		| Length			 |	1 octet	
+		+--------------------+
+		| OUI				 |  3 octets
+		+--------------------+
+		| Data Type			 |	1 octet
+		+--------------------+
+		
+	Arguments:
+				
+	Return Value:
+		
+	Note:
+		It's defined in IEEE 802.11-2007 Figure 8-25.
+		
+	========================================================================
+*/
+VOID WPA_ConstructKdeHdr(
+	IN 	UINT8	data_type,	
+	IN 	UINT8 	data_len,
+	OUT PUCHAR 	pBuf)
+{
+	PKDE_HDR	pHdr;
+
+	pHdr = (PKDE_HDR)pBuf;
+
+	NdisZeroMemory(pHdr, sizeof(KDE_HDR));
+
+    pHdr->Type = WPA_KDE_TYPE;
+
+	/* The Length field specifies the number of octets in the OUI, Data
+	   Type, and Data fields. */	   
+	pHdr->Len = 4 + data_len;
+
+	NdisMoveMemory(pHdr->OUI, OUI_WPA2, 3);
+	pHdr->DataType = data_type;
+
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Construct EAPoL message for WPA handshaking 
+		Its format is below,
+		
+		+--------------------+
+		| Protocol Version	 |  1 octet
+		+--------------------+
+		| Protocol Type		 |	1 octet	
+		+--------------------+
+		| Body Length		 |  2 octets
+		+--------------------+
+		| Descriptor Type	 |	1 octet
+		+--------------------+
+		| Key Information    |	2 octets
+		+--------------------+
+		| Key Length	     |  1 octet
+		+--------------------+
+		| Key Repaly Counter |	8 octets
+		+--------------------+
+		| Key Nonce		     |  32 octets
+		+--------------------+
+		| Key IV			 |  16 octets
+		+--------------------+
+		| Key RSC			 |  8 octets
+		+--------------------+
+		| Key ID or Reserved |	8 octets
+		+--------------------+
+		| Key MIC			 |	16 octets
+		+--------------------+
+		| Key Data Length	 |	2 octets
+		+--------------------+
+		| Key Data			 |	n octets
+		+--------------------+
+		
+
+	Arguments:
+		pAd			Pointer	to our adapter
+				
+	Return Value:
+		None
+		
+	Note:
+		
+	========================================================================
+*/
+VOID	ConstructEapolMsg(
+	IN 	PMAC_TABLE_ENTRY	pEntry,
+    IN 	UCHAR				GroupKeyWepStatus,
+    IN 	UCHAR				MsgType,  
+    IN	UCHAR				DefaultKeyIdx,
+	IN 	UCHAR				*KeyNonce,
+	IN	UCHAR				*TxRSC,
+	IN	UCHAR				*GTK,
+	IN	UCHAR				*RSNIE,
+	IN	UCHAR				RSNIE_Len,
+    OUT PEAPOL_PACKET       pMsg)
+{
+	BOOLEAN	bWPA2 = FALSE;
+	UCHAR	KeyDescVer;
+
+	/* Choose WPA2 or not*/
+	if ((pEntry->AuthMode == Ndis802_11AuthModeWPA2) || 
+		(pEntry->AuthMode == Ndis802_11AuthModeWPA2PSK))
+		bWPA2 = TRUE;
+		
+    /* Init Packet and Fill header    */
+    pMsg->ProVer = EAPOL_VER;
+    pMsg->ProType = EAPOLKey;
+
+	/* Default 95 bytes, the EAPoL-Key descriptor exclude Key-data field*/
+	SET_UINT16_TO_ARRARY(pMsg->Body_Len, MIN_LEN_OF_EAPOL_KEY_MSG);
+
+	/* Fill in EAPoL descriptor*/
+	if (bWPA2)
+		pMsg->KeyDesc.Type = WPA2_KEY_DESC;
+	else
+		pMsg->KeyDesc.Type = WPA1_KEY_DESC;
+			
+	/* Key Descriptor Version (bits 0-2) specifies the key descriptor version type*/
+	{
+		/* Fill in Key information, refer to IEEE Std 802.11i-2004 page 78 */
+		/* When either the pairwise or the group cipher is AES, the KEY_DESC_AES shall be used.*/
+		KeyDescVer = (((pEntry->WepStatus == Ndis802_11Encryption3Enabled) || 
+		        		(GroupKeyWepStatus == Ndis802_11Encryption3Enabled)) ? (KEY_DESC_AES) : (KEY_DESC_TKIP));
+	}
+
+	pMsg->KeyDesc.KeyInfo.KeyDescVer = KeyDescVer;
+
+	/* Specify Key Type as Group(0) or Pairwise(1)*/
+	if (MsgType >= EAPOL_GROUP_MSG_1)
+		pMsg->KeyDesc.KeyInfo.KeyType = GROUPKEY;
+	else
+		pMsg->KeyDesc.KeyInfo.KeyType = PAIRWISEKEY;
+
+	/* Specify Key Index, only group_msg1_WPA1*/
+	if (!bWPA2 && (MsgType >= EAPOL_GROUP_MSG_1))
+		pMsg->KeyDesc.KeyInfo.KeyIndex = DefaultKeyIdx;
+	
+	if (MsgType == EAPOL_PAIR_MSG_3)
+		pMsg->KeyDesc.KeyInfo.Install = 1;
+	
+	if ((MsgType == EAPOL_PAIR_MSG_1) || (MsgType == EAPOL_PAIR_MSG_3) || (MsgType == EAPOL_GROUP_MSG_1))
+		pMsg->KeyDesc.KeyInfo.KeyAck = 1;
+
+	if (MsgType != EAPOL_PAIR_MSG_1)	
+		pMsg->KeyDesc.KeyInfo.KeyMic = 1;
+ 
+	if ((bWPA2 && (MsgType >= EAPOL_PAIR_MSG_3)) || 
+		(!bWPA2 && (MsgType >= EAPOL_GROUP_MSG_1)))
+    {                        
+       	pMsg->KeyDesc.KeyInfo.Secure = 1;                   
+    }
+
+	/* This subfield shall be set, and the Key Data field shall be encrypted, if
+	   any key material (e.g., GTK or SMK) is included in the frame. */
+	if (bWPA2 && ((MsgType == EAPOL_PAIR_MSG_3) || 
+		(MsgType == EAPOL_GROUP_MSG_1)))
+    {                               	
+        pMsg->KeyDesc.KeyInfo.EKD_DL = 1;            
+    }
+
+	/* key Information element has done. */
+	*(USHORT *)(&pMsg->KeyDesc.KeyInfo) = cpu2le16(*(USHORT *)(&pMsg->KeyDesc.KeyInfo));
+
+	/* Fill in Key Length*/
+	if (bWPA2)
+	{
+		/* In WPA2 mode, the field indicates the length of pairwise key cipher, */
+		/* so only pairwise_msg_1 and pairwise_msg_3 need to fill. */
+		if ((MsgType == EAPOL_PAIR_MSG_1) || (MsgType == EAPOL_PAIR_MSG_3))
+			pMsg->KeyDesc.KeyLength[1] = ((pEntry->WepStatus == Ndis802_11Encryption2Enabled) ? LEN_TKIP_TK : LEN_AES_TK);
+	}
+	else if (!bWPA2)
+	{
+		if (MsgType >= EAPOL_GROUP_MSG_1)
+		{
+			/* the length of group key cipher*/
+			pMsg->KeyDesc.KeyLength[1] = ((GroupKeyWepStatus == Ndis802_11Encryption2Enabled) ? LEN_TKIP_GTK : LEN_AES_GTK);
+		}
+		else
+		{
+			/* the length of pairwise key cipher*/
+			pMsg->KeyDesc.KeyLength[1] = ((pEntry->WepStatus == Ndis802_11Encryption2Enabled) ? LEN_TKIP_TK : LEN_AES_TK);			
+		}				
+	}			
+	
+ 	/* Fill in replay counter        		*/
+    NdisMoveMemory(pMsg->KeyDesc.ReplayCounter, pEntry->R_Counter, LEN_KEY_DESC_REPLAY);
+
+	/* Fill Key Nonce field		  */
+	/* ANonce : pairwise_msg1 & pairwise_msg3*/
+	/* SNonce : pairwise_msg2*/
+	/* GNonce : group_msg1_wpa1	*/
+	if ((MsgType <= EAPOL_PAIR_MSG_3) || ((!bWPA2 && (MsgType == EAPOL_GROUP_MSG_1))))
+    	NdisMoveMemory(pMsg->KeyDesc.KeyNonce, KeyNonce, LEN_KEY_DESC_NONCE);
+
+	/* Fill key IV - WPA2 as 0, WPA1 as random*/
+	if (!bWPA2 && (MsgType == EAPOL_GROUP_MSG_1))
+	{		
+		/* Suggest IV be random number plus some number,*/
+		NdisMoveMemory(pMsg->KeyDesc.KeyIv, &KeyNonce[16], LEN_KEY_DESC_IV);		
+        pMsg->KeyDesc.KeyIv[15] += 2;		
+	}
+	
+    /* Fill Key RSC field        */
+    /* It contains the RSC for the GTK being installed.*/
+	if ((MsgType == EAPOL_PAIR_MSG_3 && bWPA2) || (MsgType == EAPOL_GROUP_MSG_1))
+	{		
+        NdisMoveMemory(pMsg->KeyDesc.KeyRsc, TxRSC, 6);
+	}
+
+	/* Clear Key MIC field for MIC calculation later   */
+    NdisZeroMemory(pMsg->KeyDesc.KeyMic, LEN_KEY_DESC_MIC);
+	
+	ConstructEapolKeyData(pEntry,
+						  GroupKeyWepStatus, 
+						  KeyDescVer,
+						  MsgType, 
+						  DefaultKeyIdx, 
+						  GTK,
+						  RSNIE,
+						  RSNIE_Len,
+						  pMsg);
+ 
+	/* Calculate MIC and fill in KeyMic Field except Pairwise Msg 1.*/
+	if (MsgType != EAPOL_PAIR_MSG_1)
+	{
+		CalculateMIC(KeyDescVer, pEntry->PTK, pMsg);
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("===> ConstructEapolMsg for %s %s\n", ((bWPA2) ? "WPA2" : "WPA"), GetEapolMsgType(MsgType)));
+	DBGPRINT(RT_DEBUG_TRACE, ("	     Body length = %d \n", CONV_ARRARY_TO_UINT16(pMsg->Body_Len)));
+	DBGPRINT(RT_DEBUG_TRACE, ("	     Key length  = %d \n", CONV_ARRARY_TO_UINT16(pMsg->KeyDesc.KeyLength)));
+
+
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Construct the Key Data field of EAPoL message 
+
+	Arguments:
+		pAd			Pointer	to our adapter
+		Elem		Message body
+		
+	Return Value:
+		None
+		
+	Note:
+		
+	========================================================================
+*/
+VOID	ConstructEapolKeyData(
+	IN	PMAC_TABLE_ENTRY	pEntry,
+	IN	UCHAR			GroupKeyWepStatus,
+	IN	UCHAR			keyDescVer,
+	IN 	UCHAR			MsgType,
+	IN	UCHAR			DefaultKeyIdx,
+	IN	UCHAR			*GTK,
+	IN	UCHAR			*RSNIE,
+	IN	UCHAR			RSNIE_LEN,
+	OUT PEAPOL_PACKET   pMsg)
+{
+	UCHAR		*mpool, *Key_Data, *eGTK;  	  
+	ULONG		data_offset;
+	BOOLEAN		bWPA2Capable = FALSE;
+	BOOLEAN		GTK_Included = FALSE;
+
+	/* Choose WPA2 or not*/
+	if ((pEntry->AuthMode == Ndis802_11AuthModeWPA2) || 
+		(pEntry->AuthMode == Ndis802_11AuthModeWPA2PSK))
+		bWPA2Capable = TRUE;
+
+	if (MsgType == EAPOL_PAIR_MSG_1 || 
+		MsgType == EAPOL_PAIR_MSG_4 || 
+		MsgType == EAPOL_GROUP_MSG_2)
+		return;
+ 
+	/* allocate memory pool*/
+	os_alloc_mem(NULL, (PUCHAR *)&mpool, 1500);
+
+    if (mpool == NULL)
+		return;
+        
+	/* eGTK Len = 512 */
+	eGTK = (UCHAR *) ROUND_UP(mpool, 4);
+	/* Key_Data Len = 512 */
+	Key_Data = (UCHAR *) ROUND_UP(eGTK + 512, 4);
+
+	NdisZeroMemory(Key_Data, 512);
+	SET_UINT16_TO_ARRARY(pMsg->KeyDesc.KeyDataLen, 0);
+	data_offset = 0;
+	
+	/* Encapsulate RSNIE in pairwise_msg2 & pairwise_msg3		*/
+	if (RSNIE_LEN && ((MsgType == EAPOL_PAIR_MSG_2) || (MsgType == EAPOL_PAIR_MSG_3)))
+	{
+		PUINT8	pmkid_ptr = NULL;
+		UINT8 	pmkid_len = 0;
+
+
+		RTMPInsertRSNIE(&Key_Data[data_offset], 
+						&data_offset,
+						RSNIE, 
+						RSNIE_LEN, 
+						pmkid_ptr, 
+						pmkid_len);
+	}
+
+
+	/* Encapsulate GTK 		*/
+	/* Only for pairwise_msg3_WPA2 and group_msg1*/
+	if ((MsgType == EAPOL_PAIR_MSG_3 && bWPA2Capable) || (MsgType == EAPOL_GROUP_MSG_1))
+	{
+		UINT8	gtk_len;
+
+		/* Decide the GTK length */ 
+		if (GroupKeyWepStatus == Ndis802_11Encryption3Enabled)
+			gtk_len = LEN_AES_GTK;
+		else
+			gtk_len = LEN_TKIP_GTK;
+		
+		/* Insert GTK KDE format in WAP2 mode */
+		if (bWPA2Capable)
+		{
+			/* Construct the common KDE format */
+			WPA_ConstructKdeHdr(KDE_GTK, 2 + gtk_len, &Key_Data[data_offset]);
+			data_offset += sizeof(KDE_HDR);
+
+			/* GTK KDE format - 802.11i-2004  Figure-43x*/
+	        Key_Data[data_offset] = (DefaultKeyIdx & 0x03);
+	        Key_Data[data_offset + 1] = 0x00;	/* Reserved Byte*/
+	        data_offset += 2;
+		}
+
+		/* Fill in GTK */
+		NdisMoveMemory(&Key_Data[data_offset], GTK, gtk_len);
+		data_offset += gtk_len;
+
+
+		GTK_Included = TRUE;
+	}
+
+
+
+	/* If the Encrypted Key Data subfield (of the Key Information field) 
+	   is set, the entire Key Data field shall be encrypted. */
+	/* This whole key-data field shall be encrypted if a GTK is included.*/
+	/* Encrypt the data material in key data field with KEK*/
+	if (GTK_Included)
+	{
+		/*hex_dump("GTK_Included", Key_Data, data_offset);*/
+	
+		if (
+			(keyDescVer == KEY_DESC_AES))
+		{
+			UCHAR 	remainder = 0;
+			UCHAR	pad_len = 0;			
+			UINT	wrap_len =0;
+
+			/* Key Descriptor Version 2 or 3: AES key wrap, defined in IETF RFC 3394, */
+			/* shall be used to encrypt the Key Data field using the KEK field from */
+			/* the derived PTK.*/
+
+			/* If the Key Data field uses the NIST AES key wrap, then the Key Data field */
+			/* shall be padded before encrypting if the key data length is less than 16 */
+			/* octets or if it is not a multiple of 8. The padding consists of appending*/
+			/* a single octet 0xdd followed by zero or more 0x00 octets. */
+			if ((remainder = data_offset & 0x07) != 0)
+			{
+				INT		i;
+			
+				pad_len = (8 - remainder);
+				Key_Data[data_offset] = 0xDD;
+				for (i = 1; i < pad_len; i++)
+					Key_Data[data_offset + i] = 0;
+
+				data_offset += pad_len;
+			}
+		
+			AES_Key_Wrap(Key_Data, (UINT) data_offset, 
+						 &pEntry->PTK[LEN_PTK_KCK], LEN_PTK_KEK, 
+						 eGTK, &wrap_len);	
+			data_offset = wrap_len;
+			
+		}
+		else
+		{
+			TKIP_GTK_KEY_WRAP(&pEntry->PTK[LEN_PTK_KCK], 
+								pMsg->KeyDesc.KeyIv,									
+								Key_Data, 
+								data_offset,
+								eGTK);
+		}
+
+		NdisMoveMemory(pMsg->KeyDesc.KeyData, eGTK, data_offset);
+	}
+	else
+	{
+		NdisMoveMemory(pMsg->KeyDesc.KeyData, Key_Data, data_offset);
+	}
+
+	/* Update key data length field and total body length*/
+	SET_UINT16_TO_ARRARY(pMsg->KeyDesc.KeyDataLen, data_offset);
+	INC_UINT16_TO_ARRARY(pMsg->Body_Len, data_offset);
+
+	os_free_mem(NULL, mpool);
+
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Calcaulate MIC. It is used during 4-ways handsharking.
+
+	Arguments:
+		pAd				-	pointer to our pAdapter context	
+    	PeerWepStatus	-	indicate the encryption type    			 
+		
+	Return Value:
+
+	Note:
+	 The EAPOL-Key MIC is a MIC of the EAPOL-Key frames, 
+	 from and including the EAPOL protocol version field 
+	 to and including the Key Data field, calculated with 
+	 the Key MIC field set to 0.
+		
+	========================================================================
+*/
+VOID	CalculateMIC(
+	IN	UCHAR			KeyDescVer,	
+	IN	UCHAR			*PTK,
+	OUT PEAPOL_PACKET   pMsg)
+{
+    UCHAR   *OutBuffer;
+	ULONG	FrameLen = 0;
+	UCHAR	mic[LEN_KEY_DESC_MIC];
+	UCHAR	digest[80];
+
+	/* allocate memory for MIC calculation*/
+	os_alloc_mem(NULL, (PUCHAR *)&OutBuffer, 512);
+
+    if (OutBuffer == NULL)
+    {
+		DBGPRINT(RT_DEBUG_ERROR, ("!!!CalculateMIC: no memory!!!\n"));
+		return;
+    }
+		
+	/* make a frame for calculating MIC.*/
+    MakeOutgoingFrame(OutBuffer,            	&FrameLen,
+                      CONV_ARRARY_TO_UINT16(pMsg->Body_Len) + 4,  	pMsg,
+                      END_OF_ARGS);
+
+	NdisZeroMemory(mic, sizeof(mic));
+			
+	/* Calculate MIC*/
+    if (KeyDescVer == KEY_DESC_AES)
+ 	{
+		RT_HMAC_SHA1(PTK, LEN_PTK_KCK, OutBuffer,  FrameLen, digest, SHA1_DIGEST_SIZE);
+		NdisMoveMemory(mic, digest, LEN_KEY_DESC_MIC);
+	}
+	else
+	{
+		RT_HMAC_MD5(PTK, LEN_PTK_KCK, OutBuffer, FrameLen, mic, MD5_DIGEST_SIZE);
+	}
+
+	/* store the calculated MIC*/
+	NdisMoveMemory(pMsg->KeyDesc.KeyMic, mic, LEN_KEY_DESC_MIC);
+
+	os_free_mem(NULL, OutBuffer);
+}
+
+UCHAR	RTMPExtractKeyIdxFromIVHdr(	
+	IN	PUCHAR			pIV,
+	IN	UINT8			CipherAlg)
+{
+	UCHAR	keyIdx = 0xFF;
+
+	/* extract the key index from IV header */
+	switch (CipherAlg)
+	{
+		case Ndis802_11Encryption1Enabled:
+		case Ndis802_11Encryption2Enabled:
+		case Ndis802_11Encryption3Enabled:
+			keyIdx = (*(pIV + 3) & 0xc0) >> 6;
+			break;
+
+	}
+
+	return keyIdx;
+
+}
+
+PCIPHER_KEY RTMPSwCipherKeySelection(
+	IN 	PRTMP_ADAPTER 		pAd,
+	IN	PUCHAR				pIV,
+	IN	RX_BLK				*pRxBlk,
+	IN	PMAC_TABLE_ENTRY 	pEntry)
+{
+	PCIPHER_KEY			pKey = NULL;	
+	UCHAR				keyIdx = 0;
+	UINT8				CipherAlg = Ndis802_11EncryptionDisabled;
+	PRT28XX_RXD_STRUC	pRxD = &(pRxBlk->RxD);	
+
+	if ((pEntry == NULL) ||
+		(RX_BLK_TEST_FLAG(pRxBlk, fRX_APCLI)) || 
+		(RX_BLK_TEST_FLAG(pRxBlk, fRX_WDS)) ||
+		(RX_BLK_TEST_FLAG(pRxBlk, fRX_MESH)))
+		return NULL;
+
+	if (pRxD->U2M)
+	{
+		CipherAlg = pEntry->WepStatus;
+	}
+	else
+	{
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{				
+			CipherAlg = pAd->StaCfg.GroupCipher;
+		}	
+#endif /* CONFIG_STA_SUPPORT */		
+	}
+
+	if ((keyIdx = RTMPExtractKeyIdxFromIVHdr(pIV, CipherAlg)) > 3)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s : Invalid key index(%d) !!!\n", 
+								  __FUNCTION__, keyIdx));
+		return NULL;
+	}
+
+	if (CipherAlg == Ndis802_11Encryption1Enabled)
+	{
+		pKey = &pAd->SharedKey[pEntry->apidx][keyIdx];
+	}
+	else if ((CipherAlg == Ndis802_11Encryption2Enabled) ||
+  			 (CipherAlg == Ndis802_11Encryption3Enabled))
+	{
+		if (pRxD->U2M)
+			pKey = &pEntry->PairwiseKey;
+		else {
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */	    	                
+		    	pKey = &pAd->SharedKey[pEntry->apidx][keyIdx];
+        }
+	}
+
+	return pKey;
+	
+}
+
+/*
+	========================================================================
+
+	Routine Description:
+		Some received frames can't decrypt by Asic, so decrypt them by software.  
+
+	Arguments:
+		pAd				-	pointer to our pAdapter context	
+    	PeerWepStatus	-	indicate the encryption type    			 
+
+	Return Value:
+		NDIS_STATUS_SUCCESS		-	decryption successful	
+		NDIS_STATUS_FAILURE		-	decryption failure
+		
+	========================================================================
+*/
+NDIS_STATUS	RTMPSoftDecryptionAction(
+	IN	PRTMP_ADAPTER		pAd,
+	IN 		PUCHAR			pHdr,
+	IN 		UCHAR    		UserPriority,
+	IN 		PCIPHER_KEY		pKey,
+	INOUT 	PUCHAR			pData,
+	INOUT 	UINT16			*DataByteCnt)
+{		
+	switch (pKey->CipherAlg)
+    {    	        	        
+		case CIPHER_WEP64:
+		case CIPHER_WEP128:
+			/* handle WEP decryption */
+			if (RTMPSoftDecryptWEP(pAd, pKey, pData, &(*DataByteCnt)) == FALSE)		
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("ERROR : SW decrypt WEP data fails.\n"));	
+				/* give up this frame*/
+				return NDIS_STATUS_FAILURE; 
+			}        											
+			break;
+			
+		case CIPHER_TKIP:
+			/* handle TKIP decryption */
+			if (RTMPSoftDecryptTKIP(pAd, pHdr, UserPriority, 
+								pKey, pData, &(*DataByteCnt)) == FALSE)
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("ERROR : SW decrypt TKIP data fails.\n"));
+				/* give up this frame*/
+				return NDIS_STATUS_FAILURE; 
+			}        											
+			break;
+			
+		case CIPHER_AES:
+			/* handle AES decryption */
+			if (RTMPSoftDecryptCCMP(pAd, pHdr, pKey, pData, &(*DataByteCnt)) == FALSE)
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("ERROR : SW decrypt AES data fails.\n"));
+				/* give up this frame*/
+				return NDIS_STATUS_FAILURE; 
+        	}
+			break;
+		default:
+			/* give up this frame*/
+			return NDIS_STATUS_FAILURE;  
+			break;			
+	}	
+
+	return NDIS_STATUS_SUCCESS;
+		
+}
+
+VOID RTMPSoftConstructIVHdr(
+	IN	UCHAR			CipherAlg,
+	IN	UCHAR			key_id,
+	IN	PUCHAR			pTxIv,
+	OUT PUCHAR 			pHdrIv,
+	OUT	UINT8			*hdr_iv_len)
+{
+	*hdr_iv_len = 0;
+
+	if ((CipherAlg == CIPHER_WEP64) || (CipherAlg == CIPHER_WEP128))
+	{
+		/* Construct and insert 4-bytes WEP IV header to MPDU header */
+		RTMPConstructWEPIVHdr(key_id, pTxIv, pHdrIv);
+		*hdr_iv_len = LEN_WEP_IV_HDR;	
+	}
+	else if (CipherAlg == CIPHER_TKIP)
+		;
+	else if (CipherAlg == CIPHER_AES)
+	{
+		/* Construct and insert 8-bytes CCMP header to MPDU header */
+		RTMPConstructCCMPHdr(key_id, pTxIv, pHdrIv);	
+		*hdr_iv_len = LEN_CCMP_HDR;
+	}
+
+}
+
+VOID RTMPSoftEncryptionAction(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			CipherAlg,
+	IN	PUCHAR			pHdr,
+	IN	PUCHAR			pSrcBufData,
+	IN	UINT32			SrcBufLen,
+	IN	UCHAR			KeyIdx,
+	IN	PCIPHER_KEY		pKey,
+	OUT	UINT8			*ext_len)
+{
+	*ext_len = 0;
+
+	if ((CipherAlg == CIPHER_WEP64) || (CipherAlg == CIPHER_WEP128))
+	{
+		/* Encrypt the MPDU data by software*/
+		RTMPSoftEncryptWEP(pAd, 
+						   pKey->TxTsc, 
+						   pKey, 
+						   pSrcBufData, 
+						   SrcBufLen);
+				
+		*ext_len = LEN_ICV;	
+	}
+	else if (CipherAlg == CIPHER_TKIP)
+		;
+	else if (CipherAlg == CIPHER_AES)
+	{						
+		/* Encrypt the MPDU data by software*/
+		RTMPSoftEncryptCCMP(pAd, 
+							pHdr,
+							pKey->TxTsc, 
+							pKey->Key, 
+							pSrcBufData, 
+							SrcBufLen);
+				
+		*ext_len = LEN_CCMP_MIC;
+	}
+
+}
+
+PUINT8	WPA_ExtractSuiteFromRSNIE(
+		IN 	PUINT8	rsnie,
+		IN 	UINT	rsnie_len,
+		IN	UINT8	type,
+		OUT	UINT8	*count)
+{
+	PEID_STRUCT pEid;
+	INT			len;
+	PUINT8		pBuf;
+	INT			offset = 0;
+
+	pEid = (PEID_STRUCT)rsnie;
+	len = rsnie_len - 2;	/* exclude IE and length*/
+	pBuf = (PUINT8)&pEid->Octet[0];
+	
+	/* set default value*/
+	*count = 0;
+
+	/* Check length*/
+	if ((len <= 0) || (pEid->Len != len))
+	{
+		DBGPRINT_ERR(("%s : The length is invalid\n", __FUNCTION__));
+		goto out;
+	}
+	
+	/* Check WPA or WPA2*/
+	if (pEid->Eid == IE_WPA)
+	{
+		/* Check the length */
+		if (len < sizeof(RSNIE))
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("%s : The length is too short for WPA\n", __FUNCTION__));
+			goto out;
+		}
+		else
+		{
+			PRSNIE	pRsnie;
+			UINT16 	u_cnt;
+
+			pRsnie = (PRSNIE)pBuf;
+			u_cnt = cpu2le16(pRsnie->ucount);
+			offset = sizeof(RSNIE) + (LEN_OUI_SUITE * (u_cnt - 1));
+
+			if (len < offset)
+		{
+				DBGPRINT(RT_DEBUG_ERROR, ("%s : The expected lenght(%d) exceed the remaining length(%d) for WPA-RSN \n",
+											__FUNCTION__, offset, len));
+				goto out;
+		}
+			else
+			{
+		/* Get the group cipher*/
+		if (type == GROUP_SUITE)
+		{
+			*count = 1;
+			return pRsnie->mcast;
+		}
+		/* Get the pairwise cipher suite*/
+		else if (type == PAIRWISE_SUITE)
+		{			
+			DBGPRINT(RT_DEBUG_TRACE, ("%s : The count of pairwise cipher is %d\n",
+												__FUNCTION__, u_cnt));
+						*count = u_cnt;			
+			return pRsnie->ucast[0].oui;
+		}
+			}			
+		}
+	}
+	else if (pEid->Eid == IE_RSN)
+	{
+		if (len < sizeof(RSNIE2))
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("%s : The length is too short for WPA2\n", __FUNCTION__));
+			goto out;
+		}
+		else
+		{
+			PRSNIE2	pRsnie2;
+			UINT16 	u_cnt;
+
+			pRsnie2 = (PRSNIE2)pBuf;
+			u_cnt = cpu2le16(pRsnie2->ucount);
+			offset = sizeof(RSNIE2) + (LEN_OUI_SUITE * (u_cnt - 1));
+
+			if (len < offset)
+		{
+				DBGPRINT(RT_DEBUG_ERROR, ("%s : The expected lenght(%d) exceed the remaining length(%d) for WPA2-RSN \n",
+											__FUNCTION__, offset, len));
+				goto out;
+		}
+			else
+			{
+		/* Get the group cipher*/
+		if (type == GROUP_SUITE)
+		{
+			*count = 1;
+					return pRsnie2->mcast;
+		}
+		/* Get the pairwise cipher suite*/
+		else if (type == PAIRWISE_SUITE)
+		{			
+			DBGPRINT(RT_DEBUG_TRACE, ("%s : The count of pairwise cipher is %d\n",
+										__FUNCTION__, u_cnt));
+					*count = u_cnt;			
+					return pRsnie2->ucast[0].oui;
+				}
+			}
+		}
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s : Unknown IE (%d)\n", __FUNCTION__, pEid->Eid));
+		goto out;
+	}
+
+	/* skip group cipher and pairwise cipher suite	*/
+	pBuf += offset;
+	len -= offset;
+
+	/* Ready to extract the AKM information and its count */
+	if (len < sizeof(RSNIE_AUTH))
+	{
+		DBGPRINT_ERR(("%s : The length of AKM of RSN is too short\n", __FUNCTION__));
+		goto out;
+	}
+	else
+	{
+		PRSNIE_AUTH	pAkm;
+		UINT16 		a_cnt;
+
+		/* pointer to AKM count */
+	pAkm = (PRSNIE_AUTH)pBuf;
+		a_cnt = cpu2le16(pAkm->acount);
+		offset = sizeof(RSNIE_AUTH) + (LEN_OUI_SUITE * (a_cnt - 1));
+
+		if (len < offset)
+	{
+			DBGPRINT(RT_DEBUG_ERROR, ("%s : The expected lenght(%d) exceed the remaining length(%d) for AKM \n",
+										__FUNCTION__, offset, len));
+			goto out;
+	}
+		else
+		{
+			/* Get the AKM suite */
+	if (type == AKM_SUITE)
+	{			
+		DBGPRINT(RT_DEBUG_TRACE, ("%s : The count of AKM is %d\n",
+											__FUNCTION__, a_cnt));
+				*count = a_cnt;			
+		return pAkm->auth[0].oui;
+	}
+		}
+	}
+
+	/* For WPA1, the remaining shall be ignored. */
+	if (pEid->Eid == IE_WPA)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("%s : The remaining shall be ignored in WPA mode\n",
+									__FUNCTION__));
+		goto out;
+	}
+
+	/* skip the AKM capability */
+	pBuf += offset;
+	len -= offset;
+
+	/* Parse the RSN Capabilities */
+	if (len < sizeof(RSN_CAPABILITIES))
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("%s : The peer RSNIE doesn't include RSN-Cap\n", __FUNCTION__));
+		goto out;
+	}
+	else
+	{
+		/* Report the content of the RSN capabilities */
+		if (type == RSN_CAP_INFO)
+		{			
+			DBGPRINT(RT_DEBUG_TRACE, ("%s : Extract RSN Capabilities\n", __FUNCTION__));
+			*count = 1;	
+			return pBuf;
+		}
+
+		/* skip RSN capability (2-bytes) */		
+		offset = sizeof(RSN_CAPABILITIES);
+		pBuf += offset;
+		len -= offset;
+	}
+
+	/* Extract PMKID-list field */
+	if (len < sizeof(UINT16))
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("%s : The peer RSNIE doesn't include PMKID list Count\n", __FUNCTION__));
+		goto out;
+	}
+	else
+	{
+		UINT16 	p_count;
+		PUINT8	pPmkidList = NULL;
+		
+		NdisMoveMemory(&p_count, pBuf, sizeof(UINT16));
+		p_count = cpu2le16(p_count);
+
+		/* Get count of the PMKID list */
+		if (p_count > 0)
+		{		
+			PRSNIE_PMKID 	pRsnPmkid;
+
+			/* the expected length of PMKID-List field */
+			offset = sizeof(RSNIE_PMKID) + (LEN_PMKID * (p_count - 1));
+
+			/* sanity check about the length of PMKID-List field */
+			if (len < offset)
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("%s : The expected lenght(%d) exceed the remaining length(%d) in PMKID-field \n",
+											__FUNCTION__, offset, len));
+				goto out;
+			}
+
+			/* pointer to PMKID field */
+			pRsnPmkid = (PRSNIE_PMKID)pBuf;
+			pPmkidList = pRsnPmkid->pmkid[0].list;
+
+		}	
+		else
+		{
+			/* The PMKID field shall be without PMKID-List */
+			offset = sizeof(UINT16);
+			pPmkidList = NULL;
+		}
+
+
+		/* Extract PMKID list and its count */
+		if (type == PMKID_LIST)
+		{
+			*count = p_count;			
+			return pPmkidList;
+		}	
+
+		/* skip the PMKID field */
+		pBuf += offset;
+		len -= offset;
+
+	}
+
+
+out:
+	*count = 0;	
+	return NULL;
+	
+}	
+
+VOID WpaShowAllsuite(
+	IN 	PUINT8	rsnie,
+	IN 	UINT	rsnie_len)
+{
+	PUINT8 pSuite = NULL;
+	UINT8 count;
+
+	hex_dump("RSNIE", rsnie, rsnie_len);
+	
+	/* group cipher*/
+	if ((pSuite = WPA_ExtractSuiteFromRSNIE(rsnie, rsnie_len, GROUP_SUITE, &count)) != NULL)
+	{			
+		hex_dump("group cipher", pSuite, 4*count);
+	}
+
+	/* pairwise cipher*/
+	if ((pSuite = WPA_ExtractSuiteFromRSNIE(rsnie, rsnie_len, PAIRWISE_SUITE, &count)) != NULL)
+	{			
+		hex_dump("pairwise cipher", pSuite, 4*count);
+	}
+
+	/* AKM*/
+	if ((pSuite = WPA_ExtractSuiteFromRSNIE(rsnie, rsnie_len, AKM_SUITE, &count)) != NULL)
+	{			
+		hex_dump("AKM suite", pSuite, 4*count);
+	}
+
+	/* PMKID*/
+	if ((pSuite = WPA_ExtractSuiteFromRSNIE(rsnie, rsnie_len, PMKID_LIST, &count)) != NULL)
+	{			
+		hex_dump("PMKID", pSuite, LEN_PMKID);
+	}
+
+}	
+
+VOID RTMPInsertRSNIE(
+	IN PUCHAR pFrameBuf,
+	OUT PULONG pFrameLen,
+	IN PUINT8 rsnie_ptr,
+	IN UINT8  rsnie_len,
+	IN PUINT8 pmkid_ptr,
+	IN UINT8  pmkid_len)
+{
+	PUCHAR	pTmpBuf;
+	ULONG 	TempLen = 0;
+	UINT8 	extra_len = 0;
+	UINT16 	pmk_count = 0;
+	UCHAR	ie_num;
+	UINT8 	total_len = 0;	
+    UCHAR	WPA2_OUI[3]={0x00,0x0F,0xAC};
+
+	pTmpBuf = pFrameBuf;
+
+	/* PMKID-List Must larger than 0 and the multiple of 16. */
+	if (pmkid_len > 0 && ((pmkid_len & 0x0f) == 0))
+	{		
+		extra_len = sizeof(UINT16) + pmkid_len;
+
+		pmk_count = (pmkid_len >> 4);
+		pmk_count = cpu2le16(pmk_count);
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("%s : no PMKID-List included(%d).\n", __FUNCTION__, pmkid_len));
+	}
+
+	if (rsnie_len != 0)
+	{	
+		ie_num = IE_WPA;
+		total_len = rsnie_len;
+	
+		if (NdisEqualMemory(rsnie_ptr + 2, WPA2_OUI, sizeof(WPA2_OUI)))
+		{	
+			ie_num = IE_RSN;
+			total_len += extra_len;
+		}
+
+		/* construct RSNIE body */
+		MakeOutgoingFrame(pTmpBuf,			&TempLen,
+					  	  1,				&ie_num,
+					  	  1,				&total_len,
+					  	  rsnie_len,		rsnie_ptr,
+					  	  END_OF_ARGS);
+
+		pTmpBuf += TempLen;
+		*pFrameLen = *pFrameLen + TempLen;
+
+		if (ie_num == IE_RSN)
+		{
+			/* Insert PMKID-List field */
+			if (extra_len > 0)
+			{
+				MakeOutgoingFrame(pTmpBuf,					&TempLen,
+							  	  2,						&pmk_count,
+							  	  pmkid_len,				pmkid_ptr,
+							  	  END_OF_ARGS);
+			
+				pTmpBuf += TempLen;
+				*pFrameLen = *pFrameLen + TempLen;
+			}								
+		}
+	}
+		
+	return; 
+}
+
+
+VOID WPAInstallPairwiseKey(
+	PRTMP_ADAPTER		pAd,
+	UINT8				BssIdx,
+	PMAC_TABLE_ENTRY	pEntry,
+	BOOLEAN				bAE)
+{
+    NdisZeroMemory(&pEntry->PairwiseKey, sizeof(CIPHER_KEY));   
+
+	/* Assign the pairwise cipher algorithm	*/
+    if (pEntry->WepStatus == Ndis802_11Encryption2Enabled)
+        pEntry->PairwiseKey.CipherAlg = CIPHER_TKIP;
+    else if (pEntry->WepStatus == Ndis802_11Encryption3Enabled)
+        pEntry->PairwiseKey.CipherAlg = CIPHER_AES;
+	else
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s : fails (wcid-%d)\n", 
+										__FUNCTION__, pEntry->Aid));	
+		return;
+	}	
+
+	/* Assign key material and its length */
+    pEntry->PairwiseKey.KeyLen = LEN_TK;
+    NdisMoveMemory(pEntry->PairwiseKey.Key, &pEntry->PTK[OFFSET_OF_PTK_TK], LEN_TK);
+	if (pEntry->PairwiseKey.CipherAlg == CIPHER_TKIP)
+	{
+		if (bAE)
+		{
+		    NdisMoveMemory(pEntry->PairwiseKey.TxMic, &pEntry->PTK[OFFSET_OF_AP_TKIP_TX_MIC], LEN_TKIP_MIC);
+		    NdisMoveMemory(pEntry->PairwiseKey.RxMic, &pEntry->PTK[OFFSET_OF_AP_TKIP_RX_MIC], LEN_TKIP_MIC);
+		}
+		else
+		{
+		    NdisMoveMemory(pEntry->PairwiseKey.TxMic, &pEntry->PTK[OFFSET_OF_STA_TKIP_TX_MIC], LEN_TKIP_MIC);
+		    NdisMoveMemory(pEntry->PairwiseKey.RxMic, &pEntry->PTK[OFFSET_OF_STA_TKIP_RX_MIC], LEN_TKIP_MIC);
+		}
+	}
+
+#ifdef SOFT_ENCRYPT
+	if (CLIENT_STATUS_TEST_FLAG(pEntry, fCLIENT_STATUS_SOFTWARE_ENCRYPT))
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("===> SW_ENC ON(wcid=%d) \n", pEntry->Aid));
+		NdisZeroMemory(pEntry->PairwiseKey.TxTsc, LEN_WPA_TSC);
+		NdisZeroMemory(pEntry->PairwiseKey.RxTsc, LEN_WPA_TSC);		
+	}	
+	else
+#endif /* SOFT_ENCRYPT */		
+	{
+		/* Add Pair-wise key to Asic */
+	    AsicAddPairwiseKeyEntry(
+	        pAd, 
+	        (UCHAR)pEntry->Aid, 
+	        &pEntry->PairwiseKey);
+
+		RTMPSetWcidSecurityInfo(pAd, 
+								BssIdx, 
+								0, 
+								pEntry->PairwiseKey.CipherAlg,
+								(UCHAR)pEntry->Aid, 
+								PAIRWISEKEYTABLE);		
+	}
+	
+}
+
+VOID WPAInstallSharedKey(
+	PRTMP_ADAPTER		pAd,
+	UINT8				GroupCipher,
+	UINT8				BssIdx,
+	UINT8				KeyIdx,
+	UINT8				Wcid,
+	BOOLEAN				bAE,
+	PUINT8				pGtk,
+	UINT8				GtkLen)
+{
+	PCIPHER_KEY 	pSharedKey;
+	
+	if (BssIdx >= MAX_MBSSID_NUM(pAd))
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s : The BSS-index(%d) is out of range for MBSSID link. \n", 
+									__FUNCTION__, BssIdx));	
+		return;
+	}
+
+	pSharedKey = &pAd->SharedKey[BssIdx][KeyIdx];
+	NdisZeroMemory(pSharedKey, sizeof(CIPHER_KEY));
+	
+	/* Set the group cipher */
+	if (GroupCipher == Ndis802_11GroupWEP40Enabled)
+		pSharedKey->CipherAlg = CIPHER_WEP64;
+	else if (GroupCipher == Ndis802_11GroupWEP104Enabled)
+		pSharedKey->CipherAlg = CIPHER_WEP128;
+	else if (GroupCipher == Ndis802_11Encryption2Enabled)
+		pSharedKey->CipherAlg = CIPHER_TKIP;
+	else if (GroupCipher == Ndis802_11Encryption3Enabled)
+		pSharedKey->CipherAlg = CIPHER_AES;
+	else
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s : fails (IF/ra%d) \n", 
+										__FUNCTION__, BssIdx));	
+		return;
+	}
+			
+	/* Set the key material and its length */
+	if (GroupCipher == Ndis802_11GroupWEP40Enabled || 
+		GroupCipher == Ndis802_11GroupWEP104Enabled)
+	{
+		/* Sanity check the length */
+		if ((GtkLen != LEN_WEP64) && (GtkLen != LEN_WEP128))
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("%s : (IF/ra%d) WEP key invlaid(%d) \n", 
+										__FUNCTION__, BssIdx, GtkLen));	
+			return;
+		}
+				
+		pSharedKey->KeyLen = GtkLen;
+		NdisMoveMemory(pSharedKey->Key, pGtk, GtkLen);
+	}
+	else
+	{
+		/* Sanity check the length */
+		if (GtkLen < LEN_TK)
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("%s : (IF/ra%d) WPA key invlaid(%d) \n", 
+										__FUNCTION__, BssIdx, GtkLen));	
+			return;
+		}
+	
+		pSharedKey->KeyLen = LEN_TK;
+		NdisMoveMemory(pSharedKey->Key, pGtk, LEN_TK);
+		if (pSharedKey->CipherAlg == CIPHER_TKIP)
+		{
+			if (bAE)
+			{
+				NdisMoveMemory(pSharedKey->TxMic, pGtk + 16, LEN_TKIP_MIC);
+				NdisMoveMemory(pSharedKey->RxMic, pGtk + 24, LEN_TKIP_MIC);            
+			}
+			else
+			{
+				NdisMoveMemory(pSharedKey->TxMic, pGtk + 24, LEN_TKIP_MIC);
+				NdisMoveMemory(pSharedKey->RxMic, pGtk + 16, LEN_TKIP_MIC);            
+			}
+		}
+	}
+    
+	/* Update group key table(0x6C00) and group key mode(0x7000) */
+    AsicAddSharedKeyEntry(
+				pAd, 
+				BssIdx, 
+				KeyIdx, 
+				pSharedKey);
+
+	/* When Wcid isn't zero, it means that this is a Authenticator Role. 
+	   Only Authenticator entity needs to set HW IE/EIV table (0x6000)
+	   and WCID attribute table (0x6800) for group key. */
+	if (Wcid != 0)
+	{	
+		RTMPSetWcidSecurityInfo(pAd, 
+								BssIdx, 
+								KeyIdx, 
+								pSharedKey->CipherAlg,
+								Wcid, 
+								SHAREDKEYTABLE);
+	}
+}
+
+VOID RTMPSetWcidSecurityInfo(
+	PRTMP_ADAPTER		pAd,
+	UINT8				BssIdx,
+	UINT8				KeyIdx,
+	UINT8				CipherAlg,
+	UINT8				Wcid,
+	UINT8				KeyTabFlag)
+{
+	UINT32			IV = 0;
+	UINT8			IV_KEYID = 0;
+	
+	/* Prepare initial IV value */
+	if (CipherAlg == CIPHER_WEP64 || CipherAlg == CIPHER_WEP128)
+	{
+		INT	i;	
+		UCHAR	TxTsc[LEN_WEP_TSC];
+
+		/* Generate 3-bytes IV randomly for encryption using */						
+		for(i = 0; i < LEN_WEP_TSC; i++)
+			TxTsc[i] = RandomByte(pAd);
+
+		/* Update HW IVEIV table */
+		IV_KEYID = (KeyIdx << 6);
+		IV = (IV_KEYID << 24) | 
+			 (TxTsc[2] << 16) |
+			 (TxTsc[1] << 8) |
+			 (TxTsc[0]);	
+	}
+	else if (CipherAlg == CIPHER_TKIP || CipherAlg == CIPHER_AES)
+	{
+		/* Set IVEIV as 1 in Asic -
+		In IEEE 802.11-2007 8.3.3.4.3 described :
+		The PN shall be implemented as a 48-bit monotonically incrementing
+		non-negative integer, initialized to 1 when the corresponding 
+		temporal key is initialized or refreshed. */	
+		IV_KEYID = (KeyIdx << 6) | 0x20;
+		IV = (IV_KEYID << 24) | 1;
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s : Unsupport cipher Alg (%d) for Wcid-%d \n", 
+										__FUNCTION__, CipherAlg, Wcid));
+		return;
+	}
+	/* Update WCID IV/EIV table */
+	AsicUpdateWCIDIVEIV(pAd, Wcid, IV, 0);
+		
+	/* Update WCID attribute entry */
+	AsicUpdateWcidAttributeEntry(pAd, 
+							BssIdx, 
+							KeyIdx, 
+							CipherAlg,
+							Wcid,
+							KeyTabFlag);
+
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/crypt_aes.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/crypt_aes.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/crypt_aes.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/crypt_aes.c	2017-09-23 03:42:49.738675919 +0800
@@ -0,0 +1,3653 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "crypt_aes.h"
+
+
+#define assert(a)   /*ASSERT(a)
+*/
+
+#undef u32
+#define	u32 unsigned int
+/*typedef unsigned int u32;
+*/
+
+static const u32 Te0[256] = {
+    0xc66363a5U, 0xf87c7c84U, 0xee777799U, 0xf67b7b8dU,
+    0xfff2f20dU, 0xd66b6bbdU, 0xde6f6fb1U, 0x91c5c554U,
+    0x60303050U, 0x02010103U, 0xce6767a9U, 0x562b2b7dU,
+    0xe7fefe19U, 0xb5d7d762U, 0x4dababe6U, 0xec76769aU,
+    0x8fcaca45U, 0x1f82829dU, 0x89c9c940U, 0xfa7d7d87U,
+    0xeffafa15U, 0xb25959ebU, 0x8e4747c9U, 0xfbf0f00bU,
+    0x41adadecU, 0xb3d4d467U, 0x5fa2a2fdU, 0x45afafeaU,
+    0x239c9cbfU, 0x53a4a4f7U, 0xe4727296U, 0x9bc0c05bU,
+    0x75b7b7c2U, 0xe1fdfd1cU, 0x3d9393aeU, 0x4c26266aU,
+    0x6c36365aU, 0x7e3f3f41U, 0xf5f7f702U, 0x83cccc4fU,
+    0x6834345cU, 0x51a5a5f4U, 0xd1e5e534U, 0xf9f1f108U,
+    0xe2717193U, 0xabd8d873U, 0x62313153U, 0x2a15153fU,
+    0x0804040cU, 0x95c7c752U, 0x46232365U, 0x9dc3c35eU,
+    0x30181828U, 0x379696a1U, 0x0a05050fU, 0x2f9a9ab5U,
+    0x0e070709U, 0x24121236U, 0x1b80809bU, 0xdfe2e23dU,
+    0xcdebeb26U, 0x4e272769U, 0x7fb2b2cdU, 0xea75759fU,
+    0x1209091bU, 0x1d83839eU, 0x582c2c74U, 0x341a1a2eU,
+    0x361b1b2dU, 0xdc6e6eb2U, 0xb45a5aeeU, 0x5ba0a0fbU,
+    0xa45252f6U, 0x763b3b4dU, 0xb7d6d661U, 0x7db3b3ceU,
+    0x5229297bU, 0xdde3e33eU, 0x5e2f2f71U, 0x13848497U,
+    0xa65353f5U, 0xb9d1d168U, 0x00000000U, 0xc1eded2cU,
+    0x40202060U, 0xe3fcfc1fU, 0x79b1b1c8U, 0xb65b5bedU,
+    0xd46a6abeU, 0x8dcbcb46U, 0x67bebed9U, 0x7239394bU,
+    0x944a4adeU, 0x984c4cd4U, 0xb05858e8U, 0x85cfcf4aU,
+    0xbbd0d06bU, 0xc5efef2aU, 0x4faaaae5U, 0xedfbfb16U,
+    0x864343c5U, 0x9a4d4dd7U, 0x66333355U, 0x11858594U,
+    0x8a4545cfU, 0xe9f9f910U, 0x04020206U, 0xfe7f7f81U,
+    0xa05050f0U, 0x783c3c44U, 0x259f9fbaU, 0x4ba8a8e3U,
+    0xa25151f3U, 0x5da3a3feU, 0x804040c0U, 0x058f8f8aU,
+    0x3f9292adU, 0x219d9dbcU, 0x70383848U, 0xf1f5f504U,
+    0x63bcbcdfU, 0x77b6b6c1U, 0xafdada75U, 0x42212163U,
+    0x20101030U, 0xe5ffff1aU, 0xfdf3f30eU, 0xbfd2d26dU,
+    0x81cdcd4cU, 0x180c0c14U, 0x26131335U, 0xc3ecec2fU,
+    0xbe5f5fe1U, 0x359797a2U, 0x884444ccU, 0x2e171739U,
+    0x93c4c457U, 0x55a7a7f2U, 0xfc7e7e82U, 0x7a3d3d47U,
+    0xc86464acU, 0xba5d5de7U, 0x3219192bU, 0xe6737395U,
+    0xc06060a0U, 0x19818198U, 0x9e4f4fd1U, 0xa3dcdc7fU,
+    0x44222266U, 0x542a2a7eU, 0x3b9090abU, 0x0b888883U,
+    0x8c4646caU, 0xc7eeee29U, 0x6bb8b8d3U, 0x2814143cU,
+    0xa7dede79U, 0xbc5e5ee2U, 0x160b0b1dU, 0xaddbdb76U,
+    0xdbe0e03bU, 0x64323256U, 0x743a3a4eU, 0x140a0a1eU,
+    0x924949dbU, 0x0c06060aU, 0x4824246cU, 0xb85c5ce4U,
+    0x9fc2c25dU, 0xbdd3d36eU, 0x43acacefU, 0xc46262a6U,
+    0x399191a8U, 0x319595a4U, 0xd3e4e437U, 0xf279798bU,
+    0xd5e7e732U, 0x8bc8c843U, 0x6e373759U, 0xda6d6db7U,
+    0x018d8d8cU, 0xb1d5d564U, 0x9c4e4ed2U, 0x49a9a9e0U,
+    0xd86c6cb4U, 0xac5656faU, 0xf3f4f407U, 0xcfeaea25U,
+    0xca6565afU, 0xf47a7a8eU, 0x47aeaee9U, 0x10080818U,
+    0x6fbabad5U, 0xf0787888U, 0x4a25256fU, 0x5c2e2e72U,
+    0x381c1c24U, 0x57a6a6f1U, 0x73b4b4c7U, 0x97c6c651U,
+    0xcbe8e823U, 0xa1dddd7cU, 0xe874749cU, 0x3e1f1f21U,
+    0x964b4bddU, 0x61bdbddcU, 0x0d8b8b86U, 0x0f8a8a85U,
+    0xe0707090U, 0x7c3e3e42U, 0x71b5b5c4U, 0xcc6666aaU,
+    0x904848d8U, 0x06030305U, 0xf7f6f601U, 0x1c0e0e12U,
+    0xc26161a3U, 0x6a35355fU, 0xae5757f9U, 0x69b9b9d0U,
+    0x17868691U, 0x99c1c158U, 0x3a1d1d27U, 0x279e9eb9U,
+    0xd9e1e138U, 0xebf8f813U, 0x2b9898b3U, 0x22111133U,
+    0xd26969bbU, 0xa9d9d970U, 0x078e8e89U, 0x339494a7U,
+    0x2d9b9bb6U, 0x3c1e1e22U, 0x15878792U, 0xc9e9e920U,
+    0x87cece49U, 0xaa5555ffU, 0x50282878U, 0xa5dfdf7aU,
+    0x038c8c8fU, 0x59a1a1f8U, 0x09898980U, 0x1a0d0d17U,
+    0x65bfbfdaU, 0xd7e6e631U, 0x844242c6U, 0xd06868b8U,
+    0x824141c3U, 0x299999b0U, 0x5a2d2d77U, 0x1e0f0f11U,
+    0x7bb0b0cbU, 0xa85454fcU, 0x6dbbbbd6U, 0x2c16163aU,
+};
+static const u32 Te1[256] = {
+    0xa5c66363U, 0x84f87c7cU, 0x99ee7777U, 0x8df67b7bU,
+    0x0dfff2f2U, 0xbdd66b6bU, 0xb1de6f6fU, 0x5491c5c5U,
+    0x50603030U, 0x03020101U, 0xa9ce6767U, 0x7d562b2bU,
+    0x19e7fefeU, 0x62b5d7d7U, 0xe64dababU, 0x9aec7676U,
+    0x458fcacaU, 0x9d1f8282U, 0x4089c9c9U, 0x87fa7d7dU,
+    0x15effafaU, 0xebb25959U, 0xc98e4747U, 0x0bfbf0f0U,
+    0xec41adadU, 0x67b3d4d4U, 0xfd5fa2a2U, 0xea45afafU,
+    0xbf239c9cU, 0xf753a4a4U, 0x96e47272U, 0x5b9bc0c0U,
+    0xc275b7b7U, 0x1ce1fdfdU, 0xae3d9393U, 0x6a4c2626U,
+    0x5a6c3636U, 0x417e3f3fU, 0x02f5f7f7U, 0x4f83ccccU,
+    0x5c683434U, 0xf451a5a5U, 0x34d1e5e5U, 0x08f9f1f1U,
+    0x93e27171U, 0x73abd8d8U, 0x53623131U, 0x3f2a1515U,
+    0x0c080404U, 0x5295c7c7U, 0x65462323U, 0x5e9dc3c3U,
+    0x28301818U, 0xa1379696U, 0x0f0a0505U, 0xb52f9a9aU,
+    0x090e0707U, 0x36241212U, 0x9b1b8080U, 0x3ddfe2e2U,
+    0x26cdebebU, 0x694e2727U, 0xcd7fb2b2U, 0x9fea7575U,
+    0x1b120909U, 0x9e1d8383U, 0x74582c2cU, 0x2e341a1aU,
+    0x2d361b1bU, 0xb2dc6e6eU, 0xeeb45a5aU, 0xfb5ba0a0U,
+    0xf6a45252U, 0x4d763b3bU, 0x61b7d6d6U, 0xce7db3b3U,
+    0x7b522929U, 0x3edde3e3U, 0x715e2f2fU, 0x97138484U,
+    0xf5a65353U, 0x68b9d1d1U, 0x00000000U, 0x2cc1ededU,
+    0x60402020U, 0x1fe3fcfcU, 0xc879b1b1U, 0xedb65b5bU,
+    0xbed46a6aU, 0x468dcbcbU, 0xd967bebeU, 0x4b723939U,
+    0xde944a4aU, 0xd4984c4cU, 0xe8b05858U, 0x4a85cfcfU,
+    0x6bbbd0d0U, 0x2ac5efefU, 0xe54faaaaU, 0x16edfbfbU,
+    0xc5864343U, 0xd79a4d4dU, 0x55663333U, 0x94118585U,
+    0xcf8a4545U, 0x10e9f9f9U, 0x06040202U, 0x81fe7f7fU,
+    0xf0a05050U, 0x44783c3cU, 0xba259f9fU, 0xe34ba8a8U,
+    0xf3a25151U, 0xfe5da3a3U, 0xc0804040U, 0x8a058f8fU,
+    0xad3f9292U, 0xbc219d9dU, 0x48703838U, 0x04f1f5f5U,
+    0xdf63bcbcU, 0xc177b6b6U, 0x75afdadaU, 0x63422121U,
+    0x30201010U, 0x1ae5ffffU, 0x0efdf3f3U, 0x6dbfd2d2U,
+    0x4c81cdcdU, 0x14180c0cU, 0x35261313U, 0x2fc3ececU,
+    0xe1be5f5fU, 0xa2359797U, 0xcc884444U, 0x392e1717U,
+    0x5793c4c4U, 0xf255a7a7U, 0x82fc7e7eU, 0x477a3d3dU,
+    0xacc86464U, 0xe7ba5d5dU, 0x2b321919U, 0x95e67373U,
+    0xa0c06060U, 0x98198181U, 0xd19e4f4fU, 0x7fa3dcdcU,
+    0x66442222U, 0x7e542a2aU, 0xab3b9090U, 0x830b8888U,
+    0xca8c4646U, 0x29c7eeeeU, 0xd36bb8b8U, 0x3c281414U,
+    0x79a7dedeU, 0xe2bc5e5eU, 0x1d160b0bU, 0x76addbdbU,
+    0x3bdbe0e0U, 0x56643232U, 0x4e743a3aU, 0x1e140a0aU,
+    0xdb924949U, 0x0a0c0606U, 0x6c482424U, 0xe4b85c5cU,
+    0x5d9fc2c2U, 0x6ebdd3d3U, 0xef43acacU, 0xa6c46262U,
+    0xa8399191U, 0xa4319595U, 0x37d3e4e4U, 0x8bf27979U,
+    0x32d5e7e7U, 0x438bc8c8U, 0x596e3737U, 0xb7da6d6dU,
+    0x8c018d8dU, 0x64b1d5d5U, 0xd29c4e4eU, 0xe049a9a9U,
+    0xb4d86c6cU, 0xfaac5656U, 0x07f3f4f4U, 0x25cfeaeaU,
+    0xafca6565U, 0x8ef47a7aU, 0xe947aeaeU, 0x18100808U,
+    0xd56fbabaU, 0x88f07878U, 0x6f4a2525U, 0x725c2e2eU,
+    0x24381c1cU, 0xf157a6a6U, 0xc773b4b4U, 0x5197c6c6U,
+    0x23cbe8e8U, 0x7ca1ddddU, 0x9ce87474U, 0x213e1f1fU,
+    0xdd964b4bU, 0xdc61bdbdU, 0x860d8b8bU, 0x850f8a8aU,
+    0x90e07070U, 0x427c3e3eU, 0xc471b5b5U, 0xaacc6666U,
+    0xd8904848U, 0x05060303U, 0x01f7f6f6U, 0x121c0e0eU,
+    0xa3c26161U, 0x5f6a3535U, 0xf9ae5757U, 0xd069b9b9U,
+    0x91178686U, 0x5899c1c1U, 0x273a1d1dU, 0xb9279e9eU,
+    0x38d9e1e1U, 0x13ebf8f8U, 0xb32b9898U, 0x33221111U,
+    0xbbd26969U, 0x70a9d9d9U, 0x89078e8eU, 0xa7339494U,
+    0xb62d9b9bU, 0x223c1e1eU, 0x92158787U, 0x20c9e9e9U,
+    0x4987ceceU, 0xffaa5555U, 0x78502828U, 0x7aa5dfdfU,
+    0x8f038c8cU, 0xf859a1a1U, 0x80098989U, 0x171a0d0dU,
+    0xda65bfbfU, 0x31d7e6e6U, 0xc6844242U, 0xb8d06868U,
+    0xc3824141U, 0xb0299999U, 0x775a2d2dU, 0x111e0f0fU,
+    0xcb7bb0b0U, 0xfca85454U, 0xd66dbbbbU, 0x3a2c1616U,
+};
+static const u32 Te2[256] = {
+    0x63a5c663U, 0x7c84f87cU, 0x7799ee77U, 0x7b8df67bU,
+    0xf20dfff2U, 0x6bbdd66bU, 0x6fb1de6fU, 0xc55491c5U,
+    0x30506030U, 0x01030201U, 0x67a9ce67U, 0x2b7d562bU,
+    0xfe19e7feU, 0xd762b5d7U, 0xabe64dabU, 0x769aec76U,
+    0xca458fcaU, 0x829d1f82U, 0xc94089c9U, 0x7d87fa7dU,
+    0xfa15effaU, 0x59ebb259U, 0x47c98e47U, 0xf00bfbf0U,
+    0xadec41adU, 0xd467b3d4U, 0xa2fd5fa2U, 0xafea45afU,
+    0x9cbf239cU, 0xa4f753a4U, 0x7296e472U, 0xc05b9bc0U,
+    0xb7c275b7U, 0xfd1ce1fdU, 0x93ae3d93U, 0x266a4c26U,
+    0x365a6c36U, 0x3f417e3fU, 0xf702f5f7U, 0xcc4f83ccU,
+    0x345c6834U, 0xa5f451a5U, 0xe534d1e5U, 0xf108f9f1U,
+    0x7193e271U, 0xd873abd8U, 0x31536231U, 0x153f2a15U,
+    0x040c0804U, 0xc75295c7U, 0x23654623U, 0xc35e9dc3U,
+    0x18283018U, 0x96a13796U, 0x050f0a05U, 0x9ab52f9aU,
+    0x07090e07U, 0x12362412U, 0x809b1b80U, 0xe23ddfe2U,
+    0xeb26cdebU, 0x27694e27U, 0xb2cd7fb2U, 0x759fea75U,
+    0x091b1209U, 0x839e1d83U, 0x2c74582cU, 0x1a2e341aU,
+    0x1b2d361bU, 0x6eb2dc6eU, 0x5aeeb45aU, 0xa0fb5ba0U,
+    0x52f6a452U, 0x3b4d763bU, 0xd661b7d6U, 0xb3ce7db3U,
+    0x297b5229U, 0xe33edde3U, 0x2f715e2fU, 0x84971384U,
+    0x53f5a653U, 0xd168b9d1U, 0x00000000U, 0xed2cc1edU,
+    0x20604020U, 0xfc1fe3fcU, 0xb1c879b1U, 0x5bedb65bU,
+    0x6abed46aU, 0xcb468dcbU, 0xbed967beU, 0x394b7239U,
+    0x4ade944aU, 0x4cd4984cU, 0x58e8b058U, 0xcf4a85cfU,
+    0xd06bbbd0U, 0xef2ac5efU, 0xaae54faaU, 0xfb16edfbU,
+    0x43c58643U, 0x4dd79a4dU, 0x33556633U, 0x85941185U,
+    0x45cf8a45U, 0xf910e9f9U, 0x02060402U, 0x7f81fe7fU,
+    0x50f0a050U, 0x3c44783cU, 0x9fba259fU, 0xa8e34ba8U,
+    0x51f3a251U, 0xa3fe5da3U, 0x40c08040U, 0x8f8a058fU,
+    0x92ad3f92U, 0x9dbc219dU, 0x38487038U, 0xf504f1f5U,
+    0xbcdf63bcU, 0xb6c177b6U, 0xda75afdaU, 0x21634221U,
+    0x10302010U, 0xff1ae5ffU, 0xf30efdf3U, 0xd26dbfd2U,
+    0xcd4c81cdU, 0x0c14180cU, 0x13352613U, 0xec2fc3ecU,
+    0x5fe1be5fU, 0x97a23597U, 0x44cc8844U, 0x17392e17U,
+    0xc45793c4U, 0xa7f255a7U, 0x7e82fc7eU, 0x3d477a3dU,
+    0x64acc864U, 0x5de7ba5dU, 0x192b3219U, 0x7395e673U,
+    0x60a0c060U, 0x81981981U, 0x4fd19e4fU, 0xdc7fa3dcU,
+    0x22664422U, 0x2a7e542aU, 0x90ab3b90U, 0x88830b88U,
+    0x46ca8c46U, 0xee29c7eeU, 0xb8d36bb8U, 0x143c2814U,
+    0xde79a7deU, 0x5ee2bc5eU, 0x0b1d160bU, 0xdb76addbU,
+    0xe03bdbe0U, 0x32566432U, 0x3a4e743aU, 0x0a1e140aU,
+    0x49db9249U, 0x060a0c06U, 0x246c4824U, 0x5ce4b85cU,
+    0xc25d9fc2U, 0xd36ebdd3U, 0xacef43acU, 0x62a6c462U,
+    0x91a83991U, 0x95a43195U, 0xe437d3e4U, 0x798bf279U,
+    0xe732d5e7U, 0xc8438bc8U, 0x37596e37U, 0x6db7da6dU,
+    0x8d8c018dU, 0xd564b1d5U, 0x4ed29c4eU, 0xa9e049a9U,
+    0x6cb4d86cU, 0x56faac56U, 0xf407f3f4U, 0xea25cfeaU,
+    0x65afca65U, 0x7a8ef47aU, 0xaee947aeU, 0x08181008U,
+    0xbad56fbaU, 0x7888f078U, 0x256f4a25U, 0x2e725c2eU,
+    0x1c24381cU, 0xa6f157a6U, 0xb4c773b4U, 0xc65197c6U,
+    0xe823cbe8U, 0xdd7ca1ddU, 0x749ce874U, 0x1f213e1fU,
+    0x4bdd964bU, 0xbddc61bdU, 0x8b860d8bU, 0x8a850f8aU,
+    0x7090e070U, 0x3e427c3eU, 0xb5c471b5U, 0x66aacc66U,
+    0x48d89048U, 0x03050603U, 0xf601f7f6U, 0x0e121c0eU,
+    0x61a3c261U, 0x355f6a35U, 0x57f9ae57U, 0xb9d069b9U,
+    0x86911786U, 0xc15899c1U, 0x1d273a1dU, 0x9eb9279eU,
+    0xe138d9e1U, 0xf813ebf8U, 0x98b32b98U, 0x11332211U,
+    0x69bbd269U, 0xd970a9d9U, 0x8e89078eU, 0x94a73394U,
+    0x9bb62d9bU, 0x1e223c1eU, 0x87921587U, 0xe920c9e9U,
+    0xce4987ceU, 0x55ffaa55U, 0x28785028U, 0xdf7aa5dfU,
+    0x8c8f038cU, 0xa1f859a1U, 0x89800989U, 0x0d171a0dU,
+    0xbfda65bfU, 0xe631d7e6U, 0x42c68442U, 0x68b8d068U,
+    0x41c38241U, 0x99b02999U, 0x2d775a2dU, 0x0f111e0fU,
+    0xb0cb7bb0U, 0x54fca854U, 0xbbd66dbbU, 0x163a2c16U,
+};
+static const u32 Te3[256] = {
+    0x6363a5c6U, 0x7c7c84f8U, 0x777799eeU, 0x7b7b8df6U,
+    0xf2f20dffU, 0x6b6bbdd6U, 0x6f6fb1deU, 0xc5c55491U,
+    0x30305060U, 0x01010302U, 0x6767a9ceU, 0x2b2b7d56U,
+    0xfefe19e7U, 0xd7d762b5U, 0xababe64dU, 0x76769aecU,
+    0xcaca458fU, 0x82829d1fU, 0xc9c94089U, 0x7d7d87faU,
+    0xfafa15efU, 0x5959ebb2U, 0x4747c98eU, 0xf0f00bfbU,
+    0xadadec41U, 0xd4d467b3U, 0xa2a2fd5fU, 0xafafea45U,
+    0x9c9cbf23U, 0xa4a4f753U, 0x727296e4U, 0xc0c05b9bU,
+    0xb7b7c275U, 0xfdfd1ce1U, 0x9393ae3dU, 0x26266a4cU,
+    0x36365a6cU, 0x3f3f417eU, 0xf7f702f5U, 0xcccc4f83U,
+    0x34345c68U, 0xa5a5f451U, 0xe5e534d1U, 0xf1f108f9U,
+    0x717193e2U, 0xd8d873abU, 0x31315362U, 0x15153f2aU,
+    0x04040c08U, 0xc7c75295U, 0x23236546U, 0xc3c35e9dU,
+    0x18182830U, 0x9696a137U, 0x05050f0aU, 0x9a9ab52fU,
+    0x0707090eU, 0x12123624U, 0x80809b1bU, 0xe2e23ddfU,
+    0xebeb26cdU, 0x2727694eU, 0xb2b2cd7fU, 0x75759feaU,
+    0x09091b12U, 0x83839e1dU, 0x2c2c7458U, 0x1a1a2e34U,
+    0x1b1b2d36U, 0x6e6eb2dcU, 0x5a5aeeb4U, 0xa0a0fb5bU,
+    0x5252f6a4U, 0x3b3b4d76U, 0xd6d661b7U, 0xb3b3ce7dU,
+    0x29297b52U, 0xe3e33eddU, 0x2f2f715eU, 0x84849713U,
+    0x5353f5a6U, 0xd1d168b9U, 0x00000000U, 0xeded2cc1U,
+    0x20206040U, 0xfcfc1fe3U, 0xb1b1c879U, 0x5b5bedb6U,
+    0x6a6abed4U, 0xcbcb468dU, 0xbebed967U, 0x39394b72U,
+    0x4a4ade94U, 0x4c4cd498U, 0x5858e8b0U, 0xcfcf4a85U,
+    0xd0d06bbbU, 0xefef2ac5U, 0xaaaae54fU, 0xfbfb16edU,
+    0x4343c586U, 0x4d4dd79aU, 0x33335566U, 0x85859411U,
+    0x4545cf8aU, 0xf9f910e9U, 0x02020604U, 0x7f7f81feU,
+    0x5050f0a0U, 0x3c3c4478U, 0x9f9fba25U, 0xa8a8e34bU,
+    0x5151f3a2U, 0xa3a3fe5dU, 0x4040c080U, 0x8f8f8a05U,
+    0x9292ad3fU, 0x9d9dbc21U, 0x38384870U, 0xf5f504f1U,
+    0xbcbcdf63U, 0xb6b6c177U, 0xdada75afU, 0x21216342U,
+    0x10103020U, 0xffff1ae5U, 0xf3f30efdU, 0xd2d26dbfU,
+    0xcdcd4c81U, 0x0c0c1418U, 0x13133526U, 0xecec2fc3U,
+    0x5f5fe1beU, 0x9797a235U, 0x4444cc88U, 0x1717392eU,
+    0xc4c45793U, 0xa7a7f255U, 0x7e7e82fcU, 0x3d3d477aU,
+    0x6464acc8U, 0x5d5de7baU, 0x19192b32U, 0x737395e6U,
+    0x6060a0c0U, 0x81819819U, 0x4f4fd19eU, 0xdcdc7fa3U,
+    0x22226644U, 0x2a2a7e54U, 0x9090ab3bU, 0x8888830bU,
+    0x4646ca8cU, 0xeeee29c7U, 0xb8b8d36bU, 0x14143c28U,
+    0xdede79a7U, 0x5e5ee2bcU, 0x0b0b1d16U, 0xdbdb76adU,
+    0xe0e03bdbU, 0x32325664U, 0x3a3a4e74U, 0x0a0a1e14U,
+    0x4949db92U, 0x06060a0cU, 0x24246c48U, 0x5c5ce4b8U,
+    0xc2c25d9fU, 0xd3d36ebdU, 0xacacef43U, 0x6262a6c4U,
+    0x9191a839U, 0x9595a431U, 0xe4e437d3U, 0x79798bf2U,
+    0xe7e732d5U, 0xc8c8438bU, 0x3737596eU, 0x6d6db7daU,
+    0x8d8d8c01U, 0xd5d564b1U, 0x4e4ed29cU, 0xa9a9e049U,
+    0x6c6cb4d8U, 0x5656faacU, 0xf4f407f3U, 0xeaea25cfU,
+    0x6565afcaU, 0x7a7a8ef4U, 0xaeaee947U, 0x08081810U,
+    0xbabad56fU, 0x787888f0U, 0x25256f4aU, 0x2e2e725cU,
+    0x1c1c2438U, 0xa6a6f157U, 0xb4b4c773U, 0xc6c65197U,
+    0xe8e823cbU, 0xdddd7ca1U, 0x74749ce8U, 0x1f1f213eU,
+    0x4b4bdd96U, 0xbdbddc61U, 0x8b8b860dU, 0x8a8a850fU,
+    0x707090e0U, 0x3e3e427cU, 0xb5b5c471U, 0x6666aaccU,
+    0x4848d890U, 0x03030506U, 0xf6f601f7U, 0x0e0e121cU,
+    0x6161a3c2U, 0x35355f6aU, 0x5757f9aeU, 0xb9b9d069U,
+    0x86869117U, 0xc1c15899U, 0x1d1d273aU, 0x9e9eb927U,
+    0xe1e138d9U, 0xf8f813ebU, 0x9898b32bU, 0x11113322U,
+    0x6969bbd2U, 0xd9d970a9U, 0x8e8e8907U, 0x9494a733U,
+    0x9b9bb62dU, 0x1e1e223cU, 0x87879215U, 0xe9e920c9U,
+    0xcece4987U, 0x5555ffaaU, 0x28287850U, 0xdfdf7aa5U,
+    0x8c8c8f03U, 0xa1a1f859U, 0x89898009U, 0x0d0d171aU,
+    0xbfbfda65U, 0xe6e631d7U, 0x4242c684U, 0x6868b8d0U,
+    0x4141c382U, 0x9999b029U, 0x2d2d775aU, 0x0f0f111eU,
+    0xb0b0cb7bU, 0x5454fca8U, 0xbbbbd66dU, 0x16163a2cU,
+};
+
+static const u32 Te4[256] = {
+    0x63636363U, 0x7c7c7c7cU, 0x77777777U, 0x7b7b7b7bU,
+    0xf2f2f2f2U, 0x6b6b6b6bU, 0x6f6f6f6fU, 0xc5c5c5c5U,
+    0x30303030U, 0x01010101U, 0x67676767U, 0x2b2b2b2bU,
+    0xfefefefeU, 0xd7d7d7d7U, 0xababababU, 0x76767676U,
+    0xcacacacaU, 0x82828282U, 0xc9c9c9c9U, 0x7d7d7d7dU,
+    0xfafafafaU, 0x59595959U, 0x47474747U, 0xf0f0f0f0U,
+    0xadadadadU, 0xd4d4d4d4U, 0xa2a2a2a2U, 0xafafafafU,
+    0x9c9c9c9cU, 0xa4a4a4a4U, 0x72727272U, 0xc0c0c0c0U,
+    0xb7b7b7b7U, 0xfdfdfdfdU, 0x93939393U, 0x26262626U,
+    0x36363636U, 0x3f3f3f3fU, 0xf7f7f7f7U, 0xccccccccU,
+    0x34343434U, 0xa5a5a5a5U, 0xe5e5e5e5U, 0xf1f1f1f1U,
+    0x71717171U, 0xd8d8d8d8U, 0x31313131U, 0x15151515U,
+    0x04040404U, 0xc7c7c7c7U, 0x23232323U, 0xc3c3c3c3U,
+    0x18181818U, 0x96969696U, 0x05050505U, 0x9a9a9a9aU,
+    0x07070707U, 0x12121212U, 0x80808080U, 0xe2e2e2e2U,
+    0xebebebebU, 0x27272727U, 0xb2b2b2b2U, 0x75757575U,
+    0x09090909U, 0x83838383U, 0x2c2c2c2cU, 0x1a1a1a1aU,
+    0x1b1b1b1bU, 0x6e6e6e6eU, 0x5a5a5a5aU, 0xa0a0a0a0U,
+    0x52525252U, 0x3b3b3b3bU, 0xd6d6d6d6U, 0xb3b3b3b3U,
+    0x29292929U, 0xe3e3e3e3U, 0x2f2f2f2fU, 0x84848484U,
+    0x53535353U, 0xd1d1d1d1U, 0x00000000U, 0xededededU,
+    0x20202020U, 0xfcfcfcfcU, 0xb1b1b1b1U, 0x5b5b5b5bU,
+    0x6a6a6a6aU, 0xcbcbcbcbU, 0xbebebebeU, 0x39393939U,
+    0x4a4a4a4aU, 0x4c4c4c4cU, 0x58585858U, 0xcfcfcfcfU,
+    0xd0d0d0d0U, 0xefefefefU, 0xaaaaaaaaU, 0xfbfbfbfbU,
+    0x43434343U, 0x4d4d4d4dU, 0x33333333U, 0x85858585U,
+    0x45454545U, 0xf9f9f9f9U, 0x02020202U, 0x7f7f7f7fU,
+    0x50505050U, 0x3c3c3c3cU, 0x9f9f9f9fU, 0xa8a8a8a8U,
+    0x51515151U, 0xa3a3a3a3U, 0x40404040U, 0x8f8f8f8fU,
+    0x92929292U, 0x9d9d9d9dU, 0x38383838U, 0xf5f5f5f5U,
+    0xbcbcbcbcU, 0xb6b6b6b6U, 0xdadadadaU, 0x21212121U,
+    0x10101010U, 0xffffffffU, 0xf3f3f3f3U, 0xd2d2d2d2U,
+    0xcdcdcdcdU, 0x0c0c0c0cU, 0x13131313U, 0xececececU,
+    0x5f5f5f5fU, 0x97979797U, 0x44444444U, 0x17171717U,
+    0xc4c4c4c4U, 0xa7a7a7a7U, 0x7e7e7e7eU, 0x3d3d3d3dU,
+    0x64646464U, 0x5d5d5d5dU, 0x19191919U, 0x73737373U,
+    0x60606060U, 0x81818181U, 0x4f4f4f4fU, 0xdcdcdcdcU,
+    0x22222222U, 0x2a2a2a2aU, 0x90909090U, 0x88888888U,
+    0x46464646U, 0xeeeeeeeeU, 0xb8b8b8b8U, 0x14141414U,
+    0xdedededeU, 0x5e5e5e5eU, 0x0b0b0b0bU, 0xdbdbdbdbU,
+    0xe0e0e0e0U, 0x32323232U, 0x3a3a3a3aU, 0x0a0a0a0aU,
+    0x49494949U, 0x06060606U, 0x24242424U, 0x5c5c5c5cU,
+    0xc2c2c2c2U, 0xd3d3d3d3U, 0xacacacacU, 0x62626262U,
+    0x91919191U, 0x95959595U, 0xe4e4e4e4U, 0x79797979U,
+    0xe7e7e7e7U, 0xc8c8c8c8U, 0x37373737U, 0x6d6d6d6dU,
+    0x8d8d8d8dU, 0xd5d5d5d5U, 0x4e4e4e4eU, 0xa9a9a9a9U,
+    0x6c6c6c6cU, 0x56565656U, 0xf4f4f4f4U, 0xeaeaeaeaU,
+    0x65656565U, 0x7a7a7a7aU, 0xaeaeaeaeU, 0x08080808U,
+    0xbabababaU, 0x78787878U, 0x25252525U, 0x2e2e2e2eU,
+    0x1c1c1c1cU, 0xa6a6a6a6U, 0xb4b4b4b4U, 0xc6c6c6c6U,
+    0xe8e8e8e8U, 0xddddddddU, 0x74747474U, 0x1f1f1f1fU,
+    0x4b4b4b4bU, 0xbdbdbdbdU, 0x8b8b8b8bU, 0x8a8a8a8aU,
+    0x70707070U, 0x3e3e3e3eU, 0xb5b5b5b5U, 0x66666666U,
+    0x48484848U, 0x03030303U, 0xf6f6f6f6U, 0x0e0e0e0eU,
+    0x61616161U, 0x35353535U, 0x57575757U, 0xb9b9b9b9U,
+    0x86868686U, 0xc1c1c1c1U, 0x1d1d1d1dU, 0x9e9e9e9eU,
+    0xe1e1e1e1U, 0xf8f8f8f8U, 0x98989898U, 0x11111111U,
+    0x69696969U, 0xd9d9d9d9U, 0x8e8e8e8eU, 0x94949494U,
+    0x9b9b9b9bU, 0x1e1e1e1eU, 0x87878787U, 0xe9e9e9e9U,
+    0xcecececeU, 0x55555555U, 0x28282828U, 0xdfdfdfdfU,
+    0x8c8c8c8cU, 0xa1a1a1a1U, 0x89898989U, 0x0d0d0d0dU,
+    0xbfbfbfbfU, 0xe6e6e6e6U, 0x42424242U, 0x68686868U,
+    0x41414141U, 0x99999999U, 0x2d2d2d2dU, 0x0f0f0f0fU,
+    0xb0b0b0b0U, 0x54545454U, 0xbbbbbbbbU, 0x16161616U,
+};
+
+static const u32 Td0[256] = {
+    0x51f4a750U, 0x7e416553U, 0x1a17a4c3U, 0x3a275e96U,
+    0x3bab6bcbU, 0x1f9d45f1U, 0xacfa58abU, 0x4be30393U,
+    0x2030fa55U, 0xad766df6U, 0x88cc7691U, 0xf5024c25U,
+    0x4fe5d7fcU, 0xc52acbd7U, 0x26354480U, 0xb562a38fU,
+    0xdeb15a49U, 0x25ba1b67U, 0x45ea0e98U, 0x5dfec0e1U,
+    0xc32f7502U, 0x814cf012U, 0x8d4697a3U, 0x6bd3f9c6U,
+    0x038f5fe7U, 0x15929c95U, 0xbf6d7aebU, 0x955259daU,
+    0xd4be832dU, 0x587421d3U, 0x49e06929U, 0x8ec9c844U,
+    0x75c2896aU, 0xf48e7978U, 0x99583e6bU, 0x27b971ddU,
+    0xbee14fb6U, 0xf088ad17U, 0xc920ac66U, 0x7dce3ab4U,
+    0x63df4a18U, 0xe51a3182U, 0x97513360U, 0x62537f45U,
+    0xb16477e0U, 0xbb6bae84U, 0xfe81a01cU, 0xf9082b94U,
+    0x70486858U, 0x8f45fd19U, 0x94de6c87U, 0x527bf8b7U,
+    0xab73d323U, 0x724b02e2U, 0xe31f8f57U, 0x6655ab2aU,
+    0xb2eb2807U, 0x2fb5c203U, 0x86c57b9aU, 0xd33708a5U,
+    0x302887f2U, 0x23bfa5b2U, 0x02036abaU, 0xed16825cU,
+    0x8acf1c2bU, 0xa779b492U, 0xf307f2f0U, 0x4e69e2a1U,
+    0x65daf4cdU, 0x0605bed5U, 0xd134621fU, 0xc4a6fe8aU,
+    0x342e539dU, 0xa2f355a0U, 0x058ae132U, 0xa4f6eb75U,
+    0x0b83ec39U, 0x4060efaaU, 0x5e719f06U, 0xbd6e1051U,
+    0x3e218af9U, 0x96dd063dU, 0xdd3e05aeU, 0x4de6bd46U,
+    0x91548db5U, 0x71c45d05U, 0x0406d46fU, 0x605015ffU,
+    0x1998fb24U, 0xd6bde997U, 0x894043ccU, 0x67d99e77U,
+    0xb0e842bdU, 0x07898b88U, 0xe7195b38U, 0x79c8eedbU,
+    0xa17c0a47U, 0x7c420fe9U, 0xf8841ec9U, 0x00000000U,
+    0x09808683U, 0x322bed48U, 0x1e1170acU, 0x6c5a724eU,
+    0xfd0efffbU, 0x0f853856U, 0x3daed51eU, 0x362d3927U,
+    0x0a0fd964U, 0x685ca621U, 0x9b5b54d1U, 0x24362e3aU,
+    0x0c0a67b1U, 0x9357e70fU, 0xb4ee96d2U, 0x1b9b919eU,
+    0x80c0c54fU, 0x61dc20a2U, 0x5a774b69U, 0x1c121a16U,
+    0xe293ba0aU, 0xc0a02ae5U, 0x3c22e043U, 0x121b171dU,
+    0x0e090d0bU, 0xf28bc7adU, 0x2db6a8b9U, 0x141ea9c8U,
+    0x57f11985U, 0xaf75074cU, 0xee99ddbbU, 0xa37f60fdU,
+    0xf701269fU, 0x5c72f5bcU, 0x44663bc5U, 0x5bfb7e34U,
+    0x8b432976U, 0xcb23c6dcU, 0xb6edfc68U, 0xb8e4f163U,
+    0xd731dccaU, 0x42638510U, 0x13972240U, 0x84c61120U,
+    0x854a247dU, 0xd2bb3df8U, 0xaef93211U, 0xc729a16dU,
+    0x1d9e2f4bU, 0xdcb230f3U, 0x0d8652ecU, 0x77c1e3d0U,
+    0x2bb3166cU, 0xa970b999U, 0x119448faU, 0x47e96422U,
+    0xa8fc8cc4U, 0xa0f03f1aU, 0x567d2cd8U, 0x223390efU,
+    0x87494ec7U, 0xd938d1c1U, 0x8ccaa2feU, 0x98d40b36U,
+    0xa6f581cfU, 0xa57ade28U, 0xdab78e26U, 0x3fadbfa4U,
+    0x2c3a9de4U, 0x5078920dU, 0x6a5fcc9bU, 0x547e4662U,
+    0xf68d13c2U, 0x90d8b8e8U, 0x2e39f75eU, 0x82c3aff5U,
+    0x9f5d80beU, 0x69d0937cU, 0x6fd52da9U, 0xcf2512b3U,
+    0xc8ac993bU, 0x10187da7U, 0xe89c636eU, 0xdb3bbb7bU,
+    0xcd267809U, 0x6e5918f4U, 0xec9ab701U, 0x834f9aa8U,
+    0xe6956e65U, 0xaaffe67eU, 0x21bccf08U, 0xef15e8e6U,
+    0xbae79bd9U, 0x4a6f36ceU, 0xea9f09d4U, 0x29b07cd6U,
+    0x31a4b2afU, 0x2a3f2331U, 0xc6a59430U, 0x35a266c0U,
+    0x744ebc37U, 0xfc82caa6U, 0xe090d0b0U, 0x33a7d815U,
+    0xf104984aU, 0x41ecdaf7U, 0x7fcd500eU, 0x1791f62fU,
+    0x764dd68dU, 0x43efb04dU, 0xccaa4d54U, 0xe49604dfU,
+    0x9ed1b5e3U, 0x4c6a881bU, 0xc12c1fb8U, 0x4665517fU,
+    0x9d5eea04U, 0x018c355dU, 0xfa877473U, 0xfb0b412eU,
+    0xb3671d5aU, 0x92dbd252U, 0xe9105633U, 0x6dd64713U,
+    0x9ad7618cU, 0x37a10c7aU, 0x59f8148eU, 0xeb133c89U,
+    0xcea927eeU, 0xb761c935U, 0xe11ce5edU, 0x7a47b13cU,
+    0x9cd2df59U, 0x55f2733fU, 0x1814ce79U, 0x73c737bfU,
+    0x53f7cdeaU, 0x5ffdaa5bU, 0xdf3d6f14U, 0x7844db86U,
+    0xcaaff381U, 0xb968c43eU, 0x3824342cU, 0xc2a3405fU,
+    0x161dc372U, 0xbce2250cU, 0x283c498bU, 0xff0d9541U,
+    0x39a80171U, 0x080cb3deU, 0xd8b4e49cU, 0x6456c190U,
+    0x7bcb8461U, 0xd532b670U, 0x486c5c74U, 0xd0b85742U,
+};
+static const u32 Td1[256] = {
+    0x5051f4a7U, 0x537e4165U, 0xc31a17a4U, 0x963a275eU,
+    0xcb3bab6bU, 0xf11f9d45U, 0xabacfa58U, 0x934be303U,
+    0x552030faU, 0xf6ad766dU, 0x9188cc76U, 0x25f5024cU,
+    0xfc4fe5d7U, 0xd7c52acbU, 0x80263544U, 0x8fb562a3U,
+    0x49deb15aU, 0x6725ba1bU, 0x9845ea0eU, 0xe15dfec0U,
+    0x02c32f75U, 0x12814cf0U, 0xa38d4697U, 0xc66bd3f9U,
+    0xe7038f5fU, 0x9515929cU, 0xebbf6d7aU, 0xda955259U,
+    0x2dd4be83U, 0xd3587421U, 0x2949e069U, 0x448ec9c8U,
+    0x6a75c289U, 0x78f48e79U, 0x6b99583eU, 0xdd27b971U,
+    0xb6bee14fU, 0x17f088adU, 0x66c920acU, 0xb47dce3aU,
+    0x1863df4aU, 0x82e51a31U, 0x60975133U, 0x4562537fU,
+    0xe0b16477U, 0x84bb6baeU, 0x1cfe81a0U, 0x94f9082bU,
+    0x58704868U, 0x198f45fdU, 0x8794de6cU, 0xb7527bf8U,
+    0x23ab73d3U, 0xe2724b02U, 0x57e31f8fU, 0x2a6655abU,
+    0x07b2eb28U, 0x032fb5c2U, 0x9a86c57bU, 0xa5d33708U,
+    0xf2302887U, 0xb223bfa5U, 0xba02036aU, 0x5ced1682U,
+    0x2b8acf1cU, 0x92a779b4U, 0xf0f307f2U, 0xa14e69e2U,
+    0xcd65daf4U, 0xd50605beU, 0x1fd13462U, 0x8ac4a6feU,
+    0x9d342e53U, 0xa0a2f355U, 0x32058ae1U, 0x75a4f6ebU,
+    0x390b83ecU, 0xaa4060efU, 0x065e719fU, 0x51bd6e10U,
+    0xf93e218aU, 0x3d96dd06U, 0xaedd3e05U, 0x464de6bdU,
+    0xb591548dU, 0x0571c45dU, 0x6f0406d4U, 0xff605015U,
+    0x241998fbU, 0x97d6bde9U, 0xcc894043U, 0x7767d99eU,
+    0xbdb0e842U, 0x8807898bU, 0x38e7195bU, 0xdb79c8eeU,
+    0x47a17c0aU, 0xe97c420fU, 0xc9f8841eU, 0x00000000U,
+    0x83098086U, 0x48322bedU, 0xac1e1170U, 0x4e6c5a72U,
+    0xfbfd0effU, 0x560f8538U, 0x1e3daed5U, 0x27362d39U,
+    0x640a0fd9U, 0x21685ca6U, 0xd19b5b54U, 0x3a24362eU,
+    0xb10c0a67U, 0x0f9357e7U, 0xd2b4ee96U, 0x9e1b9b91U,
+    0x4f80c0c5U, 0xa261dc20U, 0x695a774bU, 0x161c121aU,
+    0x0ae293baU, 0xe5c0a02aU, 0x433c22e0U, 0x1d121b17U,
+    0x0b0e090dU, 0xadf28bc7U, 0xb92db6a8U, 0xc8141ea9U,
+    0x8557f119U, 0x4caf7507U, 0xbbee99ddU, 0xfda37f60U,
+    0x9ff70126U, 0xbc5c72f5U, 0xc544663bU, 0x345bfb7eU,
+    0x768b4329U, 0xdccb23c6U, 0x68b6edfcU, 0x63b8e4f1U,
+    0xcad731dcU, 0x10426385U, 0x40139722U, 0x2084c611U,
+    0x7d854a24U, 0xf8d2bb3dU, 0x11aef932U, 0x6dc729a1U,
+    0x4b1d9e2fU, 0xf3dcb230U, 0xec0d8652U, 0xd077c1e3U,
+    0x6c2bb316U, 0x99a970b9U, 0xfa119448U, 0x2247e964U,
+    0xc4a8fc8cU, 0x1aa0f03fU, 0xd8567d2cU, 0xef223390U,
+    0xc787494eU, 0xc1d938d1U, 0xfe8ccaa2U, 0x3698d40bU,
+    0xcfa6f581U, 0x28a57adeU, 0x26dab78eU, 0xa43fadbfU,
+    0xe42c3a9dU, 0x0d507892U, 0x9b6a5fccU, 0x62547e46U,
+    0xc2f68d13U, 0xe890d8b8U, 0x5e2e39f7U, 0xf582c3afU,
+    0xbe9f5d80U, 0x7c69d093U, 0xa96fd52dU, 0xb3cf2512U,
+    0x3bc8ac99U, 0xa710187dU, 0x6ee89c63U, 0x7bdb3bbbU,
+    0x09cd2678U, 0xf46e5918U, 0x01ec9ab7U, 0xa8834f9aU,
+    0x65e6956eU, 0x7eaaffe6U, 0x0821bccfU, 0xe6ef15e8U,
+    0xd9bae79bU, 0xce4a6f36U, 0xd4ea9f09U, 0xd629b07cU,
+    0xaf31a4b2U, 0x312a3f23U, 0x30c6a594U, 0xc035a266U,
+    0x37744ebcU, 0xa6fc82caU, 0xb0e090d0U, 0x1533a7d8U,
+    0x4af10498U, 0xf741ecdaU, 0x0e7fcd50U, 0x2f1791f6U,
+    0x8d764dd6U, 0x4d43efb0U, 0x54ccaa4dU, 0xdfe49604U,
+    0xe39ed1b5U, 0x1b4c6a88U, 0xb8c12c1fU, 0x7f466551U,
+    0x049d5eeaU, 0x5d018c35U, 0x73fa8774U, 0x2efb0b41U,
+    0x5ab3671dU, 0x5292dbd2U, 0x33e91056U, 0x136dd647U,
+    0x8c9ad761U, 0x7a37a10cU, 0x8e59f814U, 0x89eb133cU,
+    0xeecea927U, 0x35b761c9U, 0xede11ce5U, 0x3c7a47b1U,
+    0x599cd2dfU, 0x3f55f273U, 0x791814ceU, 0xbf73c737U,
+    0xea53f7cdU, 0x5b5ffdaaU, 0x14df3d6fU, 0x867844dbU,
+    0x81caaff3U, 0x3eb968c4U, 0x2c382434U, 0x5fc2a340U,
+    0x72161dc3U, 0x0cbce225U, 0x8b283c49U, 0x41ff0d95U,
+    0x7139a801U, 0xde080cb3U, 0x9cd8b4e4U, 0x906456c1U,
+    0x617bcb84U, 0x70d532b6U, 0x74486c5cU, 0x42d0b857U,
+};
+static const u32 Td2[256] = {
+    0xa75051f4U, 0x65537e41U, 0xa4c31a17U, 0x5e963a27U,
+    0x6bcb3babU, 0x45f11f9dU, 0x58abacfaU, 0x03934be3U,
+    0xfa552030U, 0x6df6ad76U, 0x769188ccU, 0x4c25f502U,
+    0xd7fc4fe5U, 0xcbd7c52aU, 0x44802635U, 0xa38fb562U,
+    0x5a49deb1U, 0x1b6725baU, 0x0e9845eaU, 0xc0e15dfeU,
+    0x7502c32fU, 0xf012814cU, 0x97a38d46U, 0xf9c66bd3U,
+    0x5fe7038fU, 0x9c951592U, 0x7aebbf6dU, 0x59da9552U,
+    0x832dd4beU, 0x21d35874U, 0x692949e0U, 0xc8448ec9U,
+    0x896a75c2U, 0x7978f48eU, 0x3e6b9958U, 0x71dd27b9U,
+    0x4fb6bee1U, 0xad17f088U, 0xac66c920U, 0x3ab47dceU,
+    0x4a1863dfU, 0x3182e51aU, 0x33609751U, 0x7f456253U,
+    0x77e0b164U, 0xae84bb6bU, 0xa01cfe81U, 0x2b94f908U,
+    0x68587048U, 0xfd198f45U, 0x6c8794deU, 0xf8b7527bU,
+    0xd323ab73U, 0x02e2724bU, 0x8f57e31fU, 0xab2a6655U,
+    0x2807b2ebU, 0xc2032fb5U, 0x7b9a86c5U, 0x08a5d337U,
+    0x87f23028U, 0xa5b223bfU, 0x6aba0203U, 0x825ced16U,
+    0x1c2b8acfU, 0xb492a779U, 0xf2f0f307U, 0xe2a14e69U,
+    0xf4cd65daU, 0xbed50605U, 0x621fd134U, 0xfe8ac4a6U,
+    0x539d342eU, 0x55a0a2f3U, 0xe132058aU, 0xeb75a4f6U,
+    0xec390b83U, 0xefaa4060U, 0x9f065e71U, 0x1051bd6eU,
+    0x8af93e21U, 0x063d96ddU, 0x05aedd3eU, 0xbd464de6U,
+    0x8db59154U, 0x5d0571c4U, 0xd46f0406U, 0x15ff6050U,
+    0xfb241998U, 0xe997d6bdU, 0x43cc8940U, 0x9e7767d9U,
+    0x42bdb0e8U, 0x8b880789U, 0x5b38e719U, 0xeedb79c8U,
+    0x0a47a17cU, 0x0fe97c42U, 0x1ec9f884U, 0x00000000U,
+    0x86830980U, 0xed48322bU, 0x70ac1e11U, 0x724e6c5aU,
+    0xfffbfd0eU, 0x38560f85U, 0xd51e3daeU, 0x3927362dU,
+    0xd9640a0fU, 0xa621685cU, 0x54d19b5bU, 0x2e3a2436U,
+    0x67b10c0aU, 0xe70f9357U, 0x96d2b4eeU, 0x919e1b9bU,
+    0xc54f80c0U, 0x20a261dcU, 0x4b695a77U, 0x1a161c12U,
+    0xba0ae293U, 0x2ae5c0a0U, 0xe0433c22U, 0x171d121bU,
+    0x0d0b0e09U, 0xc7adf28bU, 0xa8b92db6U, 0xa9c8141eU,
+    0x198557f1U, 0x074caf75U, 0xddbbee99U, 0x60fda37fU,
+    0x269ff701U, 0xf5bc5c72U, 0x3bc54466U, 0x7e345bfbU,
+    0x29768b43U, 0xc6dccb23U, 0xfc68b6edU, 0xf163b8e4U,
+    0xdccad731U, 0x85104263U, 0x22401397U, 0x112084c6U,
+    0x247d854aU, 0x3df8d2bbU, 0x3211aef9U, 0xa16dc729U,
+    0x2f4b1d9eU, 0x30f3dcb2U, 0x52ec0d86U, 0xe3d077c1U,
+    0x166c2bb3U, 0xb999a970U, 0x48fa1194U, 0x642247e9U,
+    0x8cc4a8fcU, 0x3f1aa0f0U, 0x2cd8567dU, 0x90ef2233U,
+    0x4ec78749U, 0xd1c1d938U, 0xa2fe8ccaU, 0x0b3698d4U,
+    0x81cfa6f5U, 0xde28a57aU, 0x8e26dab7U, 0xbfa43fadU,
+    0x9de42c3aU, 0x920d5078U, 0xcc9b6a5fU, 0x4662547eU,
+    0x13c2f68dU, 0xb8e890d8U, 0xf75e2e39U, 0xaff582c3U,
+    0x80be9f5dU, 0x937c69d0U, 0x2da96fd5U, 0x12b3cf25U,
+    0x993bc8acU, 0x7da71018U, 0x636ee89cU, 0xbb7bdb3bU,
+    0x7809cd26U, 0x18f46e59U, 0xb701ec9aU, 0x9aa8834fU,
+    0x6e65e695U, 0xe67eaaffU, 0xcf0821bcU, 0xe8e6ef15U,
+    0x9bd9bae7U, 0x36ce4a6fU, 0x09d4ea9fU, 0x7cd629b0U,
+    0xb2af31a4U, 0x23312a3fU, 0x9430c6a5U, 0x66c035a2U,
+    0xbc37744eU, 0xcaa6fc82U, 0xd0b0e090U, 0xd81533a7U,
+    0x984af104U, 0xdaf741ecU, 0x500e7fcdU, 0xf62f1791U,
+    0xd68d764dU, 0xb04d43efU, 0x4d54ccaaU, 0x04dfe496U,
+    0xb5e39ed1U, 0x881b4c6aU, 0x1fb8c12cU, 0x517f4665U,
+    0xea049d5eU, 0x355d018cU, 0x7473fa87U, 0x412efb0bU,
+    0x1d5ab367U, 0xd25292dbU, 0x5633e910U, 0x47136dd6U,
+    0x618c9ad7U, 0x0c7a37a1U, 0x148e59f8U, 0x3c89eb13U,
+    0x27eecea9U, 0xc935b761U, 0xe5ede11cU, 0xb13c7a47U,
+    0xdf599cd2U, 0x733f55f2U, 0xce791814U, 0x37bf73c7U,
+    0xcdea53f7U, 0xaa5b5ffdU, 0x6f14df3dU, 0xdb867844U,
+    0xf381caafU, 0xc43eb968U, 0x342c3824U, 0x405fc2a3U,
+    0xc372161dU, 0x250cbce2U, 0x498b283cU, 0x9541ff0dU,
+    0x017139a8U, 0xb3de080cU, 0xe49cd8b4U, 0xc1906456U,
+    0x84617bcbU, 0xb670d532U, 0x5c74486cU, 0x5742d0b8U,
+};
+static const u32 Td3[256] = {
+    0xf4a75051U, 0x4165537eU, 0x17a4c31aU, 0x275e963aU,
+    0xab6bcb3bU, 0x9d45f11fU, 0xfa58abacU, 0xe303934bU,
+    0x30fa5520U, 0x766df6adU, 0xcc769188U, 0x024c25f5U,
+    0xe5d7fc4fU, 0x2acbd7c5U, 0x35448026U, 0x62a38fb5U,
+    0xb15a49deU, 0xba1b6725U, 0xea0e9845U, 0xfec0e15dU,
+    0x2f7502c3U, 0x4cf01281U, 0x4697a38dU, 0xd3f9c66bU,
+    0x8f5fe703U, 0x929c9515U, 0x6d7aebbfU, 0x5259da95U,
+    0xbe832dd4U, 0x7421d358U, 0xe0692949U, 0xc9c8448eU,
+    0xc2896a75U, 0x8e7978f4U, 0x583e6b99U, 0xb971dd27U,
+    0xe14fb6beU, 0x88ad17f0U, 0x20ac66c9U, 0xce3ab47dU,
+    0xdf4a1863U, 0x1a3182e5U, 0x51336097U, 0x537f4562U,
+    0x6477e0b1U, 0x6bae84bbU, 0x81a01cfeU, 0x082b94f9U,
+    0x48685870U, 0x45fd198fU, 0xde6c8794U, 0x7bf8b752U,
+    0x73d323abU, 0x4b02e272U, 0x1f8f57e3U, 0x55ab2a66U,
+    0xeb2807b2U, 0xb5c2032fU, 0xc57b9a86U, 0x3708a5d3U,
+    0x2887f230U, 0xbfa5b223U, 0x036aba02U, 0x16825cedU,
+    0xcf1c2b8aU, 0x79b492a7U, 0x07f2f0f3U, 0x69e2a14eU,
+    0xdaf4cd65U, 0x05bed506U, 0x34621fd1U, 0xa6fe8ac4U,
+    0x2e539d34U, 0xf355a0a2U, 0x8ae13205U, 0xf6eb75a4U,
+    0x83ec390bU, 0x60efaa40U, 0x719f065eU, 0x6e1051bdU,
+    0x218af93eU, 0xdd063d96U, 0x3e05aeddU, 0xe6bd464dU,
+    0x548db591U, 0xc45d0571U, 0x06d46f04U, 0x5015ff60U,
+    0x98fb2419U, 0xbde997d6U, 0x4043cc89U, 0xd99e7767U,
+    0xe842bdb0U, 0x898b8807U, 0x195b38e7U, 0xc8eedb79U,
+    0x7c0a47a1U, 0x420fe97cU, 0x841ec9f8U, 0x00000000U,
+    0x80868309U, 0x2bed4832U, 0x1170ac1eU, 0x5a724e6cU,
+    0x0efffbfdU, 0x8538560fU, 0xaed51e3dU, 0x2d392736U,
+    0x0fd9640aU, 0x5ca62168U, 0x5b54d19bU, 0x362e3a24U,
+    0x0a67b10cU, 0x57e70f93U, 0xee96d2b4U, 0x9b919e1bU,
+    0xc0c54f80U, 0xdc20a261U, 0x774b695aU, 0x121a161cU,
+    0x93ba0ae2U, 0xa02ae5c0U, 0x22e0433cU, 0x1b171d12U,
+    0x090d0b0eU, 0x8bc7adf2U, 0xb6a8b92dU, 0x1ea9c814U,
+    0xf1198557U, 0x75074cafU, 0x99ddbbeeU, 0x7f60fda3U,
+    0x01269ff7U, 0x72f5bc5cU, 0x663bc544U, 0xfb7e345bU,
+    0x4329768bU, 0x23c6dccbU, 0xedfc68b6U, 0xe4f163b8U,
+    0x31dccad7U, 0x63851042U, 0x97224013U, 0xc6112084U,
+    0x4a247d85U, 0xbb3df8d2U, 0xf93211aeU, 0x29a16dc7U,
+    0x9e2f4b1dU, 0xb230f3dcU, 0x8652ec0dU, 0xc1e3d077U,
+    0xb3166c2bU, 0x70b999a9U, 0x9448fa11U, 0xe9642247U,
+    0xfc8cc4a8U, 0xf03f1aa0U, 0x7d2cd856U, 0x3390ef22U,
+    0x494ec787U, 0x38d1c1d9U, 0xcaa2fe8cU, 0xd40b3698U,
+    0xf581cfa6U, 0x7ade28a5U, 0xb78e26daU, 0xadbfa43fU,
+    0x3a9de42cU, 0x78920d50U, 0x5fcc9b6aU, 0x7e466254U,
+    0x8d13c2f6U, 0xd8b8e890U, 0x39f75e2eU, 0xc3aff582U,
+    0x5d80be9fU, 0xd0937c69U, 0xd52da96fU, 0x2512b3cfU,
+    0xac993bc8U, 0x187da710U, 0x9c636ee8U, 0x3bbb7bdbU,
+    0x267809cdU, 0x5918f46eU, 0x9ab701ecU, 0x4f9aa883U,
+    0x956e65e6U, 0xffe67eaaU, 0xbccf0821U, 0x15e8e6efU,
+    0xe79bd9baU, 0x6f36ce4aU, 0x9f09d4eaU, 0xb07cd629U,
+    0xa4b2af31U, 0x3f23312aU, 0xa59430c6U, 0xa266c035U,
+    0x4ebc3774U, 0x82caa6fcU, 0x90d0b0e0U, 0xa7d81533U,
+    0x04984af1U, 0xecdaf741U, 0xcd500e7fU, 0x91f62f17U,
+    0x4dd68d76U, 0xefb04d43U, 0xaa4d54ccU, 0x9604dfe4U,
+    0xd1b5e39eU, 0x6a881b4cU, 0x2c1fb8c1U, 0x65517f46U,
+    0x5eea049dU, 0x8c355d01U, 0x877473faU, 0x0b412efbU,
+    0x671d5ab3U, 0xdbd25292U, 0x105633e9U, 0xd647136dU,
+    0xd7618c9aU, 0xa10c7a37U, 0xf8148e59U, 0x133c89ebU,
+    0xa927eeceU, 0x61c935b7U, 0x1ce5ede1U, 0x47b13c7aU,
+    0xd2df599cU, 0xf2733f55U, 0x14ce7918U, 0xc737bf73U,
+    0xf7cdea53U, 0xfdaa5b5fU, 0x3d6f14dfU, 0x44db8678U,
+    0xaff381caU, 0x68c43eb9U, 0x24342c38U, 0xa3405fc2U,
+    0x1dc37216U, 0xe2250cbcU, 0x3c498b28U, 0x0d9541ffU,
+    0xa8017139U, 0x0cb3de08U, 0xb4e49cd8U, 0x56c19064U,
+    0xcb84617bU, 0x32b670d5U, 0x6c5c7448U, 0xb85742d0U,
+};
+
+static const u32 Td4[256] = {
+    0x52525252U, 0x09090909U, 0x6a6a6a6aU, 0xd5d5d5d5U,
+    0x30303030U, 0x36363636U, 0xa5a5a5a5U, 0x38383838U,
+    0xbfbfbfbfU, 0x40404040U, 0xa3a3a3a3U, 0x9e9e9e9eU,
+    0x81818181U, 0xf3f3f3f3U, 0xd7d7d7d7U, 0xfbfbfbfbU,
+    0x7c7c7c7cU, 0xe3e3e3e3U, 0x39393939U, 0x82828282U,
+    0x9b9b9b9bU, 0x2f2f2f2fU, 0xffffffffU, 0x87878787U,
+    0x34343434U, 0x8e8e8e8eU, 0x43434343U, 0x44444444U,
+    0xc4c4c4c4U, 0xdedededeU, 0xe9e9e9e9U, 0xcbcbcbcbU,
+    0x54545454U, 0x7b7b7b7bU, 0x94949494U, 0x32323232U,
+    0xa6a6a6a6U, 0xc2c2c2c2U, 0x23232323U, 0x3d3d3d3dU,
+    0xeeeeeeeeU, 0x4c4c4c4cU, 0x95959595U, 0x0b0b0b0bU,
+    0x42424242U, 0xfafafafaU, 0xc3c3c3c3U, 0x4e4e4e4eU,
+    0x08080808U, 0x2e2e2e2eU, 0xa1a1a1a1U, 0x66666666U,
+    0x28282828U, 0xd9d9d9d9U, 0x24242424U, 0xb2b2b2b2U,
+    0x76767676U, 0x5b5b5b5bU, 0xa2a2a2a2U, 0x49494949U,
+    0x6d6d6d6dU, 0x8b8b8b8bU, 0xd1d1d1d1U, 0x25252525U,
+    0x72727272U, 0xf8f8f8f8U, 0xf6f6f6f6U, 0x64646464U,
+    0x86868686U, 0x68686868U, 0x98989898U, 0x16161616U,
+    0xd4d4d4d4U, 0xa4a4a4a4U, 0x5c5c5c5cU, 0xccccccccU,
+    0x5d5d5d5dU, 0x65656565U, 0xb6b6b6b6U, 0x92929292U,
+    0x6c6c6c6cU, 0x70707070U, 0x48484848U, 0x50505050U,
+    0xfdfdfdfdU, 0xededededU, 0xb9b9b9b9U, 0xdadadadaU,
+    0x5e5e5e5eU, 0x15151515U, 0x46464646U, 0x57575757U,
+    0xa7a7a7a7U, 0x8d8d8d8dU, 0x9d9d9d9dU, 0x84848484U,
+    0x90909090U, 0xd8d8d8d8U, 0xababababU, 0x00000000U,
+    0x8c8c8c8cU, 0xbcbcbcbcU, 0xd3d3d3d3U, 0x0a0a0a0aU,
+    0xf7f7f7f7U, 0xe4e4e4e4U, 0x58585858U, 0x05050505U,
+    0xb8b8b8b8U, 0xb3b3b3b3U, 0x45454545U, 0x06060606U,
+    0xd0d0d0d0U, 0x2c2c2c2cU, 0x1e1e1e1eU, 0x8f8f8f8fU,
+    0xcacacacaU, 0x3f3f3f3fU, 0x0f0f0f0fU, 0x02020202U,
+    0xc1c1c1c1U, 0xafafafafU, 0xbdbdbdbdU, 0x03030303U,
+    0x01010101U, 0x13131313U, 0x8a8a8a8aU, 0x6b6b6b6bU,
+    0x3a3a3a3aU, 0x91919191U, 0x11111111U, 0x41414141U,
+    0x4f4f4f4fU, 0x67676767U, 0xdcdcdcdcU, 0xeaeaeaeaU,
+    0x97979797U, 0xf2f2f2f2U, 0xcfcfcfcfU, 0xcecececeU,
+    0xf0f0f0f0U, 0xb4b4b4b4U, 0xe6e6e6e6U, 0x73737373U,
+    0x96969696U, 0xacacacacU, 0x74747474U, 0x22222222U,
+    0xe7e7e7e7U, 0xadadadadU, 0x35353535U, 0x85858585U,
+    0xe2e2e2e2U, 0xf9f9f9f9U, 0x37373737U, 0xe8e8e8e8U,
+    0x1c1c1c1cU, 0x75757575U, 0xdfdfdfdfU, 0x6e6e6e6eU,
+    0x47474747U, 0xf1f1f1f1U, 0x1a1a1a1aU, 0x71717171U,
+    0x1d1d1d1dU, 0x29292929U, 0xc5c5c5c5U, 0x89898989U,
+    0x6f6f6f6fU, 0xb7b7b7b7U, 0x62626262U, 0x0e0e0e0eU,
+    0xaaaaaaaaU, 0x18181818U, 0xbebebebeU, 0x1b1b1b1bU,
+    0xfcfcfcfcU, 0x56565656U, 0x3e3e3e3eU, 0x4b4b4b4bU,
+    0xc6c6c6c6U, 0xd2d2d2d2U, 0x79797979U, 0x20202020U,
+    0x9a9a9a9aU, 0xdbdbdbdbU, 0xc0c0c0c0U, 0xfefefefeU,
+    0x78787878U, 0xcdcdcdcdU, 0x5a5a5a5aU, 0xf4f4f4f4U,
+    0x1f1f1f1fU, 0xddddddddU, 0xa8a8a8a8U, 0x33333333U,
+    0x88888888U, 0x07070707U, 0xc7c7c7c7U, 0x31313131U,
+    0xb1b1b1b1U, 0x12121212U, 0x10101010U, 0x59595959U,
+    0x27272727U, 0x80808080U, 0xececececU, 0x5f5f5f5fU,
+    0x60606060U, 0x51515151U, 0x7f7f7f7fU, 0xa9a9a9a9U,
+    0x19191919U, 0xb5b5b5b5U, 0x4a4a4a4aU, 0x0d0d0d0dU,
+    0x2d2d2d2dU, 0xe5e5e5e5U, 0x7a7a7a7aU, 0x9f9f9f9fU,
+    0x93939393U, 0xc9c9c9c9U, 0x9c9c9c9cU, 0xefefefefU,
+    0xa0a0a0a0U, 0xe0e0e0e0U, 0x3b3b3b3bU, 0x4d4d4d4dU,
+    0xaeaeaeaeU, 0x2a2a2a2aU, 0xf5f5f5f5U, 0xb0b0b0b0U,
+    0xc8c8c8c8U, 0xebebebebU, 0xbbbbbbbbU, 0x3c3c3c3cU,
+    0x83838383U, 0x53535353U, 0x99999999U, 0x61616161U,
+    0x17171717U, 0x2b2b2b2bU, 0x04040404U, 0x7e7e7e7eU,
+    0xbabababaU, 0x77777777U, 0xd6d6d6d6U, 0x26262626U,
+    0xe1e1e1e1U, 0x69696969U, 0x14141414U, 0x63636363U,
+    0x55555555U, 0x21212121U, 0x0c0c0c0cU, 0x7d7d7d7dU,
+};
+
+static const u32 rcon[] = {
+	0x01000000, 0x02000000, 0x04000000, 0x08000000,
+	0x10000000, 0x20000000, 0x40000000, 0x80000000,
+	0x1B000000, 0x36000000, /* for 128-bit blocks, Rijndael never uses more than 10 rcon values */
+};
+
+/*
+ * Encrypt a single block
+ * in and out can overlap
+ */
+void evp_aes_encrypt(const unsigned char *in, unsigned char *out, const AES_KEY *key) 
+{
+
+	const u32 *rk;
+	u32 s0, s1, s2, s3, t0, t1, t2, t3;
+#ifndef FULL_UNROLL
+	int r;
+#endif /* ?FULL_UNROLL */
+
+	assert(in && out && key);
+	rk = key->rd_key;
+
+	/*
+	 * map byte array block to cipher state
+	 * and add initial round key:
+	 */
+	s0 = GETU32(in     ) ^ rk[0];
+	s1 = GETU32(in +  4) ^ rk[1];
+	s2 = GETU32(in +  8) ^ rk[2];
+	s3 = GETU32(in + 12) ^ rk[3];
+#ifdef FULL_UNROLL
+	/* round 1: */
+   	t0 = Te0[s0 >> 24] ^ Te1[(s1 >> 16) & 0xff] ^ Te2[(s2 >>  8) & 0xff] ^ Te3[s3 & 0xff] ^ rk[ 4];
+   	t1 = Te0[s1 >> 24] ^ Te1[(s2 >> 16) & 0xff] ^ Te2[(s3 >>  8) & 0xff] ^ Te3[s0 & 0xff] ^ rk[ 5];
+   	t2 = Te0[s2 >> 24] ^ Te1[(s3 >> 16) & 0xff] ^ Te2[(s0 >>  8) & 0xff] ^ Te3[s1 & 0xff] ^ rk[ 6];
+   	t3 = Te0[s3 >> 24] ^ Te1[(s0 >> 16) & 0xff] ^ Te2[(s1 >>  8) & 0xff] ^ Te3[s2 & 0xff] ^ rk[ 7];
+   	/* round 2: */
+   	s0 = Te0[t0 >> 24] ^ Te1[(t1 >> 16) & 0xff] ^ Te2[(t2 >>  8) & 0xff] ^ Te3[t3 & 0xff] ^ rk[ 8];
+   	s1 = Te0[t1 >> 24] ^ Te1[(t2 >> 16) & 0xff] ^ Te2[(t3 >>  8) & 0xff] ^ Te3[t0 & 0xff] ^ rk[ 9];
+   	s2 = Te0[t2 >> 24] ^ Te1[(t3 >> 16) & 0xff] ^ Te2[(t0 >>  8) & 0xff] ^ Te3[t1 & 0xff] ^ rk[10];
+   	s3 = Te0[t3 >> 24] ^ Te1[(t0 >> 16) & 0xff] ^ Te2[(t1 >>  8) & 0xff] ^ Te3[t2 & 0xff] ^ rk[11];
+	/* round 3: */
+   	t0 = Te0[s0 >> 24] ^ Te1[(s1 >> 16) & 0xff] ^ Te2[(s2 >>  8) & 0xff] ^ Te3[s3 & 0xff] ^ rk[12];
+   	t1 = Te0[s1 >> 24] ^ Te1[(s2 >> 16) & 0xff] ^ Te2[(s3 >>  8) & 0xff] ^ Te3[s0 & 0xff] ^ rk[13];
+   	t2 = Te0[s2 >> 24] ^ Te1[(s3 >> 16) & 0xff] ^ Te2[(s0 >>  8) & 0xff] ^ Te3[s1 & 0xff] ^ rk[14];
+   	t3 = Te0[s3 >> 24] ^ Te1[(s0 >> 16) & 0xff] ^ Te2[(s1 >>  8) & 0xff] ^ Te3[s2 & 0xff] ^ rk[15];
+   	/* round 4: */
+   	s0 = Te0[t0 >> 24] ^ Te1[(t1 >> 16) & 0xff] ^ Te2[(t2 >>  8) & 0xff] ^ Te3[t3 & 0xff] ^ rk[16];
+   	s1 = Te0[t1 >> 24] ^ Te1[(t2 >> 16) & 0xff] ^ Te2[(t3 >>  8) & 0xff] ^ Te3[t0 & 0xff] ^ rk[17];
+   	s2 = Te0[t2 >> 24] ^ Te1[(t3 >> 16) & 0xff] ^ Te2[(t0 >>  8) & 0xff] ^ Te3[t1 & 0xff] ^ rk[18];
+   	s3 = Te0[t3 >> 24] ^ Te1[(t0 >> 16) & 0xff] ^ Te2[(t1 >>  8) & 0xff] ^ Te3[t2 & 0xff] ^ rk[19];
+	/* round 5: */
+   	t0 = Te0[s0 >> 24] ^ Te1[(s1 >> 16) & 0xff] ^ Te2[(s2 >>  8) & 0xff] ^ Te3[s3 & 0xff] ^ rk[20];
+   	t1 = Te0[s1 >> 24] ^ Te1[(s2 >> 16) & 0xff] ^ Te2[(s3 >>  8) & 0xff] ^ Te3[s0 & 0xff] ^ rk[21];
+   	t2 = Te0[s2 >> 24] ^ Te1[(s3 >> 16) & 0xff] ^ Te2[(s0 >>  8) & 0xff] ^ Te3[s1 & 0xff] ^ rk[22];
+   	t3 = Te0[s3 >> 24] ^ Te1[(s0 >> 16) & 0xff] ^ Te2[(s1 >>  8) & 0xff] ^ Te3[s2 & 0xff] ^ rk[23];
+   	/* round 6: */
+   	s0 = Te0[t0 >> 24] ^ Te1[(t1 >> 16) & 0xff] ^ Te2[(t2 >>  8) & 0xff] ^ Te3[t3 & 0xff] ^ rk[24];
+   	s1 = Te0[t1 >> 24] ^ Te1[(t2 >> 16) & 0xff] ^ Te2[(t3 >>  8) & 0xff] ^ Te3[t0 & 0xff] ^ rk[25];
+   	s2 = Te0[t2 >> 24] ^ Te1[(t3 >> 16) & 0xff] ^ Te2[(t0 >>  8) & 0xff] ^ Te3[t1 & 0xff] ^ rk[26];
+   	s3 = Te0[t3 >> 24] ^ Te1[(t0 >> 16) & 0xff] ^ Te2[(t1 >>  8) & 0xff] ^ Te3[t2 & 0xff] ^ rk[27];
+	/* round 7: */
+   	t0 = Te0[s0 >> 24] ^ Te1[(s1 >> 16) & 0xff] ^ Te2[(s2 >>  8) & 0xff] ^ Te3[s3 & 0xff] ^ rk[28];
+   	t1 = Te0[s1 >> 24] ^ Te1[(s2 >> 16) & 0xff] ^ Te2[(s3 >>  8) & 0xff] ^ Te3[s0 & 0xff] ^ rk[29];
+   	t2 = Te0[s2 >> 24] ^ Te1[(s3 >> 16) & 0xff] ^ Te2[(s0 >>  8) & 0xff] ^ Te3[s1 & 0xff] ^ rk[30];
+   	t3 = Te0[s3 >> 24] ^ Te1[(s0 >> 16) & 0xff] ^ Te2[(s1 >>  8) & 0xff] ^ Te3[s2 & 0xff] ^ rk[31];
+   	/* round 8: */
+   	s0 = Te0[t0 >> 24] ^ Te1[(t1 >> 16) & 0xff] ^ Te2[(t2 >>  8) & 0xff] ^ Te3[t3 & 0xff] ^ rk[32];
+   	s1 = Te0[t1 >> 24] ^ Te1[(t2 >> 16) & 0xff] ^ Te2[(t3 >>  8) & 0xff] ^ Te3[t0 & 0xff] ^ rk[33];
+   	s2 = Te0[t2 >> 24] ^ Te1[(t3 >> 16) & 0xff] ^ Te2[(t0 >>  8) & 0xff] ^ Te3[t1 & 0xff] ^ rk[34];
+   	s3 = Te0[t3 >> 24] ^ Te1[(t0 >> 16) & 0xff] ^ Te2[(t1 >>  8) & 0xff] ^ Te3[t2 & 0xff] ^ rk[35];
+	/* round 9: */
+   	t0 = Te0[s0 >> 24] ^ Te1[(s1 >> 16) & 0xff] ^ Te2[(s2 >>  8) & 0xff] ^ Te3[s3 & 0xff] ^ rk[36];
+   	t1 = Te0[s1 >> 24] ^ Te1[(s2 >> 16) & 0xff] ^ Te2[(s3 >>  8) & 0xff] ^ Te3[s0 & 0xff] ^ rk[37];
+   	t2 = Te0[s2 >> 24] ^ Te1[(s3 >> 16) & 0xff] ^ Te2[(s0 >>  8) & 0xff] ^ Te3[s1 & 0xff] ^ rk[38];
+   	t3 = Te0[s3 >> 24] ^ Te1[(s0 >> 16) & 0xff] ^ Te2[(s1 >>  8) & 0xff] ^ Te3[s2 & 0xff] ^ rk[39];
+    if (key->rounds > 10) {
+        /* round 10: */
+        s0 = Te0[t0 >> 24] ^ Te1[(t1 >> 16) & 0xff] ^ Te2[(t2 >>  8) & 0xff] ^ Te3[t3 & 0xff] ^ rk[40];
+        s1 = Te0[t1 >> 24] ^ Te1[(t2 >> 16) & 0xff] ^ Te2[(t3 >>  8) & 0xff] ^ Te3[t0 & 0xff] ^ rk[41];
+        s2 = Te0[t2 >> 24] ^ Te1[(t3 >> 16) & 0xff] ^ Te2[(t0 >>  8) & 0xff] ^ Te3[t1 & 0xff] ^ rk[42];
+        s3 = Te0[t3 >> 24] ^ Te1[(t0 >> 16) & 0xff] ^ Te2[(t1 >>  8) & 0xff] ^ Te3[t2 & 0xff] ^ rk[43];
+        /* round 11: */
+        t0 = Te0[s0 >> 24] ^ Te1[(s1 >> 16) & 0xff] ^ Te2[(s2 >>  8) & 0xff] ^ Te3[s3 & 0xff] ^ rk[44];
+        t1 = Te0[s1 >> 24] ^ Te1[(s2 >> 16) & 0xff] ^ Te2[(s3 >>  8) & 0xff] ^ Te3[s0 & 0xff] ^ rk[45];
+        t2 = Te0[s2 >> 24] ^ Te1[(s3 >> 16) & 0xff] ^ Te2[(s0 >>  8) & 0xff] ^ Te3[s1 & 0xff] ^ rk[46];
+        t3 = Te0[s3 >> 24] ^ Te1[(s0 >> 16) & 0xff] ^ Te2[(s1 >>  8) & 0xff] ^ Te3[s2 & 0xff] ^ rk[47];
+        if (key->rounds > 12) {
+            /* round 12: */
+            s0 = Te0[t0 >> 24] ^ Te1[(t1 >> 16) & 0xff] ^ Te2[(t2 >>  8) & 0xff] ^ Te3[t3 & 0xff] ^ rk[48];
+            s1 = Te0[t1 >> 24] ^ Te1[(t2 >> 16) & 0xff] ^ Te2[(t3 >>  8) & 0xff] ^ Te3[t0 & 0xff] ^ rk[49];
+            s2 = Te0[t2 >> 24] ^ Te1[(t3 >> 16) & 0xff] ^ Te2[(t0 >>  8) & 0xff] ^ Te3[t1 & 0xff] ^ rk[50];
+            s3 = Te0[t3 >> 24] ^ Te1[(t0 >> 16) & 0xff] ^ Te2[(t1 >>  8) & 0xff] ^ Te3[t2 & 0xff] ^ rk[51];
+            /* round 13: */
+            t0 = Te0[s0 >> 24] ^ Te1[(s1 >> 16) & 0xff] ^ Te2[(s2 >>  8) & 0xff] ^ Te3[s3 & 0xff] ^ rk[52];
+            t1 = Te0[s1 >> 24] ^ Te1[(s2 >> 16) & 0xff] ^ Te2[(s3 >>  8) & 0xff] ^ Te3[s0 & 0xff] ^ rk[53];
+            t2 = Te0[s2 >> 24] ^ Te1[(s3 >> 16) & 0xff] ^ Te2[(s0 >>  8) & 0xff] ^ Te3[s1 & 0xff] ^ rk[54];
+            t3 = Te0[s3 >> 24] ^ Te1[(s0 >> 16) & 0xff] ^ Te2[(s1 >>  8) & 0xff] ^ Te3[s2 & 0xff] ^ rk[55];
+        }
+    }
+    rk += key->rounds << 2;
+#else  /* !FULL_UNROLL */
+    /*
+     * Nr - 1 full rounds:
+     */
+    r = key->rounds >> 1;
+    for (;;) {
+        t0 =
+            Te0[(s0 >> 24)       ] ^
+            Te1[(s1 >> 16) & 0xff] ^
+            Te2[(s2 >>  8) & 0xff] ^
+            Te3[(s3      ) & 0xff] ^
+            rk[4];
+        t1 =
+            Te0[(s1 >> 24)       ] ^
+            Te1[(s2 >> 16) & 0xff] ^
+            Te2[(s3 >>  8) & 0xff] ^
+            Te3[(s0      ) & 0xff] ^
+            rk[5];
+        t2 =
+            Te0[(s2 >> 24)       ] ^
+            Te1[(s3 >> 16) & 0xff] ^
+            Te2[(s0 >>  8) & 0xff] ^
+            Te3[(s1      ) & 0xff] ^
+            rk[6];
+        t3 =
+            Te0[(s3 >> 24)       ] ^
+            Te1[(s0 >> 16) & 0xff] ^
+            Te2[(s1 >>  8) & 0xff] ^
+            Te3[(s2      ) & 0xff] ^
+            rk[7];
+
+        rk += 8;
+        if (--r == 0) {
+            break;
+        }
+
+        s0 =
+            Te0[(t0 >> 24)       ] ^
+            Te1[(t1 >> 16) & 0xff] ^
+            Te2[(t2 >>  8) & 0xff] ^
+            Te3[(t3      ) & 0xff] ^
+            rk[0];
+        s1 =
+            Te0[(t1 >> 24)       ] ^
+            Te1[(t2 >> 16) & 0xff] ^
+            Te2[(t3 >>  8) & 0xff] ^
+            Te3[(t0      ) & 0xff] ^
+            rk[1];
+        s2 =
+            Te0[(t2 >> 24)       ] ^
+            Te1[(t3 >> 16) & 0xff] ^
+            Te2[(t0 >>  8) & 0xff] ^
+            Te3[(t1      ) & 0xff] ^
+            rk[2];
+        s3 =
+            Te0[(t3 >> 24)       ] ^
+            Te1[(t0 >> 16) & 0xff] ^
+            Te2[(t1 >>  8) & 0xff] ^
+            Te3[(t2      ) & 0xff] ^
+            rk[3];
+    }
+#endif /* ?FULL_UNROLL */
+    /*
+	 * apply last round and
+	 * map cipher state to byte array block:
+	 */
+	s0 =
+		(Te4[(t0 >> 24)       ] & 0xff000000) ^
+		(Te4[(t1 >> 16) & 0xff] & 0x00ff0000) ^
+		(Te4[(t2 >>  8) & 0xff] & 0x0000ff00) ^
+		(Te4[(t3      ) & 0xff] & 0x000000ff) ^
+		rk[0];
+	PUTU32(out     , s0);
+	s1 =
+		(Te4[(t1 >> 24)       ] & 0xff000000) ^
+		(Te4[(t2 >> 16) & 0xff] & 0x00ff0000) ^
+		(Te4[(t3 >>  8) & 0xff] & 0x0000ff00) ^
+		(Te4[(t0      ) & 0xff] & 0x000000ff) ^
+		rk[1];
+	PUTU32(out +  4, s1);
+	s2 =
+		(Te4[(t2 >> 24)       ] & 0xff000000) ^
+		(Te4[(t3 >> 16) & 0xff] & 0x00ff0000) ^
+		(Te4[(t0 >>  8) & 0xff] & 0x0000ff00) ^
+		(Te4[(t1      ) & 0xff] & 0x000000ff) ^
+		rk[2];
+	PUTU32(out +  8, s2);
+	s3 =
+		(Te4[(t3 >> 24)       ] & 0xff000000) ^
+		(Te4[(t0 >> 16) & 0xff] & 0x00ff0000) ^
+		(Te4[(t1 >>  8) & 0xff] & 0x0000ff00) ^
+		(Te4[(t2      ) & 0xff] & 0x000000ff) ^
+		rk[3];
+	PUTU32(out + 12, s3);
+}
+
+/*
+ * Decrypt a single block
+ * in and out can overlap
+ */
+void evp_aes_decrypt(const unsigned char *in, unsigned char *out, const AES_KEY *key) 
+{
+
+	const u32 *rk;
+	u32 s0, s1, s2, s3, t0, t1, t2, t3;
+#ifndef FULL_UNROLL
+	int r;
+#endif /* ?FULL_UNROLL */
+
+	assert(in && out && key);
+	rk = key->rd_key;
+
+	/*
+	 * map byte array block to cipher state
+	 * and add initial round key:
+	 */
+    s0 = GETU32(in     ) ^ rk[0];
+    s1 = GETU32(in +  4) ^ rk[1];
+    s2 = GETU32(in +  8) ^ rk[2];
+    s3 = GETU32(in + 12) ^ rk[3];
+#ifdef FULL_UNROLL
+    /* round 1: */
+    t0 = Td0[s0 >> 24] ^ Td1[(s3 >> 16) & 0xff] ^ Td2[(s2 >>  8) & 0xff] ^ Td3[s1 & 0xff] ^ rk[ 4];
+    t1 = Td0[s1 >> 24] ^ Td1[(s0 >> 16) & 0xff] ^ Td2[(s3 >>  8) & 0xff] ^ Td3[s2 & 0xff] ^ rk[ 5];
+    t2 = Td0[s2 >> 24] ^ Td1[(s1 >> 16) & 0xff] ^ Td2[(s0 >>  8) & 0xff] ^ Td3[s3 & 0xff] ^ rk[ 6];
+    t3 = Td0[s3 >> 24] ^ Td1[(s2 >> 16) & 0xff] ^ Td2[(s1 >>  8) & 0xff] ^ Td3[s0 & 0xff] ^ rk[ 7];
+    /* round 2: */
+    s0 = Td0[t0 >> 24] ^ Td1[(t3 >> 16) & 0xff] ^ Td2[(t2 >>  8) & 0xff] ^ Td3[t1 & 0xff] ^ rk[ 8];
+    s1 = Td0[t1 >> 24] ^ Td1[(t0 >> 16) & 0xff] ^ Td2[(t3 >>  8) & 0xff] ^ Td3[t2 & 0xff] ^ rk[ 9];
+    s2 = Td0[t2 >> 24] ^ Td1[(t1 >> 16) & 0xff] ^ Td2[(t0 >>  8) & 0xff] ^ Td3[t3 & 0xff] ^ rk[10];
+    s3 = Td0[t3 >> 24] ^ Td1[(t2 >> 16) & 0xff] ^ Td2[(t1 >>  8) & 0xff] ^ Td3[t0 & 0xff] ^ rk[11];
+    /* round 3: */
+    t0 = Td0[s0 >> 24] ^ Td1[(s3 >> 16) & 0xff] ^ Td2[(s2 >>  8) & 0xff] ^ Td3[s1 & 0xff] ^ rk[12];
+    t1 = Td0[s1 >> 24] ^ Td1[(s0 >> 16) & 0xff] ^ Td2[(s3 >>  8) & 0xff] ^ Td3[s2 & 0xff] ^ rk[13];
+    t2 = Td0[s2 >> 24] ^ Td1[(s1 >> 16) & 0xff] ^ Td2[(s0 >>  8) & 0xff] ^ Td3[s3 & 0xff] ^ rk[14];
+    t3 = Td0[s3 >> 24] ^ Td1[(s2 >> 16) & 0xff] ^ Td2[(s1 >>  8) & 0xff] ^ Td3[s0 & 0xff] ^ rk[15];
+    /* round 4: */
+    s0 = Td0[t0 >> 24] ^ Td1[(t3 >> 16) & 0xff] ^ Td2[(t2 >>  8) & 0xff] ^ Td3[t1 & 0xff] ^ rk[16];
+    s1 = Td0[t1 >> 24] ^ Td1[(t0 >> 16) & 0xff] ^ Td2[(t3 >>  8) & 0xff] ^ Td3[t2 & 0xff] ^ rk[17];
+    s2 = Td0[t2 >> 24] ^ Td1[(t1 >> 16) & 0xff] ^ Td2[(t0 >>  8) & 0xff] ^ Td3[t3 & 0xff] ^ rk[18];
+    s3 = Td0[t3 >> 24] ^ Td1[(t2 >> 16) & 0xff] ^ Td2[(t1 >>  8) & 0xff] ^ Td3[t0 & 0xff] ^ rk[19];
+    /* round 5: */
+    t0 = Td0[s0 >> 24] ^ Td1[(s3 >> 16) & 0xff] ^ Td2[(s2 >>  8) & 0xff] ^ Td3[s1 & 0xff] ^ rk[20];
+    t1 = Td0[s1 >> 24] ^ Td1[(s0 >> 16) & 0xff] ^ Td2[(s3 >>  8) & 0xff] ^ Td3[s2 & 0xff] ^ rk[21];
+    t2 = Td0[s2 >> 24] ^ Td1[(s1 >> 16) & 0xff] ^ Td2[(s0 >>  8) & 0xff] ^ Td3[s3 & 0xff] ^ rk[22];
+    t3 = Td0[s3 >> 24] ^ Td1[(s2 >> 16) & 0xff] ^ Td2[(s1 >>  8) & 0xff] ^ Td3[s0 & 0xff] ^ rk[23];
+    /* round 6: */
+    s0 = Td0[t0 >> 24] ^ Td1[(t3 >> 16) & 0xff] ^ Td2[(t2 >>  8) & 0xff] ^ Td3[t1 & 0xff] ^ rk[24];
+    s1 = Td0[t1 >> 24] ^ Td1[(t0 >> 16) & 0xff] ^ Td2[(t3 >>  8) & 0xff] ^ Td3[t2 & 0xff] ^ rk[25];
+    s2 = Td0[t2 >> 24] ^ Td1[(t1 >> 16) & 0xff] ^ Td2[(t0 >>  8) & 0xff] ^ Td3[t3 & 0xff] ^ rk[26];
+    s3 = Td0[t3 >> 24] ^ Td1[(t2 >> 16) & 0xff] ^ Td2[(t1 >>  8) & 0xff] ^ Td3[t0 & 0xff] ^ rk[27];
+    /* round 7: */
+    t0 = Td0[s0 >> 24] ^ Td1[(s3 >> 16) & 0xff] ^ Td2[(s2 >>  8) & 0xff] ^ Td3[s1 & 0xff] ^ rk[28];
+    t1 = Td0[s1 >> 24] ^ Td1[(s0 >> 16) & 0xff] ^ Td2[(s3 >>  8) & 0xff] ^ Td3[s2 & 0xff] ^ rk[29];
+    t2 = Td0[s2 >> 24] ^ Td1[(s1 >> 16) & 0xff] ^ Td2[(s0 >>  8) & 0xff] ^ Td3[s3 & 0xff] ^ rk[30];
+    t3 = Td0[s3 >> 24] ^ Td1[(s2 >> 16) & 0xff] ^ Td2[(s1 >>  8) & 0xff] ^ Td3[s0 & 0xff] ^ rk[31];
+    /* round 8: */
+    s0 = Td0[t0 >> 24] ^ Td1[(t3 >> 16) & 0xff] ^ Td2[(t2 >>  8) & 0xff] ^ Td3[t1 & 0xff] ^ rk[32];
+    s1 = Td0[t1 >> 24] ^ Td1[(t0 >> 16) & 0xff] ^ Td2[(t3 >>  8) & 0xff] ^ Td3[t2 & 0xff] ^ rk[33];
+    s2 = Td0[t2 >> 24] ^ Td1[(t1 >> 16) & 0xff] ^ Td2[(t0 >>  8) & 0xff] ^ Td3[t3 & 0xff] ^ rk[34];
+    s3 = Td0[t3 >> 24] ^ Td1[(t2 >> 16) & 0xff] ^ Td2[(t1 >>  8) & 0xff] ^ Td3[t0 & 0xff] ^ rk[35];
+    /* round 9: */
+    t0 = Td0[s0 >> 24] ^ Td1[(s3 >> 16) & 0xff] ^ Td2[(s2 >>  8) & 0xff] ^ Td3[s1 & 0xff] ^ rk[36];
+    t1 = Td0[s1 >> 24] ^ Td1[(s0 >> 16) & 0xff] ^ Td2[(s3 >>  8) & 0xff] ^ Td3[s2 & 0xff] ^ rk[37];
+    t2 = Td0[s2 >> 24] ^ Td1[(s1 >> 16) & 0xff] ^ Td2[(s0 >>  8) & 0xff] ^ Td3[s3 & 0xff] ^ rk[38];
+    t3 = Td0[s3 >> 24] ^ Td1[(s2 >> 16) & 0xff] ^ Td2[(s1 >>  8) & 0xff] ^ Td3[s0 & 0xff] ^ rk[39];
+    if (key->rounds > 10) {
+        /* round 10: */
+        s0 = Td0[t0 >> 24] ^ Td1[(t3 >> 16) & 0xff] ^ Td2[(t2 >>  8) & 0xff] ^ Td3[t1 & 0xff] ^ rk[40];
+        s1 = Td0[t1 >> 24] ^ Td1[(t0 >> 16) & 0xff] ^ Td2[(t3 >>  8) & 0xff] ^ Td3[t2 & 0xff] ^ rk[41];
+        s2 = Td0[t2 >> 24] ^ Td1[(t1 >> 16) & 0xff] ^ Td2[(t0 >>  8) & 0xff] ^ Td3[t3 & 0xff] ^ rk[42];
+        s3 = Td0[t3 >> 24] ^ Td1[(t2 >> 16) & 0xff] ^ Td2[(t1 >>  8) & 0xff] ^ Td3[t0 & 0xff] ^ rk[43];
+        /* round 11: */
+        t0 = Td0[s0 >> 24] ^ Td1[(s3 >> 16) & 0xff] ^ Td2[(s2 >>  8) & 0xff] ^ Td3[s1 & 0xff] ^ rk[44];
+        t1 = Td0[s1 >> 24] ^ Td1[(s0 >> 16) & 0xff] ^ Td2[(s3 >>  8) & 0xff] ^ Td3[s2 & 0xff] ^ rk[45];
+        t2 = Td0[s2 >> 24] ^ Td1[(s1 >> 16) & 0xff] ^ Td2[(s0 >>  8) & 0xff] ^ Td3[s3 & 0xff] ^ rk[46];
+        t3 = Td0[s3 >> 24] ^ Td1[(s2 >> 16) & 0xff] ^ Td2[(s1 >>  8) & 0xff] ^ Td3[s0 & 0xff] ^ rk[47];
+        if (key->rounds > 12) {
+            /* round 12: */
+            s0 = Td0[t0 >> 24] ^ Td1[(t3 >> 16) & 0xff] ^ Td2[(t2 >>  8) & 0xff] ^ Td3[t1 & 0xff] ^ rk[48];
+            s1 = Td0[t1 >> 24] ^ Td1[(t0 >> 16) & 0xff] ^ Td2[(t3 >>  8) & 0xff] ^ Td3[t2 & 0xff] ^ rk[49];
+            s2 = Td0[t2 >> 24] ^ Td1[(t1 >> 16) & 0xff] ^ Td2[(t0 >>  8) & 0xff] ^ Td3[t3 & 0xff] ^ rk[50];
+            s3 = Td0[t3 >> 24] ^ Td1[(t2 >> 16) & 0xff] ^ Td2[(t1 >>  8) & 0xff] ^ Td3[t0 & 0xff] ^ rk[51];
+            /* round 13: */
+            t0 = Td0[s0 >> 24] ^ Td1[(s3 >> 16) & 0xff] ^ Td2[(s2 >>  8) & 0xff] ^ Td3[s1 & 0xff] ^ rk[52];
+            t1 = Td0[s1 >> 24] ^ Td1[(s0 >> 16) & 0xff] ^ Td2[(s3 >>  8) & 0xff] ^ Td3[s2 & 0xff] ^ rk[53];
+            t2 = Td0[s2 >> 24] ^ Td1[(s1 >> 16) & 0xff] ^ Td2[(s0 >>  8) & 0xff] ^ Td3[s3 & 0xff] ^ rk[54];
+            t3 = Td0[s3 >> 24] ^ Td1[(s2 >> 16) & 0xff] ^ Td2[(s1 >>  8) & 0xff] ^ Td3[s0 & 0xff] ^ rk[55];
+        }
+    }
+	rk += key->rounds << 2;
+#else  /* !FULL_UNROLL */
+    /*
+     * Nr - 1 full rounds:
+     */
+    r = key->rounds >> 1;
+    for (;;) {
+        t0 =
+            Td0[(s0 >> 24)       ] ^
+            Td1[(s3 >> 16) & 0xff] ^
+            Td2[(s2 >>  8) & 0xff] ^
+            Td3[(s1      ) & 0xff] ^
+            rk[4];
+        t1 =
+            Td0[(s1 >> 24)       ] ^
+            Td1[(s0 >> 16) & 0xff] ^
+            Td2[(s3 >>  8) & 0xff] ^
+            Td3[(s2      ) & 0xff] ^
+            rk[5];
+        t2 =
+            Td0[(s2 >> 24)       ] ^
+            Td1[(s1 >> 16) & 0xff] ^
+            Td2[(s0 >>  8) & 0xff] ^
+            Td3[(s3      ) & 0xff] ^
+            rk[6];
+        t3 =
+            Td0[(s3 >> 24)       ] ^
+            Td1[(s2 >> 16) & 0xff] ^
+            Td2[(s1 >>  8) & 0xff] ^
+            Td3[(s0      ) & 0xff] ^
+            rk[7];
+
+        rk += 8;
+        if (--r == 0) {
+            break;
+        }
+
+        s0 =
+            Td0[(t0 >> 24)       ] ^
+            Td1[(t3 >> 16) & 0xff] ^
+            Td2[(t2 >>  8) & 0xff] ^
+            Td3[(t1      ) & 0xff] ^
+            rk[0];
+        s1 =
+            Td0[(t1 >> 24)       ] ^
+            Td1[(t0 >> 16) & 0xff] ^
+            Td2[(t3 >>  8) & 0xff] ^
+            Td3[(t2      ) & 0xff] ^
+            rk[1];
+        s2 =
+            Td0[(t2 >> 24)       ] ^
+            Td1[(t1 >> 16) & 0xff] ^
+            Td2[(t0 >>  8) & 0xff] ^
+            Td3[(t3      ) & 0xff] ^
+            rk[2];
+        s3 =
+            Td0[(t3 >> 24)       ] ^
+            Td1[(t2 >> 16) & 0xff] ^
+            Td2[(t1 >>  8) & 0xff] ^
+            Td3[(t0      ) & 0xff] ^
+            rk[3];
+    }
+#endif /* ?FULL_UNROLL */
+    /*
+	 * apply last round and
+	 * map cipher state to byte array block:
+	 */
+   	s0 =
+   		(Td4[(t0 >> 24)       ] & 0xff000000) ^
+   		(Td4[(t3 >> 16) & 0xff] & 0x00ff0000) ^
+   		(Td4[(t2 >>  8) & 0xff] & 0x0000ff00) ^
+   		(Td4[(t1      ) & 0xff] & 0x000000ff) ^
+   		rk[0];
+	PUTU32(out     , s0);
+   	s1 =
+   		(Td4[(t1 >> 24)       ] & 0xff000000) ^
+   		(Td4[(t0 >> 16) & 0xff] & 0x00ff0000) ^
+   		(Td4[(t3 >>  8) & 0xff] & 0x0000ff00) ^
+   		(Td4[(t2      ) & 0xff] & 0x000000ff) ^
+   		rk[1];
+	PUTU32(out +  4, s1);
+   	s2 =
+   		(Td4[(t2 >> 24)       ] & 0xff000000) ^
+   		(Td4[(t1 >> 16) & 0xff] & 0x00ff0000) ^
+   		(Td4[(t0 >>  8) & 0xff] & 0x0000ff00) ^
+   		(Td4[(t3      ) & 0xff] & 0x000000ff) ^
+   		rk[2];
+	PUTU32(out +  8, s2);
+   	s3 =
+   		(Td4[(t3 >> 24)       ] & 0xff000000) ^
+   		(Td4[(t2 >> 16) & 0xff] & 0x00ff0000) ^
+   		(Td4[(t1 >>  8) & 0xff] & 0x0000ff00) ^
+   		(Td4[(t0      ) & 0xff] & 0x000000ff) ^
+   		rk[3];
+	PUTU32(out + 12, s3);
+}
+
+/**
+ * Expand the cipher key into the encryption key schedule.
+ */
+int AES_set_encrypt_key(const unsigned char *userKey, const int bits, AES_KEY *key) 
+{
+
+	u32 *rk;
+   	int i = 0;
+	u32 temp;
+
+	if (!userKey || !key)
+		return -1;
+	if (bits != 128 && bits != 192 && bits != 256)
+		return -2;
+
+	rk = key->rd_key;
+
+	if (bits==128)
+		key->rounds = 10;
+	else if (bits==192)
+		key->rounds = 12;
+	else
+		key->rounds = 14;
+
+	rk[0] = GETU32(userKey     );
+	rk[1] = GETU32(userKey +  4);
+	rk[2] = GETU32(userKey +  8);
+	rk[3] = GETU32(userKey + 12);
+	if (bits == 128) {
+		while (1) {
+			temp  = rk[3];
+			rk[4] = rk[0] ^
+				(Te4[(temp >> 16) & 0xff] & 0xff000000) ^
+				(Te4[(temp >>  8) & 0xff] & 0x00ff0000) ^
+				(Te4[(temp      ) & 0xff] & 0x0000ff00) ^
+				(Te4[(temp >> 24)       ] & 0x000000ff) ^
+				rcon[i];
+			rk[5] = rk[1] ^ rk[4];
+			rk[6] = rk[2] ^ rk[5];
+			rk[7] = rk[3] ^ rk[6];
+			if (++i == 10) {
+				return 0;
+			}
+			rk += 4;
+		}
+	}
+	rk[4] = GETU32(userKey + 16);
+	rk[5] = GETU32(userKey + 20);
+	if (bits == 192) {
+		while (1) {
+			temp = rk[ 5];
+			rk[ 6] = rk[ 0] ^
+				(Te4[(temp >> 16) & 0xff] & 0xff000000) ^
+				(Te4[(temp >>  8) & 0xff] & 0x00ff0000) ^
+				(Te4[(temp      ) & 0xff] & 0x0000ff00) ^
+				(Te4[(temp >> 24)       ] & 0x000000ff) ^
+				rcon[i];
+			rk[ 7] = rk[ 1] ^ rk[ 6];
+			rk[ 8] = rk[ 2] ^ rk[ 7];
+			rk[ 9] = rk[ 3] ^ rk[ 8];
+			if (++i == 8) {
+				return 0;
+			}
+			rk[10] = rk[ 4] ^ rk[ 9];
+			rk[11] = rk[ 5] ^ rk[10];
+			rk += 6;
+		}
+	}
+	rk[6] = GETU32(userKey + 24);
+	rk[7] = GETU32(userKey + 28);
+	if (bits == 256) {
+		while (1) {
+			temp = rk[ 7];
+			rk[ 8] = rk[ 0] ^
+				(Te4[(temp >> 16) & 0xff] & 0xff000000) ^
+				(Te4[(temp >>  8) & 0xff] & 0x00ff0000) ^
+				(Te4[(temp      ) & 0xff] & 0x0000ff00) ^
+				(Te4[(temp >> 24)       ] & 0x000000ff) ^
+				rcon[i];
+			rk[ 9] = rk[ 1] ^ rk[ 8];
+			rk[10] = rk[ 2] ^ rk[ 9];
+			rk[11] = rk[ 3] ^ rk[10];
+			if (++i == 7) {
+				return 0;
+			}
+			temp = rk[11];
+			rk[12] = rk[ 4] ^
+				(Te4[(temp >> 24)       ] & 0xff000000) ^
+				(Te4[(temp >> 16) & 0xff] & 0x00ff0000) ^
+				(Te4[(temp >>  8) & 0xff] & 0x0000ff00) ^
+				(Te4[(temp      ) & 0xff] & 0x000000ff);
+			rk[13] = rk[ 5] ^ rk[12];
+			rk[14] = rk[ 6] ^ rk[13];
+			rk[15] = rk[ 7] ^ rk[14];
+
+			rk += 8;
+        	}
+	}
+	return 0;   /*Success
+*/
+}
+
+void evp_aes_cbc_encrypt(const unsigned char *in, unsigned char *out,
+		     const unsigned long length, const AES_KEY *key,
+		     unsigned char *ivec, const int enc) 
+{
+
+	unsigned long n;
+	unsigned long len = length;
+	unsigned char tmp[AES_BLOCK_SIZE];
+	const unsigned char *iv = ivec;
+
+	assert(in && out && key && ivec);
+	assert((AES_ENCRYPT == enc)||(AES_DECRYPT == enc));
+
+	if (AES_ENCRYPT == enc) {
+		while (len >= AES_BLOCK_SIZE) {
+			for(n=0; n < AES_BLOCK_SIZE; ++n)
+				out[n] = in[n] ^ iv[n];
+			evp_aes_encrypt(out, out, key);
+			iv = out;
+			len -= AES_BLOCK_SIZE;
+			in += AES_BLOCK_SIZE;
+			out += AES_BLOCK_SIZE;
+		}
+		if (len) {
+			for(n=0; n < len; ++n)
+				out[n] = in[n] ^ iv[n];
+			for(n=len; n < AES_BLOCK_SIZE; ++n)
+				out[n] = iv[n];
+			evp_aes_encrypt(out, out, key);
+			iv = out;
+		}
+		memcpy(ivec,iv,AES_BLOCK_SIZE);
+	} else if (in != out) {
+		while (len >= AES_BLOCK_SIZE) {
+			evp_aes_decrypt(in, out, key);
+			for(n=0; n < AES_BLOCK_SIZE; ++n)
+				out[n] ^= iv[n];
+			iv = in;
+			len -= AES_BLOCK_SIZE;
+			in  += AES_BLOCK_SIZE;
+			out += AES_BLOCK_SIZE;
+		}
+		if (len) {
+			evp_aes_decrypt(in,tmp,key);
+			for(n=0; n < len; ++n)
+				out[n] = tmp[n] ^ iv[n];
+			iv = in;
+		}
+		memcpy(ivec,iv,AES_BLOCK_SIZE);
+	} else {
+		while (len >= AES_BLOCK_SIZE) {
+			memcpy(tmp, in, AES_BLOCK_SIZE);
+			evp_aes_decrypt(in, out, key);
+			for(n=0; n < AES_BLOCK_SIZE; ++n)
+				out[n] ^= ivec[n];
+			memcpy(ivec, tmp, AES_BLOCK_SIZE);
+			len -= AES_BLOCK_SIZE;
+			in += AES_BLOCK_SIZE;
+			out += AES_BLOCK_SIZE;
+		}
+		if (len) {
+			memcpy(tmp, in, AES_BLOCK_SIZE);
+			evp_aes_decrypt(tmp, out, key);
+			for(n=0; n < len; ++n)
+				out[n] ^= ivec[n];
+			for(n=len; n < AES_BLOCK_SIZE; ++n)
+				out[n] = tmp[n];
+			memcpy(ivec, tmp, AES_BLOCK_SIZE);
+		}
+	}
+}
+
+/**
+ * Expand the cipher key into the decryption key schedule.
+ */
+int AES_set_decrypt_key(const unsigned char *userKey, const int bits, AES_KEY *key) 
+{
+
+        u32 *rk;
+	int i, j, status;
+	u32 temp;
+
+	/* first, start with an encryption schedule */
+	status = AES_set_encrypt_key(userKey, bits, key);
+	if (status < 0)
+		return status;
+
+	rk = key->rd_key;
+
+	/* invert the order of the round keys: */
+	for (i = 0, j = 4*(key->rounds); i < j; i += 4, j -= 4) {
+		temp = rk[i    ]; rk[i    ] = rk[j    ]; rk[j    ] = temp;
+		temp = rk[i + 1]; rk[i + 1] = rk[j + 1]; rk[j + 1] = temp;
+		temp = rk[i + 2]; rk[i + 2] = rk[j + 2]; rk[j + 2] = temp;
+		temp = rk[i + 3]; rk[i + 3] = rk[j + 3]; rk[j + 3] = temp;
+	}
+	/* apply the inverse MixColumn transform to all round keys but the first and the last: */
+	for (i = 1; i < (key->rounds); i++) {
+		rk += 4;
+		rk[0] =
+			Td0[Te4[(rk[0] >> 24)       ] & 0xff] ^
+			Td1[Te4[(rk[0] >> 16) & 0xff] & 0xff] ^
+			Td2[Te4[(rk[0] >>  8) & 0xff] & 0xff] ^
+			Td3[Te4[(rk[0]      ) & 0xff] & 0xff];
+		rk[1] =
+			Td0[Te4[(rk[1] >> 24)       ] & 0xff] ^
+			Td1[Te4[(rk[1] >> 16) & 0xff] & 0xff] ^
+			Td2[Te4[(rk[1] >>  8) & 0xff] & 0xff] ^
+			Td3[Te4[(rk[1]      ) & 0xff] & 0xff];
+		rk[2] =
+			Td0[Te4[(rk[2] >> 24)       ] & 0xff] ^
+			Td1[Te4[(rk[2] >> 16) & 0xff] & 0xff] ^
+			Td2[Te4[(rk[2] >>  8) & 0xff] & 0xff] ^
+			Td3[Te4[(rk[2]      ) & 0xff] & 0xff];
+		rk[3] =
+			Td0[Te4[(rk[3] >> 24)       ] & 0xff] ^
+			Td1[Te4[(rk[3] >> 16) & 0xff] & 0xff] ^
+			Td2[Te4[(rk[3] >>  8) & 0xff] & 0xff] ^
+			Td3[Te4[(rk[3]      ) & 0xff] & 0xff];
+	}
+	return 0;
+}
+
+int EVP_aes_128_cbc()
+{
+	return 128; /*aes_128_cbc
+*/
+}
+
+int EVP_EncryptInit(EVP_CIPHER_CTX *ctx, int type, unsigned char *key, unsigned char *iv)
+{
+	int ret;
+
+	memset(ctx, 0x00, sizeof(EVP_CIPHER_CTX));
+
+	ctx->flag = 1;   /*Init ok.
+*/
+	ctx->type = type;
+	ctx->encrypt = 1;  /*Do Encrypt
+*/
+	
+
+	memcpy(ctx->key, key, 16);
+	memcpy(ctx->iv, iv, 16);
+	
+	ret = AES_set_encrypt_key(key, 128, &ctx->aesKey);
+
+	return ret;
+}
+
+int EVP_EncryptUpdate(EVP_CIPHER_CTX *ctx, unsigned char *outbuf, int *outlen, unsigned char *inbuf, int inlen)
+{
+	int encryptSize = 0;
+
+	if ((ctx->flag == 0) || (inlen == 0) || (ctx->encrypt == 0))
+		return 0;  /*Failed, ctx not been initializzd or input size is empty.
+*/
+
+	while (inlen >= AES_BLOCK_SIZE)
+	{
+		evp_aes_cbc_encrypt(inbuf + encryptSize, outbuf + encryptSize, AES_BLOCK_SIZE, &ctx->aesKey, ctx->iv, ctx->encrypt);
+		encryptSize += AES_BLOCK_SIZE;
+		inlen       -= AES_BLOCK_SIZE;
+	}
+
+	if (inlen == 0)
+	{
+		*outlen = encryptSize;
+		memset(ctx->buffer, AES_BLOCK_SIZE, AES_BLOCK_SIZE);
+		ctx->bufferlen = AES_BLOCK_SIZE;
+	}
+	else
+	{
+		*outlen = encryptSize;
+		memcpy(ctx->buffer, inbuf + encryptSize, inlen);
+		memset(ctx->buffer + inlen, AES_BLOCK_SIZE - inlen, AES_BLOCK_SIZE - inlen);
+		ctx->bufferlen = AES_BLOCK_SIZE;
+	}
+
+	return 1; /*Success
+*/
+}
+
+int EVP_EncryptFinal(EVP_CIPHER_CTX *ctx, unsigned char *outbuf, int *outlen)
+{
+	if ((ctx->flag == 0) || (ctx->bufferlen == 0) || (ctx->encrypt == 0))
+	{
+		*outlen = 0;
+		return 0; /*Failed, ctx not been initialized or buffer is empty.
+*/
+	}
+
+	*outlen = AES_BLOCK_SIZE;
+	evp_aes_cbc_encrypt(ctx->buffer, outbuf, AES_BLOCK_SIZE, &ctx->aesKey, ctx->iv, ctx->encrypt);
+
+	return 1; /*Success
+*/
+}
+
+int EVP_DecryptInit(EVP_CIPHER_CTX *ctx, int type, unsigned char *key, unsigned char *iv)
+{
+	int ret;
+
+	memset(ctx, 0x00, sizeof(EVP_CIPHER_CTX));
+
+	ctx->flag = 1;   /*Init ok.
+*/
+	ctx->type = type;
+	ctx->encrypt = 0;  /*Do Decrypt
+*/
+	
+	memcpy(ctx->key, key, 16);
+	memcpy(ctx->iv, iv, 16);
+	
+	ret = AES_set_decrypt_key(key, 128, &ctx->aesKey);
+
+	return ret;
+}
+
+int EVP_DecryptUpdate(EVP_CIPHER_CTX *ctx, unsigned char *outbuf, int *outlen, unsigned char *inbuf, int inlen)
+{
+	int decryptSize = 0;
+
+	if ((ctx->flag == 0) || (inlen == 0) || (ctx->encrypt == 1))
+		return 0;  /*Failed, ctx not been initializzd or input size is empty.
+*/
+
+	while (inlen >= AES_BLOCK_SIZE)
+	{
+		if (inlen <= AES_BLOCK_SIZE)
+			break;
+
+		evp_aes_cbc_encrypt(inbuf + decryptSize, outbuf + decryptSize, AES_BLOCK_SIZE, &ctx->aesKey, ctx->iv, ctx->encrypt);
+		decryptSize += AES_BLOCK_SIZE;
+		inlen       -= AES_BLOCK_SIZE;
+	}
+
+	if (inlen == AES_BLOCK_SIZE)
+	{
+		ctx->bufferlen = inlen;
+		evp_aes_cbc_encrypt(inbuf + decryptSize, ctx->buffer, AES_BLOCK_SIZE, &ctx->aesKey, ctx->iv, ctx->encrypt);
+	}
+	*outlen = decryptSize;
+
+	return 1; /*Success.
+*/
+}
+
+int EVP_DecryptFinal(EVP_CIPHER_CTX *ctx, unsigned char *outbuf, int *outlen)
+{
+	unsigned char lastchar = 0;
+	int datasize = 0;
+
+	if ((ctx->flag == 0) || (ctx->bufferlen == 0) || (ctx->encrypt == 1))
+	{
+		*outlen = 0;
+		return 0; /*Failed, ctx not been initialized or buffer is empty.
+*/
+	}
+
+	lastchar = ctx->buffer[AES_BLOCK_SIZE - 1];
+	if (lastchar < AES_BLOCK_SIZE)
+	{
+		datasize = AES_BLOCK_SIZE - lastchar;
+		memcpy(outbuf, ctx->buffer, datasize);
+	}
+
+	*outlen = datasize;
+
+	return 1; /*Success
+*/
+}
+
+
+
+/*  Wifi-Simple-Configure                               *
+ *  Encryption algorithm : AES-128-CBC per FIPS 197     */
+
+/* 
+ * WscEncryptData
+ * @ plainText: input data
+ * @ ptx_len:
+ * @ key: KeyWrapKey derived from KDK, len=aes-128-bit (in bytes)
+ * @ iv: a random iv, len=aes-128-bit (in bytes)
+ * @ cipherText: output data
+ * @ ctx_len:
+ */
+void WscEncryptData(
+    unsigned char *plainText,   int ptx_len,
+    unsigned char *key, unsigned char *iv,
+    unsigned char *cipherText,  int *ctx_len)
+{
+/*    EVP_CIPHER_CTX ctx;
+*/
+	EVP_CIPHER_CTX *pctx = NULL;
+    int bufLen = 1024;
+/*    unsigned char outBuf[1024];
+*/
+	unsigned char *outBuf = NULL;
+    int outLen, currentLength;
+    
+    /*block size = 1024 bytes - 128 bits, 
+*/
+    /*leave 128 bits at the end to accommodate any possible padding 
+*/
+    /*and avoid a buffer overflow
+*/
+    int blockSize = bufLen - AES_BLOCK_SIZE; 
+    unsigned char *bufPtr=NULL;
+    int data_len;
+
+	/* allocate memory */
+	os_alloc_mem(NULL, (UCHAR **)&pctx, sizeof(EVP_CIPHER_CTX));
+	if (pctx == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+		goto LabelErr;
+	}
+	os_alloc_mem(NULL, (UCHAR **)&outBuf, 1024);
+	if (outBuf == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+		goto LabelErr;
+	}
+
+    /* init buffer
+*/
+    bufPtr = plainText;
+    data_len = ptx_len;
+
+    if(0 != EVP_EncryptInit(pctx, EVP_aes_128_cbc(), key, iv))
+    {
+        DBGPRINT(RT_DEBUG_INFO, ("WscEncryptData: EncryptInit failed\n"));
+    }
+
+    *ctx_len = 0;
+    while(data_len)
+    {
+        if(data_len > blockSize)
+            currentLength = blockSize;
+        else
+            currentLength = data_len;
+
+        if(0 == EVP_EncryptUpdate(pctx, outBuf, &outLen, bufPtr, currentLength))
+        {
+            DBGPRINT(RT_DEBUG_INFO, ("WscEncryptData: EncryptUpdate failed\n")); 
+        }
+        
+        /* fill in output cipherText
+*/
+        memcpy(cipherText, outBuf, outLen);
+        cipherText += outLen;
+        *ctx_len += outLen;
+        
+        bufPtr += currentLength;
+        data_len -= currentLength;
+    }
+
+    
+    if(0 == EVP_EncryptFinal(pctx, outBuf, &outLen))
+    {
+        DBGPRINT(RT_DEBUG_INFO, ("WscEncryptData: EncryptFinal failed\n"));
+    }
+
+    /* fill in output cipherText
+*/
+    memcpy(cipherText, outBuf, outLen);
+    *ctx_len += outLen;
+
+LabelErr:
+	if (pctx != NULL)
+		os_free_mem(NULL, pctx);
+	if (outBuf != NULL)
+		os_free_mem(NULL, outBuf);
+}
+
+
+/* WscDecryptData
+ * @ cipherText: input data
+ * @ ctx_len:
+ * @ key: KeyWrapKey derived from KDK, len=aes-128-bit (in bytes)
+ * @ iv: a random iv, len=aes-128-bit (in bytes)
+ * @ plainText: output data
+ * @ ptx_len:
+ */
+void WscDecryptData(
+    unsigned char *cipherText,  int ctx_len, 
+    unsigned char *key, unsigned char *iv,
+    unsigned char *plainText,   int *ptx_len)
+{
+/*    EVP_CIPHER_CTX ctx;
+*/
+	EVP_CIPHER_CTX *pctx = NULL;
+    int bufLen = 1024;
+/*    unsigned char  outBuf[1024];
+*/
+	unsigned char *outBuf = NULL;
+    int outLen = 0, currentLength;
+    
+    /*block size = 1024 bytes - 128 bits, 
+*/
+    /*leave 128 bits at the end to accommodate any possible padding 
+*/
+    /*and avoid a buffer overflow
+*/
+    int blockSize = bufLen - AES_BLOCK_SIZE;
+    unsigned char *bufPtr=NULL;
+    int data_len;
+
+	/* allocate memory */
+	os_alloc_mem(NULL, (UCHAR **)&pctx, sizeof(EVP_CIPHER_CTX));
+	if (pctx == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+		goto LabelErr;
+	}
+	os_alloc_mem(NULL, (UCHAR **)&outBuf, 1024);
+	if (outBuf == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+		goto LabelErr;
+	}
+
+    /* init buffer
+*/
+    bufPtr = cipherText;
+    data_len = ctx_len;
+
+    if(0 != EVP_DecryptInit(pctx, EVP_aes_128_cbc(), key, iv))
+    {
+        DBGPRINT(RT_DEBUG_INFO, ("WscEncryptData: DecryptInit failed\n"));
+    }
+
+    *ptx_len=0;
+    while(data_len)
+    {
+        if(data_len > blockSize)
+            currentLength = blockSize;
+        else
+            currentLength = data_len;
+
+        if(0 == EVP_DecryptUpdate(pctx, outBuf, &outLen, bufPtr, currentLength))
+        {
+            DBGPRINT(RT_DEBUG_INFO, ("WscDecryptData: DecryptUpdate failed\n"));
+        }
+
+
+        /* fill in output plainText
+*/
+        memcpy(plainText, outBuf, outLen);
+        plainText += outLen;
+        *ptx_len += outLen;
+        
+        bufPtr += currentLength;
+        data_len -= currentLength;
+    }
+
+
+    if(0 == EVP_DecryptFinal(pctx, outBuf, &outLen))
+    {
+        DBGPRINT(RT_DEBUG_INFO, ("WscDecryptData: DecryptFinal failed\n"));
+    }
+
+    /* fill in output plainText
+*/
+    memcpy(plainText, outBuf, outLen);
+    *ptx_len += outLen;
+
+LabelErr:
+	if (pctx != NULL)
+		os_free_mem(NULL, pctx);
+	if (outBuf != NULL)
+		os_free_mem(NULL, outBuf);
+}
+
+/* =========================  AES En/Decryption ========================== */
+
+/* forward S-box */
+static uint32 FSb[256] =
+{
+	0x63, 0x7C,	0x77, 0x7B,	0xF2, 0x6B,	0x6F, 0xC5,
+	0x30, 0x01,	0x67, 0x2B,	0xFE, 0xD7,	0xAB, 0x76,
+	0xCA, 0x82,	0xC9, 0x7D,	0xFA, 0x59,	0x47, 0xF0,
+	0xAD, 0xD4,	0xA2, 0xAF,	0x9C, 0xA4,	0x72, 0xC0,
+	0xB7, 0xFD,	0x93, 0x26,	0x36, 0x3F,	0xF7, 0xCC,
+	0x34, 0xA5,	0xE5, 0xF1,	0x71, 0xD8,	0x31, 0x15,
+	0x04, 0xC7,	0x23, 0xC3,	0x18, 0x96,	0x05, 0x9A,
+	0x07, 0x12,	0x80, 0xE2,	0xEB, 0x27,	0xB2, 0x75,
+	0x09, 0x83,	0x2C, 0x1A,	0x1B, 0x6E,	0x5A, 0xA0,
+	0x52, 0x3B,	0xD6, 0xB3,	0x29, 0xE3,	0x2F, 0x84,
+	0x53, 0xD1,	0x00, 0xED,	0x20, 0xFC,	0xB1, 0x5B,
+	0x6A, 0xCB,	0xBE, 0x39,	0x4A, 0x4C,	0x58, 0xCF,
+	0xD0, 0xEF,	0xAA, 0xFB,	0x43, 0x4D,	0x33, 0x85,
+	0x45, 0xF9,	0x02, 0x7F,	0x50, 0x3C,	0x9F, 0xA8,
+	0x51, 0xA3,	0x40, 0x8F,	0x92, 0x9D,	0x38, 0xF5,
+	0xBC, 0xB6,	0xDA, 0x21,	0x10, 0xFF,	0xF3, 0xD2,
+	0xCD, 0x0C,	0x13, 0xEC,	0x5F, 0x97,	0x44, 0x17,
+	0xC4, 0xA7,	0x7E, 0x3D,	0x64, 0x5D,	0x19, 0x73,
+	0x60, 0x81,	0x4F, 0xDC,	0x22, 0x2A,	0x90, 0x88,
+	0x46, 0xEE,	0xB8, 0x14,	0xDE, 0x5E,	0x0B, 0xDB,
+	0xE0, 0x32,	0x3A, 0x0A,	0x49, 0x06,	0x24, 0x5C,
+	0xC2, 0xD3,	0xAC, 0x62,	0x91, 0x95,	0xE4, 0x79,
+	0xE7, 0xC8,	0x37, 0x6D,	0x8D, 0xD5,	0x4E, 0xA9,
+	0x6C, 0x56,	0xF4, 0xEA,	0x65, 0x7A,	0xAE, 0x08,
+	0xBA, 0x78,	0x25, 0x2E,	0x1C, 0xA6,	0xB4, 0xC6,
+	0xE8, 0xDD,	0x74, 0x1F,	0x4B, 0xBD,	0x8B, 0x8A,
+	0x70, 0x3E,	0xB5, 0x66,	0x48, 0x03,	0xF6, 0x0E,
+	0x61, 0x35,	0x57, 0xB9,	0x86, 0xC1,	0x1D, 0x9E,
+	0xE1, 0xF8,	0x98, 0x11,	0x69, 0xD9,	0x8E, 0x94,
+	0x9B, 0x1E,	0x87, 0xE9,	0xCE, 0x55,	0x28, 0xDF,
+	0x8C, 0xA1,	0x89, 0x0D,	0xBF, 0xE6,	0x42, 0x68,
+	0x41, 0x99,	0x2D, 0x0F,	0xB0, 0x54,	0xBB, 0x16
+};
+
+/* forward table */
+#define	FT \
+\
+	V(C6,63,63,A5),	V(F8,7C,7C,84),	V(EE,77,77,99),	V(F6,7B,7B,8D),	\
+	V(FF,F2,F2,0D),	V(D6,6B,6B,BD),	V(DE,6F,6F,B1),	V(91,C5,C5,54),	\
+	V(60,30,30,50),	V(02,01,01,03),	V(CE,67,67,A9),	V(56,2B,2B,7D),	\
+	V(E7,FE,FE,19),	V(B5,D7,D7,62),	V(4D,AB,AB,E6),	V(EC,76,76,9A),	\
+	V(8F,CA,CA,45),	V(1F,82,82,9D),	V(89,C9,C9,40),	V(FA,7D,7D,87),	\
+	V(EF,FA,FA,15),	V(B2,59,59,EB),	V(8E,47,47,C9),	V(FB,F0,F0,0B),	\
+	V(41,AD,AD,EC),	V(B3,D4,D4,67),	V(5F,A2,A2,FD),	V(45,AF,AF,EA),	\
+	V(23,9C,9C,BF),	V(53,A4,A4,F7),	V(E4,72,72,96),	V(9B,C0,C0,5B),	\
+	V(75,B7,B7,C2),	V(E1,FD,FD,1C),	V(3D,93,93,AE),	V(4C,26,26,6A),	\
+	V(6C,36,36,5A),	V(7E,3F,3F,41),	V(F5,F7,F7,02),	V(83,CC,CC,4F),	\
+	V(68,34,34,5C),	V(51,A5,A5,F4),	V(D1,E5,E5,34),	V(F9,F1,F1,08),	\
+	V(E2,71,71,93),	V(AB,D8,D8,73),	V(62,31,31,53),	V(2A,15,15,3F),	\
+	V(08,04,04,0C),	V(95,C7,C7,52),	V(46,23,23,65),	V(9D,C3,C3,5E),	\
+	V(30,18,18,28),	V(37,96,96,A1),	V(0A,05,05,0F),	V(2F,9A,9A,B5),	\
+	V(0E,07,07,09),	V(24,12,12,36),	V(1B,80,80,9B),	V(DF,E2,E2,3D),	\
+	V(CD,EB,EB,26),	V(4E,27,27,69),	V(7F,B2,B2,CD),	V(EA,75,75,9F),	\
+	V(12,09,09,1B),	V(1D,83,83,9E),	V(58,2C,2C,74),	V(34,1A,1A,2E),	\
+	V(36,1B,1B,2D),	V(DC,6E,6E,B2),	V(B4,5A,5A,EE),	V(5B,A0,A0,FB),	\
+	V(A4,52,52,F6),	V(76,3B,3B,4D),	V(B7,D6,D6,61),	V(7D,B3,B3,CE),	\
+	V(52,29,29,7B),	V(DD,E3,E3,3E),	V(5E,2F,2F,71),	V(13,84,84,97),	\
+	V(A6,53,53,F5),	V(B9,D1,D1,68),	V(00,00,00,00),	V(C1,ED,ED,2C),	\
+	V(40,20,20,60),	V(E3,FC,FC,1F),	V(79,B1,B1,C8),	V(B6,5B,5B,ED),	\
+	V(D4,6A,6A,BE),	V(8D,CB,CB,46),	V(67,BE,BE,D9),	V(72,39,39,4B),	\
+	V(94,4A,4A,DE),	V(98,4C,4C,D4),	V(B0,58,58,E8),	V(85,CF,CF,4A),	\
+	V(BB,D0,D0,6B),	V(C5,EF,EF,2A),	V(4F,AA,AA,E5),	V(ED,FB,FB,16),	\
+	V(86,43,43,C5),	V(9A,4D,4D,D7),	V(66,33,33,55),	V(11,85,85,94),	\
+	V(8A,45,45,CF),	V(E9,F9,F9,10),	V(04,02,02,06),	V(FE,7F,7F,81),	\
+	V(A0,50,50,F0),	V(78,3C,3C,44),	V(25,9F,9F,BA),	V(4B,A8,A8,E3),	\
+	V(A2,51,51,F3),	V(5D,A3,A3,FE),	V(80,40,40,C0),	V(05,8F,8F,8A),	\
+	V(3F,92,92,AD),	V(21,9D,9D,BC),	V(70,38,38,48),	V(F1,F5,F5,04),	\
+	V(63,BC,BC,DF),	V(77,B6,B6,C1),	V(AF,DA,DA,75),	V(42,21,21,63),	\
+	V(20,10,10,30),	V(E5,FF,FF,1A),	V(FD,F3,F3,0E),	V(BF,D2,D2,6D),	\
+	V(81,CD,CD,4C),	V(18,0C,0C,14),	V(26,13,13,35),	V(C3,EC,EC,2F),	\
+	V(BE,5F,5F,E1),	V(35,97,97,A2),	V(88,44,44,CC),	V(2E,17,17,39),	\
+	V(93,C4,C4,57),	V(55,A7,A7,F2),	V(FC,7E,7E,82),	V(7A,3D,3D,47),	\
+	V(C8,64,64,AC),	V(BA,5D,5D,E7),	V(32,19,19,2B),	V(E6,73,73,95),	\
+	V(C0,60,60,A0),	V(19,81,81,98),	V(9E,4F,4F,D1),	V(A3,DC,DC,7F),	\
+	V(44,22,22,66),	V(54,2A,2A,7E),	V(3B,90,90,AB),	V(0B,88,88,83),	\
+	V(8C,46,46,CA),	V(C7,EE,EE,29),	V(6B,B8,B8,D3),	V(28,14,14,3C),	\
+	V(A7,DE,DE,79),	V(BC,5E,5E,E2),	V(16,0B,0B,1D),	V(AD,DB,DB,76),	\
+	V(DB,E0,E0,3B),	V(64,32,32,56),	V(74,3A,3A,4E),	V(14,0A,0A,1E),	\
+	V(92,49,49,DB),	V(0C,06,06,0A),	V(48,24,24,6C),	V(B8,5C,5C,E4),	\
+	V(9F,C2,C2,5D),	V(BD,D3,D3,6E),	V(43,AC,AC,EF),	V(C4,62,62,A6),	\
+	V(39,91,91,A8),	V(31,95,95,A4),	V(D3,E4,E4,37),	V(F2,79,79,8B),	\
+	V(D5,E7,E7,32),	V(8B,C8,C8,43),	V(6E,37,37,59),	V(DA,6D,6D,B7),	\
+	V(01,8D,8D,8C),	V(B1,D5,D5,64),	V(9C,4E,4E,D2),	V(49,A9,A9,E0),	\
+	V(D8,6C,6C,B4),	V(AC,56,56,FA),	V(F3,F4,F4,07),	V(CF,EA,EA,25),	\
+	V(CA,65,65,AF),	V(F4,7A,7A,8E),	V(47,AE,AE,E9),	V(10,08,08,18),	\
+	V(6F,BA,BA,D5),	V(F0,78,78,88),	V(4A,25,25,6F),	V(5C,2E,2E,72),	\
+	V(38,1C,1C,24),	V(57,A6,A6,F1),	V(73,B4,B4,C7),	V(97,C6,C6,51),	\
+	V(CB,E8,E8,23),	V(A1,DD,DD,7C),	V(E8,74,74,9C),	V(3E,1F,1F,21),	\
+	V(96,4B,4B,DD),	V(61,BD,BD,DC),	V(0D,8B,8B,86),	V(0F,8A,8A,85),	\
+	V(E0,70,70,90),	V(7C,3E,3E,42),	V(71,B5,B5,C4),	V(CC,66,66,AA),	\
+	V(90,48,48,D8),	V(06,03,03,05),	V(F7,F6,F6,01),	V(1C,0E,0E,12),	\
+	V(C2,61,61,A3),	V(6A,35,35,5F),	V(AE,57,57,F9),	V(69,B9,B9,D0),	\
+	V(17,86,86,91),	V(99,C1,C1,58),	V(3A,1D,1D,27),	V(27,9E,9E,B9),	\
+	V(D9,E1,E1,38),	V(EB,F8,F8,13),	V(2B,98,98,B3),	V(22,11,11,33),	\
+	V(D2,69,69,BB),	V(A9,D9,D9,70),	V(07,8E,8E,89),	V(33,94,94,A7),	\
+	V(2D,9B,9B,B6),	V(3C,1E,1E,22),	V(15,87,87,92),	V(C9,E9,E9,20),	\
+	V(87,CE,CE,49),	V(AA,55,55,FF),	V(50,28,28,78),	V(A5,DF,DF,7A),	\
+	V(03,8C,8C,8F),	V(59,A1,A1,F8),	V(09,89,89,80),	V(1A,0D,0D,17),	\
+	V(65,BF,BF,DA),	V(D7,E6,E6,31),	V(84,42,42,C6),	V(D0,68,68,B8),	\
+	V(82,41,41,C3),	V(29,99,99,B0),	V(5A,2D,2D,77),	V(1E,0F,0F,11),	\
+	V(7B,B0,B0,CB),	V(A8,54,54,FC),	V(6D,BB,BB,D6),	V(2C,16,16,3A)
+
+#define	V(a,b,c,d) 0x##a##b##c##d
+static uint32 FT0[256] = { FT };
+#undef V
+
+#define	V(a,b,c,d) 0x##d##a##b##c
+static uint32 FT1[256] = { FT };
+#undef V
+
+#define	V(a,b,c,d) 0x##c##d##a##b
+static uint32 FT2[256] = { FT };
+#undef V
+
+#define	V(a,b,c,d) 0x##b##c##d##a
+static uint32 FT3[256] = { FT };
+#undef V
+
+#undef FT
+
+/* reverse S-box */
+
+static uint32 RSb[256] =
+{
+	0x52, 0x09,	0x6A, 0xD5,	0x30, 0x36,	0xA5, 0x38,
+	0xBF, 0x40,	0xA3, 0x9E,	0x81, 0xF3,	0xD7, 0xFB,
+	0x7C, 0xE3,	0x39, 0x82,	0x9B, 0x2F,	0xFF, 0x87,
+	0x34, 0x8E,	0x43, 0x44,	0xC4, 0xDE,	0xE9, 0xCB,
+	0x54, 0x7B,	0x94, 0x32,	0xA6, 0xC2,	0x23, 0x3D,
+	0xEE, 0x4C,	0x95, 0x0B,	0x42, 0xFA,	0xC3, 0x4E,
+	0x08, 0x2E,	0xA1, 0x66,	0x28, 0xD9,	0x24, 0xB2,
+	0x76, 0x5B,	0xA2, 0x49,	0x6D, 0x8B,	0xD1, 0x25,
+	0x72, 0xF8,	0xF6, 0x64,	0x86, 0x68,	0x98, 0x16,
+	0xD4, 0xA4,	0x5C, 0xCC,	0x5D, 0x65,	0xB6, 0x92,
+	0x6C, 0x70,	0x48, 0x50,	0xFD, 0xED,	0xB9, 0xDA,
+	0x5E, 0x15,	0x46, 0x57,	0xA7, 0x8D,	0x9D, 0x84,
+	0x90, 0xD8,	0xAB, 0x00,	0x8C, 0xBC,	0xD3, 0x0A,
+	0xF7, 0xE4,	0x58, 0x05,	0xB8, 0xB3,	0x45, 0x06,
+	0xD0, 0x2C,	0x1E, 0x8F,	0xCA, 0x3F,	0x0F, 0x02,
+	0xC1, 0xAF,	0xBD, 0x03,	0x01, 0x13,	0x8A, 0x6B,
+	0x3A, 0x91,	0x11, 0x41,	0x4F, 0x67,	0xDC, 0xEA,
+	0x97, 0xF2,	0xCF, 0xCE,	0xF0, 0xB4,	0xE6, 0x73,
+	0x96, 0xAC,	0x74, 0x22,	0xE7, 0xAD,	0x35, 0x85,
+	0xE2, 0xF9,	0x37, 0xE8,	0x1C, 0x75,	0xDF, 0x6E,
+	0x47, 0xF1,	0x1A, 0x71,	0x1D, 0x29,	0xC5, 0x89,
+	0x6F, 0xB7,	0x62, 0x0E,	0xAA, 0x18,	0xBE, 0x1B,
+	0xFC, 0x56,	0x3E, 0x4B,	0xC6, 0xD2,	0x79, 0x20,
+	0x9A, 0xDB,	0xC0, 0xFE,	0x78, 0xCD,	0x5A, 0xF4,
+	0x1F, 0xDD,	0xA8, 0x33,	0x88, 0x07,	0xC7, 0x31,
+	0xB1, 0x12,	0x10, 0x59,	0x27, 0x80,	0xEC, 0x5F,
+	0x60, 0x51,	0x7F, 0xA9,	0x19, 0xB5,	0x4A, 0x0D,
+	0x2D, 0xE5,	0x7A, 0x9F,	0x93, 0xC9,	0x9C, 0xEF,
+	0xA0, 0xE0,	0x3B, 0x4D,	0xAE, 0x2A,	0xF5, 0xB0,
+	0xC8, 0xEB,	0xBB, 0x3C,	0x83, 0x53,	0x99, 0x61,
+	0x17, 0x2B,	0x04, 0x7E,	0xBA, 0x77,	0xD6, 0x26,
+	0xE1, 0x69,	0x14, 0x63,	0x55, 0x21,	0x0C, 0x7D
+};
+
+/* reverse table */
+
+#define	RT \
+\
+	V(51,F4,A7,50),	V(7E,41,65,53),	V(1A,17,A4,C3),	V(3A,27,5E,96),	\
+	V(3B,AB,6B,CB),	V(1F,9D,45,F1),	V(AC,FA,58,AB),	V(4B,E3,03,93),	\
+	V(20,30,FA,55),	V(AD,76,6D,F6),	V(88,CC,76,91),	V(F5,02,4C,25),	\
+	V(4F,E5,D7,FC),	V(C5,2A,CB,D7),	V(26,35,44,80),	V(B5,62,A3,8F),	\
+	V(DE,B1,5A,49),	V(25,BA,1B,67),	V(45,EA,0E,98),	V(5D,FE,C0,E1),	\
+	V(C3,2F,75,02),	V(81,4C,F0,12),	V(8D,46,97,A3),	V(6B,D3,F9,C6),	\
+	V(03,8F,5F,E7),	V(15,92,9C,95),	V(BF,6D,7A,EB),	V(95,52,59,DA),	\
+	V(D4,BE,83,2D),	V(58,74,21,D3),	V(49,E0,69,29),	V(8E,C9,C8,44),	\
+	V(75,C2,89,6A),	V(F4,8E,79,78),	V(99,58,3E,6B),	V(27,B9,71,DD),	\
+	V(BE,E1,4F,B6),	V(F0,88,AD,17),	V(C9,20,AC,66),	V(7D,CE,3A,B4),	\
+	V(63,DF,4A,18),	V(E5,1A,31,82),	V(97,51,33,60),	V(62,53,7F,45),	\
+	V(B1,64,77,E0),	V(BB,6B,AE,84),	V(FE,81,A0,1C),	V(F9,08,2B,94),	\
+	V(70,48,68,58),	V(8F,45,FD,19),	V(94,DE,6C,87),	V(52,7B,F8,B7),	\
+	V(AB,73,D3,23),	V(72,4B,02,E2),	V(E3,1F,8F,57),	V(66,55,AB,2A),	\
+	V(B2,EB,28,07),	V(2F,B5,C2,03),	V(86,C5,7B,9A),	V(D3,37,08,A5),	\
+	V(30,28,87,F2),	V(23,BF,A5,B2),	V(02,03,6A,BA),	V(ED,16,82,5C),	\
+	V(8A,CF,1C,2B),	V(A7,79,B4,92),	V(F3,07,F2,F0),	V(4E,69,E2,A1),	\
+	V(65,DA,F4,CD),	V(06,05,BE,D5),	V(D1,34,62,1F),	V(C4,A6,FE,8A),	\
+	V(34,2E,53,9D),	V(A2,F3,55,A0),	V(05,8A,E1,32),	V(A4,F6,EB,75),	\
+	V(0B,83,EC,39),	V(40,60,EF,AA),	V(5E,71,9F,06),	V(BD,6E,10,51),	\
+	V(3E,21,8A,F9),	V(96,DD,06,3D),	V(DD,3E,05,AE),	V(4D,E6,BD,46),	\
+	V(91,54,8D,B5),	V(71,C4,5D,05),	V(04,06,D4,6F),	V(60,50,15,FF),	\
+	V(19,98,FB,24),	V(D6,BD,E9,97),	V(89,40,43,CC),	V(67,D9,9E,77),	\
+	V(B0,E8,42,BD),	V(07,89,8B,88),	V(E7,19,5B,38),	V(79,C8,EE,DB),	\
+	V(A1,7C,0A,47),	V(7C,42,0F,E9),	V(F8,84,1E,C9),	V(00,00,00,00),	\
+	V(09,80,86,83),	V(32,2B,ED,48),	V(1E,11,70,AC),	V(6C,5A,72,4E),	\
+	V(FD,0E,FF,FB),	V(0F,85,38,56),	V(3D,AE,D5,1E),	V(36,2D,39,27),	\
+	V(0A,0F,D9,64),	V(68,5C,A6,21),	V(9B,5B,54,D1),	V(24,36,2E,3A),	\
+	V(0C,0A,67,B1),	V(93,57,E7,0F),	V(B4,EE,96,D2),	V(1B,9B,91,9E),	\
+	V(80,C0,C5,4F),	V(61,DC,20,A2),	V(5A,77,4B,69),	V(1C,12,1A,16),	\
+	V(E2,93,BA,0A),	V(C0,A0,2A,E5),	V(3C,22,E0,43),	V(12,1B,17,1D),	\
+	V(0E,09,0D,0B),	V(F2,8B,C7,AD),	V(2D,B6,A8,B9),	V(14,1E,A9,C8),	\
+	V(57,F1,19,85),	V(AF,75,07,4C),	V(EE,99,DD,BB),	V(A3,7F,60,FD),	\
+	V(F7,01,26,9F),	V(5C,72,F5,BC),	V(44,66,3B,C5),	V(5B,FB,7E,34),	\
+	V(8B,43,29,76),	V(CB,23,C6,DC),	V(B6,ED,FC,68),	V(B8,E4,F1,63),	\
+	V(D7,31,DC,CA),	V(42,63,85,10),	V(13,97,22,40),	V(84,C6,11,20),	\
+	V(85,4A,24,7D),	V(D2,BB,3D,F8),	V(AE,F9,32,11),	V(C7,29,A1,6D),	\
+	V(1D,9E,2F,4B),	V(DC,B2,30,F3),	V(0D,86,52,EC),	V(77,C1,E3,D0),	\
+	V(2B,B3,16,6C),	V(A9,70,B9,99),	V(11,94,48,FA),	V(47,E9,64,22),	\
+	V(A8,FC,8C,C4),	V(A0,F0,3F,1A),	V(56,7D,2C,D8),	V(22,33,90,EF),	\
+	V(87,49,4E,C7),	V(D9,38,D1,C1),	V(8C,CA,A2,FE),	V(98,D4,0B,36),	\
+	V(A6,F5,81,CF),	V(A5,7A,DE,28),	V(DA,B7,8E,26),	V(3F,AD,BF,A4),	\
+	V(2C,3A,9D,E4),	V(50,78,92,0D),	V(6A,5F,CC,9B),	V(54,7E,46,62),	\
+	V(F6,8D,13,C2),	V(90,D8,B8,E8),	V(2E,39,F7,5E),	V(82,C3,AF,F5),	\
+	V(9F,5D,80,BE),	V(69,D0,93,7C),	V(6F,D5,2D,A9),	V(CF,25,12,B3),	\
+	V(C8,AC,99,3B),	V(10,18,7D,A7),	V(E8,9C,63,6E),	V(DB,3B,BB,7B),	\
+	V(CD,26,78,09),	V(6E,59,18,F4),	V(EC,9A,B7,01),	V(83,4F,9A,A8),	\
+	V(E6,95,6E,65),	V(AA,FF,E6,7E),	V(21,BC,CF,08),	V(EF,15,E8,E6),	\
+	V(BA,E7,9B,D9),	V(4A,6F,36,CE),	V(EA,9F,09,D4),	V(29,B0,7C,D6),	\
+	V(31,A4,B2,AF),	V(2A,3F,23,31),	V(C6,A5,94,30),	V(35,A2,66,C0),	\
+	V(74,4E,BC,37),	V(FC,82,CA,A6),	V(E0,90,D0,B0),	V(33,A7,D8,15),	\
+	V(F1,04,98,4A),	V(41,EC,DA,F7),	V(7F,CD,50,0E),	V(17,91,F6,2F),	\
+	V(76,4D,D6,8D),	V(43,EF,B0,4D),	V(CC,AA,4D,54),	V(E4,96,04,DF),	\
+	V(9E,D1,B5,E3),	V(4C,6A,88,1B),	V(C1,2C,1F,B8),	V(46,65,51,7F),	\
+	V(9D,5E,EA,04),	V(01,8C,35,5D),	V(FA,87,74,73),	V(FB,0B,41,2E),	\
+	V(B3,67,1D,5A),	V(92,DB,D2,52),	V(E9,10,56,33),	V(6D,D6,47,13),	\
+	V(9A,D7,61,8C),	V(37,A1,0C,7A),	V(59,F8,14,8E),	V(EB,13,3C,89),	\
+	V(CE,A9,27,EE),	V(B7,61,C9,35),	V(E1,1C,E5,ED),	V(7A,47,B1,3C),	\
+	V(9C,D2,DF,59),	V(55,F2,73,3F),	V(18,14,CE,79),	V(73,C7,37,BF),	\
+	V(53,F7,CD,EA),	V(5F,FD,AA,5B),	V(DF,3D,6F,14),	V(78,44,DB,86),	\
+	V(CA,AF,F3,81),	V(B9,68,C4,3E),	V(38,24,34,2C),	V(C2,A3,40,5F),	\
+	V(16,1D,C3,72),	V(BC,E2,25,0C),	V(28,3C,49,8B),	V(FF,0D,95,41),	\
+	V(39,A8,01,71),	V(08,0C,B3,DE),	V(D8,B4,E4,9C),	V(64,56,C1,90),	\
+	V(7B,CB,84,61),	V(D5,32,B6,70),	V(48,6C,5C,74),	V(D0,B8,57,42)
+
+#define	V(a,b,c,d) 0x##a##b##c##d
+static uint32 RT0[256] = { RT };
+#undef V
+
+#define	V(a,b,c,d) 0x##d##a##b##c
+static uint32 RT1[256] = { RT };
+#undef V
+
+#define	V(a,b,c,d) 0x##c##d##a##b
+static uint32 RT2[256] = { RT };
+#undef V
+
+#define	V(a,b,c,d) 0x##b##c##d##a
+static uint32 RT3[256] = { RT };
+#undef V
+
+#undef RT
+
+/* round constants */
+
+static uint32 RCON[10] =
+{
+	0x01000000,	0x02000000,	0x04000000,	0x08000000,
+	0x10000000,	0x20000000,	0x40000000,	0x80000000,
+	0x1B000000,	0x36000000
+};
+
+/* key schedule	tables */
+
+static int KT_init = 1;
+
+static uint32 KT0[256];
+static uint32 KT1[256];
+static uint32 KT2[256];
+static uint32 KT3[256];
+
+/* platform-independant	32-bit integer manipulation	macros */
+
+#define	GET_UINT32(n,b,i)						\
+{												\
+	(n)	= (	(uint32) (b)[(i)	] << 24	)		\
+		| (	(uint32) (b)[(i) + 1] << 16	)		\
+		| (	(uint32) (b)[(i) + 2] <<  8	)		\
+		| (	(uint32) (b)[(i) + 3]		);		\
+}
+
+#define	PUT_UINT32(n,b,i)						\
+{												\
+	(b)[(i)	   ] = (uint8) ( (n) >>	24 );		\
+	(b)[(i)	+ 1] = (uint8) ( (n) >>	16 );		\
+	(b)[(i)	+ 2] = (uint8) ( (n) >>	 8 );		\
+	(b)[(i)	+ 3] = (uint8) ( (n)	   );		\
+}
+
+/* AES key scheduling routine */
+
+int	rtmp_aes_set_key( aes_context *ctx, uint8 *key, int nbits )
+{
+	int	i;
+	uint32 *RK,	*SK;
+
+	switch(	nbits )
+	{
+		case 128: ctx->nr =	10;	break;
+		case 192: ctx->nr =	12;	break;
+		case 256: ctx->nr =	14;	break;
+		default	: return( 1	);
+	}
+
+	RK = ctx->erk;
+
+	for( i = 0;	i <	(nbits >> 5); i++ )
+	{
+		GET_UINT32(	RK[i], key,	i *	4 );
+	}
+
+	/* setup encryption	round keys */
+
+	switch(	nbits )
+	{
+	case 128:
+
+		for( i = 0;	i <	10;	i++, RK	+= 4 )
+		{
+			RK[4]  = RK[0] ^ RCON[i] ^
+						( FSb[ (uint8) ( RK[3] >> 16 ) ] <<	24 ) ^
+						( FSb[ (uint8) ( RK[3] >>  8 ) ] <<	16 ) ^
+						( FSb[ (uint8) ( RK[3]		 ) ] <<	 8 ) ^
+						( FSb[ (uint8) ( RK[3] >> 24 ) ]	   );
+
+			RK[5]  = RK[1] ^ RK[4];
+			RK[6]  = RK[2] ^ RK[5];
+			RK[7]  = RK[3] ^ RK[6];
+		}
+		break;
+
+	case 192:
+
+		for( i = 0;	i <	8; i++,	RK += 6	)
+		{
+			RK[6]  = RK[0] ^ RCON[i] ^
+						( FSb[ (uint8) ( RK[5] >> 16 ) ] <<	24 ) ^
+						( FSb[ (uint8) ( RK[5] >>  8 ) ] <<	16 ) ^
+						( FSb[ (uint8) ( RK[5]		 ) ] <<	 8 ) ^
+						( FSb[ (uint8) ( RK[5] >> 24 ) ]	   );
+
+			RK[7]  = RK[1] ^ RK[6];
+			RK[8]  = RK[2] ^ RK[7];
+			RK[9]  = RK[3] ^ RK[8];
+			RK[10] = RK[4] ^ RK[9];
+			RK[11] = RK[5] ^ RK[10];
+		}
+		break;
+
+	case 256:
+
+		for( i = 0;	i <	7; i++,	RK += 8	)
+		{
+			RK[8]  = RK[0] ^ RCON[i] ^
+						( FSb[ (uint8) ( RK[7] >> 16 ) ] <<	24 ) ^
+						( FSb[ (uint8) ( RK[7] >>  8 ) ] <<	16 ) ^
+						( FSb[ (uint8) ( RK[7]		 ) ] <<	 8 ) ^
+						( FSb[ (uint8) ( RK[7] >> 24 ) ]	   );
+
+			RK[9]  = RK[1] ^ RK[8];
+			RK[10] = RK[2] ^ RK[9];
+			RK[11] = RK[3] ^ RK[10];
+
+			RK[12] = RK[4] ^
+						( FSb[ (uint8) ( RK[11]	>> 24 )	] << 24	) ^
+						( FSb[ (uint8) ( RK[11]	>> 16 )	] << 16	) ^
+						( FSb[ (uint8) ( RK[11]	>>	8 )	] <<  8	) ^
+						( FSb[ (uint8) ( RK[11]		  )	]		);
+
+			RK[13] = RK[5] ^ RK[12];
+			RK[14] = RK[6] ^ RK[13];
+			RK[15] = RK[7] ^ RK[14];
+		}
+		break;
+	}
+
+	/* setup decryption	round keys */
+
+	if(	KT_init	)
+	{
+		for( i = 0;	i <	256; i++ )
+		{
+			KT0[i] = RT0[ FSb[i] ];
+			KT1[i] = RT1[ FSb[i] ];
+			KT2[i] = RT2[ FSb[i] ];
+			KT3[i] = RT3[ FSb[i] ];
+		}
+
+		KT_init	= 0;
+	}
+
+	SK = ctx->drk;
+
+	*SK++ =	*RK++;
+	*SK++ =	*RK++;
+	*SK++ =	*RK++;
+	*SK++ =	*RK++;
+
+	for( i = 1;	i <	ctx->nr; i++ )
+	{
+		RK -= 8;
+
+		*SK++ =	KT0[ (uint8) ( *RK >> 24 ) ] ^
+				KT1[ (uint8) ( *RK >> 16 ) ] ^
+				KT2[ (uint8) ( *RK >>  8 ) ] ^
+				KT3[ (uint8) ( *RK		 ) ]; RK++;
+
+		*SK++ =	KT0[ (uint8) ( *RK >> 24 ) ] ^
+				KT1[ (uint8) ( *RK >> 16 ) ] ^
+				KT2[ (uint8) ( *RK >>  8 ) ] ^
+				KT3[ (uint8) ( *RK		 ) ]; RK++;
+
+		*SK++ =	KT0[ (uint8) ( *RK >> 24 ) ] ^
+				KT1[ (uint8) ( *RK >> 16 ) ] ^
+				KT2[ (uint8) ( *RK >>  8 ) ] ^
+				KT3[ (uint8) ( *RK		 ) ]; RK++;
+
+		*SK++ =	KT0[ (uint8) ( *RK >> 24 ) ] ^
+				KT1[ (uint8) ( *RK >> 16 ) ] ^
+				KT2[ (uint8) ( *RK >>  8 ) ] ^
+				KT3[ (uint8) ( *RK		 ) ]; RK++;
+	}
+
+	RK -= 8;
+
+	*SK++ =	*RK++;
+	*SK++ =	*RK++;
+	*SK++ =	*RK++;
+	*SK++ =	*RK++;
+
+	return(	0 );
+}
+
+/* AES 128-bit block encryption	routine	*/
+
+void rtmp_aes_encrypt(aes_context *ctx, uint8 input[16],	uint8 output[16] )
+{
+	uint32 *RK,	X0,	X1,	X2,	X3,	Y0,	Y1,	Y2,	Y3;
+
+	RK = ctx->erk;
+	GET_UINT32(	X0,	input,	0 ); X0	^= RK[0];
+	GET_UINT32(	X1,	input,	4 ); X1	^= RK[1];
+	GET_UINT32(	X2,	input,	8 ); X2	^= RK[2];
+	GET_UINT32(	X3,	input, 12 ); X3	^= RK[3];
+
+#define	AES_FROUND(X0,X1,X2,X3,Y0,Y1,Y2,Y3)		\
+{												\
+	RK += 4;									\
+												\
+	X0 = RK[0] ^ FT0[ (uint8) (	Y0 >> 24 ) ] ^	\
+				 FT1[ (uint8) (	Y1 >> 16 ) ] ^	\
+				 FT2[ (uint8) (	Y2 >>  8 ) ] ^	\
+				 FT3[ (uint8) (	Y3		 ) ];	\
+												\
+	X1 = RK[1] ^ FT0[ (uint8) (	Y1 >> 24 ) ] ^	\
+				 FT1[ (uint8) (	Y2 >> 16 ) ] ^	\
+				 FT2[ (uint8) (	Y3 >>  8 ) ] ^	\
+				 FT3[ (uint8) (	Y0		 ) ];	\
+												\
+	X2 = RK[2] ^ FT0[ (uint8) (	Y2 >> 24 ) ] ^	\
+				 FT1[ (uint8) (	Y3 >> 16 ) ] ^	\
+				 FT2[ (uint8) (	Y0 >>  8 ) ] ^	\
+				 FT3[ (uint8) (	Y1		 ) ];	\
+												\
+	X3 = RK[3] ^ FT0[ (uint8) (	Y3 >> 24 ) ] ^	\
+				 FT1[ (uint8) (	Y0 >> 16 ) ] ^	\
+				 FT2[ (uint8) (	Y1 >>  8 ) ] ^	\
+				 FT3[ (uint8) (	Y2		 ) ];	\
+}
+
+	AES_FROUND(	Y0,	Y1,	Y2,	Y3,	X0,	X1,	X2,	X3 );		/* round 1 */
+	AES_FROUND(	X0,	X1,	X2,	X3,	Y0,	Y1,	Y2,	Y3 );		/* round 2 */
+	AES_FROUND(	Y0,	Y1,	Y2,	Y3,	X0,	X1,	X2,	X3 );		/* round 3 */
+	AES_FROUND(	X0,	X1,	X2,	X3,	Y0,	Y1,	Y2,	Y3 );		/* round 4 */
+	AES_FROUND(	Y0,	Y1,	Y2,	Y3,	X0,	X1,	X2,	X3 );		/* round 5 */
+	AES_FROUND(	X0,	X1,	X2,	X3,	Y0,	Y1,	Y2,	Y3 );		/* round 6 */
+	AES_FROUND(	Y0,	Y1,	Y2,	Y3,	X0,	X1,	X2,	X3 );		/* round 7 */
+	AES_FROUND(	X0,	X1,	X2,	X3,	Y0,	Y1,	Y2,	Y3 );		/* round 8 */
+	AES_FROUND(	Y0,	Y1,	Y2,	Y3,	X0,	X1,	X2,	X3 );		/* round 9 */
+
+	if(	ctx->nr	> 10 )
+	{
+		AES_FROUND(	X0,	X1,	X2,	X3,	Y0,	Y1,	Y2,	Y3 );	/* round 10	*/
+		AES_FROUND(	Y0,	Y1,	Y2,	Y3,	X0,	X1,	X2,	X3 );	/* round 11	*/
+	}
+
+	if(	ctx->nr	> 12 )
+	{
+		AES_FROUND(	X0,	X1,	X2,	X3,	Y0,	Y1,	Y2,	Y3 );	/* round 12	*/
+		AES_FROUND(	Y0,	Y1,	Y2,	Y3,	X0,	X1,	X2,	X3 );	/* round 13	*/
+	}
+
+	/* last	round */
+
+	RK += 4;
+
+	X0 = RK[0] ^ ( FSb[	(uint8)	( Y0 >>	24 ) ] << 24 ) ^
+				 ( FSb[	(uint8)	( Y1 >>	16 ) ] << 16 ) ^
+				 ( FSb[	(uint8)	( Y2 >>	 8 ) ] <<  8 ) ^
+				 ( FSb[	(uint8)	( Y3	   ) ]		 );
+
+	X1 = RK[1] ^ ( FSb[	(uint8)	( Y1 >>	24 ) ] << 24 ) ^
+				 ( FSb[	(uint8)	( Y2 >>	16 ) ] << 16 ) ^
+				 ( FSb[	(uint8)	( Y3 >>	 8 ) ] <<  8 ) ^
+				 ( FSb[	(uint8)	( Y0	   ) ]		 );
+
+	X2 = RK[2] ^ ( FSb[	(uint8)	( Y2 >>	24 ) ] << 24 ) ^
+				 ( FSb[	(uint8)	( Y3 >>	16 ) ] << 16 ) ^
+				 ( FSb[	(uint8)	( Y0 >>	 8 ) ] <<  8 ) ^
+				 ( FSb[	(uint8)	( Y1	   ) ]		 );
+
+	X3 = RK[3] ^ ( FSb[	(uint8)	( Y3 >>	24 ) ] << 24 ) ^
+				 ( FSb[	(uint8)	( Y0 >>	16 ) ] << 16 ) ^
+				 ( FSb[	(uint8)	( Y1 >>	 8 ) ] <<  8 ) ^
+				 ( FSb[	(uint8)	( Y2	   ) ]		 );
+
+	PUT_UINT32(	X0,	output,	 0 );
+	PUT_UINT32(	X1,	output,	 4 );
+	PUT_UINT32(	X2,	output,	 8 );
+	PUT_UINT32(	X3,	output,	12 );
+}
+
+/* AES 128-bit block decryption	routine	*/
+
+void rtmp_aes_decrypt( aes_context *ctx,	uint8 input[16], uint8 output[16] )
+{
+	uint32 *RK,	X0,	X1,	X2,	X3,	Y0,	Y1,	Y2,	Y3;
+
+	RK = ctx->drk;
+
+	GET_UINT32(	X0,	input,	0 ); X0	^= RK[0];
+	GET_UINT32(	X1,	input,	4 ); X1	^= RK[1];
+	GET_UINT32(	X2,	input,	8 ); X2	^= RK[2];
+	GET_UINT32(	X3,	input, 12 ); X3	^= RK[3];
+
+#define	AES_RROUND(X0,X1,X2,X3,Y0,Y1,Y2,Y3)		\
+{												\
+	RK += 4;									\
+												\
+	X0 = RK[0] ^ RT0[ (uint8) (	Y0 >> 24 ) ] ^	\
+				 RT1[ (uint8) (	Y3 >> 16 ) ] ^	\
+				 RT2[ (uint8) (	Y2 >>  8 ) ] ^	\
+				 RT3[ (uint8) (	Y1		 ) ];	\
+												\
+	X1 = RK[1] ^ RT0[ (uint8) (	Y1 >> 24 ) ] ^	\
+				 RT1[ (uint8) (	Y0 >> 16 ) ] ^	\
+				 RT2[ (uint8) (	Y3 >>  8 ) ] ^	\
+				 RT3[ (uint8) (	Y2		 ) ];	\
+												\
+	X2 = RK[2] ^ RT0[ (uint8) (	Y2 >> 24 ) ] ^	\
+				 RT1[ (uint8) (	Y1 >> 16 ) ] ^	\
+				 RT2[ (uint8) (	Y0 >>  8 ) ] ^	\
+				 RT3[ (uint8) (	Y3		 ) ];	\
+												\
+	X3 = RK[3] ^ RT0[ (uint8) (	Y3 >> 24 ) ] ^	\
+				 RT1[ (uint8) (	Y2 >> 16 ) ] ^	\
+				 RT2[ (uint8) (	Y1 >>  8 ) ] ^	\
+				 RT3[ (uint8) (	Y0		 ) ];	\
+}
+
+	AES_RROUND(	Y0,	Y1,	Y2,	Y3,	X0,	X1,	X2,	X3 );		/* round 1 */
+	AES_RROUND(	X0,	X1,	X2,	X3,	Y0,	Y1,	Y2,	Y3 );		/* round 2 */
+	AES_RROUND(	Y0,	Y1,	Y2,	Y3,	X0,	X1,	X2,	X3 );		/* round 3 */
+	AES_RROUND(	X0,	X1,	X2,	X3,	Y0,	Y1,	Y2,	Y3 );		/* round 4 */
+	AES_RROUND(	Y0,	Y1,	Y2,	Y3,	X0,	X1,	X2,	X3 );		/* round 5 */
+	AES_RROUND(	X0,	X1,	X2,	X3,	Y0,	Y1,	Y2,	Y3 );		/* round 6 */
+	AES_RROUND(	Y0,	Y1,	Y2,	Y3,	X0,	X1,	X2,	X3 );		/* round 7 */
+	AES_RROUND(	X0,	X1,	X2,	X3,	Y0,	Y1,	Y2,	Y3 );		/* round 8 */
+	AES_RROUND(	Y0,	Y1,	Y2,	Y3,	X0,	X1,	X2,	X3 );		/* round 9 */
+
+	if(	ctx->nr	> 10 )
+	{
+		AES_RROUND(	X0,	X1,	X2,	X3,	Y0,	Y1,	Y2,	Y3 );	/* round 10	*/
+		AES_RROUND(	Y0,	Y1,	Y2,	Y3,	X0,	X1,	X2,	X3 );	/* round 11	*/
+	}
+
+	if(	ctx->nr	> 12 )
+	{
+		AES_RROUND(	X0,	X1,	X2,	X3,	Y0,	Y1,	Y2,	Y3 );	/* round 12	*/
+		AES_RROUND(	Y0,	Y1,	Y2,	Y3,	X0,	X1,	X2,	X3 );	/* round 13	*/
+	}
+
+	/* last	round */
+
+	RK += 4;
+
+	X0 = RK[0] ^ ( RSb[	(uint8)	( Y0 >>	24 ) ] << 24 ) ^
+				 ( RSb[	(uint8)	( Y3 >>	16 ) ] << 16 ) ^
+				 ( RSb[	(uint8)	( Y2 >>	 8 ) ] <<  8 ) ^
+				 ( RSb[	(uint8)	( Y1	   ) ]		 );
+
+	X1 = RK[1] ^ ( RSb[	(uint8)	( Y1 >>	24 ) ] << 24 ) ^
+				 ( RSb[	(uint8)	( Y0 >>	16 ) ] << 16 ) ^
+				 ( RSb[	(uint8)	( Y3 >>	 8 ) ] <<  8 ) ^
+				 ( RSb[	(uint8)	( Y2	   ) ]		 );
+
+	X2 = RK[2] ^ ( RSb[	(uint8)	( Y2 >>	24 ) ] << 24 ) ^
+				 ( RSb[	(uint8)	( Y1 >>	16 ) ] << 16 ) ^
+				 ( RSb[	(uint8)	( Y0 >>	 8 ) ] <<  8 ) ^
+				 ( RSb[	(uint8)	( Y3	   ) ]		 );
+
+	X3 = RK[3] ^ ( RSb[	(uint8)	( Y3 >>	24 ) ] << 24 ) ^
+				 ( RSb[	(uint8)	( Y2 >>	16 ) ] << 16 ) ^
+				 ( RSb[	(uint8)	( Y1 >>	 8 ) ] <<  8 ) ^
+				 ( RSb[	(uint8)	( Y0	   ) ]		 );
+
+	PUT_UINT32(	X0,	output,	 0 );
+	PUT_UINT32(	X1,	output,	 4 );
+	PUT_UINT32(	X2,	output,	 8 );
+	PUT_UINT32(	X3,	output,	12 );
+}
+
+/*
+    ==========================================================================
+    Description:
+        ENCRYPT AES GTK before sending in EAPOL frame.
+        AES GTK length = 128 bit,  so fix blocks for aes-key-wrap as 2 in this function.
+        This function references to RFC 3394 for aes key wrap algorithm.
+    Return:
+    ==========================================================================
+*/  
+VOID AES_GTK_KEY_WRAP( 
+    IN UCHAR    *key,
+    IN UCHAR    *plaintext,
+    IN UINT     p_len,
+    OUT UCHAR   *ciphertext,
+	OUT UINT    *c_len) 
+{
+    UCHAR       A[8], BIN[16], BOUT[16];
+/*    UCHAR       R[512];
+*/
+	UCHAR		*R = NULL;
+    INT         num_blocks = p_len/8;   /* unit:64bits
+*/
+    INT         i, j;
+/*    aes_context aesctx;
+*/
+	aes_context *paesctx = NULL;
+    UCHAR       xor;
+
+
+	/* allocate memory */
+	os_alloc_mem(NULL, (UCHAR **)&R, 512);
+	if (R == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+		goto LabelErr;
+	}
+	os_alloc_mem(NULL, (UCHAR **)&paesctx, sizeof(aes_context));
+	if (paesctx == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+		goto LabelErr;
+	}
+
+    rtmp_aes_set_key(paesctx, key, 128);
+
+    /* Init IA
+*/
+    for (i = 0; i < 8; i++)
+        A[i] = 0xa6;
+
+    /*Input plaintext
+*/
+    for (i = 0; i < num_blocks; i++)
+    {
+        for (j = 0 ; j < 8; j++)
+            R[8 * (i + 1) + j] = plaintext[8 * i + j];
+    }
+
+    /* Key Mix
+*/
+    for (j = 0; j < 6; j++)
+    {
+        for(i = 1; i <= num_blocks; i++)
+        {
+            /*phase 1
+*/
+            NdisMoveMemory(BIN, A, 8);
+            NdisMoveMemory(&BIN[8], &R[8 * i], 8);
+            rtmp_aes_encrypt(paesctx, BIN, BOUT);
+
+            NdisMoveMemory(A, &BOUT[0], 8);
+            xor = num_blocks * j + i;
+            A[7] = BOUT[7] ^ xor;
+            NdisMoveMemory(&R[8 * i], &BOUT[8], 8);
+        }
+    }
+
+    /* Output ciphertext
+*/
+    NdisMoveMemory(ciphertext, A, 8);
+
+    for (i = 1; i <= num_blocks; i++)
+    {
+        for (j = 0 ; j < 8; j++)
+            ciphertext[8 * i + j] = R[8 * i + j];
+    }
+    *c_len = p_len + 8;
+
+LabelErr:
+	if (R != NULL)
+		os_free_mem(NULL, R);
+	if (paesctx != NULL)
+		os_free_mem(NULL, paesctx);
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Misc function to decrypt AES body
+	
+	Arguments:
+			
+	Return Value:
+	
+	Note:
+		This function references to	RFC	3394 for aes key unwrap algorithm.
+			
+	========================================================================
+*/
+VOID	AES_GTK_KEY_UNWRAP( 
+	IN	UCHAR	*key,
+	OUT	UCHAR	*plaintext,
+	OUT	UINT    *p_len,
+	IN	UCHAR	*ciphertext,
+	IN	UINT    c_len)
+	
+{
+	UCHAR       A[8], BIN[16], BOUT[16];
+	UCHAR       xor;
+	INT         i, j;
+/*	aes_context aesctx;
+*/
+	aes_context *paesctx = NULL;
+	UCHAR       *R = NULL;
+	INT         num_blocks = c_len/8;	/* unit:64bits
+*/
+
+	
+	os_alloc_mem(NULL, (PUCHAR *)&R, 512);
+	if (R == NULL)
+    {
+        DBGPRINT(RT_DEBUG_ERROR, ("!!!AES_GTK_KEY_UNWRAP: no memory!!!\n"));
+        return;
+    } /* End of if */
+
+	os_alloc_mem(NULL, (UCHAR **)&paesctx, sizeof(aes_context));
+	if (paesctx == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("!!!AES_GTK_KEY_UNWRAP: no memory!!!\n"));
+		goto LabelOK;
+	}
+
+	/* Initialize
+*/
+	NdisMoveMemory(A, ciphertext, 8);
+	/*Input plaintext
+*/
+	for(i = 0; i < (c_len-8); i++)
+	{
+		R[ i] = ciphertext[i + 8];
+	}
+
+	rtmp_aes_set_key(paesctx, key, 128);
+
+	for(j = 5; j >= 0; j--)
+	{
+		for(i = (num_blocks-1); i > 0; i--)
+		{
+			xor = (num_blocks -1 )* j + i;
+			NdisMoveMemory(BIN, A, 8);
+			BIN[7] = A[7] ^ xor;
+			NdisMoveMemory(&BIN[8], &R[(i-1)*8], 8);
+			rtmp_aes_decrypt(paesctx, BIN, BOUT);
+			NdisMoveMemory(A, &BOUT[0], 8);
+			NdisMoveMemory(&R[(i-1)*8], &BOUT[8], 8);
+		}
+	}
+
+	/* OUTPUT
+*/
+	for(i = 0; i < c_len; i++)
+	{
+		plaintext[i] = R[i];
+	}
+
+	DBGPRINT_RAW(RT_DEBUG_INFO, ("plaintext = \n"));
+	for(i = 0; i < (num_blocks *8); i++)
+	{
+		DBGPRINT_RAW(RT_DEBUG_INFO, ("%2x ", plaintext[i]));
+		if(i%16 == 15)
+			DBGPRINT_RAW(RT_DEBUG_INFO, ("\n "));
+	}
+	DBGPRINT_RAW(RT_DEBUG_INFO, ("\n  \n"));	
+
+    *p_len = c_len - 8;    
+
+LabelOK:
+	if (R != NULL)
+		os_free_mem(NULL, R);
+
+	if (paesctx != NULL)
+		os_free_mem(NULL, paesctx);
+}
+
+
+/* The value given by [x^(i-1),{00},{00},{00}], with x^(i-1) being powers of x in the field GF(2^8). */
+static const UINT32 aes_rcon[] = {
+	0x00000000, 0x01000000, 0x02000000, 0x04000000, 
+    0x08000000, 0x10000000, 0x20000000, 0x40000000, 
+    0x80000000, 0x1B000000, 0x36000000};
+
+static const UINT8 aes_sbox_enc[] = {
+  /*  0     1     2     3     4     5     6     7     8     9     a     b     c     d     e     f    */
+    0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7 ,0xab, 0x76, /* 0 */
+    0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0, 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4 ,0x72, 0xc0, /* 1 */
+    0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc, 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8 ,0x31, 0x15, /* 2 */
+    0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a, 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27 ,0xb2, 0x75, /* 3 */
+    0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0, 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3 ,0x2f, 0x84, /* 4 */
+    0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b, 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c ,0x58, 0xcf, /* 5 */
+    0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85, 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c ,0x9f, 0xa8, /* 6 */
+    0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5, 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff ,0xf3, 0xd2, /* 7 */
+    0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17, 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d ,0x19, 0x73, /* 8 */
+    0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88, 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e ,0x0b, 0xdb, /* 9 */
+    0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c, 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95 ,0xe4, 0x79, /* a */
+    0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9, 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a ,0xae, 0x08, /* b */
+    0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6, 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd ,0x8b, 0x8a, /* c */
+    0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e, 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1 ,0x1d, 0x9e, /* d */
+    0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94, 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55 ,0x28, 0xdf, /* e */
+    0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54 ,0xbb, 0x16, /* f */
+};
+
+static const UINT8 aes_sbox_dec[] = {
+  /*  0     1     2     3     4     5     6     7     8     9     a     b     c     d     e     f    */
+    0x52, 0x09, 0x6a, 0xd5, 0x30, 0x36, 0xa5, 0x38, 0xbf, 0x40, 0xa3, 0x9e, 0x81, 0xf3, 0xd7, 0xfb, /* 0 */
+    0x7c, 0xe3, 0x39, 0x82, 0x9b, 0x2f, 0xff, 0x87, 0x34, 0x8e, 0x43, 0x44, 0xc4, 0xde, 0xe9, 0xcb, /* 1 */
+    0x54, 0x7b, 0x94, 0x32, 0xa6, 0xc2, 0x23, 0x3d, 0xee, 0x4c, 0x95, 0x0b, 0x42, 0xfa, 0xc3, 0x4e, /* 2 */
+    0x08, 0x2e, 0xa1, 0x66, 0x28, 0xd9, 0x24, 0xb2, 0x76, 0x5b, 0xa2, 0x49, 0x6d, 0x8b, 0xd1, 0x25, /* 3 */
+    0x72, 0xf8, 0xf6, 0x64, 0x86, 0x68, 0x98, 0x16, 0xd4, 0xa4, 0x5c, 0xcc, 0x5d, 0x65, 0xb6, 0x92, /* 4 */
+    0x6c, 0x70, 0x48, 0x50, 0xfd, 0xed, 0xb9, 0xda, 0x5e, 0x15, 0x46, 0x57, 0xa7, 0x8d, 0x9d, 0x84, /* 5 */
+    0x90, 0xd8, 0xab, 0x00, 0x8c, 0xbc, 0xd3, 0x0a, 0xf7, 0xe4, 0x58, 0x05, 0xb8, 0xb3, 0x45, 0x06, /* 6 */
+    0xd0, 0x2c, 0x1e, 0x8f, 0xca, 0x3f, 0x0f, 0x02, 0xc1, 0xaf, 0xbd, 0x03, 0x01, 0x13, 0x8a, 0x6b, /* 7 */
+    0x3a, 0x91, 0x11, 0x41, 0x4f, 0x67, 0xdc, 0xea, 0x97, 0xf2, 0xcf, 0xce, 0xf0, 0xb4, 0xe6, 0x73, /* 8 */
+    0x96, 0xac, 0x74, 0x22, 0xe7, 0xad, 0x35, 0x85, 0xe2, 0xf9, 0x37, 0xe8, 0x1c, 0x75, 0xdf, 0x6e, /* 9 */
+    0x47, 0xf1, 0x1a, 0x71, 0x1d, 0x29, 0xc5, 0x89, 0x6f, 0xb7, 0x62, 0x0e, 0xaa, 0x18, 0xbe, 0x1b, /* a */
+    0xfc, 0x56, 0x3e, 0x4b, 0xc6, 0xd2, 0x79, 0x20, 0x9a, 0xdb, 0xc0, 0xfe, 0x78, 0xcd, 0x5a, 0xf4, /* b */
+    0x1f, 0xdd, 0xa8, 0x33, 0x88, 0x07, 0xc7, 0x31, 0xb1, 0x12, 0x10, 0x59, 0x27, 0x80, 0xec, 0x5f, /* c */
+    0x60, 0x51, 0x7f, 0xa9, 0x19, 0xb5, 0x4a, 0x0d, 0x2d, 0xe5, 0x7a, 0x9f, 0x93, 0xc9, 0x9c, 0xef, /* d */
+    0xa0, 0xe0, 0x3b, 0x4d, 0xae, 0x2a, 0xf5, 0xb0, 0xc8, 0xeb, 0xbb, 0x3c, 0x83, 0x53, 0x99, 0x61, /* e */
+    0x17, 0x2b, 0x04, 0x7e, 0xba, 0x77, 0xd6, 0x26, 0xe1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0c, 0x7d, /* f */
+};
+
+/* ArrayIndex*{02} */
+static const UINT8 aes_mul_2[] = {
+  /*  0     1     2     3     4     5     6     7     8     9     a     b     c     d     e     f    */
+    0x00, 0x02, 0x04, 0x06, 0x08, 0x0a, 0x0c, 0x0e, 0x10, 0x12, 0x14, 0x16, 0x18, 0x1a, 0x1c, 0x1e, /* 0 */
+    0x20, 0x22, 0x24, 0x26, 0x28, 0x2a, 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x3a, 0x3c, 0x3e, /* 1 */
+    0x40, 0x42, 0x44, 0x46, 0x48, 0x4a, 0x4c, 0x4e, 0x50, 0x52, 0x54, 0x56, 0x58, 0x5a, 0x5c, 0x5e, /* 2 */
+    0x60, 0x62, 0x64, 0x66, 0x68, 0x6a, 0x6c, 0x6e, 0x70, 0x72, 0x74, 0x76, 0x78, 0x7a, 0x7c, 0x7e, /* 3 */
+    0x80, 0x82, 0x84, 0x86, 0x88, 0x8a, 0x8c, 0x8e, 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9c, 0x9e, /* 4 */
+    0xa0, 0xa2, 0xa4, 0xa6, 0xa8, 0xaa, 0xac, 0xae, 0xb0, 0xb2, 0xb4, 0xb6, 0xb8, 0xba, 0xbc, 0xbe, /* 5 */
+    0xc0, 0xc2, 0xc4, 0xc6, 0xc8, 0xca, 0xcc, 0xce, 0xd0, 0xd2, 0xd4, 0xd6, 0xd8, 0xda, 0xdc, 0xde, /* 6 */
+    0xe0, 0xe2, 0xe4, 0xe6, 0xe8, 0xea, 0xec, 0xee, 0xf0, 0xf2, 0xf4, 0xf6, 0xf8, 0xfa, 0xfc, 0xfe, /* 7 */
+    0x1b, 0x19, 0x1f, 0x1d, 0x13, 0x11, 0x17, 0x15, 0x0b, 0x09, 0x0f, 0x0d, 0x03, 0x01, 0x07, 0x05, /* 8 */
+    0x3b, 0x39, 0x3f, 0x3d, 0x33, 0x31, 0x37, 0x35, 0x2b, 0x29, 0x2f, 0x2d, 0x23, 0x21, 0x27, 0x25, /* 9 */
+    0x5b, 0x59, 0x5f, 0x5d, 0x53, 0x51, 0x57, 0x55, 0x4b, 0x49, 0x4f, 0x4d, 0x43, 0x41, 0x47, 0x45, /* a */
+    0x7b, 0x79, 0x7f, 0x7d, 0x73, 0x71, 0x77, 0x75, 0x6b, 0x69, 0x6f, 0x6d, 0x63, 0x61, 0x67, 0x65, /* b */
+    0x9b, 0x99, 0x9f, 0x9d, 0x93, 0x91, 0x97, 0x95, 0x8b, 0x89, 0x8f, 0x8d, 0x83, 0x81, 0x87, 0x85, /* c */
+    0xbb, 0xb9, 0xbf, 0xbd, 0xb3, 0xb1, 0xb7, 0xb5, 0xab, 0xa9, 0xaf, 0xad, 0xa3, 0xa1, 0xa7, 0xa5, /* d */
+    0xdb, 0xd9, 0xdf, 0xdd, 0xd3, 0xd1, 0xd7, 0xd5, 0xcb, 0xc9, 0xcf, 0xcd, 0xc3, 0xc1, 0xc7, 0xc5, /* e */
+    0xfb, 0xf9, 0xff, 0xfd, 0xf3, 0xf1, 0xf7, 0xf5, 0xeb, 0xe9, 0xef, 0xed, 0xe3, 0xe1, 0xe7, 0xe5, /* f */
+};
+
+/* ArrayIndex*{03} */
+static const UINT8 aes_mul_3[] = {
+  /*  0     1     2     3     4     5     6     7     8     9     a     b     c     d     e     f    */
+    0x00, 0x03, 0x06, 0x05, 0x0c, 0x0f, 0x0a, 0x09, 0x18, 0x1b, 0x1e, 0x1d, 0x14, 0x17, 0x12, 0x11, /* 0 */
+    0x30, 0x33, 0x36, 0x35, 0x3c, 0x3f, 0x3a, 0x39, 0x28, 0x2b, 0x2e, 0x2d, 0x24, 0x27, 0x22, 0x21, /* 1 */
+    0x60, 0x63, 0x66, 0x65, 0x6c, 0x6f, 0x6a, 0x69, 0x78, 0x7b, 0x7e, 0x7d, 0x74, 0x77, 0x72, 0x71, /* 2 */
+    0x50, 0x53, 0x56, 0x55, 0x5c, 0x5f, 0x5a, 0x59, 0x48, 0x4b, 0x4e, 0x4d, 0x44, 0x47, 0x42, 0x41, /* 3 */
+    0xc0, 0xc3, 0xc6, 0xc5, 0xcc, 0xcf, 0xca, 0xc9, 0xd8, 0xdb, 0xde, 0xdd, 0xd4, 0xd7, 0xd2, 0xd1, /* 4 */
+    0xf0, 0xf3, 0xf6, 0xf5, 0xfc, 0xff, 0xfa, 0xf9, 0xe8, 0xeb, 0xee, 0xed, 0xe4, 0xe7, 0xe2, 0xe1, /* 5 */
+    0xa0, 0xa3, 0xa6, 0xa5, 0xac, 0xaf, 0xaa, 0xa9, 0xb8, 0xbb, 0xbe, 0xbd, 0xb4, 0xb7, 0xb2, 0xb1, /* 6 */
+    0x90, 0x93, 0x96, 0x95, 0x9c, 0x9f, 0x9a, 0x99, 0x88, 0x8b, 0x8e, 0x8d, 0x84, 0x87, 0x82, 0x81, /* 7 */
+    0x9b, 0x98, 0x9d, 0x9e, 0x97, 0x94, 0x91, 0x92, 0x83, 0x80, 0x85, 0x86, 0x8f, 0x8c, 0x89, 0x8a, /* 8 */
+    0xab, 0xa8, 0xad, 0xae, 0xa7, 0xa4, 0xa1, 0xa2, 0xb3, 0xb0, 0xb5, 0xb6, 0xbf, 0xbc, 0xb9, 0xba, /* 9 */
+    0xfb, 0xf8, 0xfd, 0xfe, 0xf7, 0xf4, 0xf1, 0xf2, 0xe3, 0xe0, 0xe5, 0xe6, 0xef, 0xec, 0xe9, 0xea, /* a */
+    0xcb, 0xc8, 0xcd, 0xce, 0xc7, 0xc4, 0xc1, 0xc2, 0xd3, 0xd0, 0xd5, 0xd6, 0xdf, 0xdc, 0xd9, 0xda, /* b */
+    0x5b, 0x58, 0x5d, 0x5e, 0x57, 0x54, 0x51, 0x52, 0x43, 0x40, 0x45, 0x46, 0x4f, 0x4c, 0x49, 0x4a, /* c */
+    0x6b, 0x68, 0x6d, 0x6e, 0x67, 0x64, 0x61, 0x62, 0x73, 0x70, 0x75, 0x76, 0x7f, 0x7c, 0x79, 0x7a, /* d */
+    0x3b, 0x38, 0x3d, 0x3e, 0x37, 0x34, 0x31, 0x32, 0x23, 0x20, 0x25, 0x26, 0x2f, 0x2c, 0x29, 0x2a, /* e */
+    0x0b, 0x08, 0x0d, 0x0e, 0x07, 0x04, 0x01, 0x02, 0x13, 0x10, 0x15, 0x16, 0x1f, 0x1c, 0x19, 0x1a, /* f */
+};
+
+/* ArrayIndex*{09} */
+static const UINT8 aes_mul_9[] = {
+  /*  0     1     2     3     4     5     6     7     8     9     a     b     c     d     e     f    */
+    0x00, 0x09, 0x12, 0x1b, 0x24, 0x2d, 0x36, 0x3f, 0x48, 0x41, 0x5a, 0x53, 0x6c, 0x65, 0x7e, 0x77, /* 0 */
+    0x90, 0x99, 0x82, 0x8b, 0xb4, 0xbd, 0xa6, 0xaf, 0xd8, 0xd1, 0xca, 0xc3, 0xfc, 0xf5, 0xee, 0xe7, /* 1 */
+    0x3b, 0x32, 0x29, 0x20, 0x1f, 0x16, 0x0d, 0x04, 0x73, 0x7a, 0x61, 0x68, 0x57, 0x5e, 0x45, 0x4c, /* 2 */
+    0xab, 0xa2, 0xb9, 0xb0, 0x8f, 0x86, 0x9d, 0x94, 0xe3, 0xea, 0xf1, 0xf8, 0xc7, 0xce, 0xd5, 0xdc, /* 3 */
+    0x76, 0x7f, 0x64, 0x6d, 0x52, 0x5b, 0x40, 0x49, 0x3e, 0x37, 0x2c, 0x25, 0x1a, 0x13, 0x08, 0x01, /* 4 */
+    0xe6, 0xef, 0xf4, 0xfd, 0xc2, 0xcb, 0xd0, 0xd9, 0xae, 0xa7, 0xbc, 0xb5, 0x8a, 0x83, 0x98, 0x91, /* 5 */
+    0x4d, 0x44, 0x5f, 0x56, 0x69, 0x60, 0x7b, 0x72, 0x05, 0x0c, 0x17, 0x1e, 0x21, 0x28, 0x33, 0x3a, /* 6 */
+    0xdd, 0xd4, 0xcf, 0xc6, 0xf9, 0xf0, 0xeb, 0xe2, 0x95, 0x9c, 0x87, 0x8e, 0xb1, 0xb8, 0xa3, 0xaa, /* 7 */
+    0xec, 0xe5, 0xfe, 0xf7, 0xc8, 0xc1, 0xda, 0xd3, 0xa4, 0xad, 0xb6, 0xbf, 0x80, 0x89, 0x92, 0x9b, /* 8 */
+    0x7c, 0x75, 0x6e, 0x67, 0x58, 0x51, 0x4a, 0x43, 0x34, 0x3d, 0x26, 0x2f, 0x10, 0x19, 0x02, 0x0b, /* 9 */
+    0xd7, 0xde, 0xc5, 0xcc, 0xf3, 0xfa, 0xe1, 0xe8, 0x9f, 0x96, 0x8d, 0x84, 0xbb, 0xb2, 0xa9, 0xa0, /* a */
+    0x47, 0x4e, 0x55, 0x5c, 0x63, 0x6a, 0x71, 0x78, 0x0f, 0x06, 0x1d, 0x14, 0x2b, 0x22, 0x39, 0x30, /* b */
+    0x9a, 0x93, 0x88, 0x81, 0xbe, 0xb7, 0xac, 0xa5, 0xd2, 0xdb, 0xc0, 0xc9, 0xf6, 0xff, 0xe4, 0xed, /* c */
+    0x0a, 0x03, 0x18, 0x11, 0x2e, 0x27, 0x3c, 0x35, 0x42, 0x4b, 0x50, 0x59, 0x66, 0x6f, 0x74, 0x7d, /* d */
+    0xa1, 0xa8, 0xb3, 0xba, 0x85, 0x8c, 0x97, 0x9e, 0xe9, 0xe0, 0xfb, 0xf2, 0xcd, 0xc4, 0xdf, 0xd6, /* e */
+    0x31, 0x38, 0x23, 0x2a, 0x15, 0x1c, 0x07, 0x0e, 0x79, 0x70, 0x6b, 0x62, 0x5d, 0x54, 0x4f, 0x46, /* f */
+};
+
+/* ArrayIndex*{0b} */
+static const UINT8 aes_mul_b[] = {
+  /*  0     1     2     3     4     5     6     7     8     9     a     b     c     d     e     f    */
+    0x00, 0x0b, 0x16, 0x1d, 0x2c, 0x27, 0x3a, 0x31, 0x58, 0x53, 0x4e, 0x45, 0x74, 0x7f, 0x62, 0x69, /* 0 */
+    0xb0, 0xbb, 0xa6, 0xad, 0x9c, 0x97, 0x8a, 0x81, 0xe8, 0xe3, 0xfe, 0xf5, 0xc4, 0xcf, 0xd2, 0xd9, /* 1 */
+    0x7b, 0x70, 0x6d, 0x66, 0x57, 0x5c, 0x41, 0x4a, 0x23, 0x28, 0x35, 0x3e, 0x0f, 0x04, 0x19, 0x12, /* 2 */
+    0xcb, 0xc0, 0xdd, 0xd6, 0xe7, 0xec, 0xf1, 0xfa, 0x93, 0x98, 0x85, 0x8e, 0xbf, 0xb4, 0xa9, 0xa2, /* 3 */
+    0xf6, 0xfd, 0xe0, 0xeb, 0xda, 0xd1, 0xcc, 0xc7, 0xae, 0xa5, 0xb8, 0xb3, 0x82, 0x89, 0x94, 0x9f, /* 4 */
+    0x46, 0x4d, 0x50, 0x5b, 0x6a, 0x61, 0x7c, 0x77, 0x1e, 0x15, 0x08, 0x03, 0x32, 0x39, 0x24, 0x2f, /* 5 */
+    0x8d, 0x86, 0x9b, 0x90, 0xa1, 0xaa, 0xb7, 0xbc, 0xd5, 0xde, 0xc3, 0xc8, 0xf9, 0xf2, 0xef, 0xe4, /* 6 */
+    0x3d, 0x36, 0x2b, 0x20, 0x11, 0x1a, 0x07, 0x0c, 0x65, 0x6e, 0x73, 0x78, 0x49, 0x42, 0x5f, 0x54, /* 7 */
+    0xf7, 0xfc, 0xe1, 0xea, 0xdb, 0xd0, 0xcd, 0xc6, 0xaf, 0xa4, 0xb9, 0xb2, 0x83, 0x88, 0x95, 0x9e, /* 8 */
+    0x47, 0x4c, 0x51, 0x5a, 0x6b, 0x60, 0x7d, 0x76, 0x1f, 0x14, 0x09, 0x02, 0x33, 0x38, 0x25, 0x2e, /* 9 */
+    0x8c, 0x87, 0x9a, 0x91, 0xa0, 0xab, 0xb6, 0xbd, 0xd4, 0xdf, 0xc2, 0xc9, 0xf8, 0xf3, 0xee, 0xe5, /* a */
+    0x3c, 0x37, 0x2a, 0x21, 0x10, 0x1b, 0x06, 0x0d, 0x64, 0x6f, 0x72, 0x79, 0x48, 0x43, 0x5e, 0x55, /* b */
+    0x01, 0x0a, 0x17, 0x1c, 0x2d, 0x26, 0x3b, 0x30, 0x59, 0x52, 0x4f, 0x44, 0x75, 0x7e, 0x63, 0x68, /* c */
+    0xb1, 0xba, 0xa7, 0xac, 0x9d, 0x96, 0x8b, 0x80, 0xe9, 0xe2, 0xff, 0xf4, 0xc5, 0xce, 0xd3, 0xd8, /* d */
+    0x7a, 0x71, 0x6c, 0x67, 0x56, 0x5d, 0x40, 0x4b, 0x22, 0x29, 0x34, 0x3f, 0x0e, 0x05, 0x18, 0x13, /* e */
+    0xca, 0xc1, 0xdc, 0xd7, 0xe6, 0xed, 0xf0, 0xfb, 0x92, 0x99, 0x84, 0x8f, 0xbe, 0xb5, 0xa8, 0xa3, /* f */
+};
+
+/* ArrayIndex*{0d} */
+static const UINT8 aes_mul_d[] = {
+  /*  0     1     2     3     4     5     6     7     8     9     a     b     c     d     e     f    */
+    0x00, 0x0d, 0x1a, 0x17, 0x34, 0x39, 0x2e, 0x23, 0x68, 0x65, 0x72, 0x7f, 0x5c, 0x51, 0x46, 0x4b, /* 0 */
+    0xd0, 0xdd, 0xca, 0xc7, 0xe4, 0xe9, 0xfe, 0xf3, 0xb8, 0xb5, 0xa2, 0xaf, 0x8c, 0x81, 0x96, 0x9b, /* 1 */
+    0xbb, 0xb6, 0xa1, 0xac, 0x8f, 0x82, 0x95, 0x98, 0xd3, 0xde, 0xc9, 0xc4, 0xe7, 0xea, 0xfd, 0xf0, /* 2 */
+    0x6b, 0x66, 0x71, 0x7c, 0x5f, 0x52, 0x45, 0x48, 0x03, 0x0e, 0x19, 0x14, 0x37, 0x3a, 0x2d, 0x20, /* 3 */
+    0x6d, 0x60, 0x77, 0x7a, 0x59, 0x54, 0x43, 0x4e, 0x05, 0x08, 0x1f, 0x12, 0x31, 0x3c, 0x2b, 0x26, /* 4 */
+    0xbd, 0xb0, 0xa7, 0xaa, 0x89, 0x84, 0x93, 0x9e, 0xd5, 0xd8, 0xcf, 0xc2, 0xe1, 0xec, 0xfb, 0xf6, /* 5 */
+    0xd6, 0xdb, 0xcc, 0xc1, 0xe2, 0xef, 0xf8, 0xf5, 0xbe, 0xb3, 0xa4, 0xa9, 0x8a, 0x87, 0x90, 0x9d, /* 6 */
+    0x06, 0x0b, 0x1c, 0x11, 0x32, 0x3f, 0x28, 0x25, 0x6e, 0x63, 0x74, 0x79, 0x5a, 0x57, 0x40, 0x4d, /* 7 */
+    0xda, 0xd7, 0xc0, 0xcd, 0xee, 0xe3, 0xf4, 0xf9, 0xb2, 0xbf, 0xa8, 0xa5, 0x86, 0x8b, 0x9c, 0x91, /* 8 */
+    0x0a, 0x07, 0x10, 0x1d, 0x3e, 0x33, 0x24, 0x29, 0x62, 0x6f, 0x78, 0x75, 0x56, 0x5b, 0x4c, 0x41, /* 9 */
+    0x61, 0x6c, 0x7b, 0x76, 0x55, 0x58, 0x4f, 0x42, 0x09, 0x04, 0x13, 0x1e, 0x3d, 0x30, 0x27, 0x2a, /* a */
+    0xb1, 0xbc, 0xab, 0xa6, 0x85, 0x88, 0x9f, 0x92, 0xd9, 0xd4, 0xc3, 0xce, 0xed, 0xe0, 0xf7, 0xfa, /* b */
+    0xb7, 0xba, 0xad, 0xa0, 0x83, 0x8e, 0x99, 0x94, 0xdf, 0xd2, 0xc5, 0xc8, 0xeb, 0xe6, 0xf1, 0xfc, /* c */
+    0x67, 0x6a, 0x7d, 0x70, 0x53, 0x5e, 0x49, 0x44, 0x0f, 0x02, 0x15, 0x18, 0x3b, 0x36, 0x21, 0x2c, /* d */
+    0x0c, 0x01, 0x16, 0x1b, 0x38, 0x35, 0x22, 0x2f, 0x64, 0x69, 0x7e, 0x73, 0x50, 0x5d, 0x4a, 0x47, /* e */
+    0xdc, 0xd1, 0xc6, 0xcb, 0xe8, 0xe5, 0xf2, 0xff, 0xb4, 0xb9, 0xae, 0xa3, 0x80, 0x8d, 0x9a, 0x97, /* f */
+};
+
+/* ArrayIndex*{0e} */
+static const UINT8 aes_mul_e[] = {
+  /*  0     1     2     3     4     5     6     7     8     9     a     b     c     d     e     f    */
+    0x00, 0x0e, 0x1c, 0x12, 0x38, 0x36, 0x24, 0x2a, 0x70, 0x7e, 0x6c, 0x62, 0x48, 0x46, 0x54, 0x5a, /* 0 */
+    0xe0, 0xee, 0xfc, 0xf2, 0xd8, 0xd6, 0xc4, 0xca, 0x90, 0x9e, 0x8c, 0x82, 0xa8, 0xa6, 0xb4, 0xba, /* 1 */
+    0xdb, 0xd5, 0xc7, 0xc9, 0xe3, 0xed, 0xff, 0xf1, 0xab, 0xa5, 0xb7, 0xb9, 0x93, 0x9d, 0x8f, 0x81, /* 2 */
+    0x3b, 0x35, 0x27, 0x29, 0x03, 0x0d, 0x1f, 0x11, 0x4b, 0x45, 0x57, 0x59, 0x73, 0x7d, 0x6f, 0x61, /* 3 */
+    0xad, 0xa3, 0xb1, 0xbf, 0x95, 0x9b, 0x89, 0x87, 0xdd, 0xd3, 0xc1, 0xcf, 0xe5, 0xeb, 0xf9, 0xf7, /* 4 */
+    0x4d, 0x43, 0x51, 0x5f, 0x75, 0x7b, 0x69, 0x67, 0x3d, 0x33, 0x21, 0x2f, 0x05, 0x0b, 0x19, 0x17, /* 5 */
+    0x76, 0x78, 0x6a, 0x64, 0x4e, 0x40, 0x52, 0x5c, 0x06, 0x08, 0x1a, 0x14, 0x3e, 0x30, 0x22, 0x2c, /* 6 */
+    0x96, 0x98, 0x8a, 0x84, 0xae, 0xa0, 0xb2, 0xbc, 0xe6, 0xe8, 0xfa, 0xf4, 0xde, 0xd0, 0xc2, 0xcc, /* 7 */
+    0x41, 0x4f, 0x5d, 0x53, 0x79, 0x77, 0x65, 0x6b, 0x31, 0x3f, 0x2d, 0x23, 0x09, 0x07, 0x15, 0x1b, /* 8 */
+    0xa1, 0xaf, 0xbd, 0xb3, 0x99, 0x97, 0x85, 0x8b, 0xd1, 0xdf, 0xcd, 0xc3, 0xe9, 0xe7, 0xf5, 0xfb, /* 9 */
+    0x9a, 0x94, 0x86, 0x88, 0xa2, 0xac, 0xbe, 0xb0, 0xea, 0xe4, 0xf6, 0xf8, 0xd2, 0xdc, 0xce, 0xc0, /* a */
+    0x7a, 0x74, 0x66, 0x68, 0x42, 0x4c, 0x5e, 0x50, 0x0a, 0x04, 0x16, 0x18, 0x32, 0x3c, 0x2e, 0x20, /* b */
+    0xec, 0xe2, 0xf0, 0xfe, 0xd4, 0xda, 0xc8, 0xc6, 0x9c, 0x92, 0x80, 0x8e, 0xa4, 0xaa, 0xb8, 0xb6, /* c */
+    0x0c, 0x02, 0x10, 0x1e, 0x34, 0x3a, 0x28, 0x26, 0x7c, 0x72, 0x60, 0x6e, 0x44, 0x4a, 0x58, 0x56, /* d */
+    0x37, 0x39, 0x2b, 0x25, 0x0f, 0x01, 0x13, 0x1d, 0x47, 0x49, 0x5b, 0x55, 0x7f, 0x71, 0x63, 0x6d, /* e */
+    0xd7, 0xd9, 0xcb, 0xc5, 0xef, 0xe1, 0xf3, 0xfd, 0xa7, 0xa9, 0xbb, 0xb5, 0x9f, 0x91, 0x83, 0x8d, /* f */
+};
+
+/* For AES_CMAC */
+#define AES_MAC_LENGTH 16 /* 128-bit string */
+static UINT8 Const_Zero[16] = {
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+static UINT8 Const_Rb[16] = {
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x87};
+   
+/*
+========================================================================
+Routine Description:
+    AES key expansion (key schedule)
+
+Arguments:
+    Key              Cipher key, it may be 16, 24, or 32 bytes (128, 192, or 256 bits)
+    KeyLength        The length of cipher key in bytes
+    paes_ctx         Pointer to AES_CTX_STRUC
+
+Return Value:
+    paes_ctx         Retrun the KeyWordExpansion of AES_CTX_STRUC
+
+Note:
+    Pseudo code for key expansion
+    ------------------------------------------
+       Nk = (key length/4);
+       
+       while (i < Nk)
+           KeyWordExpansion[i] = word(key[4*i], key[4*i + 1], key[4*i + 2], key[4*i + 3]);
+           i++;
+       end while
+
+       while (i < ((key length/4 + 6 + 1)*4) )
+           temp = KeyWordExpansion[i - 1];
+           if (i % Nk ==0)
+               temp = SubWord(RotWord(temp)) ^ Rcon[i/Nk];
+           else if ((Nk > 6) && (i % 4 == 4))
+               temp = SubWord(temp);
+           end if
+
+           KeyWordExpansion[i] = KeyWordExpansion[i - Nk]^ temp;
+           i++;
+       end while
+========================================================================
+*/
+VOID RT_AES_KeyExpansion (
+    IN UINT8 Key[],
+    IN UINT KeyLength,
+    INOUT AES_CTX_STRUC *paes_ctx)
+{
+    UINT KeyIndex = 0;
+    UINT NumberOfWordOfKey, NumberOfWordOfKeyExpansion;
+    UINT8  TempWord[AES_KEY_ROWS], Temp;
+    UINT32 Temprcon;
+
+    NumberOfWordOfKey = KeyLength >> 2;
+    while (KeyIndex < NumberOfWordOfKey)
+    {
+        paes_ctx->KeyWordExpansion[0][KeyIndex] = Key[4*KeyIndex];
+        paes_ctx->KeyWordExpansion[1][KeyIndex] = Key[4*KeyIndex + 1];
+        paes_ctx->KeyWordExpansion[2][KeyIndex] = Key[4*KeyIndex + 2];
+        paes_ctx->KeyWordExpansion[3][KeyIndex] = Key[4*KeyIndex + 3];
+        KeyIndex++;
+    } /* End of while */
+
+    NumberOfWordOfKeyExpansion = ((UINT) AES_KEY_ROWS) * ((KeyLength >> 2) + 6 + 1);    
+    while (KeyIndex < NumberOfWordOfKeyExpansion)
+    {
+        TempWord[0] = paes_ctx->KeyWordExpansion[0][KeyIndex - 1];
+        TempWord[1] = paes_ctx->KeyWordExpansion[1][KeyIndex - 1];
+        TempWord[2] = paes_ctx->KeyWordExpansion[2][KeyIndex - 1];
+        TempWord[3] = paes_ctx->KeyWordExpansion[3][KeyIndex - 1];
+        if ((KeyIndex % NumberOfWordOfKey) == 0) {
+            Temprcon = aes_rcon[KeyIndex/NumberOfWordOfKey];
+            Temp = aes_sbox_enc[TempWord[1]]^((Temprcon >> 24) & 0xff);
+            TempWord[1] = aes_sbox_enc[TempWord[2]]^((Temprcon >> 16) & 0xff);
+            TempWord[2] = aes_sbox_enc[TempWord[3]]^((Temprcon >>  8) & 0xff);
+            TempWord[3] = aes_sbox_enc[TempWord[0]]^((Temprcon      ) & 0xff);
+            TempWord[0] = Temp;
+        } else if ((NumberOfWordOfKey > 6) && ((KeyIndex % NumberOfWordOfKey) == 4)) {
+            Temp = aes_sbox_enc[TempWord[0]];
+            TempWord[1] = aes_sbox_enc[TempWord[1]];
+            TempWord[2] = aes_sbox_enc[TempWord[2]];
+            TempWord[3] = aes_sbox_enc[TempWord[3]];
+            TempWord[0] = Temp;
+        }
+        paes_ctx->KeyWordExpansion[0][KeyIndex] = paes_ctx->KeyWordExpansion[0][KeyIndex - NumberOfWordOfKey]^TempWord[0];
+        paes_ctx->KeyWordExpansion[1][KeyIndex] = paes_ctx->KeyWordExpansion[1][KeyIndex - NumberOfWordOfKey]^TempWord[1];
+        paes_ctx->KeyWordExpansion[2][KeyIndex] = paes_ctx->KeyWordExpansion[2][KeyIndex - NumberOfWordOfKey]^TempWord[2];
+        paes_ctx->KeyWordExpansion[3][KeyIndex] = paes_ctx->KeyWordExpansion[3][KeyIndex - NumberOfWordOfKey]^TempWord[3];
+        KeyIndex++;
+    } /* End of while */
+} /* End of RT_AES_KeyExpansion */
+
+
+/*
+========================================================================
+Routine Description:
+    AES encryption
+
+Arguments:
+    PlainBlock       The block of plain text, 16 bytes(128 bits) each block
+    PlainBlockSize   The length of block of plain text in bytes
+    Key              Cipher key, it may be 16, 24, or 32 bytes (128, 192, or 256 bits)
+    KeyLength        The length of cipher key in bytes
+    CipherBlockSize  The length of allocated cipher block in bytes
+
+Return Value:
+    CipherBlock      Return cipher text
+    CipherBlockSize  Return the length of real used cipher block in bytes
+
+Note:
+    Reference to FIPS-PUB 197
+    1. Check if block size is 16 bytes(128 bits) and if key length is 16, 24, or 32 bytes(128, 192, or 256 bits)
+    2. Transfer the plain block to state block 
+    3. Main encryption rounds
+    4. Transfer the state block to cipher block
+    ------------------------------------------
+       NumberOfRound = (key length / 4) + 6;
+       state block = plain block;
+       
+       AddRoundKey(state block, key);
+       for round = 1 to NumberOfRound
+           SubBytes(state block)
+           ShiftRows(state block)
+           MixColumns(state block)
+           AddRoundKey(state block, key);
+       end for
+
+       SubBytes(state block)
+       ShiftRows(state block)
+       AddRoundKey(state block, key);
+
+       cipher block = state block;
+========================================================================
+*/
+VOID RT_AES_Encrypt (
+    IN UINT8 PlainBlock[],
+    IN UINT PlainBlockSize,
+    IN UINT8 Key[],
+    IN UINT KeyLength,
+    OUT UINT8 CipherBlock[],
+    INOUT UINT *CipherBlockSize)
+{
+/*    AES_CTX_STRUC aes_ctx;
+*/
+	AES_CTX_STRUC *paes_ctx = NULL;
+    UINT RowIndex, ColumnIndex;
+    UINT RoundIndex, NumberOfRound = 0;
+    UINT8 Temp, Row0, Row1, Row2, Row3;
+
+    /*   
+     * 1. Check if block size is 16 bytes(128 bits) and if key length is 16, 24, or 32 bytes(128, 192, or 256 bits) 
+     */
+    if (PlainBlockSize != AES_BLOCK_SIZES) {
+    	DBGPRINT(RT_DEBUG_ERROR, ("RT_AES_Encrypt: plain block size is %d bytes, it must be %d bytes(128 bits).\n", 
+            PlainBlockSize, AES_BLOCK_SIZES));
+        return;
+    } /* End of if */
+    if ((KeyLength != AES_KEY128_LENGTH) && (KeyLength != AES_KEY192_LENGTH) && (KeyLength != AES_KEY256_LENGTH)) {
+    	DBGPRINT(RT_DEBUG_ERROR, ("RT_AES_Encrypt: key length is %d bytes, it must be %d, %d, or %d bytes(128, 192, or 256 bits).\n", 
+            KeyLength, AES_KEY128_LENGTH, AES_KEY192_LENGTH, AES_KEY256_LENGTH));
+        return;
+    } /* End of if */
+    if (*CipherBlockSize < AES_BLOCK_SIZES) {
+    	DBGPRINT(RT_DEBUG_ERROR, ("RT_AES_Encrypt: cipher block size is %d bytes, it must be %d bytes(128 bits).\n", 
+            *CipherBlockSize, AES_BLOCK_SIZES));
+        return;
+    } /* End of if */
+
+	/* allocate memory */
+	os_alloc_mem(NULL, (UCHAR **)&paes_ctx, sizeof(AES_CTX_STRUC));
+	if (paes_ctx == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+		return;
+	}
+
+    /* 
+     * 2. Transfer the plain block to state block 
+     */
+    for (RowIndex = 0; RowIndex < AES_STATE_ROWS;RowIndex++)
+        for (ColumnIndex = 0; ColumnIndex < AES_STATE_COLUMNS;ColumnIndex++)
+            paes_ctx->State[RowIndex][ColumnIndex] = PlainBlock[RowIndex + 4*ColumnIndex];
+
+    /* 
+     *  3. Main encryption rounds
+     */
+    RT_AES_KeyExpansion(Key, KeyLength, paes_ctx);
+    NumberOfRound = (KeyLength >> 2) + 6;
+
+    /* AES_AddRoundKey */
+    RoundIndex = 0;
+    for (RowIndex = 0; RowIndex < AES_STATE_ROWS;RowIndex++)
+        for (ColumnIndex = 0; ColumnIndex < AES_STATE_COLUMNS;ColumnIndex++)
+            paes_ctx->State[RowIndex][ColumnIndex] ^= paes_ctx->KeyWordExpansion[RowIndex][(RoundIndex*((UINT) AES_STATE_COLUMNS)) + ColumnIndex];
+
+    for (RoundIndex = 1; RoundIndex < NumberOfRound;RoundIndex++)
+    {
+        /* AES_SubBytes */
+        for (RowIndex = 0; RowIndex < AES_STATE_ROWS;RowIndex++)
+            for (ColumnIndex = 0; ColumnIndex < AES_STATE_COLUMNS;ColumnIndex++)
+                paes_ctx->State[RowIndex][ColumnIndex] = aes_sbox_enc[paes_ctx->State[RowIndex][ColumnIndex]];
+
+        /* AES_ShiftRows */
+        Temp = paes_ctx->State[1][0];
+        paes_ctx->State[1][0] = paes_ctx->State[1][1];
+        paes_ctx->State[1][1] = paes_ctx->State[1][2];
+        paes_ctx->State[1][2] = paes_ctx->State[1][3];
+        paes_ctx->State[1][3] = Temp;
+        Temp = paes_ctx->State[2][0];
+        paes_ctx->State[2][0] = paes_ctx->State[2][2];
+        paes_ctx->State[2][2] = Temp;
+        Temp = paes_ctx->State[2][1];
+        paes_ctx->State[2][1] = paes_ctx->State[2][3];
+        paes_ctx->State[2][3] = Temp;
+        Temp = paes_ctx->State[3][3];
+        paes_ctx->State[3][3] = paes_ctx->State[3][2];
+        paes_ctx->State[3][2] = paes_ctx->State[3][1];
+        paes_ctx->State[3][1] = paes_ctx->State[3][0];
+        paes_ctx->State[3][0] = Temp;
+
+        /* AES_MixColumns */
+        for (ColumnIndex = 0; ColumnIndex < AES_STATE_COLUMNS;ColumnIndex++)
+        {
+            Row0 = paes_ctx->State[0][ColumnIndex];
+            Row1 = paes_ctx->State[1][ColumnIndex];
+            Row2 = paes_ctx->State[2][ColumnIndex];
+            Row3 = paes_ctx->State[3][ColumnIndex];
+            paes_ctx->State[0][ColumnIndex] = aes_mul_2[Row0]^aes_mul_3[Row1]^Row2^Row3;
+            paes_ctx->State[1][ColumnIndex] = Row0^aes_mul_2[Row1]^aes_mul_3[Row2]^Row3;
+            paes_ctx->State[2][ColumnIndex] = Row0^Row1^aes_mul_2[Row2]^aes_mul_3[Row3];
+            paes_ctx->State[3][ColumnIndex] = aes_mul_3[Row0]^Row1^Row2^aes_mul_2[Row3];
+        }
+
+        /* AES_AddRoundKey */
+        for (RowIndex = 0; RowIndex < AES_STATE_ROWS;RowIndex++)
+            for (ColumnIndex = 0; ColumnIndex < AES_STATE_COLUMNS;ColumnIndex++)
+                paes_ctx->State[RowIndex][ColumnIndex] ^= paes_ctx->KeyWordExpansion[RowIndex][(RoundIndex*((UINT) AES_STATE_COLUMNS)) + ColumnIndex];
+    } /* End of for */
+
+    /* AES_SubBytes */
+    for (RowIndex = 0; RowIndex < AES_STATE_ROWS;RowIndex++)
+        for (ColumnIndex = 0; ColumnIndex < AES_STATE_COLUMNS;ColumnIndex++)
+            paes_ctx->State[RowIndex][ColumnIndex] = aes_sbox_enc[paes_ctx->State[RowIndex][ColumnIndex]];
+    /* AES_ShiftRows */
+    Temp = paes_ctx->State[1][0];
+    paes_ctx->State[1][0] = paes_ctx->State[1][1];
+    paes_ctx->State[1][1] = paes_ctx->State[1][2];
+    paes_ctx->State[1][2] = paes_ctx->State[1][3];
+    paes_ctx->State[1][3] = Temp;
+    Temp = paes_ctx->State[2][0];
+    paes_ctx->State[2][0] = paes_ctx->State[2][2];
+    paes_ctx->State[2][2] = Temp;
+    Temp = paes_ctx->State[2][1];
+    paes_ctx->State[2][1] = paes_ctx->State[2][3];
+    paes_ctx->State[2][3] = Temp;
+    Temp = paes_ctx->State[3][3];
+    paes_ctx->State[3][3] = paes_ctx->State[3][2];
+    paes_ctx->State[3][2] = paes_ctx->State[3][1];
+    paes_ctx->State[3][1] = paes_ctx->State[3][0];
+    paes_ctx->State[3][0] = Temp;
+    /* AES_AddRoundKey */
+    for (RowIndex = 0; RowIndex < AES_STATE_ROWS;RowIndex++)
+        for (ColumnIndex = 0; ColumnIndex < AES_STATE_COLUMNS;ColumnIndex++)
+            paes_ctx->State[RowIndex][ColumnIndex] ^= paes_ctx->KeyWordExpansion[RowIndex][(RoundIndex*((UINT) AES_STATE_COLUMNS)) + ColumnIndex];
+
+    /* 
+     * 4. Transfer the state block to cipher block 
+     */
+    for (RowIndex = 0; RowIndex < AES_STATE_ROWS;RowIndex++)
+        for (ColumnIndex = 0; ColumnIndex < AES_STATE_COLUMNS;ColumnIndex++)
+            CipherBlock[RowIndex + 4*ColumnIndex] = paes_ctx->State[RowIndex][ColumnIndex];
+
+    *CipherBlockSize = ((UINT) AES_STATE_ROWS)*((UINT) AES_STATE_COLUMNS);
+
+	if (paes_ctx != NULL)
+		os_free_mem(NULL, paes_ctx);
+} /* End of RT_AES_Encrypt */
+
+
+/*
+========================================================================
+Routine Description:
+    AES decryption
+
+Arguments:
+    CipherBlock      The block of cipher text, 16 bytes(128 bits) each block
+    CipherBlockSize  The length of block of cipher text in bytes
+    Key              Cipher key, it may be 16, 24, or 32 bytes (128, 192, or 256 bits)
+    KeyLength        The length of cipher key in bytes
+    PlainBlockSize   The length of allocated plain block in bytes
+
+Return Value:
+    PlainBlock       Return plain text
+    PlainBlockSize  Return the length of real used plain block in bytes
+
+Note:
+    Reference to FIPS-PUB 197
+    1. Check if block size is 16 bytes(128 bits) and if key length is 16, 24, or 32 bytes(128, 192, or 256 bits)
+    2. Transfer the cipher block to state block 
+    3. Main decryption rounds
+    4. Transfer the state block to plain block
+    ------------------------------------------
+       NumberOfRound = (key length / 4) + 6;
+       state block = cipher block;
+       
+       AddRoundKey(state block, key);
+       for round = NumberOfRound to 1
+           InvSubBytes(state block)
+           InvShiftRows(state block)
+           InvMixColumns(state block)
+           AddRoundKey(state block, key);
+       end for
+
+       InvSubBytes(state block)
+       InvShiftRows(state block)
+       AddRoundKey(state block, key);
+
+       plain block = state block;
+========================================================================
+*/
+VOID RT_AES_Decrypt (
+    IN UINT8 CipherBlock[],
+    IN UINT CipherBlockSize,
+    IN UINT8 Key[],
+    IN UINT KeyLength,
+    OUT UINT8 PlainBlock[],
+    INOUT UINT *PlainBlockSize)
+{
+/*    AES_CTX_STRUC aes_ctx;
+*/
+	AES_CTX_STRUC *paes_ctx = NULL;
+    UINT RowIndex, ColumnIndex;
+    UINT RoundIndex, NumberOfRound = 0;
+    UINT8 Temp, Row0, Row1, Row2, Row3;
+
+    /*   
+     * 1. Check if block size is 16 bytes(128 bits) and if key length is 16, 24, or 32 bytes(128, 192, or 256 bits) 
+     */
+    if (*PlainBlockSize < AES_BLOCK_SIZES) {
+    	DBGPRINT(RT_DEBUG_ERROR, ("RT_AES_Decrypt: plain block size is %d bytes, it must be %d bytes(128 bits).\n", 
+            *PlainBlockSize, AES_BLOCK_SIZES));
+        return;
+    } /* End of if */
+    if ((KeyLength != AES_KEY128_LENGTH) && (KeyLength != AES_KEY192_LENGTH) && (KeyLength != AES_KEY256_LENGTH)) {
+    	DBGPRINT(RT_DEBUG_ERROR, ("RT_AES_Decrypt: key length is %d bytes, it must be %d, %d, or %d bytes(128, 192, or 256 bits).\n", 
+            KeyLength, AES_KEY128_LENGTH, AES_KEY192_LENGTH, AES_KEY256_LENGTH));
+        return;
+    } /* End of if */
+    if (CipherBlockSize != AES_BLOCK_SIZES) {
+    	DBGPRINT(RT_DEBUG_ERROR, ("RT_AES_Decrypt: cipher block size is %d bytes, it must be %d bytes(128 bits).\n", 
+            CipherBlockSize, AES_BLOCK_SIZES));
+        return;
+    } /* End of if */
+
+	/* allocate memory */
+	os_alloc_mem(NULL, (UCHAR **)&paes_ctx, sizeof(AES_CTX_STRUC));
+	if (paes_ctx == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+		return;
+	}
+
+    /* 
+     * 2. Transfer the cipher block to state block 
+     */
+    for (RowIndex = 0; RowIndex < AES_STATE_ROWS;RowIndex++)
+        for (ColumnIndex = 0; ColumnIndex < AES_STATE_COLUMNS;ColumnIndex++)
+            paes_ctx->State[RowIndex][ColumnIndex] = CipherBlock[RowIndex + 4*ColumnIndex];
+
+    /* 
+     *  3. Main decryption rounds
+     */
+    RT_AES_KeyExpansion(Key, KeyLength, paes_ctx);
+    NumberOfRound = (KeyLength >> 2) + 6;
+
+    /* AES_AddRoundKey */
+    RoundIndex = NumberOfRound;
+    for (RowIndex = 0; RowIndex < AES_STATE_ROWS;RowIndex++)
+        for (ColumnIndex = 0; ColumnIndex < AES_STATE_COLUMNS;ColumnIndex++)
+            paes_ctx->State[RowIndex][ColumnIndex] ^= paes_ctx->KeyWordExpansion[RowIndex][(RoundIndex*((UINT) AES_STATE_COLUMNS)) + ColumnIndex];
+
+    for (RoundIndex = (NumberOfRound - 1); RoundIndex > 0 ;RoundIndex--)
+    {
+        /* AES_InvShiftRows */
+        Temp = paes_ctx->State[1][3];
+        paes_ctx->State[1][3] = paes_ctx->State[1][2];
+        paes_ctx->State[1][2] = paes_ctx->State[1][1];
+        paes_ctx->State[1][1] = paes_ctx->State[1][0];
+        paes_ctx->State[1][0] = Temp;
+        Temp = paes_ctx->State[2][0];
+        paes_ctx->State[2][0] = paes_ctx->State[2][2];
+        paes_ctx->State[2][2] = Temp;
+        Temp = paes_ctx->State[2][1];
+        paes_ctx->State[2][1] = paes_ctx->State[2][3];
+        paes_ctx->State[2][3] = Temp;
+        Temp = paes_ctx->State[3][0];
+        paes_ctx->State[3][0] = paes_ctx->State[3][1];
+        paes_ctx->State[3][1] = paes_ctx->State[3][2];
+        paes_ctx->State[3][2] = paes_ctx->State[3][3];
+        paes_ctx->State[3][3] = Temp;
+
+        /* AES_InvSubBytes */
+        for (RowIndex = 0; RowIndex < AES_STATE_ROWS;RowIndex++)
+            for (ColumnIndex = 0; ColumnIndex < AES_STATE_COLUMNS;ColumnIndex++)
+                paes_ctx->State[RowIndex][ColumnIndex] = aes_sbox_dec[paes_ctx->State[RowIndex][ColumnIndex]];
+
+        /* AES_AddRoundKey */
+        for (RowIndex = 0; RowIndex < AES_STATE_ROWS;RowIndex++)
+            for (ColumnIndex = 0; ColumnIndex < AES_STATE_COLUMNS;ColumnIndex++)
+                paes_ctx->State[RowIndex][ColumnIndex] ^= paes_ctx->KeyWordExpansion[RowIndex][(RoundIndex*((UINT) AES_STATE_COLUMNS)) + ColumnIndex];
+
+        /* AES_InvMixColumns */
+        for (ColumnIndex = 0; ColumnIndex < AES_STATE_COLUMNS;ColumnIndex++)
+        {
+            Row0 = paes_ctx->State[0][ColumnIndex];
+            Row1 = paes_ctx->State[1][ColumnIndex];
+            Row2 = paes_ctx->State[2][ColumnIndex];
+            Row3 = paes_ctx->State[3][ColumnIndex];
+            paes_ctx->State[0][ColumnIndex] = aes_mul_e[Row0]^aes_mul_b[Row1]^aes_mul_d[Row2]^aes_mul_9[Row3];
+            paes_ctx->State[1][ColumnIndex] = aes_mul_9[Row0]^aes_mul_e[Row1]^aes_mul_b[Row2]^aes_mul_d[Row3];
+            paes_ctx->State[2][ColumnIndex] = aes_mul_d[Row0]^aes_mul_9[Row1]^aes_mul_e[Row2]^aes_mul_b[Row3];
+            paes_ctx->State[3][ColumnIndex] = aes_mul_b[Row0]^aes_mul_d[Row1]^aes_mul_9[Row2]^aes_mul_e[Row3];
+        }
+    } /* End of for */
+
+    /* AES_InvShiftRows */
+    Temp = paes_ctx->State[1][3];
+    paes_ctx->State[1][3] = paes_ctx->State[1][2];
+    paes_ctx->State[1][2] = paes_ctx->State[1][1];
+    paes_ctx->State[1][1] = paes_ctx->State[1][0];
+    paes_ctx->State[1][0] = Temp;
+    Temp = paes_ctx->State[2][0];
+    paes_ctx->State[2][0] = paes_ctx->State[2][2];
+    paes_ctx->State[2][2] = Temp;
+    Temp = paes_ctx->State[2][1];
+    paes_ctx->State[2][1] = paes_ctx->State[2][3];
+    paes_ctx->State[2][3] = Temp;
+    Temp = paes_ctx->State[3][0];
+    paes_ctx->State[3][0] = paes_ctx->State[3][1];
+    paes_ctx->State[3][1] = paes_ctx->State[3][2];
+    paes_ctx->State[3][2] = paes_ctx->State[3][3];
+    paes_ctx->State[3][3] = Temp;
+    /* AES_InvSubBytes */
+    for (RowIndex = 0; RowIndex < AES_STATE_ROWS;RowIndex++)
+        for (ColumnIndex = 0; ColumnIndex < AES_STATE_COLUMNS;ColumnIndex++)
+            paes_ctx->State[RowIndex][ColumnIndex] = aes_sbox_dec[paes_ctx->State[RowIndex][ColumnIndex]];
+    /* AES_AddRoundKey */
+    for (RowIndex = 0; RowIndex < AES_STATE_ROWS;RowIndex++)
+        for (ColumnIndex = 0; ColumnIndex < AES_STATE_COLUMNS;ColumnIndex++)
+            paes_ctx->State[RowIndex][ColumnIndex] ^= paes_ctx->KeyWordExpansion[RowIndex][(RoundIndex*((UINT) AES_STATE_COLUMNS)) + ColumnIndex];
+
+    /* 
+     * 4. Transfer the state block to plain block 
+     */
+    for (RowIndex = 0; RowIndex < AES_STATE_ROWS;RowIndex++)
+        for (ColumnIndex = 0; ColumnIndex < AES_STATE_COLUMNS;ColumnIndex++)
+            PlainBlock[RowIndex + 4*ColumnIndex] = paes_ctx->State[RowIndex][ColumnIndex];
+
+    *PlainBlockSize = ((UINT) AES_STATE_ROWS)*((UINT) AES_STATE_COLUMNS);
+
+	if (paes_ctx != NULL)
+		os_free_mem(NULL, paes_ctx);
+} /* End of RT_AES_Decrypt */
+
+
+
+/*
+========================================================================
+Routine Description:
+    AES-CBCMAC 
+
+Arguments:
+    Payload        Data
+    PayloadLength  The length of data in bytes
+    Key              Cipher key
+    KeyLength        The length of cipher key in bytes depend on block cipher (16, 24, or 32 bytes)
+    Nonce            Nonce
+    NonceLength      The length of nonce in bytes
+    AAD              Additional authenticated data
+    AADLength        The length of AAD in bytes
+    MACLength        The length of MAC in bytes
+
+Return Value:
+    MACText       The mac
+
+Note:
+    Reference to RFC 3601, and NIST 800-38C.
+========================================================================
+*/
+VOID AES_CCM_MAC (
+    IN UINT8 Payload[],
+    IN UINT  PayloadLength,
+    IN UINT8 Key[],
+    IN UINT  KeyLength,
+    IN UINT8 Nonce[],
+    IN UINT  NonceLength,
+    IN UINT8 AAD[],
+    IN UINT  AADLength,
+    IN UINT  MACLength,
+    OUT UINT8 MACText[])
+{
+    UINT8 Block[AES_BLOCK_SIZES], Block_MAC[AES_BLOCK_SIZES];
+    UINT  Block_Index = 0, ADD_Index = 0, Payload_Index = 0;
+    UINT  Temp_Value = 0, Temp_Index = 0, Temp_Length = 0, Copy_Length = 0;
+
+    /*   
+     * 1. Formatting of the Control Information and the Nonce
+     */
+    NdisZeroMemory(Block, AES_BLOCK_SIZES);
+    if (AADLength > 0)
+        Block[0] |= 0x40; /* Set bit 6 to 1 */
+    Temp_Value = ((MACLength - 2) >> 1) << 3; /* Set bit 3-5 to (t-2)/2 */
+    Block[0] |= Temp_Value;
+    Temp_Value = (15 - NonceLength) - 1; /* Set bit 0-2 to (q-1), q = 15 - Nonce Length */
+    Block[0] |= Temp_Value;
+    for (Temp_Index = 0; Temp_Index < NonceLength; Temp_Index++)
+        Block[Temp_Index + 1] = Nonce[Temp_Index];
+    if (NonceLength < 12)
+        Block[12] = (PayloadLength >> 24) & 0xff;
+    if (NonceLength < 13)
+        Block[13] = (PayloadLength >> 16) & 0xff;
+    Block[14] = (PayloadLength >> 8) & 0xff;
+    Block[15] = PayloadLength & 0xff;
+
+    NdisZeroMemory(Block_MAC, AES_BLOCK_SIZES);
+    Temp_Length = sizeof(Block_MAC);
+    RT_AES_Encrypt(Block, AES_BLOCK_SIZES , Key, KeyLength, Block_MAC, &Temp_Length);
+
+    /*
+     * 2. Formatting of the Associated Data
+     *      If 0 < AADLength < (2^16 - 2^8), AData_Length = 2
+     *      If (2^16 - 2^8) < AADLength < 2^32, AData_Length = 6
+     *      If 2^32 < AADLength < 2^64, AData_Length = 10 (not implement)
+     */    
+    NdisZeroMemory(Block, AES_BLOCK_SIZES);
+    if ((AADLength > 0) && (AADLength < 0xFF00)) {
+        Block_Index = 2;
+        Block[0] = (AADLength >> 8) & 0xff;
+        Block[1] = AADLength & 0xff;
+    } else {
+        Block_Index = 6;
+        Block[2] = (AADLength >> 24) & 0xff;
+        Block[3] = (AADLength >> 16) & 0xff;
+        Block[4] = (AADLength >> 8) & 0xff;
+        Block[5] = AADLength & 0xff;
+    } /* End of if */
+
+    while (ADD_Index < AADLength) 
+    {
+        Copy_Length = AADLength - ADD_Index;
+        if (Copy_Length > AES_BLOCK_SIZES)
+            Copy_Length = AES_BLOCK_SIZES;
+        if ((Copy_Length + Block_Index) > AES_BLOCK_SIZES) {
+            Copy_Length = AES_BLOCK_SIZES - Block_Index;
+        } /* End of if */                    
+        for (Temp_Index = 0; Temp_Index < Copy_Length; Temp_Index++)
+            Block[Temp_Index + Block_Index] = AAD[ADD_Index + Temp_Index];        
+        for (Temp_Index = 0; Temp_Index < AES_BLOCK_SIZES; Temp_Index++)
+            Block[Temp_Index] ^= Block_MAC[Temp_Index];
+        NdisZeroMemory(Block_MAC, AES_BLOCK_SIZES);
+        Temp_Length = sizeof(Block_MAC);        
+        RT_AES_Encrypt(Block, AES_BLOCK_SIZES , Key, KeyLength, Block_MAC, &Temp_Length);
+        ADD_Index += Copy_Length;
+        Block_Index = 0;        
+        NdisZeroMemory(Block, AES_BLOCK_SIZES);
+    } /* End of while */
+
+    /*
+     * 3. Calculate the MAC (MIC)
+     */
+    while (Payload_Index < PayloadLength) 
+    {
+        NdisZeroMemory(Block, AES_BLOCK_SIZES);
+        Copy_Length = PayloadLength - Payload_Index;
+        if (Copy_Length > AES_BLOCK_SIZES)
+            Copy_Length = AES_BLOCK_SIZES;
+        for (Temp_Index = 0; Temp_Index < Copy_Length; Temp_Index++)
+            Block[Temp_Index] = Payload[Payload_Index + Temp_Index];        
+        for (Temp_Index = 0; Temp_Index < AES_BLOCK_SIZES; Temp_Index++)
+            Block[Temp_Index] ^= Block_MAC[Temp_Index];
+        NdisZeroMemory(Block_MAC, AES_BLOCK_SIZES);
+        Temp_Length = sizeof(Block_MAC);
+        RT_AES_Encrypt(Block, AES_BLOCK_SIZES , Key, KeyLength, Block_MAC, &Temp_Length);
+        Payload_Index += Copy_Length;
+    } /* End of while */
+    for (Temp_Index = 0; Temp_Index < MACLength; Temp_Index++)
+        MACText[Temp_Index] = Block_MAC[Temp_Index];
+} /* End of AES_CCM_MAC */
+
+
+/*
+========================================================================
+Routine Description:
+    AES-CBCMAC Encryption
+
+Arguments:
+    PlainText        Plain text
+    PlainTextLength  The length of plain text in bytes
+    Key              Cipher key
+    KeyLength        The length of cipher key in bytes depend on block cipher (16, 24, or 32 bytes)
+    Nonce            Nonce
+    NonceLength      The length of nonce in bytes
+    AAD              Additional authenticated data
+    AADLength        The length of AAD in bytes
+    MACLength        The length of MAC in bytes
+    CipherTextLength    The length of allocated memory spaces in bytes
+
+Return Value:
+    CipherText       The ciphertext
+    CipherTextLength Return the length of the ciphertext in bytes
+
+Function Value:
+     0: Success
+    -1: The key length must be 16 bytes.
+    -2: A valid nonce length is 7-13 bytes.
+    -3: The MAC length  must be 4, 6, 8, 10, 12, 14, or 16 bytes.
+    -4: The CipherTextLength is not enough.
+
+Note:
+    Reference to RFC 3601, and NIST 800-38C.
+    Here, the implement of AES_CCM is suitable for WI_FI.
+========================================================================
+*/
+INT AES_CCM_Encrypt (
+    IN UINT8 PlainText[],
+    IN UINT PlainTextLength,
+    IN UINT8 Key[],
+    IN UINT KeyLength,
+    IN UINT8 Nonce[],
+    IN UINT NonceLength,
+    IN UINT8 AAD[],
+    IN UINT AADLength,
+    IN UINT MACLength,
+    OUT UINT8 CipherText[],
+    INOUT UINT *CipherTextLength)
+{
+    UINT8 Block_MAC[AES_BLOCK_SIZES];
+    UINT8 Block_CTR[AES_BLOCK_SIZES], Block_CTR_Cipher[AES_BLOCK_SIZES];
+    UINT  Cipher_Index = 0;
+    UINT Temp_Value = 0, Temp_Index = 0, Temp_Length = 0, Copy_Length = 0;
+
+    /*   
+     * 1. Check Input Values
+     *    - Key length must be 16 bytes
+     *    - Nonce length range is form 7 to 13 bytes
+     *    - MAC length must be 4, 6, 8, 10, 12, 14, or 16 bytes
+     *    - CipherTextLength > PlainTextLength + MACLength
+     */
+    if (KeyLength != AES_KEY128_LENGTH) {
+    	DBGPRINT(RT_DEBUG_ERROR, ("AES_CCM_Encrypt: The key length must be %d bytes\n", AES_KEY128_LENGTH));
+        return -1;
+    } /* End of if */
+
+    if ((NonceLength < 7) || (NonceLength > 13)) {
+    	DBGPRINT(RT_DEBUG_ERROR, ("AES_CCM_Encrypt: A valid nonce length is 7-13 bytes\n"));
+        return -2;
+    } /* End of if */
+
+    if ((MACLength != 4) && (MACLength != 6) && (MACLength != 8) && (MACLength != 10)
+        && (MACLength != 12) && (MACLength != 14) && (MACLength != 16)) {
+    	DBGPRINT(RT_DEBUG_ERROR, ("AES_CCM_Encrypt: The MAC length  must be 4, 6, 8, 10, 12, 14, or 16 bytes\n"));
+        return -3;
+    } /* End of if */
+
+    if (*CipherTextLength < (PlainTextLength + MACLength)) {
+    	DBGPRINT(RT_DEBUG_ERROR, ("AES_CCM_Encrypt: The CipherTextLength is not enough.\n"));
+        return -4;
+    } /* End of if */
+
+
+    /*   
+     * 1. Formatting of the Counter Block
+     */
+    NdisZeroMemory(Block_CTR, AES_BLOCK_SIZES);
+    Temp_Value = (15 - NonceLength) - 1; /* Set bit 0-2 to (q-1), q = 15 - Nonce Length */
+    Block_CTR[0] |= Temp_Value;
+    for (Temp_Index = 0; Temp_Index < NonceLength; Temp_Index++)
+        Block_CTR[Temp_Index + 1] = Nonce[Temp_Index];
+
+    /*
+     * 2. Calculate the MAC (MIC)
+     */
+    AES_CCM_MAC(PlainText, PlainTextLength, Key, KeyLength, Nonce, NonceLength, AAD, AADLength, MACLength, Block_MAC);
+    Temp_Length = sizeof(Block_CTR_Cipher);
+    RT_AES_Encrypt(Block_CTR, AES_BLOCK_SIZES , Key, KeyLength, Block_CTR_Cipher, &Temp_Length);
+    for (Temp_Index = 0; Temp_Index < MACLength; Temp_Index++)
+        Block_MAC[Temp_Index] ^= Block_CTR_Cipher[Temp_Index];
+
+    /*   
+     * 3. Cipher Payload
+     */
+    while (Cipher_Index < PlainTextLength) 
+    {
+        Block_CTR[15] += 1;
+        Temp_Length = sizeof(Block_CTR_Cipher);
+        RT_AES_Encrypt(Block_CTR, AES_BLOCK_SIZES , Key, KeyLength, Block_CTR_Cipher, &Temp_Length);
+
+        Copy_Length = PlainTextLength - Cipher_Index;
+        if (Copy_Length > AES_BLOCK_SIZES)
+            Copy_Length = AES_BLOCK_SIZES;                
+        for (Temp_Index = 0; Temp_Index < Copy_Length; Temp_Index++)
+            CipherText[Cipher_Index + Temp_Index] = PlainText[Cipher_Index + Temp_Index]^Block_CTR_Cipher[Temp_Index];
+
+        Cipher_Index += Copy_Length;
+    } /* End of while */
+    for (Temp_Index = 0; Temp_Index < MACLength; Temp_Index++)
+            CipherText[PlainTextLength + Temp_Index] = Block_MAC[Temp_Index];    
+    *CipherTextLength = PlainTextLength + MACLength;
+
+    return 0;
+} /* End of AES_CCM_Encrypt */
+
+
+/*
+========================================================================
+Routine Description:
+    AES-CBCMAC Decryption
+
+Arguments:
+    CipherText       The ciphertext
+    CipherTextLength The length of cipher text in bytes
+    Key              Cipher key
+    KeyLength        The length of cipher key in bytes depend on block cipher (16, 24, or 32 bytes)
+    Nonce            Nonce
+    NonceLength      The length of nonce in bytes
+    AAD              Additional authenticated data
+    AADLength        The length of AAD in bytes
+    CipherTextLength    The length of allocated memory spaces in bytes
+
+Return Value:
+    PlainText        Plain text
+    PlainTextLength  Return the length of the plain text in bytes
+
+Function Value:
+     0: Success
+    -1: The key length must be 16 bytes.
+    -2: A valid nonce length is 7-13 bytes.
+    -3: The MAC length  must be 4, 6, 8, 10, 12, 14, or 16 bytes.
+    -4: The PlainTextLength is not enough.
+    -5: The MIC does not match.
+    
+Note:
+    Reference to RFC 3601, and NIST 800-38C.
+    Here, the implement of AES_CCM is suitable for WI_FI.
+========================================================================
+*/
+INT AES_CCM_Decrypt (
+    IN UINT8 CipherText[],
+    IN UINT  CipherTextLength,
+    IN UINT8 Key[],
+    IN UINT  KeyLength,
+    IN UINT8 Nonce[],
+    IN UINT  NonceLength,
+    IN UINT8 AAD[],
+    IN UINT  AADLength,
+    IN UINT  MACLength,    
+    OUT UINT8 PlainText[],
+    INOUT UINT *PlainTextLength)
+{
+    UINT8 Block_MAC[AES_BLOCK_SIZES], Block_MAC_From_Cipher[AES_BLOCK_SIZES];
+    UINT8 Block_CTR[AES_BLOCK_SIZES], Block_CTR_Cipher[AES_BLOCK_SIZES];
+    UINT  Block_Index = 0, Cipher_Index = 0;
+    UINT Temp_Value = 0, Temp_Index = 0, Temp_Length = 0, Copy_Length = 0;
+
+
+    /*   
+     * 1. Check Input Values
+     *    - Key length must be 16 bytes
+     *    - Nonce length range is form 7 to 13 bytes
+     */
+    if (KeyLength != AES_KEY128_LENGTH) {
+    	DBGPRINT(RT_DEBUG_ERROR, ("AES_CCM_Decrypt: The key length must be %d bytes\n", AES_KEY128_LENGTH));
+        return -1;
+    } /* End of if */
+
+    if ((NonceLength < 7) || (NonceLength > 13)) {
+    	DBGPRINT(RT_DEBUG_ERROR, ("AES_CCM_Decrypt: A valid nonce length is 7-13 bytes\n"));
+        return -2;
+    } /* End of if */
+    
+    if ((MACLength != 4) && (MACLength != 6) && (MACLength != 8) && (MACLength != 10)
+        && (MACLength != 12) && (MACLength != 14) && (MACLength != 16)) {
+    	DBGPRINT(RT_DEBUG_ERROR, ("AES_CCM_Decrypt: The MAC length  must be 4, 6, 8, 10, 12, 14, or 16 bytes\n"));
+        return -3;
+    } /* End of if */
+    
+    if (*PlainTextLength < (CipherTextLength - MACLength)) {
+    	DBGPRINT(RT_DEBUG_ERROR, ("AES_CCM_Decrypt: The PlainTextLength is not enough.\n"));
+        return -4;
+    } /* End of if */
+
+    /*   
+     * 2. Formatting of the Counter Block
+     */
+    NdisZeroMemory(Block_CTR, AES_BLOCK_SIZES);
+    Temp_Value = (15 - NonceLength) - 1; /* Set bit 0-2 to (q-1), q = 15 - Nonce Length */
+    Block_CTR[0] |= Temp_Value;
+    for (Temp_Index = 0; Temp_Index < NonceLength; Temp_Index++)
+        Block_CTR[Temp_Index + 1] = Nonce[Temp_Index];
+    Temp_Length = sizeof(Block_CTR_Cipher);
+    RT_AES_Encrypt(Block_CTR, AES_BLOCK_SIZES , Key, KeyLength, Block_CTR_Cipher, &Temp_Length);
+
+    /*
+     * 3. Catch the MAC (MIC) from CipherText
+     */
+    Block_Index = 0;
+    for (Temp_Index = (CipherTextLength - MACLength); Temp_Index < CipherTextLength; Temp_Index++, Block_Index++)
+        Block_MAC_From_Cipher[Block_Index] = CipherText[Temp_Index]^Block_CTR_Cipher[Block_Index];
+
+    /*
+     * 4. Decryption the Payload
+     */     
+    while (Cipher_Index < (CipherTextLength - MACLength)) 
+    {
+        Block_CTR[15] += 1;
+        Temp_Length = sizeof(Block_CTR_Cipher);
+        RT_AES_Encrypt(Block_CTR, AES_BLOCK_SIZES , Key, KeyLength, Block_CTR_Cipher, &Temp_Length);
+
+        Copy_Length = (CipherTextLength - MACLength) - Cipher_Index;
+        if (Copy_Length > AES_BLOCK_SIZES)
+            Copy_Length = AES_BLOCK_SIZES;                
+        for (Temp_Index = 0; Temp_Index < Copy_Length; Temp_Index++)
+            PlainText[Cipher_Index + Temp_Index] = CipherText[Cipher_Index + Temp_Index]^Block_CTR_Cipher[Temp_Index];
+        Cipher_Index += Copy_Length;
+    } /* End of while */
+    *PlainTextLength = CipherTextLength - MACLength;
+    
+    /*
+     * 5. Calculate the MAC (MIC) from Payload
+     */
+    AES_CCM_MAC(PlainText, *PlainTextLength, Key, KeyLength, Nonce, NonceLength, AAD, AADLength, MACLength, Block_MAC);
+
+    /*
+     * 6. Check the MIC
+     */
+    if (NdisCmpMemory(Block_MAC_From_Cipher, Block_MAC, MACLength) != 0) {
+    	DBGPRINT(RT_DEBUG_ERROR, ("AES_CCM_Decrypt: The MIC does not match.\n"));
+        return -5;
+    } /* End of if */
+
+    return 0;
+} /* End of AES_CCM_Decrypt */
+
+
+/*
+========================================================================
+Routine Description:
+    AES-CMAC generate subkey
+
+Arguments:
+    Key        Cipher key 128 bits
+    KeyLength  The length of Cipher key in bytes
+
+Return Value:
+    SubKey1    SubKey 1 128 bits
+    SubKey2    SubKey 2 128 bits
+
+Note:
+    Reference to RFC 4493
+    
+    Step 1.  L := AES-128(K, const_Zero);
+    Step 2.  if MSB(L) is equal to 0
+                then    K1 := L << 1;
+                else    K1 := (L << 1) XOR const_Rb;
+    Step 3.  if MSB(K1) is equal to 0
+                then    K2 := K1 << 1;
+                else    K2 := (K1 << 1) XOR const_Rb;
+    Step 4.  return K1, K2;
+========================================================================
+*/
+VOID AES_CMAC_GenerateSubKey (
+    IN UINT8 Key[],
+    IN UINT KeyLength,
+    OUT UINT8 SubKey1[],
+    OUT UINT8 SubKey2[])
+{
+    UINT8 MSB_L = 0, MSB_K1 = 0, Top_Bit = 0;
+    UINT  SubKey1_Length = 0;
+    INT   Index = 0;
+
+    if (KeyLength != AES_KEY128_LENGTH) {
+    	DBGPRINT(RT_DEBUG_ERROR, ("AES_CMAC_GenerateSubKey: key length is %d bytes, it must be %d bytes(128 bits).\n", 
+            KeyLength, AES_KEY128_LENGTH));
+        return;
+    } /* End of if */
+
+    /* Step 1: L := AES-128(K, const_Zero); */
+    SubKey1_Length = 16;
+    RT_AES_Encrypt(Const_Zero, sizeof(Const_Zero), Key, KeyLength, SubKey1, &SubKey1_Length);
+
+    /*
+     * Step 2.  if MSB(L) is equal to 0
+     *           then    K1 := L << 1;
+     *           else    K1 := (L << 1) XOR const_Rb;
+     */
+    MSB_L = SubKey1[0] & 0x80;    
+    for(Index = 0; Index < 15; Index++) {
+        Top_Bit = (SubKey1[Index + 1] & 0x80)?1:0;
+        SubKey1[Index] <<= 1;
+        SubKey1[Index] |= Top_Bit;
+    }
+    SubKey1[15] <<= 1;
+    if (MSB_L > 0) {
+        for(Index = 0; Index < 16; Index++)
+            SubKey1[Index] ^= Const_Rb[Index];
+    } /* End of if */
+
+    /*
+     * Step 3.  if MSB(K1) is equal to 0
+     *           then    K2 := K1 << 1;
+     *           else    K2 := (K1 << 1) XOR const_Rb;
+     */
+    MSB_K1 = SubKey1[0] & 0x80;
+    for(Index = 0; Index < 15; Index++) {
+        Top_Bit = (SubKey1[Index + 1] & 0x80)?1:0;
+        SubKey2[Index] = SubKey1[Index] << 1;
+        SubKey2[Index] |= Top_Bit;
+    }
+    SubKey2[15] = SubKey1[15] << 1;
+    if (MSB_K1 > 0) {
+        for(Index = 0; Index < 16; Index++)
+            SubKey2[Index] ^= Const_Rb[Index];
+    } /* End of if */
+} /* End of AES_CMAC_GenerateSubKey */
+
+
+/*
+========================================================================
+Routine Description:
+    AES-CMAC
+
+Arguments:
+    PlainText        Plain text
+    PlainTextLength  The length of plain text in bytes
+    Key              Cipher key, it may be 16, 24, or 32 bytes (128, 192, or 256 bits)
+    KeyLength        The length of cipher key in bytes
+    MACTextLength    The length of allocated memory spaces in bytes
+
+Return Value:
+    MACText       Message authentication code (128-bit string)
+    MACTextLength Return the length of Message authentication code in bytes
+
+Note:
+    Reference to RFC 4493
+========================================================================
+*/
+VOID AES_CMAC (
+    IN UINT8 PlainText[],
+    IN UINT PlainTextLength,
+    IN UINT8 Key[],
+    IN UINT KeyLength,
+    OUT UINT8 MACText[],
+    INOUT UINT *MACTextLength)
+{
+    UINT  PlainBlockStart;
+    UINT8 X[AES_BLOCK_SIZES], Y[AES_BLOCK_SIZES];
+    UINT8 SubKey1[16];
+    UINT8 SubKey2[16];
+    INT Index;
+    UINT X_Length;
+
+    if (*MACTextLength < AES_MAC_LENGTH) {
+    	DBGPRINT(RT_DEBUG_ERROR, ("AES_CMAC: MAC text length is less than %d bytes).\n", 
+            AES_MAC_LENGTH));
+        return;
+    } /* End of if */
+    if (KeyLength != AES_KEY128_LENGTH) {
+    	DBGPRINT(RT_DEBUG_ERROR, ("AES_CMAC: key length is %d bytes, it must be %d bytes(128 bits).\n", 
+            KeyLength, AES_KEY128_LENGTH));
+        return;
+    } /* End of if */
+
+    /* Step 1.  (K1,K2) := Generate_Subkey(K); */
+    NdisZeroMemory(SubKey1, 16);
+    NdisZeroMemory(SubKey2, 16);   
+    AES_CMAC_GenerateSubKey(Key, KeyLength, SubKey1, SubKey2);
+
+    /*   
+     * 2. Main algorithm
+     *    - Plain text divide into serveral blocks (16 bytes/block)
+     *    - If plain text is not divided with no remainder by block, padding size = (block - remainder plain text)
+     *    - Execute RT_AES_Encrypt procedure.
+     */
+    PlainBlockStart = 0;
+    NdisMoveMemory(X, Const_Zero, AES_BLOCK_SIZES);
+    while ((PlainTextLength - PlainBlockStart) > AES_BLOCK_SIZES)
+    {
+        for (Index = 0; Index < AES_BLOCK_SIZES; Index++)
+                Y[Index] = PlainText[PlainBlockStart + Index]^X[Index];
+
+        X_Length = sizeof(X);
+        RT_AES_Encrypt(Y, sizeof(Y) , Key, KeyLength, X, &X_Length);
+        PlainBlockStart += ((UINT) AES_BLOCK_SIZES);
+    } /* End of while */
+    if ((PlainTextLength - PlainBlockStart) == AES_BLOCK_SIZES) {
+        for (Index = 0; Index < AES_BLOCK_SIZES; Index++)
+                Y[Index] = PlainText[PlainBlockStart + Index]^X[Index]^SubKey1[Index];        
+    } else {    
+        NdisZeroMemory(Y, AES_BLOCK_SIZES);
+        NdisMoveMemory(Y, &PlainText[PlainBlockStart], (PlainTextLength - PlainBlockStart));
+        Y[(PlainTextLength - PlainBlockStart)] = 0x80;
+        for (Index = 0; Index < AES_BLOCK_SIZES; Index++)
+                Y[Index] = Y[Index]^X[Index]^SubKey2[Index];
+    } /* End of if */
+    RT_AES_Encrypt(Y, sizeof(Y) , Key, KeyLength, MACText, MACTextLength);
+} /* End of AES_CMAC */
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/crypt_arc4.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/crypt_arc4.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/crypt_arc4.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/crypt_arc4.c	2017-09-23 03:42:49.742675907 +0800
@@ -0,0 +1,139 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "crypt_arc4.h"
+
+
+/*
+========================================================================
+Routine Description:
+    ARC4 initialize the key block
+
+Arguments:
+    pARC4_CTX        Pointer to ARC4 CONTEXT
+    Key              Cipher key, it may be 16, 24, or 32 bytes (128, 192, or 256 bits)
+    KeyLength        The length of cipher key in bytes
+
+========================================================================
+*/
+VOID ARC4_INIT (
+    IN ARC4_CTX_STRUC *pARC4_CTX,
+    IN PUCHAR pKey,
+	IN UINT KeyLength)
+{
+    UINT BlockIndex = 0, SWAPIndex = 0, KeyIndex = 0;
+    UINT8 TempValue = 0;
+
+    /*Initialize the block value*/
+    pARC4_CTX->BlockIndex1 = 0;
+    pARC4_CTX->BlockIndex2 = 0;
+    for (BlockIndex = 0; BlockIndex < ARC4_KEY_BLOCK_SIZE; BlockIndex++)
+        pARC4_CTX->KeyBlock[BlockIndex] = (UINT8) BlockIndex;
+
+    /*Key schedule*/
+    for (BlockIndex = 0; BlockIndex < ARC4_KEY_BLOCK_SIZE; BlockIndex++)
+    {
+        TempValue = pARC4_CTX->KeyBlock[BlockIndex];
+        KeyIndex = BlockIndex % KeyLength;
+        SWAPIndex = (SWAPIndex + TempValue + pKey[KeyIndex]) & 0xff;
+        pARC4_CTX->KeyBlock[BlockIndex] = pARC4_CTX->KeyBlock[SWAPIndex];
+        pARC4_CTX->KeyBlock[SWAPIndex] = TempValue;                
+    } /* End of for */
+
+} /* End of ARC4_INIT */
+
+
+/*
+========================================================================
+Routine Description:
+    ARC4 encryption/decryption
+
+Arguments:
+    pARC4_CTX       Pointer to ARC4 CONTEXT
+    InputText       Input text
+    InputTextLength The length of input text in bytes
+
+Return Value:
+    OutputBlock       Return output text
+ ========================================================================
+*/
+VOID ARC4_Compute (
+    IN ARC4_CTX_STRUC *pARC4_CTX,
+    IN UINT8 InputBlock[],
+    IN UINT InputBlockSize,
+    OUT UINT8 OutputBlock[])
+{
+    UINT InputIndex = 0;
+    UINT8 TempValue = 0;
+
+    for (InputIndex = 0; InputIndex < InputBlockSize; InputIndex++)
+    {
+        pARC4_CTX->BlockIndex1 = (pARC4_CTX->BlockIndex1 + 1) & 0xff;
+        TempValue = pARC4_CTX->KeyBlock[pARC4_CTX->BlockIndex1];
+        pARC4_CTX->BlockIndex2 = (pARC4_CTX->BlockIndex2 + TempValue) & 0xff;
+        
+        pARC4_CTX->KeyBlock[pARC4_CTX->BlockIndex1] = pARC4_CTX->KeyBlock[pARC4_CTX->BlockIndex2];
+        pARC4_CTX->KeyBlock[pARC4_CTX->BlockIndex2] = TempValue;
+        
+        TempValue = (TempValue + pARC4_CTX->KeyBlock[pARC4_CTX->BlockIndex1]) & 0xff;
+        OutputBlock[InputIndex] = InputBlock[InputIndex]^pARC4_CTX->KeyBlock[TempValue];
+
+    } /* End of for */
+} /* End of ARC4_Compute */
+
+
+/*
+========================================================================
+Routine Description:
+    Discard the key length
+
+Arguments:
+    pARC4_CTX   Pointer to ARC4 CONTEXT
+    Length      Discard the key length
+
+========================================================================
+*/
+VOID ARC4_Discard_KeyLength (
+    IN ARC4_CTX_STRUC *pARC4_CTX,
+    IN UINT Length)    
+{
+    UINT Index = 0;
+    UINT8 TempValue = 0;
+    
+    for (Index = 0; Index < Length; Index++)
+    {
+        pARC4_CTX->BlockIndex1 = (pARC4_CTX->BlockIndex1 + 1) & 0xff;
+        TempValue = pARC4_CTX->KeyBlock[pARC4_CTX->BlockIndex1];
+        pARC4_CTX->BlockIndex2 = (pARC4_CTX->BlockIndex2 + TempValue) & 0xff;
+        
+        pARC4_CTX->KeyBlock[pARC4_CTX->BlockIndex1] = pARC4_CTX->KeyBlock[pARC4_CTX->BlockIndex2];
+        pARC4_CTX->KeyBlock[pARC4_CTX->BlockIndex2] = TempValue;
+    } /* End of for */
+
+} /* End of ARC4_Discard_KeyLength */
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/crypt_hmac.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/crypt_hmac.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/crypt_hmac.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/crypt_hmac.c	2017-09-23 03:42:49.742675907 +0800
@@ -0,0 +1,142 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "crypt_hmac.h"
+
+
+#if defined(__cplusplus)
+extern "C"
+{
+#endif
+
+/* initialise the HMAC context to zero */
+void hmac_sha_begin(hmac_ctx cx[1])
+{
+    memset(cx, 0, sizeof(hmac_ctx));
+}
+
+/* input the HMAC key (can be called multiple times)    */
+int hmac_sha_key(const unsigned char key[], unsigned int key_len, hmac_ctx cx[1])
+{
+    if(cx->klen == HMAC_IN_DATA)                /* error if further key input   */
+        return HMAC_BAD_MODE;                   /* is attempted in data mode    */
+
+    if(cx->klen + key_len > HASH_INPUT_SIZE)    /* if the key has to be hashed  */
+    {
+        if(cx->klen <= HASH_INPUT_SIZE)         /* if the hash has not yet been */
+        {                                       /* started, initialise it and   */
+            sha_begin(cx->ctx);                /* hash stored key characters   */
+            sha_hash(cx->key, cx->klen, cx->ctx);
+        }
+
+        sha_hash(key, key_len, cx->ctx);       /* hash long key data into hash */
+    }
+    else                                        /* otherwise store key data     */
+        memcpy(cx->key + cx->klen, key, key_len);
+
+    cx->klen += key_len;                        /* update the key length count  */
+    return HMAC_OK;
+}
+
+/* input the HMAC data (can be called multiple times) - */
+/* note that this call terminates the key input phase   */
+void hmac_sha_data(const unsigned char data[], unsigned int data_len, hmac_ctx cx[1])
+{   unsigned int i;
+
+    if(cx->klen != HMAC_IN_DATA)                /* if not yet in data phase */
+    {
+        if(cx->klen > HASH_INPUT_SIZE)          /* if key is being hashed   */
+        {                                       /* complete the hash and    */
+            sha_end(cx->key, cx->ctx);         /* store the result as the  */
+            cx->klen = HASH_OUTPUT_SIZE;        /* key and set new length   */
+        }
+
+        /* pad the key if necessary */
+        memset(cx->key + cx->klen, 0, HASH_INPUT_SIZE - cx->klen);
+
+        /* xor ipad into key value  */
+        for(i = 0; i < (HASH_INPUT_SIZE >> 2); ++i)
+            ((unsigned int*)cx->key)[i] ^= 0x36363636;
+
+        /* and start hash operation */
+        sha_begin(cx->ctx);
+        sha_hash(cx->key, HASH_INPUT_SIZE, cx->ctx);
+
+        /* mark as now in data mode */
+        cx->klen = HMAC_IN_DATA;
+    }
+
+    /* hash the data (if any)       */
+    if(data_len)
+        sha_hash(data, data_len, cx->ctx);
+}
+
+/* compute and output the MAC value */
+void hmac_sha_end(unsigned char mac[], unsigned int mac_len, hmac_ctx cx[1])
+{   unsigned char dig[HASH_OUTPUT_SIZE];
+    unsigned int i;
+
+    /* if no data has been entered perform a null data phase        */
+    if(cx->klen != HMAC_IN_DATA)
+        hmac_sha_data((const unsigned char*)0, 0, cx);
+
+    sha_end(dig, cx->ctx);         /* complete the inner hash      */
+
+    /* set outer key value using opad and removing ipad */
+    for(i = 0; i < (HASH_INPUT_SIZE >> 2); ++i)
+        ((unsigned int*)cx->key)[i] ^= 0x36363636 ^ 0x5c5c5c5c;
+
+    /* perform the outer hash operation */
+    sha_begin(cx->ctx);
+    sha_hash(cx->key, HASH_INPUT_SIZE, cx->ctx);
+    sha_hash(dig, HASH_OUTPUT_SIZE, cx->ctx);
+    sha_end(dig, cx->ctx);
+
+    /* output the hash value            */
+    for(i = 0; i < mac_len; ++i)
+        mac[i] = dig[i];
+}
+
+/* 'do it all in one go' subroutine     */
+void hmac_sha(const unsigned char key[], unsigned int key_len,
+          const unsigned char data[], unsigned int data_len,
+          unsigned char mac[], unsigned int mac_len)
+{   hmac_ctx    cx[1];
+
+    hmac_sha_begin(cx);
+    hmac_sha_key(key, key_len, cx);
+    hmac_sha_data(data, data_len, cx);
+    hmac_sha_end(mac, mac_len, cx);
+}
+
+#if defined(__cplusplus)
+}
+#endif
+
+
+/* End of crypt_hmac.c */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/crypt_md5.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/crypt_md5.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/crypt_md5.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/crypt_md5.c	2017-09-23 03:42:49.742675907 +0800
@@ -0,0 +1,789 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+
+/**
+ * md5_mac:
+ * @key: pointer to	the	key	used for MAC generation
+ * @key_len: length	of the key in bytes
+ * @data: pointer to the data area for which the MAC is	generated
+ * @data_len: length of	the	data in	bytes
+ * @mac: pointer to	the	buffer holding space for the MAC; the buffer should
+ * have	space for 128-bit (16 bytes) MD5 hash value
+ *
+ * md5_mac() determines	the	message	authentication code	by using secure	hash
+ * MD5(key | data |	key).
+ */
+void md5_mac(u8 *key, size_t key_len, u8 *data, size_t data_len, u8 *mac)
+{
+	MD5_CTX	context;
+
+	MD5Init(&context);
+	MD5Update(&context,	key, key_len);
+	MD5Update(&context,	data, data_len);
+	MD5Update(&context,	key, key_len);
+	MD5Final(mac, &context);
+}
+
+/**
+ * hmac_md5:
+ * @key: pointer to	the	key	used for MAC generation
+ * @key_len: length	of the key in bytes
+ * @data: pointer to the data area for which the MAC is	generated
+ * @data_len: length of	the	data in	bytes
+ * @mac: pointer to	the	buffer holding space for the MAC; the buffer should
+ * have	space for 128-bit (16 bytes) MD5 hash value
+ *
+ * hmac_md5() determines the message authentication	code using HMAC-MD5.
+ * This	implementation is based	on the sample code presented in	RFC	2104.
+ */
+void hmac_md5(u8 *key, size_t key_len, u8 *data, size_t data_len, u8 *mac)
+{
+/*	MD5_CTX	context;*/
+	MD5_CTX	*pcontext = NULL;
+    u8 k_ipad[65]; /* inner padding - key XORd with ipad */
+    u8 k_opad[65]; /* outer padding - key XORd with opad */
+    u8 tk[16];
+	int	i;
+
+
+	/* allocate memory */
+	os_alloc_mem(NULL, (UCHAR **)&pcontext, sizeof(MD5_CTX));
+	if (pcontext == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+		return;
+	}
+
+	/*assert(key != NULL && data != NULL && mac != NULL);*/
+
+	/* if key is longer	than 64	bytes reset	it to key =	MD5(key) */
+	if (key_len	> 64) {
+		MD5Init(pcontext);
+		MD5Update(pcontext, key, key_len);
+		MD5Final(tk, pcontext);
+		/*key=(PUCHAR)ttcontext.buf;*/
+		key	= tk;
+		key_len	= 16;
+	}
+
+	/* the HMAC_MD5	transform looks	like:
+	 *
+	 * MD5(K XOR opad, MD5(K XOR ipad, text))
+	 *
+	 * where K is an n byte	key
+	 * ipad	is the byte	0x36 repeated 64 times
+	 * opad	is the byte	0x5c repeated 64 times
+	 * and text	is the data	being protected	*/
+
+	/* start out by	storing	key	in pads	*/
+	NdisZeroMemory(k_ipad, sizeof(k_ipad));
+	NdisZeroMemory(k_opad,	sizeof(k_opad));
+	/*assert(key_len < sizeof(k_ipad));*/
+	NdisMoveMemory(k_ipad, key,	key_len);
+	NdisMoveMemory(k_opad, key,	key_len);
+
+	/* XOR key with	ipad and opad values */
+	for	(i = 0;	i <	64;	i++) {
+		k_ipad[i] ^= 0x36;
+		k_opad[i] ^= 0x5c;
+	}
+
+	/* perform inner MD5 */
+	MD5Init(pcontext);					 /*	init context for 1st pass */
+	MD5Update(pcontext,	k_ipad,	64);	 /*	start with inner pad */
+	MD5Update(pcontext,	data, data_len); /*	then text of datagram */
+	MD5Final(mac, pcontext);			 /*	finish up 1st pass */
+
+	/* perform outer MD5 */
+	MD5Init(pcontext);					 /*	init context for 2nd pass */
+	MD5Update(pcontext,	k_opad,	64);	 /*	start with outer pad */
+	MD5Update(pcontext,	mac, 16);		 /*	then results of	1st	hash */
+	MD5Final(mac, pcontext);			 /*	finish up 2nd pass */
+
+	if (pcontext != NULL)
+		os_free_mem(NULL, pcontext);
+}
+
+#ifndef RT_BIG_ENDIAN
+#define byteReverse(buf, len)   /* Nothing */
+#else
+void byteReverse(unsigned char *buf, unsigned longs);
+void byteReverse(unsigned char *buf, unsigned longs)
+{
+    do {
+        *(ULONG *)buf = SWAP32(*(ULONG *)buf);
+        buf += 4;
+    } while (--longs);
+}
+#endif
+
+
+/* ==========================  MD5 implementation =========================== */ 
+/* four base functions for MD5 */
+#define MD5_F1(x, y, z) (((x) & (y)) | ((~x) & (z))) 
+#define MD5_F2(x, y, z) (((x) & (z)) | ((y) & (~z))) 
+#define MD5_F3(x, y, z) ((x) ^ (y) ^ (z))
+#define MD5_F4(x, y, z) ((y) ^ ((x) | (~z)))
+#define CYCLIC_LEFT_SHIFT(w, s) (((w) << (s)) | ((w) >> (32-(s))))
+
+#define	MD5Step(f, w, x, y,	z, data, t, s)	\
+	( w	+= f(x,	y, z) +	data + t,  w = (CYCLIC_LEFT_SHIFT(w, s)) & 0xffffffff, w +=	x )
+
+
+/*
+ *  Function Description:
+ *      Initiate MD5 Context satisfied in RFC 1321
+ *
+ *  Arguments:
+ *      pCtx        Pointer	to MD5 context
+ *
+ *  Return Value:
+ *      None	    
+ */
+VOID MD5Init(MD5_CTX *pCtx)
+{
+    pCtx->Buf[0]=0x67452301;
+    pCtx->Buf[1]=0xefcdab89;
+    pCtx->Buf[2]=0x98badcfe;
+    pCtx->Buf[3]=0x10325476;
+
+    pCtx->LenInBitCount[0]=0;
+    pCtx->LenInBitCount[1]=0;
+}
+
+
+/*
+ *  Function Description:
+ *      Update MD5 Context, allow of an arrary of octets as the next portion 
+ *      of the message
+ *      
+ *  Arguments:
+ *      pCtx		Pointer	to MD5 context
+ * 	    pData       Pointer to input data
+ *      LenInBytes  The length of input data (unit: byte)
+ *
+ *  Return Value:
+ *      None
+ *
+ *  Note:
+ *      Called after MD5Init or MD5Update(itself)   
+ */
+VOID MD5Update(MD5_CTX *pCtx, UCHAR *pData, ULONG LenInBytes)
+{
+    
+    ULONG TfTimes;
+    ULONG temp;
+	unsigned int i;
+    
+    temp = pCtx->LenInBitCount[0];
+
+    pCtx->LenInBitCount[0] = (ULONG) (pCtx->LenInBitCount[0] + (LenInBytes << 3));
+ 
+    if (pCtx->LenInBitCount[0] < temp)
+        pCtx->LenInBitCount[1]++;   /*carry in*/
+
+    pCtx->LenInBitCount[1] += LenInBytes >> 29;
+
+    /* mod 64 bytes*/
+    temp = (temp >> 3) & 0x3f;  
+    
+    /* process lacks of 64-byte data */
+    if (temp) 
+    {
+        UCHAR *pAds = (UCHAR *) pCtx->Input + temp;
+        
+        if ((temp+LenInBytes) < 64)
+        {
+            NdisMoveMemory(pAds, (UCHAR *)pData, LenInBytes);   
+            return;
+        }
+        
+        NdisMoveMemory(pAds, (UCHAR *)pData, 64-temp);               
+        byteReverse(pCtx->Input, 16);
+        MD5Transform(pCtx->Buf, (ULONG *)pCtx->Input);
+
+        pData += 64-temp;
+        LenInBytes -= 64-temp; 
+    } /* end of if (temp)*/
+    
+     
+    TfTimes = (LenInBytes >> 6);
+
+    for (i=TfTimes; i>0; i--)
+    {
+        NdisMoveMemory(pCtx->Input, (UCHAR *)pData, 64);
+        byteReverse(pCtx->Input, 16);
+        MD5Transform(pCtx->Buf, (ULONG *)pCtx->Input);
+        pData += 64;
+        LenInBytes -= 64;
+    } /* end of for*/
+
+    /* buffering lacks of 64-byte data*/
+    if(LenInBytes)
+        NdisMoveMemory(pCtx->Input, (UCHAR *)pData, LenInBytes);   
+   
+}
+
+
+/*
+ *  Function Description:
+ *      Append padding bits and length of original message in the tail 
+ *      The message digest has to be completed in the end  
+ *  
+ *  Arguments:
+ *      Digest		Output of Digest-Message for MD5
+ *  	pCtx        Pointer	to MD5 context
+ * 	
+ *  Return Value:
+ *      None
+ *  
+ *  Note:
+ *      Called after MD5Update  
+ */
+VOID MD5Final(UCHAR Digest[16], MD5_CTX *pCtx)
+{
+    UCHAR Remainder;
+    UCHAR PadLenInBytes;
+    UCHAR *pAppend=0;
+    unsigned int i;
+    
+    Remainder = (UCHAR)((pCtx->LenInBitCount[0] >> 3) & 0x3f);
+
+    PadLenInBytes = (Remainder < 56) ? (56-Remainder) : (120-Remainder);
+    
+    pAppend = (UCHAR *)pCtx->Input + Remainder;
+
+    /* padding bits without crossing block(64-byte based) boundary*/
+    if (Remainder < 56)
+    {
+        *pAppend = 0x80;
+        PadLenInBytes --;
+        
+        NdisZeroMemory((UCHAR *)pCtx->Input + Remainder+1, PadLenInBytes); 
+		
+		/* add data-length field, from low to high*/
+       	for (i=0; i<4; i++)
+        {
+        	pCtx->Input[56+i] = (UCHAR)((pCtx->LenInBitCount[0] >> (i << 3)) & 0xff);
+        	pCtx->Input[60+i] = (UCHAR)((pCtx->LenInBitCount[1] >> (i << 3)) & 0xff);
+      	}
+      	
+        byteReverse(pCtx->Input, 16);
+        MD5Transform(pCtx->Buf, (ULONG *)pCtx->Input);
+    } /* end of if*/
+    
+    /* padding bits with crossing block(64-byte based) boundary*/
+    else
+    {
+        /* the first block ===*/
+        *pAppend = 0x80;
+        PadLenInBytes --;
+       
+        NdisZeroMemory((UCHAR *)pCtx->Input + Remainder+1, (64-Remainder-1)); 
+        PadLenInBytes -= (64 - Remainder - 1);
+        
+        byteReverse(pCtx->Input, 16);
+        MD5Transform(pCtx->Buf, (ULONG *)pCtx->Input);
+        
+
+        /* the second block ===*/
+        NdisZeroMemory((UCHAR *)pCtx->Input, PadLenInBytes); 
+
+        /* add data-length field*/
+        for (i=0; i<4; i++)
+        {
+        	pCtx->Input[56+i] = (UCHAR)((pCtx->LenInBitCount[0] >> (i << 3)) & 0xff);
+        	pCtx->Input[60+i] = (UCHAR)((pCtx->LenInBitCount[1] >> (i << 3)) & 0xff);
+      	}
+
+        byteReverse(pCtx->Input, 16);
+        MD5Transform(pCtx->Buf, (ULONG *)pCtx->Input);
+    } /* end of else*/
+
+
+    NdisMoveMemory((UCHAR *)Digest, (ULONG *)pCtx->Buf, 16); /* output*/
+    byteReverse((UCHAR *)Digest, 4);
+    NdisZeroMemory(pCtx, sizeof(pCtx)); /* memory free */
+}
+
+
+/*
+ *  Function Description:
+ *      The central algorithm of MD5, consists of four rounds and sixteen 
+ *  	steps per round
+ * 
+ *  Arguments:
+ *      Buf     Buffers of four states (output: 16 bytes)		
+ * 	    Mes     Input data (input: 64 bytes) 
+ *  
+ *  Return Value:
+ *      None
+ *  	
+ *  Note:
+ *      Called by MD5Update or MD5Final
+ */
+VOID MD5Transform(ULONG Buf[4], ULONG Mes[16])
+{  
+    ULONG Reg[4], Temp; 
+	unsigned int i;
+    
+    static UCHAR LShiftVal[16] = 
+    { 	
+        7, 12, 17, 22, 	
+		5, 9 , 14, 20, 
+		4, 11, 16, 23, 
+ 		6, 10, 15, 21, 
+ 	};
+
+	
+	/* [equal to 4294967296*abs(sin(index))]*/
+    static ULONG MD5Table[64] = 
+	{ 
+		0xd76aa478,	0xe8c7b756,	0x242070db,	0xc1bdceee,	
+		0xf57c0faf,	0x4787c62a,	0xa8304613, 0xfd469501,	
+		0x698098d8,	0x8b44f7af,	0xffff5bb1,	0x895cd7be,
+    	0x6b901122,	0xfd987193,	0xa679438e,	0x49b40821,
+    	
+    	0xf61e2562,	0xc040b340,	0x265e5a51,	0xe9b6c7aa,
+    	0xd62f105d,	0x02441453,	0xd8a1e681,	0xe7d3fbc8,
+    	0x21e1cde6,	0xc33707d6,	0xf4d50d87,	0x455a14ed,
+    	0xa9e3e905,	0xfcefa3f8,	0x676f02d9,	0x8d2a4c8a,
+    	           
+    	0xfffa3942,	0x8771f681,	0x6d9d6122,	0xfde5380c,
+    	0xa4beea44,	0x4bdecfa9,	0xf6bb4b60,	0xbebfbc70,
+    	0x289b7ec6,	0xeaa127fa,	0xd4ef3085,	0x04881d05,
+    	0xd9d4d039,	0xe6db99e5,	0x1fa27cf8,	0xc4ac5665,
+    	           
+    	0xf4292244,	0x432aff97,	0xab9423a7,	0xfc93a039,
+   		0x655b59c3,	0x8f0ccc92,	0xffeff47d,	0x85845dd1,
+    	0x6fa87e4f,	0xfe2ce6e0,	0xa3014314,	0x4e0811a1,
+    	0xf7537e82,	0xbd3af235,	0x2ad7d2bb,	0xeb86d391
+	};
+ 
+				
+    for (i=0; i<4; i++)
+        Reg[i]=Buf[i];
+			
+				
+    /* 64 steps in MD5 algorithm*/
+    for (i=0; i<16; i++)                    
+    {
+        MD5Step(MD5_F1, Reg[0], Reg[1], Reg[2], Reg[3], Mes[i],               
+                MD5Table[i], LShiftVal[i & 0x3]);
+
+        /* one-word right shift*/
+        Temp   = Reg[3]; 
+        Reg[3] = Reg[2];
+        Reg[2] = Reg[1];
+        Reg[1] = Reg[0];
+        Reg[0] = Temp;            
+    }
+    for (i=16; i<32; i++)                    
+    {
+        MD5Step(MD5_F2, Reg[0], Reg[1], Reg[2], Reg[3], Mes[(5*(i & 0xf)+1) & 0xf], 
+                MD5Table[i], LShiftVal[(0x1 << 2)+(i & 0x3)]);    
+
+        /* one-word right shift*/
+        Temp   = Reg[3]; 
+        Reg[3] = Reg[2];
+        Reg[2] = Reg[1];
+        Reg[1] = Reg[0];
+        Reg[0] = Temp;           
+    }
+    for (i=32; i<48; i++)                    
+    {
+        MD5Step(MD5_F3, Reg[0], Reg[1], Reg[2], Reg[3], Mes[(3*(i & 0xf)+5) & 0xf], 
+                MD5Table[i], LShiftVal[(0x1 << 3)+(i & 0x3)]);        
+
+        /* one-word right shift*/
+        Temp   = Reg[3]; 
+        Reg[3] = Reg[2];
+        Reg[2] = Reg[1];
+        Reg[1] = Reg[0];
+        Reg[0] = Temp;          
+    }
+    for (i=48; i<64; i++)                    
+    {
+        MD5Step(MD5_F4, Reg[0], Reg[1], Reg[2], Reg[3], Mes[(7*(i & 0xf)) & 0xf], 
+                MD5Table[i], LShiftVal[(0x3 << 2)+(i & 0x3)]);   
+
+        /* one-word right shift*/
+        Temp   = Reg[3]; 
+        Reg[3] = Reg[2];
+        Reg[2] = Reg[1];
+        Reg[1] = Reg[0];
+        Reg[0] = Temp;           
+    }
+    
+      
+    /* (temporary)output*/
+    for (i=0; i<4; i++)
+        Buf[i] += Reg[i];
+
+}
+
+
+
+/* =========================  SHA-1 implementation ========================== */
+/* four base functions for SHA-1*/
+#define SHA1_F1(b, c, d)    (((b) & (c)) | ((~b) & (d)))         
+#define SHA1_F2(b, c, d)    ((b) ^ (c) ^ (d)) 
+#define SHA1_F3(b, c, d)    (((b) & (c)) | ((b) & (d)) | ((c) & (d)))
+
+
+#define SHA1Step(f, a, b, c, d, e, w, k)    \
+    ( e	+= ( f(b, c, d) + w + k + CYCLIC_LEFT_SHIFT(a, 5)) & 0xffffffff, \
+      b = CYCLIC_LEFT_SHIFT(b, 30) )
+
+/*Initiate SHA-1 Context satisfied in RFC 3174  */
+VOID SHAInit(SHA_CTX *pCtx)
+{
+    pCtx->Buf[0]=0x67452301;
+    pCtx->Buf[1]=0xefcdab89;
+    pCtx->Buf[2]=0x98badcfe;
+    pCtx->Buf[3]=0x10325476;
+    pCtx->Buf[4]=0xc3d2e1f0;
+    
+    pCtx->LenInBitCount[0]=0;
+    pCtx->LenInBitCount[1]=0;
+}
+
+/*
+ *  Function Description:
+ *      Update SHA-1 Context, allow of an arrary of octets as the next
+ *      portion of the message
+ *      
+ *  Arguments:
+ *      pCtx		Pointer	to SHA-1 context
+ * 	    pData       Pointer to input data
+ *      LenInBytes  The length of input data (unit: byte)
+ *
+ *  Return Value:
+ *      error       indicate more than pow(2,64) bits of data  
+ *
+ *  Note:
+ *      Called after SHAInit or SHAUpdate(itself)   
+ */
+UCHAR SHAUpdate(SHA_CTX *pCtx, UCHAR *pData, ULONG LenInBytes)
+{
+    ULONG TfTimes;
+    ULONG temp1,temp2;
+	unsigned int i;
+	UCHAR err=1;
+    
+    temp1 = pCtx->LenInBitCount[0];
+    temp2 = pCtx->LenInBitCount[1];
+
+    pCtx->LenInBitCount[0] = (ULONG) (pCtx->LenInBitCount[0] + (LenInBytes << 3));
+    if (pCtx->LenInBitCount[0] < temp1)
+        pCtx->LenInBitCount[1]++;   /*carry in*/
+
+
+    pCtx->LenInBitCount[1] = (ULONG) (pCtx->LenInBitCount[1] +(LenInBytes >> 29));
+    if (pCtx->LenInBitCount[1] < temp2)
+        return (err);   /*check total length of original data*/
+ 
+
+    /* mod 64 bytes*/
+    temp1 = (temp1 >> 3) & 0x3f;  
+    
+    /* process lacks of 64-byte data */
+    if (temp1) 
+    {
+        UCHAR *pAds = (UCHAR *) pCtx->Input + temp1;
+        
+        if ((temp1+LenInBytes) < 64)
+        {
+            NdisMoveMemory(pAds, (UCHAR *)pData, LenInBytes);   
+            return (0);
+        }
+        
+        NdisMoveMemory(pAds, (UCHAR *)pData, 64-temp1);              
+        byteReverse((UCHAR *)pCtx->Input, 16);               
+        
+        NdisZeroMemory((UCHAR *)pCtx->Input + 64, 16);
+        SHATransform(pCtx->Buf, (ULONG *)pCtx->Input);
+
+        pData += 64-temp1;
+        LenInBytes -= 64-temp1; 
+    } /* end of if (temp1)*/
+    
+     
+    TfTimes = (LenInBytes >> 6);
+
+    for (i=TfTimes; i>0; i--)
+    {
+        NdisMoveMemory(pCtx->Input, (UCHAR *)pData, 64);
+        byteReverse((UCHAR *)pCtx->Input, 16);
+        
+        NdisZeroMemory((UCHAR *)pCtx->Input + 64, 16);
+        SHATransform(pCtx->Buf, (ULONG *)pCtx->Input);
+        pData += 64;
+        LenInBytes -= 64;
+    } /* end of for*/
+
+    /* buffering lacks of 64-byte data*/
+    if(LenInBytes)
+        NdisMoveMemory(pCtx->Input, (UCHAR *)pData, LenInBytes);
+
+	return (0);
+
+}
+
+/* Append padding bits and length of original message in the tail */
+/* The message digest has to be completed in the end */
+VOID SHAFinal(SHA_CTX *pCtx, UCHAR Digest[20])
+{
+    UCHAR Remainder;
+    UCHAR PadLenInBytes;
+    UCHAR *pAppend=0;
+    unsigned int i;
+
+    Remainder = (UCHAR)((pCtx->LenInBitCount[0] >> 3) & 0x3f);
+
+    pAppend = (UCHAR *)pCtx->Input + Remainder;
+
+    PadLenInBytes = (Remainder < 56) ? (56-Remainder) : (120-Remainder);
+    
+    /* padding bits without crossing block(64-byte based) boundary*/
+    if (Remainder < 56)
+    {       
+        *pAppend = 0x80;
+        PadLenInBytes --;
+        
+        NdisZeroMemory((UCHAR *)pCtx->Input + Remainder+1, PadLenInBytes); 
+		 
+		/* add data-length field, from high to low*/
+        for (i=0; i<4; i++)
+        {
+        	pCtx->Input[56+i] = (UCHAR)((pCtx->LenInBitCount[1] >> ((3-i) << 3)) & 0xff);
+        	pCtx->Input[60+i] = (UCHAR)((pCtx->LenInBitCount[0] >> ((3-i) << 3)) & 0xff);
+      	}
+      	
+        byteReverse((UCHAR *)pCtx->Input, 16);
+        NdisZeroMemory((UCHAR *)pCtx->Input + 64, 14);
+        SHATransform(pCtx->Buf, (ULONG *)pCtx->Input);
+    } /* end of if*/
+    
+    /* padding bits with crossing block(64-byte based) boundary*/
+    else
+    {
+        /* the first block ===*/
+        *pAppend = 0x80;
+        PadLenInBytes --;
+        
+        NdisZeroMemory((UCHAR *)pCtx->Input + Remainder+1, (64-Remainder-1)); 
+        PadLenInBytes -= (64 - Remainder - 1);
+        
+        byteReverse((UCHAR *)pCtx->Input, 16);
+        NdisZeroMemory((UCHAR *)pCtx->Input + 64, 16);
+        SHATransform(pCtx->Buf, (ULONG *)pCtx->Input);
+
+
+        /* the second block ===*/
+        NdisZeroMemory((UCHAR *)pCtx->Input, PadLenInBytes); 
+			
+		/* add data-length field*/
+		for (i=0; i<4; i++)
+        {
+        	pCtx->Input[56+i] = (UCHAR)((pCtx->LenInBitCount[1] >> ((3-i) << 3)) & 0xff);
+        	pCtx->Input[60+i] = (UCHAR)((pCtx->LenInBitCount[0] >> ((3-i) << 3)) & 0xff);
+      	}
+      	
+        byteReverse((UCHAR *)pCtx->Input, 16);
+        NdisZeroMemory((UCHAR *)pCtx->Input + 64, 16); 
+        SHATransform(pCtx->Buf, (ULONG *)pCtx->Input);
+    } /* end of else*/
+	
+		
+    /*Output, bytereverse*/
+    for (i=0; i<20; i++)
+    {
+        Digest [i] = (UCHAR)(pCtx->Buf[i>>2] >> 8*(3-(i & 0x3)));
+    }
+    
+    NdisZeroMemory(pCtx, sizeof(pCtx)); /* memory free */
+}
+
+
+/* The central algorithm of SHA-1, consists of four rounds and */
+/* twenty steps per round*/
+VOID SHATransform(ULONG Buf[5], ULONG Mes[20])
+{
+    ULONG Reg[5],Temp; 
+	unsigned int i;
+/*    ULONG W[80]; */
+	ULONG *W = NULL;
+    static ULONG SHA1Table[4] = { 0x5a827999, 0x6ed9eba1, 
+                                  0x8f1bbcdc, 0xca62c1d6 };
+
+	/* allocate memory */
+	os_alloc_mem(NULL, (UCHAR **)&W, sizeof(ULONG)*80);
+	if (W == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+		return;
+	}
+
+    Reg[0]=Buf[0];
+	Reg[1]=Buf[1];
+	Reg[2]=Buf[2];
+	Reg[3]=Buf[3];
+	Reg[4]=Buf[4];
+
+    /*the first octet of a word is stored in the 0th element, bytereverse*/
+	for(i = 0; i < 16; i++)
+    { 
+    	W[i]  = (Mes[i] >> 24) & 0xff;
+        W[i] |= (Mes[i] >> 8 ) & 0xff00;
+        W[i] |= (Mes[i] << 8 ) & 0xff0000;
+        W[i] |= (Mes[i] << 24) & 0xff000000;
+    }
+    
+		 
+    for	(i = 0; i < 64; i++)
+	    W[16+i] = CYCLIC_LEFT_SHIFT(W[i] ^ W[2+i] ^ W[8+i] ^ W[13+i], 1);
+	    
+    
+    /* 80 steps in SHA-1 algorithm*/
+    for (i=0; i<80; i++)                    
+    {
+        if (i<20)
+            SHA1Step(SHA1_F1, Reg[0], Reg[1], Reg[2], Reg[3], Reg[4], 
+                     W[i], SHA1Table[0]);
+        
+        else if (i>=20 && i<40)
+            SHA1Step(SHA1_F2, Reg[0], Reg[1], Reg[2], Reg[3], Reg[4], 
+                     W[i], SHA1Table[1]);
+			
+		else if (i>=40 && i<60)
+            SHA1Step(SHA1_F3, Reg[0], Reg[1], Reg[2], Reg[3], Reg[4], 
+                      W[i], SHA1Table[2]);
+			
+        else
+            SHA1Step(SHA1_F2, Reg[0], Reg[1], Reg[2], Reg[3], Reg[4], 
+                     W[i], SHA1Table[3]);
+			
+
+       /* one-word right shift*/
+		Temp   = Reg[4];
+        Reg[4] = Reg[3];
+        Reg[3] = Reg[2];
+        Reg[2] = Reg[1];
+        Reg[1] = Reg[0];
+        Reg[0] = Temp;       
+  
+    } /* end of for-loop*/
+
+
+    /* (temporary)output*/
+    for (i=0; i<5; i++)
+        Buf[i] += Reg[i];
+
+	if (W != NULL)
+		os_free_mem(NULL, W);
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		SHA1 function 
+
+	Arguments:
+		
+	Return Value:
+
+	Note:
+		
+	========================================================================
+*/
+VOID	HMAC_SHA1(
+	IN	UCHAR	*text,
+	IN	UINT	text_len,
+	IN	UCHAR	*key,
+	IN	UINT	key_len,
+	IN	UCHAR	*digest)
+{
+/*	SHA_CTX	context;*/
+	SHA_CTX	*pcontext = NULL;
+	UCHAR	k_ipad[65]; /* inner padding - key XORd with ipad	*/
+	UCHAR	k_opad[65]; /* outer padding - key XORd with opad	*/
+	INT		i;
+
+
+	/* allocate memory */
+	os_alloc_mem(NULL, (UCHAR **)&pcontext, sizeof(SHA_CTX));
+	if (pcontext == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+		return;
+	}
+
+	/* if key is longer	than 64	bytes reset	it to key=SHA1(key)	*/
+	if (key_len	> 64) 
+	{
+		SHAInit(pcontext);
+		SHAUpdate(pcontext, key, key_len);
+		SHAFinal(pcontext,	key);
+		key_len	= 20;
+	}
+	NdisZeroMemory(k_ipad, sizeof(k_ipad));
+	NdisZeroMemory(k_opad, sizeof(k_opad));
+	NdisMoveMemory(k_ipad, key,	key_len);
+	NdisMoveMemory(k_opad, key,	key_len);
+
+	/* XOR key with	ipad and opad values  */
+	for	(i = 0;	i <	64;	i++) 
+	{	
+		k_ipad[i] ^= 0x36;
+		k_opad[i] ^= 0x5c;
+	}
+
+	/* perform inner SHA1 */
+	SHAInit(pcontext); 						/* init context for 1st pass */
+	SHAUpdate(pcontext,	k_ipad,	64);		/*	start with inner pad */
+	SHAUpdate(pcontext,	text, text_len);	/*	then text of datagram */
+	SHAFinal(pcontext, digest);				/* finish up 1st pass */
+
+	/*perform outer	SHA1  */
+	SHAInit(pcontext);					/* init context for 2nd pass */
+	SHAUpdate(pcontext,	k_opad,	64);	/*	start with outer pad */
+	SHAUpdate(pcontext,	digest,	20);	/*	then results of	1st	hash */
+	SHAFinal(pcontext, digest);			/* finish up 2nd pass */
+
+	if (pcontext != NULL)
+		os_free_mem(NULL, pcontext);
+}
+
+
+/* End of crypt_md5.c */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/crypt_sha2.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/crypt_sha2.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/crypt_sha2.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/crypt_sha2.c	2017-09-23 03:42:49.742675907 +0800
@@ -0,0 +1,715 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+
+#if defined(__cplusplus)
+extern "C"
+{
+#endif
+
+#ifdef _MSC_VER
+#pragma intrinsic(memcpy)
+#endif
+
+#if 0 && defined(_MSC_VER)
+#define rotl32 _lrotl
+#define rotr32 _lrotr
+#else
+#define rotl32(x,n)   (((x) << n) | ((x) >> (32 - n)))
+#define rotr32(x,n)   (((x) >> n) | ((x) << (32 - n)))
+#endif
+
+#if !defined(bswap_32)
+#define bswap_32(x) ((rotr32((x), 24) & 0x00ff00ff) | (rotr32((x), 8) & 0xff00ff00))
+#endif
+
+#ifdef	__BIG_ENDIAN
+#undef  SWAP_BYTES
+#else
+#define SWAP_BYTES
+#endif
+
+
+#define ch(x,y,z)       ((z) ^ ((x) & ((y) ^ (z))))
+#define maj(x,y,z)      (((x) & (y)) | ((z) & ((x) ^ (y))))
+
+
+/* round transforms for SHA256 and SHA512 compression functions */
+
+#define vf(n,i) v[(n - i) & 7]
+
+#define hf(i) (p[i & 15] += \
+    g_1(p[(i + 14) & 15]) + p[(i + 9) & 15] + g_0(p[(i + 1) & 15]))
+
+#define v_cycle(i,j)                                \
+    vf(7,i) += (j ? hf(i) : p[i]) + k_0[i+j]        \
+    + s_1(vf(4,i)) + ch(vf(4,i),vf(5,i),vf(6,i));   \
+    vf(3,i) += vf(7,i);                             \
+    vf(7,i) += s_0(vf(0,i))+ maj(vf(0,i),vf(1,i),vf(2,i))
+
+#if defined(SHA_224) || defined(SHA_256)
+
+#define SHA256_MASK (SHA256_BLOCK_SIZE - 1)
+
+#if defined(SWAP_BYTES)
+#define bsw_32(p,n) \
+    { int _i = (n); while(_i--) ((uint_32t*)p)[_i] = bswap_32(((uint_32t*)p)[_i]); }
+#else
+#define bsw_32(p,n)
+#endif
+
+#define s_0(x)  (rotr32((x),  2) ^ rotr32((x), 13) ^ rotr32((x), 22))
+#define s_1(x)  (rotr32((x),  6) ^ rotr32((x), 11) ^ rotr32((x), 25))
+#define g_0(x)  (rotr32((x),  7) ^ rotr32((x), 18) ^ ((x) >>  3))
+#define g_1(x)  (rotr32((x), 17) ^ rotr32((x), 19) ^ ((x) >> 10))
+#define k_0     k256
+
+/* rotated SHA256 round definition. Rather than swapping variables as in    */
+/* FIPS-180, different variables are 'rotated' on each round, returning     */
+/* to their starting positions every eight rounds                           */
+
+#define q(n)  v##n
+
+#define one_cycle(a,b,c,d,e,f,g,h,k,w)  \
+    q(h) += s_1(q(e)) + ch(q(e), q(f), q(g)) + k + w; \
+    q(d) += q(h); q(h) += s_0(q(a)) + maj(q(a), q(b), q(c))
+
+/* SHA256 mixing data   */
+
+const uint_32t k256[64] =
+{   0x428a2f98ul, 0x71374491ul, 0xb5c0fbcful, 0xe9b5dba5ul,
+    0x3956c25bul, 0x59f111f1ul, 0x923f82a4ul, 0xab1c5ed5ul,
+    0xd807aa98ul, 0x12835b01ul, 0x243185beul, 0x550c7dc3ul,
+    0x72be5d74ul, 0x80deb1feul, 0x9bdc06a7ul, 0xc19bf174ul,
+    0xe49b69c1ul, 0xefbe4786ul, 0x0fc19dc6ul, 0x240ca1ccul,
+    0x2de92c6ful, 0x4a7484aaul, 0x5cb0a9dcul, 0x76f988daul,
+    0x983e5152ul, 0xa831c66dul, 0xb00327c8ul, 0xbf597fc7ul,
+    0xc6e00bf3ul, 0xd5a79147ul, 0x06ca6351ul, 0x14292967ul,
+    0x27b70a85ul, 0x2e1b2138ul, 0x4d2c6dfcul, 0x53380d13ul,
+    0x650a7354ul, 0x766a0abbul, 0x81c2c92eul, 0x92722c85ul,
+    0xa2bfe8a1ul, 0xa81a664bul, 0xc24b8b70ul, 0xc76c51a3ul,
+    0xd192e819ul, 0xd6990624ul, 0xf40e3585ul, 0x106aa070ul,
+    0x19a4c116ul, 0x1e376c08ul, 0x2748774cul, 0x34b0bcb5ul,
+    0x391c0cb3ul, 0x4ed8aa4aul, 0x5b9cca4ful, 0x682e6ff3ul,
+    0x748f82eeul, 0x78a5636ful, 0x84c87814ul, 0x8cc70208ul,
+    0x90befffaul, 0xa4506cebul, 0xbef9a3f7ul, 0xc67178f2ul,
+};
+
+/* Compile 64 bytes of hash data into SHA256 digest value   */
+/* NOTE: this routine assumes that the byte order in the    */
+/* ctx->wbuf[] at this point is such that low address bytes */
+/* in the ORIGINAL byte stream will go into the high end of */
+/* words on BOTH big and little endian systems              */
+
+void_ret sha256_compile(sha256_ctx ctx[1])
+{
+#if !defined(UNROLL_SHA2)
+
+    uint_32t j, *p = ctx->wbuf, v[8];
+
+    memcpy(v, ctx->hash, 8 * sizeof(uint_32t));
+
+    for(j = 0; j < 64; j += 16)
+    {
+        v_cycle( 0, j); v_cycle( 1, j);
+        v_cycle( 2, j); v_cycle( 3, j);
+        v_cycle( 4, j); v_cycle( 5, j);
+        v_cycle( 6, j); v_cycle( 7, j);
+        v_cycle( 8, j); v_cycle( 9, j);
+        v_cycle(10, j); v_cycle(11, j);
+        v_cycle(12, j); v_cycle(13, j);
+        v_cycle(14, j); v_cycle(15, j);
+    }
+
+    ctx->hash[0] += v[0]; ctx->hash[1] += v[1];
+    ctx->hash[2] += v[2]; ctx->hash[3] += v[3];
+    ctx->hash[4] += v[4]; ctx->hash[5] += v[5];
+    ctx->hash[6] += v[6]; ctx->hash[7] += v[7];
+
+#else
+
+    uint_32t *p = ctx->wbuf,v0,v1,v2,v3,v4,v5,v6,v7;
+
+    v0 = ctx->hash[0]; v1 = ctx->hash[1];
+    v2 = ctx->hash[2]; v3 = ctx->hash[3];
+    v4 = ctx->hash[4]; v5 = ctx->hash[5];
+    v6 = ctx->hash[6]; v7 = ctx->hash[7];
+
+    one_cycle(0,1,2,3,4,5,6,7,k256[ 0],p[ 0]);
+    one_cycle(7,0,1,2,3,4,5,6,k256[ 1],p[ 1]);
+    one_cycle(6,7,0,1,2,3,4,5,k256[ 2],p[ 2]);
+    one_cycle(5,6,7,0,1,2,3,4,k256[ 3],p[ 3]);
+    one_cycle(4,5,6,7,0,1,2,3,k256[ 4],p[ 4]);
+    one_cycle(3,4,5,6,7,0,1,2,k256[ 5],p[ 5]);
+    one_cycle(2,3,4,5,6,7,0,1,k256[ 6],p[ 6]);
+    one_cycle(1,2,3,4,5,6,7,0,k256[ 7],p[ 7]);
+    one_cycle(0,1,2,3,4,5,6,7,k256[ 8],p[ 8]);
+    one_cycle(7,0,1,2,3,4,5,6,k256[ 9],p[ 9]);
+    one_cycle(6,7,0,1,2,3,4,5,k256[10],p[10]);
+    one_cycle(5,6,7,0,1,2,3,4,k256[11],p[11]);
+    one_cycle(4,5,6,7,0,1,2,3,k256[12],p[12]);
+    one_cycle(3,4,5,6,7,0,1,2,k256[13],p[13]);
+    one_cycle(2,3,4,5,6,7,0,1,k256[14],p[14]);
+    one_cycle(1,2,3,4,5,6,7,0,k256[15],p[15]);
+
+    one_cycle(0,1,2,3,4,5,6,7,k256[16],hf( 0));
+    one_cycle(7,0,1,2,3,4,5,6,k256[17],hf( 1));
+    one_cycle(6,7,0,1,2,3,4,5,k256[18],hf( 2));
+    one_cycle(5,6,7,0,1,2,3,4,k256[19],hf( 3));
+    one_cycle(4,5,6,7,0,1,2,3,k256[20],hf( 4));
+    one_cycle(3,4,5,6,7,0,1,2,k256[21],hf( 5));
+    one_cycle(2,3,4,5,6,7,0,1,k256[22],hf( 6));
+    one_cycle(1,2,3,4,5,6,7,0,k256[23],hf( 7));
+    one_cycle(0,1,2,3,4,5,6,7,k256[24],hf( 8));
+    one_cycle(7,0,1,2,3,4,5,6,k256[25],hf( 9));
+    one_cycle(6,7,0,1,2,3,4,5,k256[26],hf(10));
+    one_cycle(5,6,7,0,1,2,3,4,k256[27],hf(11));
+    one_cycle(4,5,6,7,0,1,2,3,k256[28],hf(12));
+    one_cycle(3,4,5,6,7,0,1,2,k256[29],hf(13));
+    one_cycle(2,3,4,5,6,7,0,1,k256[30],hf(14));
+    one_cycle(1,2,3,4,5,6,7,0,k256[31],hf(15));
+
+    one_cycle(0,1,2,3,4,5,6,7,k256[32],hf( 0));
+    one_cycle(7,0,1,2,3,4,5,6,k256[33],hf( 1));
+    one_cycle(6,7,0,1,2,3,4,5,k256[34],hf( 2));
+    one_cycle(5,6,7,0,1,2,3,4,k256[35],hf( 3));
+    one_cycle(4,5,6,7,0,1,2,3,k256[36],hf( 4));
+    one_cycle(3,4,5,6,7,0,1,2,k256[37],hf( 5));
+    one_cycle(2,3,4,5,6,7,0,1,k256[38],hf( 6));
+    one_cycle(1,2,3,4,5,6,7,0,k256[39],hf( 7));
+    one_cycle(0,1,2,3,4,5,6,7,k256[40],hf( 8));
+    one_cycle(7,0,1,2,3,4,5,6,k256[41],hf( 9));
+    one_cycle(6,7,0,1,2,3,4,5,k256[42],hf(10));
+    one_cycle(5,6,7,0,1,2,3,4,k256[43],hf(11));
+    one_cycle(4,5,6,7,0,1,2,3,k256[44],hf(12));
+    one_cycle(3,4,5,6,7,0,1,2,k256[45],hf(13));
+    one_cycle(2,3,4,5,6,7,0,1,k256[46],hf(14));
+    one_cycle(1,2,3,4,5,6,7,0,k256[47],hf(15));
+
+    one_cycle(0,1,2,3,4,5,6,7,k256[48],hf( 0));
+    one_cycle(7,0,1,2,3,4,5,6,k256[49],hf( 1));
+    one_cycle(6,7,0,1,2,3,4,5,k256[50],hf( 2));
+    one_cycle(5,6,7,0,1,2,3,4,k256[51],hf( 3));
+    one_cycle(4,5,6,7,0,1,2,3,k256[52],hf( 4));
+    one_cycle(3,4,5,6,7,0,1,2,k256[53],hf( 5));
+    one_cycle(2,3,4,5,6,7,0,1,k256[54],hf( 6));
+    one_cycle(1,2,3,4,5,6,7,0,k256[55],hf( 7));
+    one_cycle(0,1,2,3,4,5,6,7,k256[56],hf( 8));
+    one_cycle(7,0,1,2,3,4,5,6,k256[57],hf( 9));
+    one_cycle(6,7,0,1,2,3,4,5,k256[58],hf(10));
+    one_cycle(5,6,7,0,1,2,3,4,k256[59],hf(11));
+    one_cycle(4,5,6,7,0,1,2,3,k256[60],hf(12));
+    one_cycle(3,4,5,6,7,0,1,2,k256[61],hf(13));
+    one_cycle(2,3,4,5,6,7,0,1,k256[62],hf(14));
+    one_cycle(1,2,3,4,5,6,7,0,k256[63],hf(15));
+
+    ctx->hash[0] += v0; ctx->hash[1] += v1;
+    ctx->hash[2] += v2; ctx->hash[3] += v3;
+    ctx->hash[4] += v4; ctx->hash[5] += v5;
+    ctx->hash[6] += v6; ctx->hash[7] += v7;
+#endif
+}
+
+/* SHA256 hash data in an array of bytes into hash buffer   */
+/* and call the hash_compile function as required.          */
+
+void_ret sha256_hash(const unsigned char data[], unsigned int len, sha256_ctx ctx[1])
+{   uint_32t pos = (uint_32t)(ctx->count[0] & SHA256_MASK),
+             space = SHA256_BLOCK_SIZE - pos;
+    const unsigned char *sp = data;
+
+    if((ctx->count[0] += len) < len)
+        ++(ctx->count[1]);
+
+    while(len >= space)     /* tranfer whole blocks while possible  */
+    {
+        memcpy(((unsigned char*)ctx->wbuf) + pos, sp, space);
+        sp += space; len -= space; space = SHA256_BLOCK_SIZE; pos = 0;
+        bsw_32(ctx->wbuf, SHA256_BLOCK_SIZE >> 2)
+        sha256_compile(ctx);
+    }
+
+    memcpy(((unsigned char*)ctx->wbuf) + pos, sp, len);
+}
+
+/* SHA256 Final padding and digest calculation  */
+
+static void sha_end1(unsigned char hval[], sha256_ctx ctx[1], const unsigned int hlen)
+{   uint_32t    i = (uint_32t)(ctx->count[0] & SHA256_MASK);
+
+    /* put bytes in the buffer in an order in which references to   */
+    /* 32-bit words will put bytes with lower addresses into the    */
+    /* top of 32 bit words on BOTH big and little endian machines   */
+    bsw_32(ctx->wbuf, (i + 3) >> 2)
+
+    /* we now need to mask valid bytes and add the padding which is */
+    /* a single 1 bit and as many zero bits as necessary. Note that */
+    /* we can always add the first padding byte here because the    */
+    /* buffer always has at least one empty slot                    */
+    ctx->wbuf[i >> 2] &= 0xffffff80 << 8 * (~i & 3);
+    ctx->wbuf[i >> 2] |= 0x00000080 << 8 * (~i & 3);
+
+    /* we need 9 or more empty positions, one for the padding byte  */
+    /* (above) and eight for the length count.  If there is not     */
+    /* enough space pad and empty the buffer                        */
+    if(i > SHA256_BLOCK_SIZE - 9)
+    {
+        if(i < 60) ctx->wbuf[15] = 0;
+        sha256_compile(ctx);
+        i = 0;
+    }
+    else    /* compute a word index for the empty buffer positions  */
+        i = (i >> 2) + 1;
+
+    while(i < 14) /* and zero pad all but last two positions        */
+        ctx->wbuf[i++] = 0;
+
+    /* the following 32-bit length fields are assembled in the      */
+    /* wrong byte order on little endian machines but this is       */
+    /* corrected later since they are only ever used as 32-bit      */
+    /* word values.                                                 */
+    ctx->wbuf[14] = (ctx->count[1] << 3) | (ctx->count[0] >> 29);
+    ctx->wbuf[15] = ctx->count[0] << 3;
+    sha256_compile(ctx);
+
+    /* extract the hash value as bytes in case the hash buffer is   */
+    /* mislaigned for 32-bit words                                  */
+    for(i = 0; i < hlen; ++i)
+        hval[i] = (unsigned char)(ctx->hash[i >> 2] >> (8 * (~i & 3)));
+}
+
+#endif
+
+#if defined(SHA_224)
+
+const uint_32t i224[8] =
+{
+    0xc1059ed8ul, 0x367cd507ul, 0x3070dd17ul, 0xf70e5939ul,
+    0xffc00b31ul, 0x68581511ul, 0x64f98fa7ul, 0xbefa4fa4ul
+};
+
+void_ret sha224_begin(sha224_ctx ctx[1])
+{
+    ctx->count[0] = ctx->count[1] = 0;
+    memcpy(ctx->hash, i224, 8 * sizeof(uint_32t));
+}
+
+void_ret sha224_end(unsigned char hval[], sha224_ctx ctx[1])
+{
+    sha_end1(hval, ctx, SHA224_DIGEST_SIZE);
+}
+
+void_ret sha224(unsigned char hval[], const unsigned char data[], unsigned int len)
+{   sha224_ctx  cx[1];
+
+    sha224_begin(cx);
+    sha224_hash(data, len, cx);
+    sha_end1(hval, cx, SHA224_DIGEST_SIZE);
+}
+
+#endif
+
+#if defined(SHA_256)
+
+const uint_32t i256[8] =
+{
+    0x6a09e667ul, 0xbb67ae85ul, 0x3c6ef372ul, 0xa54ff53aul,
+    0x510e527ful, 0x9b05688cul, 0x1f83d9abul, 0x5be0cd19ul
+};
+
+void_ret sha256_begin(sha256_ctx ctx[1])
+{
+    ctx->count[0] = ctx->count[1] = 0;
+    memcpy(ctx->hash, i256, 8 * sizeof(uint_32t));
+}
+
+void_ret sha256_end(unsigned char hval[], sha256_ctx ctx[1])
+{
+    sha_end1(hval, ctx, SHA256_DIGEST_SIZE);
+}
+
+void_ret sha256(unsigned char hval[], const unsigned char data[], unsigned int len)
+{   sha256_ctx  cx[1];
+
+    sha256_begin(cx);
+    sha256_hash(data, len, cx);
+    sha_end1(hval, cx, SHA256_DIGEST_SIZE);
+}
+
+#endif
+
+#if defined(SHA_384) || defined(SHA_512)
+
+#define SHA512_MASK (SHA512_BLOCK_SIZE - 1)
+
+#define rotr64(x,n)   (((x) >> n) | ((x) << (64 - n)))
+
+#if !defined(bswap_64)
+#define bswap_64(x) (((uint_64t)(bswap_32((uint_32t)(x)))) << 32 | bswap_32((uint_32t)((x) >> 32)))
+#endif
+
+#if defined(SWAP_BYTES)
+#define bsw_64(p,n) \
+    { int _i = (n); while(_i--) ((uint_64t*)p)[_i] = bswap_64(((uint_64t*)p)[_i]); }
+#else
+#define bsw_64(p,n)
+#endif
+
+/* SHA512 mixing function definitions   */
+
+#ifdef   s_0
+# undef  s_0
+# undef  s_1
+# undef  g_0
+# undef  g_1
+# undef  k_0
+#endif
+
+#define s_0(x)  (rotr64((x), 28) ^ rotr64((x), 34) ^ rotr64((x), 39))
+#define s_1(x)  (rotr64((x), 14) ^ rotr64((x), 18) ^ rotr64((x), 41))
+#define g_0(x)  (rotr64((x),  1) ^ rotr64((x),  8) ^ ((x) >>  7))
+#define g_1(x)  (rotr64((x), 19) ^ rotr64((x), 61) ^ ((x) >>  6))
+#define k_0     k512
+
+/* SHA384/SHA512 mixing data    */
+
+const uint_64t  k512[80] =
+{
+    li_64(428a2f98d728ae22), li_64(7137449123ef65cd),
+    li_64(b5c0fbcfec4d3b2f), li_64(e9b5dba58189dbbc),
+    li_64(3956c25bf348b538), li_64(59f111f1b605d019),
+    li_64(923f82a4af194f9b), li_64(ab1c5ed5da6d8118),
+    li_64(d807aa98a3030242), li_64(12835b0145706fbe),
+    li_64(243185be4ee4b28c), li_64(550c7dc3d5ffb4e2),
+    li_64(72be5d74f27b896f), li_64(80deb1fe3b1696b1),
+    li_64(9bdc06a725c71235), li_64(c19bf174cf692694),
+    li_64(e49b69c19ef14ad2), li_64(efbe4786384f25e3),
+    li_64(0fc19dc68b8cd5b5), li_64(240ca1cc77ac9c65),
+    li_64(2de92c6f592b0275), li_64(4a7484aa6ea6e483),
+    li_64(5cb0a9dcbd41fbd4), li_64(76f988da831153b5),
+    li_64(983e5152ee66dfab), li_64(a831c66d2db43210),
+    li_64(b00327c898fb213f), li_64(bf597fc7beef0ee4),
+    li_64(c6e00bf33da88fc2), li_64(d5a79147930aa725),
+    li_64(06ca6351e003826f), li_64(142929670a0e6e70),
+    li_64(27b70a8546d22ffc), li_64(2e1b21385c26c926),
+    li_64(4d2c6dfc5ac42aed), li_64(53380d139d95b3df),
+    li_64(650a73548baf63de), li_64(766a0abb3c77b2a8),
+    li_64(81c2c92e47edaee6), li_64(92722c851482353b),
+    li_64(a2bfe8a14cf10364), li_64(a81a664bbc423001),
+    li_64(c24b8b70d0f89791), li_64(c76c51a30654be30),
+    li_64(d192e819d6ef5218), li_64(d69906245565a910),
+    li_64(f40e35855771202a), li_64(106aa07032bbd1b8),
+    li_64(19a4c116b8d2d0c8), li_64(1e376c085141ab53),
+    li_64(2748774cdf8eeb99), li_64(34b0bcb5e19b48a8),
+    li_64(391c0cb3c5c95a63), li_64(4ed8aa4ae3418acb),
+    li_64(5b9cca4f7763e373), li_64(682e6ff3d6b2b8a3),
+    li_64(748f82ee5defb2fc), li_64(78a5636f43172f60),
+    li_64(84c87814a1f0ab72), li_64(8cc702081a6439ec),
+    li_64(90befffa23631e28), li_64(a4506cebde82bde9),
+    li_64(bef9a3f7b2c67915), li_64(c67178f2e372532b),
+    li_64(ca273eceea26619c), li_64(d186b8c721c0c207),
+    li_64(eada7dd6cde0eb1e), li_64(f57d4f7fee6ed178),
+    li_64(06f067aa72176fba), li_64(0a637dc5a2c898a6),
+    li_64(113f9804bef90dae), li_64(1b710b35131c471b),
+    li_64(28db77f523047d84), li_64(32caab7b40c72493),
+    li_64(3c9ebe0a15c9bebc), li_64(431d67c49c100d4c),
+    li_64(4cc5d4becb3e42b6), li_64(597f299cfc657e2a),
+    li_64(5fcb6fab3ad6faec), li_64(6c44198c4a475817)
+};
+
+/* Compile 128 bytes of hash data into SHA384/512 digest    */
+/* NOTE: this routine assumes that the byte order in the    */
+/* ctx->wbuf[] at this point is such that low address bytes */
+/* in the ORIGINAL byte stream will go into the high end of */
+/* words on BOTH big and little endian systems              */
+
+void_ret sha512_compile(sha512_ctx ctx[1])
+{   uint_64t    v[8], *p = ctx->wbuf;
+    uint_32t    j;
+
+    memcpy(v, ctx->hash, 8 * sizeof(uint_64t));
+
+    for(j = 0; j < 80; j += 16)
+    {
+        v_cycle( 0, j); v_cycle( 1, j);
+        v_cycle( 2, j); v_cycle( 3, j);
+        v_cycle( 4, j); v_cycle( 5, j);
+        v_cycle( 6, j); v_cycle( 7, j);
+        v_cycle( 8, j); v_cycle( 9, j);
+        v_cycle(10, j); v_cycle(11, j);
+        v_cycle(12, j); v_cycle(13, j);
+        v_cycle(14, j); v_cycle(15, j);
+    }
+
+    ctx->hash[0] += v[0]; ctx->hash[1] += v[1];
+    ctx->hash[2] += v[2]; ctx->hash[3] += v[3];
+    ctx->hash[4] += v[4]; ctx->hash[5] += v[5];
+    ctx->hash[6] += v[6]; ctx->hash[7] += v[7];
+}
+
+/* Compile 128 bytes of hash data into SHA256 digest value  */
+/* NOTE: this routine assumes that the byte order in the    */
+/* ctx->wbuf[] at this point is in such an order that low   */
+/* address bytes in the ORIGINAL byte stream placed in this */
+/* buffer will now go to the high end of words on BOTH big  */
+/* and little endian systems                                */
+
+void_ret sha512_hash(const unsigned char data[], unsigned int len, sha512_ctx ctx[1])
+{   uint_32t pos = (uint_32t)(ctx->count[0] & SHA512_MASK),
+             space = SHA512_BLOCK_SIZE - pos;
+    const unsigned char *sp = data;
+
+    if((ctx->count[0] += len) < len)
+        ++(ctx->count[1]);
+
+    while(len >= space)     /* tranfer whole blocks while possible  */
+    {
+        memcpy(((unsigned char*)ctx->wbuf) + pos, sp, space);
+        sp += space; len -= space; space = SHA512_BLOCK_SIZE; pos = 0;
+        bsw_64(ctx->wbuf, SHA512_BLOCK_SIZE >> 3);
+        sha512_compile(ctx);
+    }
+
+    memcpy(((unsigned char*)ctx->wbuf) + pos, sp, len);
+}
+
+/* SHA384/512 Final padding and digest calculation  */
+
+static void sha_end2(unsigned char hval[], sha512_ctx ctx[1], const unsigned int hlen)
+{   uint_32t    i = (uint_32t)(ctx->count[0] & SHA512_MASK);
+
+    /* put bytes in the buffer in an order in which references to   */
+    /* 32-bit words will put bytes with lower addresses into the    */
+    /* top of 32 bit words on BOTH big and little endian machines   */
+    bsw_64(ctx->wbuf, (i + 7) >> 3);
+
+    /* we now need to mask valid bytes and add the padding which is */
+    /* a single 1 bit and as many zero bits as necessary. Note that */
+    /* we can always add the first padding byte here because the    */
+    /* buffer always has at least one empty slot                    */
+    ctx->wbuf[i >> 3] &= li_64(ffffffffffffff00) << 8 * (~i & 7);
+    ctx->wbuf[i >> 3] |= li_64(0000000000000080) << 8 * (~i & 7);
+
+    /* we need 17 or more empty byte positions, one for the padding */
+    /* byte (above) and sixteen for the length count.  If there is  */
+    /* not enough space pad and empty the buffer                    */
+    if(i > SHA512_BLOCK_SIZE - 17)
+    {
+        if(i < 120) ctx->wbuf[15] = 0;
+        sha512_compile(ctx);
+        i = 0;
+    }
+    else
+        i = (i >> 3) + 1;
+
+    while(i < 14)
+        ctx->wbuf[i++] = 0;
+
+    /* the following 64-bit length fields are assembled in the      */
+    /* wrong byte order on little endian machines but this is       */
+    /* corrected later since they are only ever used as 64-bit      */
+    /* word values.                                                 */
+    ctx->wbuf[14] = (ctx->count[1] << 3) | (ctx->count[0] >> 61);
+    ctx->wbuf[15] = ctx->count[0] << 3;
+    sha512_compile(ctx);
+
+    /* extract the hash value as bytes in case the hash buffer is   */
+    /* misaligned for 32-bit words                                  */
+    for(i = 0; i < hlen; ++i)
+        hval[i] = (unsigned char)(ctx->hash[i >> 3] >> (8 * (~i & 7)));
+}
+
+#endif
+
+#if defined(SHA_384)
+
+/* SHA384 initialisation data   */
+
+const uint_64t  i384[80] =
+{
+    li_64(cbbb9d5dc1059ed8), li_64(629a292a367cd507),
+    li_64(9159015a3070dd17), li_64(152fecd8f70e5939),
+    li_64(67332667ffc00b31), li_64(8eb44a8768581511),
+    li_64(db0c2e0d64f98fa7), li_64(47b5481dbefa4fa4)
+};
+
+void_ret sha384_begin(sha384_ctx ctx[1])
+{
+    ctx->count[0] = ctx->count[1] = 0;
+    memcpy(ctx->hash, i384, 8 * sizeof(uint_64t));
+}
+
+void_ret sha384_end(unsigned char hval[], sha384_ctx ctx[1])
+{
+    sha_end2(hval, ctx, SHA384_DIGEST_SIZE);
+}
+
+void_ret sha384(unsigned char hval[], const unsigned char data[], unsigned int len)
+{   sha384_ctx  cx[1];
+
+    sha384_begin(cx);
+    sha384_hash(data, len, cx);
+    sha_end2(hval, cx, SHA384_DIGEST_SIZE);
+}
+
+#endif
+
+#if defined(SHA_512)
+
+/* SHA512 initialisation data   */
+
+const uint_64t  i512[80] =
+{
+    li_64(6a09e667f3bcc908), li_64(bb67ae8584caa73b),
+    li_64(3c6ef372fe94f82b), li_64(a54ff53a5f1d36f1),
+    li_64(510e527fade682d1), li_64(9b05688c2b3e6c1f),
+    li_64(1f83d9abfb41bd6b), li_64(5be0cd19137e2179)
+};
+
+void_ret sha512_begin(sha512_ctx ctx[1])
+{
+    ctx->count[0] = ctx->count[1] = 0;
+    memcpy(ctx->hash, i512, 8 * sizeof(uint_64t));
+}
+
+void_ret sha512_end(unsigned char hval[], sha512_ctx ctx[1])
+{
+    sha_end2(hval, ctx, SHA512_DIGEST_SIZE);
+}
+
+void_ret sha512(unsigned char hval[], const unsigned char data[], unsigned int len)
+{   sha512_ctx  cx[1];
+
+    sha512_begin(cx);
+    sha512_hash(data, len, cx);
+    sha_end2(hval, cx, SHA512_DIGEST_SIZE);
+}
+
+#endif
+
+#if defined(SHA_2)
+
+#define CTX_224(x)  ((x)->uu->ctx256)
+#define CTX_256(x)  ((x)->uu->ctx256)
+#define CTX_384(x)  ((x)->uu->ctx512)
+#define CTX_512(x)  ((x)->uu->ctx512)
+
+/* SHA2 initialisation */
+
+int_ret sha2_begin(unsigned int len, sha2_ctx ctx[1])
+{
+    switch(len)
+    {
+#if defined(SHA_224)
+        case 224:
+        case  28:   CTX_256(ctx)->count[0] = CTX_256(ctx)->count[1] = 0;
+                    memcpy(CTX_256(ctx)->hash, i224, 32);
+                    ctx->sha2_len = 28; return EXIT_SUCCESS;
+#endif
+#if defined(SHA_256)
+        case 256:
+        case  32:   CTX_256(ctx)->count[0] = CTX_256(ctx)->count[1] = 0;
+                    memcpy(CTX_256(ctx)->hash, i256, 32);
+                    ctx->sha2_len = 32; return EXIT_SUCCESS;
+#endif
+#if defined(SHA_384)
+        case 384:
+        case  48:   CTX_384(ctx)->count[0] = CTX_384(ctx)->count[1] = 0;
+                    memcpy(CTX_384(ctx)->hash, i384, 64);
+                    ctx->sha2_len = 48; return EXIT_SUCCESS;
+#endif
+#if defined(SHA_512)
+        case 512:
+        case  64:   CTX_512(ctx)->count[0] = CTX_512(ctx)->count[1] = 0;
+                    memcpy(CTX_512(ctx)->hash, i512, 64);
+                    ctx->sha2_len = 64; return EXIT_SUCCESS;
+#endif
+        default:    return EXIT_FAILURE;
+    }
+}
+
+void_ret sha2_hash(const unsigned char data[], unsigned int len, sha2_ctx ctx[1])
+{
+    switch(ctx->sha2_len)
+    {
+#if defined(SHA_224)
+        case 28: sha224_hash(data, len, CTX_224(ctx)); return;
+#endif
+#if defined(SHA_256)
+        case 32: sha256_hash(data, len, CTX_256(ctx)); return;
+#endif
+#if defined(SHA_384)
+        case 48: sha384_hash(data, len, CTX_384(ctx)); return;
+#endif
+#if defined(SHA_512)
+        case 64: sha512_hash(data, len, CTX_512(ctx)); return;
+#endif
+    }
+}
+
+void_ret sha2_end(unsigned char hval[], sha2_ctx ctx[1])
+{
+    switch(ctx->sha2_len)
+    {
+#if defined(SHA_224)
+        case 28: sha_end1(hval, CTX_224(ctx), SHA224_DIGEST_SIZE); return;
+#endif
+#if defined(SHA_256)
+        case 32: sha_end1(hval, CTX_256(ctx), SHA256_DIGEST_SIZE); return;
+#endif
+#if defined(SHA_384)
+        case 48: sha_end2(hval, CTX_384(ctx), SHA384_DIGEST_SIZE); return;
+#endif
+#if defined(SHA_512)
+        case 64: sha_end2(hval, CTX_512(ctx), SHA512_DIGEST_SIZE); return;
+#endif
+    }
+}
+
+int_ret sha2(unsigned char hval[], unsigned int size,
+                                const unsigned char data[], unsigned int len)
+{   sha2_ctx    cx[1];
+
+    if(sha2_begin(size, cx) == EXIT_SUCCESS)
+    {
+        sha2_hash(data, len, cx); sha2_end(hval, cx); return EXIT_SUCCESS;
+    }
+    else
+        return EXIT_FAILURE;
+}
+
+#endif
+
+#if defined(__cplusplus)
+}
+#endif
+
+
+/* End of crypt_sha2.c */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/dfs.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/dfs.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/dfs.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/dfs.c	2017-09-23 03:42:49.742675907 +0800
@@ -0,0 +1,93 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+typedef struct _RADAR_DURATION_TABLE
+{
+	ULONG RDDurRegion;
+	ULONG RadarSignalDuration;
+	ULONG Tolerance;
+} RADAR_DURATION_TABLE, *PRADAR_DURATION_TABLE;
+
+
+
+UCHAR RdIdleTimeTable[MAX_RD_REGION][4] =
+{
+	{9, 250, 250, 250},		/* CE*/
+	{4, 250, 250, 250},		/* FCC*/
+	{4, 250, 250, 250},		/* JAP*/
+	{15, 250, 250, 250},	/* JAP_W53*/
+	{4, 250, 250, 250}		/* JAP_W56*/
+};
+
+#ifdef TONE_RADAR_DETECT_SUPPORT
+static void ToneRadarProgram(PRTMP_ADAPTER pAd);
+static void ToneRadarEnable(PRTMP_ADAPTER pAd);
+#endif /* TONE_RADAR_DETECT_SUPPORT */
+
+
+
+/*
+	========================================================================
+
+	Routine Description:
+		Radar channel check routine
+
+	Arguments:
+		pAd 	Pointer to our adapter
+
+	Return Value:
+		TRUE	need to do radar detect
+		FALSE	need not to do radar detect
+
+	========================================================================
+*/
+BOOLEAN RadarChannelCheck(
+	IN PRTMP_ADAPTER	pAd,
+	IN UCHAR			Ch)
+{
+	INT		i;
+	BOOLEAN result = FALSE;
+
+	for (i=0; i<pAd->ChannelListNum; i++)
+	{
+		if (Ch == pAd->ChannelList[i].Channel)
+		{
+			result = pAd->ChannelList[i].DfsReq;
+			break;
+		}
+	}
+
+	return result;
+}
+
+
+
+
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/ee_efuse.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/ee_efuse.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/ee_efuse.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/ee_efuse.c	2017-09-23 03:42:49.742675907 +0800
@@ -0,0 +1,1688 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifdef RTMP_EFUSE_SUPPORT
+
+#include	"rt_config.h"
+
+#define EFUSE_EEPROM_DEFULT_FILE	"RT30xxEEPROM.bin"
+#define MAX_EEPROM_BIN_FILE_SIZE	1024
+
+
+
+#define EFUSE_TAG				0x2fe
+
+
+#ifdef RT_BIG_ENDIAN
+typedef	union	_EFUSE_CTRL_STRUC {
+	struct	{
+		UINT32            SEL_EFUSE:1;
+		UINT32            EFSROM_KICK:1;
+		UINT32            RESERVED:4;
+		UINT32            EFSROM_AIN:10;
+		UINT32            EFSROM_LDO_ON_TIME:2;
+		UINT32            EFSROM_LDO_OFF_TIME:6;
+		UINT32            EFSROM_MODE:2;
+		UINT32            EFSROM_AOUT:6;   
+	}	field;
+	UINT32			word;
+}	EFUSE_CTRL_STRUC, *PEFUSE_CTRL_STRUC;
+#else
+typedef	union	_EFUSE_CTRL_STRUC {
+	struct	{
+		UINT32            EFSROM_AOUT:6;
+		UINT32            EFSROM_MODE:2;
+		UINT32            EFSROM_LDO_OFF_TIME:6;
+		UINT32            EFSROM_LDO_ON_TIME:2;
+		UINT32            EFSROM_AIN:10;
+		UINT32            RESERVED:4;
+		UINT32            EFSROM_KICK:1;
+		UINT32            SEL_EFUSE:1;
+	}	field;
+	UINT32			word;
+}	EFUSE_CTRL_STRUC, *PEFUSE_CTRL_STRUC;
+#endif /* RT_BIG_ENDIAN */
+
+static UCHAR eFuseReadRegisters(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	USHORT Offset, 
+	IN	USHORT Length, 
+	OUT	USHORT* pData);
+
+static VOID eFuseReadPhysical( 
+	IN	PRTMP_ADAPTER	pAd, 
+  	IN	PUSHORT lpInBuffer,
+  	IN	ULONG nInBufferSize,
+  	OUT	PUSHORT lpOutBuffer,
+  	IN	ULONG nOutBufferSize);
+
+static VOID eFusePhysicalWriteRegisters(
+	IN	PRTMP_ADAPTER	pAd,	
+	IN	USHORT Offset, 
+	IN	USHORT Length, 
+	OUT	USHORT* pData);
+
+static NTSTATUS eFuseWriteRegisters(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	USHORT Offset, 
+	IN	USHORT Length, 
+	IN	USHORT* pData);
+
+static VOID eFuseWritePhysical( 
+	IN	PRTMP_ADAPTER	pAd,	
+  	PUSHORT lpInBuffer,
+	ULONG nInBufferSize,
+  	PUCHAR lpOutBuffer,
+  	ULONG nOutBufferSize);
+
+
+static NTSTATUS eFuseWriteRegistersFromBin(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	USHORT Offset, 
+	IN	USHORT Length, 
+	IN	USHORT* pData);
+
+
+/*
+========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+
+	Note:
+	
+========================================================================
+*/
+UCHAR eFuseReadRegisters(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	USHORT Offset, 
+	IN	USHORT Length, 
+	OUT	USHORT* pData)
+{
+	EFUSE_CTRL_STRUC		eFuseCtrlStruc;
+	int	i;
+	USHORT	efuseDataOffset;
+	UINT32	data;
+	
+	RTMP_IO_READ32(pAd, EFUSE_CTRL, &eFuseCtrlStruc.word);
+
+	/*Step0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.*/
+	/*Use the eeprom logical address and covert to address to block number*/
+	eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
+
+	/*Step1. Write EFSROM_MODE (0x580, bit7:bit6) to 0.*/
+	eFuseCtrlStruc.field.EFSROM_MODE = 0;
+
+	/*Step2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.*/
+	eFuseCtrlStruc.field.EFSROM_KICK = 1;
+	
+	NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
+	RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
+
+	/*Step3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.*/
+	i = 0;
+	while(i < 500)
+	{	
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))
+			return 0;
+	
+		/*rtmp.HwMemoryReadDword(EFUSE_CTRL, (DWORD *) &eFuseCtrlStruc, 4);*/
+		RTMP_IO_READ32(pAd, EFUSE_CTRL, &eFuseCtrlStruc.word);
+		if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
+		{
+			break;
+		}	
+		RTMPusecDelay(2);
+		i++;	
+	}
+
+	/*if EFSROM_AOUT is not found in physical address, write 0xffff*/
+	if (eFuseCtrlStruc.field.EFSROM_AOUT == 0x3f)
+	{
+		for(i=0; i<Length/2; i++)
+			*(pData+2*i) = 0xffff;
+	}
+	else
+	{
+		/*Step4. Read 16-byte of data from EFUSE_DATA0-3 (0x590-0x59C)*/
+		efuseDataOffset =  EFUSE_DATA3 - (Offset & 0xC);	
+		/*data hold 4 bytes data.*/
+		/*In RTMP_IO_READ32 will automatically execute 32-bytes swapping*/
+		RTMP_IO_READ32(pAd, efuseDataOffset, &data);
+		/*Decide the upper 2 bytes or the bottom 2 bytes.*/
+		/* Little-endian		S	|	S	Big-endian*/
+		/* addr	3	2	1	0	|	0	1	2	3*/
+		/* Ori-V	D	C	B	A	|	A	B	C	D*/
+		/*After swapping*/
+		/*		D	C	B	A	|	D	C	B	A*/
+		/*Return 2-bytes*/
+		/*The return byte statrs from S. Therefore, the little-endian will return BA, the Big-endian will return DC.*/
+		/*For returning the bottom 2 bytes, the Big-endian should shift right 2-bytes.*/
+#ifdef RT_BIG_ENDIAN
+		data = data << (8*((Offset & 0x3)^0x2));		  
+#else
+		data = data >> (8*(Offset & 0x3));		
+#endif /* RT_BIG_ENDIAN */
+		
+		NdisMoveMemory(pData, &data, Length);
+	}
+
+	return (UCHAR) eFuseCtrlStruc.field.EFSROM_AOUT;
+	
+}
+
+/*
+========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+
+	Note:
+	
+========================================================================
+*/
+VOID eFusePhysicalReadRegisters( 
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	USHORT Offset, 
+	IN	USHORT Length, 
+	OUT	USHORT* pData)
+{
+	EFUSE_CTRL_STRUC		eFuseCtrlStruc;
+	int	i;
+	USHORT	efuseDataOffset;
+	UINT32	data;
+
+	RTMP_IO_READ32(pAd, EFUSE_CTRL, &eFuseCtrlStruc.word);
+
+	/*Step0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.*/
+	eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
+
+	/*Step1. Write EFSROM_MODE (0x580, bit7:bit6) to 1.*/
+	/*Read in physical view*/
+	eFuseCtrlStruc.field.EFSROM_MODE = 1;
+
+	/*Step2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.*/
+	eFuseCtrlStruc.field.EFSROM_KICK = 1;
+
+	NdisMoveMemory(&data, &eFuseCtrlStruc, 4);	
+	RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);	
+
+	/*Step3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.*/
+	i = 0;
+	while(i < 500)
+	{	
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))
+			return;
+		
+		RTMP_IO_READ32(pAd, EFUSE_CTRL, &eFuseCtrlStruc.word);	
+		if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
+			break;
+		RTMPusecDelay(2);
+		i++;	
+	}
+
+	/*Step4. Read 16-byte of data from EFUSE_DATA0-3 (0x59C-0x590)*/
+	/*Because the size of each EFUSE_DATA is 4 Bytes, the size of address of each is 2 bits.*/
+	/*The previous 2 bits is the EFUSE_DATA number, the last 2 bits is used to decide which bytes*/
+	/*Decide which EFUSE_DATA to read*/
+	/*590:F E D C */
+	/*594:B A 9 8 */
+	/*598:7 6 5 4*/
+	/*59C:3 2 1 0*/
+	efuseDataOffset =  EFUSE_DATA3 - (Offset & 0xC)  ;	
+
+	RTMP_IO_READ32(pAd, efuseDataOffset, &data);
+
+#ifdef RT_BIG_ENDIAN
+		data = data << (8*((Offset & 0x3)^0x2));	
+#else
+	data = data >> (8*(Offset & 0x3));
+#endif /* RT_BIG_ENDIAN */
+
+	NdisMoveMemory(pData, &data, Length);	
+	
+}
+
+/*
+========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+	
+	Note:
+	
+========================================================================
+*/
+static VOID eFuseReadPhysical( 
+	IN	PRTMP_ADAPTER	pAd, 
+  	IN	PUSHORT lpInBuffer,
+  	IN	ULONG nInBufferSize,
+  	OUT	PUSHORT lpOutBuffer,
+  	IN	ULONG nOutBufferSize  
+)
+{
+	USHORT* pInBuf = (USHORT*)lpInBuffer;
+	USHORT* pOutBuf = (USHORT*)lpOutBuffer;
+
+	USHORT Offset = pInBuf[0];					/*addr*/
+	USHORT Length = pInBuf[1];					/*length*/
+	int 		i;
+	
+	for(i=0; i<Length; i+=2)
+	{
+		eFusePhysicalReadRegisters(pAd,Offset+i, 2, &pOutBuf[i/2]);	
+	} 	
+}
+
+/*
+========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+	
+	Note:
+	
+========================================================================
+*/
+NTSTATUS eFuseRead(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	USHORT			Offset,
+	OUT	PUSHORT			pData,
+	IN	USHORT			Length)
+{
+	NTSTATUS Status = STATUS_SUCCESS;
+	UCHAR	EFSROM_AOUT;
+	int	i;
+	
+	for(i=0; i<Length; i+=2)
+	{
+		EFSROM_AOUT = eFuseReadRegisters(pAd, Offset+i, 2, &pData[i/2]);
+	} 
+	return Status;
+}
+
+/*
+========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+	
+	Note:
+	
+========================================================================
+*/
+static VOID eFusePhysicalWriteRegisters(
+	IN	PRTMP_ADAPTER	pAd,	
+	IN	USHORT Offset, 
+	IN	USHORT Length, 
+	OUT	USHORT* pData)
+{
+	EFUSE_CTRL_STRUC		eFuseCtrlStruc;
+	int	i;
+	USHORT	efuseDataOffset;
+	UINT32	data, eFuseDataBuffer[4];
+
+	/*Step0. Write 16-byte of data to EFUSE_DATA0-3 (0x590-0x59C), where EFUSE_DATA0 is the LSB DW, EFUSE_DATA3 is the MSB DW.*/
+
+	/*read current values of 16-byte block	*/
+	RTMP_IO_READ32(pAd, EFUSE_CTRL,  &eFuseCtrlStruc.word);
+
+	/*Step0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.*/
+	eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
+
+	/*Step1. Write EFSROM_MODE (0x580, bit7:bit6) to 1.*/
+	eFuseCtrlStruc.field.EFSROM_MODE = 1;
+
+	/*Step2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.*/
+	eFuseCtrlStruc.field.EFSROM_KICK = 1;
+
+	NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
+	RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);	
+
+	/*Step3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.*/
+	i = 0;
+	while(i < 500)
+	{	
+		RTMP_IO_READ32(pAd, EFUSE_CTRL, &eFuseCtrlStruc.word);
+
+		if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
+			break;
+		RTMPusecDelay(2);
+		i++;	
+	}
+
+	/*Step4. Read 16-byte of data from EFUSE_DATA0-3 (0x59C-0x590)*/
+	efuseDataOffset =  EFUSE_DATA3;		
+	for(i=0; i< 4; i++)
+	{
+		RTMP_IO_READ32(pAd, efuseDataOffset, (PUINT32) &eFuseDataBuffer[i]);
+		efuseDataOffset -=  4;		
+	}
+
+	/*Update the value, the offset is multiple of 2, length is 2*/
+	efuseDataOffset = (Offset & 0xc) >> 2;
+	data = pData[0] & 0xffff;
+	/*The offset should be 0x***10 or 0x***00*/
+	if((Offset % 4) != 0)
+	{
+		eFuseDataBuffer[efuseDataOffset] = (eFuseDataBuffer[efuseDataOffset] & 0xffff) | (data << 16);
+	}
+	else
+	{
+		eFuseDataBuffer[efuseDataOffset] = (eFuseDataBuffer[efuseDataOffset] & 0xffff0000) | data;
+	}
+
+	efuseDataOffset =  EFUSE_DATA3;
+	for(i=0; i< 4; i++)
+	{
+		RTMP_IO_WRITE32(pAd, efuseDataOffset, eFuseDataBuffer[i]);			
+		efuseDataOffset -= 4;		
+	}
+
+	/*Step1. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.*/
+
+	RTMP_IO_READ32(pAd, EFUSE_CTRL, &eFuseCtrlStruc.word);
+
+	eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
+
+	/*Step2. Write EFSROM_MODE (0x580, bit7:bit6) to 3.*/
+	eFuseCtrlStruc.field.EFSROM_MODE = 3;
+	
+	/*Step3. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical write procedure.*/
+	eFuseCtrlStruc.field.EFSROM_KICK = 1;
+
+	NdisMoveMemory(&data, &eFuseCtrlStruc, 4);	
+	RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);	
+
+	/*Step4. Polling EFSROM_KICK(0x580, bit30) until it become 0 again. It¡¦s done.*/
+	i = 0;
+
+	while(i < 500)
+	{	
+		RTMP_IO_READ32(pAd, EFUSE_CTRL, &eFuseCtrlStruc.word);
+
+		if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
+			break;
+		
+		RTMPusecDelay(2);	
+		i++;	
+	}
+}
+
+/*
+========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+
+	Note:
+	
+========================================================================
+*/
+static NTSTATUS eFuseWriteRegisters(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	USHORT Offset, 
+	IN	USHORT Length, 
+	IN	USHORT* pData)
+{
+	USHORT	i,Loop=0, StartBlock=0, EndBlock=0;
+	USHORT	eFuseData;
+	USHORT	LogicalAddress, BlkNum = 0xffff;
+	UCHAR	EFSROM_AOUT;
+
+	USHORT addr,tmpaddr, InBuf[3], tmpOffset;
+	USHORT buffer[8];
+	BOOLEAN		bWriteSuccess = TRUE;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters Offset=%x, pData=%x\n", Offset, *pData));
+	/*set start block and end block number, start from tail of mapping table*/
+	if( (pAd->chipCap.EFUSE_USAGE_MAP_END % 2) != 0)
+	{
+		StartBlock = pAd->chipCap.EFUSE_USAGE_MAP_END-1; 
+	}
+	else
+	{
+		StartBlock = pAd->chipCap.EFUSE_USAGE_MAP_END; 
+	}
+
+	if( (pAd->chipCap.EFUSE_USAGE_MAP_START % 2) != 0)
+	{
+		EndBlock = pAd->chipCap.EFUSE_USAGE_MAP_START-1; 
+	}
+	else
+	{
+		EndBlock = pAd->chipCap.EFUSE_USAGE_MAP_START; 
+	}
+	/*Step 0. find the entry in the mapping table*/
+	/*The address of EEPROM is 2-bytes alignment.*/
+	/*The last bit is used for alignment, so it must be 0.*/
+	tmpOffset = Offset & 0xfffe;
+	EFSROM_AOUT = eFuseReadRegisters(pAd, tmpOffset, 2, &eFuseData);
+	if( EFSROM_AOUT == 0x3f)
+	{	/*find available logical address pointer	*/
+		/*the logical address does not exist, find an empty one*/
+		/*from the first address of block 45=16*45=0x2d0 to the last address of block 47*/
+		/*==>48*16-3(reserved)=2FC*/
+		for (i=StartBlock; i >= EndBlock; i-=2)
+		{
+			/*Retrive the logical block nubmer form each logical address pointer*/
+			/*It will access two logical address pointer each time.*/
+			eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
+			/*To avoid the odd byte problem, ex. We read the 21|20 bytes and if 21 is the */
+			/* end byte. Then, the EFUSE_USAGE_MAP_END which is 21 is not equal to*/
+			/* i which is 20. Therefore, this 21th byte could be used.*/
+			/*Otherwise, if 20 is the stop byte, i which is 20 is equal EFUSE_USAGE_MAP_END.*/
+			/* It means the 21th byte could not be used.*/
+			if(( (LogicalAddress >> 8) & 0xff) == 0)
+			{/*Not used logical address pointer*/
+				if (i != pAd->chipCap.EFUSE_USAGE_MAP_END)
+				{		
+					BlkNum = i-pAd->chipCap.EFUSE_USAGE_MAP_START+1;	
+					break;
+				}				
+				
+			}
+			
+			if( (LogicalAddress & 0xff) == 0)
+			{/*Not used logical address pointer*/
+				if (i != (pAd->chipCap.EFUSE_USAGE_MAP_START-1))
+				{
+					BlkNum = i-pAd->chipCap.EFUSE_USAGE_MAP_START;
+					break;
+				}
+			}
+			
+		}
+	}
+	else
+	{
+		BlkNum = EFSROM_AOUT;
+	}	
+
+	DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters BlkNum = %d \n", BlkNum));
+
+	if(BlkNum == 0xffff)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters: out of free E-fuse space!!!\n"));
+		return FALSE;
+	}	
+
+	/*Step 1. Save data of this block	which is pointed by the avaible logical address pointer*/
+	/* read and save the original block data*/
+	for(i =0; i<8; i++)
+	{
+		addr = BlkNum * 0x10 ;
+		
+		InBuf[0] = addr+2*i;
+		InBuf[1] = 2;
+		InBuf[2] = 0x0;	
+		
+		eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
+
+		buffer[i] = InBuf[2];
+	}
+
+	/*Step 2. Update the data in buffer, and write the data to Efuse*/
+	buffer[ (Offset >> 1) % 8] = pData[0];
+
+	do
+	{	Loop++;
+		/*Step 3. Write the data to Efuse*/
+		if(!bWriteSuccess)
+		{
+			for(i =0; i<8; i++)
+			{
+				addr = BlkNum * 0x10 ;
+				
+				InBuf[0] = addr+2*i;
+				InBuf[1] = 2;
+				InBuf[2] = buffer[i];	
+				
+				eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 2);		
+			}
+		}
+		else
+		{
+				addr = BlkNum * 0x10 ;
+				
+				InBuf[0] = addr+(Offset % 16);
+				InBuf[1] = 2;
+				InBuf[2] = pData[0];	
+				
+				eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 2);	
+		}
+	
+		/*Step 4. Write mapping table*/
+		addr = pAd->chipCap.EFUSE_USAGE_MAP_START+BlkNum;
+
+		tmpaddr = addr;
+
+		if(addr % 2 != 0)
+			addr = addr -1; 
+		InBuf[0] = addr;
+		InBuf[1] = 2;
+
+		/*convert the address from 10 to 8 bit ( bit7, 6 = parity and bit5 ~ 0 = bit9~4), and write to logical map entry*/
+		tmpOffset = Offset;
+		tmpOffset >>= 4;
+		tmpOffset |= ((~((tmpOffset & 0x01) ^ ( tmpOffset >> 1 & 0x01) ^  (tmpOffset >> 2 & 0x01) ^  (tmpOffset >> 3 & 0x01))) << 6) & 0x40;
+		tmpOffset |= ((~( (tmpOffset >> 2 & 0x01) ^ (tmpOffset >> 3 & 0x01) ^ (tmpOffset >> 4 & 0x01) ^ ( tmpOffset >> 5 & 0x01))) << 7) & 0x80;
+
+		/* write the logical address*/
+		if(tmpaddr%2 != 0) 	
+			InBuf[2] = tmpOffset<<8;	
+		else          
+			InBuf[2] = tmpOffset;
+
+		eFuseWritePhysical(pAd,&InBuf[0], 6, NULL, 0);
+
+		/*Step 5. Compare data if not the same, invalidate the mapping entry, then re-write the data until E-fuse is exhausted*/
+		bWriteSuccess = TRUE;
+		for(i =0; i<8; i++)
+		{
+			addr = BlkNum * 0x10 ;
+			
+			InBuf[0] = addr+2*i;
+			InBuf[1] = 2;
+			InBuf[2] = 0x0;	
+			
+			eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
+
+			if(buffer[i] != InBuf[2])
+			{
+				bWriteSuccess = FALSE;
+				break;
+			}	
+		}
+
+		/*Step 6. invlidate mapping entry and find a free mapping entry if not succeed*/
+		if (!bWriteSuccess)
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("Not bWriteSuccess BlkNum = %d\n", BlkNum));
+
+			/* the offset of current mapping entry*/
+			addr = pAd->chipCap.EFUSE_USAGE_MAP_START+BlkNum;			
+
+			/*find a new mapping entry*/
+			BlkNum = 0xffff;
+			for (i=StartBlock; i >= EndBlock; i-=2)
+			{
+				eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
+				if(( (LogicalAddress >> 8) & 0xff) == 0)
+				{
+					if(i != pAd->chipCap.EFUSE_USAGE_MAP_END)
+					{
+						BlkNum = i+1-pAd->chipCap.EFUSE_USAGE_MAP_START;
+						break;
+					}	
+				}
+
+				if( (LogicalAddress & 0xff) == 0)
+				{
+					if(i != (pAd->chipCap.EFUSE_USAGE_MAP_START-1))
+					{
+						BlkNum = i-pAd->chipCap.EFUSE_USAGE_MAP_START;
+						break;
+					}
+				}
+			}
+			DBGPRINT(RT_DEBUG_TRACE, ("Not bWriteSuccess and allocate new BlkNum = %d\n", BlkNum));	
+			if(BlkNum == 0xffff)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters: out of free E-fuse space!!!\n"));
+				return FALSE;
+			}
+
+			/*invalidate the original mapping entry if new entry is not found*/
+			tmpaddr = addr;
+
+			if(addr % 2 != 0)
+				addr = addr -1; 
+			InBuf[0] = addr;
+			InBuf[1] = 2;		
+			
+			eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);				
+
+			/* write the logical address*/
+			if(tmpaddr%2 != 0) 
+			{
+				/* Invalidate the high byte*/
+				for (i=8; i<15; i++)
+				{
+					if( ( (InBuf[2] >> i) & 0x01) == 0)
+					{
+						InBuf[2] |= (0x1 <<i);
+						break;
+					}	
+				}		
+			}	
+			else
+			{
+				/* invalidate the low byte*/
+				for (i=0; i<8; i++)
+				{
+					if( ( (InBuf[2] >> i) & 0x01) == 0)
+					{
+						InBuf[2] |= (0x1 <<i);
+						break;
+					}	
+				}					
+			}
+			eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 0);	
+		}	
+	}	
+	while (!bWriteSuccess&&Loop<2);	
+	if(!bWriteSuccess)
+		DBGPRINT(RT_DEBUG_ERROR,("Efsue Write Failed!!\n"));
+	return TRUE;
+}
+
+
+/*
+========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+	
+	Note:
+	
+========================================================================
+*/
+static VOID eFuseWritePhysical( 
+	IN	PRTMP_ADAPTER	pAd,	
+  	PUSHORT lpInBuffer,
+	ULONG nInBufferSize,
+  	PUCHAR lpOutBuffer,
+  	ULONG nOutBufferSize  
+)
+{
+	USHORT* pInBuf = (USHORT*)lpInBuffer;
+	int 		i;
+	/*USHORT* pOutBuf = (USHORT*)ioBuffer;*/
+	USHORT Offset = pInBuf[0];					/* addr*/
+	USHORT Length = pInBuf[1];					/* length*/
+	USHORT* pValueX = &pInBuf[2];				/* value ...		*/
+
+	DBGPRINT(RT_DEBUG_TRACE, ("eFuseWritePhysical Offset=0x%x, length=%d\n", Offset, Length));
+
+	{
+		/* Little-endian		S	|	S	Big-endian*/
+		/* addr	3	2	1	0	|	0	1	2	3*/
+		/* Ori-V	D	C	B	A	|	A	B	C	D*/
+		/* After swapping*/
+		/*		D	C	B	A	|	D	C	B	A*/
+		/* Both the little and big-endian use the same sequence to write  data.*/
+		/* Therefore, we only need swap data when read the data.*/
+		for (i=0; i<Length; i+=2)
+		{
+			eFusePhysicalWriteRegisters(pAd, Offset+i, 2, &pValueX[i/2]);	
+		}	
+	}
+}
+
+
+/*
+========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+	
+	Note:
+	
+========================================================================
+*/
+NTSTATUS eFuseWrite(  
+   	IN	PRTMP_ADAPTER	pAd,
+	IN	USHORT			Offset,
+	IN	PUSHORT			pData,
+	IN	USHORT			length)
+{
+	int i;
+	USHORT* pValueX = (PUSHORT) pData;				/*value ...		*/
+	PUSHORT OddWriteByteBuf;
+/*	OddWriteByteBuf=(PUSHORT)kmalloc(sizeof(USHORT)*2, MEM_ALLOC_FLAG);*/
+	os_alloc_mem(NULL, (UCHAR **)&OddWriteByteBuf, sizeof(USHORT)*2);
+	/* The input value=3070 will be stored as following*/
+	/* Little-endian		S	|	S	Big-endian*/
+	/* addr			1	0	|	0	1	*/
+	/* Ori-V			30	70	|	30	70	*/
+	/* After swapping*/
+	/*				30	70	|	70	30*/
+	/* Casting*/
+	/*				3070	|	7030 (x)*/
+	/* The swapping should be removed for big-endian*/
+	if (OddWriteByteBuf == NULL)
+		return FALSE;
+	if((Offset%2)!=0)
+	{
+		length+=2;
+		Offset-=1;
+		eFuseRead(pAd,Offset,OddWriteByteBuf,2);
+		eFuseRead(pAd,Offset+2,(OddWriteByteBuf+1),2);
+		*OddWriteByteBuf&=0x00ff;
+		*OddWriteByteBuf|=((*pData)&0xff)<<8;
+		*(OddWriteByteBuf+1)&=0xff00;
+		*(OddWriteByteBuf+1)|=(*pData&0xff00)>>8;
+		pValueX=OddWriteByteBuf;
+		
+	}
+	
+	for(i=0; i<length; i+=2)
+	{
+		eFuseWriteRegisters(pAd, Offset+i, 2, &pValueX[i/2]);	
+	}
+/*	kfree(OddWriteByteBuf);*/
+	os_free_mem(NULL, OddWriteByteBuf);
+	return TRUE;
+}
+
+
+/*
+========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+	
+	Note:
+	
+========================================================================
+*/
+INT set_eFuseGetFreeBlockCount_Proc(  
+   	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg)
+{
+	UINT efusefreenum=0;
+	if (pAd->bUseEfuse == FALSE && pAd->bFroceEEPROMBuffer == FALSE)
+		return FALSE;
+	eFuseGetFreeBlockCount(pAd, &efusefreenum);	
+	printk("efuseFreeNumber is %d\n",efusefreenum);
+	return TRUE;
+}
+
+
+INT set_eFusedump_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg)
+{
+	USHORT InBuf[3];
+	INT i=0;
+	
+	if (pAd->bUseEfuse == FALSE && pAd->bFroceEEPROMBuffer == FALSE)
+		return FALSE;
+	
+	for(i =0; i<pAd->chipCap.EFUSE_USAGE_MAP_END/2; i++)
+	{
+		InBuf[0] = 2*i;
+		InBuf[1] = 2;
+		InBuf[2] = 0x0;	
+		
+		eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
+		if(i%4==0)
+		printk("\nBlock %x:",i/8);
+		printk("%04x ",InBuf[2]);
+	}
+	return TRUE;
+}
+
+
+INT	set_eFuseLoadFromBin_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg)
+{
+	PSTRING					src;
+	RTMP_OS_FD				srcf;
+	RTMP_OS_FS_INFO			osfsInfo;
+	INT 						retval, memSize;
+	PSTRING					buffer, memPtr;
+	INT						TotalByte= 0,ReadedByte=0,CompareBuf=1;
+	USHORT					*PDATA;
+	USHORT					DATA;
+	
+	memSize = 128 + MAX_EEPROM_BIN_FILE_SIZE + sizeof(USHORT) * 8;
+/*	memPtr = kmalloc(memSize, MEM_ALLOC_FLAG);*/
+	os_alloc_mem(NULL, (UCHAR **)&memPtr, memSize);
+	if (memPtr == NULL)
+		return FALSE;
+
+	NdisZeroMemory(memPtr, memSize);
+	src = memPtr; /* kmalloc(128, MEM_ALLOC_FLAG);*/
+	buffer = src + 128;		/* kmalloc(MAX_EEPROM_BIN_FILE_SIZE, MEM_ALLOC_FLAG);*/
+	PDATA = (USHORT*)(buffer + MAX_EEPROM_BIN_FILE_SIZE);	/* kmalloc(sizeof(USHORT)*8,MEM_ALLOC_FLAG);*/
+	
+ 	if(strlen(arg)>0)
+		NdisMoveMemory(src, arg, strlen(arg));
+	else
+		NdisMoveMemory(src, EFUSE_EEPROM_DEFULT_FILE, strlen(EFUSE_EEPROM_DEFULT_FILE));
+	DBGPRINT(RT_DEBUG_TRACE, ("FileName=%s\n",src));
+
+	RtmpOSFSInfoChange(&osfsInfo, TRUE);
+
+	srcf = RtmpOSFileOpen(src, O_RDONLY, 0);
+	if (IS_FILE_OPEN_ERR(srcf)) 
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("--> Error opening file %s\n", src));
+		retval = FALSE;
+		goto recoverFS;
+	}
+	else 
+	{
+		/* The object must have a read method*/
+		while(RtmpOSFileRead(srcf, &buffer[TotalByte], 1)==1)
+		{
+          		TotalByte++;
+			if(TotalByte>MAX_EEPROM_BIN_FILE_SIZE)
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("--> Error reading file %s, file size too large[>%d]\n", src, MAX_EEPROM_BIN_FILE_SIZE));
+				retval = FALSE;
+				goto closeFile;
+			}
+		}
+
+		retval = RtmpOSFileClose(srcf);
+		if (retval)
+			DBGPRINT(RT_DEBUG_TRACE, ("--> Error closing file %s\n", src));
+  	}
+
+	
+	RtmpOSFSInfoChange(&osfsInfo, FALSE);
+
+	for(ReadedByte=0;ReadedByte<TotalByte;ReadedByte++)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("%02X ",buffer[ReadedByte]&0xff));
+		if((ReadedByte+1)%2==0)
+			PDATA[ReadedByte/2%8]=((buffer[ReadedByte]<<8)&0xff00)|(buffer[ReadedByte-1]&0xff);
+		if(ReadedByte%16==0)
+		{
+			CompareBuf=buffer[ReadedByte]&0xff;
+		
+		}
+		else
+		{
+			CompareBuf&=(buffer[ReadedByte]&0xff);
+			if((ReadedByte+1)%16==0)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, (" result=%02X,blk=%02x\n",CompareBuf,ReadedByte/16));
+
+				if(CompareBuf!=0xff)
+					eFuseWriteRegistersFromBin(pAd,(USHORT)ReadedByte-15, 16, PDATA);
+				else
+				{
+					if(eFuseReadRegisters(pAd,ReadedByte, 2,(PUSHORT)&DATA)!=0x3f)
+						eFuseWriteRegistersFromBin(pAd,(USHORT)ReadedByte-15, 16, PDATA);
+				}
+				/*
+				for(l=0;l<8;l++)
+					printk("%04x ",PDATA[l]);
+				printk("\n");
+				*/
+				NdisZeroMemory(PDATA,16);
+			}
+		}
+	}
+	
+	return TRUE;
+
+closeFile:
+	if (srcf)
+		if (RtmpOSFileClose(srcf) != 0)
+			retval = FALSE;
+
+recoverFS:
+	RtmpOSFSInfoChange(&osfsInfo, FALSE);
+	
+
+	if (memPtr)
+/*		kfree(memPtr);*/
+		os_free_mem(NULL, memPtr);
+	
+	return retval;
+}
+
+
+static NTSTATUS eFuseWriteRegistersFromBin(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	USHORT Offset, 
+	IN	USHORT Length, 
+	IN	USHORT* pData)
+{
+	USHORT	i,StartBlock=0,EndBlock=0;
+	USHORT	eFuseData;
+	USHORT	LogicalAddress, BlkNum = 0xffff;
+	UCHAR	EFSROM_AOUT,Loop=0;
+	EFUSE_CTRL_STRUC		eFuseCtrlStruc;
+	USHORT	efuseDataOffset;
+	UINT32	data,tempbuffer;
+	USHORT addr,tmpaddr, InBuf[3], tmpOffset;
+	UINT32 buffer[4];
+	BOOLEAN		bWriteSuccess = TRUE;
+	BOOLEAN		bNotWrite=TRUE;
+	BOOLEAN		bAllocateNewBlk=TRUE;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin Offset=%x, pData=%04x:%04x:%04x:%04x\n", Offset, *pData,*(pData+1),*(pData+2),*(pData+3)));
+	/*set start block and end block number, start from tail of mapping table*/
+	if( (pAd->chipCap.EFUSE_USAGE_MAP_END % 2) != 0)
+	{
+		StartBlock = pAd->chipCap.EFUSE_USAGE_MAP_END-1; 
+	}
+	else
+	{
+		StartBlock = pAd->chipCap.EFUSE_USAGE_MAP_END; 
+	}
+
+	if( (pAd->chipCap.EFUSE_USAGE_MAP_START % 2) != 0)
+	{
+		EndBlock = pAd->chipCap.EFUSE_USAGE_MAP_START-1; 
+	}
+	else
+	{
+		EndBlock = pAd->chipCap.EFUSE_USAGE_MAP_START; 
+	}
+	
+	do
+	{
+	/*Step 0. find the entry in the mapping table*/
+	/*The address of EEPROM is 2-bytes alignment.*/
+	/*The last bit is used for alignment, so it must be 0.*/
+	Loop++;
+	tmpOffset = Offset & 0xfffe;
+	EFSROM_AOUT = eFuseReadRegisters(pAd, tmpOffset, 2, &eFuseData);
+	
+	if( EFSROM_AOUT == 0x3f)
+	{	/*find available logical address pointer	*/
+		/*the logical address does not exist, find an empty one*/
+		/*from the first address of block 45=16*45=0x2d0 to the last address of block 47*/
+		/*==>48*16-3(reserved)=2FC*/
+		bAllocateNewBlk=TRUE;
+		for (i=StartBlock; i>=EndBlock; i-=2)
+		{
+			/*Retrive the logical block nubmer form each logical address pointer*/
+			/*It will access two logical address pointer each time.*/
+			eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
+			if(( (LogicalAddress >> 8) & 0xff) == 0)
+			{
+				if(i != pAd->chipCap.EFUSE_USAGE_MAP_END)
+				{
+					BlkNum = i+1-pAd->chipCap.EFUSE_USAGE_MAP_START;
+					break;
+				}	
+			}
+
+			if( (LogicalAddress & 0xff) == 0)
+			{
+				if(i != (pAd->chipCap.EFUSE_USAGE_MAP_START-1))
+				{
+					BlkNum = i-pAd->chipCap.EFUSE_USAGE_MAP_START;
+					break;
+				}
+			}
+			
+		}
+	}
+	else
+	{
+		bAllocateNewBlk=FALSE;
+		BlkNum = EFSROM_AOUT;
+	}	
+
+	DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters BlkNum = %d \n", BlkNum));
+
+	if(BlkNum == 0xffff)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters: out of free E-fuse space!!!\n"));
+		return FALSE;
+	}	
+	/*Step 1.1.0*/
+	/*If the block is not existing in mapping table, create one */
+	/*and write down the 16-bytes data to the new block*/
+	if(bAllocateNewBlk)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("Allocate New Blk\n"));
+		efuseDataOffset =  EFUSE_DATA3;
+		for(i=0; i< 4; i++)
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("Allocate New Blk, Data%d=%04x%04x\n",3-i,pData[2*i+1],pData[2*i]));
+			tempbuffer=((pData[2*i+1]<<16)&0xffff0000)|pData[2*i];
+
+
+			RTMP_IO_WRITE32(pAd, efuseDataOffset,tempbuffer);			
+			efuseDataOffset -= 4;		
+
+		}
+
+		/*Step1.1.1. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.*/
+		RTMP_IO_READ32(pAd, EFUSE_CTRL, &eFuseCtrlStruc.word);
+		eFuseCtrlStruc.field.EFSROM_AIN = BlkNum* 0x10 ;
+
+		/*Step1.1.2. Write EFSROM_MODE (0x580, bit7:bit6) to 3.*/
+		eFuseCtrlStruc.field.EFSROM_MODE = 3;
+		
+		/*Step1.1.3. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical write procedure.*/
+		eFuseCtrlStruc.field.EFSROM_KICK = 1;
+
+		NdisMoveMemory(&data, &eFuseCtrlStruc, 4);	
+		
+		RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);	
+
+		/*Step1.1.4. Polling EFSROM_KICK(0x580, bit30) until it become 0 again. It¡¦s done.*/
+		i = 0;
+		while(i < 100)
+		{	
+			RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
+
+			if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
+				break;
+			
+			RTMPusecDelay(2);	
+			i++;	
+		}
+		
+	}
+	else
+	{	/*Step1.2.*/
+		/*If the same logical number is existing, check if the writting data and the data */
+		/*saving in this block are the same.*/
+		/*read current values of 16-byte block	*/
+		RTMP_IO_READ32(pAd, EFUSE_CTRL, &eFuseCtrlStruc.word);
+
+		/*Step1.2.0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.*/
+		eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
+
+		/*Step1.2.1. Write EFSROM_MODE (0x580, bit7:bit6) to 1.*/
+		eFuseCtrlStruc.field.EFSROM_MODE = 0;
+
+		/*Step1.2.2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.*/
+		eFuseCtrlStruc.field.EFSROM_KICK = 1;
+
+		NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
+		RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);	
+
+		/*Step1.2.3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.*/
+		i = 0;
+		while(i < 500)
+		{	
+			RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
+
+			if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
+				break;
+			RTMPusecDelay(2);
+			i++;	
+		}
+
+		/*Step1.2.4. Read 16-byte of data from EFUSE_DATA0-3 (0x59C-0x590)*/
+		efuseDataOffset =  EFUSE_DATA3;		
+		for(i=0; i< 4; i++)
+		{
+			RTMP_IO_READ32(pAd, efuseDataOffset, (PUINT32) &buffer[i]);
+			efuseDataOffset -=  4;		
+		}
+		/*Step1.2.5. Check if the data of efuse and the writing data are the same.*/
+		for(i =0; i<4; i++)
+		{
+			tempbuffer=((pData[2*i+1]<<16)&0xffff0000)|pData[2*i];
+			DBGPRINT(RT_DEBUG_TRACE, ("buffer[%d]=%x,pData[%d]=%x,pData[%d]=%x,tempbuffer=%x\n",i,buffer[i],2*i,pData[2*i],2*i+1,pData[2*i+1],tempbuffer));
+			
+			if(((buffer[i]&0xffff0000)==(pData[2*i+1]<<16))&&((buffer[i]&0xffff)==pData[2*i]))
+				bNotWrite&=TRUE;
+			else
+			{
+				bNotWrite&=FALSE;
+				break;
+			}
+		}
+		if(!bNotWrite)
+		{
+		printk("The data is not the same\n");
+		
+			for(i =0; i<8; i++)
+			{
+				addr = BlkNum * 0x10 ;
+				
+				InBuf[0] = addr+2*i;
+				InBuf[1] = 2;
+				InBuf[2] = pData[i];	
+				
+				eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 2);		
+			}
+			
+		}
+		else
+			return TRUE;
+	     }
+	
+
+
+		/*Step 2. Write mapping table*/
+		addr = pAd->chipCap.EFUSE_USAGE_MAP_START+BlkNum;
+
+		tmpaddr = addr;
+
+		if(addr % 2 != 0)
+			addr = addr -1; 
+		InBuf[0] = addr;
+		InBuf[1] = 2;
+
+		/*convert the address from 10 to 8 bit ( bit7, 6 = parity and bit5 ~ 0 = bit9~4), and write to logical map entry*/
+		tmpOffset = Offset;
+		tmpOffset >>= 4;
+		tmpOffset |= ((~((tmpOffset & 0x01) ^ ( tmpOffset >> 1 & 0x01) ^  (tmpOffset >> 2 & 0x01) ^  (tmpOffset >> 3 & 0x01))) << 6) & 0x40;
+		tmpOffset |= ((~( (tmpOffset >> 2 & 0x01) ^ (tmpOffset >> 3 & 0x01) ^ (tmpOffset >> 4 & 0x01) ^ ( tmpOffset >> 5 & 0x01))) << 7) & 0x80;
+
+		/* write the logical address*/
+		if(tmpaddr%2 != 0) 	
+			InBuf[2] = tmpOffset<<8;	
+		else          
+			InBuf[2] = tmpOffset;
+
+		eFuseWritePhysical(pAd,&InBuf[0], 6, NULL, 0);
+
+		/*Step 3. Compare data if not the same, invalidate the mapping entry, then re-write the data until E-fuse is exhausted*/
+		bWriteSuccess = TRUE;
+		for(i =0; i<8; i++)
+		{
+			addr = BlkNum * 0x10 ;
+			
+			InBuf[0] = addr+2*i;
+			InBuf[1] = 2;
+			InBuf[2] = 0x0;	
+			
+			eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
+			DBGPRINT(RT_DEBUG_TRACE, ("addr=%x, buffer[i]=%x,InBuf[2]=%x\n",InBuf[0],pData[i],InBuf[2]));
+			if(pData[i] != InBuf[2])
+			{
+				bWriteSuccess = FALSE;
+				break;
+			}	
+		}
+
+		/*Step 4. invlidate mapping entry and find a free mapping entry if not succeed*/
+		
+		if (!bWriteSuccess&&Loop<2)
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin::Not bWriteSuccess BlkNum = %d\n", BlkNum));
+		
+			/* the offset of current mapping entry*/
+			addr = pAd->chipCap.EFUSE_USAGE_MAP_START+BlkNum;			
+
+			/*find a new mapping entry*/
+			BlkNum = 0xffff;
+			for (i=StartBlock; i>=EndBlock; i-=2)
+			{
+				/*Retrive the logical block nubmer form each logical address pointer*/
+				/*It will access two logical address pointer each time.*/
+				eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
+				if(( (LogicalAddress >> 8) & 0xff) == 0)
+				{
+					if(i !=pAd->chipCap.EFUSE_USAGE_MAP_END)
+					{
+						BlkNum = i+1-pAd->chipCap.EFUSE_USAGE_MAP_START;
+						break;
+					}	
+				}
+
+				if( (LogicalAddress & 0xff) == 0)
+				{
+					if(i != (pAd->chipCap.EFUSE_USAGE_MAP_START-1))
+					{
+						BlkNum = i-pAd->chipCap.EFUSE_USAGE_MAP_START;
+						break;
+					}
+				}
+			
+			}
+			
+			DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin::Not bWriteSuccess new BlkNum = %d\n", BlkNum));	
+			if(BlkNum == 0xffff)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin: out of free E-fuse space!!!\n"));
+				return FALSE;
+			}
+
+			/*invalidate the original mapping entry if new entry is not found*/
+			tmpaddr = addr;
+
+			if(addr % 2 != 0)
+				addr = addr -1; 
+			InBuf[0] = addr;
+			InBuf[1] = 2;		
+			
+			eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);				
+
+			/* write the logical address*/
+			if(tmpaddr%2 != 0) 
+			{
+				/* Invalidate the high byte*/
+				for (i=8; i<15; i++)
+				{
+					if( ( (InBuf[2] >> i) & 0x01) == 0)
+					{
+						InBuf[2] |= (0x1 <<i);
+						break;
+					}	
+				}		
+			}	
+			else
+			{
+				/* invalidate the low byte*/
+				for (i=0; i<8; i++)
+				{
+					if( ( (InBuf[2] >> i) & 0x01) == 0)
+					{
+						InBuf[2] |= (0x1 <<i);
+						break;
+					}	
+				}					
+			}
+			eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 0);	
+		}	
+		
+	}
+	while(!bWriteSuccess&&Loop<2);
+
+	return TRUE;
+}
+
+
+int rtmp_ee_efuse_read16(
+	IN RTMP_ADAPTER *pAd, 
+	IN USHORT Offset,
+	OUT USHORT *pValue)
+{
+	 DBGPRINT(RT_DEBUG_TRACE,  ("rtmp_ee_efuse_read16\n"));
+	if (pAd->bFroceEEPROMBuffer
+#ifdef RALINK_ATE
+			||pAd->bEEPROMFile
+#endif /* RALINK_ATE */
+		)
+	{
+	    DBGPRINT(RT_DEBUG_TRACE,  ("Read from EEPROM Buffer\n"));
+	    NdisMoveMemory(pValue, &(pAd->EEPROMImage[Offset]), 2);
+	    *pValue = le2cpu16(*pValue);
+	}
+	else
+		eFuseReadRegisters(pAd, Offset, 2, pValue);
+	return (*pValue);
+}
+
+
+int rtmp_ee_efuse_write16(
+	IN RTMP_ADAPTER *pAd, 
+	IN USHORT Offset, 
+	IN USHORT data)
+{
+    if (pAd->bFroceEEPROMBuffer
+#ifdef RALINK_ATE
+			||pAd->bEEPROMFile
+#endif /* RALINK_ATE */
+		)
+    {
+    	data = le2cpu16(data);
+        DBGPRINT(RT_DEBUG_TRACE,  ("Write to EEPROM Buffer\n"));
+        NdisMoveMemory(&(pAd->EEPROMImage[Offset]), &data, 2);
+    }
+    else
+        eFuseWrite(pAd,Offset ,&data, 2);
+	return 0;
+}
+
+
+int RtmpEfuseSupportCheck(
+	IN RTMP_ADAPTER *pAd)
+{
+	USHORT value;
+	
+	if (IS_RT30xx(pAd) || IS_RT3593(pAd))
+	{
+		eFusePhysicalReadRegisters(pAd, EFUSE_TAG, 2, &value);
+		pAd->EFuseTag = (value & 0xff);
+	}
+	return 0;
+}
+
+
+#ifdef RALINK_ATE
+INT set_eFuseBufferModeWriteBack_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg)
+{
+	UINT Enable;
+	
+
+ 	if(strlen(arg)>0)	
+	{
+		Enable= simple_strtol(arg, 0, 16);
+ 	}
+	else
+		return FALSE;
+	if(Enable==1)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("set_eFuseBufferMode_Proc:: Call WRITEEEPROMBUF"));	
+		eFuseWriteEeeppromBuf(pAd);
+	}
+	else
+		return FALSE;
+	return TRUE;
+}
+#endif /* RALINK_ATE */
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Load EEPROM from bin file for eFuse mode
+
+	Arguments:
+		Adapter						Pointer to our adapter
+
+	Return Value:
+		NDIS_STATUS_SUCCESS         firmware image load ok
+		NDIS_STATUS_FAILURE         image not found
+
+	IRQL = PASSIVE_LEVEL
+		
+	========================================================================
+*/
+INT eFuseLoadEEPROM(
+	IN PRTMP_ADAPTER pAd)
+{
+	PSTRING					src = NULL;
+	INT 						retval;			
+	RTMP_OS_FD				srcf;
+	RTMP_OS_FS_INFO			osFSInfo;
+
+	
+	src=EFUSE_BUFFER_PATH;
+	DBGPRINT(RT_DEBUG_TRACE, ("FileName=%s\n",src));
+
+
+	RtmpOSFSInfoChange(&osFSInfo, TRUE);
+
+	if (src && *src)
+	{
+		srcf = RtmpOSFileOpen(src, O_RDONLY, 0);
+		if (IS_FILE_OPEN_ERR(srcf)) 
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("--> Error opening %s\n", src));
+			return FALSE;
+		}
+		else 
+		{
+
+				memset(pAd->EEPROMImage, 0x00, MAX_EEPROM_BIN_FILE_SIZE);
+				
+
+			retval =RtmpOSFileRead(srcf, (PSTRING)pAd->EEPROMImage, MAX_EEPROM_BIN_FILE_SIZE);
+			if (retval > 0)
+							{
+				
+				retval = NDIS_STATUS_SUCCESS;
+			}
+			else
+				DBGPRINT(RT_DEBUG_ERROR, ("Read file \"%s\" failed(errCode=%d)!\n", src, retval));
+
+      		}
+
+
+	}
+	else
+		{
+					DBGPRINT(RT_DEBUG_ERROR, ("--> Error src  or srcf is null\n"));
+					return FALSE;
+
+		}
+
+	retval=RtmpOSFileClose(srcf);
+			
+	if (retval)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("--> Error %d closing %s\n", -retval, src));
+	}
+
+
+	RtmpOSFSInfoChange(&osFSInfo, FALSE);
+
+	return TRUE;	
+}
+
+INT eFuseWriteEeeppromBuf(
+	IN PRTMP_ADAPTER pAd)
+{
+
+	PSTRING					src = NULL;
+	INT 						retval;			
+	RTMP_OS_FD				srcf;
+	RTMP_OS_FS_INFO			osFSInfo;
+						
+	
+	src=EFUSE_BUFFER_PATH;
+	DBGPRINT(RT_DEBUG_TRACE, ("FileName=%s\n",src));
+
+	RtmpOSFSInfoChange(&osFSInfo, TRUE);
+	
+
+
+	if (src && *src)
+	{
+		srcf = RtmpOSFileOpen(src, O_WRONLY|O_CREAT, 0);
+
+		if (IS_FILE_OPEN_ERR(srcf)) 
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("--> Error opening %s\n", src));
+			return FALSE;
+		}
+		else 
+		{
+
+			RtmpOSFileWrite(srcf, (PSTRING)pAd->EEPROMImage,MAX_EEPROM_BIN_FILE_SIZE);
+
+      		}
+
+
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("--> Error src  or srcf is null\n"));
+		return FALSE;
+
+	}
+
+	retval=RtmpOSFileClose(srcf);
+			
+	if (retval)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("--> Error %d closing %s\n", -retval, src));
+	}
+	
+	RtmpOSFSInfoChange(&osFSInfo, FALSE);
+	return TRUE;	
+}
+
+
+VOID eFuseGetFreeBlockCount(IN PRTMP_ADAPTER pAd, 
+	PUINT EfuseFreeBlock)
+{
+	
+	USHORT i=0, StartBlock=0, EndBlock=0;
+	USHORT	LogicalAddress;
+	USHORT	FirstFreeBlock = 0xffff, LastFreeBlock = 0xffff;
+
+	if(!pAd->bUseEfuse)
+		{
+		DBGPRINT(RT_DEBUG_TRACE,("eFuseGetFreeBlockCount Only supports efuse Mode\n"));
+		return ;
+		}
+	*EfuseFreeBlock = 0;
+	/* find first free block*/
+	if( (pAd->chipCap.EFUSE_USAGE_MAP_START % 2) != 0)
+	{
+		StartBlock = pAd->chipCap.EFUSE_USAGE_MAP_START-1; 
+	}
+	else
+	{
+		StartBlock = pAd->chipCap.EFUSE_USAGE_MAP_START; 
+	}
+
+	if( (pAd->chipCap.EFUSE_USAGE_MAP_END % 2) != 0)
+	{
+		EndBlock = pAd->chipCap.EFUSE_USAGE_MAP_END-1; 
+	}
+	else
+	{
+		EndBlock = pAd->chipCap.EFUSE_USAGE_MAP_END; 
+	}
+
+	for (i = StartBlock; i <= EndBlock; i+=2)
+	{
+		eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
+		
+		if( (LogicalAddress & 0xff) == 0)
+		{
+			if(i != (pAd->chipCap.EFUSE_USAGE_MAP_START-1))
+			{
+				FirstFreeBlock = i;
+				break;
+			}
+		}		
+
+		if(( (LogicalAddress >> 8) & 0xff) == 0)
+		{
+			if(i != pAd->chipCap.EFUSE_USAGE_MAP_END)
+			{
+				FirstFreeBlock = i+1;
+				break;
+			}	
+		}			
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("eFuseGetFreeBlockCount, FirstFreeBlock= 0x%x\n", FirstFreeBlock));
+
+	/*if not find, return free block number = 0*/
+	if(FirstFreeBlock == 0xffff)
+	{
+		*EfuseFreeBlock = 0;
+		return;	
+	}
+	for (i = EndBlock; i >= StartBlock; i-=2)
+	{
+		eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
+				
+		if(( (LogicalAddress >> 8) & 0xff) == 0)
+		{
+			if(i != pAd->chipCap.EFUSE_USAGE_MAP_END)
+			{
+				LastFreeBlock = i+1;
+				break;
+			}	
+		}
+
+		if( (LogicalAddress & 0xff) == 0)
+		{
+			if(i != (pAd->chipCap.EFUSE_USAGE_MAP_START-1))
+			{
+				LastFreeBlock = i;
+				break;
+			}
+		}
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("eFuseGetFreeBlockCount, LastFreeBlock= 0x%x\n", LastFreeBlock));
+
+	/*if not find last free block, return free block number = 0, this should not happen since we have checked first free block number previously*/
+	if(LastFreeBlock == 0xffff)
+	{
+		*EfuseFreeBlock = 0;
+		return;	
+	}
+
+	/* return total free block number, last free block number must >= first free block number*/
+	if(LastFreeBlock < FirstFreeBlock)
+	{
+		*EfuseFreeBlock = 0;	
+	}
+	else
+	{
+		*EfuseFreeBlock = LastFreeBlock - FirstFreeBlock + 1;
+	}
+	
+	DBGPRINT(RT_DEBUG_TRACE,("eFuseGetFreeBlockCount is %d\n",*EfuseFreeBlock));
+}
+
+INT eFuse_init(
+	IN PRTMP_ADAPTER pAd)
+{
+	UINT	EfuseFreeBlock=0;
+	/*RT3572 means 3062/3562/3572*/
+	/*3593 means 3593*/
+	DBGPRINT(RT_DEBUG_ERROR, ("NVM is Efuse and its size =%x[%x-%x] \n",pAd->chipCap.EFUSE_USAGE_MAP_SIZE,pAd->chipCap.EFUSE_USAGE_MAP_START,pAd->chipCap.EFUSE_USAGE_MAP_END));
+	eFuseGetFreeBlockCount(pAd, &EfuseFreeBlock);
+	/*If the used block of efuse is less than 5. We assume the default value*/
+	/* of this efuse is empty and change to the buffer mode in odrder to */
+	/*bring up interfaces successfully.*/
+	
+	
+	if(EfuseFreeBlock > (pAd->chipCap.EFUSE_USAGE_MAP_SIZE-5))
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("NVM is Efuse and the information is too less to bring up interface. Force to use EEPROM Buffer Mode\n"));
+		pAd->bFroceEEPROMBuffer = TRUE;
+		eFuseLoadEEPROM(pAd);
+	}
+	else
+		pAd->bFroceEEPROMBuffer = FALSE;
+	DBGPRINT(RT_DEBUG_TRACE, ("NVM is Efuse and force to use EEPROM Buffer Mode=%x\n",pAd->bFroceEEPROMBuffer));
+
+	return 0;
+}
+
+#endif /* RTMP_EFUSE_SUPPORT */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/ee_prom.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/ee_prom.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/ee_prom.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/ee_prom.c	2017-09-23 03:42:49.742675907 +0800
@@ -0,0 +1,309 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include	"rt_config.h"
+
+
+
+/* IRQL = PASSIVE_LEVEL*/
+static inline VOID RaiseClock(
+    IN	PRTMP_ADAPTER	pAd,
+    IN  UINT32 *x)
+{
+	*x = *x | EESK;
+	RTMP_IO_WRITE32(pAd, E2PROM_CSR, *x);
+	RTMPusecDelay(1);				/* Max frequency = 1MHz in Spec. definition */
+}
+
+/* IRQL = PASSIVE_LEVEL*/
+static inline VOID LowerClock(
+    IN	PRTMP_ADAPTER	pAd,
+    IN  UINT32 *x)
+{
+	*x = *x & ~EESK;
+	RTMP_IO_WRITE32(pAd, E2PROM_CSR, *x);
+	RTMPusecDelay(1);
+}
+
+/* IRQL = PASSIVE_LEVEL*/
+static inline USHORT ShiftInBits(
+	IN PRTMP_ADAPTER	pAd)
+{
+	UINT32		x,i;
+	USHORT      data=0;
+
+	RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
+
+	x &= ~( EEDO | EEDI);
+
+	for(i=0; i<16; i++)
+	{
+		data = data << 1;
+		RaiseClock(pAd, &x);
+
+		RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
+		LowerClock(pAd, &x); /*prevent read failed*/
+		
+		x &= ~(EEDI);
+		if(x & EEDO)
+		    data |= 1;
+	}
+
+	return data;
+}
+
+
+/* IRQL = PASSIVE_LEVEL*/
+static inline VOID ShiftOutBits(
+	IN PRTMP_ADAPTER	pAd,
+	IN USHORT			data,
+	IN USHORT			count)
+{
+	UINT32       x,mask;
+
+	mask = 0x01 << (count - 1);
+	RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
+
+	x &= ~(EEDO | EEDI);
+
+	do
+	{
+	    x &= ~EEDI;
+	    if(data & mask)		x |= EEDI;
+
+	    RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
+
+	    RaiseClock(pAd, &x);
+	    LowerClock(pAd, &x);
+
+	    mask = mask >> 1;
+	} while(mask);
+
+	x &= ~EEDI;
+	RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
+}
+
+
+/* IRQL = PASSIVE_LEVEL*/
+static inline VOID EEpromCleanup(
+	IN PRTMP_ADAPTER	pAd)
+{
+	UINT32 x;
+
+	RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
+
+	x &= ~(EECS | EEDI);
+	RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
+
+	RaiseClock(pAd, &x);
+	LowerClock(pAd, &x);	
+}
+
+
+static inline VOID EWEN(
+	IN PRTMP_ADAPTER	pAd)
+{
+	UINT32	x;
+
+	/* reset bits and set EECS*/
+	RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
+	x &= ~(EEDI | EEDO | EESK);
+	x |= EECS;
+	RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
+
+	/* kick a pulse*/
+	RaiseClock(pAd, &x);
+	LowerClock(pAd, &x);
+
+	/* output the read_opcode and six pulse in that order    */
+	ShiftOutBits(pAd, EEPROM_EWEN_OPCODE, 5);
+	ShiftOutBits(pAd, 0, 6);
+
+	EEpromCleanup(pAd);    
+}
+
+
+static inline VOID EWDS(
+	IN PRTMP_ADAPTER	pAd)
+{
+	UINT32	x;
+
+	/* reset bits and set EECS*/
+	RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
+	x &= ~(EEDI | EEDO | EESK);
+	x |= EECS;
+	RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
+
+	/* kick a pulse*/
+	RaiseClock(pAd, &x);
+	LowerClock(pAd, &x);
+
+	/* output the read_opcode and six pulse in that order    */
+	ShiftOutBits(pAd, EEPROM_EWDS_OPCODE, 5);
+	ShiftOutBits(pAd, 0, 6);
+
+	EEpromCleanup(pAd);    
+}
+
+
+/* IRQL = PASSIVE_LEVEL*/
+int rtmp_ee_prom_read16(
+	IN PRTMP_ADAPTER	pAd,
+	IN USHORT			Offset,
+	OUT USHORT			*pValue)
+{
+	UINT32		x;
+	USHORT		data;
+
+#ifdef RT30xx
+#ifdef ANT_DIVERSITY_SUPPORT
+/*
+	 Old chips use single circuit to contorl EEPROM and AntDiversity, so need protect.
+	 AntDiversity of RT5390 is independence internal circuit, so doesn't need protect.
+*/
+	if (pAd->NicConfig2.field.AntDiversity && (!IS_RT5390(pAd)))
+	{
+		pAd->EepromAccess = TRUE;
+	}
+#endif /* ANT_DIVERSITY_SUPPORT */
+#endif /* RT30xx */
+
+	Offset /= 2;
+	/* reset bits and set EECS*/
+	RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
+	x &= ~(EEDI | EEDO | EESK);
+	x |= EECS;
+	RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
+
+	/* patch can not access e-Fuse issue*/
+	if (!(IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd) || IS_RT3593(pAd)|| IS_RT5390(pAd)))
+	{
+		/* kick a pulse*/
+		RaiseClock(pAd, &x);
+		LowerClock(pAd, &x);
+	}
+
+	/* output the read_opcode and register number in that order    */
+	ShiftOutBits(pAd, EEPROM_READ_OPCODE, 3);
+	ShiftOutBits(pAd, Offset, pAd->EEPROMAddressNum);
+
+	/* Now read the data (16 bits) in from the selected EEPROM word*/
+	data = ShiftInBits(pAd);
+
+	EEpromCleanup(pAd);
+
+#ifdef RT30xx
+#ifdef ANT_DIVERSITY_SUPPORT
+	/* Antenna and EEPROM access are both using EESK pin,*/
+	/* Therefor we should avoid accessing EESK at the same time*/
+	/* Then restore antenna after EEPROM access*/
+	/*AntDiversity of RT5390 is independence internal circuit, so doesn't need protect.*/
+	if ((pAd->NicConfig2.field.AntDiversity) && (!(IS_RT5390(pAd)))/* || (pAd->RfIcType == RFIC_3020)*/)
+	{
+		pAd->EepromAccess = FALSE;
+		AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
+	}
+#endif /* ANT_DIVERSITY_SUPPORT */
+#endif /* RT30xx */
+
+	*pValue = data;
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+int rtmp_ee_prom_write16(
+    IN  PRTMP_ADAPTER	pAd,
+    IN  USHORT Offset,
+    IN  USHORT Data)
+{
+	UINT32 x;
+
+#ifdef RT30xx
+#ifdef ANT_DIVERSITY_SUPPORT
+	/* Old chips use single circuit to contorl EEPROM and AntDiversity, so need protect. */
+	/* AntDiversity of RT5390 is independence internal circuit, so doesn't need protect. */
+	if (pAd->NicConfig2.field.AntDiversity && (!IS_RT5390(pAd))) 
+	{
+		pAd->EepromAccess = TRUE;
+	}
+#endif /* ANT_DIVERSITY_SUPPORT */
+#endif /* RT30xx */
+
+	Offset /= 2;
+
+	EWEN(pAd);
+
+	/* reset bits and set EECS*/
+	RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
+	x &= ~(EEDI | EEDO | EESK);
+	x |= EECS;
+	RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
+
+	/* patch can not access e-Fuse issue*/
+	if (!(IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd) || IS_RT3593(pAd) || IS_RT5390(pAd)))
+	{
+		/* kick a pulse*/
+		RaiseClock(pAd, &x);
+		LowerClock(pAd, &x);
+	}
+	
+	/* output the read_opcode ,register number and data in that order    */
+	ShiftOutBits(pAd, EEPROM_WRITE_OPCODE, 3);
+	ShiftOutBits(pAd, Offset, pAd->EEPROMAddressNum);
+	ShiftOutBits(pAd, Data, 16);		/* 16-bit access*/
+
+	/* read DO status*/
+	RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
+
+	EEpromCleanup(pAd);
+
+	RTMPusecDelay(10000);	/*delay for twp(MAX)=10ms*/
+
+	EWDS(pAd);
+
+	EEpromCleanup(pAd);
+
+#ifdef RT30xx
+#ifdef ANT_DIVERSITY_SUPPORT
+	/* Antenna and EEPROM access are both using EESK pin,*/
+	/* Therefor we should avoid accessing EESK at the same time*/
+	/* Then restore antenna after EEPROM access*/
+	/* AntDiversity of RT5390 is independence internal circuit, so doesn't need protect. */
+	if ((pAd->NicConfig2.field.AntDiversity) && (!IS_RT5390(pAd)) /*|| (pAd->RfIcType == RFIC_3020)*/)
+	{
+		pAd->EepromAccess = FALSE;
+		AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
+	}
+#endif /* ANT_DIVERSITY_SUPPORT */
+#endif /* RT30xx */
+
+	return NDIS_STATUS_SUCCESS;
+	
+}
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/eeprom.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/eeprom.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/eeprom.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/eeprom.c	2017-09-23 03:42:49.746675895 +0800
@@ -0,0 +1,101 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+
+INT RtmpChipOpsEepromHook(
+	IN RTMP_ADAPTER *pAd,
+	IN INT			infType)
+{
+	RTMP_CHIP_OP	*pChipOps = &pAd->chipOps;
+
+#ifdef RTMP_FLASH_SUPPORT
+	pChipOps->eeinit = rtmp_nv_init;
+	pChipOps->eeread = rtmp_ee_flash_read;
+	pChipOps->eewrite = rtmp_ee_flash_write;
+	return 0;
+#endif /* RTMP_FLASH_SUPPORT */
+
+#ifdef RT30xx
+#ifdef RTMP_EFUSE_SUPPORT
+	UINT32			eFuseCtrl, MacCsr0;
+	int index;
+	
+	index = 0;
+	do
+	{
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))			
+			return -1;
+		
+		RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
+		pAd->MACVersion = MacCsr0;
+
+		if ((pAd->MACVersion != 0x00) && (pAd->MACVersion != 0xFFFFFFFF))
+			break;
+
+		RTMPusecDelay(10);
+	} while (index++ < 100);
+	
+	pAd->bUseEfuse=FALSE;
+	RTMP_IO_READ32(pAd, EFUSE_CTRL, &eFuseCtrl);
+	pAd->bUseEfuse = ( (eFuseCtrl & 0x80000000) == 0x80000000) ? 1 : 0;	
+	if(pAd->bUseEfuse)
+	{
+		pChipOps->eeinit = eFuse_init;
+		pChipOps->eeread = rtmp_ee_efuse_read16;
+		pChipOps->eewrite = rtmp_ee_efuse_write16;
+		DBGPRINT(RT_DEBUG_TRACE, ("NVM is EFUSE\n"));
+		return 0 ;	
+	}
+	else
+	{
+		pAd->bFroceEEPROMBuffer = FALSE;
+		DBGPRINT(RT_DEBUG_TRACE, ("NVM is EEPROM\n"));
+	}
+#endif /* RTMP_EFUSE_SUPPORT */
+#endif /* RT30xx */
+
+	switch(infType) 
+	{
+
+
+#ifdef RTMP_USB_SUPPORT
+		case RTMP_DEV_INF_USB:
+			pChipOps->eeinit = NULL;
+			pChipOps->eeread = RTUSBReadEEPROM16;
+			pChipOps->eewrite = RTUSBWriteEEPROM16;
+			break;
+#endif /* RTMP_USB_SUPPORT */
+		default:
+			DBGPRINT(RT_DEBUG_ERROR, ("RtmpChipOpsEepromHook() failed!\n"));
+			break;
+	}
+
+	return 0;
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/frq_cal.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/frq_cal.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/frq_cal.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/frq_cal.c	2017-09-23 03:42:49.746675895 +0800
@@ -0,0 +1,354 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifdef RTMP_FREQ_CALIBRATION_SUPPORT
+#ifdef CONFIG_STA_SUPPORT
+
+#include	"rt_config.h"
+
+/*
+	Sometimes frequency will be shift for RT3593 we need to adjust it when
+	the frequencey shift.
+*/
+
+/* Initialize the frequency calibration*/
+
+/* Parameters*/
+/*	pAd: The adapter data structure*/
+
+/* Return Value:*/
+/*	None*/
+
+VOID InitFrequencyCalibration(
+	IN PRTMP_ADAPTER pAd)
+{
+	BBP_R179_STRUC BbpR179 = {{0}};
+	BBP_R180_STRUC BbpR180 = {{0}};
+	BBP_R182_STRUC BbpR182 = {{0}};
+
+	if (pAd->FreqCalibrationCtrl.bEnableFrequencyCalibration == TRUE)
+	{	
+		DBGPRINT(RT_DEBUG_TRACE, ("---> %s\n", __FUNCTION__));
+		
+		
+		/* Initialize the RX_END_STATUS (1) for "Rx OFDM/CCK frequency offset report"*/
+		
+		if (IS_RT5390(pAd))
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R142, 1);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R143, BBP_R57); /* Rx OFDM/CCK frequency offset report*/
+		}
+		else if (IS_RT3390(pAd))
+		{
+			
+			/* Initialize the RX_END_STATUS (1, 5) for "Rx OFDM/CCK frequency offset report"*/
+			
+			BbpR179.field.DataIndex1 = 1;
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R179, BbpR179.byte);
+			BbpR180.field.DataIndex2 = 5;
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R180, BbpR180.byte);
+			BbpR182.field.DataArray = BBP_R57; /* Rx OFDM/CCK frequency offset report*/
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R182, BbpR182.byte);
+		}
+		else
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("%s: Not support IC type (MACVersion = 0x%X)\n", __FUNCTION__, pAd->MACVersion));
+		}
+		
+		StopFrequencyCalibration(pAd);
+
+		DBGPRINT(RT_DEBUG_TRACE, ("%s: frequency offset in the EEPROM = %ld\n", 
+			__FUNCTION__, 
+			pAd->RfFreqOffset));
+
+		DBGPRINT(RT_DEBUG_TRACE, ("<--- %s\n", __FUNCTION__));
+	}
+}
+
+
+/* To stop the frequency calibration algorithm*/
+
+/* Parameters*/
+/*	pAd: The adapter data structure*/
+
+/* Return Value:*/
+/*	None*/
+
+VOID StopFrequencyCalibration(
+	IN PRTMP_ADAPTER pAd)
+{
+	if (pAd->FreqCalibrationCtrl.bEnableFrequencyCalibration == TRUE)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("---> %s\n", __FUNCTION__));
+
+		/* Base on the frequency offset of the EEPROM*/
+		pAd->FreqCalibrationCtrl.AdaptiveFreqOffset = (0x7F & ((CHAR)(pAd->RfFreqOffset))); /* C1 value control - Crystal calibration*/
+
+		pAd->FreqCalibrationCtrl.LatestFreqOffsetOverBeacon = INVALID_FREQUENCY_OFFSET;
+
+		pAd->FreqCalibrationCtrl.bSkipFirstFrequencyCalibration = TRUE;
+
+		DBGPRINT(RT_DEBUG_TRACE, ("%s: pAd->FreqCalibrationCtrl.AdaptiveFreqOffset = 0x%X\n", 
+			__FUNCTION__, 
+			pAd->FreqCalibrationCtrl.AdaptiveFreqOffset));
+		
+		DBGPRINT(RT_DEBUG_TRACE, ("<--- %s\n", __FUNCTION__));
+	}
+}
+
+
+
+/* The frequency calibration algorithm*/
+
+/* Parameters*/
+/*	pAd: The adapter data structure*/
+
+/* Return Value:*/
+/*	None*/
+
+VOID FrequencyCalibration(
+	IN PRTMP_ADAPTER pAd)
+{
+	BOOLEAN bUpdateRFR = FALSE;
+	UCHAR RFValue = 0;
+	UCHAR PreRFValue = 0;
+	CHAR HighFreqTriggerPoint = 0, LowFreqTriggerPoint = 0;
+	CHAR DecreaseFreqOffset = 0, IncreaseFreqOffset = 0;
+	
+	/* Frequency calibration period: */
+	/* a) 10 seconds: Check the reported frequency offset*/
+	/* b) 500 ms: Update the RF frequency if possible*/
+	
+	if ((pAd->FreqCalibrationCtrl.bEnableFrequencyCalibration == TRUE) && 
+	     (((pAd->FreqCalibrationCtrl.bApproachFrequency == FALSE) && ((pAd->Mlme.PeriodicRound % FREQUENCY_CALIBRATION_PERIOD) == 0)) || 
+	       ((pAd->FreqCalibrationCtrl.bApproachFrequency == TRUE) && ((pAd->Mlme.PeriodicRound % (FREQUENCY_CALIBRATION_PERIOD / 20)) == 0))))
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("---> %s\n", __FUNCTION__));
+
+		if (pAd->FreqCalibrationCtrl.bSkipFirstFrequencyCalibration == TRUE)
+		{
+			pAd->FreqCalibrationCtrl.bSkipFirstFrequencyCalibration = FALSE;
+
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: Skip cuurent frequency calibration (avoid calibrating frequency at the time the STA is just link-up)\n", __FUNCTION__));
+		}
+		else
+		{
+
+			if (pAd->FreqCalibrationCtrl.LatestFreqOffsetOverBeacon != INVALID_FREQUENCY_OFFSET)
+			{	
+				/* Sync the thresholds*/
+				
+				if (pAd->FreqCalibrationCtrl.BeaconPhyMode == MODE_CCK) /* CCK*/
+				{
+					HighFreqTriggerPoint = HIGH_FREQUENCY_TRIGGER_POINT_CCK;
+					LowFreqTriggerPoint = LOW_FREQUENCY_TRIGGER_POINT_CCK;
+
+					DecreaseFreqOffset = DECREASE_FREQUENCY_OFFSET_CCK;
+					IncreaseFreqOffset = INCREASE_FREQUENCY_OFFSET_CCK;
+				}
+				else /* OFDM*/
+				{
+					HighFreqTriggerPoint = HIGH_FREQUENCY_TRIGGER_POINT_OFDM;
+					LowFreqTriggerPoint = LOW_FREQUENCY_TRIGGER_POINT_OFDM;
+
+					DecreaseFreqOffset = DECREASE_FREQUENCY_OFFSET_OFDM;
+					IncreaseFreqOffset = INCREASE_FREQUENCY_OFFSET_OFDM;
+				}
+				
+				if ((pAd->FreqCalibrationCtrl.LatestFreqOffsetOverBeacon >= HighFreqTriggerPoint) || 
+				     (pAd->FreqCalibrationCtrl.LatestFreqOffsetOverBeacon <= LowFreqTriggerPoint))
+				{
+					pAd->FreqCalibrationCtrl.bApproachFrequency = TRUE;
+				}
+				
+				if (pAd->FreqCalibrationCtrl.bApproachFrequency == TRUE)
+				{
+					if ((pAd->FreqCalibrationCtrl.LatestFreqOffsetOverBeacon <= DecreaseFreqOffset) && 
+					      (pAd->FreqCalibrationCtrl.LatestFreqOffsetOverBeacon >= IncreaseFreqOffset))
+					{
+						pAd->FreqCalibrationCtrl.bApproachFrequency = FALSE; /* Stop approaching frquency if -10 < reported frequency offset < 10*/
+					}
+					else if (pAd->FreqCalibrationCtrl.LatestFreqOffsetOverBeacon > DecreaseFreqOffset)
+					{
+						pAd->FreqCalibrationCtrl.AdaptiveFreqOffset--;
+						if (IS_RT3390(pAd))
+						{
+							RT30xxReadRFRegister(pAd, RF_R23, (PUCHAR)(&RFValue));
+							RFValue = ((RFValue & ~0x7F) | (pAd->FreqCalibrationCtrl.AdaptiveFreqOffset & 0x7F));
+							RFValue = min(RFValue, 0x5F);
+							pAd->FreqCalibrationCtrl.AdaptiveFreqOffset = RFValue; /* Keep modified RF R23 value */
+							RT30xxWriteRFRegister(pAd, RF_R23, (UCHAR)RFValue);
+
+							RT30xxReadRFRegister(pAd, RF_R07, (PUCHAR)(&RFValue));
+							RFValue = ((RFValue & ~0x01) | 0x01); /* Tune_en (initiate VCO calibration (reset after completion)) */
+							RT30xxWriteRFRegister(pAd, RF_R07, (UCHAR)RFValue);
+						}
+						else if (IS_RT5390(pAd))
+						{
+							RT30xxReadRFRegister(pAd, RF_R17, (PUCHAR)(&RFValue));
+							PreRFValue = RFValue;
+							RFValue = ((RFValue & ~0x7F) | (pAd->FreqCalibrationCtrl.AdaptiveFreqOffset & 0x7F));
+							RFValue = min(RFValue, 0x5F);
+							pAd->FreqCalibrationCtrl.AdaptiveFreqOffset = RFValue; /* Keep modified RF R17 value */
+							if (PreRFValue != RFValue)
+							{
+								AsicSendCommandToMcu(pAd, 0x74, 0xff, RFValue, PreRFValue);
+							}
+
+							RT30xxReadRFRegister(pAd, RF_R03, (PUCHAR)&RFValue);
+							RFValue = ((RFValue & ~0x80) | 0x80); /* vcocal_en (initiate VCO calibration (reset after completion)) - It should be at the end of RF configuration. */
+							RT30xxWriteRFRegister(pAd, RF_R03, (UCHAR)RFValue);
+						}
+						else if (IS_RT3593(pAd))
+						{
+							RT30xxReadRFRegister(pAd, RF_R17, (PUCHAR)(&RFValue));
+							RFValue = ((RFValue & ~0x7F) | (pAd->FreqCalibrationCtrl.AdaptiveFreqOffset & 0x7F));
+							RFValue = min(RFValue, 0x5F);
+							pAd->FreqCalibrationCtrl.AdaptiveFreqOffset = RFValue; // Keep modified RF R17 value
+							RT30xxWriteRFRegister(pAd, RF_R17, (UCHAR)RFValue);
+
+							RT30xxReadRFRegister(pAd, RF_R03, (PUCHAR)&RFValue);
+							RFValue = ((RFValue & ~0x80) | 0x80); /* vcocal_en (initiate VCO calibration (reset after completion)) - It should be at the end of RF configuration. */
+							RT30xxWriteRFRegister(pAd, RF_R03, (UCHAR)RFValue);
+						}
+						else
+						{
+							DBGPRINT(RT_DEBUG_ERROR, ("%s: Not support IC type (MACVersion = 0x%X)\n", __FUNCTION__, pAd->MACVersion));
+						}
+
+						DBGPRINT(RT_DEBUG_TRACE, ("%s: -- frequency offset = 0x%X\n", __FUNCTION__, pAd->FreqCalibrationCtrl.AdaptiveFreqOffset));
+					}
+					else if (pAd->FreqCalibrationCtrl.LatestFreqOffsetOverBeacon < IncreaseFreqOffset)
+					{
+						pAd->FreqCalibrationCtrl.AdaptiveFreqOffset++;
+						if (IS_RT3390(pAd))
+						{
+							RT30xxReadRFRegister(pAd, RF_R23, (PUCHAR)(&RFValue));
+							RFValue = ((RFValue & ~0x7F) | (pAd->FreqCalibrationCtrl.AdaptiveFreqOffset & 0x7F));
+							RFValue = min(RFValue, 0x5F);
+							pAd->FreqCalibrationCtrl.AdaptiveFreqOffset = RFValue; /* Keep modified RF R23 value */
+							RT30xxWriteRFRegister(pAd, RF_R23, (UCHAR)RFValue);
+
+							RT30xxReadRFRegister(pAd, RF_R07, (PUCHAR)(&RFValue));
+							RFValue = ((RFValue & ~0x01) | 0x01); /* Tune_en (initiate VCO calibration (reset after completion)) */
+							RT30xxWriteRFRegister(pAd, RF_R07, (UCHAR)RFValue);
+						}
+						else if (IS_RT5390(pAd))
+						{
+							RT30xxReadRFRegister(pAd, RF_R17, (PUCHAR)(&RFValue));
+							PreRFValue = RFValue;
+							RFValue = ((RFValue & ~0x7F) | (pAd->FreqCalibrationCtrl.AdaptiveFreqOffset & 0x7F));
+							RFValue = min(RFValue, 0x5F);
+							pAd->FreqCalibrationCtrl.AdaptiveFreqOffset = RFValue; /* Keep modified RF R17 value */
+							if (PreRFValue != RFValue)
+							{
+								AsicSendCommandToMcu(pAd, 0x74, 0xff, RFValue, PreRFValue);
+							}
+
+							RT30xxReadRFRegister(pAd, RF_R03, (PUCHAR)&RFValue);
+						RFValue = ((RFValue & ~0x80) | 0x80); /* vcocal_en (initiate VCO calibration (reset after completion)) - It should be at the end of RF configuration.*/
+						RT30xxWriteRFRegister(pAd, RF_R03, (UCHAR)RFValue);
+						}
+						else if (IS_RT3593(pAd))
+						{
+							RT30xxReadRFRegister(pAd, RF_R17, (PUCHAR)(&RFValue));
+							RFValue = ((RFValue & ~0x7F) | (pAd->FreqCalibrationCtrl.AdaptiveFreqOffset & 0x7F));
+							RFValue = min(RFValue, 0x5F);
+							pAd->FreqCalibrationCtrl.AdaptiveFreqOffset = RFValue; /* Keep modified RF R17 value */
+							RT30xxWriteRFRegister(pAd, RF_R17, (UCHAR)RFValue);
+
+							RT30xxReadRFRegister(pAd, RF_R03, (PUCHAR)&RFValue);
+							RFValue = ((RFValue & ~0x80) | 0x80); /* vcocal_en (initiate VCO calibration (reset after completion)) - It should be at the end of RF configuration. */
+							RT30xxWriteRFRegister(pAd, RF_R03, (UCHAR)RFValue);
+						}
+						else
+						{
+							DBGPRINT(RT_DEBUG_ERROR, ("%s: Not support IC type (MACVersion = 0x%X)\n", __FUNCTION__, pAd->MACVersion));
+						}
+						DBGPRINT(RT_DEBUG_TRACE, ("%s: ++ frequency offset = 0x%X\n", __FUNCTION__, pAd->FreqCalibrationCtrl.AdaptiveFreqOffset));
+					}
+				}
+
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: AdaptiveFreqOffset = %d, LatestFreqOffsetOverBeacon = %d, bApproachFrequency = %d\n", 
+					__FUNCTION__, 
+					pAd->FreqCalibrationCtrl.AdaptiveFreqOffset, 
+					pAd->FreqCalibrationCtrl.LatestFreqOffsetOverBeacon, 
+					pAd->FreqCalibrationCtrl.bApproachFrequency));
+
+			}
+		}
+		
+		DBGPRINT(RT_DEBUG_TRACE, ("<--- %s\n", __FUNCTION__));
+	}
+}
+
+
+
+/* Get the frequency offset*/
+
+/* Parameters*/
+/*	pAd: The adapter data structure*/
+/*	pRxWI: Point to the RxWI structure*/
+
+/* Return Value:*/
+/*	Frequency offset*/
+
+CHAR GetFrequencyOffset(
+	IN PRTMP_ADAPTER pAd, 
+	IN PRXWI_STRUC pRxWI)
+{
+	CHAR FreqOffset = 0;
+	
+	if (pAd->FreqCalibrationCtrl.bEnableFrequencyCalibration == TRUE)
+	{	
+		DBGPRINT(RT_DEBUG_INFO, ("---> %s\n", __FUNCTION__));
+
+		FreqOffset = (CHAR)(pRxWI->FOFFSET);
+
+		if ((FreqOffset < LOWERBOUND_OF_FREQUENCY_OFFSET) || 
+		     (FreqOffset > UPPERBOUND_OF_FREQUENCY_OFFSET))
+		{
+			FreqOffset = INVALID_FREQUENCY_OFFSET;
+
+			DBGPRINT(RT_DEBUG_ERROR, ("%s: (out-of-range) FreqOffset = %d\n", 
+				__FUNCTION__, 
+				FreqOffset));
+		}
+
+		DBGPRINT(RT_DEBUG_INFO, ("%s: FreqOffset = %d\n", 
+			__FUNCTION__, 
+			FreqOffset));
+
+		DBGPRINT(RT_DEBUG_INFO, ("<--- %s\n", __FUNCTION__));
+	}
+
+	return FreqOffset;
+}
+
+#endif /* CONFIG_STA_SUPPORT */
+#endif /* RTMP_FREQ_CALIBRATION_SUPPORT */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/misc.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/misc.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/misc.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/misc.c	2017-09-23 03:42:49.746675895 +0800
@@ -0,0 +1,31 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+#include "misc.h"
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/mlme.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/mlme.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/mlme.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/mlme.c	2017-09-23 03:42:49.754675871 +0800
@@ -0,0 +1,9113 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+#include <stdarg.h>
+
+
+UCHAR	CISCO_OUI[] = {0x00, 0x40, 0x96};
+
+UCHAR   RALINK_OUI[]  = {0x00, 0x0c, 0x43};
+UCHAR	WPA_OUI[] = {0x00, 0x50, 0xf2, 0x01};
+UCHAR	RSN_OUI[] = {0x00, 0x0f, 0xac};
+UCHAR	WAPI_OUI[] = {0x00, 0x14, 0x72};
+UCHAR   WME_INFO_ELEM[]  = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01};
+UCHAR   WME_PARM_ELEM[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01};
+UCHAR   BROADCOM_OUI[]  = {0x00, 0x90, 0x4c};
+UCHAR   WPS_OUI[] = {0x00, 0x50, 0xf2, 0x04};
+#ifdef CONFIG_STA_SUPPORT
+#ifdef DOT11_N_SUPPORT
+UCHAR	PRE_N_HT_OUI[]	= {0x00, 0x90, 0x4c};
+#endif /* DOT11_N_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef CONFIG_APSTA_MIXED_SUPPORT
+UINT32 CW_MAX_IN_BITS;
+#endif /* CONFIG_APSTA_MIXED_SUPPORT */
+
+UCHAR RateSwitchTable[] = {
+/* Item No.   Mode   Curr-MCS   TrainUp   TrainDown		 Mode- Bit0: STBC, Bit1: Short GI, Bit4,5: Mode(0:CCK, 1:OFDM, 2:HT Mix, 3:HT GF)*/
+    0x11, 0x00,  0,  0,  0,						/* Initial used item after association*/
+    0x00, 0x00,  0, 40, 101,
+    0x01, 0x00,  1, 40, 50,
+    0x02, 0x00,  2, 35, 45,
+    0x03, 0x00,  3, 20, 45,
+    0x04, 0x21,  0, 30, 50,
+    0x05, 0x21,  1, 20, 50,
+    0x06, 0x21,  2, 20, 50,
+    0x07, 0x21,  3, 15, 50,
+    0x08, 0x21,  4, 15, 30,
+    0x09, 0x21,  5, 10, 25,
+    0x0a, 0x21,  6,  8, 25,
+    0x0b, 0x21,  7,  8, 25,
+    0x0c, 0x20, 12,  15, 30,
+    0x0d, 0x20, 13,  8, 20,
+    0x0e, 0x20, 14,  8, 20,
+    0x0f, 0x20, 15,  8, 25,
+    0x10, 0x22, 15,  8, 25,
+    0x11, 0x00,  0,  0,  0,
+    0x12, 0x00,  0,  0,  0,
+    0x13, 0x00,  0,  0,  0,
+    0x14, 0x00,  0,  0,  0,
+    0x15, 0x00,  0,  0,  0,
+    0x16, 0x00,  0,  0,  0,
+    0x17, 0x00,  0,  0,  0,
+    0x18, 0x00,  0,  0,  0,
+    0x19, 0x00,  0,  0,  0,
+    0x1a, 0x00,  0,  0,  0,
+    0x1b, 0x00,  0,  0,  0,
+    0x1c, 0x00,  0,  0,  0,
+    0x1d, 0x00,  0,  0,  0,
+    0x1e, 0x00,  0,  0,  0,
+    0x1f, 0x00,  0,  0,  0,
+};
+
+UCHAR RateSwitchTable11B[] = {
+/* Item No.   Mode   Curr-MCS   TrainUp   TrainDown		 Mode- Bit0: STBC, Bit1: Short GI, Bit4,5: Mode(0:CCK, 1:OFDM, 2:HT Mix, 3:HT GF)*/
+    0x04, 0x03,  0,  0,  0,						/* Initial used item after association*/
+    0x00, 0x00,  0, 40, 101,
+    0x01, 0x00,  1, 40, 50,
+    0x02, 0x00,  2, 35, 45,
+    0x03, 0x00,  3, 20, 45,
+};
+
+UCHAR RateSwitchTable11BG[] = {
+/* Item No.   Mode   Curr-MCS   TrainUp   TrainDown		 Mode- Bit0: STBC, Bit1: Short GI, Bit4,5: Mode(0:CCK, 1:OFDM, 2:HT Mix, 3:HT GF)*/
+    0x0a, 0x00,  0,  0,  0,						/* Initial used item after association*/
+    0x00, 0x00,  0, 40, 101,
+    0x01, 0x00,  1, 40, 50,
+    0x02, 0x00,  2, 35, 45,
+    0x03, 0x00,  3, 20, 45,
+    0x04, 0x10,  2, 20, 35,
+    0x05, 0x10,  3, 16, 35,
+    0x06, 0x10,  4, 10, 25,
+    0x07, 0x10,  5, 16, 25,
+    0x08, 0x10,  6, 10, 25,
+    0x09, 0x10,  7, 10, 13,
+};
+
+UCHAR RateSwitchTable11G[] = {
+/* Item No.   Mode   Curr-MCS   TrainUp   TrainDown		 Mode- Bit0: STBC, Bit1: Short GI, Bit4,5: Mode(0:CCK, 1:OFDM, 2:HT Mix, 3:HT GF)*/
+    0x08, 0x00,  0,  0,  0,						/* Initial used item after association*/
+    0x00, 0x10,  0, 20, 101,
+    0x01, 0x10,  1, 20, 35,
+    0x02, 0x10,  2, 20, 35,
+    0x03, 0x10,  3, 16, 35,
+    0x04, 0x10,  4, 10, 25,
+    0x05, 0x10,  5, 16, 25,
+    0x06, 0x10,  6, 10, 25,
+    0x07, 0x10,  7, 10, 13,
+};
+
+#ifdef DOT11_N_SUPPORT
+UCHAR RateSwitchTable11N1S[] = {
+/* Item No.   Mode   Curr-MCS   TrainUp   TrainDown		 Mode- Bit0: STBC, Bit1: Short GI, Bit4,5: Mode(0:CCK, 1:OFDM, 2:HT Mix, 3:HT GF)*/
+    0x0c, 0x0a,  0,  0,  0,						/* Initial used item after association*/
+    0x00, 0x00,  0, 40, 101,
+    0x01, 0x00,  1, 40, 50,
+    0x02, 0x00,  2, 25, 45,
+    0x03, 0x21,  0, 20, 35,
+    0x04, 0x21,  1, 20, 35,
+    0x05, 0x21,  2, 20, 35,
+    0x06, 0x21,  3, 15, 35,
+    0x07, 0x21,  4, 15, 30,
+    0x08, 0x21,  5, 10, 25,
+    0x09, 0x21,  6,  8, 14,
+    0x0a, 0x21,  7,  8, 14,
+    0x0b, 0x23,  7,  8, 14,
+};
+
+
+UCHAR RateSwitchTable11N2S[] = {
+/* Item No.   Mode   Curr-MCS   TrainUp   TrainDown		 Mode- Bit0: STBC, Bit1: Short GI, Bit4,5: Mode(0:CCK, 1:OFDM, 2:HT Mix, 3:HT GF)*/
+    0x0e, 0x0c,  0,  0,  0,						/* Initial used item after association*/
+    0x00, 0x00,  0, 40, 101,
+    0x01, 0x00,  1, 40, 50,
+    0x02, 0x00,  2, 25, 45,
+    0x03, 0x21,  0, 20, 35,
+    0x04, 0x21,  1, 20, 35,
+    0x05, 0x21,  2, 20, 35,
+    0x06, 0x21,  3, 15, 35,
+    0x07, 0x21,  4, 15, 30,
+    0x08, 0x20, 11, 15, 30,
+    0x09, 0x20, 12, 15, 30,
+    0x0a, 0x20, 13,  8, 20,
+    0x0b, 0x20, 14,  8, 20,
+    0x0c, 0x20, 15,  8, 25,
+    0x0d, 0x22, 15,  8, 15,
+};
+
+
+#ifdef NEW_RATE_ADAPT_SUPPORT
+/* 3x3 rate switch table for new rate adaption (default: for good siganl environment (RSSI > -65))*/
+/* Target: Good throughput*/
+
+UCHAR RateSwitchTable11N3S[] = {
+	/* item no.     mcs   highPERThrd  upMcs3   upMcs1     Mode- Bit0: STBC, Bit1: Short GI, Bit4,5: Mode(0:CCK, 1:OFDM, 2:HT Mix, 3:HT GF)*/
+	/*        mode    lowPERThrd  downMcs   upMcs2*/
+    0x19, 0x18,  0,  0,   0,   0,   0,   0,   0,   0,/* Initial used item after association: the number of rate indexes, the initial mcs*/
+    0x00, 0x21,  0, 30, 101,   0,  16,   8,   1,   7,/*mcs0*/
+    0x01, 0x21,  1, 20,  50,   0,  16,   9,   2,  13,/*mcs1*/
+    0x02, 0x21,  2, 20,  50,   1,  17,   9,   3,  20,/*mcs2*/
+    0x03, 0x21,  3, 15,  50,   2,  17,  10,   4,  26,/*mcs3*/
+    0x04, 0x21,  4, 15,  30,   3,  18,  11,   5,  39,/*mcs4*/
+    0x05, 0x21,  5, 10,  25,   4,  18,  12,   6,  52,/*mcs5*/
+    0x06, 0x21,  6,  8,  14,   5,  19,  12,   7,  59,/*mcs6*/
+    0x07, 0x21,  7,  8,  14,   6,  19,  12,   7,  65,/*mcs7*/
+    0x08, 0x20,  8, 30,  50,   0,  16,   9,   2,  13,/*mcs8*/
+    0x09, 0x20,  9, 20,  50,   8,  17,  10,   4,  26,/*mcs9*/
+    0x0a, 0x20, 10, 20,  50,   9,  18,  11,   5,  39,/*mcs10*/
+    0x0b, 0x20, 11, 15,  30,  10,  18,  12,   6,  52,/*mcs11*/
+    0x0c, 0x20, 12, 15,  30,  11,  20,  13,  12,  78,/*mcs12*/
+    0x0d, 0x20, 13,  8,  20,  12,  20,  14,  13, 104,/*mcs13*/
+    0x0e, 0x20, 14,  8,  18,  13,  21,  15,  14, 117,/*mcs14*/
+    0x0f, 0x20, 15,  8,  14,  14,  21,  15,  15, 130,/*mcs15*/
+    0x10, 0x20, 16, 30,  50,   8,  17,   9,   3,  20,/*mcs16*/
+    0x11, 0x20, 17, 20,  50,  16,  18,  11,   5,  39,/*mcs17*/
+    0x12, 0x20, 18, 20,  50,  17,  19,  12,   7,  59,/*mcs18*/
+    0x13, 0x20, 19, 15,  30,  18,  20,  13,  19,  78,/*mcs19*/
+    0x14, 0x20, 20, 15,  30,  19,  21,  15,  20, 117,/*mcs20*/
+    0x15, 0x20, 21,  8,  20,  20,  22,  21,  21, 156,/*mcs21*/
+    0x16, 0x20, 22,  8,  20,  21,  23,  22,  22, 176,/*mcs22*/
+    0x17, 0x20, 23,  6,  18,  22,  24,  23,  23, 196,/*mcs23*/
+    0x18, 0x22, 23,  6,  14,  23,  24,  24,  24, 217,/*mcs23+shortGI*/
+		};
+#else
+UCHAR RateSwitchTable11N3S[] = {
+/* Item No.	Mode	Curr-MCS	TrainUp	TrainDown	 Mode- Bit0: STBC, Bit1: Short GI, Bit4,5: Mode(0:CCK, 1:OFDM, 2:HT Mix, 3:HT GF)*/
+    0x11, 0x0c,  0,  0,  0,						/* Initial used item after association*/
+    0x00, 0x00,  0, 40, 101,
+    0x01, 0x00,  1, 40, 50,
+    0x02, 0x00,  2, 25, 45,
+    0x03, 0x21,  0, 20, 35,
+    0x04, 0x21,  1, 20, 35,
+    0x05, 0x21,  2, 20, 35,
+    0x06, 0x21,  3, 15, 35,
+    0x07, 0x21,  4, 15, 30,
+    0x08, 0x20, 11, 15, 30,
+    0x09, 0x20, 12, 15, 22,
+    0x0a, 0x20, 13,  8, 20,
+    0x0b, 0x20, 14,  8, 20,
+    0x0c, 0x20, 20,  8, 20,
+    0x0d, 0x20, 21,  8, 20,
+    0x0e, 0x20, 22,  8, 20,
+    0x0f, 0x20, 23,  8, 20,
+    0x10, 0x22, 23,  8, 15,
+};
+#endif /* NEW_RATE_ADAPT_SUPPORT */
+
+/* SYNC with Rory!! In order to solve the issue that the throughput drop dramatically at middle-long rage!! */
+/* 3x3 rate switch table for new rate adaption (replacement: for bad siganl environment (RSSI < -65))*/
+/* Target: Good sensibility*/
+
+UCHAR RateSwitchTable11N3SReplacement[] = {
+	/* item no.     mcs   highPERThrd  upMcs3   upMcs1     Mode- Bit0: STBC, Bit1: Short GI, Bit4,5: Mode(0:CCK, 1:OFDM, 2:HT Mix, 3:HT GF)*/
+	/*        mode    lowPERThrd  downMcs   upMcs2*/
+	0x19, 0x18,	 0,   0,    0,	 0,   0,   0,  0,   0,	/* Initial used item after association: the number of rate indexes, the initial mcs*/
+	0x00, 0x21,	 0,  30,  101,	 0,  16,   8,  1,   7,	/* MCS 0*/
+	0x01, 0x21,	 1,  20,   50,	 0,  16,   9,  2,  13,	/* MCS 1*/
+	0x02, 0x21,	 2,  20,   50,	 1,  17,   9,  3,  20,	/* MCS 2*/
+	0x03, 0x21,	 3,  15,   50,	 2,  17,  10,  4,  26,	/* MCS 3*/
+	0x04, 0x21,	 4,  15,   30,	 3,  18,  11,  5,  39,	/* MCS 4*/
+	0x05, 0x21,	 5,  10,   25,	 4,  18,  12,  6,  52,	/* MCS 5*/
+	0x06, 0x21,	 6,   8,   14,	 5,  19,  12,  7,  59,	/* MCS 6*/
+	0x07, 0x21,	 7,   8,   14,	 6,  19,  12,  7,  65,	/* MCS 7*/
+	0x08, 0x20,	 8,  30,   50,	 0,  16,   9,  8,  13,	/* MCS 8*/
+	0x09, 0x20,	 9,  20,   50,	 8,  17,  10,  9,  26,	/* MCS 9*/
+	0x0a, 0x20,	10,  20,   50,	 9,  18,  11, 10,  39,	/* MCS 10*/
+	0x0b, 0x20,	11,  15,   30,	10,  18,  12, 11,  52,	/* MCS 11*/
+	0x0c, 0x20,	12,  15,   30,	11,  20,  13, 12,  78,	/* MCS 12*/
+	0x0d, 0x20,	13,   8,   20,	12,  20,  14, 13, 104,	/* MCS 13*/
+	0x0e, 0x20,	14,   8,   18,	13,  21,  15, 14, 117,	/* MCS 14*/
+	0x0f, 0x20,	15,   8,   14,	14,  21,  15, 15, 130,	/* MCS 15*/
+	0x10, 0x20,	16,  30,   50,	 8,  17,  16, 16,  20,	/* MCS 16*/
+	0x11, 0x20,	17,  20,   50,	16,  18,  17, 17,  39,	/* MCS 17*/
+	0x12, 0x20,	18,  20,   50,	17,  19,  18, 18,  59,	/* MCS 18*/
+	0x13, 0x20,	19,  15,   30,	18,  20,  19, 19,  78,	/* MCS 19*/
+	0x14, 0x20,	20,  15,   30,	19,  21,  20, 20, 117,	/* MCS 20*/
+	0x15, 0x20,	21,   8,   20,	20,  22,  21, 21, 156,	/* MCS 21*/
+	0x16, 0x20,	22,   8,   20,	21,  23,  22, 22, 176,	/* MCS 22*/
+	0x17, 0x20,	23,   6,   18,	22,  24,  23, 23, 196,	/* MCS 23*/
+	0x18, 0x22,	23,   6,   14,	23,  24,  24, 24, 217,	/* MCS 23 + Short GI*/
+};
+
+UCHAR RateSwitchTable11N2SForABand[] = {
+/* Item No.   Mode   Curr-MCS   TrainUp   TrainDown		 Mode- Bit0: STBC, Bit1: Short GI, Bit4,5: Mode(0:CCK, 1:OFDM, 2:HT Mix, 3:HT GF)*/
+    0x0b, 0x09,  0,  0,  0,						/* Initial used item after association*/
+    0x00, 0x21,  0, 30, 101,
+    0x01, 0x21,  1, 20, 50,
+    0x02, 0x21,  2, 20, 50,
+    0x03, 0x21,  3, 15, 50,
+    0x04, 0x21,  4, 15, 30,
+    0x05, 0x21,  5, 15, 30,
+    0x06, 0x20, 12,  15, 30,
+    0x07, 0x20, 13,  8, 20,
+    0x08, 0x20, 14,  8, 20,
+    0x09, 0x20, 15,  8, 25,
+    0x0a, 0x22, 15,  8, 25,
+};
+
+UCHAR RateSwitchTable11N3SForABand[] = { /* 3*3*/
+/* Item No.   Mode   Curr-MCS   TrainUp   TrainDown		 Mode- Bit0: STBC, Bit1: Short GI, Bit4,5: Mode(0:CCK, 1:OFDM, 2:HT Mix, 3:HT GF)*/
+    0x0e, 0x09,  0,  0,  0,						/* Initial used item after association*/
+    0x00, 0x21,  0, 30, 101,
+    0x01, 0x21,  1, 20, 50,
+    0x02, 0x21,  2, 20, 50,
+    0x03, 0x21,  3, 15, 50,
+    0x04, 0x21,  4, 15, 30,
+    0x05, 0x21,  5, 15, 30,
+    0x06, 0x20, 12,  15, 30,
+    0x07, 0x20, 13,  8, 20,
+    0x08, 0x20, 14,  8, 20,
+    0x09, 0x20, 15,  8, 25,
+    /*0x0a, 0x22, 15,  8, 25,*/
+    /*0x0a, 0x20, 20, 15, 30,*/
+    0x0a, 0x20, 21,  8, 20,
+    0x0b, 0x20, 22,  8, 20,
+    0x0c, 0x20, 23,  8, 25,
+    0x0d, 0x22, 23,  8, 25,
+};
+
+UCHAR RateSwitchTable11BGN1S[] = {
+/* Item No.   Mode   Curr-MCS   TrainUp   TrainDown		 Mode- Bit0: STBC, Bit1: Short GI, Bit4,5: Mode(0:CCK, 1:OFDM, 2:HT Mix, 3:HT GF)*/
+    0x0c, 0x0a,  0,  0,  0,						/* Initial used item after association*/
+    0x00, 0x00,  0, 40, 101,
+    0x01, 0x00,  1, 40, 50,
+    0x02, 0x00,  2, 25, 45,
+    0x03, 0x21,  0, 20, 35,
+    0x04, 0x21,  1, 20, 35,
+    0x05, 0x21,  2, 20, 35,
+    0x06, 0x21,  3, 15, 35,
+    0x07, 0x21,  4, 15, 30,
+    0x08, 0x21,  5, 10, 25,
+    0x09, 0x21,  6,  8, 14,
+    0x0a, 0x21,  7,  8, 14,
+    0x0b, 0x23,  7,  8, 14,
+};
+
+
+UCHAR RateSwitchTable11BGN2S[] = {
+/* Item No.   Mode   Curr-MCS   TrainUp   TrainDown		 Mode- Bit0: STBC, Bit1: Short GI, Bit4,5: Mode(0:CCK, 1:OFDM, 2:HT Mix, 3:HT GF)*/
+    0x0e, 0x0c,  0,  0,  0,						/* Initial used item after association*/
+    0x00, 0x00,  0, 40, 101,
+    0x01, 0x00,  1, 40, 50,
+    0x02, 0x00,  2, 25, 45,
+    0x03, 0x21,  0, 20, 35,
+    0x04, 0x21,  1, 20, 35,
+    0x05, 0x21,  2, 20, 35,
+    0x06, 0x21,  3, 15, 35,
+    0x07, 0x21,  4, 15, 30,
+    0x08, 0x20, 11, 15, 30,
+    0x09, 0x20, 12, 15, 22,
+    0x0a, 0x20, 13,  8, 20,
+    0x0b, 0x20, 14,  8, 20,
+    0x0c, 0x20, 15,  8, 20,
+    0x0d, 0x22, 15,  8, 15,
+};
+
+
+UCHAR RateSwitchTable11BGN3S[] = { /* 3*3*/
+/* Item No.   Mode   Curr-MCS   TrainUp   TrainDown		 Mode- Bit0: STBC, Bit1: Short GI, Bit4,5: Mode(0:CCK, 1:OFDM, 2:HT Mix, 3:HT GF)*/
+    0x0e, 0x00,  0,  0,  0,						/* Initial used item after association*/
+    0x00, 0x21,  0, 30,101,	/*50*/
+    0x01, 0x21,  1, 20, 50,
+    0x02, 0x21,  2, 20, 50,
+    0x03, 0x21,  3, 20, 50,
+    0x04, 0x21,  4, 15, 50,
+    0x05, 0x20, 11, 15, 30,
+    0x06, 0x20, 12, 15, 30,
+    0x07, 0x20, 13,  8, 20,
+    0x08, 0x20, 14,  8, 20,
+    0x09, 0x20, 15,  8, 25,
+    /*0x0a, 0x20, 20, 15, 30,*/
+    0x0a, 0x20, 21,  8, 20,
+    0x0b, 0x20, 22,  8, 20,
+    0x0c, 0x20, 23,  8, 25,
+    0x0d, 0x22, 23,  8, 25,
+};
+
+
+UCHAR RateSwitchTable11BGN2SForABand[] = {
+/* Item No.   Mode   Curr-MCS   TrainUp   TrainDown		 Mode- Bit0: STBC, Bit1: Short GI, Bit4,5: Mode(0:CCK, 1:OFDM, 2:HT Mix, 3:HT GF)*/
+    0x0b, 0x09,  0,  0,  0,						/* Initial used item after association*/
+    0x00, 0x21,  0, 30,101,	/*50*/
+    0x01, 0x21,  1, 20, 50,
+    0x02, 0x21,  2, 20, 50,
+    0x03, 0x21,  3, 15, 50,
+    0x04, 0x21,  4, 15, 30,
+    0x05, 0x21,  5, 15, 30,
+    0x06, 0x20, 12, 15, 30,
+    0x07, 0x20, 13,  8, 20,
+    0x08, 0x20, 14,  8, 20,
+    0x09, 0x20, 15,  8, 25,
+    0x0a, 0x22, 15,  8, 25,
+};
+
+
+UCHAR RateSwitchTable11BGN3SForABand[] = { /* 3*3*/
+/* Item No.   Mode   Curr-MCS   TrainUp   TrainDown		 Mode- Bit0: STBC, Bit1: Short GI, Bit4,5: Mode(0:CCK, 1:OFDM, 2:HT Mix, 3:HT GF)*/
+    0x0e, 0x09,  0,  0,  0,						/* Initial used item after association*/
+    0x00, 0x21,  0, 30,101,	/*50*/
+    0x01, 0x21,  1, 20, 50,
+    0x02, 0x21,  2, 20, 50,
+    0x03, 0x21,  3, 15, 50,
+    0x04, 0x21,  4, 15, 30,
+    0x05, 0x21,  5, 15, 30,
+    0x06, 0x20, 12, 15, 30,
+    0x07, 0x20, 13,  8, 20,
+    0x08, 0x20, 14,  8, 20,
+    0x09, 0x20, 15,  8, 25,
+    /*0x0a, 0x22, 15,  8, 25,*/
+    /*0x0a, 0x20, 20, 15, 30,*/
+    0x0a, 0x20, 21,  8, 20,
+    0x0b, 0x20, 22,  8, 20,
+    0x0c, 0x20, 23,  8, 25,
+    0x0d, 0x22, 23,  8, 25,
+};
+
+
+#endif /* DOT11_N_SUPPORT */
+
+
+extern UCHAR	 OfdmRateToRxwiMCS[];
+/* since RT61 has better RX sensibility, we have to limit TX ACK rate not to exceed our normal data TX rate.*/
+/* otherwise the WLAN peer may not be able to receive the ACK thus downgrade its data TX rate*/
+ULONG BasicRateMask[12]				= {0xfffff001 /* 1-Mbps */, 0xfffff003 /* 2 Mbps */, 0xfffff007 /* 5.5 */, 0xfffff00f /* 11 */,
+									  0xfffff01f /* 6 */	 , 0xfffff03f /* 9 */	  , 0xfffff07f /* 12 */ , 0xfffff0ff /* 18 */,
+									  0xfffff1ff /* 24 */	 , 0xfffff3ff /* 36 */	  , 0xfffff7ff /* 48 */ , 0xffffffff /* 54 */};
+
+UCHAR BROADCAST_ADDR[MAC_ADDR_LEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+UCHAR ZERO_MAC_ADDR[MAC_ADDR_LEN]  = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+
+/* e.g. RssiSafeLevelForTxRate[RATE_36]" means if the current RSSI is greater than*/
+/*		this value, then it's quaranteed capable of operating in 36 mbps TX rate in*/
+/*		clean environment.*/
+/*								  TxRate: 1   2   5.5	11	 6	  9    12	18	 24   36   48	54	 72  100*/
+CHAR RssiSafeLevelForTxRate[] ={  -92, -91, -90, -87, -88, -86, -85, -83, -81, -78, -72, -71, -40, -40 };
+
+UCHAR  RateIdToMbps[]	 = { 1, 2, 5, 11, 6, 9, 12, 18, 24, 36, 48, 54, 72, 100};
+USHORT RateIdTo500Kbps[] = { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108, 144, 200};
+
+UCHAR  SsidIe	 = IE_SSID;
+UCHAR  SupRateIe = IE_SUPP_RATES;
+UCHAR  ExtRateIe = IE_EXT_SUPP_RATES;
+#ifdef DOT11_N_SUPPORT
+UCHAR  HtCapIe = IE_HT_CAP;
+UCHAR  AddHtInfoIe = IE_ADD_HT;
+UCHAR  NewExtChanIe = IE_SECONDARY_CH_OFFSET;
+UCHAR  BssCoexistIe = IE_2040_BSS_COEXIST;
+UCHAR  ExtHtCapIe = IE_EXT_CAPABILITY;
+#endif /* DOT11_N_SUPPORT */
+UCHAR  ExtCapIe = IE_EXT_CAPABILITY;
+UCHAR  ErpIe	 = IE_ERP;
+UCHAR  DsIe 	 = IE_DS_PARM;
+UCHAR  TimIe	 = IE_TIM;
+UCHAR  WpaIe	 = IE_WPA;
+UCHAR  Wpa2Ie	 = IE_WPA2;
+UCHAR  IbssIe	 = IE_IBSS_PARM;
+UCHAR  WapiIe	 = IE_WAPI;
+
+extern UCHAR	WPA_OUI[];
+
+UCHAR	SES_OUI[] = {0x00, 0x90, 0x4c};
+
+UCHAR	ZeroSsid[32] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
+
+
+#ifdef INF_AMAZON_SE	
+UINT16 MaxBulkOutsSizeLimit[5][4] =
+{
+	/* Priority high -> low*/
+	{ 24576, 2048, 2048, 2048 },	/* 0 AC	*/
+	{ 24576, 2048, 2048, 2048 },	/* 1 AC	 */
+	{ 24576, 2048, 2048, 2048 }, 	/* 2 ACs*/
+	{ 24576, 6144, 2048, 2048 }, 	/* 3 ACs*/
+	{ 24576, 6144, 4096, 2048 }		/* 4 ACs*/
+};
+
+VOID SoftwareFlowControl(
+	IN PRTMP_ADAPTER pAd) 
+{
+
+		BOOLEAN ResetBulkOutSize=FALSE;
+		UCHAR i=0,RunningQueueNo=0,QueIdx=0,HighWorkingAcCount=0;
+		UINT PacketsInQueueSize=0;
+		UCHAR Priority[]={1,0,2,3};
+		
+		for (i=0;i<NUM_OF_TX_RING;i++)
+		{
+
+			if (pAd->TxContext[i].CurWritePosition>=pAd->TxContext[i].NextBulkOutPosition)
+			{
+				PacketsInQueueSize=pAd->TxContext[i].CurWritePosition-pAd->TxContext[i].NextBulkOutPosition;
+			}
+			else 
+			{
+				PacketsInQueueSize=MAX_TXBULK_SIZE-pAd->TxContext[i].NextBulkOutPosition+pAd->TxContext[i].CurWritePosition;
+			}		
+
+			if (pAd->BulkOutDataSizeCount[i]>20480 || PacketsInQueueSize>6144)
+			{
+				RunningQueueNo++;
+				pAd->BulkOutDataFlag[i]=TRUE;
+			}
+			else
+				pAd->BulkOutDataFlag[i]=FALSE;
+
+			pAd->BulkOutDataSizeCount[i]=0;
+		}
+
+		if (RunningQueueNo>pAd->LastRunningQueueNo)
+		{
+			DBGPRINT(RT_DEBUG_INFO,("SoftwareFlowControl  reset %d > %d \n",RunningQueueNo,pAd->LastRunningQueueNo));
+			
+ResetBulkOutSize=TRUE;
+			 pAd->RunningQueueNoCount=0;
+			 pAd->LastRunningQueueNo=RunningQueueNo;
+		}
+		else if (RunningQueueNo==pAd->LastRunningQueueNo)
+		{
+pAd->RunningQueueNoCount=0;
+		}
+		else if (RunningQueueNo<pAd->LastRunningQueueNo)
+		{
+			DBGPRINT(RT_DEBUG_INFO,("SoftwareFlowControl  reset %d < %d \n",RunningQueueNo,pAd->LastRunningQueueNo));
+			pAd->RunningQueueNoCount++;
+			if (pAd->RunningQueueNoCount>=6)
+			{
+				ResetBulkOutSize=TRUE;
+				pAd->RunningQueueNoCount=0;
+				pAd->LastRunningQueueNo=RunningQueueNo;
+			}
+		}
+
+		if (ResetBulkOutSize==TRUE)
+		{
+			for (QueIdx=0;QueIdx<NUM_OF_TX_RING;QueIdx++)
+			{
+				HighWorkingAcCount=0;
+				for (i=0;i<NUM_OF_TX_RING;i++)
+				{
+					if (QueIdx==i)
+						continue;
+
+					if (pAd->BulkOutDataFlag[i]==TRUE && Priority[i]>Priority[QueIdx])
+							HighWorkingAcCount++;
+					
+				}
+				pAd->BulkOutDataSizeLimit[QueIdx]=MaxBulkOutsSizeLimit[RunningQueueNo][HighWorkingAcCount];
+			}
+
+				DBGPRINT(RT_DEBUG_TRACE, ("Reset bulkout size AC0(BE):%7d AC1(BK):%7d AC2(VI):%7d AC3(VO):%7d %d\n",pAd->BulkOutDataSizeLimit[0]
+				,pAd->BulkOutDataSizeLimit[1]
+				,pAd->BulkOutDataSizeLimit[2]
+				,pAd->BulkOutDataSizeLimit[3]
+				,RunningQueueNo));			
+		}
+
+}
+#endif /* INF_AMAZON_SE */
+
+/*
+	==========================================================================
+	Description:
+		initialize the MLME task and its data structure (queue, spinlock, 
+		timer, state machines).
+
+	IRQL = PASSIVE_LEVEL
+
+	Return:
+		always return NDIS_STATUS_SUCCESS
+
+	==========================================================================
+*/
+NDIS_STATUS MlmeInit(
+	IN PRTMP_ADAPTER pAd) 
+{
+	NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("--> MLME Initialize\n"));
+
+	do 
+	{
+		Status = MlmeQueueInit(pAd, &pAd->Mlme.Queue);
+		if(Status != NDIS_STATUS_SUCCESS) 
+			break;
+
+		pAd->Mlme.bRunning = FALSE;
+		NdisAllocateSpinLock(pAd, &pAd->Mlme.TaskLock);
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			BssTableInit(&pAd->ScanTab);
+
+			/* init STA state machines*/
+			AssocStateMachineInit(pAd, &pAd->Mlme.AssocMachine, pAd->Mlme.AssocFunc);
+			AuthStateMachineInit(pAd, &pAd->Mlme.AuthMachine, pAd->Mlme.AuthFunc);
+			AuthRspStateMachineInit(pAd, &pAd->Mlme.AuthRspMachine, pAd->Mlme.AuthRspFunc);
+			SyncStateMachineInit(pAd, &pAd->Mlme.SyncMachine, pAd->Mlme.SyncFunc);
+
+#ifdef QOS_DLS_SUPPORT
+			DlsStateMachineInit(pAd, &pAd->Mlme.DlsMachine, pAd->Mlme.DlsFunc);
+#endif /* QOS_DLS_SUPPORT */
+
+
+
+
+			/* Since we are using switch/case to implement it, the init is different from the above */
+			/* state machine init*/
+			MlmeCntlInit(pAd, &pAd->Mlme.CntlMachine, NULL);
+
+#ifdef PCIE_PS_SUPPORT
+			if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_ADVANCE_POWER_SAVE_PCIE_DEVICE))
+			{
+			    /* only PCIe cards need these two timers*/
+				RTMPInitTimer(pAd, &pAd->Mlme.PsPollTimer, GET_TIMER_FUNCTION(PsPollWakeExec), pAd, FALSE);
+				RTMPInitTimer(pAd, &pAd->Mlme.RadioOnOffTimer, GET_TIMER_FUNCTION(RadioOnExec), pAd, FALSE);
+			}
+#endif /* PCIE_PS_SUPPORT */
+
+			RTMPInitTimer(pAd, &pAd->Mlme.LinkDownTimer, GET_TIMER_FUNCTION(LinkDownExec), pAd, FALSE);
+			RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
+			pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
+			RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
+
+#ifdef RTMP_MAC_USB
+			RTMPInitTimer(pAd, &pAd->Mlme.AutoWakeupTimer, GET_TIMER_FUNCTION(RtmpUsbStaAsicForceWakeupTimeout), pAd, FALSE);
+			pAd->Mlme.AutoWakeupTimerRunning = FALSE;
+#endif /* RTMP_MAC_USB */
+
+
+		}
+#endif /* CONFIG_STA_SUPPORT */
+		
+
+
+		WpaStateMachineInit(pAd, &pAd->Mlme.WpaMachine, pAd->Mlme.WpaFunc);
+
+
+		ActionStateMachineInit(pAd, &pAd->Mlme.ActMachine, pAd->Mlme.ActFunc);
+
+		/* Init mlme periodic timer*/
+		RTMPInitTimer(pAd, &pAd->Mlme.PeriodicTimer, GET_TIMER_FUNCTION(MlmePeriodicExec), pAd, TRUE);
+
+		/* Set mlme periodic timer*/
+		RTMPSetTimer(&pAd->Mlme.PeriodicTimer, MLME_TASK_EXEC_INTV);
+
+		/* software-based RX Antenna diversity*/
+		RTMPInitTimer(pAd, &pAd->Mlme.RxAntEvalTimer, GET_TIMER_FUNCTION(AsicRxAntEvalTimeout), pAd, FALSE);
+
+
+
+	} while (FALSE);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<-- MLME Initialize\n"));
+
+	return Status;
+}
+#ifdef RTMP_TEMPERATURE_COMPENSATION
+VOID InitLookupTable(
+	IN PRTMP_ADAPTER pAd)
+{
+	int Idx, IdxTmp;
+	int i;
+
+	const int Offset = 7;
+
+	EEPROM_WORD_STRUC WordStruct = {{0}};
+	UCHAR PlusStepNum[8] = {0, 1, 3, 2, 3, 3, 3, 2};
+	UCHAR MinusStepNum[8] = {1, 1, 1, 1, 1, 1, 0, 1};
+	UCHAR Step = 10;
+	UCHAR TssiGain = 0;
+	UCHAR RFValue = 0, BbpValue = 0;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("==> InitLookupTable\n"));
+
+/* rt5392a */
+	
+	/* Read from EEPROM, as parameters for lookup table */
+	
+	RT28xx_EEPROM_READ16(pAd, 0x6e, WordStruct.word);
+	DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] EEPROM 6e = %x\n", WordStruct.word));
+	PlusStepNum[0] = (WordStruct.field.Byte0 & 0x0F);
+	PlusStepNum[1] = (((WordStruct.field.Byte0 & 0xF0) >> 4) & 0x0F);
+	PlusStepNum[2] = (WordStruct.field.Byte1 & 0x0F);
+	PlusStepNum[3] = (((WordStruct.field.Byte1 & 0xF0) >> 4) & 0x0F);
+
+	RT28xx_EEPROM_READ16(pAd, 0x70, WordStruct.word);
+	DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] EEPROM 70 = %x\n", WordStruct.word));
+	PlusStepNum[4] = (WordStruct.field.Byte0 & 0x0F);
+	PlusStepNum[5] = (((WordStruct.field.Byte0 & 0xF0) >> 4) & 0x0F);
+	PlusStepNum[6] = (WordStruct.field.Byte1 & 0x0F);
+	PlusStepNum[7] = (((WordStruct.field.Byte1 & 0xF0) >> 4) & 0x0F);
+
+	RT28xx_EEPROM_READ16(pAd, 0x72, WordStruct.word);
+	DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] EEPROM 72 = %x\n", WordStruct.word));
+	MinusStepNum[0] = (WordStruct.field.Byte0 & 0x0F);
+	MinusStepNum[1] = (((WordStruct.field.Byte0 & 0xF0) >> 4) & 0x0F);
+	MinusStepNum[2] = (WordStruct.field.Byte1 & 0x0F);
+	MinusStepNum[3] = (((WordStruct.field.Byte1 & 0xF0) >> 4) & 0x0F);
+
+	RT28xx_EEPROM_READ16(pAd, 0x74, WordStruct.word);
+	DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] EEPROM 74 = %x\n", WordStruct.word));
+	MinusStepNum[4] = (WordStruct.field.Byte0 & 0x0F);
+	MinusStepNum[5] = (((WordStruct.field.Byte0 & 0xF0) >> 4) & 0x0F);
+	MinusStepNum[6] = (WordStruct.field.Byte1 & 0x0F);
+	MinusStepNum[7] = (((WordStruct.field.Byte1 & 0xF0) >> 4) & 0x0F);
+
+	RT28xx_EEPROM_READ16(pAd, 0x76, WordStruct.word);
+	DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] EEPROM 76 = %x\n", WordStruct.word));
+	TssiGain = (WordStruct.field.Byte0 & 0x0F);
+	Step = (WordStruct.field.Byte0 >> 4);
+	pAd->TxPowerCtrl.RefTempG = (CHAR)WordStruct.field.Byte1;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] Plus = %u %u %u %u %u %u %u %u\n",
+		PlusStepNum[0],
+		PlusStepNum[1],
+		PlusStepNum[2],
+		PlusStepNum[3],
+		PlusStepNum[4],
+		PlusStepNum[5],
+		PlusStepNum[6],
+		PlusStepNum[7]
+		));
+	DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] Minus = %u %u %u %u %u %u %u %u\n",
+		MinusStepNum[0],
+		MinusStepNum[1],
+		MinusStepNum[2],
+		MinusStepNum[3],
+		MinusStepNum[4],
+		MinusStepNum[5],
+		MinusStepNum[6],
+		MinusStepNum[7]
+		));
+	DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] tssi gain/step = %u\n", TssiGain));
+	DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] Step = %u\n", Step));
+	DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] RefTempG = %d\n", pAd->TxPowerCtrl.RefTempG));
+
+	/* positive */
+	i = 0;
+	IdxTmp = 1;
+
+	pAd->TxPowerCtrl.LookupTable[1 + Offset] = Step / 2;
+	pAd->TxPowerCtrl.LookupTable[0 + Offset] = pAd->TxPowerCtrl.LookupTable[1 + Offset] - Step;
+	for (Idx = 2; Idx < 26;)/* Idx++ )*/
+	{
+		if (PlusStepNum[i] != 0 || i >= 8)
+		{
+			if (Idx >= IdxTmp + PlusStepNum[i] && i < 8)
+			{
+				pAd->TxPowerCtrl.LookupTable[Idx + Offset] = pAd->TxPowerCtrl.LookupTable[Idx - 1 + Offset] + (Step - (i+1) + 1);
+				IdxTmp = IdxTmp + PlusStepNum[i];
+				i += 1;
+			}
+			else
+			{
+				pAd->TxPowerCtrl.LookupTable[Idx + Offset] = pAd->TxPowerCtrl.LookupTable[Idx - 1 + Offset] + (Step - (i+1) + 1);
+			}
+			Idx++;
+		}
+		else
+		{
+			i += 1;
+		}
+	}
+
+	/* negative */
+	i = 0;
+	IdxTmp = 1;
+	for (Idx = 1; Idx < 8;)/* Idx++ )*/
+	{
+		if (MinusStepNum[i] != 0 || i >= 8)
+		{
+			if ((Idx + 1) >= IdxTmp + MinusStepNum[i] && i < 8)
+			{
+				pAd->TxPowerCtrl.LookupTable[-Idx + Offset] = pAd->TxPowerCtrl.LookupTable[-Idx + 1 + Offset] - (Step + (i+1) - 1);
+				IdxTmp = IdxTmp + MinusStepNum[i];
+				i += 1;
+			}
+			else
+			{
+				pAd->TxPowerCtrl.LookupTable[-Idx + Offset] = pAd->TxPowerCtrl.LookupTable[-Idx + 1 + Offset] - (Step + (i+1) - 1);
+			}
+			Idx++;
+		}
+		else
+		{
+			i += 1;
+		}
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] Lookup table as below:\n"));
+	for (Idx = 0; Idx < 33; Idx++)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] %d, %d\n", Idx - Offset, pAd->TxPowerCtrl.LookupTable[Idx]));
+	}
+
+	
+	/* Set BBP_R47 */
+	
+	RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BbpValue);
+
+	/* bit3 = 0 */
+	BbpValue = (BbpValue & 0xf7);
+
+	if (pAd->CommonCfg.TempComp == 1)
+	{
+		/* bit7, bit4 = 1 */
+		BbpValue = (BbpValue | 0x90);
+	}
+	else if (pAd->CommonCfg.TempComp == 2)
+	{
+		/* bit7 = 1, bit4 = 0 */
+		BbpValue = (BbpValue | 0x80);
+	}
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R47, BbpValue);
+
+	
+	/*  Set RF_R27 */
+	
+	RT30xxReadRFRegister(pAd, RF_R27, &RFValue);
+
+	/* Set [3:0] to TssiGain */
+	RFValue = (RFValue & 0xf0);
+	RFValue = (RFValue | TssiGain);
+
+	/* Set [7:6] to 01. For method 2, it is set at initialization. */
+	if (pAd->CommonCfg.TempComp == 2)
+	{
+		RFValue = (RFValue & 0x7f);
+		RFValue = (RFValue | 0x40);
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("[temp. compensation] Set RF_R27 to 0x%x\n", RFValue));
+	RT30xxWriteRFRegister(pAd, RF_R27, RFValue);
+}
+#endif /* RTMP_TEMPERATURE_COMPENSATION */
+/*
+	==========================================================================
+	Description:
+		main loop of the MLME
+	Pre:
+		Mlme has to be initialized, and there are something inside the queue
+	Note:
+		This function is invoked from MPSetInformation and MPReceive;
+		This task guarantee only one MlmeHandler will run. 
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+ */
+VOID MlmeHandler(
+	IN PRTMP_ADAPTER pAd) 
+{
+	MLME_QUEUE_ELEM 	   *Elem = NULL;
+#ifdef APCLI_SUPPORT
+	SHORT apcliIfIndex;
+#endif /* APCLI_SUPPORT */
+
+	/* Only accept MLME and Frame from peer side, no other (control/data) frame should*/
+	/* get into this state machine*/
+
+	NdisAcquireSpinLock(&pAd->Mlme.TaskLock);
+	if(pAd->Mlme.bRunning) 
+	{
+		NdisReleaseSpinLock(&pAd->Mlme.TaskLock);
+		return;
+	} 
+	else 
+	{
+		pAd->Mlme.bRunning = TRUE;
+	}
+	NdisReleaseSpinLock(&pAd->Mlme.TaskLock);
+
+	while (!MlmeQueueEmpty(&pAd->Mlme.Queue)) 
+	{
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_MLME_RESET_IN_PROGRESS) ||
+			RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS) ||
+			RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("Device Halted or Removed or MlmeRest, exit MlmeHandler! (queue num = %ld)\n", pAd->Mlme.Queue.Num));
+			break;
+		}
+		
+#ifdef RALINK_ATE			
+		if(ATE_ON(pAd))
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("The driver is in ATE mode now in MlmeHandler\n"));
+			break;
+		}	
+#endif /* RALINK_ATE */
+
+		/*From message type, determine which state machine I should drive*/
+		if (MlmeDequeue(&pAd->Mlme.Queue, &Elem)) 
+		{
+#ifdef RTMP_MAC_USB
+			if (Elem->MsgType == MT2_RESET_CONF)
+			{
+				DBGPRINT_RAW(RT_DEBUG_TRACE, ("!!! reset MLME state machine !!!\n"));
+				MlmeRestartStateMachine(pAd);
+				Elem->Occupied = FALSE;
+				Elem->MsgLen = 0;
+				continue;
+			}
+#endif /* RTMP_MAC_USB */
+
+			/* if dequeue success*/
+			switch (Elem->Machine) 
+			{
+				/* STA state machines*/
+#ifdef CONFIG_STA_SUPPORT
+				case ASSOC_STATE_MACHINE:
+					StateMachinePerformAction(pAd, &pAd->Mlme.AssocMachine,
+										Elem, pAd->Mlme.AssocMachine.CurrState);
+					break;
+
+				case AUTH_STATE_MACHINE:
+					StateMachinePerformAction(pAd, &pAd->Mlme.AuthMachine,
+										Elem, pAd->Mlme.AuthMachine.CurrState);
+					break;
+
+				case AUTH_RSP_STATE_MACHINE:
+					StateMachinePerformAction(pAd, &pAd->Mlme.AuthRspMachine,
+										Elem, pAd->Mlme.AuthRspMachine.CurrState);
+					break;
+
+				case SYNC_STATE_MACHINE:
+					StateMachinePerformAction(pAd, &pAd->Mlme.SyncMachine,
+										Elem, pAd->Mlme.SyncMachine.CurrState);
+					break;
+
+				case MLME_CNTL_STATE_MACHINE:
+					MlmeCntlMachinePerformAction(pAd, &pAd->Mlme.CntlMachine, Elem);
+					break;
+
+				case WPA_PSK_STATE_MACHINE:
+					StateMachinePerformAction(pAd, &pAd->Mlme.WpaPskMachine,
+										Elem, pAd->Mlme.WpaPskMachine.CurrState);
+					break;	
+
+#ifdef QOS_DLS_SUPPORT
+				case DLS_STATE_MACHINE:
+					StateMachinePerformAction(pAd, &pAd->Mlme.DlsMachine,
+										Elem, pAd->Mlme.DlsMachine.CurrState);
+					break;
+#endif /* QOS_DLS_SUPPORT */
+
+
+
+
+#endif /* CONFIG_STA_SUPPORT */						
+
+				case ACTION_STATE_MACHINE:
+					StateMachinePerformAction(pAd, &pAd->Mlme.ActMachine,
+										Elem, pAd->Mlme.ActMachine.CurrState);
+					break;	
+
+				case WPA_STATE_MACHINE:
+					StateMachinePerformAction(pAd, &pAd->Mlme.WpaMachine, Elem, pAd->Mlme.WpaMachine.CurrState);
+					break;
+
+
+				default:
+					DBGPRINT(RT_DEBUG_TRACE, ("ERROR: Illegal machine %ld in MlmeHandler()\n", Elem->Machine));
+					break;
+			} /* end of switch*/
+
+			/* free MLME element*/
+			Elem->Occupied = FALSE;
+			Elem->MsgLen = 0;
+
+		}
+		else {
+			DBGPRINT_ERR(("MlmeHandler: MlmeQueue empty\n"));
+		}
+	}
+
+	NdisAcquireSpinLock(&pAd->Mlme.TaskLock);
+	pAd->Mlme.bRunning = FALSE;
+	NdisReleaseSpinLock(&pAd->Mlme.TaskLock);
+}
+
+/*
+	==========================================================================
+	Description:
+		Destructor of MLME (Destroy queue, state machine, spin lock and timer)
+	Parameters:
+		Adapter - NIC Adapter pointer
+	Post:
+		The MLME task will no longer work properly
+
+	IRQL = PASSIVE_LEVEL
+
+	==========================================================================
+ */
+VOID MlmeHalt(
+	IN PRTMP_ADAPTER pAd) 
+{
+	BOOLEAN 	  Cancelled;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("==> MlmeHalt\n"));
+
+	if (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))
+	{
+		/* disable BEACON generation and other BEACON related hardware timers*/
+		AsicDisableSync(pAd);
+	}
+
+	RTMPCancelTimer(&pAd->Mlme.PeriodicTimer,		&Cancelled);
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+#ifdef QOS_DLS_SUPPORT
+		UCHAR		i;
+#endif /* QOS_DLS_SUPPORT */
+		/* Cancel pending timers*/
+		RTMPCancelTimer(&pAd->MlmeAux.AssocTimer,		&Cancelled);
+		RTMPCancelTimer(&pAd->MlmeAux.ReassocTimer,		&Cancelled);
+		RTMPCancelTimer(&pAd->MlmeAux.DisassocTimer,	&Cancelled);
+		RTMPCancelTimer(&pAd->MlmeAux.AuthTimer,		&Cancelled);
+		RTMPCancelTimer(&pAd->MlmeAux.BeaconTimer,		&Cancelled);
+		RTMPCancelTimer(&pAd->MlmeAux.ScanTimer,		&Cancelled);
+
+
+#ifdef PCIE_PS_SUPPORT
+	    if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_ADVANCE_POWER_SAVE_PCIE_DEVICE)
+			&&(pAd->StaCfg.PSControl.field.EnableNewPS == TRUE))
+	    {
+	   	    RTMPCancelTimer(&pAd->Mlme.PsPollTimer,		&Cancelled);
+		    RTMPCancelTimer(&pAd->Mlme.RadioOnOffTimer,		&Cancelled);
+		}
+#endif /* PCIE_PS_SUPPORT */
+
+#ifdef QOS_DLS_SUPPORT
+		for (i=0; i<MAX_NUM_OF_DLS_ENTRY; i++)
+		{
+			RTMPCancelTimer(&pAd->StaCfg.DLSEntry[i].Timer, &Cancelled);
+		}
+#endif /* QOS_DLS_SUPPORT */
+		RTMPCancelTimer(&pAd->Mlme.LinkDownTimer,		&Cancelled);
+
+#ifdef RTMP_MAC_USB
+		if (pAd->Mlme.AutoWakeupTimerRunning)
+		{
+			RTMPCancelTimer(&pAd->Mlme.AutoWakeupTimer, &Cancelled);
+			pAd->Mlme.AutoWakeupTimerRunning = FALSE;
+		}
+#endif /* RTMP_MAC_USB */
+
+
+
+		if (pAd->StaCfg.StaQuickResponeForRateUpTimerRunning)
+		{
+			RTMPCancelTimer(&pAd->StaCfg.StaQuickResponeForRateUpTimer, &Cancelled);
+			pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
+		}
+		RTMPCancelTimer(&pAd->StaCfg.WpaDisassocAndBlockAssocTimer, &Cancelled);
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	RTMPCancelTimer(&pAd->Mlme.RxAntEvalTimer,		&Cancelled);
+
+
+
+
+
+	if (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))
+	{
+		RTMP_CHIP_OP *pChipOps = &pAd->chipOps;
+		
+#ifdef LED_CONTROL_SUPPORT		
+		/* Set LED*/
+		RTMPSetLED(pAd, LED_HALT);
+		RTMPSetSignalLED(pAd, -100);	/* Force signal strength Led to be turned off, firmware is not done it.*/
+#ifdef RTMP_MAC_USB
+		{
+			LED_CFG_STRUC LedCfg;
+			RTMP_IO_READ32(pAd, LED_CFG, &LedCfg.word);
+			LedCfg.field.LedPolar = 0;
+			LedCfg.field.RLedMode = 0;
+			LedCfg.field.GLedMode = 0;
+			LedCfg.field.YLedMode = 0;
+			RTMP_IO_WRITE32(pAd, LED_CFG, LedCfg.word);
+		}
+#endif /* RTMP_MAC_USB */
+#endif /* LED_CONTROL_SUPPORT */
+
+		if (pChipOps->AsicHaltAction)
+			pChipOps->AsicHaltAction(pAd);
+	}
+
+	RTMPusecDelay(5000);    /*  5 msec to gurantee Ant Diversity timer canceled*/
+
+	MlmeQueueDestroy(&pAd->Mlme.Queue);
+	NdisFreeSpinLock(&pAd->Mlme.TaskLock);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<== MlmeHalt\n"));
+}
+
+VOID MlmeResetRalinkCounters(
+	IN  PRTMP_ADAPTER   pAd)
+{
+	pAd->RalinkCounters.LastOneSecRxOkDataCnt = pAd->RalinkCounters.OneSecRxOkDataCnt;
+
+#ifdef RALINK_ATE
+	if (!ATE_ON(pAd))
+#endif /* RALINK_ATE */
+		/* for performace enchanement */
+		NdisZeroMemory(&pAd->RalinkCounters,
+						(UINT32)&pAd->RalinkCounters.OneSecEnd -
+						(UINT32)&pAd->RalinkCounters.OneSecStart);
+
+	return;
+}
+
+
+/*
+	==========================================================================
+	Description:
+		This routine is executed periodically to -
+		1. Decide if it's a right time to turn on PwrMgmt bit of all 
+		   outgoiing frames
+		2. Calculate ChannelQuality based on statistics of the last
+		   period, so that TX rate won't toggling very frequently between a 
+		   successful TX and a failed TX.
+		3. If the calculated ChannelQuality indicated current connection not 
+		   healthy, then a ROAMing attempt is tried here.
+
+	IRQL = DISPATCH_LEVEL
+
+	==========================================================================
+ */
+#define ADHOC_BEACON_LOST_TIME		(8*OS_HZ)  /* 8 sec*/
+VOID MlmePeriodicExec(
+	IN PVOID SystemSpecific1, 
+	IN PVOID FunctionContext, 
+	IN PVOID SystemSpecific2, 
+	IN PVOID SystemSpecific3) 
+{
+	ULONG			TxTotalCnt;
+	PRTMP_ADAPTER	pAd = (RTMP_ADAPTER *)FunctionContext;
+#ifdef ANT_DIVERSITY_SUPPORT
+	SHORT	realavgrssi;
+#endif /* ANT_DIVERSITY_SUPPORT */
+
+	/* No More 0x84 MCU CMD from v.30 FW*/
+
+#ifdef INF_AMAZON_SE
+	SoftwareFlowControl(pAd);
+#endif /* INF_AMAZON_SE */
+
+#ifdef CONFIG_STA_SUPPORT
+
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		RTMP_MLME_PRE_SANITY_CHECK(pAd);
+	}
+
+#ifdef RTMP_MAC_USB
+	/* Only when count down to zero, can we go to sleep mode.*/
+	/* Count down counter is set after link up. So within 10 seconds after link up, we never go to sleep.*/
+	/* 10 seconds period, we can get IP, finish 802.1x authenticaion. and some critical , timing protocol.*/
+	if (pAd->CountDowntoPsm > 0)
+	{
+		pAd->CountDowntoPsm--;
+	}
+
+#endif /* RTMP_MAC_USB */
+
+#endif /* CONFIG_STA_SUPPORT */
+
+	/* Do nothing if the driver is starting halt state.*/
+	/* This might happen when timer already been fired before cancel timer with mlmehalt*/
+	if ((RTMP_TEST_FLAG(pAd, (fRTMP_ADAPTER_HALT_IN_PROGRESS |
+								fRTMP_ADAPTER_RADIO_OFF |
+								fRTMP_ADAPTER_RADIO_MEASUREMENT |
+								fRTMP_ADAPTER_RESET_IN_PROGRESS |
+								fRTMP_ADAPTER_NIC_NOT_EXIST))))
+		return;
+
+#ifdef RALINK_ATE
+	/* Do not show RSSI until "Normal 1 second Mlme PeriodicExec". */
+	if (ATE_ON(pAd))
+	{
+		if (pAd->Mlme.PeriodicRound % MLME_TASK_EXEC_MULTIPLE != (MLME_TASK_EXEC_MULTIPLE - 1))
+	{
+			pAd->Mlme.PeriodicRound ++;
+			return;
+		}
+	}
+#endif /* RALINK_ATE */
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		/* Do nothing if monitor mode is on*/
+		if (MONITOR_ON(pAd))
+			return;
+
+		if (pAd->Mlme.PeriodicRound & 0x1)
+		{
+			/* This is the fix for wifi 11n extension channel overlapping test case.  for 2860D*/
+			if (((pAd->MACVersion & 0xffff) == 0x0101) && 
+				(STA_TGN_WIFI_ON(pAd)) &&
+				(pAd->CommonCfg.IOTestParm.bToggle == FALSE))
+
+				{
+					RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x24Bf);
+					pAd->CommonCfg.IOTestParm.bToggle = TRUE;
+				}
+				else if ((STA_TGN_WIFI_ON(pAd)) &&
+						((pAd->MACVersion & 0xffff) == 0x0101))
+				{
+					RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x243f);
+					pAd->CommonCfg.IOTestParm.bToggle = FALSE;
+				}
+		}
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	pAd->bUpdateBcnCntDone = FALSE;
+	
+/*	RECBATimerTimeout(SystemSpecific1,FunctionContext,SystemSpecific2,SystemSpecific3);*/
+	pAd->Mlme.PeriodicRound ++;
+	pAd->Mlme.GPIORound++;
+
+#ifdef RTMP_MAC_USB
+	/* execute every 100ms, update the Tx FIFO Cnt for update Tx Rate.*/
+	NICUpdateFifoStaCounters(pAd);
+#endif /* RTMP_MAC_USB */
+
+	/* execute every 500ms */
+	if ((pAd->Mlme.PeriodicRound % 5 == 0) && RTMPAutoRateSwitchCheck(pAd)/*(OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED))*/)
+	{
+#ifdef CONFIG_STA_SUPPORT
+		/* perform dynamic tx rate switching based on past TX history*/
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			if ((OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED)
+					)
+				&& (!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE)))
+				MlmeDynamicTxRateSwitching(pAd);
+		}
+#endif /* CONFIG_STA_SUPPORT */
+	}
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef RTMP_FREQ_CALIBRATION_SUPPORT
+/*	if (IS_RT3593(pAd))*/
+/*	{*/
+		if ((pAd->FreqCalibrationCtrl.bEnableFrequencyCalibration == TRUE) && 
+		     (INFRA_ON(pAd)))
+		{
+			RTMP_CHIP_ASIC_FREQ_CAL(pAd);
+		}
+/*	}*/
+#endif /* RTMP_FREQ_CALIBRATION_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+
+	/* Normal 1 second Mlme PeriodicExec.*/
+	if (pAd->Mlme.PeriodicRound %MLME_TASK_EXEC_MULTIPLE == 0)
+	{
+		pAd->Mlme.OneSecPeriodicRound ++;
+
+		RTMP_CHIP_ASIC_VCO_CAL(pAd);
+
+#ifdef RALINK_ATE
+    	if (ATE_ON(pAd))
+    	{
+			/* for performace enchanement */
+			NdisZeroMemory(&pAd->RalinkCounters,
+							(UINT32)&pAd->RalinkCounters.OneSecEnd -
+							(UINT32)&pAd->RalinkCounters.OneSecStart);
+
+			/* request from Baron : move this routine from later to here */
+			/* for showing Rx error count in ATE RXFRAME */
+            NICUpdateRawCounters(pAd);
+			if (pAd->ate.bRxFER == 1)
+			{
+				pAd->ate.RxTotalCnt += pAd->ate.RxCntPerSec;
+			    ate_print(KERN_EMERG "MlmePeriodicExec: Rx packet cnt = %d/%d\n", pAd->ate.RxCntPerSec, pAd->ate.RxTotalCnt);
+				pAd->ate.RxCntPerSec = 0;
+
+				if (pAd->ate.RxAntennaSel == 0)
+					ate_print(KERN_EMERG "MlmePeriodicExec: Rx AvgRssi0=%d, AvgRssi1=%d, AvgRssi2=%d\n\n",
+						pAd->ate.AvgRssi0, pAd->ate.AvgRssi1, pAd->ate.AvgRssi2);
+				else
+					ate_print(KERN_EMERG "MlmePeriodicExec: Rx AvgRssi=%d\n\n", pAd->ate.AvgRssi0);
+			}
+
+			MlmeResetRalinkCounters(pAd);
+
+			/* In QA Mode, QA will handle all registers. */
+			if (pAd->ate.bQAEnabled == TRUE)
+			{
+				return;
+			}
+
+			if (pAd->ate.bAutoTxAlc == TRUE)
+			{
+				ATEAsicAdjustTxPower(pAd);
+			}
+			
+#if (defined(RT3052) && !defined(RT3352)) || defined(RT3070)
+	/* request by Gary, if Rssi0 > -42, BBP 82 need to be changed from 0x62 to 0x42, , bbp 67 need to be changed from 0x20 to 0x18*/
+	if (!pAd->CommonCfg.HighPowerPatchDisabled)
+	{
+#ifdef RT3070
+		 if ((IS_RT3070(pAd) && ((pAd->MACVersion & 0xffff) < 0x0201)))
+#endif /* RT3070 */
+                {
+		   		if ((pAd->ate.AvgRssi0 != 0) && (pAd->ate.AvgRssi0 > (pAd->BbpRssiToDbmDelta - 35))) 
+                 		{ 
+                         		 RT30xxWriteRFRegister(pAd, RF_R27, 0x20); 
+                		 } 
+                 		else 
+                 		{ 
+                          		RT30xxWriteRFRegister(pAd, RF_R27, 0x23); 
+                 		}
+		 }
+
+#ifdef RT3052
+		if ((pAd->Antenna.field.RxPath == 2) && IS_RT3052(pAd))
+		{
+			if ((pAd->ate.AvgRssi0 != 0) && (pAd->ate.AvgRssi0 > (pAd->BbpRssiToDbmDelta - 42) ))
+			{
+				ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0x42);
+				ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R67, 0x18);
+			}
+			else
+			{
+				ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0x62);
+				ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R67, 0x20);
+			}
+		}
+#endif /* RT3052 */
+	}
+#endif /* RT305x */
+			return;
+    	}
+#endif /* RALINK_ATE */
+
+
+
+		/*ORIBATimerTimeout(pAd);*/
+		NdisGetSystemUpTime(&pAd->Mlme.Now32);
+
+		/* add the most up-to-date h/w raw counters into software variable, so that*/
+		/* the dynamic tuning mechanism below are based on most up-to-date information*/
+		/* Hint: throughput impact is very serious in the function */
+		NICUpdateRawCounters(pAd);																										
+
+#ifdef RTMP_MAC_USB
+#ifndef INF_AMAZON_SE
+		RTUSBWatchDog(pAd);
+#endif /* INF_AMAZON_SE */
+#endif /* RTMP_MAC_USB */
+
+#ifdef DOT11_N_SUPPORT
+   		/* Need statistics after read counter. So put after NICUpdateRawCounters*/
+		ORIBATimerTimeout(pAd);
+#endif /* DOT11_N_SUPPORT */
+
+		/* if MGMT RING is full more than twice within 1 second, we consider there's*/
+		/* a hardware problem stucking the TX path. In this case, try a hardware reset*/
+		/* to recover the system*/
+	/*	if (pAd->RalinkCounters.MgmtRingFullCount >= 2)*/
+	/*		RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_HARDWARE_ERROR);*/
+	/*	else*/
+	/*		pAd->RalinkCounters.MgmtRingFullCount = 0;*/
+
+		/* The time period for checking antenna is according to traffic*/
+#ifdef ANT_DIVERSITY_SUPPORT
+		if (((pAd->NicConfig2.field.AntDiversity) 
+#if TXRX_SW_ANTDIV_SUPPORT
+			|| (pAd->chipCap.bTxRxSwAntDiv)	
+#endif
+			) && (pAd->CommonCfg.bRxAntDiversity == ANT_SW_DIVERSITY_ENABLE) && 
+			(!pAd->EepromAccess))
+			AsicAntennaSelect(pAd, pAd->MlmeAux.Channel);
+		else if(pAd->CommonCfg.bRxAntDiversity == ANT_FIX_ANT0 || pAd->CommonCfg.bRxAntDiversity == ANT_FIX_ANT1)
+		{
+#ifdef CONFIG_STA_SUPPORT
+			realavgrssi = (pAd->RxAnt.Pair1AvgRssi[pAd->RxAnt.Pair1PrimaryRxAnt] >> 3);
+#endif /* CONFIG_STA_SUPPORT */
+			DBGPRINT(RT_DEBUG_TRACE,("Ant-realrssi0(%d), Lastrssi0(%d), EvaluateStableCnt=%d\n", realavgrssi, pAd->RxAnt.Pair1LastAvgRssi, pAd->RxAnt.EvaluateStableCnt));
+		}
+		//else if (pAd->CommonCfg.bRxAntDiversity != ANT_HW_DIVERSITY_ENABLE)
+#endif /* ANT_DIVERSITY_SUPPORT */
+		{
+			if (pAd->Mlme.bEnableAutoAntennaCheck)
+			{
+				TxTotalCnt = pAd->RalinkCounters.OneSecTxNoRetryOkCount + 
+								 pAd->RalinkCounters.OneSecTxRetryOkCount + 
+								 pAd->RalinkCounters.OneSecTxFailCount;
+				
+				/* dynamic adjust antenna evaluation period according to the traffic*/
+				if (TxTotalCnt > 50)
+				{
+					if (pAd->Mlme.OneSecPeriodicRound % 10 == 0)
+					{
+						AsicEvaluateRxAnt(pAd);
+					}
+				}
+				else
+				{
+					if (pAd->Mlme.OneSecPeriodicRound % 3 == 0)
+					{
+						AsicEvaluateRxAnt(pAd);
+					}
+				}
+			}
+		}
+
+#ifdef VIDEO_TURBINE_SUPPORT
+		/*VideoTurbineUpdate(pAd);*/
+		/*VideoTurbineDynamicTune(pAd);*/
+#endif /* VIDEO_TURBINE_SUPPORT */
+
+#ifdef VCORECAL_SUPPORT
+#ifdef RALINK_ATE
+                if (!ATE_ON(pAd))
+#endif
+                {
+					if (pAd->chipCap.FlgIsVcoReCalSup == TRUE)
+					{
+                        if (pAd->RefreshTssi == 1)
+                        {
+                                UCHAR BbpR49 = 0;
+
+                                RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R49, &BbpR49);
+                                /* Update only when BBP_R49 bit 0 is set to 1 */
+                                if ((BbpR49 & 0x01) != 0)
+                                {
+                                        pAd->LatchTssi = BbpR49 >> 1; /* bit 0 is used for update flag*/
+                                        pAd->RefreshTssi = 0;
+                                }
+                        }
+
+                        if (((pAd->Mlme.OneSecPeriodicRound % 10) == 0) && (pAd->RefreshTssi == 0))
+                                AsicVCORecalibration(pAd);
+					}
+                }
+#endif /* VCORECAL_SUPPORT */
+
+#ifdef SPECIFIC_VCORECAL_SUPPORT
+		if (((pAd->Mlme.OneSecPeriodicRound % 10) == 0) 
+		&& (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS)))
+		{
+#ifdef RTMP_RF_RW_SUPPORT
+			UCHAR 	RFValue;
+			UCHAR RFIndex=RF_R07;
+			/*Enable RF tuning*/
+			/*Enable RF tuning*/
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+			if (IS_RT5390(pAd))
+				RFIndex = RF_R03/*RF_R06*/;
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+			RT30xxReadRFRegister(pAd, RFIndex, (PUCHAR)&RFValue);
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+			if (IS_RT5390(pAd))
+				RFValue = RFValue | 0x80/*0x20*/;
+			else
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+			RFValue = RFValue | 0x1;
+
+			RT30xxWriteRFRegister(pAd, RFIndex, (UCHAR)RFValue);
+
+#endif /* RTMP_RF_RW_SUPPORT */
+		}
+#endif /* SPECIFIC_VCORECAL_SUPPORT */
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+			STAMlmePeriodicExec(pAd);
+#endif /* CONFIG_STA_SUPPORT */
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+		if (IS_RT5392(pAd) && ((pAd->MACVersion & 0x0000FFFF) < 0x0223))
+		{	
+			AsicCheckForHwRecovery(pAd);
+		}
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+
+
+
+		MlmeResetRalinkCounters(pAd);
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+#ifdef RTMP_MAC_USB
+			if (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF))
+#endif /* RTMP_MAC_USB */
+			{
+
+
+			UINT32	MacReg = 0;
+			
+			RTMP_IO_READ32(pAd, 0x10F4, &MacReg);
+			if (((MacReg & 0x20000000) && (MacReg & 0x80)) || ((MacReg & 0x20000000) && (MacReg & 0x20)))
+			{
+				RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
+				RTMPusecDelay(1);
+				{
+				RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xC);
+				}
+
+				DBGPRINT(RT_DEBUG_WARN,("Warning, MAC specific condition occurs \n"));
+			}
+		}
+		}
+#endif /* CONFIG_STA_SUPPORT */
+
+		RTMP_MLME_HANDLER(pAd);
+	}
+
+
+
+
+	pAd->bUpdateBcnCntDone = FALSE;
+}
+
+
+/*
+	==========================================================================
+	Validate SSID for connection try and rescan purpose
+	Valid SSID will have visible chars only.
+	The valid length is from 0 to 32.
+	IRQL = DISPATCH_LEVEL
+	==========================================================================
+ */
+BOOLEAN MlmeValidateSSID(
+	IN PUCHAR	pSsid,
+	IN UCHAR	SsidLen)
+{
+	int	index;
+
+	if (SsidLen > MAX_LEN_OF_SSID)
+		return (FALSE);
+
+	/* Check each character value*/
+	for (index = 0; index < SsidLen; index++)
+	{
+		if (pSsid[index] < 0x20)
+			return (FALSE);
+	}
+
+	/* All checked*/
+	return (TRUE);
+}
+
+VOID MlmeSelectRateSwitchTable11N3SReplacement(
+		IN PUCHAR               *ppTable)
+{
+	*ppTable = RateSwitchTable11N3SReplacement;
+}
+
+VOID MlmeSelectTxRateTable(
+	IN PRTMP_ADAPTER		pAd,
+	IN PMAC_TABLE_ENTRY		pEntry,
+	IN PUCHAR				*ppTable,
+	IN PUCHAR				pTableSize,
+	IN PUCHAR				pInitTxRateIdx)
+{
+#ifdef NEW_RATE_ADAPT_SUPPORT
+	UCHAR tempUchar[] = {
+							0x0f, 0x20, 15,  8,   25,  14, 21, 16, 15, 130,/*mcs15*/
+							0x10, 0x22, 15,  8,   25,  15, 21, 16, 16, 144};/*mcs15+short gi*/
+	UCHAR tempUchar1[] = {
+							0x07, 0x21,  7,  8, 14,  6,  19,  12,  8, 65,/*mcs7*/
+							0x08, 0x23,  7,  8, 14,  7,  19,  12,  8, 72};/*mcs7+short gi  */
+#endif /* NEW_RATE_ADAPT_SUPPORT */
+
+	do
+	{
+		/* decide the rate table for tuning*/
+		if (pAd->CommonCfg.TxRateTableSize > 0)
+		{
+			*ppTable = RateSwitchTable;
+			*pTableSize = RateSwitchTable[0];
+			*pInitTxRateIdx = RateSwitchTable[1];
+
+			break;
+		}
+
+#ifdef CONFIG_STA_SUPPORT
+		if ((pAd->OpMode == OPMODE_STA) && ADHOC_ON(pAd))
+		{
+			/* for ADHOC mode */
+#ifdef DOT11_N_SUPPORT
+			if ((pAd->CommonCfg.PhyMode >= PHY_11ABGN_MIXED) && 
+				(pEntry->HTCapability.MCSSet[0] == 0xff) && 
+				((pEntry->HTCapability.MCSSet[1] == 0x00) || (pAd->Antenna.field.TxPath == 1)))
+			{/* 11N 1S Adhoc*/
+
+#ifdef AGS_SUPPORT
+				if (SUPPORT_AGS(pAd))
+				{
+					*ppTable = AGS1x1HTRateTable;
+					*pTableSize = AGS1x1HTRateTable[0];
+					*pInitTxRateIdx = AGS1x1HTRateTable[1];
+
+					DBGPRINT_RAW(RT_DEBUG_TRACE,("AGS: %s: 11N 1S adhoc, AGS1x1HTRateTable\n", 
+						__FUNCTION__));
+				}
+				else
+#endif /* AGS_SUPPORT */
+				{
+				*ppTable = RateSwitchTable11N1S;
+				*pTableSize = RateSwitchTable11N1S[0];
+				*pInitTxRateIdx = RateSwitchTable11N1S[1];
+				}
+				
+			}
+			else if ((pAd->CommonCfg.PhyMode >= PHY_11ABGN_MIXED) && 
+					(pEntry->HTCapability.MCSSet[0] == 0xff) && 
+					(pEntry->HTCapability.MCSSet[1] == 0xff) &&
+					(((pAd->Antenna.field.TxPath == 3) && (pEntry->HTCapability.MCSSet[2] == 0x00)) || (pAd->Antenna.field.TxPath == 2)))
+			{/* 11N 2S Adhoc*/
+
+#ifdef AGS_SUPPORT
+				if (SUPPORT_AGS(pAd))
+				{
+					*ppTable = AGS2x2HTRateTable;
+					*pTableSize = AGS2x2HTRateTable[0];
+					*pInitTxRateIdx = AGS2x2HTRateTable[1];
+
+					DBGPRINT_RAW(RT_DEBUG_TRACE,("AGS: %s: 11N 2S adhoc, AGS2x2HTRateTable\n", 
+						__FUNCTION__));
+				}
+				else
+#endif /* AGS_SUPPORT */
+				{
+				if (pAd->LatchRfRegs.Channel <= 14)
+				{
+					*ppTable = RateSwitchTable11N2S;
+					*pTableSize = RateSwitchTable11N2S[0];
+					*pInitTxRateIdx = RateSwitchTable11N2S[1];
+				}
+				else
+				{
+					*ppTable = RateSwitchTable11N2SForABand;
+					*pTableSize = RateSwitchTable11N2SForABand[0];
+					*pInitTxRateIdx = RateSwitchTable11N2SForABand[1];
+				}
+				
+			}
+			}
+#ifdef AGS_SUPPORT
+			else if (SUPPORT_AGS(pAd) && 
+					(pEntry->HTCapability.MCSSet[0] == 0xFF) && 
+					(pEntry->HTCapability.MCSSet[1] == 0xFF) && 
+					(pEntry->HTCapability.MCSSet[2] == 0xFF) && 
+					(pAd->Antenna.field.TxPath == 3))
+			{/* 11N 3S Adhoc*/
+				*ppTable = AGS3x3HTRateTable;
+				*pTableSize = AGS3x3HTRateTable[0];
+				*pInitTxRateIdx = AGS3x3HTRateTable[1];
+
+				DBGPRINT_RAW(RT_DEBUG_TRACE,("AGS: %s: 11N 3S adhoc, AGS3x3HTRateTable\n", 
+					__FUNCTION__));
+			}
+#endif /* AGS_SUPPORT */
+			else
+#endif /* DOT11_N_SUPPORT */				
+				if ((pEntry->RateLen == 4)
+#ifdef DOT11_N_SUPPORT
+					&& (pEntry->HTCapability.MCSSet[0] == 0) && (pEntry->HTCapability.MCSSet[1] == 0)
+#endif /* DOT11_N_SUPPORT */
+					)
+			{
+				*ppTable = RateSwitchTable11B;
+				*pTableSize = RateSwitchTable11B[0];
+				*pInitTxRateIdx = RateSwitchTable11B[1];
+				
+			}
+			else if (pAd->LatchRfRegs.Channel <= 14)
+			{
+				*ppTable = RateSwitchTable11BG;
+				*pTableSize = RateSwitchTable11BG[0];
+				*pInitTxRateIdx = RateSwitchTable11BG[1];
+				
+			}
+			else
+			{
+				*ppTable = RateSwitchTable11G;
+				*pTableSize = RateSwitchTable11G[0];
+				*pInitTxRateIdx = RateSwitchTable11G[1];
+				
+			}
+			break;
+		}
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef DOT11_N_SUPPORT
+		/*if ((pAd->StaActive.SupRateLen + pAd->StaActive.ExtRateLen == 12) && (pAd->StaActive.SupportedPhyInfo.MCSSet[0] == 0xff) &&*/
+		/*	((pAd->StaActive.SupportedPhyInfo.MCSSet[1] == 0x00) || (pAd->Antenna.field.TxPath == 1)))*/
+		if (((pEntry->RateLen == 12) || (pAd->OpMode == OPMODE_STA)) && (pEntry->HTCapability.MCSSet[0] == 0xff) &&
+			((pEntry->HTCapability.MCSSet[1] == 0x00) || (pAd->CommonCfg.TxStream == 1)))
+		{/* 11BGN 1S AP*/
+#ifdef AGS_SUPPORT
+			if (SUPPORT_AGS(pAd))
+			{
+				*ppTable = AGS1x1HTRateTable;
+				*pTableSize = AGS1x1HTRateTable[0];
+				*pInitTxRateIdx = AGS1x1HTRateTable[1];
+
+				DBGPRINT_RAW(RT_DEBUG_TRACE,("AGS: %s: 11N 1S AP, AGS1x1HTRateTable\n", 
+					__FUNCTION__));
+			}
+			else
+#endif /* AGS_SUPPORT */
+			{
+			*ppTable = RateSwitchTable11BGN1S;
+			*pTableSize = RateSwitchTable11BGN1S[0];
+			*pInitTxRateIdx = RateSwitchTable11BGN1S[1];
+			
+			}
+
+			break;
+		}
+
+#ifdef AGS_SUPPORT
+		/* only for station */
+		if (SUPPORT_AGS(pAd) && 
+			(pEntry->HTCapability.MCSSet[0] == 0xFF) && 
+			(pEntry->HTCapability.MCSSet[1] == 0xFF) && 
+			(pEntry->HTCapability.MCSSet[2] == 0xFF) && 
+			(pAd->CommonCfg.TxStream == 3))
+		{/* 11N 3S */
+			*ppTable = AGS3x3HTRateTable;
+			*pTableSize = AGS3x3HTRateTable[0];
+			*pInitTxRateIdx = AGS3x3HTRateTable[1];
+
+			DBGPRINT_RAW(RT_DEBUG_INFO,("AGS: %s: 11N 3S AP, AGS3x3HTRateTable\n", 
+				__FUNCTION__));
+			break;
+		}
+		else
+#endif /* AGS_SUPPORT */
+		/*else if ((pAd->StaActive.SupRateLen + pAd->StaActive.ExtRateLen == 12) && (pAd->StaActive.SupportedPhyInfo.MCSSet[0] == 0xff) &&*/
+		/*	(pAd->StaActive.SupportedPhyInfo.MCSSet[1] == 0xff) && (pAd->Antenna.field.TxPath == 2))*/
+		if (((pEntry->RateLen == 12) || (pAd->OpMode == OPMODE_STA)) && (pEntry->HTCapability.MCSSet[0] == 0xff) &&
+			(pEntry->HTCapability.MCSSet[1] == 0xff) && (((pAd->Antenna.field.TxPath == 3) && (pEntry->HTCapability.MCSSet[2] == 0x00)) || (pAd->CommonCfg.TxStream == 2)))
+		{/* 11BGN 2S AP*/
+#ifdef AGS_SUPPORT
+			if (SUPPORT_AGS(pAd))
+			{
+				*ppTable = AGS2x2HTRateTable;
+				*pTableSize = AGS2x2HTRateTable[0];
+				*pInitTxRateIdx = AGS2x2HTRateTable[1];
+
+				DBGPRINT_RAW(RT_DEBUG_TRACE,("AGS: %s: 11N 2S AP, AGS2x2HTRateTable\n", 
+					__FUNCTION__));
+			}
+			else
+#endif /* AGS_SUPPORT */
+			{
+			if (pAd->LatchRfRegs.Channel <= 14)
+			{
+				*ppTable = RateSwitchTable11BGN2S;
+				*pTableSize = RateSwitchTable11BGN2S[0];
+				*pInitTxRateIdx = RateSwitchTable11BGN2S[1];
+				
+			}
+			else
+			{
+				*ppTable = RateSwitchTable11BGN2SForABand;
+				*pTableSize = RateSwitchTable11BGN2SForABand[0];
+				*pInitTxRateIdx = RateSwitchTable11BGN2SForABand[1];
+                		
+			}
+			}
+			break;
+		}
+
+#ifdef DOT11N_SS3_SUPPORT
+		if ((pEntry->RateLen == 12) &&
+			(pEntry->HTCapability.MCSSet[0] == 0xff) &&
+			(pEntry->HTCapability.MCSSet[1] == 0xff) &&
+			(pEntry->HTCapability.MCSSet[2] == 0xff) &&
+			(pAd->CommonCfg.TxStream == 3))
+		{
+			*ppTable = RateSwitchTable11N3S;
+			*pTableSize = RateSwitchTable11N3S[0];
+			*pInitTxRateIdx = RateSwitchTable11N3S[1];
+			break;
+		}
+#endif /* DOT11N_SS3_SUPPORT */
+
+		/*else if ((pAd->StaActive.SupportedPhyInfo.MCSSet[0] == 0xff) && ((pAd->StaActive.SupportedPhyInfo.MCSSet[1] == 0x00) || (pAd->Antenna.field.TxPath == 1)))*/
+		if ((pEntry->HTCapability.MCSSet[0] == 0xff) && ((pEntry->HTCapability.MCSSet[1] == 0x00) || (pAd->CommonCfg.TxStream == 1)))
+		{/* 11N 1S AP*/
+#ifdef AGS_SUPPORT
+			if (SUPPORT_AGS(pAd))
+			{
+				*ppTable = AGS1x1HTRateTable;
+				*pTableSize = AGS1x1HTRateTable[0];
+				*pInitTxRateIdx = AGS1x1HTRateTable[1];
+
+				DBGPRINT_RAW(RT_DEBUG_TRACE,("AGS: %s: 11N 1S AP, AGS1x1HTRateTable\n", 
+					__FUNCTION__));
+			}
+			else
+#endif /* AGS_SUPPORT */
+			{
+			*ppTable = RateSwitchTable11N1S;
+			*pTableSize = RateSwitchTable11N1S[0];
+			*pInitTxRateIdx = RateSwitchTable11N1S[1];
+			
+			}
+			break;
+		}
+
+		/*else if ((pAd->StaActive.SupportedPhyInfo.MCSSet[0] == 0xff) && (pAd->StaActive.SupportedPhyInfo.MCSSet[1] == 0xff) && (pAd->Antenna.field.TxPath == 2))*/
+		if ((pEntry->HTCapability.MCSSet[0] == 0xff) && (pEntry->HTCapability.MCSSet[1] == 0xff) && (pAd->CommonCfg.TxStream >= 2))
+		{/* 11N 2S AP*/
+#ifdef AGS_SUPPORT
+			if (SUPPORT_AGS(pAd))
+			{
+				*ppTable = AGS2x2HTRateTable;
+				*pTableSize = AGS2x2HTRateTable[0];
+				*pInitTxRateIdx = AGS2x2HTRateTable[1];
+
+				DBGPRINT_RAW(RT_DEBUG_TRACE,("AGS: %s: 11N 2S AP, AGS2x2HTRateTable\n", 
+					__FUNCTION__));
+			}
+			else
+#endif /* AGS_SUPPORT */
+			{
+			if (pAd->LatchRfRegs.Channel <= 14)
+			{
+			*ppTable = RateSwitchTable11N2S;
+			*pTableSize = RateSwitchTable11N2S[0];
+			*pInitTxRateIdx = RateSwitchTable11N2S[1];
+			}
+			else
+			{
+				*ppTable = RateSwitchTable11N2SForABand;
+				*pTableSize = RateSwitchTable11N2SForABand[0];
+				*pInitTxRateIdx = RateSwitchTable11N2SForABand[1];
+			}
+			
+			}
+			break;
+		}
+
+#ifdef DOT11N_SS3_SUPPORT
+		if ((pEntry->HTCapability.MCSSet[0] == 0xff) &&
+			(pEntry->HTCapability.MCSSet[1] == 0xff) &&
+			(pEntry->HTCapability.MCSSet[2] == 0xff) &&
+			(pAd->CommonCfg.TxStream == 3))
+		{
+
+			*ppTable = RateSwitchTable11N3S;
+			*pTableSize = RateSwitchTable11N3S[0];
+			*pInitTxRateIdx = RateSwitchTable11N3S[1];
+			/*printk("%s(%d):Select 11N 3S AP!\n", __FUNCTION__, __LINE__);*/
+			break;
+		}
+#endif /* DOT11N_SS3_SUPPORT */
+
+#ifdef DOT11N_SS3_SUPPORT
+		if (pAd->CommonCfg.TxStream == 3)
+		{
+			if  (pEntry->HTCapability.MCSSet[0] == 0xff)
+			{
+				if (pEntry->HTCapability.MCSSet[1] == 0x00)
+				{	/* Only support 1SS */
+					if (pEntry->RateLen == 12)
+					{
+						*ppTable = RateSwitchTable11BGN1S;
+						*pTableSize = RateSwitchTable11BGN1S[0];
+						*pInitTxRateIdx = RateSwitchTable11BGN1S[1];
+						/*printk("%s(%d):RT2883-Select 11BGN 1S AP!\n", __FUNCTION__, __LINE__);*/
+					}
+					else
+					{
+						*ppTable = RateSwitchTable11N1S;
+						*pTableSize = RateSwitchTable11N1S[0];
+						*pInitTxRateIdx = RateSwitchTable11N1S[1];
+						/*printk("%s(%d):RT2883-Select 11N 1S AP!\n", __FUNCTION__, __LINE__);*/
+					}
+					break;
+				}
+				else if (pEntry->HTCapability.MCSSet[2] == 0x00)
+				{	/* Only support 2SS */
+					if (pEntry->RateLen > 0)
+					{
+						if (pAd->LatchRfRegs.Channel <= 14)
+						{
+							*ppTable = RateSwitchTable11BGN2S;
+							*pTableSize = RateSwitchTable11BGN2S[0];
+							*pInitTxRateIdx = RateSwitchTable11BGN2S[1];
+							/*printk("%s(%d):RT2883-Select 11BGN 2S AP!\n", __FUNCTION__, __LINE__);*/
+						}
+						else
+						{
+							*ppTable = RateSwitchTable11BGN2SForABand;
+							*pTableSize = RateSwitchTable11BGN2SForABand[0];
+							*pInitTxRateIdx = RateSwitchTable11BGN2SForABand[1];
+							/*printk("%s(%d):RT2883-Select 11N 2S AP!\n", __FUNCTION__, __LINE__);*/
+						}
+						break;
+					}
+					else
+					{
+						if (pAd->LatchRfRegs.Channel <= 14)
+						{
+							*ppTable = RateSwitchTable11N2S;
+							*pTableSize = RateSwitchTable11N2S[0];
+							*pInitTxRateIdx = RateSwitchTable11N2S[1];
+						}
+						else
+						{
+							*ppTable = RateSwitchTable11N2SForABand;
+							*pTableSize = RateSwitchTable11N2SForABand[0];
+							*pInitTxRateIdx = RateSwitchTable11N2SForABand[1];
+						}
+						/*printk("%s(%d):RT2883-Select 11N 2S AP!\n", __FUNCTION__, __LINE__);*/
+						break;
+					}
+				}
+				/* For 3SS case, we use the new rate table, so don't care it here */
+			}
+		}
+#endif /* DOT11N_SS3_SUPPORT */
+#endif /* DOT11_N_SUPPORT */
+		/*else if ((pAd->StaActive.SupRateLen == 4) && (pAd->StaActive.ExtRateLen == 0) && (pAd->StaActive.SupportedPhyInfo.MCSSet[0] == 0) && (pAd->StaActive.SupportedPhyInfo.MCSSet[1] == 0))*/
+		if ((pEntry->RateLen == 4 || pAd->CommonCfg.PhyMode==PHY_11B) 
+#ifdef DOT11_N_SUPPORT
+		/*Iverson mark for Adhoc b mode,sta will use rate 54  Mbps when connect with sta b/g/n mode */
+		/* && (pEntry->HTCapability.MCSSet[0] == 0) && (pEntry->HTCapability.MCSSet[1] == 0)*/
+#endif /* DOT11_N_SUPPORT */
+			)
+		{/* B only AP*/
+			*ppTable = RateSwitchTable11B;
+			*pTableSize = RateSwitchTable11B[0];
+			*pInitTxRateIdx = RateSwitchTable11B[1];
+			
+			break;
+		}
+
+		/*else if ((pAd->StaActive.SupRateLen + pAd->StaActive.ExtRateLen > 8) && (pAd->StaActive.SupportedPhyInfo.MCSSet[0] == 0) && (pAd->StaActive.SupportedPhyInfo.MCSSet[1] == 0))*/
+		if ((pEntry->RateLen > 8) 
+#ifdef DOT11_N_SUPPORT
+			&& (pEntry->HTCapability.MCSSet[0] == 0) && (pEntry->HTCapability.MCSSet[1] == 0)
+#endif /* DOT11_N_SUPPORT */
+			)
+		{/* B/G  mixed AP*/
+			*ppTable = RateSwitchTable11BG;
+			*pTableSize = RateSwitchTable11BG[0];
+			*pInitTxRateIdx = RateSwitchTable11BG[1];
+			
+			break;
+		}
+
+		/*else if ((pAd->StaActive.SupRateLen + pAd->StaActive.ExtRateLen == 8) && (pAd->StaActive.SupportedPhyInfo.MCSSet[0] == 0) && (pAd->StaActive.SupportedPhyInfo.MCSSet[1] == 0))*/
+		if ((pEntry->RateLen == 8) 
+#ifdef DOT11_N_SUPPORT
+			&& (pEntry->HTCapability.MCSSet[0] == 0) && (pEntry->HTCapability.MCSSet[1] == 0)
+#endif /* DOT11_N_SUPPORT */
+			)
+		{/* G only AP*/
+			*ppTable = RateSwitchTable11G;
+			*pTableSize = RateSwitchTable11G[0];
+			*pInitTxRateIdx = RateSwitchTable11G[1];
+			
+			break;
+		}
+#ifdef DOT11_N_SUPPORT
+#endif /* DOT11_N_SUPPORT */
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+#ifdef DOT11_N_SUPPORT
+			/*else if ((pAd->StaActive.SupportedPhyInfo.MCSSet[0] == 0) && (pAd->StaActive.SupportedPhyInfo.MCSSet[1] == 0))*/
+			if ((pEntry->HTCapability.MCSSet[0] == 0) && (pEntry->HTCapability.MCSSet[1] == 0))
+#endif /* DOT11_N_SUPPORT */
+			{	/* Legacy mode*/
+				if (pAd->CommonCfg.MaxTxRate <= RATE_11)
+				{
+					*ppTable = RateSwitchTable11B;
+					*pTableSize = RateSwitchTable11B[0];
+					*pInitTxRateIdx = RateSwitchTable11B[1];
+				}
+				else if ((pAd->CommonCfg.MaxTxRate > RATE_11) && (pAd->CommonCfg.MinTxRate > RATE_11))
+				{
+					*ppTable = RateSwitchTable11G;
+					*pTableSize = RateSwitchTable11G[0];
+					*pInitTxRateIdx = RateSwitchTable11G[1];
+					
+				}
+				else		
+				{
+					*ppTable = RateSwitchTable11BG;
+					*pTableSize = RateSwitchTable11BG[0];
+					*pInitTxRateIdx = RateSwitchTable11BG[1];
+				}
+				break;
+			}
+#ifdef DOT11_N_SUPPORT
+#ifdef AGS_SUPPORT
+			if (SUPPORT_AGS(pAd) && (pAd->CommonCfg.TxStream == 3))
+			{
+				*ppTable = AGS3x3HTRateTable;
+				*pTableSize = AGS3x3HTRateTable[0];
+				*pInitTxRateIdx = AGS3x3HTRateTable[1];
+
+				DBGPRINT_RAW(RT_DEBUG_TRACE,("AGS: %s: Unknown adhoc, DLS or AP, AGS3x3HTRateTable\n", 
+					__FUNCTION__));
+			}
+			else
+#endif /* AGS_SUPPORT */
+			{
+			if (pAd->LatchRfRegs.Channel <= 14)
+			{
+				if (pAd->CommonCfg.TxStream == 1)
+				{
+					*ppTable = RateSwitchTable11N1S;
+					*pTableSize = RateSwitchTable11N1S[0];
+					*pInitTxRateIdx = RateSwitchTable11N1S[1];
+					DBGPRINT_RAW(RT_DEBUG_ERROR,("DRS: unkown mode,default use 11N 1S AP \n"));
+				}
+				else if (pAd->CommonCfg.TxStream == 2)
+				{
+					*ppTable = RateSwitchTable11N2S;
+					*pTableSize = RateSwitchTable11N2S[0];
+					*pInitTxRateIdx = RateSwitchTable11N2S[1];
+					DBGPRINT_RAW(RT_DEBUG_ERROR,("DRS: unkown mode,default use 11N 2S AP \n"));	
+				}
+				else
+				{
+#ifdef DOT11N_SS3_SUPPORT
+					*ppTable = RateSwitchTable11N3S;
+					*pTableSize = RateSwitchTable11N3S[0];
+					*pInitTxRateIdx = RateSwitchTable11N3S[1];
+#else
+					*ppTable = RateSwitchTable11N2S;
+					*pTableSize = RateSwitchTable11N2S[0];
+					*pInitTxRateIdx = RateSwitchTable11N2S[1];
+#endif /* DOT11N_SS3_SUPPORT */
+				}
+			}
+			else
+			{
+				if (pAd->CommonCfg.TxStream == 1)
+				{
+					*ppTable = RateSwitchTable11N1S;
+					*pTableSize = RateSwitchTable11N1S[0];
+					*pInitTxRateIdx = RateSwitchTable11N1S[1];
+					DBGPRINT_RAW(RT_DEBUG_ERROR,("DRS: unkown mode,default use 11N 1S AP \n"));
+				}
+				else if (pAd->CommonCfg.TxStream == 2)
+				{
+					*ppTable = RateSwitchTable11N2S;
+					*pTableSize = RateSwitchTable11N2S[0];
+					*pInitTxRateIdx = RateSwitchTable11N2S[1];
+					DBGPRINT_RAW(RT_DEBUG_ERROR,("DRS: unkown mode,default use 11N 2S AP \n"));	
+				}
+				else
+				{
+#ifdef DOT11N_SS3_SUPPORT
+					*ppTable = RateSwitchTable11N3S;
+					*pTableSize = RateSwitchTable11N3S[0];
+					*pInitTxRateIdx = RateSwitchTable11N3S[1];
+#else
+					*ppTable = RateSwitchTable11N2SForABand;
+					*pTableSize = RateSwitchTable11N2SForABand[0];
+					*pInitTxRateIdx = RateSwitchTable11N2SForABand[1];
+#endif /* DOT11N_SS3_SUPPORT */
+				}
+			}
+			}
+#endif /* DOT11_N_SUPPORT */
+			DBGPRINT_RAW(RT_DEBUG_ERROR,("DRS: unkown mode (SupRateLen=%d, ExtRateLen=%d, MCSSet[0]=0x%x, MCSSet[1]=0x%x)\n",
+						pAd->StaActive.SupRateLen,
+						pAd->StaActive.ExtRateLen,
+						pAd->StaActive.SupportedPhyInfo.MCSSet[0],
+						pAd->StaActive.SupportedPhyInfo.MCSSet[1]));
+		}
+#endif /* CONFIG_STA_SUPPORT */
+	} while(FALSE);
+
+#ifdef NEW_RATE_ADAPT_SUPPORT
+	if (*ppTable == RateSwitchTable11N3S)
+	{
+
+	 	if ((pEntry->HTCapability.MCSSet[0] == 0xff) &&
+			(pEntry->HTCapability.MCSSet[1] == 0xff) &&
+			(pAd->CommonCfg.TxStream > 1) && 
+			((pAd->CommonCfg.TxStream == 2) || (pEntry->HTCapability.MCSSet[2] == 0x0)))
+			NdisMoveMemory((*ppTable)+10*16, tempUchar, 20);
+		else if ((pEntry->HTCapability.MCSSet[0] == 0xff) &&
+				((pEntry->HTCapability.MCSSet[1] == 0x00) || (pAd->CommonCfg.TxStream == 1))) 
+			NdisMoveMemory((*ppTable)+10*8, tempUchar1, 20);				
+	}
+#endif /* NEW_RATE_ADAPT_SUPPORT */
+}
+
+
+#ifdef CONFIG_STA_SUPPORT
+VOID STAMlmePeriodicExec(
+	PRTMP_ADAPTER pAd)
+{
+	ULONG			    TxTotalCnt;
+	int 	i;
+#ifdef CONFIG_PM
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND	
+	POS_COOKIE  pObj = (POS_COOKIE) pAd->OS_Cookie;
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */
+#endif /* CONFIG_PM */
+
+	/*
+		We return here in ATE mode, because the statistics 
+		that ATE need are not collected via this routine.
+	*/
+#ifdef RALINK_ATE
+	if (ATE_ON(pAd))
+	return;
+#endif /* RALINK_ATE */
+
+	RTMP_CHIP_SPECIFIC(pAd, RTMP_CHIP_SPEC_STATE_STA_PERIODIC,
+						RTMP_CHIP_SPEC_HIGH_POWER_PATCH_STA, NULL, 0);
+
+#if defined(RT3070)
+	/* request by Gary, if Rssi0 > -42, BBP 82 need to be changed from 0x62 to 0x42, , bbp 67 need to be changed from 0x20 to 0x18*/
+	if (!pAd->CommonCfg.HighPowerPatchDisabled)
+	{
+		UCHAR RFValue;
+
+#ifdef RT3070
+		 if (((IS_RT3070(pAd) && ((pAd->MACVersion & 0xffff) < 0x0201)) || IS_RT2070(pAd))
+#ifdef RTMP_MAC_USB
+		 	&& !RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF)
+#endif /* RTMP_MAC_USB */
+		)
+                {
+                        
+		   		if ((pAd->StaCfg.RssiSample.AvgRssi0 != 0) && (pAd->StaCfg.RssiSample.AvgRssi0 > (pAd->BbpRssiToDbmDelta - 35))) 
+                 		{ 
+					/*RT30xxWriteRFRegister(pAd, RF_R27, 0x20); */
+					RT30xxReadRFRegister(pAd, RF_R27, (PUCHAR)&RFValue);
+					RFValue &= ~0x3;
+					RT30xxWriteRFRegister(pAd, RF_R27, (UCHAR)RFValue);
+                		 } 
+                 		else 
+                 		{ 
+					/*RT30xxWriteRFRegister(pAd, RF_R27, 0x23); */
+					RT30xxReadRFRegister(pAd, RF_R27, (PUCHAR)&RFValue);
+					RFValue |= 0x3;
+					RT30xxWriteRFRegister(pAd, RF_R27, (UCHAR)RFValue);
+                 		}
+                       
+		 }
+#endif /* RT3070 */
+	}
+#endif /* RT3070 */
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+    if (pAd->StaCfg.WpaSupplicantUP == WPA_SUPPLICANT_DISABLE)    
+#endif /* WPA_SUPPLICANT_SUPPORT */        
+    {
+    	/* WPA MIC error should block association attempt for 60 seconds*/
+		if (pAd->StaCfg.bBlockAssoc && 
+			RTMP_TIME_AFTER(pAd->Mlme.Now32, pAd->StaCfg.LastMicErrorTime + (60*OS_HZ)))
+    		pAd->StaCfg.bBlockAssoc = FALSE;
+    }
+
+#ifdef RTMP_MAC_USB
+	/* If station is idle, go to sleep*/
+	if ( 1
+	/*	&& (pAd->StaCfg.PSControl.field.EnablePSinIdle == TRUE)*/
+		&& (pAd->StaCfg.WindowsPowerMode > 0)
+		&& (pAd->OpMode == OPMODE_STA) && (IDLE_ON(pAd)) 
+		&& (pAd->Mlme.SyncMachine.CurrState == SYNC_IDLE)
+		&& (pAd->Mlme.CntlMachine.CurrState == CNTL_IDLE)
+		&& (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF))
+#ifdef CONFIG_PM
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND
+		&& (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_CPU_SUSPEND))
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */	
+#endif /* CONFIG_PM */
+		)
+	{
+			RT28xxUsbAsicRadioOff(pAd);
+#ifdef CONFIG_PM
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND	
+			if(!RTMP_Usb_AutoPM_Put_Interface(pObj->pUsb_Dev,pObj->intf))
+					RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_SUSPEND);
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */
+#endif /* CONFIG_PM */
+
+		DBGPRINT(RT_DEBUG_TRACE, ("PSM - Issue Sleep command)\n"));
+	}
+
+#endif /* RTMP_MAC_USB */
+
+
+	
+
+	if (ADHOC_ON(pAd))
+	{
+	}
+	else
+	{
+    	AsicStaBbpTuning(pAd);
+	}
+	
+	TxTotalCnt = pAd->RalinkCounters.OneSecTxNoRetryOkCount + 
+					 pAd->RalinkCounters.OneSecTxRetryOkCount + 
+					 pAd->RalinkCounters.OneSecTxFailCount;
+
+	if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED) && 
+		(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS)))
+	{
+		/* update channel quality for Roaming/Fast-Roaming and UI LinkQuality display*/
+		if (pAd->StaCfg.bImprovedScan == FALSE)	/* bImprovedScan True means scan is not completed */
+		{
+			/* The NIC may lost beacons during scaning operation.*/
+			MlmeCalculateChannelQuality(pAd, NULL, pAd->Mlme.Now32);
+		}
+	}
+
+
+	/* must be AFTER MlmeDynamicTxRateSwitching() because it needs to know if*/
+	/* Radio is currently in noisy environment*/
+	if (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS)) 
+	AsicAdjustTxPower(pAd);
+
+	/*
+		Driver needs to up date value of LastOneSecTotalTxCount here;
+		otherwise UI couldn't do scanning sometimes when STA doesn't connect to AP or peer Ad-Hoc.
+	*/
+	pAd->RalinkCounters.LastOneSecTotalTxCount = TxTotalCnt;
+	
+
+	if (INFRA_ON(pAd))
+	{
+		/* resume Improved Scanning*/
+		if ((pAd->StaCfg.bImprovedScan) &&
+			(pAd->Mlme.SyncMachine.CurrState == SCAN_PENDING))
+		{
+			MLME_SCAN_REQ_STRUCT       ScanReq;
+
+			pAd->StaCfg.LastScanTime = pAd->Mlme.Now32;
+			
+			ScanParmFill(pAd, &ScanReq, "", 0, BSS_ANY, SCAN_ACTIVE);
+			MlmeEnqueue(pAd, SYNC_STATE_MACHINE, MT2_MLME_SCAN_REQ, sizeof(MLME_SCAN_REQ_STRUCT), &ScanReq, 0);
+			DBGPRINT(RT_DEBUG_WARN, ("bImprovedScan ............. Resume for bImprovedScan, SCAN_PENDING .............. \n"));
+		}
+
+#ifdef QOS_DLS_SUPPORT
+		/* Check DLS time out, then tear down those session*/
+		RTMPCheckDLSTimeOut(pAd);
+#endif /* QOS_DLS_SUPPORT */
+
+
+		/* Is PSM bit consistent with user power management policy?*/
+		/* This is the only place that will set PSM bit ON.*/
+		if (!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE))
+		MlmeCheckPsmChange(pAd, pAd->Mlme.Now32);
+
+		/*
+			When we are connected and do the scan progress, it's very possible we cannot receive
+			the beacon of the AP. So, here we simulate that we received the beacon.
+		*/
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS) &&
+			(RTMP_TIME_AFTER(pAd->Mlme.Now32, pAd->StaCfg.LastBeaconRxTime + (1*OS_HZ))))
+		{
+			ULONG BPtoJiffies;
+			LONG timeDiff;
+
+			BPtoJiffies = (((pAd->CommonCfg.BeaconPeriod * 1024 / 1000) * OS_HZ) / 1000);
+			timeDiff = (pAd->Mlme.Now32 - pAd->StaCfg.LastBeaconRxTime) / BPtoJiffies;
+			if (timeDiff > 0) 
+				pAd->StaCfg.LastBeaconRxTime += (timeDiff * BPtoJiffies);
+
+			if (RTMP_TIME_AFTER(pAd->StaCfg.LastBeaconRxTime, pAd->Mlme.Now32))
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("MMCHK - BeaconRxTime adjust wrong(BeaconRx=0x%lx, Now=0x%lx)\n", 
+								pAd->StaCfg.LastBeaconRxTime, pAd->Mlme.Now32));
+			}
+		}
+		
+		if ((RTMP_TIME_AFTER(pAd->Mlme.Now32, pAd->StaCfg.LastBeaconRxTime + (1*OS_HZ))) &&
+			(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS)) &&
+			(pAd->StaCfg.bImprovedScan == FALSE) &&
+			(((TxTotalCnt + pAd->RalinkCounters.OneSecRxOkCnt) < 600)))
+		{
+			RTMPSetAGCInitValue(pAd, BW_20);
+			DBGPRINT(RT_DEBUG_TRACE, ("MMCHK - No BEACON. restore R66 to the low bound(%d) \n", (0x2E + GET_LNA_GAIN(pAd))));
+		}
+
+
+#ifdef RTMP_MAC_USB
+#ifdef DOT11_N_SUPPORT
+/*for 1X1 STA pass 11n wifi wmm, need to change txop per case;*/
+/* 1x1 device for 802.11n WMM Test*/
+	if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF))
+	{
+
+		if ((pAd->Antenna.field.TxPath == 1)&&
+		(pAd->StaActive.SupportedPhyInfo.bHtEnable == TRUE) && 
+		(pAd->CommonCfg.BACapability.field.Policy == BA_NOTUSE))
+		{
+			EDCA_AC_CFG_STRUC	Ac0Cfg;
+			EDCA_AC_CFG_STRUC	Ac2Cfg;								
+			RTUSBReadMACRegister(pAd, EDCA_AC2_CFG, &Ac2Cfg.word);									
+			RTUSBReadMACRegister(pAd, EDCA_AC0_CFG, &Ac0Cfg.word);
+									
+			if ((pAd->RalinkCounters.OneSecOsTxCount[QID_AC_VO] == 0) &&
+			(pAd->RalinkCounters.OneSecOsTxCount[QID_AC_BK] == 0) &&
+			(pAd->RalinkCounters.OneSecOsTxCount[QID_AC_BE] < 50) &&								      
+			(pAd->RalinkCounters.OneSecOsTxCount[QID_AC_VI] >= 1000))
+			{
+			/*5.2.27/28 T7: Total throughput need to ~36Mbps*/
+				if (Ac2Cfg.field.Aifsn!=0xc)
+				{
+					Ac2Cfg.field.Aifsn = 0xc;
+					RTUSBWriteMACRegister(pAd, EDCA_AC2_CFG, Ac2Cfg.word);
+				}
+			}
+			else if ( IS_RT3070(pAd) && 
+			(pAd->RalinkCounters.OneSecOsTxCount[QID_AC_VO] == 0) &&
+			(pAd->RalinkCounters.OneSecOsTxCount[QID_AC_BK] == 0) &&
+			(pAd->RalinkCounters.OneSecOsTxCount[QID_AC_VI] == 0) &&								      
+			(pAd->RalinkCounters.OneSecOsTxCount[QID_AC_BE] >= 300)&&
+			(pAd->RalinkCounters.OneSecOsTxCount[QID_AC_BE] <= 1500)&&
+			(pAd->CommonCfg.IOTestParm.bRTSLongProtOn==FALSE))
+			{
+				if (Ac0Cfg.field.AcTxop!=0x07)
+				{
+					Ac0Cfg.field.AcTxop = 0x07;
+					Ac0Cfg.field.Aifsn = 0xc;
+					RTUSBWriteMACRegister(pAd, EDCA_AC0_CFG, Ac0Cfg.word);
+				}									
+			}
+			else if ((pAd->RalinkCounters.OneSecOsTxCount[QID_AC_VO] == 0) &&
+			(pAd->RalinkCounters.OneSecOsTxCount[QID_AC_BK] == 0) &&
+			(pAd->RalinkCounters.OneSecOsTxCount[QID_AC_VI] == 0) &&								      
+			(pAd->RalinkCounters.OneSecOsTxCount[QID_AC_BE] < 10))
+			{
+			/* restore default parameter of BE*/
+				if ((Ac0Cfg.field.Aifsn!=3) ||(Ac0Cfg.field.AcTxop!=0))
+				{
+					if(Ac0Cfg.field.Aifsn!=3)
+						Ac0Cfg.field.Aifsn = 3;
+					if(Ac0Cfg.field.AcTxop!=0)
+						Ac0Cfg.field.AcTxop = 0;
+					RTUSBWriteMACRegister(pAd, EDCA_AC0_CFG, Ac0Cfg.word);
+				}
+
+			/* restore default parameter of VI*/
+				if (Ac2Cfg.field.Aifsn!=0x3)
+				{
+					Ac2Cfg.field.Aifsn = 0x3;
+					RTUSBWriteMACRegister(pAd, EDCA_AC2_CFG, Ac2Cfg.word);
+				}
+
+			}
+		}
+	}
+#endif /* DOT11_N_SUPPORT */
+								
+		/* TODO: for debug only. to be removed*/
+		pAd->RalinkCounters.OneSecOsTxCount[QID_AC_BE] = 0;
+		pAd->RalinkCounters.OneSecOsTxCount[QID_AC_BK] = 0;
+		pAd->RalinkCounters.OneSecOsTxCount[QID_AC_VI] = 0;
+		pAd->RalinkCounters.OneSecOsTxCount[QID_AC_VO] = 0;
+		pAd->RalinkCounters.OneSecDmaDoneCount[QID_AC_BE] = 0;
+		pAd->RalinkCounters.OneSecDmaDoneCount[QID_AC_BK] = 0;
+		pAd->RalinkCounters.OneSecDmaDoneCount[QID_AC_VI] = 0;
+		pAd->RalinkCounters.OneSecDmaDoneCount[QID_AC_VO] = 0;
+		pAd->RalinkCounters.OneSecTxDoneCount = 0;
+		pAd->RalinkCounters.OneSecTxAggregationCount = 0;
+				
+
+#endif /* RTMP_MAC_USB */
+				
+
+        /*if ((pAd->RalinkCounters.OneSecTxNoRetryOkCount == 0) &&*/
+        /*    (pAd->RalinkCounters.OneSecTxRetryOkCount == 0))*/
+       if ((!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS)))
+        {
+    		if (pAd->CommonCfg.bAPSDCapable && pAd->CommonCfg.APEdcaParm.bAPSDCapable)
+    		{
+    		    /* When APSD is enabled, the period changes as 20 sec*/
+    			if ((pAd->Mlme.OneSecPeriodicRound % 20) == 8)
+    			{
+    				RTMPSendNullFrame(pAd, pAd->CommonCfg.TxRate, TRUE);
+    			}
+    		}
+    		else
+    		{
+    		    /* Send out a NULL frame every 10 sec to inform AP that STA is still alive (Avoid being age out)*/
+    			if ((pAd->Mlme.OneSecPeriodicRound % 10) == 8)
+			{
+				RTMPSendNullFrame(pAd, 
+								  pAd->CommonCfg.TxRate, 
+								  (pAd->CommonCfg.bWmmCapable & pAd->CommonCfg.APEdcaParm.bValid));
+			}
+    		}
+        }
+
+		if (CQI_IS_DEAD(pAd->Mlme.ChannelQuality))
+			{
+			DBGPRINT(RT_DEBUG_TRACE, ("MMCHK - No BEACON. Dead CQI. Auto Recovery attempt #%ld\n", pAd->RalinkCounters.BadCQIAutoRecoveryCount));
+
+			if (pAd->StaCfg.bAutoConnectByBssid)
+				pAd->StaCfg.bAutoConnectByBssid = FALSE;
+			
+#ifdef WPA_SUPPLICANT_SUPPORT
+			if ((pAd->StaCfg.WpaSupplicantUP != WPA_SUPPLICANT_DISABLE) &&
+				(pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2))
+				pAd->StaCfg.bLostAp = TRUE;
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+			pAd->MlmeAux.CurrReqIsFromNdis = FALSE;
+			/* Lost AP, send disconnect & link down event*/
+			LinkDown(pAd, FALSE);
+			
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+#ifndef NATIVE_WPA_SUPPLICANT_SUPPORT
+			/*send disassociate event to wpa_supplicant*/
+			if (pAd->StaCfg.WpaSupplicantUP) 
+			{
+				RtmpOSWrielessEventSend(pAd->net_dev, RT_WLAN_EVENT_CUSTOM, RT_DISASSOC_EVENT_FLAG, NULL, NULL, 0);
+			} 
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+#endif /* WPA_SUPPLICANT_SUPPORT */
+			
+#ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
+		RtmpOSWrielessEventSend(pAd->net_dev, RT_WLAN_EVENT_CGIWAP, -1, NULL, NULL, 0);
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */        
+			
+			/* RTMPPatchMacBbpBug(pAd);*/
+			MlmeAutoReconnectLastSSID(pAd);
+		}
+		else if (CQI_IS_BAD(pAd->Mlme.ChannelQuality))
+		{
+			pAd->RalinkCounters.BadCQIAutoRecoveryCount ++;
+			DBGPRINT(RT_DEBUG_TRACE, ("MMCHK - Bad CQI. Auto Recovery attempt #%ld\n", pAd->RalinkCounters.BadCQIAutoRecoveryCount));
+			MlmeAutoReconnectLastSSID(pAd);
+		}
+		
+		if (pAd->StaCfg.bAutoRoaming)
+		{
+			BOOLEAN	rv = FALSE;
+			CHAR	dBmToRoam = pAd->StaCfg.dBmToRoam;
+			CHAR 	MaxRssi = RTMPMaxRssi(pAd, 
+										  pAd->StaCfg.RssiSample.LastRssi0, 
+										  pAd->StaCfg.RssiSample.LastRssi1, 
+										  pAd->StaCfg.RssiSample.LastRssi2);			
+			
+			if (pAd->StaCfg.bAutoConnectByBssid)
+				pAd->StaCfg.bAutoConnectByBssid = FALSE;
+			
+			/* Scanning, ignore Roaming*/
+			if (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS) &&
+				(pAd->Mlme.SyncMachine.CurrState == SYNC_IDLE) &&
+				(MaxRssi <= dBmToRoam))
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("Rssi=%d, dBmToRoam=%d\n", MaxRssi, (CHAR)dBmToRoam));
+
+
+				/* Add auto seamless roaming*/
+				if (rv == FALSE)
+					rv = MlmeCheckForFastRoaming(pAd);
+				
+				if (rv == FALSE)
+				{
+					if ((pAd->StaCfg.LastScanTime + 10 * OS_HZ) < pAd->Mlme.Now32)
+					{
+						DBGPRINT(RT_DEBUG_TRACE, ("MMCHK - Roaming, No eligable entry, try new scan!\n"));
+						pAd->StaCfg.LastScanTime = pAd->Mlme.Now32;
+						MlmeAutoScan(pAd);
+					}
+				}
+			}
+		}
+	}
+	else if (ADHOC_ON(pAd))
+	{
+
+		/* If all peers leave, and this STA becomes the last one in this IBSS, then change MediaState*/
+		/* to DISCONNECTED. But still holding this IBSS (i.e. sending BEACON) so that other STAs can*/
+		/* join later.*/
+		if (/*(RTMP_TIME_AFTER(pAd->Mlme.Now32, pAd->StaCfg.LastBeaconRxTime + ADHOC_BEACON_LOST_TIME)
+			|| (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2PSK))
+			&& */OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED))
+		{
+
+			for (i = 1; i < MAX_LEN_OF_MAC_TABLE; i++) 
+			{
+				MAC_TABLE_ENTRY *pEntry = &pAd->MacTab.Content[i];
+
+				if (!IS_ENTRY_CLIENT(pEntry))
+					continue;
+
+				if (RTMP_TIME_AFTER(pAd->Mlme.Now32, pEntry->LastBeaconRxTime + ADHOC_BEACON_LOST_TIME))
+                    MlmeDeAuthAction(pAd, pEntry, REASON_DISASSOC_STA_LEAVING, FALSE);
+			}
+
+            if (pAd->MacTab.Size == 0)
+            {			                
+    			OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED);
+    			RTMP_IndicateMediaState(pAd, NdisMediaStateDisconnected);
+            }            
+		}
+			
+	}
+	else /* no INFRA nor ADHOC connection*/
+	{
+
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+		if (pAd->StaCfg.WpaSupplicantUP & WPA_SUPPLICANT_ENABLE_WPS)
+			goto SKIP_AUTO_SCAN_CONN;
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+		if (pAd->StaCfg.bScanReqIsFromWebUI &&
+			RTMP_TIME_BEFORE(pAd->Mlme.Now32, pAd->StaCfg.LastScanTime + (30 * OS_HZ)))
+			goto SKIP_AUTO_SCAN_CONN;
+		else
+			pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
+        
+		if ((pAd->StaCfg.bAutoReconnect == TRUE)
+			&& RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_START_UP)
+			&& (MlmeValidateSSID(pAd->MlmeAux.AutoReconnectSsid, pAd->MlmeAux.AutoReconnectSsidLen) == TRUE))
+		{
+			if ((pAd->ScanTab.BssNr==0) && (pAd->Mlme.CntlMachine.CurrState == CNTL_IDLE)
+				)
+			{
+				MLME_SCAN_REQ_STRUCT	   ScanReq;
+
+				if (RTMP_TIME_AFTER(pAd->Mlme.Now32, pAd->StaCfg.LastScanTime + (10 * OS_HZ))
+					||(pAd->StaCfg.bNotFirstScan == FALSE))
+				{
+					DBGPRINT(RT_DEBUG_TRACE, ("STAMlmePeriodicExec():CNTL - ScanTab.BssNr==0, start a new ACTIVE scan SSID[%s]\n", pAd->MlmeAux.AutoReconnectSsid));
+					if (pAd->StaCfg.BssType == BSS_ADHOC)	
+						pAd->StaCfg.bNotFirstScan = TRUE;
+					ScanParmFill(pAd, &ScanReq, (PSTRING) pAd->MlmeAux.AutoReconnectSsid, pAd->MlmeAux.AutoReconnectSsidLen, BSS_ANY, SCAN_ACTIVE);
+					MlmeEnqueue(pAd, SYNC_STATE_MACHINE, MT2_MLME_SCAN_REQ, sizeof(MLME_SCAN_REQ_STRUCT), &ScanReq, 0);
+					pAd->Mlme.CntlMachine.CurrState = CNTL_WAIT_OID_LIST_SCAN;
+					/* Reset Missed scan number*/
+					pAd->StaCfg.LastScanTime = pAd->Mlme.Now32;
+				}
+				else
+					MlmeAutoReconnectLastSSID(pAd);
+			}
+			else if (pAd->Mlme.CntlMachine.CurrState == CNTL_IDLE)
+			{
+#ifdef CARRIER_DETECTION_SUPPORT /* Roger sync Carrier*/
+				if (pAd->CommonCfg.CarrierDetect.Enable == TRUE)
+				{
+					if ((pAd->Mlme.OneSecPeriodicRound % 5) == 1)
+						MlmeAutoReconnectLastSSID(pAd);
+				}
+				else
+#endif /* CARRIER_DETECTION_SUPPORT */ 
+				if(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF))
+				{
+						if(pAd->Mlme.OneSecPeriodicRound% 20 == 0)
+						{
+							MlmeAutoReconnectLastSSID(pAd);
+						}
+				}
+				else
+					MlmeAutoReconnectLastSSID(pAd);
+			}
+		}
+	}
+
+SKIP_AUTO_SCAN_CONN:
+
+#ifdef DOT11_N_SUPPORT
+    if ((pAd->MacTab.Content[BSSID_WCID].TXBAbitmap !=0) && (pAd->MacTab.fAnyBASession == FALSE)
+		&& (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF)))
+	{
+		pAd->MacTab.fAnyBASession = TRUE;
+		AsicUpdateProtect(pAd, HT_FORCERTSCTS,  ALLN_SETPROTECT, FALSE, FALSE);
+	}
+	else if ((pAd->MacTab.Content[BSSID_WCID].TXBAbitmap ==0) && (pAd->MacTab.fAnyBASession == TRUE)
+		&& (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF)))
+	{
+		pAd->MacTab.fAnyBASession = FALSE;
+		AsicUpdateProtect(pAd, pAd->MlmeAux.AddHtInfo.AddHtInfo2.OperaionMode,  ALLN_SETPROTECT, FALSE, FALSE);
+	}
+#endif /* DOT11_N_SUPPORT */
+
+
+
+#ifdef DOT11_N_SUPPORT
+#ifdef DOT11N_DRAFT3
+	/* Perform 20/40 BSS COEX scan every Dot11BssWidthTriggerScanInt	*/
+	if ((OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_SCAN_2040)) && 
+		(pAd->CommonCfg.Dot11BssWidthTriggerScanInt != 0) && 
+		((pAd->Mlme.OneSecPeriodicRound % pAd->CommonCfg.Dot11BssWidthTriggerScanInt) == (pAd->CommonCfg.Dot11BssWidthTriggerScanInt-1)))
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("MMCHK - LastOneSecTotalTxCount/LastOneSecRxOkDataCnt  = %d/%d \n", 
+								pAd->RalinkCounters.LastOneSecTotalTxCount,
+								pAd->RalinkCounters.LastOneSecRxOkDataCnt));
+		
+		/* Check last scan time at least 30 seconds from now. 		*/
+		/* Check traffic is less than about 1.5~2Mbps.*/
+		/* it might cause data lost if we enqueue scanning.*/
+		/* This criteria needs to be considered*/
+		if ((pAd->RalinkCounters.LastOneSecTotalTxCount < 70) && (pAd->RalinkCounters.LastOneSecRxOkDataCnt < 70)
+			/*&& ((pAd->StaCfg.LastScanTime + 10 * OS_HZ) < pAd->Mlme.Now32) */)		
+		{
+			MLME_SCAN_REQ_STRUCT            ScanReq;
+			/* Fill out stuff for scan request and kick to scan*/
+			ScanParmFill(pAd, &ScanReq, ZeroSsid, 0, BSS_ANY, SCAN_2040_BSS_COEXIST);
+			MlmeEnqueue(pAd, SYNC_STATE_MACHINE, MT2_MLME_SCAN_REQ, sizeof(MLME_SCAN_REQ_STRUCT), &ScanReq, 0);
+			pAd->Mlme.CntlMachine.CurrState = CNTL_WAIT_OID_LIST_SCAN;
+			/* Set InfoReq = 1, So after scan , alwats sebd 20/40 Coexistence frame to AP*/
+			pAd->CommonCfg.BSSCoexist2040.field.InfoReq = 1;
+			RTMP_MLME_HANDLER(pAd);
+		}
+
+		DBGPRINT(RT_DEBUG_TRACE, (" LastOneSecTotalTxCount/LastOneSecRxOkDataCnt  = %d/%d \n", 
+							pAd->RalinkCounters.LastOneSecTotalTxCount, 
+							pAd->RalinkCounters.LastOneSecRxOkDataCnt));	
+	}
+#endif /* DOT11N_DRAFT3 */
+#endif /* DOT11_N_SUPPORT */
+
+	return;
+}
+
+/* Link down report*/
+VOID LinkDownExec(
+	IN PVOID SystemSpecific1, 
+	IN PVOID FunctionContext, 
+	IN PVOID SystemSpecific2, 
+	IN PVOID SystemSpecific3) 
+{
+	RTMP_ADAPTER *pAd = (RTMP_ADAPTER *)FunctionContext;
+
+	if (pAd != NULL)
+	{
+		MLME_DISASSOC_REQ_STRUCT   DisassocReq;
+		
+		if ((pAd->StaCfg.PortSecured == WPA_802_1X_PORT_NOT_SECURED) &&
+			(INFRA_ON(pAd)))
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("LinkDownExec(): disassociate with current AP...\n"));
+			DisassocParmFill(pAd, &DisassocReq, pAd->CommonCfg.Bssid, REASON_DISASSOC_STA_LEAVING);
+			MlmeEnqueue(pAd, ASSOC_STATE_MACHINE, MT2_MLME_DISASSOC_REQ, 
+						sizeof(MLME_DISASSOC_REQ_STRUCT), &DisassocReq, 0);
+			pAd->Mlme.CntlMachine.CurrState = CNTL_WAIT_DISASSOC;
+
+			RTMP_IndicateMediaState(pAd, NdisMediaStateDisconnected);
+		    pAd->ExtraInfo = GENERAL_LINK_DOWN;
+		}	
+	}
+}
+
+/* IRQL = DISPATCH_LEVEL*/
+VOID MlmeAutoScan(
+	IN PRTMP_ADAPTER pAd)
+{
+	/* check CntlMachine.CurrState to avoid collision with NDIS SetOID request*/
+	if (pAd->Mlme.CntlMachine.CurrState == CNTL_IDLE)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("MMCHK - Driver auto scan\n"));
+		MlmeEnqueue(pAd, 
+					MLME_CNTL_STATE_MACHINE, 
+					OID_802_11_BSSID_LIST_SCAN, 
+					pAd->MlmeAux.AutoReconnectSsidLen, 
+					pAd->MlmeAux.AutoReconnectSsid, 0);
+		RTMP_MLME_HANDLER(pAd);
+	}
+}
+	
+/* IRQL = DISPATCH_LEVEL*/
+VOID MlmeAutoReconnectLastSSID(
+	IN PRTMP_ADAPTER pAd)
+{
+	if (pAd->StaCfg.bAutoConnectByBssid)
+	{	
+		DBGPRINT(RT_DEBUG_TRACE, ("Driver auto reconnect to last OID_802_11_BSSID setting - %02X:%02X:%02X:%02X:%02X:%02X\n",
+									pAd->MlmeAux.Bssid[0],
+									pAd->MlmeAux.Bssid[1],
+									pAd->MlmeAux.Bssid[2],
+									pAd->MlmeAux.Bssid[3],
+									pAd->MlmeAux.Bssid[4],
+									pAd->MlmeAux.Bssid[5]));
+
+		pAd->MlmeAux.Channel = pAd->CommonCfg.Channel;
+		MlmeEnqueue(pAd,
+			 MLME_CNTL_STATE_MACHINE,
+			 OID_802_11_BSSID,
+			 MAC_ADDR_LEN,
+			 pAd->MlmeAux.Bssid, 0);
+
+		pAd->Mlme.CntlMachine.CurrState = CNTL_IDLE;
+
+		RTMP_MLME_HANDLER(pAd);
+	}
+	/* check CntlMachine.CurrState to avoid collision with NDIS SetOID request*/
+	else if ((pAd->Mlme.CntlMachine.CurrState == CNTL_IDLE) && 
+		(MlmeValidateSSID(pAd->MlmeAux.AutoReconnectSsid, pAd->MlmeAux.AutoReconnectSsidLen) == TRUE))
+	{
+		NDIS_802_11_SSID OidSsid;
+		OidSsid.SsidLength = pAd->MlmeAux.AutoReconnectSsidLen;
+		NdisMoveMemory(OidSsid.Ssid, pAd->MlmeAux.AutoReconnectSsid, pAd->MlmeAux.AutoReconnectSsidLen);
+
+		DBGPRINT(RT_DEBUG_TRACE, ("Driver auto reconnect to last OID_802_11_SSID setting - %s, len - %d\n", pAd->MlmeAux.AutoReconnectSsid, pAd->MlmeAux.AutoReconnectSsidLen));
+		MlmeEnqueue(pAd, 
+					MLME_CNTL_STATE_MACHINE, 
+					OID_802_11_SSID, 
+					sizeof(NDIS_802_11_SSID), 
+					&OidSsid, 0);
+		RTMP_MLME_HANDLER(pAd);
+	}
+}
+
+
+/*
+	==========================================================================
+	Description:
+		This routine checks if there're other APs out there capable for
+		roaming. Caller should call this routine only when Link up in INFRA mode
+		and channel quality is below CQI_GOOD_THRESHOLD.
+
+	IRQL = DISPATCH_LEVEL
+
+	Output:
+	==========================================================================
+ */
+VOID MlmeCheckForRoaming(
+	IN PRTMP_ADAPTER pAd,
+	IN ULONG	Now32)
+{
+	USHORT	   i;
+	BSS_TABLE  *pRoamTab = &pAd->MlmeAux.RoamTab;
+	BSS_ENTRY  *pBss;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("==> MlmeCheckForRoaming\n"));
+	/* put all roaming candidates into RoamTab, and sort in RSSI order*/
+	BssTableInit(pRoamTab);
+	for (i = 0; i < pAd->ScanTab.BssNr; i++)
+	{
+		pBss = &pAd->ScanTab.BssEntry[i];
+
+		if (RTMP_TIME_AFTER(Now32, pBss->LastBeaconRxTime + pAd->StaCfg.BeaconLostTime))
+			continue;	 /* AP disappear*/
+		if (pBss->Rssi <= RSSI_THRESHOLD_FOR_ROAMING)
+			continue;	 /* RSSI too weak. forget it.*/
+		if (MAC_ADDR_EQUAL(pBss->Bssid, pAd->CommonCfg.Bssid))
+			continue;	 /* skip current AP*/
+		if (pBss->Rssi < (pAd->StaCfg.RssiSample.LastRssi0 + RSSI_DELTA))
+			continue;	 /* only AP with stronger RSSI is eligible for roaming*/
+
+		/* AP passing all above rules is put into roaming candidate table		 */
+		NdisMoveMemory(&pRoamTab->BssEntry[pRoamTab->BssNr], pBss, sizeof(BSS_ENTRY));
+		pRoamTab->BssNr += 1;
+	}
+
+	if (pRoamTab->BssNr > 0)
+	{
+		/* check CntlMachine.CurrState to avoid collision with NDIS SetOID request*/
+		if (pAd->Mlme.CntlMachine.CurrState == CNTL_IDLE)
+		{
+			pAd->RalinkCounters.PoorCQIRoamingCount ++;
+			DBGPRINT(RT_DEBUG_TRACE, ("MMCHK - Roaming attempt #%ld\n", pAd->RalinkCounters.PoorCQIRoamingCount));
+			MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_MLME_ROAMING_REQ, 0, NULL, 0);
+			RTMP_MLME_HANDLER(pAd);
+		}
+	}
+	DBGPRINT(RT_DEBUG_TRACE, ("<== MlmeCheckForRoaming(# of candidate= %d)\n",pRoamTab->BssNr));   
+}
+
+/*
+	==========================================================================
+	Description:
+		This routine checks if there're other APs out there capable for
+		roaming. Caller should call this routine only when link up in INFRA mode
+		and channel quality is below CQI_GOOD_THRESHOLD.
+
+	IRQL = DISPATCH_LEVEL
+
+	Output:
+	==========================================================================
+ */
+BOOLEAN MlmeCheckForFastRoaming(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	USHORT		i;
+	BSS_TABLE	*pRoamTab = &pAd->MlmeAux.RoamTab;
+	BSS_ENTRY	*pBss;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("==> MlmeCheckForFastRoaming\n"));
+	/* put all roaming candidates into RoamTab, and sort in RSSI order*/
+	BssTableInit(pRoamTab);
+	for (i = 0; i < pAd->ScanTab.BssNr; i++)
+	{
+		pBss = &pAd->ScanTab.BssEntry[i];
+
+        if ((pBss->Rssi <= -50) && (pBss->Channel == pAd->CommonCfg.Channel))
+			continue;	 /* RSSI too weak. forget it.*/
+		if (MAC_ADDR_EQUAL(pBss->Bssid, pAd->CommonCfg.Bssid))
+			continue;	 /* skip current AP*/
+		if (!SSID_EQUAL(pBss->Ssid, pBss->SsidLen, pAd->CommonCfg.Ssid, pAd->CommonCfg.SsidLen))
+			continue;	 /* skip different SSID*/
+        if (pBss->Rssi < (RTMPMaxRssi(pAd, pAd->StaCfg.RssiSample.LastRssi0, pAd->StaCfg.RssiSample.LastRssi1, pAd->StaCfg.RssiSample.LastRssi2) + RSSI_DELTA)) 
+			continue;	 /* skip AP without better RSSI*/
+		
+        DBGPRINT(RT_DEBUG_TRACE, ("LastRssi0 = %d, pBss->Rssi = %d\n", RTMPMaxRssi(pAd, pAd->StaCfg.RssiSample.LastRssi0, pAd->StaCfg.RssiSample.LastRssi1, pAd->StaCfg.RssiSample.LastRssi2), pBss->Rssi));
+		/* AP passing all above rules is put into roaming candidate table		 */
+		NdisMoveMemory(&pRoamTab->BssEntry[pRoamTab->BssNr], pBss, sizeof(BSS_ENTRY));
+		pRoamTab->BssNr += 1;
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<== MlmeCheckForFastRoaming (BssNr=%d)\n", pRoamTab->BssNr));
+	if (pRoamTab->BssNr > 0)
+	{
+		/* check CntlMachine.CurrState to avoid collision with NDIS SetOID request*/
+		if (pAd->Mlme.CntlMachine.CurrState == CNTL_IDLE)
+		{
+			pAd->RalinkCounters.PoorCQIRoamingCount ++;
+			DBGPRINT(RT_DEBUG_TRACE, ("MMCHK - Roaming attempt #%ld\n", pAd->RalinkCounters.PoorCQIRoamingCount));
+			MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_MLME_ROAMING_REQ, 0, NULL, 0);
+			RTMP_MLME_HANDLER(pAd);
+			return TRUE;
+		}
+	}
+
+	return FALSE;
+}
+
+VOID MlmeSetTxRate(
+	IN PRTMP_ADAPTER		pAd,
+	IN PMAC_TABLE_ENTRY		pEntry,
+	IN PRTMP_TX_RATE_SWITCH	pTxRate)
+{
+	UCHAR	MaxMode = MODE_OFDM;
+	
+#ifdef DOT11_N_SUPPORT
+	MaxMode = MODE_HTGREENFIELD;
+
+	if (pTxRate->STBC && (pAd->StaCfg.MaxHTPhyMode.field.STBC) && (pAd->Antenna.field.TxPath == 2))
+		pAd->StaCfg.HTPhyMode.field.STBC = STBC_USE;
+	else
+#endif /* DOT11_N_SUPPORT */
+		pAd->StaCfg.HTPhyMode.field.STBC = STBC_NONE;
+
+	if (pTxRate->CurrMCS < MCS_AUTO)
+		pAd->StaCfg.HTPhyMode.field.MCS = pTxRate->CurrMCS;
+
+	if (pAd->StaCfg.HTPhyMode.field.MCS > 7)
+		pAd->StaCfg.HTPhyMode.field.STBC = STBC_NONE; 
+	
+   	if (ADHOC_ON(pAd))
+	{
+		/* If peer adhoc is b-only mode, we can't send 11g rate.*/
+		pAd->StaCfg.HTPhyMode.field.ShortGI = GI_800;
+		pEntry->HTPhyMode.field.STBC	= STBC_NONE;
+
+		
+		/* For Adhoc MODE_CCK, driver will use AdhocBOnlyJoined flag to roll back to B only if necessary*/
+		
+		pEntry->HTPhyMode.field.MODE	= pTxRate->Mode;
+		pEntry->HTPhyMode.field.ShortGI	= pAd->StaCfg.HTPhyMode.field.ShortGI;
+		pEntry->HTPhyMode.field.MCS		= pAd->StaCfg.HTPhyMode.field.MCS;
+
+		/* Patch speed error in status page*/
+		pAd->StaCfg.HTPhyMode.field.MODE = pEntry->HTPhyMode.field.MODE;
+	}
+	else
+    {
+#ifdef DOT11_N_SUPPORT
+        if ((pAd->CommonCfg.RegTransmitSetting.field.HTMODE == HTMODE_GF) &&
+			(pAd->MlmeAux.HtCapability.HtCapInfo.GF == HTMODE_GF))
+            pAd->StaCfg.HTPhyMode.field.MODE = MODE_HTGREENFIELD;
+		else
+#endif /* DOT11_N_SUPPORT */		
+		if (pTxRate->Mode <= MaxMode)
+		pAd->StaCfg.HTPhyMode.field.MODE = pTxRate->Mode;
+
+#ifdef DOT11_N_SUPPORT
+        if (pTxRate->ShortGI && (pAd->StaCfg.MaxHTPhyMode.field.ShortGI))
+			pAd->StaCfg.HTPhyMode.field.ShortGI = GI_400;
+		else
+#endif /* DOT11_N_SUPPORT */
+			pAd->StaCfg.HTPhyMode.field.ShortGI = GI_800;
+
+#ifdef DOT11_N_SUPPORT
+		/* Reexam each bandwidth's SGI support.*/
+		if (pAd->StaCfg.HTPhyMode.field.ShortGI == GI_400)
+		{
+			if ((pEntry->HTPhyMode.field.BW == BW_20) && (!CLIENT_STATUS_TEST_FLAG(pEntry, fCLIENT_STATUS_SGI20_CAPABLE)))
+				pAd->StaCfg.HTPhyMode.field.ShortGI = GI_800;
+			if ((pEntry->HTPhyMode.field.BW == BW_40) && (!CLIENT_STATUS_TEST_FLAG(pEntry, fCLIENT_STATUS_SGI40_CAPABLE)))
+				pAd->StaCfg.HTPhyMode.field.ShortGI = GI_800;
+		}
+
+        /* Turn RTS/CTS rate to 6Mbps.*/
+		if ((pEntry->HTPhyMode.field.MCS == 0) && (pAd->StaCfg.HTPhyMode.field.MCS != 0))
+		{
+			pEntry->HTPhyMode.field.MCS		= pAd->StaCfg.HTPhyMode.field.MCS;
+			if (pAd->MacTab.fAnyBASession)
+			{
+				AsicUpdateProtect(pAd, HT_FORCERTSCTS, ALLN_SETPROTECT, TRUE, (BOOLEAN)pAd->MlmeAux.AddHtInfo.AddHtInfo2.NonGfPresent);
+			}
+			else
+			{
+				AsicUpdateProtect(pAd, pAd->MlmeAux.AddHtInfo.AddHtInfo2.OperaionMode, ALLN_SETPROTECT, TRUE, (BOOLEAN)pAd->MlmeAux.AddHtInfo.AddHtInfo2.NonGfPresent);
+			}
+		}
+		else if ((pEntry->HTPhyMode.field.MCS == 8) && (pAd->StaCfg.HTPhyMode.field.MCS != 8))
+		{
+			pEntry->HTPhyMode.field.MCS		= pAd->StaCfg.HTPhyMode.field.MCS;
+			if (pAd->MacTab.fAnyBASession)
+			{
+				AsicUpdateProtect(pAd, HT_FORCERTSCTS, ALLN_SETPROTECT, TRUE, (BOOLEAN)pAd->MlmeAux.AddHtInfo.AddHtInfo2.NonGfPresent);
+			}
+			else
+			{
+				AsicUpdateProtect(pAd, pAd->MlmeAux.AddHtInfo.AddHtInfo2.OperaionMode, ALLN_SETPROTECT, TRUE, (BOOLEAN)pAd->MlmeAux.AddHtInfo.AddHtInfo2.NonGfPresent);
+			}
+		}
+		else if ((pEntry->HTPhyMode.field.MCS != 0) && (pAd->StaCfg.HTPhyMode.field.MCS == 0))
+		{
+			AsicUpdateProtect(pAd, HT_RTSCTS_6M, ALLN_SETPROTECT, TRUE, (BOOLEAN)pAd->MlmeAux.AddHtInfo.AddHtInfo2.NonGfPresent);
+
+		}
+		else if ((pEntry->HTPhyMode.field.MCS != 8) && (pAd->StaCfg.HTPhyMode.field.MCS == 8))
+		{
+			AsicUpdateProtect(pAd, HT_RTSCTS_6M, ALLN_SETPROTECT, TRUE, (BOOLEAN)pAd->MlmeAux.AddHtInfo.AddHtInfo2.NonGfPresent);
+		}
+#endif /* DOT11_N_SUPPORT */
+        
+		pEntry->HTPhyMode.field.STBC	= pAd->StaCfg.HTPhyMode.field.STBC;
+		pEntry->HTPhyMode.field.ShortGI	= pAd->StaCfg.HTPhyMode.field.ShortGI;
+		pEntry->HTPhyMode.field.MCS		= pAd->StaCfg.HTPhyMode.field.MCS;
+		pEntry->HTPhyMode.field.MODE	= pAd->StaCfg.HTPhyMode.field.MODE;
+    }
+	
+    pAd->LastTxRate = (USHORT)(pEntry->HTPhyMode.word);
+}
+
+/*
+	==========================================================================
+	Description:
+		This routine calculates the acumulated TxPER of eaxh TxRate. And 
+		according to the calculation result, change CommonCfg.TxRate which 
+		is the stable TX Rate we expect the Radio situation could sustained. 
+
+		CommonCfg.TxRate will change dynamically within {RATE_1/RATE_6, MaxTxRate} 
+	Output:
+		CommonCfg.TxRate - 
+
+	IRQL = DISPATCH_LEVEL
+
+	NOTE:
+		call this routine every second
+	==========================================================================
+ */
+VOID MlmeDynamicTxRateSwitching(
+	IN PRTMP_ADAPTER pAd)
+{
+	UCHAR					UpRateIdx = 0, DownRateIdx = 0, CurrRateIdx;
+	ULONG					i, AccuTxTotalCnt = 0, TxTotalCnt;
+	ULONG					TxErrorRatio = 0;
+	BOOLEAN					bTxRateChanged = FALSE, bUpgradeQuality = FALSE;
+	PRTMP_TX_RATE_SWITCH	pCurrTxRate, pNextTxRate = NULL;
+	PUCHAR					pTable;
+	UCHAR					TableSize = 0;
+	UCHAR					InitTxRateIdx = 0, TrainUp, TrainDown;
+	CHAR					Rssi, RssiOffset = 0;
+	TX_STA_CNT1_STRUC		StaTx1;
+	TX_STA_CNT0_STRUC		TxStaCnt0;
+	ULONG					TxRetransmit = 0, TxSuccess = 0, TxFailCount = 0;
+	MAC_TABLE_ENTRY			*pEntry;
+	RSSI_SAMPLE				*pRssi = &pAd->StaCfg.RssiSample;
+	UCHAR					tmpTxRate = 0;
+#ifdef DOT11N_SS3_SUPPORT
+	PRTMP_TX_RATE_SWITCH	pTempTxRate = NULL;
+#endif /* DOT11N_SS3_SUPPORT */
+#ifdef AGS_SUPPORT
+	AGS_STATISTICS_INFO		AGSStatisticsInfo = {0};
+#endif /* AGS_SUPPORT */
+
+#ifdef RALINK_ATE
+	if (ATE_ON(pAd))
+	{
+		return;
+	}
+#endif /* RALINK_ATE */
+
+	/* Update statistic counter*/
+	RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
+	RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
+	pAd->bUpdateBcnCntDone = TRUE;
+	TxRetransmit = StaTx1.field.TxRetransmit;
+	TxSuccess = StaTx1.field.TxSuccess;
+	TxFailCount = TxStaCnt0.field.TxFailCount;
+	TxTotalCnt = TxRetransmit + TxSuccess + TxFailCount;
+
+	pAd->RalinkCounters.OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
+	pAd->RalinkCounters.OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
+	pAd->RalinkCounters.OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
+
+#ifdef STATS_COUNT_SUPPORT
+	pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
+	pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
+	pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
+#endif /* STATS_COUNT_SUPPORT */
+		
+
+	
+	/* walk through MAC table, see if need to change AP's TX rate toward each entry*/
+	
+   	for (i = 1; i < MAX_LEN_OF_MAC_TABLE; i++) 
+	{
+		pEntry = &pAd->MacTab.Content[i];
+		
+		if (IS_ENTRY_NONE(pEntry))
+			continue;
+
+	/* check if this entry need to switch rate automatically*/
+		if (RTMPCheckEntryEnableAutoRateSwitch(pAd, pEntry) == FALSE)
+			continue;
+
+		MlmeSelectTxRateTable(pAd, pEntry, &pTable, &TableSize, &InitTxRateIdx);
+
+#ifdef NEW_RATE_ADAPT_SUPPORT
+		if (pTable == RateSwitchTable11N3S)
+		{
+			MlmeDynamicTxRateSwitchingAdapt(pAd, i);
+			continue;
+		}
+#endif /* NEW_RATE_ADAPT_SUPPORT */
+
+		if ((pAd->MacTab.Size == 1) || IS_ENTRY_DLS(pEntry))
+		{
+			Rssi = RTMPMaxRssi(pAd, 
+							   pRssi->AvgRssi0, 
+							   pRssi->AvgRssi1, 
+							   pRssi->AvgRssi2);
+					
+			/* if no traffic in the past 1-sec period, don't change TX rate,*/
+			/* but clear all bad history. because the bad history may affect the next */
+			/* Chariot throughput test*/
+			AccuTxTotalCnt = pAd->RalinkCounters.OneSecTxNoRetryOkCount + 
+						 pAd->RalinkCounters.OneSecTxRetryOkCount + 
+						 pAd->RalinkCounters.OneSecTxFailCount;
+			
+			if (TxTotalCnt)
+				TxErrorRatio = ((TxRetransmit + TxFailCount) * 100) / TxTotalCnt;
+
+#ifdef AGS_SUPPORT
+			if (SUPPORT_AGS(pAd))
+			{
+				
+				/* Gather the statistics information*/
+				
+				AGSStatisticsInfo.RSSI = Rssi;
+				AGSStatisticsInfo.TxErrorRatio = TxErrorRatio;
+				AGSStatisticsInfo.AccuTxTotalCnt = TxTotalCnt;
+				AGSStatisticsInfo.TxTotalCnt = TxTotalCnt;
+				AGSStatisticsInfo.TxSuccess = TxSuccess;
+				AGSStatisticsInfo.TxRetransmit = TxRetransmit;
+				AGSStatisticsInfo.TxFailCount = TxFailCount;
+			}
+#endif /* AGS_SUPPORT */
+		}
+		else
+		{
+			if (INFRA_ON(pAd) && (i == 1))
+				Rssi = RTMPMaxRssi(pAd, 
+								   pRssi->AvgRssi0, 
+								   pRssi->AvgRssi1, 
+								   pRssi->AvgRssi2);
+			else
+				Rssi = RTMPMaxRssi(pAd, 
+								   pEntry->RssiSample.AvgRssi0, 
+								   pEntry->RssiSample.AvgRssi1, 
+								   pEntry->RssiSample.AvgRssi2);
+			
+			TxTotalCnt = pEntry->OneSecTxNoRetryOkCount + 
+				 pEntry->OneSecTxRetryOkCount + 
+				 pEntry->OneSecTxFailCount;
+
+			if (TxTotalCnt)
+				TxErrorRatio = ((pEntry->OneSecTxRetryOkCount + pEntry->OneSecTxFailCount) * 100) / TxTotalCnt;
+
+#ifdef AGS_SUPPORT
+			if (SUPPORT_AGS(pAd))
+			{
+				
+				/* Gather the statistics information*/
+				
+				AGSStatisticsInfo.RSSI = Rssi;
+				AGSStatisticsInfo.TxErrorRatio = TxErrorRatio;
+				AGSStatisticsInfo.AccuTxTotalCnt = TxTotalCnt;
+				AGSStatisticsInfo.TxTotalCnt = TxTotalCnt;
+				AGSStatisticsInfo.TxSuccess = pEntry->OneSecTxNoRetryOkCount;
+				AGSStatisticsInfo.TxRetransmit = pEntry->OneSecTxRetryOkCount;
+				AGSStatisticsInfo.TxFailCount = pEntry->OneSecTxFailCount;
+			}
+#endif /* AGS_SUPPORT */
+		}
+
+		if (TxTotalCnt)
+		{
+			/*
+				Three AdHoc connections can not work normally if one AdHoc connection is disappeared from a heavy traffic environment generated by ping tool
+				We force to set LongRtyLimit and ShortRtyLimit to 0 to stop retransmitting packet, after a while, resoring original settings
+			*/
+			if (TxErrorRatio == 100)
+			{
+				TX_RTY_CFG_STRUC	TxRtyCfg,TxRtyCfgtmp;
+				ULONG	Index;
+				UINT32	MACValue;			
+
+				RTMP_IO_READ32(pAd, TX_RTY_CFG, &TxRtyCfg.word);
+				TxRtyCfgtmp.word = TxRtyCfg.word; 
+				TxRtyCfg.field.LongRtyLimit = 0x0;
+				TxRtyCfg.field.ShortRtyLimit = 0x0;
+				RTMP_IO_WRITE32(pAd, TX_RTY_CFG, TxRtyCfg.word);
+
+				RTMPusecDelay(1);
+
+				Index = 0;
+				MACValue = 0;
+				do 
+				{
+					RTMP_IO_READ32(pAd, TXRXQ_PCNT, &MACValue);
+					if ((MACValue & 0xffffff) == 0)
+						break;
+					Index++;
+					RTMPusecDelay(1000);
+				}while((Index < 330)&&(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS)));
+
+				RTMP_IO_READ32(pAd, TX_RTY_CFG, &TxRtyCfg.word);
+				TxRtyCfg.field.LongRtyLimit = TxRtyCfgtmp.field.LongRtyLimit;
+				TxRtyCfg.field.ShortRtyLimit = TxRtyCfgtmp.field.ShortRtyLimit;
+				RTMP_IO_WRITE32(pAd, TX_RTY_CFG, TxRtyCfg.word);							
+			}		
+		}
+
+		CurrRateIdx = pEntry->CurrTxRateIndex;
+
+		/*MlmeSelectTxRateTable(pAd, pEntry, &pTable, &TableSize, &InitTxRateIdx);*/
+
+#ifdef AGS_SUPPORT
+		if (AGS_IS_USING(pAd, pTable))
+		{
+/*
+			*ppTable = AGS3x3HTRateTable;
+			*pTableSize = AGS3x3HTRateTable[0];
+			*pInitTxRateIdx = AGS3x3HTRateTable[1];
+*/
+			
+			/* The dynamic Tx rate switching for AGS (Adaptive Group Switching)*/
+			
+			MlmeDynamicTxRateSwitchingAGS(pAd, pEntry, pTable, TableSize, &AGSStatisticsInfo, InitTxRateIdx);
+
+			continue; /* Skip the remaining procedure of the old Tx rate switching*/
+		}
+#endif /* AGS_SUPPORT */
+
+		if (CurrRateIdx >= TableSize)
+		{
+			CurrRateIdx = TableSize - 1;
+		}
+
+		/* When switch from Fixed rate -> auto rate, the REAL TX rate might be different from pAd->CommonCfg.TxRateIndex.*/
+		/* So need to sync here.*/
+		pCurrTxRate = (PRTMP_TX_RATE_SWITCH) &pTable[(CurrRateIdx+1)*5];
+		if ((pEntry->HTPhyMode.field.MCS != pCurrTxRate->CurrMCS) 
+			/*&& (pAd->StaCfg.bAutoTxRateSwitch == TRUE)*/
+			)
+		{
+			
+			/* Need to sync Real Tx rate and our record. */
+			/* Then return for next DRS.*/
+			pCurrTxRate = (PRTMP_TX_RATE_SWITCH) &pTable[(InitTxRateIdx+1)*5];
+			pEntry->CurrTxRateIndex = InitTxRateIdx;
+			MlmeSetTxRate(pAd, pEntry, pCurrTxRate);
+
+			/* reset all OneSecTx counters*/
+			RESET_ONE_SEC_TX_CNT(pEntry);
+			continue;
+		}
+
+		/* decide the next upgrade rate and downgrade rate, if any*/
+		if ((CurrRateIdx > 0) && (CurrRateIdx < (TableSize - 1)))
+		{
+			UpRateIdx = CurrRateIdx + 1;
+			DownRateIdx = CurrRateIdx -1;
+		}
+		else if (CurrRateIdx == 0)
+		{
+			UpRateIdx = CurrRateIdx + 1;
+			DownRateIdx = CurrRateIdx;
+		}
+		else if (CurrRateIdx == (TableSize - 1))
+		{
+			UpRateIdx = CurrRateIdx;
+			DownRateIdx = CurrRateIdx - 1;
+		}
+
+		pCurrTxRate = (PRTMP_TX_RATE_SWITCH) &pTable[(CurrRateIdx+1)*5];
+
+#ifdef DOT11_N_SUPPORT
+
+		if ((Rssi > -65) && (pCurrTxRate->Mode >= MODE_HTMIX))
+		{
+			TrainUp		= (pCurrTxRate->TrainUp + (pCurrTxRate->TrainUp >> 1));
+			TrainDown	= (pCurrTxRate->TrainDown + (pCurrTxRate->TrainDown >> 1));
+		}
+		else
+#endif /* DOT11_N_SUPPORT */
+		{
+			TrainUp		= pCurrTxRate->TrainUp;
+			TrainDown	= pCurrTxRate->TrainDown;
+		}
+
+		/*pAd->DrsCounters.LastTimeTxRateChangeAction = pAd->DrsCounters.LastSecTxRateChangeAction;*/
+		
+		
+		/* Keep the last time TxRateChangeAction status.*/
+		
+		pEntry->LastTimeTxRateChangeAction = pEntry->LastSecTxRateChangeAction;
+		
+		
+
+		
+		/* CASE 1. when TX samples are fewer than 15, then decide TX rate solely on RSSI*/
+		/*         (criteria copied from RT2500 for Netopia case)*/
+		
+		if (TxTotalCnt <= 15)
+		{
+			CHAR	idx = 0;
+			UCHAR	TxRateIdx;
+			UCHAR	MCS0 = 0, MCS1 = 0, MCS2 = 0, MCS3 = 0, MCS4 = 0,  MCS5 =0, MCS6 = 0, MCS7 = 0;			
+	        UCHAR	MCS12 = 0, MCS13 = 0, MCS14 = 0, MCS15 = 0;
+#ifdef DOT11N_SS3_SUPPORT
+			UCHAR	MCS20 = 0, MCS21 = 0, MCS22 = 0, MCS23 = 0; /* 3*3*/
+#endif /* DOT11N_SS3_SUPPORT */
+
+			/* check the existence and index of each needed MCS*/
+			while (idx < pTable[0])
+			{
+				pCurrTxRate = (PRTMP_TX_RATE_SWITCH) &pTable[(idx+1)*5];
+
+				if (pCurrTxRate->CurrMCS == MCS_0)
+				{
+					MCS0 = idx;
+				}
+				else if (pCurrTxRate->CurrMCS == MCS_1)
+				{
+					MCS1 = idx;
+				}
+				else if (pCurrTxRate->CurrMCS == MCS_2)
+				{
+					MCS2 = idx;
+				}
+				else if (pCurrTxRate->CurrMCS == MCS_3)
+				{
+					MCS3 = idx;
+				}
+				else if (pCurrTxRate->CurrMCS == MCS_4)
+				{
+					MCS4 = idx;
+				}
+	            else if (pCurrTxRate->CurrMCS == MCS_5)
+	            {
+	                MCS5 = idx;
+	            }
+	            else if (pCurrTxRate->CurrMCS == MCS_6)
+	            {
+	                MCS6 = idx;
+	            }
+				else if ((pCurrTxRate->CurrMCS == MCS_7) && (pCurrTxRate->ShortGI == GI_800))	/* prevent the highest MCS using short GI when 1T and low throughput*/
+				{
+					MCS7 = idx;
+				}
+				else if (pCurrTxRate->CurrMCS == MCS_12)
+				{
+					MCS12 = idx;
+				}
+				else if (pCurrTxRate->CurrMCS == MCS_13)
+				{
+					MCS13 = idx;
+				}
+				else if (pCurrTxRate->CurrMCS == MCS_14)
+				{
+					MCS14 = idx;
+				}
+				else if ((pCurrTxRate->CurrMCS == MCS_15) && (pCurrTxRate->ShortGI == GI_800))	/*we hope to use ShortGI as initial rate, however Atheros's chip has bugs when short GI*/
+				{
+					MCS15 = idx;
+				}
+#ifdef DOT11N_SS3_SUPPORT
+				else if (pCurrTxRate->CurrMCS == MCS_20) /* 3*3*/
+				{
+					MCS20 = idx;
+				}
+				else if (pCurrTxRate->CurrMCS == MCS_21)
+				{
+					MCS21 = idx;
+				}
+				else if (pCurrTxRate->CurrMCS == MCS_22)
+				{
+					MCS22 = idx;
+				}
+				else if (pCurrTxRate->CurrMCS == MCS_23)
+				{
+					MCS23 = idx;
+				}
+#endif /* DOT11N_SS3_SUPPORT */
+				idx ++;
+			}
+
+			if (pAd->LatchRfRegs.Channel <= 14)
+			{
+				if (pAd->NicConfig2.field.ExternalLNAForG)
+				{
+					RssiOffset = 2;
+				}
+				else
+				{
+					RssiOffset = 5;
+				}
+			}
+			else
+			{
+				if (pAd->NicConfig2.field.ExternalLNAForA)
+				{
+					RssiOffset = 5;
+				}
+				else
+				{
+					RssiOffset = 8;
+				}
+			}
+#ifdef DOT11_N_SUPPORT			
+#ifdef DOT11N_SS3_SUPPORT
+			/*if (MCS15)*/
+			if ((pTable == RateSwitchTable11BGN3S) ||
+				(pTable == RateSwitchTable11BGN3SForABand) ||
+				(pTable == RateSwitchTable11N3S))
+			{/* N mode with 3 stream  3*3*/
+				if (MCS23 && (Rssi >= (-66+RssiOffset)))
+					TxRateIdx = MCS23;
+				else if (MCS22 && (Rssi >= (-70+RssiOffset)))
+					TxRateIdx = MCS22;
+				else if (MCS21 && (Rssi >= (-72+RssiOffset)))
+					TxRateIdx = MCS21;
+				else if (MCS20 && (Rssi >= (-74+RssiOffset)))
+					TxRateIdx = MCS20;
+				else if (MCS13 && (Rssi >= (-76+RssiOffset)))
+					TxRateIdx = MCS13;
+				else if (MCS12 && (Rssi >= (-78+RssiOffset)))
+					TxRateIdx = MCS12;
+				else if (MCS4 && (Rssi >= (-82+RssiOffset)))
+				TxRateIdx = MCS4;
+				else if (MCS3 && (Rssi >= (-84+RssiOffset)))
+				TxRateIdx = MCS3;
+				else if (MCS2 && (Rssi >= (-86+RssiOffset)))
+				TxRateIdx = MCS2;
+				else if (MCS1 && (Rssi >= (-88+RssiOffset)))
+				TxRateIdx = MCS1;
+			else
+				TxRateIdx = MCS0;
+		}
+		else
+#endif /* DOT11N_SS3_SUPPORT */
+		if ((pTable == RateSwitchTable11BGN2S) || (pTable == RateSwitchTable11BGN2SForABand) ||(pTable == RateSwitchTable11N2S) ||(pTable == RateSwitchTable11N2SForABand)) /* 3*3*/
+			{/* N mode with 2 stream*/
+				if (MCS15 && (Rssi >= (-70+RssiOffset)))
+					TxRateIdx = MCS15;
+				else if (MCS14 && (Rssi >= (-72+RssiOffset)))
+					TxRateIdx = MCS14;
+				else if (MCS13 && (Rssi >= (-76+RssiOffset)))
+					TxRateIdx = MCS13;
+				else if (MCS12 && (Rssi >= (-78+RssiOffset)))
+					TxRateIdx = MCS12;
+				else if (MCS4 && (Rssi >= (-82+RssiOffset)))
+					TxRateIdx = MCS4;
+				else if (MCS3 && (Rssi >= (-84+RssiOffset)))
+					TxRateIdx = MCS3;
+				else if (MCS2 && (Rssi >= (-86+RssiOffset)))
+					TxRateIdx = MCS2;
+				else if (MCS1 && (Rssi >= (-88+RssiOffset)))
+					TxRateIdx = MCS1;
+				else
+					TxRateIdx = MCS0;
+			}
+			else if ((pTable == RateSwitchTable11BGN1S) || (pTable == RateSwitchTable11N1S))
+			{/* N mode with 1 stream*/
+				if (MCS7 && (Rssi > (-72+RssiOffset)))
+					TxRateIdx = MCS7;
+				else if (MCS6 && (Rssi > (-74+RssiOffset)))
+					TxRateIdx = MCS6;
+				else if (MCS5 && (Rssi > (-77+RssiOffset)))
+					TxRateIdx = MCS5;
+				else if (MCS4 && (Rssi > (-79+RssiOffset)))
+					TxRateIdx = MCS4;
+				else if (MCS3 && (Rssi > (-81+RssiOffset)))
+					TxRateIdx = MCS3;
+				else if (MCS2 && (Rssi > (-83+RssiOffset)))
+					TxRateIdx = MCS2;
+				else if (MCS1 && (Rssi > (-86+RssiOffset)))
+					TxRateIdx = MCS1;
+				else
+					TxRateIdx = MCS0;
+			}
+			else
+#endif /* DOT11_N_SUPPORT */
+			{/* Legacy mode*/
+				if (MCS7 && (Rssi > -70))
+					TxRateIdx = MCS7;
+				else if (MCS6 && (Rssi > -74))
+					TxRateIdx = MCS6;
+				else if (MCS5 && (Rssi > -78))
+					TxRateIdx = MCS5;
+				else if (MCS4 && (Rssi > -82))
+					TxRateIdx = MCS4;
+				else if (MCS4 == 0)	/* for B-only mode*/
+					TxRateIdx = MCS3;
+				else if (MCS3 && (Rssi > -85))
+					TxRateIdx = MCS3;
+				else if (MCS2 && (Rssi > -87))
+					TxRateIdx = MCS2;
+				else if (MCS1 && (Rssi > -90))
+					TxRateIdx = MCS1;
+				else
+					TxRateIdx = MCS0;
+			}
+
+
+	/*		if (TxRateIdx != pAd->CommonCfg.TxRateIndex)*/
+			{
+				pEntry->CurrTxRateIndex = TxRateIdx;
+				pNextTxRate = (PRTMP_TX_RATE_SWITCH) &pTable[(pEntry->CurrTxRateIndex+1)*5];
+				MlmeSetTxRate(pAd, pEntry, pNextTxRate);
+			}
+
+			NdisZeroMemory(pEntry->TxQuality, sizeof(USHORT) * MAX_STEP_OF_TX_RATE_SWITCH);
+			NdisZeroMemory(pEntry->PER, sizeof(UCHAR) * MAX_STEP_OF_TX_RATE_SWITCH);
+			pEntry->fLastSecAccordingRSSI = TRUE;
+			/* reset all OneSecTx counters*/
+			RESET_ONE_SEC_TX_CNT(pEntry);
+
+			continue;
+		}
+
+		if (pEntry->fLastSecAccordingRSSI == TRUE)
+		{
+			pEntry->fLastSecAccordingRSSI = FALSE;
+			pEntry->LastSecTxRateChangeAction = 0;
+			/* reset all OneSecTx counters*/
+			RESET_ONE_SEC_TX_CNT(pEntry);
+
+			continue;
+		}
+
+		do
+		{
+			BOOLEAN	bTrainUpDown = FALSE;
+			
+			pEntry->CurrTxRateStableTime ++;
+
+			/* downgrade TX quality if PER >= Rate-Down threshold*/
+			if (TxErrorRatio >= TrainDown)
+			{
+				bTrainUpDown = TRUE;
+				pEntry->TxQuality[CurrRateIdx] = DRS_TX_QUALITY_WORST_BOUND;
+			}
+			/* upgrade TX quality if PER <= Rate-Up threshold*/
+			else if (TxErrorRatio <= TrainUp)
+			{
+				bTrainUpDown = TRUE;
+				bUpgradeQuality = TRUE;
+				if (pEntry->TxQuality[CurrRateIdx])
+					pEntry->TxQuality[CurrRateIdx] --;  /* quality very good in CurrRate*/
+
+				if (pEntry->TxRateUpPenalty)
+					pEntry->TxRateUpPenalty --;
+				else if (pEntry->TxQuality[UpRateIdx])
+					pEntry->TxQuality[UpRateIdx] --;    /* may improve next UP rate's quality*/
+			}
+
+			pEntry->PER[CurrRateIdx] = (UCHAR)TxErrorRatio;
+
+			if (bTrainUpDown)
+			{
+				/* perform DRS - consider TxRate Down first, then rate up.*/
+				if ((CurrRateIdx != DownRateIdx) && (pEntry->TxQuality[CurrRateIdx] >= DRS_TX_QUALITY_WORST_BOUND))
+				{
+					pEntry->CurrTxRateIndex = DownRateIdx;
+				}
+				else if ((CurrRateIdx != UpRateIdx) && (pEntry->TxQuality[UpRateIdx] <= 0))
+				{
+					pEntry->CurrTxRateIndex = UpRateIdx;
+				}
+			}
+		} while (FALSE);
+
+		/* if rate-up happen, clear all bad history of all TX rates*/
+		if (pEntry->CurrTxRateIndex > CurrRateIdx)
+		{
+			pEntry->CurrTxRateStableTime = 0;
+			pEntry->TxRateUpPenalty = 0;
+			pEntry->LastSecTxRateChangeAction = 1; /* rate UP*/
+			NdisZeroMemory(pEntry->TxQuality, sizeof(USHORT) * MAX_STEP_OF_TX_RATE_SWITCH);
+			NdisZeroMemory(pEntry->PER, sizeof(UCHAR) * MAX_STEP_OF_TX_RATE_SWITCH);
+
+			
+			/* For TxRate fast train up*/
+			/* */
+			if (!pAd->StaCfg.StaQuickResponeForRateUpTimerRunning)
+			{
+				RTMPSetTimer(&pAd->StaCfg.StaQuickResponeForRateUpTimer, 100);
+
+				pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = TRUE;
+			}
+			bTxRateChanged = TRUE;
+		}
+		/* if rate-down happen, only clear DownRate's bad history*/
+		else if (pEntry->CurrTxRateIndex < CurrRateIdx)
+		{
+			pEntry->CurrTxRateStableTime = 0;
+			pEntry->TxRateUpPenalty = 0;           /* no penalty*/
+			pEntry->LastSecTxRateChangeAction = 2; /* rate DOWN*/
+			pEntry->TxQuality[pEntry->CurrTxRateIndex] = 0;
+			pEntry->PER[pEntry->CurrTxRateIndex] = 0;
+
+			
+			/* For TxRate fast train down*/
+			/* */
+			if (!pAd->StaCfg.StaQuickResponeForRateUpTimerRunning)
+			{
+				RTMPSetTimer(&pAd->StaCfg.StaQuickResponeForRateUpTimer, 100);
+
+				pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = TRUE;
+			}
+			bTxRateChanged = TRUE;
+		}
+		else
+		{
+			pEntry->LastSecTxRateChangeAction = 0; /* rate no change*/
+			bTxRateChanged = FALSE;
+		}
+
+		pEntry->LastTxOkCount = TxSuccess;
+
+		tmpTxRate = pEntry->CurrTxRateIndex;
+
+		/*turn off RDG when 3s and rx count > tx count*5*/
+#ifdef DOT11N_SS3_SUPPORT
+		if (((pTable == RateSwitchTable11BGN3S) || (pTable == RateSwitchTable11BGN3SForABand) || (pTable == RateSwitchTable11N3S)) &&
+				(pAd->RalinkCounters.OneSecReceivedByteCount > 50000) &&
+				(pAd->RalinkCounters.OneSecTransmittedByteCount > 50000) &&
+				CLIENT_STATUS_TEST_FLAG(pEntry, fCLIENT_STATUS_RDG_CAPABLE))
+		{
+			TX_LINK_CFG_STRUC	TxLinkCfg;
+			ULONG				TxOpThres;
+
+			pTempTxRate = (PRTMP_TX_RATE_SWITCH)(&pTable[(tmpTxRate + 1)*5]);
+			RTMP_IO_READ32(pAd, TX_LINK_CFG, &TxLinkCfg.word);
+
+			if ((pAd->RalinkCounters.OneSecReceivedByteCount > (pAd->RalinkCounters.OneSecTransmittedByteCount * 5)) &&
+				(pTempTxRate->CurrMCS != 23) &&
+				(pTempTxRate->ShortGI != 1))
+			{
+				DBGPRINT_RAW(RT_DEBUG_WARN,("DRS: Rx(%d) > 5*Tx(%d)\n",
+						pAd->RalinkCounters.OneSecReceivedByteCount, pAd->RalinkCounters.OneSecTransmittedByteCount));
+				if (TxLinkCfg.field.TxRDGEn == 1)
+				{
+					TxLinkCfg.field.TxRDGEn = 0;
+					RTMP_IO_WRITE32(pAd, TX_LINK_CFG, TxLinkCfg.word);
+					RTMP_IO_READ32(pAd, TXOP_THRES_CFG, &TxOpThres);
+					TxOpThres |= 0xff00;
+					RTMP_IO_WRITE32(pAd, TXOP_THRES_CFG, TxOpThres);
+					DBGPRINT_RAW(RT_DEBUG_WARN,("DRS: RDG off!\n"));
+				}
+			}
+			else
+			{
+				DBGPRINT_RAW(RT_DEBUG_WARN,("DRS: Rx(%d) <= 5*Tx(%d)\n",
+						pAd->RalinkCounters.OneSecReceivedByteCount, pAd->RalinkCounters.OneSecTransmittedByteCount));
+				if (TxLinkCfg.field.TxRDGEn == 0)
+				{
+					TxLinkCfg.field.TxRDGEn = 1;
+					RTMP_IO_WRITE32(pAd, TX_LINK_CFG, TxLinkCfg.word);
+					RTMP_IO_READ32(pAd, TXOP_THRES_CFG, &TxOpThres);
+					TxOpThres &= 0xffff00ff;
+					RTMP_IO_WRITE32(pAd, TXOP_THRES_CFG, TxOpThres);
+					DBGPRINT_RAW(RT_DEBUG_WARN,("DRS: RDG on!\n"));
+				}
+			}
+		}
+#endif /* DOT11N_SS3_SUPPORT */
+
+		pNextTxRate = (PRTMP_TX_RATE_SWITCH) &pTable[(tmpTxRate+1)*5];
+		if (bTxRateChanged && pNextTxRate)
+		{
+			MlmeSetTxRate(pAd, pEntry, pNextTxRate);
+		}
+
+		/* reset all OneSecTx counters*/
+		RESET_ONE_SEC_TX_CNT(pEntry);
+	}
+}
+
+#ifdef TXBF_SUPPORT
+VOID staETxBFProbing(
+ 	IN PRTMP_ADAPTER pAd,
+	IN 	MAC_TABLE_ENTRY		*pEntry,
+	IN PRTMP_TX_RATE_SWITCH	pNextTxRate)
+{
+		if (pEntry->eTxBfEnCond !=0)
+		{
+			/* if ETXBF_EN_COND is not defined, there are two opportunities to activate the procedure:*/
+			/* 1: mfb changes*/
+			/* 2: timer expires*/
+			if (((pEntry->eTxBfEnCond == 1 || pEntry->eTxBfEnCond == 3) && (pEntry->bfState == READY_FOR_SNDG0 && pEntry->noSndgCnt >= pEntry->noSndgCntThrd))
+			    ||(pEntry->eTxBfEnCond == 2 && pEntry->LastSecTxRateChangeAction !=0))
+			{
+/*to be uncommented!!!				txSndgSameMcs(pAd, pEntry, pNextTxRate->CurrMCS);*/
+			}
+			else if (pEntry->bfState == READY_FOR_SNDG0)
+			{
+				pEntry->noSndgCnt ++;
+			}
+			else
+				pEntry->noSndgCnt = 0;
+		}
+}
+#endif /* TXBF_SUPPORT */
+
+#ifdef NEW_RATE_ADAPT_SUPPORT
+VOID MlmeDynamicTxRateSwitchingAdapt(
+    IN PRTMP_ADAPTER pAd,
+    IN ULONG i)
+{
+	UCHAR			  UpRateIdx = 0, DownRateIdx = 0, CurrRateIdx;
+	ULONG			  AccuTxTotalCnt = 0, TxTotalCnt;
+	ULONG			  TxErrorRatio = 0;
+	BOOLEAN			  bTxRateChanged, bUpgradeQuality = FALSE;
+	PRTMP_TX_RATE_SWITCH_3S	  pCurrTxRate, pNextTxRateIdx;
+	PRTMP_TX_RATE_SWITCH	  pNextTxRate = NULL;
+	PUCHAR			  pTable;
+	UCHAR			  TableSize = 0;
+	UCHAR			  InitTxRateIdx = 0, TrainUp, TrainDown;
+	CHAR			  Rssi, RssiOffset = 0;
+	TX_STA_CNT1_STRUC	  StaTx1;
+	TX_STA_CNT0_STRUC	  TxStaCnt0;
+	ULONG			  TxRetransmit = 0, TxSuccess = 0, TxFailCount = 0;
+	MAC_TABLE_ENTRY		  *pEntry;
+	ULONG			  phyRateLimit20 = 0;
+	UCHAR 			  tmpTxRate = 0;
+	PRTMP_TX_RATE_SWITCH_3S   pTempTxRate = NULL;
+
+#ifdef RALINK_ATE
+	if (ATE_ON(pAd))
+	{
+		return;
+	}
+#endif /* RALINK_ATE */
+
+	pEntry = &pAd->MacTab.Content[i];
+
+	MlmeSelectTxRateTable(pAd, pEntry, &pTable, &TableSize, &InitTxRateIdx);
+
+	if ((pAd->MacTab.Size == 1) || (IS_ENTRY_DLS(pEntry)))
+	{
+		/*Rssi = RTMPMaxRssi(pAd, (CHAR)pAd->StaCfg.RssiSample.AvgRssi0, (CHAR)pAd->StaCfg.RssiSample.AvgRssi1, (CHAR)pAd->StaCfg.RssiSample.AvgRssi2);*/
+		/* Sync with Rory.*/
+
+		if(pAd->Antenna.field.RxPath == 3)
+		{
+			Rssi = ((CHAR)pAd->StaCfg.RssiSample.AvgRssi0 + (CHAR)pAd->StaCfg.RssiSample.AvgRssi1 + (CHAR)pAd->StaCfg.RssiSample.AvgRssi2)/3;
+		}
+		else if(pAd->Antenna.field.RxPath == 2)
+		{
+			Rssi = ((CHAR)pAd->StaCfg.RssiSample.AvgRssi0 + (CHAR)pAd->StaCfg.RssiSample.AvgRssi1)>>1;
+		}
+		else
+		{
+			Rssi = (CHAR)pAd->StaCfg.RssiSample.AvgRssi0;
+		}
+
+		/* Update statistic counter*/
+		RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
+		RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
+		pAd->bUpdateBcnCntDone = TRUE;
+		TxRetransmit = StaTx1.field.TxRetransmit;
+		TxSuccess = StaTx1.field.TxSuccess;
+		TxFailCount = TxStaCnt0.field.TxFailCount;
+		TxTotalCnt = TxRetransmit + TxSuccess + TxFailCount;
+
+		pAd->RalinkCounters.OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
+		pAd->RalinkCounters.OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
+		pAd->RalinkCounters.OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
+		pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
+		pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
+		pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
+
+		/* if no traffic in the past 1-sec period, don't change TX rate,*/
+		/* but clear all bad history. because the bad history may affect the next*/
+		/* Chariot throughput test*/
+		AccuTxTotalCnt = pAd->RalinkCounters.OneSecTxNoRetryOkCount +
+						pAd->RalinkCounters.OneSecTxRetryOkCount +
+						pAd->RalinkCounters.OneSecTxFailCount;
+
+		if (TxTotalCnt)
+			TxErrorRatio = ((TxRetransmit + TxFailCount) * 100) / TxTotalCnt;
+	}
+	else
+	{
+			/*Rssi = RTMPMaxRssi(pAd, (CHAR)pEntry->RssiSample.AvgRssi0, (CHAR)pEntry->RssiSample.AvgRssi1, (CHAR)pEntry->RssiSample.AvgRssi2);*/
+
+			/* Sync with Rory.*/
+			if(pAd->Antenna.field.RxPath == 3)
+			{
+				Rssi = ((CHAR)pEntry->RssiSample.AvgRssi0 + (CHAR)pEntry->RssiSample.AvgRssi1 + (CHAR)pEntry->RssiSample.AvgRssi2)/3;
+			}
+			else if(pAd->Antenna.field.RxPath == 2)
+			{
+				Rssi = ((CHAR)pEntry->RssiSample.AvgRssi0 + (CHAR)pEntry->RssiSample.AvgRssi1)>>1;
+			}
+			else
+			{
+				Rssi = (CHAR)pEntry->RssiSample.AvgRssi0;
+			}
+
+			TxTotalCnt = pEntry->OneSecTxNoRetryOkCount +
+				 pEntry->OneSecTxRetryOkCount +
+				 pEntry->OneSecTxFailCount;
+
+			if (TxTotalCnt)
+				TxErrorRatio = ((pEntry->OneSecTxRetryOkCount + pEntry->OneSecTxFailCount) * 100) / TxTotalCnt;
+	}
+
+
+	CurrRateIdx = pEntry->CurrTxRateIndex;
+
+	if (CurrRateIdx >= TableSize)
+	{
+		CurrRateIdx = TableSize - 1;
+	}
+
+
+#if defined (CONFIG_RALINK_RT2883) || defined (CONFIG_RALINK_RT3883)
+	phyRateLimit20 = pEntry->HTPhyMode.field.BW==BW_20? pAd->CommonCfg.PhyRateLimit: pAd->CommonCfg.PhyRateLimit*13/27;
+#endif
+
+	pCurrTxRate = (PRTMP_TX_RATE_SWITCH_3S) &pTable[(CurrRateIdx+1)*10];
+
+	/* decide the next upgrade rate and downgrade rate, if any*/
+	do
+	{
+		if ((pEntry->HTCapability.MCSSet[2] == 0xff) && (pAd->CommonCfg.TxStream == 3))
+		{
+			switch (pEntry->mcsGroup)
+			{
+				case 0:/*improvement: use round robin mcs when group == 0*/
+					UpRateIdx = pCurrTxRate->upMcs3;
+					if (pEntry->TxQuality[UpRateIdx] > pEntry->TxQuality[pCurrTxRate->upMcs2] && pCurrTxRate->upMcs2 != pCurrTxRate->ItemNo)
+						UpRateIdx = pCurrTxRate->upMcs2;
+
+					if (pEntry->TxQuality[UpRateIdx] > pEntry->TxQuality[pCurrTxRate->upMcs1] && pCurrTxRate->upMcs1 != pCurrTxRate->ItemNo)
+						UpRateIdx = pCurrTxRate->upMcs1;
+					break;
+
+				case 3:
+					UpRateIdx = pCurrTxRate->upMcs3;
+					break;
+
+				case 2:
+					UpRateIdx = pCurrTxRate->upMcs2;
+					break;
+
+				case 1:
+					UpRateIdx = pCurrTxRate->upMcs1;
+					break;
+
+				default:
+					DBGPRINT_RAW(RT_DEBUG_TRACE, ("wrong mcsGroup value\n"));
+					break;
+			}
+
+			if ((pEntry->mcsGroup == 0) && 
+				(((pEntry->TxQuality[pCurrTxRate->upMcs3] > pEntry->TxQuality[pCurrTxRate->upMcs2]) && (pCurrTxRate->upMcs2 != pCurrTxRate->ItemNo)) ||
+					((pEntry->TxQuality[pCurrTxRate->upMcs3] > pEntry->TxQuality[pCurrTxRate->upMcs1]) && (pCurrTxRate->upMcs1 != pCurrTxRate->ItemNo))))
+					DBGPRINT_RAW(RT_DEBUG_TRACE,("DRS: Before- mcsGroup=%d, TxQuality2[%d]=%d,  TxQuality1[%d]=%d, TxQuality0[%d]=%d\n",
+						pEntry->mcsGroup,
+						pCurrTxRate->upMcs3,
+						pEntry->TxQuality[pCurrTxRate->upMcs3],
+						pCurrTxRate->upMcs2,
+						pEntry->TxQuality[pCurrTxRate->upMcs2],
+						pCurrTxRate->upMcs1,
+						pEntry->TxQuality[pCurrTxRate->upMcs1]));
+		}
+		else if ((pEntry->HTCapability.MCSSet[0] == 0xff) &&
+					(pEntry->HTCapability.MCSSet[1] == 0xff) &&
+					(pAd->CommonCfg.TxStream > 1) &&
+					((pAd->CommonCfg.TxStream == 2) || (pEntry->HTCapability.MCSSet[2] == 0x0)))
+		{
+			switch (pEntry->mcsGroup)
+			{
+				case 0:
+					UpRateIdx = pCurrTxRate->upMcs2;
+					if (pEntry->TxQuality[UpRateIdx] > pEntry->TxQuality[pCurrTxRate->upMcs1] && pCurrTxRate->upMcs1 != pCurrTxRate->ItemNo)
+						UpRateIdx = pCurrTxRate->upMcs1;
+					break;
+
+				case 2:
+					UpRateIdx = pCurrTxRate->upMcs2;
+					break;
+
+				case 1:
+					UpRateIdx = pCurrTxRate->upMcs1;
+					break;
+
+				default:
+					DBGPRINT_RAW(RT_DEBUG_TRACE, ("wrong mcsGroup value %d\n", pEntry->mcsGroup));
+					break;
+			}
+
+			if ((pEntry->mcsGroup == 0) && 
+				(pEntry->TxQuality[pCurrTxRate->upMcs2] > pEntry->TxQuality[pCurrTxRate->upMcs1]) &&
+				(pCurrTxRate->upMcs1 != pCurrTxRate->ItemNo))
+			{
+				DBGPRINT_RAW(RT_DEBUG_TRACE,("DRS: Before- mcsGroup=%d,  TxQuality1[%d]=%d, TxQuality0[%d]=%d\n",
+						pEntry->mcsGroup,
+						pCurrTxRate->upMcs2,
+						pEntry->TxQuality[pCurrTxRate->upMcs2],
+						pCurrTxRate->upMcs1,
+						pEntry->TxQuality[pCurrTxRate->upMcs1]));
+			}
+		}
+		else
+		{
+			switch (pEntry->mcsGroup)
+			{
+				case 1:
+				case 0:
+					UpRateIdx = pCurrTxRate->upMcs1;
+					break;
+	
+				default:
+					DBGPRINT_RAW(RT_DEBUG_TRACE, ("wrong mcsGroup value %d\n", pEntry->mcsGroup));
+					break;
+			}
+		}
+
+		if (UpRateIdx == pEntry->CurrTxRateIndex)
+		{
+			pEntry->mcsGroup = 0;
+			break;
+		}
+	
+		if ((pEntry->TxQuality[UpRateIdx] > 0) && (pEntry->mcsGroup > 0))
+		{
+			pEntry->mcsGroup --;
+		}
+		else
+		{
+			break;
+		}
+	} while (1);
+	
+	DownRateIdx = pCurrTxRate->downMcs;
+
+	pCurrTxRate = (PRTMP_TX_RATE_SWITCH_3S) &pTable[(CurrRateIdx+1)*10];/*repeated line and thus redundant!!!*/
+
+	/* Debug Option: Use lower thresholds*/
+	if (pAd->CommonCfg.DebugFlags & DBF_LOW_RA_THRESHOLDS)
+	{
+		TrainUp		= 2;
+		TrainDown	= 10;
+	}
+	else
+#ifdef DOT11_N_SUPPORT
+	if ((Rssi > -65) && (pCurrTxRate->Mode >= MODE_HTMIX) && pEntry->perThrdAdj == 1)
+	{
+		TrainUp		= (pCurrTxRate->TrainUp + (pCurrTxRate->TrainUp >> 1));
+		TrainDown	= (pCurrTxRate->TrainDown + (pCurrTxRate->TrainDown >> 1));
+	}
+	else
+#endif /* DOT11_N_SUPPORT */
+	{
+		TrainUp		= pCurrTxRate->TrainUp;
+		TrainDown	= pCurrTxRate->TrainDown;
+	}
+
+	/*pAd->DrsCounters.LastTimeTxRateChangeAction = pAd->DrsCounters.LastSecTxRateChangeAction;*/
+
+	
+	/* Keep the last time TxRateChangeAction status.*/
+	
+	pEntry->LastTimeTxRateChangeAction = pEntry->LastSecTxRateChangeAction;
+
+#ifdef RELASE_EXCLUDE
+	DBGPRINT(RT_DEBUG_TRACE, ("DRS: TxSuccess=%lu, TxRetransmit=%lu, TxFailCount=%lu, TxErrorRatio=%lu\n",
+			TxSuccess, TxRetransmit, TxFailCount, TxErrorRatio));
+
+	DBGPRINT_RAW(RT_DEBUG_TRACE,("DRS: Before- CurrTxRateIdx=%d, MCS=%d, STBC=%d, ShortGI=%d, Mode=%d, TrainUp=%d, TrainDown=%d, NextUp=%d, NextDown=%d, CurrMCS=%d, mcsGroup=%d, PER=%lu%%, Retry=%lu, NoRetry=%lu\n",
+			CurrRateIdx,
+			pCurrTxRate->CurrMCS,
+			pCurrTxRate->STBC,
+			pCurrTxRate->ShortGI,
+			pCurrTxRate->Mode,
+			TrainUp,
+			TrainDown,
+			UpRateIdx,
+			DownRateIdx,
+			pEntry->HTPhyMode.field.MCS,
+			pEntry->mcsGroup,
+			TxErrorRatio,
+			TxRetransmit,
+			TxSuccess));
+#endif /* RELASE_EXCLUDE */
+
+	if (pEntry->fLastChangeAccordingMfb == TRUE)
+	{
+		pEntry->fLastChangeAccordingMfb = FALSE;
+		pEntry->LastSecTxRateChangeAction = 0;/*not increment or decrement --> set to 0*/
+		DBGPRINT_RAW(RT_DEBUG_TRACE,("DRS: MCS is according to MFB, and ignore tuning this sec \n"));
+		
+		/* reset all OneSecTx counters*/
+		RESET_ONE_SEC_TX_CNT(pEntry);
+/*		continue;*/
+		return;
+	}
+
+	
+	/* CASE 1. when TX samples are fewer than 15, then decide TX rate solely on RSSI*/
+	/*         (criteria copied from RT2500 for Netopia case)*/
+	
+	if (TxTotalCnt <= 15)
+	{
+		CHAR	idx = 0;
+		UCHAR	TxRateIdx;
+		/*UCHAR	MCS0 = 0, MCS1 = 0, MCS2 = 0, MCS3 = 0, MCS4 = 0, MCS7 = 0, MCS12 = 0, MCS13 = 0, MCS14 = 0, MCS15 = 0;*/
+		UCHAR	MCS0 = 0, MCS1 = 0, MCS2 = 0, MCS3 = 0, MCS4 = 0,  MCS5 =0, MCS6 = 0, MCS7 = 0;
+		UCHAR	MCS8 = 0, MCS9 = 0, MCS10 = 0, MCS11 = 0;
+		UCHAR	MCS12 = 0, MCS13 = 0, MCS14 = 0, MCS15 = 0;
+		UCHAR	MCS16 = 0, MCS17 = 0, MCS18 = 0, MCS19 = 0;
+		UCHAR	MCS20 = 0, MCS21 = 0, MCS22 = 0, MCS23 = 0; /* 3*3*/
+
+		/* check the existence and index of each needed MCS*/
+		while (idx < pTable[0])
+		{
+			pCurrTxRate = (PRTMP_TX_RATE_SWITCH_3S) &pTable[(idx+1)*10];
+
+			if (pCurrTxRate->CurrMCS == MCS_0)
+			{
+				MCS0 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_1)
+			{
+				MCS1 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_2)
+			{
+				MCS2 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_3)
+			{
+				MCS3 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_4)
+			{
+				MCS4 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_5)
+			{
+				MCS5 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_6)
+			{
+				MCS6 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_7)
+			{
+				MCS7 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_8 && pAd->CommonCfg.TxStream > 1)
+			{
+				MCS8 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_9 && pAd->CommonCfg.TxStream > 1)
+			{
+				MCS9 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_10 && pAd->CommonCfg.TxStream > 1)
+			{
+				MCS10 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_11 && pAd->CommonCfg.TxStream > 1)
+			{
+				MCS11 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_12 && pAd->CommonCfg.TxStream > 1)
+			{
+				MCS12 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_13 && pAd->CommonCfg.TxStream > 1)
+			{
+				MCS13 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_14 && pAd->CommonCfg.TxStream > 1)
+			{
+				MCS14 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_15 && pAd->CommonCfg.TxStream > 1)
+			{
+				MCS15 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_16 && pAd->CommonCfg.TxStream > 2)
+			{
+				MCS16 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_17 && pAd->CommonCfg.TxStream > 2)
+			{
+				MCS17 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_18 && pAd->CommonCfg.TxStream > 2)
+			{
+				MCS18 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_19 && pAd->CommonCfg.TxStream > 2)
+			{
+				MCS19 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_20 && pAd->CommonCfg.TxStream > 2)
+			{
+				MCS20 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_21 && pAd->CommonCfg.TxStream > 2)
+			{
+				MCS21 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_22 && pAd->CommonCfg.TxStream > 2)
+			{
+				MCS22 = idx;
+			}
+			else if ((pCurrTxRate->CurrMCS == MCS_23) && (pAd->CommonCfg.TxStream > 2) && (pCurrTxRate->ShortGI == GI_800))	/*we hope to use ShortGI as initial rate*/
+			{
+				MCS23 = idx;
+			}
+
+			idx ++;
+		}
+
+		if (pAd->LatchRfRegs.Channel <= 14)
+		{
+			if (pAd->NicConfig2.field.ExternalLNAForG)
+			{
+				RssiOffset = 2;
+			}
+			else if (pTable == RateSwitchTable11N3S)
+			{
+				RssiOffset = 0;
+			}
+			else
+			{
+				RssiOffset = 5;
+			}
+		}
+		else
+		{
+			if (pAd->NicConfig2.field.ExternalLNAForA)
+			{
+				RssiOffset = 5;
+			}
+			else if (pTable == RateSwitchTable11N3S)
+			{
+				RssiOffset = 2;
+			}
+			else
+			{
+				RssiOffset = 8;
+			}
+		}
+
+		/* Debug option: Add 6 dB of margin*/
+		if (pAd->CommonCfg.DebugFlags & DBF_INIT_MCS_MARGIN)
+			RssiOffset += 6;
+
+		/* Debug Option: Disable highest MCSs when picking initial MCS based on RSSI*/
+		if (pAd->CommonCfg.DebugFlags & DBF_INIT_MCS_DIS1)
+			MCS23 = MCS15 = MCS7 = 0;
+		if (pAd->CommonCfg.DebugFlags & DBF_INIT_MCS_DIS2)
+			MCS22 = MCS14 = MCS6 = 0;
+
+		/* Debug Option: If PHY limit disable all PHY > 85. Also check for 65 and 40 Mbps*/
+		if (phyRateLimit20 != 0)
+		{
+			MCS13 = MCS14 = MCS15 = MCS20 = MCS21 = MCS22 = MCS23 = 0;
+
+			if (phyRateLimit20 <= 65)
+				MCS7 = MCS12 = MCS19 = 0;
+
+			if (phyRateLimit20 <= 40)
+				MCS5 = MCS6 = MCS11 = MCS18 = 0;
+
+			if (phyRateLimit20 <= 20)
+				MCS3 = MCS4 = MCS9 = MCS10 = MCS17 = 0;
+		}
+
+#ifdef DOT11_N_SUPPORT
+			/*if (MCS15)*/
+		if ((pTable == RateSwitchTable11BGN3S) ||
+			(pTable == RateSwitchTable11BGN3SForABand) ||
+			(pTable == RateSwitchTable11N3S))
+		{/* N mode with 3 stream  3*3*/
+			/* Note we may be using RateSwitchTable11N3S and have only 1 or 2 TX antennas so we need to handle those cases*/
+			if (MCS23 && (Rssi >= (-64+RssiOffset)))
+				TxRateIdx = MCS23;
+			else if (MCS22 && (Rssi >= (-66+RssiOffset)))
+				TxRateIdx = MCS22;
+			else if (MCS21 && (Rssi >= (-68+RssiOffset)))
+				TxRateIdx = MCS21;
+			else if (MCS15 && (Rssi >= (-70+RssiOffset)))
+				TxRateIdx = MCS15;
+			else if (MCS14 && (Rssi >= (-72+RssiOffset)))
+				TxRateIdx = MCS14;
+			else if (MCS13 && (Rssi >= (-76+RssiOffset)))
+				TxRateIdx = MCS13;
+			else if (MCS12 && (Rssi >= (-78+RssiOffset)))
+				TxRateIdx = MCS12;
+			else if (MCS4 && (Rssi >= (-82+RssiOffset)))
+				TxRateIdx = MCS4;
+			else if (MCS3 && (Rssi >= (-84+RssiOffset)))
+				TxRateIdx = MCS3;
+			else if (MCS2 && (Rssi >= (-86+RssiOffset)))
+				TxRateIdx = MCS2;
+			else if (MCS1 && (Rssi >= (-88+RssiOffset)))
+				TxRateIdx = MCS1;
+			else
+				TxRateIdx = MCS0;
+		}
+/*		else if ((pTable == RateSwitchTable11BGN2S) || (pTable == RateSwitchTable11BGN2SForABand) ||(pTable == RateSwitchTable11N2S) ||(pTable == RateSwitchTable11N2SForABand) || (pTable == RateSwitchTable))*/
+		else if ((pTable == RateSwitchTable11BGN2S) ||
+				(pTable == RateSwitchTable11BGN2SForABand) ||
+				(pTable == RateSwitchTable11N2S) ||
+				(pTable == RateSwitchTable11N2SForABand)) /* 3*3*/
+		{/* N mode with 2 stream*/
+			if (MCS15 && (Rssi >= (-70+RssiOffset)))
+				TxRateIdx = MCS15;
+			else if (MCS14 && (Rssi >= (-72+RssiOffset)))
+				TxRateIdx = MCS14;
+			else if (MCS13 && (Rssi >= (-76+RssiOffset)))
+				TxRateIdx = MCS13;
+			else if (MCS12 && (Rssi >= (-78+RssiOffset)))
+				TxRateIdx = MCS12;
+			else if (MCS4 && (Rssi >= (-82+RssiOffset)))
+				TxRateIdx = MCS4;
+			else if (MCS3 && (Rssi >= (-84+RssiOffset)))
+				TxRateIdx = MCS3;
+			else if (MCS2 && (Rssi >= (-86+RssiOffset)))
+				TxRateIdx = MCS2;
+			else if (MCS1 && (Rssi >= (-88+RssiOffset)))
+				TxRateIdx = MCS1;
+			else
+				TxRateIdx = MCS0;
+		}
+		else if ((pTable == RateSwitchTable11BGN1S) || (pTable == RateSwitchTable11N1S))
+		{/* N mode with 1 stream*/
+			if (MCS7 && (Rssi > (-72+RssiOffset)))
+				TxRateIdx = MCS7;
+			else if (MCS6 && (Rssi > (-74+RssiOffset)))
+				TxRateIdx = MCS6;
+			else if (MCS5 && (Rssi > (-77+RssiOffset)))
+				TxRateIdx = MCS5;
+			else if (MCS4 && (Rssi > (-79+RssiOffset)))
+				TxRateIdx = MCS4;
+			else if (MCS3 && (Rssi > (-81+RssiOffset)))
+				TxRateIdx = MCS3;
+			else if (MCS2 && (Rssi > (-83+RssiOffset)))
+				TxRateIdx = MCS2;
+			else if (MCS1 && (Rssi > (-86+RssiOffset)))
+				TxRateIdx = MCS1;
+			else
+				TxRateIdx = MCS0;
+		}
+		else if (pTable == RateSwitchTable11N3S)
+		{/* N mode with 3 stream*/
+			if ((pEntry->HTCapability.MCSSet[2] == 0xff) && (pAd->CommonCfg.TxStream == 3))
+			{
+				if (MCS23 && (Rssi > (-72+RssiOffset)))
+					TxRateIdx = MCS23;
+				else if (MCS22 && (Rssi > (-74+RssiOffset)))
+					TxRateIdx = MCS22;
+				else if (MCS21 && (Rssi > (-77+RssiOffset)))
+					TxRateIdx = MCS21;
+				else if (MCS20 && (Rssi > (-79+RssiOffset)))
+					TxRateIdx = MCS20;
+				else if (MCS19 && (Rssi > (-81+RssiOffset)))
+					TxRateIdx = MCS19;
+				else if (MCS18 && (Rssi > (-83+RssiOffset)))
+					TxRateIdx = MCS18;
+				else if (MCS17 && (Rssi > (-86+RssiOffset)))
+					TxRateIdx = MCS17;
+				else
+					TxRateIdx = MCS16;
+
+				pEntry->mcsGroup = 3;
+			}
+			else if ((pEntry->HTCapability.MCSSet[0] == 0xff) &&
+					(pEntry->HTCapability.MCSSet[1] == 0xff) &&
+					(pAd->CommonCfg.TxStream > 1) &&
+					((pAd->CommonCfg.TxStream == 2) || (pEntry->HTCapability.MCSSet[2] == 0x0)))
+			{
+				if (MCS15 && (Rssi > (-72+RssiOffset)))
+					TxRateIdx = MCS15;
+				else if (MCS14 && (Rssi > (-74+RssiOffset)))
+					TxRateIdx = MCS14;
+				else if (MCS13 && (Rssi > (-77+RssiOffset)))
+					TxRateIdx = MCS13;
+				else if (MCS12 && (Rssi > (-79+RssiOffset)))
+					TxRateIdx = MCS12;
+				else if (MCS11 && (Rssi > (-81+RssiOffset)))
+					TxRateIdx = MCS11;
+				else if (MCS10 && (Rssi > (-83+RssiOffset)))
+					TxRateIdx = MCS10;
+				else if (MCS9 && (Rssi > (-86+RssiOffset)))
+					TxRateIdx = MCS9;
+				else
+					TxRateIdx = MCS8;
+
+				pEntry->mcsGroup = 2;
+		 	}
+			else
+			{
+				if (MCS7 && (Rssi > (-72+RssiOffset)))
+					TxRateIdx = MCS7;
+				else if (MCS6 && (Rssi > (-74+RssiOffset)))
+					TxRateIdx = MCS6;
+				else if (MCS5 && (Rssi > (-77+RssiOffset)))
+					TxRateIdx = MCS5;
+				else if (MCS4 && (Rssi > (-79+RssiOffset)))
+					TxRateIdx = MCS4;
+				else if (MCS3 && (Rssi > (-81+RssiOffset)))
+					TxRateIdx = MCS3;
+				else if (MCS2 && (Rssi > (-83+RssiOffset)))
+					TxRateIdx = MCS2;
+				else if (MCS1 && (Rssi > (-86+RssiOffset)))
+					TxRateIdx = MCS1;
+				else
+					TxRateIdx = MCS0;
+
+				pEntry->mcsGroup = 1;
+		 	}
+		}
+		else
+#endif /* DOT11_N_SUPPORT */
+		{/* Legacy mode*/
+			if (MCS7 && (Rssi > -70))
+				TxRateIdx = MCS7;
+			else if (MCS6 && (Rssi > -74))
+				TxRateIdx = MCS6;
+			else if (MCS5 && (Rssi > -78))
+				TxRateIdx = MCS5;
+			else if (MCS4 && (Rssi > -82))
+				TxRateIdx = MCS4;
+			else if (MCS4 == 0)	/* for B-only mode*/
+				TxRateIdx = MCS3;
+			else if (MCS3 && (Rssi > -85))
+				TxRateIdx = MCS3;
+			else if (MCS2 && (Rssi > -87))
+				TxRateIdx = MCS2;
+			else if (MCS1 && (Rssi > -90))
+				TxRateIdx = MCS1;
+			else
+				TxRateIdx = MCS0;
+		}
+
+		(pEntry->fewPktsCnt) ++;
+		DBGPRINT(RT_DEBUG_WARN, ("f-s%d\n", pEntry->fewPktsCnt));
+
+		if (pEntry->fewPktsCnt == FEW_PKTS_CNT_THRD)
+		{
+			pEntry->fewPktsCnt = 0;
+		/*	if (TxRateIdx != pAd->CommonCfg.TxRateIndex)*/
+			{
+				pEntry->lastRateIdx = pEntry->CurrTxRateIndex;
+
+				if ((pEntry->HTCapability.MCSSet[2] == 0xff) && (pAd->CommonCfg.TxStream == 3))
+					pEntry->mcsGroup = 3;
+				else if ((pEntry->HTCapability.MCSSet[0] == 0xff) &&
+						(pEntry->HTCapability.MCSSet[1] == 0xff) &&
+						(pAd->CommonCfg.TxStream > 1) &&
+						(pAd->CommonCfg.TxStream == 2 || pEntry->HTCapability.MCSSet[2] == 0x0))
+					pEntry->mcsGroup = 2;
+				else
+					pEntry->mcsGroup = 1;
+
+				pEntry->CurrTxRateIndex = TxRateIdx;
+				pNextTxRate = (PRTMP_TX_RATE_SWITCH) &pTable[(pEntry->CurrTxRateIndex+1)*10];
+
+				MlmeSetTxRate(pAd, pEntry, pNextTxRate);
+				DBGPRINT(RT_DEBUG_WARN, ("c-s%d\n", pNextTxRate->CurrMCS));
+			}
+
+			NdisZeroMemory(pEntry->TxQuality, sizeof(USHORT) * MAX_STEP_OF_TX_RATE_SWITCH);
+			NdisZeroMemory(pEntry->PER, sizeof(UCHAR) * MAX_STEP_OF_TX_RATE_SWITCH);
+			pEntry->fLastSecAccordingRSSI = TRUE;
+	#ifdef RELASE_EXCLUDE
+			DBGPRINT_RAW(RT_DEBUG_TRACE,("DRS: AccuTxTotalCnt <= 15, switch TxRateIndex as (%d) according to RSSI(%d), RssiOffset=%d\n", pEntry->CurrTxRateIndex, Rssi, RssiOffset));
+	#endif /* RELASE_EXCLUDE */
+		}
+
+		/* reset all OneSecTx counters*/
+		RESET_ONE_SEC_TX_CNT(pEntry);
+
+		return;
+	}
+
+	pEntry->fewPktsCnt = 0;
+	if (pEntry->fLastSecAccordingRSSI == TRUE)
+	{
+		pEntry->fLastSecAccordingRSSI = FALSE;
+		pEntry->LastSecTxRateChangeAction = 0;
+#ifdef RELASE_EXCLUDE
+		DBGPRINT_RAW(RT_DEBUG_TRACE,("DRS: MCS is according to RSSI, and ignore tuning this sec \n"));
+#endif /* RELASE_EXCLUDE */
+
+		/* reset all OneSecTx counters*/
+		RESET_ONE_SEC_TX_CNT(pEntry);
+
+		pNextTxRate = (PRTMP_TX_RATE_SWITCH) &pTable[(pEntry->CurrTxRateIndex+1)*10];
+#ifdef TXBF_SUPPORT
+		staETxBFProbing(pAd, pEntry, pNextTxRate);
+#endif /* TXBF_SUPPORT */
+		return;
+	}
+
+	do
+	{
+		BOOLEAN	bTrainUpDown = FALSE;
+
+		pEntry->CurrTxRateStableTime ++;
+
+		/* downgrade TX quality if PER >= Rate-Down threshold*/
+		if (TxErrorRatio >= TrainDown ||
+			(phyRateLimit20!=0 && pCurrTxRate->dataRate>=phyRateLimit20) )
+		{
+			bTrainUpDown = TRUE;
+			pEntry->TxQuality[CurrRateIdx] = DRS_TX_QUALITY_WORST_BOUND;
+		}
+		/* upgrade TX quality if PER <= Rate-Up threshold*/
+		else if (TxErrorRatio <= TrainUp)
+		{
+			bTrainUpDown = TRUE;
+			bUpgradeQuality = TRUE;
+
+			if (pEntry->TxQuality[CurrRateIdx])
+				pEntry->TxQuality[CurrRateIdx] --;  /* quality very good in CurrRate*/
+
+			if (pEntry->TxRateUpPenalty)
+				pEntry->TxRateUpPenalty --;
+			else
+			{
+				if (pEntry->TxQuality[pCurrTxRate->upMcs3] && pCurrTxRate->upMcs3 != CurrRateIdx)
+					pEntry->TxQuality[pCurrTxRate->upMcs3] --;
+
+				if (pEntry->TxQuality[pCurrTxRate->upMcs2] && pCurrTxRate->upMcs2 != CurrRateIdx)
+					pEntry->TxQuality[pCurrTxRate->upMcs2] --;
+
+				if (pEntry->TxQuality[pCurrTxRate->upMcs1] && pCurrTxRate->upMcs1 != CurrRateIdx)
+					pEntry->TxQuality[pCurrTxRate->upMcs1] --;
+
+/*				if (pEntry->TxQuality[UpRateIdx])*/
+/*					pEntry->TxQuality[UpRateIdx] --;     may improve next UP rate's quality*/
+			}
+		}
+		else if (pEntry->mcsGroup > 0)/*even if TxErrorRatio > TrainUp*/
+		{/*moderate per but some groups are not tried*/
+			if (UpRateIdx != 0)
+			{
+				bTrainUpDown = TRUE;
+
+				if (pEntry->TxQuality[CurrRateIdx])
+					pEntry->TxQuality[CurrRateIdx] --;  /* quality very good in CurrRate*/
+
+/*				if (pEntry->TxRateUpPenalty)always == 0, always go to else*/
+/*					pEntry->TxRateUpPenalty --;*/
+				/*else if (pEntry->TxQuality[UpRateIdx])*/
+
+				if (pEntry->TxQuality[UpRateIdx])
+					pEntry->TxQuality[UpRateIdx] --;    /* may improve next UP rate's quality*/
+			}
+		}
+
+		pEntry->PER[CurrRateIdx] = (UCHAR)TxErrorRatio;
+
+		if (bTrainUpDown)
+		{
+			PRTMP_TX_RATE_SWITCH_3S pUpRateIdx = (PRTMP_TX_RATE_SWITCH_3S) &pTable[(UpRateIdx+1)*10];
+
+			/* perform DRS - consider TxRate Down first, then rate up.*/
+			if ((CurrRateIdx != DownRateIdx) && (pEntry->TxQuality[CurrRateIdx] >= DRS_TX_QUALITY_WORST_BOUND))
+			{
+				pEntry->CurrTxRateIndex = DownRateIdx;
+				pEntry->LastSecTxRateChangeAction = 2; /* rate down*/
+			}
+			else if ((CurrRateIdx != UpRateIdx) &&
+					(pEntry->TxQuality[UpRateIdx] <= 0) &&
+					(phyRateLimit20==0 || pUpRateIdx->dataRate<phyRateLimit20))
+			{
+				pEntry->CurrTxRateIndex = UpRateIdx;
+				pEntry->LastSecTxRateChangeAction = 1; /* rate UP*/
+			}
+		}
+	} while (FALSE);
+
+	/* if rate-up happen, clear all bad history of all TX rates*/
+	/*if (pEntry->CurrTxRateIndex > CurrRateIdx)*/
+	if (pEntry->CurrTxRateIndex != CurrRateIdx && pEntry->LastSecTxRateChangeAction == 1)/*ys*/
+	{
+#ifdef RELASE_EXCLUDE
+		DBGPRINT_RAW(RT_DEBUG_TRACE,("DRS: ++TX rate from %d to %d \n", CurrRateIdx, pEntry->CurrTxRateIndex));
+#endif /* RELASE_EXCLUDE */
+		pEntry->CurrTxRateStableTime = 0;
+		pEntry->TxRateUpPenalty = 0;
+		pEntry->LastSecTxRateChangeAction = 1; /* rate UP*/
+/*		NdisZeroMemory(pEntry->TxQuality, sizeof(USHORT) * MAX_STEP_OF_TX_RATE_SWITCH);*/
+		pNextTxRateIdx = (PRTMP_TX_RATE_SWITCH_3S) &pTable[(pEntry->CurrTxRateIndex+1)*10];
+		NdisZeroMemory(pEntry->PER, sizeof(UCHAR) * MAX_STEP_OF_TX_RATE_SWITCH);
+		pEntry->lastRateIdx = CurrRateIdx;
+
+		
+		/* For TxRate fast train up*/
+		
+		if (!pAd->StaCfg.StaQuickResponeForRateUpTimerRunning)
+		{
+			RTMPSetTimer(&pAd->StaCfg.StaQuickResponeForRateUpTimer, 100);
+
+			pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = TRUE;
+		}
+
+		bTxRateChanged = TRUE;
+	}
+	/* if rate-down happen, only clear DownRate's bad history*/
+	/*else if (pEntry->CurrTxRateIndex < CurrRateIdx)*/
+	else if (pEntry->CurrTxRateIndex != CurrRateIdx && pEntry->LastSecTxRateChangeAction == 2)
+	{
+#ifdef RELASE_EXCLUDE
+		DBGPRINT_RAW(RT_DEBUG_TRACE,("DRS: --TX rate from %d to %d \n", CurrRateIdx, pEntry->CurrTxRateIndex));
+#endif /* RELASE_EXCLUDE */
+		pEntry->CurrTxRateStableTime = 0;
+		pEntry->TxRateUpPenalty = 0;           /* no penalty*/
+		pEntry->LastSecTxRateChangeAction = 2; /* rate DOWN*/
+		pEntry->TxQuality[pEntry->CurrTxRateIndex] = 0;
+		pEntry->PER[pEntry->CurrTxRateIndex] = 0;
+		pEntry->lastRateIdx = CurrRateIdx;
+
+		
+		/* For TxRate fast train down*/
+		
+		if (!pAd->StaCfg.StaQuickResponeForRateUpTimerRunning)
+		{
+			RTMPSetTimer(&pAd->StaCfg.StaQuickResponeForRateUpTimer, 100);
+
+			pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = TRUE;
+		}
+		bTxRateChanged = TRUE;
+	}
+	else
+	{
+		pEntry->LastSecTxRateChangeAction = 0; /* rate no change*/
+		bTxRateChanged = FALSE;
+	}
+
+	pEntry->LastTxOkCount = TxSuccess;
+
+	tmpTxRate = pEntry->CurrTxRateIndex;
+
+	/*turn off RDG when 3s and rx count > tx count*5*/
+	if (((pTable == RateSwitchTable11BGN3S) || (pTable == RateSwitchTable11BGN3SForABand) || (pTable == RateSwitchTable11N3S)) &&
+				pAd->RalinkCounters.OneSecReceivedByteCount > 50000 &&
+				pAd->RalinkCounters.OneSecTransmittedByteCount > 50000 &&
+				CLIENT_STATUS_TEST_FLAG(pEntry, fCLIENT_STATUS_RDG_CAPABLE))
+	{
+		TX_LINK_CFG_STRUC	TxLinkCfg;
+		ULONG				TxOpThres;
+
+		pTempTxRate = (PRTMP_TX_RATE_SWITCH)(&pTable[(tmpTxRate + 1)*10]);
+		RTMP_IO_READ32(pAd, TX_LINK_CFG, &TxLinkCfg.word);
+
+		if ((pAd->RalinkCounters.OneSecReceivedByteCount > (pAd->RalinkCounters.OneSecTransmittedByteCount * 5)) &&
+			(pTempTxRate->CurrMCS != 23))
+		{
+			DBGPRINT_RAW(RT_DEBUG_WARN,("DRS: Rx(%d) > 5*Tx(%d)\n",
+						pAd->RalinkCounters.OneSecReceivedByteCount, pAd->RalinkCounters.OneSecTransmittedByteCount));
+
+			if (TxLinkCfg.field.TxRDGEn == 1)
+			{
+				TxLinkCfg.field.TxRDGEn = 0;
+				RTMP_IO_WRITE32(pAd, TX_LINK_CFG, TxLinkCfg.word);
+				RTMP_IO_READ32(pAd, TXOP_THRES_CFG, &TxOpThres);
+				TxOpThres |= 0xff00;
+				RTMP_IO_WRITE32(pAd, TXOP_THRES_CFG, TxOpThres);
+				DBGPRINT_RAW(RT_DEBUG_WARN,("DRS: RDG off!\n"));
+			}
+		}
+		else
+		{
+			DBGPRINT_RAW(RT_DEBUG_WARN,("DRS: Rx(%d) <= 5*Tx(%d)\n",
+						pAd->RalinkCounters.OneSecReceivedByteCount, pAd->RalinkCounters.OneSecTransmittedByteCount));
+
+			if (TxLinkCfg.field.TxRDGEn == 0)
+			{
+				TxLinkCfg.field.TxRDGEn = 1;
+				RTMP_IO_WRITE32(pAd, TX_LINK_CFG, TxLinkCfg.word);
+				RTMP_IO_READ32(pAd, TXOP_THRES_CFG, &TxOpThres);
+				TxOpThres &= 0xffff00ff;
+				RTMP_IO_WRITE32(pAd, TXOP_THRES_CFG, TxOpThres);
+				DBGPRINT_RAW(RT_DEBUG_WARN,("DRS: RDG on!\n"));
+			}
+		}
+	}
+
+	pNextTxRate = (PRTMP_TX_RATE_SWITCH) &pTable[(tmpTxRate+1)*10];
+	if (bTxRateChanged && pNextTxRate)
+	{
+		MlmeSetTxRate(pAd, pEntry, pNextTxRate);
+		DBGPRINT(RT_DEBUG_WARN, ("--s%d\n", pNextTxRate->CurrMCS));
+	}
+
+	/* reset all OneSecTx counters*/
+	RESET_ONE_SEC_TX_CNT(pEntry);
+}
+#endif /* NEW_RATE_ADAPT_SUPPORT */
+
+/*
+	========================================================================
+	Routine Description:
+		Station side, Auto TxRate faster train up timer call back function.
+
+	Arguments:
+		SystemSpecific1			- Not used.
+		FunctionContext			- Pointer to our Adapter context.
+		SystemSpecific2			- Not used.
+		SystemSpecific3			- Not used.
+
+	Return Value:
+		None
+
+	========================================================================
+*/
+VOID StaQuickResponeForRateUpExec(
+	IN PVOID SystemSpecific1, 
+	IN PVOID FunctionContext, 
+	IN PVOID SystemSpecific2, 
+	IN PVOID SystemSpecific3) 
+{
+	PRTMP_ADAPTER			pAd = (PRTMP_ADAPTER)FunctionContext;
+	UCHAR					UpRateIdx = 0, DownRateIdx = 0, CurrRateIdx = 0;
+	ULONG					TxTotalCnt = 0;
+	ULONG					TxErrorRatio = 0;
+	BOOLEAN					bTxRateChanged; /*, bUpgradeQuality = FALSE;*/
+	PRTMP_TX_RATE_SWITCH	pCurrTxRate, pNextTxRate = NULL;
+	PUCHAR					pTable;
+	UCHAR					TableSize = 0;
+	UCHAR					InitTxRateIdx = 0, TrainUp, TrainDown;
+	TX_STA_CNT1_STRUC		StaTx1;
+	TX_STA_CNT0_STRUC		TxStaCnt0;
+	CHAR					Rssi, ratio;
+	ULONG					TxRetransmit = 0, TxSuccess = 0, TxFailCount = 0;
+	MAC_TABLE_ENTRY			*pEntry;
+	ULONG					i;
+#ifdef AGS_SUPPORT
+	AGS_STATISTICS_INFO		AGSStatisticsInfo = {0};
+#endif /* AGS_SUPPORT */
+
+	pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
+
+	/*if (pAd->MacTab.Size == 1)*/
+	{
+		/* Update statistic counter*/
+		RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
+		RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
+
+		TxRetransmit = StaTx1.field.TxRetransmit;
+		TxSuccess = StaTx1.field.TxSuccess;
+		TxFailCount = TxStaCnt0.field.TxFailCount;
+		TxTotalCnt = TxRetransmit + TxSuccess + TxFailCount;
+
+		pAd->RalinkCounters.OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
+		pAd->RalinkCounters.OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
+		pAd->RalinkCounters.OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
+
+#ifdef STATS_COUNT_SUPPORT
+		pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
+		pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
+		pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
+#endif /* STATS_COUNT_SUPPORT */
+	}
+
+    
+    /* walk through MAC table, see if need to change AP's TX rate toward each entry*/
+    
+	for (i = 1; i < MAX_LEN_OF_MAC_TABLE; i++) 
+	{
+		pEntry = &pAd->MacTab.Content[i];
+
+		if (IS_ENTRY_NONE(pEntry))
+			continue;
+
+		/* check if this entry need to switch rate automatically*/
+		if (RTMPCheckEntryEnableAutoRateSwitch(pAd, pEntry) == FALSE)
+			continue;
+
+		MlmeSelectTxRateTable(pAd, pEntry, &pTable, &TableSize, &InitTxRateIdx);
+
+#ifdef NEW_RATE_ADAPT_SUPPORT
+		if (pTable == RateSwitchTable11N3S)
+		{
+			StaQuickResponeForRateUpExecAdapt(pAd, i);
+			continue;
+		}
+
+#endif /* NEW_RATE_ADAPT_SUPPORT */
+
+		if (INFRA_ON(pAd) && (i == 1))
+			Rssi = RTMPMaxRssi(pAd, 
+							   pAd->StaCfg.RssiSample.AvgRssi0, 
+							   pAd->StaCfg.RssiSample.AvgRssi1, 
+							   pAd->StaCfg.RssiSample.AvgRssi2);
+		else
+			Rssi = RTMPMaxRssi(pAd, 
+							   pEntry->RssiSample.AvgRssi0, 
+							   pEntry->RssiSample.AvgRssi1, 
+							   pEntry->RssiSample.AvgRssi2);
+
+	if (pAd->MacTab.Size == 1)
+	{
+		if (TxTotalCnt)
+			TxErrorRatio = ((TxRetransmit + TxFailCount) * 100) / TxTotalCnt;
+
+#ifdef AGS_SUPPORT
+			if (SUPPORT_AGS(pAd))
+			{
+				
+				/* Gather the statistics information*/
+				
+				AGSStatisticsInfo.RSSI = Rssi;
+				AGSStatisticsInfo.TxErrorRatio = TxErrorRatio;
+				AGSStatisticsInfo.AccuTxTotalCnt = TxTotalCnt;
+				AGSStatisticsInfo.TxTotalCnt = TxTotalCnt;
+				AGSStatisticsInfo.TxSuccess = TxSuccess;
+				AGSStatisticsInfo.TxRetransmit = TxRetransmit;
+				AGSStatisticsInfo.TxFailCount = TxFailCount;
+			}
+#endif /* AGS_SUPPORT */
+	}
+	else
+	{
+			TxTotalCnt = pEntry->OneSecTxNoRetryOkCount + 
+				 pEntry->OneSecTxRetryOkCount + 
+				 pEntry->OneSecTxFailCount;
+
+			if (TxTotalCnt)
+				TxErrorRatio = ((pEntry->OneSecTxRetryOkCount + pEntry->OneSecTxFailCount) * 100) / TxTotalCnt;
+
+#ifdef AGS_SUPPORT
+			if (SUPPORT_AGS(pAd))
+			{
+				
+				/* Gather the statistics information*/
+				
+				AGSStatisticsInfo.RSSI = Rssi;
+				AGSStatisticsInfo.TxErrorRatio = TxErrorRatio;
+				AGSStatisticsInfo.AccuTxTotalCnt = TxTotalCnt;
+				AGSStatisticsInfo.TxTotalCnt = TxTotalCnt;
+				AGSStatisticsInfo.TxSuccess = pEntry->OneSecTxNoRetryOkCount;
+				AGSStatisticsInfo.TxRetransmit = pEntry->OneSecTxRetryOkCount;
+				AGSStatisticsInfo.TxFailCount = pEntry->OneSecTxFailCount;
+			}
+#endif /* AGS_SUPPORT */
+	}
+
+		/*CurrRateIdx = pAd->CommonCfg.TxRateIndex;*/
+		/*add by woody*/
+		CurrRateIdx = pEntry->CurrTxRateIndex;
+		
+
+#ifdef AGS_SUPPORT
+		if (AGS_IS_USING(pAd, pTable))
+		{
+			
+			/* The dynamic Tx rate switching for AGS (Adaptive Group Switching)*/
+			
+			StaQuickResponeForRateUpExecAGS(pAd, pEntry, pTable, TableSize, &AGSStatisticsInfo, InitTxRateIdx);
+			
+			continue; /* Skip the remaining procedure of the old Tx rate switching*/
+		}
+#endif /* AGS_SUPPORT */
+
+		/* decide the next upgrade rate and downgrade rate, if any*/
+		if ((CurrRateIdx > 0) && (CurrRateIdx < (TableSize - 1)))
+		{
+			UpRateIdx = CurrRateIdx + 1;
+			DownRateIdx = CurrRateIdx -1;
+		}
+		else if (CurrRateIdx == 0)
+		{
+			UpRateIdx = CurrRateIdx + 1;
+			DownRateIdx = CurrRateIdx;
+		}
+		else if (CurrRateIdx == (TableSize - 1))
+		{
+			UpRateIdx = CurrRateIdx;
+			DownRateIdx = CurrRateIdx - 1;
+		}
+
+	pCurrTxRate = (PRTMP_TX_RATE_SWITCH) &pTable[(CurrRateIdx+1)*5];
+
+#ifdef DOT11_N_SUPPORT
+
+	if ((Rssi > -65) && (pCurrTxRate->Mode >= MODE_HTMIX))
+	{
+		TrainUp		= (pCurrTxRate->TrainUp + (pCurrTxRate->TrainUp >> 1));
+		TrainDown	= (pCurrTxRate->TrainDown + (pCurrTxRate->TrainDown >> 1));
+	}
+	else
+#endif /* DOT11_N_SUPPORT */
+	{
+		TrainUp		= pCurrTxRate->TrainUp;
+		TrainDown	= pCurrTxRate->TrainDown;
+	}
+
+
+	
+	/* CASE 1. when TX samples are fewer than 15, then decide TX rate solely on RSSI*/
+	/*         (criteria copied from RT2500 for Netopia case)*/
+	
+	if (TxTotalCnt <= 12)
+	{
+		NdisZeroMemory(pEntry->TxQuality, sizeof(USHORT) * MAX_STEP_OF_TX_RATE_SWITCH);
+		NdisZeroMemory(pEntry->PER, sizeof(UCHAR) * MAX_STEP_OF_TX_RATE_SWITCH);
+
+		if ((pEntry->LastSecTxRateChangeAction == 1) && (CurrRateIdx != DownRateIdx))
+		{
+			/*pAd->CommonCfg.TxRateIndex = DownRateIdx;*/
+			pEntry->CurrTxRateIndex = DownRateIdx;
+			pEntry->TxQuality[CurrRateIdx] = DRS_TX_QUALITY_WORST_BOUND;
+		}
+		else if ((pEntry->LastSecTxRateChangeAction == 2) && (CurrRateIdx != UpRateIdx))
+		{
+			/*pAd->CommonCfg.TxRateIndex = UpRateIdx;*/
+			pEntry->CurrTxRateIndex = UpRateIdx;
+		}
+
+		pNextTxRate = (PRTMP_TX_RATE_SWITCH) &pTable[(pEntry->CurrTxRateIndex+1)*5];
+		MlmeSetTxRate(pAd, pEntry, pNextTxRate);
+	
+		DBGPRINT_RAW(RT_DEBUG_TRACE,("QuickDRS: TxTotalCnt <= 15, train back to original rate \n"));
+		return;
+	}
+
+	do
+	{
+		ULONG OneSecTxNoRetryOKRationCount;
+
+		if (pEntry->LastTimeTxRateChangeAction == 0)
+			ratio = 5;
+		else
+			ratio = 4;
+
+		/* downgrade TX quality if PER >= Rate-Down threshold*/
+		if (TxErrorRatio >= TrainDown)
+		{
+			pEntry->TxQuality[CurrRateIdx] = DRS_TX_QUALITY_WORST_BOUND;
+		}
+
+		pEntry->PER[CurrRateIdx] = (UCHAR)TxErrorRatio;
+
+		OneSecTxNoRetryOKRationCount = (TxSuccess * ratio);
+
+		/* perform DRS - consider TxRate Down first, then rate up.*/
+		if ((pEntry->LastSecTxRateChangeAction == 1) && (CurrRateIdx != DownRateIdx))
+		{
+			if ((pEntry->LastTxOkCount + 2) >= OneSecTxNoRetryOKRationCount)
+		{
+			/*pAd->CommonCfg.TxRateIndex = DownRateIdx;*/
+			pEntry->CurrTxRateIndex = DownRateIdx;
+				pEntry->TxQuality[CurrRateIdx] = DRS_TX_QUALITY_WORST_BOUND;
+					
+			}
+				
+		}
+		else if ((pEntry->LastSecTxRateChangeAction == 2) && (CurrRateIdx != UpRateIdx))
+		{
+			if ((TxErrorRatio >= 50) || (TxErrorRatio >= TrainDown))
+			{
+					
+			}
+			else if ((pEntry->LastTxOkCount + 2) >= OneSecTxNoRetryOKRationCount)
+			{
+				/*pAd->CommonCfg.TxRateIndex = UpRateIdx;*/
+				pEntry->CurrTxRateIndex = UpRateIdx;
+			}
+		}
+	}while (FALSE);
+
+
+	/* if rate-up happen, clear all bad history of all TX rates*/
+	if (pEntry->CurrTxRateIndex > CurrRateIdx)
+	{
+		pEntry->TxRateUpPenalty = 0;
+		NdisZeroMemory(pEntry->TxQuality, sizeof(USHORT) * MAX_STEP_OF_TX_RATE_SWITCH);
+		NdisZeroMemory(pEntry->PER, sizeof(UCHAR) * MAX_STEP_OF_TX_RATE_SWITCH);
+			bTxRateChanged = TRUE;
+	}
+	/* if rate-down happen, only clear DownRate's bad history*/
+	else if (pEntry->CurrTxRateIndex < CurrRateIdx)
+	{
+		DBGPRINT_RAW(RT_DEBUG_TRACE,("QuickDRS: --TX rate from %d to %d \n", CurrRateIdx, pAd->CommonCfg.TxRateIndex));
+		
+		pEntry->TxRateUpPenalty = 0;           /* no penalty*/
+		pEntry->TxQuality[pEntry->CurrTxRateIndex] = 0;
+		pEntry->PER[pEntry->CurrTxRateIndex] = 0;
+			bTxRateChanged = TRUE;
+	}
+	else
+	{
+		bTxRateChanged = FALSE;
+	}
+
+	pNextTxRate = (PRTMP_TX_RATE_SWITCH) &pTable[(pEntry->CurrTxRateIndex+1)*5];
+	if (bTxRateChanged && pNextTxRate)
+	{
+			MlmeSetTxRate(pAd, pEntry, pNextTxRate);
+	}
+	}
+}
+
+#ifdef NEW_RATE_ADAPT_SUPPORT
+VOID StaQuickResponeForRateUpExecAdapt(
+	IN PRTMP_ADAPTER	pAd,
+	IN ULONG i) 
+{
+	UCHAR					UpRateIdx = 0, DownRateIdx = 0, CurrRateIdx = 0;
+	ULONG					TxTotalCnt;
+	ULONG					TxErrorRatio = 0;
+	BOOLEAN					bTxRateChanged = TRUE; /*, bUpgradeQuality = FALSE;*/
+	PRTMP_TX_RATE_SWITCH_3S	pCurrTxRate;
+	PRTMP_TX_RATE_SWITCH	pNextTxRate = NULL;
+	PUCHAR					pTable;
+	UCHAR					TableSize = 0;
+	UCHAR					InitTxRateIdx = 0, TrainUp, TrainDown;
+	TX_STA_CNT1_STRUC		StaTx1;
+	TX_STA_CNT0_STRUC		TxStaCnt0;
+	CHAR					Rssi, ratio;
+	ULONG					TxRetransmit = 0, TxSuccess = 0, TxFailCount = 0;
+	PMAC_TABLE_ENTRY		pEntry;
+	
+	pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
+
+	pEntry = &pAd->MacTab.Content[i];
+
+	MlmeSelectTxRateTable(pAd, pEntry, &pTable, &TableSize, &InitTxRateIdx);
+
+	/*Rssi = RTMPMaxRssi(pAd, (CHAR)pAd->StaCfg.AvgRssi0, (CHAR)pAd->StaCfg.AvgRssi1, (CHAR)pAd->StaCfg.AvgRssi2);*/
+	/*
+	if (pAd->Antenna.field.TxPath > 1)
+		Rssi = (pAd->StaCfg.RssiSample.AvgRssi0 + pAd->StaCfg.RssiSample.AvgRssi1) >> 1;
+	else
+		Rssi = pAd->StaCfg.RssiSample.AvgRssi0;
+	*/
+		
+	/* Sync with Rory.*/
+	if(pAd->Antenna.field.RxPath == 3)
+	{
+		Rssi = ((CHAR)pAd->StaCfg.RssiSample.AvgRssi0 + (CHAR)pAd->StaCfg.RssiSample.AvgRssi1 + (CHAR)pAd->StaCfg.RssiSample.AvgRssi2)/3;
+	}	
+	else if(pAd->Antenna.field.RxPath == 2)
+	{
+		Rssi = ((CHAR)pAd->StaCfg.RssiSample.AvgRssi0 + (CHAR)pAd->StaCfg.RssiSample.AvgRssi1)>>1;
+	}
+	else
+	{
+		Rssi = (CHAR)pAd->StaCfg.RssiSample.AvgRssi0;
+	}
+
+
+
+	pAd->CommonCfg.TxRateIndex = pEntry->CurrTxRateIndex;
+	CurrRateIdx = pAd->CommonCfg.TxRateIndex;
+	/*CurrRateIdx = pEntry->CurrTxRateIndex;*/
+
+	/*MlmeSelectTxRateTable(pAd, pEntry, &pTable, &TableSize, &InitTxRateIdx);*/
+
+	/* decide the next upgrade rate and downgrade rate, if any*/
+	UpRateIdx = DownRateIdx = pEntry->lastRateIdx;
+
+	pCurrTxRate = (PRTMP_TX_RATE_SWITCH_3S) &pTable[(CurrRateIdx+1)*10];
+
+#ifdef DOT11_N_SUPPORT
+
+	if ((Rssi > -65) && (pCurrTxRate->Mode >= MODE_HTMIX) && pEntry->perThrdAdj == 1)
+	{
+		TrainUp		= (pCurrTxRate->TrainUp + (pCurrTxRate->TrainUp >> 1));
+		TrainDown	= (pCurrTxRate->TrainDown + (pCurrTxRate->TrainDown >> 1));
+	}
+	else
+#endif /* DOT11_N_SUPPORT */
+	{
+		TrainUp		= pCurrTxRate->TrainUp;
+		TrainDown	= pCurrTxRate->TrainDown;
+	}
+
+	if (pAd->MacTab.Size == 1)
+	{
+		/* Update statistic counter*/
+		RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
+		RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
+
+		TxRetransmit = StaTx1.field.TxRetransmit;
+		TxSuccess = StaTx1.field.TxSuccess;
+		TxFailCount = TxStaCnt0.field.TxFailCount;
+		TxTotalCnt = TxRetransmit + TxSuccess + TxFailCount;
+
+		pAd->RalinkCounters.OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
+		pAd->RalinkCounters.OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
+		pAd->RalinkCounters.OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
+		pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
+		pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
+		pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
+
+		if (TxTotalCnt)
+			TxErrorRatio = ((TxRetransmit + TxFailCount) * 100) / TxTotalCnt;
+	}
+	else
+	{
+		TxTotalCnt = pEntry->OneSecTxNoRetryOkCount + 
+				 pEntry->OneSecTxRetryOkCount + 
+				 pEntry->OneSecTxFailCount;
+
+		if (TxTotalCnt)
+			TxErrorRatio = ((pEntry->OneSecTxRetryOkCount + pEntry->OneSecTxFailCount) * 100) / TxTotalCnt;
+	}
+
+	if (pEntry->fLastChangeAccordingMfb == TRUE)
+	{
+		pEntry->fLastChangeAccordingMfb = FALSE;
+		pEntry->LastSecTxRateChangeAction = 0;/*not increment or decrement --> set to 0 */
+		DBGPRINT_RAW(RT_DEBUG_TRACE,("DRS: MCS is according to MFB, and ignore tuning this sec \n"));
+
+		/* reset all OneSecTx counters*/
+		RESET_ONE_SEC_TX_CNT(pEntry);
+		return;
+	}
+
+
+	
+	/* CASE 1. when TX samples are fewer than 15, then decide TX rate solely on RSSI*/
+	/*         (criteria copied from RT2500 for Netopia case)*/
+	
+	if (TxTotalCnt <= 12)
+	{
+		NdisZeroMemory(pAd->DrsCounters.TxQuality, sizeof(USHORT) * MAX_STEP_OF_TX_RATE_SWITCH);
+		NdisZeroMemory(pAd->DrsCounters.PER, sizeof(UCHAR) * MAX_STEP_OF_TX_RATE_SWITCH);
+
+		if ((pAd->DrsCounters.LastSecTxRateChangeAction == 1) && (CurrRateIdx != DownRateIdx))
+		{
+			pAd->CommonCfg.TxRateIndex = DownRateIdx;
+			pAd->DrsCounters.TxQuality[CurrRateIdx] = DRS_TX_QUALITY_WORST_BOUND;
+		}
+		else if ((pAd->DrsCounters.LastSecTxRateChangeAction == 2) && (CurrRateIdx != UpRateIdx))
+		{
+			pAd->CommonCfg.TxRateIndex = UpRateIdx;
+		}
+
+		DBGPRINT_RAW(RT_DEBUG_TRACE,("QuickDRS: TxTotalCnt <= 15, train back to original rate \n"));
+		return;
+	}
+
+	do
+	{
+		ULONG OneSecTxNoRetryOKRationCount;
+
+		if (pAd->DrsCounters.LastTimeTxRateChangeAction == 0)
+			ratio = 5;
+		else
+			ratio = 4;
+
+		/* downgrade TX quality if PER >= Rate-Down threshold*/
+		if (TxErrorRatio >= TrainDown)
+		{
+			pAd->DrsCounters.TxQuality[CurrRateIdx] = DRS_TX_QUALITY_WORST_BOUND;
+		}
+
+		pAd->DrsCounters.PER[CurrRateIdx] = (UCHAR)TxErrorRatio;
+
+		OneSecTxNoRetryOKRationCount = (TxSuccess * ratio);
+
+		/* perform DRS - consider TxRate Down first, then rate up.*/
+		if ((pAd->DrsCounters.LastSecTxRateChangeAction == 1) && (CurrRateIdx != DownRateIdx))
+		{
+			if ((pAd->DrsCounters.LastTxOkCount + 2) >= OneSecTxNoRetryOKRationCount)
+			{
+				pAd->CommonCfg.TxRateIndex = DownRateIdx;
+				pAd->DrsCounters.TxQuality[CurrRateIdx] = DRS_TX_QUALITY_WORST_BOUND;
+					
+			}
+		}
+		else if ((pAd->DrsCounters.LastSecTxRateChangeAction == 2) && (CurrRateIdx != UpRateIdx))
+		{
+			if ((TxErrorRatio >= 50) || (TxErrorRatio >= TrainDown))
+			{
+				if ((pEntry->HTCapability.MCSSet[2] == 0xff) && (pAd->CommonCfg.TxStream == 3))
+					pEntry->mcsGroup = 3;
+				else if ((pEntry->HTCapability.MCSSet[0] == 0xff) &&
+						(pEntry->HTCapability.MCSSet[1] == 0xff) &&
+						(pAd->CommonCfg.TxStream > 1) &&
+						(pAd->CommonCfg.TxStream == 2 || pEntry->HTCapability.MCSSet[2] == 0x0))
+					pEntry->mcsGroup = 2;
+				else
+					pEntry->mcsGroup = 1;
+			}
+			else if ((pAd->DrsCounters.LastTxOkCount + 2) >= OneSecTxNoRetryOKRationCount)
+			{
+				pAd->CommonCfg.TxRateIndex = UpRateIdx;
+			}
+		}
+	}while (FALSE);
+
+
+	if (pEntry->LastSecTxRateChangeAction == 1) 
+	{/*last action is up*/
+		/*looking for the next group with valid mcs*/
+		if (pAd->CommonCfg.TxRateIndex != CurrRateIdx && pEntry->mcsGroup > 0)
+		{/*move back*/
+			pEntry->mcsGroup --;				
+			pCurrTxRate = (PRTMP_TX_RATE_SWITCH_3S) &pTable[(DownRateIdx+1)*10];
+		}
+		/*UpRateIdx is for temp use in this section*/
+		switch (pEntry->mcsGroup)
+		{
+			case 3:
+				UpRateIdx = pCurrTxRate->upMcs3;
+				break;
+
+			case 2:
+				UpRateIdx = pCurrTxRate->upMcs2;
+				break;
+
+			case 1:
+				UpRateIdx = pCurrTxRate->upMcs1;
+				break;
+
+			case 0:
+				UpRateIdx = CurrRateIdx;
+				break;
+
+			default:
+				DBGPRINT_RAW(RT_DEBUG_TRACE, ("wrong mcsGroup value\n"));
+				break;
+		}
+
+		if (UpRateIdx == pAd->CommonCfg.TxRateIndex)
+			pEntry->mcsGroup = 0;
+
+		DBGPRINT_RAW(RT_DEBUG_TRACE,("              QuickDRS: next mcsGroup =%d \n", pEntry->mcsGroup));			
+	}
+
+	/* if rate-up happen, clear all bad history of all TX rates*/
+	if (pAd->CommonCfg.TxRateIndex != CurrRateIdx && pEntry->LastSecTxRateChangeAction == 2)
+	{
+		pAd->DrsCounters.TxRateUpPenalty = 0;
+		NdisZeroMemory(pAd->DrsCounters.TxQuality, sizeof(USHORT) * MAX_STEP_OF_TX_RATE_SWITCH);
+		NdisZeroMemory(pAd->DrsCounters.PER, sizeof(UCHAR) * MAX_STEP_OF_TX_RATE_SWITCH);
+			bTxRateChanged = TRUE;
+	}
+	/* if rate-down happen, only clear DownRate's bad history*/
+	else if (pAd->CommonCfg.TxRateIndex != CurrRateIdx && pEntry->LastSecTxRateChangeAction == 1) 
+	{
+		DBGPRINT_RAW(RT_DEBUG_TRACE,("QuickDRS: --TX rate from %d to %d \n", CurrRateIdx, pAd->CommonCfg.TxRateIndex));
+		
+		pAd->DrsCounters.TxRateUpPenalty = 0;           /* no penalty*/
+		pAd->DrsCounters.TxQuality[pAd->CommonCfg.TxRateIndex] = 0;
+		pAd->DrsCounters.PER[pAd->CommonCfg.TxRateIndex] = 0;
+			bTxRateChanged = TRUE;
+	}
+	else
+	{
+		bTxRateChanged = FALSE;
+	}
+
+	pNextTxRate = (PRTMP_TX_RATE_SWITCH) &pTable[(pAd->CommonCfg.TxRateIndex+1)*10];
+	if (bTxRateChanged && pNextTxRate)
+	{
+			MlmeSetTxRate(pAd, pEntry, pNextTxRate);
+	}
+}
+#endif /* NEW_RATE_ADAPT_SUPPORT */
+
+/*
+	==========================================================================
+	Description:
+		This routine is executed periodically inside MlmePeriodicExec() after 
+		association with an AP.
+		It checks if StaCfg.Psm is consistent with user policy (recorded in
+		StaCfg.WindowsPowerMode). If not, enforce user policy. However, 
+		there're some conditions to consider:
+		1. we don't support power-saving in ADHOC mode, so Psm=PWR_ACTIVE all
+		   the time when Mibss==TRUE
+		2. When link up in INFRA mode, Psm should not be switch to PWR_SAVE
+		   if outgoing traffic available in TxRing or MgmtRing.
+	Output:
+		1. change pAd->StaCfg.Psm to PWR_SAVE or leave it untouched
+
+	IRQL = DISPATCH_LEVEL
+
+	==========================================================================
+ */
+VOID MlmeCheckPsmChange(
+	IN PRTMP_ADAPTER pAd,
+	IN ULONG	Now32)
+{
+	ULONG	PowerMode;
+
+	/* condition -*/
+	/* 1. Psm maybe ON only happen in INFRASTRUCTURE mode*/
+	/* 2. user wants either MAX_PSP or FAST_PSP*/
+	/* 3. but current psm is not in PWR_SAVE*/
+	/* 4. CNTL state machine is not doing SCANning*/
+	/* 5. no TX SUCCESS event for the past 1-sec period*/
+	PowerMode = pAd->StaCfg.WindowsPowerMode;
+
+	if (INFRA_ON(pAd) &&
+		(PowerMode != Ndis802_11PowerModeCAM) &&
+		(pAd->StaCfg.Psm == PWR_ACTIVE) &&
+/*		(! RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS))*/
+		(pAd->Mlme.CntlMachine.CurrState == CNTL_IDLE)
+#ifdef PCIE_PS_SUPPORT
+		&& RTMP_TEST_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP)
+#endif /* PCIE_PS_SUPPORT */
+#ifdef RTMP_MAC_USB
+		&&		(pAd->CountDowntoPsm == 0)
+#endif /* RTMP_MAC_USB */
+		 /*&&
+		(pAd->RalinkCounters.OneSecTxNoRetryOkCount == 0) &&
+		(pAd->RalinkCounters.OneSecTxRetryOkCount == 0)*/)
+	{
+		NdisGetSystemUpTime(&pAd->Mlme.LastSendNULLpsmTime);
+		pAd->RalinkCounters.RxCountSinceLastNULL = 0;
+		RTMP_SET_PSM_BIT(pAd, PWR_SAVE);
+		if (!(pAd->CommonCfg.bAPSDCapable && pAd->CommonCfg.APEdcaParm.bAPSDCapable))
+		{
+			RTMPSendNullFrame(pAd, pAd->CommonCfg.TxRate, (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_WMM_INUSED) ? TRUE:FALSE));
+		}
+		else
+		{
+			RTMPSendNullFrame(pAd, pAd->CommonCfg.TxRate, TRUE);
+		}
+
+	}
+}
+
+/* IRQL = PASSIVE_LEVEL*/
+/* IRQL = DISPATCH_LEVEL*/
+VOID MlmeSetPsmBit(
+	IN PRTMP_ADAPTER pAd, 
+	IN USHORT psm)
+{
+
+	pAd->StaCfg.Psm = psm;	  
+
+	DBGPRINT(RT_DEBUG_TRACE, ("MlmeSetPsmBit = %d\n", psm));
+}
+#endif /* CONFIG_STA_SUPPORT */
+
+/*
+	==========================================================================
+	Description:
+		This routine calculates TxPER, RxPER of the past N-sec period. And 
+		according to the calculation result, ChannelQuality is calculated here 
+		to decide if current AP is still doing the job. 
+
+		If ChannelQuality is not good, a ROAMing attempt may be tried later.
+	Output:
+		StaCfg.ChannelQuality - 0..100
+
+	IRQL = DISPATCH_LEVEL
+
+	NOTE: This routine decide channle quality based on RX CRC error ratio.
+		Caller should make sure a function call to NICUpdateRawCounters(pAd)
+		is performed right before this routine, so that this routine can decide
+		channel quality based on the most up-to-date information
+	==========================================================================
+ */
+VOID MlmeCalculateChannelQuality(
+	IN PRTMP_ADAPTER pAd,
+	IN PMAC_TABLE_ENTRY pMacEntry,
+	IN ULONG Now32)
+{
+	ULONG TxOkCnt, TxCnt, TxPER, TxPRR;
+	ULONG RxCnt, RxPER;
+	UCHAR NorRssi;
+	CHAR  MaxRssi;
+	RSSI_SAMPLE *pRssiSample = NULL;
+	UINT32 OneSecTxNoRetryOkCount = 0;
+	UINT32 OneSecTxRetryOkCount = 0;
+	UINT32 OneSecTxFailCount = 0;
+	UINT32 OneSecRxOkCnt = 0;
+	UINT32 OneSecRxFcsErrCnt = 0;
+	ULONG ChannelQuality = 0;  /* 0..100, Channel Quality Indication for Roaming*/
+#ifdef CONFIG_STA_SUPPORT
+	ULONG BeaconLostTime = pAd->StaCfg.BeaconLostTime;
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef CARRIER_DETECTION_SUPPORT /* Roger sync Carrier*/
+	/* longer beacon lost time when carrier detection enabled*/
+	if (pAd->CommonCfg.CarrierDetect.Enable == TRUE)
+	{
+		BeaconLostTime = pAd->StaCfg.BeaconLostTime + (pAd->StaCfg.BeaconLostTime/2);
+	}
+#endif /* CARRIER_DETECTION_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef CONFIG_STA_SUPPORT
+	if (pAd->OpMode == OPMODE_STA)
+	{
+		pRssiSample = &pAd->StaCfg.RssiSample;
+		OneSecTxNoRetryOkCount = pAd->RalinkCounters.OneSecTxNoRetryOkCount;
+		OneSecTxRetryOkCount = pAd->RalinkCounters.OneSecTxRetryOkCount;
+		OneSecTxFailCount = pAd->RalinkCounters.OneSecTxFailCount;
+		OneSecRxOkCnt = pAd->RalinkCounters.OneSecRxOkCnt;
+		OneSecRxFcsErrCnt = pAd->RalinkCounters.OneSecRxFcsErrCnt;
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	if (pRssiSample == NULL)
+		return;
+	MaxRssi = RTMPMaxRssi(pAd, pRssiSample->LastRssi0,
+								pRssiSample->LastRssi1,
+								pRssiSample->LastRssi2);
+
+	
+	/* calculate TX packet error ratio and TX retry ratio - if too few TX samples, skip TX related statistics*/
+	
+	TxOkCnt = OneSecTxNoRetryOkCount + OneSecTxRetryOkCount;
+	TxCnt = TxOkCnt + OneSecTxFailCount;
+	if (TxCnt < 5) 
+	{
+		TxPER = 0;
+		TxPRR = 0;
+	}
+	else 
+	{
+		TxPER = (OneSecTxFailCount * 100) / TxCnt; 
+		TxPRR = ((TxCnt - OneSecTxNoRetryOkCount) * 100) / TxCnt;
+	}
+
+	
+	/* calculate RX PER - don't take RxPER into consideration if too few sample*/
+	
+	RxCnt = OneSecRxOkCnt + OneSecRxFcsErrCnt;
+	if (RxCnt < 5)
+		RxPER = 0;	
+	else
+		RxPER = (OneSecRxFcsErrCnt * 100) / RxCnt;
+
+	
+	/* decide ChannelQuality based on: 1)last BEACON received time, 2)last RSSI, 3)TxPER, and 4)RxPER*/
+	
+#ifdef CONFIG_STA_SUPPORT
+	if ((pAd->OpMode == OPMODE_STA) &&
+		INFRA_ON(pAd) && 
+		(OneSecTxNoRetryOkCount < 2) && /* no heavy traffic*/
+		RTMP_TIME_AFTER(Now32, pAd->StaCfg.LastBeaconRxTime + BeaconLostTime))
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("BEACON lost > %ld msec with TxOkCnt=%ld -> CQI=0\n", BeaconLostTime * (1000 / OS_HZ) , TxOkCnt)); 
+		ChannelQuality = 0;
+	}
+	else
+#endif /* CONFIG_STA_SUPPORT */
+	{
+		/* Normalize Rssi*/
+		if (MaxRssi > -40)
+			NorRssi = 100;
+		else if (MaxRssi < -90)
+			NorRssi = 0;
+		else
+			NorRssi = (MaxRssi + 90) * 2;
+		
+		/* ChannelQuality = W1*RSSI + W2*TxPRR + W3*RxPER	 (RSSI 0..100), (TxPER 100..0), (RxPER 100..0)*/
+		ChannelQuality = (RSSI_WEIGHTING * NorRssi + 
+								   TX_WEIGHTING * (100 - TxPRR) + 
+								   RX_WEIGHTING* (100 - RxPER)) / 100;
+	}
+
+
+#ifdef CONFIG_STA_SUPPORT
+	if (pAd->OpMode == OPMODE_STA)
+		pAd->Mlme.ChannelQuality = (ChannelQuality > 100) ? 100 : ChannelQuality;
+#endif /* CONFIG_STA_SUPPORT */
+
+	
+}
+
+
+/* IRQL = DISPATCH_LEVEL*/
+VOID MlmeSetTxPreamble(
+	IN PRTMP_ADAPTER pAd, 
+	IN USHORT TxPreamble)
+{
+	AUTO_RSP_CFG_STRUC csr4;
+
+	
+	/* Always use Long preamble before verifiation short preamble functionality works well.*/
+	/* Todo: remove the following line if short preamble functionality works*/
+	
+	/*TxPreamble = Rt802_11PreambleLong;*/
+	
+	RTMP_IO_READ32(pAd, AUTO_RSP_CFG, &csr4.word);
+	if (TxPreamble == Rt802_11PreambleLong)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("MlmeSetTxPreamble (= LONG PREAMBLE)\n"));
+		OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED); 
+		csr4.field.AutoResponderPreamble = 0;
+	}
+	else
+	{
+		/* NOTE: 1Mbps should always use long preamble*/
+		DBGPRINT(RT_DEBUG_TRACE, ("MlmeSetTxPreamble (= SHORT PREAMBLE)\n"));
+		OPSTATUS_SET_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED);
+		csr4.field.AutoResponderPreamble = 1;
+	}
+
+	RTMP_IO_WRITE32(pAd, AUTO_RSP_CFG, csr4.word);
+}
+
+/*
+    ==========================================================================
+    Description:
+        Update basic rate bitmap
+    ==========================================================================
+ */
+ 
+VOID UpdateBasicRateBitmap(
+    IN  PRTMP_ADAPTER   pAdapter)
+{
+    INT  i, j;
+                  /* 1  2  5.5, 11,  6,  9, 12, 18, 24, 36, 48,  54 */
+    UCHAR rate[] = { 2, 4,  11, 22, 12, 18, 24, 36, 48, 72, 96, 108 };
+    UCHAR *sup_p = pAdapter->CommonCfg.SupRate;
+    UCHAR *ext_p = pAdapter->CommonCfg.ExtRate;
+    ULONG bitmap = pAdapter->CommonCfg.BasicRateBitmap;
+
+    /* if A mode, always use fix BasicRateBitMap */
+    /*if (pAdapter->CommonCfg.Channel == PHY_11A)*/
+	if (pAdapter->CommonCfg.Channel > 14)
+	{
+		if (pAdapter->CommonCfg.BasicRateBitmap & 0xF)
+		{
+			/* no 11b rate in 5G band */
+			pAdapter->CommonCfg.BasicRateBitmapOld = \
+										pAdapter->CommonCfg.BasicRateBitmap;
+			pAdapter->CommonCfg.BasicRateBitmap &= (~0xF); /* no 11b */
+		}
+
+		/* force to 6,12,24M in a-band */
+		pAdapter->CommonCfg.BasicRateBitmap |= 0x150; /* 6, 12, 24M */
+    }
+	else
+	{
+		/* no need to modify in 2.4G (bg mixed) */
+		pAdapter->CommonCfg.BasicRateBitmap = \
+										pAdapter->CommonCfg.BasicRateBitmapOld;
+	} /* End of if */
+
+    if (pAdapter->CommonCfg.BasicRateBitmap > 4095)
+    {
+        /* (2 ^ MAX_LEN_OF_SUPPORTED_RATES) -1 */
+        return;
+    } /* End of if */
+
+    for(i=0; i<MAX_LEN_OF_SUPPORTED_RATES; i++)
+    {
+        sup_p[i] &= 0x7f;
+        ext_p[i] &= 0x7f;
+    } /* End of for */
+
+    for(i=0; i<MAX_LEN_OF_SUPPORTED_RATES; i++)
+    {
+        if (bitmap & (1 << i))
+        {
+            for(j=0; j<MAX_LEN_OF_SUPPORTED_RATES; j++)
+            {
+                if (sup_p[j] == rate[i])
+                    sup_p[j] |= 0x80;
+                /* End of if */
+            } /* End of for */
+
+            for(j=0; j<MAX_LEN_OF_SUPPORTED_RATES; j++)
+            {
+                if (ext_p[j] == rate[i])
+                    ext_p[j] |= 0x80;
+                /* End of if */
+            } /* End of for */
+        } /* End of if */
+    } /* End of for */
+} /* End of UpdateBasicRateBitmap */
+
+/* IRQL = PASSIVE_LEVEL*/
+/* IRQL = DISPATCH_LEVEL*/
+/* bLinkUp is to identify the inital link speed.*/
+/* TRUE indicates the rate update at linkup, we should not try to set the rate at 54Mbps.*/
+VOID MlmeUpdateTxRates(
+	IN PRTMP_ADAPTER 		pAd,
+	IN 	BOOLEAN		 		bLinkUp,
+	IN	UCHAR				apidx)
+{
+	int i, num;
+	UCHAR Rate = RATE_6, MaxDesire = RATE_1, MaxSupport = RATE_1;
+	UCHAR MinSupport = RATE_54;
+	ULONG BasicRateBitmap = 0;
+	UCHAR CurrBasicRate = RATE_1;
+	UCHAR *pSupRate, SupRateLen, *pExtRate, ExtRateLen;
+	PHTTRANSMIT_SETTING		pHtPhy = NULL;
+	PHTTRANSMIT_SETTING		pMaxHtPhy = NULL;
+	PHTTRANSMIT_SETTING		pMinHtPhy = NULL;	
+	BOOLEAN 				*auto_rate_cur_p;
+	UCHAR					HtMcs = MCS_AUTO;
+
+	/* find max desired rate*/
+	UpdateBasicRateBitmap(pAd);
+	
+	num = 0;
+	auto_rate_cur_p = NULL;
+	for (i=0; i<MAX_LEN_OF_SUPPORTED_RATES; i++)
+	{
+		switch (pAd->CommonCfg.DesireRate[i] & 0x7f)
+		{
+			case 2:  Rate = RATE_1;   num++;   break;
+			case 4:  Rate = RATE_2;   num++;   break;
+			case 11: Rate = RATE_5_5; num++;   break;
+			case 22: Rate = RATE_11;  num++;   break;
+			case 12: Rate = RATE_6;   num++;   break;
+			case 18: Rate = RATE_9;   num++;   break;
+			case 24: Rate = RATE_12;  num++;   break;
+			case 36: Rate = RATE_18;  num++;   break;
+			case 48: Rate = RATE_24;  num++;   break;
+			case 72: Rate = RATE_36;  num++;   break;
+			case 96: Rate = RATE_48;  num++;   break;
+			case 108: Rate = RATE_54; num++;   break;
+			/*default: Rate = RATE_1;   break;*/
+		}
+		if (MaxDesire < Rate)  MaxDesire = Rate;
+	}
+
+/*===========================================================================*/
+/*===========================================================================*/
+	do
+	{
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			pHtPhy 		= &pAd->StaCfg.HTPhyMode;
+			pMaxHtPhy	= &pAd->StaCfg.MaxHTPhyMode;
+			pMinHtPhy	= &pAd->StaCfg.MinHTPhyMode;		
+
+			auto_rate_cur_p = &pAd->StaCfg.bAutoTxRateSwitch;
+			HtMcs 		= pAd->StaCfg.DesiredTransmitSetting.field.MCS;
+
+			if ((pAd->StaCfg.BssType == BSS_ADHOC) &&
+				(pAd->CommonCfg.PhyMode == PHY_11B) && 
+				(MaxDesire > RATE_11))
+			{
+				MaxDesire = RATE_11;
+			}
+			break;
+		}
+#endif /* CONFIG_STA_SUPPORT */
+	} while(FALSE);
+
+
+	pAd->CommonCfg.MaxDesiredRate = MaxDesire;
+	pMinHtPhy->word = 0;
+	pMaxHtPhy->word = 0;
+	pHtPhy->word = 0;
+
+	/* Auto rate switching is enabled only if more than one DESIRED RATES are */
+	/* specified; otherwise disabled*/
+	if (num <= 1)
+	{
+		/*OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED);*/
+		/*pAd->CommonCfg.bAutoTxRateSwitch	= FALSE;*/
+		*auto_rate_cur_p = FALSE;
+	}
+	else
+	{
+		/*OPSTATUS_SET_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED); */
+		/*pAd->CommonCfg.bAutoTxRateSwitch	= TRUE;*/
+		*auto_rate_cur_p = TRUE;
+	}
+
+	if (HtMcs != MCS_AUTO)
+	{
+		/*OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED);*/
+		/*pAd->CommonCfg.bAutoTxRateSwitch	= FALSE;*/
+		*auto_rate_cur_p = FALSE;
+	}
+	else
+	{
+		/*OPSTATUS_SET_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED); */
+		/*pAd->CommonCfg.bAutoTxRateSwitch	= TRUE;*/
+		*auto_rate_cur_p = TRUE;
+	}
+
+#ifdef CONFIG_STA_SUPPORT
+	if ((ADHOC_ON(pAd) || INFRA_ON(pAd)) && (pAd->OpMode == OPMODE_STA)
+		)
+	{
+		pSupRate = &pAd->StaActive.SupRate[0];
+		pExtRate = &pAd->StaActive.ExtRate[0];
+		SupRateLen = pAd->StaActive.SupRateLen;
+		ExtRateLen = pAd->StaActive.ExtRateLen;
+	}
+	else
+#endif /* CONFIG_STA_SUPPORT */	
+	{
+		pSupRate = &pAd->CommonCfg.SupRate[0];
+		pExtRate = &pAd->CommonCfg.ExtRate[0];
+		SupRateLen = pAd->CommonCfg.SupRateLen;
+		ExtRateLen = pAd->CommonCfg.ExtRateLen;
+	}
+
+	/* find max supported rate*/
+	for (i=0; i<SupRateLen; i++)
+	{
+		switch (pSupRate[i] & 0x7f)
+		{
+			case 2:   Rate = RATE_1;	if (pSupRate[i] & 0x80) BasicRateBitmap |= 0x0001;	 break;
+			case 4:   Rate = RATE_2;	if (pSupRate[i] & 0x80) BasicRateBitmap |= 0x0002;	 break;
+			case 11:  Rate = RATE_5_5;	if (pSupRate[i] & 0x80) BasicRateBitmap |= 0x0004;	 break;
+			case 22:  Rate = RATE_11;	if (pSupRate[i] & 0x80) BasicRateBitmap |= 0x0008;	 break;
+			case 12:  Rate = RATE_6;	/*if (pSupRate[i] & 0x80)*/  BasicRateBitmap |= 0x0010;  break;
+			case 18:  Rate = RATE_9;	if (pSupRate[i] & 0x80) BasicRateBitmap |= 0x0020;	 break;
+			case 24:  Rate = RATE_12;	/*if (pSupRate[i] & 0x80)*/  BasicRateBitmap |= 0x0040;  break;
+			case 36:  Rate = RATE_18;	if (pSupRate[i] & 0x80) BasicRateBitmap |= 0x0080;	 break;
+			case 48:  Rate = RATE_24;	/*if (pSupRate[i] & 0x80)*/  BasicRateBitmap |= 0x0100;  break;
+			case 72:  Rate = RATE_36;	if (pSupRate[i] & 0x80) BasicRateBitmap |= 0x0200;	 break;
+			case 96:  Rate = RATE_48;	if (pSupRate[i] & 0x80) BasicRateBitmap |= 0x0400;	 break;
+			case 108: Rate = RATE_54;	if (pSupRate[i] & 0x80) BasicRateBitmap |= 0x0800;	 break;
+			default:  Rate = RATE_1;	break;
+		}
+		if (MaxSupport < Rate)	MaxSupport = Rate;
+
+		if (MinSupport > Rate) MinSupport = Rate;		
+	}
+	
+	for (i=0; i<ExtRateLen; i++)
+	{
+		switch (pExtRate[i] & 0x7f)
+		{
+			case 2:   Rate = RATE_1;	if (pExtRate[i] & 0x80) BasicRateBitmap |= 0x0001;	 break;
+			case 4:   Rate = RATE_2;	if (pExtRate[i] & 0x80) BasicRateBitmap |= 0x0002;	 break;
+			case 11:  Rate = RATE_5_5;	if (pExtRate[i] & 0x80) BasicRateBitmap |= 0x0004;	 break;
+			case 22:  Rate = RATE_11;	if (pExtRate[i] & 0x80) BasicRateBitmap |= 0x0008;	 break;
+			case 12:  Rate = RATE_6;	/*if (pExtRate[i] & 0x80)*/  BasicRateBitmap |= 0x0010;  break;
+			case 18:  Rate = RATE_9;	if (pExtRate[i] & 0x80) BasicRateBitmap |= 0x0020;	 break;
+			case 24:  Rate = RATE_12;	/*if (pExtRate[i] & 0x80)*/  BasicRateBitmap |= 0x0040;  break;
+			case 36:  Rate = RATE_18;	if (pExtRate[i] & 0x80) BasicRateBitmap |= 0x0080;	 break;
+			case 48:  Rate = RATE_24;	/*if (pExtRate[i] & 0x80)*/  BasicRateBitmap |= 0x0100;  break;
+			case 72:  Rate = RATE_36;	if (pExtRate[i] & 0x80) BasicRateBitmap |= 0x0200;	 break;
+			case 96:  Rate = RATE_48;	if (pExtRate[i] & 0x80) BasicRateBitmap |= 0x0400;	 break;
+			case 108: Rate = RATE_54;	if (pExtRate[i] & 0x80) BasicRateBitmap |= 0x0800;	 break;
+			default:  Rate = RATE_1;	break;
+		}
+		if (MaxSupport < Rate)	MaxSupport = Rate;
+
+		if (MinSupport > Rate) MinSupport = Rate;		
+	}
+
+	RTMP_IO_WRITE32(pAd, LEGACY_BASIC_RATE, BasicRateBitmap);
+	
+	for (i=0; i<MAX_LEN_OF_SUPPORTED_RATES; i++)
+	{
+		if (BasicRateBitmap & (0x01 << i))
+			CurrBasicRate = (UCHAR)i;
+		pAd->CommonCfg.ExpectedACKRate[i] = CurrBasicRate;
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE,("MlmeUpdateTxRates[MaxSupport = %d] = MaxDesire %d Mbps\n", RateIdToMbps[MaxSupport], RateIdToMbps[MaxDesire]));
+	/* max tx rate = min {max desire rate, max supported rate}*/
+	if (MaxSupport < MaxDesire)
+		pAd->CommonCfg.MaxTxRate = MaxSupport;
+	else
+		pAd->CommonCfg.MaxTxRate = MaxDesire;
+
+	pAd->CommonCfg.MinTxRate = MinSupport;
+	/* 2003-07-31 john - 2500 doesn't have good sensitivity at high OFDM rates. to increase the success*/
+	/* ratio of initial DHCP packet exchange, TX rate starts from a lower rate depending*/
+	/* on average RSSI*/
+	/*	 1. RSSI >= -70db, start at 54 Mbps (short distance)*/
+	/*	 2. -70 > RSSI >= -75, start at 24 Mbps (mid distance)*/
+	/*	 3. -75 > RSSI, start at 11 Mbps (long distance)*/
+	if (*auto_rate_cur_p)
+	{
+		short dbm = 0;
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+			dbm = pAd->StaCfg.RssiSample.AvgRssi0 - pAd->BbpRssiToDbmDelta;
+#endif /* CONFIG_STA_SUPPORT */
+		if (bLinkUp == TRUE)
+			pAd->CommonCfg.TxRate = RATE_24;
+		else
+			pAd->CommonCfg.TxRate = pAd->CommonCfg.MaxTxRate; 
+
+		if (dbm < -75)
+			pAd->CommonCfg.TxRate = RATE_11;
+		else if (dbm < -70)
+			pAd->CommonCfg.TxRate = RATE_24;
+
+		/* should never exceed MaxTxRate (consider 11B-only mode)*/
+		if (pAd->CommonCfg.TxRate > pAd->CommonCfg.MaxTxRate)
+			pAd->CommonCfg.TxRate = pAd->CommonCfg.MaxTxRate; 
+
+		pAd->CommonCfg.TxRateIndex = 0;
+
+	}
+	else
+	{
+		pAd->CommonCfg.TxRate = pAd->CommonCfg.MaxTxRate;
+		/*pHtPhy->field.MCS	= (pAd->CommonCfg.MaxTxRate > 3) ? (pAd->CommonCfg.MaxTxRate - 4) : pAd->CommonCfg.MaxTxRate;*/
+		/*pHtPhy->field.MODE	= (pAd->CommonCfg.MaxTxRate > 3) ? MODE_OFDM : MODE_CCK;*/
+
+		/* Choose the Desire Tx MCS in CCK/OFDM mode */
+		if (num > RATE_6)
+		{
+			if (HtMcs <= MCS_7)		
+				MaxDesire = RxwiMCSToOfdmRate[HtMcs];
+			else
+				MaxDesire = MinSupport;
+		}
+		else
+		{
+			if (HtMcs <= MCS_3)		
+				MaxDesire = HtMcs;
+			else
+				MaxDesire = MinSupport;
+		}
+		
+		pAd->MacTab.Content[BSSID_WCID].HTPhyMode.field.STBC	= pHtPhy->field.STBC;
+		pAd->MacTab.Content[BSSID_WCID].HTPhyMode.field.ShortGI	= pHtPhy->field.ShortGI;
+		pAd->MacTab.Content[BSSID_WCID].HTPhyMode.field.MCS		= pHtPhy->field.MCS;
+		pAd->MacTab.Content[BSSID_WCID].HTPhyMode.field.MODE	= pHtPhy->field.MODE;
+
+	}
+
+	if (pAd->CommonCfg.TxRate <= RATE_11)
+	{
+		pMaxHtPhy->field.MODE = MODE_CCK;
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+		pMaxHtPhy->field.MCS = pAd->CommonCfg.TxRate;
+		pMinHtPhy->field.MCS = pAd->CommonCfg.MinTxRate;
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	}
+	else
+	{
+		pMaxHtPhy->field.MODE = MODE_OFDM;
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+		pMaxHtPhy->field.MCS = OfdmRateToRxwiMCS[pAd->CommonCfg.TxRate];
+		if (pAd->CommonCfg.MinTxRate >= RATE_6 && (pAd->CommonCfg.MinTxRate <= RATE_54))
+			{pMinHtPhy->field.MCS = OfdmRateToRxwiMCS[pAd->CommonCfg.MinTxRate];}
+		else
+			{pMinHtPhy->field.MCS = pAd->CommonCfg.MinTxRate;}
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	}
+
+	pHtPhy->word = (pMaxHtPhy->word);
+	if (bLinkUp && (pAd->OpMode == OPMODE_STA))
+	{
+			pAd->MacTab.Content[BSSID_WCID].HTPhyMode.word = pHtPhy->word;
+			pAd->MacTab.Content[BSSID_WCID].MaxHTPhyMode.word = pMaxHtPhy->word;
+			pAd->MacTab.Content[BSSID_WCID].MinHTPhyMode.word = pMinHtPhy->word;
+	}
+	else
+	{
+		switch (pAd->CommonCfg.PhyMode) 
+		{
+			case PHY_11BG_MIXED:
+			case PHY_11B:
+#ifdef DOT11_N_SUPPORT
+			case PHY_11BGN_MIXED:
+#endif /* DOT11_N_SUPPORT */
+				pAd->CommonCfg.MlmeRate = RATE_1;
+				pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_CCK;
+				pAd->CommonCfg.MlmeTransmit.field.MCS = RATE_1;
+				
+/*#ifdef	WIFI_TEST			*/
+				pAd->CommonCfg.RtsRate = RATE_11;
+/*#else*/
+/*				pAd->CommonCfg.RtsRate = RATE_1;*/
+/*#endif*/
+				break;
+			case PHY_11G:
+			case PHY_11A:
+#ifdef DOT11_N_SUPPORT
+			case PHY_11AGN_MIXED:
+			case PHY_11GN_MIXED:
+			case PHY_11N_2_4G:
+			case PHY_11AN_MIXED:
+			case PHY_11N_5G:	
+#endif /* DOT11_N_SUPPORT */
+				pAd->CommonCfg.MlmeRate = RATE_6;
+				pAd->CommonCfg.RtsRate = RATE_6;
+				pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
+				pAd->CommonCfg.MlmeTransmit.field.MCS = OfdmRateToRxwiMCS[pAd->CommonCfg.MlmeRate];
+				break;
+			case PHY_11ABG_MIXED:
+#ifdef DOT11_N_SUPPORT
+			case PHY_11ABGN_MIXED:
+#endif /* DOT11_N_SUPPORT */
+				if (pAd->CommonCfg.Channel <= 14)
+				{
+					pAd->CommonCfg.MlmeRate = RATE_1;
+					pAd->CommonCfg.RtsRate = RATE_1;
+					pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_CCK;
+					pAd->CommonCfg.MlmeTransmit.field.MCS = RATE_1;
+				}
+				else
+				{
+					pAd->CommonCfg.MlmeRate = RATE_6;
+					pAd->CommonCfg.RtsRate = RATE_6;
+					pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
+					pAd->CommonCfg.MlmeTransmit.field.MCS = OfdmRateToRxwiMCS[pAd->CommonCfg.MlmeRate];
+				}
+				break;
+			default: /* error*/
+				pAd->CommonCfg.MlmeRate = RATE_6;
+                        	pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
+				pAd->CommonCfg.MlmeTransmit.field.MCS = OfdmRateToRxwiMCS[pAd->CommonCfg.MlmeRate];
+				pAd->CommonCfg.RtsRate = RATE_1;
+				break;
+		}
+		
+		/* Keep Basic Mlme Rate.*/
+		
+		pAd->MacTab.Content[MCAST_WCID].HTPhyMode.word = pAd->CommonCfg.MlmeTransmit.word;
+		if (pAd->CommonCfg.MlmeTransmit.field.MODE == MODE_OFDM)
+			pAd->MacTab.Content[MCAST_WCID].HTPhyMode.field.MCS = OfdmRateToRxwiMCS[RATE_24];
+		else
+			pAd->MacTab.Content[MCAST_WCID].HTPhyMode.field.MCS = RATE_1;
+		pAd->CommonCfg.BasicMlmeRate = pAd->CommonCfg.MlmeRate;
+
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, (" MlmeUpdateTxRates (MaxDesire=%d, MaxSupport=%d, MaxTxRate=%d, MinRate=%d, Rate Switching =%d)\n", 
+			 RateIdToMbps[MaxDesire], RateIdToMbps[MaxSupport], RateIdToMbps[pAd->CommonCfg.MaxTxRate], RateIdToMbps[pAd->CommonCfg.MinTxRate], 
+			 /*OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED)*/*auto_rate_cur_p));
+	DBGPRINT(RT_DEBUG_TRACE, (" MlmeUpdateTxRates (TxRate=%d, RtsRate=%d, BasicRateBitmap=0x%04lx)\n", 
+			 RateIdToMbps[pAd->CommonCfg.TxRate], RateIdToMbps[pAd->CommonCfg.RtsRate], BasicRateBitmap));
+	DBGPRINT(RT_DEBUG_TRACE, ("MlmeUpdateTxRates (MlmeTransmit=0x%x, MinHTPhyMode=%x, MaxHTPhyMode=0x%x, HTPhyMode=0x%x)\n", 
+			 pAd->CommonCfg.MlmeTransmit.word, pAd->MacTab.Content[BSSID_WCID].MinHTPhyMode.word ,pAd->MacTab.Content[BSSID_WCID].MaxHTPhyMode.word ,pAd->MacTab.Content[BSSID_WCID].HTPhyMode.word ));
+}
+
+#ifdef DOT11_N_SUPPORT
+/*
+	==========================================================================
+	Description:
+		This function update HT Rate setting.
+		Input Wcid value is valid for 2 case :
+		1. it's used for Station in infra mode that copy AP rate to Mactable.
+		2. OR Station 	in adhoc mode to copy peer's HT rate to Mactable. 
+
+	IRQL = DISPATCH_LEVEL
+
+	==========================================================================
+ */
+VOID MlmeUpdateHtTxRates(
+	IN PRTMP_ADAPTER 		pAd,
+	IN	UCHAR				apidx)
+{
+	UCHAR	StbcMcs; /*j, StbcMcs, bitmask;*/
+	CHAR 	i; /* 3*3*/
+	RT_HT_CAPABILITY 	*pRtHtCap = NULL;
+	RT_HT_PHY_INFO		*pActiveHtPhy = NULL;	
+	ULONG		BasicMCS;
+	UCHAR j, bitmask;
+	PRT_HT_PHY_INFO			pDesireHtPhy = NULL;
+	PHTTRANSMIT_SETTING		pHtPhy = NULL;
+	PHTTRANSMIT_SETTING		pMaxHtPhy = NULL;
+	PHTTRANSMIT_SETTING		pMinHtPhy = NULL;	
+	BOOLEAN 				*auto_rate_cur_p;
+	
+	DBGPRINT(RT_DEBUG_TRACE,("MlmeUpdateHtTxRates===> \n"));
+
+	auto_rate_cur_p = NULL;
+
+	do
+	{
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{		
+			pDesireHtPhy	= &pAd->StaCfg.DesiredHtPhyInfo;
+			pActiveHtPhy	= &pAd->StaCfg.DesiredHtPhyInfo;
+			pHtPhy 		= &pAd->StaCfg.HTPhyMode;
+			pMaxHtPhy	= &pAd->StaCfg.MaxHTPhyMode;
+			pMinHtPhy	= &pAd->StaCfg.MinHTPhyMode;		
+
+			auto_rate_cur_p = &pAd->StaCfg.bAutoTxRateSwitch;
+			break;
+		}		
+#endif /* CONFIG_STA_SUPPORT */
+	} while (FALSE);
+
+
+#ifdef CONFIG_STA_SUPPORT	
+	if ((ADHOC_ON(pAd) || INFRA_ON(pAd)) && (pAd->OpMode == OPMODE_STA)
+		)
+	{
+		if (pAd->StaActive.SupportedPhyInfo.bHtEnable == FALSE)
+			return;
+
+		pRtHtCap = &pAd->StaActive.SupportedHtPhy;
+		pActiveHtPhy = &pAd->StaActive.SupportedPhyInfo;
+		StbcMcs = (UCHAR)pAd->MlmeAux.AddHtInfo.AddHtInfo3.StbcMcs;
+		BasicMCS =pAd->MlmeAux.AddHtInfo.MCSSet[0]+(pAd->MlmeAux.AddHtInfo.MCSSet[1]<<8)+(StbcMcs<<16);
+		if ((pAd->CommonCfg.DesiredHtPhy.TxSTBC) && (pRtHtCap->RxSTBC) && (pAd->Antenna.field.TxPath == 2))
+			pMaxHtPhy->field.STBC = STBC_USE;
+		else
+			pMaxHtPhy->field.STBC = STBC_NONE;
+	}
+	else
+#endif /* CONFIG_STA_SUPPORT */
+	{
+		if (pDesireHtPhy->bHtEnable == FALSE)
+			return;
+
+		pRtHtCap = &pAd->CommonCfg.DesiredHtPhy;
+		StbcMcs = (UCHAR)pAd->CommonCfg.AddHTInfo.AddHtInfo3.StbcMcs;
+		BasicMCS = pAd->CommonCfg.AddHTInfo.MCSSet[0]+(pAd->CommonCfg.AddHTInfo.MCSSet[1]<<8)+(StbcMcs<<16);
+		if ((pAd->CommonCfg.DesiredHtPhy.TxSTBC) && (pRtHtCap->RxSTBC) && (pAd->Antenna.field.TxPath == 2))
+			pMaxHtPhy->field.STBC = STBC_USE;
+		else
+			pMaxHtPhy->field.STBC = STBC_NONE;
+	}
+
+	/* Decide MAX ht rate.*/
+	if ((pRtHtCap->GF) && (pAd->CommonCfg.DesiredHtPhy.GF))
+		pMaxHtPhy->field.MODE = MODE_HTGREENFIELD;
+	else
+		pMaxHtPhy->field.MODE = MODE_HTMIX;
+
+    if ((pAd->CommonCfg.DesiredHtPhy.ChannelWidth) && (pRtHtCap->ChannelWidth))
+		pMaxHtPhy->field.BW = BW_40;
+	else
+		pMaxHtPhy->field.BW = BW_20;
+
+    if (pMaxHtPhy->field.BW == BW_20)
+		pMaxHtPhy->field.ShortGI = (pAd->CommonCfg.DesiredHtPhy.ShortGIfor20 & pRtHtCap->ShortGIfor20);
+	else
+		pMaxHtPhy->field.ShortGI = (pAd->CommonCfg.DesiredHtPhy.ShortGIfor40 & pRtHtCap->ShortGIfor40);
+
+	if (pDesireHtPhy->MCSSet[4] != 0)
+	{
+		pMaxHtPhy->field.MCS = 32;	
+	}
+
+	for (i=23; i>=0; i--) /* 3*3*/
+	{ 
+		j = i/8; 
+		bitmask = (1<<(i-(j*8)));
+
+		if ((pActiveHtPhy->MCSSet[j] & bitmask) && (pDesireHtPhy->MCSSet[j] & bitmask))
+		{
+			pMaxHtPhy->field.MCS = i;
+			break;
+		}
+
+		if (i==0)
+			break;
+	}
+
+	/* Copy MIN ht rate.  rt2860???*/
+	pMinHtPhy->field.BW = BW_20;
+	pMinHtPhy->field.MCS = 0;
+	pMinHtPhy->field.STBC = 0;
+	pMinHtPhy->field.ShortGI = 0;
+	/*If STA assigns fixed rate. update to fixed here.*/
+#ifdef CONFIG_STA_SUPPORT
+	if ( (pAd->OpMode == OPMODE_STA) && (pDesireHtPhy->MCSSet[0] != 0xff)
+		)
+	{
+		if (pDesireHtPhy->MCSSet[4] != 0)
+		{
+			pMaxHtPhy->field.MCS = 32;
+			pMinHtPhy->field.MCS = 32;
+			DBGPRINT(RT_DEBUG_TRACE,("MlmeUpdateHtTxRates<=== Use Fixed MCS = %d\n",pMinHtPhy->field.MCS));
+		}
+		
+		for (i=23; (CHAR)i >= 0; i--) /* 3*3*/
+		{	
+			j = i/8;	
+			bitmask = (1<<(i-(j*8)));
+			if ( (pDesireHtPhy->MCSSet[j] & bitmask) && (pActiveHtPhy->MCSSet[j] & bitmask))
+			{
+				pMaxHtPhy->field.MCS = i;
+				pMinHtPhy->field.MCS = i;
+				break;
+			}
+			if (i==0)
+				break;
+		}
+	}
+#endif /* CONFIG_STA_SUPPORT */
+	
+	
+	/* Decide ht rate*/
+	pHtPhy->field.STBC = pMaxHtPhy->field.STBC;
+	pHtPhy->field.BW = pMaxHtPhy->field.BW;
+	pHtPhy->field.MODE = pMaxHtPhy->field.MODE;
+	pHtPhy->field.MCS = pMaxHtPhy->field.MCS;
+	pHtPhy->field.ShortGI = pMaxHtPhy->field.ShortGI;
+
+	/* use default now. rt2860*/
+	if (pDesireHtPhy->MCSSet[0] != 0xff)
+		*auto_rate_cur_p = FALSE;
+	else
+		*auto_rate_cur_p = TRUE;
+	
+	DBGPRINT(RT_DEBUG_TRACE, (" MlmeUpdateHtTxRates<---.AMsduSize = %d  \n", pAd->CommonCfg.DesiredHtPhy.AmsduSize ));
+	DBGPRINT(RT_DEBUG_TRACE,("TX: MCS[0] = %x (choose %d), BW = %d, ShortGI = %d, MODE = %d,  \n", pActiveHtPhy->MCSSet[0],pHtPhy->field.MCS,
+		pHtPhy->field.BW, pHtPhy->field.ShortGI, pHtPhy->field.MODE));
+	DBGPRINT(RT_DEBUG_TRACE,("MlmeUpdateHtTxRates<=== \n"));
+}
+
+
+VOID BATableInit(
+	IN PRTMP_ADAPTER pAd, 
+    IN BA_TABLE *Tab) 
+{
+	int i;
+
+	Tab->numAsOriginator = 0;
+	Tab->numAsRecipient = 0;
+	Tab->numDoneOriginator = 0;
+	NdisAllocateSpinLock(pAd, &pAd->BATabLock);
+	for (i = 0; i < MAX_LEN_OF_BA_REC_TABLE; i++) 
+	{
+		Tab->BARecEntry[i].REC_BA_Status = Recipient_NONE;
+		NdisAllocateSpinLock(pAd, &(Tab->BARecEntry[i].RxReRingLock));
+	}
+	for (i = 0; i < MAX_LEN_OF_BA_ORI_TABLE; i++) 
+	{
+		Tab->BAOriEntry[i].ORI_BA_Status = Originator_NONE;
+	}
+}
+
+VOID BATableExit(
+	IN RTMP_ADAPTER *pAd)
+{
+	int i;
+	
+	for(i=0; i<MAX_LEN_OF_BA_REC_TABLE; i++)
+	{
+		NdisFreeSpinLock(&pAd->BATable.BARecEntry[i].RxReRingLock);
+	}
+	NdisFreeSpinLock(&pAd->BATabLock);
+}
+#endif /* DOT11_N_SUPPORT */
+
+/* IRQL = DISPATCH_LEVEL*/
+VOID MlmeRadioOff(
+	IN PRTMP_ADAPTER pAd)
+{
+	RTMP_MLME_RADIO_OFF(pAd);
+}
+
+/* IRQL = DISPATCH_LEVEL*/
+VOID MlmeRadioOn(
+	IN PRTMP_ADAPTER pAd)
+{	
+	RTMP_MLME_RADIO_ON(pAd);
+}
+
+/* ===========================================================================================*/
+/* bss_table.c*/
+/* ===========================================================================================*/
+
+
+/*! \brief initialize BSS table
+ *	\param p_tab pointer to the table
+ *	\return none
+ *	\pre
+ *	\post
+
+ IRQL = PASSIVE_LEVEL
+ IRQL = DISPATCH_LEVEL
+  
+ */
+VOID BssTableInit(
+	IN BSS_TABLE *Tab) 
+{
+	int i;
+
+	Tab->BssNr = 0;
+    Tab->BssOverlapNr = 0;
+	
+	for (i = 0; i < MAX_LEN_OF_BSS_TABLE; i++) 
+	{
+		UCHAR *pOldAddr = Tab->BssEntry[i].pVarIeFromProbRsp;
+		NdisZeroMemory(&Tab->BssEntry[i], sizeof(BSS_ENTRY));
+		Tab->BssEntry[i].Rssi = -127;	/* initial the rssi as a minimum value */
+		if (pOldAddr)
+		{
+			RTMPZeroMemory(pOldAddr, MAX_VIE_LEN);
+			Tab->BssEntry[i].pVarIeFromProbRsp = pOldAddr;
+		}
+	}
+}
+
+
+/*! \brief search the BSS table by SSID
+ *	\param p_tab pointer to the bss table
+ *	\param ssid SSID string 
+ *	\return index of the table, BSS_NOT_FOUND if not in the table
+ *	\pre
+ *	\post
+ *	\note search by sequential search
+
+ IRQL = DISPATCH_LEVEL
+
+ */
+ULONG BssTableSearch(
+	IN BSS_TABLE *Tab, 
+	IN PUCHAR	 pBssid,
+	IN UCHAR	 Channel) 
+{
+	UCHAR i;
+
+	for (i = 0; i < Tab->BssNr; i++) 
+	{
+		
+		/* Some AP that support A/B/G mode that may used the same BSSID on 11A and 11B/G.*/
+		/* We should distinguish this case.*/
+		/*		*/
+		if ((((Tab->BssEntry[i].Channel <= 14) && (Channel <= 14)) ||
+			 ((Tab->BssEntry[i].Channel > 14) && (Channel > 14))) &&
+			MAC_ADDR_EQUAL(Tab->BssEntry[i].Bssid, pBssid)) 
+		{ 
+			return i;
+		}
+	}
+	return (ULONG)BSS_NOT_FOUND;
+}
+
+ULONG BssSsidTableSearch(
+	IN BSS_TABLE *Tab, 
+	IN PUCHAR	 pBssid,
+	IN PUCHAR	 pSsid,
+	IN UCHAR	 SsidLen,
+	IN UCHAR	 Channel) 
+{
+	UCHAR i;
+
+	for (i = 0; i < Tab->BssNr; i++) 
+	{
+		
+		/* Some AP that support A/B/G mode that may used the same BSSID on 11A and 11B/G.*/
+		/* We should distinguish this case.*/
+		/*		*/
+		if ((((Tab->BssEntry[i].Channel <= 14) && (Channel <= 14)) ||
+			 ((Tab->BssEntry[i].Channel > 14) && (Channel > 14))) &&
+			MAC_ADDR_EQUAL(Tab->BssEntry[i].Bssid, pBssid) &&
+			SSID_EQUAL(pSsid, SsidLen, Tab->BssEntry[i].Ssid, Tab->BssEntry[i].SsidLen)) 
+		{ 
+			return i;
+		}
+	}
+	return (ULONG)BSS_NOT_FOUND;
+}
+
+ULONG BssTableSearchWithSSID(
+	IN BSS_TABLE *Tab, 
+	IN PUCHAR	 Bssid,
+	IN PUCHAR	 pSsid,
+	IN UCHAR	 SsidLen,
+	IN UCHAR	 Channel)
+{
+	UCHAR i;
+
+	for (i = 0; i < Tab->BssNr; i++) 
+	{
+		if ((((Tab->BssEntry[i].Channel <= 14) && (Channel <= 14)) ||
+			((Tab->BssEntry[i].Channel > 14) && (Channel > 14))) &&
+			MAC_ADDR_EQUAL(&(Tab->BssEntry[i].Bssid), Bssid) &&
+			(SSID_EQUAL(pSsid, SsidLen, Tab->BssEntry[i].Ssid, Tab->BssEntry[i].SsidLen) ||
+			(NdisEqualMemory(pSsid, ZeroSsid, SsidLen)) || 
+			(NdisEqualMemory(Tab->BssEntry[i].Ssid, ZeroSsid, Tab->BssEntry[i].SsidLen))))
+		{ 
+			return i;
+		}
+	}
+	return (ULONG)BSS_NOT_FOUND;
+}
+
+
+ULONG BssSsidTableSearchBySSID(
+	IN BSS_TABLE *Tab,
+	IN PUCHAR	 pSsid,
+	IN UCHAR	 SsidLen)
+{
+	UCHAR i;
+
+	for (i = 0; i < Tab->BssNr; i++) 
+	{
+		if (SSID_EQUAL(pSsid, SsidLen, Tab->BssEntry[i].Ssid, Tab->BssEntry[i].SsidLen)) 
+		{ 
+			return i;
+		}
+	}
+	return (ULONG)BSS_NOT_FOUND;
+}
+
+
+/* IRQL = DISPATCH_LEVEL*/
+VOID BssTableDeleteEntry(
+	IN OUT	BSS_TABLE *Tab, 
+	IN		PUCHAR	  pBssid,
+	IN		UCHAR	  Channel)
+{
+	UCHAR i, j;
+
+	for (i = 0; i < Tab->BssNr; i++) 
+	{
+		if ((Tab->BssEntry[i].Channel == Channel) && 
+			(MAC_ADDR_EQUAL(Tab->BssEntry[i].Bssid, pBssid)))
+		{
+			UCHAR *pOldAddr = NULL;
+			
+			for (j = i; j < Tab->BssNr - 1; j++)
+			{
+				pOldAddr = Tab->BssEntry[j].pVarIeFromProbRsp;
+				NdisMoveMemory(&(Tab->BssEntry[j]), &(Tab->BssEntry[j + 1]), sizeof(BSS_ENTRY));
+				if (pOldAddr)
+				{
+					RTMPZeroMemory(pOldAddr, MAX_VIE_LEN);
+					NdisMoveMemory(pOldAddr, 
+								   Tab->BssEntry[j + 1].pVarIeFromProbRsp, 
+								   Tab->BssEntry[j + 1].VarIeFromProbeRspLen);
+					Tab->BssEntry[j].pVarIeFromProbRsp = pOldAddr;
+				}
+			}
+
+			pOldAddr = Tab->BssEntry[Tab->BssNr - 1].pVarIeFromProbRsp;
+			NdisZeroMemory(&(Tab->BssEntry[Tab->BssNr - 1]), sizeof(BSS_ENTRY));
+			if (pOldAddr)
+			{
+				RTMPZeroMemory(pOldAddr, MAX_VIE_LEN);
+				Tab->BssEntry[Tab->BssNr - 1].pVarIeFromProbRsp = pOldAddr;
+			}
+			
+			Tab->BssNr -= 1;
+			return;
+		}
+	}
+}
+
+
+/*! \brief
+ *	\param 
+ *	\return
+ *	\pre
+ *	\post
+	 
+ IRQL = DISPATCH_LEVEL
+ 
+ */
+VOID BssEntrySet(
+	IN PRTMP_ADAPTER	pAd, 
+	OUT BSS_ENTRY *pBss, 
+	IN PUCHAR pBssid, 
+	IN CHAR Ssid[], 
+	IN UCHAR SsidLen, 
+	IN UCHAR BssType, 
+	IN USHORT BeaconPeriod, 
+	IN PCF_PARM pCfParm, 
+	IN USHORT AtimWin, 
+	IN USHORT CapabilityInfo, 
+	IN UCHAR SupRate[], 
+	IN UCHAR SupRateLen,
+	IN UCHAR ExtRate[], 
+	IN UCHAR ExtRateLen,
+	IN HT_CAPABILITY_IE *pHtCapability,
+	IN ADD_HT_INFO_IE *pAddHtInfo,	/* AP might use this additional ht info IE */
+	IN UCHAR			HtCapabilityLen,
+	IN UCHAR			AddHtInfoLen,
+	IN UCHAR			NewExtChanOffset,
+	IN UCHAR Channel,
+	IN CHAR Rssi,
+	IN LARGE_INTEGER TimeStamp,
+	IN UCHAR CkipFlag,
+	IN PEDCA_PARM pEdcaParm,
+	IN PQOS_CAPABILITY_PARM pQosCapability,
+	IN PQBSS_LOAD_PARM pQbssLoad,
+	IN USHORT LengthVIE,	
+	IN PNDIS_802_11_VARIABLE_IEs pVIE) 
+{
+	COPY_MAC_ADDR(pBss->Bssid, pBssid);
+	/* Default Hidden SSID to be TRUE, it will be turned to FALSE after coping SSID*/
+	pBss->Hidden = 1;	
+	if (SsidLen > 0)
+	{
+		/* For hidden SSID AP, it might send beacon with SSID len equal to 0*/
+		/* Or send beacon /probe response with SSID len matching real SSID length,*/
+		/* but SSID is all zero. such as "00-00-00-00" with length 4.*/
+		/* We have to prevent this case overwrite correct table*/
+		if (NdisEqualMemory(Ssid, ZeroSsid, SsidLen) == 0)
+		{
+		    NdisZeroMemory(pBss->Ssid, MAX_LEN_OF_SSID);
+			NdisMoveMemory(pBss->Ssid, Ssid, SsidLen);
+			pBss->SsidLen = SsidLen;
+			pBss->Hidden = 0;
+		}
+	}
+	else
+	{
+		/* avoid  Hidden SSID form beacon to overwirite correct SSID from probe response */
+		if (NdisEqualMemory(pBss->Ssid, ZeroSsid, pBss->SsidLen))
+		{
+			NdisZeroMemory(pBss->Ssid, MAX_LEN_OF_SSID);
+			pBss->SsidLen = 0;
+		}
+	}
+	
+	pBss->BssType = BssType;
+	pBss->BeaconPeriod = BeaconPeriod;
+	if (BssType == BSS_INFRA) 
+	{
+		if (pCfParm->bValid) 
+		{
+			pBss->CfpCount = pCfParm->CfpCount;
+			pBss->CfpPeriod = pCfParm->CfpPeriod;
+			pBss->CfpMaxDuration = pCfParm->CfpMaxDuration;
+			pBss->CfpDurRemaining = pCfParm->CfpDurRemaining;
+		}
+	} 
+	else 
+	{
+		pBss->AtimWin = AtimWin;
+	}
+
+	NdisGetSystemUpTime(&pBss->LastBeaconRxTime);
+	pBss->CapabilityInfo = CapabilityInfo;
+	/* The privacy bit indicate security is ON, it maight be WEP, TKIP or AES*/
+	/* Combine with AuthMode, they will decide the connection methods.*/
+	pBss->Privacy = CAP_IS_PRIVACY_ON(pBss->CapabilityInfo);
+	ASSERT(SupRateLen <= MAX_LEN_OF_SUPPORTED_RATES);
+	if (SupRateLen <= MAX_LEN_OF_SUPPORTED_RATES)		
+		NdisMoveMemory(pBss->SupRate, SupRate, SupRateLen);
+	else		
+		NdisMoveMemory(pBss->SupRate, SupRate, MAX_LEN_OF_SUPPORTED_RATES);	
+	pBss->SupRateLen = SupRateLen;
+	ASSERT(ExtRateLen <= MAX_LEN_OF_SUPPORTED_RATES);
+	if (ExtRateLen > MAX_LEN_OF_SUPPORTED_RATES)
+		ExtRateLen = MAX_LEN_OF_SUPPORTED_RATES;
+	NdisMoveMemory(pBss->ExtRate, ExtRate, ExtRateLen);
+	pBss->NewExtChanOffset = NewExtChanOffset;
+	pBss->ExtRateLen = ExtRateLen;
+	pBss->Channel = Channel;
+	pBss->CentralChannel = Channel;
+	pBss->Rssi = Rssi;
+	/* Update CkipFlag. if not exists, the value is 0x0*/
+	pBss->CkipFlag = CkipFlag;
+
+	/* New for microsoft Fixed IEs*/
+	NdisMoveMemory(pBss->FixIEs.Timestamp, &TimeStamp, 8);
+	pBss->FixIEs.BeaconInterval = BeaconPeriod;
+	pBss->FixIEs.Capabilities = CapabilityInfo;
+
+	/* New for microsoft Variable IEs*/
+	if (LengthVIE != 0)
+	{
+		pBss->VarIELen = LengthVIE;
+		NdisMoveMemory(pBss->VarIEs, pVIE, pBss->VarIELen);
+	}
+	else
+	{
+		pBss->VarIELen = 0;
+	}
+
+	pBss->AddHtInfoLen = 0;
+	pBss->HtCapabilityLen = 0;
+#ifdef DOT11_N_SUPPORT
+	if (HtCapabilityLen> 0)
+	{
+		pBss->HtCapabilityLen = HtCapabilityLen;
+		NdisMoveMemory(&pBss->HtCapability, pHtCapability, HtCapabilityLen);
+		if (AddHtInfoLen > 0)
+		{
+			pBss->AddHtInfoLen = AddHtInfoLen;
+			NdisMoveMemory(&pBss->AddHtInfo, pAddHtInfo, AddHtInfoLen);
+			
+	 			if ((pAddHtInfo->ControlChan > 2)&& (pAddHtInfo->AddHtInfo.ExtChanOffset == EXTCHA_BELOW) && (pHtCapability->HtCapInfo.ChannelWidth == BW_40))
+	 			{
+	 				pBss->CentralChannel = pAddHtInfo->ControlChan - 2;
+	 			}
+	 			else if ((pAddHtInfo->AddHtInfo.ExtChanOffset == EXTCHA_ABOVE) && (pHtCapability->HtCapInfo.ChannelWidth == BW_40))
+				{
+		 				pBss->CentralChannel = pAddHtInfo->ControlChan + 2;
+				}
+		}
+	}
+#endif /* DOT11_N_SUPPORT */
+	
+	BssCipherParse(pBss);
+
+	/* new for QOS*/
+	if (pEdcaParm)
+		NdisMoveMemory(&pBss->EdcaParm, pEdcaParm, sizeof(EDCA_PARM));
+	else
+		pBss->EdcaParm.bValid = FALSE;
+	if (pQosCapability)
+		NdisMoveMemory(&pBss->QosCapability, pQosCapability, sizeof(QOS_CAPABILITY_PARM));
+	else
+		pBss->QosCapability.bValid = FALSE;
+	if (pQbssLoad)
+		NdisMoveMemory(&pBss->QbssLoad, pQbssLoad, sizeof(QBSS_LOAD_PARM));
+	else
+		pBss->QbssLoad.bValid = FALSE;
+
+	{
+		PEID_STRUCT     pEid;
+		USHORT          Length = 0;
+
+
+#ifdef CONFIG_STA_SUPPORT
+		NdisZeroMemory(&pBss->WpaIE.IE[0], MAX_CUSTOM_LEN);
+		NdisZeroMemory(&pBss->RsnIE.IE[0], MAX_CUSTOM_LEN);
+		NdisZeroMemory(&pBss->WpsIE.IE[0], MAX_CUSTOM_LEN);
+#ifdef EXT_BUILD_CHANNEL_LIST
+		NdisZeroMemory(&pBss->CountryString[0], 3);
+		pBss->bHasCountryIE = FALSE;
+#endif /* EXT_BUILD_CHANNEL_LIST */
+#endif /* CONFIG_STA_SUPPORT */
+		pEid = (PEID_STRUCT) pVIE;
+		while ((Length + 2 + (USHORT)pEid->Len) <= LengthVIE)    
+		{
+#define WPS_AP		0x01
+			switch(pEid->Eid)
+			{
+				case IE_WPA:
+					if (NdisEqualMemory(pEid->Octet, WPS_OUI, 4))
+					{
+#ifdef CONFIG_STA_SUPPORT
+						if ((pEid->Len + 2) > MAX_CUSTOM_LEN)
+						{
+							pBss->WpsIE.IELen = 0;
+							break;
+						}
+						pBss->WpsIE.IELen = pEid->Len + 2;
+						NdisMoveMemory(pBss->WpsIE.IE, pEid, pBss->WpsIE.IELen);
+#endif /* CONFIG_STA_SUPPORT */
+						break;
+					}
+#ifdef CONFIG_STA_SUPPORT
+					if (NdisEqualMemory(pEid->Octet, WPA_OUI, 4))
+					{
+						if ((pEid->Len + 2) > MAX_CUSTOM_LEN)
+						{
+							pBss->WpaIE.IELen = 0;
+							break;
+						}
+						pBss->WpaIE.IELen = pEid->Len + 2;
+						NdisMoveMemory(pBss->WpaIE.IE, pEid, pBss->WpaIE.IELen);
+					}
+#endif /* CONFIG_STA_SUPPORT */
+					break;
+
+#ifdef CONFIG_STA_SUPPORT
+				case IE_RSN:
+					if (NdisEqualMemory(pEid->Octet + 2, RSN_OUI, 3))
+					{
+						if ((pEid->Len + 2) > MAX_CUSTOM_LEN)
+						{
+							pBss->RsnIE.IELen = 0;
+							break;
+						}
+						pBss->RsnIE.IELen = pEid->Len + 2;
+						NdisMoveMemory(pBss->RsnIE.IE, pEid, pBss->RsnIE.IELen);
+					}
+					break;
+#ifdef EXT_BUILD_CHANNEL_LIST					
+				case IE_COUNTRY:					
+					NdisMoveMemory(&pBss->CountryString[0], pEid->Octet, 3);
+					pBss->bHasCountryIE = TRUE;
+					break;
+#endif /* EXT_BUILD_CHANNEL_LIST */
+#endif /* CONFIG_STA_SUPPORT */
+			}
+			Length = Length + 2 + (USHORT)pEid->Len;  /* Eid[1] + Len[1]+ content[Len]*/
+			pEid = (PEID_STRUCT)((UCHAR*)pEid + 2 + pEid->Len);        
+		}
+	}
+}
+
+/*! 
+ *	\brief insert an entry into the bss table
+ *	\param p_tab The BSS table
+ *	\param Bssid BSSID
+ *	\param ssid SSID
+ *	\param ssid_len Length of SSID
+ *	\param bss_type
+ *	\param beacon_period
+ *	\param timestamp
+ *	\param p_cf
+ *	\param atim_win
+ *	\param cap
+ *	\param rates
+ *	\param rates_len
+ *	\param channel_idx
+ *	\return none
+ *	\pre
+ *	\post
+ *	\note If SSID is identical, the old entry will be replaced by the new one
+	 
+ IRQL = DISPATCH_LEVEL
+ 
+ */
+ULONG BssTableSetEntry(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT BSS_TABLE *Tab, 
+	IN PUCHAR pBssid, 
+	IN CHAR Ssid[], 
+	IN UCHAR SsidLen, 
+	IN UCHAR BssType, 
+	IN USHORT BeaconPeriod, 
+	IN CF_PARM *CfParm, 
+	IN USHORT AtimWin, 
+	IN USHORT CapabilityInfo, 
+	IN UCHAR SupRate[],
+	IN UCHAR SupRateLen,
+	IN UCHAR ExtRate[],
+	IN UCHAR ExtRateLen,
+	IN HT_CAPABILITY_IE *pHtCapability,
+	IN ADD_HT_INFO_IE *pAddHtInfo,	/* AP might use this additional ht info IE */
+	IN UCHAR			HtCapabilityLen,
+	IN UCHAR			AddHtInfoLen,
+	IN UCHAR			NewExtChanOffset,
+	IN UCHAR ChannelNo,
+	IN CHAR Rssi,
+	IN LARGE_INTEGER TimeStamp,
+	IN UCHAR CkipFlag,
+	IN PEDCA_PARM pEdcaParm,
+	IN PQOS_CAPABILITY_PARM pQosCapability,
+	IN PQBSS_LOAD_PARM pQbssLoad,
+	IN USHORT LengthVIE,	
+	IN PNDIS_802_11_VARIABLE_IEs pVIE)
+{
+	ULONG	Idx;
+
+	/*Idx = BssTableSearchWithSSID(Tab, pBssid,  (UCHAR *)Ssid, SsidLen, ChannelNo);*/
+	Idx = BssTableSearch(Tab, pBssid, ChannelNo);
+	if (Idx == BSS_NOT_FOUND) 
+	{
+		if (Tab->BssNr >= MAX_LEN_OF_BSS_TABLE)
+	    {
+			
+			/* It may happen when BSS Table was full.*/
+			/* The desired AP will not be added into BSS Table*/
+			/* In this case, if we found the desired AP then overwrite BSS Table.*/
+			
+			if(!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED) ||
+				!OPSTATUS_TEST_FLAG(pAd, fOP_AP_STATUS_MEDIA_STATE_CONNECTED))
+			{
+				if (MAC_ADDR_EQUAL(pAd->MlmeAux.Bssid, pBssid) ||
+					SSID_EQUAL(pAd->MlmeAux.Ssid, pAd->MlmeAux.SsidLen, Ssid, SsidLen)
+#ifdef APCLI_SUPPORT
+					|| MAC_ADDR_EQUAL(pAd->ApCliMlmeAux.Bssid, pBssid)
+					|| SSID_EQUAL(pAd->ApCliMlmeAux.Ssid, pAd->ApCliMlmeAux.SsidLen, Ssid, SsidLen)
+#endif /* APCLI_SUPPORT */
+					)
+				{
+					Idx = Tab->BssOverlapNr;
+					BssEntrySet(pAd, &Tab->BssEntry[Idx], pBssid, Ssid, SsidLen, BssType, BeaconPeriod, CfParm, AtimWin, 
+						CapabilityInfo, SupRate, SupRateLen, ExtRate, ExtRateLen,pHtCapability, pAddHtInfo,HtCapabilityLen, AddHtInfoLen,
+						NewExtChanOffset, ChannelNo, Rssi, TimeStamp, CkipFlag, pEdcaParm, pQosCapability, pQbssLoad, LengthVIE, pVIE);
+					Tab->BssOverlapNr = Tab->BssOverlapNr + 1;
+                    Tab->BssOverlapNr = Tab->BssOverlapNr % MAX_LEN_OF_BSS_TABLE;
+				}
+				return Idx;
+			}
+			else
+			{
+			return BSS_NOT_FOUND;
+			}
+		}
+		Idx = Tab->BssNr;
+		BssEntrySet(pAd, &Tab->BssEntry[Idx], pBssid, Ssid, SsidLen, BssType, BeaconPeriod, CfParm, AtimWin, 
+					CapabilityInfo, SupRate, SupRateLen, ExtRate, ExtRateLen,pHtCapability, pAddHtInfo,HtCapabilityLen, AddHtInfoLen,
+					NewExtChanOffset, ChannelNo, Rssi, TimeStamp, CkipFlag, pEdcaParm, pQosCapability, pQbssLoad, LengthVIE, pVIE);
+		Tab->BssNr++;
+	} 
+	else
+	{
+		BssEntrySet(pAd, &Tab->BssEntry[Idx], pBssid, Ssid, SsidLen, BssType, BeaconPeriod,CfParm, AtimWin, 
+					CapabilityInfo, SupRate, SupRateLen, ExtRate, ExtRateLen,pHtCapability, pAddHtInfo,HtCapabilityLen, AddHtInfoLen,
+					NewExtChanOffset, ChannelNo, Rssi, TimeStamp, CkipFlag, pEdcaParm, pQosCapability, pQbssLoad, LengthVIE, pVIE);
+	}
+
+	return Idx;
+}
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef DOT11_N_SUPPORT
+#ifdef DOT11N_DRAFT3
+VOID  TriEventInit(
+	IN	PRTMP_ADAPTER	pAd) 
+{
+	UCHAR		i;
+
+	for (i = 0;i < MAX_TRIGGER_EVENT;i++)
+		pAd->CommonCfg.TriggerEventTab.EventA[i].bValid = FALSE;
+	
+	pAd->CommonCfg.TriggerEventTab.EventANo = 0;
+	pAd->CommonCfg.TriggerEventTab.EventBCountDown = 0;
+}
+
+INT TriEventTableSetEntry(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT TRIGGER_EVENT_TAB *Tab, 
+	IN PUCHAR pBssid, 
+	IN HT_CAPABILITY_IE *pHtCapability,
+	IN UCHAR			HtCapabilityLen,
+	IN UCHAR			RegClass,
+	IN UCHAR ChannelNo)
+{
+	/* Event A, legacy AP exist.*/
+	if (HtCapabilityLen == 0)
+	{
+		UCHAR index;
+		
+		/*
+			Check if we already set this entry in the Event Table.
+		*/
+		for (index = 0; index<MAX_TRIGGER_EVENT; index++)
+		{
+			if ((Tab->EventA[index].bValid == TRUE) && 
+				(Tab->EventA[index].Channel == ChannelNo) && 
+				(Tab->EventA[index].RegClass == RegClass)
+			)
+			{
+				return 0;
+			}
+		}
+		
+		/*
+			If not set, add it to the Event table
+		*/
+		if (Tab->EventANo < MAX_TRIGGER_EVENT)
+		{
+			RTMPMoveMemory(Tab->EventA[Tab->EventANo].BSSID, pBssid, 6);
+			Tab->EventA[Tab->EventANo].bValid = TRUE;
+			Tab->EventA[Tab->EventANo].Channel = ChannelNo;
+			if (RegClass != 0)
+			{
+				/* Beacon has Regulatory class IE. So use beacon's*/
+				Tab->EventA[Tab->EventANo].RegClass = RegClass;
+			}
+			else
+			{
+				/* Use Station's Regulatory class instead.*/
+				/* If no Reg Class in Beacon, set to "unknown"*/
+				/* TODO:  Need to check if this's valid*/
+				Tab->EventA[Tab->EventANo].RegClass = 0; /* ????????????????? need to check*/
+			}
+			Tab->EventANo ++;
+		}
+	}
+	else if (pHtCapability->HtCapInfo.Forty_Mhz_Intolerant)
+	{
+		/* Event B.   My BSS beacon has Intolerant40 bit set*/
+		Tab->EventBCountDown = pAd->CommonCfg.Dot11BssWidthChanTranDelay;
+	}
+
+	return 0;
+}
+#endif /* DOT11N_DRAFT3 */
+#endif /* DOT11_N_SUPPORT */
+
+/* IRQL = DISPATCH_LEVEL*/
+VOID BssTableSsidSort(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT BSS_TABLE *OutTab, 
+	IN	CHAR Ssid[], 
+	IN	UCHAR SsidLen) 
+{
+	INT i;
+	BssTableInit(OutTab);
+
+	if ((SsidLen == 0) && 
+		(pAd->StaCfg.bAutoConnectIfNoSSID == FALSE))
+		return;
+
+	for (i = 0; i < pAd->ScanTab.BssNr; i++) 
+	{
+		BSS_ENTRY *pInBss = &pAd->ScanTab.BssEntry[i];
+		BOOLEAN	bIsHiddenApIncluded = FALSE;
+
+		if (((pAd->CommonCfg.bIEEE80211H == 1) && 
+		(pAd->MlmeAux.Channel > 14) && 
+		RadarChannelCheck(pAd, pInBss->Channel))
+#ifdef CARRIER_DETECTION_SUPPORT /* Roger sync Carrier             */
+		|| (pAd->CommonCfg.CarrierDetect.Enable == TRUE)
+#endif /* CARRIER_DETECTION_SUPPORT */
+		)
+		{
+			if (pInBss->Hidden)
+				bIsHiddenApIncluded = TRUE;
+		}
+
+		if ((pInBss->BssType == pAd->StaCfg.BssType) && 
+			(SSID_EQUAL(Ssid, SsidLen, pInBss->Ssid, pInBss->SsidLen) || bIsHiddenApIncluded))
+		{
+			BSS_ENTRY *pOutBss = &OutTab->BssEntry[OutTab->BssNr];
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+			if (pAd->StaCfg.WpaSupplicantUP & 0x80)
+			{
+				/* copy matching BSS from InTab to OutTab*/
+				NdisMoveMemory(pOutBss, pInBss, sizeof(BSS_ENTRY));
+				OutTab->BssNr++;
+				continue;
+			}
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+
+#ifdef EXT_BUILD_CHANNEL_LIST
+			/* If no Country IE exists no Connection will be established when IEEE80211dClientMode is strict.*/
+			if ((pAd->StaCfg.IEEE80211dClientMode == Rt802_11_D_Strict) &&
+				(pInBss->bHasCountryIE == FALSE))
+			{
+				DBGPRINT(RT_DEBUG_TRACE,("StaCfg.IEEE80211dClientMode == Rt802_11_D_Strict, but this AP doesn't have country IE.\n"));
+				continue;
+			}
+#endif /* EXT_BUILD_CHANNEL_LIST */
+
+#ifdef DOT11_N_SUPPORT
+			/* 2.4G/5G N only mode*/
+			if ((pInBss->HtCapabilityLen == 0) &&
+				((pAd->CommonCfg.PhyMode == PHY_11N_2_4G) || (pAd->CommonCfg.PhyMode == PHY_11N_5G)))
+			{
+				DBGPRINT(RT_DEBUG_TRACE,("STA is in N-only Mode, this AP don't have Ht capability in Beacon.\n"));
+				continue;
+			}
+
+			if ((pAd->CommonCfg.PhyMode == PHY_11GN_MIXED) &&
+				((pInBss->SupRateLen + pInBss->ExtRateLen) < 12))
+			{
+				DBGPRINT(RT_DEBUG_TRACE,("STA is in GN-only Mode, this AP is in B mode.\n"));
+				continue;
+			}
+#endif /* DOT11_N_SUPPORT */
+
+			/* New for WPA2*/
+			/* Check the Authmode first*/
+			if (pAd->StaCfg.AuthMode >= Ndis802_11AuthModeWPA)
+			{
+				/* Check AuthMode and AuthModeAux for matching, in case AP support dual-mode*/
+				if ((pAd->StaCfg.AuthMode != pInBss->AuthMode) && (pAd->StaCfg.AuthMode != pInBss->AuthModeAux))
+					/* None matched*/
+					continue;
+				
+				/* Check cipher suite, AP must have more secured cipher than station setting*/
+				if ((pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA) || (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPAPSK))
+				{
+					/* If it's not mixed mode, we should only let BSS pass with the same encryption*/
+					if (pInBss->WPA.bMixMode == FALSE)
+						if (pAd->StaCfg.WepStatus != pInBss->WPA.GroupCipher)
+							continue;
+						
+					/* check group cipher*/
+					if ((pAd->StaCfg.WepStatus < pInBss->WPA.GroupCipher) &&
+						(pInBss->WPA.GroupCipher != Ndis802_11GroupWEP40Enabled) && 
+						(pInBss->WPA.GroupCipher != Ndis802_11GroupWEP104Enabled))
+						continue;
+
+					/* check pairwise cipher, skip if none matched*/
+					/* If profile set to AES, let it pass without question.*/
+					/* If profile set to TKIP, we must find one mateched*/
+					if ((pAd->StaCfg.WepStatus == Ndis802_11Encryption2Enabled) && 
+						(pAd->StaCfg.WepStatus != pInBss->WPA.PairCipher) && 
+						(pAd->StaCfg.WepStatus != pInBss->WPA.PairCipherAux))
+						continue;						
+				}
+				else if ((pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2) || (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2PSK))
+				{
+					/* If it's not mixed mode, we should only let BSS pass with the same encryption*/
+					if (pInBss->WPA2.bMixMode == FALSE)
+						if (pAd->StaCfg.WepStatus != pInBss->WPA2.GroupCipher)
+							continue;
+						
+					/* check group cipher*/
+					if ((pAd->StaCfg.WepStatus < pInBss->WPA.GroupCipher) &&
+						(pInBss->WPA2.GroupCipher != Ndis802_11GroupWEP40Enabled) && 
+						(pInBss->WPA2.GroupCipher != Ndis802_11GroupWEP104Enabled))
+						continue;
+
+					/* check pairwise cipher, skip if none matched*/
+					/* If profile set to AES, let it pass without question.*/
+					/* If profile set to TKIP, we must find one mateched*/
+					if ((pAd->StaCfg.WepStatus == Ndis802_11Encryption2Enabled) && 
+						(pAd->StaCfg.WepStatus != pInBss->WPA2.PairCipher) && 
+						(pAd->StaCfg.WepStatus != pInBss->WPA2.PairCipherAux))
+						continue;						
+				}
+			}			
+			/* Bss Type matched, SSID matched. */
+			/* We will check wepstatus for qualification Bss*/
+			else if (pAd->StaCfg.WepStatus != pInBss->WepStatus)
+			{
+				DBGPRINT(RT_DEBUG_TRACE,("StaCfg.WepStatus=%d, while pInBss->WepStatus=%d\n", pAd->StaCfg.WepStatus, pInBss->WepStatus));
+				
+				/* 1. For the SESv2 case, we will not qualify WepStatus.
+				   2. AirPort express AP support OPEN-WEP, Shared-WEP, WPA and WPA2 Mix mode.
+				      shall not block the BSS with same GroupChiper of WPA/WPA2 contained in RSN IE. */
+				
+				if ((!pInBss->bSES) && (pInBss->WPA.bMixMode == FALSE))
+					continue;
+			}
+
+			/* Since the AP is using hidden SSID, and we are trying to connect to ANY*/
+			/* It definitely will fail. So, skip it.*/
+			/* CCX also require not even try to connect it!!*/
+			if (SsidLen == 0)
+				continue;
+			
+			/* copy matching BSS from InTab to OutTab*/
+			NdisMoveMemory(pOutBss, pInBss, sizeof(BSS_ENTRY));
+
+			OutTab->BssNr++;
+		}
+		else if ((pInBss->BssType == pAd->StaCfg.BssType) && (SsidLen == 0))
+		{
+			BSS_ENTRY *pOutBss = &OutTab->BssEntry[OutTab->BssNr];
+
+
+#ifdef DOT11_N_SUPPORT
+			/* 2.4G/5G N only mode*/
+			if ((pInBss->HtCapabilityLen == 0) &&
+				((pAd->CommonCfg.PhyMode == PHY_11N_2_4G) || (pAd->CommonCfg.PhyMode == PHY_11N_5G)))
+			{
+				DBGPRINT(RT_DEBUG_TRACE,("STA is in N-only Mode, this AP don't have Ht capability in Beacon.\n"));
+				continue;
+			}
+
+			if ((pAd->CommonCfg.PhyMode == PHY_11GN_MIXED) &&
+				((pInBss->SupRateLen + pInBss->ExtRateLen) < 12))
+			{
+				DBGPRINT(RT_DEBUG_TRACE,("STA is in GN-only Mode, this AP is in B mode.\n"));
+				continue;
+			}
+#endif /* DOT11_N_SUPPORT */
+
+			/* New for WPA2*/
+			/* Check the Authmode first*/
+			if (pAd->StaCfg.AuthMode >= Ndis802_11AuthModeWPA)
+			{
+				/* Check AuthMode and AuthModeAux for matching, in case AP support dual-mode*/
+				if ((pAd->StaCfg.AuthMode != pInBss->AuthMode) && (pAd->StaCfg.AuthMode != pInBss->AuthModeAux))
+					/* None matched*/
+					continue;
+				
+				/* Check cipher suite, AP must have more secured cipher than station setting*/
+				if ((pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA) || (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPAPSK))
+				{
+					/* If it's not mixed mode, we should only let BSS pass with the same encryption*/
+					if (pInBss->WPA.bMixMode == FALSE)
+						if (pAd->StaCfg.WepStatus != pInBss->WPA.GroupCipher)
+							continue;
+						
+					/* check group cipher*/
+					if (pAd->StaCfg.WepStatus < pInBss->WPA.GroupCipher)
+						continue;
+
+					/* check pairwise cipher, skip if none matched*/
+					/* If profile set to AES, let it pass without question.*/
+					/* If profile set to TKIP, we must find one mateched*/
+					if ((pAd->StaCfg.WepStatus == Ndis802_11Encryption2Enabled) && 
+						(pAd->StaCfg.WepStatus != pInBss->WPA.PairCipher) && 
+						(pAd->StaCfg.WepStatus != pInBss->WPA.PairCipherAux))
+						continue;						
+				}
+				else if ((pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2) || (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2PSK))
+				{
+					/* If it's not mixed mode, we should only let BSS pass with the same encryption*/
+					if (pInBss->WPA2.bMixMode == FALSE)
+						if (pAd->StaCfg.WepStatus != pInBss->WPA2.GroupCipher)
+							continue;
+						
+					/* check group cipher*/
+					if (pAd->StaCfg.WepStatus < pInBss->WPA2.GroupCipher)
+						continue;
+
+					/* check pairwise cipher, skip if none matched*/
+					/* If profile set to AES, let it pass without question.*/
+					/* If profile set to TKIP, we must find one mateched*/
+					if ((pAd->StaCfg.WepStatus == Ndis802_11Encryption2Enabled) && 
+						(pAd->StaCfg.WepStatus != pInBss->WPA2.PairCipher) && 
+						(pAd->StaCfg.WepStatus != pInBss->WPA2.PairCipherAux))
+						continue;						
+				}
+			}
+			/* Bss Type matched, SSID matched. */
+			/* We will check wepstatus for qualification Bss*/
+			else if (pAd->StaCfg.WepStatus != pInBss->WepStatus)
+					continue;
+			
+			/* copy matching BSS from InTab to OutTab*/
+			NdisMoveMemory(pOutBss, pInBss, sizeof(BSS_ENTRY));
+
+			OutTab->BssNr++;
+		}
+
+		if (OutTab->BssNr >= MAX_LEN_OF_BSS_TABLE)
+			break;
+	}
+
+	BssTableSortByRssi(OutTab);
+}
+
+
+/* IRQL = DISPATCH_LEVEL*/
+VOID BssTableSortByRssi(
+	IN OUT BSS_TABLE *OutTab) 
+{
+	INT 	  i, j;
+/*	BSS_ENTRY TmpBss;*/
+	BSS_ENTRY *pTmpBss = NULL;
+
+
+	/* allocate memory */
+	os_alloc_mem(NULL, (UCHAR **)&pTmpBss, sizeof(BSS_ENTRY));
+	if (pTmpBss == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+		return;
+	}
+
+	for (i = 0; i < OutTab->BssNr - 1; i++) 
+	{
+		for (j = i+1; j < OutTab->BssNr; j++) 
+		{
+			if (OutTab->BssEntry[j].Rssi > OutTab->BssEntry[i].Rssi) 
+			{
+				NdisMoveMemory(pTmpBss, &OutTab->BssEntry[j], sizeof(BSS_ENTRY));
+				NdisMoveMemory(&OutTab->BssEntry[j], &OutTab->BssEntry[i], sizeof(BSS_ENTRY));
+				NdisMoveMemory(&OutTab->BssEntry[i], pTmpBss, sizeof(BSS_ENTRY));
+			}
+		}
+	}
+
+	if (pTmpBss != NULL)
+		os_free_mem(NULL, pTmpBss);
+}
+#endif /* CONFIG_STA_SUPPORT */
+
+
+VOID BssCipherParse(
+	IN OUT	PBSS_ENTRY	pBss)
+{
+	PEID_STRUCT 		 pEid;
+	PUCHAR				pTmp;
+	PRSN_IE_HEADER_STRUCT			pRsnHeader;
+	PCIPHER_SUITE_STRUCT			pCipher;
+	PAKM_SUITE_STRUCT				pAKM;
+	USHORT							Count;
+	INT								Length;
+	NDIS_802_11_ENCRYPTION_STATUS	TmpCipher;
+
+	
+	/* WepStatus will be reset later, if AP announce TKIP or AES on the beacon frame.*/
+	
+	if (pBss->Privacy)
+	{
+		pBss->WepStatus 	= Ndis802_11WEPEnabled;
+	}
+	else
+	{
+		pBss->WepStatus 	= Ndis802_11WEPDisabled;
+	}
+	/* Set default to disable & open authentication before parsing variable IE*/
+	pBss->AuthMode		= Ndis802_11AuthModeOpen;
+	pBss->AuthModeAux	= Ndis802_11AuthModeOpen;
+
+	/* Init WPA setting*/
+	pBss->WPA.PairCipher	= Ndis802_11WEPDisabled;
+	pBss->WPA.PairCipherAux = Ndis802_11WEPDisabled;
+	pBss->WPA.GroupCipher	= Ndis802_11WEPDisabled;
+	pBss->WPA.RsnCapability = 0;
+	pBss->WPA.bMixMode		= FALSE;
+
+	/* Init WPA2 setting*/
+	pBss->WPA2.PairCipher	 = Ndis802_11WEPDisabled;
+	pBss->WPA2.PairCipherAux = Ndis802_11WEPDisabled;
+	pBss->WPA2.GroupCipher	 = Ndis802_11WEPDisabled;
+	pBss->WPA2.RsnCapability = 0;
+	pBss->WPA2.bMixMode 	 = FALSE;
+
+	
+	Length = (INT) pBss->VarIELen;
+
+	while (Length > 0)
+	{
+		/* Parse cipher suite base on WPA1 & WPA2, they should be parsed differently*/
+		pTmp = ((PUCHAR) pBss->VarIEs) + pBss->VarIELen - Length;
+		pEid = (PEID_STRUCT) pTmp;
+		switch (pEid->Eid)
+		{
+			case IE_WPA:
+				if (NdisEqualMemory(pEid->Octet, SES_OUI, 3) && (pEid->Len == 7))
+				{
+					pBss->bSES = TRUE;
+					break;
+				}				
+				else if (NdisEqualMemory(pEid->Octet, WPA_OUI, 4) != 1)
+				{
+					/* if unsupported vendor specific IE*/
+					break;
+				}				
+				/* Skip OUI, version, and multicast suite*/
+				/* This part should be improved in the future when AP supported multiple cipher suite.*/
+				/* For now, it's OK since almost all APs have fixed cipher suite supported.*/
+				/* pTmp = (PUCHAR) pEid->Octet;*/
+				pTmp   += 11;
+
+				/* Cipher Suite Selectors from Spec P802.11i/D3.2 P26.*/
+				/*	Value	   Meaning*/
+				/*	0			None */
+				/*	1			WEP-40*/
+				/*	2			Tkip*/
+				/*	3			WRAP*/
+				/*	4			AES*/
+				/*	5			WEP-104*/
+				/* Parse group cipher*/
+				switch (*pTmp)
+				{
+					case 1:
+						pBss->WPA.GroupCipher = Ndis802_11GroupWEP40Enabled;
+						break;
+					case 5:
+						pBss->WPA.GroupCipher = Ndis802_11GroupWEP104Enabled;
+						break;
+					case 2:
+						pBss->WPA.GroupCipher = Ndis802_11Encryption2Enabled;
+						break;
+					case 4:
+						pBss->WPA.GroupCipher = Ndis802_11Encryption3Enabled;
+						break;
+					default:
+						break;
+				}
+				/* number of unicast suite*/
+				pTmp   += 1;
+
+				/* skip all unicast cipher suites*/
+				/*Count = *(PUSHORT) pTmp;				*/
+				Count = (pTmp[1]<<8) + pTmp[0];
+				pTmp   += sizeof(USHORT);
+
+				/* Parsing all unicast cipher suite*/
+				while (Count > 0)
+				{
+					/* Skip OUI*/
+					pTmp += 3;
+					TmpCipher = Ndis802_11WEPDisabled;
+					switch (*pTmp)
+					{
+						case 1:
+						case 5: /* Although WEP is not allowed in WPA related auth mode, we parse it anyway*/
+							TmpCipher = Ndis802_11Encryption1Enabled;
+							break;
+						case 2:
+							TmpCipher = Ndis802_11Encryption2Enabled;
+							break;
+						case 4:
+							TmpCipher = Ndis802_11Encryption3Enabled;
+							break;
+						default:
+							break;
+					}
+					if (TmpCipher > pBss->WPA.PairCipher)
+					{
+						/* Move the lower cipher suite to PairCipherAux*/
+						pBss->WPA.PairCipherAux = pBss->WPA.PairCipher;
+						pBss->WPA.PairCipher	= TmpCipher;
+					}
+					else
+					{
+						pBss->WPA.PairCipherAux = TmpCipher;
+					}
+					pTmp++;
+					Count--;
+				}
+				
+				/* 4. get AKM suite counts*/
+				/*Count	= *(PUSHORT) pTmp;*/
+				Count = (pTmp[1]<<8) + pTmp[0];
+				pTmp   += sizeof(USHORT);
+				pTmp   += 3;
+				
+				switch (*pTmp)
+				{
+					case 1:
+						/* Set AP support WPA-enterprise mode*/
+						if (pBss->AuthMode == Ndis802_11AuthModeOpen)
+							pBss->AuthMode = Ndis802_11AuthModeWPA;
+						else
+							pBss->AuthModeAux = Ndis802_11AuthModeWPA;
+						break;
+					case 2:
+						/* Set AP support WPA-PSK mode*/
+						if (pBss->AuthMode == Ndis802_11AuthModeOpen)
+							pBss->AuthMode = Ndis802_11AuthModeWPAPSK;
+						else
+							pBss->AuthModeAux = Ndis802_11AuthModeWPAPSK;
+						break;
+					default:
+						break;
+				}
+				pTmp   += 1;
+
+				/* Fixed for WPA-None*/
+				if (pBss->BssType == BSS_ADHOC)
+				{
+					pBss->AuthMode	  = Ndis802_11AuthModeWPANone;
+					pBss->AuthModeAux = Ndis802_11AuthModeWPANone;
+					pBss->WepStatus   = pBss->WPA.GroupCipher;
+					/* Patched bugs for old driver*/
+					if (pBss->WPA.PairCipherAux == Ndis802_11WEPDisabled)
+						pBss->WPA.PairCipherAux = pBss->WPA.GroupCipher;
+				}
+				else
+					pBss->WepStatus   = pBss->WPA.PairCipher;					
+				
+				/* Check the Pair & Group, if different, turn on mixed mode flag*/
+				if (pBss->WPA.GroupCipher != pBss->WPA.PairCipher)
+					pBss->WPA.bMixMode = TRUE;
+				
+				break;
+
+			case IE_RSN:
+				pRsnHeader = (PRSN_IE_HEADER_STRUCT) pTmp;
+				
+				/* 0. Version must be 1*/
+				if (le2cpu16(pRsnHeader->Version) != 1)
+					break;
+				pTmp   += sizeof(RSN_IE_HEADER_STRUCT);
+
+				/* 1. Check group cipher*/
+				pCipher = (PCIPHER_SUITE_STRUCT) pTmp;
+				if (!RTMPEqualMemory(pTmp, RSN_OUI, 3))
+					break;
+
+				/* Parse group cipher*/
+				switch (pCipher->Type)
+				{
+					case 1:
+						pBss->WPA2.GroupCipher = Ndis802_11GroupWEP40Enabled;
+						break;
+					case 5:
+						pBss->WPA2.GroupCipher = Ndis802_11GroupWEP104Enabled;
+						break;
+					case 2:
+						pBss->WPA2.GroupCipher = Ndis802_11Encryption2Enabled;
+						break;
+					case 4:
+						pBss->WPA2.GroupCipher = Ndis802_11Encryption3Enabled;
+						break;
+					default:
+						break;
+				}
+				/* set to correct offset for next parsing*/
+				pTmp   += sizeof(CIPHER_SUITE_STRUCT);
+
+				/* 2. Get pairwise cipher counts*/
+				/*Count = *(PUSHORT) pTmp;*/
+				Count = (pTmp[1]<<8) + pTmp[0];
+				pTmp   += sizeof(USHORT);			
+
+				/* 3. Get pairwise cipher*/
+				/* Parsing all unicast cipher suite*/
+				while (Count > 0)
+				{
+					/* Skip OUI*/
+					pCipher = (PCIPHER_SUITE_STRUCT) pTmp;
+					TmpCipher = Ndis802_11WEPDisabled;
+					switch (pCipher->Type)
+					{
+						case 1:
+						case 5: /* Although WEP is not allowed in WPA related auth mode, we parse it anyway*/
+							TmpCipher = Ndis802_11Encryption1Enabled;
+							break;
+						case 2:
+							TmpCipher = Ndis802_11Encryption2Enabled;
+							break;
+						case 4:
+							TmpCipher = Ndis802_11Encryption3Enabled;
+							break;
+						default:
+							break;
+					}
+					if (TmpCipher > pBss->WPA2.PairCipher)
+					{
+						/* Move the lower cipher suite to PairCipherAux*/
+						pBss->WPA2.PairCipherAux = pBss->WPA2.PairCipher;
+						pBss->WPA2.PairCipher	 = TmpCipher;
+					}
+					else
+					{
+						pBss->WPA2.PairCipherAux = TmpCipher;
+					}
+					pTmp += sizeof(CIPHER_SUITE_STRUCT);
+					Count--;
+				}
+				
+				/* 4. get AKM suite counts*/
+				/*Count	= *(PUSHORT) pTmp;*/
+				Count = (pTmp[1]<<8) + pTmp[0];
+				pTmp   += sizeof(USHORT);
+
+				/* 5. Get AKM ciphers*/
+				/* Parsing all AKM ciphers*/
+				while (Count > 0)
+				{					
+					pAKM = (PAKM_SUITE_STRUCT) pTmp;
+					if (!RTMPEqualMemory(pTmp, RSN_OUI, 3))
+						break;
+
+					switch (pAKM->Type)
+					{
+						case 0:
+							if (pBss->AuthMode == Ndis802_11AuthModeOpen)
+								pBss->AuthMode = Ndis802_11AuthModeWPANone;
+							else
+								pBss->AuthModeAux = Ndis802_11AuthModeWPANone;
+							break;                                                        
+						case 1:
+							/* Set AP support WPA-enterprise mode*/
+							if (pBss->AuthMode == Ndis802_11AuthModeOpen)
+								pBss->AuthMode = Ndis802_11AuthModeWPA2;
+							else
+								pBss->AuthModeAux = Ndis802_11AuthModeWPA2;
+							break;
+						case 2:
+							/* Set AP support WPA-PSK mode*/
+							if (pBss->AuthMode == Ndis802_11AuthModeOpen)
+								pBss->AuthMode = Ndis802_11AuthModeWPA2PSK;
+							else
+								pBss->AuthModeAux = Ndis802_11AuthModeWPA2PSK;
+							break;
+						default:
+							if (pBss->AuthMode == Ndis802_11AuthModeOpen)
+								pBss->AuthMode = Ndis802_11AuthModeMax;
+							else
+								pBss->AuthModeAux = Ndis802_11AuthModeMax;
+							break;
+					}
+					pTmp   += (Count * sizeof(AKM_SUITE_STRUCT));
+					Count--;
+				}
+
+				/* Fixed for WPA-None*/
+				if (pBss->BssType == BSS_ADHOC)
+				{
+					pBss->WPA.PairCipherAux = pBss->WPA2.PairCipherAux;
+					pBss->WPA.GroupCipher	= pBss->WPA2.GroupCipher;
+					pBss->WepStatus 		= pBss->WPA.GroupCipher;
+					/* Patched bugs for old driver*/
+					if (pBss->WPA.PairCipherAux == Ndis802_11WEPDisabled)
+						pBss->WPA.PairCipherAux = pBss->WPA.GroupCipher;
+				}
+				pBss->WepStatus   = pBss->WPA2.PairCipher;					
+				
+				/* 6. Get RSN capability*/
+				/*pBss->WPA2.RsnCapability = *(PUSHORT) pTmp;*/
+				pBss->WPA2.RsnCapability = (pTmp[1]<<8) + pTmp[0];
+				pTmp += sizeof(USHORT);
+				
+				/* Check the Pair & Group, if different, turn on mixed mode flag*/
+				if (pBss->WPA2.GroupCipher != pBss->WPA2.PairCipher)
+					pBss->WPA2.bMixMode = TRUE;
+				
+				break;
+			default:
+				break;
+		}
+		Length -= (pEid->Len + 2);
+	}
+}
+
+/* ===========================================================================================*/
+/* mac_table.c*/
+/* ===========================================================================================*/
+
+/*! \brief generates a random mac address value for IBSS BSSID
+ *	\param Addr the bssid location
+ *	\return none
+ *	\pre
+ *	\post
+ */
+VOID MacAddrRandomBssid(
+	IN PRTMP_ADAPTER pAd, 
+	OUT PUCHAR pAddr) 
+{
+	INT i;
+
+	for (i = 0; i < MAC_ADDR_LEN; i++) 
+	{
+		pAddr[i] = RandomByte(pAd);
+	}
+
+	pAddr[0] = (pAddr[0] & 0xfe) | 0x02;  /* the first 2 bits must be 01xxxxxxxx*/
+}
+
+/*! \brief init the management mac frame header
+ *	\param p_hdr mac header
+ *	\param subtype subtype of the frame
+ *	\param p_ds destination address, don't care if it is a broadcast address
+ *	\return none
+ *	\pre the station has the following information in the pAd->StaCfg
+ *	 - bssid
+ *	 - station address
+ *	\post
+ *	\note this function initializes the following field
+
+ IRQL = PASSIVE_LEVEL
+ IRQL = DISPATCH_LEVEL
+  
+ */
+VOID MgtMacHeaderInit(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN OUT PHEADER_802_11 pHdr80211, 
+	IN UCHAR SubType, 
+	IN UCHAR ToDs, 
+	IN PUCHAR pDA, 
+	IN PUCHAR pBssid) 
+{
+	NdisZeroMemory(pHdr80211, sizeof(HEADER_802_11));
+	
+	pHdr80211->FC.Type = BTYPE_MGMT;
+	pHdr80211->FC.SubType = SubType;
+/*	if (SubType == SUBTYPE_ACK)	 sample, no use, it will conflict with ACTION frame sub type*/
+/*		pHdr80211->FC.Type = BTYPE_CNTL;*/
+	pHdr80211->FC.ToDs = ToDs;
+	COPY_MAC_ADDR(pHdr80211->Addr1, pDA);
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		COPY_MAC_ADDR(pHdr80211->Addr2, pAd->CurrentAddress);
+#endif /* CONFIG_STA_SUPPORT */
+	COPY_MAC_ADDR(pHdr80211->Addr3, pBssid);
+}
+
+/* ===========================================================================================*/
+/* mem_mgmt.c*/
+/* ===========================================================================================*/
+
+/*!***************************************************************************
+ * This routine build an outgoing frame, and fill all information specified 
+ * in argument list to the frame body. The actual frame size is the summation 
+ * of all arguments.
+ * input params:
+ *		Buffer - pointer to a pre-allocated memory segment
+ *		args - a list of <int arg_size, arg> pairs.
+ *		NOTE NOTE NOTE!!!! the last argument must be NULL, otherwise this
+ *						   function will FAIL!!!
+ * return:
+ *		Size of the buffer
+ * usage:  
+ *		MakeOutgoingFrame(Buffer, output_length, 2, &fc, 2, &dur, 6, p_addr1, 6,p_addr2, END_OF_ARGS);
+
+ IRQL = PASSIVE_LEVEL
+ IRQL = DISPATCH_LEVEL
+  
+ ****************************************************************************/
+ULONG MakeOutgoingFrame(
+	OUT UCHAR *Buffer, 
+	OUT ULONG *FrameLen, ...) 
+{
+	UCHAR   *p;
+	int 	leng;
+	ULONG	TotLeng;
+	va_list Args;
+
+	/* calculates the total length*/
+	TotLeng = 0;
+	va_start(Args, FrameLen);
+	do 
+	{
+		leng = va_arg(Args, int);
+		if (leng == END_OF_ARGS) 
+		{
+			break;
+		}
+		p = va_arg(Args, PVOID);
+		NdisMoveMemory(&Buffer[TotLeng], p, leng);
+		TotLeng = TotLeng + leng;
+	} while(TRUE);
+
+	va_end(Args); /* clean up */
+	*FrameLen = TotLeng;
+	return TotLeng;
+}
+
+/* ===========================================================================================*/
+/* mlme_queue.c*/
+/* ===========================================================================================*/
+
+/*! \brief	Initialize The MLME Queue, used by MLME Functions
+ *	\param	*Queue	   The MLME Queue
+ *	\return Always	   Return NDIS_STATE_SUCCESS in this implementation
+ *	\pre
+ *	\post
+ *	\note	Because this is done only once (at the init stage), no need to be locked
+
+ IRQL = PASSIVE_LEVEL
+ 
+ */
+NDIS_STATUS MlmeQueueInit(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE *Queue) 
+{
+	INT i;
+
+	NdisAllocateSpinLock(pAd, &Queue->Lock);
+
+	Queue->Num	= 0;
+	Queue->Head = 0;
+	Queue->Tail = 0;
+
+	for (i = 0; i < MAX_LEN_OF_MLME_QUEUE; i++) 
+	{
+		Queue->Entry[i].Occupied = FALSE;
+		Queue->Entry[i].MsgLen = 0;
+		NdisZeroMemory(Queue->Entry[i].Msg, MGMT_DMA_BUFFER_SIZE);
+	}
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+/*! \brief	 Enqueue a message for other threads, if they want to send messages to MLME thread
+ *	\param	*Queue	  The MLME Queue
+ *	\param	 Machine  The State Machine Id
+ *	\param	 MsgType  The Message Type
+ *	\param	 MsgLen   The Message length
+ *	\param	*Msg	  The message pointer
+ *	\return  TRUE if enqueue is successful, FALSE if the queue is full
+ *	\pre
+ *	\post
+ *	\note	 The message has to be initialized
+
+ IRQL = PASSIVE_LEVEL
+ IRQL = DISPATCH_LEVEL
+  
+ */
+BOOLEAN MlmeEnqueue(
+	IN	PRTMP_ADAPTER	pAd,
+	IN ULONG Machine, 
+	IN ULONG MsgType, 
+	IN ULONG MsgLen, 
+	IN VOID *Msg,
+	IN ULONG Priv) 
+{
+	INT Tail;
+	MLME_QUEUE	*Queue = (MLME_QUEUE *)&pAd->Mlme.Queue;
+
+	/* Do nothing if the driver is starting halt state.*/
+	/* This might happen when timer already been fired before cancel timer with mlmehalt*/
+	if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS | fRTMP_ADAPTER_NIC_NOT_EXIST))
+		return FALSE;
+
+	/* First check the size, it MUST not exceed the mlme queue size*/
+	if (MsgLen > MGMT_DMA_BUFFER_SIZE)
+	{
+		DBGPRINT_ERR(("MlmeEnqueue: msg too large, size = %ld \n", MsgLen));
+		return FALSE;
+	}
+	
+	if (MlmeQueueFull(Queue, 1)) 
+	{
+		return FALSE;
+	}
+
+	NdisAcquireSpinLock(&(Queue->Lock));
+	Tail = Queue->Tail;
+	Queue->Tail++;
+	Queue->Num++;
+	if (Queue->Tail == MAX_LEN_OF_MLME_QUEUE) 
+	{
+		Queue->Tail = 0;
+	}
+	
+	Queue->Entry[Tail].Wcid = RESERVED_WCID;
+	Queue->Entry[Tail].Occupied = TRUE;
+	Queue->Entry[Tail].Machine = Machine;
+	Queue->Entry[Tail].MsgType = MsgType;
+	Queue->Entry[Tail].MsgLen  = MsgLen;	
+	Queue->Entry[Tail].Priv = Priv;
+	
+	if (Msg != NULL)
+	{
+		NdisMoveMemory(Queue->Entry[Tail].Msg, Msg, MsgLen);
+	}
+		
+	NdisReleaseSpinLock(&(Queue->Lock));
+	return TRUE;
+}
+
+/*! \brief	 This function is used when Recv gets a MLME message
+ *	\param	*Queue			 The MLME Queue
+ *	\param	 TimeStampHigh	 The upper 32 bit of timestamp
+ *	\param	 TimeStampLow	 The lower 32 bit of timestamp
+ *	\param	 Rssi			 The receiving RSSI strength
+ *	\param	 MsgLen 		 The length of the message
+ *	\param	*Msg			 The message pointer
+ *	\return  TRUE if everything ok, FALSE otherwise (like Queue Full)
+ *	\pre
+ *	\post
+ 
+ IRQL = DISPATCH_LEVEL
+ 
+ */
+BOOLEAN MlmeEnqueueForRecv(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN ULONG Wcid, 
+	IN ULONG TimeStampHigh, 
+	IN ULONG TimeStampLow,
+	IN UCHAR Rssi0, 
+	IN UCHAR Rssi1, 
+	IN UCHAR Rssi2, 
+	IN ULONG MsgLen, 
+	IN VOID *Msg,
+	IN UCHAR Signal,
+	IN UCHAR OpMode)
+{
+	INT 		 Tail, Machine = 0xff;
+	PFRAME_802_11 pFrame = (PFRAME_802_11)Msg;
+	INT		 MsgType = 0x0;
+	MLME_QUEUE	*Queue = (MLME_QUEUE *)&pAd->Mlme.Queue;
+
+#ifdef RALINK_ATE			
+	/* Nothing to do in ATE mode */
+	if(ATE_ON(pAd))
+		return FALSE;
+#endif /* RALINK_ATE */
+
+	/* Do nothing if the driver is starting halt state.*/
+	/* This might happen when timer already been fired before cancel timer with mlmehalt*/
+	if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS | fRTMP_ADAPTER_NIC_NOT_EXIST))
+	{
+		DBGPRINT_ERR(("MlmeEnqueueForRecv: fRTMP_ADAPTER_HALT_IN_PROGRESS\n"));
+		return FALSE;
+	}
+
+	/* First check the size, it MUST not exceed the mlme queue size*/
+	if (MsgLen > MGMT_DMA_BUFFER_SIZE)
+	{
+		DBGPRINT_ERR(("MlmeEnqueueForRecv: frame too large, size = %ld \n", MsgLen));
+		return FALSE;
+	}
+
+	if (MlmeQueueFull(Queue, 0)) 
+	{
+		return FALSE;
+	}
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		if (!MsgTypeSubst(pAd, pFrame, &Machine, &MsgType)) 
+		{
+			DBGPRINT_ERR(("MlmeEnqueueForRecv: un-recongnized mgmt->subtype=%d\n",pFrame->Hdr.FC.SubType));
+			return FALSE;
+		}
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	/* OK, we got all the informations, it is time to put things into queue*/
+
+	NdisAcquireSpinLock(&(Queue->Lock));
+	Tail = Queue->Tail;
+	Queue->Tail++;
+	Queue->Num++;
+	if (Queue->Tail == MAX_LEN_OF_MLME_QUEUE) 
+	{
+		Queue->Tail = 0;
+	}
+	Queue->Entry[Tail].Occupied = TRUE;
+	Queue->Entry[Tail].Machine = Machine;
+	Queue->Entry[Tail].MsgType = MsgType;
+	Queue->Entry[Tail].MsgLen  = MsgLen;
+	Queue->Entry[Tail].TimeStamp.u.LowPart = TimeStampLow;
+	Queue->Entry[Tail].TimeStamp.u.HighPart = TimeStampHigh;
+	Queue->Entry[Tail].Rssi0 = Rssi0;
+	Queue->Entry[Tail].Rssi1 = Rssi1;
+	Queue->Entry[Tail].Rssi2 = Rssi2;
+	Queue->Entry[Tail].Signal = Signal;
+	Queue->Entry[Tail].Wcid = (UCHAR)Wcid;
+	Queue->Entry[Tail].OpMode = (ULONG)OpMode;
+	Queue->Entry[Tail].Priv = 0;
+
+	Queue->Entry[Tail].Channel = pAd->LatchRfRegs.Channel;
+	
+	if (Msg != NULL)
+	{
+		NdisMoveMemory(Queue->Entry[Tail].Msg, Msg, MsgLen);
+	}
+
+	NdisReleaseSpinLock(&(Queue->Lock));	
+	RTMP_MLME_HANDLER(pAd);
+
+	return TRUE;
+}
+
+
+/*! \brief	 Dequeue a message from the MLME Queue
+ *	\param	*Queue	  The MLME Queue
+ *	\param	*Elem	  The message dequeued from MLME Queue
+ *	\return  TRUE if the Elem contains something, FALSE otherwise
+ *	\pre
+ *	\post
+
+ IRQL = DISPATCH_LEVEL
+
+ */
+BOOLEAN MlmeDequeue(
+	IN MLME_QUEUE *Queue, 
+	OUT MLME_QUEUE_ELEM **Elem) 
+{
+	NdisAcquireSpinLock(&(Queue->Lock));
+	*Elem = &(Queue->Entry[Queue->Head]);    
+	Queue->Num--;
+	Queue->Head++;
+	if (Queue->Head == MAX_LEN_OF_MLME_QUEUE) 
+	{
+		Queue->Head = 0;
+	}
+	NdisReleaseSpinLock(&(Queue->Lock));
+	return TRUE;
+}
+
+/* IRQL = DISPATCH_LEVEL*/
+VOID	MlmeRestartStateMachine(
+	IN	PRTMP_ADAPTER	pAd)
+{
+#ifdef CONFIG_STA_SUPPORT
+	BOOLEAN				Cancelled;
+#endif /* CONFIG_STA_SUPPORT */
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("MlmeRestartStateMachine \n"));
+
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+#ifdef QOS_DLS_SUPPORT
+		UCHAR i;
+#endif /* QOS_DLS_SUPPORT */
+		/* Cancel all timer events*/
+		/* Be careful to cancel new added timer*/
+		RTMPCancelTimer(&pAd->MlmeAux.AssocTimer,	  &Cancelled);
+		RTMPCancelTimer(&pAd->MlmeAux.ReassocTimer,   &Cancelled);
+		RTMPCancelTimer(&pAd->MlmeAux.DisassocTimer,  &Cancelled);
+		RTMPCancelTimer(&pAd->MlmeAux.AuthTimer,	   &Cancelled);
+		RTMPCancelTimer(&pAd->MlmeAux.BeaconTimer,	   &Cancelled);
+		RTMPCancelTimer(&pAd->MlmeAux.ScanTimer,	   &Cancelled);
+
+#ifdef QOS_DLS_SUPPORT
+		for (i=0; i<MAX_NUM_OF_DLS_ENTRY; i++)
+		{
+			RTMPCancelTimer(&pAd->StaCfg.DLSEntry[i].Timer, &Cancelled);
+		}
+#endif /* QOS_DLS_SUPPORT */
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	/* Change back to original channel in case of doing scan*/
+	AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
+	AsicLockChannel(pAd, pAd->CommonCfg.Channel);
+
+	/* Resume MSDU which is turned off durning scan*/
+	RTMPResumeMsduTransmission(pAd);
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		/* Set all state machines back IDLE*/
+		pAd->Mlme.CntlMachine.CurrState    = CNTL_IDLE;
+		pAd->Mlme.AssocMachine.CurrState   = ASSOC_IDLE;
+		pAd->Mlme.AuthMachine.CurrState    = AUTH_REQ_IDLE;
+		pAd->Mlme.AuthRspMachine.CurrState = AUTH_RSP_IDLE;
+		pAd->Mlme.SyncMachine.CurrState    = SYNC_IDLE;
+		pAd->Mlme.ActMachine.CurrState    = ACT_IDLE;
+#ifdef QOS_DLS_SUPPORT
+		pAd->Mlme.DlsMachine.CurrState    = DLS_IDLE;
+#endif /* QOS_DLS_SUPPORT */
+
+	}
+#endif /* CONFIG_STA_SUPPORT */
+	
+}
+
+/*! \brief	test if the MLME Queue is empty
+ *	\param	*Queue	  The MLME Queue
+ *	\return TRUE if the Queue is empty, FALSE otherwise
+ *	\pre
+ *	\post
+ 
+ IRQL = DISPATCH_LEVEL
+ 
+ */
+BOOLEAN MlmeQueueEmpty(
+	IN MLME_QUEUE *Queue) 
+{
+	BOOLEAN Ans;
+
+	NdisAcquireSpinLock(&(Queue->Lock));
+	Ans = (Queue->Num == 0);
+	NdisReleaseSpinLock(&(Queue->Lock));
+
+	return Ans;
+}
+
+/*! \brief	 test if the MLME Queue is full
+ *	\param	 *Queue 	 The MLME Queue
+ *	\return  TRUE if the Queue is empty, FALSE otherwise
+ *	\pre
+ *	\post
+
+ IRQL = PASSIVE_LEVEL
+ IRQL = DISPATCH_LEVEL
+
+ */
+BOOLEAN MlmeQueueFull(
+	IN MLME_QUEUE *Queue,
+	IN UCHAR SendId) 
+{
+	BOOLEAN Ans;
+
+	NdisAcquireSpinLock(&(Queue->Lock));
+	if (SendId == 0)
+		Ans = ((Queue->Num >= (MAX_LEN_OF_MLME_QUEUE / 2)) || Queue->Entry[Queue->Tail].Occupied);
+	else
+		Ans = (Queue->Num == MAX_LEN_OF_MLME_QUEUE);
+	NdisReleaseSpinLock(&(Queue->Lock));
+
+	return Ans;
+}
+
+/*! \brief	 The destructor of MLME Queue
+ *	\param 
+ *	\return
+ *	\pre
+ *	\post
+ *	\note	Clear Mlme Queue, Set Queue->Num to Zero.
+
+ IRQL = PASSIVE_LEVEL
+ 
+ */
+VOID MlmeQueueDestroy(
+	IN MLME_QUEUE *pQueue) 
+{
+	NdisAcquireSpinLock(&(pQueue->Lock));
+	pQueue->Num  = 0;
+	pQueue->Head = 0;
+	pQueue->Tail = 0;
+	NdisReleaseSpinLock(&(pQueue->Lock));
+	NdisFreeSpinLock(&(pQueue->Lock));
+}
+
+
+/*! \brief	 To substitute the message type if the message is coming from external
+ *	\param	pFrame		   The frame received
+ *	\param	*Machine	   The state machine
+ *	\param	*MsgType	   the message type for the state machine
+ *	\return TRUE if the substitution is successful, FALSE otherwise
+ *	\pre
+ *	\post
+
+ IRQL = DISPATCH_LEVEL
+
+ */
+#ifdef CONFIG_STA_SUPPORT
+BOOLEAN MsgTypeSubst(
+	IN PRTMP_ADAPTER  pAd,
+	IN PFRAME_802_11 pFrame, 
+	OUT INT *Machine, 
+	OUT INT *MsgType) 
+{
+	USHORT	Seq, Alg;
+	UCHAR	EAPType;
+	PUCHAR	pData;
+
+	/* Pointer to start of data frames including SNAP header*/
+	pData = (PUCHAR) pFrame + LENGTH_802_11;
+
+	/* The only data type will pass to this function is EAPOL frame*/
+	if (pFrame->Hdr.FC.Type == BTYPE_DATA) 
+	{
+		{
+	        *Machine = WPA_STATE_MACHINE;
+			EAPType = *((UCHAR*)pFrame + LENGTH_802_11 + LENGTH_802_1_H + 1);
+	        return (WpaMsgTypeSubst(EAPType, (INT *) MsgType));		
+		}
+	}
+
+	switch (pFrame->Hdr.FC.SubType) 
+	{
+		case SUBTYPE_ASSOC_REQ:
+			*Machine = ASSOC_STATE_MACHINE;
+			*MsgType = MT2_PEER_ASSOC_REQ;
+			break;
+		case SUBTYPE_ASSOC_RSP:
+			*Machine = ASSOC_STATE_MACHINE;
+			*MsgType = MT2_PEER_ASSOC_RSP;
+			break;
+		case SUBTYPE_REASSOC_REQ:
+			*Machine = ASSOC_STATE_MACHINE;
+			*MsgType = MT2_PEER_REASSOC_REQ;
+			break;
+		case SUBTYPE_REASSOC_RSP:
+			*Machine = ASSOC_STATE_MACHINE;
+			*MsgType = MT2_PEER_REASSOC_RSP;
+			break;
+		case SUBTYPE_PROBE_REQ:
+			*Machine = SYNC_STATE_MACHINE;
+			*MsgType = MT2_PEER_PROBE_REQ;
+			break;
+		case SUBTYPE_PROBE_RSP:
+			*Machine = SYNC_STATE_MACHINE;
+			*MsgType = MT2_PEER_PROBE_RSP;
+			break;
+		case SUBTYPE_BEACON:
+			*Machine = SYNC_STATE_MACHINE;
+			*MsgType = MT2_PEER_BEACON;
+			break;
+		case SUBTYPE_ATIM:
+			*Machine = SYNC_STATE_MACHINE;
+			*MsgType = MT2_PEER_ATIM;
+			break;
+		case SUBTYPE_DISASSOC:
+			*Machine = ASSOC_STATE_MACHINE;
+			*MsgType = MT2_PEER_DISASSOC_REQ;
+			break;
+		case SUBTYPE_AUTH:
+			/* get the sequence number from payload 24 Mac Header + 2 bytes algorithm*/
+			NdisMoveMemory(&Seq, &pFrame->Octet[2], sizeof(USHORT));
+			NdisMoveMemory(&Alg, &pFrame->Octet[0], sizeof(USHORT));
+			if (Seq == 1 || Seq == 3) 
+			{
+				*Machine = AUTH_RSP_STATE_MACHINE;
+				*MsgType = MT2_PEER_AUTH_ODD;
+			} 
+			else if (Seq == 2 || Seq == 4) 
+			{
+				if (Alg == AUTH_MODE_OPEN || Alg == AUTH_MODE_KEY)
+				{
+					*Machine = AUTH_STATE_MACHINE;
+					*MsgType = MT2_PEER_AUTH_EVEN;
+				} 
+			} 
+			else 
+			{
+				return FALSE;
+			}
+			break;
+		case SUBTYPE_DEAUTH:
+			*Machine = AUTH_RSP_STATE_MACHINE;
+			*MsgType = MT2_PEER_DEAUTH;
+			break;
+		case SUBTYPE_ACTION:
+			*Machine = ACTION_STATE_MACHINE;
+			/*  Sometimes Sta will return with category bytes with MSB = 1, if they receive catogory out of their support*/
+			if ((pFrame->Octet[0]&0x7F) > MAX_PEER_CATE_MSG) 
+			{
+				*MsgType = MT2_ACT_INVALID;
+			} 
+			else
+			{
+				*MsgType = (pFrame->Octet[0]&0x7F);
+			} 
+			break;
+		default:
+			return FALSE;
+			break;
+	}
+
+	return TRUE;
+}
+#endif /* CONFIG_STA_SUPPORT */
+
+/* ===========================================================================================*/
+/* state_machine.c*/
+/* ===========================================================================================*/
+
+/*! \brief Initialize the state machine.
+ *	\param *S			pointer to the state machine 
+ *	\param	Trans		State machine transition function
+ *	\param	StNr		number of states 
+ *	\param	MsgNr		number of messages 
+ *	\param	DefFunc 	default function, when there is invalid state/message combination 
+ *	\param	InitState	initial state of the state machine 
+ *	\param	Base		StateMachine base, internal use only
+ *	\pre p_sm should be a legal pointer
+ *	\post
+
+ IRQL = PASSIVE_LEVEL
+ 
+ */
+VOID StateMachineInit(
+	IN STATE_MACHINE *S, 
+	IN STATE_MACHINE_FUNC Trans[], 
+	IN ULONG StNr, 
+	IN ULONG MsgNr, 
+	IN STATE_MACHINE_FUNC DefFunc, 
+	IN ULONG InitState, 
+	IN ULONG Base) 
+{
+	ULONG i, j;
+
+	/* set number of states and messages*/
+	S->NrState = StNr;
+	S->NrMsg   = MsgNr;
+	S->Base    = Base;
+
+	S->TransFunc  = Trans;
+
+	/* init all state transition to default function*/
+	for (i = 0; i < StNr; i++) 
+	{
+		for (j = 0; j < MsgNr; j++) 
+		{
+			S->TransFunc[i * MsgNr + j] = DefFunc;
+		}
+	}
+
+	/* set the starting state*/
+	S->CurrState = InitState;
+}
+
+/*! \brief This function fills in the function pointer into the cell in the state machine 
+ *	\param *S	pointer to the state machine
+ *	\param St	state
+ *	\param Msg	incoming message
+ *	\param f	the function to be executed when (state, message) combination occurs at the state machine
+ *	\pre *S should be a legal pointer to the state machine, st, msg, should be all within the range, Base should be set in the initial state
+ *	\post
+
+ IRQL = PASSIVE_LEVEL
+ 
+ */
+VOID StateMachineSetAction(
+	IN STATE_MACHINE *S, 
+	IN ULONG St, 
+	IN ULONG Msg, 
+	IN STATE_MACHINE_FUNC Func) 
+{
+	ULONG MsgIdx;
+
+	MsgIdx = Msg - S->Base;
+
+	if (St < S->NrState && MsgIdx < S->NrMsg) 
+	{
+		/* boundary checking before setting the action*/
+		S->TransFunc[St * S->NrMsg + MsgIdx] = Func;
+	} 
+}
+
+/*! \brief	 This function does the state transition
+ *	\param	 *Adapter the NIC adapter pointer
+ *	\param	 *S 	  the state machine
+ *	\param	 *Elem	  the message to be executed
+ *	\return   None
+ 
+ IRQL = DISPATCH_LEVEL
+ 
+ */
+VOID StateMachinePerformAction(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN STATE_MACHINE *S, 
+	IN MLME_QUEUE_ELEM *Elem,
+	IN ULONG CurrState)
+{
+
+	if (S->TransFunc[(CurrState) * S->NrMsg + Elem->MsgType - S->Base])
+		(*(S->TransFunc[(CurrState) * S->NrMsg + Elem->MsgType - S->Base]))(pAd, Elem);
+}
+
+/*
+	==========================================================================
+	Description:
+		The drop function, when machine executes this, the message is simply 
+		ignored. This function does nothing, the message is freed in 
+		StateMachinePerformAction()
+	==========================================================================
+ */
+VOID Drop(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+{
+}
+
+/*
+	==========================================================================
+	Description:
+	==========================================================================
+ */
+UCHAR RandomByte(
+	IN PRTMP_ADAPTER pAd) 
+{
+	ULONG i;
+	UCHAR R, Result;
+
+	R = 0;
+
+	if (pAd->Mlme.ShiftReg == 0)
+	NdisGetSystemUpTime((ULONG *)&pAd->Mlme.ShiftReg);
+
+	for (i = 0; i < 8; i++) 
+	{
+		if (pAd->Mlme.ShiftReg & 0x00000001) 
+		{
+			pAd->Mlme.ShiftReg = ((pAd->Mlme.ShiftReg ^ LFSR_MASK) >> 1) | 0x80000000;
+			Result = 1;
+		} 
+		else 
+		{
+			pAd->Mlme.ShiftReg = pAd->Mlme.ShiftReg >> 1;
+			Result = 0;
+		}
+		R = (R << 1) | Result;
+	}
+
+	return R;
+}
+
+
+UCHAR RandomByte2(
+        IN PRTMP_ADAPTER pAd)
+{
+	UINT32 a,b;
+	UCHAR value, value1 = 0, value2 = 0, value3 = 0, value4 = 0, value5 = 0;
+
+	/*MAC statistic related*/
+	RTMP_IO_READ32(pAd, RX_STA_CNT1, &a);
+	a &= 0x0000ffff;
+	RTMP_IO_READ32(pAd, RX_STA_CNT0, &b); 
+	b &= 0x0000ffff;
+	value = (a<<16)|b;
+
+	/*R50~R54: RSSI or SNR related*/
+	RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R50, &value1);
+	RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R51, &value2);
+	RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R52, &value3);
+	RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R53, &value4);
+	RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R54, &value5);
+
+	return value^value1^value2^value3^value4^value5^RandomByte(pAd);
+}
+
+
+/*
+	========================================================================
+
+	Routine Description:
+		Verify the support rate for different PHY type
+
+	Arguments:
+		pAd 				Pointer to our adapter
+
+	Return Value:
+		None
+
+	IRQL = PASSIVE_LEVEL
+
+	========================================================================
+*/
+VOID	RTMPCheckRates(
+	IN		PRTMP_ADAPTER	pAd,
+	IN OUT	UCHAR			SupRate[],
+	IN OUT	UCHAR			*SupRateLen)
+{
+	UCHAR	RateIdx, i, j;
+	UCHAR	NewRate[12], NewRateLen;
+	
+	NewRateLen = 0;
+	
+	if (pAd->CommonCfg.PhyMode == PHY_11B)
+		RateIdx = 4;
+	else
+		RateIdx = 12;
+
+	/* Check for support rates exclude basic rate bit	*/
+	for (i = 0; i < *SupRateLen; i++)
+		for (j = 0; j < RateIdx; j++)
+			if ((SupRate[i] & 0x7f) == RateIdTo500Kbps[j])
+				NewRate[NewRateLen++] = SupRate[i];
+			
+	*SupRateLen = NewRateLen;
+	NdisMoveMemory(SupRate, NewRate, NewRateLen);
+}
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef DOT11_N_SUPPORT
+BOOLEAN RTMPCheckChannel(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR		CentralChannel,
+	IN UCHAR		Channel)
+{
+	UCHAR		k;
+	UCHAR		UpperChannel = 0, LowerChannel = 0;
+	UCHAR		NoEffectChannelinList = 0;
+	
+	/* Find upper and lower channel according to 40MHz current operation. */
+	if (CentralChannel < Channel)
+	{
+		UpperChannel = Channel;
+		if (CentralChannel > 2)
+			LowerChannel = CentralChannel - 2;
+		else
+			return FALSE;
+	}
+	else if (CentralChannel > Channel)
+	{
+		UpperChannel = CentralChannel + 2;
+		LowerChannel = Channel;
+	}
+
+	for (k = 0;k < pAd->ChannelListNum;k++)
+	{
+		if (pAd->ChannelList[k].Channel == UpperChannel)
+		{
+			NoEffectChannelinList ++;
+		}
+		if (pAd->ChannelList[k].Channel == LowerChannel)
+		{
+			NoEffectChannelinList ++;
+		}
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE,("Total Channel in Channel List = [%d]\n", NoEffectChannelinList));
+	if (NoEffectChannelinList == 2)
+		return TRUE;
+	else
+		return FALSE;
+}
+
+/*
+	========================================================================
+
+	Routine Description:
+		Verify the support rate for HT phy type
+
+	Arguments:
+		pAd 				Pointer to our adapter
+
+	Return Value:
+		FALSE if pAd->CommonCfg.SupportedHtPhy doesn't accept the pHtCapability.  (AP Mode)
+
+	IRQL = PASSIVE_LEVEL
+
+	========================================================================
+*/
+BOOLEAN 	RTMPCheckHt(
+	IN	PRTMP_ADAPTER			pAd,
+	IN	UCHAR					Wcid,
+	IN 	HT_CAPABILITY_IE		*pHtCapability,
+	IN 	ADD_HT_INFO_IE			*pAddHtInfo)
+{
+	if (Wcid >= MAX_LEN_OF_MAC_TABLE)
+		return FALSE;
+
+	/* If use AMSDU, set flag.*/
+	if (pAd->CommonCfg.DesiredHtPhy.AmsduEnable)
+		CLIENT_STATUS_SET_FLAG(&pAd->MacTab.Content[Wcid], fCLIENT_STATUS_AMSDU_INUSED);
+	/* Save Peer Capability*/
+	if (pHtCapability->HtCapInfo.ShortGIfor20)
+		CLIENT_STATUS_SET_FLAG(&pAd->MacTab.Content[Wcid], fCLIENT_STATUS_SGI20_CAPABLE);
+	if (pHtCapability->HtCapInfo.ShortGIfor40)
+		CLIENT_STATUS_SET_FLAG(&pAd->MacTab.Content[Wcid], fCLIENT_STATUS_SGI40_CAPABLE);
+	if (pHtCapability->HtCapInfo.TxSTBC)
+		CLIENT_STATUS_SET_FLAG(&pAd->MacTab.Content[Wcid], fCLIENT_STATUS_TxSTBC_CAPABLE);
+	if (pHtCapability->HtCapInfo.RxSTBC)
+		CLIENT_STATUS_SET_FLAG(&pAd->MacTab.Content[Wcid], fCLIENT_STATUS_RxSTBC_CAPABLE);
+	if (pAd->CommonCfg.bRdg && pHtCapability->ExtHtCapInfo.RDGSupport)
+	{
+		CLIENT_STATUS_SET_FLAG(&pAd->MacTab.Content[Wcid], fCLIENT_STATUS_RDG_CAPABLE);
+	}
+	
+	if (Wcid < MAX_LEN_OF_MAC_TABLE)
+	{
+		pAd->MacTab.Content[Wcid].MpduDensity = pHtCapability->HtCapParm.MpduDensity;
+	}
+
+	/* Will check ChannelWidth for MCSSet[4] below*/
+	pAd->MlmeAux.HtCapability.MCSSet[0] = 0xff;
+	pAd->MlmeAux.HtCapability.MCSSet[2] = 0x00;
+	pAd->MlmeAux.HtCapability.MCSSet[4] = 0x1;
+    switch (pAd->CommonCfg.RxStream)
+	{
+		case 1:			
+			pAd->MlmeAux.HtCapability.MCSSet[0] = 0xff;
+			pAd->MlmeAux.HtCapability.MCSSet[1] = 0x00;
+            pAd->MlmeAux.HtCapability.MCSSet[2] = 0x00;
+            pAd->MlmeAux.HtCapability.MCSSet[3] = 0x00;
+			break;
+		case 2:
+			pAd->MlmeAux.HtCapability.MCSSet[0] = 0xff;
+			pAd->MlmeAux.HtCapability.MCSSet[1] = 0xff;
+            pAd->MlmeAux.HtCapability.MCSSet[2] = 0x00;
+            pAd->MlmeAux.HtCapability.MCSSet[3] = 0x00;
+			break;
+		case 3:				
+			pAd->MlmeAux.HtCapability.MCSSet[0] = 0xff;
+			pAd->MlmeAux.HtCapability.MCSSet[1] = 0xff;
+            pAd->MlmeAux.HtCapability.MCSSet[2] = 0xff;
+            pAd->MlmeAux.HtCapability.MCSSet[3] = 0x00;
+			break;
+	}	
+
+	pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth = pAddHtInfo->AddHtInfo.RecomWidth & pAd->CommonCfg.DesiredHtPhy.ChannelWidth;
+		
+	/*
+		If both station and AP use 40MHz, still need to check if the 40MHZ band's legality in my country region
+		If this 40MHz wideband is not allowed in my country list, use bandwidth 20MHZ instead,
+	*/
+	if (pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth == BW_40)
+	{
+		if (RTMPCheckChannel(pAd, pAd->MlmeAux.CentralChannel, pAd->MlmeAux.Channel) == FALSE)
+		{
+			pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth = BW_20;
+		}
+	}
+		
+    DBGPRINT(RT_DEBUG_TRACE, ("RTMPCheckHt:: HtCapInfo.ChannelWidth=%d, RecomWidth=%d, DesiredHtPhy.ChannelWidth=%d, BW40MAvailForA/G=%d/%d, PhyMode=%d \n",
+		pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth, pAddHtInfo->AddHtInfo.RecomWidth, pAd->CommonCfg.DesiredHtPhy.ChannelWidth,
+		pAd->NicConfig2.field.BW40MAvailForA, pAd->NicConfig2.field.BW40MAvailForG, pAd->CommonCfg.PhyMode));
+    
+	pAd->MlmeAux.HtCapability.HtCapInfo.GF =  pHtCapability->HtCapInfo.GF &pAd->CommonCfg.DesiredHtPhy.GF;
+
+	/* Send Assoc Req with my HT capability.*/
+	pAd->MlmeAux.HtCapability.HtCapInfo.AMsduSize =  pAd->CommonCfg.DesiredHtPhy.AmsduSize;
+	pAd->MlmeAux.HtCapability.HtCapInfo.MimoPs =  pAd->CommonCfg.DesiredHtPhy.MimoPs;
+	pAd->MlmeAux.HtCapability.HtCapInfo.ShortGIfor20 =  (pAd->CommonCfg.DesiredHtPhy.ShortGIfor20) & (pHtCapability->HtCapInfo.ShortGIfor20);
+	pAd->MlmeAux.HtCapability.HtCapInfo.ShortGIfor40 =  (pAd->CommonCfg.DesiredHtPhy.ShortGIfor40) & (pHtCapability->HtCapInfo.ShortGIfor40);
+	pAd->MlmeAux.HtCapability.HtCapInfo.TxSTBC =  (pAd->CommonCfg.DesiredHtPhy.TxSTBC)&(pHtCapability->HtCapInfo.RxSTBC);
+	pAd->MlmeAux.HtCapability.HtCapInfo.RxSTBC =  (pAd->CommonCfg.DesiredHtPhy.RxSTBC)&(pHtCapability->HtCapInfo.TxSTBC);
+	pAd->MlmeAux.HtCapability.HtCapParm.MaxRAmpduFactor = pAd->CommonCfg.DesiredHtPhy.MaxRAmpduFactor;
+    pAd->MlmeAux.HtCapability.HtCapParm.MpduDensity = pAd->CommonCfg.HtCapability.HtCapParm.MpduDensity;
+	pAd->MlmeAux.HtCapability.ExtHtCapInfo.PlusHTC = pHtCapability->ExtHtCapInfo.PlusHTC;
+	pAd->MacTab.Content[Wcid].HTCapability.ExtHtCapInfo.PlusHTC = pHtCapability->ExtHtCapInfo.PlusHTC;
+	if (pAd->CommonCfg.bRdg)
+	{
+		pAd->MlmeAux.HtCapability.ExtHtCapInfo.RDGSupport = pHtCapability->ExtHtCapInfo.RDGSupport;
+        pAd->MlmeAux.HtCapability.ExtHtCapInfo.PlusHTC = 1;
+	}
+	
+    if (pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth == BW_20)
+        pAd->MlmeAux.HtCapability.MCSSet[4] = 0x0;  /* BW20 can't transmit MCS32*/
+
+	COPY_AP_HTSETTINGS_FROM_BEACON(pAd, pHtCapability);
+	return TRUE;
+}
+#endif /* DOT11_N_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+
+/*
+	========================================================================
+
+	Routine Description:
+		Verify the support rate for different PHY type
+
+	Arguments:
+		pAd 				Pointer to our adapter
+
+	Return Value:
+		None
+
+	IRQL = PASSIVE_LEVEL
+
+	========================================================================
+*/
+VOID RTMPUpdateMlmeRate(
+	IN PRTMP_ADAPTER	pAd)
+{
+	UCHAR	MinimumRate;
+	UCHAR	ProperMlmeRate; /*= RATE_54;*/
+	UCHAR	i, j, RateIdx = 12; /*1, 2, 5.5, 11, 6, 9, 12, 18, 24, 36, 48, 54*/
+	BOOLEAN	bMatch = FALSE;
+
+	switch (pAd->CommonCfg.PhyMode) 
+	{
+		case PHY_11B:
+			ProperMlmeRate = RATE_11;
+			MinimumRate = RATE_1;
+			break;
+		case PHY_11BG_MIXED:
+#ifdef DOT11_N_SUPPORT
+		case PHY_11ABGN_MIXED:
+		case PHY_11BGN_MIXED:
+#endif /* DOT11_N_SUPPORT */
+			if ((pAd->MlmeAux.SupRateLen == 4) &&
+				(pAd->MlmeAux.ExtRateLen == 0))
+				/* B only AP*/
+				ProperMlmeRate = RATE_11;
+			else
+				ProperMlmeRate = RATE_24;
+			
+			if (pAd->MlmeAux.Channel <= 14)
+			MinimumRate = RATE_1;
+			else
+				MinimumRate = RATE_6;
+			break;
+		case PHY_11A:
+#ifdef DOT11_N_SUPPORT
+		case PHY_11N_2_4G:	/* rt2860 need to check mlmerate for 802.11n*/
+		case PHY_11GN_MIXED:
+		case PHY_11AGN_MIXED:
+		case PHY_11AN_MIXED:
+		case PHY_11N_5G:	
+#endif /* DOT11_N_SUPPORT */
+			ProperMlmeRate = RATE_24;
+			MinimumRate = RATE_6;
+			break;
+		case PHY_11ABG_MIXED:
+			ProperMlmeRate = RATE_24;
+			if (pAd->MlmeAux.Channel <= 14)
+			   MinimumRate = RATE_1;
+			else
+				MinimumRate = RATE_6;
+			break;
+		default: /* error*/
+			ProperMlmeRate = RATE_1;
+			MinimumRate = RATE_1;
+			break;
+	}
+
+	for (i = 0; i < pAd->MlmeAux.SupRateLen; i++)
+	{
+		for (j = 0; j < RateIdx; j++)
+		{
+			if ((pAd->MlmeAux.SupRate[i] & 0x7f) == RateIdTo500Kbps[j])
+			{
+				if (j == ProperMlmeRate)
+				{
+					bMatch = TRUE;
+					break;
+				}
+			}			
+		}
+
+		if (bMatch)
+			break;
+	}
+
+	if (bMatch == FALSE)
+	{
+	for (i = 0; i < pAd->MlmeAux.ExtRateLen; i++)
+	{
+		for (j = 0; j < RateIdx; j++)
+		{
+			if ((pAd->MlmeAux.ExtRate[i] & 0x7f) == RateIdTo500Kbps[j])
+			{
+					if (j == ProperMlmeRate)
+					{
+						bMatch = TRUE;
+						break;
+					}
+			}				
+		}
+		
+			if (bMatch)
+			break;		
+	}
+	}
+
+	if (bMatch == FALSE)
+	{
+		ProperMlmeRate = MinimumRate;
+	}
+
+	pAd->CommonCfg.MlmeRate = MinimumRate;
+	pAd->CommonCfg.RtsRate = ProperMlmeRate;
+	if (pAd->CommonCfg.MlmeRate >= RATE_6)
+	{
+		pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
+		pAd->CommonCfg.MlmeTransmit.field.MCS = OfdmRateToRxwiMCS[pAd->CommonCfg.MlmeRate];
+		pAd->MacTab.Content[BSS0Mcast_WCID].HTPhyMode.field.MODE = MODE_OFDM;
+		pAd->MacTab.Content[BSS0Mcast_WCID].HTPhyMode.field.MCS = OfdmRateToRxwiMCS[pAd->CommonCfg.MlmeRate];
+	}
+	else
+	{
+		pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_CCK;
+		pAd->CommonCfg.MlmeTransmit.field.MCS = pAd->CommonCfg.MlmeRate;
+		pAd->MacTab.Content[BSS0Mcast_WCID].HTPhyMode.field.MODE = MODE_CCK;
+		pAd->MacTab.Content[BSS0Mcast_WCID].HTPhyMode.field.MCS = pAd->CommonCfg.MlmeRate;
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("RTMPUpdateMlmeRate ==>   MlmeTransmit = 0x%x  \n" , pAd->CommonCfg.MlmeTransmit.word));
+}
+
+CHAR RTMPMaxRssi(
+	IN PRTMP_ADAPTER	pAd,
+	IN CHAR				Rssi0,
+	IN CHAR				Rssi1,
+	IN CHAR				Rssi2)
+{
+	CHAR	larger = -127;
+	
+	if ((pAd->Antenna.field.RxPath == 1) && (Rssi0 != 0))
+	{
+		larger = Rssi0;
+	}
+
+	if ((pAd->Antenna.field.RxPath >= 2) && (Rssi1 != 0))
+	{
+		larger = max(Rssi0, Rssi1);
+	}
+	
+	if ((pAd->Antenna.field.RxPath == 3) && (Rssi2 != 0))
+	{
+		larger = max(larger, Rssi2);
+	}
+
+	if (larger == -127)
+		larger = 0;
+
+	return larger;
+}
+
+
+CHAR RTMPMinSnr(
+	IN PRTMP_ADAPTER	pAd,
+	IN CHAR				Snr0,
+	IN CHAR				Snr1)
+{
+	CHAR	smaller = Snr0;
+	
+	if (pAd->Antenna.field.RxPath == 1) 
+	{
+		smaller = Snr0;
+	}
+
+	if ((pAd->Antenna.field.RxPath >= 2) && (Snr1 != 0))
+	{
+		smaller = min(Snr0, Snr1);
+	}
+ 
+	return smaller;
+}
+
+/*
+    ========================================================================
+    Routine Description:
+        Periodic evaluate antenna link status
+        
+    Arguments:
+        pAd         - Adapter pointer
+        
+    Return Value:
+        None
+        
+    ========================================================================
+*/
+VOID AsicEvaluateRxAnt(
+	IN PRTMP_ADAPTER	pAd)
+{
+#ifdef CONFIG_STA_SUPPORT
+	UCHAR	BBPR3 = 0;
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef RALINK_ATE
+	if (ATE_ON(pAd))
+		return;
+#endif /* RALINK_ATE */
+
+#ifdef RTMP_MAC_USB
+#ifdef CONFIG_STA_SUPPORT
+	if(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF))
+		return;
+#endif /* CONFIG_STA_SUPPORT */
+#endif /* RTMP_MAC_USB */
+
+	if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS	|
+							fRTMP_ADAPTER_HALT_IN_PROGRESS	|
+							fRTMP_ADAPTER_RADIO_OFF			|
+							fRTMP_ADAPTER_NIC_NOT_EXIST		|
+							fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS) ||
+							OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE) 
+#ifdef ANT_DIVERSITY_SUPPORT
+							|| (pAd->EepromAccess)
+#endif /* ANT_DIVERSITY_SUPPORT */
+							)
+		return;
+	
+#ifdef ANT_DIVERSITY_SUPPORT
+	if (((pAd->NicConfig2.field.AntDiversity) 
+#if TXRX_SW_ANTDIV_SUPPORT
+		|| (pAd->chipCap.bTxRxSwAntDiv)	
+#endif
+		) && (pAd->CommonCfg.bRxAntDiversity == ANT_SW_DIVERSITY_ENABLE))
+	{
+		/* two antenna selection mechanism- one is antenna diversity, the other is failed antenna remove*/
+		/* one is antenna diversity:there is only one antenna can rx and tx*/
+		/* the other is failed antenna remove:two physical antenna can rx and tx*/
+			DBGPRINT(RT_DEBUG_TRACE,("AntDiv - before evaluate Pair1-Ant (%d,%d)\n",
+				pAd->RxAnt.Pair1PrimaryRxAnt, pAd->RxAnt.Pair1SecondaryRxAnt));
+
+			AsicSetRxAnt(pAd, pAd->RxAnt.Pair1SecondaryRxAnt);
+				
+			pAd->RxAnt.EvaluatePeriod = 1; /* 1:Means switch to SecondaryRxAnt, 0:Means switch to Pair1PrimaryRxAnt*/
+			pAd->RxAnt.FirstPktArrivedWhenEvaluate = FALSE;
+			pAd->RxAnt.RcvPktNumWhenEvaluate = 0;
+
+			/* a one-shot timer to end the evalution*/
+			/* dynamic adjust antenna evaluation period according to the traffic*/
+			if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED) ||
+				OPSTATUS_TEST_FLAG(pAd, fOP_AP_STATUS_MEDIA_STATE_CONNECTED))
+#ifdef CONFIG_STA_SUPPORT
+				RTMPSetTimer(&pAd->Mlme.RxAntEvalTimer, 100);
+			else
+#endif /* CONFIG_STA_SUPPORT */
+				RTMPSetTimer(&pAd->Mlme.RxAntEvalTimer, 300);
+		}
+		else
+#endif /* ANT_DIVERSITY_SUPPORT */
+	{
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+
+			if (pAd->StaCfg.Psm == PWR_SAVE)
+				return;
+
+			RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
+			BBPR3 &= (~0x18);
+			if(pAd->Antenna.field.RxPath == 3)
+			{
+				BBPR3 |= (0x10);
+			}
+			else if(pAd->Antenna.field.RxPath == 2)
+			{
+				BBPR3 |= (0x8);
+			}
+			else if(pAd->Antenna.field.RxPath == 1)
+			{
+				BBPR3 |= (0x0);
+			}
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
+			if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED)
+			)
+			{
+				ULONG	TxTotalCnt = pAd->RalinkCounters.OneSecTxNoRetryOkCount + 
+									pAd->RalinkCounters.OneSecTxRetryOkCount + 
+									pAd->RalinkCounters.OneSecTxFailCount;
+
+				/* dynamic adjust antenna evaluation period according to the traffic*/
+				if (TxTotalCnt > 50)
+				{
+					RTMPSetTimer(&pAd->Mlme.RxAntEvalTimer, 20);
+					pAd->Mlme.bLowThroughput = FALSE;
+				}
+				else
+				{
+					RTMPSetTimer(&pAd->Mlme.RxAntEvalTimer, 300);
+					pAd->Mlme.bLowThroughput = TRUE;
+				}
+			}
+		}
+#endif /* CONFIG_STA_SUPPORT */
+	}
+}
+
+/*
+    ========================================================================
+    Routine Description:
+        After evaluation, check antenna link status
+        
+    Arguments:
+        pAd         - Adapter pointer
+        
+    Return Value:
+        None
+        
+    ========================================================================
+*/
+VOID AsicRxAntEvalTimeout(
+	IN PVOID SystemSpecific1, 
+	IN PVOID FunctionContext, 
+	IN PVOID SystemSpecific2, 
+	IN PVOID SystemSpecific3) 
+{
+	RTMP_ADAPTER	*pAd = (RTMP_ADAPTER *)FunctionContext;
+#ifdef CONFIG_STA_SUPPORT
+	UCHAR			BBPR3 = 0;
+	CHAR			larger = -127, rssi0, rssi1, rssi2;
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef ANT_DIVERSITY_SUPPORT
+	BOOLEAN			bSwapAnt = FALSE;
+#endif /* ANT_DIVERSITY_SUPPORT */
+
+
+#ifdef RALINK_ATE
+	if (ATE_ON(pAd))
+		return;
+#endif /* RALINK_ATE */
+
+	if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS	|
+							fRTMP_ADAPTER_HALT_IN_PROGRESS	|
+							fRTMP_ADAPTER_RADIO_OFF			|
+							fRTMP_ADAPTER_NIC_NOT_EXIST) ||
+							OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE) 
+#ifdef ANT_DIVERSITY_SUPPORT
+							|| (pAd->EepromAccess)
+#endif /* ANT_DIVERSITY_SUPPORT */
+							)
+		return;
+
+#ifdef ANT_DIVERSITY_SUPPORT
+	if (((pAd->NicConfig2.field.AntDiversity) 
+#if TXRX_SW_ANTDIV_SUPPORT
+		|| (pAd->chipCap.bTxRxSwAntDiv)	
+#endif
+	) && (pAd->CommonCfg.bRxAntDiversity == ANT_SW_DIVERSITY_ENABLE))
+	{
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+			if ((pAd->RxAnt.RcvPktNumWhenEvaluate != 0) && (pAd->RxAnt.Pair1AvgRssi[pAd->RxAnt.Pair1SecondaryRxAnt] >= pAd->RxAnt.Pair1AvgRssi[pAd->RxAnt.Pair1PrimaryRxAnt]))
+				bSwapAnt = TRUE;
+#endif /* CONFIG_STA_SUPPORT */
+		if (bSwapAnt == TRUE)	
+			{
+				UCHAR			temp;
+
+				
+				/* select PrimaryRxAntPair*/
+				/*    Role change, Used Pair1SecondaryRxAnt as PrimaryRxAntPair.*/
+				/*    Since Pair1SecondaryRxAnt Quality good than Pair1PrimaryRxAnt*/
+				
+				temp = pAd->RxAnt.Pair1PrimaryRxAnt;
+				pAd->RxAnt.Pair1PrimaryRxAnt = pAd->RxAnt.Pair1SecondaryRxAnt;
+				pAd->RxAnt.Pair1SecondaryRxAnt = temp;
+
+#ifdef CONFIG_STA_SUPPORT
+				pAd->RxAnt.Pair1LastAvgRssi = (pAd->RxAnt.Pair1AvgRssi[pAd->RxAnt.Pair1SecondaryRxAnt] >> 3);
+#endif /* CONFIG_STA_SUPPORT */
+/*				pAd->RxAnt.EvaluateStableCnt = 0;*/
+			}
+			else
+			{
+				/* if the evaluated antenna is not better than original, switch back to original antenna*/
+				AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
+				pAd->RxAnt.EvaluateStableCnt ++;
+			}
+
+			pAd->RxAnt.EvaluatePeriod = 0; /* 1:Means switch to SecondaryRxAnt, 0:Means switch to Pair1PrimaryRxAnt*/
+
+#ifdef CONFIG_STA_SUPPORT
+			DBGPRINT(RT_DEBUG_TRACE,("AsicRxAntEvalAction::After Eval(fix in #%d), <%d, %d>, RcvPktNumWhenEvaluate=%ld\n",
+					pAd->RxAnt.Pair1PrimaryRxAnt, (pAd->RxAnt.Pair1AvgRssi[0] >> 3), (pAd->RxAnt.Pair1AvgRssi[1] >> 3), pAd->RxAnt.RcvPktNumWhenEvaluate));
+#endif /* CONFIG_STA_SUPPORT */
+		}
+		else
+#endif /* ANT_DIVERSITY_SUPPORT */
+	{
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			if (pAd->StaCfg.Psm == PWR_SAVE)
+				return;
+
+
+			/* if the traffic is low, use average rssi as the criteria*/
+			if (pAd->Mlme.bLowThroughput == TRUE)
+			{
+				rssi0 = pAd->StaCfg.RssiSample.LastRssi0;
+				rssi1 = pAd->StaCfg.RssiSample.LastRssi1;
+				rssi2 = pAd->StaCfg.RssiSample.LastRssi2;
+			}
+			else
+			{
+				rssi0 = pAd->StaCfg.RssiSample.AvgRssi0;
+				rssi1 = pAd->StaCfg.RssiSample.AvgRssi1;
+				rssi2 = pAd->StaCfg.RssiSample.AvgRssi2;
+			}
+
+			if(pAd->Antenna.field.RxPath == 3)
+			{
+				larger = max(rssi0, rssi1);
+#ifdef DOT11N_SS3_SUPPORT
+				if (IS_RT2883(pAd) || IS_RT3883(pAd) || IS_RT3593(pAd))
+				{
+					pAd->Mlme.RealRxPath = 3;
+				}
+				else
+#endif /* DOT11N_SS3_SUPPORT */
+				if (larger > (rssi2 + 20))
+					pAd->Mlme.RealRxPath = 2;
+				else
+					pAd->Mlme.RealRxPath = 3;
+			}
+			else if(pAd->Antenna.field.RxPath == 2)
+			{
+				if (rssi0 > (rssi1 + 20))
+					pAd->Mlme.RealRxPath = 1;
+				else
+					pAd->Mlme.RealRxPath = 2;
+			}
+
+			RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
+			BBPR3 &= (~0x18);
+			if(pAd->Mlme.RealRxPath == 3)
+			{
+				BBPR3 |= (0x10);
+			}
+			else if(pAd->Mlme.RealRxPath == 2)
+			{
+				BBPR3 |= (0x8);
+			}
+			else if(pAd->Mlme.RealRxPath == 1)
+			{
+				BBPR3 |= (0x0);
+			}
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
+		}
+#endif /* CONFIG_STA_SUPPORT */
+	}
+}
+
+
+VOID APSDPeriodicExec(
+	IN PVOID SystemSpecific1, 
+	IN PVOID FunctionContext, 
+	IN PVOID SystemSpecific2, 
+	IN PVOID SystemSpecific3) 
+{
+	RTMP_ADAPTER *pAd = (RTMP_ADAPTER *)FunctionContext;
+
+	if (!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED) &&
+		!OPSTATUS_TEST_FLAG(pAd, fOP_AP_STATUS_MEDIA_STATE_CONNECTED))
+		return;
+
+	pAd->CommonCfg.TriggerTimerCount++;
+
+/* Driver should not send trigger frame, it should be send by application layer*/
+/*
+	if (pAd->CommonCfg.bAPSDCapable && pAd->CommonCfg.APEdcaParm.bAPSDCapable
+		&& (pAd->CommonCfg.bNeedSendTriggerFrame ||
+		(((pAd->CommonCfg.TriggerTimerCount%20) == 19) && (!pAd->CommonCfg.bAPSDAC_BE || !pAd->CommonCfg.bAPSDAC_BK || !pAd->CommonCfg.bAPSDAC_VI || !pAd->CommonCfg.bAPSDAC_VO))))
+	{
+		DBGPRINT(RT_DEBUG_TRACE,("Sending trigger frame and enter service period when support APSD\n"));
+		RTMPSendNullFrame(pAd, pAd->CommonCfg.TxRate, TRUE);
+		pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
+		pAd->CommonCfg.TriggerTimerCount = 0;
+		pAd->CommonCfg.bInServicePeriod = TRUE;
+	}*/
+}
+
+/*
+    ========================================================================
+    Routine Description:
+        Set/reset MAC registers according to bPiggyBack parameter
+        
+    Arguments:
+        pAd         - Adapter pointer
+        bPiggyBack  - Enable / Disable Piggy-Back
+
+    Return Value:
+        None
+        
+    ========================================================================
+*/
+VOID RTMPSetPiggyBack(
+    IN PRTMP_ADAPTER    pAd,
+    IN BOOLEAN          bPiggyBack)
+{
+	TX_LINK_CFG_STRUC  TxLinkCfg;
+    
+	RTMP_IO_READ32(pAd, TX_LINK_CFG, &TxLinkCfg.word);
+
+	TxLinkCfg.field.TxCFAckEn = bPiggyBack;
+	RTMP_IO_WRITE32(pAd, TX_LINK_CFG, TxLinkCfg.word);
+}
+
+/*
+    ========================================================================
+    Routine Description:
+        check if this entry need to switch rate automatically
+        
+    Arguments:
+        pAd         
+        pEntry 	 	
+
+    Return Value:
+        TURE
+        FALSE
+        
+    ========================================================================
+*/
+BOOLEAN RTMPCheckEntryEnableAutoRateSwitch(
+	IN PRTMP_ADAPTER    pAd,
+	IN PMAC_TABLE_ENTRY	pEntry)	
+{
+	BOOLEAN		result = TRUE;
+
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		/* only associated STA counts*/
+		if ((pEntry && IS_ENTRY_CLIENT(pEntry) && (pEntry->Sst == SST_ASSOC))
+#ifdef QOS_DLS_SUPPORT
+			|| (pEntry && IS_ENTRY_DLS(pEntry))
+#endif /* QOS_DLS_SUPPORT */
+			)
+		{
+			result = pAd->StaCfg.bAutoTxRateSwitch;
+		}
+		else
+			result = FALSE;
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+
+
+	return result;
+}
+
+
+BOOLEAN RTMPAutoRateSwitchCheck(
+	IN PRTMP_ADAPTER    pAd)	
+{			
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		if (pAd->StaCfg.bAutoTxRateSwitch)
+			return TRUE;
+	}
+#endif /* CONFIG_STA_SUPPORT */
+	return FALSE;
+}
+
+
+/*
+    ========================================================================
+    Routine Description:
+        check if this entry need to fix tx legacy rate
+        
+    Arguments:
+        pAd         
+        pEntry 	 	
+
+    Return Value:
+        TURE
+        FALSE
+        
+    ========================================================================
+*/
+UCHAR RTMPStaFixedTxMode(
+	IN PRTMP_ADAPTER    pAd,
+	IN PMAC_TABLE_ENTRY	pEntry)	
+{
+	UCHAR	tx_mode = FIXED_TXMODE_HT;
+
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		tx_mode = (UCHAR)pAd->StaCfg.DesiredTransmitSetting.field.FixedTxMode;
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	return tx_mode;
+}
+
+/*
+    ========================================================================
+    Routine Description:
+        Overwrite HT Tx Mode by Fixed Legency Tx Mode, if specified.
+        
+    Arguments:
+        pAd         
+        pEntry 	 	
+
+    Return Value:
+        TURE
+        FALSE
+        
+    ========================================================================
+*/
+VOID RTMPUpdateLegacyTxSetting(
+		UCHAR				fixed_tx_mode,
+		PMAC_TABLE_ENTRY	pEntry)
+{
+	HTTRANSMIT_SETTING TransmitSetting;
+	
+	if (fixed_tx_mode == FIXED_TXMODE_HT)
+		return;
+							 				
+	TransmitSetting.word = 0;
+
+	TransmitSetting.field.MODE = pEntry->HTPhyMode.field.MODE;
+	TransmitSetting.field.MCS = pEntry->HTPhyMode.field.MCS;
+						
+	if (fixed_tx_mode == FIXED_TXMODE_CCK)
+	{
+		TransmitSetting.field.MODE = MODE_CCK;
+		/* CCK mode allow MCS 0~3*/
+		if (TransmitSetting.field.MCS > MCS_3)
+			TransmitSetting.field.MCS = MCS_3;
+	}
+	else 
+	{
+		TransmitSetting.field.MODE = MODE_OFDM;
+		/* OFDM mode allow MCS 0~7*/
+		if (TransmitSetting.field.MCS > MCS_7)
+			TransmitSetting.field.MCS = MCS_7;
+	}
+	
+	if (pEntry->HTPhyMode.field.MODE >= TransmitSetting.field.MODE)
+	{
+		pEntry->HTPhyMode.word = TransmitSetting.word;
+		DBGPRINT(RT_DEBUG_TRACE, ("RTMPUpdateLegacyTxSetting : wcid-%d, MODE=%s, MCS=%d \n", 
+				pEntry->Aid, GetPhyMode(pEntry->HTPhyMode.field.MODE), pEntry->HTPhyMode.field.MCS));		
+	}													
+	else
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s : the fixed TxMode is invalid \n", __FUNCTION__));	
+	}
+}
+
+#ifdef CONFIG_STA_SUPPORT
+/*
+	==========================================================================
+	Description:
+		dynamic tune BBP R66 to find a balance between sensibility and 
+		noise isolation
+
+	IRQL = DISPATCH_LEVEL
+
+	==========================================================================
+ */
+VOID AsicStaBbpTuning(
+	IN PRTMP_ADAPTER pAd)
+{
+	UCHAR	OrigR66Value = 0, R66;/*, R66UpperBound = 0x30, R66LowerBound = 0x30;*/
+	CHAR	Rssi;
+
+	/* 2860C did not support Fase CCA, therefore can't tune*/
+	if (pAd->MACVersion == 0x28600100)
+		return;
+
+	
+	/* work as a STA*/
+	
+	if (pAd->Mlme.CntlMachine.CurrState != CNTL_IDLE)  /* no R66 tuning when SCANNING*/
+		return;
+
+	if ((pAd->OpMode == OPMODE_STA) 
+		&& (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED)
+			)
+		&& !(OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE))
+		)
+	{
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R66, &OrigR66Value);
+		R66 = OrigR66Value;
+		
+		if (pAd->Antenna.field.RxPath > 1)
+			Rssi = (pAd->StaCfg.RssiSample.AvgRssi0 + pAd->StaCfg.RssiSample.AvgRssi1) >> 1;
+		else
+			Rssi = pAd->StaCfg.RssiSample.AvgRssi0;
+
+		RTMP_CHIP_ASIC_STA_BBP_ADJUST(pAd, Rssi, R66);
+
+
+	}
+}
+#endif /* CONFIG_STA_SUPPORT */
+
+VOID RTMPSetAGCInitValue(
+	IN PRTMP_ADAPTER	pAd,
+	IN UCHAR			BandWidth)
+{
+	RTMP_CHIP_ASIC_AGC_INIT_VALUE_SET(pAd, BandWidth);
+
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Check if the channel has the property.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	ChanNum			- channel number
+	Property		- channel property, CHANNEL_PASSIVE_SCAN, etc.
+
+Return Value:
+	TRUE			- YES
+	FALSE			- NO
+
+Note:
+========================================================================
+*/
+BOOLEAN CHAN_PropertyCheck(
+	IN PRTMP_ADAPTER	pAd,
+	IN UINT32			ChanNum,
+	IN UCHAR			Property)
+{
+	UINT32 IdChan;
+
+
+	/* look for all registered channels */
+	for(IdChan=0; IdChan<pAd->ChannelListNum; IdChan++)
+	{
+		if (pAd->ChannelList[IdChan].Channel == ChanNum)
+		{
+			if ((pAd->ChannelList[IdChan].Flags & Property) == Property)
+				return TRUE; /* same property */
+			/* End of if */
+
+			break;
+		} /* End of if */
+	} /* End of for */
+
+	return FALSE;
+}
+
+
+
+/* Enable the stream mode*/
+
+/* Parameters*/
+/*	pAd: The adapter data structure*/
+
+/* Return Value:*/
+/*	None*/
+
+VOID AsicEnableStreamMode(
+	IN PRTMP_ADAPTER pAd)
+{
+	TX_CHAIN_ADDR0_L_STRUC TxChainAddr0L = {{0}};
+	TX_CHAIN_ADDR0_H_STRUC TxChainAddr0H = {{0}};
+	TX_CHAIN_ADDR1_H_STRUC TxChainAddr1H = {{0}};
+	TX_CHAIN_ADDR2_H_STRUC TxChainAddr2H = {{0}};
+	TX_CHAIN_ADDR3_H_STRUC TxChainAddr3H = {{0}};
+
+	DBGPRINT(RT_DEBUG_INFO, ("---> %s\n", __FUNCTION__));
+
+	/* Chain #0 for broadcast*/
+	TxChainAddr0L.field.TxChainAddr0L_Byte3 = 0xFF;
+	TxChainAddr0L.field.TxChainAddr0L_Byte2 = 0xFF;
+	TxChainAddr0L.field.TxChainAddr0L_Byte1 = 0xFF;
+	TxChainAddr0L.field.TxChainAddr0L_Byte0 = 0xFF;
+	RTMP_IO_WRITE32(pAd, TX_CHAIN_ADDR0_L, TxChainAddr0L.word);
+
+	RTMP_IO_READ32(pAd, TX_CHAIN_ADDR0_H, &TxChainAddr0H.word);
+	TxChainAddr0H.field.TxChainAddr0H_Byte4 = 0xFF;
+	TxChainAddr0H.field.TxChainAddr0H_Byte5 = 0xFF;
+	TxChainAddr0H.field.TxChainSel0 = 0xF; /* Enable the stream mode for chain #0*/
+	RTMP_IO_WRITE32(pAd, TX_CHAIN_ADDR0_H, TxChainAddr0H.word);
+
+	RTMP_IO_READ32(pAd, TX_CHAIN_ADDR1_H, &TxChainAddr1H.word);
+	TxChainAddr1H.field.TxChainSel0 = 0xF; /* Enable the stream mode for chain #1*/
+	RTMP_IO_WRITE32(pAd, TX_CHAIN_ADDR1_H, TxChainAddr1H.word);
+
+	RTMP_IO_READ32(pAd, TX_CHAIN_ADDR2_H, &TxChainAddr2H.word);
+	TxChainAddr2H.field.TxChainSel0 = 0xF; /* Enable the stream mode for chain #2*/
+	RTMP_IO_WRITE32(pAd, TX_CHAIN_ADDR2_H, TxChainAddr2H.word);
+
+	RTMP_IO_READ32(pAd, TX_CHAIN_ADDR3_H, &TxChainAddr3H.word);
+	TxChainAddr3H.field.TxChainSel0 = 0xF; /* Enable the stream mode for chain #3*/
+	RTMP_IO_WRITE32(pAd, TX_CHAIN_ADDR3_H, TxChainAddr3H.word);
+	
+	DBGPRINT(RT_DEBUG_INFO, ("<--- %s\n", __FUNCTION__));
+}
+
+
+/* Disable the stream mode*/
+
+/* Parameters*/
+/*	pAd: The adapter data structure*/
+
+/* Return Value:*/
+/*	None*/
+
+VOID AsicDisableStreamMode(
+	IN PRTMP_ADAPTER pAd)
+{
+	TX_CHAIN_ADDR0_L_STRUC TxChainAddr0L = {{0}};
+	TX_CHAIN_ADDR0_H_STRUC TxChainAddr0H = {{0}};
+	TX_CHAIN_ADDR1_H_STRUC TxChainAddr1H = {{0}};
+	TX_CHAIN_ADDR2_H_STRUC TxChainAddr2H = {{0}};
+	TX_CHAIN_ADDR3_H_STRUC TxChainAddr3H = {{0}};
+
+	DBGPRINT(RT_DEBUG_INFO, ("---> %s\n", __FUNCTION__));
+
+	/* Chain #0 for broadcast*/
+	TxChainAddr0L.field.TxChainAddr0L_Byte3 = 0xFF;
+	TxChainAddr0L.field.TxChainAddr0L_Byte2 = 0xFF;
+	TxChainAddr0L.field.TxChainAddr0L_Byte1 = 0xFF;
+	TxChainAddr0L.field.TxChainAddr0L_Byte0 = 0xFF;
+	RTMP_IO_WRITE32(pAd, TX_CHAIN_ADDR0_L, TxChainAddr0L.word);
+
+	RTMP_IO_READ32(pAd, TX_CHAIN_ADDR0_H, &TxChainAddr0H.word);
+	TxChainAddr0H.field.TxChainAddr0H_Byte4 = 0xFF;
+	TxChainAddr0H.field.TxChainAddr0H_Byte5 = 0xFF;
+	TxChainAddr0H.field.TxChainSel0 = 0x0; /* Disable the stream mode for chain #0*/
+	RTMP_IO_WRITE32(pAd, TX_CHAIN_ADDR0_H, TxChainAddr0H.word);
+
+	RTMP_IO_READ32(pAd, TX_CHAIN_ADDR1_H, &TxChainAddr1H.word);
+	TxChainAddr1H.field.TxChainSel0 = 0x0; /* Disable the stream mode for chain #1*/
+	RTMP_IO_WRITE32(pAd, TX_CHAIN_ADDR1_H, TxChainAddr1H.word);
+
+	RTMP_IO_READ32(pAd, TX_CHAIN_ADDR2_H, &TxChainAddr2H.word);
+	TxChainAddr2H.field.TxChainSel0 = 0x0; /* Disable the stream mode for chain #2*/
+	RTMP_IO_WRITE32(pAd, TX_CHAIN_ADDR2_H, TxChainAddr2H.word);
+
+	RTMP_IO_READ32(pAd, TX_CHAIN_ADDR3_H, &TxChainAddr3H.word);
+	TxChainAddr3H.field.TxChainSel0 = 0x0; /* Disable the stream mode for chain #3*/
+	RTMP_IO_WRITE32(pAd, TX_CHAIN_ADDR3_H, TxChainAddr3H.word);
+	
+	DBGPRINT(RT_DEBUG_INFO, ("<--- %s\n", __FUNCTION__));
+}
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+VOID AsicCheckForHwRecovery(
+	IN PRTMP_ADAPTER	pAd) 
+{
+	/*
+	 When testing power save features in 2872 in vista, 3 hardware bug happens. Also find those bugs can be recovered from reset. 
+	 So in this section, driver make "if decision" for those 3 dead situations and do the correspoding reset action to recover. by JanLee. 2008-April.
+	*/
+	if ((!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)))
+	{		
+		/* When the NIC performs scan operation, it may not receive any packets on higher channels.
+		   This is because fewer APs use higher channel.
+		   Therefore, the pAd->SameRxByteCount may accidentally trigger error recovery.
+		   If I am GO in scan progress, I still continue to maintain rxbytecount. Let beacon can send out asap.
+		if ((!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS)))
+*/		
+		{
+			/*
+			 Bug 1. BBP dead. Need to Hard-Reset BBP
+			*/
+			 if (pAd->RalinkCounters.LastReceivedByteCount == pAd->RalinkCounters.ReceivedByteCount)
+			{
+				/* If ReceiveByteCount doesn't change,  increase SameRxByteCount by 1. */
+				pAd->SameRxByteCount++;
+			}
+			else
+			{
+				pAd->SameRxByteCount = 0;
+				pAd->BbpResetCount = 0;
+			}	
+
+
+			/* If after BBP, still not work...need to check to reset PBF. */
+			/*
+			if (pAd->SameRxByteCount == 702)
+			{
+				pAd->SameRxByteCount = 0;
+				AsicResetPBF(pAd);
+				AsicResetMAC(pAd);
+			}
+			*/
+			/* If SameRxByteCount keeps happens 
+			   for 3 second in infra mode
+			   for 5 seconds in idle mode
+			   for 1 second in P2PGO */
+				if (
+#ifdef CONFIG_STA_SUPPORT
+					((INFRA_ON(pAd)) && (pAd->SameRxByteCount > 3)) || 
+					((IDLE_ON(pAd)) && (pAd->SameRxByteCount > 5)) 
+#endif /* CONFIG_STA_SUPPORT */
+				)
+				{
+						DBGPRINT(RT_DEBUG_TRACE, ("AsicCheckForHwRecovery!! \n"));
+
+#ifdef CONFIG_STA_SUPPORT
+						if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE) 
+							|| (RTMP_TEST_PSFLAG(pAd, fRTMP_PS_SET_PCI_CLK_OFF_COMMAND)) 
+							|| RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF))
+							AsicForceWakeup(pAd, DOT11POWERSAVE);	
+#endif // CONFIG_STA_SUPPORT //
+
+						//Patch Scan no AP issue
+						//Firmware will write RF_R08(xtal_vdd_select) to LDOADC. This is HW issue.
+						//New RT3572(0x35720223) should not have this issue.
+						if (IS_RT5392(pAd))
+						{
+							UCHAR RfValue;
+							RT30xxReadRFRegister(pAd, RF_R42, &RfValue);
+							RfValue = (RfValue | 0xC0); // rx_ctb_en, rx_mix2_en
+							RT30xxWriteRFRegister(pAd, RF_R42, RfValue);
+						}
+
+						AsicResetBBPAgent(pAd);
+						pAd->SameRxByteCount=0;
+						pAd->BbpResetCount++;
+				}
+			}
+			
+			// Update lastReceiveByteCount.
+			pAd->RalinkCounters.LastReceivedByteCount = pAd->RalinkCounters.ReceivedByteCount;			
+	}
+}
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/netif_block.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/netif_block.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/netif_block.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/netif_block.c	2017-09-23 03:42:49.754675871 +0800
@@ -0,0 +1,142 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifdef BLOCK_NET_IF
+
+#include "rt_config.h"
+#include "netif_block.h"
+
+static NETIF_ENTRY freeNetIfEntryPool[FREE_NETIF_POOL_SIZE];
+static LIST_HEADER freeNetIfEntryList;
+
+void initblockQueueTab(
+	IN PRTMP_ADAPTER pAd)
+{
+	int i;
+
+	initList(&freeNetIfEntryList);
+	for (i = 0; i < FREE_NETIF_POOL_SIZE; i++)
+		insertTailList(&freeNetIfEntryList, (PLIST_ENTRY)&freeNetIfEntryPool[i]);
+
+	for (i=0; i < NUM_OF_TX_RING; i++)
+		initList(&pAd->blockQueueTab[i].NetIfList);
+
+	return;
+}
+
+BOOLEAN blockNetIf(
+	IN PBLOCK_QUEUE_ENTRY pBlockQueueEntry,
+	IN PNET_DEV pNetDev)
+{
+	PNETIF_ENTRY pNetIfEntry = NULL;
+	
+	if ((pNetIfEntry = (PNETIF_ENTRY)removeHeadList(&freeNetIfEntryList)) != NULL)
+	{
+		RTMP_OS_NETDEV_STOP_QUEUE(pNetDev);
+		pNetIfEntry->pNetDev = pNetDev;
+		insertTailList(&pBlockQueueEntry->NetIfList, (PLIST_ENTRY)pNetIfEntry);
+
+		pBlockQueueEntry->SwTxQueueBlockFlag = TRUE;
+		DBGPRINT(RT_DEBUG_TRACE, ("RTMP_OS_NETDEV_STOP_QUEUE(%s)\n", RTMP_OS_NETDEV_GET_DEVNAME(pNetDev)));
+	}
+	else
+		return FALSE;
+
+	return TRUE;
+}
+
+VOID releaseNetIf(
+	IN PBLOCK_QUEUE_ENTRY pBlockQueueEntry)
+{
+	PNETIF_ENTRY pNetIfEntry = NULL;
+	PLIST_HEADER pNetIfList = &pBlockQueueEntry->NetIfList;
+
+	while((pNetIfEntry = (PNETIF_ENTRY)removeHeadList(pNetIfList)) !=  NULL)
+	{
+		PNET_DEV pNetDev = pNetIfEntry->pNetDev;
+		RTMP_OS_NETDEV_WAKE_QUEUE(pNetDev);
+		insertTailList(&freeNetIfEntryList, (PLIST_ENTRY)pNetIfEntry);
+
+		DBGPRINT(RT_DEBUG_TRACE, ("RTMP_OS_NETDEV_WAKE_QUEUE(%s)\n", RTMP_OS_NETDEV_GET_DEVNAME(pNetDev)));
+	}
+	pBlockQueueEntry->SwTxQueueBlockFlag = FALSE;
+	return;
+}
+
+
+VOID StopNetIfQueue(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR QueIdx,
+	IN PNDIS_PACKET pPacket)
+{
+	PNET_DEV NetDev = NULL;
+	UCHAR IfIdx = 0;
+	BOOLEAN valid = FALSE;
+
+
+#ifdef APCLI_SUPPORT
+	if (RTMP_GET_PACKET_NET_DEVICE(pPacket) >= MIN_NET_DEVICE_FOR_APCLI)
+	{
+		IfIdx = (RTMP_GET_PACKET_NET_DEVICE(pPacket) - MIN_NET_DEVICE_FOR_APCLI) % MAX_APCLI_NUM;
+		NetDev = pAd->ApCfg.ApCliTab[IfIdx].dev;
+	}
+	else
+#endif /* APCLI_SUPPORT */
+	{
+#ifdef MBSS_SUPPORT
+		if (pAd->OpMode == OPMODE_AP)
+		{
+			IfIdx = (RTMP_GET_PACKET_NET_DEVICE(pPacket) - MIN_NET_DEVICE_FOR_MBSSID) % MAX_MBSSID_NUM(pAd);
+			NetDev = pAd->ApCfg.MBSSID[IfIdx].MSSIDDev;
+		}
+		else
+		{
+			IfIdx = MAIN_MBSSID;
+			NetDev = pAd->net_dev;
+		}
+#else
+		IfIdx = MAIN_MBSSID;
+		NetDev = pAd->net_dev;
+#endif
+	}
+
+	/* WMM support 4 software queues.*/
+	/* One software queue full doesn't mean device have no capbility to transmit packet.*/
+	/* So disable block Net-If queue function while WMM enable.*/
+#ifdef CONFIG_STA_SUPPORT
+	{
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		valid = (pAd->CommonCfg.bWmmCapable == TRUE) ? FALSE : TRUE;
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	if (valid)
+		blockNetIf(&pAd->blockQueueTab[QueIdx], NetDev);
+	return;
+}
+
+#endif /* BLOCK_NET_IF */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/rt_ate.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/rt_ate.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/rt_ate.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/rt_ate.c	2017-09-23 03:42:49.758675858 +0800
@@ -0,0 +1,9648 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+#if defined(RT30xx) || defined(RT305x) || defined(RT3350) || defined(RT3352) || defined(RT2883) || defined(RT5350)
+#define ATE_BBP_REG_NUM	168
+UCHAR restore_BBP[ATE_BBP_REG_NUM]={0};
+#endif /* defined(RT30xx) || defined(RT305x) || defined(RT3350) || defined(RT3352) || defined(RT2883) || defined(RT5350) */
+
+/* 802.11 MAC Header, Type:Data, Length:24bytes */
+UCHAR TemplateFrame[24] = {0x08,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
+		0x00,0xAA,0xBB,0x12,0x34,0x56,0x00,0x11,0x22,0xAA,0xBB,0xCC,0x00,0x00};
+
+extern RTMP_RF_REGS RF2850RegTable[];
+extern UCHAR NUM_OF_2850_CHNL;
+
+#if defined (RT305x) || defined (RT5350)
+extern FREQUENCY_ITEM FreqItems3020_Xtal20M[];
+
+extern FREQUENCY_ITEM RtmpFreqItems3020[];
+#else
+extern FREQUENCY_ITEM *FreqItems3020;
+#endif /* defined (RT3352) || defined (RT5350) */
+extern UCHAR NUM_OF_3020_CHNL;
+
+
+#if defined(NEW_TXCONT) || defined(NEW_TXCARR) || defined(NEW_TXCARRSUPP)
+static UINT32 Default_TX_PIN_CFG;
+#define RA_TX_PIN_CFG 0x1328
+#define TXCONT_TX_PIN_CFG_A 0x040C0050
+#define TXCONT_TX_PIN_CFG_G 0x080C00A0
+#endif /* NEW_TXCONT || NEW_TXCARR || NEW_TXCARRSUPP */
+
+static CHAR CCKRateTable[] = {0, 1, 2, 3, 8, 9, 10, 11, -1}; /* CCK Mode. */
+static CHAR OFDMRateTable[] = {0, 1, 2, 3, 4, 5, 6, 7, -1}; /* OFDM Mode. */
+#ifdef DOT11N_SS3_SUPPORT
+static CHAR HTMIXRateTable3T3R[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, -1}; /* HT Mix Mode for 3*3. */
+#else
+static CHAR HTMIXRateTable[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, -1}; /* HT Mix Mode. */
+#endif /* DOT11N_SS3_SUPPORT */
+
+#ifdef RTMP_INTERNAL_TX_ALC
+extern TX_POWER_TUNING_ENTRY_STRUCT TxPowerTuningTable[];
+extern CHAR GetDesiredTSSI(
+	IN PRTMP_ADAPTER	pAd);
+#ifdef RT5350
+extern UINT32 RT5350_GetDesiredTSSI(
+	IN PRTMP_ADAPTER		pAd,
+	OUT PUCHAR				pBbpR49);
+#endif /* RT5350 */
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+
+/*
+==========================================================================
+	Description:
+		Gives CCK TX rate 2 more dB TX power.
+		This routine works only in ATE mode.
+
+		calculate desired Tx power in RF R3.Tx0~5,	should consider -
+		0. if current radio is a noisy environment (pAd->DrsCounters.fNoisyEnvironment)
+		1. TxPowerPercentage
+		2. auto calibration based on TSSI feedback
+		3. extra 2 db for CCK
+		4. -10 db upon very-short distance (AvgRSSI >= -40db) to AP
+
+	NOTE: Since this routine requires the value of (pAd->DrsCounters.fNoisyEnvironment),
+		it should be called AFTER MlmeDynamicTxRateSwitching()
+==========================================================================
+*/
+VOID ATEAsicAdjustTxPower(
+	IN PRTMP_ADAPTER pAd) 
+{
+	INT			i, j, maxTxPwrCnt;
+	CHAR		DeltaPwr = 0;
+	BOOLEAN		bAutoTxAgc = FALSE;
+	UCHAR		TssiRef, *pTssiMinusBoundary, *pTssiPlusBoundary, TxAgcStep;
+	UCHAR		BbpR49 = 0, idx;
+	PCHAR		pTxAgcCompensate;
+	ULONG		TxPwr[9];	/* NOTE: the TxPwr array size should be the maxima value of all supported chipset!!!! */
+	CHAR		Value;
+#ifdef RTMP_INTERNAL_TX_ALC
+	/* (non-positive number) including the transmit power controlled by the MAC and the BBP R1 */    
+	CHAR             TotalDeltaPower = 0; 
+	UCHAR desiredTSSI = 0, currentTSSI = 0;
+	PTX_POWER_TUNING_ENTRY_STRUCT pTxPowerTuningEntry = NULL;
+	UCHAR RFValue = 0, TmpValue = 0;   
+	extern TX_POWER_TUNING_ENTRY_STRUCT TxPowerTuningTable[];
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+#ifdef DOT11N_SS3_SUPPORT
+	if (IS_RT3883(pAd))
+	{
+		maxTxPwrCnt = 9;
+	}
+	else if (IS_RT2883(pAd))
+	{
+		maxTxPwrCnt = 7;
+	}
+	else
+#endif /* DOT11N_SS3_SUPPORT */
+		maxTxPwrCnt = 5;
+
+	if (pAd->ate.TxWI.BW == BW_40)
+	{
+		if (pAd->ate.Channel > 14)
+		{
+			for (i =0 ; i < maxTxPwrCnt; i ++)
+			{
+				TxPwr[i] = pAd->Tx40MPwrCfgABand[i];	
+			}
+		}
+		else
+		{
+			for (i =0 ; i < maxTxPwrCnt; i ++)
+			{
+				TxPwr[i] = pAd->Tx40MPwrCfgGBand[i];	
+			}
+		}
+	}
+	else
+	{
+		if (pAd->ate.Channel > 14)
+		{
+			for (i =0 ; i < maxTxPwrCnt; i ++)
+			{
+				TxPwr[i] = pAd->Tx20MPwrCfgABand[i];	
+			}
+		}
+		else
+		{
+			for (i =0 ; i < maxTxPwrCnt; i ++)
+			{
+				TxPwr[i] = pAd->Tx20MPwrCfgGBand[i];	
+			}
+		}
+	}
+
+#ifdef RTMP_INTERNAL_TX_ALC
+
+	/* Locate the internal Tx ALC tuning entry */
+	if (pAd->TxPowerCtrl.bInternalTxALC == TRUE)
+	{
+		/* Sony has requested auto ALC period to 1 second instead of 4 seconds for DPDT(RT3370) */
+		{
+#ifdef RT5350
+			desiredTSSI = RT5350_GetDesiredTSSI(pAd, &BbpR49);
+#else
+			desiredTSSI = GetDesiredTSSI(pAd);
+#endif /* RT5350 */
+
+			ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R49, &BbpR49);
+
+			currentTSSI = BbpR49 & 0x1F;
+
+			if (pAd->TxPowerCtrl.bExtendedTssiMode == TRUE) /* Per-channel TSSI */
+			{
+				if ((pAd->ate.Channel >= 1) && (pAd->ate.Channel <= 14))	
+				{
+					DBGPRINT(RT_DEBUG_TRACE, ("%s: bExtendedTssiMode = %d, original desiredTSSI = %d, CentralChannel = %d, PerChTxPwrOffset = %d\n", 
+						__FUNCTION__, 
+						pAd->TxPowerCtrl.bExtendedTssiMode, 
+						desiredTSSI, 
+						pAd->ate.Channel, 
+						pAd->TxPowerCtrl.PerChTxPwrOffset[pAd->ate.Channel]));
+
+					desiredTSSI += pAd->TxPowerCtrl.PerChTxPwrOffset[pAd->ate.Channel];
+				}
+			}
+
+			if (desiredTSSI > 0x1F)
+			{
+				desiredTSSI = 0x1F;
+			}
+
+			if (desiredTSSI > currentTSSI)
+			{
+				pAd->TxPowerCtrl.idxTxPowerTable++;
+			}
+
+			if (desiredTSSI < currentTSSI)
+			{
+				pAd->TxPowerCtrl.idxTxPowerTable--;
+			}
+
+			if (pAd->TxPowerCtrl.idxTxPowerTable < LOWERBOUND_TX_POWER_TUNING_ENTRY)
+			{
+				pAd->TxPowerCtrl.idxTxPowerTable = LOWERBOUND_TX_POWER_TUNING_ENTRY;
+			}
+
+			if (pAd->TxPowerCtrl.idxTxPowerTable >= UPPERBOUND_TX_POWER_TUNING_ENTRY(pAd))
+			{
+				pAd->TxPowerCtrl.idxTxPowerTable = UPPERBOUND_TX_POWER_TUNING_ENTRY(pAd);
+			}
+
+			/* Valid pAd->TxPowerCtrl.idxTxPowerTable: -30 ~ 45 */
+			pTxPowerTuningEntry = &TxPowerTuningTable[pAd->TxPowerCtrl.idxTxPowerTable + TX_POWER_TUNING_ENTRY_OFFSET]; /* zero-based array */
+			pAd->TxPowerCtrl.RF_R12_Value = pTxPowerTuningEntry->RF_R12_Value;
+			pAd->TxPowerCtrl.MAC_PowerDelta = pTxPowerTuningEntry->MAC_PowerDelta;
+
+			DBGPRINT(RT_DEBUG_TRACE, ("pAd->TxPowerCtrl.idxTxPowerTable = %d, pAd->TxPowerCtrl.RF_R12_Value = %d, pAd->TxPowerCtrl.MAC_PowerDelta = %d\n", 
+			        pAd->TxPowerCtrl.idxTxPowerTable, pAd->TxPowerCtrl.RF_R12_Value, pAd->TxPowerCtrl.MAC_PowerDelta  ));
+
+			/* Tx power adjustment over RF */
+			ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R12, (PUCHAR)(&RFValue));
+			TmpValue = (RFValue & 0xE0);
+			RFValue = (TmpValue | (pAd->TxPowerCtrl.RF_R12_Value & 0x1F));
+			DBGPRINT(RT_DEBUG_TRACE, ("Write RF_R12 = 0x%x\n", RFValue));            
+			ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R12, (UCHAR)(RFValue));
+
+			/* Tx power adjustment over MAC */
+ 			TotalDeltaPower += pAd->TxPowerCtrl.MAC_PowerDelta;
+
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: desiredTSSI = %d, currentTSSI = %d, idxTxPowerTable = %d, {RF_R12_Value = %d, MAC_PowerDelta = %d}\n", 
+			        __FUNCTION__, 
+			        desiredTSSI, 
+			        currentTSSI, 
+			        pAd->TxPowerCtrl.idxTxPowerTable, 
+			        pTxPowerTuningEntry->RF_R12_Value, 
+			        pTxPowerTuningEntry->MAC_PowerDelta));
+		}
+	}
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+	/* TX power compensation for temperature variation based on TSSI. */
+	/* Do it per 4 seconds. */
+	if (pAd->Mlme.OneSecPeriodicRound % 4 == 0)
+	{
+		if (pAd->ate.Channel <= 14)
+		{
+			/* bg channel */
+			bAutoTxAgc         = pAd->bAutoTxAgcG;
+			TssiRef            = pAd->TssiRefG;
+			pTssiMinusBoundary = &pAd->TssiMinusBoundaryG[0];
+			pTssiPlusBoundary  = &pAd->TssiPlusBoundaryG[0];
+			TxAgcStep          = pAd->TxAgcStepG;
+			pTxAgcCompensate   = &pAd->TxAgcCompensateG;
+		}
+		else
+		{
+			/* a channel */
+			bAutoTxAgc         = pAd->bAutoTxAgcA;
+			TssiRef            = pAd->TssiRefA;
+			pTssiMinusBoundary = &pAd->TssiMinusBoundaryA[0];
+			pTssiPlusBoundary  = &pAd->TssiPlusBoundaryA[0];
+			TxAgcStep          = pAd->TxAgcStepA;
+			pTxAgcCompensate   = &pAd->TxAgcCompensateA;
+		}
+
+		if (bAutoTxAgc)
+		{
+			/* BbpR49 is unsigned char. */
+			ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R49, &BbpR49);
+
+			/* (p) TssiPlusBoundaryG[0] = 0 = (m) TssiMinusBoundaryG[0] */
+			/* compensate: +4     +3   +2   +1    0   -1   -2   -3   -4 * steps */
+			/* step value is defined in pAd->TxAgcStepG for tx power value */
+
+			/* [4]+1+[4]   p4     p3   p2   p1   o1   m1   m2   m3   m4 */
+			/* ex:         0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
+			   above value are examined in mass factory production */
+			/*             [4]    [3]  [2]  [1]  [0]  [1]  [2]  [3]  [4] */
+
+			/* plus is 0x10 ~ 0x40, minus is 0x60 ~ 0x90 */
+			/* if value is between p1 ~ o1 or o1 ~ s1, no need to adjust tx power */
+			/* if value is 0x65, tx power will be -= TxAgcStep*(2-1) */
+
+			if (BbpR49 > pTssiMinusBoundary[1])
+			{
+				/* Reading is larger than the reference value. */
+				/* Check for how large we need to decrease the Tx power. */
+				for (idx = 1; idx < 5; idx++)
+				{
+					/* Found the range. */
+					if (BbpR49 <= pTssiMinusBoundary[idx])  
+						break;
+				}
+
+				/* The index is the step we should decrease, idx = 0 means there is nothing to compensate. */
+				*pTxAgcCompensate = -(TxAgcStep * (idx-1));
+				
+				DeltaPwr += (*pTxAgcCompensate);
+				DBGPRINT(RT_DEBUG_TRACE, ("-- Tx Power, BBP R1=%x, TssiRef=%x, TxAgcStep=%x, step = -%d\n",
+					BbpR49, TssiRef, TxAgcStep, idx-1));                    
+			}
+			else if (BbpR49 < pTssiPlusBoundary[1])
+			{
+				/* Reading is smaller than the reference value. */
+				/* Check for how large we need to increase the Tx power. */
+				for (idx = 1; idx < 5; idx++)
+				{
+					/* Found the range. */
+					if (BbpR49 >= pTssiPlusBoundary[idx])   
+						break;
+				}
+
+				/* The index is the step we should increase, idx = 0 means there is nothing to compensate. */
+				*pTxAgcCompensate = TxAgcStep * (idx-1);
+				DeltaPwr += (*pTxAgcCompensate);
+				DBGPRINT(RT_DEBUG_TRACE, ("++ Tx Power, BBP R1=%x, TssiRef=%x, TxAgcStep=%x, step = +%d\n",
+					BbpR49, TssiRef, TxAgcStep, idx-1));
+			}
+			else
+			{
+				*pTxAgcCompensate = 0;
+				DBGPRINT(RT_DEBUG_TRACE, ("   Tx Power, BBP R1=%x, TssiRef=%x, TxAgcStep=%x, step = +%d\n",
+					BbpR49, TssiRef, TxAgcStep, 0));
+			}
+		}
+	}
+	else
+	{
+		if (pAd->ate.Channel <= 14)
+		{
+			bAutoTxAgc         = pAd->bAutoTxAgcG;
+			pTxAgcCompensate   = &pAd->TxAgcCompensateG;
+		}
+		else
+		{
+			bAutoTxAgc         = pAd->bAutoTxAgcA;
+			pTxAgcCompensate   = &pAd->TxAgcCompensateA;
+		}
+
+		if (bAutoTxAgc)
+			DeltaPwr += (*pTxAgcCompensate);
+	}
+
+	/* Calculate delta power based on the percentage specified from UI. */
+	/* E2PROM setting is calibrated for maximum TX power (i.e. 100%) */
+	/* We lower TX power here according to the percentage specified from UI. */
+	if (pAd->CommonCfg.TxPowerPercentage == 0xffffffff)       /* AUTO TX POWER control */
+		;
+	else if (pAd->CommonCfg.TxPowerPercentage > 90)  /* 91 ~ 100% & AUTO, treat as 100% in terms of mW */
+		;
+	else if (pAd->CommonCfg.TxPowerPercentage > 60)  /* 61 ~ 90%, treat as 75% in terms of mW */
+	{
+		DeltaPwr -= 1;
+	}
+	else if (pAd->CommonCfg.TxPowerPercentage > 30)  /* 31 ~ 60%, treat as 50% in terms of mW */
+	{
+		DeltaPwr -= 3;
+	}
+	else if (pAd->CommonCfg.TxPowerPercentage > 15)  /* 16 ~ 30%, treat as 25% in terms of mW */
+	{
+		DeltaPwr -= 6;
+	}
+	else if (pAd->CommonCfg.TxPowerPercentage > 9)   /* 10 ~ 15%, treat as 12.5% in terms of mW */
+	{
+		DeltaPwr -= 9;
+	}
+	else                                           /* 0 ~ 9 %, treat as MIN(~3%) in terms of mW */
+	{
+		DeltaPwr -= 12;
+	}
+
+	/* Reset different new tx power for different TX rate. */
+	for (i=0; i<maxTxPwrCnt; i++)
+	{
+		if (TxPwr[i] != 0xffffffff)
+		{
+			for (j=0; j<8; j++)
+			{
+				Value = (CHAR)((TxPwr[i] >> j*4) & 0x0F); /* 0 ~ 15 */
+
+#ifdef RTMP_INTERNAL_TX_ALC
+				/*
+					The upper bounds of the MAC 0x1314~0x1324 
+					are variable when the STA uses the internal Tx ALC.
+				*/
+				if (pAd->TxPowerCtrl.bInternalTxALC == TRUE)
+				{
+					switch (TX_PWR_CFG_0 + (i * 4))
+					{
+						case TX_PWR_CFG_0: 
+						{
+							if ((Value + TotalDeltaPower) < 0)
+							{
+								Value = 0;
+							}
+							else if ((Value + TotalDeltaPower) > 0xE)
+							{
+								Value = 0xE;
+							}
+							else
+							{
+								Value += TotalDeltaPower;
+							}
+						}
+						break;
+
+						case TX_PWR_CFG_1: 
+						{
+							if ((j >= 0) && (j <= 3))
+							{
+								if ((Value + TotalDeltaPower) < 0)
+								{
+									Value = 0;
+								}
+								else if ((Value + TotalDeltaPower) > 0xC)
+								{
+									Value = 0xC;
+								}
+								else
+								{
+									Value += TotalDeltaPower;
+								}
+							}
+							else
+							{
+								if ((Value + TotalDeltaPower) < 0)
+								{
+									Value = 0;
+								}
+								else if ((Value + TotalDeltaPower) > 0xE)
+								{
+									Value = 0xE;
+								}
+								else
+								{
+									Value += TotalDeltaPower;
+								}
+							}
+						}
+						break;
+
+						case TX_PWR_CFG_2: 
+						{
+							if ((j == 0) || (j == 2) || (j == 3))
+							{
+								if ((Value + TotalDeltaPower) < 0)
+								{
+									Value = 0;
+								}
+								else if ((Value + TotalDeltaPower) > 0xC)
+								{
+									Value = 0xC;
+								}
+								else
+								{
+									Value += TotalDeltaPower;
+								}
+							}
+							else
+							{
+								if ((Value + TotalDeltaPower) < 0)
+								{
+									Value = 0;
+								}
+								else if ((Value + TotalDeltaPower) > 0xE)
+								{
+									Value = 0xE;
+								}
+								else
+								{
+									Value += TotalDeltaPower;
+								}
+							}
+						}
+						break;
+
+						case TX_PWR_CFG_3: 
+						{
+							if ((j == 0) || (j == 2) || (j == 3) || 
+							((j >= 4) && (j <= 7)))
+							{
+								if ((Value + TotalDeltaPower) < 0)
+								{
+									Value = 0;
+								}
+								else if ((Value + TotalDeltaPower) > 0xC)
+								{
+									Value = 0xC;
+								}
+								else
+								{
+									Value += TotalDeltaPower;
+								}
+							}
+							else
+							{
+								if ((Value + TotalDeltaPower) < 0)
+								{
+									Value = 0;
+								}
+								else if ((Value + TotalDeltaPower) > 0xE)
+								{
+									Value = 0xE;
+								}
+								else
+								{
+									Value += TotalDeltaPower;
+								}
+							}
+						}
+						break;
+
+						case TX_PWR_CFG_4: 
+						{
+							if ((Value + TotalDeltaPower) < 0)
+							{
+								Value = 0;
+							}
+							else if ((Value + TotalDeltaPower) > 0xC)
+							{
+								Value = 0xC;
+							}
+							else
+							{
+								Value += TotalDeltaPower;
+							}
+						}
+						break;
+
+						default: 
+						{                                                      
+							/* do nothing */
+							DBGPRINT(RT_DEBUG_ERROR, ("%s: unknown register = 0x%X\n", 
+								__FUNCTION__, 
+							(TX_PWR_CFG_0 + (i * 4))));
+						}
+						break;
+					}
+				}
+				else
+#endif /* RTMP_INTERNAL_TX_ALC */
+				{
+					if ((Value + DeltaPwr) < 0)
+					{
+						Value = 0; /* min */
+					}
+					else if ((Value + DeltaPwr) > 0xF)
+					{
+						Value = 0xF; /* max */
+					}
+					else
+					{
+						Value += DeltaPwr; /* temperature compensation */
+					}
+				}
+
+				/* fill new value to CSR offset */
+				TxPwr[i] = (TxPwr[i] & ~(0x0000000F << j*4)) | (Value << j*4);
+			}
+
+			/* write tx power value to CSR */
+			/* 
+				TX_PWR_CFG_0 (8 tx rate) for	TX power for OFDM 12M/18M
+												TX power for OFDM 6M/9M
+												TX power for CCK5.5M/11M
+												TX power for CCK1M/2M
+			*/
+			/* TX_PWR_CFG_1 ~ TX_PWR_CFG_4 */
+#ifdef DOT11N_SS3_SUPPORT
+			if (IS_RT2883(pAd) || IS_RT3883(pAd) )
+			{
+				if (i == 5)
+				{
+					RTMP_IO_WRITE32(pAd, TX_PWR_CFG_5, TxPwr[i]);
+				}
+				else if (i == 6)
+				{
+					RTMP_IO_WRITE32(pAd, TX_PWR_CFG_6, TxPwr[i]);
+				}
+				else
+				{
+					RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + (i << 2), TxPwr[i]);
+					RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0_EXT + (i << 2), (TxPwr[i] & 0xf0f0f0f0) >> 4);
+				}
+			}
+			else
+			{
+				RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + (i << 2), TxPwr[i]);
+			}	
+#else
+			RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + (i << 2), TxPwr[i]);
+#endif /* DOT11N_SS3_SUPPORT */
+
+			
+		}
+	}
+
+}
+
+
+CHAR ATEConvertToRssi(
+	IN PRTMP_ADAPTER pAd,
+	IN	CHAR	Rssi,
+	IN  UCHAR   RssiNumber)
+{
+	UCHAR	RssiOffset, LNAGain;
+
+	/* Rssi equals to zero should be an invalid value */
+	if (Rssi == 0)
+		return -99;
+	
+	LNAGain = GET_LNA_GAIN(pAd);
+	if (pAd->LatchRfRegs.Channel > 14)
+	{
+		if (RssiNumber == 0)
+			RssiOffset = pAd->ARssiOffset0;
+		else if (RssiNumber == 1)
+			RssiOffset = pAd->ARssiOffset1;
+		else
+			RssiOffset = pAd->ARssiOffset2;
+	}
+	else
+	{
+		if (RssiNumber == 0)
+			RssiOffset = pAd->BGRssiOffset0;
+		else if (RssiNumber == 1)
+			RssiOffset = pAd->BGRssiOffset1;
+		else
+			RssiOffset = pAd->BGRssiOffset2;
+	}
+
+	return (-12 - RssiOffset - LNAGain - Rssi);
+}
+
+
+VOID ATESampleRssi(
+	IN PRTMP_ADAPTER	pAd,
+	IN PRXWI_STRUC		pRxWI)
+{
+	if (pRxWI->RSSI0 != 0)
+	{
+		pAd->ate.LastRssi0	= ATEConvertToRssi(pAd, (CHAR) pRxWI->RSSI0, RSSI_0);
+		pAd->ate.AvgRssi0X8	= (pAd->ate.AvgRssi0X8 - pAd->ate.AvgRssi0) + pAd->ate.LastRssi0;
+		pAd->ate.AvgRssi0  	= pAd->ate.AvgRssi0X8 >> 3;
+	}
+	if (pRxWI->RSSI1 != 0)
+	{
+		pAd->ate.LastRssi1	= ATEConvertToRssi(pAd, (CHAR) pRxWI->RSSI1, RSSI_1);
+		pAd->ate.AvgRssi1X8	= (pAd->ate.AvgRssi1X8 - pAd->ate.AvgRssi1) + pAd->ate.LastRssi1;
+		pAd->ate.AvgRssi1	= pAd->ate.AvgRssi1X8 >> 3;
+	}
+	if (pRxWI->RSSI2 != 0)
+	{
+		pAd->ate.LastRssi2	= ATEConvertToRssi(pAd, (CHAR) pRxWI->RSSI2, RSSI_2);
+		pAd->ate.AvgRssi2X8	= (pAd->ate.AvgRssi2X8 - pAd->ate.AvgRssi2) + pAd->ate.LastRssi2;
+		pAd->ate.AvgRssi2	= pAd->ate.AvgRssi2X8 >> 3;
+	}
+
+	pAd->ate.LastSNR0 = (CHAR)(pRxWI->SNR0);/* CHAR ==> UCHAR ? */
+	pAd->ate.LastSNR1 = (CHAR)(pRxWI->SNR1);/* CHAR ==> UCHAR ? */
+#ifdef DOT11N_SS3_SUPPORT
+	pAd->ate.LastSNR2 = (CHAR)(pRxWI->SNR2);/* CHAR ==> UCHAR ? */
+#endif /* DOT11N_SS3_SUPPORT */
+
+	pAd->ate.NumOfAvgRssiSample ++;
+}
+
+
+
+
+#ifdef RTMP_MAC_USB
+static INT TxDmaBusy(
+	IN PRTMP_ADAPTER pAd)
+{
+	INT result;
+	USB_DMA_CFG_STRUC UsbCfg;
+
+	RTMP_IO_READ32(pAd, USB_DMA_CFG, &UsbCfg.word);	/* disable DMA */
+
+	if (UsbCfg.field.TxBusy)
+		result = TRUE;
+	else
+		result = FALSE;
+
+	return result;
+}
+
+
+static INT RxDmaBusy(
+	IN PRTMP_ADAPTER pAd)
+{
+	INT result;
+	USB_DMA_CFG_STRUC UsbCfg;
+
+	RTMP_IO_READ32(pAd, USB_DMA_CFG, &UsbCfg.word);	/* disable DMA */
+
+	if (UsbCfg.field.RxBusy)
+		result = TRUE;
+	else
+		result = FALSE;
+
+	return result;
+}
+
+
+static VOID RtmpDmaEnable(
+	IN PRTMP_ADAPTER pAd,
+	IN INT Enable)
+{
+	BOOLEAN value;
+	ULONG WaitCnt;
+	USB_DMA_CFG_STRUC UsbCfg;
+	
+	value = Enable > 0 ? 1 : 0;
+
+	/* check DMA is in busy mode. */
+	WaitCnt = 0;
+
+	while (TxDmaBusy(pAd) || RxDmaBusy(pAd))
+	{
+		RTMPusecDelay(10);
+		if (WaitCnt++ > 100)
+			break;
+	}
+
+	/* Why not to clear USB DMA TX path first ??? */
+	RTMP_IO_READ32(pAd, USB_DMA_CFG, &UsbCfg.word);	/* disable DMA */
+	UsbCfg.field.TxBulkEn = value;
+	UsbCfg.field.RxBulkEn = value;
+	RTMP_IO_WRITE32(pAd, USB_DMA_CFG, UsbCfg.word);	/* abort all TX rings */
+	RtmpOsMsDelay(5);
+
+	return;
+}
+#endif /* RTMP_MAC_USB */
+
+
+VOID rt_ee_read_all(PRTMP_ADAPTER pAd, USHORT *Data)
+{
+	USHORT i;
+	USHORT value;
+
+
+	for (i = 0 ; i < (EEPROM_SIZE >> 1) ; )
+	{
+		/* "value" is especially for some compilers... */
+		RT28xx_EEPROM_READ16(pAd, (i << 1), value);
+		Data[i] = value;
+		i++;
+	}
+}
+
+
+VOID rt_ee_write_all(PRTMP_ADAPTER pAd, USHORT *Data)
+{
+	USHORT i;
+	USHORT value;
+
+
+#ifdef RTMP_FLASH_SUPPORT
+	if (pAd->infType == RTMP_DEV_INF_USB)
+	{
+		/* for RT3352+RT3572 solution */
+		rtmp_ee_flash_write_all(pAd, Data);
+		return;
+	}
+#endif /* RTMP_FLASH_SUPPORT */
+
+#ifdef RTMP_USB_SUPPORT
+	if (pAd->infType == RTMP_DEV_INF_USB)
+	{
+		USHORT offset = 0;
+		USHORT length = EEPROM_SIZE;
+
+		RTUSBWriteEEPROM(pAd, offset, (UCHAR *)Data, length);
+		return;
+	}
+#endif /* RTMP_USB_SUPPORT */
+
+	for (i = 0 ; i < (EEPROM_SIZE >> 1) ; )
+	{
+		/* "value" is especially for some compilers... */
+		value = Data[i];
+		RT28xx_EEPROM_WRITE16(pAd, (i << 1), value);
+		i++;
+	}
+
+	return;
+}
+
+VOID rt_ee_write_bulk(PRTMP_ADAPTER pAd, 
+	IN USHORT *Data, 
+	IN USHORT offset, 
+	IN USHORT length)
+{
+	USHORT pos;
+	USHORT value;
+	USHORT len = length;
+
+	for (pos = 0; pos < (len >> 1);)
+	{
+		/* "value" is especially for some compilers... */
+		value = Data[pos];
+		RT28xx_EEPROM_WRITE16(pAd, offset+(pos*2), value);
+		pos++;
+	}
+}
+
+static VOID RtmpRfIoWrite(
+	IN PRTMP_ADAPTER pAd)
+{
+	/* Set RF value 1's set R3[bit2] = [0] */
+	RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R1);
+	RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R2);
+	RTMP_RF_IO_WRITE32(pAd, (pAd->LatchRfRegs.R3 & (~0x04)));
+	RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R4);
+
+	RTMPusecDelay(200);
+
+	/* Set RF value 2's set R3[bit2] = [1] */
+	RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R1);
+	RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R2);
+	RTMP_RF_IO_WRITE32(pAd, (pAd->LatchRfRegs.R3 | 0x04));
+	RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R4);
+
+	RTMPusecDelay(200);
+
+	/* Set RF value 3's set R3[bit2] = [0] */
+	RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R1);
+	RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R2);
+	RTMP_RF_IO_WRITE32(pAd, (pAd->LatchRfRegs.R3 & (~0x04)));
+	RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R4);
+
+	return;
+}
+
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+#define	TXPowerEnMask		0xA8;
+#define	RXPowerEnMask		0x54;
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+
+
+VOID ATEAsicSetTxRxPath(
+    IN PRTMP_ADAPTER pAd)
+{
+	UCHAR	RFValue = 0, BbpValue = 0;
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+	if (IS_RT5392(pAd))
+	{
+		RFValue = 0x03;
+
+		/* Set TX path, pAd->TxAntennaSel : 0 -> All, 1 -> TX0, 2 -> TX1 */
+		switch(pAd->Antenna.field.TxPath)
+		{
+			case 2:
+				switch (pAd->ate.TxAntennaSel)
+				{
+					case 1:
+						/* set BBP R1, bit 4:3 = 00 */
+						ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BbpValue);
+						BbpValue &= 0xE7;		/* 11100111B */
+						ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BbpValue);
+
+						/* set RF R1, bit 7:5:3 = 001  */					
+						RFValue &=  ~TXPowerEnMask;
+						RFValue = RFValue | 0x08;
+						break;
+					case 2:	
+						/* set BBP R1, bit 4:3 = 01 */
+						ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BbpValue);
+						BbpValue &= 0xE7;	
+						BbpValue |= 0x08;
+						ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BbpValue);
+
+						/* set RF R1, bit 7:5:3 = 010 */					
+						RFValue &=  ~TXPowerEnMask;
+						RFValue = RFValue | 0x20;
+						break;
+					default:		
+						/* set BBP R1, bit 4:3 = 10 */
+						ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BbpValue);
+						BbpValue &= 0xE7;
+						BbpValue |= 0x10;
+						ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BbpValue);
+
+						/* set RF R1, bit 7:5:3 = 011 */
+						RFValue &=  ~TXPowerEnMask;
+						RFValue = RFValue | 0x28;
+					break;						
+			}
+			break;
+
+		default:
+				/* set RF R1, bit 7:5:3 = 011 */
+				RFValue &=  ~TXPowerEnMask;
+				RFValue = RFValue | 0x28;
+				break;
+		}
+
+
+		/* Set RX path, pAd->RxAntennaSel : 0 -> All, 1 -> RX0, 2 -> RX1, 3 -> RX2 */
+		switch (pAd->Antenna.field.RxPath)
+		{
+			case 3:
+				switch (pAd->ate.RxAntennaSel)
+				{
+					case 1:
+						/* set BBP R3, bit 4:3:1:0 = 0000 */							
+						ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
+						BbpValue &= 0xE4;
+						BbpValue |= 0x00;
+						ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);
+
+						/* set RF R1, bit 6:4:2 = 110 */
+						ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R01, &RFValue);
+						RFValue = RFValue & 0xAB;
+						RFValue = RFValue | 0x50;
+						ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R01, RFValue);
+						break;
+					case 2:
+						/* set BBP R3, bit 4:3:1:0 = 0001	 */							
+						ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
+						BbpValue &= 0xE4;
+						BbpValue |= 0x01;
+						ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);									
+
+						/* set RF R1, bit 6:4:2 = 101 */
+						ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R01, &RFValue);
+						RFValue = RFValue & 0xAB;
+						RFValue = RFValue | 0x44;
+						ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R01, RFValue);
+						break;
+					case 3:	
+						/* set BBP R3, bit 4:3:1:0 = 0002 */								
+						ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
+						BbpValue &= 0xE4;
+						BbpValue |= 0x02;
+						ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);
+
+						/* set RF R1, bit 6:4:2 = 011 */
+						ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R01, &RFValue);
+						RFValue = RFValue & 0xAB;
+						RFValue = RFValue | 0x14;
+						ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R01, RFValue);
+						break;								
+					default:	
+						/* set BBP R3, bit 4:3:1:0 = 1000 */
+						ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
+						BbpValue &= 0xE4;
+						BbpValue |= 0x10;
+						ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);								
+
+						/* set RF R1, bit 6:4:2 = 000 */
+						/* RT30xxReadRFRegister(pAd, RF_R01, (PUCHAR)&Value); */
+						/* Value = Value & 0xAB; */
+						/* RT30xxWriteRFRegister(pAd, RF_R01, (UCHAR)Value); */
+						break;
+				}
+				break;
+
+			case 2:						
+			switch (pAd->ate.RxAntennaSel)
+			{
+					case 1:	
+						/* set BBP R3, bit 4:3:1:0 = 0000 */
+						ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
+						BbpValue &= 0xE4;
+						BbpValue |= 0x00;
+						ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);								
+
+						/* set RF R1, bit 6:4:2 = 001 */				
+						RFValue &=  ~RXPowerEnMask;
+						RFValue |=  0x04;
+						break;
+					case 2:								
+						/* set BBP R3, bit 4:3:1:0 = 0001 */
+						ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
+						BbpValue &= 0xE4;
+						BbpValue |= 0x01;
+						ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);
+
+						/* set RF R1, bit 6:4:2 = 010 */
+						RFValue &=  ~RXPowerEnMask;
+						RFValue |= 0x10;
+						break;							
+				default:
+						/* set BBP R3, bit 4:3:1:0 = 0100 */		
+						ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
+						BbpValue &= 0xE4;
+						BbpValue |= 0x08;
+						ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);								
+
+						/* set RF R1, bit 6:4:2 = 011 */
+						RFValue &=  ~RXPowerEnMask;
+						RFValue |= 0x14;
+					break;
+			}
+			break;		
+
+			default:
+				/* set RF R1, bit 6:4:2 = 011 */
+				RFValue &=  ~RXPowerEnMask;
+				RFValue |= 0x14;			
+				break;		
+	}
+
+		ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R01, RFValue);
+	}
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+}
+
+
+
+
+/*
+==========================================================================
+    Description:
+
+	Default AsicSwitchChannel() dedicated for ATE.
+    
+==========================================================================
+*/
+VOID DefaultATEAsicSwitchChannel(
+    IN PRTMP_ADAPTER pAd) 
+{
+	UINT32 Value = 0;
+	CHAR TxPwer = 0, TxPwer2 = 0;
+	UCHAR index = 0, BbpValue = 0, R66 = 0x30, Channel = 0;
+#if defined(RT28xx) || defined(RT2880) || defined(RT2883)
+	UINT32 R2 = 0, R3 = DEFAULT_RF_TX_POWER, R4 = 0;
+	RTMP_RF_REGS *RFRegTable = NULL;
+#endif /* defined(RT28xx) || defined(RT2880) || defined(RT2883) */
+#ifdef RTMP_RF_RW_SUPPORT
+	/* added to prevent RF register reading error */
+	UCHAR RFValue = 0, RFValue2 = 0;
+#endif /* RTMP_RF_RW_SUPPORT */
+
+#ifdef DOT11N_SS3_SUPPORT
+	CHAR TxPwer3 = 0;
+#endif /* DOT11N_SS3_SUPPORT */
+
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+	UCHAR TxRxh20M=0;
+	UCHAR PreRFValue = 0;
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+
+#ifdef RALINK_QA
+	/* for QA mode, TX power values are passed from UI */
+	if ((pAd->ate.bQATxStart == TRUE) || (pAd->ate.bQARxStart == TRUE))
+	{
+		if (pAd->ate.Channel != pAd->LatchRfRegs.Channel)			
+		{
+			pAd->ate.Channel = pAd->LatchRfRegs.Channel;
+		}
+		return;
+	}
+	else
+#endif /* RALINK_QA */
+	Channel = pAd->ate.Channel;
+
+	/* fill Tx power value */
+	TxPwer = pAd->ate.TxPower0;
+	TxPwer2 = pAd->ate.TxPower1;
+#ifdef DOT11N_SS3_SUPPORT
+	TxPwer3 = pAd->ate.TxPower2;
+#endif /* DOT11N_SS3_SUPPORT */
+
+#ifdef RT30xx
+/* 2008/07/10:KH add to support 3070 ATE<-- */
+
+	/*
+		The RF programming sequence is difference between 3xxx and 2xxx.
+		The 3070 is 1T1R. Therefore, we don't need to set the number of Tx/Rx path
+		and the only job is to set the parameters of channels.
+	*/
+	if ((IS_RT30xx(pAd)) && 
+		((pAd->RfIcType == RFIC_3020) || (pAd->RfIcType == RFIC_2020) ||
+		(pAd->RfIcType == RFIC_3021) || (pAd->RfIcType == RFIC_3022) || (pAd->RfIcType == RFIC_3320)))
+	{
+		/* modify by WY for Read RF Reg. error */
+
+		for (index = 0; index < NUM_OF_3020_CHNL; index++)
+		{
+			if (Channel == FreqItems3020[index].Channel)
+			{
+				/* Programming channel parameters. */
+				ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R02, FreqItems3020[index].N);
+
+				ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R03, (PUCHAR)&RFValue);
+				RFValue = (RFValue & 0xF0) | (FreqItems3020[index].K&(~0xF0));
+				ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R03, (UCHAR)RFValue);
+				               
+				ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R06, (PUCHAR)&RFValue);
+				RFValue = (RFValue & 0xFC) | FreqItems3020[index].R;
+				ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R06, (UCHAR)RFValue);
+
+				/* Set Tx Power. */
+				ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R12, (PUCHAR)&RFValue);
+				RFValue = (RFValue & 0xE0) | TxPwer;
+				ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R12, (UCHAR)RFValue);
+
+				/* Set RF offset. */
+				ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R23, (PUCHAR)&RFValue);
+				/* 2008/08/06: KH modified "pAd->RFFreqOffset" to "pAd->ate.RFFreqOffset" */
+				RFValue = (RFValue & 0x80) | pAd->ate.RFFreqOffset;
+				ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R23, (UCHAR)RFValue);
+
+				/* Set BW. */
+				if (pAd->ate.TxWI.BW == BW_40)
+				{
+					RFValue = pAd->Mlme.CaliBW40RfR24;
+				}
+				else
+				{
+					RFValue = pAd->Mlme.CaliBW20RfR24;
+				}
+				ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R24, (UCHAR)RFValue);
+
+				/* Enable RF tuning */
+				ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R07, (PUCHAR)&RFValue);
+				RFValue = RFValue | 0x1;
+				ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R07, (UCHAR)RFValue);
+
+				   ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R30, (PUCHAR)&RFValue);
+                                RFValue |= 0x80;
+                                ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R30, (UCHAR)RFValue);
+                                RTMPusecDelay(1000);
+                                RFValue &= 0x7F;
+                                ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R30, (UCHAR)RFValue);   
+				/* latch channel for future usage */
+				pAd->LatchRfRegs.Channel = Channel;
+ 				if (pAd->Antenna.field.RxPath > 1)
+				{
+					/* antenna selection */
+					ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R01, (PUCHAR)&RFValue);
+					ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
+	   
+					RFValue = (RFValue & ~(0x17)) | 0xC1;
+					BbpValue &= 0xE4;
+					if (pAd->ate.RxAntennaSel == 1)
+					{
+						RFValue = RFValue | 0x10;
+						BbpValue |= 0x00;
+
+					}
+					else if (pAd->ate.RxAntennaSel == 2)
+					{
+						RFValue = RFValue | 0x04;
+						BbpValue |= 0x01;
+					}
+					else
+					{
+						/* Only enable two Antenna to receive. */
+						BbpValue |= 0x0B;
+					}
+					
+					ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R01, (UCHAR)RFValue);
+					ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);  
+				}
+				
+				if (pAd->Antenna.field.TxPath > 1)
+				{
+
+					  /* antenna selection */
+					ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R01, (PUCHAR)&RFValue);
+				       ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BbpValue);
+	   
+					RFValue = (RFValue & ~(0x2B)) | 0xC1;
+					BbpValue &= 0xE7;
+					if (pAd->ate.TxAntennaSel == 1)
+					{
+						RFValue = RFValue | 0x20;
+					}
+					else if (pAd->ate.TxAntennaSel == 2)
+					{
+						RFValue = RFValue | 0x08;
+						BbpValue |= 0x08;
+					}
+					else
+					{
+						BbpValue |= 0x10;
+					}
+					ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R01, (UCHAR)RFValue);
+					ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BbpValue);
+	                     }
+				ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R30, (PUCHAR)&RFValue);
+				RFValue |= 0x80;
+				ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R30, (UCHAR)RFValue);
+				RTMPusecDelay(1000);
+				RFValue &= 0x7F;
+				ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R30, (UCHAR)RFValue);
+				break;				
+			}
+		}
+
+		DBGPRINT(RT_DEBUG_TRACE, ("SwitchChannel#%d(RF=%d, Pwr0=%d, Pwr1=%d, %dT), N=0x%02X, K=0x%02X, R=0x%02X\n",
+			Channel, 
+			pAd->RfIcType, 
+			TxPwer,
+			TxPwer2,
+			pAd->Antenna.field.TxPath,
+			FreqItems3020[index].N, 
+			FreqItems3020[index].K, 
+			FreqItems3020[index].R));
+	}
+	else
+/* 2008/07/10:KH add to support 3070 ATE--> */
+#endif /* RT30xx */
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+	if (IS_RT5390(pAd))
+	{	
+		for (index = 0; index < NUM_OF_3020_CHNL; index++)
+		{
+
+			if (Channel == FreqItems3020[index].Channel)
+			{
+				/*
+				    Set the BBP Tx fine power control in 0.1dB step				
+				    Programming channel parameters
+				*/
+				ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R08, FreqItems3020[index].N); /* N */
+				ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R09, (FreqItems3020[index].K & 0x0F)); /* K, N<11:8> is set to zero */
+
+				ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R11, (PUCHAR)&RFValue);
+				RFValue = ((RFValue & ~0x03) | (FreqItems3020[index].R & 0x03)); /* R */
+				ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R11, (UCHAR)RFValue);
+
+				ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R49, (PUCHAR)&RFValue);
+				RFValue = ((RFValue & ~0x3F) | (TxPwer & 0x3F)); /* tx0_alc */
+				ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R49, (UCHAR)RFValue);
+
+				if (IS_RT5392(pAd))
+				{
+					ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R50, &RFValue);
+					RFValue = ((RFValue & ~0x3F) | (TxPwer2 & 0x3F)); /* tx0_alc */
+					ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R50, RFValue);
+				}
+
+				/* zero patch based on windows driver */
+				ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R01, &RFValue);
+				if (IS_RT5392(pAd))
+				{
+					RFValue = ((RFValue & ~0x3F) | 0x3F);
+				}
+				else
+				{
+					RFValue = ((RFValue & ~0x0F) | 0x0F); /* Enable rf_block_en, pll_en, rx0_en and tx0_en */
+				}	
+				ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R01, RFValue);
+
+				ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R02, (PUCHAR)&RFValue);
+                                RFValue |= 0x80;
+                                ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R02, (UCHAR)RFValue);
+                                RTMPusecDelay(1000);
+                                RFValue &= 0x7F;
+                                ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R02, (UCHAR)RFValue);   
+				{
+					/* Zero patch based on windows driver */
+					if (IS_RT5392(pAd))
+					{
+						ATEAsicSetTxRxPath(pAd);
+					}/**/
+					
+					ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R17, (PUCHAR)&RFValue);
+					PreRFValue = RFValue;
+					RFValue = ((RFValue & 0x80) | (pAd->ate.RFFreqOffset & 0x7F)); /* xo_code (C1 value control) - Crystal calibration */
+					RFValue = min(RFValue, 0x5F);
+					if (PreRFValue != RFValue)
+					{
+						AsicSendCommandToMcu(pAd, 0x74, 0xff, RFValue, PreRFValue);
+					}
+
+					/* Zero patch based on windows driver */
+					if(pAd->ate.TxWI.PHYMODE == MODE_CCK)
+					{
+						ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R32, 0xC0);
+
+						if (IS_RT5390F(pAd)) /* >= RT5390F */
+						{
+							ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R55, 0x46);
+						}
+						else if (IS_RT5392C(pAd))
+							ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R55, 0x47);
+					}
+					else
+					{
+						ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R32, 0x20);
+
+						if (IS_RT5390F(pAd) || IS_RT5392C(pAd)) /* >= RT5390F */
+						{
+							ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R55, 0x43);
+						}
+					}
+
+					if (pAd->ate.TxWI.BW == BW_20) /* BW 20 */
+					{
+						/* write BBP R4 value 0x40 */
+						ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, 0x40);
+					}
+					else
+					{
+						/* write BBP R4 value 0x50 */
+						ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, 0x50);
+
+					}/**/
+				}
+
+				if (  (pAd->ate.TxWI.BW /*CommonCfg.BBPCurrentBW*/ == BW_40)) /* BW 40 */
+				{
+					TxRxh20M = ((pAd->Mlme.CaliBW40RfR24 & 0x20) >> 5); /* Tx/Rx h20M */
+				}
+				else /* BW 20 */
+				{
+					TxRxh20M = ((pAd->Mlme.CaliBW20RfR24 & 0x20) >> 5); /* Tx/Rx h20M */
+				}
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+				if (IS_RT5392(pAd))
+				{
+					/* do nothing */
+				}
+				else if (IS_RT5390F(pAd)) /* >= RT5390F */
+				{
+						if ((Channel >= 1) && (Channel <=10))
+						{							
+							RT30xxWriteRFRegister(pAd, RF_R59, 0x07); /* pa2_cc_ofdm<3:0> (PA2 Cascode Bias OFDM mode) */
+						}
+						
+						else if (Channel == 11)
+						{							
+							RT30xxWriteRFRegister(pAd, RF_R59, 0x06); /* pa2_cc_ofdm<3:0> (PA2 Cascode Bias OFDM mode) */
+						}
+						else if (Channel == 12)
+						{							
+							RT30xxWriteRFRegister(pAd, RF_R59, 0x05); /* pa2_cc_ofdm<3:0> (PA2 Cascode Bias OFDM mode) */
+						}
+						else if ((Channel >= 13) && (Channel <=14))
+						{							
+							RT30xxWriteRFRegister(pAd, RF_R59, 0x04); /* pa2_cc_ofdm<3:0> (PA2 Cascode Bias OFDM mode) */
+						}
+						else
+						{
+							/* Do nothing */
+						}
+				}
+				else
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+				 if (IS_RT5390(pAd))
+				{
+					if ((Channel >= 1) && (Channel <= 7))
+					{
+						ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R59, 0x8F); /* pa2_cc_ofdm<3:0> (PA2 Cascode Bias OFDM mode) */
+					}
+					else if (Channel == 8)
+					{
+						ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R59, 0x8D); /* pa2_cc_ofdm<3:0> (PA2 Cascode Bias OFDM mode) */
+					}
+					else if (Channel == 9)
+					{
+						ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R59, 0x8A); /* pa2_cc_ofdm<3:0> (PA2 Cascode Bias OFDM mode) */
+					}
+					else if ((Channel >= 10) && (Channel <= 11))
+					{
+						ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R59, 0x88); /* pa2_cc_ofdm<3:0> (PA2 Cascode Bias OFDM mode) */
+					}
+					else if ((Channel >= 12) && (Channel <= 13))
+					{
+						ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R59, 0x87); /* pa2_cc_ofdm<3:0> (PA2 Cascode Bias OFDM mode) */
+					}
+					else if (Channel == 14)
+					{
+						ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R59, 0x86); /* pa2_cc_ofdm<3:0> (PA2 Cascode Bias OFDM mode) */
+					}
+					else
+					{
+						/* Do nothing */
+					}
+				}
+
+				ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R30, (PUCHAR)&RFValue);
+				RFValue = ((RFValue & ~0x06) | (TxRxh20M << 1) | (TxRxh20M << 2)); /* tx_h20M and rx_h20M */
+				ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R30, (UCHAR)RFValue);
+
+				ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R30, (PUCHAR)&RFValue);
+				RFValue = ((RFValue & ~0x18) | 0x10); /* rxvcm (Rx BB filter VCM) */
+				ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R30, (UCHAR)RFValue);
+
+				ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R03, (PUCHAR)&RFValue);
+				/* vcocal_en (initiate VCO calibration (reset after completion)) - It should be at the end of RF configuration.*/
+				RFValue = ((RFValue & ~0x80) | 0x80); 
+				ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R03, (UCHAR)RFValue);					
+
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: 5390: SwitchChannel#%d(RF=%d, Pwr0=%d, Pwr1=%d, %dT), N=0x%02X, K=0x%02X, R=0x%02X\n",
+					__FUNCTION__, 
+					Channel, 
+					pAd->RfIcType, 
+					TxPwer, 
+					TxPwer2, 
+					pAd->ate.TxAntennaSel, 
+					FreqItems3020[index].N, 
+					FreqItems3020[index].K, 
+					FreqItems3020[index].R));
+
+				break;
+			}
+		}
+	}
+	else
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+
+	{
+#if defined(RT28xx) || defined(RT2880) || defined(RT2883)
+		/* RT28xx */
+		RFRegTable = RF2850RegTable;
+
+		switch (pAd->RfIcType)
+		{
+#if defined(RT28xx) || defined(RT2880)
+			/* But only 2850 and 2750 support 5.5GHz band... */
+			case RFIC_2820:
+			case RFIC_2850:
+			case RFIC_2720:
+			case RFIC_2750:
+#endif /* defined(RT28xx) || defined(RT2880) */
+				for (index = 0; index < NUM_OF_2850_CHNL; index++)
+				{
+					if (Channel == RFRegTable[index].Channel)
+					{
+						R2 = RFRegTable[index].R2;
+
+						/* If TX path is 1, bit 14 = 1. */
+						if (pAd->Antenna.field.TxPath == 1)
+						{
+							R2 |= 0x4000;	
+						}
+						if (pAd->Antenna.field.TxPath == 2)
+						{
+							if (pAd->ate.TxAntennaSel == 1)
+							{
+								/* If TX Antenna select is 1 , bit 14 = 1; Disable Ant 2 */
+								R2 |= 0x4000;	
+								ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BbpValue);
+								BbpValue &= 0xE7;		/* 11100111B */
+								ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BbpValue);
+							}
+							else if (pAd->ate.TxAntennaSel == 2)
+							{
+								/* If TX Antenna select is 2 , bit 15 = 1; Disable Ant 1 */
+								R2 |= 0x8000;	
+								ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BbpValue);
+								BbpValue &= 0xE7;	
+								BbpValue |= 0x08;
+								ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BbpValue);
+							}
+							else
+							{
+								ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BbpValue);
+								BbpValue &= 0xE7;
+								BbpValue |= 0x10;
+								ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BbpValue);
+							}
+						}
+
+						if (pAd->Antenna.field.RxPath == 2)
+						{
+							switch (pAd->ate.RxAntennaSel)
+							{
+								case 1:
+									R2 |= 0x20040;
+									ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
+									BbpValue &= 0xE4;
+									BbpValue |= 0x00;
+									ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);								
+									break;
+								case 2:
+									R2 |= 0x10040;
+									ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
+									BbpValue &= 0xE4;
+									BbpValue |= 0x01;
+									ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);									
+									break;
+								default:	
+									R2 |= 0x40;
+									ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
+									BbpValue &= 0xE4;
+									/* Only enable two Antenna to receive. */
+									BbpValue |= 0x08;
+									ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);								
+									break;
+							}
+						}
+						else if (pAd->Antenna.field.RxPath == 1)
+						{
+							/* write 1 to off RxPath */
+							R2 |= 0x20040;	
+						}
+
+						if (pAd->Antenna.field.RxPath == 3)
+						{
+							switch (pAd->ate.RxAntennaSel)
+							{
+								case 1:
+									R2 |= 0x20040;
+									ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
+									BbpValue &= 0xE4;
+									BbpValue |= 0x00;
+									ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);								
+									break;
+								case 2:
+									R2 |= 0x10040;
+									ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
+									BbpValue &= 0xE4;
+									BbpValue |= 0x01;
+									ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);									
+									break;
+								case 3:	
+									R2 |= 0x30000;
+									ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
+									BbpValue &= 0xE4;
+									BbpValue |= 0x02;
+									ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);
+									break;								
+								default:	
+									ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
+									BbpValue &= 0xE4;
+									BbpValue |= 0x10;
+									ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);								
+									break;
+							}
+						}
+						
+						if (Channel > 14)
+						{
+							/* initialize R3, R4 */
+							R3 = (RFRegTable[index].R3 & 0xffffc1ff);
+							R4 = (RFRegTable[index].R4 & (~0x001f87c0)) | (pAd->ate.RFFreqOffset << 15);
+
+							/*
+								According the Rory's suggestion to solve the middle range issue.
+
+								5.5G band power range : 0xF9~0X0F, TX0 Reg3 bit9/TX1 Reg4 bit6="0"
+													means the TX power reduce 7dB.
+							*/
+							/* R3 */
+							if ((TxPwer >= -7) && (TxPwer < 0))
+							{
+								TxPwer = (7+TxPwer);
+								R3 |= (TxPwer << 10);
+								DBGPRINT(RT_DEBUG_TRACE, ("ATEAsicSwitchChannel: TxPwer=%d \n", TxPwer));
+							}
+							else
+							{
+								TxPwer = (TxPwer > 0xF) ? (0xF) : (TxPwer);
+								R3 |= (TxPwer << 10) | (1 << 9);
+							}
+
+							/* R4 */
+							if ((TxPwer2 >= -7) && (TxPwer2 < 0))
+							{
+								TxPwer2 = (7+TxPwer2);
+								R4 |= (TxPwer2 << 7);
+								DBGPRINT(RT_DEBUG_TRACE, ("ATEAsicSwitchChannel: TxPwer2=%d \n", TxPwer2));
+							}
+							else
+							{
+								TxPwer2 = (TxPwer2 > 0xF) ? (0xF) : (TxPwer2);
+								R4 |= (TxPwer2 << 7) | (1 << 6);
+							}
+						}
+						else
+						{
+							/* Set TX power0. */
+							R3 = (RFRegTable[index].R3 & 0xffffc1ff) | (TxPwer << 9);
+							/* Set frequency offset and TX power1. */
+							R4 = (RFRegTable[index].R4 & (~0x001f87c0)) | (pAd->ate.RFFreqOffset << 15) | (TxPwer2 <<6);
+
+						}
+
+						/* based on BBP current mode before changing RF channel */
+						if (pAd->ate.TxWI.BW == BW_40)
+						{
+							R4 |=0x200000;
+						}
+						
+						/* Update variables. */
+						pAd->LatchRfRegs.Channel = Channel;
+						pAd->LatchRfRegs.R1 = RFRegTable[index].R1;
+						pAd->LatchRfRegs.R2 = R2;
+						pAd->LatchRfRegs.R3 = R3;
+						pAd->LatchRfRegs.R4 = R4;
+
+						RtmpRfIoWrite(pAd);
+						
+						break;
+					}
+				}
+				break;
+
+			default:
+				break;
+		}
+#endif /* defined(RT28xx) || defined(RT2880) || defined(RT2883) */
+	}
+
+	/* Change BBP setting during switch from a->g, g->a */
+	if (Channel <= 14)
+	{
+		UINT32 TxPinCfg = 0x00050F0A;/* 2007.10.09 by Brian : 0x0005050A ==> 0x00050F0A */
+
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, (0x37 - GET_LNA_GAIN(pAd)));
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, (0x37 - GET_LNA_GAIN(pAd)));
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, (0x37 - GET_LNA_GAIN(pAd)));
+		if (IS_RT3352(pAd) || IS_RT5350(pAd))
+		{
+			/* Gary : 2010/0721 */
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0x38);
+		}
+		else
+		{
+			/* According the Rory's suggestion to solve the middle range issue. */
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0);	
+		}
+
+		/* Rx High power VGA offset for LNA select */
+		if (pAd->NicConfig2.field.ExternalLNAForG)
+		{
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0x62);
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x46);
+		}
+		else
+		{
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0x84);
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x50);
+		}
+
+		/* 2.4 G band selection PIN */
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
+		Value &= (~0x6);
+		Value |= (0x04);
+		RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
+
+		if (IS_RT3352(pAd) || IS_RT5350(pAd))
+		{
+			if (pAd->ate.TxAntennaSel == 1)
+			{
+				TxPinCfg &= 0xFFFFFFF3;
+			}
+			else if (pAd->ate.TxAntennaSel == 2)
+			{
+				TxPinCfg &= 0xFFFFFFFC;
+			}
+			else
+			{
+				TxPinCfg &= 0xFFFFFFFF;
+			}
+
+			if (pAd->ate.RxAntennaSel == 1)
+			{
+				TxPinCfg &= 0xFFFFF3FF;
+			}
+			else if (pAd->ate.RxAntennaSel == 2)
+			{
+				TxPinCfg &= 0xFFFFFCFF;
+			}
+			else
+			{
+				TxPinCfg &= 0xFFFFFFFF;
+			}
+		}
+		else
+		{
+			/* Turn off unused PA or LNA when only 1T or 1R. */
+			if (pAd->Antenna.field.TxPath == 1)
+			{
+				TxPinCfg &= 0xFFFFFFF3;
+			}
+			if (pAd->Antenna.field.RxPath == 1)
+			{
+				TxPinCfg &= 0xFFFFF3FF;
+			}
+
+			/* calibration power unbalance issues */
+			if (pAd->Antenna.field.TxPath == 2)
+			{
+				if (pAd->ate.TxAntennaSel == 1)
+				{
+					TxPinCfg &= 0xFFFFFFF7;
+				}
+				else if (pAd->ate.TxAntennaSel == 2)
+				{
+					TxPinCfg &= 0xFFFFFFFD;
+				}
+			}
+		}
+		RTMP_IO_WRITE32(pAd, TX_PIN_CFG, TxPinCfg);
+	}
+	/* channel > 14 */
+	else
+	{
+	    UINT32	TxPinCfg = 0x00050F05;/* 2007.10.09 by Brian : 0x00050505 ==> 0x00050F05 */
+		
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, (0x37 - GET_LNA_GAIN(pAd)));
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, (0x37 - GET_LNA_GAIN(pAd)));
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, (0x37 - GET_LNA_GAIN(pAd)));
+#if defined(RT3352) || defined(RT5350)
+		if (IS_RT3352(pAd) || IS_RT5350(pAd))
+		{
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0x38);/* Gary: 2010/0721 */
+		}
+		else
+#endif /* defined(RT3352) || defined(RT5350) */
+		/* According the Rory's suggestion to solve the middle range issue. */
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0);        
+
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0xF2);
+
+		/* Rx High power VGA offset for LNA select */
+		if (pAd->NicConfig2.field.ExternalLNAForA)
+		{
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x46);
+		}
+		else
+		{
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x50);
+		}
+
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R91, &BbpValue);
+		ASSERT((BbpValue == 0x04));
+
+		/* 5 G band selection PIN, bit1 and bit2 are complement */
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
+		Value &= (~0x6);
+		Value |= (0x02);
+		RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
+
+		/* Turn off unused PA or LNA when only 1T or 1R. */
+		if (pAd->Antenna.field.TxPath == 1)
+		{
+			TxPinCfg &= 0xFFFFFFF3;
+		}
+
+		if (pAd->Antenna.field.RxPath == 1)
+		{
+			TxPinCfg &= 0xFFFFF3FF;
+		}
+
+		RTMP_IO_WRITE32(pAd, TX_PIN_CFG, TxPinCfg);
+	}
+
+	/* R66 should be set according to Channel. */
+	if (Channel <= 14)
+	{	
+		/* BG band */
+#if defined(RT3352) || defined(RT5350)
+		if (IS_RT3352(pAd) || IS_RT5350(pAd))
+		{
+			if (pAd->ate.TxWI.BW == BW_20)
+			{
+				R66 = GET_LNA_GAIN(pAd)*2 + 0x1C;
+			}
+			else
+			{
+				R66 = GET_LNA_GAIN(pAd)*2 + 0x24;
+			}
+		}
+		else
+#endif /* defined(RT3352) || defined(RT5350) */
+			R66 = 0x2E + GET_LNA_GAIN(pAd);
+
+#ifdef RT5350
+		if (IS_RT5350(pAd))
+		{
+			ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R27, &BbpValue);
+			BbpValue &= 0x9f;
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R27, BbpValue);
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
+		}
+		else
+#endif /* RT5350 */
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
+	}
+	else
+	{	
+		/* A band, BW == 20 */
+		if (pAd->ate.TxWI.BW == BW_20)
+		{
+			R66 = (UCHAR)(0x32 + (GET_LNA_GAIN(pAd)*5)/3);
+
+    		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
+		}
+		else
+		{
+			/* A band, BW == 40 */
+			R66 = (UCHAR)(0x3A + (GET_LNA_GAIN(pAd)*5)/3);
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
+		}
+	}
+
+	RtmpOsMsDelay(1);  
+#if defined(RT3352) || defined(RT5350)
+#ifdef RTMP_RF_RW_SUPPORT
+	if (IS_RT3352(pAd) || IS_RT5350(pAd))
+	{
+		Value = (*((volatile u32 *)(RALINK_SYSCTL_BASE + 0x10)));
+
+		if (Value & (1 << 20))
+		{ 
+			/* Xtal=40M */
+			DBGPRINT(RT_DEBUG_TRACE, ("SwitchChannel#%d(RFIC=%d, Pwr0=%d, Pwr1=%d, %dT), N=0x%02X, K=0x%02X, R=0x%02X\n",
+			Channel, 
+			pAd->RfIcType, 
+			TxPwer,
+			TxPwer2,
+			pAd->Antenna.field.TxPath,
+			RtmpFreqItems3020[index].N, 
+			RtmpFreqItems3020[index].K, 
+			RtmpFreqItems3020[index].R));
+		}
+		else
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("SwitchChannel#%d(RFIC=%d, Pwr0=%d, Pwr1=%d, %dT), N=0x%02X, K=0x%02X, R=0x%02X\n",
+			Channel, 
+			pAd->RfIcType, 
+			TxPwer,
+			TxPwer2,
+			pAd->Antenna.field.TxPath,
+			FreqItems3020_Xtal20M[index].N, 
+			FreqItems3020_Xtal20M[index].K, 
+			FreqItems3020_Xtal20M[index].R));
+		}
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("SwitchChannel#%d(RFIC=%d, Pwr0=%d, Pwr1=%d, %dT), N=0x%02X, K=0x%02X, R=0x%02X\n",
+			Channel, 
+			pAd->RfIcType, 
+			TxPwer,
+			TxPwer2,
+			pAd->Antenna.field.TxPath,
+			RtmpFreqItems3020[index].N, 
+			RtmpFreqItems3020[index].K, 
+			RtmpFreqItems3020[index].R));
+	}
+#endif /* RTMP_RF_RW_SUPPORT */
+#endif /* defined(RT3352) || defined(RT5350) */
+
+#ifndef RTMP_RF_RW_SUPPORT
+	if (Channel > 14)
+	{
+		/* When 5.5GHz band the LSB of TxPwr will be used to reduced 7dB or not. */
+		DBGPRINT(RT_DEBUG_TRACE, ("SwitchChannel#%d(RF=%d, %dT) to , R1=0x%08x, R2=0x%08x, R3=0x%08x, R4=0x%08x\n",
+								  Channel, 
+								  pAd->RfIcType, 
+								  pAd->Antenna.field.TxPath,
+								  pAd->LatchRfRegs.R1, 
+								  pAd->LatchRfRegs.R2, 
+								  pAd->LatchRfRegs.R3, 
+								  pAd->LatchRfRegs.R4));
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("SwitchChannel#%d(RF=%d, Pwr0=%u, Pwr1=%u, %dT) to , R1=0x%08x, R2=0x%08x, R3=0x%08x, R4=0x%08x\n",
+								  Channel, 
+								  pAd->RfIcType, 
+								  (R3 & 0x00003e00) >> 9,
+								  (R4 & 0x000007c0) >> 6,
+								  pAd->Antenna.field.TxPath,
+								  pAd->LatchRfRegs.R1, 
+								  pAd->LatchRfRegs.R2, 
+								  pAd->LatchRfRegs.R3, 
+								  pAd->LatchRfRegs.R4));
+    }
+#endif /* !RTMP_RF_RW_SUPPORT */
+}
+
+
+
+
+
+
+
+
+
+
+#if defined(RT28xx) || defined(RT2880)
+/*
+==========================================================================
+    Description:
+
+	AsicSwitchChannel() dedicated for RT28xx ATE.
+    
+==========================================================================
+*/
+VOID RT28xxATEAsicSwitchChannel(
+    IN PRTMP_ADAPTER pAd)
+{
+	UINT32 Value = 0;
+	CHAR TxPwer = 0, TxPwer2 = 0;
+	UCHAR index = 0, BbpValue = 0, R66 = 0x30, Channel = 0;
+	UINT32 R2 = 0, R3 = DEFAULT_RF_TX_POWER, R4 = 0;
+	RTMP_RF_REGS *RFRegTable = NULL;
+
+#ifdef RALINK_QA
+	/* for QA mode, TX power values are passed from UI */
+	if ((pAd->ate.bQATxStart == TRUE) || (pAd->ate.bQARxStart == TRUE))
+	{
+		if (pAd->ate.Channel != pAd->LatchRfRegs.Channel)			
+		{
+			pAd->ate.Channel = pAd->LatchRfRegs.Channel;
+		}
+		return;
+	}
+	else
+#endif /* RALINK_QA */
+	Channel = pAd->ate.Channel;
+
+	/* fill Tx power value */
+	TxPwer = pAd->ate.TxPower0;
+	TxPwer2 = pAd->ate.TxPower1;
+
+	RFRegTable = RF2850RegTable;
+
+	switch (pAd->RfIcType)
+	{
+		/* But only 2850 and 2750 support 5.5GHz band... */
+		case RFIC_2820:
+		case RFIC_2850:
+		case RFIC_2720:
+		case RFIC_2750:
+			for (index = 0; index < NUM_OF_2850_CHNL; index++)
+			{
+				if (Channel == RFRegTable[index].Channel)
+				{
+					R2 = RFRegTable[index].R2;
+
+					/* If TX path is 1, bit 14 = 1. */
+					if (pAd->Antenna.field.TxPath == 1)
+					{
+						R2 |= 0x4000;	
+					}
+
+					if (pAd->Antenna.field.TxPath == 2)
+					{
+						if (pAd->ate.TxAntennaSel == 1)
+						{
+							/* If TX Antenna select is 1 , bit 14 = 1; Disable Ant 2 */
+							R2 |= 0x4000;	
+							ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BbpValue);
+							BbpValue &= 0xE7;		/* 11100111B */
+							ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BbpValue);
+						}
+						else if (pAd->ate.TxAntennaSel == 2)
+						{
+							/* If TX Antenna select is 2 , bit 15 = 1; Disable Ant 1 */
+							R2 |= 0x8000;	
+							ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BbpValue);
+							BbpValue &= 0xE7;	
+							BbpValue |= 0x08;
+							ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BbpValue);
+						}
+						else
+						{
+							ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BbpValue);
+							BbpValue &= 0xE7;
+							BbpValue |= 0x10;
+							ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BbpValue);
+						}
+					}
+
+					if (pAd->Antenna.field.RxPath == 2)
+					{
+						switch (pAd->ate.RxAntennaSel)
+						{
+							case 1:
+								R2 |= 0x20040;
+								ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
+								BbpValue &= 0xE4;
+								BbpValue |= 0x00;
+								ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);								
+								break;
+							case 2:
+								R2 |= 0x10040;
+								ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
+								BbpValue &= 0xE4;
+								BbpValue |= 0x01;
+								ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);									
+								break;
+							default:	
+								R2 |= 0x40;
+								ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
+								BbpValue &= 0xE4;
+								/* Only enable two Antenna to receive. */
+								BbpValue |= 0x08;
+								ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);								
+								break;
+						}
+					}
+					else if (pAd->Antenna.field.RxPath == 1)
+					{
+						/* write 1 to off RxPath */
+						R2 |= 0x20040;	
+					}
+
+					if (pAd->Antenna.field.RxPath == 3)
+					{
+						switch (pAd->ate.RxAntennaSel)
+						{
+							case 1:
+								R2 |= 0x20040;
+								ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
+								BbpValue &= 0xE4;
+								BbpValue |= 0x00;
+								ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);								
+								break;
+							case 2:
+								R2 |= 0x10040;
+								ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
+								BbpValue &= 0xE4;
+								BbpValue |= 0x01;
+								ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);									
+								break;
+							case 3:	
+								R2 |= 0x30000;
+								ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
+								BbpValue &= 0xE4;
+								BbpValue |= 0x02;
+								ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);
+								break;								
+							default:	
+								ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
+								BbpValue &= 0xE4;
+								BbpValue |= 0x10;
+								ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);								
+								break;
+						}
+					}
+					
+					if (Channel > 14)
+					{
+						/* initialize R3, R4 */
+						R3 = (RFRegTable[index].R3 & 0xffffc1ff);
+						R4 = (RFRegTable[index].R4 & (~0x001f87c0)) | (pAd->ate.RFFreqOffset << 15);
+
+						/*
+							According the Rory's suggestion to solve the middle range issue.
+
+							5.5G band power range : 0xF9~0X0F, TX0 Reg3 bit9/TX1 Reg4 bit6="0"
+												means the TX power reduce 7dB.
+						*/
+						/* R3 */
+						if ((TxPwer >= -7) && (TxPwer < 0))
+						{
+							TxPwer = (7+TxPwer);
+							R3 |= (TxPwer << 10);
+							DBGPRINT(RT_DEBUG_TRACE, ("ATEAsicSwitchChannel: TxPwer=%d \n", TxPwer));
+						}
+						else
+						{
+							TxPwer = (TxPwer > 0xF) ? (0xF) : (TxPwer);
+							R3 |= (TxPwer << 10) | (1 << 9);
+						}
+
+						/* R4 */
+						if ((TxPwer2 >= -7) && (TxPwer2 < 0))
+						{
+							TxPwer2 = (7+TxPwer2);
+							R4 |= (TxPwer2 << 7);
+							DBGPRINT(RT_DEBUG_TRACE, ("ATEAsicSwitchChannel: TxPwer2=%d \n", TxPwer2));
+						}
+						else
+						{
+							TxPwer2 = (TxPwer2 > 0xF) ? (0xF) : (TxPwer2);
+							R4 |= (TxPwer2 << 7) | (1 << 6);
+						}
+					}
+					else
+					{
+						/* Set TX power0. */
+						R3 = (RFRegTable[index].R3 & 0xffffc1ff) | (TxPwer << 9);
+						/* Set frequency offset and TX power1. */
+						R4 = (RFRegTable[index].R4 & (~0x001f87c0)) | (pAd->ate.RFFreqOffset << 15) | (TxPwer2 <<6);
+					}
+
+					/* based on BBP current mode before changing RF channel */
+					if (pAd->ate.TxWI.BW == BW_40)
+					{
+						R4 |=0x200000;
+					}
+					
+					/* Update variables. */
+					pAd->LatchRfRegs.Channel = Channel;
+					pAd->LatchRfRegs.R1 = RFRegTable[index].R1;
+					pAd->LatchRfRegs.R2 = R2;
+					pAd->LatchRfRegs.R3 = R3;
+					pAd->LatchRfRegs.R4 = R4;
+
+					RtmpRfIoWrite(pAd);
+					
+					break;
+				}
+			}
+			break;
+
+		default:
+			break;
+	}
+
+	/* Change BBP setting during switch from a->g, g->a */
+	if (Channel <= 14)
+	{
+		UINT32 TxPinCfg = 0x00050F0A;/* 2007.10.09 by Brian : 0x0005050A ==> 0x00050F0A */
+
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, (0x37 - GET_LNA_GAIN(pAd)));
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, (0x37 - GET_LNA_GAIN(pAd)));
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, (0x37 - GET_LNA_GAIN(pAd)));
+
+		/* According the Rory's suggestion to solve the middle range issue. */
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0);	
+
+		/* Rx High power VGA offset for LNA select */
+		if (pAd->NicConfig2.field.ExternalLNAForG)
+		{
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0x62);
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x46);
+		}
+		else
+		{
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0x84);
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x50);
+		}
+
+		/* 2.4 G band selection PIN */
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
+		Value &= (~0x6);
+		Value |= (0x04);
+		RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
+
+		/* Turn off unused PA or LNA when only 1T or 1R. */
+		if (pAd->Antenna.field.TxPath == 1)
+		{
+			TxPinCfg &= 0xFFFFFFF3;
+		}
+
+		if (pAd->Antenna.field.RxPath == 1)
+		{
+			TxPinCfg &= 0xFFFFF3FF;
+		}
+
+		/* calibration power unbalance issues */
+		if (pAd->Antenna.field.TxPath == 2)
+		{
+			if (pAd->ate.TxAntennaSel == 1)
+			{
+				TxPinCfg &= 0xFFFFFFF7;
+			}
+			else if (pAd->ate.TxAntennaSel == 2)
+			{
+				TxPinCfg &= 0xFFFFFFFD;
+			}
+		}
+		RTMP_IO_WRITE32(pAd, TX_PIN_CFG, TxPinCfg);
+	}
+	/* channel > 14 */
+	else
+	{
+	    UINT32	TxPinCfg = 0x00050F05;/* 2007.10.09 by Brian : 0x00050505 ==> 0x00050F05 */
+		
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, (0x37 - GET_LNA_GAIN(pAd)));
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, (0x37 - GET_LNA_GAIN(pAd)));
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, (0x37 - GET_LNA_GAIN(pAd)));
+
+		/* According the Rory's suggestion to solve the middle range issue. */
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0);        
+
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0xF2);
+
+		/* Rx High power VGA offset for LNA select */
+		if (pAd->NicConfig2.field.ExternalLNAForA)
+		{
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x46);
+		}
+		else
+		{
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R75, 0x50);
+		}
+
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R91, &BbpValue);
+		ASSERT((BbpValue == 0x04));
+
+		/* 5 G band selection PIN, bit1 and bit2 are complement */
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
+		Value &= (~0x6);
+		Value |= (0x02);
+		RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
+
+		/* Turn off unused PA or LNA when only 1T or 1R. */
+		if (pAd->Antenna.field.TxPath == 1)
+		{
+			TxPinCfg &= 0xFFFFFFF3;
+		}
+
+		if (pAd->Antenna.field.RxPath == 1)
+		{
+			TxPinCfg &= 0xFFFFF3FF;
+		}
+
+		RTMP_IO_WRITE32(pAd, TX_PIN_CFG, TxPinCfg);
+	}
+
+	/* R66 should be set according to Channel. */
+	if (Channel <= 14)
+	{	
+		/* BG band */
+		R66 = 0x2E + GET_LNA_GAIN(pAd);
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
+	}
+	else
+	{	
+		/* A band, BW == 20 */
+		if (pAd->ate.TxWI.BW == BW_20)
+		{
+			R66 = (UCHAR)(0x32 + (GET_LNA_GAIN(pAd)*5)/3);
+    		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
+		}
+		else
+		{
+			/* A band, BW == 40 */
+			R66 = (UCHAR)(0x3A + (GET_LNA_GAIN(pAd)*5)/3);
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
+		}
+	}
+
+	RtmpOsMsDelay(1);  
+
+#ifndef RTMP_RF_RW_SUPPORT
+	if (Channel > 14)
+	{
+		/* When 5.5GHz band the LSB of TxPwr will be used to reduced 7dB or not. */
+		DBGPRINT(RT_DEBUG_TRACE, ("RT28xx:SwitchChannel#%d(RF=%d, %dT) to , R1=0x%08x, R2=0x%08x, R3=0x%08x, R4=0x%08x\n",
+								  Channel, 
+								  pAd->RfIcType, 
+								  pAd->Antenna.field.TxPath,
+								  pAd->LatchRfRegs.R1, 
+								  pAd->LatchRfRegs.R2, 
+								  pAd->LatchRfRegs.R3, 
+								  pAd->LatchRfRegs.R4));
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("RT28xx:SwitchChannel#%d(RF=%d, Pwr0=%u, Pwr1=%u, %dT) to , R1=0x%08x, R2=0x%08x, R3=0x%08x, R4=0x%08x\n",
+								  Channel, 
+								  pAd->RfIcType, 
+								  (R3 & 0x00003e00) >> 9,
+								  (R4 & 0x000007c0) >> 6,
+								  pAd->Antenna.field.TxPath,
+								  pAd->LatchRfRegs.R1, 
+								  pAd->LatchRfRegs.R2, 
+								  pAd->LatchRfRegs.R3, 
+								  pAd->LatchRfRegs.R4));
+    }
+#endif /* !RTMP_RF_RW_SUPPORT */
+}
+#endif /* defined(RT28xx) || defined(RT2880) */
+
+
+/*
+==========================================================================
+    Description:
+
+	Default AsicSwitchChannel() dedicated for ATE.
+    
+==========================================================================
+*/
+VOID ATEAsicSwitchChannel(
+    IN PRTMP_ADAPTER pAd) 
+{
+#if defined(RT28xx) || defined(RT2880)
+	if (IS_RT2860(pAd) || IS_RT2872(pAd))
+		RT28xxATEAsicSwitchChannel(pAd);
+	else		
+#endif /* defined(RT28xx) || defined(RT2880) */
+	DefaultATEAsicSwitchChannel(pAd);
+
+	return;
+}
+
+
+static VOID BbpSoftReset(
+	IN PRTMP_ADAPTER pAd)
+{
+	UCHAR BbpData = 0;
+
+	/* Soft reset, set BBP R21 bit0=1->0 */
+	ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R21, &BbpData);
+	BbpData |= 0x00000001; /* set bit0=1 */
+	ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R21, BbpData);
+
+	ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R21, &BbpData);
+	BbpData &= ~(0x00000001); /* set bit0=0 */
+	ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R21, BbpData);
+
+	return;
+}
+
+
+#ifdef RALINK_QA
+static NDIS_STATUS TXSTOP(
+	IN PRTMP_ADAPTER pAd)
+{
+	UINT32			MacData=0, atemode=0;
+	NDIS_STATUS		Status = NDIS_STATUS_SUCCESS;
+#if !defined(NEW_TXCONT) || !defined(NEW_TXCARR) || !defined(NEW_TXCARRSUPP)
+	UCHAR			BbpData = 0;
+#endif /* !NEW_TXCONT || !NEW_TXCARR || !NEW_TXCARRSUPP */
+
+	DBGPRINT(RT_DEBUG_TRACE, ("ATE : ===> %s\n", __FUNCTION__));
+	
+	atemode = pAd->ate.Mode;
+	pAd->ate.Mode &= ATE_TXSTOP;
+	pAd->ate.bQATxStart = FALSE;
+
+	if (atemode == ATE_TXCARR)
+	{
+#ifndef NEW_TXCARR
+		/* No Carrier Test set BBP R22 bit7=0, bit6=0, bit[5~0]=0x0 */
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
+		BbpData &= 0xFFFFFF00; /* clear bit7, bit6, bit[5~0] */	
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
+#endif /* !NEW_TXCARR */
+	}
+	else if (atemode == ATE_TXCARRSUPP)
+	{
+#ifndef NEW_TXCARRSUPP
+		/* No Cont. TX set BBP R22 bit7=0 */
+		/* QA will do this in new TXCARRSUPP proposal */
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
+		BbpData &= ~(1 << 7); /* set bit7=0*/
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
+
+		/* No Carrier Suppression set BBP R24 bit0=0 */
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R24, &BbpData);
+		BbpData &= 0xFFFFFFFE; /* clear bit0	*/
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, BbpData);
+#endif /* !NEW_TXCARRSUPP */
+	}		
+
+	/*
+		We should free some resource which was allocated
+		when ATE_TXFRAME, ATE_STOP, and ATE_TXCONT.
+	*/
+	else if ((atemode & ATE_TXFRAME) || (atemode == ATE_STOP))
+	{
+		if (atemode == ATE_TXCONT)
+		{
+#ifndef NEW_TXCONT
+			/* No Cont. TX set BBP R22 bit7=0 */
+			/* QA will do this in new TXCONT proposal */
+			ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
+			BbpData &= ~(1 << 7); /* set bit7=0 */
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
+#endif /* !NEW_TXCONT */
+		}
+
+
+#ifdef RTMP_MAC_USB
+	RTUSBRejectPendingPackets(pAd);
+	RTUSBCleanUpDataBulkOutQueue(pAd);
+
+	/* empty function so far */
+	RTUSBCleanUpMLMEBulkOutQueue(pAd);
+
+	/* Abort Tx, RX DMA. */
+	RtmpDmaEnable(pAd, 0);
+
+	/* pAd->PendingRx is not of type atomic_t anymore */
+	/* pAd->BulkFlags != 0 : wait bulk out finish */
+	/* todo : BulkInLock */
+	while (pAd->PendingRx > 0)
+	{
+		ATE_RTUSBCancelPendingBulkInIRP(pAd);
+		RtmpOsMsDelay(500);
+	}
+
+	while (((pAd->BulkOutPending[0] == TRUE) ||
+			(pAd->BulkOutPending[1] == TRUE) || 
+			(pAd->BulkOutPending[2] == TRUE) ||
+			(pAd->BulkOutPending[3] == TRUE)) && (pAd->BulkFlags != 0))	
+			/* pAd->BulkFlags != 0 : wait bulk out finish */
+	{
+		do 
+		{
+			RTUSBCancelPendingBulkOutIRP(pAd);
+		} while (FALSE);			
+
+		RtmpOsMsDelay(500);
+	}
+
+	ASSERT(pAd->PendingRx == 0);
+
+	/* Enable Tx, Rx DMA. */
+	RtmpDmaEnable(pAd, 1);
+#endif /* RTMP_MAC_USB */
+	}
+
+	/* task Tx status : 0 --> task is idle, 1 --> task is running */
+	pAd->ate.TxStatus = 0;
+
+#if !defined(NEW_TXCONT) && !defined(NEW_TXCARR) && !defined(NEW_TXCARRSUPP)
+#ifndef RT5350
+	/* Soft reset BBP. */
+	BbpSoftReset(pAd);
+#endif /* !RT5350 */
+
+#endif /* !NEW_TXCONT && !NEW_TXCARR && !NEW_TXCARRSUPP */
+
+	/* Disable Tx */
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData &= ~(1 << 2);
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+
+#ifdef RTMP_MAC_USB
+	/* Clear ATE Bulk in/out counter and continue setup */
+	InterlockedExchange(&pAd->BulkOutRemained, 0);
+	pAd->ContinBulkOut = FALSE;
+#endif /* RTMP_MAC_USB */
+
+	DBGPRINT(RT_DEBUG_TRACE, ("ATE : <=== %s\n", __FUNCTION__));
+	return Status;
+}
+
+
+static NDIS_STATUS RXSTOP(
+	IN PRTMP_ADAPTER pAd)
+{
+	UINT32			MacData=0;
+	NDIS_STATUS		Status = NDIS_STATUS_SUCCESS;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("ATE : ===> %s\n", __FUNCTION__));
+
+	/* Disable Rx */
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData &= ~(1 << 3);
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+
+	pAd->ate.Mode &= ATE_RXSTOP;
+	pAd->ate.bQARxStart = FALSE;
+
+#ifdef RTMP_MAC_USB
+	RTUSBRejectPendingPackets(pAd);
+	RTUSBCleanUpDataBulkOutQueue(pAd);
+
+	RTUSBCleanUpMLMEBulkOutQueue(pAd);
+
+	/* Abort Tx, RX DMA. */
+	RtmpDmaEnable(pAd, 0);
+
+	while (pAd->PendingRx > 0)
+	{
+		ATE_RTUSBCancelPendingBulkInIRP(pAd);
+		RtmpOsMsDelay(500);
+	}
+
+	while (((pAd->BulkOutPending[0] == TRUE) ||
+			(pAd->BulkOutPending[1] == TRUE) || 
+			(pAd->BulkOutPending[2] == TRUE) ||
+			(pAd->BulkOutPending[3] == TRUE)) && (pAd->BulkFlags != 0))	
+			/* pAd->BulkFlags != 0 : wait bulk out finish */
+	{
+		do
+		{
+			RTUSBCancelPendingBulkOutIRP(pAd);
+		} while (FALSE);
+		
+		RtmpOsMsDelay(500);
+	}
+
+	ASSERT(pAd->PendingRx == 0);
+	pAd->ContinBulkIn = FALSE;
+#endif /* RTMP_MAC_USB */
+
+#ifndef RT5350
+	/* Soft reset BBP. */
+	BbpSoftReset(pAd);
+#endif /* !RT5350 */
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("ATE : <=== %s\n", __FUNCTION__));
+	return Status;
+}
+
+
+static VOID memcpy_exl(PRTMP_ADAPTER pAd, UCHAR *dst, UCHAR *src, ULONG len)
+{
+	UINT32 i, Value = 0;
+	UCHAR *pDst = NULL, *pSrc = NULL;
+	
+	for (i = 0 ; i < (len/4); i++)
+	{
+		pDst = (dst + i*4);
+		pSrc = (src + i*4);
+		/* For alignment issue, we need a variable "Value". */
+		memmove(&Value, pSrc, 4);
+		Value = OS_HTONL(Value); 
+		memmove(pDst, &Value, 4);		
+		pDst += 4;
+		pSrc += 4;
+	}
+
+	if ((len % 4) != 0)
+	{
+		/* wish that it will never reach here */
+		memmove(&Value, pSrc, (len % 4));
+		Value = OS_HTONL(Value); 
+		memmove(pDst, &Value, (len % 4));
+	}
+}
+
+
+static VOID memcpy_exs(PRTMP_ADAPTER pAd, UCHAR *dst, UCHAR *src, ULONG len)
+{
+	ULONG i;
+	{
+		USHORT *pDst, *pSrc;
+		
+		pDst = (USHORT *) dst;
+		pSrc = (USHORT *) src;
+
+		for (i =0; i < (len >> 1); i++)
+		{
+			*pDst = OS_NTOHS(*pSrc);
+			pDst++;
+			pSrc++;
+		}
+		
+		if ((len % 2) != 0)
+		{
+			memcpy(pDst, pSrc, (len % 2));
+			*pDst = OS_NTOHS(*pDst);
+		}
+	}
+	return;
+}
+
+
+static VOID RTMP_IO_READ_BULK(PRTMP_ADAPTER pAd, UCHAR *dst, UINT32 offset, UINT32 len)
+{
+	UINT32 i, Value = 0;
+	UCHAR *pDst;
+
+	for (i = 0 ; i < (len/4); i++)
+	{
+		pDst = (dst + i*4);
+		RTMP_IO_READ32(pAd, offset, &Value);
+		Value = OS_HTONL(Value);
+		memmove(pDst, &Value, 4);
+		offset += 4;
+	}
+	return;
+}
+
+
+VOID BubbleSort(INT32 n, INT32 a[])
+{ 
+	INT32 k, j, temp;
+
+	for (k = n-1;  k>0;  k--)
+	{
+		for (j = 0; j<k; j++)
+		{
+			if (a[j] > a[j+1])
+			{
+				temp = a[j]; 
+				a[j]=a[j+1]; 
+				a[j+1]=temp;
+			}
+		}
+	}
+	return;
+} 
+
+
+VOID CalNoiseLevel(PRTMP_ADAPTER pAd, UCHAR channel, INT32 RSSI[3][10])
+{
+	INT32		RSSI0, RSSI1, RSSI2;
+ 	CHAR		Rssi0Offset, Rssi1Offset, Rssi2Offset;
+	UCHAR		BbpR50Rssi0 = 0, BbpR51Rssi1 = 0, BbpR52Rssi2 = 0;
+	UCHAR		Org_BBP66value = 0, Org_BBP69value = 0, Org_BBP70value = 0, data = 0;
+#if defined(RT2883) || defined(RT3883) ||  defined(RT3352) ||  defined(RT5350)
+	UCHAR		byteValue = 0;
+#endif /* defined(RT2883) || defined(RT3883) ||  defined(RT3352) ||  defined(RT5350) */
+	USHORT		LNA_Gain = 0;
+	INT32		j = 0;
+	UCHAR		Org_Channel = pAd->ate.Channel;
+	USHORT	    GainValue = 0, OffsetValue = 0;
+
+	ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R66, &Org_BBP66value);
+	ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R69, &Org_BBP69value);	
+	ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R70, &Org_BBP70value);
+
+	/************************************************************************/
+	/* Read the value of LNA gain and RSSI offset */
+	/************************************************************************/
+	RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, GainValue);
+
+	/* for Noise Level */
+	if (channel <= 14)
+	{
+		LNA_Gain = GainValue & 0x00FF;		 
+
+		RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, OffsetValue);
+		Rssi0Offset = OffsetValue & 0x00FF;
+		Rssi1Offset = (OffsetValue & 0xFF00) >> 8;
+
+		RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_BG_OFFSET + 2)/* 0x48 */, OffsetValue);
+		Rssi2Offset = OffsetValue & 0x00FF;
+	}
+	else
+	{
+		LNA_Gain = (GainValue & 0xFF00) >> 8;
+		RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, OffsetValue);
+		Rssi0Offset = OffsetValue & 0x00FF;
+		Rssi1Offset = (OffsetValue & 0xFF00) >> 8;
+		RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET + 2)/* 0x4C */, OffsetValue);
+		Rssi2Offset = OffsetValue & 0x00FF;
+	}
+	/***********************************************************************/	
+	{
+		pAd->ate.Channel = channel;
+		ATEAsicSwitchChannel(pAd);
+		RtmpOsMsDelay(5);
+
+		data = 0x10;
+#if defined (RT2883) || defined (RT3883) || defined (RT3352) || defined (RT5350)
+		if (IS_RT2883(pAd) || IS_RT3883(pAd) || IS_RT3352(pAd) || IS_RT5350(pAd))
+		{
+			ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R27, &byteValue);
+			byteValue &= 0x9f;
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R27, byteValue);
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, data);
+		}
+#else
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, data);	
+#endif /* defined(RT2883) || defined(RT3883) ||  defined(RT3352) || defined (RT5350) */
+		data = 0x40;
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, data);
+		data = 0x40;
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, data);
+		RtmpOsMsDelay(5);
+
+		/* start Rx */
+		pAd->ate.bQARxStart = TRUE;
+		Set_ATE_Proc(pAd, "RXFRAME");
+
+		RtmpOsMsDelay(5);
+
+		for (j = 0; j < 10; j++)
+		{
+			ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R50, &BbpR50Rssi0);
+			ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R51, &BbpR51Rssi1);	
+			ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R52, &BbpR52Rssi2);
+
+			RtmpOsMsDelay(10);
+
+			/* calculate RSSI 0 */
+			if (BbpR50Rssi0 == 0)
+			{
+				RSSI0 = -100;
+			}
+			else
+			{
+				RSSI0 = (INT32)(-12 - BbpR50Rssi0 - LNA_Gain - Rssi0Offset);
+			}
+			RSSI[0][j] = RSSI0;
+
+			if ( pAd->Antenna.field.RxPath >= 2 ) /* 2R */
+			{
+				/* calculate RSSI 1 */
+				if (BbpR51Rssi1 == 0)
+				{
+					RSSI1 = -100;
+				}
+				else
+				{
+					RSSI1 = (INT32)(-12 - BbpR51Rssi1 - LNA_Gain - Rssi1Offset);
+				}
+				RSSI[1][j] = RSSI1;
+			}
+
+			if ( pAd->Antenna.field.RxPath >= 3 ) /* 3R */
+			{
+				/* calculate RSSI 2 */
+				if (BbpR52Rssi2 == 0)
+					RSSI2 = -100;
+				else
+					RSSI2 = (INT32)(-12 - BbpR52Rssi2 - LNA_Gain - Rssi2Offset);
+
+				RSSI[2][j] = RSSI2;
+			}
+		}
+
+		/* stop Rx */
+		Set_ATE_Proc(pAd, "RXSTOP");
+
+		RtmpOsMsDelay(5);
+
+		BubbleSort(10, RSSI[0]); /* 1R */		
+
+		if ( pAd->Antenna.field.RxPath >= 2 ) /* 2R */
+		{
+			BubbleSort(10, RSSI[1]);
+		}
+
+		if ( pAd->Antenna.field.RxPath >= 3 ) /* 3R */
+		{
+			BubbleSort(10, RSSI[2]);
+		}	
+	}
+
+	pAd->ate.Channel = Org_Channel;
+	ATEAsicSwitchChannel(pAd);
+
+	/* restore original value */	
+#if defined (RT2883) || defined (RT3883) || defined (RT3352) || defined (RT5350)
+	if (IS_RT2883(pAd) || IS_RT3883(pAd) || IS_RT3352(pAd) || IS_RT5350(pAd))
+	{
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R27, &byteValue);
+		byteValue &= 0x9f;
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R27, byteValue);
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, Org_BBP66value);
+	}
+#endif /* defined (RT2883) || defined (RT3883) || defined (RT3352) || defined (RT5350) */
+
+	ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, Org_BBP69value);
+	ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, Org_BBP70value);
+
+	return;
+}
+
+
+BOOLEAN SyncTxRxConfig(PRTMP_ADAPTER pAd, USHORT offset, UCHAR value)
+{ 
+	UCHAR tmp = 0, bbp_data = 0;
+
+	if (ATE_ON(pAd))
+	{
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, offset, &bbp_data);
+	}
+	else
+	{
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, offset, &bbp_data);
+	}
+
+	/* confirm again */
+	ASSERT(bbp_data == value);
+
+	switch (offset)
+	{
+		case BBP_R1:
+			/* Need to synchronize tx configuration with legacy ATE. */
+			tmp = (bbp_data & ((1 << 4) | (1 << 3))/* 0x18 */) >> 3;
+		    switch (tmp)
+		    {
+				/* The BBP R1 bit[4:3] = 2 :: Both DACs will be used by QA. */
+		        case 2:
+					/* All */
+					pAd->ate.TxAntennaSel = 0;
+		            break;
+				/* The BBP R1 bit[4:3] = 0 :: DAC 0 will be used by QA. */
+		        case 0:
+					/* Antenna one */
+					pAd->ate.TxAntennaSel = 1;
+		            break;
+				/* The BBP R1 bit[4:3] = 1 :: DAC 1 will be used by QA. */
+		        case 1:
+					/* Antenna two */
+					pAd->ate.TxAntennaSel = 2;
+		            break;
+		        default:
+		            DBGPRINT(RT_DEBUG_TRACE, ("%s -- Sth. wrong!  : return FALSE; \n", __FUNCTION__));    
+		            return FALSE;
+		    }
+			break;/* case BBP_R1 */
+
+		case BBP_R3:
+			/* Need to synchronize rx configuration with legacy ATE. */
+			tmp = (bbp_data & ((1 << 1) | (1 << 0))/* 0x03 */);
+		    switch(tmp)
+		    {
+				/* The BBP R3 bit[1:0] = 3 :: All ADCs will be used by QA. */
+		        case 3:
+					/* All */
+					pAd->ate.RxAntennaSel = 0;
+		            break;
+				/*
+					The BBP R3 bit[1:0] = 0 :: ADC 0 will be used by QA,
+					unless the BBP R3 bit[4:3] = 2
+				*/
+		        case 0:
+					/* Antenna one */
+					pAd->ate.RxAntennaSel = 1;
+					tmp = ((bbp_data & ((1 << 4) | (1 << 3))/* 0x03 */) >> 3);
+					if (tmp == 2) /* 3R */
+					{
+						/* Default : All ADCs will be used by QA */
+						pAd->ate.RxAntennaSel = 0;
+					}
+		            break;
+				/* The BBP R3 bit[1:0] = 1 :: ADC 1 will be used by QA. */
+		        case 1:
+					/* Antenna two */
+					pAd->ate.RxAntennaSel = 2;
+		            break;
+				/* The BBP R3 bit[1:0] = 2 :: ADC 2 will be used by QA. */
+		        case 2:
+					/* Antenna three */
+					pAd->ate.RxAntennaSel = 3;
+		            break;
+		        default:
+		            DBGPRINT(RT_DEBUG_ERROR, ("%s -- Impossible!  : return FALSE; \n", __FUNCTION__));    
+		            return FALSE;
+		    }
+			break;/* case BBP_R3 */
+
+        default:
+            DBGPRINT(RT_DEBUG_ERROR, ("%s -- Sth. wrong!  : return FALSE; \n", __FUNCTION__));    
+            return FALSE;
+		
+	}
+	return TRUE;
+}
+
+
+static INT ResponseToGUI(
+	IN  struct ate_racfghdr *pRaCfg,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*pwrq,
+	IN  INT Length,
+	IN  INT Status)
+{
+	(pRaCfg)->length = OS_HTONS((Length));
+	(pRaCfg)->status = OS_HTONS((Status));
+	(pwrq)->u.data.length = sizeof((pRaCfg)->magic_no) + sizeof((pRaCfg)->command_type)
+							+ sizeof((pRaCfg)->command_id) + sizeof((pRaCfg)->length)
+							+ sizeof((pRaCfg)->sequence) + OS_NTOHS((pRaCfg)->length);
+	DBGPRINT(RT_DEBUG_TRACE, ("wrq->u.data.length = %d\n", (pwrq)->u.data.length));
+
+	if (copy_to_user((pwrq)->u.data.pointer, (UCHAR *)(pRaCfg), (pwrq)->u.data.length))
+	{
+		
+		DBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in %s\n", __FUNCTION__));
+		return (-EFAULT);
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("RACFG command(0x%04x)[magic number(0x%08x)] is done\n", 
+										OS_NTOHS(pRaCfg->command_id), OS_NTOHL(pRaCfg->magic_no)));
+	}
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_ATE_START(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_START\n"));
+
+	pAd->ate.bQAEnabled = TRUE;
+	DBGPRINT(RT_DEBUG_TRACE,("pAd->ate.bQAEnabled = %s\n", (pAd->ate.bQAEnabled)? "TRUE":"FALSE"));
+	
+	/* Prepare feedback as soon as we can to avoid QA timeout. */
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+	
+#ifdef	CONFIG_RT2880_ATE_CMD_NEW
+	Set_ATE_Proc(pAd, "ATESTART");
+#else
+	Set_ATE_Proc(pAd, "APSTOP");
+#endif /* CONFIG_RT2880_ATE_CMD_NEW */
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_ATE_STOP(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	INT32 ret;
+
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_STOP\n"));
+
+	pAd->ate.bQAEnabled = FALSE;
+	DBGPRINT(RT_DEBUG_TRACE,("pAd->ate.bQAEnabled = %s\n", (pAd->ate.bQAEnabled)? "TRUE":"FALSE"));
+
+	/*
+		Distinguish this command came from QA(via ate agent)
+		or ate agent according to the existence of pid in payload.
+
+		No need to prepare feedback if this cmd came directly from ate agent,
+		not from QA.
+	*/
+	pRaCfg->length = OS_NTOHS(pRaCfg->length);
+
+	if (pRaCfg->length == sizeof(pAd->ate.AtePid))
+	{
+		/*
+			This command came from QA.
+			Get the pid of ATE agent.
+		*/
+		memcpy((UCHAR *)&pAd->ate.AtePid,
+						(&pRaCfg->data[0]) - 2/* == sizeof(pRaCfg->status) */,
+						sizeof(pAd->ate.AtePid));					
+
+		/* Prepare feedback as soon as we can to avoid QA timeout. */
+		ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+		/*
+			Kill ATE agent when leaving ATE mode.
+
+			We must kill ATE agent first before setting ATESTOP,
+			or Microsoft will report sth. wrong. 
+		*/
+#ifdef LINUX
+		ret = RTMP_THREAD_PID_KILL(pAd->ate.AtePid);
+		if (ret)
+			DBGPRINT(RT_DEBUG_ERROR, ("%s: unable to kill ate thread\n", 
+				RTMP_OS_NETDEV_GET_DEVNAME(pAd->net_dev)));
+#endif /* LINUX */
+	}
+		
+
+	/* AP/STA might have in ATE_STOP mode due to cmd from QA. */
+	if (ATE_ON(pAd))
+	{
+		/* Someone has killed ate agent while QA GUI is still open. */
+
+#ifdef	CONFIG_RT2880_ATE_CMD_NEW
+		Set_ATE_Proc(pAd, "ATESTOP");
+#else
+		Set_ATE_Proc(pAd, "APSTART");
+#endif
+		DBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_AP_START is done !\n"));
+	}
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_RF_WRITE_ALL(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	UINT32 R1, R2, R3, R4;
+	USHORT channel;
+	
+	memcpy(&R1, pRaCfg->data-2, 4);
+	memcpy(&R2, pRaCfg->data+2, 4);
+	memcpy(&R3, pRaCfg->data+6, 4);
+	memcpy(&R4, pRaCfg->data+10, 4);
+	memcpy(&channel, pRaCfg->data+14, 2);		
+	
+	pAd->LatchRfRegs.R1 = OS_NTOHL(R1);
+	pAd->LatchRfRegs.R2 = OS_NTOHL(R2);
+	pAd->LatchRfRegs.R3 = OS_NTOHL(R3);
+	pAd->LatchRfRegs.R4 = OS_NTOHL(R4);
+	pAd->LatchRfRegs.Channel = OS_NTOHS(channel);
+
+	RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R1);
+	RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R2);
+	RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R3);
+	RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R4);
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return  NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_E2PROM_READ16(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	UINT16	offset=0, value=0;
+	USHORT  tmp=0;				
+
+	offset = OS_NTOHS(pRaCfg->status);
+
+	/* "tmp" is especially for some compilers... */
+	RT28xx_EEPROM_READ16(pAd, offset, tmp);
+	value = tmp;
+	value = OS_HTONS(value);
+	
+	DBGPRINT(RT_DEBUG_TRACE,("EEPROM Read offset = 0x%04x, value = 0x%04x\n", offset, value));
+	memcpy(pRaCfg->data, &value, 2);
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status)+2, NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_E2PROM_WRITE16(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	USHORT	offset, value;
+	
+	offset = OS_NTOHS(pRaCfg->status);
+	memcpy(&value, pRaCfg->data, 2);
+	value = OS_NTOHS(value);
+	RT28xx_EEPROM_WRITE16(pAd, offset, value);
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_E2PROM_READ_ALL(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	USHORT buffer[EEPROM_SIZE >> 1];
+
+	rt_ee_read_all(pAd,(USHORT *)buffer);
+	memcpy_exs(pAd, pRaCfg->data, (UCHAR *)buffer, EEPROM_SIZE);
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status)+EEPROM_SIZE, NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_E2PROM_WRITE_ALL(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	USHORT buffer[EEPROM_SIZE >> 1];
+
+	NdisZeroMemory((UCHAR *)buffer, EEPROM_SIZE);
+	memcpy_exs(pAd, (UCHAR *)buffer, (UCHAR *)&pRaCfg->status, EEPROM_SIZE);
+	rt_ee_write_all(pAd,(USHORT *)buffer);
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_IO_READ(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	UINT32	offset;
+	UINT32	value;
+	
+	memcpy(&offset, &pRaCfg->status, 4);
+	offset = OS_NTOHL(offset);
+
+	/*
+		We do not need the base address.
+		So just extract the offset out.
+	*/
+	{
+		offset &= 0x0000FFFF;
+		RTMP_IO_READ32(pAd, offset, &value);
+	}
+	value = OS_HTONL(value);
+	memcpy(pRaCfg->data, &value, 4);
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status)+4, NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_IO_WRITE(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	UINT32	offset, value;
+					
+	memcpy(&offset, pRaCfg->data-2, 4);
+	memcpy(&value, pRaCfg->data+2, 4);
+
+	offset = OS_NTOHL(offset);
+
+	/*
+		We do not need the base address.
+		So just extract the offset out.
+	*/
+	offset &= 0x0000FFFF;
+	value = OS_NTOHL(value);
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_IO_WRITE: offset = %x, value = %x\n", offset, value));
+	RTMP_IO_WRITE32(pAd, offset, value);
+	
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_IO_READ_BULK(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	UINT32	offset;
+	USHORT	len;
+	
+	memcpy(&offset, &pRaCfg->status, 4);
+	offset = OS_NTOHL(offset);
+
+	/*
+		We do not need the base address.
+		So just extract the offset out.
+	*/
+	offset &= 0x0000FFFF;
+	memcpy(&len, pRaCfg->data+2, 2);
+	len = OS_NTOHS(len);
+
+	if (len > 371)
+	{
+		DBGPRINT(RT_DEBUG_TRACE,("length requested is too large, make it smaller\n"));
+		pRaCfg->length = OS_HTONS(2);
+		pRaCfg->status = OS_HTONS(1);
+
+		return -EFAULT;
+	}
+
+	RTMP_IO_READ_BULK(pAd, pRaCfg->data, offset, len*4);/* unit in four bytes*/
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status)+(len*4), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_BBP_READ8(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	USHORT	offset;
+	UCHAR	value;
+	
+	value = 0;
+	offset = OS_NTOHS(pRaCfg->status);
+
+	if (ATE_ON(pAd))
+	{
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, offset, &value);
+	}
+	else
+	{
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, offset, &value);	
+	}
+
+	pRaCfg->data[0] = value;
+	
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status)+1, NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_BBP_WRITE8(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	USHORT	offset;
+	UCHAR	value;
+	
+	offset = OS_NTOHS(pRaCfg->status);
+	memcpy(&value, pRaCfg->data, 1);
+
+	if (ATE_ON(pAd))
+	{
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, offset, value);
+	}
+	else
+	{
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, offset, value);
+	}
+
+	
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_BBP_READ_ALL(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	USHORT bbp_reg_index;
+	
+	for (bbp_reg_index = 0; bbp_reg_index < pAd->chipCap.MaxNumOfBbpId+1; bbp_reg_index++)
+	{
+		pRaCfg->data[bbp_reg_index] = 0;
+		
+		if (ATE_ON(pAd))
+		{
+			ATE_BBP_IO_READ8_BY_REG_ID(pAd, bbp_reg_index, &pRaCfg->data[bbp_reg_index]);
+		}
+		else
+		{
+			RTMP_BBP_IO_READ8_BY_REG_ID(pAd, bbp_reg_index, &pRaCfg->data[bbp_reg_index]);
+		}
+	}
+	
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status)+ pAd->chipCap.MaxNumOfBbpId+1, NDIS_STATUS_SUCCESS);
+	
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_GET_NOISE_LEVEL(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	UCHAR	channel;
+	INT32   buffer[3][10];/* 3 : RxPath ; 10 : no. of per rssi samples */
+
+	channel = (OS_NTOHS(pRaCfg->status) & 0x00FF);
+	CalNoiseLevel(pAd, channel, buffer);
+	memcpy_exl(pAd, (UCHAR *)pRaCfg->data, (UCHAR *)&(buffer[0][0]), (sizeof(INT32)*3*10));
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status)+(sizeof(INT32)*3*10), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+
+static  INT DO_RACFG_CMD_GET_COUNTER(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	memcpy_exl(pAd, &pRaCfg->data[0], (UCHAR *)&pAd->ate.U2M, 4);
+	memcpy_exl(pAd, &pRaCfg->data[4], (UCHAR *)&pAd->ate.OtherData, 4);
+	memcpy_exl(pAd, &pRaCfg->data[8], (UCHAR *)&pAd->ate.Beacon, 4);
+	memcpy_exl(pAd, &pRaCfg->data[12], (UCHAR *)&pAd->ate.OtherCount, 4);
+	memcpy_exl(pAd, &pRaCfg->data[16], (UCHAR *)&pAd->ate.TxAc0, 4);
+	memcpy_exl(pAd, &pRaCfg->data[20], (UCHAR *)&pAd->ate.TxAc1, 4);
+	memcpy_exl(pAd, &pRaCfg->data[24], (UCHAR *)&pAd->ate.TxAc2, 4);
+	memcpy_exl(pAd, &pRaCfg->data[28], (UCHAR *)&pAd->ate.TxAc3, 4);
+	memcpy_exl(pAd, &pRaCfg->data[32], (UCHAR *)&pAd->ate.TxHCCA, 4);
+	memcpy_exl(pAd, &pRaCfg->data[36], (UCHAR *)&pAd->ate.TxMgmt, 4);
+	memcpy_exl(pAd, &pRaCfg->data[40], (UCHAR *)&pAd->ate.RSSI0, 4);
+	memcpy_exl(pAd, &pRaCfg->data[44], (UCHAR *)&pAd->ate.RSSI1, 4);
+	memcpy_exl(pAd, &pRaCfg->data[48], (UCHAR *)&pAd->ate.RSSI2, 4);
+	memcpy_exl(pAd, &pRaCfg->data[52], (UCHAR *)&pAd->ate.SNR0, 4);
+	memcpy_exl(pAd, &pRaCfg->data[56], (UCHAR *)&pAd->ate.SNR1, 4);
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status)+60, NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_CLEAR_COUNTER(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	pAd->ate.U2M = 0;
+	pAd->ate.OtherData = 0;
+	pAd->ate.Beacon = 0;
+	pAd->ate.OtherCount = 0;
+	pAd->ate.TxAc0 = 0;
+	pAd->ate.TxAc1 = 0;
+	pAd->ate.TxAc2 = 0;
+	pAd->ate.TxAc3 = 0;
+	pAd->ate.TxHCCA = 0;
+	pAd->ate.TxMgmt = 0;
+	pAd->ate.TxDoneCount = 0;
+	
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_TX_START(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	USHORT *p;
+	USHORT	err = 1;
+	UCHAR   Bbp22Value = 0, Bbp24Value = 0;
+
+	if ((pAd->ate.TxStatus != 0) && (pAd->ate.Mode & ATE_TXFRAME))
+	{
+		DBGPRINT(RT_DEBUG_TRACE,("Ate Tx is already running, to run next Tx, you must stop it first\n"));
+		err = 2;
+		goto tx_start_error;
+	}
+	else if ((pAd->ate.TxStatus != 0) && !(pAd->ate.Mode & ATE_TXFRAME))
+	{
+		int i = 0;
+
+		while ((i++ < 10) && (pAd->ate.TxStatus != 0))
+		{
+			RtmpOsMsDelay(5);
+		}
+
+		/* force it to stop */
+		pAd->ate.TxStatus = 0;
+		pAd->ate.TxDoneCount = 0;
+		pAd->ate.bQATxStart = FALSE;
+	}
+
+#if defined(NEW_TXCONT) || defined(NEW_TXCARR) || defined(NEW_TXCARRSUPP)
+	/* Reset ATE mode and set Tx/Rx Idle */
+	/* New proposed TXCONT/TXCARR/TXCARRSUPP solution. */
+	if (pAd->ate.Mode & ATE_TXFRAME)
+	{
+		TXSTOP(pAd);
+	}
+#endif /* NEW_TXCONT || NEW_TXCARR || NEW_TXCARRSUPP */
+
+	/*
+		If pRaCfg->length == 0, this "RACFG_CMD_TX_START"
+		is for Carrier test or Carrier Suppression.
+	*/
+	if (OS_NTOHS(pRaCfg->length) != 0)
+	{
+		/* get frame info */
+#ifdef RTMP_MAC_USB
+		NdisMoveMemory(&pAd->ate.TxInfo, pRaCfg->data - 2, 4);
+#ifdef RT_BIG_ENDIAN
+		RTMPDescriptorEndianChange((PUCHAR) &pAd->ate.TxInfo, TYPE_TXINFO);
+#endif /* RT_BIG_ENDIAN */
+#endif /* RTMP_MAC_USB */
+
+		NdisMoveMemory(&pAd->ate.TxWI, pRaCfg->data + 2, 16);						
+#ifdef RT_BIG_ENDIAN
+		RTMPWIEndianChange((PUCHAR)&pAd->ate.TxWI, TYPE_TXWI);
+#endif /* RT_BIG_ENDIAN */
+
+		NdisMoveMemory(&pAd->ate.TxCount, pRaCfg->data + 18, 4);
+		pAd->ate.TxCount = OS_NTOHL(pAd->ate.TxCount);
+
+		p = (USHORT *)(&pRaCfg->data[22]);
+
+		/* always use QID_AC_BE */
+		pAd->ate.QID = 0;
+
+		p = (USHORT *)(&pRaCfg->data[24]);
+		pAd->ate.HLen = OS_NTOHS(*p);
+
+		if (pAd->ate.HLen > 32)
+		{
+			DBGPRINT(RT_DEBUG_ERROR,("pAd->ate.HLen > 32\n"));
+			err = 3;
+			goto tx_start_error;
+		}
+
+		NdisMoveMemory(&pAd->ate.Header, pRaCfg->data + 26, pAd->ate.HLen);
+
+		pAd->ate.PLen = OS_NTOHS(pRaCfg->length) - (pAd->ate.HLen + 28);
+
+		if (pAd->ate.PLen > 32)
+		{
+			DBGPRINT(RT_DEBUG_ERROR,("pAd->ate.PLen > 32\n"));
+			err = 4;
+			goto tx_start_error;
+		}
+
+		NdisMoveMemory(&pAd->ate.Pattern, pRaCfg->data + 26 + pAd->ate.HLen, pAd->ate.PLen);
+		pAd->ate.DLen = pAd->ate.TxWI.MPDUtotalByteCount - pAd->ate.HLen;
+
+
+	}
+
+	ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &Bbp22Value);
+
+	switch (Bbp22Value)
+	{
+		case BBP22_TXFRAME:
+			{
+				DBGPRINT(RT_DEBUG_TRACE,("START TXFRAME\n"));
+				pAd->ate.bQATxStart = TRUE;
+				Set_ATE_Proc(pAd, "TXFRAME");
+			}
+			break;
+
+		case BBP22_TXCONT_OR_CARRSUPP:
+			{
+				DBGPRINT(RT_DEBUG_TRACE,("BBP22_TXCONT_OR_CARRSUPP\n"));
+				ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R24, &Bbp24Value);
+
+				switch (Bbp24Value)
+				{
+					case BBP24_TXCONT:
+						{
+							DBGPRINT(RT_DEBUG_TRACE,("START TXCONT\n"));
+							pAd->ate.bQATxStart = TRUE;
+#ifdef NEW_TXCONT
+							/* New proposed solution */
+							/* Let QA handle all hardware manipulation. */ 
+#else
+							Set_ATE_Proc(pAd, "TXCONT");
+#endif /* NEW_TXCONT */
+						}
+						break;
+
+					case BBP24_CARRSUPP:
+						{
+							DBGPRINT(RT_DEBUG_TRACE,("START TXCARRSUPP\n"));
+							pAd->ate.bQATxStart = TRUE;
+#ifdef NEW_TXCARRSUPP
+							/* New proposed solution */
+							/* Let QA handle all hardware manipulation. */ 
+#else
+							Set_ATE_Proc(pAd, "TXCARS");
+#endif /* NEW_TXCARRSUPP */
+						}
+						break;
+
+					default:
+						{
+							DBGPRINT(RT_DEBUG_ERROR,("Unknown TX subtype !"));
+						}
+						break;
+				}
+			}
+			break;	
+
+		case BBP22_TXCARR:
+			{
+				DBGPRINT(RT_DEBUG_TRACE,("START TXCARR\n"));
+				pAd->ate.bQATxStart = TRUE;
+#ifdef NEW_TXCARR
+				/* New proposed solution */
+				/* Let QA handle all hardware manipulation. */ 
+#else
+				Set_ATE_Proc(pAd, "TXCARR");
+#endif /* NEW_TXCARR */
+			}
+			break;							
+
+		default:
+			{
+				DBGPRINT(RT_DEBUG_ERROR,("Unknown Start TX subtype !"));
+			}
+			break;
+	}
+
+	if (pAd->ate.bQATxStart == TRUE)
+	{
+		ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+		return NDIS_STATUS_SUCCESS;
+	}
+
+tx_start_error:
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), err);
+
+	return err;
+}
+
+
+static  INT DO_RACFG_CMD_GET_TX_STATUS(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	UINT32 count=0;
+	
+	count = OS_HTONL(pAd->ate.TxDoneCount);
+	NdisMoveMemory(pRaCfg->data, &count, 4);
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status)+4, NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_TX_STOP(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_TX_STOP\n"));
+
+	Set_ATE_Proc(pAd, "TXSTOP");
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_RX_START(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_RX_START\n"));
+
+	pAd->ate.bQARxStart = TRUE;
+	Set_ATE_Proc(pAd, "RXFRAME");
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}	
+
+
+static  INT DO_RACFG_CMD_RX_STOP(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_RX_STOP\n"));
+
+	Set_ATE_Proc(pAd, "RXSTOP");
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_ATE_START_TX_CARRIER(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_START_TX_CARRIER\n"));
+
+	Set_ATE_Proc(pAd, "TXCARR");
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_ATE_START_TX_CONT(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_START_TX_CONT\n"));
+
+	Set_ATE_Proc(pAd, "TXCONT");
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_ATE_START_TX_FRAME(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_START_TX_FRAME\n"));
+
+	Set_ATE_Proc(pAd, "TXFRAME");
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}	
+
+
+static  INT DO_RACFG_CMD_ATE_SET_BW(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	SHORT    value = 0;
+	STRING    str[LEN_OF_ARG];
+
+	NdisZeroMemory(str, LEN_OF_ARG);
+	
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_BW\n"));				
+
+	memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
+	value = OS_NTOHS(value);
+	snprintf((char *)str, sizeof(str), "%d", value);
+
+	Set_ATE_TX_BW_Proc(pAd, str);
+	
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_ATE_SET_TX_POWER0(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	SHORT    value = 0;
+	STRING    str[LEN_OF_ARG];
+
+	NdisZeroMemory(str, LEN_OF_ARG);
+
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_TX_POWER0\n"));				
+
+	memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
+	value = OS_NTOHS(value);
+	snprintf((char *)str, sizeof(str), "%d", value);
+	Set_ATE_TX_POWER0_Proc(pAd, str);
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_ATE_SET_TX_POWER1(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	SHORT    value = 0;
+	STRING    str[LEN_OF_ARG];
+
+	NdisZeroMemory(str, LEN_OF_ARG);
+	
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_TX_POWER1\n"));				
+
+	memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
+	value = OS_NTOHS(value);
+	snprintf((char *)str, sizeof(str), "%d", value);
+	Set_ATE_TX_POWER1_Proc(pAd, str);
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+#if defined(DOT11N_SS3_SUPPORT)
+static  INT DO_RACFG_CMD_ATE_SET_TX_POWER2(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	SHORT    value = 0;
+	STRING    str[LEN_OF_ARG];
+
+	NdisZeroMemory(str, LEN_OF_ARG);
+	
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_TX_POWER2\n"));				
+
+	memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
+	value = OS_NTOHS(value);
+	snprintf((char *)str, sizeof(str), "%d", value);
+	Set_ATE_TX_POWER2_Proc(pAd, str);
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+#endif /* DOT11N_SS3_SUPPORT */
+
+
+static  INT DO_RACFG_CMD_ATE_SET_FREQ_OFFSET(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	SHORT    value = 0;
+	STRING    str[LEN_OF_ARG];
+
+	NdisZeroMemory(str, LEN_OF_ARG);
+
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_FREQ_OFFSET\n"));				
+
+	memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
+	value = OS_NTOHS(value);
+	snprintf((char *)str, sizeof(str), "%d", value);
+	Set_ATE_TX_FREQOFFSET_Proc(pAd, str);
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_ATE_GET_STATISTICS(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_GET_STATISTICS\n"));
+
+	memcpy_exl(pAd, &pRaCfg->data[0], (UCHAR *)&pAd->ate.TxDoneCount, 4);
+	memcpy_exl(pAd, &pRaCfg->data[4], (UCHAR *)&pAd->WlanCounters.RetryCount.u.LowPart, 4);
+	memcpy_exl(pAd, &pRaCfg->data[8], (UCHAR *)&pAd->WlanCounters.FailedCount.u.LowPart, 4);
+	memcpy_exl(pAd, &pRaCfg->data[12], (UCHAR *)&pAd->WlanCounters.RTSSuccessCount.u.LowPart, 4);
+	memcpy_exl(pAd, &pRaCfg->data[16], (UCHAR *)&pAd->WlanCounters.RTSFailureCount.u.LowPart, 4);
+	memcpy_exl(pAd, &pRaCfg->data[20], (UCHAR *)&pAd->WlanCounters.ReceivedFragmentCount.QuadPart, 4);
+	memcpy_exl(pAd, &pRaCfg->data[24], (UCHAR *)&pAd->WlanCounters.FCSErrorCount.u.LowPart, 4);
+	memcpy_exl(pAd, &pRaCfg->data[28], (UCHAR *)&pAd->Counters8023.RxNoBuffer, 4);
+	memcpy_exl(pAd, &pRaCfg->data[32], (UCHAR *)&pAd->WlanCounters.FrameDuplicateCount.u.LowPart, 4);
+	memcpy_exl(pAd, &pRaCfg->data[36], (UCHAR *)&pAd->RalinkCounters.OneSecFalseCCACnt, 4);
+	
+	if (pAd->ate.RxAntennaSel == 0)
+	{
+		INT32 RSSI0 = 0;
+		INT32 RSSI1 = 0;
+		INT32 RSSI2 = 0;
+
+		RSSI0 = (INT32)(pAd->ate.LastRssi0 - pAd->BbpRssiToDbmDelta);
+		RSSI1 = (INT32)(pAd->ate.LastRssi1 - pAd->BbpRssiToDbmDelta);
+		RSSI2 = (INT32)(pAd->ate.LastRssi2 - pAd->BbpRssiToDbmDelta);
+		memcpy_exl(pAd, &pRaCfg->data[40], (UCHAR *)&RSSI0, 4);
+		memcpy_exl(pAd, &pRaCfg->data[44], (UCHAR *)&RSSI1, 4);
+		memcpy_exl(pAd, &pRaCfg->data[48], (UCHAR *)&RSSI2, 4);
+		ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status)+52, NDIS_STATUS_SUCCESS);
+	}
+	else
+	{
+		INT32 RSSI0 = 0;
+	
+		RSSI0 = (INT32)(pAd->ate.LastRssi0 - pAd->BbpRssiToDbmDelta);
+		memcpy_exl(pAd, &pRaCfg->data[40], (UCHAR *)&RSSI0, 4);
+		ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status)+44, NDIS_STATUS_SUCCESS);
+	}
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_ATE_RESET_COUNTER(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	SHORT    value = 1;
+	STRING    str[LEN_OF_ARG];
+
+	NdisZeroMemory(str, LEN_OF_ARG);
+
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_RESET_COUNTER\n"));				
+
+	snprintf((char *)str, sizeof(str), "%d", value);
+	Set_ResetStatCounter_Proc(pAd, str);
+
+	pAd->ate.TxDoneCount = 0;
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_ATE_SEL_TX_ANTENNA(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)	
+{
+	SHORT    value = 0;
+	STRING    str[LEN_OF_ARG];
+
+	NdisZeroMemory(str, LEN_OF_ARG);
+	
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SEL_TX_ANTENNA\n"));				
+
+	memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
+	value = OS_NTOHS(value);
+	snprintf((char *)str, sizeof(str), "%d", value);
+	Set_ATE_TX_Antenna_Proc(pAd, str);
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_ATE_SEL_RX_ANTENNA(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	SHORT    value = 0;
+	STRING    str[LEN_OF_ARG];
+
+	NdisZeroMemory(str, LEN_OF_ARG);
+	
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SEL_RX_ANTENNA\n"));				
+
+	memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
+	value = OS_NTOHS(value);
+	snprintf((char *)str, sizeof(str), "%d", value);
+	Set_ATE_RX_Antenna_Proc(pAd, str);
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_ATE_SET_PREAMBLE(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	SHORT    value = 0;
+	STRING    str[LEN_OF_ARG];
+
+	NdisZeroMemory(str, LEN_OF_ARG);
+	
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_PREAMBLE\n"));				
+
+	memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
+	value = OS_NTOHS(value);
+	snprintf((char *)str, sizeof(str), "%d", value);
+	Set_ATE_TX_MODE_Proc(pAd, str);
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_ATE_SET_CHANNEL(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	SHORT    value = 0;
+	STRING    str[LEN_OF_ARG];
+
+	NdisZeroMemory(str, LEN_OF_ARG);
+	
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_CHANNEL\n"));				
+
+	memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
+	value = OS_NTOHS(value);
+	snprintf((char *)str, sizeof(str), "%d", value);
+	Set_ATE_CHANNEL_Proc(pAd, str);
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_ATE_SET_ADDR1(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_ADDR1\n"));
+
+	/*
+		Addr is an array of UCHAR,
+		so no need to perform endian swap.
+	*/
+	memcpy(pAd->ate.Addr1, (PUCHAR)(pRaCfg->data - 2), MAC_ADDR_LEN);
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_ATE_SET_ADDR2(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_ADDR2\n"));
+
+	/*
+		Addr is an array of UCHAR,
+		so no need to perform endian swap.
+	*/
+	memcpy(pAd->ate.Addr2, (PUCHAR)(pRaCfg->data - 2), MAC_ADDR_LEN);
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_ATE_SET_ADDR3(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_ADDR3\n"));
+
+	/*
+		Addr is an array of UCHAR,
+		so no need to perform endian swap.
+	*/
+	memcpy(pAd->ate.Addr3, (PUCHAR)(pRaCfg->data - 2), MAC_ADDR_LEN);
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_ATE_SET_RATE(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	SHORT    value = 0;
+	STRING    str[LEN_OF_ARG];
+
+	NdisZeroMemory(str, LEN_OF_ARG);
+	
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_RATE\n"));				
+
+	memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
+	value = OS_NTOHS(value);
+	snprintf((char *)str, sizeof(str), "%d", value);
+	Set_ATE_TX_MCS_Proc(pAd, str);
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_ATE_SET_TX_FRAME_LEN(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	SHORT    value = 0;
+	STRING    str[LEN_OF_ARG];
+
+	NdisZeroMemory(str, LEN_OF_ARG);
+	
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_TX_FRAME_LEN\n"));				
+
+	memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
+	value = OS_NTOHS(value);
+	snprintf((char *)str, sizeof(str), "%d", value);
+	Set_ATE_TX_LENGTH_Proc(pAd, str);
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_ATE_SET_TX_FRAME_COUNT(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	USHORT    value = 0;
+	STRING    str[LEN_OF_ARG];
+
+	NdisZeroMemory(str, LEN_OF_ARG);
+	
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_TX_FRAME_COUNT\n"));				
+
+	memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
+	value = OS_NTOHS(value);
+
+	{
+		snprintf((char *)str, sizeof(str), "%d", value);
+		Set_ATE_TX_COUNT_Proc(pAd, str);
+	}
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_ATE_START_RX_FRAME(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_RX_START\n"));
+
+	Set_ATE_Proc(pAd, "RXFRAME");
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_ATE_E2PROM_READ_BULK(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	USHORT offset;
+	USHORT len;
+	USHORT buffer[EEPROM_SIZE >> 1];
+	
+	offset = OS_NTOHS(pRaCfg->status);
+	memcpy(&len, pRaCfg->data, 2);
+	len = OS_NTOHS(len);
+	
+	rt_ee_read_all(pAd, (USHORT *)buffer);
+
+	if (offset + len <= EEPROM_SIZE)
+		memcpy_exs(pAd, pRaCfg->data, (UCHAR *)buffer+offset, len);
+	else
+		DBGPRINT(RT_DEBUG_ERROR, ("exceed EEPROM size\n"));
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status)+len, NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_ATE_E2PROM_WRITE_BULK(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	USHORT offset;
+	USHORT len;
+	USHORT buffer[EEPROM_SIZE >> 1];
+	
+	offset = OS_NTOHS(pRaCfg->status);
+	memcpy(&len, pRaCfg->data, 2);
+	len = OS_NTOHS(len);
+
+	memcpy_exs(pAd, (UCHAR *)buffer + offset, (UCHAR *)pRaCfg->data + 2, len);
+		
+	if ((offset + len) <= EEPROM_SIZE)
+	{
+		rt_ee_write_bulk(pAd,(USHORT *)(((UCHAR *)buffer) + offset), offset, len);
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("exceed EEPROM size(%d)\n", EEPROM_SIZE));
+		DBGPRINT(RT_DEBUG_ERROR, ("offset=%d\n", offset));
+		DBGPRINT(RT_DEBUG_ERROR, ("length=%d\n", len));
+		DBGPRINT(RT_DEBUG_ERROR, ("offset+length=%d\n", (offset+len)));
+	}
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_ATE_IO_WRITE_BULK(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	UINT32 offset, i, value;
+	USHORT len;
+	
+	memcpy(&offset, &pRaCfg->status, 4);
+	offset = OS_NTOHL(offset);
+	memcpy(&len, pRaCfg->data+2, 2);
+	len = OS_NTOHS(len);
+	
+	for (i = 0; i < len; i += 4)
+	{
+		memcpy_exl(pAd, (UCHAR *)&value, pRaCfg->data+4+i, 4);
+		DBGPRINT(RT_DEBUG_TRACE,("Write %x %x\n", offset + i, value));
+		RTMP_IO_WRITE32(pAd, ((offset+i) & (0xffff)), value);
+	}
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_ATE_BBP_READ_BULK(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	USHORT offset;
+	USHORT len;
+	USHORT j;
+	
+	offset = OS_NTOHS(pRaCfg->status);
+	memcpy(&len, pRaCfg->data, 2);
+	len = OS_NTOHS(len);
+	
+	for (j = offset; j < (offset+len); j++)
+	{
+		pRaCfg->data[j - offset] = 0;
+		
+		if (pAd->ate.Mode == ATE_STOP)
+		{
+			RTMP_BBP_IO_READ8_BY_REG_ID(pAd, j, &pRaCfg->data[j - offset]);
+		}
+		else
+		{
+			ATE_BBP_IO_READ8_BY_REG_ID(pAd, j, &pRaCfg->data[j - offset]);
+		}
+	}
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status)+len, NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_ATE_BBP_WRITE_BULK(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	USHORT offset;
+	USHORT len;
+	USHORT j;
+	UCHAR *value;
+	
+	offset = OS_NTOHS(pRaCfg->status);
+	memcpy(&len, pRaCfg->data, 2);
+	len = OS_NTOHS(len);
+					
+	for (j = offset; j < (offset+len); j++)
+	{
+		value = pRaCfg->data + 2 + (j - offset);
+		if (pAd->ate.Mode == ATE_STOP)
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, j,  *value);
+		}
+		else
+		{
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, j,  *value);
+		}
+	}
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+
+
+#if defined (RT3883) || defined (RT3352) || defined (RT5350)
+/* busy mode - make CPU in ATE mode as busy as in normal driver */ 
+static  INT DO_RACFG_CMD_ATE_RUN_CPUBUSY(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	UINT32    mode = 0;
+	char *argv_busy[] = {"/sbin/cpubusy.sh", "2", NULL };
+	char *argv_idle[] = {"/usr/bin/killall", "cpubusy.sh", "3", NULL };
+
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_RUN_CPUBUSY\n"));
+	memcpy((PUCHAR)&mode, pRaCfg->data-2, 4);
+	mode = OS_NTOHL(mode);
+
+	if (mode == 0)
+	{ 
+		/* idle mode */
+		call_usermodehelper(argv_idle[0], argv_idle, NULL, 0);
+	}
+	else
+	{ 
+		/* busy mode */
+		call_usermodehelper(argv_busy[0], argv_busy, NULL, 0);
+	}
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+#endif /* defined (RT3883) || defined (RT3352) || defined (RT5350) */
+
+
+#ifdef RTMP_RF_RW_SUPPORT
+static  INT DO_RACFG_CMD_ATE_RF_READ_BULK(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	USHORT offset;
+	USHORT len;
+	USHORT j;
+	
+	offset = OS_NTOHS(pRaCfg->status);
+	memcpy(&len, pRaCfg->data, 2);
+	len = OS_NTOHS(len);
+
+	for (j = offset; j < (offset+len); j++)
+	{
+		pRaCfg->data[j - offset] = 0;
+		ATE_RF_IO_READ8_BY_REG_ID(pAd, j,  &pRaCfg->data[j - offset]);
+	}
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status)+len, NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static  INT DO_RACFG_CMD_ATE_RF_WRITE_BULK(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	USHORT offset;
+	USHORT len;
+	USHORT j;
+	UCHAR *value;
+	
+	offset = OS_NTOHS(pRaCfg->status);
+	memcpy(&len, pRaCfg->data, 2);
+	len = OS_NTOHS(len);
+
+	for (j = offset; j < (offset+len); j++)
+	{
+		value = pRaCfg->data + 2 + (j - offset);
+		ATE_RF_IO_WRITE8_BY_REG_ID(pAd, j,  *value);
+	}
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}
+#endif /* RTMP_RF_RW_SUPPORT */
+
+
+static INT32 DO_RACFG_CMD_ATE_SHOW_PARAM(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	INT32 Status = NDIS_STATUS_SUCCESS;
+	UINT32 Len;
+	ATE_EX_PARAM ATEExParam;
+	PATE_INFO pATEInfo;
+
+	pATEInfo = &pAd->ate;
+	
+	ATEExParam.mode = pATEInfo->Mode;
+	ATEExParam.TxPower0 = pATEInfo->TxPower0;
+	ATEExParam.TxPower1 = pATEInfo->TxPower1;
+
+#ifdef DOT11N_SS3_SUPPORT
+	ATEExParam.TxPower2 = pATEInfo->TxPower2;
+#endif /* DOT11N_SS3_SUPPORT */
+
+	ATEExParam.TxAntennaSel = pATEInfo->TxAntennaSel;
+	ATEExParam.RxAntennaSel = pATEInfo->RxAntennaSel;
+
+
+#ifdef CONFIG_STA_SUPPORT
+	NdisMoveMemory(ATEExParam.DA, pATEInfo->Addr3, MAC_ADDR_LEN);
+	NdisMoveMemory(ATEExParam.SA, pATEInfo->Addr2, MAC_ADDR_LEN);
+	NdisMoveMemory(ATEExParam.BSSID, pATEInfo->Addr1, MAC_ADDR_LEN);
+#endif /* CONFIG_STA_SUPPORT */
+
+	ATEExParam.MCS = pATEInfo->TxWI.MCS;
+	ATEExParam.PhyMode = pATEInfo->TxWI.PHYMODE;
+	ATEExParam.ShortGI = pATEInfo->TxWI.ShortGI;
+	ATEExParam.BW = pATEInfo->TxWI.BW;
+	ATEExParam.Channel = OS_HTONL(pATEInfo->Channel);
+	ATEExParam.TxLength = OS_HTONL(pATEInfo->TxLength);
+	ATEExParam.TxCount = OS_HTONL(pATEInfo->TxCount);
+	ATEExParam.RFFreqOffset = OS_HTONL(pATEInfo->RFFreqOffset);
+	ATEExParam.IPG = OS_HTONL(pATEInfo->IPG);
+	ATEExParam.RxTotalCnt = OS_HTONL(pATEInfo->RxTotalCnt);
+	ATEExParam.RxCntPerSec = OS_HTONL(pATEInfo->RxCntPerSec);
+	ATEExParam.LastSNR0 = pATEInfo->LastSNR0;
+	ATEExParam.LastSNR1 = pATEInfo->LastSNR1;
+#ifdef DOT11N_SS3_SUPPORT
+	ATEExParam.LastSNR2 = pATEInfo->LastSNR2;
+#endif /* DOT11N_SS3_SUPPORT */
+	ATEExParam.LastRssi0 = pATEInfo->LastRssi0;
+	ATEExParam.LastRssi1 = pATEInfo->LastRssi1;
+	ATEExParam.LastRssi2 = pATEInfo->LastRssi2;
+	ATEExParam.AvgRssi0 = pATEInfo->AvgRssi0;
+	ATEExParam.AvgRssi1 = pATEInfo->AvgRssi1;
+	ATEExParam.AvgRssi2 = pATEInfo->AvgRssi2;
+	ATEExParam.AvgRssi0X8 = OS_HTONS(pATEInfo->AvgRssi0X8);
+	ATEExParam.AvgRssi1X8 = OS_HTONS(pATEInfo->AvgRssi1X8);
+	ATEExParam.AvgRssi2X8 = OS_HTONS(pATEInfo->AvgRssi2X8);
+
+	Len = sizeof(ATEExParam);
+	NdisMoveMemory(pRaCfg->data, &ATEExParam, Len);
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status) + Len, NDIS_STATUS_SUCCESS);
+	
+	return Status;
+}
+
+
+typedef INT (*RACFG_CMD_HANDLER)(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg);
+
+
+static RACFG_CMD_HANDLER RACFG_CMD_SET1[] =
+{
+	/* cmd id start from 0x0 */
+	DO_RACFG_CMD_RF_WRITE_ALL,/* 0x0000 */	
+	DO_RACFG_CMD_E2PROM_READ16,/* 0x0001 */
+	DO_RACFG_CMD_E2PROM_WRITE16,/* 0x0002 */
+	DO_RACFG_CMD_E2PROM_READ_ALL,/* 0x0003 */
+	DO_RACFG_CMD_E2PROM_WRITE_ALL,/* 0x0004 */
+	DO_RACFG_CMD_IO_READ,/* 0x0005 */
+	DO_RACFG_CMD_IO_WRITE,/* 0x0006 */
+	DO_RACFG_CMD_IO_READ_BULK,/* 0x0007 */
+	DO_RACFG_CMD_BBP_READ8,/* 0x0008 */
+	DO_RACFG_CMD_BBP_WRITE8,/* 0x0009 */
+	DO_RACFG_CMD_BBP_READ_ALL,/* 0x000a */
+	DO_RACFG_CMD_GET_COUNTER,/* 0x000b */
+	DO_RACFG_CMD_CLEAR_COUNTER,/* 0x000c */
+	NULL /* RACFG_CMD_RSV1 */,/* 0x000d */
+	NULL /* RACFG_CMD_RSV2 */,/* 0x000e */
+	NULL /* RACFG_CMD_RSV3 */,/* 0x000f */
+	DO_RACFG_CMD_TX_START,/* 0x0010 */
+	DO_RACFG_CMD_GET_TX_STATUS,/* 0x0011 */
+	DO_RACFG_CMD_TX_STOP,/* 0x0012 */
+	DO_RACFG_CMD_RX_START,/* 0x0013 */
+	DO_RACFG_CMD_RX_STOP,/* 0x0014 */
+	DO_RACFG_CMD_GET_NOISE_LEVEL,/* 0x0015 */
+	NULL
+
+	/* cmd id end with 0x20 */
+};
+
+
+static RACFG_CMD_HANDLER RACFG_CMD_SET2[] =
+{
+	/* cmd id start from 0x80 */
+	DO_RACFG_CMD_ATE_START,
+	DO_RACFG_CMD_ATE_STOP
+	/* cmd id end with 0x81 */
+};
+
+
+static RACFG_CMD_HANDLER RACFG_CMD_SET3[] =
+{
+	/* cmd id start from 0x100 */
+	DO_RACFG_CMD_ATE_START_TX_CARRIER,
+	DO_RACFG_CMD_ATE_START_TX_CONT,
+	DO_RACFG_CMD_ATE_START_TX_FRAME,
+	DO_RACFG_CMD_ATE_SET_BW,
+	DO_RACFG_CMD_ATE_SET_TX_POWER0,
+	DO_RACFG_CMD_ATE_SET_TX_POWER1,
+	DO_RACFG_CMD_ATE_SET_FREQ_OFFSET,
+	DO_RACFG_CMD_ATE_GET_STATISTICS,
+	DO_RACFG_CMD_ATE_RESET_COUNTER,
+	DO_RACFG_CMD_ATE_SEL_TX_ANTENNA,
+	DO_RACFG_CMD_ATE_SEL_RX_ANTENNA,
+	DO_RACFG_CMD_ATE_SET_PREAMBLE,
+	DO_RACFG_CMD_ATE_SET_CHANNEL,
+	DO_RACFG_CMD_ATE_SET_ADDR1,
+	DO_RACFG_CMD_ATE_SET_ADDR2,
+	DO_RACFG_CMD_ATE_SET_ADDR3,
+	DO_RACFG_CMD_ATE_SET_RATE,
+	DO_RACFG_CMD_ATE_SET_TX_FRAME_LEN,
+	DO_RACFG_CMD_ATE_SET_TX_FRAME_COUNT,
+	DO_RACFG_CMD_ATE_START_RX_FRAME,
+	DO_RACFG_CMD_ATE_E2PROM_READ_BULK,
+	DO_RACFG_CMD_ATE_E2PROM_WRITE_BULK,
+	DO_RACFG_CMD_ATE_IO_WRITE_BULK,
+	DO_RACFG_CMD_ATE_BBP_READ_BULK,
+	DO_RACFG_CMD_ATE_BBP_WRITE_BULK,
+#ifdef RTMP_RF_RW_SUPPORT
+	DO_RACFG_CMD_ATE_RF_READ_BULK,
+	DO_RACFG_CMD_ATE_RF_WRITE_BULK,
+#else
+	NULL,
+	NULL,
+#endif /* RTMP_RF_RW_SUPPORT */
+	NULL
+	/* cmd id end with 0x11b */
+};
+
+
+static RACFG_CMD_HANDLER RACFG_CMD_SET4[] =
+{
+	/* cmd id start from 0x200 */
+	NULL,
+	NULL,
+#if defined (RT3883) || defined (RT3352) || defined (RT5350)
+	DO_RACFG_CMD_ATE_RUN_CPUBUSY/* 0x0202 */
+#else
+	NULL
+#endif /* defined (RT3883) || defined (RT3352) || defined (RT5350) */
+	/* cmd id end with 0x202 */
+};
+
+
+static RACFG_CMD_HANDLER RACFG_CMD_SET5[] =
+{
+	DO_RACFG_CMD_ATE_SHOW_PARAM
+};
+
+
+typedef struct RACFG_CMD_TABLE_{
+	RACFG_CMD_HANDLER *cmdSet;
+	int	cmdSetSize;
+	int	cmdOffset;
+}RACFG_CMD_TABLE;
+
+
+RACFG_CMD_TABLE RACFG_CMD_TABLES[]={
+	{
+		RACFG_CMD_SET1,
+		sizeof(RACFG_CMD_SET1) / sizeof(RACFG_CMD_HANDLER),
+		0x0,
+	},
+	{
+		RACFG_CMD_SET2,
+		sizeof(RACFG_CMD_SET2) / sizeof(RACFG_CMD_HANDLER),
+		0x80,
+	},
+	{
+		RACFG_CMD_SET3,
+		sizeof(RACFG_CMD_SET3) / sizeof(RACFG_CMD_HANDLER),
+		0x100,
+	},
+	{
+		RACFG_CMD_SET4,
+		sizeof(RACFG_CMD_SET4) / sizeof(RACFG_CMD_HANDLER),
+		0x200,
+	},
+	{
+		RACFG_CMD_SET5,
+		sizeof(RACFG_CMD_SET5) / sizeof(RACFG_CMD_HANDLER),
+		0xff00,
+	}
+	
+};
+
+
+static INT32 RACfgCMDHandler(
+	IN PRTMP_ADAPTER pAd,
+	IN RTMP_IOCTL_INPUT_STRUCT *wrq,
+	IN pRACFGHDR pRaCfg)
+{
+	INT32 Status = NDIS_STATUS_SUCCESS;
+	USHORT Command_Id;
+	UINT32 TableIndex = 0;
+
+	Command_Id = OS_NTOHS(pRaCfg->command_id);
+	DBGPRINT(RT_DEBUG_TRACE,("\n%s: Command_Id = 0x%04x !\n", __FUNCTION__, Command_Id));
+	
+	while (TableIndex < (sizeof(RACFG_CMD_TABLES) / sizeof(RACFG_CMD_TABLE)))
+	{
+ 		int cmd_index = 0;
+ 		cmd_index = Command_Id - RACFG_CMD_TABLES[TableIndex].cmdOffset;
+ 		if ((cmd_index >= 0) && (cmd_index < RACFG_CMD_TABLES[TableIndex].cmdSetSize))
+ 		{
+			RACFG_CMD_HANDLER *pCmdSet;
+
+			pCmdSet = RACFG_CMD_TABLES[TableIndex].cmdSet;
+			
+			if (pCmdSet[cmd_index] != NULL)
+				Status = (*pCmdSet[cmd_index])(pAd, wrq, pRaCfg);
+			break;
+		}
+		TableIndex++;
+	}
+
+	/* In passive mode, only commands that read registers are allowed. */ 
+	if (pAd->ate.PassiveMode)
+	{
+		int i, allowCmd = FALSE;
+		static int allowedCmds[] = {
+				RACFG_CMD_E2PROM_READ16, RACFG_CMD_E2PROM_READ_ALL,
+				RACFG_CMD_IO_READ, RACFG_CMD_IO_READ_BULK,
+				RACFG_CMD_BBP_READ8, RACFG_CMD_BBP_READ_ALL,
+				RACFG_CMD_ATE_E2PROM_READ_BULK,
+				RACFG_CMD_ATE_BBP_READ_BULK,
+				RACFG_CMD_ATE_RF_READ_BULK,
+				};
+
+		for (i=0; i<sizeof(allowedCmds)/sizeof(allowedCmds[0]); i++)
+		{
+			if (Command_Id==allowedCmds[i])
+			{
+				allowCmd = TRUE;
+				break;
+			}
+		}
+
+		/* Also allow writes to BF profile registers */
+		if (Command_Id==RACFG_CMD_BBP_WRITE8)
+		{
+			int offset = OS_NTOHS(pRaCfg->status);
+			if (offset==BBP_R27 || (offset>=BBP_R174 && offset<=BBP_R182))
+				allowCmd = TRUE;
+		}
+
+		/* If not allowed, then ignore the command. */
+		if (!allowCmd)
+		{
+			ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+			Status = NDIS_STATUS_FAILURE;
+		}
+	}
+
+	return Status;
+}
+
+
+INT RtmpDoAte(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	RTMP_IOCTL_INPUT_STRUCT		*wrq,
+	IN	PSTRING			wrq_name)
+{
+	INT32 Status = NDIS_STATUS_SUCCESS;
+	struct ate_racfghdr *pRaCfg;
+	UINT32 ATEMagicNum;
+
+	os_alloc_mem_suspend(pAd, (UCHAR **)&pRaCfg, sizeof(struct ate_racfghdr));
+
+	if (!pRaCfg)
+	{
+		Status = -ENOMEM;
+		goto ERROR0;
+	}
+				
+	NdisZeroMemory(pRaCfg, sizeof(struct ate_racfghdr));
+	Status = copy_from_user((PUCHAR)pRaCfg, wrq->u.data.pointer, wrq->u.data.length);
+	
+	if (Status)
+	{
+		Status = -EFAULT;
+		goto ERROR1;
+	}
+
+	ATEMagicNum = OS_NTOHL(pRaCfg->magic_no);
+	
+	switch(ATEMagicNum)
+	{
+		case RACFG_MAGIC_NO:
+			Status = RACfgCMDHandler(pAd, wrq, pRaCfg);
+			break;
+
+		default:
+			Status = NDIS_STATUS_FAILURE;
+			DBGPRINT(RT_DEBUG_ERROR, ("Unknown magic number of RACFG command = %x\n", ATEMagicNum));
+			break;
+	}
+	
+ ERROR1:
+	os_free_mem(NULL, pRaCfg);
+ ERROR0:
+	return Status;
+}
+
+
+VOID ATE_QA_Statistics(
+	IN PRTMP_ADAPTER			pAd,
+	IN PRXWI_STRUC				pRxWI,
+	IN PRT28XX_RXD_STRUC		pRxD,
+	IN PHEADER_802_11			pHeader)
+{
+
+	/* update counter first */
+	if (pHeader != NULL)
+	{
+		if (pHeader->FC.Type == BTYPE_DATA)
+		{
+			if (pRxD->U2M)
+			{
+				pAd->ate.U2M++;
+			}
+			else
+				pAd->ate.OtherData++;
+		}
+		else if (pHeader->FC.Type == BTYPE_MGMT)
+		{
+			if (pHeader->FC.SubType == SUBTYPE_BEACON)
+				pAd->ate.Beacon++;
+			else
+				pAd->ate.OtherCount++;
+		}
+		else if (pHeader->FC.Type == BTYPE_CNTL)
+		{
+			pAd->ate.OtherCount++;
+		}
+	}
+	pAd->ate.RSSI0 = pRxWI->RSSI0; 
+	pAd->ate.RSSI1 = pRxWI->RSSI1; 
+	pAd->ate.RSSI2 = pRxWI->RSSI2; 
+	pAd->ate.SNR0 = pRxWI->SNR0;
+	pAd->ate.SNR1 = pRxWI->SNR1;
+}
+
+
+INT Set_TxStop_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	DBGPRINT(RT_DEBUG_TRACE,("Set_TxStop_Proc\n"));
+
+	if (Set_ATE_Proc(pAd, "TXSTOP"))
+	{
+		return TRUE;
+	}
+	else
+	{
+		return FALSE;
+	}
+}
+
+
+INT Set_RxStop_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	DBGPRINT(RT_DEBUG_TRACE,("Set_RxStop_Proc\n"));
+
+	if (Set_ATE_Proc(pAd, "RXSTOP"))
+	{
+		return TRUE;
+	}
+	else
+	{
+		return FALSE;
+	}
+}
+
+
+#ifdef DBG
+INT Set_EERead_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	USHORT buffer[EEPROM_SIZE >> 1];
+	USHORT *p;
+	INT i;
+	
+	rt_ee_read_all(pAd, (USHORT *)buffer);
+	p = buffer;
+
+	for (i = 0; i < (EEPROM_SIZE >> 1); i++)
+	{
+		DBGPRINT(RT_DEBUG_OFF, ("%4.4x ", *p));
+		if (((i+1) % 16) == 0)
+			DBGPRINT(RT_DEBUG_OFF, ("\n"));
+		p++;
+	}
+
+	return TRUE;
+}
+
+
+INT Set_EEWrite_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	USHORT offset = 0, value;
+	PSTRING p2 = arg;
+	
+	while ((*p2 != ':') && (*p2 != '\0'))
+	{
+		p2++;
+	}
+	
+	if (*p2 == ':')
+	{
+		A2Hex(offset, arg);
+		A2Hex(value, p2 + 1);
+	}
+	else
+	{
+		A2Hex(value, arg);
+	}
+	
+	if (offset >= EEPROM_SIZE)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("Offset can not exceed EEPROM_SIZE( == 0x%04x)\n", EEPROM_SIZE));	
+		return FALSE;
+	}
+	
+	RT28xx_EEPROM_WRITE16(pAd, offset, value);
+
+	return TRUE;
+}
+
+
+INT Set_BBPRead_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	UCHAR value = 0, offset;
+
+	A2Hex(offset, arg);	
+			
+	if (ATE_ON(pAd))
+	{
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, offset,  &value);
+	}
+	else
+	{
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, offset,  &value);
+	}
+
+	DBGPRINT(RT_DEBUG_OFF, ("%x\n", value));
+		
+	return TRUE;
+}
+
+
+INT Set_BBPWrite_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	USHORT offset = 0;
+	PSTRING p2 = arg;
+	UCHAR value;
+	
+	while ((*p2 != ':') && (*p2 != '\0'))
+	{
+		p2++;
+	}
+	
+	if (*p2 == ':')
+	{
+		A2Hex(offset, arg);	
+		A2Hex(value, p2 + 1);	
+	}
+	else
+	{
+		A2Hex(value, arg);	
+	}
+
+	if (ATE_ON(pAd))
+	{
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, offset,  value);
+	}
+	else
+	{
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, offset,  value);
+	}
+
+	return TRUE;
+}
+
+
+INT Set_RFWrite_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	PSTRING p2, p3, p4;
+	UINT32 R1, R2, R3, R4;
+	
+	p2 = arg;
+
+	while ((*p2 != ':') && (*p2 != '\0'))
+	{
+		p2++;
+	}
+	
+	if (*p2 != ':')
+		return FALSE;
+	
+	p3 = p2 + 1;
+
+	while((*p3 != ':') && (*p3 != '\0'))
+	{
+		p3++;
+	}
+
+	if (*p3 != ':')
+		return FALSE;
+	
+	p4 = p3 + 1;
+
+	while ((*p4 != ':') && (*p4 != '\0'))
+	{
+		p4++;
+	}
+
+	if (*p4 != ':')
+		return FALSE;
+
+		
+	A2Hex(R1, arg);	
+	A2Hex(R2, p2 + 1);	
+	A2Hex(R3, p3 + 1);	
+	A2Hex(R4, p4 + 1);	
+	
+	RTMP_RF_IO_WRITE32(pAd, R1);
+	RTMP_RF_IO_WRITE32(pAd, R2);
+	RTMP_RF_IO_WRITE32(pAd, R3);
+	RTMP_RF_IO_WRITE32(pAd, R4);
+	
+	return TRUE;
+}
+#endif /* DBG */
+#endif /* RALINK_QA */
+
+
+static int CheckMCSValid(
+	IN PRTMP_ADAPTER	pAd, 
+	IN UCHAR Mode,
+	IN UCHAR Mcs)
+{
+	int i;
+	PCHAR pRateTab = NULL;
+
+	switch (Mode)
+	{
+		case MODE_CCK:
+			pRateTab = CCKRateTable;
+			break;
+		case MODE_OFDM:
+			pRateTab = OFDMRateTable;
+			break;
+			
+		case 2: /*MODE_HTMIX*/
+		case 3: /*MODE_HTGREENFIELD*/
+#ifdef DOT11N_SS3_SUPPORT
+			if (IS_RT2883(pAd) || IS_RT3883(pAd) || IS_RT3593(pAd))
+				pRateTab = HTMIXRateTable3T3R;
+			else
+#endif /* DOT11N_SS3_SUPPORT */
+				pRateTab = HTMIXRateTable;
+			break;
+			
+		default: 
+			DBGPRINT(RT_DEBUG_ERROR, ("unrecognizable Tx Mode %d\n", Mode));
+			return -1;
+			break;
+	}
+
+	i = 0;
+	while (pRateTab[i] != -1)
+	{
+		if (pRateTab[i] == Mcs)
+			return 0;
+		i++;
+	}
+
+	return -1;
+}
+
+
+
+
+#ifdef RTMP_MAC_USB
+/*======================Start of RTMP_MAC_USB ======================*/
+static VOID ATEWriteTxWI(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PTXWI_STRUC 	pTxWI,
+	IN	BOOLEAN			FRAG,	
+	IN	BOOLEAN			InsTimestamp,
+	IN	BOOLEAN 		AMPDU,
+	IN	BOOLEAN 		Ack,
+	IN	BOOLEAN 		NSeq,		/* HW new a sequence. */
+	IN	UCHAR			BASize,
+	IN	UCHAR			WCID,
+	IN	ULONG			Length,
+	IN	UCHAR 			PID,
+	IN	UCHAR			MIMOps,
+	IN	UCHAR			Txopmode,	
+	IN	BOOLEAN			CfAck,	
+	IN	HTTRANSMIT_SETTING	Transmit)
+{
+	/*
+		Always use Long preamble before verifiation short preamble functionality works well.
+		Todo: remove the following line if short preamble functionality works
+	*/
+	OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED);
+	pTxWI->FRAG= FRAG;
+	pTxWI->TS= InsTimestamp;
+	pTxWI->AMPDU = AMPDU;
+
+	pTxWI->MIMOps = PWR_ACTIVE;
+	pTxWI->MpduDensity = 4;
+	pTxWI->ACK = Ack;
+	pTxWI->txop = Txopmode;
+	pTxWI->NSEQ = NSeq;
+	pTxWI->BAWinSize = BASize;	
+
+	pTxWI->WirelessCliID = WCID;
+	pTxWI->MPDUtotalByteCount = Length; 
+	pTxWI->PacketId = PID; 
+	
+	pTxWI->BW = Transmit.field.BW;
+	pTxWI->ShortGI = Transmit.field.ShortGI;
+	pTxWI->STBC= Transmit.field.STBC;
+	
+	pTxWI->MCS = Transmit.field.MCS;
+	pTxWI->PHYMODE= Transmit.field.MODE;
+	pTxWI->CFACK = CfAck;
+
+	return;
+}
+
+
+/*
+========================================================================
+	Routine	Description:
+		Write TxInfo for ATE mode.
+		
+	Return Value:
+		None
+========================================================================
+*/
+static VOID ATEWriteTxInfo(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PTXINFO_STRUC 	pTxInfo,
+	IN	USHORT		USBDMApktLen,
+	IN	BOOLEAN		bWiv,
+	IN	UCHAR			QueueSel,
+	IN	UCHAR			NextValid,
+	IN	UCHAR			TxBurst)
+{
+	pTxInfo->USBDMATxPktLen = USBDMApktLen;
+	pTxInfo->QSEL = QueueSel;
+
+	if (QueueSel != FIFO_EDCA)
+		DBGPRINT(RT_DEBUG_TRACE, ("=======> QueueSel != FIFO_EDCA<=======\n"));
+
+	pTxInfo->USBDMANextVLD = NextValid;
+	pTxInfo->USBDMATxburst = TxBurst;
+	pTxInfo->WIV = bWiv;
+#ifndef USB_BULK_BUF_ALIGMENT
+	pTxInfo->SwUseLastRound = 0;
+#else
+	pTxInfo->bFragLasAlignmentsectiontRound = 0;
+#endif /* USB_BULK_BUF_ALIGMENT */
+	pTxInfo->rsv = 0;
+	pTxInfo->rsv2 = 0;
+
+	return;
+}
+
+
+extern UCHAR EpToQueue[];
+static INT ATESetUpFrame(
+	IN PRTMP_ADAPTER pAd,
+	IN UINT32 TxIdx)
+{
+	UINT j;
+	PTX_CONTEXT	pNullContext;
+	PUCHAR			pDest;
+	HTTRANSMIT_SETTING	TxHTPhyMode;
+	PTXWI_STRUC		pTxWI;
+	PTXINFO_STRUC		pTxInfo;	
+	UINT32			TransferBufferLength, OrgBufferLength = 0;
+	UCHAR			padLen = 0;
+#ifdef RALINK_QA
+	PHEADER_802_11	pHeader80211 = NULL;
+#endif /* RALINK_QA */
+	
+	if ((RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS)) ||
+		(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BULKOUT_RESET)) ||
+		(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS)) ||
+		(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)))
+	{
+		return -1;
+	}
+
+	/* We always use QID_AC_BE and FIFO_EDCA in ATE mode. */
+
+	pNullContext = &(pAd->NullContext);
+	ASSERT(pNullContext != NULL);
+	
+	if (pNullContext->InUse == FALSE)
+	{
+		/* set the in use bit */
+		pNullContext->InUse = TRUE;
+		NdisZeroMemory(&(pAd->NullFrame), sizeof(HEADER_802_11));
+		
+		/* fill 802.11 header */
+#ifdef RALINK_QA
+		if (pAd->ate.bQATxStart == TRUE) 
+		{
+			pHeader80211 = NdisMoveMemory(&(pAd->NullFrame), pAd->ate.Header, pAd->ate.HLen);
+		}
+		else
+#endif /* RALINK_QA */
+		{
+			/* fill 802.11 header */
+			NdisMoveMemory(&(pAd->NullFrame), TemplateFrame, sizeof(HEADER_802_11));
+		}
+
+#ifdef RT_BIG_ENDIAN
+		RTMPFrameEndianChange(pAd, (PUCHAR)&(pAd->NullFrame), DIR_READ, FALSE);
+#endif /* RT_BIG_ENDIAN */
+
+#ifdef RALINK_QA
+		if (pAd->ate.bQATxStart == TRUE) 
+		{
+			/* modify sequence number... */
+			if (pAd->ate.TxDoneCount == 0)
+			{
+				pAd->ate.seq = pHeader80211->Sequence;
+			}
+			else
+			{
+				pHeader80211->Sequence = ++pAd->ate.seq;
+			}
+			/* We already got all the address fields from QA GUI. */
+		}
+		else
+#endif /* RALINK_QA */
+		{
+			COPY_MAC_ADDR(pAd->NullFrame.Addr1, pAd->ate.Addr1);
+			COPY_MAC_ADDR(pAd->NullFrame.Addr2, pAd->ate.Addr2);
+			COPY_MAC_ADDR(pAd->NullFrame.Addr3, pAd->ate.Addr3);
+		}
+
+		RTMPZeroMemory(&pAd->NullContext.TransferBuffer->field.WirelessPacket[0], TX_BUFFER_NORMSIZE);
+		pTxInfo = (PTXINFO_STRUC)&pAd->NullContext.TransferBuffer->field.WirelessPacket[0];
+
+#ifdef RALINK_QA
+		if (pAd->ate.bQATxStart == TRUE) 
+		{
+			/* Avoid to exceed the range of WirelessPacket[]. */
+			ASSERT(pAd->ate.TxInfo.USBDMATxPktLen <= (MAX_FRAME_SIZE - 34/* == 2312 */));
+			NdisMoveMemory(pTxInfo, &(pAd->ate.TxInfo), sizeof(pAd->ate.TxInfo));
+		}
+		else
+#endif /* RALINK_QA */
+		{
+			/* Avoid to exceed the range of WirelessPacket[]. */
+			ASSERT(pAd->ate.TxLength <= (MAX_FRAME_SIZE - 34/* == 2312 */));
+
+			/* pTxInfo->USBDMATxPktLen will be updated to include padding later */
+			ATEWriteTxInfo(pAd, pTxInfo, (USHORT)(TXWI_SIZE + pAd->ate.TxLength)
+			, TRUE, EpToQueue[MGMTPIPEIDX], FALSE,  FALSE);
+			pTxInfo->QSEL = FIFO_EDCA;
+		}
+
+		pTxWI = (PTXWI_STRUC)&pAd->NullContext.TransferBuffer->field.WirelessPacket[TXINFO_SIZE];
+
+		/* fill TxWI */
+		if (pAd->ate.bQATxStart == TRUE) 
+		{
+			TxHTPhyMode.field.BW = pAd->ate.TxWI.BW;
+			TxHTPhyMode.field.ShortGI = pAd->ate.TxWI.ShortGI;
+			TxHTPhyMode.field.STBC = pAd->ate.TxWI.STBC;
+			TxHTPhyMode.field.MCS = pAd->ate.TxWI.MCS;
+			TxHTPhyMode.field.MODE = pAd->ate.TxWI.PHYMODE;
+			ATEWriteTxWI(pAd, pTxWI, pAd->ate.TxWI.FRAG, pAd->ate.TxWI.TS,
+				pAd->ate.TxWI.AMPDU, pAd->ate.TxWI.ACK, pAd->ate.TxWI.NSEQ, 
+				pAd->ate.TxWI.BAWinSize, BSSID_WCID,
+				pAd->ate.TxWI.MPDUtotalByteCount/* include 802.11 header */,
+				pAd->ate.TxWI.PacketId,
+				0, pAd->ate.TxWI.txop/*IFS_HTTXOP*/, pAd->ate.TxWI.CFACK
+				/*FALSE*/, TxHTPhyMode);
+		}
+		else
+		{
+			TxHTPhyMode.field.BW = pAd->ate.TxWI.BW;
+			TxHTPhyMode.field.ShortGI = pAd->ate.TxWI.ShortGI;
+			TxHTPhyMode.field.STBC = 0;
+			TxHTPhyMode.field.MCS = pAd->ate.TxWI.MCS;
+			TxHTPhyMode.field.MODE = pAd->ate.TxWI.PHYMODE;
+
+			ATEWriteTxWI(pAd, pTxWI,  FALSE, FALSE, FALSE, FALSE
+				/* No ack required. */, FALSE, 0, BSSID_WCID, pAd->ate.TxLength,
+				0, 0, IFS_HTTXOP, FALSE, TxHTPhyMode);/* "MMPS_STATIC" instead of "MMPS_DYNAMIC" ??? */
+		}
+
+		RTMPMoveMemory(&pAd->NullContext.TransferBuffer->field.WirelessPacket[TXINFO_SIZE+TXWI_SIZE],
+			&pAd->NullFrame, sizeof(HEADER_802_11));
+
+		pDest = &(pAd->NullContext.TransferBuffer->field.WirelessPacket[TXINFO_SIZE+TXWI_SIZE+sizeof(HEADER_802_11)]);
+
+		/* prepare frame payload */
+#ifdef RALINK_QA
+		if (pAd->ate.bQATxStart == TRUE) 
+		{
+			/* copy the pattern one by one to the frame payload */
+			if ((pAd->ate.PLen != 0) && (pAd->ate.DLen != 0))
+			{
+				for (j = 0; j < pAd->ate.DLen; j+=pAd->ate.PLen)
+				{
+					RTMPMoveMemory(pDest, pAd->ate.Pattern, pAd->ate.PLen);
+					pDest += pAd->ate.PLen;
+				}
+			}
+			TransferBufferLength = TXINFO_SIZE + TXWI_SIZE + pAd->ate.TxWI.MPDUtotalByteCount;
+		}
+		else
+#endif /* RALINK_QA */
+		{
+		    for (j = 0; j < (pAd->ate.TxLength - sizeof(HEADER_802_11)); j++)
+		    {
+				/* default payload is 0xA5 */
+				*pDest = pAd->ate.Payload;
+				pDest += 1;
+		    }
+			TransferBufferLength = TXINFO_SIZE + TXWI_SIZE + pAd->ate.TxLength;
+		}
+
+		OrgBufferLength = TransferBufferLength;
+		TransferBufferLength = (TransferBufferLength + 3) & (~3);
+
+		/* Always add 4 extra bytes at every packet. */
+		padLen = TransferBufferLength - OrgBufferLength + 4;/* 4 == last packet padding */
+
+		/* 
+			RTMP_PKT_TAIL_PADDING == 11.
+			[11 == 3(max 4 byte padding) + 4(last packet padding) + 4(MaxBulkOutsize align padding)]		
+		*/
+		ASSERT((padLen <= (RTMP_PKT_TAIL_PADDING - 4/* 4 == MaxBulkOutsize alignment padding */)));
+
+		/* Now memzero all extra padding bytes. */
+		NdisZeroMemory(pDest, padLen);
+		pDest += padLen;
+
+		/* Update pTxInfo->USBDMATxPktLen to include padding. */
+		pTxInfo->USBDMATxPktLen = TransferBufferLength - TXINFO_SIZE;
+
+		TransferBufferLength += 4;
+
+		/* If TransferBufferLength is multiple of 64, add extra 4 bytes again. */
+		if ((TransferBufferLength % pAd->BulkOutMaxPacketSize) == 0)
+		{
+			NdisZeroMemory(pDest, 4);
+			TransferBufferLength += 4;
+		}
+
+		/* Fill out frame length information for global Bulk out arbitor. */
+		pAd->NullContext.BulkOutSize = TransferBufferLength;
+	}
+
+#ifdef RT_BIG_ENDIAN
+	RTMPWIEndianChange((PUCHAR)pTxWI, TYPE_TXWI);
+	RTMPFrameEndianChange(pAd, (((PUCHAR)pTxInfo)+TXWI_SIZE+TXINFO_SIZE), DIR_WRITE, FALSE);
+	RTMPDescriptorEndianChange((PUCHAR)pTxInfo, TYPE_TXINFO);
+#endif /* RT_BIG_ENDIAN */
+
+	return 0;
+}
+
+
+/*
+========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+
+	Note:
+	
+========================================================================
+*/
+VOID ATE_RTUSBBulkOutDataPacket(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			BulkOutPipeId)
+{
+	PTX_CONTEXT		pNullContext = &(pAd->NullContext);
+	PURB			pUrb;
+	INT			ret = 0;
+	ULONG			IrqFlags;
+
+
+	ASSERT(BulkOutPipeId == 0);
+
+	/* Build up the frame first. */
+	BULK_OUT_LOCK(&pAd->BulkOutLock[BulkOutPipeId], IrqFlags);
+
+	if (pAd->BulkOutPending[BulkOutPipeId] == TRUE)
+	{
+		BULK_OUT_UNLOCK(&pAd->BulkOutLock[BulkOutPipeId], IrqFlags);
+		return;
+	}
+
+	pAd->BulkOutPending[BulkOutPipeId] = TRUE;
+	BULK_OUT_UNLOCK(&pAd->BulkOutLock[BulkOutPipeId], IrqFlags);
+
+	/* Increase Total transmit byte counter. */
+	pAd->RalinkCounters.OneSecTransmittedByteCount +=  pNullContext->BulkOutSize; 
+	pAd->RalinkCounters.TransmittedByteCount +=  pNullContext->BulkOutSize;
+
+	/* Clear ATE frame bulk out flag. */
+	RTUSB_CLEAR_BULK_FLAG(pAd, fRTUSB_BULK_OUT_DATA_ATE);
+
+	/* Init Tx context descriptor. */
+	pNullContext->IRPPending = TRUE;
+	RTUSBInitTxDesc(pAd, pNullContext, BulkOutPipeId, (usb_complete_t)RTUSBBulkOutDataPacketComplete);
+	pUrb = pNullContext->pUrb;
+
+	if ((ret = RTUSB_SUBMIT_URB(pUrb))!=0)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("ATE_RTUSBBulkOutDataPacket: Submit Tx URB failed %d\n", ret));
+		return;
+	}
+
+	pAd->BulkOutReq++;
+
+	return;
+}
+
+
+/*
+========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+
+	Note:
+	
+========================================================================
+*/
+VOID ATE_RTUSBCancelPendingBulkInIRP(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	PRX_CONTEXT		pRxContext = NULL;
+	UINT			rx_ring_index;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("--->ATE_RTUSBCancelPendingBulkInIRP\n"));
+
+	for (rx_ring_index = 0; rx_ring_index < (RX_RING_SIZE); rx_ring_index++)
+	{
+		pRxContext = &(pAd->RxContext[rx_ring_index]);
+
+		if (pRxContext->IRPPending == TRUE)
+		{
+			RTUSB_UNLINK_URB(pRxContext->pUrb);
+			pRxContext->IRPPending = FALSE;
+			pRxContext->InUse = FALSE;
+		}
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<---ATE_RTUSBCancelPendingBulkInIRP\n"));
+
+	return;
+}
+
+
+
+
+/*
+========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+
+	Note:
+	
+========================================================================
+*/
+VOID ATEResetBulkIn(
+	IN PRTMP_ADAPTER	pAd)
+{
+	if ((pAd->PendingRx > 0) && (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)))
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("ATE : BulkIn IRP Pending!!!\n"));
+		ATE_RTUSBCancelPendingBulkInIRP(pAd);
+		RtmpOsMsDelay(100);
+		pAd->PendingRx = 0;
+	}
+
+	return;
+}
+
+
+/*
+========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+
+	Note:
+	
+========================================================================
+*/
+INT ATEResetBulkOut(
+	IN PRTMP_ADAPTER	pAd)
+{
+	PTX_CONTEXT	pNullContext = &(pAd->NullContext);
+	INT ret=0;
+
+	pNullContext->IRPPending = TRUE;
+
+	/*
+		If driver is still in ATE TXFRAME mode, 
+		keep on transmitting ATE frames.
+	*/
+	DBGPRINT(RT_DEBUG_TRACE, ("pAd->ate.Mode == %d\npAd->ContinBulkOut == %d\npAd->BulkOutRemained == %d\n",
+		pAd->ate.Mode, pAd->ContinBulkOut, atomic_read(&pAd->BulkOutRemained)));
+
+	if ((pAd->ate.Mode == ATE_TXFRAME) && ((pAd->ContinBulkOut == TRUE) || (atomic_read(&pAd->BulkOutRemained) > 0)))
+    {
+		DBGPRINT(RT_DEBUG_TRACE, ("After CMDTHREAD_RESET_BULK_OUT, continue to bulk out frames !\n"));
+
+		/* Init Tx context descriptor. */
+		RTUSBInitTxDesc(pAd, pNullContext, 0/* pAd->bulkResetPipeid */, (usb_complete_t)RTUSBBulkOutDataPacketComplete);
+		
+		if ((ret = RTUSB_SUBMIT_URB(pNullContext->pUrb))!=0)
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("ATE_RTUSBBulkOutDataPacket: Submit Tx URB failed %d\n", ret));
+		}
+
+		pAd->BulkOutReq++;
+	}
+
+	return ret;
+}
+#endif /* RTMP_MAC_USB */
+
+
+static INT ATETxPwrHandler(
+	IN PRTMP_ADAPTER pAd,
+	IN char index)
+{
+	ULONG R;
+	CHAR TxPower = 0;
+	UCHAR Bbp94 = 0;
+	BOOLEAN bPowerReduce = FALSE;
+#ifdef RTMP_RF_RW_SUPPORT
+	UCHAR RFValue = 0;
+#endif /* RTMP_RF_RW_SUPPORT */
+#ifdef RT33xx
+	/* 
+		(non-positive number)
+		including the transmit power controlled
+		by the MAC and the BBP R1
+	*/
+	CHAR		TotalDeltaPower = 0; 
+	CONFIGURATION_OF_TX_POWER_CONTROL_OVER_MAC CfgOfTxPwrCtrlOverMAC = {0};
+	INT			i,j;
+	CHAR		Value;
+	ULONG		TxPwr[5];
+	PTX_POWER_TUNING_ENTRY_STRUCT pTxPowerTuningEntry = NULL;
+#endif /* RT33xx */
+
+#ifdef RALINK_QA
+	if ((pAd->ate.bQATxStart == TRUE) || (pAd->ate.bQARxStart == TRUE))
+	{
+		/* 
+			When QA is used for Tx, pAd->ate.TxPower0/1 and real tx power
+			are not synchronized.
+		*/
+		return 0;
+	}
+	else
+#endif /* RALINK_QA */
+
+	if (index == 0)
+	{
+		TxPower = pAd->ate.TxPower0;
+	}
+	else if (index == 1)
+	{
+		TxPower = pAd->ate.TxPower1;
+	}
+#ifdef DOT11N_SS3_SUPPORT
+	else if (index == 2)
+	{
+		if (IS_RT2883(pAd) || IS_RT3883(pAd) )
+			TxPower = pAd->ate.TxPower2;
+		else
+		{ 	
+			DBGPRINT(RT_DEBUG_ERROR, ("Only TxPower0 and TxPower1 are adjustable !\n"));
+			DBGPRINT(RT_DEBUG_ERROR, ("TxPower%d is out of range !\n", index));	
+		}	
+	}
+#endif /* DOT11N_SS3_SUPPORT */
+	else
+	{
+#ifdef DOT11N_SS3_SUPPORT
+		DBGPRINT(RT_DEBUG_ERROR, ("Only TxPower0, TxPower1, and TxPower2 are adjustable !\n"));
+#else
+		DBGPRINT(RT_DEBUG_ERROR, ("Only TxPower0 and TxPower1 are adjustable !\n"));
+#endif /* DOT11N_SS3_SUPPORT */
+		DBGPRINT(RT_DEBUG_ERROR, ("TxPower%d is out of range !\n", index));
+	}
+
+#ifdef RTMP_RF_RW_SUPPORT
+
+		if ((IS_RT30xx(pAd)  || IS_RT3390(pAd)))
+		{
+#ifdef RT33xx		
+			if (IS_RT3390(pAd))
+			{
+				pAd->TxPowerCtrl.idxTxPowerTable = TxPower;
+
+				/* Valid pAd->TxPowerCtrl.idxTxPowerTable: -30 ~ 45 */
+				pTxPowerTuningEntry = &TxPowerTuningTable[pAd->TxPowerCtrl.idxTxPowerTable + TX_POWER_TUNING_ENTRY_OFFSET]; /* zero-based array */
+				pAd->TxPowerCtrl.RF_R12_Value = pTxPowerTuningEntry->RF_R12_Value;
+				pAd->TxPowerCtrl.MAC_PowerDelta = pTxPowerTuningEntry->MAC_PowerDelta;
+
+				/* Tx power adjustment over RF */
+				RT30xxReadRFRegister(pAd, RF_R12, (PUCHAR)(&RFValue));
+				RFValue = ((RFValue & 0xE0) | pAd->TxPowerCtrl.RF_R12_Value);
+				RT30xxWriteRFRegister(pAd, RF_R12, (UCHAR)(RFValue));
+
+				/* Tx power adjustment over MAC */
+				TotalDeltaPower += pAd->TxPowerCtrl.MAC_PowerDelta;
+				
+				if (pAd->ate.TxWI.BW == BW_40)
+				{		
+					TxPwr[0] = pAd->Tx40MPwrCfgGBand[0];
+					TxPwr[1] = pAd->Tx40MPwrCfgGBand[1];
+					TxPwr[2] = pAd->Tx40MPwrCfgGBand[2];
+					TxPwr[3] = pAd->Tx40MPwrCfgGBand[3];
+					TxPwr[4] = pAd->Tx40MPwrCfgGBand[4];
+				}
+				else
+				{		
+					TxPwr[0] = pAd->Tx20MPwrCfgGBand[0];
+					TxPwr[1] = pAd->Tx20MPwrCfgGBand[1];
+					TxPwr[2] = pAd->Tx20MPwrCfgGBand[2];
+					TxPwr[3] = pAd->Tx20MPwrCfgGBand[3];
+					TxPwr[4] = pAd->Tx20MPwrCfgGBand[4];		
+				}
+
+				for (i=0; i<5; i++)
+				{
+					if (TxPwr[i] != 0xffffffff)
+					{
+						for (j=0; j<8; j++)
+						{
+							Value = (CHAR)((TxPwr[i] >> j*4) & 0x0F);							
+
+							/*
+								The upper bounds of the MAC 0x1314~0x1324 are variable
+								when the STA uses the internal Tx ALC.
+							*/
+							switch (TX_PWR_CFG_0 + (i * 4))
+							{
+								case TX_PWR_CFG_0: 
+								{
+									if ((Value + TotalDeltaPower) < 0)
+									{
+										Value = 0;
+									}
+									else if ((Value + TotalDeltaPower) > 0xE)
+									{
+										Value = 0xE;
+									}
+									else
+									{
+										Value += TotalDeltaPower;
+									}
+								}
+								break;
+
+								case TX_PWR_CFG_1: 
+								{
+									if ((j >= 0) && (j <= 3))
+									{
+										if ((Value + TotalDeltaPower) < 0)
+										{
+											Value = 0;
+										}
+										else if ((Value + TotalDeltaPower) > 0xC)
+										{
+											Value = 0xC;
+										}
+										else
+										{
+											Value += TotalDeltaPower;
+										}
+									}
+									else
+									{
+										if ((Value + TotalDeltaPower) < 0)
+										{
+											Value = 0;
+										}
+										else if ((Value + TotalDeltaPower) > 0xE)
+										{
+											Value = 0xE;
+										}
+										else
+										{
+											Value += TotalDeltaPower;
+										}
+									}
+								}
+								break;
+
+								case TX_PWR_CFG_2: 
+								{
+									if ((j == 0) || (j == 2) || (j == 3))
+									{
+										if ((Value + TotalDeltaPower) < 0)
+										{
+											Value = 0;
+										}
+										else if ((Value + TotalDeltaPower) > 0xC)
+										{
+											Value = 0xC;
+										}
+										else
+										{
+											Value += TotalDeltaPower;
+										}
+									}
+									else
+									{
+										if ((Value + TotalDeltaPower) < 0)
+										{
+											Value = 0;
+										}
+										else if ((Value + TotalDeltaPower) > 0xE)
+										{
+											Value = 0xE;
+										}
+										else
+										{
+											Value += TotalDeltaPower;
+										}
+									}
+								}
+								break;
+
+								case TX_PWR_CFG_3: 
+								{
+									if ((j == 0) || (j == 2) || (j == 3) || 
+									    ((j >= 4) && (j <= 7)))
+									{
+										if ((Value + TotalDeltaPower) < 0)
+										{
+											Value = 0;
+										}
+										else if ((Value + TotalDeltaPower) > 0xC)
+										{
+											Value = 0xC;
+										}
+										else
+										{
+											Value += TotalDeltaPower;
+										}
+									}
+									else
+									{
+										if ((Value + TotalDeltaPower) < 0)
+										{
+											Value = 0;
+										}
+										else if ((Value + TotalDeltaPower) > 0xE)
+										{
+											Value = 0xE;
+										}
+										else
+										{
+											Value += TotalDeltaPower;
+										}
+									}
+								}
+								break;
+
+								case TX_PWR_CFG_4: 
+								{
+									if ((Value + TotalDeltaPower) < 0)
+									{
+										Value = 0;
+									}
+									else if ((Value + TotalDeltaPower) > 0xC)
+									{
+										Value = 0xC;
+									}
+									else
+									{
+										Value += TotalDeltaPower;
+									}
+								}
+								break;
+
+								default: 
+								{							
+									/* do nothing */
+									DBGPRINT(RT_DEBUG_ERROR, ("%s: unknown register = 0x%X\n", 
+										__FUNCTION__, 
+										(TX_PWR_CFG_0 + (i * 4))));
+								}
+								break;
+							}
+							TxPwr[i] = (TxPwr[i] & ~(0x0000000F << j*4)) | (Value << j*4);							
+						}
+					}
+					RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, TxPwr[i]);
+				}
+			}
+			else /* RT30xx */
+#endif /* RT33xx */			
+			{
+				/* Set Tx Power */
+				UCHAR ANT_POWER_INDEX=RF_R12+index;
+				ATE_RF_IO_READ8_BY_REG_ID(pAd, ANT_POWER_INDEX, (PUCHAR)&RFValue);
+				RFValue = (RFValue & 0xE0) | TxPower;
+				ATE_RF_IO_WRITE8_BY_REG_ID(pAd, ANT_POWER_INDEX, (UCHAR)RFValue);
+				DBGPRINT(RT_DEBUG_TRACE, ("3070 or 2070:%s (TxPower[%d]=%d, RFValue=%x)\n", __FUNCTION__, index,TxPower, RFValue));
+			}
+		}
+		else
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+		if (IS_RT5390(pAd))
+		{
+				UCHAR ANT_POWER_INDEX=RF_R49+index;
+				ATE_RF_IO_READ8_BY_REG_ID(pAd, ANT_POWER_INDEX, (PUCHAR)&RFValue);
+				RFValue = ((RFValue & ~0x3F) | (TxPower & 0x3F)); /* tx0_alc */
+				ATE_RF_IO_WRITE8_BY_REG_ID(pAd, ANT_POWER_INDEX, (UCHAR)RFValue);
+				if (!IS_RT5392(pAd))	
+					ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R53, 0x04);
+		}
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+#endif /* RTMP_RF_RW_SUPPORT */
+	{
+		if (pAd->ate.Channel <= 14)
+		{
+			if (TxPower > 31)
+			{
+				/* R3, R4 can't large than 31 (0x24), 31 ~ 36 used by BBP 94 */
+				R = 31;
+				if (TxPower <= 36)
+					Bbp94 = BBPR94_DEFAULT + (UCHAR)(TxPower - 31);		
+			}
+			else if (TxPower < 0)
+			{
+				/* R3, R4 can't less than 0, -1 ~ -6 used by BBP 94 */
+				R = 0;
+				if (TxPower >= -6)
+					Bbp94 = BBPR94_DEFAULT + TxPower;
+			}
+			else
+			{  
+				/* 0 ~ 31 */
+				R = (ULONG) TxPower;
+				Bbp94 = BBPR94_DEFAULT;
+			}
+
+			DBGPRINT(RT_DEBUG_TRACE, ("%s (TxPower=%d, R=%ld, BBP_R94=%d)\n", __FUNCTION__, TxPower, R, Bbp94));
+		}
+		else /* 5.5 GHz */
+		{
+			if (TxPower > 15)
+			{
+				/* R3, R4 can't large than 15 (0x0F) */
+				R = 15;
+			}
+			else if (TxPower < 0)
+			{
+				/* R3, R4 can't less than 0 */
+				/* -1 ~ -7 */
+				ASSERT((TxPower >= -7));
+				R = (ULONG)(TxPower + 7);
+				bPowerReduce = TRUE;
+			}
+			else
+			{  
+				/* 0 ~ 15 */
+				R = (ULONG) TxPower;
+			}
+
+			DBGPRINT(RT_DEBUG_TRACE, ("%s (TxPower=%d, R=%lu)\n", __FUNCTION__, TxPower, R));
+		}
+
+		if (pAd->ate.Channel <= 14)
+		{
+			if (index == 0)
+			{
+				/* shift TX power control to correct RF(R3) register bit position */
+				R = R << 9;		
+				R |= (pAd->LatchRfRegs.R3 & 0xffffc1ff);
+				pAd->LatchRfRegs.R3 = R;
+			}
+			else
+			{
+				/* shift TX power control to correct RF(R4) register bit position */
+				R = R << 6;		
+				R |= (pAd->LatchRfRegs.R4 & 0xfffff83f);
+				pAd->LatchRfRegs.R4 = R;
+			}
+		}
+		else /* 5.5GHz */
+		{
+			if (bPowerReduce == FALSE)
+			{
+				if (index == 0)
+				{
+					/* shift TX power control to correct RF(R3) register bit position */
+					R = (R << 10) | (1 << 9);		
+					R |= (pAd->LatchRfRegs.R3 & 0xffffc1ff);
+					pAd->LatchRfRegs.R3 = R;
+				}
+				else
+				{
+					/* shift TX power control to correct RF(R4) register bit position */
+					R = (R << 7) | (1 << 6);		
+					R |= (pAd->LatchRfRegs.R4 & 0xfffff83f);
+					pAd->LatchRfRegs.R4 = R;
+				}
+			}
+			else
+			{
+				if (index == 0)
+				{
+					/* shift TX power control to correct RF(R3) register bit position */
+					R = (R << 10);		
+					R |= (pAd->LatchRfRegs.R3 & 0xffffc1ff);
+
+					/* Clear bit 9 of R3 to reduce 7dB. */ 
+					pAd->LatchRfRegs.R3 = (R & (~(1 << 9)));
+				}
+				else
+				{
+					/* shift TX power control to correct RF(R4) register bit position */
+					R = (R << 7);		
+					R |= (pAd->LatchRfRegs.R4 & 0xfffff83f);
+
+					/* Clear bit 6 of R4 to reduce 7dB. */ 
+					pAd->LatchRfRegs.R4 = (R & (~(1 << 6)));
+				}
+			}
+		}
+		RtmpRfIoWrite(pAd);
+	}
+
+	return 0;
+}
+
+
+/*
+========================================================================
+
+	Routine Description:
+		Set Japan filter coefficients if needed.
+	Note:
+		This routine should only be called when
+		entering TXFRAME mode or TXCONT mode.
+				
+========================================================================
+*/
+static VOID SetJapanFilter(
+	IN		PRTMP_ADAPTER	pAd)
+{
+	UCHAR			BbpData = 0;
+
+	/*
+		If Channel=14 and Bandwidth=20M and Mode=CCK, set BBP R4 bit5=1
+		(Japan Tx filter coefficients)when (TXFRAME or TXCONT).
+	*/
+	ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BbpData);
+
+	if ((pAd->ate.TxWI.PHYMODE == MODE_CCK) && (pAd->ate.Channel == 14) && (pAd->ate.TxWI.BW == BW_20))
+	{
+		BbpData |= 0x20;    /* turn on */
+		DBGPRINT(RT_DEBUG_TRACE, ("SetJapanFilter!!!\n"));
+	}
+	else
+	{
+		BbpData &= 0xdf;    /* turn off */
+		DBGPRINT(RT_DEBUG_TRACE, ("ClearJapanFilter!!!\n"));
+	}
+
+	ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BbpData);
+
+	return;
+}
+
+
+/*
+========================================================================
+
+	Routine Description:
+		Disable protection for ATE.
+========================================================================
+*/
+VOID ATEDisableAsicProtect(
+	IN		PRTMP_ADAPTER	pAd)
+{
+	PROT_CFG_STRUC	ProtCfg, ProtCfg4;
+	UINT32 Protect[6];
+	USHORT			offset;
+	UCHAR			i;
+	UINT32 MacReg = 0;
+
+	/* Config ASIC RTS threshold register */
+	RTMP_IO_READ32(pAd, TX_RTS_CFG, &MacReg);
+	MacReg &= 0xFF0000FF;
+	MacReg |= (0xFFF << 8);
+	RTMP_IO_WRITE32(pAd, TX_RTS_CFG, MacReg);
+
+	/* Initial common protection settings */
+	RTMPZeroMemory(Protect, sizeof(Protect));
+	ProtCfg4.word = 0;
+	ProtCfg.word = 0;
+	ProtCfg.field.TxopAllowGF40 = 1;
+	ProtCfg.field.TxopAllowGF20 = 1;
+	ProtCfg.field.TxopAllowMM40 = 1;
+	ProtCfg.field.TxopAllowMM20 = 1;
+	ProtCfg.field.TxopAllowOfdm = 1;
+	ProtCfg.field.TxopAllowCck = 1;
+	ProtCfg.field.RTSThEn = 1;
+	ProtCfg.field.ProtectNav = ASIC_SHORTNAV;
+
+	/* Handle legacy(B/G) protection */
+	ProtCfg.field.ProtectRate = pAd->CommonCfg.RtsRate;
+	ProtCfg.field.ProtectCtrl = 0;
+	Protect[0] = ProtCfg.word;
+	Protect[1] = ProtCfg.word;
+	/* CTS-self is not used */
+	pAd->FlgCtsEnabled = 0; 
+
+	/*
+		NO PROTECT 
+			1.All STAs in the BSS are 20/40 MHz HT
+			2. in a 20/40MHz BSS
+			3. all STAs are 20MHz in a 20MHz BSS
+		Pure HT. no protection.
+	*/
+	/*
+		MM20_PROT_CFG
+			Reserved (31:27)
+			PROT_TXOP(25:20) -- 010111
+			PROT_NAV(19:18)  -- 01 (Short NAV protection)
+			PROT_CTRL(17:16) -- 00 (None)
+			PROT_RATE(15:0)  -- 0x4004 (OFDM 24M)
+	*/
+	Protect[2] = 0x01744004;	
+
+	/*
+		MM40_PROT_CFG
+			Reserved (31:27)
+			PROT_TXOP(25:20) -- 111111
+			PROT_NAV(19:18)  -- 01 (Short NAV protection)
+			PROT_CTRL(17:16) -- 00 (None) 
+			PROT_RATE(15:0)  -- 0x4084 (duplicate OFDM 24M)
+	*/
+	Protect[3] = 0x03f44084;
+
+	/*
+		CF20_PROT_CFG
+			Reserved (31:27)
+			PROT_TXOP(25:20) -- 010111
+			PROT_NAV(19:18)  -- 01 (Short NAV protection)
+			PROT_CTRL(17:16) -- 00 (None)
+			PROT_RATE(15:0)  -- 0x4004 (OFDM 24M)
+	*/
+	Protect[4] = 0x01744004;
+
+	/*
+		CF40_PROT_CFG
+			Reserved (31:27)
+			PROT_TXOP(25:20) -- 111111
+			PROT_NAV(19:18)  -- 01 (Short NAV protection)
+			PROT_CTRL(17:16) -- 00 (None)
+			PROT_RATE(15:0)  -- 0x4084 (duplicate OFDM 24M)
+	*/
+	Protect[5] = 0x03f44084;
+
+	pAd->CommonCfg.IOTestParm.bRTSLongProtOn = FALSE;
+	
+	offset = CCK_PROT_CFG;
+	for (i = 0;i < 6;i++)
+		RTMP_IO_WRITE32(pAd, offset + i*4, Protect[i]);
+
+	return;
+}
+
+
+
+
+#ifdef CONFIG_STA_SUPPORT
+VOID RTMPStationStop(
+    IN  PRTMP_ADAPTER   pAd)
+{
+    DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPStationStop\n"));
+
+	/* For rx statistics, we need to keep pAd->Mlme.PeriodicTimer running. */
+
+    DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPStationStop\n"));
+}
+
+
+VOID RTMPStationStart(
+    IN  PRTMP_ADAPTER   pAd)
+{
+    DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPStationStart\n"));
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPStationStart\n"));
+}
+#endif /* CONFIG_STA_SUPPORT */
+
+
+static NDIS_STATUS ATESTART(
+	IN PRTMP_ADAPTER pAd)
+{
+	UINT32			MacData=0, atemode=0, temp=0;
+	NDIS_STATUS		Status = NDIS_STATUS_SUCCESS;
+#if defined(RT30xx) || defined(RT305x) || defined(RT3350) || defined(RT3352) || defined(RT2883) || defined (RT5350)
+	UINT32			bbp_index=0;
+	UCHAR			RestoreRfICType=pAd->RfIcType;
+#endif /* defined(RT30xx) || defined(RT305x) || defined(RT3350) || defined(RT3352) || defined(RT2883) || defined (RT5350) */
+	UCHAR			BbpData = 0;
+#ifdef RTMP_MAC_USB
+#ifdef CONFIG_STA_SUPPORT
+	BOOLEAN       Cancelled;
+#endif /* CONFIG_STA_SUPPORT */
+	UCHAR LoopCount=0;
+#endif /* RTMP_MAC_USB */
+
+	DBGPRINT(RT_DEBUG_TRACE, ("ATE : ===> %s\n", __FUNCTION__));
+
+#ifdef RTMP_MAC_USB
+	RTMP_OS_NETDEV_STOP_QUEUE(pAd->net_dev);
+#endif /* RTMP_MAC_USB */
+
+	atemode = pAd->ate.Mode;
+	pAd->ate.Mode = ATE_START;
+
+    if (atemode == ATE_STOP)
+	{
+		/* DUT just enters ATE mode from normal mode. */
+		/* Only at this moment, we need to switch back to the channel of normal mode. */
+		AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
+		/* empty function */
+		AsicLockChannel(pAd, pAd->CommonCfg.Channel);
+    }
+
+#ifdef RTMP_MAC_USB
+
+	/* one second is enough for waiting bulk-in urb */
+	while ((pAd->PendingRx > 0) && LoopCount < 2)	
+	{
+		/* delay 0.5 seconds */
+		OS_WAIT(500);
+		LoopCount++;
+	}
+#endif /* RTMP_MAC_USB */
+
+	/* Disable Rx */
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData &= ~(1 << 3);
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+	
+	/* Disable auto responder */
+	RTMP_IO_READ32(pAd, AUTO_RSP_CFG, &temp);
+	temp = temp & 0xFFFFFFFE;
+	RTMP_IO_WRITE32(pAd, AUTO_RSP_CFG, temp);
+
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData &= ~(1 << 4); 
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+
+	if (atemode == ATE_TXCARR)
+	{
+#if defined(RT30xx) || defined(RT305x) || defined(RT3350) || defined(RT3352) || defined(RT2883) || defined(RT5350)
+		/* RT35xx ATE will reuse this code segment. */
+		/* Hardware Reset BBP */
+		RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &temp);
+		temp = temp | 0x00000002;
+		RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, temp);
+		RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &temp);
+		temp = temp & ~(0x00000002);
+		RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, temp);
+
+		/* Restore All BBP Value */
+		for (bbp_index=0;bbp_index<ATE_BBP_REG_NUM;bbp_index++)
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd,bbp_index,restore_BBP[bbp_index]);
+
+		pAd->RfIcType=RestoreRfICType;
+#endif /* defined(RT30xx) || defined(RT305x) || defined(RT3350) || defined(RT3352) || defined(RT2883) || defined(RT5350) */
+
+#ifdef NEW_TXCARR
+		/* No Carrier Test set BBP R22 bit6=0, bit[5~0]=0x0 */
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
+		BbpData &= 0xFFFFFF80; /* clear bit6, bit[5~0] */	
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
+
+		BbpSoftReset(pAd);
+		RTMP_IO_WRITE32(pAd, RA_TX_PIN_CFG, Default_TX_PIN_CFG);
+#else
+		/* No Carrier Test set BBP R22 bit7=0, bit6=0, bit[5~0]=0x0 */
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
+		BbpData &= 0xFFFFFF00; /* clear bit7, bit6, bit[5~0] */	
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
+#endif /* NEW_TXCARR */
+	}
+	else if (atemode == ATE_TXCARRSUPP)
+	{
+#if defined(RT30xx) || defined(RT305x) || defined(RT3350) || defined(RT3352) || defined(RT2883) || defined(RT5350)
+		/* RT35xx ATE will reuse this code segment. */
+		/* Hardware Reset BBP */
+		RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &temp);
+		temp = temp | 0x00000002;
+		RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, temp);
+		RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &temp);
+		temp = temp & ~(0x00000002);
+		RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, temp);
+
+		/* Restore All BBP Value */
+		for (bbp_index=0;bbp_index<ATE_BBP_REG_NUM;bbp_index++)
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd,bbp_index,restore_BBP[bbp_index]);
+
+		pAd->RfIcType=RestoreRfICType;			
+#endif /* defined(RT30xx) || defined(RT305x) || defined(RT3350) || defined(RT3352) || defined(RT2883) || defined(RT5350) */
+
+		/* No Cont. TX set BBP R22 bit7=0 */
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
+		BbpData &= ~(1 << 7); /* set bit7=0 */
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
+
+		/* No Carrier Suppression set BBP R24 bit0=0 */
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R24, &BbpData);
+		BbpData &= 0xFFFFFFFE; /* clear bit0 */	
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, BbpData);
+
+#ifdef NEW_TXCARRSUPP
+		BbpSoftReset(pAd);
+		RTMP_IO_WRITE32(pAd, RA_TX_PIN_CFG, Default_TX_PIN_CFG);
+#endif /* NEW_TXCARRSUPP */
+	}		
+
+	/*
+		We should free some resource which was allocated
+		when ATE_TXFRAME , ATE_STOP, and ATE_TXCONT.
+	*/
+	else if ((atemode & ATE_TXFRAME) || (atemode == ATE_STOP))
+	{
+		if (atemode == ATE_TXCONT)
+		{
+#if defined(RT2883) || defined(RT3352) || defined(RT5350)
+			/* Hardware Reset BBP */
+			RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &temp);
+			temp = temp | 0x00000002;
+			RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, temp);
+			RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &temp);
+			temp = temp & ~(0x00000002);
+			RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, temp);
+
+			/* Restore All BBP Value */
+			for (bbp_index=0;bbp_index<ATE_BBP_REG_NUM;bbp_index++)
+				ATE_BBP_IO_WRITE8_BY_REG_ID(pAd,bbp_index,restore_BBP[bbp_index]);
+
+			pAd->RfIcType=RestoreRfICType;			
+#endif /* defined(RT2883) || defined(RT3352) || defined(RT5350) */
+
+
+			/* Not Cont. TX anymore, so set BBP R22 bit7=0 */
+			ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
+			BbpData &= ~(1 << 7); /* set bit7=0 */
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
+#ifdef NEW_TXCONT
+			BbpSoftReset(pAd);
+			RTMP_IO_WRITE32(pAd, RA_TX_PIN_CFG, Default_TX_PIN_CFG);
+#endif /* NEW_TXCONT */
+		}
+
+		/* Abort Tx, Rx DMA. */
+		RtmpDmaEnable(pAd, 0);
+
+		/* Start Tx, RX DMA */
+		RtmpDmaEnable(pAd, 1);
+	}
+
+#ifdef RTMP_MAC_USB
+	RTUSBRejectPendingPackets(pAd);
+	RTUSBCleanUpDataBulkOutQueue(pAd);
+
+#ifdef CONFIG_STA_SUPPORT
+	/*
+		It will be called in MlmeSuspend().
+		Cancel pending timers.
+	*/
+	RTMPCancelTimer(&pAd->MlmeAux.AssocTimer,      &Cancelled);
+	RTMPCancelTimer(&pAd->MlmeAux.ReassocTimer,    &Cancelled);
+	RTMPCancelTimer(&pAd->MlmeAux.DisassocTimer,   &Cancelled);
+	RTMPCancelTimer(&pAd->MlmeAux.AuthTimer,       &Cancelled);
+	RTMPCancelTimer(&pAd->MlmeAux.BeaconTimer,     &Cancelled);
+	RTMPCancelTimer(&pAd->MlmeAux.ScanTimer,       &Cancelled);
+#endif /* CONFIG_STA_SUPPORT */
+
+	RTUSBCleanUpMLMEBulkOutQueue(pAd);
+
+
+	/* Disable Rx */
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData &= ~(1 << 3);
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+
+	/* Abort Tx, RX DMA. */
+	RtmpDmaEnable(pAd, 0);
+
+	/* Disable Tx */
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData &= ~(1 << 2);
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+
+	/*
+		Make sure there are no pending bulk in/out IRPs before we go on.
+		pAd->BulkFlags != 0 : wait bulk out finish
+	*/	
+	while ((pAd->PendingRx > 0))	
+	{
+		ATE_RTUSBCancelPendingBulkInIRP(pAd);
+
+		/* delay 0.5 seconds */
+		RtmpOsMsDelay(500);
+		pAd->PendingRx = 0;
+	}
+
+	while (((pAd->BulkOutPending[0] == TRUE) ||
+			(pAd->BulkOutPending[1] == TRUE) || 
+			(pAd->BulkOutPending[2] == TRUE) ||
+			(pAd->BulkOutPending[3] == TRUE)) && (pAd->BulkFlags != 0))
+			/* pAd->BulkFlags != 0 : wait bulk out finish */	
+	{
+		do 
+		{
+			/* 
+				pAd->BulkOutPending[y] will be set to FALSE
+				in RTUSBCancelPendingBulkOutIRP(pAd)
+			*/
+			RTUSBCancelPendingBulkOutIRP(pAd);
+		} while (FALSE);			
+
+	}
+
+	ASSERT(pAd->PendingRx == 0);
+#endif /* RTMP_MAC_USB */
+
+	/* reset Rx statistics. */
+	pAd->ate.LastSNR0 = 0;
+	pAd->ate.LastSNR1 = 0;
+#ifdef DOT11N_SS3_SUPPORT
+	pAd->ate.LastSNR2 = 0;
+#endif /* DOT11N_SS3_SUPPORT */
+	pAd->ate.LastRssi0 = 0;
+	pAd->ate.LastRssi1 = 0;
+	pAd->ate.LastRssi2 = 0;
+	pAd->ate.AvgRssi0 = 0;
+	pAd->ate.AvgRssi1 = 0;
+	pAd->ate.AvgRssi2 = 0;
+	pAd->ate.AvgRssi0X8 = 0;
+	pAd->ate.AvgRssi1X8 = 0;
+	pAd->ate.AvgRssi2X8 = 0;
+	pAd->ate.NumOfAvgRssiSample = 0;
+
+#ifdef RALINK_QA
+	/* Tx frame */
+	pAd->ate.bQATxStart = FALSE;
+	pAd->ate.bQARxStart = FALSE;
+	pAd->ate.seq = 0; 
+
+	/* counters */
+	pAd->ate.U2M = 0;
+	pAd->ate.OtherData = 0;
+	pAd->ate.Beacon = 0;
+	pAd->ate.OtherCount = 0;
+	pAd->ate.TxAc0 = 0;
+	pAd->ate.TxAc1 = 0;
+	pAd->ate.TxAc2 = 0;
+	pAd->ate.TxAc3 = 0;
+	pAd->ate.TxHCCA = 0;
+	pAd->ate.TxMgmt = 0;
+	pAd->ate.RSSI0 = 0;
+	pAd->ate.RSSI1 = 0;
+	pAd->ate.RSSI2 = 0;
+	pAd->ate.SNR0 = 0;
+	pAd->ate.SNR1 = 0;
+#ifdef DOT11N_SS3_SUPPORT
+	pAd->ate.SNR2 = 0;
+#endif /* DOT11N_SS3_SUPPORT */
+	pAd->ate.IPG = 200;
+
+	/* control */
+	pAd->ate.TxDoneCount = 0;
+	/* TxStatus : 0 --> task is idle, 1 --> task is running */
+	pAd->ate.TxStatus = 0;
+#endif /* RALINK_QA */
+
+	/* Soft reset BBP. */
+	BbpSoftReset(pAd);
+
+
+#ifdef CONFIG_STA_SUPPORT 
+	/* LinkDown() has "AsicDisableSync();" and "RTMP_BBP_IO_R/W8_BY_REG_ID();" inside. */
+	AsicDisableSync(pAd);
+	/* 
+		If we skip "LinkDown()", we should disable protection
+		to prevent from sending out RTS or CTS-to-self.
+	*/
+	ATEDisableAsicProtect(pAd);
+	RTMPStationStop(pAd);
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef LED_CONTROL_SUPPORT
+	RTMPExitLEDMode(pAd);	
+#endif /* LED_CONTROL_SUPPORT */
+
+
+#ifdef RTMP_MAC_USB
+	/* Default value in BBP R22 is 0x0. */
+	BbpData = 0;
+   	ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
+
+	/* Clear bit4 to stop continuous Tx production test. */
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData &= ~(1 << 4);
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);		
+
+	/* Clear ATE Bulk in/out counter and continue setup */
+	InterlockedExchange(&pAd->BulkOutRemained, 0);
+
+	/* NdisAcquireSpinLock()/NdisReleaseSpinLock() need only one argument in RT28xx */
+	NdisAcquireSpinLock(&pAd->GenericLock);	
+	pAd->ContinBulkOut = FALSE;		
+	pAd->ContinBulkIn = FALSE;
+	NdisReleaseSpinLock(&pAd->GenericLock);
+
+	RTUSB_CLEAR_BULK_FLAG(pAd, fRTUSB_BULK_OUT_DATA_ATE);
+#endif /* RTMP_MAC_USB */
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("ATE : <=== %s\n", __FUNCTION__));
+	return Status;
+}
+
+
+static NDIS_STATUS ATESTOP(
+	IN PRTMP_ADAPTER pAd)
+{
+	UINT32			MacData=0, ring_index=0;
+	NDIS_STATUS		Status = NDIS_STATUS_SUCCESS;
+#if defined(RT30xx) || defined(RT305x) || defined(RT3350) || defined(RT3352) || defined(RT2883) || defined(RT5350)
+	UINT32			bbp_index=0;
+	UCHAR			RestoreRfICType=pAd->RfIcType;
+#endif /* defined(RT30xx) || defined(RT305x) || defined(RT3350) || defined(RT3352) || defined(RT2883) || defined(RT5350) */ 
+	UCHAR			BbpData = 0;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("ATE : ===> %s\n", __FUNCTION__));
+
+#if defined(RT30xx) || defined(RT305x) || defined(RT3350) || defined(RT3352) || defined(RT2883) || defined(RT5350)
+	/* RT35xx ATE will reuse this code segment. */
+	/* hardware reset BBP */
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData = MacData | 0x00000002;
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+
+	RtmpOsMsDelay(10);
+
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData = MacData & ~(0x00000002);
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+
+	/* Supposed that we have had a record in restore_BBP[] */
+	/* restore all BBP value */
+	for (bbp_index=0;bbp_index<ATE_BBP_REG_NUM;bbp_index++)
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd,bbp_index,restore_BBP[bbp_index]);
+
+	ASSERT(RestoreRfICType != 0);
+	pAd->RfIcType=RestoreRfICType;
+#endif /* defined(RT30xx) || defined(RT305x) || defined(RT3350) || defined(RT3352) || defined(RT2883) || defined(RT5350) */ 
+
+	/* Default value in BBP R22 is 0x0. */
+	BbpData = 0;
+	ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
+
+	/* Clear bit4 to stop continuous Tx production test. */
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData &= ~(1 << 4);
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData); 
+	
+	/* Disable Rx */
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData &= ~(1 << 3);
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+	
+	/* Abort Tx, RX DMA */
+	RtmpDmaEnable(pAd, 0);
+
+	/* Disable Tx */
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData &= ~(1 << 2);
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+
+
+#ifdef RTMP_MAC_USB
+	/* 
+		Make sure there are no pending bulk in/out IRPs before we go on.
+		pAd->BulkFlags != 0 : wait bulk out finish
+	*/
+	while (pAd->PendingRx > 0)
+	{
+		ATE_RTUSBCancelPendingBulkInIRP(pAd);
+		RtmpOsMsDelay(500);
+	}
+
+	while (((pAd->BulkOutPending[0] == TRUE) ||
+			(pAd->BulkOutPending[1] == TRUE) || 
+			(pAd->BulkOutPending[2] == TRUE) ||
+			(pAd->BulkOutPending[3] == TRUE)) && (pAd->BulkFlags != 0))
+			/* pAd->BulkFlags != 0 : wait bulk out finish */
+	{
+		do 
+		{
+			RTUSBCancelPendingBulkOutIRP(pAd);
+		} while (FALSE);			
+
+		RtmpOsMsDelay(500);
+	}
+
+	ASSERT(pAd->PendingRx == 0);
+/*=========================================================================*/
+/*      Reset Rx RING                                                      */ 
+/*=========================================================================*/
+	pAd->PendingRx = 0;
+	/* Next Rx Read index */
+	pAd->NextRxBulkInReadIndex = 0;	
+	/* Rx Bulk pointer */
+	pAd->NextRxBulkInIndex = RX_RING_SIZE - 1;	
+	pAd->NextRxBulkInPosition = 0;
+	for (ring_index = 0; ring_index < (RX_RING_SIZE); ring_index++)
+	{
+		PRX_CONTEXT  pRxContext = &(pAd->RxContext[ring_index]);
+		NdisZeroMemory(pRxContext->TransferBuffer, MAX_RXBULK_SIZE);
+
+		pRxContext->pAd	= pAd;
+		pRxContext->pIrp = NULL;
+		pRxContext->BulkInOffset = 0;
+		pRxContext->bRxHandling = FALSE;
+		pRxContext->InUse		= FALSE;
+		pRxContext->IRPPending	= FALSE;
+		pRxContext->Readable	= FALSE;
+	}
+
+/*=========================================================================*/
+/*      Reset Tx RING                                                      */ 
+/*=========================================================================*/
+	do 
+	{
+		RTUSBCancelPendingBulkOutIRP(pAd);
+	} while (FALSE);
+
+	/* Enable auto responder. */
+	RTMP_IO_READ32(pAd, AUTO_RSP_CFG, &MacData);
+	MacData = MacData | (0x01);
+	RTMP_IO_WRITE32(pAd, AUTO_RSP_CFG, MacData);
+
+	AsicEnableBssSync(pAd);
+
+	/* Soft reset BBP.*/
+	/* In 2870 chipset, ATE_BBP_IO_READ8_BY_REG_ID() == RTMP_BBP_IO_READ8_BY_REG_ID() */
+	/* Both rt2870ap and rt2870sta use BbpSoftReset(pAd) to do BBP soft reset */
+	BbpSoftReset(pAd);
+	{
+#ifdef CONFIG_STA_SUPPORT
+		/* Set all state machines back IDLE */
+		pAd->Mlme.CntlMachine.CurrState    = CNTL_IDLE;
+		pAd->Mlme.AssocMachine.CurrState   = ASSOC_IDLE;
+		pAd->Mlme.AuthMachine.CurrState    = AUTH_REQ_IDLE;
+		pAd->Mlme.AuthRspMachine.CurrState = AUTH_RSP_IDLE;
+		pAd->Mlme.SyncMachine.CurrState    = SYNC_IDLE;
+		pAd->Mlme.ActMachine.CurrState    = ACT_IDLE;
+#endif /* CONFIG_STA_SUPPORT */
+
+		/*
+			===> refer to MlmeRestartStateMachine().
+			When we entered ATE_START mode, PeriodicTimer was not cancelled.
+			So we don't have to set it here.
+		*/
+		
+		ASSERT(pAd->CommonCfg.Channel != 0);			
+
+		AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
+
+		/* empty function */
+		AsicLockChannel(pAd, pAd->CommonCfg.Channel);
+
+
+#ifdef CONFIG_STA_SUPPORT 
+	    RTMPStationStart(pAd);
+#endif /* CONFIG_STA_SUPPORT */
+	}	
+
+	/* Clear ATE Bulk in/out counter and continue setup. */
+	InterlockedExchange(&pAd->BulkOutRemained, 0);				
+	NdisAcquireSpinLock(&pAd->GenericLock);
+	pAd->ContinBulkOut = FALSE;		
+	pAd->ContinBulkIn = FALSE;
+	NdisReleaseSpinLock(&pAd->GenericLock);		
+
+	/* Wait 50ms to prevent next URB to bulkout during HW reset. */
+	/* todo : remove this if not necessary */
+	RtmpOsMsDelay(50);
+
+	pAd->ate.Mode = ATE_STOP;
+#endif /* RTMP_MAC_USB */
+
+	/* restore RX_FILTR_CFG */
+
+#ifdef CONFIG_STA_SUPPORT 
+	/* restore RX_FILTR_CFG due to that QA maybe set it to 0x3 */
+	RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, STANORMAL);
+#endif /* CONFIG_STA_SUPPORT */
+
+	/* Enable Tx */
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData |= (1 << 2);
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+
+	/* Enable Tx, Rx DMA. */
+	RtmpDmaEnable(pAd, 1);
+
+	/* Enable Rx */
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData |= (1 << 3);
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+
+
+#ifdef RTMP_MAC_USB
+	/* Wait 10ms for all of the bulk-in URBs to complete. */
+	/* todo : remove this if not necessary */
+	RtmpOsMsDelay(10);
+
+	/* Everything is ready to start normal Tx/Rx. */
+	RTUSBBulkReceive(pAd);
+#endif /* RTMP_MAC_USB */
+	RTMP_OS_NETDEV_START_QUEUE(pAd->net_dev);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("ATE : <=== %s\n", __FUNCTION__));
+	return Status;
+}
+
+
+static NDIS_STATUS TXCARR(
+	IN PRTMP_ADAPTER pAd)
+{
+	UINT32			MacData=0;
+	NDIS_STATUS		Status = NDIS_STATUS_SUCCESS;
+#if defined(RT30xx) || defined(RT305x) || defined(RT3350) || defined(RT3352) || defined(RT2883) || defined(RT5350)
+	UINT32			bbp_index=0;	 
+#endif /* defined(RT30xx) || defined(RT305x) || defined(RT3350) || defined(RT3352) || defined(RT2883) || defined(RT5350) */
+	UCHAR			BbpData = 0;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("ATE : ===> %s\n", __FUNCTION__));
+
+	pAd->ate.Mode = ATE_TXCARR;
+
+#if defined(RT30xx) || defined(RT305x) || defined(RT3350) || defined(RT3352) || defined(RT2883) || defined(RT5350)
+	/* RT35xx ATE will reuse this code segment. */
+	for (bbp_index=0;bbp_index<ATE_BBP_REG_NUM;bbp_index++)
+		restore_BBP[bbp_index]=0;
+
+	/* Record All BBP Value */
+	for (bbp_index=0;bbp_index<ATE_BBP_REG_NUM;bbp_index++)
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd,bbp_index,&restore_BBP[bbp_index]);
+#endif /* defined(RT30xx) || defined(RT305x) || defined(RT3350) || defined(RT3352) || defined(RT2883) || defined(RT5350) */
+
+#ifdef RTMP_MAC_USB
+	/* Disable Rx */
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData &= ~(1 << 3);
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+#endif /* RTMP_MAC_USB */
+
+	/* QA has done the following steps if it is used. */
+	if (pAd->ate.bQATxStart == FALSE) 
+	{
+#ifndef RT5350
+		/* Soft reset BBP. */
+		BbpSoftReset(pAd);
+#endif /* !RT5350 */
+
+
+#ifdef NEW_TXCARR
+		/* store the original value of RA_TX_PIN_CFG */
+		RTMP_IO_READ32(pAd, RA_TX_PIN_CFG, &Default_TX_PIN_CFG);
+
+		/* give RA_TX_PIN_CFG(0x1328) a proper value. */
+		if (pAd->ate.Channel < 14)
+		{
+			/* G band */
+			MacData = TXCONT_TX_PIN_CFG_G;
+			RTMP_IO_WRITE32(pAd, RA_TX_PIN_CFG, MacData);
+		}
+		else
+		{
+			/* A band */
+			MacData = TXCONT_TX_PIN_CFG_A;
+			RTMP_IO_WRITE32(pAd, RA_TX_PIN_CFG, MacData);
+		}
+
+		/* Carrier Test set BBP R22 bit7=1, bit6=1, bit[5~0]=0x01 */
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
+		BbpData &= 0xFFFFFF80; /* bit6, bit[5~0] */
+		BbpData |= 0x00000041; /* set bit6=1, bit[5~0]=0x01 */
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
+#else /* NEW_TXCARR */
+		/* Carrier Test set BBP R22 bit7=1, bit6=1, bit[5~0]=0x01 */
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
+		BbpData &= 0xFFFFFF00; /* clear bit7, bit6, bit[5~0] */
+		BbpData |= 0x000000C1; /* set bit7=1, bit6=1, bit[5~0]=0x01 */
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
+
+		/* set MAC_SYS_CTRL(0x1004) Continuous Tx Production Test (bit4) = 1 */
+		RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+		MacData = MacData | 0x00000010;
+		RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+#endif /* NEW_TXCARR */
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("ATE : <=== %s\n", __FUNCTION__));
+	return Status;
+}
+
+
+static NDIS_STATUS TXCONT(
+	IN PRTMP_ADAPTER pAd)
+{
+	UINT32			MacData=0;
+	NDIS_STATUS		Status = NDIS_STATUS_SUCCESS;
+#if defined(RT2883) || defined(RT3352) || defined(RT5350)
+	UINT32			bbp_index=0;
+#endif /* defined(RT2883) || defined(RT3352) || defined(RT5350) */
+	UCHAR			BbpData = 0;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("ATE : ===> %s\n", __FUNCTION__));
+
+	if (pAd->ate.bQATxStart == TRUE)
+	{
+		/*
+			set MAC_SYS_CTRL(0x1004) bit4(Continuous Tx Production Test)
+			and bit2(MAC TX enable) back to zero.
+		*/ 
+		RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+		MacData &= 0xFFFFFFEB;
+		RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+
+		/* set BBP R22 bit7=0 */
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
+		BbpData &= 0xFFFFFF7F; /* set bit7=0 */
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
+	}
+#ifdef NEW_TXCONT 
+	else
+	{
+		/* store the original value of RA_TX_PIN_CFG */
+		RTMP_IO_READ32(pAd, RA_TX_PIN_CFG, &Default_TX_PIN_CFG);
+	}
+#endif /* NEW_TXCONT */
+
+#if defined(RT2883) || defined(RT3352) || defined(RT5350)
+	for(bbp_index=0;bbp_index<ATE_BBP_REG_NUM;bbp_index++)
+		restore_BBP[bbp_index]=0;
+
+	/* Record All BBP Value */
+	for(bbp_index=0;bbp_index<ATE_BBP_REG_NUM;bbp_index++)
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd,bbp_index,&restore_BBP[bbp_index]);
+#endif /* defined(RT2883) || defined(RT3352) || defined(RT5350) */
+
+
+	/* Step 1: send 50 packets first. */
+	pAd->ate.Mode = ATE_TXCONT;
+	pAd->ate.TxCount = 50;
+
+#ifndef RT5350
+		/* Soft reset BBP. */
+		BbpSoftReset(pAd);
+#endif /* !RT5350 */
+
+
+	/* Abort Tx, RX DMA. */
+	RtmpDmaEnable(pAd, 0);
+
+
+	/* Do it after Tx/Rx DMA is aborted. */
+	pAd->ate.TxDoneCount = 0;
+	
+	/* Only needed if we have to send some normal frames. */
+	SetJapanFilter(pAd);
+
+
+#ifdef RTMP_MAC_USB
+	/* Setup frame format. */
+	ATESetUpFrame(pAd, 0);
+#endif /* RTMP_MAC_USB */
+
+	/* Enable Tx */
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData |= (1 << 2);
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+
+	/* Disable Rx */
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData &= ~(1 << 3);
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+
+	/* Start Tx, Rx DMA. */
+	RtmpDmaEnable(pAd, 1);
+
+#ifdef RTMP_MAC_USB
+	InterlockedExchange(&pAd->BulkOutRemained, pAd->ate.TxCount);
+#endif /* RTMP_MAC_USB */
+
+#ifdef RALINK_QA
+	if (pAd->ate.bQATxStart == TRUE)
+	{
+		pAd->ate.TxStatus = 1;
+	}
+#endif /* RALINK_QA */
+
+
+#ifdef RTMP_MAC_USB
+	NdisAcquireSpinLock(&pAd->GenericLock);
+	pAd->ContinBulkOut = FALSE;		
+	NdisReleaseSpinLock(&pAd->GenericLock);
+
+	RTUSB_SET_BULK_FLAG(pAd, fRTUSB_BULK_OUT_DATA_ATE);
+
+	/* Kick bulk out */ 
+	RTUSBKickBulkOut(pAd);
+
+	/* To make sure all the 50 frames have been bulk out before executing step 2 */
+	while (atomic_read(&pAd->BulkOutRemained) > 0)
+	{
+		RtmpOsMsDelay(5);
+	}
+#endif /* RTMP_MAC_USB */
+
+#ifdef NEW_TXCONT
+	/* give RA_TX_PIN_CFG(0x1328) a proper value. */
+	if (pAd->ate.Channel < 14)
+	{
+		/* G band */
+		MacData = TXCONT_TX_PIN_CFG_G;
+		RTMP_IO_WRITE32(pAd, RA_TX_PIN_CFG, MacData);
+	}
+	else
+	{
+		/* A band */
+		MacData = TXCONT_TX_PIN_CFG_A;
+		RTMP_IO_WRITE32(pAd, RA_TX_PIN_CFG, MacData);
+	}
+
+	/* Cont. TX set BBP R22 bit7=1 */
+	ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
+	BbpData |= 0x00000080; /* set bit7=1 */
+	ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
+#else
+	/* Step 2: send more 50 packets then start continue mode. */
+	/* Abort Tx, RX DMA. */
+	RtmpDmaEnable(pAd, 0);
+
+	/* Cont. TX set BBP R22 bit7=1 */
+	ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
+	BbpData |= 0x00000080; /* set bit7=1 */
+	ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
+
+	pAd->ate.TxCount = 50;
+
+	pAd->ate.TxDoneCount = 0;
+	SetJapanFilter(pAd);
+
+
+#ifdef RTMP_MAC_USB
+	/* Setup frame format. */
+	ATESetUpFrame(pAd, 0);
+#endif /* RTMP_MAC_USB */
+
+	/* Enable Tx */
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData |= (1 << 2);
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+
+	/* Disable Rx */
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData &= ~(1 << 3);
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+
+	/* Start Tx, Rx DMA. */
+	RtmpDmaEnable(pAd, 1);
+
+#ifdef RTMP_MAC_USB
+	InterlockedExchange(&pAd->BulkOutRemained, pAd->ate.TxCount);
+#endif /* RTMP_MAC_USB */
+#ifdef RALINK_QA
+	if (pAd->ate.bQATxStart == TRUE)
+	{
+		pAd->ate.TxStatus = 1;
+	}
+#endif /* RALINK_QA */
+
+
+#ifdef RTMP_MAC_USB
+	NdisAcquireSpinLock(&pAd->GenericLock);
+	pAd->ContinBulkOut = FALSE;		
+	NdisReleaseSpinLock(&pAd->GenericLock);
+
+	RTUSB_SET_BULK_FLAG(pAd, fRTUSB_BULK_OUT_DATA_ATE);
+	/* Kick bulk out */
+	RTUSBKickBulkOut(pAd);
+
+	/* Let pAd->BulkOutRemained be consumed to zero. */
+#endif /* RTMP_MAC_USB */
+	RTMPusecDelay(500);
+
+	/* enable continuous tx production test */
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData |= 0x00000010;
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);							
+#endif /* NEW_TXCONT */
+
+	DBGPRINT(RT_DEBUG_TRACE, ("ATE : <=== %s\n", __FUNCTION__));
+	return Status;
+}
+
+
+static NDIS_STATUS TXCARS(
+        IN PRTMP_ADAPTER pAd)
+{
+	UINT32			MacData=0;
+	NDIS_STATUS		Status = NDIS_STATUS_SUCCESS;
+#if defined(RT30xx) || defined(RT305x) || defined(RT3350) || defined(RT3352) || defined(RT2883) || defined(RT5350)
+	UINT32			bbp_index=0;	 
+#endif /* defined(RT30xx) || defined(RT305x) || defined(RT3350) || defined(RT3352) || defined(RT2883) || defined(RT5350) */
+	UCHAR			BbpData = 0;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("ATE : ===> %s\n", __FUNCTION__));
+
+	pAd->ate.Mode = ATE_TXCARRSUPP;
+
+#if defined(RT30xx) || defined(RT305x) || defined(RT3350) || defined(RT3352) || defined(RT2883) || defined(RT5350)
+        /* RT35xx ATE will reuse this code segment. */
+        for (bbp_index=0;bbp_index<ATE_BBP_REG_NUM;bbp_index++)
+                restore_BBP[bbp_index]=0;
+
+        /* Record All BBP Value */
+        for (bbp_index=0;bbp_index<ATE_BBP_REG_NUM;bbp_index++)
+                ATE_BBP_IO_READ8_BY_REG_ID(pAd,bbp_index,&restore_BBP[bbp_index]);
+#endif /* defined(RT30xx) || defined(RT305x) || defined(RT3350) || defined(RT3352) || defined(RT2883) || defined(RT5350) */
+
+#ifdef RTMP_MAC_USB
+	/* Disable Rx */
+	/* May be we need not to do this, because these have been done in ATE_START mode ??? */
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData &= ~(1 << 3);
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+#endif /* RTMP_MAC_USB */
+
+	/* QA has done the following steps if it is used. */
+	if (pAd->ate.bQATxStart == FALSE) 
+	{
+		/* RT3883 does not need BbpSoftReset() */
+		/* Soft reset BBP. */
+		BbpSoftReset(pAd);
+
+#ifdef NEW_TXCARRSUPP
+		/* store the original value of RA_TX_PIN_CFG */
+		RTMP_IO_READ32(pAd, RA_TX_PIN_CFG, &Default_TX_PIN_CFG);
+
+		/* give RA_TX_PIN_CFG(0x1328) a proper value. */
+		if (pAd->ate.Channel < 14)
+		{
+			/* G band */
+			MacData = TXCONT_TX_PIN_CFG_G;
+			RTMP_IO_WRITE32(pAd, RA_TX_PIN_CFG, MacData);
+		}
+		else
+		{
+			/* A band */
+			MacData = TXCONT_TX_PIN_CFG_A;
+			RTMP_IO_WRITE32(pAd, RA_TX_PIN_CFG, MacData);
+		}
+
+		/* Carrier Suppression set BBP R22 bit7=1 (Enable Continue Tx Mode) */
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
+		BbpData |= 0x00000080; /* set bit7=1 */
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
+
+		/* Carrier Suppression set BBP R24 bit0=1 (TX continuously send out 5.5MHZ sin save) */
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R24, &BbpData);
+		BbpData |= 0x00000001; /* set bit0=1 */
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, BbpData);
+#else
+		/* Carrier Suppression set BBP R22 bit7=1 (Enable Continue Tx Mode) */
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
+		BbpData |= 0x00000080; /* set bit7=1 */
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
+
+		/* Carrier Suppression set BBP R24 bit0=1 (TX continuously send out 5.5MHZ sin save) */
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R24, &BbpData);
+		BbpData |= 0x00000001; /* set bit0=1 */
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, BbpData);
+
+		/* set MAC_SYS_CTRL(0x1004) Continuous Tx Production Test (bit4) = 1 */
+		RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+		MacData = MacData | 0x00000010;
+		RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+#endif /* NEW_TXCARRSUPP */
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("ATE : <=== %s\n", __FUNCTION__));
+	return Status;
+}
+
+
+static NDIS_STATUS TXFRAME(
+	IN PRTMP_ADAPTER pAd)
+{
+	UINT32			MacData=0;
+#ifdef RTMP_MAC_USB
+	ULONG			IrqFlags = 0;
+#endif /* RTMP_MAC_USB */
+	NDIS_STATUS		Status = NDIS_STATUS_SUCCESS;
+	UCHAR			BbpData = 0;
+	STRING			IPGStr[8] = {0};
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("ATE : ===> %s(Count=%d)\n", __FUNCTION__, pAd->ate.TxCount));
+	pAd->ate.Mode |= ATE_TXFRAME;
+
+	if (pAd->ate.bQATxStart == FALSE)  
+	{
+		/* set IPG to sync tx power with QA tools */
+		/* default value of IPG is 200 */
+		snprintf(IPGStr, sizeof(IPGStr), "%u", pAd->ate.IPG);
+		DBGPRINT(RT_DEBUG_TRACE, ("IPGstr=%s\n", IPGStr));
+		Set_ATE_IPG_Proc(pAd, IPGStr);
+	}
+
+
+#ifdef RTMP_MAC_USB
+	/* Soft reset BBP. */
+	BbpSoftReset(pAd);
+
+	/* Default value in BBP R22 is 0x0. */
+	BbpData = 0;
+   	ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
+
+	/* Clear bit4 to stop continuous Tx production test. */
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData &= ~(1 << 4);
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+#endif /* RTMP_MAC_USB */
+
+#ifdef RALINK_QA
+	/* add this for LoopBack mode */
+	if (pAd->ate.bQARxStart == FALSE)  
+	{
+		RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+		MacData &= ~(1 << 3);
+		RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+	}
+
+	if (pAd->ate.bQATxStart == TRUE)  
+	{
+		pAd->ate.TxStatus = 1;
+	}
+#else
+	/* Disable Rx */
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData &= ~(1 << 3);
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+#endif /* RALINK_QA */
+
+
+#ifdef RTMP_MAC_USB
+	/* Enable Tx */
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData |= (1 << 2);
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+
+	SetJapanFilter(pAd);
+	
+	/* Abort Tx, RX DMA. */
+	RtmpDmaEnable(pAd, 0);
+
+	pAd->ate.TxDoneCount = 0;
+
+	/* Setup frame format. */
+	ATESetUpFrame(pAd, 0);	
+
+	/* Start Tx, RX DMA. */
+	RtmpDmaEnable(pAd, 1);
+
+	/* Check count is continuous or not yet. */
+	if (pAd->ate.TxCount == 0)
+	{
+		InterlockedExchange(&pAd->BulkOutRemained, 0);
+	}
+	else
+	{
+		InterlockedExchange(&pAd->BulkOutRemained, pAd->ate.TxCount);
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("bulk out count = %d\n", atomic_read(&pAd->BulkOutRemained)));
+	ASSERT((atomic_read(&pAd->BulkOutRemained) >= 0));
+
+	if (atomic_read(&pAd->BulkOutRemained) == 0)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("Send packet continuously\n"));
+
+		/* NdisAcquireSpinLock() == spin_lock_bh() */
+		/* NdisAcquireSpinLock only need one argument. */
+		NdisAcquireSpinLock(&pAd->GenericLock);
+		pAd->ContinBulkOut = TRUE;		
+		NdisReleaseSpinLock(&pAd->GenericLock);
+
+		/* BULK_OUT_LOCK() == spin_lock_irqsave() */
+		BULK_OUT_LOCK(&pAd->BulkOutLock[0], IrqFlags);
+		pAd->BulkOutPending[0] = FALSE;
+		BULK_OUT_UNLOCK(&pAd->BulkOutLock[0], IrqFlags);
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("Send packets depend on counter\n"));
+
+		NdisAcquireSpinLock(&pAd->GenericLock);
+		pAd->ContinBulkOut = FALSE;		
+		NdisReleaseSpinLock(&pAd->GenericLock);
+
+		BULK_OUT_LOCK(&pAd->BulkOutLock[0], IrqFlags);
+		pAd->BulkOutPending[0] = FALSE;
+		BULK_OUT_UNLOCK(&pAd->BulkOutLock[0], IrqFlags);
+	}				
+
+	RTUSB_SET_BULK_FLAG(pAd, fRTUSB_BULK_OUT_DATA_ATE);
+
+	/* Kick bulk out */ 
+	RTUSBKickBulkOut(pAd);
+#endif /* RTMP_MAC_USB */
+
+	DBGPRINT(RT_DEBUG_TRACE, ("ATE : <=== %s\n", __FUNCTION__));
+	return Status;
+}
+
+
+static NDIS_STATUS RXFRAME(
+	IN PRTMP_ADAPTER pAd)
+{
+	UINT32			MacData=0;
+	NDIS_STATUS		Status = NDIS_STATUS_SUCCESS;
+	UCHAR			BbpData = 0;
+#ifdef RTMP_MAC_USB
+	UINT32			ring_index=0;
+#endif /* RTMP_MAC_USB */
+
+	DBGPRINT(RT_DEBUG_TRACE, ("ATE : ===> %s\n", __FUNCTION__));
+
+	/* Disable Rx of MAC block */
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData &= ~(1 << 3);
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+
+	/* Default value in BBP R22 is 0x0. */
+	BbpData = 0;
+	ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
+
+#if defined (RT3883) || defined (RT3352) || defined (RT5350) 
+	if (pAd->ate.TxWI.BW == BW_20)
+	{
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xC0); 
+	}
+	else
+	{
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0x00);
+	}
+#endif /* defined (RT3883) || defined (RT3352) || defined (RT5350) */
+
+	/* Clear bit4 to stop continuous Tx production test. */
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData &= ~(1 << 4);
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+
+	pAd->ate.Mode |= ATE_RXFRAME;
+
+#ifdef RTMP_MAC_USB
+	/* Abort Tx, RX DMA. */
+	RtmpDmaEnable(pAd, 0);
+#endif /* RTMP_MAC_USB */
+
+	/* Disable Tx of MAC block. */
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData &= ~(1 << 2);
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+
+#ifdef RTMP_MAC_USB
+    /* Reset Rx RING */
+	for (ring_index = 0; ring_index < (RX_RING_SIZE); ring_index++)
+	{
+		PRX_CONTEXT  pRxContext = &(pAd->RxContext[ring_index]);
+
+		pRxContext->InUse = FALSE;
+		pRxContext->IRPPending = FALSE;
+		pRxContext->Readable = FALSE;
+
+		/* Get the URB from kernel(i.e., host control driver) back to driver. */
+		RTUSB_UNLINK_URB(pRxContext->pUrb);
+
+		/* Sleep 200 microsecs to give cancellation time to work. */
+		RTMPusecDelay(200);
+		pAd->BulkInReq = 0;
+
+		pAd->PendingRx = 0;
+		/* Next Rx Read index */
+		pAd->NextRxBulkInReadIndex = 0;
+		/* Rx Bulk pointer */
+		pAd->NextRxBulkInIndex		= RX_RING_SIZE - 1;	
+		pAd->NextRxBulkInPosition = 0;			
+	}
+
+	/* read to clear counters */
+	RTUSBReadMACRegister(pAd, RX_STA_CNT0, &MacData); /* RX PHY & RX CRC count */
+	RTUSBReadMACRegister(pAd, RX_STA_CNT1, &MacData); /* RX PLCP error count & CCA false alarm count */
+	RTUSBReadMACRegister(pAd, RX_STA_CNT2, &MacData); /* RX FIFO overflow frame count & RX duplicated filtered frame count */
+
+	pAd->ContinBulkIn = TRUE;
+
+	/* Enable Tx, RX DMA. */
+	RtmpDmaEnable(pAd, 1);
+#endif /* RTMP_MAC_USB */
+
+	/* Enable Rx of MAC block. */
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
+	MacData |= (1 << 3);
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
+
+#ifdef RTMP_MAC_USB
+	/* Kick bulk in. */
+	RTUSBBulkReceive(pAd);
+#endif /* RTMP_MAC_USB */
+
+	DBGPRINT(RT_DEBUG_TRACE, ("ATE : <=== %s\n", __FUNCTION__));
+	return Status;
+}
+
+#ifdef HW_ANTENNA_DIVERSITY_SUPPORT
+static NDIS_STATUS ANTDIVCBA(
+	IN PRTMP_ADAPTER pAd);
+#endif /* HW_ANTENNA_DIVERSITY_SUPPORT */ 
+
+
+/*
+==========================================================================
+    Description:
+        Set ATE operation mode to
+        0. ATESTART  = Start/Reset ATE Mode
+        1. ATESTOP   = Stop ATE Mode
+        2. TXCARR    = Transmit Carrier
+        3. TXCONT    = Continuous Transmit
+        4. TXFRAME   = Transmit Frames
+        5. RXFRAME   = Receive Frames
+#ifdef RALINK_QA
+        6. TXSTOP    = Stop Any Type of Transmition
+        7. RXSTOP    = Stop Receiving Frames        
+#endif
+
+    Return:
+        NDIS_STATUS_SUCCESS if all parameters are OK.
+==========================================================================
+*/
+static NDIS_STATUS	ATECmdHandler(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	NDIS_STATUS		Status = NDIS_STATUS_SUCCESS;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("===> %s\n", __FUNCTION__));
+
+#ifdef CONFIG_RT2880_ATE_CMD_NEW
+	if (!strcmp(arg, "ATESTART")) 		
+	{
+		/* Enter/Reset ATE mode and set Tx/Rx Idle */
+		Status = ATESTART(pAd);
+	}
+	else if (!strcmp(arg, "ATESTOP")) 
+	{
+		/* Leave ATE mode */
+		Status = ATESTOP(pAd);
+	}
+#else
+	if (!strcmp(arg, "APSTOP")) 		
+	{
+		Status = ATESTART(pAd);
+	}
+	else if (!strcmp(arg, "APSTART")) 
+	{
+		Status = ATESTOP(pAd);
+	}
+#endif
+	else if (!strcmp(arg, "TXCARR"))	
+	{
+		ATEAsicSwitchChannel(pAd);
+		/* AsicLockChannel() is empty function so far in fact */
+		AsicLockChannel(pAd, pAd->ate.Channel);
+		RtmpOsMsDelay(5);
+
+		Status = TXCARR(pAd);
+	}
+	else if (!strcmp(arg, "TXCARS"))
+	{
+		ATEAsicSwitchChannel(pAd);
+		/* AsicLockChannel() is empty function so far in fact */
+		AsicLockChannel(pAd, pAd->ate.Channel);
+		RtmpOsMsDelay(5);
+
+		Status = TXCARS(pAd);
+	}
+	else if (!strcmp(arg, "TXCONT"))	
+	{
+		ATEAsicSwitchChannel(pAd);
+		/* AsicLockChannel() is empty function so far in fact */
+		AsicLockChannel(pAd, pAd->ate.Channel);
+		RtmpOsMsDelay(5);
+
+		Status = TXCONT(pAd);
+	}
+	else if (!strcmp(arg, "TXFRAME")) 
+	{
+		ATEAsicSwitchChannel(pAd);
+		/* AsicLockChannel() is empty function so far in fact */
+		AsicLockChannel(pAd, pAd->ate.Channel);
+		RtmpOsMsDelay(5);
+
+		Status = TXFRAME(pAd);
+	}
+	else if (!strcmp(arg, "RXFRAME")) 
+	{
+		/* assigned here for ATEAsicSwitchChannel() */
+		pAd->ate.Mode |= ATE_RXFRAME;
+
+		ATEAsicSwitchChannel(pAd);
+		/* AsicLockChannel() is empty function so far in fact */
+		AsicLockChannel(pAd, pAd->ate.Channel);
+		RTMPusecDelay(5);
+
+		Status = RXFRAME(pAd);
+	}
+#ifdef HW_ANTENNA_DIVERSITY_SUPPORT
+	else if (!strcmp(arg, "ANTDIVCBA")) 
+	{
+		Status = ANTDIVCBA(pAd);
+	}
+#endif /* HW_ANTENNA_DIVERSITY_SUPPORT */
+#ifdef RALINK_QA
+	/* Enter ATE mode and set Tx/Rx Idle */
+	else if (!strcmp(arg, "TXSTOP"))
+	{
+		Status = TXSTOP(pAd);
+	}
+	else if (!strcmp(arg, "RXSTOP"))
+	{
+		Status = RXSTOP(pAd);
+	}
+#endif /* RALINK_QA */
+	else
+	{	
+		DBGPRINT(RT_DEBUG_TRACE, ("ATE : Invalid arg !\n"));
+		Status = NDIS_STATUS_INVALID_DATA;
+	}
+	RtmpOsMsDelay(5);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<=== %s\n", __FUNCTION__));
+	return Status;
+}
+
+
+INT	Set_ATE_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	/* Handle ATEACTIVE and ATEPASSIVE commands as a special case */
+	if (!strcmp(arg, "ATEACTIVE"))
+	{
+		pAd->ate.PassiveMode = FALSE;
+		return TRUE;
+	}
+
+	if (!strcmp(arg, "ATEPASSIVE"))
+	{
+		pAd->ate.PassiveMode = TRUE;
+		return TRUE;
+	}
+
+	/* Disallow all other ATE commands in passive mode */
+	if (pAd->ate.PassiveMode)
+		return TRUE;
+
+	if (ATECmdHandler(pAd, arg) == NDIS_STATUS_SUCCESS)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_Proc Success\n"));
+
+		return TRUE;
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_Proc Failed\n"));
+		return FALSE;
+	}
+}
+
+
+/* 
+==========================================================================
+    Description:
+        Set ATE ADDR1=DA for TxFrame(AP  : To DS = 0 ; From DS = 1)
+        or
+        Set ATE ADDR3=DA for TxFrame(STA : To DS = 1 ; From DS = 0)        
+        
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+==========================================================================
+*/
+INT	Set_ATE_DA_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	PSTRING				value;
+	INT					i;
+
+	/* Mac address acceptable format 01:02:03:04:05:06 length 17 */	
+	if (strlen(arg) != 17)  
+		return FALSE;
+
+	for (i = 0, value = rstrtok(arg, ":"); value; value = rstrtok(NULL, ":")) 
+	{
+		/* sanity check */
+		if ((strlen(value) != 2) || (!isxdigit(*value)) || (!isxdigit(*(value+1))))
+		{
+			return FALSE;  
+		}
+
+#ifdef CONFIG_STA_SUPPORT
+		AtoH(value, &pAd->ate.Addr3[i++], 1);
+#endif /* CONFIG_STA_SUPPORT */
+	}
+
+	/* sanity check */
+	if (i != MAC_ADDR_LEN)
+	{
+		return FALSE;  
+	}
+
+#ifdef CONFIG_STA_SUPPORT
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_DA_Proc (DA = %02x:%02x:%02x:%02x:%02x:%02x)\n", 
+		pAd->ate.Addr3[0], pAd->ate.Addr3[1], pAd->ate.Addr3[2], pAd->ate.Addr3[3], pAd->ate.Addr3[4], pAd->ate.Addr3[5]));
+#endif /* CONFIG_STA_SUPPORT */
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_DA_Proc Success\n"));
+	
+	return TRUE;
+}
+
+
+/* 
+==========================================================================
+    Description:
+        Set ATE ADDR3=SA for TxFrame(AP  : To DS = 0 ; From DS = 1)
+        or
+        Set ATE ADDR2=SA for TxFrame(STA : To DS = 1 ; From DS = 0)
+        
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+==========================================================================
+*/
+INT	Set_ATE_SA_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	PSTRING				value;
+	INT					i;
+
+	/* Mac address acceptable format 01:02:03:04:05:06 length 17 */	
+	if (strlen(arg) != 17)  
+		return FALSE;
+
+	for (i=0, value = rstrtok(arg, ":"); value; value = rstrtok(NULL, ":")) 
+	{
+		/* sanity check */
+		if ((strlen(value) != 2) || (!isxdigit(*value)) || (!isxdigit(*(value+1))))
+		{
+			return FALSE;  
+		}
+
+#ifdef CONFIG_STA_SUPPORT
+		AtoH(value, &pAd->ate.Addr2[i++], 1);
+#endif /* CONFIG_STA_SUPPORT */
+	}
+
+	/* sanity check */
+	if (i != MAC_ADDR_LEN)
+	{
+		return FALSE;
+	}
+
+#ifdef CONFIG_STA_SUPPORT
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_SA_Proc (SA = %02x:%02x:%02x:%02x:%02x:%02x)\n", 
+		pAd->ate.Addr2[0], pAd->ate.Addr2[1], pAd->ate.Addr2[2], pAd->ate.Addr2[3], pAd->ate.Addr2[4], pAd->ate.Addr2[5]));
+#endif /* CONFIG_STA_SUPPORT */
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_SA_Proc Success\n"));
+
+	return TRUE;
+}
+
+
+/* 
+==========================================================================
+    Description:
+        Set ATE ADDR2=BSSID for TxFrame(AP  : To DS = 0 ; From DS = 1)
+        or
+        Set ATE ADDR1=BSSID for TxFrame(STA : To DS = 1 ; From DS = 0)
+
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+==========================================================================
+*/
+INT	Set_ATE_BSSID_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	PSTRING				value;
+	INT					i;
+
+	/* Mac address acceptable format 01:02:03:04:05:06 length 17 */	
+	if (strlen(arg) != 17)  
+		return FALSE;
+
+	for (i=0, value = rstrtok(arg, ":"); value; value = rstrtok(NULL, ":")) 
+	{
+		/* sanity check */
+		if ((strlen(value) != 2) || (!isxdigit(*value)) || (!isxdigit(*(value+1))))
+		{
+			return FALSE;  
+		}
+
+#ifdef CONFIG_STA_SUPPORT
+		AtoH(value, &pAd->ate.Addr1[i++], 1);
+#endif /* CONFIG_STA_SUPPORT */
+	}
+
+	/* sanity check */
+	if (i != MAC_ADDR_LEN)
+	{
+		return FALSE;
+	}
+
+#ifdef CONFIG_STA_SUPPORT
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_BSSID_Proc (BSSID = %02x:%02x:%02x:%02x:%02x:%02x)\n",	
+		pAd->ate.Addr1[0], pAd->ate.Addr1[1], pAd->ate.Addr1[2], pAd->ate.Addr1[3], pAd->ate.Addr1[4], pAd->ate.Addr1[5]));
+#endif /* CONFIG_STA_SUPPORT */
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_BSSID_Proc Success\n"));
+
+	return TRUE;
+}
+
+
+/* 
+==========================================================================
+    Description:
+        Set ATE Tx Channel
+
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+==========================================================================
+*/
+INT	Set_ATE_CHANNEL_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	UCHAR channel;
+	
+
+	channel = simple_strtol(arg, 0, 10);
+
+	/* to allow A band channel : ((channel < 1) || (channel > 14)) */
+	if ((channel < 1) || (channel > 216))
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_CHANNEL_Proc::Out of range, it should be in range of 1~14.\n"));
+		return FALSE;
+	}
+
+	pAd->ate.Channel = channel;
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_CHANNEL_Proc (ATE Channel = %d)\n", pAd->ate.Channel));
+	DBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_CHANNEL_Proc Success\n"));
+
+	
+	return TRUE;
+}
+
+
+/* 
+==========================================================================
+    Description:
+        Set ATE Tx Power0
+        
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+==========================================================================
+*/
+INT	Set_ATE_TX_POWER0_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg)
+{
+	CHAR TxPower;
+	
+	TxPower = simple_strtol(arg, 0, 10);
+
+	if (pAd->ate.Channel <= 14)
+	{
+		if (!IS_RT3390(pAd))
+		{
+			if ((TxPower > 31) || (TxPower < 0))
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_POWER0_Proc::Out of range (Value=%d)\n", TxPower));
+				return FALSE;
+			}
+		}
+	}
+	else /* 5.5 GHz */
+	{
+#ifdef RTMP_RF_RW_SUPPORT
+		if (1)
+		{
+			/* RT3xxx TxPower range is 0~31(5 bits) in A band. */
+			if ((TxPower > 31) || (TxPower < 0))
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_POWER0_Proc::Out of range (Value=%d)\n", TxPower));
+				return FALSE;
+			}
+		}
+		else
+#endif /* RTMP_RF_RW_SUPPORT */
+		if ((TxPower > 15) || (TxPower < -7))
+		{
+			/* RT2xxx TxPower range is -7~15 in A band. */
+			DBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_POWER0_Proc::Out of range (Value=%d)\n", TxPower));
+			return FALSE;
+		}
+	}
+
+	pAd->ate.TxPower0 = TxPower;
+	ATETxPwrHandler(pAd, 0);
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_POWER0_Proc Success\n"));
+
+	
+	return TRUE;
+}
+
+
+/* 
+==========================================================================
+    Description:
+        Set ATE Tx Power1
+        
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+==========================================================================
+*/
+INT	Set_ATE_TX_POWER1_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg)
+{
+	CHAR TxPower;
+	
+	TxPower = simple_strtol(arg, 0, 10);
+
+	if (pAd->ate.Channel <= 14)
+	{
+		if (!IS_RT3390(pAd))
+		{
+			if ((TxPower > 31) || (TxPower < 0))
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_POWER1_Proc::Out of range (Value=%d)\n", TxPower));
+				return FALSE;
+			}
+		}
+	}
+	else
+	{
+#ifdef RTMP_RF_RW_SUPPORT
+		if (1)
+		{
+			/* RT3xxx TxPower range is 0~31(5 bits) in A band. */
+			if ((TxPower > 31) || (TxPower < 0))
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_POWER1_Proc::Out of range (Value=%d)\n", TxPower));
+				return FALSE;
+			}
+		}
+		else
+#endif /* RTMP_RF_RW_SUPPORT */
+		if ((TxPower > 15) || (TxPower < -7))
+		{
+			/* RT2xxx TxPower range is -7~15 in A band. */
+			DBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_POWER1_Proc::Out of range (Value=%d)\n", TxPower));
+			return FALSE;
+		}
+	}
+
+	pAd->ate.TxPower1 = TxPower;
+	ATETxPwrHandler(pAd, 1);
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_POWER1_Proc Success\n"));
+
+	
+	return TRUE;
+}
+
+
+#ifdef DOT11N_SS3_SUPPORT
+/* 
+==========================================================================
+    Description:
+        Set ATE Tx Power2
+        
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+==========================================================================
+*/
+INT	Set_ATE_TX_POWER2_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg)
+{
+	CHAR TxPower;
+	
+	TxPower = simple_strtol(arg, 0, 10);
+
+	if (pAd->ate.Channel <= 14)
+	{
+		if ((TxPower > 31) || (TxPower < 0))
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_POWER2_Proc::Out of range (Value=%d)\n", TxPower));
+			return FALSE;
+		}
+	}
+	else
+	{
+#ifdef RTMP_RF_RW_SUPPORT
+		if (1)
+		{
+			/* RT3xxx TxPower range is 0~31(5 bits) in A band. */
+			if ((TxPower > 31) || (TxPower < 0))
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_POWER2_Proc::Out of range (Value=%d)\n", TxPower));
+				return FALSE;
+			}
+		}
+		else
+#endif /* RTMP_RF_RW_SUPPORT */
+		if ((TxPower > 15) || (TxPower < -7))
+		{
+			/* RT2xxx TxPower range is -7~15 in A band. */
+			DBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_POWER2_Proc::Out of range (Value=%d)\n", TxPower));
+			return FALSE;
+		}
+	}
+
+	pAd->ate.TxPower2 = TxPower;
+
+	ATETxPwrHandler(pAd, 2);
+	
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_POWER2_Proc Success\n"));
+
+	
+	return TRUE;
+}
+#endif /* DOT11N_SS3_SUPPORT */
+
+
+/* 
+==========================================================================
+    Description:
+        Set ATE Tx Antenna
+        
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+==========================================================================
+*/
+INT	Set_ATE_TX_Antenna_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg)
+{
+	CHAR value;
+	
+	value = simple_strtol(arg, 0, 10);
+
+	if ((value > 2) || (value < 0))
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_Antenna_Proc::Out of range (Value=%d)\n", value));
+		return FALSE;
+	}
+
+	pAd->ate.TxAntennaSel = value;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_TX_Antenna_Proc (Antenna = %d)\n", pAd->ate.TxAntennaSel));
+	DBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_Antenna_Proc Success\n"));
+
+	/* calibration power unbalance issues */
+	ATEAsicSwitchChannel(pAd);
+
+	
+	return TRUE;
+}
+
+
+/* 
+==========================================================================
+    Description:
+        Set ATE Rx Antenna
+        
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+==========================================================================
+*/
+INT	Set_ATE_RX_Antenna_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg)
+{
+	CHAR value;
+	
+	value = simple_strtol(arg, 0, 10);
+
+	if ((value > 3) || (value < 0))
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_RX_Antenna_Proc::Out of range (Value=%d)\n", value));
+		return FALSE;
+	}
+
+	pAd->ate.RxAntennaSel = value;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_RX_Antenna_Proc (Antenna = %d)\n", pAd->ate.RxAntennaSel));
+	DBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_RX_Antenna_Proc Success\n"));
+
+	/* calibration power unbalance issues */
+	ATEAsicSwitchChannel(pAd);
+
+	
+	return TRUE;
+}
+
+
+#ifdef RT3350
+/* 
+==========================================================================
+    Description:
+        Set ATE PA bias to improve EVM
+        
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+==========================================================================
+*/
+INT Set_ATE_PA_Bias_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	UCHAR PABias = 0;
+	UCHAR RFValue;
+	
+	PABias = simple_strtol(arg, 0, 10);
+
+	if (PABias >= 16)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_PA_Bias_Proc::Out of range, it should be in range of 0~15.\n"));
+		return FALSE;
+	}
+
+	pAd->ate.PABias = PABias;
+
+	ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R19, (PUCHAR)&RFValue);
+	RFValue = (((RFValue & 0x0F) | (pAd->ate.PABias << 4)));
+	ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R19, (UCHAR)RFValue);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_PA_Bias_Proc (PABias = %d)\n", pAd->ate.PABias));
+	DBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_PA_Bias_Proc Success\n"));
+
+
+	return TRUE;
+}
+#endif /* RT3350 */
+
+
+/* 
+==========================================================================
+    Description:
+        Set ATE RF frequence offset
+        
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+==========================================================================
+*/
+INT	Set_ATE_TX_FREQOFFSET_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	UCHAR RFFreqOffset = 0;
+	ULONG R4 = 0;
+#ifdef RTMP_RF_RW_SUPPORT
+	UCHAR RFValue = 0;
+#endif /* RTMP_RF_RW_SUPPORT */
+
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+	UCHAR PreRFValue = 0;
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+	
+	RFFreqOffset = simple_strtol(arg, 0, 10);
+
+#ifdef RTMP_RF_RW_SUPPORT
+	/* RT35xx ATE will reuse this code segment. */
+	/* 2008/08/06: KH modified the limit of offset value from 64 to 96(0x5F + 0x01) */
+	if (RFFreqOffset >= 96)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_FREQOFFSET_Proc::Out of range(0 ~ 95).\n"));
+		return FALSE;
+	}
+#else
+	if (RFFreqOffset >= 64)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_FREQOFFSET_Proc::Out of range(0 ~ 63).\n"));
+		return FALSE;
+	}
+#endif /* RTMP_RF_RW_SUPPORT */
+
+	pAd->ate.RFFreqOffset = RFFreqOffset;
+
+#ifdef RTMP_RF_RW_SUPPORT
+	if (IS_RT30xx(pAd) || IS_RT3572(pAd))
+	{
+		ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R23, (PUCHAR)&RFValue);
+		RFValue = ((RFValue & 0x80) | pAd->ate.RFFreqOffset);
+		ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R23, (UCHAR)RFValue);
+	}
+	else
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+	if ( IS_RT5390(pAd))
+	{
+		ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R17, (PUCHAR)&RFValue);
+		PreRFValue = RFValue;
+		RFValue = ((RFValue & 0x80) | (pAd->ate.RFFreqOffset & 0x7F)); // xo_code (C1 value control) - Crystal calibration
+		RFValue = min(RFValue, 0x5F);
+		if (PreRFValue != RFValue)
+		{
+			AsicSendCommandToMcu(pAd, 0x74, 0xff, RFValue, PreRFValue);
+		}
+	}
+	else
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+#endif /* RTMP_RF_RW_SUPPORT */
+	{
+		/* RT28xx */
+		/* shift TX power control to correct RF register bit position */
+		R4 = pAd->ate.RFFreqOffset << 15;		
+		R4 |= (pAd->LatchRfRegs.R4 & ((~0x001f8000)));
+		pAd->LatchRfRegs.R4 = R4;
+		
+		RtmpRfIoWrite(pAd);
+	}
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_TX_FREQOFFSET_Proc (RFFreqOffset = %d)\n", pAd->ate.RFFreqOffset));
+	DBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_FREQOFFSET_Proc Success\n"));
+
+	
+	return TRUE;
+}
+
+
+/* 
+==========================================================================
+    Description:
+        Set ATE RF BW
+        
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+==========================================================================
+*/
+INT	Set_ATE_TX_BW_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	INT powerIndex;
+	UCHAR value = 0;
+	UCHAR BBPCurrentBW;
+	
+	BBPCurrentBW = simple_strtol(arg, 0, 10);
+
+	if ((BBPCurrentBW == 0)
+#ifdef RT30xx
+		|| IS_RT2070(pAd)
+#endif /* RT30xx */
+		)
+	{
+		pAd->ate.TxWI.BW = BW_20;
+	}
+	else
+	{
+		pAd->ate.TxWI.BW = BW_40;
+ 	}
+
+	/* RT35xx ATE will reuse this code segment. */
+	/* Fix the error spectrum of CCK-40MHZ. */
+	/* Turn on BBP 20MHz mode by request here. */
+	if ((pAd->ate.TxWI.PHYMODE == MODE_CCK) && (pAd->ate.TxWI.BW == BW_40))
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_BW_Proc!! Warning!! CCK only supports 20MHZ!!\nBandwidth switch to 20\n"));
+		pAd->ate.TxWI.BW = BW_20;
+	}
+
+	if (pAd->ate.TxWI.BW == BW_20)
+	{
+		if (pAd->ate.Channel <= 14)
+		{
+			/* BW=20;G band */
+ 			for (powerIndex=0; powerIndex<MAX_TXPOWER_ARRAY_SIZE; powerIndex++)
+ 			{
+				if (pAd->Tx20MPwrCfgGBand[powerIndex] == 0xffffffff)
+					continue;
+
+				{
+					RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + powerIndex*4, pAd->Tx20MPwrCfgGBand[powerIndex]);	
+				}
+				RtmpOsMsDelay(5);				
+			}
+		}
+		else
+		{
+			/* BW=20;A band */
+ 			for (powerIndex=0; powerIndex<MAX_TXPOWER_ARRAY_SIZE; powerIndex++)
+ 			{
+				if (pAd->Tx20MPwrCfgABand[powerIndex] == 0xffffffff)
+					continue;
+
+ 				{
+					RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + powerIndex*4, pAd->Tx20MPwrCfgABand[powerIndex]);	
+ 				}
+ 				RtmpOsMsDelay(5);				
+ 			}
+		}
+
+		/* BW=20 */
+#if defined (RT3352) || defined (RT5350) 
+		if (IS_RT3352(pAd) || IS_RT5350(pAd))
+		{
+	 		value = 0x40;
+	 		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, value);
+		}
+		else
+#endif /* defined (RT3352) || defined (RT5350) */
+		{
+		/* Set BBP R4 bit[4:3]=0:0 */
+ 		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &value);
+ 		value &= (~0x18);
+ 		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, value);
+		}
+
+
+		/* Set BBP R66=0x3C */
+		value = 0x3C;
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, value);
+
+
+#ifdef RT30xx
+		/* set BW = 20 MHz */
+		if (IS_RT30xx(pAd))
+                {
+			ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R24, (UCHAR) pAd->Mlme.CaliBW20RfR24);
+                        ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R31, &value);
+			value &= (~0x20);
+			ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R31, value);
+                }
+		else
+#endif /* RT30xx */
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+		if (IS_RT5390(pAd))
+		{
+			ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R30, &value);
+			value &= ~(0x06); // 20MBW Bit[2:1]=0,0
+			ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R30, value);
+		}		
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+
+		/* set BW = 20 MHz */
+		{
+			pAd->LatchRfRegs.R4 &= ~0x00200000;
+			RtmpRfIoWrite(pAd);
+		}
+		/* BW = 20 MHz */
+		if (IS_RT3352(pAd))
+		{
+			/* Set BBP R68=0x0B to improve Rx sensitivity. */
+			value = 0x0B;
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R68, value);
+			/* Set BBP R69=0x16 */
+			value = 0x12;
+	 		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, value);
+			/* Set BBP R70=0x08 */
+			value = 0x0A;
+	 		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, value);
+			/* Set BBP R73=0x11 */
+			value = 0x10;
+	 		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, value);
+		}
+		else if (IS_RT5350(pAd))
+		{
+			/* Set BBP R68=0x0B to improve Rx sensitivity. */
+			value = 0x0B;
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R68, value);
+			/* Set BBP R69=0x16 */
+			value = 0x12;
+	 		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, value);
+			/* Set BBP R70=0x08 */
+			value = 0x0A;
+	 		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, value);
+			/* Set BBP R73=0x11 */
+			value = 0x13;
+	 		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, value);
+		}
+		else
+		{
+			/* Set BBP R68=0x0B to improve Rx sensitivity. */
+			value = 0x0B;
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R68, value);
+			/* Set BBP R69=0x16 */
+			if ( IS_RT5390(pAd))
+				value = 0x12;
+			else
+				value = 0x16;
+	 		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, value);
+			/* Set BBP R70=0x08 */
+			if ( IS_RT5390(pAd))
+				value = 0x0A;
+			else
+				value = 0x08;
+	 		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, value);
+			/* Set BBP R73=0x11 */
+		        if ( IS_RT5390(pAd))
+			    value = 0x13;
+		        else
+			    value = 0x11;
+
+	 		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, value);
+		}
+
+		/* Please don't move this block backward. */
+		/* BBP_R4 should be overwritten for every chip if the condition matched. */
+		if (pAd->ate.Channel == 14)
+		{
+			INT TxMode = pAd->ate.TxWI.PHYMODE;
+
+			if (TxMode == MODE_CCK)
+			{
+				/* when Channel==14 && Mode==CCK && BandWidth==20M, BBP R4 bit5=1 */
+ 				ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &value);
+				value |= 0x20; /* set bit5=1 */
+ 				ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, value);				
+			}
+		}
+	}
+	/* If bandwidth = 40M, set RF Reg4 bit 21 = 0. */
+	else if (pAd->ate.TxWI.BW == BW_40)
+	{
+		if (pAd->ate.Channel <= 14)
+		{
+			/* BW=40;G band */
+			for (powerIndex=0; powerIndex<MAX_TXPOWER_ARRAY_SIZE; powerIndex++)
+			{
+				if (pAd->Tx40MPwrCfgGBand[powerIndex] == 0xffffffff)
+					continue;
+
+				{
+					RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + powerIndex*4, pAd->Tx40MPwrCfgGBand[powerIndex]);	
+				}
+				RtmpOsMsDelay(5);				
+			}
+		}
+		else
+		{
+			/* BW=40;A band */
+			for (powerIndex=0; powerIndex<MAX_TXPOWER_ARRAY_SIZE; powerIndex++)
+			{
+				if (pAd->Tx40MPwrCfgABand[powerIndex] == 0xffffffff)
+					continue;
+
+				{
+					RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + powerIndex*4, pAd->Tx40MPwrCfgABand[powerIndex]);	
+				}
+				RtmpOsMsDelay(5);				
+			}		
+
+			if ((pAd->ate.TxWI.PHYMODE >= 2) && (pAd->ate.TxWI.MCS == 7))
+			{
+    			value = 0x28;
+    			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R67, value);
+			}
+		}
+
+		{
+			/* Set BBP R4 bit[4:3]=1:0 */
+			ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &value);
+			value &= (~0x18);
+			value |= 0x10;
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, value);
+		}
+
+
+#if !defined (RT35xx) && !defined (RT3352) && !defined (RT5350)
+		/* Set BBP R66=0x3C */
+		value = 0x3C;
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, value);
+#endif /* !defined (RT35xx) && !defined (RT3352) && !defined (RT5350) */
+
+
+#ifdef RT30xx
+		/* set BW = 40 MHz */
+		if(IS_RT30xx(pAd))
+                 {
+			ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R24, (UCHAR) pAd->Mlme.CaliBW40RfR24);
+                        ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R31, &value);
+			value |= 0x20;
+			ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R31, value);
+                  }
+		else
+#endif /* RT30xx */
+		/* set BW = 40 MHz */
+		{
+		pAd->LatchRfRegs.R4 |= 0x00200000;
+		RtmpRfIoWrite(pAd);
+		}
+		/* BW = 40 MHz */
+		if (IS_RT3352(pAd))
+		{
+			/* Set BBP R68=0x0B to improve Rx sensitivity. */
+			value = 0x0B;
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R68, value);
+			/* Set BBP R69=0x16 */
+			value = 0x12;
+	 		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, value);
+			/* Set BBP R70=0x08 */
+			value = 0x0A;
+	 		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, value);
+			/* Set BBP R73=0x11 */
+			value = 0x10;
+	 		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, value);
+		}
+		else if (IS_RT5350(pAd))
+		{
+			/* Set BBP R68=0x0B to improve Rx sensitivity. */
+			value = 0x0B;
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R68, value);
+			/* Set BBP R69=0x16 */
+			value = 0x12;
+	 		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, value);
+			/* Set BBP R70=0x08 */
+			value = 0x0A;
+	 		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, value);
+			/* Set BBP R73=0x11 */
+			value = 0x13;
+	 		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, value);
+		}
+		else
+		{
+			/* Set BBP R68=0x0C to improve Rx sensitivity. */
+			value = 0x0C;
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R68, value);
+			/* Set BBP R69=0x1A */
+			value = 0x1A;
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, value);
+			/* Set BBP R70=0x0A */
+			value = 0x0A;
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, value);
+			/* Set BBP R73=0x16 */
+		        if (IS_RT5390(pAd))
+			    value = 0x13;
+		        else
+			    value = 0x16;
+			ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, value);
+		}
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_TX_BW_Proc (BBPCurrentBW = %d)\n", pAd->ate.TxWI.BW));
+	DBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_BW_Proc Success\n"));
+
+	
+	return TRUE;
+}
+
+
+/* 
+==========================================================================
+    Description:
+        Set ATE Tx frame length
+        
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+==========================================================================
+*/
+INT	Set_ATE_TX_LENGTH_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	pAd->ate.TxLength = simple_strtol(arg, 0, 10);
+
+	if ((pAd->ate.TxLength < 24) || (pAd->ate.TxLength > (MAX_FRAME_SIZE - 34/* == 2312 */)))
+	{
+		pAd->ate.TxLength = (MAX_FRAME_SIZE - 34/* == 2312 */);
+		DBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_LENGTH_Proc::Out of range, it should be in range of 24~%d.\n", (MAX_FRAME_SIZE - 34/* == 2312 */)));
+		return FALSE;
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_TX_LENGTH_Proc (TxLength = %d)\n", pAd->ate.TxLength));
+	DBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_LENGTH_Proc Success\n"));
+
+	
+	return TRUE;
+}
+
+
+/* 
+==========================================================================
+    Description:
+        Set ATE Tx frame count
+        
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+==========================================================================
+*/
+INT	Set_ATE_TX_COUNT_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	pAd->ate.TxCount = simple_strtol(arg, 0, 10);
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_TX_COUNT_Proc (TxCount = %d)\n", pAd->ate.TxCount));
+	DBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_COUNT_Proc Success\n"));
+
+	
+	return TRUE;
+}
+
+
+/* 
+==========================================================================
+    Description:
+        Set ATE Tx frame MCS
+        
+        Return:
+        	TRUE if all parameters are OK, FALSE otherwise
+==========================================================================
+*/
+INT	Set_ATE_TX_MCS_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg)
+{
+	UCHAR MCS;
+	INT result;
+
+	MCS = simple_strtol(arg, 0, 10);
+	result = CheckMCSValid(pAd, pAd->ate.TxWI.PHYMODE, MCS);
+
+	if (result != -1)
+	{
+		pAd->ate.TxWI.MCS = (UCHAR)MCS;
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_MCS_Proc::Out of range, refer to rate table.\n"));
+		return FALSE;
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_TX_MCS_Proc (MCS = %d)\n", pAd->ate.TxWI.MCS));
+	DBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_MCS_Proc Success\n"));
+
+	
+	return TRUE;
+}
+
+
+/* 
+==========================================================================
+    Description:
+        Set ATE Tx frame Mode
+        0: MODE_CCK
+        1: MODE_OFDM
+        2: MODE_HTMIX
+        3: MODE_HTGREENFIELD
+        
+        Return:
+        	TRUE if all parameters are OK, FALSE otherwise
+==========================================================================
+*/
+INT	Set_ATE_TX_MODE_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg)
+{
+	UCHAR BbpData = 0;
+
+	pAd->ate.TxWI.PHYMODE = simple_strtol(arg, 0, 10);
+
+	if (pAd->ate.TxWI.PHYMODE > 3)
+	{
+		pAd->ate.TxWI.PHYMODE = 0;
+		DBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_MODE_Proc::Out of range.\nIt should be in range of 0~3\n"));
+		DBGPRINT(RT_DEBUG_ERROR, ("0: CCK, 1: OFDM, 2: HT_MIX, 3: HT_GREEN_FIELD.\n"));
+		return FALSE;
+	}
+
+	/* Turn on BBP 20MHz mode by request here. */
+	if (pAd->ate.TxWI.PHYMODE == MODE_CCK)
+	{
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BbpData);
+		BbpData &= (~0x18);
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BbpData);
+		pAd->ate.TxWI.BW = BW_20;
+		DBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_MODE_Proc::CCK Only support 20MHZ. Switch to 20MHZ.\n"));
+	}
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+	if (IS_RT5390F(pAd))
+	{
+		if (pAd->ate.TxWI.PHYMODE == MODE_CCK)
+			ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R55, 0x46);
+		else			
+			ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R55, 0x43);
+	}
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+
+#ifdef RT3350
+	if (IS_RT3350(pAd))
+	{
+		if (pAd->ate.TxWI.PHYMODE == MODE_CCK)
+		{
+			USHORT value;
+			UCHAR  rf_offset;
+			UCHAR  rf_value;
+
+			RT28xx_EEPROM_READ16(pAd, 0x126, value);
+			rf_value = value & 0x00FF;
+			rf_offset = (value & 0xFF00) >> 8;
+
+			if(rf_offset == 0xff)
+			    rf_offset = RF_R21;
+			if(rf_value == 0xff)
+			    rf_value = 0x4F;
+			ATE_RF_IO_WRITE8_BY_REG_ID(pAd, rf_offset, (UCHAR)rf_value);
+		
+			RT28xx_EEPROM_READ16(pAd, 0x12a, value);
+			rf_value = value & 0x00FF;
+			rf_offset = (value & 0xFF00) >> 8;
+
+			if(rf_offset == 0xff)
+			    rf_offset = RF_R29;
+			if(rf_value == 0xff)
+			    rf_value = 0x07;
+			ATE_RF_IO_WRITE8_BY_REG_ID(pAd, rf_offset, (UCHAR)rf_value);
+		
+
+			/* set RF_R24 */
+			if (pAd->ate.TxWI.BW == BW_40)
+			{    
+				value = 0x3F;
+			}
+			else
+			{
+				value = 0x1F;
+			}
+			ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R24, (UCHAR)value);
+		}
+		else
+		{
+			USHORT value;
+			UCHAR  rf_offset;
+			UCHAR  rf_value;
+
+			RT28xx_EEPROM_READ16(pAd, 0x124, value);
+			rf_value = value & 0x00FF;
+			rf_offset = (value & 0xFF00) >> 8;
+
+			if(rf_offset == 0xff)
+			    rf_offset = RF_R21;
+			if(rf_value == 0xff)
+			    rf_value = 0x6F;
+			ATE_RF_IO_WRITE8_BY_REG_ID(pAd, rf_offset, (UCHAR)rf_value);
+		
+			RT28xx_EEPROM_READ16(pAd, 0x128, value);
+			rf_value = value & 0x00FF;
+			rf_offset = (value & 0xFF00) >> 8;
+
+			if(rf_offset == 0xff)
+			    rf_offset = RF_R29;
+			if(rf_value == 0xff)
+			    rf_value = 0x07;
+			ATE_RF_IO_WRITE8_BY_REG_ID(pAd, rf_offset, (UCHAR)rf_value);
+		
+			/* set RF_R24 */
+			if (pAd->ate.TxWI.BW == BW_40)
+			{    
+				value = 0x28;
+			}
+			else
+			{
+				value = 0x18;
+			}
+			ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R24, (UCHAR)value);
+		}
+	}
+#endif /* RT3350 */
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_TX_MODE_Proc (TxMode = %d)\n", pAd->ate.TxWI.PHYMODE));
+	DBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_MODE_Proc Success\n"));
+
+	
+	return TRUE;
+}
+
+
+/* 
+==========================================================================
+    Description:
+        Set ATE Tx frame GI
+        
+        Return:
+        	TRUE if all parameters are OK, FALSE otherwise
+==========================================================================
+*/
+INT	Set_ATE_TX_GI_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg)
+{
+	pAd->ate.TxWI.ShortGI = simple_strtol(arg, 0, 10);
+
+	if (pAd->ate.TxWI.ShortGI > 1)
+	{
+		pAd->ate.TxWI.ShortGI = 0;
+		DBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_GI_Proc::Out of range\n"));
+		return FALSE;
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_TX_GI_Proc (GI = %d)\n", pAd->ate.TxWI.ShortGI));
+	DBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_GI_Proc Success\n"));
+
+	
+	return TRUE;
+}
+
+
+INT	Set_ATE_RX_FER_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	pAd->ate.bRxFER = simple_strtol(arg, 0, 10);
+
+	if (pAd->ate.bRxFER == 1)
+	{
+		pAd->ate.RxCntPerSec = 0;
+		pAd->ate.RxTotalCnt = 0;
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_RX_FER_Proc (bRxFER = %d)\n", pAd->ate.bRxFER));
+	DBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_RX_FER_Proc Success\n"));
+
+	
+	return TRUE;
+}
+
+
+INT Set_ATE_Read_RF_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+#ifdef RTMP_RF_RW_SUPPORT
+	/* modify by WY for Read RF Reg. error */
+	UCHAR RFValue;
+	INT index=0;
+
+/* 2008/07/10:KH add to support RT30xx ATE<-- */
+	if (IS_RT30xx(pAd) || IS_RT3572(pAd))
+	{
+		for (index = 0; index < 32; index++)
+		{
+			ATE_RF_IO_READ8_BY_REG_ID(pAd, index, (PUCHAR)&RFValue);
+			DBGPRINT(RT_DEBUG_OFF, ("R%d=%d\n",index,RFValue));
+		}		
+	}
+	else
+/* 2008/07/10:KH add to support RT30xx ATE--> */
+#endif /* RTMP_RF_RW_SUPPORT */
+	{
+		DBGPRINT(RT_DEBUG_OFF, ("R1 = %x\n", pAd->LatchRfRegs.R1));
+		DBGPRINT(RT_DEBUG_OFF, ("R2 = %x\n", pAd->LatchRfRegs.R2));
+		DBGPRINT(RT_DEBUG_OFF, ("R3 = %x\n", pAd->LatchRfRegs.R3));
+		DBGPRINT(RT_DEBUG_OFF, ("R4 = %x\n", pAd->LatchRfRegs.R4));
+	}
+	return TRUE;
+}
+
+
+#ifndef RTMP_RF_RW_SUPPORT
+INT Set_ATE_Write_RF1_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	UINT32 value = (UINT32) simple_strtol(arg, 0, 16);	
+
+	pAd->LatchRfRegs.R1 = value;
+	RtmpRfIoWrite(pAd);
+
+	return TRUE;
+}
+
+
+INT Set_ATE_Write_RF2_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	UINT32 value = (UINT32) simple_strtol(arg, 0, 16);
+
+	pAd->LatchRfRegs.R2 = value;
+	RtmpRfIoWrite(pAd);
+
+	return TRUE;
+}
+
+
+INT Set_ATE_Write_RF3_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	UINT32 value = (UINT32) simple_strtol(arg, 0, 16);
+
+	pAd->LatchRfRegs.R3 = value;
+	RtmpRfIoWrite(pAd);
+
+	return TRUE;
+}
+
+
+INT Set_ATE_Write_RF4_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	UINT32 value = (UINT32) simple_strtol(arg, 0, 16);
+
+	pAd->LatchRfRegs.R4 = value;
+	RtmpRfIoWrite(pAd);
+
+	return TRUE;
+}
+#endif /* !RTMP_RF_RW_SUPPORT */
+
+
+/* 
+==========================================================================
+    Description:
+        Load and Write EEPROM from a binary file prepared in advance.
+        
+        Return:
+        	TRUE if all parameters are OK, FALSE otherwise
+==========================================================================
+*/
+INT Set_ATE_Load_E2P_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	BOOLEAN		    	ret = FALSE;
+	PSTRING			src = EEPROM_BIN_FILE_NAME;
+	RTMP_OS_FD		srcf;
+	INT32 			retval;
+	USHORT 			WriteEEPROM[(EEPROM_SIZE >> 1)];
+	INT				FileLength = 0;
+	UINT32 			value = (UINT32) simple_strtol(arg, 0, 10);
+	RTMP_OS_FS_INFO	osFSInfo;
+
+	DBGPRINT(RT_DEBUG_ERROR, ("===> %s (value=%d)\n\n", __FUNCTION__, value));
+
+	if (value > 0)
+	{
+		/* zero the e2p buffer */
+		NdisZeroMemory((PUCHAR)WriteEEPROM, EEPROM_SIZE);
+
+		RtmpOSFSInfoChange(&osFSInfo, TRUE);
+
+		do
+		{
+			/* open the bin file */
+			srcf = RtmpOSFileOpen(src, O_RDONLY, 0);
+
+			if (IS_FILE_OPEN_ERR(srcf)) 
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("%s - Error opening file %s\n", __FUNCTION__, src));
+				break;
+			}
+
+			/* read the firmware from the file *.bin */
+			FileLength = RtmpOSFileRead(srcf, (PSTRING)WriteEEPROM, EEPROM_SIZE);
+
+			if (FileLength != EEPROM_SIZE)
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("%s: error file length (=%d) in e2p.bin\n",
+					   __FUNCTION__, FileLength));
+				break;
+			}
+			else
+			{
+				/* write the content of .bin file to EEPROM */
+				rt_ee_write_all(pAd, WriteEEPROM);
+				ret = TRUE;
+			}
+			break;
+		} while(TRUE);
+
+		/* close firmware file */
+		if (IS_FILE_OPEN_ERR(srcf))
+		{
+			;
+		}
+		else
+		{
+			retval = RtmpOSFileClose(srcf);			
+
+			if (retval)
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("--> Error %d closing %s\n", -retval, src));
+				
+			} 
+		}
+
+		/* restore */
+		RtmpOSFSInfoChange(&osFSInfo, FALSE);		
+	}
+
+    DBGPRINT(RT_DEBUG_ERROR, ("<=== %s (ret=%d)\n", __FUNCTION__, ret));
+
+    return ret;
+}
+
+
+INT Set_ATE_Read_E2P_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	USHORT buffer[EEPROM_SIZE >> 1];
+	USHORT *p;
+	int i;
+	
+	rt_ee_read_all(pAd, (USHORT *)buffer);
+	p = buffer;
+	for (i = 0; i < (EEPROM_SIZE >> 1); i++)
+	{
+		DBGPRINT(RT_DEBUG_OFF, ("%4.4x ", *p));
+		if (((i+1) % 16) == 0)
+			DBGPRINT(RT_DEBUG_OFF, ("\n"));
+		p++;
+	}
+	return TRUE;
+}
+
+
+#ifdef LED_CONTROL_SUPPORT
+#endif /* LED_CONTROL_SUPPORT */
+
+
+/* 
+==========================================================================
+    Description:
+        Enable ATE auto Tx alc (Tx auto level control).
+        According to the chip temperature, auto adjust the transmit power.  
+        
+        0: disable
+        1: enable
+        
+        Return:
+        	TRUE if all parameters are OK, FALSE otherwise
+==========================================================================
+*/
+INT	Set_ATE_AUTO_ALC_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	UINT32 value = simple_strtol(arg, 0, 10);
+
+	if (value > 0)
+	{
+		pAd->ate.bAutoTxAlc = TRUE;
+		DBGPRINT(RT_DEBUG_TRACE, ("ATEAUTOALC = TRUE , auto alc enabled!\n"));
+	}
+	else
+	{
+		pAd->ate.bAutoTxAlc = FALSE;
+		DBGPRINT(RT_DEBUG_TRACE, ("ATEAUTOALC = FALSE , auto alc disabled!\n"));
+	}	
+
+
+	return TRUE;
+}
+
+
+#ifdef TXBF_SUPPORT
+/* 
+==========================================================================
+    Description:
+        Enable ATE Tx BF (Tx Beamforming feature).
+        
+        0: disable
+        1: enable
+        
+        Return:
+        	TRUE if all parameters are OK, FALSE otherwise
+==========================================================================
+*/
+INT	Set_ATE_TX_BF_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	UINT32 value = simple_strtol(arg, 0, 10);
+
+	if (value > 0)
+	{
+		pAd->ate.bTxBF = TRUE;
+		DBGPRINT(RT_DEBUG_TRACE, ("ATETXBF = TRUE , bean forming enabled!\n"));
+	}
+	else
+	{
+		pAd->ate.bTxBF = FALSE;
+		DBGPRINT(RT_DEBUG_TRACE, ("ATETXBF = FALSE , bean forming disabled!\n"));
+	}	
+
+
+	return TRUE;
+}
+#endif /* TXBF_SUPPORT */	
+
+
+/* 
+==========================================================================
+    Description:
+        Set ATE Tx frame IPG
+        
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+==========================================================================
+*/
+INT	Set_ATE_IPG_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	UINT32           data, value;
+
+	pAd->ate.IPG = simple_strtol(arg, 0, 10);
+	value = pAd->ate.IPG;
+
+	RTMP_IO_READ32(pAd, XIFS_TIME_CFG, &data);
+
+	if (value <= 0)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_IPG_Proc::IPG is disabled(IPG == 0).\n"));
+		return TRUE;
+	}
+
+	ASSERT(value > 0);
+
+	if ((value > 0) && (value < 256))
+	{               
+	    RTMP_IO_READ32(pAd, EDCA_AC0_CFG, &data);
+	    data &= 0x0;
+	    RTMP_IO_WRITE32(pAd, EDCA_AC0_CFG, data);
+
+	    RTMP_IO_READ32(pAd, EDCA_AC1_CFG, &data);
+	    data &= 0x0;
+	    RTMP_IO_WRITE32(pAd, EDCA_AC1_CFG, data);
+
+	    RTMP_IO_READ32(pAd, EDCA_AC2_CFG, &data);
+	    data &= 0x0;
+	    RTMP_IO_WRITE32(pAd, EDCA_AC2_CFG, data);
+
+	    RTMP_IO_READ32(pAd, EDCA_AC3_CFG, &data);
+	    data &= 0x0;
+	    RTMP_IO_WRITE32(pAd, EDCA_AC3_CFG, data);
+	}
+	else
+	{
+	    UINT32 aifsn, slottime;
+
+	    RTMP_IO_READ32(pAd, BKOFF_SLOT_CFG, &slottime);
+	    slottime &= 0x000000FF;
+
+	    aifsn = value / slottime;                  
+	    value = value % slottime;
+
+	    RTMP_IO_READ32(pAd, EDCA_AC0_CFG, &data);
+	    data &= 0x0;
+	    data |= (aifsn << 8);
+	    RTMP_IO_WRITE32(pAd, EDCA_AC0_CFG, data);
+
+	    RTMP_IO_READ32(pAd, EDCA_AC1_CFG, &data);
+	    data &= 0x0;
+	    data |= (aifsn << 8);
+	    RTMP_IO_WRITE32(pAd, EDCA_AC1_CFG, data);
+
+	    RTMP_IO_READ32(pAd, EDCA_AC2_CFG, &data);
+	    data &= 0x0;
+	    data |= (aifsn << 8);
+	    RTMP_IO_WRITE32(pAd, EDCA_AC2_CFG, data);
+
+	    RTMP_IO_READ32(pAd, EDCA_AC3_CFG, &data);
+	    data &= 0x0;
+	    data |= (aifsn << 8);
+	    RTMP_IO_WRITE32(pAd, EDCA_AC3_CFG, data);
+	}
+
+	data = (value & 0xFFFF0000) | value | (value << 8);
+	RTMP_IO_WRITE32(pAd, XIFS_TIME_CFG, data);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_IPG_Proc (IPG = %u)\n", pAd->ate.IPG));
+	DBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_IPG_Proc Success\n"));
+
+
+	return TRUE;
+}
+
+
+/* 
+==========================================================================
+    Description:
+        Set ATE payload pattern for TxFrame
+        
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+==========================================================================
+*/
+INT	Set_ATE_Payload_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	PSTRING				value;
+
+	value = arg;
+
+	/* only one octet acceptable */	
+	if (strlen(value) != 2)  
+		return FALSE;
+
+	AtoH(value, &(pAd->ate.Payload), 1);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_Payload_Proc (repeated pattern = 0x%2x)\n", pAd->ate.Payload));
+	DBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_Payload_Proc Success\n"));
+
+	
+	return TRUE;
+}
+
+
+INT	Set_ATE_Show_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	PSTRING Mode_String = NULL;
+	PSTRING TxMode_String = NULL;
+
+	switch (pAd->ate.Mode)
+	{
+#ifdef CONFIG_RT2880_ATE_CMD_NEW
+		case (fATE_IDLE):
+			Mode_String = "ATESTART";
+			break;
+		case (fATE_EXIT):
+			Mode_String = "ATESTOP";
+			break;
+#else
+		case (fATE_IDLE):
+			Mode_String = "APSTOP";
+			break;
+		case (fATE_EXIT):
+			Mode_String = "APSTART";
+			break;
+#endif /* CONFIG_RT2880_ATE_CMD_NEW */
+		case ((fATE_TX_ENABLE)|(fATE_TXCONT_ENABLE)):
+			Mode_String = "TXCONT";
+			break;
+		case ((fATE_TX_ENABLE)|(fATE_TXCARR_ENABLE)):
+			Mode_String = "TXCARR";
+			break;
+		case ((fATE_TX_ENABLE)|(fATE_TXCARRSUPP_ENABLE)):
+			Mode_String = "TXCARS";
+			break;
+		case (fATE_TX_ENABLE):
+			Mode_String = "TXFRAME";
+			break;
+		case (fATE_RX_ENABLE):
+			Mode_String = "RXFRAME";
+			break;
+		default:
+		{
+			Mode_String = "Unknown ATE mode";
+			DBGPRINT(RT_DEBUG_OFF, ("ERROR! Unknown ATE mode!\n"));
+			break;
+		}
+	}	
+	DBGPRINT(RT_DEBUG_OFF, ("ATE Mode=%s\n", Mode_String));
+#ifdef RT3350
+	if (IS_RT3350(pAd))
+		DBGPRINT(RT_DEBUG_OFF, ("PABias=%u\n", pAd->ate.PABias));
+#endif /* RT3350 */
+	DBGPRINT(RT_DEBUG_OFF, ("TxPower0=%d\n", pAd->ate.TxPower0));
+	DBGPRINT(RT_DEBUG_OFF, ("TxPower1=%d\n", pAd->ate.TxPower1));
+#ifdef DOT11N_SS3_SUPPORT
+	DBGPRINT(RT_DEBUG_OFF, ("TxPower2=%d\n", pAd->ate.TxPower2));
+#endif /* DOT11N_SS3_SUPPORT */
+	DBGPRINT(RT_DEBUG_OFF, ("TxAntennaSel=%d\n", pAd->ate.TxAntennaSel));
+	DBGPRINT(RT_DEBUG_OFF, ("RxAntennaSel=%d\n", pAd->ate.RxAntennaSel));
+	DBGPRINT(RT_DEBUG_OFF, ("BBPCurrentBW=%u\n", pAd->ate.TxWI.BW));
+	DBGPRINT(RT_DEBUG_OFF, ("GI=%u\n", pAd->ate.TxWI.ShortGI));
+	DBGPRINT(RT_DEBUG_OFF, ("MCS=%u\n", pAd->ate.TxWI.MCS));
+
+	switch (pAd->ate.TxWI.PHYMODE)
+	{
+		case 0:
+			TxMode_String = "CCK";
+			break;
+		case 1:
+			TxMode_String = "OFDM";
+			break;
+		case 2:
+			TxMode_String = "HT-Mix";
+			break;
+		case 3:
+			TxMode_String = "GreenField";
+			break;
+		default:
+		{
+			TxMode_String = "Unknown TxMode";
+			DBGPRINT(RT_DEBUG_OFF, ("ERROR! Unknown TxMode!\n"));
+			break;
+		}
+	}
+	
+	DBGPRINT(RT_DEBUG_OFF, ("TxMode=%s\n", TxMode_String));
+	DBGPRINT(RT_DEBUG_OFF, ("Addr1=%02x:%02x:%02x:%02x:%02x:%02x\n",
+		pAd->ate.Addr1[0], pAd->ate.Addr1[1], pAd->ate.Addr1[2], pAd->ate.Addr1[3], pAd->ate.Addr1[4], pAd->ate.Addr1[5]));
+	DBGPRINT(RT_DEBUG_OFF, ("Addr2=%02x:%02x:%02x:%02x:%02x:%02x\n",
+		pAd->ate.Addr2[0], pAd->ate.Addr2[1], pAd->ate.Addr2[2], pAd->ate.Addr2[3], pAd->ate.Addr2[4], pAd->ate.Addr2[5]));
+	DBGPRINT(RT_DEBUG_OFF, ("Addr3=%02x:%02x:%02x:%02x:%02x:%02x\n",
+		pAd->ate.Addr3[0], pAd->ate.Addr3[1], pAd->ate.Addr3[2], pAd->ate.Addr3[3], pAd->ate.Addr3[4], pAd->ate.Addr3[5]));
+	DBGPRINT(RT_DEBUG_OFF, ("Channel=%u\n", pAd->ate.Channel));
+	DBGPRINT(RT_DEBUG_OFF, ("TxLength=%u\n", pAd->ate.TxLength));
+	DBGPRINT(RT_DEBUG_OFF, ("TxCount=%u\n", pAd->ate.TxCount));
+	DBGPRINT(RT_DEBUG_OFF, ("RFFreqOffset=%u\n", pAd->ate.RFFreqOffset));
+	DBGPRINT(RT_DEBUG_OFF, ("bAutoTxAlc=%d\n", pAd->ate.bAutoTxAlc));
+	DBGPRINT(RT_DEBUG_OFF, ("IPG=%u\n", pAd->ate.IPG));
+	DBGPRINT(RT_DEBUG_OFF, ("Payload=0x%02x\n", pAd->ate.Payload));
+#ifdef TXBF_SUPPORT
+	DBGPRINT(RT_DEBUG_OFF, ("bTxBF=%d\n", pAd->ate.bTxBF));
+#endif /* TXBF_SUPPORT */
+
+	DBGPRINT(RT_DEBUG_OFF, ("Set_ATE_Show_Proc Success\n"));
+	return TRUE;
+}
+
+
+INT	Set_ATE_Help_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+#ifdef CONFIG_RT2880_ATE_CMD_NEW
+	DBGPRINT(RT_DEBUG_OFF, ("ATE=ATESTART, ATESTOP, TXCONT, TXCARR, TXCARS, TXFRAME, RXFRAME\n"));
+#else
+	DBGPRINT(RT_DEBUG_OFF, ("ATE=APSTOP, APSTART, TXCONT, TXCARR, TXCARS, TXFRAME, RXFRAME\n"));
+#endif /* CONFIG_RT2880_ATE_CMD_NEW */
+#ifdef HW_ANTENNA_DIVERSITY_SUPPORT
+	DBGPRINT(RT_DEBUG_OFF, ("ATE=ANTDIVCBA\n"));
+#endif /* HW_ANTENNA_DIVERSITY_SUPPORT */ 
+	DBGPRINT(RT_DEBUG_OFF, ("ATEDA\n"));
+	DBGPRINT(RT_DEBUG_OFF, ("ATESA\n"));
+	DBGPRINT(RT_DEBUG_OFF, ("ATEBSSID\n"));
+	DBGPRINT(RT_DEBUG_OFF, ("ATECHANNEL, range:0~14(unless A band !)\n"));
+	DBGPRINT(RT_DEBUG_OFF, ("ATETXPOW0, set power level of antenna 1.\n"));
+	DBGPRINT(RT_DEBUG_OFF, ("ATETXPOW1, set power level of antenna 2.\n"));
+#ifdef DOT11N_SS3_SUPPORT
+	DBGPRINT(RT_DEBUG_OFF, ("ATETXPOW2, set power level of antenna 3.\n"));
+	DBGPRINT(RT_DEBUG_OFF, ("ATETXANT, set TX antenna. 0:all, 1:antenna one, 2:antenna two, 3:antenna three.\n"));
+#else
+	DBGPRINT(RT_DEBUG_OFF, ("ATETXANT, set TX antenna. 0:all, 1:antenna one, 2:antenna two.\n"));
+#endif /* DOT11N_SS3_SUPPORT */
+	DBGPRINT(RT_DEBUG_OFF, ("ATERXANT, set RX antenna.0:all, 1:antenna one, 2:antenna two, 3:antenna three.\n"));
+#ifdef RT3350
+	if (IS_RT3350(pAd))
+		DBGPRINT(RT_DEBUG_OFF, ("ATEPABIAS, set power amplifier bias for EVM, range 0~15\n"));
+#endif /* RT3350 */
+#ifdef RTMP_RF_RW_SUPPORT
+	DBGPRINT(RT_DEBUG_OFF, ("ATETXFREQOFFSET, set frequency offset, range 0~95\n"));
+#else
+	DBGPRINT(RT_DEBUG_OFF, ("ATETXFREQOFFSET, set frequency offset, range 0~63\n"));
+#endif /* RTMP_RF_RW_SUPPORT */
+	DBGPRINT(RT_DEBUG_OFF, ("ATETXBW, set BandWidth, 0:20MHz, 1:40MHz.\n"));
+	DBGPRINT(RT_DEBUG_OFF, ("ATETXLEN, set Frame length, range 24~%d\n", (MAX_FRAME_SIZE - 34/* == 2312 */)));
+	DBGPRINT(RT_DEBUG_OFF, ("ATETXCNT, set how many frame going to transmit.\n"));
+	DBGPRINT(RT_DEBUG_OFF, ("ATETXMCS, set MCS, reference to rate table.\n"));
+	DBGPRINT(RT_DEBUG_OFF, ("ATETXMODE, set Mode 0:CCK, 1:OFDM, 2:HT-Mix, 3:GreenField, reference to rate table.\n"));
+	DBGPRINT(RT_DEBUG_OFF, ("ATETXGI, set GI interval, 0:Long, 1:Short\n"));
+	DBGPRINT(RT_DEBUG_OFF, ("ATERXFER, 0:disable Rx Frame error rate. 1:enable Rx Frame error rate.\n"));
+	DBGPRINT(RT_DEBUG_OFF, ("ATERRF, show all RF registers.\n"));
+#ifndef RTMP_RF_RW_SUPPORT
+	DBGPRINT(RT_DEBUG_OFF, ("ATEWRF1, set RF1 register.\n"));
+	DBGPRINT(RT_DEBUG_OFF, ("ATEWRF2, set RF2 register.\n"));
+	DBGPRINT(RT_DEBUG_OFF, ("ATEWRF3, set RF3 register.\n"));
+	DBGPRINT(RT_DEBUG_OFF, ("ATEWRF4, set RF4 register.\n"));
+#endif /* !RTMP_RF_RW_SUPPORT */
+	DBGPRINT(RT_DEBUG_OFF, ("ATELDE2P, load EEPROM from .bin file.\n"));
+	DBGPRINT(RT_DEBUG_OFF, ("ATERE2P, display all EEPROM content.\n"));
+	DBGPRINT(RT_DEBUG_OFF, ("ATEAUTOALC, enable ATE auto Tx alc (Tx auto level control).\n"));
+	DBGPRINT(RT_DEBUG_OFF, ("ATEIPG, set ATE Tx frame IPG.\n"));
+	DBGPRINT(RT_DEBUG_OFF, ("ATEPAYLOAD, set ATE payload pattern for TxFrame.\n"));
+#ifdef TXBF_SUPPORT
+	DBGPRINT(RT_DEBUG_OFF, ("ATETXBF, enable ATE Tx bean forming.\n"));
+#endif /* TXBF_SUPPORT */ 
+#ifdef HW_ANTENNA_DIVERSITY_SUPPORT
+	DBGPRINT(RT_DEBUG_OFF, ("ATEANTDIV, enable hardware antenna diversity.\n"));
+#endif /* HW_ANTENNA_DIVERSITY_SUPPORT */
+	DBGPRINT(RT_DEBUG_OFF, ("ATESHOW, display all parameters of ATE.\n"));
+	DBGPRINT(RT_DEBUG_OFF, ("ATEHELP, online help.\n"));
+
+	return TRUE;
+}
+
+
+#ifdef RTMP_INTERNAL_TX_ALC
+#if defined(RT3370) || defined(RT3390) || defined(RT3350) || defined(RT3352)
+CHAR RTUSBInsertTssi(UCHAR InChannel, UCHAR Channel0, UCHAR Channel1,CHAR Tssi0, CHAR Tssi1)
+{
+	CHAR     InTssi;
+	CHAR     ChannelDelta, InChannelDelta;
+	CHAR     TssiDelta;
+
+	ChannelDelta = Channel1 - Channel0;
+	InChannelDelta = InChannel - Channel0;
+	TssiDelta = Tssi1 - Tssi0;
+
+	InTssi = Tssi0 + ((InChannelDelta * TssiDelta) / ChannelDelta);
+
+	return InTssi;
+}
+#endif /* defined(RT3370) || defined(RT3390) || defined(RT3350) || defined(RT3352) */
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+#ifdef HW_ANTENNA_DIVERSITY_SUPPORT
+static  INT DO_RACFG_CMD_DIV_ANTENNA_CALIBRATION(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN  struct ate_racfghdr *pRaCfg)
+{
+	DBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_DIV_ANTENNA_CALIBRATION\n"));
+
+	pAd->ate.bQARxStart = TRUE;
+	Set_ATE_Proc(pAd, "ANTDIVCBA");
+
+	ResponseToGUI(pRaCfg, wrq, sizeof(pRaCfg->status), NDIS_STATUS_SUCCESS);
+
+	return NDIS_STATUS_SUCCESS;
+}	
+
+
+static NDIS_STATUS ANTDIVCBA(
+	IN PRTMP_ADAPTER pAd)
+{
+	int i;
+	UINT8 BBPValue = 0, RFValue = 0;
+	UINT8 rf_r29;
+
+	/* Step 1 */
+	/* RF_R29 bit7:6 = 11 */
+	ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R29, &RFValue);
+	RFValue |= 0xC0;			
+	ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R29, RFValue);
+
+	/* BBP_R47 bit7=1 */
+	ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BBPValue);
+	BBPValue |= 0x80;
+	ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R47, BBPValue);
+	
+	/* BBP_R150 = 0x81 */
+	BBPValue = 0x81;			
+	ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R150, BBPValue);
+
+	/* clear BBP_R154 bit4 */
+	ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R154, &BBPValue);
+	BBPValue &= 0xef; /* clear bit4 */
+	ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R154, BBPValue);
+	/* end Step 1 */
+
+	/* Step 2 */
+	rf_r29 = 0x3; /* bit7:6 = 11 */ 
+	while ((rf_r29 == 0x3) || (rf_r29 == 0x2))
+	{
+		/* Step 3 */
+		/* main antenna: BBP_R152 bit7=1 */
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R152, &BBPValue);
+		BBPValue |= 0x80;
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R152, BBPValue);
+
+		/* BBP_R60 bit6=1 */
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R60, &BBPValue);
+		BBPValue |= 0x40;
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R60, BBPValue);
+
+		for (i = 0; i < 100; i++)
+		{
+			/* check if BBP_R60[5:0] < 2 */
+			ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R60, &BBPValue);
+			BBPValue &= 0x3f; /* clear bit7:6 */
+			if (BBPValue >= 2)
+			{
+				rf_r29 = rf_r29 - 1;
+				ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R29, &RFValue);
+				RFValue |= (rf_r29 << 6);			
+				ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R29, RFValue);
+				break;
+			}
+			RtmpOsMsDelay(1);
+		}
+
+		if (i != 100)
+			continue;
+			
+		/* Step 4 */
+		/* main antenna: BBP_R152 bit7=0 */
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R152, &BBPValue);
+		BBPValue &= 0x7f;
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R152, BBPValue);
+
+		/* BBP_R60 bit6=0 */
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R60, &BBPValue);
+		BBPValue &= 0xbf;
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R60, BBPValue);
+		for (i = 0; i < 100; i++)
+		{
+			/* check if BBP_R60[5:0] < 2 */
+			ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R60, &BBPValue);
+			BBPValue &= 0x3f; /* clear bit7:6 */
+			if (BBPValue >= 2)
+			{
+				rf_r29 = rf_r29 - 1;
+				ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R29, &RFValue);
+				RFValue |= (rf_r29 << 6);			
+				ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R29, RFValue);
+				break;; /* goto Step 2 */
+			}
+			RtmpOsMsDelay(1);
+		}
+
+		if (i != 100)
+			continue;
+			
+		/* goto Step 5 */	
+		break;
+	}
+
+	/* Step 5 */
+	RT28xx_EEPROM_WRITE16(pAd, EEPROM_RSSI_GAIN, rf_r29);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+INT Set_ATE_DIV_ANTENNA_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg)
+{
+	UINT32 value;
+
+	value = simple_strtol(arg, 0, 10);
+	if (value == 0)
+	{
+		/* enable hardware antenna diversity */	
+		UINT8 BBPValue = 0, RFValue = 0;
+
+		DBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_DIV_ANTENNA_Proc: enable hardware antenna diversity\n"));
+		/* RF_R29 bit7:6 = 11 */
+		ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R29, &RFValue);
+		RFValue |= 0xC0;			
+		ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RF_R29, RFValue);
+		ATE_RF_IO_READ8_BY_REG_ID(pAd, RF_R29, &RFValue);
+
+		/* BBP_R47 bit7=1 */
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BBPValue);
+		BBPValue |= 0x80;
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R47, BBPValue);
+	
+		BBPValue = 0xbe;			
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R150, BBPValue);
+		BBPValue = 0xb0;			
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R151, BBPValue);
+		BBPValue = 0x23;			
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R152, BBPValue);
+		BBPValue = 0x3a;			
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R153, BBPValue);
+		BBPValue = 0x10;			
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R154, BBPValue);
+		BBPValue = 0x3b;			
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R155, BBPValue);
+		BBPValue = 0x04;			
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R253, BBPValue);
+	}
+	else if (value == 1)
+	{
+		/* fix to main antenna */
+		UINT8 BBPValue = 0;
+
+		DBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_DIV_ANTENNA_Proc: fix to main antenna\n"));
+
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R150, &BBPValue);
+		BBPValue &= 0x7f; /* clear bit7 */
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R150, BBPValue);
+
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R151, &BBPValue);
+		BBPValue &= 0x7f; /* clear bit7 */
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R151, BBPValue);
+
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R154, &BBPValue);
+		BBPValue &= 0xef; /* clear bit4 */
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R154, BBPValue);
+
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R152, &BBPValue);
+
+		/* main antenna: BBP_R152 bit7=1 */
+		BBPValue |= 0x80;
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R152, BBPValue);
+	}
+	else
+	{
+		/* fix to aux antenna */
+		UINT8 BBPValue = 0;
+
+		DBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_DIV_ANTENNA_Proc: fix to aux antenna\n"));
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R150, &BBPValue);
+		BBPValue &= 0x7f; /* clear bit7 */
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R150, BBPValue);
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R151, &BBPValue);
+		BBPValue &= 0x7f; /* clear bit7 */
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R151, BBPValue);
+
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R154, &BBPValue);
+		BBPValue &= 0xef; /* clear bit4 */
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R154, BBPValue);
+
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R152, &BBPValue);
+		/* aux antenna: BBP_R152 bit7=0 */
+		BBPValue &= 0x7f;
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R152, BBPValue);
+	}
+
+	return TRUE;
+}
+#endif /* HW_ANTENNA_DIVERSITY_SUPPORT */
+
+#ifdef RTMP_INTERNAL_TX_ALC
+#ifdef RT5350
+extern UCHAR CCK_Rate2MCS(
+	IN PRTMP_ADAPTER		pAd);
+
+extern UCHAR OFDM_Rate2MCS(
+	IN PRTMP_ADAPTER		pAd);
+
+
+
+INT ATE_GET_TSSI(
+	IN PRTMP_ADAPTER pAd,
+	IN	INT	MODE,
+	IN	INT	MCS,
+	OUT PUCHAR  pBbpR49)
+{
+	UCHAR		BbpR47=0;
+	UCHAR		TssiInfo0=0;
+	UCHAR		TssiInfo1=0;
+	UCHAR		TssiInfo2=0;
+	UCHAR		i;
+
+	if (IS_RT5350(pAd))
+	{
+		/* clear TSSI_UPDATE_REQ first */
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BbpR47);
+		BbpR47 &= ~0x7;
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R47, BbpR47);
+
+		/* write 1 to enable TSSI_INFO update */
+		ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BbpR47);
+		BbpR47 |= (1<<2); /* TSSI_UPDATE_REQ */
+		ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R47, BbpR47);
+		RtmpOsMsDelay(100);
+
+		/* Get TSSI_INFO0 = tssi_report[7:0] */
+		for (i = 0; i < 100; i++)
+		{
+			ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BbpR47);
+			if (!(BbpR47 & (1 << 2)))
+			{ 
+				/* self-cleared when the TSSI_INFO is updated */
+				/* Get TSSI_INFO0 = tssi_report[7:0] */
+				ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BbpR47);
+				BbpR47 &= ~0x3;
+				ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R47, BbpR47);
+				ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R49, &TssiInfo0);
+				
+				/* If TSSI reading is not within 0x0~0x7C, then treated it as 0. */
+				if (TssiInfo0 > 0x7C)
+				{
+					DBGPRINT(RT_DEBUG_TRACE, ("TSSI: BBP_R49=%X is native value\n", TssiInfo0));
+					*pBbpR49 = TssiInfo0 = 0;
+					continue;
+				}
+				else
+				{
+					*pBbpR49 = TssiInfo0;
+				}
+		
+				/* Get TSSI_INFO1 = tssi_report[15:8] */
+				ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BbpR47);
+				BbpR47 &= ~0x3;
+				BbpR47 |= 1;
+				ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R47, BbpR47);
+				ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R49, &TssiInfo1);
+
+				if ((TssiInfo1 & 0x3) != MODE)
+					continue;
+
+				switch (TssiInfo1 & 0x3)
+				{
+					UCHAR pkt_MCS;
+
+					case MODE_CCK: /* CCK */
+						pkt_MCS = CCK_Rate2MCS(pAd);
+						DBGPRINT(RT_DEBUG_TRACE, ("CCK: MCS = %d\n", pkt_MCS));
+						if (MCS != pkt_MCS)
+							continue;
+						break;
+					case MODE_OFDM: /* OFDM */
+						pkt_MCS = OFDM_Rate2MCS(pAd);
+						DBGPRINT(RT_DEBUG_TRACE, ("OFDM: MCS = %d\n", pkt_MCS));
+						if (MCS != pkt_MCS)
+							continue;
+						break;
+					case MODE_HTMIX: /* HT */
+						/* Get TSSI_INFO2 = tssi_report[23:16] */
+						ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R47, &BbpR47);
+						BbpR47 &= ~0x3;
+						BbpR47 |= 1<<1;
+						ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R47, BbpR47);
+		
+						ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R49, &TssiInfo2);
+			    			pkt_MCS = TssiInfo2 & 0x7F; /* tssi_report[22:16]=MCS */
+						DBGPRINT(RT_DEBUG_TRACE, ("HT: MCS = %d\n", pkt_MCS));
+						if (MCS != pkt_MCS) /* tssi_report[22:16]=MCS */
+							continue;
+						break;
+				}
+				break;
+			}
+		}
+
+	}
+	return TRUE;
+}
+
+extern VOID	RTMPReadChannelPwr(
+	IN	PRTMP_ADAPTER	pAd);
+
+extern INT32 TSSIDelta2PowDelta(
+	UINT32 TSSI_x_10000, 
+	UINT32 TSSI_ref);
+
+
+INT RT5350_Set_ATE_TSSI_CALIBRATION_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg)
+{    
+	INT 	i;
+	USHORT	EEPData, EEPData2;                              
+	UINT32	TSSI_x_10000[15];
+	INT32	TSSI_power_delta[15];
+	UCHAR	TSSI_CH1, TSSI_CH7, TSSI_CH13;
+	INT	TSSI_CH1_10000, TSSI_CH7_10000, TSSI_CH13_10000;
+	TssiDeltaInfo TSSI_x_h, TSSI_x_l;
+
+	if (!IS_RT5350(pAd))                  
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("Not support TSSI calibration!!!\n"));
+		return (FALSE);
+	}
+	else
+	{                              
+		UCHAR	BSSID_ADDR[MAC_ADDR_LEN] = {0x11, 0x22, 0x33, 0x44, 0x55, 0x66};
+
+		pAd->TxPowerCtrl.bInternalTxALC = TRUE;
+		RT5350_InitDesiredTSSITable(pAd);
+
+		/* update EEPROM power value to pAd struct */
+		RTMPReadChannelPwr(pAd);
+
+		/* start TX at 54Mbps Channel 1 */
+		NdisZeroMemory(&pAd->ate, sizeof(struct _ATE_INFO));
+		pAd->ate.TxCount = 100000;
+		pAd->ate.TxLength = 1024;
+		pAd->ate.TxWI.PHYMODE= 1; 	/* MODE_OFDM */
+		pAd->ate.TxWI.MCS = 7; 		/* 54Mbps */
+		pAd->ate.TxWI.BW = 0; 		/* 20MHz */
+		COPY_MAC_ADDR(pAd->ate.Addr1, BROADCAST_ADDR);
+		COPY_MAC_ADDR(pAd->ate.Addr2, pAd->PermanentAddress);
+		COPY_MAC_ADDR(pAd->ate.Addr3, BSSID_ADDR);                     
+
+		/* read frequency offset from EEPROM */                         
+		RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, EEPData);
+		pAd->ate.RFFreqOffset = (UCHAR) (EEPData & 0xff);
+
+		/* set channel 1 power value calibrated DAC */
+		pAd->ate.TxPower0 = pAd->TxPower[0].Power;
+		pAd->ate.Channel = 1;
+
+		Set_ATE_Proc(pAd, "TXFRAME"); 
+		RTMPusecDelay(200000);	
+		ATE_GET_TSSI(pAd, MODE_OFDM, 7, &TSSI_CH1);
+		DBGPRINT(RT_DEBUG_TRACE, ("TSSI CALIBRATION: Channel[1] TSSI=%x\n", TSSI_CH1)); 
+
+		if (TSSI_CH1 < 0x18)
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("TSSI CALIBRATION: Channel[1] TSSI is abnormal, set to 0x18\n")); 
+			TSSI_CH1 = 0x18;
+		}
+
+		if (TSSI_CH1 > 0x33)
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("TSSI CALIBRATION: Channel[1] TSSI is abnormal, set to 0x33\n")); 
+			TSSI_CH1 = 0x33;
+		}
+
+		/* set channel 7 power value calibrated DAC */
+		pAd->ate.TxPower0 = pAd->TxPower[6].Power;
+		pAd->ate.Channel = 7;
+
+		Set_ATE_Proc(pAd, "TXFRAME"); 
+		RTMPusecDelay(200000);	
+		ATE_GET_TSSI(pAd, MODE_OFDM, 7, &TSSI_CH7);
+		DBGPRINT(RT_DEBUG_TRACE, ("TSSI CALIBRATION: Channel[7] TSSI=%x\n", TSSI_CH7)); 
+
+		if (TSSI_CH7 < 0x18)
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("TSSI CALIBRATION: Channel[7] TSSI is abnormal, set to 0x18\n")); 
+			TSSI_CH7 = 0x18;
+		}
+
+		if (TSSI_CH7 > 0x33)
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("TSSI CALIBRATION: Channel[7] TSSI is abnormal, set to 0x33\n")); 
+			TSSI_CH7 = 0x33;
+		}
+
+		/* set channel 13 power value calibrated DAC */ 
+		pAd->ate.TxPower0 = pAd->TxPower[12].Power;
+		pAd->ate.Channel = 13;
+
+		Set_ATE_Proc(pAd, "TXFRAME"); 
+		RTMPusecDelay(200000);	
+		ATE_GET_TSSI(pAd, MODE_OFDM, 7, &TSSI_CH13);
+		DBGPRINT(RT_DEBUG_TRACE, ("TSSI CALIBRATION: Channel[13] TSSI=%x\n", TSSI_CH13)); 
+
+		if (TSSI_CH13 < 0x18)
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("TSSI CALIBRATION: Channel[13] TSSI is abnormal, set to 0x18\n")); 
+			TSSI_CH13 = 0x18;
+		}
+
+		if (TSSI_CH13 > 0x33)
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("TSSI CALIBRATION: Channel[13] TSSI is abnormal, set to 0x33\n")); 
+			TSSI_CH13 = 0x33;
+		}
+
+		TSSI_CH1_10000 =  TSSI_CH1 * 10000;
+		TSSI_CH7_10000 =  TSSI_CH7 * 10000;
+		TSSI_CH13_10000 =  TSSI_CH13 * 10000;
+		TSSI_x_10000[1] = TSSI_CH1_10000;
+		TSSI_x_10000[7] = TSSI_CH7_10000;
+		TSSI_x_10000[13] = TSSI_CH13_10000;
+
+		for (i = 2; i < 7; i++)
+			TSSI_x_10000[i] = TSSI_CH1_10000 + (i - 1) * ((TSSI_CH7_10000 - TSSI_CH1_10000) / (7 - 1));
+
+		for (i = 8; i <= 14; i++) 
+			TSSI_x_10000[i] = TSSI_CH7_10000 + (i - 7) * ((TSSI_CH13_10000 - TSSI_CH7_10000) / (13 - 7));
+
+		for (i = 1; i <= 14; i++)
+		{
+			TSSI_power_delta[i] = TSSIDelta2PowDelta(TSSI_x_10000[i], TSSI_CH7);	
+			DBGPRINT(RT_DEBUG_TRACE, ("TSSI CALIBRATION: Channel[%d] TSSI_x=%d\n", i, TSSI_x_10000[i])); 
+			DBGPRINT(RT_DEBUG_TRACE, ("TSSI CALIBRATION: Channel[%d] TSSI_power_delta=%d\n", i, TSSI_power_delta[i])); 
+		}
+		
+		/* 2.4G internal ALC reference value (channel 7) */
+		EEPData = 0x0 | (TSSI_CH7_10000 / 10000);
+		RT28xx_EEPROM_WRITE16(pAd, EEPROM_TSSI_REF_OFFSET, EEPData);
+		
+		/* Channel 2 TSSI delta:Channel 1 TSSI delta */
+		TSSI_x_l.delta = TSSI_power_delta[1];
+		TSSI_x_h.delta = TSSI_power_delta[2];
+		EEPData = TSSI_x_h.delta << 4 | TSSI_x_l.delta;
+		RT28xx_EEPROM_WRITE16(pAd, EEPROM_TSSI_DELTA_CH1_CH2, EEPData);
+
+		/* Channel 4 TSSI delta:Channel 3 TSSI delta */
+		TSSI_x_l.delta = TSSI_power_delta[3];
+		TSSI_x_h.delta = TSSI_power_delta[4];
+		EEPData = TSSI_x_h.delta << 4 | TSSI_x_l.delta;
+		RT28xx_EEPROM_WRITE16(pAd, EEPROM_TSSI_DELTA_CH3_CH4, EEPData);
+
+		/* Channel 6 TSSI delta:Channel 5 TSSI delta */
+		TSSI_x_l.delta = TSSI_power_delta[5];
+		TSSI_x_h.delta = TSSI_power_delta[6];
+		EEPData = TSSI_x_h.delta << 4 | TSSI_x_l.delta;
+		RT28xx_EEPROM_WRITE16(pAd, EEPROM_TSSI_DELTA_CH5_CH6, EEPData);
+
+		/* Channel 8 TSSI delta:Channel 7 TSSI delta */
+		TSSI_x_l.delta = TSSI_power_delta[7];
+		TSSI_x_h.delta = TSSI_power_delta[8];
+		EEPData = TSSI_x_h.delta << 4 | TSSI_x_l.delta;
+		RT28xx_EEPROM_WRITE16(pAd, EEPROM_TSSI_DELTA_CH7_CH8, EEPData);
+
+		/* Channel 10 TSSI delta:Channel 9 TSSI delta */
+		TSSI_x_l.delta = TSSI_power_delta[9];
+		TSSI_x_h.delta = TSSI_power_delta[10];
+		EEPData = TSSI_x_h.delta << 4 | TSSI_x_l.delta;
+		RT28xx_EEPROM_WRITE16(pAd, EEPROM_TSSI_DELTA_CH9_CH10, EEPData);
+
+		/* Channel 12 TSSI delta:Channel 11 TSSI delta */
+		TSSI_x_l.delta = TSSI_power_delta[11];
+		TSSI_x_h.delta = TSSI_power_delta[12];
+		EEPData = TSSI_x_h.delta << 4 | TSSI_x_l.delta;
+		RT28xx_EEPROM_WRITE16(pAd, EEPROM_TSSI_DELTA_CH11_CH12, EEPData);
+
+		/* Channel 14 TSSI delta:Channel 13 TSSI delta */
+		TSSI_x_l.delta = TSSI_power_delta[13];
+		TSSI_x_h.delta = TSSI_power_delta[14];
+
+		RT28xx_EEPROM_READ16(pAd, EEPROM_TSSI_DELTA_CH13_CH14 + 1, EEPData2);
+		EEPData = (EEPData2 << 8) | (TSSI_x_h.delta << 4) | TSSI_x_l.delta;
+		RT28xx_EEPROM_WRITE16(pAd,  EEPROM_TSSI_DELTA_CH13_CH14, EEPData);
+	}
+
+	return TRUE;
+}
+#endif /* RT5350 */
+
+
+INT Set_ATE_TSSI_CALIBRATION_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg)
+{    
+	RTMP_CHIP_ATE_TSSI_CALIBRATION(pAd, arg);
+}
+
+
+/* NOT tested yet */
+INT Set_ATE_TSSI_CALIBRATION_EX_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg)
+{    
+	UCHAR		BbpData = 0, RFValue, RF27Value, RF28Value, BBP49Value;
+	CHAR		TssiRefPerChannel[14], TssiDeltaPerChannel[14];
+	USHORT		EEPData;
+	USHORT		ChannelPower;
+	UCHAR		BSSID_ADDR[MAC_ADDR_LEN] = {0x11, 0x22, 0x33, 0x44, 0x55, 0x66};
+	UCHAR		CurrentChannel;
+	
+	RTMP_CHIP_ATE_TSSI_CALIBRATION_EXTEND(pAd, arg);
+}
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+
+#ifdef RTMP_TEMPERATURE_COMPENSATION
+INT Set_ATE_READ_EXTERNAL_TSSI_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg)
+{
+	RTMP_CHIP_ATE_READ_EXTERNAL_TSSI(pAd, arg);
+}
+#endif /* RTMP_TEMPERATURE_COMPENSATION */
+
+
+#ifdef RT33xx
+static VOID TX_EVM_CAL_GET(
+	IN PRTMP_ADAPTER pAd,
+	OUT PUINT8 pRfReg,
+	OUT PUINT8 pBitMap,
+	OUT PUINT8 pRange,
+	OUT PUINT8 pShift)
+{
+	UINT16 Value;                              
+ 	UINT loop;
+ 
+	do
+ 	{
+		RT28xx_EEPROM_READ16(pAd, 0x012c,  Value);
+		if (Value == 0xffff)
+		{
+			DBGPRINT(RT_DEBUG_OFF, ("Invalid value of TxEvmCal (%x)\n", Value));
+			break;
+		}
+ 
+		*pRfReg = (UINT8) ((Value & 0xff00) >> 8);
+		*pBitMap = (UINT8) (Value & 0x00ff);
+ 
+		*pRange = *pBitMap;
+		*pShift = 0;
+
+		for (loop = 0; loop<8; loop++)
+		{
+	 		if ((*pRange & (0x01 << loop)) == 0)
+				(*pShift)++;
+			else
+				break;
+		}
+		*pRange = (*pRange) >> (*pShift);
+ 
+	} while (0);
+}
+
+ 
+INT Set_ATE_TX_EVM_CALIBRATION_Show_Proc(
+	IN PRTMP_ADAPTER pAd,
+	IN PSTRING   arg)
+{
+	UINT8 RfReg;
+	UINT8 BitMap;
+	UINT8 Range;
+	UINT8 Shift;
+ 
+	TX_EVM_CAL_GET(pAd, &RfReg, &BitMap, &Range, &Shift);
+	DBGPRINT(RT_DEBUG_OFF, ("RfReg=%d, Range=%d, BitMap=%x, Shift=%d\n", RfReg, Range, BitMap, Shift));
+ 
+	return TRUE; 
+}
+
+ 
+INT Set_ATE_TX_EVM_CALIBRATION_Proc(
+	IN PRTMP_ADAPTER pAd,
+	IN PSTRING   arg)
+{
+	UINT8 RfReg;
+	UINT8 BitMap;
+	UINT8 Range;
+	UINT8 Shift;
+	LONG Value;
+	UCHAR RFValue;
+	
+ 
+	TX_EVM_CAL_GET(pAd, &RfReg, &BitMap, &Range, &Shift);
+	Value = simple_strtol(arg, 0, 10);
+ 
+	if (Value > Range)
+	{
+		DBGPRINT(RT_DEBUG_OFF, ("Invalid Range value(%ld), Range=%d\n", Value, Range));
+		return TRUE;
+	}
+	
+ 	/* write to coresponding Rf register */
+	ATE_RF_IO_READ8_BY_REG_ID(pAd, RfReg, &RFValue);
+	RFValue &= ~(BitMap);
+	RFValue |= (Value << Shift);
+	ATE_RF_IO_WRITE8_BY_REG_ID(pAd, RfReg, RFValue);
+ 
+	return TRUE;
+}
+
+ 
+INT Set_ATE_TX_EVM_CALIBRATION_Fill_Proc(
+	IN PRTMP_ADAPTER pAd,
+	IN PSTRING   arg)
+{
+	UINT8 RfReg;
+	UINT8 BitMap;
+	UINT8 Range;
+	UINT8 Shift;
+	LONG Value;
+	UINT EPRomOffset;
+	UINT16 TargetValue;
+ 
+	TX_EVM_CAL_GET(pAd, &RfReg, &BitMap, &Range, &Shift);
+ 
+	switch (RfReg)
+	{
+		case RF_R09:
+			EPRomOffset = EEPROM_EVM_RF09;
+			break;
+		case RF_R19:
+			EPRomOffset = EEPROM_EVM_RF19;
+			break;
+		case RF_R21:
+			EPRomOffset = EEPROM_EVM_RF21;
+			break;
+		case RF_R29:
+			EPRomOffset = EEPROM_EVM_RF29;
+			break;
+		default:
+			DBGPRINT(RT_DEBUG_OFF, ("Invalid RfReg(%d)", RfReg));
+			return TRUE;
+	}
+ 
+	TargetValue = simple_strtol(arg, 0, 10); 
+	if (TargetValue > Range)
+	{
+		DBGPRINT(RT_DEBUG_OFF, ("Invalid Range value(%d), Range=%d",TargetValue, Range));
+		return TRUE;
+	}
+ 
+	Value=0;
+	Value=RfReg<<8;
+	ATE_RF_IO_READ8_BY_REG_ID(pAd, RfReg, (PUCHAR)(&Value));
+	Value &= ~(BitMap);
+	Value |= (TargetValue << Shift);
+	RT28xx_EEPROM_WRITE16(pAd, EPRomOffset, Value);
+ 
+	return TRUE; 
+}
+#endif /* RT33xx */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/rt_channel.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/rt_channel.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/rt_channel.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/rt_channel.c	2017-09-23 03:42:49.762675847 +0800
@@ -0,0 +1,1791 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+
+CH_FREQ_MAP CH_HZ_ID_MAP[]=
+		{
+			{1, 2412},
+			{2, 2417},
+			{3, 2422},
+			{4, 2427},
+			{5, 2432},
+			{6, 2437},
+			{7, 2442},
+			{8, 2447},
+			{9, 2452},
+			{10, 2457},
+			{11, 2462},
+			{12, 2467},
+			{13, 2472},
+			{14, 2484},
+
+			/*  UNII */
+			{36, 5180},
+			{40, 5200},
+			{44, 5220},
+			{48, 5240},
+			{52, 5260},
+			{56, 5280},
+			{60, 5300},
+			{64, 5320},
+			{149, 5745},
+			{153, 5765},
+			{157, 5785},
+			{161, 5805},
+			{165, 5825},
+			{167, 5835},
+			{169, 5845},
+			{171, 5855},
+			{173, 5865},
+						
+			/* HiperLAN2 */
+			{100, 5500},
+			{104, 5520},
+			{108, 5540},
+			{112, 5560},
+			{116, 5580},
+			{120, 5600},
+			{124, 5620},
+			{128, 5640},
+			{132, 5660},
+			{136, 5680},
+			{140, 5700},
+						
+			/* Japan MMAC */
+			{34, 5170},
+			{38, 5190},
+			{42, 5210},
+			{46, 5230},
+					
+			/*  Japan */
+			{184, 4920},
+			{188, 4940},
+			{192, 4960},
+			{196, 4980},
+			
+			{208, 5040},	/* Japan, means J08 */
+			{212, 5060},	/* Japan, means J12 */   
+			{216, 5080},	/* Japan, means J16 */
+};
+
+INT	CH_HZ_ID_MAP_NUM = (sizeof(CH_HZ_ID_MAP)/sizeof(CH_FREQ_MAP));
+
+CH_DESC Country_Region0_ChDesc_2GHZ[] =
+{
+	{1, 11, CHANNEL_DEFAULT_PROP},
+	{}
+};
+
+CH_DESC Country_Region1_ChDesc_2GHZ[] =
+{
+	{1, 13, CHANNEL_DEFAULT_PROP},
+	{}
+};
+
+CH_DESC Country_Region2_ChDesc_2GHZ[] =
+{
+	{10, 2, CHANNEL_DEFAULT_PROP},
+	{}
+};
+
+CH_DESC Country_Region3_ChDesc_2GHZ[] =
+{
+	{10, 4, CHANNEL_DEFAULT_PROP},
+	{}
+};
+
+CH_DESC Country_Region4_ChDesc_2GHZ[] =
+{
+	{14, 1, CHANNEL_DEFAULT_PROP},
+	{}
+};
+
+CH_DESC Country_Region5_ChDesc_2GHZ[] =
+{
+	{1, 14, CHANNEL_DEFAULT_PROP},
+	{}
+};
+
+CH_DESC Country_Region6_ChDesc_2GHZ[] =
+{
+	{3, 7, CHANNEL_DEFAULT_PROP},
+	{}
+};
+
+CH_DESC Country_Region7_ChDesc_2GHZ[] =
+{
+	{5, 9, CHANNEL_DEFAULT_PROP},
+	{}
+};
+
+CH_DESC Country_Region31_ChDesc_2GHZ[] =
+{
+	{1, 11, CHANNEL_DEFAULT_PROP},
+	{12, 3, CHANNEL_PASSIVE_SCAN},
+	{}
+};
+
+CH_DESC Country_Region32_ChDesc_2GHZ[] =
+{
+	{1, 11, CHANNEL_DEFAULT_PROP},
+	{12, 2, CHANNEL_PASSIVE_SCAN},	
+	{}
+};
+
+CH_DESC Country_Region33_ChDesc_2GHZ[] =
+{
+	{1, 14, CHANNEL_DEFAULT_PROP},
+	{}
+};
+
+COUNTRY_REGION_CH_DESC Country_Region_ChDesc_2GHZ[] =
+{
+	{REGION_0_BG_BAND, Country_Region0_ChDesc_2GHZ},
+	{REGION_1_BG_BAND, Country_Region1_ChDesc_2GHZ},
+	{REGION_2_BG_BAND, Country_Region2_ChDesc_2GHZ},
+	{REGION_3_BG_BAND, Country_Region3_ChDesc_2GHZ},
+	{REGION_4_BG_BAND, Country_Region4_ChDesc_2GHZ},
+	{REGION_5_BG_BAND, Country_Region5_ChDesc_2GHZ},
+	{REGION_6_BG_BAND, Country_Region6_ChDesc_2GHZ},
+	{REGION_7_BG_BAND, Country_Region7_ChDesc_2GHZ},
+	{REGION_31_BG_BAND, Country_Region31_ChDesc_2GHZ},
+	{REGION_32_BG_BAND, Country_Region32_ChDesc_2GHZ},
+	{REGION_33_BG_BAND, Country_Region33_ChDesc_2GHZ},
+	{}
+};
+
+UINT16 const Country_Region_GroupNum_2GHZ = sizeof(Country_Region_ChDesc_2GHZ) / sizeof(COUNTRY_REGION_CH_DESC);
+
+CH_DESC Country_Region0_ChDesc_5GHZ[] =
+{
+	{36, 8, CHANNEL_DEFAULT_PROP},
+	{149, 5, CHANNEL_DEFAULT_PROP},
+	{}
+};
+
+CH_DESC Country_Region1_ChDesc_5GHZ[] =
+{
+	{36, 8, CHANNEL_DEFAULT_PROP},
+	{100, 11, CHANNEL_DEFAULT_PROP},
+	{}
+};
+
+CH_DESC Country_Region2_ChDesc_5GHZ[] =
+{
+	{36, 8, CHANNEL_DEFAULT_PROP},
+	{}	
+};
+
+CH_DESC Country_Region3_ChDesc_5GHZ[] =
+{
+	{52, 4, CHANNEL_DEFAULT_PROP},
+	{149, 4, CHANNEL_DEFAULT_PROP},
+	{}
+};
+
+CH_DESC Country_Region4_ChDesc_5GHZ[] =
+{
+	{149, 5, CHANNEL_DEFAULT_PROP},
+	{}
+};
+CH_DESC Country_Region5_ChDesc_5GHZ[] =
+{
+	{149, 4, CHANNEL_DEFAULT_PROP},
+	{}
+};
+
+CH_DESC Country_Region6_ChDesc_5GHZ[] =
+{
+	{36, 4, CHANNEL_DEFAULT_PROP},
+	{}
+};
+
+CH_DESC Country_Region7_ChDesc_5GHZ[] =
+{
+	{36, 8, CHANNEL_DEFAULT_PROP},
+	{100, 11, CHANNEL_DEFAULT_PROP},
+	{149, 7, CHANNEL_DEFAULT_PROP},
+	{}
+};
+
+CH_DESC Country_Region8_ChDesc_5GHZ[] =
+{
+	{52, 4, CHANNEL_DEFAULT_PROP},
+	{}
+};
+
+CH_DESC Country_Region9_ChDesc_5GHZ[] =
+{
+	{36, 8 , CHANNEL_DEFAULT_PROP},
+	{100, 5, CHANNEL_DEFAULT_PROP},
+	{132, 3, CHANNEL_DEFAULT_PROP},
+	{149, 5, CHANNEL_DEFAULT_PROP},
+	{}
+};
+
+CH_DESC Country_Region10_ChDesc_5GHZ[] =
+{
+	{36,4, CHANNEL_DEFAULT_PROP},
+	{149, 5, CHANNEL_DEFAULT_PROP},
+	{}
+};
+
+CH_DESC Country_Region11_ChDesc_5GHZ[] =
+{
+	{36, 8, CHANNEL_DEFAULT_PROP},
+	{100, 6, CHANNEL_DEFAULT_PROP},
+	{149, 4, CHANNEL_DEFAULT_PROP},
+	{}		
+};
+
+CH_DESC Country_Region12_ChDesc_5GHZ[] =
+{
+	{36, 8, CHANNEL_DEFAULT_PROP},
+	{100, 11, CHANNEL_DEFAULT_PROP},
+	{}
+};
+
+CH_DESC Country_Region13_ChDesc_5GHZ[] =
+{
+	{52, 4, CHANNEL_DEFAULT_PROP},
+	{100, 11, CHANNEL_DEFAULT_PROP},
+	{149, 4, CHANNEL_DEFAULT_PROP},
+	{}	
+};
+
+CH_DESC Country_Region14_ChDesc_5GHZ[] =
+{
+	{36, 8, CHANNEL_DEFAULT_PROP},
+	{100, 5, CHANNEL_DEFAULT_PROP},
+	{136, 2, CHANNEL_DEFAULT_PROP},
+	{149, 5, CHANNEL_DEFAULT_PROP},
+	{}	
+};
+
+CH_DESC Country_Region15_ChDesc_5GHZ[] =
+{
+	{149, 7, CHANNEL_DEFAULT_PROP},
+	{}
+};
+
+CH_DESC Country_Region16_ChDesc_5GHZ[] =
+{
+	{52, 4, CHANNEL_DEFAULT_PROP},
+	{149, 5, CHANNEL_DEFAULT_PROP},
+	{}
+};
+
+CH_DESC Country_Region17_ChDesc_5GHZ[] =
+{
+	{36, 4, CHANNEL_DEFAULT_PROP},
+	{149, 4, CHANNEL_DEFAULT_PROP},
+	{}
+};
+
+CH_DESC Country_Region18_ChDesc_5GHZ[] =
+{
+	{36, 8, CHANNEL_DEFAULT_PROP},
+	{100, 5, CHANNEL_DEFAULT_PROP},
+	{132, 3, CHANNEL_DEFAULT_PROP},
+	{}	
+};
+
+CH_DESC Country_Region19_ChDesc_5GHZ[] =
+{
+	{56, 3, CHANNEL_DEFAULT_PROP},
+	{100, 11, CHANNEL_DEFAULT_PROP},
+	{149, 4, CHANNEL_DEFAULT_PROP},
+	{}
+};
+
+CH_DESC Country_Region20_ChDesc_5GHZ[] =
+{
+	{36, 8, CHANNEL_DEFAULT_PROP},
+	{100, 7, CHANNEL_DEFAULT_PROP},
+	{149, 4, CHANNEL_DEFAULT_PROP},
+	{}		
+};
+
+CH_DESC Country_Region21_ChDesc_5GHZ[] =
+{
+	{36, 8, CHANNEL_DEFAULT_PROP},
+	{100, 11, CHANNEL_DEFAULT_PROP},
+	{149, 4, CHANNEL_DEFAULT_PROP},
+	{}		
+};
+
+
+COUNTRY_REGION_CH_DESC Country_Region_ChDesc_5GHZ[] =
+{
+	{REGION_0_A_BAND, Country_Region0_ChDesc_5GHZ},
+	{REGION_1_A_BAND, Country_Region1_ChDesc_5GHZ},
+	{REGION_2_A_BAND, Country_Region2_ChDesc_5GHZ},
+	{REGION_3_A_BAND, Country_Region3_ChDesc_5GHZ},
+	{REGION_4_A_BAND, Country_Region4_ChDesc_5GHZ},
+	{REGION_5_A_BAND, Country_Region5_ChDesc_5GHZ},
+	{REGION_6_A_BAND, Country_Region6_ChDesc_5GHZ},
+	{REGION_7_A_BAND, Country_Region7_ChDesc_5GHZ},
+	{REGION_8_A_BAND, Country_Region8_ChDesc_5GHZ},
+	{REGION_9_A_BAND, Country_Region9_ChDesc_5GHZ},
+	{REGION_10_A_BAND, Country_Region10_ChDesc_5GHZ},
+	{REGION_11_A_BAND, Country_Region11_ChDesc_5GHZ},
+	{REGION_12_A_BAND, Country_Region12_ChDesc_5GHZ},
+	{REGION_13_A_BAND, Country_Region13_ChDesc_5GHZ},
+	{REGION_14_A_BAND, Country_Region14_ChDesc_5GHZ},
+	{REGION_15_A_BAND, Country_Region15_ChDesc_5GHZ},
+	{REGION_16_A_BAND, Country_Region16_ChDesc_5GHZ},
+	{REGION_17_A_BAND, Country_Region17_ChDesc_5GHZ},
+	{REGION_18_A_BAND, Country_Region18_ChDesc_5GHZ},
+	{REGION_19_A_BAND, Country_Region19_ChDesc_5GHZ},
+	{REGION_20_A_BAND, Country_Region20_ChDesc_5GHZ},
+	{REGION_21_A_BAND, Country_Region21_ChDesc_5GHZ},
+	{}
+};
+
+UINT16 const Country_Region_GroupNum_5GHZ = sizeof(Country_Region_ChDesc_5GHZ) / sizeof(COUNTRY_REGION_CH_DESC);
+
+UINT16 TotalChNum(PCH_DESC pChDesc)
+{
+	UINT16 TotalChNum = 0;
+	
+	while(pChDesc->FirstChannel)
+	{
+		TotalChNum += pChDesc->NumOfCh;
+		pChDesc++;
+	}
+	
+	return TotalChNum;
+}
+
+UCHAR GetChannel_5GHZ(PCH_DESC pChDesc, UCHAR index)
+{
+	while (pChDesc->FirstChannel)
+	{
+		if (index < pChDesc->NumOfCh)
+			return pChDesc->FirstChannel + index * 4;
+		else
+		{
+			index -= pChDesc->NumOfCh;
+			pChDesc++;
+		}
+	}
+
+	return 0;
+}
+
+UCHAR GetChannel_2GHZ(PCH_DESC pChDesc, UCHAR index)
+{
+
+	while (pChDesc->FirstChannel)
+	{
+		if (index < pChDesc->NumOfCh)
+			return pChDesc->FirstChannel + index;
+		else
+		{
+			index -= pChDesc->NumOfCh;
+			pChDesc++;
+		}
+	}
+
+	return 0;
+}
+
+UCHAR GetChannelFlag(PCH_DESC pChDesc, UCHAR index)
+{
+
+	while (pChDesc->FirstChannel)
+	{
+		if (index < pChDesc->NumOfCh)
+			return pChDesc->ChannelProp;
+		else
+		{
+			index -= pChDesc->NumOfCh;
+			pChDesc++;
+		}
+	}
+
+	return 0;
+}
+
+#ifdef EXT_BUILD_CHANNEL_LIST
+CH_REGION ChRegion[] =
+{
+		{	/* Antigua and Berbuda*/
+			"AG",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, BOTH, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, BOTH, FALSE},	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, FALSE},	/* 5G, ch 100~140*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Argentina*/ 
+			"AR",
+			CE,
+			{
+				{ 1,   11, 30, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 52,  4,  30, BOTH, FALSE},	/* 5G, ch 52~64*/
+				{ 149, 5,  30, BOTH, FALSE},	/* 5G, ch 149~165*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Aruba*/
+			"AW",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, BOTH, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, BOTH, FALSE},	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, FALSE},	/* 5G, ch 100~140*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Australia*/ 
+			"AU",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, BOTH, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, BOTH, FALSE},	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, FALSE},	/* 5G, ch 100~140*/
+			/*	{ 149,    4,  N/A, BOTH, FALSE},		5G, ch 149~161 No Rf power */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Austria*/ 
+			"AT",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, TRUE},		/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE},		/* 5G, ch 100~140*/
+			/*	{ 149,     7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Bahamas*/
+			"BS",
+			CE,
+			{
+				{ 1,   11, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  17, BOTH, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  24, BOTH, FALSE},	/* 5G, ch 52~64*/
+				{ 100, 11, 24, BOTH, TRUE},		/* 5G, ch 100~140*/
+				{ 149, 5,  30, BOTH, FALSE},	/* 5G, ch 149~165*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Barbados*/
+			"BB",
+			CE,
+			{
+				{ 1,   11, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  17, BOTH, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  24, BOTH, FALSE},	/* 5G, ch 52~64*/
+				{ 100, 11, 24, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+				{ 149, 5,  30, BOTH, FALSE},	/* 5G, ch 149~165*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Bermuda*/
+			"BM",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, BOTH, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  24, BOTH, FALSE},	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, FALSE},	/* 5G, ch 100~140*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Brazil*/
+			"BR",
+			CE,
+			{
+				{ 1,   11, 30, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, FALSE},	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE},		/* 5G, ch 100~140*/
+				{ 149, 5,  30, BOTH, FALSE},	/* 5G, ch 149~165*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Belgium*/
+			"BE",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Bulgaria*/
+			"BG",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+		{	/* Bolivia*/
+			"BO",
+			CE,
+			{
+				{ 1,   13, 30, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  17, BOTH, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  24, BOTH, FALSE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 24, BOTH, FALSE}, 	/* 5G, ch 100~140*/
+				{ 149, 5,  30, BOTH, FALSE},	/* 5G, ch 149~165*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Canada*/
+			"CA",
+			CE,
+			{
+				{ 1,   13, 30, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  17, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  24, BOTH, TRUE},		/* 5G, ch 52~64*/
+				{ 100, 8,  24, BOTH, TRUE}, 	/* 5G, ch 100~140, no ch 120~128 */
+				{ 149, 5,  30, BOTH, FALSE},	/* 5G, ch 149~165*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Cayman IsLands*/
+			"KY",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, BOTH, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  24, BOTH, FALSE},	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, FALSE},	/* 5G, ch 100~140*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Chile*/
+			"CL",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  22, BOTH, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  22, BOTH, FALSE},	/* 5G, ch 52~64*/
+				{ 149, 5,  22, BOTH, FALSE},	/* 5G, ch 149~165*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* China*/
+			"CN",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 149, 5,  33, BOTH, FALSE},	/* 5G, ch 149~165*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Colombia*/
+			"CO",
+			CE,
+			{
+				{ 1,   11, 30, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  17, BOTH, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  24, BOTH, FALSE},	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, FALSE},	/* 5G, ch 100~140*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Costa Rica*/
+			"CR",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  17, BOTH, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  24, BOTH, FALSE},	/* 5G, ch 52~64*/
+				{ 149, 4,  30, BOTH, FALSE},	/* 5G, ch 149~161*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Cyprus*/
+			"CY",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  24, IDOR, TRUE},		/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE},		/* 5G, ch 100~140*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Czech_Republic*/
+			"CZ",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+
+			}
+		},
+
+		{	/* Denmark*/
+			"DK",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+
+			}
+		},
+
+		{	/* Dominican Republic*/
+			"DO",
+			CE,
+			{
+				{ 1,   11, 30, BOTH, FALSE},	/* 2.4 G, ch 0*/
+				{ 36,  4,  17, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  24, IDOR, FALSE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 24, BOTH, FALSE}, 	/* 5G, ch 100~140*/
+				{ 149, 5,  30, BOTH, FALSE},	/* 5G, ch 149~165*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Equador*/
+			"EC",
+			CE,
+			{
+				{   1, 13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{  36,  4, 17, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{  52,  4, 24, IDOR, FALSE},	/* 5G, ch 52~64*/
+				{ 100, 11, 24, BOTH, FALSE},	/* 5G, ch 100~140*/
+				{ 149,  5, 30, BOTH, FALSE},	/* 5G, ch 149~165*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* El Salvador*/
+			"SV",
+			CE,
+			{
+				{ 1,   13,  20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,   23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,   30, BOTH, TRUE},	/* 5G, ch 52~64*/
+				{ 149, 4,   36, BOTH, TRUE},	/* 5G, ch 149~165*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Finland*/
+			"FI",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* France*/
+			"FR",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,   4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,   4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Germany*/
+			"DE",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,   4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,   4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Greece*/
+			"GR",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,   4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,   4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Guam*/
+			"GU",
+			CE,
+			{
+				{ 1,   11,  20, BOTH, FALSE},	/* 2.4 G, ch 1~11*/
+				{ 36,  4,   17, BOTH, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,   24, BOTH, FALSE},	/* 5G, ch 52~64*/
+				{ 100, 11,  30, BOTH, FALSE},	/* 5G, ch 100~140*/
+				{ 149,  5,  30, BOTH, FALSE},	/* 5G, ch 149~165*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Guatemala*/
+			"GT",
+			CE,
+			{
+				{ 1,   13,  20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,   17, BOTH, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,   24, BOTH, FALSE},	/* 5G, ch 52~64*/
+				{ 149,  4,  30, BOTH, FALSE},	/* 5G, ch 149~161*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Haiti*/
+			"HT",
+			CE,
+			{
+				{   1, 13,  20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{  36,  4,  17, BOTH, FALSE},	/* 5G, ch 36~48*/
+				{  52,  4,  24, BOTH, FALSE},	/* 5G, ch 52~64*/
+				{ 100, 11,  24, BOTH, FALSE}, 	/* 5G, ch 100~140*/
+				{ 149,  5,  30, BOTH, FALSE},	/* 5G, ch 149~165*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Honduras*/
+			"HN",
+			CE,
+			{
+				{ 1,   13,  20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 149,  4,  27, BOTH, FALSE},	/* 5G, ch 149~161*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Hong Kong*/
+			"HK",
+			CE,
+			{
+				{ 1,   13,  20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,   4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,   4,  23, IDOR, FALSE},	/* 5G, ch 52~64*/
+				{ 100, 11,  30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+				{ 149,  4,  36, BOTH, FALSE},	/* 5G, ch 149~165*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Hungary*/
+			"HU",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Iceland*/
+			"IS",
+			CE,
+			{
+				{ 1,   13,  20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,   4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,   4,  23, IDOR, TRUE},	/* 5G, ch 52~64*/
+				{ 100, 11,  30, BOTH, TRUE},	/* 5G, ch 100~140*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* India*/
+			"IN",
+			CE,
+			{
+				{ 1,   11,  20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,   4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,   4,  23, IDOR, FALSE},	/* 5G, ch 52~64*/
+				{ 149, 	5,  23, BOTH, FALSE},	/* 5G, ch 149~165*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Indonesia*/
+			"ID",
+			CE,
+			{
+				{ 149, 	4,  36, BOTH, FALSE},	/* 5G, ch 149~161*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Ireland*/
+			"IE",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Israel*/
+			"IL",
+			CE,
+			{
+				{ 1,   13,  20, IDOR, FALSE},	/* 2.4 G, ch 1~3*/
+				{ 36, 	4,  23, IDOR, FALSE},	/* 2.4 G, ch 4~9*/
+				{ 52, 	4,  23, IDOR, FALSE},	/* 2.4 G, ch 10~13*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Italy*/
+			"IT",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Japan*/
+			"JP",
+			JAP,
+			{
+				{ 1,   14,  20, BOTH, FALSE},	/* 2.4 G, ch 1~14*/
+				{ 36, 	4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,   4,  23, IDOR, FALSE}, 	/* 5G, ch 52~64*/
+				{ 100, 11,  23, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Jordan*/
+			"JO",
+			CE,
+			{
+				{ 1,   13,  20, IDOR, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36, 	4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Kuwait*/
+			"KW",
+			CE,
+			{
+				{ 1,   14,  20, BOTH, FALSE},	/* 2.4 G, ch 1~14*/
+				{ 36, 	4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Latvia*/
+			"LV",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Liechtenstein*/
+			"LI",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Lithuania*/
+			"LT",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Luxemburg*/
+			"LU",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Malaysia*/
+			"MY",
+			CE,
+			{
+				{ 1,   13,  27, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36, 	4,  30, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52, 	4,  30, BOTH, FALSE},	/* 5G, ch 52~64*/
+				{ 149,  5,  30, BOTH, FALSE},	/* 5G, ch 149~165*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Malta*/
+			"MT",
+			CE,
+			{
+				{ 1,   13,  20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36, 	4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52, 	4,  23, IDOR, TRUE},	/* 5G, ch 52~64*/
+				{ 100, 11,  30, BOTH, TRUE},	/* 5G, ch 100~140*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Morocco*/
+			"MA",
+			CE,
+			{
+				{ 1,   13,  10, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36, 	4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 149,  5,  30, IDOR, FALSE},	/* 5G, ch 149~165*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Mexico*/
+			"MX",
+			CE,
+			{
+				{ 1,   11,  20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36, 	4,  17, BOTH, FALSE},	/* 5G, ch 36~48*/
+				{ 52, 	4,  23, BOTH, FALSE},	/* 5G, ch 52~64*/
+				{ 100, 11,  30, BOTH, FALSE}, 	/* 5G, ch 100~140*/
+				{ 149,  5,  30, ODOR, FALSE},	/* 5G, ch 149~165*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Netherlands*/
+			"NL",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* New Zealand*/
+			"NZ",
+			CE,
+			{
+				{ 1,   13,  20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36, 	4,  23, BOTH, FALSE},	/* 5G, ch 36~48*/
+				{ 52, 	4,  23, BOTH, FALSE},	/* 5G, ch 52~64*/
+				{ 100, 11,  30, BOTH, FALSE}, 	/* 5G, ch 100~140*/
+				{ 149,  4,  30, BOTH, FALSE},	/* 5G, ch 149~161*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Norway*/
+			"NO",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Peru*/
+			"PE",
+			CE,
+			{
+				{ 1,   13,  20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,   4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,   4,  23, IDOR, FALSE}, 	/* 5G, ch 52~64*/
+				{ 100, 11,  30, BOTH, FALSE}, 	/* 5G, ch 100~140*/
+				{ 149,  5,  27, BOTH, FALSE},	/* 5G, ch 149~165*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Portugal*/
+			"PT",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Poland*/
+			"PL",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Romania*/
+			"RO",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Russia*/
+			"RU",
+			CE,
+			{
+				{ 1,   11,  20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,   4,  17, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,   4,  24, IDOR, FALSE}, 	/* 5G, ch 52~64*/	
+				{ 100, 11,  30, BOTH, FALSE}, 	/* 5G, ch 100~140*/
+				{ 149,  4,  30, IDOR, FALSE},	/* 5G, ch 149~161*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Saudi Arabia*/
+			"SA",
+			CE,
+			{
+				{ 1,   13,  20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,   4,  23, BOTH, FALSE},	/* 5G, ch 36~48*/
+				{ 52,   4,  23, BOTH, FALSE},	/* 5G, ch 52~64*/
+				{ 149,  5,  23, BOTH, FALSE},	/* 5G, ch 149~165*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Serbia_and_Montenegro*/
+			"CS",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Singapore*/
+			"SG",
+			CE,
+			{
+				{ 1,   13,  20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,   4,  23, BOTH, FALSE},	/* 5G, ch 36~48*/
+				{ 52,   4,  23, BOTH, FALSE},	/* 5G, ch 52~64*/
+				{ 149,  5,  20, BOTH, FALSE},	/* 5G, ch 149~165*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Slovakia*/
+			"SK",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Slovenia*/
+			"SI",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* South Africa*/
+			"ZA",
+			CE,
+			{
+				{ 1,   13,  20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,   4,  30, BOTH, FALSE},	/* 5G, ch 36~48*/
+				{ 52,   4,  30, IDOR, FALSE},	/* 5G, ch 52~64*/
+				{ 100, 11,  30, BOTH, TRUE},	/* 5G, ch 100~140*/
+				{ 149,  4,  30, BOTH, FALSE},	/* 5G, ch 149~161*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* South Korea*/
+			"KR",
+			CE,
+			{
+				{ 1,   13,  20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,   4,  20, BOTH, FALSE},	/* 5G, ch 36~48*/
+				{ 52,   4,  20, BOTH, FALSE},	/* 5G, ch 52~64*/
+				{ 100,  8,  20, BOTH, FALSE},	/* 5G, ch 100~128*/
+				{ 149,  5,  20, BOTH, FALSE},	/* 5G, ch 149~165*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Spain*/
+			"ES",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Sweden*/
+			"SE",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Switzerland*/
+			"CH",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Taiwan*/
+			"TW",
+			CE,
+			{
+				{ 1,   11,  30, BOTH, FALSE},	/* 2.4 G, ch 1~11*/
+				{ 52,   4,  23, IDOR, FALSE},	/* 5G, ch 52~64*/
+				{ 100, 11,  20, BOTH, TRUE},	/* 5G, ch 100~140*/
+				{ 149,  5,  20, BOTH, FALSE},	/* 5G, ch 149~165*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Turkey*/
+			"TR",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* UK*/
+			"GB",
+			CE,
+			{
+				{ 1,   13, 20, BOTH, FALSE},	/* 2.4 G, ch 1~13*/
+				{ 36,  4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,  4,  23, IDOR, TRUE}, 	/* 5G, ch 52~64*/
+				{ 100, 11, 30, BOTH, TRUE}, 	/* 5G, ch 100~140*/
+			/*	{ 149,	   7,  36, N/A, N/A},		5G, ch 149~173 No Geography  */
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Ukraine*/
+			"UA",
+			CE,
+			{
+				{ 1,   11,  20, BOTH, FALSE},	/* 2.4 G, ch 1~11*/
+				{ 36,   4,  23, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,   4,  23, IDOR, FALSE}, 	/* 5G, ch 52~64*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* United_Arab_Emirates*/
+			"AE",
+			CE,
+			{
+				{ 1,   13,  20, BOTH, FALSE},	/* 2.4 G, ch 1~11*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* United_States*/
+			"US",
+			FCC,
+			{
+				{ 1,   11,  30, BOTH, FALSE},	/* 2.4 G, ch 1~11*/
+				{ 36,   4,  17, IDOR, FALSE},	/* 5G, ch 36~48*/
+				{ 52,   4,  24, BOTH, TRUE},	/* 5G, ch 52~64*/
+				{ 100, 11,  24, BOTH, TRUE},	/* 5G, ch 100~140*/
+				{ 149,  5,  30, BOTH, FALSE},	/* 5G, ch 149~165*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Venezuela*/
+			"VE",
+			CE,
+			{
+				{ 1,   11,  20, BOTH, FALSE},	/* 2.4 G, ch 1~11*/
+				{ 149,  4,  27, BOTH, FALSE},	/* 5G, ch 149~161*/
+				{ 0},							/* end*/
+			}
+		},
+
+		{	/* Default*/
+			"",
+			CE,
+			{
+				{ 1,   14,  255, BOTH, FALSE},	/* 2.4 G, ch 1~14*/
+				{ 36,   4,  255, BOTH, FALSE},	/* 5G, ch 36~48*/
+				{ 52,   4,  255, BOTH, FALSE},	/* 5G, ch 52~64*/
+				{ 100, 11,  255, BOTH, FALSE},	/* 5G, ch 100~140*/
+				{ 149,  5,  255, BOTH, FALSE},	/* 5G, ch 149~165*/
+				{ 0},							/* end*/
+			}
+		},
+};
+
+
+static PCH_REGION GetChRegion(
+	IN PUCHAR CntryCode)
+{
+	INT loop = 0;
+	PCH_REGION pChRegion = NULL;
+
+	while (strcmp((PSTRING) ChRegion[loop].CountReg, "") != 0)
+	{
+		if (strncmp((PSTRING) ChRegion[loop].CountReg, (PSTRING) CntryCode, 2) == 0)
+		{
+			pChRegion = &ChRegion[loop];
+			break;
+		}
+		loop++;
+	}
+
+	if (pChRegion == NULL)
+		pChRegion = &ChRegion[loop];
+	return pChRegion;
+}
+
+static VOID ChBandCheck(
+	IN UCHAR PhyMode,
+	OUT PUCHAR pChType)
+{
+	switch(PhyMode)
+	{
+		case PHY_11A:
+#ifdef DOT11_N_SUPPORT
+		case PHY_11AN_MIXED:
+#endif /* DOT11_N_SUPPORT */
+			*pChType = BAND_5G;
+			break;
+		case PHY_11ABG_MIXED:
+#ifdef DOT11_N_SUPPORT
+		case PHY_11AGN_MIXED:
+		case PHY_11ABGN_MIXED:
+#endif /* DOT11_N_SUPPORT */
+			*pChType = BAND_BOTH;
+			break;
+
+		default:
+			*pChType = BAND_24G;
+			break;
+	}
+}
+
+static UCHAR FillChList(
+	IN PRTMP_ADAPTER pAd,
+	IN PCH_DESP pChDesp,
+	IN UCHAR Offset, 
+	IN UCHAR increment,
+	IN UCHAR regulatoryDomain)
+{
+	INT i, j, l;
+	UCHAR channel;
+
+	j = Offset;
+	for (i = 0; i < pChDesp->NumOfCh; i++)
+	{
+		channel = pChDesp->FirstChannel + i * increment;
+/*New FCC spec restrict the used channel under DFS */
+		for (l=0; l<MAX_NUM_OF_CHANNELS; l++)
+		{
+			if (channel == pAd->TxPower[l].Channel)
+			{
+				pAd->ChannelList[j].Power = pAd->TxPower[l].Power;
+				pAd->ChannelList[j].Power2 = pAd->TxPower[l].Power2;
+#ifdef DOT11N_SS3_SUPPORT
+					pAd->ChannelList[j].Power3 = pAd->TxPower[l].Power3;
+#endif /* DOT11N_SS3_SUPPORT */
+				break;
+			}
+		}
+		if (l == MAX_NUM_OF_CHANNELS)
+			continue;
+
+		pAd->ChannelList[j].Channel = pChDesp->FirstChannel + i * increment;
+		pAd->ChannelList[j].MaxTxPwr = pChDesp->MaxTxPwr;
+		pAd->ChannelList[j].DfsReq = pChDesp->DfsReq;
+		pAd->ChannelList[j].RegulatoryDomain = regulatoryDomain;
+		j++;
+	}
+	pAd->ChannelListNum = j;
+
+	return j;
+}
+
+
+static inline VOID CreateChList(
+	IN PRTMP_ADAPTER pAd,
+	IN PCH_REGION pChRegion,
+	IN UCHAR Geography)
+{
+	INT i;
+	UCHAR offset = 0;
+	PCH_DESP pChDesp;
+	UCHAR ChType;
+	UCHAR increment;
+	UCHAR regulatoryDomain;
+
+	if (pChRegion == NULL)
+		return;
+
+	ChBandCheck(pAd->CommonCfg.PhyMode, &ChType);
+
+	for (i=0; i<10; i++)
+	{
+		pChDesp = &pChRegion->ChDesp[i];
+		if (pChDesp->FirstChannel == 0)
+			break;
+
+		if (ChType == BAND_5G)
+		{
+			if (pChDesp->FirstChannel <= 14)
+				continue;
+		}
+		else if (ChType == BAND_24G)
+		{
+			if (pChDesp->FirstChannel > 14)
+				continue;
+		}
+
+		if ((pChDesp->Geography == BOTH)
+			|| (pChDesp->Geography == Geography))
+        {
+			if (pChDesp->FirstChannel > 14)
+                increment = 4;
+            else
+                increment = 1;
+			regulatoryDomain = pChRegion->DfsType;
+			offset = FillChList(pAd, pChDesp, offset, increment, regulatoryDomain);
+        }
+	}
+}
+
+
+VOID BuildChannelListEx(
+	IN PRTMP_ADAPTER pAd)
+{
+	PCH_REGION pChReg;
+
+	pChReg = GetChRegion(pAd->CommonCfg.CountryCode);
+	CreateChList(pAd, pChReg, pAd->CommonCfg.Geography);
+}
+
+VOID BuildBeaconChList(
+	IN PRTMP_ADAPTER pAd,
+	OUT PUCHAR pBuf,
+	OUT	PULONG pBufLen)
+{
+	INT i;
+	ULONG TmpLen;
+	PCH_REGION pChRegion;
+	PCH_DESP pChDesp;
+	UCHAR ChType;
+
+	pChRegion = GetChRegion(pAd->CommonCfg.CountryCode);
+
+	if (pChRegion == NULL)
+		return;
+
+	ChBandCheck(pAd->CommonCfg.PhyMode, &ChType);
+	*pBufLen = 0;
+
+	for (i=0; i<10; i++)
+	{
+		pChDesp = &pChRegion->ChDesp[i];
+		if (pChDesp->FirstChannel == 0)
+			break;
+
+		if (ChType == BAND_5G)
+		{
+			if (pChDesp->FirstChannel <= 14)
+				continue;
+		}
+		else if (ChType == BAND_24G)
+		{
+			if (pChDesp->FirstChannel > 14)
+				continue;
+		}
+
+		if ((pChDesp->Geography == BOTH)
+			|| (pChDesp->Geography == pAd->CommonCfg.Geography))
+		{
+			MakeOutgoingFrame(pBuf + *pBufLen,		&TmpLen,
+								1,                 	&pChDesp->FirstChannel,
+								1,                 	&pChDesp->NumOfCh,
+								1,                 	&pChDesp->MaxTxPwr,
+								END_OF_ARGS);
+			*pBufLen += TmpLen;
+		}
+	}
+}
+#endif /* EXT_BUILD_CHANNEL_LIST */
+
+#ifdef DOT11_N_SUPPORT
+static BOOLEAN IsValidChannel(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR channel)
+
+{
+	INT i;
+
+	for (i = 0; i < pAd->ChannelListNum; i++)
+	{
+		if (pAd->ChannelList[i].Channel == channel)
+			break;
+	}
+
+	if (i == pAd->ChannelListNum)
+		return FALSE;
+	else
+		return TRUE;
+}
+
+
+static UCHAR GetExtCh(
+	IN UCHAR Channel,
+	IN UCHAR Direction)
+{
+	CHAR ExtCh;
+
+	if (Direction == EXTCHA_ABOVE)
+		ExtCh = Channel + 4;
+	else
+		ExtCh = (Channel - 4) > 0 ? (Channel - 4) : 0;
+
+	return ExtCh;
+}
+
+
+VOID N_ChannelCheck(
+	IN PRTMP_ADAPTER pAd)
+{
+	/*UCHAR ChannelNum = pAd->ChannelListNum;*/
+	UCHAR Channel = pAd->CommonCfg.Channel;
+
+	if ((pAd->CommonCfg.PhyMode >= PHY_11ABGN_MIXED) && (pAd->CommonCfg.RegTransmitSetting.field.BW  == BW_40))
+	{
+		if (Channel > 14)
+		{
+			if ((Channel == 36) || (Channel == 44) || (Channel == 52) || (Channel == 60) || (Channel == 100) || (Channel == 108) ||
+			    (Channel == 116) || (Channel == 124) || (Channel == 132) || (Channel == 149) || (Channel == 157))
+			{
+				pAd->CommonCfg.RegTransmitSetting.field.EXTCHA = EXTCHA_ABOVE;
+			}
+			else if ((Channel == 40) || (Channel == 48) || (Channel == 56) || (Channel == 64) || (Channel == 104) || (Channel == 112) ||
+					(Channel == 120) || (Channel == 128) || (Channel == 136) || (Channel == 153) || (Channel == 161))
+			{
+				pAd->CommonCfg.RegTransmitSetting.field.EXTCHA = EXTCHA_BELOW;
+			}
+			else
+			{
+				pAd->CommonCfg.RegTransmitSetting.field.BW  = BW_20;
+			}
+		}
+		else
+		{
+			do
+			{
+				UCHAR ExtCh;
+				UCHAR Dir = pAd->CommonCfg.RegTransmitSetting.field.EXTCHA;
+				ExtCh = GetExtCh(Channel, Dir);
+				if (IsValidChannel(pAd, ExtCh))
+					break;
+
+				Dir = (Dir == EXTCHA_ABOVE) ? EXTCHA_BELOW : EXTCHA_ABOVE;
+				ExtCh = GetExtCh(Channel, Dir);
+				if (IsValidChannel(pAd, ExtCh))
+				{
+					pAd->CommonCfg.RegTransmitSetting.field.EXTCHA = Dir;
+					break;
+				}
+				pAd->CommonCfg.RegTransmitSetting.field.BW  = BW_20;
+			} while(FALSE);
+
+			if (Channel == 14)
+			{
+				pAd->CommonCfg.RegTransmitSetting.field.BW  = BW_20;
+				/*pAd->CommonCfg.RegTransmitSetting.field.EXTCHA = EXTCHA_NONE; We didn't set the ExtCh as NONE due to it'll set in RTMPSetHT()*/
+			}
+		}
+	}
+
+
+}
+
+
+VOID N_SetCenCh(
+	IN PRTMP_ADAPTER pAd)
+{
+	if (pAd->CommonCfg.RegTransmitSetting.field.BW == BW_40)
+	{
+		if (pAd->CommonCfg.RegTransmitSetting.field.EXTCHA == EXTCHA_ABOVE)
+		{
+
+			pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel + 2;
+		}
+		else
+		{
+			if (pAd->CommonCfg.Channel == 14)
+				pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel - 1;
+			else
+				pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel - 2;
+		}
+	}
+	else
+	{
+		pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel;
+	}
+}
+#endif /* DOT11_N_SUPPORT */
+
+
+UINT8 GetCuntryMaxTxPwr(
+	IN PRTMP_ADAPTER pAd,
+	IN UINT8 channel)
+{
+	int i;
+	for (i = 0; i < pAd->ChannelListNum; i++)
+	{
+		if (pAd->ChannelList[i].Channel == channel)
+			break;
+	}
+
+	if (i == pAd->ChannelListNum)
+		return 0xff;
+#ifdef SINGLE_SKU
+	if (pAd->CommonCfg.bSKUMode == TRUE)
+	{
+		UINT deltaTxStreamPwr = 0;
+
+#ifdef DOT11_N_SUPPORT
+		if ((pAd->CommonCfg.PhyMode >= PHY_11ABGN_MIXED) && (pAd->CommonCfg.TxStream == 2))
+			deltaTxStreamPwr = 3; /* If 2Tx case, antenna gain will increase 3dBm*/
+#endif /* DOT11_N_SUPPORT */
+		if (pAd->ChannelList[i].RegulatoryDomain == FCC)
+		{
+			/* FCC should maintain 20/40 Bandwidth, and without antenna gain */
+#ifdef DOT11_N_SUPPORT
+			if ((pAd->CommonCfg.PhyMode >= PHY_11ABGN_MIXED) &&
+				(pAd->CommonCfg.RegTransmitSetting.field.BW == BW_40) &&
+				(channel == 1 || channel == 11))
+				return (pAd->ChannelList[i].MaxTxPwr - pAd->CommonCfg.BandedgeDelta - deltaTxStreamPwr);
+			else
+#endif /* DOT11_N_SUPPORT */
+				return (pAd->ChannelList[i].MaxTxPwr - deltaTxStreamPwr);
+		}
+		else if (pAd->ChannelList[i].RegulatoryDomain == CE)
+		{
+			return (pAd->ChannelList[i].MaxTxPwr - pAd->CommonCfg.AntGain - deltaTxStreamPwr);
+		}
+		else
+			return 0xff;
+	}
+	else
+#endif /* SINGLE_SKU */
+		return pAd->ChannelList[i].MaxTxPwr;
+}
+
+
+/* for OS_ABL */
+VOID RTMP_MapChannelID2KHZ(
+	IN UCHAR Ch,
+	OUT UINT32 *pFreq)
+{
+	int chIdx;
+	for (chIdx = 0; chIdx < CH_HZ_ID_MAP_NUM; chIdx++)
+	{
+		if ((Ch) == CH_HZ_ID_MAP[chIdx].channel)
+		{
+			(*pFreq) = CH_HZ_ID_MAP[chIdx].freqKHz * 1000;
+			break;
+		}
+	}
+	if (chIdx == CH_HZ_ID_MAP_NUM)
+		(*pFreq) = 2412000;
+}
+
+/* for OS_ABL */
+VOID RTMP_MapKHZ2ChannelID(
+	IN ULONG Freq,
+	OUT INT *pCh)
+{
+	int chIdx;
+	for (chIdx = 0; chIdx < CH_HZ_ID_MAP_NUM; chIdx++)
+	{
+		if ((Freq) == CH_HZ_ID_MAP[chIdx].freqKHz)
+		{
+			(*pCh) = CH_HZ_ID_MAP[chIdx].channel;
+			break;
+		}
+	}
+	if (chIdx == CH_HZ_ID_MAP_NUM)
+		(*pCh) = 1;
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/rt_led.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/rt_led.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/rt_led.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/rt_led.c	2017-09-23 03:42:49.762675847 +0800
@@ -0,0 +1,273 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include	"rt_config.h"
+
+#ifdef LED_CONTROL_SUPPORT
+
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Set LED Status
+
+	Arguments:
+		pAd						Pointer to our adapter
+		Status					LED Status
+
+	Return Value:
+		None
+
+	IRQL = PASSIVE_LEVEL
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+	
+	========================================================================
+*/
+VOID RTMPSetLEDStatus(
+	IN PRTMP_ADAPTER 	pAd, 
+	IN UCHAR			Status)
+{
+	/*ULONG			data; */
+	UCHAR			LinkStatus = 0;
+	UCHAR			LedMode;
+	UCHAR			MCUCmd = 0;
+	BOOLEAN 		bIgnored = FALSE;
+
+#ifdef RALINK_ATE
+	/*
+		In ATE mode of RT2860 AP/STA, we have erased 8051 firmware.
+		So LED mode is not supported when ATE is running.
+	*/
+	if (!IS_RT3572(pAd))
+	{
+		if (ATE_ON(pAd))
+			return;
+	}
+#endif /* RALINK_ATE */
+
+#ifdef RTMP_MAC_USB
+#ifdef STATS_COUNT_SUPPORT
+	if(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF))
+		return;
+#endif /* STATS_COUNT_SUPPORT */
+#endif /* RTMP_MAC_USB */
+
+
+	LedMode = LED_MODE(pAd);
+	switch (Status)
+	{
+		case LED_LINK_DOWN:
+			LinkStatus = LINK_STATUS_LINK_DOWN;
+			pAd->LedCntl.LedIndicatorStrength = 0;
+			MCUCmd = MCU_SET_LED_MODE;
+			break;
+		case LED_LINK_UP:
+			if (pAd->CommonCfg.Channel > 14)
+				LinkStatus = LINK_STATUS_ABAND_LINK_UP;
+			else
+				LinkStatus = LINK_STATUS_GBAND_LINK_UP;
+
+			MCUCmd = MCU_SET_LED_MODE;
+			break;
+		case LED_RADIO_ON:
+			LinkStatus = LINK_STATUS_RADIO_ON;
+			MCUCmd = MCU_SET_LED_MODE;
+			break;
+		case LED_HALT: 
+			LedMode = 0; /* Driver sets MAC register and MAC controls LED */
+		case LED_RADIO_OFF:
+			LinkStatus = LINK_STATUS_RADIO_OFF;
+			MCUCmd = MCU_SET_LED_MODE;
+			break;
+		case LED_WPS:
+			LinkStatus = LINK_STATUS_WPS;
+			MCUCmd = MCU_SET_LED_MODE;
+			break;
+		case LED_ON_SITE_SURVEY:
+			LinkStatus = LINK_STATUS_ON_SITE_SURVEY;
+			MCUCmd = MCU_SET_LED_MODE;
+			break;
+		case LED_POWER_UP:
+			LinkStatus = LINK_STATUS_POWER_UP;
+			MCUCmd = MCU_SET_LED_MODE;
+			break;
+#ifdef RALINK_ATE
+#endif /* RALINK_ATE */
+		default:
+			DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status 0x%x\n", Status));
+			break;
+	}
+
+	if (MCUCmd)
+	{
+		AsicSendCommandToMcu(pAd, MCUCmd, 0xff, LedMode, LinkStatus);
+		DBGPRINT(RT_DEBUG_TRACE, ("%s: MCUCmd:0x%x, LED Mode:0x%x, LinkStatus:0x%x\n", __FUNCTION__, MCUCmd, LedMode, LinkStatus)); 
+	}
+	
+    /* */
+	/* Keep LED status for LED SiteSurvey mode. */
+	/* After SiteSurvey, we will set the LED mode to previous status. */
+	/* */
+	if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP) && (bIgnored == FALSE))
+		pAd->LedCntl.LedStatus = Status;
+    
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Set LED Signal Stregth 
+
+	Arguments:
+		pAd						Pointer to our adapter
+		Dbm						Signal Stregth
+
+	Return Value:
+		None
+
+	IRQL = PASSIVE_LEVEL
+	
+	Note:
+		Can be run on any IRQL level. 
+
+		According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
+		<= -90  No Signal
+		<= -81  Very Low
+		<= -71  Low
+		<= -67  Good
+		<= -57  Very Good
+		 > -57  Excellent		
+	========================================================================
+*/
+VOID RTMPSetSignalLED(
+	IN PRTMP_ADAPTER 	pAd, 
+	IN NDIS_802_11_RSSI Dbm)
+{
+	UCHAR		nLed = 0;
+
+
+#ifdef RTMP_MAC_USB
+#ifdef STATS_COUNT_SUPPORT
+	if(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF))
+		return;
+#endif /* STATS_COUNT_SUPPORT */
+#endif /* RTMP_MAC_USB */
+
+
+	if (pAd->LedCntl.MCULedCntl.field.LedMode == LED_MODE_SIGNAL_STREGTH)
+	{
+		if (Dbm <= -90)
+			nLed = 0;
+		else if (Dbm <= -81)
+			nLed = 1;
+		else if (Dbm <= -71)
+			nLed = 3;
+		else if (Dbm <= -67)
+			nLed = 7;
+		else if (Dbm <= -57)
+			nLed = 15;
+		else 
+			nLed = 31;
+
+		/* */
+		/* Update Signal Stregth to firmware if changed. */
+		/* */
+		if (pAd->LedCntl.LedIndicatorStrength != nLed)
+		{
+			AsicSendCommandToMcu(pAd, MCU_SET_LED_GPIO_SIGNAL_CFG, 0xff, nLed, pAd->LedCntl.MCULedCntl.field.Polarity);
+			pAd->LedCntl.LedIndicatorStrength = nLed;
+		}
+	}
+}
+
+
+
+
+void RTMPGetLEDSetting(IN RTMP_ADAPTER *pAd)
+{
+	USHORT Value;
+	PLED_CONTROL pLedCntl = &pAd->LedCntl;
+	{
+		RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, Value);
+		pLedCntl->MCULedCntl.word = (Value >> 8);
+		RT28xx_EEPROM_READ16(pAd, EEPROM_LEDAG_CONF_OFFSET, Value);
+		pLedCntl->LedAGCfg= Value;
+		RT28xx_EEPROM_READ16(pAd, EEPROM_LEDACT_CONF_OFFSET, Value);
+		pLedCntl->LedACTCfg = Value;
+		RT28xx_EEPROM_READ16(pAd, EEPROM_LED_POLARITY_OFFSET, Value);
+		pLedCntl->LedPolarity = Value;
+	}
+}
+
+
+void RTMPStartLEDMode(IN RTMP_ADAPTER *pAd)
+{
+}
+
+
+void RTMPInitLEDMode(IN RTMP_ADAPTER *pAd)
+{
+	PLED_CONTROL pLedCntl = &pAd->LedCntl;
+
+	if (pLedCntl->MCULedCntl.word == 0xFF)
+	{
+		pLedCntl->MCULedCntl.word = 0x01;
+		pLedCntl->LedAGCfg = 0x5555;
+		pLedCntl->LedACTCfg= 0x2221;
+
+#ifdef RTMP_MAC_USB
+		pLedCntl->LedPolarity = 0x5627; 
+#endif /* RTMP_MAC_USB */
+	}
+	
+	AsicSendCommandToMcu(pAd, MCU_SET_LED_AG_CFG, 0xff, (UCHAR)pLedCntl->LedAGCfg, (UCHAR)(pLedCntl->LedAGCfg >> 8));
+	AsicSendCommandToMcu(pAd, MCU_SET_LED_ACT_CFG, 0xff, (UCHAR)pLedCntl->LedACTCfg, (UCHAR)(pLedCntl->LedACTCfg >> 8));
+	AsicSendCommandToMcu(pAd, MCU_SET_LED_POLARITY, 0xff, (UCHAR)pLedCntl->LedPolarity, (UCHAR)(pLedCntl->LedPolarity >> 8));
+	AsicSendCommandToMcu(pAd, MCU_SET_LED_GPIO_SIGNAL_CFG, 0xff, 0, pLedCntl->MCULedCntl.field.Polarity);
+
+	pAd->LedCntl.LedIndicatorStrength = 0xFF;
+	RTMPSetSignalLED(pAd, -100);	/* Force signal strength Led to be turned off, before link up */
+
+	RTMPStartLEDMode(pAd);
+}
+
+
+inline void RTMPExitLEDMode(IN RTMP_ADAPTER *pAd)
+{
+
+	RTMPSetLED(pAd, LED_LINK_DOWN);
+
+	return;
+}
+
+#endif /* LED_CONTROL_SUPPORT */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/rtmp_init.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/rtmp_init.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/rtmp_init.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/rtmp_init.c	2017-09-23 03:42:49.766675834 +0800
@@ -0,0 +1,4012 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include	"rt_config.h"
+
+#ifdef OS_ABL_FUNC_SUPPORT
+/* Os utility link: printk, scanf */
+RTMP_OS_ABL_OPS RaOsOps, *pRaOsOps = &RaOsOps;
+#endif /* OS_ABL_FUNC_SUPPORT */
+
+#define RT3090A_DEFAULT_INTERNAL_LNA_GAIN	0x0A
+UCHAR    NUM_BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
+#ifdef DBG
+char*   CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128","CKIP152","SMS4"};
+#endif
+
+#ifdef RESOURCE_BOOT_ALLOC
+int rtusb_tx_buf_len = sizeof(HTTX_BUFFER);
+int rtusb_rx_buf_len = MAX_RXBULK_SIZE;
+int rtusb_tx_buf_cnt = 4;
+int rtusb_rx_buf_cnt = RX_RING_SIZE;
+
+#ifdef OS_ABL_SUPPORT
+EXPORT_SYMBOL(rtusb_tx_buf_len);
+EXPORT_SYMBOL(rtusb_rx_buf_len);
+EXPORT_SYMBOL(rtusb_tx_buf_cnt);
+EXPORT_SYMBOL(rtusb_rx_buf_cnt);
+#endif /* OS_ABL_SUPPORT */
+#endif /* RESOURCE_BOOT_ALLOC */
+
+/* BBP register initialization set*/
+
+REG_PAIR   BBPRegTable[] = {
+	{BBP_R65,		0x2C},		/* fix rssi issue*/
+	{BBP_R66,		0x38},	/* Also set this default value to pAd->BbpTuning.R66CurrentValue at initial*/
+	{BBP_R69,		0x12},
+	{BBP_R70,		0xa},	/* BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa*/
+	{BBP_R73,		0x10},
+	{BBP_R81,		0x37},
+	{BBP_R82,		0x62},
+	{BBP_R83,		0x6A},
+	{BBP_R84,		0x99},	/* 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before*/
+	{BBP_R86,		0x00},	/* middle range issue, Rory @2008-01-28 	*/
+	{BBP_R91,		0x04},	/* middle range issue, Rory @2008-01-28*/
+	{BBP_R92,		0x00},	/* middle range issue, Rory @2008-01-28*/
+	{BBP_R103,		0x00}, 	/* near range high-power issue, requested from Gary @2008-0528*/
+	{BBP_R105,		0x05},	/* 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.*/
+#ifdef DOT11_N_SUPPORT
+	{BBP_R106,		0x35},	/* Optimizing the Short GI sampling request from Gray @2009-0409*/
+#endif /* DOT11_N_SUPPORT */
+};
+#define	NUM_BBP_REG_PARMS	(sizeof(BBPRegTable) / sizeof(REG_PAIR))
+
+
+
+/* ASIC register initialization sets*/
+
+#ifdef SPECIFIC_BCN_BUF_SUPPORT
+RTMP_REG_PAIR	BcnSpecMACRegTable[] =	{
+	/* 	
+		That means all beacon's size are 512 bytes 
+		and their starting address are "0x4000, 0x4200, 0x4400, 0x4600, ....." 
+		in the second(higher) 8KB shared memory . 
+
+		The formula is : 0x4000 + BCNx_OFFSET*64
+			ex : the address of BSS0 = 0x4000 + 0x00 * 64 = 0x4000
+				 the address of BSS1 = 0x4000 + 0x08 * 64 = 0x4200
+	*/
+	{BCN_OFFSET0,			0x18100800}, 
+	{BCN_OFFSET1,			0x38302820}, 
+	{BCN_OFFSET2,			0x58504840}, 
+	{BCN_OFFSET3,			0x78706860}, 
+};
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */
+
+RTMP_REG_PAIR	MACRegTable[] =	{
+#if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
+	{BCN_OFFSET0,			0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
+	{BCN_OFFSET1,			0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
+#elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
+	{BCN_OFFSET0,			0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
+	{BCN_OFFSET1,			0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
+#endif /* HW_BEACON_OFFSET */
+
+	{LEGACY_BASIC_RATE,		0x0000013f}, /*  Basic rate set bitmap*/
+	{HT_BASIC_RATE,		0x00008003}, /* Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.*/
+	{MAC_SYS_CTRL,		0x00}, /* 0x1004, , default Disable RX*/
+	{RX_FILTR_CFG,		0x17f97}, /*0x1400  , RX filter control,  */
+	{BKOFF_SLOT_CFG,	0x209}, /* default set short slot time, CC_DELAY_TIME should be 2	 */
+	/*{TX_SW_CFG0,		0x40a06},  Gary,2006-08-23 */
+	{TX_SW_CFG0,		0x0}, 		/* Gary,2008-05-21 for CWC test */
+	{TX_SW_CFG1,		0x80606}, /* Gary,2006-08-23 */
+	{TX_LINK_CFG,		0x1020},		/* Gary,2006-08-23 */
+	/*{TX_TIMEOUT_CFG,	0x00182090},	 CCK has some problem. So increase timieout value. 2006-10-09 MArvek RT*/
+	{TX_TIMEOUT_CFG,	0x000a2090},	/* CCK has some problem. So increase timieout value. 2006-10-09 MArvek RT , Modify for 2860E ,2007-08-01*/
+	{MAX_LEN_CFG,		MAX_AGGREGATION_SIZE | 0x00001000},	/* 0x3018, MAX frame length. Max PSDU = 16kbytes.*/
+	{LED_CFG,		0x7f031e46}, /* Gary, 2006-08-23*/
+
+#ifdef INF_AMAZON_SE
+	{PBF_MAX_PCNT,			0x1F3F6F6F}, 	/*iverson modify for usb issue, 2008/09/19*/
+											/* 6F + 6F < total page count FE*/
+											/* so that RX doesn't occupy TX's buffer space when WMM congestion.*/
+#else
+	{PBF_MAX_PCNT,			0x1F3FBF9F}, 	/*0x1F3f7f9f},		Jan, 2006/04/20*/
+#endif /* INF_AMAZON_SE */
+	/*{TX_RTY_CFG,			0x6bb80408},	 Jan, 2006/11/16*/
+/* WMM_ACM_SUPPORT*/
+/*	{TX_RTY_CFG,			0x6bb80101},	 sample*/
+	{TX_RTY_CFG,			0x47d01f0f},	/* Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03*/
+	
+	{AUTO_RSP_CFG,			0x00000013},	/* Initial Auto_Responder, because QA will turn off Auto-Responder*/
+	{CCK_PROT_CFG,			0x05740003 /*0x01740003*/},	/* Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled. */
+	{OFDM_PROT_CFG,			0x05740003 /*0x01740003*/},	/* Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled. */
+#ifdef RTMP_MAC_USB
+	{PBF_CFG, 				0xf40006}, 		/* Only enable Queue 2*/
+	{MM40_PROT_CFG,			0x3F44084},		/* Initial Auto_Responder, because QA will turn off Auto-Responder*/
+	{WPDMA_GLO_CFG,			0x00000030},
+#endif /* RTMP_MAC_USB */
+	{GF20_PROT_CFG,			0x01744004},    /* set 19:18 --> Short NAV for MIMO PS*/
+	{GF40_PROT_CFG,			0x03F44084},    
+	{MM20_PROT_CFG,			0x01744004},    
+	{TXOP_CTRL_CFG,			0x0000583f, /*0x0000243f*/ /*0x000024bf*/},	/*Extension channel backoff.*/
+	{TX_RTS_CFG,			0x00092b20},	
+
+	{EXP_ACK_TIME,			0x002400ca},	/* default value */
+	{TXOP_HLDR_ET, 			0x00000002},
+
+	/* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
+		is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
+		and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
+		will always lost. So we change the SIFS of CCK from 10us to 16us. */
+	{XIFS_TIME_CFG,			0x33a41010},
+	{PWR_PIN_CFG,			0x00000003},	/* patch for 2880-E*/
+};
+
+
+#ifdef CONFIG_STA_SUPPORT
+RTMP_REG_PAIR	STAMACRegTable[] =	{
+	{WMM_AIFSN_CFG,		0x00002273},
+	{WMM_CWMIN_CFG,	0x00002344},
+	{WMM_CWMAX_CFG,	0x000034aa},
+};
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef SPECIFIC_BCN_BUF_SUPPORT
+#define	NUM_BCN_SPEC_MAC_REG_PARMS		(sizeof(BcnSpecMACRegTable) / sizeof(RTMP_REG_PAIR))
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */
+
+#define	NUM_MAC_REG_PARMS		(sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
+#ifdef CONFIG_STA_SUPPORT
+#define	NUM_STA_MAC_REG_PARMS	(sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
+#endif /* CONFIG_STA_SUPPORT */
+
+
+/*
+	Use the global variable is not a good solution.
+	But we can not put it to pAd and use the lock in pAd of RALINK_TIMER_STRUCT;
+	Or when the structure is cleared, we maybe get NULL for pAd and can not lock.
+	Maybe we can put pAd in RTMPSetTimer/ RTMPModTimer/ RTMPCancelTimer.
+*/
+NDIS_SPIN_LOCK TimerSemLock;
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Allocate RTMP_ADAPTER data block and do some initialization
+
+	Arguments:
+		Adapter		Pointer to our adapter
+
+	Return Value:
+		NDIS_STATUS_SUCCESS
+		NDIS_STATUS_FAILURE
+
+	IRQL = PASSIVE_LEVEL
+
+	Note:
+	
+	========================================================================
+*/
+NDIS_STATUS	RTMPAllocAdapterBlock(
+	IN  PVOID	handle,
+	OUT	VOID	**ppAdapter)
+{
+	PRTMP_ADAPTER	pAd = NULL;
+	NDIS_STATUS		Status;
+	INT 			index;
+	UCHAR			*pBeaconBuf = NULL;
+
+
+#ifdef OS_ABL_FUNC_SUPPORT
+	/* must put the function before any print message */
+	/* init OS utilities provided from UTIL module */
+	RtmpOsOpsInit(&RaOsOps);
+#endif /* OS_ABL_FUNC_SUPPORT */
+
+	DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
+
+	/* init UTIL module */
+	RtmpUtilInit();
+
+	*ppAdapter = NULL;
+
+	do
+	{
+		/* Allocate RTMP_ADAPTER memory block*/
+/*		pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);*/
+		os_alloc_mem(NULL, (UCHAR **)&pBeaconBuf, MAX_BEACON_SIZE);
+		if (pBeaconBuf == NULL)
+		{
+			Status = NDIS_STATUS_FAILURE;
+			DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
+			break;
+		}
+		NdisZeroMemory(pBeaconBuf, MAX_BEACON_SIZE);
+
+		Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd, sizeof(RTMP_ADAPTER));
+		if (Status != NDIS_STATUS_SUCCESS)
+		{
+			DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
+			break;
+		}
+		else
+		{
+			/* init resource list (must be after pAd allocation) */
+			initList(&pAd->RscTimerMemList);
+			initList(&pAd->RscTaskMemList);
+			initList(&pAd->RscLockMemList);
+			initList(&pAd->RscTaskletMemList);
+			initList(&pAd->RscSemMemList);
+			initList(&pAd->RscAtomicMemList);
+
+			initList(&pAd->RscTimerCreateList);
+
+#ifdef WORKQUEUE_BH
+			POS_COOKIE cookie;
+#endif /* WORKQUEUE_BH */
+			pAd->OS_Cookie = handle;
+#ifdef WORKQUEUE_BH
+			cookie = (POS_COOKIE)(pAd->OS_Cookie);
+			cookie->pAd_va = pAd;
+#endif /* WORKQUEUE_BH */
+		}
+		pAd->BeaconBuf = pBeaconBuf;
+		DBGPRINT(RT_DEBUG_OFF, ("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER)));
+
+		if (RtmpOsStatsAlloc(&pAd->stats, &pAd->iw_stats) == FALSE)
+		{
+			Status = NDIS_STATUS_FAILURE;
+			break;
+		}
+
+		/* Init spin locks*/
+		NdisAllocateSpinLock(pAd, &pAd->MgmtRingLock);
+
+		for (index =0 ; index < NUM_OF_TX_RING; index++)
+		{
+			NdisAllocateSpinLock(pAd, &pAd->TxSwQueueLock[index]);
+			NdisAllocateSpinLock(pAd, &pAd->DeQueueLock[index]);
+			pAd->DeQueueRunning[index] = FALSE;
+		}
+
+#ifdef RESOURCE_PRE_ALLOC
+		/* 
+			move this function from rt28xx_init() to here. now this function only allocate memory and
+			leave the initialization job to RTMPInitTxRxRingMemory() which called in rt28xx_init().
+		*/
+		Status = RTMPAllocTxRxRingMemory(pAd);
+		if (Status != NDIS_STATUS_SUCCESS)
+		{
+			DBGPRINT_ERR(("Failed to allocate memory - TxRxRing\n"));
+			break;
+		}
+#endif /* RESOURCE_PRE_ALLOC */
+
+		NdisAllocateSpinLock(pAd, &pAd->irq_lock);
+		NdisAllocateSpinLock(pAd, &TimerSemLock);
+#ifdef SPECIFIC_BCN_BUF_SUPPORT
+#endif // SPECIFIC_BCN_BUF_SUPPORT //
+
+
+#ifdef RALINK_ATE
+#ifdef RTMP_MAC_USB
+		RTMP_OS_ATMOIC_INIT(&pAd->BulkOutRemained, &pAd->RscAtomicMemList);
+		RTMP_OS_ATMOIC_INIT(&pAd->BulkInRemained, &pAd->RscAtomicMemList);
+#endif /* RTMP_MAC_USB */
+#endif /* RALINK_ATE */
+
+
+		/* assign function pointers*/
+	} while (FALSE);
+
+	if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
+/*		kfree(pBeaconBuf);*/
+		os_free_mem(NULL, pBeaconBuf);
+
+	if ((Status != NDIS_STATUS_SUCCESS) && (pAd != NULL))
+	{
+		if (pAd->stats != NULL)
+			os_free_mem(NULL, pAd->stats);
+
+		if (pAd->iw_stats != NULL)
+			os_free_mem(NULL, pAd->iw_stats);
+	}
+
+	if (pAd != NULL) /* compile warning: avoid use NULL pointer when pAd == NULL */
+		*ppAdapter = (VOID *)pAd;
+
+
+	/*
+		Init ProbeRespIE Table
+	*/
+	for (index = 0; index < MAX_LEN_OF_BSS_TABLE; index++) 
+	{
+		if (os_alloc_mem(pAd,&pAd->ProbeRespIE[index].pIe, MAX_VIE_LEN) == NDIS_STATUS_SUCCESS)
+			RTMPZeroMemory(pAd->ProbeRespIE[index].pIe, MAX_VIE_LEN);
+		else
+			pAd->ProbeRespIE[index].pIe = NULL;
+	}	
+
+	DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
+	return Status;
+}
+
+
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Read initial Tx power per MCS and BW from EEPROM
+		
+	Arguments:
+		Adapter						Pointer to our adapter
+
+	Return Value:
+		None
+
+	IRQL = PASSIVE_LEVEL
+
+	Note:
+		
+	========================================================================
+*/
+VOID	RTMPReadTxPwrPerRate(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	ULONG		data, Adata, Gdata;
+	USHORT		i, value, value2;
+	USHORT		value_1, value_2, value_3, value_4;
+	INT			Apwrdelta, Gpwrdelta;
+	UCHAR		t1,t2,t3,t4;
+	BOOLEAN		bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
+	
+	{	
+		
+		/* Get power delta for 20MHz and 40MHz.*/
+		
+		DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
+		RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
+		Apwrdelta = 0;
+		Gpwrdelta = 0;
+
+		if ((value2 & 0xff) != 0xff)
+		{
+			if ((value2 & 0x80))
+				Gpwrdelta = (value2&0xf);
+			
+			if ((value2 & 0x40))
+				bGpwrdeltaMinus = FALSE;
+			else
+				bGpwrdeltaMinus = TRUE;
+		}
+		if ((value2 & 0xff00) != 0xff00)
+		{
+			if ((value2 & 0x8000))
+				Apwrdelta = ((value2&0xf00)>>8);
+
+			if ((value2 & 0x4000))
+				bApwrdeltaMinus = FALSE;
+			else
+				bApwrdeltaMinus = TRUE;
+		}	
+		DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
+
+		
+		/* Get Txpower per MCS for 20MHz in 2.4G.*/
+		
+		for (i=0; i<5; i++)
+		{
+			RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
+			data = value;
+
+			/* use value_1 ~ value_4 for code size reduce */
+			value_1 = value&0xf;
+			value_2 = (value&0xf0)>>4;
+			value_3 = (value&0xf00)>>8;
+			value_4 = (value&0xf000)>>12;
+
+			if (bApwrdeltaMinus == FALSE)
+			{
+				t1 = value_1+(Apwrdelta);
+				if (t1 > 0xf)
+					t1 = 0xf;
+				t2 = value_2+(Apwrdelta);
+				if (t2 > 0xf)
+					t2 = 0xf;
+				t3 = value_3+(Apwrdelta);
+				if (t3 > 0xf)
+					t3 = 0xf;
+				t4 = value_4+(Apwrdelta);
+				if (t4 > 0xf)
+					t4 = 0xf;
+			}
+			else
+			{
+				if (value_1 > Apwrdelta)
+					t1 = value_1-(Apwrdelta);
+				else
+					t1 = 0;
+				if (value_2 > Apwrdelta)
+					t2 = value_2-(Apwrdelta);
+				else
+					t2 = 0;
+				if (value_3 > Apwrdelta)
+					t3 = value_3-(Apwrdelta);
+				else
+					t3 = 0;
+				if (value_4 > Apwrdelta)
+					t4 = value_4-(Apwrdelta);
+				else
+					t4 = 0;
+			}				
+			Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
+			if (bGpwrdeltaMinus == FALSE)
+			{
+				t1 = value_1+(Gpwrdelta);
+				if (t1 > 0xf)
+					t1 = 0xf;
+				t2 = value_2+(Gpwrdelta);
+				if (t2 > 0xf)
+					t2 = 0xf;
+				t3 = value_3+(Gpwrdelta);
+				if (t3 > 0xf)
+					t3 = 0xf;
+				t4 = value_4+(Gpwrdelta);
+				if (t4 > 0xf)
+					t4 = 0xf;
+			}
+			else
+			{
+				if (value_1 > Gpwrdelta)
+					t1 = value_1-(Gpwrdelta);
+				else
+					t1 = 0;
+				if (value_2 > Gpwrdelta)
+					t2 = value_2-(Gpwrdelta);
+				else
+					t2 = 0;
+				if (value_3 > Gpwrdelta)
+					t3 = value_3-(Gpwrdelta);
+				else
+					t3 = 0;
+				if (value_4 > Gpwrdelta)
+					t4 = value_4-(Gpwrdelta);
+				else
+					t4 = 0;
+			}				
+			Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
+			
+			RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
+
+			/* use value_1 ~ value_4 for code size reduce */
+			value_1 = value&0xf;
+			value_2 = (value&0xf0)>>4;
+			value_3 = (value&0xf00)>>8;
+			value_4 = (value&0xf000)>>12;
+
+			if (bApwrdeltaMinus == FALSE)
+			{
+				t1 = value_1+(Apwrdelta);
+				if (t1 > 0xf)
+					t1 = 0xf;
+				t2 = value_2+(Apwrdelta);
+				if (t2 > 0xf)
+					t2 = 0xf;
+				t3 = value_3+(Apwrdelta);
+				if (t3 > 0xf)
+					t3 = 0xf;
+				t4 = value_4+(Apwrdelta);
+				if (t4 > 0xf)
+					t4 = 0xf;
+			}
+			else
+			{
+				if (value_1 > Apwrdelta)
+					t1 = value_1-(Apwrdelta);
+				else
+					t1 = 0;
+				if (value_2 > Apwrdelta)
+					t2 = value_2-(Apwrdelta);
+				else
+					t2 = 0;
+				if (value_3 > Apwrdelta)
+					t3 = value_3-(Apwrdelta);
+				else
+					t3 = 0;
+				if (value_4 > Apwrdelta)
+					t4 = value_4-(Apwrdelta);
+				else
+					t4 = 0;
+			}				
+			Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
+			if (bGpwrdeltaMinus == FALSE)
+			{
+				t1 = value_1+(Gpwrdelta);
+				if (t1 > 0xf)
+					t1 = 0xf;
+				t2 = value_2+(Gpwrdelta);
+				if (t2 > 0xf)
+					t2 = 0xf;
+				t3 = value_3+(Gpwrdelta);
+				if (t3 > 0xf)
+					t3 = 0xf;
+				t4 = value_4+(Gpwrdelta);
+				if (t4 > 0xf)
+					t4 = 0xf;
+			}
+			else
+			{
+				if (value_1 > Gpwrdelta)
+					t1 = value_1-(Gpwrdelta);
+				else
+					t1 = 0;
+				if (value_2 > Gpwrdelta)
+					t2 = value_2-(Gpwrdelta);
+				else
+					t2 = 0;
+				if (value_3 > Gpwrdelta)
+					t3 = value_3-(Gpwrdelta);
+				else
+					t3 = 0;
+				if (value_4 > Gpwrdelta)
+					t4 = value_4-(Gpwrdelta);
+				else
+					t4 = 0;
+			}				
+			Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
+			data |= (value<<16);
+
+			/* For 20M/40M Power Delta issue */		
+			pAd->Tx20MPwrCfgABand[i] = data;
+			pAd->Tx20MPwrCfgGBand[i] = data;
+			pAd->Tx40MPwrCfgABand[i] = Adata;
+			pAd->Tx40MPwrCfgGBand[i] = Gdata;
+			
+			if (data != 0xffffffff)
+				RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
+			DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx,  Adata = %lx,  Gdata = %lx \n", data, Adata, Gdata));
+		}
+	}
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Read initial channel power parameters from EEPROM
+		
+	Arguments:
+		Adapter						Pointer to our adapter
+
+	Return Value:
+		None
+
+	IRQL = PASSIVE_LEVEL
+
+	Note:
+		
+	========================================================================
+*/
+VOID	RTMPReadChannelPwr(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	UINT32					i, choffset;
+	EEPROM_TX_PWR_STRUC	    Power;
+	EEPROM_TX_PWR_STRUC	    Power2;
+#ifdef RT33xx
+#endif /* RT33xx */
+
+	/* Read Tx power value for all channels*/
+	/* Value from 1 - 0x7f. Default value is 24.*/
+	/* Power value : 2.4G 0x00 (0) ~ 0x1F (31)*/
+	/*             : 5.5G 0xF9 (-7) ~ 0x0F (15)*/
+
+	/* 0. 11b/g, ch1 - ch 14*/
+	for (i = 0; i < 7; i++)
+	{
+#ifdef RT30xx
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+		if (IS_RT5390(pAd))
+		{
+			 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2,Power.word);
+			if (IS_RT5392(pAd))
+			{
+				RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2,Power2.word);
+			}
+			pAd->TxPower[i * 2].Channel = i * 2 + 1;
+			pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
+	
+			if ((Power.field.Byte0 > 0x27) || (Power.field.Byte0 < 0))
+			{
+				pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
+			}
+			else
+			{
+				pAd->TxPower[i * 2].Power = Power.field.Byte0;
+			}
+	
+			if ((Power.field.Byte1 > 0x27) || (Power.field.Byte1 < 0))
+			{
+				pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
+			}
+			else
+			{
+				pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
+			}
+	
+			if (IS_RT5392(pAd))
+			{
+				if ((Power2.field.Byte0 > 0x27) || (Power2.field.Byte0 < 0))
+				{
+					pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
+				}
+				else
+				{
+					pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
+				}
+		
+				if ((Power2.field.Byte1 > 0x27) || (Power2.field.Byte1 < 0))
+				{
+					pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
+				}
+				else
+				{
+					pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
+				}
+			}
+			
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: TxPower[%d].Power = 0x%02X, TxPower[%d].Power = 0x%02X\n", 
+				__FUNCTION__, 
+				i * 2, 
+				pAd->TxPower[i * 2].Power, 
+				i * 2 + 1, 
+				pAd->TxPower[i * 2 + 1].Power));
+			
+			if (IS_RT5392(pAd))
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: TxPower[%d].Power2 = 0x%02X, TxPower[%d].Power2 = 0x%02X\n", 
+					__FUNCTION__, 
+					i * 2, 
+					pAd->TxPower[i * 2].Power2, 
+					i * 2 + 1, 
+					pAd->TxPower[i * 2 + 1].Power2));
+			}
+		}
+		else
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+#endif /* RT30xx */
+		{ /* RT3070 and RT3370 */
+			RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
+			RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
+			pAd->TxPower[i * 2].Channel = i * 2 + 1;
+			pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
+
+			pAd->TxPower[i * 2].Power = Power.field.Byte0;
+			if(!IS_RT3390(pAd))  // 3370 has different Tx power range
+			{
+			if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
+				pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
+			}				
+
+			pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
+			if(!IS_RT3390(pAd)) // 3370 has different Tx power range
+			{
+			if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
+				pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
+			}				
+
+			if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
+				pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
+			else
+				pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
+
+			if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
+				pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
+			else
+				pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
+		}
+	}
+	
+	{
+		/* 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)*/
+		/* 1.1 Fill up channel*/
+		choffset = 14;
+		for (i = 0; i < 4; i++)
+		{
+			pAd->TxPower[3 * i + choffset + 0].Channel	= 36 + i * 8 + 0;
+			pAd->TxPower[3 * i + choffset + 0].Power	= DEFAULT_RF_TX_POWER;
+			pAd->TxPower[3 * i + choffset + 0].Power2	= DEFAULT_RF_TX_POWER;
+
+			pAd->TxPower[3 * i + choffset + 1].Channel	= 36 + i * 8 + 2;
+			pAd->TxPower[3 * i + choffset + 1].Power	= DEFAULT_RF_TX_POWER;
+			pAd->TxPower[3 * i + choffset + 1].Power2	= DEFAULT_RF_TX_POWER;
+
+			pAd->TxPower[3 * i + choffset + 2].Channel	= 36 + i * 8 + 4;
+			pAd->TxPower[3 * i + choffset + 2].Power	= DEFAULT_RF_TX_POWER;
+			pAd->TxPower[3 * i + choffset + 2].Power2	= DEFAULT_RF_TX_POWER;
+		}
+
+		/* 1.2 Fill up power*/
+		for (i = 0; i < 6; i++)
+		{
+			RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
+			RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
+
+			if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
+				pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
+
+			if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
+				pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;			
+
+			if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
+				pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
+
+			if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
+				pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;			
+		}
+		
+		/* 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)*/
+		/* 2.1 Fill up channel*/
+		choffset = 14 + 12;
+		for (i = 0; i < 5; i++)
+		{
+			pAd->TxPower[3 * i + choffset + 0].Channel	= 100 + i * 8 + 0;
+			pAd->TxPower[3 * i + choffset + 0].Power	= DEFAULT_RF_TX_POWER;
+			pAd->TxPower[3 * i + choffset + 0].Power2	= DEFAULT_RF_TX_POWER;
+
+			pAd->TxPower[3 * i + choffset + 1].Channel	= 100 + i * 8 + 2;
+			pAd->TxPower[3 * i + choffset + 1].Power	= DEFAULT_RF_TX_POWER;
+			pAd->TxPower[3 * i + choffset + 1].Power2	= DEFAULT_RF_TX_POWER;
+
+			pAd->TxPower[3 * i + choffset + 2].Channel	= 100 + i * 8 + 4;
+			pAd->TxPower[3 * i + choffset + 2].Power	= DEFAULT_RF_TX_POWER;
+			pAd->TxPower[3 * i + choffset + 2].Power2	= DEFAULT_RF_TX_POWER;
+		}
+		pAd->TxPower[3 * 5 + choffset + 0].Channel		= 140;
+		pAd->TxPower[3 * 5 + choffset + 0].Power		= DEFAULT_RF_TX_POWER;
+		pAd->TxPower[3 * 5 + choffset + 0].Power2		= DEFAULT_RF_TX_POWER;
+
+		/* 2.2 Fill up power*/
+		for (i = 0; i < 8; i++)
+		{
+			RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
+			RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
+
+			if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
+				pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
+
+			if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
+				pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;			
+
+			if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
+				pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
+
+			if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
+				pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;			
+		}
+
+		/* 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165, 167, 169; 171, 173 (including central frequency in BW 40MHz)*/
+		/* 3.1 Fill up channel*/
+		choffset = 14 + 12 + 16;
+		/*for (i = 0; i < 2; i++)*/
+		for (i = 0; i < 3; i++)
+		{
+			pAd->TxPower[3 * i + choffset + 0].Channel	= 149 + i * 8 + 0;
+			pAd->TxPower[3 * i + choffset + 0].Power	= DEFAULT_RF_TX_POWER;
+			pAd->TxPower[3 * i + choffset + 0].Power2	= DEFAULT_RF_TX_POWER;
+
+			pAd->TxPower[3 * i + choffset + 1].Channel	= 149 + i * 8 + 2;
+			pAd->TxPower[3 * i + choffset + 1].Power	= DEFAULT_RF_TX_POWER;
+			pAd->TxPower[3 * i + choffset + 1].Power2	= DEFAULT_RF_TX_POWER;
+
+			pAd->TxPower[3 * i + choffset + 2].Channel	= 149 + i * 8 + 4;
+			pAd->TxPower[3 * i + choffset + 2].Power	= DEFAULT_RF_TX_POWER;
+			pAd->TxPower[3 * i + choffset + 2].Power2	= DEFAULT_RF_TX_POWER;
+		}
+		pAd->TxPower[3 * 3 + choffset + 0].Channel		= 171;
+		pAd->TxPower[3 * 3 + choffset + 0].Power		= DEFAULT_RF_TX_POWER;
+		pAd->TxPower[3 * 3 + choffset + 0].Power2		= DEFAULT_RF_TX_POWER;
+
+		pAd->TxPower[3 * 3 + choffset + 1].Channel		= 173;
+		pAd->TxPower[3 * 3 + choffset + 1].Power		= DEFAULT_RF_TX_POWER;
+		pAd->TxPower[3 * 3 + choffset + 1].Power2		= DEFAULT_RF_TX_POWER;
+
+		/* 3.2 Fill up power*/
+		/*for (i = 0; i < 4; i++)*/
+		for (i = 0; i < 6; i++)
+		{
+			RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
+			RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
+
+			if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
+				pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
+
+			if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
+				pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;			
+
+			if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
+				pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
+
+			if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
+				pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;			
+		}
+	}
+
+
+	/* 4. Print and Debug*/
+	/*choffset = 14 + 12 + 16 + 7;*/
+	choffset = 14 + 12 + 16 + 11;
+	
+
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Read initial parameters from EEPROM
+		
+	Arguments:
+		Adapter						Pointer to our adapter
+
+	Return Value:
+		None
+
+	IRQL = PASSIVE_LEVEL
+
+	Note:
+		
+	========================================================================
+*/
+VOID	NICReadEEPROMParameters(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			mac_addr)
+{
+	UINT32			data = 0;
+	USHORT			i, value, value2;
+	EEPROM_TX_PWR_STRUC	    Power;
+	EEPROM_VERSION_STRUC    Version;
+	EEPROM_ANTENNA_STRUC	Antenna;
+	EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
+	USHORT  Addr01,Addr23,Addr45 ;
+	MAC_DW0_STRUC csr2;
+	MAC_DW1_STRUC csr3;
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));	
+
+	if (pAd->chipOps.AsicEeBufferInit)
+		pAd->chipOps.AsicEeBufferInit(pAd);
+
+	if (pAd->chipOps.eeinit)
+	{
+		pAd->chipOps.eeinit(pAd);
+#ifdef RTMP_EFUSE_SUPPORT
+#ifdef RT30xx
+#ifdef RALINK_ATE
+		if(!pAd->bFroceEEPROMBuffer && pAd->bEEPROMFile)
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters::(Efuse)Load to EEPROM Buffer Mode\n"));	
+			eFuseLoadEEPROM(pAd);
+		}
+#endif /* RALINK_ATE */
+#endif /* RT30xx */
+#endif /* RTMP_EFUSE_SUPPORT */
+	}
+
+	/* Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8*/
+	RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
+	DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
+
+	if((data & 0x30) == 0)
+		pAd->EEPROMAddressNum = 6;		/* 93C46*/
+	else if((data & 0x30) == 0x10)
+		pAd->EEPROMAddressNum = 8;     /* 93C66*/
+	else
+		pAd->EEPROMAddressNum = 8;     /* 93C86*/
+	DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
+
+	/* Read MAC setting from EEPROM and record as permanent MAC address */
+	DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
+
+	RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
+	RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
+	RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
+
+	pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
+	pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
+	pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
+	pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
+	pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
+	pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
+
+	/*more conveninet to test mbssid, so ap's bssid &0xf1*/
+	if (pAd->PermanentAddress[0] == 0xff)
+		pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
+			
+	DBGPRINT(RT_DEBUG_TRACE, ("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
+								PRINT_MAC(pAd->PermanentAddress)));
+
+	/* Assign the actually working MAC Address */
+	if (pAd->bLocalAdminMAC)
+	{		
+		DBGPRINT(RT_DEBUG_TRACE, ("Use the MAC address what is assigned from Configuration file(.dat). \n"));
+	}
+	else if (mac_addr && 
+			 strlen((PSTRING)mac_addr) == 17 &&
+			 (strcmp(mac_addr, "00:00:00:00:00:00") != 0))
+	{
+		INT		j;
+		PSTRING	macptr;
+
+		macptr = (PSTRING) mac_addr;
+
+		for (j=0; j<MAC_ADDR_LEN; j++)
+		{
+			AtoH(macptr, &pAd->CurrentAddress[j], 1);
+			macptr=macptr+3;
+		}	
+		
+		DBGPRINT(RT_DEBUG_TRACE, ("Use the MAC address what is assigned from Moudle Parameter. \n"));
+	}
+	else
+	{
+		COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
+		DBGPRINT(RT_DEBUG_TRACE, ("Use the MAC address what is assigned from EEPROM. \n"));
+	}
+
+	/* Set the current MAC to ASIC */	
+	csr2.field.Byte0 = pAd->CurrentAddress[0];
+	csr2.field.Byte1 = pAd->CurrentAddress[1];
+	csr2.field.Byte2 = pAd->CurrentAddress[2];
+	csr2.field.Byte3 = pAd->CurrentAddress[3];
+	RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
+	csr3.word = 0;
+	csr3.field.Byte4 = pAd->CurrentAddress[4];
+	csr3.field.Byte5 = pAd->CurrentAddress[5];
+	csr3.field.U2MeMask = 0xff;
+	RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
+	DBGPRINT_RAW(RT_DEBUG_TRACE,("Current MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
+					PRINT_MAC(pAd->CurrentAddress)));
+
+	/* if not return early. cause fail at emulation.*/
+	/* Init the channel number for TX channel power*/
+		RTMPReadChannelPwr(pAd);
+
+	/* if E2PROM version mismatch with driver's expectation, then skip*/
+	/* all subsequent E2RPOM retieval and set a system error bit to notify GUI*/
+	RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
+	pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
+	DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
+
+	if (Version.field.Version > VALID_EEPROM_VERSION)
+	{
+		DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
+	}
+
+	/* Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd*/
+	RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
+	pAd->EEPROMDefaultValue[EEPROM_NIC_CFG1_OFFSET] = value;
+
+	RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
+	pAd->EEPROMDefaultValue[EEPROM_NIC_CFG2_OFFSET] = value;
+
+	{
+		RT28xx_EEPROM_READ16(pAd, EEPROM_COUNTRY_REGION, value);	/* Country Region*/
+		pAd->EEPROMDefaultValue[EEPROM_COUNTRY_REG_OFFSET] = value;
+	}
+
+
+	for(i = 0; i < 8; i++)
+	{
+		RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
+		pAd->EEPROMDefaultValue[i+EEPROM_BBP_ARRAY_OFFSET] = value;
+	}
+
+	/* We have to parse NIC configuration 0 at here.*/
+	/* If TSSI did not have preloaded value, it should reset the TxAutoAgc to false*/
+	/* Therefore, we have to read TxAutoAgc control beforehand.*/
+	/* Read Tx AGC control bit*/
+	Antenna.word = pAd->EEPROMDefaultValue[EEPROM_NIC_CFG1_OFFSET];
+
+
+	if (Antenna.word == 0xFFFF)
+	{
+		RTMP_CHIP_ANTENNA_INFO_DEFAULT_RESET(pAd, &Antenna);
+	}
+
+	/* Choose the desired Tx&Rx stream.*/
+	if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
+		pAd->CommonCfg.TxStream = Antenna.field.TxPath;
+
+	if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
+	{
+		pAd->CommonCfg.RxStream = Antenna.field.RxPath;
+
+		if ((pAd->MACVersion != RALINK_3883_VERSION) &&
+			(pAd->MACVersion != RALINK_2883_VERSION) &&
+			(pAd->CommonCfg.RxStream > 2))
+		{
+			/* only 2 Rx streams for RT2860 series*/
+			pAd->CommonCfg.RxStream = 2;
+		}
+	}
+
+
+	/* EEPROM offset 0x36 - NIC Configuration 1 */
+	NicConfig2.word = pAd->EEPROMDefaultValue[EEPROM_NIC_CFG2_OFFSET];
+
+
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		if ((NicConfig2.word & 0x00ff) == 0xff)
+		{
+			NicConfig2.word &= 0xff00;
+		}
+
+		if ((NicConfig2.word >> 8) == 0xff)
+		{
+			NicConfig2.word &= 0x00ff;
+		}
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	if (NicConfig2.field.DynamicTxAgcControl == 1)
+		pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
+	else
+		pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
+	
+	/* Save value for future using */
+	pAd->NicConfig2.word = NicConfig2.word;
+	
+	DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
+
+	/* Save the antenna for future use*/
+	pAd->Antenna.word = Antenna.word;
+
+	/* Set the RfICType here, then we can initialize RFIC related operation callbacks*/
+	pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
+
+	pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
+
+	/* check if the chip supports 5G band */
+	if (PHY_MODE_IS_5G_BAND(pAd->CommonCfg.PhyMode))
+	{
+		if (!RFIC_IS_5G_BAND(pAd))
+		{
+			DBGPRINT_RAW(RT_DEBUG_ERROR,
+						("phy mode> Error! The chip does not support 5G band %d!\n",
+						pAd->RfIcType));
+#ifdef DOT11_N_SUPPORT
+			/* change to bgn mode */
+			Set_WirelessMode_Proc(pAd, "9");
+#else
+			/* change to bg mode */
+			Set_WirelessMode_Proc(pAd, "0");
+#endif /* DOT11_N_SUPPORT */
+		}
+	}
+
+
+	RTMP_NET_DEV_NICKNAME_INIT(pAd);
+
+
+	RtmpChipOpsHook(pAd);
+
+#ifdef TXRX_SW_ANTDIV_SUPPORT
+	if( ((Antenna.word & 0xF000) != 0xF000) && (Antenna.word & 0x2000))  /* EEPROM 0x34[15:12] = 0xF is invalid, 0x2~0x3 is TX/RX SW AntDiv */
+	{																	  
+		pAd->chipCap.bTxRxSwAntDiv = TRUE;
+		DBGPRINT(RT_DEBUG_OFF, ("\x1b[mAntenna word %X/%d, AntDiv %d\x1b[m\n", 
+					pAd->Antenna.word, pAd->Antenna.field.BoardType, pAd->NicConfig2.field.AntDiversity));
+	}
+#endif /* TXRX_SW_ANTDIV_SUPPORT */
+	
+	/* Reset PhyMode if we don't support 802.11a*/
+	/* Only RFIC_2850 & RFIC_2750 support 802.11a*/
+	
+	if ((Antenna.field.RfIcType != RFIC_2850)
+		&& (Antenna.field.RfIcType != RFIC_2750)
+		&& (Antenna.field.RfIcType != RFIC_3052)
+		&& (Antenna.field.RfIcType != RFIC_2853)
+		)
+	{
+		if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) || 
+			(pAd->CommonCfg.PhyMode == PHY_11A))
+			pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
+#ifdef DOT11_N_SUPPORT
+		else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED)	|| 
+				 (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED) 	|| 
+				 (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED) 	||
+				 (pAd->CommonCfg.PhyMode == PHY_11N_5G))
+			pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
+#endif /* DOT11_N_SUPPORT */
+
+		pAd->RFICType = RFIC_24GHZ; /* CRDA*/
+	}
+	else
+	{
+		pAd->RFICType = RFIC_24GHZ | RFIC_5GHZ; /* CRDA*/
+	}
+	
+	/* Read TSSI reference and TSSI boundary for temperature compensation. This is ugly*/
+	/* 0. 11b/g*/
+	{
+		/* these are tempature reference value (0x00 ~ 0xFE)
+		   ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
+		   TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
+		   TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
+		{
+			RT28xx_EEPROM_READ16(pAd, EEPROM_G_TSSI_BOUND1, Power.word);
+			pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
+			pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
+			RT28xx_EEPROM_READ16(pAd, EEPROM_G_TSSI_BOUND2, Power.word);
+			pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
+			pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
+			RT28xx_EEPROM_READ16(pAd, EEPROM_G_TSSI_BOUND3, Power.word);
+			pAd->TssiRefG   = Power.field.Byte0; /* reference value [0] */
+			pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
+			RT28xx_EEPROM_READ16(pAd, EEPROM_G_TSSI_BOUND4, Power.word);
+			pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
+			pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
+			RT28xx_EEPROM_READ16(pAd, EEPROM_G_TSSI_BOUND5, Power.word);
+			pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
+			pAd->TxAgcStepG = Power.field.Byte1;    
+			pAd->TxAgcCompensateG = 0;
+			pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
+			pAd->TssiPlusBoundaryG[0]  = pAd->TssiRefG;
+
+			/* Disable TxAgc if the based value is not right*/
+			if (pAd->TssiRefG == 0xff)
+				pAd->bAutoTxAgcG = FALSE;
+		}
+
+		DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
+			pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
+			pAd->TssiRefG,
+			pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
+			pAd->TxAgcStepG, pAd->bAutoTxAgcG));
+	}	
+	/* 1. 11a*/
+	{
+		{
+			RT28xx_EEPROM_READ16(pAd, EEPROM_A_TSSI_BOUND1, Power.word);
+			pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
+			pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
+			RT28xx_EEPROM_READ16(pAd, EEPROM_A_TSSI_BOUND2, Power.word);
+			pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
+			pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
+			RT28xx_EEPROM_READ16(pAd, EEPROM_A_TSSI_BOUND3, Power.word);
+			pAd->TssiRefA = Power.field.Byte0;
+			pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
+			RT28xx_EEPROM_READ16(pAd, EEPROM_A_TSSI_BOUND4, Power.word);
+			pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
+			pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
+			RT28xx_EEPROM_READ16(pAd, EEPROM_A_TSSI_BOUND5, Power.word);
+			pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
+			pAd->TxAgcStepA = Power.field.Byte1;    
+			pAd->TxAgcCompensateA = 0;
+			pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
+			pAd->TssiPlusBoundaryA[0]  = pAd->TssiRefA;
+
+			/* Disable TxAgc if the based value is not right*/
+			if (pAd->TssiRefA == 0xff)
+				pAd->bAutoTxAgcA = FALSE;
+		}
+
+		DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
+			pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
+			pAd->TssiRefA,
+			pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
+			pAd->TxAgcStepA, pAd->bAutoTxAgcA));
+	}	
+	pAd->BbpRssiToDbmDelta = 0x0;
+	
+	/* Read frequency offset setting for RF*/
+		RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
+
+	if ((value & 0x00FF) != 0x00FF)
+		pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
+	else
+		pAd->RfFreqOffset = 0;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
+
+	/*CountryRegion byte offset (38h)*/
+	value = pAd->EEPROMDefaultValue[EEPROM_COUNTRY_REG_OFFSET] >> 8;		/* 2.4G band*/
+	value2 = pAd->EEPROMDefaultValue[EEPROM_COUNTRY_REG_OFFSET] & 0x00FF;	/* 5G band*/
+	
+	if ((value <= REGION_MAXIMUM_BG_BAND) || (value == REGION_32_BG_BAND) || (value == REGION_33_BG_BAND))
+	{
+		pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
+	}
+
+	if (value2 <= REGION_MAXIMUM_A_BAND)
+	{
+		pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
+	}
+
+
+	
+	/* Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.*/
+	/* The valid value are (-10 ~ 10) */
+	/* */
+	{
+		RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
+		pAd->BGRssiOffset0 = value & 0x00ff;
+		pAd->BGRssiOffset1 = (value >> 8);
+	}
+
+	{
+		RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
+/*		if (IS_RT2860(pAd))  RT2860 supports 3 Rx and the 2.4 GHz RSSI #2 offset is in the EEPROM 0x48*/
+			pAd->BGRssiOffset2 = value & 0x00ff;
+		pAd->ALNAGain1 = (value >> 8);
+	}
+
+	{
+		RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
+		pAd->BLNAGain = value & 0x00ff;
+		pAd->ALNAGain0 = (value >> 8);
+	}
+	
+	/* Validate 11b/g RSSI_0 offset.*/
+	if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
+		pAd->BGRssiOffset0 = 0;
+
+	/* Validate 11b/g RSSI_1 offset.*/
+	if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
+		pAd->BGRssiOffset1 = 0;
+
+	/* Validate 11b/g RSSI_2 offset.*/
+	if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
+		pAd->BGRssiOffset2 = 0;
+
+	{
+		RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
+		pAd->ARssiOffset0 = value & 0x00ff;
+		pAd->ARssiOffset1 = (value >> 8);
+	}
+
+	{
+		RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
+		pAd->ARssiOffset2 = value & 0x00ff;
+		pAd->ALNAGain2 = (value >> 8);
+	}
+
+
+	if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
+		pAd->ALNAGain1 = pAd->ALNAGain0;
+	if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
+		pAd->ALNAGain2 = pAd->ALNAGain0;
+
+	/* Validate 11a RSSI_0 offset.*/
+	if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
+		pAd->ARssiOffset0 = 0;
+
+	/* Validate 11a RSSI_1 offset.*/
+	if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
+		pAd->ARssiOffset1 = 0;
+
+	/*Validate 11a RSSI_2 offset.*/
+	if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
+		pAd->ARssiOffset2 = 0;
+
+#ifdef RT30xx
+	
+	/* Get TX mixer gain setting*/
+	/* 0xff are invalid value*/
+	/* Note: RT30xX default value is 0x00 and will program to RF_R17 only when this value is not zero.*/
+	/*       RT359X default value is 0x02*/
+	
+	if (IS_RT30xx(pAd) || IS_RT3572(pAd)  || IS_RT3593(pAd)  || IS_RT5390(pAd))
+	{
+		RT28xx_EEPROM_READ16(pAd, EEPROM_TXMIXER_GAIN_2_4G, value);
+		pAd->TxMixerGain24G = 0;
+		value &= 0x00ff;
+		if (value != 0xff)
+		{
+			value &= 0x07;
+			pAd->TxMixerGain24G = (UCHAR)value;
+		}
+
+	}
+#endif /* RT30xx */
+	
+#ifdef LED_CONTROL_SUPPORT
+	/* LED Setting */
+	RTMPGetLEDSetting(pAd);
+#endif /* LED_CONTROL_SUPPORT */
+		
+		RTMPReadTxPwrPerRate(pAd);
+
+#ifdef SINGLE_SKU
+	{
+		RT28xx_EEPROM_READ16(pAd, EEPROM_DEFINE_MAX_TXPWR, pAd->CommonCfg.DefineMaxTxPwr);
+	}
+
+	if ((pAd->CommonCfg.DefineMaxTxPwr & 0xFF) <= 0x50 && pAd->CommonCfg.AntGain > 0 && pAd->CommonCfg.BandedgeDelta >= 0)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("Single SKU Mode is enabled\n"));
+		pAd->CommonCfg.bSKUMode = TRUE;
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("Single SKU Mode is disabled\n"));
+		pAd->CommonCfg.bSKUMode = FALSE;
+	}
+#endif /* SINGLE_SKU */
+
+
+#ifdef RT30xx
+#ifdef RTMP_EFUSE_SUPPORT
+	RtmpEfuseSupportCheck(pAd);
+#endif /* RTMP_EFUSE_SUPPORT */
+#endif /* RT30xx */
+
+#ifdef RTMP_INTERNAL_TX_ALC
+	RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
+
+	if(value==0xFFFF) { /*EEPROM is empty*/
+	    pAd->TxPowerCtrl.bInternalTxALC = FALSE;
+	}else if(value & 1<<13) {
+	    pAd->TxPowerCtrl.bInternalTxALC = TRUE;
+	}else {
+	    pAd->TxPowerCtrl.bInternalTxALC = FALSE;
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("TXALC> bInternalTxALC = %d\n",
+			pAd->TxPowerCtrl.bInternalTxALC));
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+
+		DBGPRINT(RT_DEBUG_TRACE, ("%s: pAd->Antenna.field.BoardType = %d, IS_MINI_CARD(pAd) = %d, IS_RT5390U(pAd) = %d\n", 
+		__FUNCTION__,
+		pAd->Antenna.field.BoardType,
+		IS_MINI_CARD(pAd),
+		IS_RT5390U(pAd)));
+	DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Set default value from EEPROM
+		
+	Arguments:
+		Adapter						Pointer to our adapter
+
+	Return Value:
+		None
+
+	IRQL = PASSIVE_LEVEL
+	
+	Note:
+		
+	========================================================================
+*/
+VOID	NICInitAsicFromEEPROM(
+	IN	PRTMP_ADAPTER	pAd)
+{
+#ifdef CONFIG_STA_SUPPORT
+	UINT32					data = 0;
+	UCHAR	BBPR1 = 0; 
+#endif /* CONFIG_STA_SUPPORT */
+	USHORT					i;
+#ifdef RALINK_ATE
+	USHORT	value;
+#endif /* RALINK_ATE */
+	EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
+	UCHAR	BBPR3 = 0;
+#ifdef RT30xx
+	UCHAR			bbpreg = 0;
+#endif /* RT30xx */
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
+	for(i = EEPROM_BBP_ARRAY_OFFSET; i < NUM_EEPROM_BBP_PARMS; i++)
+	{
+		UCHAR BbpRegIdx, BbpValue;
+	
+		if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
+		{
+			BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
+			BbpValue  = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
+		}
+	}
+
+	NicConfig2.word = pAd->NicConfig2.word;
+
+
+#ifdef LED_CONTROL_SUPPORT
+	/* Send LED Setting to MCU */
+	RTMPInitLEDMode(pAd);	
+#endif /* LED_CONTROL_SUPPORT */
+
+	/* finally set primary ant */
+	AntCfgInit(pAd);
+
+#ifdef RTMP_RF_RW_SUPPORT
+	/*Init RT30xx RFRegisters after read RFIC type from EEPROM*/
+	NICInitRFRegisters(pAd);
+#endif /* RTMP_RF_RW_SUPPORT */
+
+#ifdef ANT_DIVERSITY_SUPPORT
+	if ((pAd->CommonCfg.bRxAntDiversity == ANT_HW_DIVERSITY_ENABLE) &&
+			(pAd->chipOps.HwAntEnable))
+		pAd->chipOps.HwAntEnable(pAd);
+#endif
+
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		/* Read Hardware controlled Radio state enable bit*/
+		if (NicConfig2.field.HardwareRadioControl == 1)
+		{
+			pAd->StaCfg.bHardwareRadio = TRUE;
+
+			/* Read GPIO pin2 as Hardware controlled radio state*/
+			RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
+			if ((data & 0x04) == 0)
+			{
+				pAd->StaCfg.bHwRadio = FALSE;
+				pAd->StaCfg.bRadio = FALSE;
+/*				RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);*/
+				RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
+			}
+		}
+		else
+			pAd->StaCfg.bHardwareRadio = FALSE;		
+
+#ifdef LED_CONTROL_SUPPORT
+		if (pAd->StaCfg.bRadio == FALSE)
+		{
+			RTMPSetLED(pAd, LED_RADIO_OFF);
+		}
+		else
+		{
+			RTMPSetLED(pAd, LED_RADIO_ON);
+		}
+#endif /* LED_CONTROL_SUPPORT */
+
+	}
+#ifdef PCIE_PS_SUPPORT
+#endif /* PCIE_PS_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+#ifdef RTMP_MAC_USB
+		if (IS_RT30xx(pAd)|| IS_RT3572(pAd))
+		{
+			RTMP_CHIP_OP *pChipOps = &pAd->chipOps;
+			if (pChipOps->AsicReverseRfFromSleepMode)
+				pChipOps->AsicReverseRfFromSleepMode(pAd, TRUE);
+		}
+#endif /* RTMP_MAC_USB */
+	/* Turn off patching for cardbus controller*/
+	if (NicConfig2.field.CardbusAcceleration == 1)
+	{
+/*		pAd->bTest1 = TRUE;*/
+	}
+
+	if (NicConfig2.field.DynamicTxAgcControl == 1)
+		pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
+	else
+		pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
+
+#ifdef RTMP_INTERNAL_TX_ALC
+	/*
+	    Internal Tx ALC support is starting from RT3370 / RT3390, which combine PA / LNA in single chip.
+	    The old chipset don't have this, add new feature flag RTMP_INTERNAL_ALC.
+	 */
+
+	/* Internal Tx ALC */
+#ifdef RT3350
+	if (IS_RT3350(pAd) &&
+		(((NicConfig2.field.DynamicTxAgcControl == 1) && 
+		(NicConfig2.field.bInternalTxALC == 1))))
+	{
+		pAd->TxPowerCtrl.bInternalTxALC = FALSE;
+	}
+	else
+#endif // RT3350 //
+	if (((NicConfig2.field.DynamicTxAgcControl == 1) && 
+            (NicConfig2.field.bInternalTxALC == 1)) || (!IS_RT3390(pAd) && !IS_RT5390(pAd)))
+	{
+		/*
+			If both DynamicTxAgcControl and bInternalTxALC are enabled,
+			it is a wrong configuration.
+			If the chipset does not support internal ALC, we shall disable it.
+		*/
+		pAd->TxPowerCtrl.bInternalTxALC = FALSE;
+	}
+	else
+	{
+		if (NicConfig2.field.bInternalTxALC == 1)
+		{
+			pAd->TxPowerCtrl.bInternalTxALC = TRUE;
+		}
+		else
+		{
+			pAd->TxPowerCtrl.bInternalTxALC = FALSE;
+		}
+	}
+
+	
+	/* Old 5390 NIC always disables the internal ALC */
+	
+	if (pAd->MACVersion == 0x53900501)
+	{
+		pAd->TxPowerCtrl.bInternalTxALC = FALSE;
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: pAd->TxPowerCtrl.bInternalTxALC = %d\n", 
+		__FUNCTION__, 
+		pAd->TxPowerCtrl.bInternalTxALC));
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+#ifdef RALINK_ATE
+	RT28xx_EEPROM_READ16(pAd, EEPROM_TSSI_GAIN_AND_ATTENUATION, value);
+	value = (value & 0x00FF);	
+	
+	if (IS_RT5390(pAd))
+	{
+		pAd->TssiGain = 0x02;	 /* RT5390 uses 2 as TSSI gain/attenuation default value */
+	}
+	else
+	{
+		pAd->TssiGain = 0x03; /* RT5392 uses 3 as TSSI gain/attenuation default value */
+	}	
+	
+	if ((value != 0x00) && (value != 0xFF))
+	{
+		pAd->TssiGain =  (UCHAR) (value & 0x000F);
+	}
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: EEPROM_TSSI_GAIN_AND_ATTENUATION = 0x%X, pAd->TssiGain=0x%x\n", 
+				__FUNCTION__, 
+				value, 
+				pAd->TssiGain));
+#endif // RALINK_ATE //
+	/* Since BBP has been progamed, to make sure BBP setting will be */
+	/* upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND!!*/
+	
+	pAd->CommonCfg.BandState = UNKNOWN_BAND;
+	
+	RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
+	BBPR3 &= (~0x18);
+	if(pAd->Antenna.field.RxPath == 3)
+	{
+		BBPR3 |= (0x10);
+	}
+	else if(pAd->Antenna.field.RxPath == 2)
+	{
+		BBPR3 |= (0x8);
+	}
+	else if(pAd->Antenna.field.RxPath == 1)
+	{
+		BBPR3 |= (0x0);
+	}
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
+	
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		/* Handle the difference when 1T*/
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
+
+        {
+			if(pAd->Antenna.field.TxPath == 1)
+			{
+			BBPR1 &= (~0x18);
+			}
+		}
+
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
+    
+		DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n", 
+					pAd->StaCfg.bHardwareRadio, pAd->StaCfg.bHardwareRadio));
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	RTMP_EEPROM_ASIC_INIT(pAd);
+
+#ifdef RT30xx
+	/* Initialize RT3070 serial MAC registers which is different from RT2870 serial*/
+	if (IS_RT3090(pAd) || IS_RT3390(pAd) || IS_RT3593(pAd) || IS_RT5390(pAd))
+	{
+		/* enable DC filter*/
+		if ((pAd->MACVersion & 0xffff) >= 0x0211)
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xc0);
+		}
+
+		/* improve power consumption in RT3071 Ver.E */
+		if (((pAd->MACVersion & 0xffff) >= 0x0211) && !IS_RT3593(pAd))
+		{
+			RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R31, &bbpreg);
+			bbpreg &= (~0x3);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R31, bbpreg);
+		}
+
+
+		RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
+		
+		/* RT3071 version E has fixed this issue*/
+		if ((pAd->MACVersion & 0xffff) < 0x0211)
+		{
+			if (pAd->NicConfig2.field.DACTestBit == 1)
+			{
+				RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x2C);	/* To fix throughput drop drastically*/
+			}
+			else
+			{
+				RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0F);	/* To fix throughput drop drastically*/
+			}
+		}
+		else
+		{
+			RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0);
+		}
+	}
+	else if (IS_RT3070(pAd))
+	{
+		if ((pAd->MACVersion & 0xffff) >= 0x0201)
+		{
+			/* enable DC filter*/
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xc0);
+			
+			/* improve power consumption in RT3070 Ver.F*/
+			RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R31, &bbpreg);
+			bbpreg &= (~0x3);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R31, bbpreg);
+		}
+		/*
+		     RT3070(E) Version[0200]
+		     RT3070(F) Version[0201]
+		 */
+		if (((pAd->MACVersion & 0xffff) < 0x0201))
+		{
+			RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
+			RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x2C);	/* To fix throughput drop drastically*/
+		}
+		else
+		{
+			RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0);
+		}
+	}
+	else if (IS_RT3071(pAd) || IS_RT3572(pAd))
+	{
+		RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
+		if (((pAd->MACVersion & 0xffff) < 0x0211))
+		{
+			if (pAd->NicConfig2.field.DACTestBit == 1)
+			{
+				RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x1F); /* To fix throughput drop drastically*/
+			}
+			else
+			{
+				RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0F); /* To fix throughput drop drastically*/
+			}
+		}
+		else
+		{
+			RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0);
+		}
+	}
+
+	/* update registers from EEPROM for RT3071 or later(3572/3562/3592).*/
+	if (IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd))
+	{
+		UCHAR RegIdx, RegValue;
+		USHORT value;
+
+		/* after RT3071, write BBP from EEPROM 0xF0 to 0x102*/
+		for (i = 0xF0; i <= 0x102; i = i+2)
+		{
+			value = 0xFFFF;
+			RT28xx_EEPROM_READ16(pAd, i, value);
+			if ((value != 0xFFFF) && (value != 0))
+			{
+				RegIdx = (UCHAR)(value >> 8);
+				RegValue  = (UCHAR)(value & 0xff);
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, RegIdx, RegValue);
+				DBGPRINT(RT_DEBUG_TRACE, ("Update BBP Registers from EEPROM(0x%0x), BBP(0x%x) = 0x%x\n", i, RegIdx, RegValue));
+			}
+		}
+
+		/* after RT3071, write RF from EEPROM 0x104 to 0x116*/
+		for (i = 0x104; i <= 0x116; i = i+2)
+		{
+			value = 0xFFFF;
+			RT28xx_EEPROM_READ16(pAd, i, value);
+			if ((value != 0xFFFF) && (value != 0))
+			{
+				RegIdx = (UCHAR)(value >> 8);
+				RegValue  = (UCHAR)(value & 0xff);
+				RT30xxWriteRFRegister(pAd, RegIdx, RegValue);
+				DBGPRINT(RT_DEBUG_TRACE, ("Update RF Registers from EEPROM0x%x), BBP(0x%x) = 0x%x\n", i, RegIdx, RegValue));
+			}
+		}
+	}
+#endif /* RT30xx */
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef RTMP_FREQ_CALIBRATION_SUPPORT
+		/*
+			Only for RT3593, RT5390 (Maybe add other chip in the future)
+			Sometimes the frequency will be shift, we need to adjust it.
+		*/
+		if (pAd->StaCfg.AdaptiveFreq == TRUE) /*Todo: iwpriv and profile support.*/
+		pAd->FreqCalibrationCtrl.bEnableFrequencyCalibration = TRUE;
+
+		DBGPRINT(RT_DEBUG_TRACE, ("%s: pAd->FreqCalibrationCtrl.bEnableFrequencyCalibration = %d\n", 
+			__FUNCTION__, 
+			pAd->FreqCalibrationCtrl.bEnableFrequencyCalibration));
+
+#endif /* RTMP_FREQ_CALIBRATION_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+	DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d\n", 
+				pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath, pAd->RfIcType));
+	DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Initialize NIC hardware
+
+	Arguments:
+		Adapter						Pointer to our adapter
+
+	Return Value:
+		None
+
+	IRQL = PASSIVE_LEVEL
+
+	Note:
+		
+	========================================================================
+*/
+NDIS_STATUS	NICInitializeAdapter(
+	IN	PRTMP_ADAPTER	pAd,
+	IN   BOOLEAN    bHardReset)
+{
+	NDIS_STATUS     Status = NDIS_STATUS_SUCCESS;
+	WPDMA_GLO_CFG_STRUC	GloCfg;
+/*	INT_MASK_CSR_STRUC		IntMask;*/
+	ULONG	i =0;
+	ULONG	j=0;
+	/*AC_TXOP_CSR0_STRUC	csr0;*/
+
+	DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
+	
+	/* 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:*/
+retry:
+	i = 0;
+	do
+	{
+		RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
+		if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
+			break;
+		
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))			
+			return NDIS_STATUS_FAILURE;
+		RTMPusecDelay(1000);
+		i++;
+	}while ( i<100);
+	DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));	
+	GloCfg.word &= 0xff0;
+	GloCfg.field.EnTXWriteBackDDONE =1;
+	RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
+	
+	/* Record HW Beacon offset*/
+	{
+		pAd->BeaconOffset[0] = pAd->chipCap.BcnBase[0];
+		pAd->BeaconOffset[1] = pAd->chipCap.BcnBase[1];
+		pAd->BeaconOffset[2] = pAd->chipCap.BcnBase[2];
+		pAd->BeaconOffset[3] = pAd->chipCap.BcnBase[3];
+		pAd->BeaconOffset[4] = pAd->chipCap.BcnBase[4];
+		pAd->BeaconOffset[5] = pAd->chipCap.BcnBase[5];
+		pAd->BeaconOffset[6] = pAd->chipCap.BcnBase[6];
+		pAd->BeaconOffset[7] = pAd->chipCap.BcnBase[7];
+	}
+	
+#ifdef SPECIFIC_BCN_BUF_SUPPORT
+	if (pAd->chipCap.FlgIsSupSpecBcnBuf == TRUE)
+	{
+		pAd->BeaconOffset[8] = pAd->chipCap.BcnBase[8];
+		pAd->BeaconOffset[9] = pAd->chipCap.BcnBase[9];
+		pAd->BeaconOffset[10] = pAd->chipCap.BcnBase[10];
+		pAd->BeaconOffset[11] = pAd->chipCap.BcnBase[11];
+		pAd->BeaconOffset[12] = pAd->chipCap.BcnBase[12];
+		pAd->BeaconOffset[13] = pAd->chipCap.BcnBase[13];
+		pAd->BeaconOffset[14] = pAd->chipCap.BcnBase[14];
+		pAd->BeaconOffset[15] = pAd->chipCap.BcnBase[15];
+	}
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */
+
+	
+	/* write all shared Ring's base address into ASIC*/
+	
+
+	/* asic simulation sequence put this ahead before loading firmware.*/
+	/* pbf hardware reset*/
+
+	/* Initialze ASIC for TX & Rx operation*/
+	if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
+	{
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))			
+			return NDIS_STATUS_FAILURE;
+		if (j++ == 0)
+		{
+			NICLoadFirmware(pAd);
+			goto retry;
+		}
+		return NDIS_STATUS_FAILURE;
+	}
+
+
+
+
+
+
+	/* reset action*/
+	/* Load firmware*/
+	/*  Status = NICLoadFirmware(pAd);*/
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
+	return Status;
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Initialize ASIC
+
+	Arguments:
+		Adapter						Pointer to our adapter
+
+	Return Value:
+		None
+
+	IRQL = PASSIVE_LEVEL
+
+	Note:
+		
+	========================================================================
+*/
+NDIS_STATUS	NICInitializeAsic(
+	IN	PRTMP_ADAPTER	pAd,
+	IN  BOOLEAN		bHardReset)
+{
+	ULONG			Index = 0;
+	UCHAR			R0 = 0xff;
+	UINT32			MacCsr12 = 0, Counter = 0;
+#ifdef RTMP_MAC_USB
+	UINT32			MacCsr0 = 0;
+#endif /* RTMP_MAC_USB */
+	USHORT			KeyIdx;
+	INT				i,apidx;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
+
+
+
+#ifdef RTMP_MAC_USB
+	
+	/* Make sure MAC gets ready after NICLoadFirmware().*/
+	
+	Index = 0;
+	
+	/*To avoid hang-on issue when interface up in kernel 2.4, */
+	/*we use a local variable "MacCsr0" instead of using "pAd->MACVersion" directly.*/
+	do 
+	{
+		RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
+
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))			
+			return NDIS_STATUS_FAILURE;
+
+		if ((MacCsr0 != 0x00) && (MacCsr0 != 0xFFFFFFFF))
+			break;
+
+		RTMPusecDelay(10);
+	} while (Index++ < 100);
+
+	pAd->MACVersion = MacCsr0;
+	DBGPRINT(RT_DEBUG_TRACE, ("MAC_CSR0  [ Ver:Rev=0x%08x]\n", pAd->MACVersion));
+	/* turn on bit13 (set to zero) after rt2860D. This is to solve high-current issue.*/
+	RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacCsr12);
+	MacCsr12 &= (~0x2000);
+	RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, MacCsr12);
+	
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
+	RTMP_IO_WRITE32(pAd, USB_DMA_CFG, 0x0);
+	RTUSBVenderReset(pAd);
+	RTMPusecDelay(1); 
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
+
+	/* Initialize MAC register to default value*/
+	for(Index=0; Index<NUM_MAC_REG_PARMS; Index++)
+	{
+#ifdef RT30xx
+		if ((MACRegTable[Index].Register == TX_SW_CFG0) &&
+			(IS_RT3070(pAd) || IS_RT3071(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd) || IS_RT3593(pAd)))
+		{
+			MACRegTable[Index].Value = 0x00000400;
+		}
+		else if ((MACRegTable[Index].Register == TX_SW_CFG0) && (IS_RT5390(pAd)))
+		{
+			MACRegTable[Index].Value = 0x00000404; /* Gary, 2010-6-9 */
+		}
+#endif /* RT30xx */
+		RTMP_IO_WRITE32(pAd, (USHORT)MACRegTable[Index].Register, MACRegTable[Index].Value);
+	}
+
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
+		{
+			RTMP_IO_WRITE32(pAd, (USHORT)STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
+		}
+	}
+#endif /* CONFIG_STA_SUPPORT */
+#endif /* RTMP_MAC_USB */
+
+
+#ifdef SPECIFIC_BCN_BUF_SUPPORT
+	if (pAd->chipCap.FlgIsSupSpecBcnBuf == TRUE)
+	{
+		/* re-set beacon offset */
+		for(Index=0; Index<NUM_BCN_SPEC_MAC_REG_PARMS; Index++)
+		{
+			RTMP_IO_WRITE32(pAd, (USHORT)BcnSpecMACRegTable[Index].Register, BcnSpecMACRegTable[Index].Value);
+		}
+	}
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */
+
+	/* re-set specific MAC registers */
+	if (pAd->chipOps.AsicMacInit != NULL)
+		pAd->chipOps.AsicMacInit(pAd);
+
+	
+	/* Before program BBP, we need to wait BBP/RF get wake up.*/
+	
+	Index = 0;
+	do
+	{
+		RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
+
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))			
+			return NDIS_STATUS_FAILURE;
+
+		if ((MacCsr12 & 0x03) == 0)	/* if BB.RF is stable*/
+			break;
+		
+		DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG  = Busy = %x\n", MacCsr12));
+		RTMPusecDelay(1000);
+	} while (Index++ < 100);
+
+
+	/* Wait to be stable.*/
+	RTMPusecDelay(1000);
+	pAd->LastMCUCmd = 0x72;
+
+	/* Read BBP register, make sure BBP is up and running before write new data*/
+	Index = 0;
+	do 
+	{
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))			
+			return NDIS_STATUS_FAILURE;
+		DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
+	} while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
+	/*ASSERT(Index < 20); this will cause BSOD on Check-build driver*/
+
+	if ((R0 == 0xff) || (R0 == 0x00))
+		return NDIS_STATUS_FAILURE;
+
+	/* Initialize BBP register to default value*/
+	for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
+	{
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
+	}
+	if (pAd->chipCap.pBBPRegTable)
+	{
+		REG_PAIR *pbbpRegTb = pAd->chipCap.pBBPRegTable;
+		
+		for (Index = 0; Index < pAd->chipCap.bbpRegTbSize; Index++)
+		{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, pbbpRegTb[Index].Register, pbbpRegTb[Index].Value);
+			DBGPRINT(RT_DEBUG_TRACE, ("BBP_R%d=%d\n", pbbpRegTb[Index].Register, pbbpRegTb[Index].Value));
+		}
+	}
+
+	if (pAd->chipOps.AsicBbpInit != NULL)
+		pAd->chipOps.AsicBbpInit(pAd);
+
+
+	RTMP_VDR_TUNING1(pAd);
+
+	
+
+	/* for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.*/
+	/* RT3090 should not program BBP R84 to 0x19, otherwise TX will block.*/
+	/*3070/71/72,3090,3090A( are included in RT30xx),3572,3390*/
+#if !defined(RT5350)
+	if (((pAd->MACVersion & 0xffff) != 0x0101) &&
+		!(IS_RT30xx(pAd)|| IS_RT3572(pAd) || IS_RT5390(pAd)))
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
+#endif /* RT5350 */
+
+#ifdef RT30xx
+	/* RF power sequence setup*/
+	if (IS_RT30xx(pAd) || IS_RT3572(pAd) || IS_RT5390(pAd))
+	{	/*update for RT3070/71/72/90/91/92,3572,3390.*/
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R79, 0x13);		
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R80, 0x05);	
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R81, 0x33);	
+	}
+#endif /* RT30xx */
+
+	if (pAd->MACVersion == 0x28600100)
+	{
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
+	}
+	
+	if ((pAd->MACVersion == RALINK_3883_VERSION) ||
+		((pAd->MACVersion >= RALINK_2880E_VERSION) &&
+		(pAd->MACVersion < RALINK_3070_VERSION))) /* 3*3*/
+	{
+		/* enlarge MAX_LEN_CFG*/
+		UINT32 csr;
+		RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
+		{
+		csr &= 0xFFF;
+		csr |= 0x2000;
+		}
+		RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
+	}
+
+#ifdef RTMP_MAC_USB
+{
+	UCHAR	MAC_Value[]={0xff,0xff,0xff,0xff,0xff,0xff,0xff,0,0};
+
+	/*Initialize WCID table*/
+	for(Index =0 ;Index < 254;Index++)
+	{
+		RTUSBMultiWrite(pAd, (USHORT)(MAC_WCID_BASE + Index * 8), MAC_Value, 8);
+	}
+}
+#endif /* RTMP_MAC_USB */
+
+#ifdef CONFIG_STA_SUPPORT
+	/* Add radio off control*/
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		if (pAd->StaCfg.bRadio == FALSE)
+		{
+/*			RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);*/
+			RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
+			DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
+		}
+	}
+#endif /* CONFIG_STA_SUPPORT */	
+
+	/* Clear raw counters*/
+	RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
+	RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
+	RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
+	RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
+	RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
+	RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
+	
+	/* ASIC will keep garbage value after boot*/
+	/* Clear all shared key table when initial*/
+	/* This routine can be ignored in radio-ON/OFF operation. */
+	if (bHardReset)
+	{
+		for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
+		{
+			RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
+		}
+
+		/* Clear all pairwise key table when initial*/
+		for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
+		{
+			RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
+		}
+	}
+	
+	/* assert HOST ready bit*/
+/*  RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x0);  2004-09-14 asked by Mark*/
+/*  RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x4);*/
+
+	/* It isn't necessary to clear this space when not hard reset. 	*/
+	if (bHardReset == TRUE)
+	{
+#ifdef SPECIFIC_BCN_BUF_SUPPORT
+		unsigned long irqFlag = 0;
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */
+	
+		/* clear all on-chip BEACON frame space			*/
+#ifdef SPECIFIC_BCN_BUF_SUPPORT
+		/*
+			Shared memory access selection (higher 8KB shared memory)
+		*/
+		RTMP_MAC_SHR_MSEL_LOCK(pAd, HIGHER_SHRMEM, irqFlag);
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */
+
+		for (apidx = 0; apidx < HW_BEACON_MAX_COUNT(pAd); apidx++)
+		{
+			for (i = 0; i < HW_BEACON_OFFSET; i+=4)
+				RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00); 
+		}
+		
+#ifdef SPECIFIC_BCN_BUF_SUPPORT
+		/*
+			Shared memory access selection (lower 16KB shared memory)
+		*/
+		RTMP_MAC_SHR_MSEL_UNLOCK(pAd, LOWER_SHRMEM, irqFlag);	
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */
+	}
+	
+#ifdef RTMP_MAC_USB
+	AsicDisableSync(pAd);
+	/* Clear raw counters*/
+	RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
+	RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
+	RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
+	RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
+	RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
+	RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
+	/* Default PCI clock cycle per ms is different as default setting, which is based on PCI.*/
+	RTMP_IO_READ32(pAd, USB_CYC_CFG, &Counter);
+	Counter&=0xffffff00;
+	Counter|=0x000001e;
+	RTMP_IO_WRITE32(pAd, USB_CYC_CFG, Counter);
+#endif /* RTMP_MAC_USB */
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		/* for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.*/
+		if ((pAd->MACVersion&0xffff) != 0x0101)
+			RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+
+
+
+VOID NICUpdateFifoStaCounters(
+	IN PRTMP_ADAPTER pAd)
+{
+	TX_STA_FIFO_STRUC	StaFifo;
+	MAC_TABLE_ENTRY		*pEntry;
+	UINT32				i = 0;
+	UCHAR				pid = 0, wcid = 0;
+	INT32				reTry;
+	UCHAR				succMCS;
+
+#ifdef RALINK_ATE		
+	/* Nothing to do in ATE mode */
+	if (ATE_ON(pAd))
+		return;
+#endif /* RALINK_ATE */
+
+#ifdef RTMP_MAC_USB
+#ifdef CONFIG_STA_SUPPORT
+	if(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF))
+		return;
+#endif /* CONFIG_STA_SUPPORT */
+#endif /* RTMP_MAC_USB */
+
+
+		do
+		{
+			RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
+
+			if (StaFifo.field.bValid == 0)
+				break;
+		
+			wcid = (UCHAR)StaFifo.field.wcid;
+
+
+		/* ignore NoACK and MGMT frame use 0xFF as WCID */
+			if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
+			{
+				i++;
+				continue;
+			}
+
+			/* PID store Tx MCS Rate */
+			pid = (UCHAR)StaFifo.field.PidType;
+
+			pEntry = &pAd->MacTab.Content[wcid];
+
+			pEntry->DebugFIFOCount++;
+
+#ifdef DOT11_N_SUPPORT
+#endif /* DOT11_N_SUPPORT */
+
+#ifdef UAPSD_AP_SUPPORT
+			UAPSD_SP_AUE_Handle(pAd, pEntry, StaFifo.field.TxSuccess);
+#endif /* UAPSD_AP_SUPPORT */
+
+#ifdef CONFIG_STA_SUPPORT
+			if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS))
+				continue;
+#endif /* CONFIG_STA_SUPPORT */
+
+			if (!StaFifo.field.TxSuccess)
+			{
+				pEntry->FIFOCount++;
+				pEntry->OneSecTxFailCount++;
+									
+				if (pEntry->FIFOCount >= 1)
+				{			
+					DBGPRINT(RT_DEBUG_TRACE, ("#"));
+#ifdef DOT11_N_SUPPORT
+					pEntry->NoBADataCountDown = 64;
+#endif /* DOT11_N_SUPPORT */
+
+					/* Update the continuous transmission counter.*/
+					pEntry->ContinueTxFailCnt++;
+
+					if(pEntry->PsMode == PWR_ACTIVE)
+					{
+#ifdef DOT11_N_SUPPORT					
+						int tid;
+						for (tid=0; tid<NUM_OF_TID; tid++)
+						{
+							BAOriSessionTearDown(pAd, pEntry->Aid,  tid, FALSE, FALSE);
+						}
+#endif /* DOT11_N_SUPPORT */
+
+
+					}
+
+					/*pEntry->FIFOCount = 0;*/
+				}
+				/*pEntry->bSendBAR = TRUE;*/
+			}
+			else
+			{
+#ifdef DOT11_N_SUPPORT
+				if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
+				{
+					pEntry->NoBADataCountDown--;
+					if (pEntry->NoBADataCountDown==0)
+					{
+						DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
+					}
+				}
+#endif /* DOT11_N_SUPPORT */
+				pEntry->FIFOCount = 0;
+				pEntry->OneSecTxNoRetryOkCount++;
+				/* update NoDataIdleCount when sucessful send packet to STA.*/
+				pEntry->NoDataIdleCount = 0;
+				pEntry->ContinueTxFailCnt = 0;
+			}
+
+			succMCS = StaFifo.field.SuccessRate & 0x7F;
+
+#ifdef DOT11N_SS3_SUPPORT
+			if (pEntry->HTCapability.MCSSet[2] == 0xff)
+			{
+				if (succMCS > pid)
+					pid = pid + 16;
+			}
+#endif /* DOT11N_SS3_SUPPORT */
+
+
+			reTry = pid - succMCS;
+
+			if (StaFifo.field.TxSuccess)
+			{
+				pEntry->TXMCSExpected[pid]++;
+				if (pid == succMCS)
+				{
+					pEntry->TXMCSSuccessful[pid]++;
+				}
+				else 
+				{
+					pEntry->TXMCSAutoFallBack[pid][succMCS]++;
+				}
+			}
+			else
+			{
+				pEntry->TXMCSFailed[pid]++;
+			}
+
+#ifdef DOT11N_SS3_SUPPORT
+#ifdef NEW_RATE_ADAPT_SUPPORT
+			if (pEntry->HTCapability.MCSSet[2] == 0xff)
+			{
+				reTry = (pid % 3) - (succMCS % 3) + (pid >> 3) - (succMCS >> 3);
+
+				if (reTry > 0)
+					pEntry->OneSecTxRetryOkCount += reTry;
+			}
+			else
+			{
+#endif /* NEW_RATE_ADAPT_SUPPORT */
+#endif /* DOT11N_SS3_SUPPORT */
+			if (reTry > 0)
+			{
+				if ((pid >= 12) && succMCS <=7)
+				{
+					reTry -= 4;
+				} 
+				pEntry->OneSecTxRetryOkCount += reTry;
+			}
+#ifdef DOT11N_SS3_SUPPORT
+#ifdef NEW_RATE_ADAPT_SUPPORT
+			}
+#endif /* NEW_RATE_ADAPT_SUPPORT */
+#endif /* DOT11N_SS3_SUPPORT */
+
+			i++;
+			/* ASIC store 16 stack*/
+		} while ( i < (TX_RING_SIZE<<1) );
+
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Read statistical counters from hardware registers and record them
+		in software variables for later on query
+
+	Arguments:
+		pAd					Pointer to our adapter
+
+	Return Value:
+		None
+
+	IRQL = DISPATCH_LEVEL
+	
+	========================================================================
+*/
+VOID NICUpdateRawCounters(
+	IN PRTMP_ADAPTER pAd)
+{
+	UINT32	OldValue;/*, Value2;*/
+	/*ULONG	PageSum, OneSecTransmitCount;*/
+	/*ULONG	TxErrorRatio, Retry, Fail;*/
+	RX_STA_CNT0_STRUC	 RxStaCnt0;
+	RX_STA_CNT1_STRUC   RxStaCnt1;
+	RX_STA_CNT2_STRUC   RxStaCnt2;
+	TX_STA_CNT0_STRUC 	 TxStaCnt0;
+	TX_STA_CNT1_STRUC	 StaTx1;
+	TX_STA_CNT2_STRUC	 StaTx2;
+#ifdef STATS_COUNT_SUPPORT
+	TX_AGG_CNT_STRUC	TxAggCnt;
+	TX_AGG_CNT0_STRUC	TxAggCnt0;
+	TX_AGG_CNT1_STRUC	TxAggCnt1;
+	TX_AGG_CNT2_STRUC	TxAggCnt2;
+	TX_AGG_CNT3_STRUC	TxAggCnt3;
+	TX_AGG_CNT4_STRUC	TxAggCnt4;
+	TX_AGG_CNT5_STRUC	TxAggCnt5;
+	TX_AGG_CNT6_STRUC	TxAggCnt6;
+	TX_AGG_CNT7_STRUC	TxAggCnt7;
+#endif /* STATS_COUNT_SUPPORT */
+	COUNTER_RALINK		*pRalinkCounters;
+
+
+	pRalinkCounters = &pAd->RalinkCounters;
+#ifdef RTMP_MAC_USB
+#ifdef STATS_COUNT_SUPPORT
+	if(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF))
+		return;
+#endif /* STATS_COUNT_SUPPORT */
+#endif /* RTMP_MAC_USB */
+
+
+
+	RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
+	RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
+
+	{
+		RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
+	    /* Update RX PLCP error counter*/
+	    pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
+		/* Update False CCA counter*/
+		pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
+	}
+
+#ifdef STATS_COUNT_SUPPORT
+	/* Update FCS counters*/
+	OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
+	pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); /* >> 7);*/
+	if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
+		pAd->WlanCounters.FCSErrorCount.u.HighPart++;
+#endif /* STATS_COUNT_SUPPORT */
+
+	/* Add FCS error count to private counters*/
+	pRalinkCounters->OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
+	OldValue = pRalinkCounters->RealFcsErrCount.u.LowPart;
+	pRalinkCounters->RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
+	if (pRalinkCounters->RealFcsErrCount.u.LowPart < OldValue)
+		pRalinkCounters->RealFcsErrCount.u.HighPart++;
+
+	/* Update Duplicate Rcv check*/
+	pRalinkCounters->DuplicateRcv += RxStaCnt2.field.RxDupliCount;
+#ifdef STATS_COUNT_SUPPORT
+	pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
+#endif /* STATS_COUNT_SUPPORT */
+	/* Update RX Overflow counter*/
+	pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
+	
+	/*pAd->RalinkCounters.RxCount = 0;*/
+#ifdef RTMP_MAC_USB
+	if (pRalinkCounters->RxCount != pAd->watchDogRxCnt)
+	{
+		pAd->watchDogRxCnt = pRalinkCounters->RxCount;
+		pAd->watchDogRxOverFlowCnt = 0;
+	}
+	else
+	{
+		if (RxStaCnt2.field.RxFifoOverflowCount)
+			pAd->watchDogRxOverFlowCnt++;
+		else
+			pAd->watchDogRxOverFlowCnt = 0;
+	}
+#endif /* RTMP_MAC_USB */
+
+	
+	/*if (!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED) || */
+	/*	(OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED) && (pAd->MacTab.Size != 1)))*/
+	if (!pAd->bUpdateBcnCntDone)
+	{
+	/* Update BEACON sent count*/
+	RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
+	RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
+	RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
+	pRalinkCounters->OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
+	pRalinkCounters->OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
+	pRalinkCounters->OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
+	pRalinkCounters->OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
+
+#ifdef STATS_COUNT_SUPPORT
+	pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
+	pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
+	pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
+#endif /* STATS_COUNT_SUPPORT */
+	}
+
+
+	/*if (pAd->bStaFifoTest == TRUE)*/
+#ifdef STATS_COUNT_SUPPORT
+	{
+		RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
+	RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
+	RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
+	RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
+	RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
+		RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
+		RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
+		RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
+		RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
+		pRalinkCounters->TxAggCount += TxAggCnt.field.AggTxCount;
+		pRalinkCounters->TxNonAggCount += TxAggCnt.field.NonAggTxCount;
+		pRalinkCounters->TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
+		pRalinkCounters->TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
+		
+		pRalinkCounters->TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
+		pRalinkCounters->TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
+		pRalinkCounters->TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
+		pRalinkCounters->TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
+	
+		pRalinkCounters->TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
+		pRalinkCounters->TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
+		pRalinkCounters->TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
+		pRalinkCounters->TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
+
+		pRalinkCounters->TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
+		pRalinkCounters->TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
+		pRalinkCounters->TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
+		pRalinkCounters->TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
+
+		pRalinkCounters->TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
+		pRalinkCounters->TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
+
+		/* Calculate the transmitted A-MPDU count*/
+		pRalinkCounters->TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
+		pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count >> 1);
+
+		pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
+		pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count >> 2);
+
+		pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
+		pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
+
+		pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
+		pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count >> 3);
+
+		pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
+		pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
+
+		pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
+		pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
+
+		pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
+		pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
+
+		pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
+		pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count >> 4);	
+	}
+#endif /* STATS_COUNT_SUPPORT */			
+
+#ifdef DBG_DIAGNOSE
+	{
+		RtmpDiagStruct	*pDiag;
+		UCHAR			ArrayCurIdx, i;
+		
+		pDiag = &pAd->DiagStruct;
+		ArrayCurIdx = pDiag->ArrayCurIdx;
+		
+		if (pDiag->inited == 0)
+		{
+			NdisZeroMemory(pDiag, sizeof(struct _RtmpDiagStrcut_));
+			pDiag->ArrayStartIdx = pDiag->ArrayCurIdx = 0;
+			pDiag->inited = 1;
+		}
+		else
+		{
+			/* Tx*/
+			pDiag->TxFailCnt[ArrayCurIdx] = TxStaCnt0.field.TxFailCount;
+			pDiag->TxAggCnt[ArrayCurIdx] = TxAggCnt.field.AggTxCount;
+			pDiag->TxNonAggCnt[ArrayCurIdx] = TxAggCnt.field.NonAggTxCount;
+
+			pDiag->TxAMPDUCnt[ArrayCurIdx][0] = TxAggCnt0.field.AggSize1Count;
+			pDiag->TxAMPDUCnt[ArrayCurIdx][1] = TxAggCnt0.field.AggSize2Count;
+			pDiag->TxAMPDUCnt[ArrayCurIdx][2] = TxAggCnt1.field.AggSize3Count;
+			pDiag->TxAMPDUCnt[ArrayCurIdx][3] = TxAggCnt1.field.AggSize4Count;
+			pDiag->TxAMPDUCnt[ArrayCurIdx][4] = TxAggCnt2.field.AggSize5Count;
+			pDiag->TxAMPDUCnt[ArrayCurIdx][5] = TxAggCnt2.field.AggSize6Count;
+			pDiag->TxAMPDUCnt[ArrayCurIdx][6] = TxAggCnt3.field.AggSize7Count;
+			pDiag->TxAMPDUCnt[ArrayCurIdx][7] = TxAggCnt3.field.AggSize8Count;
+			pDiag->TxAMPDUCnt[ArrayCurIdx][8] = TxAggCnt4.field.AggSize9Count;
+			pDiag->TxAMPDUCnt[ArrayCurIdx][9] = TxAggCnt4.field.AggSize10Count;
+			pDiag->TxAMPDUCnt[ArrayCurIdx][10] = TxAggCnt5.field.AggSize11Count;
+			pDiag->TxAMPDUCnt[ArrayCurIdx][11] = TxAggCnt5.field.AggSize12Count;
+			pDiag->TxAMPDUCnt[ArrayCurIdx][12] = TxAggCnt6.field.AggSize13Count;
+			pDiag->TxAMPDUCnt[ArrayCurIdx][13] = TxAggCnt6.field.AggSize14Count;
+			pDiag->TxAMPDUCnt[ArrayCurIdx][14] = TxAggCnt7.field.AggSize15Count;
+			pDiag->TxAMPDUCnt[ArrayCurIdx][15] = TxAggCnt7.field.AggSize16Count;
+
+			pDiag->RxCrcErrCnt[ArrayCurIdx] = RxStaCnt0.field.CrcErr;
+			
+			INC_RING_INDEX(pDiag->ArrayCurIdx,  DIAGNOSE_TIME);
+			ArrayCurIdx = pDiag->ArrayCurIdx;
+			for (i =0; i < 9; i++)
+			{
+				pDiag->TxDescCnt[ArrayCurIdx][i]= 0;
+				pDiag->TxSWQueCnt[ArrayCurIdx][i] =0;
+				pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
+				pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
+			}
+			pDiag->TxDataCnt[ArrayCurIdx] = 0;
+			pDiag->TxFailCnt[ArrayCurIdx] = 0;
+			pDiag->RxDataCnt[ArrayCurIdx] = 0;
+			pDiag->RxCrcErrCnt[ArrayCurIdx]  = 0;
+/*			for (i = 9; i < 16; i++)*/
+			for (i = 9; i < 24; i++) /* 3*3*/
+			{
+				pDiag->TxDescCnt[ArrayCurIdx][i] = 0;
+				pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
+				pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
+}
+
+			if (pDiag->ArrayCurIdx == pDiag->ArrayStartIdx)
+				INC_RING_INDEX(pDiag->ArrayStartIdx,  DIAGNOSE_TIME);
+		}
+		
+	}
+#endif /* DBG_DIAGNOSE */
+
+
+}
+
+NDIS_STATUS NICLoadFirmware(
+	IN PRTMP_ADAPTER pAd)
+{
+	/*
+	1. For PCI:
+        (1) Write SYS_CTRL bit16(HST_PM_SEL) to 1
+        (2) Write 8051 firmware to RAM.
+        (3) Write SYS_CTRL to 0.
+        (4) Write SYS_CTRL bit0(MCU_RESET) to 1 to do MCU HW reset.
+
+	2. For USB:
+        (1)Get current firmware operation mode via VendorRequest(0x1, 0x11) command.
+        (2) Write SYS_CTRL bit7(MCU_READY) to 0.
+        (3) Write SYS_CTRL bit0(MCU_RESET) to 1 to do MCU reset to run 8051 on ROM.
+        (4) Check MCU ready via SYS_CTRL bit7(MCU_READY).
+        (5) Write 8051 firmware to RAM.
+        (6) Write MAC 0x7014 to 0xffffffff.
+        (7) Write MAC 0x701c to 0xffffffff.
+        (8) Change 8051 from ROM to RAM site via VendorRequest(0x01, 0x8) command.
+	*/
+
+	NDIS_STATUS	 status = NDIS_STATUS_SUCCESS;
+	if (pAd->chipOps.loadFirmware)
+		status = pAd->chipOps.loadFirmware(pAd);
+
+	return status;
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		erase 8051 firmware image in MAC ASIC
+
+	Arguments:
+		Adapter						Pointer to our adapter
+
+	IRQL = PASSIVE_LEVEL
+		
+	========================================================================
+*/
+VOID NICEraseFirmware(
+	IN PRTMP_ADAPTER pAd)
+{
+	if (pAd->chipOps.eraseFirmware)
+		pAd->chipOps.eraseFirmware(pAd);
+	
+}/* End of NICEraseFirmware */
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Load Tx rate switching parameters
+
+	Arguments:
+		Adapter						Pointer to our adapter
+
+	Return Value:
+		NDIS_STATUS_SUCCESS         firmware image load ok
+		NDIS_STATUS_FAILURE         image not found
+
+	IRQL = PASSIVE_LEVEL
+
+	Rate Table Format:
+		1. (B0: Valid Item number) (B1:Initial item from zero)
+		2. Item Number(Dec)      Mode(Hex)     Current MCS(Dec)    TrainUp(Dec)    TrainDown(Dec)
+		
+	========================================================================
+*/
+NDIS_STATUS NICLoadRateSwitchingParams(
+	IN PRTMP_ADAPTER pAd)
+{
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Compare two memory block
+
+	Arguments:
+		pSrc1		Pointer to first memory address
+		pSrc2		Pointer to second memory address
+		
+	Return Value:
+		0:			memory is equal
+		1:			pSrc1 memory is larger
+		2:			pSrc2 memory is larger
+
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+		
+	========================================================================
+*/
+ULONG	RTMPCompareMemory(
+	IN	PVOID	pSrc1,
+	IN	PVOID	pSrc2,
+	IN	ULONG	Length)
+{
+	PUCHAR	pMem1;
+	PUCHAR	pMem2;
+	ULONG	Index = 0;
+
+	pMem1 = (PUCHAR) pSrc1;
+	pMem2 = (PUCHAR) pSrc2;
+
+	for (Index = 0; Index < Length; Index++)
+	{
+		if (pMem1[Index] > pMem2[Index])
+			return (1);
+		else if (pMem1[Index] < pMem2[Index])
+			return (2);
+	}
+
+	/* Equal*/
+	return (0);
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Zero out memory block
+
+	Arguments:
+		pSrc1		Pointer to memory address
+		Length		Size
+
+	Return Value:
+		None
+		
+	IRQL = PASSIVE_LEVEL
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+		
+	========================================================================
+*/
+VOID	RTMPZeroMemory(
+	IN	PVOID	pSrc,
+	IN	ULONG	Length)
+{
+	PUCHAR	pMem;
+	ULONG	Index = 0;
+
+	pMem = (PUCHAR) pSrc;
+
+	for (Index = 0; Index < Length; Index++)
+	{
+		pMem[Index] = 0x00;
+	}
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Copy data from memory block 1 to memory block 2
+
+	Arguments:
+		pDest		Pointer to destination memory address
+		pSrc		Pointer to source memory address
+		Length		Copy size
+		
+	Return Value:
+		None
+
+	IRQL = PASSIVE_LEVEL
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+		
+	========================================================================
+*/
+VOID RTMPMoveMemory(
+	OUT	PVOID	pDest,
+	IN	PVOID	pSrc,
+	IN	ULONG	Length)
+{
+	PUCHAR	pMem1;
+	PUCHAR	pMem2;
+	UINT	Index;
+
+	ASSERT((Length==0) || (pDest && pSrc));
+
+	pMem1 = (PUCHAR) pDest;
+	pMem2 = (PUCHAR) pSrc;
+
+	for (Index = 0; Index < Length; Index++)
+	{
+		pMem1[Index] = pMem2[Index];
+	}
+}
+
+VOID UserCfgExit(
+	IN RTMP_ADAPTER *pAd)
+{
+#ifdef DOT11_N_SUPPORT
+	BATableExit(pAd);
+#endif /* DOT11_N_SUPPORT */
+
+	NdisFreeSpinLock(&pAd->MacTabLock);
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Initialize port configuration structure
+
+	Arguments:
+		Adapter						Pointer to our adapter
+
+	Return Value:
+		None
+
+	IRQL = PASSIVE_LEVEL
+
+	Note:
+		
+	========================================================================
+*/
+VOID	UserCfgInit(
+	IN	PRTMP_ADAPTER pAd)
+{
+	UINT i;
+/*	EDCA_PARM DefaultEdcaParm;*/
+    UINT key_index, bss_index;
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));    
+	 
+	pAd->IndicateMediaState = NdisMediaStateDisconnected; 
+	
+	/*  part I. intialize common configuration*/
+	
+#ifdef RTMP_MAC_USB
+	pAd->BulkOutReq = 0;
+	
+	pAd->BulkOutComplete = 0;
+	pAd->BulkOutCompleteOther = 0;
+	pAd->BulkOutCompleteCancel = 0;
+	pAd->BulkInReq = 0;
+	pAd->BulkInComplete = 0;
+	pAd->BulkInCompleteFail = 0;
+
+	/*pAd->QuickTimerP = 100;*/
+	/*pAd->TurnAggrBulkInCount = 0;*/
+	pAd->bUsbTxBulkAggre = 0;
+
+#ifdef LED_CONTROL_SUPPORT
+	/* init as unsed value to ensure driver will set to MCU once.*/
+	pAd->LedCntl.LedIndicatorStrength = 0xFF;
+#endif /* LED_CONTROL_SUPPORT */
+
+	pAd->CommonCfg.MaxPktOneTxBulk = 2;
+	pAd->CommonCfg.TxBulkFactor = 1;
+	pAd->CommonCfg.RxBulkFactor =1;
+
+	pAd->CommonCfg.TxPower = 100; /*mW*/
+
+	NdisZeroMemory(&pAd->CommonCfg.IOTestParm, sizeof(pAd->CommonCfg.IOTestParm));
+#ifdef CONFIG_STA_SUPPORT
+	pAd->CountDowntoPsm = 0;
+#endif /* CONFIG_STA_SUPPORT */
+
+#endif /* RTMP_MAC_USB */
+
+	for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
+	{
+		for(bss_index = 0; bss_index < MAX_MBSSID_NUM(pAd) + MAX_P2P_NUM; bss_index++)
+		{
+			pAd->SharedKey[bss_index][key_index].KeyLen = 0;
+			pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
+		}
+	}
+
+	pAd->bLocalAdminMAC = FALSE;
+	pAd->EepromAccess = FALSE;
+	
+	pAd->Antenna.word = 0; 
+	pAd->CommonCfg.BBPCurrentBW = BW_20;
+
+
+	pAd->bAutoTxAgcA = FALSE;			/* Default is OFF*/
+	pAd->bAutoTxAgcG = FALSE;			/* Default is OFF*/
+#ifdef RTMP_INTERNAL_TX_ALC
+	pAd->TxPowerCtrl.bInternalTxALC = FALSE; /* Off by default*/
+#endif /* RTMP_INTERNAL_TX_ALC */
+	pAd->RfIcType = RFIC_2820;
+
+	/* Init timer for reset complete event*/
+	pAd->CommonCfg.CentralChannel = 1;
+	pAd->bForcePrintTX = FALSE;
+	pAd->bForcePrintRX = FALSE;
+	pAd->bStaFifoTest = FALSE;
+	pAd->bProtectionTest = FALSE;
+	pAd->bHCCATest = FALSE;
+	pAd->bGenOneHCCA = FALSE;
+	pAd->CommonCfg.Dsifs = 10;      /* in units of usec */
+	pAd->CommonCfg.TxPower = 100; /* mW*/
+	pAd->CommonCfg.TxPowerPercentage = 0xffffffff; /* AUTO*/
+	pAd->CommonCfg.TxPowerDefault = 0xffffffff; /* AUTO*/
+	pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; /* use Long preamble on TX by defaut*/
+	pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
+	pAd->CommonCfg.RtsThreshold = 2347;
+	pAd->CommonCfg.FragmentThreshold = 2346;
+	pAd->CommonCfg.UseBGProtection = 0;    /* 0: AUTO*/
+	pAd->CommonCfg.bEnableTxBurst = TRUE; /* 0;    	*/
+	pAd->CommonCfg.PhyMode = 0xff;     /* unknown*/
+	pAd->CommonCfg.SavedPhyMode = 0xff;
+	pAd->CommonCfg.BandState = UNKNOWN_BAND;
+	pAd->CommonCfg.RadarDetect.CSPeriod = 10;
+	pAd->CommonCfg.RadarDetect.CSCount = 0;
+	pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
+	pAd->CommonCfg.bDFSIndoor = 1;
+	
+#ifdef RT3052
+#endif /* RT3052 */
+
+
+#ifdef CARRIER_DETECTION_SUPPORT
+	pAd->CommonCfg.carrier_func = DISABLE_TONE_RADAR;
+
+#ifdef TONE_RADAR_DETECT_SUPPORT
+
+#ifdef TONE_RADAR_DETECT_V1
+	pAd->CommonCfg.carrier_func = TONE_RADAR_V1;
+#endif /*TONE_RADAR_DETECT_V1 */
+
+#ifdef TONE_RADAR_DETECT_V2
+	pAd->CommonCfg.carrier_func = TONE_RADAR_V2;
+#endif /* TONE_RADAR_DETECT_V2 */
+
+	pAd->CommonCfg.CarrierDetect.delta = CARRIER_DETECT_DELTA;
+	pAd->CommonCfg.CarrierDetect.div_flag = CARRIER_DETECT_DIV_FLAG;
+	pAd->CommonCfg.CarrierDetect.criteria = CARRIER_DETECT_CRITIRIA;
+	pAd->CommonCfg.CarrierDetect.threshold = CARRIER_DETECT_THRESHOLD;
+#endif /* TONE_RADAR_DETECT_SUPPORT */
+#endif /* CARRIER_DETECTION_SUPPORT */
+
+	pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
+	pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
+	pAd->CommonCfg.bAPSDCapable = FALSE;
+	pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
+	pAd->CommonCfg.TriggerTimerCount = 0;
+	pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
+	pAd->CommonCfg.bCountryFlag = FALSE;
+	pAd->CommonCfg.TxStream = 0;
+	pAd->CommonCfg.RxStream = 0;
+
+	NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
+
+#ifdef DOT11_N_SUPPORT
+	NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
+	pAd->HTCEnable = FALSE;
+	pAd->bBroadComHT = FALSE;
+	pAd->CommonCfg.bRdg = FALSE;
+	
+#ifdef DOT11N_DRAFT3
+	pAd->CommonCfg.Dot11OBssScanPassiveDwell = dot11OBSSScanPassiveDwell;	/* Unit : TU. 5~1000*/
+	pAd->CommonCfg.Dot11OBssScanActiveDwell = dot11OBSSScanActiveDwell;	/* Unit : TU. 10~1000*/
+	pAd->CommonCfg.Dot11BssWidthTriggerScanInt = dot11BSSWidthTriggerScanInterval;	/* Unit : Second	*/
+	pAd->CommonCfg.Dot11OBssScanPassiveTotalPerChannel = dot11OBSSScanPassiveTotalPerChannel;	/* Unit : TU. 200~10000*/
+	pAd->CommonCfg.Dot11OBssScanActiveTotalPerChannel = dot11OBSSScanActiveTotalPerChannel;	/* Unit : TU. 20~10000*/
+	pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor = dot11BSSWidthChannelTransactionDelayFactor;
+	pAd->CommonCfg.Dot11OBssScanActivityThre = dot11BSSScanActivityThreshold;	/* Unit : percentage*/
+	pAd->CommonCfg.Dot11BssWidthChanTranDelay = (pAd->CommonCfg.Dot11BssWidthTriggerScanInt * pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor);
+
+	pAd->CommonCfg.bBssCoexEnable = TRUE; /* by default, we enable this feature, you can disable it via the profile or ioctl command*/
+	pAd->CommonCfg.BssCoexApCntThr = 0; 
+#endif  /* DOT11N_DRAFT3 */
+
+	NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
+	pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
+	pAd->CommonCfg.BACapability.field.MpduDensity = 0;
+	pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
+	pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; /*32;*/
+	pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; /*32;*/
+	DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));    
+
+	pAd->CommonCfg.BACapability.field.AutoBA = FALSE;	
+	BATableInit(pAd, &pAd->BATable);
+
+	pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
+	pAd->CommonCfg.bHTProtect = 1;
+	pAd->CommonCfg.bMIMOPSEnable = TRUE;
+	pAd->CommonCfg.bBADecline = FALSE;
+	pAd->CommonCfg.bDisableReordering = FALSE;
+
+	if (pAd->MACVersion == 0x28720200)
+	{
+		pAd->CommonCfg.TxBASize = 13; /*by Jerry recommend*/
+	}else{
+		pAd->CommonCfg.TxBASize = 7;
+	}
+
+	pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
+#endif /* DOT11_N_SUPPORT */
+
+	/*pAd->CommonCfg.HTPhyMode.field.BW = BW_20;*/
+	/*pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;*/
+	/*pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;*/
+	/*pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;*/
+	pAd->CommonCfg.TxRate = RATE_6;
+	
+	pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
+	pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
+	pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
+
+	pAd->CommonCfg.BeaconPeriod = 100;     /* in mSec*/
+
+
+
+
+#ifdef MCAST_RATE_SPECIFIC
+	pAd->CommonCfg.MCastPhyMode.word
+	= pAd->MacTab.Content[MCAST_WCID].HTPhyMode.word;
+#endif /* MCAST_RATE_SPECIFIC */
+
+	/* WFA policy - disallow TH rate in WEP or TKIP cipher */
+	pAd->CommonCfg.HT_DisallowTKIP = TRUE;
+
+	
+	/* part II. intialize STA specific configuration*/
+	
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
+		RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
+		RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
+		RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
+
+		pAd->StaCfg.Psm = PWR_ACTIVE;
+
+		pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
+		pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
+		pAd->StaCfg.bMixCipher = FALSE;	
+		pAd->StaCfg.DefaultKeyId = 0;
+
+		/* 802.1x port control*/
+		pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
+		pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
+		pAd->StaCfg.LastMicErrorTime = 0;
+		pAd->StaCfg.MicErrCnt        = 0;
+		pAd->StaCfg.bBlockAssoc      = FALSE;
+		pAd->StaCfg.WpaState         = SS_NOTUSE;
+
+		pAd->CommonCfg.NdisRadioStateOff = FALSE;		/* New to support microsoft disable radio with OID command*/
+
+		pAd->StaCfg.RssiTrigger = 0;
+		NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
+		pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
+		pAd->StaCfg.AtimWin = 0;
+		pAd->StaCfg.DefaultListenCount = 3;/*default listen count;*/
+		pAd->StaCfg.BssType = BSS_INFRA;  /* BSS_INFRA or BSS_ADHOC or BSS_MONITOR*/
+		pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
+		OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
+		OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
+
+		pAd->StaCfg.bAutoTxRateSwitch = TRUE;
+		pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
+		pAd->StaCfg.bAutoConnectIfNoSSID = FALSE;
+#ifdef RTMP_FREQ_CALIBRATION_SUPPORT
+		pAd->StaCfg.AdaptiveFreq = TRUE; //Todo: iwpriv and profile support.
+#endif /* RTMP_FREQ_CALIBRATION_SUPPORT */
+	}
+
+#ifdef EXT_BUILD_CHANNEL_LIST
+	pAd->StaCfg.IEEE80211dClientMode = Rt802_11_D_None;
+#endif /* EXT_BUILD_CHANNEL_LIST */
+
+#endif /* CONFIG_STA_SUPPORT */
+
+	/* global variables mXXXX used in MAC protocol state machines*/
+	OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
+	OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
+	OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
+
+	/* PHY specification*/
+	pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;		/* default PHY mode*/
+	OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED);  /* CCK use LONG preamble*/
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		/* user desired power mode*/
+		pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
+		pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
+		pAd->StaCfg.bWindowsACCAMEnable = FALSE;
+
+		pAd->StaCfg.bHwRadio  = TRUE; /* Default Hardware Radio status is On*/
+		pAd->StaCfg.bSwRadio  = TRUE; /* Default Software Radio status is On*/
+		pAd->StaCfg.bRadio    = TRUE; /* bHwRadio && bSwRadio*/
+		pAd->StaCfg.bHardwareRadio = FALSE;		/* Default is OFF*/
+		pAd->StaCfg.bShowHiddenSSID = FALSE;		/* Default no show*/
+
+		/* Nitro mode control*/
+		pAd->StaCfg.bAutoReconnect = TRUE;
+
+		/* Save the init time as last scan time, the system should do scan after 2 seconds.*/
+		/* This patch is for driver wake up from standby mode, system will do scan right away.*/
+		NdisGetSystemUpTime(&pAd->StaCfg.LastScanTime);
+		if (pAd->StaCfg.LastScanTime > 10 * OS_HZ)
+			pAd->StaCfg.LastScanTime -= (10 * OS_HZ);
+		
+		NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
+#ifdef PROFILE_STORE
+		pAd->bWriteDat = FALSE;
+#endif /* PROFILE_STORE */
+#ifdef WPA_SUPPLICANT_SUPPORT
+		pAd->StaCfg.IEEE8021X = FALSE;
+		pAd->StaCfg.IEEE8021x_required_keys = FALSE;
+		pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
+		pAd->StaCfg.bRSN_IE_FromWpaSupplicant = FALSE;
+#ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
+		pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
+#ifdef PROFILE_STORE
+		pAd->bWriteDat = TRUE;
+#endif /* PROFILE_STORE */
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+		pAd->StaCfg.bLostAp = FALSE;
+		pAd->StaCfg.pWpsProbeReqIe = NULL;
+		pAd->StaCfg.WpsProbeReqIeLen = 0;
+		pAd->StaCfg.pWpaAssocIe = NULL;
+		pAd->StaCfg.WpaAssocIeLen = 0;
+		pAd->StaCfg.WpaSupplicantScanCount = 0;
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+		NdisZeroMemory(pAd->StaCfg.ReplayCounter, 8);
+
+
+		pAd->StaCfg.bAutoConnectByBssid = FALSE;
+		pAd->StaCfg.BeaconLostTime = BEACON_LOST_TIME;
+		NdisZeroMemory(pAd->StaCfg.WpaPassPhrase, 64);    
+		pAd->StaCfg.WpaPassPhraseLen = 0;
+		pAd->StaCfg.bAutoRoaming = FALSE;
+		pAd->StaCfg.bForceTxBurst = FALSE;
+		pAd->StaCfg.bNotFirstScan = FALSE;
+		pAd->StaCfg.bImprovedScan = FALSE;
+#ifdef DOT11_N_SUPPORT
+		pAd->StaCfg.bAdhocN = TRUE;
+#endif /* DOT11_N_SUPPORT */
+		pAd->StaCfg.bFastConnect = FALSE;
+		pAd->StaCfg.bAdhocCreator = FALSE;
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	/* Default for extra information is not valid*/
+	pAd->ExtraInfo = EXTRA_INFO_CLEAR;
+	
+	/* Default Config change flag*/
+	pAd->bConfigChanged = FALSE;
+
+	/* */
+	/* part III. AP configurations*/
+	
+
+
+	
+	/* part IV. others*/
+	
+	/* dynamic BBP R66:sensibity tuning to overcome background noise*/
+	pAd->BbpTuning.bEnable                = TRUE;  
+	pAd->BbpTuning.FalseCcaLowerThreshold = 100;
+	pAd->BbpTuning.FalseCcaUpperThreshold = 512;
+	pAd->BbpTuning.R66Delta               = 4;
+	pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
+	
+	
+	/* Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.*/
+	/* if not initial this value, the default value will be 0.*/
+	
+	pAd->BbpTuning.R66CurrentValue = 0x38;
+
+	pAd->Bbp94 = BBPR94_DEFAULT;
+	pAd->BbpForCCK = FALSE;
+	
+	/* Default is FALSE for test bit 1*/
+	/*pAd->bTest1 = FALSE;*/
+	
+	/* initialize MAC table and allocate spin lock*/
+	NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
+	InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
+	NdisAllocateSpinLock(pAd, &pAd->MacTabLock);
+
+	/*RTMPInitTimer(pAd, &pAd->RECBATimer, RECBATimerTimeout, pAd, TRUE);*/
+	/*RTMPSetTimer(&pAd->RECBATimer, REORDER_EXEC_INTV);*/
+
+#ifdef RALINK_ATE
+	NdisZeroMemory(&pAd->ate, sizeof(ATE_INFO));
+	pAd->ate.Mode = ATE_STOP;
+#ifdef RT3350
+	if (IS_RT3350(pAd))
+		pAd->ate.PABias = 0;
+#endif /* RT3350  */
+	pAd->ate.TxCount = 1000;/* to sync with QA and to exceed TX_RING_SIZE ... */
+	pAd->ate.TxDoneCount = 0;
+	pAd->ate.RFFreqOffset = 0;
+	pAd->ate.Payload = 0xA5;/* to be backward compatible */	
+	pAd->ate.IPG = 200;/* 200 : sync with QA */	
+	pAd->ate.TxLength = 1024;
+	pAd->ate.TxWI.ShortGI = 0;/* LONG GI : 800 ns*/
+	pAd->ate.TxWI.PHYMODE = MODE_CCK;
+	pAd->ate.TxWI.MCS = 3;
+	pAd->ate.TxWI.BW = BW_20;
+	/* please do not change this default channel value */
+	pAd->ate.Channel = 1;
+
+
+	pAd->ate.QID = QID_AC_BE;
+
+	pAd->ate.Addr1[0] = 0x00;
+	pAd->ate.Addr1[1] = 0x11;
+	pAd->ate.Addr1[2] = 0x22;
+	pAd->ate.Addr1[3] = 0xAA;
+	pAd->ate.Addr1[4] = 0xBB;
+	pAd->ate.Addr1[5] = 0xCC;
+
+	NdisMoveMemory(pAd->ate.Addr2, pAd->ate.Addr1, ETH_LENGTH_OF_ADDRESS);
+	NdisMoveMemory(pAd->ate.Addr3, pAd->ate.Addr1, ETH_LENGTH_OF_ADDRESS);
+
+	pAd->ate.bRxFER = 0;
+	pAd->ate.bQAEnabled = FALSE;
+	pAd->ate.bQATxStart = FALSE;
+	pAd->ate.bQARxStart = FALSE;
+	pAd->ate.bAutoTxAlc = FALSE;
+#ifdef TXBF_SUPPORT
+	pAd->ate.bTxBF = FALSE;	
+#endif /* TXBF_SUPPORT */
+
+#ifdef RTMP_MAC_USB
+#endif /* RTMP_MAC_USB */
+
+#ifdef RALINK_QA
+	pAd->ate.TxStatus = 0;
+	RtmpOsTaskPidInit(&pAd->ate.AtePid);
+/*	pAd->ate.AtePid = THREAD_PID_INIT_VALUE;*/
+#endif /* RALINK_QA */
+#endif /* RALINK_ATE */
+
+
+	pAd->CommonCfg.bWiFiTest = FALSE;
+
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef PCIE_PS_SUPPORT
+	RTMP_SET_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP);
+#endif /* PCIE_PS_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+#ifdef ANT_DIVERSITY_SUPPORT
+		pAd->RxAnt.Pair1PrimaryRxAnt = 0;
+		pAd->RxAnt.Pair1SecondaryRxAnt = 1;
+
+		pAd->RxAnt.EvaluatePeriod = 0;
+		pAd->RxAnt.RcvPktNumWhenEvaluate = 0;
+#ifdef CONFIG_STA_SUPPORT
+		pAd->RxAnt.Pair1AvgRssi[0] = pAd->RxAnt.Pair1AvgRssi[1] = 0;
+#endif /* CONFIG_STA_SUPPORT */
+#endif /* ANT_DIVERSITY_SUPPORT */
+
+
+#if defined(AP_SCAN_SUPPORT) || defined(CONFIG_STA_SUPPORT)
+	for (i = 0; i < MAX_LEN_OF_BSS_TABLE; i++) 
+	{
+		PBSS_ENTRY	pBssEntry = &pAd->ScanTab.BssEntry[i];
+		
+		if (pAd->ProbeRespIE[i].pIe)
+			pBssEntry->pVarIeFromProbRsp = pAd->ProbeRespIE[i].pIe;
+		else
+			pBssEntry->pVarIeFromProbRsp = NULL;
+	}
+#endif /* defined(AP_SCAN_SUPPORT) || defined(CONFIG_STA_SUPPORT) */
+
+
+
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
+}
+
+/* IRQL = PASSIVE_LEVEL*/
+UCHAR BtoH(STRING ch)
+{
+	if (ch >= '0' && ch <= '9') return (ch - '0');        /* Handle numerals*/
+	if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA);  /* Handle capitol hex digits*/
+	if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA);  /* Handle small hex digits*/
+	return(255);
+}
+
+
+/*  FUNCTION: AtoH(char *, UCHAR *, int)*/
+
+/*  PURPOSE:  Converts ascii string to network order hex*/
+
+/*  PARAMETERS:*/
+/*    src    - pointer to input ascii string*/
+/*    dest   - pointer to output hex*/
+/*    destlen - size of dest*/
+
+/*  COMMENTS:*/
+
+/*    2 ascii bytes make a hex byte so must put 1st ascii byte of pair*/
+/*    into upper nibble and 2nd ascii byte of pair into lower nibble.*/
+
+/* IRQL = PASSIVE_LEVEL*/
+
+void AtoH(PSTRING src, PUCHAR dest, int destlen)
+{
+	PSTRING srcptr;
+	PUCHAR destTemp;
+
+	srcptr = src;	
+	destTemp = (PUCHAR) dest; 
+
+	while(destlen--)
+	{
+		*destTemp = BtoH(*srcptr++) << 4;    /* Put 1st ascii byte in upper nibble.*/
+		*destTemp += BtoH(*srcptr++);      /* Add 2nd ascii byte to above.*/
+		destTemp++;
+	}
+}
+
+
+/*+++Mark by shiang, not use now, need to remove after confirm*/
+/*---Mark by shiang, not use now, need to remove after confirm*/
+
+
+/*
+========================================================================
+Routine Description:
+	Add a timer to the timer list.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	pRsc			- the OS resource
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID	RTMP_TimerListAdd(
+	IN	PRTMP_ADAPTER			pAd,
+	IN	VOID					*pRsc)
+{
+	LIST_HEADER *pRscList = &pAd->RscTimerCreateList;
+	LIST_RESOURCE_OBJ_ENTRY *pObj;
+
+
+	/* try to find old entry */
+	pObj = (LIST_RESOURCE_OBJ_ENTRY *)(pRscList->pHead);
+	while(1)
+	{
+		if (pObj == NULL)
+			break;
+		if ((ULONG)(pObj->pRscObj) == (ULONG)pRsc)
+			return; /* exists */
+		pObj = pObj->pNext;
+	}
+
+	/* allocate a timer record entry */
+	os_alloc_mem(NULL, (UCHAR **)&(pObj), sizeof(LIST_RESOURCE_OBJ_ENTRY));
+	if (pObj == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: alloc timer obj fail!\n", __FUNCTION__));
+		return;
+	}
+	else
+	{
+		pObj->pRscObj = pRsc;
+		insertTailList(pRscList, (LIST_ENTRY *)pObj);
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: add timer obj %lx!\n", __FUNCTION__, (ULONG)pRsc));
+	}
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Cancel all timers in the timer list.
+
+Arguments:
+	pAd				- WLAN control block pointer
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID	RTMP_TimerListRelease(
+	IN	PRTMP_ADAPTER			pAd)
+{
+	LIST_HEADER *pRscList = &pAd->RscTimerCreateList;
+	LIST_RESOURCE_OBJ_ENTRY *pObj, *pObjOld;
+	BOOLEAN Cancel;
+
+
+	/* try to find old entry */
+	pObj = (LIST_RESOURCE_OBJ_ENTRY *)(pRscList->pHead);
+	while(1)
+	{
+		if (pObj == NULL)
+			break;
+		DBGPRINT(RT_DEBUG_TRACE, ("%s: Cancel timer obj %lx!\n", __FUNCTION__, (ULONG)(pObj->pRscObj)));
+		RTMPReleaseTimer(pObj->pRscObj, &Cancel);
+		pObjOld = pObj;
+		pObj = pObj->pNext;
+		os_free_mem(NULL, pObjOld);
+	}
+
+	/* reset TimerList */
+	initList(&pAd->RscTimerCreateList);
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Init timer objects
+
+	Arguments:
+		pAd			Pointer to our adapter
+		pTimer				Timer structure
+		pTimerFunc			Function to execute when timer expired
+		Repeat				Ture for period timer
+
+	Return Value:
+		None
+
+	Note:
+		
+	========================================================================
+*/
+VOID	RTMPInitTimer(
+	IN	PRTMP_ADAPTER			pAd,
+	IN	PRALINK_TIMER_STRUCT	pTimer,
+	IN	PVOID					pTimerFunc,
+	IN	PVOID					pData,
+	IN	BOOLEAN					Repeat)
+{
+	RTMP_SEM_LOCK(&TimerSemLock);
+
+	RTMP_TimerListAdd(pAd, pTimer);
+
+	
+	/* Set Valid to TRUE for later used.*/
+	/* It will crash if we cancel a timer or set a timer */
+	/* that we haven't initialize before.*/
+	/* */
+	pTimer->Valid      = TRUE;
+	
+	pTimer->PeriodicType = Repeat;
+	pTimer->State      = FALSE;
+	pTimer->cookie = (ULONG) pData;
+	pTimer->pAd = pAd;
+
+	RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj,	pTimerFunc, (PVOID) pTimer, &pAd->RscTimerMemList);	
+	DBGPRINT(RT_DEBUG_TRACE,("%s: %lx\n",__FUNCTION__, (ULONG)pTimer));
+
+	RTMP_SEM_UNLOCK(&TimerSemLock);
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Init timer objects
+
+	Arguments:
+		pTimer				Timer structure
+		Value				Timer value in milliseconds
+
+	Return Value:
+		None
+
+	Note:
+		To use this routine, must call RTMPInitTimer before.
+		
+	========================================================================
+*/
+VOID	RTMPSetTimer(
+	IN	PRALINK_TIMER_STRUCT	pTimer,
+	IN	ULONG					Value)
+{
+	RTMP_SEM_LOCK(&TimerSemLock);
+
+	if (pTimer->Valid)
+	{
+		RTMP_ADAPTER *pAd;
+		
+		pAd = (RTMP_ADAPTER *)pTimer->pAd;
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS | fRTMP_ADAPTER_NIC_NOT_EXIST))
+		{
+			DBGPRINT_ERR(("RTMPSetTimer failed, Halt in Progress!\n"));
+			RTMP_SEM_UNLOCK(&TimerSemLock);
+			return;
+		}
+		
+		pTimer->TimerValue = Value;
+		pTimer->State      = FALSE;
+		if (pTimer->PeriodicType == TRUE)
+		{
+			pTimer->Repeat = TRUE;
+			RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
+		}
+		else
+		{
+			pTimer->Repeat = FALSE;
+			RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
+		}
+
+		DBGPRINT(RT_DEBUG_INFO,("%s: %lx\n",__FUNCTION__, (ULONG)pTimer));
+	}
+	else
+	{
+		DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
+	}
+	RTMP_SEM_UNLOCK(&TimerSemLock);
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Init timer objects
+
+	Arguments:
+		pTimer				Timer structure
+		Value				Timer value in milliseconds
+
+	Return Value:
+		None
+
+	Note:
+		To use this routine, must call RTMPInitTimer before.
+		
+	========================================================================
+*/
+VOID	RTMPModTimer(
+	IN	PRALINK_TIMER_STRUCT	pTimer,
+	IN	ULONG					Value)
+{
+	BOOLEAN	Cancel;
+
+
+	RTMP_SEM_LOCK(&TimerSemLock);
+
+	if (pTimer->Valid)
+	{
+		pTimer->TimerValue = Value;
+		pTimer->State      = FALSE;
+		if (pTimer->PeriodicType == TRUE)
+		{
+			RTMP_SEM_UNLOCK(&TimerSemLock);
+			RTMPCancelTimer(pTimer, &Cancel);
+			RTMPSetTimer(pTimer, Value);
+		}
+		else
+		{
+			RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
+			RTMP_SEM_UNLOCK(&TimerSemLock);
+		}
+		DBGPRINT(RT_DEBUG_TRACE,("%s: %lx\n",__FUNCTION__, (ULONG)pTimer));
+	}
+	else
+	{
+		DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
+		RTMP_SEM_UNLOCK(&TimerSemLock);
+	}
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Cancel timer objects
+
+	Arguments:
+		Adapter						Pointer to our adapter
+
+	Return Value:
+		None
+
+	IRQL = PASSIVE_LEVEL
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+		1.) To use this routine, must call RTMPInitTimer before.
+		2.) Reset NIC to initial state AS IS system boot up time.
+		
+	========================================================================
+*/
+VOID	RTMPCancelTimer(
+	IN	PRALINK_TIMER_STRUCT	pTimer,
+	OUT	BOOLEAN					*pCancelled)
+{
+	RTMP_SEM_LOCK(&TimerSemLock);
+
+	if (pTimer->Valid)
+	{
+		if (pTimer->State == FALSE)
+			pTimer->Repeat = FALSE;
+		
+		RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
+		
+		if (*pCancelled == TRUE)
+			pTimer->State = TRUE;
+
+#ifdef RTMP_TIMER_TASK_SUPPORT
+		/* We need to go-through the TimerQ to findout this timer handler and remove it if */
+		/*		it's still waiting for execution.*/
+		RtmpTimerQRemove(pTimer->pAd, pTimer);
+#endif /* RTMP_TIMER_TASK_SUPPORT */
+
+		DBGPRINT(RT_DEBUG_INFO,("%s: %lx\n",__FUNCTION__, (ULONG)pTimer));
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_INFO,("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
+	}
+
+	RTMP_SEM_UNLOCK(&TimerSemLock);
+}
+
+
+VOID	RTMPReleaseTimer(
+	IN	PRALINK_TIMER_STRUCT	pTimer,
+	OUT	BOOLEAN					*pCancelled)
+{
+	RTMP_SEM_LOCK(&TimerSemLock);
+
+	if (pTimer->Valid)
+	{
+		if (pTimer->State == FALSE)
+			pTimer->Repeat = FALSE;
+		
+		RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
+		
+		if (*pCancelled == TRUE)
+			pTimer->State = TRUE;
+
+#ifdef RTMP_TIMER_TASK_SUPPORT
+		/* We need to go-through the TimerQ to findout this timer handler and remove it if */
+		/*		it's still waiting for execution.*/
+		RtmpTimerQRemove(pTimer->pAd, pTimer);
+#endif /* RTMP_TIMER_TASK_SUPPORT */
+
+		/* release timer */
+		RTMP_OS_Release_Timer(&pTimer->TimerObj);
+
+		pTimer->Valid = FALSE;
+
+		DBGPRINT(RT_DEBUG_INFO,("%s: %lx\n",__FUNCTION__, (ULONG)pTimer));
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_INFO,("RTMPReleasefailed, Timer hasn't been initialize!\n"));
+	}
+
+	RTMP_SEM_UNLOCK(&TimerSemLock);
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Enable RX 
+
+	Arguments:
+		pAd						Pointer to our adapter
+
+	Return Value:
+		None
+
+	IRQL <= DISPATCH_LEVEL
+	
+	Note:
+		Before Enable RX, make sure you have enabled Interrupt.
+	========================================================================
+*/
+VOID RTMPEnableRxTx(
+	IN PRTMP_ADAPTER	pAd)
+{
+/*	WPDMA_GLO_CFG_STRUC	GloCfg;*/
+/*	ULONG	i = 0;*/
+	UINT32 rx_filter_flag;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
+
+	/* Enable Rx DMA.*/
+	RT28XXDMAEnable(pAd);
+
+	/* enable RX of MAC block*/
+	if (pAd->OpMode == OPMODE_AP)
+	{
+		rx_filter_flag = APNORMAL;
+
+
+		RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);     /* enable RX of DMA block*/
+	}
+#ifdef CONFIG_STA_SUPPORT
+	else
+	{
+#ifdef XLINK_SUPPORT
+		if (pAd->StaCfg.PSPXlink)
+			rx_filter_flag = PSPXLINK;
+		else
+#endif /* XLINK_SUPPORT */	
+			rx_filter_flag = STANORMAL;     /* Staion not drop control frame will fail WiFi Certification.*/
+		RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);
+	}
+#endif /* CONFIG_STA_SUPPORT */
+	
+	{
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
+	}
+	DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));	
+}
+
+
+/*+++Add by shiang, move from os/linux/rt_main_dev.c*/
+void CfgInitHook(PRTMP_ADAPTER pAd)
+{
+	/*pAd->bBroadComHT = TRUE;*/
+}
+
+/*---Add by shiang, move from os/linux/rt_main_dev.c*/
+
+
+static INT RtmpChipOpsRegister(
+	IN RTMP_ADAPTER *pAd,
+	IN INT			infType)
+{
+	RTMP_CHIP_OP	*pChipOps = &pAd->chipOps;
+	int status;
+	
+	memset(pChipOps, 0, sizeof(RTMP_CHIP_OP));
+
+	/* set eeprom related hook functions */
+	status = RtmpChipOpsEepromHook(pAd, infType);
+
+	/* set mcu related hook functions */
+	switch(infType)
+	{
+
+#ifdef RTMP_USB_SUPPORT
+		case RTMP_DEV_INF_USB:
+			pChipOps->loadFirmware = RtmpAsicLoadFirmware;
+			pChipOps->sendCommandToMcu = RtmpAsicSendCommandToMcu;
+			break;
+#endif /* RTMP_USB_SUPPORT */
+
+		default:
+			break;
+	}
+
+	return status;
+}
+
+
+INT RtmpRaDevCtrlInit(
+	IN	VOID			*pAdSrc,
+	IN	RTMP_INF_TYPE	infType)
+{
+	PRTMP_ADAPTER	pAd = (PRTMP_ADAPTER)pAdSrc;
+	/*VOID	*handle;*/
+
+	/* Assign the interface type. We need use it when do register/EEPROM access.*/
+	pAd->infType = infType;
+
+#ifdef CONFIG_STA_SUPPORT
+	pAd->OpMode = OPMODE_STA;
+	DBGPRINT(RT_DEBUG_TRACE, ("STA Driver version-%s\n", STA_DRIVER_VERSION));
+#endif /* CONFIG_STA_SUPPORT */
+
+
+
+#ifdef RTMP_MAC_USB
+	RTMP_SEM_EVENT_INIT(&(pAd->UsbVendorReq_semaphore), &pAd->RscSemMemList);
+	RTMP_SEM_EVENT_INIT(&(pAd->UsbVendorReq_semaphore2), &pAd->RscSemMemList);
+	os_alloc_mem(pAd, (PUCHAR *)&pAd->UsbVendorReqBuf, MAX_PARAM_BUFFER_SIZE - 1);
+	if (pAd->UsbVendorReqBuf == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("Allocate vendor request temp buffer failed!\n"));
+		return FALSE;
+	}
+#endif /* RTMP_MAC_USB */
+
+	RtmpChipOpsRegister(pAd, infType);
+
+#ifdef MULTIPLE_CARD_SUPPORT
+{
+	extern BOOLEAN RTMP_CardInfoRead(PRTMP_ADAPTER pAd);
+
+	/* find its profile path*/
+	pAd->MC_RowID = -1; /* use default profile path*/
+	RTMP_CardInfoRead(pAd);
+
+	if (pAd->MC_RowID == -1)
+#ifdef CONFIG_STA_SUPPORT
+		strcpy(pAd->MC_FileName, STA_PROFILE_PATH);
+#endif /* CONFIG_STA_SUPPORT */
+
+	DBGPRINT(RT_DEBUG_TRACE, ("MC> ROW = %d, PATH = %s\n", pAd->MC_RowID, pAd->MC_FileName));
+}
+#endif /* MULTIPLE_CARD_SUPPORT */
+
+	return 0;
+}
+
+
+BOOLEAN RtmpRaDevCtrlExit(IN VOID *pAdSrc)
+{
+	PRTMP_ADAPTER	pAd = (PRTMP_ADAPTER)pAdSrc;
+	INT index;
+	
+#ifdef MULTIPLE_CARD_SUPPORT
+extern UINT8  MC_CardUsed[MAX_NUM_OF_MULTIPLE_CARD];
+
+	if ((pAd->MC_RowID >= 0) && (pAd->MC_RowID <= MAX_NUM_OF_MULTIPLE_CARD))
+		MC_CardUsed[pAd->MC_RowID] = 0; /* not clear MAC address*/
+#endif /* MULTIPLE_CARD_SUPPORT */
+
+#ifdef RTMP_MAC_USB
+	RTMP_SEM_EVENT_DESTORY(&(pAd->UsbVendorReq_semaphore));
+	RTMP_SEM_EVENT_DESTORY(&(pAd->UsbVendorReq_semaphore2));
+	if (pAd->UsbVendorReqBuf)
+		os_free_mem(pAd, pAd->UsbVendorReqBuf);
+#endif /* RTMP_MAC_USB */
+
+	/*
+		Free ProbeRespIE Table
+	*/
+	for (index = 0; index < MAX_LEN_OF_BSS_TABLE; index++) 
+	{
+		if (pAd->ProbeRespIE[index].pIe)
+			os_free_mem(pAd, pAd->ProbeRespIE[index].pIe);
+	}
+
+#ifdef RESOURCE_PRE_ALLOC
+	RTMPFreeTxRxRingMemory(pAd);
+#endif /* RESOURCE_PRE_ALLOC */
+
+
+	RTMPFreeAdapter(pAd);
+
+	return TRUE;
+}
+
+
+
+
+#ifdef VENDOR_FEATURE3_SUPPORT
+VOID RTMP_IO_WRITE32(
+	PRTMP_ADAPTER pAd,
+	UINT32 Offset,
+	UINT32 Value)
+{
+	_RTMP_IO_WRITE32(pAd, Offset, Value);
+}
+
+VOID RTMP_BBP_IO_READ8_BY_REG_ID(
+	PRTMP_ADAPTER pAd,
+	UINT32 Offset,
+	UINT8 *pValue)
+{
+	_RTMP_BBP_IO_READ8_BY_REG_ID(pAd, Offset, pValue);
+}
+
+VOID RTMP_BBP_IO_READ8(
+	PRTMP_ADAPTER pAd,
+	UCHAR Offset,
+	UINT8 *pValue,
+	BOOLEAN FlgValidMCR)
+{
+	_RTMP_BBP_IO_READ8(pAd, Offset, pValue, FlgValidMCR);
+}
+
+VOID RTMP_BBP_IO_WRITE8_BY_REG_ID(
+	PRTMP_ADAPTER pAd,
+	UINT32 Offset,
+	UINT8 Value)
+{
+	_RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, Offset, Value);
+}
+
+VOID RTMP_BBP_IO_WRITE8(
+	PRTMP_ADAPTER pAd,
+	UCHAR Offset,
+	UINT8 Value,
+	BOOLEAN FlgValidMCR)
+{
+	_RTMP_BBP_IO_WRITE8(pAd, Offset, Value, FlgValidMCR);
+}
+#endif /* VENDOR_FEATURE3_SUPPORT */
+
+
+
+VOID AntCfgInit(
+IN  PRTMP_ADAPTER   pAd)
+{
+
+#ifdef ANT_DIVERSITY_SUPPORT
+	if (pAd->CommonCfg.bRxAntDiversity == ANT_DIVERSITY_DEFAULT)
+#endif
+	{
+		if (pAd->NicConfig2.field.AntOpt== 1) //ant selected by efuse
+		{	
+			if (pAd->NicConfig2.field.AntDiversity == 0) //main
+			{
+				pAd->RxAnt.Pair1PrimaryRxAnt = 0;
+				pAd->RxAnt.Pair1SecondaryRxAnt = 1;
+			}
+			else//aux
+			{
+				pAd->RxAnt.Pair1PrimaryRxAnt = 1;
+				pAd->RxAnt.Pair1SecondaryRxAnt = 0;
+			}
+		}
+		else if (pAd->NicConfig2.field.AntDiversity == 0) //Ant div off: default ant is main
+		{
+			pAd->RxAnt.Pair1PrimaryRxAnt = 0;
+			pAd->RxAnt.Pair1SecondaryRxAnt = 1;
+		}
+		else if (pAd->NicConfig2.field.AntDiversity == 1)//Ant div on
+#ifdef ANT_DIVERSITY_SUPPORT
+			if (pAd->chipCap.FlgIsHwAntennaDiversitySup)
+				pAd->CommonCfg.bRxAntDiversity = ANT_HW_DIVERSITY_ENABLE; //filter by PPAD_Init() --> MAC Address
+#else
+		{//eeprom on, but ant div support is not enabled: default ant is man
+			pAd->RxAnt.Pair1PrimaryRxAnt = 0;
+			pAd->RxAnt.Pair1SecondaryRxAnt = 1;
+		}
+#endif
+	}
+
+	DBGPRINT(RT_DEBUG_OFF, ("\x1b[m%s: primary/secondary ant %d/%d\n\x1b[m", 
+					__FUNCTION__,
+					pAd->RxAnt.Pair1PrimaryRxAnt,
+					pAd->RxAnt.Pair1SecondaryRxAnt));
+#ifdef ANT_DIVERSITY_SUPPORT
+	DBGPRINT(RT_DEBUG_OFF, ("\x1b[m%s: AntDiv %d\n\x1b[m", 
+					__FUNCTION__,
+					pAd->CommonCfg.bRxAntDiversity));
+#endif
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/rtmp_init_inf.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/rtmp_init_inf.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/rtmp_init_inf.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/rtmp_init_inf.c	2017-09-23 03:42:49.766675834 +0800
@@ -0,0 +1,1045 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include	"rt_config.h"
+
+
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef PROFILE_STORE
+NDIS_STATUS WriteDatThread(
+	IN  RTMP_ADAPTER *pAd);
+#endif /* PROFILE_STORE */
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef LINUX
+#ifdef OS_ABL_FUNC_SUPPORT
+/* Utilities provided from NET module */
+RTMP_NET_ABL_OPS RtmpDrvNetOps, *pRtmpDrvNetOps = &RtmpDrvNetOps;
+RTMP_PCI_CONFIG RtmpPciConfig, *pRtmpPciConfig = &RtmpPciConfig;
+RTMP_USB_CONFIG RtmpUsbConfig, *pRtmpUsbConfig = &RtmpUsbConfig;
+
+VOID RtmpDrvOpsInit(
+	OUT		VOID				*pDrvOpsOrg,
+	INOUT	VOID				*pDrvNetOpsOrg,
+	IN		RTMP_PCI_CONFIG		*pPciConfig,
+	IN		RTMP_USB_CONFIG		*pUsbConfig)
+{
+	RTMP_DRV_ABL_OPS *pDrvOps = (RTMP_DRV_ABL_OPS *)pDrvOpsOrg;
+#ifdef RTMP_USB_SUPPORT
+	RTMP_NET_ABL_OPS *pDrvNetOps = (RTMP_NET_ABL_OPS *)pDrvNetOpsOrg;
+#endif /* RTMP_USB_SUPPORT */
+
+
+	/* init PCI/USB configuration in different OS */
+	if (pPciConfig != NULL)
+		RtmpPciConfig = *pPciConfig;
+
+	if (pUsbConfig != NULL)
+		RtmpUsbConfig = *pUsbConfig;
+
+	/* init operators provided from us (DRIVER module) */
+	pDrvOps->RTMPAllocAdapterBlock = RTMPAllocAdapterBlock;
+	pDrvOps->RTMPFreeAdapter = RTMPFreeAdapter;
+
+	pDrvOps->RtmpRaDevCtrlExit = RtmpRaDevCtrlExit;
+	pDrvOps->RtmpRaDevCtrlInit = RtmpRaDevCtrlInit;
+
+	pDrvOps->RTMPSendPackets = RTMPSendPackets;
+#ifdef MBSS_SUPPORT
+	pDrvOps->MBSS_PacketSend = MBSS_PacketSend;
+#endif /* MBSS_SUPPORT */
+#ifdef APCLI_SUPPORT
+	pDrvOps->APC_PacketSend = APC_PacketSend;
+#endif /* APCLI_SUPPORT */
+
+	pDrvOps->RTMP_COM_IoctlHandle = RTMP_COM_IoctlHandle;
+#ifdef CONFIG_STA_SUPPORT
+	pDrvOps->RTMP_STA_IoctlHandle = RTMP_STA_IoctlHandle;
+#endif /* CONFIG_STA_SUPPORT */
+
+	pDrvOps->RTMPDrvOpen = RTMPDrvOpen;
+	pDrvOps->RTMPDrvClose = RTMPDrvClose;
+	pDrvOps->RTMPInfClose = RTMPInfClose;
+	pDrvOps->rt28xx_init = rt28xx_init;
+
+	/* init operators provided from us and netif module */
+#ifdef RTMP_USB_SUPPORT
+	*pRtmpDrvNetOps = *pDrvNetOps;
+	pRtmpDrvNetOps->RtmpDrvUsbBulkOutDataPacketComplete = RTUSBBulkOutDataPacketComplete;
+	pRtmpDrvNetOps->RtmpDrvUsbBulkOutMLMEPacketComplete = RTUSBBulkOutMLMEPacketComplete;
+	pRtmpDrvNetOps->RtmpDrvUsbBulkOutNullFrameComplete = RTUSBBulkOutNullFrameComplete;
+/*	pRtmpDrvNetOps->RtmpDrvUsbBulkOutRTSFrameComplete = RTUSBBulkOutRTSFrameComplete;*/
+	pRtmpDrvNetOps->RtmpDrvUsbBulkOutPsPollComplete = RTUSBBulkOutPsPollComplete;
+	pRtmpDrvNetOps->RtmpDrvUsbBulkRxComplete = RTUSBBulkRxComplete;
+	*pDrvNetOps = *pRtmpDrvNetOps;
+#endif /* RTMP_USB_SUPPORT */
+}
+
+RTMP_BUILD_DRV_OPS_FUNCTION_BODY
+
+#endif /* OS_ABL_FUNC_SUPPORT */
+#endif /* LINUX */
+
+
+int rt28xx_init(
+	IN VOID		*pAdSrc,
+	IN PSTRING	pDefaultMac, 
+	IN PSTRING	pHostName)
+{
+	PRTMP_ADAPTER	pAd = (PRTMP_ADAPTER)pAdSrc;
+	UINT					index;
+	UCHAR					TmpPhy;
+	NDIS_STATUS				Status;
+	UINT32 					MacCsr0 = 0;
+
+	if (pAd == NULL)
+		return FALSE;
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef PCIE_PS_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+    	/* If dirver doesn't wake up firmware here,*/
+    	/* NICLoadFirmware will hang forever when interface is up again.*/
+    	if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE) &&
+        	OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_ADVANCE_POWER_SAVE_PCIE_DEVICE))
+    	{
+        	AUTO_WAKEUP_STRUC AutoWakeupCfg;
+			AsicForceWakeup(pAd, TRUE);
+        	AutoWakeupCfg.word = 0;
+	    	RTMP_IO_WRITE32(pAd, AUTO_WAKEUP_CFG, AutoWakeupCfg.word);
+        	OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
+    	}
+	}
+#endif /* PCIE_PS_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+
+	/* reset Adapter flags*/
+	RTMP_CLEAR_FLAGS(pAd);
+
+	/* Init BssTab & ChannelInfo tabbles for auto channel select.*/
+
+#ifdef DOT11_N_SUPPORT
+	/* Allocate BA Reordering memory*/
+	if (ba_reordering_resource_init(pAd, MAX_REORDERING_MPDU_NUM) != TRUE)		
+		goto err1;
+#endif /* DOT11_N_SUPPORT */
+
+	/* Make sure MAC gets ready.*/
+	index = 0;
+	do
+	{
+		RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
+		pAd->MACVersion = MacCsr0;
+
+		if ((pAd->MACVersion != 0x00) && (pAd->MACVersion != 0xFFFFFFFF))
+			break;
+
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))			
+			goto err1;
+		
+		RTMPusecDelay(10);
+	} while (index++ < 100);
+	DBGPRINT(RT_DEBUG_TRACE, ("MAC_CSR0  [ Ver:Rev=0x%08x]\n", pAd->MACVersion));
+
+	RtmpChipOpsHook(pAd);
+
+	if (MAX_LEN_OF_MAC_TABLE > MAX_AVAILABLE_CLIENT_WCID(pAd))
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("MAX_LEN_OF_MAC_TABLE can not be larger than MAX_AVAILABLE_CLIENT_WCID!!!!\n"));
+		goto err1;
+	}
+
+
+	/* Disable DMA*/
+	RT28XXDMADisable(pAd);
+
+	/* Load 8051 firmware*/
+	Status = NICLoadFirmware(pAd);
+	if (Status != NDIS_STATUS_SUCCESS)
+	{
+		DBGPRINT_ERR(("NICLoadFirmware failed, Status[=0x%08x]\n", Status));
+		goto err1;
+	}
+
+	NICLoadRateSwitchingParams(pAd);
+
+	/* Disable interrupts here which is as soon as possible*/
+	/* This statement should never be true. We might consider to remove it later*/
+
+#ifdef RESOURCE_PRE_ALLOC
+	Status = RTMPInitTxRxRingMemory(pAd);
+#else
+	Status = RTMPAllocTxRxRingMemory(pAd);
+#endif /* RESOURCE_PRE_ALLOC */
+
+	if (Status != NDIS_STATUS_SUCCESS)
+	{
+		DBGPRINT_ERR(("RTMPAllocTxRxMemory failed, Status[=0x%08x]\n", Status));
+		goto err2;
+	}
+
+	RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE);
+
+	/* initialize MLME*/
+	
+	Status = RtmpMgmtTaskInit(pAd);
+	if (Status != NDIS_STATUS_SUCCESS)
+		goto err3;
+
+	Status = MlmeInit(pAd);
+	if (Status != NDIS_STATUS_SUCCESS)
+	{
+		DBGPRINT_ERR(("MlmeInit failed, Status[=0x%08x]\n", Status));
+		goto err4;
+	}
+
+#ifdef RMTP_RBUS_SUPPORT
+#ifdef VIDEO_TURBINE_SUPPORT
+	VideoConfigInit(pAd);
+#endif /* VIDEO_TURBINE_SUPPORT */
+#endif /* RMTP_RBUS_SUPPORT */
+
+	/* Initialize pAd->StaCfg, pAd->ApCfg, pAd->CommonCfg to manufacture default*/
+	
+	UserCfgInit(pAd);
+
+	Status = RtmpNetTaskInit(pAd);
+	if (Status != NDIS_STATUS_SUCCESS)
+		goto err5;
+
+/*	COPY_MAC_ADDR(pAd->ApCfg.MBSSID[apidx].Bssid, netif->hwaddr);*/
+/*	pAd->bForcePrintTX = TRUE;*/
+
+	CfgInitHook(pAd);
+
+
+#ifdef BLOCK_NET_IF
+	initblockQueueTab(pAd);
+#endif /* BLOCK_NET_IF */
+
+	Status = MeasureReqTabInit(pAd);
+	if (Status != NDIS_STATUS_SUCCESS)
+	{
+		DBGPRINT_ERR(("MeasureReqTabInit failed, Status[=0x%08x]\n",Status));
+		goto err6;	
+	}
+	Status = TpcReqTabInit(pAd);
+	if (Status != NDIS_STATUS_SUCCESS)
+	{
+		DBGPRINT_ERR(("TpcReqTabInit failed, Status[=0x%08x]\n",Status));
+		goto err6;	
+	}
+
+	
+	/* Init the hardware, we need to init asic before read registry, otherwise mac register will be reset*/
+	
+	Status = NICInitializeAdapter(pAd, TRUE);
+	if (Status != NDIS_STATUS_SUCCESS)
+	{
+		DBGPRINT_ERR(("NICInitializeAdapter failed, Status[=0x%08x]\n", Status));
+		if (Status != NDIS_STATUS_SUCCESS)
+		goto err6;
+	}	
+
+
+	/* Read parameters from Config File */
+	/* unknown, it will be updated in NICReadEEPROMParameters */
+	pAd->RfIcType = RFIC_UNKNOWN;
+	Status = RTMPReadParametersHook(pAd);
+
+	DBGPRINT(RT_DEBUG_OFF, ("1. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
+	if (Status != NDIS_STATUS_SUCCESS)
+	{
+		DBGPRINT_ERR(("RTMPReadParametersHook failed, Status[=0x%08x]\n",Status));
+		goto err6;
+	}
+
+#ifdef RTMP_MAC_USB
+	pAd->CommonCfg.bMultipleIRP = FALSE;
+
+	if (pAd->CommonCfg.bMultipleIRP)
+		pAd->CommonCfg.NumOfBulkInIRP = RX_RING_SIZE;
+	else
+		pAd->CommonCfg.NumOfBulkInIRP = 1;
+#endif /* RTMP_MAC_USB */
+
+#ifdef DOT11_N_SUPPORT
+   	/*Init Ba Capability parameters.*/
+/*	RT28XX_BA_INIT(pAd);*/
+	pAd->CommonCfg.DesiredHtPhy.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity;
+	pAd->CommonCfg.DesiredHtPhy.AmsduEnable = (USHORT)pAd->CommonCfg.BACapability.field.AmsduEnable;
+	pAd->CommonCfg.DesiredHtPhy.AmsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize;
+	pAd->CommonCfg.DesiredHtPhy.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode;
+	/* UPdata to HT IE*/
+	pAd->CommonCfg.HtCapability.HtCapInfo.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode;
+	pAd->CommonCfg.HtCapability.HtCapInfo.AMsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize;
+	pAd->CommonCfg.HtCapability.HtCapParm.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity;
+#endif /* DOT11_N_SUPPORT */
+
+	/* after reading Registry, we now know if in AP mode or STA mode*/
+
+	/* Load 8051 firmware; crash when FW image not existent*/
+	/* Status = NICLoadFirmware(pAd);*/
+	/* if (Status != NDIS_STATUS_SUCCESS)*/
+	/*    break;*/
+
+	DBGPRINT(RT_DEBUG_OFF, ("2. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
+
+	/* We should read EEPROM for all cases.  rt2860b*/
+	NICReadEEPROMParameters(pAd, (PSTRING)pDefaultMac);	
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+
+	DBGPRINT(RT_DEBUG_OFF, ("3. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
+
+	NICInitAsicFromEEPROM(pAd); /*rt2860b*/
+#ifdef CONFIG_STA_SUPPORT	
+#ifdef RTMP_FREQ_CALIBRATION_SUPPORT
+/*	if (IS_RT3593(pAd))*/
+/*	{*/
+		
+		/* Initialize the frequency calibration*/
+		
+		RTMP_CHIP_ASIC_FREQ_CAL_INIT(pAd);
+/*	}*/
+#endif /* RTMP_FREQ_CALIBRATION_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef RTMP_INTERNAL_TX_ALC
+	
+	/* Initialize the desired TSSI table*/
+	
+	RTMP_CHIP_ASIC_TSSI_TABLE_INIT(pAd);
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+#ifdef RTMP_TEMPERATURE_COMPENSATION
+	
+	/* Temperature compensation, initialize the lookup table */
+	
+	DBGPRINT(RT_DEBUG_ERROR, ("IS_RT5392 = %d, bAutoTxAgcG = %d\n", IS_RT5392(pAd), pAd->bAutoTxAgcG));
+	if (IS_RT5392(pAd) && pAd->bAutoTxAgcG && pAd->CommonCfg.TempComp != 0)
+	{
+		InitLookupTable(pAd);
+	}
+#endif /* RTMP_TEMPERATURE_COMPENSATION */
+
+
+
+	/* Set PHY to appropriate mode*/
+	TmpPhy = pAd->CommonCfg.PhyMode;
+	pAd->CommonCfg.PhyMode = 0xff;
+	RTMPSetPhyMode(pAd, TmpPhy);
+#ifdef DOT11_N_SUPPORT
+	SetCommonHT(pAd);
+#endif /* DOT11_N_SUPPORT */
+
+	/* No valid channels.*/
+	if (pAd->ChannelListNum == 0)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("Wrong configuration. No valid channel found. Check \"ContryCode\" and \"ChannelGeography\" setting.\n"));
+		goto err6;
+	}
+
+#ifdef DOT11_N_SUPPORT
+	DBGPRINT(RT_DEBUG_OFF, ("MCS Set = %02x %02x %02x %02x %02x\n", pAd->CommonCfg.HtCapability.MCSSet[0],
+           pAd->CommonCfg.HtCapability.MCSSet[1], pAd->CommonCfg.HtCapability.MCSSet[2],
+           pAd->CommonCfg.HtCapability.MCSSet[3], pAd->CommonCfg.HtCapability.MCSSet[4]));
+#endif /* DOT11_N_SUPPORT */
+
+
+
+/*		APInitialize(pAd);*/
+
+#ifdef IKANOS_VX_1X0
+	VR_IKANOS_FP_Init(pAd->ApCfg.BssidNum, pAd->PermanentAddress);
+#endif /* IKANOS_VX_1X0 */
+
+#ifdef RTMP_MAC_USB
+	AsicSendCommandToMcu(pAd, 0x31, 0xff, 0x00, 0x02);
+	RTMPusecDelay(10000);
+#endif /* RTMP_MAC_USB */
+
+
+	/*
+		Some modules init must be called before APStartUp().
+		Or APStartUp() will make up beacon content and call
+		other modules API to get some information to fill.
+	*/
+
+
+	if (pAd && (Status != NDIS_STATUS_SUCCESS))
+	{
+		
+		/* Undo everything if it failed*/
+		
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE))
+		{
+/*			NdisMDeregisterInterrupt(&pAd->Interrupt);*/
+			RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE);
+		}
+/*		RTMPFreeAdapter(pAd);  we will free it in disconnect()*/
+	}
+	else if (pAd)
+	{
+		/* Microsoft HCT require driver send a disconnect event after driver initialization.*/
+		OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED);
+		OPSTATUS_CLEAR_FLAG(pAd, fOP_AP_STATUS_MEDIA_STATE_CONNECTED);
+		RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_MEDIA_STATE_CHANGE);
+
+		DBGPRINT(RT_DEBUG_TRACE, ("NDIS_STATUS_MEDIA_DISCONNECT Event B!\n"));
+
+
+#ifdef RTMP_MAC_USB
+		RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS);
+		RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_REMOVE_IN_PROGRESS);
+
+		
+		/* Support multiple BulkIn IRP,*/
+		/* the value on pAd->CommonCfg.NumOfBulkInIRP may be large than 1.*/
+		
+		for(index=0; index<pAd->CommonCfg.NumOfBulkInIRP; index++)
+		{
+			RTUSBBulkReceive(pAd);
+			DBGPRINT(RT_DEBUG_TRACE, ("RTUSBBulkReceive!\n" ));
+		}
+#endif /* RTMP_MAC_USB */
+	}/* end of else*/
+
+	/* Set up the Mac address*/
+#ifdef CONFIG_STA_SUPPORT
+	RtmpOSNetDevAddrSet(pAd->OpMode, pAd->net_dev, &pAd->CurrentAddress[0], (PUCHAR)(pAd->StaCfg.dev_name));
+#endif /* CONFIG_STA_SUPPORT */
+
+	/* Various AP function init*/
+
+	/* assign function pointers*/
+
+
+
+
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+#ifndef NATIVE_WPA_SUPPLICANT_SUPPORT
+		/* send wireless event to wpa_supplicant for infroming interface up.*/
+		RtmpOSWrielessEventSend(pAd->net_dev, RT_WLAN_EVENT_CUSTOM, RT_INTERFACE_UP, NULL, NULL, 0);
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+
+
+
+
+	RTMP_CHIP_SPECIFIC(pAd, RTMP_CHIP_SPEC_STATE_INIT,
+						RTMP_CHIP_SPEC_INITIALIZATION, NULL, 0);
+
+
+	DBGPRINT_S(Status, ("<==== rt28xx_init, Status=%x\n", Status));
+
+	return TRUE;
+
+err6:
+	MeasureReqTabExit(pAd);
+	TpcReqTabExit(pAd);
+err5:	
+	RtmpNetTaskExit(pAd);
+	UserCfgExit(pAd);
+err4:	
+	MlmeHalt(pAd);
+err3:	
+	RtmpMgmtTaskExit(pAd);
+err2:
+#ifdef RESOURCE_PRE_ALLOC
+	RTMPResetTxRxRingMemory(pAd);
+#else
+	RTMPFreeTxRxRingMemory(pAd);
+#endif /* RESOURCE_PRE_ALLOC */
+
+err1:
+
+
+#ifdef DOT11_N_SUPPORT
+	if(pAd->mpdu_blk_pool.mem)
+		os_free_mem(pAd, pAd->mpdu_blk_pool.mem); /* free BA pool*/
+#endif /* DOT11_N_SUPPORT */
+
+	/* shall not set priv to NULL here because the priv didn't been free yet.*/
+	/*net_dev->priv = 0;*/
+#ifdef INF_AMAZON_SE
+err0:
+#endif /* INF_AMAZON_SE */
+#ifdef ST
+err0:
+#endif /* ST */
+
+	DBGPRINT(RT_DEBUG_ERROR, ("!!! rt28xx Initialized fail !!!\n"));
+	return FALSE;
+}
+
+
+VOID RTMPDrvOpen(
+	IN VOID			*pAdSrc)
+{
+	PRTMP_ADAPTER	pAd = (PRTMP_ADAPTER)pAdSrc;
+
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+
+	/* Enable Interrupt*/
+	RTMP_IRQ_ENABLE(pAd);
+
+	/* Now Enable RxTx*/
+	RTMPEnableRxTx(pAd);
+	RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_START_UP);
+
+	{
+	UINT32 reg = 0;
+	RTMP_IO_READ32(pAd, 0x1300, &reg);  /* clear garbage interrupts*/
+	printk("0x1300 = %08x\n", reg);
+	}
+
+	{
+/*	u32 reg;*/
+/*	UINT8  byte;*/
+/*	u16 tmp;*/
+
+/*	RTMP_IO_READ32(pAd, XIFS_TIME_CFG, &reg);*/
+
+/*	tmp = 0x0805;*/
+/*	reg  = (reg & 0xffff0000) | tmp;*/
+/*	RTMP_IO_WRITE32(pAd, XIFS_TIME_CFG, reg);*/
+
+	}
+
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef PCIE_PS_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+        RTMPInitPCIeLinkCtrlValue(pAd);
+#endif /* PCIE_PS_SUPPORT */
+
+
+#endif /* CONFIG_STA_SUPPORT */
+
+
+
+#ifdef CONFIG_STA_SUPPORT
+	/*
+		To reduce connection time, 
+		do auto reconnect here instead of waiting STAMlmePeriodicExec to do auto reconnect.
+	*/
+	if (pAd->OpMode == OPMODE_STA)
+		MlmeAutoReconnectLastSSID(pAd);
+#endif /* CONFIG_STA_SUPPORT */
+
+
+
+
+}
+
+
+VOID RTMPDrvClose(
+	IN VOID				*pAdSrc,
+	IN VOID				*net_dev)
+{
+	PRTMP_ADAPTER	pAd = (PRTMP_ADAPTER)pAdSrc;
+	BOOLEAN 		Cancelled;
+	UINT32			i = 0;
+
+
+	Cancelled = FALSE;
+
+
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+#ifdef PCIE_PS_SUPPORT
+		RTMPPCIeLinkCtrlValueRestore(pAd, RESTORE_CLOSE);
+#endif /* PCIE_PS_SUPPORT */
+
+		/* If dirver doesn't wake up firmware here,*/
+		/* NICLoadFirmware will hang forever when interface is up again.*/
+		if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE))
+        {      
+		    AsicForceWakeup(pAd, TRUE);
+        }
+
+#ifdef RTMP_MAC_USB
+		RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_REMOVE_IN_PROGRESS);
+#endif /* RTMP_MAC_USB */
+
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS);
+
+
+
+
+	for (i = 0 ; i < NUM_OF_TX_RING; i++)
+	{
+		while (pAd->DeQueueRunning[i] == TRUE)
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("Waiting for TxQueue[%d] done..........\n", i));
+			RTMPusecDelay(1000);
+		}
+	}
+	
+#ifdef RTMP_MAC_USB
+	RtmpOsUsbEmptyUrbCheck(&pAd->wait, &pAd->BulkInLock, pAd->PendingRx);
+
+#endif /* RTMP_MAC_USB */
+
+
+	/* Stop Mlme state machine*/
+	MlmeHalt(pAd);
+	
+	/* Close net tasklets*/
+	RtmpNetTaskExit(pAd);
+
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		MacTableReset(pAd);
+#ifdef LED_CONTROL_SUPPORT
+		RTMPSetLED(pAd, LED_LINK_DOWN);
+#endif /* LED_CONTROL_SUPPORT */
+
+		MlmeRadioOff(pAd);
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+
+	MeasureReqTabExit(pAd);
+	TpcReqTabExit(pAd);
+
+#ifdef LED_CONTROL_SUPPORT
+	RTMPExitLEDMode(pAd);
+#endif // LED_CONTROL_SUPPORT
+
+
+	/* Close kernel threads*/
+	RtmpMgmtTaskExit(pAd);
+
+
+	/* Free IRQ*/
+	if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE))
+	{
+		RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE);
+	}
+
+	/* Free Ring or USB buffers*/
+#ifdef RESOURCE_PRE_ALLOC
+	RTMPResetTxRxRingMemory(pAd);
+#else
+	/* Free Ring or USB buffers*/
+	RTMPFreeTxRxRingMemory(pAd);
+#endif /* RESOURCE_PRE_ALLOC */
+
+	RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS);
+
+#ifdef DOT11_N_SUPPORT
+	/* Free BA reorder resource*/
+	ba_reordering_resource_release(pAd);
+#endif /* DOT11_N_SUPPORT */
+
+	UserCfgExit(pAd); /* must after ba_reordering_resource_release */
+
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+
+	RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_START_UP);
+
+/*+++Modify by woody to solve the bulk fail+++*/
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	/* clear MAC table */
+	/* TODO: do not clear spin lock, such as fLastChangeAccordingMfbLock */
+	NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
+
+	/* release all timers */
+	RTMPusecDelay(2000);
+	RTMP_TimerListRelease(pAd);
+}
+
+
+VOID RTMPInfClose(
+	IN VOID				*pAdSrc)
+{
+	PRTMP_ADAPTER	pAd = (PRTMP_ADAPTER)pAdSrc;
+
+
+
+
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+#ifdef PROFILE_STORE
+		WriteDatThread(pAd);
+		RTMPusecDelay(1000);
+#endif /* PROFILE_STORE */
+#ifdef QOS_DLS_SUPPORT
+		/* send DLS-TEAR_DOWN message, */
+		if (pAd->CommonCfg.bDLSCapable)
+		{
+			UCHAR i;
+
+			/* tear down local dls table entry*/
+			for (i=0; i<MAX_NUM_OF_INIT_DLS_ENTRY; i++)
+			{
+				if (pAd->StaCfg.DLSEntry[i].Valid && (pAd->StaCfg.DLSEntry[i].Status == DLS_FINISH))
+				{
+					RTMPSendDLSTearDownFrame(pAd, pAd->StaCfg.DLSEntry[i].MacAddr);
+					pAd->StaCfg.DLSEntry[i].Status	= DLS_NONE;
+					pAd->StaCfg.DLSEntry[i].Valid	= FALSE;
+				}
+			}
+
+			/* tear down peer dls table entry*/
+			for (i=MAX_NUM_OF_INIT_DLS_ENTRY; i<MAX_NUM_OF_DLS_ENTRY; i++)
+			{
+				if (pAd->StaCfg.DLSEntry[i].Valid && (pAd->StaCfg.DLSEntry[i].Status == DLS_FINISH))
+				{
+					RTMPSendDLSTearDownFrame(pAd, pAd->StaCfg.DLSEntry[i].MacAddr);
+					pAd->StaCfg.DLSEntry[i].Status = DLS_NONE;
+					pAd->StaCfg.DLSEntry[i].Valid	= FALSE;
+				}
+			}
+			RTMP_MLME_HANDLER(pAd);
+		}
+#endif /* QOS_DLS_SUPPORT */
+
+		if (INFRA_ON(pAd) &&
+			(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)))
+		{
+			MLME_DISASSOC_REQ_STRUCT	DisReq;
+			MLME_QUEUE_ELEM *MsgElem;/* = (MLME_QUEUE_ELEM *) kmalloc(sizeof(MLME_QUEUE_ELEM), MEM_ALLOC_FLAG);*/
+    
+			os_alloc_mem(NULL, (UCHAR **)&MsgElem, sizeof(MLME_QUEUE_ELEM));
+			if (MsgElem)
+			{
+			COPY_MAC_ADDR(DisReq.Addr, pAd->CommonCfg.Bssid);
+			DisReq.Reason =  REASON_DEAUTH_STA_LEAVING;
+
+			MsgElem->Machine = ASSOC_STATE_MACHINE;
+			MsgElem->MsgType = MT2_MLME_DISASSOC_REQ;
+			MsgElem->MsgLen = sizeof(MLME_DISASSOC_REQ_STRUCT);
+			NdisMoveMemory(MsgElem->Msg, &DisReq, sizeof(MLME_DISASSOC_REQ_STRUCT));
+
+			/* Prevent to connect AP again in STAMlmePeriodicExec*/
+			pAd->MlmeAux.AutoReconnectSsidLen= 32;
+			NdisZeroMemory(pAd->MlmeAux.AutoReconnectSsid, pAd->MlmeAux.AutoReconnectSsidLen);
+
+			pAd->Mlme.CntlMachine.CurrState = CNTL_WAIT_OID_DISASSOC;
+			MlmeDisassocReqAction(pAd, MsgElem);
+/*			kfree(MsgElem);*/
+			os_free_mem(NULL, MsgElem);
+			}
+			
+			RTMPusecDelay(1000);
+		}
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+#ifndef NATIVE_WPA_SUPPLICANT_SUPPORT
+		/* send wireless event to wpa_supplicant for infroming interface down.*/
+		RtmpOSWrielessEventSend(pAd->net_dev, RT_WLAN_EVENT_CUSTOM, RT_INTERFACE_DOWN, NULL, NULL, 0);
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+
+		if (pAd->StaCfg.pWpsProbeReqIe)
+		{
+/*			kfree(pAd->StaCfg.pWpsProbeReqIe);*/
+			os_free_mem(NULL, pAd->StaCfg.pWpsProbeReqIe);
+			pAd->StaCfg.pWpsProbeReqIe = NULL;
+			pAd->StaCfg.WpsProbeReqIeLen = 0;
+		}
+
+		if (pAd->StaCfg.pWpaAssocIe)
+		{
+/*			kfree(pAd->StaCfg.pWpaAssocIe);*/
+			os_free_mem(NULL, pAd->StaCfg.pWpaAssocIe);
+			pAd->StaCfg.pWpaAssocIe = NULL;
+			pAd->StaCfg.WpaAssocIeLen = 0;
+		}
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+
+	}
+#endif /* CONFIG_STA_SUPPORT */
+}
+
+
+
+
+PNET_DEV RtmpPhyNetDevMainCreate(
+	IN VOID				*pAdSrc)
+{
+	PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdSrc;
+	PNET_DEV pDevNew;
+	UINT32 MC_RowID = 0, IoctlIF = 0;
+
+
+	pAd = pAd;
+
+#ifdef MULTIPLE_CARD_SUPPORT
+	MC_RowID = pAd->MC_RowID;
+#endif /* MULTIPLE_CARD_SUPPORT */
+#ifdef HOSTAPD_SUPPORT
+	IoctlIF = pAd->IoctlIF;
+#endif /* HOSTAPD_SUPPORT */
+
+	pDevNew = RtmpOSNetDevCreate((INT32)MC_RowID, (UINT32 *)&IoctlIF,
+					INT_MAIN, 0, sizeof(PRTMP_ADAPTER), INF_MAIN_DEV_NAME);
+
+#ifdef HOSTAPD_SUPPORT
+	pAd->IoctlIF = IoctlIF;
+#endif /* HOSTAPD_SUPPORT */
+
+	return pDevNew;
+}
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef PROFILE_STORE
+static void	WriteConfToDatFile(
+    IN  PRTMP_ADAPTER pAd)
+{
+	char	*cfgData = 0;
+	PSTRING			fileName = NULL;
+	RTMP_OS_FD		file_r, file_w;
+	RTMP_OS_FS_INFO		osFSInfo;
+	LONG			rv, fileLen = 0;
+	char			*offset = 0;
+	PSTRING			pTempStr = 0;
+//	INT				tempStrLen = 0;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("-----> WriteConfToDatFile\n"));
+
+		fileName = STA_PROFILE_PATH;
+
+	RtmpOSFSInfoChange(&osFSInfo, TRUE);
+
+	file_r = RtmpOSFileOpen(fileName, O_RDONLY, 0);
+	if (IS_FILE_OPEN_ERR(file_r)) 
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("-->1) %s: Error opening file %s\n", __FUNCTION__, fileName));
+		return;
+	}
+	else 
+	{
+		char tempStr[64] = {0};
+		while((rv = RtmpOSFileRead(file_r, tempStr, 64)) > 0)
+		{
+			fileLen += rv;
+		}
+		os_alloc_mem(NULL, (UCHAR **)&cfgData, fileLen);
+		if (cfgData == NULL)
+		{
+			RtmpOSFileClose(file_r);
+			DBGPRINT(RT_DEBUG_TRACE, ("CfgData kmalloc fail. (fileLen = %ld)\n", fileLen));
+			goto out;
+		}
+		NdisZeroMemory(cfgData, fileLen);
+		RtmpOSFileSeek(file_r, 0);
+		rv = RtmpOSFileRead(file_r, (PSTRING)cfgData, fileLen);
+		RtmpOSFileClose(file_r);
+		if (rv != fileLen)
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("CfgData kmalloc fail, fileLen = %ld\n", fileLen));
+			goto ReadErr;
+		}
+	}
+
+	file_w = RtmpOSFileOpen(fileName, O_WRONLY|O_TRUNC, 0);
+	if (IS_FILE_OPEN_ERR(file_w)) 
+	{
+		goto WriteFileOpenErr;
+	}
+	else 
+	{
+		offset = (PCHAR) rtstrstr((PSTRING) cfgData, "Default\n");
+		offset += strlen("Default\n");
+		RtmpOSFileWrite(file_w, (PSTRING)cfgData, (int)(offset-cfgData));
+		os_alloc_mem(NULL, (UCHAR **)&pTempStr, 512);
+		if (!pTempStr)
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("pTempStr kmalloc fail. (512)\n"));
+			RtmpOSFileClose(file_w);
+			goto WriteErr;
+		}
+			
+		for (;;)
+		{
+			int i = 0;
+			PSTRING ptr;
+
+			NdisZeroMemory(pTempStr, 512);
+			ptr = (PSTRING) offset;
+			while(*ptr && *ptr != '\n')
+			{
+				pTempStr[i++] = *ptr++;
+			}
+			pTempStr[i] = 0x00;
+			if ((size_t)(offset - cfgData) < fileLen)
+			{
+				offset += strlen(pTempStr) + 1;
+				if (strncmp(pTempStr, "SSID=", strlen("SSID=")) == 0)
+				{
+					NdisZeroMemory(pTempStr, 512);
+					NdisMoveMemory(pTempStr, "SSID=", strlen("SSID="));
+					NdisMoveMemory(pTempStr + 5, pAd->CommonCfg.Ssid, pAd->CommonCfg.SsidLen);
+				}
+				else if (strncmp(pTempStr, "AuthMode=", strlen("AuthMode=")) == 0)
+				{
+					NdisZeroMemory(pTempStr, 512);
+					if (pAd->StaCfg.AuthMode == Ndis802_11AuthModeOpen)
+						sprintf(pTempStr, "AuthMode=OPEN");
+					else if (pAd->StaCfg.AuthMode == Ndis802_11AuthModeShared)
+						sprintf(pTempStr, "AuthMode=SHARED");
+					else if (pAd->StaCfg.AuthMode == Ndis802_11AuthModeAutoSwitch)
+						sprintf(pTempStr, "AuthMode=WEPAUTO");
+					else if (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPAPSK)
+						sprintf(pTempStr, "AuthMode=WPAPSK");
+					else if (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2PSK)
+						sprintf(pTempStr, "AuthMode=WPA2PSK");
+					else if (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA)
+						sprintf(pTempStr, "AuthMode=WPA");
+					else if (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2)
+						sprintf(pTempStr, "AuthMode=WPA2");
+					else if (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPANone)
+						sprintf(pTempStr, "AuthMode=WPANONE");
+				}
+				else if (strncmp(pTempStr, "EncrypType=", strlen("EncrypType=")) == 0)
+				{
+					NdisZeroMemory(pTempStr, 512);
+					if (pAd->StaCfg.WepStatus == Ndis802_11WEPDisabled)
+						sprintf(pTempStr, "EncrypType=NONE");
+					else if (pAd->StaCfg.WepStatus == Ndis802_11WEPEnabled)
+						sprintf(pTempStr, "EncrypType=WEP");
+					else if (pAd->StaCfg.WepStatus == Ndis802_11Encryption2Enabled)
+						sprintf(pTempStr, "EncrypType=TKIP");
+					else if (pAd->StaCfg.WepStatus == Ndis802_11Encryption3Enabled)
+						sprintf(pTempStr, "EncrypType=AES");
+				}
+				RtmpOSFileWrite(file_w, pTempStr, strlen(pTempStr));
+				RtmpOSFileWrite(file_w, "\n", 1);
+			}
+			else
+			{
+				break;
+			}
+		}
+		RtmpOSFileClose(file_w);
+	}
+
+WriteErr:   
+	if (pTempStr)
+/*		kfree(pTempStr); */
+		os_free_mem(NULL, pTempStr);
+ReadErr:
+WriteFileOpenErr:    
+	if (cfgData)
+/*		kfree(cfgData); */
+		os_free_mem(NULL, cfgData);
+out:
+	RtmpOSFSInfoChange(&osFSInfo, FALSE);
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<----- WriteConfToDatFile\n"));
+	return;
+}
+
+
+INT write_dat_file_thread (
+    IN ULONG Context)
+{
+	RTMP_OS_TASK *pTask;
+	RTMP_ADAPTER *pAd;
+	//int 	Status = 0;
+
+	pTask = (RTMP_OS_TASK *)Context;
+
+	if (pTask == NULL)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("%s: pTask is NULL\n", __FUNCTION__));
+		return 0;
+	}
+	
+	pAd = (PRTMP_ADAPTER)RTMP_OS_TASK_DATA_GET(pTask);
+
+	if (pAd == NULL)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("%s: pAd is NULL\n", __FUNCTION__));
+		return 0;
+	}
+
+	RtmpOSTaskCustomize(pTask);
+
+	/* Update ssid, auth mode and encr type to DAT file */
+	WriteConfToDatFile(pAd);
+	
+		RtmpOSTaskNotifyToExit(pTask);
+	
+	return 0;
+}
+
+NDIS_STATUS WriteDatThread(
+	IN  RTMP_ADAPTER *pAd)
+{
+	NDIS_STATUS status = NDIS_STATUS_FAILURE;
+	RTMP_OS_TASK *pTask;
+
+	if (pAd->bWriteDat == FALSE)
+		return 0;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("-->WriteDatThreadInit()\n"));
+
+	pTask = &pAd->WriteDatTask;
+
+	RTMP_OS_TASK_INIT(pTask, "RtmpWriteDatTask", pAd);
+	status = RtmpOSTaskAttach(pTask, write_dat_file_thread, (ULONG)&pAd->WriteDatTask);
+	DBGPRINT(RT_DEBUG_TRACE, ("<--WriteDatThreadInit(), status=%d!\n", status));
+
+	return status;
+}
+#endif /* PROFILE_STORE */
+#endif /* CONFIG_STA_SUPPORT */
+
+/* End of rtmp_init_inf.c */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/rtmp_mcu.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/rtmp_mcu.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/rtmp_mcu.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/rtmp_mcu.c	2017-09-23 03:42:49.766675834 +0800
@@ -0,0 +1,738 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include	"rt_config.h"
+#include 	"firmware.h"
+
+
+#ifdef RTMP_MAC_USB
+
+/* RT2870 Firmware Spec only used 1 oct for version expression*/
+
+#define FIRMWARE_MINOR_VERSION	7
+#endif /* RTMP_MAC_USB */
+
+/* New 8k byte firmware size for RT3071/RT3072*/
+#define FIRMWAREIMAGE_MAX_LENGTH	0x2000
+#define FIRMWAREIMAGE_LENGTH			(sizeof (FirmwareImage) / sizeof(UCHAR))
+#define FIRMWARE_MAJOR_VERSION		0
+
+#define FIRMWAREIMAGEV1_LENGTH		0x1000
+#define FIRMWAREIMAGEV2_LENGTH		0x1000
+
+
+const unsigned short ccitt_16Table[] = {
+	0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
+	0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
+	0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
+	0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
+	0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
+	0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
+	0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
+	0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
+	0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
+	0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
+	0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
+	0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
+	0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
+	0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
+	0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
+	0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
+	0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
+	0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
+	0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
+	0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
+	0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
+	0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
+	0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
+	0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
+	0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
+	0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
+	0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
+	0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
+	0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
+	0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
+	0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
+	0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0
+};
+#define ByteCRC16(v, crc) \
+	(unsigned short)((crc << 8) ^  ccitt_16Table[((crc >> 8) ^ (v)) & 255])
+
+unsigned char BitReverse(unsigned char x)
+{
+	int i;
+	unsigned char Temp=0;
+	for(i=0; ; i++)
+	{
+		if(x & 0x80)	Temp |= 0x80;
+		if(i==7)		break;
+		x	<<= 1;
+		Temp >>= 1;
+	}
+	return Temp;
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		erase 8051 firmware image in MAC ASIC
+
+	Arguments:
+		Adapter						Pointer to our adapter
+
+	IRQL = PASSIVE_LEVEL
+		
+	========================================================================
+*/
+INT RtmpAsicEraseFirmware(
+	IN PRTMP_ADAPTER pAd)
+{
+	ULONG i;
+
+	for(i=0; i<MAX_FIRMWARE_IMAGE_SIZE; i+=4)
+		RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, 0);
+
+	return 0;
+}
+NDIS_STATUS isMCUNeedToLoadFIrmware(
+	IN PRTMP_ADAPTER pAd)
+{
+	NDIS_STATUS		Status = NDIS_STATUS_SUCCESS;
+	ULONG			Index;
+	UINT32			MacReg;
+	
+	Index = 0;
+
+	do {
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))			
+			return NDIS_STATUS_FAILURE;
+		
+		RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg);
+
+		if (MacReg & 0x100) /* check bit 8*/
+			break;
+		
+		RTMPusecDelay(1000);
+	} while (Index++ < 100);
+
+	if (Index >= 100)
+		Status = NDIS_STATUS_FAILURE;
+
+	return Status;
+}
+
+NDIS_STATUS isMCUnotReady(
+	IN PRTMP_ADAPTER pAd)
+{
+	NDIS_STATUS		Status = NDIS_STATUS_SUCCESS;
+	ULONG			Index;
+	UINT32			MacReg;
+	
+	Index = 0;
+
+	do {
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))			
+			return NDIS_STATUS_FAILURE;
+		
+		RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg);
+
+		if (MacReg & 0x80) /* check bit 7*/
+			break;
+		
+		RTMPusecDelay(1000);
+	} while (Index++ < 1000);
+
+	if (Index >= 1000)
+		Status = NDIS_STATUS_FAILURE;
+
+	return Status;
+}
+/*
+	========================================================================
+	
+	Routine Description:
+		Load 8051 firmware file into MAC ASIC
+
+	Arguments:
+		Adapter						Pointer to our adapter
+
+	Return Value:
+		NDIS_STATUS_SUCCESS         firmware image load ok
+		NDIS_STATUS_FAILURE         image not found
+
+	IRQL = PASSIVE_LEVEL
+		
+	========================================================================
+*/
+NDIS_STATUS RtmpAsicLoadFirmware(
+	IN PRTMP_ADAPTER pAd)
+{
+#ifdef BIN_IN_FILE
+#define NICLF_DEFAULT_USE()	\
+	flg_default_firm_use = TRUE; \
+	DBGPRINT(RT_DEBUG_OFF, ("%s - Use default firmware!\n", __FUNCTION__));
+
+	NDIS_STATUS		Status = NDIS_STATUS_SUCCESS;
+	PUCHAR			src;
+	RTMP_OS_FD		srcf;
+	INT 				retval, i;
+	PUCHAR			pFirmwareImage;
+	INT				FileLength = 0;
+	UINT32			MacReg;
+	ULONG			Index;
+	ULONG			firm;
+	BOOLEAN			flg_default_firm_use = FALSE;
+	RTMP_OS_FS_INFO	osFSInfo;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("===> %s\n", __FUNCTION__));
+
+	/* init */
+	pFirmwareImage = NULL;
+	src = RTMP_FIRMWARE_FILE_NAME;
+
+	RtmpOSFSInfoChange(&osFSInfo, TRUE);
+
+	pAd->FirmwareVersion = (FIRMWARE_MAJOR_VERSION << 8) + \
+						   FIRMWARE_MINOR_VERSION;
+
+
+	/* allocate firmware buffer */
+/*	pFirmwareImage = kmalloc(MAX_FIRMWARE_IMAGE_SIZE, MEM_ALLOC_FLAG);*/
+	os_alloc_mem(pAd, (UCHAR **)&pFirmwareImage, MAX_FIRMWARE_IMAGE_SIZE);
+	if (pFirmwareImage == NULL)
+	{
+		/* allocate fail, use default firmware array in firmware.h */
+		DBGPRINT(RT_DEBUG_ERROR, ("%s - Allocate memory fail!\n", __FUNCTION__));
+		NICLF_DEFAULT_USE();
+	}
+	else
+	{
+		/* allocate ok! zero the firmware buffer */
+		memset(pFirmwareImage, 0x00, MAX_FIRMWARE_IMAGE_SIZE);
+	} /* End of if */
+
+
+	/* if ok, read firmware file from *.bin file */
+	if (flg_default_firm_use == FALSE)
+	{
+		do
+		{
+			/* open the bin file */
+			srcf = RtmpOSFileOpen(src, O_RDONLY, 0);
+
+			if (IS_FILE_OPEN_ERR(srcf)) 
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("%s - Error opening file %s\n", __FUNCTION__, src));
+				NICLF_DEFAULT_USE();
+				break;
+			}
+
+
+			/* read the firmware from the file *.bin */
+			FileLength = RtmpOSFileRead(srcf, pFirmwareImage, MAX_FIRMWARE_IMAGE_SIZE);
+			if (FileLength != MAX_FIRMWARE_IMAGE_SIZE)
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("%s: error file length (=%d) in RT2860AP.BIN\n",
+					   __FUNCTION__, FileLength));
+				NICLF_DEFAULT_USE();
+				break;
+			}
+			else
+			{
+				PUCHAR ptr = pFirmwareImage;
+				USHORT crc = 0xffff;
+
+
+				/* calculate firmware CRC */
+				for(i=0; i<(MAX_FIRMWARE_IMAGE_SIZE-2); i++, ptr++)
+					crc = ByteCRC16(BitReverse(*ptr), crc);
+				/* End of for */
+
+				if ((pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-2] != \
+								(UCHAR)BitReverse((UCHAR)(crc>>8))) ||
+					(pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-1] != \
+								(UCHAR)BitReverse((UCHAR)crc)))
+				{
+					/* CRC fail */
+					DBGPRINT(RT_DEBUG_ERROR, ("%s: CRC = 0x%02x 0x%02x "
+						   "error, should be 0x%02x 0x%02x\n",
+						   __FUNCTION__,
+						   pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-2],
+						   pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-1],
+						   (UCHAR)(crc>>8), (UCHAR)(crc)));
+					NICLF_DEFAULT_USE();
+					break;
+				}
+				else
+				{
+					/* firmware is ok */
+					pAd->FirmwareVersion = \
+						(pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-4] << 8) +
+						pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-3];
+
+					/* check if firmware version of the file is too old */
+					if ((pAd->FirmwareVersion) < \
+											((FIRMWARE_MAJOR_VERSION << 8) +
+									  	 	 FIRMWARE_MINOR_VERSION))
+					{
+						DBGPRINT(RT_DEBUG_ERROR, ("%s: firmware version too old!\n", __FUNCTION__));
+						NICLF_DEFAULT_USE();
+						break;
+					} /* End of if */
+				} /* End of if */
+
+				DBGPRINT(RT_DEBUG_TRACE,
+						 ("NICLoadFirmware: CRC ok, ver=%d.%d\n",
+						  pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-4],
+						  pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-3]));
+			} /* End of if (FileLength == MAX_FIRMWARE_IMAGE_SIZE) */
+			break;
+		} while(TRUE);
+
+		/* close firmware file */
+		if (IS_FILE_OPEN_ERR(srcf))
+			;
+		else
+		{
+			retval = RtmpOSFileClose(srcf);
+			if (retval)
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("--> Error %d closing %s\n", -retval, src));
+			}
+		}
+	}
+
+
+	/* write firmware to ASIC */
+	if (flg_default_firm_use == TRUE)
+	{
+		/* use default fimeware, free allocated buffer */
+		if (pFirmwareImage != NULL)
+/*			kfree(pFirmwareImage);*/
+			os_free_mem(NULL, pFirmwareImage);
+		/* End of if */
+
+		/* use default *.bin array */
+		pFirmwareImage = FirmwareImage;
+		FileLength = sizeof(FirmwareImage);
+	} /* End of if */
+
+	/* enable Host program ram write selection */
+	RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x10000); 
+
+	for(i=0; i<FileLength; i+=4)
+	{
+		firm = pFirmwareImage[i] +
+			   (pFirmwareImage[i+3] << 24) +
+			   (pFirmwareImage[i+2] << 16) +
+			   (pFirmwareImage[i+1] << 8);
+
+		RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, firm);
+	} /* End of for */
+
+	RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x00000);
+	RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x00001);
+
+	/* initialize BBP R/W access agent */
+	RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0);
+	RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
+
+	if (flg_default_firm_use == FALSE)
+	{
+		/* use file firmware, free allocated buffer */
+		if (pFirmwareImage != NULL)
+/*			kfree(pFirmwareImage);*/
+			os_free_mem(NULL, pFirmwareImage);
+		/* End of if */
+	} /* End of if */
+
+	RtmpOSFSInfoChange(&osFSInfo, FALSE);
+#else
+
+	NDIS_STATUS		Status = NDIS_STATUS_SUCCESS;
+	PUCHAR			pFirmwareImage;
+	ULONG			FileLength;
+	/*ULONG			firm;*/
+	UINT32			Version = (pAd->MACVersion >> 16);
+	UINT32			MacReg1 = 0;
+
+	pFirmwareImage = FirmwareImage;
+	FileLength = sizeof(FirmwareImage);
+
+	/* New 8k byte firmware size for RT3071/RT3072*/
+	/*DBGPRINT(RT_DEBUG_TRACE, ("Usb Chip\n"));*/
+	if (FIRMWAREIMAGE_LENGTH == FIRMWAREIMAGE_MAX_LENGTH)
+	/*The firmware image consists of two parts. One is the origianl and the other is the new.*/
+	/*Use Second Part*/
+	{
+#ifdef RTMP_MAC_USB
+		if ((Version != 0x2860) && (Version != 0x2872) && (Version != 0x3070)) 
+		{	/* Use Firmware V2.*/
+			/*printk("KH:Use New Version,part2\n");*/
+			pFirmwareImage = (PUCHAR)&FirmwareImage[FIRMWAREIMAGEV1_LENGTH];
+			FileLength = FIRMWAREIMAGEV2_LENGTH;
+		}
+		else
+		{
+			/*printk("KH:Use New Version,part1\n");*/
+			pFirmwareImage = FirmwareImage;
+			FileLength = FIRMWAREIMAGEV1_LENGTH;
+		}
+#endif /* RTMP_MAC_USB */
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("KH: bin file should be 8KB.\n"));
+		Status = NDIS_STATUS_FAILURE;
+	}
+
+
+	RTMP_WRITE_FIRMWARE(pAd, pFirmwareImage, FileLength);
+
+#endif
+
+	if (isMCUnotReady(pAd))
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("NICLoadFirmware: MCU is not ready\n\n\n"));
+		Status = NDIS_STATUS_FAILURE;
+	}
+#ifdef RTMP_USB_SUPPORT
+	else
+	{
+		RTUSBWriteMACRegister(pAd, H2M_BBP_AGENT, 0); /* initialize BBP R/W access agent. */
+		RTUSBWriteMACRegister(pAd,H2M_MAILBOX_CSR,0);
+		RTUSBWriteMACRegister(pAd, H2M_INT_SRC, 0);
+		AsicSendCommandToMcu(pAd, 0x72, 0x00, 0x00, 0x00); /* reset rf by MCU supported by new firmware */
+//		RTMPusecDelay(1000);
+//		AsicSendCommandToMcu(pAd, 0x31, 0x00, 0x00, 0x00);/* Wakeup MCU */
+	}
+#endif /* RTMP_USB_SUPPORT */
+
+    DBGPRINT(RT_DEBUG_TRACE, ("<=== %s (status=%d)\n", __FUNCTION__, Status));
+
+    return Status;
+}
+
+
+INT RtmpAsicSendCommandToMcu(
+	IN PRTMP_ADAPTER	pAd,
+	IN UCHAR			Command,
+	IN UCHAR			Token,
+	IN UCHAR			Arg0,
+	IN UCHAR			Arg1,
+	IN BOOLEAN			FlgIsNeedLocked)
+{
+	HOST_CMD_CSR_STRUC	H2MCmd;
+	H2M_MAILBOX_STRUC	H2MMailbox;
+	ULONG				i = 0;
+#ifdef SPECIFIC_BCN_BUF_SUPPORT
+	ULONG	IrqFlags = 0;
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */
+#ifdef CONFIG_STA_SUPPORT
+#ifdef PCIE_PS_SUPPORT
+	POS_COOKIE pObj;
+	ULONG	Configuration;
+	ULONG	offset;
+#endif /* PCIE_PS_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef PCIE_PS_SUPPORT
+	pObj = (POS_COOKIE) pAd->OS_Cookie;
+#if defined(RT5390) || defined(RT5392)
+         /* 
+         	FW v.30; for 0x30 MCU CMD, Arg1 is not L1/L0 state anymore
+	 	Arg 1 set to 0x5A, then FW will not turn off PCIe CLK for PM4 (Associate-Idle)
+	 	default it will be turned off; and can be configured to not turn off at PM4
+	  */
+	if (Command == SLEEP_MCU_CMD)
+	{
+		Arg1 = 0x00;		/* set default to 0 */ 
+	
+		if ((INFRA_ON(pAd)) && (pAd->OpMode == OPMODE_STA))
+		{
+			if ((OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED)) && (pAd->StaCfg.PSControl.field.PM4PCIeCLKOn))
+			{
+				Arg1 = (UCHAR)0x5A;		/* Arg1 set to 0x5A, FW will not turn off PCIe CLK */
+			}
+		}
+	}
+	/*
+		When calling from RTMP_BBP_IO_READ8_BY_REG_ID or RTMP_BBP_IO_WRITE8_BY_REG_ID,
+	 	MCUCommandLock already locked.  So don't lock here again.
+	*/
+#endif /* defined(RT5390) || defined(RT5392) */
+
+
+
+	/* 3090F power solution 3 has hw limitation that needs to ban all mcu command */
+	/* when firmware is in radio state.  For other chip doesn't have this limitation. */
+	if ((IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd) 
+		|| IS_RT3593(pAd) || IS_RT5390(pAd) || IS_RT5392(pAd)) 
+		&& IS_VERSION_AFTER_F(pAd)
+		&& (pAd->StaCfg.PSControl.field.rt30xxPowerMode == 3) 
+		&& (pAd->StaCfg.PSControl.field.EnableNewPS == TRUE))
+	{
+
+		RTMP_SEM_LOCK(&pAd->McuCmdLock);
+
+		if ((pAd->brt30xxBanMcuCmd == TRUE)
+			&& (Command != WAKE_MCU_CMD) && (Command != RFOFF_MCU_CMD))
+		{
+
+			DBGPRINT(RT_DEBUG_TRACE, (" Ban Mcu Cmd %x in sleep mode\n",  Command));
+			RTMP_SEM_UNLOCK(&pAd->McuCmdLock);
+			return FALSE;
+		}
+		else if ((Command == SLEEP_MCU_CMD)
+			||(Command == RFOFF_MCU_CMD))
+		{
+			pAd->brt30xxBanMcuCmd = TRUE;
+		}
+		else if (Command != WAKE_MCU_CMD)
+		{
+			pAd->brt30xxBanMcuCmd = FALSE;
+		}
+
+		RTMP_SEM_UNLOCK(&pAd->McuCmdLock);
+
+
+	}
+
+#if defined(RT5390) || defined(RT5392)
+	if (Command == SLEEP_MCU_CMD)
+        {
+                /* Write L1 latency */
+		if ((pAd->StaCfg.PSControl.field.AMDNewPSOn == TRUE) && ((IS_RT30xx(pAd) ||IS_RT5390(pAd) || IS_RT5392(pAd))
+			&& (pAd->HostVendor != PCIBUS_INTEL_VENDOR)))
+		{
+			offset = 0x70F;
+			pci_read_config_word(((POS_COOKIE)pAd->OS_Cookie)->pci_dev, offset, &Configuration); 
+			Configuration=le2cpu16(Configuration);
+			Configuration &= 0xffffff00;
+			Configuration |= (0x13);	/* set Latency to default */
+			Configuration=le2cpu16(Configuration);
+			pci_write_config_word(((POS_COOKIE)pAd->OS_Cookie)->pci_dev, offset, Configuration);
+			DBGPRINT(RT_DEBUG_TRACE, ("Write 70f; offset = %x, Configuration = %x. \n", offset, Configuration));
+		}
+		pAd->LastMCUCmd = Command;
+        }
+        else if (Command == WAKE_MCU_CMD)
+	{
+		/* Write L1 latency */
+		if ((pAd->StaCfg.PSControl.field.AMDNewPSOn == TRUE) && (IS_RT3090(pAd) || IS_RT3572(pAd) 
+			|| IS_RT3390(pAd) || IS_RT3593(pAd) || IS_RT5390(pAd) || IS_RT5392(pAd))
+			&& (pAd->HostVendor != PCIBUS_INTEL_VENDOR))
+		{
+			offset = 0x70F;
+			/* Configuration = RTMPReadCBConfigXP(pAd, offset); */
+			pci_read_config_word(((POS_COOKIE)pAd->OS_Cookie)->pci_dev, offset, &Configuration);
+			Configuration=le2cpu16(Configuration);
+
+			Configuration &= 0xffffff00;
+			Configuration |= (0x7F);	// Set to long latency
+			Configuration=le2cpu16(Configuration);
+
+			pci_write_config_word(((POS_COOKIE)pAd->OS_Cookie)->pci_dev, offset, Configuration);
+
+			DBGPRINT(RT_DEBUG_TRACE, ("RadioOnExec restore 70f; offset = %x, Configuration = %x. \n", offset, Configuration));
+		}
+	}
+
+#endif /* defined(RT5390) || defined(RT5392) */
+
+	if ((IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd) 
+		|| IS_RT3593(pAd) || IS_RT5390(pAd) || IS_RT5392(pAd)) 
+		&& IS_VERSION_AFTER_F(pAd)
+		&& (pAd->StaCfg.PSControl.field.rt30xxPowerMode == 3) 
+		&& (pAd->StaCfg.PSControl.field.EnableNewPS == TRUE)
+		&& (Command == WAKE_MCU_CMD))
+	{
+
+#ifdef SPECIFIC_BCN_BUF_SUPPORT
+		if (FlgIsNeedLocked == TRUE)
+		{
+		           RTMP_MAC_SHR_MSEL_PROTECT_LOCK(pAd, IrqFlags);
+		}
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */
+
+		/* don't check MailBox for 0x84, 0x31*/
+		if ((Command != 0x84) && (Command != WAKE_MCU_CMD))
+		{
+			do
+			{
+				RTMP_IO_FORCE_READ32(pAd, H2M_MAILBOX_CSR, &H2MMailbox.word);
+				if (H2MMailbox.field.Owner == 0)
+					break;
+
+				if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))				
+				{
+#ifdef SPECIFIC_BCN_BUF_SUPPORT	
+					if (FlgIsNeedLocked == TRUE)
+						RTMP_MAC_SHR_MSEL_PROTECT_UNLOCK(pAd, IrqFlags);
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */
+					return FALSE;
+				}
+				RTMPusecDelay(2);
+				DBGPRINT(RT_DEBUG_INFO, ("AsicSendCommanToMcu::Mail box is busy\n"));
+			} while(i++ < 100);
+
+			if (i >= 100)
+			{
+				DBGPRINT_ERR(("H2M_MAILBOX still hold by MCU. command fail\n"));
+#ifdef SPECIFIC_BCN_BUF_SUPPORT	
+				if (FlgIsNeedLocked == TRUE)
+					RTMP_MAC_SHR_MSEL_PROTECT_UNLOCK(pAd, IrqFlags);
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */
+
+					return FALSE;
+			}
+		}
+
+		H2MMailbox.field.Owner	  = 1;	   /* pass ownership to MCU*/
+		H2MMailbox.field.CmdToken = Token;
+		H2MMailbox.field.HighByte = Arg1;
+		H2MMailbox.field.LowByte  = Arg0;
+		RTMP_IO_FORCE_WRITE32(pAd, H2M_MAILBOX_CSR, H2MMailbox.word);
+
+		H2MCmd.word 			  = 0;
+		H2MCmd.field.HostCommand  = Command;
+		RTMP_IO_FORCE_WRITE32(pAd, HOST_CMD_CSR, H2MCmd.word);
+#ifdef SPECIFIC_BCN_BUF_SUPPORT
+			if (FlgIsNeedLocked == TRUE)
+				RTMP_MAC_SHR_MSEL_PROTECT_UNLOCK(pAd, IrqFlags);
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */
+
+
+	}
+	else
+#endif /* PCIE_PS_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+	{
+
+#ifdef SPECIFIC_BCN_BUF_SUPPORT
+		if (FlgIsNeedLocked == TRUE)
+		{
+		           RTMP_MAC_SHR_MSEL_PROTECT_LOCK(pAd, IrqFlags);
+		}
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */
+
+	do
+	{
+		RTMP_IO_READ32(pAd, H2M_MAILBOX_CSR, &H2MMailbox.word);
+		if (H2MMailbox.field.Owner == 0)
+			break;
+
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))				
+		{
+#ifdef SPECIFIC_BCN_BUF_SUPPORT	
+			if (FlgIsNeedLocked == TRUE)
+				RTMP_MAC_SHR_MSEL_PROTECT_UNLOCK(pAd, IrqFlags);
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */
+			return FALSE;
+		}
+		RTMPusecDelay(2);
+	} while(i++ < 100);
+
+	if (i >= 100)
+	{
+		{
+		DBGPRINT_ERR(("H2M_MAILBOX still hold by MCU. command fail\n"));
+		}
+#ifdef SPECIFIC_BCN_BUF_SUPPORT	
+		if (FlgIsNeedLocked == TRUE)
+			RTMP_MAC_SHR_MSEL_PROTECT_UNLOCK(pAd, IrqFlags);
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */
+		return FALSE;
+	}
+
+
+	H2MMailbox.field.Owner	  = 1;	   /* pass ownership to MCU*/
+	H2MMailbox.field.CmdToken = Token;
+	H2MMailbox.field.HighByte = Arg1;
+	H2MMailbox.field.LowByte  = Arg0;
+	RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, H2MMailbox.word);
+
+	H2MCmd.word 			  = 0;
+	H2MCmd.field.HostCommand  = Command;
+	RTMP_IO_WRITE32(pAd, HOST_CMD_CSR, H2MCmd.word);
+
+#ifdef SPECIFIC_BCN_BUF_SUPPORT
+			if (FlgIsNeedLocked == TRUE)
+				RTMP_MAC_SHR_MSEL_PROTECT_UNLOCK(pAd, IrqFlags);
+#endif // SPECIFIC_BCN_BUF_SUPPORT //
+
+	if (Command != 0x80)
+	{
+	}
+}
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef PCIE_PS_SUPPORT
+	/* 3090 MCU Wakeup command needs more time to be stable. */
+	/* Before stable, don't issue other MCU command to prevent from firmware error.*/
+	if ((IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd) 
+		|| IS_RT3593(pAd) || IS_RT5390(pAd) || IS_RT5392(pAd)) 
+		&& IS_VERSION_AFTER_F(pAd)
+		&& (pAd->StaCfg.PSControl.field.rt30xxPowerMode == 3) 
+		&& (pAd->StaCfg.PSControl.field.EnableNewPS == TRUE))
+	{
+		/*Put this is after RF programming.  */
+		/*NdisAcquireSpinLock(&pAd->McuCmdLock);*/
+		/*pAd->brt30xxBanMcuCmd = FALSE;*/
+		/*NdisReleaseSpinLock(&pAd->McuCmdLock);*/
+		switch (Command)
+		{
+			case WAKE_MCU_CMD :
+				RTMPusecDelay(2500);
+
+				if ((pAd->StaCfg.PSControl.field.rt30xxPowerMode == 3) &&
+					(pAd->StaCfg.PSControl.field.EnableNewPS == TRUE))
+				{
+					/* Put this is after RF program. */ 
+					pAd->brt30xxBanMcuCmd = FALSE;
+				}
+				break;
+			case SLEEP_MCU_CMD :
+				RTMPusecDelay(2000);
+				break;
+	}
+	}
+
+#endif /* PCIE_PS_SUPPORT */	
+#endif /* CONFIG_STA_SUPPORT */
+
+	if (Command == WAKE_MCU_CMD)
+		pAd->LastMCUCmd = Command;
+
+	return TRUE;
+
+
+}
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/rtmp_timer.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/rtmp_timer.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/rtmp_timer.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/rtmp_timer.c	2017-09-23 03:42:49.766675834 +0800
@@ -0,0 +1,318 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+
+BUILD_TIMER_FUNCTION(MlmePeriodicExec);
+/*BUILD_TIMER_FUNCTION(MlmeRssiReportExec);*/
+BUILD_TIMER_FUNCTION(AsicRxAntEvalTimeout);
+BUILD_TIMER_FUNCTION(APSDPeriodicExec);
+BUILD_TIMER_FUNCTION(EnqueueStartForPSKExec);
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+#ifdef RTMP_MAC_USB
+BUILD_TIMER_FUNCTION(BeaconUpdateExec);
+#endif /* RTMP_MAC_USB */
+
+
+#ifdef CONFIG_STA_SUPPORT
+BUILD_TIMER_FUNCTION(BeaconTimeout);
+BUILD_TIMER_FUNCTION(ScanTimeout);
+BUILD_TIMER_FUNCTION(AuthTimeout);
+BUILD_TIMER_FUNCTION(AssocTimeout);
+BUILD_TIMER_FUNCTION(ReassocTimeout);
+BUILD_TIMER_FUNCTION(DisassocTimeout);
+BUILD_TIMER_FUNCTION(LinkDownExec);
+BUILD_TIMER_FUNCTION(StaQuickResponeForRateUpExec);
+BUILD_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc);
+#ifdef PCIE_PS_SUPPORT
+BUILD_TIMER_FUNCTION(PsPollWakeExec);
+BUILD_TIMER_FUNCTION(RadioOnExec);
+#endif /* PCIE_PS_SUPPORT */
+#ifdef QOS_DLS_SUPPORT
+BUILD_TIMER_FUNCTION(DlsTimeoutAction);
+#endif /* QOS_DLS_SUPPORT */
+
+
+
+#ifdef RTMP_MAC_USB
+BUILD_TIMER_FUNCTION(RtmpUsbStaAsicForceWakeupTimeout);
+#endif /* RTMP_MAC_USB */
+
+
+#endif /* CONFIG_STA_SUPPORT */
+
+
+
+
+
+
+#ifdef RTMP_TIMER_TASK_SUPPORT
+static void RtmpTimerQHandle(RTMP_ADAPTER *pAd)
+{
+/*#ifndef KTHREAD_SUPPORT*/
+	int status;
+/*#endif*/
+	RALINK_TIMER_STRUCT	*pTimer;
+	RTMP_TIMER_TASK_ENTRY	*pEntry;
+	unsigned long	irqFlag;
+	RTMP_OS_TASK *pTask;
+
+
+	pTask = &pAd->timerTask;
+	while(!RTMP_OS_TASK_IS_KILLED(pTask))
+	{
+		pTimer = NULL;
+
+		if (RtmpOSTaskWait(pAd, pTask, &status) == FALSE)
+		{
+			RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS);
+			break;
+		}
+
+		if (pAd->TimerQ.status == RTMP_TASK_STAT_STOPED)
+			break;
+		
+		/* event happened.*/
+		while(pAd->TimerQ.pQHead)
+		{
+			RTMP_INT_LOCK(&pAd->TimerQLock, irqFlag);
+			pEntry = pAd->TimerQ.pQHead;
+			if (pEntry)
+			{
+				pTimer = pEntry->pRaTimer;
+
+				/* update pQHead*/
+				pAd->TimerQ.pQHead = pEntry->pNext;
+				if (pEntry == pAd->TimerQ.pQTail)
+					pAd->TimerQ.pQTail = NULL;
+			
+				/* return this queue entry to timerQFreeList.*/
+				pEntry->pNext = pAd->TimerQ.pQPollFreeList;
+				pAd->TimerQ.pQPollFreeList = pEntry;
+			}
+			RTMP_INT_UNLOCK(&pAd->TimerQLock, irqFlag);
+
+			if (pTimer)
+			{
+				if ((pTimer->handle != NULL) && (!pAd->PM_FlgSuspend))
+					pTimer->handle(NULL, (PVOID) pTimer->cookie, NULL, pTimer);
+				if ((pTimer->Repeat) && (pTimer->State == FALSE))
+					RTMP_OS_Add_Timer(&pTimer->TimerObj, pTimer->TimerValue);
+			}
+		}
+		
+/*#ifndef KTHREAD_SUPPORT*/
+		if (status != 0)
+		{
+			pAd->TimerQ.status = RTMP_TASK_STAT_STOPED;
+			RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS);
+			break;
+		}
+/*#endif*/
+	}
+}
+
+
+INT RtmpTimerQThread(
+	IN ULONG Context)
+{
+	RTMP_OS_TASK	*pTask;
+	PRTMP_ADAPTER	pAd = NULL;
+
+
+	pTask = (RTMP_OS_TASK *)Context;
+	pAd = (PRTMP_ADAPTER)RTMP_OS_TASK_DATA_GET(pTask);
+
+	if (pAd == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR,( "%s:: pAd is NULL!\n",__FUNCTION__));
+		return 0;
+	}	
+
+	RtmpOSTaskCustomize(pTask);
+
+	RtmpTimerQHandle(pAd);
+
+	DBGPRINT(RT_DEBUG_TRACE,( "<---%s\n",__FUNCTION__));
+	/* notify the exit routine that we're actually exiting now 
+	 *
+	 * complete()/wait_for_completion() is similar to up()/down(),
+	 * except that complete() is safe in the case where the structure
+	 * is getting deleted in a parallel mode of execution (i.e. just
+	 * after the down() -- that's necessary for the thread-shutdown
+	 * case.
+	 *
+	 * complete_and_exit() goes even further than this -- it is safe in
+	 * the case that the thread of the caller is going away (not just
+	 * the structure) -- this is necessary for the module-remove case.
+	 * This is important in preemption kernels, which transfer the flow
+	 * of execution immediately upon a complete().
+	 */
+	RtmpOSTaskNotifyToExit(pTask);
+	
+	return 0;
+
+}
+
+
+RTMP_TIMER_TASK_ENTRY *RtmpTimerQInsert(
+	IN RTMP_ADAPTER *pAd, 
+	IN RALINK_TIMER_STRUCT *pTimer)
+{
+	RTMP_TIMER_TASK_ENTRY *pQNode = NULL, *pQTail;
+	unsigned long irqFlags;
+	RTMP_OS_TASK	*pTask = &pAd->timerTask;
+
+	RTMP_INT_LOCK(&pAd->TimerQLock, irqFlags);
+	if (pAd->TimerQ.status & RTMP_TASK_CAN_DO_INSERT)
+	{
+		if(pAd->TimerQ.pQPollFreeList)
+		{
+			pQNode = pAd->TimerQ.pQPollFreeList;
+			pAd->TimerQ.pQPollFreeList = pQNode->pNext;
+
+			pQNode->pRaTimer = pTimer;
+			pQNode->pNext = NULL;
+
+			pQTail = pAd->TimerQ.pQTail;
+			if (pAd->TimerQ.pQTail != NULL)
+				pQTail->pNext = pQNode;
+			pAd->TimerQ.pQTail = pQNode;
+			if (pAd->TimerQ.pQHead == NULL)
+				pAd->TimerQ.pQHead = pQNode;
+		}
+	}
+	RTMP_INT_UNLOCK(&pAd->TimerQLock, irqFlags);
+
+	if (pQNode)
+	{
+		RTMP_OS_TASK_WAKE_UP(pTask);
+	}
+
+	return pQNode;
+}
+
+
+BOOLEAN RtmpTimerQRemove(
+	IN RTMP_ADAPTER *pAd, 
+	IN RALINK_TIMER_STRUCT *pTimer)
+{
+	RTMP_TIMER_TASK_ENTRY *pNode, *pPrev = NULL;
+	unsigned long irqFlags;
+
+	RTMP_INT_LOCK(&pAd->TimerQLock, irqFlags);
+	if (pAd->TimerQ.status >= RTMP_TASK_STAT_INITED)
+	{
+		pNode = pAd->TimerQ.pQHead;
+		while (pNode)
+		{
+			if (pNode->pRaTimer == pTimer)
+				break;
+			pPrev = pNode;
+			pNode = pNode->pNext;
+		}
+
+		/* Now move it to freeList queue.*/
+		if (pNode)
+		{	
+			if (pNode == pAd->TimerQ.pQHead)
+				pAd->TimerQ.pQHead = pNode->pNext;
+			if (pNode == pAd->TimerQ.pQTail)
+				pAd->TimerQ.pQTail = pPrev;
+			if (pPrev != NULL)
+				pPrev->pNext = pNode->pNext;
+			
+			/* return this queue entry to timerQFreeList.*/
+			pNode->pNext = pAd->TimerQ.pQPollFreeList;
+			pAd->TimerQ.pQPollFreeList = pNode;
+		}
+	}
+	RTMP_INT_UNLOCK(&pAd->TimerQLock, irqFlags);
+			
+	return TRUE;
+}
+
+
+void RtmpTimerQExit(RTMP_ADAPTER *pAd)
+{
+	RTMP_TIMER_TASK_ENTRY *pTimerQ;
+	unsigned long irqFlags;
+	
+	RTMP_INT_LOCK(&pAd->TimerQLock, irqFlags);
+	while (pAd->TimerQ.pQHead)
+	{
+		pTimerQ = pAd->TimerQ.pQHead;
+		pAd->TimerQ.pQHead = pTimerQ->pNext;
+		/* remove the timeQ*/
+	}
+	pAd->TimerQ.pQPollFreeList = NULL;
+	os_free_mem(pAd, pAd->TimerQ.pTimerQPoll);
+	pAd->TimerQ.pQTail = NULL;
+	pAd->TimerQ.pQHead = NULL;
+/*#ifndef KTHREAD_SUPPORT*/
+	pAd->TimerQ.status = RTMP_TASK_STAT_STOPED;
+/*#endif*/
+	RTMP_INT_UNLOCK(&pAd->TimerQLock, irqFlags);
+	NdisFreeSpinLock(&pAd->TimerQLock);
+}
+
+
+void RtmpTimerQInit(RTMP_ADAPTER *pAd)
+{
+	int 	i;
+	RTMP_TIMER_TASK_ENTRY *pQNode, *pEntry;
+	unsigned long irqFlags;
+	
+	NdisAllocateSpinLock(pAd, &pAd->TimerQLock);
+	
+	NdisZeroMemory(&pAd->TimerQ, sizeof(pAd->TimerQ));
+
+	os_alloc_mem(pAd, &pAd->TimerQ.pTimerQPoll, sizeof(RTMP_TIMER_TASK_ENTRY) * TIMER_QUEUE_SIZE_MAX);
+	if (pAd->TimerQ.pTimerQPoll)
+	{
+		pEntry = NULL;
+		pQNode = (RTMP_TIMER_TASK_ENTRY *)pAd->TimerQ.pTimerQPoll;
+		NdisZeroMemory(pAd->TimerQ.pTimerQPoll, sizeof(RTMP_TIMER_TASK_ENTRY) * TIMER_QUEUE_SIZE_MAX);
+
+		RTMP_INT_LOCK(&pAd->TimerQLock, irqFlags);
+		for (i = 0 ;i <TIMER_QUEUE_SIZE_MAX; i++)
+		{
+			pQNode->pNext = pEntry;
+			pEntry = pQNode;
+			pQNode++;
+		}
+		pAd->TimerQ.pQPollFreeList = pEntry;
+		pAd->TimerQ.pQHead = NULL;
+		pAd->TimerQ.pQTail = NULL;
+		pAd->TimerQ.status = RTMP_TASK_STAT_INITED;
+		RTMP_INT_UNLOCK(&pAd->TimerQLock, irqFlags);
+	}
+}
+#endif /* RTMP_TIMER_TASK_SUPPORT */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/rt_os_util.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/rt_os_util.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/rt_os_util.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/rt_os_util.c	2017-09-23 03:42:49.770675822 +0800
@@ -0,0 +1,204 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#define RTMP_MODULE_OS
+#define RTMP_MODULE_OS_UTIL
+
+/*#include "rt_config.h"
+*/
+#include "rtmp_comm.h"
+#include "rt_os_util.h"
+#include "rtmp_osabl.h"
+
+
+UINT32 RalinkRate[256] =
+	{2,  4, 11, 22, 12, 18,   24,  36, 48, 72, 96, 108, 109, 110, 111, 112,
+	13, 26,   39,  52,  78, 104, 117, 130, 26,  52,  78, 104, 156, 208, 234, 260,
+	39, 78,  117, 156, 234, 312, 351, 390,
+	27, 54,   81, 108, 162, 216, 243, 270, 54, 108, 162, 216, 324, 432, 486, 540,
+	81, 162, 243, 324, 486, 648, 729, 810,
+	14, 29,   43,  57,  87, 115, 130, 144, 29, 59,   87, 115, 173, 230, 260, 288,
+	43, 87,  130, 173, 260, 317, 390, 433,
+	30, 60,   90, 120, 180, 240, 270, 300, 60, 120, 180, 240, 360, 480, 540, 600,
+	90, 180, 270, 360, 540, 720, 810, 900,
+	0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,
+	20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,
+	40,41,42,43,44,45,46,47}; /* 3*3
+*/
+
+VOID RtmpDrvMaxRateGet(
+	IN	VOID					*pReserved,
+/*	IN	PHTTRANSMIT_SETTING		pHtPhyMode,
+*/
+	IN	UINT8					MODE,
+	IN	UINT8					ShortGI,
+	IN	UINT8					BW,
+	IN	UINT8					MCS,
+	OUT	UINT32					*pRate)
+{
+	int rate_index = 0;
+
+#ifdef DOT11_N_SUPPORT
+	if (MODE >= MODE_HTMIX)
+	{
+	/*                	rate_index = 16 + ((UCHAR)pHtPhyMode->field.BW *16) + ((UCHAR)pHtPhyMode->field.ShortGI *32) + ((UCHAR)pHtPhyMode->field.MCS);
+*/
+		rate_index = 16 + ((UCHAR)BW *24) + ((UCHAR)ShortGI *48) + ((UCHAR)MCS);
+	}
+	else 
+#endif /* DOT11_N_SUPPORT */
+		if (MODE == MODE_OFDM)
+			rate_index = (UCHAR)(MCS) + 4;
+		else 
+			rate_index = (UCHAR)(MCS);
+
+	if (rate_index < 0)
+		rate_index = 0;
+
+	if (rate_index > 255)
+		rate_index = 255;
+    
+	*pRate = RalinkRate[rate_index] * 500000;
+}
+
+
+char * rtstrchr(const char * s, int c)
+{
+    for(; *s != (char) c; ++s)
+        if (*s == '\0')
+            return NULL;
+    return (char *) s;
+}
+
+
+VOID RtmpMeshDown(
+	IN	VOID					*pDrvCtrlBK,
+	IN	BOOLEAN					WaitFlag,
+	IN	BOOLEAN					(*RtmpMeshLinkCheck)(IN VOID *pAd))
+{
+}
+
+
+
+	
+BOOLEAN RtmpOsCmdDisplayLenCheck(
+	IN	UINT32					LenSrc,
+	IN	UINT32					Offset)
+{
+	if (LenSrc > (IW_PRIV_SIZE_MASK - Offset))
+		return FALSE;
+
+	return TRUE;
+}
+
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef WPA_SUPPLICANT_SUPPORT
+VOID    WpaSendMicFailureToWpaSupplicant(
+	IN	PNET_DEV				pNetDev,
+    IN  BOOLEAN					bUnicast)
+{    
+	char custom[IW_CUSTOM_MAX] = {0};
+    
+	snprintf(custom, sizeof(custom), "MLME-MICHAELMICFAILURE.indication");
+	if(bUnicast)
+		sprintf(custom, "%s unicast", custom);
+
+	RtmpOSWrielessEventSend(pNetDev, RT_WLAN_EVENT_CUSTOM, -1, NULL, (PUCHAR)custom, strlen(custom));
+	
+	return;
+}
+#endif /* WPA_SUPPLICANT_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+
+
+#ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
+int wext_notify_event_assoc(
+	IN	PNET_DEV				pNetDev,
+	IN	UCHAR					*ReqVarIEs,
+	IN	UINT32					ReqVarIELen)
+{
+	char custom[IW_CUSTOM_MAX] = {0};
+
+#if WIRELESS_EXT > 17
+	if (ReqVarIELen <= IW_CUSTOM_MAX)
+	{
+		NdisMoveMemory(custom, ReqVarIEs, ReqVarIELen);
+		RtmpOSWrielessEventSend(pNetDev, RT_WLAN_EVENT_ASSOC_REQ_IE, -1, NULL,
+								(UCHAR *)custom, ReqVarIELen);
+	}
+	else
+	    DBGPRINT(RT_DEBUG_TRACE, ("pAd->StaCfg.ReqVarIELen > MAX_CUSTOM_LEN\n"));
+#else
+	int len;
+
+	len = (ReqVarIELen*2) + 17;
+	if (len <= IW_CUSTOM_MAX)
+	{
+		UCHAR   idx;
+		snprintf(custom, sizeof(custom), "ASSOCINFO(ReqIEs=");
+		for (idx=0; idx<ReqVarIELen; idx++)
+		        sprintf(custom, "%s%02x", custom, ReqVarIEs[idx]);
+		RtmpOSWrielessEventSend(pNetDev, RT_WLAN_EVENT_CUSTOM, -1, NULL, custom, len);
+	}
+	else
+		DBGPRINT(RT_DEBUG_TRACE, ("len(%d) > MAX_CUSTOM_LEN\n", len));
+#endif
+
+	return 0;
+	
+}
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+#ifndef NATIVE_WPA_SUPPLICANT_SUPPORT
+VOID    SendAssocIEsToWpaSupplicant( 
+	IN	PNET_DEV				pNetDev,
+	IN	UCHAR					*ReqVarIEs,
+	IN	UINT32					ReqVarIELen)
+{
+	STRING custom[IW_CUSTOM_MAX] = {0};
+
+	if ((ReqVarIELen + 17) <= IW_CUSTOM_MAX)
+	{
+		snprintf(custom, sizeof(custom), "ASSOCINFO_ReqIEs=");
+		NdisMoveMemory(custom+17, ReqVarIEs, ReqVarIELen);
+		RtmpOSWrielessEventSend(pNetDev, RT_WLAN_EVENT_CUSTOM, RT_REQIE_EVENT_FLAG, NULL, (PUCHAR)custom, ReqVarIELen + 17);
+
+		RtmpOSWrielessEventSend(pNetDev, RT_WLAN_EVENT_CUSTOM, RT_ASSOCINFO_EVENT_FLAG, NULL, NULL, 0);
+	}
+	else
+		DBGPRINT(RT_DEBUG_TRACE, ("pAd->StaCfg.ReqVarIELen + 17 > MAX_CUSTOM_LEN\n"));
+
+	return;
+}
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+
+/* End of rtmp_os_util.c */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/rt_rf.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/rt_rf.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/rt_rf.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/rt_rf.c	2017-09-23 03:42:49.770675822 +0800
@@ -0,0 +1,289 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+
+#ifdef RTMP_RF_RW_SUPPORT
+/*
+	========================================================================
+	
+	Routine Description: Write RT30xx RF register through MAC
+
+	Arguments:
+
+	Return Value:
+
+	IRQL = 
+	
+	Note:
+	
+	========================================================================
+*/
+NDIS_STATUS RT30xxWriteRFRegister(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			regID,
+	IN	UCHAR			value)
+{
+	RF_CSR_CFG_STRUC	rfcsr = { { 0 } };
+	UINT				i = 0;
+#if defined(RT3593) || defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+	RF_CSR_CFG_EXT_STRUC RfCsrCfgExt = { { 0 } };
+#endif /* RT3593 || defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+
+
+
+#if defined(RT3593) || defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+	if (IS_RT3593(pAd) || IS_RT5390(pAd))
+	{
+		ASSERT((regID <= 63)); /* R0~R63*/
+
+		do
+		{
+			RTMP_IO_READ32(pAd, RF_CSR_CFG, &RfCsrCfgExt.word);
+
+			if (!RfCsrCfgExt.field.RF_CSR_KICK)
+			{
+				break;
+			}
+			
+			i++;
+		}
+		
+		while ((i < MAX_BUSY_COUNT) && (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)))
+			; /* Do nothing*/
+
+		if ((i == MAX_BUSY_COUNT) || (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)))
+		{
+			DBGPRINT_RAW(RT_DEBUG_ERROR, ("Retry count exhausted or device removed!!!\n"));
+			return STATUS_UNSUCCESSFUL;
+		}
+
+		RfCsrCfgExt.field.RF_CSR_WR = 1;
+		RfCsrCfgExt.field.RF_CSR_KICK = 1;
+		RfCsrCfgExt.field.TESTCSR_RFACC_REGNUM = regID; /* R0~R63*/
+		RfCsrCfgExt.field.RF_CSR_DATA = value;
+		
+		RTMP_IO_WRITE32(pAd, RF_CSR_CFG, RfCsrCfgExt.word);
+
+	}
+	else
+#endif /* RT3593  || defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+	{
+		ASSERT((regID <= pAd->chipCap.MaxNumOfRfId)); /* R0~R31 or R63*/
+
+		do
+		{
+			RTMP_IO_READ32(pAd, RF_CSR_CFG, &rfcsr.word);
+
+			if (!rfcsr.field.RF_CSR_KICK)
+				break;
+			i++;
+		}
+		while ((i < RETRY_LIMIT) && (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)));
+
+		if ((i == RETRY_LIMIT) || (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)))
+		{
+			DBGPRINT_RAW(RT_DEBUG_ERROR, ("Retry count exhausted or device removed!!!\n"));
+			return STATUS_UNSUCCESSFUL;
+		}
+
+		if ((pAd->chipCap.RfReg17WtMethod == RF_REG_WT_METHOD_STEP_ON) &&
+			(regID == RF_R17))
+		{
+			UINT32 IdRf;
+			UCHAR RfValue;
+
+			RT30xxReadRFRegister(pAd, RF_R17, &RfValue);
+
+			rfcsr.field.RF_CSR_WR = 1;
+			rfcsr.field.RF_CSR_KICK = 1;
+			rfcsr.field.TESTCSR_RFACC_REGNUM = regID; /* R0~R31*/
+
+			if (RfValue <= value)
+			{
+				for(IdRf=RfValue; IdRf<=value; IdRf++)
+				{
+					rfcsr.field.RF_CSR_DATA = IdRf;
+					RTMP_IO_WRITE32(pAd, RF_CSR_CFG, rfcsr.word);
+				}
+			}
+			else
+			{
+				for(IdRf=RfValue; IdRf>=value; IdRf--)
+				{
+					rfcsr.field.RF_CSR_DATA = IdRf;
+					RTMP_IO_WRITE32(pAd, RF_CSR_CFG, rfcsr.word);
+				}
+			}
+		}
+		else
+		{
+			rfcsr.field.RF_CSR_WR = 1;
+			rfcsr.field.RF_CSR_KICK = 1;
+			rfcsr.field.TESTCSR_RFACC_REGNUM = regID; /* R0~R31*/
+			rfcsr.field.RF_CSR_DATA = value;
+			RTMP_IO_WRITE32(pAd, RF_CSR_CFG, rfcsr.word);
+		}
+	}
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description: Read RT30xx RF register through MAC
+
+	Arguments:
+
+	Return Value:
+
+	IRQL = 
+	
+	Note:
+	
+	========================================================================
+*/
+NDIS_STATUS RT30xxReadRFRegister(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			regID,
+	IN	PUCHAR			pValue)
+{
+	RF_CSR_CFG_STRUC	rfcsr = { { 0 } };
+	UINT				i=0, k=0;
+
+#if defined(RT3593) || defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+	RF_CSR_CFG_EXT_STRUC RfCsrCfgExt = { { 0 } };
+#endif /* RT3593 || defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+
+
+
+#if defined(RT3593) || defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+	if (IS_RT3593(pAd) || IS_RT5390(pAd))
+	{
+		ASSERT((regID <= 63)); /* R0~R63*/
+		
+		for (i = 0; i < MAX_BUSY_COUNT; i++)
+		{
+			if(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))
+				return STATUS_UNSUCCESSFUL;
+			
+			RTMP_IO_READ32(pAd, RF_CSR_CFG, &RfCsrCfgExt.word);
+
+			if (RfCsrCfgExt.field.RF_CSR_KICK == BUSY)
+			{
+				continue;
+			}
+			
+			RfCsrCfgExt.word = 0;
+			RfCsrCfgExt.field.RF_CSR_WR = 0;
+			RfCsrCfgExt.field.RF_CSR_KICK = 1;
+			RfCsrCfgExt.field.TESTCSR_RFACC_REGNUM = regID; /* R0~R63*/
+			
+			RTMP_IO_WRITE32(pAd, RF_CSR_CFG, RfCsrCfgExt.word);
+			
+			for (k = 0; k < MAX_BUSY_COUNT; k++)
+			{
+				if(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))
+					return STATUS_UNSUCCESSFUL;
+				
+				RTMP_IO_READ32(pAd, RF_CSR_CFG, &RfCsrCfgExt.word);
+
+				if (RfCsrCfgExt.field.RF_CSR_KICK == IDLE)
+				{
+					break;
+				}
+			}
+			
+			if ((RfCsrCfgExt.field.RF_CSR_KICK == IDLE) && 
+			     (RfCsrCfgExt.field.TESTCSR_RFACC_REGNUM == regID))
+			{
+				*pValue = (UCHAR)(RfCsrCfgExt.field.RF_CSR_DATA);
+				break;
+			}
+		}
+
+		if (RfCsrCfgExt.field.RF_CSR_KICK == BUSY)
+		{																	
+			DBGPRINT_ERR(("RF read R%d = 0x%X fail, i[%d], k[%d]\n", regID, (UINT32)RfCsrCfgExt.word, i, k));
+			return STATUS_UNSUCCESSFUL;
+		}
+	}
+	else
+#endif /* defined(RT3593) || defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+	{
+		ASSERT((regID <= pAd->chipCap.MaxNumOfRfId)); /* R0~R63*/
+
+		for (i=0; i<MAX_BUSY_COUNT; i++)
+		{
+			RTMP_IO_READ32(pAd, RF_CSR_CFG, &rfcsr.word);
+
+			if (rfcsr.field.RF_CSR_KICK == BUSY)									
+			{																
+				continue;													
+			}																
+			rfcsr.word = 0;
+			rfcsr.field.RF_CSR_WR = 0;
+			rfcsr.field.RF_CSR_KICK = 1;
+			rfcsr.field.TESTCSR_RFACC_REGNUM = regID;
+			RTMP_IO_WRITE32(pAd, RF_CSR_CFG, rfcsr.word);
+			for (k=0; k<MAX_BUSY_COUNT; k++)
+			{
+				RTMP_IO_READ32(pAd, RF_CSR_CFG, &rfcsr.word);
+
+				if (rfcsr.field.RF_CSR_KICK == IDLE)
+					break;
+			}
+			if ((rfcsr.field.RF_CSR_KICK == IDLE) &&
+				(rfcsr.field.TESTCSR_RFACC_REGNUM == regID))
+			{
+				*pValue = (UCHAR)(rfcsr.field.RF_CSR_DATA);
+				break;
+			}
+		}
+		if (rfcsr.field.RF_CSR_KICK == BUSY)
+		{																	
+			DBGPRINT_ERR(("RF read R%d=0x%X fail, i[%d], k[%d]\n", regID, rfcsr.word,i,k));
+			return STATUS_UNSUCCESSFUL;
+		}
+	}
+
+	return STATUS_SUCCESS;
+}
+
+
+VOID NICInitRFRegisters(
+	IN RTMP_ADAPTER *pAd)
+{
+	if (pAd->chipOps.AsicRfInit)
+		pAd->chipOps.AsicRfInit(pAd);
+}
+
+#endif /* RTMP_RF_RW_SUPPORT */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/rtusb_bulk.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/rtusb_bulk.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/rtusb_bulk.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/rtusb_bulk.c	2017-09-23 03:42:49.770675822 +0800
@@ -0,0 +1,1388 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifdef RTMP_MAC_USB
+
+
+#include	"rt_config.h"
+/* Match total 6 bulkout endpoint to corresponding queue.*/
+UCHAR	EpToQueue[6]={FIFO_EDCA, FIFO_EDCA, FIFO_EDCA, FIFO_EDCA, FIFO_EDCA, FIFO_MGMT};
+
+/*static BOOLEAN SingleBulkOut = FALSE;*/
+
+
+VOID	RTUSBInitTxDesc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PTX_CONTEXT		pTxContext,
+	IN	UCHAR			BulkOutPipeId,
+	IN	usb_complete_t	Func)
+{
+	PURB				pUrb;
+	PUCHAR				pSrc = NULL;
+	POS_COOKIE			pObj = (POS_COOKIE) pAd->OS_Cookie;
+
+	pUrb = pTxContext->pUrb;
+	ASSERT(pUrb);
+
+	/* Store BulkOut PipeId*/
+	pTxContext->BulkOutPipeId = BulkOutPipeId;
+
+	if (pTxContext->bAggregatible)
+	{
+		pSrc = &pTxContext->TransferBuffer->Aggregation[2];
+
+		/*Initialize a tx bulk urb*/
+		RTUSB_FILL_TX_BULK_URB(pUrb,
+						pObj->pUsb_Dev,
+						pAd->BulkOutEpAddr[BulkOutPipeId],
+						pSrc,
+						pTxContext->BulkOutSize,
+						Func,
+						pTxContext,
+						(pTxContext->data_dma + TX_BUFFER_NORMSIZE + 2));
+	}
+	else
+	{
+		pSrc = (PUCHAR) pTxContext->TransferBuffer->field.WirelessPacket;
+
+		/*Initialize a tx bulk urb*/
+		RTUSB_FILL_TX_BULK_URB(pUrb,
+						pObj->pUsb_Dev,
+						pAd->BulkOutEpAddr[BulkOutPipeId],
+						pSrc,
+						pTxContext->BulkOutSize,
+						Func,
+						pTxContext,
+						pTxContext->data_dma);
+	}
+}
+
+VOID	RTUSBInitHTTxDesc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PHT_TX_CONTEXT	pTxContext,
+	IN	UCHAR			BulkOutPipeId,
+	IN	ULONG			BulkOutSize,
+	IN	usb_complete_t	Func)
+{
+	PURB				pUrb;
+	PUCHAR				pSrc = NULL;
+	POS_COOKIE			pObj = (POS_COOKIE) pAd->OS_Cookie;
+
+	pUrb = pTxContext->pUrb;
+	ASSERT(pUrb);
+
+	/* Store BulkOut PipeId*/
+	pTxContext->BulkOutPipeId = BulkOutPipeId;
+
+	pSrc = &pTxContext->TransferBuffer->field.WirelessPacket[pTxContext->NextBulkOutPosition];
+
+	/*Initialize a tx bulk urb*/
+	RTUSB_FILL_HTTX_BULK_URB(pUrb,
+						pObj->pUsb_Dev,
+						pAd->BulkOutEpAddr[BulkOutPipeId],
+						pSrc,
+						BulkOutSize,
+						Func,
+						pTxContext,
+						(pTxContext->data_dma + pTxContext->NextBulkOutPosition));
+}
+
+VOID	RTUSBInitRxDesc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PRX_CONTEXT		pRxContext)
+{
+	PURB				pUrb;
+	POS_COOKIE			pObj = (POS_COOKIE) pAd->OS_Cookie;
+	ULONG				RX_bulk_size;
+
+
+	pUrb = pRxContext->pUrb;
+	ASSERT(pUrb);
+	
+	if ( pAd->BulkInMaxPacketSize == 64)
+		RX_bulk_size = 4096;
+	else
+		RX_bulk_size = MAX_RXBULK_SIZE;
+		
+
+	/*Initialize a rx bulk urb*/
+	RTUSB_FILL_RX_BULK_URB(pUrb,
+					pObj->pUsb_Dev,
+					pAd->BulkInEpAddr,
+					&(pRxContext->TransferBuffer[pAd->NextRxBulkInPosition]),
+					RX_bulk_size - (pAd->NextRxBulkInPosition),
+					RtmpUsbBulkRxComplete,
+					(void *)pRxContext,
+					(pRxContext->data_dma + pAd->NextRxBulkInPosition));
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+
+	Note:
+	
+	========================================================================
+*/
+
+#define BULK_OUT_LOCK(pLock, IrqFlags)	\
+		if(1 /*!(in_interrupt() & 0xffff0000)*/)	\
+			RTMP_IRQ_LOCK((pLock), IrqFlags);
+		
+#define BULK_OUT_UNLOCK(pLock, IrqFlags)	\
+		if(1 /*!(in_interrupt() & 0xffff0000)*/)	\
+			RTMP_IRQ_UNLOCK((pLock), IrqFlags);
+
+
+VOID	RTUSBBulkOutDataPacket(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			BulkOutPipeId,
+	IN	UCHAR			Index)
+{
+
+	PHT_TX_CONTEXT	pHTTXContext;
+	PURB			pUrb;
+	int				ret = 0;
+	PTXINFO_STRUC	pTxInfo, pLastTxInfo = NULL;
+	PTXWI_STRUC             pTxWI;
+	ULONG			TmpBulkEndPos, ThisBulkSize;
+	unsigned long	IrqFlags = 0, IrqFlags2 = 0;
+	PUCHAR			pWirelessPkt, pAppendant;
+
+#ifdef USB_BULK_BUF_ALIGMENT
+	BOOLEAN			bLasAlignmentsectiontRound = FALSE;
+#else
+	BOOLEAN			bTxQLastRound = FALSE;
+	UCHAR			allzero[4]= {0x0,0x0,0x0,0x0};
+#endif /* USB_BULK_BUF_ALIGMENT */
+
+
+
+	BULK_OUT_LOCK(&pAd->BulkOutLock[BulkOutPipeId], IrqFlags);
+	if ((pAd->BulkOutPending[BulkOutPipeId] == TRUE) || RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NEED_STOP_TX))
+	{
+		BULK_OUT_UNLOCK(&pAd->BulkOutLock[BulkOutPipeId], IrqFlags);
+		return;
+	}
+	pAd->BulkOutPending[BulkOutPipeId] = TRUE;
+	
+	if (((!OPSTATUS_TEST_FLAG(pAd, fOP_AP_STATUS_MEDIA_STATE_CONNECTED)) &&
+		( !OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED)))
+		)
+	{
+		pAd->BulkOutPending[BulkOutPipeId] = FALSE;
+		BULK_OUT_UNLOCK(&pAd->BulkOutLock[BulkOutPipeId], IrqFlags);
+		return;
+	}
+	BULK_OUT_UNLOCK(&pAd->BulkOutLock[BulkOutPipeId], IrqFlags);
+
+
+	pHTTXContext = &(pAd->TxContext[BulkOutPipeId]);
+
+	BULK_OUT_LOCK(&pAd->TxContextQueueLock[BulkOutPipeId], IrqFlags2);
+	if ((pHTTXContext->ENextBulkOutPosition == pHTTXContext->CurWritePosition)
+#ifdef USB_BULK_BUF_ALIGMENT
+		|| ((pHTTXContext->CurWriteRealPos > pHTTXContext->CurWritePosition) &&(pHTTXContext->NextBulkIdx == pHTTXContext->CurWriteIdx) )
+#else
+		|| ((pHTTXContext->ENextBulkOutPosition-8) == pHTTXContext->CurWritePosition)
+#endif /* USB_BULK_BUF_ALIGMENT */
+		)  /* druing writing. */
+	{
+		BULK_OUT_UNLOCK(&pAd->TxContextQueueLock[BulkOutPipeId], IrqFlags2);
+		
+		BULK_OUT_LOCK(&pAd->BulkOutLock[BulkOutPipeId], IrqFlags);
+		pAd->BulkOutPending[BulkOutPipeId] = FALSE;
+		
+		/* Clear Data flag*/
+		RTUSB_CLEAR_BULK_FLAG(pAd, (fRTUSB_BULK_OUT_DATA_FRAG << BulkOutPipeId));
+		RTUSB_CLEAR_BULK_FLAG(pAd, (fRTUSB_BULK_OUT_DATA_NORMAL << BulkOutPipeId));
+		
+		BULK_OUT_UNLOCK(&pAd->BulkOutLock[BulkOutPipeId], IrqFlags);
+		return;
+	}
+
+	/* Clear Data flag*/
+	RTUSB_CLEAR_BULK_FLAG(pAd, (fRTUSB_BULK_OUT_DATA_FRAG << BulkOutPipeId));
+	RTUSB_CLEAR_BULK_FLAG(pAd, (fRTUSB_BULK_OUT_DATA_NORMAL << BulkOutPipeId));
+
+	/*DBGPRINT(RT_DEBUG_TRACE,("BulkOut-B:I=0x%lx, CWPos=%ld, CWRPos=%ld, NBPos=%ld, ENBPos=%ld, bCopy=%d!\n", in_interrupt(), */
+	/*							pHTTXContext->CurWritePosition, pHTTXContext->CurWriteRealPos, pHTTXContext->NextBulkOutPosition, */
+	/*							pHTTXContext->ENextBulkOutPosition, pHTTXContext->bCopySavePad));*/
+	pHTTXContext->NextBulkOutPosition = pHTTXContext->ENextBulkOutPosition;	
+	ThisBulkSize = 0;
+	TmpBulkEndPos = pHTTXContext->NextBulkOutPosition;
+	pWirelessPkt = &pHTTXContext->TransferBuffer->field.WirelessPacket[0];
+
+#ifndef USB_BULK_BUF_ALIGMENT	
+	if ((pHTTXContext->bCopySavePad == TRUE))
+	{
+		if (RTMPEqualMemory(pHTTXContext->SavedPad, allzero,4))
+		{
+			DBGPRINT_RAW(RT_DEBUG_ERROR,("e1, allzero : %x  %x  %x  %x  %x  %x  %x  %x \n",
+				pHTTXContext->SavedPad[0], pHTTXContext->SavedPad[1], pHTTXContext->SavedPad[2],pHTTXContext->SavedPad[3]
+				,pHTTXContext->SavedPad[4], pHTTXContext->SavedPad[5], pHTTXContext->SavedPad[6],pHTTXContext->SavedPad[7]));
+		}
+		NdisMoveMemory(&pWirelessPkt[TmpBulkEndPos], pHTTXContext->SavedPad, 8);
+		pHTTXContext->bCopySavePad = FALSE;
+		if (pAd->bForcePrintTX == TRUE)
+			DBGPRINT(RT_DEBUG_TRACE,("RTUSBBulkOutDataPacket --> COPY PAD. CurWrite = %ld, NextBulk = %ld.   ENextBulk = %ld.\n",   pHTTXContext->CurWritePosition, pHTTXContext->NextBulkOutPosition, pHTTXContext->ENextBulkOutPosition));
+	}
+#endif /* USB_BULK_BUF_ALIGMENT */
+
+
+	do
+	{
+		pTxInfo = (PTXINFO_STRUC)&pWirelessPkt[TmpBulkEndPos];
+		pTxWI = (PTXWI_STRUC)&pWirelessPkt[TmpBulkEndPos + TXINFO_SIZE];
+	
+		if (pAd->bForcePrintTX == TRUE)
+			DBGPRINT(RT_DEBUG_TRACE, ("RTUSBBulkOutDataPacket AMPDU = %d.\n",   pTxWI->AMPDU));
+		
+		/* add by Iverson, limit BulkOut size to 4k to pass WMM b mode 2T1R test items*/
+		/*if ((ThisBulkSize != 0)  && (pTxWI->AMPDU == 0))*/
+		if ((ThisBulkSize != 0) && (pTxWI->PHYMODE == MODE_CCK))
+		{
+#ifdef INF_AMAZON_SE
+			/*Iverson Add for AMAZON USB (RT2070 &&  RT3070) to pass WMM A2-T4 ~ A2-T10*/
+			if(OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_WMM_INUSED))
+			{
+				/*Iverson patch for WMM A5-T07 ,WirelessStaToWirelessSta do not bulk out aggregate*/
+				if(pTxWI->PacketId == 6)
+                {            
+                	pHTTXContext->ENextBulkOutPosition = TmpBulkEndPos;
+                	break;
+                }    
+				else if (((ThisBulkSize&0xffff8000) != 0) || ((ThisBulkSize&pAd->BulkOutDataSizeLimit[BulkOutPipeId]) == pAd->BulkOutDataSizeLimit[BulkOutPipeId]))
+				{	
+			/*printk("===Bulkout size limit :%d ===\n",MaxBulkOutSize);*/
+			/*DBGPRINT(RT_DEBUG_TRACE,("b mode BulkOutPipeId %d  pAd->BulkOutDataSizeLimit[BulkOutPipeId] %d  \n",BulkOutPipeId,pAd->BulkOutDataSizeLimit[BulkOutPipeId]));*/
+					pHTTXContext->ENextBulkOutPosition = TmpBulkEndPos;
+					break;
+				}
+				
+			}
+			else if (((ThisBulkSize&0xffff8000) != 0) || ((ThisBulkSize&0x1000) == 0x1000))
+			{
+				/* Limit BulkOut size to about 4k bytes.*/
+				pHTTXContext->ENextBulkOutPosition = TmpBulkEndPos;
+				break;
+			}
+#endif /* INF_AMAZON_SE */
+#ifndef INF_AMAZON_SE
+#ifndef USB_BULK_BUF_ALIGMENT
+			if (((ThisBulkSize&0xffff8000) != 0) || ((ThisBulkSize&0x1000) == 0x1000))
+			{
+				/* Limit BulkOut size to about 4k bytes.*/
+				pHTTXContext->ENextBulkOutPosition = TmpBulkEndPos;
+				break;
+			}
+#else
+			if (((ThisBulkSize&0xffff8000) != 0) || ((ThisBulkSize&0x6000) == 0x6000))
+			{
+				/* Limit BulkOut size to about 24k bytes.*/
+				pHTTXContext->ENextBulkOutPosition = TmpBulkEndPos;
+
+				/*
+					when bulk size is > 6000, it mean that this is the lasttround at this alignmnet section.
+				*/
+				bLasAlignmentsectiontRound = TRUE;				
+				break;
+			}
+
+#endif /* USB_BULK_BUF_ALIGMENT */
+#endif /* INF_AMAZON_SE */
+#ifndef USB_BULK_BUF_ALIGMENT
+			else if (((pAd->BulkOutMaxPacketSize < 512) && ((ThisBulkSize&0xfffff800) != 0) ) /*|| ( (ThisBulkSize != 0)  && (pTxWI->AMPDU == 0))*/)
+			{
+				/* For USB 1.1 or peer which didn't support AMPDU, limit the BulkOut size. */
+				/* For performence in b/g mode, now just check for USB 1.1 and didn't care about the APMDU or not! 2008/06/04.*/
+				pHTTXContext->ENextBulkOutPosition = TmpBulkEndPos;
+				break;
+			}
+#else
+			else if (((pAd->BulkOutMaxPacketSize < 512) && (((ThisBulkSize&0xffff8000) != 0) || ((ThisBulkSize&0x6000) == 0x6000)) ))
+			{
+				/* Limit BulkOut size to about 24k bytes.*/
+				pHTTXContext->ENextBulkOutPosition = TmpBulkEndPos;
+
+				/*
+					when bulk size is > 6000, it mean that this is the lasttround at this alignmnet section.
+				*/
+				bLasAlignmentsectiontRound = TRUE;				
+				break;
+			}
+
+#endif /* USB_BULK_BUF_ALIGMENT */
+
+		}
+		/* end Iverson*/
+		else
+		{
+
+
+		if (((ThisBulkSize&0xffff8000) != 0) || ((ThisBulkSize&0x6000) == 0x6000))
+		{	/* Limit BulkOut size to about 24k bytes.*/
+			pHTTXContext->ENextBulkOutPosition = TmpBulkEndPos;
+#ifdef USB_BULK_BUF_ALIGMENT
+				/*
+					when bulk size is > 0x6000, it mean that this is the lasttround at this alignmnet section.
+				*/
+				bLasAlignmentsectiontRound = TRUE;
+/*				printk("data bulk out bLasAlignmentsectiontRound \n");*/
+#endif /* USB_BULK_BUF_ALIGMENT */
+
+			break;
+		}
+#ifdef INF_AMAZON_SE
+		else if (((ThisBulkSize&0xffff8000) != 0) || ((ThisBulkSize&pAd->BulkOutDataSizeLimit[BulkOutPipeId]) == pAd->BulkOutDataSizeLimit[BulkOutPipeId]))
+		{	
+			/*printk("===Bulkout size limit :%d ===\n",ThisBulkSize);*/
+			pHTTXContext->ENextBulkOutPosition = TmpBulkEndPos;
+			break;
+		}
+#endif /* INF_AMAZON_SE */
+#ifndef USB_BULK_BUF_ALIGMENT
+		else if (((pAd->BulkOutMaxPacketSize < 512) && ((ThisBulkSize&0xfffff800) != 0) ) /*|| ( (ThisBulkSize != 0)  && (pTxWI->AMPDU == 0))*/)
+		{	/* For USB 1.1 or peer which didn't support AMPDU, limit the BulkOut size. */
+			/* For performence in b/g mode, now just check for USB 1.1 and didn't care about the APMDU or not! 2008/06/04.*/
+			pHTTXContext->ENextBulkOutPosition = TmpBulkEndPos;
+			break;
+		}
+#else
+			else if (((pAd->BulkOutMaxPacketSize < 512) && (((ThisBulkSize&0xffff8000) != 0) || ((ThisBulkSize&0x6000) == 0x6000)) ))
+			{
+				/* Limit BulkOut size to about 24k bytes.*/
+				pHTTXContext->ENextBulkOutPosition = TmpBulkEndPos;
+
+				/*
+					when bulk size is > 6000, it mean that this is the lasttround at this alignmnet section.
+				*/
+				bLasAlignmentsectiontRound = TRUE;				
+				break;
+			}
+
+#endif /* USB_BULK_BUF_ALIGMENT */
+
+
+
+		}
+		
+		if (TmpBulkEndPos == pHTTXContext->CurWritePosition)
+		{
+			pHTTXContext->ENextBulkOutPosition = TmpBulkEndPos;
+			break;
+		}
+		
+		if (pTxInfo->QSEL != FIFO_EDCA)
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("%s(): ====> pTxInfo->QueueSel(%d)!= FIFO_EDCA!!!!\n", 
+										__FUNCTION__, pTxInfo->QSEL));
+			DBGPRINT(RT_DEBUG_ERROR, ("\tCWPos=%ld, NBPos=%ld, ENBPos=%ld, bCopy=%d!\n", 
+										pHTTXContext->CurWritePosition, pHTTXContext->NextBulkOutPosition, 
+										pHTTXContext->ENextBulkOutPosition, pHTTXContext->bCopySavePad));
+			hex_dump("Wrong QSel Pkt:", (PUCHAR)&pWirelessPkt[TmpBulkEndPos], (pHTTXContext->CurWritePosition - pHTTXContext->NextBulkOutPosition));
+		}
+		
+		if (pTxInfo->USBDMATxPktLen <= 8)
+		{
+			BULK_OUT_UNLOCK(&pAd->TxContextQueueLock[BulkOutPipeId], IrqFlags2);
+			DBGPRINT(RT_DEBUG_ERROR /*RT_DEBUG_TRACE*/,("e2, USBDMATxPktLen==0, Size=%ld, bCSPad=%d, CWPos=%ld, NBPos=%ld, CWRPos=%ld!\n", 
+					pHTTXContext->BulkOutSize, pHTTXContext->bCopySavePad, pHTTXContext->CurWritePosition, pHTTXContext->NextBulkOutPosition, pHTTXContext->CurWriteRealPos));
+			{
+				DBGPRINT_RAW(RT_DEBUG_ERROR /*RT_DEBUG_TRACE*/,("%x  %x  %x  %x  %x  %x  %x  %x \n",
+					pHTTXContext->SavedPad[0], pHTTXContext->SavedPad[1], pHTTXContext->SavedPad[2],pHTTXContext->SavedPad[3]
+					,pHTTXContext->SavedPad[4], pHTTXContext->SavedPad[5], pHTTXContext->SavedPad[6],pHTTXContext->SavedPad[7]));
+			}
+			pAd->bForcePrintTX = TRUE;
+			BULK_OUT_LOCK(&pAd->BulkOutLock[BulkOutPipeId], IrqFlags);
+			pAd->BulkOutPending[BulkOutPipeId] = FALSE;
+			BULK_OUT_UNLOCK(&pAd->BulkOutLock[BulkOutPipeId], IrqFlags);
+			/*DBGPRINT(RT_DEBUG_LOUD,("Out:pTxInfo->USBDMATxPktLen=%d!\n", pTxInfo->USBDMATxPktLen));*/
+			return;
+		}
+
+			/* Increase Total transmit byte counter*/
+		pAd->RalinkCounters.OneSecTransmittedByteCount +=  pTxWI->MPDUtotalByteCount;
+		pAd->RalinkCounters.TransmittedByteCount +=  pTxWI->MPDUtotalByteCount;
+	
+		pLastTxInfo = pTxInfo;
+		
+		/* Make sure we use EDCA QUEUE.  */
+		pTxInfo->QSEL = FIFO_EDCA;
+		ThisBulkSize += (pTxInfo->USBDMATxPktLen+4);
+		TmpBulkEndPos += (pTxInfo->USBDMATxPktLen+4);
+		
+		if (TmpBulkEndPos != pHTTXContext->CurWritePosition)
+			pTxInfo->USBDMANextVLD = 1;
+
+#ifdef USB_BULK_BUF_ALIGMENT		
+/*
+		this is for frag packet , because it will finish this section 
+		when ((((pHTTXContext->CurWritePosition + 3906)& 0x00007fff) & 0xffff6000) == 0x00006000)	
+*/
+		if (pTxInfo->bFragLasAlignmentsectiontRound == 1)
+		{
+			bLasAlignmentsectiontRound = TRUE;
+			break;
+		}
+#else		
+		if (pTxInfo->SwUseLastRound == 1)
+		{
+			if (pHTTXContext->CurWritePosition == 8)
+				pTxInfo->USBDMANextVLD = 0;
+			pTxInfo->SwUseLastRound = 0;
+			
+			bTxQLastRound = TRUE;
+			pHTTXContext->ENextBulkOutPosition = 8;
+			
+	#ifdef RT_BIG_ENDIAN
+			RTMPDescriptorEndianChange((PUCHAR)pTxInfo, TYPE_TXINFO);
+			RTMPWIEndianChange((PUCHAR)pTxWI, TYPE_TXWI);
+	#endif /* RT_BIG_ENDIAN */
+	
+			break;
+		}
+#endif /* USB_BULK_BUF_ALIGMENT */	
+#ifdef RT_BIG_ENDIAN
+		RTMPDescriptorEndianChange((PUCHAR)pTxInfo, TYPE_TXINFO);
+		RTMPWIEndianChange((PUCHAR)pTxWI, TYPE_TXWI);
+#endif /* RT_BIG_ENDIAN */
+
+	}while (TRUE);
+
+	/* adjust the pTxInfo->USBDMANextVLD value of last pTxInfo.*/
+	if (pLastTxInfo)
+	{
+#ifdef RT_BIG_ENDIAN
+		RTMPDescriptorEndianChange((PUCHAR)pLastTxInfo, TYPE_TXINFO);
+#endif /* RT_BIG_ENDIAN */
+		pLastTxInfo->USBDMANextVLD = 0;
+#ifdef RT_BIG_ENDIAN
+		RTMPDescriptorEndianChange((PUCHAR)pLastTxInfo, TYPE_TXINFO);
+#endif /* RT_BIG_ENDIAN */
+	}
+
+	/* 
+		We need to copy SavedPad when following condition matched!
+			1. Not the last round of the TxQueue and
+			2. any match of following cases:
+				(1). The End Position of this bulk out is reach to the Currenct Write position and 
+						the TxInfo and related header already write to the CurWritePosition.
+			   		=>(ENextBulkOutPosition == CurWritePosition) && (CurWriteRealPos > CurWritePosition)
+		
+				(2). The EndPosition of the bulk out is not reach to the Current Write Position.
+					=>(ENextBulkOutPosition != CurWritePosition)
+	*/
+#ifndef USB_BULK_BUF_ALIGMENT
+	if ((bTxQLastRound == FALSE) &&
+		 (((pHTTXContext->ENextBulkOutPosition == pHTTXContext->CurWritePosition) && (pHTTXContext->CurWriteRealPos > pHTTXContext->CurWritePosition)) ||
+		  (pHTTXContext->ENextBulkOutPosition != pHTTXContext->CurWritePosition))
+		)
+	{
+		NdisMoveMemory(pHTTXContext->SavedPad, &pWirelessPkt[pHTTXContext->ENextBulkOutPosition], 8);
+		pHTTXContext->bCopySavePad = TRUE;
+		if (RTMPEqualMemory(pHTTXContext->SavedPad, allzero,4))
+		{	
+			PUCHAR	pBuf = &pHTTXContext->SavedPad[0];
+			DBGPRINT_RAW(RT_DEBUG_ERROR,("WARNING-Zero-3:%02x%02x%02x%02x%02x%02x%02x%02x,CWPos=%ld, CWRPos=%ld, bCW=%d, NBPos=%ld, TBPos=%ld, TBSize=%ld\n",
+				pBuf[0], pBuf[1], pBuf[2],pBuf[3],pBuf[4], pBuf[5], pBuf[6],pBuf[7], pHTTXContext->CurWritePosition, pHTTXContext->CurWriteRealPos,
+				pHTTXContext->bCurWriting, pHTTXContext->NextBulkOutPosition, TmpBulkEndPos, ThisBulkSize));
+			
+			pBuf = &pWirelessPkt[pHTTXContext->CurWritePosition];
+			DBGPRINT_RAW(RT_DEBUG_ERROR,("\tCWPos=%02x%02x%02x%02x%02x%02x%02x%02x\n", pBuf[0], pBuf[1], pBuf[2],pBuf[3],pBuf[4], pBuf[5], pBuf[6],pBuf[7]));
+		}
+		/*DBGPRINT(RT_DEBUG_LOUD,("ENPos==CWPos=%ld, CWRPos=%ld, bCSPad=%d!\n", pHTTXContext->CurWritePosition, pHTTXContext->CurWriteRealPos, pHTTXContext->bCopySavePad));*/
+	}
+#endif /* USB_BULK_BUF_ALIGMENT */
+
+	if (pAd->bForcePrintTX == TRUE)
+		DBGPRINT(RT_DEBUG_TRACE,("BulkOut-A:Size=%ld, CWPos=%ld, NBPos=%ld, ENBPos=%ld, bCopy=%d!\n", ThisBulkSize, pHTTXContext->CurWritePosition, pHTTXContext->NextBulkOutPosition, pHTTXContext->ENextBulkOutPosition, pHTTXContext->bCopySavePad));
+	/*DBGPRINT(RT_DEBUG_LOUD,("BulkOut-A:Size=%ld, CWPos=%ld, CWRPos=%ld, NBPos=%ld, ENBPos=%ld, bCopy=%d, bLRound=%d!\n", ThisBulkSize, pHTTXContext->CurWritePosition, pHTTXContext->CurWriteRealPos, pHTTXContext->NextBulkOutPosition, pHTTXContext->ENextBulkOutPosition, pHTTXContext->bCopySavePad, bTxQLastRound));*/
+	
+		/* USB DMA engine requires to pad extra 4 bytes. This pad doesn't count into real bulkoutsize.*/
+	pAppendant = &pWirelessPkt[TmpBulkEndPos];
+	NdisZeroMemory(pAppendant, 8);
+		ThisBulkSize += 4;
+		pHTTXContext->LastOne = TRUE;
+
+	pHTTXContext->BulkOutSize = ThisBulkSize;
+#ifdef USB_BULK_BUF_ALIGMENT
+	/*
+		if it is the last alignment section round,that we just need to add nextbulkindex, 
+		otherwise we both need to add  nextbulkindex and CurWriteIdx
+		(because when alignment section round happened, the CurWriteIdx is added at function writing resource.)
+	*/	
+	if(bLasAlignmentsectiontRound == TRUE)
+	{
+			pHTTXContext->ENextBulkOutPosition = ((CUR_WRITE_IDX_INC(pHTTXContext->NextBulkIdx, BUF_ALIGMENT_RINGSIZE)) * 0x8000);
+	}
+	else
+	{	
+			pHTTXContext->ENextBulkOutPosition = ((CUR_WRITE_IDX_INC(pHTTXContext->NextBulkIdx, BUF_ALIGMENT_RINGSIZE)) * 0x8000);
+			pHTTXContext->CurWritePosition = ((CUR_WRITE_IDX_INC(pHTTXContext->CurWriteIdx, BUF_ALIGMENT_RINGSIZE)) * 0x8000);
+	 }
+
+#endif /* USB_BULK_BUF_ALIGMENT */
+
+	
+	pAd->watchDogTxPendingCnt[BulkOutPipeId] = 1;
+	BULK_OUT_UNLOCK(&pAd->TxContextQueueLock[BulkOutPipeId], IrqFlags2);
+	
+	/* Init Tx context descriptor*/
+	RTUSBInitHTTxDesc(pAd, pHTTXContext, BulkOutPipeId, ThisBulkSize, (usb_complete_t)RtmpUsbBulkOutDataPacketComplete);
+	
+	pUrb = pHTTXContext->pUrb;
+	if((ret = RTUSB_SUBMIT_URB(pUrb))!=0)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("RTUSBBulkOutDataPacket: Submit Tx URB failed %d\n", ret));
+		
+		BULK_OUT_LOCK(&pAd->BulkOutLock[BulkOutPipeId], IrqFlags);
+		pAd->BulkOutPending[BulkOutPipeId] = FALSE;
+		pAd->watchDogTxPendingCnt[BulkOutPipeId] = 0;
+		BULK_OUT_UNLOCK(&pAd->BulkOutLock[BulkOutPipeId], IrqFlags);
+
+		return;
+	}
+
+	BULK_OUT_LOCK(&pAd->BulkOutLock[BulkOutPipeId], IrqFlags);
+	pHTTXContext->IRPPending = TRUE;
+	BULK_OUT_UNLOCK(&pAd->BulkOutLock[BulkOutPipeId], IrqFlags);
+	pAd->BulkOutReq++;
+
+}
+
+
+USBHST_STATUS RTUSBBulkOutDataPacketComplete(URBCompleteStatus Status, purbb_t pURB, pregs *pt_regs)
+{
+	PHT_TX_CONTEXT	pHTTXContext;
+	PRTMP_ADAPTER	pAd;
+	POS_COOKIE 		pObj;
+	UCHAR			BulkOutPipeId;
+	
+
+	pHTTXContext	= (PHT_TX_CONTEXT)RTMP_OS_USB_CONTEXT_GET(pURB);
+	pAd 			= pHTTXContext->pAd;
+	pObj 			= (POS_COOKIE) pAd->OS_Cookie;
+
+	/* Store BulkOut PipeId*/
+	BulkOutPipeId	= pHTTXContext->BulkOutPipeId;
+	pAd->BulkOutDataOneSecCount++;
+
+	switch (BulkOutPipeId)
+	{
+		case EDCA_AC0_PIPE:
+#ifdef RALINK_ATE
+				if (!ATE_ON(pAd))
+				{
+#endif /* RALINK_ATE */
+					RTMP_NET_TASK_DATA_ASSIGN(&pObj->ac0_dma_done_task, (unsigned long)pURB);
+					RTMP_OS_TASKLET_SCHE(&pObj->ac0_dma_done_task);
+#ifdef RALINK_ATE
+				}
+				else
+				{
+					RTMP_NET_TASK_DATA_ASSIGN(&pObj->ate_ac0_dma_done_task, (unsigned long)pURB);
+					RTMP_OS_TASKLET_SCHE(&pObj->ate_ac0_dma_done_task);
+				}
+#endif /* RALINK_ATE */
+				
+				break;
+		case EDCA_AC1_PIPE:
+				RTMP_NET_TASK_DATA_ASSIGN(&pObj->ac1_dma_done_task, (unsigned long)pURB);
+				RTMP_OS_TASKLET_SCHE(&pObj->ac1_dma_done_task);
+				break;
+		case EDCA_AC2_PIPE:
+				RTMP_NET_TASK_DATA_ASSIGN(&pObj->ac2_dma_done_task, (unsigned long)pURB);
+				RTMP_OS_TASKLET_SCHE(&pObj->ac2_dma_done_task);
+				break;
+		case EDCA_AC3_PIPE:
+				RTMP_NET_TASK_DATA_ASSIGN(&pObj->ac3_dma_done_task, (unsigned long)pURB);
+				RTMP_OS_TASKLET_SCHE(&pObj->ac3_dma_done_task);
+				break;
+		case HCCA_PIPE:
+				RTMP_NET_TASK_DATA_ASSIGN(&pObj->hcca_dma_done_task, (unsigned long)pURB);
+				RTMP_OS_TASKLET_SCHE(&pObj->hcca_dma_done_task);
+				break;
+	}
+
+	
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+
+	Note: NULL frame use BulkOutPipeId = 0
+	
+	========================================================================
+*/
+VOID	RTUSBBulkOutNullFrame(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	PTX_CONTEXT		pNullContext = &(pAd->NullContext);
+	PURB			pUrb;
+	int				ret = 0;
+	unsigned long	IrqFlags;
+	
+	RTMP_IRQ_LOCK(&pAd->BulkOutLock[0], IrqFlags);
+	if ((pAd->BulkOutPending[0] == TRUE) || RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NEED_STOP_TX))
+	{
+		RTMP_IRQ_UNLOCK(&pAd->BulkOutLock[0], IrqFlags);
+		return;
+	}
+	pAd->BulkOutPending[0] = TRUE;
+	pAd->watchDogTxPendingCnt[0] = 1;
+	pNullContext->IRPPending = TRUE;
+	RTMP_IRQ_UNLOCK(&pAd->BulkOutLock[0], IrqFlags);
+
+	/* Increase Total transmit byte counter*/
+	pAd->RalinkCounters.TransmittedByteCount +=  pNullContext->BulkOutSize;
+
+	
+	/* Clear Null frame bulk flag*/
+	RTUSB_CLEAR_BULK_FLAG(pAd, fRTUSB_BULK_OUT_DATA_NULL);
+
+#ifdef RT_BIG_ENDIAN
+	RTMPDescriptorEndianChange((PUCHAR)pNullContext->TransferBuffer, TYPE_TXINFO);
+#endif /* RT_BIG_ENDIAN */
+
+	/* Init Tx context descriptor*/
+	RTUSBInitTxDesc(pAd, pNullContext, 0, (usb_complete_t)RtmpUsbBulkOutNullFrameComplete);
+
+	pUrb = pNullContext->pUrb;
+	if((ret = RTUSB_SUBMIT_URB(pUrb))!=0)
+	{
+		RTMP_IRQ_LOCK(&pAd->BulkOutLock[0], IrqFlags);
+		pAd->BulkOutPending[0] = FALSE;
+		pAd->watchDogTxPendingCnt[0] = 0;
+		pNullContext->IRPPending = FALSE;
+		RTMP_IRQ_UNLOCK(&pAd->BulkOutLock[0], IrqFlags);
+		
+		DBGPRINT(RT_DEBUG_ERROR, ("RTUSBBulkOutNullFrame: Submit Tx URB failed %d\n", ret));
+		return;
+	}	
+	
+}
+
+/* NULL frame use BulkOutPipeId = 0*/
+USBHST_STATUS RTUSBBulkOutNullFrameComplete(URBCompleteStatus Status, purbb_t pURB, pregs *pt_regs)
+{
+	PRTMP_ADAPTER		pAd;
+	PTX_CONTEXT			pNullContext;
+	NTSTATUS			Status;
+	POS_COOKIE			pObj;
+
+	
+	pNullContext	= (PTX_CONTEXT)RTMP_OS_USB_CONTEXT_GET(pURB);
+	pAd 			= pNullContext->pAd;
+	Status 			= RTMP_OS_USB_STATUS_GET(pURB); /*->rtusb_urb_status;*/
+
+	pObj = (POS_COOKIE) pAd->OS_Cookie;
+	RTMP_NET_TASK_DATA_ASSIGN(&pObj->null_frame_complete_task, (unsigned long)pURB);
+	RTMP_OS_TASKLET_SCHE(&pObj->null_frame_complete_task);
+
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+
+	Note: MLME use BulkOutPipeId = 0
+	
+	========================================================================
+*/
+VOID	RTUSBBulkOutMLMEPacket(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			Index)
+{
+	PTX_CONTEXT		pMLMEContext;
+	PURB			pUrb;
+	int				ret = 0;
+	unsigned long	IrqFlags;
+		
+	pMLMEContext = (PTX_CONTEXT)pAd->MgmtRing.Cell[pAd->MgmtRing.TxDmaIdx].AllocVa;
+	pUrb = pMLMEContext->pUrb;
+
+	if ((pAd->MgmtRing.TxSwFreeIdx >= MGMT_RING_SIZE) ||
+		(pMLMEContext->InUse == FALSE) ||
+		(pMLMEContext->bWaitingBulkOut == FALSE))
+	{
+		
+		
+		/* Clear MLME bulk flag*/
+		RTUSB_CLEAR_BULK_FLAG(pAd, fRTUSB_BULK_OUT_MLME);
+		
+		return;
+	}
+
+
+	RTMP_IRQ_LOCK(&pAd->BulkOutLock[MGMTPIPEIDX], IrqFlags);
+	if ((pAd->BulkOutPending[MGMTPIPEIDX] == TRUE) || RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NEED_STOP_TX))
+	{
+		RTMP_IRQ_UNLOCK(&pAd->BulkOutLock[MGMTPIPEIDX], IrqFlags);
+		return;
+	}
+
+	pAd->BulkOutPending[MGMTPIPEIDX] = TRUE;
+	pAd->watchDogTxPendingCnt[MGMTPIPEIDX] = 1;
+	pMLMEContext->IRPPending = TRUE;
+	pMLMEContext->bWaitingBulkOut = FALSE;
+	RTMP_IRQ_UNLOCK(&pAd->BulkOutLock[MGMTPIPEIDX], IrqFlags);
+	
+	/* Increase Total transmit byte counter*/
+	pAd->RalinkCounters.TransmittedByteCount +=  pMLMEContext->BulkOutSize;
+
+	/* Clear MLME bulk flag*/
+	RTUSB_CLEAR_BULK_FLAG(pAd, fRTUSB_BULK_OUT_MLME);
+
+#ifdef RT_BIG_ENDIAN
+	RTMPDescriptorEndianChange((PUCHAR)pMLMEContext->TransferBuffer, TYPE_TXINFO);
+#endif /* RT_BIG_ENDIAN */
+
+	/* Init Tx context descriptor*/
+	RTUSBInitTxDesc(pAd, pMLMEContext, MGMTPIPEIDX, (usb_complete_t)RtmpUsbBulkOutMLMEPacketComplete);
+
+	RTUSB_URB_DMA_MAPPING(pUrb);
+
+	pUrb = pMLMEContext->pUrb;
+	if((ret = RTUSB_SUBMIT_URB(pUrb))!=0)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("RTUSBBulkOutMLMEPacket: Submit MLME URB failed %d\n", ret));
+		RTMP_IRQ_LOCK(&pAd->BulkOutLock[MGMTPIPEIDX], IrqFlags);
+		pAd->BulkOutPending[MGMTPIPEIDX] = FALSE;
+		pAd->watchDogTxPendingCnt[MGMTPIPEIDX] = 0;
+		pMLMEContext->IRPPending = FALSE;
+		pMLMEContext->bWaitingBulkOut = TRUE;
+		RTMP_IRQ_UNLOCK(&pAd->BulkOutLock[MGMTPIPEIDX], IrqFlags);
+		
+		return;
+	}
+}
+
+
+USBHST_STATUS RTUSBBulkOutMLMEPacketComplete(URBCompleteStatus Status, purbb_t pURB, pregs *pt_regs)
+{
+	PTX_CONTEXT			pMLMEContext;
+	PRTMP_ADAPTER		pAd;
+	NTSTATUS			Status;
+	POS_COOKIE 			pObj;
+	int					index;
+	
+	pMLMEContext	= (PTX_CONTEXT)RTMP_OS_USB_CONTEXT_GET(pURB); 
+	pAd 			= pMLMEContext->pAd;
+	pObj 			= (POS_COOKIE)pAd->OS_Cookie;
+	Status			= RTMP_OS_USB_STATUS_GET(pURB);
+	index 			= pMLMEContext->SelfIdx;
+
+	RTMP_NET_TASK_DATA_ASSIGN(&pObj->mgmt_dma_done_task, (unsigned long)pURB);
+	RTMP_OS_TASKLET_SCHE(&pObj->mgmt_dma_done_task);
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+
+	Note: PsPoll use BulkOutPipeId = 0
+	
+	========================================================================
+*/
+VOID	RTUSBBulkOutPsPoll(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	PTX_CONTEXT		pPsPollContext = &(pAd->PsPollContext);
+	PURB			pUrb;
+	int				ret = 0;
+	unsigned long	IrqFlags;
+	
+	RTMP_IRQ_LOCK(&pAd->BulkOutLock[0], IrqFlags);
+	if ((pAd->BulkOutPending[0] == TRUE) || RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NEED_STOP_TX))
+	{
+		RTMP_IRQ_UNLOCK(&pAd->BulkOutLock[0], IrqFlags);
+		return;
+	}
+	pAd->BulkOutPending[0] = TRUE;
+	pAd->watchDogTxPendingCnt[0] = 1;
+	pPsPollContext->IRPPending = TRUE;
+	RTMP_IRQ_UNLOCK(&pAd->BulkOutLock[0], IrqFlags);
+
+	
+	/* Clear PS-Poll bulk flag*/
+	RTUSB_CLEAR_BULK_FLAG(pAd, fRTUSB_BULK_OUT_PSPOLL);
+
+#ifdef RT_BIG_ENDIAN
+	RTMPDescriptorEndianChange((PUCHAR)pPsPollContext->TransferBuffer, TYPE_TXINFO);
+#endif /* RT_BIG_ENDIAN */
+
+	/* Init Tx context descriptor*/
+	RTUSBInitTxDesc(pAd, pPsPollContext, MGMTPIPEIDX, (usb_complete_t)RtmpUsbBulkOutPsPollComplete);
+	
+	pUrb = pPsPollContext->pUrb;
+	if((ret = RTUSB_SUBMIT_URB(pUrb))!=0)
+	{
+		RTMP_IRQ_LOCK(&pAd->BulkOutLock[0], IrqFlags);
+		pAd->BulkOutPending[0] = FALSE;
+		pAd->watchDogTxPendingCnt[0] = 0;
+		pPsPollContext->IRPPending = FALSE;
+		RTMP_IRQ_UNLOCK(&pAd->BulkOutLock[0], IrqFlags);
+		
+		DBGPRINT(RT_DEBUG_ERROR, ("RTUSBBulkOutPsPoll: Submit Tx URB failed %d\n", ret));
+		return;
+	}
+		
+}
+
+/* PS-Poll frame use BulkOutPipeId = 0*/
+USBHST_STATUS RTUSBBulkOutPsPollComplete(URBCompleteStatus Status, purbb_t pURB, pregs *pt_regs)
+{
+	PRTMP_ADAPTER		pAd;
+	PTX_CONTEXT			pPsPollContext;
+	NTSTATUS			Status;
+	POS_COOKIE			pObj;
+	
+	
+	pPsPollContext= (PTX_CONTEXT)RTMP_OS_USB_CONTEXT_GET(pURB);
+	pAd = pPsPollContext->pAd;
+	Status = RTMP_OS_USB_STATUS_GET(pURB);
+
+	pObj = (POS_COOKIE) pAd->OS_Cookie;
+	RTMP_NET_TASK_DATA_ASSIGN(&pObj->pspoll_frame_complete_task, (unsigned long)pURB);
+	RTMP_OS_TASKLET_SCHE(&pObj->pspoll_frame_complete_task);
+
+}
+
+
+VOID DoBulkIn(IN RTMP_ADAPTER *pAd)
+{	
+	PRX_CONTEXT		pRxContext;
+	PURB			pUrb;
+	int				ret = 0;
+	unsigned long	IrqFlags;
+	
+	RTMP_IRQ_LOCK(&pAd->BulkInLock, IrqFlags);
+	pRxContext = &(pAd->RxContext[pAd->NextRxBulkInIndex]);
+	if ((pAd->PendingRx > 0) || (pRxContext->Readable == TRUE) || (pRxContext->InUse == TRUE))
+	{
+		RTMP_IRQ_UNLOCK(&pAd->BulkInLock, IrqFlags);
+		return;
+	}
+	pRxContext->InUse = TRUE;
+	pRxContext->IRPPending = TRUE;
+	pAd->PendingRx++;
+	pAd->BulkInReq++;
+	RTMP_IRQ_UNLOCK(&pAd->BulkInLock, IrqFlags);
+
+	/* Init Rx context descriptor*/
+	NdisZeroMemory(pRxContext->TransferBuffer, pRxContext->BulkInOffset);
+	RTUSBInitRxDesc(pAd, pRxContext);
+
+	pUrb = pRxContext->pUrb;
+	if ((ret = RTUSB_SUBMIT_URB(pUrb))!=0)
+	{	/* fail*/
+	
+		RTMP_IRQ_LOCK(&pAd->BulkInLock, IrqFlags);
+		pRxContext->InUse = FALSE;
+		pRxContext->IRPPending = FALSE;
+		pAd->PendingRx--;
+		pAd->BulkInReq--;
+		RTMP_IRQ_UNLOCK(&pAd->BulkInLock, IrqFlags);
+		DBGPRINT(RT_DEBUG_ERROR, ("RTUSBBulkReceive: Submit Rx URB failed %d\n", ret));
+	}
+	else
+	{	/* success*/
+		ASSERT((pRxContext->InUse == pRxContext->IRPPending));
+	}
+}
+
+
+/*
+	========================================================================
+
+	Routine Description:
+	USB_RxPacket initializes a URB and uses the Rx IRP to submit it
+	to USB. It checks if an Rx Descriptor is available and passes the
+	the coresponding buffer to be filled. If no descriptor is available
+	fails the request. When setting the completion routine we pass our
+	Adapter Object as Context.
+		
+	Arguments:
+		
+	Return Value:
+		TRUE			found matched tuple cache
+		FALSE			no matched found
+
+	Note:
+	
+	========================================================================
+*/
+#define fRTMP_ADAPTER_NEED_STOP_RX		\
+		(fRTMP_ADAPTER_NIC_NOT_EXIST | fRTMP_ADAPTER_HALT_IN_PROGRESS |	\
+		 fRTMP_ADAPTER_RADIO_OFF | fRTMP_ADAPTER_RESET_IN_PROGRESS | \
+		 fRTMP_ADAPTER_REMOVE_IN_PROGRESS | fRTMP_ADAPTER_BULKIN_RESET)
+		 
+#define fRTMP_ADAPTER_NEED_STOP_HANDLE_RX	\
+		(fRTMP_ADAPTER_NIC_NOT_EXIST | fRTMP_ADAPTER_HALT_IN_PROGRESS |	\
+		 fRTMP_ADAPTER_RADIO_OFF | fRTMP_ADAPTER_RESET_IN_PROGRESS | \
+		 fRTMP_ADAPTER_REMOVE_IN_PROGRESS)
+		 
+VOID	RTUSBBulkReceive(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	PRX_CONTEXT		pRxContext;
+	unsigned long	IrqFlags;
+	
+
+	/* sanity check */
+	if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NEED_STOP_HANDLE_RX))
+		return;
+		
+	while(1)
+	{
+		RTMP_IRQ_LOCK(&pAd->BulkInLock, IrqFlags);
+		pRxContext = &(pAd->RxContext[pAd->NextRxBulkInReadIndex]);
+		if (((pRxContext->InUse == FALSE) && (pRxContext->Readable == TRUE)) &&
+			(pRxContext->bRxHandling == FALSE))
+		{
+			pRxContext->bRxHandling = TRUE;
+			RTMP_IRQ_UNLOCK(&pAd->BulkInLock, IrqFlags);
+
+			/* read RxContext, Since not */
+#ifdef CONFIG_STA_SUPPORT
+			IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+				STARxDoneInterruptHandle(pAd, TRUE);
+#endif /* CONFIG_STA_SUPPORT */
+
+			/* Finish to handle this bulkIn buffer.*/
+			RTMP_IRQ_LOCK(&pAd->BulkInLock, IrqFlags);
+			pRxContext->BulkInOffset = 0;
+			pRxContext->Readable = FALSE;
+			pRxContext->bRxHandling = FALSE;
+			pAd->ReadPosition = 0;
+			pAd->TransferBufferLength = 0;
+			INC_RING_INDEX(pAd->NextRxBulkInReadIndex, RX_RING_SIZE);
+			RTMP_IRQ_UNLOCK(&pAd->BulkInLock, IrqFlags);
+	
+		} 
+		else
+		{
+			RTMP_IRQ_UNLOCK(&pAd->BulkInLock, IrqFlags);
+			break;
+		}
+	}
+
+	if (!(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NEED_STOP_RX))) 
+	{
+#ifdef CONFIG_STA_SUPPORT
+		if(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF))
+			return;
+#endif /* CONFIG_STA_SUPPORT */
+
+		DoBulkIn(pAd);
+	}
+	
+}
+
+
+/*
+	========================================================================
+
+	Routine Description:
+		This routine process Rx Irp and call rx complete function.
+		
+	Arguments:
+		DeviceObject	Pointer to the device object for next lower
+						device. DeviceObject passed in here belongs to
+						the next lower driver in the stack because we
+						were invoked via IoCallDriver in USB_RxPacket
+						AND it is not OUR device object
+	  Irp				Ptr to completed IRP
+	  Context			Ptr to our Adapter object (context specified
+						in IoSetCompletionRoutine
+		
+	Return Value:
+		Always returns STATUS_MORE_PROCESSING_REQUIRED
+
+	Note:
+		Always returns STATUS_MORE_PROCESSING_REQUIRED
+	========================================================================
+*/
+USBHST_STATUS RTUSBBulkRxComplete(URBCompleteStatus Status, purbb_t pURB, pregs *pt_regs)
+{
+	/* use a receive tasklet to handle received packets;*/
+	/* or sometimes hardware IRQ will be disabled here, so we can not*/
+	/* use spin_lock_bh()/spin_unlock_bh() after IRQ is disabled. :<*/
+	PRX_CONTEXT		pRxContext;
+	PRTMP_ADAPTER	pAd;
+	POS_COOKIE 		pObj;
+
+	pRxContext	= (PRX_CONTEXT)RTMP_OS_USB_CONTEXT_GET(pURB);
+	pAd 		= pRxContext->pAd;
+	pObj 		= (POS_COOKIE) pAd->OS_Cookie;
+
+	RTMP_NET_TASK_DATA_ASSIGN(&pObj->rx_done_task, (unsigned long)pURB);
+	RTMP_OS_TASKLET_SCHE(&pObj->rx_done_task);
+	
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+
+	Note:
+	
+	========================================================================
+*/
+VOID	RTUSBKickBulkOut(
+	IN	PRTMP_ADAPTER pAd)
+{
+	/* BulkIn Reset will reset whole USB PHY. So we need to make sure fRTMP_ADAPTER_BULKIN_RESET not flaged.*/
+	if (!RTMP_TEST_FLAG(pAd ,fRTMP_ADAPTER_NEED_STOP_TX)
+#ifdef RALINK_ATE			
+		&& !(ATE_ON(pAd))
+#endif /* RALINK_ATE */
+		)
+	{
+
+		/* 2. PS-Poll frame is next*/
+		if (RTUSB_TEST_BULK_FLAG(pAd, fRTUSB_BULK_OUT_PSPOLL))
+		{
+			RTUSBBulkOutPsPoll(pAd);
+		}
+
+		/* 5. Mlme frame is next*/
+		else if ((RTUSB_TEST_BULK_FLAG(pAd, fRTUSB_BULK_OUT_MLME)) ||
+				 (pAd->MgmtRing.TxSwFreeIdx < MGMT_RING_SIZE))
+		{
+			RTUSBBulkOutMLMEPacket(pAd, pAd->MgmtRing.TxDmaIdx);
+		}
+
+		/* 6. Data frame normal is next*/
+		if (RTUSB_TEST_BULK_FLAG(pAd, fRTUSB_BULK_OUT_DATA_NORMAL))
+		{
+			if (((!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS)) || 
+				(!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED))
+				))
+			{
+				RTUSBBulkOutDataPacket(pAd, EDCA_AC0_PIPE, pAd->NextBulkOutIndex[EDCA_AC0_PIPE]);
+			}
+		}
+		if (RTUSB_TEST_BULK_FLAG(pAd, fRTUSB_BULK_OUT_DATA_NORMAL_2))
+		{		
+			if (((!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS)) || 
+				(!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED))
+				))
+			{
+				RTUSBBulkOutDataPacket(pAd, EDCA_AC1_PIPE, pAd->NextBulkOutIndex[EDCA_AC1_PIPE]);
+			}
+		}
+		if (RTUSB_TEST_BULK_FLAG(pAd, fRTUSB_BULK_OUT_DATA_NORMAL_3))
+		{
+			if (((!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS)) || 
+				(!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED))
+				))
+			{
+				RTUSBBulkOutDataPacket(pAd, EDCA_AC2_PIPE, pAd->NextBulkOutIndex[EDCA_AC2_PIPE]);
+			}
+		}
+		if (RTUSB_TEST_BULK_FLAG(pAd, fRTUSB_BULK_OUT_DATA_NORMAL_4))
+		{
+			if (((!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS)) || 
+				(!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED))
+				))
+			{
+				RTUSBBulkOutDataPacket(pAd, EDCA_AC3_PIPE, pAd->NextBulkOutIndex[EDCA_AC3_PIPE]);
+			}
+		}
+
+		/* 7. Null frame is the last*/
+		else if (RTUSB_TEST_BULK_FLAG(pAd, fRTUSB_BULK_OUT_DATA_NULL))
+		{
+			if (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS))
+			{
+				RTUSBBulkOutNullFrame(pAd);
+			}
+		}
+
+		/* 8. No data avaliable*/
+		else
+		{
+			
+		}
+	}
+#ifdef RALINK_ATE			
+	else if((ATE_ON(pAd)) &&
+			!RTMP_TEST_FLAG(pAd , fRTMP_ADAPTER_NEED_STOP_TX))
+	{
+		if (RTUSB_TEST_BULK_FLAG(pAd, fRTUSB_BULK_OUT_DATA_ATE))
+		{
+			ATE_RTUSBBulkOutDataPacket(pAd, EDCA_AC0_PIPE);
+		}
+	}	
+#endif /* RALINK_ATE */
+
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+	Call from Reset action after BulkOut failed. 
+	Arguments:
+
+	Return Value:
+
+	Note:
+	
+	========================================================================
+*/
+VOID	RTUSBCleanUpDataBulkOutQueue(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	UCHAR			Idx;			
+	PHT_TX_CONTEXT	pTxContext;
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("--->CleanUpDataBulkOutQueue\n"));
+
+	for (Idx = 0; Idx < 4; Idx++)
+	{
+		pTxContext = &pAd->TxContext[Idx];
+		
+		pTxContext->CurWritePosition = pTxContext->NextBulkOutPosition;
+		pTxContext->LastOne = FALSE;
+		NdisAcquireSpinLock(&pAd->BulkOutLock[Idx]);
+		pAd->BulkOutPending[Idx] = FALSE;
+		NdisReleaseSpinLock(&pAd->BulkOutLock[Idx]);
+	}
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("<---CleanUpDataBulkOutQueue\n"));
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+	
+	Note:
+	
+	========================================================================
+*/
+VOID	RTUSBCleanUpMLMEBulkOutQueue(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	DBGPRINT(RT_DEBUG_TRACE, ("--->CleanUpMLMEBulkOutQueue\n"));
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<---CleanUpMLMEBulkOutQueue\n"));
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+
+	
+	Note:
+	
+	========================================================================
+*/
+VOID	RTUSBCancelPendingIRPs(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	RTUSBCancelPendingBulkInIRP(pAd);
+	RTUSBCancelPendingBulkOutIRP(pAd);
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+
+	Note:
+	
+	========================================================================
+*/
+VOID	RTUSBCancelPendingBulkInIRP(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	PRX_CONTEXT		pRxContext;
+	UINT			i;
+
+	DBGPRINT_RAW(RT_DEBUG_TRACE, ("--->RTUSBCancelPendingBulkInIRP\n"));
+	for ( i = 0; i < (RX_RING_SIZE); i++)
+	{
+		pRxContext = &(pAd->RxContext[i]);
+		if(pRxContext->IRPPending == TRUE)
+		{
+			RTUSB_UNLINK_URB(pRxContext->pUrb);
+			pRxContext->IRPPending = FALSE;
+			pRxContext->InUse = FALSE;
+			/*NdisInterlockedDecrement(&pAd->PendingRx);*/
+			/*pAd->PendingRx--;*/
+		}
+	}
+	DBGPRINT_RAW(RT_DEBUG_TRACE, ("<---RTUSBCancelPendingBulkInIRP\n"));
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+
+	Note:
+	
+	========================================================================
+*/
+VOID	RTUSBCancelPendingBulkOutIRP(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	PHT_TX_CONTEXT		pHTTXContext;
+	PTX_CONTEXT			pMLMEContext;
+	PTX_CONTEXT			pNullContext;
+	PTX_CONTEXT			pPsPollContext;
+	UINT				i, Idx;
+/*	unsigned int 		IrqFlags;*/
+/*	NDIS_SPIN_LOCK		*pLock;*/
+/*	BOOLEAN				*pPending;*/
+	
+
+/*	pLock = &pAd->BulkOutLock[MGMTPIPEIDX];*/
+/*	pPending = &pAd->BulkOutPending[MGMTPIPEIDX];*/
+
+	for (Idx = 0; Idx < 4; Idx++)
+	{
+		pHTTXContext = &(pAd->TxContext[Idx]);
+
+		if (pHTTXContext->IRPPending == TRUE)
+		{
+
+			/* Get the USB_CONTEXT and cancel it's IRP; the completion routine will itself*/
+			/* remove it from the HeadPendingSendList and NULL out HeadPendingSendList*/
+			/*	when the last IRP on the list has been	cancelled; that's how we exit this loop*/
+			
+
+			RTUSB_UNLINK_URB(pHTTXContext->pUrb);
+
+			/* Sleep 200 microseconds to give cancellation time to work*/
+			RTMPusecDelay(200);
+		}
+
+#ifdef RALINK_ATE
+		pHTTXContext->bCopySavePad = 0;
+		pHTTXContext->CurWritePosition = 0;
+		pHTTXContext->CurWriteRealPos = 0;
+		pHTTXContext->bCurWriting = FALSE;
+		pHTTXContext->NextBulkOutPosition = 0;
+		pHTTXContext->ENextBulkOutPosition = 0;
+#endif /* RALINK_ATE */
+		pAd->BulkOutPending[Idx] = FALSE;
+	}
+
+	/*RTMP_IRQ_LOCK(pLock, IrqFlags);*/
+	for (i = 0; i < MGMT_RING_SIZE; i++)
+	{
+		pMLMEContext = (PTX_CONTEXT)pAd->MgmtRing.Cell[i].AllocVa;
+		if(pMLMEContext && (pMLMEContext->IRPPending == TRUE))
+		{
+
+			/* Get the USB_CONTEXT and cancel it's IRP; the completion routine will itself*/
+			/* remove it from the HeadPendingSendList and NULL out HeadPendingSendList*/
+			/*	when the last IRP on the list has been	cancelled; that's how we exit this loop*/
+			
+
+			RTUSB_UNLINK_URB(pMLMEContext->pUrb);
+			pMLMEContext->IRPPending = FALSE;
+			
+			/* Sleep 200 microsecs to give cancellation time to work*/
+			RTMPusecDelay(200);
+		}
+	}
+	pAd->BulkOutPending[MGMTPIPEIDX] = FALSE;
+	/*RTMP_IRQ_UNLOCK(pLock, IrqFlags);*/
+
+	pNullContext = &(pAd->NullContext);
+	if (pNullContext->IRPPending == TRUE)
+		RTUSB_UNLINK_URB(pNullContext->pUrb);
+
+	pPsPollContext = &(pAd->PsPollContext);
+	if (pPsPollContext->IRPPending == TRUE)
+		RTUSB_UNLINK_URB(pPsPollContext->pUrb);
+
+	for (Idx = 0; Idx < 4; Idx++)
+	{
+		NdisAcquireSpinLock(&pAd->BulkOutLock[Idx]);
+		pAd->BulkOutPending[Idx] = FALSE;
+		NdisReleaseSpinLock(&pAd->BulkOutLock[Idx]);
+	}
+}
+
+#endif /* RTMP_MAC_USB */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/rtusb_data.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/rtusb_data.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/rtusb_data.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/rtusb_data.c	2017-09-23 03:42:49.770675822 +0800
@@ -0,0 +1,255 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifdef RTMP_MAC_USB
+
+
+#include	"rt_config.h"
+
+extern  UCHAR Phy11BGNextRateUpward[]; /* defined in mlme.c*/
+extern UCHAR	EpToQueue[];
+
+
+NDIS_STATUS RTUSBFreeDescriptorRelease(
+	IN RTMP_ADAPTER *pAd, 
+	IN UCHAR		BulkOutPipeId)
+{
+	unsigned long   IrqFlags;
+	HT_TX_CONTEXT	*pHTTXContext;
+	
+	pHTTXContext = &pAd->TxContext[BulkOutPipeId];
+	RTMP_IRQ_LOCK(&pAd->TxContextQueueLock[BulkOutPipeId], IrqFlags);
+	pHTTXContext->bCurWriting = FALSE;
+	RTMP_IRQ_UNLOCK(&pAd->TxContextQueueLock[BulkOutPipeId], IrqFlags);
+
+	return (NDIS_STATUS_SUCCESS);
+}
+
+
+#ifdef RALINK_ATE
+/*
+	========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+
+	IRQL = 
+	
+	Note:
+	
+	========================================================================
+*/
+VOID	RTUSBRejectPendingPackets(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	UCHAR			Index;
+	PQUEUE_ENTRY	pEntry;
+	PNDIS_PACKET	pPacket;
+	PQUEUE_HEADER	pQueue;
+	
+
+	for (Index = 0; Index < 4; Index++)
+	{
+		NdisAcquireSpinLock(&pAd->TxSwQueueLock[Index]);
+		while (pAd->TxSwQueue[Index].Head != NULL)
+		{
+			pQueue = (PQUEUE_HEADER) &(pAd->TxSwQueue[Index]);
+			pEntry = RemoveHeadQueue(pQueue);
+			pPacket = QUEUE_ENTRY_TO_PACKET(pEntry);
+			RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_FAILURE);
+		}
+		NdisReleaseSpinLock(&pAd->TxSwQueueLock[Index]);
+
+	}
+
+}
+#endif /* RALINK_ATE */
+
+
+/*
+	========================================================================
+
+	Routine	Description:
+		This subroutine will scan through releative ring descriptor to find
+		out avaliable free ring descriptor and compare with request size.
+		
+	Arguments:
+		pAd	Pointer	to our adapter
+		RingType	Selected Ring
+		
+	Return Value:
+		NDIS_STATUS_FAILURE		Not enough free descriptor
+		NDIS_STATUS_SUCCESS		Enough free descriptor
+
+	Note:
+	
+	========================================================================
+*/
+NDIS_STATUS	RTUSBFreeDescriptorRequest(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			BulkOutPipeId,
+	IN	UINT32			NumberRequired)
+{
+/*	UCHAR			FreeNumber = 0;*/
+/*	UINT			Index;*/
+	NDIS_STATUS		Status = NDIS_STATUS_FAILURE;
+	unsigned long   IrqFlags;
+	HT_TX_CONTEXT	*pHTTXContext;
+
+
+	pHTTXContext = &pAd->TxContext[BulkOutPipeId];
+	RTMP_IRQ_LOCK(&pAd->TxContextQueueLock[BulkOutPipeId], IrqFlags);
+#ifdef USB_BULK_BUF_ALIGMENT
+	if( ((pHTTXContext->CurWriteIdx< pHTTXContext->NextBulkIdx  ) &&   (pHTTXContext->NextBulkIdx - pHTTXContext->CurWriteIdx == 1)) 
+		|| ((pHTTXContext->CurWriteIdx ==(BUF_ALIGMENT_RINGSIZE -1) ) &&  (pHTTXContext->NextBulkIdx == 0 )))
+	{
+		RTUSB_SET_BULK_FLAG(pAd, (fRTUSB_BULK_OUT_DATA_NORMAL << BulkOutPipeId));
+
+	}
+	else if (pHTTXContext->bCurWriting == TRUE)
+	{
+		DBGPRINT(RT_DEBUG_TRACE,("BUF_ALIGMENT RTUSBFreeD c3 --> QueIdx=%d, CWPos=%ld, NBOutPos=%ld!\n", BulkOutPipeId, pHTTXContext->CurWritePosition, pHTTXContext->NextBulkOutPosition));
+		RTUSB_SET_BULK_FLAG(pAd, (fRTUSB_BULK_OUT_DATA_NORMAL << BulkOutPipeId));
+	}
+
+#else
+	if ((pHTTXContext->CurWritePosition < pHTTXContext->NextBulkOutPosition) && ((pHTTXContext->CurWritePosition + NumberRequired + LOCAL_TXBUF_SIZE) > pHTTXContext->NextBulkOutPosition))
+	{
+		
+		RTUSB_SET_BULK_FLAG(pAd, (fRTUSB_BULK_OUT_DATA_NORMAL << BulkOutPipeId));
+	}
+	else if ((pHTTXContext->CurWritePosition == 8) && (pHTTXContext->NextBulkOutPosition < (NumberRequired + LOCAL_TXBUF_SIZE)))
+	{
+		RTUSB_SET_BULK_FLAG(pAd, (fRTUSB_BULK_OUT_DATA_NORMAL << BulkOutPipeId));
+	}
+	else if (pHTTXContext->bCurWriting == TRUE)
+	{
+		DBGPRINT(RT_DEBUG_TRACE,("RTUSBFreeD c3 --> QueIdx=%d, CWPos=%ld, NBOutPos=%ld!\n", BulkOutPipeId, pHTTXContext->CurWritePosition, pHTTXContext->NextBulkOutPosition));
+		RTUSB_SET_BULK_FLAG(pAd, (fRTUSB_BULK_OUT_DATA_NORMAL << BulkOutPipeId));
+	}
+#endif /* USB_BULK_BUF_ALIGMENT */
+	else
+	{
+		Status = NDIS_STATUS_SUCCESS;
+	}
+	RTMP_IRQ_UNLOCK(&pAd->TxContextQueueLock[BulkOutPipeId], IrqFlags);
+
+	
+	return (Status);
+}
+
+
+BOOLEAN	RTUSBNeedQueueBackForAgg(
+	IN RTMP_ADAPTER *pAd, 
+	IN UCHAR		BulkOutPipeId)
+{
+	unsigned long   IrqFlags;
+	HT_TX_CONTEXT	*pHTTXContext;
+	BOOLEAN			needQueBack = FALSE;
+	
+	pHTTXContext = &pAd->TxContext[BulkOutPipeId];
+	
+	RTMP_IRQ_LOCK(&pAd->TxContextQueueLock[BulkOutPipeId], IrqFlags);
+	if ((pHTTXContext->IRPPending == TRUE)  /*&& (pAd->TxSwQueue[BulkOutPipeId].Number == 0) */)
+	{
+		if ((pHTTXContext->CurWritePosition < pHTTXContext->ENextBulkOutPosition) && 
+			(((pHTTXContext->ENextBulkOutPosition+MAX_AGGREGATION_SIZE) < MAX_TXBULK_LIMIT) || (pHTTXContext->CurWritePosition > MAX_AGGREGATION_SIZE)))
+		{
+			needQueBack = TRUE;
+		}
+		else if ((pHTTXContext->CurWritePosition > pHTTXContext->ENextBulkOutPosition) && 
+				 ((pHTTXContext->ENextBulkOutPosition + MAX_AGGREGATION_SIZE) < pHTTXContext->CurWritePosition))
+		{
+			needQueBack = TRUE;
+		}
+	}
+	RTMP_IRQ_UNLOCK(&pAd->TxContextQueueLock[BulkOutPipeId], IrqFlags);
+
+	return needQueBack;
+
+}
+
+
+/*
+	========================================================================
+	
+	Routine	Description:
+		Calculates the duration which is required to transmit out frames 
+	with given size and specified rate.
+		
+	Arguments:
+		pTxD		Pointer to transmit descriptor
+		Ack			Setting for Ack requirement bit
+		Fragment	Setting for Fragment bit
+		RetryMode	Setting for retry mode
+		Ifs			Setting for IFS gap
+		Rate		Setting for transmit rate
+		Service		Setting for service
+		Length		Frame length
+		TxPreamble  Short or Long preamble when using CCK rates
+		QueIdx - 0-3, according to 802.11e/d4.4 June/2003
+		
+	Return Value:
+		None
+		
+	IRQL = PASSIVE_LEVEL
+	IRQL = DISPATCH_LEVEL
+	
+	========================================================================
+*/
+
+
+VOID RTMPWriteTxInfo(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PTXINFO_STRUC 	pTxInfo,
+	IN	  USHORT		USBDMApktLen,
+	IN	  BOOLEAN		bWiv,
+	IN	  UCHAR			QueueSel,
+	IN	  UCHAR			NextValid,
+	IN	  UCHAR			TxBurst)
+{
+	pTxInfo->USBDMATxPktLen = USBDMApktLen;
+	pTxInfo->QSEL = QueueSel;
+	if (QueueSel != FIFO_EDCA)
+		DBGPRINT(RT_DEBUG_TRACE, ("====> QueueSel != FIFO_EDCA<============\n"));
+	pTxInfo->USBDMANextVLD = FALSE; /*NextValid;   Need to check with Jan about this.*/
+	pTxInfo->USBDMATxburst = TxBurst;
+	pTxInfo->WIV = bWiv;
+#ifndef USB_BULK_BUF_ALIGMENT
+	pTxInfo->SwUseLastRound = 0;
+#else
+	pTxInfo->bFragLasAlignmentsectiontRound = 0;
+#endif /* USB_BULK_BUF_ALIGMENT */
+	pTxInfo->rsv = 0;
+	pTxInfo->rsv2 = 0;
+}
+
+
+#endif /* RTMP_MAC_USB */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/rtusb_dev_id.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/rtusb_dev_id.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/rtusb_dev_id.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/rtusb_dev_id.c	2017-09-23 03:42:49.770675822 +0800
@@ -0,0 +1,143 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#define RTMP_MODULE_OS
+
+/*#include "rt_config.h"*/
+#include "rtmp_comm.h"
+#include "rt_os_util.h"
+#include "rt_os_net.h"
+
+/* module table */
+USB_DEVICE_ID rtusb_dev_id[] = {
+#ifdef RT3070
+	{USB_DEVICE(0x148F,0x3070)}, /* Ralink 3070 */
+	{USB_DEVICE(0x148F,0x3071)}, /* Ralink 3071 */
+	{USB_DEVICE(0x148F,0x3072)}, /* Ralink 3072 */
+	{USB_DEVICE(0x0DB0,0x3820)}, /* Ralink 3070 */
+	{USB_DEVICE(0x0DB0,0x871C)}, /* Ralink 3070 */
+	{USB_DEVICE(0x0DB0,0x822C)}, /* Ralink 3070 */
+	{USB_DEVICE(0x0DB0,0x871B)}, /* Ralink 3070 */
+	{USB_DEVICE(0x0DB0,0x822B)}, /* Ralink 3070 */
+	{USB_DEVICE(0x0DF6,0x003E)}, /* Sitecom 3070 */
+	{USB_DEVICE(0x0DF6,0x0042)}, /* Sitecom 3072 */
+	{USB_DEVICE(0x0DF6,0x0048)}, /* Sitecom 3070 */
+	{USB_DEVICE(0x0DF6,0x0047)}, /* Sitecom 3071 */
+	{USB_DEVICE(0x0DF6,0x005F)}, /* Sitecom 3072 */
+	{USB_DEVICE(0x14B2,0x3C12)}, /* AL 3070 */
+	{USB_DEVICE(0x18C5,0x0012)}, /* Corega 3070 */
+	{USB_DEVICE(0x083A,0x7511)}, /* Arcadyan 3070 */
+	{USB_DEVICE(0x083A,0xA701)}, /* SMC 3070 */
+	{USB_DEVICE(0x083A,0xA702)}, /* SMC 3072 */
+	{USB_DEVICE(0x1740,0x9703)}, /* EnGenius 3070 */
+	{USB_DEVICE(0x1740,0x9705)}, /* EnGenius 3071 */
+	{USB_DEVICE(0x1740,0x9706)}, /* EnGenius 3072 */
+	{USB_DEVICE(0x1740,0x9707)}, /* EnGenius 3070 */
+	{USB_DEVICE(0x1740,0x9708)}, /* EnGenius 3071 */
+	{USB_DEVICE(0x1740,0x9709)}, /* EnGenius 3072 */
+	{USB_DEVICE(0x13D3,0x3273)}, /* AzureWave 3070*/
+	{USB_DEVICE(0x13D3,0x3305)}, /* AzureWave 3070*/
+	{USB_DEVICE(0x1044,0x800D)}, /* Gigabyte GN-WB32L 3070 */
+	{USB_DEVICE(0x2019,0xAB25)}, /* Planex Communications, Inc. RT3070 */
+	{USB_DEVICE(0x2019,0x5201)}, /* Planex Communications, Inc. RT8070 */
+	{USB_DEVICE(0x07B8,0x3070)}, /* AboCom 3070 */
+	{USB_DEVICE(0x07B8,0x3071)}, /* AboCom 3071 */
+	{USB_DEVICE(0x07B8,0x3072)}, /* Abocom 3072 */
+	{USB_DEVICE(0x7392,0x7711)}, /* Edimax 3070 */
+	{USB_DEVICE(0x7392,0x4085)}, /* 2L Central Europe BV 8070 */
+	{USB_DEVICE(0x1A32,0x0304)}, /* Quanta 3070 */
+	{USB_DEVICE(0x1EDA,0x2310)}, /* AirTies 3070 */
+	{USB_DEVICE(0x07D1,0x3C0A)}, /* D-Link 3072 */
+	{USB_DEVICE(0x07D1,0x3C0D)}, /* D-Link 3070 */
+	{USB_DEVICE(0x07D1,0x3C0E)}, /* D-Link 3070 */
+	{USB_DEVICE(0x07D1,0x3C0F)}, /* D-Link 3070 */
+	{USB_DEVICE(0x07D1,0x3C16)}, /* D-Link 3070 */
+	{USB_DEVICE(0x07D1,0x3C17)}, /* D-Link 8070 */
+	{USB_DEVICE(0x1D4D,0x000C)}, /* Pegatron Corporation 3070 */
+	{USB_DEVICE(0x1D4D,0x000E)}, /* Pegatron Corporation 3070 */
+	{USB_DEVICE(0x1D4D,0x0011)}, /* Pegatron Corporation 3072 */
+	{USB_DEVICE(0x5A57,0x5257)}, /* Zinwell 3070 */
+	{USB_DEVICE(0x5A57,0x0283)}, /* Zinwell 3072 */
+	{USB_DEVICE(0x04BB,0x0945)}, /* I-O DATA 3072 */
+	{USB_DEVICE(0x04BB,0x0947)}, /* I-O DATA 3070 */
+	{USB_DEVICE(0x04BB,0x0948)}, /* I-O DATA 3072 */
+	{USB_DEVICE(0x203D,0x1480)}, /* Encore 3070 */
+	{USB_DEVICE(0x20B8,0x8888)}, /* PARA INDUSTRIAL 3070 */
+	{USB_DEVICE(0x0B05,0x1784)}, /* Asus 3072 */
+	{USB_DEVICE(0x203D,0x14A9)}, /* Encore 3070*/
+	{USB_DEVICE(0x0DB0,0x899A)}, /* MSI 3070*/
+	{USB_DEVICE(0x0DB0,0x3870)}, /* MSI 3070*/
+	{USB_DEVICE(0x0DB0,0x870A)}, /* MSI 3070*/
+	{USB_DEVICE(0x0DB0,0x6899)}, /* MSI 3070 */
+	{USB_DEVICE(0x0DB0,0x3822)}, /* MSI 3070 */
+	{USB_DEVICE(0x0DB0,0x3871)}, /* MSI 3070 */
+	{USB_DEVICE(0x0DB0,0x871A)}, /* MSI 3070 */
+	{USB_DEVICE(0x0DB0,0x822A)}, /* MSI 3070 */
+	{USB_DEVICE(0x0DB0,0x3821)}, /* Ralink 3070 */
+	{USB_DEVICE(0x0DB0,0x821A)}, /* Ralink 3070 */
+	{USB_DEVICE(0x5A57,0x0282)}, /* zintech 3072 */	
+	{USB_DEVICE(0x083A,0xA703)}, /* IO-MAGIC */
+	{USB_DEVICE(0x13D3,0x3307)}, /* Azurewave */
+	{USB_DEVICE(0x13D3,0x3321)}, /* Azurewave */
+	{USB_DEVICE(0x07FA,0x7712)}, /* Edimax */
+	{USB_DEVICE(0x0789,0x0166)}, /* Edimax */
+	{USB_DEVICE(0x0586,0x341A)}, /* Zyxel */
+	{USB_DEVICE(0x0586,0x341E)}, /* Zyxel */
+	{USB_DEVICE(0x0586,0x343E)}, /* Zyxel */
+	{USB_DEVICE(0x1EDA,0x2012)}, /* Airties */
+#endif /* RT3070 */
+#ifdef RT3370
+	{USB_DEVICE(0x148F,0x3370)}, /* Ralink 3370 */
+	{USB_DEVICE(0x0DF6,0x0050)}, /* Sitecom 3370 */
+#endif /* RT3370*/
+#ifdef RT5370
+	{USB_DEVICE(0x148F,0x5370)}, /* Ralink 5370 */	
+	{USB_DEVICE(0x148F,0x5372)}, /* Ralink 5370 */	
+	{USB_DEVICE(0x13D3,0x3365)}, /* Azurewave */
+	{USB_DEVICE(0x13D3,0x3329)}, /* Azurewave */
+	{USB_DEVICE(0x2001,0x3C15)}, /* Alpha */
+	{USB_DEVICE(0x2001,0x3C19)}, /* Alpha */
+	{USB_DEVICE(0x2001,0x3C1C)}, /* DLink */
+	{USB_DEVICE(0x2001,0x3C1D)}, /* DLink */
+	{USB_DEVICE(0x043E,0x7A12)}, /* Arcadyan */
+	{USB_DEVICE(0x043E,0x7A22)}, /* LG innotek */
+#endif // RT5370 //
+#ifdef RT5372
+	{USB_DEVICE(0x148F,0x5372)}, /* Ralink 5372 */
+	{USB_DEVICE(0x13D3,0x3365)}, /* Azurewave */
+#endif /*  RT5372 */
+#ifdef RT5572
+	{USB_DEVICE(0x148F,0x5572)}, /* Ralink 5572 */
+	{USB_DEVICE(0x043E,0x7A32)}, /* Arcadyan */
+	{USB_DEVICE(0x2001,0x3C1A)}, /* DLink */
+#endif /* RT5572 */
+	{ }/* Terminating entry */
+};
+
+INT const rtusb_usb_id_len = sizeof(rtusb_dev_id) / sizeof(USB_DEVICE_ID);
+
+MODULE_DEVICE_TABLE(usb, rtusb_dev_id);
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/rtusb_io.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/rtusb_io.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/rtusb_io.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/rtusb_io.c	2017-09-23 03:42:49.774675809 +0800
@@ -0,0 +1,1945 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifdef RTMP_MAC_USB
+
+
+#include	"rt_config.h"
+
+#define MAX_VENDOR_REQ_RETRY_COUNT  10
+
+/*
+	========================================================================
+	
+	Routine Description: NIC initialization complete
+
+	Arguments:
+
+	Return Value:
+
+	IRQL = 
+	
+	Note:
+	
+	========================================================================
+*/
+
+static NTSTATUS	RTUSBFirmwareRun(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	NTSTATUS	Status;
+
+	Status = RTUSB_VendorRequest(
+		pAd,
+		USBD_TRANSFER_DIRECTION_OUT,
+		DEVICE_VENDOR_REQUEST_OUT,
+		0x01,
+		0x8,
+		0,
+		NULL,
+		0);
+	
+	return Status;
+}
+
+
+
+/*
+	========================================================================
+	
+	Routine Description: Get current firmware operation mode (Return Value)
+
+	Arguments:
+
+	Return Value: 
+		0 or 1 = Downloaded by host driver
+		others = Driver doesn't download firmware
+
+	IRQL = 
+	
+	Note:
+	
+	========================================================================
+*/
+NTSTATUS	RTUSBFirmwareOpmode(
+	IN	PRTMP_ADAPTER	pAd,
+	OUT	PULONG			pValue)
+{
+	NTSTATUS	Status;
+
+	Status = RTUSB_VendorRequest(
+		pAd,
+		(USBD_TRANSFER_DIRECTION_IN | USBD_SHORT_TRANSFER_OK),
+		DEVICE_VENDOR_REQUEST_IN,
+		0x1,
+		0x11,
+		0,
+		pValue,
+		4);
+	return Status;
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description: Write Firmware to NIC.
+
+	Arguments:
+
+	Return Value:
+
+	IRQL = 
+	
+	Note:
+	
+	========================================================================
+*/
+NTSTATUS RTUSBFirmwareWrite(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR		pFwImage,
+	IN ULONG		FwLen)
+{
+	UINT32		MacReg;
+	NTSTATUS 	Status;
+/*	ULONG 		i;*/
+	USHORT		writeLen;
+	/*ULONG		FMode = 0;*/
+
+
+	Status = RTUSBReadMACRegister(pAd, MAC_CSR0, &MacReg);
+
+
+	/* write firmware */
+	writeLen = FwLen;
+	RTUSBMultiWrite(pAd, FIRMWARE_IMAGE_BASE, pFwImage, writeLen);
+
+	Status = RTUSBWriteMACRegister(pAd, 0x7014, 0xffffffff);
+	Status = RTUSBWriteMACRegister(pAd, 0x701c, 0xffffffff);
+
+	/* change 8051 from ROM to RAM */
+	Status = RTUSBFirmwareRun(pAd);
+
+	
+	return Status;
+}
+
+
+NTSTATUS	RTUSBVenderReset(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	NTSTATUS	Status;
+	DBGPRINT_RAW(RT_DEBUG_ERROR, ("-->RTUSBVenderReset\n"));
+	Status = RTUSB_VendorRequest(
+		pAd,
+		USBD_TRANSFER_DIRECTION_OUT,
+		DEVICE_VENDOR_REQUEST_OUT,
+		0x01,
+		0x1,
+		0,
+		NULL,
+		0);
+
+	DBGPRINT_RAW(RT_DEBUG_ERROR, ("<--RTUSBVenderReset\n"));
+	return Status;
+}
+/*
+	========================================================================
+	
+	Routine Description: Read various length data from RT2573
+
+	Arguments:
+
+	Return Value:
+
+	IRQL = 
+	
+	Note:
+	
+	========================================================================
+*/
+NTSTATUS	RTUSBMultiRead(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	USHORT			Offset,
+	OUT	PUCHAR			pData,
+	IN	USHORT			length)
+{
+	NTSTATUS	Status;
+
+	Status = RTUSB_VendorRequest(
+		pAd,
+		(USBD_TRANSFER_DIRECTION_IN | USBD_SHORT_TRANSFER_OK),
+		DEVICE_VENDOR_REQUEST_IN,
+		0x7,
+		0,
+		Offset,
+		pData,
+		length);
+	
+	return Status;
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description: Write various length data to RT USB Wifi device, the maxima length should not large than 65535 bytes.
+
+	Arguments:
+
+	Return Value:
+
+	IRQL = 
+	
+	Note:
+		Use this funciton carefully cause it may not stable in some special USB host controllers.
+	
+	========================================================================
+*/
+NTSTATUS RTUSBMultiWrite_nBytes(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	USHORT			Offset,
+	IN	PUCHAR			pData,
+	IN	USHORT			length,
+	IN	USHORT			batchLen)
+{
+	NTSTATUS Status = STATUS_SUCCESS;
+	USHORT index = Offset, actLen = batchLen, leftLen = length;
+	PUCHAR pSrc = pData;
+
+
+	do
+	{
+		actLen = (actLen > batchLen ? batchLen : actLen);
+		Status = RTUSB_VendorRequest(
+			pAd,
+			USBD_TRANSFER_DIRECTION_OUT,
+			DEVICE_VENDOR_REQUEST_OUT,
+			0x6,
+			0,
+			index,
+			pSrc,
+			actLen);
+
+		if (Status != STATUS_SUCCESS)
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("VendrCmdMultiWrite_nBytes failed!\n"));
+			break;
+		}
+		
+		index += actLen;
+		leftLen -= actLen;
+		pSrc = pSrc + actLen;
+	}while(leftLen > 0);
+	
+	return Status;
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description: Write various length data to RT2573
+
+	Arguments:
+
+	Return Value:
+
+	IRQL = 
+	
+	Note:
+	
+	========================================================================
+*/
+NTSTATUS	RTUSBMultiWrite_OneByte(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	USHORT			Offset,
+	IN	PUCHAR			pData)
+{
+	NTSTATUS	Status;
+
+	/* TODO: In 2870, use this funciton carefully cause it's not stable.*/
+	Status = RTUSB_VendorRequest(
+		pAd,
+		USBD_TRANSFER_DIRECTION_OUT,
+		DEVICE_VENDOR_REQUEST_OUT,
+		0x6,
+		0,
+		Offset,
+		pData,
+		1);
+
+	return Status;
+}
+
+NTSTATUS	RTUSBMultiWrite(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	USHORT			Offset,
+	IN	PUCHAR			pData,
+	IN	USHORT			length)
+{
+	NTSTATUS	Status;
+
+
+	USHORT          index = 0,Value;
+	PUCHAR          pSrc = pData;
+	USHORT          resude = 0;
+		
+	resude = length % 2;
+	length  += resude;
+	do
+	{
+			Value =(USHORT)( *pSrc  | (*(pSrc + 1) << 8));
+		Status = RTUSBSingleWrite(pAd,Offset + index,Value);
+            index +=2;
+            length -= 2;
+            pSrc = pSrc + 2;
+        }while(length > 0);
+
+	return Status;
+}
+
+
+NTSTATUS RTUSBSingleWrite(
+	IN 	RTMP_ADAPTER 	*pAd,
+	IN	USHORT			Offset,
+	IN	USHORT			Value)
+{
+	NTSTATUS	Status;
+
+	Status = RTUSB_VendorRequest(
+		pAd,
+		USBD_TRANSFER_DIRECTION_OUT,
+		DEVICE_VENDOR_REQUEST_OUT,
+		0x2,
+		Value,
+		Offset,
+		NULL,
+		0);
+	
+	return Status;
+
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description: Read 32-bit MAC register
+
+	Arguments:
+
+	Return Value:
+
+	IRQL = 
+	
+	Note:
+	
+	========================================================================
+*/
+NTSTATUS	RTUSBReadMACRegister(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	USHORT			Offset,
+	OUT	PUINT32			pValue)
+{
+	NTSTATUS	Status = 0;
+	UINT32		localVal;
+
+	Status = RTUSB_VendorRequest(
+		pAd,
+		(USBD_TRANSFER_DIRECTION_IN | USBD_SHORT_TRANSFER_OK),
+		DEVICE_VENDOR_REQUEST_IN,
+		0x7,
+		0,
+		Offset,
+		&localVal,
+		4);
+	
+	*pValue = le2cpu32(localVal);
+
+
+	if (Status < 0)
+		*pValue = 0xffffffff;
+	
+	return Status;
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description: Write 32-bit MAC register
+
+	Arguments:
+
+	Return Value:
+
+	IRQL = 
+	
+	Note:
+	
+	========================================================================
+*/
+NTSTATUS	RTUSBWriteMACRegister(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	USHORT			Offset,
+	IN	UINT32			Value)
+{
+	NTSTATUS	Status;
+	UINT32		localVal;
+
+	localVal = Value;
+
+	Status = RTUSBSingleWrite(pAd, Offset, (USHORT)(localVal & 0xffff));
+	Status = RTUSBSingleWrite(pAd, Offset + 2, (USHORT)((localVal & 0xffff0000) >> 16));
+
+	return Status;
+}
+
+
+
+/*
+	========================================================================
+	
+	Routine Description: Read 8-bit BBP register
+
+	Arguments:
+
+	Return Value:
+
+	IRQL = 
+	
+	Note:
+	
+	========================================================================
+*/
+NTSTATUS	RTUSBReadBBPRegister(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			Id,
+	IN	PUCHAR			pValue)
+{
+	BBP_CSR_CFG_STRUC	BbpCsr;
+	UINT			i = 0;
+	NTSTATUS		status;
+	int				RET = 0;
+
+	RTMP_SEM_EVENT_WAIT(&(pAd->UsbVendorReq_semaphore2), RET);
+	
+	/* Verify the busy condition*/
+	do
+	{
+		status = RTUSBReadMACRegister(pAd, BBP_CSR_CFG, &BbpCsr.word);
+		if(status >= 0)
+		{
+		if (!(BbpCsr.field.Busy == BUSY))
+			break;
+		}
+		DBGPRINT(RT_DEBUG_TRACE, ("RTUSBReadBBPRegister(BBP_CSR_CFG_1):retry count=%d!\n", i));
+		i++;
+	}while ((i < RETRY_LIMIT) && (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)));
+	
+	if ((i == RETRY_LIMIT) || (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)))
+	{
+		
+		/* Read failed then Return Default value.*/
+		
+		*pValue = pAd->BbpWriteLatch[Id];
+	
+		DBGPRINT_RAW(RT_DEBUG_ERROR, ("Retry count exhausted or device removed!!!\n"));
+		RTMP_SEM_EVENT_UP(&(pAd->UsbVendorReq_semaphore2));
+		
+		return STATUS_UNSUCCESSFUL;
+	}
+
+	/* Prepare for write material*/
+	BbpCsr.word 				= 0;
+	BbpCsr.field.fRead			= 1;
+	BbpCsr.field.Busy			= 1;
+	BbpCsr.field.RegNum 		= Id;
+	RTUSBWriteMACRegister(pAd, BBP_CSR_CFG, BbpCsr.word);
+
+	i = 0;	
+	/* Verify the busy condition*/
+	do
+	{
+		status = RTUSBReadMACRegister(pAd, BBP_CSR_CFG, &BbpCsr.word);
+		if (status >= 0)
+		{
+		if (!(BbpCsr.field.Busy == BUSY))
+		{
+			*pValue = (UCHAR)BbpCsr.field.Value;
+			break;
+		}
+		}
+		DBGPRINT(RT_DEBUG_TRACE, ("RTUSBReadBBPRegister(BBP_CSR_CFG_2):retry count=%d!\n", i));
+		i++;
+	}while ((i < RETRY_LIMIT) && (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)));
+	
+	if ((i == RETRY_LIMIT) || (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)))
+	{
+		
+		/* Read failed then Return Default value.*/
+		
+		*pValue = pAd->BbpWriteLatch[Id];
+
+		DBGPRINT_RAW(RT_DEBUG_ERROR, ("Retry count exhausted or device removed!!!\n"));
+		RTMP_SEM_EVENT_UP(&(pAd->UsbVendorReq_semaphore2));
+		return STATUS_UNSUCCESSFUL;
+	}
+	RTMP_SEM_EVENT_UP(&(pAd->UsbVendorReq_semaphore2));
+	
+	return STATUS_SUCCESS;
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description: Write 8-bit BBP register
+
+	Arguments:
+
+	Return Value:
+	
+	IRQL = 
+	
+	Note:
+	
+	========================================================================
+*/
+NTSTATUS	RTUSBWriteBBPRegister(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			Id,
+	IN	UCHAR			Value)
+{
+	BBP_CSR_CFG_STRUC	BbpCsr;
+	UINT			i = 0;
+	NTSTATUS		status;
+	int				RET = 0;
+
+	RTMP_SEM_EVENT_WAIT(&(pAd->UsbVendorReq_semaphore2), RET);
+	
+	/* Verify the busy condition*/
+	do
+	{
+		status = RTUSBReadMACRegister(pAd, BBP_CSR_CFG, &BbpCsr.word);
+		if (status >= 0)
+		{
+		if (!(BbpCsr.field.Busy == BUSY))
+			break;
+		}
+		DBGPRINT(RT_DEBUG_TRACE, ("RTUSBWriteBBPRegister(BBP_CSR_CFG):retry count=%d!\n", i));
+		i++;
+	}
+	while ((i < RETRY_LIMIT) && (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)));
+	
+	if ((i == RETRY_LIMIT) || (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)))
+	{
+		DBGPRINT_RAW(RT_DEBUG_ERROR, ("Retry count exhausted or device removed!!!\n"));
+		RTMP_SEM_EVENT_UP(&(pAd->UsbVendorReq_semaphore2));
+		return STATUS_UNSUCCESSFUL;
+	}
+
+	/* Prepare for write material*/
+	BbpCsr.word 				= 0;
+	BbpCsr.field.fRead			= 0;
+	BbpCsr.field.Value			= Value;
+	BbpCsr.field.Busy			= 1;
+	BbpCsr.field.RegNum 		= Id;
+	RTUSBWriteMACRegister(pAd, BBP_CSR_CFG, BbpCsr.word);
+	
+	pAd->BbpWriteLatch[Id] = Value;
+	RTMP_SEM_EVENT_UP(&(pAd->UsbVendorReq_semaphore2));
+
+	return STATUS_SUCCESS;
+}
+/*
+	========================================================================
+	
+	Routine Description: Write RF register through MAC
+
+	Arguments:
+
+	Return Value:
+	
+	IRQL = 
+	
+	Note:
+	
+	========================================================================
+*/
+NTSTATUS	RTUSBWriteRFRegister(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UINT32			Value)
+{
+	PHY_CSR4_STRUC	PhyCsr4;
+	UINT			i = 0;
+	NTSTATUS		status;
+
+	NdisZeroMemory(&PhyCsr4, sizeof(PHY_CSR4_STRUC));
+	do
+	{
+		status = RTUSBReadMACRegister(pAd, RF_CSR_CFG0, &PhyCsr4.word);
+		if (status >= 0)
+		{
+		if (!(PhyCsr4.field.Busy))
+			break;
+		}
+		DBGPRINT(RT_DEBUG_TRACE, ("RTUSBWriteRFRegister(RF_CSR_CFG0):retry count=%d!\n", i));
+		i++;
+	}
+	while ((i < RETRY_LIMIT) && (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)));
+
+	if ((i == RETRY_LIMIT) || (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)))
+	{
+		DBGPRINT_RAW(RT_DEBUG_ERROR, ("Retry count exhausted or device removed!!!\n"));
+		return STATUS_UNSUCCESSFUL;
+	}
+
+	RTUSBWriteMACRegister(pAd, RF_CSR_CFG0, Value);
+	
+	return STATUS_SUCCESS;
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+
+	IRQL = 
+	
+	Note:
+	
+	========================================================================
+*/
+NTSTATUS RTUSBReadEEPROM(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	USHORT			Offset,
+	OUT	PUCHAR			pData,
+	IN	USHORT			length)
+{
+	NTSTATUS	Status = STATUS_SUCCESS;
+
+		Status = RTUSB_VendorRequest(
+			pAd,
+			(USBD_TRANSFER_DIRECTION_IN | USBD_SHORT_TRANSFER_OK),
+			DEVICE_VENDOR_REQUEST_IN,
+			0x9,
+			0,
+			Offset,
+			pData,
+			length);
+
+	return Status;
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+	
+	IRQL = 
+	
+	Note:
+	
+	========================================================================
+*/
+NTSTATUS RTUSBWriteEEPROM(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	USHORT			Offset,
+	IN	PUCHAR			pData,
+	IN	USHORT			length)
+{
+	NTSTATUS	Status = STATUS_SUCCESS;
+
+		Status = RTUSB_VendorRequest(
+			pAd,
+			USBD_TRANSFER_DIRECTION_OUT,
+			DEVICE_VENDOR_REQUEST_OUT,
+			0x8,
+			0,
+			Offset,
+			pData,
+			length);
+	
+	return Status;
+}
+
+
+NTSTATUS RTUSBReadEEPROM16(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	USHORT			offset,
+	OUT	PUSHORT			pData)
+{
+	NTSTATUS status;
+	USHORT  localData;
+	
+	status = RTUSBReadEEPROM(pAd, offset, (PUCHAR)(&localData), 2);
+	if (status == STATUS_SUCCESS)
+		*pData = le2cpu16(localData);
+	
+	return status;
+
+}
+
+NTSTATUS RTUSBWriteEEPROM16(
+	IN RTMP_ADAPTER *pAd, 
+	IN USHORT offset, 
+	IN USHORT value)
+{
+	USHORT tmpVal;
+	
+	tmpVal = cpu2le16(value);
+	return RTUSBWriteEEPROM(pAd, offset, (PUCHAR)&(tmpVal), 2);
+}
+	
+/*
+	========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+	
+	IRQL = 
+	
+	Note:
+	
+	========================================================================
+*/
+VOID RTUSBPutToSleep(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	UINT32		value;
+	
+	/* Timeout 0x40 x 50us*/
+	value = (SLEEPCID<<16)+(OWNERMCU<<24)+ (0x40<<8)+1;
+	RTUSBWriteMACRegister(pAd, 0x7010, value);
+	RTUSBWriteMACRegister(pAd, 0x404, 0x30);
+	/*RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS);			*/
+	DBGPRINT_RAW(RT_DEBUG_ERROR, ("Sleep Mailbox testvalue %x\n", value));
+	
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+	
+	IRQL = 
+	
+	Note:
+	
+	========================================================================
+*/
+NTSTATUS RTUSBWakeUp(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	NTSTATUS	Status;
+	
+	Status = RTUSB_VendorRequest(
+		pAd,
+		USBD_TRANSFER_DIRECTION_OUT,
+		DEVICE_VENDOR_REQUEST_OUT,
+		0x01,
+		0x09,
+		0,
+		NULL,
+		0);
+	
+	return Status;
+}
+
+/*
+	========================================================================
+	
+	Routine Description:
+
+	Arguments:
+
+	Return Value:
+	
+	IRQL = 
+	
+	Note:
+	
+	========================================================================
+*/
+NDIS_STATUS	RTUSBEnqueueCmdFromNdis(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	NDIS_OID		Oid,
+	IN	BOOLEAN			SetInformation,
+	IN	PVOID			pInformationBuffer,
+	IN	UINT32			InformationBufferLength)
+{
+	NDIS_STATUS	status;
+	PCmdQElmt	cmdqelmt = NULL;
+	RTMP_OS_TASK	*pTask = &pAd->cmdQTask;
+
+
+	RTMP_OS_TASK_LEGALITY(pTask)
+		;
+	else
+		return (NDIS_STATUS_RESOURCES);
+
+	status = os_alloc_mem(pAd, (PUCHAR *)(&cmdqelmt), sizeof(CmdQElmt));
+	if ((status != NDIS_STATUS_SUCCESS) || (cmdqelmt == NULL))
+		return (NDIS_STATUS_RESOURCES);
+
+		cmdqelmt->buffer = NULL;
+		if (pInformationBuffer != NULL)
+		{	
+			status = os_alloc_mem(pAd, (PUCHAR *)&cmdqelmt->buffer, InformationBufferLength);
+			if ((status != NDIS_STATUS_SUCCESS) || (cmdqelmt->buffer == NULL))
+			{       
+/*				kfree(cmdqelmt);*/
+				os_free_mem(NULL, cmdqelmt);
+				return (NDIS_STATUS_RESOURCES);
+			}
+			else
+			{
+				NdisMoveMemory(cmdqelmt->buffer, pInformationBuffer, InformationBufferLength);
+				cmdqelmt->bufferlength = InformationBufferLength;
+			}
+		}
+		else
+			cmdqelmt->bufferlength = 0;
+	
+	cmdqelmt->command = Oid;
+	cmdqelmt->CmdFromNdis = TRUE;
+	if (SetInformation == TRUE)
+		cmdqelmt->SetOperation = TRUE;
+	else
+		cmdqelmt->SetOperation = FALSE;
+
+	NdisAcquireSpinLock(&pAd->CmdQLock);
+	if (pAd->CmdQ.CmdQState & RTMP_TASK_CAN_DO_INSERT)
+	{
+		EnqueueCmd((&pAd->CmdQ), cmdqelmt);
+		status = NDIS_STATUS_SUCCESS;
+	}
+	else
+	{
+		status = NDIS_STATUS_FAILURE;
+	}
+	NdisReleaseSpinLock(&pAd->CmdQLock);
+	
+	if (status == NDIS_STATUS_FAILURE)
+	{
+		if (cmdqelmt->buffer)
+			os_free_mem(pAd, cmdqelmt->buffer);
+		os_free_mem(pAd, cmdqelmt);
+	}
+	else
+	RTCMDUp(&pAd->cmdQTask);
+
+
+    return(NDIS_STATUS_SUCCESS);
+}
+
+
+/*
+    ========================================================================
+ 	Routine Description:
+		RTUSB_VendorRequest - Builds a ralink specific request, sends it off to USB endpoint zero and waits for completion
+
+	Arguments:
+		@pAd:
+	  	@TransferFlags:
+	  	@RequestType: USB message request type value
+	  	@Request: USB message request value
+	  	@Value: USB message value
+	  	@Index: USB message index value
+	  	@TransferBuffer: USB data to be sent
+	  	@TransferBufferLength: Lengths in bytes of the data to be sent
+
+	Context: ! in atomic context
+
+	Return Value:
+		NDIS_STATUS_SUCCESS
+		NDIS_STATUS_FAILURE
+	
+	Note:
+		This function sends a simple control message to endpoint zero
+		and waits for the message to complete, or CONTROL_TIMEOUT_JIFFIES timeout.
+		Because it is synchronous transfer, so don't use this function within an atomic context, 
+		otherwise system will hang, do be careful.
+
+		TransferBuffer may located in stack region which may not in DMA'able region in some embedded platforms, 
+		so need to copy TransferBuffer to UsbVendorReqBuf allocated by kmalloc to do DMA transfer.
+		Use UsbVendorReq_semaphore to protect this region which may be accessed by multi task.
+		Normally, coherent issue is resloved by low-level HC driver, so do not flush this zone by RTUSB_VendorRequest.
+	
+	========================================================================
+*/
+NTSTATUS    RTUSB_VendorRequest(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UINT32			TransferFlags,
+	IN	UCHAR			RequestType,
+	IN	UCHAR			Request,
+	IN	USHORT			Value,
+	IN	USHORT			Index,
+	IN	PVOID			TransferBuffer,
+	IN	UINT32			TransferBufferLength)
+{
+	int				RET = 0;
+	POS_COOKIE		pObj = (POS_COOKIE) pAd->OS_Cookie;
+	
+	if(in_interrupt())
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("BUG: RTUSB_VendorRequest is called from invalid context\n"));
+		return NDIS_STATUS_FAILURE;
+	}
+
+#ifdef CONFIG_STA_SUPPORT	
+#ifdef CONFIG_PM
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND
+	if(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_SUSPEND))
+	{
+		return NDIS_STATUS_FAILURE;
+	}
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */
+#endif /* CONFIG_PM */
+#endif /* CONFIG_STA_SUPPORT */
+	
+	if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))
+	{
+		/*DBGPRINT(RT_DEBUG_ERROR, ("WIFI device has been disconnected\n"));*/
+		return NDIS_STATUS_FAILURE;
+	}
+	else
+	{
+
+		int RetryCount = 0; /* RTUSB_CONTROL_MSG retry counts*/
+		ASSERT(TransferBufferLength <MAX_PARAM_BUFFER_SIZE);
+		
+		RTMP_SEM_EVENT_WAIT(&(pAd->UsbVendorReq_semaphore), RET);
+		if (RET != 0)
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("UsbVendorReq_semaphore get failed\n"));
+			return NDIS_STATUS_FAILURE;
+		}
+		
+		if ((TransferBufferLength > 0) && (RequestType == DEVICE_VENDOR_REQUEST_OUT))
+				NdisMoveMemory(pAd->UsbVendorReqBuf, TransferBuffer, TransferBufferLength);
+
+		do {
+			RTUSB_CONTROL_MSG(pObj->pUsb_Dev, 0, Request, RequestType, Value, Index, pAd->UsbVendorReqBuf, TransferBufferLength, CONTROL_TIMEOUT_JIFFIES, RET);
+			
+			if (RET < 0) {
+				DBGPRINT(RT_DEBUG_OFF, ("#\n"));
+				if (RET == RTMP_USB_CONTROL_MSG_ENODEV)
+				{					
+					RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST);					
+					break;				
+				}
+				RetryCount++;
+				RTMPusecDelay(5000); /* wait for 5ms*/
+			}
+		} while((RET < 0) && (RetryCount < MAX_VENDOR_REQ_RETRY_COUNT));
+		
+	  	if ( (!(RET < 0)) && (TransferBufferLength > 0) && (RequestType == DEVICE_VENDOR_REQUEST_IN))
+			NdisMoveMemory(TransferBuffer, pAd->UsbVendorReqBuf, TransferBufferLength);
+		
+	  	RTMP_SEM_EVENT_UP(&(pAd->UsbVendorReq_semaphore));
+
+        	if (RET < 0) {
+			DBGPRINT(RT_DEBUG_ERROR, ("RTUSB_VendorRequest failed(%d),TxFlags=0x%x, ReqType=%s, Req=0x%x, Idx=0x%x,pAd->Flags=0x%lx\n",
+						RET, TransferFlags, (RequestType == DEVICE_VENDOR_REQUEST_OUT ? "OUT" : "IN"), Request, Index, pAd->Flags));
+			if (Request == 0x2)
+				DBGPRINT(RT_DEBUG_ERROR, ("\tRequest Value=0x%04x!\n", Value));
+			
+			if ((!TransferBuffer) && (TransferBufferLength > 0))
+				hex_dump("Failed TransferBuffer value", TransferBuffer, TransferBufferLength);
+
+			if (RET == RTMP_USB_CONTROL_MSG_ENODEV)
+					RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST);
+			
+		}
+
+	}
+
+	if (RET < 0)
+		return NDIS_STATUS_FAILURE;
+	else
+		return NDIS_STATUS_SUCCESS;
+	
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+	  Creates an IRP to submite an IOCTL_INTERNAL_USB_RESET_PORT
+	  synchronously. Callers of this function must be running at
+	  PASSIVE LEVEL.
+
+	Arguments:
+
+	Return Value:
+
+	Note:
+	
+	========================================================================
+*/
+NTSTATUS RTUSB_ResetDevice(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	NTSTATUS		Status = TRUE;
+
+	DBGPRINT_RAW(RT_DEBUG_TRACE, ("--->USB_ResetDevice\n"));
+	/*RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS);*/
+	return Status;
+}
+
+
+NTSTATUS CheckGPIOHdlr(IN PRTMP_ADAPTER pAd, IN PCmdQElmt CMDQelmt)
+{
+
+#ifdef RALINK_ATE			
+		if (ATE_ON(pAd))
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("The driver is in ATE mode now\n"));
+			return NDIS_STATUS_SUCCESS;
+		}	
+#endif /* RALINK_ATE */
+
+#ifdef CONFIG_STA_SUPPORT
+
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			UINT32 data;
+			/* Read GPIO pin2 as Hardware controlled radio state*/
+
+			RTUSBReadMACRegister( pAd, GPIO_CTRL_CFG, &data);
+
+			if (data & 0x04)
+			{
+				pAd->StaCfg.bHwRadio = TRUE;                                                                                                            
+			} 
+			else
+			{
+				pAd->StaCfg.bHwRadio = FALSE;                                                                                                           
+			}                                                                                                                                               
+	        	                                                                                                                                                        
+			if (pAd->StaCfg.bRadio != (pAd->StaCfg.bHwRadio && pAd->StaCfg.bSwRadio))                                                                    
+			{                                                                                                                                               
+				pAd->StaCfg.bRadio = (pAd->StaCfg.bHwRadio && pAd->StaCfg.bSwRadio);                                                                    
+				if (pAd->StaCfg.bRadio == TRUE)                                                                                                          
+				{                                                                                                                                           
+					DBGPRINT_RAW(RT_DEBUG_ERROR, ("!!! Radio On !!!\n"));  
+	                                                                                                                            
+					MlmeRadioOn(pAd);                                                                                                                       
+					/* Update extra information                                                                                                             */
+					pAd->ExtraInfo = EXTRA_INFO_CLEAR;                                                                                                      
+				}                                                                                                                                           
+				else                                                                                                                                        
+				{                                                                                                                                           
+					DBGPRINT_RAW(RT_DEBUG_ERROR, ("!!! Radio Off !!!\n"));
+	                                                                                                                                    
+					MlmeRadioOff(pAd);                                                                                                                      
+					/* Update extra information                                                                                                             */
+					pAd->ExtraInfo = HW_RADIO_OFF;                                                                                                          
+				}                                                                                                                                           
+			}
+		} /* end IF_DEV_CONFIG_OPMODE_ON_STA*/
+	
+#endif /* CONFIG_STA_SUPPORT */
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static NTSTATUS ResetBulkOutHdlr(IN PRTMP_ADAPTER pAd, IN PCmdQElmt CMDQelmt)
+{
+
+	INT32 MACValue = 0;
+	UCHAR Index = 0;
+	int ret=0;
+	PHT_TX_CONTEXT	pHTTXContext;
+/*	RTMP_TX_RING *pTxRing;*/
+	unsigned long IrqFlags;
+						
+	DBGPRINT(RT_DEBUG_TRACE, ("CMDTHREAD_RESET_BULK_OUT(ResetPipeid=0x%0x)===>\n", pAd->bulkResetPipeid));
+	
+	/* All transfers must be aborted or cancelled before attempting to reset the pipe.						*/
+	/*RTUSBCancelPendingBulkOutIRP(pAd);*/
+	/* Wait 10ms to let previous packet that are already in HW FIFO to clear. by MAXLEE 12-25-2007*/
+	do 
+	{
+		if(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))								
+			break;
+		
+		RTUSBReadMACRegister(pAd, TXRXQ_PCNT, &MACValue);
+		if ((MACValue & 0xf00000/*0x800000*/) == 0)
+			break;
+		
+		Index++;
+		RTMPusecDelay(10000);
+	}while(Index < 100);
+	
+	RTUSBReadMACRegister(pAd, USB_DMA_CFG, &MACValue);
+	
+	/* 2nd, to prevent Read Register error, we check the validity.*/
+	if ((MACValue & 0xc00000) == 0)
+		RTUSBReadMACRegister(pAd, USB_DMA_CFG, &MACValue);
+	
+	/* 3rd, to prevent Read Register error, we check the validity.*/
+	if ((MACValue & 0xc00000) == 0)
+		RTUSBReadMACRegister(pAd, USB_DMA_CFG, &MACValue);
+	
+	MACValue |= 0x80000;
+	RTUSBWriteMACRegister(pAd, USB_DMA_CFG, MACValue);
+
+	/* Wait 1ms to prevent next URB to bulkout before HW reset. by MAXLEE 12-25-2007*/
+	RTMPusecDelay(1000);
+
+	MACValue &= (~0x80000);
+	RTUSBWriteMACRegister(pAd, USB_DMA_CFG, MACValue);
+	DBGPRINT(RT_DEBUG_TRACE, ("\tSet 0x2a0 bit19. Clear USB DMA TX path\n"));
+						
+	/* Wait 5ms to prevent next URB to bulkout before HW reset. by MAXLEE 12-25-2007*/
+	/*RTMPusecDelay(5000);*/
+
+	if ((pAd->bulkResetPipeid & BULKOUT_MGMT_RESET_FLAG) == BULKOUT_MGMT_RESET_FLAG)
+	{
+		RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_BULKOUT_RESET);
+		
+		if (pAd->MgmtRing.TxSwFreeIdx < MGMT_RING_SIZE /* pMLMEContext->bWaitingBulkOut == TRUE */)
+			RTUSB_SET_BULK_FLAG(pAd, fRTUSB_BULK_OUT_MLME);
+		
+		RTUSBKickBulkOut(pAd);	
+		DBGPRINT(RT_DEBUG_TRACE, ("\tTX MGMT RECOVER Done!\n"));
+	}
+	else
+	{
+		pHTTXContext = &(pAd->TxContext[pAd->bulkResetPipeid]);
+		
+		/*NdisAcquireSpinLock(&pAd->BulkOutLock[pAd->bulkResetPipeid]);*/
+		RTMP_INT_LOCK(&pAd->BulkOutLock[pAd->bulkResetPipeid], IrqFlags);
+		if ( pAd->BulkOutPending[pAd->bulkResetPipeid] == FALSE)
+		{
+			pAd->BulkOutPending[pAd->bulkResetPipeid] = TRUE;
+			pHTTXContext->IRPPending = TRUE;
+			pAd->watchDogTxPendingCnt[pAd->bulkResetPipeid] = 1;
+								
+			/* no matter what, clean the flag*/
+			RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_BULKOUT_RESET);
+								
+			/*NdisReleaseSpinLock(&pAd->BulkOutLock[pAd->bulkResetPipeid]);*/
+			RTMP_INT_UNLOCK(&pAd->BulkOutLock[pAd->bulkResetPipeid], IrqFlags);
+			
+#ifdef RALINK_ATE
+			if (ATE_ON(pAd))				
+				ret = ATEResetBulkOut(pAd);
+			else
+#endif /* RALINK_ATE */
+			{
+				RTUSBInitHTTxDesc(pAd, pHTTXContext, pAd->bulkResetPipeid, 
+													pHTTXContext->BulkOutSize, 
+													RtmpUsbBulkOutDataPacketComplete);
+				
+				if ((ret = RTUSB_SUBMIT_URB(pHTTXContext->pUrb))!=0)
+				{
+						RTMP_INT_LOCK(&pAd->BulkOutLock[pAd->bulkResetPipeid], IrqFlags);
+						pAd->BulkOutPending[pAd->bulkResetPipeid] = FALSE;
+						pHTTXContext->IRPPending = FALSE;
+						pAd->watchDogTxPendingCnt[pAd->bulkResetPipeid] = 0;
+						RTMP_INT_UNLOCK(&pAd->BulkOutLock[pAd->bulkResetPipeid], IrqFlags);
+
+						DBGPRINT(RT_DEBUG_ERROR, ("CMDTHREAD_RESET_BULK_OUT:Submit Tx URB failed %d\n", ret));
+				} 
+				else
+				{
+						RTMP_INT_LOCK(&pAd->BulkOutLock[pAd->bulkResetPipeid], IrqFlags);
+						
+						DBGPRINT(RT_DEBUG_TRACE,("\tCMDTHREAD_RESET_BULK_OUT: TxContext[%d]:CWPos=%ld, NBPos=%ld, ENBPos=%ld, bCopy=%d, pending=%d!\n", 
+											pAd->bulkResetPipeid, pHTTXContext->CurWritePosition, pHTTXContext->NextBulkOutPosition, 
+											pHTTXContext->ENextBulkOutPosition, pHTTXContext->bCopySavePad, 
+											pAd->BulkOutPending[pAd->bulkResetPipeid]));
+						DBGPRINT(RT_DEBUG_TRACE,("\t\tBulkOut Req=0x%lx, Complete=0x%lx, Other=0x%lx\n", 
+											pAd->BulkOutReq, pAd->BulkOutComplete, pAd->BulkOutCompleteOther));
+						
+						RTMP_INT_UNLOCK(&pAd->BulkOutLock[pAd->bulkResetPipeid], IrqFlags);
+						
+						DBGPRINT(RT_DEBUG_TRACE, ("\tCMDTHREAD_RESET_BULK_OUT: Submit Tx DATA URB for failed BulkReq(0x%lx) Done, status=%d!\n", 
+											pAd->bulkResetReq[pAd->bulkResetPipeid], 
+											RTMP_USB_URB_STATUS_GET(pHTTXContext->pUrb)));
+				}
+			}
+		}
+		else
+		{
+			/*NdisReleaseSpinLock(&pAd->BulkOutLock[pAd->bulkResetPipeid]);*/
+			/*RTMP_INT_UNLOCK(&pAd->BulkOutLock[pAd->bulkResetPipeid], IrqFlags);*/
+								
+			DBGPRINT(RT_DEBUG_ERROR, ("CmdThread : TX DATA RECOVER FAIL for BulkReq(0x%lx) because BulkOutPending[%d] is TRUE!\n", 
+								pAd->bulkResetReq[pAd->bulkResetPipeid], pAd->bulkResetPipeid));
+			
+			if (pAd->bulkResetPipeid == 0)
+			{
+				UCHAR	pendingContext = 0;
+				PHT_TX_CONTEXT pHTTXContext = (PHT_TX_CONTEXT)(&pAd->TxContext[pAd->bulkResetPipeid ]);
+				PTX_CONTEXT pMLMEContext = (PTX_CONTEXT)(pAd->MgmtRing.Cell[pAd->MgmtRing.TxDmaIdx].AllocVa);
+				PTX_CONTEXT pNULLContext = (PTX_CONTEXT)(&pAd->PsPollContext);
+				PTX_CONTEXT pPsPollContext = (PTX_CONTEXT)(&pAd->NullContext);
+
+				if (pHTTXContext->IRPPending)
+					pendingContext |= 1;
+				else if (pMLMEContext->IRPPending)
+					pendingContext |= 2;
+				else if (pNULLContext->IRPPending)
+					pendingContext |= 4;
+				else if (pPsPollContext->IRPPending)
+					pendingContext |= 8;
+				else
+					pendingContext = 0;
+									
+				DBGPRINT(RT_DEBUG_ERROR, ("\tTX Occupied by %d!\n", pendingContext));
+			}
+
+			/* no matter what, clean the flag*/
+			RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_BULKOUT_RESET);
+
+			RTMP_INT_UNLOCK(&pAd->BulkOutLock[pAd->bulkResetPipeid], IrqFlags);
+								
+			RTUSB_SET_BULK_FLAG(pAd, (fRTUSB_BULK_OUT_DATA_NORMAL << pAd->bulkResetPipeid));
+		}
+
+		RTMPDeQueuePacket(pAd, FALSE, NUM_OF_TX_RING, MAX_TX_PROCESS);
+		/*RTUSBKickBulkOut(pAd);*/
+	}
+	
+	DBGPRINT_RAW(RT_DEBUG_TRACE, ("CmdThread : CMDTHREAD_RESET_BULK_OUT<===\n"));
+	return NDIS_STATUS_SUCCESS;
+
+
+}
+
+
+/* All transfers must be aborted or cancelled before attempting to reset the pipe.*/
+static NTSTATUS ResetBulkInHdlr(IN PRTMP_ADAPTER pAd, IN PCmdQElmt CMDQelmt)
+{
+	UINT32 MACValue;
+	NTSTATUS ntStatus;
+	
+	DBGPRINT_RAW(RT_DEBUG_TRACE, ("CmdThread : CMDTHREAD_RESET_BULK_IN === >\n"));
+
+#ifdef CONFIG_STA_SUPPORT
+	if(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF))
+	{
+		RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_BULKIN_RESET);
+		return NDIS_STATUS_SUCCESS;
+	}
+#endif /* CONFIG_STA_SUPPORT */
+	
+#ifdef RALINK_ATE
+	if (ATE_ON(pAd))
+		ATEResetBulkIn(pAd);
+	else
+#endif /* RALINK_ATE */
+	{
+		/*while ((atomic_read(&pAd->PendingRx) > 0) && (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))) */
+		if((pAd->PendingRx > 0) && (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)))
+		{
+			DBGPRINT_RAW(RT_DEBUG_ERROR, ("BulkIn IRP Pending!!!\n"));
+			RTUSBCancelPendingBulkInIRP(pAd);
+			RTMPusecDelay(100000);
+			pAd->PendingRx = 0;
+		}
+	}						
+						
+	/* Wait 10ms before reading register.*/
+	RTMPusecDelay(10000);
+	ntStatus = RTUSBReadMACRegister(pAd, MAC_CSR0, &MACValue);
+
+	if ((NT_SUCCESS(ntStatus) == TRUE) && 
+				(!(RTMP_TEST_FLAG(pAd, (fRTMP_ADAPTER_RESET_IN_PROGRESS | fRTMP_ADAPTER_RADIO_OFF | 
+												fRTMP_ADAPTER_HALT_IN_PROGRESS | fRTMP_ADAPTER_NIC_NOT_EXIST)))))
+	{		
+		UCHAR	i;
+
+		if (RTMP_TEST_FLAG(pAd, (fRTMP_ADAPTER_RESET_IN_PROGRESS | fRTMP_ADAPTER_RADIO_OFF | 
+									fRTMP_ADAPTER_HALT_IN_PROGRESS | fRTMP_ADAPTER_NIC_NOT_EXIST)))
+			return NDIS_STATUS_SUCCESS;
+		
+		pAd->NextRxBulkInPosition = pAd->RxContext[pAd->NextRxBulkInIndex].BulkInOffset;
+		
+		DBGPRINT(RT_DEBUG_TRACE, ("BULK_IN_RESET: NBIIdx=0x%x,NBIRIdx=0x%x, BIRPos=0x%lx. BIReq=x%lx, BIComplete=0x%lx, BICFail0x%lx\n", 
+					pAd->NextRxBulkInIndex,  pAd->NextRxBulkInReadIndex, pAd->NextRxBulkInPosition, pAd->BulkInReq, pAd->BulkInComplete, pAd->BulkInCompleteFail));
+		
+		for (i = 0; i < RX_RING_SIZE; i++)
+		{
+ 			DBGPRINT(RT_DEBUG_TRACE, ("\tRxContext[%d]: IRPPending=%d, InUse=%d, Readable=%d!\n"
+							, i, pAd->RxContext[i].IRPPending, pAd->RxContext[i].InUse, pAd->RxContext[i].Readable));
+		}
+		
+		RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_BULKIN_RESET);
+		
+		for (i = 0; i < pAd->CommonCfg.NumOfBulkInIRP; i++)
+		{
+			/*RTUSBBulkReceive(pAd);*/
+			PRX_CONTEXT		pRxContext;
+			PURB			pUrb;
+			int				ret = 0;
+			unsigned long	IrqFlags;
+
+			RTMP_IRQ_LOCK(&pAd->BulkInLock, IrqFlags);
+			pRxContext = &(pAd->RxContext[pAd->NextRxBulkInIndex]);
+			
+			if ((pAd->PendingRx > 0) || (pRxContext->Readable == TRUE) || (pRxContext->InUse == TRUE))
+			{
+				RTMP_IRQ_UNLOCK(&pAd->BulkInLock, IrqFlags);
+				return NDIS_STATUS_SUCCESS;
+			}
+			
+			pRxContext->InUse = TRUE;
+			pRxContext->IRPPending = TRUE;
+			pAd->PendingRx++;
+			pAd->BulkInReq++;
+			RTMP_IRQ_UNLOCK(&pAd->BulkInLock, IrqFlags);
+
+			/* Init Rx context descriptor*/
+			RTUSBInitRxDesc(pAd, pRxContext);
+			pUrb = pRxContext->pUrb;
+			if ((ret = RTUSB_SUBMIT_URB(pUrb))!=0)
+			{	/* fail*/
+				RTMP_IRQ_LOCK(&pAd->BulkInLock, IrqFlags);
+				pRxContext->InUse = FALSE;
+				pRxContext->IRPPending = FALSE;
+				pAd->PendingRx--;
+				pAd->BulkInReq--;
+				RTMP_IRQ_UNLOCK(&pAd->BulkInLock, IrqFlags);
+				DBGPRINT(RT_DEBUG_ERROR, ("CMDTHREAD_RESET_BULK_IN: Submit Rx URB failed(%d), status=%d\n", ret, RTMP_USB_URB_STATUS_GET(pUrb)));
+			}
+			else
+			{	/* success*/
+				/*DBGPRINT(RT_DEBUG_TRACE, ("BIDone, Pend=%d,BIIdx=%d,BIRIdx=%d!\n", */
+				/*							pAd->PendingRx, pAd->NextRxBulkInIndex, pAd->NextRxBulkInReadIndex));*/
+				DBGPRINT_RAW(RT_DEBUG_TRACE, ("CMDTHREAD_RESET_BULK_IN: Submit Rx URB Done, status=%d!\n", RTMP_USB_URB_STATUS_GET(pUrb)));
+				ASSERT((pRxContext->InUse == pRxContext->IRPPending));
+			}
+		}					
+
+	}
+	else
+	{
+		/* Card must be removed*/
+		if (NT_SUCCESS(ntStatus) != TRUE)
+		{
+			RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST);
+			DBGPRINT_RAW(RT_DEBUG_ERROR, ("CMDTHREAD_RESET_BULK_IN: Read Register Failed!Card must be removed!!\n\n"));
+		}
+		else
+			DBGPRINT_RAW(RT_DEBUG_ERROR, ("CMDTHREAD_RESET_BULK_IN: Cannot do bulk in because flags(0x%lx) on !\n", pAd->Flags));
+	}
+
+	DBGPRINT_RAW(RT_DEBUG_TRACE, ("CmdThread : CMDTHREAD_RESET_BULK_IN <===\n"));
+	return NDIS_STATUS_SUCCESS;
+}                                                                                                                                                   
+
+
+static NTSTATUS SetAsicWcidHdlr(IN PRTMP_ADAPTER pAd, IN PCmdQElmt CMDQelmt)
+{
+	RT_SET_ASIC_WCID	SetAsicWcid;
+	USHORT		offset;
+	UINT32		MACValue, MACRValue = 0;
+	SetAsicWcid = *((PRT_SET_ASIC_WCID)(CMDQelmt->buffer));
+						
+	if (SetAsicWcid.WCID >= MAX_LEN_OF_MAC_TABLE)
+		return NDIS_STATUS_FAILURE;
+						
+	offset = MAC_WCID_BASE + ((UCHAR)SetAsicWcid.WCID)*HW_WCID_ENTRY_SIZE;
+
+	DBGPRINT_RAW(RT_DEBUG_TRACE, ("CmdThread : CMDTHREAD_SET_ASIC_WCID : WCID = %ld, SetTid  = %lx, DeleteTid = %lx.\n", 
+						SetAsicWcid.WCID, SetAsicWcid.SetTid, SetAsicWcid.DeleteTid));
+	
+	MACValue = (pAd->MacTab.Content[SetAsicWcid.WCID].Addr[3]<<24)+(pAd->MacTab.Content[SetAsicWcid.WCID].Addr[2]<<16)+(pAd->MacTab.Content[SetAsicWcid.WCID].Addr[1]<<8)+(pAd->MacTab.Content[SetAsicWcid.WCID].Addr[0]);
+
+	DBGPRINT_RAW(RT_DEBUG_TRACE, ("1-MACValue= %x,\n", MACValue));
+	RTUSBWriteMACRegister(pAd, offset, MACValue);
+	/* Read bitmask*/
+	RTUSBReadMACRegister(pAd, offset+4, &MACRValue);
+	if ( SetAsicWcid.DeleteTid != 0xffffffff)
+		MACRValue &= (~SetAsicWcid.DeleteTid);
+	if (SetAsicWcid.SetTid != 0xffffffff)
+		MACRValue |= (SetAsicWcid.SetTid);
+	
+	MACRValue &= 0xffff0000;	
+	MACValue = (pAd->MacTab.Content[SetAsicWcid.WCID].Addr[5]<<8)+pAd->MacTab.Content[SetAsicWcid.WCID].Addr[4];
+	MACValue |= MACRValue;
+	RTUSBWriteMACRegister(pAd, offset+4, MACValue);
+						
+	DBGPRINT_RAW(RT_DEBUG_TRACE, ("2-MACValue= %x,\n", MACValue));
+	
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static NTSTATUS SetWcidSecInfoHdlr(IN PRTMP_ADAPTER pAd, IN PCmdQElmt CMDQelmt)
+{
+	PRT_ASIC_WCID_SEC_INFO pInfo;
+
+	pInfo = (PRT_ASIC_WCID_SEC_INFO)CMDQelmt->buffer;
+	RTMPSetWcidSecurityInfo(pAd, 
+							 pInfo->BssIdx, 
+							 pInfo->KeyIdx, 
+							 pInfo->CipherAlg, 
+							 pInfo->Wcid, 
+							 pInfo->KeyTabFlag);
+	
+	return NDIS_STATUS_SUCCESS;	
+}
+
+
+static NTSTATUS SetAsicWcidIVEIVHdlr(IN PRTMP_ADAPTER pAd, IN PCmdQElmt CMDQelmt)
+{
+	PRT_ASIC_WCID_IVEIV_ENTRY pInfo;
+
+	pInfo = (PRT_ASIC_WCID_IVEIV_ENTRY)CMDQelmt->buffer;
+	AsicUpdateWCIDIVEIV(pAd, 
+						  pInfo->Wcid, 
+						  pInfo->Iv, 
+						  pInfo->Eiv);
+						
+	return NDIS_STATUS_SUCCESS;	
+}
+
+
+static NTSTATUS SetAsicWcidAttrHdlr(IN PRTMP_ADAPTER pAd, IN PCmdQElmt CMDQelmt)
+{
+	PRT_ASIC_WCID_ATTR_ENTRY pInfo;
+
+	pInfo = (PRT_ASIC_WCID_ATTR_ENTRY)CMDQelmt->buffer;
+	AsicUpdateWcidAttributeEntry(pAd, 
+								  pInfo->BssIdx, 
+								  pInfo->KeyIdx, 
+								  pInfo->CipherAlg, 
+								  pInfo->Wcid, 
+								  pInfo->KeyTabFlag);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+static NTSTATUS SETAsicSharedKeyHdlr(IN PRTMP_ADAPTER pAd, IN PCmdQElmt CMDQelmt)
+{
+	PRT_ASIC_SHARED_KEY pInfo;
+
+	pInfo = (PRT_ASIC_SHARED_KEY)CMDQelmt->buffer;
+	AsicAddSharedKeyEntry(pAd, 
+						       pInfo->BssIndex, 
+							pInfo->KeyIdx, 
+							&pInfo->CipherKey);
+	
+	return NDIS_STATUS_SUCCESS;
+}
+
+static NTSTATUS SetAsicPairwiseKeyHdlr(IN PRTMP_ADAPTER pAd, IN PCmdQElmt CMDQelmt)
+{
+	PRT_ASIC_PAIRWISE_KEY pInfo;
+
+	pInfo = (PRT_ASIC_PAIRWISE_KEY)CMDQelmt->buffer;
+	AsicAddPairwiseKeyEntry(pAd, 
+							 pInfo->WCID, 
+							 &pInfo->CipherKey);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+#ifdef CONFIG_STA_SUPPORT
+static NTSTATUS SetPortSecuredHdlr(IN PRTMP_ADAPTER pAd, IN PCmdQElmt CMDQelmt)
+{
+	STA_PORT_SECURED(pAd);
+	return NDIS_STATUS_SUCCESS;
+}
+#endif /* CONFIG_STA_SUPPORT */
+
+
+static NTSTATUS RemovePairwiseKeyHdlr(IN PRTMP_ADAPTER pAd, IN PCmdQElmt CMDQelmt)
+{
+	UCHAR Wcid = *((PUCHAR)(CMDQelmt->buffer));	
+
+	AsicRemovePairwiseKeyEntry(pAd, Wcid);		
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static NTSTATUS SetClientMACEntryHdlr(IN PRTMP_ADAPTER pAd, IN PCmdQElmt CMDQelmt)
+{
+	PRT_SET_ASIC_WCID pInfo;
+
+	pInfo = (PRT_SET_ASIC_WCID)CMDQelmt->buffer;						
+	AsicUpdateRxWCIDTable(pAd, pInfo->WCID, pInfo->Addr);
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/* add by johnli, fix "in_interrupt" error when call "MacTableDeleteEntry" in Rx tasklet*/
+static NTSTATUS UpdateProtectHdlr(IN PRTMP_ADAPTER pAd, IN PCmdQElmt CMDQelmt)
+{	
+	AsicUpdateProtect(pAd, 0, (ALLN_SETPROTECT), TRUE, 0);
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/* end johnli*/
+
+
+
+
+#ifdef CONFIG_STA_SUPPORT
+static NTSTATUS SetPSMBitHdlr(IN PRTMP_ADAPTER pAd, IN PCmdQElmt CMDQelmt)
+{
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		USHORT *pPsm = (USHORT *)CMDQelmt->buffer;
+		MlmeSetPsmBit(pAd, *pPsm);
+	}
+
+	return NDIS_STATUS_SUCCESS;
+} 
+
+
+static NTSTATUS ForceWakeUpHdlr(IN PRTMP_ADAPTER pAd, IN PCmdQElmt CMDQelmt)
+{
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		AsicForceWakeup(pAd, TRUE);
+	
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+static NTSTATUS ForceSleepAutoWakeupHdlr(IN PRTMP_ADAPTER pAd, IN PCmdQElmt CMDQelmt)
+{
+	USHORT  TbttNumToNextWakeUp;
+	USHORT  NextDtim = pAd->StaCfg.DtimPeriod;
+	ULONG   Now;
+
+	NdisGetSystemUpTime(&Now);
+	NextDtim -= (USHORT)(Now - pAd->StaCfg.LastBeaconRxTime)/pAd->CommonCfg.BeaconPeriod;
+
+	TbttNumToNextWakeUp = pAd->StaCfg.DefaultListenCount;
+	if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM) && (TbttNumToNextWakeUp > NextDtim))
+		TbttNumToNextWakeUp = NextDtim;
+
+	RTMP_SET_PSM_BIT(pAd, PWR_SAVE);
+
+	/* if WMM-APSD is failed, try to disable following line*/
+	AsicSleepThenAutoWakeup(pAd, TbttNumToNextWakeUp);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+NTSTATUS QkeriodicExecutHdlr(IN PRTMP_ADAPTER pAd, IN PCmdQElmt CMDQelmt)
+{
+	StaQuickResponeForRateUpExec(NULL, pAd, NULL, NULL);
+	return NDIS_STATUS_SUCCESS;
+}
+#endif /* CONFIG_STA_SUPPORT*/
+
+
+
+
+#ifdef LED_CONTROL_SUPPORT
+static NTSTATUS SetLEDStatusHdlr(IN PRTMP_ADAPTER pAd, IN PCmdQElmt CMDQelmt)
+{
+	UCHAR LEDStatus = *((PUCHAR)(CMDQelmt->buffer));
+
+	RTMPSetLEDStatus(pAd, LEDStatus);
+						
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: CMDTHREAD_SET_LED_STATUS (LEDStatus = %d)\n", 
+								__FUNCTION__, LEDStatus));	 
+	
+	return NDIS_STATUS_SUCCESS;
+}
+#endif /* LED_CONTROL_SUPPORT */
+
+
+
+
+
+#ifdef LINUX
+#ifdef RT_CFG80211_SUPPORT
+static NTSTATUS RegHintHdlr (IN PRTMP_ADAPTER pAd, IN PCmdQElmt CMDQelmt)
+{
+	RT_CFG80211_CRDA_REG_HINT(pAd, CMDQelmt->buffer, CMDQelmt->bufferlength);
+	return NDIS_STATUS_SUCCESS;
+}
+
+static NTSTATUS RegHint11DHdlr(IN PRTMP_ADAPTER pAd, IN PCmdQElmt CMDQelmt)
+{
+	RT_CFG80211_CRDA_REG_HINT11D(pAd, CMDQelmt->buffer, CMDQelmt->bufferlength);
+	return NDIS_STATUS_SUCCESS;
+}
+
+static NTSTATUS RT_Mac80211_ScanEnd(IN PRTMP_ADAPTER pAd, IN PCmdQElmt CMDQelmt)
+{
+	RT_CFG80211_SCAN_END(pAd, FALSE);
+	return NDIS_STATUS_SUCCESS;
+}
+
+static NTSTATUS RT_Mac80211_ConnResultInfom(IN PRTMP_ADAPTER pAd, IN PCmdQElmt CMDQelmt)
+{
+	RT_CFG80211_CONN_RESULT_INFORM(pAd,
+								pAd->MlmeAux.Bssid,
+								CMDQelmt->buffer, CMDQelmt->bufferlength,
+								CMDQelmt->buffer, CMDQelmt->bufferlength,
+								1);
+	return NDIS_STATUS_SUCCESS;
+}
+#endif /* RT_CFG80211_SUPPORT */
+#endif /* LINUX */
+
+
+typedef NTSTATUS (*CMDHdlr)(IN PRTMP_ADAPTER pAd, IN PCmdQElmt CMDQelmt);
+
+static CMDHdlr CMDHdlrTable[] = {
+	ResetBulkOutHdlr,				/* CMDTHREAD_RESET_BULK_OUT*/
+	ResetBulkInHdlr,					/* CMDTHREAD_RESET_BULK_IN*/
+	CheckGPIOHdlr,					/* CMDTHREAD_CHECK_GPIO	*/
+	SetAsicWcidHdlr,					/* CMDTHREAD_SET_ASIC_WCID*/
+	SetClientMACEntryHdlr,			/* CMDTHREAD_SET_CLIENT_MAC_ENTRY*/
+	
+#ifdef CONFIG_STA_SUPPORT
+	SetPSMBitHdlr,					/* CMDTHREAD_SET_PSM_BIT*/
+	ForceWakeUpHdlr,				/* CMDTHREAD_FORCE_WAKE_UP*/
+	ForceSleepAutoWakeupHdlr,		/* CMDTHREAD_FORCE_SLEEP_AUTO_WAKEUP*/
+	QkeriodicExecutHdlr,				/* CMDTHREAD_QKERIODIC_EXECUT*/
+#else
+	NULL, 
+	NULL, 
+	NULL,
+	NULL,
+#endif /* CONFIG_STA_SUPPORT */
+
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+
+#ifdef LED_CONTROL_SUPPORT
+	SetLEDStatusHdlr,			/* CMDTHREAD_SET_LED_STATUS*/
+#else
+    NULL,
+#endif /* LED_CONTROL_SUPPORT */
+
+	NULL,
+
+	/* Security related */
+	SetWcidSecInfoHdlr,				/* CMDTHREAD_SET_WCID_SEC_INFO*/
+	SetAsicWcidIVEIVHdlr,			/* CMDTHREAD_SET_ASIC_WCID_IVEIV*/
+	SetAsicWcidAttrHdlr,				/* CMDTHREAD_SET_ASIC_WCID_ATTR*/
+	SETAsicSharedKeyHdlr,			/* CMDTHREAD_SET_ASIC_SHARED_KEY*/
+	SetAsicPairwiseKeyHdlr,			/* CMDTHREAD_SET_ASIC_PAIRWISE_KEY*/
+	RemovePairwiseKeyHdlr,			/* CMDTHREAD_REMOVE_PAIRWISE_KEY*/
+
+#ifdef CONFIG_STA_SUPPORT
+	SetPortSecuredHdlr,				/* CMDTHREAD_SET_PORT_SECURED*/
+#else
+	NULL,
+#endif /* CONFIG_STA_SUPPORT */
+
+	NULL,
+
+	UpdateProtectHdlr,				/* CMDTHREAD_UPDATE_PROTECT*/
+	
+
+#ifdef LINUX
+#ifdef RT_CFG80211_SUPPORT
+	RegHintHdlr,
+	RegHint11DHdlr,
+	RT_Mac80211_ScanEnd,
+	RT_Mac80211_ConnResultInfom,
+#else
+	NULL, 
+	NULL,
+	NULL,
+	NULL,
+#endif /* RT_CFG80211_SUPPORT */
+
+#else
+	NULL, 
+	NULL,
+	NULL,
+	NULL,
+#endif /* LINUX */
+
+
+};
+
+
+static inline BOOLEAN ValidCMD(IN PCmdQElmt CMDQelmt)
+{
+	SHORT CMDIndex = CMDQelmt->command - CMDTHREAD_FIRST_CMD_ID;
+	USHORT CMDHdlrTableLength= sizeof(CMDHdlrTable) / sizeof(CMDHdlr);
+	
+	if ( (CMDIndex >= 0) && (CMDIndex < CMDHdlrTableLength))
+	{
+		if (CMDHdlrTable[CMDIndex] > 0)
+			return TRUE;
+		else
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("No corresponding CMDHdlr for this CMD(%x)\n",  CMDQelmt->command));
+			return FALSE;
+		}
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("CMD(%x) is out of boundary\n", CMDQelmt->command));
+		return FALSE;
+	}
+}
+
+
+VOID CMDHandler(                                                                                                                                                
+    IN PRTMP_ADAPTER pAd)                                                                                                                                       
+{                                                                                                                                                               
+	PCmdQElmt		cmdqelmt;                                                                                                                                                                                                                                                                              
+	NDIS_STATUS		NdisStatus = NDIS_STATUS_SUCCESS;                                                                                                               
+	NTSTATUS		ntStatus;
+/*	unsigned long	IrqFlags;*/
+	
+	while (pAd && pAd->CmdQ.size > 0)	
+	{                                                                                                                                                           
+		NdisStatus = NDIS_STATUS_SUCCESS;
+		                                                                                                                      
+		NdisAcquireSpinLock(&pAd->CmdQLock);
+		RTThreadDequeueCmd(&pAd->CmdQ, &cmdqelmt);
+		NdisReleaseSpinLock(&pAd->CmdQLock);
+		                                                                                                        
+		if (cmdqelmt == NULL)                                                                                                                                   
+			break; 
+		
+		                                                                                         
+		if(!(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST) || RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS)))
+		{
+			if(ValidCMD(cmdqelmt))
+				ntStatus = (*CMDHdlrTable[cmdqelmt->command - CMDTHREAD_FIRST_CMD_ID])(pAd, cmdqelmt);
+		}                 
+		
+		if (cmdqelmt->CmdFromNdis == TRUE)
+		{
+			if (cmdqelmt->buffer != NULL)
+				os_free_mem(pAd, cmdqelmt->buffer);
+			os_free_mem(pAd, cmdqelmt);
+		}
+		else
+		{
+			if ((cmdqelmt->buffer != NULL) && (cmdqelmt->bufferlength != 0))
+				os_free_mem(pAd, cmdqelmt->buffer);
+			os_free_mem(pAd, cmdqelmt);
+		}
+	}	/* end of while */
+}
+
+
+VOID RTUSBWatchDog(IN RTMP_ADAPTER *pAd)
+{
+	PHT_TX_CONTEXT		pHTTXContext;
+	int 					idx;
+	ULONG				irqFlags;
+	PURB		   		pUrb;
+	BOOLEAN				needDumpSeq = FALSE;
+	UINT32          	MACValue;
+
+	if(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))		
+		return;
+
+#ifdef CONFIG_STA_SUPPORT
+	if(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF))
+		return;
+#endif /* CONFIG_STA_SUPPORT */
+
+	idx = 0;
+	RTMP_IO_READ32(pAd, TXRXQ_PCNT, &MACValue);
+	if ((MACValue & 0xff) !=0 )
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("TX QUEUE 0 Not EMPTY(Value=0x%0x). !!!!!!!!!!!!!!!\n", MACValue));
+		RTMP_IO_WRITE32(pAd, PBF_CFG, 0xf40012);
+		while((MACValue &0xff) != 0 && (idx++ < 10))
+		{
+		        RTMP_IO_READ32(pAd, TXRXQ_PCNT, &MACValue);
+		        RTMPusecDelay(1);
+		}
+		RTMP_IO_WRITE32(pAd, PBF_CFG, 0xf40006);
+	}
+
+	idx = 0;
+	if ((MACValue & 0xff00) !=0 )
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("TX QUEUE 1 Not EMPTY(Value=0x%0x). !!!!!!!!!!!!!!!\n", MACValue));
+		RTMP_IO_WRITE32(pAd, PBF_CFG, 0xf4000a);
+		while((MACValue &0xff00) != 0 && (idx++ < 10))
+		{
+			RTMP_IO_READ32(pAd, TXRXQ_PCNT, &MACValue);
+			RTMPusecDelay(1);
+		}
+		RTMP_IO_WRITE32(pAd, PBF_CFG, 0xf40006);
+	}
+
+	
+	if (pAd->watchDogRxOverFlowCnt >= 2)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("Maybe the Rx Bulk-In hanged! Cancel the pending Rx bulks request!\n"));
+		if ((!RTMP_TEST_FLAG(pAd, (fRTMP_ADAPTER_RESET_IN_PROGRESS |
+									fRTMP_ADAPTER_BULKIN_RESET |
+									fRTMP_ADAPTER_HALT_IN_PROGRESS |
+									fRTMP_ADAPTER_NIC_NOT_EXIST))))
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("Call CMDTHREAD_RESET_BULK_IN to cancel the pending Rx Bulk!\n"));
+			RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_BULKIN_RESET);
+			RTEnqueueInternalCmd(pAd, CMDTHREAD_RESET_BULK_IN, NULL, 0);
+			needDumpSeq = TRUE;
+		}
+		pAd->watchDogRxOverFlowCnt = 0;
+	}
+
+
+	for (idx = 0; idx < NUM_OF_TX_RING; idx++)
+	{
+		pUrb = NULL;
+		
+		RTMP_IRQ_LOCK(&pAd->BulkOutLock[idx], irqFlags);
+/*		if ((pAd->BulkOutPending[idx] == TRUE) && pAd->watchDogTxPendingCnt)*/
+		if (pAd->BulkOutPending[idx] == TRUE)
+		{
+			pAd->watchDogTxPendingCnt[idx]++;
+
+			if ((pAd->watchDogTxPendingCnt[idx] > 2) && 
+				 (!RTMP_TEST_FLAG(pAd, (fRTMP_ADAPTER_RESET_IN_PROGRESS | fRTMP_ADAPTER_HALT_IN_PROGRESS | fRTMP_ADAPTER_NIC_NOT_EXIST | fRTMP_ADAPTER_BULKOUT_RESET)))
+				)
+			{
+				/* FIXME: Following code just support single bulk out. If you wanna support multiple bulk out. Modify it!*/
+				pHTTXContext = (PHT_TX_CONTEXT)(&pAd->TxContext[idx]);
+				if (pHTTXContext->IRPPending)
+				{	/* Check TxContext.*/
+					pUrb = pHTTXContext->pUrb;
+				}
+				else if (idx == MGMTPIPEIDX)
+				{
+					PTX_CONTEXT pMLMEContext, pNULLContext, pPsPollContext;
+					
+					/*Check MgmtContext.*/
+					pMLMEContext = (PTX_CONTEXT)(pAd->MgmtRing.Cell[pAd->MgmtRing.TxDmaIdx].AllocVa);
+					pPsPollContext = (PTX_CONTEXT)(&pAd->PsPollContext);
+					pNULLContext = (PTX_CONTEXT)(&pAd->NullContext);
+					
+					if (pMLMEContext->IRPPending)
+					{
+						ASSERT(pMLMEContext->IRPPending);
+						pUrb = pMLMEContext->pUrb;
+					}
+					else if (pNULLContext->IRPPending)
+					{	
+						ASSERT(pNULLContext->IRPPending);
+						pUrb = pNULLContext->pUrb;
+					}
+					else if (pPsPollContext->IRPPending)
+					{	
+						ASSERT(pPsPollContext->IRPPending);
+						pUrb = pPsPollContext->pUrb;
+					}
+				}
+				
+				RTMP_IRQ_UNLOCK(&pAd->BulkOutLock[idx], irqFlags);
+				
+				DBGPRINT(RT_DEBUG_TRACE, ("Maybe the Tx Bulk-Out hanged! Cancel the pending Tx bulks request of idx(%d)!\n", idx));
+				if (pUrb)
+				{
+					DBGPRINT(RT_DEBUG_TRACE, ("Unlink the pending URB!\n"));
+					/* unlink it now*/
+					RTUSB_UNLINK_URB(pUrb);
+					/* Sleep 200 microseconds to give cancellation time to work*/
+					RTMPusecDelay(200);
+					needDumpSeq = TRUE;
+				}
+				else
+				{
+					DBGPRINT(RT_DEBUG_ERROR, ("Unkonw bulkOut URB maybe hanged!!!!!!!!!!!!\n"));
+				}
+			}
+			else
+			{
+				RTMP_IRQ_UNLOCK(&pAd->BulkOutLock[idx], irqFlags);
+			}
+		}
+		else
+		{
+			RTMP_IRQ_UNLOCK(&pAd->BulkOutLock[idx], irqFlags);
+		}
+	}
+
+#ifdef DOT11_N_SUPPORT
+	/* For Sigma debug, dump the ba_reordering sequence.*/
+	if((needDumpSeq == TRUE) && (pAd->CommonCfg.bDisableReordering == 0))
+	{
+		USHORT				Idx;
+		PBA_REC_ENTRY		pBAEntry = NULL;
+		UCHAR				count = 0;
+		struct reordering_mpdu *mpdu_blk;
+					
+		Idx = pAd->MacTab.Content[BSSID_WCID].BARecWcidArray[0];
+
+		pBAEntry = &pAd->BATable.BARecEntry[Idx];
+		if((pBAEntry->list.qlen > 0) && (pBAEntry->list.next != NULL))
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("NICUpdateRawCounters():The Queueing pkt in reordering buffer:\n"));
+			NdisAcquireSpinLock(&pBAEntry->RxReRingLock);
+			mpdu_blk = pBAEntry->list.next;
+			while (mpdu_blk)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("\t%d:Seq-%d, bAMSDU-%d!\n", count, mpdu_blk->Sequence, mpdu_blk->bAMSDU));
+				mpdu_blk = mpdu_blk->next;
+				count++;
+			}
+
+			DBGPRINT(RT_DEBUG_TRACE, ("\npBAEntry->LastIndSeq=%d!\n", pBAEntry->LastIndSeq));
+			NdisReleaseSpinLock(&pBAEntry->RxReRingLock);
+		}
+	}
+#endif /* DOT11_N_SUPPORT */
+}
+
+#endif /* RTMP_MAC_USB */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/spectrum.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/spectrum.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/common/spectrum.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/common/spectrum.c	2017-09-23 03:42:49.774675809 +0800
@@ -0,0 +1,2182 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+#include "action.h"
+
+
+/* The regulatory information in the USA (US) */
+DOT11_REGULATORY_INFORMATION USARegulatoryInfo[] = 
+{
+/*  "regulatory class"  "number of channels"  "Max Tx Pwr"  "channel list" */
+    {0,	                {0,                   0,           {0}}}, /* Invlid entry*/
+    {1,                 {4,                   16,           {36, 40, 44, 48}}}, 
+    {2,                 {4,                   23,           {52, 56, 60, 64}}}, 
+    {3,                 {4,                   29,           {149, 153, 157, 161}}}, 
+    {4,                 {11,                  23,           {100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}}}, 
+    {5,                 {5,                   30,           {149, 153, 157, 161, 165}}}, 
+    {6,                 {10,                  14,           {1, 2, 3, 4, 5, 6, 7, 8, 9, 10}}}, 
+    {7,                 {10,                  27,           {1, 2, 3, 4, 5, 6, 7, 8, 9, 10}}}, 
+    {8,                 {5,                   17,           {11, 13, 15, 17, 19}}}, 
+    {9,                 {5,                   30,           {11, 13, 15, 17, 19}}}, 
+    {10,                {2,                   20,           {21, 25}}}, 
+    {11,                {2,                   33,            {21, 25}}}, 
+    {12,                {11,                  30,            {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11}}}
+};
+#define USA_REGULATORY_INFO_SIZE (sizeof(USARegulatoryInfo) / sizeof(DOT11_REGULATORY_INFORMATION))
+
+
+/* The regulatory information in Europe */
+DOT11_REGULATORY_INFORMATION EuropeRegulatoryInfo[] = 
+{
+/*  "regulatory class"  "number of channels"  "Max Tx Pwr"  "channel list" */
+    {0,                 {0,                   0,           {0}}}, /* Invalid entry*/
+    {1,                 {4,                   20,           {36, 40, 44, 48}}}, 
+    {2,                 {4,                   20,           {52, 56, 60, 64}}}, 
+    {3,                 {11,                  30,           {100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}}}, 
+    {4,                 {13,                  20,           {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}}}
+};
+#define EU_REGULATORY_INFO_SIZE (sizeof(EuropeRegulatoryInfo) / sizeof(DOT11_REGULATORY_INFORMATION))
+
+
+/* The regulatory information in Japan */
+DOT11_REGULATORY_INFORMATION JapanRegulatoryInfo[] = 
+{
+/*  "regulatory class"  "number of channels"  "Max Tx Pwr"  "channel list" */
+    {0,                 {0,                   0,           {0}}}, /* Invalid entry*/
+    {1,                 {4,                   22,           {34, 38, 42, 46}}}, 
+    {2,                 {3,                   24,           {8, 12, 16}}}, 
+    {3,                 {3,                   24,           {8, 12, 16}}}, 
+    {4,                 {3,                   24,           {8, 12, 16}}}, 
+    {5,                 {3,                   24,           {8, 12, 16}}}, 
+    {6,                 {3,                   22,           {8, 12, 16}}}, 
+    {7,                 {4,                   24,           {184, 188, 192, 196}}}, 
+    {8,                 {4,                   24,           {184, 188, 192, 196}}}, 
+    {9,                 {4,                   24,           {184, 188, 192, 196}}}, 
+    {10,                {4,                   24,           {184, 188, 192, 196}}}, 
+    {11,                {4,                   22,           {184, 188, 192, 196}}}, 
+    {12,                {4,                   24,           {7, 8, 9, 11}}}, 
+    {13,                {4,                   24,           {7, 8, 9, 11}}}, 
+    {14,                {4,                   24,           {7, 8, 9, 11}}}, 
+    {15,                {4,                   24,           {7, 8, 9, 11}}}, 
+    {16,                {6,                   24,           {183, 184, 185, 187, 188, 189}}}, 
+    {17,                {6,                   24,           {183, 184, 185, 187, 188, 189}}}, 
+    {18,                {6,                   24,           {183, 184, 185, 187, 188, 189}}}, 
+    {19,                {6,                   24,           {183, 184, 185, 187, 188, 189}}}, 
+    {20,                {6,                   17,           {183, 184, 185, 187, 188, 189}}}, 
+    {21,                {6,                   24,           {6, 7, 8, 9, 10, 11}}}, 
+    {22,                {6,                   24,           {6, 7, 8, 9, 10, 11}}}, 
+    {23,                {6,                   24,           {6, 7, 8, 9, 10, 11}}}, 
+    {24,                {6,                   24,           {6, 7, 8, 9, 10, 11}}}, 
+    {25,                {8,                   24,           {182, 183, 184, 185, 186, 187, 188, 189}}}, 
+    {26,                {8,                   24,           {182, 183, 184, 185, 186, 187, 188, 189}}}, 
+    {27,                {8,                   24,           {182, 183, 184, 185, 186, 187, 188, 189}}}, 
+    {28,                {8,                   24,           {182, 183, 184, 185, 186, 187, 188, 189}}}, 
+    {29,                {8,                   17,           {182, 183, 184, 185, 186, 187, 188, 189}}}, 
+    {30,                {13,                  23,           {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}}}, 
+    {31,                {1,                   23,           {14}}}, 
+    {32,                {4,                   22,           {52, 56, 60, 64}}}
+};
+#define JP_REGULATORY_INFO_SIZE (sizeof(JapanRegulatoryInfo) / sizeof(DOT11_REGULATORY_INFORMATION))
+
+
+UINT8 GetRegulatoryMaxTxPwr(
+	IN PRTMP_ADAPTER pAd,
+	IN UINT8 channel)
+{
+	ULONG RegulatoryClassLoop, ChIdx;
+	UINT8 RegulatoryClass;
+	UINT8 MaxRegulatoryClassNum;
+	PDOT11_REGULATORY_INFORMATION pRegulatoryClass;
+	PSTRING pCountry = (PSTRING)(pAd->CommonCfg.CountryCode);
+
+
+	if (strncmp(pCountry, "US", 2) == 0)
+	{
+		MaxRegulatoryClassNum = USA_REGULATORY_INFO_SIZE;
+		pRegulatoryClass = &USARegulatoryInfo[0];
+	}
+	else if (strncmp(pCountry, "JP", 2) == 0)
+	{
+		MaxRegulatoryClassNum = JP_REGULATORY_INFO_SIZE;
+		pRegulatoryClass = &JapanRegulatoryInfo[0];
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: Unknow Country (%s)\n",
+					__FUNCTION__, pCountry));
+		return 0xff;
+	}
+
+	for (RegulatoryClassLoop = 0;
+			RegulatoryClassLoop<MAX_NUM_OF_REGULATORY_CLASS;
+			RegulatoryClassLoop++)
+	{
+		PDOT11_CHANNEL_SET pChannelSet;
+
+		RegulatoryClass = pAd->CommonCfg.RegulatoryClass[RegulatoryClassLoop];
+		if (RegulatoryClass >= MaxRegulatoryClassNum)
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("%s: %c%c Unknow Requlatory class (%d)\n",
+						__FUNCTION__, pCountry[0], pCountry[1], RegulatoryClass));
+			return 0xff;
+		}
+		pChannelSet = &pRegulatoryClass[RegulatoryClass].ChannelSet;
+		for (ChIdx=0; ChIdx<pChannelSet->NumberOfChannels; ChIdx++)
+		{
+			if (channel == pChannelSet->ChannelList[ChIdx])
+				return pChannelSet->MaxTxPwr;
+		
+		}
+		if (ChIdx == pChannelSet->NumberOfChannels)
+			return 0xff;
+	}
+
+	return 0xff;
+}
+
+typedef struct __TX_PWR_CFG
+{
+	UINT8 Mode;
+	UINT8 MCS;
+	UINT16 req;
+	UINT8 shift;
+	UINT32 BitMask;
+} TX_PWR_CFG;
+
+/* Note: the size of TxPwrCfg is too large, do not put it to function */
+TX_PWR_CFG TxPwrCfg[] = {
+	{MODE_CCK, 0, 0, 4, 0x000000f0},
+	{MODE_CCK, 1, 0, 0, 0x0000000f},
+	{MODE_CCK, 2, 0, 12, 0x0000f000},
+	{MODE_CCK, 3, 0, 8, 0x00000f00},
+
+	{MODE_OFDM, 0, 0, 20, 0x00f00000},
+	{MODE_OFDM, 1, 0, 16, 0x000f0000},
+	{MODE_OFDM, 2, 0, 28, 0xf0000000},
+	{MODE_OFDM, 3, 0, 24, 0x0f000000},
+	{MODE_OFDM, 4, 1, 4, 0x000000f0},
+	{MODE_OFDM, 5, 1, 0, 0x0000000f},
+	{MODE_OFDM, 6, 1, 12, 0x0000f000},
+	{MODE_OFDM, 7, 1, 8, 0x00000f00}
+#ifdef DOT11_N_SUPPORT
+	,{MODE_HTMIX, 0, 1, 20, 0x00f00000},
+	{MODE_HTMIX, 1, 1, 16, 0x000f0000},
+	{MODE_HTMIX, 2, 1, 28, 0xf0000000},
+	{MODE_HTMIX, 3, 1, 24, 0x0f000000},
+	{MODE_HTMIX, 4, 2, 4, 0x000000f0},
+	{MODE_HTMIX, 5, 2, 0, 0x0000000f},
+	{MODE_HTMIX, 6, 2, 12, 0x0000f000},
+	{MODE_HTMIX, 7, 2, 8, 0x00000f00},
+	{MODE_HTMIX, 8, 2, 20, 0x00f00000},
+	{MODE_HTMIX, 9, 2, 16, 0x000f0000},
+	{MODE_HTMIX, 10, 2, 28, 0xf0000000},
+	{MODE_HTMIX, 11, 2, 24, 0x0f000000},
+	{MODE_HTMIX, 12, 3, 4, 0x000000f0},
+	{MODE_HTMIX, 13, 3, 0, 0x0000000f},
+	{MODE_HTMIX, 14, 3, 12, 0x0000f000},
+	{MODE_HTMIX, 15, 3, 8, 0x00000f00}
+#endif /* DOT11_N_SUPPORT */
+};
+#define MAX_TXPWR_TAB_SIZE (sizeof(TxPwrCfg) / sizeof(TX_PWR_CFG))
+
+CHAR RTMP_GetTxPwr(
+	IN PRTMP_ADAPTER pAd,
+	IN HTTRANSMIT_SETTING HTTxMode)
+{
+	UINT32 Value;
+	INT Idx;
+	UINT8 PhyMode;
+	CHAR CurTxPwr;
+	UINT8 TxPwrRef = 0;
+	CHAR DaltaPwr;
+	ULONG TxPwr[5];
+
+
+#ifdef SINGLE_SKU
+	CurTxPwr = pAd->CommonCfg.DefineMaxTxPwr;
+#else
+	CurTxPwr = 19;
+#endif
+
+	/* check Tx Power setting from UI. */
+	if (pAd->CommonCfg.TxPowerPercentage > 90)
+		;
+	else if (pAd->CommonCfg.TxPowerPercentage > 60)  /* reduce Pwr for 1 dB. */
+		CurTxPwr -= 1;
+	else if (pAd->CommonCfg.TxPowerPercentage > 30)  /* reduce Pwr for 3 dB. */
+		CurTxPwr -= 3;
+	else if (pAd->CommonCfg.TxPowerPercentage > 15)  /* reduce Pwr for 6 dB. */
+		CurTxPwr -= 6;
+	else if (pAd->CommonCfg.TxPowerPercentage > 9)   /* reduce Pwr for 9 dB. */
+		CurTxPwr -= 9;
+	else                                           /* reduce Pwr for 12 dB. */
+		CurTxPwr -= 12;
+
+	if (pAd->CommonCfg.BBPCurrentBW == BW_40)
+	{
+		if (pAd->CommonCfg.CentralChannel > 14)
+		{
+			TxPwr[0] = pAd->Tx40MPwrCfgABand[0];
+			TxPwr[1] = pAd->Tx40MPwrCfgABand[1];
+			TxPwr[2] = pAd->Tx40MPwrCfgABand[2];
+			TxPwr[3] = pAd->Tx40MPwrCfgABand[3];
+			TxPwr[4] = pAd->Tx40MPwrCfgABand[4];
+		}
+		else
+		{
+			TxPwr[0] = pAd->Tx40MPwrCfgGBand[0];
+			TxPwr[1] = pAd->Tx40MPwrCfgGBand[1];
+			TxPwr[2] = pAd->Tx40MPwrCfgGBand[2];
+			TxPwr[3] = pAd->Tx40MPwrCfgGBand[3];
+			TxPwr[4] = pAd->Tx40MPwrCfgGBand[4];
+		}
+	}
+	else
+	{
+		if (pAd->CommonCfg.Channel > 14)
+		{
+			TxPwr[0] = pAd->Tx20MPwrCfgABand[0];
+			TxPwr[1] = pAd->Tx20MPwrCfgABand[1];
+			TxPwr[2] = pAd->Tx20MPwrCfgABand[2];
+			TxPwr[3] = pAd->Tx20MPwrCfgABand[3];
+			TxPwr[4] = pAd->Tx20MPwrCfgABand[4];
+		}
+		else
+		{
+			TxPwr[0] = pAd->Tx20MPwrCfgGBand[0];
+			TxPwr[1] = pAd->Tx20MPwrCfgGBand[1];
+			TxPwr[2] = pAd->Tx20MPwrCfgGBand[2];
+			TxPwr[3] = pAd->Tx20MPwrCfgGBand[3];
+			TxPwr[4] = pAd->Tx20MPwrCfgGBand[4];
+		}
+	}
+
+
+	switch(HTTxMode.field.MODE)
+	{
+		case MODE_CCK:
+		case MODE_OFDM:
+			Value = TxPwr[1];
+			TxPwrRef = (Value & 0x00000f00) >> 8;
+			
+			break;
+
+#ifdef DOT11_N_SUPPORT
+		case MODE_HTMIX:
+		case MODE_HTGREENFIELD:
+			if (pAd->CommonCfg.TxStream == 1)
+			{
+				Value = TxPwr[2];
+				TxPwrRef = (Value & 0x00000f00) >> 8;
+			}
+			else if (pAd->CommonCfg.TxStream == 2)
+			{
+				Value = TxPwr[3];
+				TxPwrRef = (Value & 0x00000f00) >> 8;
+			}
+			break;
+#endif /* DOT11_N_SUPPORT */
+	}
+
+	PhyMode =
+#ifdef DOT11_N_SUPPORT
+				(HTTxMode.field.MODE == MODE_HTGREENFIELD)
+				? MODE_HTMIX :
+#endif /* DOT11_N_SUPPORT */
+				HTTxMode.field.MODE;
+
+	for (Idx = 0; Idx < MAX_TXPWR_TAB_SIZE; Idx++)
+	{
+		if ((TxPwrCfg[Idx].Mode == PhyMode)
+			&& (TxPwrCfg[Idx].MCS == HTTxMode.field.MCS))
+		{
+			Value = TxPwr[TxPwrCfg[Idx].req];
+			DaltaPwr = TxPwrRef - (CHAR)((Value & TxPwrCfg[Idx].BitMask)
+											>> TxPwrCfg[Idx].shift);
+			CurTxPwr -= DaltaPwr;
+			break;
+		}
+	}
+
+	return CurTxPwr;
+}
+
+
+NDIS_STATUS	MeasureReqTabInit(
+	IN PRTMP_ADAPTER pAd)
+{
+	NDIS_STATUS     Status = NDIS_STATUS_SUCCESS;
+
+	NdisAllocateSpinLock(pAd, &pAd->CommonCfg.MeasureReqTabLock);
+
+/*	pAd->CommonCfg.pMeasureReqTab = kmalloc(sizeof(MEASURE_REQ_TAB), GFP_ATOMIC);*/
+	os_alloc_mem(pAd, (UCHAR **)&(pAd->CommonCfg.pMeasureReqTab), sizeof(MEASURE_REQ_TAB));
+	if (pAd->CommonCfg.pMeasureReqTab)
+		NdisZeroMemory(pAd->CommonCfg.pMeasureReqTab, sizeof(MEASURE_REQ_TAB));
+	else
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s Fail to alloc memory for pAd->CommonCfg.pMeasureReqTab.\n", __FUNCTION__));
+		Status = NDIS_STATUS_FAILURE;
+	}
+
+	return Status;
+}
+
+VOID MeasureReqTabExit(
+	IN PRTMP_ADAPTER pAd)
+{
+	NdisFreeSpinLock(&pAd->CommonCfg.MeasureReqTabLock);
+
+	if (pAd->CommonCfg.pMeasureReqTab)
+/*		kfree(pAd->CommonCfg.pMeasureReqTab);*/
+		os_free_mem(NULL, pAd->CommonCfg.pMeasureReqTab);
+	pAd->CommonCfg.pMeasureReqTab = NULL;
+
+	return;
+}
+
+PMEASURE_REQ_ENTRY MeasureReqLookUp(
+	IN PRTMP_ADAPTER	pAd,
+	IN UINT8			DialogToken)
+{
+	UINT HashIdx;
+	PMEASURE_REQ_TAB pTab = pAd->CommonCfg.pMeasureReqTab;
+	PMEASURE_REQ_ENTRY pEntry = NULL;
+	PMEASURE_REQ_ENTRY pPrevEntry = NULL;
+
+	if (pTab == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: pMeasureReqTab doesn't exist.\n", __FUNCTION__));
+		return NULL;
+	}
+
+	RTMP_SEM_LOCK(&pAd->CommonCfg.MeasureReqTabLock);
+
+	HashIdx = MQ_DIALOGTOKEN_HASH_INDEX(DialogToken);
+	pEntry = pTab->Hash[HashIdx];
+
+	while (pEntry)
+	{
+		if (pEntry->DialogToken == DialogToken) 
+			break;
+		else
+		{
+			pPrevEntry = pEntry;
+			pEntry = pEntry->pNext;
+		}
+	}
+
+	RTMP_SEM_UNLOCK(&pAd->CommonCfg.MeasureReqTabLock);
+	
+	return pEntry;
+}
+
+PMEASURE_REQ_ENTRY MeasureReqInsert(
+	IN PRTMP_ADAPTER	pAd,
+	IN UINT8			DialogToken)
+{
+	INT i;
+	ULONG HashIdx;
+	PMEASURE_REQ_TAB pTab = pAd->CommonCfg.pMeasureReqTab;
+	PMEASURE_REQ_ENTRY pEntry = NULL, pCurrEntry;
+	ULONG Now;
+
+	if(pTab == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: pMeasureReqTab doesn't exist.\n", __FUNCTION__));
+		return NULL;
+	}
+
+	pEntry = MeasureReqLookUp(pAd, DialogToken);
+	if (pEntry == NULL)
+	{
+		RTMP_SEM_LOCK(&pAd->CommonCfg.MeasureReqTabLock);
+		for (i = 0; i < MAX_MEASURE_REQ_TAB_SIZE; i++)
+		{
+			NdisGetSystemUpTime(&Now);
+			pEntry = &pTab->Content[i];
+ 
+			if ((pEntry->Valid == TRUE)
+				&& RTMP_TIME_AFTER((unsigned long)Now, (unsigned long)(pEntry->lastTime + MQ_REQ_AGE_OUT)))
+			{
+				PMEASURE_REQ_ENTRY pPrevEntry = NULL;
+				ULONG HashIdx = MQ_DIALOGTOKEN_HASH_INDEX(pEntry->DialogToken);
+				PMEASURE_REQ_ENTRY pProbeEntry = pTab->Hash[HashIdx];
+
+				/* update Hash list*/
+				do
+				{
+					if (pProbeEntry == pEntry)
+					{
+						if (pPrevEntry == NULL)
+						{
+							pTab->Hash[HashIdx] = pEntry->pNext;
+						}
+						else
+						{
+							pPrevEntry->pNext = pEntry->pNext;
+						}
+						break;
+					}
+
+					pPrevEntry = pProbeEntry;
+					pProbeEntry = pProbeEntry->pNext;
+				} while (pProbeEntry);
+
+				NdisZeroMemory(pEntry, sizeof(MEASURE_REQ_ENTRY));
+				pTab->Size--;
+
+				break;
+			}
+ 
+			if (pEntry->Valid == FALSE)
+				break;
+		}
+
+		if (i < MAX_MEASURE_REQ_TAB_SIZE)
+		{
+			NdisGetSystemUpTime(&Now);
+			pEntry->lastTime = Now;
+			pEntry->Valid = TRUE;
+			pEntry->DialogToken = DialogToken;
+			pTab->Size++;
+		}
+		else
+		{
+			pEntry = NULL;
+			DBGPRINT(RT_DEBUG_ERROR, ("%s: pMeasureReqTab tab full.\n", __FUNCTION__));
+		}
+
+		/* add this Neighbor entry into HASH table*/
+		if (pEntry)
+		{
+			HashIdx = MQ_DIALOGTOKEN_HASH_INDEX(DialogToken);
+			if (pTab->Hash[HashIdx] == NULL)
+			{
+				pTab->Hash[HashIdx] = pEntry;
+			}
+			else
+			{
+				pCurrEntry = pTab->Hash[HashIdx];
+				while (pCurrEntry->pNext != NULL)
+					pCurrEntry = pCurrEntry->pNext;
+				pCurrEntry->pNext = pEntry;
+			}
+		}
+
+		RTMP_SEM_UNLOCK(&pAd->CommonCfg.MeasureReqTabLock);
+	} 
+
+	return pEntry;
+}
+
+VOID MeasureReqDelete(
+	IN PRTMP_ADAPTER	pAd,
+	IN UINT8			DialogToken)
+{
+	PMEASURE_REQ_TAB pTab = pAd->CommonCfg.pMeasureReqTab;
+	PMEASURE_REQ_ENTRY pEntry = NULL;
+
+	if(pTab == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: pMeasureReqTab doesn't exist.\n", __FUNCTION__));
+		return;
+	}
+
+	/* if empty, return*/
+	if (pTab->Size == 0) 
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("pMeasureReqTab empty.\n"));
+		return;
+	}
+
+	pEntry = MeasureReqLookUp(pAd, DialogToken);
+	if (pEntry != NULL)
+	{
+		PMEASURE_REQ_ENTRY pPrevEntry = NULL;
+		ULONG HashIdx = MQ_DIALOGTOKEN_HASH_INDEX(pEntry->DialogToken);
+		PMEASURE_REQ_ENTRY pProbeEntry = pTab->Hash[HashIdx];
+
+		RTMP_SEM_LOCK(&pAd->CommonCfg.MeasureReqTabLock);
+		/* update Hash list*/
+		do
+		{
+			if (pProbeEntry == pEntry)
+			{
+				if (pPrevEntry == NULL)
+				{
+					pTab->Hash[HashIdx] = pEntry->pNext;
+				}
+				else
+				{
+					pPrevEntry->pNext = pEntry->pNext;
+				}
+				break;
+			}
+
+			pPrevEntry = pProbeEntry;
+			pProbeEntry = pProbeEntry->pNext;
+		} while (pProbeEntry);
+
+		NdisZeroMemory(pEntry, sizeof(MEASURE_REQ_ENTRY));
+		pTab->Size--;
+
+		RTMP_SEM_UNLOCK(&pAd->CommonCfg.MeasureReqTabLock);
+	}
+
+	return;
+}
+
+NDIS_STATUS	TpcReqTabInit(
+	IN PRTMP_ADAPTER pAd)
+{
+	NDIS_STATUS     Status = NDIS_STATUS_SUCCESS;
+
+	NdisAllocateSpinLock(pAd, &pAd->CommonCfg.TpcReqTabLock);
+
+/*	pAd->CommonCfg.pTpcReqTab = kmalloc(sizeof(TPC_REQ_TAB), GFP_ATOMIC);*/
+	os_alloc_mem(pAd, (UCHAR **)&(pAd->CommonCfg.pTpcReqTab), sizeof(TPC_REQ_TAB));
+	if (pAd->CommonCfg.pTpcReqTab)
+		NdisZeroMemory(pAd->CommonCfg.pTpcReqTab, sizeof(TPC_REQ_TAB));
+	else
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s Fail to alloc memory for pAd->CommonCfg.pTpcReqTab.\n", __FUNCTION__));
+		Status = NDIS_STATUS_FAILURE;
+	}
+
+	return Status;
+}
+
+VOID TpcReqTabExit(
+	IN PRTMP_ADAPTER pAd)
+{
+	NdisFreeSpinLock(&pAd->CommonCfg.TpcReqTabLock);
+
+	if (pAd->CommonCfg.pTpcReqTab)
+/*		kfree(pAd->CommonCfg.pTpcReqTab);*/
+		os_free_mem(NULL, pAd->CommonCfg.pTpcReqTab);
+	pAd->CommonCfg.pTpcReqTab = NULL;
+
+	return;
+}
+
+static PTPC_REQ_ENTRY TpcReqLookUp(
+	IN PRTMP_ADAPTER	pAd,
+	IN UINT8			DialogToken)
+{
+	UINT HashIdx;
+	PTPC_REQ_TAB pTab = pAd->CommonCfg.pTpcReqTab;
+	PTPC_REQ_ENTRY pEntry = NULL;
+	PTPC_REQ_ENTRY pPrevEntry = NULL;
+
+	if (pTab == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: pTpcReqTab doesn't exist.\n", __FUNCTION__));
+		return NULL;
+	}
+
+	RTMP_SEM_LOCK(&pAd->CommonCfg.TpcReqTabLock);
+
+	HashIdx = TPC_DIALOGTOKEN_HASH_INDEX(DialogToken);
+	pEntry = pTab->Hash[HashIdx];
+
+	while (pEntry)
+	{
+		if (pEntry->DialogToken == DialogToken) 
+			break;
+		else
+		{
+			pPrevEntry = pEntry;
+			pEntry = pEntry->pNext;
+		}
+	}
+
+	RTMP_SEM_UNLOCK(&pAd->CommonCfg.TpcReqTabLock);
+	
+	return pEntry;
+}
+
+
+static PTPC_REQ_ENTRY TpcReqInsert(
+	IN PRTMP_ADAPTER	pAd,
+	IN UINT8			DialogToken)
+{
+	INT i;
+	ULONG HashIdx;
+	PTPC_REQ_TAB pTab = pAd->CommonCfg.pTpcReqTab;
+	PTPC_REQ_ENTRY pEntry = NULL, pCurrEntry;
+	ULONG Now;
+
+	if(pTab == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: pTpcReqTab doesn't exist.\n", __FUNCTION__));
+		return NULL;
+	}
+
+	pEntry = TpcReqLookUp(pAd, DialogToken);
+	if (pEntry == NULL)
+	{
+		RTMP_SEM_LOCK(&pAd->CommonCfg.TpcReqTabLock);
+		for (i = 0; i < MAX_TPC_REQ_TAB_SIZE; i++)
+		{
+			NdisGetSystemUpTime(&Now);
+			pEntry = &pTab->Content[i];
+ 
+			if ((pEntry->Valid == TRUE)
+				&& RTMP_TIME_AFTER((unsigned long)Now, (unsigned long)(pEntry->lastTime + TPC_REQ_AGE_OUT)))
+			{
+				PTPC_REQ_ENTRY pPrevEntry = NULL;
+				ULONG HashIdx = TPC_DIALOGTOKEN_HASH_INDEX(pEntry->DialogToken);
+				PTPC_REQ_ENTRY pProbeEntry = pTab->Hash[HashIdx];
+
+				/* update Hash list*/
+				do
+				{
+					if (pProbeEntry == pEntry)
+					{
+						if (pPrevEntry == NULL)
+						{
+							pTab->Hash[HashIdx] = pEntry->pNext;
+						}
+						else
+						{
+							pPrevEntry->pNext = pEntry->pNext;
+						}
+						break;
+					}
+
+					pPrevEntry = pProbeEntry;
+					pProbeEntry = pProbeEntry->pNext;
+				} while (pProbeEntry);
+
+				NdisZeroMemory(pEntry, sizeof(TPC_REQ_ENTRY));
+				pTab->Size--;
+
+				break;
+			}
+ 
+			if (pEntry->Valid == FALSE)
+				break;
+		}
+
+		if (i < MAX_TPC_REQ_TAB_SIZE)
+		{
+			NdisGetSystemUpTime(&Now);
+			pEntry->lastTime = Now;
+			pEntry->Valid = TRUE;
+			pEntry->DialogToken = DialogToken;
+			pTab->Size++;
+		}
+		else
+		{
+			pEntry = NULL;
+			DBGPRINT(RT_DEBUG_ERROR, ("%s: pTpcReqTab tab full.\n", __FUNCTION__));
+		}
+
+		/* add this Neighbor entry into HASH table*/
+		if (pEntry)
+		{
+			HashIdx = TPC_DIALOGTOKEN_HASH_INDEX(DialogToken);
+			if (pTab->Hash[HashIdx] == NULL)
+			{
+				pTab->Hash[HashIdx] = pEntry;
+			}
+			else
+			{
+				pCurrEntry = pTab->Hash[HashIdx];
+				while (pCurrEntry->pNext != NULL)
+					pCurrEntry = pCurrEntry->pNext;
+				pCurrEntry->pNext = pEntry;
+			}
+		}
+
+		RTMP_SEM_UNLOCK(&pAd->CommonCfg.TpcReqTabLock);
+	} 
+
+	return pEntry;
+}
+
+static VOID TpcReqDelete(
+	IN PRTMP_ADAPTER	pAd,
+	IN UINT8			DialogToken)
+{
+	PTPC_REQ_TAB pTab = pAd->CommonCfg.pTpcReqTab;
+	PTPC_REQ_ENTRY pEntry = NULL;
+
+	if(pTab == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: pTpcReqTab doesn't exist.\n", __FUNCTION__));
+		return;
+	}
+
+	/* if empty, return*/
+	if (pTab->Size == 0) 
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("pTpcReqTab empty.\n"));
+		return;
+	}
+
+	pEntry = TpcReqLookUp(pAd, DialogToken);
+	if (pEntry != NULL)
+	{
+		PTPC_REQ_ENTRY pPrevEntry = NULL;
+		ULONG HashIdx = TPC_DIALOGTOKEN_HASH_INDEX(pEntry->DialogToken);
+		PTPC_REQ_ENTRY pProbeEntry = pTab->Hash[HashIdx];
+
+		RTMP_SEM_LOCK(&pAd->CommonCfg.TpcReqTabLock);
+		/* update Hash list*/
+		do
+		{
+			if (pProbeEntry == pEntry)
+			{
+				if (pPrevEntry == NULL)
+				{
+					pTab->Hash[HashIdx] = pEntry->pNext;
+				}
+				else
+				{
+					pPrevEntry->pNext = pEntry->pNext;
+				}
+				break;
+			}
+
+			pPrevEntry = pProbeEntry;
+			pProbeEntry = pProbeEntry->pNext;
+		} while (pProbeEntry);
+
+		NdisZeroMemory(pEntry, sizeof(TPC_REQ_ENTRY));
+		pTab->Size--;
+
+		RTMP_SEM_UNLOCK(&pAd->CommonCfg.TpcReqTabLock);
+	}
+
+	return;
+}
+
+/*
+	==========================================================================
+	Description:
+		Get Current TimeS tamp.
+		
+	Parametrs:
+	
+	Return	: Current Time Stamp.
+	==========================================================================
+ */
+static UINT64 GetCurrentTimeStamp(
+	IN PRTMP_ADAPTER pAd)
+{
+	/* get current time stamp.*/
+	return 0;
+}
+
+/*
+	==========================================================================
+	Description:
+		Get Current Transmit Power.
+		
+	Parametrs:
+	
+	Return	: Current Time Stamp.
+	==========================================================================
+ */
+static UINT8 GetCurTxPwr(
+	IN PRTMP_ADAPTER pAd,
+	IN UINT8 Wcid)
+{
+	return 16; /* 16 dBm */
+}
+
+/*
+	==========================================================================
+	Description:
+		Get Current Transmit Power.
+		
+	Parametrs:
+	
+	Return	: Current Time Stamp.
+	==========================================================================
+ */
+VOID InsertChannelRepIE(
+	IN PRTMP_ADAPTER pAd,
+	OUT PUCHAR pFrameBuf,
+	OUT PULONG pFrameLen,
+	IN PSTRING pCountry,
+	IN UINT8 RegulatoryClass)
+{
+	ULONG TempLen;
+	UINT8 Len;
+	UINT8 IEId = IE_AP_CHANNEL_REPORT;
+	PUCHAR pChListPtr = NULL;
+	PDOT11_CHANNEL_SET pChannelSet = NULL;
+
+	Len = 1;
+	if (strncmp(pCountry, "US", 2) == 0)
+	{
+		if (RegulatoryClass >= USA_REGULATORY_INFO_SIZE)
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("%s: USA Unknow Requlatory class (%d)\n",
+						__FUNCTION__, RegulatoryClass));
+			return;
+		}
+		pChannelSet = &USARegulatoryInfo[RegulatoryClass].ChannelSet;
+	}
+	else if (strncmp(pCountry, "JP", 2) == 0)
+	{
+		if (RegulatoryClass >= JP_REGULATORY_INFO_SIZE)
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("%s: JP Unknow Requlatory class (%d)\n",
+						__FUNCTION__, RegulatoryClass));
+			return;
+		}
+
+		pChannelSet = &JapanRegulatoryInfo[RegulatoryClass].ChannelSet;
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: Unknow Country (%s)\n",
+					__FUNCTION__, pCountry));
+		return;
+	}
+
+	/* no match channel set. */
+	if (pChannelSet == NULL)
+		return;
+
+	/* empty channel set. */
+	if (pChannelSet->NumberOfChannels == 0)
+		return;
+
+	Len += pChannelSet->NumberOfChannels;
+	pChListPtr = pChannelSet->ChannelList;
+
+	if (Len > 1)
+	{
+		MakeOutgoingFrame(pFrameBuf,	&TempLen,
+						1,				&IEId,
+						1,				&Len,
+						1,				&RegulatoryClass,
+						Len -1,			pChListPtr,
+						END_OF_ARGS);
+
+		*pFrameLen = *pFrameLen + TempLen;
+	}
+	return;
+}
+
+/*
+	==========================================================================
+	Description:
+		Insert Dialog Token into frame.
+		
+	Parametrs:
+		1. frame buffer pointer.
+		2. frame length.
+		3. Dialog token.
+	
+	Return	: None.
+	==========================================================================
+ */
+VOID InsertDialogToken(
+	IN PRTMP_ADAPTER pAd,
+	OUT PUCHAR pFrameBuf,
+	OUT PULONG pFrameLen,
+	IN UINT8 DialogToken)
+{
+	ULONG TempLen;
+	MakeOutgoingFrame(pFrameBuf,	&TempLen,
+					1,				&DialogToken,
+					END_OF_ARGS);
+
+	*pFrameLen = *pFrameLen + TempLen;
+
+	return;
+}
+
+/*
+	==========================================================================
+	Description:
+		Insert TPC Request IE into frame.
+		
+	Parametrs:
+		1. frame buffer pointer.
+		2. frame length.
+	
+	Return	: None.
+	==========================================================================
+ */
+ static VOID InsertTpcReqIE(
+	IN PRTMP_ADAPTER pAd,
+	OUT PUCHAR pFrameBuf,
+	OUT PULONG pFrameLen)
+{
+	ULONG TempLen;
+	UINT8 Len = 0;
+	UINT8 ElementID = IE_TPC_REQUEST;
+
+	MakeOutgoingFrame(pFrameBuf,					&TempLen,
+						1,							&ElementID,
+						1,							&Len,
+						END_OF_ARGS);
+
+	*pFrameLen = *pFrameLen + TempLen;
+
+	return;
+}
+
+/*
+	==========================================================================
+	Description:
+		Insert TPC Report IE into frame.
+		
+	Parametrs:
+		1. frame buffer pointer.
+		2. frame length.
+		3. Transmit Power.
+		4. Link Margin.
+	
+	Return	: None.
+	==========================================================================
+ */
+VOID InsertTpcReportIE(
+	IN PRTMP_ADAPTER pAd,
+	OUT PUCHAR pFrameBuf,
+	OUT PULONG pFrameLen,
+	IN UINT8 TxPwr,
+	IN UINT8 LinkMargin)
+{
+	ULONG TempLen;
+	UINT8 Len = sizeof(TPC_REPORT_INFO);
+	UINT8 ElementID = IE_TPC_REPORT;
+	TPC_REPORT_INFO TpcReportIE;
+
+	TpcReportIE.TxPwr = TxPwr;
+	TpcReportIE.LinkMargin = LinkMargin;
+
+	MakeOutgoingFrame(pFrameBuf,					&TempLen,
+						1,							&ElementID,
+						1,							&Len,
+						Len,						&TpcReportIE,
+						END_OF_ARGS);
+
+	*pFrameLen = *pFrameLen + TempLen;
+
+
+	return;
+}
+
+/*
+	==========================================================================
+	Description:
+		Insert Measure Request IE into frame.
+		
+	Parametrs:
+		1. frame buffer pointer.
+		2. frame length.
+		3. Measure Token.
+		4. Measure Request Mode.
+		5. Measure Request Type.
+		6. Measure Channel.
+		7. Measure Start time.
+		8. Measure Duration.
+
+	
+	Return	: None.
+	==========================================================================
+ */
+static VOID InsertMeasureReqIE(
+	IN PRTMP_ADAPTER pAd,
+	OUT PUCHAR pFrameBuf,
+	OUT PULONG pFrameLen,
+	IN UINT8 Len,
+	IN PMEASURE_REQ_INFO pMeasureReqIE)
+{
+	ULONG TempLen;
+	UINT8 ElementID = IE_MEASUREMENT_REQUEST;
+
+	MakeOutgoingFrame(pFrameBuf,					&TempLen,
+						1,							&ElementID,
+						1,							&Len,
+						sizeof(MEASURE_REQ_INFO),	pMeasureReqIE,
+						END_OF_ARGS);
+
+	*pFrameLen = *pFrameLen + TempLen;
+
+	return;
+}
+
+/*
+	==========================================================================
+	Description:
+		Insert Measure Report IE into frame.
+		
+	Parametrs:
+		1. frame buffer pointer.
+		2. frame length.
+		3. Measure Token.
+		4. Measure Request Mode.
+		5. Measure Request Type.
+		6. Length of Report Infomation 
+		7. Pointer of Report Infomation Buffer.
+	
+	Return	: None.
+	==========================================================================
+ */
+static VOID InsertMeasureReportIE(
+	IN PRTMP_ADAPTER pAd,
+	OUT PUCHAR pFrameBuf,
+	OUT PULONG pFrameLen,
+	IN PMEASURE_REPORT_INFO pMeasureReportIE,
+	IN UINT8 ReportLnfoLen,
+	IN PUINT8 pReportInfo)
+{
+	ULONG TempLen;
+	UINT8 Len;
+	UINT8 ElementID = IE_MEASUREMENT_REPORT;
+
+	Len = sizeof(MEASURE_REPORT_INFO) + ReportLnfoLen;
+		
+	MakeOutgoingFrame(pFrameBuf,					&TempLen,
+						1,							&ElementID,
+						1,							&Len,
+						Len,						pMeasureReportIE,
+						END_OF_ARGS);
+
+	*pFrameLen = *pFrameLen + TempLen;
+
+	if ((ReportLnfoLen > 0) && (pReportInfo != NULL))
+	{
+		MakeOutgoingFrame(pFrameBuf + *pFrameLen,		&TempLen,
+							ReportLnfoLen,				pReportInfo,
+							END_OF_ARGS);
+
+		*pFrameLen = *pFrameLen + TempLen;
+	}
+	return;
+}
+
+/*
+	==========================================================================
+	Description:
+		Prepare Measurement request action frame and enqueue it into
+		management queue waiting for transmition.
+		
+	Parametrs:
+		1. the destination mac address of the frame.
+	
+	Return	: None.
+	==========================================================================
+ */
+VOID MakeMeasurementReqFrame(
+	IN PRTMP_ADAPTER pAd,
+	OUT PUCHAR pOutBuffer,
+	OUT PULONG pFrameLen,
+	IN UINT8 TotalLen,
+	IN UINT8 Category,
+	IN UINT8 Action,
+	IN UINT8 MeasureToken, 
+	IN UINT8 MeasureReqMode,
+	IN UINT8 MeasureReqType,
+	IN UINT16 NumOfRepetitions)
+{
+	ULONG TempLen;
+	MEASURE_REQ_INFO MeasureReqIE;
+
+	InsertActField(pAd, (pOutBuffer + *pFrameLen), pFrameLen, Category, Action);
+
+	/* fill Dialog Token*/
+	InsertDialogToken(pAd, (pOutBuffer + *pFrameLen), pFrameLen, MeasureToken);
+
+	/* fill Number of repetitions. */
+	if (Category == CATEGORY_RM)
+	{
+		MakeOutgoingFrame((pOutBuffer+*pFrameLen),	&TempLen,
+						2,							&NumOfRepetitions,
+						END_OF_ARGS);
+
+		*pFrameLen += TempLen;
+	}
+
+	/* prepare Measurement IE.*/
+	NdisZeroMemory(&MeasureReqIE, sizeof(MEASURE_REQ_INFO));
+	MeasureReqIE.Token = MeasureToken;
+	MeasureReqIE.ReqMode.word = MeasureReqMode;
+	MeasureReqIE.ReqType = MeasureReqType;
+	InsertMeasureReqIE(pAd, (pOutBuffer+*pFrameLen), pFrameLen,
+		TotalLen, &MeasureReqIE);
+
+	return;
+}
+
+/*
+	==========================================================================
+	Description:
+		Prepare Measurement report action frame and enqueue it into
+		management queue waiting for transmition.
+		
+	Parametrs:
+		1. the destination mac address of the frame.
+	
+	Return	: None.
+	==========================================================================
+ */
+VOID EnqueueMeasurementRep(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pDA,
+	IN UINT8 DialogToken,
+	IN UINT8 MeasureToken, 
+	IN UINT8 MeasureReqMode,
+	IN UINT8 MeasureReqType,
+	IN UINT8 ReportInfoLen,
+	IN PUINT8 pReportInfo)
+{
+	PUCHAR pOutBuffer = NULL;
+	NDIS_STATUS NStatus;
+	ULONG FrameLen;
+	HEADER_802_11 ActHdr;
+	MEASURE_REPORT_INFO MeasureRepIE;
+
+	/* build action frame header.*/
+	MgtMacHeaderInit(pAd, &ActHdr, SUBTYPE_ACTION, 0, pDA,
+						pAd->CurrentAddress);
+
+	NStatus = MlmeAllocateMemory(pAd, (PVOID)&pOutBuffer);  /*Get an unused nonpaged memory*/
+	if(NStatus != NDIS_STATUS_SUCCESS)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("%s() allocate memory failed \n", __FUNCTION__));
+		return;
+	}
+	NdisMoveMemory(pOutBuffer, (PCHAR)&ActHdr, sizeof(HEADER_802_11));
+	FrameLen = sizeof(HEADER_802_11);
+
+	InsertActField(pAd, (pOutBuffer + FrameLen), &FrameLen, CATEGORY_SPECTRUM, SPEC_MRP);
+
+	/* fill Dialog Token*/
+	InsertDialogToken(pAd, (pOutBuffer + FrameLen), &FrameLen, DialogToken);
+
+	/* prepare Measurement IE.*/
+	NdisZeroMemory(&MeasureRepIE, sizeof(MEASURE_REPORT_INFO));
+	MeasureRepIE.Token = MeasureToken;
+	MeasureRepIE.ReportMode = MeasureReqMode;
+	MeasureRepIE.ReportType = MeasureReqType;
+	InsertMeasureReportIE(pAd, (pOutBuffer + FrameLen), &FrameLen, &MeasureRepIE, ReportInfoLen, pReportInfo);
+
+	MiniportMMRequest(pAd, QID_AC_BE, pOutBuffer, FrameLen);
+	MlmeFreeMemory(pAd, pOutBuffer);
+
+	return;	
+}
+
+/*
+	==========================================================================
+	Description:
+		Prepare TPC Request action frame and enqueue it into
+		management queue waiting for transmition.
+		
+	Parametrs:
+		1. the destination mac address of the frame.
+	
+	Return	: None.
+	==========================================================================
+ */
+VOID EnqueueTPCReq(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pDA,
+	IN UCHAR DialogToken)
+{
+	PUCHAR pOutBuffer = NULL;
+	NDIS_STATUS NStatus;
+	ULONG FrameLen;
+
+	HEADER_802_11 ActHdr;
+
+	/* build action frame header.*/
+	MgtMacHeaderInit(pAd, &ActHdr, SUBTYPE_ACTION, 0, pDA,
+						pAd->CurrentAddress);
+
+	NStatus = MlmeAllocateMemory(pAd, (PVOID)&pOutBuffer);  /*Get an unused nonpaged memory*/
+	if(NStatus != NDIS_STATUS_SUCCESS)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("%s() allocate memory failed \n", __FUNCTION__));
+		return;
+	}
+	NdisMoveMemory(pOutBuffer, (PCHAR)&ActHdr, sizeof(HEADER_802_11));
+	FrameLen = sizeof(HEADER_802_11);
+
+	InsertActField(pAd, (pOutBuffer + FrameLen), &FrameLen, CATEGORY_SPECTRUM, SPEC_TPCRQ);
+
+	/* fill Dialog Token*/
+	InsertDialogToken(pAd, (pOutBuffer + FrameLen), &FrameLen, DialogToken);
+
+	/* Insert TPC Request IE.*/
+	InsertTpcReqIE(pAd, (pOutBuffer + FrameLen), &FrameLen);
+
+	MiniportMMRequest(pAd, QID_AC_BE, pOutBuffer, FrameLen);
+	MlmeFreeMemory(pAd, pOutBuffer);
+
+	return;
+}
+
+/*
+	==========================================================================
+	Description:
+		Prepare TPC Report action frame and enqueue it into
+		management queue waiting for transmition.
+		
+	Parametrs:
+		1. the destination mac address of the frame.
+	
+	Return	: None.
+	==========================================================================
+ */
+VOID EnqueueTPCRep(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pDA,
+	IN UINT8 DialogToken,
+	IN UINT8 TxPwr,
+	IN UINT8 LinkMargin)
+{
+	PUCHAR pOutBuffer = NULL;
+	NDIS_STATUS NStatus;
+	ULONG FrameLen;
+
+	HEADER_802_11 ActHdr;
+
+	/* build action frame header.*/
+	MgtMacHeaderInit(pAd, &ActHdr, SUBTYPE_ACTION, 0, pDA,
+						pAd->CurrentAddress);
+
+	NStatus = MlmeAllocateMemory(pAd, (PVOID)&pOutBuffer);  /*Get an unused nonpaged memory*/
+	if(NStatus != NDIS_STATUS_SUCCESS)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("%s() allocate memory failed \n", __FUNCTION__));
+		return;
+	}
+	NdisMoveMemory(pOutBuffer, (PCHAR)&ActHdr, sizeof(HEADER_802_11));
+	FrameLen = sizeof(HEADER_802_11);
+
+	InsertActField(pAd, (pOutBuffer + FrameLen), &FrameLen, CATEGORY_SPECTRUM, SPEC_TPCRP);
+
+	/* fill Dialog Token*/
+	InsertDialogToken(pAd, (pOutBuffer + FrameLen), &FrameLen, DialogToken);
+
+	/* Insert TPC Request IE.*/
+	InsertTpcReportIE(pAd, (pOutBuffer + FrameLen), &FrameLen, TxPwr, LinkMargin);
+
+	MiniportMMRequest(pAd, QID_AC_BE, pOutBuffer, FrameLen);
+	MlmeFreeMemory(pAd, pOutBuffer);
+
+	return;
+}
+
+
+static BOOLEAN DfsRequirementCheck(
+	IN PRTMP_ADAPTER pAd,
+	IN UINT8 Channel)
+{
+	BOOLEAN Result = FALSE;
+	INT i;
+
+	do
+	{
+		/* check DFS procedure is running.*/
+		/* make sure DFS procedure won't start twice.*/
+		if (pAd->CommonCfg.RadarDetect.RDMode != RD_NORMAL_MODE)
+		{
+			Result = FALSE;
+			break;
+		}
+
+		/* check the new channel carried from Channel Switch Announcemnet is valid.*/
+		for (i=0; i<pAd->ChannelListNum; i++)
+		{
+			if ((Channel == pAd->ChannelList[i].Channel)
+				&&(pAd->ChannelList[i].RemainingTimeForUse == 0))
+			{
+				/* found radar signal in the channel. the channel can't use at least for 30 minutes.*/
+				pAd->ChannelList[i].RemainingTimeForUse = 1800;/*30 min = 1800 sec*/
+				Result = TRUE;
+				break;
+			}
+		}
+	} while(FALSE);
+
+	return Result;
+}
+
+VOID NotifyChSwAnnToPeerAPs(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pRA,
+	IN PUCHAR pTA,
+	IN UINT8 ChSwMode,
+	IN UINT8 Channel)
+{
+}
+
+static VOID StartDFSProcedure(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR Channel,
+	IN UINT8 ChSwMode)
+{
+	/* start DFS procedure*/
+	pAd->CommonCfg.Channel = Channel;
+#ifdef DOT11_N_SUPPORT
+	N_ChannelCheck(pAd);
+#endif /* DOT11_N_SUPPORT */
+	pAd->CommonCfg.RadarDetect.RDMode = RD_SWITCHING_MODE;
+	pAd->CommonCfg.RadarDetect.CSCount = 0;
+}
+
+/*
+	==========================================================================
+	Description:
+		Channel Switch Announcement action frame sanity check.
+		
+	Parametrs:
+		1. MLME message containing the received frame
+		2. message length.
+		3. Channel switch announcement infomation buffer.
+		
+	
+	Return	: None.
+	==========================================================================
+ */
+
+/*
+  Channel Switch Announcement IE.
+  +----+-----+-----------+------------+-----------+
+  | ID | Len |Ch Sw Mode | New Ch Num | Ch Sw Cnt |
+  +----+-----+-----------+------------+-----------+
+    1    1        1           1            1      
+*/
+static BOOLEAN PeerChSwAnnSanity(
+	IN PRTMP_ADAPTER pAd,
+	IN VOID *pMsg,
+	IN ULONG MsgLen,
+	OUT PCH_SW_ANN_INFO pChSwAnnInfo)
+{
+	PFRAME_802_11 Fr = (PFRAME_802_11)pMsg;
+	PUCHAR pFramePtr = Fr->Octet;
+	BOOLEAN result = FALSE;
+	PEID_STRUCT eid_ptr;
+
+	/* skip 802.11 header.*/
+	MsgLen -= sizeof(HEADER_802_11);
+
+	/* skip category and action code.*/
+	pFramePtr += 2;
+	MsgLen -= 2;
+
+	if (pChSwAnnInfo == NULL)
+		return result;
+
+	eid_ptr = (PEID_STRUCT)pFramePtr;
+	while (((UCHAR*)eid_ptr + eid_ptr->Len + 1) < ((PUCHAR)pFramePtr + MsgLen))
+	{
+		switch(eid_ptr->Eid)
+		{
+			case IE_CHANNEL_SWITCH_ANNOUNCEMENT:
+				NdisMoveMemory(&pChSwAnnInfo->ChSwMode, eid_ptr->Octet, 1);
+				NdisMoveMemory(&pChSwAnnInfo->Channel, eid_ptr->Octet + 1, 1);
+				NdisMoveMemory(&pChSwAnnInfo->ChSwCnt, eid_ptr->Octet + 2, 1);
+				
+				result = TRUE;
+                break;
+            
+			default:
+				break;
+		}
+		eid_ptr = (PEID_STRUCT)((UCHAR*)eid_ptr + 2 + eid_ptr->Len);        
+	}
+
+	return result;
+}
+
+/*
+	==========================================================================
+	Description:
+		Measurement request action frame sanity check.
+		
+	Parametrs:
+		1. MLME message containing the received frame
+		2. message length.
+		3. Measurement request infomation buffer.
+	
+	Return	: None.
+	==========================================================================
+ */
+static BOOLEAN PeerMeasureReqSanity(
+	IN PRTMP_ADAPTER pAd,
+	IN VOID *pMsg,
+	IN ULONG MsgLen,
+	OUT PUINT8 pDialogToken,
+	OUT PMEASURE_REQ_INFO pMeasureReqInfo,
+	OUT PMEASURE_REQ pMeasureReq)
+{
+	PFRAME_802_11 Fr = (PFRAME_802_11)pMsg;
+	PUCHAR pFramePtr = Fr->Octet;
+	BOOLEAN result = FALSE;
+	PEID_STRUCT eid_ptr;
+	PUCHAR ptr;
+	UINT64 MeasureStartTime;
+	UINT16 MeasureDuration;
+
+	/* skip 802.11 header.*/
+	MsgLen -= sizeof(HEADER_802_11);
+
+	/* skip category and action code.*/
+	pFramePtr += 2;
+	MsgLen -= 2;
+
+	if (pMeasureReqInfo == NULL)
+		return result;
+
+	NdisMoveMemory(pDialogToken, pFramePtr, 1);
+	pFramePtr += 1;
+	MsgLen -= 1;
+
+	eid_ptr = (PEID_STRUCT)pFramePtr;
+	while (((UCHAR*)eid_ptr + eid_ptr->Len + 1) < ((PUCHAR)pFramePtr + MsgLen))
+	{
+		switch(eid_ptr->Eid)
+		{
+			case IE_MEASUREMENT_REQUEST:
+				NdisMoveMemory(&pMeasureReqInfo->Token, eid_ptr->Octet, 1);
+				NdisMoveMemory(&pMeasureReqInfo->ReqMode.word, eid_ptr->Octet + 1, 1);
+				NdisMoveMemory(&pMeasureReqInfo->ReqType, eid_ptr->Octet + 2, 1);
+				ptr = (PUCHAR)(eid_ptr->Octet + 3);
+				NdisMoveMemory(&pMeasureReq->ChNum, ptr, 1);
+				NdisMoveMemory(&MeasureStartTime, ptr + 1, 8);
+				pMeasureReq->MeasureStartTime = SWAP64(MeasureStartTime);
+				NdisMoveMemory(&MeasureDuration, ptr + 9, 2);
+				pMeasureReq->MeasureDuration = SWAP16(MeasureDuration);
+				
+				result = TRUE;
+				break;
+
+			default:
+				break;
+		}
+		eid_ptr = (PEID_STRUCT)((UCHAR*)eid_ptr + 2 + eid_ptr->Len);
+	}
+
+	return result;
+}
+
+/*
+	==========================================================================
+	Description:
+		Measurement report action frame sanity check.
+		
+	Parametrs:
+		1. MLME message containing the received frame
+		2. message length.
+		3. Measurement report infomation buffer.
+		4. basic report infomation buffer.
+	
+	Return	: None.
+	==========================================================================
+ */
+
+/*
+  Measurement Report IE.
+  +----+-----+-------+-------------+--------------+----------------+
+  | ID | Len | Token | Report Mode | Measure Type | Measure Report |
+  +----+-----+-------+-------------+--------------+----------------+
+    1     1      1          1             1            variable
+
+  Basic Report.
+  +--------+------------+----------+-----+
+  | Ch Num | Start Time | Duration | Map |
+  +--------+------------+----------+-----+
+      1          8           2        1
+
+  Map Field Bit Format.
+  +-----+---------------+---------------------+-------+------------+----------+
+  | Bss | OFDM Preamble | Unidentified signal | Radar | Unmeasured | Reserved |
+  +-----+---------------+---------------------+-------+------------+----------+
+     0          1                  2              3         4          5-7
+*/
+static BOOLEAN PeerMeasureReportSanity(
+	IN PRTMP_ADAPTER pAd,
+	IN VOID *pMsg,
+	IN ULONG MsgLen,
+	OUT PUINT8 pDialogToken,
+	OUT PMEASURE_REPORT_INFO pMeasureReportInfo,
+	OUT PUINT8 pReportBuf)
+{
+	PFRAME_802_11 Fr = (PFRAME_802_11)pMsg;
+	PUCHAR pFramePtr = Fr->Octet;
+	BOOLEAN result = FALSE;
+	PEID_STRUCT eid_ptr;
+	PUCHAR ptr;
+
+	/* skip 802.11 header.*/
+	MsgLen -= sizeof(HEADER_802_11);
+
+	/* skip category and action code.*/
+	pFramePtr += 2;
+	MsgLen -= 2;
+
+	if (pMeasureReportInfo == NULL)
+		return result;
+
+	NdisMoveMemory(pDialogToken, pFramePtr, 1);
+	pFramePtr += 1;
+	MsgLen -= 1;
+
+	eid_ptr = (PEID_STRUCT)pFramePtr;
+	while (((UCHAR*)eid_ptr + eid_ptr->Len + 1) < ((PUCHAR)pFramePtr + MsgLen))
+	{
+		switch(eid_ptr->Eid)
+		{
+			case IE_MEASUREMENT_REPORT:
+				NdisMoveMemory(&pMeasureReportInfo->Token, eid_ptr->Octet, 1);
+				NdisMoveMemory(&pMeasureReportInfo->ReportMode, eid_ptr->Octet + 1, 1);
+				NdisMoveMemory(&pMeasureReportInfo->ReportType, eid_ptr->Octet + 2, 1);
+				if (pMeasureReportInfo->ReportType == RM_BASIC)
+				{
+					PMEASURE_BASIC_REPORT pReport = (PMEASURE_BASIC_REPORT)pReportBuf;
+					ptr = (PUCHAR)(eid_ptr->Octet + 3);
+					NdisMoveMemory(&pReport->ChNum, ptr, 1);
+					NdisMoveMemory(&pReport->MeasureStartTime, ptr + 1, 8);
+					NdisMoveMemory(&pReport->MeasureDuration, ptr + 9, 2);
+					NdisMoveMemory(&pReport->Map, ptr + 11, 1);
+					
+				}
+				else if (pMeasureReportInfo->ReportType == RM_CCA)
+				{
+					PMEASURE_CCA_REPORT pReport = (PMEASURE_CCA_REPORT)pReportBuf;
+					ptr = (PUCHAR)(eid_ptr->Octet + 3);
+					NdisMoveMemory(&pReport->ChNum, ptr, 1);
+					NdisMoveMemory(&pReport->MeasureStartTime, ptr + 1, 8);
+					NdisMoveMemory(&pReport->MeasureDuration, ptr + 9, 2);
+					NdisMoveMemory(&pReport->CCA_Busy_Fraction, ptr + 11, 1);
+					
+				}
+				else if (pMeasureReportInfo->ReportType == RM_RPI_HISTOGRAM)
+				{
+					PMEASURE_RPI_REPORT pReport = (PMEASURE_RPI_REPORT)pReportBuf;
+					ptr = (PUCHAR)(eid_ptr->Octet + 3);
+					NdisMoveMemory(&pReport->ChNum, ptr, 1);
+					NdisMoveMemory(&pReport->MeasureStartTime, ptr + 1, 8);
+					NdisMoveMemory(&pReport->MeasureDuration, ptr + 9, 2);
+					NdisMoveMemory(&pReport->RPI_Density, ptr + 11, 8);
+				}
+				result = TRUE;
+                break;
+
+			default:
+				break;
+		}
+		eid_ptr = (PEID_STRUCT)((UCHAR*)eid_ptr + 2 + eid_ptr->Len);
+	}
+
+	return result;
+}
+
+/*
+	==========================================================================
+	Description:
+		TPC Request action frame sanity check.
+		
+	Parametrs:
+		1. MLME message containing the received frame
+		2. message length.
+		3. Dialog Token.
+	
+	Return	: None.
+	==========================================================================
+ */
+static BOOLEAN PeerTpcReqSanity(
+	IN PRTMP_ADAPTER pAd,
+	IN VOID *pMsg,
+	IN ULONG MsgLen,
+	OUT PUINT8 pDialogToken)
+{
+	PFRAME_802_11 Fr = (PFRAME_802_11)pMsg;
+	PUCHAR pFramePtr = Fr->Octet;
+	BOOLEAN result = FALSE;
+	PEID_STRUCT eid_ptr;
+
+	MsgLen -= sizeof(HEADER_802_11);
+
+	/* skip category and action code.*/
+	pFramePtr += 2;
+	MsgLen -= 2;
+
+	if (pDialogToken == NULL)
+		return result;
+
+	NdisMoveMemory(pDialogToken, pFramePtr, 1);
+	pFramePtr += 1;
+	MsgLen -= 1;
+
+	eid_ptr = (PEID_STRUCT)pFramePtr;
+	while (((UCHAR*)eid_ptr + eid_ptr->Len + 1) < ((PUCHAR)pFramePtr + MsgLen))
+	{
+		switch(eid_ptr->Eid)
+		{
+			case IE_TPC_REQUEST:
+				result = TRUE;
+                break;
+
+			default:
+				break;
+		}
+		eid_ptr = (PEID_STRUCT)((UCHAR*)eid_ptr + 2 + eid_ptr->Len);
+	}
+
+	return result;	
+}
+
+/*
+	==========================================================================
+	Description:
+		TPC Report action frame sanity check.
+		
+	Parametrs:
+		1. MLME message containing the received frame
+		2. message length.
+		3. Dialog Token.
+		4. TPC Report IE.
+	
+	Return	: None.
+	==========================================================================
+ */
+static BOOLEAN PeerTpcRepSanity(
+	IN PRTMP_ADAPTER pAd,
+	IN VOID *pMsg,
+	IN ULONG MsgLen,
+	OUT PUINT8 pDialogToken,
+	OUT PTPC_REPORT_INFO pTpcRepInfo)
+{
+	PFRAME_802_11 Fr = (PFRAME_802_11)pMsg;
+	PUCHAR pFramePtr = Fr->Octet;
+	BOOLEAN result = FALSE;
+	PEID_STRUCT eid_ptr;
+
+	MsgLen -= sizeof(HEADER_802_11);
+
+	/* skip category and action code.*/
+	pFramePtr += 2;
+	MsgLen -= 2;
+
+	if (pDialogToken == NULL)
+		return result;
+
+	NdisMoveMemory(pDialogToken, pFramePtr, 1);
+	pFramePtr += 1;
+	MsgLen -= 1;
+
+	eid_ptr = (PEID_STRUCT)pFramePtr;
+	while (((UCHAR*)eid_ptr + eid_ptr->Len + 1) < ((PUCHAR)pFramePtr + MsgLen))
+	{
+		switch(eid_ptr->Eid)
+		{
+			case IE_TPC_REPORT:
+				NdisMoveMemory(&pTpcRepInfo->TxPwr, eid_ptr->Octet, 1);
+				NdisMoveMemory(&pTpcRepInfo->LinkMargin, eid_ptr->Octet + 1, 1);
+				result = TRUE;
+                break;
+
+			default:
+				break;
+		}
+		eid_ptr = (PEID_STRUCT)((UCHAR*)eid_ptr + 2 + eid_ptr->Len);
+	}
+
+	return result;	
+}
+
+/*
+	==========================================================================
+	Description:
+		Channel Switch Announcement action frame handler.
+		
+	Parametrs:
+		Elme - MLME message containing the received frame
+	
+	Return	: None.
+	==========================================================================
+ */
+static VOID PeerChSwAnnAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+{
+	CH_SW_ANN_INFO ChSwAnnInfo;
+	PFRAME_802_11 pFr = (PFRAME_802_11)Elem->Msg;
+#ifdef CONFIG_STA_SUPPORT
+	UCHAR index = 0, Channel = 0, NewChannel = 0;
+	ULONG Bssidx = 0;
+#endif /* CONFIG_STA_SUPPORT */
+
+	NdisZeroMemory(&ChSwAnnInfo, sizeof(CH_SW_ANN_INFO));
+	if (! PeerChSwAnnSanity(pAd, Elem->Msg, Elem->MsgLen, &ChSwAnnInfo))
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("Invalid Channel Switch Action Frame.\n"));
+		return;
+	}
+
+
+#ifdef CONFIG_STA_SUPPORT
+	if (pAd->OpMode == OPMODE_STA)
+	{
+		Bssidx = BssTableSearch(&pAd->ScanTab, pFr->Hdr.Addr3, pAd->CommonCfg.Channel);
+		if (Bssidx == BSS_NOT_FOUND)
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("PeerChSwAnnAction - Bssidx is not found\n"));
+			return;  
+		}
+
+		DBGPRINT(RT_DEBUG_TRACE, ("\n****Bssidx is %d, Channel = %d\n", index, pAd->ScanTab.BssEntry[Bssidx].Channel));
+		hex_dump("SSID",pAd->ScanTab.BssEntry[Bssidx].Bssid ,6);
+
+		Channel = pAd->CommonCfg.Channel;
+		NewChannel = ChSwAnnInfo.Channel;
+
+		if ((pAd->CommonCfg.bIEEE80211H == 1) && (NewChannel != 0) && (Channel != NewChannel))
+		{
+			/* Switching to channel 1 can prevent from rescanning the current channel immediately (by auto reconnection).*/
+			/* In addition, clear the MLME queue and the scan table to discard the RX packets and previous scanning results.*/
+			AsicSwitchChannel(pAd, 1, FALSE);
+			AsicLockChannel(pAd, 1);
+		    LinkDown(pAd, FALSE);
+			MlmeQueueInit(pAd, &pAd->Mlme.Queue);
+		    RTMPusecDelay(1000000);		/* use delay to prevent STA do reassoc*/
+					
+			/* channel sanity check*/
+			for (index = 0 ; index < pAd->ChannelListNum; index++)
+			{
+				if (pAd->ChannelList[index].Channel == NewChannel)
+				{
+					pAd->ScanTab.BssEntry[Bssidx].Channel = NewChannel;
+					pAd->CommonCfg.Channel = NewChannel;
+					AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
+					AsicLockChannel(pAd, pAd->CommonCfg.Channel);
+					DBGPRINT(RT_DEBUG_TRACE, ("&&&&&&&&&&&&&&&&PeerChSwAnnAction - STA receive channel switch announcement IE (New Channel =%d)\n", NewChannel));
+					break;
+				}
+			}
+
+			if (index >= pAd->ChannelListNum)
+			{
+				DBGPRINT_ERR(("&&&&&&&&&&&&&&&&&&&&&&&&&&PeerChSwAnnAction(can not find New Channel=%d in ChannelList[%d]\n", pAd->CommonCfg.Channel, pAd->ChannelListNum));
+			}
+		}
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	return;
+}
+
+
+/*
+	==========================================================================
+	Description:
+		Measurement Request action frame handler.
+		
+	Parametrs:
+		Elme - MLME message containing the received frame
+	
+	Return	: None.
+	==========================================================================
+ */
+static VOID PeerMeasureReqAction(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	PFRAME_802_11 pFr = (PFRAME_802_11)Elem->Msg;
+	UINT8 DialogToken;
+	MEASURE_REQ_INFO MeasureReqInfo;
+	MEASURE_REQ	MeasureReq;
+	MEASURE_REPORT_MODE ReportMode;
+
+	if(PeerMeasureReqSanity(pAd, Elem->Msg, Elem->MsgLen, &DialogToken, &MeasureReqInfo, &MeasureReq))
+	{
+		ReportMode.word = 0;
+		ReportMode.field.Incapable = 1;
+		EnqueueMeasurementRep(pAd, pFr->Hdr.Addr2, DialogToken, MeasureReqInfo.Token, ReportMode.word, MeasureReqInfo.ReqType, 0, NULL);
+	}
+
+	return;
+}
+
+/*
+	==========================================================================
+	Description:
+		Measurement Report action frame handler.
+		
+	Parametrs:
+		Elme - MLME message containing the received frame
+	
+	Return	: None.
+	==========================================================================
+ */
+static VOID PeerMeasureReportAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+{
+	MEASURE_REPORT_INFO MeasureReportInfo;
+	PFRAME_802_11 pFr = (PFRAME_802_11)Elem->Msg;
+	UINT8 DialogToken;
+	PUINT8 pMeasureReportInfo;
+
+/*	if (pAd->CommonCfg.bIEEE80211H != TRUE)*/
+/*		return;*/
+
+	os_alloc_mem(pAd, (UCHAR **)&pMeasureReportInfo, sizeof(MEASURE_RPI_REPORT));
+/*	if ((pMeasureReportInfo = kmalloc(sizeof(MEASURE_RPI_REPORT), GFP_ATOMIC)) == NULL)*/
+	if (pMeasureReportInfo == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s unable to alloc memory for measure report buffer (size=%d).\n", __FUNCTION__, sizeof(MEASURE_RPI_REPORT)));
+		return;
+	}
+
+	NdisZeroMemory(&MeasureReportInfo, sizeof(MEASURE_REPORT_INFO));
+	NdisZeroMemory(pMeasureReportInfo, sizeof(MEASURE_RPI_REPORT));
+	if (PeerMeasureReportSanity(pAd, Elem->Msg, Elem->MsgLen, &DialogToken, &MeasureReportInfo, pMeasureReportInfo))
+	{
+		do {
+			PMEASURE_REQ_ENTRY pEntry = NULL;
+
+			/* Not a autonomous measure report.*/
+			/* check the dialog token field. drop it if the dialog token doesn't match.*/
+			if ((DialogToken != 0)
+				&& ((pEntry = MeasureReqLookUp(pAd, DialogToken)) == NULL))
+				break;
+
+			if (pEntry != NULL)
+				MeasureReqDelete(pAd, pEntry->DialogToken);
+
+			if (MeasureReportInfo.ReportType == RM_BASIC)
+			{
+				PMEASURE_BASIC_REPORT pBasicReport = (PMEASURE_BASIC_REPORT)pMeasureReportInfo;
+				if ((pBasicReport->Map.field.Radar)
+					&& (DfsRequirementCheck(pAd, pBasicReport->ChNum) == TRUE))
+				{
+					NotifyChSwAnnToPeerAPs(pAd, pFr->Hdr.Addr1, pFr->Hdr.Addr2, 1, pBasicReport->ChNum);
+					StartDFSProcedure(pAd, pBasicReport->ChNum, 1);
+				}
+			}
+		} while (FALSE);
+	}
+	else
+		DBGPRINT(RT_DEBUG_TRACE, ("Invalid Measurement Report Frame.\n"));
+
+/*	kfree(pMeasureReportInfo);*/
+	os_free_mem(NULL, pMeasureReportInfo);
+
+	return;
+}
+
+/*
+	==========================================================================
+	Description:
+		TPC Request action frame handler.
+		
+	Parametrs:
+		Elme - MLME message containing the received frame
+	
+	Return	: None.
+	==========================================================================
+ */
+static VOID PeerTpcReqAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+{
+	PFRAME_802_11 pFr = (PFRAME_802_11)Elem->Msg;
+	PUCHAR pFramePtr = pFr->Octet;
+	UINT8 DialogToken;
+	UINT8 TxPwr = GetCurTxPwr(pAd, Elem->Wcid);
+	UINT8 LinkMargin = 0;
+	CHAR RealRssi;
+
+	/* link margin: Ratio of the received signal power to the minimum desired by the station (STA). The*/
+	/*				STA may incorporate rate information and channel conditions, including interference, into its computation*/
+	/*				of link margin.*/
+
+	RealRssi = RTMPMaxRssi(pAd, ConvertToRssi(pAd, Elem->Rssi0, RSSI_0),
+								ConvertToRssi(pAd, Elem->Rssi1, RSSI_1),
+								ConvertToRssi(pAd, Elem->Rssi2, RSSI_2));
+
+	/* skip Category and action code.*/
+	pFramePtr += 2;
+
+	/* Dialog token.*/
+	NdisMoveMemory(&DialogToken, pFramePtr, 1);
+
+	LinkMargin = (RealRssi / MIN_RCV_PWR);
+	if (PeerTpcReqSanity(pAd, Elem->Msg, Elem->MsgLen, &DialogToken))
+		EnqueueTPCRep(pAd, pFr->Hdr.Addr2, DialogToken, TxPwr, LinkMargin);
+
+	return;
+}
+
+/*
+	==========================================================================
+	Description:
+		TPC Report action frame handler.
+		
+	Parametrs:
+		Elme - MLME message containing the received frame
+	
+	Return	: None.
+	==========================================================================
+ */
+static VOID PeerTpcRepAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+{
+	UINT8 DialogToken;
+	TPC_REPORT_INFO TpcRepInfo;
+	PTPC_REQ_ENTRY pEntry = NULL;
+
+	NdisZeroMemory(&TpcRepInfo, sizeof(TPC_REPORT_INFO));
+	if (PeerTpcRepSanity(pAd, Elem->Msg, Elem->MsgLen, &DialogToken, &TpcRepInfo))
+	{
+		if ((pEntry = TpcReqLookUp(pAd, DialogToken)) != NULL)
+		{
+			TpcReqDelete(pAd, pEntry->DialogToken);
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: DialogToken=%x, TxPwr=%d, LinkMargin=%d\n",
+				__FUNCTION__, DialogToken, TpcRepInfo.TxPwr, TpcRepInfo.LinkMargin));
+		}
+	}
+
+	return;
+}
+
+/*
+	==========================================================================
+	Description:
+		Spectrun action frames Handler such as channel switch annoucement,
+		measurement report, measurement request actions frames.
+		
+	Parametrs:
+		Elme - MLME message containing the received frame
+	
+	Return	: None.
+	==========================================================================
+ */
+VOID PeerSpectrumAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+{
+
+	UCHAR	Action = Elem->Msg[LENGTH_802_11+1];
+
+	if (pAd->CommonCfg.bIEEE80211H != TRUE)
+		return;
+
+	switch(Action)
+	{
+		case SPEC_MRQ:
+			/* current rt2860 unable do such measure specified in Measurement Request.*/
+			/* reject all measurement request.*/
+			PeerMeasureReqAction(pAd, Elem);
+			break;
+
+		case SPEC_MRP:
+			PeerMeasureReportAction(pAd, Elem);
+			break;
+
+		case SPEC_TPCRQ:
+			PeerTpcReqAction(pAd, Elem);
+			break;
+
+		case SPEC_TPCRP:
+			PeerTpcRepAction(pAd, Elem);
+			break;
+
+		case SPEC_CHANNEL_SWITCH:
+
+#ifdef DOT11N_DRAFT3
+			{
+				SEC_CHA_OFFSET_IE	Secondary;
+				CHA_SWITCH_ANNOUNCE_IE	ChannelSwitch;
+
+				/* 802.11h only has Channel Switch Announcement IE. */
+				RTMPMoveMemory(&ChannelSwitch, &Elem->Msg[LENGTH_802_11+4], sizeof (CHA_SWITCH_ANNOUNCE_IE));
+					
+				/* 802.11n D3.03 adds secondary channel offset element in the end.*/
+				if (Elem->MsgLen ==  (LENGTH_802_11 + 2 + sizeof (CHA_SWITCH_ANNOUNCE_IE) + sizeof (SEC_CHA_OFFSET_IE)))
+				{
+					RTMPMoveMemory(&Secondary, &Elem->Msg[LENGTH_802_11+9], sizeof (SEC_CHA_OFFSET_IE));
+				}
+				else
+				{
+					Secondary.SecondaryChannelOffset = 0;
+				}
+
+				if ((Elem->Msg[LENGTH_802_11+2] == IE_CHANNEL_SWITCH_ANNOUNCEMENT) && (Elem->Msg[LENGTH_802_11+3] == 3))
+				{
+					ChannelSwitchAction(pAd, Elem->Wcid, ChannelSwitch.NewChannel, Secondary.SecondaryChannelOffset);
+				}
+			}
+#endif /* DOT11N_DRAFT3 */
+
+			PeerChSwAnnAction(pAd, Elem);
+			break;
+	}
+
+	return;
+}
+
+/*
+	==========================================================================
+	Description:
+		
+	Parametrs:
+	
+	Return	: None.
+	==========================================================================
+ */
+INT Set_MeasureReq_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	UINT Aid = 1;
+	UINT ArgIdx;
+	PSTRING thisChar;
+
+	MEASURE_REQ_MODE MeasureReqMode;
+	UINT8 MeasureReqToken = RandomByte(pAd);
+	UINT8 MeasureReqType = RM_BASIC;
+	UINT8 MeasureCh = 1;
+	UINT64 MeasureStartTime = GetCurrentTimeStamp(pAd);
+	MEASURE_REQ MeasureReq;
+	UINT8 TotalLen;
+
+	HEADER_802_11 ActHdr;
+	PUCHAR pOutBuffer = NULL;
+	NDIS_STATUS NStatus;
+	ULONG FrameLen;
+
+	NStatus = MlmeAllocateMemory(pAd, (PVOID)&pOutBuffer);  /*Get an unused nonpaged memory*/
+	if(NStatus != NDIS_STATUS_SUCCESS)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("%s() allocate memory failed \n", __FUNCTION__));
+		goto END_OF_MEASURE_REQ;
+	}
+
+	ArgIdx = 1;
+	while ((thisChar = strsep((char **)&arg, "-")) != NULL)
+	{
+		switch(ArgIdx)
+		{
+			case 1:	/* Aid.*/
+				Aid = (UINT8) simple_strtol(thisChar, 0, 16);
+				break;
+
+			case 2: /* Measurement Request Type.*/
+				MeasureReqType = simple_strtol(thisChar, 0, 16);
+				if (MeasureReqType > 3)
+				{
+					DBGPRINT(RT_DEBUG_ERROR, ("%s: unknow MeasureReqType(%d)\n", __FUNCTION__, MeasureReqType));
+					goto END_OF_MEASURE_REQ;
+				}
+				break;
+
+			case 3: /* Measurement channel.*/
+				MeasureCh = (UINT8) simple_strtol(thisChar, 0, 16);
+				break;
+		}
+		ArgIdx++;
+	}	
+
+	DBGPRINT(RT_DEBUG_TRACE, ("%s::Aid = %d, MeasureReqType=%d MeasureCh=%d\n", __FUNCTION__, Aid, MeasureReqType, MeasureCh));
+	if (!VALID_WCID(Aid))
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: unknow sta of Aid(%d)\n", __FUNCTION__, Aid));
+		goto END_OF_MEASURE_REQ;
+	}
+
+	MeasureReqMode.word = 0;
+	MeasureReqMode.field.Enable = 1;
+
+	MeasureReqInsert(pAd, MeasureReqToken);
+
+	/* build action frame header.*/
+	MgtMacHeaderInit(pAd, &ActHdr, SUBTYPE_ACTION, 0, pAd->MacTab.Content[Aid].Addr,
+						pAd->CurrentAddress);
+
+	NdisMoveMemory(pOutBuffer, (PCHAR)&ActHdr, sizeof(HEADER_802_11));
+	FrameLen = sizeof(HEADER_802_11);
+
+	TotalLen = sizeof(MEASURE_REQ_INFO) + sizeof(MEASURE_REQ);
+
+	MakeMeasurementReqFrame(pAd, pOutBuffer, &FrameLen,
+		sizeof(MEASURE_REQ_INFO), CATEGORY_RM, RM_BASIC,
+		MeasureReqToken, MeasureReqMode.word,
+		MeasureReqType, 1);
+
+	MeasureReq.ChNum = MeasureCh;
+	MeasureReq.MeasureStartTime = cpu2le64(MeasureStartTime);
+	MeasureReq.MeasureDuration = cpu2le16(2000);
+
+	{
+		ULONG TempLen;
+		MakeOutgoingFrame(	pOutBuffer+FrameLen,	&TempLen,
+							sizeof(MEASURE_REQ),	&MeasureReq,
+							END_OF_ARGS);
+		FrameLen += TempLen;
+	}
+
+	MiniportMMRequest(pAd, QID_AC_BE, pOutBuffer, (UINT)FrameLen);
+
+END_OF_MEASURE_REQ:
+	MlmeFreeMemory(pAd, pOutBuffer);
+
+	return TRUE;
+}
+
+INT Set_TpcReq_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	UINT Aid;
+
+	UINT8 TpcReqToken = RandomByte(pAd);
+
+	Aid = (UINT) simple_strtol(arg, 0, 16);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("%s::Aid = %d\n", __FUNCTION__, Aid));
+	if (!VALID_WCID(Aid))
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: unknow sta of Aid(%d)\n", __FUNCTION__, Aid));
+		return TRUE;
+	}
+
+	TpcReqInsert(pAd, TpcReqToken);
+
+	EnqueueTPCReq(pAd, pAd->MacTab.Content[Aid].Addr, TpcReqToken);
+
+	return TRUE;
+}
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/action.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/action.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/action.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/action.h	2017-09-23 03:42:49.774675809 +0800
@@ -0,0 +1,52 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef	__ACTION_H__
+#define	__ACTION_H__
+
+typedef struct GNU_PACKED __HT_INFO_OCTET {
+#ifdef RT_BIG_ENDIAN
+	UCHAR Reserved:5;
+	UCHAR STA_Channel_Width:1;
+	UCHAR Forty_MHz_Intolerant:1;
+	UCHAR Request:1;
+#else
+	UCHAR Request:1;
+	UCHAR Forty_MHz_Intolerant:1;
+	UCHAR STA_Channel_Width:1;
+	UCHAR Reserved:5;
+#endif
+} HT_INFORMATION_OCTET;
+
+typedef struct GNU_PACKED __FRAME_HT_INFO {
+	HEADER_802_11 Hdr;
+	UCHAR Category;
+	UCHAR Action;
+	HT_INFORMATION_OCTET HT_Info;
+} FRAME_HT_INFO, *PFRAME_HT_INFO;
+
+#endif /* __ACTION_H__ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/ags.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/ags.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/ags.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/ags.h	2017-09-23 03:42:49.774675809 +0800
@@ -0,0 +1,116 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __AGS_H__
+#define __AGS_H__
+
+
+extern UCHAR AGS1x1HTRateTable[];
+
+extern UCHAR AGS2x2HTRateTable[];
+
+extern UCHAR AGS3x3HTRateTable[];
+
+
+
+#define AGS_TX_QUALITY_WORST_BOUND       8
+    
+/* */
+/* The size, in bytes, of an AGS entry in the rate switch table */
+/* */
+#define SIZE_OF_AGS_RATE_TABLE_ENTRY	9
+    
+
+typedef struct _RTMP_TX_RATE_SWITCH_AGS {
+	
+
+	UCHAR	ItemNo;
+	
+#ifdef RT_BIG_ENDIAN
+	UCHAR	Rsv2:2;
+	UCHAR	Mode:2;
+	UCHAR	Rsv1:1;	
+	UCHAR	BW:1;
+	UCHAR	ShortGI:1;
+	UCHAR	STBC:1;
+#else
+	UCHAR	STBC:1;
+	UCHAR	ShortGI:1;
+	UCHAR	BW:1;
+	UCHAR	Rsv1:1;
+	UCHAR	Mode:2;
+	UCHAR	Rsv2:2;
+#endif /* RT_BIG_ENDIAN */
+
+	UCHAR	CurrMCS;
+	UCHAR	TrainUp;
+	UCHAR	TrainDown;
+	UCHAR	downMcs;
+	UCHAR	upMcs3;
+	UCHAR	upMcs2;
+	UCHAR	upMcs1;
+} RTMP_TX_RATE_SWITCH_AGS, *PRTMP_TX_RATE_SWITCH_AGS;
+
+/* */
+/* AGS control */
+/* */
+typedef struct _AGS_CONTROL {
+
+	UCHAR MCSGroup; /* The MCS group under testing */
+	UCHAR lastRateIdx;
+} AGS_CONTROL,*PAGS_CONTROL;
+
+/* */
+/* The statistics information for AGS */
+/* */
+typedef struct _AGS_STATISTICS_INFO {
+
+	CHAR	RSSI;
+	ULONG	TxErrorRatio;
+	ULONG	AccuTxTotalCnt;
+	ULONG	TxTotalCnt;
+	ULONG	TxSuccess;
+	ULONG	TxRetransmit;
+	ULONG	TxFailCount;
+} AGS_STATISTICS_INFO, *PAGS_STATISTICS_INFO;
+
+
+/* */
+/* Support AGS (Adaptive Group Switching) */
+/* */
+#define SUPPORT_AGS(__pAd)			(IS_RT3593(__pAd))
+    
+#define AGS_IS_USING(__pAd, __pRateTable)			\
+    (SUPPORT_AGS(__pAd) && \
+     ((__pRateTable == AGS1x1HTRateTable) || \
+      (__pRateTable == AGS2x2HTRateTable) || \
+      (__pRateTable == AGS3x3HTRateTable))) 
+ 
+
+#endif /* __AGS_H__ */
+    
+/* End of ags.h */ 
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/ap_diversity.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/ap_diversity.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/ap_diversity.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/ap_diversity.h	2017-09-23 03:42:49.774675809 +0800
@@ -0,0 +1,149 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef _AP_DIVERSITY_H_
+#define _AP_DIVERSITY_H_
+
+#include "rtmp.h"
+
+#define ADDBGPRINT(format,args...)	do{if(atomic_read(&DEBUG_VERBOSE_MODE))	printk( format, ##args);}while(0)
+#define PROC_DIR	"AntDiv"
+
+/*
+ *		TAB width:8
+ */
+
+/*
+ *  For shorter udelay().
+ *  (ripped from rtmp.h)
+ */
+/*#define RTMP_BBP_IO_READ8_BY_REG_ID(_A, _I, _pV)    {} */
+/* Read BBP register by register's ID. Generate PER to test BA */
+#define RTMP_BBP_IO_READ8_BY_REG_ID_SHORT_DELAY(_A, _I, _pV)		\
+{									\
+	BBP_CSR_CFG_STRUC  BbpCsr;					\
+	int	i, k;							\
+	if ((_A)->bPCIclkOff == FALSE)                     		\
+	{                                                   		\
+		for (i=0; i<MAX_BUSY_COUNT; i++)                    	\
+		{                                                   	\
+			RTMP_IO_READ32(_A, H2M_BBP_AGENT, &BbpCsr.word);\
+			if (BbpCsr.field.Busy == BUSY)			\
+				continue;                               \
+			BbpCsr.word = 0;                                \
+			BbpCsr.field.fRead = 1;                         \
+			BbpCsr.field.BBP_RW_MODE = 1;                   \
+			BbpCsr.field.Busy = 1;                          \
+			BbpCsr.field.RegNum = _I;                       \
+			RTMP_IO_WRITE32(_A, H2M_BBP_AGENT, BbpCsr.word);\
+			AsicSendCommandToMcu(_A, 0x80, 0xff, 0x0, 0x0);	\
+			RTMPusecDelay(10);				\
+			for (k=0; k<MAX_BUSY_COUNT; k++)		\
+			{                                               \
+				RTMP_IO_READ32(_A, H2M_BBP_AGENT, &BbpCsr.word);			\
+				if (BbpCsr.field.Busy == IDLE)          \
+					break;                          \
+				else					\
+					printk("MCU busy\n");		\
+			}                                               \
+			if ((BbpCsr.field.Busy == IDLE) &&              \
+				(BbpCsr.field.RegNum == _I))            \
+			{                                               \
+				*(_pV) = (UCHAR)BbpCsr.field.Value;     \
+				break;                                  \
+			}                                               \
+		}                                                   	\
+		if (BbpCsr.field.Busy == BUSY)                      	\
+		{                                                   	\
+			DBGPRINT_ERR(("BBP read R%d=0x%x fail\n", _I, BbpCsr.word));	\
+			*(_pV) = (_A)->BbpWriteLatch[_I];               \
+			RTMP_IO_READ32(_A, H2M_BBP_AGENT, &BbpCsr.word);\
+			BbpCsr.field.Busy = 0;                          \
+			RTMP_IO_WRITE32(_A, H2M_BBP_AGENT, BbpCsr.word);\
+		}                                                   \
+	}                   \
+}
+
+
+/*
+ * proc fs related macros.
+ */
+#define CREATE_PROC_ENTRY(x)	\
+	if ((pProc##x = create_proc_entry(#x, 0, pProcDir))){		\
+		pProc##x->read_proc = (read_proc_t*)&x##Read;		\
+		pProc##x->write_proc = (write_proc_t*)&x##Write;	\
+	}								\
+
+#define IMPLEMENT_PROC_ENTRY(x,y,z)			\
+static struct proc_dir_entry *pProc##x;			\
+IMPLEMENT_PROC_ENTRY_READ(x,y,z)			\
+IMPLEMENT_PROC_ENTRY_WRITE(x,y,z)
+
+#define IMPLEMENT_PROC_ENTRY_READ(x,y,z)		\
+static INT x##Read(char *page, char **start, off_t off,	\
+		   int count, int *eof, void *data){	\
+	INT	len;					\
+	sprintf(page, "%d\n", atomic_read(&x));		\
+	len = strlen(page) + 1;				\
+	*eof = 1;					\
+	return len;					\
+}
+#define IMPLEMENT_PROC_ENTRY_WRITE(x,y,z)		\
+static INT x##Write(struct file *file, const char *buffer, \
+			 unsigned long count, void *data){ \
+	CHAR tmp[32];INT tmp_val;			\
+	if (count > 32)	count = 32;			\
+	memset(tmp, 0, 32);				\
+	if (copy_from_user(tmp, buffer, count))		\
+		return -EFAULT;				\
+	tmp_val = simple_strtol(tmp, 0, 10);		\
+	if(tmp_val > z || tmp_val < y)			\
+		return -EFAULT;				\
+	atomic_set(&x,  (int)tmp_val);			\
+	return count;					\
+}
+#define DESTORY_PROC_ENTRY(x) if (pProc##x)	remove_proc_entry(#x, pProcDir);
+
+/*
+ * function prototype
+ */
+VOID RT3XXX_AntDiversity_Init(
+    IN PRTMP_ADAPTER pAd
+);
+
+VOID RT3XXX_AntDiversity_Fini(
+    IN PRTMP_ADAPTER pAd
+);
+
+VOID AntDiversity_Update_Rssi_Sample(
+	IN PRTMP_ADAPTER        pAd,
+	IN RSSI_SAMPLE          *pRssi,
+	IN PRXWI_STRUC          pRxWI
+);
+                        
+
+#endif
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/ap.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/ap.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/ap.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/ap.h	2017-09-23 03:42:49.774675809 +0800
@@ -0,0 +1,523 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __AP_H__
+#define __AP_H__
+
+
+/* ============================================================= */
+/*      Function Prototypes */
+/* ============================================================= */
+
+/* ap_data.c */
+
+BOOLEAN APBridgeToWirelessSta(
+    IN  PRTMP_ADAPTER   pAd,
+    IN  PUCHAR          pHeader,
+    IN  UINT            HdrLen,
+    IN  PUCHAR          pData,
+    IN  UINT            DataLen,
+    IN  ULONG           fromwdsidx);
+
+VOID RTMP_BASetup(
+	IN PRTMP_ADAPTER pAd,
+	IN PMAC_TABLE_ENTRY pMacEntry,
+	IN UINT8 UserPriority);
+
+VOID	APSendPackets(
+	IN	NDIS_HANDLE		MiniportAdapterContext,
+	IN	PPNDIS_PACKET	ppPacketArray,
+	IN	UINT			NumberOfPackets);
+
+NDIS_STATUS APSendPacket(
+    IN  PRTMP_ADAPTER   pAd,
+    IN  PNDIS_PACKET    pPacket);
+
+NDIS_STATUS APInsertPsQueue(
+	IN PRTMP_ADAPTER pAd,
+	IN PNDIS_PACKET pPacket,
+	IN MAC_TABLE_ENTRY *pMacEntry,
+	IN UCHAR QueIdx);
+
+NDIS_STATUS APHardTransmit(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	TX_BLK			*pTxBlk,
+	IN	UCHAR			QueIdx);
+
+VOID APRxEAPOLFrameIndicate(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	MAC_TABLE_ENTRY	*pEntry,
+	IN	RX_BLK			*pRxBlk,
+	IN	UCHAR			FromWhichBSSID);
+
+NDIS_STATUS APCheckRxError(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PRT28XX_RXD_STRUC		pRxD,
+	IN	UCHAR			Wcid);
+
+BOOLEAN APCheckClass2Class3Error(
+    IN  PRTMP_ADAPTER   pAd,
+	IN ULONG Wcid, 
+	IN  PHEADER_802_11  pHeader);
+
+VOID APHandleRxPsPoll(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PUCHAR			pAddr,
+	IN	USHORT			Aid,
+    IN	BOOLEAN			isActive);
+
+VOID    RTMPDescriptorEndianChange(
+    IN  PUCHAR          pData,
+    IN  ULONG           DescriptorType);
+    
+VOID    RTMPFrameEndianChange(
+    IN  PRTMP_ADAPTER   pAd,
+    IN  PUCHAR          pData,
+    IN  ULONG           Dir,
+    IN  BOOLEAN         FromRxDoneInt);
+
+/* ap_assoc.c */
+
+VOID APAssocStateMachineInit(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  STATE_MACHINE *S, 
+    OUT STATE_MACHINE_FUNC Trans[]);
+
+VOID  APPeerAssocReqAction(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  MLME_QUEUE_ELEM *Elem);
+
+VOID  APPeerReassocReqAction(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  MLME_QUEUE_ELEM *Elem);
+
+VOID  APPeerDisassocReqAction(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  MLME_QUEUE_ELEM *Elem);
+
+VOID MbssKickOutStas(
+	IN PRTMP_ADAPTER pAd,
+	IN INT apidx,
+	IN USHORT Reason);
+
+VOID APMlmeKickOutSta(
+    IN PRTMP_ADAPTER pAd, 
+	IN PUCHAR pStaAddr, 
+	IN UCHAR Wcid,
+	IN USHORT Reason);
+
+VOID APMlmeDisassocReqAction(
+    IN PRTMP_ADAPTER pAd, 
+    IN MLME_QUEUE_ELEM *Elem);
+
+VOID  APCls3errAction(
+    IN  PRTMP_ADAPTER   pAd, 
+	IN 	ULONG Wcid,
+    IN	PHEADER_802_11	pHeader);
+
+
+USHORT APBuildAssociation(
+    IN PRTMP_ADAPTER pAd,
+    IN MAC_TABLE_ENTRY *pEntry,
+    IN USHORT CapabilityInfo,
+    IN UCHAR  MaxSupportedRateIn500Kbps,
+    IN UCHAR  *RSN,
+    IN UCHAR  *pRSNLen, 
+    IN BOOLEAN bWmmCapable,
+    IN ULONG  RalinkIe,
+    IN EXT_CAP_INFO_ELEMENT ExtCapInfo,
+	IN HT_CAPABILITY_IE		*pHtCapability,
+	OUT UCHAR		 *pHtCapabilityLen,
+    OUT USHORT *pAid);
+
+/*
+VOID	RTMPAddClientSec(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR	BssIdx,
+	IN UCHAR		 KeyIdx,
+	IN UCHAR		 CipherAlg,
+	IN PUCHAR		 pKey,
+	IN PUCHAR		 pTxMic,
+	IN PUCHAR		 pRxMic,
+	IN MAC_TABLE_ENTRY *pEntry);
+*/
+
+/* ap_auth.c */
+
+void APAuthStateMachineInit(
+    IN PRTMP_ADAPTER pAd, 
+    IN STATE_MACHINE *Sm, 
+    OUT STATE_MACHINE_FUNC Trans[]);
+
+VOID APCls2errAction(
+    IN PRTMP_ADAPTER pAd, 
+	IN 	ULONG Wcid,
+    IN	PHEADER_802_11	pHeader);
+
+/* ap_connect.c */
+
+
+VOID APMakeBssBeacon(
+    IN  PRTMP_ADAPTER   pAd,
+	IN	INT				apidx);
+
+VOID  APUpdateBeaconFrame(
+    IN  PRTMP_ADAPTER   pAd,
+	IN	INT				apidx);
+
+VOID APMakeAllBssBeacon(
+    IN  PRTMP_ADAPTER   pAd);
+
+VOID  APUpdateAllBeaconFrame(
+    IN  PRTMP_ADAPTER   pAd);
+
+
+/* ap_sync.c */
+
+VOID APSyncStateMachineInit(
+    IN PRTMP_ADAPTER pAd,
+    IN STATE_MACHINE *Sm,
+    OUT STATE_MACHINE_FUNC Trans[]);
+
+VOID APScanTimeout(
+	IN PVOID SystemSpecific1,
+	IN PVOID FunctionContext,
+	IN PVOID SystemSpecific2,
+	IN PVOID SystemSpecific3);
+
+VOID APInvalidStateWhenScan(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem);
+
+VOID APScanTimeoutAction(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem);
+
+VOID APPeerProbeReqAction(
+    IN  PRTMP_ADAPTER pAd, 
+    IN  MLME_QUEUE_ELEM *Elem);
+
+VOID APPeerBeaconAction(
+    IN PRTMP_ADAPTER pAd, 
+    IN MLME_QUEUE_ELEM *Elem);
+
+VOID APMlmeScanReqAction(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem);
+
+VOID APPeerBeaconAtScanAction(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem);
+
+VOID APScanCnclAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem);
+
+VOID ApSiteSurvey(
+	IN	PRTMP_ADAPTER  		pAd,
+	IN	PNDIS_802_11_SSID	pSsid,
+	IN	UCHAR				ScanType,
+	IN	BOOLEAN				ChannelSel);
+
+VOID SupportRate(
+	IN PUCHAR SupRate,
+	IN UCHAR SupRateLen,
+	IN PUCHAR ExtRate,
+	IN UCHAR ExtRateLen,
+	OUT PUCHAR *Rates,
+	OUT PUCHAR RatesLen,
+	OUT PUCHAR pMaxSupportRate);
+
+
+BOOLEAN ApScanRunning(
+	IN PRTMP_ADAPTER pAd);
+	
+#ifdef DOT11N_DRAFT3
+VOID APOverlappingBSSScan(
+	IN RTMP_ADAPTER *pAd);
+
+INT GetBssCoexEffectedChRange(
+	IN RTMP_ADAPTER *pAd,
+	IN BSS_COEX_CH_RANGE *pCoexChRange);
+
+#endif /* DOT11N_DRAFT3 */
+
+/* ap_wpa.c */
+VOID WpaStateMachineInit(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  STATE_MACHINE *Sm, 
+    OUT STATE_MACHINE_FUNC Trans[]);
+
+/* ap_mlme.c */
+VOID APMlmePeriodicExec(
+    IN  PRTMP_ADAPTER   pAd);
+
+VOID APMlmeSelectTxRateTable(
+	IN PRTMP_ADAPTER		pAd,
+	IN PMAC_TABLE_ENTRY		pEntry,
+	IN PUCHAR				*ppTable,
+	IN PUCHAR				pTableSize,
+	IN PUCHAR				pInitTxRateIdx);
+
+VOID APMlmeSetTxRate(
+	IN PRTMP_ADAPTER		pAd,
+	IN PMAC_TABLE_ENTRY		pEntry,
+	IN PRTMP_TX_RATE_SWITCH	pTxRate);
+
+VOID APMlmeSelectRateSwitchTable11N3SReplacement(
+	IN PUCHAR	*ppTable);
+
+
+VOID APMlmeDynamicTxRateSwitching(
+    IN PRTMP_ADAPTER pAd);
+
+VOID APQuickResponeForRateUpExec(
+    IN PVOID SystemSpecific1, 
+    IN PVOID FunctionContext, 
+    IN PVOID SystemSpecific2, 
+    IN PVOID SystemSpecific3);
+
+BOOLEAN APMsgTypeSubst(
+    IN PRTMP_ADAPTER pAd,
+    IN PFRAME_802_11 pFrame, 
+    OUT INT *Machine, 
+    OUT INT *MsgType);
+
+VOID APQuickResponeForRateUpExec(
+    IN PVOID SystemSpecific1, 
+    IN PVOID FunctionContext, 
+    IN PVOID SystemSpecific2, 
+    IN PVOID SystemSpecific3);
+
+#ifdef NEW_RATE_ADAPT_SUPPORT
+VOID APMlmeDynamicTxRateSwitchingAdapt(
+    IN PRTMP_ADAPTER pAd,
+    IN ULONG idx);
+
+VOID APQuickResponeForRateUpExecAdapt(
+    IN PRTMP_ADAPTER pAd,
+    IN ULONG idx);
+#endif /*NEW_RATE_ADAPT_SUPPORT */
+
+#ifdef RTMP_MAC_USB
+VOID BeaconUpdateExec(
+    IN PVOID SystemSpecific1, 
+    IN PVOID FunctionContext, 
+    IN PVOID SystemSpecific2, 
+    IN PVOID SystemSpecific3);
+#endif /* RTMP_MAC_USB */
+
+VOID RTMPSetPiggyBack(
+	IN PRTMP_ADAPTER	pAd,
+	IN BOOLEAN			bPiggyBack);
+
+VOID APAsicEvaluateRxAnt(
+	IN PRTMP_ADAPTER	pAd);
+
+VOID APAsicRxAntEvalTimeout(
+	IN PRTMP_ADAPTER	pAd);
+
+/* ap.c */
+NDIS_STATUS APInitialize(
+    IN  PRTMP_ADAPTER   pAd);
+
+VOID APShutdown(
+    IN PRTMP_ADAPTER    pAd);
+
+VOID APStartUp(
+    IN  PRTMP_ADAPTER   pAd);
+
+VOID APStop(
+    IN  PRTMP_ADAPTER   pAd);
+
+VOID APCleanupPsQueue(
+    IN  PRTMP_ADAPTER   pAd,
+    IN  PQUEUE_HEADER   pQueue);
+
+VOID MacTableReset(
+    IN  PRTMP_ADAPTER   pAd);
+
+MAC_TABLE_ENTRY *MacTableInsertEntry(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  PUCHAR          pAddr,
+	IN	UCHAR			apidx,
+	IN	UCHAR           OpMode,
+	IN BOOLEAN	CleanAll); 
+
+BOOLEAN MacTableDeleteEntry(
+    IN  PRTMP_ADAPTER   pAd, 
+	IN USHORT wcid,
+    IN  PUCHAR          pAddr);
+
+MAC_TABLE_ENTRY *MacTableLookup(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  PUCHAR          pAddr);
+
+VOID MacTableMaintenance(
+    IN PRTMP_ADAPTER pAd);
+
+UINT32 MacTableAssocStaNumGet(
+	IN PRTMP_ADAPTER pAd);
+
+MAC_TABLE_ENTRY *APSsPsInquiry(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  PUCHAR          pAddr, 
+    OUT SST             *Sst, 
+    OUT USHORT          *Aid,
+    OUT UCHAR           *PsMode,
+    OUT UCHAR           *Rate); 
+
+BOOLEAN APPsIndicate(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  PUCHAR          pAddr, 
+	IN ULONG Wcid, 
+    IN  UCHAR           Psm);
+
+#ifdef SYSTEM_LOG_SUPPORT
+VOID ApLogEvent(
+    IN PRTMP_ADAPTER    pAd,
+    IN PUCHAR           pAddr,
+    IN USHORT           Event);
+#else
+#define ApLogEvent(_pAd, _pAddr, _Event)
+#endif /* SYSTEM_LOG_SUPPORT */
+
+#ifdef DOT11_N_SUPPORT
+VOID APUpdateOperationMode(
+    IN PRTMP_ADAPTER pAd);
+#endif /* DOT11_N_SUPPORT */
+
+VOID APUpdateCapabilityAndErpIe(
+	IN PRTMP_ADAPTER pAd);
+
+BOOLEAN ApCheckAccessControlList(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR        pAddr,
+	IN UCHAR         Apidx);
+
+VOID ApUpdateAccessControlList(
+    IN PRTMP_ADAPTER pAd,
+    IN UCHAR         Apidx);
+
+VOID ApEnqueueNullFrame(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR        pAddr,
+	IN UCHAR         TxRate,
+	IN UCHAR         PID,
+	IN UCHAR         apidx,
+    IN BOOLEAN       bQosNull,
+    IN BOOLEAN       bEOSP,
+    IN UCHAR         OldUP);
+
+/* ap_sanity.c */
+
+
+BOOLEAN PeerAssocReqCmmSanity(
+    IN PRTMP_ADAPTER pAd, 
+	IN BOOLEAN isRessoc,
+    IN VOID *Msg, 
+    IN ULONG MsgLen, 
+    OUT PUCHAR pAddr2,
+    OUT USHORT *pCapabilityInfo, 
+    OUT USHORT *pListenInterval, 
+    OUT PUCHAR pApAddr,
+    OUT UCHAR *pSsidLen,
+    OUT char *Ssid,
+    OUT UCHAR *pRatesLen,
+    OUT UCHAR Rates[],
+    OUT UCHAR *RSN,
+    OUT UCHAR *pRSNLen,
+    OUT BOOLEAN *pbWmmCapable,
+    OUT ULONG  *pRalinkIe,
+    OUT EXT_CAP_INFO_ELEMENT	*pExtCapInfo,
+    OUT UCHAR		 *pHtCapabilityLen,
+    OUT HT_CAPABILITY_IE *pHtCapability);
+
+
+BOOLEAN PeerDisassocReqSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN VOID *Msg, 
+    IN ULONG MsgLen, 
+    OUT PUCHAR pAddr2, 
+    OUT	UINT16	*SeqNum,
+    OUT USHORT *Reason);
+
+BOOLEAN PeerDeauthReqSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN VOID *Msg, 
+    IN ULONG MsgLen, 
+    OUT PUCHAR pAddr2, 
+   	OUT	UINT16	*SeqNum,    
+    OUT USHORT *Reason);
+
+BOOLEAN APPeerAuthSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN VOID *Msg, 
+    IN ULONG MsgLen, 
+	OUT PUCHAR pAddr1, 
+    OUT PUCHAR pAddr2, 
+    OUT USHORT *Alg, 
+    OUT USHORT *Seq, 
+    OUT USHORT *Status, 
+    OUT CHAR *ChlgText
+	);
+
+
+#ifdef DOT1X_SUPPORT
+/* ap_cfg.h */
+INT	Set_OwnIPAddr_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_EAPIfName_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_PreAuthIfName_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+/* Define in ap.c */
+BOOLEAN DOT1X_InternalCmdAction(
+    IN  PRTMP_ADAPTER	pAd,
+    IN  MAC_TABLE_ENTRY *pEntry,
+    IN	UINT8			cmd);
+
+BOOLEAN DOT1X_EapTriggerAction(
+    IN  PRTMP_ADAPTER	pAd,
+    IN  MAC_TABLE_ENTRY *pEntry);
+#endif /* DOT1X_SUPPORT */
+#endif  /* __AP_H__ */
+
+VOID AP_E2PROM_IOCTL_PostCtrl(
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN	PSTRING					msg);
+
+VOID IAPP_L2_UpdatePostCtrl(
+	IN PRTMP_ADAPTER	pAd,
+    IN UINT8 *mac_p,
+    IN INT  bssid);
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/br_ftph.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/br_ftph.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/br_ftph.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/br_ftph.h	2017-09-23 03:42:49.774675809 +0800
@@ -0,0 +1,86 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __BR_FTPH_H__
+#define __BR_FTPH_H__
+
+/* Public function prototype */
+/*
+========================================================================
+Routine Description:
+	Init bridge fast path module.
+
+Arguments:
+	None
+
+Return Value:
+	None
+
+Note:
+	Used in module init.
+========================================================================
+*/
+VOID BG_FTPH_Init(VOID);
+
+/*
+========================================================================
+Routine Description:
+	Remove bridge fast path module.
+
+Arguments:
+	None
+
+Return Value:
+	None
+
+Note:
+	Used in module remove.
+========================================================================
+*/
+VOID BG_FTPH_Remove(VOID);
+
+/*
+========================================================================
+Routine Description:
+	Forward the received packet.
+
+Arguments:
+	pPacket			- the received packet
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+UINT32 BG_FTPH_PacketFromApHandle(
+	IN		PNDIS_PACKET	pPacket);
+
+#endif /* __BR_FTPH_H__ */
+
+/* End of br_ftph.h */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/cfg80211extr.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/cfg80211extr.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/cfg80211extr.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/cfg80211extr.h	2017-09-23 03:42:49.778675798 +0800
@@ -0,0 +1,186 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifdef RT_CFG80211_SUPPORT
+
+#define RT_CFG80211_REGISTER(__pDev, __pNetDev)								\
+	CFG80211_Register(__pDev, __pNetDev);
+
+#define RT_CFG80211_BEACON_CR_PARSE(__pAd, __pVIE, __LenVIE)				\
+	CFG80211_BeaconCountryRegionParse((VOID *)__pAd, __pVIE, __LenVIE);
+
+#define RT_CFG80211_CRDA_REG_HINT(__pAd, __pCountryIe, __CountryIeLen)		\
+	CFG80211_RegHint((VOID *)__pAd, __pCountryIe, __CountryIeLen);
+
+#define RT_CFG80211_CRDA_REG_HINT11D(__pAd, __pCountryIe, __CountryIeLen)	\
+	CFG80211_RegHint11D((VOID *)__pAd, __pCountryIe, __CountryIeLen);
+
+#define RT_CFG80211_CRDA_REG_RULE_APPLY(__pAd)								\
+	CFG80211_RegRuleApply((VOID *)__pAd, NULL, __pAd->Cfg80211_Alpha2);
+
+#define RT_CFG80211_SCANNING_INFORM(__pAd, __BssIdx, __ChanId, __pFrame,	\
+			__FrameLen, __RSSI)									\
+	CFG80211_Scaning((VOID *)__pAd, __BssIdx, __ChanId, __pFrame,			\
+						__FrameLen, __RSSI);
+
+#define RT_CFG80211_SCAN_END(__pAd, __FlgIsAborted)							\
+	CFG80211_ScanEnd((VOID *)__pAd, __FlgIsAborted);
+
+#define RT_CFG80211_REINIT(__pAd)											\
+	CFG80211_SupBandReInit((VOID *)__pAd);									\
+
+#define RT_CFG80211_CONN_RESULT_INFORM(__pAd, __pBSSID, __pReqIe, __ReqIeLen,\
+			__pRspIe, __RspIeLen, __FlgIsSuccess)							\
+	CFG80211_ConnectResultInform((VOID *)__pAd, __pBSSID,					\
+			__pReqIe, __ReqIeLen, __pRspIe, __RspIeLen, __FlgIsSuccess);
+
+#define RT_CFG80211_RFKILL_STATUS_UPDATE(_pAd, _active) \
+	CFG80211_RFKillStatusUpdate(_pAd, _active);
+
+#ifdef SINGLE_SKU
+#define CFG80211_BANDINFO_FILL(__pAd, __pBandInfo)							\
+{																			\
+	(__pBandInfo)->RFICType = __pAd->RFICType;								\
+	(__pBandInfo)->MpduDensity = __pAd->CommonCfg.BACapability.field.MpduDensity;\
+	(__pBandInfo)->TxStream = __pAd->CommonCfg.TxStream;					\
+	(__pBandInfo)->RxStream = __pAd->CommonCfg.RxStream;					\
+	(__pBandInfo)->MaxTxPwr = __pAd->CommonCfg.DefineMaxTxPwr;				\
+	if (__pAd->CommonCfg.PhyMode == PHY_11B)								\
+		(__pBandInfo)->FlgIsBMode = TRUE;									\
+	else																	\
+		(__pBandInfo)->FlgIsBMode = FALSE;									\
+	(__pBandInfo)->MaxBssTable = MAX_LEN_OF_BSS_TABLE;						\
+	(__pBandInfo)->RtsThreshold = pAd->CommonCfg.RtsThreshold;				\
+	(__pBandInfo)->FragmentThreshold = pAd->CommonCfg.FragmentThreshold;	\
+	(__pBandInfo)->RetryMaxCnt = 0;											\
+	RTMP_IO_READ32(__pAd, TX_RTY_CFG, &((__pBandInfo)->RetryMaxCnt));		\
+}
+#else
+#define CFG80211_BANDINFO_FILL(__pAd, __pBandInfo)							\
+{																			\
+	(__pBandInfo)->RFICType = __pAd->RFICType;								\
+	(__pBandInfo)->MpduDensity = __pAd->CommonCfg.BACapability.field.MpduDensity;\
+	(__pBandInfo)->TxStream = __pAd->CommonCfg.TxStream;					\
+	(__pBandInfo)->RxStream = __pAd->CommonCfg.RxStream;					\
+	(__pBandInfo)->MaxTxPwr = 0;											\
+	if (__pAd->CommonCfg.PhyMode == PHY_11B)								\
+		(__pBandInfo)->FlgIsBMode = TRUE;									\
+	else																	\
+		(__pBandInfo)->FlgIsBMode = FALSE;									\
+	(__pBandInfo)->MaxBssTable = MAX_LEN_OF_BSS_TABLE;						\
+	(__pBandInfo)->RtsThreshold = pAd->CommonCfg.RtsThreshold;				\
+	(__pBandInfo)->FragmentThreshold = pAd->CommonCfg.FragmentThreshold;	\
+	(__pBandInfo)->RetryMaxCnt = 0;											\
+	RTMP_IO_READ32(__pAd, TX_RTY_CFG, &((__pBandInfo)->RetryMaxCnt));		\
+}
+#endif /* SINGLE_SKU */
+
+
+/* utilities used in DRV module */
+BOOLEAN CFG80211DRV_OpsSetChannel(
+	VOID						*pAdOrg,
+	VOID						*pData);
+
+BOOLEAN CFG80211DRV_OpsChgVirtualInf(
+	VOID						*pAdOrg,
+	VOID						*pFlgFilter,
+	UINT8						IfType);
+
+BOOLEAN CFG80211DRV_OpsScan(
+	VOID						*pAdOrg);
+
+BOOLEAN CFG80211DRV_OpsJoinIbss(
+	VOID						*pAdOrg,
+	VOID						*pData);
+
+BOOLEAN CFG80211DRV_OpsLeave(
+	VOID						*pAdOrg);
+
+BOOLEAN CFG80211DRV_StaGet(
+	VOID						*pAdOrg,
+	VOID						*pData);
+
+BOOLEAN CFG80211DRV_Connect(
+	VOID						*pAdOrg,
+	VOID						*pData);
+
+BOOLEAN CFG80211DRV_KeyAdd(
+	VOID						*pAdOrg,
+	VOID						*pData);
+
+VOID CFG80211DRV_RegNotify(
+	VOID						*pAdOrg,
+	VOID						*pData);
+
+VOID CFG80211_RegHint(
+	IN VOID						*pAdCB,
+	IN UCHAR					*pCountryIe,
+	IN ULONG					CountryIeLen);
+
+VOID CFG80211_RegHint11D(
+	IN VOID						*pAdCB,
+	IN UCHAR					*pCountryIe,
+	IN ULONG					CountryIeLen);
+
+VOID CFG80211_ScanEnd(
+	IN VOID						*pAdCB,
+	IN BOOLEAN					FlgIsAborted);
+
+VOID CFG80211_ConnectResultInform(
+	IN VOID						*pAdCB,
+	IN UCHAR					*pBSSID,
+	IN UCHAR					*pReqIe,
+	IN UINT32					ReqIeLen,
+	IN UCHAR					*pRspIe,
+	IN UINT32					RspIeLen,
+	IN UCHAR					FlgIsSuccess);
+
+BOOLEAN CFG80211_SupBandReInit(
+	IN VOID						*pAdCB);
+
+VOID CFG80211_RegRuleApply(
+	IN VOID						*pAdCB,
+	IN VOID						*pWiphy,
+	IN UCHAR					*pAlpha2);
+
+VOID CFG80211_Scaning(
+	IN VOID						*pAdCB,
+	IN UINT32					BssIdx,
+	IN UINT32					ChanId,
+	IN UCHAR					*pFrame,
+	IN UINT32					FrameLen,
+	IN INT32					RSSI);
+
+#ifdef RFKILL_HW_SUPPORT
+VOID CFG80211_RFKillStatusUpdate(
+	IN PVOID	pAd,
+	IN BOOLEAN	active);
+#endif /* RFKILL_HW_SUPPORT */
+
+#endif /* RT_CFG80211_SUPPORT */
+
+/* End of cfg80211extr.h */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/cfg80211.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/cfg80211.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/cfg80211.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/cfg80211.h	2017-09-23 03:42:49.778675798 +0800
@@ -0,0 +1,80 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifdef RT_CFG80211_SUPPORT
+
+#include <linux/ieee80211.h>
+
+typedef struct __CFG80211_CB {
+
+	/* we can change channel/rate information on the fly so we backup them */
+	struct ieee80211_supported_band Cfg80211_bands[IEEE80211_NUM_BANDS];
+	struct ieee80211_channel *pCfg80211_Channels;
+	struct ieee80211_rate *pCfg80211_Rates;
+
+	/* used in wiphy_unregister */
+	struct wireless_dev *pCfg80211_Wdev;
+
+	/* used in scan end */
+	struct cfg80211_scan_request *pCfg80211_ScanReq;
+
+	/* monitor filter */
+	UINT32 MonFilterFlag;
+} CFG80211_CB;
+
+
+
+
+/*
+========================================================================
+Routine Description:
+	Register MAC80211 Module.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	pDev			- Generic device interface
+	pNetDev			- Network device
+
+Return Value:
+	NONE
+
+Note:
+	pDev != pNetDev
+	#define SET_NETDEV_DEV(net, pdev)	((net)->dev.parent = (pdev))
+
+	Can not use pNetDev to replace pDev; Or kernel panic.
+========================================================================
+*/
+BOOLEAN CFG80211_Register(
+	VOID						*pAd,
+	struct device				*pDev,
+	struct net_device			*pNetDev);
+
+
+#endif /* RT_CFG80211_SUPPORT */
+
+/* End of cfg80211.h */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/chip/chip_id.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/chip/chip_id.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/chip/chip_id.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/chip/chip_id.h	2017-09-23 03:42:49.778675798 +0800
@@ -0,0 +1,63 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __CHIP_ID_H__
+#define __CHIP_ID_H__
+
+
+#define NIC_PCI_VENDOR_ID		0x1814
+
+#define NIC2860_PCI_DEVICE_ID	0x0601
+#define NIC2860_PCIe_DEVICE_ID	0x0681
+#define NIC2760_PCI_DEVICE_ID	0x0701		/* 1T/2R Cardbus ??? */
+#define NIC2790_PCIe_DEVICE_ID  0x0781		/* 1T/2R miniCard */
+
+#define VEN_AWT_PCIe_DEVICE_ID	0x1059
+#define VEN_AWT_PCI_VENDOR_ID	0x1A3B
+
+#define EDIMAX_PCI_VENDOR_ID	0x1432
+
+#define NIC3090_PCIe_DEVICE_ID  0x3090		/* 1T/1R miniCard */
+#define NIC3091_PCIe_DEVICE_ID  0x3091		/* 1T/2R miniCard */
+#define NIC3092_PCIe_DEVICE_ID  0x3092		/* 2T/2R miniCard */
+#define NIC3390_PCIe_DEVICE_ID  0x3390		/* 1T/1R miniCard */
+
+#define NIC3062_PCI_DEVICE_ID	0x3062		/* 2T/2R miniCard */
+#define NIC3562_PCI_DEVICE_ID	0x3562		/* 2T/2R miniCard */
+#define NIC3060_PCI_DEVICE_ID	0x3060		/* 1T/1R miniCard */
+
+#define NIC3592_PCIe_DEVICE_ID	0x3592		/* 2T/2R miniCard */
+
+
+#define NIC3593_PCI_OR_PCIe_DEVICE_ID	0x3593
+#define NIC5390_PCIe_DEVICE_ID	0x5390
+#define NIC539F_PCIe_DEVICE_ID  0x539F
+#define NIC5392_PCIe_DEVICE_ID  0x5392
+#define NIC5362_PCI_DEVICE_ID	0x5362
+#define NIC5360_PCI_DEVICE_ID   0x5360
+
+#endif /* __CHIP_ID_H__ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/chip/mac_usb.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/chip/mac_usb.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/chip/mac_usb.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/chip/mac_usb.h	2017-09-23 03:42:49.778675798 +0800
@@ -0,0 +1,547 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __MAC_USB_H__
+#define __MAC_USB_H__
+
+#include "rtmp_type.h"
+#include "chip/rtmp_mac.h"
+#include "chip/rtmp_phy.h"
+#include "rtmp_iface.h"
+#include "rtmp_dot11.h"
+
+
+#define USB_CYC_CFG				0x02a4
+
+/*#define BEACON_RING_SIZE		2 */
+#define MGMTPIPEIDX				0	/* EP6 is highest priority */
+
+/* os abl move */
+/*#define RTMP_PKT_TAIL_PADDING 	11 // 3(max 4 byte padding) + 4 (last packet padding) + 4 (MaxBulkOutsize align padding) */
+
+#define fRTMP_ADAPTER_NEED_STOP_TX		\
+		(fRTMP_ADAPTER_NIC_NOT_EXIST | fRTMP_ADAPTER_HALT_IN_PROGRESS |	\
+		 fRTMP_ADAPTER_RESET_IN_PROGRESS | fRTMP_ADAPTER_BULKOUT_RESET | \
+		 fRTMP_ADAPTER_RADIO_OFF | fRTMP_ADAPTER_REMOVE_IN_PROGRESS)
+
+/* */
+/* RXINFO appends at the end of each rx packet. */
+/* */
+#define RXINFO_SIZE				4
+#define RT2870_RXDMALEN_FIELD_SIZE	4
+
+#ifdef RT_BIG_ENDIAN
+typedef	struct	GNU_PACKED _RXINFO_STRUC {
+	UINT32		PlcpSignal:12;
+	UINT32		LastAMSDU:1;
+	UINT32		CipherAlg:1;
+	UINT32		PlcpRssil:1;
+	UINT32		Decrypted:1;
+	UINT32		AMPDU:1;		/* To be moved */
+	UINT32		L2PAD:1;
+	UINT32		RSSI:1;
+	UINT32		HTC:1;
+	UINT32		AMSDU:1;		/* rx with 802.3 header, not 802.11 header. */
+	UINT32		CipherErr:2;        /* 0: decryption okay, 1:ICV error, 2:MIC error, 3:KEY not valid */
+	UINT32		Crc:1;              /* 1: CRC error */
+	UINT32		MyBss:1;  	/* 1: this frame belongs to the same BSSID */
+	UINT32		Bcast:1;            /* 1: this is a broadcast frame */
+	UINT32		Mcast:1;            /* 1: this is a multicast frame */
+	UINT32		U2M:1;              /* 1: this RX frame is unicast to me */
+	UINT32		FRAG:1;
+	UINT32		NULLDATA:1;
+	UINT32		DATA:1;
+	UINT32		BA:1;
+}	RXINFO_STRUC, *PRXINFO_STRUC, RT28XX_RXD_STRUC, *PRT28XX_RXD_STRUC;
+#else
+typedef	struct	GNU_PACKED _RXINFO_STRUC {
+	UINT32		BA:1;
+	UINT32		DATA:1;
+	UINT32		NULLDATA:1;
+	UINT32		FRAG:1;
+	UINT32		U2M:1;              /* 1: this RX frame is unicast to me */
+	UINT32		Mcast:1;            /* 1: this is a multicast frame */
+	UINT32		Bcast:1;            /* 1: this is a broadcast frame */
+	UINT32		MyBss:1;  	/* 1: this frame belongs to the same BSSID */
+	UINT32		Crc:1;              /* 1: CRC error */
+	UINT32		CipherErr:2;        /* 0: decryption okay, 1:ICV error, 2:MIC error, 3:KEY not valid */
+	UINT32		AMSDU:1;		/* rx with 802.3 header, not 802.11 header. */
+	UINT32		HTC:1;
+	UINT32		RSSI:1;
+	UINT32		L2PAD:1;
+	UINT32		AMPDU:1;		/* To be moved */
+	UINT32		Decrypted:1;
+	UINT32		PlcpRssil:1;
+	UINT32		CipherAlg:1;
+	UINT32		LastAMSDU:1;
+	UINT32		PlcpSignal:12;
+}	RXINFO_STRUC, *PRXINFO_STRUC, RT28XX_RXD_STRUC, *PRT28XX_RXD_STRUC;
+#endif
+
+
+/* */
+/* TXINFO */
+/* */
+#define TXINFO_SIZE				4
+
+#ifdef RT_BIG_ENDIAN
+typedef	struct	_TXINFO_STRUC {
+	/* Word	0 */
+	UINT32		USBDMATxburst:1;/*used ONLY in USB bulk Aggre. Force USB DMA transmit frame from current selected endpoint */
+	UINT32		USBDMANextVLD:1;	/*used ONLY in USB bulk Aggregation, NextValid */
+	UINT32		rsv2:2;  /* Software use. */
+#ifndef USB_BULK_BUF_ALIGMENT
+	UINT32		SwUseLastRound:1; /* Software use. */
+#else
+	UINT32		bFragLasAlignmentsectiontRound:1;/* Software use */
+#endif /* USB_BULK_BUF_ALIGMENT */
+	UINT32		QSEL:2;	/* select on-chip FIFO ID for 2nd-stage output scheduler.0:MGMT, 1:HCCA 2:EDCA */
+	UINT32		WIV:1;	/* Wireless Info Valid. 1 if Driver already fill WI,  o if DMA needs to copy WI to correctposition */
+	UINT32		rsv:8;
+	UINT32		USBDMATxPktLen:16;	/*used ONLY in USB bulk Aggregation,  Total byte counts of all sub-frame. */
+}	TXINFO_STRUC, *PTXINFO_STRUC;
+#else
+typedef	struct	_TXINFO_STRUC {
+	/* Word	0 */
+	UINT32		USBDMATxPktLen:16;	/*used ONLY in USB bulk Aggregation,  Total byte counts of all sub-frame. */
+	UINT32		rsv:8;
+	UINT32		WIV:1;	/* Wireless Info Valid. 1 if Driver already fill WI,  o if DMA needs to copy WI to correctposition */
+	UINT32		QSEL:2;	/* select on-chip FIFO ID for 2nd-stage output scheduler.0:MGMT, 1:HCCA 2:EDCA */
+#ifndef USB_BULK_BUF_ALIGMENT
+	UINT32		SwUseLastRound:1; /* Software use. */
+#else
+	UINT32		bFragLasAlignmentsectiontRound:1;/* Software use */
+#endif /* USB_BULK_BUF_ALIGMENT */
+	UINT32		rsv2:2;  /* Software use. */
+	UINT32		USBDMANextVLD:1;	/*used ONLY in USB bulk Aggregation, NextValid */
+	UINT32		USBDMATxburst:1;/*used ONLY in USB bulk Aggre. Force USB DMA transmit frame from current selected endpoint */
+}	TXINFO_STRUC, *PTXINFO_STRUC;
+#endif
+
+
+/* */
+/* Management ring buffer format */
+/* */
+typedef	struct	_MGMT_STRUC	{
+	BOOLEAN		Valid;
+	PUCHAR		pBuffer;
+	ULONG		Length;
+}	MGMT_STRUC, *PMGMT_STRUC;
+
+
+/*////////////////////////////////////////////////////////////////////////*/
+/* The TX_BUFFER structure forms the transmitted USB packet to the device */
+/*////////////////////////////////////////////////////////////////////////*/
+typedef struct __TX_BUFFER{
+	union{
+		UCHAR			WirelessPacket[TX_BUFFER_NORMSIZE];
+		HEADER_802_11	NullFrame;
+		PSPOLL_FRAME	PsPollPacket;
+		RTS_FRAME		RTSFrame;
+	}field;
+	UCHAR			Aggregation[4];  /*Buffer for save Aggregation size. */
+} TX_BUFFER, *PTX_BUFFER;
+
+typedef struct __HTTX_BUFFER{
+	union{
+		UCHAR			WirelessPacket[MAX_TXBULK_SIZE];
+		HEADER_802_11	NullFrame;
+		PSPOLL_FRAME	PsPollPacket;
+		RTS_FRAME		RTSFrame;
+	}field;
+	UCHAR			Aggregation[4];  /*Buffer for save Aggregation size. */
+} HTTX_BUFFER, *PHTTX_BUFFER;
+
+
+#define EDCA_AC0_PIPE	0	/* Bulk EP1 OUT */
+#define EDCA_AC1_PIPE	1	/* Bulk EP2 OUT */
+#define EDCA_AC2_PIPE	2	/* Bulk EP3	OUT */
+#define	EDCA_AC3_PIPE	3	/* Bulk EP4 OUT */
+#define	HCCA_PIPE		4	/* Bulk EP5	OUT */
+
+/* used to track driver-generated write irps */
+typedef struct _TX_CONTEXT
+{
+	PVOID			pAd;		/*Initialized in MiniportInitialize */
+	PURB			pUrb;			/*Initialized in MiniportInitialize */
+	PIRP			pIrp;			/*used to cancel pending bulk out. */
+									/*Initialized in MiniportInitialize */
+	PTX_BUFFER		TransferBuffer;	/*Initialized in MiniportInitialize */
+	ULONG			BulkOutSize;
+	UCHAR			BulkOutPipeId;
+	UCHAR			SelfIdx;
+	BOOLEAN			InUse;
+	BOOLEAN			bWaitingBulkOut; /* at least one packet is in this TxContext, ready for making IRP anytime. */
+	BOOLEAN			bFullForBulkOut; /* all tx buffer are full , so waiting for tx bulkout. */
+	BOOLEAN			IRPPending;
+	BOOLEAN			LastOne;
+	BOOLEAN			bAggregatible;
+	UCHAR			Header_802_3[LENGTH_802_3];
+	UCHAR			Rsv[2];
+	ULONG			DataOffset;
+	UINT			TxRate;
+	ra_dma_addr_t		data_dma;
+
+}	TX_CONTEXT, *PTX_CONTEXT, **PPTX_CONTEXT;
+
+
+/* used to track driver-generated write irps */
+typedef struct _HT_TX_CONTEXT
+{
+	PVOID			pAd;		/*Initialized in MiniportInitialize */
+	PURB			pUrb;			/*Initialized in MiniportInitialize */
+	PIRP			pIrp;			/*used to cancel pending bulk out. */
+									/*Initialized in MiniportInitialize */
+	PHTTX_BUFFER	TransferBuffer;	/*Initialized in MiniportInitialize */
+	ULONG			BulkOutSize;	/* Indicate the total bulk-out size in bytes in one bulk-transmission */
+	UCHAR			BulkOutPipeId;
+	BOOLEAN			IRPPending;
+	BOOLEAN			LastOne;
+	BOOLEAN			bCurWriting;
+	BOOLEAN			bRingEmpty;
+	BOOLEAN			bCopySavePad;
+	UCHAR			SavedPad[8];
+	UCHAR			Header_802_3[LENGTH_802_3];
+	ULONG			CurWritePosition;		/* Indicate the buffer offset which packet will be inserted start from. */
+	ULONG			CurWriteRealPos;		/* Indicate the buffer offset which packet now are writing to. */
+	ULONG			NextBulkOutPosition;	/* Indicate the buffer start offset of a bulk-transmission */
+	ULONG			ENextBulkOutPosition;	/* Indicate the buffer end offset of a bulk-transmission */
+	UINT			TxRate;
+	ra_dma_addr_t		data_dma;		/* urb dma on linux */
+#ifdef USB_BULK_BUF_ALIGMENT
+	ULONG 			CurWriteIdx;	/* pointer to next 32k bytes position when wirte tx resource or when bulk out sizze not > 0x6000 */
+	ULONG 			NextBulkIdx;	/* pointer to next alignment section when bulk ot */
+#endif /* USB_BULK_BUF_ALIGMENT */
+
+}	HT_TX_CONTEXT, *PHT_TX_CONTEXT, **PPHT_TX_CONTEXT;
+
+
+/* */
+/* Structure to keep track of receive packets and buffers to indicate */
+/* receive data to the protocol. */
+/* */
+typedef struct _RX_CONTEXT
+{
+	PUCHAR				TransferBuffer; 
+	PVOID				pAd;
+	PIRP				pIrp;/*used to cancel pending bulk in. */
+	PURB				pUrb;
+	/*These 2 Boolean shouldn't both be 1 at the same time. */
+	ULONG				BulkInOffset;	/* number of packets waiting for reordering . */
+/*	BOOLEAN				ReorderInUse;	// At least one packet in this buffer are in reordering buffer and wait for receive indication */
+	BOOLEAN				bRxHandling;	/* Notify this packet is being process now. */
+	BOOLEAN				InUse;			/* USB Hardware Occupied. Wait for USB HW to put packet. */
+	BOOLEAN				Readable;		/* Receive Complete back. OK for driver to indicate receiving packet. */
+	BOOLEAN				IRPPending;		/* TODO: To be removed */
+	/*atomic_t				IrpLock; */
+	NDIS_SPIN_LOCK		RxContextLock;
+	ra_dma_addr_t			data_dma;		/* urb dma on linux */
+}	RX_CONTEXT, *PRX_CONTEXT;
+
+#ifdef RT_BIG_ENDIAN
+typedef union _TX_ATTENUATION_CTRL_STRUC
+{
+	struct
+	{
+		ULONG	Reserve1:20;
+		ULONG	PCIE_PHY_TX_ATTEN_EN:1;
+		ULONG	PCIE_PHY_TX_ATTEN_VALUE:3;
+		ULONG	Reserve2:7;
+		ULONG	RF_ISOLATION_ENABLE:1;
+	} field;
+
+	ULONG	word;
+} TX_ATTENUATION_CTRL_STRUC, *PTX_ATTENUATION_CTRL_STRUC;
+#else
+typedef union _TX_ATTENUATION_CTRL_STRUC {
+	struct
+	{
+		ULONG	RF_ISOLATION_ENABLE:1;
+		ULONG	Reserve2:7;
+		ULONG	PCIE_PHY_TX_ATTEN_VALUE:3;
+		ULONG	PCIE_PHY_TX_ATTEN_EN:1;
+		ULONG	Reserve1:20;		
+	} field;
+	
+	ULONG	word;
+} TX_ATTENUATION_CTRL_STRUC, *PTX_ATTENUATION_CTRL_STRUC;
+#endif
+
+
+/******************************************************************************
+
+  	USB Frimware Related MACRO
+
+******************************************************************************/
+/* 8051 firmware image for usb - use last-half base address = 0x3000 */
+#define FIRMWARE_IMAGE_BASE			0x3000
+#define MAX_FIRMWARE_IMAGE_SIZE		0x1000    /* 4kbyte */
+
+#define RTMP_WRITE_FIRMWARE(_pAd, _pFwImage, _FwLen)		\
+	RTUSBFirmwareWrite(_pAd, _pFwImage, _FwLen)
+	
+
+
+/******************************************************************************
+
+  	USB TX Related MACRO 
+  	
+******************************************************************************/
+#define RTMP_START_DEQUEUE(pAd, QueIdx, irqFlags)				\
+			{													\
+				RTMP_IRQ_LOCK(&pAd->DeQueueLock[QueIdx], irqFlags);		\
+				if (pAd->DeQueueRunning[QueIdx])						\
+				{														\
+					RTMP_IRQ_UNLOCK(&pAd->DeQueueLock[QueIdx], irqFlags);\
+					DBGPRINT(RT_DEBUG_OFF, ("DeQueueRunning[%d]= TRUE!\n", QueIdx));		\
+					continue;											\
+				}														\
+				else													\
+				{														\
+					pAd->DeQueueRunning[QueIdx] = TRUE;					\
+					RTMP_IRQ_UNLOCK(&pAd->DeQueueLock[QueIdx], irqFlags);\
+				}														\
+			}
+
+#define RTMP_STOP_DEQUEUE(pAd, QueIdx, irqFlags)						\
+			do{															\
+				RTMP_IRQ_LOCK(&pAd->DeQueueLock[QueIdx], irqFlags);		\
+				pAd->DeQueueRunning[QueIdx] = FALSE;					\
+				RTMP_IRQ_UNLOCK(&pAd->DeQueueLock[QueIdx], irqFlags);	\
+			}while(0)
+
+#define	RTMP_HAS_ENOUGH_FREE_DESC(pAd, pTxBlk, freeNum, pPacket) \
+		(RTUSBFreeDescriptorRequest(pAd, pTxBlk->QueIdx, (pTxBlk->TotalFrameLen + GET_OS_PKT_LEN(pPacket))) == NDIS_STATUS_SUCCESS)
+
+#define RTMP_RELEASE_DESC_RESOURCE(pAd, QueIdx)			\
+		do{}while(0)
+
+#define NEED_QUEUE_BACK_FOR_AGG(_pAd, _QueIdx, _freeNum, _TxFrameType) 		\
+		((_TxFrameType == TX_RALINK_FRAME) && (RTUSBNeedQueueBackForAgg(_pAd, _QueIdx)))	
+
+#define HAL_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber)	\
+			RtmpUSB_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber)
+			
+#define HAL_WriteTxResource(pAd, pTxBlk,bIsLast, pFreeNumber)	\
+			RtmpUSB_WriteSingleTxResource(pAd, pTxBlk,bIsLast, pFreeNumber)
+
+#define HAL_WriteFragTxResource(pAd, pTxBlk, fragNum, pFreeNumber) \
+			RtmpUSB_WriteFragTxResource(pAd, pTxBlk, fragNum, pFreeNumber)
+			
+#define HAL_WriteMultiTxResource(pAd, pTxBlk,frameNum, pFreeNumber)	\
+			RtmpUSB_WriteMultiTxResource(pAd, pTxBlk,frameNum, pFreeNumber)
+	
+#define HAL_FinalWriteTxResource(pAd, pTxBlk, totalMPDUSize, TxIdx)	\
+			RtmpUSB_FinalWriteTxResource(pAd, pTxBlk, totalMPDUSize, TxIdx)
+
+#define HAL_LastTxIdx(pAd, QueIdx,TxIdx) \
+			/*RtmpUSBDataLastTxIdx(pAd, QueIdx,TxIdx)*/
+	
+#define HAL_KickOutTx(pAd, pTxBlk, QueIdx)	\
+			RtmpUSBDataKickOut(pAd, pTxBlk, QueIdx)
+
+#define HAL_KickOutMgmtTx(pAd, QueIdx, pPacket, pSrcBufVA, SrcBufLen)	\
+			RtmpUSBMgmtKickOut(pAd, QueIdx, pPacket, pSrcBufVA, SrcBufLen)
+
+#define HAL_KickOutNullFrameTx(_pAd, _QueIdx, _pNullFrame, _frameLen)	\
+			RtmpUSBNullFrameKickOut(_pAd, _QueIdx, _pNullFrame, _frameLen)
+
+#define GET_TXRING_FREENO(_pAd, _QueIdx)	(_QueIdx) /*(_pAd->TxRing[_QueIdx].TxSwFreeIdx) */
+#define GET_MGMTRING_FREENO(_pAd)			(_pAd->MgmtRing.TxSwFreeIdx)
+
+
+/* ----------------- RX Related MACRO ----------------- */
+
+
+/* 
+  *	Device Hardware Interface Related MACRO
+  */
+#define RTMP_IRQ_INIT(pAd)				do{}while(0)
+#define RTMP_IRQ_ENABLE(pAd)			do{}while(0)
+
+
+/* 
+  *	MLME Related MACRO 
+  */
+#define RTMP_MLME_HANDLER(pAd)			RTUSBMlmeUp(&(pAd->mlmeTask))
+
+#define RTMP_MLME_PRE_SANITY_CHECK(pAd)								\
+	{	if ((pAd->StaCfg.bHardwareRadio == TRUE) && 					\
+			(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)) &&		\
+			(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS))) {	\
+			RTEnqueueInternalCmd(pAd, CMDTHREAD_CHECK_GPIO, NULL, 0); } }
+
+#define RTMP_MLME_STA_QUICK_RSP_WAKE_UP(pAd)	\
+	{	RTEnqueueInternalCmd(pAd, CMDTHREAD_QKERIODIC_EXECUT, NULL, 0);	\
+		RTUSBMlmeUp(&(pAd->mlmeTask)); }
+
+#define RTMP_MLME_RESET_STATE_MACHINE(pAd)	\
+		        MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_RESET_CONF, 0, NULL, 0);	\
+		        RTUSBMlmeUp(&(pAd->mlmeTask));
+
+#define RTMP_HANDLE_COUNTER_MEASURE(_pAd, _pEntry)		\
+	{	RTEnqueueInternalCmd(_pAd, CMDTHREAD_802_11_COUNTER_MEASURE, _pEntry, sizeof(MAC_TABLE_ENTRY));	\
+		RTUSBMlmeUp(&(_pAd->mlmeTask));									\
+	}
+
+
+/*
+  *	Power Save Related MACRO 
+  */
+#ifdef CONFIG_STA_SUPPORT
+#define RTMP_PS_POLL_ENQUEUE(pAd)						\
+	{	RTUSB_SET_BULK_FLAG(pAd, fRTUSB_BULK_OUT_PSPOLL);	\
+		RTUSBKickBulkOut(pAd); }
+
+#define RTMP_STA_FORCE_WAKEUP(_pAd, bFromTx) \
+	RT28xxUsbStaAsicForceWakeup(_pAd, bFromTx);
+
+#define RTMP_STA_SLEEP_THEN_AUTO_WAKEUP(pAd, TbttNumToNextWakeUp) \
+    RT28xxUsbStaAsicSleepThenAutoWakeup(pAd, TbttNumToNextWakeUp);
+
+#define RTMP_SET_PSM_BIT(_pAd, _val) \
+	{\
+		if ((_pAd)->StaCfg.WindowsPowerMode == Ndis802_11PowerModeFast_PSP) \
+			MlmeSetPsmBit(_pAd, _val);\
+		else \
+		{ \
+			USHORT _psm_val; \
+			_psm_val = _val; \
+			RTEnqueueInternalCmd(_pAd, CMDTHREAD_SET_PSM_BIT, &(_psm_val), sizeof(USHORT)); \
+		}\
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+#define RTMP_MLME_RADIO_ON(pAd) \
+    RT28xxUsbMlmeRadioOn(pAd);
+
+#define RTMP_MLME_RADIO_OFF(pAd) \
+    RT28xxUsbMlmeRadioOFF(pAd);
+
+/* MAC Search table */
+/* add this entry into ASIC RX WCID search table */
+#define RTMP_STA_ENTRY_ADD(pAd, pEntry)							\
+{																\
+	RT_SET_ASIC_WCID	Info;									\
+																\
+	Info.WCID = pEntry->Aid;									\
+	NdisMoveMemory(Info.Addr, pEntry->Addr, MAC_ADDR_LEN);		\
+																\
+	RTEnqueueInternalCmd(pAd, CMDTHREAD_SET_CLIENT_MAC_ENTRY, 	\
+							&Info, sizeof(RT_SET_ASIC_WCID));	\
+}
+
+/* ----------------- Security Related MACRO ----------------- */
+
+/* Set Asic WCID Attribute table */
+#define RTMP_SET_WCID_SEC_INFO(_pAd, _BssIdx, _KeyIdx, _CipherAlg, _Wcid, _KeyTabFlag)	\
+{																						\
+	RT_ASIC_WCID_SEC_INFO Info;															\
+																						\
+	Info.BssIdx = _BssIdx;																\
+	Info.KeyIdx = _KeyIdx;																\
+	Info.CipherAlg = _CipherAlg;														\
+	Info.Wcid = _Wcid;																	\
+	Info.KeyTabFlag = _KeyTabFlag;														\
+																						\
+	RTEnqueueInternalCmd(_pAd, CMDTHREAD_SET_WCID_SEC_INFO, 							\
+							&Info, sizeof(RT_ASIC_WCID_SEC_INFO));						\
+}
+
+/* Set Asic WCID IV/EIV table */
+#define RTMP_ASIC_WCID_IVEIV_TABLE(_pAd, _Wcid, _uIV, _uEIV)	\
+{																\
+	RT_ASIC_WCID_IVEIV_ENTRY	Info;							\
+																\
+	Info.Wcid = _Wcid;											\
+	Info.Iv = _uIV;												\
+	Info.Eiv = _uEIV;											\
+																\
+	RTEnqueueInternalCmd(_pAd, CMDTHREAD_SET_ASIC_WCID_IVEIV, 	\
+							&Info, 								\
+							sizeof(RT_ASIC_WCID_IVEIV_ENTRY));	\
+}
+
+/* Set Asic WCID Attribute table */
+#define RTMP_ASIC_WCID_ATTR_TABLE(_pAd, _BssIdx, _KeyIdx, _CipherAlg, _Wcid, _KeyTabFlag)	\
+{																							\
+	RT_ASIC_WCID_ATTR_ENTRY Info;															\
+																							\
+	Info.BssIdx = _BssIdx;																	\
+	Info.KeyIdx = _KeyIdx;																	\
+	Info.CipherAlg = _CipherAlg;															\
+	Info.Wcid = _Wcid;																		\
+	Info.KeyTabFlag = _KeyTabFlag;															\
+																							\
+	RTEnqueueInternalCmd(_pAd, CMDTHREAD_SET_ASIC_WCID_ATTR, 								\
+							&Info, sizeof(RT_ASIC_WCID_ATTR_ENTRY));						\
+}
+
+/* Set Asic Pairwise key table */
+#define RTMP_ASIC_PAIRWISE_KEY_TABLE(_pAd, _WCID, _pCipherKey)			\
+{																		\
+	RT_ASIC_PAIRWISE_KEY	Info;										\
+																		\
+	Info.WCID = _WCID;													\
+	NdisMoveMemory(&Info.CipherKey, _pCipherKey, sizeof(CIPHER_KEY));	\
+																		\
+	RTEnqueueInternalCmd(_pAd, CMDTHREAD_SET_ASIC_PAIRWISE_KEY,			\
+							&Info, sizeof(RT_ASIC_PAIRWISE_KEY));		\
+}
+
+/* Set Asic Shared key table */
+#define RTMP_ASIC_SHARED_KEY_TABLE(_pAd, _BssIndex, _KeyIdx, _pCipherKey) 	\
+{																			\
+	RT_ASIC_SHARED_KEY 		Info;											\
+																			\
+	Info.BssIndex = _BssIndex;												\
+	Info.KeyIdx = _KeyIdx;													\
+	NdisMoveMemory(&Info.CipherKey, _pCipherKey, sizeof(CIPHER_KEY));		\
+																			\
+	RTEnqueueInternalCmd(_pAd, CMDTHREAD_SET_ASIC_SHARED_KEY,				\
+							&Info, sizeof(RT_ASIC_SHARED_KEY));				\
+}
+
+#ifdef CONFIG_STA_SUPPORT
+/* Set Port Secured */
+#define RTMP_SET_PORT_SECURED(_pAd) 										\
+{																			\
+	RTEnqueueInternalCmd(_pAd, CMDTHREAD_SET_PORT_SECURED, NULL, 0);		\
+}
+#endif /* CONFIG_STA_SUPPORT */
+
+/* Remove Pairwise Key table */
+#define RTMP_REMOVE_PAIRWISE_KEY_ENTRY(_pAd, _Wcid)										\
+{																						\
+	UCHAR _tWcid =_Wcid;																\
+	RTEnqueueInternalCmd(_pAd, CMDTHREAD_REMOVE_PAIRWISE_KEY, &(_tWcid), sizeof(UCHAR));\
+}
+
+#define RTMP_OS_IRQ_RELEASE(_pAd, _NetDev)
+
+#endif /*__MAC_USB_H__ */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/chip/rt28xx.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/chip/rt28xx.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/chip/rt28xx.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/chip/rt28xx.h	2017-09-23 03:42:49.778675798 +0800
@@ -0,0 +1,46 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RT28XX_H__
+#define __RT28XX_H__
+
+#ifdef RT28xx
+
+#ifdef RTMP_USB_SUPPORT
+#include "chip/mac_usb.h"
+#endif
+
+
+VOID RT28xx_ChipSwitchChannel(
+	IN struct _RTMP_ADAPTER 	*pAd,
+	IN UCHAR					Channel,
+	IN BOOLEAN					bScan);
+
+#endif /* RT28xx */
+
+#endif /*__RT28XX_H__ */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/chip/rt3070.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/chip/rt3070.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/chip/rt3070.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/chip/rt3070.h	2017-09-23 03:42:49.778675798 +0800
@@ -0,0 +1,60 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RT3070_H__
+#define __RT3070_H__
+
+#ifdef RT3070
+
+
+#ifndef RTMP_USB_SUPPORT
+#error "For RT3070, you should define the compile flag -DRTMP_USB_SUPPORT"
+#endif
+
+#ifndef RTMP_MAC_USB
+#error "For RT3070, you should define the compile flag -DRTMP_MAC_USB"
+#endif
+
+#ifndef RTMP_RF_RW_SUPPORT
+#error "For RT3070, you should define the compile flag -DRTMP_RF_RW_SUPPORT"
+#endif
+
+#ifndef RT30xx
+#error "For RT3070, you should define the compile flag -DRT30xx"
+#endif
+
+#include "chip/mac_usb.h"
+#include "chip/rt30xx.h"
+
+/*
+    Device ID & Vendor ID, these values should match EEPROM value
+*/
+
+#endif /* RT3070 */
+
+#endif /* __RT3070_H__ */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/chip/rt30xx.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/chip/rt30xx.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/chip/rt30xx.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/chip/rt30xx.h	2017-09-23 03:42:49.778675798 +0800
@@ -0,0 +1,58 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RT30XX_H__
+#define __RT30XX_H__
+
+#ifdef RT30xx
+
+struct _RTMP_ADAPTER;
+
+#include "rtmp_type.h"
+
+extern REG_PAIR RT3020_RFRegTable[];
+extern UCHAR NUM_RF_3020_REG_PARMS;
+
+VOID RT30xx_Init(
+	IN struct _RTMP_ADAPTER		*pAd);
+
+VOID RT30xx_ChipSwitchChannel(
+	IN struct _RTMP_ADAPTER		*pAd,
+	IN UCHAR					Channel,
+	IN BOOLEAN					bScan);
+
+VOID RT30xx_ChipBBPAdjust(
+	IN struct _RTMP_ADAPTER	*pAd);
+
+VOID RT30xx_RTMPSetAGCInitValue(
+	IN struct _RTMP_ADAPTER		*pAd,
+	IN UCHAR					BandWidth);
+
+#endif /* RT30xx */
+
+#endif /*__RT30XX_H__ */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/chip/rt3370.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/chip/rt3370.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/chip/rt3370.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/chip/rt3370.h	2017-09-23 03:42:49.778675798 +0800
@@ -0,0 +1,70 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RT3370_H__
+#define __RT3370_H__
+
+#ifdef RT3370
+
+
+#ifndef RTMP_USB_SUPPORT
+#error "For RT3070, you should define the compile flag -DRTMP_USB_SUPPORT"
+#endif
+
+#ifndef RTMP_MAC_USB
+#error "For RT3070, you should define the compile flag -DRTMP_MAC_USB"
+#endif
+
+#ifndef RTMP_RF_RW_SUPPORT
+#error "For RT3070, you should define the compile flag -DRTMP_RF_RW_SUPPORT"
+#endif
+
+#ifndef RT33xx
+#error "For RT3370, you should define the compile flag -DRT33xx"
+#endif
+
+#ifndef RT30xx
+#error "For RT3070, you should define the compile flag -DRT30xx"
+#endif
+
+
+#include "chip/mac_usb.h"
+#include "chip/rt30xx.h"
+#include "chip/rt33xx.h"
+
+extern REG_PAIR RT3370_BBPRegTable[];
+extern UCHAR RT3370_NUM_BBP_REG_PARMS;
+
+
+/* */
+/* Device ID & Vendor ID, these values should match EEPROM value */
+/* */
+
+#endif /* RT3370 */
+
+#endif /*__RT3370_H__ */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/chip/rt33xx.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/chip/rt33xx.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/chip/rt33xx.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/chip/rt33xx.h	2017-09-23 03:42:49.778675798 +0800
@@ -0,0 +1,59 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RT33XX_H__
+#define __RT33XX_H__
+
+#ifdef RT33xx
+
+#include "rtmp_type.h"
+
+
+#ifdef RT3370
+extern REG_PAIR RT3370_RFRegTable[];
+extern UCHAR RT3370_NUM_RF_REG_PARMS;
+#define BW20RFR24	0x4F
+#define BW40RFR24	0X68
+#define BW20RFR31	0x4F
+#define BW40RFR31	0X6F
+#endif /* RT3370 */
+
+VOID RT33xx_Init(
+        IN struct _RTMP_ADAPTER         *pAd);
+
+VOID RT33xx_ChipSwitchChannel(
+	IN struct _RTMP_ADAPTER 	*pAd,
+	IN UCHAR					Channel,
+	IN BOOLEAN					bScan);
+
+VOID RT33xx_AsicInitDesiredTSSITable(
+	IN struct _RTMP_ADAPTER		*pAd);
+
+#endif /* RT33xx */
+
+#endif /*__RT33XX_H__ */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/chip/rt5390.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/chip/rt5390.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/chip/rt5390.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/chip/rt5390.h	2017-09-23 03:42:49.778675798 +0800
@@ -0,0 +1,166 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RT5390_H__
+#define __RT5390_H__
+
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+
+
+#ifndef RTMP_RF_RW_SUPPORT
+#error "For RT5390, you should define the compile flag -DRTMP_RF_RW_SUPPORT"
+#endif
+
+#ifndef RT30xx
+#error "For RT5390, you should define the compile flag -DRT30xx"
+#endif
+#ifdef CARRIER_DETECTION_SUPPORT
+#define TONE_RADAR_DETECT_SUPPORT
+#define TONE_RADAR_DETECT_V2
+#endif // CARRIER_DETECTION_SUPPORT //
+
+#ifdef CONFIG_STA_SUPPORT
+#endif // CONFIG_STA_SUPPORT //
+extern REG_PAIR RF5390RegTable[];
+extern UCHAR NUM_RF_5390_REG_PARMS;
+
+#define BBP_REG_BF			BBP_R163 // TxBf control
+#ifdef CONFIG_STA_SUPPORT
+#endif // CONFIG_STA_SUPPORT //
+
+#ifdef RTMP_FLASH_SUPPORT
+#define EEPROM_DEFAULT_FILE_PATH                     "etc_ro/Wireless/RT2860AP/RT3092_PCIe_LNA_2T2R_ALC_V1_2.bin"
+#define RF_OFFSET					0x48000
+extern void RtmpFlashWrite(UCHAR * p, ULONG a, ULONG b);
+extern void RtmpFlashRead(UCHAR * p, ULONG a, ULONG b);
+#endif // RTMP_FLASH_SUPPORT //
+
+/* Device ID & Vendor ID, these values should match EEPROM value */
+
+#define NIC5390_PCIe_DEVICE_ID	0x5390
+#define NIC539F_PCIe_DEVICE_ID  0x539F
+#define NIC5392_PCIe_DEVICE_ID  0x5392
+#define NIC5362_PCI_DEVICE_ID	0x5362
+#define NIC5360_PCI_DEVICE_ID   0x5360
+
+VOID RT5390HaltAction(
+	IN struct _RTMP_ADAPTER			*pAd);
+
+
+/* add by johnli, RF power sequence setup */
+VOID RT5390LoadRFNormalModeSetup(
+	IN struct _RTMP_ADAPTER			*pAd);
+
+VOID RT5390LoadRFSleepModeSetup(
+	IN struct _RTMP_ADAPTER			*pAd);
+
+VOID RT5390ReverseRFSleepModeSetup(
+	IN struct _RTMP_ADAPTER			*pAd,
+	IN BOOLEAN			FlgIsInitState);
+/* end johnli */
+
+
+VOID RT5390_Init(
+	IN struct _RTMP_ADAPTER			*pAd);
+
+VOID NICInitRT5390BbpRegisters(
+	IN struct _RTMP_ADAPTER		*pAd);
+
+VOID NICInitRT5390MacRegisters(
+	IN struct _RTMP_ADAPTER		*pAd);
+
+VOID RT5390_AsicEeBufferInit(
+	IN struct _RTMP_ADAPTER		*pAd);
+
+VOID RT5390_RxSensitivityTuning(
+	IN struct _RTMP_ADAPTER		*pAd);
+
+UCHAR RT5390_ChipStaBBPAdjust(
+	IN struct _RTMP_ADAPTER		*pAd,
+	IN CHAR						Rssi,
+	IN UCHAR					R66);
+
+VOID RT5390_ChipBBPAdjust(
+	IN struct _RTMP_ADAPTER		*pAd);
+
+VOID RT5390_ChipSwitchChannel(
+	IN struct _RTMP_ADAPTER 	*pAd,
+	IN UCHAR					Channel,
+	IN BOOLEAN					bScan);
+
+
+#ifdef RTMP_INTERNAL_TX_ALC
+
+VOID RT5390_InitDesiredTSSITable(
+	IN struct _RTMP_ADAPTER		*pAd);
+
+INT RT5390_ATETssiCalibration(
+	IN struct _RTMP_ADAPTER		*pAd,
+	IN PSTRING					arg);
+
+INT RT5390_ATETssiCalibrationExtend(
+	IN struct _RTMP_ADAPTER		*pAd,
+	IN PSTRING					arg);
+
+VOID RT5390_AsicTxAlcGetAutoAgcOffset(
+	IN struct _RTMP_ADAPTER		*pAd,
+	IN PCHAR					pDeltaPwr,
+	IN PCHAR					pTotalDeltaPwr,
+	IN PCHAR					pAgcCompensate,
+	IN PUCHAR					pBbpR49);
+
+UINT32 RT5390_GetDesiredTSSI(
+	IN struct _RTMP_ADAPTER		*pAd);
+
+LONG Rounding(
+	IN struct _RTMP_ADAPTER		*pAd,
+	IN LONG Integer, 
+	IN LONG Fraction, 
+	IN LONG DenominatorOfTssiRatio);
+
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+#ifdef RTMP_TEMPERATURE_COMPENSATION
+INT RT5392_ATEReadExternalTSSI(
+	IN struct _RTMP_ADAPTER		*pAd,
+	IN PSTRING					arg);
+#endif /* RTMP_TEMPERATURE_COMPENSATION */
+
+VOID RT5390_RTMPSetAGCInitValue(
+	IN struct _RTMP_ADAPTER		*pAd,
+	IN UCHAR					BandWidth);
+
+VOID RT5390_ChipResumeMsduTransmission(
+	IN struct _RTMP_ADAPTER		*pAd);
+
+VOID RT5390_AsicResetBbpAgent(
+	IN struct _RTMP_ADAPTER		*pAd);	
+
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+
+#endif /* __RT5390_H__ */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/chip/rtmp_mac.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/chip/rtmp_mac.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/chip/rtmp_mac.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/chip/rtmp_mac.h	2017-09-23 03:42:49.782675785 +0800
@@ -0,0 +1,3052 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RTMP_MAC_H__
+#define __RTMP_MAC_H__
+
+
+
+/* ================================================================================= */
+/* TX / RX ring descriptor format */
+/* ================================================================================= */
+
+/* the first 24-byte in TXD is called TXINFO and will be DMAed to MAC block through TXFIFO. */
+/* MAC block use this TXINFO to control the transmission behavior of this frame. */
+#define FIFO_MGMT                 0
+#define FIFO_HCCA                 1
+#define FIFO_EDCA                 2
+
+
+/* */
+/* TXD Wireless Information format for Tx ring and Mgmt Ring */
+/* */
+/*txop : for txop mode */
+/* 0:txop for the MPDU frame will be handles by ASIC by register */
+/* 1/2/3:the MPDU frame is send after PIFS/backoff/SIFS */
+#ifdef RT_BIG_ENDIAN
+typedef	struct	GNU_PACKED _TXWI_STRUC {
+	/* Word 0 */
+	UINT32		PHYMODE:2;
+	UINT32		rsv2:2;
+	UINT32		Ifs:1;
+	UINT32		STBC:2;	/*channel bandwidth 20MHz or 40 MHz */
+	UINT32		ShortGI:1;
+	UINT32		BW:1;	/*channel bandwidth 20MHz or 40 MHz */
+	UINT32		MCS:7;
+	
+	UINT32		rsv:6;
+	UINT32		txop:2;	/*tx back off mode 0:HT TXOP rule , 1:PIFS TX ,2:Backoff, 3:sifs only when previous frame exchange is successful. */
+	UINT32		MpduDensity:3;
+	UINT32		AMPDU:1;
+	
+	UINT32		TS:1;
+	UINT32		CFACK:1;
+	UINT32		MIMOps:1;	/* the remote peer is in dynamic MIMO-PS mode */
+	UINT32		FRAG:1;		/* 1 to inform TKIP engine this is a fragment. */
+	/* Word 1 */
+	UINT32		PacketId:4;
+	UINT32		MPDUtotalByteCount:12;
+	UINT32		WirelessCliID:8;
+	UINT32		BAWinSize:6;
+	UINT32		NSEQ:1;
+	UINT32		ACK:1;
+	/* Word 2 */
+	UINT32		IV;
+	/* Word 3 */
+	UINT32		EIV;
+}	TXWI_STRUC, *PTXWI_STRUC;
+#else
+typedef	struct	GNU_PACKED _TXWI_STRUC {
+	/* Word	0 */
+	/* ex: 00 03 00 40 means txop = 3, PHYMODE = 1 */
+	UINT32		FRAG:1;		/* 1 to inform TKIP engine this is a fragment. */
+	UINT32		MIMOps:1;	/* the remote peer is in dynamic MIMO-PS mode */
+	UINT32		CFACK:1;
+	UINT32		TS:1;
+		
+	UINT32		AMPDU:1;
+	UINT32		MpduDensity:3;
+	UINT32		txop:2;	/*FOR "THIS" frame. 0:HT TXOP rule , 1:PIFS TX ,2:Backoff, 3:sifs only when previous frame exchange is successful. */
+	UINT32		rsv:6;
+	
+	UINT32		MCS:7;
+	UINT32		BW:1;	/*channel bandwidth 20MHz or 40 MHz */
+	UINT32		ShortGI:1;
+	UINT32		STBC:2;	/* 1: STBC support MCS =0-7,   2,3 : RESERVE */
+	UINT32		Ifs:1;
+	UINT32		rsv2:2;	/*channel bandwidth 20MHz or 40 MHz */
+	UINT32		PHYMODE:2;  
+	/* Word1 */
+	/* ex:  1c ff 38 00 means ACK=0, BAWinSize=7, MPDUtotalByteCount = 0x38 */
+	UINT32		ACK:1;
+	UINT32		NSEQ:1;
+	UINT32		BAWinSize:6;
+	UINT32		WirelessCliID:8;
+	UINT32		MPDUtotalByteCount:12;
+	UINT32		PacketId:4;
+	/*Word2 */
+	UINT32		IV;
+	/*Word3 */
+	UINT32		EIV;
+}	TXWI_STRUC, *PTXWI_STRUC;
+#endif
+
+
+/* */
+/* RXWI wireless information format, in PBF. invisible in driver. */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef	struct	GNU_PACKED _RXWI_STRUC {
+	/* Word 0 */
+	UINT32		TID:4;
+	UINT32		MPDUtotalByteCount:12;
+	UINT32		UDF:3;
+	UINT32		BSSID:3;
+	UINT32		KeyIndex:2;
+	UINT32		WirelessCliID:8;
+	/* Word 1 */
+	UINT32		PHYMODE:2;              /* 1: this RX frame is unicast to me */
+	UINT32		rsv:3;
+	UINT32		STBC:2;
+	UINT32		ShortGI:1;
+	UINT32		BW:1;
+	UINT32		MCS:7;
+	UINT32		SEQUENCE:12;
+	UINT32		FRAG:4;
+	/* Word 2 */
+	UINT32		rsv1:8;
+	UINT32		RSSI2:8;
+	UINT32		RSSI1:8;
+	UINT32		RSSI0:8;
+	/* Word 3 */
+	/*UINT32		rsv2:16;*/
+	UINT32		rsv2:8;	
+	UINT32		FOFFSET:8;
+	UINT32		SNR1:8;
+	UINT32		SNR0:8;
+}	RXWI_STRUC, *PRXWI_STRUC;
+#else
+typedef	struct	GNU_PACKED _RXWI_STRUC {
+	/* Word	0 */
+	UINT32		WirelessCliID:8;
+	UINT32		KeyIndex:2;
+	UINT32		BSSID:3;
+	UINT32		UDF:3;
+	UINT32		MPDUtotalByteCount:12;
+	UINT32		TID:4;
+	/* Word	1 */
+	UINT32		FRAG:4;
+	UINT32		SEQUENCE:12;
+	UINT32		MCS:7;
+	UINT32		BW:1;
+	UINT32		ShortGI:1;
+	UINT32		STBC:2;
+	UINT32		rsv:3;
+	UINT32		PHYMODE:2;              /* 1: this RX frame is unicast to me */
+	/*Word2 */
+	UINT32		RSSI0:8;
+	UINT32		RSSI1:8;
+	UINT32		RSSI2:8;
+	UINT32		rsv1:8;
+	/*Word3 */
+	UINT32		SNR0:8;
+	UINT32		SNR1:8;
+	UINT32		FOFFSET:8;
+	UINT32		rsv2:8;
+	/*UINT32		rsv2:16;*/
+}	RXWI_STRUC, *PRXWI_STRUC;
+#endif
+
+
+/* ================================================================================= */
+/* Register format */
+/* ================================================================================= */
+
+
+#define SYSCFG0			0x10
+
+/* */
+/* PCI registers - base address 0x0000 */
+/* */
+#define PCI_CFG			0x0000
+#define PCI_EECTRL			0x0004
+#define PCI_MCUCTRL			0x0008
+#define AUX_CTRL		0x10c
+
+#define	OPT_14			0x114
+
+/* */
+/* SCH/DMA registers - base address 0x0200 */
+/* */
+/* INT_SOURCE_CSR: Interrupt source register. Write one to clear corresponding bit */
+/* */
+#define DMA_CSR0		0x200
+#define INT_SOURCE_CSR		0x200
+#ifdef RT_BIG_ENDIAN
+typedef	union	_INT_SOURCE_CSR_STRUC	{
+	struct	{
+#ifdef TONE_RADAR_DETECT_SUPPORT
+		UINT32			:11;
+		UINT32			RadarINT:1;
+		UINT32       	rsv:2;
+#else /* original source code */
+		UINT32       	:14;
+#endif /* TONE_RADAR_DETECT_SUPPORT */
+		UINT32       	TxCoherent:1;
+		UINT32       	RxCoherent:1;
+		UINT32       	GPTimer:1;
+		UINT32       	AutoWakeup:1;/*bit14 */
+		UINT32       	TXFifoStatusInt:1;/*FIFO Statistics is full, sw should read 0x171c */
+		UINT32       	PreTBTT:1;
+		UINT32       	TBTTInt:1;
+		UINT32       	RxTxCoherent:1;
+		UINT32       	MCUCommandINT:1;
+		UINT32       	MgmtDmaDone:1;
+		UINT32       	HccaDmaDone:1;
+		UINT32       	Ac3DmaDone:1;
+		UINT32       	Ac2DmaDone:1;
+		UINT32       	Ac1DmaDone:1;
+		UINT32		Ac0DmaDone:1;
+		UINT32		RxDone:1;
+		UINT32		TxDelayINT:1;	/*delayed interrupt, not interrupt until several int or time limit hit */
+		UINT32		RxDelayINT:1; /*dealyed interrupt */
+	}	field;
+	UINT32			word;
+}	INT_SOURCE_CSR_STRUC, *PINT_SOURCE_CSR_STRUC;
+#else
+typedef	union	_INT_SOURCE_CSR_STRUC	{
+	struct	{
+		UINT32		RxDelayINT:1;
+		UINT32		TxDelayINT:1;
+		UINT32		RxDone:1;
+		UINT32		Ac0DmaDone:1;/*4 */
+		UINT32       	Ac1DmaDone:1;
+		UINT32       	Ac2DmaDone:1;
+		UINT32       	Ac3DmaDone:1;
+		UINT32       	HccaDmaDone:1; /* bit7 */
+		UINT32       	MgmtDmaDone:1;
+		UINT32       	MCUCommandINT:1;/*bit 9 */
+		UINT32       	RxTxCoherent:1;
+		UINT32       	TBTTInt:1;
+		UINT32       	PreTBTT:1;
+		UINT32       	TXFifoStatusInt:1;/*FIFO Statistics is full, sw should read 0x171c */
+		UINT32       	AutoWakeup:1;/*bit14 */
+		UINT32       	GPTimer:1;
+		UINT32       	RxCoherent:1;/*bit16 */
+		UINT32       	TxCoherent:1;
+#ifdef TONE_RADAR_DETECT_SUPPORT
+		UINT32       	rsv:2;
+		UINT32			RadarINT:1;
+		UINT32			:11;
+#else
+		UINT32       	:14;
+#endif /* TONE_RADAR_DETECT_SUPPORT */
+	}	field;
+	UINT32			word;
+} INT_SOURCE_CSR_STRUC, *PINT_SOURCE_CSR_STRUC;
+#endif
+
+/* */
+/* INT_MASK_CSR:   Interrupt MASK register.   1: the interrupt is mask OFF */
+/* */
+#define INT_MASK_CSR        0x204
+#ifdef RT_BIG_ENDIAN
+typedef	union	_INT_MASK_CSR_STRUC	{
+	struct	{
+		UINT32       	TxCoherent:1;
+		UINT32       	RxCoherent:1;
+#ifdef TONE_RADAR_DETECT_SUPPORT
+		UINT32			:9;
+		UINT32			RadarINT:1;
+		UINT32       	rsv:10;
+#else
+		UINT32       	:20;
+#endif /* TONE_RADAR_DETECT_SUPPORT */
+		UINT32       	MCUCommandINT:1;
+		UINT32       	MgmtDmaDone:1;
+		UINT32       	HccaDmaDone:1;
+		UINT32       	Ac3DmaDone:1;
+		UINT32       	Ac2DmaDone:1;
+		UINT32       	Ac1DmaDone:1;
+		UINT32		Ac0DmaDone:1;
+		UINT32		RxDone:1;
+		UINT32		TxDelay:1;
+		UINT32		RXDelay_INT_MSK:1;
+	}	field;
+	UINT32			word;
+}INT_MASK_CSR_STRUC, *PINT_MASK_CSR_STRUC;
+#else
+typedef	union	_INT_MASK_CSR_STRUC	{
+	struct	{
+		UINT32		RXDelay_INT_MSK:1;
+		UINT32		TxDelay:1;
+		UINT32		RxDone:1;
+		UINT32		Ac0DmaDone:1;
+		UINT32       	Ac1DmaDone:1;
+		UINT32       	Ac2DmaDone:1;
+		UINT32       	Ac3DmaDone:1;
+		UINT32       	HccaDmaDone:1;
+		UINT32       	MgmtDmaDone:1;
+		UINT32       	MCUCommandINT:1;
+#ifdef TONE_RADAR_DETECT_SUPPORT
+		UINT32       	rsv:10;
+		UINT32			RadarINT:1;
+		UINT32			:9;
+#else
+		UINT32       	:20;
+#endif /* TONE_RADAR_DETECT_SUPPORT */
+		UINT32       	RxCoherent:1;
+		UINT32       	TxCoherent:1;
+	}	field;
+	UINT32			word;
+} INT_MASK_CSR_STRUC, *PINT_MASK_CSR_STRUC;
+#endif
+
+#define WPDMA_GLO_CFG 	0x208
+#ifdef RT_BIG_ENDIAN
+typedef	union	_WPDMA_GLO_CFG_STRUC	{
+	struct	{
+		UINT32       	HDR_SEG_LEN:16;
+		UINT32       	RXHdrScater:8;
+		UINT32       	BigEndian:1;
+		UINT32       	EnTXWriteBackDDONE:1;
+		UINT32       	WPDMABurstSIZE:2;
+		UINT32		RxDMABusy:1;
+		UINT32		EnableRxDMA:1;
+		UINT32		TxDMABusy:1;
+		UINT32		EnableTxDMA:1;
+	}	field;
+	UINT32			word;
+}WPDMA_GLO_CFG_STRUC, *PWPDMA_GLO_CFG_STRUC;
+#else
+typedef	union	_WPDMA_GLO_CFG_STRUC	{
+	struct	{
+		UINT32		EnableTxDMA:1;
+		UINT32		TxDMABusy:1;
+		UINT32		EnableRxDMA:1;
+		UINT32		RxDMABusy:1;
+		UINT32       	WPDMABurstSIZE:2;
+		UINT32       	EnTXWriteBackDDONE:1;
+		UINT32       	BigEndian:1;
+		UINT32       	RXHdrScater:8;
+		UINT32       	HDR_SEG_LEN:16;
+	}	field;
+	UINT32			word;
+} WPDMA_GLO_CFG_STRUC, *PWPDMA_GLO_CFG_STRUC;
+#endif
+
+#define WPDMA_RST_IDX 	0x20c
+#ifdef RT_BIG_ENDIAN
+typedef	union	_WPDMA_RST_IDX_STRUC	{
+	struct	{
+		UINT32       	:15;
+		UINT32       	RST_DRX_IDX0:1;
+		UINT32       	rsv:10;
+		UINT32       	RST_DTX_IDX5:1;
+		UINT32       	RST_DTX_IDX4:1;
+		UINT32		RST_DTX_IDX3:1;
+		UINT32		RST_DTX_IDX2:1;
+		UINT32		RST_DTX_IDX1:1;
+		UINT32		RST_DTX_IDX0:1;
+	}	field;
+	UINT32			word;
+}WPDMA_RST_IDX_STRUC, *PWPDMA_RST_IDX_STRUC;
+#else
+typedef	union	_WPDMA_RST_IDX_STRUC	{
+	struct	{
+		UINT32		RST_DTX_IDX0:1;
+		UINT32		RST_DTX_IDX1:1;
+		UINT32		RST_DTX_IDX2:1;
+		UINT32		RST_DTX_IDX3:1;
+		UINT32       	RST_DTX_IDX4:1;
+		UINT32       	RST_DTX_IDX5:1;
+		UINT32       	rsv:10;
+		UINT32       	RST_DRX_IDX0:1;
+		UINT32       	:15;
+	}	field;
+	UINT32			word;
+} WPDMA_RST_IDX_STRUC, *PWPDMA_RST_IDX_STRUC;
+#endif
+#define DELAY_INT_CFG  0x0210
+#ifdef RT_BIG_ENDIAN
+typedef	union	_DELAY_INT_CFG_STRUC	{
+	struct	{
+		UINT32       	TXDLY_INT_EN:1;
+		UINT32       	TXMAX_PINT:7;
+		UINT32       	TXMAX_PTIME:8;
+		UINT32       	RXDLY_INT_EN:1;
+		UINT32       	RXMAX_PINT:7;
+		UINT32		RXMAX_PTIME:8;
+	}	field;
+	UINT32			word;
+}DELAY_INT_CFG_STRUC, *PDELAY_INT_CFG_STRUC;
+#else
+typedef	union	_DELAY_INT_CFG_STRUC	{
+	struct	{
+		UINT32		RXMAX_PTIME:8;
+		UINT32       	RXMAX_PINT:7;
+		UINT32       	RXDLY_INT_EN:1;
+		UINT32       	TXMAX_PTIME:8;
+		UINT32       	TXMAX_PINT:7;
+		UINT32       	TXDLY_INT_EN:1;
+	}	field;
+	UINT32			word;
+} DELAY_INT_CFG_STRUC, *PDELAY_INT_CFG_STRUC;
+#endif
+#define WMM_AIFSN_CFG   0x0214
+#ifdef RT_BIG_ENDIAN
+typedef	union	_AIFSN_CSR_STRUC	{
+	struct	{
+	    UINT32   Rsv:16;
+	    UINT32   Aifsn3:4;       /* for AC_VO */
+	    UINT32   Aifsn2:4;       /* for AC_VI */
+	    UINT32   Aifsn1:4;       /* for AC_BK */
+	    UINT32   Aifsn0:4;       /* for AC_BE */
+	}	field;
+	UINT32			word;
+}	AIFSN_CSR_STRUC, *PAIFSN_CSR_STRUC;
+#else
+typedef	union	_AIFSN_CSR_STRUC	{
+	struct	{
+	    UINT32   Aifsn0:4;       /* for AC_BE */
+	    UINT32   Aifsn1:4;       /* for AC_BK */
+	    UINT32   Aifsn2:4;       /* for AC_VI */
+	    UINT32   Aifsn3:4;       /* for AC_VO */
+	    UINT32   Rsv:16;
+	}	field;
+	UINT32			word;
+}	AIFSN_CSR_STRUC, *PAIFSN_CSR_STRUC;
+#endif
+/* */
+/* CWMIN_CSR: CWmin for each EDCA AC */
+/* */
+#define WMM_CWMIN_CFG   0x0218
+#ifdef RT_BIG_ENDIAN
+typedef	union	_CWMIN_CSR_STRUC	{
+	struct	{
+	    UINT32   Rsv:16;
+	    UINT32   Cwmin3:4;       /* for AC_VO */
+	    UINT32   Cwmin2:4;       /* for AC_VI */
+	    UINT32   Cwmin1:4;       /* for AC_BK */
+	    UINT32   Cwmin0:4;       /* for AC_BE */
+	}	field;
+	UINT32			word;
+}	CWMIN_CSR_STRUC, *PCWMIN_CSR_STRUC;
+#else
+typedef	union	_CWMIN_CSR_STRUC	{
+	struct	{
+	    UINT32   Cwmin0:4;       /* for AC_BE */
+	    UINT32   Cwmin1:4;       /* for AC_BK */
+	    UINT32   Cwmin2:4;       /* for AC_VI */
+	    UINT32   Cwmin3:4;       /* for AC_VO */
+	    UINT32   Rsv:16;
+	}	field;
+	UINT32			word;
+}	CWMIN_CSR_STRUC, *PCWMIN_CSR_STRUC;
+#endif
+
+/* */
+/* CWMAX_CSR: CWmin for each EDCA AC */
+/* */
+#define WMM_CWMAX_CFG   0x021c
+#ifdef RT_BIG_ENDIAN
+typedef	union	_CWMAX_CSR_STRUC	{
+	struct	{
+	    UINT32   Rsv:16;
+	    UINT32   Cwmax3:4;       /* for AC_VO */
+	    UINT32   Cwmax2:4;       /* for AC_VI */
+	    UINT32   Cwmax1:4;       /* for AC_BK */
+	    UINT32   Cwmax0:4;       /* for AC_BE */
+	}	field;
+	UINT32			word;
+}	CWMAX_CSR_STRUC, *PCWMAX_CSR_STRUC;
+#else
+typedef	union	_CWMAX_CSR_STRUC	{
+	struct	{
+	    UINT32   Cwmax0:4;       /* for AC_BE */
+	    UINT32   Cwmax1:4;       /* for AC_BK */
+	    UINT32   Cwmax2:4;       /* for AC_VI */
+	    UINT32   Cwmax3:4;       /* for AC_VO */
+	    UINT32   Rsv:16;
+	}	field;
+	UINT32			word;
+}	CWMAX_CSR_STRUC, *PCWMAX_CSR_STRUC;
+#endif
+
+
+/* */
+/* AC_TXOP_CSR0: AC_BK/AC_BE TXOP register */
+/* */
+#define WMM_TXOP0_CFG    0x0220
+#ifdef RT_BIG_ENDIAN
+typedef	union	_AC_TXOP_CSR0_STRUC	{
+	struct	{
+	    USHORT  Ac1Txop;        /* for AC_BE, in unit of 32us */
+	    USHORT  Ac0Txop;        /* for AC_BK, in unit of 32us */
+	}	field;
+	UINT32			word;
+}	AC_TXOP_CSR0_STRUC, *PAC_TXOP_CSR0_STRUC;
+#else
+typedef	union	_AC_TXOP_CSR0_STRUC	{
+	struct	{
+	    USHORT  Ac0Txop;        /* for AC_BK, in unit of 32us */
+	    USHORT  Ac1Txop;        /* for AC_BE, in unit of 32us */
+	}	field;
+	UINT32			word;
+}	AC_TXOP_CSR0_STRUC, *PAC_TXOP_CSR0_STRUC;
+#endif
+
+/* */
+/* AC_TXOP_CSR1: AC_VO/AC_VI TXOP register */
+/* */
+#define WMM_TXOP1_CFG    0x0224
+#ifdef RT_BIG_ENDIAN
+typedef	union	_AC_TXOP_CSR1_STRUC	{
+	struct	{
+	    USHORT  Ac3Txop;        /* for AC_VO, in unit of 32us */
+	    USHORT  Ac2Txop;        /* for AC_VI, in unit of 32us */
+	}	field;
+	UINT32			word;
+}	AC_TXOP_CSR1_STRUC, *PAC_TXOP_CSR1_STRUC;
+#else
+typedef	union	_AC_TXOP_CSR1_STRUC	{
+	struct	{
+	    USHORT  Ac2Txop;        /* for AC_VI, in unit of 32us */
+	    USHORT  Ac3Txop;        /* for AC_VO, in unit of 32us */
+	}	field;
+	UINT32			word;
+}	AC_TXOP_CSR1_STRUC, *PAC_TXOP_CSR1_STRUC;
+#endif
+
+
+#define RINGREG_DIFF			0x10
+#define GPIO_CTRL_CFG    0x0228	/*MAC_CSR13 */
+#define MCU_CMD_CFG    0x022c
+#define TX_BASE_PTR0     0x0230	/*AC_BK base address */
+#define TX_MAX_CNT0      0x0234
+#define TX_CTX_IDX0       0x0238
+#define TX_DTX_IDX0      0x023c
+#define TX_BASE_PTR1     0x0240 	/*AC_BE base address */
+#define TX_MAX_CNT1      0x0244
+#define TX_CTX_IDX1       0x0248
+#define TX_DTX_IDX1      0x024c
+#define TX_BASE_PTR2     0x0250 	/*AC_VI base address */
+#define TX_MAX_CNT2      0x0254
+#define TX_CTX_IDX2       0x0258
+#define TX_DTX_IDX2      0x025c
+#define TX_BASE_PTR3     0x0260 	/*AC_VO base address */
+#define TX_MAX_CNT3      0x0264
+#define TX_CTX_IDX3       0x0268
+#define TX_DTX_IDX3      0x026c
+#define TX_BASE_PTR4     0x0270 	/*HCCA base address */
+#define TX_MAX_CNT4      0x0274
+#define TX_CTX_IDX4       0x0278
+#define TX_DTX_IDX4      0x027c
+#define TX_BASE_PTR5     0x0280 	/*MGMT base address */
+#define  TX_MAX_CNT5     0x0284
+#define TX_CTX_IDX5       0x0288
+#define TX_DTX_IDX5      0x028c
+#define TX_MGMTMAX_CNT      TX_MAX_CNT5
+#define TX_MGMTCTX_IDX       TX_CTX_IDX5
+#define TX_MGMTDTX_IDX      TX_DTX_IDX5
+#define RX_BASE_PTR     0x0290 	/*RX base address */
+#define RX_MAX_CNT      0x0294
+#define RX_CRX_IDX       0x0298
+#define RX_DRX_IDX      0x029c
+
+
+#define USB_DMA_CFG      0x02a0
+#ifdef RT_BIG_ENDIAN
+typedef	union	_USB_DMA_CFG_STRUC	{
+	struct	{
+	    UINT32  TxBusy:1;   	/*USB DMA TX FSM busy . debug only */
+	    UINT32  RxBusy:1;        /*USB DMA RX FSM busy . debug only */
+	    UINT32  EpoutValid:6;        /*OUT endpoint data valid. debug only */
+	    UINT32  TxBulkEn:1;        /*Enable USB DMA Tx */
+	    UINT32  RxBulkEn:1;        /*Enable USB DMA Rx */
+	    UINT32  RxBulkAggEn:1;        /*Enable Rx Bulk Aggregation */
+	    UINT32  TxopHalt:1;        /*Halt TXOP count down when TX buffer is full. */
+	    UINT32  TxClear:1;        /*Clear USB DMA TX path */
+	    UINT32  rsv:2;        
+	    UINT32  phyclear:1;        		/*phy watch dog enable. write 1 */
+	    UINT32  RxBulkAggLmt:8;        /*Rx Bulk Aggregation Limit  in unit of 1024 bytes */
+	    UINT32  RxBulkAggTOut:8;        /*Rx Bulk Aggregation TimeOut  in unit of 33ns */
+	}	field;
+	UINT32			word;
+}	USB_DMA_CFG_STRUC, *PUSB_DMA_CFG_STRUC;
+#else
+typedef	union	_USB_DMA_CFG_STRUC	{
+	struct	{
+	    UINT32  RxBulkAggTOut:8;        /*Rx Bulk Aggregation TimeOut  in unit of 33ns */
+	    UINT32  RxBulkAggLmt:8;        /*Rx Bulk Aggregation Limit  in unit of 256 bytes */
+	    UINT32  phyclear:1;        		/*phy watch dog enable. write 1 */
+	    UINT32  rsv:2;        
+	    UINT32  TxClear:1;        /*Clear USB DMA TX path */
+	    UINT32  TxopHalt:1;        /*Halt TXOP count down when TX buffer is full. */
+	    UINT32  RxBulkAggEn:1;        /*Enable Rx Bulk Aggregation */
+	    UINT32  RxBulkEn:1;        /*Enable USB DMA Rx */
+	    UINT32  TxBulkEn:1;        /*Enable USB DMA Tx */
+	    UINT32  EpoutValid:6;        /*OUT endpoint data valid */
+	    UINT32  RxBusy:1;        /*USB DMA RX FSM busy */
+	    UINT32  TxBusy:1;   	/*USB DMA TX FSM busy */
+	}	field;
+	UINT32			word;
+}	USB_DMA_CFG_STRUC, *PUSB_DMA_CFG_STRUC;
+#endif
+
+#define US_CYC_CNT      0x02a4
+#ifdef BIG_ENDIAN
+typedef	union	_US_CYC_CNT_STRUC	{
+	struct	{
+	    ULONG  rsv2:7;
+	    ULONG  TestEn:1;
+	    ULONG  TestSel:8;
+	    ULONG  rsv1:7;
+	    ULONG  MiscModeEn:1;
+	    ULONG  UsCycCnt:8;
+	}	field;
+	ULONG			word;
+}	US_CYC_CNT_STRUC, *PUS_CYC_CNT_STRUC;
+#else
+typedef	union	_US_CYC_CNT_STRUC	{
+	struct	{
+	    ULONG  UsCycCnt:8;
+		ULONG  MiscModeEn:1;
+		ULONG  rsv1:7;
+		ULONG  TestSel:8;
+		ULONG  TestEn:1;
+		ULONG  rsv2:7;
+	}	field;
+	ULONG			word;
+}	US_CYC_CNT_STRUC, *PUS_CYC_CNT_STRUC;
+#endif
+
+/* */
+/*  3  PBF  registers */
+/* */
+/* */
+/* Most are for debug. Driver doesn't touch PBF register. */
+#define PBF_SYS_CTRL 	 0x0400
+
+#ifdef RT_BIG_ENDIAN
+typedef union _PBF_SYS_CTRL_STRUC
+{
+	struct
+	{
+		ULONG	Reserved5:12; /* Reserved */
+		ULONG	SHR_MSEL:1; /* Shared memory access selection */
+		ULONG	PBF_MSEL:2; /* Packet buffer memory access selection */
+		ULONG	HST_PM_SEL:1; /* The write selection of the host program RAM */
+		ULONG	Reserved4:1; /* Reserved */
+		ULONG	CAP_MODE:1; /* Packet buffer capture mode */
+		ULONG	Reserved3:1; /* Reserved */
+		ULONG	CLK_SEL:1; /* MAC/PBF clock source selection */
+		ULONG	PBF_CLK_EN:1; /* PBF clock enable */
+		ULONG	MAC_CLK_EN:1; /* MAC clock enable */
+		ULONG	DMA_CLK_EN:1; /* DMA clock enable */
+		ULONG	Reserved2:1; /* Reserved */
+		ULONG	MCU_READY:1; /* MCU ready */
+		ULONG	Reserved1:2; /* Reserved */
+		ULONG	ASY_RESET:1; /* ASYNC interface reset */
+		ULONG	PBF_RESET:1; /* PBF hardware reset */
+		ULONG	MAC_RESET:1; /* MAC hardware reset */
+		ULONG	DMA_RESET:1; /* DMA hardware reset */
+		ULONG	MCU_RESET:1; /* MCU hardware reset */
+	} field;
+
+	ULONG word;
+} PBF_SYS_CTRL_STRUC, *PPBF_SYS_CTRL_STRUC;
+#else
+typedef union _PBF_SYS_CTRL_STRUC
+{
+	struct
+	{		
+		ULONG	MCU_RESET:1; /* MCU hardware reset */
+		ULONG	DMA_RESET:1; /* DMA hardware reset */
+		ULONG	MAC_RESET:1; /* MAC hardware reset */
+		ULONG	PBF_RESET:1; /* PBF hardware reset */
+		ULONG	ASY_RESET:1; /* ASYNC interface reset */
+		ULONG	Reserved1:2; /* Reserved */
+		ULONG	MCU_READY:1; /* MCU ready */
+		ULONG	Reserved2:1; /* Reserved */
+		ULONG	DMA_CLK_EN:1; /* DMA clock enable */
+		ULONG	MAC_CLK_EN:1; /* MAC clock enable */
+		ULONG	PBF_CLK_EN:1; /* PBF clock enable */
+		ULONG	CLK_SEL:1; /* MAC/PBF clock source selection */
+		ULONG	Reserved3:1; /* Reserved */
+		ULONG	CAP_MODE:1; /* Packet buffer capture mode */
+		ULONG	Reserved4:1; /* Reserved */
+		ULONG	HST_PM_SEL:1; /* The write selection of the host program RAM */
+		ULONG	PBF_MSEL:2; /* Packet buffer memory access selection */
+		ULONG	SHR_MSEL:1; /* Shared memory access selection */
+		ULONG	Reserved5:12; /* Reserved */
+	} field;
+
+	ULONG word;
+} PBF_SYS_CTRL_STRUC, *PPBF_SYS_CTRL_STRUC;
+#endif
+
+#define PBF_CFG                 0x0408
+#define PBF_MAX_PCNT 	 0x040C
+#define PBF_CTRL	 	0x0410
+#define PBF_INT_STA	 0x0414
+#define PBF_INT_ENA	 0x0418
+#define TXRXQ_PCNT  	 0x0438
+#define PBF_DBG 	 	 0x043c
+#define PBF_CAP_CTRL     0x0440
+
+#ifdef RT30xx
+#ifdef RTMP_EFUSE_SUPPORT
+/* eFuse registers */
+#define EFUSE_CTRL				0x0580
+#define EFUSE_DATA0				0x0590
+#define EFUSE_DATA1				0x0594
+#define EFUSE_DATA2				0x0598
+#define EFUSE_DATA3				0x059c
+#endif /* RTMP_EFUSE_SUPPORT */
+#endif /* RT30xx */
+
+#define OSC_CTRL		0x5a4
+#define PCIE_PHY_TX_ATTENUATION_CTRL	0x05C8
+#define LDO_CFG0 				0x05d4
+#define GPIO_SWITCH				0x05dc
+
+
+/* */
+/*  4  MAC  registers */
+/* */
+/* */
+/*  4.1 MAC SYSTEM  configuration registers (offset:0x1000) */
+/* */
+#define MAC_CSR0            0x1000
+#ifdef RT_BIG_ENDIAN
+typedef	union	_ASIC_VER_ID_STRUC	{
+	struct	{
+	    USHORT  ASICVer;        /* version : 2860 */
+	    USHORT  ASICRev;        /* reversion  : 0 */
+	}	field;
+	UINT32			word;
+}	ASIC_VER_ID_STRUC, *PASIC_VER_ID_STRUC;
+#else
+typedef	union	_ASIC_VER_ID_STRUC	{
+	struct	{
+	    USHORT  ASICRev;        /* reversion  : 0 */
+	    USHORT  ASICVer;        /* version : 2860 */
+	}	field;
+	UINT32			word;
+}	ASIC_VER_ID_STRUC, *PASIC_VER_ID_STRUC;
+#endif
+#define MAC_SYS_CTRL            0x1004		/*MAC_CSR1 */
+#define MAC_ADDR_DW0            		0x1008		/* MAC ADDR DW0 */
+#define MAC_ADDR_DW1           		 0x100c		/* MAC ADDR DW1 */
+/* */
+/* MAC_CSR2: STA MAC register 0 */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef	union	_MAC_DW0_STRUC	{
+	struct	{
+		UCHAR		Byte3;		/* MAC address byte 3 */
+		UCHAR		Byte2;		/* MAC address byte 2 */
+		UCHAR		Byte1;		/* MAC address byte 1 */
+		UCHAR		Byte0;		/* MAC address byte 0 */
+	}	field;
+	UINT32			word;
+}	MAC_DW0_STRUC, *PMAC_DW0_STRUC;
+#else
+typedef	union	_MAC_DW0_STRUC	{
+	struct	{
+		UCHAR		Byte0;		/* MAC address byte 0 */
+		UCHAR		Byte1;		/* MAC address byte 1 */
+		UCHAR		Byte2;		/* MAC address byte 2 */
+		UCHAR		Byte3;		/* MAC address byte 3 */
+	}	field;
+	UINT32			word;
+}	MAC_DW0_STRUC, *PMAC_DW0_STRUC;
+#endif
+
+/* */
+/* MAC_CSR3: STA MAC register 1 */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef	union	_MAC_DW1_STRUC	{
+	struct	{
+		UCHAR		Rsvd1;
+		UCHAR		U2MeMask;
+		UCHAR		Byte5;		/* MAC address byte 5 */
+		UCHAR		Byte4;		/* MAC address byte 4 */
+	}	field;
+	UINT32			word;
+}	MAC_DW1_STRUC, *PMAC_DW1_STRUC;
+#else
+typedef	union	_MAC_DW1_STRUC	{
+	struct	{
+		UCHAR		Byte4;		/* MAC address byte 4 */
+		UCHAR		Byte5;		/* MAC address byte 5 */
+		UCHAR		U2MeMask;
+		UCHAR		Rsvd1;
+	}	field;
+	UINT32			word;
+}	MAC_DW1_STRUC, *PMAC_DW1_STRUC;
+#endif
+
+#define MAC_BSSID_DW0            		0x1010		/* MAC BSSID DW0 */
+#define MAC_BSSID_DW1            		0x1014		/* MAC BSSID DW1 */
+
+/* */
+/* MAC_CSR5: BSSID register 1 */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef	union	_MAC_CSR5_STRUC	{
+	struct	{
+		USHORT		Rsvd:11;
+		USHORT		MBssBcnNum:3;
+		USHORT		BssIdMode:2; /* 0: one BSSID, 10: 4 BSSID,  01: 2 BSSID , 11: 8BSSID */
+		UCHAR		Byte5;		 /* BSSID byte 5 */
+		UCHAR		Byte4;		 /* BSSID byte 4 */
+	}	field;
+	UINT32			word;
+}	MAC_CSR5_STRUC, *PMAC_CSR5_STRUC;
+#else
+typedef	union	_MAC_CSR5_STRUC	{
+	struct	{
+		UCHAR		Byte4;		 /* BSSID byte 4 */
+		UCHAR		Byte5;		 /* BSSID byte 5 */
+		USHORT      	BssIdMask:2; /* 0: one BSSID, 10: 4 BSSID,  01: 2 BSSID , 11: 8BSSID */
+		USHORT		MBssBcnNum:3;
+		USHORT		Rsvd:11;
+	}	field;
+	UINT32			word;
+}	MAC_CSR5_STRUC, *PMAC_CSR5_STRUC;
+#endif
+
+#define MAX_LEN_CFG              0x1018		/* rt2860b max 16k bytes. bit12:13 Maximum PSDU length (power factor) 0:2^13, 1:2^14, 2:2^15, 3:2^16 */
+#define BBP_CSR_CFG            		0x101c		/* */
+/* */
+/* BBP_CSR_CFG: BBP serial control register */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef	union	_BBP_CSR_CFG_STRUC	{
+	struct	{
+		UINT32		:12;		
+		UINT32		BBP_RW_MODE:1;		/* 0: use serial mode  1:parallel */
+		UINT32		BBP_PAR_DUR:1;		    /* 0: 4 MAC clock cycles  1: 8 MAC clock cycles */
+		UINT32		Busy:1;				/* 1: ASIC is busy execute BBP programming. */
+		UINT32		fRead:1;		    /* 0: Write	BBP, 1:	Read BBP */
+		UINT32		RegNum:8;			/* Selected	BBP	register */
+		UINT32		Value:8;			/* Register	value to program into BBP */
+	}	field;
+	UINT32			word;
+}	BBP_CSR_CFG_STRUC, *PBBP_CSR_CFG_STRUC;
+#else
+typedef	union	_BBP_CSR_CFG_STRUC	{
+	struct	{
+		UINT32		Value:8;			/* Register	value to program into BBP */
+		UINT32		RegNum:8;			/* Selected	BBP	register */
+		UINT32		fRead:1;		    /* 0: Write	BBP, 1:	Read BBP */
+		UINT32		Busy:1;				/* 1: ASIC is busy execute BBP programming. */
+		UINT32		BBP_PAR_DUR:1;		     /* 0: 4 MAC clock cycles  1: 8 MAC clock cycles */
+		UINT32		BBP_RW_MODE:1;		/* 0: use serial mode  1:parallel */
+		UINT32		:12;
+	}	field;
+	UINT32			word;
+}	BBP_CSR_CFG_STRUC, *PBBP_CSR_CFG_STRUC;
+#endif
+#define RF_CSR_CFG0            		0x1020		 
+/* */
+/* RF_CSR_CFG: RF control register */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef	union	_RF_CSR_CFG0_STRUC	{
+	struct	{
+		UINT32		Busy:1;		    /* 0: idle 1: 8busy */
+		UINT32		Sel:1;				/* 0:RF_LE0 activate  1:RF_LE1 activate */
+		UINT32		StandbyMode:1;		    /* 0: high when stand by 1:	low when standby */
+		UINT32		bitwidth:5;			/* Selected	BBP	register */
+		UINT32		RegIdAndContent:24;			/* Register	value to program into BBP */
+	}	field;
+	UINT32			word;
+}	RF_CSR_CFG0_STRUC, *PRF_CSR_CFG0_STRUC;
+#else
+typedef	union	_RF_CSR_CFG0_STRUC	{
+	struct	{
+		UINT32		RegIdAndContent:24;			/* Register	value to program into BBP */
+		UINT32		bitwidth:5;			/* Selected	BBP	register */
+		UINT32		StandbyMode:1;		    /* 0: high when stand by 1:	low when standby */
+		UINT32		Sel:1;				/* 0:RF_LE0 activate  1:RF_LE1 activate */
+		UINT32		Busy:1;		    /* 0: idle 1: 8busy */
+	}	field;
+	UINT32			word;
+}	RF_CSR_CFG0_STRUC, *PRF_CSR_CFG0_STRUC;
+#endif
+#define RF_CSR_CFG1           		0x1024		 
+#ifdef RT_BIG_ENDIAN
+typedef	union	_RF_CSR_CFG1_STRUC	{
+	struct	{
+		UINT32		rsv:7;		    /* 0: idle 1: 8busy */
+		UINT32		RFGap:5;			/* Gap between BB_CONTROL_RF and RF_LE. 0: 3 system clock cycle (37.5usec) 1: 5 system clock cycle (62.5usec) */
+		UINT32		RegIdAndContent:24;			/* Register	value to program into BBP */
+	}	field;
+	UINT32			word;
+}	RF_CSR_CFG1_STRUC, *PRF_CSR_CFG1_STRUC;
+#else
+typedef	union	_RF_CSR_CFG1_STRUC	{
+	struct	{
+		UINT32		RegIdAndContent:24;			/* Register	value to program into BBP */
+		UINT32		RFGap:5;			/* Gap between BB_CONTROL_RF and RF_LE. 0: 3 system clock cycle (37.5usec) 1: 5 system clock cycle (62.5usec) */
+		UINT32		rsv:7;		    /* 0: idle 1: 8busy */
+	}	field;
+	UINT32			word;
+}	RF_CSR_CFG1_STRUC, *PRF_CSR_CFG1_STRUC;
+#endif
+#define RF_CSR_CFG2           		0x1028		/* */
+#ifdef RT_BIG_ENDIAN
+typedef	union	_RF_CSR_CFG2_STRUC	{
+	struct	{
+		UINT32		rsv:8;		    /* 0: idle 1: 8busy */
+		UINT32		RegIdAndContent:24;			/* Register	value to program into BBP */
+	}	field;
+	UINT32			word;
+}	RF_CSR_CFG2_STRUC, *PRF_CSR_CFG2_STRUC;
+#else
+typedef	union	_RF_CSR_CFG2_STRUC	{
+	struct	{
+		UINT32		RegIdAndContent:24;			/* Register	value to program into BBP */
+		UINT32		rsv:8;		    /* 0: idle 1: 8busy */
+	}	field;
+	UINT32			word;
+}	RF_CSR_CFG2_STRUC, *PRF_CSR_CFG2_STRUC;
+#endif
+#define LED_CFG           		0x102c		/*  MAC_CSR14 */
+#ifdef RT_BIG_ENDIAN
+typedef	union	_LED_CFG_STRUC	{
+	struct	{
+		UINT32		:1;			 
+		UINT32		LedPolar:1;			/* Led Polarity.  0: active low1: active high */
+		UINT32		YLedMode:2;			/* yellow Led Mode */
+		UINT32		GLedMode:2;			/* green Led Mode */
+		UINT32		RLedMode:2;			/* red Led Mode    0: off1: blinking upon TX2: periodic slow blinking3: always on */
+		UINT32		rsv:2;		    
+		UINT32		SlowBlinkPeriod:6;			/* slow blinking period. unit:1ms */
+		UINT32		OffPeriod:8;			/* blinking off period unit 1ms */
+		UINT32		OnPeriod:8;			/* blinking on period unit 1ms */
+	}	field;
+	UINT32			word;
+}	LED_CFG_STRUC, *PLED_CFG_STRUC;
+#else
+typedef	union	_LED_CFG_STRUC	{
+	struct	{
+		UINT32		OnPeriod:8;			/* blinking on period unit 1ms */
+		UINT32		OffPeriod:8;			/* blinking off period unit 1ms */
+		UINT32		SlowBlinkPeriod:6;			/* slow blinking period. unit:1ms */
+		UINT32		rsv:2;		    
+		UINT32		RLedMode:2;			/* red Led Mode    0: off1: blinking upon TX2: periodic slow blinking3: always on */
+		UINT32		GLedMode:2;			/* green Led Mode */
+		UINT32		YLedMode:2;			/* yellow Led Mode */
+		UINT32		LedPolar:1;			/* Led Polarity.  0: active low1: active high */
+		UINT32		:1;			 
+	}	field;
+	UINT32			word;
+}	LED_CFG_STRUC, *PLED_CFG_STRUC;
+#endif
+
+/* */
+/* The number of the Tx chains */
+/* */
+#define NUM_OF_TX_CHAIN		4
+
+#define TX_CHAIN_ADDR0_L	0x1044		/* Stream mode MAC address registers */
+#define TX_CHAIN_ADDR0_H	0x1048
+#define TX_CHAIN_ADDR1_L	0x104C
+#define TX_CHAIN_ADDR1_H	0x1050
+#define TX_CHAIN_ADDR2_L	0x1054
+#define TX_CHAIN_ADDR2_H	0x1058
+#define TX_CHAIN_ADDR3_L	0x105C
+#define TX_CHAIN_ADDR3_H	0x1060
+
+#ifdef RT_BIG_ENDIAN
+typedef union _TX_CHAIN_ADDR0_L_STRUC
+{
+	struct
+	{
+		UCHAR	TxChainAddr0L_Byte3; /* Destination MAC address of Tx chain0 (byte 3) */
+		UCHAR	TxChainAddr0L_Byte2; /* Destination MAC address of Tx chain0 (byte 2) */
+		UCHAR	TxChainAddr0L_Byte1; /* Destination MAC address of Tx chain0 (byte 1) */
+		UCHAR	TxChainAddr0L_Byte0; /* Destination MAC address of Tx chain0 (byte 0) */
+	} field;
+	
+	UINT32 word;
+} TX_CHAIN_ADDR0_L_STRUC, *PTX_CHAIN_ADDR0_L_STRUC;
+#else
+typedef union _TX_CHAIN_ADDR0_L_STRUC
+{
+	struct
+	{
+		UCHAR	TxChainAddr0L_Byte0; /* Destination MAC address of Tx chain0 (byte 0) */
+		UCHAR	TxChainAddr0L_Byte1; /* Destination MAC address of Tx chain0 (byte 1) */
+		UCHAR	TxChainAddr0L_Byte2; /* Destination MAC address of Tx chain0 (byte 2) */
+		UCHAR	TxChainAddr0L_Byte3; /* Destination MAC address of Tx chain0 (byte 3) */
+	} field;
+	
+	UINT32 word;
+}	TX_CHAIN_ADDR0_L_STRUC, *PTX_CHAIN_ADDR0_L_STRUC;
+#endif
+
+#define TX_CHAIN_ADDR0_H	0x1048
+
+#ifdef RT_BIG_ENDIAN
+typedef union _TX_CHAIN_ADDR0_H_STRUC
+{
+	struct
+	{
+		USHORT	Reserved:12; /* Reserved */
+		USHORT	TxChainSel0:4; /* Selection value of Tx chain0 */
+		UCHAR	TxChainAddr0H_Byte5; /* Destination MAC address of Tx chain0 (byte 5) */
+		UCHAR	TxChainAddr0H_Byte4; /* Destination MAC address of Tx chain0 (byte 4) */
+	} field;
+	
+	UINT32 word;
+} TX_CHAIN_ADDR0_H_STRUC, *PTX_CHAIN_ADDR0_H_STRUC;
+#else
+typedef union _TX_CHAIN_ADDR0_H_STRUC
+{
+	struct
+	{
+		UCHAR	TxChainAddr0H_Byte4; /* Destination MAC address of Tx chain0 (byte 4) */
+		UCHAR	TxChainAddr0H_Byte5; /* Destination MAC address of Tx chain0 (byte 5) */
+		USHORT	TxChainSel0:4; /* Selection value of Tx chain0 */
+		USHORT	Reserved:12; /* Reserved */
+	} field;
+	
+	UINT32 word;
+}	TX_CHAIN_ADDR0_H_STRUC, *PTX_CHAIN_ADDR0_HA_STRUC;
+#endif
+
+#define TX_CHAIN_ADDR1_L		0x104C
+
+#ifdef BIG_ENDIAN
+typedef union _TX_CHAIN_ADDR1_L_STRUC
+{
+	struct
+	{
+		UCHAR	TxChainAddr1L_Byte3; /* Destination MAC address of Tx chain1 (byte 3) */
+		UCHAR	TxChainAddr1L_Byte2; /* Destination MAC address of Tx chain1 (byte 2) */
+		UCHAR	TxChainAddr1L_Byte1; /* Destination MAC address of Tx chain1 (byte 1) */
+		UCHAR	TxChainAddr1L_Byte0; /* Destination MAC address of Tx chain1 (byte 0) */
+	} field;
+	
+	UINT32 word;
+} TX_CHAIN_ADDR1_L_STRUC, *PTX_CHAIN_ADDR1_L_STRUC;
+#else
+typedef union _TX_CHAIN_ADDR1_L_STRUC
+{
+	struct
+	{
+		UCHAR	TxChainAddr1L_Byte0; /* Destination MAC address of Tx chain1 (byte 0) */
+		UCHAR	TxChainAddr1L_Byte1; /* Destination MAC address of Tx chain1 (byte 1) */
+		UCHAR	TxChainAddr1L_Byte2; /* Destination MAC address of Tx chain1 (byte 2) */
+		UCHAR	TxChainAddr1L_Byte3; /* Destination MAC address of Tx chain1 (byte 3) */
+	} field;
+	
+	UINT32 word;
+}	TX_CHAIN_ADDR1_L_STRUC, *PTX_CHAIN_ADDR1_L_STRUC;
+#endif
+
+#define TX_CHAIN_ADDR1_H	0x1050
+
+#ifdef RT_BIG_ENDIAN
+typedef union _TX_CHAIN_ADDR1_H_STRUC
+{
+	struct
+	{
+		USHORT	Reserved:12; /* Reserved */
+		USHORT	TxChainSel0:4; /* Selection value of Tx chain0 */
+		UCHAR	TxChainAddr1H_Byte5; /* Destination MAC address of Tx chain1 (byte 5) */
+		UCHAR	TxChainAddr1H_Byte4; /* Destination MAC address of Tx chain1 (byte 4) */
+	} field;
+	
+	UINT32 word;
+} TX_CHAIN_ADDR1_H_STRUC, *PTX_CHAIN_ADDR1_H_STRUC;
+#else
+typedef union _TX_CHAIN_ADDR1_H_STRUC
+{
+	struct
+	{
+		UCHAR	TxChainAddr1H_Byte4; /* Destination MAC address of Tx chain1 (byte 4) */
+		UCHAR	TxChainAddr1H_Byte5; /* Destination MAC address of Tx chain1 (byte 5) */
+		USHORT	TxChainSel0:4; /* Selection value of Tx chain0 */
+		USHORT	Reserved:12; /* Reserved */
+	} field;
+	
+	UINT32 word;
+}	TX_CHAIN_ADDR1_H_STRUC, *PTX_CHAIN_ADDR1_HA_STRUC;
+#endif
+
+#define TX_CHAIN_ADDR2_L		0x1054
+
+#ifdef RT_BIG_ENDIAN
+typedef union _TX_CHAIN_ADDR2_L_STRUC
+{
+	struct
+	{
+		UCHAR	TxChainAddr2L_Byte3; /* Destination MAC address of Tx chain2 (byte 3) */
+		UCHAR	TxChainAddr2L_Byte2; /* Destination MAC address of Tx chain2 (byte 2) */
+		UCHAR	TxChainAddr2L_Byte1; /* Destination MAC address of Tx chain2 (byte 1) */
+		UCHAR	TxChainAddr2L_Byte0; /* Destination MAC address of Tx chain2 (byte 0) */
+	} field;
+	
+	UINT32 word;
+} TX_CHAIN_ADDR2_L_STRUC, *PTX_CHAIN_ADDR2_L_STRUC;
+#else
+typedef union _TX_CHAIN_ADDR2_L_STRUC
+{
+	struct
+	{
+		UCHAR	TxChainAddr2L_Byte0; /* Destination MAC address of Tx chain2 (byte 0) */
+		UCHAR	TxChainAddr2L_Byte1; /* Destination MAC address of Tx chain2 (byte 1) */
+		UCHAR	TxChainAddr2L_Byte2; /* Destination MAC address of Tx chain2 (byte 2) */
+		UCHAR	TxChainAddr2L_Byte3; /* Destination MAC address of Tx chain2 (byte 3) */
+	} field;
+	
+	UINT32 word;
+}	TX_CHAIN_ADDR2_L_STRUC, *PTX_CHAIN_ADDR2_L_STRUC;
+#endif
+
+#define TX_CHAIN_ADDR2_H	0x1058
+
+#ifdef RT_BIG_ENDIAN
+typedef union _TX_CHAIN_ADDR2_H_STRUC
+{
+	struct
+	{
+		USHORT	Reserved:12; /* Reserved */
+		USHORT	TxChainSel0:4; /* Selection value of Tx chain0 */
+		UCHAR	TxChainAddr2H_Byte5; /* Destination MAC address of Tx chain2 (byte 5) */
+		UCHAR	TxChainAddr2H_Byte4; /* Destination MAC address of Tx chain2 (byte 4) */
+	} field;
+	
+	UINT32 word;
+} TX_CHAIN_ADDR2_H_STRUC, *PTX_CHAIN_ADDR2_H_STRUC;
+#else
+typedef union _TX_CHAIN_ADDR2_H_STRUC
+{
+	struct
+	{
+		UCHAR	TxChainAddr2H_Byte4; /* Destination MAC address of Tx chain2 (byte 4) */
+		UCHAR	TxChainAddr2H_Byte5; /* Destination MAC address of Tx chain2 (byte 5) */
+		USHORT	TxChainSel0:4; /* Selection value of Tx chain0 */
+		USHORT	Reserved:12; /* Reserved */
+	} field;
+	
+	UINT32 word;
+}	TX_CHAIN_ADDR2_H_STRUC, *PTX_CHAIN_ADDR2_HA_STRUC;
+#endif
+
+#define TX_CHAIN_ADDR3_L		0x105C
+
+#ifdef RT_BIG_ENDIAN
+typedef union _TX_CHAIN_ADDR3_L_STRUC
+{
+	struct
+	{
+		UCHAR	TxChainAddr3L_Byte3; /* Destination MAC address of Tx chain3 (byte 3) */
+		UCHAR	TxChainAddr3L_Byte2; /* Destination MAC address of Tx chain3 (byte 2) */
+		UCHAR	TxChainAddr3L_Byte1; /* Destination MAC address of Tx chain3 (byte 1) */
+		UCHAR	TxChainAddr3L_Byte0; /* Destination MAC address of Tx chain3 (byte 0) */
+	} field;
+	
+	UINT32 word;
+} TX_CHAIN_ADDR3_L_STRUC, *PTX_CHAIN_ADDR3_L_STRUC;
+#else
+typedef union _TX_CHAIN_ADDR3_L_STRUC
+{
+	struct
+	{
+		UCHAR	TxChainAddr3L_Byte0; /* Destination MAC address of Tx chain3 (byte 0) */
+		UCHAR	TxChainAddr3L_Byte1; /* Destination MAC address of Tx chain3 (byte 1) */
+		UCHAR	TxChainAddr3L_Byte2; /* Destination MAC address of Tx chain3 (byte 2) */
+		UCHAR	TxChainAddr3L_Byte3; /* Destination MAC address of Tx chain3 (byte 3) */
+	} field;
+	
+	UINT32 word;
+}	TX_CHAIN_ADDR3_L_STRUC, *PTX_CHAIN_ADDR3_L_STRUC;
+#endif
+
+#define TX_CHAIN_ADDR3_H	0x1060
+
+#ifdef RT_BIG_ENDIAN
+typedef union _TX_CHAIN_ADDR3_H_STRUC
+{
+	struct
+	{
+		USHORT	Reserved:12; /* Reserved */
+		USHORT	TxChainSel0:4; /* Selection value of Tx chain0 */
+		UCHAR	TxChainAddr3H_Byte5; /* Destination MAC address of Tx chain3 (byte 5) */
+		UCHAR	TxChainAddr3H_Byte4; /* Destination MAC address of Tx chain3 (byte 4) */
+	} field;
+	
+	UINT32 word;
+} TX_CHAIN_ADDR3_H_STRUC, *PTX_CHAIN_ADDR3_H_STRUC;
+#else
+typedef union _TX_CHAIN_ADDR3_H_STRUC
+{
+	struct
+	{
+		UCHAR	TxChainAddr3H_Byte4; /* Destination MAC address of Tx chain3 (byte 4) */
+		UCHAR	TxChainAddr3H_Byte5; /* Destination MAC address of Tx chain3 (byte 5) */
+		USHORT	TxChainSel0:4; /* Selection value of Tx chain0 */
+		USHORT	Reserved:12; /* Reserved */
+	} field;
+	
+	UINT32 word;
+}	TX_CHAIN_ADDR3_H_STRUC, *PTX_CHAIN_ADDR3_HA_STRUC;
+#endif
+
+/* */
+/*  4.2 MAC TIMING  configuration registers (offset:0x1100) */
+/* */
+#define XIFS_TIME_CFG             0x1100		 /* MAC_CSR8  MAC_CSR9 */
+#ifdef RT_BIG_ENDIAN
+typedef	union	_IFS_SLOT_CFG_STRUC	{
+	struct	{
+	    UINT32  rsv:2;         
+	    UINT32  BBRxendEnable:1;        /*  reference RXEND signal to begin XIFS defer */
+	    UINT32  EIFS:9;        /*  unit 1us */
+	    UINT32  OfdmXifsTime:4;        /*OFDM SIFS. unit 1us. Applied after OFDM RX when MAC doesn't reference BBP signal BBRXEND */
+	    UINT32  OfdmSifsTime:8;        /*  unit 1us. Applied after OFDM RX/TX */
+	    UINT32  CckmSifsTime:8;        /*  unit 1us. Applied after CCK RX/TX */
+	}	field;
+	UINT32			word;
+}	IFS_SLOT_CFG_STRUC, *PIFS_SLOT_CFG_STRUC;
+#else
+typedef	union	_IFS_SLOT_CFG_STRUC	{
+	struct	{
+	    UINT32  CckmSifsTime:8;        /*  unit 1us. Applied after CCK RX/TX */
+	    UINT32  OfdmSifsTime:8;        /*  unit 1us. Applied after OFDM RX/TX */
+	    UINT32  OfdmXifsTime:4;        /*OFDM SIFS. unit 1us. Applied after OFDM RX when MAC doesn't reference BBP signal BBRXEND */
+	    UINT32  EIFS:9;        /*  unit 1us */
+	    UINT32  BBRxendEnable:1;        /*  reference RXEND signal to begin XIFS defer */
+	    UINT32  rsv:2;         
+	}	field;
+	UINT32			word;
+}	IFS_SLOT_CFG_STRUC, *PIFS_SLOT_CFG_STRUC;
+#endif
+
+#define BKOFF_SLOT_CFG             0x1104		 /*  mac_csr9 last 8 bits */
+#define NAV_TIME_CFG             0x1108		 /* NAV  (MAC_CSR15) */
+#define CH_TIME_CFG             0x110C		 	/* Count as channel busy */
+#define PBF_LIFE_TIMER             0x1110		 /*TX/RX MPDU timestamp timer (free run)Unit: 1us */
+#define BCN_TIME_CFG             0x1114		 /* TXRX_CSR9 */
+
+#define BCN_OFFSET0				0x042C
+#define BCN_OFFSET1				0x0430
+#ifdef SPECIFIC_BCN_BUF_SUPPORT
+#define BCN_OFFSET2				0x0444
+#define BCN_OFFSET3				0x0448
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */
+
+/* */
+/* BCN_TIME_CFG : Synchronization control register */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef	union	_BCN_TIME_CFG_STRUC	{
+	struct	{
+		UINT32		TxTimestampCompensate:8;
+        UINT32       :3;
+		UINT32		bBeaconGen:1;		/* Enable beacon generator */
+        UINT32       bTBTTEnable:1;
+		UINT32		TsfSyncMode:2;		/* Enable TSF sync, 00: disable, 01: infra mode, 10: ad-hoc mode */
+		UINT32		bTsfTicking:1;		/* Enable TSF auto counting */
+		UINT32       BeaconInterval:16;  /* in unit of 1/16 TU */
+	}	field;
+	UINT32			word;
+}	BCN_TIME_CFG_STRUC, *PBCN_TIME_CFG_STRUC;
+#else
+typedef	union	_BCN_TIME_CFG_STRUC	{
+	struct	{
+		UINT32       BeaconInterval:16;  /* in unit of 1/16 TU */
+		UINT32		bTsfTicking:1;		/* Enable TSF auto counting */
+		UINT32		TsfSyncMode:2;		/* Enable TSF sync, 00: disable, 01: infra mode, 10: ad-hoc mode */
+        UINT32       bTBTTEnable:1;
+		UINT32		bBeaconGen:1;		/* Enable beacon generator */
+        UINT32       :3;
+		UINT32		TxTimestampCompensate:8;
+	}	field;
+	UINT32			word;
+}	BCN_TIME_CFG_STRUC, *PBCN_TIME_CFG_STRUC;
+#endif
+#define TBTT_SYNC_CFG            0x1118  		/* txrx_csr10 */
+#define TSF_TIMER_DW0             0x111C  		/* Local TSF timer lsb 32 bits. Read-only */
+#define TSF_TIMER_DW1             0x1120  		/* msb 32 bits. Read-only. */
+#define TBTT_TIMER             	0x1124  		/* TImer remains till next TBTT. Read-only.  TXRX_CSR14 */
+#define INT_TIMER_CFG              	0x1128  		/* */
+#define INT_TIMER_EN             	0x112c  		/*  GP-timer and pre-tbtt Int enable */
+#define CH_IDLE_STA              	0x1130  		/*  channel idle time */
+#define CH_BUSY_STA              	0x1134  		/*  channle busy time */
+#define CH_BUSY_STA_SEC				0x1138			/*  channel busy time for secondary channel */
+/* */
+/*  4.2 MAC POWER  configuration registers (offset:0x1200) */
+/* */
+#define MAC_STATUS_CFG             0x1200		 /* old MAC_CSR12 */
+#define PWR_PIN_CFG             0x1204		 /* old MAC_CSR12 */
+#define AUTO_WAKEUP_CFG             0x1208		 /* old MAC_CSR10 */
+/* */
+/* AUTO_WAKEUP_CFG: Manual power control / status register */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef	union	_AUTO_WAKEUP_STRUC	{
+	struct	{
+		UINT32		:16;
+		UINT32		EnableAutoWakeup:1;	/* 0:sleep, 1:awake */
+		UINT32       NumofSleepingTbtt:7;          /* ForceWake has high privilege than PutToSleep when both set */
+		UINT32       AutoLeadTime:8;
+	}	field;
+	UINT32			word;
+}	AUTO_WAKEUP_STRUC, *PAUTO_WAKEUP_STRUC;
+#else
+typedef	union	_AUTO_WAKEUP_STRUC	{
+	struct	{
+		UINT32       AutoLeadTime:8;
+		UINT32       NumofSleepingTbtt:7;          /* ForceWake has high privilege than PutToSleep when both set */
+		UINT32		EnableAutoWakeup:1;	/* 0:sleep, 1:awake */
+		UINT32		:16;
+	}	field;
+	UINT32			word;
+}	AUTO_WAKEUP_STRUC, *PAUTO_WAKEUP_STRUC;
+#endif
+/* */
+/*  4.3 MAC TX  configuration registers (offset:0x1300) */
+/* */
+
+#define EDCA_AC0_CFG	0x1300		/*AC_TXOP_CSR0 0x3474 */
+#define EDCA_AC1_CFG	0x1304
+#define EDCA_AC2_CFG	0x1308
+#define EDCA_AC3_CFG	0x130c
+#ifdef RT_BIG_ENDIAN
+typedef	union	_EDCA_AC_CFG_STRUC	{
+	struct	{
+	    UINT32  :12;        /* */
+	    UINT32  Cwmax:4;        /*unit power of 2 */
+	    UINT32  Cwmin:4;        /* */
+	    UINT32  Aifsn:4;        /* # of slot time */
+	    UINT32  AcTxop:8;        /*  in unit of 32us */
+	}	field;
+	UINT32			word;
+}	EDCA_AC_CFG_STRUC, *PEDCA_AC_CFG_STRUC;
+#else
+typedef	union	_EDCA_AC_CFG_STRUC	{
+	struct	{
+	    UINT32  AcTxop:8;        /*  in unit of 32us */
+	    UINT32  Aifsn:4;        /* # of slot time */
+	    UINT32  Cwmin:4;        /* */
+	    UINT32  Cwmax:4;        /*unit power of 2 */
+	    UINT32  :12;       /* */
+	}	field;
+	UINT32			word;
+}	EDCA_AC_CFG_STRUC, *PEDCA_AC_CFG_STRUC;
+#endif
+
+/* */
+/* Default Tx power */
+/* */
+#define DEFAULT_TX_POWER	0x6
+
+#define EDCA_TID_AC_MAP		0x1310
+#define TX_PWR_CFG_0		0x1314
+#define TX_PWR_CFG_0_EXT	0x1390
+#define TX_PWR_CFG_1		0x1318
+#define TX_PWR_CFG_1_EXT	0x1394
+#define TX_PWR_CFG_2		0x131C
+#define TX_PWR_CFG_2_EXT	0x1398
+#define TX_PWR_CFG_3		0x1320
+#define TX_PWR_CFG_3_EXT	0x139C
+#define TX_PWR_CFG_4		0x1324
+#define TX_PWR_CFG_4_EXT	0x13A0
+#define TX_PWR_CFG_5		0x1384
+#define TX_PWR_CFG_6		0x1388
+#define TX_PWR_CFG_7		0x13D4
+#define TX_PWR_CFG_8		0x13D8
+#define TX_PWR_CFG_9		0x13DC
+
+#ifdef RT_BIG_ENDIAN
+typedef	union	_TX_PWR_CFG_STRUC	{
+	struct	{
+	    ULONG       Byte3:8;     
+	    ULONG       Byte2:8;     
+	    ULONG       Byte1:8;     
+	    ULONG       Byte0:8;     
+	}	field;
+	ULONG			word;
+}	TX_PWR_CFG_STRUC, *PTX_PWR_CFG_STRUC;
+#else
+typedef	union	_TX_PWR_CFG_STRUC	{
+	struct	{
+	    ULONG       Byte0:8;     
+	    ULONG       Byte1:8;     
+	    ULONG       Byte2:8;     
+	    ULONG       Byte3:8;     
+	}	field;
+	ULONG			word;
+}	TX_PWR_CFG_STRUC, *PTX_PWR_CFG_STRUC;
+#endif
+
+#define TX_PIN_CFG		0x1328		 
+#define TX_BAND_CFG	0x132c		/* 0x1 use upper 20MHz. 0 juse lower 20MHz */
+#define TX_SW_CFG0		0x1330
+#define TX_SW_CFG1		0x1334
+#define TX_SW_CFG2		0x1338
+#define TXOP_THRES_CFG		0x133c
+
+#ifdef RT_BIG_ENDIAN
+typedef union _TXOP_THRESHOLD_CFG_STRUC
+{
+	struct
+	{
+		UINT32	TXOP_REM_THRES:8; /* Remaining TXOP threshold (unit: 32us) */
+		UINT32	CF_END_THRES:8; /* CF-END threshold (unit: 32us) */
+		UINT32	RDG_IN_THRES:8; /* Rx RDG threshold (unit: 32us) */
+		UINT32	RDG_OUT_THRES:8; /* Tx RDG threshold (unit: 32us) */
+	} field;
+	
+	UINT32		word;
+} TXOP_THRESHOLD_CFG_STRUC, *PTXOP_THRESHOLD_CFG_STRUC;
+#else
+typedef union _TXOP_THRESHOLD_CFG_STRUC
+{
+	struct
+	{
+		UINT32	RDG_OUT_THRES:8; /* Tx RDG threshold (unit: 32us) */
+		UINT32	RDG_IN_THRES:8; /* Rx RDG threshold (unit: 32us) */
+		UINT32	CF_END_THRES:8; /* CF-END threshold (unit: 32us) */
+		UINT32	TXOP_REM_THRES:8; /* Remaining TXOP threshold (unit: 32us) */
+	} field;
+	
+	UINT32		word;
+} TXOP_THRESHOLD_CFG_STRUC, *PTXOP_THRESHOLD_CFG_STRUC;
+#endif
+
+#define TXOP_CTRL_CFG		0x1340
+#define TX_RTS_CFG		0x1344
+
+#define TX_TXBF_CFG_0		0x138c
+#define TX_TXBF_CFG_1		0x13A4
+#define TX_TXBF_CFG_2		0x13A8
+#define TX_TXBF_CFG_3		0x13AC
+
+#ifdef RT_BIG_ENDIAN
+typedef	union	_TX_RTS_CFG_STRUC	{
+	struct	{
+	    UINT32       rsv:7;     
+	    UINT32       RtsFbkEn:1;    /* enable rts rate fallback */
+	    UINT32       RtsThres:16;    /* unit:byte */
+	    UINT32       AutoRtsRetryLimit:8;
+	}	field;
+	UINT32			word;
+}	TX_RTS_CFG_STRUC, *PTX_RTS_CFG_STRUC;
+#else
+typedef	union	_TX_RTS_CFG_STRUC	{
+	struct	{
+	    UINT32       AutoRtsRetryLimit:8;
+	    UINT32       RtsThres:16;    /* unit:byte */
+	    UINT32       RtsFbkEn:1;    /* enable rts rate fallback */
+	    UINT32       rsv:7;     /* 1: HT non-STBC control frame enable */
+	}	field;
+	UINT32			word;
+}	TX_RTS_CFG_STRUC, *PTX_RTS_CFG_STRUC;
+#endif
+
+typedef	union	_TX_TXBF_CFG_0_STRUC	{
+	struct	{
+#ifdef RT_BIG_ENDIAN
+	    UINT32       EtxbfFbkRate:16;     
+	    UINT32       EtxbfFbkEn:1;
+	    UINT32       EtxbfFbkSeqEn:1;
+	    UINT32       EtxbfFbkCoef:2;
+	    UINT32       EtxbfFbkCode:2;
+	    UINT32       EtxbfFbkNg:2;
+	    UINT32       CsdBypass:1;
+	    UINT32       EtxbfForce:1;
+	    UINT32       EtxbfEnable:1;
+	    UINT32       AutoTxbfEn:3;
+	    UINT32       ItxbfForce:1;
+	    UINT32       ItxbfEn:1;
+#else
+	    UINT32       ItxbfEn:1;
+	    UINT32       ItxbfForce:1;
+	    UINT32       AutoTxbfEn:3;
+	    UINT32       EtxbfEnable:1;
+	    UINT32       EtxbfForce:1;
+	    UINT32       CsdBypass:1;
+	    UINT32       EtxbfFbkNg:2;
+	    UINT32       EtxbfFbkCode:2;
+	    UINT32       EtxbfFbkCoef:2;
+	    UINT32       EtxbfFbkSeqEn:1;
+	    UINT32       EtxbfFbkEn:1;
+	    UINT32       EtxbfFbkRate:16;     
+#endif
+	}	field;
+	UINT32			word;
+}	TX_TXBF_CFG_0_STRUC, *PTX_TXBF_CFG_0_STRUC;
+
+#define TX_TIMEOUT_CFG	0x1348
+#ifdef RT_BIG_ENDIAN
+typedef	union	_TX_TIMEOUT_CFG_STRUC	{
+	struct	{
+	    UINT32       rsv2:8;     
+	    UINT32       TxopTimeout:8;	/*TXOP timeout value for TXOP truncation.  It is recommended that (SLOT_TIME) > (TX_OP_TIMEOUT) > (RX_ACK_TIMEOUT) */
+	    UINT32       RxAckTimeout:8;	/* unit:slot. Used for TX precedure */
+	    UINT32       MpduLifeTime:4;    /*  expiration time = 2^(9+MPDU LIFE TIME)  us */
+	    UINT32       rsv:4;     
+	}	field;
+	UINT32			word;
+}	TX_TIMEOUT_CFG_STRUC, *PTX_TIMEOUT_CFG_STRUC;
+#else
+typedef	union	_TX_TIMEOUT_CFG_STRUC	{
+	struct	{
+	    UINT32       rsv:4;     
+	    UINT32       MpduLifeTime:4;    /*  expiration time = 2^(9+MPDU LIFE TIME)  us */
+	    UINT32       RxAckTimeout:8;	/* unit:slot. Used for TX precedure */
+	    UINT32       TxopTimeout:8;	/*TXOP timeout value for TXOP truncation.  It is recommended that (SLOT_TIME) > (TX_OP_TIMEOUT) > (RX_ACK_TIMEOUT) */
+	    UINT32       rsv2:8;     /* 1: HT non-STBC control frame enable */
+	}	field;
+	UINT32			word;
+}	TX_TIMEOUT_CFG_STRUC, *PTX_TIMEOUT_CFG_STRUC;
+#endif
+#define TX_RTY_CFG	0x134c
+#ifdef RT_BIG_ENDIAN
+typedef	union GNU_PACKED _TX_RTY_CFG_STRUC	{
+	struct	{
+	    UINT32       rsv:1;     
+	    UINT32       TxautoFBEnable:1;    /* Tx retry PHY rate auto fallback enable */
+	    UINT32       AggRtyMode:1;	/* Aggregate MPDU retry mode.  0:expired by retry limit, 1: expired by mpdu life timer */
+	    UINT32       NonAggRtyMode:1;	/* Non-Aggregate MPDU retry mode.  0:expired by retry limit, 1: expired by mpdu life timer */
+	    UINT32       LongRtyThre:12;	/* Long retry threshoold */
+	    UINT32       LongRtyLimit:8;	/*long retry limit */
+	    UINT32       ShortRtyLimit:8;	/*  short retry limit */
+	    
+	}	field;
+	UINT32			word;
+}	TX_RTY_CFG_STRUC, *PTX_RTY_CFG_STRUC;
+#else
+typedef	union GNU_PACKED _TX_RTY_CFG_STRUC	{
+	struct	{
+	    UINT32       ShortRtyLimit:8;	/*  short retry limit */
+	    UINT32       LongRtyLimit:8;	/*long retry limit */
+	    UINT32       LongRtyThre:12;	/* Long retry threshoold */
+	    UINT32       NonAggRtyMode:1;	/* Non-Aggregate MPDU retry mode.  0:expired by retry limit, 1: expired by mpdu life timer */
+	    UINT32       AggRtyMode:1;	/* Aggregate MPDU retry mode.  0:expired by retry limit, 1: expired by mpdu life timer */
+	    UINT32       TxautoFBEnable:1;    /* Tx retry PHY rate auto fallback enable */
+	    UINT32       rsv:1;     /* 1: HT non-STBC control frame enable */
+	}	field;
+	UINT32			word;
+}	TX_RTY_CFG_STRUC, *PTX_RTY_CFG_STRUC;
+#endif
+#define TX_LINK_CFG	0x1350
+#ifdef RT_BIG_ENDIAN
+typedef	union	GNU_PACKED _TX_LINK_CFG_STRUC	{
+	struct GNU_PACKED {
+	    UINT32       RemotMFS:8;	/*remote MCS feedback sequence number */
+	    UINT32       RemotMFB:8;    /*  remote MCS feedback */
+	    UINT32       rsv:3;	/* */
+	    UINT32       TxCFAckEn:1;	/*   Piggyback CF-ACK enable */
+	    UINT32       TxRDGEn:1;	/* RDG TX enable */
+	    UINT32       TxMRQEn:1;	/*  MCS request TX enable */
+	    UINT32       RemoteUMFSEnable:1;	/*  remote unsolicit  MFB enable.  0: not apply remote remote unsolicit (MFS=7) */
+	    UINT32       MFBEnable:1;	/*  TX apply remote MFB 1:enable */
+	    UINT32       RemoteMFBLifeTime:8;	/*remote MFB life time. unit : 32us */
+	}	field;
+	UINT32			word;
+}	TX_LINK_CFG_STRUC, *PTX_LINK_CFG_STRUC;
+#else
+typedef	union	GNU_PACKED _TX_LINK_CFG_STRUC	{
+	struct GNU_PACKED {
+	    UINT32       RemoteMFBLifeTime:8;	/*remote MFB life time. unit : 32us */
+	    UINT32       MFBEnable:1;	/*  TX apply remote MFB 1:enable */
+	    UINT32       RemoteUMFSEnable:1;	/*  remote unsolicit  MFB enable.  0: not apply remote remote unsolicit (MFS=7) */
+	    UINT32       TxMRQEn:1;	/*  MCS request TX enable */
+	    UINT32       TxRDGEn:1;	/* RDG TX enable */
+	    UINT32       TxCFAckEn:1;	/*   Piggyback CF-ACK enable */
+	    UINT32       rsv:3;	/* */
+	    UINT32       RemotMFB:8;    /*  remote MCS feedback */
+	    UINT32       RemotMFS:8;	/*remote MCS feedback sequence number */
+	}	field;
+	UINT32			word;
+}	TX_LINK_CFG_STRUC, *PTX_LINK_CFG_STRUC;
+#endif
+#define HT_FBK_CFG0	0x1354
+#ifdef RT_BIG_ENDIAN
+typedef	union GNU_PACKED _HT_FBK_CFG0_STRUC	{
+	struct	{
+	    UINT32       HTMCS7FBK:4;
+	    UINT32       HTMCS6FBK:4;
+	    UINT32       HTMCS5FBK:4;
+	    UINT32       HTMCS4FBK:4;
+	    UINT32       HTMCS3FBK:4;
+	    UINT32       HTMCS2FBK:4;
+	    UINT32       HTMCS1FBK:4;
+	    UINT32       HTMCS0FBK:4;
+	}	field;
+	UINT32			word;
+}	HT_FBK_CFG0_STRUC, *PHT_FBK_CFG0_STRUC;
+#else
+typedef	union GNU_PACKED _HT_FBK_CFG0_STRUC	{
+	struct	{
+	    UINT32       HTMCS0FBK:4;
+	    UINT32       HTMCS1FBK:4;
+	    UINT32       HTMCS2FBK:4;
+	    UINT32       HTMCS3FBK:4;
+	    UINT32       HTMCS4FBK:4;
+	    UINT32       HTMCS5FBK:4;
+	    UINT32       HTMCS6FBK:4;
+	    UINT32       HTMCS7FBK:4;
+	}	field;
+	UINT32			word;
+}	HT_FBK_CFG0_STRUC, *PHT_FBK_CFG0_STRUC;
+#endif
+#define HT_FBK_CFG1	0x1358
+#ifdef RT_BIG_ENDIAN
+typedef	union	_HT_FBK_CFG1_STRUC	{
+	struct	{
+	    UINT32       HTMCS15FBK:4;
+	    UINT32       HTMCS14FBK:4;
+	    UINT32       HTMCS13FBK:4;
+	    UINT32       HTMCS12FBK:4;
+	    UINT32       HTMCS11FBK:4;
+	    UINT32       HTMCS10FBK:4;
+	    UINT32       HTMCS9FBK:4;
+	    UINT32       HTMCS8FBK:4;
+	}	field;
+	UINT32			word;
+}	HT_FBK_CFG1_STRUC, *PHT_FBK_CFG1_STRUC;
+#else
+typedef	union	_HT_FBK_CFG1_STRUC	{
+	struct	{
+	    UINT32       HTMCS8FBK:4;
+	    UINT32       HTMCS9FBK:4;
+	    UINT32       HTMCS10FBK:4;
+	    UINT32       HTMCS11FBK:4;
+	    UINT32       HTMCS12FBK:4;
+	    UINT32       HTMCS13FBK:4;
+	    UINT32       HTMCS14FBK:4;
+	    UINT32       HTMCS15FBK:4;
+	}	field;
+	UINT32			word;
+}	HT_FBK_CFG1_STRUC, *PHT_FBK_CFG1_STRUC;
+#endif
+#define LG_FBK_CFG0	0x135c
+#ifdef RT_BIG_ENDIAN
+typedef	union	_LG_FBK_CFG0_STRUC	{
+	struct	{
+	    UINT32       OFDMMCS7FBK:4;	/*initial value is 6 */
+	    UINT32       OFDMMCS6FBK:4;	/*initial value is 5 */
+	    UINT32       OFDMMCS5FBK:4;	/*initial value is 4 */
+	    UINT32       OFDMMCS4FBK:4;	/*initial value is 3 */
+	    UINT32       OFDMMCS3FBK:4;	/*initial value is 2 */
+	    UINT32       OFDMMCS2FBK:4;	/*initial value is 1 */
+	    UINT32       OFDMMCS1FBK:4;	/*initial value is 0 */
+	    UINT32       OFDMMCS0FBK:4;	/*initial value is 0 */
+	}	field;
+	UINT32			word;
+}	LG_FBK_CFG0_STRUC, *PLG_FBK_CFG0_STRUC;
+#else
+typedef	union	_LG_FBK_CFG0_STRUC	{
+	struct	{
+	    UINT32       OFDMMCS0FBK:4;	/*initial value is 0 */
+	    UINT32       OFDMMCS1FBK:4;	/*initial value is 0 */
+	    UINT32       OFDMMCS2FBK:4;	/*initial value is 1 */
+	    UINT32       OFDMMCS3FBK:4;	/*initial value is 2 */
+	    UINT32       OFDMMCS4FBK:4;	/*initial value is 3 */
+	    UINT32       OFDMMCS5FBK:4;	/*initial value is 4 */
+	    UINT32       OFDMMCS6FBK:4;	/*initial value is 5 */
+	    UINT32       OFDMMCS7FBK:4;	/*initial value is 6 */
+	}	field;
+	UINT32			word;
+}	LG_FBK_CFG0_STRUC, *PLG_FBK_CFG0_STRUC;
+#endif
+#define LG_FBK_CFG1		0x1360
+#ifdef RT_BIG_ENDIAN
+typedef	union	_LG_FBK_CFG1_STRUC	{
+	struct	{
+	    UINT32       rsv:16;	 
+	    UINT32       CCKMCS3FBK:4;	/*initial value is 2 */
+	    UINT32       CCKMCS2FBK:4;	/*initial value is 1 */
+	    UINT32       CCKMCS1FBK:4;	/*initial value is 0 */
+	    UINT32       CCKMCS0FBK:4;	/*initial value is 0 */
+	}	field;
+	UINT32			word;
+}	LG_FBK_CFG1_STRUC, *PLG_FBK_CFG1_STRUC;
+#else
+typedef	union	_LG_FBK_CFG1_STRUC	{
+	struct	{
+	    UINT32       CCKMCS0FBK:4;	/*initial value is 0 */
+	    UINT32       CCKMCS1FBK:4;	/*initial value is 0 */
+	    UINT32       CCKMCS2FBK:4;	/*initial value is 1 */
+	    UINT32       CCKMCS3FBK:4;	/*initial value is 2 */
+	    UINT32       rsv:16;	 
+	}	field;
+	UINT32			word;
+}	LG_FBK_CFG1_STRUC, *PLG_FBK_CFG1_STRUC;
+#endif
+
+#ifdef DOT11N_SS3_SUPPORT
+#define TX_FBK_CFG_3S_0	0x13c4
+#ifdef RT_BIG_ENDIAN
+typedef	union	_TX_FBK_CFG_3S_0_STRUC	{
+	struct	{
+		UINT32       rsv0:4;
+		UINT32       HTMCS19FBK:4;
+		UINT32       rsv1:4;
+		UINT32       HTMCS18FBK:4;
+		UINT32       rsv2:4;
+		UINT32       HTMCS17FBK:4;
+		UINT32       rsv3:4;
+		UINT32       HTMCS16FBK:4;
+	}	field;
+	UINT32			word;
+}	TX_FBK_CFG_3S_0_STRUC, *PTX_FBK_CFG_3S_0_STRUC;
+#else
+typedef	union	_TX_FBK_CFG_3S_0_STRUC	{
+	struct	{
+		UINT32       HTMCS16FBK:4;
+		UINT32       rsv3:4;
+		UINT32       HTMCS17FBK:4;
+		UINT32       rsv2:4;
+		UINT32       HTMCS18FBK:4;
+		UINT32       rsv1:4;
+		UINT32       HTMCS19FBK:4;
+		UINT32       rsv0:4;
+	}	field;
+	UINT32			word;
+}	TX_FBK_CFG_3S_0_STRUC, *PTX_FBK_CFG_3S_0_STRUC;
+#endif
+
+#define TX_FBK_CFG_3S_1	0x13c8
+#ifdef RT_BIG_ENDIAN
+typedef	union	_TX_FBK_CFG_3S_1_STRUC	{
+	struct	{
+		UINT32       rsv0:3;
+		UINT32       HTMCS23FBK:5;
+		UINT32       rsv1:3;
+		UINT32       HTMCS22FBK:5;
+		UINT32       rsv2:3;
+		UINT32       HTMCS21FBK:5;
+		UINT32       rsv3:3;
+		UINT32       HTMCS20FBK:5;
+	}	field;
+	UINT32			word;
+}	TX_FBK_CFG_3S_1_STRUC, *PTX_FBK_CFG_3S_1_STRUC;
+#else
+typedef	union	_TX_FBK_CFG_3S_1_STRUC	{
+	struct	{
+		UINT32       HTMCS20FBK:5;
+		UINT32       rsv3:3;
+		UINT32       HTMCS21FBK:5;
+		UINT32       rsv2:3;
+		UINT32       HTMCS22FBK:5;
+		UINT32       rsv1:3;
+		UINT32       HTMCS23FBK:5;
+		UINT32       rsv0:3;
+	}	field;
+	UINT32			word;
+}	TX_FBK_CFG_3S_1_STRUC, *PTX_FBK_CFG_3S_1_STRUC;
+#endif
+#endif /* DOT11N_SS3_SUPPORT */
+
+/*======================================================= */
+/*================ Protection Paramater================================ */
+/*======================================================= */
+#define CCK_PROT_CFG	0x1364		/*CCK Protection */
+#define ASIC_SHORTNAV		1
+#define ASIC_LONGNAV		2
+#define ASIC_RTS		1
+#define ASIC_CTS		2
+#ifdef RT_BIG_ENDIAN
+typedef	union	_PROT_CFG_STRUC	{
+	struct	{
+	    UINT32       rsv:5;	 
+	    UINT32       RTSThEn:1;	/*RTS threshold enable on CCK TX */
+	    UINT32       TxopAllowGF40:1;	/*CCK TXOP allowance.0:disallow. */
+	    UINT32       TxopAllowGF20:1;	/*CCK TXOP allowance.0:disallow. */
+	    UINT32       TxopAllowMM40:1;	/*CCK TXOP allowance.0:disallow. */
+	    UINT32       TxopAllowMM20:1;	/*CCK TXOP allowance. 0:disallow. */
+	    UINT32       TxopAllowOfdm:1;	/*CCK TXOP allowance.0:disallow. */
+	    UINT32       TxopAllowCck:1;	/*CCK TXOP allowance.0:disallow. */
+	    UINT32       ProtectNav:2;	/*TXOP protection type for CCK TX. 0:None, 1:ShortNAVprotect,  2:LongNAVProtect, 3:rsv */
+	    UINT32       ProtectCtrl:2;	/*Protection control frame type for CCK TX. 1:RTS/CTS, 2:CTS-to-self, 0:None, 3:rsv */
+	    UINT32       ProtectRate:16;	/*Protection control frame rate for CCK TX(RTS/CTS/CFEnd). */
+	}	field;
+	UINT32			word;
+}	PROT_CFG_STRUC, *PPROT_CFG_STRUC;
+#else
+typedef	union	_PROT_CFG_STRUC	{
+	struct	{
+	    UINT32       ProtectRate:16;	/*Protection control frame rate for CCK TX(RTS/CTS/CFEnd). */
+	    UINT32       ProtectCtrl:2;	/*Protection control frame type for CCK TX. 1:RTS/CTS, 2:CTS-to-self, 0:None, 3:rsv */
+	    UINT32       ProtectNav:2;	/*TXOP protection type for CCK TX. 0:None, 1:ShortNAVprotect,  2:LongNAVProtect, 3:rsv */
+	    UINT32       TxopAllowCck:1;	/*CCK TXOP allowance.0:disallow. */
+	    UINT32       TxopAllowOfdm:1;	/*CCK TXOP allowance.0:disallow. */
+	    UINT32       TxopAllowMM20:1;	/*CCK TXOP allowance. 0:disallow. */
+	    UINT32       TxopAllowMM40:1;	/*CCK TXOP allowance.0:disallow. */
+	    UINT32       TxopAllowGF20:1;	/*CCK TXOP allowance.0:disallow. */
+	    UINT32       TxopAllowGF40:1;	/*CCK TXOP allowance.0:disallow. */
+	    UINT32       RTSThEn:1;	/*RTS threshold enable on CCK TX */
+	    UINT32       rsv:5;	 
+	}	field;
+	UINT32			word;
+}	PROT_CFG_STRUC, *PPROT_CFG_STRUC;
+#endif
+
+#define OFDM_PROT_CFG	0x1368		/*OFDM Protection */
+#define MM20_PROT_CFG	0x136C		/*MM20 Protection */
+#define MM40_PROT_CFG	0x1370		/*MM40 Protection */
+#define GF20_PROT_CFG	0x1374		/*GF20 Protection */
+#define GF40_PROT_CFG	0x1378		/*GR40 Protection */
+#define EXP_CTS_TIME	0x137C		/* */
+#define EXP_ACK_TIME	0x1380		/* */
+
+#define HT_FBK_3SS_CFG0	0x13C4
+#ifdef RT_BIG_ENDIAN
+typedef	union	_HT_FBK_3SS_CFG0_STRUC	{
+	struct	{
+	    UINT32       HTMCS19FBK:5;
+	    UINT32       rsv3:3;
+	    UINT32       HTMCS18FBK:5;
+	    UINT32       rsv2:3;
+	    UINT32       HTMCS17BK:5;
+	    UINT32       rsv1:3;
+	    UINT32       HTMCS16FBK:5;
+	    UINT32       rsv0:3;
+	}	field;
+	UINT32			word;
+}	HT_FBK_3SS_CFG0_STRUC, *PHT_FBK_3SS_CFG0_STRUC;
+#else
+typedef	union	_HT_FBK_3SS_CFG0_STRUC	{
+	struct	{
+	    UINT32       HTMCS16FBK:5;
+	    UINT32       rsv0:3;
+	    UINT32       HTMCS17FBK:5;
+	    UINT32       rsv1:3;
+	    UINT32       HTMCS18FBK:5;
+	    UINT32       rsv2:3;
+	    UINT32       HTMCS19FBK:5;
+	    UINT32       rsv3:3;
+	}	field;
+	UINT32			word;
+}	HT_FBK_3SS_CFG0_STRUC, *PHT_FBK_3SS_CFG0_STRUC;
+#endif
+
+#define HT_FBK_3SS_CFG1	0x13C8
+#ifdef RT_BIG_ENDIAN
+typedef	union	_HT_FBK_3SS_CFG1_STRUC	{
+	struct	{
+	    UINT32       HTMCS23FBK:5;
+	    UINT32       rsv3:3;
+	    UINT32       HTMCS22FBK:5;
+	    UINT32       rsv2:3;
+	    UINT32       HTMCS21BK:5;
+	    UINT32       rsv1:3;
+	    UINT32       HTMCS20FBK:5;
+	    UINT32       rsv0:3;
+	}	field;
+	UINT32			word;
+}	HT_FBK_3SS_CFG1_STRUC, *PHT_FBK_3SS_CFG1_STRUC;
+#else
+typedef	union	_HT_FBK_3SS_CFG1_STRUC	{
+	struct	{
+	    UINT32       HTMCS20FBK:5;
+	    UINT32       rsv0:3;
+	    UINT32       HTMCS21FBK:5;
+	    UINT32       rsv1:3;
+	    UINT32       HTMCS22FBK:5;
+	    UINT32       rsv2:3;
+	    UINT32       HTMCS23FBK:5;
+	    UINT32       rsv3:3;
+	}	field;
+	UINT32			word;
+}	HT_FBK_3SS_CFG1_STRUC, *PHT_FBK_3SS_CFG1_STRUC;
+#endif
+
+/* */
+/*  4.4 MAC RX configuration registers (offset:0x1400) */
+/* */
+#define RX_FILTR_CFG	0x1400			/*TXRX_CSR0 */
+#define AUTO_RSP_CFG	0x1404			/*TXRX_CSR4 */
+/* */
+/* TXRX_CSR4: Auto-Responder/ */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef union _AUTO_RSP_CFG_STRUC {
+ struct {
+     UINT32        :24;    
+     UINT32       AckCtsPsmBit:1;   /* Power bit value in conrtrol frame */
+     UINT32       DualCTSEn:1;   /* Power bit value in conrtrol frame */
+     UINT32       rsv:1;   /* Power bit value in conrtrol frame */
+     UINT32       AutoResponderPreamble:1;    /* 0:long, 1:short preamble */
+     UINT32       CTS40MRef:1;  /* Response CTS 40MHz duplicate mode */
+     UINT32       CTS40MMode:1;  /* Response CTS 40MHz duplicate mode */
+     UINT32       BACAckPolicyEnable:1;    /* 0:long, 1:short preamble */
+     UINT32       AutoResponderEnable:1;
+ } field;
+ UINT32   word;
+} AUTO_RSP_CFG_STRUC, *PAUTO_RSP_CFG_STRUC;
+#else
+typedef union _AUTO_RSP_CFG_STRUC {
+ struct {
+     UINT32       AutoResponderEnable:1;
+     UINT32       BACAckPolicyEnable:1;    /* 0:long, 1:short preamble */
+     UINT32       CTS40MMode:1;  /* Response CTS 40MHz duplicate mode */
+     UINT32       CTS40MRef:1;  /* Response CTS 40MHz duplicate mode */
+     UINT32       AutoResponderPreamble:1;    /* 0:long, 1:short preamble */
+     UINT32       rsv:1;   /* Power bit value in conrtrol frame */
+     UINT32       DualCTSEn:1;   /* Power bit value in conrtrol frame */
+     UINT32       AckCtsPsmBit:1;   /* Power bit value in conrtrol frame */
+     UINT32        :24;    
+ } field;
+ UINT32   word;
+} AUTO_RSP_CFG_STRUC, *PAUTO_RSP_CFG_STRUC;
+#endif
+
+#define LEGACY_BASIC_RATE	0x1408	/*  TXRX_CSR5           0x3054 */
+#define HT_BASIC_RATE		0x140c
+#define HT_CTRL_CFG		0x1410
+#define SIFS_COST_CFG		0x1414
+#define RX_PARSER_CFG		0x1418	/*Set NAV for all received frames */
+
+/* */
+/*  4.5 MAC Security configuration (offset:0x1500) */
+/* */
+#define TX_SEC_CNT0		0x1500		/* */
+#define RX_SEC_CNT0		0x1504		/* */
+#define CCMP_FC_MUTE		0x1508		/* */
+/* */
+/*  4.6 HCCA/PSMP (offset:0x1600) */
+/* */
+#define TXOP_HLDR_ADDR0		0x1600		 
+#define TXOP_HLDR_ADDR1		0x1604		 
+#define TXOP_HLDR_ET		0x1608		 
+#define QOS_CFPOLL_RA_DW0		0x160c
+#define QOS_CFPOLL_A1_DW1		0x1610
+#define QOS_CFPOLL_QC		0x1614
+/* */
+/*  4.7 MAC Statistis registers (offset:0x1700) */
+/* */
+#define RX_STA_CNT0		0x1700		/* */
+#define RX_STA_CNT1		0x1704		/* */
+#define RX_STA_CNT2		0x1708		/* */
+
+/* */
+/* RX_STA_CNT0_STRUC: RX PLCP error count & RX CRC error count */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef	union	_RX_STA_CNT0_STRUC	{
+	struct	{
+	    USHORT  PhyErr;
+	    USHORT  CrcErr;
+	}	field;
+	UINT32			word;
+}	RX_STA_CNT0_STRUC, *PRX_STA_CNT0_STRUC;
+#else
+typedef	union	_RX_STA_CNT0_STRUC	{
+	struct	{
+	    USHORT  CrcErr;
+	    USHORT  PhyErr;
+	}	field;
+	UINT32			word;
+}	RX_STA_CNT0_STRUC, *PRX_STA_CNT0_STRUC;
+#endif
+
+/* */
+/* RX_STA_CNT1_STRUC: RX False CCA count & RX LONG frame count */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef	union	_RX_STA_CNT1_STRUC	{
+	struct	{
+	    USHORT  PlcpErr;
+	    USHORT  FalseCca;
+	}	field;
+	UINT32			word;
+}	RX_STA_CNT1_STRUC, *PRX_STA_CNT1_STRUC;
+#else
+typedef	union	_RX_STA_CNT1_STRUC	{
+	struct	{
+	    USHORT  FalseCca;
+	    USHORT  PlcpErr;
+	}	field;
+	UINT32			word;
+}	RX_STA_CNT1_STRUC, *PRX_STA_CNT1_STRUC;
+#endif
+
+/* */
+/* RX_STA_CNT2_STRUC: */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef	union	_RX_STA_CNT2_STRUC	{
+	struct	{
+	    USHORT  RxFifoOverflowCount;
+	    USHORT  RxDupliCount;
+	}	field;
+	UINT32			word;
+}	RX_STA_CNT2_STRUC, *PRX_STA_CNT2_STRUC;
+#else
+typedef	union	_RX_STA_CNT2_STRUC	{
+	struct	{
+	    USHORT  RxDupliCount;
+	    USHORT  RxFifoOverflowCount;
+	}	field;
+	UINT32			word;
+}	RX_STA_CNT2_STRUC, *PRX_STA_CNT2_STRUC;
+#endif
+#define TX_STA_CNT0		0x170C		/* */
+/* */
+/* STA_CSR3: TX Beacon count */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef	union	_TX_STA_CNT0_STRUC	{
+	struct	{
+	    USHORT  TxBeaconCount;
+	    USHORT  TxFailCount;
+	}	field;
+	UINT32			word;
+}	TX_STA_CNT0_STRUC, *PTX_STA_CNT0_STRUC;
+#else
+typedef	union	_TX_STA_CNT0_STRUC	{
+	struct	{
+	    USHORT  TxFailCount;
+	    USHORT  TxBeaconCount;
+	}	field;
+	UINT32			word;
+}	TX_STA_CNT0_STRUC, *PTX_STA_CNT0_STRUC;
+#endif
+#define TX_STA_CNT1		0x1710		/* */
+/* */
+/* TX_STA_CNT1: TX tx count */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef	union	_TX_STA_CNT1_STRUC	{
+	struct	{
+	    USHORT  TxRetransmit;
+	    USHORT  TxSuccess;
+	}	field;
+	UINT32			word;
+}	TX_STA_CNT1_STRUC, *PTX_STA_CNT1_STRUC;
+#else
+typedef	union	_TX_STA_CNT1_STRUC	{
+	struct	{
+	    USHORT  TxSuccess;
+	    USHORT  TxRetransmit;
+	}	field;
+	UINT32			word;
+}	TX_STA_CNT1_STRUC, *PTX_STA_CNT1_STRUC;
+#endif
+#define TX_STA_CNT2		0x1714		/* */
+/* */
+/* TX_STA_CNT2: TX tx count */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef	union	_TX_STA_CNT2_STRUC	{
+	struct	{
+	    USHORT  TxUnderFlowCount;
+	    USHORT  TxZeroLenCount;
+	}	field;
+	UINT32			word;
+}	TX_STA_CNT2_STRUC, *PTX_STA_CNT2_STRUC;
+#else
+typedef	union	_TX_STA_CNT2_STRUC	{
+	struct	{
+	    USHORT  TxZeroLenCount;
+	    USHORT  TxUnderFlowCount;
+	}	field;
+	UINT32			word;
+}	TX_STA_CNT2_STRUC, *PTX_STA_CNT2_STRUC;
+#endif
+#define TX_STA_FIFO		0x1718		/* */
+/* */
+/* TX_STA_FIFO_STRUC: TX Result for specific PID status fifo register */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef	union GNU_PACKED _TX_STA_FIFO_STRUC	{
+	struct	{
+		UINT32		Reserve:2;
+		UINT32		TxBF:1; /* 3*3 */
+		UINT32		SuccessRate:13;	/*include MCS, mode ,shortGI, BW settingSame format as TXWI Word 0 Bit 31-16. */
+/*		UINT32		SuccessRate:16;	//include MCS, mode ,shortGI, BW settingSame format as TXWI Word 0 Bit 31-16. */
+		UINT32		wcid:8;		/*wireless client index */
+		UINT32       	TxAckRequired:1;    /* ack required */
+		UINT32       	TxAggre:1;    /* Tx is aggregated */
+		UINT32       	TxSuccess:1;   /* Tx success. whether success or not */
+		UINT32       	PidType:4;
+		UINT32       	bValid:1;   /* 1:This register contains a valid TX result */
+	}	field;
+	UINT32			word;
+}	TX_STA_FIFO_STRUC, *PTX_STA_FIFO_STRUC;
+#else
+typedef	union GNU_PACKED _TX_STA_FIFO_STRUC	{
+	struct	{
+		UINT32       	bValid:1;   /* 1:This register contains a valid TX result */
+		UINT32       	PidType:4;
+		UINT32       	TxSuccess:1;   /* Tx No retry success */
+		UINT32       	TxAggre:1;    /* Tx Retry Success */
+		UINT32       	TxAckRequired:1;    /* Tx fail */
+		UINT32		wcid:8;		/*wireless client index */
+/*		UINT32		SuccessRate:16;	//include MCS, mode ,shortGI, BW settingSame format as TXWI Word 0 Bit 31-16. */
+		UINT32		SuccessRate:13;	/*include MCS, mode ,shortGI, BW settingSame format as TXWI Word 0 Bit 31-16. */
+		UINT32		TxBF:1;
+		UINT32		Reserve:2;
+	}	field;
+	UINT32			word;
+}	TX_STA_FIFO_STRUC, *PTX_STA_FIFO_STRUC;
+#endif
+/* Debug counter */
+#define TX_AGG_CNT	0x171c
+#ifdef RT_BIG_ENDIAN
+typedef	union	_TX_AGG_CNT_STRUC	{
+	struct	{
+	    USHORT  AggTxCount;
+	    USHORT  NonAggTxCount;
+	}	field;
+	UINT32			word;
+}	TX_AGG_CNT_STRUC, *PTX_AGG_CNT_STRUC;
+#else
+typedef	union	_TX_AGG_CNT_STRUC	{
+	struct	{
+	    USHORT  NonAggTxCount;
+	    USHORT  AggTxCount;
+	}	field;
+	UINT32			word;
+}	TX_AGG_CNT_STRUC, *PTX_AGG_CNT_STRUC;
+#endif
+/* Debug counter */
+#define TX_AGG_CNT0	0x1720
+#ifdef RT_BIG_ENDIAN
+typedef	union	_TX_AGG_CNT0_STRUC	{
+	struct	{
+	    USHORT  AggSize2Count;
+	    USHORT  AggSize1Count;
+	}	field;
+	UINT32			word;
+}	TX_AGG_CNT0_STRUC, *PTX_AGG_CNT0_STRUC;
+#else
+typedef	union	_TX_AGG_CNT0_STRUC	{
+	struct	{
+	    USHORT  AggSize1Count;
+	    USHORT  AggSize2Count;
+	}	field;
+	UINT32			word;
+}	TX_AGG_CNT0_STRUC, *PTX_AGG_CNT0_STRUC;
+#endif
+/* Debug counter */
+#define TX_AGG_CNT1	0x1724
+#ifdef RT_BIG_ENDIAN
+typedef	union	_TX_AGG_CNT1_STRUC	{
+	struct	{
+	    USHORT  AggSize4Count;
+	    USHORT  AggSize3Count;
+	}	field;
+	UINT32			word;
+}	TX_AGG_CNT1_STRUC, *PTX_AGG_CNT1_STRUC;
+#else
+typedef	union	_TX_AGG_CNT1_STRUC	{
+	struct	{
+	    USHORT  AggSize3Count;
+	    USHORT  AggSize4Count;
+	}	field;
+	UINT32			word;
+}	TX_AGG_CNT1_STRUC, *PTX_AGG_CNT1_STRUC;
+#endif
+#define TX_AGG_CNT2	0x1728
+#ifdef RT_BIG_ENDIAN
+typedef	union	_TX_AGG_CNT2_STRUC	{
+	struct	{
+	    USHORT  AggSize6Count;
+	    USHORT  AggSize5Count;
+	}	field;
+	UINT32			word;
+}	TX_AGG_CNT2_STRUC, *PTX_AGG_CNT2_STRUC;
+#else
+typedef	union	_TX_AGG_CNT2_STRUC	{
+	struct	{
+	    USHORT  AggSize5Count;
+	    USHORT  AggSize6Count;
+	}	field;
+	UINT32			word;
+}	TX_AGG_CNT2_STRUC, *PTX_AGG_CNT2_STRUC;
+#endif
+/* Debug counter */
+#define TX_AGG_CNT3	0x172c
+#ifdef RT_BIG_ENDIAN
+typedef	union	_TX_AGG_CNT3_STRUC	{
+	struct	{
+	    USHORT  AggSize8Count;
+	    USHORT  AggSize7Count;
+	}	field;
+	UINT32			word;
+}	TX_AGG_CNT3_STRUC, *PTX_AGG_CNT3_STRUC;
+#else
+typedef	union	_TX_AGG_CNT3_STRUC	{
+	struct	{
+	    USHORT  AggSize7Count;
+	    USHORT  AggSize8Count;
+	}	field;
+	UINT32			word;
+}	TX_AGG_CNT3_STRUC, *PTX_AGG_CNT3_STRUC;
+#endif
+/* Debug counter */
+#define TX_AGG_CNT4	0x1730
+#ifdef RT_BIG_ENDIAN
+typedef	union	_TX_AGG_CNT4_STRUC	{
+	struct	{
+	    USHORT  AggSize10Count;
+	    USHORT  AggSize9Count;
+	}	field;
+	UINT32			word;
+}	TX_AGG_CNT4_STRUC, *PTX_AGG_CNT4_STRUC;
+#else
+typedef	union	_TX_AGG_CNT4_STRUC	{
+	struct	{
+	    USHORT  AggSize9Count;
+	    USHORT  AggSize10Count;
+	}	field;
+	UINT32			word;
+}	TX_AGG_CNT4_STRUC, *PTX_AGG_CNT4_STRUC;
+#endif
+#define TX_AGG_CNT5	0x1734
+#ifdef RT_BIG_ENDIAN
+typedef	union	_TX_AGG_CNT5_STRUC	{
+	struct	{
+	    USHORT  AggSize12Count;
+	    USHORT  AggSize11Count;
+	}	field;
+	UINT32			word;
+}	TX_AGG_CNT5_STRUC, *PTX_AGG_CNT5_STRUC;
+#else
+typedef	union	_TX_AGG_CNT5_STRUC	{
+	struct	{
+	    USHORT  AggSize11Count;
+	    USHORT  AggSize12Count;
+	}	field;
+	UINT32			word;
+}	TX_AGG_CNT5_STRUC, *PTX_AGG_CNT5_STRUC;
+#endif
+#define TX_AGG_CNT6		0x1738
+#ifdef RT_BIG_ENDIAN
+typedef	union	_TX_AGG_CNT6_STRUC	{
+	struct	{
+	    USHORT  AggSize14Count;
+	    USHORT  AggSize13Count;
+	}	field;
+	UINT32			word;
+}	TX_AGG_CNT6_STRUC, *PTX_AGG_CNT6_STRUC;
+#else
+typedef	union	_TX_AGG_CNT6_STRUC	{
+	struct	{
+	    USHORT  AggSize13Count;
+	    USHORT  AggSize14Count;
+	}	field;
+	UINT32			word;
+}	TX_AGG_CNT6_STRUC, *PTX_AGG_CNT6_STRUC;
+#endif
+#define TX_AGG_CNT7		0x173c
+#ifdef RT_BIG_ENDIAN
+typedef	union	_TX_AGG_CNT7_STRUC	{
+	struct	{
+	    USHORT  AggSize16Count;
+	    USHORT  AggSize15Count;
+	}	field;
+	UINT32			word;
+}	TX_AGG_CNT7_STRUC, *PTX_AGG_CNT7_STRUC;
+#else
+typedef	union	_TX_AGG_CNT7_STRUC	{
+	struct	{
+	    USHORT  AggSize15Count;
+	    USHORT  AggSize16Count;
+	}	field;
+	UINT32			word;
+}	TX_AGG_CNT7_STRUC, *PTX_AGG_CNT7_STRUC;
+#endif
+#define MPDU_DENSITY_CNT		0x1740
+#ifdef RT_BIG_ENDIAN
+typedef	union	_MPDU_DEN_CNT_STRUC	{
+	struct	{
+	    USHORT  RXZeroDelCount;	/*RX zero length delimiter count */
+	    USHORT  TXZeroDelCount;	/*TX zero length delimiter count */
+	}	field;
+	UINT32			word;
+}	MPDU_DEN_CNT_STRUC, *PMPDU_DEN_CNT_STRUC;
+#else
+typedef	union	_MPDU_DEN_CNT_STRUC	{
+	struct	{
+	    USHORT  TXZeroDelCount;	/*TX zero length delimiter count */
+	    USHORT  RXZeroDelCount;	/*RX zero length delimiter count */
+	}	field;
+	UINT32			word;
+}	MPDU_DEN_CNT_STRUC, *PMPDU_DEN_CNT_STRUC;
+#endif
+/* */
+/* TXRX control registers - base address 0x3000 */
+/* */
+/* rt2860b  UNKNOWN reg use R/O Reg Addr 0x77d0 first.. */
+#define TXRX_CSR1           0x77d0
+
+/* */
+/* Security key table memory, base address = 0x1000 */
+/* */
+#define MAC_WCID_BASE		0x1800 /*8-bytes(use only 6-bytes) * 256 entry = */
+#define HW_WCID_ENTRY_SIZE   8
+#define PAIRWISE_KEY_TABLE_BASE     0x4000      /* 32-byte * 256-entry =  -byte */
+#define HW_KEY_ENTRY_SIZE           0x20
+#define PAIRWISE_IVEIV_TABLE_BASE     0x6000      /* 8-byte * 256-entry =  -byte */
+#define MAC_IVEIV_TABLE_BASE     0x6000      /* 8-byte * 256-entry =  -byte */
+#define HW_IVEIV_ENTRY_SIZE   8
+#define MAC_WCID_ATTRIBUTE_BASE     0x6800      /* 4-byte * 256-entry =  -byte */
+#define HW_WCID_ATTRI_SIZE   4
+#define WCID_RESERVED          		0x6bfc 
+#define SHARED_KEY_TABLE_BASE       0x6c00      /* 32-byte * 16-entry = 512-byte */
+#define SHARED_KEY_MODE_BASE       0x7000      /* 32-byte * 16-entry = 512-byte */
+#define HW_SHARED_KEY_MODE_SIZE   4
+#define SHAREDKEYTABLE			0
+#define PAIRWISEKEYTABLE			1
+
+/* This resgiser is ONLY be supported for RT3883 or later.
+   It conflicted with BCN#0 offset of previous chipset. */
+#define WAPI_PN_TABLE_BASE			0x7800		
+#define WAPI_PN_ENTRY_SIZE   		8
+
+#ifdef RT_BIG_ENDIAN
+typedef	union	_SHAREDKEY_MODE_STRUC	{
+	struct	{
+		UINT32       Bss1Key3CipherAlg:4;
+		UINT32       Bss1Key2CipherAlg:4;
+		UINT32       Bss1Key1CipherAlg:4;
+		UINT32       Bss1Key0CipherAlg:4;
+		UINT32       Bss0Key3CipherAlg:4;
+		UINT32       Bss0Key2CipherAlg:4;
+		UINT32       Bss0Key1CipherAlg:4;
+		UINT32       Bss0Key0CipherAlg:4;
+	}	field;
+	UINT32			word;
+}	SHAREDKEY_MODE_STRUC, *PSHAREDKEY_MODE_STRUC;
+#else
+typedef	union	_SHAREDKEY_MODE_STRUC	{
+	struct	{
+		UINT32       Bss0Key0CipherAlg:4;
+		UINT32       Bss0Key1CipherAlg:4;
+		UINT32       Bss0Key2CipherAlg:4;
+		UINT32       Bss0Key3CipherAlg:4;
+		UINT32       Bss1Key0CipherAlg:4;
+		UINT32       Bss1Key1CipherAlg:4;
+		UINT32       Bss1Key2CipherAlg:4;
+		UINT32       Bss1Key3CipherAlg:4;
+	}	field;
+	UINT32			word;
+}	SHAREDKEY_MODE_STRUC, *PSHAREDKEY_MODE_STRUC;
+#endif
+/* 64-entry for pairwise key table */
+typedef struct _HW_WCID_ENTRY {  /* 8-byte per entry */
+    UCHAR   Address[6];
+    UCHAR   Rsv[2];
+} HW_WCID_ENTRY, PHW_WCID_ENTRY;
+
+
+/* ================================================================================= */
+/* WCID  format */
+/* ================================================================================= */
+/*7.1	WCID  ENTRY  format  : 8bytes */
+typedef	struct	_WCID_ENTRY_STRUC {
+	UCHAR		RXBABitmap7;    /* bit0 for TID8, bit7 for TID 15 */
+	UCHAR		RXBABitmap0;    /* bit0 for TID0, bit7 for TID 7 */
+	UCHAR		MAC[6];	/* 0 for shared key table.  1 for pairwise key table */
+}	WCID_ENTRY_STRUC, *PWCID_ENTRY_STRUC;
+
+/*8.1.1	SECURITY  KEY  format  : 8DW */
+/* 32-byte per entry, total 16-entry for shared key table, 64-entry for pairwise key table */
+typedef struct _HW_KEY_ENTRY {          /* 32-byte per entry */
+    UCHAR   Key[16];
+    UCHAR   TxMic[8];
+    UCHAR   RxMic[8];
+} HW_KEY_ENTRY, *PHW_KEY_ENTRY; 
+
+/*8.1.2	IV/EIV  format  : 2DW */
+
+/* RX attribute entry format  : 1DW */
+#ifdef RT_BIG_ENDIAN
+typedef	union	_WCID_ATTRIBUTE_STRUC {
+	struct {
+		UINT32		WAPIKeyIdx:8;
+		UINT32		WAPI_rsv:8;
+		UINT32		WAPI_MCBC:1;
+		UINT32		rsv:3;
+		UINT32		BSSIdxExt:1;
+		UINT32		PairKeyModeExt:1;
+		UINT32		RXWIUDF:3;
+		UINT32		BSSIdx:3; /*multipleBSS index for the WCID */
+		UINT32		PairKeyMode:3;
+		UINT32		KeyTab:1;	/* 0 for shared key table.  1 for pairwise key table */
+	}   field;
+    UINT32           word;
+}	WCID_ATTRIBUTE_STRUC, *PWCID_ATTRIBUTE_STRUC;
+#else
+typedef	union	_WCID_ATTRIBUTE_STRUC {
+	struct {
+		UINT32		KeyTab:1;	/* 0 for shared key table.  1 for pairwise key table */
+		UINT32		PairKeyMode:3;
+		UINT32		BSSIdx:3; 		/*multipleBSS index for the WCID */
+		UINT32		RXWIUDF:3;
+		UINT32		PairKeyModeExt:1;
+		UINT32		BSSIdxExt:1;
+		UINT32		rsv:3;
+		UINT32		WAPI_MCBC:1;
+		UINT32		WAPI_rsv:8;
+		UINT32		WAPIKeyIdx:8;
+	}   field;
+    UINT32           word;
+}	WCID_ATTRIBUTE_STRUC, *PWCID_ATTRIBUTE_STRUC;
+#endif
+
+
+/* ================================================================================= */
+/* HOST-MCU communication data structure */
+/* ================================================================================= */
+
+/* */
+/* H2M_MAILBOX_CSR: Host-to-MCU Mailbox */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef union  _H2M_MAILBOX_STRUC {
+    struct {
+        UINT32       Owner:8;
+        UINT32       CmdToken:8;    /* 0xff tells MCU not to report CmdDoneInt after excuting the command */
+        UINT32       HighByte:8;
+        UINT32       LowByte:8;
+    }   field;
+    UINT32           word;
+} H2M_MAILBOX_STRUC, *PH2M_MAILBOX_STRUC;
+#else
+typedef union  _H2M_MAILBOX_STRUC {
+    struct {
+        UINT32       LowByte:8;
+        UINT32       HighByte:8;
+        UINT32       CmdToken:8;
+        UINT32       Owner:8;
+    }   field;
+    UINT32           word;
+} H2M_MAILBOX_STRUC, *PH2M_MAILBOX_STRUC;
+#endif
+
+/* */
+/* M2H_CMD_DONE_CSR: MCU-to-Host command complete indication */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef union _M2H_CMD_DONE_STRUC {
+    struct  {
+        UINT32       CmdToken3;
+        UINT32       CmdToken2;
+        UINT32       CmdToken1;
+        UINT32       CmdToken0;
+    } field;
+    UINT32           word;
+} M2H_CMD_DONE_STRUC, *PM2H_CMD_DONE_STRUC;
+#else
+typedef union _M2H_CMD_DONE_STRUC {
+    struct  {
+        UINT32       CmdToken0;
+        UINT32       CmdToken1;
+        UINT32       CmdToken2;
+        UINT32       CmdToken3;
+    } field;
+    UINT32           word;
+} M2H_CMD_DONE_STRUC, *PM2H_CMD_DONE_STRUC;
+#endif
+
+
+/*NAV_TIME_CFG :NAV */
+#ifdef RT_BIG_ENDIAN
+typedef	union	_NAV_TIME_CFG_STRUC	{
+	struct	{
+		USHORT		rsv:6;   
+		USHORT		ZeroSifs:1;               /* Applied zero SIFS timer after OFDM RX 0: disable */
+		USHORT		Eifs:9;               /* in unit of 1-us */
+		UCHAR       SlotTime;    /* in unit of 1-us */
+		UCHAR		Sifs;               /* in unit of 1-us */
+	}	field;
+	UINT32			word;
+}	NAV_TIME_CFG_STRUC, *PNAV_TIME_CFG_STRUC;
+#else
+typedef	union	_NAV_TIME_CFG_STRUC	{
+	struct	{
+		UCHAR		Sifs;               /* in unit of 1-us */
+		UCHAR       SlotTime;    /* in unit of 1-us */
+		USHORT		Eifs:9;               /* in unit of 1-us */
+		USHORT		ZeroSifs:1;               /* Applied zero SIFS timer after OFDM RX 0: disable */
+		USHORT		rsv:6;             
+	}	field;
+	UINT32			word;
+}	NAV_TIME_CFG_STRUC, *PNAV_TIME_CFG_STRUC;
+#endif
+
+
+/* */
+/* RX_FILTR_CFG:  /RX configuration register */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef	union	RX_FILTR_CFG_STRUC	{
+	struct	{
+		UINT32		:15;		
+		UINT32       DropRsvCntlType:1;
+
+        	UINT32       	DropBAR:1;       /* */
+		UINT32		DropBA:1;		/* */
+		UINT32		DropPsPoll:1;		/* Drop Ps-Poll */
+		UINT32		DropRts:1;		/* Drop Ps-Poll */
+
+		UINT32		DropCts:1;		/* Drop Ps-Poll */
+		UINT32		DropAck:1;		/* Drop Ps-Poll */
+		UINT32		DropCFEnd:1;		/* Drop Ps-Poll */
+		UINT32		DropCFEndAck:1;		/* Drop Ps-Poll */
+
+		UINT32		DropDuplicate:1;		/* Drop duplicate frame */
+		UINT32		DropBcast:1;		/* Drop broadcast frames */
+		UINT32		DropMcast:1;		/* Drop multicast frames */
+		UINT32		DropVerErr:1;	    /* Drop version error frame */
+
+		UINT32		DropNotMyBSSID:1;			/* Drop fram ToDs bit is true */
+		UINT32		DropNotToMe:1;		/* Drop not to me unicast frame */
+		UINT32		DropPhyErr:1;		/* Drop physical error */
+		UINT32		DropCRCErr:1;		/* Drop CRC error */
+	}	field;
+	UINT32			word;
+}	RX_FILTR_CFG_STRUC, *PRX_FILTR_CFG_STRUC;
+#else
+typedef	union	_RX_FILTR_CFG_STRUC	{
+	struct	{
+		UINT32		DropCRCErr:1;		/* Drop CRC error */
+		UINT32		DropPhyErr:1;		/* Drop physical error */
+		UINT32		DropNotToMe:1;		/* Drop not to me unicast frame */
+		UINT32		DropNotMyBSSID:1;			/* Drop fram ToDs bit is true */
+
+		UINT32		DropVerErr:1;	    /* Drop version error frame */
+		UINT32		DropMcast:1;		/* Drop multicast frames */
+		UINT32		DropBcast:1;		/* Drop broadcast frames */
+		UINT32		DropDuplicate:1;		/* Drop duplicate frame */
+
+		UINT32		DropCFEndAck:1;		/* Drop Ps-Poll */
+		UINT32		DropCFEnd:1;		/* Drop Ps-Poll */
+		UINT32		DropAck:1;		/* Drop Ps-Poll */
+		UINT32		DropCts:1;		/* Drop Ps-Poll */
+
+		UINT32		DropRts:1;		/* Drop Ps-Poll */
+		UINT32		DropPsPoll:1;		/* Drop Ps-Poll */
+		UINT32		DropBA:1;		/* */
+        	UINT32       	DropBAR:1;       /* */
+
+		UINT32       	DropRsvCntlType:1;
+		UINT32		:15;
+	}	field;
+	UINT32			word;
+}	RX_FILTR_CFG_STRUC, *PRX_FILTR_CFG_STRUC;
+#endif
+
+
+
+
+/* */
+/* PHY_CSR4: RF serial control register */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef	union	_PHY_CSR4_STRUC	{
+	struct	{
+		UINT32		Busy:1;				/* 1: ASIC is busy execute RF programming. */
+		UINT32		PLL_LD:1;			/* RF PLL_LD status */
+		UINT32		IFSelect:1;			/* 1: select IF	to program,	0: select RF to	program */
+		UINT32		NumberOfBits:5;		/* Number of bits used in RFRegValue (I:20,	RFMD:22) */
+		UINT32		RFRegValue:24;		/* Register	value (include register	id)	serial out to RF/IF	chip. */
+	}	field;
+	UINT32			word;
+}	PHY_CSR4_STRUC, *PPHY_CSR4_STRUC;
+#else
+typedef	union	_PHY_CSR4_STRUC	{
+	struct	{
+		UINT32		RFRegValue:24;		/* Register	value (include register	id)	serial out to RF/IF	chip. */
+		UINT32		NumberOfBits:5;		/* Number of bits used in RFRegValue (I:20,	RFMD:22) */
+		UINT32		IFSelect:1;			/* 1: select IF	to program,	0: select RF to	program */
+		UINT32		PLL_LD:1;			/* RF PLL_LD status */
+		UINT32		Busy:1;				/* 1: ASIC is busy execute RF programming. */
+	}	field;
+	UINT32			word;
+}	PHY_CSR4_STRUC, *PPHY_CSR4_STRUC;
+#endif
+
+
+/* */
+/* SEC_CSR5: shared key table security mode register */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef	union	_SEC_CSR5_STRUC	{
+	struct	{
+        UINT32       :1;
+        UINT32       Bss3Key3CipherAlg:3;
+        UINT32       :1;
+        UINT32       Bss3Key2CipherAlg:3;
+        UINT32       :1;
+        UINT32       Bss3Key1CipherAlg:3;
+        UINT32       :1;
+        UINT32       Bss3Key0CipherAlg:3;
+        UINT32       :1;
+        UINT32       Bss2Key3CipherAlg:3;
+        UINT32       :1;
+        UINT32       Bss2Key2CipherAlg:3;
+        UINT32       :1;
+        UINT32       Bss2Key1CipherAlg:3;
+        UINT32       :1;
+        UINT32       Bss2Key0CipherAlg:3;
+	}	field;
+	UINT32			word;
+}	SEC_CSR5_STRUC, *PSEC_CSR5_STRUC;
+#else
+typedef	union	_SEC_CSR5_STRUC	{
+	struct	{
+        UINT32       Bss2Key0CipherAlg:3;
+        UINT32       :1;
+        UINT32       Bss2Key1CipherAlg:3;
+        UINT32       :1;
+        UINT32       Bss2Key2CipherAlg:3;
+        UINT32       :1;
+        UINT32       Bss2Key3CipherAlg:3;
+        UINT32       :1;
+        UINT32       Bss3Key0CipherAlg:3;
+        UINT32       :1;
+        UINT32       Bss3Key1CipherAlg:3;
+        UINT32       :1;
+        UINT32       Bss3Key2CipherAlg:3;
+        UINT32       :1;
+        UINT32       Bss3Key3CipherAlg:3;
+        UINT32       :1;
+	}	field;
+	UINT32			word;
+}	SEC_CSR5_STRUC, *PSEC_CSR5_STRUC;
+#endif
+
+
+/* */
+/* HOST_CMD_CSR: For HOST to interrupt embedded processor */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef	union	_HOST_CMD_CSR_STRUC	{
+	struct	{
+	    UINT32   Rsv:24;
+	    UINT32   HostCommand:8;
+	}	field;
+	UINT32			word;
+}	HOST_CMD_CSR_STRUC, *PHOST_CMD_CSR_STRUC;
+#else
+typedef	union	_HOST_CMD_CSR_STRUC	{
+	struct	{
+	    UINT32   HostCommand:8;
+	    UINT32   Rsv:24;
+	}	field;
+	UINT32			word;
+}	HOST_CMD_CSR_STRUC, *PHOST_CMD_CSR_STRUC;
+#endif
+
+
+/* */
+/* AIFSN_CSR: AIFSN for each EDCA AC */
+/* */
+
+
+
+/* */
+/* E2PROM_CSR: EEPROM control register */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef	union	_E2PROM_CSR_STRUC	{
+	struct	{
+		UINT32		Rsvd:25;
+		UINT32       LoadStatus:1;   /* 1:loading, 0:done */
+		UINT32		Type:1;			/* 1: 93C46, 0:93C66 */
+		UINT32		EepromDO:1;
+		UINT32		EepromDI:1;
+		UINT32		EepromCS:1;
+		UINT32		EepromSK:1;
+		UINT32		Reload:1;		/* Reload EEPROM content, write one to reload, self-cleared. */
+	}	field;
+	UINT32			word;
+}	E2PROM_CSR_STRUC, *PE2PROM_CSR_STRUC;
+#else
+typedef	union	_E2PROM_CSR_STRUC	{
+	struct	{
+		UINT32		Reload:1;		/* Reload EEPROM content, write one to reload, self-cleared. */
+		UINT32		EepromSK:1;
+		UINT32		EepromCS:1;
+		UINT32		EepromDI:1;
+		UINT32		EepromDO:1;
+		UINT32		Type:1;			/* 1: 93C46, 0:93C66 */
+		UINT32       LoadStatus:1;   /* 1:loading, 0:done */
+		UINT32		Rsvd:25;
+	}	field;
+	UINT32			word;
+}	E2PROM_CSR_STRUC, *PE2PROM_CSR_STRUC;
+#endif
+
+/* */
+/* QOS_CSR0: TXOP holder address0 register */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef	union	_QOS_CSR0_STRUC	{
+	struct	{
+		UCHAR		Byte3;		/* MAC address byte 3 */
+		UCHAR		Byte2;		/* MAC address byte 2 */
+		UCHAR		Byte1;		/* MAC address byte 1 */
+		UCHAR		Byte0;		/* MAC address byte 0 */
+	}	field;
+	UINT32			word;
+}	QOS_CSR0_STRUC, *PQOS_CSR0_STRUC;
+#else
+typedef	union	_QOS_CSR0_STRUC	{
+	struct	{
+		UCHAR		Byte0;		/* MAC address byte 0 */
+		UCHAR		Byte1;		/* MAC address byte 1 */
+		UCHAR		Byte2;		/* MAC address byte 2 */
+		UCHAR		Byte3;		/* MAC address byte 3 */
+	}	field;
+	UINT32			word;
+}	QOS_CSR0_STRUC, *PQOS_CSR0_STRUC;
+#endif
+
+/* */
+/* QOS_CSR1: TXOP holder address1 register */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef	union	_QOS_CSR1_STRUC	{
+	struct	{
+		UCHAR		Rsvd1;
+		UCHAR		Rsvd0;
+		UCHAR		Byte5;		/* MAC address byte 5 */
+		UCHAR		Byte4;		/* MAC address byte 4 */
+	}	field;
+	UINT32			word;
+}	QOS_CSR1_STRUC, *PQOS_CSR1_STRUC;
+#else
+typedef	union	_QOS_CSR1_STRUC	{
+	struct	{
+		UCHAR		Byte4;		/* MAC address byte 4 */
+		UCHAR		Byte5;		/* MAC address byte 5 */
+		UCHAR		Rsvd0;
+		UCHAR		Rsvd1;
+	}	field;
+	UINT32			word;
+}	QOS_CSR1_STRUC, *PQOS_CSR1_STRUC;
+#endif
+
+#define	RF_CSR_CFG	0x500
+#ifdef RT_BIG_ENDIAN
+typedef	union	_RF_CSR_CFG_STRUC	{
+	struct	{
+		UINT	Rsvd1:14;				/* Reserved */
+		UINT	RF_CSR_KICK:1;			/* kick RF register read/write */
+		UINT	RF_CSR_WR:1;			/* 0: read  1: write */
+/* #if defined (RT3883) || defined (RT3352) || defined (RT5350)	// chip move */
+		UINT	TESTCSR_RFACC_REGNUM:8;	/* RF register ID */
+		UINT	RF_CSR_DATA:8;			/* DATA */
+	}	field;
+	UINT	word;
+}	RF_CSR_CFG_STRUC, *PRF_CSR_CFG_STRUC;
+#else
+typedef	union	_RF_CSR_CFG_STRUC	{
+	struct	{
+		UINT	RF_CSR_DATA:8;			/* DATA */
+/* #if defined (RT3883) || defined (RT3352) || defined (RT5350)	// chip move */
+		UINT	TESTCSR_RFACC_REGNUM:8;	/* RF register ID */
+		UINT	RF_CSR_WR:1;			/* 0: read  1: write */
+		UINT	RF_CSR_KICK:1;			/* kick RF register read/write */
+		UINT	Rsvd1:14;				/* Reserved */
+	}	field;
+	UINT	word;
+}	RF_CSR_CFG_STRUC, *PRF_CSR_CFG_STRUC;
+#endif
+
+#ifdef RT_BIG_ENDIAN
+typedef union _RF_CSR_CFG_EXT_STRUC
+{
+	struct
+	{
+		ULONG	Rsvd1:14; /* Reserved */
+		ULONG	RF_CSR_KICK:1; /* Kick RF register read/write */
+		ULONG	RF_CSR_WR:1; /* 0: read  1: write */
+		ULONG	Rsvd2:2; /* Reserved */
+		ULONG	TESTCSR_RFACC_REGNUM:6; /* RF register ID (R0~R63) */
+		ULONG	RF_CSR_DATA:8; /* Data */
+	} field;
+
+	ULONG word;
+} RF_CSR_CFG_EXT_STRUC, *PRF_CSR_CFG_EXT_STRUC;
+#else
+typedef union _RF_CSR_CFG_EXT_STRUC
+{
+	struct
+	{
+		ULONG	RF_CSR_DATA:8; /* Data */
+		ULONG	TESTCSR_RFACC_REGNUM:6; /* RF register ID (R0~R63) */
+		ULONG	Rsvd2:2; /* Reserved */
+		ULONG	RF_CSR_WR:1; /* 0: read  1: write */
+		ULONG	RF_CSR_KICK:1; /* Kick RF register read/write */
+		ULONG	Rsvd1:14; /* Reserved */
+	} field;
+	
+	ULONG word;
+} RF_CSR_CFG_EXT_STRUC, *PRF_CSR_CFG_EXT_STRUC;
+#endif
+
+
+#ifdef RT_BIG_ENDIAN
+typedef	union	_EEPROM_WORD_STRUC	{
+	struct	
+	{
+		UCHAR	Byte1;				// High Byte
+		UCHAR	Byte0;				// Low Byte
+	}	field;
+	USHORT	word;
+}	EEPROM_WORD_STRUC, *PEEPROM_WORD_STRUC;
+#else
+typedef	union	_EEPROM_WORD_STRUC	{
+	struct	
+	{
+		UCHAR	Byte0;				// Low Byte
+		UCHAR	Byte1;				// High Byte
+	}	field;
+	USHORT	word;
+}	EEPROM_WORD_STRUC, *PEEPROM_WORD_STRUC;
+#endif
+
+/* */
+/* Other on-chip shared memory space, base = 0x2000 */
+/* */
+
+/* CIS space - base address = 0x2000 */
+#define HW_CIS_BASE             0x2000
+
+/* Carrier-sense CTS frame base address. It's where mac stores carrier-sense frame for carrier-sense function. */
+#define HW_CS_CTS_BASE			0x7700
+/* DFS CTS frame base address. It's where mac stores CTS frame for DFS. */
+#define HW_DFS_CTS_BASE			0x7780
+#define HW_CTS_FRAME_SIZE		0x80
+
+/* 2004-11-08 john - since NULL frame won't be that long (256 byte). We steal 16 tail bytes */
+/* to save debugging settings */
+#define HW_DEBUG_SETTING_BASE   0x77f0  /* 0x77f0~0x77ff total 16 bytes */
+#define HW_DEBUG_SETTING_BASE2   0x7770  /* 0x77f0~0x77ff total 16 bytes */
+
+/* 
+	On-chip BEACON frame space -
+   	1. HW_BEACON_OFFSET/64B must be 0;
+   	2. BCN_OFFSETx(0~) must also be changed in MACRegTable(common/rtmp_init.c)
+ */
+#define HW_BEACON_OFFSET		0x0200 
+
+
+/* 	In order to support maximum 8 MBSS and its maximum length is 512 for each beacon
+	Three section discontinue memory segments will be used.
+	1. The original region for BCN 0~3
+	2. Extract memory from FCE table for BCN 4~5
+	3. Extract memory from Pair-wise key table for BCN 6~7
+  		It occupied those memory of wcid 238~253 for BCN 6 
+		and wcid 222~237 for BCN 7  	*/
+/*#define HW_BEACON_MAX_COUNT     8 */
+#define HW_BEACON_MAX_SIZE(__pAd)      ((__pAd)->chipCap.BcnMaxHwSize)
+#define HW_BEACON_BASE0(__pAd)         ((__pAd)->chipCap.BcnBase[0])
+/*#define HW_BEACON_BASE1         0x7A00 */
+/*#define HW_BEACON_BASE2         0x7C00 */
+/*#define HW_BEACON_BASE3         0x7E00 */
+/*#define HW_BEACON_BASE4         0x7200 */
+/*#define HW_BEACON_BASE5         0x7400 */
+/*#define HW_BEACON_BASE6         0x5DC0 */
+/*#define HW_BEACON_BASE7         0x5BC0 */
+
+/* */
+/* Higher 8KB shared memory */
+/* */
+#define HW_BEACON_BASE0_REDIRECTION	0x4000
+#define HW_BEACON_BASE1_REDIRECTION	0x4200
+#define HW_BEACON_BASE2_REDIRECTION	0x4400
+#define HW_BEACON_BASE3_REDIRECTION	0x4600
+#define HW_BEACON_BASE4_REDIRECTION	0x4800
+#define HW_BEACON_BASE5_REDIRECTION	0x4A00
+#define HW_BEACON_BASE6_REDIRECTION	0x4C00
+#define HW_BEACON_BASE7_REDIRECTION	0x4E00
+
+
+/* HOST-MCU shared memory - base address = 0x2100 */
+#define HOST_CMD_CSR		0x404
+#define H2M_MAILBOX_CSR         0x7010
+#define H2M_MAILBOX_CID         0x7014
+#define H2M_MAILBOX_STATUS      0x701c
+#define H2M_INT_SRC             0x7024
+#define H2M_BBP_AGENT           0x7028
+#define M2H_CMD_DONE_CSR        0x000c
+#define MCU_TXOP_ARRAY_BASE     0x000c   /* TODO: to be provided by Albert */
+#define MCU_TXOP_ENTRY_SIZE     32       /* TODO: to be provided by Albert */
+#define MAX_NUM_OF_TXOP_ENTRY   16       /* TODO: must be same with 8051 firmware */
+#define MCU_MBOX_VERSION        0x01     /* TODO: to be confirmed by Albert */
+#define MCU_MBOX_VERSION_OFFSET 5        /* TODO: to be provided by Albert */
+
+/* */
+/* Host DMA registers - base address 0x200 .  TX0-3=EDCAQid0-3, TX4=HCCA, TX5=MGMT, */
+/* */
+/* */
+/*  DMA RING DESCRIPTOR */
+/* */
+#define E2PROM_CSR          0x0004
+#define IO_CNTL_CSR         0x77d0
+
+
+
+/* ================================================================ */
+/* Tx /	Rx / Mgmt ring descriptor definition */
+/* ================================================================ */
+
+/* the following PID values are used to mark outgoing frame type in TXD->PID so that */
+/* proper TX statistics can be collected based on these categories */
+/* b3-2 of PID field - */
+#define PID_MGMT			0x05
+#define PID_BEACON			0x0c
+#define PID_DATA_NORMALUCAST	 	0x02
+#define PID_DATA_AMPDU	 	0x04
+#define PID_DATA_NO_ACK    	0x08
+#define PID_DATA_NOT_NORM_ACK	 	0x03
+/* value domain of pTxD->HostQId (4-bit: 0~15) */
+#define QID_AC_BK               1   /* meet ACI definition in 802.11e */
+#define QID_AC_BE               0   /* meet ACI definition in 802.11e */
+#define QID_AC_VI               2
+#define QID_AC_VO               3
+#define QID_HCCA                4
+#define NUM_OF_TX_RING          5
+#define QID_MGMT                13
+#define QID_RX                  14
+#define QID_OTHER               15
+
+
+#ifdef SPECIFIC_BCN_BUF_SUPPORT
+#define LOWER_SHRMEM		0
+#define HIGHER_SHRMEM		1
+
+/* Shared memory access selection.
+ * 0: address 0x4000 ~ 0x7FFF mapping to lower 16kB of shared memory
+ * 1: address 0x4000 ~ 0x5FFF mapping to higher 8kB of shared memory
+ */	
+#define	RTMP_HIGH_SHARED_MEM_SET(_pAd)									\
+	do{										\
+		if (_pAd->chipCap.FlgIsSupSpecBcnBuf == TRUE)						\
+		{																	\
+		UINT32			regValue;					\
+											\
+		if (_pAd->ShrMSel != HIGHER_SHRMEM)								\
+		{									\
+			_pAd->ShrMSel = HIGHER_SHRMEM;								\
+			RTMP_IO_READ32(_pAd, PBF_SYS_CTRL, &regValue);				\
+			RTMP_IO_WRITE32(_pAd, PBF_SYS_CTRL, regValue | (1 << 19));	\
+		}									\
+		}																	\
+	} while(0)
+
+#define	RTMP_LOW_SHARED_MEM_SET(_pAd)									\
+	do{																	\
+		if (_pAd->chipCap.FlgIsSupSpecBcnBuf == TRUE)						\
+		{																	\
+		UINT32			regValue;										\
+																		\
+		if (_pAd->ShrMSel != LOWER_SHRMEM)								\
+		{									\
+			_pAd->ShrMSel = LOWER_SHRMEM;								\
+			RTMP_IO_READ32(_pAd, PBF_SYS_CTRL, &regValue);				\
+			RTMP_IO_WRITE32(_pAd, PBF_SYS_CTRL, regValue & ~(1 << 19));	\
+		}									\
+		}																	\
+	} while(0)
+	
+/*
+	When you swtich shr_mem to high, you can not access MCU, just like
+		H2M_MAILBOX_CSR			0x7010
+		H2M_MAILBOX_CID			0x7014
+		H2M_MAILBOX_STATUS		0x701c
+		H2M_INT_SRC				0x7024
+		H2M_BBP_AGENT			0x7028
+*/
+
+#ifdef RTMP_MAC_USB
+#define RTMP_MAC_SHR_MSEL_PROTECT_LOCK(__pAd, __IrqFlags) __IrqFlags = __IrqFlags;
+#define RTMP_MAC_SHR_MSEL_PROTECT_UNLOCK(__pAd, __IrqFlags)	__IrqFlags = __IrqFlags;
+#endif /* RTMP_MAC_USB */
+
+#ifdef RTMP_MAC_USB
+ 	/*Disable irq to make sure the shared memory status(Mac Reg : 0x0400, bit-19)
+	doesn't been changed.
+	Becasue the PRE-TBTT interrupt would change this status. */	
+#define	RTMP_MAC_SHR_MSEL_LOCK(_pAd, _shr_msel, _irqFlag)					\
+	do{										\
+		if (_pAd->chipCap.FlgIsSupSpecBcnBuf == TRUE)						\
+		{																	\
+		UINT32			__regValue;					\
+											\
+		RTMP_IO_READ32(_pAd, PBF_SYS_CTRL, &__regValue);					\
+		if (_shr_msel == HIGHER_SHRMEM)										\
+		{									\
+			RTMP_IO_WRITE32(_pAd, PBF_SYS_CTRL, __regValue | (1 << 19));	\
+		}									\
+		else									\
+		{									\
+			RTMP_IO_WRITE32(_pAd, PBF_SYS_CTRL, __regValue & ~(1 << 19));	\
+		}									\
+		}										\
+	} while(0)
+
+	
+#define	RTMP_MAC_SHR_MSEL_UNLOCK(_pAd, _shr_msel, _irqFlag)					\
+	do{										\
+		if (_pAd->chipCap.FlgIsSupSpecBcnBuf == TRUE)						\
+		{																	\
+		UINT32			__regValue;					\
+											\
+		RTMP_IO_READ32(_pAd, PBF_SYS_CTRL, &__regValue);					\
+		if (_shr_msel == HIGHER_SHRMEM)										\
+		{									\
+			RTMP_IO_WRITE32(_pAd, PBF_SYS_CTRL, __regValue | (1 << 19));	\
+		}									\
+		else									\
+		{									\
+			RTMP_IO_WRITE32(_pAd, PBF_SYS_CTRL, __regValue & ~(1 << 19));	\
+		}									\
+		}										\
+	} while(0)
+#endif /* RTMP_MAC_USB */
+
+#else
+
+#define RTMP_MAC_SHR_MSEL_PROTECT_LOCK(__pAd, __IrqFlags)	__IrqFlags = __IrqFlags;
+#define RTMP_MAC_SHR_MSEL_PROTECT_UNLOCK(__pAd, __IrqFlags) __IrqFlags = __IrqFlags;
+
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */
+
+#endif /* __RTMP_MAC_H__ */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/chip/rtmp_phy.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/chip/rtmp_phy.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/chip/rtmp_phy.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/chip/rtmp_phy.h	2017-09-23 03:42:49.782675785 +0800
@@ -0,0 +1,617 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RTMP_PHY_H__
+#define __RTMP_PHY_H__
+
+
+/*
+	RF sections
+*/
+#define RF_R00			0
+#define RF_R01			1
+#define RF_R02			2
+#define RF_R03			3
+#define RF_R04			4
+#define RF_R05			5
+#define RF_R06			6
+#define RF_R07			7
+#define RF_R08			8
+#define RF_R09			9
+#define RF_R10			10
+#define RF_R11			11
+#define RF_R12			12
+#define RF_R13			13
+#define RF_R14			14
+#define RF_R15			15
+#define RF_R16			16
+#define RF_R17			17
+#define RF_R18			18
+#define RF_R19			19
+#define RF_R20			20
+#define RF_R21			21
+#define RF_R22			22
+#define RF_R23			23
+#define RF_R24			24
+#define RF_R25			25
+#define RF_R26			26
+#define RF_R27			27
+#define RF_R28			28
+#define RF_R29			29
+#define RF_R30			30
+#define RF_R31			31
+#define	RF_R32					    32
+#define	RF_R33					    33
+#define	RF_R34					    34
+#define	RF_R35					    35
+#define	RF_R36					    36
+#define	RF_R37					    37
+#define	RF_R38					    38
+#define	RF_R39					    39
+#define	RF_R40					    40
+#define	RF_R41					    41
+#define	RF_R42					    42
+#define	RF_R43					    43
+#define	RF_R44					    44
+#define	RF_R45					    45
+#define	RF_R46					    46
+#define	RF_R47					    47
+#define	RF_R48					    48
+#define	RF_R49					    49
+#define	RF_R50					    50
+#define	RF_R51					    51
+#define	RF_R52					    52
+#define	RF_R53					    53
+#define	RF_R54					    54
+#define	RF_R55					    55
+#define	RF_R56					    56
+#define	RF_R57					    57
+#define	RF_R58					    58
+#define	RF_R59					    59
+#define	RF_R60					    60
+#define	RF_R61					    61
+#define	RF_R62					    62
+#define	RF_R63					    63
+
+
+/* value domain of pAd->RfIcType */
+#define RFIC_2820                   1       /* 2.4G 2T3R */
+#define RFIC_2850                   2       /* 2.4G/5G 2T3R */
+#define RFIC_2720                   3       /* 2.4G 1T2R */
+#define RFIC_2750                   4       /* 2.4G/5G 1T2R */
+#define RFIC_3020                   5       /* 2.4G 1T1R */
+#define RFIC_2020                   6       /* 2.4G B/G */
+#define RFIC_3021                   7       /* 2.4G 1T2R */
+#define RFIC_3022                   8       /* 2.4G 2T2R */
+#define RFIC_3052                   9       /* 2.4G/5G 2T2R */
+#define RFIC_2853					10		/* 2.4G.5G 3T3R */
+#define RFIC_3320                   11      /* 2.4G 1T1R with PA (RT3350/RT3370/RT3390) */
+#define RFIC_3322                   12      /* 2.4G 2T2R with PA (RT3352/RT3371/RT3372/RT3391/RT3392) */
+#define RFIC_3053                   13      /* 2.4G/5G 3T3R (RT3883/RT3563/RT3573/RT3593/RT3662) */
+#define RFIC_3853                   13      /* 2.4G/5G 3T3R (RT3883/RT3563/RT3573/RT3593/RT3662) */
+#define RFIC_UNKNOWN				0xff
+
+#define RFIC_IS_5G_BAND(__pAd)			\
+	((__pAd->RfIcType == RFIC_2850) ||	\
+	(__pAd->RfIcType == RFIC_2750) ||	\
+	(__pAd->RfIcType == RFIC_3052) ||	\
+	(__pAd->RfIcType == RFIC_2853) ||	\
+	(__pAd->RfIcType == RFIC_3053) ||	\
+	(__pAd->RfIcType == RFIC_3853) ||	\
+	(__pAd->RfIcType == RFIC_UNKNOWN))
+
+/*
+	BBP sections
+*/
+#define BBP_R0			0  /* version */
+#define BBP_R1			1  /* TSSI */
+#define BBP_R2			2  /* TX configure */
+#define BBP_R3			3
+#define BBP_R4			4
+#define BBP_R5			5
+#define BBP_R6			6
+#define BBP_R14			14 /* RX configure */
+#define BBP_R16			16
+#define BBP_R17			17 /* RX sensibility */
+#define BBP_R18			18
+#define BBP_R21			21
+#define BBP_R22			22
+#define BBP_R24			24
+#define BBP_R25			25
+#define BBP_R26			26
+#define BBP_R27			27
+#define BBP_R31			31
+#define BBP_R47			47
+#define BBP_R49			49 /*TSSI */
+#define BBP_R50			50
+#define BBP_R51			51
+#define BBP_R52			52
+#define BBP_R53			53
+#define BBP_R54			54
+#define BBP_R55			55
+#define BBP_R60			60
+#define BBP_R57			57
+#define BBP_R62			62 /* Rx SQ0 Threshold HIGH */
+#define BBP_R63			63
+#define BBP_R64			64
+#define BBP_R65			65
+#define BBP_R66			66
+#define BBP_R67			67
+#define BBP_R68			68
+#define BBP_R69			69
+#define BBP_R70			70 /* Rx AGC SQ CCK Xcorr threshold */
+#define BBP_R73			73
+#define BBP_R75			75
+#define BBP_R76			76
+#define BBP_R77			77
+#define BBP_R78			78
+#define BBP_R79			79
+#define BBP_R80			80
+#define BBP_R81			81
+#define BBP_R82			82
+#define BBP_R83			83
+#define BBP_R84			84
+#define BBP_R86			86
+#define BBP_R88			88
+#define BBP_R91			91
+#define BBP_R92			92
+#define BBP_R94			94 /* Tx Gain Control */
+#define BBP_R95			95
+#define BBP_R98			98
+#define BBP_R103		103
+#define BBP_R104		104
+#define BBP_R105		105
+#define BBP_R106		106
+#define BBP_R107		107
+#define BBP_R108		108
+#define BBP_R109		109
+#define BBP_R110		110
+#define BBP_R113		113
+#define BBP_R114		114
+#define BBP_R115		115
+#define BBP_R116		116
+#define BBP_R117		117
+#define BBP_R118		118
+#define BBP_R119		119
+#define BBP_R120		120
+#define BBP_R121		121
+#define BBP_R122		122
+#define BBP_R123		123
+#define BBP_R126		126
+#define BBP_R127		127
+#define BBP_R128		128
+#define BBP_R134		134
+#define BBP_R135		135
+#define BBP_R137		137
+#define BBP_R138		138 /* add by johnli, RF power sequence setup, ADC dynamic on/off control */
+#define BBP_R140		140
+#define BBP_R141		141
+#define BBP_R142		142
+#define BBP_R143		143
+#define BBP_R148		148
+#define BBP_R150		150
+#define BBP_R151		151
+#define BBP_R152		152
+#define BBP_R153		153
+#define BBP_R154		154
+#define BBP_R155		155
+#define BBP_R160		160 /* RT3883 Tx BF control */
+#define BBP_R161		161
+#define BBP_R162		162
+#define BBP_R163		163
+#define BBP_R164		164
+
+#define BBP_R173		173
+#define BBP_R174		174
+#define BBP_R175		175
+#define BBP_R176		176
+#define BBP_R177		177
+#define BBP_R179		179
+#define BBP_R180		180
+#define BBP_R181		181
+#define BBP_R182		182
+#define BBP_R184		184
+#define BBP_R185		185
+#define BBP_R186		186
+#define BBP_R187		187
+#define BBP_R188		188
+#define BBP_R189		189
+#define BBP_R190		190
+#define BBP_R191		191
+#define BBP_R253		253
+#define BBP_R255		255
+
+#define BBPR94_DEFAULT	0x06 /* Add 1 value will gain 1db */
+
+#ifdef RT_BIG_ENDIAN
+typedef union _BBP_R47_STRUC {
+	struct
+	{
+		UCHAR	Adc6On:1;
+		UCHAR	Reserved:2; 
+		UCHAR	TssiMode:2;
+		UCHAR	TssiUpdateReq:1;
+		UCHAR	TssiReportSel:2;
+	} field;
+
+	UCHAR		byte;
+} BBP_R47_STRUC, *PBBP_R47_STRUC;
+#else
+typedef union _BBP_R47_STRUC {
+	struct
+	{
+		UCHAR	TssiReportSel:2;
+		UCHAR	TssiUpdateReq:1;
+		UCHAR	TssiMode:2;
+		UCHAR	Reserved:2; 
+		UCHAR	Adc6On:1;
+	} field;
+	
+	UCHAR		byte;
+} BBP_R47_STRUC, *PBBP_R47_STRUC;
+#endif
+
+/* */
+/* BBP R49 TSSI (Transmit Signal Strength Indicator) */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef union _BBP_R49_STRUC {
+	struct
+	{
+		UCHAR	adc5_in_sel:1; /* 0: TSSI (from the external components, old version), 1: PSI (internal components, new version - RT3390) */
+		UCHAR	bypassTSSIAverage:1; /* 0: the average TSSI (the average of the 16 samples), 1: the current TSSI */
+		UCHAR	Reserved:1; /* Reserved field */
+		UCHAR	TSSI:5; /* TSSI value */
+	} field;
+
+	UCHAR		byte;
+} BBP_R49_STRUC, *PBBP_R49_STRUC;
+#else
+typedef union _BBP_R49_STRUC {
+	struct
+	{
+		UCHAR	TSSI:5; /* TSSI value */
+		UCHAR	Reserved:1; /* Reserved field */
+		UCHAR	bypassTSSIAverage:1; /* 0: the average TSSI (the average of the 16 samples), 1: the current TSSI */
+		UCHAR	adc5_in_sel:1; /* 0: TSSI (from the external components, old version), 1: PSI (internal components, new version - RT3390) */
+	} field;
+	
+	UCHAR		byte;
+} BBP_R49_STRUC, *PBBP_R49_STRUC;
+#endif
+
+/* */
+/* BBP R105 (FEQ control, MLD control and SIG remodulation) */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef union _BBP_R105_STRUC {
+	struct
+	{
+		UCHAR	Reserve1:4; /* Reserved field */
+		UCHAR	EnableSIGRemodulation:1; /* Enable the channel estimation updates based on remodulation of L-SIG and HT-SIG symbols. */
+		UCHAR	MLDFor2Stream:1; /* Apply Maximum Likelihood Detection (MLD) for 2 stream case (reserved field if single RX) */
+		UCHAR	IndependentFeedForwardCompensation:1; /* Apply independent feed-forward compensation for independent stream. */
+		UCHAR	DetectSIGOnPrimaryChannelOnly:1; /* Under 40 MHz band, detect SIG on primary channel only. */
+	} field;
+
+	UCHAR		byte;
+} BBP_R105_STRUC, *PBBP_R105_STRUC;
+#else
+typedef union _BBP_R105_STRUC {
+	struct
+	{
+		UCHAR	DetectSIGOnPrimaryChannelOnly:1; /* Under 40 MHz band, detect SIG on primary channel only. */
+		UCHAR	IndependentFeedForwardCompensation:1; /* Apply independent feed-forward compensation for independent stream. */
+		UCHAR	MLDFor2Stream:1; /* Apply Maximum Likelihood Detection (MLD) for 2 stream case (reserved field if single RX) */
+		UCHAR	EnableSIGRemodulation:1; /* Enable the channel estimation updates based on remodulation of L-SIG and HT-SIG symbols. */
+		UCHAR	Reserve1:4; /* Reserved field */
+	} field;
+	
+	UCHAR		byte;
+} BBP_R105_STRUC, *PBBP_R105_STRUC;
+#endif
+
+/* */
+/* BBP R106 (GI remover) */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef union _BBP_R106_STRUC {
+	struct
+	{
+		UCHAR	EnableLowPowerFSD:1; /* enable/disable the low power FSD */
+		UCHAR	ShortGI_Offset40:4; /* Delay GI remover when the short GI is detected in 40MHz band (40M sampling rate) */
+		UCHAR	ShortGI_Offset20:3; /* Delay GI remover when the short GI is detected in 20MHz band (20M sampling rate) */
+	} field;
+
+	UCHAR		byte;
+} BBP_R106_STRUC, *PBBP_R106_STRUC;
+#else
+typedef union _BBP_R106_STRUC {
+	struct
+	{
+		UCHAR	ShortGI_Offset20:3; /* Delay GI remover when the short GI is detected in 20MHz band (20M sampling rate) */
+		UCHAR	ShortGI_Offset40:4; /* Delay GI remover when the short GI is detected in 40MHz band (40M sampling rate) */
+		UCHAR	EnableLowPowerFSD:1; /* enable/disable the low power FSD */
+	} field;
+	
+	UCHAR		byte;
+} BBP_R106_STRUC, *PBBP_R106_STRUC;
+#endif
+
+/* */
+/* BBP R109 (Tx power control in 0.1dB step) */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef union _BBP_R109_STRUC {
+	struct
+	{
+		UCHAR	Tx1PowerCtrl:4; /* Tx1 power control in 0.1dB step (valid: 0~10) */
+		UCHAR	Tx0PowerCtrl:4; /* Tx0 power control in 0.1dB step (valid: 0~10) */
+	} field;
+
+	UCHAR		byte;
+} BBP_R109_STRUC, *PBBP_R109_STRUC;
+#else
+typedef union _BBP_R109_STRUC {
+	struct
+	{
+		UCHAR	Tx0PowerCtrl:4; /* Tx0 power control in 0.1dB step (valid: 0~10) */
+		UCHAR	Tx1PowerCtrl:4; /* Tx0 power control in 0.1dB step (valid: 0~10) */
+	} field;
+	
+	UCHAR		byte;
+} BBP_R109_STRUC, *PBBP_R109_STRUC;
+#endif
+
+/* */
+/* BBP R110 (Tx power control in 0.1dB step) */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef union _BBP_R110_STRUC {
+	struct
+	{
+		UCHAR	Tx2PowerCtrl:4; /* Tx2 power control in 0.1dB step (valid: 0~10) */
+		UCHAR	AllTxPowerCtrl:4; /* All transmitters' fine power control in 0.1dB (valid: 0~10) */
+	} field;
+
+	UCHAR		byte;
+} BBP_R110_STRUC, *PBBP_R110_STRUC;
+#else
+typedef union _BBP_R110_STRUC {
+	struct
+	{
+		UCHAR	AllTxPowerCtrl:4; /* All transmitters' fine power control in 0.1dB (valid: 0~10) */
+		UCHAR	Tx2PowerCtrl:4; /* Tx2 power control in 0.1dB step (valid: 0~10) */
+	} field;
+	
+	UCHAR		byte;
+} BBP_R110_STRUC, *PBBP_R110_STRUC;
+#endif
+
+/* */
+/* BBP R179 (Test config #1) */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef union _BBP_R179_STRUC {
+	struct
+	{
+		UCHAR	DataIndex1:8; /* Data index #1 */
+	} field;
+
+	UCHAR		byte;
+} BBP_R179_STRUC, *PBBP_R179_STRUC;
+#else
+typedef union _BBP_R179_STRUC {
+	struct
+	{
+		UCHAR	DataIndex1:8; /* Data index #1 */
+	} field;
+	
+	UCHAR		byte;
+} BBP_R179_STRUC, *PBBP_R179_STRUC;
+#endif /* RT_BIG_ENDIAN */
+
+/* */
+/* BBP R180 (Test config #2) */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef union _BBP_R180_STRUC {
+	struct
+	{
+		UCHAR	DataIndex2:8; /* Data index #2 */
+	} field;
+
+	UCHAR		byte;
+} BBP_R180_STRUC, *PBBP_R180_STRUC;
+#else
+typedef union _BBP_R180_STRUC {
+	struct
+	{
+		UCHAR	DataIndex2:8; /* Data index #2 */
+	} field;
+	
+	UCHAR		byte;
+} BBP_R180_STRUC, *PBBP_R180_STRUC;
+#endif /* RT_BIG_ENDIAN */
+
+/* */
+/* BBP R182 (Test data port) */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef union _BBP_R182_STRUC {
+	struct
+	{
+		UCHAR	DataArray:8; /* Data array indexed by BBP R179 and R180 */
+	} field;
+
+	UCHAR		byte;
+} BBP_R182_STRUC, *PBBP_R182_STRUC;
+#else
+typedef union _BBP_R182_STRUC {
+	struct
+	{
+		UCHAR	DataArray:8; /* Data array indexed by BBP R179 and R180 */
+	} field;
+	
+	UCHAR		byte;
+} BBP_R182_STRUC, *PBBP_R182_STRUC;
+#endif /* RT_BIG_ENDIAN */
+
+#if defined(RT5370) || defined(RT5390) //for hw antenna diversity (PPAD)
+	#define MAX_BBP_ID	255
+#elif RT30xx
+	/* edit by johnli, RF power sequence setup, add BBP R138 for ADC dynamic on/off control */
+	#define MAX_BBP_ID	185
+#elif defined(RT2883)
+	#define MAX_BBP_ID	180
+#else
+	#define MAX_BBP_ID	136
+#endif /* RT30xx */
+
+	#define MAX_BBP_MSG_SIZE	2048
+
+
+/* */
+/* BBP & RF are using indirect access. Before write any value into it. */
+/* We have to make sure there is no outstanding command pending via checking busy bit. */
+/* */
+#define MAX_BUSY_COUNT  100         /* Number of retry before failing access BBP & RF indirect register */
+
+/*#define PHY_TR_SWITCH_TIME          5  // usec */
+
+/*#define BBP_R17_LOW_SENSIBILITY     0x50 */
+/*#define BBP_R17_MID_SENSIBILITY     0x41 */
+/*#define BBP_R17_DYNAMIC_UP_BOUND    0x40 */
+
+#define RSSI_FOR_VERY_LOW_SENSIBILITY   -35
+#define RSSI_FOR_LOW_SENSIBILITY		-58
+#define RSSI_FOR_MID_LOW_SENSIBILITY	-65 /*-80*/
+#define RSSI_FOR_MID_SENSIBILITY		-90
+
+/*****************************************************************************
+	RF register Read/Write marco definition
+ *****************************************************************************/
+
+#ifdef RTMP_MAC_USB
+#define RTMP_RF_IO_WRITE32(_A, _V)                 RTUSBWriteRFRegister(_A, _V)
+#endif /* RTMP_MAC_USB */
+
+
+#ifdef RT30xx
+#define RTMP_RF_IO_READ8_BY_REG_ID(_A, _I, _pV)    RT30xxReadRFRegister(_A, _I, _pV)
+#define RTMP_RF_IO_WRITE8_BY_REG_ID(_A, _I, _V)    RT30xxWriteRFRegister(_A, _I, _V)
+#endif /* RT30xx */
+
+
+/*****************************************************************************
+	BBP register Read/Write marco definitions.
+	we read/write the bbp value by register's ID. 
+	Generate PER to test BA
+ *****************************************************************************/
+
+#ifdef RTMP_MAC_USB
+#define RTMP_BBP_IO_READ8_BY_REG_ID(_A, _I, _pV)   RTUSBReadBBPRegister(_A, _I, _pV)
+#define RTMP_BBP_IO_WRITE8_BY_REG_ID(_A, _I, _V)   RTUSBWriteBBPRegister(_A, _I, _V)
+
+#define BBP_IO_WRITE8_BY_REG_ID(_A, _I, _V)			RTUSBWriteBBPRegister(_A, _I, _V)
+#define BBP_IO_READ8_BY_REG_ID(_A, _I, _pV)   		RTUSBReadBBPRegister(_A, _I, _pV)
+#endif /* RTMP_MAC_USB */
+
+
+#ifdef RT30xx
+#ifdef ANT_DIVERSITY_SUPPORT
+/*Need to collect each ant's rssi concurrently */
+/*rssi1 is report to pair2 Ant and rss2 is reprot to pair1 Ant when 4 Ant */
+
+#ifdef CONFIG_STA_SUPPORT
+#define STA_COLLECT_RX_ANTENNA_AVERAGE_RSSI(_pAd, _rssi1, _rssi2)					\
+{																				\
+	SHORT	AvgRssi;															\
+	UCHAR	UsedAnt;															\
+	if (_pAd->RxAnt.EvaluatePeriod == 0)									\
+	{																		\
+		UsedAnt = _pAd->RxAnt.Pair1PrimaryRxAnt;							\
+		AvgRssi = _pAd->RxAnt.Pair1AvgRssi[UsedAnt];						\
+		if (AvgRssi < 0)													\
+			AvgRssi = AvgRssi - (AvgRssi >> 3) + _rssi1;					\
+		else																\
+			AvgRssi = _rssi1 << 3;											\
+		_pAd->RxAnt.Pair1AvgRssi[UsedAnt] = AvgRssi;						\
+	}																		\
+	else																	\
+	{																		\
+		UsedAnt = _pAd->RxAnt.Pair1SecondaryRxAnt;							\
+		AvgRssi = _pAd->RxAnt.Pair1AvgRssi[UsedAnt];						\
+		if ((AvgRssi < 0) && (_pAd->RxAnt.FirstPktArrivedWhenEvaluate))		\
+			AvgRssi = AvgRssi - (AvgRssi >> 3) + _rssi1;					\
+		else																\
+		{																	\
+			_pAd->RxAnt.FirstPktArrivedWhenEvaluate = TRUE;					\
+			AvgRssi = _rssi1 << 3;											\
+		}																	\
+		_pAd->RxAnt.Pair1AvgRssi[UsedAnt] = AvgRssi;						\
+		_pAd->RxAnt.RcvPktNumWhenEvaluate++;								\
+	}																		\
+}
+#endif /* CONFIG_STA_SUPPORT */
+#endif /* ANT_DIVERSITY_SUPPORT */
+
+#define RTMP_ASIC_MMPS_DISABLE(_pAd)							\
+	do{															\
+		UCHAR _bbpData = 0;											\
+		UINT32 _macData;											\
+		/* disable MMPS BBP control register */						\
+		RTMP_BBP_IO_READ8_BY_REG_ID(_pAd, BBP_R3, &_bbpData);	\
+		_bbpData &= ~(0x04);	/*bit 2*/								\
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(_pAd, BBP_R3, _bbpData);	\
+																\
+		/* disable MMPS MAC control register */						\
+		RTMP_IO_READ32(_pAd, 0x1210, &_macData);				\
+		_macData &= ~(0x09);	/*bit 0, 3*/							\
+		RTMP_IO_WRITE32(_pAd, 0x1210, _macData);				\
+	}while(0)
+
+
+#define RTMP_ASIC_MMPS_ENABLE(_pAd)							\
+	do{															\
+		UCHAR _bbpData = 0;											\
+		UINT32 _macData;											\
+		/* enable MMPS BBP control register */						\
+		RTMP_BBP_IO_READ8_BY_REG_ID(_pAd, BBP_R3, &_bbpData);	\
+		_bbpData |= (0x04);	/*bit 2*/								\
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(_pAd, BBP_R3, _bbpData);	\
+																\
+		/* enable MMPS MAC control register */						\
+		RTMP_IO_READ32(_pAd, 0x1210, &_macData);				\
+		_macData |= (0x09);	/*bit 0, 3*/							\
+		RTMP_IO_WRITE32(_pAd, 0x1210, _macData);				\
+	}while(0)
+				
+#endif /* RT30xx */
+
+#endif /* __RTMP_PHY_H__ */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/chlist.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/chlist.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/chlist.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/chlist.h	2017-09-23 03:42:49.782675785 +0800
@@ -0,0 +1,134 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __CHLIST_H__
+#define __CHLIST_H__
+
+#include "rtmp_type.h"
+#include "rtmp_def.h"
+
+#define BAND_5G         0
+#define BAND_24G        1
+#define BAND_BOTH       2
+
+typedef struct _CH_DESC {
+	UCHAR FirstChannel;
+	UCHAR NumOfCh;
+	UCHAR ChannelProp;
+}CH_DESC, *PCH_DESC;
+
+typedef struct _COUNTRY_REGION_CH_DESC {
+	UCHAR RegionIndex;
+	PCH_DESC pChDesc;
+}COUNTRY_REGION_CH_DESC, *PCOUNTRY_REGION_CH_DESC;
+
+#ifdef EXT_BUILD_CHANNEL_LIST
+#define ODOR			0
+#define IDOR			1
+#define BOTH			2
+
+typedef struct _CH_DESP {
+	UCHAR FirstChannel;
+	UCHAR NumOfCh;
+	CHAR MaxTxPwr;			/* dBm */
+	UCHAR Geography;			/* 0:out door, 1:in door, 2:both */
+	BOOLEAN DfsReq;			/* Dfs require, 0: No, 1: yes. */
+} CH_DESP, *PCH_DESP;
+
+typedef struct _CH_REGION {
+	UCHAR CountReg[3];
+	UCHAR DfsType;			/* 0: CE, 1: FCC, 2: JAP, 3:JAP_W53, JAP_W56 */
+	CH_DESP ChDesp[10];
+} CH_REGION, *PCH_REGION;
+
+extern CH_REGION ChRegion[];
+#endif /* EXT_BUILD_CHANNEL_LIST */
+
+typedef struct _CH_FREQ_MAP_{
+	UINT16		channel;
+	UINT16		freqKHz;
+}CH_FREQ_MAP;
+
+extern CH_FREQ_MAP CH_HZ_ID_MAP[];
+extern int CH_HZ_ID_MAP_NUM;
+
+
+
+
+#define     MAP_CHANNEL_ID_TO_KHZ(_ch, _khz)                 \
+			RTMP_MapChannelID2KHZ(_ch, (UINT32 *)&(_khz))
+#define     MAP_KHZ_TO_CHANNEL_ID(_khz, _ch)                 \
+			RTMP_MapKHZ2ChannelID(_khz, (INT *)&(_ch))
+
+
+#ifdef EXT_BUILD_CHANNEL_LIST
+VOID BuildChannelListEx(
+	IN PRTMP_ADAPTER pAd);
+
+VOID BuildBeaconChList(
+	IN PRTMP_ADAPTER pAd,
+	OUT PUCHAR pBuf,
+	OUT	PULONG pBufLen);
+#endif /* EXT_BUILD_CHANNEL_LIST */
+
+#ifdef DOT11_N_SUPPORT
+VOID N_ChannelCheck(
+	IN PRTMP_ADAPTER pAd);
+
+VOID N_SetCenCh(
+	IN PRTMP_ADAPTER pAd);
+#endif /* DOT11_N_SUPPORT */
+
+UINT8 GetCuntryMaxTxPwr(
+	IN PRTMP_ADAPTER pAd,
+	IN UINT8 channel);
+
+VOID RTMP_MapChannelID2KHZ(
+	IN UCHAR Ch,
+	OUT UINT32 *pFreq);
+
+VOID RTMP_MapKHZ2ChannelID(
+	IN ULONG Freq,
+	OUT INT *pCh);
+
+UCHAR GetChannel_5GHZ(
+	IN PCH_DESC pChDesc, 
+	IN UCHAR index);
+
+UCHAR GetChannel_2GHZ(
+	IN PCH_DESC pChDesc, 
+	IN UCHAR index);
+
+UCHAR GetChannelFlag(
+	IN PCH_DESC pChDesc, 
+	IN UCHAR index);
+
+UINT16 TotalChNum(
+	IN PCH_DESC pChDesc);
+	
+#endif /* __CHLIST_H__ */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/client_wds_cmm.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/client_wds_cmm.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/client_wds_cmm.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/client_wds_cmm.h	2017-09-23 03:42:49.782675785 +0800
@@ -0,0 +1,50 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __CLIENT_WDS_CMM_H__
+#define __CLIENT_WDS_CMM_H__
+
+#include "rtmp_def.h"
+
+#ifdef CLIENT_WDS
+
+
+#define CLI_WDS_ENTRY_AGEOUT 5000  /* seconds */
+
+#define CLIWDS_POOL_SIZE 128
+#define CLIWDS_HASH_TAB_SIZE 64  /* the legth of hash table must be power of 2. */
+typedef struct _CLIWDS_PROXY_ENTRY {
+	struct _CLIWDS_PROXY_ENTRY * pNext;
+	ULONG LastRefTime;
+	SHORT Aid;
+	UCHAR Addr[MAC_ADDR_LEN];
+} CLIWDS_PROXY_ENTRY, *PCLIWDS_PROXY_ENTRY;
+
+#endif /* CLIENT_WDS */
+
+#endif /* __CLIENT_WDS_CMM_H__ */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/client_wds.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/client_wds.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/client_wds.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/client_wds.h	2017-09-23 03:42:49.782675785 +0800
@@ -0,0 +1,63 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __CLIENT_WDS_H__
+#define __CLIENT_WDS_H__
+
+#include "client_wds_cmm.h"
+
+VOID CliWds_ProxyTabInit(
+	IN PRTMP_ADAPTER pAd);
+
+VOID CliWds_ProxyTabDestory(
+	IN PRTMP_ADAPTER pAd);
+
+PCLIWDS_PROXY_ENTRY CliWdsEntyAlloc(
+	IN PRTMP_ADAPTER pAd);
+
+
+VOID CliWdsEntyFree(
+	IN PRTMP_ADAPTER pAd,
+	IN PCLIWDS_PROXY_ENTRY pCliWdsEntry);
+
+
+PUCHAR CliWds_ProxyLookup(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pMac);
+
+
+VOID CliWds_ProxyTabUpdate(
+	IN PRTMP_ADAPTER pAd,
+	IN SHORT Aid,
+	IN PUCHAR pMac);
+
+
+VOID CliWds_ProxyTabMaintain(
+	IN PRTMP_ADAPTER pAd);
+
+#endif /* __CLIENT_WDS_H__ */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/crypt_aes.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/crypt_aes.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/crypt_aes.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/crypt_aes.h	2017-09-23 03:42:49.782675785 +0800
@@ -0,0 +1,226 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __CRYPT_AES_H__
+#define __CRYPT_AES_H__
+
+#include "rt_config.h"
+
+
+#define GETU32(p) cpu2be32(get_unaligned32((u32 *) (p)))
+#define PUTU32(ct, st) put_unaligned(cpu2be32(st), (u32*)(ct)) /*{ *((u32 *)(ct)) = cpu2be32((st)); } */
+
+#define AES_ENCRYPT	1
+#define AES_DECRYPT	0
+
+/* Because array size can't be a const in C, the following two are macros.
+   Both sizes are in bytes. */
+#define AES_MAXNR 14
+#define AES_BLOCK_SIZE 16
+
+/* This should be a hidden type, but EVP requires that the size be known */
+struct aes_key_st {
+#ifdef AES_LONG
+    unsigned long rd_key[4 *(AES_MAXNR + 1)];
+#else
+    unsigned int rd_key[4 *(AES_MAXNR + 1)];
+#endif
+    int rounds;
+};
+typedef struct aes_key_st AES_KEY;
+
+typedef struct _EVP_CIPHER_CTX_ {
+	unsigned long flag;
+	unsigned long type;  
+	unsigned long encrypt; /*1: Encrypt 0: Decrypt, */
+	unsigned char key[16];
+	unsigned char iv[8 + 16];
+	unsigned long bufferlen;
+	unsigned char buffer[AES_BLOCK_SIZE];
+	AES_KEY        aesKey;
+} EVP_CIPHER_CTX, *PEVP_CIPHER_CTX;
+
+void evp_aes_encrypt(const unsigned char *in, unsigned char *out, const AES_KEY *key);
+void evp_aes_decrypt(const unsigned char *in, unsigned char *out, const AES_KEY *key);
+int AES_set_encrypt_key(const unsigned char *userKey, const int bits, AES_KEY *key);
+int AES_set_decrypt_key(const unsigned char *userKey, const int bits, AES_KEY *key);
+int EVP_aes_128_cbc(void);
+int EVP_EncryptInit(EVP_CIPHER_CTX *ctx, int type, unsigned char *key, unsigned char *iv);
+int EVP_EncryptUpdate(EVP_CIPHER_CTX *ctx, unsigned char *outbuf, int *outlen, unsigned char *inbuf, int inlen);
+int EVP_EncryptFinal(EVP_CIPHER_CTX *ctx, unsigned char *outbuf, int *outlen);
+int EVP_DecryptInit(EVP_CIPHER_CTX *ctx, int type, unsigned char *key, unsigned char *iv);
+int EVP_DecryptUpdate(EVP_CIPHER_CTX *ctx, unsigned char *outbuf, int *outlen, unsigned char *inbuf, int inlen);
+int EVP_DecryptFinal(EVP_CIPHER_CTX *ctx, unsigned char *outbuf, int *outlen);
+void evp_aes_cbc_encrypt(const unsigned char *in, unsigned char *out,
+		     const unsigned long length, const AES_KEY *key,
+		     unsigned char *ivec, const int enc);
+
+void WscEncryptData(
+    unsigned char *plainText,   int ptx_len,
+    unsigned char *key, unsigned char *iv,
+    unsigned char *cipherText,  int *ctx_len);
+    
+void WscDecryptData(
+    unsigned char *cipherText,  int ctx_len, 
+    unsigned char *key, unsigned char *iv,
+    unsigned char *plainText,   int *ptx_len);	
+
+#define AES_CBC_Encrypt(Plain, PlainL, Key, KeyL, IV, IVL, Cipher, CipherL) \
+    WscEncryptData((Plain), (PlainL), (Key), (IV), (Cipher), (int *) (CipherL));
+
+#define AES_CBC_Decrypt(Cipher, CipherL, Key, KeyL, IV, IVL, Plain, PlainL) \
+    WscDecryptData((Cipher), (CipherL), (Key), (IV), (Plain), (int *) (PlainL));
+
+typedef	struct
+{
+	uint32 erk[64];		/* encryption round	keys */
+	uint32 drk[64];		/* decryption round	keys */
+	int	nr;				/* number of rounds	*/
+}
+aes_context;
+
+int	 rtmp_aes_set_key( aes_context *ctx,	uint8 *key,	int	nbits );
+void rtmp_aes_encrypt( aes_context *ctx,	uint8 input[16], uint8 output[16] );
+void rtmp_aes_decrypt( aes_context *ctx,	uint8 input[16], uint8 output[16] );
+
+VOID AES_GTK_KEY_WRAP( 
+	IN UCHAR *key,
+	IN UCHAR *plaintext,
+	IN UINT p_len,
+	OUT UCHAR *ciphertext,
+	OUT UINT *c_len);
+    
+VOID AES_GTK_KEY_UNWRAP( 
+	IN	UCHAR	*key,
+	OUT	UCHAR	*plaintext,
+	OUT	UINT    *p_len,
+	IN	UCHAR	*ciphertext,
+	IN	UINT    c_len);
+
+#define AES_Key_Wrap(Plain, PlainL, Key, KeyL, Cipher, CipherL) \
+    AES_GTK_KEY_WRAP((Key), (Plain), (PlainL), (Cipher), (CipherL))
+
+#define AES_Key_Unwrap(Cipher, CipherL, Key, KeyL, Plain, PlainL) \
+    AES_GTK_KEY_UNWRAP((Key), (Plain), (PlainL), (Cipher), (CipherL))
+
+/* AES definition & structure */
+#define AES_STATE_ROWS 4     /* Block size: 4*4*8 = 128 bits */
+#define AES_STATE_COLUMNS 4
+#define AES_BLOCK_SIZES AES_STATE_ROWS*AES_STATE_COLUMNS
+#define AES_KEY_ROWS 4
+#define AES_KEY_COLUMNS 8    /*Key length: 4*{4,6,8}*8 = 128, 192, 256 bits */
+#define AES_KEY128_LENGTH 16
+#define AES_KEY192_LENGTH 24
+#define AES_KEY256_LENGTH 32
+#define AES_CBC_IV_LENGTH 16
+
+typedef struct {
+    UINT8 State[AES_STATE_ROWS][AES_STATE_COLUMNS];
+    UINT8 KeyWordExpansion[AES_KEY_ROWS][AES_KEY_ROWS*((AES_KEY256_LENGTH >> 2) + 6 + 1)];
+} AES_CTX_STRUC, *PAES_CTX_STRUC;
+
+
+/* AES operations */
+VOID RT_AES_KeyExpansion (
+    IN UINT8 Key[],
+    IN UINT KeyLength,
+    INOUT AES_CTX_STRUC *paes_ctx);
+
+VOID RT_AES_Encrypt (
+    IN UINT8 PlainBlock[],
+    IN UINT PlainBlockSize,
+    IN UINT8 Key[],
+    IN UINT KeyLength,
+    OUT UINT8 CipherBlock[],
+    INOUT UINT *CipherBlockSize);
+
+VOID RT_AES_Decrypt (
+    IN UINT8 CipherBlock[],
+    IN UINT CipherBlockSize,
+    IN UINT8 Key[],
+    IN UINT KeyLength,
+    OUT UINT8 PlainBlock[],
+    INOUT UINT *PlainBlockSize);
+
+/* AES Counter with CBC-MAC operations */
+VOID AES_CCM_MAC (
+    IN UINT8 Payload[],
+    IN UINT  PayloadLength,
+    IN UINT8 Key[],
+    IN UINT  KeyLength,
+    IN UINT8 Nonce[],
+    IN UINT  NonceLength,
+    IN UINT8 AAD[],
+    IN UINT  AADLength,
+    IN UINT  MACLength,
+    OUT UINT8 MACText[]);
+
+INT AES_CCM_Encrypt (
+    IN UINT8 PlainText[],
+    IN UINT  PlainTextLength,
+    IN UINT8 Key[],
+    IN UINT  KeyLength,
+    IN UINT8 Nonce[],
+    IN UINT  NonceLength,
+    IN UINT8 AAD[],
+    IN UINT  AADLength,
+    IN UINT  MACLength,
+    OUT UINT8 CipherText[],
+    INOUT UINT *CipherTextLength);
+
+INT AES_CCM_Decrypt (
+    IN UINT8 CipherText[],
+    IN UINT  CipherTextLength,
+    IN UINT8 Key[],
+    IN UINT  KeyLength,
+    IN UINT8 Nonce[],
+    IN UINT  NonceLength,
+    IN UINT8 AAD[],
+    IN UINT  AADLength,
+    IN UINT  MACLength,
+    OUT UINT8 PlainText[],
+    INOUT UINT *PlainTextLength);
+
+/* AES-CMAC operations */
+VOID AES_CMAC_GenerateSubKey (
+    IN UINT8 Key[],
+    IN UINT KeyLength,
+    OUT UINT8 SubKey1[],
+    OUT UINT8 SubKey2[]);
+
+VOID AES_CMAC (
+    IN UINT8 PlainText[],
+    IN UINT PlainTextLength,
+    IN UINT8 Key[],
+    IN UINT KeyLength,
+    OUT UINT8 MACText[],
+    INOUT UINT *MACTextLength);
+
+
+
+#endif /* __CRYPT_AES_H__ */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/crypt_arc4.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/crypt_arc4.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/crypt_arc4.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/crypt_arc4.h	2017-09-23 03:42:49.782675785 +0800
@@ -0,0 +1,58 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __CRYPT_ARC4_H__
+#define __CRYPT_ARC4_H__
+
+#include "rt_config.h"
+
+/* ARC4 definition & structure */
+#define ARC4_KEY_BLOCK_SIZE 256
+
+typedef struct {
+	UINT BlockIndex1;
+	UINT BlockIndex2;
+	UINT8 KeyBlock[256];
+} ARC4_CTX_STRUC, *PARC4_CTX_STRUC;
+
+/* ARC4 operations */
+VOID ARC4_INIT(
+	IN ARC4_CTX_STRUC * pARC4_CTX,
+	IN PUCHAR pKey,
+	IN UINT KeyLength);
+
+VOID ARC4_Compute(
+	IN ARC4_CTX_STRUC * pARC4_CTX,
+	IN UINT8 InputBlock[],
+	IN UINT InputBlockSize,
+	OUT UINT8 OutputBlock[]);
+
+VOID ARC4_Discard_KeyLength(
+	IN ARC4_CTX_STRUC * pARC4_CTX,
+	IN UINT Length);
+
+#endif /* __CRYPT_ARC4_H__ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/crypt_hmac.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/crypt_hmac.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/crypt_hmac.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/crypt_hmac.h	2017-09-23 03:42:49.786675773 +0800
@@ -0,0 +1,87 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __CRYPT_HMAC_H__
+#define __CRYPT_HMAC_H__
+
+#include "rt_config.h"
+
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#define USE_SHA256
+
+#if !defined(USE_SHA1) && !defined(USE_SHA256)
+#error define USE_SHA1 or USE_SHA256 to set the HMAC hash algorithm
+#endif
+
+#ifdef USE_SHA1
+#define HASH_INPUT_SIZE     SHA1_BLOCK_SIZE
+#define HASH_OUTPUT_SIZE    SHA1_DIGEST_SIZE
+#define sha_ctx             sha1_ctx
+#define sha_begin           sha1_begin
+#define sha_hash            sha1_hash
+#define sha_end             sha1_end
+#endif
+
+#ifdef USE_SHA256
+#define HASH_INPUT_SIZE     SHA256_BLOCK_SIZE
+#define HASH_OUTPUT_SIZE    SHA256_DIGEST_SIZE
+#define sha_ctx             sha256_ctx
+#define sha_begin           sha256_begin
+#define sha_hash            sha256_hash
+#define sha_end             sha256_end
+#endif
+
+#define HMAC_OK                0
+#define HMAC_BAD_MODE         -1
+#define HMAC_IN_DATA  0xffffffff
+
+typedef struct
+{   unsigned char   key[HASH_INPUT_SIZE];
+    sha_ctx         ctx[1];
+    unsigned int   klen;
+} hmac_ctx;
+
+void hmac_sha_begin(hmac_ctx cx[1]);
+int  hmac_sha_key(const unsigned char key[], unsigned int key_len, hmac_ctx cx[1]);
+void hmac_sha_data(const unsigned char data[], unsigned int data_len, hmac_ctx cx[1]);
+void hmac_sha_end(unsigned char mac[], unsigned int mac_len, hmac_ctx cx[1]);
+void hmac_sha(const unsigned char key[], unsigned int key_len,
+          const unsigned char data[], unsigned int data_len,
+          unsigned char mac[], unsigned int mac_len);
+
+#define RT_HMAC_SHA256(Key, KeyL, Data, DataL, Mac, MacL) \
+    hmac_sha((Key), (KeyL), (Data), (DataL), (Mac), (MacL))
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __CRYPT_HMAC_H__ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/crypt_md5.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/crypt_md5.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/crypt_md5.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/crypt_md5.h	2017-09-23 03:42:49.786675773 +0800
@@ -0,0 +1,88 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __CRYPT_MD5_H__
+#define __CRYPT_MD5_H__
+
+
+#ifndef	uint8
+#define	uint8  unsigned	char
+#endif
+
+#ifndef	uint32
+#define	uint32 unsigned	long int
+#endif
+
+#define MD5_MAC_LEN 16
+
+typedef struct _MD5_CTX {
+    ULONG   Buf[4];             /* buffers of four states */
+	UCHAR   Input[64];          /* input message */
+	ULONG   LenInBitCount[2];   /* length counter for input message, 0 up to 64 bits */
+}   MD5_CTX;
+
+VOID MD5Init(MD5_CTX *pCtx);
+VOID MD5Update(MD5_CTX *pCtx, UCHAR *pData, ULONG LenInBytes);
+VOID MD5Final(UCHAR Digest[16], MD5_CTX *pCtx);
+VOID MD5Transform(ULONG Buf[4], ULONG Mes[16]);
+
+void md5_mac(u8 *key, size_t key_len, u8 *data, size_t data_len, u8 *mac);
+void hmac_md5(u8 *key, size_t key_len, u8 *data, size_t data_len, u8 *mac);
+
+/* */
+/* SHA context */
+/* */
+typedef	struct _SHA_CTX
+{
+	ULONG   Buf[5];             /* buffers of five states */
+	UCHAR   Input[80];          /* input message */
+	ULONG   LenInBitCount[2];   /* length counter for input message, 0 up to 64 bits */
+	
+}	SHA_CTX;
+
+VOID SHAInit(SHA_CTX *pCtx);
+UCHAR SHAUpdate(SHA_CTX *pCtx, UCHAR *pData, ULONG LenInBytes);
+VOID SHAFinal(SHA_CTX *pCtx, UCHAR Digest[20]);
+VOID SHATransform(ULONG Buf[5], ULONG Mes[20]);
+
+#define SHA_DIGEST_LEN 20
+
+VOID HMAC_SHA1(
+	IN UCHAR * text,
+	IN UINT text_len,
+	IN UCHAR * key,
+	IN UINT key_len,
+	IN UCHAR * digest);
+
+#define RT_HMAC_MD5(Key, KeyL, Meg, MegL, MAC, MACL) \
+    hmac_md5((Key), (KeyL), (Meg), (MegL), (MAC))
+
+#define RT_HMAC_SHA1(Key, KeyL, Meg, MegL, MAC, MACL) \
+    HMAC_SHA1((Meg), (MegL), (Key), (KeyL), (MAC))
+
+
+#endif /* __CRYPT_MD5_H__ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/crypt_sha2.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/crypt_sha2.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/crypt_sha2.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/crypt_sha2.h	2017-09-23 03:42:49.786675773 +0800
@@ -0,0 +1,153 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __CRYPT_SHA2_H__
+#define __CRYPT_SHA2_H__
+
+
+#define EXIT_SUCCESS    0
+#define EXIT_FAILURE    1
+
+typedef unsigned char uint_8t;
+typedef unsigned short uint_16t;
+typedef unsigned int uint_32t;
+typedef unsigned long long uint_64t;
+
+#define void_ret  void
+#define int_ret   int
+
+
+/* define the hash functions that you need  */
+#define SHA_2			/* for dynamic hash length  */
+#define SHA_224
+#define SHA_256
+
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/* Note that the following function prototypes are the same */
+/* for both the bit and byte oriented implementations.  But */
+/* the length fields are in bytes or bits as is appropriate */
+/* for the version used.  Bit sequences are arrays of bytes */
+/* in which bit sequence indexes increase from the most to  */
+/* the least significant end of each byte                   */
+
+#define SHA1_BLOCK_SIZE    64	/* 512 bits = 64 bytes */
+#define SHA1_DIGEST_SIZE   20	/* 160 bits = 20 bytes */
+#define SHA224_DIGEST_SIZE  28
+#define SHA224_BLOCK_SIZE   64
+#define SHA256_DIGEST_SIZE  32
+#define SHA256_BLOCK_SIZE   64
+
+/* type to hold the SHA256 (and SHA224) context */
+
+typedef struct
+{   uint_32t count[2];
+    uint_32t hash[8];
+    uint_32t wbuf[16];
+} sha256_ctx;
+
+typedef sha256_ctx  sha224_ctx;
+
+void_ret sha256_compile(sha256_ctx ctx[1]);
+
+void_ret sha224_begin(sha224_ctx ctx[1]);
+#define sha224_hash sha256_hash
+void_ret sha224_end(unsigned char hval[], sha224_ctx ctx[1]);
+void_ret sha224(unsigned char hval[], const unsigned char data[], unsigned int len);
+
+void_ret sha256_begin(sha256_ctx ctx[1]);
+void_ret sha256_hash(const unsigned char data[], unsigned int len, sha256_ctx ctx[1]);
+void_ret sha256_end(unsigned char hval[], sha256_ctx ctx[1]);
+void_ret sha256(unsigned char hval[], const unsigned char data[], unsigned int len);
+ 
+
+#ifndef SHA_64BIT
+
+typedef struct
+{   union
+    { sha256_ctx  ctx256[1];
+    } uu[1];
+    uint_32t    sha2_len;
+} sha2_ctx;
+
+#define SHA2_MAX_DIGEST_SIZE    SHA256_DIGEST_SIZE
+
+#else
+
+#define SHA384_DIGEST_SIZE  48
+#define SHA384_BLOCK_SIZE  128
+#define SHA512_DIGEST_SIZE  64
+#define SHA512_BLOCK_SIZE  128
+#define SHA2_MAX_DIGEST_SIZE    SHA512_DIGEST_SIZE
+
+/* type to hold the SHA384 (and SHA512) context */
+
+typedef struct
+{   uint_64t count[2];
+    uint_64t hash[8];
+    uint_64t wbuf[16];
+} sha512_ctx;
+
+typedef sha512_ctx  sha384_ctx;
+
+typedef struct
+{   union
+    { sha256_ctx  ctx256[1];
+      sha512_ctx  ctx512[1];
+    } uu[1];
+    uint_32t    sha2_len;
+} sha2_ctx;
+
+void_ret sha512_compile(sha512_ctx ctx[1]);
+
+void_ret sha384_begin(sha384_ctx ctx[1]);
+#define sha384_hash sha512_hash
+void_ret sha384_end(unsigned char hval[], sha384_ctx ctx[1]);
+void_ret sha384(unsigned char hval[], const unsigned char data[], unsigned int len);
+
+void_ret sha512_begin(sha512_ctx ctx[1]);
+void_ret sha512_hash(const unsigned char data[], unsigned int len, sha512_ctx ctx[1]);
+void_ret sha512_end(unsigned char hval[], sha512_ctx ctx[1]);
+void_ret sha512(unsigned char hval[], const unsigned char data[], unsigned int len);
+
+int_ret  sha2_begin(unsigned int size, sha2_ctx ctx[1]);
+void_ret sha2_hash(const unsigned char data[], unsigned int len, sha2_ctx ctx[1]);
+void_ret sha2_end(unsigned char hval[], sha2_ctx ctx[1]);
+int_ret  sha2(unsigned char hval[], unsigned int size, const unsigned char data[], unsigned int len);
+#endif
+
+#define RT_SHA256(Message, MessageL, DMessage) \
+    sha256((DMessage), (Message), (MessageL));
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __CRYPT_SHA2_H__ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/dfs.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/dfs.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/dfs.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/dfs.h	2017-09-23 03:42:49.786675773 +0800
@@ -0,0 +1,187 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#define RADAR_PULSE 1
+#define RADAR_WIDTH 2
+
+#define WIDTH_RD_IDLE 0
+#define WIDTH_RD_CHECK 1
+
+
+
+/*************************************************************************
+  *
+  *	DFS Radar related definitions.
+  *
+  ************************************************************************/  
+/*#define CARRIER_DETECT_TASK_NUM	6 */
+/*#define RADAR_DETECT_TASK_NUM	7 */
+
+/* McuRadarState && McuCarrierState for 2880-SW-MCU */
+#define FREE_FOR_TX				0
+#define WAIT_CTS_BEING_SENT		1
+#define DO_DETECTION			2
+
+/* McuRadarEvent */
+#define RADAR_EVENT_CTS_SENT			0x01 /* Host signal MCU that CTS has been sent */
+#define RADAR_EVENT_CTS_CARRIER_SENT	0x02 /* Host signal MCU that CTS has been sent (Carrier) */
+#define RADAR_EVENT_RADAR_DETECTING		0x04 /* Radar detection is on going, carrier detection hold back */
+#define RADAR_EVENT_CARRIER_DETECTING	0x08 /* Carrier detection is on going, radar detection hold back */
+#define RADAR_EVENT_WIDTH_RADAR			0x10 /* BBP == 2 radar detected */
+#define RADAR_EVENT_CTS_KICKED			0x20 /* Radar detection need to sent double CTS, first CTS sent */
+
+/* McuRadarCmd */
+#define DETECTION_STOP			0
+#define RADAR_DETECTION			1
+#define CARRIER_DETECTION		2
+
+#if defined(RTMP_RBUS_SUPPORT) || defined(DFS_INTERRUPT_SUPPORT)
+#define RADAR_GPIO_DEBUG	0x01 /* GPIO external debug */
+#define RADAR_SIMULATE		0x02 /* simulate a short pulse hit this channel */
+#define RADAR_SIMULATE2		0x04 /* print any hit */
+#define RADAR_LOG			0x08 /* log record and ready for print */
+
+/* Both Old and New DFS */
+#define RADAR_DONT_SWITCH		0x10 /* Don't Switch channel when hit */
+
+#ifdef DFS_HARDWARE_SUPPORT
+/* New DFS only */
+#define RADAR_DEBUG_EVENT			0x01 /* print long pulse debug event */
+#define RADAR_DEBUG_FLAG_1			0x02
+#define RADAR_DEBUG_FLAG_2			0x04
+#define RADAR_DEBUG_FLAG_3			0x08
+#define RADAR_DEBUG_SILENCE			0x4
+#define RADAR_DEBUG_SW_SILENCE		0x8
+#endif /* DFS_HARDWARE_SUPPORT */
+
+#ifdef DFS_HARDWARE_SUPPORT
+VOID NewRadarDetectionStart(
+	IN PRTMP_ADAPTER pAd);
+
+VOID NewRadarDetectionStop(
+	IN PRTMP_ADAPTER pAd);
+
+void modify_table1(
+	IN PRTMP_ADAPTER pAd, 
+	IN ULONG idx, 
+	IN ULONG value);
+
+void modify_table2(
+	IN PRTMP_ADAPTER pAd, 
+	IN ULONG idx, 
+	IN ULONG value);
+
+
+ VOID NewTimerCB_Radar(
+ 	IN PRTMP_ADAPTER pAd);
+ 
+ void schedule_dfs_task(
+ 	IN PRTMP_ADAPTER pAd);
+
+
+#endif /* DFS_HARDWARE_SUPPORT */
+
+#endif /* defined (RTMP_RBUS_SUPPORT) || defined(DFS_INTERRUPT_SUPPORT)  */
+
+
+void MCURadarDetect(PRTMP_ADAPTER pAd);
+
+#ifdef TONE_RADAR_DETECT_SUPPORT
+void RTMPHandleRadarInterrupt(PRTMP_ADAPTER  pAd);
+#else
+
+#ifdef DFS_HARDWARE_SUPPORT
+#if defined (RTMP_RBUS_SUPPORT) || defined(DFS_INTERRUPT_SUPPORT)
+void RTMPHandleRadarInterrupt(PRTMP_ADAPTER  pAd);
+#endif /* defined (RTMP_RBUS_SUPPORT) || defined(DFS_INTERRUPT_SUPPORT) */
+#endif /* DFS_HARDWARE_SUPPORT */
+#endif /* TONE_RADAR_DETECT_SUPPORT */
+
+#ifdef TONE_RADAR_DETECT_SUPPORT
+INT Set_CarrierCriteria_Proc(IN PRTMP_ADAPTER pAd, IN PSTRING arg);
+int Set_CarrierReCheck_Proc(IN PRTMP_ADAPTER pAd, IN PSTRING arg);
+INT Set_CarrierStopCheck_Proc(IN PRTMP_ADAPTER pAd, IN PSTRING arg);
+void NewCarrierDetectionStart(PRTMP_ADAPTER pAd);
+#endif /* TONE_RADAR_DETECT_SUPPORT */
+
+#ifdef DFS_SOFTWARE_SUPPORT
+VOID BbpRadarDetectionStart(
+	IN PRTMP_ADAPTER pAd);
+
+VOID BbpRadarDetectionStop(
+	IN PRTMP_ADAPTER pAd);
+
+VOID RadarDetectionStart(
+	IN PRTMP_ADAPTER pAd,
+	IN BOOLEAN CTS_Protect,
+	IN UINT8 CTSPeriod);
+
+VOID RadarDetectionStop(
+	IN PRTMP_ADAPTER	pAd);
+#endif /* DFS_SOFTWARE_SUPPORT */
+
+VOID RadarDetectPeriodic(
+	IN PRTMP_ADAPTER	pAd);
+	
+
+BOOLEAN RadarChannelCheck(
+	IN PRTMP_ADAPTER	pAd,
+	IN UCHAR			Ch);
+
+ULONG JapRadarType(
+	IN PRTMP_ADAPTER pAd);
+
+ULONG RTMPBbpReadRadarDuration(
+	IN PRTMP_ADAPTER	pAd);
+
+ULONG RTMPReadRadarDuration(
+	IN PRTMP_ADAPTER	pAd);
+
+VOID RTMPCleanRadarDuration(
+	IN PRTMP_ADAPTER	pAd);
+
+VOID RTMPPrepareRDCTSFrame(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PUCHAR			pDA,
+	IN	ULONG			Duration,
+	IN  UCHAR           RTSRate,
+	IN  ULONG           CTSBaseAddr,
+	IN  UCHAR			FrameGap);
+#ifdef DFS_SOFTWARE_SUPPORT
+VOID RTMPPrepareRadarDetectParams(
+	IN PRTMP_ADAPTER	pAd);
+#endif /* DFS_SOFTWARE_SUPPORT */
+
+INT Set_ChMovingTime_Proc(
+	IN PRTMP_ADAPTER pAd, 
+	IN PSTRING arg);
+
+INT Set_LongPulseRadarTh_Proc(
+	IN PRTMP_ADAPTER pAd, 
+	IN PSTRING arg);
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/dot11i_wpa.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/dot11i_wpa.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/dot11i_wpa.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/dot11i_wpa.h	2017-09-23 03:42:49.786675773 +0800
@@ -0,0 +1,293 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef	__DOT11I_WPA_H__
+#define	__DOT11I_WPA_H__
+
+#include "rtmp_type.h"
+
+/* The length is the EAPoL-Key frame except key data field. 
+   Please refer to 802.11i-2004 ,Figure 43u in p.78 */
+#define MIN_LEN_OF_EAPOL_KEY_MSG	95	
+
+/* The related length of the EAPOL Key frame */
+#define LEN_KEY_DESC_NONCE			32
+#define LEN_KEY_DESC_IV				16
+#define LEN_KEY_DESC_RSC			8
+#define LEN_KEY_DESC_ID				8
+#define LEN_KEY_DESC_REPLAY			8
+#define LEN_KEY_DESC_MIC			16
+
+/* EAP Code Type */
+#define EAP_CODE_REQUEST	1
+#define EAP_CODE_RESPONSE	2
+#define EAP_CODE_SUCCESS    3
+#define EAP_CODE_FAILURE    4
+
+/* EAPOL frame Protocol Version */
+#define	EAPOL_VER					1
+#define	EAPOL_VER2					2
+
+/* EAPOL-KEY Descriptor Type */
+#define	WPA1_KEY_DESC				0xfe
+#define WPA2_KEY_DESC               0x02
+
+/* Key Descriptor Version of Key Information */
+#define	KEY_DESC_TKIP			1
+#define	KEY_DESC_AES			2
+#define KEY_DESC_EXT			3
+
+#define IE_WPA					221
+#define IE_RSN					48
+
+#define WPA_KDE_TYPE			0xdd
+
+/*EAP Packet Type */
+#define	EAPPacket		0
+#define	EAPOLStart		1
+#define	EAPOLLogoff		2
+#define	EAPOLKey		3
+#define	EAPOLASFAlert	4
+#define	EAPTtypeMax		5
+
+#define PAIRWISEKEY					1
+#define GROUPKEY					0
+
+/* RSN IE Length definition */
+#define MAX_LEN_OF_RSNIE         	255
+#define MIN_LEN_OF_RSNIE         	18
+#define MAX_LEN_GTK					32
+#define MIN_LEN_GTK					5
+
+#define LEN_PMK						32
+#define LEN_PMKID					16
+#define LEN_PMK_NAME				16
+
+#define LEN_GMK						32
+
+#define LEN_PTK_KCK					16
+#define LEN_PTK_KEK					16
+#define LEN_TK						16	/* The length Temporal key. */
+#define LEN_TKIP_MIC				8	/* The length of TX/RX Mic of TKIP */
+#define LEN_TK2						(2 * LEN_TKIP_MIC)
+#define LEN_PTK						(LEN_PTK_KCK + LEN_PTK_KEK + LEN_TK + LEN_TK2)
+
+#define LEN_TKIP_PTK				LEN_PTK
+#define LEN_AES_PTK					(LEN_PTK_KCK + LEN_PTK_KEK + LEN_TK)
+#define LEN_TKIP_GTK				(LEN_TK + LEN_TK2)
+#define LEN_AES_GTK					LEN_TK
+#define LEN_TKIP_TK					(LEN_TK + LEN_TK2)
+#define LEN_AES_TK					LEN_TK
+
+#define LEN_WEP64					5
+#define LEN_WEP128					13
+
+#define OFFSET_OF_PTK_TK			(LEN_PTK_KCK + LEN_PTK_KEK)	/* The offset of the PTK Temporal key in PTK */
+#define OFFSET_OF_AP_TKIP_TX_MIC	(OFFSET_OF_PTK_TK + LEN_TK)
+#define OFFSET_OF_AP_TKIP_RX_MIC	(OFFSET_OF_AP_TKIP_TX_MIC + LEN_TKIP_MIC)
+#define OFFSET_OF_STA_TKIP_RX_MIC	(OFFSET_OF_PTK_TK + LEN_TK)
+#define OFFSET_OF_STA_TKIP_TX_MIC	(OFFSET_OF_AP_TKIP_TX_MIC + LEN_TKIP_MIC)
+
+#define LEN_KDE_HDR					6
+#define LEN_NONCE					32
+#define LEN_PN						6
+#define LEN_TKIP_IV_HDR				8
+#define LEN_CCMP_HDR				8
+#define LEN_CCMP_MIC				8
+#define LEN_OUI_SUITE				4
+#define LEN_WEP_TSC					3
+#define LEN_WPA_TSC					6
+#define LEN_WEP_IV_HDR				4
+#define LEN_ICV						4
+
+/* It's defined in IEEE Std 802.11-2007 Table 8-4 */
+typedef enum _WPA_KDE_ID
+{		
+   	KDE_RESV0,
+   	KDE_GTK,
+   	KDE_RESV2,
+   	KDE_MAC_ADDR,
+   	KDE_PMKID,
+   	KDE_SMK,
+   	KDE_NONCE,
+   	KDE_LIFETIME,
+   	KDE_ERROR,
+   	KDE_RESV_OTHER
+} WPA_KDE_ID;
+
+/* EAPOL Key Information definition within Key descriptor format */
+typedef	struct GNU_PACKED _KEY_INFO
+{
+#ifdef RT_BIG_ENDIAN
+	UCHAR	KeyAck:1;
+    UCHAR	Install:1;
+    UCHAR	KeyIndex:2;
+    UCHAR	KeyType:1;
+    UCHAR	KeyDescVer:3;
+    UCHAR	Rsvd:3;
+    UCHAR	EKD_DL:1;		/* EKD for AP; DL for STA */
+    UCHAR	Request:1;
+    UCHAR	Error:1;
+    UCHAR	Secure:1;
+    UCHAR	KeyMic:1;
+#else
+	UCHAR	KeyMic:1;
+	UCHAR	Secure:1;
+	UCHAR	Error:1;
+	UCHAR	Request:1;
+	UCHAR	EKD_DL:1;       /* EKD for AP; DL for STA */
+	UCHAR	Rsvd:3;
+	UCHAR	KeyDescVer:3;
+	UCHAR	KeyType:1;
+	UCHAR	KeyIndex:2;
+	UCHAR	Install:1;
+	UCHAR	KeyAck:1;
+#endif	
+}	KEY_INFO, *PKEY_INFO;
+
+/* EAPOL Key descriptor format */
+typedef	struct GNU_PACKED _KEY_DESCRIPTER
+{
+	UCHAR		Type;
+	KEY_INFO	KeyInfo;
+	UCHAR		KeyLength[2];
+	UCHAR		ReplayCounter[LEN_KEY_DESC_REPLAY];
+	UCHAR		KeyNonce[LEN_KEY_DESC_NONCE];
+	UCHAR		KeyIv[LEN_KEY_DESC_IV];
+	UCHAR		KeyRsc[LEN_KEY_DESC_RSC];
+	UCHAR		KeyId[LEN_KEY_DESC_ID];
+	UCHAR		KeyMic[LEN_KEY_DESC_MIC];
+	UCHAR		KeyDataLen[2];	   
+	UCHAR		KeyData[0];
+}	KEY_DESCRIPTER, *PKEY_DESCRIPTER;
+
+typedef	struct GNU_PACKED _EAPOL_PACKET
+{
+	UCHAR	 			ProVer;
+	UCHAR	 			ProType;
+	UCHAR	 			Body_Len[2];
+	KEY_DESCRIPTER		KeyDesc;
+}	EAPOL_PACKET, *PEAPOL_PACKET;
+
+typedef struct GNU_PACKED _KDE_HDR
+{
+    UCHAR               Type;
+    UCHAR               Len;
+    UCHAR               OUI[3];
+    UCHAR               DataType;
+	UCHAR				octet[0];
+}   KDE_HDR, *PKDE_HDR;
+
+/*802.11i D10 page 83 */
+typedef struct GNU_PACKED _GTK_KDE
+{
+#ifndef RT_BIG_ENDIAN
+    UCHAR               Kid:2;
+    UCHAR               tx:1;
+    UCHAR               rsv:5;
+    UCHAR               rsv1;
+#else
+    UCHAR               rsv:5;
+    UCHAR               tx:1;
+    UCHAR               Kid:2;
+    UCHAR               rsv1;    	
+#endif
+    UCHAR               GTK[0];
+}   GTK_KDE, *PGTK_KDE;
+
+/* For WPA1 */
+typedef struct GNU_PACKED _RSNIE {
+    UCHAR   oui[4];
+    USHORT  version;
+    UCHAR   mcast[4];
+    USHORT  ucount;
+    struct GNU_PACKED {
+        UCHAR oui[4];
+    }ucast[1];
+} RSNIE, *PRSNIE;
+
+/* For WPA2 */
+typedef struct GNU_PACKED _RSNIE2 {
+    USHORT  version;
+    UCHAR   mcast[4];
+    USHORT  ucount;
+    struct GNU_PACKED {
+        UCHAR oui[4];
+    }ucast[1];
+} RSNIE2, *PRSNIE2;
+
+/* AKM Suite */
+typedef struct GNU_PACKED _RSNIE_AUTH {
+    USHORT acount;
+    struct GNU_PACKED {
+        UCHAR oui[4];
+    }auth[1];
+} RSNIE_AUTH,*PRSNIE_AUTH;
+
+/* PMKID List */
+typedef struct GNU_PACKED _RSNIE_PMKID {
+    USHORT pcount;
+    struct GNU_PACKED {
+        UCHAR list[16];
+    }pmkid[1];
+} RSNIE_PMKID,*PRSNIE_PMKID;
+
+typedef	union GNU_PACKED _RSN_CAPABILITIES	{
+	struct	GNU_PACKED {
+#ifdef RT_BIG_ENDIAN
+        USHORT		Rsvd:8;		
+		USHORT		MFPC:1;
+		USHORT		MFPR:1;
+        USHORT		GTKSA_R_Counter:2;
+        USHORT		PTKSA_R_Counter:2;
+        USHORT		No_Pairwise:1;
+		USHORT		PreAuth:1;
+#else
+        USHORT		PreAuth:1;
+		USHORT		No_Pairwise:1;
+		USHORT		PTKSA_R_Counter:2;
+		USHORT		GTKSA_R_Counter:2;
+		USHORT		MFPR:1;
+		USHORT		MFPC:1;
+		USHORT		Rsvd:8;
+#endif
+	}	field;
+	USHORT			word;
+}	RSN_CAPABILITIES, *PRSN_CAPABILITIES;
+
+typedef struct GNU_PACKED _EAP_HDR {
+    UCHAR   ProVer;
+    UCHAR   ProType;
+    UCHAR   Body_Len[2];
+    UCHAR   code;
+    UCHAR   identifier;
+    UCHAR   length[2]; /* including code and identifier, followed by length-2 octets of data */
+} EAP_HDR, *PEAP_HDR;
+
+
+#endif /* __DOT11I_WPA_H__ */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/eeprom.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/eeprom.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/eeprom.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/eeprom.h	2017-09-23 03:42:49.786675773 +0800
@@ -0,0 +1,105 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __EEPROM_H__
+#define __EEPROM_H__
+
+
+#ifdef RTMP_MAC_USB
+#define EEPROM_SIZE					0x400
+#endif /* RTMP_MAC_USB */
+
+
+
+
+#ifdef RTMP_USB_SUPPORT
+/*************************************************************************
+  *	Public function declarations for usb-based prom chipset
+  ************************************************************************/
+NTSTATUS RTUSBReadEEPROM16(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	USHORT			offset,
+	OUT	PUSHORT			pData);
+
+
+NTSTATUS RTUSBWriteEEPROM16(
+	IN RTMP_ADAPTER *pAd, 
+	IN USHORT offset, 
+	IN USHORT value);
+
+#endif /* RTMP_USB_SUPPORT */
+
+
+#if defined(RTMP_RBUS_SUPPORT) || defined(RTMP_FLASH_SUPPORT)
+/*************************************************************************
+  *	Public function declarations for flash-based chipset
+  ************************************************************************/
+NDIS_STATUS rtmp_nv_init(
+	IN PRTMP_ADAPTER pAd);
+
+int rtmp_ee_flash_read(
+	IN PRTMP_ADAPTER pAd, 
+	IN USHORT Offset,
+	OUT USHORT *pValue);
+
+int rtmp_ee_flash_write(
+	IN PRTMP_ADAPTER pAd, 
+	IN USHORT Offset, 
+	IN USHORT Data);
+
+VOID rtmp_ee_flash_read_all(
+	IN PRTMP_ADAPTER pAd, 
+	IN USHORT *Data);
+
+VOID rtmp_ee_flash_write_all(
+	IN PRTMP_ADAPTER pAd, 
+	IN USHORT *Data);
+
+#endif /* defined(RTMP_RBUS_SUPPORT) || defined(RTMP_FLASH_SUPPORT) */
+
+#ifdef RT30xx
+#ifdef RTMP_EFUSE_SUPPORT
+int rtmp_ee_efuse_read16(
+	IN RTMP_ADAPTER *pAd, 
+	IN USHORT Offset,
+	OUT USHORT *pValue);
+
+int rtmp_ee_efuse_write16(
+	IN RTMP_ADAPTER *pAd, 
+	IN USHORT Offset, 
+	IN USHORT data);
+#endif /* RTMP_EFUSE_SUPPORT */
+#endif /* RT30xx */
+
+/*************************************************************************
+  *	Public function declarations for prom operation callback functions setting
+  ************************************************************************/
+INT RtmpChipOpsEepromHook(
+	IN RTMP_ADAPTER *pAd,
+	IN INT			infType);
+
+#endif /* __EEPROM_H__ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/firmware.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/firmware.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/firmware.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/firmware.h	2017-09-23 03:42:49.786675773 +0800
@@ -0,0 +1,517 @@
+/* AUTO GEN PLEASE DO NOT MODIFY IT */ 
+/* AUTO GEN PLEASE DO NOT MODIFY IT */ 
+
+
+UCHAR FirmwareImage [] = { 
+0xff, 0xff, 0xff, 0x02, 0x10, 0x28, 0x02, 0x10, 0x3b, 0x02, 0x10, 0x86, 0x02, 0x16, 0x4e, 0x02, 
+0x16, 0x4f, 0x02, 0x17, 0x33, 0x02, 0x17, 0x38, 0x12, 0x17, 0x34, 0x22, 0x02, 0x1c, 0x7a, 0x02, 
+0x1d, 0xa3, 0x02, 0x18, 0xc7, 0x02, 0x18, 0x02, 0x30, 0x05, 0x06, 0x20, 0x0d, 0x03, 0x12, 0x1e, 
+0x88, 0x30, 0x07, 0x06, 0x20, 0x0f, 0x03, 0x12, 0x1e, 0xdd, 0x22, 0x90, 0x01, 0x8c, 0xe0, 0x30, 
+0xe3, 0x20, 0xe5, 0x58, 0x30, 0xe0, 0x10, 0xe5, 0x4c, 0x30, 0xe0, 0x04, 0x7f, 0x40, 0x80, 0x02, 
+0x7f, 0x00, 0x90, 0x10, 0x2f, 0xef, 0xf0, 0x90, 0x01, 0x8c, 0x74, 0x08, 0xf0, 0xe4, 0x90, 0x01, 
+0xa7, 0xf0, 0x90, 0x01, 0x8c, 0xe0, 0x30, 0xe0, 0x1c, 0x90, 0x01, 0x80, 0xe0, 0xb4, 0x02, 0x15, 
+0xa3, 0xe0, 0xb4, 0x01, 0x10, 0x90, 0x01, 0x84, 0xe0, 0xb4, 0x81, 0x09, 0x90, 0x01, 0x8c, 0x74, 
+0x01, 0xf0, 0x12, 0x0d, 0xc8, 0x22, 0x90, 0x04, 0x14, 0xe0, 0x20, 0xe7, 0x03, 0x02, 0x16, 0x4d, 
+0x90, 0x70, 0x12, 0xe0, 0xf5, 0x56, 0x90, 0x04, 0x04, 0xe0, 0x12, 0x0a, 0x9d, 0x10, 0xf9, 0x31, 
+0x10, 0xdd, 0x36, 0x11, 0x22, 0x50, 0x11, 0x59, 0x51, 0x11, 0x62, 0x52, 0x11, 0x62, 0x53, 0x11, 
+0x62, 0x54, 0x11, 0xa3, 0x55, 0x11, 0xf2, 0x56, 0x13, 0x49, 0x64, 0x12, 0x50, 0x65, 0x13, 0x0f, 
+0x66, 0x13, 0x75, 0x70, 0x13, 0xa0, 0x71, 0x13, 0xce, 0x72, 0x14, 0x92, 0x73, 0x14, 0xb7, 0x74, 
+0x15, 0xb3, 0x80, 0x15, 0xd6, 0x90, 0x16, 0x0b, 0x91, 0x00, 0x00, 0x16, 0x4d, 0x90, 0x70, 0x11, 
+0xe0, 0xf5, 0x3c, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe5, 0x56, 
+0xf4, 0x70, 0x03, 0x02, 0x16, 0x4d, 0x02, 0x16, 0x46, 0x20, 0x02, 0x03, 0x30, 0x03, 0x1d, 0x7d, 
+0x02, 0xaf, 0x56, 0x12, 0x0b, 0x91, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 
+0xf0, 0xe5, 0x56, 0xf4, 0x70, 0x03, 0x02, 0x16, 0x4d, 0x02, 0x16, 0x46, 0x85, 0x56, 0x41, 0xd2, 
+0x02, 0x22, 0x90, 0x70, 0x10, 0xe0, 0x54, 0x7f, 0xff, 0xbf, 0x0a, 0x0d, 0x90, 0x70, 0x11, 0xe0, 
+0xb4, 0x08, 0x06, 0x75, 0x4e, 0x01, 0x75, 0x4f, 0x84, 0x90, 0x70, 0x10, 0xe0, 0x54, 0x7f, 0xff, 
+0xbf, 0x02, 0x12, 0x90, 0x70, 0x11, 0xe0, 0x64, 0x08, 0x60, 0x04, 0xe0, 0xb4, 0x20, 0x06, 0x75, 
+0x4e, 0x03, 0x75, 0x4f, 0x20, 0xe4, 0xf5, 0x3f, 0x22, 0x90, 0x70, 0x11, 0xe0, 0x24, 0xff, 0x92, 
+0x47, 0x22, 0x90, 0x04, 0x04, 0xe0, 0x25, 0xe0, 0x24, 0x5d, 0xf5, 0x57, 0x90, 0x70, 0x10, 0xe0, 
+0xff, 0x74, 0x47, 0x25, 0x57, 0xf8, 0xc6, 0xef, 0xc6, 0x90, 0x70, 0x11, 0xe0, 0xff, 0x74, 0x48, 
+0x25, 0x57, 0xf8, 0xc6, 0xef, 0xc6, 0xe4, 0xfd, 0xaf, 0x56, 0x12, 0x0b, 0x91, 0x90, 0x04, 0x14, 
+0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x70, 0x03, 0x02, 0x16, 0x4d, 
+0x02, 0x16, 0x46, 0xe5, 0x47, 0x64, 0x07, 0x60, 0x1d, 0xe5, 0x47, 0x64, 0x08, 0x60, 0x17, 0xe5, 
+0x47, 0x64, 0x09, 0x60, 0x11, 0xe5, 0x47, 0x64, 0x0a, 0x60, 0x0b, 0xe5, 0x47, 0x64, 0x0b, 0x60, 
+0x05, 0xe5, 0x47, 0xb4, 0x0c, 0x08, 0x90, 0x70, 0x11, 0xe0, 0x54, 0x0f, 0xf5, 0x3a, 0xe5, 0x47, 
+0xb4, 0x09, 0x08, 0xe5, 0x3a, 0xb4, 0x03, 0x03, 0xe4, 0xf5, 0x46, 0xe5, 0x47, 0xb4, 0x0a, 0x08, 
+0xe5, 0x3a, 0xb4, 0x01, 0x03, 0xe4, 0xf5, 0x46, 0xe4, 0xfd, 0xaf, 0x56, 0x12, 0x0b, 0x91, 0xd2, 
+0x04, 0x22, 0x90, 0x70, 0x11, 0xe0, 0xf4, 0xff, 0x90, 0x70, 0x10, 0xe0, 0x5f, 0xff, 0x90, 0x70, 
+0x11, 0xe0, 0x55, 0x3f, 0x4f, 0x90, 0x70, 0x18, 0xf0, 0x90, 0x70, 0x11, 0xe0, 0x90, 0x70, 0x19, 
+0xf0, 0xe4, 0xfd, 0xaf, 0x56, 0x12, 0x0b, 0x91, 0x30, 0x15, 0x04, 0xd2, 0x14, 0x80, 0x26, 0x90, 
+0x70, 0x18, 0xe0, 0xf5, 0x3f, 0x90, 0x02, 0x29, 0xe0, 0xff, 0x90, 0x70, 0x19, 0xe0, 0xfe, 0xef, 
+0x5e, 0x90, 0x02, 0x29, 0xf0, 0x30, 0x47, 0x04, 0xaf, 0x3f, 0x80, 0x04, 0xe5, 0x3f, 0xf4, 0xff, 
+0x90, 0x02, 0x28, 0xef, 0xf0, 0xe5, 0x56, 0xf4, 0x70, 0x03, 0x02, 0x16, 0x4d, 0x02, 0x16, 0x46, 
+0x90, 0x70, 0x10, 0xe0, 0x13, 0x92, 0x1b, 0xad, 0x57, 0xaf, 0x56, 0x12, 0x0b, 0x91, 0x90, 0x04, 
+0x14, 0x74, 0x80, 0xf0, 0x20, 0x1b, 0x03, 0x02, 0x12, 0xff, 0x7d, 0x05, 0x7f, 0xb8, 0x12, 0x17, 
+0xcf, 0x7f, 0xb9, 0x12, 0x17, 0xe9, 0x90, 0x4c, 0xb0, 0xef, 0xf0, 0x7d, 0x02, 0x7f, 0xb8, 0x12, 
+0x17, 0xcf, 0x7f, 0xb9, 0x12, 0x17, 0xe9, 0x90, 0x4c, 0xbb, 0xef, 0xf0, 0x7d, 0x03, 0x7f, 0xb8, 
+0x12, 0x17, 0xcf, 0x7f, 0xb9, 0x12, 0x17, 0xe9, 0x90, 0x4c, 0xbc, 0xef, 0xf0, 0x7d, 0x02, 0x7f, 
+0xb8, 0x12, 0x17, 0xcf, 0x7f, 0xb9, 0x12, 0x17, 0xe9, 0x90, 0x4c, 0xbd, 0xef, 0xf0, 0x7d, 0x09, 
+0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x7f, 0xb9, 0x12, 0x17, 0xe9, 0x90, 0x4c, 0xb7, 0xef, 0xf0, 0x7d, 
+0x08, 0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x7f, 0xb9, 0x12, 0x17, 0xe9, 0x90, 0x4c, 0xb6, 0xef, 0xf0, 
+0x7d, 0x07, 0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x7f, 0xb9, 0x12, 0x17, 0xe9, 0x90, 0x4c, 0xb5, 0xef, 
+0xf0, 0x7d, 0x06, 0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x7f, 0xb9, 0x12, 0x17, 0xe9, 0x90, 0x4c, 0xb4, 
+0xef, 0xf0, 0xe4, 0x90, 0x4c, 0xb1, 0xf0, 0x90, 0x4c, 0xb9, 0xe0, 0x90, 0x4c, 0xb8, 0xf0, 0xe4, 
+0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x70, 0x03, 0x02, 0x16, 0x4d, 0x02, 0x16, 0x46, 0x90, 
+0x4c, 0xb1, 0xe0, 0x90, 0x4c, 0xbe, 0xf0, 0x90, 0x4c, 0xb8, 0xe0, 0x90, 0x4c, 0xbf, 0xf0, 0xe4, 
+0x90, 0x4c, 0xb1, 0xf0, 0x90, 0x4c, 0xb9, 0xe0, 0x90, 0x4c, 0xb8, 0xf0, 0xad, 0x57, 0xaf, 0x56, 
+0x12, 0x0b, 0x91, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 
+0xf4, 0x70, 0x03, 0x02, 0x16, 0x4d, 0x02, 0x16, 0x46, 0x90, 0x70, 0x10, 0xe0, 0xf5, 0x2a, 0x75, 
+0x3d, 0x03, 0x75, 0x3e, 0x1f, 0xe4, 0xf5, 0x2f, 0xad, 0x57, 0xaf, 0x56, 0x12, 0x0b, 0x91, 0x90, 
+0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x70, 0x03, 0x02, 
+0x16, 0x4d, 0x02, 0x16, 0x46, 0x90, 0x70, 0x10, 0xe0, 0xfe, 0x90, 0x70, 0x11, 0xe0, 0xfd, 0xed, 
+0xf8, 0xe6, 0xf5, 0x57, 0xfd, 0xaf, 0x56, 0x12, 0x0b, 0x91, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 
+0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x70, 0x03, 0x02, 0x16, 0x4d, 0x02, 0x16, 0x46, 
+0x90, 0x70, 0x10, 0xe0, 0xfe, 0x90, 0x70, 0x11, 0xe0, 0xfd, 0xed, 0xf5, 0x82, 0x8e, 0x83, 0xe0, 
+0xf5, 0x57, 0xfd, 0xaf, 0x56, 0x12, 0x0b, 0x91, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 
+0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x70, 0x03, 0x02, 0x16, 0x4d, 0x02, 0x16, 0x46, 0x90, 0x10, 
+0x00, 0xe0, 0xf5, 0x57, 0xe4, 0xf5, 0x58, 0xf5, 0x59, 0x90, 0x10, 0x03, 0xe0, 0xb4, 0x28, 0x05, 
+0x75, 0x58, 0x01, 0x80, 0x3c, 0x90, 0x10, 0x03, 0xe0, 0xb4, 0x30, 0x05, 0x75, 0x58, 0x02, 0x80, 
+0x30, 0x90, 0x10, 0x03, 0xe0, 0xb4, 0x33, 0x05, 0x75, 0x58, 0x04, 0x80, 0x24, 0x90, 0x10, 0x03, 
+0xe0, 0xb4, 0x35, 0x0c, 0x90, 0x10, 0x02, 0xe0, 0xb4, 0x72, 0x05, 0x75, 0x58, 0x08, 0x80, 0x11, 
+0x90, 0x10, 0x03, 0xe0, 0xb4, 0x35, 0x0a, 0x90, 0x10, 0x02, 0xe0, 0xb4, 0x93, 0x03, 0x75, 0x58, 
+0x10, 0xe5, 0x58, 0x30, 0xe1, 0x19, 0x90, 0x05, 0x08, 0xe0, 0x44, 0x01, 0xf0, 0xfd, 0x90, 0x05, 
+0x05, 0xe0, 0x54, 0xfb, 0xf0, 0x44, 0x04, 0xf0, 0xed, 0x54, 0xfe, 0x90, 0x05, 0x08, 0xf0, 0x75, 
+0x3b, 0x18, 0xe4, 0xf5, 0x26, 0xf5, 0x27, 0xf5, 0x4e, 0xf5, 0x4f, 0x75, 0x3a, 0xff, 0x75, 0x3c, 
+0xff, 0xad, 0x57, 0xaf, 0x56, 0x12, 0x0b, 0x91, 0x90, 0x70, 0x36, 0x74, 0x37, 0xf0, 0xa3, 0x74, 
+0x32, 0xf0, 0x90, 0x04, 0x01, 0xe0, 0x44, 0x01, 0xf0, 0xc2, 0x16, 0xe4, 0xf5, 0x5c, 0xf5, 0x5a, 
+0xf5, 0x5b, 0x90, 0x70, 0x30, 0xf0, 0xa3, 0xf0, 0xf5, 0x2a, 0xc2, 0x17, 0x90, 0x04, 0x14, 0x74, 
+0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x70, 0x03, 0x02, 0x16, 0x4d, 0x02, 
+0x16, 0x46, 0x90, 0x70, 0x10, 0xe0, 0x24, 0xff, 0x92, 0x93, 0xe4, 0xfd, 0xaf, 0x56, 0x12, 0x0b, 
+0x91, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x70, 
+0x03, 0x02, 0x16, 0x4d, 0x02, 0x16, 0x46, 0x90, 0x10, 0x00, 0xe0, 0x90, 0x10, 0x2c, 0xf0, 0x90, 
+0x10, 0x2f, 0x74, 0x40, 0xf0, 0x90, 0x70, 0x11, 0xe0, 0x54, 0x7f, 0xf5, 0x57, 0xe0, 0x54, 0x80, 
+0x90, 0x70, 0x32, 0xf0, 0x90, 0x70, 0x10, 0xe0, 0xff, 0xe5, 0x57, 0xd3, 0x9f, 0x40, 0x43, 0x90, 
+0x70, 0x33, 0xe5, 0x57, 0xf0, 0x90, 0x70, 0x10, 0xe0, 0xff, 0x90, 0x70, 0x33, 0xe0, 0xc3, 0x9f, 
+0xd3, 0x94, 0x04, 0x40, 0x73, 0xe0, 0x24, 0xfc, 0xf0, 0xe0, 0xff, 0x90, 0x70, 0x32, 0xe0, 0x4f, 
+0x90, 0x05, 0x00, 0xf0, 0xe5, 0x58, 0x54, 0x0f, 0x60, 0x04, 0x7f, 0x17, 0x80, 0x02, 0x7f, 0x11, 
+0x90, 0x05, 0x01, 0xef, 0xf0, 0xa3, 0x74, 0x01, 0xf0, 0x74, 0x03, 0xf0, 0xff, 0x12, 0x0d, 0x2a, 
+0x80, 0xc3, 0x90, 0x70, 0x33, 0xe5, 0x57, 0xf0, 0x90, 0x70, 0x33, 0xe0, 0xff, 0x90, 0x70, 0x10, 
+0xe0, 0xc3, 0x9f, 0xd3, 0x94, 0x04, 0x40, 0x30, 0x90, 0x70, 0x33, 0xe0, 0x24, 0x04, 0xf0, 0xe0, 
+0xff, 0x90, 0x70, 0x32, 0xe0, 0x4f, 0x90, 0x05, 0x00, 0xf0, 0xe5, 0x58, 0x54, 0x0f, 0x60, 0x04, 
+0x7f, 0x17, 0x80, 0x02, 0x7f, 0x11, 0x90, 0x05, 0x01, 0xef, 0xf0, 0xa3, 0x74, 0x01, 0xf0, 0x74, 
+0x03, 0xf0, 0xff, 0x12, 0x0d, 0x2a, 0x80, 0xc0, 0x90, 0x70, 0x10, 0xe0, 0xff, 0x90, 0x70, 0x32, 
+0xe0, 0x4f, 0x90, 0x05, 0x00, 0xf0, 0xe5, 0x58, 0x54, 0x0f, 0x60, 0x04, 0x7f, 0x17, 0x80, 0x02, 
+0x7f, 0x11, 0x90, 0x05, 0x01, 0xef, 0xf0, 0xa3, 0x74, 0x01, 0xf0, 0x74, 0x03, 0xf0, 0xff, 0x12, 
+0x0d, 0x2a, 0x90, 0x10, 0x00, 0xe0, 0x90, 0x10, 0x2c, 0xf0, 0x90, 0x10, 0x2f, 0x74, 0x7f, 0xf0, 
+0xe4, 0xfd, 0xaf, 0x56, 0x12, 0x0b, 0x91, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 
+0x13, 0xf0, 0x22, 0x90, 0x70, 0x10, 0xe0, 0x24, 0xff, 0x92, 0x4a, 0xd2, 0x05, 0xad, 0x57, 0xaf, 
+0x56, 0x12, 0x0b, 0x91, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 
+0x56, 0xf4, 0x60, 0x79, 0x80, 0x70, 0x90, 0x70, 0x10, 0xe0, 0x24, 0xff, 0x92, 0x16, 0x90, 0x70, 
+0x11, 0xe0, 0xf5, 0x5c, 0xad, 0x57, 0xaf, 0x56, 0x12, 0x0b, 0x91, 0x90, 0x04, 0x14, 0x74, 0x80, 
+0xf0, 0x90, 0x70, 0x30, 0xe5, 0x5a, 0xf0, 0xa3, 0xe5, 0x5b, 0xf0, 0xe4, 0xf5, 0x5a, 0xf5, 0x5b, 
+0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x60, 0x44, 0x80, 0x3b, 0x90, 0x70, 0x11, 0xe0, 0x24, 
+0xff, 0x92, 0x17, 0x90, 0x70, 0x10, 0xe0, 0xf5, 0x5d, 0xad, 0x57, 0xaf, 0x56, 0x12, 0x0b, 0x91, 
+0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0x30, 0x17, 0x13, 0x90, 0x10, 0x00, 0xe0, 0x90, 0x10, 0x2c, 
+0xf0, 0x90, 0x10, 0x2f, 0xe0, 0x54, 0xf0, 0xf5, 0x57, 0x45, 0x5d, 0xf0, 0xe4, 0x90, 0x70, 0x13, 
+0xf0, 0xe5, 0x56, 0xf4, 0x60, 0x07, 0x90, 0x70, 0x25, 0xe0, 0x44, 0x01, 0xf0, 0x22, 0x22, 0xe5, 
+0x3e, 0x45, 0x3d, 0x60, 0x0a, 0xe5, 0x3e, 0x15, 0x3e, 0x70, 0x0a, 0x15, 0x3d, 0x80, 0x06, 0x75, 
+0x3d, 0x03, 0x75, 0x3e, 0x1f, 0xe5, 0x3e, 0x45, 0x3d, 0x60, 0x03, 0x02, 0x16, 0xfd, 0xe5, 0x2a, 
+0x70, 0x03, 0x02, 0x16, 0xfd, 0x74, 0xa0, 0x25, 0x2f, 0xf5, 0x82, 0xe4, 0x34, 0x4c, 0xf5, 0x83, 
+0xe0, 0x60, 0x7a, 0x7f, 0x7e, 0x12, 0x17, 0xe9, 0xef, 0x54, 0xfe, 0x44, 0x02, 0xfd, 0x7f, 0x7e, 
+0x12, 0x17, 0xcf, 0xe5, 0x2f, 0x7f, 0x00, 0x25, 0xe0, 0xfe, 0xef, 0x24, 0x00, 0xf5, 0x82, 0x74, 
+0x4d, 0x3e, 0xaf, 0x82, 0x90, 0x4c, 0xa8, 0xf0, 0xa3, 0xef, 0xf0, 0xe4, 0xf5, 0x56, 0xf5, 0x57, 
+0x7f, 0x7f, 0x12, 0x17, 0xe9, 0x90, 0x4c, 0xa8, 0xe0, 0xfa, 0xa3, 0xe0, 0x25, 0x57, 0xf5, 0x82, 
+0xea, 0x35, 0x56, 0xf5, 0x83, 0xef, 0xf0, 0x05, 0x57, 0xe5, 0x57, 0x70, 0x02, 0x05, 0x56, 0xc3, 
+0x94, 0x80, 0xe5, 0x56, 0x94, 0x01, 0x40, 0xd8, 0x7f, 0x7e, 0x12, 0x17, 0xe9, 0xef, 0x44, 0x03, 
+0xfd, 0x7f, 0x7e, 0x12, 0x17, 0xcf, 0x74, 0xa0, 0x25, 0x2f, 0xf5, 0x82, 0xe4, 0x34, 0x4c, 0xf5, 
+0x83, 0xe4, 0xf0, 0x05, 0x2f, 0xe5, 0x2f, 0xb4, 0x08, 0x03, 0xe4, 0xf5, 0x2f, 0xe5, 0x3b, 0x60, 
+0x04, 0x15, 0x3b, 0x80, 0x03, 0x75, 0x3b, 0xfe, 0xe5, 0x3b, 0x70, 0x08, 0x20, 0x07, 0x05, 0x30, 
+0x1b, 0x02, 0xd2, 0x07, 0xe5, 0x53, 0x70, 0x1a, 0x30, 0x60, 0x09, 0xb2, 0x4d, 0x30, 0x4d, 0x04, 
+0x05, 0x46, 0xc2, 0x04, 0xe5, 0x4f, 0x45, 0x4e, 0x60, 0x08, 0xe5, 0x4f, 0x15, 0x4f, 0x70, 0x02, 
+0x15, 0x4e, 0x22, 0x22, 0xc2, 0x42, 0xd3, 0x22, 0x30, 0x14, 0x30, 0x90, 0x70, 0x19, 0xe0, 0x55, 
+0x3f, 0xff, 0x90, 0x70, 0x18, 0xe0, 0x4f, 0xf5, 0x3f, 0x90, 0x02, 0x29, 0xe0, 0xff, 0x90, 0x70, 
+0x19, 0xe0, 0xfe, 0xef, 0x5e, 0x90, 0x02, 0x29, 0xf0, 0x30, 0x47, 0x04, 0xaf, 0x3f, 0x80, 0x04, 
+0xe5, 0x3f, 0xf4, 0xff, 0x90, 0x02, 0x28, 0xef, 0xf0, 0xc2, 0x14, 0x30, 0x16, 0x60, 0xc2, 0xaf, 
+0x90, 0x10, 0x04, 0xe0, 0xf5, 0x57, 0x90, 0x02, 0x28, 0xe0, 0x54, 0x05, 0xf5, 0x57, 0xe5, 0x5c, 
+0x64, 0x01, 0x70, 0x21, 0xe5, 0x57, 0x90, 0x10, 0x04, 0x30, 0xe0, 0x06, 0xe0, 0x54, 0xfb, 0xf0, 
+0x80, 0x04, 0xe0, 0x44, 0x04, 0xf0, 0xe5, 0x57, 0x30, 0xe2, 0x31, 0x05, 0x5b, 0xe5, 0x5b, 0x70, 
+0x2b, 0x05, 0x5a, 0x80, 0x27, 0xe5, 0x57, 0x30, 0xe0, 0x1b, 0xe5, 0x5c, 0x90, 0x10, 0x04, 0x70, 
+0x06, 0xe0, 0x54, 0xfb, 0xf0, 0x80, 0x04, 0xe0, 0x44, 0x04, 0xf0, 0x05, 0x5b, 0xe5, 0x5b, 0x70, 
+0x0b, 0x05, 0x5a, 0x80, 0x07, 0x90, 0x10, 0x04, 0xe0, 0x44, 0x04, 0xf0, 0xd2, 0xaf, 0x22, 0x90, 
+0x10, 0x1c, 0xed, 0xf0, 0xa3, 0xef, 0xf0, 0xa3, 0x74, 0x0a, 0xf0, 0x90, 0x10, 0x1c, 0xe0, 0xf5, 
+0x58, 0x90, 0x10, 0x1e, 0xe0, 0x20, 0xe1, 0xf3, 0x22, 0x90, 0x10, 0x1d, 0xef, 0xf0, 0xa3, 0x74, 
+0x0b, 0xf0, 0x90, 0x10, 0x1c, 0xe0, 0xf5, 0x58, 0x90, 0x10, 0x1e, 0xe0, 0x20, 0xe1, 0xf3, 0xaf, 
+0x58, 0x22, 0xc2, 0x4b, 0xc2, 0x4c, 0xe5, 0x44, 0x12, 0x0a, 0x9d, 0x18, 0x24, 0x00, 0x18, 0xb2, 
+0x04, 0x18, 0xae, 0x08, 0x18, 0x8e, 0x10, 0x18, 0x38, 0x20, 0x18, 0x58, 0x60, 0x18, 0x69, 0xa0, 
+0x00, 0x00, 0x18, 0xb4, 0x85, 0x48, 0x43, 0x85, 0x4a, 0x42, 0x85, 0x4c, 0x5e, 0xe5, 0x47, 0x64, 
+0x06, 0x60, 0x03, 0x02, 0x18, 0xb4, 0x80, 0x1b, 0xe5, 0x48, 0xc4, 0x54, 0x0f, 0xf5, 0x43, 0xe5, 
+0x4a, 0xc4, 0x54, 0x0f, 0xf5, 0x42, 0xe5, 0x4c, 0xc4, 0x54, 0x0f, 0xf5, 0x5e, 0xe5, 0x47, 0x64, 
+0x06, 0x70, 0x61, 0x53, 0x43, 0x0f, 0x80, 0x5c, 0x85, 0x49, 0x43, 0x85, 0x4b, 0x42, 0x85, 0x4d, 
+0x5e, 0xe5, 0x47, 0x64, 0x06, 0x70, 0x4d, 0x80, 0x1b, 0xe5, 0x49, 0xc4, 0x54, 0x0f, 0xf5, 0x43, 
+0xe5, 0x4b, 0xc4, 0x54, 0x0f, 0xf5, 0x42, 0xe5, 0x4d, 0xc4, 0x54, 0x0f, 0xf5, 0x5e, 0xe5, 0x47, 
+0x64, 0x06, 0x70, 0x30, 0xe5, 0x43, 0x54, 0x0f, 0x44, 0x10, 0xf5, 0x43, 0x80, 0x26, 0xe5, 0x47, 
+0x64, 0x04, 0x60, 0x05, 0xe5, 0x47, 0xb4, 0x05, 0x06, 0x43, 0x5e, 0x04, 0x75, 0x42, 0x09, 0xe5, 
+0x47, 0xb4, 0x06, 0x10, 0xe5, 0x43, 0x54, 0x0f, 0x44, 0x30, 0xf5, 0x43, 0x80, 0x06, 0xd2, 0x4b, 
+0x80, 0x02, 0xd2, 0x4c, 0xe4, 0xf5, 0x25, 0xe5, 0x42, 0xc4, 0x54, 0xf0, 0xff, 0xe5, 0x43, 0x54, 
+0x0f, 0x4f, 0xf5, 0x5f, 0xd2, 0x60, 0x22, 0xd2, 0x15, 0xe5, 0x47, 0x24, 0xf5, 0x60, 0x0b, 0x24, 
+0xcb, 0x60, 0x07, 0x24, 0x40, 0x70, 0x06, 0xc2, 0x15, 0x22, 0x12, 0x1c, 0x45, 0x12, 0x18, 0xe9, 
+0xc2, 0x15, 0xc2, 0xaf, 0xc2, 0x04, 0xd2, 0xaf, 0x22, 0xc2, 0xaf, 0x90, 0x04, 0x14, 0xe0, 0x54, 
+0x0e, 0x60, 0x04, 0xd2, 0x18, 0x80, 0x08, 0xe5, 0x4e, 0x45, 0x4f, 0x24, 0xff, 0x92, 0x18, 0xd2, 
+0xaf, 0x90, 0x04, 0x14, 0xe0, 0xa2, 0xe4, 0x92, 0x19, 0x74, 0x1e, 0xf0, 0xe5, 0x5f, 0x54, 0x0f, 
+0xf5, 0x2d, 0xe5, 0x25, 0x70, 0x13, 0x30, 0x18, 0x05, 0xe5, 0x5f, 0x20, 0xe5, 0x0b, 0x30, 0x19, 
+0x19, 0xe5, 0x5f, 0x54, 0x30, 0xff, 0xbf, 0x30, 0x11, 0xe5, 0x25, 0x70, 0x05, 0x75, 0x25, 0x0c, 
+0x80, 0x02, 0x15, 0x25, 0xd2, 0x6c, 0xd2, 0x6d, 0x80, 0x0f, 0xe5, 0x5f, 0x30, 0xe6, 0x06, 0xc2, 
+0x6c, 0xd2, 0x6d, 0x80, 0x04, 0xd2, 0x6c, 0xc2, 0x6d, 0xe5, 0x47, 0x64, 0x03, 0x70, 0x21, 0x30, 
+0x4b, 0x06, 0xc2, 0x6c, 0xd2, 0x6d, 0x80, 0x18, 0xe5, 0x25, 0x70, 0x03, 0x30, 0x4c, 0x11, 0xc2, 
+0x4c, 0xe5, 0x25, 0x70, 0x05, 0x75, 0x25, 0x07, 0x80, 0x02, 0x15, 0x25, 0xd2, 0x6c, 0xd2, 0x6d, 
+0xe5, 0x47, 0xb4, 0x09, 0x14, 0xe5, 0x44, 0x20, 0xe3, 0x0b, 0xe5, 0x3a, 0x64, 0x02, 0x60, 0x05, 
+0xe5, 0x3a, 0xb4, 0x03, 0x04, 0xc2, 0x6c, 0xd2, 0x6d, 0xe5, 0x47, 0xb4, 0x0a, 0x13, 0xe5, 0x3a, 
+0xb4, 0x01, 0x06, 0xc2, 0x6c, 0xd2, 0x6d, 0x80, 0x08, 0xe5, 0x3a, 0x70, 0x04, 0xd2, 0x6c, 0xc2, 
+0x6d, 0x20, 0x69, 0x07, 0xe5, 0x5e, 0x20, 0xe0, 0x02, 0xb2, 0x68, 0x20, 0x6b, 0x07, 0xe5, 0x5e, 
+0x20, 0xe1, 0x02, 0xb2, 0x6a, 0x20, 0x6d, 0x07, 0xe5, 0x5e, 0x20, 0xe2, 0x02, 0xb2, 0x6c, 0x75, 
+0x2e, 0x40, 0x20, 0x69, 0x04, 0xa2, 0x68, 0x80, 0x26, 0x30, 0x68, 0x06, 0xe5, 0x46, 0xa2, 0xe2, 
+0x80, 0x1d, 0xe5, 0x5e, 0x20, 0xe0, 0x04, 0x7f, 0x01, 0x80, 0x02, 0x7f, 0x00, 0xe5, 0x46, 0x54, 
+0xf0, 0xfe, 0xbe, 0xf0, 0x04, 0x7e, 0x01, 0x80, 0x02, 0x7e, 0x00, 0xee, 0x6f, 0x24, 0xff, 0x92, 
+0x73, 0x92, 0x72, 0x20, 0x6b, 0x04, 0xa2, 0x6a, 0x80, 0x26, 0x30, 0x6a, 0x06, 0xe5, 0x46, 0xa2, 
+0xe2, 0x80, 0x1d, 0xe5, 0x5e, 0x20, 0xe1, 0x04, 0x7f, 0x01, 0x80, 0x02, 0x7f, 0x00, 0xe5, 0x46, 
+0x54, 0xf0, 0xfe, 0xbe, 0xf0, 0x04, 0x7e, 0x01, 0x80, 0x02, 0x7e, 0x00, 0xee, 0x6f, 0x24, 0xff, 
+0x92, 0x75, 0x92, 0x74, 0x20, 0x6d, 0x04, 0xa2, 0x6c, 0x80, 0x26, 0xe5, 0x47, 0x64, 0x0a, 0x70, 
+0x22, 0x30, 0x6c, 0x06, 0xe5, 0x46, 0xa2, 0xe3, 0x80, 0x17, 0xe5, 0x3a, 0xb4, 0x01, 0x06, 0xe5, 
+0x46, 0xa2, 0xe3, 0x80, 0x34, 0xe5, 0x46, 0x20, 0xe4, 0x03, 0x30, 0xe5, 0x03, 0xd3, 0x80, 0x01, 
+0xc3, 0x80, 0x26, 0x30, 0x6c, 0x06, 0xe5, 0x46, 0xa2, 0xe2, 0x80, 0x1d, 0xe5, 0x5e, 0x20, 0xe2, 
+0x04, 0x7f, 0x01, 0x80, 0x02, 0x7f, 0x00, 0xe5, 0x46, 0x54, 0xf0, 0xfe, 0xbe, 0xf0, 0x04, 0x7e, 
+0x01, 0x80, 0x02, 0x7e, 0x00, 0xee, 0x6f, 0x24, 0xff, 0x92, 0x71, 0x92, 0x70, 0x90, 0x10, 0x00, 
+0xe0, 0x90, 0x10, 0x2c, 0xf0, 0x90, 0x10, 0x03, 0xe0, 0xc3, 0x94, 0x30, 0x40, 0x19, 0xe0, 0x64, 
+0x32, 0x60, 0x14, 0xa2, 0x71, 0x92, 0x77, 0xa2, 0x70, 0x92, 0x76, 0xe5, 0x2e, 0x13, 0x13, 0x54, 
+0x3f, 0xf5, 0x2e, 0xc2, 0x77, 0xd2, 0x76, 0x30, 0x17, 0x0d, 0x53, 0x2e, 0xf0, 0xe5, 0x2e, 0x45, 
+0x5d, 0x90, 0x10, 0x2f, 0xf0, 0x80, 0x06, 0x90, 0x10, 0x2f, 0xe5, 0x2e, 0xf0, 0xe5, 0x47, 0x64, 
+0x06, 0x70, 0x47, 0x90, 0x02, 0x28, 0xe0, 0x30, 0x47, 0x03, 0xff, 0x80, 0x02, 0xf4, 0xff, 0x8f, 
+0x3f, 0x90, 0x02, 0x29, 0xe0, 0x54, 0xfe, 0xf0, 0xe5, 0x43, 0xc4, 0x54, 0x0f, 0x14, 0x60, 0x0c, 
+0x24, 0xfe, 0x60, 0x0c, 0x24, 0x03, 0x70, 0x13, 0xc2, 0xf8, 0x80, 0x0f, 0xd2, 0xf8, 0x80, 0x0b, 
+0xe5, 0x46, 0x30, 0xe2, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x92, 0xf8, 0x30, 0x47, 0x05, 0xaf, 0x3f, 
+0x02, 0x1c, 0x3f, 0xe5, 0x3f, 0xf4, 0xff, 0x02, 0x1c, 0x3f, 0xe5, 0x47, 0x64, 0x07, 0x60, 0x0f, 
+0xe5, 0x47, 0x64, 0x08, 0x60, 0x09, 0xe5, 0x47, 0x64, 0x09, 0x60, 0x03, 0x02, 0x1b, 0xad, 0x90, 
+0x02, 0x28, 0xe0, 0x30, 0x47, 0x03, 0xff, 0x80, 0x02, 0xf4, 0xff, 0x8f, 0x3f, 0x90, 0x02, 0x29, 
+0xe0, 0x54, 0xfc, 0xf0, 0xe5, 0x3a, 0x14, 0x60, 0x22, 0x14, 0x60, 0x25, 0x14, 0x60, 0x2d, 0x24, 
+0xfc, 0x60, 0x49, 0x24, 0xf9, 0x60, 0x14, 0x24, 0x0e, 0x70, 0x50, 0xe5, 0x46, 0x13, 0x13, 0x54, 
+0x3f, 0x75, 0xf0, 0x03, 0x84, 0xe5, 0xf0, 0x24, 0xff, 0x80, 0x3a, 0xd2, 0xf9, 0xc2, 0xf8, 0x80, 
+0x3e, 0xe5, 0x46, 0x30, 0xe2, 0x03, 0xd3, 0x80, 0x1d, 0xc3, 0x80, 0x1a, 0xe5, 0x46, 0x30, 0xe2, 
+0x0d, 0x54, 0x38, 0xc3, 0x94, 0x30, 0x50, 0x06, 0x7e, 0x00, 0x7f, 0x01, 0x80, 0x04, 0x7e, 0x00, 
+0x7f, 0x00, 0xee, 0x4f, 0x24, 0xff, 0x92, 0xf8, 0xc2, 0xf9, 0x80, 0x13, 0xe5, 0x46, 0x30, 0xe2, 
+0x03, 0xd3, 0x80, 0x01, 0xc3, 0x92, 0xf9, 0xc2, 0xf8, 0x80, 0x04, 0xc2, 0xf8, 0xc2, 0xf9, 0x30, 
+0x47, 0x04, 0xaf, 0x3f, 0x80, 0x04, 0xe5, 0x3f, 0xf4, 0xff, 0x02, 0x1c, 0x3f, 0xe5, 0x47, 0x64, 
+0x0c, 0x60, 0x09, 0xe5, 0x47, 0x64, 0x0b, 0x60, 0x03, 0x02, 0x1c, 0x44, 0x90, 0x02, 0x28, 0xe0, 
+0x30, 0x47, 0x03, 0xff, 0x80, 0x02, 0xf4, 0xff, 0x8f, 0x3f, 0x90, 0x02, 0x29, 0xe0, 0x54, 0xfd, 
+0xf0, 0xe5, 0x3a, 0x14, 0x60, 0x20, 0x14, 0x60, 0x21, 0x14, 0x60, 0x2b, 0x24, 0xfc, 0x60, 0x45, 
+0x24, 0xf9, 0x60, 0x12, 0x24, 0x0e, 0x70, 0x4a, 0xe5, 0x46, 0x13, 0x13, 0x54, 0x3f, 0x75, 0xf0, 
+0x03, 0x84, 0xe5, 0xf0, 0x80, 0x29, 0xd2, 0xf9, 0x80, 0x3a, 0xe5, 0x46, 0x30, 0xe2, 0x03, 0xd3, 
+0x80, 0x01, 0xc3, 0x92, 0xf9, 0x80, 0x2d, 0xe5, 0x46, 0x30, 0xe2, 0x0d, 0x54, 0x38, 0xc3, 0x94, 
+0x30, 0x50, 0x06, 0x7e, 0x00, 0x7f, 0x01, 0x80, 0x04, 0x7e, 0x00, 0x7f, 0x00, 0xee, 0x4f, 0x24, 
+0xff, 0x92, 0xf9, 0x80, 0x0f, 0xe5, 0x46, 0x30, 0xe2, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x92, 0xf9, 
+0x80, 0x02, 0xc2, 0xf9, 0x30, 0x47, 0x04, 0xaf, 0x3f, 0x80, 0x04, 0xe5, 0x3f, 0xf4, 0xff, 0x90, 
+0x02, 0x28, 0xef, 0xf0, 0x22, 0xe5, 0x47, 0xb4, 0x0b, 0x10, 0x90, 0x02, 0x29, 0xe0, 0x54, 0xeb, 
+0xf0, 0xe5, 0x3f, 0x54, 0xeb, 0x45, 0x45, 0xf5, 0x3f, 0x22, 0xe4, 0x90, 0x02, 0x29, 0xf0, 0x30, 
+0x47, 0x04, 0xaf, 0x45, 0x80, 0x04, 0xe5, 0x45, 0xf4, 0xff, 0x90, 0x02, 0x28, 0xef, 0xf0, 0x22, 
+0x8f, 0x50, 0xd2, 0x59, 0x22, 0x8f, 0x54, 0xd2, 0x58, 0x22, 0xe4, 0xf5, 0x62, 0xc2, 0xaf, 0xe5, 
+0x51, 0x14, 0x60, 0x4b, 0x14, 0x60, 0x6c, 0x24, 0x02, 0x60, 0x03, 0x02, 0x1d, 0x87, 0xd2, 0x59, 
+0x75, 0x55, 0x01, 0x90, 0x02, 0xa2, 0xe0, 0x54, 0x7f, 0xf0, 0xa3, 0xe0, 0x20, 0xe7, 0x23, 0x90, 
+0x04, 0x34, 0xe0, 0xb4, 0x02, 0x1c, 0xa3, 0xe0, 0xb4, 0x02, 0x17, 0xa3, 0xe0, 0xb4, 0x02, 0x12, 
+0x7f, 0x20, 0x12, 0x1c, 0x70, 0x90, 0x10, 0x04, 0xe0, 0x54, 0xf3, 0xf0, 0x75, 0x51, 0x01, 0x02, 
+0x1d, 0x87, 0xe5, 0x50, 0x60, 0x03, 0x02, 0x1d, 0x87, 0x75, 0x62, 0x03, 0x02, 0x1d, 0x87, 0x90, 
+0x12, 0x00, 0xe0, 0x54, 0x03, 0x70, 0x12, 0x7f, 0x20, 0x12, 0x1c, 0x70, 0x90, 0x02, 0xa2, 0xe0, 
+0x54, 0xbf, 0xf0, 0x75, 0x51, 0x02, 0x02, 0x1d, 0x87, 0xe5, 0x50, 0x60, 0x03, 0x02, 0x1d, 0x87, 
+0x02, 0x1d, 0x82, 0x90, 0x02, 0xa3, 0xe0, 0x30, 0xe6, 0x03, 0x02, 0x1d, 0x7e, 0x90, 0x04, 0x37, 
+0xe0, 0x64, 0x22, 0x70, 0x79, 0x90, 0x01, 0x8a, 0x74, 0x7e, 0xf0, 0x90, 0x01, 0x96, 0xf0, 0x90, 
+0x12, 0x04, 0x74, 0x0a, 0xf0, 0x90, 0x13, 0x28, 0xe0, 0x90, 0x70, 0x1a, 0xf0, 0x90, 0x13, 0x29, 
+0xe0, 0x90, 0x70, 0x1b, 0xf0, 0x90, 0x13, 0x2b, 0xe0, 0x90, 0x70, 0x22, 0xf0, 0x90, 0x13, 0x28, 
+0xe0, 0x54, 0xf0, 0xf0, 0xa3, 0xe0, 0x54, 0xf0, 0xf0, 0x90, 0x13, 0x2b, 0xe0, 0x54, 0xcc, 0xf0, 
+0xe5, 0x58, 0x30, 0xe3, 0x13, 0xe5, 0x3c, 0xf4, 0x90, 0x13, 0x2a, 0x60, 0x05, 0xe0, 0x54, 0xf3, 
+0x80, 0x11, 0xe0, 0x54, 0xfb, 0xf0, 0x80, 0x14, 0xe5, 0x3c, 0xf4, 0x90, 0x13, 0x2a, 0x60, 0x08, 
+0xe0, 0x54, 0xf2, 0x45, 0x3c, 0xf0, 0x80, 0x04, 0xe0, 0x54, 0xfa, 0xf0, 0x90, 0x04, 0x01, 0xe0, 
+0x54, 0xfd, 0xf0, 0x75, 0x62, 0x01, 0x75, 0x55, 0x02, 0xe4, 0xf5, 0x51, 0x80, 0x09, 0xe5, 0x50, 
+0x70, 0x05, 0x75, 0x62, 0x03, 0xf5, 0x51, 0xe5, 0x62, 0x60, 0x15, 0xc2, 0x01, 0xe4, 0xf5, 0x51, 
+0xc2, 0x59, 0xad, 0x62, 0xaf, 0x40, 0x12, 0x1e, 0x54, 0xe5, 0x62, 0xb4, 0x03, 0x02, 0xd2, 0x03, 
+0xd2, 0xaf, 0x22, 0xc2, 0xaf, 0x30, 0x01, 0x12, 0xe4, 0x90, 0x01, 0x96, 0xf0, 0xf5, 0x51, 0xc2, 
+0x59, 0xc2, 0x01, 0x7d, 0x02, 0xaf, 0x40, 0x12, 0x1e, 0x54, 0xe5, 0x52, 0x14, 0x60, 0x0c, 0x04, 
+0x60, 0x03, 0x02, 0x1e, 0x51, 0x75, 0x52, 0x01, 0x75, 0x55, 0x03, 0x90, 0x04, 0x01, 0xe0, 0x44, 
+0x0e, 0xf0, 0xe5, 0x58, 0x54, 0x18, 0x60, 0x1e, 0x90, 0x70, 0x1a, 0xe0, 0x90, 0x13, 0x28, 0xf0, 
+0x90, 0x70, 0x1b, 0xe0, 0x90, 0x13, 0x29, 0xf0, 0xa3, 0x74, 0x05, 0xf0, 0x90, 0x70, 0x22, 0xe0, 
+0x90, 0x13, 0x2b, 0xf0, 0x80, 0x11, 0x90, 0x13, 0x28, 0xe0, 0x44, 0x0f, 0xf0, 0xa3, 0xe0, 0x44, 
+0x0f, 0xf0, 0xa3, 0xe0, 0x44, 0x05, 0xf0, 0x90, 0x12, 0x04, 0x74, 0x03, 0xf0, 0xe5, 0x58, 0x30, 
+0xe3, 0x16, 0x90, 0x05, 0x00, 0x74, 0x80, 0xf0, 0xa3, 0x74, 0x08, 0xf0, 0xa3, 0x74, 0x01, 0xf0, 
+0x74, 0x03, 0xf0, 0x7f, 0x01, 0x12, 0x0d, 0x2a, 0x90, 0x02, 0xa2, 0xe0, 0x44, 0xc0, 0xf0, 0x90, 
+0x10, 0x04, 0xe0, 0x44, 0x0c, 0xf0, 0xe4, 0xf5, 0x52, 0xf5, 0x55, 0x30, 0x02, 0x09, 0xc2, 0x02, 
+0x7d, 0x01, 0xaf, 0x41, 0x12, 0x1e, 0x54, 0x30, 0x03, 0x02, 0xc2, 0x03, 0xe4, 0x90, 0x01, 0x96, 
+0xf0, 0xd2, 0xaf, 0x22, 0xef, 0xf4, 0x60, 0x2d, 0xe4, 0xfe, 0x74, 0x14, 0x2e, 0xf5, 0x82, 0xe4, 
+0x34, 0x70, 0xf5, 0x83, 0xe0, 0xb4, 0xff, 0x19, 0x74, 0x14, 0x2e, 0xf5, 0x82, 0xe4, 0x34, 0x70, 
+0xf5, 0x83, 0xef, 0xf0, 0x74, 0x1c, 0x2e, 0xf5, 0x82, 0xe4, 0x34, 0x70, 0xf5, 0x83, 0xed, 0xf0, 
+0x22, 0x0e, 0xbe, 0x04, 0xd5, 0x22, 0x22, 0x22, 0x90, 0x70, 0x2a, 0xe0, 0x30, 0xe1, 0x4d, 0xc2, 
+0xaf, 0x90, 0x70, 0x28, 0xe0, 0x90, 0x10, 0x1c, 0xf0, 0x90, 0x70, 0x29, 0xe0, 0x90, 0x10, 0x1d, 
+0xf0, 0x90, 0x70, 0x2a, 0xe0, 0x90, 0x10, 0x1e, 0xf0, 0x90, 0x10, 0x1c, 0xe0, 0xf5, 0x62, 0x90, 
+0x10, 0x1e, 0xe0, 0x20, 0xe1, 0xf3, 0x90, 0x10, 0x1c, 0xe0, 0x90, 0x70, 0x28, 0xf0, 0x90, 0x10, 
+0x1d, 0xe0, 0x90, 0x70, 0x29, 0xf0, 0x90, 0x10, 0x1e, 0xe0, 0x90, 0x70, 0x2a, 0xf0, 0x30, 0x4a, 
+0x07, 0x90, 0x70, 0x24, 0xe0, 0x44, 0x01, 0xf0, 0xc2, 0x05, 0xd2, 0xaf, 0x22, 0xc2, 0xaf, 0x7d, 
+0x01, 0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x7f, 0xb9, 0x12, 0x17, 0xe9, 0xef, 0x64, 0x01, 0x60, 0x03, 
+0x02, 0x1f, 0xd3, 0xd3, 0x90, 0x4c, 0xb3, 0xe0, 0x95, 0x27, 0x90, 0x4c, 0xb2, 0xe0, 0x95, 0x26, 
+0x40, 0x11, 0x90, 0x4c, 0xb1, 0xe0, 0x04, 0xf0, 0x90, 0x4c, 0xb8, 0xe0, 0x60, 0x1a, 0xe0, 0x14, 
+0xf0, 0x80, 0x15, 0x90, 0x4c, 0xb9, 0xe0, 0xff, 0x90, 0x4c, 0xb8, 0xe0, 0xc3, 0x9f, 0x50, 0x08, 
+0x90, 0x4c, 0xb9, 0xe0, 0x90, 0x4c, 0xb8, 0xf0, 0xe4, 0xf5, 0x26, 0xf5, 0x27, 0x7d, 0x05, 0x7f, 
+0xb8, 0x12, 0x17, 0xcf, 0x90, 0x4c, 0xb0, 0xe0, 0xfd, 0x7f, 0xb9, 0x12, 0x17, 0xcf, 0x7d, 0x02, 
+0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x90, 0x4c, 0xbb, 0xe0, 0xfd, 0x7f, 0xb9, 0x12, 0x17, 0xcf, 0x7d, 
+0x03, 0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x90, 0x4c, 0xbc, 0xe0, 0xfd, 0x7f, 0xb9, 0x12, 0x17, 0xcf, 
+0x7d, 0x04, 0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x90, 0x4c, 0xbd, 0xe0, 0xfd, 0x7f, 0xb9, 0x12, 0x17, 
+0xcf, 0x7d, 0x09, 0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x90, 0x4c, 0xb7, 0xe0, 0xfd, 0x7f, 0xb9, 0x12, 
+0x17, 0xcf, 0x7d, 0x08, 0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x90, 0x4c, 0xb6, 0xe0, 0xfd, 0x7f, 0xb9, 
+0x12, 0x17, 0xcf, 0x7d, 0x07, 0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x90, 0x4c, 0xb5, 0xe0, 0xfd, 0x7f, 
+0xb9, 0x12, 0x17, 0xcf, 0x7d, 0x06, 0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x90, 0x4c, 0xb4, 0xe0, 0xfd, 
+0x7f, 0xb9, 0x12, 0x17, 0xcf, 0x7d, 0x01, 0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x7d, 0x01, 0x7f, 0xb9, 
+0x12, 0x17, 0xcf, 0xe4, 0xfd, 0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x7d, 0x01, 0x7f, 0xb9, 0x12, 0x17, 
+0xcf, 0x80, 0x08, 0x05, 0x27, 0xe5, 0x27, 0x70, 0x02, 0x05, 0x26, 0xc2, 0x07, 0xd2, 0xaf, 0x22, 
+0x22, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x1c, 0x62, 
+0xff, 0xff, 0xff, 0x02, 0x10, 0x28, 0x02, 0x10, 0x3b, 0x02, 0x10, 0x86, 0x02, 0x16, 0x4e, 0x02, 
+0x16, 0x4f, 0x02, 0x17, 0x33, 0x02, 0x17, 0x38, 0x12, 0x17, 0x34, 0x22, 0x02, 0x1c, 0x7a, 0x02, 
+0x1d, 0xa3, 0x02, 0x18, 0xc7, 0x02, 0x18, 0x02, 0x30, 0x05, 0x06, 0x20, 0x0d, 0x03, 0x12, 0x1e, 
+0x88, 0x30, 0x07, 0x06, 0x20, 0x0f, 0x03, 0x12, 0x1e, 0xdd, 0x22, 0x90, 0x01, 0x8c, 0xe0, 0x30, 
+0xe3, 0x20, 0xe5, 0x58, 0x30, 0xe0, 0x10, 0xe5, 0x4c, 0x30, 0xe0, 0x04, 0x7f, 0x40, 0x80, 0x02, 
+0x7f, 0x00, 0x90, 0x10, 0x2f, 0xef, 0xf0, 0x90, 0x01, 0x8c, 0x74, 0x08, 0xf0, 0xe4, 0x90, 0x01, 
+0xa7, 0xf0, 0x90, 0x01, 0x8c, 0xe0, 0x30, 0xe0, 0x1c, 0x90, 0x01, 0x80, 0xe0, 0xb4, 0x02, 0x15, 
+0xa3, 0xe0, 0xb4, 0x01, 0x10, 0x90, 0x01, 0x84, 0xe0, 0xb4, 0x81, 0x09, 0x90, 0x01, 0x8c, 0x74, 
+0x01, 0xf0, 0x12, 0x0d, 0xdd, 0x22, 0x90, 0x04, 0x14, 0xe0, 0x20, 0xe7, 0x03, 0x02, 0x16, 0x4d, 
+0x90, 0x70, 0x12, 0xe0, 0xf5, 0x56, 0x90, 0x04, 0x04, 0xe0, 0x12, 0x0a, 0xb6, 0x10, 0xf9, 0x31, 
+0x10, 0xdd, 0x36, 0x11, 0x22, 0x50, 0x11, 0x59, 0x51, 0x11, 0x62, 0x52, 0x11, 0x62, 0x53, 0x11, 
+0x62, 0x54, 0x11, 0xa3, 0x55, 0x11, 0xf2, 0x56, 0x13, 0x49, 0x64, 0x12, 0x50, 0x65, 0x13, 0x0f, 
+0x66, 0x13, 0x75, 0x70, 0x13, 0xa0, 0x71, 0x13, 0xce, 0x72, 0x14, 0x92, 0x73, 0x14, 0xb7, 0x74, 
+0x15, 0xb3, 0x80, 0x15, 0xd6, 0x90, 0x16, 0x0b, 0x91, 0x00, 0x00, 0x16, 0x4d, 0x90, 0x70, 0x11, 
+0xe0, 0xf5, 0x3c, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe5, 0x56, 
+0xf4, 0x70, 0x03, 0x02, 0x16, 0x4d, 0x02, 0x16, 0x46, 0x20, 0x02, 0x03, 0x30, 0x03, 0x1d, 0x7d, 
+0x02, 0xaf, 0x56, 0x12, 0x0b, 0xaa, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 
+0xf0, 0xe5, 0x56, 0xf4, 0x70, 0x03, 0x02, 0x16, 0x4d, 0x02, 0x16, 0x46, 0x85, 0x56, 0x41, 0xd2, 
+0x02, 0x22, 0x90, 0x70, 0x10, 0xe0, 0x54, 0x7f, 0xff, 0xbf, 0x0a, 0x0d, 0x90, 0x70, 0x11, 0xe0, 
+0xb4, 0x08, 0x06, 0x75, 0x4e, 0x01, 0x75, 0x4f, 0x84, 0x90, 0x70, 0x10, 0xe0, 0x54, 0x7f, 0xff, 
+0xbf, 0x02, 0x12, 0x90, 0x70, 0x11, 0xe0, 0x64, 0x08, 0x60, 0x04, 0xe0, 0xb4, 0x20, 0x06, 0x75, 
+0x4e, 0x03, 0x75, 0x4f, 0x20, 0xe4, 0xf5, 0x3f, 0x22, 0x90, 0x70, 0x11, 0xe0, 0x24, 0xff, 0x92, 
+0x47, 0x22, 0x90, 0x04, 0x04, 0xe0, 0x25, 0xe0, 0x24, 0x5d, 0xf5, 0x57, 0x90, 0x70, 0x10, 0xe0, 
+0xff, 0x74, 0x47, 0x25, 0x57, 0xf8, 0xc6, 0xef, 0xc6, 0x90, 0x70, 0x11, 0xe0, 0xff, 0x74, 0x48, 
+0x25, 0x57, 0xf8, 0xc6, 0xef, 0xc6, 0xe4, 0xfd, 0xaf, 0x56, 0x12, 0x0b, 0xaa, 0x90, 0x04, 0x14, 
+0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x70, 0x03, 0x02, 0x16, 0x4d, 
+0x02, 0x16, 0x46, 0xe5, 0x47, 0x64, 0x07, 0x60, 0x1d, 0xe5, 0x47, 0x64, 0x08, 0x60, 0x17, 0xe5, 
+0x47, 0x64, 0x09, 0x60, 0x11, 0xe5, 0x47, 0x64, 0x0a, 0x60, 0x0b, 0xe5, 0x47, 0x64, 0x0b, 0x60, 
+0x05, 0xe5, 0x47, 0xb4, 0x0c, 0x08, 0x90, 0x70, 0x11, 0xe0, 0x54, 0x0f, 0xf5, 0x3a, 0xe5, 0x47, 
+0xb4, 0x09, 0x08, 0xe5, 0x3a, 0xb4, 0x03, 0x03, 0xe4, 0xf5, 0x46, 0xe5, 0x47, 0xb4, 0x0a, 0x08, 
+0xe5, 0x3a, 0xb4, 0x01, 0x03, 0xe4, 0xf5, 0x46, 0xe4, 0xfd, 0xaf, 0x56, 0x12, 0x0b, 0xaa, 0xd2, 
+0x04, 0x22, 0x90, 0x70, 0x11, 0xe0, 0xf4, 0xff, 0x90, 0x70, 0x10, 0xe0, 0x5f, 0xff, 0x90, 0x70, 
+0x11, 0xe0, 0x55, 0x3f, 0x4f, 0x90, 0x70, 0x18, 0xf0, 0x90, 0x70, 0x11, 0xe0, 0x90, 0x70, 0x19, 
+0xf0, 0xe4, 0xfd, 0xaf, 0x56, 0x12, 0x0b, 0xaa, 0x30, 0x15, 0x04, 0xd2, 0x14, 0x80, 0x26, 0x90, 
+0x70, 0x18, 0xe0, 0xf5, 0x3f, 0x90, 0x02, 0x29, 0xe0, 0xff, 0x90, 0x70, 0x19, 0xe0, 0xfe, 0xef, 
+0x5e, 0x90, 0x02, 0x29, 0xf0, 0x30, 0x47, 0x04, 0xaf, 0x3f, 0x80, 0x04, 0xe5, 0x3f, 0xf4, 0xff, 
+0x90, 0x02, 0x28, 0xef, 0xf0, 0xe5, 0x56, 0xf4, 0x70, 0x03, 0x02, 0x16, 0x4d, 0x02, 0x16, 0x46, 
+0x90, 0x70, 0x10, 0xe0, 0x13, 0x92, 0x1b, 0xad, 0x57, 0xaf, 0x56, 0x12, 0x0b, 0xaa, 0x90, 0x04, 
+0x14, 0x74, 0x80, 0xf0, 0x20, 0x1b, 0x03, 0x02, 0x12, 0xff, 0x7d, 0x05, 0x7f, 0xb8, 0x12, 0x17, 
+0xcf, 0x7f, 0xb9, 0x12, 0x17, 0xe9, 0x90, 0x4c, 0xb0, 0xef, 0xf0, 0x7d, 0x02, 0x7f, 0xb8, 0x12, 
+0x17, 0xcf, 0x7f, 0xb9, 0x12, 0x17, 0xe9, 0x90, 0x4c, 0xbb, 0xef, 0xf0, 0x7d, 0x03, 0x7f, 0xb8, 
+0x12, 0x17, 0xcf, 0x7f, 0xb9, 0x12, 0x17, 0xe9, 0x90, 0x4c, 0xbc, 0xef, 0xf0, 0x7d, 0x02, 0x7f, 
+0xb8, 0x12, 0x17, 0xcf, 0x7f, 0xb9, 0x12, 0x17, 0xe9, 0x90, 0x4c, 0xbd, 0xef, 0xf0, 0x7d, 0x09, 
+0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x7f, 0xb9, 0x12, 0x17, 0xe9, 0x90, 0x4c, 0xb7, 0xef, 0xf0, 0x7d, 
+0x08, 0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x7f, 0xb9, 0x12, 0x17, 0xe9, 0x90, 0x4c, 0xb6, 0xef, 0xf0, 
+0x7d, 0x07, 0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x7f, 0xb9, 0x12, 0x17, 0xe9, 0x90, 0x4c, 0xb5, 0xef, 
+0xf0, 0x7d, 0x06, 0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x7f, 0xb9, 0x12, 0x17, 0xe9, 0x90, 0x4c, 0xb4, 
+0xef, 0xf0, 0xe4, 0x90, 0x4c, 0xb1, 0xf0, 0x90, 0x4c, 0xb9, 0xe0, 0x90, 0x4c, 0xb8, 0xf0, 0xe4, 
+0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x70, 0x03, 0x02, 0x16, 0x4d, 0x02, 0x16, 0x46, 0x90, 
+0x4c, 0xb1, 0xe0, 0x90, 0x4c, 0xbe, 0xf0, 0x90, 0x4c, 0xb8, 0xe0, 0x90, 0x4c, 0xbf, 0xf0, 0xe4, 
+0x90, 0x4c, 0xb1, 0xf0, 0x90, 0x4c, 0xb9, 0xe0, 0x90, 0x4c, 0xb8, 0xf0, 0xad, 0x57, 0xaf, 0x56, 
+0x12, 0x0b, 0xaa, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 
+0xf4, 0x70, 0x03, 0x02, 0x16, 0x4d, 0x02, 0x16, 0x46, 0x90, 0x70, 0x10, 0xe0, 0xf5, 0x2a, 0x75, 
+0x3d, 0x03, 0x75, 0x3e, 0x1f, 0xe4, 0xf5, 0x2f, 0xad, 0x57, 0xaf, 0x56, 0x12, 0x0b, 0xaa, 0x90, 
+0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x70, 0x03, 0x02, 
+0x16, 0x4d, 0x02, 0x16, 0x46, 0x90, 0x70, 0x10, 0xe0, 0xfe, 0x90, 0x70, 0x11, 0xe0, 0xfd, 0xed, 
+0xf8, 0xe6, 0xf5, 0x57, 0xfd, 0xaf, 0x56, 0x12, 0x0b, 0xaa, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 
+0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x70, 0x03, 0x02, 0x16, 0x4d, 0x02, 0x16, 0x46, 
+0x90, 0x70, 0x10, 0xe0, 0xfe, 0x90, 0x70, 0x11, 0xe0, 0xfd, 0xed, 0xf5, 0x82, 0x8e, 0x83, 0xe0, 
+0xf5, 0x57, 0xfd, 0xaf, 0x56, 0x12, 0x0b, 0xaa, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 
+0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x70, 0x03, 0x02, 0x16, 0x4d, 0x02, 0x16, 0x46, 0x90, 0x10, 
+0x00, 0xe0, 0xf5, 0x57, 0xe4, 0xf5, 0x58, 0xf5, 0x59, 0x90, 0x10, 0x03, 0xe0, 0xb4, 0x28, 0x05, 
+0x75, 0x58, 0x01, 0x80, 0x3c, 0x90, 0x10, 0x03, 0xe0, 0xb4, 0x30, 0x05, 0x75, 0x58, 0x02, 0x80, 
+0x30, 0x90, 0x10, 0x03, 0xe0, 0xb4, 0x33, 0x05, 0x75, 0x58, 0x04, 0x80, 0x24, 0x90, 0x10, 0x03, 
+0xe0, 0xb4, 0x35, 0x0c, 0x90, 0x10, 0x02, 0xe0, 0xb4, 0x72, 0x05, 0x75, 0x58, 0x08, 0x80, 0x11, 
+0x90, 0x10, 0x03, 0xe0, 0xb4, 0x35, 0x0a, 0x90, 0x10, 0x02, 0xe0, 0xb4, 0x93, 0x03, 0x75, 0x58, 
+0x10, 0xe5, 0x58, 0x30, 0xe1, 0x19, 0x90, 0x05, 0x08, 0xe0, 0x44, 0x01, 0xf0, 0xfd, 0x90, 0x05, 
+0x05, 0xe0, 0x54, 0xfb, 0xf0, 0x44, 0x04, 0xf0, 0xed, 0x54, 0xfe, 0x90, 0x05, 0x08, 0xf0, 0x75, 
+0x3b, 0x18, 0xe4, 0xf5, 0x26, 0xf5, 0x27, 0xf5, 0x4e, 0xf5, 0x4f, 0x75, 0x3a, 0xff, 0x75, 0x3c, 
+0xff, 0xad, 0x57, 0xaf, 0x56, 0x12, 0x0b, 0xaa, 0x90, 0x70, 0x36, 0x74, 0x37, 0xf0, 0xa3, 0x74, 
+0x32, 0xf0, 0x90, 0x04, 0x01, 0xe0, 0x44, 0x01, 0xf0, 0xc2, 0x16, 0xe4, 0xf5, 0x5c, 0xf5, 0x5a, 
+0xf5, 0x5b, 0x90, 0x70, 0x30, 0xf0, 0xa3, 0xf0, 0xf5, 0x2a, 0xc2, 0x17, 0x90, 0x04, 0x14, 0x74, 
+0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x70, 0x03, 0x02, 0x16, 0x4d, 0x02, 
+0x16, 0x46, 0x90, 0x70, 0x10, 0xe0, 0x24, 0xff, 0x92, 0x93, 0xe4, 0xfd, 0xaf, 0x56, 0x12, 0x0b, 
+0xaa, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x70, 
+0x03, 0x02, 0x16, 0x4d, 0x02, 0x16, 0x46, 0x90, 0x10, 0x00, 0xe0, 0x90, 0x10, 0x2c, 0xf0, 0x90, 
+0x10, 0x2f, 0x74, 0x40, 0xf0, 0x90, 0x70, 0x11, 0xe0, 0x54, 0x7f, 0xf5, 0x57, 0xe0, 0x54, 0x80, 
+0x90, 0x70, 0x32, 0xf0, 0x90, 0x70, 0x10, 0xe0, 0xff, 0xe5, 0x57, 0xd3, 0x9f, 0x40, 0x43, 0x90, 
+0x70, 0x33, 0xe5, 0x57, 0xf0, 0x90, 0x70, 0x10, 0xe0, 0xff, 0x90, 0x70, 0x33, 0xe0, 0xc3, 0x9f, 
+0xd3, 0x94, 0x04, 0x40, 0x73, 0xe0, 0x24, 0xfc, 0xf0, 0xe0, 0xff, 0x90, 0x70, 0x32, 0xe0, 0x4f, 
+0x90, 0x05, 0x00, 0xf0, 0xe5, 0x58, 0x54, 0x0f, 0x60, 0x04, 0x7f, 0x17, 0x80, 0x02, 0x7f, 0x11, 
+0x90, 0x05, 0x01, 0xef, 0xf0, 0xa3, 0x74, 0x01, 0xf0, 0x74, 0x03, 0xf0, 0xff, 0x12, 0x0d, 0x48, 
+0x80, 0xc3, 0x90, 0x70, 0x33, 0xe5, 0x57, 0xf0, 0x90, 0x70, 0x33, 0xe0, 0xff, 0x90, 0x70, 0x10, 
+0xe0, 0xc3, 0x9f, 0xd3, 0x94, 0x04, 0x40, 0x30, 0x90, 0x70, 0x33, 0xe0, 0x24, 0x04, 0xf0, 0xe0, 
+0xff, 0x90, 0x70, 0x32, 0xe0, 0x4f, 0x90, 0x05, 0x00, 0xf0, 0xe5, 0x58, 0x54, 0x0f, 0x60, 0x04, 
+0x7f, 0x17, 0x80, 0x02, 0x7f, 0x11, 0x90, 0x05, 0x01, 0xef, 0xf0, 0xa3, 0x74, 0x01, 0xf0, 0x74, 
+0x03, 0xf0, 0xff, 0x12, 0x0d, 0x48, 0x80, 0xc0, 0x90, 0x70, 0x10, 0xe0, 0xff, 0x90, 0x70, 0x32, 
+0xe0, 0x4f, 0x90, 0x05, 0x00, 0xf0, 0xe5, 0x58, 0x54, 0x0f, 0x60, 0x04, 0x7f, 0x17, 0x80, 0x02, 
+0x7f, 0x11, 0x90, 0x05, 0x01, 0xef, 0xf0, 0xa3, 0x74, 0x01, 0xf0, 0x74, 0x03, 0xf0, 0xff, 0x12, 
+0x0d, 0x48, 0x90, 0x10, 0x00, 0xe0, 0x90, 0x10, 0x2c, 0xf0, 0x90, 0x10, 0x2f, 0x74, 0x7f, 0xf0, 
+0xe4, 0xfd, 0xaf, 0x56, 0x12, 0x0b, 0xaa, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 
+0x13, 0xf0, 0x22, 0x90, 0x70, 0x10, 0xe0, 0x24, 0xff, 0x92, 0x4a, 0xd2, 0x05, 0xad, 0x57, 0xaf, 
+0x56, 0x12, 0x0b, 0xaa, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 
+0x56, 0xf4, 0x60, 0x79, 0x80, 0x70, 0x90, 0x70, 0x10, 0xe0, 0x24, 0xff, 0x92, 0x16, 0x90, 0x70, 
+0x11, 0xe0, 0xf5, 0x5c, 0xad, 0x57, 0xaf, 0x56, 0x12, 0x0b, 0xaa, 0x90, 0x04, 0x14, 0x74, 0x80, 
+0xf0, 0x90, 0x70, 0x30, 0xe5, 0x5a, 0xf0, 0xa3, 0xe5, 0x5b, 0xf0, 0xe4, 0xf5, 0x5a, 0xf5, 0x5b, 
+0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x60, 0x44, 0x80, 0x3b, 0x90, 0x70, 0x11, 0xe0, 0x24, 
+0xff, 0x92, 0x17, 0x90, 0x70, 0x10, 0xe0, 0xf5, 0x5d, 0xad, 0x57, 0xaf, 0x56, 0x12, 0x0b, 0xaa, 
+0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0x30, 0x17, 0x13, 0x90, 0x10, 0x00, 0xe0, 0x90, 0x10, 0x2c, 
+0xf0, 0x90, 0x10, 0x2f, 0xe0, 0x54, 0xf0, 0xf5, 0x57, 0x45, 0x5d, 0xf0, 0xe4, 0x90, 0x70, 0x13, 
+0xf0, 0xe5, 0x56, 0xf4, 0x60, 0x07, 0x90, 0x70, 0x25, 0xe0, 0x44, 0x01, 0xf0, 0x22, 0x22, 0xe5, 
+0x3e, 0x45, 0x3d, 0x60, 0x0a, 0xe5, 0x3e, 0x15, 0x3e, 0x70, 0x0a, 0x15, 0x3d, 0x80, 0x06, 0x75, 
+0x3d, 0x03, 0x75, 0x3e, 0x1f, 0xe5, 0x3e, 0x45, 0x3d, 0x60, 0x03, 0x02, 0x16, 0xfd, 0xe5, 0x2a, 
+0x70, 0x03, 0x02, 0x16, 0xfd, 0x74, 0xa0, 0x25, 0x2f, 0xf5, 0x82, 0xe4, 0x34, 0x4c, 0xf5, 0x83, 
+0xe0, 0x60, 0x7a, 0x7f, 0x7e, 0x12, 0x17, 0xe9, 0xef, 0x54, 0xfe, 0x44, 0x02, 0xfd, 0x7f, 0x7e, 
+0x12, 0x17, 0xcf, 0xe5, 0x2f, 0x7f, 0x00, 0x25, 0xe0, 0xfe, 0xef, 0x24, 0x00, 0xf5, 0x82, 0x74, 
+0x4d, 0x3e, 0xaf, 0x82, 0x90, 0x4c, 0xa8, 0xf0, 0xa3, 0xef, 0xf0, 0xe4, 0xf5, 0x56, 0xf5, 0x57, 
+0x7f, 0x7f, 0x12, 0x17, 0xe9, 0x90, 0x4c, 0xa8, 0xe0, 0xfa, 0xa3, 0xe0, 0x25, 0x57, 0xf5, 0x82, 
+0xea, 0x35, 0x56, 0xf5, 0x83, 0xef, 0xf0, 0x05, 0x57, 0xe5, 0x57, 0x70, 0x02, 0x05, 0x56, 0xc3, 
+0x94, 0x80, 0xe5, 0x56, 0x94, 0x01, 0x40, 0xd8, 0x7f, 0x7e, 0x12, 0x17, 0xe9, 0xef, 0x44, 0x03, 
+0xfd, 0x7f, 0x7e, 0x12, 0x17, 0xcf, 0x74, 0xa0, 0x25, 0x2f, 0xf5, 0x82, 0xe4, 0x34, 0x4c, 0xf5, 
+0x83, 0xe4, 0xf0, 0x05, 0x2f, 0xe5, 0x2f, 0xb4, 0x08, 0x03, 0xe4, 0xf5, 0x2f, 0xe5, 0x3b, 0x60, 
+0x04, 0x15, 0x3b, 0x80, 0x03, 0x75, 0x3b, 0xfe, 0xe5, 0x3b, 0x70, 0x08, 0x20, 0x07, 0x05, 0x30, 
+0x1b, 0x02, 0xd2, 0x07, 0xe5, 0x53, 0x70, 0x1a, 0x30, 0x60, 0x09, 0xb2, 0x4d, 0x30, 0x4d, 0x04, 
+0x05, 0x46, 0xc2, 0x04, 0xe5, 0x4f, 0x45, 0x4e, 0x60, 0x08, 0xe5, 0x4f, 0x15, 0x4f, 0x70, 0x02, 
+0x15, 0x4e, 0x22, 0x22, 0xc2, 0x42, 0xd3, 0x22, 0x30, 0x14, 0x30, 0x90, 0x70, 0x19, 0xe0, 0x55, 
+0x3f, 0xff, 0x90, 0x70, 0x18, 0xe0, 0x4f, 0xf5, 0x3f, 0x90, 0x02, 0x29, 0xe0, 0xff, 0x90, 0x70, 
+0x19, 0xe0, 0xfe, 0xef, 0x5e, 0x90, 0x02, 0x29, 0xf0, 0x30, 0x47, 0x04, 0xaf, 0x3f, 0x80, 0x04, 
+0xe5, 0x3f, 0xf4, 0xff, 0x90, 0x02, 0x28, 0xef, 0xf0, 0xc2, 0x14, 0x30, 0x16, 0x60, 0xc2, 0xaf, 
+0x90, 0x10, 0x04, 0xe0, 0xf5, 0x57, 0x90, 0x02, 0x28, 0xe0, 0x54, 0x05, 0xf5, 0x57, 0xe5, 0x5c, 
+0x64, 0x01, 0x70, 0x21, 0xe5, 0x57, 0x90, 0x10, 0x04, 0x30, 0xe0, 0x06, 0xe0, 0x54, 0xfb, 0xf0, 
+0x80, 0x04, 0xe0, 0x44, 0x04, 0xf0, 0xe5, 0x57, 0x30, 0xe2, 0x31, 0x05, 0x5b, 0xe5, 0x5b, 0x70, 
+0x2b, 0x05, 0x5a, 0x80, 0x27, 0xe5, 0x57, 0x30, 0xe0, 0x1b, 0xe5, 0x5c, 0x90, 0x10, 0x04, 0x70, 
+0x06, 0xe0, 0x54, 0xfb, 0xf0, 0x80, 0x04, 0xe0, 0x44, 0x04, 0xf0, 0x05, 0x5b, 0xe5, 0x5b, 0x70, 
+0x0b, 0x05, 0x5a, 0x80, 0x07, 0x90, 0x10, 0x04, 0xe0, 0x44, 0x04, 0xf0, 0xd2, 0xaf, 0x22, 0x90, 
+0x10, 0x1c, 0xed, 0xf0, 0xa3, 0xef, 0xf0, 0xa3, 0x74, 0x0a, 0xf0, 0x90, 0x10, 0x1c, 0xe0, 0xf5, 
+0x58, 0x90, 0x10, 0x1e, 0xe0, 0x20, 0xe1, 0xf3, 0x22, 0x90, 0x10, 0x1d, 0xef, 0xf0, 0xa3, 0x74, 
+0x0b, 0xf0, 0x90, 0x10, 0x1c, 0xe0, 0xf5, 0x58, 0x90, 0x10, 0x1e, 0xe0, 0x20, 0xe1, 0xf3, 0xaf, 
+0x58, 0x22, 0xc2, 0x4b, 0xc2, 0x4c, 0xe5, 0x44, 0x12, 0x0a, 0xb6, 0x18, 0x24, 0x00, 0x18, 0xb2, 
+0x04, 0x18, 0xae, 0x08, 0x18, 0x8e, 0x10, 0x18, 0x38, 0x20, 0x18, 0x58, 0x60, 0x18, 0x69, 0xa0, 
+0x00, 0x00, 0x18, 0xb4, 0x85, 0x48, 0x43, 0x85, 0x4a, 0x42, 0x85, 0x4c, 0x5e, 0xe5, 0x47, 0x64, 
+0x06, 0x60, 0x03, 0x02, 0x18, 0xb4, 0x80, 0x1b, 0xe5, 0x48, 0xc4, 0x54, 0x0f, 0xf5, 0x43, 0xe5, 
+0x4a, 0xc4, 0x54, 0x0f, 0xf5, 0x42, 0xe5, 0x4c, 0xc4, 0x54, 0x0f, 0xf5, 0x5e, 0xe5, 0x47, 0x64, 
+0x06, 0x70, 0x61, 0x53, 0x43, 0x0f, 0x80, 0x5c, 0x85, 0x49, 0x43, 0x85, 0x4b, 0x42, 0x85, 0x4d, 
+0x5e, 0xe5, 0x47, 0x64, 0x06, 0x70, 0x4d, 0x80, 0x1b, 0xe5, 0x49, 0xc4, 0x54, 0x0f, 0xf5, 0x43, 
+0xe5, 0x4b, 0xc4, 0x54, 0x0f, 0xf5, 0x42, 0xe5, 0x4d, 0xc4, 0x54, 0x0f, 0xf5, 0x5e, 0xe5, 0x47, 
+0x64, 0x06, 0x70, 0x30, 0xe5, 0x43, 0x54, 0x0f, 0x44, 0x10, 0xf5, 0x43, 0x80, 0x26, 0xe5, 0x47, 
+0x64, 0x04, 0x60, 0x05, 0xe5, 0x47, 0xb4, 0x05, 0x06, 0x43, 0x5e, 0x04, 0x75, 0x42, 0x09, 0xe5, 
+0x47, 0xb4, 0x06, 0x10, 0xe5, 0x43, 0x54, 0x0f, 0x44, 0x30, 0xf5, 0x43, 0x80, 0x06, 0xd2, 0x4b, 
+0x80, 0x02, 0xd2, 0x4c, 0xe4, 0xf5, 0x25, 0xe5, 0x42, 0xc4, 0x54, 0xf0, 0xff, 0xe5, 0x43, 0x54, 
+0x0f, 0x4f, 0xf5, 0x5f, 0xd2, 0x60, 0x22, 0xd2, 0x15, 0xe5, 0x47, 0x24, 0xf5, 0x60, 0x0b, 0x24, 
+0xcb, 0x60, 0x07, 0x24, 0x40, 0x70, 0x06, 0xc2, 0x15, 0x22, 0x12, 0x1c, 0x45, 0x12, 0x18, 0xe9, 
+0xc2, 0x15, 0xc2, 0xaf, 0xc2, 0x04, 0xd2, 0xaf, 0x22, 0xc2, 0xaf, 0x90, 0x04, 0x14, 0xe0, 0x54, 
+0x0e, 0x60, 0x04, 0xd2, 0x18, 0x80, 0x08, 0xe5, 0x4e, 0x45, 0x4f, 0x24, 0xff, 0x92, 0x18, 0xd2, 
+0xaf, 0x90, 0x04, 0x14, 0xe0, 0xa2, 0xe4, 0x92, 0x19, 0x74, 0x1e, 0xf0, 0xe5, 0x5f, 0x54, 0x0f, 
+0xf5, 0x2d, 0xe5, 0x25, 0x70, 0x13, 0x30, 0x18, 0x05, 0xe5, 0x5f, 0x20, 0xe5, 0x0b, 0x30, 0x19, 
+0x19, 0xe5, 0x5f, 0x54, 0x30, 0xff, 0xbf, 0x30, 0x11, 0xe5, 0x25, 0x70, 0x05, 0x75, 0x25, 0x0c, 
+0x80, 0x02, 0x15, 0x25, 0xd2, 0x6c, 0xd2, 0x6d, 0x80, 0x0f, 0xe5, 0x5f, 0x30, 0xe6, 0x06, 0xc2, 
+0x6c, 0xd2, 0x6d, 0x80, 0x04, 0xd2, 0x6c, 0xc2, 0x6d, 0xe5, 0x47, 0x64, 0x03, 0x70, 0x21, 0x30, 
+0x4b, 0x06, 0xc2, 0x6c, 0xd2, 0x6d, 0x80, 0x18, 0xe5, 0x25, 0x70, 0x03, 0x30, 0x4c, 0x11, 0xc2, 
+0x4c, 0xe5, 0x25, 0x70, 0x05, 0x75, 0x25, 0x07, 0x80, 0x02, 0x15, 0x25, 0xd2, 0x6c, 0xd2, 0x6d, 
+0xe5, 0x47, 0xb4, 0x09, 0x14, 0xe5, 0x44, 0x20, 0xe3, 0x0b, 0xe5, 0x3a, 0x64, 0x02, 0x60, 0x05, 
+0xe5, 0x3a, 0xb4, 0x03, 0x04, 0xc2, 0x6c, 0xd2, 0x6d, 0xe5, 0x47, 0xb4, 0x0a, 0x13, 0xe5, 0x3a, 
+0xb4, 0x01, 0x06, 0xc2, 0x6c, 0xd2, 0x6d, 0x80, 0x08, 0xe5, 0x3a, 0x70, 0x04, 0xd2, 0x6c, 0xc2, 
+0x6d, 0x20, 0x69, 0x07, 0xe5, 0x5e, 0x20, 0xe0, 0x02, 0xb2, 0x68, 0x20, 0x6b, 0x07, 0xe5, 0x5e, 
+0x20, 0xe1, 0x02, 0xb2, 0x6a, 0x20, 0x6d, 0x07, 0xe5, 0x5e, 0x20, 0xe2, 0x02, 0xb2, 0x6c, 0x75, 
+0x2e, 0x40, 0x20, 0x69, 0x04, 0xa2, 0x68, 0x80, 0x26, 0x30, 0x68, 0x06, 0xe5, 0x46, 0xa2, 0xe2, 
+0x80, 0x1d, 0xe5, 0x5e, 0x20, 0xe0, 0x04, 0x7f, 0x01, 0x80, 0x02, 0x7f, 0x00, 0xe5, 0x46, 0x54, 
+0xf0, 0xfe, 0xbe, 0xf0, 0x04, 0x7e, 0x01, 0x80, 0x02, 0x7e, 0x00, 0xee, 0x6f, 0x24, 0xff, 0x92, 
+0x73, 0x92, 0x72, 0x20, 0x6b, 0x04, 0xa2, 0x6a, 0x80, 0x26, 0x30, 0x6a, 0x06, 0xe5, 0x46, 0xa2, 
+0xe2, 0x80, 0x1d, 0xe5, 0x5e, 0x20, 0xe1, 0x04, 0x7f, 0x01, 0x80, 0x02, 0x7f, 0x00, 0xe5, 0x46, 
+0x54, 0xf0, 0xfe, 0xbe, 0xf0, 0x04, 0x7e, 0x01, 0x80, 0x02, 0x7e, 0x00, 0xee, 0x6f, 0x24, 0xff, 
+0x92, 0x75, 0x92, 0x74, 0x20, 0x6d, 0x04, 0xa2, 0x6c, 0x80, 0x26, 0xe5, 0x47, 0x64, 0x0a, 0x70, 
+0x22, 0x30, 0x6c, 0x06, 0xe5, 0x46, 0xa2, 0xe3, 0x80, 0x17, 0xe5, 0x3a, 0xb4, 0x01, 0x06, 0xe5, 
+0x46, 0xa2, 0xe3, 0x80, 0x34, 0xe5, 0x46, 0x20, 0xe4, 0x03, 0x30, 0xe5, 0x03, 0xd3, 0x80, 0x01, 
+0xc3, 0x80, 0x26, 0x30, 0x6c, 0x06, 0xe5, 0x46, 0xa2, 0xe2, 0x80, 0x1d, 0xe5, 0x5e, 0x20, 0xe2, 
+0x04, 0x7f, 0x01, 0x80, 0x02, 0x7f, 0x00, 0xe5, 0x46, 0x54, 0xf0, 0xfe, 0xbe, 0xf0, 0x04, 0x7e, 
+0x01, 0x80, 0x02, 0x7e, 0x00, 0xee, 0x6f, 0x24, 0xff, 0x92, 0x71, 0x92, 0x70, 0x90, 0x10, 0x00, 
+0xe0, 0x90, 0x10, 0x2c, 0xf0, 0x90, 0x10, 0x03, 0xe0, 0xc3, 0x94, 0x30, 0x40, 0x19, 0xe0, 0x64, 
+0x32, 0x60, 0x14, 0xa2, 0x71, 0x92, 0x77, 0xa2, 0x70, 0x92, 0x76, 0xe5, 0x2e, 0x13, 0x13, 0x54, 
+0x3f, 0xf5, 0x2e, 0xc2, 0x77, 0xd2, 0x76, 0x30, 0x17, 0x0d, 0x53, 0x2e, 0xf0, 0xe5, 0x2e, 0x45, 
+0x5d, 0x90, 0x10, 0x2f, 0xf0, 0x80, 0x06, 0x90, 0x10, 0x2f, 0xe5, 0x2e, 0xf0, 0xe5, 0x47, 0x64, 
+0x06, 0x70, 0x47, 0x90, 0x02, 0x28, 0xe0, 0x30, 0x47, 0x03, 0xff, 0x80, 0x02, 0xf4, 0xff, 0x8f, 
+0x3f, 0x90, 0x02, 0x29, 0xe0, 0x54, 0xfe, 0xf0, 0xe5, 0x43, 0xc4, 0x54, 0x0f, 0x14, 0x60, 0x0c, 
+0x24, 0xfe, 0x60, 0x0c, 0x24, 0x03, 0x70, 0x13, 0xc2, 0xf8, 0x80, 0x0f, 0xd2, 0xf8, 0x80, 0x0b, 
+0xe5, 0x46, 0x30, 0xe2, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x92, 0xf8, 0x30, 0x47, 0x05, 0xaf, 0x3f, 
+0x02, 0x1c, 0x3f, 0xe5, 0x3f, 0xf4, 0xff, 0x02, 0x1c, 0x3f, 0xe5, 0x47, 0x64, 0x07, 0x60, 0x0f, 
+0xe5, 0x47, 0x64, 0x08, 0x60, 0x09, 0xe5, 0x47, 0x64, 0x09, 0x60, 0x03, 0x02, 0x1b, 0xad, 0x90, 
+0x02, 0x28, 0xe0, 0x30, 0x47, 0x03, 0xff, 0x80, 0x02, 0xf4, 0xff, 0x8f, 0x3f, 0x90, 0x02, 0x29, 
+0xe0, 0x54, 0xfc, 0xf0, 0xe5, 0x3a, 0x14, 0x60, 0x22, 0x14, 0x60, 0x25, 0x14, 0x60, 0x2d, 0x24, 
+0xfc, 0x60, 0x49, 0x24, 0xf9, 0x60, 0x14, 0x24, 0x0e, 0x70, 0x50, 0xe5, 0x46, 0x13, 0x13, 0x54, 
+0x3f, 0x75, 0xf0, 0x03, 0x84, 0xe5, 0xf0, 0x24, 0xff, 0x80, 0x3a, 0xd2, 0xf9, 0xc2, 0xf8, 0x80, 
+0x3e, 0xe5, 0x46, 0x30, 0xe2, 0x03, 0xd3, 0x80, 0x1d, 0xc3, 0x80, 0x1a, 0xe5, 0x46, 0x30, 0xe2, 
+0x0d, 0x54, 0x38, 0xc3, 0x94, 0x30, 0x50, 0x06, 0x7e, 0x00, 0x7f, 0x01, 0x80, 0x04, 0x7e, 0x00, 
+0x7f, 0x00, 0xee, 0x4f, 0x24, 0xff, 0x92, 0xf8, 0xc2, 0xf9, 0x80, 0x13, 0xe5, 0x46, 0x30, 0xe2, 
+0x03, 0xd3, 0x80, 0x01, 0xc3, 0x92, 0xf9, 0xc2, 0xf8, 0x80, 0x04, 0xc2, 0xf8, 0xc2, 0xf9, 0x30, 
+0x47, 0x04, 0xaf, 0x3f, 0x80, 0x04, 0xe5, 0x3f, 0xf4, 0xff, 0x02, 0x1c, 0x3f, 0xe5, 0x47, 0x64, 
+0x0c, 0x60, 0x09, 0xe5, 0x47, 0x64, 0x0b, 0x60, 0x03, 0x02, 0x1c, 0x44, 0x90, 0x02, 0x28, 0xe0, 
+0x30, 0x47, 0x03, 0xff, 0x80, 0x02, 0xf4, 0xff, 0x8f, 0x3f, 0x90, 0x02, 0x29, 0xe0, 0x54, 0xfd, 
+0xf0, 0xe5, 0x3a, 0x14, 0x60, 0x20, 0x14, 0x60, 0x21, 0x14, 0x60, 0x2b, 0x24, 0xfc, 0x60, 0x45, 
+0x24, 0xf9, 0x60, 0x12, 0x24, 0x0e, 0x70, 0x4a, 0xe5, 0x46, 0x13, 0x13, 0x54, 0x3f, 0x75, 0xf0, 
+0x03, 0x84, 0xe5, 0xf0, 0x80, 0x29, 0xd2, 0xf9, 0x80, 0x3a, 0xe5, 0x46, 0x30, 0xe2, 0x03, 0xd3, 
+0x80, 0x01, 0xc3, 0x92, 0xf9, 0x80, 0x2d, 0xe5, 0x46, 0x30, 0xe2, 0x0d, 0x54, 0x38, 0xc3, 0x94, 
+0x30, 0x50, 0x06, 0x7e, 0x00, 0x7f, 0x01, 0x80, 0x04, 0x7e, 0x00, 0x7f, 0x00, 0xee, 0x4f, 0x24, 
+0xff, 0x92, 0xf9, 0x80, 0x0f, 0xe5, 0x46, 0x30, 0xe2, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x92, 0xf9, 
+0x80, 0x02, 0xc2, 0xf9, 0x30, 0x47, 0x04, 0xaf, 0x3f, 0x80, 0x04, 0xe5, 0x3f, 0xf4, 0xff, 0x90, 
+0x02, 0x28, 0xef, 0xf0, 0x22, 0xe5, 0x47, 0xb4, 0x0b, 0x10, 0x90, 0x02, 0x29, 0xe0, 0x54, 0xeb, 
+0xf0, 0xe5, 0x3f, 0x54, 0xeb, 0x45, 0x45, 0xf5, 0x3f, 0x22, 0xe4, 0x90, 0x02, 0x29, 0xf0, 0x30, 
+0x47, 0x04, 0xaf, 0x45, 0x80, 0x04, 0xe5, 0x45, 0xf4, 0xff, 0x90, 0x02, 0x28, 0xef, 0xf0, 0x22, 
+0x8f, 0x50, 0xd2, 0x59, 0x22, 0x8f, 0x54, 0xd2, 0x58, 0x22, 0xe4, 0xf5, 0x62, 0xc2, 0xaf, 0xe5, 
+0x51, 0x14, 0x60, 0x4b, 0x14, 0x60, 0x6c, 0x24, 0x02, 0x60, 0x03, 0x02, 0x1d, 0x87, 0xd2, 0x59, 
+0x75, 0x55, 0x01, 0x90, 0x02, 0xa2, 0xe0, 0x54, 0x7f, 0xf0, 0xa3, 0xe0, 0x20, 0xe7, 0x23, 0x90, 
+0x04, 0x34, 0xe0, 0xb4, 0x02, 0x1c, 0xa3, 0xe0, 0xb4, 0x02, 0x17, 0xa3, 0xe0, 0xb4, 0x02, 0x12, 
+0x7f, 0x20, 0x12, 0x1c, 0x70, 0x90, 0x10, 0x04, 0xe0, 0x54, 0xf3, 0xf0, 0x75, 0x51, 0x01, 0x02, 
+0x1d, 0x87, 0xe5, 0x50, 0x60, 0x03, 0x02, 0x1d, 0x87, 0x75, 0x62, 0x03, 0x02, 0x1d, 0x87, 0x90, 
+0x12, 0x00, 0xe0, 0x54, 0x03, 0x70, 0x12, 0x7f, 0x20, 0x12, 0x1c, 0x70, 0x90, 0x02, 0xa2, 0xe0, 
+0x54, 0xbf, 0xf0, 0x75, 0x51, 0x02, 0x02, 0x1d, 0x87, 0xe5, 0x50, 0x60, 0x03, 0x02, 0x1d, 0x87, 
+0x02, 0x1d, 0x82, 0x90, 0x02, 0xa3, 0xe0, 0x30, 0xe6, 0x03, 0x02, 0x1d, 0x7e, 0x90, 0x04, 0x37, 
+0xe0, 0x64, 0x22, 0x70, 0x79, 0x90, 0x01, 0x8a, 0x74, 0x7e, 0xf0, 0x90, 0x01, 0x96, 0xf0, 0x90, 
+0x12, 0x04, 0x74, 0x0a, 0xf0, 0x90, 0x13, 0x28, 0xe0, 0x90, 0x70, 0x1a, 0xf0, 0x90, 0x13, 0x29, 
+0xe0, 0x90, 0x70, 0x1b, 0xf0, 0x90, 0x13, 0x2b, 0xe0, 0x90, 0x70, 0x22, 0xf0, 0x90, 0x13, 0x28, 
+0xe0, 0x54, 0xf0, 0xf0, 0xa3, 0xe0, 0x54, 0xf0, 0xf0, 0x90, 0x13, 0x2b, 0xe0, 0x54, 0xcc, 0xf0, 
+0xe5, 0x58, 0x30, 0xe3, 0x13, 0xe5, 0x3c, 0xf4, 0x90, 0x13, 0x2a, 0x60, 0x05, 0xe0, 0x54, 0xf3, 
+0x80, 0x11, 0xe0, 0x54, 0xfb, 0xf0, 0x80, 0x14, 0xe5, 0x3c, 0xf4, 0x90, 0x13, 0x2a, 0x60, 0x08, 
+0xe0, 0x54, 0xf2, 0x45, 0x3c, 0xf0, 0x80, 0x04, 0xe0, 0x54, 0xfa, 0xf0, 0x90, 0x04, 0x01, 0xe0, 
+0x54, 0xfd, 0xf0, 0x75, 0x62, 0x01, 0x75, 0x55, 0x02, 0xe4, 0xf5, 0x51, 0x80, 0x09, 0xe5, 0x50, 
+0x70, 0x05, 0x75, 0x62, 0x03, 0xf5, 0x51, 0xe5, 0x62, 0x60, 0x15, 0xc2, 0x01, 0xe4, 0xf5, 0x51, 
+0xc2, 0x59, 0xad, 0x62, 0xaf, 0x40, 0x12, 0x1e, 0x54, 0xe5, 0x62, 0xb4, 0x03, 0x02, 0xd2, 0x03, 
+0xd2, 0xaf, 0x22, 0xc2, 0xaf, 0x30, 0x01, 0x12, 0xe4, 0x90, 0x01, 0x96, 0xf0, 0xf5, 0x51, 0xc2, 
+0x59, 0xc2, 0x01, 0x7d, 0x02, 0xaf, 0x40, 0x12, 0x1e, 0x54, 0xe5, 0x52, 0x14, 0x60, 0x0c, 0x04, 
+0x60, 0x03, 0x02, 0x1e, 0x51, 0x75, 0x52, 0x01, 0x75, 0x55, 0x03, 0x90, 0x04, 0x01, 0xe0, 0x44, 
+0x0e, 0xf0, 0xe5, 0x58, 0x54, 0x18, 0x60, 0x1e, 0x90, 0x70, 0x1a, 0xe0, 0x90, 0x13, 0x28, 0xf0, 
+0x90, 0x70, 0x1b, 0xe0, 0x90, 0x13, 0x29, 0xf0, 0xa3, 0x74, 0x05, 0xf0, 0x90, 0x70, 0x22, 0xe0, 
+0x90, 0x13, 0x2b, 0xf0, 0x80, 0x11, 0x90, 0x13, 0x28, 0xe0, 0x44, 0x0f, 0xf0, 0xa3, 0xe0, 0x44, 
+0x0f, 0xf0, 0xa3, 0xe0, 0x44, 0x05, 0xf0, 0x90, 0x12, 0x04, 0x74, 0x03, 0xf0, 0xe5, 0x58, 0x30, 
+0xe3, 0x16, 0x90, 0x05, 0x00, 0x74, 0x80, 0xf0, 0xa3, 0x74, 0x08, 0xf0, 0xa3, 0x74, 0x01, 0xf0, 
+0x74, 0x03, 0xf0, 0x7f, 0x01, 0x12, 0x0d, 0x48, 0x90, 0x02, 0xa2, 0xe0, 0x44, 0xc0, 0xf0, 0x90, 
+0x10, 0x04, 0xe0, 0x44, 0x0c, 0xf0, 0xe4, 0xf5, 0x52, 0xf5, 0x55, 0x30, 0x02, 0x09, 0xc2, 0x02, 
+0x7d, 0x01, 0xaf, 0x41, 0x12, 0x1e, 0x54, 0x30, 0x03, 0x02, 0xc2, 0x03, 0xe4, 0x90, 0x01, 0x96, 
+0xf0, 0xd2, 0xaf, 0x22, 0xef, 0xf4, 0x60, 0x2d, 0xe4, 0xfe, 0x74, 0x14, 0x2e, 0xf5, 0x82, 0xe4, 
+0x34, 0x70, 0xf5, 0x83, 0xe0, 0xb4, 0xff, 0x19, 0x74, 0x14, 0x2e, 0xf5, 0x82, 0xe4, 0x34, 0x70, 
+0xf5, 0x83, 0xef, 0xf0, 0x74, 0x1c, 0x2e, 0xf5, 0x82, 0xe4, 0x34, 0x70, 0xf5, 0x83, 0xed, 0xf0, 
+0x22, 0x0e, 0xbe, 0x04, 0xd5, 0x22, 0x22, 0x22, 0x90, 0x70, 0x2a, 0xe0, 0x30, 0xe1, 0x4d, 0xc2, 
+0xaf, 0x90, 0x70, 0x28, 0xe0, 0x90, 0x10, 0x1c, 0xf0, 0x90, 0x70, 0x29, 0xe0, 0x90, 0x10, 0x1d, 
+0xf0, 0x90, 0x70, 0x2a, 0xe0, 0x90, 0x10, 0x1e, 0xf0, 0x90, 0x10, 0x1c, 0xe0, 0xf5, 0x62, 0x90, 
+0x10, 0x1e, 0xe0, 0x20, 0xe1, 0xf3, 0x90, 0x10, 0x1c, 0xe0, 0x90, 0x70, 0x28, 0xf0, 0x90, 0x10, 
+0x1d, 0xe0, 0x90, 0x70, 0x29, 0xf0, 0x90, 0x10, 0x1e, 0xe0, 0x90, 0x70, 0x2a, 0xf0, 0x30, 0x4a, 
+0x07, 0x90, 0x70, 0x24, 0xe0, 0x44, 0x01, 0xf0, 0xc2, 0x05, 0xd2, 0xaf, 0x22, 0xc2, 0xaf, 0x7d, 
+0x01, 0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x7f, 0xb9, 0x12, 0x17, 0xe9, 0xef, 0x64, 0x01, 0x60, 0x03, 
+0x02, 0x1f, 0xd3, 0xd3, 0x90, 0x4c, 0xb3, 0xe0, 0x95, 0x27, 0x90, 0x4c, 0xb2, 0xe0, 0x95, 0x26, 
+0x40, 0x11, 0x90, 0x4c, 0xb1, 0xe0, 0x04, 0xf0, 0x90, 0x4c, 0xb8, 0xe0, 0x60, 0x1a, 0xe0, 0x14, 
+0xf0, 0x80, 0x15, 0x90, 0x4c, 0xb9, 0xe0, 0xff, 0x90, 0x4c, 0xb8, 0xe0, 0xc3, 0x9f, 0x50, 0x08, 
+0x90, 0x4c, 0xb9, 0xe0, 0x90, 0x4c, 0xb8, 0xf0, 0xe4, 0xf5, 0x26, 0xf5, 0x27, 0x7d, 0x05, 0x7f, 
+0xb8, 0x12, 0x17, 0xcf, 0x90, 0x4c, 0xb0, 0xe0, 0xfd, 0x7f, 0xb9, 0x12, 0x17, 0xcf, 0x7d, 0x02, 
+0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x90, 0x4c, 0xbb, 0xe0, 0xfd, 0x7f, 0xb9, 0x12, 0x17, 0xcf, 0x7d, 
+0x03, 0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x90, 0x4c, 0xbc, 0xe0, 0xfd, 0x7f, 0xb9, 0x12, 0x17, 0xcf, 
+0x7d, 0x04, 0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x90, 0x4c, 0xbd, 0xe0, 0xfd, 0x7f, 0xb9, 0x12, 0x17, 
+0xcf, 0x7d, 0x09, 0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x90, 0x4c, 0xb7, 0xe0, 0xfd, 0x7f, 0xb9, 0x12, 
+0x17, 0xcf, 0x7d, 0x08, 0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x90, 0x4c, 0xb6, 0xe0, 0xfd, 0x7f, 0xb9, 
+0x12, 0x17, 0xcf, 0x7d, 0x07, 0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x90, 0x4c, 0xb5, 0xe0, 0xfd, 0x7f, 
+0xb9, 0x12, 0x17, 0xcf, 0x7d, 0x06, 0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x90, 0x4c, 0xb4, 0xe0, 0xfd, 
+0x7f, 0xb9, 0x12, 0x17, 0xcf, 0x7d, 0x01, 0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x7d, 0x01, 0x7f, 0xb9, 
+0x12, 0x17, 0xcf, 0xe4, 0xfd, 0x7f, 0xb8, 0x12, 0x17, 0xcf, 0x7d, 0x01, 0x7f, 0xb9, 0x12, 0x17, 
+0xcf, 0x80, 0x08, 0x05, 0x27, 0xe5, 0x27, 0x70, 0x02, 0x05, 0x26, 0xc2, 0x07, 0xd2, 0xaf, 0x22, 
+0x22, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0xb1, 0xa5, } ;
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/frq_cal.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/frq_cal.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/frq_cal.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/frq_cal.h	2017-09-23 03:42:49.786675773 +0800
@@ -0,0 +1,87 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __FRQCAL_H__
+#define __FRQCAL_H__
+
+/* */
+/* The frequency calibration control */
+/* */
+typedef struct _FREQUENCY_CALIBRATION_CONTROL
+{
+	BOOLEAN bEnableFrequencyCalibration; /* Enable the frequency calibration algorithm */
+
+	BOOLEAN bSkipFirstFrequencyCalibration; /* Avoid calibrating frequency at the time the STA is just link-up */
+	BOOLEAN bApproachFrequency; /* Approach the frequency */
+	CHAR AdaptiveFreqOffset; /* Adaptive frequency offset */
+	CHAR LatestFreqOffsetOverBeacon; /* Latest frequency offset from the beacon */
+	CHAR BeaconPhyMode; /* Latest frequency offset from the beacon */
+	
+} FREQUENCY_CALIBRATION_CONTROL, *PFREQUENCY_CALIBRATION_CONTROL;
+
+/* */
+/* Invalid frequency offset */
+/* */
+#define INVALID_FREQUENCY_OFFSET			-128
+
+/* */
+/* The upperbound/lowerbound of the frequency offset */
+/* */
+#define UPPERBOUND_OF_FREQUENCY_OFFSET		127
+#define LOWERBOUND_OF_FREQUENCY_OFFSET	-127
+
+
+/*#ifdef RT5390 */
+/* */
+/* The trigger point of the high/low frequency */
+/* */
+#define HIGH_FREQUENCY_TRIGGER_POINT_OFDM		20
+#define LOW_FREQUENCY_TRIGGER_POINT_OFDM		-20
+#define HIGH_FREQUENCY_TRIGGER_POINT_CCK		4
+#define LOW_FREQUENCY_TRIGGER_POINT_CCK		-4
+
+/* */
+/* The trigger point of decreasng/increasing the frequency offset */
+/* */
+#define DECREASE_FREQUENCY_OFFSET_OFDM			10
+#define INCREASE_FREQUENCY_OFFSET_OFDM			-10
+#define DECREASE_FREQUENCY_OFFSET_CCK			2
+#define INCREASE_FREQUENCY_OFFSET_CCK			-2
+/*#endif // RT5390 */
+/* */
+/* The trigger point of decreasng/increasing the frequency offset */
+/* */
+#define DECREASE_FREQUENCY_OFFSET			3
+#define INCREASE_FREQUENCY_OFFSET			-3
+
+/* */
+/* Frequency calibration period */
+/* */
+
+#define FREQUENCY_CALIBRATION_PERIOD		100
+
+#endif /* __FRQCAL_H__ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/iface/iface_util.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/iface/iface_util.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/iface/iface_util.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/iface/iface_util.h	2017-09-23 03:42:49.786675773 +0800
@@ -0,0 +1,70 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RTMP_UTIL_H__
+#define __RTMP_UTIL_H__
+
+/* maximum of PCI, USB, or RBUS, int PCI, it is 0 but in USB, it is 11 */
+#define RTMP_PKT_TAIL_PADDING 	11 /* 3(max 4 byte padding) + 4 (last packet padding) + 4 (MaxBulkOutsize align padding) */
+
+#ifdef PCI_MSI_SUPPORT
+#define RTMP_MSI_ENABLE(_pAd) \
+	{     POS_COOKIE _pObj = (POS_COOKIE)(_pAd->OS_Cookie); \
+		(_pAd)->HaveMsi = pci_enable_msi(_pObj->pci_dev) == 0 ? TRUE : FALSE; \
+	}
+
+#define RTMP_MSI_DISABLE(_pci_dev, _pHaveMsi)	\
+	{											\
+		if (*(_pHaveMsi) == TRUE)				\
+			pci_disable_msi(_pci_dev);			\
+		*(_pHaveMsi) = FALSE;					\
+	}
+
+#else
+#define RTMP_MSI_ENABLE(_pAd)					do{}while(0)
+#define RTMP_MSI_DISABLE(_pci_dev, _pHaveMsi)	do{}while(0)
+#endif /* PCI_MSI_SUPPORT */
+
+#define RTMP_PCI_DMA_TODEVICE		0xFF00
+#define RTMP_PCI_DMA_FROMDEVICE		0xFF01
+
+
+
+
+#define UNLINK_TIMEOUT_MS		3
+
+#define USBD_TRANSFER_DIRECTION_OUT		0
+#define USBD_TRANSFER_DIRECTION_IN		0
+#define USBD_SHORT_TRANSFER_OK			0
+#define PURB			purbb_t
+
+#define OS_RTUSBMlmeUp					RtmpOsMlmeUp
+
+
+
+
+#endif /* __RTMP_UTIL_H__ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/iface/rtmp_usb.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/iface/rtmp_usb.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/iface/rtmp_usb.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/iface/rtmp_usb.h	2017-09-23 03:42:49.786675773 +0800
@@ -0,0 +1,108 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RTMP_USB_H__
+#define __RTMP_USB_H__
+
+#include "rtusb_io.h"
+
+extern UCHAR EpToQueue[6];
+
+#define RXBULKAGGRE_SIZE			12
+#define MAX_TXBULK_LIMIT			(LOCAL_TXBUF_SIZE*(BULKAGGRE_SIZE-1))
+#define MAX_TXBULK_SIZE			(LOCAL_TXBUF_SIZE*BULKAGGRE_SIZE)
+#define MAX_RXBULK_SIZE			(LOCAL_TXBUF_SIZE*RXBULKAGGRE_SIZE)
+#define MAX_MLME_HANDLER_MEMORY 20
+
+/*Power saving */
+#define PowerWakeCID		3
+#define CID0MASK		0x000000ff
+#define CID1MASK		0x0000ff00
+#define CID2MASK		0x00ff0000
+#define CID3MASK		0xff000000
+
+
+/* Flags for Bulkflags control for bulk out data */
+/* */
+#define	fRTUSB_BULK_OUT_DATA_NULL				0x00000001
+#define	fRTUSB_BULK_OUT_RTS						0x00000002
+#define	fRTUSB_BULK_OUT_MLME					0x00000004
+
+#define	fRTUSB_BULK_OUT_PSPOLL					0x00000010
+#define	fRTUSB_BULK_OUT_DATA_FRAG				0x00000020
+#define	fRTUSB_BULK_OUT_DATA_FRAG_2				0x00000040
+#define	fRTUSB_BULK_OUT_DATA_FRAG_3				0x00000080
+#define	fRTUSB_BULK_OUT_DATA_FRAG_4				0x00000100
+
+#define	fRTUSB_BULK_OUT_DATA_NORMAL				0x00010000
+#define	fRTUSB_BULK_OUT_DATA_NORMAL_2			0x00020000
+#define	fRTUSB_BULK_OUT_DATA_NORMAL_3			0x00040000
+#define	fRTUSB_BULK_OUT_DATA_NORMAL_4			0x00080000
+
+/* TODO:move to ./ate/include/iface/ate_usb.h */
+#ifdef RALINK_ATE
+#define	fRTUSB_BULK_OUT_DATA_ATE				0x00100000
+#endif /* RALINK_ATE */
+
+
+#define FREE_HTTX_RING(_pCookie, _pipeId, _txContext)			\
+{										\
+	if ((_txContext)->ENextBulkOutPosition == (_txContext)->CurWritePosition)	\
+	{																	\
+		(_txContext)->bRingEmpty = TRUE;			\
+	}																	\
+	/*NdisInterlockedDecrement(&(_p)->TxCount); */\
+}
+
+#define NT_SUCCESS(status)			(((status) >=0) ? (TRUE):(FALSE))
+
+
+
+
+#define PIRP		PVOID
+/*#define NDIS_OID	UINT */
+#ifndef USB_ST_NOERROR
+#define USB_ST_NOERROR     0
+#endif
+
+
+/* vendor-specific control operations */
+#define CONTROL_TIMEOUT_JIFFIES ( (300 * OS_HZ) / 1000)
+/*#define UNLINK_TIMEOUT_MS		3 // os abl move */
+
+
+#define DEVICE_VENDOR_REQUEST_OUT       0x40
+#define DEVICE_VENDOR_REQUEST_IN        0xc0
+/*#define INTERFACE_VENDOR_REQUEST_OUT    0x41 */
+/*#define INTERFACE_VENDOR_REQUEST_IN     0xc1 */
+#define BULKOUT_MGMT_RESET_FLAG		0x80
+
+#define RTUSB_SET_BULK_FLAG(_M, _F)	((_M)->BulkFlags |= (_F))
+#define RTUSB_CLEAR_BULK_FLAG(_M, _F)	((_M)->BulkFlags &= ~(_F))
+#define RTUSB_TEST_BULK_FLAG(_M, _F)	(((_M)->BulkFlags & (_F)) != 0)
+
+#endif /* __RTMP_USB_H__ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/link_list.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/link_list.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/link_list.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/link_list.h	2017-09-23 03:42:49.790675761 +0800
@@ -0,0 +1,134 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __LINK_LIST_H__
+#define __LINK_LIST_H__
+
+typedef struct _LIST_ENTRY
+{
+	struct _LIST_ENTRY *pNext;
+} LIST_ENTRY, *PLIST_ENTRY;
+
+typedef struct _LIST_HEADR
+{
+	PLIST_ENTRY pHead;
+	PLIST_ENTRY pTail;
+	UCHAR size;
+} LIST_HEADER, *PLIST_HEADER;
+
+static inline VOID initList(
+	IN PLIST_HEADER pList)
+{
+	pList->pHead = pList->pTail = NULL;
+	pList->size = 0;
+	return;
+}
+
+static inline VOID insertTailList(
+	IN PLIST_HEADER pList,
+	IN PLIST_ENTRY pEntry)
+{
+	pEntry->pNext = NULL;
+	if (pList->pTail)
+		pList->pTail->pNext = pEntry;
+	else
+		pList->pHead = pEntry;
+	pList->pTail = pEntry;
+	pList->size++;
+
+	return;
+}
+
+static inline PLIST_ENTRY removeHeadList(
+	IN PLIST_HEADER pList)
+{
+	PLIST_ENTRY pNext;
+	PLIST_ENTRY pEntry;
+
+	pEntry = pList->pHead;
+	if (pList->pHead != NULL)
+	{
+		pNext = pList->pHead->pNext;
+		pList->pHead = pNext;
+		if (pNext == NULL)
+			pList->pTail = NULL;
+		pList->size--;
+	}
+	return pEntry;
+}
+
+static inline int getListSize(
+	IN PLIST_HEADER pList)
+{
+	return pList->size;
+}
+
+static inline PLIST_ENTRY delEntryList(
+	IN PLIST_HEADER pList,
+	IN PLIST_ENTRY pEntry)
+{
+	PLIST_ENTRY pCurEntry;
+	PLIST_ENTRY pPrvEntry;
+
+	if(pList->pHead == NULL)
+		return NULL;
+
+	if(pEntry == pList->pHead)
+	{
+		pCurEntry = pList->pHead;
+		pList->pHead = pCurEntry->pNext;
+
+		if(pList->pHead == NULL)
+			pList->pTail = NULL;
+
+		pList->size--;
+		return pCurEntry;
+	}
+
+	pPrvEntry = pList->pHead;
+	pCurEntry = pPrvEntry->pNext;
+	while(pCurEntry != NULL)
+	{
+		if (pEntry == pCurEntry)
+		{
+			pPrvEntry->pNext = pCurEntry->pNext;
+
+			if(pEntry == pList->pTail)
+				pList->pTail = pPrvEntry;
+
+			pList->size--;
+			break;
+		}
+		pPrvEntry = pCurEntry;
+		pCurEntry = pPrvEntry->pNext;
+	}
+
+	return pCurEntry;
+}
+
+#endif /* ___LINK_LIST_H__ */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/misc_cmm.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/misc_cmm.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/misc_cmm.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/misc_cmm.h	2017-09-23 03:42:49.790675761 +0800
@@ -0,0 +1,27 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/misc.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/misc.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/misc.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/misc.h	2017-09-23 03:42:49.790675761 +0800
@@ -0,0 +1,27 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/mlme.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/mlme.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/mlme.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/mlme.h	2017-09-23 03:42:49.790675761 +0800
@@ -0,0 +1,1432 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __MLME_H__
+#define __MLME_H__
+
+#include "rtmp_dot11.h"
+
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+
+/* maximum supported capability information - */
+/* ESS, IBSS, Privacy, Short Preamble, Spectrum mgmt, Short Slot */
+#define SUPPORTED_CAPABILITY_INFO   0x0533
+
+#define END_OF_ARGS                 -1
+#define LFSR_MASK                   0x80000057
+#define MLME_TASK_EXEC_INTV         100/*200*/       /* */
+#define LEAD_TIME                   5
+#define MLME_TASK_EXEC_MULTIPLE       10  /*5*/       /* MLME_TASK_EXEC_MULTIPLE * MLME_TASK_EXEC_INTV = 1 sec */
+#define REORDER_EXEC_INTV         	100       /* 0.1 sec */
+#ifdef RTMP_MAC_USB
+#ifdef CONFIG_STA_SUPPORT
+#define STAY_10_SECONDS_AWAKE        100/* */
+#endif /* CONFIG_STA_SUPPORT */
+#endif /* RTMP_MAC_USB */
+/*#define TBTT_PRELOAD_TIME         384        // usec. LomgPreamble + 24-byte at 1Mbps */
+
+/* The definition of Radar detection duration region */
+#define CE		0
+#define FCC		1
+#define JAP		2
+#define JAP_W53	3
+#define JAP_W56	4
+#define MAX_RD_REGION 5
+
+#define BEACON_LOST_TIME            4 * OS_HZ    /* 2048 msec = 2 sec */
+
+#define DLS_TIMEOUT                 1200      /* unit: msec */
+#define AUTH_TIMEOUT                300       /* unit: msec */
+#define ASSOC_TIMEOUT               300       /* unit: msec */
+#define JOIN_TIMEOUT                2000        /* unit: msec */
+#define SHORT_CHANNEL_TIME          90        /* unit: msec */
+#define MIN_CHANNEL_TIME            110        /* unit: msec, for dual band scan */
+#define MAX_CHANNEL_TIME            140       /* unit: msec, for single band scan */
+#define	FAST_ACTIVE_SCAN_TIME	    30 		  /* Active scan waiting for probe response time */
+#define CW_MIN_IN_BITS              4         /* actual CwMin = 2^CW_MIN_IN_BITS - 1 */
+#define AUTO_CHANNEL_SEL_TIMEOUT		400		/* uint: msec */
+#define LINK_DOWN_TIMEOUT           20000      /* unit: msec */
+#define AUTO_WAKEUP_TIMEOUT			70			/*unit: msec */
+
+
+#ifdef CONFIG_STA_SUPPORT
+#define CW_MAX_IN_BITS              10        /* actual CwMax = 2^CW_MAX_IN_BITS - 1 */
+#endif /* CONFIG_STA_SUPPORT */
+#ifdef CONFIG_APSTA_MIXED_SUPPORT
+extern UINT32 CW_MAX_IN_BITS;
+#endif /* CONFIG_APSTA_MIXED_SUPPORT */
+
+/* Note: RSSI_TO_DBM_OFFSET has been changed to variable for new RF (2004-0720). */
+/* SHould not refer to this constant anymore */
+/*#define RSSI_TO_DBM_OFFSET          120 // for RT2530 RSSI-115 = dBm */
+#define RSSI_FOR_MID_TX_POWER       -55  /* -55 db is considered mid-distance */
+#define RSSI_FOR_LOW_TX_POWER       -45  /* -45 db is considered very short distance and */
+                                        /* eligible to use a lower TX power */
+#define RSSI_FOR_LOWEST_TX_POWER    -30
+/*#define MID_TX_POWER_DELTA          0   // 0 db from full TX power upon mid-distance to AP */
+#define LOW_TX_POWER_DELTA          6    /* -3 db from full TX power upon very short distance. 1 grade is 0.5 db */
+#define LOWEST_TX_POWER_DELTA       16   /* -8 db from full TX power upon shortest distance. 1 grade is 0.5 db */
+
+#define RSSI_TRIGGERED_UPON_BELOW_THRESHOLD     0
+#define RSSI_TRIGGERED_UPON_EXCCEED_THRESHOLD   1
+#define RSSI_THRESHOLD_FOR_ROAMING              25
+#define RSSI_DELTA                              5
+
+/* Channel Quality Indication */
+#define CQI_IS_GOOD(cqi)            ((cqi) >= 50)
+/*#define CQI_IS_FAIR(cqi)          (((cqi) >= 20) && ((cqi) < 50)) */
+#define CQI_IS_POOR(cqi)            (cqi < 50)  /*(((cqi) >= 5) && ((cqi) < 20)) */
+#define CQI_IS_BAD(cqi)             (cqi < 5)
+#define CQI_IS_DEAD(cqi)            (cqi == 0)
+
+/* weighting factor to calculate Channel quality, total should be 100% */
+#define RSSI_WEIGHTING                   50
+#define TX_WEIGHTING                     30
+#define RX_WEIGHTING                     20
+
+/*#define PEER_KEY_NOT_USED                0 */
+/*#define PEER_KEY_64_BIT                  64 */
+/*#define PEER_KEY_128_BIT                 128 */
+
+/*#define PEER_KEY_64BIT_LEN               8 */
+/*#define PEER_KEY_128BIT_LEN              16 */
+
+#define BSS_NOT_FOUND                    0xFFFFFFFF
+
+
+#ifdef CONFIG_STA_SUPPORT
+#define MAX_LEN_OF_MLME_QUEUE            40 /*10 */
+#endif /* CONFIG_STA_SUPPORT */
+
+#define SCAN_PASSIVE                     18		/* scan with no probe request, only wait beacon and probe response */
+#define SCAN_ACTIVE                      19		/* scan with probe request, and wait beacon and probe response */
+#define	SCAN_CISCO_PASSIVE				 20		/* Single channel passive scan */
+#define	SCAN_CISCO_ACTIVE				 21		/* Single channel active scan */
+#define	SCAN_CISCO_NOISE				 22		/* Single channel passive scan for noise histogram collection */
+#define	SCAN_CISCO_CHANNEL_LOAD			 23		/* Single channel passive scan for channel load collection */
+#define FAST_SCAN_ACTIVE                 24		/* scan with probe request, and wait beacon and probe response */
+
+#ifdef DOT11N_DRAFT3
+#define SCAN_2040_BSS_COEXIST                  26
+#endif /* DOT11N_DRAFT3 */
+
+
+/*#define BSS_TABLE_EMPTY(x)             ((x).BssNr == 0) */
+#define MAC_ADDR_IS_GROUP(Addr)       (((Addr[0]) & 0x01))
+#define MAC_ADDR_HASH(Addr)            (Addr[0] ^ Addr[1] ^ Addr[2] ^ Addr[3] ^ Addr[4] ^ Addr[5])
+#define MAC_ADDR_HASH_INDEX(Addr)      (MAC_ADDR_HASH(Addr) & (HASH_TABLE_SIZE - 1))
+#define TID_MAC_HASH(Addr,TID)            (TID^Addr[0] ^ Addr[1] ^ Addr[2] ^ Addr[3] ^ Addr[4] ^ Addr[5])
+#define TID_MAC_HASH_INDEX(Addr,TID)      (TID_MAC_HASH(Addr,TID) & (HASH_TABLE_SIZE - 1))
+
+/* LED Control */
+/* assoiation ON. one LED ON. another blinking when TX, OFF when idle */
+/* no association, both LED off */
+#define ASIC_LED_ACT_ON(pAd)        RTMP_IO_WRITE32(pAd, MAC_CSR14, 0x00031e46)
+#define ASIC_LED_ACT_OFF(pAd)       RTMP_IO_WRITE32(pAd, MAC_CSR14, 0x00001e46)
+
+/* bit definition of the 2-byte pBEACON->Capability field */
+#define CAP_IS_ESS_ON(x)                 (((x) & 0x0001) != 0)
+#define CAP_IS_IBSS_ON(x)                (((x) & 0x0002) != 0)
+#define CAP_IS_CF_POLLABLE_ON(x)         (((x) & 0x0004) != 0)
+#define CAP_IS_CF_POLL_REQ_ON(x)         (((x) & 0x0008) != 0)
+#define CAP_IS_PRIVACY_ON(x)             (((x) & 0x0010) != 0)
+#define CAP_IS_SHORT_PREAMBLE_ON(x)      (((x) & 0x0020) != 0)
+#define CAP_IS_PBCC_ON(x)                (((x) & 0x0040) != 0)
+#define CAP_IS_AGILITY_ON(x)             (((x) & 0x0080) != 0)
+#define CAP_IS_SPECTRUM_MGMT(x)          (((x) & 0x0100) != 0)  /* 802.11e d9 */
+#define CAP_IS_QOS(x)                    (((x) & 0x0200) != 0)  /* 802.11e d9 */
+#define CAP_IS_SHORT_SLOT(x)             (((x) & 0x0400) != 0)
+#define CAP_IS_APSD(x)                   (((x) & 0x0800) != 0)  /* 802.11e d9 */
+#define CAP_IS_IMMED_BA(x)               (((x) & 0x1000) != 0)  /* 802.11e d9 */
+#define CAP_IS_DSSS_OFDM(x)              (((x) & 0x2000) != 0)
+#define CAP_IS_DELAY_BA(x)               (((x) & 0x4000) != 0)  /* 802.11e d9 */
+
+#define CAP_GENERATE(ess,ibss,priv,s_pre,s_slot,spectrum)  (((ess) ? 0x0001 : 0x0000) | ((ibss) ? 0x0002 : 0x0000) | ((priv) ? 0x0010 : 0x0000) | ((s_pre) ? 0x0020 : 0x0000) | ((s_slot) ? 0x0400 : 0x0000) | ((spectrum) ? 0x0100 : 0x0000))
+
+/*#define STA_QOS_CAPABILITY               0 // 1-byte. see 802.11e d9.0 for bit definition */
+
+#define ERP_IS_NON_ERP_PRESENT(x)        (((x) & 0x01) != 0)    /* 802.11g */
+#define ERP_IS_USE_PROTECTION(x)         (((x) & 0x02) != 0)    /* 802.11g */
+#define ERP_IS_USE_BARKER_PREAMBLE(x)    (((x) & 0x04) != 0)    /* 802.11g */
+
+#define DRS_TX_QUALITY_WORST_BOUND       8/* 3  // just test by gary */
+#define DRS_PENALTY                      8
+
+#define BA_NOTUSE 	2
+/*BA Policy subfiled value in ADDBA frame */
+#define IMMED_BA 	1
+#define DELAY_BA	0
+
+/* BA Initiator subfield in DELBA frame */
+#define ORIGINATOR	1
+#define RECIPIENT	0
+
+/* ADDBA Status Code */
+#define ADDBA_RESULTCODE_SUCCESS					0
+#define ADDBA_RESULTCODE_REFUSED					37
+#define ADDBA_RESULTCODE_INVALID_PARAMETERS			38
+
+/* DELBA Reason Code */
+#define DELBA_REASONCODE_QSTA_LEAVING				36
+#define DELBA_REASONCODE_END_BA						37
+#define DELBA_REASONCODE_UNKNOWN_BA					38
+#define DELBA_REASONCODE_TIMEOUT					39
+
+/* reset all OneSecTx counters */
+#define RESET_ONE_SEC_TX_CNT(__pEntry) \
+if (((__pEntry)) != NULL) \
+{ \
+	(__pEntry)->OneSecTxRetryOkCount = 0; \
+	(__pEntry)->OneSecTxFailCount = 0; \
+	(__pEntry)->OneSecTxNoRetryOkCount = 0; \
+}
+
+#ifdef NEW_RATE_ADAPT_SUPPORT
+/*added ys */
+/*added for rate adaptation by ys */
+/*#define NEW_RATE_ADAPT_SUPPORT//3T3R always use the new rate adaptation algorithm, regardless whether this is defined */
+/*#define CCK_SUPPORT */
+/*#define USE_NEW_THRD//not useful when (NEW_RATE_ADAPT_SUPPORT is not defined) and (2T2R) */
+#define USE_GREATER_UP_MCS /*rate(upMcs)> rate(thisMcs) if this is defined. otherwise, rate(upMcs)>= rate(thisMcs); meaningful when (NEW_RATE_ADAPT_SUPPORT is supported) or 3T3R */
+#define PER_THRD_ADJ			1
+#define RA_PER_LOW_THRD			8
+#define FEW_PKTS_CNT_THRD 1
+/*#define RA_PER_HIGH_THRD_FACTOR 90 //high thrd = 1 - (rate of lower MCS) * factor/100/(rate of this MCS), useful when NEW_RATE_ADAPT_SUPPORT and USE_NEW_THRD are defined */
+
+/*#if !defined(NEW_RATE_ADAPT_SUPPORT) */
+/*	#undef USE_NEW_THRD//actually, whether this is defined doesn't matter when !defined(NEW_RATE_ADAPT_SUPPORT). This is just for clarification. */
+/*	#undef USE_GREATER_UP_MCS //actually, whether this is defined doesn't matter when !defined(NEW_RATE_ADAPT_SUPPORT). This is just for clarification. */
+/*#endif */
+/*#define MAX_STREAMS 2, this information is now determined by pAd->MACVersion >= RALINK_2883_VERSION */
+/*#if MAX_STREAMS==3 */
+/*	#define NEW_RATE_ADAPT_SUPPORT */
+/*#endif */
+#endif /* NEW_RATE_ADAPT_SUPPORT */
+
+#ifdef TXBF_SUPPORT
+/*#define MRQ_FORCE_TX//regardless the capability of the station */
+#define ETXBF_EN_COND		0 /*this value can be set by iwpriv ra0 set ETxBfEnCond=? */
+/* 0:no etxbf, */
+/* 1:etxbf update periodically, */
+/* 2:etxbf updated if mcs changes in RateSwitchingAdapt() or APQuickResponeForRateUpExecAdapt(). */
+/* 3:auto-selection: if mfb changes or timer expires, then send sounding packets <----not finished yet!!! */
+/* note: when = 1 or 3, NO_SNDG_CNT_THRD controls the frequency to update the matrix(ETXBF_EN_COND=1) or activate the whole bf evaluation process(not defined) */
+
+#define MSI_TOGGLE_BF		6
+#define TOGGLE_BF_PKTS		5/* the number of packets with inverted BF status */
+#define READY_FOR_SNDG0		0/*jump to WAIT_SNDG_FB0 when channel change or periodically */
+#define WAIT_SNDG_FB0		1/*jump to WAIT_SNDG_FB1 when bf report0 is received */
+#define WAIT_SNDG_FB1		2
+#define WAIT_MFB			3
+#define WAIT_USELESS_RSP	4
+#define WAIT_BEST_SNDG		5
+#define NO_SNDG_CNT_THRD	0/*send sndg packet if there is no sounding for (NO_SNDG_CNT_THRD+1)*500msec. If this =0, bf matrix is updated at each call of APMlmeDynamicTxRateSwitchingAdapt() */
+/*rate adaptation end */
+#endif /* TXBF_SUPPORT */
+
+
+/* */
+/* 802.11 frame formats */
+/* */
+/*  HT Capability INFO field in HT Cap IE . */
+typedef struct GNU_PACKED {
+#ifdef RT_BIG_ENDIAN
+	USHORT	LSIGTxopProSup:1;
+	USHORT	Forty_Mhz_Intolerant:1;
+	USHORT	PSMP:1;
+	USHORT	CCKmodein40:1;
+	USHORT	AMsduSize:1;
+	USHORT	DelayedBA:1;	/*rt2860c not support */
+	USHORT	RxSTBC:2;
+	USHORT	TxSTBC:1;
+	USHORT	ShortGIfor40:1;	/*for40MHz */
+	USHORT	ShortGIfor20:1;
+	USHORT	GF:1;	/*green field */
+	USHORT	MimoPs:2;/*momi power safe */
+	USHORT	ChannelWidth:1;
+	USHORT	AdvCoding:1;
+#else
+	USHORT	AdvCoding:1;
+	USHORT	ChannelWidth:1;
+	USHORT	MimoPs:2;/*momi power safe */
+	USHORT	GF:1;	/*green field */
+	USHORT	ShortGIfor20:1;
+	USHORT	ShortGIfor40:1;	/*for40MHz */
+	USHORT	TxSTBC:1;
+	USHORT	RxSTBC:2;
+	USHORT	DelayedBA:1;	/*rt2860c not support */
+	USHORT	AMsduSize:1;	/* only support as zero */
+	USHORT	CCKmodein40:1;
+	USHORT	PSMP:1;
+	USHORT	Forty_Mhz_Intolerant:1;
+	USHORT	LSIGTxopProSup:1;
+#endif	/* !RT_BIG_ENDIAN */
+} HT_CAP_INFO, *PHT_CAP_INFO;
+
+/*  HT Capability INFO field in HT Cap IE . */
+typedef struct GNU_PACKED {
+#ifdef RT_BIG_ENDIAN
+	UCHAR	rsv:3;/*momi power safe */
+	UCHAR	MpduDensity:3;
+	UCHAR	MaxRAmpduFactor:2;
+#else
+	UCHAR	MaxRAmpduFactor:2;
+	UCHAR	MpduDensity:3;
+	UCHAR	rsv:3;/*momi power safe */
+#endif /* !RT_BIG_ENDIAN */
+} HT_CAP_PARM, *PHT_CAP_PARM;
+
+/*  HT Capability INFO field in HT Cap IE . */
+typedef struct GNU_PACKED {
+	UCHAR	MCSSet[10];
+	UCHAR	SupRate[2];  /* unit : 1Mbps */
+#ifdef RT_BIG_ENDIAN
+	UCHAR	rsv:3;
+	UCHAR	MpduDensity:1;
+	UCHAR	TxStream:2;
+	UCHAR	TxRxNotEqual:1;
+	UCHAR	TxMCSSetDefined:1; 
+#else
+	UCHAR	TxMCSSetDefined:1; 
+	UCHAR	TxRxNotEqual:1;
+	UCHAR	TxStream:2;
+	UCHAR	MpduDensity:1;
+	UCHAR	rsv:3;
+#endif /* RT_BIG_ENDIAN */
+	UCHAR	rsv3[3];  
+} HT_MCS_SET, *PHT_MCS_SET;
+
+/*  HT Capability INFO field in HT Cap IE . */
+typedef struct GNU_PACKED {
+#ifdef RT_BIG_ENDIAN 
+	USHORT	rsv2:4;
+	USHORT	RDGSupport:1;	/*reverse Direction Grant  support */
+	USHORT	PlusHTC:1;	/*+HTC control field support */
+	USHORT	MCSFeedback:2;	/*0:no MCS feedback, 2:unsolicited MCS feedback, 3:Full MCS feedback,  1:rsv. */
+	USHORT	rsv:5;/*momi power safe */
+	USHORT	TranTime:2;
+	USHORT	Pco:1;
+#else
+	USHORT	Pco:1;
+	USHORT	TranTime:2;
+	USHORT	rsv:5;/*momi power safe */
+	USHORT	MCSFeedback:2;	/*0:no MCS feedback, 2:unsolicited MCS feedback, 3:Full MCS feedback,  1:rsv. */
+	USHORT	PlusHTC:1;	/*+HTC control field support */
+	USHORT	RDGSupport:1;	/*reverse Direction Grant  support */
+	USHORT	rsv2:4;
+#endif /* RT_BIG_ENDIAN */
+} EXT_HT_CAP_INFO, *PEXT_HT_CAP_INFO;
+
+/*  HT Beamforming field in HT Cap IE . */
+typedef struct GNU_PACKED _HT_BF_CAP{
+#ifdef RT_BIG_ENDIAN
+	ULONG	rsv:3;
+	ULONG	ChanEstimation:2;
+	ULONG	CSIRowBFSup:2;
+	ULONG	ComSteerBFAntSup:2;
+	ULONG	NoComSteerBFAntSup:2;
+	ULONG	CSIBFAntSup:2;
+	ULONG	MinGrouping:2;
+	ULONG	ExpComBF:2;	
+	ULONG	ExpNoComBF:2;
+	ULONG	ExpCSIFbk:2;
+	ULONG	ExpComSteerCapable:1;
+	ULONG	ExpNoComSteerCapable:1;
+	ULONG	ExpCSICapable:1;
+	ULONG	Calibration:2;
+	ULONG	ImpTxBFCapable:1;
+	ULONG	TxNDPCapable:1;	
+	ULONG	RxNDPCapable:1;	
+	ULONG	TxSoundCapable:1;
+	ULONG	RxSoundCapable:1;
+	ULONG	TxBFRecCapable:1;
+#else
+	ULONG	TxBFRecCapable:1;
+	ULONG	RxSoundCapable:1;
+	ULONG	TxSoundCapable:1;
+	ULONG	RxNDPCapable:1;	
+	ULONG	TxNDPCapable:1;	
+	ULONG	ImpTxBFCapable:1;	
+	ULONG	Calibration:2;
+	ULONG	ExpCSICapable:1;
+	ULONG	ExpNoComSteerCapable:1;
+	ULONG	ExpComSteerCapable:1;
+	ULONG	ExpCSIFbk:2;	
+	ULONG	ExpNoComBF:2;	
+	ULONG	ExpComBF:2;	
+	ULONG	MinGrouping:2;
+	ULONG	CSIBFAntSup:2;
+	ULONG	NoComSteerBFAntSup:2;
+	ULONG	ComSteerBFAntSup:2;
+	ULONG	CSIRowBFSup:2;
+	ULONG	ChanEstimation:2;
+	ULONG	rsv:3;
+#endif /* RT_BIG_ENDIAN */
+} HT_BF_CAP, *PHT_BF_CAP;
+
+/*  HT antenna selection field in HT Cap IE . */
+typedef struct GNU_PACKED _HT_AS_CAP{
+#ifdef RT_BIG_ENDIAN
+	UCHAR	rsv:1;
+	UCHAR	TxSoundPPDU:1;
+	UCHAR	RxASel:1;
+	UCHAR	AntIndFbk:1;
+	UCHAR	ExpCSIFbk:1;
+	UCHAR	AntIndFbkTxASEL:1;
+	UCHAR	ExpCSIFbkTxASEL:1;
+	UCHAR	AntSelect:1; 
+#else
+	UCHAR	AntSelect:1; 
+	UCHAR	ExpCSIFbkTxASEL:1;
+	UCHAR	AntIndFbkTxASEL:1;
+	UCHAR	ExpCSIFbk:1;
+	UCHAR	AntIndFbk:1;
+	UCHAR	RxASel:1;
+	UCHAR	TxSoundPPDU:1;
+	UCHAR	rsv:1;
+#endif /* RT_BIG_ENDIAN */
+} HT_AS_CAP, *PHT_AS_CAP;
+
+/* Draft 1.0 set IE length 26, but is extensible.. */
+#define SIZE_HT_CAP_IE		26
+/* The structure for HT Capability IE. */
+typedef struct GNU_PACKED _HT_CAPABILITY_IE{
+	HT_CAP_INFO		HtCapInfo;
+	HT_CAP_PARM		HtCapParm;
+/*	HT_MCS_SET		HtMCSSet; */
+	UCHAR			MCSSet[16];
+	EXT_HT_CAP_INFO	ExtHtCapInfo;
+	HT_BF_CAP		TxBFCap;	/* beamforming cap. rt2860c not support beamforming. */
+	HT_AS_CAP		ASCap;	/*antenna selection. */
+} HT_CAPABILITY_IE, *PHT_CAPABILITY_IE;
+
+
+/* 802.11n draft3 related structure definitions. */
+/* 7.3.2.60 */
+#define dot11OBSSScanPassiveDwell							20	/* in TU. min amount of time that the STA continously scans each channel when performing an active OBSS scan. */
+#define dot11OBSSScanActiveDwell							10	/* in TU.min amount of time that the STA continously scans each channel when performing an passive OBSS scan. */
+#define dot11BSSWidthTriggerScanInterval					300  /* in sec. max interval between scan operations to be performed to detect BSS channel width trigger events. */
+#define dot11OBSSScanPassiveTotalPerChannel					200	/* in TU. min total amount of time that the STA scans each channel when performing a passive OBSS scan. */
+#define dot11OBSSScanActiveTotalPerChannel					20	/*in TU. min total amount of time that the STA scans each channel when performing a active OBSS scan */
+#define dot11BSSWidthChannelTransactionDelayFactor			5	/* min ratio between the delay time in performing a switch from 20MHz BSS to 20/40 BSS operation and the maximum */
+																/*	interval between overlapping BSS scan operations. */
+#define dot11BSSScanActivityThreshold						25	/* in %%, max total time that a STA may be active on the medium during a period of */
+																/*	(dot11BSSWidthChannelTransactionDelayFactor * dot11BSSWidthTriggerScanInterval) seconds without */
+																/*	being obligated to perform OBSS Scan operations. default is 25(== 0.25%) */
+
+typedef struct GNU_PACKED _OVERLAP_BSS_SCAN_IE{
+	USHORT		ScanPassiveDwell;
+	USHORT		ScanActiveDwell;
+	USHORT		TriggerScanInt;				/* Trigger scan interval */
+	USHORT		PassiveTalPerChannel;		/* passive total per channel */
+	USHORT		ActiveTalPerChannel;		/* active total per channel */
+	USHORT		DelayFactor;				/* BSS width channel transition delay factor */
+	USHORT		ScanActThre;				/* Scan Activity threshold */
+}OVERLAP_BSS_SCAN_IE, *POVERLAP_BSS_SCAN_IE;
+
+
+/*  7.3.2.56. 20/40 Coexistence element used in  Element ID = 72 = IE_2040_BSS_COEXIST */
+typedef union GNU_PACKED _BSS_2040_COEXIST_IE{
+ struct GNU_PACKED {
+ #ifdef RT_BIG_ENDIAN
+	UCHAR	rsv:3;
+ 	UCHAR	ObssScanExempGrant:1;
+	UCHAR	ObssScanExempReq:1;
+	UCHAR	BSS20WidthReq:1;
+	UCHAR	Intolerant40:1;	
+	UCHAR	InfoReq:1; 
+ #else
+	UCHAR	InfoReq:1;
+	UCHAR	Intolerant40:1;			/* Inter-BSS. set 1 when prohibits a receiving BSS from operating as a 20/40 Mhz BSS. */
+	UCHAR	BSS20WidthReq:1;		/* Intra-BSS set 1 when prohibits a receiving AP from operating its BSS as a 20/40MHz BSS. */
+	UCHAR	ObssScanExempReq:1;
+	UCHAR	ObssScanExempGrant:1;
+	UCHAR	rsv:3;
+#endif /* RT_BIG_ENDIAN */
+    } field;
+ UCHAR   word;
+} BSS_2040_COEXIST_IE, *PBSS_2040_COEXIST_IE;
+
+
+typedef struct  _TRIGGER_EVENTA{
+	BOOLEAN			bValid;	 
+	UCHAR	BSSID[6];	
+	UCHAR	RegClass;	/* Regulatory Class */
+	USHORT	Channel;
+} TRIGGER_EVENTA, *PTRIGGER_EVENTA;
+
+/* 20/40 trigger event table */
+/* If one Event A delete or created, or if Event B is detected or not detected, STA should send 2040BSSCoexistence to AP. */
+#define MAX_TRIGGER_EVENT		64
+typedef struct  _TRIGGER_EVENT_TAB{
+	UCHAR	EventANo;	
+	TRIGGER_EVENTA	EventA[MAX_TRIGGER_EVENT];	
+	ULONG			EventBCountDown;	/* Count down counter for Event B. */
+} TRIGGER_EVENT_TAB, *PTRIGGER_EVENT_TAB;
+
+/* 7.3.27 20/40 Bss Coexistence Mgmt capability used in extended capabilities information IE( ID = 127 = IE_EXT_CAPABILITY). */
+/*	This is the first octet and was defined in 802.11n D3.03 and 802.11yD9.0 */
+typedef struct GNU_PACKED _EXT_CAP_INFO_ELEMENT{
+#ifdef RT_BIG_ENDIAN
+	UCHAR	rsv2:5;
+	UCHAR	ExtendChannelSwitch:1;
+	UCHAR	rsv:1;
+	UCHAR	BssCoexistMgmtSupport:1;
+#else
+	UCHAR	BssCoexistMgmtSupport:1;
+	UCHAR	rsv:1;
+	UCHAR	ExtendChannelSwitch:1;
+	UCHAR	rsv2:5;
+#endif /* RT_BIG_ENDIAN */
+}EXT_CAP_INFO_ELEMENT, *PEXT_CAP_INFO_ELEMENT;
+
+
+/* 802.11n 7.3.2.61 */
+typedef struct GNU_PACKED _BSS_2040_COEXIST_ELEMENT{
+	UCHAR					ElementID;		/* ID = IE_2040_BSS_COEXIST = 72 */
+	UCHAR					Len;
+	BSS_2040_COEXIST_IE		BssCoexistIe;
+}BSS_2040_COEXIST_ELEMENT, *PBSS_2040_COEXIST_ELEMENT;
+
+
+/*802.11n 7.3.2.59 */
+typedef struct GNU_PACKED _BSS_2040_INTOLERANT_CH_REPORT{
+	UCHAR				ElementID;		/* ID = IE_2040_BSS_INTOLERANT_REPORT = 73 */
+	UCHAR				Len;	
+	UCHAR				RegulatoryClass;
+	UCHAR				ChList[0];
+}BSS_2040_INTOLERANT_CH_REPORT, *PBSS_2040_INTOLERANT_CH_REPORT;
+
+
+/* The structure for channel switch annoucement IE. This is in 802.11n D3.03 */
+typedef struct GNU_PACKED _CHA_SWITCH_ANNOUNCE_IE{
+	UCHAR			SwitchMode;	/*channel switch mode */
+	UCHAR			NewChannel;	/* */
+	UCHAR			SwitchCount;	/* */
+} CHA_SWITCH_ANNOUNCE_IE, *PCHA_SWITCH_ANNOUNCE_IE;
+
+
+/* The structure for channel switch annoucement IE. This is in 802.11n D3.03 */
+typedef struct GNU_PACKED _SEC_CHA_OFFSET_IE{
+	UCHAR			SecondaryChannelOffset;	 /* 1: Secondary above, 3: Secondary below, 0: no Secondary */
+} SEC_CHA_OFFSET_IE, *PSEC_CHA_OFFSET_IE;
+
+
+/* This structure is extracted from struct RT_HT_CAPABILITY */
+typedef struct {
+	BOOLEAN			bHtEnable;	 /* If we should use ht rate. */
+	BOOLEAN			bPreNHt;	 /* If we should use ht rate. */
+	/*Substract from HT Capability IE */
+	UCHAR			MCSSet[16];
+} RT_HT_PHY_INFO, *PRT_HT_PHY_INFO;
+
+/*This structure substracts ralink supports from all 802.11n-related features. */
+/*Features not listed here but contained in 802.11n spec are not supported in rt2860. */
+typedef struct {
+#ifdef RT_BIG_ENDIAN
+	USHORT	rsv:5;
+	USHORT	AmsduSize:1;	/* Max receiving A-MSDU size */
+	USHORT	AmsduEnable:1;	/* Enable to transmit A-MSDU. Suggest disable. We should use A-MPDU to gain best benifit of 802.11n */
+	USHORT	RxSTBC:2;	/* 2 bits */
+	USHORT	TxSTBC:1;
+	USHORT	ShortGIfor40:1;	/*for40MHz */
+	USHORT	ShortGIfor20:1;
+	USHORT	GF:1;	/*green field */
+	USHORT	MimoPs:2;/*mimo power safe MMPS_ */
+	USHORT	ChannelWidth:1;
+#else
+	USHORT	ChannelWidth:1;
+	USHORT	MimoPs:2;/*mimo power safe MMPS_ */
+	USHORT	GF:1;	/*green field */
+	USHORT	ShortGIfor20:1;
+	USHORT	ShortGIfor40:1;	/*for40MHz */
+	USHORT	TxSTBC:1;
+	USHORT	RxSTBC:2;	/* 2 bits */
+	USHORT	AmsduEnable:1;	/* Enable to transmit A-MSDU. Suggest disable. We should use A-MPDU to gain best benifit of 802.11n */
+	USHORT	AmsduSize:1;	/* Max receiving A-MSDU size */
+	USHORT	rsv:5;
+#endif
+
+	/*Substract from Addiont HT INFO IE */
+#ifdef RT_BIG_ENDIAN
+	UCHAR	RecomWidth:1;
+	UCHAR	ExtChanOffset:2;	/* Please not the difference with following 	UCHAR	NewExtChannelOffset; from 802.11n */
+	UCHAR	MpduDensity:3;	
+	UCHAR	MaxRAmpduFactor:2;
+#else
+	UCHAR	MaxRAmpduFactor:2;
+	UCHAR	MpduDensity:3;
+	UCHAR	ExtChanOffset:2;	/* Please not the difference with following 	UCHAR	NewExtChannelOffset; from 802.11n */
+	UCHAR	RecomWidth:1;
+#endif
+
+#ifdef RT_BIG_ENDIAN
+	USHORT	rsv2:11;
+	USHORT	OBSS_NonHTExist:1;
+	USHORT	rsv3:1;
+	USHORT	NonGfPresent:1;
+	USHORT	OperaionMode:2;
+#else
+	USHORT	OperaionMode:2;
+	USHORT	NonGfPresent:1;
+	USHORT	rsv3:1;
+	USHORT	OBSS_NonHTExist:1;
+	USHORT	rsv2:11;
+#endif
+	
+	/* New Extension Channel Offset IE */
+	UCHAR	NewExtChannelOffset;	
+	/* Extension Capability IE = 127 */
+	UCHAR	BSSCoexist2040;	
+} RT_HT_CAPABILITY, *PRT_HT_CAPABILITY;
+
+/*   field in Addtional HT Information IE . */
+typedef struct GNU_PACKED {
+#ifdef RT_BIG_ENDIAN
+	UCHAR	SerInterGranu:3;
+	UCHAR	S_PSMPSup:1;
+	UCHAR	RifsMode:1; 
+	UCHAR	RecomWidth:1;	
+	UCHAR	ExtChanOffset:2;
+#else
+	UCHAR	ExtChanOffset:2;
+	UCHAR	RecomWidth:1;
+	UCHAR	RifsMode:1; 
+	UCHAR	S_PSMPSup:1;	 /*Indicate support for scheduled PSMP */
+	UCHAR	SerInterGranu:3;	 /*service interval granularity */
+#endif
+} ADD_HTINFO, *PADD_HTINFO;
+
+typedef struct GNU_PACKED{
+#ifdef RT_BIG_ENDIAN
+	USHORT	rsv2:11; 
+	USHORT	OBSS_NonHTExist:1;
+	USHORT	rsv:1;
+	USHORT	NonGfPresent:1;
+	USHORT	OperaionMode:2;	
+#else
+	USHORT	OperaionMode:2;
+	USHORT	NonGfPresent:1;
+	USHORT	rsv:1; 
+	USHORT	OBSS_NonHTExist:1;
+	USHORT	rsv2:11; 
+#endif
+} ADD_HTINFO2, *PADD_HTINFO2;
+
+
+/* TODO: Need sync with spec about the definition of StbcMcs. In Draft 3.03, it's reserved. */
+typedef struct GNU_PACKED{
+#ifdef RT_BIG_ENDIAN
+	USHORT	rsv:4;
+	USHORT	PcoPhase:1;
+	USHORT	PcoActive:1;
+	USHORT	LsigTxopProt:1;
+	USHORT	STBCBeacon:1;
+	USHORT	DualCTSProtect:1;
+	USHORT	DualBeacon:1;
+	USHORT	StbcMcs:6;
+#else
+	USHORT	StbcMcs:6;
+	USHORT	DualBeacon:1;
+	USHORT	DualCTSProtect:1; 
+	USHORT	STBCBeacon:1;
+	USHORT	LsigTxopProt:1;	/* L-SIG TXOP protection full support */
+	USHORT	PcoActive:1; 
+	USHORT	PcoPhase:1; 
+	USHORT	rsv:4; 
+#endif /* RT_BIG_ENDIAN */
+} ADD_HTINFO3, *PADD_HTINFO3;
+
+#define SIZE_ADD_HT_INFO_IE		22
+typedef struct  GNU_PACKED{
+	UCHAR				ControlChan;
+	ADD_HTINFO			AddHtInfo;
+	ADD_HTINFO2			AddHtInfo2;	 
+	ADD_HTINFO3			AddHtInfo3;	 
+	UCHAR				MCSSet[16];		/* Basic MCS set */
+} ADD_HT_INFO_IE, *PADD_HT_INFO_IE;
+
+typedef struct  GNU_PACKED{
+	UCHAR				NewExtChanOffset;
+} NEW_EXT_CHAN_IE, *PNEW_EXT_CHAN_IE;
+
+typedef struct GNU_PACKED _FRAME_802_11 {
+    HEADER_802_11   Hdr;
+    UCHAR            Octet[1];
+}   FRAME_802_11, *PFRAME_802_11;
+
+/* QoSNull embedding of management action. When HT Control MA field set to 1. */
+typedef struct GNU_PACKED _MA_BODY {
+    UCHAR            Category;
+    UCHAR            Action;
+    UCHAR            Octet[1];
+}   MA_BODY, *PMA_BODY;
+
+typedef	struct	GNU_PACKED _HEADER_802_3	{
+    UCHAR           DAAddr1[MAC_ADDR_LEN];
+    UCHAR           SAAddr2[MAC_ADDR_LEN];
+    UCHAR           Octet[2];
+}	HEADER_802_3, *PHEADER_802_3;
+/*//Block ACK related format */
+/* 2-byte BA Parameter  field  in 	DELBA frames to terminate an already set up bA */
+typedef struct GNU_PACKED{
+#ifdef RT_BIG_ENDIAN
+    USHORT      TID:4;	/* value of TC os TS */
+    USHORT      Initiator:1;	/* 1: originator    0:recipient */
+    USHORT      Rsv:11;	/* always set to 0 */
+#else
+    USHORT      Rsv:11;	/* always set to 0 */
+    USHORT      Initiator:1;	/* 1: originator    0:recipient */
+    USHORT      TID:4;	/* value of TC os TS */
+#endif /* !RT_BIG_ENDIAN */
+} DELBA_PARM, *PDELBA_PARM;
+
+/* 2-byte BA Parameter Set field  in ADDBA frames to signal parm for setting up a BA */
+typedef struct GNU_PACKED {
+#ifdef RT_BIG_ENDIAN
+    USHORT      BufSize:10;	/* number of buffe of size 2304 octetsr */
+    USHORT      TID:4;	/* value of TC os TS */
+    USHORT      BAPolicy:1;	/* 1: immediately BA    0:delayed BA */
+    USHORT      AMSDUSupported:1;	/* 0: not permitted		1: permitted */
+#else
+    USHORT      AMSDUSupported:1;	/* 0: not permitted		1: permitted */
+    USHORT      BAPolicy:1;	/* 1: immediately BA    0:delayed BA */
+    USHORT      TID:4;	/* value of TC os TS */
+    USHORT      BufSize:10;	/* number of buffe of size 2304 octetsr */
+#endif /* !RT_BIG_ENDIAN */
+} BA_PARM, *PBA_PARM;
+
+/* 2-byte BA Starting Seq CONTROL field */
+typedef union GNU_PACKED {
+    struct GNU_PACKED {
+#ifdef RT_BIG_ENDIAN
+    USHORT      StartSeq:12;   /* sequence number of the 1st MSDU for which this BAR is sent */
+	USHORT      FragNum:4;	/* always set to 0 */
+#else
+    USHORT      FragNum:4;	/* always set to 0 */
+	USHORT      StartSeq:12;   /* sequence number of the 1st MSDU for which this BAR is sent */
+#endif /* RT_BIG_ENDIAN */
+    }   field;
+    USHORT           word;
+} BASEQ_CONTROL, *PBASEQ_CONTROL;
+
+/*BAControl and BARControl are the same */
+/* 2-byte BA CONTROL field in BA frame */
+typedef struct GNU_PACKED {
+#ifdef RT_BIG_ENDIAN
+    USHORT      TID:4;
+    USHORT      Rsv:9;
+    USHORT      Compressed:1;
+    USHORT      MTID:1;		/*EWC V1.24 */
+    USHORT      ACKPolicy:1; /* only related to N-Delayed BA. But not support in RT2860b. 0:NormalACK  1:No ACK */
+#else
+    USHORT      ACKPolicy:1; /* only related to N-Delayed BA. But not support in RT2860b. 0:NormalACK  1:No ACK */
+    USHORT      MTID:1;		/*EWC V1.24 */
+    USHORT      Compressed:1;
+    USHORT      Rsv:9;
+    USHORT      TID:4;
+#endif /* !RT_BIG_ENDIAN */
+} BA_CONTROL, *PBA_CONTROL;
+
+/* 2-byte BAR CONTROL field in BAR frame */
+typedef struct GNU_PACKED {
+#ifdef RT_BIG_ENDIAN
+    USHORT      TID:4;
+    USHORT      Rsv1:9;
+    USHORT      Compressed:1;
+    USHORT      MTID:1;		/*if this bit1, use  FRAME_MTBA_REQ,  if 0, use FRAME_BA_REQ */
+    USHORT      ACKPolicy:1;
+#else
+    USHORT      ACKPolicy:1; /* 0:normal ack,  1:no ack. */
+    USHORT      MTID:1;		/*if this bit1, use  FRAME_MTBA_REQ,  if 0, use FRAME_BA_REQ */
+    USHORT      Compressed:1;
+    USHORT      Rsv1:9;
+    USHORT      TID:4;
+#endif /* !RT_BIG_ENDIAN */
+} BAR_CONTROL, *PBAR_CONTROL;
+
+/* BARControl in MTBAR frame */
+typedef struct GNU_PACKED {
+#ifdef RT_BIG_ENDIAN
+    USHORT      NumTID:4;
+    USHORT      Rsv1:9;
+    USHORT      Compressed:1;
+    USHORT      MTID:1;		
+    USHORT      ACKPolicy:1;
+#else
+    USHORT      ACKPolicy:1;
+    USHORT      MTID:1;		
+    USHORT      Compressed:1;
+    USHORT      Rsv1:9;
+    USHORT      NumTID:4;
+#endif /* !RT_BIG_ENDIAN */
+} MTBAR_CONTROL, *PMTBAR_CONTROL;
+
+typedef struct GNU_PACKED {
+#ifdef RT_BIG_ENDIAN
+    USHORT      TID:4;
+    USHORT      Rsv1:12;
+#else
+    USHORT      Rsv1:12;
+    USHORT      TID:4;
+#endif /* !RT_BIG_ENDIAN */
+} PER_TID_INFO, *PPER_TID_INFO;
+
+typedef struct {
+	PER_TID_INFO      PerTID;
+	BASEQ_CONTROL 	 BAStartingSeq;
+} EACH_TID, *PEACH_TID;
+
+
+/* BAREQ AND MTBAREQ have the same subtype BAR, 802.11n BAR use compressed bitmap. */
+typedef struct GNU_PACKED _FRAME_BA_REQ {
+	FRAME_CONTROL   FC;
+	USHORT          Duration;
+	UCHAR           Addr1[MAC_ADDR_LEN];
+	UCHAR           Addr2[MAC_ADDR_LEN];
+	BAR_CONTROL  BARControl;
+	BASEQ_CONTROL 	 BAStartingSeq;
+}   FRAME_BA_REQ, *PFRAME_BA_REQ;
+
+typedef struct GNU_PACKED _FRAME_MTBA_REQ {
+	FRAME_CONTROL   FC;
+	USHORT          Duration;
+	UCHAR           Addr1[MAC_ADDR_LEN];
+	UCHAR           Addr2[MAC_ADDR_LEN];
+	MTBAR_CONTROL  MTBARControl;
+	PER_TID_INFO	PerTIDInfo;
+	BASEQ_CONTROL 	 BAStartingSeq;
+}   FRAME_MTBA_REQ, *PFRAME_MTBA_REQ;
+
+/* Compressed format is mandantory in HT STA */
+typedef struct GNU_PACKED _FRAME_MTBA {
+	FRAME_CONTROL   FC;
+	USHORT          Duration;
+	UCHAR           Addr1[MAC_ADDR_LEN];
+	UCHAR           Addr2[MAC_ADDR_LEN];
+	BA_CONTROL  BAControl;
+	BASEQ_CONTROL 	 BAStartingSeq;
+	UCHAR		BitMap[8];
+}   FRAME_MTBA, *PFRAME_MTBA;
+
+typedef struct GNU_PACKED _FRAME_PSMP_ACTION {
+	HEADER_802_11   Hdr;
+	UCHAR	Category;
+	UCHAR	Action;
+	UCHAR	Psmp;	/* 7.3.1.25 */
+}   FRAME_PSMP_ACTION, *PFRAME_PSMP_ACTION;
+
+typedef struct GNU_PACKED _FRAME_ACTION_HDR {
+	HEADER_802_11   Hdr;
+	UCHAR	Category;
+	UCHAR	Action;
+}   FRAME_ACTION_HDR, *PFRAME_ACTION_HDR;
+
+/*Action Frame */
+/*Action Frame  Category:Spectrum,  Action:Channel Switch. 7.3.2.20 */
+typedef struct GNU_PACKED _CHAN_SWITCH_ANNOUNCE {
+	UCHAR					ElementID;	/* ID = IE_CHANNEL_SWITCH_ANNOUNCEMENT = 37 */
+	UCHAR					Len;
+	CHA_SWITCH_ANNOUNCE_IE	CSAnnounceIe;
+}   CHAN_SWITCH_ANNOUNCE, *PCHAN_SWITCH_ANNOUNCE;
+
+
+/*802.11n : 7.3.2.20a */
+typedef struct GNU_PACKED _SECOND_CHAN_OFFSET {
+	UCHAR				ElementID;		/* ID = IE_SECONDARY_CH_OFFSET = 62 */
+	UCHAR				Len;
+	SEC_CHA_OFFSET_IE	SecChOffsetIe;
+}   SECOND_CHAN_OFFSET, *PSECOND_CHAN_OFFSET;
+
+
+typedef struct GNU_PACKED _FRAME_SPETRUM_CS {
+	HEADER_802_11   Hdr;
+	UCHAR	Category;
+	UCHAR	Action;
+	CHAN_SWITCH_ANNOUNCE	CSAnnounce;
+	SECOND_CHAN_OFFSET		SecondChannel;
+}   FRAME_SPETRUM_CS, *PFRAME_SPETRUM_CS;
+
+
+typedef struct GNU_PACKED _FRAME_ADDBA_REQ {
+	HEADER_802_11   Hdr;
+	UCHAR	Category;
+	UCHAR	Action;
+	UCHAR	Token;	/* 1 */
+	BA_PARM		BaParm;	      /*  2 - 10 */
+	USHORT		TimeOutValue;	/* 0 - 0 */
+	BASEQ_CONTROL	BaStartSeq; /* 0-0 */
+}   FRAME_ADDBA_REQ, *PFRAME_ADDBA_REQ;
+
+typedef struct GNU_PACKED _FRAME_ADDBA_RSP {
+	HEADER_802_11   Hdr;
+	UCHAR	Category;
+	UCHAR	Action;
+	UCHAR	Token;
+	USHORT	StatusCode;
+	BA_PARM		BaParm; /*0 - 2 */
+	USHORT		TimeOutValue;
+}   FRAME_ADDBA_RSP, *PFRAME_ADDBA_RSP;
+
+typedef struct GNU_PACKED _FRAME_DELBA_REQ {
+	HEADER_802_11   Hdr;
+	UCHAR	Category;
+	UCHAR	Action;
+	DELBA_PARM		DelbaParm;
+	USHORT	ReasonCode;
+}   FRAME_DELBA_REQ, *PFRAME_DELBA_REQ;
+
+
+/*7.2.1.7 */
+typedef struct GNU_PACKED _FRAME_BAR {
+	FRAME_CONTROL   FC;
+	USHORT          Duration;
+	UCHAR           Addr1[MAC_ADDR_LEN];
+	UCHAR           Addr2[MAC_ADDR_LEN];
+	BAR_CONTROL		BarControl;
+	BASEQ_CONTROL	StartingSeq;
+}   FRAME_BAR, *PFRAME_BAR;
+
+/*7.2.1.7 */
+typedef struct GNU_PACKED _FRAME_BA {
+	FRAME_CONTROL   FC;
+	USHORT          Duration;
+	UCHAR           Addr1[MAC_ADDR_LEN];
+	UCHAR           Addr2[MAC_ADDR_LEN];
+	BAR_CONTROL		BarControl;
+	BASEQ_CONTROL	StartingSeq;
+	UCHAR		bitmask[8];
+}   FRAME_BA, *PFRAME_BA;
+
+
+/* Radio Measuement Request Frame Format */
+typedef struct GNU_PACKED _FRAME_RM_REQ_ACTION {
+	HEADER_802_11   Hdr;
+	UCHAR	Category;
+	UCHAR	Action;
+	UCHAR	Token;
+	USHORT	Repetition;
+	UCHAR   data[0];
+}   FRAME_RM_REQ_ACTION, *PFRAME_RM_REQ_ACTION;
+
+typedef struct GNU_PACKED {
+	UCHAR		ID;
+	UCHAR		Length;
+	UCHAR		ChannelSwitchMode;
+	UCHAR		NewRegClass;
+	UCHAR		NewChannelNum;
+	UCHAR		ChannelSwitchCount;
+} HT_EXT_CHANNEL_SWITCH_ANNOUNCEMENT_IE, *PHT_EXT_CHANNEL_SWITCH_ANNOUNCEMENT_IE;
+
+
+/* */
+/* _Limit must be the 2**n - 1 */
+/* _SEQ1 , _SEQ2 must be within 0 ~ _Limit */
+/* */
+#define SEQ_STEPONE(_SEQ1, _SEQ2, _Limit)	((_SEQ1 == ((_SEQ2+1) & _Limit)))
+#define SEQ_SMALLER(_SEQ1, _SEQ2, _Limit)	(((_SEQ1-_SEQ2) & ((_Limit+1)>>1)))
+#define SEQ_LARGER(_SEQ1, _SEQ2, _Limit)	((_SEQ1 != _SEQ2) && !(((_SEQ1-_SEQ2) & ((_Limit+1)>>1))))
+#define SEQ_WITHIN_WIN(_SEQ1, _SEQ2, _WIN, _Limit) (SEQ_LARGER(_SEQ1, _SEQ2, _Limit) &&  \
+												SEQ_SMALLER(_SEQ1, ((_SEQ2+_WIN+1)&_Limit), _Limit))
+
+/* */
+/* Contention-free parameter (without ID and Length) */
+/* */
+typedef struct GNU_PACKED {
+    BOOLEAN     bValid;         /* 1: variable contains valid value */
+    UCHAR       CfpCount;
+    UCHAR       CfpPeriod;
+    USHORT      CfpMaxDuration;
+    USHORT      CfpDurRemaining;
+} CF_PARM, *PCF_PARM;
+
+typedef	struct	_CIPHER_SUITE	{
+	NDIS_802_11_ENCRYPTION_STATUS	PairCipher;		/* Unicast cipher 1, this one has more secured cipher suite */
+	NDIS_802_11_ENCRYPTION_STATUS	PairCipherAux;	/* Unicast cipher 2 if AP announce two unicast cipher suite */
+	NDIS_802_11_ENCRYPTION_STATUS	GroupCipher;	/* Group cipher */
+	USHORT							RsnCapability;	/* RSN capability from beacon */
+	BOOLEAN							bMixMode;		/* Indicate Pair & Group cipher might be different */
+}	CIPHER_SUITE, *PCIPHER_SUITE;
+	
+/* EDCA configuration from AP's BEACON/ProbeRsp */
+typedef struct {
+    BOOLEAN     bValid;         /* 1: variable contains valid value */
+    BOOLEAN     bAdd;         /* 1: variable contains valid value */
+    BOOLEAN     bQAck;
+    BOOLEAN     bQueueRequest;
+    BOOLEAN     bTxopRequest;
+    BOOLEAN     bAPSDCapable;
+/*  BOOLEAN     bMoreDataAck; */
+    UCHAR       EdcaUpdateCount;
+    UCHAR       Aifsn[4];       /* 0:AC_BK, 1:AC_BE, 2:AC_VI, 3:AC_VO */
+    UCHAR       Cwmin[4];
+    UCHAR       Cwmax[4];
+    USHORT      Txop[4];      /* in unit of 32-us */
+    BOOLEAN     bACM[4];      /* 1: Admission Control of AC_BK is mandattory */
+} EDCA_PARM, *PEDCA_PARM;
+
+/* QBSS LOAD information from QAP's BEACON/ProbeRsp */
+typedef struct {
+    BOOLEAN     bValid;                     /* 1: variable contains valid value */
+    USHORT      StaNum;
+    UCHAR       ChannelUtilization;
+    USHORT      RemainingAdmissionControl;  /* in unit of 32-us */
+} QBSS_LOAD_PARM, *PQBSS_LOAD_PARM;
+
+/* QBSS Info field in QSTA's assoc req */
+typedef struct GNU_PACKED {
+#ifdef RT_BIG_ENDIAN
+	UCHAR		Rsv2:1;
+	UCHAR		MaxSPLength:2;
+	UCHAR		Rsv1:1;
+	UCHAR		UAPSD_AC_BE:1;
+	UCHAR		UAPSD_AC_BK:1;
+	UCHAR		UAPSD_AC_VI:1;
+	UCHAR		UAPSD_AC_VO:1;
+#else
+    UCHAR		UAPSD_AC_VO:1;
+	UCHAR		UAPSD_AC_VI:1;
+	UCHAR		UAPSD_AC_BK:1;
+	UCHAR		UAPSD_AC_BE:1;
+	UCHAR		Rsv1:1;
+	UCHAR		MaxSPLength:2;
+	UCHAR		Rsv2:1;
+#endif /* !RT_BIG_ENDIAN */
+} QBSS_STA_INFO_PARM, *PQBSS_STA_INFO_PARM;
+
+typedef struct {
+	QBSS_STA_INFO_PARM	QosInfo;
+	UCHAR	Rsv;
+	UCHAR	Q_AC_BE[4];
+	UCHAR	Q_AC_BK[4];
+	UCHAR	Q_AC_VI[4];
+	UCHAR	Q_AC_VO[4];
+} QBSS_STA_EDCA_PARM, *PQBSS_STA_EDCA_PARM;
+
+/* QBSS Info field in QAP's Beacon/ProbeRsp */
+typedef struct GNU_PACKED {
+#ifdef RT_BIG_ENDIAN
+	UCHAR		UAPSD:1;
+	UCHAR		Rsv:3;
+    UCHAR		ParamSetCount:4;
+#else
+    UCHAR		ParamSetCount:4;
+	UCHAR		Rsv:3;
+	UCHAR		UAPSD:1;
+#endif /* !RT_BIG_ENDIAN */
+} QBSS_AP_INFO_PARM, *PQBSS_AP_INFO_PARM;
+
+/* QOS Capability reported in QAP's BEACON/ProbeRsp */
+/* QOS Capability sent out in QSTA's AssociateReq/ReAssociateReq */
+typedef struct {
+    BOOLEAN     bValid;                     /* 1: variable contains valid value */
+    BOOLEAN     bQAck;
+    BOOLEAN     bQueueRequest;
+    BOOLEAN     bTxopRequest;
+/*  BOOLEAN     bMoreDataAck; */
+    UCHAR       EdcaUpdateCount;
+} QOS_CAPABILITY_PARM, *PQOS_CAPABILITY_PARM;
+
+#ifdef CONFIG_STA_SUPPORT
+typedef struct {
+    UCHAR       IELen;
+    UCHAR       IE[MAX_CUSTOM_LEN];
+} WPA_IE_;
+#endif /* CONFIG_STA_SUPPORT */
+
+
+typedef struct {
+    UCHAR   Bssid[MAC_ADDR_LEN];
+    UCHAR   Channel;
+	UCHAR   CentralChannel;	/*Store the wide-band central channel for 40MHz.  .used in 40MHz AP. Or this is the same as Channel. */
+    UCHAR   BssType;
+    USHORT  AtimWin;
+    USHORT  BeaconPeriod;
+
+    UCHAR   SupRate[MAX_LEN_OF_SUPPORTED_RATES];
+    UCHAR   SupRateLen;
+    UCHAR   ExtRate[MAX_LEN_OF_SUPPORTED_RATES];
+    UCHAR   ExtRateLen;
+	HT_CAPABILITY_IE HtCapability;
+	UCHAR			HtCapabilityLen;
+	ADD_HT_INFO_IE AddHtInfo;	/* AP might use this additional ht info IE */
+	UCHAR			AddHtInfoLen;
+	EXT_CAP_INFO_ELEMENT ExtCapInfo;	/* this is the extened capibility IE appreed in MGMT frames. Doesn't need to update once set in Init. */
+	UCHAR			NewExtChanOffset;
+	CHAR    Rssi;
+
+
+	CHAR	MinSNR;	
+    UCHAR   Privacy;			/* Indicate security function ON/OFF. Don't mess up with auth mode. */
+	UCHAR	Hidden;
+
+    USHORT  DtimPeriod;
+    USHORT  CapabilityInfo;
+
+    USHORT  CfpCount;
+    USHORT  CfpPeriod;
+    USHORT  CfpMaxDuration;
+    USHORT  CfpDurRemaining;
+    UCHAR   SsidLen;
+    CHAR    Ssid[MAX_LEN_OF_SSID];
+    
+	UCHAR	SameRxTimeCount;
+	ULONG   LastBeaconRxTimeA; /* OS's timestamp */
+    ULONG   LastBeaconRxTime; /* OS's timestamp */
+
+	BOOLEAN	bSES;
+
+	/* New for WPA2 */
+	CIPHER_SUITE					WPA;			/* AP announced WPA cipher suite */
+	CIPHER_SUITE					WPA2;			/* AP announced WPA2 cipher suite */
+
+	/* New for microsoft WPA support */
+	NDIS_802_11_FIXED_IEs	FixIEs;
+	NDIS_802_11_AUTHENTICATION_MODE	AuthModeAux;	/* Addition mode for WPA2 / WPA capable AP */
+	NDIS_802_11_AUTHENTICATION_MODE	AuthMode;	
+	NDIS_802_11_WEP_STATUS	WepStatus;				/* Unicast Encryption Algorithm extract from VAR_IE */
+	USHORT					VarIELen;				/* Length of next VIE include EID & Length */
+	UCHAR					VarIEs[MAX_VIE_LEN];
+	USHORT					VarIeFromProbeRspLen;
+	UCHAR					*pVarIeFromProbRsp;
+
+	/* CCX Ckip information */
+    UCHAR   CkipFlag;
+
+	/* CCX 2 TSF */
+	UCHAR	PTSF[4];		/* Parent TSF */
+	UCHAR	TTSF[8];		/* Target TSF */
+
+    /* 802.11e d9, and WMM */
+	EDCA_PARM           EdcaParm;
+	QOS_CAPABILITY_PARM QosCapability;
+	QBSS_LOAD_PARM      QbssLoad;
+
+
+
+#ifdef CONFIG_STA_SUPPORT
+    WPA_IE_     WpaIE;
+    WPA_IE_     RsnIE;
+	WPA_IE_ 	WpsIE;
+
+#ifdef EXT_BUILD_CHANNEL_LIST
+	UCHAR		CountryString[3];
+	BOOLEAN		bHasCountryIE;
+#endif /* EXT_BUILD_CHANNEL_LIST */
+#endif /* CONFIG_STA_SUPPORT */
+
+	UCHAR   MacAddr[MAC_ADDR_LEN];
+
+#ifdef LINUX
+#ifdef CONFIG_STA_SUPPORT
+#ifdef RT_CFG80211_SUPPORT
+	VOID *pCfg80211_Chan;
+#endif /* RT_CFG80211_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+#endif /* LINUX */
+} BSS_ENTRY, *PBSS_ENTRY;
+
+typedef struct {
+    UCHAR           BssNr;
+    UCHAR           BssOverlapNr;
+    BSS_ENTRY       BssEntry[MAX_LEN_OF_BSS_TABLE];
+} BSS_TABLE, *PBSS_TABLE;
+
+
+typedef struct _MLME_QUEUE_ELEM {
+	UCHAR             Msg[MGMT_DMA_BUFFER_SIZE];	/* move here to fix alignment issue for ARM CPU */
+    ULONG             Machine;
+    ULONG             MsgType;
+    ULONG             MsgLen;
+    LARGE_INTEGER     TimeStamp;
+    UCHAR             Rssi0;
+    UCHAR             Rssi1;
+    UCHAR             Rssi2;
+    UCHAR             Signal;
+    UCHAR             Channel;
+    UCHAR             Wcid;
+    BOOLEAN           Occupied;
+	UCHAR			  OpMode;
+	ULONG             Priv;
+} MLME_QUEUE_ELEM, *PMLME_QUEUE_ELEM;
+
+typedef struct _MLME_QUEUE {
+    ULONG             Num;
+    ULONG             Head;
+    ULONG             Tail;
+    NDIS_SPIN_LOCK   Lock;
+    MLME_QUEUE_ELEM  Entry[MAX_LEN_OF_MLME_QUEUE];
+} MLME_QUEUE, *PMLME_QUEUE;
+
+typedef VOID (*STATE_MACHINE_FUNC)(VOID *Adaptor, MLME_QUEUE_ELEM *Elem);
+
+typedef struct _STATE_MACHINE {
+    ULONG                           Base;
+    ULONG                           NrState;
+    ULONG                           NrMsg;
+    ULONG                           CurrState;
+    STATE_MACHINE_FUNC             *TransFunc;
+} STATE_MACHINE, *PSTATE_MACHINE;
+
+
+/* MLME AUX data structure that hold temporarliy settings during a connection attempt. */
+/* Once this attemp succeeds, all settings will be copy to pAd->StaActive. */
+/* A connection attempt (user set OID, roaming, CCX fast roaming,..) consists of */
+/* several steps (JOIN, AUTH, ASSOC or REASSOC) and may fail at any step. We purposely */
+/* separate this under-trial settings away from pAd->StaActive so that once */
+/* this new attempt failed, driver can auto-recover back to the active settings. */
+typedef struct _MLME_AUX {
+    UCHAR               BssType;
+    UCHAR               Ssid[MAX_LEN_OF_SSID];
+    UCHAR               SsidLen;
+    UCHAR               Bssid[MAC_ADDR_LEN];
+	UCHAR				AutoReconnectSsid[MAX_LEN_OF_SSID];
+	UCHAR				AutoReconnectSsidLen;
+    USHORT              Alg;
+    UCHAR               ScanType;
+    UCHAR               Channel;
+	UCHAR               CentralChannel;
+    USHORT              Aid;
+    USHORT              CapabilityInfo;
+    USHORT              BeaconPeriod;
+    USHORT              CfpMaxDuration;
+    USHORT              CfpPeriod;
+    USHORT              AtimWin;
+    
+	/* Copy supported rate from desired AP's beacon. We are trying to match */
+	/* AP's supported and extended rate settings. */
+	UCHAR		        SupRate[MAX_LEN_OF_SUPPORTED_RATES];
+	UCHAR		        ExtRate[MAX_LEN_OF_SUPPORTED_RATES];
+	UCHAR		        SupRateLen;
+	UCHAR		        ExtRateLen;
+	HT_CAPABILITY_IE		HtCapability;
+	UCHAR		        	HtCapabilityLen;
+	ADD_HT_INFO_IE		AddHtInfo;	/* AP might use this additional ht info IE */
+	EXT_CAP_INFO_ELEMENT ExtCapInfo; /* this is the extened capibility IE appreed in MGMT frames. Doesn't need to update once set in Init. */
+	UCHAR			NewExtChannelOffset;
+	/*RT_HT_CAPABILITY	SupportedHtPhy; */
+
+    /* new for QOS */
+    QOS_CAPABILITY_PARM APQosCapability;    /* QOS capability of the current associated AP */
+    EDCA_PARM           APEdcaParm;         /* EDCA parameters of the current associated AP */
+    QBSS_LOAD_PARM      APQbssLoad;         /* QBSS load of the current associated AP */
+
+    /* new to keep Ralink specific feature */
+    ULONG               APRalinkIe;
+    
+    BSS_TABLE           SsidBssTab;     /* AP list for the same SSID */
+    BSS_TABLE           RoamTab;        /* AP list eligible for roaming */
+    ULONG               BssIdx;
+    ULONG               RoamIdx;
+
+	BOOLEAN				CurrReqIsFromNdis;
+
+    RALINK_TIMER_STRUCT BeaconTimer, ScanTimer, APScanTimer;
+    RALINK_TIMER_STRUCT AuthTimer;
+    RALINK_TIMER_STRUCT AssocTimer, ReassocTimer, DisassocTimer;
+
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+
+} MLME_AUX, *PMLME_AUX;
+
+typedef struct _MLME_ADDBA_REQ_STRUCT{
+	UCHAR   Wcid;	/* */
+	UCHAR   pAddr[MAC_ADDR_LEN];
+	UCHAR   BaBufSize;
+	USHORT	TimeOutValue;
+	UCHAR   TID;
+	UCHAR   Token;
+	USHORT	BaStartSeq;
+} MLME_ADDBA_REQ_STRUCT, *PMLME_ADDBA_REQ_STRUCT;
+
+
+typedef struct _MLME_DELBA_REQ_STRUCT{
+	UCHAR   Wcid;	/* */
+	UCHAR     Addr[MAC_ADDR_LEN];
+	UCHAR   TID;
+	UCHAR	Initiator;
+} MLME_DELBA_REQ_STRUCT, *PMLME_DELBA_REQ_STRUCT;
+
+/* assoc struct is equal to reassoc */
+typedef struct _MLME_ASSOC_REQ_STRUCT{
+    UCHAR     Addr[MAC_ADDR_LEN];
+    USHORT    CapabilityInfo;
+    USHORT    ListenIntv;
+    ULONG     Timeout;
+} MLME_ASSOC_REQ_STRUCT, *PMLME_ASSOC_REQ_STRUCT, MLME_REASSOC_REQ_STRUCT, *PMLME_REASSOC_REQ_STRUCT;
+
+typedef struct _MLME_DISASSOC_REQ_STRUCT{
+    UCHAR     Addr[MAC_ADDR_LEN];
+    USHORT    Reason;
+} MLME_DISASSOC_REQ_STRUCT, *PMLME_DISASSOC_REQ_STRUCT;
+
+typedef struct _MLME_AUTH_REQ_STRUCT {
+    UCHAR        Addr[MAC_ADDR_LEN];
+    USHORT       Alg;
+    ULONG        Timeout;
+} MLME_AUTH_REQ_STRUCT, *PMLME_AUTH_REQ_STRUCT;
+
+typedef struct _MLME_DEAUTH_REQ_STRUCT {
+    UCHAR        Addr[MAC_ADDR_LEN];
+    USHORT       Reason;
+} MLME_DEAUTH_REQ_STRUCT, *PMLME_DEAUTH_REQ_STRUCT;
+
+typedef struct {
+    ULONG      BssIdx;
+} MLME_JOIN_REQ_STRUCT;
+
+typedef struct _MLME_SCAN_REQ_STRUCT {
+    UCHAR      Bssid[MAC_ADDR_LEN];
+    UCHAR      BssType;
+    UCHAR      ScanType;
+    UCHAR      SsidLen;
+    CHAR       Ssid[MAX_LEN_OF_SSID];
+} MLME_SCAN_REQ_STRUCT, *PMLME_SCAN_REQ_STRUCT;
+
+typedef struct _MLME_START_REQ_STRUCT {
+    CHAR        Ssid[MAX_LEN_OF_SSID];
+    UCHAR       SsidLen;
+} MLME_START_REQ_STRUCT, *PMLME_START_REQ_STRUCT;
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef QOS_DLS_SUPPORT
+/* structure for DLS */
+typedef struct _RT_802_11_DLS {
+	USHORT						TimeOut;		/* Use to time out while slience, unit: second , set by UI */
+	USHORT						CountDownTimer;	/* Use to time out while slience,unit: second , used by driver only */
+	NDIS_802_11_MAC_ADDRESS		MacAddr;		/* set by UI */
+	UCHAR						Status;			/* 0: none , 1: wait STAkey, 2: finish DLS setup , set by driver only */
+	BOOLEAN						Valid;			/* 1: valid , 0: invalid , set by UI, use to setup or tear down DLS link */
+	RALINK_TIMER_STRUCT			Timer;			/* Use to time out while handshake */
+	USHORT						Sequence;
+	USHORT						MacTabMatchWCID;	/* ASIC */
+	BOOLEAN						bHTCap;
+	PVOID						pAd;
+} RT_802_11_DLS, *PRT_802_11_DLS;
+
+typedef struct _MLME_DLS_REQ_STRUCT {
+    PRT_802_11_DLS	pDLS;
+    USHORT			Reason;
+} MLME_DLS_REQ_STRUCT, *PMLME_DLS_REQ_STRUCT;
+#endif /* QOS_DLS_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+
+typedef struct GNU_PACKED {
+    UCHAR   Eid;
+    UCHAR   Len;
+    UCHAR   Octet[1];
+} EID_STRUCT,*PEID_STRUCT, BEACON_EID_STRUCT, *PBEACON_EID_STRUCT;
+
+typedef struct GNU_PACKED _RTMP_TX_RATE_SWITCH
+{
+	UCHAR   ItemNo;
+#ifdef RT_BIG_ENDIAN
+	UCHAR	Rsv2:2;
+	UCHAR	Mode:2;
+	UCHAR	Rsv1:1;	
+	UCHAR	BW:1;
+	UCHAR	ShortGI:1;
+	UCHAR	STBC:1;
+#else
+	UCHAR	STBC:1;
+	UCHAR	ShortGI:1;
+	UCHAR	BW:1;
+	UCHAR	Rsv1:1;
+	UCHAR	Mode:2;
+	UCHAR	Rsv2:2;
+#endif	
+	UCHAR   CurrMCS;
+	UCHAR   TrainUp;
+	UCHAR   TrainDown;
+} RRTMP_TX_RATE_SWITCH, *PRTMP_TX_RATE_SWITCH;
+
+typedef struct  _RTMP_TX_RATE_SWITCH_3S
+{
+	UCHAR   ItemNo;
+#ifdef RT_BIG_ENDIAN
+	UCHAR	Rsv2:2;
+	UCHAR	Mode:2;
+	UCHAR	Rsv1:1;	
+	UCHAR	BW:1;
+	UCHAR	ShortGI:1;
+	UCHAR	STBC:1;
+#else
+	UCHAR	STBC:1;
+	UCHAR	ShortGI:1;
+	UCHAR	BW:1;
+	UCHAR	Rsv1:1;
+	UCHAR	Mode:2;
+	UCHAR	Rsv2:2;
+#endif	
+	UCHAR   CurrMCS;
+	UCHAR   TrainUp;
+	UCHAR   TrainDown;
+	UCHAR	downMcs;
+	UCHAR	upMcs3;
+	UCHAR	upMcs2;
+	UCHAR	upMcs1;
+	UCHAR	dataRate;
+} RRTMP_TX_RATE_SWITCH_3S, *PRTMP_TX_RATE_SWITCH_3S;
+
+/* ========================== AP mlme.h =============================== */
+#define TBTT_PRELOAD_TIME       384        /* usec. LomgPreamble + 24-byte at 1Mbps */
+#define DEFAULT_DTIM_PERIOD     1
+
+/* weighting factor to calculate Channel quality, total should be 100% */
+/*#define RSSI_WEIGHTING                   0 */
+/*#define TX_WEIGHTING                     40 */
+/*#define RX_WEIGHTING                     60 */
+
+#define MAC_TABLE_AGEOUT_TIME			300			/* unit: sec */
+#define MAC_TABLE_MIN_AGEOUT_TIME		60			/* unit: sec */
+#define MAC_TABLE_ASSOC_TIMEOUT			5			/* unit: sec */
+#define MAC_TABLE_FULL(Tab)				((Tab).size == MAX_LEN_OF_MAC_TABLE)
+
+/* AP shall drop the sta if contine Tx fail count reach it. */
+#define MAC_ENTRY_LIFE_CHECK_CNT		1024			/* packet cnt. */
+
+/* Value domain of pMacEntry->Sst */
+typedef enum _Sst {
+    SST_NOT_AUTH,   /* 0: equivalent to IEEE 802.11/1999 state 1 */
+    SST_AUTH,       /* 1: equivalent to IEEE 802.11/1999 state 2 */
+    SST_ASSOC       /* 2: equivalent to IEEE 802.11/1999 state 3 */
+} SST;
+
+/* value domain of pMacEntry->AuthState */
+typedef enum _AuthState {
+    AS_NOT_AUTH,
+    AS_AUTH_OPEN,       /* STA has been authenticated using OPEN SYSTEM */
+    AS_AUTH_KEY,        /* STA has been authenticated using SHARED KEY */
+    AS_AUTHENTICATING   /* STA is waiting for AUTH seq#3 using SHARED KEY */
+} AUTH_STATE;
+
+/* ====================== end of AP mlme.h ============================ */
+
+
+#endif	/* MLME_H__ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/netif_block.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/netif_block.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/netif_block.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/netif_block.h	2017-09-23 03:42:49.790675761 +0800
@@ -0,0 +1,57 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __NET_IF_BLOCK_H__
+#define __NET_IF_BLOCK_H__
+
+#include "link_list.h"
+#include "rtmp.h"
+
+#define FREE_NETIF_POOL_SIZE 32
+
+typedef struct _NETIF_ENTRY
+{
+	struct _NETIF_ENTRY *pNext;
+	PNET_DEV pNetDev;
+} NETIF_ENTRY, *PNETIF_ENTRY;
+
+void initblockQueueTab(
+	IN PRTMP_ADAPTER pAd);
+
+BOOLEAN blockNetIf(
+	IN PBLOCK_QUEUE_ENTRY pBlockQueueEntry,
+	IN PNET_DEV pNetDev);
+
+VOID releaseNetIf(
+	IN PBLOCK_QUEUE_ENTRY pBlockQueueEntry);
+
+VOID StopNetIfQueue(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR QueIdx,
+	IN PNDIS_PACKET pPacket);
+#endif /* __NET_IF_BLOCK_H__ */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/oid.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/oid.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/oid.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/oid.h	2017-09-23 03:42:49.790675761 +0800
@@ -0,0 +1,1215 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef _OID_H_
+#define _OID_H_
+
+/*#include <linux/wireless.h> */
+
+
+
+/* new types for Media Specific Indications */
+/* Extension channel offset */
+#define EXTCHA_NONE			0
+#define EXTCHA_ABOVE		0x1
+#define EXTCHA_BELOW		0x3
+
+/* BW */
+#define BAND_WIDTH_20		0
+#define BAND_WIDTH_40		1
+#define BAND_WIDTH_BOTH		2
+#define BAND_WIDTH_10		3	/* 802.11j has 10MHz. This definition is for internal usage. doesn't fill in the IE or other field. */
+/* SHORTGI */
+#define GAP_INTERVAL_400	1	/* only support in HT mode */
+#define GAP_INTERVAL_800	0
+#define GAP_INTERVAL_BOTH	2
+
+#define NdisMediaStateConnected			1
+#define NdisMediaStateDisconnected		0
+
+#define NdisApMediaStateConnected			1
+#define NdisApMediaStateDisconnected		0
+
+
+#define NDIS_802_11_LENGTH_SSID         32
+
+#define	IEEE80211_ADDR_LEN		6	/* size of 802.11 address */
+#define	IEEE80211_NWID_LEN      32
+
+#define NDIS_802_11_LENGTH_RATES        8
+#define NDIS_802_11_LENGTH_RATES_EX     16
+#define MAC_ADDR_LENGTH                 6
+/*#define MAX_NUM_OF_CHS					49 // 14 channels @2.4G +  12@UNII + 4 @MMAC + 11 @HiperLAN2 + 7 @Japan + 1 as NULL terminationc */
+#define MAX_NUM_OF_CHS             		54	/* 14 channels @2.4G +  12@UNII(lower/middle) + 16@HiperLAN2 + 11@UNII(upper) + 0 @Japan + 1 as NULL termination */
+#define MAX_NUMBER_OF_EVENT				10	/* entry # in EVENT table */
+#define MAX_NUMBER_OF_MAC				32	/* if MAX_MBSSID_NUM is 8, this value can't be larger than 211 */
+#define MAX_NUMBER_OF_ACL				64
+#define MAX_LENGTH_OF_SUPPORT_RATES		12	/* 1, 2, 5.5, 11, 6, 9, 12, 18, 24, 36, 48, 54 */
+#define MAX_NUMBER_OF_DLS_ENTRY			4
+
+
+#define RT_QUERY_SIGNAL_CONTEXT				0x0402
+#define RT_SET_IAPP_PID                 	0x0404
+#define RT_SET_APD_PID						0x0405
+#define RT_SET_DEL_MAC_ENTRY				0x0406
+#define RT_QUERY_EVENT_TABLE            	0x0407
+/* */
+/* IEEE 802.11 OIDs */
+/* */
+#define	OID_GET_SET_TOGGLE			0x8000
+#define	OID_GET_SET_FROM_UI			0x4000
+
+#define	OID_802_11_NETWORK_TYPES_SUPPORTED			0x0103
+#define	OID_802_11_NETWORK_TYPE_IN_USE				0x0104
+#define	OID_802_11_RSSI_TRIGGER						0x0107
+#define	RT_OID_802_11_RSSI							0x0108	/*rt2860 only , kathy */
+#define	RT_OID_802_11_RSSI_1						0x0109	/*rt2860 only , kathy */
+#define	RT_OID_802_11_RSSI_2						0x010A	/*rt2860 only , kathy */
+#define	OID_802_11_NUMBER_OF_ANTENNAS				0x010B
+#define	OID_802_11_RX_ANTENNA_SELECTED				0x010C
+#define	OID_802_11_TX_ANTENNA_SELECTED				0x010D
+#define	OID_802_11_SUPPORTED_RATES					0x010E
+#define	OID_802_11_ADD_WEP							0x0112
+#define	OID_802_11_REMOVE_WEP						0x0113
+#define	OID_802_11_DISASSOCIATE						0x0114
+#define	OID_802_11_PRIVACY_FILTER					0x0118
+#define	OID_802_11_ASSOCIATION_INFORMATION			0x011E
+#define	OID_802_11_TEST								0x011F
+
+
+#define	RT_OID_802_11_COUNTRY_REGION				0x0507
+#define	OID_802_11_BSSID_LIST_SCAN					0x0508
+#define	OID_802_11_SSID								0x0509
+#define	OID_802_11_BSSID							0x050A
+#define	RT_OID_802_11_RADIO							0x050B
+#define	RT_OID_802_11_PHY_MODE						0x050C
+#define	RT_OID_802_11_STA_CONFIG					0x050D
+#define	OID_802_11_DESIRED_RATES					0x050E
+#define	RT_OID_802_11_PREAMBLE						0x050F
+#define	OID_802_11_WEP_STATUS						0x0510
+#define	OID_802_11_AUTHENTICATION_MODE				0x0511
+#define	OID_802_11_INFRASTRUCTURE_MODE				0x0512
+#define	RT_OID_802_11_RESET_COUNTERS				0x0513
+#define	OID_802_11_RTS_THRESHOLD					0x0514
+#define	OID_802_11_FRAGMENTATION_THRESHOLD			0x0515
+#define	OID_802_11_POWER_MODE						0x0516
+#define	OID_802_11_TX_POWER_LEVEL					0x0517
+#define	RT_OID_802_11_ADD_WPA						0x0518
+#define	OID_802_11_REMOVE_KEY						0x0519
+#define	OID_802_11_ADD_KEY							0x0520
+#define	OID_802_11_CONFIGURATION					0x0521
+#define	OID_802_11_TX_PACKET_BURST					0x0522
+#define	RT_OID_802_11_QUERY_NOISE_LEVEL				0x0523
+#define	RT_OID_802_11_EXTRA_INFO					0x0524
+#define	RT_OID_802_11_HARDWARE_REGISTER				0x0525
+#define OID_802_11_ENCRYPTION_STATUS            OID_802_11_WEP_STATUS
+#define OID_802_11_DEAUTHENTICATION                 0x0526
+#define OID_802_11_DROP_UNENCRYPTED                 0x0527
+#define OID_802_11_MIC_FAILURE_REPORT_FRAME         0x0528
+#define OID_802_11_EAP_METHOD						0x0529
+
+/* For 802.1x daemin using */
+#ifdef DOT1X_SUPPORT
+#define OID_802_DOT1X_CONFIGURATION					0x0540
+#define OID_802_DOT1X_PMKID_CACHE					0x0541
+#define OID_802_DOT1X_RADIUS_DATA					0x0542
+#define OID_802_DOT1X_WPA_KEY						0x0543
+#define OID_802_DOT1X_STATIC_WEP_COPY				0x0544
+#define OID_802_DOT1X_IDLE_TIMEOUT					0x0545
+#endif /* DOT1X_SUPPORT */
+
+#define	RT_OID_DEVICE_NAME							0x0607
+#define	RT_OID_VERSION_INFO							0x0608
+#define	OID_802_11_BSSID_LIST						0x0609
+#define	OID_802_3_CURRENT_ADDRESS					0x060A
+#define	OID_GEN_MEDIA_CONNECT_STATUS				0x060B
+#define	RT_OID_802_11_QUERY_LINK_STATUS				0x060C
+#define	OID_802_11_RSSI								0x060D
+#define	OID_802_11_STATISTICS						0x060E
+#define	OID_GEN_RCV_OK								0x060F
+#define	OID_GEN_RCV_NO_BUFFER						0x0610
+#define	RT_OID_802_11_QUERY_EEPROM_VERSION			0x0611
+#define	RT_OID_802_11_QUERY_FIRMWARE_VERSION		0x0612
+#define	RT_OID_802_11_QUERY_LAST_RX_RATE			0x0613
+#define	RT_OID_802_11_TX_POWER_LEVEL_1				0x0614
+#define	RT_OID_802_11_QUERY_PIDVID					0x0615
+/*for WPA_SUPPLICANT_SUPPORT */
+#define OID_SET_COUNTERMEASURES                     0x0616
+#define OID_802_11_SET_IEEE8021X                    0x0617
+#define OID_802_11_SET_IEEE8021X_REQUIRE_KEY        0x0618
+#define OID_802_11_PMKID                            0x0620
+#define RT_OID_WPA_SUPPLICANT_SUPPORT               0x0621
+#define RT_OID_WE_VERSION_COMPILED                  0x0622
+#define RT_OID_NEW_DRIVER                           0x0623
+#define	OID_AUTO_PROVISION_BSSID_LIST				0x0624
+#define RT_OID_WPS_PROBE_REQ_IE						0x0625
+
+#define	RT_OID_802_11_SNR_0							0x0630
+#define	RT_OID_802_11_SNR_1							0x0631
+#define	RT_OID_802_11_QUERY_LAST_TX_RATE			0x0632
+#define	RT_OID_802_11_QUERY_HT_PHYMODE				0x0633
+#define	RT_OID_802_11_SET_HT_PHYMODE				0x0634
+#define	OID_802_11_RELOAD_DEFAULTS					0x0635
+#define	RT_OID_802_11_QUERY_APSD_SETTING			0x0636
+#define	RT_OID_802_11_SET_APSD_SETTING				0x0637
+#define	RT_OID_802_11_QUERY_APSD_PSM				0x0638
+#define	RT_OID_802_11_SET_APSD_PSM					0x0639
+#define	RT_OID_802_11_QUERY_DLS						0x063A
+#define	RT_OID_802_11_SET_DLS						0x063B
+#define	RT_OID_802_11_QUERY_DLS_PARAM				0x063C
+#define	RT_OID_802_11_SET_DLS_PARAM					0x063D
+#define RT_OID_802_11_QUERY_WMM              		0x063E
+#define RT_OID_802_11_SET_WMM      					0x063F
+#define RT_OID_802_11_QUERY_IMME_BA_CAP				0x0640
+#define RT_OID_802_11_SET_IMME_BA_CAP				0x0641
+#define RT_OID_802_11_QUERY_BATABLE					0x0642
+#define RT_OID_802_11_ADD_IMME_BA					0x0643
+#define RT_OID_802_11_TEAR_IMME_BA					0x0644
+#define RT_OID_DRIVER_DEVICE_NAME                   0x0645
+#define RT_OID_802_11_QUERY_DAT_HT_PHYMODE          0x0646
+#define RT_OID_QUERY_MULTIPLE_CARD_SUPPORT          0x0647
+#define OID_802_11_SET_PSPXLINK_MODE				0x0648
+/*+++ add by woody +++*/
+#define OID_802_11_SET_PASSPHRASE				0x0649
+#define RT_OID_802_11_QUERY_TX_PHYMODE                          0x0650
+#define RT_OID_802_11_QUERY_MAP_REAL_TX_RATE                          0x0678
+#define RT_OID_802_11_QUERY_MAP_REAL_RX_RATE                          0x0679
+#define	RT_OID_802_11_SNR_2							0x067A
+
+
+#ifdef HOSTAPD_SUPPORT
+#define SIOCSIWGENIE	0x8B30
+#define OID_HOSTAPD_SUPPORT               0x0661
+
+#define HOSTAPD_OID_STATIC_WEP_COPY   0x0662
+#define HOSTAPD_OID_GET_1X_GROUP_KEY   0x0663
+
+#define HOSTAPD_OID_SET_STA_AUTHORIZED   0x0664
+#define HOSTAPD_OID_SET_STA_DISASSOC   0x0665
+#define HOSTAPD_OID_SET_STA_DEAUTH   0x0666
+#define HOSTAPD_OID_DEL_KEY   0x0667
+#define HOSTAPD_OID_SET_KEY   0x0668
+#define HOSTAPD_OID_SET_802_1X   0x0669
+#define HOSTAPD_OID_GET_SEQ   0x0670
+#define HOSTAPD_OID_GETWPAIE                 0x0671
+#define HOSTAPD_OID_COUNTERMEASURES 0x0672
+#define HOSTAPD_OID_SET_WPAPSK 0x0673
+#define HOSTAPD_OID_SET_WPS_BEACON_IE 0x0674
+#define HOSTAPD_OID_SET_WPS_PROBE_RESP_IE 0x0675
+
+#define	RT_HOSTAPD_OID_HOSTAPD_SUPPORT				(OID_GET_SET_TOGGLE |	OID_HOSTAPD_SUPPORT)
+#define	RT_HOSTAPD_OID_STATIC_WEP_COPY				(OID_GET_SET_TOGGLE |	HOSTAPD_OID_STATIC_WEP_COPY)
+#define	RT_HOSTAPD_OID_GET_1X_GROUP_KEY				(OID_GET_SET_TOGGLE |	HOSTAPD_OID_GET_1X_GROUP_KEY)
+#define	RT_HOSTAPD_OID_SET_STA_AUTHORIZED			(OID_GET_SET_TOGGLE |	HOSTAPD_OID_SET_STA_AUTHORIZED)
+#define	RT_HOSTAPD_OID_SET_STA_DISASSOC				(OID_GET_SET_TOGGLE |	HOSTAPD_OID_SET_STA_DISASSOC)
+#define	RT_HOSTAPD_OID_SET_STA_DEAUTH				(OID_GET_SET_TOGGLE |	HOSTAPD_OID_SET_STA_DEAUTH)
+#define	RT_HOSTAPD_OID_DEL_KEY						(OID_GET_SET_TOGGLE |	HOSTAPD_OID_DEL_KEY)
+#define	RT_HOSTAPD_OID_SET_KEY						(OID_GET_SET_TOGGLE |	HOSTAPD_OID_SET_KEY)
+#define	RT_HOSTAPD_OID_SET_802_1X						(OID_GET_SET_TOGGLE |	HOSTAPD_OID_SET_802_1X)
+#define	RT_HOSTAPD_OID_COUNTERMEASURES				(OID_GET_SET_TOGGLE |	HOSTAPD_OID_COUNTERMEASURES)
+#define	RT_HOSTAPD_OID_SET_WPAPSK				(OID_GET_SET_TOGGLE |	HOSTAPD_OID_SET_WPAPSK)
+#define	RT_HOSTAPD_OID_SET_WPS_BEACON_IE				(OID_GET_SET_TOGGLE |	HOSTAPD_OID_SET_WPS_BEACON_IE)
+#define	RT_HOSTAPD_OID_SET_WPS_PROBE_RESP_IE				(OID_GET_SET_TOGGLE |	HOSTAPD_OID_SET_WPS_PROBE_RESP_IE)
+
+#define IEEE80211_IS_MULTICAST(_a) (*(_a) & 0x01)
+#define	IEEE80211_KEYBUF_SIZE	16
+#define	IEEE80211_MICBUF_SIZE	(8 + 8)	/* space for both tx+rx keys */
+#define IEEE80211_TID_SIZE		17	/* total number of TIDs */
+
+#define	IEEE80211_MLME_ASSOC		    1	/* associate station */
+#define	IEEE80211_MLME_DISASSOC		    2	/* disassociate station */
+#define	IEEE80211_MLME_DEAUTH		    3	/* deauthenticate station */
+#define	IEEE80211_MLME_AUTHORIZE	    4	/* authorize station */
+#define	IEEE80211_MLME_UNAUTHORIZE	    5	/* unauthorize station */
+#define IEEE80211_MLME_CLEAR_STATS	    6	/* clear station statistic */
+#define IEEE80211_1X_COPY_KEY        	7	/* copy static-wep unicast key */
+
+#define	IEEE80211_MAX_OPT_IE	256
+#define IWEVEXPIRED	0x8C04
+
+struct ieee80211req_mlme {
+	UINT8 im_op;		/* operation to perform */
+	UINT8 im_ssid_len;	/* length of optional ssid */
+	UINT16 im_reason;	/* 802.11 reason code */
+	UINT8 im_macaddr[IEEE80211_ADDR_LEN];
+	UINT8 im_ssid[IEEE80211_NWID_LEN];
+};
+
+struct ieee80211req_key {
+	UINT8 ik_type;		/* key/cipher type */
+	UINT8 ik_pad;
+	UINT16 ik_keyix;	/* key index */
+	UINT8 ik_keylen;	/* key length in bytes */
+	UINT8 ik_flags;
+	UINT8 ik_macaddr[IEEE80211_ADDR_LEN];
+	UINT64 ik_keyrsc;	/* key receive sequence counter */
+	UINT64 ik_keytsc;	/* key transmit sequence counter */
+	UINT8 ik_keydata[IEEE80211_KEYBUF_SIZE + IEEE80211_MICBUF_SIZE];
+	int txkey;
+};
+
+struct ieee80211req_del_key {
+	UINT8 idk_keyix;	/* key index */
+	UINT8 idk_macaddr[IEEE80211_ADDR_LEN];
+};
+
+struct default_group_key {
+	UINT16 ik_keyix;	/* key index */
+	UINT8 ik_keylen;	/* key length in bytes */
+	UINT8 ik_keydata[IEEE80211_KEYBUF_SIZE + IEEE80211_MICBUF_SIZE];
+};
+
+struct ieee80211req_wpaie {
+	UINT8 wpa_macaddr[IEEE80211_ADDR_LEN];
+	UINT8 rsn_ie[IEEE80211_MAX_OPT_IE];
+};
+
+struct hostapd_wpa_psk {
+	struct hostapd_wpa_psk *next;
+	int group;
+	UCHAR psk[32];
+	UCHAR addr[6];
+};
+
+#endif /*HOSTAPD_SUPPORT */
+
+#define RT_OID_802_11_QUERY_TDLS_PARAM			0x0676
+#define	RT_OID_802_11_QUERY_TDLS				0x0677
+
+/* Ralink defined OIDs */
+/* Dennis Lee move to platform specific */
+
+#define	RT_OID_802_11_BSSID					  (OID_GET_SET_TOGGLE |	OID_802_11_BSSID)
+#define	RT_OID_802_11_SSID					  (OID_GET_SET_TOGGLE |	OID_802_11_SSID)
+#define	RT_OID_802_11_INFRASTRUCTURE_MODE	  (OID_GET_SET_TOGGLE |	OID_802_11_INFRASTRUCTURE_MODE)
+#define	RT_OID_802_11_ADD_WEP				  (OID_GET_SET_TOGGLE |	OID_802_11_ADD_WEP)
+#define	RT_OID_802_11_ADD_KEY				  (OID_GET_SET_TOGGLE |	OID_802_11_ADD_KEY)
+#define	RT_OID_802_11_REMOVE_WEP			  (OID_GET_SET_TOGGLE |	OID_802_11_REMOVE_WEP)
+#define	RT_OID_802_11_REMOVE_KEY			  (OID_GET_SET_TOGGLE |	OID_802_11_REMOVE_KEY)
+#define	RT_OID_802_11_DISASSOCIATE			  (OID_GET_SET_TOGGLE |	OID_802_11_DISASSOCIATE)
+#define	RT_OID_802_11_AUTHENTICATION_MODE	  (OID_GET_SET_TOGGLE |	OID_802_11_AUTHENTICATION_MODE)
+#define	RT_OID_802_11_PRIVACY_FILTER		  (OID_GET_SET_TOGGLE |	OID_802_11_PRIVACY_FILTER)
+#define	RT_OID_802_11_BSSID_LIST_SCAN		  (OID_GET_SET_TOGGLE |	OID_802_11_BSSID_LIST_SCAN)
+#define	RT_OID_802_11_WEP_STATUS			  (OID_GET_SET_TOGGLE |	OID_802_11_WEP_STATUS)
+#define	RT_OID_802_11_RELOAD_DEFAULTS		  (OID_GET_SET_TOGGLE |	OID_802_11_RELOAD_DEFAULTS)
+#define	RT_OID_802_11_NETWORK_TYPE_IN_USE	  (OID_GET_SET_TOGGLE |	OID_802_11_NETWORK_TYPE_IN_USE)
+#define	RT_OID_802_11_TX_POWER_LEVEL		  (OID_GET_SET_TOGGLE |	OID_802_11_TX_POWER_LEVEL)
+#define	RT_OID_802_11_RSSI_TRIGGER			  (OID_GET_SET_TOGGLE |	OID_802_11_RSSI_TRIGGER)
+#define	RT_OID_802_11_FRAGMENTATION_THRESHOLD (OID_GET_SET_TOGGLE |	OID_802_11_FRAGMENTATION_THRESHOLD)
+#define	RT_OID_802_11_RTS_THRESHOLD			  (OID_GET_SET_TOGGLE |	OID_802_11_RTS_THRESHOLD)
+#define	RT_OID_802_11_RX_ANTENNA_SELECTED	  (OID_GET_SET_TOGGLE |	OID_802_11_RX_ANTENNA_SELECTED)
+#define	RT_OID_802_11_TX_ANTENNA_SELECTED	  (OID_GET_SET_TOGGLE |	OID_802_11_TX_ANTENNA_SELECTED)
+#define	RT_OID_802_11_SUPPORTED_RATES		  (OID_GET_SET_TOGGLE |	OID_802_11_SUPPORTED_RATES)
+#define	RT_OID_802_11_DESIRED_RATES			  (OID_GET_SET_TOGGLE |	OID_802_11_DESIRED_RATES)
+#define	RT_OID_802_11_CONFIGURATION			  (OID_GET_SET_TOGGLE |	OID_802_11_CONFIGURATION)
+#define	RT_OID_802_11_POWER_MODE			  (OID_GET_SET_TOGGLE |	OID_802_11_POWER_MODE)
+#define RT_OID_802_11_SET_PSPXLINK_MODE		  (OID_GET_SET_TOGGLE |	OID_802_11_SET_PSPXLINK_MODE)
+#define RT_OID_802_11_EAP_METHOD			  (OID_GET_SET_TOGGLE | OID_802_11_EAP_METHOD)
+#define RT_OID_802_11_SET_PASSPHRASE		  (OID_GET_SET_TOGGLE | OID_802_11_SET_PASSPHRASE)
+
+#ifdef DOT1X_SUPPORT
+#define RT_OID_802_DOT1X_PMKID_CACHE		(OID_GET_SET_TOGGLE | OID_802_DOT1X_PMKID_CACHE)
+#define RT_OID_802_DOT1X_RADIUS_DATA		(OID_GET_SET_TOGGLE | OID_802_DOT1X_RADIUS_DATA)
+#define RT_OID_802_DOT1X_WPA_KEY			(OID_GET_SET_TOGGLE | OID_802_DOT1X_WPA_KEY)
+#define RT_OID_802_DOT1X_STATIC_WEP_COPY	(OID_GET_SET_TOGGLE | OID_802_DOT1X_STATIC_WEP_COPY)
+#define RT_OID_802_DOT1X_IDLE_TIMEOUT		(OID_GET_SET_TOGGLE | OID_802_DOT1X_IDLE_TIMEOUT)
+#endif /* DOT1X_SUPPORT */
+
+#define RT_OID_802_11_SET_TDLS_PARAM			(OID_GET_SET_TOGGLE | RT_OID_802_11_QUERY_TDLS_PARAM)
+#define RT_OID_802_11_SET_TDLS				(OID_GET_SET_TOGGLE | RT_OID_802_11_QUERY_TDLS)
+
+
+typedef enum _NDIS_802_11_STATUS_TYPE {
+	Ndis802_11StatusType_Authentication,
+	Ndis802_11StatusType_MediaStreamMode,
+	Ndis802_11StatusType_PMKID_CandidateList,
+	Ndis802_11StatusTypeMax	/* not a real type, defined as an upper bound */
+} NDIS_802_11_STATUS_TYPE, *PNDIS_802_11_STATUS_TYPE;
+
+typedef UCHAR NDIS_802_11_MAC_ADDRESS[6];
+
+typedef struct _NDIS_802_11_STATUS_INDICATION {
+	NDIS_802_11_STATUS_TYPE StatusType;
+} NDIS_802_11_STATUS_INDICATION, *PNDIS_802_11_STATUS_INDICATION;
+
+/* mask for authentication/integrity fields */
+#define NDIS_802_11_AUTH_REQUEST_AUTH_FIELDS        0x0f
+
+#define NDIS_802_11_AUTH_REQUEST_REAUTH             0x01
+#define NDIS_802_11_AUTH_REQUEST_KEYUPDATE          0x02
+#define NDIS_802_11_AUTH_REQUEST_PAIRWISE_ERROR     0x06
+#define NDIS_802_11_AUTH_REQUEST_GROUP_ERROR        0x0E
+
+typedef struct _NDIS_802_11_AUTHENTICATION_REQUEST {
+	ULONG Length;		/* Length of structure */
+	NDIS_802_11_MAC_ADDRESS Bssid;
+	ULONG Flags;
+} NDIS_802_11_AUTHENTICATION_REQUEST, *PNDIS_802_11_AUTHENTICATION_REQUEST;
+
+/*Added new types for PMKID Candidate lists. */
+typedef struct _PMKID_CANDIDATE {
+	NDIS_802_11_MAC_ADDRESS BSSID;
+	ULONG Flags;
+} PMKID_CANDIDATE, *PPMKID_CANDIDATE;
+
+typedef struct _NDIS_802_11_PMKID_CANDIDATE_LIST {
+	ULONG Version;		/* Version of the structure */
+	ULONG NumCandidates;	/* No. of pmkid candidates */
+	PMKID_CANDIDATE CandidateList[1];
+} NDIS_802_11_PMKID_CANDIDATE_LIST, *PNDIS_802_11_PMKID_CANDIDATE_LIST;
+
+/*Flags for PMKID Candidate list structure */
+#define NDIS_802_11_PMKID_CANDIDATE_PREAUTH_ENABLED	0x01
+
+/* Added new types for OFDM 5G and 2.4G */
+typedef enum _NDIS_802_11_NETWORK_TYPE {
+	Ndis802_11FH,
+	Ndis802_11DS,
+	Ndis802_11OFDM5,
+	Ndis802_11OFDM24,
+	Ndis802_11Automode,
+	Ndis802_11OFDM5_N,
+	Ndis802_11OFDM24_N,
+	Ndis802_11NetworkTypeMax	/* not a real type, defined as an upper bound */
+} NDIS_802_11_NETWORK_TYPE, *PNDIS_802_11_NETWORK_TYPE;
+
+typedef struct _NDIS_802_11_NETWORK_TYPE_LIST {
+	UINT NumberOfItems;	/* in list below, at least 1 */
+	NDIS_802_11_NETWORK_TYPE NetworkType[1];
+} NDIS_802_11_NETWORK_TYPE_LIST, *PNDIS_802_11_NETWORK_TYPE_LIST;
+
+typedef enum _NDIS_802_11_POWER_MODE {
+	Ndis802_11PowerModeCAM,
+	Ndis802_11PowerModeMAX_PSP,
+	Ndis802_11PowerModeFast_PSP,
+	Ndis802_11PowerModeLegacy_PSP,
+	Ndis802_11PowerModeMax	/* not a real mode, defined as an upper bound */
+} NDIS_802_11_POWER_MODE, *PNDIS_802_11_POWER_MODE;
+
+typedef ULONG NDIS_802_11_TX_POWER_LEVEL;	/* in milliwatts */
+
+/* */
+/* Received Signal Strength Indication */
+/* */
+typedef LONG NDIS_802_11_RSSI;	/* in dBm */
+
+typedef struct _NDIS_802_11_CONFIGURATION_FH {
+	ULONG Length;		/* Length of structure */
+	ULONG HopPattern;	/* As defined by 802.11, MSB set */
+	ULONG HopSet;		/* to one if non-802.11 */
+	ULONG DwellTime;	/* units are Kusec */
+} NDIS_802_11_CONFIGURATION_FH, *PNDIS_802_11_CONFIGURATION_FH;
+
+typedef struct _NDIS_802_11_CONFIGURATION {
+	ULONG Length;		/* Length of structure */
+	ULONG BeaconPeriod;	/* units are Kusec */
+	ULONG ATIMWindow;	/* units are Kusec */
+	ULONG DSConfig;		/* Frequency, units are kHz */
+	NDIS_802_11_CONFIGURATION_FH FHConfig;
+} NDIS_802_11_CONFIGURATION, *PNDIS_802_11_CONFIGURATION;
+
+typedef struct _NDIS_802_11_STATISTICS {
+	ULONG Length;		/* Length of structure */
+	LARGE_INTEGER TransmittedFragmentCount;
+	LARGE_INTEGER MulticastTransmittedFrameCount;
+	LARGE_INTEGER FailedCount;
+	LARGE_INTEGER RetryCount;
+	LARGE_INTEGER MultipleRetryCount;
+	LARGE_INTEGER RTSSuccessCount;
+	LARGE_INTEGER RTSFailureCount;
+	LARGE_INTEGER ACKFailureCount;
+	LARGE_INTEGER FrameDuplicateCount;
+	LARGE_INTEGER ReceivedFragmentCount;
+	LARGE_INTEGER MulticastReceivedFrameCount;
+	LARGE_INTEGER FCSErrorCount;
+	LARGE_INTEGER TKIPLocalMICFailures;
+	LARGE_INTEGER TKIPRemoteMICErrors;
+	LARGE_INTEGER TKIPICVErrors;
+	LARGE_INTEGER TKIPCounterMeasuresInvoked;
+	LARGE_INTEGER TKIPReplays;
+	LARGE_INTEGER CCMPFormatErrors;
+	LARGE_INTEGER CCMPReplays;
+	LARGE_INTEGER CCMPDecryptErrors;
+	LARGE_INTEGER FourWayHandshakeFailures;
+} NDIS_802_11_STATISTICS, *PNDIS_802_11_STATISTICS;
+
+typedef ULONG NDIS_802_11_KEY_INDEX;
+typedef ULONGLONG NDIS_802_11_KEY_RSC;
+
+#ifdef DOT1X_SUPPORT
+#define MAX_RADIUS_SRV_NUM			2	/* 802.1x failover number */
+
+/* The dot1x related structure. 
+   It's used to communicate with DOT1X daemon */
+typedef struct GNU_PACKED _RADIUS_SRV_INFO {
+	UINT32 radius_ip;
+	UINT32 radius_port;
+	UCHAR radius_key[64];
+	UCHAR radius_key_len;
+} RADIUS_SRV_INFO, *PRADIUS_SRV_INFO;
+
+typedef struct GNU_PACKED _DOT1X_BSS_INFO {
+	UCHAR radius_srv_num;
+	RADIUS_SRV_INFO radius_srv_info[MAX_RADIUS_SRV_NUM];
+	UCHAR ieee8021xWEP;	/* dynamic WEP */
+	UCHAR key_index;
+	UCHAR key_length;	/* length of key in bytes */
+	UCHAR key_material[13];
+	UCHAR nasId[IFNAMSIZ];
+	UCHAR nasId_len;
+} DOT1X_BSS_INFO, *PDOT1X_BSS_INFO;
+
+typedef struct GNU_PACKED _DOT1X_CMM_CONF {
+	UINT32 Length;		/* Length of this structure */
+	UCHAR mbss_num;		/* indicate multiple BSS number */
+	UINT32 own_ip_addr;
+	UINT32 retry_interval;
+	UINT32 session_timeout_interval;
+	UINT32 quiet_interval;
+	UCHAR EAPifname[8][IFNAMSIZ];
+	UCHAR EAPifname_len[8];
+	UCHAR PreAuthifname[8][IFNAMSIZ];
+	UCHAR PreAuthifname_len[8];
+	DOT1X_BSS_INFO Dot1xBssInfo[8];
+} DOT1X_CMM_CONF, *PDOT1X_CMM_CONF;
+
+typedef struct GNU_PACKED _DOT1X_IDLE_TIMEOUT {
+	UCHAR StaAddr[6];
+	UINT32 idle_timeout;
+} DOT1X_IDLE_TIMEOUT, *PDOT1X_IDLE_TIMEOUT;
+#endif /* DOT1X_SUPPORT */
+
+
+#ifdef CONFIG_STA_SUPPORT
+/* Key mapping keys require a BSSID */
+typedef struct _NDIS_802_11_KEY {
+	UINT Length;		/* Length of this structure */
+	UINT KeyIndex;
+	UINT KeyLength;		/* length of key in bytes */
+	NDIS_802_11_MAC_ADDRESS BSSID;
+	NDIS_802_11_KEY_RSC KeyRSC;
+	UCHAR KeyMaterial[1];	/* variable length depending on above field */
+} NDIS_802_11_KEY, *PNDIS_802_11_KEY;
+
+typedef struct _NDIS_802_11_PASSPHRASE {
+	UINT KeyLength;		/* length of key in bytes */
+	NDIS_802_11_MAC_ADDRESS BSSID;
+	UCHAR KeyMaterial[1];	/* variable length depending on above field */
+} NDIS_802_11_PASSPHRASE, *PNDIS_802_11_PASSPHRASE;
+#endif /* CONFIG_STA_SUPPORT */
+
+typedef struct _NDIS_802_11_REMOVE_KEY {
+	UINT Length;		/* Length of this structure */
+	UINT KeyIndex;
+	NDIS_802_11_MAC_ADDRESS BSSID;
+} NDIS_802_11_REMOVE_KEY, *PNDIS_802_11_REMOVE_KEY;
+
+typedef struct _NDIS_802_11_WEP {
+	UINT Length;		/* Length of this structure */
+	UINT KeyIndex;		/* 0 is the per-client key, 1-N are the */
+	/* global keys */
+	UINT KeyLength;		/* length of key in bytes */
+	UCHAR KeyMaterial[1];	/* variable length depending on above field */
+} NDIS_802_11_WEP, *PNDIS_802_11_WEP;
+
+
+/* Add new authentication modes */
+typedef enum _NDIS_802_11_AUTHENTICATION_MODE {
+	Ndis802_11AuthModeOpen,
+	Ndis802_11AuthModeShared,
+	Ndis802_11AuthModeAutoSwitch,
+	Ndis802_11AuthModeWPA,
+	Ndis802_11AuthModeWPAPSK,
+	Ndis802_11AuthModeWPANone,
+	Ndis802_11AuthModeWPA2,
+	Ndis802_11AuthModeWPA2PSK,
+	Ndis802_11AuthModeWPA1WPA2,
+	Ndis802_11AuthModeWPA1PSKWPA2PSK,
+	Ndis802_11AuthModeMax	/* Not a real mode, defined as upper bound */
+} NDIS_802_11_AUTHENTICATION_MODE, *PNDIS_802_11_AUTHENTICATION_MODE;
+
+typedef UCHAR NDIS_802_11_RATES[NDIS_802_11_LENGTH_RATES];	/* Set of 8 data rates */
+typedef UCHAR NDIS_802_11_RATES_EX[NDIS_802_11_LENGTH_RATES_EX];	/* Set of 16 data rates */
+
+typedef struct GNU_PACKED _NDIS_802_11_SSID {
+	UINT SsidLength;	/* length of SSID field below, in bytes; */
+	/* this can be zero. */
+	UCHAR Ssid[NDIS_802_11_LENGTH_SSID];	/* SSID information field */
+} NDIS_802_11_SSID, *PNDIS_802_11_SSID;
+
+typedef struct GNU_PACKED _NDIS_WLAN_BSSID {
+	ULONG Length;		/* Length of this structure */
+	NDIS_802_11_MAC_ADDRESS MacAddress;	/* BSSID */
+	UCHAR Reserved[2];
+	NDIS_802_11_SSID Ssid;	/* SSID */
+	ULONG Privacy;		/* WEP encryption requirement */
+	NDIS_802_11_RSSI Rssi;	/* receive signal strength in dBm */
+	NDIS_802_11_NETWORK_TYPE NetworkTypeInUse;
+	NDIS_802_11_CONFIGURATION Configuration;
+	NDIS_802_11_NETWORK_INFRASTRUCTURE InfrastructureMode;
+	NDIS_802_11_RATES SupportedRates;
+} NDIS_WLAN_BSSID, *PNDIS_WLAN_BSSID;
+
+typedef struct GNU_PACKED _NDIS_802_11_BSSID_LIST {
+	UINT NumberOfItems;	/* in list below, at least 1 */
+	NDIS_WLAN_BSSID Bssid[1];
+} NDIS_802_11_BSSID_LIST, *PNDIS_802_11_BSSID_LIST;
+
+typedef struct {
+	BOOLEAN bValid;		/* 1: variable contains valid value */
+	USHORT StaNum;
+	UCHAR ChannelUtilization;
+	USHORT RemainingAdmissionControl;	/* in unit of 32-us */
+} QBSS_LOAD_UI, *PQBSS_LOAD_UI;
+
+/* Added Capabilities, IELength and IEs for each BSSID */
+typedef struct GNU_PACKED _NDIS_WLAN_BSSID_EX {
+	ULONG Length;		/* Length of this structure */
+	NDIS_802_11_MAC_ADDRESS MacAddress;	/* BSSID */
+	UCHAR WpsAP; /* 0x00: not support WPS, 0x01: support normal WPS, 0x02: support Ralink auto WPS, 0x04: support Samsung WAC */
+	CHAR MinSNR;
+	NDIS_802_11_SSID Ssid;	/* SSID */
+	UINT Privacy;		/* WEP encryption requirement */
+	NDIS_802_11_RSSI Rssi;	/* receive signal */
+	/* strength in dBm */
+	NDIS_802_11_NETWORK_TYPE NetworkTypeInUse;
+	NDIS_802_11_CONFIGURATION Configuration;
+	NDIS_802_11_NETWORK_INFRASTRUCTURE InfrastructureMode;
+	NDIS_802_11_RATES_EX SupportedRates;
+	ULONG IELength;
+	UCHAR IEs[1];
+
+} NDIS_WLAN_BSSID_EX, *PNDIS_WLAN_BSSID_EX;
+
+typedef struct GNU_PACKED _NDIS_802_11_BSSID_LIST_EX {
+	UINT NumberOfItems;	/* in list below, at least 1 */
+	NDIS_WLAN_BSSID_EX Bssid[1];
+} NDIS_802_11_BSSID_LIST_EX, *PNDIS_802_11_BSSID_LIST_EX;
+
+typedef struct GNU_PACKED _NDIS_802_11_FIXED_IEs {
+	UCHAR Timestamp[8];
+	USHORT BeaconInterval;
+	USHORT Capabilities;
+} NDIS_802_11_FIXED_IEs, *PNDIS_802_11_FIXED_IEs;
+
+typedef struct _NDIS_802_11_VARIABLE_IEs {
+	UCHAR ElementID;
+	UCHAR Length;		/* Number of bytes in data field */
+	UCHAR data[1];
+} NDIS_802_11_VARIABLE_IEs, *PNDIS_802_11_VARIABLE_IEs;
+
+typedef ULONG NDIS_802_11_FRAGMENTATION_THRESHOLD;
+
+typedef ULONG NDIS_802_11_RTS_THRESHOLD;
+
+typedef ULONG NDIS_802_11_ANTENNA;
+
+typedef enum _NDIS_802_11_PRIVACY_FILTER {
+	Ndis802_11PrivFilterAcceptAll,
+	Ndis802_11PrivFilter8021xWEP
+} NDIS_802_11_PRIVACY_FILTER, *PNDIS_802_11_PRIVACY_FILTER;
+
+/* Added new encryption types */
+/* Also aliased typedef to new name */
+typedef enum _NDIS_802_11_WEP_STATUS {
+	Ndis802_11WEPEnabled,
+	Ndis802_11Encryption1Enabled = Ndis802_11WEPEnabled,
+	Ndis802_11WEPDisabled,
+	Ndis802_11EncryptionDisabled = Ndis802_11WEPDisabled,
+	Ndis802_11WEPKeyAbsent,
+	Ndis802_11Encryption1KeyAbsent = Ndis802_11WEPKeyAbsent,
+	Ndis802_11WEPNotSupported,
+	Ndis802_11EncryptionNotSupported = Ndis802_11WEPNotSupported,
+	Ndis802_11Encryption2Enabled,
+	Ndis802_11Encryption2KeyAbsent,
+	Ndis802_11Encryption3Enabled,
+	Ndis802_11Encryption3KeyAbsent,
+	Ndis802_11Encryption4Enabled,	/* TKIP or AES mix */
+	Ndis802_11Encryption4KeyAbsent,
+	Ndis802_11GroupWEP40Enabled,
+	Ndis802_11GroupWEP104Enabled,
+} NDIS_802_11_WEP_STATUS, *PNDIS_802_11_WEP_STATUS, NDIS_802_11_ENCRYPTION_STATUS, *PNDIS_802_11_ENCRYPTION_STATUS;
+
+typedef enum _NDIS_802_11_RELOAD_DEFAULTS {
+	Ndis802_11ReloadWEPKeys
+} NDIS_802_11_RELOAD_DEFAULTS, *PNDIS_802_11_RELOAD_DEFAULTS;
+
+#define NDIS_802_11_AI_REQFI_CAPABILITIES      1
+#define NDIS_802_11_AI_REQFI_LISTENINTERVAL    2
+#define NDIS_802_11_AI_REQFI_CURRENTAPADDRESS  4
+
+#define NDIS_802_11_AI_RESFI_CAPABILITIES      1
+#define NDIS_802_11_AI_RESFI_STATUSCODE        2
+#define NDIS_802_11_AI_RESFI_ASSOCIATIONID     4
+
+typedef struct _NDIS_802_11_AI_REQFI {
+	USHORT Capabilities;
+	USHORT ListenInterval;
+	NDIS_802_11_MAC_ADDRESS CurrentAPAddress;
+} NDIS_802_11_AI_REQFI, *PNDIS_802_11_AI_REQFI;
+
+typedef struct _NDIS_802_11_AI_RESFI {
+	USHORT Capabilities;
+	USHORT StatusCode;
+	USHORT AssociationId;
+} NDIS_802_11_AI_RESFI, *PNDIS_802_11_AI_RESFI;
+
+typedef struct _NDIS_802_11_ASSOCIATION_INFORMATION {
+	ULONG Length;
+	USHORT AvailableRequestFixedIEs;
+	NDIS_802_11_AI_REQFI RequestFixedIEs;
+	ULONG RequestIELength;
+	ULONG OffsetRequestIEs;
+	USHORT AvailableResponseFixedIEs;
+	NDIS_802_11_AI_RESFI ResponseFixedIEs;
+	ULONG ResponseIELength;
+	ULONG OffsetResponseIEs;
+} NDIS_802_11_ASSOCIATION_INFORMATION, *PNDIS_802_11_ASSOCIATION_INFORMATION;
+
+typedef struct _NDIS_802_11_AUTHENTICATION_EVENT {
+	NDIS_802_11_STATUS_INDICATION Status;
+	NDIS_802_11_AUTHENTICATION_REQUEST Request[1];
+} NDIS_802_11_AUTHENTICATION_EVENT, *PNDIS_802_11_AUTHENTICATION_EVENT;
+
+/*        
+typedef struct _NDIS_802_11_TEST
+{
+    ULONG Length;
+    ULONG Type;
+    union
+    {
+        NDIS_802_11_AUTHENTICATION_EVENT AuthenticationEvent;
+        NDIS_802_11_RSSI RssiTrigger;
+    };
+} NDIS_802_11_TEST, *PNDIS_802_11_TEST;
+ */
+
+/* 802.11 Media stream constraints, associated with OID_802_11_MEDIA_STREAM_MODE */
+typedef enum _NDIS_802_11_MEDIA_STREAM_MODE {
+	Ndis802_11MediaStreamOff,
+	Ndis802_11MediaStreamOn,
+} NDIS_802_11_MEDIA_STREAM_MODE, *PNDIS_802_11_MEDIA_STREAM_MODE;
+
+/* PMKID Structures */
+typedef UCHAR NDIS_802_11_PMKID_VALUE[16];
+
+#ifdef CONFIG_STA_SUPPORT
+typedef struct _BSSID_INFO {
+	NDIS_802_11_MAC_ADDRESS BSSID;
+	NDIS_802_11_PMKID_VALUE PMKID;
+} BSSID_INFO, *PBSSID_INFO;
+
+typedef struct _NDIS_802_11_PMKID {
+	UINT Length;
+	UINT BSSIDInfoCount;
+	BSSID_INFO BSSIDInfo[1];
+} NDIS_802_11_PMKID, *PNDIS_802_11_PMKID;
+#endif /* CONFIG_STA_SUPPORT */
+
+
+typedef struct _NDIS_802_11_AUTHENTICATION_ENCRYPTION {
+	NDIS_802_11_AUTHENTICATION_MODE AuthModeSupported;
+	NDIS_802_11_ENCRYPTION_STATUS EncryptStatusSupported;
+} NDIS_802_11_AUTHENTICATION_ENCRYPTION, *PNDIS_802_11_AUTHENTICATION_ENCRYPTION;
+
+typedef struct _NDIS_802_11_CAPABILITY {
+	ULONG Length;
+	ULONG Version;
+	ULONG NoOfPMKIDs;
+	ULONG NoOfAuthEncryptPairsSupported;
+	NDIS_802_11_AUTHENTICATION_ENCRYPTION
+	    AuthenticationEncryptionSupported[1];
+} NDIS_802_11_CAPABILITY, *PNDIS_802_11_CAPABILITY;
+
+
+
+#ifdef DBG
+/*
+	When use private ioctl oid get/set the configuration, we can use following flags to provide specific rules when handle the cmd
+ */
+#define RTPRIV_IOCTL_FLAG_UI			0x0001	/* Notidy this private cmd send by UI. */
+#define RTPRIV_IOCTL_FLAG_NODUMPMSG	0x0002	/* Notify driver cannot dump msg to stdio/stdout when run this private ioctl cmd */
+#define RTPRIV_IOCTL_FLAG_NOSPACE		0x0004	/* Notify driver didn't need copy msg to caller due to the caller didn't reserve space for this cmd */
+#endif /* DBG */
+
+
+#ifdef SNMP_SUPPORT
+/*SNMP ieee 802dot11, kathy , 2008_0220 */
+/* dot11res(3) */
+#define RT_OID_802_11_MANUFACTUREROUI			0x0700
+#define RT_OID_802_11_MANUFACTURERNAME			0x0701
+#define RT_OID_802_11_RESOURCETYPEIDNAME		0x0702
+
+/* dot11smt(1) */
+#define RT_OID_802_11_PRIVACYOPTIONIMPLEMENTED	0x0703
+#define RT_OID_802_11_POWERMANAGEMENTMODE		0x0704
+#define OID_802_11_WEPDEFAULTKEYVALUE			0x0705	/* read , write */
+#define OID_802_11_WEPDEFAULTKEYID				0x0706
+#define RT_OID_802_11_WEPKEYMAPPINGLENGTH		0x0707
+#define OID_802_11_SHORTRETRYLIMIT				0x0708
+#define OID_802_11_LONGRETRYLIMIT				0x0709
+#define RT_OID_802_11_PRODUCTID					0x0710
+#define RT_OID_802_11_MANUFACTUREID				0x0711
+
+/* //dot11Phy(4) */
+#define OID_802_11_CURRENTCHANNEL				0x0712
+
+#endif /* SNMP_SUPPORT */
+
+/*dot11mac */
+#define RT_OID_802_11_MAC_ADDRESS				0x0713
+#define OID_802_11_BUILD_CHANNEL_EX				0x0714
+#define OID_802_11_GET_CH_LIST					0x0715
+#define OID_802_11_GET_COUNTRY_CODE				0x0716
+#define OID_802_11_GET_CHANNEL_GEOGRAPHY		0x0717
+
+/*#define RT_OID_802_11_STATISTICS              (OID_GET_SET_TOGGLE | OID_802_11_STATISTICS) */
+
+
+#ifdef CONFIG_STA_SUPPORT
+#define RT_OID_WSC_SET_PASSPHRASE                   0x0740	/* passphrase for wpa(2)-psk */
+#define RT_OID_WSC_DRIVER_AUTO_CONNECT              0x0741
+#define RT_OID_WSC_QUERY_DEFAULT_PROFILE            0x0742
+#define RT_OID_WSC_SET_CONN_BY_PROFILE_INDEX        0x0743
+#define RT_OID_WSC_SET_ACTION                       0x0744
+#define RT_OID_WSC_SET_SSID                         0x0745
+#define RT_OID_WSC_SET_PIN_CODE                     0x0746
+#define RT_OID_WSC_SET_MODE                         0x0747	/* PIN or PBC */
+#define RT_OID_WSC_SET_CONF_MODE                    0x0748	/* Enrollee or Registrar */
+#define RT_OID_WSC_SET_PROFILE                      0x0749
+#endif /* CONFIG_STA_SUPPORT */
+#define	RT_OID_WSC_FRAGMENT_SIZE					0x074D
+#define	RT_OID_WSC_V2_SUPPORT						0x074E
+#define	RT_OID_WSC_CONFIG_STATUS					0x074F
+#define RT_OID_802_11_WSC_QUERY_PROFILE				0x0750
+/* for consistency with RT61 */
+#define RT_OID_WSC_QUERY_STATUS						0x0751
+#define RT_OID_WSC_PIN_CODE							0x0752
+#define RT_OID_WSC_UUID								0x0753
+#define RT_OID_WSC_SET_SELECTED_REGISTRAR			0x0754
+#define RT_OID_WSC_EAPMSG							0x0755
+#define RT_OID_WSC_MANUFACTURER						0x0756
+#define RT_OID_WSC_MODEL_NAME						0x0757
+#define RT_OID_WSC_MODEL_NO							0x0758
+#define RT_OID_WSC_SERIAL_NO						0x0759
+#define RT_OID_WSC_READ_UFD_FILE					0x075A
+#define RT_OID_WSC_WRITE_UFD_FILE					0x075B
+#define RT_OID_WSC_QUERY_PEER_INFO_ON_RUNNING		0x075C
+#define RT_OID_WSC_MAC_ADDRESS						0x0760
+
+#ifdef LLTD_SUPPORT
+/* for consistency with RT61 */
+#define RT_OID_GET_PHY_MODE                         0x761
+#endif /* LLTD_SUPPORT */
+
+#ifdef NINTENDO_AP
+/*#define RT_OID_NINTENDO                             0x0D010770 */
+#define RT_OID_802_11_NINTENDO_GET_TABLE			0x0771	/*((RT_OID_NINTENDO + 0x01) & 0xffff) */
+#define RT_OID_802_11_NINTENDO_SET_TABLE			0x0772	/*((RT_OID_NINTENDO + 0x02) & 0xffff) */
+#define RT_OID_802_11_NINTENDO_CAPABLE				0x0773	/*((RT_OID_NINTENDO + 0x03) & 0xffff) */
+#endif /* NINTENDO_AP */
+
+
+
+/* New for MeetingHouse Api support */
+#define OID_MH_802_1X_SUPPORTED               0xFFEDC100
+
+/* MIMO Tx parameter, ShortGI, MCS, STBC, etc.  these are fields in TXWI. Don't change this definition!!! */
+typedef union _HTTRANSMIT_SETTING {
+#ifdef RT_BIG_ENDIAN
+	struct {
+		USHORT MODE:2;	/* Use definition MODE_xxx. */
+		USHORT iTxBF:1;
+		USHORT rsv:1;
+		USHORT eTxBF:1;
+		USHORT STBC:2;	/*SPACE */
+		USHORT ShortGI:1;
+		USHORT BW:1;	/*channel bandwidth 20MHz or 40 MHz */
+		USHORT MCS:7;	/* MCS */
+	} field;
+#else
+	struct {
+		USHORT MCS:7;	/* MCS */
+		USHORT BW:1;	/*channel bandwidth 20MHz or 40 MHz */
+		USHORT ShortGI:1;
+		USHORT STBC:2;	/*SPACE */
+		USHORT eTxBF:1;
+		USHORT rsv:1;
+		USHORT iTxBF:1;
+		USHORT MODE:2;	/* Use definition MODE_xxx. */
+	} field;
+#endif
+	USHORT word;
+} HTTRANSMIT_SETTING, *PHTTRANSMIT_SETTING;
+
+typedef enum _RT_802_11_PREAMBLE {
+	Rt802_11PreambleLong,
+	Rt802_11PreambleShort,
+	Rt802_11PreambleAuto
+} RT_802_11_PREAMBLE, *PRT_802_11_PREAMBLE;
+
+typedef enum _RT_802_11_PHY_MODE {
+	PHY_11BG_MIXED = 0,
+	PHY_11B,
+	PHY_11A,
+	PHY_11ABG_MIXED,
+	PHY_11G,
+#ifdef DOT11_N_SUPPORT
+	PHY_11ABGN_MIXED,	/* both band   5 */
+	PHY_11N_2_4G,		/* 11n-only with 2.4G band      6 */
+	PHY_11GN_MIXED,		/* 2.4G band      7 */
+	PHY_11AN_MIXED,		/* 5G  band       8 */
+	PHY_11BGN_MIXED,	/* if check 802.11b.      9 */
+	PHY_11AGN_MIXED,	/* if check 802.11b.      10 */
+	PHY_11N_5G,		/* 11n-only with 5G band                11 */
+#endif /* DOT11_N_SUPPORT */
+} RT_802_11_PHY_MODE;
+
+#ifdef DOT11_N_SUPPORT
+#define PHY_MODE_IS_5G_BAND(__Mode)	\
+	((__Mode == PHY_11A) ||			\
+	(__Mode == PHY_11ABG_MIXED) ||	\
+	(__Mode == PHY_11ABGN_MIXED) ||	\
+	(__Mode == PHY_11AN_MIXED) ||	\
+	(__Mode == PHY_11AGN_MIXED) ||	\
+	(__Mode == PHY_11N_5G))
+#else
+
+#define PHY_MODE_IS_5G_BAND(__Mode)	\
+	((__Mode == PHY_11A) ||			\
+	(__Mode == PHY_11ABG_MIXED))
+#endif /* DOT11_N_SUPPORT */
+
+/* put all proprietery for-query objects here to reduce # of Query_OID */
+typedef struct _RT_802_11_LINK_STATUS {
+	ULONG CurrTxRate;	/* in units of 0.5Mbps */
+	ULONG ChannelQuality;	/* 0..100 % */
+	ULONG TxByteCount;	/* both ok and fail */
+	ULONG RxByteCount;	/* both ok and fail */
+	ULONG CentralChannel;	/* 40MHz central channel number */
+} RT_802_11_LINK_STATUS, *PRT_802_11_LINK_STATUS;
+
+#ifdef SYSTEM_LOG_SUPPORT
+typedef struct _RT_802_11_EVENT_LOG {
+	LARGE_INTEGER SystemTime;	/* timestammp via NdisGetCurrentSystemTime() */
+	UCHAR Addr[MAC_ADDR_LENGTH];
+	USHORT Event;		/* EVENT_xxx */
+} RT_802_11_EVENT_LOG, *PRT_802_11_EVENT_LOG;
+
+typedef struct _RT_802_11_EVENT_TABLE {
+	ULONG Num;
+	ULONG Rsv;		/* to align Log[] at LARGE_INEGER boundary */
+	RT_802_11_EVENT_LOG Log[MAX_NUMBER_OF_EVENT];
+} RT_802_11_EVENT_TABLE, *PRT_802_11_EVENT_TABLE;
+#endif /* SYSTEM_LOG_SUPPORT */
+
+/* MIMO Tx parameter, ShortGI, MCS, STBC, etc.  these are fields in TXWI. Don't change this definition!!! */
+typedef union _MACHTTRANSMIT_SETTING {
+	struct {
+		USHORT MCS:7;	/* MCS */
+		USHORT BW:1;	/*channel bandwidth 20MHz or 40 MHz */
+		USHORT ShortGI:1;
+		USHORT STBC:2;	/*SPACE */
+		USHORT rsv:3;
+		USHORT MODE:2;	/* Use definition MODE_xxx. */
+	} field;
+	USHORT word;
+} MACHTTRANSMIT_SETTING, *PMACHTTRANSMIT_SETTING;
+
+typedef struct _RT_802_11_MAC_ENTRY {
+	UCHAR ApIdx;
+	UCHAR Addr[MAC_ADDR_LENGTH];
+	UCHAR Aid;
+	UCHAR Psm;		/* 0:PWR_ACTIVE, 1:PWR_SAVE */
+	UCHAR MimoPs;		/* 0:MMPS_STATIC, 1:MMPS_DYNAMIC, 3:MMPS_Enabled */
+	CHAR AvgRssi0;
+	CHAR AvgRssi1;
+	CHAR AvgRssi2;
+	UINT32 ConnectedTime;
+	MACHTTRANSMIT_SETTING TxRate;
+} RT_802_11_MAC_ENTRY, *PRT_802_11_MAC_ENTRY;
+
+typedef struct _RT_802_11_MAC_TABLE {
+	ULONG Num;
+	RT_802_11_MAC_ENTRY Entry[MAX_NUMBER_OF_MAC];
+} RT_802_11_MAC_TABLE, *PRT_802_11_MAC_TABLE;
+
+#ifdef DOT11_N_SUPPORT
+#ifdef TXBF_SUPPORT
+typedef
+    struct {
+	ULONG TxSuccessCount;
+	ULONG TxRetryCount;
+	ULONG TxFailCount;
+	ULONG ETxSuccessCount;
+	ULONG ETxRetryCount;
+	ULONG ETxFailCount;
+	ULONG ITxSuccessCount;
+	ULONG ITxRetryCount;
+	ULONG ITxFailCount;
+} RT_COUNTER_TXBF;
+
+typedef
+    struct {
+	ULONG Num;
+	RT_COUNTER_TXBF Entry[MAX_NUMBER_OF_MAC];
+} RT_802_11_TXBF_TABLE;
+#endif /* TXBF_SUPPORT */
+#endif /* DOT11_N_SUPPORT */
+
+/* structure for query/set hardware register - MAC, BBP, RF register */
+typedef struct _RT_802_11_HARDWARE_REGISTER {
+	ULONG HardwareType;	/* 0:MAC, 1:BBP, 2:RF register, 3:EEPROM */
+	ULONG Offset;		/* Q/S register offset addr */
+	ULONG Data;		/* R/W data buffer */
+} RT_802_11_HARDWARE_REGISTER, *PRT_802_11_HARDWARE_REGISTER;
+
+typedef struct _RT_802_11_AP_CONFIG {
+	ULONG EnableTxBurst;	/* 0-disable, 1-enable */
+	ULONG EnableTurboRate;	/* 0-disable, 1-enable 72/100mbps turbo rate */
+	ULONG IsolateInterStaTraffic;	/* 0-disable, 1-enable isolation */
+	ULONG HideSsid;		/* 0-disable, 1-enable hiding */
+	ULONG UseBGProtection;	/* 0-AUTO, 1-always ON, 2-always OFF */
+	ULONG UseShortSlotTime;	/* 0-no use, 1-use 9-us short slot time */
+	ULONG Rsv1;		/* must be 0 */
+	ULONG SystemErrorBitmap;	/* ignore upon SET, return system error upon QUERY */
+} RT_802_11_AP_CONFIG, *PRT_802_11_AP_CONFIG;
+
+/* structure to query/set STA_CONFIG */
+typedef struct _RT_802_11_STA_CONFIG {
+	ULONG EnableTxBurst;	/* 0-disable, 1-enable */
+	ULONG EnableTurboRate;	/* 0-disable, 1-enable 72/100mbps turbo rate */
+	ULONG UseBGProtection;	/* 0-AUTO, 1-always ON, 2-always OFF */
+	ULONG UseShortSlotTime;	/* 0-no use, 1-use 9-us short slot time when applicable */
+	ULONG AdhocMode;	/* 0-11b rates only (WIFI spec), 1 - b/g mixed, 2 - g only */
+	ULONG HwRadioStatus;	/* 0-OFF, 1-ON, default is 1, Read-Only */
+	ULONG Rsv1;		/* must be 0 */
+	ULONG SystemErrorBitmap;	/* ignore upon SET, return system error upon QUERY */
+} RT_802_11_STA_CONFIG, *PRT_802_11_STA_CONFIG;
+
+/* */
+/*  For OID Query or Set about BA structure */
+/* */
+typedef struct _OID_BACAP_STRUC {
+	UCHAR RxBAWinLimit;
+	UCHAR TxBAWinLimit;
+	UCHAR Policy;		/* 0: DELAY_BA 1:IMMED_BA  (//BA Policy subfiled value in ADDBA frame)   2:BA-not use. other value invalid */
+	UCHAR MpduDensity;	/* 0: DELAY_BA 1:IMMED_BA  (//BA Policy subfiled value in ADDBA frame)   2:BA-not use. other value invalid */
+	UCHAR AmsduEnable;	/*Enable AMSDU transmisstion */
+	UCHAR AmsduSize;	/* 0:3839, 1:7935 bytes. UINT  MSDUSizeToBytes[]        = { 3839, 7935}; */
+	UCHAR MMPSmode;		/* MIMO power save more, 0:static, 1:dynamic, 2:rsv, 3:mimo enable */
+	BOOLEAN AutoBA;		/* Auto BA will automatically */
+} OID_BACAP_STRUC, *POID_BACAP_STRUC;
+
+typedef struct _RT_802_11_ACL_ENTRY {
+	UCHAR Addr[MAC_ADDR_LENGTH];
+	USHORT Rsv;
+} RT_802_11_ACL_ENTRY, *PRT_802_11_ACL_ENTRY;
+
+typedef struct GNU_PACKED _RT_802_11_ACL {
+	ULONG Policy;		/* 0-disable, 1-positive list, 2-negative list */
+	ULONG Num;
+	RT_802_11_ACL_ENTRY Entry[MAX_NUMBER_OF_ACL];
+} RT_802_11_ACL, *PRT_802_11_ACL;
+
+typedef struct _RT_802_11_WDS {
+	ULONG Num;
+	NDIS_802_11_MAC_ADDRESS Entry[24 /*MAX_NUM_OF_WDS_LINK */ ];
+	ULONG KeyLength;
+	UCHAR KeyMaterial[32];
+} RT_802_11_WDS, *PRT_802_11_WDS;
+
+typedef struct _RT_802_11_TX_RATES_ {
+	UCHAR SupRateLen;
+	UCHAR SupRate[MAX_LENGTH_OF_SUPPORT_RATES];
+	UCHAR ExtRateLen;
+	UCHAR ExtRate[MAX_LENGTH_OF_SUPPORT_RATES];
+} RT_802_11_TX_RATES, *PRT_802_11_TX_RATES;
+
+/* Definition of extra information code */
+#define	GENERAL_LINK_UP			0x0	/* Link is Up */
+#define	GENERAL_LINK_DOWN		0x1	/* Link is Down */
+#define	HW_RADIO_OFF			0x2	/* Hardware radio off */
+#define	SW_RADIO_OFF			0x3	/* Software radio off */
+#define	AUTH_FAIL				0x4	/* Open authentication fail */
+#define	AUTH_FAIL_KEYS			0x5	/* Shared authentication fail */
+#define	ASSOC_FAIL				0x6	/* Association failed */
+#define	EAP_MIC_FAILURE			0x7	/* Deauthencation because MIC failure */
+#define	EAP_4WAY_TIMEOUT		0x8	/* Deauthencation on 4-way handshake timeout */
+#define	EAP_GROUP_KEY_TIMEOUT	0x9	/* Deauthencation on group key handshake timeout */
+#define	EAP_SUCCESS				0xa	/* EAP succeed */
+#define	DETECT_RADAR_SIGNAL		0xb	/* Radar signal occur in current channel */
+#define EXTRA_INFO_MAX			0xb	/* Indicate Last OID */
+
+#define EXTRA_INFO_CLEAR		0xffffffff
+
+/* This is OID setting structure. So only GF or MM as Mode. This is valid when our wirelss mode has 802.11n in use. */
+typedef struct {
+	RT_802_11_PHY_MODE PhyMode;	/* */
+	UCHAR TransmitNo;
+	UCHAR HtMode;		/*HTMODE_GF or HTMODE_MM */
+	UCHAR ExtOffset;	/*extension channel above or below */
+	UCHAR MCS;
+	UCHAR BW;
+	UCHAR STBC;
+	UCHAR SHORTGI;
+	UCHAR rsv;
+} OID_SET_HT_PHYMODE, *POID_SET_HT_PHYMODE;
+
+#ifdef NINTENDO_AP
+#define NINTENDO_MAX_ENTRY 16
+#define NINTENDO_SSID_NAME_LN 8
+#define NINTENDO_SSID_NAME "NWCUSBAP"
+#define NINTENDO_PROBE_REQ_FLAG_MASK 0x03
+#define NINTENDO_PROBE_REQ_ON 0x01
+#define NINTENDO_PROBE_REQ_SIGNAL 0x02
+#define NINTENDO_PROBE_RSP_ON 0x01
+#define NINTENDO_SSID_NICKNAME_LN 20
+
+#define NINTENDO_WEPKEY_LN 13
+
+typedef struct _NINTENDO_SSID {
+	UCHAR NINTENDOFixChar[NINTENDO_SSID_NAME_LN];
+	UCHAR zero1;
+	UCHAR registe;
+	UCHAR ID;
+	UCHAR zero2;
+	UCHAR NICKname[NINTENDO_SSID_NICKNAME_LN];
+} RT_NINTENDO_SSID,
+*PRT_NINTENDO_SSID;
+
+typedef struct _NINTENDO_ENTRY {
+	UCHAR NICKname[NINTENDO_SSID_NICKNAME_LN];
+	UCHAR DS_Addr[ETH_LENGTH_OF_ADDRESS];
+	UCHAR registe;
+	UCHAR UserSpaceAck;
+} RT_NINTENDO_ENTRY, *PRT_NINTENDO_ENTRY;
+
+/*RTPRIV_IOCTL_NINTENDO_GET_TABLE */
+/*RTPRIV_IOCTL_NINTENDO_SET_TABLE */
+typedef struct _NINTENDO_TABLE {
+	UINT number;
+	RT_NINTENDO_ENTRY entry[NINTENDO_MAX_ENTRY];
+} RT_NINTENDO_TABLE, *PRT_NINTENDO_TABLE;
+
+/*RTPRIV_IOCTL_NINTENDO_SEED_WEPKEY */
+typedef struct _NINTENDO_SEED_WEPKEY {
+	UCHAR seed[NINTENDO_SSID_NICKNAME_LN];
+	UCHAR wepkey[16];	/*use 13 for 104 bits wep key */
+} RT_NINTENDO_SEED_WEPKEY, *PRT_NINTENDO_SEED_WEPKEY;
+#endif /* NINTENDO_AP */
+
+#ifdef LLTD_SUPPORT
+typedef struct _RT_LLTD_ASSOICATION_ENTRY {
+	UCHAR Addr[ETH_LENGTH_OF_ADDRESS];
+	unsigned short MOR;	/* maximum operational rate */
+	UCHAR phyMode;
+} RT_LLTD_ASSOICATION_ENTRY, *PRT_LLTD_ASSOICATION_ENTRY;
+
+typedef struct _RT_LLTD_ASSOICATION_TABLE {
+	unsigned int Num;
+	RT_LLTD_ASSOICATION_ENTRY Entry[MAX_NUMBER_OF_MAC];
+} RT_LLTD_ASSOICATION_TABLE, *PRT_LLTD_ASSOICATION_TABLE;
+#endif /* LLTD_SUPPORT */
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef QOS_DLS_SUPPORT
+/*rt2860, kathy 2007-0118 */
+/* structure for DLS */
+typedef struct _RT_802_11_DLS_UI {
+	USHORT TimeOut;		/* unit: second , set by UI */
+	USHORT CountDownTimer;	/* unit: second , used by driver only */
+	NDIS_802_11_MAC_ADDRESS MacAddr;	/* set by UI */
+	UCHAR Status;		/* 0: none , 1: wait STAkey, 2: finish DLS setup , set by driver only */
+	BOOLEAN Valid;		/* 1: valid , 0: invalid , set by UI, use to setup or tear down DLS link */
+} RT_802_11_DLS_UI, *PRT_802_11_DLS_UI;
+
+typedef struct _RT_802_11_DLS_INFO {
+	RT_802_11_DLS_UI Entry[MAX_NUMBER_OF_DLS_ENTRY];
+	UCHAR num;
+} RT_802_11_DLS_INFO, *PRT_802_11_DLS_INFO;
+
+typedef enum _RT_802_11_DLS_MODE {
+	DLS_NONE,
+	DLS_WAIT_KEY,
+	DLS_FINISH
+} RT_802_11_DLS_MODE;
+#endif /* QOS_DLS_SUPPORT */
+
+
+#endif /* CONFIG_STA_SUPPORT */
+
+
+
+
+/*#define MAX_CUSTOM_LEN 128 */
+
+#ifdef CONFIG_STA_SUPPORT
+typedef enum _RT_802_11_D_CLIENT_MODE {
+	Rt802_11_D_None,
+	Rt802_11_D_Flexible,
+	Rt802_11_D_Strict,
+} RT_802_11_D_CLIENT_MODE, *PRT_802_11_D_CLIENT_MODE;
+#endif /* CONFIG_STA_SUPPORT */
+
+typedef struct _RT_CHANNEL_LIST_INFO {
+	UCHAR ChannelList[MAX_NUM_OF_CHS];	/* list all supported channels for site survey */
+	UCHAR ChannelListNum;	/* number of channel in ChannelList[] */
+} RT_CHANNEL_LIST_INFO, *PRT_CHANNEL_LIST_INFO;
+
+/* WSC configured credential */
+typedef struct _WSC_CREDENTIAL {
+	NDIS_802_11_SSID SSID;	/* mandatory */
+	USHORT AuthType;	/* mandatory, 1: open, 2: wpa-psk, 4: shared, 8:wpa, 0x10: wpa2, 0x20: wpa2-psk */
+	USHORT EncrType;	/* mandatory, 1: none, 2: wep, 4: tkip, 8: aes */
+	UCHAR Key[64];		/* mandatory, Maximum 64 byte */
+	USHORT KeyLength;
+	UCHAR MacAddr[MAC_ADDR_LENGTH];	/* mandatory, AP MAC address */
+	UCHAR KeyIndex;		/* optional, default is 1 */
+	UCHAR bFromUPnP;	/* TRUE: This credential is from external UPnP registrar */
+	UCHAR Rsvd[2];		/* Make alignment */
+} WSC_CREDENTIAL, *PWSC_CREDENTIAL;
+
+/* WSC configured profiles */
+typedef struct _WSC_PROFILE {
+	UINT ProfileCnt;
+	UINT ApplyProfileIdx;	/* add by johnli, fix WPS test plan 5.1.1 */
+	WSC_CREDENTIAL Profile[8];	/* Support up to 8 profiles */
+} WSC_PROFILE, *PWSC_PROFILE;
+
+
+
+
+#define RT_P2P_DEVICE_FIND                                0x0109
+#define RT_P2P_CONNECTED                                  0x010A
+#define RT_P2P_DISCONNECTED                               0x010B
+#define RT_P2P_CONNECTED_TIMEOUT	                  0x010C
+
+
+
+
+#endif /* _OID_H_ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/os/rt_drv.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/os/rt_drv.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/os/rt_drv.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/os/rt_drv.h	2017-09-23 03:42:49.794675749 +0800
@@ -0,0 +1,971 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RT_LINUX_H__
+#define __RT_LINUX_H__
+
+#include "os/rt_linux_cmm.h"
+#include <linux/string.h>
+#include <linux/ctype.h>
+
+#undef AP_WSC_INCLUDED
+#undef STA_WSC_INCLUDED
+#undef WSC_INCLUDED
+
+
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+
+
+/*#ifdef RTMP_USB_SUPPORT */
+typedef VOID	*PUSB_DEV;
+typedef VOID	*purbb_t;
+typedef VOID	pregs;
+/*typedef struct usb_ctrlrequest devctrlrequest; */
+/*#endif */
+
+/***********************************************************************************
+ *	Profile related sections
+ ***********************************************************************************/
+
+
+#ifdef CONFIG_STA_SUPPORT
+
+#ifdef RTMP_MAC_USB
+#define STA_PROFILE_PATH			"/etc/Wireless/RT2870STA/RT2870STA.dat"
+#define STA_DRIVER_VERSION			"2.5.0.3"
+#ifdef MULTIPLE_CARD_SUPPORT
+#define CARD_INFO_PATH			"/etc/Wireless/RT2870STA/RT2870STACard.dat"
+#endif /* MULTIPLE_CARD_SUPPORT */
+#endif /* RTMP_MAC_USB */
+
+#endif /* CONFIG_STA_SUPPORT */
+
+
+/***********************************************************************************
+ *	Compiler related definitions
+ ***********************************************************************************/
+#undef __inline
+#define __inline		static inline
+#define IN
+#define OUT
+#define INOUT
+#define NDIS_STATUS		INT
+
+
+/***********************************************************************************
+ *	OS Specific definitions and data structures
+ ***********************************************************************************/
+typedef void				* PPCI_DEV;
+typedef void				* PNET_DEV;
+typedef void				* PNDIS_PACKET;
+typedef char				NDIS_PACKET;
+typedef PNDIS_PACKET		* PPNDIS_PACKET;
+typedef ra_dma_addr_t		NDIS_PHYSICAL_ADDRESS;
+typedef ra_dma_addr_t		* PNDIS_PHYSICAL_ADDRESS;
+typedef void				* NDIS_HANDLE;
+typedef char 				* PNDIS_BUFFER;
+
+#undef KERN_ERR
+#define KERN_ERR
+
+
+/***********************************************************************************
+ *	Network related constant definitions
+ ***********************************************************************************/
+#ifndef IFNAMSIZ
+#define IFNAMSIZ 16
+#endif
+
+#define ETH_LENGTH_OF_ADDRESS	6
+
+#define NDIS_STATUS_SUCCESS                     0x00
+#define NDIS_STATUS_FAILURE                     0x01
+#define NDIS_STATUS_INVALID_DATA				0x02
+#define NDIS_STATUS_RESOURCES                   0x03
+
+#define NDIS_SET_PACKET_STATUS(_p, _status)			do{} while(0)
+#define NdisWriteErrorLogEntry(_a, _b, _c, _d)		do{} while(0)
+
+/* statistics counter */
+#define STATS_INC_RX_PACKETS(_pAd, _dev)
+#define STATS_INC_TX_PACKETS(_pAd, _dev)
+
+#define STATS_INC_RX_BYTESS(_pAd, _dev, len)
+#define STATS_INC_TX_BYTESS(_pAd, _dev, len)
+
+#define STATS_INC_RX_ERRORS(_pAd, _dev)
+#define STATS_INC_TX_ERRORS(_pAd, _dev)
+
+#define STATS_INC_RX_DROPPED(_pAd, _dev)
+#define STATS_INC_TX_DROPPED(_pAd, _dev)
+
+
+/***********************************************************************************
+ *	Ralink Specific network related constant definitions
+ ***********************************************************************************/
+#define MIN_NET_DEVICE_FOR_AID			0x00		/*0x00~0x3f */
+#define MIN_NET_DEVICE_FOR_MBSSID		0x00		/*0x00,0x10,0x20,0x30 */
+#define MIN_NET_DEVICE_FOR_WDS			0x10		/*0x40,0x50,0x60,0x70 */
+#define MIN_NET_DEVICE_FOR_APCLI		0x20
+#define MIN_NET_DEVICE_FOR_MESH			0x30
+#ifdef CONFIG_STA_SUPPORT
+#define MIN_NET_DEVICE_FOR_DLS			0x40
+#define MIN_NET_DEVICE_FOR_TDLS			0x50
+#endif /* CONFIG_STA_SUPPORT */
+
+#define NET_DEVICE_REAL_IDX_MASK		0x0f		/* for each operation mode, we maximum support 15 entities. */
+
+
+#ifdef CONFIG_STA_SUPPORT
+#define NDIS_PACKET_TYPE_DIRECTED		0
+#define NDIS_PACKET_TYPE_MULTICAST		1
+#define NDIS_PACKET_TYPE_BROADCAST		2
+#define NDIS_PACKET_TYPE_ALL_MULTICAST	3
+#define NDIS_PACKET_TYPE_PROMISCUOUS	4
+#endif /* CONFIG_STA_SUPPORT */
+
+
+/***********************************************************************************
+ *	OS signaling related constant definitions
+ ***********************************************************************************/
+
+/***********************************************************************************
+ *	OS file operation related data structure definitions
+ ***********************************************************************************/
+typedef VOID * 			RTMP_OS_FD;
+
+#define IS_FILE_OPEN_ERR(_fd)	RtmpOsFileIsErr((_fd))
+
+#ifndef O_RDONLY
+#define O_RDONLY			RTMP_FILE_RDONLY
+#endif /* O_RDONLY */
+
+#ifndef O_WRONLY
+#define O_WRONLY			RTMP_FILE_WRONLY
+#endif /* O_WRONLY */
+
+#ifndef O_CREAT
+#define O_CREAT				RTMP_FILE_CREAT
+#endif /* O_CREAT */
+
+#ifndef O_TRUNC
+#define O_TRUNC				RTMP_FILE_TRUNC
+#endif /* O_TRUNC */
+
+
+/***********************************************************************************
+ *	OS semaphore related data structure and definitions
+ ***********************************************************************************/
+#define RTCMDUp				RtmpOsCmdUp
+
+
+/***********************************************************************************
+ *	OS Memory Access related data structure and definitions
+ ***********************************************************************************/
+#define NdisMoveMemory(Destination, Source, Length) memmove(Destination, Source, Length)
+#define NdisCopyMemory(Destination, Source, Length) memcpy(Destination, Source, Length)
+#define NdisZeroMemory(Destination, Length)         memset(Destination, 0, Length)
+#define NdisFillMemory(Destination, Length, Fill)   memset(Destination, Fill, Length)
+#define NdisCmpMemory(Destination, Source, Length)  memcmp(Destination, Source, Length)
+#define NdisEqualMemory(Source1, Source2, Length)   (!memcmp(Source1, Source2, Length))
+#define RTMPEqualMemory(Source1, Source2, Length)	(!memcmp(Source1, Source2, Length))
+
+#define MlmeAllocateMemory(_pAd, _ppVA)				os_alloc_mem(_pAd, _ppVA, MGMT_DMA_BUFFER_SIZE)
+#define MlmeFreeMemory(_pAd, _pVA)					os_free_mem(_pAd, _pVA)
+
+#define COPY_MAC_ADDR(Addr1, Addr2)             	memcpy((Addr1), (Addr2), MAC_ADDR_LEN)
+
+
+/***********************************************************************************
+ *	OS task related data structure and definitions
+ ***********************************************************************************/
+#define RTMP_OS_PID						ULONG /* value or pointer */
+
+#define RTMP_GET_OS_PID(_a, _b)			RtmpOsGetPid(&_a, _b);
+#define CHECK_TASK_LEGALITY(_task)		RtmpOsCheckTaskLegality(_task)
+#define ATE_KILL_THREAD_PID				RtmpThreadPidKill
+
+typedef INT (*RTMP_OS_TASK_CALLBACK)(ULONG);
+
+
+/***********************************************************************************
+ * IOCTL related definitions and data structures.
+ **********************************************************************************/
+#define NET_IOCTL				VOID
+#define PNET_IOCTL				VOID *
+
+/* undef them to avoid compile errors in rt_symb.c */
+#undef EINVAL
+#undef EOPNOTSUPP
+#undef EFAULT
+#undef ENETDOWN
+#undef E2BIG
+#undef ENOMEM
+#undef EAGAIN
+#undef ENOTCONN
+
+#define EINVAL					(-RTMP_IO_EINVAL)
+#define EOPNOTSUPP      		(-RTMP_IO_EOPNOTSUPP)
+#define EFAULT					(-RTMP_IO_EFAULT)
+#define ENETDOWN				(-RTMP_IO_ENETDOWN)
+#define E2BIG					(-RTMP_IO_E2BIG)
+#define ENOMEM					(-RTMP_IO_ENOMEM)
+#define EAGAIN					(-RTMP_IO_EAGAIN)
+#define ENOTCONN				(-RTMP_IO_ENOTCONN)
+
+
+/***********************************************************************************
+ * Timer related definitions and data structures.
+ **********************************************************************************/
+#define OS_HZ					RtmpOsTickUnitGet()
+
+typedef void (*TIMER_FUNCTION)(ULONG);
+
+#define OS_WAIT					RtmpOsWait
+
+#define RTMP_TIME_AFTER			RtmpOsTimerAfter
+#define RTMP_TIME_BEFORE		RtmpOsTimerBefore
+
+#define ONE_TICK				1
+
+#define NdisGetSystemUpTime		RtmpOsGetSystemUpTime
+
+
+/***********************************************************************************
+ *	OS specific cookie data structure binding to RTMP_ADAPTER
+ ***********************************************************************************/
+
+/* do not have compile option in the structure for UTIL module */
+struct os_cookie {
+
+#ifdef RTMP_MAC_USB
+	VOID					*pUsb_Dev;
+#ifdef CONFIG_STA_SUPPORT
+#ifdef CONFIG_PM
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND
+	VOID					 *intf;
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */
+#endif /* CONFIG_PM */
+#endif /* CONFIG_STA_SUPPORT */
+
+#endif /* RTMP_MAC_USB */
+
+#ifdef WORKQUEUE_BH
+	UINT32		     		pAd_va;
+
+	RTMP_NET_TASK_STRUCT	rx_done_work;
+	RTMP_NET_TASK_STRUCT	mgmt_dma_done_work;
+	RTMP_NET_TASK_STRUCT	ac0_dma_done_work;
+	RTMP_NET_TASK_STRUCT	ac1_dma_done_work;
+	RTMP_NET_TASK_STRUCT	ac2_dma_done_work;
+	RTMP_NET_TASK_STRUCT	ac3_dma_done_work;
+	RTMP_NET_TASK_STRUCT	hcca_dma_done_work;
+	
+	RTMP_NET_TASK_STRUCT	tbtt_work;
+
+#else
+	RTMP_NET_TASK_STRUCT	rx_done_task;
+	RTMP_NET_TASK_STRUCT	mgmt_dma_done_task;
+	RTMP_NET_TASK_STRUCT	ac0_dma_done_task;
+#ifdef RALINK_ATE
+	RTMP_NET_TASK_STRUCT	ate_ac0_dma_done_task;
+#endif /* RALINK_ATE */
+	RTMP_NET_TASK_STRUCT	ac1_dma_done_task;
+	RTMP_NET_TASK_STRUCT	ac2_dma_done_task;
+	RTMP_NET_TASK_STRUCT	ac3_dma_done_task;
+	RTMP_NET_TASK_STRUCT	hcca_dma_done_task;
+	RTMP_NET_TASK_STRUCT	tbtt_task;
+#endif /* WORKQUEUE_BH */
+
+
+
+#ifdef RTMP_MAC_USB
+	RTMP_NET_TASK_STRUCT	null_frame_complete_task;
+	RTMP_NET_TASK_STRUCT	rts_frame_complete_task;
+	RTMP_NET_TASK_STRUCT	pspoll_frame_complete_task;
+#endif /* RTMP_MAC_USB */
+
+	RTMP_OS_PID				apd_pid; /*802.1x daemon pid */
+	unsigned long			apd_pid_nr;
+	INT						ioctl_if_type;
+	INT 					ioctl_if;
+};
+
+typedef struct os_cookie	* POS_COOKIE;
+
+
+
+/***********************************************************************************
+ *	OS debugging and printing related definitions and data structure
+ ***********************************************************************************/
+#define PRINT_MAC(addr)	\
+	addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]
+
+#ifdef DBG
+extern ULONG		RTDebugLevel;
+
+#define DBGPRINT_RAW(Level, Fmt)    \
+do{                                   \
+    if (Level <= RTDebugLevel)      \
+    {                               \
+        printk Fmt;               \
+    }                               \
+}while(0)
+
+#define DBGPRINT(Level, Fmt)    DBGPRINT_RAW(Level, Fmt)
+
+
+#define DBGPRINT_ERR(Fmt)           \
+{                                   \
+    printk("ERROR!!! ");          \
+    printk Fmt;                  \
+}
+
+#define DBGPRINT_S(Status, Fmt)		\
+{									\
+	printk Fmt;					\
+}
+#else
+#define DBGPRINT(Level, Fmt)
+#define DBGPRINT_RAW(Level, Fmt)
+#define DBGPRINT_S(Status, Fmt)
+#define DBGPRINT_ERR(Fmt)
+#endif
+
+#undef  ASSERT
+#ifdef DBG
+#define ASSERT(x)                                                               \
+{                                                                               \
+    if (!(x))                                                                   \
+    {                                                                           \
+        printk(__FILE__ ":%d assert " #x "failed\n", __LINE__);    \
+    }                                                                           \
+}
+#else
+#define ASSERT(x)
+#endif /* DBG */
+
+void hex_dump(char *str, unsigned char *pSrcBufVA, unsigned int SrcBufLen);
+
+
+/*********************************************************************************************************
+	The following code are not revised, temporary put it here.
+  *********************************************************************************************************/
+
+
+/***********************************************************************************
+ * Device DMA Access related definitions and data structures.
+ **********************************************************************************/
+/*#ifdef RTMP_MAC_PCI*/
+#define size_t						ULONG
+
+ra_dma_addr_t linux_pci_map_single(void *handle, void *ptr, size_t size, int sd_idx, int direction);
+void linux_pci_unmap_single(void *handle, ra_dma_addr_t dma_addr, size_t size, int direction);
+
+#define pci_enable_msi		RtmpOsPciMsiEnable
+#define pci_disable_msi		RtmpOsPciMsiDisable
+
+#define PCI_MAP_SINGLE_DEV(_handle, _ptr, _size, _sd_idx, _dir)				\
+	linux_pci_map_single(_handle, _ptr, _size, _sd_idx, _dir)
+	
+#define PCI_UNMAP_SINGLE(_pAd, _ptr, _size, _dir)						\
+	linux_pci_unmap_single(((POS_COOKIE)(_pAd->OS_Cookie))->pci_dev, _ptr, _size, _dir)
+
+#define PCI_ALLOC_CONSISTENT(_pci_dev, _size, _ptr)							\
+	pci_alloc_consistent(_pci_dev, _size, _ptr)
+
+#define PCI_FREE_CONSISTENT(_pci_dev, _size, _virtual_addr, _physical_addr)	\
+	pci_free_consistent(_pci_dev, _size, _virtual_addr, _physical_addr)
+/*#endif RTMP_MAC_PCI*/
+
+#define DEV_ALLOC_SKB(_pAd, _Pkt, _length)									\
+	_Pkt = RtmpOSNetPktAlloc(_pAd, _length);
+
+/*#ifdef RTMP_MAC_USB */
+/*#define PCI_MAP_SINGLE(_handle, _ptr, _size, _dir)				(ULONG)0 */
+/*#define PCI_UNMAP_SINGLE(_handle, _ptr, _size, _dir) */
+/*#endif RTMP_MAC_USB */
+
+
+/*
+ * ULONG
+ * RTMP_GetPhysicalAddressLow(
+ *   IN NDIS_PHYSICAL_ADDRESS  PhysicalAddress);
+ */
+#define RTMP_GetPhysicalAddressLow(PhysicalAddress)		(PhysicalAddress)
+
+/*
+ * ULONG
+ * RTMP_GetPhysicalAddressHigh(
+ *   IN NDIS_PHYSICAL_ADDRESS  PhysicalAddress);
+ */
+#define RTMP_GetPhysicalAddressHigh(PhysicalAddress)		(0)
+
+/*
+ * VOID
+ * RTMP_SetPhysicalAddressLow(
+ *   IN NDIS_PHYSICAL_ADDRESS  PhysicalAddress,
+ *   IN ULONG  Value);
+ */
+#define RTMP_SetPhysicalAddressLow(PhysicalAddress, Value)	\
+			PhysicalAddress = Value;
+
+/*
+ * VOID
+ * RTMP_SetPhysicalAddressHigh(
+ *   IN NDIS_PHYSICAL_ADDRESS  PhysicalAddress,
+ *   IN ULONG  Value);
+ */
+#define RTMP_SetPhysicalAddressHigh(PhysicalAddress, Value)
+
+#define NdisMIndicateStatus(_w, _x, _y, _z)
+
+
+
+/***********************************************************************************
+ * Device Register I/O Access related definitions and data structures.
+ **********************************************************************************/
+#define readl		RTMP_PCI_Readl
+#define readw		RTMP_PCI_Readw
+#define readb		RTMP_PCI_Readb
+#define writel		RTMP_PCI_Writel
+#define writew		RTMP_PCI_Writew
+#define writeb		RTMP_PCI_Writeb
+
+/* TODO: We can merge two readl to a function to speed up or one real/writel */
+
+
+#ifdef RTMP_MAC_USB
+#define RTMP_IO_FORCE_READ32(_A, _R, _pV)								\
+	RTUSBReadMACRegister((_A), (_R), (PUINT32) (_pV))
+
+#define RTMP_IO_READ32(_A, _R, _pV)								\
+	RTUSBReadMACRegister((_A), (_R), (PUINT32) (_pV))
+
+#define RTMP_IO_READ8(_A, _R, _pV)								\
+{																\
+}
+
+#define RTMP_IO_WRITE32(_A, _R, _V)								\
+	RTUSBWriteMACRegister((_A), (_R), (UINT32) (_V))
+
+
+#define RTMP_IO_WRITE8(_A, _R, _V)								\
+{																\
+	USHORT	_Val = _V;											\
+	RTUSBSingleWrite((_A), (_R), (USHORT) (_Val));								\
+}
+
+
+#define RTMP_IO_WRITE16(_A, _R, _V)								\
+{																\
+	RTUSBSingleWrite((_A), (_R), (USHORT) (_V));								\
+}
+
+#define RTMP_IO_FORCE_WRITE32
+#define RTMP_SYS_IO_READ32
+#define RTMP_SYS_IO_WRITE32
+#endif /* RTMP_MAC_USB */
+
+#define pci_read_config_word	RtmpOsPciConfigReadWord
+#define pci_write_config_word	RtmpOsPciConfigWriteWord
+#define pci_read_config_dword	RtmpOsPciConfigReadDWord
+#define pci_write_config_dword	RtmpOsPciConfigWriteDWord
+#define pci_find_capability		RtmpOsPciFindCapability
+
+#define RTMP_USB_URB_DATA_GET	RtmpOsUsbUrbDataGet
+#define RTMP_USB_URB_STATUS_GET	RtmpOsUsbUrbStatusGet
+#define RTMP_USB_URB_LEN_GET	RtmpOsUsbUrbLenGet
+
+#define IW_SCAN_MAX_DATA		RTMP_OS_MAX_SCAN_DATA_GET()
+
+/***********************************************************************************
+ *	Network Related data structure and marco definitions
+ ***********************************************************************************/
+#define PKTSRC_NDIS             0x7f
+#define PKTSRC_DRIVER           0x0f
+
+#define RTMP_OS_NETDEV_GET_PHYADDR	RtmpOsNetDevGetPhyAddr
+#define SET_OS_PKT_NETDEV			RtmpOsSetPktNetDev
+#define RTMP_OS_NETDEV_GET_DEVNAME	RtmpOsGetNetDevName
+#define RTMP_OS_NETDEV_SET_PRIV		RtmpOsSetNetDevPriv
+#define RTMP_OS_NETDEV_GET_PRIV		RtmpOsGetNetDevPriv
+#define RTMP_OS_NETDEV_SET_TYPE		RtmpOsSetNetDevType
+#define RTMP_OS_NETDEV_SET_TYPE_MONITOR		RtmpOsSetNetDevTypeMonitor
+
+#define QUEUE_ENTRY_TO_PACKET(pEntry) \
+	(PNDIS_PACKET)(pEntry)
+
+#define PACKET_TO_QUEUE_ENTRY(pPacket) \
+	(PQUEUE_ENTRY)(pPacket)
+
+#define RTMP_OS_NETDEV_STATE_RUNNING(_pNetDev)	(RtmpOSNetDevIsUp(_pNetDev) == TRUE)
+
+#define RELEASE_NDIS_PACKET(_pReserved, _pPacket, _Status)				\
+{																		\
+        RTMPFreeNdisPacket(_pReserved, _pPacket);						\
+}
+
+/*
+ * packet helper
+ * 	- convert internal rt packet to os packet or
+ *             os packet to rt packet
+ */
+extern ULONG RTPktOffsetData, RTPktOffsetLen, RTPktOffsetCB;
+
+#define RTPKT_TO_OSPKT(_p)		(_p)
+#define OSPKT_TO_RTPKT(_p)		(_p)
+
+#define GET_OS_PKT_DATAPTR(_pkt) \
+		((UCHAR *)(*(ULONG *)((UCHAR *)_pkt + RTPktOffsetData)))
+
+#define SET_OS_PKT_DATAPTR		\
+		RtmpOsPktDataPtrAssign
+
+#define GET_OS_PKT_LEN(_pkt) 	\
+		(*(UINT32 *)((UCHAR *)_pkt + RTPktOffsetLen))
+
+#define SET_OS_PKT_LEN			\
+		RtmpOsPktLenAssign
+
+#define GET_OS_PKT_CB(_pkt) 	\
+		((UCHAR *)((UCHAR *)_pkt + RTPktOffsetCB))
+
+#define GET_OS_PKT_NETDEV(_pkt) RtmpOsPktNetDevGet
+
+#define OS_PKT_CLONED			\
+		RtmpOsIsPktCloned
+
+#define OS_PKT_COPY				\
+		RtmpOsPktCopy
+
+#define OS_PKT_TAIL_ADJUST		\
+		RtmpOsPktTailAdjust
+
+#define OS_PKT_HEAD_BUF_EXTEND	\
+		RtmpOsPktHeadBufExtend
+
+#define OS_PKT_TAIL_BUF_EXTEND	\
+		RtmpOsPktTailBufExtend
+
+#define OS_PKT_RESERVE			\
+		RtmpOsPktReserve
+
+#define OS_PKT_CLONE(_pAd, _pkt, _src, _flag)		\
+		_src = RtmpOsPktClone((_pkt));
+
+#define RTMP_OS_PKT_INIT			RtmpOsPktInit
+
+extern UINT32 RtmpOsGetUnaligned32(
+	IN UINT32				*pWord);
+
+extern ULONG RtmpOsGetUnalignedlong(
+	IN ULONG				*pWord);
+
+#define get_unaligned		RtmpOsGetUnaligned
+#define get_unaligned32		RtmpOsGetUnaligned32
+#define get_unalignedlong	RtmpOsGetUnalignedlong
+
+#define OS_NTOHS		RtmpOsNtohs
+#define OS_HTONS		RtmpOsHtons
+#define OS_NTOHL		RtmpOsNtohl
+#define OS_HTONL		RtmpOsHtonl
+
+#ifndef ntohs
+#define ntohs			OS_NTOHS
+#endif /* ntohs */
+#ifndef htons
+#define htons			OS_HTONS
+#endif /* htons */
+#ifndef ntohl
+#define ntohl			OS_NTOHL
+#endif /* ntohl */
+#ifndef htonl
+#define htonl			OS_HTONL
+#endif /* htonl */
+
+#define RTMP_OS_NETDEV_START_QUEUE				RtmpOsNetQueueStart
+#define RTMP_OS_NETDEV_STOP_QUEUE				RtmpOsNetQueueStop
+#define RTMP_OS_NETDEV_WAKE_QUEUE				RtmpOsNetQueueWake
+
+
+#define CB_OFF  10
+
+#define PACKET_CB_ASSIGN(_p, _offset)	\
+	(*((UINT8 *)_p + RTPktOffsetCB + _offset))
+
+#define PACKET_CB(_p, _offset)	\
+	(*((UINT8 *)_p + RTPktOffsetCB + CB_OFF + _offset))
+
+/* User Priority */
+#define RTMP_SET_PACKET_UP(_p, _prio)			(PACKET_CB(_p, 0) = _prio)
+#define RTMP_GET_PACKET_UP(_p)					(PACKET_CB(_p, 0))
+
+/* Fragment # */
+#define RTMP_SET_PACKET_FRAGMENTS(_p, _num)		(PACKET_CB(_p, 1) = _num)
+#define RTMP_GET_PACKET_FRAGMENTS(_p)			(PACKET_CB(_p, 1))
+
+/* 0x0 ~0x7f: TX to AP's own BSS which has the specified AID. if AID>127, set bit 7 in RTMP_SET_PACKET_EMACTAB too. */
+/*(this value also as MAC(on-chip WCID) table index) */
+/* 0x80~0xff: TX to a WDS link. b0~6: WDS index */
+#define RTMP_SET_PACKET_WCID(_p, _wdsidx)		(PACKET_CB(_p, 2) = _wdsidx)
+#define RTMP_GET_PACKET_WCID(_p)          		(PACKET_CB(_p, 2))
+
+/* 0xff: PKTSRC_NDIS, others: local TX buffer index. This value affects how to a packet */
+#define RTMP_SET_PACKET_SOURCE(_p, _pktsrc)		(PACKET_CB(_p, 3) = _pktsrc)
+#define RTMP_GET_PACKET_SOURCE(_p)       		(PACKET_CB(_p, 3))
+
+/* RTS/CTS-to-self protection method */
+#define RTMP_SET_PACKET_RTS(_p, _num)      		(PACKET_CB(_p, 4) = _num)
+#define RTMP_GET_PACKET_RTS(_p)          		(PACKET_CB(_p, 4))
+/* see RTMP_S(G)ET_PACKET_EMACTAB */
+
+/* TX rate index */
+#define RTMP_SET_PACKET_TXRATE(_p, _rate)		(PACKET_CB(_p, 5) = _rate)
+#define RTMP_GET_PACKET_TXRATE(_p)		  		(PACKET_CB(_p, 5))
+
+/* From which Interface */
+#define RTMP_SET_PACKET_IF(_p, _ifdx)			(PACKET_CB(_p, 6) = _ifdx)
+#define RTMP_GET_PACKET_IF(_p)		  			(PACKET_CB(_p, 6))
+#define RTMP_SET_PACKET_NET_DEVICE_MBSSID(_p, _bss)		RTMP_SET_PACKET_IF((_p), (_bss))
+#define RTMP_SET_PACKET_NET_DEVICE_WDS(_p, _bss)		RTMP_SET_PACKET_IF((_p), ((_bss) + MIN_NET_DEVICE_FOR_WDS))
+#define RTMP_SET_PACKET_NET_DEVICE_APCLI(_p, _idx)   	RTMP_SET_PACKET_IF((_p), ((_idx) + MIN_NET_DEVICE_FOR_APCLI))
+#define RTMP_SET_PACKET_NET_DEVICE_MESH(_p, _idx)   	RTMP_SET_PACKET_IF((_p), ((_idx) + MIN_NET_DEVICE_FOR_MESH))
+#define RTMP_SET_PACKET_NET_DEVICE_P2P(_p, _idx)   		RTMP_SET_PACKET_IF((_p), ((_idx) + MIN_NET_DEVICE_FOR_P2P_GO))
+#define RTMP_GET_PACKET_NET_DEVICE_MBSSID(_p)			RTMP_GET_PACKET_IF((_p))
+#define RTMP_GET_PACKET_NET_DEVICE(_p)					RTMP_GET_PACKET_IF((_p))
+
+#define RTMP_SET_PACKET_MOREDATA(_p, _morebit)	(PACKET_CB(_p, 7) = _morebit)
+#define RTMP_GET_PACKET_MOREDATA(_p)			(PACKET_CB(_p, 7))
+
+
+
+
+
+/* */
+/*	Sepcific Pakcet Type definition */
+/* */
+#define RTMP_PACKET_SPECIFIC_CB_OFFSET	11
+
+#define RTMP_PACKET_SPECIFIC_DHCP		0x01
+#define RTMP_PACKET_SPECIFIC_EAPOL		0x02
+#define RTMP_PACKET_SPECIFIC_IPV4		0x04
+#define RTMP_PACKET_SPECIFIC_WAI		0x08
+#define RTMP_PACKET_SPECIFIC_VLAN		0x10
+#define RTMP_PACKET_SPECIFIC_LLCSNAP	0x20
+
+/*Specific */
+#define RTMP_SET_PACKET_SPECIFIC(_p, _flg)	   	(PACKET_CB(_p, 11) = _flg)
+
+/*DHCP */
+#define RTMP_SET_PACKET_DHCP(_p, _flg)   								\
+			do{															\
+				if (_flg)												\
+					PACKET_CB(_p, 11) |= (RTMP_PACKET_SPECIFIC_DHCP);	\
+				else													\
+					PACKET_CB(_p, 11) &= (~RTMP_PACKET_SPECIFIC_DHCP);	\
+			}while(0)
+#define RTMP_GET_PACKET_DHCP(_p)		(PACKET_CB(_p, 11) & RTMP_PACKET_SPECIFIC_DHCP)
+
+/*EAPOL */
+#define RTMP_SET_PACKET_EAPOL(_p, _flg)   								\
+			do{															\
+				if (_flg)												\
+					PACKET_CB(_p, 11) |= (RTMP_PACKET_SPECIFIC_EAPOL);	\
+				else													\
+					PACKET_CB(_p, 11) &= (~RTMP_PACKET_SPECIFIC_EAPOL);	\
+			}while(0)
+#define RTMP_GET_PACKET_EAPOL(_p)		(PACKET_CB(_p, 11) & RTMP_PACKET_SPECIFIC_EAPOL)
+
+/*WAI */
+#define RTMP_SET_PACKET_WAI(_p, _flg)   								\
+			do{															\
+				if (_flg)												\
+					PACKET_CB(_p, 11) |= (RTMP_PACKET_SPECIFIC_WAI);	\
+				else													\
+					PACKET_CB(_p, 11) &= (~RTMP_PACKET_SPECIFIC_WAI);	\
+			}while(0)
+#define RTMP_GET_PACKET_WAI(_p)			(PACKET_CB(_p, 11) & RTMP_PACKET_SPECIFIC_WAI)
+
+#define RTMP_GET_PACKET_LOWRATE(_p)		(PACKET_CB(_p, 11) & (RTMP_PACKET_SPECIFIC_EAPOL | RTMP_PACKET_SPECIFIC_DHCP | RTMP_PACKET_SPECIFIC_WAI))
+
+/*VLAN */
+#define RTMP_SET_PACKET_VLAN(_p, _flg)   								\
+			do{															\
+				if (_flg)												\
+					PACKET_CB(_p, 11) |= (RTMP_PACKET_SPECIFIC_VLAN);	\
+				else													\
+					PACKET_CB(_p, 11) &= (~RTMP_PACKET_SPECIFIC_VLAN);	\
+			}while(0)
+#define RTMP_GET_PACKET_VLAN(_p)		(PACKET_CB(_p, 11) & RTMP_PACKET_SPECIFIC_VLAN)
+
+/*LLC/SNAP */
+#define RTMP_SET_PACKET_LLCSNAP(_p, _flg)   								\
+			do{																\
+				if (_flg)													\
+					PACKET_CB(_p, 11) |= (RTMP_PACKET_SPECIFIC_LLCSNAP);	\
+				else														\
+					PACKET_CB(_p, 11) &= (~RTMP_PACKET_SPECIFIC_LLCSNAP);	\
+			}while(0)
+			
+#define RTMP_GET_PACKET_LLCSNAP(_p)		(PACKET_CB(_p, 11) & RTMP_PACKET_SPECIFIC_LLCSNAP)
+
+/* IP */
+#define RTMP_SET_PACKET_IPV4(_p, _flg)									\
+			do{															\
+				if (_flg)												\
+					PACKET_CB(_p, 11) |= (RTMP_PACKET_SPECIFIC_IPV4);	\
+				else													\
+					PACKET_CB(_p, 11) &= (~RTMP_PACKET_SPECIFIC_IPV4);	\
+			}while(0)
+			
+#define RTMP_GET_PACKET_IPV4(_p)		(PACKET_CB(_p, 11) & RTMP_PACKET_SPECIFIC_IPV4)
+
+
+/* If this flag is set, it indicates that this EAPoL frame MUST be clear. */
+#define RTMP_SET_PACKET_CLEAR_EAP_FRAME(_p, _flg)   (PACKET_CB(_p, 12) = _flg)
+#define RTMP_GET_PACKET_CLEAR_EAP_FRAME(_p)         (PACKET_CB(_p, 12))
+
+
+#define MAX_PACKETS_IN_QUEUE				(512)
+
+
+/* use bit3 of cb[CB_OFF+16] */
+
+#define RTMP_SET_PACKET_5VT(_p, _flg)   (PACKET_CB(_p, 22) = _flg)
+#define RTMP_GET_PACKET_5VT(_p)         (PACKET_CB(_p, 22))
+
+#define RTMP_SET_PACKET_PROTOCOL(_p, _protocol) {\
+	(PACKET_CB(_p, 23) = (UINT8)((_protocol) & 0x00ff)); \
+	(PACKET_CB(_p, 24) = (UINT8)(((_protocol) & 0xff00) >> 8)); \
+}
+
+#define RTMP_GET_PACKET_PROTOCOL(_p) \
+	((((UINT16)PACKET_CB(_p, 23)) << 8) \
+	| ((UINT16)PACKET_CB(_p, 24)))
+
+#ifdef INF_AMAZON_SE
+/* [CB_OFF+28], 1B, Iverson patch for WMM A5-T07 ,WirelessStaToWirelessSta do not bulk out aggregate */
+#define RTMP_SET_PACKET_NOBULKOUT(_p, _morebit)			(PACKET_CB(_p, 28) = _morebit)
+#define RTMP_GET_PACKET_NOBULKOUT(_p)					(PACKET_CB(_p, 28))
+#endif /* INF_AMAZON_SE */
+/* Max skb->cb = 48B = [CB_OFF+38] */
+
+
+
+
+
+
+
+/***********************************************************************************
+ *	Other function prototypes definitions
+ ***********************************************************************************/
+void RTMP_GetCurrentSystemTime(LARGE_INTEGER *time);
+
+
+
+
+#ifdef RTMP_USB_SUPPORT
+/******************************************************************************
+
+  	USB related definitions
+
+******************************************************************************/
+
+#define RTMP_USB_PKT_COPY			RtmpOsPktBodyCopy
+
+/*typedef struct usb_device_id USB_DEVICE_ID; */
+
+#ifdef INF_AMAZON_SE
+#define BULKAGGRE_SIZE          30
+#else
+#define BULKAGGRE_SIZE          60
+#endif /* INF_AMAZON_SE */
+
+/*#define RT28XX_PUT_DEVICE			rausb_put_dev */
+#define RTUSB_ALLOC_URB				rausb_alloc_urb
+#define RTUSB_SUBMIT_URB			rausb_submit_urb
+#define RTUSB_URB_ALLOC_BUFFER		rausb_buffer_alloc
+#define RTUSB_URB_FREE_BUFFER		rausb_buffer_free
+#define RTUSB_FREE_URB				rausb_free_urb
+#define RTUSB_UNLINK_URB			rausb_kill_urb
+#define USB_CONTROL_MSG				rausb_control_msg
+#define usb_sndctrlpipe				rausb_sndctrlpipe
+#define usb_rcvctrlpipe				rausb_rcvctrlpipe
+#define RTUSB_AUTOPM_PUT_INTERFACE	rausb_autopm_put_interface
+#define RTUSB_AUTOPM_GET_INTERFACE	rausb_autopm_get_interface
+
+
+
+#define RTUSB_CONTROL_MSG(pUsb_Dev, uEndpointAddress, Request, RequestType, Value,Index, tmpBuf, TransferBufferLength, timeout, ret)	\
+  		do{	\
+			if (RequestType == DEVICE_VENDOR_REQUEST_OUT)	\
+				ret = USB_CONTROL_MSG(pUsb_Dev, usb_sndctrlpipe(pUsb_Dev, uEndpointAddress), Request, RequestType, Value, Index, tmpBuf, TransferBufferLength, timeout);	\
+			else if (RequestType == DEVICE_VENDOR_REQUEST_IN)	\
+				ret = USB_CONTROL_MSG(pUsb_Dev, usb_rcvctrlpipe(pUsb_Dev, uEndpointAddress), Request, RequestType, Value, Index, tmpBuf, TransferBufferLength, timeout);	\
+			else	\
+			{	\
+				DBGPRINT(RT_DEBUG_ERROR, ("vendor request direction is failed\n"));	\
+				ret = -1;	\
+			}	\
+		}while(0)
+
+
+extern VOID dump_urb(VOID *purb);
+
+typedef VOID		USBHST_STATUS;
+typedef INT32		URBCompleteStatus;
+#define RTMP_OS_WAIT_QUEUE_HEAD		VOID
+typedef VOID (*usb_complete_t)(VOID *);
+
+#define RtmpUsbBulkOutDataPacketComplete		pRtmpDrvNetOps->RtmpNetUsbBulkOutDataPacketComplete
+#define RtmpUsbBulkOutMLMEPacketComplete		pRtmpDrvNetOps->RtmpNetUsbBulkOutMLMEPacketComplete
+#define RtmpUsbBulkOutNullFrameComplete			pRtmpDrvNetOps->RtmpNetUsbBulkOutNullFrameComplete
+#define RtmpUsbBulkOutRTSFrameComplete			pRtmpDrvNetOps->RtmpNetUsbBulkOutRTSFrameComplete
+#define RtmpUsbBulkOutPsPollComplete			pRtmpDrvNetOps->RtmpNetUsbBulkOutPsPollComplete
+#define RtmpUsbBulkRxComplete					pRtmpDrvNetOps->RtmpNetUsbBulkRxComplete
+
+#define RTUSBBulkOutDataPacketComplete(Status, pURB, pt_regs)    RTUSBBulkOutDataPacketComplete(pURB)
+#define RTUSBBulkOutMLMEPacketComplete(Status, pURB, pt_regs)    RTUSBBulkOutMLMEPacketComplete(pURB)
+#define RTUSBBulkOutNullFrameComplete(Status, pURB, pt_regs)     RTUSBBulkOutNullFrameComplete(pURB)
+#define RTUSBBulkOutRTSFrameComplete(Status, pURB, pt_regs)      RTUSBBulkOutRTSFrameComplete(pURB)
+#define RTUSBBulkOutPsPollComplete(Status, pURB, pt_regs)        RTUSBBulkOutPsPollComplete(pURB)
+#define RTUSBBulkRxComplete(Status, pURB, pt_regs)               RTUSBBulkRxComplete(pURB)
+
+USBHST_STATUS RTUSBBulkOutDataPacketComplete(URBCompleteStatus Status, purbb_t pURB, pregs *pt_regs);
+USBHST_STATUS RTUSBBulkOutMLMEPacketComplete(URBCompleteStatus Status, purbb_t pURB, pregs *pt_regs);
+USBHST_STATUS RTUSBBulkOutNullFrameComplete(URBCompleteStatus Status, purbb_t pURB, pregs *pt_regs);
+USBHST_STATUS RTUSBBulkOutRTSFrameComplete(URBCompleteStatus Status, purbb_t pURB, pregs *pt_regs);
+USBHST_STATUS RTUSBBulkOutPsPollComplete(URBCompleteStatus Status, purbb_t pURB, pregs *pt_regs);
+USBHST_STATUS RTUSBBulkRxComplete(URBCompleteStatus Status, purbb_t pURB, pregs *pt_regs);
+
+#define rtusb_urb_context  context
+#define rtusb_urb_status   status
+
+#define RTMP_OS_USB_CONTEXT_GET		RtmpOsUsbContextGet
+#define RTMP_OS_USB_STATUS_GET		RtmpOsUsbStatusGet
+
+#define RTUSB_URB_DMA_MAPPING		RtmpOsUsbDmaMapping
+
+#define RTUSB_FILL_TX_BULK_URB		RtmpOsUsbInitHTTxDesc
+#define RTUSB_FILL_HTTX_BULK_URB	RtmpOsUsbInitHTTxDesc
+#define RTUSB_FILL_RX_BULK_URB		RtmpOsUsbInitRxDesc
+
+#undef in_interrupt
+#define in_interrupt		RtmpOsIsInInterrupt
+
+extern VOID *rausb_alloc_urb(INT32 iso_packets);
+extern VOID rausb_free_urb(VOID *urb);
+extern INT32 rausb_submit_urb(VOID *urb);
+extern VOID *rausb_buffer_alloc(VOID *dev,
+								size_t size,
+								ra_dma_addr_t *dma);
+extern VOID rausb_buffer_free(VOID *dev,
+								size_t size,
+								VOID *addr,
+								ra_dma_addr_t dma);
+extern VOID rausb_kill_urb(VOID *urb);
+
+extern int rausb_control_msg(VOID *dev,
+						unsigned int pipe,
+						__u8 request,
+						__u8 requesttype,
+						__u16 value,
+						__u16 index,
+						void *data,
+						__u16 size,
+						int timeout);
+
+#endif /* RTMP_USB_SUPPORT */
+
+
+#ifdef RALINK_ATE
+/******************************************************************************
+
+  	ATE related definitions
+
+******************************************************************************/
+#define ate_print printk
+#define ATEDBGPRINT DBGPRINT
+
+#ifdef RTMP_MAC_USB
+#ifdef CONFIG_STA_SUPPORT
+#undef EEPROM_BIN_FILE_NAME /* Avoid APSTA mode re-define issue */
+#define EEPROM_BIN_FILE_NAME  "/etc/Wireless/RT2870STA/e2p.bin"
+#endif /* CONFIG_STA_SUPPORT */
+#endif /* RTMP_MAC_USB */
+
+#endif /* RALINK_ATE */
+
+
+/* OS definition re-declaration */
+#ifndef NULL
+#define NULL			0
+#endif
+
+#ifndef ETH_P_IPV6
+#define ETH_P_IPV6		0x86DD
+#endif
+
+#ifndef ETH_P_IP
+#define ETH_P_IP        0x0800          /* Internet Protocol packet     */
+#endif
+
+#ifndef ETH_ALEN
+#define ETH_ALEN		6
+#endif
+
+#undef KERN_EMERG
+#define KERN_EMERG
+#undef KERN_WARNING
+#define KERN_WARNING
+
+#undef copy_from_user
+#undef copy_to_user
+
+#define RTMP_OS_MAX_SCAN_DATA_GET		RtmpOsMaxScanDataGet
+#define vmalloc							RtmpOsVmalloc
+#define vfree							RtmpOsVfree
+#define copy_from_user					RtmpOsCopyFromUser
+#define copy_to_user					RtmpOsCopyToUser
+#define simple_strtol					RtmpOsSimpleStrtol
+
+#undef atomic_read
+#undef atomic_dec
+#undef InterlockedExchange
+#define atomic_read						RtmpOsAtomicRead
+#define atomic_dec						RtmpOsAtomicDec
+#define InterlockedExchange				RtmpOsAtomicInterlockedExchange
+
+extern int sprintf(char * buf, const char * fmt, ...);
+extern int sscanf(const char *, const char *, ...);
+
+#define printk							pRaOsOps->ra_printk
+#define snprintf						pRaOsOps->ra_snprintf
+
+#endif /* __RT_LINUX_H__ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/os/rt_linux_cmm.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/os/rt_linux_cmm.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/os/rt_linux_cmm.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/os/rt_linux_cmm.h	2017-09-23 03:42:49.794675749 +0800
@@ -0,0 +1,420 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RT_LINUX_CMM_H__
+#define __RT_LINUX_CMM_H__
+
+
+typedef struct _OS_RSTRUC  {
+	UCHAR *pContent; /* pointer to real structure content */
+} OS_RSTRUC;
+
+
+/* declare new chipset function here */
+#ifdef OS_ABL_FUNC_SUPPORT
+
+#define RTMP_DECLARE_DRV_OPS_FUNCTION(_func)					\
+	void Rtmp_Drv_Ops_##_func(VOID *__pDrvOps, VOID *__pNetOps, \
+						VOID *__pPciConfig, VOID *__pUsbConfig)
+
+#define RTMP_BUILD_DRV_OPS_FUNCTION(_func)						\
+void Rtmp_Drv_Ops_##_func(VOID *__pDrvOps, VOID *__pNetOps, 	\
+					VOID *__pPciConfig, VOID *__pUsbConfig)		\
+{																\
+	RtmpDrvOpsInit(__pDrvOps, __pNetOps, __pPciConfig, __pUsbConfig);\
+}
+
+#define RTMP_GET_DRV_OPS_FUNCTION(_func)						\
+	(PVOID)Rtmp_Drv_Ops_##_func
+
+#define RTMP_DRV_OPS_FUNCTION_BODY(_func)						\
+	Rtmp_Drv_Ops_##_func
+
+
+#define xdef_to_str(s)   def_to_str(s) 
+#define def_to_str(s)    #s
+
+
+
+
+
+
+#ifdef RT3070
+#define RTMP_DRV_NAME	"rt3070" xdef_to_str(RT28xx_MODE)
+#define RT_CHIPSET		3070
+RTMP_DECLARE_DRV_OPS_FUNCTION(3070);
+#define RTMP_DRV_OPS_FUNCTION				RTMP_DRV_OPS_FUNCTION_BODY(3070)
+#define RTMP_BUILD_DRV_OPS_FUNCTION_BODY	RTMP_BUILD_DRV_OPS_FUNCTION(3070)
+#endif /* RT3070 */
+
+
+
+
+#else
+
+#ifdef RTMP_MAC_USB
+#define RTMP_DRV_NAME	"rt2870"
+#else
+#define RTMP_DRV_NAME	"rt2860"
+#endif /* RTMP_MAC_USB */
+
+#endif /* OS_ABL_FUNC_SUPPORT */
+
+
+/*****************************************************************************
+ *	OS task related data structure and definitions
+ ******************************************************************************/
+#define RTMP_OS_TASK_INIT(__pTask, __pTaskName, __pAd)		\
+	RtmpOSTaskInit(__pTask, __pTaskName, __pAd, &(__pAd)->RscTaskMemList, &(__pAd)->RscSemMemList);
+
+#ifndef OS_ABL_FUNC_SUPPORT
+
+/* rt_linux.h */
+#define RTMP_OS_TASK				OS_TASK
+
+#define RTMP_OS_TASK_GET(__pTask)							\
+	(__pTask)
+
+#define RTMP_OS_TASK_DATA_GET(__pTask)						\
+	((__pTask)->priv)
+
+#define RTMP_OS_TASK_IS_KILLED(__pTask)						\
+	((__pTask)->task_killed)
+
+#ifdef KTHREAD_SUPPORT
+#define RTMP_OS_TASK_WAKE_UP(__pTask)						\
+	WAKE_UP(pTask);
+#else
+#define RTMP_OS_TASK_WAKE_UP(__pTask)						\
+	RTMP_SEM_EVENT_UP(&(pTask)->taskSema);
+#endif /* KTHREAD_SUPPORT */
+
+#ifdef KTHREAD_SUPPORT
+#define RTMP_OS_TASK_LEGALITY(__pTask)						\
+	if ((__pTask)->kthread_task != NULL)
+#else
+#define RTMP_OS_TASK_LEGALITY(__pTask)						\
+	CHECK_PID_LEGALITY((__pTask)->taskPID)
+#endif /* KTHREAD_SUPPORT */
+
+#else
+
+/* rt_linux_cmm.h */
+#define RTMP_OS_TASK				OS_RSTRUC
+
+#define RTMP_OS_TASK_GET(__pTask)							\
+	((OS_TASK *)((__pTask)->pContent))
+
+#define RTMP_OS_TASK_DATA_GET(__pTask)						\
+	RtmpOsTaskDataGet(__pTask)
+
+#define RTMP_OS_TASK_IS_KILLED(__pTask)						\
+	RtmpOsTaskIsKilled(__pTask)
+
+#define RTMP_OS_TASK_WAKE_UP(__pTask)						\
+	RtmpOsTaskWakeUp(pTask)
+
+#define RTMP_OS_TASK_LEGALITY(__pTask)						\
+	if (RtmpOsCheckTaskLegality(__pTask))
+
+#endif /* OS_ABL_FUNC_SUPPORT */
+
+
+/*****************************************************************************
+ * Timer related definitions and data structures.
+ ******************************************************************************/
+#ifndef OS_ABL_FUNC_SUPPORT
+
+/* rt_linux.h */
+#define NDIS_MINIPORT_TIMER			OS_NDIS_MINIPORT_TIMER
+#define RTMP_OS_TIMER				OS_TIMER
+
+#define RTMP_OS_FREE_TIMER(__pAd)
+#define RTMP_OS_FREE_LOCK(__pAd)
+#define RTMP_OS_FREE_TASKLET(__pAd)
+#define RTMP_OS_FREE_TASK(__pAd)
+#define RTMP_OS_FREE_SEM(__pAd)
+#define RTMP_OS_FREE_ATOMIC(__pAd)
+
+#else
+
+/* rt_linux_cmm.h */
+#define NDIS_MINIPORT_TIMER			OS_RSTRUC
+#define RTMP_OS_TIMER				OS_RSTRUC
+
+#define RTMP_OS_FREE_TIMER(__pAd)											\
+	DBGPRINT(RT_DEBUG_ERROR, ("%s: free timer resources!\n", __FUNCTION__));\
+	RTMP_OS_Free_Rscs(&((__pAd)->RscTimerMemList))
+#define RTMP_OS_FREE_TASK(__pAd)											\
+	DBGPRINT(RT_DEBUG_ERROR, ("%s: free task resources!\n", __FUNCTION__));	\
+	RTMP_OS_Free_Rscs(&((__pAd)->RscTaskMemList))
+#define RTMP_OS_FREE_LOCK(__pAd)											\
+	DBGPRINT(RT_DEBUG_ERROR, ("%s: free lock resources!\n", __FUNCTION__));	\
+	RTMP_OS_Free_Rscs(&((__pAd)->RscLockMemList))
+#define RTMP_OS_FREE_TASKLET(__pAd)											\
+	DBGPRINT(RT_DEBUG_ERROR, ("%s: free tasklet resources!\n", __FUNCTION__));\
+	RTMP_OS_Free_Rscs(&((__pAd)->RscTaskletMemList))
+#define RTMP_OS_FREE_SEM(__pAd)												\
+	DBGPRINT(RT_DEBUG_ERROR, ("%s: free semaphore resources!\n", __FUNCTION__));\
+	RTMP_OS_Free_Rscs(&((__pAd)->RscSemMemList))
+#define RTMP_OS_FREE_ATOMIC(__pAd)												\
+	DBGPRINT(RT_DEBUG_ERROR, ("%s: free atomic resources!\n", __FUNCTION__));\
+	RTMP_OS_Free_Rscs(&((__pAd)->RscAtomicMemList))
+
+#endif /* OS_ABL_FUNC_SUPPORT */
+
+
+/*****************************************************************************
+ *	OS file operation related data structure definitions
+ ******************************************************************************/
+/* if you add any new type, please also modify RtmpOSFileOpen() */
+#define RTMP_FILE_RDONLY			0x0F01
+#define RTMP_FILE_WRONLY			0x0F02
+#define RTMP_FILE_CREAT				0x0F03
+#define RTMP_FILE_TRUNC				0x0F04
+
+#ifndef OS_ABL_FUNC_SUPPORT
+
+/* rt_linux.h */
+#define RTMP_OS_FS_INFO				OS_FS_INFO
+
+#else
+
+/* rt_linux_cmm.h */
+#define RTMP_OS_FS_INFO				OS_RSTRUC
+
+#endif /* OS_ABL_FUNC_SUPPORT */
+
+
+/*****************************************************************************
+ *	OS semaphore related data structure and definitions
+ ******************************************************************************/
+
+#ifndef OS_ABL_FUNC_SUPPORT
+
+#define NDIS_SPIN_LOCK							OS_NDIS_SPIN_LOCK
+#define NdisAllocateSpinLock(__pReserved, __pLock)	OS_NdisAllocateSpinLock(__pLock)
+#define NdisFreeSpinLock						OS_NdisFreeSpinLock
+#define RTMP_SEM_LOCK							OS_SEM_LOCK
+#define RTMP_SEM_UNLOCK							OS_SEM_UNLOCK
+#define RTMP_IRQ_LOCK							OS_IRQ_LOCK
+#define RTMP_IRQ_UNLOCK							OS_IRQ_UNLOCK
+#define RTMP_INT_LOCK							OS_INT_LOCK
+#define RTMP_INT_UNLOCK							OS_INT_UNLOCK
+#define RTMP_OS_SEM								OS_SEM
+#define RTMP_OS_ATOMIC							atomic_t
+
+#define NdisAcquireSpinLock						RTMP_SEM_LOCK
+#define NdisReleaseSpinLock						RTMP_SEM_UNLOCK
+
+#define RTMP_SEM_EVENT_INIT_LOCKED(__pSema, __pSemaList)	OS_SEM_EVENT_INIT_LOCKED(__pSema)
+#define RTMP_SEM_EVENT_INIT(__pSema, __pSemaList)			OS_SEM_EVENT_INIT(__pSema)
+#define RTMP_SEM_EVENT_DESTORY					OS_SEM_EVENT_DESTORY
+#define RTMP_SEM_EVENT_WAIT						OS_SEM_EVENT_WAIT
+#define RTMP_SEM_EVENT_UP						OS_SEM_EVENT_UP
+
+#define RTUSBMlmeUp								OS_RTUSBMlmeUp
+
+#define RTMP_OS_ATMOIC_INIT(__pAtomic, __pAtomicList)
+#define RTMP_THREAD_PID_KILL(__PID)				KILL_THREAD_PID(__PID, SIGTERM, 1)
+
+#else
+
+#define NDIS_SPIN_LOCK							OS_RSTRUC
+#define RTMP_OS_SEM								OS_RSTRUC
+#define RTMP_OS_ATOMIC							OS_RSTRUC
+
+#define RTMP_SEM_EVENT_INIT_LOCKED 				RtmpOsSemaInitLocked
+#define RTMP_SEM_EVENT_INIT						RtmpOsSemaInit
+#define RTMP_SEM_EVENT_DESTORY					RtmpOsSemaDestory
+#define RTMP_SEM_EVENT_WAIT(_pSema, _status)	((_status) = RtmpOsSemaWaitInterruptible((_pSema)))
+#define RTMP_SEM_EVENT_UP						RtmpOsSemaWakeUp
+
+#define RTUSBMlmeUp								RtmpOsMlmeUp
+
+#define RTMP_OS_ATMOIC_INIT						RtmpOsAtomicInit
+#define RTMP_THREAD_PID_KILL					RtmpThreadPidKill
+
+/* */
+/*  spin_lock enhanced for Nested spin lock */
+/* */
+#define NdisAllocateSpinLock(__pAd, __pLock)		RtmpOsAllocateLock(__pLock, &(__pAd)->RscLockMemList)
+#define NdisFreeSpinLock							RtmpOsFreeSpinLock
+
+#define RTMP_SEM_LOCK(__lock)					\
+{												\
+	RtmpOsSpinLockBh(__lock);					\
+}
+
+#define RTMP_SEM_UNLOCK(__lock)					\
+{												\
+	RtmpOsSpinUnLockBh(__lock);					\
+}
+
+/* sample, use semaphore lock to replace IRQ lock, 2007/11/15 */
+#ifdef MULTI_CORE_SUPPORT
+
+#define RTMP_IRQ_LOCK(__lock, __irqflags)			\
+{													\
+	__irqflags = 0;									\
+	spin_lock_irqsave((spinlock_t *)(__lock), __irqflags);			\
+}
+
+#define RTMP_IRQ_UNLOCK(__lock, __irqflag)			\
+{													\
+	spin_unlock_irqrestore((spinlock_t *)(__lock), __irqflag);			\
+}
+#else
+#define RTMP_IRQ_LOCK(__lock, __irqflags)		\
+{												\
+	__irqflags = 0;								\
+	RtmpOsSpinLockBh(__lock);					\
+}
+
+#define RTMP_IRQ_UNLOCK(__lock, __irqflag)		\
+{												\
+	RtmpOsSpinUnLockBh(__lock);					\
+}
+#endif // MULTI_CORE_SUPPORT //
+#define RTMP_INT_LOCK(__Lock, __Flag)	RtmpOsIntLock(__Lock, &__Flag)
+#define RTMP_INT_UNLOCK					RtmpOsIntUnLock
+
+#define NdisAcquireSpinLock				RTMP_SEM_LOCK
+#define NdisReleaseSpinLock				RTMP_SEM_UNLOCK
+
+#endif /* OS_ABL_FUNC_SUPPORT */
+
+
+/*****************************************************************************
+ *	OS task related data structure and definitions
+ ******************************************************************************/
+
+#ifndef OS_ABL_FUNC_SUPPORT
+
+/* rt_linux.h */
+#define RTMP_NET_TASK_STRUCT		OS_NET_TASK_STRUCT
+#define PRTMP_NET_TASK_STRUCT		POS_NET_TASK_STRUCT
+
+#ifdef WORKQUEUE_BH	
+#define RTMP_OS_TASKLET_SCHE(__pTasklet)							\
+		schedule_work(__pTasklet)
+#define RTMP_OS_TASKLET_INIT(__pAd, __pTasklet, __pFunc)			\
+		INIT_WORK(__pTasklet, __pFunc)
+#define RTMP_OS_TASKLET_KILL(__pTasklet)
+#else
+#define RTMP_OS_TASKLET_SCHE(__pTasklet)							\
+		tasklet_hi_schedule(__pTasklet)
+#define RTMP_OS_TASKLET_INIT(__pAd, __pTasklet, __pFunc, __Data)	\
+		tasklet_init(__pTasklet, __pFunc, __Data)
+#define RTMP_OS_TASKLET_KILL(__pTasklet)							\
+		tasklet_kill(__pTasklet)
+#endif /* WORKQUEUE_BH */
+
+#define RTMP_NET_TASK_DATA_ASSIGN(__Tasklet, __Data)		\
+	(__Tasklet)->data = (unsigned long)__Data
+
+#else
+
+/* rt_linux_cmm.h */
+typedef OS_RSTRUC					RTMP_NET_TASK_STRUCT;
+typedef OS_RSTRUC					*PRTMP_NET_TASK_STRUCT;
+
+#define RTMP_OS_TASKLET_SCHE(__pTasklet)					\
+		RtmpOsTaskletSche(__pTasklet)
+
+#define RTMP_OS_TASKLET_INIT(__pAd, __pTasklet, __pFunc, __Data)	\
+		RtmpOsTaskletInit(__pTasklet, __pFunc, __Data, &(__pAd)->RscTaskletMemList)
+
+#define RTMP_OS_TASKLET_KILL(__pTasklet)					\
+		RtmpOsTaskletKill(__pTasklet)
+
+#define RTMP_NET_TASK_DATA_ASSIGN(__pTasklet, __Data)		\
+		RtmpOsTaskletDataAssign(__pTasklet, __Data)
+
+#endif /* OS_ABL_FUNC_SUPPORT */
+
+
+
+
+/*****************************************************************************
+ *	OS definition related data structure and definitions
+ ******************************************************************************/
+
+#ifdef OS_ABL_SUPPORT
+
+#define RTMP_USB_CONTROL_MSG_ENODEV		-1
+#define RTMP_USB_CONTROL_MSG_FAIL		-2
+
+typedef struct __RTMP_PCI_CONFIG {
+
+	UINT32	ConfigVendorID;
+} RTMP_PCI_CONFIG;
+
+typedef struct __RTMP_USB_CONFIG {
+
+	UINT32	Reserved;
+} RTMP_USB_CONFIG;
+
+extern RTMP_PCI_CONFIG *pRtmpPciConfig;
+extern RTMP_USB_CONFIG *pRtmpUsbConfig;
+
+#define RTMP_OS_PCI_VENDOR_ID			pRtmpPciConfig->ConfigVendorID
+
+/*
+	Declare dma_addr_t here, can not define it in rt_drv.h
+
+	If you define it in include/os/rt_drv.h, then the size in DRIVER module
+	will be 64-bit, but in UTIL/NET modules, it maybe 32-bit.
+	This will cause size mismatch problem when OS_ABL = yes.
+*/
+#define ra_dma_addr_t					unsigned long long
+
+#else
+
+#ifdef RTMP_USB_SUPPORT
+#define RTMP_USB_CONTROL_MSG_ENODEV		(-ENODEV)
+#define RTMP_USB_CONTROL_MSG_FAIL		(-EFAULT)
+#endif /* RTMP_USB_SUPPORT */
+
+#define RTMP_OS_PCI_VENDOR_ID			PCI_VENDOR_ID
+
+#define ra_dma_addr_t					dma_addr_t
+
+#endif /* OS_ABL_SUPPORT */
+
+#define PCI_MAP_SINGLE					RtmpDrvPciMapSingle
+
+
+/***********************************************************************************
+ *	Others
+ ***********************************************************************************/
+#define APCLI_IF_UP_CHECK(pAd, ifidx) (RtmpOSNetDevIsUp((pAd)->ApCfg.ApCliTab[(ifidx)].dev) == TRUE)
+
+
+#endif /* __RT_LINUX_CMM_H__ */
+
+/* End of rt_linux_cmm.h */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/os/rt_linux.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/os/rt_linux.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/os/rt_linux.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/os/rt_linux.h	2017-09-23 03:42:49.794675749 +0800
@@ -0,0 +1,1484 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RT_LINUX_H__
+#define __RT_LINUX_H__
+
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/kernel.h>
+#include <linux/spinlock.h>
+#include <linux/init.h>
+#include <linux/string.h>
+#include <linux/timer.h>
+#include <linux/errno.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/pci.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/skbuff.h>
+#include <linux/ethtool.h>
+#include <linux/wireless.h>
+#include <linux/proc_fs.h>
+#include <linux/delay.h>
+#include <linux/if_arp.h>
+#include <linux/ctype.h>
+#include <linux/vmalloc.h>
+#ifdef RTMP_USB_SUPPORT
+#include <linux/usb.h>
+#endif /* RTMP_USB_SUPPORT */
+#include <linux/wireless.h>
+#include <net/iw_handler.h>
+
+#ifdef INF_PPA_SUPPORT
+#include <net/ifx_ppa_api.h>
+#include <net/ifx_ppa_hook.h>
+#endif /* INF_PPA_SUPPORT */
+
+/* load firmware */
+#define __KERNEL_SYSCALLS__
+#include <linux/unistd.h>
+#include <asm/uaccess.h>
+#include <asm/types.h>
+#include <asm/unaligned.h>	/* for get_unaligned() */
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
+#include <linux/pid.h>
+#endif
+
+#ifdef RT_CFG80211_SUPPORT
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28))
+#include <net/mac80211.h>
+#define EXT_BUILD_CHANNEL_LIST	/* must define with CRDA */
+#else /* LINUX_VERSION_CODE */
+#undef RT_CFG80211_SUPPORT
+#endif /* LINUX_VERSION_CODE */
+#endif /* RT_CFG80211_SUPPORT */
+
+
+/* must put the definition before include "os/rt_linux_cmm.h" */
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
+#define KTHREAD_SUPPORT 1
+#endif /* LINUX_VERSION_CODE */
+
+#ifdef KTHREAD_SUPPORT
+#include <linux/err.h>
+#include <linux/kthread.h>
+#endif /* KTHREAD_SUPPORT */
+
+
+#include "os/rt_linux_cmm.h"
+
+#ifdef RT_CFG80211_SUPPORT
+#include "cfg80211.h"
+#endif /* RT_CFG80211_SUPPORT */
+
+#undef AP_WSC_INCLUDED
+#undef STA_WSC_INCLUDED
+#undef WSC_INCLUDED
+
+
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+
+
+#ifdef KTHREAD_SUPPORT
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,4)
+#error "This kerne version doesn't support kthread!!"
+#endif
+#endif /* KTHREAD_SUPPORT */
+
+/*#ifdef RTMP_USB_SUPPORT // os abl move */
+typedef struct usb_device	*PUSB_DEV;
+typedef struct urb *purbb_t;
+typedef struct usb_ctrlrequest devctrlrequest;
+/*#endif */
+
+/***********************************************************************************
+ *	Profile related sections
+ ***********************************************************************************/
+
+
+#ifdef CONFIG_STA_SUPPORT
+
+#ifdef RTMP_MAC_USB
+#define STA_PROFILE_PATH			"/etc/Wireless/RT2870STA/RT2870STA.dat"
+#define STA_DRIVER_VERSION			"2.5.0.3"
+#ifdef MULTIPLE_CARD_SUPPORT
+#define CARD_INFO_PATH			"/etc/Wireless/RT2870STA/RT2870STACard.dat"
+#endif /* MULTIPLE_CARD_SUPPORT */
+#endif /* RTMP_MAC_USB */
+
+
+extern	const struct iw_handler_def rt28xx_iw_handler_def;
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef CONFIG_APSTA_MIXED_SUPPORT
+extern	const struct iw_handler_def rt28xx_ap_iw_handler_def;
+#endif /* CONFIG_APSTA_MIXED_SUPPORT */
+
+/***********************************************************************************
+ *	Compiler related definitions
+ ***********************************************************************************/
+#undef __inline
+#define __inline		static inline
+#define IN
+#define OUT
+#define INOUT
+#define NDIS_STATUS		INT
+
+
+/***********************************************************************************
+ *	OS Specific definitions and data structures
+ ***********************************************************************************/
+typedef struct net_device_stats	NET_DEV_STATS;
+typedef struct pci_dev 		* PPCI_DEV;
+typedef struct net_device	* PNET_DEV;
+typedef void				* PNDIS_PACKET;
+typedef char				NDIS_PACKET;
+typedef PNDIS_PACKET		* PPNDIS_PACKET;
+typedef	ra_dma_addr_t			NDIS_PHYSICAL_ADDRESS;
+typedef	ra_dma_addr_t			* PNDIS_PHYSICAL_ADDRESS;
+typedef void				* NDIS_HANDLE;
+typedef char 				* PNDIS_BUFFER;
+
+typedef struct ifreq		NET_IOCTL;
+typedef struct ifreq		* PNET_IOCTL;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
+typedef	struct pid *	RTMP_OS_PID;
+#else
+typedef pid_t 				RTMP_OS_PID;
+#endif
+
+typedef struct semaphore	OS_SEM;
+
+typedef int (*HARD_START_XMIT_FUNC)(struct sk_buff *skb, struct net_device *net_dev);
+
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+#define RT_MOD_INC_USE_COUNT() \
+	if (!try_module_get(THIS_MODULE)) \
+	{ \
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: cannot reserve module\n", __FUNCTION__)); \
+		return -1; \
+	}
+
+#define RT_MOD_DEC_USE_COUNT() module_put(THIS_MODULE);
+#else
+#define RT_MOD_INC_USE_COUNT()	MOD_INC_USE_COUNT;
+#define RT_MOD_DEC_USE_COUNT() MOD_DEC_USE_COUNT;
+#endif
+
+#define RTMP_INC_REF(_A)		0
+#define RTMP_DEC_REF(_A)		0
+#define RTMP_GET_REF(_A)		0
+
+
+#if WIRELESS_EXT >= 12
+/* This function will be called when query /proc */
+struct iw_statistics *rt28xx_get_wireless_stats(
+    IN struct net_device *net_dev);
+#endif
+
+
+/***********************************************************************************
+ *	Network related constant definitions
+ ***********************************************************************************/
+#ifndef IFNAMSIZ
+#define IFNAMSIZ 16
+#endif
+
+#define ETH_LENGTH_OF_ADDRESS	6
+
+#define NDIS_STATUS_SUCCESS                     0x00
+#define NDIS_STATUS_FAILURE                     0x01
+#define NDIS_STATUS_INVALID_DATA				0x02
+#define NDIS_STATUS_RESOURCES                   0x03
+
+#define NDIS_SET_PACKET_STATUS(_p, _status)			do{} while(0)
+#define NdisWriteErrorLogEntry(_a, _b, _c, _d)		do{} while(0)
+
+/* statistics counter */
+#define STATS_INC_RX_PACKETS(_pAd, _dev)
+#define STATS_INC_TX_PACKETS(_pAd, _dev)
+
+#define STATS_INC_RX_BYTESS(_pAd, _dev, len)
+#define STATS_INC_TX_BYTESS(_pAd, _dev, len)
+
+#define STATS_INC_RX_ERRORS(_pAd, _dev)
+#define STATS_INC_TX_ERRORS(_pAd, _dev)
+
+#define STATS_INC_RX_DROPPED(_pAd, _dev)
+#define STATS_INC_TX_DROPPED(_pAd, _dev)
+
+
+/***********************************************************************************
+ *	Ralink Specific network related constant definitions
+ ***********************************************************************************/
+#define MIN_NET_DEVICE_FOR_AID			0x00		/*0x00~0x3f */
+#define MIN_NET_DEVICE_FOR_MBSSID		0x00		/*0x00,0x10,0x20,0x30 */
+#define MIN_NET_DEVICE_FOR_WDS			0x10		/*0x40,0x50,0x60,0x70 */
+#define MIN_NET_DEVICE_FOR_APCLI		0x20
+#define MIN_NET_DEVICE_FOR_MESH			0x30
+#ifdef CONFIG_STA_SUPPORT
+#define MIN_NET_DEVICE_FOR_DLS			0x40
+#define MIN_NET_DEVICE_FOR_TDLS			0x50
+#endif /* CONFIG_STA_SUPPORT */
+
+#define NET_DEVICE_REAL_IDX_MASK		0x0f		/* for each operation mode, we maximum support 15 entities. */
+
+
+#ifdef CONFIG_STA_SUPPORT
+#define NDIS_PACKET_TYPE_DIRECTED		0
+#define NDIS_PACKET_TYPE_MULTICAST		1
+#define NDIS_PACKET_TYPE_BROADCAST		2
+#define NDIS_PACKET_TYPE_ALL_MULTICAST	3
+#define NDIS_PACKET_TYPE_PROMISCUOUS	4
+#endif /* CONFIG_STA_SUPPORT */
+
+
+/***********************************************************************************
+ *	OS signaling related constant definitions
+ ***********************************************************************************/
+
+
+/***********************************************************************************
+ *	OS file operation related data structure definitions
+ ***********************************************************************************/
+typedef struct file* RTMP_OS_FD;
+
+typedef struct _OS_FS_INFO_
+{
+	int				fsuid;
+	int				fsgid;
+	mm_segment_t	fs;
+} OS_FS_INFO;
+
+#define IS_FILE_OPEN_ERR(_fd) 	((_fd == NULL) || IS_ERR((_fd)))
+
+
+/***********************************************************************************
+ *	OS semaphore related data structure and definitions
+ ***********************************************************************************/
+struct os_lock  {
+	spinlock_t		lock;
+	unsigned long  	flags;
+};
+
+typedef spinlock_t			OS_NDIS_SPIN_LOCK;
+
+/* */
+/*  spin_lock enhanced for Nested spin lock */
+/* */
+#define OS_NdisAllocateSpinLock(__lock)			\
+{                                       		\
+    spin_lock_init((spinlock_t *)(__lock));		\
+}
+
+#define OS_NdisFreeSpinLock(lock)				\
+	do{}while(0)
+
+
+#define OS_SEM_LOCK(__lock)						\
+{												\
+	spin_lock_bh((spinlock_t *)(__lock));		\
+}
+
+#define OS_SEM_UNLOCK(__lock)					\
+{												\
+	spin_unlock_bh((spinlock_t *)(__lock));		\
+}
+
+
+/* sample, use semaphore lock to replace IRQ lock, 2007/11/15 */
+#ifdef MULTI_CORE_SUPPORT
+
+#define OS_IRQ_LOCK(__lock, __irqflags)			\
+{													\
+	__irqflags = 0;									\
+	spin_lock_irqsave((spinlock_t *)(__lock), __irqflags);			\
+}
+
+#define OS_IRQ_UNLOCK(__lock, __irqflag)			\
+{													\
+	spin_unlock_irqrestore((spinlock_t *)(__lock), __irqflag);			\
+}
+#else
+#define OS_IRQ_LOCK(__lock, __irqflags)			\
+{												\
+	__irqflags = 0;								\
+	spin_lock_bh((spinlock_t *)(__lock));		\
+}
+
+#define OS_IRQ_UNLOCK(__lock, __irqflag)		\
+{												\
+	spin_unlock_bh((spinlock_t *)(__lock));		\
+}
+#endif // MULTI_CORE_SUPPORT //
+#define OS_INT_LOCK(__lock, __irqflags)			\
+{												\
+	spin_lock_irqsave((spinlock_t *)__lock, __irqflags);	\
+}
+
+#define OS_INT_UNLOCK(__lock, __irqflag)		\
+{												\
+	spin_unlock_irqrestore((spinlock_t *)(__lock), ((unsigned long)__irqflag));	\
+}
+
+#define OS_NdisAcquireSpinLock		OS_SEM_LOCK
+#define OS_NdisReleaseSpinLock		OS_SEM_UNLOCK
+
+/*
+	Following lock/unlock definition used for BBP/RF register read/write.
+	Currently we don't use it to protect MAC register access.
+
+	For USB: 
+			we use binary semaphore to do the protection because all register 
+			access done in kernel thread and should allow task go sleep when
+			in protected status.
+
+	For PCI/PCI-E/RBUS:
+			We use interrupt to do the protection because the register may accessed
+			in thread/tasklet/timer/inteerupt, so we use interrupt_disable to protect
+			the access.
+*/	
+#define RTMP_MCU_RW_LOCK(_pAd, _irqflags)	\
+	do{								\
+		if (_pAd->infType == RTMP_DEV_INF_USB)	\
+		{\
+			RTMP_SEM_EVENT_WAIT(&_pAd->McuCmdSem, _irqflags);\
+		}\
+		else\
+		{\
+			RTMP_SEM_LOCK(&_pAd->McuCmdLock, _irqflags);\
+		}\
+	}while(0)
+
+#define RTMP_MCU_RW_UNLOCK(_pAd, _irqflags)	\
+	do{				\
+		if(_pAd->infType == RTMP_DEV_INF_USB)\
+		{	\
+			RTMP_SEM_EVENT_UP(&_pAd->McuCmdSem);\
+		}		\
+		else\
+		{\
+			RTMP_SEM_UNLOCK(&_pAd->McuCmdLock, _irqflags);\
+		}\
+	}while(0)
+
+	
+#ifndef wait_event_interruptible_timeout
+#define __wait_event_interruptible_timeout(wq, condition, ret) \
+do { \
+        wait_queue_t __wait; \
+        init_waitqueue_entry(&__wait, current); \
+        add_wait_queue(&wq, &__wait); \
+        for (;;) { \
+                set_current_state(TASK_INTERRUPTIBLE); \
+                if (condition) \
+                        break; \
+                if (!signal_pending(current)) { \
+                        ret = schedule_timeout(ret); \
+                        if (!ret) \
+                                break; \
+                        continue; \
+                } \
+                ret = -ERESTARTSYS; \
+                break; \
+        } \
+        current->state = TASK_RUNNING; \
+        remove_wait_queue(&wq, &__wait); \
+} while (0)
+
+#define wait_event_interruptible_timeout(wq, condition, timeout) \
+({ \
+        long __ret = timeout; \
+        if (!(condition)) \
+                __wait_event_interruptible_timeout(wq, condition, __ret); \
+        __ret; \
+})
+#endif
+
+#define OS_SEM_EVENT_INIT_LOCKED(_pSema) 	sema_init((_pSema), 0)
+#define OS_SEM_EVENT_INIT(_pSema)			sema_init((_pSema), 1)
+#define OS_SEM_EVENT_DESTORY(_pSema)		do{}while(0)
+#define OS_SEM_EVENT_WAIT(_pSema, _status)	((_status) = down_interruptible((_pSema)))
+#define OS_SEM_EVENT_UP(_pSema)				up(_pSema)
+
+#define RTCMDUp					OS_RTCMDUp
+
+#ifdef KTHREAD_SUPPORT
+#define RTMP_WAIT_EVENT_INTERRUPTIBLE(_Status, _pTask) \
+do { \
+		wait_event_interruptible(_pTask->kthread_q, \
+								 _pTask->kthread_running || kthread_should_stop()); \
+		_pTask->kthread_running = FALSE; \
+		if (kthread_should_stop()) \
+		{ \
+			(_Status) = -1; \
+			break; \
+		} \
+		else (_Status) = 0; \
+} while(0)
+#endif
+
+#ifdef KTHREAD_SUPPORT
+#define WAKE_UP(_pTask) \
+	do{ \
+		if ((_pTask)->kthread_task) \
+        { \
+			(_pTask)->kthread_running = TRUE; \
+	        wake_up(&(_pTask)->kthread_q); \
+		} \
+	}while(0)
+#endif
+
+/***********************************************************************************
+ *	OS Memory Access related data structure and definitions
+ ***********************************************************************************/
+#define MEM_ALLOC_FLAG      (GFP_ATOMIC) /*(GFP_DMA | GFP_ATOMIC) */
+
+#define NdisMoveMemory(Destination, Source, Length) memmove(Destination, Source, Length)
+#define NdisCopyMemory(Destination, Source, Length) memcpy(Destination, Source, Length)
+#define NdisZeroMemory(Destination, Length)         memset(Destination, 0, Length)
+#define NdisFillMemory(Destination, Length, Fill)   memset(Destination, Fill, Length)
+#define NdisCmpMemory(Destination, Source, Length)  memcmp(Destination, Source, Length)
+#define NdisEqualMemory(Source1, Source2, Length)   (!memcmp(Source1, Source2, Length))
+#define RTMPEqualMemory(Source1, Source2, Length)	(!memcmp(Source1, Source2, Length))
+
+#define MlmeAllocateMemory(_pAd, _ppVA)		os_alloc_mem(_pAd, _ppVA, MGMT_DMA_BUFFER_SIZE)
+#define MlmeFreeMemory(_pAd, _pVA)			os_free_mem(_pAd, _pVA)
+
+#define COPY_MAC_ADDR(Addr1, Addr2)             memcpy((Addr1), (Addr2), MAC_ADDR_LEN)
+
+
+/***********************************************************************************
+ *	OS task related data structure and definitions
+ ***********************************************************************************/
+#define RTMP_OS_MGMT_TASK_FLAGS	CLONE_VM
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
+/*typedef	struct pid *	THREAD_PID; // no use */
+#define	THREAD_PID_INIT_VALUE	NULL
+/* TODO: Use this IOCTL carefully when linux kernel version larger than 2.6.27, because the PID only correct when the user space task do this ioctl itself. */
+/*#define RTMP_GET_OS_PID(_x, _y)    _x = get_task_pid(current, PIDTYPE_PID); */
+#define RT_GET_OS_PID(_x, _y)		do{rcu_read_lock(); _x=(ULONG)current->pids[PIDTYPE_PID].pid; rcu_read_unlock();}while(0)
+#ifdef OS_ABL_FUNC_SUPPORT
+#define RTMP_GET_OS_PID(_a, _b)			RtmpOsGetPid(&_a, _b)
+#else
+#define RTMP_GET_OS_PID(_a, _b)			RT_GET_OS_PID(_a, _b)
+#endif
+#define	GET_PID_NUMBER(_v)	pid_nr((_v))
+#define CHECK_PID_LEGALITY(_pid)	if (pid_nr((_pid)) > 0)
+#define KILL_THREAD_PID(_A, _B, _C)	kill_pid((_A), (_B), (_C))
+#else
+/*typedef	pid_t	THREAD_PID; // no use */
+#define	THREAD_PID_INIT_VALUE	-1
+#define RT_GET_OS_PID(_x, _pid)		_x = _pid
+#define RTMP_GET_OS_PID(_x, _pid)		_x = _pid
+#define	GET_PID_NUMBER(_v)	(_v)
+#define CHECK_PID_LEGALITY(_pid)	if ((_pid) >= 0)
+#define KILL_THREAD_PID(_A, _B, _C)	kill_proc((_A), (_B), (_C))
+#endif
+
+#define ATE_KILL_THREAD_PID(PID)		KILL_THREAD_PID(PID, SIGTERM, 1)
+
+typedef int (*cast_fn)(void *);
+typedef INT (*RTMP_OS_TASK_CALLBACK)(ULONG);
+typedef struct tasklet_struct  OS_NET_TASK_STRUCT;
+typedef struct tasklet_struct  *POS_NET_TASK_STRUCT;
+
+
+/***********************************************************************************
+ * Timer related definitions and data structures.
+ **********************************************************************************/
+#define OS_HZ			HZ
+
+typedef struct timer_list	OS_NDIS_MINIPORT_TIMER;
+typedef struct timer_list	OS_TIMER;
+
+typedef void (*TIMER_FUNCTION)(unsigned long);
+
+
+#define OS_WAIT(_time) \
+{	\
+	if (in_interrupt()) \
+	{\
+		RTMPusecDelay(_time * 1000);\
+	}else	\
+	{\
+		int _i; \
+		long _loop = ((_time)/(1000/OS_HZ)) > 0 ? ((_time)/(1000/OS_HZ)) : 1;\
+		wait_queue_head_t _wait; \
+		init_waitqueue_head(&_wait); \
+		for (_i=0; _i<(_loop); _i++) \
+			wait_event_interruptible_timeout(_wait, 0, ONE_TICK); \
+	}\
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+#define RTMP_TIME_AFTER(a,b)		\
+	(typecheck(unsigned long, (unsigned long)a) && \
+	 typecheck(unsigned long, (unsigned long)b) && \
+	 ((long)(b) - (long)(a) < 0))
+
+#define RTMP_TIME_AFTER_EQ(a,b)	\
+	(typecheck(unsigned long, (unsigned long)a) && \
+	 typecheck(unsigned long, (unsigned long)b) && \
+	 ((long)(a) - (long)(b) >= 0))
+#define RTMP_TIME_BEFORE(a,b)	RTMP_TIME_AFTER_EQ(b,a)
+#else
+#define typecheck(type,x) \
+({      type __dummy; \
+        typeof(x) __dummy2; \
+        (void)(&__dummy == &__dummy2); \
+        1; \
+})
+#define RTMP_TIME_AFTER_EQ(a,b)	\
+	(typecheck(unsigned long, (unsigned long)a) && \
+	 typecheck(unsigned long, (unsigned long)b) && \
+	 ((long)(a) - (long)(b) >= 0))
+#define RTMP_TIME_BEFORE(a,b)	RTMP_TIME_AFTER_EQ(b,a)
+#define RTMP_TIME_AFTER(a,b) time_after(a, b)
+#endif
+
+#define ONE_TICK 1
+
+static inline void NdisGetSystemUpTime(ULONG *time)
+{
+	*time = jiffies;
+}
+
+
+/***********************************************************************************
+ *	OS specific cookie data structure binding to RTMP_ADAPTER
+ ***********************************************************************************/
+
+struct os_cookie {
+
+#ifdef RTMP_MAC_USB
+	struct usb_device		*pUsb_Dev;
+#ifdef CONFIG_STA_SUPPORT
+#ifdef CONFIG_PM
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND
+	struct usb_interface *intf;
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */
+#endif /* CONFIG_PM */
+#endif /* CONFIG_STA_SUPPORT */
+#endif /* RTMP_MAC_USB */
+
+#ifdef WORKQUEUE_BH
+	UINT32		     pAd_va;
+
+	struct work_struct   rx_done_work;
+	struct work_struct   mgmt_dma_done_work;
+	struct work_struct   ac0_dma_done_work;
+	struct work_struct   ac1_dma_done_work;
+	struct work_struct   ac2_dma_done_work;
+	struct work_struct   ac3_dma_done_work;
+	struct work_struct   hcca_dma_done_work;
+	
+	struct work_struct   tbtt_work;
+
+#else
+	RTMP_NET_TASK_STRUCT rx_done_task;
+	RTMP_NET_TASK_STRUCT mgmt_dma_done_task;
+	RTMP_NET_TASK_STRUCT ac0_dma_done_task;
+#ifdef RALINK_ATE
+	RTMP_NET_TASK_STRUCT ate_ac0_dma_done_task;
+#endif /* RALINK_ATE */
+	RTMP_NET_TASK_STRUCT ac1_dma_done_task;
+	RTMP_NET_TASK_STRUCT ac2_dma_done_task;
+	RTMP_NET_TASK_STRUCT ac3_dma_done_task;
+	RTMP_NET_TASK_STRUCT hcca_dma_done_task;
+	RTMP_NET_TASK_STRUCT tbtt_task;
+#endif /* WORKQUEUE_BH */
+
+
+
+#ifdef RTMP_MAC_USB
+	RTMP_NET_TASK_STRUCT null_frame_complete_task;
+/*	RTMP_NET_TASK_STRUCT rts_frame_complete_task; */
+	RTMP_NET_TASK_STRUCT pspoll_frame_complete_task;
+#endif /* RTMP_MAC_USB */
+
+	RTMP_OS_PID			apd_pid; /*802.1x daemon pid */
+	unsigned long			apd_pid_nr;
+	INT						ioctl_if_type;
+	INT 					ioctl_if;
+};
+
+typedef struct os_cookie	* POS_COOKIE;
+
+
+
+/***********************************************************************************
+ *	OS debugging and printing related definitions and data structure
+ ***********************************************************************************/
+#define PRINT_MAC(addr)	\
+	addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]
+
+#ifdef DBG
+extern ULONG		RTDebugLevel;
+
+#define DBGPRINT_RAW(Level, Fmt)    \
+do{                                   \
+    if (Level <= RTDebugLevel)      \
+    {                               \
+        printk Fmt;               \
+    }                               \
+}while(0)
+
+#define DBGPRINT(Level, Fmt)    DBGPRINT_RAW(Level, Fmt)
+
+
+#define DBGPRINT_ERR(Fmt)           \
+{                                   \
+    printk("ERROR!!! ");          \
+    printk Fmt;                  \
+}
+
+#define DBGPRINT_S(Status, Fmt)		\
+{									\
+	printk Fmt;					\
+}
+#else
+#define DBGPRINT(Level, Fmt)
+#define DBGPRINT_RAW(Level, Fmt)
+#define DBGPRINT_S(Status, Fmt)
+#define DBGPRINT_ERR(Fmt)
+#endif
+
+#undef  ASSERT
+#ifdef DBG
+#define ASSERT(x)                                                               \
+{                                                                               \
+    if (!(x))                                                                   \
+    {                                                                           \
+        printk(KERN_WARNING __FILE__ ":%d assert " #x "failed\n", __LINE__);    \
+    }                                                                           \
+}
+#else
+#define ASSERT(x)
+#endif /* DBG */
+
+void hex_dump(char *str, unsigned char *pSrcBufVA, unsigned int SrcBufLen);
+
+
+/*********************************************************************************************************
+	The following code are not revised, temporary put it here.
+  *********************************************************************************************************/
+
+
+/***********************************************************************************
+ * Device DMA Access related definitions and data structures.
+ **********************************************************************************/
+ra_dma_addr_t linux_pci_map_single(void *handle, void *ptr, size_t size, int sd_idx, int direction);
+void linux_pci_unmap_single(void *handle, ra_dma_addr_t dma_addr, size_t size, int direction);
+
+#define PCI_MAP_SINGLE_DEV(_handle, _ptr, _size, _sd_idx, _dir)				\
+	linux_pci_map_single(_handle, _ptr, _size, _sd_idx, _dir)
+	
+#define PCI_UNMAP_SINGLE(_pAd, _ptr, _size, _dir)						\
+	linux_pci_unmap_single(((POS_COOKIE)(_pAd->OS_Cookie))->pci_dev, _ptr, _size, _dir)
+
+#define PCI_ALLOC_CONSISTENT(_pci_dev, _size, _ptr) \
+	pci_alloc_consistent(_pci_dev, _size, _ptr)
+
+#define PCI_FREE_CONSISTENT(_pci_dev, _size, _virtual_addr, _physical_addr) \
+	pci_free_consistent(_pci_dev, _size, _virtual_addr, _physical_addr)
+
+#ifdef VENDOR_FEATURE2_SUPPORT
+#define DEV_ALLOC_SKB(_pAd, _Pkt, _length)	\
+	_Pkt = dev_alloc_skb(_length);			\
+	if (_Pkt != NULL) {MEM_DBG_PKT_ALLOC_INC(_Pkt);};
+#else
+
+#define DEV_ALLOC_SKB(_pAd, _Pkt, _length)	\
+	_Pkt = dev_alloc_skb(_length);
+#endif /* VENDOR_FEATURE2_SUPPORT */
+
+/*#define PCI_MAP_SINGLE(_handle, _ptr, _size, _dir) (ULONG)0 */
+/*#define PCI_UNMAP_SINGLE(_handle, _ptr, _size, _dir) */
+
+
+/*
+ * ULONG
+ * RTMP_GetPhysicalAddressLow(
+ *   IN NDIS_PHYSICAL_ADDRESS  PhysicalAddress);
+ */
+#define RTMP_GetPhysicalAddressLow(PhysicalAddress)		(PhysicalAddress)
+
+/*
+ * ULONG
+ * RTMP_GetPhysicalAddressHigh(
+ *   IN NDIS_PHYSICAL_ADDRESS  PhysicalAddress);
+ */
+#define RTMP_GetPhysicalAddressHigh(PhysicalAddress)		(0)
+
+/*
+ * VOID
+ * RTMP_SetPhysicalAddressLow(
+ *   IN NDIS_PHYSICAL_ADDRESS  PhysicalAddress,
+ *   IN ULONG  Value);
+ */
+#define RTMP_SetPhysicalAddressLow(PhysicalAddress, Value)	\
+			PhysicalAddress = Value;
+
+/*
+ * VOID
+ * RTMP_SetPhysicalAddressHigh(
+ *   IN NDIS_PHYSICAL_ADDRESS  PhysicalAddress,
+ *   IN ULONG  Value);
+ */
+#define RTMP_SetPhysicalAddressHigh(PhysicalAddress, Value)
+
+#define NdisMIndicateStatus(_w, _x, _y, _z)
+
+
+
+/***********************************************************************************
+ * Device Register I/O Access related definitions and data structures.
+ **********************************************************************************/
+
+#ifdef RTMP_MAC_USB
+#define RTMP_IO_FORCE_READ32(_A, _R, _pV)								\
+	RTUSBReadMACRegister((_A), (_R), (PUINT32) (_pV))
+
+#define RTMP_IO_READ32(_A, _R, _pV)								\
+	RTUSBReadMACRegister((_A), (_R), (PUINT32) (_pV))
+
+#define RTMP_IO_READ8(_A, _R, _pV)								\
+{																\
+}
+
+#define RTMP_IO_WRITE32(_A, _R, _V)								\
+	RTUSBWriteMACRegister((_A), (_R), (UINT32) (_V))
+
+
+#define RTMP_IO_WRITE8(_A, _R, _V)								\
+{																\
+	USHORT	_Val = _V;											\
+	RTUSBSingleWrite((_A), (_R), (USHORT) (_Val));								\
+}
+
+
+#define RTMP_IO_WRITE16(_A, _R, _V)								\
+{																\
+	RTUSBSingleWrite((_A), (_R), (USHORT) (_V));								\
+}
+
+#define RTMP_IO_FORCE_WRITE32
+#define RTMP_SYS_IO_READ32
+#define RTMP_SYS_IO_WRITE32
+#endif /* RTMP_MAC_USB */
+
+#define RTMP_USB_URB_DATA_GET(__pUrb)			((purbb_t)__pUrb)->context
+#define RTMP_USB_URB_STATUS_GET(__pUrb)			((purbb_t)__pUrb)->status
+#define RTMP_USB_URB_LEN_GET(__pUrb)			((purbb_t)__pUrb)->actual_length
+
+/***********************************************************************************
+ *	Network Related data structure and marco definitions
+ ***********************************************************************************/
+#define PKTSRC_NDIS             0x7f
+#define PKTSRC_DRIVER           0x0f
+
+#define RTMP_OS_NETDEV_STATE_RUNNING(_pNetDev)	((_pNetDev)->flags & IFF_UP)
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
+#define RTMP_OS_NETDEV_GET_PRIV(_pNetDev)		((_pNetDev)->ml_priv)
+#define RTMP_OS_NETDEV_SET_PRIV(_pNetDev, _pPriv)	((_pNetDev)->ml_priv = (_pPriv))
+#else
+#define RTMP_OS_NETDEV_GET_PRIV(_pNetDev)		((_pNetDev)->priv)
+#define RTMP_OS_NETDEV_SET_PRIV(_pNetDev, _pPriv)	((_pNetDev)->priv = (_pPriv))
+#endif
+#define RTMP_OS_NETDEV_GET_DEVNAME(_pNetDev)	((_pNetDev)->name)
+#define RTMP_OS_NETDEV_GET_PHYADDR(_pNetDev)	((_pNetDev)->dev_addr)
+
+/* Get & Set NETDEV interface hardware type */
+#define RTMP_OS_NETDEV_GET_TYPE(_pNetDev)			((_pNetDev)->type)
+#define RTMP_OS_NETDEV_SET_TYPE(_pNetDev, _type)	((_pNetDev)->type = (_type))
+#define RTMP_OS_NETDEV_SET_TYPE_MONITOR(_pNetDev)	RTMP_OS_NETDEV_SET_TYPE(_pNetDev, ARPHRD_IEEE80211_PRISM)
+
+#define RTMP_OS_NETDEV_START_QUEUE(_pNetDev)	netif_start_queue((_pNetDev))
+#define RTMP_OS_NETDEV_STOP_QUEUE(_pNetDev)	netif_stop_queue((_pNetDev))
+#define RTMP_OS_NETDEV_WAKE_QUEUE(_pNetDev)	netif_wake_queue((_pNetDev))
+#define RTMP_OS_NETDEV_CARRIER_OFF(_pNetDev)	netif_carrier_off((_pNetDev))
+
+#define QUEUE_ENTRY_TO_PACKET(pEntry) \
+	(PNDIS_PACKET)(pEntry)
+
+#define PACKET_TO_QUEUE_ENTRY(pPacket) \
+	(PQUEUE_ENTRY)(pPacket)
+
+#ifdef CONFIG_5VT_ENHANCE
+#define BRIDGE_TAG 0x35564252    /* depends on 5VT define in br_input.c */
+#endif
+
+#define GET_SG_LIST_FROM_PACKET(_p, _sc)	\
+    rt_get_sg_list_from_packet(_p, _sc)
+
+#define RELEASE_NDIS_PACKET(_pAd, _pPacket, _Status)                    \
+{                                                                       \
+        RTMPFreeNdisPacket(_pAd, _pPacket);                             \
+}
+
+/*
+ * packet helper
+ * 	- convert internal rt packet to os packet or
+ *             os packet to rt packet
+ */
+#define RTPKT_TO_OSPKT(_p)		((struct sk_buff *)(_p))
+#define OSPKT_TO_RTPKT(_p)		((PNDIS_PACKET)(_p))
+
+#define GET_OS_PKT_DATAPTR(_pkt) \
+		(RTPKT_TO_OSPKT(_pkt)->data)
+#define SET_OS_PKT_DATAPTR(_pkt, _dataPtr)	\
+		(RTPKT_TO_OSPKT(_pkt)->data) = (_dataPtr)
+
+#define GET_OS_PKT_LEN(_pkt) \
+		(RTPKT_TO_OSPKT(_pkt)->len)
+#define SET_OS_PKT_LEN(_pkt, _len)	\
+		(RTPKT_TO_OSPKT(_pkt)->len) = (_len)
+		
+#define GET_OS_PKT_DATATAIL(_pkt) \
+		(RTPKT_TO_OSPKT(_pkt)->tail)
+#define SET_OS_PKT_DATATAIL(_pkt, _start, _len)	\
+		((RTPKT_TO_OSPKT(_pkt))->tail) = (PUCHAR)((_start) + (_len))
+		
+#define GET_OS_PKT_HEAD(_pkt) \
+		(RTPKT_TO_OSPKT(_pkt)->head)
+
+#define GET_OS_PKT_END(_pkt) \
+		(RTPKT_TO_OSPKT(_pkt)->end)
+
+#define GET_OS_PKT_NETDEV(_pkt) \
+		(RTPKT_TO_OSPKT(_pkt)->dev)
+#define SET_OS_PKT_NETDEV(_pkt, _pNetDev)	\
+		(RTPKT_TO_OSPKT(_pkt)->dev) = (_pNetDev)
+		
+#define GET_OS_PKT_TYPE(_pkt) \
+		(RTPKT_TO_OSPKT(_pkt))
+
+#define GET_OS_PKT_NEXT(_pkt) \
+		(RTPKT_TO_OSPKT(_pkt)->next)
+
+
+#define OS_PKT_CLONED(_pkt)		skb_cloned(RTPKT_TO_OSPKT(_pkt))
+#define OS_PKT_COPY(_pkt)		skb_copy(RTPKT_TO_OSPKT(_pkt), GFP_ATOMIC)
+
+#define OS_PKT_TAIL_ADJUST(_pkt, _removedTagLen)								\
+	SET_OS_PKT_DATATAIL(_pkt, GET_OS_PKT_DATATAIL(_pkt), (-_removedTagLen));	\
+	GET_OS_PKT_LEN(_pkt) -= _removedTagLen;
+
+#define OS_PKT_HEAD_BUF_EXTEND(_pkt, _offset)								\
+	skb_push(RTPKT_TO_OSPKT(_pkt), _offset)
+
+#define OS_PKT_TAIL_BUF_EXTEND(_pkt, _Len)									\
+	skb_put(RTPKT_TO_OSPKT(_pkt), _Len)
+
+#define OS_PKT_RESERVE(_pkt, _Len)											\
+	skb_reserve(RTPKT_TO_OSPKT(_pkt), _Len)
+
+#define RTMP_OS_PKT_INIT(__pRxPacket, __pNetDev, __pData, __DataSize)		\
+{																			\
+	PNDIS_PACKET __pRxPkt;													\
+	__pRxPkt = RTPKT_TO_OSPKT(__pRxPacket);									\
+	SET_OS_PKT_NETDEV(__pRxPkt, __pNetDev);									\
+	SET_OS_PKT_DATAPTR(__pRxPkt, __pData);									\
+	SET_OS_PKT_LEN(__pRxPkt, __DataSize);									\
+	SET_OS_PKT_DATATAIL(__pRxPkt, __pData, __DataSize);						\
+}
+
+#ifdef VENDOR_FEATURE2_SUPPORT
+#define OS_PKT_CLONE(_pAd, _pkt, _src, _flag)		\
+	_src = skb_clone(RTPKT_TO_OSPKT(_pkt), _flag);	\
+	if (_src != NULL) OS_NumOfPktAlloc ++;
+#else
+
+#define OS_PKT_CLONE(_pAd, _pkt, _src, _flag)		\
+	_src = skb_clone(RTPKT_TO_OSPKT(_pkt), _flag);
+#endif /* VENDOR_FEATURE2_SUPPORT */
+
+#define get_unaligned32							get_unaligned
+#define get_unalignedlong						get_unaligned
+
+#define OS_NTOHS(_Val) \
+		(ntohs((_Val)))
+#define OS_HTONS(_Val) \
+		(htons((_Val)))
+#define OS_NTOHL(_Val) \
+		(ntohl((_Val)))
+#define OS_HTONL(_Val) \
+		(htonl((_Val)))
+
+#define CB_OFF  10
+
+#define GET_OS_PKT_CB(_p)						(RTPKT_TO_OSPKT(_p)->cb)
+
+/* User Priority */
+#define RTMP_SET_PACKET_UP(_p, _prio)			(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+0] = _prio)
+#define RTMP_GET_PACKET_UP(_p)					(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+0])
+
+/* Fragment # */
+#define RTMP_SET_PACKET_FRAGMENTS(_p, _num)		(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+1] = _num)
+#define RTMP_GET_PACKET_FRAGMENTS(_p)			(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+1])
+
+/* 0x0 ~0x7f: TX to AP's own BSS which has the specified AID. if AID>127, set bit 7 in RTMP_SET_PACKET_EMACTAB too. */
+/*(this value also as MAC(on-chip WCID) table index) */
+/* 0x80~0xff: TX to a WDS link. b0~6: WDS index */
+#define RTMP_SET_PACKET_WCID(_p, _wdsidx)		(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+2] = _wdsidx)
+#define RTMP_GET_PACKET_WCID(_p)          		((UCHAR)(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+2]))
+
+/* 0xff: PKTSRC_NDIS, others: local TX buffer index. This value affects how to a packet */
+#define RTMP_SET_PACKET_SOURCE(_p, _pktsrc)		(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+3] = _pktsrc)
+#define RTMP_GET_PACKET_SOURCE(_p)       		(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+3])
+
+/* RTS/CTS-to-self protection method */
+#define RTMP_SET_PACKET_RTS(_p, _num)      		(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+4] = _num)
+#define RTMP_GET_PACKET_RTS(_p)          		(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+4])
+/* see RTMP_S(G)ET_PACKET_EMACTAB */
+
+/* TX rate index */
+#define RTMP_SET_PACKET_TXRATE(_p, _rate)		(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+5] = _rate)
+#define RTMP_GET_PACKET_TXRATE(_p)		  		(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+5])
+
+/* From which Interface */
+#define RTMP_SET_PACKET_IF(_p, _ifdx)		(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+6] = _ifdx)
+#define RTMP_GET_PACKET_IF(_p)		  		(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+6])
+#define RTMP_SET_PACKET_NET_DEVICE_MBSSID(_p, _bss)		RTMP_SET_PACKET_IF((_p), (_bss))
+#define RTMP_SET_PACKET_NET_DEVICE_WDS(_p, _bss)		RTMP_SET_PACKET_IF((_p), ((_bss) + MIN_NET_DEVICE_FOR_WDS))
+#define RTMP_SET_PACKET_NET_DEVICE_APCLI(_p, _idx)   	RTMP_SET_PACKET_IF((_p), ((_idx) + MIN_NET_DEVICE_FOR_APCLI))
+#define RTMP_SET_PACKET_NET_DEVICE_MESH(_p, _idx)   	RTMP_SET_PACKET_IF((_p), ((_idx) + MIN_NET_DEVICE_FOR_MESH))
+#define RTMP_SET_PACKET_NET_DEVICE_P2P(_p, _idx)   		RTMP_SET_PACKET_IF((_p), ((_idx) + MIN_NET_DEVICE_FOR_P2P_GO))
+#define RTMP_GET_PACKET_NET_DEVICE_MBSSID(_p)			RTMP_GET_PACKET_IF((_p))
+#define RTMP_GET_PACKET_NET_DEVICE(_p)					RTMP_GET_PACKET_IF((_p))
+
+#define RTMP_SET_PACKET_MOREDATA(_p, _morebit)		(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+7] = _morebit)
+#define RTMP_GET_PACKET_MOREDATA(_p)				(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+7])
+
+
+
+
+
+/* */
+/*	Sepcific Pakcet Type definition */
+/* */
+#define RTMP_PACKET_SPECIFIC_CB_OFFSET	11
+
+#define RTMP_PACKET_SPECIFIC_DHCP		0x01
+#define RTMP_PACKET_SPECIFIC_EAPOL		0x02
+#define RTMP_PACKET_SPECIFIC_IPV4		0x04
+#define RTMP_PACKET_SPECIFIC_WAI		0x08
+#define RTMP_PACKET_SPECIFIC_VLAN		0x10
+#define RTMP_PACKET_SPECIFIC_LLCSNAP	0x20
+
+/*Specific */
+#define RTMP_SET_PACKET_SPECIFIC(_p, _flg)	   	(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11] = _flg)
+
+/*DHCP */
+#define RTMP_SET_PACKET_DHCP(_p, _flg)   													\
+			do{																				\
+				if (_flg)																	\
+					(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11]) |= (RTMP_PACKET_SPECIFIC_DHCP);		\
+				else																		\
+					(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11]) &= (~RTMP_PACKET_SPECIFIC_DHCP);	\
+			}while(0)
+#define RTMP_GET_PACKET_DHCP(_p)		(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11] & RTMP_PACKET_SPECIFIC_DHCP)
+
+/*EAPOL */
+#define RTMP_SET_PACKET_EAPOL(_p, _flg)   													\
+			do{																				\
+				if (_flg)																	\
+					(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11]) |= (RTMP_PACKET_SPECIFIC_EAPOL);		\
+				else																		\
+					(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11]) &= (~RTMP_PACKET_SPECIFIC_EAPOL);	\
+			}while(0)
+#define RTMP_GET_PACKET_EAPOL(_p)		(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11] & RTMP_PACKET_SPECIFIC_EAPOL)
+
+/*WAI */
+#define RTMP_SET_PACKET_WAI(_p, _flg)   													\
+			do{																				\
+				if (_flg)																	\
+					(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11]) |= (RTMP_PACKET_SPECIFIC_WAI);		\
+				else																		\
+					(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11]) &= (~RTMP_PACKET_SPECIFIC_WAI);	\
+			}while(0)
+#define RTMP_GET_PACKET_WAI(_p)		(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11] & RTMP_PACKET_SPECIFIC_WAI)
+
+#define RTMP_GET_PACKET_LOWRATE(_p)		(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11] & (RTMP_PACKET_SPECIFIC_EAPOL | RTMP_PACKET_SPECIFIC_DHCP | RTMP_PACKET_SPECIFIC_WAI))
+
+/*VLAN */
+#define RTMP_SET_PACKET_VLAN(_p, _flg)   													\
+			do{																				\
+				if (_flg)																	\
+					(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11]) |= (RTMP_PACKET_SPECIFIC_VLAN);		\
+				else																		\
+					(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11]) &= (~RTMP_PACKET_SPECIFIC_VLAN);	\
+			}while(0)
+#define RTMP_GET_PACKET_VLAN(_p)		(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11] & RTMP_PACKET_SPECIFIC_VLAN)
+
+/*LLC/SNAP */
+#define RTMP_SET_PACKET_LLCSNAP(_p, _flg)   													\
+			do{																				\
+				if (_flg)																	\
+					(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11]) |= (RTMP_PACKET_SPECIFIC_LLCSNAP);		\
+				else																		\
+					(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11]) &= (~RTMP_PACKET_SPECIFIC_LLCSNAP);		\
+			}while(0)
+			
+#define RTMP_GET_PACKET_LLCSNAP(_p)		(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11] & RTMP_PACKET_SPECIFIC_LLCSNAP)
+
+/* IP */
+#define RTMP_SET_PACKET_IPV4(_p, _flg)														\
+			do{																				\
+				if (_flg)																	\
+					(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11]) |= (RTMP_PACKET_SPECIFIC_IPV4);		\
+				else																		\
+					(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11]) &= (~RTMP_PACKET_SPECIFIC_IPV4);	\
+			}while(0)
+			
+#define RTMP_GET_PACKET_IPV4(_p)		(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11] & RTMP_PACKET_SPECIFIC_IPV4)
+
+
+/* If this flag is set, it indicates that this EAPoL frame MUST be clear. */
+#define RTMP_SET_PACKET_CLEAR_EAP_FRAME(_p, _flg)   (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+12] = _flg)
+#define RTMP_GET_PACKET_CLEAR_EAP_FRAME(_p)         (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+12])
+
+
+#define MAX_PACKETS_IN_QUEUE				(512)
+
+
+
+#define RTMP_SET_PACKET_5VT(_p, _flg)   (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+22] = _flg)
+#define RTMP_GET_PACKET_5VT(_p)         (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+22])
+
+#define RTMP_SET_PACKET_PROTOCOL(_p, _protocol) {\
+	(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+23] = (UINT8)((_protocol) & 0x00ff)); \
+	(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+24] = (UINT8)(((_protocol) & 0xff00) >> 8)); \
+}
+
+#define RTMP_GET_PACKET_PROTOCOL(_p) \
+	((((UINT16)(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+24]) & 0x00ff) << 8) \
+	| ((UINT16)(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+23]) & 0x00ff))
+
+#ifdef INF_AMAZON_SE
+/* [CB_OFF+28], 1B, Iverson patch for WMM A5-T07 ,WirelessStaToWirelessSta do not bulk out aggregate */
+#define RTMP_SET_PACKET_NOBULKOUT(_p, _morebit)			(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+28] = _morebit)
+#define RTMP_GET_PACKET_NOBULKOUT(_p)					(RTPKT_TO_OSPKT(_p)->cb[CB_OFF+28])			
+#endif /* INF_AMAZON_SE */
+/* Max skb->cb = 48B = [CB_OFF+38] */
+
+
+
+
+
+
+/***********************************************************************************
+ *	Other function prototypes definitions
+ ***********************************************************************************/
+void RTMP_GetCurrentSystemTime(LARGE_INTEGER *time);
+int rt28xx_packet_xmit(VOID *skb);
+
+
+#if LINUX_VERSION_CODE <= 0x20402	/* Red Hat 7.1 */
+struct net_device *alloc_netdev(int sizeof_priv, const char *mask, void (*setup)(struct net_device *));
+#endif /* LINUX_VERSION_CODE */
+
+
+
+INT rt28xx_ioctl(
+	IN	PNET_DEV		net_dev,
+	IN	OUT	struct ifreq	*rq, 
+	IN	INT			cmd);
+
+extern int ra_mtd_write(int num, loff_t to, size_t len, const u_char *buf);
+extern int ra_mtd_read(int num, loff_t from, size_t len, u_char *buf);
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
+#define GET_PAD_FROM_NET_DEV(_pAd, _net_dev)	(_pAd) = (_net_dev)->ml_priv;
+#else
+#define GET_PAD_FROM_NET_DEV(_pAd, _net_dev)	(_pAd) = (_net_dev)->priv;
+#endif
+
+/*#ifdef RTMP_USB_SUPPORT */
+/******************************************************************************
+
+  	USB related definitions
+
+******************************************************************************/
+
+#define RTMP_USB_PKT_COPY(__pNetDev, __pNetPkt, __Len, __pData)			\
+{																		\
+	memcpy(skb_put(__pNetPkt, __Len), __pData, __Len);					\
+	GET_OS_PKT_NETDEV(__pNetPkt) = __pNetDev;							\
+	RTMP_SET_PACKET_SOURCE(OSPKT_TO_RTPKT(__pNetPkt), PKTSRC_NDIS);		\
+}
+
+typedef struct usb_device_id USB_DEVICE_ID;
+
+#ifdef INF_AMAZON_SE
+#define BULKAGGRE_SIZE				30
+#else
+#define BULKAGGRE_SIZE				60 /* 100 */
+#endif /* INF_AMAZON_SE */
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+
+#ifndef OS_ABL_SUPPORT
+/*#define RT28XX_PUT_DEVICE			usb_put_dev */
+#define RTUSB_ALLOC_URB(iso)		usb_alloc_urb(iso, GFP_ATOMIC)
+#define RTUSB_SUBMIT_URB(pUrb)		usb_submit_urb(pUrb, GFP_ATOMIC)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 5, 0)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)
+#define RTUSB_URB_ALLOC_BUFFER(_dev, _size, _dma)	usb_alloc_coherent(_dev, _size, GFP_ATOMIC, _dma)
+#define RTUSB_URB_FREE_BUFFER(_dev, _size, _addr, _dma)	usb_free_coherent(_dev, _size, _addr, _dma)
+#else
+#define RTUSB_URB_ALLOC_BUFFER(_dev, _size, _dma)	usb_buffer_alloc(_dev, _size, GFP_ATOMIC, _dma)
+#define RTUSB_URB_FREE_BUFFER(_dev, _size, _addr, _dma)	usb_buffer_free(_dev, _size, _addr, _dma)
+#endif
+#else
+#define RTUSB_URB_ALLOC_BUFFER(_dev, _size, _dma)	kmalloc(_size, GFP_ATOMIC)
+#define RTUSB_URB_FREE_BUFFER(_dev, _size, _addr, _dma)	kfree(_addr) 
+#endif
+
+#else
+
+/*#define RT28XX_PUT_DEVICE			rausb_put_dev */
+#define RTUSB_ALLOC_URB(iso)		rausb_alloc_urb(iso)
+#define RTUSB_SUBMIT_URB(pUrb)		rausb_submit_urb(pUrb)
+#define RTUSB_URB_ALLOC_BUFFER		rausb_buffer_alloc
+#define RTUSB_URB_FREE_BUFFER		rausb_buffer_free
+#endif /* OS_ABL_SUPPORT */
+
+#else
+
+#define RT28XX_PUT_DEVICE(dev_p)
+
+#ifndef OS_ABL_SUPPORT
+#define RTUSB_ALLOC_URB(iso)                                               	usb_alloc_urb(iso)
+#define RTUSB_SUBMIT_URB(pUrb)                                             	usb_submit_urb(pUrb)
+#else
+#define RTUSB_ALLOC_URB(iso)                                               	rausb_alloc_urb(iso)
+#define RTUSB_SUBMIT_URB(pUrb)                                             	rausb_submit_urb(pUrb)
+#endif /* OS_ABL_SUPPORT */
+
+#define RTUSB_URB_ALLOC_BUFFER(pUsb_Dev, BufSize, pDma_addr)         		kmalloc(BufSize, GFP_ATOMIC)
+#define RTUSB_URB_FREE_BUFFER(pUsb_Dev, BufSize, pTransferBuf, Dma_addr)  	kfree(pTransferBuf)
+#endif
+
+#ifndef OS_ABL_SUPPORT
+#define RTUSB_FREE_URB(pUrb)	usb_free_urb(pUrb)
+#else
+#define RTUSB_FREE_URB(pUrb)	rausb_free_urb(pUrb)
+#endif /* OS_ABL_SUPPORT */
+
+/* unlink urb */
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,7)
+
+#ifndef OS_ABL_SUPPORT
+#define RTUSB_UNLINK_URB(pUrb)		usb_kill_urb(pUrb)
+#else
+#define RTUSB_UNLINK_URB(pUrb)		rausb_kill_urb(pUrb)
+#endif /* OS_ABL_SUPPORT */
+
+#else
+#define RTUSB_UNLINK_URB(pUrb)		usb_unlink_urb(pUrb)
+#endif /* LINUX_VERSION_CODE */
+
+/* Prototypes of completion funuc. */
+#define RtmpUsbBulkOutDataPacketComplete		RTUSBBulkOutDataPacketComplete
+#define RtmpUsbBulkOutMLMEPacketComplete		RTUSBBulkOutMLMEPacketComplete
+#define RtmpUsbBulkOutNullFrameComplete			RTUSBBulkOutNullFrameComplete
+#define RtmpUsbBulkOutRTSFrameComplete			RTUSBBulkOutRTSFrameComplete
+#define RtmpUsbBulkOutPsPollComplete			RTUSBBulkOutPsPollComplete
+#define RtmpUsbBulkRxComplete					RTUSBBulkRxComplete
+
+#if ((LINUX_VERSION_CODE < KERNEL_VERSION(2, 5, 51)) || (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 18))) 
+#define RTUSBBulkOutDataPacketComplete(Status, pURB, pt_regs)    RTUSBBulkOutDataPacketComplete(pURB)
+#define RTUSBBulkOutMLMEPacketComplete(Status, pURB, pt_regs)    RTUSBBulkOutMLMEPacketComplete(pURB)
+#define RTUSBBulkOutNullFrameComplete(Status, pURB, pt_regs)     RTUSBBulkOutNullFrameComplete(pURB)
+#define RTUSBBulkOutRTSFrameComplete(Status, pURB, pt_regs)      RTUSBBulkOutRTSFrameComplete(pURB)
+#define RTUSBBulkOutPsPollComplete(Status, pURB, pt_regs)        RTUSBBulkOutPsPollComplete(pURB)
+#define RTUSBBulkRxComplete(Status, pURB, pt_regs)               RTUSBBulkRxComplete(pURB)
+#else
+#define RTUSBBulkOutDataPacketComplete(Status, pURB, pt_regs)    RTUSBBulkOutDataPacketComplete(pURB, pt_regs)
+#define RTUSBBulkOutMLMEPacketComplete(Status, pURB, pt_regs)    RTUSBBulkOutMLMEPacketComplete(pURB, pt_regs)
+#define RTUSBBulkOutNullFrameComplete(Status, pURB, pt_regs)     RTUSBBulkOutNullFrameComplete(pURB, pt_regs)
+#define RTUSBBulkOutRTSFrameComplete(Status, pURB, pt_regs)      RTUSBBulkOutRTSFrameComplete(pURB, pt_regs)
+#define RTUSBBulkOutPsPollComplete(Status, pURB, pt_regs)        RTUSBBulkOutPsPollComplete(pURB, pt_regs)
+#define RTUSBBulkRxComplete(Status, pURB, pt_regs)               RTUSBBulkRxComplete(pURB, pt_regs)
+#endif /* */
+
+/*extern void dump_urb(struct urb *purb); */
+
+#define InterlockedIncrement 	 	atomic_inc
+#define NdisInterlockedIncrement 	atomic_inc
+#define InterlockedDecrement		atomic_dec
+#define NdisInterlockedDecrement 	atomic_dec
+#define InterlockedExchange			atomic_set
+
+typedef void USBHST_STATUS;
+typedef INT32 URBCompleteStatus;
+typedef struct pt_regs pregs;
+
+USBHST_STATUS RTUSBBulkOutDataPacketComplete(URBCompleteStatus Status, purbb_t pURB, pregs *pt_regs);
+USBHST_STATUS RTUSBBulkOutMLMEPacketComplete(URBCompleteStatus Status, purbb_t pURB, pregs *pt_regs);
+USBHST_STATUS RTUSBBulkOutNullFrameComplete(URBCompleteStatus Status, purbb_t pURB, pregs *pt_regs);
+USBHST_STATUS RTUSBBulkOutRTSFrameComplete(URBCompleteStatus Status, purbb_t pURB, pregs *pt_regs);
+USBHST_STATUS RTUSBBulkOutPsPollComplete(URBCompleteStatus Status, purbb_t pURB, pregs *pt_regs);
+USBHST_STATUS RTUSBBulkRxComplete(URBCompleteStatus Status, purbb_t pURB, pregs *pt_regs);
+
+/* Fill Bulk URB Macro */
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+#define RTUSB_FILL_TX_BULK_URB(pUrb,	\
+			       pUsb_Dev,	\
+			       uEndpointAddress,		\
+			       pTransferBuf,			\
+			       BufSize,				\
+			       Complete,	\
+			       pContext,		\
+					TransferDma)	\
+  			   do{	\
+			       		usb_fill_bulk_urb(pUrb, pUsb_Dev, usb_sndbulkpipe(pUsb_Dev, uEndpointAddress),	\
+								pTransferBuf, BufSize, Complete, pContext);	\
+						pUrb->transfer_dma	= TransferDma;	\
+			       		pUrb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;	\
+				}while(0)
+#else
+#define RTUSB_FILL_TX_BULK_URB(pUrb,	\
+			       pUsb_Dev,	\
+			       uEndpointAddress,		\
+			       pTransferBuf,			\
+			       BufSize,				\
+			       Complete,	\
+			       pContext,	\
+					TransferDma)	\
+  			       do{	\
+  			       		FILL_BULK_URB(pUrb, pUsb_Dev, usb_sndbulkpipe(pUsb_Dev, uEndpointAddress),	\
+							pTransferBuf, BufSize, Complete, pContext);	\
+			       }while(0)
+
+#endif
+
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+#define RTUSB_FILL_HTTX_BULK_URB(pUrb,	\
+				pUsb_Dev,	\
+				uEndpointAddress,		\
+				pTransferBuf,			\
+				BufSize,				\
+				Complete,	\
+				pContext,				\
+				TransferDma)				\
+  				do{	\
+					usb_fill_bulk_urb(pUrb, pUsb_Dev, usb_sndbulkpipe(pUsb_Dev, uEndpointAddress),	\
+								pTransferBuf, BufSize, Complete, pContext);	\
+					pUrb->transfer_dma	= TransferDma; \
+					pUrb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;	\
+				}while(0)
+#else
+#define RTUSB_FILL_HTTX_BULK_URB(pUrb,	\
+				pUsb_Dev,				\
+				uEndpointAddress,		\
+				pTransferBuf,			\
+				BufSize,				\
+				Complete,				\
+			       pContext,	\
+					TransferDma)	\
+  				do{	\
+					FILL_BULK_URB(pUrb, pUsb_Dev, usb_sndbulkpipe(pUsb_Dev, uEndpointAddress),	\
+								pTransferBuf, BufSize, Complete, pContext);	\
+				}while(0)
+#endif	
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+#define RTUSB_FILL_RX_BULK_URB(pUrb,	\
+				pUsb_Dev,				\
+				uEndpointAddress,		\
+				pTransferBuf,			\
+				BufSize,				\
+				Complete,				\
+				pContext,				\
+				TransferDma)			\
+  				do{	\
+					usb_fill_bulk_urb(pUrb, pUsb_Dev, usb_rcvbulkpipe(pUsb_Dev, uEndpointAddress),	\
+								pTransferBuf, BufSize, Complete, pContext);	\
+					pUrb->transfer_dma	= TransferDma;	\
+					pUrb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;	\
+				}while(0)
+/* pRxContext->data_dma + pAd->NextRxBulkInPosition; */
+#else
+#define RTUSB_FILL_RX_BULK_URB(pUrb,	\
+				pUsb_Dev,	\
+				uEndpointAddress,		\
+				pTransferBuf,			\
+				BufSize,				\
+				Complete,	\
+			       pContext,	\
+					TransferDma)	\
+  				do{	\
+					FILL_BULK_URB(pUrb, pUsb_Dev, usb_rcvbulkpipe(pUsb_Dev, uEndpointAddress),	\
+								pTransferBuf, BufSize, Complete, pContext);	\
+				}while(0)
+#endif
+	
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+#define RTUSB_URB_DMA_MAPPING(pUrb)	\
+	{	\
+		pUrb->transfer_dma	= 0;	\
+		pUrb->transfer_flags &= (~URB_NO_TRANSFER_DMA_MAP);	\
+	}
+#else
+#define	RTUSB_URB_DMA_MAPPING(pUrb)
+#endif
+
+#define RTUSB_CONTROL_MSG(pUsb_Dev, uEndpointAddress, Request, RequestType, Value,Index, tmpBuf, TransferBufferLength, timeout, ret)	\
+  		do{	\
+			if (RequestType == DEVICE_VENDOR_REQUEST_OUT)	\
+				ret = USB_CONTROL_MSG(pUsb_Dev, usb_sndctrlpipe(pUsb_Dev, uEndpointAddress), Request, RequestType, Value, Index, tmpBuf, TransferBufferLength, timeout);	\
+			else if (RequestType == DEVICE_VENDOR_REQUEST_IN)	\
+				ret = USB_CONTROL_MSG(pUsb_Dev, usb_rcvctrlpipe(pUsb_Dev, uEndpointAddress), Request, RequestType, Value, Index, tmpBuf, TransferBufferLength, timeout);	\
+			else	\
+			{	\
+				DBGPRINT(RT_DEBUG_ERROR, ("vendor request direction is failed\n"));	\
+				ret = -1;	\
+			}	\
+		}while(0)
+		
+#define rtusb_urb_context  context
+#define rtusb_urb_status   status
+
+#define RTMP_OS_USB_CONTEXT_GET(__pURB)		__pURB->rtusb_urb_context
+#define RTMP_OS_USB_STATUS_GET(__pURB)		__pURB->rtusb_urb_status
+
+#ifndef OS_ABL_SUPPORT
+#define USB_CONTROL_MSG		usb_control_msg
+
+#else
+
+#define USB_CONTROL_MSG		rausb_control_msg
+
+/*extern int rausb_register(struct usb_driver * new_driver); */
+/*extern void rausb_deregister(struct usb_driver * driver); */
+
+extern struct urb *rausb_alloc_urb(int iso_packets);
+extern void rausb_free_urb(VOID *urb);
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+extern void rausb_put_dev(VOID *dev);
+extern struct usb_device *rausb_get_dev(VOID *dev);
+#endif /* LINUX_VERSION_CODE */
+
+extern int rausb_submit_urb(VOID *urb);
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+#ifndef gfp_t
+#define gfp_t		INT32
+#endif /* gfp_t */
+
+extern void *rausb_buffer_alloc(VOID *dev,
+								size_t size,
+								ra_dma_addr_t *dma);
+extern void rausb_buffer_free(VOID *dev,
+								size_t size,
+								void *addr,
+								ra_dma_addr_t dma);
+#endif /* LINUX_VERSION_CODE */
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,7)
+extern void rausb_kill_urb(VOID *urb);
+#endif /* LINUX_VERSION_CODE */
+
+extern int rausb_control_msg(VOID *dev,
+							unsigned int pipe,
+							__u8 request,
+							__u8 requesttype,
+							__u16 value,
+							__u16 index,
+							void *data,
+							__u16 size,
+							int timeout);
+
+#endif /* OS_ABL_SUPPORT */
+
+/*#endif // RTMP_USB_SUPPORT */
+
+#ifdef RESOURCE_BOOT_ALLOC
+extern int rtusb_tx_buf_len;
+extern int rtusb_rx_buf_len;
+extern int rtusb_tx_buf_cnt;
+extern int rtusb_rx_buf_cnt;
+
+extern int rtusb_resource_exit(void);
+extern int rtusb_resource_init(int txlen, int rxlen, int tx_cnt, int rx_cnt);
+#endif /* RESOURCE_BOOT_ALLOC */
+
+#ifdef RALINK_ATE
+/******************************************************************************
+
+  	ATE related definitions
+
+******************************************************************************/
+#define ate_print printk
+#define ATEDBGPRINT DBGPRINT
+
+#ifdef RTMP_MAC_USB
+#ifdef CONFIG_STA_SUPPORT
+#undef EEPROM_BIN_FILE_NAME /* Avoid APSTA mode re-define issue */
+#define EEPROM_BIN_FILE_NAME  "/etc/Wireless/RT2870STA/e2p.bin"
+#endif /* CONFIG_STA_SUPPORT */
+#endif /* RTMP_MAC_USB */
+
+#ifdef RTMP_USB_SUPPORT
+
+#if ((LINUX_VERSION_CODE < KERNEL_VERSION(2, 5, 51)) || (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 18)))
+/* Prototypes of completion funuc. */
+#define ATE_RTUSBBulkOutDataPacketComplete(Status, pURB, pt_regs)    ATE_RTUSBBulkOutDataPacketComplete(pURB)
+#else
+#define ATE_RTUSBBulkOutDataPacketComplete(Status, pURB, pt_regs)    ATE_RTUSBBulkOutDataPacketComplete(pURB, pt_regs)	
+#endif /* LINUX_VERSION_CODE */
+
+USBHST_STATUS ATE_RTUSBBulkOutDataPacketComplete(URBCompleteStatus Status, purbb_t pURB, pregs *pt_regs);
+		
+#endif /* RTMP_USB_SUPPORT */
+
+#endif /* RALINK_ATE */
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,31)
+INT RtmpOSNetDevOpsAlloc(
+	IN PVOID *pNetDevOps);
+#endif
+
+#define RTMP_OS_MAX_SCAN_DATA_GET()		IW_SCAN_MAX_DATA
+
+#include "os/rt_os.h"
+
+#endif /* __RT_LINUX_H__ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/os/rt_os.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/os/rt_os.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/os/rt_os.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/os/rt_os.h	2017-09-23 03:42:49.798675736 +0800
@@ -0,0 +1,76 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef _RT_OS_H_
+#define _RT_OS_H_
+
+
+#ifdef LINUX
+#if WIRELESS_EXT <= 11
+#ifndef SIOCDEVPRIVATE
+#define SIOCDEVPRIVATE                              0x8BE0
+#endif
+#define SIOCIWFIRSTPRIV								SIOCDEVPRIVATE
+#endif
+#endif /* LINUX */
+
+
+#ifdef CONFIG_STA_SUPPORT
+#define RT_PRIV_IOCTL							(SIOCIWFIRSTPRIV + 0x01) /* Sync. with AP for wsc upnp daemon */
+#define RTPRIV_IOCTL_SET							(SIOCIWFIRSTPRIV + 0x02)
+
+#ifdef DBG
+#define RTPRIV_IOCTL_BBP                            (SIOCIWFIRSTPRIV + 0x03)
+#define RTPRIV_IOCTL_MAC                            (SIOCIWFIRSTPRIV + 0x05)
+
+#ifdef RTMP_RF_RW_SUPPORT
+#define RTPRIV_IOCTL_RF                             (SIOCIWFIRSTPRIV + 0x13)  /* edit by johnli, fix read rf register problem */
+#endif /* RTMP_RF_RW_SUPPORT */
+#define RTPRIV_IOCTL_E2P                            (SIOCIWFIRSTPRIV + 0x07)
+#endif /* DBG */
+
+#ifdef RALINK_ATE
+#ifdef RALINK_QA
+#define RTPRIV_IOCTL_ATE							(SIOCIWFIRSTPRIV + 0x08)
+#endif /* RALINK_QA */
+#endif /* RALINK_ATE */
+
+#define RTPRIV_IOCTL_STATISTICS                     (SIOCIWFIRSTPRIV + 0x09)
+#define RTPRIV_IOCTL_ADD_PMKID_CACHE                (SIOCIWFIRSTPRIV + 0x0A)
+#define RTPRIV_IOCTL_RADIUS_DATA                    (SIOCIWFIRSTPRIV + 0x0C)
+#define RTPRIV_IOCTL_GSITESURVEY					(SIOCIWFIRSTPRIV + 0x0D)
+#define RT_PRIV_IOCTL_EXT							(SIOCIWFIRSTPRIV + 0x0E) /* Sync. with RT61 (for wpa_supplicant) */
+#define RTPRIV_IOCTL_GET_MAC_TABLE					(SIOCIWFIRSTPRIV + 0x0F)
+#define RTPRIV_IOCTL_GET_MAC_TABLE_STRUCT					(SIOCIWFIRSTPRIV + 0x1F)	/* modified by Red@Ralink, 2009/09/30 */
+
+#define RTPRIV_IOCTL_SHOW							(SIOCIWFIRSTPRIV + 0x11)
+
+
+#endif /* CONFIG_STA_SUPPORT */
+
+
+#endif /* _RT_OS_H_ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rt_ate.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rt_ate.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rt_ate.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rt_ate.h	2017-09-23 03:42:49.798675736 +0800
@@ -0,0 +1,415 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RT_ATE_H__
+#define __RT_ATE_H__
+
+#ifdef RALINK_QA
+typedef struct ate_racfghdr {
+ 	UINT32		magic_no;
+	USHORT		command_type;
+	USHORT		command_id;
+	USHORT		length;
+	USHORT		sequence;
+	USHORT		status;
+	UCHAR		data[2046];
+}  __attribute__((packed))RACFGHDR, *pRACFGHDR;
+
+/* Eth QA RACFG Command */
+#define RACFG_MAGIC_NO			0x18142880
+/* command id with Cmd Type == 0x0005(for iNIC)/0x0008(for others) */
+#define RACFG_CMD_RF_WRITE_ALL			0x0000
+#define RACFG_CMD_E2PROM_READ16			0x0001
+#define RACFG_CMD_E2PROM_WRITE16		0x0002
+#define RACFG_CMD_E2PROM_READ_ALL		0x0003
+#define RACFG_CMD_E2PROM_WRITE_ALL		0x0004
+#define RACFG_CMD_IO_READ				0x0005
+#define RACFG_CMD_IO_WRITE				0x0006
+#define RACFG_CMD_IO_READ_BULK			0x0007
+#define RACFG_CMD_BBP_READ8				0x0008
+#define RACFG_CMD_BBP_WRITE8			0x0009
+#define RACFG_CMD_BBP_READ_ALL			0x000a
+#define RACFG_CMD_GET_COUNTER			0x000b
+#define RACFG_CMD_CLEAR_COUNTER			0x000c
+
+#define RACFG_CMD_RSV1					0x000d
+#define RACFG_CMD_RSV2					0x000e
+#define RACFG_CMD_RSV3					0x000f
+
+#define RACFG_CMD_TX_START				0x0010
+#define RACFG_CMD_GET_TX_STATUS			0x0011
+#define RACFG_CMD_TX_STOP				0x0012
+#define RACFG_CMD_RX_START				0x0013
+#define RACFG_CMD_RX_STOP				0x0014
+#define RACFG_CMD_GET_NOISE_LEVEL		0x0015
+
+#define RACFG_CMD_ATE_START				0x0080
+#define RACFG_CMD_ATE_STOP				0x0081
+
+#define RACFG_CMD_ATE_START_TX_CARRIER		0x0100
+#define RACFG_CMD_ATE_START_TX_CONT			0x0101
+#define RACFG_CMD_ATE_START_TX_FRAME		0x0102
+#define RACFG_CMD_ATE_SET_BW	            0x0103
+#define RACFG_CMD_ATE_SET_TX_POWER0	        0x0104
+#define RACFG_CMD_ATE_SET_TX_POWER1			0x0105
+#define RACFG_CMD_ATE_SET_FREQ_OFFSET		0x0106
+#define RACFG_CMD_ATE_GET_STATISTICS		0x0107
+#define RACFG_CMD_ATE_RESET_COUNTER			0x0108
+#define RACFG_CMD_ATE_SEL_TX_ANTENNA		0x0109
+#define RACFG_CMD_ATE_SEL_RX_ANTENNA		0x010a
+#define RACFG_CMD_ATE_SET_PREAMBLE			0x010b
+#define RACFG_CMD_ATE_SET_CHANNEL			0x010c
+#define RACFG_CMD_ATE_SET_ADDR1				0x010d
+#define RACFG_CMD_ATE_SET_ADDR2				0x010e
+#define RACFG_CMD_ATE_SET_ADDR3				0x010f
+#define RACFG_CMD_ATE_SET_RATE				0x0110
+#define RACFG_CMD_ATE_SET_TX_FRAME_LEN		0x0111
+#define RACFG_CMD_ATE_SET_TX_FRAME_COUNT	0x0112
+#define RACFG_CMD_ATE_START_RX_FRAME		0x0113
+#define RACFG_CMD_ATE_E2PROM_READ_BULK		0x0114
+#define RACFG_CMD_ATE_E2PROM_WRITE_BULK		0x0115
+#define RACFG_CMD_ATE_IO_WRITE_BULK			0x0116
+#define RACFG_CMD_ATE_BBP_READ_BULK			0x0117
+#define RACFG_CMD_ATE_BBP_WRITE_BULK		0x0118
+#define RACFG_CMD_ATE_RF_READ_BULK			0x0119
+#define RACFG_CMD_ATE_RF_WRITE_BULK			0x011a
+#define RACFG_CMD_ATE_SET_TX_POWER2			0x011b
+#if defined (RT3883) || defined (RT3352) || defined (RT5350)
+#define RACFG_CMD_ATE_RUN_CPUBUSY	0x0202
+#endif /* defined (RT3883) || defined (RT3352) || defined (RT5350) */
+
+/* QA RACFG Command for ate test from localhost */
+#define RACFG_CMD_ATE_SHOW_PARAM 0xff00
+
+/* ATE export paramters to uppler layer */
+typedef struct __ATE_EX_PARAM
+{
+	unsigned char mode;
+	char TxPower0;
+	char TxPower1;
+#ifdef DOT11N_SS3_SUPPORT
+	char TxPower2;
+#endif /* DOT11N_SS3_SUPPORT */
+	char TxAntennaSel;
+	char RxAntennaSel;
+	unsigned char DA[MAC_ADDR_LEN];
+	unsigned char SA[MAC_ADDR_LEN];
+	unsigned char BSSID[MAC_ADDR_LEN];
+	unsigned char MCS;
+	unsigned char PhyMode;
+	BOOLEAN ShortGI;
+	BOOLEAN BW;
+	unsigned int Channel;
+	unsigned int TxLength;
+	unsigned int TxCount;
+	unsigned int RFFreqOffset;
+	unsigned int IPG;
+	unsigned int RxTotalCnt;
+	unsigned int RxCntPerSec;
+	char LastSNR0;
+	char LastSNR1;
+	char LastSNR2;
+	char LastRssi0;
+	char LastRssi1;
+	char LastRssi2;
+	char AvgRssi0;
+	char AvgRssi1;
+	char AvgRssi2;
+	short AvgRssi0X8;
+	short AvgRssi1X8;
+	short AvgRssi2X8;
+}ATE_EX_PARAM, *pATE_EX_PARAM;
+
+#endif /* RALINK_QA */
+
+#define	LEN_OF_ARG 16
+#define ATE_ON(_p)              (((_p)->ate.Mode) != ATE_STOP)
+
+
+#ifdef RTMP_MAC_USB
+#define ATE_BBP_IO_READ8_BY_REG_ID(_A, _I, _pV)    RTMP_BBP_IO_READ8_BY_REG_ID(_A, _I, _pV)
+#define ATE_BBP_IO_WRITE8_BY_REG_ID(_A, _I, _V)    RTMP_BBP_IO_WRITE8_BY_REG_ID(_A, _I, _V)
+
+#define BULK_OUT_LOCK(pLock, IrqFlags)	\
+		if(1 /*!(in_interrupt() & 0xffff0000)*/)	\
+			RTMP_IRQ_LOCK((pLock), IrqFlags);
+		
+#define BULK_OUT_UNLOCK(pLock, IrqFlags)	\
+		if(1 /*!(in_interrupt() & 0xffff0000)*/)	\
+			RTMP_IRQ_UNLOCK((pLock), IrqFlags);
+
+VOID ATE_RTUSBBulkOutDataPacket(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			BulkOutPipeId);
+
+VOID ATE_RTUSBCancelPendingBulkInIRP(
+	IN	PRTMP_ADAPTER	pAd);
+
+
+VOID ATEResetBulkIn(
+	IN PRTMP_ADAPTER	pAd);
+
+INT ATEResetBulkOut(
+	IN PRTMP_ADAPTER	pAd);
+#endif /* RTMP_MAC_USB */
+
+#ifdef RALINK_QA
+VOID ATE_QA_Statistics(
+	IN PRTMP_ADAPTER		pAd,
+	IN PRXWI_STRUC			pRxWI,
+	IN PRT28XX_RXD_STRUC    p28xxRxD,
+	IN PHEADER_802_11		pHeader);
+	
+INT RtmpDoAte(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN	PSTRING	wrq_name);
+
+INT Set_TxStop_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT Set_RxStop_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+#ifdef DBG
+INT Set_EERead_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT Set_EEWrite_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT Set_BBPRead_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT Set_BBPWrite_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT Set_RFWrite_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+#endif /* DBG */ 
+#endif /* RALINK_QA */
+
+
+#ifdef RTMP_RF_RW_SUPPORT
+#define ATE_RF_IO_READ8_BY_REG_ID(_A, _I, _pV)     RT30xxReadRFRegister(_A, _I, _pV)
+#define ATE_RF_IO_WRITE8_BY_REG_ID(_A, _I, _V)     RT30xxWriteRFRegister(_A, _I, _V)
+#endif /* RTMP_RF_RW_SUPPORT */
+
+INT Set_ATE_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_ATE_DA_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_ATE_SA_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_ATE_BSSID_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_ATE_CHANNEL_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+#ifdef RTMP_INTERNAL_TX_ALC
+INT Set_ATE_TSSI_CALIBRATION_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg);
+
+INT Set_ATE_TSSI_CALIBRATION_EX_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg);
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+#ifdef RTMP_TEMPERATURE_COMPENSATION
+INT Set_ATE_READ_EXTERNAL_TSSI_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg);
+#endif /* RTMP_TEMPERATURE_COMPENSATION */
+
+#ifdef HW_ANTENNA_DIVERSITY_SUPPORT
+INT Set_ATE_DIV_ANTENNA_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg);
+
+INT Set_ATE_DIV_ANTENNA_CALIBRATION_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg);
+#endif /* HW_ANTENNA_DIVERSITY_SUPPORT */
+
+INT	Set_ATE_TX_POWER0_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_ATE_TX_POWER1_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg);
+
+#ifdef DOT11N_SS3_SUPPORT
+INT	Set_ATE_TX_POWER2_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg);
+#endif /* DOT11N_SS3_SUPPORT */
+
+INT	Set_ATE_TX_Antenna_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg);
+
+INT	Set_ATE_RX_Antenna_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg);
+
+#ifdef RT3350
+INT	Set_ATE_PA_Bias_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+#endif /* RT3350 */
+
+INT	Set_ATE_TX_FREQOFFSET_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_ATE_TX_BW_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_ATE_TX_LENGTH_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_ATE_TX_COUNT_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_ATE_TX_MCS_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg);
+
+INT	Set_ATE_TX_MODE_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg);
+
+INT	Set_ATE_TX_GI_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg);
+
+
+INT	Set_ATE_RX_FER_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT Set_ATE_Read_RF_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+#ifndef RTMP_RF_RW_SUPPORT
+INT Set_ATE_Write_RF1_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT Set_ATE_Write_RF2_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT Set_ATE_Write_RF3_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT Set_ATE_Write_RF4_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+#endif /* RTMP_RF_RW_SUPPORT */
+
+INT Set_ATE_Load_E2P_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT Set_ATE_Read_E2P_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+#ifdef LED_CONTROL_SUPPORT
+#endif /* LED_CONTROL_SUPPORT */
+
+INT	Set_ATE_AUTO_ALC_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_ATE_IPG_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT Set_ATE_Payload_Proc(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  PSTRING         arg);
+
+#ifdef TXBF_SUPPORT
+INT	Set_ATE_TX_BF_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+#endif /* TXBF_SUPPORT */
+
+INT	Set_ATE_Show_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_ATE_Help_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+VOID ATEAsicAdjustTxPower(
+	IN PRTMP_ADAPTER pAd);
+
+VOID ATESampleRssi(
+	IN PRTMP_ADAPTER	pAd,
+	IN PRXWI_STRUC		pRxWI);	
+
+#ifdef RT33xx
+INT Set_ATE_TX_EVM_CALIBRATION_Show_Proc(
+ IN PRTMP_ADAPTER pAd,
+ IN PSTRING   arg);
+ 
+INT Set_ATE_TX_EVM_CALIBRATION_Proc(
+ IN PRTMP_ADAPTER pAd,
+ IN PSTRING   arg);
+ 
+INT Set_ATE_TX_EVM_CALIBRATION_Fill_Proc(
+ IN PRTMP_ADAPTER pAd,
+ IN PSTRING   arg);
+#endif /* RT33xx */
+#endif /* __RT_ATE_H__ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rt_config.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rt_config.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rt_config.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rt_config.h	2017-09-23 03:42:49.798675736 +0800
@@ -0,0 +1,147 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef	__RT_CONFIG_H__
+#define	__RT_CONFIG_H__
+
+/* #define WDS_VLAN_SUPPORT */
+
+#include "rtmp_comm.h"
+/*#include "rtmp_type.h" */
+/*#include "rtmp_os.h" */
+
+#include "rtmp_def.h"
+#include "rtmp_chip.h"
+#include "rtmp_timer.h"
+
+
+#ifdef LINUX
+#ifdef RT_CFG80211_SUPPORT
+#include "cfg80211extr.h"
+#endif /* RT_CFG80211_SUPPORT */
+#endif /* LINUX */
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef AGS_SUPPORT
+#include "ags.h"
+#endif /* AGS_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+
+#include "mlme.h"
+#include "crypt_md5.h"
+#include "crypt_sha2.h"
+#include "crypt_hmac.h"
+#include "crypt_aes.h"
+#include "crypt_arc4.h"
+/*#include "rtmp_cmd.h" */
+#include "rtmp.h"
+#include "ap.h"
+#include "wpa.h"
+#include "dfs.h"
+#include "chlist.h"
+#include "spectrum.h"
+#include "rt_os_util.h"
+
+#include "eeprom.h"
+#if defined(RTMP_PCI_SUPPORT) || defined(RTMP_USB_SUPPORT)
+#include "rtmp_mcu.h"
+#endif
+
+#undef AP_WSC_INCLUDED
+#undef STA_WSC_INCLUDED
+#undef WSC_INCLUDED
+
+#include "rt_os_net.h"
+
+
+
+
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef BLOCK_NET_IF
+#include "netif_block.h"
+#endif /* BLOCK_NET_IF */
+
+#ifdef IGMP_SNOOP_SUPPORT
+#include "igmp_snoop.h"
+#endif /* IGMP_SNOOP_SUPPORT */
+
+#ifdef RALINK_ATE
+#include "rt_ate.h"
+#endif /* RALINK_ATE */
+
+#ifdef RALINK_QA
+#ifndef RALINK_ATE
+#error "For supporting QA GUI, please set HAS_ATE=y and HAS_QA_SUPPORT=y."
+#endif /* RALINK_ATE */
+#endif /* RALINK_QA */
+
+
+
+
+
+
+#if defined(AP_WSC_INCLUDED) || defined(STA_WSC_INCLUDED)
+#define WSC_INCLUDED
+#endif
+
+
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
+#ifndef WPA_SUPPLICANT_SUPPORT
+#error "Build for being controlled by NetworkManager or wext, please set HAS_WPA_SUPPLICANT=y and HAS_NATIVE_WPA_SUPPLICANT_SUPPORT=y"
+#endif /* WPA_SUPPLICANT_SUPPORT */
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+
+#endif /* CONFIG_STA_SUPPORT */
+
+
+
+#ifdef IKANOS_VX_1X0
+#include "vr_ikans.h"
+#endif /* IKANOS_VX_1X0 */
+
+
+
+
+
+
+
+#ifdef CONFIG_STA_SUPPORT
+#include "sta_cfg.h"
+#endif /* CONFIG_STA_SUPPORT */
+
+
+
+
+#ifdef RTMP_FREQ_CALIBRATION_SUPPORT
+#include "frq_cal.h"
+#endif /* RTMP_FREQ_CALIBRATION_SUPPORT */
+#endif	/* __RT_CONFIG_H__ */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rt_led.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rt_led.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rt_led.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rt_led.h	2017-09-23 03:42:49.798675736 +0800
@@ -0,0 +1,131 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RT_LED_H__
+#define __RT_LED_H__
+
+/* LED MCU command */
+#define MCU_SET_LED_MODE				0x50
+#define MCU_SET_LED_GPIO_SIGNAL_CFG		0x51
+#define MCU_SET_LED_AG_CFG 				0x52
+#define MCU_SET_LED_ACT_CFG 			0x53
+#define MCU_SET_LED_POLARITY			0x54
+
+/* LED Mode */
+#define LED_MODE(pAd) ((pAd)->LedCntl.MCULedCntl.field.LedMode & 0x7F)
+#define LED_HW_CONTROL					19	/* set LED to controll by MAC registers instead of by firmware */
+#define LED_MODE_DEFAULT            	0	/* value domain of pAd->LedCntl.LedMode and E2PROM */
+#define LED_MODE_TWO_LED				1
+#define LED_MODE_8SEC_SCAN				2	/* Same as LED mode 1; except that fast blink for 8sec when doing scanning. */
+#define LED_MODE_SITE_SURVEY_SLOW_BLINK	3	/* Same as LED mode 1; except that make ACT slow blinking during site survey period and blink once at power-up. */
+#define LED_MODE_WPS_LOW_POLARITY		4	/* Same as LED mode 1; except that make ACT steady on during WPS period */
+#define LED_MODE_WPS_HIGH_POLARITY		5	/* Same as LED mode 1; except that make ACT steady on during WPS period */
+/*#define LED_MODE_SIGNAL_STREGTH		8   // EEPROM define =8 */
+#define LED_MODE_SIGNAL_STREGTH			0x40 /* EEPROM define = 64 */
+
+/* Driver LED Status */
+#define LED_LINK_DOWN		0
+#define LED_LINK_UP			1
+#define LED_RADIO_OFF		2
+#define LED_RADIO_ON		3
+#define LED_HALT			4
+#define LED_WPS				5
+#define LED_ON_SITE_SURVEY	6
+#define LED_POWER_UP		7
+
+/* MCU Led Link Status */
+#define LINK_STATUS_LINK_DOWN		0x20
+#define LINK_STATUS_ABAND_LINK_UP	0xa0
+#define LINK_STATUS_GBAND_LINK_UP	0x60
+#define LINK_STATUS_RADIO_ON		0x20
+#define LINK_STATUS_RADIO_OFF		0x00
+#define LINK_STATUS_WPS				0x10
+#define LINK_STATUS_ON_SITE_SURVEY	0x08
+#define LINK_STATUS_POWER_UP		0x04
+#define LINK_STATUS_HW_CONTROL		0x00
+
+
+#define ACTIVE_LOW 	0
+#define ACTIVE_HIGH 1
+
+/* */
+/* MCU_LEDCS: MCU LED Control Setting. */
+/* */
+typedef union  _MCU_LEDCS_STRUC {
+	struct	{
+#ifdef RT_BIG_ENDIAN
+		UCHAR		Polarity:1;
+		UCHAR		LedMode:7;
+#else
+		UCHAR		LedMode:7;		
+		UCHAR		Polarity:1;
+#endif /* RT_BIG_ENDIAN */
+	} field;
+	UCHAR				word;
+} MCU_LEDCS_STRUC, *PMCU_LEDCS_STRUC;
+
+void RTMPGetLEDSetting(IN RTMP_ADAPTER *pAd);
+void RTMPInitLEDMode(IN RTMP_ADAPTER *pAd);
+void RTMPExitLEDMode(IN RTMP_ADAPTER *pAd);
+
+VOID RTMPSetLEDStatus(
+	IN PRTMP_ADAPTER 	pAd, 
+	IN UCHAR			Status);
+
+#ifdef RTMP_MAC_USB
+#define RTMPSetLED(pAd, Status)	\
+do{								\
+	UCHAR LEDStatus;			\
+	LEDStatus = Status;			\
+	RTEnqueueInternalCmd(pAd, CMDTHREAD_SET_LED_STATUS, &LEDStatus, sizeof(LEDStatus));	\
+}while(0)
+	
+#endif /* RTMP_MAC_USB */
+
+
+VOID RTMPSetSignalLED(
+	IN PRTMP_ADAPTER 	pAd, 
+	IN NDIS_802_11_RSSI Dbm);
+
+
+
+typedef struct _LED_CONTROL
+{
+	MCU_LEDCS_STRUC		MCULedCntl; /* LED Mode EEPROM 0x3b */
+	USHORT				LedAGCfg;	/* LED A/G Configuration EEPROM 0x3c */
+	USHORT				LedACTCfg;	/* LED ACT Configuration EEPROM 0x3e */
+	USHORT				LedPolarity;/* LED A/G/ACT polarity EEPROM 0x40 */
+	UCHAR				LedIndicatorStrength;
+	UCHAR				RssiSingalstrengthOffet;
+	BOOLEAN				bLedOnScanning;
+	UCHAR				LedStatus;
+}LED_CONTROL, *PLED_CONTROL;
+
+void RTMPStartLEDMode(IN RTMP_ADAPTER *pAd);
+
+#endif /* __RT_LED_H__ */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rtmp_chip.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rtmp_chip.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rtmp_chip.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rtmp_chip.h	2017-09-23 03:42:49.798675736 +0800
@@ -0,0 +1,917 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef	__RTMP_CHIP_H__
+#define	__RTMP_CHIP_H__
+
+#include "rtmp_type.h"
+
+struct _RTMP_ADAPTER;
+
+
+
+
+#ifdef RT3070
+#include "chip/rt3070.h"
+#endif /* RT3070 */
+
+
+
+
+
+
+#ifdef RT3370
+#include "chip/rt3370.h"
+#endif /* RT3370 */
+
+
+
+
+#ifdef RT5350
+#include "chip/rt5350.h"
+#endif /* RT5350 */
+
+#ifdef RT3572
+#include "chip/rt28xx.h"
+#endif /* RT3572 */
+
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+#include "chip/rt5390.h"
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+
+#define IS_RT3090A(_pAd)    ((((_pAd)->MACVersion & 0xffff0000) == 0x30900000))
+
+/* We will have a cost down version which mac version is 0x3090xxxx */
+#define IS_RT3090(_pAd)     ((((_pAd)->MACVersion & 0xffff0000) == 0x30710000) || (IS_RT3090A(_pAd)))
+
+#define IS_RT3070(_pAd)		(((_pAd)->MACVersion & 0xffff0000) == 0x30700000)
+#define IS_RT3071(_pAd)		(((_pAd)->MACVersion & 0xffff0000) == 0x30710000)
+#define IS_RT2070(_pAd)		(((_pAd)->RfIcType == RFIC_2020) || ((_pAd)->EFuseTag == 0x27))
+
+#define IS_RT2860(_pAd)		(((_pAd)->MACVersion & 0xffff0000) == 0x28600000)
+#define IS_RT2872(_pAd)		(((_pAd)->MACVersion & 0xffff0000) == 0x28720000)
+
+#define IS_RT30xx(_pAd)		(((_pAd)->MACVersion & 0xfff00000) == 0x30700000||IS_RT3090A(_pAd)||IS_RT3390(_pAd))
+/*#define IS_RT305X(_pAd)		((_pAd)->MACVersion == 0x28720200) */
+#define IS_RT3052(_pAd)		(((_pAd)->MACVersion == 0x28720200) && (_pAd->Antenna.field.TxPath == 2))
+#define IS_RT3050(_pAd)		(((_pAd)->MACVersion == 0x28720200) && ((_pAd)->RfIcType == RFIC_3020))
+#define IS_RT3350(_pAd)		(((_pAd)->MACVersion == 0x28720200) && ((_pAd)->RfIcType == RFIC_3320))
+#define IS_RT3352(_pAd)		(((_pAd)->MACVersion & 0xffff0000) == 0x33520000)
+#define IS_RT5350(_pAd)		(((_pAd)->MACVersion & 0xffff0000) == 0x53500000)
+
+/*
+	RT3050: MAC_CSR0  [ Ver:Rev=0x28720200]
+			RF IC Type: 5
+			pAd->Antenna.field.TxPath = 1
+			pAd->CommonCfg.CN: 33335452
+			pAd->CommonCfg.CID = 102
+
+	RT3350: MAC_CSR0  [ Ver:Rev=0x28720200]
+			RF IC Type: 11
+			pAd->Antenna.field.TxPath = 1
+			pAd->CommonCfg.CN: 33335452
+			pAd->CommonCfg.CID = 102
+*/
+
+/* RT3572, 3592, 3562, 3062 share the same MAC version */
+#define IS_RT3572(_pAd)		(((_pAd)->MACVersion & 0xffff0000) == 0x35720000)
+
+/* Check if it is RT3xxx, or Specified ID in registry for debug */
+#define IS_DEV_RT3xxx(_pAd)( \
+	(_pAd->DeviceID == NIC3090_PCIe_DEVICE_ID) || \
+	(_pAd->DeviceID == NIC3091_PCIe_DEVICE_ID) || \
+	(_pAd->DeviceID == NIC3092_PCIe_DEVICE_ID) || \
+	(_pAd->DeviceID == NIC3592_PCIe_DEVICE_ID) || \
+	((_pAd->DeviceID == NIC3593_PCI_OR_PCIe_DEVICE_ID) && (RT3593OverPCIe(_pAd))) \
+)
+
+#define IS_RT2883(_pAd)		(((_pAd)->MACVersion & 0xffff0000) == 0x28830000)
+#define IS_RT3883(_pAd)		(((_pAd)->MACVersion & 0xffff0000) == 0x38830000)
+#define IS_VERSION_BEFORE_F(_pAd)			(((_pAd)->MACVersion&0xffff) <= 0x0211)
+/* F version is 0x0212, E version is 0x0211. 309x can save more power after F version. */
+#define IS_VERSION_AFTER_F(_pAd)			((((_pAd)->MACVersion&0xffff) >= 0x0212) || (((_pAd)->b3090ESpecialChip == TRUE)))
+
+/* 3593 */
+#define IS_RT3593(_pAd) (((_pAd)->MACVersion & 0xFFFF0000) == 0x35930000)
+
+
+/* RT5392 */
+#define IS_RT5392(_pAd)   ((_pAd->MACVersion & 0xFFFF0000) == 0x53920000) /* Include RT5392, RT5372 and RT5362 */
+
+/* RT5390 */
+#define IS_RT5390(_pAd)   ((((_pAd)->MACVersion & 0xFFFF0000) == 0x53900000) ||IS_RT5392(_pAd))	/* Include RT5390,  RT5370, RT5392, RT5372, RT5360 and RT5362 */
+
+/* RT5390F */
+
+#define IS_RT5390F(_pAd)	((IS_RT5390(_pAd)) && (((_pAd)->MACVersion & 0x0000FFFF) >= 0x0502))
+
+/* RT5390R */
+
+/* RT5370G */
+#define IS_RT5370G(_pAd)	((IS_RT5390(_pAd)) && (((_pAd)->MACVersion & 0x0000FFFF) >= 0x0503)) /* support HW PPAD ( the hardware rx antenna diversity ) */
+
+/* RT5390R */
+
+
+#define IS_RT5390R(_pAd)   ((IS_RT5390(_pAd)) && (((_pAd)->MACVersion & 0x0000FFFF) == 0x1502)) /* support HW PPAD ( the hardware rx antenna diversity ) */
+/* PCIe interface NIC */
+
+#define IS_MINI_CARD(_pAd) ((_pAd)->Antenna.field.BoardType == BOARD_TYPE_MINI_CARD)
+
+/* 5390U (5370 using PCIe interface) */
+
+#define IS_RT5390U(_pAd)   (IS_MINI_CARD(_pAd) && ((_pAd)->MACVersion & 0xFFFF0000) == 0x53900000)
+
+/* RT5390BC8 (WiFi + BT) */
+
+
+
+/* RT5390D */
+
+#define IS_RT5390D(_pAd)	((IS_RT5390(_pAd)) && (((_pAd)->MACVersion & 0x0000FFFF) >= 0x0502))
+
+
+/* RT5392C */
+
+#define IS_RT5392C(_pAd)	((IS_RT5392(_pAd)) && (((_pAd)->MACVersion & 0x0000FFFF) >= 0x0222)) /* Include RT5392, RT5372 and RT5362 */
+
+/* RT3592BC8 (WiFi + BT) */
+
+
+/* Dual-band NIC (RF/BBP/MAC are in the same chip.) */
+
+#define IS_RT_NEW_DUAL_BAND_NIC(_pAd) ((FALSE))
+
+
+/* Is the NIC dual-band NIC? */
+
+#define IS_DUAL_BAND_NIC(_pAd) (((_pAd->RfIcType == RFIC_2850) || (_pAd->RfIcType == RFIC_2750) || (_pAd->RfIcType == RFIC_3052)		\
+								|| (_pAd->RfIcType == RFIC_3053) || (_pAd->RfIcType == RFIC_2853) || (_pAd->RfIcType == RFIC_3853) 	\
+								|| IS_RT_NEW_DUAL_BAND_NIC(_pAd)) && !IS_RT5390(_pAd))
+
+
+/* RT3593 over PCIe bus */
+#define RT3593OverPCIe(_pAd) (IS_RT3593(_pAd) && (_pAd->CommonCfg.bPCIeBus == TRUE))
+
+/* RT3593 over PCI bus */
+#define RT3593OverPCI(_pAd) (IS_RT3593(_pAd) && (_pAd->CommonCfg.bPCIeBus == FALSE))
+
+/*RT3390,RT3370 */
+#define IS_RT3390(_pAd)				(((_pAd)->MACVersion & 0xFFFF0000) == 0x33900000)
+
+/* ------------------------------------------------------ */
+/* PCI registers - base address 0x0000 */
+/* ------------------------------------------------------ */
+#define CHIP_PCI_CFG		0x0000
+#define CHIP_PCI_EECTRL		0x0004
+#define CHIP_PCI_MCUCTRL	0x0008
+
+#define OPT_14			0x114
+
+#define RETRY_LIMIT		10
+
+/* ------------------------------------------------------ */
+/* BBP & RF	definition */
+/* ------------------------------------------------------ */
+#define	BUSY		                1
+#define	IDLE		                0
+
+/*------------------------------------------------------------------------- */
+/* EEPROM definition */
+/*------------------------------------------------------------------------- */
+#define EEDO                        0x08
+#define EEDI                        0x04
+#define EECS                        0x02
+#define EESK                        0x01
+#define EERL                        0x80
+
+#define EEPROM_WRITE_OPCODE         0x05
+#define EEPROM_READ_OPCODE          0x06
+#define EEPROM_EWDS_OPCODE          0x10
+#define EEPROM_EWEN_OPCODE          0x13
+
+#define NUM_EEPROM_BBP_PARMS		19	/* Include NIC Config 0, 1, CR, TX ALC step, BBPs */
+#define NUM_EEPROM_TX_G_PARMS		7
+
+#define VALID_EEPROM_VERSION        1
+#define EEPROM_VERSION_OFFSET       0x02
+#define EEPROM_NIC1_OFFSET          0x34	/* The address is from NIC config 0, not BBP register ID */
+#define EEPROM_NIC2_OFFSET          0x36	/* The address is from NIC config 1, not BBP register ID */
+
+
+#define EEPROM_COUNTRY_REGION			0x38
+
+#define EEPROM_DEFINE_MAX_TXPWR			0x4e
+
+#define EEPROM_FREQ_OFFSET			0x3a
+#define EEPROM_LEDAG_CONF_OFFSET	0x3c
+#define EEPROM_LEDACT_CONF_OFFSET	0x3e
+#define EEPROM_LED_POLARITY_OFFSET	0x40
+
+#define EEPROM_LNA_OFFSET			0x44
+
+#define EEPROM_RSSI_BG_OFFSET			0x46
+#define EEPROM_RSSI_A_OFFSET			0x4a
+#define EEPROM_TXMIXER_GAIN_2_4G		0x48
+#define EEPROM_TXMIXER_GAIN_5G			0x4c
+
+#define EEPROM_TXPOWER_DELTA			0x50	/* 20MHZ AND 40 MHZ use different power. This is delta in 40MHZ. */
+
+#define EEPROM_G_TX_PWR_OFFSET			0x52
+#define EEPROM_G_TX2_PWR_OFFSET			0x60
+
+#define EEPROM_G_TSSI_BOUND1			0x6e
+#define EEPROM_G_TSSI_BOUND2			0x70
+#define EEPROM_G_TSSI_BOUND3			0x72
+#define EEPROM_G_TSSI_BOUND4			0x74
+#define EEPROM_G_TSSI_BOUND5			0x76
+
+#define EEPROM_A_TX_PWR_OFFSET      		0x78
+#define EEPROM_A_TX2_PWR_OFFSET			0xa6
+
+#define EEPROM_A_TSSI_BOUND1		0xd4
+#define EEPROM_A_TSSI_BOUND2		0xd6
+#define EEPROM_A_TSSI_BOUND3		0xd8
+#define EEPROM_A_TSSI_BOUND4		0xda
+#define EEPROM_A_TSSI_BOUND5		0xdc
+
+#define EEPROM_ITXBF_CAL_RX0			0x1a0
+#define EEPROM_ITXBF_CAL_TX0			0x1a2
+#define EEPROM_ITXBF_CAL_RX1			0x1a4
+#define EEPROM_ITXBF_CAL_TX1			0x1a6
+#define EEPROM_ITXBF_CAL_RX2			0x1a8
+#define EEPROM_ITXBF_CAL_TX2			0x1aa
+
+#define EEPROM_TXPOWER_BYRATE 			0xde	/* 20MHZ power. */
+#define EEPROM_TXPOWER_BYRATE_20MHZ_2_4G	0xde	/* 20MHZ 2.4G tx power. */
+#define EEPROM_TXPOWER_BYRATE_40MHZ_2_4G	0xee	/* 40MHZ 2.4G tx power. */
+#define EEPROM_TXPOWER_BYRATE_20MHZ_5G		0xfa	/* 20MHZ 5G tx power. */
+#define EEPROM_TXPOWER_BYRATE_40MHZ_5G		0x10a	/* 40MHZ 5G tx power. */
+
+#define EEPROM_BBP_BASE_OFFSET			0xf0	/* The address is from NIC config 0, not BBP register ID */
+
+/* */
+/* Bit mask for the Tx ALC and the Tx fine power control */
+/* */
+#define GET_TX_ALC_BIT_MASK					0x1F	/* Valid: 0~31, and in 0.5dB step */
+#define GET_TX_FINE_POWER_CTRL_BIT_MASK	0xE0	/* Valid: 0~4, and in 0.1dB step */
+#define NUMBER_OF_BITS_FOR_TX_ALC			5	/* The length, in bit, of the Tx ALC field */
+
+
+/* TSSI gain and TSSI attenuation */
+
+#define EEPROM_TSSI_GAIN_AND_ATTENUATION	0x76
+
+/*#define EEPROM_Japan_TX_PWR_OFFSET      0x90 // 802.11j */
+/*#define EEPROM_Japan_TX2_PWR_OFFSET      0xbe */
+/*#define EEPROM_TSSI_REF_OFFSET	0x54 */
+/*#define EEPROM_TSSI_DELTA_OFFSET	0x24 */
+/*#define EEPROM_CCK_TX_PWR_OFFSET  0x62 */
+/*#define EEPROM_CALIBRATE_OFFSET	0x7c */
+
+#define EEPROM_NIC_CFG1_OFFSET		0
+#define EEPROM_NIC_CFG2_OFFSET		1
+#define EEPROM_NIC_CFG3_OFFSET		2
+#define EEPROM_COUNTRY_REG_OFFSET	3
+#define EEPROM_BBP_ARRAY_OFFSET		4
+
+#ifdef RTMP_INTERNAL_TX_ALC
+/* */
+/* The TSSI over OFDM 54Mbps */
+/* */
+#define EEPROM_TSSI_OVER_OFDM_54		0x6E
+
+/* */
+/* The TSSI value/step (0.5 dB/unit) */
+/* */
+#define EEPROM_TSSI_STEP_OVER_2DOT4G	0x77
+
+/* */
+/* Per-channel Tx power offset (for the extended TSSI mode) */
+/* */
+#define EEPROM_TX_POWER_OFFSET_OVER_CH_1	0x6F
+#define EEPROM_TX_POWER_OFFSET_OVER_CH_3	0x70
+#define EEPROM_TX_POWER_OFFSET_OVER_CH_5	0x71
+#define EEPROM_TX_POWER_OFFSET_OVER_CH_7	0x72
+#define EEPROM_TX_POWER_OFFSET_OVER_CH_9	0x73
+#define EEPROM_TX_POWER_OFFSET_OVER_CH_11	0x74
+#define EEPROM_TX_POWER_OFFSET_OVER_CH_13	0x75
+
+/* */
+/* Tx power configuration (bit3:0 for Tx0 power setting and bit7:4 for Tx1 power setting) */
+/* */
+#define EEPROM_CCK_MCS0_MCS1				0xDE
+#define EEPROM_CCK_MCS2_MCS3				0xDF
+#define EEPROM_OFDM_MCS0_MCS1				0xE0
+#define EEPROM_OFDM_MCS2_MCS3				0xE1
+#define EEPROM_OFDM_MCS4_MCS5				0xE2
+#define EEPROM_OFDM_MCS6_MCS7				0xE3
+#define EEPROM_HT_MCS0_MCS1				0xE4
+#define EEPROM_HT_MCS2_MCS3				0xE5
+#define EEPROM_HT_MCS4_MCS5				0xE6
+#define EEPROM_HT_MCS6_MCS7				0xE7
+#define EEPROM_HT_MCS8_MCS9                     0xE8
+#define EEPROM_HT_MCS10_MCS11                   0xE9
+#define EEPROM_HT_MCS12_MCS13                   0xEA
+#define EEPROM_HT_MCS14_MCS15                   0xEB
+#define EEPROM_HT_USING_STBC_MCS0_MCS1	0xEC
+#define EEPROM_HT_USING_STBC_MCS2_MCS3	0xED
+#define EEPROM_HT_USING_STBC_MCS4_MCS5	0xEE
+#define EEPROM_HT_USING_STBC_MCS6_MCS7	0xEF
+
+/* */
+/* Bit mask for the Tx ALC and the Tx fine power control */
+/* */
+
+#define DEFAULT_BBP_TX_FINE_POWER_CTRL 0
+
+CHAR GetDesiredTSSI(
+	IN struct _RTMP_ADAPTER		*pAd);
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+
+#ifdef RT33xx
+#define EEPROM_EVM_RF09  0x120
+#define EEPROM_EVM_RF19  0x122
+#define EEPROM_EVM_RF21  0x124
+#define EEPROM_EVM_RF29  0x128
+#endif /* RT33xx */
+
+/*
+  *   EEPROM operation related marcos
+  */
+#define RT28xx_EEPROM_READ16(_pAd, _offset, _value)			\
+	(_pAd)->chipOps.eeread((RTMP_ADAPTER *)(_pAd), (USHORT)(_offset), (PUSHORT)&(_value))
+
+#define RT28xx_EEPROM_WRITE16(_pAd, _offset, _value)		\
+	(_pAd)->chipOps.eewrite((RTMP_ADAPTER *)(_pAd), (USHORT)(_offset), (USHORT)(_value))
+
+/* ------------------------------------------------------------------- */
+/*  E2PROM data layout */
+/* ------------------------------------------------------------------- */
+
+/* Board type */
+
+#define BOARD_TYPE_MINI_CARD	0/* Mini card */
+#define BOARD_TYPE_USB_PEN		1/* USB pen */
+
+
+/* */
+/* EEPROM antenna select format */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef union _EEPROM_ANTENNA_STRUC {
+	struct {
+		USHORT 		RssiIndicationMode:1; // RSSI indication mode
+		USHORT Rsv:1;
+		USHORT BoardType:2; // 0: mini card; 1: USB pen		
+		USHORT RfIcType:4;	/* see E2PROM document */
+		USHORT TxPath:4;	/* 1: 1T, 2: 2T */
+		USHORT RxPath:4;	/* 1: 1R, 2: 2R, 3: 3R */
+	} field;
+	USHORT word;
+} EEPROM_ANTENNA_STRUC, *PEEPROM_ANTENNA_STRUC;
+#else
+typedef union _EEPROM_ANTENNA_STRUC {
+	struct {
+		USHORT RxPath:4;	/* 1: 1R, 2: 2R, 3: 3R */
+		USHORT TxPath:4;	/* 1: 1T, 2: 2T */
+		USHORT RfIcType:4;	/* see E2PROM document */
+		USHORT BoardType:2; // 0: mini card; 1: USB pen
+		USHORT Rsv:1;
+		USHORT 		RssiIndicationMode:1; // RSSI indication mode		
+	} field;
+	USHORT word;
+} EEPROM_ANTENNA_STRUC, *PEEPROM_ANTENNA_STRUC;
+#endif
+
+#ifdef RT_BIG_ENDIAN
+typedef union _EEPROM_NIC_CINFIG2_STRUC {
+	struct {
+		USHORT DACTestBit:1;	/* control if driver should patch the DAC issue */
+		USHORT CoexBit:1;
+		USHORT bInternalTxALC:1;	/* Internal Tx ALC */
+		USHORT AntOpt:1;	/* Fix Antenna Option: 0:Main; 1: Aux */
+		USHORT AntDiversity:1;	/* Antenna diversity */
+		USHORT Rsv1:1;	/* must be 0 */
+		USHORT BW40MAvailForA:1;	/* 0:enable, 1:disable */
+		USHORT BW40MAvailForG:1;	/* 0:enable, 1:disable */
+		USHORT EnableWPSPBC:1;	/* WPS PBC Control bit */
+		USHORT BW40MSidebandForA:1;
+		USHORT BW40MSidebandForG:1;
+		USHORT CardbusAcceleration:1;	/* !!! NOTE: 0 - enable, 1 - disable */
+		USHORT ExternalLNAForA:1;	/* external LNA enable for 5G */
+		USHORT ExternalLNAForG:1;	/* external LNA enable for 2.4G */
+		USHORT DynamicTxAgcControl:1;	/* */
+		USHORT HardwareRadioControl:1;	/* Whether RF is controlled by driver or HW. 1:enable hw control, 0:disable */
+	} field;
+	USHORT word;
+} EEPROM_NIC_CONFIG2_STRUC, *PEEPROM_NIC_CONFIG2_STRUC;
+#else
+typedef union _EEPROM_NIC_CINFIG2_STRUC {
+	struct {
+		USHORT HardwareRadioControl:1;	/* 1:enable, 0:disable */
+		USHORT DynamicTxAgcControl:1;	/* */
+		USHORT ExternalLNAForG:1;	/* */
+		USHORT ExternalLNAForA:1;	/* external LNA enable for 2.4G */
+		USHORT CardbusAcceleration:1;	/* !!! NOTE: 0 - enable, 1 - disable */
+		USHORT BW40MSidebandForG:1;
+		USHORT BW40MSidebandForA:1;
+		USHORT EnableWPSPBC:1;	/* WPS PBC Control bit */
+		USHORT BW40MAvailForG:1;	/* 0:enable, 1:disable */
+		USHORT BW40MAvailForA:1;	/* 0:enable, 1:disable */
+		USHORT Rsv1:1;	/* must be 0 */
+		USHORT AntDiversity:1;	/* Antenna diversity */
+		USHORT AntOpt:1;	/* Fix Antenna Option: 0:Main; 1: Aux */
+		USHORT bInternalTxALC:1;	/* Internal Tx ALC */
+		USHORT CoexBit:1;
+		USHORT DACTestBit:1;	/* control if driver should patch the DAC issue */
+	} field;
+	USHORT word;
+} EEPROM_NIC_CONFIG2_STRUC, *PEEPROM_NIC_CONFIG2_STRUC;
+#endif
+
+
+/* */
+/* TX_PWR Value valid range 0xFA(-6) ~ 0x24(36) */
+/* */
+#ifdef RT_BIG_ENDIAN
+typedef union _EEPROM_TX_PWR_STRUC {
+	struct {
+		signed char Byte1;	/* High Byte */
+		signed char Byte0;	/* Low Byte */
+	} field;
+	USHORT word;
+} EEPROM_TX_PWR_STRUC, *PEEPROM_TX_PWR_STRUC;
+#else
+typedef union _EEPROM_TX_PWR_STRUC {
+	struct {
+		signed char Byte0;	/* Low Byte */
+		signed char Byte1;	/* High Byte */
+	} field;
+	USHORT word;
+} EEPROM_TX_PWR_STRUC, *PEEPROM_TX_PWR_STRUC;
+#endif
+
+#ifdef RT_BIG_ENDIAN
+typedef union _EEPROM_VERSION_STRUC {
+	struct {
+		UCHAR Version;	/* High Byte */
+		UCHAR FaeReleaseNumber;	/* Low Byte */
+	} field;
+	USHORT word;
+} EEPROM_VERSION_STRUC, *PEEPROM_VERSION_STRUC;
+#else
+typedef union _EEPROM_VERSION_STRUC {
+	struct {
+		UCHAR FaeReleaseNumber;	/* Low Byte */
+		UCHAR Version;	/* High Byte */
+	} field;
+	USHORT word;
+} EEPROM_VERSION_STRUC, *PEEPROM_VERSION_STRUC;
+#endif
+
+#ifdef RT_BIG_ENDIAN
+typedef union _EEPROM_LED_STRUC {
+	struct {
+		USHORT Rsvd:3;	/* Reserved */
+		USHORT LedMode:5;	/* Led mode. */
+		USHORT PolarityGPIO_4:1;	/* Polarity GPIO#4 setting. */
+		USHORT PolarityGPIO_3:1;	/* Polarity GPIO#3 setting. */
+		USHORT PolarityGPIO_2:1;	/* Polarity GPIO#2 setting. */
+		USHORT PolarityGPIO_1:1;	/* Polarity GPIO#1 setting. */
+		USHORT PolarityGPIO_0:1;	/* Polarity GPIO#0 setting. */
+		USHORT PolarityACT:1;	/* Polarity ACT setting. */
+		USHORT PolarityRDY_A:1;	/* Polarity RDY_A setting. */
+		USHORT PolarityRDY_G:1;	/* Polarity RDY_G setting. */
+	} field;
+	USHORT word;
+} EEPROM_LED_STRUC, *PEEPROM_LED_STRUC;
+#else
+typedef union _EEPROM_LED_STRUC {
+	struct {
+		USHORT PolarityRDY_G:1;	/* Polarity RDY_G setting. */
+		USHORT PolarityRDY_A:1;	/* Polarity RDY_A setting. */
+		USHORT PolarityACT:1;	/* Polarity ACT setting. */
+		USHORT PolarityGPIO_0:1;	/* Polarity GPIO#0 setting. */
+		USHORT PolarityGPIO_1:1;	/* Polarity GPIO#1 setting. */
+		USHORT PolarityGPIO_2:1;	/* Polarity GPIO#2 setting. */
+		USHORT PolarityGPIO_3:1;	/* Polarity GPIO#3 setting. */
+		USHORT PolarityGPIO_4:1;	/* Polarity GPIO#4 setting. */
+		USHORT LedMode:5;	/* Led mode. */
+		USHORT Rsvd:3;	/* Reserved */
+	} field;
+	USHORT word;
+} EEPROM_LED_STRUC, *PEEPROM_LED_STRUC;
+#endif
+
+#ifdef RT_BIG_ENDIAN
+typedef union _EEPROM_TXPOWER_DELTA_STRUC {
+	struct {
+		UCHAR TxPowerEnable:1;	/* Enable */
+		UCHAR Type:1;	/* 1: plus the delta value, 0: minus the delta value */
+		UCHAR DeltaValue:6;	/* Tx Power dalta value (MAX=4) */
+	} field;
+	UCHAR value;
+} EEPROM_TXPOWER_DELTA_STRUC, *PEEPROM_TXPOWER_DELTA_STRUC;
+#else
+typedef union _EEPROM_TXPOWER_DELTA_STRUC {
+	struct {
+		UCHAR DeltaValue:6;	/* Tx Power dalta value (MAX=4) */
+		UCHAR Type:1;	/* 1: plus the delta value, 0: minus the delta value */
+		UCHAR TxPowerEnable:1;	/* Enable */
+	} field;
+	UCHAR value;
+} EEPROM_TXPOWER_DELTA_STRUC, *PEEPROM_TXPOWER_DELTA_STRUC;
+#endif
+
+
+#ifdef RT_BIG_ENDIAN
+typedef union _EEPROM_TX_PWR_OFFSET_STRUC
+{
+	struct
+	{
+		UCHAR	Byte1;	/* High Byte */
+		UCHAR	Byte0;	/* Low Byte */
+	} field;
+	
+	USHORT		word;
+} EEPROM_TX_PWR_OFFSET_STRUC, *PEEPROM_TX_PWR_OFFSET_STRUC;
+#else
+typedef union _EEPROM_TX_PWR_OFFSET_STRUC
+{
+	struct
+	{
+		UCHAR	Byte0;	/* Low Byte */
+		UCHAR	Byte1;	/* High Byte */
+	} field;
+
+	USHORT		word;
+} EEPROM_TX_PWR_OFFSET_STRUC, *PEEPROM_TX_PWR_OFFSET_STRUC;
+#endif // RT_BIG_ENDIAN //
+/*
+	2860: 28xx
+	2870: 28xx
+
+	30xx:
+		3090
+		3070
+		2070 3070
+
+	33xx:	30xx
+		3390 3090
+		3370 3070
+
+	35xx:	30xx
+		3572, 2870, 28xx
+		3062, 2860, 28xx
+		3562, 2860, 28xx
+
+	3593, 28xx, 30xx, 35xx
+
+	< Note: 3050, 3052, 3350 can not be compiled simultaneously. >
+	305x:
+		3052
+		3050
+		3350, 3050
+
+	3352: 305x
+
+	2880: 28xx
+	2883:
+	3883:
+*/
+
+struct _RTMP_CHIP_CAP_ {
+	/* register */
+	REG_PAIR *pRFRegTable;
+	REG_PAIR *pBBPRegTable;
+	UCHAR bbpRegTbSize;
+
+	UINT32 MaxNumOfRfId;
+	UINT32 MaxNumOfBbpId;
+
+#define RF_REG_WT_METHOD_NONE			0
+#define RF_REG_WT_METHOD_STEP_ON		1
+	UCHAR RfReg17WtMethod;
+
+	/* beacon */
+	BOOLEAN FlgIsSupSpecBcnBuf;	/* SPECIFIC_BCN_BUF_SUPPORT */
+	UINT8 BcnMaxNum;	/* software use */
+	UINT8 BcnMaxHwNum;	/* hardware limitation */
+	UINT8 WcidHwRsvNum;	/* hardware available WCID number */
+	UINT16 BcnMaxHwSize;	/* hardware maximum beacon size */
+	UINT16 BcnBase[HW_BEACON_MAX_NUM];	/* hardware beacon base address */
+
+	/* function */
+	/* use UINT8, not bit-or to speed up driver */
+	BOOLEAN FlgIsHwWapiSup;
+
+	/* signal */
+#define SNR_FORMULA1		0	/* ((0xeb     - pAd->StaCfg.LastSNR0) * 3) / 16; */
+#define SNR_FORMULA2		1	/* (pAd->StaCfg.LastSNR0 * 3 + 8) >> 4; */
+#define SNR_FORMULA3		2	/* (pAd->StaCfg.LastSNR0) * 3) / 16; */
+	UINT8 SnrFormula;
+
+#ifdef RTMP_INTERNAL_TX_ALC
+	UINT8 TxAlcTxPowerUpperBound;
+	UINT8 TxAlcMaxMCS;
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+#ifdef RTMP_EFUSE_SUPPORT
+	UINT16 EFUSE_USAGE_MAP_START;
+	UINT16 EFUSE_USAGE_MAP_END;
+	UINT8 EFUSE_USAGE_MAP_SIZE;
+#endif				/* RTMP_EFUSE_SUPPORT */
+
+	BOOLEAN	FlgIsVcoReCalSup;
+	BOOLEAN FlgIsHwAntennaDiversitySup;
+#ifdef TXRX_SW_ANTDIV_SUPPORT
+	BOOLEAN bTxRxSwAntDiv;
+#endif /* TXRX_SW_ANTDIV_SUPPORT */
+};
+
+struct _RTMP_CHIP_OP_ {
+	/*  Calibration access related callback functions */
+	int (*eeinit)(struct _RTMP_ADAPTER *pAd);
+	int (*eeread)(struct _RTMP_ADAPTER *pAd, USHORT offset, PUSHORT pValue);
+	int (*eewrite)(struct _RTMP_ADAPTER *pAd, USHORT offset, USHORT value);
+
+	/* MCU related callback functions */
+	int (*loadFirmware)(struct _RTMP_ADAPTER *pAd);
+	int (*eraseFirmware)(struct _RTMP_ADAPTER *pAd);
+	int (*sendCommandToMcu)(struct _RTMP_ADAPTER *pAd, UCHAR cmd, UCHAR token, UCHAR arg0, UCHAR arg1, BOOLEAN FlgIsNeedLocked);	/* int (*sendCommandToMcu)(RTMP_ADAPTER *pAd, UCHAR cmd, UCHAR token, UCHAR arg0, UCHAR arg1); */
+
+	void (*AsicRfInit)(struct _RTMP_ADAPTER *pAd);
+	void (*AsicBbpInit)(struct _RTMP_ADAPTER *pAd);
+	void (*AsicMacInit)(struct _RTMP_ADAPTER *pAd);
+
+	void (*AsicRfTurnOn)(struct _RTMP_ADAPTER *pAd);
+	void (*AsicRfTurnOff)(struct _RTMP_ADAPTER *pAd);
+	void (*AsicReverseRfFromSleepMode)(struct _RTMP_ADAPTER *pAd, BOOLEAN FlgIsInitState);
+	void (*AsicHaltAction)(struct _RTMP_ADAPTER *pAd);
+	void (*AsicEeBufferInit)(struct _RTMP_ADAPTER *pAd);
+
+	/* Power save */
+	VOID (*EnableAPMIMOPS)(IN struct _RTMP_ADAPTER *pAd, IN BOOLEAN ReduceCorePower);
+	VOID (*DisableAPMIMOPS)(IN struct _RTMP_ADAPTER *pAd);
+
+	/* Chip tuning */
+	VOID (*RxSensitivityTuning)(IN struct _RTMP_ADAPTER *pAd);
+
+	/* MAC */
+	VOID (*ChipResumeMsduTransmission)(IN struct _RTMP_ADAPTER *pAd);
+
+	/* BBP adjust */
+	VOID (*ChipBBPAdjust)(IN struct _RTMP_ADAPTER *pAd);
+	UCHAR (*ChipStaBBPAdjust)(
+				IN struct _RTMP_ADAPTER *pAd,
+				IN CHAR					Rssi,
+				IN UCHAR				R66);
+
+	/* Channel */
+	VOID (*RTMPSetAGCInitValue)(
+				IN struct _RTMP_ADAPTER *pAd,
+				IN UCHAR				BandWidth);
+	VOID (*ChipSwitchChannel)(
+				IN struct _RTMP_ADAPTER *pAd,
+				IN UCHAR				Channel,
+				IN BOOLEAN				bScan);
+
+
+	/* TX ALC */
+	VOID (*InitDesiredTSSITable)(IN struct _RTMP_ADAPTER *pAd);
+	int (*ATETssiCalibration)(
+				IN struct _RTMP_ADAPTER 	*pAd,
+				IN PSTRING				arg);
+	int (*ATETssiCalibrationExtend)(
+				IN struct _RTMP_ADAPTER 	*pAd,
+				IN PSTRING				arg);
+	VOID (*AsicTxAlcGetAutoAgcOffset)(
+				IN struct _RTMP_ADAPTER	*pAd,
+				IN PCHAR				pDeltaPwr,
+				IN PCHAR				pTotalDeltaPwr,
+				IN PCHAR				pAgcCompensate,
+				IN PUCHAR				pBbpR49);
+
+	int (*ATEReadExternalTSSI)(
+				IN struct _RTMP_ADAPTER 	*pAd,
+				IN PSTRING				arg);
+
+	/* Antenna */
+	VOID (*AsicAntennaDefaultReset)(
+				IN struct _RTMP_ADAPTER	*pAd,
+				IN EEPROM_ANTENNA_STRUC	*pAntenna);
+
+	VOID (*SetRxAnt)(
+				IN struct _RTMP_ADAPTER	*pAd,
+				IN UCHAR			Ant);
+
+	VOID (*HwAntEnable)(
+				IN struct _RTMP_ADAPTER *pAd);
+
+	/* EEPROM */
+	VOID (*NICInitAsicFromEEPROM)(IN struct _RTMP_ADAPTER *pAd);
+
+	/* Vendor Specific */
+	VOID (*VdrTuning1)(IN struct _RTMP_ADAPTER *pAd);
+
+	/* Frequence Calibration */
+	VOID (*AsicFreqCalInit)(IN struct _RTMP_ADAPTER *pAd);
+	VOID (*AsicFreqCalStop)(IN struct _RTMP_ADAPTER *pAd);
+	VOID (*AsicFreqCal)(IN struct _RTMP_ADAPTER *pAd);
+	CHAR (*AsicFreqOffsetGet)(
+				IN struct _RTMP_ADAPTER	*pAd,
+				IN struct _RXWI_STRUC	*pRxWI);
+
+	VOID (*AsicVCOCalibration)(IN struct _RTMP_ADAPTER *pAd);
+
+	/* Others */
+	VOID (*NetDevNickNameInit)(IN struct _RTMP_ADAPTER *pAd);
+
+	/* Others */
+	VOID (*ChipSpecific)(
+				IN struct _RTMP_ADAPTER	*pAd,
+				IN UINT32				StateId,
+				IN UINT32				FuncId,
+				IN VOID					*pData,
+				IN ULONG				Data);
+	VOID (*AsicResetBbpAgent)(IN struct _RTMP_ADAPTER *pAd);
+};
+
+#define RTMP_CHIP_ENABLE_AP_MIMOPS(__pAd, __ReduceCorePower)				\
+		if (__pAd->chipOps.EnableAPMIMOPS != NULL)							\
+			__pAd->chipOps.EnableAPMIMOPS(__pAd, __ReduceCorePower)
+
+#define RTMP_CHIP_DISABLE_AP_MIMOPS(__pAd)									\
+		if (__pAd->chipOps.DisableAPMIMOPS != NULL)							\
+			__pAd->chipOps.DisableAPMIMOPS(__pAd)
+
+#define RTMP_CHIP_RX_SENSITIVITY_TUNING(__pAd)								\
+		if (__pAd->chipOps.RxSensitivityTuning != NULL)						\
+			__pAd->chipOps.RxSensitivityTuning(__pAd)
+
+#define RTMP_VDR_TUNING1(__pAd)												\
+		if (__pAd->chipOps.VdrTuning1 != NULL)								\
+			__pAd->chipOps.VdrTuning1(__pAd)
+
+#define RTMP_CHIP_MSDU_TRANSMISSION_RESUME(__pAd)							\
+		if (__pAd->chipOps.ChipResumeMsduTransmission != NULL)				\
+			__pAd->chipOps.ChipResumeMsduTransmission(__pAd)
+
+#define RTMP_CHIP_ASIC_BBP_ADJUST(__pAd)									\
+		if (__pAd->chipOps.ChipBBPAdjust != NULL)							\
+			__pAd->chipOps.ChipBBPAdjust(__pAd)
+
+#define RTMP_CHIP_ASIC_STA_BBP_ADJUST(__pAd, __Rssi, __R66)					\
+		if (__pAd->chipOps.ChipStaBBPAdjust != NULL)						\
+			__R66 = __pAd->chipOps.ChipStaBBPAdjust(__pAd, __Rssi, __R66)
+
+#define RTMP_CHIP_ASIC_SWITCH_CHANNEL(__pAd, __Channel, __bScan)			\
+		if (__pAd->chipOps.ChipSwitchChannel != NULL)						\
+			__pAd->chipOps.ChipSwitchChannel(__pAd, __Channel, __bScan);	\
+		else																\
+			DBGPRINT(RT_DEBUG_ERROR, ("No switch channel function!!!\n"))
+
+#define RTMP_CHIP_ASIC_TSSI_TABLE_INIT(__pAd)								\
+		if (__pAd->chipOps.InitDesiredTSSITable != NULL)					\
+			__pAd->chipOps.InitDesiredTSSITable(__pAd)
+
+#define RTMP_CHIP_ATE_TSSI_CALIBRATION(__pAd, __pData)					\
+		if (__pAd->chipOps.ATETssiCalibration != NULL)					\
+			__pAd->chipOps.ATETssiCalibration(__pAd, __pData)
+
+#define RTMP_CHIP_ATE_TSSI_CALIBRATION_EXTEND(__pAd, __pData)			\
+		if (__pAd->chipOps.ATETssiCalibrationExtend != NULL)				\
+			__pAd->chipOps.ATETssiCalibrationExtend(__pAd, __pData)	
+
+#define RTMP_CHIP_ATE_READ_EXTERNAL_TSSI(__pAd, __pData)					\
+		if (__pAd->chipOps.ATEReadExternalTSSI != NULL)					\
+			__pAd->chipOps.ATEReadExternalTSSI(__pAd, __pData)	
+
+#define RTMP_CHIP_ASIC_AUTO_AGC_OFFSET_GET(									\
+		__pAd, __pDeltaPwr, __pTotalDeltaPwr, __pAgcCompensate, __pBbpR49)	\
+		if (__pAd->chipOps.AsicTxAlcGetAutoAgcOffset != NULL)				\
+			__pAd->chipOps.AsicTxAlcGetAutoAgcOffset(						\
+		__pAd, __pDeltaPwr, __pTotalDeltaPwr, __pAgcCompensate, __pBbpR49)
+
+#define RTMP_CHIP_ASIC_AGC_INIT_VALUE_SET(__pAd, __Bandwidth)				\
+		if (__pAd->chipOps.RTMPSetAGCInitValue != NULL)						\
+			__pAd->chipOps.RTMPSetAGCInitValue(__pAd, __Bandwidth)
+
+#define RTMP_CHIP_ASIC_FREQ_CAL_INIT(__pAd)									\
+		if (__pAd->chipOps.AsicFreqCalInit != NULL)							\
+			__pAd->chipOps.AsicFreqCalInit(__pAd)
+
+#define RTMP_CHIP_ASIC_FREQ_CAL_STOP(__pAd)									\
+		if (__pAd->chipOps.AsicFreqCalStop != NULL)							\
+			__pAd->chipOps.AsicFreqCalStop(__pAd)
+
+#define RTMP_CHIP_ASIC_FREQ_CAL(__pAd)										\
+		if (__pAd->chipOps.AsicFreqCal != NULL)								\
+			 __pAd->chipOps.AsicFreqCal(__pAd)
+
+#define RTMP_CHIP_ASIC_FREQ_OFFSET_GET(__pAd, __pRxWI, __Offset)			\
+		if (__pAd->chipOps.AsicFreqOffsetGet != NULL)						\
+			__Offset = __pAd->chipOps.AsicFreqOffsetGet(__pAd, __pRxWI)
+
+#define RTMP_CHIP_ASIC_VCO_CAL(__pAd)										\
+		if (__pAd->chipOps.AsicVCOCalibration != NULL)						\
+			__pAd->chipOps.AsicVCOCalibration(__pAd)
+
+#define RTMP_CHIP_ANTENNA_INFO_DEFAULT_RESET(__pAd, __pAntenna)				\
+		if (__pAd->chipOps.AsicAntennaDefaultReset != NULL)					\
+			__pAd->chipOps.AsicAntennaDefaultReset(__pAd, __pAntenna)
+
+#define RTMP_NET_DEV_NICKNAME_INIT(__pAd)									\
+		if (__pAd->chipOps.NetDevNickNameInit != NULL)						\
+			__pAd->chipOps.NetDevNickNameInit(__pAd)
+
+#define RTMP_EEPROM_ASIC_INIT(__pAd)										\
+		if (__pAd->chipOps.NICInitAsicFromEEPROM != NULL)					\
+			__pAd->chipOps.NICInitAsicFromEEPROM(__pAd)
+
+#define RTMP_CHIP_SPECIFIC(__pAd, __StateId, __FuncId, __pData, __Data)		\
+		if (__pAd->chipOps.ChipSpecific != NULL)							\
+			__pAd->chipOps.ChipSpecific(__pAd, __StateId, __FuncId, __pData, __Data)
+
+#define RTMP_CHIP_ASIC_RESET_BBP_AGENT(									\
+		__pAd)	\
+		if (__pAd->chipOps.AsicResetBbpAgent != NULL)				\
+			__pAd->chipOps.AsicResetBbpAgent(						\
+		__pAd)
+
+/*
+	Used in RTMP_CHIP_SPECIFIC(), FuncId
+
+	Note: These definitions only can be used "once".
+
+	EX: You can not use RTMP_CHIP_SPEC_WLAN_MODE_CHANGE in a() and b().
+	If you want to use RTMP_CHIP_SPEC_WLAN_MODE_CHANGE in b(), you need to
+	create another function name. Or for chip1, RTMP_CHIP_SPEC_WLAN_MODE_CHANGE
+	can be used in a() and b() but for chip2, RTMP_CHIP_SPEC_WLAN_MODE_CHANGE
+	can only be used in a(). It will be confused for different chips.
+*/
+/* RT305x */
+#define RTMP_CHIP_SPEC_STATE_WMODE_CMD							0x00000001
+#define RTMP_CHIP_SPEC_WLAN_MODE_CHANGE							0x00000001
+
+#define RTMP_CHIP_SPEC_STATE_INIT								0x00000002
+#define RTMP_CHIP_SPEC_INITIALIZATION							0x00000001
+
+#define RTMP_CHIP_SEPC_STATE_HT_SET								0x00000003
+#define RTMP_CHIP_SPEC_HT_MODE_CHANGE							0x00000001
+
+#define RTMP_CHIP_SPEC_STATE_AP_PERIODIC						0x00000004
+#define RTMP_CHIP_SPEC_HIGH_POWER_PATCH_AP						0x00000001
+
+#define RTMP_CHIP_SPEC_STATE_STA_PERIODIC						0x00000005
+#define RTMP_CHIP_SPEC_HIGH_POWER_PATCH_STA						0x00000001
+
+/* function prototype */
+VOID RtmpChipOpsHook(
+	IN VOID *pCB);
+
+VOID RtmpChipBcnSpecInit(
+	IN struct _RTMP_ADAPTER *pAd);
+
+VOID AsicGetTxPowerOffset(
+	IN struct _RTMP_ADAPTER		*pAd,
+	IN PULONG					TxPwr);
+
+VOID HWAntennaDiversityEnable(
+	IN struct _RTMP_ADAPTER     *pAd);
+
+/* global variable */
+extern FREQUENCY_ITEM RtmpFreqItems3020[];
+extern FREQUENCY_ITEM FreqItems3020_Xtal20M[];
+extern UCHAR NUM_OF_3020_CHNL;
+extern FREQUENCY_ITEM *FreqItems3020;
+extern RTMP_RF_REGS RF2850RegTable[];
+extern UCHAR NUM_OF_2850_CHNL;
+
+#endif /* __RTMP_CHIP_H__ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rtmp_cmd.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rtmp_cmd.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rtmp_cmd.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rtmp_cmd.h	2017-09-23 03:42:49.798675736 +0800
@@ -0,0 +1,738 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RTMP_CMD_H__
+#define __RTMP_CMD_H__
+
+#include "rtmp_type.h"
+
+typedef struct _CmdQElmt {
+	UINT command;
+	PVOID buffer;
+	ULONG bufferlength;
+	BOOLEAN CmdFromNdis;
+	BOOLEAN SetOperation;
+	struct _CmdQElmt *next;
+} CmdQElmt, *PCmdQElmt;
+
+typedef struct _CmdQ {
+	UINT size;
+	CmdQElmt *head;
+	CmdQElmt *tail;
+	UINT32 CmdQState;
+} CmdQ, *PCmdQ;
+
+#define EnqueueCmd(cmdq, cmdqelmt)		\
+{										\
+	if (cmdq->size == 0)				\
+		cmdq->head = cmdqelmt;			\
+	else								\
+		cmdq->tail->next = cmdqelmt;	\
+	cmdq->tail = cmdqelmt;				\
+	cmdqelmt->next = NULL;				\
+	cmdq->size++;						\
+}
+
+#define NDIS_OID	UINT
+
+/* OS_RTCMDUp is only used in UTIL/NETIF module */
+#define OS_RTCMDUp						RtmpOsCmdUp
+
+
+
+/* RALINK command status code */
+#define RTMP_IO_EINVAL							30000
+#define RTMP_IO_EOPNOTSUPP						30001
+#define RTMP_IO_EFAULT							30002
+#define RTMP_IO_ENETDOWN						30003
+#define RTMP_IO_E2BIG							30004
+#define RTMP_IO_ENOMEM							30005
+#define RTMP_IO_EAGAIN							30006
+#define RTMP_IO_ENOTCONN						30007
+
+enum {
+	SHOW_CONN_STATUS = 4,
+	SHOW_DRVIER_VERION = 5,
+	SHOW_BA_INFO = 6,
+	SHOW_DESC_INFO = 7,
+#ifdef RTMP_MAC_USB
+	SHOW_RXBULK_INFO = 8,
+	SHOW_TXBULK_INFO = 9,
+#endif /* RTMP_MAC_USB */
+	RAIO_OFF = 10,
+	RAIO_ON = 11,
+#ifdef QOS_DLS_SUPPORT
+	SHOW_DLS_ENTRY_INFO = 20,
+#endif /* QOS_DLS_SUPPORT */
+	SHOW_CFG_VALUE = 21,
+	SHOW_ADHOC_ENTRY_INFO = 22,
+};
+
+#ifdef CONFIG_STA_SUPPORT
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+#ifndef NATIVE_WPA_SUPPLICANT_SUPPORT
+#define	RT_ASSOC_EVENT_FLAG                         0x0101
+#define	RT_DISASSOC_EVENT_FLAG                      0x0102
+#define	RT_REQIE_EVENT_FLAG                         0x0103
+#define	RT_RESPIE_EVENT_FLAG                        0x0104
+#define	RT_ASSOCINFO_EVENT_FLAG                     0x0105
+#define RT_PMKIDCAND_FLAG                           0x0106
+#define RT_INTERFACE_DOWN                           0x0107
+#define RT_INTERFACE_UP                             0x0108
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+#endif /* WPA_SUPPLICANT_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+
+/* RALINK command handle ID */
+/* ap commands */
+typedef enum _CMD_RTPRIV_IOCTL_AP {
+
+	/* general */
+	CMD_RTPRIV_IOCTL_SET_WSCOOB = 0x0001,
+	CMD_RTPRIV_IOCTL_GET_MAC_TABLE,
+	CMD_RTPRIV_IOCTL_GSITESURVEY,
+	CMD_RTPRIV_IOCTL_STATISTICS,
+	CMD_RTPRIV_IOCTL_QUERY_BATABLE,
+	CMD_RTPRIV_IOCTL_E2P,
+	CMD_RTPRIV_IOCTL_BBP,
+	CMD_RTPRIV_IOCTL_MAC,
+	CMD_RTPRIV_IOCTL_RF,
+	CMD_RT_PRIV_IOCTL,
+	CMD_RTPRIV_IOCTL_SET,
+	CMD_RTPRIV_IOCTL_SHOW,
+	CMD_RTPRIV_IOCTL_GET_AR9_SHOW,
+	CMD_RTPRIV_IOCTL_ATE,
+	CMD_RTPRIV_IOCTL_CHID_2_FREQ,
+	CMD_RTPRIV_IOCTL_FREQ_2_CHID,
+	CMD_RTPRIV_IOCTL_GET_MAC_TABLE_STRUCT,
+
+	/* mbss */
+	CMD_RTPRIV_IOCTL_MBSS_BEACON_UPDATE,
+	CMD_RTPRIV_IOCTL_MBSS_OPEN,
+	CMD_RTPRIV_IOCTL_MBSS_CLOSE,
+	CMD_RTPRIV_IOCTL_MBSS_INIT,
+	CMD_RTPRIV_IOCTL_MBSS_REMOVE,
+
+	/* wsc */
+	CMD_RTPRIV_IOCTL_WSC_PROFILE,
+	CMD_RTPRIV_IOCTL_WSC_INIT,
+
+	/* apc */
+	CMD_RTPRIV_IOCTL_APC_UP,
+	CMD_RTPRIV_IOCTL_APC_DISCONNECT,
+	CMD_RTPRIV_IOCTL_APC_INIT,
+	CMD_RTPRIV_IOCTL_APC_OPEN,
+	CMD_RTPRIV_IOCTL_APC_CLOSE,
+	CMD_RTPRIV_IOCTL_APC_REMOVE,
+
+	/* interface */
+	CMD_RTPRIV_IOCTL_MAIN_OPEN,
+
+	/* ioctl */
+	CMD_RTPRIV_IOCTL_PREPARE,
+	CMD_RTPRIV_IOCTL_AP_SIOCGIWAP,
+	CMD_RTPRIV_IOCTL_AP_SIOCGIFHWADDR,
+	CMD_RTPRIV_IOCTL_AP_SIOCGIWESSID,
+	CMD_RTPRIV_IOCTL_AP_SIOCGIWRATEQ,
+	CMD_RTPRIV_IOCTL_AP_SIOCSIWGENIE,
+
+	/* can not exceed 0x5000 */
+} CMD_RTPRIV_IOCTL_AP;
+
+/* common commands */
+typedef enum _CMD_RTPRIV_IOCTL_COMMON {
+
+	/* general */
+	CMD_RTPRIV_IOCTL_NETDEV_GET = 0x5000,
+	CMD_RTPRIV_IOCTL_NETDEV_SET,
+	CMD_RTPRIV_IOCTL_OPMODE_GET,
+	CMD_RTPRIV_IOCTL_TASK_LIST_GET,
+	CMD_RTPRIV_IOCTL_IRQ_INIT,
+	CMD_RTPRIV_IOCTL_IRQ_RELEASE,
+	CMD_RTPRIV_IOCTL_MSI_ENABLE,
+	CMD_RTPRIV_IOCTL_NIC_NOT_EXIST,
+#ifdef CONFIG_APSTA_MIXED_SUPPORT
+	CMD_RTPRIV_IOCTL_MAX_IN_BIT,
+#endif /* CONFIG_APSTA_MIXED_SUPPORT */
+#ifdef CONFIG_STA_SUPPORT
+#ifdef CONFIG_PM
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND
+	CMD_RTPRIV_IOCTL_USB_DEV_GET,
+	CMD_RTPRIV_IOCTL_USB_INTF_GET,
+	CMD_RTPRIV_IOCTL_ADAPTER_SUSPEND_SET,
+	CMD_RTPRIV_IOCTL_ADAPTER_SUSPEND_CLEAR,
+	CMD_RTPRIV_IOCTL_ADAPTER_SUSPEND_TEST,
+	CMD_RTPRIV_IOCTL_ADAPTER_CPU_SUSPEND_SET,
+	CMD_RTPRIV_IOCTL_ADAPTER_CPU_SUSPEND_CLEAR,
+	CMD_RTPRIV_IOCTL_ADAPTER_CPU_SUSPEND_TEST,
+	CMD_RTPRIV_IOCTL_ADAPTER_IDLE_RADIO_OFF_TEST,
+	CMD_RTPRIV_IOCTL_ADAPTER_RT28XX_USB_ASICRADIO_OFF,
+	CMD_RTPRIV_IOCTL_ADAPTER_RT28XX_USB_ASICRADIO_ON,
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */
+#endif /* CONFIG_PM */
+	CMD_RTPRIV_IOCTL_AP_BSSID_GET,
+#endif /* CONFIG_STA_SUPPORT */
+	CMD_RTPRIV_IOCTL_SANITY_CHECK,
+
+	/* mesh */
+	CMD_RTPRIV_IOCTL_MESH_INIT,
+	CMD_RTPRIV_IOCTL_MESH_REMOVE,
+	CMD_RTPRIV_IOCTL_MESH_OPEN_PRE,
+	CMD_RTPRIV_IOCTL_MESH_OPEN_POST,
+	CMD_RTPRIV_IOCTL_MESH_IS_VALID,
+	CMD_RTPRIV_IOCTL_MESH_CLOSE,
+
+	/* p2p */
+	CMD_RTPRIV_IOCTL_P2P_INIT,
+	CMD_RTPRIV_IOCTL_P2P_REMOVE,
+	CMD_RTPRIV_IOCTL_P2P_OPEN_PRE,
+	CMD_RTPRIV_IOCTL_P2P_OPEN_POST,
+	CMD_RTPRIV_IOCTL_P2P_IS_VALID,
+	CMD_RTPRIV_IOCTL_P2P_CLOSE,
+
+	/* usb */
+	CMD_RTPRIV_IOCTL_USB_MORE_FLAG_SET,
+	CMD_RTPRIV_IOCTL_USB_CONFIG_INIT,
+	CMD_RTPRIV_IOCTL_USB_SUSPEND,
+	CMD_RTPRIV_IOCTL_USB_RESUME,
+
+	/* pci */
+	CMD_RTPRIV_IOCTL_PCI_SUSPEND,
+	CMD_RTPRIV_IOCTL_PCI_RESUME,
+	CMD_RTPRIV_IOCTL_PCI_CSR_SET,
+	CMD_RTPRIV_IOCTL_PCIE_INIT,
+
+	/* cfg80211 */
+	CMD_RTPRIV_IOCTL_CFG80211_CFG_START,
+
+	/* inf ppa */
+	CMD_RTPRIV_IOCTL_INF_PPA_INIT,
+	CMD_RTPRIV_IOCTL_INF_PPA_EXIT,
+
+	/* wireless */
+	CMD_RTPRIV_IOCTL_BEACON_UPDATE,
+	CMD_RTPRIV_IOCTL_RXPATH_GET,
+	CMD_RTPRIV_IOCTL_CHAN_LIST_NUM_GET,
+	CMD_RTPRIV_IOCTL_CHAN_LIST_GET,
+	CMD_RTPRIV_IOCTL_FREQ_LIST_GET,
+
+	/* interface */
+	CMD_RTPRIV_IOCTL_VIRTUAL_INF_UP,
+	CMD_RTPRIV_IOCTL_VIRTUAL_INF_DOWN,
+	CMD_RTPRIV_IOCTL_VIRTUAL_INF_GET,
+	CMD_RTPRIV_IOCTL_INF_TYPE_GET,
+	CMD_RTPRIV_IOCTL_INF_STATS_GET,
+	CMD_RTPRIV_IOCTL_INF_IW_STATUS_GET,
+	CMD_RTPRIV_IOCTL_INF_MAIN_CREATE,
+	CMD_RTPRIV_IOCTL_INF_MAIN_ID_GET,
+	CMD_RTPRIV_IOCTL_INF_MAIN_CHECK,
+	CMD_RTPRIV_IOCTL_INF_P2P_CHECK,
+
+	/* ioctl */
+	CMD_RTPRIV_IOCTL_SIOCGIWFREQ,
+	CMD_RTPRIV_IOCTL_SIOCGIWNAME,
+
+	/* wds */
+	CMD_RTPRIV_IOCTL_WDS_INIT,
+	CMD_RTPRIV_IOCTL_WDS_REMOVE,
+	CMD_RTPRIV_IOCTL_WDS_STATS_GET,
+
+	CMD_RTPRIV_IOCTL_MAC_ADDR_GET,
+
+#ifdef RT_CFG80211_SUPPORT
+	/* cfg802.11 */
+	CMD_RTPRIV_IOCTL_80211_CB_GET,
+	CMD_RTPRIV_IOCTL_80211_CB_SET,
+	CMD_RTPRIV_IOCTL_80211_CHAN_SET,
+	CMD_RTPRIV_IOCTL_80211_VIF_CHG,
+	CMD_RTPRIV_IOCTL_80211_SCAN,
+	CMD_RTPRIV_IOCTL_80211_IBSS_JOIN,
+	CMD_RTPRIV_IOCTL_80211_STA_LEAVE,
+	CMD_RTPRIV_IOCTL_80211_STA_GET,
+	CMD_RTPRIV_IOCTL_80211_KEY_ADD,
+	CMD_RTPRIV_IOCTL_80211_KEY_DEFAULT_SET,
+	CMD_RTPRIV_IOCTL_80211_CONNECT_TO,
+	CMD_RTPRIV_IOCTL_80211_RFKILL,
+	CMD_RTPRIV_IOCTL_80211_REG_NOTIFY_TO,
+	CMD_RTPRIV_IOCTL_80211_UNREGISTER,
+	CMD_RTPRIV_IOCTL_80211_BANDINFO_GET,
+#endif /* RT_CFG80211_SUPPORT */
+
+	/* can not exceed 0xa000 */
+} CMD_RTPRIV_IOCTL_COMMON;
+
+#ifdef RT_CFG80211_SUPPORT
+typedef struct __CMD_RTPRIV_IOCTL_80211_CHAN {
+
+	UINT8 ChanId;
+
+#define RT_CMD_80211_IFTYPE_STATION		0x00
+#define RT_CMD_80211_IFTYPE_ADHOC		0x01
+#define RT_CMD_80211_IFTYPE_MONITOR		0x02
+	UINT8 IfType;
+
+#define RT_CMD_80211_CHANTYPE_NOHT		0x00
+#define RT_CMD_80211_CHANTYPE_HT20		0x01
+#define RT_CMD_80211_CHANTYPE_HT40MINUS	0X02
+#define RT_CMD_80211_CHANTYPE_HT40PLUS	0X03
+	UINT8 ChanType;
+
+	UINT32 MonFilterFlag;
+} CMD_RTPRIV_IOCTL_80211_CHAN;
+
+#define RT_CMD_80211_FILTER_FCSFAIL		0x01
+#define RT_CMD_80211_FILTER_PLCPFAIL	0x02
+#define RT_CMD_80211_FILTER_CONTROL		0x04
+#define RT_CMD_80211_FILTER_OTHER_BSS	0x08
+
+typedef struct __CMD_RTPRIV_IOCTL_80211_IBSS {
+
+	UINT32 BeaconInterval;
+	UCHAR *pSsid;
+} CMD_RTPRIV_IOCTL_80211_IBSS;
+
+typedef struct __CMD_RTPRIV_IOCTL_80211_STA {
+
+	UINT8 MAC[6];
+	ULONG DataRate;
+
+#define RT_CMD_80211_TXRATE_LEGACY		0x01
+#define RT_CMD_80211_TXRATE_BW_40		0x02
+#define RT_CMD_80211_TXRATE_SHORT_GI	0x04
+	UINT32 TxRateFlags;
+	
+	UINT32 TxRateMCS;
+	INT32 Signal;
+	UINT32 TxPacketCnt;
+	UINT32 InactiveTime;
+} CMD_RTPRIV_IOCTL_80211_STA;
+
+typedef struct __CMD_RTPRIV_IOCTL_80211_KEY {
+
+#define RT_CMD_80211_KEY_WEP			0x00
+#define RT_CMD_80211_KEY_WPA			0x01
+	UINT8 KeyType;
+	UINT8 KeyBuf[50];
+	UINT8 KeyId;
+} CMD_RTPRIV_IOCTL_80211_KEY;
+
+typedef struct __CMD_RTPRIV_IOCTL_80211_CONNECT {
+
+	UINT8 WpaVer;
+	BOOLEAN FlgIs8021x;
+	BOOLEAN FlgIsAuthOpen;
+
+#define RT_CMD_80211_CONN_ENCRYPT_NONE	0x01
+#define RT_CMD_80211_CONN_ENCRYPT_WEP	0x02
+#define RT_CMD_80211_CONN_ENCRYPT_TKIP	0x04
+#define RT_CMD_80211_CONN_ENCRYPT_CCMP	0x08
+	UINT8 PairwiseEncrypType;
+	UINT8 GroupwiseEncrypType;
+
+	UINT8 *pKey;
+	UINT32 KeyLen;
+	UINT8 KeyIdx;
+
+	UINT8 *pSsid;
+	UINT32 SsidLen;
+} CMD_RTPRIV_IOCTL_80211_CONNECT;
+
+typedef struct __CMD_RTPRIV_IOCTL_80211_REG_NOTIFY {
+
+	UCHAR Alpha2[2];
+	VOID *pWiphy;
+} CMD_RTPRIV_IOCTL_80211_REG_NOTIFY;
+#endif /* RT_CFG80211_SUPPORT */
+
+/* station commands */
+#ifdef CONFIG_STA_SUPPORT
+typedef enum _CMD_RTPRIV_IOCTL_STATION {
+
+	/* general */
+	CMD_RTPRIV_IOCTL_PARAM_SET = 0xa000,
+	CMD_RTPRIV_IOCTL_SITESURVEY_GET,
+	CMD_RTPRIV_IOCTL_SITESURVEY,
+	CMD_RTPRIV_IOCTL_ORI_DEV_TYPE_SET,
+	CMD_RTPRIV_IOCTL_STA_SCAN_SANITY_CHECK,
+	CMD_RTPRIV_IOCTL_STA_SCAN_END,
+
+	/* wireless */
+	CMD_RTPRIV_IOCTL_BSS_LIST_GET,
+
+	/* standard ioctl */
+	CMD_RTPRIV_IOCTL_STA_SIOCSIWFREQ,
+	CMD_RTPRIV_IOCTL_STA_SIOCGIWFREQ,
+	CMD_RTPRIV_IOCTL_STA_SIOCSIWMODE,
+	CMD_RTPRIV_IOCTL_STA_SIOCGIWMODE,
+	CMD_RTPRIV_IOCTL_STA_SIOCSIWAP,
+	CMD_RTPRIV_IOCTL_STA_SIOCGIWAP,
+	CMD_RTPRIV_IOCTL_STA_SIOCSIWSCAN,
+	CMD_RTPRIV_IOCTL_STA_SIOCGIWSCAN,
+	CMD_RTPRIV_IOCTL_STA_SIOCSIWESSID,
+	CMD_RTPRIV_IOCTL_STA_SIOCGIWESSID,
+	CMD_RTPRIV_IOCTL_STA_SIOCSIWNICKN,
+	CMD_RTPRIV_IOCTL_STA_SIOCGIWNICKN,
+	CMD_RTPRIV_IOCTL_STA_SIOCSIWRTS,
+	CMD_RTPRIV_IOCTL_STA_SIOCGIWRTS,
+	CMD_RTPRIV_IOCTL_STA_SIOCSIWFRAG,
+	CMD_RTPRIV_IOCTL_STA_SIOCGIWFRAG,
+	CMD_RTPRIV_IOCTL_STA_SIOCSIWENCODE,
+	CMD_RTPRIV_IOCTL_STA_SIOCGIWENCODE,
+	CMD_RTPRIV_IOCTL_STA_SIOCSIWMLME,
+	CMD_RTPRIV_IOCTL_STA_SIOCSIWAUTH,
+	CMD_RTPRIV_IOCTL_STA_SIOCGIWAUTH,
+	CMD_RTPRIV_IOCTL_STA_SIOCSIWENCODEEXT,
+	CMD_RTPRIV_IOCTL_STA_SIOCGIWENCODEEXT,
+	CMD_RTPRIV_IOCTL_STA_SIOCSIWGENIE,
+	CMD_RTPRIV_IOCTL_STA_SIOCGIWGENIE,
+	CMD_RTPRIV_IOCTL_STA_SIOCSIWPMKSA,
+	CMD_RTPRIV_IOCTL_STA_SIOCSIWRATE,
+	CMD_RTPRIV_IOCTL_STA_SIOCGIWRATE,
+	CMD_RTPRIV_IOCTL_STA_SIOCGIFHWADDR,
+
+	CMD_RTPRIV_IOCTL_STA_IW_SET_WSC_U32_ITEM,
+	CMD_RTPRIV_IOCTL_STA_IW_SET_WSC_STR_ITEM,
+	CMD_RTPRIV_IOCTL_STA_IW_GET_STATISTICS,
+} CMD_RTPRIV_IOCTL_STATION;
+
+#define RT_CMD_MODE_ADHOC								0x01
+#define RT_CMD_MODE_INFRA								0x02
+#define RT_CMD_MODE_MONITOR								0x03
+#endif /* CONFIG_STA_SUPPORT */
+
+/* when adding any new type, please also add codes in LINUX_WEVENT_TRANSLATE */
+#define RT_WLAN_EVENT_CUSTOM							0x01
+#define RT_WLAN_EVENT_CGIWAP							0x02
+#define RT_WLAN_EVENT_ASSOC_REQ_IE						0x03
+#define RT_WLAN_EVENT_SCAN								0x04
+#define RT_WLAN_EVENT_EXPIRED							0x05
+#define RT_WLAN_EVENT_SHOWPIN							0x06
+#define RT_WLAN_EVENT_PIN							0x07
+
+typedef struct __RT_CMD_RATE_SET {
+	IN UINT32 Rate;
+	IN UINT32 Fixed;
+} RT_CMD_RATE_SET;
+
+typedef struct __RT_CMD_PARAM_SET {
+	IN PSTRING pThisChar;
+	IN PSTRING pValue;
+} RT_CMD_PARAM_SET;
+
+typedef struct __RT_CMD_SHARED_KEY_ADD {
+	IN UCHAR KeyIdx;
+	IN BOOLEAN FlgHaveGTK;
+} RT_CMD_SHARED_KEY_ADD;
+
+typedef struct __RT_CMD_MBSS_KICKOUT {
+	IN INT BssId;
+	IN USHORT Reason;
+} RT_CMD_MBSS_KICKOUT;
+
+typedef struct __RT_CMD_USB_MORE_FLAG_CONFIG {
+	IN UINT32 VendorID;
+	IN UINT32 ProductID;
+} RT_CMD_USB_MORE_FLAG_CONFIG;
+
+typedef struct __RT_CMD_USB_DEV_CONFIG {
+	IN UINT NumberOfPipes;
+	IN UINT BulkInEpAddr;
+	IN USHORT BulkInMaxPacketSize;
+	IN UINT BulkOutEpAddr[6];
+	IN USHORT BulkOutMaxPacketSize;
+	IN VOID *pConfig;
+} RT_CMD_USB_DEV_CONFIG;
+
+typedef struct __RT_CMD_CFG80211_CONFIG {
+	IN VOID *pCfgDev;
+	IN VOID(
+	*CFG80211_Register) (
+	IN VOID * pAd,
+	IN VOID * pDev,
+	IN VOID * pNetDev);
+} RT_CMD_CFG80211_CONFIG;
+
+typedef struct __RT_CMD_WAIT_QUEUE_LIST {
+	OUT RTMP_OS_TASK *pMlmeTask;
+	OUT RTMP_OS_TASK *pTimerTask;
+	OUT RTMP_OS_TASK *pCmdQTask;
+	OUT RTMP_OS_TASK *pWscTask;
+} RT_CMD_WAIT_QUEUE_LIST;
+
+typedef struct __RT_CMD_INF_UP_DOWN {
+
+	IN	int (*rt28xx_open)(VOID *net_dev);
+	IN	int (*rt28xx_close)(VOID *net_dev);
+} RT_CMD_INF_UP_DOWN;
+
+typedef struct __RT_CMD_STATS {
+	IN VOID *pNetDev;
+	OUT VOID *pStats;	/* point to pAd->stats */
+
+	OUT unsigned long rx_packets;	/* total packets received       */
+	OUT unsigned long tx_packets;	/* total packets transmitted */
+	OUT unsigned long rx_bytes;	/* total bytes received         */
+	OUT unsigned long tx_bytes;	/* total bytes transmitted      */
+	OUT unsigned long rx_errors;	/* bad packets received         */
+	OUT unsigned long tx_errors;	/* packet transmit problems     */
+	OUT unsigned long multicast;	/* multicast packets received */
+	OUT unsigned long collisions;
+
+	OUT unsigned long rx_over_errors;	/* receiver ring buff overflow  */
+	OUT unsigned long rx_crc_errors;	/* recved pkt with crc error    */
+	OUT unsigned long rx_frame_errors;	/* recv'd frame alignment error */
+	OUT unsigned long rx_fifo_errors;	/* recv'r fifo overrun                  */
+} RT_CMD_STATS;
+
+typedef struct __RT_CMD_IW_STATS {
+
+	ULONG priv_flags;
+	UCHAR *dev_addr;
+
+	VOID *pStats;		/* point to pAd->iw_stats */
+
+	UINT8 qual;
+	UINT8 level;
+	UINT8 noise;
+	UINT8 updated;
+} RT_CMD_IW_STATS;
+
+typedef struct __RT_CMD_PCIE_INIT {
+
+	IN VOID *pPciDev;
+	IN UINT32 ConfigDeviceID;
+	IN UINT32 ConfigSubsystemVendorID;
+	IN UINT32 ConfigSubsystemID;
+} RT_CMD_PCIE_INIT;
+
+typedef struct __RT_CMD_AP_IOCTL_CONFIG {
+	IN VOID *net_dev;
+	IN ULONG priv_flags;
+	IN char *pCmdData;
+	IN INT32 CmdId_RTPRIV_IOCTL_SET;
+	IN char *name;
+	IN INT apidx;
+
+	OUT INT32 Status;
+} RT_CMD_AP_IOCTL_CONFIG;
+
+typedef struct __RT_CMD_AP_IOCTL_SSID {
+	IN ULONG priv_flags;
+	IN INT apidx;
+
+	OUT char *pSsidStr;
+	OUT INT32 length;
+} RT_CMD_AP_IOCTL_SSID;
+
+typedef struct __RT_CMD_IOCTL_RATE {
+	IN ULONG priv_flags;
+	OUT UINT32 BitRate;
+} RT_CMD_IOCTL_RATE;
+
+#define RTMP_CMD_STA_MODE_AUTO			0x00
+#define RTMP_CMD_STA_MODE_ADHOC			0x01
+#define RTMP_CMD_STA_MODE_INFRA			0x02
+#define RTMP_CMD_STA_MODE_MONITOR		0x03
+
+typedef struct __RT_CMD_STA_IOCTL_FREQ {
+	IN INT32 m;		/* Mantissa */
+	IN INT16 e;		/* Exponent */
+} RT_CMD_STA_IOCTL_FREQ;
+
+typedef struct __RT_CMD_STA_IOCTL_BSS {
+	OUT UCHAR Bssid[6];
+	OUT UCHAR ChannelQuality;
+	OUT CHAR Rssi;
+	OUT CHAR Noise;
+} RT_CMD_STA_IOCTL_BSS;
+
+typedef struct __RT_CMD_STA_IOCTL_BSS_LIST {
+	IN UINT32 MaxNum;
+	OUT UINT32 BssNum;
+	OUT RT_CMD_STA_IOCTL_BSS *pList;
+} RT_CMD_STA_IOCTL_BSS_LIST;
+
+typedef struct __RT_CMD_STA_IOCTL_SCAN {
+	IN UCHAR FlgScanThisSsid;
+	IN UINT32 SsidLen;
+	IN CHAR *pSsid;
+	OUT INT32 Status;
+} RT_CMD_STA_IOCTL_SCAN;
+
+typedef struct __RT_CMD_STA_IOCTL_BSS_TABLE {
+	OUT UCHAR Bssid[6];
+	OUT UCHAR Channel;
+	OUT UCHAR BssType;
+	OUT UCHAR HtCapabilityLen;
+
+	OUT UCHAR SupRate[12];
+	OUT UCHAR SupRateLen;
+	OUT UCHAR ExtRate[12];
+	OUT UCHAR ExtRateLen;
+
+	OUT UCHAR SsidLen;
+	OUT CHAR Ssid[32];
+
+	OUT USHORT CapabilityInfo;
+	OUT UCHAR ChannelWidth, ShortGIfor40, ShortGIfor20, MCSSet;
+
+	OUT USHORT WpaIeLen;
+	OUT UCHAR *pWpaIe;
+
+	OUT USHORT RsnIeLen;
+	OUT UCHAR *pRsnIe;
+
+	OUT USHORT WpsIeLen;
+	OUT UCHAR *pWpsIe;
+
+	OUT UCHAR FlgIsPrivacyOn;
+
+	OUT RT_CMD_STA_IOCTL_BSS Signal;
+} RT_CMD_STA_IOCTL_BSS_TABLE;
+
+typedef struct __RT_CMD_STA_IOCTL_SCAN_TABLE {
+	IN ULONG priv_flags;
+	OUT UINT32 BssNr;
+	OUT RT_CMD_STA_IOCTL_BSS_TABLE *pBssTable;	/* must be freed by caller */
+	OUT UCHAR MainSharedKey[4][16];
+} RT_CMD_STA_IOCTL_SCAN_TABLE;
+
+typedef struct __RT_CMD_STA_IOCTL_SSID {
+	IN UCHAR FlgAnySsid;
+	INOUT UINT32 SsidLen;
+	INOUT CHAR *pSsid;
+	OUT INT32 Status;
+} RT_CMD_STA_IOCTL_SSID;
+
+typedef struct __RT_CMD_STA_IOCTL_NICK_NAME {
+	OUT UINT NameLen;
+	OUT CHAR *pName;
+} RT_CMD_STA_IOCTL_NICK_NAME;
+
+typedef struct __RT_CMD_STA_IOCTL_SECURITY {
+	INOUT CHAR *pData;
+	INOUT UINT16 length;
+	IN INT32 KeyIdx;
+	IN INT32 MaxKeyLen;
+
+#define RT_CMD_STA_IOCTL_SECURITY_ALG_NONE		0x01
+#define RT_CMD_STA_IOCTL_SECURITY_ALG_WEP		0x02
+#define RT_CMD_STA_IOCTL_SECURITY_ALG_TKIP		0x03
+#define RT_CMD_STA_IOCTL_SECURITY_ALG_CCMP		0x04
+	IN UINT32 Alg;
+
+#define RT_CMD_STA_IOCTL_SECURTIY_EXT_SET_TX_KEY	0x01
+#define RT_CMD_STA_IOCTL_SECURTIY_EXT_GROUP_KEY		0x02
+	IN UINT16 ext_flags;
+
+#define RT_CMD_STA_IOCTL_SECURITY_DISABLED		0x01
+#define RT_CMD_STA_IOCTL_SECURITY_ENABLED		0x02
+#define RT_CMD_STA_IOCTL_SECURITY_RESTRICTED	0x04
+#define RT_CMD_STA_IOCTL_SECURITY_OPEN			0x08
+#define RT_CMD_STA_IOCTL_SECURITY_NOKEY			0x10
+#define RT_CMD_STA_IOCTL_SECURITY_MODE			0x20
+	INOUT UINT16 flags;
+
+	OUT INT32 Status;
+} RT_CMD_STA_IOCTL_SECURITY;
+
+typedef struct __RT_CMD_STA_IOCTL_WSC_U32_ITEM {
+	IN UINT32 *pUWrq;
+	OUT INT32 Status;
+} RT_CMD_STA_IOCTL_WSC_U32_ITEM;
+
+typedef struct __RT_CMD_STA_IOCTL_WSC_STR_ITEM {
+	IN UINT32 Subcmd;
+	IN CHAR *pData;
+	IN UINT32 length;
+
+	OUT INT32 Status;
+} RT_CMD_STA_IOCTL_WSC_STR_ITEM;
+
+typedef struct __RT_CMD_STA_IOCTL_SHOW {
+	IN CHAR *pData;
+	IN UINT32 MaxSize;
+	IN UINT32 InfType;
+} RT_CMD_STA_IOCTL_SHOW;
+
+#define RT_CMD_STA_IOCTL_IW_MLME_DEAUTH		0x01
+#define RT_CMD_STA_IOCTL_IW_MLME_DISASSOC	0x02
+
+typedef struct __RT_CMD_STA_IOCTL_SECURITY_ADV {
+
+#define RT_CMD_STA_IOCTL_WPA_VERSION					0x10
+#define RT_CMD_STA_IOCTL_WPA_VERSION1				0x11
+#define RT_CMD_STA_IOCTL_WPA_VERSION2				0x12
+
+#define RT_CMD_STA_IOCTL_WPA_PAIRWISE					0x20
+#define RT_CMD_STA_IOCTL_WPA_PAIRWISE_NONE			0x21
+#define RT_CMD_STA_IOCTL_WPA_PAIRWISE_WEP40			0x22
+#define RT_CMD_STA_IOCTL_WPA_PAIRWISE_WEP104		0x23
+#define RT_CMD_STA_IOCTL_WPA_PAIRWISE_TKIP			0x24
+#define RT_CMD_STA_IOCTL_WPA_PAIRWISE_CCMP			0x25
+
+#define RT_CMD_STA_IOCTL_WPA_GROUP						0x30
+#define RT_CMD_STA_IOCTL_WPA_GROUP_NONE				0x31
+#define RT_CMD_STA_IOCTL_WPA_GROUP_WEP40			0x32
+#define RT_CMD_STA_IOCTL_WPA_GROUP_WEP104			0x33
+#define RT_CMD_STA_IOCTL_WPA_GROUP_TKIP				0x34
+#define RT_CMD_STA_IOCTL_WPA_GROUP_CCMP				0x35
+
+#define RT_CMD_STA_IOCTL_WPA_KEY_MGMT					0x40
+#define RT_CMD_STA_IOCTL_WPA_KEY_MGMT_1X			0x41
+#define RT_CMD_STA_IOCTL_WPA_KEY_MGMT_WPS			0x42
+
+#define RT_CMD_STA_IOCTL_WPA_AUTH_RX_UNENCRYPTED_EAPOL	0x50
+#define RT_CMD_STA_IOCTL_WPA_AUTH_PRIVACY_INVOKED		0x60
+#define RT_CMD_STA_IOCTL_WPA_AUTH_DROP_UNENCRYPTED		0x70
+
+#define RT_CMD_STA_IOCTL_WPA_AUTH_80211_AUTH_ALG		0x80
+#define RT_CMD_STA_IOCTL_WPA_AUTH_80211_AUTH_ALG_SHARED		0x81
+#define RT_CMD_STA_IOCTL_WPA_AUTH_80211_AUTH_ALG_OPEN		0x82
+#define RT_CMD_STA_IOCTL_WPA_AUTH_80211_AUTH_ALG_LEAP		0x83
+
+#define RT_CMD_STA_IOCTL_WPA_AUTH_WPA_ENABLED			0x90
+	IN UINT32 flags;
+	IN UINT32 value;
+} RT_CMD_STA_IOCTL_SECURITY_ADV;
+
+typedef struct __RT_CMD_STA_IOCTL_RSN_IE {
+	INOUT UINT32 length;
+	INOUT UCHAR *pRsnIe;
+} RT_CMD_STA_IOCTL_RSN_IE;
+
+typedef struct __RT_CMD_STA_IOCTL_PMA_SA {
+#define RT_CMD_STA_IOCTL_PMA_SA_FLUSH					0x01
+#define RT_CMD_STA_IOCTL_PMA_SA_REMOVE					0x02
+#define RT_CMD_STA_IOCTL_PMA_SA_ADD						0x03
+	IN UINT32 Cmd;
+	IN UCHAR *pBssid;
+	IN UCHAR *pPmkid;
+} RT_CMD_STA_IOCTL_PMA_SA;
+
+#endif /* __RTMP_CMD_H__ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rtmp_comm.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rtmp_comm.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rtmp_comm.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rtmp_comm.h	2017-09-23 03:42:49.802675724 +0800
@@ -0,0 +1,466 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RT_COMM_H__
+#define __RT_COMM_H__
+    
+#define VENDOR_FEATURE1_SUPPORT
+/*#define VENDOR_FEATURE3_SUPPORT */
+    
+    
+/*#define MONITOR_FLAG_11N_SNIFFER_SUPPORT */
+    
+#ifdef CONFIG_STA_SUPPORT
+/*#define AGS_SUPPORT */
+#endif	/* CONFIG_STA_SUPPORT */
+    
+#ifdef VENDOR_FEATURE3_SUPPORT 
+#ifdef DOT1X_SUPPORT
+#undef DOT1X_SUPPORT
+#endif	/* DOT1X_SUPPORT */
+#ifdef SYSTEM_LOG_SUPPORT
+#undef SYSTEM_LOG_SUPPORT
+#endif	/* SYSTEM_LOG_SUPPORT */
+#ifdef LED_CONTROL_SUPPORT
+#undef LED_CONTROL_SUPPORT
+#endif	/* LED_CONTROL_SUPPORT */
+#ifdef WSC_LED_SUPPORT
+#undef WSC_LED_SUPPORT
+#endif	/* WSC_LED_SUPPORT */
+#endif /* VENDOR_FEATURE3_SUPPORT */
+    
+    
+    
+
+#include "rtmp_type.h"
+#include "rtmp_os.h"
+#include "link_list.h"
+#include "rtmp_cmd.h"
+#include "iface/iface_util.h"
+    
+
+
+
+/* ======================== Debug =========================================== */ 
+/* */
+/*  Debug information verbosity: lower values indicate higher urgency */
+/* */
+#define RT_DEBUG_OFF        0
+#define RT_DEBUG_ERROR      1
+#define RT_DEBUG_WARN       2
+#define RT_DEBUG_TRACE      3
+#define RT_DEBUG_INFO       4
+#define RT_DEBUG_LOUD       5
+    
+
+
+
+/* ======================== Definition ====================================== */ 
+#ifndef TRUE
+#define TRUE						1
+#endif
+#ifndef FALSE
+#define FALSE						0
+#endif
+    
+/* definition of pAd->OpMode */
+#define OPMODE_STA                  0
+#define OPMODE_AP                   1
+#define OPMODE_APSTA				2       /* as AP and STA at the same time */
+    
+#define MAIN_MBSSID                 0
+#define FIRST_MBSSID                1
+    
+/* Endian byte swapping codes */
+#define SWAP16(x) \
+    ((UINT16) (\
+	       (((UINT16) (x) & (UINT16) 0x00ffU) << 8) | \
+	       (((UINT16) (x) & (UINT16) 0xff00U) >> 8))) 
+ 
+#define SWAP32(x) \
+    ((UINT32) (\
+	       (((UINT32) (x) & (UINT32) 0x000000ffUL) << 24) | \
+	       (((UINT32) (x) & (UINT32) 0x0000ff00UL) << 8) | \
+	       (((UINT32) (x) & (UINT32) 0x00ff0000UL) >> 8) | \
+	       (((UINT32) (x) & (UINT32) 0xff000000UL) >> 24))) 
+
+#define SWAP64(x) \
+    ((UINT64)( \
+    (UINT64)(((UINT64)(x) & (UINT64) 0x00000000000000ffULL) << 56) | \
+    (UINT64)(((UINT64)(x) & (UINT64) 0x000000000000ff00ULL) << 40) | \
+    (UINT64)(((UINT64)(x) & (UINT64) 0x0000000000ff0000ULL) << 24) | \
+    (UINT64)(((UINT64)(x) & (UINT64) 0x00000000ff000000ULL) <<  8) | \
+    (UINT64)(((UINT64)(x) & (UINT64) 0x000000ff00000000ULL) >>  8) | \
+    (UINT64)(((UINT64)(x) & (UINT64) 0x0000ff0000000000ULL) >> 24) | \
+    (UINT64)(((UINT64)(x) & (UINT64) 0x00ff000000000000ULL) >> 40) | \
+    (UINT64)(((UINT64)(x) & (UINT64) 0xff00000000000000ULL) >> 56) ))
+ 
+#ifdef RT_BIG_ENDIAN
+
+#define cpu2le64(x) SWAP64((x))
+#define le2cpu64(x) SWAP64((x))
+#define cpu2le32(x) SWAP32((x))
+#define le2cpu32(x) SWAP32((x))
+#define cpu2le16(x) SWAP16((x))
+#define le2cpu16(x) SWAP16((x))
+#define cpu2be64(x) ((UINT64)(x))
+#define be2cpu64(x) ((UINT64)(x))
+#define cpu2be32(x) ((UINT32)(x))
+#define be2cpu32(x) ((UINT32)(x))
+#define cpu2be16(x) ((UINT16)(x))
+#define be2cpu16(x) ((UINT16)(x))
+    
+#else /* Little_Endian */
+    
+#define cpu2le64(x) ((UINT64)(x))
+#define le2cpu64(x) ((UINT64)(x))
+#define cpu2le32(x) ((UINT32)(x))
+#define le2cpu32(x) ((UINT32)(x))
+#define cpu2le16(x) ((UINT16)(x))
+#define le2cpu16(x) ((UINT16)(x))
+#define cpu2be64(x) SWAP64((x))
+#define be2cpu64(x) SWAP64((x))
+#define cpu2be32(x) SWAP32((x))
+#define be2cpu32(x) SWAP32((x))
+#define cpu2be16(x) SWAP16((x))
+#define be2cpu16(x) SWAP16((x))
+    
+#endif /* RT_BIG_ENDIAN */
+    
+
+#define MAX_CUSTOM_LEN 128 
+    
+/* */
+/* IEEE 802.11 Structures and definitions */
+/* */
+#define MAX_TX_POWER_LEVEL              100   /* mW */
+#define MAX_RSSI_TRIGGER                -10    /* dBm */
+#define MIN_RSSI_TRIGGER                -200   /* dBm */
+#define MAX_FRAG_THRESHOLD              2346  /* byte count */
+#define MIN_FRAG_THRESHOLD              256   /* byte count */
+#define MAX_RTS_THRESHOLD               2347  /* byte count */
+
+typedef enum _NDIS_802_11_NETWORK_INFRASTRUCTURE 
+ { 
+Ndis802_11IBSS, 
+Ndis802_11Infrastructure, 
+Ndis802_11AutoUnknown, 
+Ndis802_11Monitor, 
+Ndis802_11InfrastructureMax	/* Not a real value, defined as upper bound */
+} NDIS_802_11_NETWORK_INFRASTRUCTURE, *PNDIS_802_11_NETWORK_INFRASTRUCTURE;
+
+
+
+
+
+/* ======================== Memory ========================================== */ 
+#ifdef VENDOR_FEATURE2_SUPPORT
+
+extern ULONG OS_NumOfPktAlloc, OS_NumOfPktFree;
+
+#define MEM_DBG_PKT_ALLOC_INC(__pPacket)	OS_NumOfPktAlloc ++;
+#define MEM_DBG_PKT_FREE_INC(__pPacket)		OS_NumOfPktFree ++;
+#else
+#define MEM_DBG_PKT_ALLOC_INC(__pPacket)
+#define MEM_DBG_PKT_FREE_INC(__pPacket)
+#endif /* VENDOR_FEATURE2_SUPPORT */
+    
+/* value domain of 802.11 header FC.Tyte, which is b3..b2 of the 1st-byte of MAC header */
+#define BTYPE_MGMT                  0
+#define BTYPE_CNTL                  1
+#define BTYPE_DATA                  2
+    
+/* All PHY rate summary in TXD */
+/* Preamble MODE in TxD */
+#define MODE_CCK	0
+#define MODE_OFDM   1
+#ifdef DOT11_N_SUPPORT
+#define MODE_HTMIX	2
+#define MODE_HTGREENFIELD	3
+#endif	/* DOT11_N_SUPPORT */
+    
+
+
+
+/* ======================== Interface ======================================= */
+typedef enum _RTMP_INF_TYPE_
+{	
+	RTMP_DEV_INF_UNKNOWN = 0,
+	RTMP_DEV_INF_PCI = 1,
+	RTMP_DEV_INF_USB = 2,
+	RTMP_DEV_INF_RBUS = 4,
+	RTMP_DEV_INF_PCIE = 5,
+}RTMP_INF_TYPE;
+
+#if defined(CONFIG_AP_SUPPORT) && defined(CONFIG_STA_SUPPORT)
+#define IF_DEV_CONFIG_OPMODE_ON_AP(_pAd)		if(_pAd->OpMode == OPMODE_AP)
+#define IF_DEV_CONFIG_OPMODE_ON_STA(_pAd)		if(_pAd->OpMode == OPMODE_STA)
+#define RT_CONFIG_IF_OPMODE_ON_AP(__OpMode)		if (__OpMode == OPMODE_AP)
+#define RT_CONFIG_IF_OPMODE_ON_STA(__OpMode)	if (__OpMode == OPMODE_STA)
+#else
+#define IF_DEV_CONFIG_OPMODE_ON_AP(_pAd)
+#define IF_DEV_CONFIG_OPMODE_ON_STA(_pAd)
+#define RT_CONFIG_IF_OPMODE_ON_AP(__OpMode)
+#define RT_CONFIG_IF_OPMODE_ON_STA(__OpMode)
+#endif
+
+    
+/***********************************************************************************
+ * IOCTL related definitions and data structures.
+ **********************************************************************************/
+typedef struct __RTMP_IOCTL_INPUT_STRUCT
+{
+	union
+	{
+		CHAR *name;
+		struct
+		{
+			CHAR *pointer;
+			UINT16 length;
+			UINT16 flags;
+		} data;
+	} u;
+} RTMP_IOCTL_INPUT_STRUCT;
+
+
+#define RT_CMD_STATUS_TRANSLATE(__Status)				\
+	{													\
+		if (__Status == RTMP_IO_EINVAL)					\
+			__Status = -EINVAL;							\
+		else if (__Status == RTMP_IO_EOPNOTSUPP)		\
+			__Status = -EOPNOTSUPP;						\
+		else if (__Status == RTMP_IO_EFAULT)			\
+			__Status = -EFAULT;							\
+		else if (__Status == RTMP_IO_E2BIG)				\
+			__Status = -E2BIG;							\
+		else if (__Status == RTMP_IO_ENOMEM)			\
+			__Status = -ENOMEM;							\
+		else if (__Status == RTMP_IO_EAGAIN)			\
+			__Status = -EAGAIN;							\
+		else if (__Status == RTMP_IO_ENOTCONN)			\
+			__Status = -ENOTCONN;						\
+	}
+
+
+
+
+/* ======================== Timer =========================================== */
+typedef struct _LIST_RESOURCE_OBJ_ENTRY
+{
+	struct _LIST_RESOURCE_OBJ_ENTRY *pNext;
+	VOID *pRscObj;
+} LIST_RESOURCE_OBJ_ENTRY, *PLIST_RESOURCE_OBJ_ENTRY;
+
+
+
+
+/* ======================== IC =========================================== */
+#define RFIC_24GHZ		0x01
+#define RFIC_5GHZ		0x02
+
+
+
+
+/* ======================== CFG80211 ======================================== */ 
+#define RT_CFG80211_DEBUG /* debug use */
+
+#ifdef RT_CFG80211_DEBUG
+#define CFG80211DBG(__Flg, __pMsg)		DBGPRINT(__Flg, __pMsg)
+#else
+#define CFG80211DBG(__Flg, __pMsg)
+#endif /* RT_CFG80211_DEBUG */
+
+/* 1 ~ 14 */
+#define CFG80211_NUM_OF_CHAN_2GHZ			14
+
+/* 36 ~ 64, 100 ~ 136, 140 ~ 161 */
+#define CFG80211_NUM_OF_CHAN_5GHZ			\
+							(sizeof(Cfg80211_Chan)-CFG80211_NUM_OF_CHAN_2GHZ)
+
+
+
+
+/* ======================== Packet ========================================== */ 
+#define LENGTH_802_11               24
+#define LENGTH_802_11_AND_H         30
+#define LENGTH_802_11_CRC_H         34
+#define LENGTH_802_11_CRC           28
+#define LENGTH_802_11_WITH_ADDR4    30
+#define LENGTH_802_3                14
+#define LENGTH_802_3_TYPE           2
+#define LENGTH_802_1_H              8
+#define LENGTH_EAPOL_H              4
+#define LENGTH_WMMQOS_H				2
+#define LENGTH_CRC                  4
+#define MAX_SEQ_NUMBER              0x0fff
+#define LENGTH_802_3_NO_TYPE		12
+#define LENGTH_802_1Q				4 /* VLAN related */
+    
+/* */
+/* Packet information for NdisQueryPacket */
+/* */
+typedef struct  _PACKET_INFO    {
+	UINT            PhysicalBufferCount;    /* Physical breaks of buffer descripor chained */
+	UINT            BufferCount ;           /* Number of Buffer descriptor chained */
+	UINT            TotalPacketLength ;     /* Self explained */
+	PNDIS_BUFFER    pFirstBuffer;           /* Pointer to first buffer descriptor */
+} PACKET_INFO, *PPACKET_INFO;
+
+
+#define MAC_ADDR_LEN                    6
+    
+/* 2-byte Frame control field */
+    typedef struct GNU_PACKED {
+	
+#ifdef RT_BIG_ENDIAN
+	USHORT Order:1;		/* Strict order expected */
+	USHORT Wep:1;		/* Wep data */
+	USHORT MoreData:1;	/* More data bit */
+	USHORT PwrMgmt:1;	/* Power management bit */
+	USHORT Retry:1;		/* Retry status bit */
+	USHORT MoreFrag:1;	/* More fragment bit */
+	USHORT FrDs:1;		/* From DS indication */
+	USHORT ToDs:1;		/* To DS indication */
+	USHORT SubType:4;	/* MSDU subtype */
+	USHORT Type:2;		/* MSDU type */
+	USHORT Ver:2;		/* Protocol version */
+#else
+        USHORT Ver:2;		/* Protocol version */
+	USHORT Type:2;		/* MSDU type */
+	USHORT SubType:4;	/* MSDU subtype */
+	USHORT ToDs:1;		/* To DS indication */
+	USHORT FrDs:1;		/* From DS indication */
+	USHORT MoreFrag:1;	/* More fragment bit */
+	USHORT Retry:1;		/* Retry status bit */
+	USHORT PwrMgmt:1;	/* Power management bit */
+	USHORT MoreData:1;	/* More data bit */
+	USHORT Wep:1;		/* Wep data */
+	USHORT Order:1;		/* Strict order expected */
+#endif	/* !RT_BIG_ENDIAN */
+} FRAME_CONTROL, *PFRAME_CONTROL;
+
+
+typedef struct GNU_PACKED _HEADER_802_11 {
+        FRAME_CONTROL   FC;
+        USHORT          Duration;
+        UCHAR           Addr1[MAC_ADDR_LEN];
+        UCHAR           Addr2[MAC_ADDR_LEN];
+	UCHAR			Addr3[MAC_ADDR_LEN];
+#ifdef RT_BIG_ENDIAN
+	USHORT			Sequence:12;
+	USHORT			Frag:4;
+#else
+	USHORT			Frag:4;
+	USHORT			Sequence:12;
+#endif /* !RT_BIG_ENDIAN */
+	UCHAR			Octet[0];
+}	HEADER_802_11, *PHEADER_802_11;
+
+enum {
+	DIDmsg_lnxind_wlansniffrm		= 0x00000044,
+	DIDmsg_lnxind_wlansniffrm_hosttime	= 0x00010044,
+	DIDmsg_lnxind_wlansniffrm_mactime	= 0x00020044,
+	DIDmsg_lnxind_wlansniffrm_channel	= 0x00030044,
+	DIDmsg_lnxind_wlansniffrm_rssi		= 0x00040044,
+	DIDmsg_lnxind_wlansniffrm_sq		= 0x00050044,
+	DIDmsg_lnxind_wlansniffrm_signal	= 0x00060044,
+	DIDmsg_lnxind_wlansniffrm_noise		= 0x00070044,
+	DIDmsg_lnxind_wlansniffrm_rate		= 0x00080044,
+	DIDmsg_lnxind_wlansniffrm_istx		= 0x00090044,
+	DIDmsg_lnxind_wlansniffrm_frmlen	= 0x000A0044
+};
+enum { 
+P80211ENUM_msgitem_status_no_value = 0x00 
+};
+
+enum { 
+P80211ENUM_truth_false = 0x00, 
+P80211ENUM_truth_true = 0x01 
+};
+
+
+/* Definition from madwifi */
+typedef struct {
+        UINT32 did;
+        UINT16 status;
+        UINT16 len;
+        UINT32 data;
+} p80211item_uint32_t;
+
+typedef struct {
+        UINT32 msgcode;
+        UINT32 msglen;
+#define WLAN_DEVNAMELEN_MAX 16
+        UINT8 devname[WLAN_DEVNAMELEN_MAX];
+        p80211item_uint32_t hosttime;
+        p80211item_uint32_t mactime;
+        p80211item_uint32_t channel;
+        p80211item_uint32_t rssi;
+        p80211item_uint32_t sq;
+        p80211item_uint32_t signal;
+        p80211item_uint32_t noise;
+        p80211item_uint32_t rate;
+        p80211item_uint32_t istx;
+        p80211item_uint32_t frmlen;
+} wlan_ng_prism2_header;
+
+#ifdef MONITOR_FLAG_11N_SNIFFER_SUPPORT
+/*
+	Note: 2009/11/10
+	Used in WiFi Sigma Test Engine RT3593 (replace RT2883).
+*/
+
+#ifdef RT_BIG_ENDIAN
+typedef struct _ETHEREAL_RADIO {
+        UCHAR Flag_80211n;
+        UCHAR signal_level; /* dBm */
+        UCHAR data_rate; /* rate index */
+        UCHAR channel; /* Channel number */
+} ETHEREAL_RADIO, *PETHEREAL_RADIO;
+#else
+typedef struct _ETHEREAL_RADIO {
+        UCHAR channel; /* Channel number */
+        UCHAR data_rate; /* rate index */
+        UCHAR signal_level; /* dBm */
+        UCHAR Flag_80211n;      
+} ETHEREAL_RADIO, *PETHEREAL_RADIO;
+#endif
+
+#define WIRESHARK_11N_FLAG_3x3             	0x01
+#define WIRESHARK_11N_FLAG_GF              	0x02
+#define WIRESHARK_11N_FLAG_AMPDU     	 	0x04
+#define WIRESHARK_11N_FLAG_STBC          	0x08
+#define WIRESHARK_11N_FLAG_SGI             	0x10
+#define WIRESHARK_11N_FLAG_BW20U      		0x20
+#define WIRESHARK_11N_FLAG_BW20D      		0x40
+#define WIRESHARK_11N_FLAG_BW40             0x80
+#endif /* MONITOR_FLAG_11N_SNIFFER_SUPPORT */
+    
+
+#endif /* __RT_COMM_H__ */
+    
+/* End of rt_comm.h */ 
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rtmp_def.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rtmp_def.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rtmp_def.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rtmp_def.h	2017-09-23 03:42:49.802675724 +0800
@@ -0,0 +1,1759 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RTMP_DEF_H__
+#define __RTMP_DEF_H__
+
+#include "oid.h"
+
+#undef AP_WSC_INCLUDED
+#undef STA_WSC_INCLUDED
+#undef WSC_INCLUDED
+
+
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+
+#if defined(AP_WSC_INCLUDED) || defined(STA_WSC_INCLUDED)
+#define WSC_INCLUDED
+#endif
+
+
+#define NIC_TAG             ((ULONG)'0682')
+#define NIC_DBG_STRING      ("**RT28xx**")
+
+#ifdef SNMP_SUPPORT
+/* for snmp */
+/* to get manufacturer OUI, kathy, 2008_0220 */
+#define ManufacturerOUI_LEN			3
+#define ManufacturerNAME			("Ralink Technology Company.")
+#define	ResourceTypeIdName			("Ralink_ID")
+#endif
+
+/*#define GNU_PACKED */
+#define RALINK_2883_VERSION		((UINT32)0x28830300)
+#define RALINK_2880E_VERSION	((UINT32)0x28720200)
+#define RALINK_3883_VERSION		((UINT32)0x38830400)
+#define RALINK_3070_VERSION		((UINT32)0x30700200)
+
+#define MAX_RX_PKT_LEN	1520
+
+/* */
+/* Entry number for each DMA descriptor ring */
+/* */
+
+
+#define PCI_VIRT_TO_PHYS(__Addr)	(((UINT32)(__Addr)) & 0x0FFFFFFF)
+
+#ifdef RTMP_MAC_USB
+#define TX_RING_SIZE            8	/* 1 */
+#define PRIO_RING_SIZE          8
+#define MGMT_RING_SIZE       32	/* PRIO_RING_SIZE */
+#ifdef INF_AMAZON_SE
+#define RX_RING_SIZE            1
+#else
+#define RX_RING_SIZE            8
+#endif /* INF_AMAZON_SE */
+#define MAX_TX_PROCESS          4
+#define LOCAL_TXBUF_SIZE        2048
+#endif /* RTMP_MAC_USB */
+
+#ifdef MULTIPLE_CARD_SUPPORT
+/* MC: Multple Cards */
+#define MAX_NUM_OF_MULTIPLE_CARD		32
+#endif /* MULTIPLE_CARD_SUPPORT */
+
+#ifdef MEMORY_OPTIMIZATION
+#define MAX_RX_PROCESS          32
+#else
+#define MAX_RX_PROCESS          128	/*64 //32 */
+#endif
+#define NUM_OF_LOCAL_TXBUF      2
+#define TXD_SIZE                16
+#define TXWI_SIZE               16
+#define RXD_SIZE               	16
+#define RXWI_SIZE             	16
+/* TXINFO_SIZE + TXWI_SIZE + 802.11 Header Size + AMSDU sub frame header */
+#define TX_DMA_1ST_BUFFER_SIZE  96	/* only the 1st physical buffer is pre-allocated */
+
+/*#define MGMT_DMA_BUFFER_SIZE    1536 //2048 */
+/*
+	Note 20100212 by SampleLin: do not set MGMT_DMA_BUFFER_SIZE smaller than
+	1600; Or kernel will crash in deaggregate_AMSDU_announce() for EAPOL packet
+	in enterprise WPA mode.
+*/
+#define MGMT_DMA_BUFFER_SIZE    1600	/*2048 */
+
+#define RX_BUFFER_AGGRESIZE     3840	/*3904 //3968 //4096 //2048 //4096 */
+#define RX_BUFFER_NORMSIZE      3840	/*3904 //3968 //4096 //2048 //4096 */
+#define TX_BUFFER_NORMSIZE		RX_BUFFER_NORMSIZE
+#define MAX_FRAME_SIZE          2346	/* Maximum 802.11 frame size */
+#define MAX_AGGREGATION_SIZE    3840	/*3904 //3968 //4096 */
+#define MAX_NUM_OF_TUPLE_CACHE  2
+#define MAX_MCAST_LIST_SIZE     32
+#define MAX_LEN_OF_VENDOR_DESC  64
+/*#define MAX_SIZE_OF_MCAST_PSQ   (NUM_OF_LOCAL_TXBUF >> 2) // AP won't spend more than 1/4 of total buffers on M/BCAST PSQ */
+#define MAX_SIZE_OF_MCAST_PSQ               32
+
+#define MAX_RX_PROCESS_CNT	(RX_RING_SIZE)
+
+/*
+	WMM Note: If memory of your system is not much, please reduce the definition;
+	or when you do WMM test, the queue for low priority AC will be full, i.e.
+	TX_RING_SIZE + MAX_PACKETS_IN_QUEUE packets for the AC will be buffered in
+	WLAN, maybe no any packet buffer can be got in Ethernet driver.
+
+	Sometimes no packet buffer can be got in Ethernet driver, the system will
+	send flow control packet to the sender to slow down its sending rate.
+	So no WMM can be saw in the air.
+*/
+
+/*
+	Need to use 64 in vxworks for test case WMM A5-T07
+	Two dnlink (10Mbps) from a WMM station to a non-WMM station.
+	If use 256, queue is not enough.
+	And in rt_main_end.c, clConfig.clNum = RX_RING_SIZE * 3; is changed to
+	clConfig.clNum = RX_RING_SIZE * 4;
+*/
+
+#define MAX_PACKETS_IN_MCAST_PS_QUEUE		32
+#define MAX_PACKETS_IN_PS_QUEUE				128	/*32 */
+#define WMM_NUM_OF_AC                       4	/* AC0, AC1, AC2, and AC3 */
+
+
+#ifdef RTMP_EFUSE_SUPPORT
+/*2008/09/11:KH add to support efuse<-- */
+#define MAX_EEPROM_BIN_FILE_SIZE				1024
+#define EFUSE_BUFFER_PATH						"/tmp/RT30xxEEPROM.bin"
+/*2008/09/11:KH add to support efuse--> */
+#endif /* RTMP_EFUSE_SUPPORT */
+
+#define MAX_AGG_3SS_BALIMIT		31
+
+/* RxFilter */
+#define STANORMAL	 0x17f97
+#define APNORMAL	 0x15f97
+#ifdef CONFIG_STA_SUPPORT
+#ifdef XLINK_SUPPORT
+#define PSPXLINK	 0x17f93
+#endif /* XLINK_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+
+
+/* */
+/*  RTMP_ADAPTER flags */
+/* */
+#define fRTMP_ADAPTER_MAP_REGISTER          0x00000001
+#define fRTMP_ADAPTER_INTERRUPT_IN_USE      0x00000002
+#define fRTMP_ADAPTER_HARDWARE_ERROR        0x00000004
+#define fRTMP_ADAPTER_SCATTER_GATHER        0x00000008
+#define fRTMP_ADAPTER_SEND_PACKET_ERROR     0x00000010
+#define fRTMP_ADAPTER_MLME_RESET_IN_PROGRESS 0x00000020
+#define fRTMP_ADAPTER_HALT_IN_PROGRESS      0x00000040
+#define fRTMP_ADAPTER_RESET_IN_PROGRESS     0x00000080
+#define fRTMP_ADAPTER_NIC_NOT_EXIST         0x00000100
+#define fRTMP_ADAPTER_TX_RING_ALLOCATED     0x00000200
+#define fRTMP_ADAPTER_REMOVE_IN_PROGRESS    0x00000400
+#define fRTMP_ADAPTER_MIMORATE_INUSED       0x00000800
+#define fRTMP_ADAPTER_RX_RING_ALLOCATED     0x00001000
+#define fRTMP_ADAPTER_INTERRUPT_ACTIVE      0x00002000
+#define fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS  0x00004000
+#define	fRTMP_ADAPTER_REASSOC_IN_PROGRESS	0x00008000
+#define	fRTMP_ADAPTER_MEDIA_STATE_PENDING	0x00010000
+#define	fRTMP_ADAPTER_RADIO_OFF				0x00020000
+#define fRTMP_ADAPTER_BULKOUT_RESET			0x00040000
+#define	fRTMP_ADAPTER_BULKIN_RESET			0x00080000
+#define fRTMP_ADAPTER_RDG_ACTIVE			0x00100000
+#define fRTMP_ADAPTER_DYNAMIC_BE_TXOP_ACTIVE 0x00200000
+#define fRTMP_ADAPTER_SCAN_2040 			0x04000000
+#define	fRTMP_ADAPTER_RADIO_MEASUREMENT		0x08000000
+
+#define fRTMP_ADAPTER_START_UP         		0x10000000	/*Devive already initialized and enabled Tx/Rx. */
+#define fRTMP_ADAPTER_MEDIA_STATE_CHANGE    0x20000000
+#define fRTMP_ADAPTER_IDLE_RADIO_OFF        0x40000000
+
+#define fRTMP_ADAPTER_DISABLE_DOT_11N		0x00000001
+#define fRTMP_ADAPTER_WSC_PBC_PIN0	        0x00000002
+#ifdef CONFIG_PM
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND
+#define fRTMP_ADAPTER_CPU_SUSPEND        0x80000000
+#define fRTMP_ADAPTER_SUSPEND 0x00800000
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */
+#endif /* CONFIG_PM */
+
+/* Lock bit for accessing different ring buffers */
+/*#define fRTMP_ADAPTER_TX_RING_BUSY        0x80000000 */
+/*#define fRTMP_ADAPTER_MGMT_RING_BUSY      0x40000000 */
+/*#define fRTMP_ADAPTER_ATIM_RING_BUSY      0x20000000 */
+/*#define fRTMP_ADAPTER_RX_RING_BUSY        0x10000000 */
+
+/* Lock bit for accessing different queue */
+/*#define   fRTMP_ADAPTER_TX_QUEUE_BUSY     0x08000000 */
+/*#define   fRTMP_ADAPTER_MGMT_QUEUE_BUSY   0x04000000 */
+
+/* */
+/*  STA operation status flags */
+/* */
+#define fOP_STATUS_INFRA_ON                 0x00000001
+#define fOP_STATUS_ADHOC_ON                 0x00000002
+#define fOP_STATUS_BG_PROTECTION_INUSED     0x00000004
+#define fOP_STATUS_SHORT_SLOT_INUSED        0x00000008
+#define fOP_STATUS_SHORT_PREAMBLE_INUSED    0x00000010
+#define fOP_STATUS_RECEIVE_DTIM             0x00000020
+/*#define fOP_STATUS_TX_RATE_SWITCH_ENABLED   0x00000040 */
+#define fOP_STATUS_MEDIA_STATE_CONNECTED    0x00000080
+#define fOP_STATUS_WMM_INUSED               0x00000100
+#define fOP_STATUS_AGGREGATION_INUSED       0x00000200
+#define fOP_STATUS_DOZE                     0x00000400	/* debug purpose */
+#define fOP_STATUS_PIGGYBACK_INUSED         0x00000800	/* piggy-back, and aggregation */
+#define fOP_STATUS_APSD_INUSED				0x00001000
+#define fOP_STATUS_TX_AMSDU_INUSED			0x00002000
+#define fOP_STATUS_MAX_RETRY_ENABLED		0x00004000
+#define fOP_STATUS_WAKEUP_NOW               0x00008000
+#define fOP_STATUS_ADVANCE_POWER_SAVE_PCIE_DEVICE       0x00020000
+
+#define fOP_AP_STATUS_MEDIA_STATE_CONNECTED	0x00200000
+
+
+/* */
+/*  RTMP_ADAPTER PSFlags : related to advanced power save. */
+/* */
+/* Indicate whether driver can go to sleep mode from now. This flag is useful AFTER link up */
+#define fRTMP_PS_CAN_GO_SLEEP          0x00000001
+/* Indicate whether driver has issue a LinkControl command to PCIe L1 */
+#define fRTMP_PS_SET_PCI_CLK_OFF_COMMAND          0x00000002
+/* Indicate driver should disable kick off hardware to send packets from now. */
+#define fRTMP_PS_DISABLE_TX         0x00000004
+/* Indicate driver should IMMEDIATELY fo to sleep after receiving AP's beacon in which  doesn't indicate unicate nor multicast packets for me */
+/*. This flag is used ONLY in RTMPHandleRxDoneInterrupt routine. */
+#define fRTMP_PS_GO_TO_SLEEP_NOW         0x00000008
+#define fRTMP_PS_TOGGLE_L1		0x00000010	/* Use Toggle L1 mechanism for rt28xx PCIe */
+
+/*#if defined(RT3090) || defined(RT3592) || defined(RT3390) || defined(RT3593) */
+#define WAKE_MCU_CMD				0x31
+#define SLEEP_MCU_CMD				0x30
+#define RFOFF_MCU_CMD				0x35
+/*#endif // defined(RT3090) || defined(RT3592) || defined(RT3390) || defined(RT3593) */
+
+#ifdef DOT11N_DRAFT3
+#define fOP_STATUS_SCAN_2040               	    0x00040000
+#endif /* DOT11N_DRAFT3 */
+
+#define CCKSETPROTECT		0x1
+#define OFDMSETPROTECT		0x2
+#define MM20SETPROTECT		0x4
+#define MM40SETPROTECT		0x8
+#define GF20SETPROTECT		0x10
+#define GR40SETPROTECT		0x20
+#define ALLN_SETPROTECT		(GR40SETPROTECT | GF20SETPROTECT | MM40SETPROTECT | MM20SETPROTECT)
+
+/* */
+/*  AP's client table operation status flags */
+/* */
+#define fCLIENT_STATUS_WMM_CAPABLE          0x00000001	/* CLIENT can parse QOS DATA frame */
+#define fCLIENT_STATUS_AGGREGATION_CAPABLE  0x00000002	/* CLIENT can receive Ralink's proprietary TX aggregation frame */
+#define fCLIENT_STATUS_PIGGYBACK_CAPABLE    0x00000004	/* CLIENT support piggy-back */
+#define fCLIENT_STATUS_AMSDU_INUSED			0x00000008
+#define fCLIENT_STATUS_SGI20_CAPABLE		0x00000010
+#define fCLIENT_STATUS_SGI40_CAPABLE		0x00000020
+#define fCLIENT_STATUS_TxSTBC_CAPABLE		0x00000040
+#define fCLIENT_STATUS_RxSTBC_CAPABLE		0x00000080
+#define fCLIENT_STATUS_HTC_CAPABLE			0x00000100
+#define fCLIENT_STATUS_RDG_CAPABLE			0x00000200
+#define fCLIENT_STATUS_MCSFEEDBACK_CAPABLE  0x00000400
+#define fCLIENT_STATUS_APSD_CAPABLE         0x00000800	/* UAPSD STATION */
+
+#ifdef DOT11N_DRAFT3
+#define fCLIENT_STATUS_BSSCOEXIST_CAPABLE	0x00001000
+#endif /* DOT11N_DRAFT3 */
+#define fCLIENT_STATUS_SOFTWARE_ENCRYPT		0x00002000	/* Indicate the client encrypt/decrypt by software */
+#define fCLIENT_STATUS_RALINK_CHIPSET		0x00100000
+
+#ifdef CLIENT_WDS
+#define fCLIENT_STATUS_CLI_WDS				0x00200000
+#endif /* CLIENT_WDS */
+
+
+/* */
+/*  STA configuration flags */
+/* */
+/*#define fSTA_CFG_ENABLE_TX_BURST          0x00000001 */
+
+/* 802.11n Operating Mode Definition. 0-3 also used in ASICUPdateProtect switch case */
+#define HT_NO_PROTECT	0
+#define HT_LEGACY_PROTECT	1
+#define HT_40_PROTECT	2
+#define HT_2040_PROTECT	3
+#define HT_RTSCTS_6M	7
+/*following is our own definition in order to turn on our ASIC protection register in INFRASTRUCTURE. */
+#define HT_ATHEROS	8	/* rt2860c has problem with atheros chip. we need to turn on RTS/CTS . */
+#define HT_FORCERTSCTS	9	/* Force turn on RTS/CTS first. then go to evaluate if this force RTS is necessary. */
+
+/* */
+/* RX Packet Filter control flags. Apply on pAd->PacketFilter */
+/* */
+#define fRX_FILTER_ACCEPT_DIRECT            NDIS_PACKET_TYPE_DIRECTED
+#define fRX_FILTER_ACCEPT_MULTICAST         NDIS_PACKET_TYPE_MULTICAST
+#define fRX_FILTER_ACCEPT_BROADCAST         NDIS_PACKET_TYPE_BROADCAST
+#define fRX_FILTER_ACCEPT_ALL_MULTICAST     NDIS_PACKET_TYPE_ALL_MULTICAST
+#define fRX_FILTER_ACCEPT_PROMISCUOUS       NDIS_PACKET_TYPE_PROMISCUOUS
+
+/* */
+/* Error code section */
+/* */
+/* NDIS_ERROR_CODE_ADAPTER_NOT_FOUND */
+#define ERRLOG_READ_PCI_SLOT_FAILED     0x00000101L
+#define ERRLOG_WRITE_PCI_SLOT_FAILED    0x00000102L
+#define ERRLOG_VENDOR_DEVICE_NOMATCH    0x00000103L
+
+/* NDIS_ERROR_CODE_ADAPTER_DISABLED */
+#define ERRLOG_BUS_MASTER_DISABLED      0x00000201L
+
+/* NDIS_ERROR_CODE_UNSUPPORTED_CONFIGURATION */
+#define ERRLOG_INVALID_SPEED_DUPLEX     0x00000301L
+#define ERRLOG_SET_SECONDARY_FAILED     0x00000302L
+
+/* NDIS_ERROR_CODE_OUT_OF_RESOURCES */
+#define ERRLOG_OUT_OF_MEMORY            0x00000401L
+#define ERRLOG_OUT_OF_SHARED_MEMORY     0x00000402L
+#define ERRLOG_OUT_OF_MAP_REGISTERS     0x00000403L
+#define ERRLOG_OUT_OF_BUFFER_POOL       0x00000404L
+#define ERRLOG_OUT_OF_NDIS_BUFFER       0x00000405L
+#define ERRLOG_OUT_OF_PACKET_POOL       0x00000406L
+#define ERRLOG_OUT_OF_NDIS_PACKET       0x00000407L
+#define ERRLOG_OUT_OF_LOOKASIDE_MEMORY  0x00000408L
+
+/* NDIS_ERROR_CODE_HARDWARE_FAILURE */
+#define ERRLOG_SELFTEST_FAILED          0x00000501L
+#define ERRLOG_INITIALIZE_ADAPTER       0x00000502L
+#define ERRLOG_REMOVE_MINIPORT          0x00000503L
+
+/* NDIS_ERROR_CODE_RESOURCE_CONFLICT */
+#define ERRLOG_MAP_IO_SPACE             0x00000601L
+#define ERRLOG_QUERY_ADAPTER_RESOURCES  0x00000602L
+#define ERRLOG_NO_IO_RESOURCE           0x00000603L
+#define ERRLOG_NO_INTERRUPT_RESOURCE    0x00000604L
+#define ERRLOG_NO_MEMORY_RESOURCE       0x00000605L
+
+/* WDS definition */
+#define	MAX_WDS_ENTRY               4
+#define WDS_PAIRWISE_KEY_OFFSET     60	/* WDS links uses pairwise key#60 ~ 63 in ASIC pairwise key table */
+
+#define	WDS_DISABLE_MODE            0
+#define	WDS_RESTRICT_MODE           1
+#define	WDS_BRIDGE_MODE             2
+#define	WDS_REPEATER_MODE           3
+#define	WDS_LAZY_MODE               4
+
+#define MAX_MESH_NUM				0
+
+#define MAX_APCLI_NUM				0
+#ifdef APCLI_SUPPORT
+#undef	MAX_APCLI_NUM
+#define MAX_APCLI_NUM				1
+#endif /* APCLI_SUPPORT */
+
+#define MAX_P2P_NUM				0
+
+#define MAX_MBSSID_NUM(__pAd)		1
+
+
+#ifdef MBSS_SUPPORT
+#undef	MAX_MBSSID_NUM
+
+#define HW_BEACON_MAX_COUNT(__pAd)	((__pAd)->chipCap.BcnMaxHwNum)
+#define MAX_MBSSID_NUM(__pAd)		((__pAd)->chipCap.BcnMaxNum)
+
+#else
+#define HW_BEACON_MAX_COUNT(__pAd)	8
+#endif /* MBSS_SUPPORT */
+
+#define HW_BEACON_MAX_NUM			16
+
+/* sanity check for apidx */
+#define MBSS_MR_APIDX_SANITY_CHECK(__pAd, apidx) \
+    { if ((apidx >= MAX_MBSSID_NUM(__pAd)) || \
+		(apidx >= HW_BEACON_MAX_NUM)) { \
+          DBGPRINT(RT_DEBUG_ERROR, ("%s> Error! apidx = %d > MAX_MBSSID_NUM!\n", __FUNCTION__, apidx)); \
+	  apidx = MAIN_MBSSID; } }
+
+#define VALID_WCID(_wcid)	((_wcid) > 0 && (_wcid) < MAX_LEN_OF_MAC_TABLE )
+
+
+#define MAX_BEACON_SIZE				512
+
+
+#define HW_RESERVED_WCID(__pAd)		((__pAd)->chipCap.WcidHwRsvNum)
+
+/* Then dedicate wcid of DFS and Carrier-Sense. */
+#define DFS_CTS_WCID(__pAd) 		(HW_RESERVED_WCID(__pAd) - 1)
+#define CS_CTS_WCID(__pAd) 			(HW_RESERVED_WCID(__pAd) - 2)
+#define LAST_SPECIFIC_WCID(__pAd)	(HW_RESERVED_WCID(__pAd) - 2)
+
+/* If MAX_MBSSID_NUM is 8, the maximum available wcid for the associated STA is 211. */
+/* If MAX_MBSSID_NUM is 7, the maximum available wcid for the associated STA is 228. */
+#define MAX_AVAILABLE_CLIENT_WCID(__pAd)	(LAST_SPECIFIC_WCID(__pAd) - MAX_MBSSID_NUM(__pAd) - 1)
+
+/* TX need WCID to find Cipher Key */
+/* these wcid 212 ~ 219 are reserved for bc/mc packets if MAX_MBSSID_NUM is 8. */
+#define GET_GroupKey_WCID(__pAd, __wcid, __bssidx) \
+	{										\
+		__wcid = LAST_SPECIFIC_WCID(__pAd) - (MAX_MBSSID_NUM(__pAd)) + __bssidx;	\
+	}
+
+/*#define IsGroupKeyWCID(__pAd, __wcid) (((__wcid) < LAST_SPECIFIC_WCID) && ((__wcid) >= (LAST_SPECIFIC_WCID - (MAX_MBSSID_NUM(__pAd))))) */
+
+/* definition to support multiple BSSID */
+#define BSS0                            0
+#define BSS1                            1
+#define BSS2                            2
+#define BSS3                            3
+#define BSS4                            4
+#define BSS5                            5
+#define BSS6                            6
+#define BSS7                            7
+
+/*============================================================ */
+/* Length definitions */
+#define PEER_KEY_NO                     2
+/*#define MAC_ADDR_LEN                    6 */
+#define TIMESTAMP_LEN                   8
+#define MAX_LEN_OF_SUPPORTED_RATES      MAX_LENGTH_OF_SUPPORT_RATES	/* 1, 2, 5.5, 11, 6, 9, 12, 18, 24, 36, 48, 54 */
+#define MAX_NUM_OF_REGULATORY_CLASS		16
+#define MAX_LEN_OF_KEY                  32	/* 32 octets == 256 bits, Redefine for WPA */
+#define MAX_NUM_OF_CHANNELS             MAX_NUM_OF_CHS	/* 14 channels @2.4G +  12@UNII + 4 @MMAC + 11 @HiperLAN2 + 7 @Japan + 1 as NULL termination */
+#define MAX_NUM_OF_11JCHANNELS             20	/* 14 channels @2.4G +  12@UNII + 4 @MMAC + 11 @HiperLAN2 + 7 @Japan + 1 as NULL termination */
+#define MAX_LEN_OF_SSID                 32
+#define CIPHER_TEXT_LEN                 128
+#define HASH_TABLE_SIZE                 256	/* Size of hash tab must be power of 2. */
+#define MAX_VIE_LEN                     1024	/* New for WPA cipher suite variable IE sizes. */
+#define MAX_SUPPORT_MCS             32
+#define MAX_NUM_OF_BBP_LATCH             256
+#undef MAX_NUM_OF_BBP_LATCH
+#define MAX_NUM_OF_BBP_LATCH             255
+/*============================================================ */
+/* ASIC WCID Table definition. */
+/*============================================================ */
+#define BSSID_WCID		1	/* in infra mode, always put bssid with this WCID */
+#define MCAST_WCID	0x0
+#define BSS0Mcast_WCID	0x0
+#define BSS1Mcast_WCID	0xf8
+#define BSS2Mcast_WCID	0xf9
+#define BSS3Mcast_WCID	0xfa
+#define BSS4Mcast_WCID	0xfb
+#define BSS5Mcast_WCID	0xfc
+#define BSS6Mcast_WCID	0xfd
+#define BSS7Mcast_WCID	0xfe
+#define RESERVED_WCID		0xff
+
+#define MAX_NUM_OF_ACL_LIST				MAX_NUMBER_OF_ACL
+
+#define MAX_LEN_OF_MAC_TABLE            MAX_NUMBER_OF_MAC	/* if MAX_MBSSID_NUM is 8, this value can't be larger than 211 */
+
+/*#if MAX_LEN_OF_MAC_TABLE>MAX_AVAILABLE_CLIENT_WCID */
+/*#error MAX_LEN_OF_MAC_TABLE can not be larger than MAX_AVAILABLE_CLIENT_WCID!!!! */
+/*#endif */
+
+#define MAX_NUM_OF_WDS_LINK_PERBSSID	            3
+/*#define MAX_NUM_OF_WDS_LINK	            (MAX_NUM_OF_WDS_LINK_PERBSSID*MAX_MBSSID_NUM) // no use */
+#define MAX_NUM_OF_EVENT                MAX_NUMBER_OF_EVENT
+#define WDS_LINK_START_WCID				(MAX_LEN_OF_MAC_TABLE-1)
+
+#define NUM_OF_TID			8
+#define MAX_AID_BA                    4
+#define MAX_LEN_OF_BA_REC_TABLE          ((NUM_OF_TID * MAX_LEN_OF_MAC_TABLE)/2)	/*   (NUM_OF_TID*MAX_AID_BA + 32)        //Block ACK recipient */
+#define MAX_LEN_OF_BA_ORI_TABLE          ((NUM_OF_TID * MAX_LEN_OF_MAC_TABLE)/2)	/*   (NUM_OF_TID*MAX_AID_BA + 32)   // Block ACK originator */
+#ifdef MEMORY_OPTIMIZATION
+#define MAX_LEN_OF_BSS_TABLE             1
+#define MAX_REORDERING_MPDU_NUM			 256
+#else
+#define MAX_LEN_OF_BSS_TABLE             64
+#define MAX_REORDERING_MPDU_NUM			 512
+#endif
+
+/* key related definitions */
+#define SHARE_KEY_NUM                   4
+#define MAX_LEN_OF_SHARE_KEY            16	/* byte count */
+#define MAX_LEN_OF_PEER_KEY             16	/* byte count */
+#define PAIRWISE_KEY_NUM                64	/* in MAC ASIC pairwise key table */
+#define GROUP_KEY_NUM                   4
+#define PMK_LEN                         32
+#define WDS_PAIRWISE_KEY_OFFSET         60	/* WDS links uses pairwise key#60 ~ 63 in ASIC pairwise key table */
+#define	PMKID_NO                        4	/* Number of PMKID saved supported */
+#define MAX_LEN_OF_MLME_BUFFER          2048
+
+/* power status related definitions */
+#define PWR_ACTIVE                      0
+#define PWR_SAVE                        1
+#define PWR_MMPS                        2	/*MIMO power save */
+/*#define PWR_UNKNOWN                   2 */
+
+/* Auth and Assoc mode related definitions */
+#define AUTH_MODE_OPEN                  0x00
+#define AUTH_MODE_KEY                   0x01
+/*#define AUTH_MODE_AUTO_SWITCH         0x03 */
+/*#define AUTH_MODE_DEAUTH              0x04 */
+/*#define AUTH_MODE_UPLAYER             0x05 // reserved for 802.11i use */
+
+/* BSS Type definitions */
+#define BSS_ADHOC                       0	/* = Ndis802_11IBSS */
+#define BSS_INFRA                       1	/* = Ndis802_11Infrastructure */
+#define BSS_ANY                         2	/* = Ndis802_11AutoUnknown */
+#define BSS_MONITOR			            3	/* = Ndis802_11Monitor */
+
+/* Reason code definitions */
+#define REASON_RESERVED                 0
+#define REASON_UNSPECIFY                1
+#define REASON_NO_LONGER_VALID          2
+#define REASON_DEAUTH_STA_LEAVING       3
+#define REASON_DISASSOC_INACTIVE        4
+#define REASON_DISASSPC_AP_UNABLE       5
+#define REASON_CLS2ERR                  6
+#define REASON_CLS3ERR                  7
+#define REASON_DISASSOC_STA_LEAVING     8
+#define REASON_STA_REQ_ASSOC_NOT_AUTH   9
+#define REASON_INVALID_IE               13
+#define REASON_MIC_FAILURE              14
+#define REASON_4_WAY_TIMEOUT            15
+#define REASON_GROUP_KEY_HS_TIMEOUT     16
+#define REASON_IE_DIFFERENT             17
+#define REASON_MCIPHER_NOT_VALID        18
+#define REASON_UCIPHER_NOT_VALID        19
+#define REASON_AKMP_NOT_VALID           20
+#define REASON_UNSUPPORT_RSNE_VER       21
+#define REASON_INVALID_RSNE_CAP         22
+#define REASON_8021X_AUTH_FAIL          23
+#define REASON_CIPHER_SUITE_REJECTED    24
+#define REASON_DECLINED                 37
+
+#define REASON_QOS_UNSPECIFY              32
+#define REASON_QOS_LACK_BANDWIDTH         33
+#define REASON_POOR_CHANNEL_CONDITION     34
+#define REASON_QOS_OUTSIDE_TXOP_LIMITION  35
+#define REASON_QOS_QSTA_LEAVING_QBSS      36
+#define REASON_QOS_UNWANTED_MECHANISM     37
+#define REASON_QOS_MECH_SETUP_REQUIRED    38
+#define REASON_QOS_REQUEST_TIMEOUT        39
+#define REASON_QOS_CIPHER_NOT_SUPPORT     45
+
+
+#define REASON_FT_INVALID_FTIE				55
+
+/* Status code definitions */
+#define MLME_SUCCESS                    0
+#define MLME_UNSPECIFY_FAIL             1
+#define MLME_CANNOT_SUPPORT_CAP         10
+#define MLME_REASSOC_DENY_ASSOC_EXIST   11
+#define MLME_ASSOC_DENY_OUT_SCOPE       12
+#define MLME_ALG_NOT_SUPPORT            13
+#define MLME_SEQ_NR_OUT_OF_SEQUENCE     14
+#define MLME_REJ_CHALLENGE_FAILURE      15
+#define MLME_REJ_TIMEOUT                  16
+#define MLME_ASSOC_REJ_UNABLE_HANDLE_STA  17
+#define MLME_ASSOC_REJ_DATA_RATE          18
+
+#define MLME_ASSOC_REJ_NO_EXT_RATE        22
+#define MLME_ASSOC_REJ_NO_EXT_RATE_PBCC   23
+#define MLME_ASSOC_REJ_NO_CCK_OFDM        24
+
+
+#define MLME_QOS_UNSPECIFY                32
+#define MLME_REQUEST_DECLINED             37
+#define MLME_REQUEST_WITH_INVALID_PARAM   38
+#define MLME_INVALID_INFORMATION_ELEMENT  40
+#define MLME_INVALID_GROUP_CIPHER   	  41
+#define MLME_INVALID_PAIRWISE_CIPHER   	  42
+#define MLME_INVALID_AKMP   			  43
+#define MLME_NOT_SUPPORT_RSN_VERSION	  44
+#define	MLME_INVALID_RSN_CAPABILITIES	  45
+#define MLME_DLS_NOT_ALLOW_IN_QBSS        48
+#define MLME_DEST_STA_NOT_IN_QBSS         49
+#define MLME_DEST_STA_IS_NOT_A_QSTA       50
+
+#define MLME_INVALID_FORMAT             0x51
+#define MLME_FAIL_NO_RESOURCE           0x52
+#define MLME_STATE_MACHINE_REJECT       0x53
+#define MLME_MAC_TABLE_FAIL             0x54
+
+/* IE code */
+#define IE_SSID                         0
+#define IE_SUPP_RATES                   1
+#define IE_FH_PARM                      2
+#define IE_DS_PARM                      3
+#define IE_CF_PARM                      4
+#define IE_TIM                          5
+#define IE_IBSS_PARM                    6
+#define IE_COUNTRY                      7	/* 802.11d */
+#define IE_802_11D_REQUEST              10	/* 802.11d */
+#define IE_QBSS_LOAD                    11	/* 802.11e d9 */
+#define IE_EDCA_PARAMETER               12	/* 802.11e d9 */
+#define IE_TSPEC                        13	/* 802.11e d9 */
+#define IE_TCLAS                        14	/* 802.11e d9 */
+#define IE_SCHEDULE                     15	/* 802.11e d9 */
+#define IE_CHALLENGE_TEXT               16
+#define IE_POWER_CONSTRAINT             32	/* 802.11h d3.3 */
+#define IE_POWER_CAPABILITY             33	/* 802.11h d3.3 */
+#define IE_TPC_REQUEST                  34	/* 802.11h d3.3 */
+#define IE_TPC_REPORT                   35	/* 802.11h d3.3 */
+#define IE_SUPP_CHANNELS                36	/* 802.11h d3.3 */
+#define IE_CHANNEL_SWITCH_ANNOUNCEMENT  37	/* 802.11h d3.3 */
+#define IE_MEASUREMENT_REQUEST          38	/* 802.11h d3.3 */
+#define IE_MEASUREMENT_REPORT           39	/* 802.11h d3.3 */
+#define IE_QUIET                        40	/* 802.11h d3.3 */
+#define IE_IBSS_DFS                     41	/* 802.11h d3.3 */
+#define IE_ERP                          42	/* 802.11g */
+#define IE_TS_DELAY                     43	/* 802.11e d9 */
+#define IE_TCLAS_PROCESSING             44	/* 802.11e d9 */
+#define IE_QOS_CAPABILITY               46	/* 802.11e d6 */
+#define IE_HT_CAP                       45	/* 802.11n d1. HT CAPABILITY. ELEMENT ID TBD */
+#define IE_AP_CHANNEL_REPORT			51	/* 802.11k d6 */
+#define IE_HT_CAP2                         52	/* 802.11n d1. HT CAPABILITY. ELEMENT ID TBD */
+#define IE_RSN                          48	/* 802.11i d3.0 */
+#define IE_WPA2                         48	/* WPA2 */
+#define IE_EXT_SUPP_RATES               50	/* 802.11g */
+#define IE_SUPP_REG_CLASS               59	/* 802.11y. Supported regulatory classes. */
+#define IE_EXT_CHANNEL_SWITCH_ANNOUNCEMENT	60	/* 802.11n */
+#define IE_ADD_HT                         61	/* 802.11n d1. ADDITIONAL HT CAPABILITY. ELEMENT ID TBD */
+#define IE_ADD_HT2                        53	/* 802.11n d1. ADDITIONAL HT CAPABILITY. ELEMENT ID TBD */
+
+/* For 802.11n D3.03 */
+/*#define IE_NEW_EXT_CHA_OFFSET             62    // 802.11n d1. New extension channel offset elemet */
+#define IE_SECONDARY_CH_OFFSET		62	/* 802.11n D3.03        Secondary Channel Offset element */
+#define IE_WAPI							68	/* WAPI information element. Same as Bss Ac Access Dealy Element. */
+#define IE_2040_BSS_COEXIST               72	/* 802.11n D3.0.3 */
+#define IE_2040_BSS_INTOLERANT_REPORT     73	/* 802.11n D3.03 */
+#define IE_OVERLAPBSS_SCAN_PARM           74	/* 802.11n D3.03 */
+#define IE_CHANNEL_USAGE					97	/* Cisco advertises suggested channel using this IE. */
+#define IE_EXT_CAPABILITY                127	/* 802.11n D3.03 */
+
+#define IE_WPA                          221	/* WPA */
+#define IE_VENDOR_SPECIFIC              221	/* Wifi WMM (WME) */
+#define	IE_WFA_WSC							221
+
+#define OUI_BROADCOM_HT              51	/* */
+#define OUI_BROADCOM_HTADD           52	/* */
+#define OUI_PREN_HT_CAP              51	/* */
+#define OUI_PREN_ADD_HT              52	/* */
+
+/* CCX information */
+#define IE_AIRONET_CKIP                 133	/* CCX1.0 ID 85H for CKIP */
+#define IE_AP_TX_POWER                  150	/* CCX 2.0 for AP transmit power */
+#define IE_MEASUREMENT_CAPABILITY       221	/* CCX 2.0 */
+#define IE_CCX_V2                       221
+#define IE_AIRONET_IPADDRESS            149	/* CCX ID 95H for IP Address */
+#define IE_AIRONET_CCKMREASSOC          156	/* CCX ID 9CH for CCKM Reassociation Request element */
+#define CKIP_NEGOTIATION_LENGTH         30
+#define AIRONET_IPADDRESS_LENGTH        10
+#define AIRONET_CCKMREASSOC_LENGTH      24
+
+/* ======================================================== */
+/* MLME state machine definition */
+/* ======================================================== */
+
+/* STA MLME state mahcines */
+#define ASSOC_STATE_MACHINE             1
+#define AUTH_STATE_MACHINE              2
+#define AUTH_RSP_STATE_MACHINE          3
+#define SYNC_STATE_MACHINE              4
+#define MLME_CNTL_STATE_MACHINE         5
+#define WPA_PSK_STATE_MACHINE           6
+/*#define LEAP_STATE_MACHINE              7 */
+#define AIRONET_STATE_MACHINE           8
+#define ACTION_STATE_MACHINE           9
+
+/* AP MLME state machines */
+#define AP_ASSOC_STATE_MACHINE          11
+#define AP_AUTH_STATE_MACHINE           12
+#define AP_SYNC_STATE_MACHINE           14
+#define AP_CNTL_STATE_MACHINE           15
+#define WSC_STATE_MACHINE            17
+#define WSC_UPNP_STATE_MACHINE		    18
+
+
+#define WPA_STATE_MACHINE            		23
+
+
+#ifdef QOS_DLS_SUPPORT
+#define DLS_STATE_MACHINE               26
+#endif /* QOS_DLS_SUPPORT */
+
+
+
+
+
+
+/* */
+/* STA's CONTROL/CONNECT state machine: states, events, total function # */
+/* */
+#define CNTL_IDLE                       0
+#define CNTL_WAIT_DISASSOC              1
+#define CNTL_WAIT_JOIN                  2
+#define CNTL_WAIT_REASSOC               3
+#define CNTL_WAIT_START                 4
+#define CNTL_WAIT_AUTH                  5
+#define CNTL_WAIT_ASSOC                 6
+#define CNTL_WAIT_AUTH2                 7
+#define CNTL_WAIT_OID_LIST_SCAN         8
+#define CNTL_WAIT_OID_DISASSOC          9
+#ifdef RTMP_MAC_USB
+#define CNTL_WAIT_SCAN_FOR_CONNECT      10
+#endif /* RTMP_MAC_USB */
+
+#define MT2_ASSOC_CONF                  34
+#define MT2_AUTH_CONF                   35
+#define MT2_DEAUTH_CONF                 36
+#define MT2_DISASSOC_CONF               37
+#define MT2_REASSOC_CONF                38
+#define MT2_PWR_MGMT_CONF               39
+#define MT2_JOIN_CONF                   40
+#define MT2_SCAN_CONF                   41
+#define MT2_START_CONF                  42
+#define MT2_GET_CONF                    43
+#define MT2_SET_CONF                    44
+#define MT2_RESET_CONF                  45
+#define MT2_FT_OTD_CONF					46
+#define MT2_MLME_ROAMING_REQ            52
+
+#define CNTL_FUNC_SIZE                  1
+
+/* */
+/* STA's ASSOC state machine: states, events, total function # */
+/* */
+#define ASSOC_IDLE                      0
+#define ASSOC_WAIT_RSP                  1
+#define REASSOC_WAIT_RSP                2
+#define DISASSOC_WAIT_RSP               3
+#define MAX_ASSOC_STATE                 4
+
+#define ASSOC_MACHINE_BASE              0
+#define MT2_MLME_ASSOC_REQ              0
+#define MT2_MLME_REASSOC_REQ            1
+#define MT2_MLME_DISASSOC_REQ           2
+#define MT2_PEER_DISASSOC_REQ           3
+#define MT2_PEER_ASSOC_REQ              4
+#define MT2_PEER_ASSOC_RSP              5
+#define MT2_PEER_REASSOC_REQ            6
+#define MT2_PEER_REASSOC_RSP            7
+#define MT2_DISASSOC_TIMEOUT            8
+#define MT2_ASSOC_TIMEOUT               9
+#define MT2_REASSOC_TIMEOUT             10
+#define MAX_ASSOC_MSG                   11
+
+#define ASSOC_FUNC_SIZE                 (MAX_ASSOC_STATE * MAX_ASSOC_MSG)
+
+/* */
+/* ACT state machine: states, events, total function # */
+/* */
+#define ACT_IDLE                      0
+#define MAX_ACT_STATE                 1
+
+#define ACT_MACHINE_BASE              0
+
+/* Those PEER_xx_CATE number is based on real Categary value in IEEE spec. 
+   Please doesn't modify it by yourself. */
+/*Category */
+#define MT2_PEER_SPECTRUM_CATE              0
+#define MT2_PEER_QOS_CATE              1
+#define MT2_PEER_DLS_CATE             2
+#define MT2_PEER_BA_CATE             3
+#define MT2_PEER_PUBLIC_CATE             4
+#define MT2_PEER_RM_CATE             5
+/* "FT_CATEGORY_BSS_TRANSITION equal to 6" is defined file of "dot11r_ft.h" */
+#define MT2_PEER_HT_CATE             7	/*      7.4.7 */
+#define MT2_PEER_PMF_CATE				8	/* defined in IEEE 802.11w-D8.0 7.3.1.11 */
+#define MT2_PEER_RESV_9					9
+#define MT2_PEER_RESV_10				10
+#define MT2_PEER_RESV_11				11
+#define MT2_PEER_RESV_12				12
+#define MT2_PEER_RESV_13				13
+#define MT2_PEER_RESV_14				14
+#define MT2_PEER_RESV_15				15
+#define MT2_PEER_RESV_16				16
+/*
+	In WMM spec v1.1. the category must be 17
+	(see Table 7 Management Action Frame Fields)
+*/
+#define MT2_PEER_WMM					17
+#define MAX_IEEE_STD_CATE				17	/* Indicate the maximum category code defined in IEEE-802.11-Std */
+#define MAX_PEER_CATE_MSG				MAX_IEEE_STD_CATE
+
+#define MT2_MLME_ADD_BA_CATE            (MAX_IEEE_STD_CATE + 1)
+#define MT2_MLME_ORI_DELBA_CATE         (MAX_IEEE_STD_CATE + 2)
+#define MT2_MLME_REC_DELBA_CATE         (MAX_IEEE_STD_CATE + 3)
+#define MT2_MLME_QOS_CATE              	(MAX_IEEE_STD_CATE + 4)
+#define MT2_MLME_DLS_CATE             	(MAX_IEEE_STD_CATE + 5)
+#define MT2_ACT_INVALID             	(MAX_IEEE_STD_CATE + 6)
+
+#define MAX_ACT_MSG                   	(MAX_IEEE_STD_CATE + 7)
+
+
+#define MT2_ACT_VENDOR					0x7F
+
+/*Category field */
+#define CATEGORY_SPECTRUM		0
+#define CATEGORY_QOS			1
+#define CATEGORY_DLS			2
+#define CATEGORY_BA			3
+#define CATEGORY_PUBLIC		4
+#define CATEGORY_RM			5
+#define CATEGORY_FT			6
+#define CATEGORY_HT			7
+#define CATEGORY_PMF			8	/* defined in IEEE 802.11w-D8.0 7.3.1.11 */
+
+/* DLS Action frame definition */
+#define ACTION_DLS_REQUEST			0
+#define ACTION_DLS_RESPONSE			1
+#define ACTION_DLS_TEARDOWN			2
+
+/*Spectrum  Action field value 802.11h 7.4.1 */
+#define SPEC_MRQ	0	/* Request */
+#define SPEC_MRP	1	/*Report */
+#define SPEC_TPCRQ	2
+#define SPEC_TPCRP	3
+#define SPEC_CHANNEL_SWITCH	4
+
+/*BA  Action field value */
+#define ADDBA_REQ	0
+#define ADDBA_RESP	1
+#define DELBA   2
+
+/*Public's  Action field value in Public Category.  Some in 802.11y and some in 11n */
+#define ACTION_BSS_2040_COEXIST				0	/* 11n */
+#define ACTION_DSE_ENABLEMENT					1	/* 11y D9.0 */
+#define ACTION_DSE_DEENABLEMENT				2	/* 11y D9.0 */
+#define ACTION_DSE_REG_LOCATION_ANNOUNCE	3	/* 11y D9.0 */
+#define ACTION_EXT_CH_SWITCH_ANNOUNCE		4	/* 11y D9.0 */
+#define ACTION_DSE_MEASUREMENT_REQ			5	/* 11y D9.0 */
+#define ACTION_DSE_MEASUREMENT_REPORT		6	/* 11y D9.0 */
+#define ACTION_MEASUREMENT_PILOT_ACTION		7	/* 11y D9.0 */
+#define ACTION_DSE_POWER_CONSTRAINT			8	/* 11y D9.0 */
+#define ACTION_WIFI_DIRECT						9 	/* 11y */
+#define ACTION_VENDOR_USAGE					221
+
+/*HT  Action field value */
+#define NOTIFY_BW_ACTION				0
+#define SMPS_ACTION						1
+#define PSMP_ACTION   					2
+#define SETPCO_ACTION					3
+#define MIMO_CHA_MEASURE_ACTION			4
+#define MIMO_N_BEACONFORM				5
+#define MIMO_BEACONFORM					6
+#define ANTENNA_SELECT					7
+#define HT_INFO_EXCHANGE				8
+
+#define ACT_FUNC_SIZE                 (MAX_ACT_STATE * MAX_ACT_MSG)
+/* */
+/* STA's AUTHENTICATION state machine: states, evvents, total function # */
+/* */
+#define AUTH_REQ_IDLE                   0
+#define AUTH_WAIT_SEQ2                  1
+#define AUTH_WAIT_SEQ4                  2
+#define MAX_AUTH_STATE                  3
+
+#define AUTH_MACHINE_BASE               0
+#define MT2_MLME_AUTH_REQ               0
+#define MT2_PEER_AUTH_EVEN              1
+#define MT2_AUTH_TIMEOUT                2
+#define MAX_AUTH_MSG                    3
+
+#define AUTH_FUNC_SIZE                  (MAX_AUTH_STATE * MAX_AUTH_MSG)
+
+/* */
+/* STA's AUTH_RSP state machine: states, events, total function # */
+/* */
+#define AUTH_RSP_IDLE                   0
+#define AUTH_RSP_WAIT_CHAL              1
+#define MAX_AUTH_RSP_STATE              2
+
+#define AUTH_RSP_MACHINE_BASE           0
+#define MT2_AUTH_CHALLENGE_TIMEOUT      0
+#define MT2_PEER_AUTH_ODD               1
+#define MT2_PEER_DEAUTH                 2
+#define MAX_AUTH_RSP_MSG                3
+
+#define AUTH_RSP_FUNC_SIZE              (MAX_AUTH_RSP_STATE * MAX_AUTH_RSP_MSG)
+
+/* */
+/* STA's SYNC state machine: states, events, total function # */
+/* */
+#define SYNC_IDLE                       0	/* merge NO_BSS,IBSS_IDLE,IBSS_ACTIVE and BSS in to 1 state */
+#define JOIN_WAIT_BEACON                1
+#define SCAN_LISTEN                     2
+#define SCAN_PENDING                    3
+#define MAX_SYNC_STATE                  4
+
+#define SYNC_MACHINE_BASE               0
+#define MT2_MLME_SCAN_REQ               0
+#define MT2_MLME_JOIN_REQ               1
+#define MT2_MLME_START_REQ              2
+#define MT2_PEER_BEACON                 3
+#define MT2_PEER_PROBE_RSP              4
+#define MT2_PEER_ATIM                   5
+#define MT2_SCAN_TIMEOUT                6
+#define MT2_BEACON_TIMEOUT              7
+#define MT2_ATIM_TIMEOUT                8
+#define MT2_PEER_PROBE_REQ              9
+#define MAX_SYNC_MSG                    10
+
+#define SYNC_FUNC_SIZE                  (MAX_SYNC_STATE * MAX_SYNC_MSG)
+
+/*Messages for the DLS state machine */
+#define DLS_IDLE						0
+#define MAX_DLS_STATE					1
+
+#define DLS_MACHINE_BASE				0
+#define MT2_MLME_DLS_REQ			    0
+#define MT2_PEER_DLS_REQ			    1
+#define MT2_PEER_DLS_RSP			    2
+#define MT2_MLME_DLS_TEAR_DOWN		    3
+#define MT2_PEER_DLS_TEAR_DOWN		    4
+#define MAX_DLS_MSG				        5
+
+#define DLS_FUNC_SIZE					(MAX_DLS_STATE * MAX_DLS_MSG)
+
+
+/* */
+/* WSC State machine: states, events, total function # */
+/* */
+
+/* */
+/* AP's CONTROL/CONNECT state machine: states, events, total function # */
+/* */
+#define AP_CNTL_FUNC_SIZE               1
+
+/* */
+/* AP's ASSOC state machine: states, events, total function # */
+/* */
+#define AP_ASSOC_IDLE                   0
+#define AP_MAX_ASSOC_STATE              1
+
+#define AP_ASSOC_MACHINE_BASE           0
+#define APMT2_MLME_DISASSOC_REQ         0
+#define APMT2_PEER_DISASSOC_REQ         1
+#define APMT2_PEER_ASSOC_REQ            2
+#define APMT2_PEER_REASSOC_REQ          3
+#define APMT2_CLS3ERR                   4
+#define AP_MAX_ASSOC_MSG                5
+
+#define AP_ASSOC_FUNC_SIZE              (AP_MAX_ASSOC_STATE * AP_MAX_ASSOC_MSG)
+
+/* */
+/* AP's AUTHENTICATION state machine: states, events, total function # */
+/* */
+#define AP_AUTH_REQ_IDLE                0
+#define AP_MAX_AUTH_STATE               1
+
+#define AP_AUTH_MACHINE_BASE            0
+#define APMT2_MLME_DEAUTH_REQ           0
+#define APMT2_CLS2ERR                   1
+#define APMT2_PEER_DEAUTH				2
+#define APMT2_PEER_AUTH_REQ				3
+#define APMT2_PEER_AUTH_CONFIRM			4
+#define AP_MAX_AUTH_MSG                 5
+
+#define AP_AUTH_FUNC_SIZE               (AP_MAX_AUTH_STATE * AP_MAX_AUTH_MSG)
+
+/* */
+/* AP's SYNC state machine: states, events, total function # */
+/* */
+#define AP_SYNC_IDLE                    0
+#ifdef AP_SCAN_SUPPORT
+#define AP_SCAN_LISTEN					1
+#define AP_MAX_SYNC_STATE               2
+#else
+#define AP_MAX_SYNC_STATE               1
+#endif
+
+#define AP_SYNC_MACHINE_BASE		0
+#define APMT2_PEER_PROBE_REQ		0
+#define APMT2_PEER_BEACON			1
+#define APMT2_PEER_PROBE_RSP		2
+#ifdef AP_SCAN_SUPPORT
+#define APMT2_MLME_SCAN_REQ		3
+#define APMT2_SCAN_TIMEOUT		4
+#define APMT2_MLME_SCAN_CNCL		5
+#define AP_MAX_SYNC_MSG			6
+#else
+#define AP_MAX_SYNC_MSG			3
+#endif
+
+#define AP_SYNC_FUNC_SIZE               (AP_MAX_SYNC_STATE * AP_MAX_SYNC_MSG)
+
+#ifdef APCLI_SUPPORT
+/*ApCli authentication state machine */
+#define APCLI_AUTH_REQ_IDLE                0
+#define APCLI_AUTH_WAIT_SEQ2               1
+#define APCLI_AUTH_WAIT_SEQ4               2
+#define APCLI_MAX_AUTH_STATE               3
+
+#define APCLI_AUTH_MACHINE_BASE            0
+#define APCLI_MT2_MLME_AUTH_REQ            0
+#define APCLI_MT2_MLME_DEAUTH_REQ          1
+#define APCLI_MT2_PEER_AUTH_EVEN           2
+#define APCLI_MT2_PEER_DEAUTH              3
+#define APCLI_MT2_AUTH_TIMEOUT             4
+#define APCLI_MAX_AUTH_MSG                 5
+
+#define APCLI_AUTH_FUNC_SIZE               (APCLI_MAX_AUTH_STATE * APCLI_MAX_AUTH_MSG)
+
+/*ApCli association state machine */
+#define APCLI_ASSOC_IDLE                   0
+#define APCLI_ASSOC_WAIT_RSP               1
+#define APCLI_MAX_ASSOC_STATE              2
+
+#define APCLI_ASSOC_MACHINE_BASE           0
+#define APCLI_MT2_MLME_ASSOC_REQ           0
+#define APCLI_MT2_MLME_DISASSOC_REQ        1
+#define APCLI_MT2_PEER_DISASSOC_REQ        2
+#define APCLI_MT2_PEER_ASSOC_RSP           3
+#define APCLI_MT2_ASSOC_TIMEOUT            4
+#define APCLI_MAX_ASSOC_MSG                5
+
+#define APCLI_ASSOC_FUNC_SIZE              (APCLI_MAX_ASSOC_STATE * APCLI_MAX_ASSOC_MSG)
+
+/*ApCli sync state machine */
+#define APCLI_SYNC_IDLE                   0	/* merge NO_BSS,IBSS_IDLE,IBSS_ACTIVE and BSS in to 1 state */
+#define APCLI_JOIN_WAIT_PROBE_RSP         1
+#define APCLI_MAX_SYNC_STATE              2
+
+#define APCLI_SYNC_MACHINE_BASE           0
+#define APCLI_MT2_MLME_PROBE_REQ          0
+#define APCLI_MT2_PEER_PROBE_RSP          1
+#define APCLI_MT2_PEER_BEACON			2
+#define APCLI_MT2_PROBE_TIMEOUT           3
+#define APCLI_MAX_SYNC_MSG                4
+
+#define APCLI_SYNC_FUNC_SIZE              (APCLI_MAX_SYNC_STATE * APCLI_MAX_SYNC_MSG)
+
+/*ApCli ctrl state machine */
+#define APCLI_CTRL_DISCONNECTED           0	/* merge NO_BSS,IBSS_IDLE,IBSS_ACTIVE and BSS in to 1 state */
+#define APCLI_CTRL_PROBE                  1
+#define APCLI_CTRL_AUTH                   2
+#define APCLI_CTRL_AUTH_2                 3
+#define APCLI_CTRL_ASSOC                  4
+#define APCLI_CTRL_DEASSOC                5
+#define APCLI_CTRL_CONNECTED              6
+#define APCLI_MAX_CTRL_STATE              7
+
+#define APCLI_CTRL_MACHINE_BASE           0
+#define APCLI_CTRL_JOIN_REQ               0
+#define APCLI_CTRL_PROBE_RSP              1
+#define APCLI_CTRL_AUTH_RSP               2
+#define APCLI_CTRL_DISCONNECT_REQ         3
+#define APCLI_CTRL_PEER_DISCONNECT_REQ    4
+#define APCLI_CTRL_ASSOC_RSP              5
+#define APCLI_CTRL_DEASSOC_RSP            6
+#define APCLI_CTRL_JOIN_REQ_TIMEOUT       7
+#define APCLI_CTRL_AUTH_REQ_TIMEOUT       8
+#define APCLI_CTRL_ASSOC_REQ_TIMEOUT      9
+#define APCLI_MAX_CTRL_MSG                10
+
+#define APCLI_CTRL_FUNC_SIZE              (APCLI_MAX_CTRL_STATE * APCLI_MAX_CTRL_MSG)
+
+
+#endif /* APCLI_SUPPORT */
+
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+
+/* ============================================================================= */
+
+
+/* value domain of 802.11 MGMT frame's FC.subtype, which is b7..4 of the 1st-byte of MAC header */
+#define SUBTYPE_ASSOC_REQ           0
+#define SUBTYPE_ASSOC_RSP           1
+#define SUBTYPE_REASSOC_REQ         2
+#define SUBTYPE_REASSOC_RSP         3
+#define SUBTYPE_PROBE_REQ           4
+#define SUBTYPE_PROBE_RSP           5
+#define SUBTYPE_BEACON              8
+#define SUBTYPE_ATIM                9
+#define SUBTYPE_DISASSOC            10
+#define SUBTYPE_AUTH                11
+#define SUBTYPE_DEAUTH              12
+#define SUBTYPE_ACTION              13
+#define SUBTYPE_ACTION_NO_ACK              14
+
+/* value domain of 802.11 CNTL frame's FC.subtype, which is b7..4 of the 1st-byte of MAC header */
+#define SUBTYPE_WRAPPER       	7
+#define SUBTYPE_BLOCK_ACK_REQ       8
+#define SUBTYPE_BLOCK_ACK           9
+#define SUBTYPE_PS_POLL             10
+#define SUBTYPE_RTS                 11
+#define SUBTYPE_CTS                 12
+#define SUBTYPE_ACK                 13
+#define SUBTYPE_CFEND               14
+#define SUBTYPE_CFEND_CFACK         15
+
+/* value domain of 802.11 DATA frame's FC.subtype, which is b7..4 of the 1st-byte of MAC header */
+#define SUBTYPE_DATA                0
+#define SUBTYPE_DATA_CFACK          1
+#define SUBTYPE_DATA_CFPOLL         2
+#define SUBTYPE_DATA_CFACK_CFPOLL   3
+#define SUBTYPE_NULL_FUNC           4
+#define SUBTYPE_CFACK               5
+#define SUBTYPE_CFPOLL              6
+#define SUBTYPE_CFACK_CFPOLL        7
+#define SUBTYPE_QDATA               8
+#define SUBTYPE_QDATA_CFACK         9
+#define SUBTYPE_QDATA_CFPOLL        10
+#define SUBTYPE_QDATA_CFACK_CFPOLL  11
+#define SUBTYPE_QOS_NULL            12
+#define SUBTYPE_QOS_CFACK           13
+#define SUBTYPE_QOS_CFPOLL          14
+#define SUBTYPE_QOS_CFACK_CFPOLL    15
+
+/* ACK policy of QOS Control field bit 6:5 */
+#define NORMAL_ACK                  0x00	/* b6:5 = 00 */
+#define NO_ACK                      0x20	/* b6:5 = 01 */
+#define NO_EXPLICIT_ACK             0x40	/* b6:5 = 10 */
+#define BLOCK_ACK                   0x60	/* b6:5 = 11 */
+
+#ifdef USB_BULK_BUF_ALIGMENT
+#define BUF_ALIGMENT_RINGSIZE         6	/*BUF_ALIGMENT_RINGSIZE must  >= 3 */
+#endif /* USB_BULK_BUF_ALIGMENT */
+
+
+/* STA_CSR4.field.TxResult */
+#define TX_RESULT_SUCCESS           0
+#define TX_RESULT_ZERO_LENGTH       1
+#define TX_RESULT_UNDER_RUN         2
+#define TX_RESULT_OHY_ERROR         4
+#define TX_RESULT_RETRY_FAIL        6
+
+
+/* MCS for CCK.  BW.SGI.STBC are reserved */
+#define MCS_LONGP_RATE_1                      0	/* long preamble CCK 1Mbps */
+#define MCS_LONGP_RATE_2                      1	/* long preamble CCK 1Mbps */
+#define MCS_LONGP_RATE_5_5                    2
+#define MCS_LONGP_RATE_11                     3
+#define MCS_SHORTP_RATE_1                      4	/* long preamble CCK 1Mbps. short is forbidden in 1Mbps */
+#define MCS_SHORTP_RATE_2                      5	/* short preamble CCK 2Mbps */
+#define MCS_SHORTP_RATE_5_5                    6
+#define MCS_SHORTP_RATE_11                     7
+/* To send duplicate legacy OFDM. set BW=BW_40.  SGI.STBC are reserved */
+#define MCS_RATE_6                      0	/* legacy OFDM */
+#define MCS_RATE_9                      1	/* OFDM */
+#define MCS_RATE_12                     2	/* OFDM */
+#define MCS_RATE_18                     3	/* OFDM */
+#define MCS_RATE_24                     4	/* OFDM */
+#define MCS_RATE_36                     5	/* OFDM */
+#define MCS_RATE_48                     6	/* OFDM */
+#define MCS_RATE_54                     7	/* OFDM */
+/* HT */
+#define MCS_0		0	/* 1S */
+#define MCS_1		1
+#define MCS_2		2
+#define MCS_3		3
+#define MCS_4		4
+#define MCS_5		5
+#define MCS_6		6
+#define MCS_7		7
+#define MCS_8		8	/* 2S */
+#define MCS_9		9
+#define MCS_10		10
+#define MCS_11		11
+#define MCS_12		12
+#define MCS_13		13
+#define MCS_14		14
+#define MCS_15		15
+#define MCS_16		16	/* 3*3 */
+#define MCS_17		17
+#define MCS_18		18
+#define MCS_19		19
+#define MCS_20		20
+#define MCS_21		21
+#define MCS_22		22
+#define MCS_23		23
+#define MCS_32		32
+#define MCS_AUTO		33
+
+#ifdef DOT11_N_SUPPORT
+/* OID_HTPHYMODE */
+/* MODE */
+#define HTMODE_MM	0
+#define HTMODE_GF	1
+#endif /* DOT11_N_SUPPORT */
+
+/* Fixed Tx MODE - HT, CCK or OFDM */
+#define FIXED_TXMODE_HT		0
+#define FIXED_TXMODE_CCK	1
+#define FIXED_TXMODE_OFDM 	2
+/* BW */
+#define BW_20		BAND_WIDTH_20
+#define BW_40		BAND_WIDTH_40
+#define BW_BOTH		BAND_WIDTH_BOTH
+#define BW_10		BAND_WIDTH_10	/* 802.11j has 10MHz. This definition is for internal usage. doesn't fill in the IE or other field. */
+
+#ifdef DOT11_N_SUPPORT
+/* SHORTGI */
+#define GI_400		GAP_INTERVAL_400	/* only support in HT mode */
+#define GI_BOTH		GAP_INTERVAL_BOTH
+#endif /* DOT11_N_SUPPORT */
+#define GI_800		GAP_INTERVAL_800
+/* STBC */
+#define STBC_NONE	0
+#ifdef DOT11_N_SUPPORT
+#define STBC_USE	1	/* limited use in rt2860b phy */
+#define RXSTBC_ONE	1	/* rx support of one spatial stream */
+#define RXSTBC_TWO	2	/* rx support of 1 and 2 spatial stream */
+#define RXSTBC_THR	3	/* rx support of 1~3 spatial stream */
+/* MCS FEEDBACK */
+#define MCSFBK_NONE	0	/* not support mcs feedback / */
+#define MCSFBK_RSV	1	/* reserved */
+#define MCSFBK_UNSOLICIT	2	/* only support unsolict mcs feedback */
+#define MCSFBK_MRQ	3	/* response to both MRQ and unsolict mcs feedback */
+
+/* MIMO power safe */
+#define	MMPS_STATIC	0
+#define	MMPS_DYNAMIC		1
+#define   MMPS_RSV		2
+#define MMPS_ENABLE		3
+
+/* A-MSDU size */
+#define	AMSDU_0	0
+#define	AMSDU_1		1
+
+#endif /* DOT11_N_SUPPORT */
+
+/* MCS use 7 bits */
+#define TXRATEMIMO		0x80
+#define TXRATEMCS		0x7F
+#define TXRATEOFDM		0x7F
+#define RATE_1                      0
+#define RATE_2                      1
+#define RATE_5_5                    2
+#define RATE_11                     3
+#define RATE_6                      4	/* OFDM */
+#define RATE_9                      5	/* OFDM */
+#define RATE_12                     6	/* OFDM */
+#define RATE_18                     7	/* OFDM */
+#define RATE_24                     8	/* OFDM */
+#define RATE_36                     9	/* OFDM */
+#define RATE_48                     10	/* OFDM */
+#define RATE_54                     11	/* OFDM */
+#define RATE_FIRST_OFDM_RATE        RATE_6
+#define RATE_LAST_OFDM_RATE        	RATE_54
+#define RATE_6_5                    12	/* HT mix */
+#define RATE_13                     13	/* HT mix */
+#define RATE_19_5                   14	/* HT mix */
+#define RATE_26                     15	/* HT mix */
+#define RATE_39                     16	/* HT mix */
+#define RATE_52                     17	/* HT mix */
+#define RATE_58_5                   18	/* HT mix */
+#define RATE_65                     19	/* HT mix */
+#define RATE_78                     20	/* HT mix */
+#define RATE_104                    21	/* HT mix */
+#define RATE_117                    22	/* HT mix */
+#define RATE_130                    23	/* HT mix */
+/*#define RATE_AUTO_SWITCH            255 // for StaCfg.FixedTxRate only */
+#define HTRATE_0                      12
+#define RATE_FIRST_MM_RATE        HTRATE_0
+#define RATE_FIRST_HT_RATE        HTRATE_0
+#define RATE_LAST_HT_RATE        HTRATE_0
+
+/* pTxWI->txop */
+#define IFS_HTTXOP                 0	/* The txop will be handles by ASIC. */
+#define IFS_PIFS                    1
+#define IFS_SIFS                    2
+#define IFS_BACKOFF                 3
+
+/* pTxD->RetryMode */
+#define LONG_RETRY                  1
+#define SHORT_RETRY                 0
+
+/* Country Region definition */
+#define REGION_MINIMUM_BG_BAND            0
+#define REGION_0_BG_BAND                  0	/* 1-11 */
+#define REGION_1_BG_BAND                  1	/* 1-13 */
+#define REGION_2_BG_BAND                  2	/* 10-11 */
+#define REGION_3_BG_BAND                  3	/* 10-13 */
+#define REGION_4_BG_BAND                  4	/* 14 */
+#define REGION_5_BG_BAND                  5	/* 1-14 */
+#define REGION_6_BG_BAND                  6	/* 3-9 */
+#define REGION_7_BG_BAND                  7	/* 5-13 */
+#define REGION_31_BG_BAND                 31	/* 5-13 */
+#define REGION_32_BG_BAND                 32	/* 1 - 13 */
+#define REGION_33_BG_BAND                 33	/* 1 - 14 */
+#define REGION_MAXIMUM_BG_BAND            7
+
+#define REGION_MINIMUM_A_BAND             0
+#define REGION_0_A_BAND                   0	/* 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165 */
+#define REGION_1_A_BAND                   1	/* 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140 */
+#define REGION_2_A_BAND                   2	/* 36, 40, 44, 48, 52, 56, 60, 64 */
+#define REGION_3_A_BAND                   3	/* 52, 56, 60, 64, 149, 153, 157, 161 */
+#define REGION_4_A_BAND                   4	/* 149, 153, 157, 161, 165 */
+#define REGION_5_A_BAND                   5	/* 149, 153, 157, 161 */
+#define REGION_6_A_BAND                   6	/* 36, 40, 44, 48 */
+#define REGION_7_A_BAND                   7	/* 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165, 169, 173 */
+#define REGION_8_A_BAND                   8	/* 52, 56, 60, 64 */
+#define REGION_9_A_BAND                   9	/* 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165 */
+#define REGION_10_A_BAND                  10	/* 36, 40, 44, 48, 149, 153, 157, 161, 165 */
+#define REGION_11_A_BAND                  11	/* 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 149, 153, 157, 161 */
+#define REGION_12_A_BAND                  12	/* 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140 */
+#define REGION_13_A_BAND                  13	/* 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161 */
+#define REGION_14_A_BAND                  14	/* 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165 */
+#define REGION_15_A_BAND                  15	/* 149, 153, 157, 161, 165, 169, 173 */
+#define REGION_16_A_BAND                  16	/* 52, 56, 60, 64, 149, 153, 157, 161, 165 */
+#define REGION_17_A_BAND                  17
+#define REGION_18_A_BAND                  18
+#define REGION_19_A_BAND                  19
+#define REGION_20_A_BAND                  20
+#define REGION_21_A_BAND                  21
+#define REGION_MAXIMUM_A_BAND             37
+
+/* The security mode definition in MAC register */
+#define CIPHER_NONE                 0
+#define CIPHER_WEP64                1
+#define CIPHER_WEP128               2
+#define CIPHER_TKIP                 3
+#define CIPHER_AES                  4
+#define CIPHER_CKIP64               5
+#define CIPHER_CKIP128              6
+#define CIPHER_CKIP152          	7
+#define CIPHER_SMS4					8
+
+
+
+/* RC4 init value, used fro WEP & TKIP */
+#define PPPINITFCS32                0xffffffff	/* Initial FCS value */
+
+/* value domain of pAd->StaCfg.PortSecured. 802.1X controlled port definition */
+#define WPA_802_1X_PORT_SECURED     1
+#define WPA_802_1X_PORT_NOT_SECURED 2
+
+#define PAIRWISE_KEY                1
+#define GROUP_KEY                   2
+
+/*definition of DRS */
+#define MAX_STEP_OF_TX_RATE_SWITCH	32
+
+/* pre-allocated free NDIS PACKET/BUFFER poll for internal usage */
+#define MAX_NUM_OF_FREE_NDIS_PACKET 128
+
+/*Block ACK */
+#define MAX_TX_REORDERBUF   64
+#define MAX_RX_REORDERBUF   64
+#define DEFAULT_TX_TIMEOUT   30
+#define DEFAULT_RX_TIMEOUT   30
+
+#ifdef VCORECAL_SUPPORT
+#define DEFAULT_VCO_RECALIBRATION_THRESHOLD	1
+#endif /* VCORECAL_SUPPORT */
+
+/* definition of Recipient or Originator */
+#define I_RECIPIENT                  TRUE
+#define I_ORIGINATOR                   FALSE
+
+#define DEFAULT_BBP_TX_POWER        0
+#define DEFAULT_RF_TX_POWER         5
+#define DEFAULT_BBP_TX_FINE_POWER_CTRL 0
+
+#define MAX_INI_BUFFER_SIZE		4096
+#define MAX_PARAM_BUFFER_SIZE		(2048)	/* enough for ACL (18*64) */
+											/*18 : the length of Mac address acceptable format "01:02:03:04:05:06;") */
+											/*64 : MAX_NUM_OF_ACL_LIST */
+
+#ifdef RT_BIG_ENDIAN
+#define DIR_READ                    0
+#define DIR_WRITE                   1
+#define TYPE_TXD                    0
+#define TYPE_RXD                    1
+#define TYPE_TXINFO					0
+#define TYPE_RXINFO					1
+#define TYPE_TXWI					0
+#define TYPE_RXWI					1
+#endif
+
+/* ========================= AP rtmp_def.h =========================== */
+/* value domain for pAd->EventTab.Log[].Event */
+#define EVENT_RESET_ACCESS_POINT    0	/* Log = "hh:mm:ss   Restart Access Point" */
+#define EVENT_ASSOCIATED            1	/* Log = "hh:mm:ss   STA 00:01:02:03:04:05 associated" */
+#define EVENT_DISASSOCIATED         2	/* Log = "hh:mm:ss   STA 00:01:02:03:04:05 left this BSS" */
+#define EVENT_AGED_OUT              3	/* Log = "hh:mm:ss   STA 00:01:02:03:04:05 was aged-out and removed from this BSS" */
+#define EVENT_COUNTER_M             4
+#define EVENT_INVALID_PSK           5
+#define EVENT_MAX_EVENT_TYPE        6
+/* ==== end of AP rtmp_def.h ============ */
+
+/* definition RSSI Number */
+#define RSSI_0					0
+#define RSSI_1					1
+#define RSSI_2					2
+
+/* definition of radar detection */
+#define RD_NORMAL_MODE				0	/* Not found radar signal */
+#define RD_SWITCHING_MODE			1	/* Found radar signal, and doing channel switch */
+#define RD_SILENCE_MODE				2	/* After channel switch, need to be silence a while to ensure radar not found */
+
+/*Driver defined cid for mapping status and command. */
+#define  SLEEPCID	0x11
+#define  WAKECID	0x22
+#define  QUERYPOWERCID	0x33
+#define  OWNERMCU	0x1
+#define  OWNERCPU	0x0
+
+/* MBSSID definition */
+#define ENTRY_NOT_FOUND             0xFF
+
+/* The signal threshold (RSSI) over new rate adaption */
+#define SIGNAL_THRESHOLD_OVER_NEW_RATE_ADAPT    -65
+
+/* After Linux 2.6.9, 
+ * VLAN module use Private (from user) interface flags (netdevice->priv_flags). 
+ * #define IFF_802_1Q_VLAN 0x1         --    802.1Q VLAN device.  in if.h     
+ * ref to ip_sabotage_out() [ out->priv_flags & IFF_802_1Q_VLAN ] in br_netfilter.c
+ * 
+ * For this reason, we MUST use EVEN value in priv_flags
+ */
+#define INT_MAIN			0x0100
+#define INT_MBSSID			0x0200
+#define INT_WDS				0x0300
+#define INT_APCLI			0x0400
+#define INT_MESH			0x0500
+#define INT_P2P				0x0600
+
+#define ENTRY_NONE			0
+#define ENTRY_CLIENT		1
+#define ENTRY_WDS			2
+#define ENTRY_APCLI			3
+#define ENTRY_MESH			4
+#define ENTRY_DLS			5
+#define ENTRY_TDLS			6
+
+
+#define IS_ENTRY_NONE(_x)		((_x)->EntryType == ENTRY_NONE)
+#define IS_ENTRY_CLIENT(_x)		((_x)->EntryType == ENTRY_CLIENT)
+#define IS_ENTRY_WDS(_x)		((_x)->EntryType == ENTRY_WDS)
+#define IS_ENTRY_APCLI(_x)		((_x)->EntryType == ENTRY_APCLI)
+#define IS_ENTRY_MESH(_x)		((_x)->EntryType == ENTRY_MESH)
+#define IS_ENTRY_DLS(_x)		((_x)->EntryType == ENTRY_DLS)
+#define IS_ENTRY_TDLS(_x)		((_x)->EntryType == ENTRY_TDLS)
+#ifdef CLIENT_WDS
+#define IS_ENTRY_CLIWDS(_x)		CLIENT_STATUS_TEST_FLAG((_x), fCLIENT_STATUS_CLI_WDS)
+#endif /* CLIENT_WDS */
+
+#define SET_ENTRY_NONE(_x)		((_x)->EntryType = ENTRY_NONE)
+#define SET_ENTRY_CLIENT(_x)	((_x)->EntryType = ENTRY_CLIENT)
+#define SET_ENTRY_WDS(_x)		((_x)->EntryType = ENTRY_WDS)
+#define SET_ENTRY_APCLI(_x)		((_x)->EntryType = ENTRY_APCLI)
+#define SET_ENTRY_MESH(_x)		((_x)->EntryType = ENTRY_MESH)
+#define SET_ENTRY_DLS(_x)		((_x)->EntryType = ENTRY_DLS)
+#define SET_ENTRY_TDLS(_x)		((_x)->EntryType = ENTRY_TDLS)
+#ifdef CLIENT_WDS
+#define SET_ENTRY_CLIWDS(_x)	CLIENT_STATUS_SET_FLAG((_x), fCLIENT_STATUS_CLI_WDS)
+#endif /* CLIENT_WDS */
+#define SET_OPMODE_AP(_x)		((_x)->OpMode = OPMODE_AP)
+#define SET_OPMODE_STA(_x)		((_x)->OpMode = OPMODE_STA)
+
+#define IS_OPMODE_AP(_x)		((_x)->OpMode == OPMODE_AP)
+#define IS_OPMODE_STA(_x)		((_x)->OpMode == OPMODE_STA)
+
+#define INF_MAIN_DEV_NAME		"ra"
+#define INF_MBSSID_DEV_NAME		"ra"
+#define INF_WDS_DEV_NAME		"wds"
+#define INF_APCLI_DEV_NAME		"apcli"
+#define INF_MESH_DEV_NAME		"mesh"
+#define INF_P2P_DEV_NAME		"p2p"
+
+#ifdef RALINK_ATE
+/* 
+	Use bitmap to allow coexist of ATE_TXFRAME 
+	and ATE_RXFRAME(i.e.,to support LoopBack mode).
+*/
+#define fATE_IDLE					0x00
+#define fATE_TX_ENABLE				0x01
+#define fATE_RX_ENABLE				0x02
+#define fATE_TXCONT_ENABLE			0x04
+#define fATE_TXCARR_ENABLE			0x08
+#define fATE_TXCARRSUPP_ENABLE		0x10
+#define fATE_RESERVED_1				0x20
+#define fATE_RESERVED_2				0x40
+#define fATE_EXIT					0x80
+
+/* Enter/Reset ATE */
+#define	ATE_START                   (fATE_IDLE)
+/* Stop/Exit ATE */
+#define	ATE_STOP                    (fATE_EXIT)
+/* Continuous Transmit */
+#define	ATE_TXCONT                  ((fATE_TX_ENABLE)|(fATE_TXCONT_ENABLE))
+/* Transmit Carrier */
+#define	ATE_TXCARR                  ((fATE_TX_ENABLE)|(fATE_TXCARR_ENABLE))
+/* Transmit Carrier Suppression (information without carrier) */
+#define	ATE_TXCARRSUPP              ((fATE_TX_ENABLE)|(fATE_TXCARRSUPP_ENABLE))
+/* Transmit Frames */
+#define	ATE_TXFRAME                 (fATE_TX_ENABLE)
+/* Receive Frames */
+#define	ATE_RXFRAME                 (fATE_RX_ENABLE)
+#ifdef RALINK_QA
+/* Stop Transmition */
+#define ATE_TXSTOP                  ((~(fATE_TX_ENABLE))&(~(fATE_TXCONT_ENABLE))&(~(fATE_TXCARR_ENABLE))&(~(fATE_TXCARRSUPP_ENABLE)))
+/* Stop receiving Frames */
+#define ATE_RXSTOP					(~(fATE_RX_ENABLE))
+
+/* NOTE : may be different with chipset in the future ++ */
+#define	BBP22_TXFRAME     			0x00	/* Transmit Frames */
+#define	BBP22_TXCONT_OR_CARRSUPP    0x80	/* Continuous Transmit or Carrier Suppression */
+#define	BBP22_TXCARR                0xc1	/* Transmit Carrier */
+#define	BBP24_TXCONT                0x00	/* Continuous Transmit */
+#define	BBP24_CARRSUPP              0x01	/* Carrier Suppression */
+/* NOTE : may be different with chipset in the future -- */
+#endif /* RALINK_QA */
+#endif /* RALINK_ATE */
+
+/* WEP Key TYPE */
+#define WEP_HEXADECIMAL_TYPE    0
+#define WEP_ASCII_TYPE          1
+
+/* WIRELESS EVENTS definition */
+/* Max number of char in custom event, refer to wireless_tools.28/wireless.20.h */
+#define IW_CUSTOM_MAX_LEN				  			255	/* In bytes */
+
+/* For system event - start */
+#define	IW_SYS_EVENT_FLAG_START                     0x0200
+#define	IW_ASSOC_EVENT_FLAG                         0x0200
+#define	IW_DISASSOC_EVENT_FLAG                      0x0201
+#define	IW_DEAUTH_EVENT_FLAG                      	0x0202
+#define	IW_AGEOUT_EVENT_FLAG                      	0x0203
+#define	IW_COUNTER_MEASURES_EVENT_FLAG              0x0204
+#define	IW_REPLAY_COUNTER_DIFF_EVENT_FLAG           0x0205
+#define	IW_RSNIE_DIFF_EVENT_FLAG           			0x0206
+#define	IW_MIC_DIFF_EVENT_FLAG           			0x0207
+#define IW_ICV_ERROR_EVENT_FLAG						0x0208
+#define IW_MIC_ERROR_EVENT_FLAG						0x0209
+#define IW_GROUP_HS_TIMEOUT_EVENT_FLAG				0x020A
+#define	IW_PAIRWISE_HS_TIMEOUT_EVENT_FLAG			0x020B
+#define IW_RSNIE_SANITY_FAIL_EVENT_FLAG				0x020C
+#define IW_SET_KEY_DONE_WPA1_EVENT_FLAG				0x020D
+#define IW_SET_KEY_DONE_WPA2_EVENT_FLAG				0x020E
+#define IW_STA_LINKUP_EVENT_FLAG					0x020F
+#define IW_STA_LINKDOWN_EVENT_FLAG					0x0210
+#define IW_SCAN_COMPLETED_EVENT_FLAG				0x0211
+#define IW_SCAN_ENQUEUE_FAIL_EVENT_FLAG				0x0212
+#define IW_CHANNEL_CHANGE_EVENT_FLAG				0x0213
+#define IW_STA_MODE_EVENT_FLAG						0x0214
+#define IW_MAC_FILTER_LIST_EVENT_FLAG				0x0215
+#define IW_AUTH_REJECT_CHALLENGE_FAILURE			0x0216
+#define IW_SCANNING_EVENT_FLAG						0x0217
+#define IW_START_IBSS_FLAG							0x0218
+#define IW_JOIN_IBSS_FLAG							0x0219
+#define IW_SHARED_WEP_FAIL							0x021A
+#define IW_WPS_END_EVENT_FLAG						0x021B
+/* if add new system event flag, please upadte the IW_SYS_EVENT_FLAG_END */
+#define	IW_SYS_EVENT_FLAG_END                       0x021B
+#define	IW_SYS_EVENT_TYPE_NUM						(IW_SYS_EVENT_FLAG_END - IW_SYS_EVENT_FLAG_START + 1)
+/* For system event - end */
+
+#ifdef IDS_SUPPORT
+/* For spoof attack event - start */
+#define	IW_SPOOF_EVENT_FLAG_START                   0x0300
+#define IW_CONFLICT_SSID_EVENT_FLAG					0x0300
+#define IW_SPOOF_ASSOC_RESP_EVENT_FLAG				0x0301
+#define IW_SPOOF_REASSOC_RESP_EVENT_FLAG			0x0302
+#define IW_SPOOF_PROBE_RESP_EVENT_FLAG				0x0303
+#define IW_SPOOF_BEACON_EVENT_FLAG					0x0304
+#define IW_SPOOF_DISASSOC_EVENT_FLAG				0x0305
+#define IW_SPOOF_AUTH_EVENT_FLAG					0x0306
+#define IW_SPOOF_DEAUTH_EVENT_FLAG					0x0307
+#define IW_SPOOF_UNKNOWN_MGMT_EVENT_FLAG			0x0308
+#define IW_REPLAY_ATTACK_EVENT_FLAG					0x0309
+/* if add new spoof attack event flag, please upadte the IW_SPOOF_EVENT_FLAG_END */
+#define	IW_SPOOF_EVENT_FLAG_END                     0x0309
+#define	IW_SPOOF_EVENT_TYPE_NUM						(IW_SPOOF_EVENT_FLAG_END - IW_SPOOF_EVENT_FLAG_START + 1)
+/* For spoof attack event - end */
+
+/* For flooding attack event - start */
+#define	IW_FLOOD_EVENT_FLAG_START                   0x0400
+#define IW_FLOOD_AUTH_EVENT_FLAG					0x0400
+#define IW_FLOOD_ASSOC_REQ_EVENT_FLAG				0x0401
+#define IW_FLOOD_REASSOC_REQ_EVENT_FLAG				0x0402
+#define IW_FLOOD_PROBE_REQ_EVENT_FLAG				0x0403
+#define IW_FLOOD_DISASSOC_EVENT_FLAG				0x0404
+#define IW_FLOOD_DEAUTH_EVENT_FLAG					0x0405
+#define IW_FLOOD_EAP_REQ_EVENT_FLAG					0x0406
+/* if add new flooding attack event flag, please upadte the IW_FLOOD_EVENT_FLAG_END */
+#define	IW_FLOOD_EVENT_FLAG_END                   	0x0406
+#define	IW_FLOOD_EVENT_TYPE_NUM						(IW_FLOOD_EVENT_FLAG_END - IW_FLOOD_EVENT_FLAG_START + 1)
+/* For flooding attack - end */
+#endif /* IDS_SUPPORT */
+
+/* End - WIRELESS EVENTS definition */
+
+#ifdef CONFIG_STA_SUPPORT
+/* definition for DLS, kathy */
+#define	MAX_NUM_OF_INIT_DLS_ENTRY   1
+#define	MAX_NUM_OF_DLS_ENTRY        MAX_NUMBER_OF_DLS_ENTRY
+
+/*Block ACK, kathy */
+#define MAX_TX_REORDERBUF		64
+#define MAX_RX_REORDERBUF		64
+#define DEFAULT_TX_TIMEOUT		30
+#define DEFAULT_RX_TIMEOUT		30
+#define MAX_BARECI_SESSION		8
+
+#ifndef IW_ESSID_MAX_SIZE
+/* Maximum size of the ESSID and pAd->nickname strings */
+#define IW_ESSID_MAX_SIZE   		32
+#endif
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef MCAST_RATE_SPECIFIC
+#define MCAST_DISABLE	0
+#define MCAST_CCK		1
+#define MCAST_OFDM		2
+#define MCAST_HTMIX		3
+#endif /* MCAST_RATE_SPECIFIC */
+
+/* For AsicRadioOff/AsicRadioOn function */
+#define DOT11POWERSAVE		0
+#define GUIRADIO_OFF		1
+#define RTMP_HALT		    2
+#define GUI_IDLE_POWER_SAVE		3
+/* -- */
+
+/* definition for WpaSupport flag */
+#define WPA_SUPPLICANT_DISABLE				0x00
+#define WPA_SUPPLICANT_ENABLE				0x01
+#define	WPA_SUPPLICANT_ENABLE_WITH_WEB_UI	0x02
+#define	WPA_SUPPLICANT_ENABLE_WPS			0x80
+
+/* definition for Antenna Diversity flag */
+typedef enum {
+	ANT_DIVERSITY_DISABLE,
+	ANT_DIVERSITY_ENABLE ,
+	ANT_FIX_ANT0,
+	ANT_FIX_ANT1,
+	ANT_SW_DIVERSITY_ENABLE,
+	ANT_HW_DIVERSITY_ENABLE,
+	ANT_DIVERSITY_DEFAULT
+}ANT_DIVERSITY_TYPE;
+
+
+
+
+#define ABS(_x, _y) ((_x) > (_y)) ? ((_x) -(_y)) : ((_y) -(_x))
+
+#define A2Dec(_X, _p) 				\
+{									\
+	UCHAR *p;						\
+	_X = 0;							\
+	p = _p;							\
+	while (((*p >= '0') && (*p <= '9')))		\
+	{												\
+		if ((*p >= '0') && (*p <= '9'))		\
+			_X = _X * 10 + *p - 48;					\
+		p++;										\
+	}												\
+}
+
+#define A2Hex(_X, _p) 				\
+do{									\
+	char *__p;						\
+	(_X) = 0;							\
+	__p = (char *)(_p);							\
+	while (((*__p >= 'a') && (*__p <= 'f')) || ((*__p >= 'A') && (*__p <= 'F')) || ((*__p >= '0') && (*__p <= '9')))		\
+	{												\
+		if ((*__p >= 'a') && (*__p <= 'f'))				\
+			(_X) = (_X) * 16 + *__p - 87;					\
+		else if ((*__p >= 'A') && (*__p <= 'F'))		\
+			(_X) = (_X) * 16 + *__p - 55;					\
+		else if ((*__p >= '0') && (*__p <= '9'))		\
+			(_X) = (_X) * 16 + *__p - 48;					\
+		__p++;										\
+	}												\
+}while(0)
+
+/* ========================================================================== */
+/*
+	The full range (1-4,095) of VLAN IDs must be supported by the 802.1Q
+	implementation.
+	VLAN ID 0 is reserved.
+*/
+
+#define RT_VLAN_8023_HEADER_COPY(__pAd, __VLAN_VID, __VLAN_Priority,		\
+								__pHeader8023, __HdrLen, __pData,			\
+								__FromWhichBSSID, __TPID)					\
+{																			\
+	VLAN_8023_Header_Copy(__VLAN_VID, __VLAN_Priority,						\
+								__pHeader8023, __HdrLen, __pData,			\
+								__FromWhichBSSID, __TPID);					\
+}
+
+
+#define RT_VLAN_PKT_DUPLICATE(__pPacket, __pAd, __VLAN_VID, __VLAN_Priority,\
+								__pHeader8023, __HdrLen, __pData,			\
+								__DataSize, __FromWhichBSSID, __TPID)		\
+{																			\
+	__pPacket = duplicate_pkt_with_VLAN(									\
+				get_netdev_from_bssid(__pAd, __FromWhichBSSID),				\
+				__VLAN_VID,													\
+				__VLAN_Priority,											\
+				__pHeader8023, __HdrLen, __pData, __DataSize,				\
+				__FromWhichBSSID, __TPID);									\
+}
+
+
+#define RT_80211_TO_8023_PACKET(__pAd, __VLAN_VID, __VLAN_Priority,			\
+								__pRxBlk, __pHeader802_3,					\
+								__FromWhichBSSID, __TPID)					\
+{																			\
+	wlan_802_11_to_802_3_packet(											\
+				get_netdev_from_bssid(__pAd, __FromWhichBSSID),				\
+				__pRxBlk->OpMode,												\
+				__VLAN_VID, __VLAN_Priority,								\
+				__pRxBlk->pRxPacket, __pRxBlk->pData, __pRxBlk->DataSize,	\
+				__pHeader802_3, __FromWhichBSSID, __TPID);					\
+}
+
+#define RTMP_L2_FRAME_TX_ACTION(__pAd, __ApIdx, __FrameBuf, __FrameLen)		\
+	RTMPL2FrameTxAction(__pAd, get_netdev_from_bssid(__pAd, __ApIdx),		\
+						announce_802_3_packet, __ApIdx, __FrameBuf, __FrameLen, __pAd->OpMode)
+
+#define RTMP_DUPLICATE_PACKET(__pAd, __pPacket, __FromWhichBSSID)			\
+	DuplicatePacket(get_netdev_from_bssid(__pAd, __FromWhichBSSID),			\
+					__pPacket, __FromWhichBSSID)
+
+#define RTMP_UPDATE_OS_PACKET_INFO(__pAd, __pRxBlk, __FromWhichBSSID)		\
+	RtmpOsPktInit(__pRxBlk->pRxPacket,										\
+					get_netdev_from_bssid(__pAd, __FromWhichBSSID),			\
+					__pRxBlk->pData, __pRxBlk->DataSize);
+
+#ifdef SYSTEM_LOG_SUPPORT
+/*
+	RTMPSendWirelessEvent --> RtmpOsSendWirelessEvent --> RtmpDrvSendWirelessEvent
+*/
+#define RTMPSendWirelessEvent(__pAd, __Event_flag, __pAddr, __BssIdx, __Rssi)	\
+	RtmpOsSendWirelessEvent(__pAd, __Event_flag, __pAddr, __BssIdx, __Rssi,		\
+							RtmpDrvSendWirelessEvent);
+#else
+#define RTMPSendWirelessEvent(__pAd, __Event_flag, __pAddr, __BssIdx, __Rssi)
+#endif /* SYSTEM_LOG_SUPPORT */
+
+#define RTMP_OS_TASK_INIT(__pTask, __pTaskName, __pAd)		\
+	RtmpOSTaskInit(__pTask, __pTaskName, __pAd, &(__pAd)->RscTaskMemList, &(__pAd)->RscSemMemList);
+
+#endif /* __RTMP_DEF_H__ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rtmp_dot11.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rtmp_dot11.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rtmp_dot11.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rtmp_dot11.h	2017-09-23 03:42:49.802675724 +0800
@@ -0,0 +1,100 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __DOT11_BASE_H__
+#define __DOT11_BASE_H__
+
+#include "rtmp_type.h"
+
+/* 4-byte HTC field.  maybe included in any frame except non-QOS data frame.  The Order bit must set 1. */
+typedef struct GNU_PACKED {
+#ifdef RT_BIG_ENDIAN
+	UINT32 RDG:1;		/*RDG / More PPDU */
+	UINT32 ACConstraint:1;	/*feedback request */
+	UINT32 rsv2:5;		/*calibration sequence */
+	UINT32 NDPAnnouce:1;	/* ZLF announcement */
+	UINT32 CSISTEERING:2;	/*CSI/ STEERING */
+	UINT32 rsv1:2;		/* Reserved */
+	UINT32 CalSeq:2;	/*calibration sequence */
+	UINT32 CalPos:2;	/* calibration position */
+	UINT32 MFBorASC:7;	/*Link adaptation feedback containing recommended MCS. 0x7f for no feedback or not available */
+	UINT32 MFSI:3;		/*SET to the received value of MRS. 0x111 for unsolicited MFB. */
+	UINT32 MSI:3;		/*MCS Request, MRQ Sequence identifier */
+	UINT32 MRQ:1;		/*MCS feedback. Request for a MCS feedback */
+	UINT32 TRQ:1;		/*sounding request */
+	UINT32 rsv:1;		/* Reserved */
+#else
+	UINT32 rsv:1;		/* Reserved */
+	UINT32 TRQ:1;		/*sounding request */
+	UINT32 MRQ:1;		/*MCS feedback. Request for a MCS feedback */
+	UINT32 MSI:3;		/*MCS Request, MRQ Sequence identifier */
+	UINT32 MFSI:3;		/*SET to the received value of MRS. 0x111 for unsolicited MFB. */
+	UINT32 MFBorASC:7;	/*Link adaptation feedback containing recommended MCS. 0x7f for no feedback or not available */
+	UINT32 CalPos:2;	/* calibration position */
+	UINT32 CalSeq:2;	/*calibration sequence */
+	UINT32 rsv1:2;		/* Reserved */
+	UINT32 CSISTEERING:2;	/*CSI/ STEERING */
+	UINT32 NDPAnnouce:1;	/* ZLF announcement */
+	UINT32 rsv2:5;		/*calibration sequence */
+	UINT32 ACConstraint:1;	/*feedback request */
+	UINT32 RDG:1;		/*RDG / More PPDU */
+#endif				/* !RT_BIG_ENDIAN */
+} HT_CONTROL, *PHT_CONTROL;
+
+/* 2-byte QOS CONTROL field */
+typedef struct GNU_PACKED {
+#ifdef RT_BIG_ENDIAN
+	USHORT Txop_QueueSize:8;
+	USHORT AMsduPresent:1;
+	USHORT AckPolicy:2;	/*0: normal ACK 1:No ACK 2:scheduled under MTBA/PSMP  3: BA */
+	USHORT EOSP:1;
+	USHORT TID:4;
+#else
+	USHORT TID:4;
+	USHORT EOSP:1;
+	USHORT AckPolicy:2;	/*0: normal ACK 1:No ACK 2:scheduled under MTBA/PSMP  3: BA */
+	USHORT AMsduPresent:1;
+	USHORT Txop_QueueSize:8;
+#endif				/* !RT_BIG_ENDIAN */
+} QOS_CONTROL, *PQOS_CONTROL;
+
+
+typedef struct GNU_PACKED _PSPOLL_FRAME {
+	FRAME_CONTROL FC;
+	USHORT Aid;
+	UCHAR Bssid[MAC_ADDR_LEN];
+	UCHAR Ta[MAC_ADDR_LEN];
+} PSPOLL_FRAME, *PPSPOLL_FRAME;
+
+typedef struct GNU_PACKED _RTS_FRAME {
+	FRAME_CONTROL FC;
+	USHORT Duration;
+	UCHAR Addr1[MAC_ADDR_LEN];
+	UCHAR Addr2[MAC_ADDR_LEN];
+} RTS_FRAME, *PRTS_FRAME;
+
+#endif /* __DOT11_BASE_H__ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rtmp.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rtmp.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rtmp.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rtmp.h	2017-09-23 03:42:49.810675700 +0800
@@ -0,0 +1,7749 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RTMP_H__
+#define __RTMP_H__
+
+#include "link_list.h"
+#include "spectrum_def.h"
+
+#include "rtmp_dot11.h"
+#include "wpa_cmm.h"
+
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+
+#include "wsc.h"
+
+
+
+#include "rtmp_chip.h"
+
+
+
+
+
+#ifdef CLIENT_WDS
+#include "client_wds_cmm.h"
+#endif /* CLIENT_WDS */
+
+
+
+
+typedef struct _RTMP_ADAPTER RTMP_ADAPTER;
+typedef struct _RTMP_ADAPTER *PRTMP_ADAPTER;
+
+typedef struct _RTMP_CHIP_OP_ RTMP_CHIP_OP;
+typedef struct _RTMP_CHIP_CAP_ RTMP_CHIP_CAP;
+
+#ifdef LED_CONTROL_SUPPORT
+#include "rt_led.h"
+#endif /* LED_CONTROL_SUPPORT */
+
+#ifdef RTMP_FREQ_CALIBRATION_SUPPORT
+#include "frq_cal.h"
+#endif /* RTMP_FREQ_CALIBRATION_SUPPORT */
+
+/*#define DBG		1 */
+
+/*#define DBG_DIAGNOSE		1 */
+
+/*+++Add by shiang for merge MiniportMMRequest() and MiniportDataMMRequest() into one function */
+#define MAX_DATAMM_RETRY	3
+#define MGMT_USE_QUEUE_FLAG	0x80
+/*---Add by shiang for merge MiniportMMRequest() and MiniportDataMMRequest() into one function */
+/* The number of channels for per-channel Tx power offset */
+
+
+#define	MAXSEQ		(0xFFF)
+
+#ifdef DOT11N_SS3_SUPPORT
+#define MAX_MCS_SET 24		/* From MCS 0 ~ MCS 23 */
+#else
+#define MAX_MCS_SET 16		/* From MCS 0 ~ MCS 15 */
+#endif /* DOT11N_SS3_SUPPORT */
+
+
+#define MAX_TXPOWER_ARRAY_SIZE	5
+
+extern unsigned char CISCO_OUI[];
+extern UCHAR BaSizeArray[4];
+
+extern UCHAR BROADCAST_ADDR[MAC_ADDR_LEN];
+extern UCHAR ZERO_MAC_ADDR[MAC_ADDR_LEN];
+extern ULONG BIT32[32];
+extern char *CipherName[];
+extern UCHAR RxwiMCSToOfdmRate[12];
+extern UCHAR SNAP_802_1H[6];
+extern UCHAR SNAP_BRIDGE_TUNNEL[6];
+extern UCHAR EAPOL[2];
+extern UCHAR IPX[2];
+extern UCHAR TPID[];
+extern UCHAR APPLE_TALK[2];
+extern UCHAR OfdmRateToRxwiMCS[];
+extern UCHAR MapUserPriorityToAccessCategory[8];
+
+extern USHORT RateUpPER[];
+extern USHORT RateDownPER[];
+extern UCHAR Phy11BNextRateDownward[];
+extern UCHAR Phy11BNextRateUpward[];
+extern UCHAR Phy11BGNextRateDownward[];
+extern UCHAR Phy11BGNextRateUpward[];
+extern UCHAR Phy11ANextRateDownward[];
+extern UCHAR Phy11ANextRateUpward[];
+extern unsigned char RateIdToMbps[];
+extern USHORT RateIdTo500Kbps[];
+
+extern UCHAR CipherSuiteWpaNoneTkip[];
+extern UCHAR CipherSuiteWpaNoneTkipLen;
+
+extern UCHAR CipherSuiteWpaNoneAes[];
+extern UCHAR CipherSuiteWpaNoneAesLen;
+
+extern UCHAR SsidIe;
+extern UCHAR SupRateIe;
+extern UCHAR ExtRateIe;
+
+#ifdef DOT11_N_SUPPORT
+extern UCHAR HtCapIe;
+extern UCHAR AddHtInfoIe;
+extern UCHAR NewExtChanIe;
+extern UCHAR BssCoexistIe;
+extern UCHAR ExtHtCapIe;
+#endif /* DOT11_N_SUPPORT */
+extern UCHAR ExtCapIe;
+
+extern UCHAR ErpIe;
+extern UCHAR DsIe;
+extern UCHAR TimIe;
+extern UCHAR WpaIe;
+extern UCHAR Wpa2Ie;
+extern UCHAR IbssIe;
+extern UCHAR WapiIe;
+
+extern UCHAR WPA_OUI[];
+extern UCHAR RSN_OUI[];
+extern UCHAR WAPI_OUI[];
+extern UCHAR WME_INFO_ELEM[];
+extern UCHAR WME_PARM_ELEM[];
+extern UCHAR RALINK_OUI[];
+extern UCHAR PowerConstraintIE[];
+
+extern UCHAR RateSwitchTable[];
+extern UCHAR RateSwitchTable11B[];
+extern UCHAR RateSwitchTable11G[];
+extern UCHAR RateSwitchTable11BG[];
+
+#ifdef DOT11_N_SUPPORT
+extern UCHAR RateSwitchTable11BGN1S[];
+extern UCHAR RateSwitchTable11BGN2S[];
+extern UCHAR RateSwitchTable11BGN2SForABand[];
+extern UCHAR RateSwitchTable11N1S[];
+extern UCHAR RateSwitchTable11N2S[];
+extern UCHAR RateSwitchTable11N3S[];
+extern UCHAR RateSwitchTable11N3SReplacement[];
+extern UCHAR RateSwitchTable11N2SForABand[];
+extern UCHAR RateSwitchTable11BGN3S[];
+extern UCHAR RateSwitchTable11BGN3SForABand[];
+
+#ifdef CONFIG_STA_SUPPORT
+extern UCHAR PRE_N_HT_OUI[];
+#endif /* CONFIG_STA_SUPPORT */
+#endif /* DOT11_N_SUPPORT */
+
+#ifdef RALINK_ATE
+typedef struct _ATE_INFO {
+	UCHAR Mode;
+	BOOLEAN PassiveMode;
+#if defined (RT3350) || defined (RT3352) || defined (RT5350)
+	UCHAR   PABias;
+#endif // defined (RT3350) || defined (RT3352) || defined (RT5350) //
+	CHAR TxPower0;
+	CHAR TxPower1;
+#ifdef DOT11N_SS3_SUPPORT
+	CHAR TxPower2;
+#endif				/* DOT11N_SS3_SUPPORT */
+	CHAR TxAntennaSel;
+	CHAR RxAntennaSel;
+	TXWI_STRUC TxWI;	/* TXWI */
+	USHORT QID;
+	UCHAR Addr1[MAC_ADDR_LEN];
+	UCHAR Addr2[MAC_ADDR_LEN];
+	UCHAR Addr3[MAC_ADDR_LEN];
+	UCHAR Channel;
+	UCHAR Payload;		/* Payload pattern */
+	UINT32 TxLength;
+	UINT32 TxCount;
+	UINT32 TxDoneCount;	/* Tx DMA Done */
+	UINT32 RFFreqOffset;
+	UINT32 IPG;
+	BOOLEAN bRxFER;		/* Show Rx Frame Error Rate */
+	BOOLEAN	bQAEnabled;	/* QA is used. */
+	BOOLEAN bQATxStart;	/* Have compiled QA in and use it to ATE tx. */
+	BOOLEAN bQARxStart;	/* Have compiled QA in and use it to ATE rx. */
+	BOOLEAN bAutoTxAlc;	/* Set Auto Tx Alc */
+#ifdef TXBF_SUPPORT
+	BOOLEAN bTxBF;		/* Enable Tx Bean Forming */
+#endif				/* TXBF_SUPPORT */
+	UINT32 RxTotalCnt;
+	UINT32 RxCntPerSec;
+
+	CHAR LastSNR0;		/* last received SNR */
+	CHAR LastSNR1;		/* last received SNR for 2nd  antenna */
+#ifdef DOT11N_SS3_SUPPORT
+	CHAR LastSNR2;
+#endif				/* DOT11N_SS3_SUPPORT */
+	CHAR LastRssi0;		/* last received RSSI */
+	CHAR LastRssi1;		/* last received RSSI for 2nd  antenna */
+	CHAR LastRssi2;		/* last received RSSI for 3rd  antenna */
+	CHAR AvgRssi0;		/* last 8 frames' average RSSI */
+	CHAR AvgRssi1;		/* last 8 frames' average RSSI */
+	CHAR AvgRssi2;		/* last 8 frames' average RSSI */
+	SHORT AvgRssi0X8;	/* sum of last 8 frames' RSSI */
+	SHORT AvgRssi1X8;	/* sum of last 8 frames' RSSI */
+	SHORT AvgRssi2X8;	/* sum of last 8 frames' RSSI */
+
+	UINT32 NumOfAvgRssiSample;
+
+
+#ifdef RALINK_QA
+	/* Tx frame */
+#ifdef RTMP_MAC_USB
+	TXINFO_STRUC TxInfo;	/* TxInfo */
+#endif				/* RTMP_MAC_USB */
+	USHORT HLen;		/* Header Length */
+	USHORT PLen;		/* Pattern Length */
+	UCHAR Header[32];	/* Header buffer */
+	UCHAR Pattern[32];	/* Pattern buffer */
+	USHORT DLen;		/* Data Length */
+	USHORT seq;
+	UINT32 CID;
+	RTMP_OS_PID AtePid;
+	/* counters */
+	UINT32 U2M;
+	UINT32 OtherData;
+	UINT32 Beacon;
+	UINT32 OtherCount;
+	UINT32 TxAc0;
+	UINT32 TxAc1;
+	UINT32 TxAc2;
+	UINT32 TxAc3;
+	UINT32 TxHCCA;
+	UINT32 TxMgmt;
+	UINT32 RSSI0;
+	UINT32 RSSI1;
+	UINT32 RSSI2;
+	UINT32 SNR0;
+	UINT32 SNR1;
+#ifdef DOT11N_SS3_SUPPORT
+	UINT32 SNR2;
+	INT32 BF_SNR[3];	/* Last RXWI BF SNR. Units=0.25 dB */
+#endif				/* DOT11N_SS3_SUPPORT */
+	/* TxStatus : 0 --> task is idle, 1 --> task is running */
+	UCHAR TxStatus;
+#endif				/* RALINK_QA */
+} ATE_INFO, *PATE_INFO;
+#endif /* RALINK_ATE */
+
+typedef struct _RSSI_SAMPLE {
+	CHAR LastRssi0;		/* last received RSSI */
+	CHAR LastRssi1;		/* last received RSSI */
+	CHAR LastRssi2;		/* last received RSSI */
+	CHAR AvgRssi0;
+	CHAR AvgRssi1;
+	CHAR AvgRssi2;
+	SHORT AvgRssi0X8;
+	SHORT AvgRssi1X8;
+	SHORT AvgRssi2X8;
+	CHAR LastSnr0;
+	CHAR LastSnr1;
+	CHAR LastSnr2;
+	CHAR AvgSnr0;
+	CHAR AvgSnr1;
+	CHAR AvgSnr2;
+	SHORT AvgSnr0X8;
+	SHORT AvgSnr1X8;
+	SHORT AvgSnr2X8;
+	CHAR LastNoiseLevel0;
+	CHAR LastNoiseLevel1;
+	CHAR LastNoiseLevel2;
+} RSSI_SAMPLE;
+
+/* */
+/*  Queue structure and macros */
+/* */
+#define InitializeQueueHeader(QueueHeader)              \
+{                                                       \
+	(QueueHeader)->Head = (QueueHeader)->Tail = NULL;   \
+	(QueueHeader)->Number = 0;                          \
+}
+
+#define RemoveHeadQueue(QueueHeader)                \
+(QueueHeader)->Head;                                \
+{                                                   \
+	PQUEUE_ENTRY pNext;                             \
+	if ((QueueHeader)->Head != NULL)				\
+	{												\
+		pNext = (QueueHeader)->Head->Next;          \
+		(QueueHeader)->Head->Next = NULL;		\
+		(QueueHeader)->Head = pNext;                \
+		if (pNext == NULL)                          \
+			(QueueHeader)->Tail = NULL;             \
+		(QueueHeader)->Number--;                    \
+	}												\
+}
+
+#define InsertHeadQueue(QueueHeader, QueueEntry)            \
+{                                                           \
+		((PQUEUE_ENTRY)QueueEntry)->Next = (QueueHeader)->Head; \
+		(QueueHeader)->Head = (PQUEUE_ENTRY)(QueueEntry);       \
+		if ((QueueHeader)->Tail == NULL)                        \
+			(QueueHeader)->Tail = (PQUEUE_ENTRY)(QueueEntry);   \
+		(QueueHeader)->Number++;                                \
+}
+
+#define InsertTailQueue(QueueHeader, QueueEntry)				\
+{                                                               \
+	((PQUEUE_ENTRY)QueueEntry)->Next = NULL;                    \
+	if ((QueueHeader)->Tail)                                    \
+		(QueueHeader)->Tail->Next = (PQUEUE_ENTRY)(QueueEntry); \
+	else                                                        \
+		(QueueHeader)->Head = (PQUEUE_ENTRY)(QueueEntry);       \
+	(QueueHeader)->Tail = (PQUEUE_ENTRY)(QueueEntry);           \
+	(QueueHeader)->Number++;                                    \
+}
+
+#define InsertTailQueueAc(pAd, pEntry, QueueHeader, QueueEntry)			\
+{																		\
+	((PQUEUE_ENTRY)QueueEntry)->Next = NULL;							\
+	if ((QueueHeader)->Tail)											\
+		(QueueHeader)->Tail->Next = (PQUEUE_ENTRY)(QueueEntry);			\
+	else																\
+		(QueueHeader)->Head = (PQUEUE_ENTRY)(QueueEntry);				\
+	(QueueHeader)->Tail = (PQUEUE_ENTRY)(QueueEntry);					\
+	(QueueHeader)->Number++;											\
+}
+
+
+/* */
+/*  Macros for flag and ref count operations */
+/* */
+#define RTMP_SET_FLAG(_M, _F)       ((_M)->Flags |= (_F))
+#define RTMP_CLEAR_FLAG(_M, _F)     ((_M)->Flags &= ~(_F))
+#define RTMP_CLEAR_FLAGS(_M)        ((_M)->Flags = 0)
+#define RTMP_TEST_FLAG(_M, _F)      (((_M)->Flags & (_F)) != 0)
+#define RTMP_TEST_FLAGS(_M, _F)     (((_M)->Flags & (_F)) == (_F))
+/* Macro for power save flag. */
+#define RTMP_SET_PSFLAG(_M, _F)       ((_M)->PSFlags |= (_F))
+#define RTMP_CLEAR_PSFLAG(_M, _F)     ((_M)->PSFlags &= ~(_F))
+#define RTMP_CLEAR_PSFLAGS(_M)        ((_M)->PSFlags = 0)
+#define RTMP_TEST_PSFLAG(_M, _F)      (((_M)->PSFlags & (_F)) != 0)
+#define RTMP_TEST_PSFLAGS(_M, _F)     (((_M)->PSFlags & (_F)) == (_F))
+
+#define OPSTATUS_SET_FLAG(_pAd, _F)     ((_pAd)->CommonCfg.OpStatusFlags |= (_F))
+#define OPSTATUS_CLEAR_FLAG(_pAd, _F)   ((_pAd)->CommonCfg.OpStatusFlags &= ~(_F))
+#define OPSTATUS_TEST_FLAG(_pAd, _F)    (((_pAd)->CommonCfg.OpStatusFlags & (_F)) != 0)
+
+#define CLIENT_STATUS_SET_FLAG(_pEntry,_F)      ((_pEntry)->ClientStatusFlags |= (_F))
+#define CLIENT_STATUS_CLEAR_FLAG(_pEntry,_F)    ((_pEntry)->ClientStatusFlags &= ~(_F))
+#define CLIENT_STATUS_TEST_FLAG(_pEntry,_F)     (((_pEntry)->ClientStatusFlags & (_F)) != 0)
+
+#define RX_FILTER_SET_FLAG(_pAd, _F)    ((_pAd)->CommonCfg.PacketFilter |= (_F))
+#define RX_FILTER_CLEAR_FLAG(_pAd, _F)  ((_pAd)->CommonCfg.PacketFilter &= ~(_F))
+#define RX_FILTER_TEST_FLAG(_pAd, _F)   (((_pAd)->CommonCfg.PacketFilter & (_F)) != 0)
+
+#define RTMP_SET_MORE_FLAG(_M, _F)       ((_M)->MoreFlags |= (_F))
+#define RTMP_TEST_MORE_FLAG(_M, _F)      (((_M)->MoreFlags & (_F)) != 0)
+#define RTMP_CLEAR_MORE_FLAG(_M, _F)     ((_M)->MoreFlags &= ~(_F))
+
+#ifdef CONFIG_STA_SUPPORT
+#define STA_NO_SECURITY_ON(_p)          (_p->StaCfg.WepStatus == Ndis802_11EncryptionDisabled)
+#define STA_WEP_ON(_p)                  (_p->StaCfg.WepStatus == Ndis802_11Encryption1Enabled)
+#define STA_TKIP_ON(_p)                 (_p->StaCfg.WepStatus == Ndis802_11Encryption2Enabled)
+#define STA_AES_ON(_p)                  (_p->StaCfg.WepStatus == Ndis802_11Encryption3Enabled)
+
+#define STA_TGN_WIFI_ON(_p)             (_p->StaCfg.bTGnWifiTest == TRUE)
+#endif /* CONFIG_STA_SUPPORT */
+
+#define CKIP_KP_ON(_p)				((((_p)->StaCfg.CkipFlag) & 0x10) && ((_p)->StaCfg.bCkipCmicOn == TRUE))
+#define CKIP_CMIC_ON(_p)			((((_p)->StaCfg.CkipFlag) & 0x08) && ((_p)->StaCfg.bCkipCmicOn == TRUE))
+
+#define INC_RING_INDEX(_idx, _RingSize)    \
+{                                          \
+    (_idx) = (_idx+1) % (_RingSize);       \
+}
+
+#ifdef USB_BULK_BUF_ALIGMENT
+#define CUR_WRITE_IDX_INC(_idx, _RingSize)    \
+{                                          \
+    (_idx) = (_idx+1) % (_RingSize);       \
+}
+#endif /* USB_BULK_BUF_ALIGMENT */
+
+#ifdef DOT11_N_SUPPORT
+/* StaActive.SupportedHtPhy.MCSSet is copied from AP beacon.  Don't need to update here. */
+#define COPY_HTSETTINGS_FROM_MLME_AUX_TO_ACTIVE_CFG(_pAd)                                 \
+{                                                                                       \
+	_pAd->StaActive.SupportedHtPhy.ChannelWidth = _pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth;      \
+	_pAd->StaActive.SupportedHtPhy.MimoPs = _pAd->MlmeAux.HtCapability.HtCapInfo.MimoPs;      \
+	_pAd->StaActive.SupportedHtPhy.GF = _pAd->MlmeAux.HtCapability.HtCapInfo.GF;      \
+	_pAd->StaActive.SupportedHtPhy.ShortGIfor20 = _pAd->MlmeAux.HtCapability.HtCapInfo.ShortGIfor20;      \
+	_pAd->StaActive.SupportedHtPhy.ShortGIfor40 = _pAd->MlmeAux.HtCapability.HtCapInfo.ShortGIfor40;      \
+	_pAd->StaActive.SupportedHtPhy.TxSTBC = _pAd->MlmeAux.HtCapability.HtCapInfo.TxSTBC;      \
+	_pAd->StaActive.SupportedHtPhy.RxSTBC = _pAd->MlmeAux.HtCapability.HtCapInfo.RxSTBC;      \
+	_pAd->StaActive.SupportedHtPhy.ExtChanOffset = _pAd->MlmeAux.AddHtInfo.AddHtInfo.ExtChanOffset;      \
+	_pAd->StaActive.SupportedHtPhy.RecomWidth = _pAd->MlmeAux.AddHtInfo.AddHtInfo.RecomWidth;      \
+	_pAd->StaActive.SupportedHtPhy.OperaionMode = _pAd->MlmeAux.AddHtInfo.AddHtInfo2.OperaionMode;      \
+	_pAd->StaActive.SupportedHtPhy.NonGfPresent = _pAd->MlmeAux.AddHtInfo.AddHtInfo2.NonGfPresent;      \
+	NdisMoveMemory((_pAd)->MacTab.Content[BSSID_WCID].HTCapability.MCSSet, (_pAd)->StaActive.SupportedPhyInfo.MCSSet, sizeof(UCHAR) * 16);\
+}
+
+#define COPY_AP_HTSETTINGS_FROM_BEACON(_pAd, _pHtCapability)                                 \
+{                                                                                       \
+	_pAd->MacTab.Content[BSSID_WCID].AMsduSize = (UCHAR)(_pHtCapability->HtCapInfo.AMsduSize);	\
+	_pAd->MacTab.Content[BSSID_WCID].MmpsMode= (UCHAR)(_pHtCapability->HtCapInfo.MimoPs);	\
+	_pAd->MacTab.Content[BSSID_WCID].MaxRAmpduFactor = (UCHAR)(_pHtCapability->HtCapParm.MaxRAmpduFactor);	\
+}
+#endif /* DOT11_N_SUPPORT */
+
+/* */
+/* MACRO for 32-bit PCI register read / write */
+/* */
+/* Usage : RTMP_IO_READ32( */
+/*              PRTMP_ADAPTER pAd, */
+/*              ULONG Register_Offset, */
+/*              PULONG  pValue) */
+/* */
+/*         RTMP_IO_WRITE32( */
+/*              PRTMP_ADAPTER pAd, */
+/*              ULONG Register_Offset, */
+/*              ULONG Value) */
+/* */
+
+/* */
+/* Common fragment list structure -  Identical to the scatter gather frag list structure */
+/* */
+/*#define RTMP_SCATTER_GATHER_ELEMENT         SCATTER_GATHER_ELEMENT */
+/*#define PRTMP_SCATTER_GATHER_ELEMENT        PSCATTER_GATHER_ELEMENT */
+#define NIC_MAX_PHYS_BUF_COUNT              8
+
+typedef struct _RTMP_SCATTER_GATHER_ELEMENT {
+	PVOID Address;
+	ULONG Length;
+	PULONG Reserved;
+} RTMP_SCATTER_GATHER_ELEMENT, *PRTMP_SCATTER_GATHER_ELEMENT;
+
+typedef struct _RTMP_SCATTER_GATHER_LIST {
+	ULONG NumberOfElements;
+	PULONG Reserved;
+	RTMP_SCATTER_GATHER_ELEMENT Elements[NIC_MAX_PHYS_BUF_COUNT];
+} RTMP_SCATTER_GATHER_LIST, *PRTMP_SCATTER_GATHER_LIST;
+
+/* */
+/*  Some utility macros */
+/* */
+#ifndef min
+#define min(_a, _b)     (((_a) < (_b)) ? (_a) : (_b))
+#endif
+
+#ifndef max
+#define max(_a, _b)     (((_a) > (_b)) ? (_a) : (_b))
+#endif
+
+#define GET_LNA_GAIN(_pAd)	((_pAd->LatchRfRegs.Channel <= 14) ? (_pAd->BLNAGain) : ((_pAd->LatchRfRegs.Channel <= 64) ? (_pAd->ALNAGain0) : ((_pAd->LatchRfRegs.Channel <= 128) ? (_pAd->ALNAGain1) : (_pAd->ALNAGain2))))
+
+#define INC_COUNTER64(Val)          (Val.QuadPart++)
+
+#define INFRA_ON(_p)                (OPSTATUS_TEST_FLAG(_p, fOP_STATUS_INFRA_ON))
+#define ADHOC_ON(_p)                (OPSTATUS_TEST_FLAG(_p, fOP_STATUS_ADHOC_ON))
+#define MONITOR_ON(_p)              (((_p)->StaCfg.BssType) == BSS_MONITOR)
+#define IDLE_ON(_p)                 (!INFRA_ON(_p) && !ADHOC_ON(_p))
+
+/* Check LEAP & CCKM flags */
+#define LEAP_ON(_p)                 (((_p)->StaCfg.LeapAuthMode) == CISCO_AuthModeLEAP)
+#define LEAP_CCKM_ON(_p)            ((((_p)->StaCfg.LeapAuthMode) == CISCO_AuthModeLEAP) && ((_p)->StaCfg.LeapAuthInfo.CCKM == TRUE))
+
+/* if orginal Ethernet frame contains no LLC/SNAP, then an extra LLC/SNAP encap is required */
+#define EXTRA_LLCSNAP_ENCAP_FROM_PKT_START(_pBufVA, _pExtraLlcSnapEncap)		\
+{																\
+	if (((*(_pBufVA + 12) << 8) + *(_pBufVA + 13)) > 1500)		\
+	{															\
+		_pExtraLlcSnapEncap = SNAP_802_1H;						\
+		if (NdisEqualMemory(IPX, _pBufVA + 12, 2) || 			\
+			NdisEqualMemory(APPLE_TALK, _pBufVA + 12, 2))		\
+		{														\
+			_pExtraLlcSnapEncap = SNAP_BRIDGE_TUNNEL;			\
+		}														\
+	}															\
+	else														\
+	{															\
+		_pExtraLlcSnapEncap = NULL;								\
+	}															\
+}
+
+/* New Define for new Tx Path. */
+#define EXTRA_LLCSNAP_ENCAP_FROM_PKT_OFFSET(_pBufVA, _pExtraLlcSnapEncap)	\
+{																\
+	if (((*(_pBufVA) << 8) + *(_pBufVA + 1)) > 1500)			\
+	{															\
+		_pExtraLlcSnapEncap = SNAP_802_1H;						\
+		if (NdisEqualMemory(IPX, _pBufVA, 2) || 				\
+			NdisEqualMemory(APPLE_TALK, _pBufVA, 2))			\
+		{														\
+			_pExtraLlcSnapEncap = SNAP_BRIDGE_TUNNEL;			\
+		}														\
+	}															\
+	else														\
+	{															\
+		_pExtraLlcSnapEncap = NULL;								\
+	}															\
+}
+
+#define MAKE_802_3_HEADER(_p, _pMac1, _pMac2, _pType)                   \
+{                                                                       \
+    NdisMoveMemory(_p, _pMac1, MAC_ADDR_LEN);                           \
+    NdisMoveMemory((_p + MAC_ADDR_LEN), _pMac2, MAC_ADDR_LEN);          \
+    NdisMoveMemory((_p + MAC_ADDR_LEN * 2), _pType, LENGTH_802_3_TYPE); \
+}
+
+/* if pData has no LLC/SNAP (neither RFC1042 nor Bridge tunnel), keep it that way. */
+/* else if the received frame is LLC/SNAP-encaped IPX or APPLETALK, preserve the LLC/SNAP field */
+/* else remove the LLC/SNAP field from the result Ethernet frame */
+/* Patch for WHQL only, which did not turn on Netbios but use IPX within its payload */
+/* Note: */
+/*     _pData & _DataSize may be altered (remove 8-byte LLC/SNAP) by this MACRO */
+/*     _pRemovedLLCSNAP: pointer to removed LLC/SNAP; NULL is not removed */
+#define CONVERT_TO_802_3(_p8023hdr, _pDA, _pSA, _pData, _DataSize, _pRemovedLLCSNAP)      \
+{                                                                       \
+    char LLC_Len[2];                                                    \
+                                                                        \
+    _pRemovedLLCSNAP = NULL;                                            \
+    if (NdisEqualMemory(SNAP_802_1H, _pData, 6)  ||                     \
+        NdisEqualMemory(SNAP_BRIDGE_TUNNEL, _pData, 6))                 \
+    {                                                                   \
+        PUCHAR pProto = _pData + 6;                                     \
+                                                                        \
+        if ((NdisEqualMemory(IPX, pProto, 2) || NdisEqualMemory(APPLE_TALK, pProto, 2)) &&  \
+            NdisEqualMemory(SNAP_802_1H, _pData, 6))                    \
+        {                                                               \
+            LLC_Len[0] = (UCHAR)(_DataSize >> 8);                       \
+            LLC_Len[1] = (UCHAR)(_DataSize & (256 - 1));                \
+            MAKE_802_3_HEADER(_p8023hdr, _pDA, _pSA, LLC_Len);          \
+        }                                                               \
+        else                                                            \
+        {                                                               \
+            MAKE_802_3_HEADER(_p8023hdr, _pDA, _pSA, pProto);           \
+            _pRemovedLLCSNAP = _pData;                                  \
+            _DataSize -= LENGTH_802_1_H;                                \
+            _pData += LENGTH_802_1_H;                                   \
+        }                                                               \
+    }                                                                   \
+    else                                                                \
+    {                                                                   \
+        LLC_Len[0] = (UCHAR)(_DataSize >> 8);                           \
+        LLC_Len[1] = (UCHAR)(_DataSize & (256 - 1));                    \
+        MAKE_802_3_HEADER(_p8023hdr, _pDA, _pSA, LLC_Len);              \
+    }                                                                   \
+}
+
+/* Enqueue this frame to MLME engine */
+/* We need to enqueue the whole frame because MLME need to pass data type */
+/* information from 802.11 header */
+#ifdef RTMP_MAC_USB
+#define REPORT_MGMT_FRAME_TO_MLME(_pAd, Wcid, _pFrame, _FrameSize, _Rssi0, _Rssi1, _Rssi2, _MinSNR, _OpMode)        \
+{                                                                                       \
+    UINT32 High32TSF=0, Low32TSF=0;                                                          \
+    MlmeEnqueueForRecv(_pAd, Wcid, High32TSF, Low32TSF, (UCHAR)_Rssi0, (UCHAR)_Rssi1,(UCHAR)_Rssi2,_FrameSize, _pFrame, (UCHAR)_MinSNR, _OpMode);   \
+}
+#endif /* RTMP_MAC_USB */
+
+#define MAC_ADDR_EQUAL(pAddr1,pAddr2)           RTMPEqualMemory((PVOID)(pAddr1), (PVOID)(pAddr2), MAC_ADDR_LEN)
+#define SSID_EQUAL(ssid1, len1, ssid2, len2)    ((len1==len2) && (RTMPEqualMemory(ssid1, ssid2, len1)))
+
+/* */
+/* Check if it is Japan W53(ch52,56,60,64) channel. */
+/* */
+#define JapanChannelCheck(channel)  ((channel == 52) || (channel == 56) || (channel == 60) || (channel == 64))
+
+#ifdef CONFIG_STA_SUPPORT
+#define STA_EXTRA_SETTING(_pAd)
+
+#define STA_PORT_SECURED(_pAd) \
+{ \
+	BOOLEAN	Cancelled; \
+	(_pAd)->StaCfg.PortSecured = WPA_802_1X_PORT_SECURED; \
+	RTMP_IndicateMediaState(_pAd, NdisMediaStateConnected); \
+	NdisAcquireSpinLock(&((_pAd)->MacTabLock)); \
+	(_pAd)->MacTab.Content[BSSID_WCID].PortSecured = (_pAd)->StaCfg.PortSecured; \
+	(_pAd)->MacTab.Content[BSSID_WCID].PrivacyFilter = Ndis802_11PrivFilterAcceptAll;\
+	NdisReleaseSpinLock(&(_pAd)->MacTabLock); \
+	RTMPCancelTimer(&((_pAd)->Mlme.LinkDownTimer), &Cancelled);\
+	STA_EXTRA_SETTING(_pAd); \
+}
+#endif /* CONFIG_STA_SUPPORT */
+
+/* */
+/*  Data buffer for DMA operation, the buffer must be contiguous physical memory */
+/*  Both DMA to / from CPU use the same structure. */
+/* */
+typedef struct _RTMP_DMABUF {
+	ULONG AllocSize;
+	PVOID AllocVa;		/* TxBuf virtual address */
+	NDIS_PHYSICAL_ADDRESS AllocPa;	/* TxBuf physical address */
+} RTMP_DMABUF, *PRTMP_DMABUF;
+
+/* */
+/* Control block (Descriptor) for all ring descriptor DMA operation, buffer must be */
+/* contiguous physical memory. NDIS_PACKET stored the binding Rx packet descriptor */
+/* which won't be released, driver has to wait until upper layer return the packet */
+/* before giveing up this rx ring descriptor to ASIC. NDIS_BUFFER is assocaited pair */
+/* to describe the packet buffer. For Tx, NDIS_PACKET stored the tx packet descriptor */
+/* which driver should ACK upper layer when the tx is physically done or failed. */
+/* */
+typedef struct _RTMP_DMACB {
+	ULONG AllocSize;	/* Control block size */
+	PVOID AllocVa;		/* Control block virtual address */
+	NDIS_PHYSICAL_ADDRESS AllocPa;	/* Control block physical address */
+	PNDIS_PACKET pNdisPacket;
+	PNDIS_PACKET pNextNdisPacket;
+
+	RTMP_DMABUF DmaBuf;	/* Associated DMA buffer structure */
+} RTMP_DMACB, *PRTMP_DMACB;
+
+typedef struct _RTMP_TX_RING {
+	RTMP_DMACB Cell[TX_RING_SIZE];
+	UINT32 TxCpuIdx;
+	UINT32 TxDmaIdx;
+	UINT32 TxSwFreeIdx;	/* software next free tx index */
+} RTMP_TX_RING, *PRTMP_TX_RING;
+
+typedef struct _RTMP_RX_RING {
+	RTMP_DMACB Cell[RX_RING_SIZE];
+	UINT32 RxCpuIdx;
+	UINT32 RxDmaIdx;
+	INT32 RxSwReadIdx;	/* software next read index */
+} RTMP_RX_RING, *PRTMP_RX_RING;
+
+typedef struct _RTMP_MGMT_RING {
+	RTMP_DMACB Cell[MGMT_RING_SIZE];
+	UINT32 TxCpuIdx;
+	UINT32 TxDmaIdx;
+	UINT32 TxSwFreeIdx;	/* software next free tx index */
+} RTMP_MGMT_RING, *PRTMP_MGMT_RING;
+
+
+/* */
+/*  Statistic counter structure */
+/* */
+typedef struct _COUNTER_802_3 {
+	/* General Stats */
+	ULONG GoodTransmits;
+	ULONG GoodReceives;
+	ULONG TxErrors;
+	ULONG RxErrors;
+	ULONG RxNoBuffer;
+
+	/* Ethernet Stats */
+	ULONG RcvAlignmentErrors;
+	ULONG OneCollision;
+	ULONG MoreCollisions;
+
+} COUNTER_802_3, *PCOUNTER_802_3;
+
+typedef struct _COUNTER_802_11 {
+	ULONG Length;
+/*	LARGE_INTEGER   LastTransmittedFragmentCount; */
+	LARGE_INTEGER TransmittedFragmentCount;
+	LARGE_INTEGER MulticastTransmittedFrameCount;
+	LARGE_INTEGER FailedCount;
+	LARGE_INTEGER RetryCount;
+	LARGE_INTEGER MultipleRetryCount;
+	LARGE_INTEGER RTSSuccessCount;
+	LARGE_INTEGER RTSFailureCount;
+	LARGE_INTEGER ACKFailureCount;
+	LARGE_INTEGER FrameDuplicateCount;
+	LARGE_INTEGER ReceivedFragmentCount;
+	LARGE_INTEGER MulticastReceivedFrameCount;
+	LARGE_INTEGER FCSErrorCount;
+} COUNTER_802_11, *PCOUNTER_802_11;
+
+typedef struct _COUNTER_RALINK {
+	UINT32 OneSecStart;	/* for one sec count clear use */
+	UINT32 OneSecBeaconSentCnt;
+	UINT32 OneSecFalseCCACnt;	/* CCA error count, for debug purpose, might move to global counter */
+	UINT32 OneSecRxFcsErrCnt;	/* CRC error */
+	UINT32 OneSecRxOkCnt;	/* RX without error */
+	UINT32 OneSecTxFailCount;
+	UINT32 OneSecTxNoRetryOkCount;
+	UINT32 OneSecTxRetryOkCount;
+	UINT32 OneSecRxOkDataCnt;	/* unicast-to-me DATA frame count */
+	UINT32 OneSecTransmittedByteCount;	/* both successful and failure, used to calculate TX throughput */
+
+	ULONG OneSecOsTxCount[NUM_OF_TX_RING];
+	ULONG OneSecDmaDoneCount[NUM_OF_TX_RING];
+	UINT32 OneSecTxDoneCount;
+	ULONG OneSecRxCount;
+	UINT32 OneSecReceivedByteCount;
+	UINT32 OneSecTxAggregationCount;
+	UINT32 OneSecRxAggregationCount;
+	UINT32 OneSecEnd;	/* for one sec count clear use */
+
+	ULONG TransmittedByteCount;	/* both successful and failure, used to calculate TX throughput */
+	ULONG ReceivedByteCount;	/* both CRC okay and CRC error, used to calculate RX throughput */
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+	ULONG LastReceivedByteCount;
+#endif // defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) //
+	ULONG BadCQIAutoRecoveryCount;
+	ULONG PoorCQIRoamingCount;
+	ULONG MgmtRingFullCount;
+	ULONG RxCountSinceLastNULL;
+	ULONG RxCount;
+	ULONG KickTxCount;
+	LARGE_INTEGER RealFcsErrCount;
+	ULONG PendingNdisPacketCount;
+	UINT32 LastOneSecTotalTxCount;	/* OneSecTxNoRetryOkCount + OneSecTxRetryOkCount + OneSecTxFailCount */
+	UINT32 LastOneSecRxOkDataCnt;	/* OneSecRxOkDataCnt */
+	ULONG DuplicateRcv;
+	ULONG TxAggCount;
+	ULONG TxNonAggCount;
+	ULONG TxAgg1MPDUCount;
+	ULONG TxAgg2MPDUCount;
+	ULONG TxAgg3MPDUCount;
+	ULONG TxAgg4MPDUCount;
+	ULONG TxAgg5MPDUCount;
+	ULONG TxAgg6MPDUCount;
+	ULONG TxAgg7MPDUCount;
+	ULONG TxAgg8MPDUCount;
+	ULONG TxAgg9MPDUCount;
+	ULONG TxAgg10MPDUCount;
+	ULONG TxAgg11MPDUCount;
+	ULONG TxAgg12MPDUCount;
+	ULONG TxAgg13MPDUCount;
+	ULONG TxAgg14MPDUCount;
+	ULONG TxAgg15MPDUCount;
+	ULONG TxAgg16MPDUCount;
+
+	LARGE_INTEGER TransmittedOctetsInAMSDU;
+	LARGE_INTEGER TransmittedAMSDUCount;
+	LARGE_INTEGER ReceivedOctesInAMSDUCount;
+	LARGE_INTEGER ReceivedAMSDUCount;
+	LARGE_INTEGER TransmittedAMPDUCount;
+	LARGE_INTEGER TransmittedMPDUsInAMPDUCount;
+	LARGE_INTEGER TransmittedOctetsInAMPDUCount;
+	LARGE_INTEGER MPDUInReceivedAMPDUCount;
+} COUNTER_RALINK, *PCOUNTER_RALINK;
+
+typedef struct _COUNTER_DRS {
+	/* to record the each TX rate's quality. 0 is best, the bigger the worse. */
+	USHORT TxQuality[MAX_STEP_OF_TX_RATE_SWITCH];
+	UCHAR PER[MAX_STEP_OF_TX_RATE_SWITCH];
+	UCHAR TxRateUpPenalty;	/* extra # of second penalty due to last unstable condition */
+	ULONG CurrTxRateStableTime;	/* # of second in current TX rate */
+	/*BOOLEAN         fNoisyEnvironment; */
+	BOOLEAN fLastSecAccordingRSSI;
+	UCHAR LastSecTxRateChangeAction;	/* 0: no change, 1:rate UP, 2:rate down */
+	UCHAR LastTimeTxRateChangeAction;	/*Keep last time value of LastSecTxRateChangeAction */
+	ULONG LastTxOkCount;
+} COUNTER_DRS, *PCOUNTER_DRS;
+
+
+#ifdef DOT11_N_SUPPORT
+#ifdef TXBF_SUPPORT
+typedef
+    struct {
+	ULONG TxSuccessCount;
+	ULONG TxRetryCount;
+	ULONG TxFailCount;
+	ULONG ETxSuccessCount;
+	ULONG ETxRetryCount;
+	ULONG ETxFailCount;
+	ULONG ITxSuccessCount;
+	ULONG ITxRetryCount;
+	ULONG ITxFailCount;
+} COUNTER_TXBF;
+#endif
+#endif /* DOT11_N_SUPPORT */
+
+
+/***************************************************************************
+  *	security key related data structure
+  **************************************************************************/
+
+/* structure to define WPA Group Key Rekey Interval */
+typedef struct GNU_PACKED _RT_802_11_WPA_REKEY {
+	ULONG ReKeyMethod;	/* mechanism for rekeying: 0:disable, 1: time-based, 2: packet-based */
+	ULONG ReKeyInterval;	/* time-based: seconds, packet-based: kilo-packets */
+} RT_WPA_REKEY,*PRT_WPA_REKEY, RT_802_11_WPA_REKEY, *PRT_802_11_WPA_REKEY;
+
+
+#ifdef RTMP_MAC_USB
+/***************************************************************************
+  *	RTUSB I/O related data structure
+  **************************************************************************/
+
+/* for USB interface, avoid in interrupt when write key */
+typedef struct RT_ADD_PAIRWISE_KEY_ENTRY {
+	UCHAR MacAddr[6];
+	USHORT MacTabMatchWCID;	/* ASIC */
+	CIPHER_KEY CipherKey;
+} RT_ADD_PAIRWISE_KEY_ENTRY,*PRT_ADD_PAIRWISE_KEY_ENTRY;
+
+
+/* Cipher suite type for mixed mode group cipher, P802.11i-2004 */
+typedef enum _RT_802_11_CIPHER_SUITE_TYPE {
+	Cipher_Type_NONE,
+	Cipher_Type_WEP40,
+	Cipher_Type_TKIP,
+	Cipher_Type_RSVD,
+	Cipher_Type_CCMP,
+	Cipher_Type_WEP104
+} RT_802_11_CIPHER_SUITE_TYPE, *PRT_802_11_CIPHER_SUITE_TYPE;
+#endif /* RTMP_MAC_USB */
+
+typedef struct {
+	UCHAR Addr[MAC_ADDR_LEN];
+	UCHAR ErrorCode[2];	/*00 01-Invalid authentication type */
+	/*00 02-Authentication timeout */
+	/*00 03-Challenge from AP failed */
+	/*00 04-Challenge to AP failed */
+	BOOLEAN Reported;
+} ROGUEAP_ENTRY, *PROGUEAP_ENTRY;
+
+typedef struct {
+	UCHAR RogueApNr;
+	ROGUEAP_ENTRY RogueApEntry[MAX_LEN_OF_BSS_TABLE];
+} ROGUEAP_TABLE, *PROGUEAP_TABLE;
+
+/*
+  *	Fragment Frame structure
+  */
+typedef struct _FRAGMENT_FRAME {
+	PNDIS_PACKET pFragPacket;
+	ULONG RxSize;
+	USHORT Sequence;
+	USHORT LastFrag;
+	ULONG Flags;		/* Some extra frame information. bit 0: LLC presented */
+} FRAGMENT_FRAME, *PFRAGMENT_FRAME;
+
+
+/* */
+/* Tkip Key structure which RC4 key & MIC calculation */
+/* */
+typedef struct _TKIP_KEY_INFO {
+	UINT nBytesInM;		/* # bytes in M for MICKEY */
+	ULONG IV16;
+	ULONG IV32;
+	ULONG K0;		/* for MICKEY Low */
+	ULONG K1;		/* for MICKEY Hig */
+	ULONG L;		/* Current state for MICKEY */
+	ULONG R;		/* Current state for MICKEY */
+	ULONG M;		/* Message accumulator for MICKEY */
+	UCHAR RC4KEY[16];
+	UCHAR MIC[8];
+} TKIP_KEY_INFO, *PTKIP_KEY_INFO;
+
+
+/* */
+/* Private / Misc data, counters for driver internal use */
+/* */
+typedef struct __PRIVATE_STRUC {
+	UINT SystemResetCnt;	/* System reset counter */
+	UINT TxRingFullCnt;	/* Tx ring full occurrance number */
+	UINT PhyRxErrCnt;	/* PHY Rx error count, for debug purpose, might move to global counter */
+	/* Variables for WEP encryption / decryption in rtmp_wep.c */
+	/* Tkip stuff */
+	TKIP_KEY_INFO Tx;
+	TKIP_KEY_INFO Rx;
+} PRIVATE_STRUC, *PPRIVATE_STRUC;
+
+
+/***************************************************************************
+  *	Channel and BBP related data structures
+  **************************************************************************/
+/* structure to tune BBP R66 (BBP TUNING) */
+typedef struct _BBP_R66_TUNING {
+	BOOLEAN bEnable;
+	USHORT FalseCcaLowerThreshold;	/* default 100 */
+	USHORT FalseCcaUpperThreshold;	/* default 512 */
+	UCHAR R66Delta;
+	UCHAR R66CurrentValue;
+	BOOLEAN R66LowerUpperSelect;	/*Before LinkUp, Used LowerBound or UpperBound as R66 value. */
+} BBP_R66_TUNING, *PBBP_R66_TUNING;
+
+
+#ifdef DOT11_N_SUPPORT
+#ifdef DOT11N_DRAFT3
+#define EFFECTED_CH_SECONDARY 0x1
+#define EFFECTED_CH_PRIMARY	0x2
+#define EFFECTED_CH_LEGACY		0x4
+#endif /* DOT11N_DRAFT3 */
+#endif /* DOT11_N_SUPPORT */
+
+/* structure to store channel TX power */
+typedef struct _CHANNEL_TX_POWER {
+	USHORT RemainingTimeForUse;	/*unit: sec */
+	UCHAR Channel;
+#ifdef DOT11N_DRAFT3
+	BOOLEAN bEffectedChannel;	/* For BW 40 operating in 2.4GHz , the "effected channel" is the channel that is covered in 40Mhz. */
+#endif				/* DOT11N_DRAFT3 */
+	CHAR Power;
+	CHAR Power2;
+#ifdef DOT11N_SS3_SUPPORT
+	CHAR Power3;
+#endif				/* DOT11N_SS3_SUPPORT */
+	UCHAR MaxTxPwr;
+	UCHAR DfsReq;
+	UCHAR RegulatoryDomain;
+
+/*
+	Channel property:
+ 
+	CHANNEL_DISABLED: The channel is disabled.
+	CHANNEL_PASSIVE_SCAN: Only passive scanning is allowed.
+	CHANNEL_NO_IBSS: IBSS is not allowed.
+	CHANNEL_RADAR: Radar detection is required.
+	CHANNEL_NO_FAT_ABOVE: Extension channel above this channel is not allowed.
+	CHANNEL_NO_FAT_BELOW: Extension channel below this channel is not allowed.
+ */
+#define CHANNEL_DEFAULT_PROP	0x00
+#define CHANNEL_DISABLED		0x01	/* no use */
+#define CHANNEL_PASSIVE_SCAN	0x02
+#define CHANNEL_NO_IBSS			0x04
+#define CHANNEL_RADAR			0x08
+#define CHANNEL_NO_FAT_ABOVE	0x10
+#define CHANNEL_NO_FAT_BELOW	0x20
+
+	UCHAR Flags;
+
+#ifdef RT30xx
+	UCHAR Tx0FinePowerCtrl;	/* Tx0 fine power control in 0.1dB step */
+	UCHAR Tx1FinePowerCtrl;	/* Tx1 fine power control in 0.1dB step */
+	UCHAR Tx2FinePowerCtrl;	/* Tx2 fine power control in 0.1dB step */
+#endif				/* RT30xx */
+} CHANNEL_TX_POWER, *PCHANNEL_TX_POWER;
+
+
+typedef struct _SOFT_RX_ANT_DIVERSITY_STRUCT {
+	UCHAR EvaluatePeriod;	/* 0:not evalute status, 1: evaluate status, 2: switching status */
+	UCHAR EvaluateStableCnt;
+	UCHAR Pair1PrimaryRxAnt;	/* 0:Ant-E1, 1:Ant-E2 */
+	UCHAR Pair1SecondaryRxAnt;	/* 0:Ant-E1, 1:Ant-E2 */
+#ifdef CONFIG_STA_SUPPORT
+	SHORT Pair1AvgRssi[2];	/* AvgRssi[0]:E1, AvgRssi[1]:E2 */
+	SHORT Pair2AvgRssi[2];	/* AvgRssi[0]:E3, AvgRssi[1]:E4 */
+#endif				/* CONFIG_STA_SUPPORT */
+	SHORT Pair1LastAvgRssi;	/* */
+	SHORT Pair2LastAvgRssi;	/* */
+	ULONG RcvPktNumWhenEvaluate;
+	BOOLEAN FirstPktArrivedWhenEvaluate;
+} SOFT_RX_ANT_DIVERSITY, *PSOFT_RX_ANT_DIVERSITY;
+
+
+/***************************************************************************
+  *	structure for radar detection and channel switch
+  **************************************************************************/
+typedef struct _RADAR_DETECT_STRUCT {
+	/*BOOLEAN           IEEE80211H;                     // 0: disable, 1: enable IEEE802.11h */
+	UCHAR CSCount;		/*Channel switch counter */
+	UCHAR CSPeriod;		/*Channel switch period (beacon count) */
+	USHORT RDCount;		/*Radar detection counter */
+	UCHAR RDMode;		/*Radar Detection mode */
+	UCHAR RDDurRegion;	/*Radar detection duration region */
+	UCHAR BBPR16;
+	UCHAR BBPR17;
+	UCHAR BBPR18;
+	UCHAR BBPR21;
+	UCHAR BBPR22;
+	UCHAR BBPR64;
+	ULONG InServiceMonitorCount;	/* unit: sec */
+	UINT8 DfsSessionTime;
+	BOOLEAN bFastDfs;
+	USHORT ChMovingTime;
+	UINT8 LongPulseRadarTh;
+#if defined(RTMP_RBUS_SUPPORT)||defined(DFS_INTERRUPT_SUPPORT)
+	CHAR AvgRssiReq;
+	ULONG DfsLowerLimit;
+	ULONG DfsUpperLimit;
+	UINT8 FixDfsLimit;
+	ULONG upperlimit;
+	ULONG lowerlimit;
+#endif				/* defined(RTMP_RBUS_SUPPORT)||defined(DFS_INTERRUPT_SUPPORT) */
+} RADAR_DETECT_STRUCT, *PRADAR_DETECT_STRUCT;
+
+
+
+#ifdef CARRIER_DETECTION_SUPPORT
+typedef enum CD_STATE_n {
+	CD_NORMAL,
+	CD_SILENCE,
+	CD_MAX_STATE
+} CD_STATE;
+
+typedef enum _TONE_RADAR_VERSION {
+	DISABLE_TONE_RADAR = 0,
+	TONE_RADAR_V1,
+	TONE_RADAR_V2
+} TONE_RADAR_VERSION;
+
+#ifdef TONE_RADAR_DETECT_SUPPORT
+#define CARRIER_DETECT_RECHECK_TIME			3
+#define CARRIER_DETECT_CRITIRIA				7000
+#define CARRIER_DETECT_STOP_RATIO				2
+#define CARRIER_DETECT_STOP_RECHECK_TIME		4
+#define CARRIER_DETECT_CRITIRIA_A				230
+#define CARRIER_DETECT_DELTA					7
+#define CARRIER_DETECT_DIV_FLAG				0
+#define CARRIER_DETECT_THRESHOLD			0x0fffffff
+#endif /* TONE_RADAR_DETECT_SUPPORT */
+
+typedef struct CARRIER_DETECTION_s {
+	BOOLEAN Enable;
+	UINT8 CDSessionTime;
+	UINT8 CDPeriod;
+	CD_STATE CD_State;
+#ifdef TONE_RADAR_DETECT_SUPPORT
+	UINT8 delta;
+	UINT8 div_flag;
+	UINT32 threshold;
+	UINT8 recheck;
+	UINT8 recheck1;
+	UINT32 TimeStamp;
+	UINT32 criteria;
+	UINT32 CarrierDebug;
+	ULONG idle_time;
+	ULONG busy_time;
+	ULONG Debug;
+	ULONG OneSecIntCount;
+#ifdef  TONE_RADAR_DETECT_V2
+	UCHAR Symmetric_Round;
+	UCHAR VGA_Mask;
+	UCHAR Packet_End_Mask;
+	UCHAR Rx_PE_Mask;
+#endif				/* TONE_RADAR_DETECT_V2 */
+#endif				/* TONE_RADAR_DETECT_SUPPORT */
+} CARRIER_DETECTION_STRUCT, *PCARRIER_DETECTION_STRUCT;
+#endif /* CARRIER_DETECTION_SUPPORT */
+
+#ifdef DFS_HARDWARE_SUPPORT
+typedef struct _NewDFSDebug {
+	UCHAR channel;
+	ULONG wait_time;
+	UCHAR delta_delay_range;
+	UCHAR delta_delay_step;
+	UCHAR EL_range;
+	UCHAR EL_step;
+	UCHAR EH_range;
+	UCHAR EH_step;
+	UCHAR WL_range;
+	UCHAR WL_step;
+	UCHAR WH_range;
+	UCHAR WH_step;
+	ULONG T_expected;
+	ULONG T_margin;
+	UCHAR start;
+	ULONG count;
+	ULONG idx;
+
+} NewDFSDebug, *pNewDFSDebug;
+
+#define NEW_DFS_FCC_5_ENT_NUM		5
+#define NEW_DFS_DBG_PORT_ENT_NUM_POWER	8
+#define NEW_DFS_DBG_PORT_ENT_NUM		(1 << NEW_DFS_DBG_PORT_ENT_NUM_POWER)	/* CE Debug Port entry number, 256 */
+#define NEW_DFS_DBG_PORT_MASK	(NEW_DFS_DBG_PORT_ENT_NUM - 1)	/* 0xff */
+
+/* Matched Period definition */
+#define NEW_DFS_MPERIOD_ENT_NUM_POWER		8
+#define NEW_DFS_MPERIOD_ENT_NUM		(1 << NEW_DFS_MPERIOD_ENT_NUM_POWER)	/* CE Period Table entry number, 512 */
+#define NEW_DFS_MAX_CHANNEL	4
+
+typedef struct _NewDFSDebugPort {
+	ULONG counter;
+	ULONG timestamp;
+	USHORT width;
+	USHORT start_idx;	/* start index to period table */
+	USHORT end_idx;		/* end index to period table */
+} NewDFSDebugPort, *pNewDFSDebugPort;
+
+/* Matched Period Table */
+typedef struct _NewDFSMPeriod {
+	USHORT idx;
+	USHORT width;
+	USHORT idx2;
+	USHORT width2;
+	ULONG period;
+} NewDFSMPeriod, *pNewDFSMPeriod;
+
+typedef struct _NewDFSParam {
+	BOOLEAN valid;
+	UCHAR mode;
+	USHORT avgLen;
+	USHORT ELow;
+	USHORT EHigh;
+	USHORT WLow;
+	USHORT WHigh;
+	UCHAR EpsilonW;
+	ULONG TLow;
+	ULONG THigh;
+	UCHAR EpsilonT;
+#ifdef DFS_2_SUPPORT
+	ULONG BLow;
+	ULONG BHigh;
+#endif				/*DFS_2_SUPPORT */
+} NewDFSParam, *pNewDFSParam;
+#endif /* DFS_HARDWARE_SUPPORT */
+
+typedef enum _ABGBAND_STATE_ {
+	UNKNOWN_BAND,
+	BG_BAND,
+	A_BAND,
+} ABGBAND_STATE;
+
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+/***************************************************************************
+  *	structure for MLME state machine
+  **************************************************************************/
+typedef struct _MLME_STRUCT {
+#ifdef CONFIG_STA_SUPPORT
+	/* STA state machines */
+	STATE_MACHINE CntlMachine;
+	STATE_MACHINE AssocMachine;
+	STATE_MACHINE AuthMachine;
+	STATE_MACHINE AuthRspMachine;
+	STATE_MACHINE SyncMachine;
+	STATE_MACHINE WpaPskMachine;
+	STATE_MACHINE LeapMachine;
+	STATE_MACHINE_FUNC AssocFunc[ASSOC_FUNC_SIZE];
+	STATE_MACHINE_FUNC AuthFunc[AUTH_FUNC_SIZE];
+	STATE_MACHINE_FUNC AuthRspFunc[AUTH_RSP_FUNC_SIZE];
+	STATE_MACHINE_FUNC SyncFunc[SYNC_FUNC_SIZE];
+
+#endif				/* CONFIG_STA_SUPPORT */
+	STATE_MACHINE_FUNC ActFunc[ACT_FUNC_SIZE];
+	/* Action */
+	STATE_MACHINE ActMachine;
+
+
+#ifdef QOS_DLS_SUPPORT
+	STATE_MACHINE DlsMachine;
+	STATE_MACHINE_FUNC DlsFunc[DLS_FUNC_SIZE];
+#endif				/* QOS_DLS_SUPPORT */
+
+
+
+	/* common WPA state machine */
+	STATE_MACHINE WpaMachine;
+	STATE_MACHINE_FUNC WpaFunc[WPA_FUNC_SIZE];
+
+
+	ULONG ChannelQuality;	/* 0..100, Channel Quality Indication for Roaming */
+	ULONG Now32;		/* latch the value of NdisGetSystemUpTime() */
+	ULONG LastSendNULLpsmTime;
+
+	BOOLEAN bRunning;
+	NDIS_SPIN_LOCK TaskLock;
+	MLME_QUEUE Queue;
+
+	UINT ShiftReg;
+
+	RALINK_TIMER_STRUCT PeriodicTimer;
+	RALINK_TIMER_STRUCT APSDPeriodicTimer;
+	RALINK_TIMER_STRUCT LinkDownTimer;
+	RALINK_TIMER_STRUCT LinkUpTimer;
+	ULONG PeriodicRound;
+	ULONG GPIORound;
+	ULONG OneSecPeriodicRound;
+
+	UCHAR RealRxPath;
+	BOOLEAN bLowThroughput;
+	BOOLEAN bEnableAutoAntennaCheck;
+	RALINK_TIMER_STRUCT RxAntEvalTimer;
+
+#ifdef RT30xx
+	UCHAR CaliBW40RfR24;
+	UCHAR CaliBW20RfR24;
+	UCHAR CaliBW20RfR31;
+	UCHAR CaliBW40RfR31;
+#endif				/* RT30xx */
+
+#ifdef RTMP_MAC_USB
+	RALINK_TIMER_STRUCT AutoWakeupTimer;
+	BOOLEAN AutoWakeupTimerRunning;
+#endif				/* RTMP_MAC_USB */
+} MLME_STRUCT, *PMLME_STRUCT;
+
+#ifdef DOT11_N_SUPPORT
+/***************************************************************************
+  *	802.11 N related data structures
+  **************************************************************************/
+struct reordering_mpdu {
+	struct reordering_mpdu *next;
+	PNDIS_PACKET pPacket;	/* coverted to 802.3 frame */
+	int Sequence;		/* sequence number of MPDU */
+	BOOLEAN bAMSDU;
+	UCHAR					OpMode;
+};
+
+struct reordering_list {
+	struct reordering_mpdu *next;
+	int qlen;
+};
+
+struct reordering_mpdu_pool {
+	PVOID mem;
+	NDIS_SPIN_LOCK lock;
+	struct reordering_list freelist;
+};
+
+typedef enum _REC_BLOCKACK_STATUS {
+	Recipient_NONE = 0,
+	Recipient_USED,
+	Recipient_HandleRes,
+	Recipient_Accept
+} REC_BLOCKACK_STATUS, *PREC_BLOCKACK_STATUS;
+
+typedef enum _ORI_BLOCKACK_STATUS {
+	Originator_NONE = 0,
+	Originator_USED,
+	Originator_WaitRes,
+	Originator_Done
+} ORI_BLOCKACK_STATUS, *PORI_BLOCKACK_STATUS;
+
+typedef struct _BA_ORI_ENTRY {
+	UCHAR Wcid;
+	UCHAR TID;
+	UCHAR BAWinSize;
+	UCHAR Token;
+/* Sequence is to fill every outgoing QoS DATA frame's sequence field in 802.11 header. */
+	USHORT Sequence;
+	USHORT TimeOutValue;
+	ORI_BLOCKACK_STATUS ORI_BA_Status;
+	RALINK_TIMER_STRUCT ORIBATimer;
+	PVOID pAdapter;
+} BA_ORI_ENTRY, *PBA_ORI_ENTRY;
+
+typedef struct _BA_REC_ENTRY {
+	UCHAR Wcid;
+	UCHAR TID;
+	UCHAR BAWinSize;	/* 7.3.1.14. each buffer is capable of holding a max AMSDU or MSDU. */
+	/*UCHAR NumOfRxPkt; */
+	/*UCHAR    Curindidx; // the head in the RX reordering buffer */
+	USHORT LastIndSeq;
+/*	USHORT		LastIndSeqAtTimer; */
+	USHORT TimeOutValue;
+	RALINK_TIMER_STRUCT RECBATimer;
+	ULONG LastIndSeqAtTimer;
+	ULONG nDropPacket;
+	ULONG rcvSeq;
+	REC_BLOCKACK_STATUS REC_BA_Status;
+/*	UCHAR	RxBufIdxUsed; */
+	/* corresponding virtual address for RX reordering packet storage. */
+	/*RTMP_REORDERDMABUF MAP_RXBuf[MAX_RX_REORDERBUF]; */
+	NDIS_SPIN_LOCK RxReRingLock;	/* Rx Ring spinlock */
+/*	struct _BA_REC_ENTRY *pNext; */
+	PVOID pAdapter;
+	struct reordering_list list;
+} BA_REC_ENTRY, *PBA_REC_ENTRY;
+
+
+typedef struct {
+	ULONG numAsRecipient;	/* I am recipient of numAsRecipient clients. These client are in the BARecEntry[] */
+	ULONG numAsOriginator;	/* I am originator of   numAsOriginator clients. These clients are in the BAOriEntry[] */
+	ULONG numDoneOriginator;	/* count Done Originator sessions */
+	BA_ORI_ENTRY BAOriEntry[MAX_LEN_OF_BA_ORI_TABLE];
+	BA_REC_ENTRY BARecEntry[MAX_LEN_OF_BA_REC_TABLE];
+} BA_TABLE, *PBA_TABLE;
+
+/*For QureyBATableOID use; */
+typedef struct GNU_PACKED _OID_BA_REC_ENTRY {
+	UCHAR MACAddr[MAC_ADDR_LEN];
+	UCHAR BaBitmap;		/* if (BaBitmap&(1<<TID)), this session with{MACAddr, TID}exists, so read BufSize[TID] for BufferSize */
+	UCHAR rsv;
+	UCHAR BufSize[8];
+	REC_BLOCKACK_STATUS REC_BA_Status[8];
+} OID_BA_REC_ENTRY, *POID_BA_REC_ENTRY;
+
+/*For QureyBATableOID use; */
+typedef struct GNU_PACKED _OID_BA_ORI_ENTRY {
+	UCHAR MACAddr[MAC_ADDR_LEN];
+	UCHAR BaBitmap;		/* if (BaBitmap&(1<<TID)), this session with{MACAddr, TID}exists, so read BufSize[TID] for BufferSize, read ORI_BA_Status[TID] for status */
+	UCHAR rsv;
+	UCHAR BufSize[8];
+	ORI_BLOCKACK_STATUS ORI_BA_Status[8];
+} OID_BA_ORI_ENTRY, *POID_BA_ORI_ENTRY;
+
+typedef struct _QUERYBA_TABLE {
+	OID_BA_ORI_ENTRY BAOriEntry[32];
+	OID_BA_REC_ENTRY BARecEntry[32];
+	UCHAR OriNum;		/* Number of below BAOriEntry */
+	UCHAR RecNum;		/* Number of below BARecEntry */
+} QUERYBA_TABLE, *PQUERYBA_TABLE;
+
+typedef union _BACAP_STRUC {
+#ifdef RT_BIG_ENDIAN
+	struct {
+		UINT32:4;
+		UINT32 b2040CoexistScanSup:1;	/*As Sta, support do 2040 coexistence scan for AP. As Ap, support monitor trigger event to check if can use BW 40MHz. */
+		UINT32 bHtAdhoc:1;	/* adhoc can use ht rate. */
+		UINT32 MMPSmode:2;	/* MIMO power save more, 0:static, 1:dynamic, 2:rsv, 3:mimo enable */
+		UINT32 AmsduSize:1;	/* 0:3839, 1:7935 bytes. UINT  MSDUSizeToBytes[]        = { 3839, 7935}; */
+		UINT32 AmsduEnable:1;	/*Enable AMSDU transmisstion */
+		UINT32 MpduDensity:3;
+		UINT32 Policy:2;	/* 0: DELAY_BA 1:IMMED_BA  (//BA Policy subfiled value in ADDBA frame)   2:BA-not use */
+		UINT32 AutoBA:1;	/* automatically BA */
+		UINT32 TxBAWinLimit:8;
+		UINT32 RxBAWinLimit:8;
+	} field;
+#else
+	struct {
+		UINT32 RxBAWinLimit:8;
+		UINT32 TxBAWinLimit:8;
+		UINT32 AutoBA:1;	/* automatically BA */
+		UINT32 Policy:2;	/* 0: DELAY_BA 1:IMMED_BA  (//BA Policy subfiled value in ADDBA frame)   2:BA-not use */
+		UINT32 MpduDensity:3;
+		UINT32 AmsduEnable:1;	/*Enable AMSDU transmisstion */
+		UINT32 AmsduSize:1;	/* 0:3839, 1:7935 bytes. UINT  MSDUSizeToBytes[]        = { 3839, 7935}; */
+		UINT32 MMPSmode:2;	/* MIMO power save more, 0:static, 1:dynamic, 2:rsv, 3:mimo enable */
+		UINT32 bHtAdhoc:1;	/* adhoc can use ht rate. */
+		UINT32 b2040CoexistScanSup:1;	/*As Sta, support do 2040 coexistence scan for AP. As Ap, support monitor trigger event to check if can use BW 40MHz. */
+		 UINT32:4;
+	} field;
+#endif
+	UINT32 word;
+} BACAP_STRUC, *PBACAP_STRUC;
+
+typedef struct {
+	BOOLEAN IsRecipient;
+	UCHAR MACAddr[MAC_ADDR_LEN];
+	UCHAR TID;
+	UCHAR nMSDU;
+	USHORT TimeOut;
+	BOOLEAN bAllTid;	/* If True, delete all TID for BA sessions with this MACaddr. */
+} OID_ADD_BA_ENTRY, *POID_ADD_BA_ENTRY;
+
+#ifdef DOT11N_DRAFT3
+typedef enum _BSS2040COEXIST_FLAG {
+	BSS_2040_COEXIST_DISABLE = 0,
+	BSS_2040_COEXIST_TIMER_FIRED = 1,
+	BSS_2040_COEXIST_INFO_SYNC = 2,
+	BSS_2040_COEXIST_INFO_NOTIFY = 4,
+} BSS2040COEXIST_FLAG;
+
+typedef struct _BssCoexChRange_ {
+	UCHAR primaryCh;
+	UCHAR secondaryCh;
+	UCHAR effectChStart;
+	UCHAR effectChEnd;
+} BSS_COEX_CH_RANGE;
+#endif /* DOT11N_DRAFT3 */
+
+#define IS_HT_STA(_pMacEntry)	\
+	(_pMacEntry->MaxHTPhyMode.field.MODE >= MODE_HTMIX)
+
+#define IS_HT_RATE(_pMacEntry)	\
+	(_pMacEntry->HTPhyMode.field.MODE >= MODE_HTMIX)
+
+#define PEER_IS_HT_RATE(_pMacEntry)	\
+	(_pMacEntry->HTPhyMode.field.MODE >= MODE_HTMIX)
+
+#endif /* DOT11_N_SUPPORT */
+
+/*This structure is for all 802.11n card InterOptibilityTest action. Reset all Num every n second.  (Details see MLMEPeriodic) */
+typedef struct _IOT_STRUC {
+	BOOLEAN bRTSLongProtOn;
+#ifdef CONFIG_STA_SUPPORT
+	BOOLEAN bLastAtheros;
+	BOOLEAN bCurrentAtheros;
+	BOOLEAN bNowAtherosBurstOn;
+	BOOLEAN bNextDisableRxBA;
+	BOOLEAN bToggle;
+#endif				/* CONFIG_STA_SUPPORT */
+} IOT_STRUC, *PIOT_STRUC;
+
+/* This is the registry setting for 802.11n transmit setting.  Used in advanced page. */
+typedef union _REG_TRANSMIT_SETTING {
+#ifdef RT_BIG_ENDIAN
+	struct {
+		UINT32 rsv:13;
+		UINT32 EXTCHA:2;
+		UINT32 HTMODE:1;
+		UINT32 TRANSNO:2;
+		UINT32 STBC:1;	/*SPACE */
+		UINT32 ShortGI:1;
+		UINT32 BW:1;	/*channel bandwidth 20MHz or 40 MHz */
+		UINT32 TxBF:1;	/* 3*3 */
+		UINT32 ITxBfEn:1;
+		UINT32 rsv0:9;
+		/*UINT32  MCS:7;                 // MCS */
+		/*UINT32  PhyMode:4; */
+	} field;
+#else
+	struct {
+		/*UINT32  PhyMode:4; */
+		/*UINT32  MCS:7;                 // MCS */
+		UINT32 rsv0:9;
+		UINT32 ITxBfEn:1;
+		UINT32 TxBF:1;
+		UINT32 BW:1;	/*channel bandwidth 20MHz or 40 MHz */
+		UINT32 ShortGI:1;
+		UINT32 STBC:1;	/*SPACE */
+		UINT32 TRANSNO:2;
+		UINT32 HTMODE:1;
+		UINT32 EXTCHA:2;
+		UINT32 rsv:13;
+	} field;
+#endif
+	UINT32 word;
+} REG_TRANSMIT_SETTING, *PREG_TRANSMIT_SETTING;
+
+
+typedef union _DESIRED_TRANSMIT_SETTING {
+#ifdef RT_BIG_ENDIAN
+	struct {
+		USHORT rsv:3;
+		USHORT FixedTxMode:2;	/* If MCS isn't AUTO, fix rate in CCK, OFDM or HT mode. */
+		USHORT PhyMode:4;
+		USHORT MCS:7;	/* MCS */
+	} field;
+#else
+	struct {
+		USHORT MCS:7;	/* MCS */
+		USHORT PhyMode:4;
+		USHORT FixedTxMode:2;	/* If MCS isn't AUTO, fix rate in CCK, OFDM or HT mode. */
+		USHORT rsv:3;
+	} field;
+#endif
+	USHORT word;
+ } DESIRED_TRANSMIT_SETTING, *PDESIRED_TRANSMIT_SETTING;
+
+
+#ifdef RTMP_MAC_USB
+/***************************************************************************
+  *	USB-based chip Beacon related data structures
+  **************************************************************************/
+#define BEACON_BITMAP_MASK		0xff
+typedef struct _BEACON_SYNC_STRUCT_ {
+	UCHAR BeaconBuf[HW_BEACON_MAX_NUM][HW_BEACON_OFFSET];
+	UCHAR BeaconTxWI[HW_BEACON_MAX_NUM][TXWI_SIZE];
+	ULONG TimIELocationInBeacon[HW_BEACON_MAX_NUM];
+	ULONG CapabilityInfoLocationInBeacon[HW_BEACON_MAX_NUM];
+	BOOLEAN EnableBeacon;	/* trigger to enable beacon transmission. */
+	UCHAR BeaconBitMap;	/* NOTE: If the MAX_MBSSID_NUM is larger than 8, this parameter need to change. */
+	UCHAR DtimBitOn;	/* NOTE: If the MAX_MBSSID_NUM is larger than 8, this parameter need to change. */
+} BEACON_SYNC_STRUCT;
+#endif /* RTMP_MAC_USB */
+
+/***************************************************************************
+  *	Multiple SSID related data structures
+  **************************************************************************/
+#define WLAN_MAX_NUM_OF_TIM			((MAX_LEN_OF_MAC_TABLE >> 3) + 1)	/* /8 + 1 */
+#define WLAN_CT_TIM_BCMC_OFFSET		0	/* unit: 32B */
+
+/* clear bcmc TIM bit */
+#define WLAN_MR_TIM_BCMC_CLEAR(apidx) \
+	pAd->ApCfg.MBSSID[apidx].TimBitmaps[WLAN_CT_TIM_BCMC_OFFSET] &= ~NUM_BIT8[0];
+
+/* set bcmc TIM bit */
+#define WLAN_MR_TIM_BCMC_SET(apidx) \
+	pAd->ApCfg.MBSSID[apidx].TimBitmaps[WLAN_CT_TIM_BCMC_OFFSET] |= NUM_BIT8[0];
+
+/* clear a station PS TIM bit */
+#define WLAN_MR_TIM_BIT_CLEAR(ad_p, apidx, wcid) \
+	{	UCHAR tim_offset = wcid >> 3; \
+		UCHAR bit_offset = wcid & 0x7; \
+		ad_p->ApCfg.MBSSID[apidx].TimBitmaps[tim_offset] &= (~NUM_BIT8[bit_offset]); }
+
+/* set a station PS TIM bit */
+#define WLAN_MR_TIM_BIT_SET(ad_p, apidx, wcid) \
+	{	UCHAR tim_offset = wcid >> 3; \
+		UCHAR bit_offset = wcid & 0x7; \
+		ad_p->ApCfg.MBSSID[apidx].TimBitmaps[tim_offset] |= NUM_BIT8[bit_offset]; }
+
+
+
+/* configuration common to OPMODE_AP as well as OPMODE_STA */
+typedef struct _COMMON_CONFIG {
+
+	BOOLEAN bCountryFlag;
+	UCHAR CountryCode[3];
+#ifdef EXT_BUILD_CHANNEL_LIST
+	UCHAR Geography;
+#endif				/* EXT_BUILD_CHANNEL_LIST */
+	UCHAR CountryRegion;	/* Enum of country region, 0:FCC, 1:IC, 2:ETSI, 3:SPAIN, 4:France, 5:MKK, 6:MKK1, 7:Israel */
+	UCHAR CountryRegionForABand;	/* Enum of country region for A band */
+	UCHAR PhyMode;		/* PHY_11A, PHY_11B, PHY_11BG_MIXED, PHY_ABG_MIXED */
+	UCHAR DesiredPhyMode;	/* PHY_11A, PHY_11B, PHY_11BG_MIXED, PHY_ABG_MIXED */
+	UCHAR SavedPhyMode;
+	USHORT Dsifs;		/* in units of usec */
+	ULONG PacketFilter;	/* Packet filter for receiving */
+	UINT8 RegulatoryClass[MAX_NUM_OF_REGULATORY_CLASS];
+
+	CHAR Ssid[MAX_LEN_OF_SSID];	/* NOT NULL-terminated */
+	UCHAR SsidLen;		/* the actual ssid length in used */
+	UCHAR LastSsidLen;	/* the actual ssid length in used */
+	CHAR LastSsid[MAX_LEN_OF_SSID];	/* NOT NULL-terminated */
+	UCHAR LastBssid[MAC_ADDR_LEN];
+
+	UCHAR Bssid[MAC_ADDR_LEN];
+	USHORT BeaconPeriod;
+	UCHAR Channel;
+	UCHAR CentralChannel;	/* Central Channel when using 40MHz is indicating. not real channel. */
+
+	UCHAR SupRate[MAX_LEN_OF_SUPPORTED_RATES];
+	UCHAR SupRateLen;
+	UCHAR ExtRate[MAX_LEN_OF_SUPPORTED_RATES];
+	UCHAR ExtRateLen;
+	UCHAR DesireRate[MAX_LEN_OF_SUPPORTED_RATES];	/* OID_802_11_DESIRED_RATES */
+	UCHAR MaxDesiredRate;
+	UCHAR ExpectedACKRate[MAX_LEN_OF_SUPPORTED_RATES];
+
+	ULONG BasicRateBitmap;	/* backup basic ratebitmap */
+	ULONG BasicRateBitmapOld;	/* backup basic ratebitmap */
+
+	BOOLEAN bAPSDCapable;
+	BOOLEAN bInServicePeriod;
+	BOOLEAN bAPSDAC_BE;
+	BOOLEAN bAPSDAC_BK;
+	BOOLEAN bAPSDAC_VI;
+	BOOLEAN bAPSDAC_VO;
+
+	/* because TSPEC can modify the APSD flag, we need to keep the APSD flag
+	   requested in association stage from the station;
+	   we need to recover the APSD flag after the TSPEC is deleted. */
+	BOOLEAN bACMAPSDBackup[4];	/* for delivery-enabled & trigger-enabled both */
+	BOOLEAN bACMAPSDTr[4];	/* no use */
+
+	BOOLEAN bNeedSendTriggerFrame;
+	BOOLEAN bAPSDForcePowerSave;	/* Force power save mode, should only use in APSD-STAUT */
+	ULONG TriggerTimerCount;
+	UCHAR MaxSPLength;
+	UCHAR BBPCurrentBW;	/* BW_10,       BW_20, BW_40 */
+	/* move to MULTISSID_STRUCT for MBSS */
+	/*HTTRANSMIT_SETTING    HTPhyMode, MaxHTPhyMode, MinHTPhyMode;// For transmit phy setting in TXWI. */
+	REG_TRANSMIT_SETTING RegTransmitSetting;	/*registry transmit setting. this is for reading registry setting only. not useful. */
+	/*UCHAR       FixedTxMode;              // Fixed Tx Mode (CCK, OFDM), for HT fixed tx mode (GF, MIX) , refer to RegTransmitSetting.field.HTMode */
+	UCHAR TxRate;		/* Same value to fill in TXD. TxRate is 6-bit */
+	UCHAR MaxTxRate;	/* RATE_1, RATE_2, RATE_5_5, RATE_11 */
+	UCHAR TxRateIndex;	/* Tx rate index in RateSwitchTable */
+	UCHAR TxRateTableSize;	/* Valid Tx rate table size in RateSwitchTable */
+	/*BOOLEAN               bAutoTxRateSwitch; */
+	UCHAR MinTxRate;	/* RATE_1, RATE_2, RATE_5_5, RATE_11 */
+	UCHAR RtsRate;		/* RATE_xxx */
+	HTTRANSMIT_SETTING MlmeTransmit;	/* MGMT frame PHY rate setting when operatin at Ht rate. */
+	UCHAR MlmeRate;		/* RATE_xxx, used to send MLME frames */
+	UCHAR BasicMlmeRate;	/* Default Rate for sending MLME frames */
+
+	USHORT RtsThreshold;	/* in unit of BYTE */
+	USHORT FragmentThreshold;	/* in unit of BYTE */
+
+	UCHAR TxPower;		/* in unit of mW */
+	ULONG TxPowerPercentage;	/* 0~100 % */
+	ULONG TxPowerDefault;	/* keep for TxPowerPercentage */
+	UINT8 PwrConstraint;
+
+#ifdef DOT11_N_SUPPORT
+	BACAP_STRUC BACapability;	/*   NO USE = 0XFF  ;  IMMED_BA =1  ;  DELAY_BA=0 */
+	BACAP_STRUC REGBACapability;	/*   NO USE = 0XFF  ;  IMMED_BA =1  ;  DELAY_BA=0 */
+#endif				/* DOT11_N_SUPPORT */
+	IOT_STRUC IOTestParm;	/* 802.11n InterOpbility Test Parameter; */
+	ULONG TxPreamble;	/* Rt802_11PreambleLong, Rt802_11PreambleShort, Rt802_11PreambleAuto */
+	BOOLEAN bUseZeroToDisableFragment;	/* Microsoft use 0 as disable */
+	ULONG UseBGProtection;	/* 0: auto, 1: always use, 2: always not use */
+	BOOLEAN bUseShortSlotTime;	/* 0: disable, 1 - use short slot (9us) */
+	BOOLEAN bEnableTxBurst;	/* 1: enble TX PACKET BURST (when BA is established or AP is not a legacy WMM AP), 0: disable TX PACKET BURST */
+	BOOLEAN bAggregationCapable;	/* 1: enable TX aggregation when the peer supports it */
+	BOOLEAN bPiggyBackCapable;	/* 1: enable TX piggy-back according MAC's version */
+	BOOLEAN bIEEE80211H;	/* 1: enable IEEE802.11h spec. */
+	ULONG DisableOLBCDetect;	/* 0: enable OLBC detect; 1 disable OLBC detect */
+
+#ifdef DOT11_N_SUPPORT
+	BOOLEAN bRdg;
+#endif				/* DOT11_N_SUPPORT */
+	BOOLEAN bWmmCapable;	/* 0:disable WMM, 1:enable WMM */
+	QOS_CAPABILITY_PARM APQosCapability;	/* QOS capability of the current associated AP */
+	EDCA_PARM APEdcaParm;	/* EDCA parameters of the current associated AP */
+	QBSS_LOAD_PARM APQbssLoad;	/* QBSS load of the current associated AP */
+	UCHAR AckPolicy[4];	/* ACK policy of the specified AC. see ACK_xxx */
+#ifdef CONFIG_STA_SUPPORT
+	BOOLEAN bDLSCapable;	/* 0:disable DLS, 1:enable DLS */
+#endif				/* CONFIG_STA_SUPPORT */
+	/* a bitmap of BOOLEAN flags. each bit represent an operation status of a particular */
+	/* BOOLEAN control, either ON or OFF. These flags should always be accessed via */
+	/* OPSTATUS_TEST_FLAG(), OPSTATUS_SET_FLAG(), OP_STATUS_CLEAR_FLAG() macros. */
+	/* see fOP_STATUS_xxx in RTMP_DEF.C for detail bit definition */
+	ULONG OpStatusFlags;
+
+	BOOLEAN NdisRadioStateOff;	/*For HCT 12.0, set this flag to TRUE instead of called MlmeRadioOff. */
+	ABGBAND_STATE BandState;	/* For setting BBP used on B/G or A mode. */
+#ifdef ANT_DIVERSITY_SUPPORT
+	UCHAR bRxAntDiversity;	/* 0:disable, 1:enable Software Rx Antenna Diversity. */
+#endif				/* ANT_DIVERSITY_SUPPORT */
+
+	/* IEEE802.11H--DFS. */
+	RADAR_DETECT_STRUCT RadarDetect;
+	BOOLEAN bDFSIndoor;
+#ifdef CARRIER_DETECTION_SUPPORT
+	CARRIER_DETECTION_STRUCT CarrierDetect;
+	UCHAR carrier_func;
+#endif				/* CARRIER_DETECTION_SUPPORT */
+
+#ifdef DOT11_N_SUPPORT
+	/* HT */
+	/*UCHAR                 BASize;         // USer desired BAWindowSize. Should not exceed our max capability */
+	/*RT_HT_CAPABILITY      SupportedHtPhy; */
+	RT_HT_CAPABILITY DesiredHtPhy;
+	HT_CAPABILITY_IE HtCapability;
+	ADD_HT_INFO_IE AddHTInfo;	/* Useful as AP. */
+	/*This IE is used with channel switch announcement element when changing to a new 40MHz. */
+	/*This IE is included in channel switch ammouncement frames 7.4.1.5, beacons, probe Rsp. */
+	NEW_EXT_CHAN_IE NewExtChanOffset;	/*7.3.2.20A, 1 if extension channel is above the control channel, 3 if below, 0 if not present */
+
+	EXT_CAP_INFO_ELEMENT ExtCapIE;	/* this is the extened capibility IE appreed in MGMT frames. Doesn't need to update once set in Init. */
+
+#ifdef DOT11N_DRAFT3
+	BOOLEAN bBssCoexEnable;
+	/* 
+	   Following two paramters now only used for the initial scan operation. the AP only do 
+	   bandwidth fallback when BssCoexApCnt > BssCoexApCntThr
+	   By default, the "BssCoexApCntThr" is set as 0 in "UserCfgInit()".
+	 */
+	UCHAR BssCoexApCntThr;
+	UCHAR BssCoexApCnt;
+
+	UCHAR Bss2040CoexistFlag;	/* bit 0: bBssCoexistTimerRunning, bit 1: NeedSyncAddHtInfo. */
+	RALINK_TIMER_STRUCT Bss2040CoexistTimer;
+
+	/*This IE is used for 20/40 BSS Coexistence. */
+	BSS_2040_COEXIST_IE BSS2040CoexistInfo;
+	/* ====== 11n D3.0 =======================> */
+	USHORT Dot11OBssScanPassiveDwell;	/* Unit : TU. 5~1000 */
+	USHORT Dot11OBssScanActiveDwell;	/* Unit : TU. 10~1000 */
+	USHORT Dot11BssWidthTriggerScanInt;	/* Unit : Second */
+	USHORT Dot11OBssScanPassiveTotalPerChannel;	/* Unit : TU. 200~10000 */
+	USHORT Dot11OBssScanActiveTotalPerChannel;	/* Unit : TU. 20~10000 */
+	USHORT Dot11BssWidthChanTranDelayFactor;
+	USHORT Dot11OBssScanActivityThre;	/* Unit : percentage */
+
+	ULONG Dot11BssWidthChanTranDelay;	/* multiple of (Dot11BssWidthTriggerScanInt * Dot11BssWidthChanTranDelayFactor) */
+	ULONG CountDownCtr;	/* CountDown Counter from (Dot11BssWidthTriggerScanInt * Dot11BssWidthChanTranDelayFactor) */
+
+	BSS_2040_COEXIST_IE LastBSSCoexist2040;
+	BSS_2040_COEXIST_IE BSSCoexist2040;
+	TRIGGER_EVENT_TAB TriggerEventTab;
+	UCHAR ChannelListIdx;
+	/* <====== 11n D3.0 ======================= */
+	BOOLEAN bOverlapScanning;
+	BOOLEAN bBssCoexNotify;
+#endif				/* DOT11N_DRAFT3 */
+
+	BOOLEAN bHTProtect;
+	BOOLEAN bMIMOPSEnable;
+	BOOLEAN bBADecline;
+	BOOLEAN bDisableReordering;
+	BOOLEAN bForty_Mhz_Intolerant;
+	BOOLEAN bExtChannelSwitchAnnouncement;
+	BOOLEAN bRcvBSSWidthTriggerEvents;
+	ULONG LastRcvBSSWidthTriggerEventsTime;
+
+	UCHAR TxBASize;
+#endif				/* DOT11_N_SUPPORT */
+
+#ifdef SYSTEM_LOG_SUPPORT
+	/* Enable wireless event */
+	BOOLEAN bWirelessEvent;
+#endif				/* SYSTEM_LOG_SUPPORT */
+
+	BOOLEAN bWiFiTest;	/* Enable this parameter for WiFi test */
+
+	/* Tx & Rx Stream number selection */
+	UCHAR TxStream;
+	UCHAR RxStream;
+
+	/* transmit phy mode, trasmit rate for Multicast. */
+#ifdef MCAST_RATE_SPECIFIC
+	UCHAR McastTransmitMcs;
+	UCHAR McastTransmitPhyMode;
+#endif				/* MCAST_RATE_SPECIFIC */
+
+	BOOLEAN bHardwareRadio;	/* Hardware controlled Radio enabled */
+
+#ifdef RTMP_MAC_USB
+	BOOLEAN bMultipleIRP;	/* Multiple Bulk IN flag */
+	UCHAR NumOfBulkInIRP;	/* if bMultipleIRP == TRUE, NumOfBulkInIRP will be 4 otherwise be 1 */
+	RT_HT_CAPABILITY SupportedHtPhy;
+	ULONG MaxPktOneTxBulk;
+	UCHAR TxBulkFactor;
+	UCHAR RxBulkFactor;
+
+	BOOLEAN IsUpdateBeacon;
+	BEACON_SYNC_STRUCT *pBeaconSync;
+	RALINK_TIMER_STRUCT BeaconUpdateTimer;
+	UINT32 BeaconAdjust;
+	UINT32 BeaconFactor;
+	UINT32 BeaconRemain;
+#endif				/* RTMP_MAC_USB */
+
+
+
+	NDIS_SPIN_LOCK MeasureReqTabLock;
+	PMEASURE_REQ_TAB pMeasureReqTab;
+
+	NDIS_SPIN_LOCK TpcReqTabLock;
+	PTPC_REQ_TAB pTpcReqTab;
+
+	/* transmit phy mode, trasmit rate for Multicast. */
+#ifdef MCAST_RATE_SPECIFIC
+	HTTRANSMIT_SETTING MCastPhyMode;
+#endif				/* MCAST_RATE_SPECIFIC */
+
+#ifdef SINGLE_SKU
+	UINT16 DefineMaxTxPwr;
+	BOOLEAN bSKUMode;
+	UINT16 AntGain;
+	UINT16 BandedgeDelta;
+#endif				/* SINGLE_SKU */
+
+#if defined(DFS_SUPPORT) || defined(CARRIER_DETECTION_SUPPORT)
+#if defined(RTMP_RBUS_SUPPORT) || defined(DFS_INTERRUPT_SUPPORT)
+	/* Radar and carrier detection in 2880-SW-MCU */
+	UCHAR McuRadarCmd;	/* RADAR_DETECTION==1 or CARRIER_DETECTION==2, use bit map */
+	UCHAR McuRadarEvent;	/* signal between Driver and 2880-SW-MCU */
+	UCHAR McuRadarProtection;
+	UCHAR McuRadarState;	/* WAIT_CTS_BEING_SENT / DO_DETECTION / FREE_FOR_TX */
+	UCHAR McuCarrierState;
+
+	/* old value */
+	ULONG OldRtsRetryLimit;
+	UCHAR _R65;
+	UCHAR _R66;
+	UCHAR _R69;
+	UCHAR _R70;
+	UCHAR _R73;
+	UCHAR R65;
+	UCHAR R66;
+	UCHAR DFS_R66;
+#endif				/* defined(RTMP_RBUS_SUPPORT) || defined(DFS_INTERRUPT_SUPPORT) */
+
+#ifdef DFS_HARDWARE_SUPPORT
+	ULONG MCURadarRegion;
+	UCHAR DeltaDelay;
+	UCHAR RadarReEnable;
+	USHORT PollTime;
+	USHORT ChEnable;
+	INT DfsRssiHigh;
+	INT DfsRssiLow;
+	INT DfsRssiHighFromCfg;
+	INT DfsRssiLowFromCfg;
+	BOOLEAN DfsRssiHighCfgValid;
+	BOOLEAN DfsRssiLowCfgValid;
+	NewDFSDebug DfsDebug;
+	NewDFSDebugPort FCC_5[NEW_DFS_FCC_5_ENT_NUM];
+	UCHAR fcc_5_idx;
+	UCHAR fcc_5_last_idx;
+	USHORT fcc_5_threshold;	/* to check the width of long pulse radar */
+	ULONG fcc_5_counter;
+	UCHAR use_tasklet;
+	UCHAR DFSParamFromConfig;
+	NewDFSParam NewDFSTableEntry[16];
+#ifdef DFS_DEBUG
+	/* Roger debug */
+	UCHAR DebugPort[384];
+	UCHAR DebugPortPrint;	/* 0 = stop, 1 = log req, 2 = loging, 3 = log done */
+	ULONG TotalEntries[4];
+
+	ULONG T_Matched_2;
+	ULONG T_Matched_3;
+	ULONG T_Matched_4;
+	ULONG T_Matched_5;
+	UCHAR BBP127Repeat;
+
+	ULONG CounterStored[5];
+	ULONG CounterStored2[5];
+	ULONG CounterStored3;
+	NewDFSDebugPort CE_DebugCh0[NEW_DFS_DBG_PORT_ENT_NUM];
+	NewDFSMPeriod CE_TCh0[NEW_DFS_MPERIOD_ENT_NUM];
+#endif
+
+	/* CE Staggered radar / weather radar */
+	NewDFSDebugPort DFS_W[NEW_DFS_MAX_CHANNEL][NEW_DFS_DBG_PORT_ENT_NUM];
+	USHORT dfs_w_idx[NEW_DFS_MAX_CHANNEL];
+	USHORT dfs_w_last_idx[NEW_DFS_MAX_CHANNEL];
+	ULONG dfs_w_counter;
+
+	NewDFSMPeriod DFS_T[NEW_DFS_MAX_CHANNEL][NEW_DFS_MPERIOD_ENT_NUM];	/* period table */
+	USHORT dfs_t_idx[NEW_DFS_MAX_CHANNEL];
+
+	USHORT dfs_width_diff_ch1_Shift;
+	USHORT dfs_width_diff_ch2_Shift;
+	USHORT dfs_width_diff_Shift;
+	USHORT dfs_period_err;
+	ULONG dfs_max_period;	/* Max possible Period */
+	USHORT dfs_width_diff;
+	USHORT dfs_width_ch0_err_L;
+	USHORT dfs_width_ch0_err_H;
+	UCHAR dfs_check_loop;
+	UCHAR dfs_declare_thres;
+	UCHAR radarDeclared;
+	UCHAR Ch0Overflow;
+	UCHAR ce_staggered_check;
+	UCHAR hw_dfs_disabled;
+
+	UINT sw_idx[NEW_DFS_MAX_CHANNEL];
+	UINT hw_idx[NEW_DFS_MAX_CHANNEL];
+	UINT pr_idx[NEW_DFS_MAX_CHANNEL];
+
+	/* Hardware detection re-check */
+	ULONG re_check_jiffies[NEW_DFS_MAX_CHANNEL];
+	ULONG re_check_Width[NEW_DFS_MAX_CHANNEL];
+	ULONG re_check_Period[NEW_DFS_MAX_CHANNEL];
+
+	/* false detection filter */
+	UCHAR BUM_time;		/* Bandwidth Usage monitor time */
+	ULONG idle_time;
+	ULONG busy_time;
+	int rssi;
+	UCHAR ch_busy;
+	UCHAR ch_busy_idle_ratio;
+	UCHAR BusyIdleFromCfg;
+	BOOLEAN BusyIdleCfgValid;
+
+	/* Dfs: Radar event expiration parameter */
+	ULONG RadarEventExpire[4];
+
+#define CH_BUSY_NEGATIVE_MASK 0xe0000000	/* this mask is used when use shift operation instead of division on negative integer. */
+#define CH_BUSY_SAMPLE_POWER 3
+#define CH_BUSY_SAMPLE (1 << CH_BUSY_SAMPLE_POWER)
+#define CH_BUSY_MASK  (CH_BUSY_SAMPLE - 1)
+	UCHAR print_ch_busy_sta;
+	ULONG ch_busy_sta[CH_BUSY_SAMPLE];
+	ULONG ch_idle_sta[CH_BUSY_SAMPLE];
+	UCHAR ch_busy_sta_index;
+	int ch_busy_sum;
+	int ch_idle_sum;
+
+#define MAX_FDF_NUMBER 5	/* max false-detection-filter number */
+	UCHAR fdf_num;
+	USHORT ch_busy_threshold[MAX_FDF_NUMBER];
+	int rssi_threshold[MAX_FDF_NUMBER];
+
+	/* Support after dfs_func >= 2 */
+	UCHAR Symmetric_Round;
+	UCHAR VGA_Mask;
+	UCHAR Packet_End_Mask;
+	UCHAR Rx_PE_Mask;
+	UCHAR SymRoundFromCfg;
+	UCHAR SymRoundCfgValid;
+#endif				/* DFS_HARDWARE_SUPPORT */
+
+	/* DFS patch for long pulse */
+	UCHAR W56_debug;
+	ULONG W56_idx;
+	ULONG W56_1s;
+	ULONG W56_4s[4];
+	ULONG W56_total;
+	ULONG W56_hw_1;
+	ULONG W56_hw_2;
+	ULONG W56_hw_sum;
+	UCHAR RadarElectNum;
+
+	/*UCHAR BlockCh[MAX_NUM_OF_CHANNELS]; */
+	/*USHORT ChRemainTime[MAX_NUM_OF_CHANNELS]; */
+	/*UCHAR BlockChNum; */
+
+	UCHAR McuRadarDebug;
+
+	/* Radar detection */
+	UCHAR McuRadarTick;
+	UCHAR McuRadarPeriod;
+	UCHAR McuRadarDetectPeriod;
+	UCHAR McuRadarCtsProtect;
+	UCHAR McuRadarDetectCount;
+	ULONG RadarTimeStampHigh;
+	ULONG RadarTimeStampLow;
+	/*BOOLEAN               bDFSIndoor; */
+
+#endif				/* DFS_SUPPORT */
+
+#ifdef CARRIER_DETECTION_SUPPORT
+	/* Carrier detection */
+	USHORT McuCarrierTick;
+	USHORT McuCarrierDetectCount;
+	USHORT McuCarrierPeriod;
+	UCHAR McuCarrierDetectPeriod;
+	UCHAR McuCarrierCtsProtect;
+#endif				/* CARRIER_DETECTION_SUPPORT */
+
+#if defined(RT305x)||defined(RT30xx)
+	/* request by Gary, for High Power issue */
+	UCHAR HighPowerPatchDisabled;
+#endif				/* defined(RT305x)|| defined(RT30xx) */
+
+#ifdef VCORECAL_SUPPORT
+	UCHAR VCORecalibrationThreshold;
+#endif				/* VCORECAL_SUPPORT */
+
+	BOOLEAN HT_DisallowTKIP;	/* Restrict the encryption type in 11n HT mode */
+
+	BOOLEAN HT_Disable;	/* 1: disable HT function; 0: enable HT function */
+
+
+#ifdef DOT11_N_SUPPORT
+#ifdef TXBF_SUPPORT
+	ULONG ITxBfTimeout;
+	ULONG ETxBfTimeout;
+	ULONG ETxBfEnCond;
+	BOOLEAN ETxBfNoncompress;
+#endif				/* TXBF_SUPPORT */
+#endif				/* DOT11_N_SUPPORT */
+
+	ULONG DebugFlags;	/* Temporary debug flags */
+
+
+
+
+#ifdef RTMP_TEMPERATURE_COMPENSATION
+	/* Temperature compensation, 0: Disabled, 1: Method 1, 2: Method 2 */
+	ULONG TempComp;
+#endif /* RTMP_TEMPERATURE_COMPENSATION */
+} COMMON_CONFIG, *PCOMMON_CONFIG;
+
+/* DebugFlag definitions */
+#define DBF_LESS_AGG_UP			0x0001	/* Less aggressive traing up */
+#define DBF_CHECK_UP_PER		0x0002	/* Don't train up if PER too high */
+#define DBF_NO_TXBF_3SS			0x0004	/* Disable TXBF for 3SS */
+#define DBF_LOW_RA_THRESHOLDS	0x0008	/* Use low RA thresholds */
+#define DBF_UNUSED0				0x0010	/* unused */
+#define DBF_INIT_MCS_MARGIN		0x0020	/* Use 6 dB margin when selecting initial MCS */
+#define DBF_INIT_MCS_DIS1		0x0040	/* Disable highest MCSs when selecting initial MCS */
+#define DBF_INIT_MCS_DIS2		0x0080	/* Disable 2nd highest MCSs when selecting initial MCS */
+#define DBF_FORCE_SGI			0x0100	/* Force Short GI */
+#define DBF_UNUSED0200				0x0200	/* unused */
+#define DBF_UNUSED0400				0x0400	/* unused */
+#define DBF_UNUSED0800				0x0800	/* unused */
+#define DBF_FORCE_AC_VI			0x1000	/* Force AC_VI category */
+#define DBF_UNUSED2000				0x2000	/* unused */
+#define DBF_UNUSED4000				0x4000	/* unused */
+#define DBF_UNUSED8000				0x8000	/* unused */
+
+#ifdef CONFIG_STA_SUPPORT
+/* Modified by Wu Xi-Kun 4/21/2006 */
+/* STA configuration and status */
+typedef struct _STA_ADMIN_CONFIG {
+	/* GROUP 1 - */
+	/*   User configuration loaded from Registry, E2PROM or OID_xxx. These settings describe */
+	/*   the user intended configuration, but not necessary fully equal to the final */
+	/*   settings in ACTIVE BSS after negotiation/compromize with the BSS holder (either */
+	/*   AP or IBSS holder). */
+	/*   Once initialized, user configuration can only be changed via OID_xxx */
+	UCHAR BssType;		/* BSS_INFRA or BSS_ADHOC */
+
+#ifdef MONITOR_FLAG_11N_SNIFFER_SUPPORT
+#define MONITOR_FLAG_11N_SNIFFER		0x01
+	UCHAR BssMonitorFlag;	/* Specific flag for monitor */
+#endif				/* MONITOR_FLAG_11N_SNIFFER_SUPPORT */
+
+	USHORT AtimWin;		/* used when starting a new IBSS */
+
+	/* GROUP 2 - */
+	/*   User configuration loaded from Registry, E2PROM or OID_xxx. These settings describe */
+	/*   the user intended configuration, and should be always applied to the final */
+	/*   settings in ACTIVE BSS without compromising with the BSS holder. */
+	/*   Once initialized, user configuration can only be changed via OID_xxx */
+	UCHAR RssiTrigger;
+	UCHAR RssiTriggerMode;	/* RSSI_TRIGGERED_UPON_BELOW_THRESHOLD or RSSI_TRIGGERED_UPON_EXCCEED_THRESHOLD */
+	USHORT DefaultListenCount;	/* default listen count; */
+	ULONG WindowsPowerMode;	/* Power mode for AC power */
+	ULONG WindowsBatteryPowerMode;	/* Power mode for battery if exists */
+	BOOLEAN bWindowsACCAMEnable;	/* Enable CAM power mode when AC on */
+	BOOLEAN bAutoReconnect;	/* Set to TRUE when setting OID_802_11_SSID with no matching BSSID */
+	ULONG WindowsPowerProfile;	/* Windows power profile, for NDIS5.1 PnP */
+
+	/* MIB:ieee802dot11.dot11smt(1).dot11StationConfigTable(1) */
+	USHORT Psm;		/* power management mode   (PWR_ACTIVE|PWR_SAVE) */
+	USHORT DisassocReason;
+	UCHAR DisassocSta[MAC_ADDR_LEN];
+	USHORT DeauthReason;
+	UCHAR DeauthSta[MAC_ADDR_LEN];
+	USHORT AuthFailReason;
+	UCHAR AuthFailSta[MAC_ADDR_LEN];
+
+	NDIS_802_11_PRIVACY_FILTER PrivacyFilter;	/* PrivacyFilter enum for 802.1X */
+	NDIS_802_11_AUTHENTICATION_MODE AuthMode;	/* This should match to whatever microsoft defined */
+	NDIS_802_11_WEP_STATUS WepStatus;
+
+	/* Add to support different cipher suite for WPA2/WPA mode */
+	NDIS_802_11_ENCRYPTION_STATUS GroupCipher;	/* Multicast cipher suite */
+	NDIS_802_11_ENCRYPTION_STATUS PairCipher;	/* Unicast cipher suite */
+	BOOLEAN bMixCipher;	/* Indicate current Pair & Group use different cipher suites */
+	USHORT RsnCapability;
+
+	NDIS_802_11_WEP_STATUS GroupKeyWepStatus;
+
+	UCHAR WpaPassPhrase[64];	/* WPA PSK pass phrase */
+	UINT WpaPassPhraseLen;	/* the length of WPA PSK pass phrase */
+	UCHAR PMK[LEN_PMK];	/* WPA PSK mode PMK */
+	UCHAR PTK[LEN_PTK];	/* WPA PSK mode PTK */
+	UCHAR GMK[LEN_GMK];	/* WPA PSK mode GMK */
+	UCHAR GTK[MAX_LEN_GTK];	/* GTK from authenticator */
+	UCHAR GNonce[32];	/* GNonce for WPA2PSK from authenticator */
+	CIPHER_KEY TxGTK;
+	BSSID_INFO SavedPMK[PMKID_NO];
+	UINT SavedPMKNum;	/* Saved PMKID number */
+
+	UCHAR DefaultKeyId;
+
+
+	/* WPA 802.1x port control, WPA_802_1X_PORT_SECURED, WPA_802_1X_PORT_NOT_SECURED */
+	UCHAR PortSecured;
+
+	/* For WPA countermeasures */
+	ULONG LastMicErrorTime;	/* record last MIC error time */
+	ULONG MicErrCnt;	/* Should be 0, 1, 2, then reset to zero (after disassoiciation). */
+	BOOLEAN bBlockAssoc;	/* Block associate attempt for 60 seconds after counter measure occurred. */
+	/* For WPA-PSK supplicant state */
+	UINT8 WpaState;		/* Default is SS_NOTUSE and handled by microsoft 802.1x */
+	UCHAR ReplayCounter[8];
+	UCHAR ANonce[32];	/* ANonce for WPA-PSK from aurhenticator */
+	UCHAR SNonce[32];	/* SNonce for WPA-PSK */
+
+	UCHAR LastSNR0;		/* last received BEACON's SNR */
+	UCHAR LastSNR1;		/* last received BEACON's SNR for 2nd  antenna */
+#ifdef DOT11N_SS3_SUPPORT
+	UCHAR LastSNR2;		/* last received BEACON's SNR for 3nd  antenna */
+#endif				/* DOT11N_SS3_SUPPORT */
+	RSSI_SAMPLE RssiSample;
+	ULONG NumOfAvgRssiSample;
+
+	ULONG LastBeaconRxTime;	/* OS's timestamp of the last BEACON RX time */
+	ULONG Last11bBeaconRxTime;	/* OS's timestamp of the last 11B BEACON RX time */
+	ULONG Last11gBeaconRxTime;	/* OS's timestamp of the last 11G BEACON RX time */
+	ULONG Last20NBeaconRxTime;	/* OS's timestamp of the last 20MHz N BEACON RX time */
+
+	ULONG LastScanTime;	/* Record last scan time for issue BSSID_SCAN_LIST */
+	BOOLEAN bNotFirstScan;	/* Sam add for ADHOC flag to do first scan when do initialization */
+	BOOLEAN bSwRadio;	/* Software controlled Radio On/Off, TRUE: On */
+	BOOLEAN bHwRadio;	/* Hardware controlled Radio On/Off, TRUE: On */
+	BOOLEAN bRadio;		/* Radio state, And of Sw & Hw radio state */
+	BOOLEAN bHardwareRadio;	/* Hardware controlled Radio enabled */
+	BOOLEAN bShowHiddenSSID;	/* Show all known SSID in SSID list get operation */
+
+	/* New for WPA, windows want us to to keep association information and */
+	/* Fixed IEs from last association response */
+	NDIS_802_11_ASSOCIATION_INFORMATION AssocInfo;
+	USHORT ReqVarIELen;	/* Length of next VIE include EID & Length */
+	UCHAR ReqVarIEs[MAX_VIE_LEN];	/* The content saved here should be little-endian format. */
+	USHORT ResVarIELen;	/* Length of next VIE include EID & Length */
+	UCHAR ResVarIEs[MAX_VIE_LEN];
+
+	UCHAR RSNIE_Len;
+	UCHAR RSN_IE[MAX_LEN_OF_RSNIE];	/* The content saved here should be little-endian format. */
+
+	ULONG CLBusyBytes;	/* Save the total bytes received durning channel load scan time */
+	USHORT RPIDensity[8];	/* Array for RPI density collection */
+
+	UCHAR RMReqCnt;		/* Number of measurement request saved. */
+	UCHAR CurrentRMReqIdx;	/* Number of measurement request saved. */
+	BOOLEAN ParallelReq;	/* Parallel measurement, only one request performed, */
+	/* It must be the same channel with maximum duration */
+	USHORT ParallelDuration;	/* Maximum duration for parallel measurement */
+	UCHAR ParallelChannel;	/* Only one channel with parallel measurement */
+	USHORT IAPPToken;	/* IAPP dialog token */
+	/* Hack for channel load and noise histogram parameters */
+	UCHAR NHFactor;		/* Parameter for Noise histogram */
+	UCHAR CLFactor;		/* Parameter for channel load */
+
+	RALINK_TIMER_STRUCT StaQuickResponeForRateUpTimer;
+	BOOLEAN StaQuickResponeForRateUpTimerRunning;
+
+	UCHAR DtimCount;	/* 0.. DtimPeriod-1 */
+	UCHAR DtimPeriod;	/* default = 3 */
+
+#ifdef QOS_DLS_SUPPORT
+	RT_802_11_DLS DLSEntry[MAX_NUM_OF_DLS_ENTRY];
+	UCHAR DlsReplayCounter[8];
+#endif				/* QOS_DLS_SUPPORT */
+
+	BOOLEAN bTDLSCapable;	/* 0:disable TDLS, 1:enable TDLS */
+	/*//////////////////////////////////////////////////////////////////////////////////// */
+	/* This is only for WHQL test. */
+	BOOLEAN WhqlTest;
+	/*//////////////////////////////////////////////////////////////////////////////////// */
+
+	RALINK_TIMER_STRUCT WpaDisassocAndBlockAssocTimer;
+	/* Fast Roaming */
+	BOOLEAN bAutoRoaming;	/* 0:disable auto roaming by RSSI, 1:enable auto roaming by RSSI */
+	CHAR dBmToRoam;		/* the condition to roam when receiving Rssi less than this value. It's negative value. */
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+	BOOLEAN IEEE8021X;
+	BOOLEAN IEEE8021x_required_keys;
+	CIPHER_KEY DesireSharedKey[4];	/* Record user desired WEP keys */
+	UCHAR DesireSharedKeyId;
+
+	/* 0x00: driver ignores wpa_supplicant */
+	/* 0x01: wpa_supplicant initiates scanning and AP selection */
+	/* 0x02: driver takes care of scanning, AP selection, and IEEE 802.11 association parameters */
+	/* 0x80: wpa_supplicant trigger driver to do WPS */
+	UCHAR WpaSupplicantUP;
+	UCHAR WpaSupplicantScanCount;
+	BOOLEAN bRSN_IE_FromWpaSupplicant;
+	BOOLEAN bLostAp;
+	UCHAR *pWpsProbeReqIe;
+	UINT WpsProbeReqIeLen;
+	UCHAR *pWpaAssocIe;
+	UINT WpaAssocIeLen;
+#endif				/* WPA_SUPPLICANT_SUPPORT */
+
+	CHAR dev_name[16];
+	USHORT OriDevType;
+
+	BOOLEAN bTGnWifiTest;
+	BOOLEAN bScanReqIsFromWebUI;
+
+	HTTRANSMIT_SETTING HTPhyMode, MaxHTPhyMode, MinHTPhyMode;	/* For transmit phy setting in TXWI. */
+	DESIRED_TRANSMIT_SETTING DesiredTransmitSetting;
+	RT_HT_PHY_INFO DesiredHtPhyInfo;
+	BOOLEAN bAutoTxRateSwitch;
+
+
+#ifdef EXT_BUILD_CHANNEL_LIST
+	UCHAR IEEE80211dClientMode;
+	UCHAR StaOriCountryCode[3];
+	UCHAR StaOriGeography;
+#endif				/* EXT_BUILD_CHANNEL_LIST */
+
+
+
+
+
+	BOOLEAN bAutoConnectByBssid;
+	ULONG BeaconLostTime;	/* seconds */
+	BOOLEAN bForceTxBurst;	/* 1: force enble TX PACKET BURST, 0: disable */
+#ifdef XLINK_SUPPORT
+	BOOLEAN PSPXlink;	/* 0: Disable. 1: Enable */
+#endif				/* XLINK_SUPPORT */
+	BOOLEAN bAutoConnectIfNoSSID;
+#ifdef DOT11_N_SUPPORT
+#ifdef DOT11N_DRAFT3
+	UCHAR RegClass;		/*IE_SUPP_REG_CLASS: 2009 PF#3: For 20/40 Intolerant Channel Report */
+#endif				/* DOT11N_DRAFT3 */
+	BOOLEAN bAdhocN;
+#endif				/* DOT11_N_SUPPORT */
+	BOOLEAN bAdhocCreator;	/*TRUE indicates divice is Creator. */
+
+
+	/*
+	   Enhancement Scanning Mechanism
+	   To decrease the possibility of ping loss
+	 */
+	BOOLEAN bImprovedScan;
+	BOOLEAN BssNr;
+	UCHAR ScanChannelCnt;	/* 0 at the beginning of scan, stop at 7 */
+	UCHAR LastScanChannel;
+	/************************************/
+
+	BOOLEAN bFastConnect;
+
+
+
+#ifdef RTMP_FREQ_CALIBRATION_SUPPORT
+	BOOLEAN				AdaptiveFreq;  /* Todo: iwpriv and profile support. */
+#endif /* RTMP_FREQ_CALIBRATION_SUPPORT */
+
+} STA_ADMIN_CONFIG, *PSTA_ADMIN_CONFIG;
+
+/* This data structure keep the current active BSS/IBSS's configuration that this STA */
+/* had agreed upon joining the network. Which means these parameters are usually decided */
+/* by the BSS/IBSS creator instead of user configuration. Data in this data structurre */
+/* is valid only when either ADHOC_ON(pAd) or INFRA_ON(pAd) is TRUE. */
+/* Normally, after SCAN or failed roaming attempts, we need to recover back to */
+/* the current active settings. */
+typedef struct _STA_ACTIVE_CONFIG {
+	USHORT Aid;
+	USHORT AtimWin;		/* in kusec; IBSS parameter set element */
+	USHORT CapabilityInfo;
+	USHORT CfpMaxDuration;
+	USHORT CfpPeriod;
+
+	/* Copy supported rate from desired AP's beacon. We are trying to match */
+	/* AP's supported and extended rate settings. */
+	UCHAR SupRate[MAX_LEN_OF_SUPPORTED_RATES];
+	UCHAR ExtRate[MAX_LEN_OF_SUPPORTED_RATES];
+	UCHAR SupRateLen;
+	UCHAR ExtRateLen;
+	/* Copy supported ht from desired AP's beacon. We are trying to match */
+	RT_HT_PHY_INFO SupportedPhyInfo;
+	RT_HT_CAPABILITY SupportedHtPhy;
+} STA_ACTIVE_CONFIG, *PSTA_ACTIVE_CONFIG;
+
+
+
+#endif /* CONFIG_STA_SUPPORT */
+
+
+
+
+typedef struct _MAC_TABLE_ENTRY {
+	/*
+	   0:Invalid,
+	   Bit 0: AsCli, Bit 1: AsWds, Bit 2: AsAPCLI,
+	   Bit 3: AsMesh, Bit 4: AsDls, Bit 5: AsTDls
+	 */
+	UINT32 EntryType;
+	BOOLEAN isCached;
+	BOOLEAN bIAmBadAtheros;	/* Flag if this is Atheros chip that has IOT problem.  We need to turn on RTS/CTS protection. */
+
+	/* WPA/WPA2 4-way database */
+	UCHAR EnqueueEapolStartTimerRunning;	/* Enqueue EAPoL-Start for triggering EAP SM */
+	RALINK_TIMER_STRUCT EnqueueStartForPSKTimer;	/* A timer which enqueue EAPoL-Start for triggering PSK SM */
+
+	/*jan for wpa */
+	/* record which entry revoke MIC Failure , if it leaves the BSS itself, AP won't update aMICFailTime MIB */
+	UCHAR CMTimerRunning;
+	UCHAR apidx;		/* MBSS number */
+	UCHAR RSNIE_Len;
+	UCHAR RSN_IE[MAX_LEN_OF_RSNIE];
+	UCHAR ANonce[LEN_KEY_DESC_NONCE];
+	UCHAR SNonce[LEN_KEY_DESC_NONCE];
+	UCHAR R_Counter[LEN_KEY_DESC_REPLAY];
+	UCHAR PTK[64];
+	UCHAR ReTryCounter;
+	RALINK_TIMER_STRUCT RetryTimer;
+	NDIS_802_11_AUTHENTICATION_MODE AuthMode;	/* This should match to whatever microsoft defined */
+	NDIS_802_11_WEP_STATUS WepStatus;
+	NDIS_802_11_WEP_STATUS GroupKeyWepStatus;
+	UINT8 WpaState;
+	UINT8 GTKState;
+	USHORT PortSecured;
+	NDIS_802_11_PRIVACY_FILTER PrivacyFilter;	/* PrivacyFilter enum for 802.1X */
+	CIPHER_KEY PairwiseKey;
+	PVOID pAd;
+	INT PMKID_CacheIdx;
+	UCHAR PMKID[LEN_PMKID];
+	UCHAR NegotiatedAKM[LEN_OUI_SUITE];	/* It indicate the negotiated AKM suite */
+
+
+	UCHAR Addr[MAC_ADDR_LEN];
+	UCHAR			HdrAddr1[MAC_ADDR_LEN];
+	UCHAR			HdrAddr2[MAC_ADDR_LEN];
+	UCHAR			HdrAddr3[MAC_ADDR_LEN];
+	UCHAR PsMode;
+	SST Sst;
+	AUTH_STATE AuthState;	/* for SHARED KEY authentication state machine used only */
+	BOOLEAN IsReassocSta;	/* Indicate whether this is a reassociation procedure */
+	USHORT Aid;
+	USHORT CapabilityInfo;
+	UCHAR LastRssi;
+	ULONG NoDataIdleCount;
+	UINT16 StationKeepAliveCount;	/* unit: second */
+	ULONG PsQIdleCount;
+	QUEUE_HEADER PsQueue;
+
+	UINT32 StaConnectTime;	/* the live time of this station since associated with AP */
+	UINT32 StaIdleTimeout;	/* idle timeout per entry */
+
+
+#ifdef DOT11_N_SUPPORT
+	BOOLEAN bSendBAR;
+	USHORT NoBADataCountDown;
+
+	UINT32 CachedBuf[16];	/* UINT (4 bytes) for alignment */
+
+#ifdef TXBF_SUPPORT
+	UINT TxBFCount;
+	COUNTER_TXBF TxBFCounters;
+#endif				/* TXBF_SUPPORT */
+#endif				/* DOT11_N_SUPPORT */
+
+	UINT FIFOCount;
+	UINT DebugFIFOCount;
+	UINT DebugTxCount;
+	BOOLEAN bDlsInit;
+
+/*==================================================== */
+/*WDS entry needs these */
+/* if ValidAsWDS==TRUE, MatchWDSTabIdx is the index in WdsTab.MacTab */
+	UINT MatchWDSTabIdx;
+	UCHAR MaxSupportedRate;
+	UCHAR CurrTxRate;
+	UCHAR CurrTxRateIndex;
+
+#ifdef NEW_RATE_ADAPT_SUPPORT
+	UCHAR lastRateIdx;
+	UCHAR fewPktsCnt;
+	BOOLEAN perThrdAdj;
+#endif				/* NEW_RATE_ADAPT_SUPPORT */
+	UCHAR mcsGroup;		/*the mcs group to be tried */
+	UCHAR lastLegalMfb;	/*last legal mfb which is used to set rate */
+	BOOLEAN isMfbChanged;	/*purpose: true when mfb has changed but the new mfb is not adopted for Tx */
+	PRTMP_TX_RATE_SWITCH LegalMfbRS;
+	BOOLEAN fLastChangeAccordingMfb;
+	NDIS_SPIN_LOCK fLastChangeAccordingMfbLock;
+/*Tx MRQ */
+	BOOLEAN toTxMrq;
+	UCHAR msiToTx, mrqCnt;	/*mrqCnt is used to count down the inverted-BF mrq to be sent */
+/*Rx mfb */
+	UCHAR pendingMfsi;
+/*Tx MFB */
+	BOOLEAN toTxMfb;
+	UCHAR mfbToTx;
+#ifdef TXBF_SUPPORT
+	UCHAR TxSndgType;
+	UCHAR TxSndgBW;
+	UCHAR TxSndgMcs;
+	NDIS_SPIN_LOCK TxSndgLock;
+#endif				/* TXBF_SUPPORT */
+/*ETxBF */
+/*	UCHAR 		legalMfbOld; */
+	UCHAR bfState;
+	UCHAR bestMethod;
+	UCHAR mfb0, mfb1;
+/*	BOOLEAN		isTxBFOld; */
+	BOOLEAN toTxSndg;
+	UCHAR sndgMcs;
+	UCHAR sndgBW;
+	UCHAR sndgRateIdx;
+	BOOLEAN ndpSndg;
+	UCHAR sndg0Mcs, bf0Mcs, sndg0RateIdx, bf0RateIdx;
+	INT sndg0Snr0, sndg0Snr1, sndg0Snr2;
+	UCHAR sndg1Mcs, bf1Mcs, sndg1RateIdx, bf1RateIdx;
+	INT sndg1Snr0, sndg1Snr1, sndg1Snr2;
+	UCHAR noSndgCnt;
+	UCHAR eTxBfEnCond, noSndgCntThrd, ndpSndgStreams;
+	BOOLEAN useNewRateAdapt;
+
+	/* to record the each TX rate's quality. 0 is best, the bigger the worse. */
+	USHORT TxQuality[MAX_STEP_OF_TX_RATE_SWITCH];
+/*	USHORT          OneSecTxOkCount; */
+	UINT32 OneSecTxNoRetryOkCount;
+	UINT32 OneSecTxRetryOkCount;
+	UINT32 OneSecTxFailCount;
+	UINT32 ContinueTxFailCnt;
+	UINT32 CurrTxRateStableTime;	/* # of second in current TX rate */
+	UCHAR TxRateUpPenalty;	/* extra # of second penalty due to last unstable condition */
+	ULONG TimeStamp_toTxRing;
+
+/*==================================================== */
+
+
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef QOS_DLS_SUPPORT
+	UINT MatchDlsEntryIdx;	/* indicate the index in pAd->StaCfg.DLSEntry */
+#endif				/* QOS_DLS_SUPPORT */
+#endif				/* CONFIG_STA_SUPPORT */
+
+	BOOLEAN fLastSecAccordingRSSI;
+	UCHAR LastSecTxRateChangeAction;	/* 0: no change, 1:rate UP, 2:rate down */
+	CHAR LastTimeTxRateChangeAction;	/*Keep last time value of LastSecTxRateChangeAction */
+	ULONG LastTxOkCount;
+	UCHAR PER[MAX_STEP_OF_TX_RATE_SWITCH];
+
+	/* a bitmap of BOOLEAN flags. each bit represent an operation status of a particular */
+	/* BOOLEAN control, either ON or OFF. These flags should always be accessed via */
+	/* CLIENT_STATUS_TEST_FLAG(), CLIENT_STATUS_SET_FLAG(), CLIENT_STATUS_CLEAR_FLAG() macros. */
+	/* see fOP_STATUS_xxx in RTMP_DEF.C for detail bit definition. fCLIENT_STATUS_AMSDU_INUSED */
+	ULONG ClientStatusFlags;
+
+	HTTRANSMIT_SETTING HTPhyMode, MaxHTPhyMode, MinHTPhyMode;	/* For transmit phy setting in TXWI. */
+
+#ifdef DOT11_N_SUPPORT
+	/* HT EWC MIMO-N used parameters */
+	USHORT RXBAbitmap;	/* fill to on-chip  RXWI_BA_BITMASK in 8.1.3RX attribute entry format */
+	USHORT TXBAbitmap;	/* This bitmap as originator, only keep in software used to mark AMPDU bit in TXWI */
+	USHORT TXAutoBAbitmap;
+	USHORT BADeclineBitmap;
+	USHORT BARecWcidArray[NUM_OF_TID];	/* The mapping wcid of recipient session. if RXBAbitmap bit is masked */
+	USHORT BAOriWcidArray[NUM_OF_TID];	/* The mapping wcid of originator session. if TXBAbitmap bit is masked */
+	USHORT BAOriSequence[NUM_OF_TID];	/* The mapping wcid of originator session. if TXBAbitmap bit is masked */
+
+	/* 802.11n features. */
+	UCHAR MpduDensity;
+	UCHAR MaxRAmpduFactor;
+	UCHAR AMsduSize;
+	UCHAR MmpsMode;		/* MIMO power save more. */
+
+	HT_CAPABILITY_IE HTCapability;
+
+#ifdef DOT11N_DRAFT3
+	UCHAR BSS2040CoexistenceMgmtSupport;
+	BOOLEAN bForty_Mhz_Intolerant;
+#endif				/* DOT11N_DRAFT3 */
+#endif				/* DOT11_N_SUPPORT */
+
+
+	BOOLEAN bAutoTxRateSwitch;
+
+	UCHAR RateLen;
+	struct _MAC_TABLE_ENTRY *pNext;
+	USHORT TxSeq[NUM_OF_TID];
+	USHORT NonQosDataSeq;
+
+	RSSI_SAMPLE RssiSample;
+	UINT32 LastRxRate;
+
+
+	BOOLEAN bWscCapable;
+	UCHAR Receive_EapolStart_EapRspId;
+
+	UINT32 TXMCSExpected[MAX_MCS_SET];
+	UINT32 TXMCSSuccessful[MAX_MCS_SET];
+	UINT32 TXMCSFailed[MAX_MCS_SET];
+	UINT32 TXMCSAutoFallBack[MAX_MCS_SET][MAX_MCS_SET];
+
+#ifdef CONFIG_STA_SUPPORT
+	ULONG LastBeaconRxTime;
+#endif				/* CONFIG_STA_SUPPORT */
+
+
+
+	ULONG AssocDeadLine;
+
+
+
+
+	ULONG ChannelQuality;	/* 0..100, Channel Quality Indication for Roaming */
+
+
+#ifdef VENDOR_FEATURE1_SUPPORT
+	/* total 128B, use UINT32 to avoid alignment problem */
+	UINT32 HeaderBuf[32];	/* (total 128B) TempBuffer for TX_INFO + TX_WI + 802.11 Header + padding + AMSDU SubHeader + LLC/SNAP */
+
+	UCHAR HdrPadLen;	/* recording Header Padding Length; */
+	UCHAR MpduHeaderLen;
+	UINT16 Protocol;
+#endif				/* VENDOR_FEATURE1_SUPPORT */
+
+#ifdef AGS_SUPPORT
+	AGS_CONTROL AGSCtrl;	/* AGS control */
+#endif				/* AGS_SUPPORT */
+
+
+} MAC_TABLE_ENTRY, *PMAC_TABLE_ENTRY;
+
+typedef struct _MAC_TABLE {
+	MAC_TABLE_ENTRY *Hash[HASH_TABLE_SIZE];
+	MAC_TABLE_ENTRY Content[MAX_LEN_OF_MAC_TABLE];
+	USHORT Size;
+	QUEUE_HEADER McastPsQueue;
+	ULONG PsQIdleCount;
+	BOOLEAN fAnyStationInPsm;
+	BOOLEAN fAnyStationBadAtheros;	/* Check if any Station is atheros 802.11n Chip.  We need to use RTS/CTS with Atheros 802,.11n chip. */
+	BOOLEAN fAnyTxOPForceDisable;	/* Check if it is necessary to disable BE TxOP */
+	BOOLEAN fAllStationAsRalink;	/* Check if all stations are ralink-chipset */
+#ifdef DOT11_N_SUPPORT
+	BOOLEAN fAnyStationIsLegacy;	/* Check if I use legacy rate to transmit to my BSS Station/ */
+	BOOLEAN fAnyStationNonGF;	/* Check if any Station can't support GF. */
+	BOOLEAN fAnyStation20Only;	/* Check if any Station can't support GF. */
+	BOOLEAN fAnyStationMIMOPSDynamic;	/* Check if any Station is MIMO Dynamic */
+	BOOLEAN fAnyBASession;	/* Check if there is BA session.  Force turn on RTS/CTS */
+	BOOLEAN fAnyStaFortyIntolerant;	/* Check if still has any station set the Intolerant bit on! */
+
+/*2008/10/28: KH add to support Antenna power-saving of AP<-- */
+/*2008/10/28: KH add to support Antenna power-saving of AP--> */
+#endif				/* DOT11_N_SUPPORT */
+} MAC_TABLE, *PMAC_TABLE;
+
+
+
+
+#ifdef BLOCK_NET_IF
+typedef struct _BLOCK_QUEUE_ENTRY {
+	BOOLEAN SwTxQueueBlockFlag;
+	LIST_HEADER NetIfList;
+} BLOCK_QUEUE_ENTRY, *PBLOCK_QUEUE_ENTRY;
+#endif /* BLOCK_NET_IF */
+
+
+struct wificonf {
+	BOOLEAN bShortGI;
+	BOOLEAN bGreenField;
+};
+
+typedef struct _RTMP_DEV_INFO_ {
+	UCHAR chipName[16];
+	RTMP_INF_TYPE infType;
+} RTMP_DEV_INFO;
+
+#ifdef DBG_DIAGNOSE
+#define DIAGNOSE_TIME	10	/* 10 sec */
+typedef struct _RtmpDiagStrcut_ {	/* Diagnosis Related element */
+	unsigned char inited;
+	unsigned char qIdx;
+	unsigned char ArrayStartIdx;
+	unsigned char ArrayCurIdx;
+	/* Tx Related Count */
+	USHORT TxDataCnt[DIAGNOSE_TIME];
+	USHORT TxFailCnt[DIAGNOSE_TIME];
+/*	USHORT			TxDescCnt[DIAGNOSE_TIME][16];		// TxDesc queue length in scale of 0~14, >=15 */
+	USHORT TxDescCnt[DIAGNOSE_TIME][24];	/* 3*3    // TxDesc queue length in scale of 0~14, >=15 */
+/*	USHORT			TxMcsCnt[DIAGNOSE_TIME][16];			// TxDate MCS Count in range from 0 to 15, step in 1. */
+	USHORT TxMcsCnt[DIAGNOSE_TIME][MAX_MCS_SET];	/* 3*3 */
+	USHORT TxSWQueCnt[DIAGNOSE_TIME][9];	/* TxSwQueue length in scale of 0, 1, 2, 3, 4, 5, 6, 7, >=8 */
+
+	USHORT TxAggCnt[DIAGNOSE_TIME];
+	USHORT TxNonAggCnt[DIAGNOSE_TIME];
+/*	USHORT			TxAMPDUCnt[DIAGNOSE_TIME][16];		// 10 sec, TxDMA APMDU Aggregation count in range from 0 to 15, in setp of 1. */
+	USHORT TxAMPDUCnt[DIAGNOSE_TIME][MAX_MCS_SET];	/* 3*3 // 10 sec, TxDMA APMDU Aggregation count in range from 0 to 15, in setp of 1. */
+	USHORT TxRalinkCnt[DIAGNOSE_TIME];	/* TxRalink Aggregation Count in 1 sec scale. */
+	USHORT TxAMSDUCnt[DIAGNOSE_TIME];	/* TxAMSUD Aggregation Count in 1 sec scale. */
+
+	/* Rx Related Count */
+	USHORT RxDataCnt[DIAGNOSE_TIME];	/* Rx Total Data count. */
+	USHORT RxCrcErrCnt[DIAGNOSE_TIME];
+/*	USHORT			RxMcsCnt[DIAGNOSE_TIME][16];		// Rx MCS Count in range from 0 to 15, step in 1. */
+	USHORT RxMcsCnt[DIAGNOSE_TIME][MAX_MCS_SET];	/* 3*3 */
+} RtmpDiagStruct;
+#endif /* DBG_DIAGNOSE */
+
+#ifdef RTMP_INTERNAL_TX_ALC
+/*
+	The number of channels for per-channel Tx power offset
+*/
+#define NUM_OF_CH_FOR_PER_CH_TX_PWR_OFFSET	14
+
+/* */
+/* The Tx power control using the internal ALC */
+/* */
+typedef struct _TX_POWER_CONTROL {
+	BOOLEAN bInternalTxALC;	/* Internal Tx ALC */
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+	BOOLEAN bExtendedTssiMode; /* The extended TSSI mode (each channel has different Tx power if needed) */
+	CHAR PerChTxPwrOffset[NUM_OF_CH_FOR_PER_CH_TX_PWR_OFFSET + 1]; /* Per-channel Tx power offset */
+
+	
+	/* RT5392 temperature compensation */
+	/* lookup table, 33 elements (-7, -6....0, 1, 2...25) */
+	INT LookupTable[33];
+
+	/* Reference temperature, from EEPROM */
+	INT RefTempG;
+
+	/* Index offset, -7....25. */
+	INT LookupTableIndex;
+	
+	CHAR idxTxPowerTable2; /* The index of the Tx power table */
+
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+
+	CHAR idxTxPowerTable;	/* The index of the Tx power table */
+
+	CHAR RF_R12_Value;	/* RF R12[4:0]: Tx0 ALC   3390: RF R12[4:0]: Tx0 ALC, 5390: RF R49[5:0]: Tx0 ALC*/
+
+	CHAR MAC_PowerDelta;	/* Tx power control over MAC 0x1314~0x1324 */
+} TX_POWER_CONTROL, *PTX_POWER_CONTROL;
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+/* */
+/* The entry of transmit power control over MAC */
+/* */
+typedef struct _TX_POWER_CONTROL_OVER_MAC_ENTRY {
+	USHORT MACRegisterOffset;	/* MAC register offset */
+	ULONG RegisterValue;	/* Register value */
+} TX_POWER_CONTROL_OVER_MAC_ENTRY, *PTX_POWER_CONTROL_OVER_MAC_ENTRY;
+
+/* */
+/* The maximum registers of transmit power control */
+/* */
+#define MAX_TX_PWR_CONTROL_OVER_MAC_REGISTERS 5
+
+
+
+/* */
+/* The configuration of the transmit power control over MAC */
+/* */
+typedef struct _CONFIGURATION_OF_TX_POWER_CONTROL_OVER_MAC {
+	UCHAR NumOfEntries;	/* Number of entries */
+	TX_POWER_CONTROL_OVER_MAC_ENTRY
+	    TxPwrCtrlOverMAC[MAX_TX_PWR_CONTROL_OVER_MAC_REGISTERS];
+} CONFIGURATION_OF_TX_POWER_CONTROL_OVER_MAC, *PCONFIGURATION_OF_TX_POWER_CONTROL_OVER_MAC;
+
+/* */
+/* The extension of the transmit power control over MAC */
+/* */
+typedef struct _TX_POWER_CONTROL_EXT_OVER_MAC {
+	struct {
+		ULONG TxPwrCfg0;	/* MAC 0x1314 */
+		ULONG TxPwrCfg0Ext;	/* MAC 0x1390 */
+		ULONG TxPwrCfg1;	/* MAC 0x1318 */
+		ULONG TxPwrCfg1Ext;	/* MAC 0x1394 */
+		ULONG TxPwrCfg2;	/* MAC 0x131C */
+		ULONG TxPwrCfg2Ext;	/* MAC 0x1398 */
+		ULONG TxPwrCfg3;	/* MAC 0x1320 */
+		ULONG TxPwrCfg3Ext;	/* MAC 0x139C */
+		ULONG TxPwrCfg4;	/* MAC 0x1324 */
+		ULONG TxPwrCfg4Ext;	/* MAC 0x13A0 */
+		ULONG TxPwrCfg5;	/* MAC 0x1384 */
+		ULONG TxPwrCfg6;	/* MAC 0x1388 */
+		ULONG TxPwrCfg7;	/* MAC 0x13D4 */
+		ULONG TxPwrCfg8;	/* MAC 0x13D8 */
+		ULONG TxPwrCfg9;	/* MAC 0x13DC */
+	} BW20Over2Dot4G;
+
+	struct {
+		ULONG TxPwrCfg0;	/* MAC 0x1314 */
+		ULONG TxPwrCfg0Ext;	/* MAC 0x1390 */
+		ULONG TxPwrCfg1;	/* MAC 0x1318 */
+		ULONG TxPwrCfg1Ext;	/* MAC 0x1394 */
+		ULONG TxPwrCfg2;	/* MAC 0x131C */
+		ULONG TxPwrCfg2Ext;	/* MAC 0x1398 */
+		ULONG TxPwrCfg3;	/* MAC 0x1320 */
+		ULONG TxPwrCfg3Ext;	/* MAC 0x139C */
+		ULONG TxPwrCfg4;	/* MAC 0x1324 */
+		ULONG TxPwrCfg4Ext;	/* MAC 0x13A0 */
+		ULONG TxPwrCfg5;	/* MAC 0x1384 */
+		ULONG TxPwrCfg6;	/* MAC 0x1388 */
+		ULONG TxPwrCfg7;	/* MAC 0x13D4 */
+		ULONG TxPwrCfg8;	/* MAC 0x13D8 */
+		ULONG TxPwrCfg9;	/* MAC 0x13DC */
+	} BW40Over2Dot4G;
+
+	struct {
+		ULONG TxPwrCfg0;	/* MAC 0x1314 */
+		ULONG TxPwrCfg0Ext;	/* MAC 0x1390 */
+		ULONG TxPwrCfg1;	/* MAC 0x1318 */
+		ULONG TxPwrCfg1Ext;	/* MAC 0x1394 */
+		ULONG TxPwrCfg2;	/* MAC 0x131C */
+		ULONG TxPwrCfg2Ext;	/* MAC 0x1398 */
+		ULONG TxPwrCfg3;	/* MAC 0x1320 */
+		ULONG TxPwrCfg3Ext;	/* MAC 0x139C */
+		ULONG TxPwrCfg4;	/* MAC 0x1324 */
+		ULONG TxPwrCfg4Ext;	/* MAC 0x13A0 */
+		ULONG TxPwrCfg5;	/* MAC 0x1384 */
+		ULONG TxPwrCfg6;	/* MAC 0x1388 */
+		ULONG TxPwrCfg7;	/* MAC 0x13D4 */
+		ULONG TxPwrCfg8;	/* MAC 0x13D8 */
+		ULONG TxPwrCfg9;	/* MAC 0x13DC */
+	} BW20Over5G;
+
+	struct {
+		ULONG TxPwrCfg0;	/* MAC 0x1314 */
+		ULONG TxPwrCfg0Ext;	/* MAC 0x1390 */
+		ULONG TxPwrCfg1;	/* MAC 0x1318 */
+		ULONG TxPwrCfg1Ext;	/* MAC 0x1394 */
+		ULONG TxPwrCfg2;	/* MAC 0x131C */
+		ULONG TxPwrCfg2Ext;	/* MAC 0x1398 */
+		ULONG TxPwrCfg3;	/* MAC 0x1320 */
+		ULONG TxPwrCfg3Ext;	/* MAC 0x139C */
+		ULONG TxPwrCfg4;	/* MAC 0x1324 */
+		ULONG TxPwrCfg4Ext;	/* MAC 0x13A0 */
+		ULONG TxPwrCfg5;	/* MAC 0x1384 */
+		ULONG TxPwrCfg6;	/* MAC 0x1388 */
+		ULONG TxPwrCfg7;	/* MAC 0x13D4 */
+		ULONG TxPwrCfg8;	/* MAC 0x13D8 */
+		ULONG TxPwrCfg9;	/* MAC 0x13DC */
+	} BW40Over5G;
+} TX_POWER_CONTROL_EXT_OVER_MAC, *PTX_POWER_CONTROL_EXT_OVER_MAC;
+
+/* */
+/*  The miniport adapter structure */
+/* */
+struct _RTMP_ADAPTER {
+	PVOID OS_Cookie;	/* save specific structure relative to OS */
+	PNET_DEV net_dev;
+	ULONG VirtualIfCnt;
+
+	RTMP_CHIP_OP chipOps;
+	RTMP_CHIP_CAP chipCap;
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+	USHORT					SameRxByteCount;
+	UCHAR				BbpResetCount;
+#endif // defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) //
+
+
+
+#ifdef CONFIG_STA_SUPPORT
+	USHORT ThisTbttNumToNextWakeUp;
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef HOSTAPD_SUPPORT
+	UINT32 IoctlIF;
+#endif /* HOSTAPD_SUPPORT */
+#ifdef INF_PPA_SUPPORT
+	UINT32 g_if_id;
+	BOOLEAN PPAEnable;
+	PPA_DIRECTPATH_CB *pDirectpathCb;
+#endif /* INF_PPA_SUPPORT */
+
+
+	NDIS_SPIN_LOCK irq_lock;
+
+	/*======Cmd Thread in PCI/RBUS/USB */
+	CmdQ CmdQ;
+	NDIS_SPIN_LOCK CmdQLock;	/* CmdQLock spinlock */
+	RTMP_OS_TASK cmdQTask;
+
+#ifdef RTMP_MAC_USB
+/*****************************************************************************************/
+/*      USB related parameters                                                           */
+/*****************************************************************************************/
+/*	struct usb_config_descriptor		*config; */
+	VOID *config;
+	UINT BulkInEpAddr;	/* bulk-in endpoint address */
+	UINT BulkOutEpAddr[6];	/* bulk-out endpoint address */
+
+	UINT NumberOfPipes;
+	USHORT BulkOutMaxPacketSize;
+	USHORT BulkInMaxPacketSize;
+
+	/*======Control Flags */
+	ULONG BulkFlags;
+	BOOLEAN bUsbTxBulkAggre;	/* Flags for bulk out data priority */
+
+	/*======Cmd Thread */
+/*	CmdQ					CmdQ; */
+/*	NDIS_SPIN_LOCK			CmdQLock;				// CmdQLock spinlock */
+/*	RTMP_OS_TASK			cmdQTask; */
+
+	/*======Semaphores (event) */
+	RTMP_OS_SEM UsbVendorReq_semaphore;
+	RTMP_OS_SEM UsbVendorReq_semaphore2;
+
+	PVOID UsbVendorReqBuf;
+/*	wait_queue_head_t		*wait; */
+	VOID *wait;
+
+	/* lock for ATE */
+#ifdef RALINK_ATE
+	NDIS_SPIN_LOCK GenericLock;	/* ATE Tx/Rx generic spinlock */
+#endif /* RALINK_ATE */
+
+#endif /* RTMP_MAC_USB */
+
+/*****************************************************************************************/
+/*      RBUS related parameters                                                           								  */
+/*****************************************************************************************/
+
+/*****************************************************************************************/
+/*      Both PCI/USB related parameters                                                  							  */
+/*****************************************************************************************/
+	/*RTMP_DEV_INFO                 chipInfo; */
+	RTMP_INF_TYPE infType;
+
+/*****************************************************************************************/
+/*      Driver Mgmt related parameters                                                  							  */
+/*****************************************************************************************/
+	RTMP_OS_TASK mlmeTask;
+#ifdef RTMP_TIMER_TASK_SUPPORT
+	/* If you want use timer task to handle the timer related jobs, enable this. */
+	RTMP_TIMER_TASK_QUEUE TimerQ;
+	NDIS_SPIN_LOCK TimerQLock;
+	RTMP_OS_TASK timerTask;
+#endif /* RTMP_TIMER_TASK_SUPPORT */
+
+/*****************************************************************************************/
+/*      Tx related parameters                                                           */
+/*****************************************************************************************/
+	BOOLEAN DeQueueRunning[NUM_OF_TX_RING];	/* for ensuring RTUSBDeQueuePacket get call once */
+	NDIS_SPIN_LOCK DeQueueLock[NUM_OF_TX_RING];
+
+#ifdef RTMP_MAC_USB
+	/* Data related context and AC specified, 4 AC supported */
+	NDIS_SPIN_LOCK BulkOutLock[6];	/* BulkOut spinlock for 4 ACs */
+	NDIS_SPIN_LOCK MLMEBulkOutLock;	/* MLME BulkOut lock */
+
+	HT_TX_CONTEXT TxContext[NUM_OF_TX_RING];
+	NDIS_SPIN_LOCK TxContextQueueLock[NUM_OF_TX_RING];	/* TxContextQueue spinlock */
+
+	/* 4 sets of Bulk Out index and pending flag */
+	/*
+	   array size of NextBulkOutIndex must be larger than or equal to 5;
+	   Or BulkOutPending[0] will be overwrited in NICInitTransmit().
+	 */
+	UCHAR NextBulkOutIndex[NUM_OF_TX_RING];	/* only used for 4 EDCA bulkout pipe */
+
+	BOOLEAN BulkOutPending[6];	/* used for total 6 bulkout pipe */
+	UCHAR bulkResetPipeid;
+	BOOLEAN MgmtBulkPending;
+	ULONG bulkResetReq[6];
+#ifdef INF_AMAZON_SE
+	ULONG BulkOutDataSizeCount[NUM_OF_TX_RING];
+	BOOLEAN BulkOutDataFlag[NUM_OF_TX_RING];
+	ULONG BulkOutDataSizeLimit[NUM_OF_TX_RING];
+	UCHAR RunningQueueNoCount;
+	UCHAR LastRunningQueueNo;
+#endif /* #ifdef INF_AMAZON_SE */
+
+#ifdef CONFIG_STA_SUPPORT
+	USHORT CountDowntoPsm;
+#endif /* CONFIG_STA_SUPPORT */
+
+#endif /* RTMP_MAC_USB */
+
+	/* resource for software backlog queues */
+	QUEUE_HEADER TxSwQueue[NUM_OF_TX_RING];	/* 4 AC + 1 HCCA */
+	NDIS_SPIN_LOCK TxSwQueueLock[NUM_OF_TX_RING];	/* TxSwQueue spinlock */
+
+	RTMP_DMABUF MgmtDescRing;	/* Shared memory for MGMT descriptors */
+	RTMP_MGMT_RING MgmtRing;
+	NDIS_SPIN_LOCK MgmtRingLock;	/* Prio Ring spinlock */
+
+	UCHAR LastMCUCmd;
+
+/*****************************************************************************************/
+/*      Rx related parameters                                                           */
+/*****************************************************************************************/
+
+
+#ifdef RTMP_MAC_USB
+	RX_CONTEXT RxContext[RX_RING_SIZE];	/* 1 for redundant multiple IRP bulk in. */
+	NDIS_SPIN_LOCK BulkInLock;	/* BulkIn spinlock for 4 ACs */
+	UCHAR PendingRx;	/* The Maximum pending Rx value should be       RX_RING_SIZE. */
+	UCHAR NextRxBulkInIndex;	/* Indicate the current RxContext Index which hold by Host controller. */
+	UCHAR NextRxBulkInReadIndex;	/* Indicate the current RxContext Index which driver can read & process it. */
+	ULONG NextRxBulkInPosition;	/* Want to contatenate 2 URB buffer while 1st is bulkin failed URB. This Position is 1st URB TransferLength. */
+	ULONG TransferBufferLength;	/* current length of the packet buffer */
+	ULONG ReadPosition;	/* current read position in a packet buffer */
+#endif /* RTMP_MAC_USB */
+
+/*****************************************************************************************/
+/*      ASIC related parameters                                                          */
+/*****************************************************************************************/
+	UINT32 MACVersion;	/* MAC version. Record rt2860C(0x28600100) or rt2860D (0x28600101).. */
+
+	/* --------------------------- */
+	/* E2PROM */
+	/* --------------------------- */
+	ULONG EepromVersion;	/* byte 0: version, byte 1: revision, byte 2~3: unused */
+	ULONG FirmwareVersion;	/* byte 0: Minor version, byte 1: Major version, otherwise unused. */
+	USHORT EEPROMDefaultValue[NUM_EEPROM_BBP_PARMS];
+	UCHAR EEPROMAddressNum;	/* 93c46=6  93c66=8 */
+	BOOLEAN EepromAccess;
+	UCHAR EFuseTag;
+
+	/* --------------------------- */
+	/* BBP Control */
+	/* --------------------------- */
+/*#if defined(RTMP_RBUS_SUPPORT) || defined(RT3593) */
+/*	UCHAR                   BbpWriteLatch[256];     // record last BBP register value written via BBP_IO_WRITE/BBP_IO_WRITE_VY_REG_ID */
+/*#else */
+/*	UCHAR                   BbpWriteLatch[140];     // record last BBP register value written via BBP_IO_WRITE/BBP_IO_WRITE_VY_REG_ID */
+/*#endif // defined(RTMP_RBUS_SUPPORT) || defined(RT3593) */
+	UCHAR BbpWriteLatch[MAX_BBP_ID + 1];	/* record last BBP register value written via BBP_IO_WRITE/BBP_IO_WRITE_VY_REG_ID */
+	CHAR BbpRssiToDbmDelta;	/* change from UCHAR to CHAR for high power */
+	BBP_R66_TUNING BbpTuning;
+
+	/* ---------------------------- */
+	/* RFIC control */
+	/* ---------------------------- */
+	UCHAR RfIcType;		/* RFIC_xxx */
+	ULONG RfFreqOffset;	/* Frequency offset for channel switching */
+
+
+	RTMP_RF_REGS LatchRfRegs;	/* latch th latest RF programming value since RF IC doesn't support READ */
+
+	EEPROM_ANTENNA_STRUC Antenna;	/* Since ANtenna definition is different for a & g. We need to save it for future reference. */
+	EEPROM_NIC_CONFIG2_STRUC NicConfig2;
+
+	/* This soft Rx Antenna Diversity mechanism is used only when user set */
+	/* RX Antenna = DIVERSITY ON */
+	SOFT_RX_ANT_DIVERSITY RxAnt;
+
+	CHANNEL_TX_POWER TxPower[MAX_NUM_OF_CHANNELS];	/* Store Tx power value for all channels. */
+	CHANNEL_TX_POWER ChannelList[MAX_NUM_OF_CHANNELS];	/* list all supported channels for site survey */
+
+	UCHAR ChannelListNum;	/* number of channel in ChannelList[] */
+	UCHAR Bbp94;
+	BOOLEAN BbpForCCK;
+	ULONG Tx20MPwrCfgABand[MAX_TXPOWER_ARRAY_SIZE];
+	ULONG Tx20MPwrCfgGBand[MAX_TXPOWER_ARRAY_SIZE];
+	ULONG Tx40MPwrCfgABand[MAX_TXPOWER_ARRAY_SIZE];
+	ULONG Tx40MPwrCfgGBand[MAX_TXPOWER_ARRAY_SIZE];
+
+
+#ifdef VCORECAL_SUPPORT
+	UCHAR LatchTssi;
+	UCHAR RefreshTssi;
+#endif /* VCORECAL_SUPPORT */
+
+	BOOLEAN bAutoTxAgcA;	/* Enable driver auto Tx Agc control */
+	UCHAR TssiRefA;		/* Store Tssi reference value as 25 temperature. */
+	UCHAR TssiPlusBoundaryA[5];	/* Tssi boundary for increase Tx power to compensate. */
+	UCHAR TssiMinusBoundaryA[5];	/* Tssi boundary for decrease Tx power to compensate. */
+	UCHAR TxAgcStepA;	/* Store Tx TSSI delta increment / decrement value */
+	CHAR TxAgcCompensateA;	/* Store the compensation (TxAgcStep * (idx-1)) */
+
+	BOOLEAN bAutoTxAgcG;	/* Enable driver auto Tx Agc control */
+	UCHAR TssiRefG;		/* Store Tssi reference value as 25 temperature. */
+	UCHAR TssiPlusBoundaryG[5];	/* Tssi boundary for increase Tx power to compensate. */
+	UCHAR TssiMinusBoundaryG[5];	/* Tssi boundary for decrease Tx power to compensate. */
+	UCHAR TxAgcStepG;	/* Store Tx TSSI delta increment / decrement value */
+	CHAR TxAgcCompensateG;	/* Store the compensation (TxAgcStep * (idx-1)) */
+#ifdef RTMP_INTERNAL_TX_ALC
+	TX_POWER_CONTROL TxPowerCtrl;	/* The Tx power control using the internal ALC */
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+#ifdef RTMP_FREQ_CALIBRATION_SUPPORT
+	FREQUENCY_CALIBRATION_CONTROL FreqCalibrationCtrl;	/* The frequency calibration control */
+#endif /* RTMP_FREQ_CALIBRATION_SUPPORT */
+
+	signed char BGRssiOffset0;	/* Store B/G RSSI#0 Offset value on EEPROM 0x46h */
+	signed char BGRssiOffset1;	/* Store B/G RSSI#1 Offset value */
+	signed char BGRssiOffset2;	/* Store B/G RSSI#2 Offset value */
+
+	signed char ARssiOffset0;	/* Store A RSSI#0 Offset value on EEPROM 0x4Ah */
+	signed char ARssiOffset1;	/* Store A RSSI#1 Offset value */
+	signed char ARssiOffset2;	/* Store A RSSI#2 Offset value */
+
+	CHAR BLNAGain;		/* Store B/G external LNA#0 value on EEPROM 0x44h */
+	CHAR ALNAGain0;		/* Store A external LNA#0 value for ch36~64 */
+	CHAR ALNAGain1;		/* Store A external LNA#1 value for ch100~128 */
+	CHAR ALNAGain2;		/* Store A external LNA#2 value for ch132~165 */
+#ifdef RT30xx
+	/* for 3572 */
+	UCHAR Bbp25;
+	UCHAR Bbp26;
+
+	UCHAR TxMixerGain24G;	/* Tx mixer gain value from EEPROM to improve Tx EVM / Tx DAC, 2.4G */
+	UCHAR TxMixerGain5G;
+#endif /* RT30xx */
+
+#ifdef LED_CONTROL_SUPPORT
+	/* LED control */
+	LED_CONTROL LedCntl;
+#endif /* LED_CONTROL_SUPPORT */
+
+	/* ---------------------------- */
+	/* MAC control */
+	/* ---------------------------- */
+#ifdef SPECIFIC_BCN_BUF_SUPPORT
+	UCHAR ShrMSel;
+	NDIS_SPIN_LOCK ShrMemLock;
+#endif /* SPECIFIC_BCN_BUF_SUPPORT */
+
+/*****************************************************************************************/
+/*      802.11 related parameters                                                        */
+/*****************************************************************************************/
+	/* outgoing BEACON frame buffer and corresponding TXD */
+	TXWI_STRUC BeaconTxWI;
+	PUCHAR BeaconBuf;
+	USHORT BeaconOffset[HW_BEACON_MAX_NUM];
+
+	/* pre-build PS-POLL and NULL frame upon link up. for efficiency purpose. */
+#ifdef CONFIG_STA_SUPPORT
+	PSPOLL_FRAME PsPollFrame;
+#endif /* CONFIG_STA_SUPPORT */
+	HEADER_802_11 NullFrame;
+
+#ifdef RTMP_MAC_USB
+	TX_CONTEXT NullContext;
+	TX_CONTEXT PsPollContext;
+#endif /* RTMP_MAC_USB */
+
+
+/*=========AP=========== */
+
+/*=======STA=========== */
+#ifdef CONFIG_STA_SUPPORT
+	/* ----------------------------------------------- */
+	/* STA specific configuration & operation status */
+	/* used only when pAd->OpMode == OPMODE_STA */
+	/* ----------------------------------------------- */
+	STA_ADMIN_CONFIG StaCfg;	/* user desired settings */
+	STA_ACTIVE_CONFIG StaActive;	/* valid only when ADHOC_ON(pAd) || INFRA_ON(pAd) */
+	CHAR nickname[IW_ESSID_MAX_SIZE + 1];	/* nickname, only used in the iwconfig i/f */
+	NDIS_MEDIA_STATE PreMediaState;
+#endif /* CONFIG_STA_SUPPORT */
+
+/*=======Common=========== */
+	/* OP mode: either AP or STA */
+	UCHAR OpMode;		/* OPMODE_STA, OPMODE_AP */
+
+	NDIS_MEDIA_STATE IndicateMediaState;	/* Base on Indication state, default is NdisMediaStateDisConnected */
+
+#ifdef PROFILE_STORE
+	RTMP_OS_TASK 	WriteDatTask;
+	BOOLEAN			bWriteDat;
+#endif /* PROFILE_STORE */
+
+
+	/* MAT related parameters */
+
+
+	/* configuration: read from Registry & E2PROM */
+	BOOLEAN bLocalAdminMAC;	/* Use user changed MAC */
+	UCHAR PermanentAddress[MAC_ADDR_LEN];	/* Factory default MAC address */
+	UCHAR CurrentAddress[MAC_ADDR_LEN];	/* User changed MAC address */
+
+	/* ------------------------------------------------------ */
+	/* common configuration to both OPMODE_STA and OPMODE_AP */
+	/* ------------------------------------------------------ */
+	COMMON_CONFIG CommonCfg;
+	MLME_STRUCT Mlme;
+
+	/* AP needs those vaiables for site survey feature. */
+	MLME_AUX MlmeAux;	/* temporary settings used during MLME state machine */
+#if defined(AP_SCAN_SUPPORT) || defined(CONFIG_STA_SUPPORT)
+	BSS_TABLE ScanTab;	/* store the latest SCAN result */
+#endif /* defined(AP_SCAN_SUPPORT) || defined(CONFIG_STA_SUPPORT) */
+
+	/*About MacTab, the sta driver will use #0 and #1 for multicast and AP. */
+	MAC_TABLE MacTab;	/* ASIC on-chip WCID entry table.  At TX, ASIC always use key according to this on-chip table. */
+	NDIS_SPIN_LOCK MacTabLock;
+
+#ifdef DOT11_N_SUPPORT
+	BA_TABLE BATable;
+	NDIS_SPIN_LOCK BATabLock;
+	RALINK_TIMER_STRUCT RECBATimer;
+#endif /* DOT11_N_SUPPORT */
+
+	/* encryption/decryption KEY tables */
+	CIPHER_KEY SharedKey[HW_BEACON_MAX_NUM + MAX_P2P_NUM][4];	/* STA always use SharedKey[BSS0][0..3] */
+
+	/* RX re-assembly buffer for fragmentation */
+	FRAGMENT_FRAME FragFrame;	/* Frame storage for fragment frame */
+
+	/* various Counters */
+	COUNTER_802_3 Counters8023;	/* 802.3 counters */
+	COUNTER_802_11 WlanCounters;	/* 802.11 MIB counters */
+	COUNTER_RALINK RalinkCounters;	/* Ralink propriety counters */
+	COUNTER_DRS DrsCounters;	/* counters for Dynamic TX Rate Switching */
+	PRIVATE_STRUC PrivateInfo;	/* Private information & counters */
+
+	/* flags, see fRTMP_ADAPTER_xxx flags */
+	ULONG Flags;		/* Represent current device status */
+	ULONG PSFlags;		/* Power Save operation flag. */
+	ULONG MoreFlags;	/* Represent specific requirement */
+
+	/* current TX sequence # */
+	USHORT Sequence;
+
+	/* Control disconnect / connect event generation */
+	/*+++Didn't used anymore */
+	ULONG LinkDownTime;
+	/*--- */
+	ULONG LastRxRate;
+	ULONG LastTxRate;
+	/*+++Used only for Station */
+	BOOLEAN bConfigChanged;	/* Config Change flag for the same SSID setting */
+	/*--- */
+
+	ULONG ExtraInfo;	/* Extra information for displaying status */
+	ULONG SystemErrorBitmap;	/* b0: E2PROM version error */
+
+	/*+++Didn't used anymore */
+	ULONG MacIcVersion;	/* MAC/BBP serial interface issue solved after ver.D */
+	/*--- */
+
+#ifdef SYSTEM_LOG_SUPPORT
+	/* --------------------------- */
+	/* System event log */
+	/* --------------------------- */
+	RT_802_11_EVENT_TABLE EventTab;
+#endif /* SYSTEM_LOG_SUPPORT */
+
+	BOOLEAN HTCEnable;
+
+	/*****************************************************************************************/
+	/*      Statistic related parameters                                                     */
+	/*****************************************************************************************/
+#ifdef RTMP_MAC_USB
+	ULONG BulkOutDataOneSecCount;
+	ULONG BulkInDataOneSecCount;
+	ULONG BulkLastOneSecCount;	/* BulkOutDataOneSecCount + BulkInDataOneSecCount */
+	ULONG watchDogRxCnt;
+	ULONG watchDogRxOverFlowCnt;
+	ULONG watchDogTxPendingCnt[NUM_OF_TX_RING];
+#endif /* RTMP_MAC_USB */
+
+	BOOLEAN bUpdateBcnCntDone;
+
+	ULONG macwd;
+	/* ---------------------------- */
+	/* DEBUG paramerts */
+	/* ---------------------------- */
+	/*ULONG         DebugSetting[4]; */
+	BOOLEAN bPromiscuous;
+
+	/* ---------------------------- */
+	/* rt2860c emulation-use Parameters */
+	/* ---------------------------- */
+	/*ULONG         rtsaccu[30]; */
+	/*ULONG         ctsaccu[30]; */
+	/*ULONG         cfendaccu[30]; */
+	/*ULONG         bacontent[16]; */
+	/*ULONG         rxint[RX_RING_SIZE+1]; */
+	/*UCHAR         rcvba[60]; */
+	BOOLEAN bLinkAdapt;
+	BOOLEAN bForcePrintTX;
+	BOOLEAN bForcePrintRX;
+	/*BOOLEAN               bDisablescanning;               //defined in RT2870 USB */
+	BOOLEAN bStaFifoTest;
+	BOOLEAN bProtectionTest;
+	BOOLEAN bHCCATest;
+	BOOLEAN bGenOneHCCA;
+	BOOLEAN bBroadComHT;
+	/*+++Following add from RT2870 USB. */
+	ULONG BulkOutReq;
+	ULONG BulkOutComplete;
+	ULONG BulkOutCompleteOther;
+	ULONG BulkOutCompleteCancel;	/* seems not use now? */
+	ULONG BulkInReq;
+	ULONG BulkInComplete;
+	ULONG BulkInCompleteFail;
+	/*--- */
+
+	struct wificonf WIFItestbed;
+
+	UCHAR		TssiGain;
+#ifdef RALINK_ATE
+	ATE_INFO ate;
+#ifdef RTMP_MAC_USB
+	BOOLEAN ContinBulkOut;	/*ATE bulk out control */
+	BOOLEAN ContinBulkIn;	/*ATE bulk in control */
+	RTMP_OS_ATOMIC BulkOutRemained;
+	RTMP_OS_ATOMIC BulkInRemained;
+#endif /* RTMP_MAC_USB */
+#endif /* RALINK_ATE */
+
+#ifdef DOT11_N_SUPPORT
+	struct reordering_mpdu_pool mpdu_blk_pool;
+#endif /* DOT11_N_SUPPORT */
+
+	/* statistics count */
+
+	VOID *iw_stats;
+	VOID *stats;
+
+#ifdef BLOCK_NET_IF
+	BLOCK_QUEUE_ENTRY blockQueueTab[NUM_OF_TX_RING];
+#endif /* BLOCK_NET_IF */
+
+
+
+#ifdef MULTIPLE_CARD_SUPPORT
+	INT32 MC_RowID;
+	STRING MC_FileName[256];
+#endif /* MULTIPLE_CARD_SUPPORT */
+
+	ULONG TbttTickCount;	/* beacon timestamp work-around */
+#ifdef PCI_MSI_SUPPORT
+	BOOLEAN HaveMsi;
+#endif /* PCI_MSI_SUPPORT */
+
+
+	/* for detect_wmm_traffic() BE TXOP use */
+	ULONG OneSecondnonBEpackets;	/* record non BE packets per second */
+	UCHAR is_on;
+
+	/* for detect_wmm_traffic() BE/BK TXOP use */
+#define TIME_BASE			(1000000/OS_HZ)
+#define TIME_ONE_SECOND		(1000000/TIME_BASE)
+	UCHAR flg_be_adjust;
+	ULONG be_adjust_last_time;
+
+#ifdef NINTENDO_AP
+	NINDO_CTRL_BLOCK nindo_ctrl_block;
+#endif /* NINTENDO_AP */
+
+
+#ifdef IKANOS_VX_1X0
+	struct IKANOS_TX_INFO IkanosTxInfo;
+	struct IKANOS_TX_INFO IkanosRxInfo[HW_BEACON_MAX_NUM + MAX_WDS_ENTRY +
+					   MAX_APCLI_NUM + MAX_MESH_NUM];
+#endif /* IKANOS_VX_1X0 */
+
+
+#ifdef DBG_DIAGNOSE
+	RtmpDiagStruct DiagStruct;
+#endif /* DBG_DIAGNOSE */
+
+
+	UINT8 FlgCtsEnabled;
+	UINT8 PM_FlgSuspend;
+
+#ifdef RT30xx
+#ifdef RTMP_EFUSE_SUPPORT
+	BOOLEAN bUseEfuse;
+	BOOLEAN bEEPROMFile;
+	BOOLEAN bFroceEEPROMBuffer;
+	UCHAR EEPROMImage[1024];
+#endif /* RTMP_EFUSE_SUPPORT */
+#endif /* RT30xx */
+
+
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+
+	EXT_CAP_INFO_ELEMENT ExtCapInfo;
+
+
+#ifdef VENDOR_FEATURE1_SUPPORT
+	UCHAR FifoUpdateDone, FifoUpdateRx;
+#endif /* VENDOR_FEATURE1_SUPPORT */
+
+	UINT8 RFICType;
+
+#ifdef LINUX
+#ifdef RT_CFG80211_SUPPORT
+	VOID *pCfgDev;
+	VOID *pCfg80211_CB;
+
+	BOOLEAN FlgCfg80211Scanning;
+	BOOLEAN FlgCfg80211Connecting;
+	UCHAR Cfg80211_Alpha2[2];
+#endif /* RT_CFG80211_SUPPORT */
+#endif /* LINUX */
+
+#ifdef OS_ABL_SUPPORT
+#endif /* OS_ABL_SUPPORT */
+
+	UINT32 ContinueMemAllocFailCount;
+
+	struct {
+		INT IeLen;
+		UCHAR *pIe;
+	} ProbeRespIE[MAX_LEN_OF_BSS_TABLE];
+
+	/* purpose: We free all kernel resources when module is removed */
+	LIST_HEADER RscTimerMemList;	/* resource timers memory */
+	LIST_HEADER RscTaskMemList;	/* resource tasks memory */
+	LIST_HEADER RscLockMemList;	/* resource locks memory */
+	LIST_HEADER RscTaskletMemList;	/* resource tasklets memory */
+	LIST_HEADER RscSemMemList;	/* resource semaphore memory */
+	LIST_HEADER RscAtomicMemList;	/* resource atomic memory */
+
+	/* purpose: Cancel all timers when module is removed */
+	LIST_HEADER RscTimerCreateList;	/* timers list */
+
+#ifdef OS_ABL_SUPPORT
+#endif /* OS_ABL_SUPPORT */
+
+
+
+};
+
+
+#ifdef RTMP_INTERNAL_TX_ALC
+/* The Tx power tuning entry */
+typedef struct _TX_POWER_TUNING_ENTRY_STRUCT {
+	CHAR RF_R12_Value;	/* RF R12[4:0]: Tx0 ALC */
+	CHAR MAC_PowerDelta;	/* Tx power control over MAC 0x1314~0x1324 */
+} TX_POWER_TUNING_ENTRY_STRUCT, *PTX_POWER_TUNING_ENTRY_STRUCT;
+
+/* The offset of the Tx power tuning entry (zero-based array) */
+#define TX_POWER_TUNING_ENTRY_OFFSET		30
+
+/* The lower-bound of the Tx power tuning entry */
+#define LOWERBOUND_TX_POWER_TUNING_ENTRY	-30
+
+/* The upper-bound of the Tx power tuning entry */
+#define UPPERBOUND_TX_POWER_TUNING_ENTRY(__pAd)		((__pAd)->chipCap.TxAlcTxPowerUpperBound)
+
+
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+
+/* The offset of the Tx power tuning entry (zero-based array) for 5390 */
+
+#define TX_POWER_TUNING_ENTRY_OFFSET_OVER_5390		30
+
+
+/* The lower-bound of the Tx power tuning entry for 5390 */
+
+#define LOWERBOUND_TX_POWER_TUNING_ENTRY_OVER_5390	-30
+
+
+/* The upper-bound of the Tx power tuning entry for 5390 */
+
+#define UPPERBOUND_TX_POWER_TUNING_ENTRY_OVER_5390	69 // zero-based array
+
+/* Temperature compensation lookup table */
+
+#define TEMPERATURE_COMPENSATION_LOOKUP_TABLE_OFFSET 7
+
+/* The lower/upper power delta index for the TSSI rate table */
+
+#define LOWER_POWER_DELTA_INDEX	0
+#define UPPER_POWER_DELTA_INDEX		24
+
+/* The offset of the TSSI rate table */
+
+#define TSSI_RATIO_TABLE_OFFSET	12
+
+
+/* Get the power delta bound */
+
+#define GET_TSSI_RATE_TABLE_INDEX(x) (((x) > UPPER_POWER_DELTA_INDEX) ? (UPPER_POWER_DELTA_INDEX) : (((x) < LOWER_POWER_DELTA_INDEX) ? (LOWER_POWER_DELTA_INDEX) : ((x))))
+
+/* 802.11b CCK TSSI information */
+
+typedef union _CCK_TSSI_INFO
+{
+#ifdef RT_BIG_ENDIAN
+	struct
+	{
+		UCHAR	Reserved:1;
+		UCHAR	ShortPreamble:1;
+		UCHAR	Rate:2;
+		UCHAR	Tx40MSel:2;
+		UCHAR	TxType:2;
+	} field;
+#else
+	struct
+	{
+		UCHAR	TxType:2;
+		UCHAR	Tx40MSel:2;
+		UCHAR	Rate:2;
+		UCHAR	ShortPreamble:1;
+		UCHAR	Reserved:1;
+	} field;
+#endif /* RT_BIG_ENDIAN */
+
+	UCHAR	value;
+} CCK_TSSI_INFO, *PCCK_TSSI_INFO;
+
+
+/* 802.11a/g OFDM TSSI information */
+
+typedef union _OFDM_TSSI_INFO
+{
+#ifdef RT_BIG_ENDIAN
+	struct
+	{
+		UCHAR	Rate:4;
+		UCHAR	Tx40MSel:2;
+		UCHAR	TxType:2;
+	} field;
+#else
+	struct
+	{
+		UCHAR	TxType:2;
+		UCHAR	Tx40MSel:2;
+		UCHAR	Rate:4;
+	} field;
+#endif /* RT_BIG_ENDIAN */
+
+	UCHAR	value;
+} OFDM_TSSI_INFO, *POFDM_TSSI_INFO;
+
+
+/* 802.11n HT TSSI information */
+
+typedef union _HT_TSSI_INFO
+{
+	union
+	{
+#ifdef RT_BIG_ENDIAN
+		struct
+		{
+			UCHAR	SGI:1;
+			UCHAR	STBC:2;
+			UCHAR	Aggregation:1;
+			UCHAR	Tx40MSel:2;
+			UCHAR	TxType:2;
+		} field;
+#else	
+		struct
+		{
+			UCHAR	TxType:2;
+			UCHAR	Tx40MSel:2;
+			UCHAR	Aggregation:1;
+			UCHAR	STBC:2;
+			UCHAR	SGI:1;
+		} field;
+#endif /* RT_BIG_ENDIAN */
+
+		UCHAR	value;
+	} PartA;
+
+	union
+	{
+#ifdef RT_BIG_ENDIAN
+		struct
+		{
+			UCHAR	BW:1;
+			UCHAR	MCS:7;
+		} field;
+#else	
+		struct
+		{
+			UCHAR	MCS:7;
+			UCHAR	BW:1;
+		} field;
+#endif /* RT_BIG_ENDIAN */
+
+		UCHAR	value;
+	} PartB;
+} HT_TSSI_INFO, *PHT_TSSI_INFO;
+
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+#endif /* RTMP_INTERNAL_TX_ALC */
+
+#ifdef TONE_RADAR_DETECT_SUPPORT
+#define DELAYINTMASK		0x0013fffb
+#define INTMASK				0x0013fffb
+#define IndMask				0x0013fffc
+#define RadarInt			0x00100000
+#else
+#define DELAYINTMASK		0x0003fffb
+#define INTMASK				0x0003fffb
+#define IndMask				0x0003fffc
+#endif /* TONE_RADAR_DETECT_SUPPORT */
+
+#define RxINT				0x00000005	/* Delayed Rx or indivi rx */
+#define TxDataInt			0x000000fa	/* Delayed Tx or indivi tx */
+#define TxMgmtInt			0x00000102	/* Delayed Tx or indivi tx */
+#define TxCoherent			0x00020000	/* tx coherent */
+#define RxCoherent			0x00010000	/* rx coherent */
+#define TxRxCoherent		0x00000400	/* tx rx coherent */
+#define McuCommand			0x00000200	/* mcu */
+#define PreTBTTInt			0x00001000	/* Pre-TBTT interrupt */
+#define TBTTInt				0x00000800		/* TBTT interrupt */
+#define GPTimeOutInt			0x00008000		/* GPtimeout interrupt */
+#define AutoWakeupInt		0x00004000		/* AutoWakeupInt interrupt */
+#define FifoStaFullInt			0x00002000	/*  fifo statistics full interrupt */
+
+
+/***************************************************************************
+  *	Rx Path software control block related data structures
+  **************************************************************************/
+typedef struct _RX_BLK_
+{
+/*	RXD_STRUC		RxD; // sample */
+	RT28XX_RXD_STRUC	RxD;
+	PRXWI_STRUC			pRxWI;
+	PHEADER_802_11		pHeader;
+	PNDIS_PACKET		pRxPacket;
+	UCHAR				*pData;
+	USHORT				DataSize;
+	USHORT				Flags;
+	UCHAR				UserPriority;	/* for calculate TKIP MIC using */
+	UCHAR				OpMode;	/* 0:OPMODE_STA 1:OPMODE_AP */
+} RX_BLK;
+
+
+#define RX_BLK_SET_FLAG(_pRxBlk, _flag)		(_pRxBlk->Flags |= _flag)
+#define RX_BLK_TEST_FLAG(_pRxBlk, _flag)	(_pRxBlk->Flags & _flag)
+#define RX_BLK_CLEAR_FLAG(_pRxBlk, _flag)	(_pRxBlk->Flags &= ~(_flag))
+
+
+#define fRX_WDS			0x0001
+#define fRX_AMSDU		0x0002
+#define fRX_ARALINK		0x0004
+#define fRX_HTC			0x0008
+#define fRX_PAD			0x0010
+#define fRX_AMPDU		0x0020
+#define fRX_QOS			0x0040
+#define fRX_INFRA		0x0080
+#define fRX_EAP			0x0100
+#define fRX_MESH		0x0200
+#define fRX_APCLI		0x0400
+#define fRX_DLS			0x0800
+#define fRX_WPI			0x1000
+#define fRX_P2PGO		0x2000
+#define fRX_P2PCLI		0x4000
+
+#define LENGTH_AMSDU_SUBFRAMEHEAD	14
+#define LENGTH_ARALINK_SUBFRAMEHEAD	14
+#define LENGTH_ARALINK_HEADER_FIELD	 2
+
+
+/***************************************************************************
+  *	Tx Path software control block related data structures
+  **************************************************************************/
+#define TX_UNKOWN_FRAME		0x00
+#define TX_MCAST_FRAME			0x01
+#define TX_LEGACY_FRAME		0x02
+#define TX_AMPDU_FRAME		0x04
+#define TX_AMSDU_FRAME		0x08
+#define TX_RALINK_FRAME		0x10
+#define TX_FRAG_FRAME			0x20
+
+
+/*	Currently the sizeof(TX_BLK) is 148 bytes. */
+typedef struct _TX_BLK_
+{
+	UCHAR				QueIdx;
+	UCHAR				TxFrameType;				/* Indicate the Transmission type of the all frames in one batch */
+	UCHAR				TotalFrameNum;				/* Total frame number want to send-out in one batch */
+	USHORT				TotalFragNum;				/* Total frame fragments required in one batch */
+	USHORT				TotalFrameLen;				/* Total length of all frames want to send-out in one batch */
+
+	QUEUE_HEADER		TxPacketList;
+	MAC_TABLE_ENTRY		*pMacEntry;					/* NULL: packet with 802.11 RA field is multicast/broadcast address */
+	HTTRANSMIT_SETTING	*pTransmit;
+	
+	/* Following structure used for the characteristics of a specific packet. */
+	PNDIS_PACKET		pPacket;
+	PUCHAR				pSrcBufHeader;				/* Reference to the head of sk_buff->data */
+	PUCHAR				pSrcBufData;				/* Reference to the sk_buff->data, will changed depends on hanlding progresss */
+	UINT				SrcBufLen;					/* Length of packet payload which not including Layer 2 header */
+
+	PUCHAR				pExtraLlcSnapEncap;			/* NULL means no extra LLC/SNAP is required */
+#ifndef VENDOR_FEATURE1_SUPPORT
+	/*
+		Note: Can not insert any other new parameters
+		between pExtraLlcSnapEncap & HeaderBuf; Or
+		the start address of HeaderBuf will not be aligned by 4.
+
+		But we can not change HeaderBuf[128] to HeaderBuf[32] because
+		many codes use HeaderBuf[index].
+	*/
+	UCHAR				HeaderBuf[128];				/* TempBuffer for TX_INFO + TX_WI + 802.11 Header + padding + AMSDU SubHeader + LLC/SNAP */
+#else
+	UINT32				HeaderBuffer[32];			/* total 128B, use UINT32 to avoid alignment problem */
+	UCHAR				*HeaderBuf;
+#endif /* VENDOR_FEATURE1_SUPPORT */
+	UCHAR				MpduHeaderLen;				/* 802.11 header length NOT including the padding */
+	UCHAR				HdrPadLen;					/* recording Header Padding Length; */
+	UCHAR				apidx;						/* The interface associated to this packet */
+	UCHAR				Wcid;						/* The MAC entry associated to this packet */
+	UCHAR				UserPriority;				/* priority class of packet */
+	UCHAR				FrameGap;					/* what kind of IFS this packet use */
+	UCHAR				MpduReqNum;					/* number of fragments of this frame */
+	UCHAR				TxRate;						/* TODO: Obsoleted? Should change to MCS? */
+	UCHAR				CipherAlg;					/* cipher alogrithm */
+	PCIPHER_KEY			pKey;
+	UCHAR				KeyIdx;						/* Indicate the transmit key index */
+
+
+	UINT32				Flags;						/*See following definitions for detail. */
+
+	/*YOU SHOULD NOT TOUCH IT! Following parameters are used for hardware-depended layer. */
+	ULONG				Priv;						/* Hardware specific value saved in here. */
+
+
+	UCHAR				OpMode;
+} TX_BLK, *PTX_BLK;
+
+
+#define fTX_bRtsRequired			0x0001	/* Indicate if need send RTS frame for protection. Not used in RT2860/RT2870. */
+#define fTX_bAckRequired			0x0002	/* the packet need ack response */
+#define fTX_bPiggyBack			0x0004	/* Legacy device use Piggback or not */
+#define fTX_bHTRate				0x0008	/* allow to use HT rate */
+#define fTX_bForceNonQoS		0x0010	/* force to transmit frame without WMM-QoS in HT mode */
+#define fTX_bAllowFrag			0x0020	/* allow to fragment the packet, A-MPDU, A-MSDU, A-Ralink is not allowed to fragment */
+#define fTX_bMoreData			0x0040	/* there are more data packets in PowerSave Queue */
+#define fTX_bWMM				0x0080	/* QOS Data */
+#define fTX_bClearEAPFrame		0x0100
+
+#define	fTX_bSwEncrypt			0x0400	/* this packet need to be encrypted by software before TX */
+
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+
+
+
+#ifdef CLIENT_WDS
+#define fTX_bClientWDSFrame		0x10000
+#endif /* CLIENT_WDS */
+
+
+#define TX_BLK_SET_FLAG(_pTxBlk, _flag)		(_pTxBlk->Flags |= _flag)
+#define TX_BLK_TEST_FLAG(_pTxBlk, _flag)	(((_pTxBlk->Flags & _flag) == _flag) ? 1 : 0)
+#define TX_BLK_CLEAR_FLAG(_pTxBlk, _flag)	(_pTxBlk->Flags &= ~(_flag))
+	
+
+
+
+#ifdef RT_BIG_ENDIAN
+/***************************************************************************
+  *	Endian conversion related functions
+  **************************************************************************/
+/*
+	========================================================================
+
+	Routine Description:
+		Endian conversion of Tx/Rx descriptor .
+
+	Arguments:
+		pAd 	Pointer to our adapter
+		pData			Pointer to Tx/Rx descriptor
+		DescriptorType	Direction of the frame
+
+	Return Value:
+		None
+
+	Note:
+		Call this function when read or update descriptor
+	========================================================================
+*/
+static inline VOID	RTMPWIEndianChange(
+	IN	PUCHAR			pData,
+	IN	ULONG			DescriptorType)
+{
+	int size;
+	int i;
+	
+	size = ((DescriptorType == TYPE_TXWI) ? TXWI_SIZE : RXWI_SIZE);
+	
+	if(DescriptorType == TYPE_TXWI)
+	{
+		*((UINT32 *)(pData)) = SWAP32(*((UINT32 *)(pData)));		/* Byte 0~3 */
+		*((UINT32 *)(pData + 4)) = SWAP32(*((UINT32 *)(pData+4)));	/* Byte 4~7 */
+	} 
+	else
+	{
+		for(i=0; i < size/4 ; i++)
+			*(((UINT32 *)pData) +i) = SWAP32(*(((UINT32 *)pData)+i));
+	}
+}
+
+
+
+
+/*
+	========================================================================
+
+	Routine Description:
+		Endian conversion of Tx/Rx descriptor .
+
+	Arguments:
+		pAd 	Pointer to our adapter
+		pData			Pointer to Tx/Rx descriptor
+		DescriptorType	Direction of the frame
+
+	Return Value:
+		None
+
+	Note:
+		Call this function when read or update descriptor
+	========================================================================
+*/
+
+#ifdef RTMP_MAC_USB
+static inline VOID	RTMPDescriptorEndianChange(
+	IN	PUCHAR			pData,
+	IN	ULONG			DescriptorType)
+{	
+	*((UINT32 *)(pData)) = SWAP32(*((UINT32 *)(pData)));
+}
+#endif /* RTMP_MAC_USB */
+/*
+	========================================================================
+
+	Routine Description:
+		Endian conversion of all kinds of 802.11 frames .
+
+	Arguments:
+		pAd 	Pointer to our adapter
+		pData			Pointer to the 802.11 frame structure
+		Dir 			Direction of the frame
+		FromRxDoneInt	Caller is from RxDone interrupt
+
+	Return Value:
+		None
+
+	Note:
+		Call this function when read or update buffer data
+	========================================================================
+*/
+static inline VOID	RTMPFrameEndianChange(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PUCHAR			pData, 
+	IN	ULONG			Dir,
+	IN	BOOLEAN 		FromRxDoneInt)
+{
+	PHEADER_802_11 pFrame;
+	PUCHAR	pMacHdr;
+
+	/* swab 16 bit fields - Frame Control field */
+	if(Dir == DIR_READ)
+	{
+		*(USHORT *)pData = SWAP16(*(USHORT *)pData);
+	}
+
+	pFrame = (PHEADER_802_11) pData;
+	pMacHdr = (PUCHAR) pFrame;
+
+	/* swab 16 bit fields - Duration/ID field */
+	*(USHORT *)(pMacHdr + 2) = SWAP16(*(USHORT *)(pMacHdr + 2));
+
+	if (pFrame->FC.Type != BTYPE_CNTL)
+	{
+		/* swab 16 bit fields - Sequence Control field */
+		*(USHORT *)(pMacHdr + 22) = SWAP16(*(USHORT *)(pMacHdr + 22));
+	}
+
+	if(pFrame->FC.Type == BTYPE_MGMT)
+	{
+		switch(pFrame->FC.SubType)
+		{
+			case SUBTYPE_ASSOC_REQ:
+			case SUBTYPE_REASSOC_REQ:
+				/* swab 16 bit fields - CapabilityInfo field */
+				pMacHdr += sizeof(HEADER_802_11);
+				*(USHORT *)pMacHdr = SWAP16(*(USHORT *)pMacHdr);
+
+				/* swab 16 bit fields - Listen Interval field */
+				pMacHdr += 2;
+				*(USHORT *)pMacHdr = SWAP16(*(USHORT *)pMacHdr);
+				break;
+
+			case SUBTYPE_ASSOC_RSP:
+			case SUBTYPE_REASSOC_RSP:
+				/* swab 16 bit fields - CapabilityInfo field */
+				pMacHdr += sizeof(HEADER_802_11);
+				*(USHORT *)pMacHdr = SWAP16(*(USHORT *)pMacHdr);
+
+				/* swab 16 bit fields - Status Code field */
+				pMacHdr += 2;
+				*(USHORT *)pMacHdr = SWAP16(*(USHORT *)pMacHdr);
+
+				/* swab 16 bit fields - AID field */
+				pMacHdr += 2;
+				*(USHORT *)pMacHdr = SWAP16(*(USHORT *)pMacHdr);
+				break;
+
+			case SUBTYPE_AUTH:
+				 /* When the WEP bit is on, don't do the conversion here.
+					This is only shared WEP can hit this condition. 
+					For AP, it shall do conversion after decryption. 
+					For STA, it shall do conversion before encryption. */
+				if (pFrame->FC.Wep == 1)
+					break;
+				else
+				{
+					/* swab 16 bit fields - Auth Alg No. field */
+					pMacHdr += sizeof(HEADER_802_11);
+					*(USHORT *)pMacHdr = SWAP16(*(USHORT *)pMacHdr);
+
+					/* swab 16 bit fields - Auth Seq No. field */
+					pMacHdr += 2;
+					*(USHORT *)pMacHdr = SWAP16(*(USHORT *)pMacHdr);
+
+					/* swab 16 bit fields - Status Code field */
+					pMacHdr += 2;
+					*(USHORT *)pMacHdr = SWAP16(*(USHORT *)pMacHdr);
+				}
+				break;
+
+			case SUBTYPE_BEACON:
+			case SUBTYPE_PROBE_RSP:
+				/* swab 16 bit fields - BeaconInterval field */
+				pMacHdr += (sizeof(HEADER_802_11) + TIMESTAMP_LEN);
+				*(USHORT *)pMacHdr = SWAP16(*(USHORT *)pMacHdr);
+
+				/* swab 16 bit fields - CapabilityInfo field */
+				pMacHdr += sizeof(USHORT);
+				*(USHORT *)pMacHdr = SWAP16(*(USHORT *)pMacHdr);
+				break;
+
+			case SUBTYPE_DEAUTH:
+			case SUBTYPE_DISASSOC:
+				/* If the PMF is negotiated, those frames shall be encrypted */
+				if(!FromRxDoneInt && pFrame->FC.Wep == 1)
+					break;
+				else
+				{
+					/* swab 16 bit fields - Reason code field */
+					pMacHdr += sizeof(HEADER_802_11);
+					*(USHORT *)pMacHdr = SWAP16(*(USHORT *)pMacHdr);
+				}
+				break;
+		}
+	}
+	else if( pFrame->FC.Type == BTYPE_DATA )
+	{
+	}
+	else if(pFrame->FC.Type == BTYPE_CNTL)
+	{
+		switch(pFrame->FC.SubType)
+		{
+			case SUBTYPE_BLOCK_ACK_REQ:
+				{
+					PFRAME_BA_REQ pBAReq = (PFRAME_BA_REQ)pFrame;
+					*(USHORT *)(&pBAReq->BARControl) = SWAP16(*(USHORT *)(&pBAReq->BARControl));
+					pBAReq->BAStartingSeq.word = SWAP16(pBAReq->BAStartingSeq.word);
+				}
+				break;
+			case SUBTYPE_BLOCK_ACK:
+				/* For Block Ack packet, the HT_CONTROL field is in the same offset with Addr3 */
+				*(UINT32 *)(&pFrame->Addr3[0]) = SWAP32(*(UINT32 *)(&pFrame->Addr3[0]));
+				break;
+
+			case SUBTYPE_ACK:
+				/*For ACK packet, the HT_CONTROL field is in the same offset with Addr2 */
+				*(UINT32 *)(&pFrame->Addr2[0])=	SWAP32(*(UINT32 *)(&pFrame->Addr2[0]));
+				break;
+		}
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_ERROR,("Invalid Frame Type!!!\n"));
+	}
+
+	/* swab 16 bit fields - Frame Control */
+	if(Dir == DIR_WRITE)
+	{
+		*(USHORT *)pData = SWAP16(*(USHORT *)pData);
+	}
+}
+#endif /* RT_BIG_ENDIAN */
+
+
+/***************************************************************************
+  *	Other static inline function definitions
+  **************************************************************************/
+static inline VOID ConvertMulticastIP2MAC(
+	IN PUCHAR pIpAddr,
+	IN PUCHAR *ppMacAddr, 
+	IN UINT16 ProtoType)
+{
+	if (pIpAddr == NULL)
+		return;
+
+	if (ppMacAddr == NULL || *ppMacAddr == NULL)
+		return;
+
+	switch (ProtoType)
+	{
+		case ETH_P_IPV6:
+/*			memset(*ppMacAddr, 0, ETH_LENGTH_OF_ADDRESS); */
+			*(*ppMacAddr) = 0x33;
+			*(*ppMacAddr + 1) = 0x33;
+			*(*ppMacAddr + 2) = pIpAddr[12];
+			*(*ppMacAddr + 3) = pIpAddr[13];
+			*(*ppMacAddr + 4) = pIpAddr[14];
+			*(*ppMacAddr + 5) = pIpAddr[15];
+			break;
+
+		case ETH_P_IP:
+		default:
+/*			memset(*ppMacAddr, 0, ETH_LENGTH_OF_ADDRESS); */
+			*(*ppMacAddr) = 0x01;
+			*(*ppMacAddr + 1) = 0x00;
+			*(*ppMacAddr + 2) = 0x5e;
+			*(*ppMacAddr + 3) = pIpAddr[1] & 0x7f;
+			*(*ppMacAddr + 4) = pIpAddr[2];
+			*(*ppMacAddr + 5) = pIpAddr[3];
+			break;
+	}
+
+	return;
+}
+
+
+char *GetPhyMode(int Mode);
+char* GetBW(int BW);
+
+
+
+BOOLEAN RTMPCheckForHang(
+	IN  NDIS_HANDLE MiniportAdapterContext);
+
+/* */
+/*  Private routines in rtmp_init.c */
+/* */
+
+NDIS_STATUS RTMPAllocTxRxRingMemory(
+	IN  PRTMP_ADAPTER   pAd);
+
+#ifdef RESOURCE_PRE_ALLOC
+NDIS_STATUS RTMPInitTxRxRingMemory(
+	IN RTMP_ADAPTER *pAd);
+#endif /* RESOURCE_PRE_ALLOC */
+
+NDIS_STATUS	RTMPReadParametersHook(
+	IN	PRTMP_ADAPTER pAd);
+
+NDIS_STATUS	RTMPSetProfileParameters(
+	IN RTMP_ADAPTER *pAd,
+	IN PSTRING		pBuffer);
+
+INT RTMPGetKeyParameter(
+    IN PSTRING key,
+    OUT PSTRING dest,
+    IN INT destsize,
+    IN PSTRING buffer,
+    IN BOOLEAN bTrimSpace);
+
+
+
+#ifdef RTMP_RF_RW_SUPPORT
+VOID NICInitRFRegisters(
+	IN PRTMP_ADAPTER pAd);
+
+NDIS_STATUS	RT30xxWriteRFRegister(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			regID,
+	IN	UCHAR			value);
+
+NDIS_STATUS	RT30xxReadRFRegister(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			regID,
+	IN	PUCHAR			pValue);
+#endif /* RTMP_RF_RW_SUPPORT */
+
+VOID NICReadEEPROMParameters(
+	IN  PRTMP_ADAPTER       pAd,
+	IN	PSTRING				mac_addr);
+
+VOID NICInitAsicFromEEPROM(
+	IN  PRTMP_ADAPTER       pAd);
+
+
+NDIS_STATUS NICInitializeAdapter(
+	IN  PRTMP_ADAPTER   pAd,
+	IN   BOOLEAN    bHardReset);
+
+NDIS_STATUS NICInitializeAsic(
+	IN  PRTMP_ADAPTER   pAd,
+	IN  BOOLEAN		bHardReset);
+
+
+VOID RTMPRingCleanUp(
+	IN  PRTMP_ADAPTER   pAd,
+	IN  UCHAR           RingType);
+
+VOID UserCfgExit(	
+	IN  RTMP_ADAPTER *pAd);
+
+VOID UserCfgInit(
+	IN  PRTMP_ADAPTER   pAd);
+
+NDIS_STATUS NICLoadFirmware(
+	IN  PRTMP_ADAPTER   pAd);
+
+VOID NICEraseFirmware(
+	IN PRTMP_ADAPTER pAd);
+
+NDIS_STATUS NICLoadRateSwitchingParams(
+	IN PRTMP_ADAPTER pAd);
+
+VOID NICUpdateFifoStaCounters(
+	IN PRTMP_ADAPTER pAd);
+
+VOID NICUpdateRawCounters(
+	IN  PRTMP_ADAPTER   pAd);
+
+VOID RTMPZeroMemory(
+	IN  PVOID   pSrc,
+	IN  ULONG   Length);
+
+ULONG RTMPCompareMemory(
+	IN  PVOID   pSrc1,
+	IN  PVOID   pSrc2,
+	IN  ULONG   Length);
+
+VOID RTMPMoveMemory(
+	OUT PVOID   pDest,
+	IN  PVOID   pSrc,
+	IN  ULONG   Length);
+
+VOID AtoH(
+	PSTRING	src,
+	PUCHAR dest,
+	int		destlen);
+
+UCHAR BtoH(
+	char ch);
+
+VOID	RTMP_TimerListAdd(
+	IN	PRTMP_ADAPTER			pAd,
+	IN	VOID					*pRsc);
+
+VOID	RTMP_TimerListRelease(
+	IN	PRTMP_ADAPTER			pAd);
+
+VOID RTMPInitTimer(
+	IN  PRTMP_ADAPTER           pAd,
+	IN  PRALINK_TIMER_STRUCT    pTimer,
+	IN  PVOID                   pTimerFunc,
+	IN	PVOID					pData,
+	IN  BOOLEAN                 Repeat);
+
+VOID RTMPSetTimer(
+	IN  PRALINK_TIMER_STRUCT    pTimer,
+	IN  ULONG                   Value);
+
+
+VOID RTMPModTimer(
+	IN	PRALINK_TIMER_STRUCT	pTimer,
+	IN	ULONG					Value);
+
+VOID RTMPCancelTimer(
+	IN  PRALINK_TIMER_STRUCT    pTimer,
+	OUT BOOLEAN                 *pCancelled);
+
+VOID	RTMPReleaseTimer(
+	IN  PRALINK_TIMER_STRUCT    pTimer,
+	OUT BOOLEAN                 *pCancelled);
+
+VOID RTMPEnableRxTx(
+	IN PRTMP_ADAPTER	pAd);
+
+
+VOID AntCfgInit(
+IN  PRTMP_ADAPTER   pAd);
+
+
+/* */
+/* prototype in action.c */
+/* */
+VOID ActionStateMachineInit(
+    IN	PRTMP_ADAPTER	pAd, 
+    IN  STATE_MACHINE *S, 
+    OUT STATE_MACHINE_FUNC Trans[]);
+
+VOID MlmeADDBAAction(
+    IN PRTMP_ADAPTER pAd, 
+    IN MLME_QUEUE_ELEM *Elem);
+
+VOID MlmeDELBAAction(
+    IN PRTMP_ADAPTER pAd, 
+    IN MLME_QUEUE_ELEM *Elem);
+
+VOID MlmeDLSAction(
+    IN PRTMP_ADAPTER pAd, 
+    IN MLME_QUEUE_ELEM *Elem);
+
+VOID MlmeInvalidAction(
+    IN PRTMP_ADAPTER pAd, 
+    IN MLME_QUEUE_ELEM *Elem);
+
+VOID MlmeQOSAction(
+    IN PRTMP_ADAPTER pAd, 
+    IN MLME_QUEUE_ELEM *Elem);
+
+#ifdef DOT11_N_SUPPORT
+VOID PeerAddBAReqAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem);
+
+VOID PeerAddBARspAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem);
+
+VOID PeerDelBAAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem);
+
+VOID PeerBAAction(
+    IN PRTMP_ADAPTER pAd, 
+    IN MLME_QUEUE_ELEM *Elem);
+#endif /* DOT11_N_SUPPORT */
+
+VOID SendPSMPAction(
+	IN PRTMP_ADAPTER	pAd,
+	IN UCHAR			Wcid,
+	IN UCHAR			Psmp);
+				   
+
+VOID PeerRMAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem);
+
+VOID PeerPublicAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem);
+
+#ifdef CONFIG_STA_SUPPORT
+VOID StaPublicAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN BSS_2040_COEXIST_IE *pBss2040CoexIE);
+#endif /* CONFIG_STA_SUPPORT */
+
+
+VOID PeerBSSTranAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem);
+
+#ifdef DOT11_N_SUPPORT
+VOID PeerHTAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem);
+#endif /* DOT11_N_SUPPORT */
+
+VOID PeerQOSAction(
+    IN PRTMP_ADAPTER pAd, 
+    IN MLME_QUEUE_ELEM *Elem);
+
+#ifdef QOS_DLS_SUPPORT
+VOID PeerDLSAction(
+    IN PRTMP_ADAPTER pAd, 
+    IN MLME_QUEUE_ELEM *Elem);
+#endif /* QOS_DLS_SUPPORT */
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef QOS_DLS_SUPPORT
+VOID DlsParmFill(
+	IN PRTMP_ADAPTER pAd, 
+	IN OUT MLME_DLS_REQ_STRUCT *pDlsReq,
+	IN PRT_802_11_DLS pDls,
+	IN USHORT reason);
+#endif /* QOS_DLS_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef DOT11_N_SUPPORT
+VOID RECBATimerTimeout(
+    IN PVOID SystemSpecific1, 
+    IN PVOID FunctionContext, 
+    IN PVOID SystemSpecific2, 
+    IN PVOID SystemSpecific3);
+
+VOID ORIBATimerTimeout(
+	IN	PRTMP_ADAPTER	pAd);
+
+VOID SendRefreshBAR(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	MAC_TABLE_ENTRY	*pEntry);
+
+#ifdef DOT11N_DRAFT3
+VOID RTMP_11N_D3_TimerInit(
+	IN PRTMP_ADAPTER pAd);
+
+VOID SendBSS2040CoexistMgmtAction(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR	Wcid,
+	IN	UCHAR	apidx,
+	IN	UCHAR	InfoReq);
+
+VOID SendNotifyBWActionFrame(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR  Wcid,
+	IN UCHAR apidx);
+	
+BOOLEAN ChannelSwitchSanityCheck(
+	IN	PRTMP_ADAPTER	pAd,
+	IN    UCHAR  Wcid,
+	IN    UCHAR  NewChannel,
+	IN    UCHAR  Secondary);
+
+VOID ChannelSwitchAction(
+	IN	PRTMP_ADAPTER	pAd,
+	IN    UCHAR  Wcid,
+	IN    UCHAR  Channel,
+	IN    UCHAR  Secondary);
+
+ULONG BuildIntolerantChannelRep(
+	IN	PRTMP_ADAPTER	pAd,
+	IN    PUCHAR  pDest); 
+
+VOID Update2040CoexistFrameAndNotify(
+	IN	PRTMP_ADAPTER	pAd,
+	IN    UCHAR  Wcid,
+	IN	BOOLEAN	bAddIntolerantCha);
+	
+VOID Send2040CoexistAction(
+	IN	PRTMP_ADAPTER	pAd,
+	IN    UCHAR  Wcid,
+	IN	BOOLEAN	bAddIntolerantCha);
+
+VOID UpdateBssScanParm(
+	IN PRTMP_ADAPTER pAd,
+	IN OVERLAP_BSS_SCAN_IE APBssScan);
+#endif /* DOT11N_DRAFT3 */
+#endif /* DOT11_N_SUPPORT */
+	
+VOID ActHeaderInit(
+    IN	PRTMP_ADAPTER	pAd, 
+    IN OUT PHEADER_802_11 pHdr80211, 
+    IN PUCHAR Addr1, 
+    IN PUCHAR Addr2,
+    IN PUCHAR Addr3);
+
+VOID BarHeaderInit(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN OUT PFRAME_BAR pCntlBar, 
+	IN PUCHAR pDA,
+	IN PUCHAR pSA);
+
+VOID InsertActField(
+	IN PRTMP_ADAPTER pAd,
+	OUT PUCHAR pFrameBuf,
+	OUT PULONG pFrameLen,
+	IN UINT8 Category,
+	IN UINT8 ActCode);
+
+BOOLEAN QosBADataParse(
+	IN PRTMP_ADAPTER	pAd, 
+	IN BOOLEAN bAMSDU,
+	IN PUCHAR p8023Header,
+	IN UCHAR	WCID,
+	IN UCHAR	TID,
+	IN USHORT Sequence,
+	IN UCHAR DataOffset, 
+	IN USHORT Datasize,
+	IN UINT   CurRxIndex);
+
+#ifdef DOT11_N_SUPPORT
+BOOLEAN CntlEnqueueForRecv(
+    IN	PRTMP_ADAPTER	pAd, 
+	IN ULONG Wcid, 
+    IN ULONG MsgLen, 
+	IN PFRAME_BA_REQ pMsg);
+
+VOID BaAutoManSwitch(
+	IN	PRTMP_ADAPTER	pAd);
+#endif /* DOT11_N_SUPPORT */
+
+VOID HTIOTCheck(
+	IN	PRTMP_ADAPTER	pAd,
+	IN    UCHAR     BatRecIdx);
+
+/* */
+/* Private routines in rtmp_data.c */
+/* */
+BOOLEAN RTMPHandleTxRingDmaDoneInterrupt(
+	IN  PRTMP_ADAPTER   pAd,
+	IN  INT_SOURCE_CSR_STRUC TxRingBitmap);
+
+VOID RTMPHandleMgmtRingDmaDoneInterrupt(
+	IN  PRTMP_ADAPTER   pAd);
+
+VOID RTMPHandleTBTTInterrupt(
+	IN  PRTMP_ADAPTER   pAd);
+
+VOID RTMPHandlePreTBTTInterrupt(
+	IN  PRTMP_ADAPTER   pAd);
+
+void RTMPHandleTwakeupInterrupt(
+	IN PRTMP_ADAPTER pAd);
+
+VOID	RTMPHandleRxCoherentInterrupt(
+	IN	PRTMP_ADAPTER	pAd);
+
+
+
+NDIS_STATUS STASendPacket(
+	IN  PRTMP_ADAPTER   pAd,
+	IN  PNDIS_PACKET    pPacket);
+
+VOID STASendPackets(
+	IN  NDIS_HANDLE     MiniportAdapterContext,
+	IN  PPNDIS_PACKET   ppPacketArray,
+	IN  UINT            NumberOfPackets);
+
+VOID RTMPDeQueuePacket(
+	IN  PRTMP_ADAPTER   pAd,
+   	IN	BOOLEAN			bIntContext,
+	IN  UCHAR			QueIdx,
+	IN	UCHAR			Max_Tx_Packets);
+
+NDIS_STATUS	RTMPHardTransmit(
+	IN PRTMP_ADAPTER	pAd,
+	IN PNDIS_PACKET		pPacket,
+	IN  UCHAR			QueIdx,
+	OUT	PULONG			pFreeTXDLeft);
+
+NDIS_STATUS	STAHardTransmit(
+	IN PRTMP_ADAPTER	pAd,
+	IN TX_BLK			*pTxBlk,
+	IN  UCHAR			QueIdx);
+
+VOID STARxEAPOLFrameIndicate(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	MAC_TABLE_ENTRY	*pEntry,
+	IN	RX_BLK			*pRxBlk,
+	IN	UCHAR			FromWhichBSSID);
+
+NDIS_STATUS RTMPFreeTXDRequest(
+	IN  PRTMP_ADAPTER   pAd,
+	IN  UCHAR           RingType,
+	IN  UCHAR           NumberRequired,
+	IN 	PUCHAR          FreeNumberIs);
+
+NDIS_STATUS MlmeHardTransmit(
+	IN  PRTMP_ADAPTER   pAd,
+	IN  UCHAR	QueIdx,
+	IN  PNDIS_PACKET    pPacket,
+	IN	BOOLEAN			FlgDataQForce,
+	IN	BOOLEAN			FlgIsLocked);
+
+NDIS_STATUS MlmeHardTransmitMgmtRing(
+	IN  PRTMP_ADAPTER   pAd,
+	IN  UCHAR	QueIdx,
+	IN  PNDIS_PACKET    pPacket);
+
+
+USHORT  RTMPCalcDuration(
+	IN  PRTMP_ADAPTER   pAd,
+	IN  UCHAR           Rate,
+	IN  ULONG           Size);
+
+VOID RTMPWriteTxWI(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PTXWI_STRUC		pTxWI,	
+	IN  BOOLEAN    		FRAG,	
+	IN  BOOLEAN    		CFACK,
+	IN  BOOLEAN    		InsTimestamp,
+	IN	BOOLEAN			AMPDU,
+	IN	BOOLEAN			Ack,
+	IN	BOOLEAN			NSeq,		/* HW new a sequence. */
+	IN	UCHAR			BASize,
+	IN	UCHAR			WCID,
+	IN	ULONG			Length,
+	IN  UCHAR      		PID,
+	IN	UCHAR			TID,
+	IN	UCHAR			TxRate,
+	IN	UCHAR			Txopmode,	
+	IN	BOOLEAN			CfAck,	
+	IN	HTTRANSMIT_SETTING	*pTransmit);
+
+
+VOID RTMPWriteTxWI_Data(
+	IN	PRTMP_ADAPTER		pAd,
+	IN	OUT PTXWI_STRUC		pTxWI,
+	IN	TX_BLK				*pTxBlk);
+
+	
+VOID RTMPWriteTxWI_Cache(
+	IN	PRTMP_ADAPTER		pAd,
+	IN	OUT PTXWI_STRUC		pTxWI,
+	IN	TX_BLK				*pTxBlk);
+
+VOID RTMPSuspendMsduTransmission(
+	IN  PRTMP_ADAPTER   pAd);
+
+VOID RTMPResumeMsduTransmission(
+	IN  PRTMP_ADAPTER   pAd);
+
+NDIS_STATUS MiniportMMRequest(
+	IN  PRTMP_ADAPTER   pAd,
+	IN	UCHAR			QueIdx,
+	IN	PUCHAR			pData,
+	IN  UINT            Length);
+
+VOID RTMPSendNullFrame(
+	IN  PRTMP_ADAPTER   pAd,
+	IN  UCHAR           TxRate,
+	IN	BOOLEAN			bQosNull);
+
+#ifdef CONFIG_STA_SUPPORT
+VOID RTMPReportMicError(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  PCIPHER_KEY     pWpaKey);
+
+VOID	WpaMicFailureReportFrame(
+	IN  PRTMP_ADAPTER    pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID    WpaDisassocApAndBlockAssoc(
+    IN  PVOID SystemSpecific1, 
+    IN  PVOID FunctionContext, 
+    IN  PVOID SystemSpecific2, 
+    IN  PVOID SystemSpecific3);
+
+VOID WpaStaPairwiseKeySetting(
+	IN	PRTMP_ADAPTER	pAd);
+
+VOID WpaStaGroupKeySetting(
+	IN	PRTMP_ADAPTER	pAd);
+
+VOID    WpaSendEapolStart(
+	IN	PRTMP_ADAPTER	pAdapter,
+	IN  PUCHAR          pBssid);
+
+#endif /* CONFIG_STA_SUPPORT */
+
+
+
+BOOLEAN RTMPFreeTXDUponTxDmaDone(
+	IN PRTMP_ADAPTER    pAd, 
+	IN UCHAR            QueIdx);
+
+BOOLEAN RTMPCheckEtherType(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PNDIS_PACKET	pPacket,
+	IN	PMAC_TABLE_ENTRY pMacEntry,
+	IN	UCHAR			OpMode,
+	OUT PUCHAR pUserPriority,
+	OUT PUCHAR pQueIdx);
+
+
+VOID RTMPCckBbpTuning(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	UINT			TxRate);
+/* */
+/* MLME routines */
+/* */
+
+/* Asic/RF/BBP related functions */
+
+VOID AsicAdjustTxPower(
+	IN PRTMP_ADAPTER pAd);
+
+VOID 	AsicUpdateProtect(
+	IN		PRTMP_ADAPTER	pAd,
+	IN 		USHORT			OperaionMode,
+	IN 		UCHAR			SetMask,
+	IN		BOOLEAN			bDisableBGProtect,
+	IN		BOOLEAN			bNonGFExist);
+
+VOID AsicBBPAdjust(
+	IN RTMP_ADAPTER *pAd);
+
+VOID AsicSwitchChannel(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN	UCHAR			Channel,
+	IN	BOOLEAN			bScan);
+
+VOID AsicLockChannel(
+	IN PRTMP_ADAPTER pAd, 
+	IN UCHAR Channel) ;
+
+VOID AsicAntennaSelect(
+	IN  PRTMP_ADAPTER   pAd,
+	IN  UCHAR           Channel);
+
+
+VOID AsicResetBBPAgent(
+	IN PRTMP_ADAPTER pAd);
+
+#ifdef CONFIG_STA_SUPPORT
+VOID AsicSleepThenAutoWakeup(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  USHORT TbttNumToNextWakeUp);
+
+VOID AsicForceSleep(
+	IN PRTMP_ADAPTER pAd);
+
+VOID AsicForceWakeup(
+	IN PRTMP_ADAPTER pAd,
+	IN BOOLEAN    bFromTx);
+#endif /* CONFIG_STA_SUPPORT */
+
+VOID AsicSetBssid(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  PUCHAR pBssid);
+
+VOID AsicSetMcastWC(
+	IN PRTMP_ADAPTER pAd);
+
+
+VOID AsicDelWcidTab(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR	Wcid);
+
+#ifdef DOT11_N_SUPPORT
+VOID AsicEnableRDG(
+	IN PRTMP_ADAPTER pAd);
+
+VOID AsicDisableRDG(
+	IN PRTMP_ADAPTER pAd);
+#endif /* DOT11_N_SUPPORT */
+
+VOID AsicDisableSync(
+	IN  PRTMP_ADAPTER   pAd);
+
+VOID AsicEnableBssSync(
+	IN  PRTMP_ADAPTER   pAd);
+
+VOID AsicEnableIbssSync(
+	IN  PRTMP_ADAPTER   pAd);
+
+VOID AsicSetEdcaParm(
+	IN PRTMP_ADAPTER pAd,
+	IN PEDCA_PARM    pEdcaParm);
+
+VOID AsicSetSlotTime(
+	IN PRTMP_ADAPTER pAd,
+	IN BOOLEAN bUseShortSlotTime);
+
+/* */
+/* Update the Tx chain address */
+/* */
+/* Parameters */
+/*	pAd: The adapter data structure */
+/*	pMacAddress: The MAC address of the peer STA */
+/* */
+/* Return Value: */
+/*	None */
+/* */
+VOID AsicUpdateTxChainAddress(
+	IN PRTMP_ADAPTER pAd, 
+	IN PUCHAR pMacAddress);
+
+/* */
+/* Enable the stream mode */
+/* */
+/* Parameters */
+/*	pAd: The adapter data structure */
+/* */
+/* Return Value: */
+/*	None */
+/* */
+VOID AsicEnableStreamMode(
+	IN PRTMP_ADAPTER pAd);
+
+/* */
+/* Disable the stream mode */
+/* */
+/* Parameters */
+/*	pAd: The adapter data structure */
+/* */
+/* Return Value: */
+/*	None */
+/* */
+VOID AsicDisableStreamMode(
+	IN PRTMP_ADAPTER pAd);
+
+VOID AsicAddSharedKeyEntry(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR         BssIndex,
+	IN UCHAR         KeyIdx,
+	IN PCIPHER_KEY	 pCipherKey);
+
+VOID AsicRemoveSharedKeyEntry(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR         BssIndex,
+	IN UCHAR         KeyIdx);
+
+VOID AsicUpdateWCIDIVEIV(
+	IN PRTMP_ADAPTER pAd,
+	IN USHORT		WCID,
+	IN ULONG        uIV,
+	IN ULONG        uEIV);
+
+VOID AsicUpdateRxWCIDTable(
+	IN PRTMP_ADAPTER pAd,
+	IN USHORT		WCID,
+	IN PUCHAR        pAddr);
+
+VOID	AsicUpdateWcidAttributeEntry(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			BssIdx,
+	IN 	UCHAR		 	KeyIdx,
+	IN 	UCHAR		 	CipherAlg,
+	IN	UINT8				Wcid,
+	IN	UINT8				KeyTabFlag);
+
+VOID AsicAddPairwiseKeyEntry(
+	IN PRTMP_ADAPTER 	pAd,
+	IN UCHAR			WCID,
+	IN PCIPHER_KEY		pCipherKey);
+
+VOID AsicRemovePairwiseKeyEntry(
+	IN PRTMP_ADAPTER  pAd,
+	IN UCHAR		 Wcid);
+
+BOOLEAN AsicSendCommandToMcu(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR         Command,
+	IN UCHAR         Token,
+	IN UCHAR         Arg0,
+	IN UCHAR         Arg1);
+
+BOOLEAN AsicSendCommandToMcuBBP(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR		 Command,
+	IN UCHAR		 Token,
+	IN UCHAR		 Arg0,
+	IN UCHAR		 Arg1,
+	IN BOOLEAN		FlgIsNeedLocked);
+
+
+
+
+#ifdef VCORECAL_SUPPORT
+VOID AsicVCORecalibration(
+	IN PRTMP_ADAPTER pAd);
+#endif /* VCORECAL_SUPPORT */
+
+VOID MacAddrRandomBssid(
+	IN  PRTMP_ADAPTER   pAd, 
+	OUT PUCHAR pAddr);
+
+VOID MgtMacHeaderInit(
+	IN  PRTMP_ADAPTER     pAd, 
+	IN OUT PHEADER_802_11 pHdr80211, 
+	IN UCHAR SubType, 
+	IN UCHAR ToDs, 
+	IN PUCHAR pDA, 
+	IN PUCHAR pBssid);
+
+VOID MlmeRadioOff(
+	IN PRTMP_ADAPTER pAd);
+
+VOID MlmeRadioOn(
+	IN PRTMP_ADAPTER pAd);
+
+
+VOID BssTableInit(
+	IN BSS_TABLE *Tab);
+
+#ifdef DOT11_N_SUPPORT
+VOID BATableInit(
+	IN PRTMP_ADAPTER pAd,
+    IN BA_TABLE *Tab);
+
+VOID BATableExit(	
+	IN RTMP_ADAPTER *pAd);
+#endif /* DOT11_N_SUPPORT */
+
+ULONG BssTableSearch(
+	IN BSS_TABLE *Tab, 
+	IN PUCHAR pBssid,
+	IN UCHAR Channel);
+
+ULONG BssSsidTableSearch(
+	IN BSS_TABLE *Tab, 
+	IN PUCHAR    pBssid,
+	IN PUCHAR    pSsid,
+	IN UCHAR     SsidLen,
+	IN UCHAR     Channel);
+
+ULONG BssTableSearchWithSSID(
+	IN BSS_TABLE *Tab, 
+	IN PUCHAR    Bssid,
+	IN PUCHAR    pSsid,
+	IN UCHAR     SsidLen,
+	IN UCHAR     Channel);
+
+ULONG BssSsidTableSearchBySSID(
+	IN BSS_TABLE *Tab,
+	IN PUCHAR	 pSsid,
+	IN UCHAR	 SsidLen);
+
+VOID BssTableDeleteEntry(
+	IN OUT  PBSS_TABLE pTab, 
+	IN      PUCHAR pBssid,
+	IN      UCHAR Channel);
+
+VOID  BssEntrySet(
+	IN  PRTMP_ADAPTER   pAd, 
+	OUT PBSS_ENTRY pBss, 
+	IN PUCHAR pBssid, 
+	IN CHAR Ssid[], 
+	IN UCHAR SsidLen, 
+	IN UCHAR BssType, 
+	IN USHORT BeaconPeriod,
+	IN PCF_PARM CfParm, 
+	IN USHORT AtimWin, 
+	IN USHORT CapabilityInfo, 
+	IN UCHAR SupRate[], 
+	IN UCHAR SupRateLen,
+	IN UCHAR ExtRate[], 
+	IN UCHAR ExtRateLen,
+	IN HT_CAPABILITY_IE *pHtCapability,
+	IN ADD_HT_INFO_IE *pAddHtInfo,	/* AP might use this additional ht info IE */
+	IN UCHAR			HtCapabilityLen,
+	IN UCHAR			AddHtInfoLen,
+	IN UCHAR			NewExtChanOffset,
+	IN UCHAR Channel,
+	IN CHAR Rssi,
+	IN LARGE_INTEGER TimeStamp,
+	IN UCHAR CkipFlag,
+	IN PEDCA_PARM pEdcaParm,
+	IN PQOS_CAPABILITY_PARM pQosCapability,
+	IN PQBSS_LOAD_PARM pQbssLoad,
+	IN USHORT LengthVIE,
+	IN PNDIS_802_11_VARIABLE_IEs pVIE);
+
+ULONG  BssTableSetEntry(
+	IN  PRTMP_ADAPTER   pAd, 
+	OUT PBSS_TABLE pTab, 
+	IN PUCHAR pBssid, 
+	IN CHAR Ssid[], 
+	IN UCHAR SsidLen, 
+	IN UCHAR BssType, 
+	IN USHORT BeaconPeriod, 
+	IN CF_PARM *CfParm, 
+	IN USHORT AtimWin, 
+	IN USHORT CapabilityInfo, 
+	IN UCHAR SupRate[], 
+	IN UCHAR SupRateLen,
+	IN UCHAR ExtRate[],
+	IN UCHAR ExtRateLen,
+	IN HT_CAPABILITY_IE *pHtCapability,
+	IN ADD_HT_INFO_IE *pAddHtInfo,	/* AP might use this additional ht info IE */
+	IN UCHAR			HtCapabilityLen,
+	IN UCHAR			AddHtInfoLen,
+	IN UCHAR			NewExtChanOffset,
+	IN UCHAR Channel,
+	IN CHAR Rssi,
+	IN LARGE_INTEGER TimeStamp,
+	IN UCHAR CkipFlag,
+	IN PEDCA_PARM pEdcaParm,
+	IN PQOS_CAPABILITY_PARM pQosCapability,
+	IN PQBSS_LOAD_PARM pQbssLoad,
+	IN USHORT LengthVIE,
+	IN PNDIS_802_11_VARIABLE_IEs pVIE);
+
+#ifdef DOT11_N_SUPPORT
+VOID BATableInsertEntry(
+    IN	PRTMP_ADAPTER	pAd, 
+	IN USHORT Aid,    
+    IN USHORT		TimeOutValue,
+	IN USHORT		StartingSeq,
+    IN UCHAR TID, 
+	IN UCHAR BAWinSize, 
+	IN UCHAR OriginatorStatus, 
+    IN BOOLEAN IsRecipient);
+
+#ifdef DOT11N_DRAFT3
+VOID Bss2040CoexistTimeOut(
+	IN PVOID SystemSpecific1, 
+	IN PVOID FunctionContext, 
+	IN PVOID SystemSpecific2, 
+	IN PVOID SystemSpecific3);
+
+
+VOID  TriEventInit(
+	IN	PRTMP_ADAPTER	pAd);
+
+INT TriEventTableSetEntry(
+	IN	PRTMP_ADAPTER	pAd, 
+	OUT TRIGGER_EVENT_TAB *Tab, 
+	IN PUCHAR pBssid, 
+	IN HT_CAPABILITY_IE *pHtCapability,
+	IN UCHAR			HtCapabilityLen,
+	IN UCHAR			RegClass,
+	IN UCHAR ChannelNo);
+
+#endif /* DOT11N_DRAFT3 */
+#endif /* DOT11_N_SUPPORT */
+
+VOID BssTableSsidSort(
+	IN  PRTMP_ADAPTER   pAd, 
+	OUT BSS_TABLE *OutTab, 
+	IN  CHAR Ssid[], 
+	IN  UCHAR SsidLen);
+
+VOID  BssTableSortByRssi(
+	IN OUT BSS_TABLE *OutTab);
+
+VOID BssCipherParse(
+	IN OUT  PBSS_ENTRY  pBss);
+
+NDIS_STATUS  MlmeQueueInit(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE *Queue);
+
+VOID  MlmeQueueDestroy(
+	IN MLME_QUEUE *Queue);
+
+BOOLEAN MlmeEnqueue(
+	IN PRTMP_ADAPTER pAd, 
+	IN ULONG Machine, 
+	IN ULONG MsgType, 
+	IN ULONG MsgLen, 
+	IN VOID *Msg,
+	IN ULONG Priv);
+
+BOOLEAN MlmeEnqueueForRecv(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN ULONG Wcid, 
+	IN ULONG TimeStampHigh, 
+	IN ULONG TimeStampLow, 
+	IN UCHAR Rssi0, 
+	IN UCHAR Rssi1, 
+	IN UCHAR Rssi2, 
+	IN ULONG MsgLen, 
+	IN PVOID Msg,
+	IN UCHAR Signal,
+	IN UCHAR OpMode);
+
+
+BOOLEAN MlmeDequeue(
+	IN MLME_QUEUE *Queue, 
+	OUT MLME_QUEUE_ELEM **Elem);
+
+VOID    MlmeRestartStateMachine(
+	IN  PRTMP_ADAPTER   pAd);
+
+BOOLEAN  MlmeQueueEmpty(
+	IN MLME_QUEUE *Queue);
+
+BOOLEAN  MlmeQueueFull(
+	IN MLME_QUEUE *Queue,
+	IN UCHAR SendId);
+
+BOOLEAN  MsgTypeSubst(
+	IN PRTMP_ADAPTER pAd, 
+	IN PFRAME_802_11 pFrame, 
+	OUT INT *Machine, 
+	OUT INT *MsgType);
+
+VOID StateMachineInit(
+	IN STATE_MACHINE *Sm, 
+	IN STATE_MACHINE_FUNC Trans[], 
+	IN ULONG StNr, 
+	IN ULONG MsgNr, 
+	IN STATE_MACHINE_FUNC DefFunc, 
+	IN ULONG InitState, 
+	IN ULONG Base);
+
+VOID StateMachineSetAction(
+	IN STATE_MACHINE *S, 
+	IN ULONG St, 
+	ULONG Msg, 
+	IN STATE_MACHINE_FUNC F);
+
+VOID StateMachinePerformAction(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN STATE_MACHINE *S, 
+	IN MLME_QUEUE_ELEM *Elem,
+	IN ULONG CurrState);
+
+VOID Drop(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN MLME_QUEUE_ELEM *Elem);
+
+VOID AssocStateMachineInit(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  STATE_MACHINE *Sm, 
+	OUT STATE_MACHINE_FUNC Trans[]);
+
+VOID ReassocTimeout(
+	IN PVOID SystemSpecific1, 
+	IN PVOID FunctionContext, 
+	IN PVOID SystemSpecific2, 
+	IN PVOID SystemSpecific3);
+
+VOID AssocTimeout(
+	IN PVOID SystemSpecific1, 
+	IN PVOID FunctionContext, 
+	IN PVOID SystemSpecific2, 
+	IN PVOID SystemSpecific3);
+
+VOID DisassocTimeout(
+	IN PVOID SystemSpecific1, 
+	IN PVOID FunctionContext, 
+	IN PVOID SystemSpecific2, 
+	IN PVOID SystemSpecific3);
+
+/*---------------------------------------------- */
+VOID MlmeDisassocReqAction(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID MlmeAssocReqAction(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID MlmeReassocReqAction(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID MlmeDisassocReqAction(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID PeerAssocRspAction(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID PeerReassocRspAction(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID PeerDisassocAction(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID DisassocTimeoutAction(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID AssocTimeoutAction(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID  ReassocTimeoutAction(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID  Cls3errAction(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  PUCHAR pAddr);
+
+VOID  InvalidStateWhenAssoc(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID  InvalidStateWhenReassoc(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID InvalidStateWhenDisassociate(
+	IN  PRTMP_ADAPTER pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+#ifdef RTMP_MAC_USB
+VOID MlmeCntlConfirm(
+	IN PRTMP_ADAPTER pAd, 
+	IN ULONG MsgType, 
+	IN USHORT Msg);
+#endif /* RTMP_MAC_USB */
+
+VOID  ComposePsPoll(
+	IN  PRTMP_ADAPTER   pAd);
+
+VOID  ComposeNullFrame(
+	IN  PRTMP_ADAPTER pAd);
+
+VOID  AssocPostProc(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  PUCHAR pAddr2, 
+	IN  USHORT CapabilityInfo, 
+	IN  USHORT Aid, 
+	IN  UCHAR SupRate[], 
+	IN  UCHAR SupRateLen,
+	IN  UCHAR ExtRate[],
+	IN  UCHAR ExtRateLen,
+	IN PEDCA_PARM pEdcaParm,
+	IN HT_CAPABILITY_IE		*pHtCapability,
+	IN  UCHAR HtCapabilityLen,
+	IN ADD_HT_INFO_IE		*pAddHtInfo);
+
+VOID AuthStateMachineInit(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN PSTATE_MACHINE sm, 
+	OUT STATE_MACHINE_FUNC Trans[]);
+
+VOID AuthTimeout(
+	IN PVOID SystemSpecific1, 
+	IN PVOID FunctionContext, 
+	IN PVOID SystemSpecific2, 
+	IN PVOID SystemSpecific3);
+
+VOID MlmeAuthReqAction(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID PeerAuthRspAtSeq2Action(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID PeerAuthRspAtSeq4Action(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID AuthTimeoutAction(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID Cls2errAction(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  PUCHAR pAddr);
+
+VOID MlmeDeauthReqAction(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID InvalidStateWhenAuth(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+/*============================================= */
+
+VOID AuthRspStateMachineInit(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  PSTATE_MACHINE Sm, 
+	IN  STATE_MACHINE_FUNC Trans[]);
+
+VOID PeerDeauthAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem);
+
+VOID PeerAuthSimpleRspGenAndSend(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  PHEADER_802_11  pHdr80211, 
+	IN  USHORT Alg, 
+	IN  USHORT Seq, 
+	IN  USHORT Reason, 
+	IN  USHORT Status);
+
+/* */
+/* Private routines in dls.c */
+/* */
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef QOS_DLS_SUPPORT
+void DlsStateMachineInit(
+    IN PRTMP_ADAPTER pAd, 
+    IN STATE_MACHINE *Sm, 
+    OUT STATE_MACHINE_FUNC Trans[]);
+
+VOID MlmeDlsReqAction(
+    IN PRTMP_ADAPTER pAd, 
+    IN MLME_QUEUE_ELEM *Elem);
+
+VOID PeerDlsReqAction(
+    IN PRTMP_ADAPTER	pAd, 
+    IN MLME_QUEUE_ELEM	*Elem);
+
+VOID PeerDlsRspAction(
+    IN PRTMP_ADAPTER	pAd, 
+    IN MLME_QUEUE_ELEM	*Elem);
+
+VOID MlmeDlsTearDownAction(
+    IN PRTMP_ADAPTER pAd, 
+    IN MLME_QUEUE_ELEM *Elem);
+
+VOID PeerDlsTearDownAction(
+    IN PRTMP_ADAPTER	pAd, 
+    IN MLME_QUEUE_ELEM	*Elem);
+
+VOID RTMPCheckDLSTimeOut(
+	IN PRTMP_ADAPTER	pAd);
+
+BOOLEAN RTMPRcvFrameDLSCheck(
+	IN PRTMP_ADAPTER	pAd,
+	IN PHEADER_802_11	pHeader,
+	IN ULONG			Len,
+	IN PRT28XX_RXD_STRUC	pRxD);
+
+INT	RTMPCheckDLSFrame(
+	IN	PRTMP_ADAPTER	pAd,
+	IN  PUCHAR          pDA);
+
+VOID RTMPSendDLSTearDownFrame(
+	IN	PRTMP_ADAPTER	pAd,
+	IN  PUCHAR          pDA);
+
+NDIS_STATUS RTMPSendSTAKeyRequest(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PUCHAR			pDA);
+
+NDIS_STATUS RTMPSendSTAKeyHandShake(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PUCHAR			pDA);
+
+VOID DlsTimeoutAction(
+	IN PVOID SystemSpecific1, 
+	IN PVOID FunctionContext, 
+	IN PVOID SystemSpecific2, 
+	IN PVOID SystemSpecific3);
+
+BOOLEAN MlmeDlsReqSanity(
+	IN PRTMP_ADAPTER pAd, 
+    IN VOID *Msg, 
+    IN ULONG MsgLen,
+    OUT PRT_802_11_DLS *pDLS,
+    OUT PUSHORT pReason);
+
+INT Set_DlsEntryInfo_Display_Proc(
+	IN PRTMP_ADAPTER pAd, 
+	IN PUCHAR arg);
+
+MAC_TABLE_ENTRY *MacTableInsertDlsEntry(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  PUCHAR	pAddr,
+	IN  UINT	DlsEntryIdx);
+
+BOOLEAN MacTableDeleteDlsEntry(
+	IN PRTMP_ADAPTER pAd,
+	IN USHORT wcid,
+	IN PUCHAR pAddr);
+
+MAC_TABLE_ENTRY *DlsEntryTableLookup(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR	pAddr,
+	IN BOOLEAN	bResetIdelCount);
+
+MAC_TABLE_ENTRY *DlsEntryTableLookupByWcid(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR	wcid,
+	IN PUCHAR	pAddr,
+	IN BOOLEAN	bResetIdelCount);
+
+INT	Set_DlsAddEntry_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_DlsTearDownEntry_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+#endif /* QOS_DLS_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef QOS_DLS_SUPPORT
+BOOLEAN PeerDlsReqSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN VOID *Msg, 
+    IN ULONG MsgLen,
+    OUT PUCHAR pDA,
+    OUT PUCHAR pSA,
+    OUT USHORT *pCapabilityInfo, 
+    OUT USHORT *pDlsTimeout,
+    OUT UCHAR *pRatesLen,
+    OUT UCHAR Rates[],
+    OUT UCHAR *pHtCapabilityLen,
+    OUT HT_CAPABILITY_IE *pHtCapability);
+
+BOOLEAN PeerDlsRspSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN VOID *Msg, 
+    IN ULONG MsgLen,
+    OUT PUCHAR pDA,
+    OUT PUCHAR pSA,
+    OUT USHORT *pCapabilityInfo, 
+    OUT USHORT *pStatus,
+    OUT UCHAR *pRatesLen,
+    OUT UCHAR Rates[],
+    OUT UCHAR *pHtCapabilityLen,
+    OUT HT_CAPABILITY_IE *pHtCapability);
+
+BOOLEAN PeerDlsTearDownSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN VOID *Msg, 
+    IN ULONG MsgLen,
+    OUT PUCHAR pDA,
+    OUT PUCHAR pSA,
+    OUT USHORT *pReason);
+#endif /* QOS_DLS_SUPPORT */
+
+BOOLEAN PeerProbeReqSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN VOID *Msg, 
+    IN ULONG MsgLen, 
+    OUT PUCHAR pAddr2,
+    OUT CHAR Ssid[], 
+    OUT UCHAR *SsidLen,
+    OUT BOOLEAN *bRequestRssi);
+
+/*======================================== */
+
+VOID SyncStateMachineInit(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  STATE_MACHINE *Sm, 
+	OUT STATE_MACHINE_FUNC Trans[]);
+
+VOID BeaconTimeout(
+	IN PVOID SystemSpecific1, 
+	IN PVOID FunctionContext, 
+	IN PVOID SystemSpecific2, 
+	IN PVOID SystemSpecific3);
+
+VOID ScanTimeout(
+	IN PVOID SystemSpecific1, 
+	IN PVOID FunctionContext, 
+	IN PVOID SystemSpecific2, 
+	IN PVOID SystemSpecific3);
+
+VOID MlmeScanReqAction(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID InvalidStateWhenScan(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID InvalidStateWhenJoin(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID InvalidStateWhenStart(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID PeerBeacon(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID EnqueueProbeRequest(
+	IN PRTMP_ADAPTER pAd);
+
+BOOLEAN ScanRunning(
+		IN PRTMP_ADAPTER pAd);
+/*========================================= */
+
+VOID MlmeCntlInit(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  STATE_MACHINE *S, 
+	OUT STATE_MACHINE_FUNC Trans[]);
+
+VOID MlmeCntlMachinePerformAction(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  STATE_MACHINE *S, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID CntlIdleProc(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID CntlOidScanProc(
+	IN  PRTMP_ADAPTER pAd,
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID CntlOidSsidProc(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM * Elem);
+
+VOID CntlOidRTBssidProc(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM * Elem);
+
+VOID CntlMlmeRoamingProc(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM * Elem);
+
+VOID CntlWaitDisassocProc(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID CntlWaitJoinProc(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID CntlWaitReassocProc(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID CntlWaitStartProc(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID CntlWaitAuthProc(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID CntlWaitAuthProc2(
+	IN  PRTMP_ADAPTER pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID CntlWaitAssocProc(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+#ifdef QOS_DLS_SUPPORT
+VOID CntlOidDLSSetupProc(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem);
+#endif /* QOS_DLS_SUPPORT */
+
+
+VOID LinkUp(
+	IN  PRTMP_ADAPTER   pAd,
+	IN  UCHAR BssType);
+
+VOID LinkDown(
+	IN  PRTMP_ADAPTER   pAd,
+	IN  BOOLEAN         IsReqFromAP);
+
+VOID IterateOnBssTab(
+	IN  PRTMP_ADAPTER   pAd);
+
+VOID IterateOnBssTab2(
+	IN  PRTMP_ADAPTER   pAd);;
+
+VOID JoinParmFill(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  OUT MLME_JOIN_REQ_STRUCT *JoinReq, 
+	IN  ULONG BssIdx);
+
+VOID AssocParmFill(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN OUT MLME_ASSOC_REQ_STRUCT *AssocReq, 
+	IN  PUCHAR pAddr, 
+	IN  USHORT CapabilityInfo, 
+	IN  ULONG Timeout, 
+	IN  USHORT ListenIntv);
+
+VOID ScanParmFill(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  OUT MLME_SCAN_REQ_STRUCT *ScanReq, 
+	IN  STRING Ssid[], 
+	IN  UCHAR SsidLen, 
+	IN  UCHAR BssType, 
+	IN  UCHAR ScanType); 
+
+VOID DisassocParmFill(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  OUT MLME_DISASSOC_REQ_STRUCT *DisassocReq, 
+	IN  PUCHAR pAddr, 
+	IN  USHORT Reason);
+
+VOID StartParmFill(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  OUT MLME_START_REQ_STRUCT *StartReq, 
+	IN  CHAR Ssid[], 
+	IN  UCHAR SsidLen);
+
+VOID AuthParmFill(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  OUT MLME_AUTH_REQ_STRUCT *AuthReq, 
+	IN  PUCHAR pAddr, 
+	IN  USHORT Alg);
+
+VOID EnqueuePsPoll(
+	IN  PRTMP_ADAPTER   pAd);
+
+VOID EnqueueBeaconFrame(
+	IN  PRTMP_ADAPTER   pAd); 
+
+VOID MlmeJoinReqAction(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID MlmeScanReqAction(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID MlmeStartReqAction(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID ScanTimeoutAction(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID BeaconTimeoutAtJoinAction(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID PeerBeaconAtScanAction(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID PeerBeaconAtJoinAction(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID PeerBeacon(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID PeerProbeReqAction(
+	IN  PRTMP_ADAPTER pAd, 
+	IN  MLME_QUEUE_ELEM *Elem);
+
+VOID ScanNextChannel(
+	IN  PRTMP_ADAPTER   pAd,
+	IN	UCHAR	OpMode);
+
+
+ULONG MakeIbssBeacon(
+	IN  PRTMP_ADAPTER   pAd);
+
+#ifdef CONFIG_STA_SUPPORT
+VOID InitChannelRelatedValue(
+	IN  PRTMP_ADAPTER   pAd);
+#endif /* CONFIG_STA_SUPPORT */
+
+BOOLEAN MlmeScanReqSanity(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  VOID *Msg, 
+	IN  ULONG MsgLen, 
+	OUT UCHAR *BssType, 
+	OUT CHAR ssid[], 
+	OUT UCHAR *SsidLen, 
+	OUT UCHAR *ScanType);
+
+BOOLEAN PeerBeaconAndProbeRspSanity(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  VOID *Msg, 
+	IN  ULONG MsgLen, 
+	IN  UCHAR MsgChannel,
+	OUT PUCHAR pAddr2, 
+	OUT PUCHAR pBssid, 
+	OUT CHAR Ssid[], 
+	OUT UCHAR *pSsidLen, 
+	OUT UCHAR *pBssType, 
+	OUT USHORT *pBeaconPeriod, 
+	OUT UCHAR *pChannel, 
+	OUT UCHAR *pNewChannel, 
+	OUT LARGE_INTEGER *pTimestamp, 
+	OUT CF_PARM *pCfParm, 
+	OUT USHORT *pAtimWin, 
+	OUT USHORT *pCapabilityInfo, 
+	OUT UCHAR *pErp,
+	OUT UCHAR *pDtimCount, 
+	OUT UCHAR *pDtimPeriod, 
+	OUT UCHAR *pBcastFlag, 
+	OUT UCHAR *pMessageToMe, 
+	OUT UCHAR SupRate[],
+	OUT UCHAR *pSupRateLen,
+	OUT UCHAR ExtRate[],
+	OUT UCHAR *pExtRateLen,
+	OUT	UCHAR *pCkipFlag,
+	OUT	UCHAR *pAironetCellPowerLimit,
+	OUT PEDCA_PARM       pEdcaParm,
+	OUT PQBSS_LOAD_PARM  pQbssLoad,
+	OUT PQOS_CAPABILITY_PARM pQosCapability,
+	OUT ULONG *pRalinkIe,
+	OUT UCHAR		 *pHtCapabilityLen,
+#ifdef CONFIG_STA_SUPPORT
+	OUT UCHAR		 *pPreNHtCapabilityLen,
+#endif /* CONFIG_STA_SUPPORT */
+	OUT HT_CAPABILITY_IE *pHtCapability,
+	OUT EXT_CAP_INFO_ELEMENT *pExtCapInfo,
+	OUT UCHAR		 *AddHtInfoLen,
+	OUT ADD_HT_INFO_IE *AddHtInfo,
+	OUT UCHAR *NewExtChannel,
+	OUT USHORT *LengthVIE,
+	OUT PNDIS_802_11_VARIABLE_IEs pVIE);
+
+
+#ifdef DOT11_N_SUPPORT
+#ifdef DOT11N_DRAFT3
+BOOLEAN PeerBeaconAndProbeRspSanity2(
+	IN PRTMP_ADAPTER pAd, 
+	IN VOID *Msg, 
+	IN ULONG MsgLen, 
+	IN OVERLAP_BSS_SCAN_IE *BssScan,
+	OUT UCHAR 	*RegClass);
+#endif /* DOT11N_DRAFT3 */
+#endif /* DOT11_N_SUPPORT */
+
+BOOLEAN PeerAddBAReqActionSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN VOID *pMsg, 
+    IN ULONG MsgLen,
+	OUT PUCHAR pAddr2);
+
+BOOLEAN PeerAddBARspActionSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN VOID *pMsg, 
+    IN ULONG MsgLen);
+
+BOOLEAN PeerDelBAActionSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN UCHAR Wcid, 
+    IN VOID *pMsg, 
+    IN ULONG MsgLen);
+
+BOOLEAN MlmeAssocReqSanity(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  VOID *Msg, 
+	IN  ULONG MsgLen, 
+	OUT PUCHAR pApAddr, 
+	OUT USHORT *CapabilityInfo, 
+	OUT ULONG *Timeout, 
+	OUT USHORT *ListenIntv);
+
+BOOLEAN MlmeAuthReqSanity(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  VOID *Msg, 
+	IN  ULONG MsgLen, 
+	OUT PUCHAR pAddr, 
+	OUT ULONG *Timeout, 
+	OUT USHORT *Alg);
+
+BOOLEAN MlmeStartReqSanity(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  VOID *Msg, 
+	IN  ULONG MsgLen, 
+	OUT CHAR Ssid[], 
+	OUT UCHAR *Ssidlen);
+
+BOOLEAN PeerAuthSanity(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  VOID *Msg, 
+	IN  ULONG MsgLen, 
+	OUT PUCHAR pAddr, 
+	OUT USHORT *Alg, 
+	OUT USHORT *Seq, 
+	OUT USHORT *Status, 
+	OUT CHAR ChlgText[]);
+
+BOOLEAN PeerAssocRspSanity(
+	IN  PRTMP_ADAPTER   pAd, 
+    IN VOID *pMsg, 
+	IN  ULONG MsgLen, 
+	OUT PUCHAR pAddr2, 
+	OUT USHORT *pCapabilityInfo, 
+	OUT USHORT *pStatus, 
+	OUT USHORT *pAid, 
+	OUT UCHAR SupRate[], 
+	OUT UCHAR *pSupRateLen,
+	OUT UCHAR ExtRate[],
+	OUT UCHAR *pExtRateLen,
+    OUT HT_CAPABILITY_IE		*pHtCapability,
+    OUT ADD_HT_INFO_IE		*pAddHtInfo,	/* AP might use this additional ht info IE */
+    OUT UCHAR			*pHtCapabilityLen,
+    OUT UCHAR			*pAddHtInfoLen,
+    OUT UCHAR			*pNewExtChannelOffset,
+	OUT PEDCA_PARM pEdcaParm,
+	OUT EXT_CAP_INFO_ELEMENT *pExtCapInfo,
+	OUT UCHAR *pCkipFlag);
+
+BOOLEAN PeerDisassocSanity(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  VOID *Msg, 
+	IN  ULONG MsgLen, 
+	OUT PUCHAR pAddr2, 
+	OUT USHORT *Reason);
+
+BOOLEAN PeerDeauthSanity(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  VOID *Msg, 
+	IN  ULONG MsgLen, 
+	OUT PUCHAR pAddr1,
+	OUT PUCHAR pAddr2, 
+	OUT PUCHAR pAddr3, 
+	OUT USHORT *Reason);
+
+BOOLEAN GetTimBit(
+	IN  CHAR *Ptr, 
+	IN  USHORT Aid, 
+	OUT UCHAR *TimLen, 
+	OUT UCHAR *BcastFlag, 
+	OUT UCHAR *DtimCount, 
+	OUT UCHAR *DtimPeriod, 
+	OUT UCHAR *MessageToMe);
+
+UCHAR ChannelSanity(
+	IN PRTMP_ADAPTER pAd, 
+	IN UCHAR channel);
+
+NDIS_802_11_NETWORK_TYPE NetworkTypeInUseSanity(
+	IN PBSS_ENTRY pBss);
+
+BOOLEAN MlmeDelBAReqSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN VOID *Msg, 
+    IN ULONG MsgLen);
+
+BOOLEAN MlmeAddBAReqSanity(
+    IN PRTMP_ADAPTER pAd, 
+    IN VOID *Msg, 
+    IN ULONG MsgLen, 
+    OUT PUCHAR pAddr2);
+
+ULONG MakeOutgoingFrame(
+	OUT UCHAR *Buffer, 
+	OUT ULONG *Length, ...);
+
+UCHAR RandomByte(
+	IN  PRTMP_ADAPTER   pAd);
+
+UCHAR RandomByte2(
+	IN  PRTMP_ADAPTER   pAd);
+
+VOID AsicUpdateAutoFallBackTable(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PUCHAR			pTxRate);
+
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+	
+VOID AsicCheckForHwRecovery(
+	IN PRTMP_ADAPTER	pAd) ;
+#endif // defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) //
+
+
+VOID  MlmePeriodicExec(
+	IN PVOID SystemSpecific1, 
+	IN PVOID FunctionContext, 
+	IN PVOID SystemSpecific2, 
+	IN PVOID SystemSpecific3);
+
+VOID LinkDownExec(
+	IN PVOID SystemSpecific1, 
+	IN PVOID FunctionContext, 
+	IN PVOID SystemSpecific2, 
+	IN PVOID SystemSpecific3);
+
+VOID LinkUpExec(
+	IN PVOID SystemSpecific1, 
+	IN PVOID FunctionContext, 
+	IN PVOID SystemSpecific2, 
+	IN PVOID SystemSpecific3);
+
+VOID STAMlmePeriodicExec(
+	PRTMP_ADAPTER pAd);
+
+VOID MlmeAutoScan(
+	IN PRTMP_ADAPTER pAd);
+
+VOID MlmeAutoReconnectLastSSID(
+	IN PRTMP_ADAPTER pAd);
+
+BOOLEAN MlmeValidateSSID(
+	IN PUCHAR pSsid,
+	IN UCHAR  SsidLen); 
+
+VOID MlmeCheckForRoaming(
+	IN PRTMP_ADAPTER pAd,
+	IN ULONG    Now32);
+
+BOOLEAN MlmeCheckForFastRoaming(
+	IN  PRTMP_ADAPTER   pAd);
+
+VOID MlmeDynamicTxRateSwitching(
+	IN PRTMP_ADAPTER pAd);
+
+#ifdef NEW_RATE_ADAPT_SUPPORT
+VOID MlmeDynamicTxRateSwitchingAdapt(
+	IN PRTMP_ADAPTER pAd,
+	IN ULONG i);
+#endif /* NEW_RATE_ADAPT_SUPPORT */
+
+VOID MlmeSelectRateSwitchTable11N3SReplacement(
+	IN PUCHAR	*ppTable);
+
+#ifdef AGS_SUPPORT
+INT Show_AGS_Proc(
+    IN  PRTMP_ADAPTER	pAd, 
+    IN  PSTRING			arg);
+
+/* */
+/* The dynamic Tx rate switching for AGS (Adaptive Group Switching) */
+/* */
+/* Parameters */
+/*	pAd: The adapter data structure */
+/*	pEntry: Pointer to a caller-supplied variable in which points to a MAC table entry */
+/*	pTable: Pointer to a caller-supplied variable in wich points to a Tx rate switching table */
+/*	TableSize: The size, in bytes, of the specified Tx rate switching table */
+/*	pAGSStatisticsInfo: Pointer to a caller-supplied variable in which points to the statistics information */
+/* */
+/* Return Value: */
+/*	None */
+/* */
+VOID MlmeDynamicTxRateSwitchingAGS(
+	IN PRTMP_ADAPTER pAd, 
+	IN PMAC_TABLE_ENTRY pEntry, 
+	IN PUCHAR pTable, 
+	IN UCHAR TableSize, 
+	IN PAGS_STATISTICS_INFO pAGSStatisticsInfo,
+	IN UCHAR InitTxRateIdx);
+
+/* */
+/* Auto Tx rate faster train up/down for AGS (Adaptive Group Switching) */
+/* */
+/* Parameters */
+/*	pAd: The adapter data structure */
+/*	pEntry: Pointer to a caller-supplied variable in which points to a MAC table entry */
+/*	pTable: Pointer to a caller-supplied variable in wich points to a Tx rate switching table */
+/*	TableSize: The size, in bytes, of the specified Tx rate switching table */
+/*	pAGSStatisticsInfo: Pointer to a caller-supplied variable in which points to the statistics information */
+/* */
+/* Return Value: */
+/*	None */
+/* */
+VOID StaQuickResponeForRateUpExecAGS(
+	IN PRTMP_ADAPTER pAd, 
+	IN PMAC_TABLE_ENTRY pEntry, 
+	IN PUCHAR pTable, 
+	IN UCHAR TableSize, 
+	IN PAGS_STATISTICS_INFO pAGSStatisticsInfo,
+	IN UCHAR InitTxRateIdx);
+#endif /* AGS_SUPPORT */
+
+VOID MlmeSetTxRate(
+	IN PRTMP_ADAPTER		pAd,
+	IN PMAC_TABLE_ENTRY		pEntry,
+	IN PRTMP_TX_RATE_SWITCH	pTxRate);
+
+VOID MlmeSelectTxRateTable(
+	IN PRTMP_ADAPTER		pAd,
+	IN PMAC_TABLE_ENTRY		pEntry,
+	IN PUCHAR				*ppTable,
+	IN PUCHAR				pTableSize,
+	IN PUCHAR				pInitTxRateIdx);
+
+VOID MlmeCalculateChannelQuality(
+	IN PRTMP_ADAPTER pAd,
+	IN PMAC_TABLE_ENTRY pMacEntry,
+	IN ULONG Now);
+
+VOID MlmeCheckPsmChange(
+	IN PRTMP_ADAPTER pAd,
+	IN ULONG    Now32);
+
+VOID MlmeSetPsmBit(
+	IN PRTMP_ADAPTER pAd, 
+	IN USHORT psm);
+
+VOID MlmeSetTxPreamble(
+	IN PRTMP_ADAPTER pAd, 
+	IN USHORT TxPreamble);
+
+VOID UpdateBasicRateBitmap(
+	IN	PRTMP_ADAPTER	pAd);
+
+VOID MlmeUpdateTxRates(
+	IN PRTMP_ADAPTER 	pAd,
+	IN 	BOOLEAN		 	bLinkUp,
+	IN	UCHAR			apidx);
+
+#ifdef DOT11_N_SUPPORT
+VOID MlmeUpdateHtTxRates(
+	IN PRTMP_ADAPTER 		pAd,
+	IN	UCHAR				apidx);
+#endif /* DOT11_N_SUPPORT */
+
+VOID    RTMPCheckRates(
+	IN      PRTMP_ADAPTER   pAd,
+	IN OUT  UCHAR           SupRate[],
+	IN OUT  UCHAR           *SupRateLen);
+
+#ifdef CONFIG_STA_SUPPORT
+BOOLEAN RTMPCheckChannel(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR		CentralChannel,
+	IN UCHAR		Channel);
+#endif /* CONFIG_STA_SUPPORT */
+
+BOOLEAN 	RTMPCheckHt(
+	IN		PRTMP_ADAPTER	pAd,
+	IN		UCHAR	Wcid,
+	IN OUT	HT_CAPABILITY_IE			*pHtCapability,
+	IN OUT	ADD_HT_INFO_IE			*pAddHtInfo);
+
+VOID StaQuickResponeForRateUpExec(
+	IN PVOID SystemSpecific1, 
+	IN PVOID FunctionContext, 
+	IN PVOID SystemSpecific2, 
+	IN PVOID SystemSpecific3);
+
+#ifdef NEW_RATE_ADAPT_SUPPORT
+VOID StaQuickResponeForRateUpExecAdapt(
+	IN PRTMP_ADAPTER	pAd,
+	IN ULONG i);
+#endif /* NEW_RATE_ADAPT_SUPPORT */
+
+VOID RTMPUpdateMlmeRate(
+	IN PRTMP_ADAPTER	pAd);
+
+CHAR RTMPMaxRssi(
+	IN PRTMP_ADAPTER	pAd,
+	IN CHAR				Rssi0,
+	IN CHAR				Rssi1,
+	IN CHAR				Rssi2);
+
+
+CHAR RTMPMinSnr(
+	IN PRTMP_ADAPTER	pAd,
+	IN CHAR				Snr0,
+	IN CHAR				Snr1);
+
+VOID AsicSetRxAnt(
+	IN PRTMP_ADAPTER	pAd,
+	IN UCHAR			Ant);
+
+#ifdef RT30xx
+
+VOID RTMPFilterCalibration(
+	IN PRTMP_ADAPTER pAd);
+
+#ifdef RTMP_EFUSE_SUPPORT
+/*2008/09/11:KH add to support efuse<-- */
+INT set_eFuseGetFreeBlockCount_Proc(  
+   	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg);
+
+INT set_eFusedump_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg);
+
+INT set_eFuseLoadFromBin_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg);
+
+VOID eFusePhysicalReadRegisters( 
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	USHORT Offset, 
+	IN	USHORT Length, 
+	OUT	USHORT* pData);
+
+int RtmpEfuseSupportCheck(
+	IN RTMP_ADAPTER *pAd);
+
+#ifdef RALINK_ATE
+INT set_eFuseBufferModeWriteBack_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg);
+#endif /* RALINK_ATE */
+
+INT eFuseLoadEEPROM(
+	IN PRTMP_ADAPTER pAd);
+
+INT eFuseWriteEeeppromBuf(
+	IN PRTMP_ADAPTER pAd);
+
+VOID eFuseGetFreeBlockCount(IN PRTMP_ADAPTER pAd, 
+	PUINT EfuseFreeBlock);
+
+INT eFuse_init(
+	IN PRTMP_ADAPTER pAd);
+
+NTSTATUS eFuseRead(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	USHORT			Offset,
+	OUT	PUSHORT			pData,
+	IN	USHORT			Length);
+
+NTSTATUS eFuseWrite(  
+   	IN	PRTMP_ADAPTER	pAd,
+	IN	USHORT			Offset,
+	IN	PUSHORT			pData,
+	IN	USHORT			length);
+/*2008/09/11:KH add to support efuse--> */
+#endif /* RTMP_EFUSE_SUPPORT */
+
+/* add by johnli, RF power sequence setup */
+VOID RT30xxLoadRFNormalModeSetup(
+	IN PRTMP_ADAPTER 	pAd);
+
+VOID RT30xxLoadRFSleepModeSetup(
+	IN PRTMP_ADAPTER 	pAd);
+
+VOID RT30xxReverseRFSleepModeSetup(
+	IN PRTMP_ADAPTER 	pAd,
+	IN BOOLEAN			FlgIsInitState);
+/* end johnli */
+
+#ifdef RT3070
+VOID NICInitRT3070RFRegisters(
+	IN RTMP_ADAPTER *pAd);
+#endif /* RT3070 */
+
+
+VOID RT30xxHaltAction(
+	IN PRTMP_ADAPTER 	pAd);
+
+VOID RT30xxSetRxAnt(
+	IN PRTMP_ADAPTER	pAd,
+	IN UCHAR			Ant);
+
+VOID PostBBPInitialization(
+	IN PRTMP_ADAPTER	pAd);
+#endif /* RT30xx */
+#ifdef RT33xx
+VOID RT33xxLoadRFNormalModeSetup(
+	IN PRTMP_ADAPTER 	pAd);
+
+VOID RT33xxLoadRFSleepModeSetup(
+	IN PRTMP_ADAPTER 	pAd);
+
+VOID RT33xxReverseRFSleepModeSetup(
+	IN PRTMP_ADAPTER 	pAd,
+	IN BOOLEAN			FlgIsInitState);
+
+#ifdef RT3370
+VOID NICInitRT3370RFRegisters(
+	IN RTMP_ADAPTER *pAd);
+#endif /* RT3070 */
+
+
+VOID RT33xxHaltAction(
+	IN PRTMP_ADAPTER 	pAd);
+
+VOID RT33xxSetRxAnt(
+	IN PRTMP_ADAPTER	pAd,
+	IN UCHAR			Ant);
+
+#endif /* RT33xx */
+
+
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+VOID NICInitRT5390RFRegisters(
+	IN PRTMP_ADAPTER pAd);
+
+ NTSTATUS	RT5392WriteBBPR66(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			Value);
+
+VOID RT5390SetRxAnt(
+	IN PRTMP_ADAPTER	pAd,
+	IN UCHAR			Ant);
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+
+
+VOID AsicEvaluateRxAnt(
+	IN PRTMP_ADAPTER	pAd);
+
+VOID AsicRxAntEvalTimeout(
+	IN PVOID SystemSpecific1, 
+	IN PVOID FunctionContext, 
+	IN PVOID SystemSpecific2, 
+	IN PVOID SystemSpecific3);
+
+VOID APSDPeriodicExec(
+	IN PVOID SystemSpecific1, 
+	IN PVOID FunctionContext, 
+	IN PVOID SystemSpecific2, 
+	IN PVOID SystemSpecific3);
+
+BOOLEAN RTMPCheckEntryEnableAutoRateSwitch(
+	IN PRTMP_ADAPTER    pAd,
+	IN PMAC_TABLE_ENTRY	pEntry);
+
+UCHAR RTMPStaFixedTxMode(
+	IN PRTMP_ADAPTER    pAd,
+	IN PMAC_TABLE_ENTRY	pEntry);
+
+VOID RTMPUpdateLegacyTxSetting(
+		UCHAR				fixed_tx_mode,
+		PMAC_TABLE_ENTRY	pEntry);
+
+BOOLEAN RTMPAutoRateSwitchCheck(
+	IN PRTMP_ADAPTER    pAd);
+
+NDIS_STATUS MlmeInit(
+	IN  PRTMP_ADAPTER   pAd);
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef RTMP_FREQ_CALIBRATION_SUPPORT
+/* */
+/* Initialize the frequency calibration */
+/* */
+/* Parameters */
+/*	pAd: The adapter data structure */
+/* */
+/* Return Value: */
+/*	None */
+/* */
+VOID InitFrequencyCalibration(
+	IN PRTMP_ADAPTER pAd);
+
+
+/* */
+/* To stop the frequency calibration algorithm */
+/* */
+/* Parameters */
+/*	pAd: The adapter data structure */
+/* */
+/* Return Value: */
+/*	None */
+/* */
+VOID StopFrequencyCalibration(
+	IN PRTMP_ADAPTER pAd);
+
+/* */
+/* The frequency calibration algorithm */
+/* */
+/* Parameters */
+/*	pAd: The adapter data structure */
+/* */
+/* Return Value: */
+/*	None */
+/* */
+VOID FrequencyCalibration(
+	IN PRTMP_ADAPTER pAd);
+
+/* */
+/* Get the frequency offset */
+/* */
+/* Parameters */
+/*	pAd: The adapter data structure */
+/*	pRxWI: Point to the RxWI structure */
+/* */
+/* Return Value: */
+/*	The frequency offset */
+/* */
+CHAR GetFrequencyOffset(
+	IN PRTMP_ADAPTER pAd, 
+	IN PRXWI_STRUC pRxWI);
+#endif /* RTMP_FREQ_CALIBRATION_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+
+
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)	
+#ifdef RTMP_INTERNAL_TX_ALC	
+
+BOOLEAN GetDesiredTssiAndCurrentTssi(
+	IN PRTMP_ADAPTER pAd, 
+	IN OUT PCHAR pDesiredTssi, 
+	IN OUT PCHAR pCurrentTssi);
+
+#endif /* RTMP_INTERNAL_TX_ALC */
+#ifdef RTMP_TEMPERATURE_COMPENSATION
+VOID InitLookupTable(
+	IN PRTMP_ADAPTER pAd);
+#endif /* RTMP_TEMPERATURE_COMPENSATION */
+
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+
+VOID MlmeHandler(
+	IN  PRTMP_ADAPTER   pAd);
+
+VOID MlmeHalt(
+	IN  PRTMP_ADAPTER   pAd);
+
+VOID MlmeResetRalinkCounters(
+	IN  PRTMP_ADAPTER   pAd);
+
+VOID BuildChannelList(
+	IN PRTMP_ADAPTER pAd);
+
+UCHAR FirstChannel(
+	IN  PRTMP_ADAPTER   pAd);
+
+UCHAR NextChannel(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  UCHAR channel);
+
+VOID ChangeToCellPowerLimit(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR         AironetCellPowerLimit);
+
+/* */
+/* Prototypes of function definition in cmm_tkip.c */
+/* */
+VOID    RTMPInitMICEngine(
+	IN  PRTMP_ADAPTER   pAd,    
+	IN  PUCHAR          pKey,
+	IN  PUCHAR          pDA,
+	IN  PUCHAR          pSA,
+	IN  UCHAR           UserPriority,
+	IN  PUCHAR          pMICKey);
+
+BOOLEAN RTMPTkipCompareMICValue(
+	IN  PRTMP_ADAPTER   pAd,
+	IN  PUCHAR          pSrc,
+	IN  PUCHAR          pDA,
+	IN  PUCHAR          pSA,
+	IN  PUCHAR          pMICKey,
+	IN	UCHAR			UserPriority,
+	IN  UINT            Len);
+
+VOID    RTMPCalculateMICValue(
+	IN  PRTMP_ADAPTER   pAd,
+	IN  PNDIS_PACKET    pPacket,
+	IN  PUCHAR          pEncap,
+	IN  PCIPHER_KEY     pKey,
+	IN	UCHAR			apidx);
+
+VOID    RTMPTkipAppendByte( 
+	IN  PTKIP_KEY_INFO  pTkip,  
+	IN  UCHAR           uChar);
+
+VOID    RTMPTkipAppend( 
+	IN  PTKIP_KEY_INFO  pTkip,  
+	IN  PUCHAR          pSrc,
+	IN  UINT            nBytes);
+
+VOID    RTMPTkipGetMIC( 
+	IN  PTKIP_KEY_INFO  pTkip);
+
+/* */
+/* Prototypes of function definition in cmm_cfg.c */
+/* */
+INT RT_CfgSetCountryRegion(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg,
+	IN INT				band);
+
+INT RT_CfgSetWirelessMode(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+
+INT RT_CfgSetShortSlot(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	RT_CfgSetWepKey(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			keyString,
+	IN	CIPHER_KEY		*pSharedKey,
+	IN	INT				keyIdx);
+
+INT RT_CfgSetWPAPSKKey(
+	IN RTMP_ADAPTER	*pAd, 
+	IN PSTRING		keyString,
+	IN UCHAR		*pHashStr,
+	IN INT			hashStrLen,
+	OUT PUCHAR		pPMKBuf);
+
+INT	RT_CfgSetFixedTxPhyMode(
+	IN	PSTRING			arg);
+
+INT	RT_CfgSetMacAddress(
+	IN 	PRTMP_ADAPTER 	pAd,
+	IN	PSTRING			arg);
+
+INT	RT_CfgSetTxMCSProc(
+	IN	PSTRING			arg,
+	OUT	BOOLEAN			*pAutoRate);
+
+INT	RT_CfgSetAutoFallBack(
+	IN 	PRTMP_ADAPTER 	pAd,
+	IN	PSTRING			arg);
+
+
+
+/* */
+/* Prototypes of function definition in cmm_info.c */
+/* */
+NDIS_STATUS RTMPWPARemoveKeyProc(
+	IN  PRTMP_ADAPTER   pAd,
+	IN  PVOID           pBuf);
+
+VOID    RTMPWPARemoveAllKeys(
+	IN  PRTMP_ADAPTER   pAd);
+
+BOOLEAN RTMPCheckStrPrintAble(
+    IN  CHAR *pInPutStr, 
+    IN  UCHAR strLen);
+    
+VOID    RTMPSetPhyMode(
+	IN  PRTMP_ADAPTER   pAd,
+	IN  ULONG phymode);
+
+VOID	RTMPUpdateHTIE(
+	IN	RT_HT_CAPABILITY	*pRtHt,
+	IN		UCHAR				*pMcsSet,
+	OUT		HT_CAPABILITY_IE *pHtCapability,
+	OUT		ADD_HT_INFO_IE		*pAddHtInfo);
+
+VOID	RTMPAddWcidAttributeEntry(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			BssIdx,
+	IN 	UCHAR		 	KeyIdx,
+	IN 	UCHAR		 	CipherAlg,
+	IN 	MAC_TABLE_ENTRY *pEntry);
+
+PSTRING GetEncryptType(
+	CHAR enc);
+
+PSTRING GetAuthMode(
+	CHAR auth);
+
+#ifdef DOT11_N_SUPPORT
+VOID	RTMPSetHT(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	OID_SET_HT_PHYMODE *pHTPhyMode);
+
+VOID	RTMPSetIndividualHT(
+	IN	PRTMP_ADAPTER		pAd,
+	IN	UCHAR				apidx);
+#endif /* DOT11_N_SUPPORT */
+
+#ifdef SYSTEM_LOG_SUPPORT
+VOID RtmpDrvSendWirelessEvent(
+	IN	VOID			*pAdSrc,
+	IN	USHORT			Event_flag,
+	IN	PUCHAR 			pAddr,
+	IN  UCHAR			BssIdx,
+	IN	CHAR			Rssi);
+#else
+#define RtmpDrvSendWirelessEvent(_pAd, _Event_flag, _pAddr, _BssIdx, _Rssi)
+#endif /* SYSTEM_LOG_SUPPORT */
+	
+CHAR    ConvertToRssi(
+	IN PRTMP_ADAPTER  pAd,
+	IN CHAR				Rssi,
+	IN UCHAR    RssiNumber);
+
+CHAR    ConvertToSnr(
+	IN PRTMP_ADAPTER  pAd,
+	IN UCHAR				Snr);
+
+#ifdef DOT11N_DRAFT3
+VOID BuildEffectedChannelList(
+	IN PRTMP_ADAPTER pAd);
+
+
+VOID DeleteEffectedChannelList(
+	IN PRTMP_ADAPTER pAd);
+
+VOID CntlChannelWidth(
+	IN PRTMP_ADAPTER	pAd,
+	IN UCHAR			PrimaryChannel,
+	IN UCHAR			CentralChannel,	
+	IN UCHAR			ChannelWidth,
+	IN UCHAR			SecondaryChannelOffset);
+
+#endif /* DOT11N_DRAFT3 */
+
+
+VOID APAsicEvaluateRxAnt(
+	IN PRTMP_ADAPTER	pAd);
+
+#ifdef ANT_DIVERSITY_SUPPORT
+VOID	APAsicAntennaAvg(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR	              AntSelect,
+	IN	SHORT	              *RssiAvg);
+#endif /* ANT_DIVERSITY_SUPPORT */
+
+VOID APAsicRxAntEvalTimeout(
+	IN PRTMP_ADAPTER	pAd);
+
+
+/* */
+/* function prototype in ap_wpa.c */
+/* */
+VOID RTMPGetTxTscFromAsic(
+	IN  PRTMP_ADAPTER   pAd,
+	IN	UCHAR			apidx,
+	OUT	PUCHAR			pTxTsc);
+
+MAC_TABLE_ENTRY *PACInquiry(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  ULONG           Wcid);
+
+UINT	APValidateRSNIE(
+	IN PRTMP_ADAPTER    pAd,
+	IN PMAC_TABLE_ENTRY pEntry,
+	IN PUCHAR			pRsnIe,
+	IN UCHAR			rsnie_len);
+
+VOID HandleCounterMeasure(
+	IN PRTMP_ADAPTER pAd, 
+	IN MAC_TABLE_ENTRY  *pEntry);
+
+VOID WPAStart4WayHS(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MAC_TABLE_ENTRY *pEntry,
+	IN	ULONG			TimeInterval);
+
+VOID WPAStart2WayGroupHS(
+	IN  PRTMP_ADAPTER   pAd, 
+	IN  MAC_TABLE_ENTRY *pEntry);
+
+VOID PeerPairMsg1Action(
+	IN PRTMP_ADAPTER pAd, 
+	IN MAC_TABLE_ENTRY  *pEntry,
+	IN MLME_QUEUE_ELEM *Elem);
+
+VOID PeerPairMsg2Action(
+	IN PRTMP_ADAPTER pAd, 
+	IN MAC_TABLE_ENTRY  *pEntry,
+	IN MLME_QUEUE_ELEM *Elem);
+
+VOID PeerPairMsg3Action(
+	IN PRTMP_ADAPTER pAd, 
+	IN MAC_TABLE_ENTRY  *pEntry,
+	IN MLME_QUEUE_ELEM *Elem);
+
+VOID PeerPairMsg4Action(
+	IN PRTMP_ADAPTER pAd, 
+	IN MAC_TABLE_ENTRY  *pEntry,
+	IN MLME_QUEUE_ELEM *Elem);
+
+VOID PeerGroupMsg1Action(
+	IN  PRTMP_ADAPTER    pAd, 
+	IN  PMAC_TABLE_ENTRY pEntry,
+    IN  MLME_QUEUE_ELEM  *Elem);
+
+VOID PeerGroupMsg2Action(
+	IN  PRTMP_ADAPTER    pAd, 
+	IN  PMAC_TABLE_ENTRY pEntry,
+	IN  VOID             *Msg,
+	IN  UINT             MsgLen);
+
+VOID CMTimerExec(
+	IN PVOID SystemSpecific1, 
+	IN PVOID FunctionContext, 
+	IN PVOID SystemSpecific2, 
+	IN PVOID SystemSpecific3);
+
+VOID WPARetryExec(
+	IN PVOID SystemSpecific1, 
+	IN PVOID FunctionContext, 
+	IN PVOID SystemSpecific2, 
+	IN PVOID SystemSpecific3);
+
+
+VOID EnqueueStartForPSKExec(
+    IN PVOID SystemSpecific1, 
+    IN PVOID FunctionContext, 
+    IN PVOID SystemSpecific2, 
+    IN PVOID SystemSpecific3); 
+
+VOID RTMPHandleSTAKey(
+    IN PRTMP_ADAPTER    pAdapter, 
+    IN MAC_TABLE_ENTRY  *pEntry,
+    IN MLME_QUEUE_ELEM  *Elem);
+
+VOID MlmeDeAuthAction(
+	IN  PRTMP_ADAPTER    pAd, 
+	IN  PMAC_TABLE_ENTRY pEntry,
+	IN  USHORT           Reason,
+	IN  BOOLEAN          bDataFrameFirst);
+
+VOID GREKEYPeriodicExec(
+	IN  PVOID   SystemSpecific1, 
+	IN  PVOID   FunctionContext, 
+	IN  PVOID   SystemSpecific2, 
+	IN  PVOID   SystemSpecific3);
+
+VOID AES_128_CMAC(
+	IN	PUCHAR	key,
+	IN	PUCHAR	input,
+	IN	INT		len,
+	OUT	PUCHAR	mac);
+
+#ifdef DOT1X_SUPPORT
+VOID    WpaSend(
+    IN  PRTMP_ADAPTER   pAdapter,
+    IN  PUCHAR          pPacket,
+    IN  ULONG           Len);
+
+VOID RTMPAddPMKIDCache(
+	IN  PRTMP_ADAPTER   		pAd,
+	IN	INT						apidx,
+	IN	PUCHAR				pAddr,
+	IN	UCHAR					*PMKID,
+	IN	UCHAR					*PMK);
+
+INT RTMPSearchPMKIDCache(
+	IN  PRTMP_ADAPTER   pAd,
+	IN	INT				apidx,
+	IN	PUCHAR		pAddr);
+
+VOID RTMPDeletePMKIDCache(
+	IN  PRTMP_ADAPTER   pAd,
+	IN	INT				apidx,
+	IN  INT				idx);
+
+VOID RTMPMaintainPMKIDCache(
+	IN  PRTMP_ADAPTER   pAd);
+#else
+#define RTMPMaintainPMKIDCache(_pAd)
+#endif /* DOT1X_SUPPORT */
+
+/* timeout -- ms */
+
+#ifdef RESOURCE_PRE_ALLOC
+VOID RTMPResetTxRxRingMemory(
+	IN  RTMP_ADAPTER   *pAd);
+#endif /* RESOURCE_PRE_ALLOC */
+
+VOID RTMPFreeTxRxRingMemory(
+    IN  PRTMP_ADAPTER   pAd);
+
+
+BOOLEAN RTMP_FillTxBlkInfo(
+	IN RTMP_ADAPTER *pAd,
+	IN TX_BLK *pTxBlk);
+
+
+
+
+ void announce_802_3_packet(
+	IN	VOID			*pAdSrc,
+	IN	PNDIS_PACKET	pPacket,
+	IN	UCHAR			OpMode);
+
+#ifdef DOT11_N_SUPPORT
+UINT BA_Reorder_AMSDU_Annnounce(
+	IN	PRTMP_ADAPTER	pAd, 	
+	IN	PNDIS_PACKET	pPacket,
+	IN	UCHAR			OpMode);
+#endif /* DOT11_N_SUPPORT */
+
+PNET_DEV get_netdev_from_bssid(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			FromWhichBSSID);
+
+
+
+#ifdef DOT11_N_SUPPORT
+void ba_flush_reordering_timeout_mpdus(
+	IN PRTMP_ADAPTER	pAd, 
+	IN PBA_REC_ENTRY	pBAEntry,
+	IN ULONG			Now32);
+
+
+VOID BAOriSessionSetUp(
+			IN PRTMP_ADAPTER    pAd, 
+			IN MAC_TABLE_ENTRY	*pEntry,
+			IN UCHAR			TID,
+			IN USHORT			TimeOut,
+			IN ULONG			DelayTime,
+			IN BOOLEAN		isForced);
+
+VOID BASessionTearDownALL(
+	IN OUT	PRTMP_ADAPTER pAd, 
+	IN		UCHAR Wcid);
+
+VOID BAOriSessionTearDown(
+	IN OUT	PRTMP_ADAPTER	pAd, 
+	IN		UCHAR			Wcid,
+	IN		UCHAR			TID,
+	IN		BOOLEAN			bPassive,
+	IN		BOOLEAN			bForceSend);
+
+VOID BARecSessionTearDown(
+	IN OUT	PRTMP_ADAPTER	pAd, 
+	IN		UCHAR			Wcid,
+	IN		UCHAR			TID,
+	IN		BOOLEAN			bPassive);
+#endif /* DOT11_N_SUPPORT */
+
+BOOLEAN ba_reordering_resource_init(PRTMP_ADAPTER pAd, int num);
+void ba_reordering_resource_release(PRTMP_ADAPTER pAd);
+
+INT ComputeChecksum(
+	IN UINT PIN);
+
+UINT GenerateWpsPinCode(
+	IN	PRTMP_ADAPTER	pAd,
+    IN  BOOLEAN         bFromApcli,
+	IN	UCHAR	apidx);
+
+
+
+
+#ifdef NINTENDO_AP
+VOID	InitNINTENDO_TABLE(
+	IN PRTMP_ADAPTER pAd);
+
+UCHAR	CheckNINTENDO_TABLE(
+	IN PRTMP_ADAPTER pAd, 
+	PCHAR pDS_Ssid, 
+	UCHAR DS_SsidLen, 
+	PUCHAR pDS_Addr);
+
+UCHAR	DelNINTENDO_ENTRY(
+	IN	PRTMP_ADAPTER pAd,
+	UCHAR * pDS_Addr);
+
+VOID	RTMPIoctlNintendoCapable(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	RTMP_IOCTL_INPUT_STRUCT			*wrq);
+
+VOID	RTMPIoctlNintendoGetTable(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	RTMP_IOCTL_INPUT_STRUCT			*wrq);
+
+VOID	RTMPIoctlNintendoSetTable(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	RTMP_IOCTL_INPUT_STRUCT			*wrq);
+
+#endif /* NINTENDO_AP */
+
+BOOLEAN rtstrmactohex(
+	IN PSTRING s1,
+	IN PSTRING s2);
+
+BOOLEAN rtstrcasecmp(
+	IN PSTRING s1,
+	IN PSTRING s2);
+
+PSTRING rtstrstruncasecmp(
+	IN PSTRING s1,
+	IN PSTRING s2);
+
+PSTRING rtstrstr(
+	IN	const PSTRING s1,
+	IN	const PSTRING s2);
+
+PSTRING rstrtok(
+	IN PSTRING s,
+	IN const PSTRING ct);
+	
+int rtinet_aton(
+	const PSTRING cp, 
+	unsigned int *addr);
+	
+/*//////// common ioctl functions ////////*/
+INT Set_DriverVersion_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT Set_CountryRegion_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT Set_CountryRegionABand_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT Set_WirelessMode_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT Set_MBSS_WirelessMode_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT Set_Channel_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_ShortSlot_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg);
+
+INT	Set_TxPower_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg);
+
+INT Set_BGProtection_Proc(
+	IN  PRTMP_ADAPTER		pAd, 
+	IN  PSTRING			arg);
+
+INT Set_TxPreamble_Proc(
+	IN  PRTMP_ADAPTER		pAd,
+	IN  PSTRING			arg);
+
+INT Set_RTSThreshold_Proc(
+	IN  PRTMP_ADAPTER		pAd,
+	IN  PSTRING			arg);
+
+INT Set_FragThreshold_Proc(
+	IN  PRTMP_ADAPTER		pAd,
+	IN  PSTRING			arg);
+
+INT Set_TxBurst_Proc(
+	IN  PRTMP_ADAPTER		pAd,
+	IN  PSTRING			arg);
+
+
+#ifdef AGGREGATION_SUPPORT
+INT	Set_PktAggregate_Proc(
+	IN  PRTMP_ADAPTER		pAd,
+	IN  PSTRING			arg);
+#endif /* AGGREGATION_SUPPORT */
+
+#ifdef INF_PPA_SUPPORT
+INT	Set_INF_AMAZON_SE_PPA_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PUCHAR			arg);
+
+INT ifx_ra_start_xmit (
+	IN	struct net_device *rx_dev, 
+	IN	struct net_device *tx_dev,
+	IN	struct sk_buff *skb,
+	IN	int len);
+#endif /* INF_PPA_SUPPORT */
+
+INT	Set_IEEE80211H_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+#ifdef DBG
+INT	Set_Debug_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+#endif
+
+
+INT	Show_DescInfo_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_ResetStatCounter_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+#ifdef DOT11_N_SUPPORT
+INT	Set_BASetup_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_BADecline_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_BAOriTearDown_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_BARecTearDown_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_HtBw_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_HtMcs_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_HtGi_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_HtOpMode_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_HtStbc_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_HtHtc_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_HtExtcha_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_HtMpduDensity_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_HtBaWinSize_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_HtRdg_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_HtLinkAdapt_Proc(																																																																																																																																																																																																																																									
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_HtAmsdu_Proc(																																																																																																																																																																																																																																																																																																																			
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+	
+INT	Set_HtAutoBa_Proc(																																																																																																																																																																																																																																																																																																																			
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+					
+INT	Set_HtProtect_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg);
+
+INT	Set_HtMimoPs_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg);
+
+#ifdef DOT11N_DRAFT3
+INT Set_HT_BssCoex_Proc(
+	IN	PRTMP_ADAPTER		pAd,
+	IN	PSTRING				pParam);
+
+INT Set_HT_BssCoexApCntThr_Proc(
+	IN	PRTMP_ADAPTER		pAd,
+	IN	PSTRING				pParam);
+#endif /* DOT11N_DRAFT3 */
+
+
+
+INT	Set_ForceShortGI_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg);
+
+INT	Set_ForceGF_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg);
+
+INT	SetCommonHT(
+	IN	PRTMP_ADAPTER	pAd);
+
+INT	Set_SendPSMPAction_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+void convert_reordering_packet_to_preAMSDU_or_802_3_packet(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	RX_BLK			*pRxBlk,
+	IN  UCHAR			FromWhichBSSID);
+
+INT	Set_HtMIMOPSmode_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+
+INT	Set_HtTxBASize_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT	Set_HtDisallowTKIP_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+#endif /* DOT11_N_SUPPORT */
+
+#ifdef APCLI_SUPPORT
+INT RTMPIoctlConnStatus(
+    IN  PRTMP_ADAPTER   pAdapter, 
+    IN  PSTRING          arg);
+
+#endif /*APCLI_SUPPORT*/
+
+
+#ifdef VCORECAL_SUPPORT
+INT	Set_VCORecalibrationThreshold_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING		arg);
+#endif /* VCORECAL_SUPPORT */
+
+
+#ifdef CONFIG_STA_SUPPORT
+/*Dls ,	kathy */
+VOID RTMPSendDLSTearDownFrame(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PUCHAR			pDA);
+
+#ifdef DOT11_N_SUPPORT
+/*Block ACK */
+VOID QueryBATABLE(
+	IN  PRTMP_ADAPTER pAd,
+	OUT PQUERYBA_TABLE pBAT);
+#endif /* DOT11_N_SUPPORT */
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+INT	    WpaCheckEapCode(
+	IN  PRTMP_ADAPTER   	pAd,
+	IN  PUCHAR				pFrame,
+	IN  USHORT				FrameLen,
+	IN  USHORT				OffSet);
+
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+
+#endif /* CONFIG_STA_SUPPORT */
+
+
+
+#ifdef DOT11_N_SUPPORT
+VOID Handle_BSS_Width_Trigger_Events(
+	IN PRTMP_ADAPTER pAd);
+
+void build_ext_channel_switch_ie(
+	IN PRTMP_ADAPTER pAd,
+	IN HT_EXT_CHANNEL_SWITCH_ANNOUNCEMENT_IE *pIE);
+#endif /* DOT11_N_SUPPORT */
+
+
+BOOLEAN APRxDoneInterruptHandle(
+	IN	PRTMP_ADAPTER	pAd);
+
+BOOLEAN STARxDoneInterruptHandle(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	BOOLEAN			argc);
+
+BOOLEAN RxDoneInterruptHandle(
+	IN	PRTMP_ADAPTER	pAd);
+
+#ifdef DOT11_N_SUPPORT
+/* AMPDU packet indication */
+VOID Indicate_AMPDU_Packet(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RX_BLK			*pRxBlk,
+	IN	UCHAR			FromWhichBSSID);
+
+/* AMSDU packet indication */
+VOID Indicate_AMSDU_Packet(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RX_BLK			*pRxBlk,
+	IN	UCHAR			FromWhichBSSID);
+
+VOID BaReOrderingBufferMaintain(
+    IN PRTMP_ADAPTER pAd);
+#endif /* DOT11_N_SUPPORT */
+
+/* Normal legacy Rx packet indication */
+VOID Indicate_Legacy_Packet(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RX_BLK			*pRxBlk,
+	IN	UCHAR			FromWhichBSSID);
+
+VOID Indicate_EAPOL_Packet(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RX_BLK			*pRxBlk,
+	IN	UCHAR			FromWhichBSSID);
+
+
+UINT deaggregate_AMSDU_announce(
+	IN	PRTMP_ADAPTER	pAd,
+	PNDIS_PACKET		pPacket,
+	IN	PUCHAR			pData,
+	IN	ULONG			DataSize,
+	IN	UCHAR			OpMode);
+
+
+
+#ifdef CONFIG_STA_SUPPORT
+/* remove LLC and get 802_3 Header */
+#define  RTMP_802_11_REMOVE_LLC_AND_CONVERT_TO_802_3(_pRxBlk, _pHeader802_3)	\
+{																				\
+	PUCHAR _pRemovedLLCSNAP = NULL, _pDA, _pSA;                                 \
+																				\
+	if (RX_BLK_TEST_FLAG(_pRxBlk, fRX_WDS) || RX_BLK_TEST_FLAG(_pRxBlk, fRX_MESH)) \
+	{                                                                           \
+		_pDA = _pRxBlk->pHeader->Addr3;                                         \
+		_pSA = (PUCHAR)_pRxBlk->pHeader + sizeof(HEADER_802_11);                \
+	}                                                                           \
+	else                                                                        \
+	{                                                                           \
+		if (RX_BLK_TEST_FLAG(_pRxBlk, fRX_INFRA))                              	\
+		{                                                                       \
+			_pDA = _pRxBlk->pHeader->Addr1;                                     \
+		if (RX_BLK_TEST_FLAG(_pRxBlk, fRX_DLS))									\
+			_pSA = _pRxBlk->pHeader->Addr2;										\
+		else																	\
+			_pSA = _pRxBlk->pHeader->Addr3;                                     \
+		}                                                                       \
+		else                                                                    \
+		{                                                                       \
+			_pDA = _pRxBlk->pHeader->Addr1;                                     \
+			_pSA = _pRxBlk->pHeader->Addr2;                                     \
+		}                                                                       \
+	}                                                                           \
+																				\
+	CONVERT_TO_802_3(_pHeader802_3, _pDA, _pSA, _pRxBlk->pData, 				\
+		_pRxBlk->DataSize, _pRemovedLLCSNAP);                                   \
+}
+#endif /* CONFIG_STA_SUPPORT */
+
+
+BOOLEAN APFowardWirelessStaToWirelessSta(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PNDIS_PACKET	pPacket,
+	IN	ULONG			FromWhichBSSID);
+
+VOID Announce_or_Forward_802_3_Packet(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PNDIS_PACKET	pPacket,
+	IN	UCHAR			FromWhichBSSID);
+
+VOID Sta_Announce_or_Forward_802_3_Packet(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PNDIS_PACKET	pPacket,
+	IN	UCHAR			FromWhichBSSID);
+
+
+#ifdef CONFIG_STA_SUPPORT
+#define ANNOUNCE_OR_FORWARD_802_3_PACKET(_pAd, _pPacket, _FromWhichBSS)\
+			Sta_Announce_or_Forward_802_3_Packet(_pAd, _pPacket, _FromWhichBSS);
+			/*announce_802_3_packet(_pAd, _pPacket); */
+#endif /* CONFIG_STA_SUPPORT */
+
+
+
+
+/* Normal, AMPDU or AMSDU */
+VOID CmmRxnonRalinkFrameIndicate(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RX_BLK			*pRxBlk,
+	IN	UCHAR			FromWhichBSSID);
+
+VOID CmmRxRalinkFrameIndicate(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	MAC_TABLE_ENTRY	*pEntry,
+	IN	RX_BLK			*pRxBlk,
+	IN	UCHAR			FromWhichBSSID);
+
+VOID Update_Rssi_Sample(
+	IN PRTMP_ADAPTER	pAd,
+	IN RSSI_SAMPLE		*pRssi,
+	IN PRXWI_STRUC		pRxWI);
+
+PNDIS_PACKET GetPacketFromRxRing(
+	IN		PRTMP_ADAPTER	pAd,
+	OUT		PRT28XX_RXD_STRUC		pSaveRxD,
+	OUT		BOOLEAN			*pbReschedule,
+	IN OUT	UINT32			*pRxPending);
+
+PNDIS_PACKET RTMPDeFragmentDataFrame(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RX_BLK			*pRxBlk);
+
+/*////////////////////////////////////*/
+
+#if defined (AP_SCAN_SUPPORT) || defined (CONFIG_STA_SUPPORT)
+VOID RTMPIoctlGetSiteSurvey(
+	IN	PRTMP_ADAPTER	pAdapter, 
+	IN	RTMP_IOCTL_INPUT_STRUCT *wrq);
+#endif
+
+
+
+
+
+#ifdef SNMP_SUPPORT
+/*for snmp , kathy */
+typedef struct _DefaultKeyIdxValue
+{
+	UCHAR	KeyIdx;
+	UCHAR	Value[16];
+} DefaultKeyIdxValue, *PDefaultKeyIdxValue;
+#endif
+
+
+#ifdef CONFIG_STA_SUPPORT
+
+/* The radio capture header precedes the 802.11 header. */
+typedef struct GNU_PACKED _ieee80211_radiotap_header {
+    UINT8	it_version;	/* Version 0. Only increases
+				 * for drastic changes,
+				 * introduction of compatible
+				 * new fields does not count.
+				 */
+    UINT8	it_pad;
+    UINT16     it_len;         /* length of the whole
+				 * header in bytes, including
+				 * it_version, it_pad,
+				 * it_len, and data fields.
+				 */
+    UINT32   it_present;	/* A bitmap telling which
+					 * fields are present. Set bit 31
+					 * (0x80000000) to extend the
+					 * bitmap by another 32 bits.
+					 * Additional extensions are made
+					 * by setting bit 31.
+					 */
+}ieee80211_radiotap_header ;
+
+enum ieee80211_radiotap_type {
+    IEEE80211_RADIOTAP_TSFT = 0,
+    IEEE80211_RADIOTAP_FLAGS = 1,
+    IEEE80211_RADIOTAP_RATE = 2,
+    IEEE80211_RADIOTAP_CHANNEL = 3,
+    IEEE80211_RADIOTAP_FHSS = 4,
+    IEEE80211_RADIOTAP_DBM_ANTSIGNAL = 5,
+    IEEE80211_RADIOTAP_DBM_ANTNOISE = 6,
+    IEEE80211_RADIOTAP_LOCK_QUALITY = 7,
+    IEEE80211_RADIOTAP_TX_ATTENUATION = 8,
+    IEEE80211_RADIOTAP_DB_TX_ATTENUATION = 9,
+    IEEE80211_RADIOTAP_DBM_TX_POWER = 10,
+    IEEE80211_RADIOTAP_ANTENNA = 11,
+    IEEE80211_RADIOTAP_DB_ANTSIGNAL = 12,
+    IEEE80211_RADIOTAP_DB_ANTNOISE = 13
+};
+
+#define WLAN_RADIOTAP_PRESENT (			\
+	(1 << IEEE80211_RADIOTAP_TSFT)	|	\
+	(1 << IEEE80211_RADIOTAP_FLAGS) |	\
+	(1 << IEEE80211_RADIOTAP_RATE)  | 	\
+	 0)
+
+typedef struct _wlan_radiotap_header {
+	ieee80211_radiotap_header wt_ihdr;
+	INT64 wt_tsft;
+	UINT8 wt_flags;	
+	UINT8 wt_rate;
+} wlan_radiotap_header;
+/* Definition from madwifi */
+
+
+void STA_MonPktSend(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	RX_BLK			*pRxBlk);
+
+VOID    RTMPSetDesiredRates(
+    IN  PRTMP_ADAPTER   pAdapter,
+    IN  LONG            Rates);
+
+#ifdef XLINK_SUPPORT
+INT Set_XlinkMode_Proc(
+	IN	PRTMP_ADAPTER	pAdapter, 
+	IN	PSTRING			arg);
+#endif /* XLINK_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+
+INT	Set_FixedTxMode_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+#ifdef CONFIG_APSTA_MIXED_SUPPORT
+INT	Set_OpMode_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+#endif /* CONFIG_APSTA_MIXED_SUPPORT */
+
+INT Set_LongRetryLimit_Proc(
+	IN	PRTMP_ADAPTER	pAdapter, 
+	IN	PSTRING			arg);
+
+INT Set_ShortRetryLimit_Proc(
+	IN	PRTMP_ADAPTER	pAdapter, 
+	IN	PSTRING			arg);
+
+INT Set_AutoFallBack_Proc(
+	IN	PRTMP_ADAPTER	pAdapter, 
+	IN	PSTRING			arg);
+
+
+
+
+VOID RT28XXDMADisable(
+	IN RTMP_ADAPTER 		*pAd);
+
+VOID RT28XXDMAEnable(
+	IN RTMP_ADAPTER 		*pAd);
+	
+VOID RT28xx_UpdateBeaconToAsic(
+	IN RTMP_ADAPTER * pAd, 
+	IN INT apidx,
+	IN ULONG BeaconLen,
+	IN ULONG UpdatePos);
+
+void CfgInitHook(PRTMP_ADAPTER pAd);
+
+
+NDIS_STATUS RtmpNetTaskInit(
+	IN RTMP_ADAPTER *pAd);
+
+VOID RtmpNetTaskExit(
+	IN PRTMP_ADAPTER pAd);
+
+NDIS_STATUS RtmpMgmtTaskInit(
+	IN RTMP_ADAPTER *pAd);
+	
+VOID RtmpMgmtTaskExit(
+	IN RTMP_ADAPTER *pAd);
+
+#ifdef WORKQUEUE_BH
+void tbtt_workq(struct work_struct *work);
+#else
+void tbtt_tasklet(unsigned long data);
+#endif /* WORKQUEUE_BH */
+
+
+	
+	
+
+VOID AsicTurnOffRFClk(
+	IN PRTMP_ADAPTER    pAd, 
+	IN	UCHAR           Channel);
+
+
+
+#ifdef RTMP_TIMER_TASK_SUPPORT
+INT RtmpTimerQThread(
+	IN ULONG Context);
+
+RTMP_TIMER_TASK_ENTRY *RtmpTimerQInsert(
+	IN RTMP_ADAPTER *pAd, 
+	IN RALINK_TIMER_STRUCT *pTimer);
+
+BOOLEAN RtmpTimerQRemove(
+	IN RTMP_ADAPTER *pAd, 
+	IN RALINK_TIMER_STRUCT *pTimer);
+
+void RtmpTimerQExit(
+	IN RTMP_ADAPTER *pAd);
+
+void RtmpTimerQInit(
+	IN RTMP_ADAPTER *pAd);
+#endif /* RTMP_TIMER_TASK_SUPPORT */
+
+
+#ifdef RTMP_MAC_USB
+
+NTSTATUS RTUSBMultiRead(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	USHORT			Offset,
+	OUT	PUCHAR			pData,
+	IN	USHORT			length);
+
+NTSTATUS RTUSBMultiWrite(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	USHORT			Offset,
+	IN	PUCHAR			pData,
+	IN	USHORT			length);
+
+NTSTATUS RTUSBMultiWrite_OneByte(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	USHORT			Offset,
+	IN	PUCHAR			pData);
+
+NTSTATUS RTUSBReadBBPRegister(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			Id,
+	IN	PUCHAR			pValue);
+
+NTSTATUS RTUSBWriteBBPRegister(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			Id,
+	IN	UCHAR			Value);
+
+NTSTATUS RTUSBWriteRFRegister(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UINT32			Value);
+	
+NTSTATUS RTUSB_VendorRequest(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UINT32			TransferFlags,
+	IN	UCHAR			ReservedBits,
+	IN	UCHAR			Request,
+	IN	USHORT			Value,
+	IN	USHORT			Index,
+	IN	PVOID			TransferBuffer,
+	IN	UINT32			TransferBufferLength);
+
+NTSTATUS RTUSBReadEEPROM(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	USHORT			Offset,
+	OUT	PUCHAR			pData,
+	IN	USHORT			length);
+
+NTSTATUS RTUSBWriteEEPROM(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	USHORT			Offset,
+	IN	PUCHAR			pData,
+	IN	USHORT			length);
+
+VOID RTUSBPutToSleep(
+	IN	PRTMP_ADAPTER	pAd);
+
+NTSTATUS RTUSBWakeUp(
+	IN	PRTMP_ADAPTER	pAd);
+
+NDIS_STATUS	RTUSBEnqueueCmdFromNdis(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	NDIS_OID		Oid,
+	IN	BOOLEAN			SetInformation,
+	IN	PVOID			pInformationBuffer,
+	IN	UINT32			InformationBufferLength);
+
+VOID RTUSBDequeueCmd(
+	IN	PCmdQ		cmdq,
+	OUT	PCmdQElmt	*pcmdqelmt);
+
+INT RTUSBCmdThread(
+	IN ULONG Context);
+
+VOID RTUSBBssBeaconExit(
+	IN RTMP_ADAPTER *pAd);
+
+VOID RTUSBBssBeaconStop(
+	IN RTMP_ADAPTER *pAd);
+
+VOID RTUSBBssBeaconStart(
+	IN RTMP_ADAPTER * pAd);
+
+VOID RTUSBBssBeaconInit(
+	IN RTMP_ADAPTER *pAd);
+
+VOID RTUSBWatchDog(
+	IN RTMP_ADAPTER *pAd);
+	
+NTSTATUS RTUSBWriteMACRegister(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	USHORT			Offset,
+	IN	UINT32			Value);
+
+NTSTATUS RTUSBReadMACRegister(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	USHORT			Offset,
+	OUT	PUINT32			pValue);
+
+NTSTATUS RTUSBSingleWrite(
+	IN 	RTMP_ADAPTER 	*pAd,
+	IN	USHORT			Offset,
+	IN	USHORT			Value);
+
+NTSTATUS RTUSBFirmwareWrite(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR		pFwImage,
+	IN ULONG		FwLen);
+
+NTSTATUS	RTUSBVenderReset(
+	IN	PRTMP_ADAPTER	pAd);
+
+NDIS_STATUS RTUSBSetHardWareRegister(
+	IN	PRTMP_ADAPTER	pAdapter,
+	IN	PVOID			pBuf);
+
+NDIS_STATUS RTUSBQueryHardWareRegister(
+	IN	PRTMP_ADAPTER	pAdapter,
+	IN	PVOID			pBuf);
+
+/*VOID CMDHandler( */
+/*    IN PRTMP_ADAPTER pAd); */
+
+NDIS_STATUS	RTUSBWriteHWMACAddress(
+	IN	PRTMP_ADAPTER		pAdapter);
+
+VOID MacTableInitialize(
+	IN  PRTMP_ADAPTER   pAd);
+
+VOID MlmeSetPsm(
+	IN PRTMP_ADAPTER pAd, 
+	IN USHORT psm);
+
+NDIS_STATUS RTMPWPAAddKeyProc(
+	IN  PRTMP_ADAPTER   pAd,
+	IN  PVOID           pBuf);
+
+VOID AsicRxAntEvalAction(
+	IN PRTMP_ADAPTER pAd);
+
+void append_pkt(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PUCHAR			pHeader802_3,
+    IN  UINT            HdrLen,
+	IN	PUCHAR			pData,
+	IN	ULONG			DataSize,
+	OUT  PNDIS_PACKET	*ppPacket);
+
+NDIS_STATUS	RTMPCheckRxError(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PHEADER_802_11	pHeader,	
+	IN	PRXWI_STRUC	pRxWI,	
+	IN	PRT28XX_RXD_STRUC	pRxINFO);
+
+
+VOID RTUSBMlmeHardTransmit(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PMGMT_STRUC		pMgmt);
+
+INT MlmeThread(
+	IN ULONG Context);
+
+
+/* */
+/* Function Prototype in rtusb_data.c */
+/* */
+NDIS_STATUS	RTUSBFreeDescriptorRequest(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			BulkOutPipeId,
+	IN	UINT32			NumberRequired);
+
+
+BOOLEAN	RTUSBNeedQueueBackForAgg(
+	IN RTMP_ADAPTER *pAd, 
+	IN UCHAR		BulkOutPipeId);
+
+
+VOID RTMPWriteTxInfo(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PTXINFO_STRUC 	pTxInfo,
+	IN	  USHORT		USBDMApktLen,
+	IN	  BOOLEAN		bWiv,
+	IN	  UCHAR			QueueSel,
+	IN	  UCHAR			NextValid,
+	IN	  UCHAR			TxBurst);
+
+
+VOID RTUSBRejectPendingPackets(
+	IN	PRTMP_ADAPTER	pAd);
+
+/* */
+/* Function Prototype in cmm_data_usb.c */
+/* */
+USHORT RtmpUSB_WriteSubTxResource(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	TX_BLK			*pTxBlk,
+	IN	BOOLEAN			bIsLast,
+	OUT	USHORT			*FreeNumber);
+
+USHORT RtmpUSB_WriteSingleTxResource(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	TX_BLK			*pTxBlk,
+	IN	BOOLEAN			bIsLast,
+	OUT	USHORT			*FreeNumber);
+
+USHORT	RtmpUSB_WriteFragTxResource(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	TX_BLK			*pTxBlk,
+	IN	UCHAR			fragNum,
+	OUT	USHORT			*FreeNumber);
+	
+USHORT RtmpUSB_WriteMultiTxResource(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	TX_BLK			*pTxBlk,
+	IN	UCHAR			frameNum,
+	OUT	USHORT			*FreeNumber);
+
+VOID RtmpUSB_FinalWriteTxResource(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	TX_BLK			*pTxBlk,
+	IN	USHORT			totalMPDUSize,
+	IN	USHORT			TxIdx);
+
+VOID RtmpUSBDataLastTxIdx(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			QueIdx,
+	IN	USHORT			TxIdx);
+
+VOID RtmpUSBDataKickOut(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	TX_BLK			*pTxBlk,
+	IN	UCHAR			QueIdx);
+
+int RtmpUSBMgmtKickOut(
+	IN RTMP_ADAPTER 	*pAd, 
+	IN UCHAR 			QueIdx,
+	IN PNDIS_PACKET		pPacket,
+	IN PUCHAR			pSrcBufVA,
+	IN UINT 			SrcBufLen);
+
+VOID RtmpUSBNullFrameKickOut(
+	IN RTMP_ADAPTER *pAd,
+	IN UCHAR		QueIdx,
+	IN UCHAR		*pNullFrame,
+	IN UINT32		frameLen);
+	
+VOID RtmpUsbStaAsicForceWakeupTimeout(
+	IN PVOID SystemSpecific1, 
+	IN PVOID FunctionContext, 
+	IN PVOID SystemSpecific2, 
+	IN PVOID SystemSpecific3);
+
+VOID RT28xxUsbStaAsicForceWakeup(
+	IN PRTMP_ADAPTER pAd,
+	IN BOOLEAN       bFromTx);
+
+VOID RT28xxUsbStaAsicSleepThenAutoWakeup(
+	IN PRTMP_ADAPTER pAd, 
+	IN USHORT TbttNumToNextWakeUp);
+
+VOID RT28xxUsbMlmeRadioOn(
+	IN PRTMP_ADAPTER pAd);
+
+VOID RT28xxUsbMlmeRadioOFF(
+	IN PRTMP_ADAPTER pAd);
+VOID RT28xxUsbAsicRadioOff(
+	IN PRTMP_ADAPTER pAd);
+
+VOID RT28xxUsbAsicRadioOn(
+	IN PRTMP_ADAPTER pAd);
+
+BOOLEAN AsicCheckCommandOk(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR		 Command);
+
+
+#endif /* RTMP_MAC_USB */
+
+/*////////////////////////////////////*/
+
+#ifdef AP_QLOAD_SUPPORT
+VOID QBSS_LoadInit(
+ 	IN		RTMP_ADAPTER	*pAd);
+
+VOID QBSS_LoadAlarmReset(
+ 	IN		RTMP_ADAPTER	*pAd);
+
+VOID QBSS_LoadAlarmResume(
+ 	IN		RTMP_ADAPTER	*pAd);
+
+UINT32 QBSS_LoadBusyTimeGet(
+ 	IN		RTMP_ADAPTER	*pAd);
+
+BOOLEAN QBSS_LoadIsAlarmIssued(
+ 	IN		RTMP_ADAPTER	*pAd);
+
+BOOLEAN QBSS_LoadIsBusyTimeAccepted(
+ 	IN		RTMP_ADAPTER	*pAd,
+	IN		UINT32			BusyTime);
+
+UINT32 QBSS_LoadElementAppend(
+ 	IN		RTMP_ADAPTER	*pAd,
+	OUT		UINT8			*buf_p);
+
+UINT32 QBSS_LoadElementParse(
+ 	IN		RTMP_ADAPTER	*pAd,
+	IN		UINT8			*pElement,
+	OUT		UINT16			*pStationCount,
+	OUT		UINT8			*pChanUtil,
+	OUT		UINT16			*pAvalAdmCap);
+
+VOID QBSS_LoadUpdate(
+ 	IN		RTMP_ADAPTER	*pAd,
+	IN		ULONG			UpTime);
+
+VOID QBSS_LoadStatusClear(
+ 	IN		RTMP_ADAPTER	*pAd);
+
+INT	Show_QoSLoad_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg);
+#endif /* AP_QLOAD_SUPPORT */
+
+/*///////////////////////////////////*/
+INT RTMPShowCfgValue(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			pName,
+	IN	PSTRING			pBuf,
+	IN	UINT32			MaxLen);
+
+PSTRING RTMPGetRalinkAuthModeStr(
+    IN  NDIS_802_11_AUTHENTICATION_MODE authMode);
+
+PSTRING RTMPGetRalinkEncryModeStr(
+    IN  USHORT encryMode);
+/*//////////////////////////////////*/
+
+#ifdef CONFIG_STA_SUPPORT
+VOID AsicStaBbpTuning(
+	IN PRTMP_ADAPTER pAd);
+
+BOOLEAN StaAddMacTableEntry(
+	IN  PRTMP_ADAPTER		pAd,
+	IN  PMAC_TABLE_ENTRY	pEntry,
+	IN  UCHAR				MaxSupportedRateIn500Kbps,
+	IN  HT_CAPABILITY_IE	*pHtCapability,
+	IN  UCHAR				HtCapabilityLen,
+	IN  ADD_HT_INFO_IE		*pAddHtInfo,
+	IN  UCHAR				AddHtInfoLen,
+	IN  USHORT        		CapabilityInfo);
+
+
+BOOLEAN	AUTH_ReqSend(
+	IN  PRTMP_ADAPTER 		pAd,
+	IN  PMLME_QUEUE_ELEM	pElem,
+	IN  PRALINK_TIMER_STRUCT pAuthTimer,
+	IN  PSTRING				pSMName,
+	IN  USHORT				SeqNo,
+	IN  PUCHAR				pNewElement,
+	IN  ULONG				ElementLen);
+#endif /* CONFIG_STA_SUPPORT */ 
+
+
+VOID ReSyncBeaconTime(
+	IN  PRTMP_ADAPTER   pAd);
+
+VOID RTMPSetAGCInitValue(
+	IN PRTMP_ADAPTER	pAd,
+	IN UCHAR			BandWidth);
+
+
+
+#define VIRTUAL_IF_INC(__pAd) ((__pAd)->VirtualIfCnt++)
+#define VIRTUAL_IF_DEC(__pAd) ((__pAd)->VirtualIfCnt--)
+#define VIRTUAL_IF_NUM(__pAd) ((__pAd)->VirtualIfCnt)
+
+
+
+#ifdef RTMP_USB_SUPPORT
+/*
+ * Function Prototype in rtusb_bulk.c
+ */
+VOID	RTUSBInitTxDesc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PTX_CONTEXT		pTxContext,
+	IN	UCHAR			BulkOutPipeId,
+	IN	usb_complete_t	Func);
+
+VOID	RTUSBInitHTTxDesc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PHT_TX_CONTEXT	pTxContext,
+	IN	UCHAR			BulkOutPipeId,
+	IN	ULONG			BulkOutSize,
+	IN	usb_complete_t	Func);
+
+VOID	RTUSBInitRxDesc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PRX_CONTEXT		pRxContext);
+
+VOID RTUSBCleanUpDataBulkOutQueue(
+	IN	PRTMP_ADAPTER	pAd);
+
+VOID RTUSBCancelPendingBulkOutIRP(
+	IN	PRTMP_ADAPTER	pAd);
+
+VOID RTUSBBulkOutDataPacket(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			BulkOutPipeId,
+	IN	UCHAR			Index);
+
+VOID RTUSBBulkOutNullFrame(
+	IN	PRTMP_ADAPTER	pAd);
+
+VOID RTUSBBulkOutRTSFrame(
+	IN	PRTMP_ADAPTER	pAd);
+
+VOID RTUSBCancelPendingBulkInIRP(
+	IN	PRTMP_ADAPTER	pAd);
+
+VOID RTUSBCancelPendingIRPs(
+	IN	PRTMP_ADAPTER	pAd);
+
+VOID RTUSBBulkOutMLMEPacket(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			Index);
+
+VOID RTUSBBulkOutPsPoll(
+	IN	PRTMP_ADAPTER	pAd);
+
+VOID RTUSBCleanUpMLMEBulkOutQueue(
+	IN	PRTMP_ADAPTER	pAd);
+
+VOID RTUSBKickBulkOut(
+	IN	PRTMP_ADAPTER pAd);
+
+VOID	RTUSBBulkReceive(
+	IN	PRTMP_ADAPTER	pAd);
+
+VOID DoBulkIn(
+	IN RTMP_ADAPTER *pAd);
+
+VOID RTUSBInitRxDesc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN  PRX_CONTEXT		pRxContext);
+
+VOID RTUSBBulkRxHandle(
+	IN unsigned long data);	
+#endif /* RTMP_USB_SUPPORT */
+
+
+#ifdef SOFT_ENCRYPT
+BOOLEAN RTMPExpandPacketForSwEncrypt(
+	IN  PRTMP_ADAPTER   pAd,
+	IN	PTX_BLK			pTxBlk);
+
+VOID RTMPUpdateSwCacheCipherInfo(	
+	IN  PRTMP_ADAPTER   pAd,
+	IN	PTX_BLK			pTxBlk,
+	IN	PUCHAR			pHdr);
+#endif /* SOFT_ENCRYPT */
+
+
+/*
+	OS Related funciton prototype definitions.
+	TODO: Maybe we need to move these function prototypes to other proper place.
+*/
+
+VOID	RTInitializeCmdQ(
+	IN	PCmdQ	cmdq);
+
+INT RTPCICmdThread(
+	IN ULONG Context);
+
+VOID CMDHandler(
+    IN PRTMP_ADAPTER pAd);
+
+VOID	RTThreadDequeueCmd(
+	IN	PCmdQ		cmdq,
+	OUT	PCmdQElmt	*pcmdqelmt);
+
+NDIS_STATUS RTEnqueueInternalCmd(
+	IN PRTMP_ADAPTER	pAd,
+	IN NDIS_OID			Oid,
+	IN PVOID			pInformationBuffer,
+	IN UINT32			InformationBufferLength);
+
+#ifdef HOSTAPD_SUPPORT
+VOID ieee80211_notify_michael_failure(
+	IN	PRTMP_ADAPTER    pAd,
+	IN	PHEADER_802_11   pHeader,
+	IN	UINT            keyix,
+	IN	INT              report);
+
+const CHAR* ether_sprintf(const UINT8 *mac);
+#endif/*HOSTAPD_SUPPORT*/
+
+#ifdef VENDOR_FEATURE3_SUPPORT
+VOID RTMP_IO_WRITE32(
+	PRTMP_ADAPTER pAd,
+	UINT32 Offset,
+	UINT32 Value);
+
+VOID RTMP_BBP_IO_READ8_BY_REG_ID(
+	PRTMP_ADAPTER pAd,
+	UINT32 Offset,
+	UINT8 *pValue);
+
+VOID RTMP_BBP_IO_READ8(
+	PRTMP_ADAPTER pAd,
+	UCHAR Offset,
+	UINT8 *pValue,
+	BOOLEAN FlgValidMCR);
+
+VOID RTMP_BBP_IO_WRITE8_BY_REG_ID(
+	PRTMP_ADAPTER pAd,
+	UINT32 Offset,
+	UINT8 Value);
+
+VOID RTMP_BBP_IO_WRITE8(
+	PRTMP_ADAPTER pAd,
+	UCHAR Offset,
+	UINT8 Value,
+	BOOLEAN FlgValidMCR);
+#endif /* VENDOR_FEATURE3_SUPPORT */
+
+BOOLEAN CHAN_PropertyCheck(
+	IN PRTMP_ADAPTER	pAd,
+	IN UINT32			ChanNum,
+	IN UCHAR			Property);
+
+#ifdef CONFIG_STA_SUPPORT
+
+/* command */
+INT Set_SSID_Proc(
+    IN  PRTMP_ADAPTER   pAdapter, 
+    IN  PSTRING          arg);
+
+#ifdef WMM_SUPPORT
+INT	Set_WmmCapable_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+#endif
+
+INT Set_NetworkType_Proc(
+    IN  PRTMP_ADAPTER   pAdapter, 
+    IN  PSTRING          arg);
+
+INT Set_AuthMode_Proc(
+    IN  PRTMP_ADAPTER   pAdapter, 
+    IN  PSTRING          arg);
+
+INT Set_EncrypType_Proc(
+    IN  PRTMP_ADAPTER   pAdapter, 
+    IN  PSTRING          arg);
+
+INT Set_DefaultKeyID_Proc(
+    IN  PRTMP_ADAPTER   pAdapter, 
+    IN  PSTRING          arg);
+
+INT Set_Key1_Proc(
+    IN  PRTMP_ADAPTER   pAdapter, 
+    IN  PSTRING          arg);
+
+INT Set_Key2_Proc(
+    IN  PRTMP_ADAPTER   pAdapter, 
+    IN  PSTRING          arg);
+
+INT Set_Key3_Proc(
+    IN  PRTMP_ADAPTER   pAdapter, 
+    IN  PSTRING          arg);
+
+INT Set_Key4_Proc(
+    IN  PRTMP_ADAPTER   pAdapter, 
+    IN  PSTRING          arg);
+
+INT Set_WPAPSK_Proc(
+    IN  PRTMP_ADAPTER   pAdapter, 
+    IN  PSTRING          arg);
+
+
+INT Set_PSMode_Proc(
+    IN  PRTMP_ADAPTER   pAdapter, 
+    IN  PSTRING          arg);
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+INT Set_Wpa_Support(
+    IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+#ifdef DBG
+
+VOID RTMPIoctlMAC(
+	IN	PRTMP_ADAPTER	pAdapter, 
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq);
+
+VOID RTMPIoctlE2PROM(
+    IN  PRTMP_ADAPTER   pAdapter,
+    IN  RTMP_IOCTL_INPUT_STRUCT *wrq);
+#endif /* DBG */
+
+
+NDIS_STATUS RTMPWPANoneAddKeyProc(
+    IN  PRTMP_ADAPTER   pAd,
+    IN	PVOID			pBuf);
+	
+INT Set_FragTest_Proc(
+    IN  PRTMP_ADAPTER   pAdapter, 
+    IN  PSTRING          arg);
+	
+#ifdef DOT11_N_SUPPORT	
+INT Set_TGnWifiTest_Proc(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  PSTRING          arg);
+#endif /* DOT11_N_SUPPORT */
+
+INT Set_LongRetryLimit_Proc(
+	IN	PRTMP_ADAPTER	pAdapter, 
+	IN	PSTRING			arg);
+
+INT Set_ShortRetryLimit_Proc(
+	IN	PRTMP_ADAPTER	pAdapter, 
+	IN	PSTRING			arg);
+
+#ifdef EXT_BUILD_CHANNEL_LIST
+INT Set_Ieee80211dClientMode_Proc(
+    IN  PRTMP_ADAPTER   pAdapter, 
+    IN  PSTRING          arg);
+#endif /* EXT_BUILD_CHANNEL_LIST */
+
+#ifdef CARRIER_DETECTION_SUPPORT
+INT Set_CarrierDetect_Proc(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  PSTRING          arg);
+#endif /* CARRIER_DETECTION_SUPPORT */
+
+INT	Show_Adhoc_MacTable_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			extra,
+	IN	UINT32			size);
+
+#ifdef RTMP_RF_RW_SUPPORT
+VOID RTMPIoctlRF(
+	IN	PRTMP_ADAPTER	pAdapter, 
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq);
+#endif /* RTMP_RF_RW_SUPPORT */
+
+
+INT Set_BeaconLostTime_Proc(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  PSTRING         arg);
+
+INT Set_AutoRoaming_Proc(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  PSTRING         arg);
+
+INT Set_SiteSurvey_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT Set_ForceTxBurst_Proc(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  PSTRING         arg);
+
+VOID RTMPAddKey(
+	IN	PRTMP_ADAPTER	    pAd, 
+	IN	PNDIS_802_11_KEY    pKey);
+
+
+VOID StaSiteSurvey(
+	IN	PRTMP_ADAPTER  		pAd,
+	IN	PNDIS_802_11_SSID	pSsid,
+	IN	UCHAR				ScanType);
+
+VOID MaintainBssTable(
+	IN  PRTMP_ADAPTER pAd,
+	IN OUT	BSS_TABLE *Tab,
+	IN  ULONG	MaxRxTimeDiff,
+	IN  UCHAR	MaxSameRxTimeCount);
+#endif /* CONFIG_STA_SUPPORT */
+
+
+void  getRate(
+    IN HTTRANSMIT_SETTING HTSetting, 
+    OUT ULONG* fLastTxRxRate);
+
+
+
+void RTMP_IndicateMediaState(	
+	IN	PRTMP_ADAPTER		pAd,
+	IN  NDIS_MEDIA_STATE	media_state);
+
+#if defined(RT3350) || defined(RT33xx)
+VOID RTMP_TxEvmCalibration(
+	IN PRTMP_ADAPTER pAd);
+#endif /* defined(RT3350) || defined(RT33xx) */
+
+INT RTMPSetInformation(
+    IN  PRTMP_ADAPTER pAd,
+    IN  OUT RTMP_IOCTL_INPUT_STRUCT		*rq,
+    IN  INT                 cmd);
+
+INT RTMPQueryInformation(
+    IN  PRTMP_ADAPTER pAd,
+    IN  OUT RTMP_IOCTL_INPUT_STRUCT		*rq,
+    IN  INT                 cmd);
+
+VOID RTMPIoctlShow(
+	IN	PRTMP_ADAPTER			pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT			*rq,
+	IN	UINT32					subcmd,
+	IN	VOID					*pData,
+	IN	ULONG					Data);
+
+INT RTMP_COM_IoctlHandle(
+	IN	VOID					*pAdSrc,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN	INT						cmd,
+	IN	USHORT					subcmd,
+	IN	VOID					*pData,
+	IN	ULONG					Data);
+
+
+
+INT	Set_Antenna_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+#ifdef RT5350
+INT Set_Hw_Antenna_Div_Proc(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PSTRING			arg);
+#endif // RT5350 //
+#endif  /* __RTMP_H__ */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rtmp_iface.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rtmp_iface.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rtmp_iface.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rtmp_iface.h	2017-09-23 03:42:49.810675700 +0800
@@ -0,0 +1,59 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RTMP_IFACE_H__
+#define __RTMP_IFACE_H__
+
+
+
+#ifdef RTMP_USB_SUPPORT
+#include "iface/rtmp_usb.h"
+#endif /* RTMP_USB_SUPPORT */
+
+typedef struct _INF_PCI_CONFIG_ {
+	unsigned long CSRBaseAddress;	/* PCI MMIO Base Address, all access will use */
+	unsigned int irq_num;
+} INF_PCI_CONFIG;
+
+typedef struct _INF_USB_CONFIG_ {
+	unsigned char BulkInEpAddr;	/* bulk-in endpoint address */
+	unsigned char BulkOutEpAddr[6];	/* bulk-out endpoint address */
+} INF_USB_CONFIG;
+
+typedef struct _INF_RBUS_CONFIG_ {
+	unsigned long csr_addr;
+	unsigned int irq;
+} INF_RBUS_CONFIG;
+
+
+typedef union _RTMP_INF_CONFIG_ {
+	struct _INF_PCI_CONFIG_ pciConfig;
+	struct _INF_USB_CONFIG_ usbConfig;
+	struct _INF_RBUS_CONFIG_ rbusConfig;
+} RTMP_INF_CONFIG;
+
+#endif /* __RTMP_IFACE_H__ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rtmp_mcu.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rtmp_mcu.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rtmp_mcu.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rtmp_mcu.h	2017-09-23 03:42:49.810675700 +0800
@@ -0,0 +1,51 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RTMP_MCU_H__
+#define __RTMP_MCU_H__
+
+INT RtmpAsicEraseFirmware(
+	IN PRTMP_ADAPTER pAd);
+
+NDIS_STATUS RtmpAsicLoadFirmware(
+	IN PRTMP_ADAPTER pAd);
+
+NDIS_STATUS isMCUnotReady(
+	IN PRTMP_ADAPTER pAd);
+
+NDIS_STATUS isMCUNeedToLoadFIrmware(
+	IN PRTMP_ADAPTER pAd);
+
+INT RtmpAsicSendCommandToMcu(
+	IN PRTMP_ADAPTER	pAd,
+	IN UCHAR			Command,
+	IN UCHAR			Token,
+	IN UCHAR			Arg0,
+	IN UCHAR			Arg1,
+	IN BOOLEAN			FlgIsNeedLocked);
+
+#endif /* __RTMP_MCU_H__ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rtmp_osabl.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rtmp_osabl.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rtmp_osabl.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rtmp_osabl.h	2017-09-23 03:42:49.810675700 +0800
@@ -0,0 +1,79 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RTMP_OS_ABL_H__
+#define __RTMP_OS_ABL_H__
+
+#ifdef OS_ABL_FUNC_SUPPORT
+
+#ifdef OS_ABL_OS_PCI_SUPPORT
+#define RTMP_MAC_PCI
+#define RTMP_PCI_SUPPORT
+#endif /* OS_ABL_OS_PCI_SUPPORT */
+
+#ifdef OS_ABL_OS_USB_SUPPORT
+#include <linux/usb.h>
+
+#ifndef RTMP_MAC_USB
+#define RTMP_MAC_USB
+#endif /* RTMP_MAC_USB */
+#ifndef RTMP_USB_SUPPORT
+#define RTMP_USB_SUPPORT
+#endif /* RTMP_USB_SUPPORT */
+#endif /* OS_ABL_OS_USB_SUPPORT */
+
+#ifdef OS_ABL_OS_RBUS_SUPPORT
+#define RTMP_RBUS_SUPPORT
+#endif /* OS_ABL_OS_RBUS_SUPPORT */
+
+#ifdef OS_ABL_OS_AP_SUPPORT
+#define CONFIG_AP_SUPPORT
+#endif /* OS_ABL_OS_AP_SUPPORT */
+
+#ifdef OS_ABL_OS_STA_SUPPORT
+#ifndef CONFIG_STA_SUPPORT
+#define CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+#endif /* OS_ABL_OS_STA_SUPPORT */
+
+/* AP & STA con-current */
+#undef RT_CONFIG_IF_OPMODE_ON_AP
+#undef RT_CONFIG_IF_OPMODE_ON_STA
+
+#if defined(CONFIG_AP_SUPPORT) && defined(CONFIG_STA_SUPPORT)
+#define RT_CONFIG_IF_OPMODE_ON_AP(__OpMode)		if (__OpMode == OPMODE_AP)
+#define RT_CONFIG_IF_OPMODE_ON_STA(__OpMode)	if (__OpMode == OPMODE_STA)
+#else
+#define RT_CONFIG_IF_OPMODE_ON_AP(__OpMode)
+#define RT_CONFIG_IF_OPMODE_ON_STA(__OpMode)
+#endif
+
+#endif /* OS_ABL_FUNC_SUPPORT */
+
+#endif /* __RTMP_OS_ABL_H__ */
+
+/* End of rtmp_osabl.h */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rtmp_os.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rtmp_os.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rtmp_os.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rtmp_os.h	2017-09-23 03:42:49.810675700 +0800
@@ -0,0 +1,137 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RTMP_OS_H__
+#define __RTMP_OS_H__
+
+/* Driver Operators */
+typedef int (*RTMP_PRINTK)(const char *ftm, ...);
+typedef int (*RTMP_SNPRINTF)(char *, ULONG, const char *ftm, ...);
+
+typedef struct _RTMP_OS_ABL_OPS {
+	int (*ra_printk)(const char *ftm, ...);
+	int (*ra_snprintf)(char *, ULONG, const char *ftm, ...);
+} RTMP_OS_ABL_OPS;
+
+extern RTMP_OS_ABL_OPS *pRaOsOps;
+
+#ifdef LINUX
+#ifndef OS_ABL_FUNC_SUPPORT
+#include "os/rt_linux.h"
+
+#else
+
+#ifdef RTMP_MODULE_OS
+/* for util/netif */
+#include "os/rt_linux.h"
+#else
+/* for core */
+#include "os/rt_drv.h"
+#endif /* RTMP_MODULE_OS */
+#endif /* OS_ABL_FUNC_SUPPORT */
+#endif /* LINUX */
+
+
+
+
+
+/*
+	This data structure mainly strip some callback function defined in 
+	"struct net_device" in kernel source "include/linux/netdevice.h".
+
+	The definition of this data structure may various depends on different
+	OS. Use it carefully.
+*/
+typedef struct _RTMP_OS_NETDEV_OP_HOOK_ {
+	void *open;
+	void *stop;
+	void *xmit;
+	void *ioctl;
+	void *get_stats;
+	void *priv;
+	void *get_wstats;
+	void *iw_handler;
+	int priv_flags;
+	unsigned char devAddr[6];
+	unsigned char devName[16];
+	unsigned char needProtcted;
+} RTMP_OS_NETDEV_OP_HOOK, *PRTMP_OS_NETDEV_OP_HOOK;
+
+
+typedef enum _RTMP_TASK_STATUS_ {
+	RTMP_TASK_STAT_UNKNOWN = 0,
+	RTMP_TASK_STAT_INITED = 1,
+	RTMP_TASK_STAT_RUNNING = 2,
+	RTMP_TASK_STAT_STOPED = 4,
+} RTMP_TASK_STATUS;
+#define RTMP_TASK_CAN_DO_INSERT		(RTMP_TASK_STAT_INITED |RTMP_TASK_STAT_RUNNING)
+
+#define RTMP_OS_TASK_NAME_LEN	16
+
+#if defined(RTMP_MODULE_OS) || !defined(OS_ABL_FUNC_SUPPORT)
+/* used in UTIL/NETIF module */
+typedef struct _RTMP_OS_TASK_ {
+	char taskName[RTMP_OS_TASK_NAME_LEN];
+	void *priv;
+	/*unsigned long                 taskFlags; */
+	RTMP_TASK_STATUS taskStatus;
+#ifndef KTHREAD_SUPPORT
+	RTMP_OS_SEM taskSema;
+	RTMP_OS_PID taskPID;
+	struct completion taskComplete;
+#endif
+	unsigned char task_killed;
+#ifdef KTHREAD_SUPPORT
+	struct task_struct *kthread_task;
+	wait_queue_head_t kthread_q;
+	BOOLEAN kthread_running;
+#endif
+} OS_TASK;
+#endif /* RTMP_MODULE_OS || ! OS_ABL_FUNC_SUPPORT */
+
+int RtmpOSIRQRequest(
+	IN PNET_DEV pNetDev);
+/*int RtmpOSIRQRelease(IN PNET_DEV pNetDev); */
+
+#ifndef OS_ABL_SUPPORT
+#define RTMP_MATOpsInit(__pAd)
+#define RTMP_MATPktRxNeedConvert(__pAd, __pDev)				\
+	MATPktRxNeedConvert(__pAd, __pDev)
+#define RTMP_MATEngineRxHandle(__pAd, __pPkt, __InfIdx)		\
+	MATEngineRxHandle(__pAd, __pPkt, __InfIdx)
+#else
+
+#define RTMP_MATOpsInit(__pAd)								\
+	(__pAd)->MATPktRxNeedConvert = MATPktRxNeedConvert;		\
+	(__pAd)->MATEngineRxHandle = MATEngineRxHandle;
+#define RTMP_MATPktRxNeedConvert(__pAd, __pDev)				\
+	((__pAd)->MATPktRxNeedConvert(__pAd, __pDev))
+#define RTMP_MATEngineRxHandle(__pAd, __pPkt, __InfIdx)		\
+	((__pAd)->MATEngineRxHandle(__pAd, __pPkt, __InfIdx))
+#endif /* OS_ABL_SUPPORT */
+
+#endif /* __RMTP_OS_H__ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rtmp_timer.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rtmp_timer.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rtmp_timer.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rtmp_timer.h	2017-09-23 03:42:49.810675700 +0800
@@ -0,0 +1,147 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RTMP_TIMER_H__
+#define  __RTMP_TIMER_H__
+
+#include "rtmp_os.h"
+
+#define DECLARE_TIMER_FUNCTION(_func)			\
+	void rtmp_timer_##_func(unsigned long data)
+
+#define GET_TIMER_FUNCTION(_func)				\
+	(PVOID)rtmp_timer_##_func
+
+/* ----------------- Timer Related MARCO ---------------*/
+/* In some os or chipset, we have a lot of timer functions and will read/write register, */
+/*   it's not allowed in Linux USB sub-system to do it ( because of sleep issue when */
+/*  submit to ctrl pipe). So we need a wrapper function to take care it. */
+
+#ifdef RTMP_TIMER_TASK_SUPPORT
+typedef VOID(
+	*RTMP_TIMER_TASK_HANDLE) (
+	IN PVOID SystemSpecific1,
+	IN PVOID FunctionContext,
+	IN PVOID SystemSpecific2,
+	IN PVOID SystemSpecific3);
+#endif /* RTMP_TIMER_TASK_SUPPORT */
+
+typedef struct _RALINK_TIMER_STRUCT {
+	RTMP_OS_TIMER TimerObj;	/* Ndis Timer object */
+	BOOLEAN Valid;		/* Set to True when call RTMPInitTimer */
+	BOOLEAN State;		/* True if timer cancelled */
+	BOOLEAN PeriodicType;	/* True if timer is periodic timer */
+	BOOLEAN Repeat;		/* True if periodic timer */
+	ULONG TimerValue;	/* Timer value in milliseconds */
+	ULONG cookie;		/* os specific object */
+	void *pAd;
+#ifdef RTMP_TIMER_TASK_SUPPORT
+	RTMP_TIMER_TASK_HANDLE handle;
+#endif				/* RTMP_TIMER_TASK_SUPPORT */
+} RALINK_TIMER_STRUCT, *PRALINK_TIMER_STRUCT;
+
+
+#ifdef RTMP_TIMER_TASK_SUPPORT
+typedef struct _RTMP_TIMER_TASK_ENTRY_ {
+	RALINK_TIMER_STRUCT *pRaTimer;
+	struct _RTMP_TIMER_TASK_ENTRY_ *pNext;
+} RTMP_TIMER_TASK_ENTRY;
+
+#define TIMER_QUEUE_SIZE_MAX	128
+typedef struct _RTMP_TIMER_TASK_QUEUE_ {
+	unsigned int status;
+	unsigned char *pTimerQPoll;
+	RTMP_TIMER_TASK_ENTRY *pQPollFreeList;
+	RTMP_TIMER_TASK_ENTRY *pQHead;
+	RTMP_TIMER_TASK_ENTRY *pQTail;
+} RTMP_TIMER_TASK_QUEUE;
+
+#define BUILD_TIMER_FUNCTION(_func)										\
+void rtmp_timer_##_func(unsigned long data)										\
+{																			\
+	PRALINK_TIMER_STRUCT	_pTimer = (PRALINK_TIMER_STRUCT)data;				\
+	RTMP_TIMER_TASK_ENTRY	*_pQNode;										\
+	RTMP_ADAPTER			*_pAd;											\
+																			\
+	_pTimer->handle = _func;													\
+	_pAd = (RTMP_ADAPTER *)_pTimer->pAd;										\
+	_pQNode = RtmpTimerQInsert(_pAd, _pTimer); 								\
+	if ((_pQNode == NULL) && (_pAd->TimerQ.status & RTMP_TASK_CAN_DO_INSERT))	\
+		RTMP_OS_Add_Timer(&_pTimer->TimerObj, OS_HZ);               					\
+}
+#else /* !RTMP_TIMER_TASK_SUPPORT */
+#define BUILD_TIMER_FUNCTION(_func)										\
+void rtmp_timer_##_func(unsigned long data)										\
+{																			\
+	PRALINK_TIMER_STRUCT	pTimer = (PRALINK_TIMER_STRUCT) data;				\
+																			\
+	_func(NULL, (PVOID) pTimer->cookie, NULL, pTimer); 							\
+	if (pTimer->Repeat)														\
+		RTMP_OS_Add_Timer(&pTimer->TimerObj, pTimer->TimerValue);			\
+}
+#endif /* RTMP_TIMER_TASK_SUPPORT */
+
+DECLARE_TIMER_FUNCTION(MlmePeriodicExec);
+DECLARE_TIMER_FUNCTION(MlmeRssiReportExec);
+DECLARE_TIMER_FUNCTION(AsicRxAntEvalTimeout);
+DECLARE_TIMER_FUNCTION(APSDPeriodicExec);
+DECLARE_TIMER_FUNCTION(EnqueueStartForPSKExec);
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+#ifdef RTMP_MAC_USB
+DECLARE_TIMER_FUNCTION(BeaconUpdateExec);
+#endif /* RTMP_MAC_USB */
+
+
+#ifdef CONFIG_STA_SUPPORT
+DECLARE_TIMER_FUNCTION(BeaconTimeout);
+DECLARE_TIMER_FUNCTION(ScanTimeout);
+DECLARE_TIMER_FUNCTION(AuthTimeout);
+DECLARE_TIMER_FUNCTION(AssocTimeout);
+DECLARE_TIMER_FUNCTION(ReassocTimeout);
+DECLARE_TIMER_FUNCTION(DisassocTimeout);
+DECLARE_TIMER_FUNCTION(LinkDownExec);
+DECLARE_TIMER_FUNCTION(StaQuickResponeForRateUpExec);
+DECLARE_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc);
+
+#ifdef QOS_DLS_SUPPORT
+DECLARE_TIMER_FUNCTION(DlsTimeoutAction);
+#endif /* QOS_DLS_SUPPORT */
+
+
+
+#ifdef RTMP_MAC_USB
+DECLARE_TIMER_FUNCTION(RtmpUsbStaAsicForceWakeupTimeout);
+#endif /* RTMP_MAC_USB */
+
+#endif /* CONFIG_STA_SUPPORT */
+
+
+
+
+
+#endif /* __RTMP_TIMER_H__ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rtmp_type.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rtmp_type.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rtmp_type.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rtmp_type.h	2017-09-23 03:42:49.810675700 +0800
@@ -0,0 +1,150 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RTMP_TYPE_H__
+#define __RTMP_TYPE_H__
+
+
+
+#ifndef GNU_PACKED
+#define GNU_PACKED  __attribute__ ((packed))
+#endif /* GNU_PACKED */
+
+
+#ifdef LINUX
+/* Put platform dependent declaration here */
+/* For example, linux type definition */
+typedef unsigned char UINT8;
+typedef unsigned short UINT16;
+typedef unsigned int UINT32;
+typedef unsigned long long UINT64;
+typedef short INT16;
+typedef int INT32;
+typedef long long INT64;
+
+typedef unsigned char UCHAR;
+typedef unsigned short USHORT;
+typedef unsigned int UINT;
+typedef unsigned long ULONG;
+#endif /* LINUX */
+
+typedef unsigned char *PUINT8;
+typedef unsigned short *PUINT16;
+typedef unsigned int *PUINT32;
+typedef unsigned long long *PUINT64;
+typedef int *PINT32;
+typedef long long *PINT64;
+
+/* modified for fixing compile warning on Sigma 8634 platform */
+typedef char STRING;
+
+typedef signed char CHAR;
+
+typedef signed short SHORT;
+typedef signed int INT;
+typedef signed long LONG;
+typedef signed long long LONGLONG;
+
+typedef unsigned long long ULONGLONG;
+
+typedef unsigned char BOOLEAN;
+#ifdef LINUX
+typedef void VOID;
+#endif /* LINUX */
+
+typedef char *PSTRING;
+typedef VOID *PVOID;
+typedef CHAR *PCHAR;
+typedef UCHAR *PUCHAR;
+typedef USHORT *PUSHORT;
+typedef LONG *PLONG;
+typedef ULONG *PULONG;
+typedef UINT *PUINT;
+
+typedef unsigned int NDIS_MEDIA_STATE;
+
+typedef union _LARGE_INTEGER {
+	struct {
+#ifdef RT_BIG_ENDIAN
+		INT32 HighPart;
+		UINT LowPart;
+#else
+		UINT LowPart;
+		INT32 HighPart;
+#endif
+	} u;
+	INT64 QuadPart;
+} LARGE_INTEGER;
+
+/* */
+/* Register set pair for initialzation register set definition */
+/* */
+typedef struct _RTMP_REG_PAIR {
+	ULONG Register;
+	ULONG Value;
+} RTMP_REG_PAIR, *PRTMP_REG_PAIR;
+
+typedef struct _REG_PAIR {
+	UCHAR Register;
+	UCHAR Value;
+} REG_PAIR, *PREG_PAIR;
+
+/* */
+/* Register set pair for initialzation register set definition */
+/* */
+typedef struct _RTMP_RF_REGS {
+	UCHAR Channel;
+	UINT32 R1;
+	UINT32 R2;
+	UINT32 R3;
+	UINT32 R4;
+} RTMP_RF_REGS, *PRTMP_RF_REGS;
+
+typedef struct _FREQUENCY_ITEM {
+	UCHAR Channel;
+	UCHAR N;
+	UCHAR R;
+	UCHAR K;
+} FREQUENCY_ITEM, *PFREQUENCY_ITEM;
+
+typedef int NTSTATUS;
+
+#define STATUS_SUCCESS			0x00
+#define STATUS_UNSUCCESSFUL 		0x01
+
+typedef struct _QUEUE_ENTRY {
+	struct _QUEUE_ENTRY *Next;
+} QUEUE_ENTRY, *PQUEUE_ENTRY;
+
+/* Queue structure */
+typedef struct _QUEUE_HEADER {
+	PQUEUE_ENTRY Head;
+	PQUEUE_ENTRY Tail;
+	ULONG Number;
+} QUEUE_HEADER, *PQUEUE_HEADER;
+
+#endif /* __RTMP_TYPE_H__ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rt_os_net.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rt_os_net.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rt_os_net.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rt_os_net.h	2017-09-23 03:42:49.810675700 +0800
@@ -0,0 +1,644 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RT_OS_NET_H__
+#define __RT_OS_NET_H__
+
+#include "chip/chip_id.h"
+
+typedef VOID *(*RTMP_NET_ETH_CONVERT_DEV_SEARCH)(
+			IN	VOID			*net_dev_, 
+			IN	UCHAR			*pData);
+
+typedef int (*RTMP_NET_PACKET_TRANSMIT)(
+			IN	VOID			*pPacket);
+
+#ifdef LINUX
+#ifdef OS_ABL_FUNC_SUPPORT
+
+/* ========================================================================== */
+/* operators used in NETIF module */
+/* Note: No need to put any compile option here */
+typedef struct _RTMP_DRV_ABL_OPS {
+
+NDIS_STATUS	(*RTMPAllocAdapterBlock)(
+	IN  PVOID					handle,
+	OUT	VOID					**ppAdapter);
+
+VOID	(*RTMPFreeAdapter)(
+	IN	VOID					*pAd);
+
+BOOLEAN (*RtmpRaDevCtrlExit)(
+	IN	VOID					*pAd);
+
+INT (*RtmpRaDevCtrlInit)(
+	IN	VOID					*pAd,
+	IN	RTMP_INF_TYPE			infType);
+
+VOID (*RTMPHandleInterrupt)(
+	IN	VOID					*pAd);
+
+INT (*RTMP_COM_IoctlHandle)(
+	IN	VOID					*pAd, 
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN	INT						cmd,
+	IN	USHORT					subcmd,
+	IN	VOID					*pData,
+	IN	ULONG					Data);
+
+int (*RTMPSendPackets)(
+	IN	NDIS_HANDLE				MiniportAdapterContext,
+	IN	PPNDIS_PACKET			ppPacketArray,
+	IN	UINT					NumberOfPackets,
+	IN	UINT32					PktTotalLen,
+	IN	RTMP_NET_ETH_CONVERT_DEV_SEARCH	Func);
+
+int (*MBSS_PacketSend)(
+	IN	PNDIS_PACKET				pPktSrc, 
+	IN	PNET_DEV					pDev,
+	IN	RTMP_NET_PACKET_TRANSMIT	Func);
+
+int (*WDS_PacketSend)(
+	IN	PNDIS_PACKET				pPktSrc, 
+	IN	PNET_DEV					pDev,
+	IN	RTMP_NET_PACKET_TRANSMIT	Func);
+
+int (*APC_PacketSend)(
+	IN	PNDIS_PACKET				pPktSrc, 
+	IN	PNET_DEV					pDev,
+	IN	RTMP_NET_PACKET_TRANSMIT	Func);
+
+int (*MESH_PacketSend)(
+	IN	PNDIS_PACKET				pPktSrc, 
+	IN	PNET_DEV					pDev,
+	IN	RTMP_NET_PACKET_TRANSMIT	Func);
+
+int (*P2P_PacketSend)(
+	IN	PNDIS_PACKET				pPktSrc, 
+	IN	PNET_DEV					pDev,
+	IN	RTMP_NET_PACKET_TRANSMIT	Func);
+
+INT (*RTMP_AP_IoctlHandle)(
+	IN	VOID					*pAd, 
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN	INT						cmd,
+	IN	USHORT					subcmd,
+	IN	VOID					*pData,
+	IN	ULONG					Data);
+
+INT (*RTMP_STA_IoctlHandle)(
+	IN	VOID					*pAd, 
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN	INT						cmd,
+	IN	USHORT					subcmd,
+	IN	VOID					*pData,
+	IN	ULONG					Data,
+	IN  USHORT                  priv_flags);
+
+VOID (*RTMPDrvOpen)(
+	IN	VOID					*pAd);
+
+VOID (*RTMPDrvClose)(
+	IN	VOID					*pAd,
+	IN	VOID					*net_dev);
+
+VOID (*RTMPInfClose)(
+	IN	VOID					*pAd);
+
+int (*rt28xx_init)(
+	IN	VOID					*pAd, 
+	IN	PSTRING					pDefaultMac,
+	IN	PSTRING					pHostName);
+} RTMP_DRV_ABL_OPS;
+
+extern RTMP_DRV_ABL_OPS *pRtmpDrvOps;
+
+VOID RtmpDrvOpsInit(
+	OUT 	VOID				*pDrvOpsOrg,
+	INOUT	VOID				*pDrvNetOpsOrg,
+	IN		RTMP_PCI_CONFIG		*pPciConfig,
+	IN		RTMP_USB_CONFIG		*pUsbConfig);
+#endif /* OS_ABL_FUNC_SUPPORT */
+#endif /* LINUX */
+
+
+
+
+/* ========================================================================== */
+/* operators used in DRIVER module */
+typedef void (*RTMP_DRV_USB_COMPLETE_HANDLER)(
+			IN	VOID			*pURB);
+
+typedef struct _RTMP_NET_ABL_OPS {
+
+#ifdef RTMP_USB_SUPPORT
+/* net complete handlers */
+RTMP_DRV_USB_COMPLETE_HANDLER	RtmpNetUsbBulkOutDataPacketComplete;
+RTMP_DRV_USB_COMPLETE_HANDLER	RtmpNetUsbBulkOutMLMEPacketComplete;
+RTMP_DRV_USB_COMPLETE_HANDLER	RtmpNetUsbBulkOutNullFrameComplete;
+RTMP_DRV_USB_COMPLETE_HANDLER	RtmpNetUsbBulkOutRTSFrameComplete;
+RTMP_DRV_USB_COMPLETE_HANDLER	RtmpNetUsbBulkOutPsPollComplete;
+RTMP_DRV_USB_COMPLETE_HANDLER	RtmpNetUsbBulkRxComplete;
+
+/* drv complete handlers */
+RTMP_DRV_USB_COMPLETE_HANDLER	RtmpDrvUsbBulkOutDataPacketComplete;
+RTMP_DRV_USB_COMPLETE_HANDLER	RtmpDrvUsbBulkOutMLMEPacketComplete;
+RTMP_DRV_USB_COMPLETE_HANDLER	RtmpDrvUsbBulkOutNullFrameComplete;
+RTMP_DRV_USB_COMPLETE_HANDLER	RtmpDrvUsbBulkOutRTSFrameComplete;
+RTMP_DRV_USB_COMPLETE_HANDLER	RtmpDrvUsbBulkOutPsPollComplete;
+RTMP_DRV_USB_COMPLETE_HANDLER	RtmpDrvUsbBulkRxComplete;
+#endif /* RTMP_USB_SUPPORT */
+
+} RTMP_NET_ABL_OPS;
+
+extern RTMP_NET_ABL_OPS *pRtmpDrvNetOps;
+
+VOID RtmpNetOpsInit(
+	IN VOID				*pNetOpsOrg);
+
+VOID RtmpNetOpsSet(
+	IN VOID				*pNetOpsOrg);
+
+
+
+
+/* ========================================================================== */
+#if defined(RTMP_MODULE_OS) && defined(OS_ABL_FUNC_SUPPORT)
+/* for UTIL/NETIF module in OS ABL mode */
+
+#define RTMPAllocAdapterBlock (((RTMP_DRV_ABL_OPS *)(pRtmpDrvOps))->RTMPAllocAdapterBlock)
+#define RTMPFreeAdapter (((RTMP_DRV_ABL_OPS *)(pRtmpDrvOps))->RTMPFreeAdapter)
+#define RtmpRaDevCtrlExit (((RTMP_DRV_ABL_OPS *)(pRtmpDrvOps))->RtmpRaDevCtrlExit)
+#define RtmpRaDevCtrlInit (((RTMP_DRV_ABL_OPS *)(pRtmpDrvOps))->RtmpRaDevCtrlInit)
+#define RTMPHandleInterrupt (((RTMP_DRV_ABL_OPS *)(pRtmpDrvOps))->RTMPHandleInterrupt)
+#define RTMP_COM_IoctlHandle (((RTMP_DRV_ABL_OPS *)(pRtmpDrvOps))->RTMP_COM_IoctlHandle)
+#define RTMPSendPackets (((RTMP_DRV_ABL_OPS *)(pRtmpDrvOps))->RTMPSendPackets)
+#define MBSS_PacketSend (((RTMP_DRV_ABL_OPS *)(pRtmpDrvOps))->MBSS_PacketSend)
+#define WDS_PacketSend (((RTMP_DRV_ABL_OPS *)(pRtmpDrvOps))->WDS_PacketSend)
+#define APC_PacketSend (((RTMP_DRV_ABL_OPS *)(pRtmpDrvOps))->APC_PacketSend)
+#define MESH_PacketSend (((RTMP_DRV_ABL_OPS *)(pRtmpDrvOps))->MESH_PacketSend)
+#define P2P_PacketSend (((RTMP_DRV_ABL_OPS *)(pRtmpDrvOps))->P2P_PacketSend)
+#define RTMP_AP_IoctlHandle (((RTMP_DRV_ABL_OPS *)(pRtmpDrvOps))->RTMP_AP_IoctlHandle)
+#define RTMP_STA_IoctlHandle (((RTMP_DRV_ABL_OPS *)(pRtmpDrvOps))->RTMP_STA_IoctlHandle)
+#define RTMPDrvOpen (((RTMP_DRV_ABL_OPS *)(pRtmpDrvOps))->RTMPDrvOpen)
+#define RTMPDrvClose (((RTMP_DRV_ABL_OPS *)(pRtmpDrvOps))->RTMPDrvClose)
+#define RTMPInfClose (((RTMP_DRV_ABL_OPS *)(pRtmpDrvOps))->RTMPInfClose)
+#define rt28xx_init (((RTMP_DRV_ABL_OPS *)(pRtmpDrvOps))->rt28xx_init)
+
+#else /* RTMP_MODULE_OS && OS_ABL_FUNC_SUPPORT */
+
+NDIS_STATUS RTMPAllocAdapterBlock(
+	IN	PVOID			handle,
+	OUT VOID   			**ppAdapter);
+
+VOID RTMPFreeAdapter(
+	IN  VOID   			*pAd);
+
+BOOLEAN RtmpRaDevCtrlExit(
+	IN	VOID			*pAd);
+
+INT RtmpRaDevCtrlInit(
+	IN	VOID			*pAd, 
+	IN	RTMP_INF_TYPE	infType);
+
+VOID RTMPHandleInterrupt(
+	IN	VOID			*pAd);
+
+INT RTMP_COM_IoctlHandle(
+	IN	VOID					*pAd, 
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN	INT						cmd,
+	IN	USHORT					subcmd,
+	IN	VOID					*pData,
+	IN	ULONG					Data);
+
+int	RTMPSendPackets(
+	IN	NDIS_HANDLE		MiniportAdapterContext,
+	IN	PPNDIS_PACKET	ppPacketArray,
+	IN	UINT			NumberOfPackets,
+	IN	UINT32			PktTotalLen,
+	IN	RTMP_NET_ETH_CONVERT_DEV_SEARCH	Func);
+
+int MBSS_PacketSend(
+	IN	PNDIS_PACKET				pPktSrc, 
+	IN	PNET_DEV					pDev,
+	IN	RTMP_NET_PACKET_TRANSMIT	Func);
+
+int WDS_PacketSend(
+	IN	PNDIS_PACKET				pPktSrc, 
+	IN	PNET_DEV					pDev,
+	IN	RTMP_NET_PACKET_TRANSMIT	Func);
+
+int APC_PacketSend(
+	IN	PNDIS_PACKET				pPktSrc, 
+	IN	PNET_DEV					pDev,
+	IN	RTMP_NET_PACKET_TRANSMIT	Func);
+
+int MESH_PacketSend(
+	IN	PNDIS_PACKET				pPktSrc, 
+	IN	PNET_DEV					pDev,
+	IN	RTMP_NET_PACKET_TRANSMIT	Func);
+
+int P2P_PacketSend(
+	IN	PNDIS_PACKET				pPktSrc, 
+	IN	PNET_DEV					pDev,
+	IN	RTMP_NET_PACKET_TRANSMIT	Func);
+
+
+#ifdef CONFIG_STA_SUPPORT
+INT RTMP_STA_IoctlHandle(
+	IN	VOID					*pAd, 
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN	INT						cmd,
+	IN	USHORT					subcmd,
+	IN	VOID					*pData,
+	IN	ULONG					Data,
+	IN  USHORT                  priv_flags );
+#endif /* CONFIG_STA_SUPPORT */
+
+VOID RTMPDrvOpen(
+	IN VOID						*pAd);
+
+VOID RTMPDrvClose(
+	IN VOID						*pAd,
+	IN VOID						*net_dev);
+
+VOID RTMPInfClose(
+	IN VOID						*pAd);
+
+int rt28xx_init(
+	IN VOID						*pAd, 
+	IN PSTRING					pDefaultMac, 
+	IN PSTRING					pHostName);
+
+PNET_DEV RtmpPhyNetDevMainCreate(
+	IN VOID						*pAd);
+#endif /* RTMP_MODULE_OS */
+
+
+
+
+/* ========================================================================== */
+int rt28xx_close(VOID *dev);
+int rt28xx_open(VOID *dev);
+
+__inline INT VIRTUAL_IF_UP(VOID *pAd)
+{
+	RT_CMD_INF_UP_DOWN InfConf = { rt28xx_open, rt28xx_close };
+	if (RTMP_COM_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_VIRTUAL_INF_UP,
+						0, &InfConf, 0) != NDIS_STATUS_SUCCESS)
+		return -1;
+	return 0;
+}
+
+__inline VOID VIRTUAL_IF_DOWN(VOID *pAd)
+{
+	RT_CMD_INF_UP_DOWN InfConf = { rt28xx_open, rt28xx_close };
+	RTMP_COM_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_VIRTUAL_INF_DOWN,
+						0, &InfConf, 0);
+	return;
+}
+
+#ifdef RTMP_MODULE_OS
+
+
+#ifdef CONFIG_STA_SUPPORT
+INT rt28xx_sta_ioctl(
+	IN	PNET_DEV		net_dev, 
+	IN	OUT	struct ifreq	*rq, 
+	IN	INT			cmd);
+#endif /* CONFIG_STA_SUPPORT */
+
+PNET_DEV RtmpPhyNetDevInit(
+	IN VOID						*pAd,
+	IN RTMP_OS_NETDEV_OP_HOOK	*pNetHook);
+
+BOOLEAN RtmpPhyNetDevExit(
+	IN VOID						*pAd, 
+	IN PNET_DEV					net_dev);
+
+#endif /* RTMP_MODULE_OS && OS_ABL_FUNC_SUPPORT */
+
+
+VOID RT28xx_MBSS_Init(
+	IN VOID *pAd,
+	IN PNET_DEV main_dev_p);
+VOID RT28xx_MBSS_Remove(
+	IN VOID *pAd);
+INT MBSS_VirtualIF_Open(
+	IN	PNET_DEV			dev_p);
+INT MBSS_VirtualIF_Close(
+	IN	PNET_DEV			dev_p);
+INT MBSS_VirtualIF_PacketSend(
+	IN PNDIS_PACKET			skb_p,
+	IN PNET_DEV				dev_p);
+INT MBSS_VirtualIF_Ioctl(
+	IN PNET_DEV				dev_p, 
+	IN OUT VOID 			*rq_p, 
+	IN INT cmd);
+
+VOID RT28xx_WDS_Init(
+	IN VOID					*pAd,
+	IN PNET_DEV				net_dev);
+INT WdsVirtualIFSendPackets(
+	IN PNDIS_PACKET			pSkb,
+	IN PNET_DEV				dev);
+INT WdsVirtualIF_open(
+	IN	PNET_DEV			dev);
+INT WdsVirtualIF_close(
+	IN PNET_DEV				dev);
+INT WdsVirtualIF_ioctl(
+	IN PNET_DEV				net_dev, 
+	IN OUT VOID				*rq, 
+	IN INT					cmd);
+VOID RT28xx_WDS_Remove(
+	IN VOID					*pAd);
+
+VOID RT28xx_ApCli_Init(
+	IN VOID 				*pAd,
+	IN PNET_DEV				main_dev_p);
+INT ApCli_VirtualIF_Open(
+	IN PNET_DEV				dev_p);
+INT ApCli_VirtualIF_Close(
+	IN	PNET_DEV			dev_p);
+INT ApCli_VirtualIF_PacketSend(
+	IN PNDIS_PACKET 		pPktSrc, 
+	IN PNET_DEV				pDev);
+INT ApCli_VirtualIF_Ioctl(
+	IN PNET_DEV				dev_p, 
+	IN OUT VOID 			*rq_p, 
+	IN INT 					cmd);
+VOID RT28xx_ApCli_Remove(
+	IN VOID 				*pAd);
+
+VOID RTMP_Mesh_Init(
+	IN VOID					*pAd,
+	IN PNET_DEV				main_dev_p,
+	IN PSTRING				pHostName);
+VOID RTMP_Mesh_Remove(
+	IN VOID 				*pAd);
+INT Mesh_VirtualIF_Open(
+	IN PNET_DEV				pDev);
+INT Mesh_VirtualIF_Close(
+	IN	PNET_DEV			pDev);
+INT Mesh_VirtualIF_PacketSend(
+	IN PNDIS_PACKET 		pPktSrc, 
+	IN PNET_DEV				pDev);
+INT Mesh_VirtualIF_Ioctl(
+	IN PNET_DEV				dev_p, 
+	IN OUT VOID				*rq_p, 
+	IN INT 					cmd);
+
+VOID RTMP_P2P_Init(
+		 IN VOID			 *pAd,
+		 IN PNET_DEV main_dev_p);
+ 
+ INT P2P_VirtualIF_Open(
+	 IN  PNET_DEV	 dev_p);
+ 
+ INT P2P_VirtualIF_Close(
+	 IN  PNET_DEV	 dev_p);
+ 
+ INT P2P_VirtualIF_PacketSend(
+	 IN PNDIS_PACKET	 skb_p, 
+	 IN PNET_DEV		 dev_p);
+ 
+ INT P2P_VirtualIF_Ioctl(
+	 IN PNET_DEV			 dev_p,
+	 IN OUT VOID	 *rq_p,
+	 IN INT cmd);
+
+VOID RTMP_P2P_Remove(
+	IN VOID				*pAd);
+
+
+/* communication with RALINK DRIVER module in NET module */
+/* general */
+#define RTMP_DRIVER_NET_DEV_GET(__pAd, __pNetDev)							\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_NETDEV_GET, 0, __pNetDev, 0)
+
+#define RTMP_DRIVER_NET_DEV_SET(__pAd, __pNetDev)							\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_NETDEV_SET, 0, __pNetDev, 0)
+
+#define RTMP_DRIVER_OP_MODE_GET(__pAd, __pOpMode)							\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_OPMODE_GET, 0, __pOpMode, 0)
+
+#define RTMP_DRIVER_IW_STATS_GET(__pAd, __pIwStats)							\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_INF_IW_STATUS_GET, 0, __pIwStats, 0)
+
+#define RTMP_DRIVER_INF_STATS_GET(__pAd, __pInfStats)						\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_INF_STATS_GET, 0, __pInfStats, 0)
+
+#define RTMP_DRIVER_INF_TYPE_GET(__pAd, __pInfType)							\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_INF_TYPE_GET, 0, __pInfType, 0)
+
+#define RTMP_DRIVER_TASK_LIST_GET(__pAd, __pList)							\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_TASK_LIST_GET, 0, __pList, 0)
+
+#define RTMP_DRIVER_NIC_NOT_EXIST_SET(__pAd)								\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_NIC_NOT_EXIST, 0, NULL, 0)
+
+#ifdef CONFIG_APSTA_MIXED_SUPPORT
+#define RTMP_DRIVER_MAX_IN_BITS_SET(__pAd, __MaxInBit)							\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_MAX_IN_BIT, 0, NULL, __MaxInBit)
+#endif /* CONFIG_APSTA_MIXED_SUPPORT */
+#ifdef CONFIG_STA_SUPPORT
+#ifdef CONFIG_PM
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND
+
+#define RTMP_DRIVER_USB_DEV_GET(__pAd, __pUsbDev)                                                       \
+        RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_USB_DEV_GET, 0, __pUsbDev, 0)
+
+#define RTMP_DRIVER_USB_INTF_GET(__pAd, __pUsbIntf)                                                     \
+        RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_USB_INTF_GET, 0, __pUsbIntf, 0)
+
+#define RTMP_DRIVER_ADAPTER_SUSPEND_SET(__pAd)								\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_ADAPTER_SUSPEND_SET, 0, NULL, 0)
+
+#define RTMP_DRIVER_ADAPTER_SUSPEND_CLEAR(__pAd)								\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_ADAPTER_SUSPEND_CLEAR, 0, NULL, 0)
+
+#define RTMP_DRIVER_ADAPTER_SUSPEND_TEST(__pAd, __flag)							\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_ADAPTER_SUSPEND_TEST, 0,  __flag, 0)
+
+#define RTMP_DRIVER_ADAPTER_CPU_SUSPEND_SET(__pAd)								\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_ADAPTER_CPU_SUSPEND_SET, 0, NULL, 0)
+
+#define RTMP_DRIVER_ADAPTER_CPU_SUSPEND_CLEAR(__pAd)								\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_ADAPTER_CPU_SUSPEND_CLEAR, 0, NULL, 0)
+
+#define RTMP_DRIVER_ADAPTER_CPU_SUSPEND_TEST(__pAd, __flag)								\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_ADAPTER_CPU_SUSPEND_TEST, 0,  __flag, 0)
+
+#define RTMP_DRIVER_ADAPTER_IDLE_RADIO_OFF_TEST(__pAd, __flag)								\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_ADAPTER_IDLE_RADIO_OFF_TEST, 0,  __flag, 0)
+
+#define RTMP_DRIVER_ADAPTER_RT28XX_USB_ASICRADIO_OFF(__pAd)								\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_ADAPTER_RT28XX_USB_ASICRADIO_OFF, 0, NULL, 0)
+
+#define RTMP_DRIVER_ADAPTER_RT28XX_USB_ASICRADIO_ON(__pAd)								\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_ADAPTER_RT28XX_USB_ASICRADIO_ON, 0, NULL, 0)
+
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */
+#endif /* CONFIG_PM */	
+
+#define RTMP_DRIVER_AP_SSID_GET(__pAd, pData)								\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_AP_BSSID_GET, 0, pData, 0)
+#endif /* CONFIG_STA_SUPPORT */
+
+#define RTMP_DRIVER_VIRTUAL_INF_NUM_GET(__pAd, __pIfNum)					\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_VIRTUAL_INF_GET, 0, __pIfNum, 0)
+
+#define RTMP_DRIVER_CHANNEL_GET(__pAd, __Channel)							\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_SIOCGIWFREQ, 0, __Channel, 0)
+
+#define RTMP_DRIVER_IOCTL_SANITY_CHECK(__pAd)								\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_SANITY_CHECK, 0, NULL, 0)
+
+#define RTMP_DRIVER_BITRATE_GET(__pAd, __pBitRate)							\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_AP_SIOCGIWRATEQ, 0, __pBitRate, 0)
+
+#define RTMP_DRIVER_MAIN_INF_CREATE(__pAd, __ppNetDev)						\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_INF_MAIN_CREATE, 0, __ppNetDev, 0)
+
+#define RTMP_DRIVER_MAIN_INF_GET(__pAd, __pInfId)							\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_INF_MAIN_ID_GET, 0, __pInfId, 0)
+
+#define RTMP_DRIVER_MAIN_INF_CHECK(__pAd, __InfId)							\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_INF_MAIN_CHECK, 0, NULL, __InfId)
+
+#define RTMP_DRIVER_P2P_INF_CHECK(__pAd, __InfId)							\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_INF_P2P_CHECK, 0, NULL, __InfId)
+
+/* cfg80211 */
+#define RTMP_DRIVER_CFG80211_START(__pAd)									\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_CFG80211_CFG_START, 0, NULL, 0)
+
+
+#ifdef RT_CFG80211_SUPPORT
+#define RTMP_DRIVER_80211_CB_GET(__pAd, __ppCB)							\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_80211_CB_GET, 0, __ppCB, 0)
+#define RTMP_DRIVER_80211_CB_SET(__pAd, __pCB)							\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_80211_CB_SET, 0, __pCB, 0)
+#define RTMP_DRIVER_80211_CHAN_SET(__pAd, __pChan)						\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_80211_CHAN_SET, 0, __pChan, 0)
+#define RTMP_DRIVER_80211_VIF_SET(__pAd, __Filter, __IfType)			\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_80211_VIF_CHG, 0, &__Filter, __IfType)
+#define RTMP_DRIVER_80211_SCAN(__pAd)									\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_80211_SCAN, 0, NULL, 0)
+#define RTMP_DRIVER_80211_IBSS_JOIN(__pAd, __pInfo)						\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_80211_IBSS_JOIN, 0, __pInfo, 0)
+#define RTMP_DRIVER_80211_STA_LEAVE(__pAd)								\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_80211_STA_LEAVE, 0, NULL, 0)
+#define RTMP_DRIVER_80211_STA_GET(__pAd, __pStaInfo)					\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_80211_STA_GET, 0, __pStaInfo, 0)
+#define RTMP_DRIVER_80211_KEY_ADD(__pAd, __pKeyInfo)					\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_80211_KEY_ADD, 0, __pKeyInfo, 0)
+#define RTMP_DRIVER_80211_KEY_DEFAULT_SET(__pAd, __KeyId)				\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_80211_KEY_DEFAULT_SET, 0, NULL, __KeyId)
+#define RTMP_DRIVER_80211_CONNECT(__pAd, __pConnInfo)					\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_80211_CONNECT_TO, 0, __pConnInfo, 0)
+#define RTMP_DRIVER_80211_RFKILL(__pAd, __pActive)						\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_80211_RFKILL, 0, __pActive, 0)
+#define RTMP_DRIVER_80211_REG_NOTIFY(__pAd, __pNotify)					\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_80211_REG_NOTIFY_TO, 0, __pNotify, 0)
+#define RTMP_DRIVER_80211_UNREGISTER(__pAd, __pNetDev)					\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_80211_UNREGISTER, 0, __pNetDev, 0)
+#define RTMP_DRIVER_80211_BANDINFO_GET(__pAd, __pBandInfo)				\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_80211_BANDINFO_GET, 0, __pBandInfo, 0)
+#endif /* RT_CFG80211_SUPPORT */
+
+/* mesh */
+#define RTMP_DRIVER_MESH_REMOVE(__pAd)										\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_MESH_REMOVE, 0, NULL, 0)
+
+/* inf ppa */
+#define RTMP_DRIVER_INF_PPA_INIT(__pAd)										\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_INF_PPA_INIT, 0, NULL, 0)
+
+#define RTMP_DRIVER_INF_PPA_EXIT(__pAd)										\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_INF_PPA_EXIT, 0, NULL, 0)
+
+/* pci */
+#define RTMP_DRIVER_IRQ_INIT(__pAd)											\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_IRQ_INIT, 0, NULL, 0)
+
+#define RTMP_DRIVER_IRQ_RELEASE(__pAd)										\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_IRQ_RELEASE, 0, NULL, 0)
+
+#define RTMP_DRIVER_PCI_MSI_ENABLE(__pAd, __pPciDev)						\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_MSI_ENABLE, 0, __pPciDev, 0)
+
+#define RTMP_DRIVER_PCI_SUSPEND(__pAd)										\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_PCI_SUSPEND, 0, NULL, 0)
+
+#define RTMP_DRIVER_PCI_RESUME(__pAd)										\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_PCI_RESUME, 0, NULL, 0)
+
+#define RTMP_DRIVER_PCI_CSR_SET(__pAd, __Address)							\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_PCI_CSR_SET, 0, NULL, __Address)
+
+#define RTMP_DRIVER_PCIE_INIT(__pAd, __pPciDev)								\
+{																			\
+	RT_CMD_PCIE_INIT __Config, *__pConfig = &__Config;						\
+	__pConfig->pPciDev = __pPciDev;											\
+	__pConfig->ConfigDeviceID = PCI_DEVICE_ID;								\
+	__pConfig->ConfigSubsystemVendorID = PCI_SUBSYSTEM_VENDOR_ID;			\
+	__pConfig->ConfigSubsystemID = PCI_SUBSYSTEM_ID;						\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_PCIE_INIT, 0, __pConfig, 0);\
+}
+
+/* usb */
+#define RTMP_DRIVER_USB_MORE_FLAG_SET(__pAd, __pConfig)						\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_USB_MORE_FLAG_SET, 0, __pConfig, 0)
+
+#define RTMP_DRIVER_USB_CONFIG_INIT(__pAd, __pConfig)						\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_USB_CONFIG_INIT, 0, __pConfig, 0)
+
+#define RTMP_DRIVER_USB_SUSPEND(__pAd, __bIsRunning)						\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_USB_SUSPEND, 0, NULL, __bIsRunning)
+
+#define RTMP_DRIVER_USB_RESUME(__pAd)										\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_USB_RESUME, 0, NULL, 0)
+
+/* ap */
+#define RTMP_DRIVER_AP_BITRATE_GET(__pAd, __pConfig)							\
+	RTMP_AP_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_AP_SIOCGIWRATEQ, 0, __pConfig, 0)
+
+#define RTMP_DRIVER_AP_MAIN_OPEN(__pAd)										\
+	RTMP_AP_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_MAIN_OPEN, 0, NULL, 0)
+
+/* sta */
+#define RTMP_DRIVER_STA_DEV_TYPE_SET(__pAd, __Type)							\
+	RTMP_STA_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_ORI_DEV_TYPE_SET, 0, NULL, __Type, __Type)
+
+#define RTMP_DRIVER_MAC_ADDR_GET(__pAd, __pMacAddr)							\
+	RTMP_COM_IoctlHandle(__pAd, NULL, CMD_RTPRIV_IOCTL_MAC_ADDR_GET, 0, __pMacAddr, 0)
+	
+#endif /* __RT_OS_NET_H__ */
+
+/* End of rt_os_net.h */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rt_os_util.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rt_os_util.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rt_os_util.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rt_os_util.h	2017-09-23 03:42:49.814675688 +0800
@@ -0,0 +1,1041 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RT_OS_UTIL_H__
+#define __RT_OS_UTIL_H__
+
+/* ============================ rt_linux.c ================================== */
+/* General */
+VOID RtmpUtilInit(VOID);
+
+/* OS Time */
+VOID RTMPusecDelay(
+	IN	ULONG					usec);
+
+VOID RtmpOsMsDelay(
+	IN	ULONG					msec);
+
+void RTMP_GetCurrentSystemTime(
+	IN	LARGE_INTEGER			*time);
+
+void RTMP_GetCurrentSystemTick(
+	IN	ULONG					*pNow);
+
+VOID RtmpOsWait(
+	IN	UINT32					Time);
+
+UINT32 RtmpOsTimerAfter(
+	IN	ULONG					a,
+	IN	ULONG					b);
+
+UINT32 RtmpOsTimerBefore(
+	IN	ULONG					a,
+	IN	ULONG					b);
+
+VOID RtmpOsGetSystemUpTime(
+	IN	ULONG					*pTime);
+
+UINT32 RtmpOsTickUnitGet(VOID);
+
+/* OS Memory */
+NDIS_STATUS os_alloc_mem(
+	IN	VOID					*pReserved,
+	OUT	UCHAR					**mem,
+	IN	ULONG					size);
+
+NDIS_STATUS os_alloc_mem_suspend(
+	IN	VOID					*pReserved,
+	OUT	UCHAR					**mem,
+	IN	ULONG					size);
+
+NDIS_STATUS os_free_mem(
+	IN	VOID					*pReserved,
+	IN	PVOID					mem);
+
+NDIS_STATUS AdapterBlockAllocateMemory(
+	IN	PVOID					handle,
+	OUT	PVOID					*ppAd,
+	IN	UINT32					SizeOfpAd);
+
+VOID *RtmpOsVmalloc(
+	IN	ULONG					Size);
+
+VOID RtmpOsVfree(
+	IN	VOID					*pMem);
+
+ULONG RtmpOsCopyFromUser(
+	OUT	VOID					*to,
+	IN	const void				*from,
+	IN	ULONG					n);
+
+ULONG RtmpOsCopyToUser(
+	OUT VOID					*to,
+	IN	const void				*from,
+	IN	ULONG					n);
+
+BOOLEAN RtmpOsStatsAlloc(
+	IN	VOID					**ppStats,
+	IN	VOID					**ppIwStats);
+
+/* OS Packet */
+PNDIS_PACKET RtmpOSNetPktAlloc(
+	IN	VOID					*pReserved,
+	IN	int						size);
+
+PNDIS_PACKET RTMP_AllocateFragPacketBuffer(
+	IN	VOID					*pReserved,
+	IN	ULONG					Length);
+
+NDIS_STATUS RTMPAllocateNdisPacket(
+	IN	VOID					*pReserved,
+	OUT PNDIS_PACKET			*ppPacket,
+	IN	PUCHAR					pHeader,
+	IN	UINT					HeaderLen,
+	IN	PUCHAR					pData,
+	IN	UINT					DataLen);
+
+VOID RTMPFreeNdisPacket(
+	IN	VOID					*pReserved,
+	IN	PNDIS_PACKET			pPacket);
+
+NDIS_STATUS Sniff2BytesFromNdisBuffer(
+	IN  PNDIS_BUFFER			pFirstBuffer,
+	IN  UCHAR           		DesiredOffset,
+	OUT PUCHAR          		pByte0,
+	OUT PUCHAR          		pByte1);
+
+void RTMP_QueryPacketInfo(
+	IN  PNDIS_PACKET			pPacket,
+	OUT PACKET_INFO  			*pPacketInfo,
+	OUT PUCHAR		 			*pSrcBufVA,
+	OUT	UINT		 			*pSrcBufLen);
+
+PNDIS_PACKET DuplicatePacket(
+	IN	PNET_DEV				pNetDev,
+	IN	PNDIS_PACKET			pPacket,
+	IN	UCHAR					FromWhichBSSID);
+
+PNDIS_PACKET duplicate_pkt(
+	IN	PNET_DEV				pNetDev,
+	IN	PUCHAR					pHeader802_3,
+    IN  UINT            		HdrLen,
+	IN	PUCHAR					pData,
+	IN	ULONG					DataSize,
+	IN	UCHAR					FromWhichBSSID);
+
+PNDIS_PACKET duplicate_pkt_with_TKIP_MIC(
+	IN	VOID					*pReserved,
+	IN	PNDIS_PACKET			pOldPkt);
+
+PNDIS_PACKET duplicate_pkt_with_VLAN(
+	IN	PNET_DEV				pNetDev,
+	IN	USHORT					VLAN_VID,
+	IN	USHORT					VLAN_Priority,
+	IN	PUCHAR					pHeader802_3,
+    IN  UINT            		HdrLen,
+	IN	PUCHAR					pData,
+	IN	ULONG					DataSize,
+	IN	UCHAR					FromWhichBSSID,
+	IN	UCHAR					*TPID);
+
+typedef void (*RTMP_CB_8023_PACKET_ANNOUNCE)(
+			IN	VOID			*pCtrlBkPtr, 
+			IN	PNDIS_PACKET	pPacket,
+			IN	UCHAR			OpMode);
+
+BOOLEAN RTMPL2FrameTxAction(
+	IN  VOID					*pCtrlBkPtr,
+	IN	PNET_DEV				pNetDev,
+	IN	RTMP_CB_8023_PACKET_ANNOUNCE _announce_802_3_packet,
+	IN	UCHAR					apidx,
+	IN	PUCHAR					pData,
+	IN	UINT32					data_len,
+	IN	UCHAR			OpMode);
+
+PNDIS_PACKET ExpandPacket(
+	IN	VOID					*pReserved,
+	IN	PNDIS_PACKET			pPacket,
+	IN	UINT32					ext_head_len,
+	IN	UINT32					ext_tail_len);
+
+PNDIS_PACKET ClonePacket(
+	IN	VOID					*pReserved,
+	IN	PNDIS_PACKET			pPacket,
+	IN	PUCHAR					pData,
+	IN	ULONG					DataSize);
+
+void wlan_802_11_to_802_3_packet(
+	IN	PNET_DEV				pNetDev,
+	IN	UCHAR					OpMode,
+	IN	USHORT					VLAN_VID,
+	IN	USHORT					VLAN_Priority,
+	IN	PNDIS_PACKET			pRxPacket,
+	IN	UCHAR					*pData,
+	IN	ULONG					DataSize,
+	IN	PUCHAR					pHeader802_3,
+	IN  UCHAR					FromWhichBSSID,
+	IN	UCHAR					*TPID);
+
+void send_monitor_packets(
+	IN	PNET_DEV				pNetDev,
+	IN	PNDIS_PACKET			pRxPacket,
+	IN	PHEADER_802_11			pHeader,
+	IN	UCHAR					*pData,
+	IN	USHORT					DataSize,
+	IN	UCHAR					L2PAD,
+	IN	UCHAR					PHYMODE,
+	IN	UCHAR					BW,
+	IN	UCHAR					ShortGI,
+	IN	UCHAR					MCS,
+	IN	UCHAR					AMPDU,
+	IN	UCHAR					STBC,
+	IN	UCHAR					RSSI1,
+	IN	UCHAR					BssMonitorFlag11n,
+	IN	UCHAR					*pDevName,
+	IN	UCHAR					Channel,
+	IN	UCHAR					CentralChannel,
+	IN	UINT32					MaxRssi);
+
+UCHAR VLAN_8023_Header_Copy(
+	IN	USHORT					VLAN_VID,
+	IN	USHORT					VLAN_Priority,
+	IN	PUCHAR					pHeader802_3,
+	IN	UINT            		HdrLen,
+	OUT PUCHAR					pData,
+	IN	UCHAR					FromWhichBSSID,
+	IN	UCHAR					*TPID);
+
+VOID RtmpOsPktBodyCopy(
+	IN	PNET_DEV				pNetDev,
+	IN	PNDIS_PACKET			pNetPkt,
+	IN	ULONG					ThisFrameLen,
+	IN	PUCHAR					pData);
+
+INT RtmpOsIsPktCloned(
+	IN	PNDIS_PACKET			pNetPkt);
+
+PNDIS_PACKET RtmpOsPktCopy(
+	IN	PNDIS_PACKET			pNetPkt);
+
+PNDIS_PACKET RtmpOsPktClone(
+	IN	PNDIS_PACKET			pNetPkt);
+
+VOID RtmpOsPktDataPtrAssign(
+	IN	PNDIS_PACKET			pNetPkt,
+	IN	UCHAR					*pData);
+
+VOID RtmpOsPktLenAssign(
+	IN	PNDIS_PACKET			pNetPkt,
+	IN	LONG					Len);
+
+VOID RtmpOsPktTailAdjust(
+	IN	PNDIS_PACKET			pNetPkt,
+	IN	UINT					removedTagLen);
+
+PUCHAR RtmpOsPktTailBufExtend(
+	IN	PNDIS_PACKET			pNetPkt,
+	IN	UINT					Len);
+
+PUCHAR RtmpOsPktHeadBufExtend(
+	IN	PNDIS_PACKET			pNetPkt,
+	IN	UINT					Len);
+
+VOID RtmpOsPktReserve(
+	IN	PNDIS_PACKET			pNetPkt,
+	IN	UINT					Len);
+
+VOID RtmpOsPktProtocolAssign(
+	IN	PNDIS_PACKET			pNetPkt);
+
+VOID RtmpOsPktInfPpaSend(
+	IN	PNDIS_PACKET			pNetPkt);
+
+VOID RtmpOsPktRcvHandle(
+	IN	PNDIS_PACKET			pNetPkt);
+
+VOID RtmpOsPktNatMagicTag(
+	IN	PNDIS_PACKET			pNetPkt);
+
+VOID RtmpOsPktNatNone(
+	IN	PNDIS_PACKET			pNetPkt);
+
+VOID RtmpOsPktInit(
+	IN	PNDIS_PACKET			pNetPkt,
+	IN	PNET_DEV				pNetDev,
+	IN	UCHAR					*pData,
+	IN	USHORT					DataSize);
+
+PNDIS_PACKET RtmpOsPktIappMakeUp(
+	IN	PNET_DEV				pNetDev,
+	IN	UINT8					*pMac);
+
+BOOLEAN RtmpOsPktOffsetInit(VOID);
+
+UINT16 RtmpOsNtohs(
+	IN	UINT16					Value);
+
+UINT16 RtmpOsHtons(
+	IN	UINT16					Value);
+
+UINT32 RtmpOsNtohl(
+	IN	UINT32					Value);
+
+UINT32 RtmpOsHtonl(
+	IN	UINT32					Value);
+
+/* OS File */
+RTMP_OS_FD RtmpOSFileOpen(char *pPath,  int flag, int mode);
+int RtmpOSFileClose(RTMP_OS_FD osfd);
+void RtmpOSFileSeek(RTMP_OS_FD osfd, int offset);
+int RtmpOSFileRead(RTMP_OS_FD osfd, char *pDataPtr, int readLen);
+int RtmpOSFileWrite(RTMP_OS_FD osfd, char *pDataPtr, int writeLen);
+
+INT32 RtmpOsFileIsErr(
+	IN	VOID					*pFile);
+
+void RtmpOSFSInfoChange(
+	IN	RTMP_OS_FS_INFO			*pOSFSInfoOrg,
+	IN	BOOLEAN					bSet);
+
+/* OS Network Interface */
+int RtmpOSNetDevAddrSet(
+	IN UCHAR					OpMode,
+	IN PNET_DEV 				pNetDev,
+	IN PUCHAR					pMacAddr,
+	IN PUCHAR					dev_name);
+
+void RtmpOSNetDevClose(
+	IN PNET_DEV					pNetDev);
+
+void RtmpOSNetDevFree(
+	IN	PNET_DEV				pNetDev);
+
+INT RtmpOSNetDevAlloc(
+	IN	PNET_DEV				*new_dev_p,
+	IN	UINT32					privDataSize);
+
+INT RtmpOSNetDevOpsAlloc(
+	IN	PVOID					*pNetDevOps);
+
+
+PNET_DEV RtmpOSNetDevGetByName(
+	IN	PNET_DEV				pNetDev,
+	IN	PSTRING					pDevName);
+
+void RtmpOSNetDeviceRefPut(
+	IN	PNET_DEV				pNetDev);
+
+INT RtmpOSNetDevDestory(
+	IN	VOID					*pReserved,
+	IN	PNET_DEV				pNetDev);
+
+void RtmpOSNetDevDetach(
+	IN	PNET_DEV				pNetDev);
+
+int RtmpOSNetDevAttach(
+	IN	UCHAR					OpMode,
+	IN	PNET_DEV				pNetDev, 
+	IN	RTMP_OS_NETDEV_OP_HOOK	*pDevOpHook);
+
+PNET_DEV RtmpOSNetDevCreate(
+	IN	INT32					MC_RowID,
+	IN	UINT32					*pIoctlIF,
+	IN	INT 					devType,
+	IN	INT						devNum,
+	IN	INT						privMemSize,
+	IN	PSTRING					pNamePrefix);
+
+BOOLEAN RtmpOSNetDevIsUp(
+	IN	VOID					*pDev);
+
+unsigned char *RtmpOsNetDevGetPhyAddr(
+	IN	VOID					*pDev);
+
+VOID RtmpOsNetQueueStart(
+	IN	PNET_DEV				pDev);
+
+VOID RtmpOsNetQueueStop(
+	IN	PNET_DEV				pDev);
+
+VOID RtmpOsNetQueueWake(
+	IN	PNET_DEV				pDev);
+
+VOID RtmpOsSetPktNetDev(
+	IN	VOID					*pPkt,
+	IN	VOID					*pDev);
+
+PNET_DEV RtmpOsPktNetDevGet(
+	IN	VOID					*pPkt);
+
+char *RtmpOsGetNetDevName(
+	IN	VOID					*pDev);
+
+VOID RtmpOsSetNetDevPriv(
+	IN	VOID					*pDev,
+	IN	VOID					*pPriv);
+
+VOID *RtmpOsGetNetDevPriv(
+	IN	VOID					*pDev);
+
+VOID RtmpOsSetNetDevType(
+	IN	VOID					*pDev,
+	IN	USHORT					Type);
+
+VOID RtmpOsSetNetDevTypeMonitor(
+	IN	VOID					*pDev);
+
+/* OS Semaphore */
+VOID RtmpOsCmdUp(
+	IN	RTMP_OS_TASK			*pCmdQTask);
+
+BOOLEAN RtmpOsSemaInitLocked(
+	IN	RTMP_OS_SEM				*pSemOrg,
+	IN	LIST_HEADER				*pSemList);
+
+BOOLEAN RtmpOsSemaInit(
+	IN	RTMP_OS_SEM				*pSemOrg,
+	IN	LIST_HEADER				*pSemList);
+
+BOOLEAN RtmpOsSemaDestory(
+	IN	RTMP_OS_SEM				*pSemOrg);
+
+INT32 RtmpOsSemaWaitInterruptible(
+	IN	RTMP_OS_SEM				*pSemOrg);
+
+VOID RtmpOsSemaWakeUp(
+	IN	RTMP_OS_SEM				*pSemOrg);
+
+VOID RtmpOsMlmeUp(
+	IN	RTMP_OS_TASK			*pMlmeQTask);
+
+/* OS Task */
+BOOLEAN RtmpOsTaskletSche(
+	IN	RTMP_NET_TASK_STRUCT	*pTasklet);
+
+BOOLEAN RtmpOsTaskletInit(
+	IN	RTMP_NET_TASK_STRUCT	*pTasklet,
+	IN	VOID					(*pFunc)(unsigned long data),
+	IN	ULONG					Data,
+	IN	LIST_HEADER				*pTaskletList);
+
+BOOLEAN RtmpOsTaskletKill(
+	IN	RTMP_NET_TASK_STRUCT	*pTasklet);
+
+VOID RtmpOsTaskletDataAssign(
+	IN	RTMP_NET_TASK_STRUCT	*pTasklet,
+	IN	ULONG					Data);
+
+VOID RtmpOsTaskWakeUp(
+	IN	RTMP_OS_TASK			*pTaskOrg);
+
+INT32 RtmpOsTaskIsKilled(
+	IN	RTMP_OS_TASK			*pTaskOrg);
+
+BOOLEAN RtmpOsCheckTaskLegality(
+	IN	RTMP_OS_TASK			*pTaskOrg);
+
+BOOLEAN RtmpOSTaskAlloc(
+	IN	RTMP_OS_TASK			*pTask,
+	IN	LIST_HEADER				*pTaskList);
+
+VOID RtmpOSTaskFree(
+	IN	RTMP_OS_TASK			*pTask);
+
+NDIS_STATUS RtmpOSTaskKill(
+	IN	RTMP_OS_TASK			*pTaskOrg);
+
+INT RtmpOSTaskNotifyToExit(
+	IN	RTMP_OS_TASK			*pTaskOrg);
+
+VOID RtmpOSTaskCustomize(
+	IN	RTMP_OS_TASK			*pTaskOrg);
+
+NDIS_STATUS RtmpOSTaskAttach(
+	IN	RTMP_OS_TASK			*pTaskOrg,
+	IN	RTMP_OS_TASK_CALLBACK	fn,
+	IN	ULONG					arg);
+
+NDIS_STATUS RtmpOSTaskInit(
+	IN	RTMP_OS_TASK			*pTaskOrg,
+	IN	PSTRING					pTaskName,
+	IN	VOID					*pPriv,
+	IN	LIST_HEADER				*pTaskList,
+	IN	LIST_HEADER				*pSemList);
+
+BOOLEAN RtmpOSTaskWait(
+	IN	VOID					*pReserved,
+	IN	RTMP_OS_TASK			*pTaskOrg,
+	IN	INT32					*pStatus);
+
+VOID *RtmpOsTaskDataGet(
+	IN	RTMP_OS_TASK			*pTaskOrg);
+
+INT32 RtmpThreadPidKill(
+	IN	RTMP_OS_PID				PID);
+
+/* OS Timer */
+VOID RTMP_SetPeriodicTimer(
+	IN	NDIS_MINIPORT_TIMER		*pTimerOrg, 
+	IN	unsigned long			timeout);
+
+VOID RTMP_OS_Init_Timer(
+	IN	VOID 					*pReserved,
+	IN	NDIS_MINIPORT_TIMER		*pTimerOrg, 
+	IN	TIMER_FUNCTION			function,
+	IN	PVOID					data,
+	IN	LIST_HEADER				*pTimerList);
+
+VOID RTMP_OS_Add_Timer(
+	IN	NDIS_MINIPORT_TIMER		*pTimerOrg,
+	IN	unsigned long			timeout);
+
+VOID RTMP_OS_Mod_Timer(
+	IN	NDIS_MINIPORT_TIMER		*pTimerOrg,
+	IN	unsigned long			timeout);
+
+VOID RTMP_OS_Del_Timer(
+	IN	NDIS_MINIPORT_TIMER		*pTimerOrg,
+	OUT	BOOLEAN					*pCancelled);
+
+VOID RTMP_OS_Release_Timer(
+	IN	NDIS_MINIPORT_TIMER		*pTimerOrg);
+
+BOOLEAN RTMP_OS_Alloc_Rsc(
+	IN	LIST_HEADER				*pRscList,
+	IN	VOID 					*pRsc,
+	IN	UINT32					RscLen);
+
+VOID RTMP_OS_Free_Rscs(
+	IN	LIST_HEADER				*pRscList);
+
+/* OS Lock */
+BOOLEAN RtmpOsAllocateLock(
+	IN	NDIS_SPIN_LOCK			*pLock,
+	IN	LIST_HEADER				*pLockList);
+
+VOID RtmpOsFreeSpinLock(
+	IN	NDIS_SPIN_LOCK			*pLockOrg);
+
+VOID RtmpOsSpinLockBh(
+	IN	NDIS_SPIN_LOCK			*pLockOrg);
+
+VOID RtmpOsSpinUnLockBh(
+	IN	NDIS_SPIN_LOCK			*pLockOrg);
+
+VOID RtmpOsIntLock(
+	IN	NDIS_SPIN_LOCK			*pLockOrg,
+	IN	ULONG					*pIrqFlags);
+
+VOID RtmpOsIntUnLock(
+	IN	NDIS_SPIN_LOCK			*pLockOrg,
+	IN	ULONG					IrqFlags);
+
+/* OS PID */
+VOID RtmpOsGetPid(
+	IN	ULONG					*pDst,
+	IN	ULONG					PID);
+
+VOID RtmpOsTaskPidInit(
+	IN	RTMP_OS_PID				*pPid);
+
+/* OS I/O */
+VOID RTMP_PCI_Writel(
+	IN	ULONG					Value,
+	IN	VOID					*pAddr);
+
+VOID RTMP_PCI_Writew(
+	IN	ULONG					Value,
+	IN	VOID					*pAddr);
+
+VOID RTMP_PCI_Writeb(
+	IN	ULONG					Value,
+	IN	VOID					*pAddr);
+
+ULONG RTMP_PCI_Readl(
+	IN	VOID					*pAddr);
+
+ULONG RTMP_PCI_Readw(
+	IN	VOID					*pAddr);
+
+ULONG RTMP_PCI_Readb(
+	IN	VOID					*pAddr);
+
+int RtmpOsPciConfigReadWord(
+	IN	VOID					*pDev,
+	IN	UINT32					Offset,
+	OUT UINT16					*pValue);
+
+int RtmpOsPciConfigWriteWord(
+	IN	VOID					*pDev,
+	IN	UINT32					Offset,
+	IN	UINT16					Value);
+
+int RtmpOsPciConfigReadDWord(
+	IN	VOID					*pDev,
+	IN	UINT32					Offset,
+	OUT UINT32					*pValue);
+
+int RtmpOsPciConfigWriteDWord(
+	IN	VOID					*pDev,
+	IN	UINT32					Offset,
+	IN	UINT32					Value);
+
+int RtmpOsPciFindCapability(
+	IN	VOID					*pDev,
+	IN	int						Cap);
+
+VOID *RTMPFindHostPCIDev(
+    IN	VOID					*pPciDevSrc);
+
+int RtmpOsPciMsiEnable(
+	IN	VOID					*pDev);
+
+VOID RtmpOsPciMsiDisable(
+	IN	VOID					*pDev);
+
+/* OS Wireless */
+ULONG RtmpOsMaxScanDataGet(VOID);
+
+/* OS Interrutp */
+INT32 RtmpOsIsInInterrupt(VOID);
+
+/* OS USB */
+VOID *RtmpOsUsbUrbDataGet(
+	IN	VOID					*pUrb);
+
+NTSTATUS RtmpOsUsbUrbStatusGet(
+	IN	VOID					*pUrb);
+
+ULONG RtmpOsUsbUrbLenGet(
+	IN	VOID					*pUrb);
+
+/* OS Atomic */
+BOOLEAN RtmpOsAtomicInit(
+	IN	RTMP_OS_ATOMIC		*pAtomic,
+	IN	LIST_HEADER			*pAtomicList);
+
+LONG RtmpOsAtomicRead(
+	IN	RTMP_OS_ATOMIC		*pAtomic);
+
+VOID RtmpOsAtomicDec(
+	IN	RTMP_OS_ATOMIC		*pAtomic);
+
+VOID RtmpOsAtomicInterlockedExchange(
+	IN	RTMP_OS_ATOMIC		*pAtomicSrc,
+	IN	LONG				Value);
+
+/* OS Utility */
+void hex_dump(char *str, unsigned char *pSrcBufVA, unsigned int SrcBufLen);
+
+typedef VOID (*RTMP_OS_SEND_WLAN_EVENT)(
+	IN	VOID					*pAdSrc,
+	IN	USHORT					Event_flag,
+	IN	PUCHAR 					pAddr,
+	IN  UCHAR					BssIdx,
+	IN	CHAR					Rssi);
+
+VOID RtmpOsSendWirelessEvent(
+	IN	VOID			*pAd,
+	IN	USHORT			Event_flag,
+	IN	PUCHAR 			pAddr,
+	IN	UCHAR			BssIdx,
+	IN	CHAR			Rssi,
+	IN	RTMP_OS_SEND_WLAN_EVENT		pFunc);
+
+
+int RtmpOSWrielessEventSend(
+	IN	PNET_DEV				pNetDev,
+	IN	UINT32					eventType,
+	IN	INT						flags,
+	IN	PUCHAR					pSrcMac,
+	IN	PUCHAR					pData,
+	IN	UINT32					dataLen);
+
+int RtmpOSWrielessEventSendExt(
+	IN	PNET_DEV				pNetDev,
+	IN	UINT32					eventType,
+	IN	INT						flags,
+	IN	PUCHAR					pSrcMac,
+	IN	PUCHAR					pData,
+	IN	UINT32					dataLen,
+	IN	UINT32					family);
+
+UINT RtmpOsWirelessExtVerGet(VOID);
+
+VOID RtmpDrvAllMacPrint(
+	IN VOID						*pReserved,
+	IN UINT32					*pBufMac,
+	IN UINT32					AddrStart,
+	IN UINT32					AddrEnd,
+	IN UINT32					AddrStep);
+
+VOID RtmpDrvAllE2PPrint(
+	IN	VOID					*pReserved,
+	IN	USHORT					*pMacContent,
+	IN	UINT32					AddrEnd,
+	IN	UINT32					AddrStep);
+
+int RtmpOSIRQRelease(
+	IN	PNET_DEV				pNetDev,
+	IN	UINT32					infType,
+	IN	PPCI_DEV				pci_dev,
+	IN	BOOLEAN					*pHaveMsi);
+
+VOID RtmpOsWlanEventSet(
+	IN	VOID					*pReserved,
+	IN	BOOLEAN					*pCfgWEnt,
+	IN	BOOLEAN					FlgIsWEntSup);
+
+UINT16 RtmpOsGetUnaligned(
+	IN	UINT16					*pWord);
+
+UINT32 RtmpOsGetUnaligned32(
+	IN	UINT32					*pWord);
+
+ULONG RtmpOsGetUnalignedlong(
+	IN	ULONG					*pWord);
+
+long RtmpOsSimpleStrtol(
+	IN	const char				*cp,
+	IN	char 					**endp,
+	IN	unsigned int			base);
+
+VOID RtmpOsOpsInit(
+	IN	RTMP_OS_ABL_OPS			*pOps);
+
+/* ============================ rt_os_util.c ================================ */
+VOID RtmpDrvMaxRateGet(
+	IN	VOID					*pReserved,
+	IN	UINT8					MODE,
+	IN	UINT8					ShortGI,
+	IN	UINT8					BW,
+	IN	UINT8					MCS,
+	OUT	UINT32					*pRate);
+
+char * rtstrchr(const char * s, int c);
+
+PSTRING   WscGetAuthTypeStr(
+    IN  USHORT					authFlag);
+
+PSTRING   WscGetEncryTypeStr(
+    IN  USHORT					encryFlag);
+
+USHORT WscGetAuthTypeFromStr(
+    IN  PSTRING          		arg);
+
+USHORT WscGetEncrypTypeFromStr(
+    IN  PSTRING          		arg);
+
+VOID RtmpMeshDown(
+	IN	VOID					*pDrvCtrlBK,
+	IN	BOOLEAN					WaitFlag,
+	IN	BOOLEAN					(*RtmpMeshLinkCheck)(IN VOID *pAd));
+
+USHORT RtmpOsNetPrivGet(
+	IN	PNET_DEV				pDev);
+
+BOOLEAN RtmpOsCmdDisplayLenCheck(
+	IN	UINT32					LenSrc,
+	IN	UINT32					Offset);
+
+VOID    WpaSendMicFailureToWpaSupplicant(
+	IN	PNET_DEV				pNetDev,
+    IN  BOOLEAN					bUnicast);
+
+int wext_notify_event_assoc(
+	IN	PNET_DEV				pNetDev,
+	IN	UCHAR					*ReqVarIEs,
+	IN	UINT32					ReqVarIELen);
+
+VOID    SendAssocIEsToWpaSupplicant( 
+	IN	PNET_DEV				pNetDev,
+	IN	UCHAR					*ReqVarIEs,
+	IN	UINT32					ReqVarIELen);
+
+/* ============================ rt_rbus_pci_util.c ========================== */
+void RTMP_AllocateTxDescMemory(
+	IN	PPCI_DEV				pPciDev,
+	IN	UINT					Index,
+	IN	ULONG					Length,
+	IN	BOOLEAN					Cached,
+	OUT	PVOID					*VirtualAddress,
+	OUT	PNDIS_PHYSICAL_ADDRESS	PhysicalAddress);
+
+void RTMP_AllocateMgmtDescMemory(
+	IN	PPCI_DEV				pPciDev,
+	IN	ULONG					Length,
+	IN	BOOLEAN					Cached,
+	OUT	PVOID					*VirtualAddress,
+	OUT	PNDIS_PHYSICAL_ADDRESS	PhysicalAddress);
+
+void RTMP_AllocateRxDescMemory(
+	IN	PPCI_DEV				pPciDev,
+	IN	ULONG					Length,
+	IN	BOOLEAN					Cached,
+	OUT	PVOID					*VirtualAddress,
+	OUT	PNDIS_PHYSICAL_ADDRESS	PhysicalAddress);
+
+void RTMP_FreeDescMemory(
+	IN	PPCI_DEV				pPciDev,
+	IN	ULONG					Length,
+	IN	PVOID					VirtualAddress,
+	IN	NDIS_PHYSICAL_ADDRESS	PhysicalAddress);
+
+void RTMP_AllocateFirstTxBuffer(
+	IN	PPCI_DEV				pPciDev,
+	IN	UINT					Index,
+	IN	ULONG					Length,
+	IN	BOOLEAN					Cached,
+	OUT	PVOID					*VirtualAddress,
+	OUT	PNDIS_PHYSICAL_ADDRESS	PhysicalAddress);
+
+void RTMP_FreeFirstTxBuffer(
+	IN	PPCI_DEV				pPciDev,
+	IN	ULONG					Length,
+	IN	BOOLEAN					Cached,
+	IN	PVOID					VirtualAddress,
+	IN	NDIS_PHYSICAL_ADDRESS	PhysicalAddress);
+
+PNDIS_PACKET RTMP_AllocateRxPacketBuffer(
+	IN	VOID					*pReserved,
+	IN	VOID					*pPciDev,
+	IN	ULONG					Length,
+	IN	BOOLEAN					Cached,
+	OUT	PVOID					*VirtualAddress,
+	OUT	PNDIS_PHYSICAL_ADDRESS	PhysicalAddress);
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef CONFIG_PM
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND
+
+int RTMP_Usb_AutoPM_Put_Interface(
+	IN	VOID			*pUsb_Dev,
+	IN	VOID			*intf);
+
+int  RTMP_Usb_AutoPM_Get_Interface(
+	IN	VOID			*pUsb_Dev,
+	IN	VOID			*intf);
+
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */
+#endif /* CONFIG_PM */
+#endif /* CONFIG_STA_SUPPORT */
+
+
+
+ra_dma_addr_t linux_pci_map_single(void *pPciDev, void *ptr, size_t size, int sd_idx, int direction);
+
+void linux_pci_unmap_single(void *pPciDev, ra_dma_addr_t dma_addr, size_t size, int direction);
+
+/* ============================ rt_usb_util.c =============================== */
+#ifdef RTMP_MAC_USB
+void dump_urb(VOID *purb);
+
+int rausb_register(VOID * new_driver);
+
+void rausb_deregister(VOID * driver);
+
+/*struct urb *rausb_alloc_urb(int iso_packets); */
+
+void rausb_free_urb(VOID *urb);
+
+void rausb_put_dev(VOID *dev);
+
+struct usb_device *rausb_get_dev(VOID *dev);
+
+int rausb_submit_urb(VOID *urb);
+
+void *rausb_buffer_alloc(VOID *dev,
+							size_t size,
+							ra_dma_addr_t *dma);
+
+void rausb_buffer_free(VOID *dev,
+							size_t size,
+							void *addr,
+							ra_dma_addr_t dma);
+
+int rausb_control_msg(VOID *dev,
+						unsigned int pipe,
+						__u8 request,
+						__u8 requesttype,
+						__u16 value,
+						__u16 index,
+						void *data,
+						__u16 size,
+						int timeout);
+
+unsigned int rausb_sndctrlpipe(VOID *dev, ULONG address);
+
+unsigned int rausb_rcvctrlpipe(VOID *dev, ULONG address);
+
+void rausb_kill_urb(VOID *urb);
+
+VOID RtmpOsUsbEmptyUrbCheck(
+	IN	VOID				**ppWait,
+	IN	NDIS_SPIN_LOCK		*pBulkInLock,
+	IN	UCHAR				PendingRx);
+
+typedef VOID (*USB_COMPLETE_HANDLER)(VOID *);
+
+VOID	RtmpOsUsbInitHTTxDesc(
+	IN	VOID			*pUrbSrc,
+	IN	VOID			*pUsb_Dev,
+	IN	UINT			BulkOutEpAddr,
+	IN	PUCHAR			pSrc,
+	IN	ULONG			BulkOutSize,
+	IN	USB_COMPLETE_HANDLER	Func,
+	IN	VOID			*pTxContext,
+	IN	ra_dma_addr_t		TransferDma);
+
+VOID	RtmpOsUsbInitRxDesc(
+	IN	VOID			*pUrbSrc,
+	IN	VOID			*pUsb_Dev,
+	IN	UINT			BulkInEpAddr,
+	IN	UCHAR			*pTransferBuffer,
+	IN	UINT32			BufSize,
+	IN	USB_COMPLETE_HANDLER	Func,
+	IN	VOID			*pRxContext,
+	IN	ra_dma_addr_t		TransferDma);
+
+VOID *RtmpOsUsbContextGet(
+	IN	VOID			*pUrb);
+
+NTSTATUS RtmpOsUsbStatusGet(
+	IN	VOID			*pUrb);
+
+VOID RtmpOsUsbDmaMapping(
+	IN	VOID			*pUrb);
+#endif /* RTMP_MAC_USB */
+
+
+UINT32 RtmpOsGetUsbDevVendorID(
+	IN VOID *pUsbDev);
+
+UINT32 RtmpOsGetUsbDevProductID(
+	IN VOID *pUsbDev);
+
+/* CFG80211 */
+#ifdef RT_CFG80211_SUPPORT
+typedef struct __CFG80211_BAND {
+
+	UINT8 RFICType;
+	UINT8 MpduDensity;
+	UINT8 TxStream;
+	UINT8 RxStream;
+	UINT32 MaxTxPwr;
+	UINT32 MaxBssTable;
+
+	UINT16 RtsThreshold;
+	UINT16 FragmentThreshold;
+	UINT32 RetryMaxCnt; /* bit0~7: short; bit8 ~ 15: long */
+	BOOLEAN FlgIsBMode;
+} CFG80211_BAND;
+
+VOID CFG80211OS_UnRegister(
+	IN VOID						*pCB,
+	IN VOID						*pNetDev);
+
+BOOLEAN CFG80211_SupBandInit(
+	IN VOID						*pCB,
+	IN CFG80211_BAND 			*pBandInfo,
+	IN VOID						*pWiphyOrg,
+	IN VOID						*pChannelsOrg,
+	IN VOID						*pRatesOrg);
+
+BOOLEAN CFG80211OS_SupBandReInit(
+	IN VOID						*pCB,
+	IN CFG80211_BAND 			*pBandInfo);
+
+VOID CFG80211OS_RegHint(
+	IN VOID						*pCB,
+	IN UCHAR					*pCountryIe,
+	IN ULONG					CountryIeLen);
+
+VOID CFG80211OS_RegHint11D(
+	IN VOID						*pCB,
+	IN UCHAR					*pCountryIe,
+	IN ULONG					CountryIeLen);
+
+BOOLEAN CFG80211OS_BandInfoGet(
+	IN VOID						*pCB,
+	IN VOID						*pWiphyOrg,
+	OUT VOID					**ppBand24,
+	OUT VOID					**ppBand5);
+
+UINT32 CFG80211OS_ChanNumGet(
+	IN VOID						*pCB,
+	IN VOID						*pWiphyOrg,
+	IN UINT32					IdBand);
+
+BOOLEAN CFG80211OS_ChanInfoGet(
+	IN VOID						*pCB,
+	IN VOID						*pWiphyOrg,
+	IN UINT32					IdBand,
+	IN UINT32					IdChan,
+	OUT UINT32					*pChanId,
+	OUT UINT32					*pPower,
+	OUT BOOLEAN					*pFlgIsRadar);
+
+VOID CFG80211OS_Scaning(
+	IN VOID						*pCB,
+	IN VOID						**pChanOrg,
+	IN UINT32					ChanId,
+	IN UCHAR					*pFrame,
+	IN UINT32					FrameLen,
+	IN INT32					RSSI,
+	IN BOOLEAN					FlgIsNMode,
+	IN UINT8					BW);
+
+VOID CFG80211OS_ScanEnd(
+	IN VOID						*pCB,
+	IN BOOLEAN					FlgIsAborted);
+
+void CFG80211OS_ConnectResultInform(
+	IN VOID						*pCB,
+	IN UCHAR					*pBSSID,
+	IN UCHAR					*pReqIe,
+	IN UINT32					ReqIeLen,
+	IN UCHAR					*pRspIe,
+	IN UINT32					RspIeLen,
+	IN UCHAR					FlgIsSuccess);
+#endif /* RT_CFG80211_SUPPORT */
+
+/* ========================================================================== */
+extern UCHAR SNAP_802_1H[6];
+extern UCHAR SNAP_BRIDGE_TUNNEL[6];
+extern UCHAR EAPOL[2];
+extern UCHAR TPID[];
+extern UCHAR IPX[2];
+extern UCHAR APPLE_TALK[2];
+extern UCHAR NUM_BIT8[8];
+extern ULONG RTPktOffsetData, RTPktOffsetLen, RTPktOffsetCB;
+
+extern ULONG OS_NumOfMemAlloc, OS_NumOfMemFree;
+
+extern INT32 ralinkrate[];
+extern UINT32 RT_RateSize;
+
+#endif /* __RT_OS_UTIL_H__ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rtusb_io.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rtusb_io.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/rtusb_io.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/rtusb_io.h	2017-09-23 03:42:49.814675688 +0800
@@ -0,0 +1,168 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __RTUSB_IO_H__
+#define __RTUSB_IO_H__
+
+#include "wpa_cmm.h"
+#include "rtmp_type.h"
+
+/* First RTUSB IO command number */
+#define CMDTHREAD_FIRST_CMD_ID						0x0D730101
+
+#define CMDTHREAD_RESET_BULK_OUT						0x0D730101
+#define CMDTHREAD_RESET_BULK_IN						0x0D730102
+#define CMDTHREAD_CHECK_GPIO							0x0D730103
+#define CMDTHREAD_SET_ASIC_WCID						0x0D730104
+#define CMDTHREAD_SET_CLIENT_MAC_ENTRY				0x0D730105
+
+#ifdef CONFIG_STA_SUPPORT
+#define CMDTHREAD_SET_PSM_BIT							0x0D730106
+#define CMDTHREAD_FORCE_WAKE_UP						0x0D730107
+#define CMDTHREAD_FORCE_SLEEP_AUTO_WAKEUP			0x0D730108
+#define CMDTHREAD_QKERIODIC_EXECUT					0x0D730109
+#endif /* CONFIG_STA_SUPPORT */
+
+
+#define CMDTHREAD_SET_LED_STATUS				0x0D730110	/* Set WPS LED status (LED_WPS_XXX). */
+
+/* Security related */
+#define CMDTHREAD_SET_WCID_SEC_INFO					0x0D730112
+#define CMDTHREAD_SET_ASIC_WCID_IVEIV				0x0D730113
+#define CMDTHREAD_SET_ASIC_WCID_ATTR				0x0D730114
+#define CMDTHREAD_SET_ASIC_SHARED_KEY				0x0D730115
+#define CMDTHREAD_SET_ASIC_PAIRWISE_KEY				0x0D730116
+#define CMDTHREAD_REMOVE_PAIRWISE_KEY				0x0D730117
+#ifdef CONFIG_STA_SUPPORT
+#define CMDTHREAD_SET_PORT_SECURED					0x0D730118
+#endif /* CONFIG_STA_SUPPORT */
+
+
+/* add by johnli, fix "in_interrupt" error when call "MacTableDeleteEntry" in Rx tasklet */
+#define CMDTHREAD_UPDATE_PROTECT					0x0D73011A
+/* end johnli */
+
+#ifdef LINUX
+#ifdef RT_CFG80211_SUPPORT
+#define CMDTHREAD_REG_HINT							0x0D73011B
+#define CMDTHREAD_REG_HINT_11D						0x0D73011C
+#define CMDTHREAD_SCAN_END							0x0D73011D
+#define CMDTHREAD_CONNECT_RESULT_INFORM				0x0D73011E
+#endif /* RT_CFG80211_SUPPORT */
+#endif /* LINUX */
+
+
+
+
+typedef struct _CMDHandler_TLV {
+	USHORT Offset;
+	USHORT Length;
+	UCHAR DataFirst;
+} CMDHandler_TLV, *PCMDHandler_TLV;
+
+
+typedef struct _RT_SET_ASIC_WCID {
+	ULONG WCID;		/* mechanism for rekeying: 0:disable, 1: time-based, 2: packet-based */
+	ULONG SetTid;		/* time-based: seconds, packet-based: kilo-packets */
+	ULONG DeleteTid;	/* time-based: seconds, packet-based: kilo-packets */
+	UCHAR Addr[MAC_ADDR_LEN];	/* avoid in interrupt when write key */
+} RT_SET_ASIC_WCID, *PRT_SET_ASIC_WCID;
+
+typedef struct _RT_ASIC_WCID_SEC_INFO {
+	UCHAR BssIdx;
+	UCHAR KeyIdx;
+	UCHAR CipherAlg;
+	UINT8 Wcid;
+	UINT8 KeyTabFlag;
+} RT_ASIC_WCID_SEC_INFO, *PRT_ASIC_WCID_SEC_INFO;
+
+typedef struct _RT_ASIC_WCID_IVEIV_ENTRY {
+	UINT8 Wcid;
+	UINT32 Iv;
+	UINT32 Eiv;
+} RT_ASIC_WCID_IVEIV_ENTRY, *PRT_ASIC_WCID_IVEIV_ENTRY;
+
+typedef struct _RT_ASIC_WCID_ATTR_ENTRY {
+	UCHAR BssIdx;
+	UCHAR KeyIdx;
+	UCHAR CipherAlg;
+	UINT8 Wcid;
+	UINT8 KeyTabFlag;
+} RT_ASIC_WCID_ATTR_ENTRY, *PRT_ASIC_WCID_ATTR_ENTRY;
+
+typedef struct _RT_ASIC_PAIRWISE_KEY {
+	UINT8 WCID;
+	CIPHER_KEY CipherKey;
+} RT_ASIC_PAIRWISE_KEY, *PRT_ASIC_PAIRWISE_KEY;
+
+typedef struct _RT_ASIC_SHARED_KEY {
+	UCHAR BssIndex;
+	UCHAR KeyIdx;
+	CIPHER_KEY CipherKey;
+} RT_ASIC_SHARED_KEY, *PRT_ASIC_SHARED_KEY;
+
+/******************************************************************************
+
+  	USB Cmd to ASIC Related MACRO
+  	
+******************************************************************************/
+/* reset MAC of a station entry to 0xFFFFFFFFFFFF */
+#define RTMP_STA_ENTRY_MAC_RESET(pAd, Wcid)					\
+	{	RT_SET_ASIC_WCID	SetAsicWcid;						\
+		SetAsicWcid.WCID = Wcid;								\
+		SetAsicWcid.SetTid = 0xffffffff;						\
+		SetAsicWcid.DeleteTid = 0xffffffff;						\
+		RTEnqueueInternalCmd(pAd, CMDTHREAD_SET_ASIC_WCID, 	\
+				&SetAsicWcid, sizeof(RT_SET_ASIC_WCID));	}
+
+/* add by johnli, fix "in_interrupt" error when call "MacTableDeleteEntry" in Rx tasklet */
+/* Set MAC register value according operation mode */
+#define RTMP_UPDATE_PROTECT(pAd)	\
+ 	RTEnqueueInternalCmd(pAd, CMDTHREAD_UPDATE_PROTECT, NULL, 0);
+/* end johnli */
+
+/* Insert the BA bitmap to ASIC for the Wcid entry */
+#define RTMP_ADD_BA_SESSION_TO_ASIC(_pAd, _Aid, _TID)					\
+		do{																\
+			RT_SET_ASIC_WCID	SetAsicWcid;							\
+			SetAsicWcid.WCID = (_Aid);									\
+			SetAsicWcid.SetTid = (0x10000<<(_TID));						\
+			SetAsicWcid.DeleteTid = 0xffffffff;							\
+			RTEnqueueInternalCmd((_pAd), CMDTHREAD_SET_ASIC_WCID, &SetAsicWcid, sizeof(RT_SET_ASIC_WCID));	\
+		}while(0)
+
+/* Remove the BA bitmap from ASIC for the Wcid entry */
+#define RTMP_DEL_BA_SESSION_FROM_ASIC(_pAd, _Wcid, _TID)				\
+		do{																\
+			RT_SET_ASIC_WCID	SetAsicWcid;							\
+			SetAsicWcid.WCID = (_Wcid);									\
+			SetAsicWcid.SetTid = (0xffffffff);							\
+			SetAsicWcid.DeleteTid = (0x10000<<(_TID) );					\
+			RTEnqueueInternalCmd((_pAd), CMDTHREAD_SET_ASIC_WCID, &SetAsicWcid, sizeof(RT_SET_ASIC_WCID));	\
+		}while(0)
+
+#endif /* __RTUSB_IO_H__ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/spectrum_def.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/spectrum_def.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/spectrum_def.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/spectrum_def.h	2017-09-23 03:42:49.814675688 +0800
@@ -0,0 +1,249 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __SPECTRUM_DEF_H__
+#define __SPECTRUM_DEF_H__
+
+
+#define MAX_MEASURE_REQ_TAB_SIZE		32
+/* Size of hash tab must be power of 2. */
+#define MAX_HASH_MEASURE_REQ_TAB_SIZE	MAX_MEASURE_REQ_TAB_SIZE
+
+#define MAX_TPC_REQ_TAB_SIZE			32
+/* Size of hash tab must be power of 2. */
+#define MAX_HASH_TPC_REQ_TAB_SIZE		MAX_TPC_REQ_TAB_SIZE
+
+#define MIN_RCV_PWR				100		/* Negative value ((dBm) */
+
+#define TPC_REQ_AGE_OUT			500		/* ms */
+#define MQ_REQ_AGE_OUT			500		/* ms */
+
+#define TPC_DIALOGTOKEN_HASH_INDEX(_DialogToken)	((_DialogToken) & (MAX_HASH_TPC_REQ_TAB_SIZE - 1))
+#define MQ_DIALOGTOKEN_HASH_INDEX(_DialogToken)		((_DialogToken) & (MAX_MEASURE_REQ_TAB_SIZE - 1))
+
+typedef struct _MEASURE_REQ_ENTRY
+{
+	struct _MEASURE_REQ_ENTRY *pNext;
+	ULONG lastTime;
+	BOOLEAN	Valid;
+	UINT8 DialogToken;
+	UINT8 MeasureDialogToken[3];	/* 0:basic measure, 1: CCA measure, 2: RPI_Histogram measure. */
+} MEASURE_REQ_ENTRY, *PMEASURE_REQ_ENTRY;
+
+typedef struct _MEASURE_REQ_TAB
+{
+	UCHAR Size;
+	PMEASURE_REQ_ENTRY Hash[MAX_HASH_MEASURE_REQ_TAB_SIZE];
+	MEASURE_REQ_ENTRY Content[MAX_MEASURE_REQ_TAB_SIZE];
+} MEASURE_REQ_TAB, *PMEASURE_REQ_TAB;
+
+typedef struct _TPC_REQ_ENTRY
+{
+	struct _TPC_REQ_ENTRY *pNext;
+	ULONG lastTime;
+	BOOLEAN Valid;
+	UINT8 DialogToken;
+} TPC_REQ_ENTRY, *PTPC_REQ_ENTRY;
+
+typedef struct _TPC_REQ_TAB
+{
+	UCHAR Size;
+	PTPC_REQ_ENTRY Hash[MAX_HASH_TPC_REQ_TAB_SIZE];
+	TPC_REQ_ENTRY Content[MAX_TPC_REQ_TAB_SIZE];
+} TPC_REQ_TAB, *PTPC_REQ_TAB;
+
+
+/* The regulatory information */
+typedef struct _DOT11_CHANNEL_SET
+{
+	UCHAR NumberOfChannels;
+	UINT8 MaxTxPwr;
+	UCHAR ChannelList[16];
+} DOT11_CHANNEL_SET, *PDOT11_CHANNEL_SET;
+
+typedef struct _DOT11_REGULATORY_INFORMATION
+{
+	UCHAR RegulatoryClass;
+	DOT11_CHANNEL_SET ChannelSet;
+} DOT11_REGULATORY_INFORMATION, *PDOT11_REGULATORY_INFORMATION;
+
+
+
+#define RM_TPC_REQ				0
+#define RM_MEASURE_REQ			1
+
+#define RM_BASIC				0
+#define RM_CCA					1
+#define RM_RPI_HISTOGRAM		2
+#define RM_CH_LOAD				3
+#define RM_NOISE_HISTOGRAM		4
+
+
+typedef struct GNU_PACKED _TPC_REPORT_INFO
+{
+	UINT8 TxPwr;
+	UINT8 LinkMargin;
+} TPC_REPORT_INFO, *PTPC_REPORT_INFO;
+
+typedef struct GNU_PACKED _CH_SW_ANN_INFO
+{
+	UINT8 ChSwMode;
+	UINT8 Channel;
+	UINT8 ChSwCnt;
+} CH_SW_ANN_INFO, *PCH_SW_ANN_INFO;
+
+typedef union GNU_PACKED _MEASURE_REQ_MODE
+{
+#ifdef RT_BIG_ENDIAN
+	struct GNU_PACKED
+	{
+
+		UINT8 :3;
+		UINT8 DurationMandatory:1;
+		UINT8 Report:1;
+		UINT8 Request:1;
+		UINT8 Enable:1;
+		UINT8 Parallel:1;
+	} field;
+#else
+	struct GNU_PACKED
+	{
+		UINT8 Parallel:1;
+		UINT8 Enable:1;
+		UINT8 Request:1;
+		UINT8 Report:1;
+		UINT8 DurationMandatory:1;
+		UINT8 :3;
+	} field;
+#endif /* RT_BIG_ENDIAN */
+	UINT8 word;
+} MEASURE_REQ_MODE, *PMEASURE_REQ_MODE;
+
+typedef struct GNU_PACKED _MEASURE_REQ
+{
+	UINT8 ChNum;
+	UINT64 MeasureStartTime;
+	UINT16 MeasureDuration;
+} MEASURE_REQ, *PMEASURE_REQ;
+
+typedef struct GNU_PACKED _MEASURE_REQ_INFO
+{
+	UINT8 Token;
+	MEASURE_REQ_MODE ReqMode;
+	UINT8 ReqType;
+	UINT8 Oct[0];
+} MEASURE_REQ_INFO, *PMEASURE_REQ_INFO;
+
+typedef union GNU_PACKED _MEASURE_BASIC_REPORT_MAP
+{
+#ifdef RT_BIG_ENDIAN
+	struct GNU_PACKED
+	{
+		UINT8 Rev:3;
+
+		UINT8 Unmeasure:1;
+		UINT8 Radar:1;
+		UINT8 UnidentifiedSignal:1;
+		UINT8 OfdmPreamble:1;
+		UINT8 BSS:1;
+	} field;
+#else
+	struct GNU_PACKED
+	{
+		UINT8 BSS:1;
+
+		UINT8 OfdmPreamble:1;
+		UINT8 UnidentifiedSignal:1;
+		UINT8 Radar:1;
+		UINT8 Unmeasure:1;
+		UINT8 Rev:3;
+	} field;
+#endif /* RT_BIG_ENDIAN */
+	UINT8 word;
+} MEASURE_BASIC_REPORT_MAP, *PMEASURE_BASIC_REPORT_MAP;
+
+typedef struct GNU_PACKED _MEASURE_BASIC_REPORT
+{
+	UINT8 ChNum;
+	UINT64 MeasureStartTime;
+	UINT16 MeasureDuration;
+	MEASURE_BASIC_REPORT_MAP Map;
+} MEASURE_BASIC_REPORT, *PMEASURE_BASIC_REPORT;
+
+typedef struct GNU_PACKED _MEASURE_CCA_REPORT
+{
+	UINT8 ChNum;
+	UINT64 MeasureStartTime;
+	UINT16 MeasureDuration;
+	UINT8 CCA_Busy_Fraction;
+} MEASURE_CCA_REPORT, *PMEASURE_CCA_REPORT;
+
+typedef struct GNU_PACKED _MEASURE_RPI_REPORT
+{
+	UINT8 ChNum;
+	UINT64 MeasureStartTime;
+	UINT16 MeasureDuration;
+	UINT8 RPI_Density[8];
+} MEASURE_RPI_REPORT, *PMEASURE_RPI_REPORT;
+
+typedef union GNU_PACKED _MEASURE_REPORT_MODE
+{
+	struct GNU_PACKED
+	{
+#ifdef RT_BIG_ENDIAN
+		UINT8 Rev:5;
+		UINT8 Refused:1;
+		UINT8 Incapable:1;
+		UINT8 Late:1;
+#else
+		UINT8 Late:1;
+		UINT8 Incapable:1;
+		UINT8 Refused:1;
+		UINT8 Rev:5;
+#endif /* RT_BIG_ENDIAN */
+	} field;
+	UINT8 word;
+} MEASURE_REPORT_MODE, *PMEASURE_REPORT_MODE;
+
+typedef struct GNU_PACKED _MEASURE_REPORT_INFO
+{
+	UINT8 Token;
+	UINT8 ReportMode;
+	UINT8 ReportType;
+	UINT8 Octect[0];
+} MEASURE_REPORT_INFO, *PMEASURE_REPORT_INFO;
+
+typedef struct GNU_PACKED _QUIET_INFO
+{
+	UINT8 QuietCnt;
+	UINT8 QuietPeriod;
+	UINT16 QuietDuration;
+	UINT16 QuietOffset;
+} QUIET_INFO, *PQUIET_INFO;
+
+#endif /* __SPECTRUM_DEF_H__ */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/spectrum.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/spectrum.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/spectrum.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/spectrum.h	2017-09-23 03:42:49.814675688 +0800
@@ -0,0 +1,220 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __SPECTRUM_H__
+#define __SPECTRUM_H__
+
+#include "rtmp_type.h"
+#include "spectrum_def.h"
+
+
+UINT8 GetRegulatoryMaxTxPwr(
+	IN PRTMP_ADAPTER pAd,
+	IN UINT8 channel);
+
+CHAR RTMP_GetTxPwr(
+	IN PRTMP_ADAPTER pAd,
+	IN HTTRANSMIT_SETTING HTTxMode);
+
+/*
+	==========================================================================
+	Description:
+		Prepare Measurement request action frame and enqueue it into
+		management queue waiting for transmition.
+		
+	Parametrs:
+		1. the destination mac address of the frame.
+	
+	Return	: None.
+	==========================================================================
+ */
+VOID MakeMeasurementReqFrame(
+	IN PRTMP_ADAPTER pAd,
+	OUT PUCHAR pOutBuffer,
+	OUT PULONG pFrameLen,
+	IN UINT8 TotalLen,
+	IN UINT8 Category,
+	IN UINT8 Action,
+	IN UINT8 MeasureToken, 
+	IN UINT8 MeasureReqMode,
+	IN UINT8 MeasureReqType,
+	IN UINT16 NumOfRepetitions);
+
+/*
+	==========================================================================
+	Description:
+		Prepare Measurement report action frame and enqueue it into
+		management queue waiting for transmition.
+		
+	Parametrs:
+		1. the destination mac address of the frame.
+	
+	Return	: None.
+	==========================================================================
+ */
+VOID EnqueueMeasurementRep(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pDA,
+	IN UINT8 DialogToken,
+	IN UINT8 MeasureToken, 
+	IN UINT8 MeasureReqMode,
+	IN UINT8 MeasureReqType,
+	IN UINT8 ReportInfoLen,
+	IN PUINT8 pReportInfo);
+
+/*
+	==========================================================================
+	Description:
+		Prepare TPC Request action frame and enqueue it into
+		management queue waiting for transmition.
+		
+	Parametrs:
+		1. the destination mac address of the frame.
+	
+	Return	: None.
+	==========================================================================
+ */
+VOID EnqueueTPCReq(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pDA,
+	IN UCHAR DialogToken);
+
+/*
+	==========================================================================
+	Description:
+		Prepare TPC Report action frame and enqueue it into
+		management queue waiting for transmition.
+		
+	Parametrs:
+		1. the destination mac address of the frame.
+	
+	Return	: None.
+	==========================================================================
+ */
+VOID EnqueueTPCRep(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pDA,
+	IN UINT8 DialogToken,
+	IN UINT8 TxPwr,
+	IN UINT8 LinkMargin);
+
+
+/*
+	==========================================================================
+	Description:
+		Spectrun action frames Handler such as channel switch annoucement,
+		measurement report, measurement request actions frames.
+		
+	Parametrs:
+		Elme - MLME message containing the received frame
+	
+	Return	: None.
+	==========================================================================
+ */
+VOID PeerSpectrumAction(
+    IN PRTMP_ADAPTER pAd, 
+    IN MLME_QUEUE_ELEM *Elem);
+
+/*
+	==========================================================================
+	Description:
+		
+	Parametrs:
+	
+	Return	: None.
+	==========================================================================
+ */
+INT Set_MeasureReq_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT Set_TpcReq_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+INT Set_PwrConstraint(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg);
+
+
+NDIS_STATUS	MeasureReqTabInit(
+	IN PRTMP_ADAPTER pAd);
+
+VOID MeasureReqTabExit(
+	IN PRTMP_ADAPTER pAd);
+
+PMEASURE_REQ_ENTRY MeasureReqLookUp(
+	IN PRTMP_ADAPTER	pAd,
+	IN UINT8			DialogToken);
+
+PMEASURE_REQ_ENTRY MeasureReqInsert(
+	IN PRTMP_ADAPTER	pAd,
+	IN UINT8			DialogToken);
+
+VOID MeasureReqDelete(
+	IN PRTMP_ADAPTER	pAd,
+	IN UINT8			DialogToken);
+
+VOID InsertChannelRepIE(
+	IN PRTMP_ADAPTER pAd,
+	OUT PUCHAR pFrameBuf,
+	OUT PULONG pFrameLen,
+	IN PSTRING pCountry,
+	IN UINT8 RegulatoryClass);
+
+VOID InsertTpcReportIE(
+	IN PRTMP_ADAPTER pAd,
+	OUT PUCHAR pFrameBuf,
+	OUT PULONG pFrameLen,
+	IN UINT8 TxPwr,
+	IN UINT8 LinkMargin);
+
+VOID InsertDialogToken(
+	IN PRTMP_ADAPTER pAd,
+	OUT PUCHAR pFrameBuf,
+	OUT PULONG pFrameLen,
+	IN UINT8 DialogToken);
+
+NDIS_STATUS	TpcReqTabInit(
+	IN PRTMP_ADAPTER pAd);
+
+VOID TpcReqTabExit(
+	IN PRTMP_ADAPTER pAd);
+
+VOID NotifyChSwAnnToPeerAPs(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pRA,
+	IN PUCHAR pTA,
+	IN UINT8 ChSwMode,
+	IN UINT8 Channel);
+
+VOID RguClass_BuildBcnChList(
+	IN PRTMP_ADAPTER pAd,
+	OUT PUCHAR pBuf,
+	OUT	PULONG pBufLen);
+#endif /* __SPECTRUM_H__ */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/sta_cfg.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/sta_cfg.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/sta_cfg.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/sta_cfg.h	2017-09-23 03:42:49.814675688 +0800
@@ -0,0 +1,36 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __STA_CFG_H__
+#define __STA_CFG_H__
+
+INT RTMPSTAPrivIoctlSet(
+	IN RTMP_ADAPTER *pAd,
+	IN PSTRING SetProcName,
+	IN PSTRING ProcArg);
+
+#endif /* __STA_CFG_H__ */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/video.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/video.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/video.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/video.h	2017-09-23 03:42:49.814675688 +0800
@@ -0,0 +1,39 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifdef VIDEO_TURBINE_SUPPORT
+extern AP_VIDEO_STRUCT GLOBAL_AP_VIDEO_CONFIG;
+
+VOID VideoModeUpdate(IN PRTMP_ADAPTER pAd);
+VOID VideoModeDynamicTune(IN PRTMP_ADAPTER pAd);
+UINT32 GetAsicDefaultRetry(IN PRTMP_ADAPTER pAd);
+UCHAR GetAsicDefaultTxBA(IN PRTMP_ADAPTER pAd);
+UINT32 GetAsicVideoRetry(IN PRTMP_ADAPTER pAd);
+UCHAR GetAsicVideoTxBA(IN PRTMP_ADAPTER pAd);
+VOID VideoConfigInit(IN PRTMP_ADAPTER pAd);
+#endif /* VIDEO_TURBINE_SUPPORT */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/vr_ikans.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/vr_ikans.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/vr_ikans.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/vr_ikans.h	2017-09-23 03:42:49.814675688 +0800
@@ -0,0 +1,58 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __VR_IKANS_H__
+#define __VR_IKANS_H__
+
+#ifndef MODULE_IKANOS
+#define IKANOS_EXTERN	extern
+#else
+#define IKANOS_EXTERN
+#endif /* MODULE_IKANOS */
+
+#ifdef IKANOS_VX_1X0
+	typedef void (*IkanosWlanTxCbFuncP)(void *, void *);
+
+	struct IKANOS_TX_INFO
+	{
+		struct net_device *netdev;
+		IkanosWlanTxCbFuncP *fp;
+	};
+#endif /* IKANOS_VX_1X0 */
+
+
+IKANOS_EXTERN void VR_IKANOS_FP_Init(UINT8 BssNum, UINT8 *pApMac);
+
+IKANOS_EXTERN INT32 IKANOS_DataFramesTx(struct sk_buff *pSkb,
+										struct net_device *pNetDev);
+
+IKANOS_EXTERN void IKANOS_DataFrameRx(PRTMP_ADAPTER pAd,
+										struct sk_buff *pSkb);
+
+#endif /* __VR_IKANS_H__ */
+
+/* End of vr_ikans.h */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/wfa_p2p.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/wfa_p2p.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/wfa_p2p.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/wfa_p2p.h	2017-09-23 03:42:49.814675688 +0800
@@ -0,0 +1,35 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef __WFA_P2P_H
+#define __WFA_P2P_H
+
+#define GNU_PACKED  __attribute__ ((packed))
+
+
+#endif /* __WFA_P2P_H */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/wpa_cmm.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/wpa_cmm.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/wpa_cmm.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/wpa_cmm.h	2017-09-23 03:42:49.814675688 +0800
@@ -0,0 +1,240 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef WPA_CMM_H
+#define WPA_CMM_H
+
+#include "rtmp_type.h"
+#include "dot11i_wpa.h"
+
+#define CACHE_NOT_FOUND         -1
+
+#define TX_EAPOL_BUFFER			1500
+
+/* Retry timer counter initial value */
+#define PEER_MSG1_RETRY_TIMER_CTR           0
+#define PEER_MSG3_RETRY_TIMER_CTR           10
+#define GROUP_MSG1_RETRY_TIMER_CTR          20
+
+/* WPA mechanism retry timer interval */
+#define PEER_MSG1_RETRY_EXEC_INTV	1000	/* 1 sec */
+#define PEER_MSG3_RETRY_EXEC_INTV	3000	/* 3 sec */
+#define GROUP_KEY_UPDATE_EXEC_INTV	1000	/* 1 sec */
+#define PEER_GROUP_KEY_UPDATE_INIV	2000	/* 2 sec */
+
+#define	EAPOL_MSG_INVALID	0
+#define	EAPOL_PAIR_MSG_1	1
+#define	EAPOL_PAIR_MSG_2	2
+#define	EAPOL_PAIR_MSG_3	3
+#define	EAPOL_PAIR_MSG_4	4
+#define	EAPOL_GROUP_MSG_1	5
+#define	EAPOL_GROUP_MSG_2	6
+
+#define ENQUEUE_EAPOL_START_TIMER	200	/* 200 ms */
+
+/* group rekey interval */
+#define TIME_REKEY                          0
+#define PKT_REKEY                           1
+#define DISABLE_REKEY                       2
+#define MAX_REKEY                           2
+
+#define MAX_REKEY_INTER                     0x3ffffff
+
+#define EAPOL_START_DISABLE					0
+#define EAPOL_START_PSK						1
+#define EAPOL_START_1X						2
+
+/* */
+/* Common WPA state machine: states, events, total function # */
+/* */
+#define WPA_PTK                      0
+#define MAX_WPA_PTK_STATE            1
+
+#define WPA_MACHINE_BASE             0
+#define MT2_EAPPacket                0
+#define MT2_EAPOLStart               1
+#define MT2_EAPOLLogoff              2
+#define MT2_EAPOLKey                 3
+#define MT2_EAPOLASFAlert            4
+#define MAX_WPA_MSG                  5
+
+#define WPA_FUNC_SIZE                (MAX_WPA_PTK_STATE * MAX_WPA_MSG)
+
+typedef enum _WpaRole {
+	WPA_NONE,		/* 0 */
+	WPA_Authenticator,	/* 1 */
+	WPA_Supplicant,		/* 2 */
+	WPA_BOTH,		/* 3: Authenticator and Supplicant */
+} WPA_ROLE;
+
+/*for-wpa value domain of pMacEntry->WpaState  802.1i D3   p.114 */
+typedef enum _ApWpaState {
+	AS_NOTUSE,		/* 0 */
+	AS_DISCONNECT,		/* 1 */
+	AS_DISCONNECTED,	/* 2 */
+	AS_INITIALIZE,		/* 3 */
+	AS_AUTHENTICATION,	/* 4 */
+	AS_AUTHENTICATION2,	/* 5 */
+	AS_INITPMK,		/* 6 */
+	AS_INITPSK,		/* 7 */
+	AS_PTKSTART,		/* 8 */
+	AS_PTKINIT_NEGOTIATING,	/* 9 */
+	AS_PTKINITDONE,		/* 10 */
+	AS_UPDATEKEYS,		/* 11 */
+	AS_INTEGRITY_FAILURE,	/* 12 */
+	AS_KEYUPDATE,		/* 13 */
+} AP_WPA_STATE;
+
+/* For supplicant state machine states. 802.11i Draft 4.1, p. 97 */
+/* We simplified it */
+typedef enum _WpaState {
+	SS_NOTUSE,		/* 0 */
+	SS_START,		/* 1 */
+	SS_WAIT_MSG_3,		/* 2 */
+	SS_WAIT_GROUP,		/* 3 */
+	SS_FINISH,		/* 4 */
+	SS_KEYUPDATE,		/* 5 */
+} WPA_STATE;
+
+/* for-wpa value domain of pMacEntry->WpaState  802.1i D3   p.114 */
+typedef enum _GTKState {
+	REKEY_NEGOTIATING,
+	REKEY_ESTABLISHED,
+	KEYERROR,
+} GTK_STATE;
+
+/*  for-wpa  value domain of pMacEntry->WpaState  802.1i D3   p.114 */
+typedef enum _WpaGTKState {
+	SETKEYS,
+	SETKEYS_DONE,
+} WPA_GTK_STATE;
+
+/* WPA internal command type */
+#define WPA_SM_4WAY_HS_START 	1
+#define WPA_SM_DISCONNECT		0xff
+
+/* WPA element IDs */
+typedef enum _WPA_VARIABLE_ELEMENT_ID {
+	WPA_ELEM_CMD = 1,
+	WPA_ELEM_PEER_RSNIE,
+	WPA_ELEM_LOCAL_RSNIE,
+	WPA_ELEM_PMK,
+	WPA_ELEM_RESV
+} WPA_VARIABLE_ELEMENT_ID;
+
+#define GROUP_SUITE					0
+#define PAIRWISE_SUITE				1
+#define AKM_SUITE					2
+#define RSN_CAP_INFO				3
+#define PMKID_LIST					4
+#define G_MGMT_SUITE				5
+
+/* */
+/*	The definition of the cipher combination */
+/* */
+/* 	 bit3	bit2  bit1   bit0 */
+/*	+------------+------------+ */
+/* 	|	  WPA	 |	   WPA2   | */
+/*	+------+-----+------+-----+ */
+/*	| TKIP | AES | TKIP | AES | */
+/*	|	0  |  1  |   1  |  0  | -> 0x06 */
+/*	|	0  |  1  |   1  |  1  | -> 0x07 */
+/*	|	1  |  0  |   0  |  1  | -> 0x09 */
+/*	|	1  |  0  |   1  |  1  | -> 0x0B */
+/*	|	1  |  1  |   0  |  1  | -> 0x0D */
+/*	|	1  |  1  |   1  |  0  | -> 0x0E */
+/*	|	1  |  1  |   1  |  1  |	-> 0x0F */
+/*	+------+-----+------+-----+ */
+/* */
+typedef enum _WpaMixPairCipher {
+	MIX_CIPHER_NOTUSE = 0x00,
+	WPA_NONE_WPA2_TKIPAES = 0x03,	/* WPA2-TKIPAES */
+	WPA_AES_WPA2_TKIP = 0x06,
+	WPA_AES_WPA2_TKIPAES = 0x07,
+	WPA_TKIP_WPA2_AES = 0x09,
+	WPA_TKIP_WPA2_TKIPAES = 0x0B,
+	WPA_TKIPAES_WPA2_NONE = 0x0C,	/* WPA-TKIPAES */
+	WPA_TKIPAES_WPA2_AES = 0x0D,
+	WPA_TKIPAES_WPA2_TKIP = 0x0E,
+	WPA_TKIPAES_WPA2_TKIPAES = 0x0F,
+} WPA_MIX_PAIR_CIPHER;
+
+/* The internal command list for ralink dot1x daemon using */
+typedef enum _Dot1xInternalCmd {
+	DOT1X_DISCONNECT_ENTRY,
+	DOT1X_RELOAD_CONFIG,
+} DOT1X_INTERNAL_CMD;
+
+/* 802.1x authentication format */
+typedef struct _IEEE8021X_FRAME {
+	UCHAR Version;		/* 1.0 */
+	UCHAR Type;		/* 0 = EAP Packet */
+	USHORT Length;
+} IEEE8021X_FRAME, *PIEEE8021X_FRAME;
+
+typedef struct GNU_PACKED _RSN_IE_HEADER_STRUCT {
+	UCHAR Eid;
+	UCHAR Length;
+	USHORT Version;		/* Little endian format */
+} RSN_IE_HEADER_STRUCT, *PRSN_IE_HEADER_STRUCT;
+
+/* Cipher suite selector types */
+typedef struct GNU_PACKED _CIPHER_SUITE_STRUCT {
+	UCHAR Oui[3];
+	UCHAR Type;
+} CIPHER_SUITE_STRUCT, *PCIPHER_SUITE_STRUCT;
+
+/* Authentication and Key Management suite selector */
+typedef struct GNU_PACKED _AKM_SUITE_STRUCT {
+	UCHAR Oui[3];
+	UCHAR Type;
+} AKM_SUITE_STRUCT, *PAKM_SUITE_STRUCT;
+
+/* RSN capability */
+typedef struct GNU_PACKED _RSN_CAPABILITY {
+	USHORT Rsv:10;
+	USHORT GTKSAReplayCnt:2;
+	USHORT PTKSAReplayCnt:2;
+	USHORT NoPairwise:1;
+	USHORT PreAuth:1;
+} RSN_CAPABILITY, *PRSN_CAPABILITY;
+
+typedef struct _CIPHER_KEY {
+	UCHAR Key[16];		/* 128 bits max */
+	UCHAR TxMic[8];
+	UCHAR RxMic[8];
+	UCHAR TxTsc[16];	/* TSC value. Change it from 48bit to 128bit */
+	UCHAR RxTsc[16];	/* TSC value. Change it from 48bit to 128bit */
+	UCHAR CipherAlg;	/* 0:none, 1:WEP64, 2:WEP128, 3:TKIP, 4:AES, 5:CKIP64, 6:CKIP128 */
+	UCHAR KeyLen;		/* Key length for each key, 0: entry is invalid */
+#ifdef CONFIG_STA_SUPPORT
+	UCHAR BssId[6];
+#endif				/* CONFIG_STA_SUPPORT */
+	UCHAR Type;		/* Indicate Pairwise/Group when reporting MIC error */
+} CIPHER_KEY, *PCIPHER_KEY;
+
+#endif /* WPA_CMM_H */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/wpa.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/wpa.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/wpa.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/wpa.h	2017-09-23 03:42:49.814675688 +0800
@@ -0,0 +1,490 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef	__WPA_H__
+#define	__WPA_H__
+
+#ifndef ROUND_UP
+#define ROUND_UP(__x, __y) \
+	(((ULONG)((__x)+((__y)-1))) & ((ULONG)~((__y)-1)))
+#endif
+
+#define	SET_UINT16_TO_ARRARY(_V, _LEN)		\
+{											\
+	_V[0] = ((UINT16)_LEN) >> 8;			\
+	_V[1] = ((UINT16)_LEN & 0xFF);					\
+}
+
+#define	INC_UINT16_TO_ARRARY(_V, _LEN)			\
+{												\
+	UINT16	var_len;							\
+												\
+	var_len = (_V[0]<<8) | (_V[1]);				\
+	var_len += _LEN;							\
+												\
+	_V[0] = (var_len & 0xFF00) >> 8;			\
+	_V[1] = (var_len & 0xFF);					\
+}
+
+#define	CONV_ARRARY_TO_UINT16(_V)	((_V[0]<<8) | (_V[1]))
+
+#define	ADD_ONE_To_64BIT_VAR(_V)		\
+{										\
+	UCHAR	cnt = LEN_KEY_DESC_REPLAY;	\
+	do									\
+	{									\
+		cnt--;							\
+		_V[cnt]++;						\
+		if (cnt == 0)					\
+			break;						\
+	}while (_V[cnt] == 0);				\
+}
+
+#define INC_TX_TSC(_tsc, _cnt)                          \
+{                                                       \
+    INT i=0;                                            \
+	while (++_tsc[i] == 0x0)                            \
+    {                                                   \
+        i++;                                            \
+		if (i == (_cnt))                                \
+			break;                                      \
+	}                                                   \
+}
+
+#define IS_WPA_CAPABILITY(a)       (((a) >= Ndis802_11AuthModeWPA) && ((a) <= Ndis802_11AuthModeWPA1PSKWPA2PSK))
+
+/* 	
+	WFA recommend to restrict the encryption type in 11n-HT mode.
+ 	So, the WEP and TKIP shall not be allowed to use HT rate. 
+ */
+#define IS_INVALID_HT_SECURITY(_mode)		\
+	(((_mode) == Ndis802_11Encryption1Enabled) || \
+	 ((_mode) == Ndis802_11Encryption2Enabled))
+
+#define MIX_CIPHER_WPA_TKIP_ON(x)       (((x) & 0x08) != 0)
+#define MIX_CIPHER_WPA_AES_ON(x)        (((x) & 0x04) != 0)
+#define MIX_CIPHER_WPA2_TKIP_ON(x)      (((x) & 0x02) != 0)
+#define MIX_CIPHER_WPA2_AES_ON(x)       (((x) & 0x01) != 0)
+
+/* Some definition are different between Keneral mode and Daemon mode */
+#ifdef WPA_DAEMON_MODE
+/* The definition for Daemon mode */
+#define WPA_GET_BSS_NUM(_pAd)		(_pAd)->mbss_num
+
+#define WPA_GET_PMK(_pAd, _pEntry, _pmk)					\
+{															\
+	_pmk = _pAd->MBSS[_pEntry->apidx].PMK;					\
+}
+
+#define WPA_GET_GTK(_pAd, _pEntry, _gtk)					\
+{															\
+	_gtk = _pAd->MBSS[_pEntry->apidx].GTK;					\
+}
+
+#define WPA_GET_GROUP_CIPHER(_pAd, _pEntry, _cipher)		\
+{															\
+	_cipher = (_pAd)->MBSS[_pEntry->apidx].GroupEncrypType;	\
+}
+
+#define WPA_GET_DEFAULT_KEY_ID(_pAd, _pEntry, _idx)			\
+{															\
+	_idx = (_pAd)->MBSS[_pEntry->apidx].DefaultKeyId;		\
+}
+
+#define WPA_GET_BMCST_TSC(_pAd, _pEntry, _tsc)				\
+{															\
+	_tsc = 1;												\
+}
+
+#define WPA_BSSID(_pAd, _apidx)		(_pAd)->MBSS[_apidx].wlan_addr
+
+#define WPA_OS_MALLOC(_p, _s)		\
+{									\
+	_p = os_malloc(_s);			\
+}
+
+#define WPA_OS_FREE(_p)		\
+{								\
+	os_free(_p);				\
+}
+
+#define WPA_GET_CURRENT_TIME(_time)		\
+{										\
+	struct timeval tv;					\
+	gettimeofday(&tv, NULL);			\
+	*(_time) = tv.tv_sec;					\
+}
+
+#else
+/* The definition for Driver mode */
+
+#if defined(CONFIG_AP_SUPPORT) && defined(CONFIG_STA_SUPPORT)
+#define WPA_GET_BSS_NUM(_pAd)		(((_pAd)->OpMode == OPMODE_AP) ? (_pAd)->ApCfg.BssidNum : 1)
+#define WPA_GET_GROUP_CIPHER(_pAd, _pEntry, _cipher)					\
+	{																	\
+	_cipher = Ndis802_11WEPDisabled;								\
+		if ((_pAd)->OpMode == OPMODE_AP)								\
+		{																\
+		if (IS_ENTRY_APCLI(_pEntry) && 								\
+			((_pEntry)->MatchAPCLITabIdx < MAX_APCLI_NUM))			\
+			_cipher = (_pAd)->ApCfg.ApCliTab[(_pEntry)->MatchAPCLITabIdx].GroupCipher;	\
+			else if ((_pEntry)->apidx < (_pAd)->ApCfg.BssidNum)			\
+				_cipher = (_pAd)->ApCfg.MBSSID[_pEntry->apidx].GroupKeyWepStatus;\
+		}																\
+		else															\
+			_cipher = (_pAd)->StaCfg.GroupCipher;						\
+	}
+
+#define WPA_BSSID(_pAd, _apidx) 	(((_pAd)->OpMode == OPMODE_AP) ?\
+									(_pAd)->ApCfg.MBSSID[_apidx].Bssid :\
+									(_pAd)->CommonCfg.Bssid)
+#elif defined(CONFIG_AP_SUPPORT)
+#define WPA_GET_BSS_NUM(_pAd)		(_pAd)->ApCfg.BssidNum
+#define WPA_GET_GROUP_CIPHER(_pAd, _pEntry, _cipher)				\
+	{																\
+	_cipher = Ndis802_11WEPDisabled;							\
+	if (IS_ENTRY_APCLI(_pEntry) && 								\
+		((_pEntry)->MatchAPCLITabIdx < MAX_APCLI_NUM))			\
+		_cipher = (_pAd)->ApCfg.ApCliTab[(_pEntry)->MatchAPCLITabIdx].GroupCipher;	\
+		else if ((_pEntry)->apidx < (_pAd)->ApCfg.BssidNum)			\
+			_cipher = (_pAd)->ApCfg.MBSSID[_pEntry->apidx].GroupKeyWepStatus;\
+	}
+
+#define WPA_BSSID(_pAd, _apidx) 	(_pAd)->ApCfg.MBSSID[_apidx].Bssid
+
+#elif defined(CONFIG_STA_SUPPORT)
+#define WPA_GET_BSS_NUM(_pAd)		1
+#define WPA_GET_GROUP_CIPHER(_pAd, _pEntry, _cipher)				\
+	{																\
+		_cipher = (_pAd)->StaCfg.GroupCipher;						\
+	}
+#define WPA_BSSID(_pAd, _apidx) 	(_pAd)->CommonCfg.Bssid
+#endif /* defined(CONFIG_STA_SUPPORT) */
+
+#define WPA_OS_MALLOC(_p, _s)		\
+{									\
+	os_alloc_mem(NULL, (PUCHAR *)&_p, _s);		\
+}
+
+#define WPA_OS_FREE(_p)		\
+{							\
+	os_free_mem(NULL, _p);	\
+}
+
+#define WPA_GET_CURRENT_TIME(_time)		NdisGetSystemUpTime(_time);
+
+#endif /* End of Driver Mode */
+
+
+/*========================================
+	The prototype is defined in cmm_wpa.c
+  ========================================*/
+void inc_iv_byte(
+	UCHAR *iv,
+	UINT len,
+	UINT cnt);
+
+BOOLEAN WpaMsgTypeSubst(
+	IN UCHAR EAPType,
+	OUT INT *MsgType);
+
+VOID PRF(
+	IN UCHAR *key,
+	IN INT key_len,
+	IN UCHAR *prefix,
+	IN INT prefix_len,
+	IN UCHAR *data,
+	IN INT data_len,
+	OUT UCHAR *output,
+	IN INT len);
+
+int RtmpPasswordHash(
+	char *password,
+	unsigned char *ssid,
+	int ssidlength,
+	unsigned char *output);
+
+	VOID KDF(
+	IN PUINT8 key,
+	IN INT key_len,
+	IN PUINT8 label,
+	IN INT label_len,
+	IN PUINT8 data,
+	IN INT data_len,
+	OUT PUINT8 output,
+	IN USHORT len);
+
+PUINT8 WPA_ExtractSuiteFromRSNIE(
+	IN PUINT8 rsnie,
+	IN UINT rsnie_len,
+	IN UINT8 type,
+	OUT UINT8 *count);
+
+VOID WpaShowAllsuite(
+	IN PUINT8 rsnie,
+	IN UINT rsnie_len);
+
+VOID RTMPInsertRSNIE(
+	IN PUCHAR pFrameBuf,
+	OUT PULONG pFrameLen,
+	IN PUINT8 rsnie_ptr,
+	IN UINT8 rsnie_len,
+	IN PUINT8 pmkid_ptr,
+	IN UINT8 pmkid_len);
+
+/* 
+ =====================================	
+ 	function prototype in cmm_wpa.c
+ =====================================	
+*/
+VOID RTMPToWirelessSta(
+	IN PRTMP_ADAPTER pAd,
+	IN PMAC_TABLE_ENTRY pEntry,
+	IN PUCHAR pHeader802_3,
+	IN UINT HdrLen,
+	IN PUCHAR pData,
+	IN UINT DataLen,
+	IN BOOLEAN bClearFrame);
+
+VOID WpaDerivePTK(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR *PMK,
+	IN UCHAR *ANonce,
+	IN UCHAR *AA,
+	IN UCHAR *SNonce,
+	IN UCHAR *SA,
+	OUT UCHAR *output,
+	IN UINT len);
+
+VOID WpaDeriveGTK(
+	IN UCHAR *PMK,
+	IN UCHAR *GNonce,
+	IN UCHAR *AA,
+	OUT UCHAR *output,
+	IN UINT len);
+
+VOID GenRandom(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR *macAddr,
+	OUT UCHAR *random);
+
+BOOLEAN RTMPCheckWPAframe(
+	IN PRTMP_ADAPTER pAd,
+	IN PMAC_TABLE_ENTRY pEntry,
+	IN PUCHAR pData,
+	IN ULONG DataByteCount,
+	IN UCHAR FromWhichBSSID);
+
+BOOLEAN RTMPParseEapolKeyData(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pKeyData,
+	IN UCHAR KeyDataLen,
+	IN UCHAR GroupKeyIndex,
+	IN UCHAR MsgType,
+	IN BOOLEAN bWPA2,
+	IN MAC_TABLE_ENTRY *pEntry);
+
+VOID WPA_ConstructKdeHdr(
+	IN UINT8 data_type,
+	IN UINT8 data_len,
+	OUT PUCHAR pBuf);
+
+VOID ConstructEapolMsg(
+	IN PMAC_TABLE_ENTRY pEntry,
+	IN UCHAR GroupKeyWepStatus,
+	IN UCHAR MsgType,
+	IN UCHAR DefaultKeyIdx,
+	IN UCHAR *KeyNonce,
+	IN UCHAR *TxRSC,
+	IN UCHAR *GTK,
+	IN UCHAR *RSNIE,
+	IN UCHAR RSNIE_Len,
+	OUT PEAPOL_PACKET pMsg);
+
+PCIPHER_KEY RTMPSwCipherKeySelection(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pIV,
+	IN RX_BLK *pRxBlk,
+	IN PMAC_TABLE_ENTRY pEntry);
+
+NDIS_STATUS RTMPSoftDecryptionAction(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pHdr,
+	IN UCHAR UserPriority,
+	IN PCIPHER_KEY pKey,
+	INOUT PUCHAR pData,
+	INOUT UINT16 *DataByteCnt);
+
+VOID RTMPSoftConstructIVHdr(
+	IN UCHAR CipherAlg,
+	IN UCHAR key_id,
+	IN PUCHAR pTxIv,
+	OUT PUCHAR pHdrIv,
+	OUT UINT8 *hdr_iv_len);
+
+VOID RTMPSoftEncryptionAction(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR CipherAlg,
+	IN PUCHAR pHdr,
+	IN PUCHAR pSrcBufData,
+	IN UINT32 SrcBufLen,
+	IN UCHAR KeyIdx,
+	IN PCIPHER_KEY pKey,
+	OUT UINT8 *ext_len);
+
+VOID RTMPMakeRSNIE(
+	IN PRTMP_ADAPTER pAd,
+	IN UINT AuthMode,
+	IN UINT WepStatus,
+	IN UCHAR apidx);
+
+VOID WPAInstallPairwiseKey(
+	PRTMP_ADAPTER pAd,
+	UINT8 BssIdx,
+	PMAC_TABLE_ENTRY pEntry,
+	BOOLEAN bAE);
+
+VOID WPAInstallSharedKey(
+	PRTMP_ADAPTER pAd,
+	UINT8 GroupCipher,
+	UINT8 BssIdx,
+	UINT8 KeyIdx,
+	UINT8 Wcid,
+	BOOLEAN bAE,
+	PUINT8 pGtk,
+	UINT8 GtkLen);
+
+VOID RTMPSetWcidSecurityInfo(
+	PRTMP_ADAPTER pAd,
+	UINT8 BssIdx,
+	UINT8 KeyIdx,
+	UINT8 CipherAlg,
+	UINT8 Wcid,
+	UINT8 KeyTabFlag);
+
+VOID CalculateMIC(
+	IN UCHAR KeyDescVer,
+	IN UCHAR *PTK,
+	OUT PEAPOL_PACKET pMsg);
+
+PSTRING GetEapolMsgType(
+	CHAR msg);
+
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+
+/* 
+ =====================================	
+ 	function prototype in cmm_wep.c
+ =====================================	
+*/
+UINT RTMP_CALC_FCS32(
+	IN UINT Fcs,
+	IN PUCHAR Cp,
+	IN INT Len);
+
+VOID RTMPConstructWEPIVHdr(
+	IN UINT8 key_idx,
+	IN UCHAR *pn,
+	OUT UCHAR *iv_hdr);
+
+BOOLEAN RTMPSoftEncryptWEP(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pIvHdr,
+	IN PCIPHER_KEY pKey,
+	INOUT PUCHAR pData,
+	IN ULONG DataByteCnt);
+
+BOOLEAN RTMPSoftDecryptWEP(
+	IN PRTMP_ADAPTER pAd,
+	IN PCIPHER_KEY pKey,
+	INOUT PUCHAR pData,
+	INOUT UINT16 *DataByteCnt);
+
+/* 
+ =====================================	
+ 	function prototype in cmm_tkip.c
+ =====================================	
+*/
+BOOLEAN RTMPSoftDecryptTKIP(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pHdr,
+	IN UCHAR UserPriority,
+	IN PCIPHER_KEY pKey,
+	INOUT PUCHAR pData,
+	IN UINT16 *DataByteCnt);
+
+VOID TKIP_GTK_KEY_WRAP(
+	IN UCHAR *key,
+	IN UCHAR *iv,
+	IN UCHAR *input_text,
+	IN UINT32 input_len,
+	OUT UCHAR *output_text);
+
+VOID TKIP_GTK_KEY_UNWRAP(
+	IN UCHAR *key,
+	IN UCHAR *iv,
+	IN UCHAR *input_text,
+	IN UINT32 input_len,
+	OUT UCHAR *output_text);
+
+/* 
+ =====================================	
+ 	function prototype in cmm_aes.c
+ =====================================	
+*/
+BOOLEAN RTMPSoftDecryptAES(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pData,
+	IN ULONG DataByteCnt,
+	IN PCIPHER_KEY pWpaKey);
+
+VOID RTMPConstructCCMPHdr(
+	IN UINT8 key_idx,
+	IN UCHAR *pn,
+	OUT UCHAR *ccmp_hdr);
+
+BOOLEAN RTMPSoftEncryptCCMP(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pHdr,
+	IN PUCHAR pIV,
+	IN PUCHAR pKey,
+	INOUT PUCHAR pData,
+	IN UINT32 DataLen);
+
+BOOLEAN RTMPSoftDecryptCCMP(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pHdr,
+	IN PCIPHER_KEY pKey,
+	INOUT PUCHAR pData,
+	INOUT UINT16 *DataLen);
+
+VOID CCMP_test_vector(
+	IN PRTMP_ADAPTER pAd,
+	IN INT input);
+
+#endif
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/wsc.h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/wsc.h
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/include/wsc.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/include/wsc.h	2017-09-23 03:42:49.818675675 +0800
@@ -0,0 +1,104 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifndef	__WSC_H__
+#define	__WSC_H__
+
+/* WSC OUI SMI */
+#define WSC_OUI				0x0050f204
+#define	WSC_SMI				0x00372A
+#define	WSC_VENDOR_TYPE		0x00000001
+
+/* EAP code */
+#define	EAP_CODE_REQ		0x01
+#define	EAP_CODE_RSP		0x02
+#define	EAP_CODE_FAIL		0x04
+#define EAP_TYPE_ID			0x01
+#define EAP_TYPE_NOTIFY		0x02
+#define	EAP_TYPE_WSC		0xfe
+
+/* structure to store Simple Config Attributes Info */
+typedef struct GNU_PACKED _WSC_LV_INFO {
+    USHORT  ValueLen;
+    UCHAR   Value[512];
+} WSC_LV_INFO;
+
+typedef struct GNU_PACKED _WSC_IE_HEADER {
+	UCHAR elemId;
+	UCHAR length;
+	UCHAR oui[4];
+} WSC_IE_HEADER;
+
+/* WSC IE structure */
+typedef	struct GNU_PACKED	_WSC_IE
+{
+	USHORT	Type;
+	USHORT	Length;
+	UCHAR	Data[1];	/* variable length data */
+}	WSC_IE, *PWSC_IE;
+
+/* WSC fixed information within EAP */
+typedef	struct GNU_PACKED	_WSC_FRAME	{
+	UCHAR	SMI[3];
+	UINT	VendorType;
+	UCHAR	OpCode;
+	UCHAR	Flags;
+}	WSC_FRAME, *PWSC_FRAME;
+
+/* EAP frame format */
+typedef	struct GNU_PACKED	_EAP_FRAME	{
+	UCHAR	Code;						/* 1 = Request, 2 = Response */
+	UCHAR	Id;
+	USHORT	Length;
+	UCHAR	Type;						/* 1 = Identity, 0xfe = reserved, used by WSC */
+}	EAP_FRAME, *PEAP_FRAME;
+
+static inline BOOLEAN WscCheckWSCHeader(
+    IN  PUCHAR              pData)
+{
+    PWSC_FRAME			pWsc;
+
+	pWsc = (PWSC_FRAME) pData;
+
+    /* Verify SMI first */
+	if (((pWsc->SMI[0] * 256 + pWsc->SMI[1]) * 256 + pWsc->SMI[2]) != WSC_SMI)
+	{
+		/* Wrong WSC SMI Vendor ID, Update WSC status */
+		return  FALSE;
+	}
+    
+    /* Verify Vendor Type */
+	if (cpu2be32(get_unaligned32(&pWsc->VendorType)) != WSC_VENDOR_TYPE)
+	{
+		/* Wrong WSC Vendor Type, Update WSC status */
+		return  FALSE;
+	}
+    return TRUE;
+}
+
+#endif	/* __WSC_H__ */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/iwpriv_usage.txt linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/iwpriv_usage.txt
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/iwpriv_usage.txt	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/iwpriv_usage.txt	2017-09-23 03:42:49.818675675 +0800
@@ -0,0 +1,447 @@
+iwpriv
+=================
+This is detailed explanation of each parameters for iwpriv.
+Before reading this document, make sure you already read README.
+
+-------------------------------------------------------------------------------------------------------
+USAGE:
+	iwpriv ra0 commands val
+
+NOTE:
+	Wireless Extension Private Handlers
+
+where
+[commands]              [val] 
+						{range}
+-----------------   	-------------------------------------------------
+wsc_conf_mode			{0, 1, 2}
+						::Set WPS conf mode
+						0: WPS Disabled
+						1: Enrollee
+						2: Registrar
+
+wsc_mode				{1, 2}
+						::PIN or PBC
+						1: PIN
+						2: PBC
+
+wsc_pin					{00000000 ~ 99999999}
+						::Set Enrollee's PIN Code
+
+wsc_ssid				{0~z, 1~32 ascii characters}
+						::Set WPS AP SSID
+
+wsc_start				NULL
+						::Trigger RT2860 STA driver to do WPS process
+
+wsc_stop				NULL
+						::Stop WPS process
+
+wsc_gen_pincode			NULL
+						::Generate new PIN code
+
+wsc_cred_count			{1 ~ 8}
+						::Set count of WPS credential
+
+wsc_cred_ssid			{"idx ssid_str"}
+						::Set SSID into credtentail[idx]
+						idx: 0 ~ 7
+						ssid_str: 0~z, 1~32 ascii characters
+
+wsc_cred_auth			{"idx auth_str"}
+						::Set AuthMode into credtentail[idx]
+						idx: 0 ~ 7
+						auth_str: OPEN, WPAPSK, WPA2PSK, SHARED, WPA, WPA2
+
+wsc_cred_encr			{"idx encr_str"}
+						::Set EncrypType into credtentail[idx]
+						idx: 0 ~ 7
+				 		encr_str: NONE, WEP, TKIP, AES
+
+wsc_cred_keyIdx			{"idx key_index"}
+						::Set Key Index into credtentail[idx]
+						idx: 0 ~ 7
+						key_index: 1 ~ 4
+
+wsc_cred_key			{"idx key"}
+						::Set Key into credtentail[idx]
+						idx: 0 ~ 7
+						key: ASCII string (wep_key_len(=5,13), passphrase_len(=8~63)) 
+					  		 OR 
+					  		 Hex string (wep_key_len(=10,26), passphrase_len(=64))
+
+wsc_cred_mac			{"idx mac_str"}
+						::Set AP's MAC into credtentail[idx]
+						idx: 0 ~ 7
+						mac_str: xx:xx:xx:xx:xx:xx
+
+wsc_conn_by_idx			{0 ~ 7}
+						::Connect AP by credential index
+
+wsc_auto_conn			{0, 1}
+						::Set driver to re-connecting to AP or not after registration.
+						0: Disabled, driver won't re-connect to AP with new configurations.
+						1: Enabled, driver will re-connect to AP with new configurations.
+
+wsc_ap_band 			{0, 1, 2}
+						::Set prefer band to do WPS with dual band WPS AP
+						0 : prefer 2.4G
+						1 : prefer 5G
+						2 : auto
+						Default value is auto (2)
+
+-------------------------------------------------------------------------------------------------------
+USAGE:
+	iwpriv ra0 set [parameters]=[val]
+	
+NOTE:
+	Execute one iwpriv/set command simultaneously.
+	
+where		
+[parameters]        	[val] 
+						{range}
+-----------------   	-------------------------------------------------
+CountryRegion       	{0~7}
+						::Set country region                                   	
+						0: 1 ~ 11 ch
+						1: 1 ~ 13 ch
+						2: 10, 11 ch
+						3: 10 ~ 13 ch
+						4: 14 ch
+						5: 1 ~ 14 ch
+						6: 3 ~ 9 ch
+						7: 5 ~ 13 ch
+					   31: 1 ~ 14 ch (ch1-11:active scan, ch12-14 passive scan)
+											
+CountryRegionABand		{0~11}
+						::Set country region for A band  										                                       
+       					0: 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165 ch
+						1: 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140 ch
+						2: 36, 40, 44, 48, 52, 56, 60, 64 ch
+						3: 52, 56, 60, 64, 149, 153, 157, 161 ch
+						4: 149, 153, 157, 161, 165 ch
+						5: 149, 153, 157, 161 ch
+						6: 36, 40, 44, 48 ch
+						7: 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165 ch
+						8: 52, 56, 60, 64 ch
+						9: 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165 ch
+					   10: 36, 40, 44, 48, 149, 153, 157, 161, 165 ch
+					   11: 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 149, 153, 157, 161 ch
+                                                           
+SSID                	{0~z, 1~32 ascii characters} 			
+                    	::Set AP SSID
+                    	
+WirelessMode        	{0~10}
+						::Set Wireless Mode								 
+                    	0: legacy 11b/g mixed 
+						1: legacy 11B only 
+						2: legacy 11A only
+						3: legacy 11a/b/g mixed
+						4: legacy 11G only
+						5: 11ABGN mixed
+						6: 11N only
+						7: 11GN mixed
+						8: 11AN mixed
+						9: 11BGN mixed
+	   				   10: 11AGN mixed	
+                    	
+Channel             	depends on CountryRegion or CountryRegionForABand
+                        ::Set Channel
+                    	
+BGProtection        	{0~2}
+						::Set 11B/11G Protection                                   	
+                   		0:Auto, 
+                   		1:Always on, 
+                   		2:Always off
+                    	
+TxPreamble          	{0~2}
+						::Set TxPreamble
+                    	0:Preamble Long, 
+                    	1:Preamble Short, 
+                    	2:Auto
+                    	
+RTSThreshold        	{1~2347}                               	                                                           
+                    	::Set RTS Threshold
+                    	                                       
+FragThreshold       	{256~2346}
+						::Set Fragment Threshold                             	
+                    	
+TxBurst             	{0,1}
+						::Set TxBurst Enable or Disable                                  	
+                  		0:Disable, 
+                  		1:Enable
+
+NetworkType	    		{Infra,Adhoc}
+    					::Set Network type
+    					 									                                                                                                                                                        	                                                          
+AuthMode            	{OPEN,SHARED,WEPAUTO,WPAPSK,WPA2PSK,WPANONE}
+                        ::Set Authentication Mode 	
+
+EncrypType          	{NONE,WEP,TKIP,AES}          			
+						::Set Encryption Type
+						 
+DefaultKeyID        	{1~4}                              		
+						::Set Default Key ID
+						
+						
+Key1                 	{5 ascii characters or 10 hex number or 
+                     	13 ascii characters or 26 hex numbers}
+                     	::Set Key1 String                                                                                                                        
+
+Key2                 	{5 ascii characters or 10 hex number or 
+                     	13 ascii characters or 26 hex numbers}                                                                                                                        
+                      	::Set Key2 String
+                      	           	
+Key3                 	{5 ascii characters or 10 hex number or 
+                     	13 ascii characters or 26 hex numbers}                                                                                                                        
+						::Set Key3 String
+						 
+Key4                 	{5 ascii characters or 10 hex number or 
+                     	13 ascii characters or 26 hex numbers}                                                                                                                        
+                        ::Set Key4 String
+                                                        
+WPAPSK              	{8~63 ascii or 64 hex characters} 		 
+						::WPA Pre-Shared Key
+                    																		
+WmmCapable				{0,1}
+						::Set WMM Capable
+						0:Disable WMM, 
+						1:Enable WMM
+
+PSMode					{CAM, MAX_PSP, FAST_PSP}
+						::Set Power Saving Mode
+
+HtBw					{0,1}
+						::Set BandWidth
+						0: 20Hz
+						1: 40Hz
+
+HtMcs					{0 ~ 15, 33}
+						::Set MCS
+						33: Auto Rate
+
+HtGi					{0,1}
+						::Set Guard Interval(GI)
+						0: long GI
+						1: short GI
+
+HtOpMode				{0,1}
+						::Set HT Operation Mode
+						0: HT mixed format
+						1: HT greenfield format
+
+HtExtcha				{0,1}
+						::Set Extended Channel Switch Announcement
+						0: Below
+						1: Above
+
+HtMpduDensity			{0 ~ 7}
+						::Set The Minimum Time Between MPDUs within an AMPDU
+
+HtBaWinSize				{1 ~ 64}
+						::Set BA WinSize
+
+HtRdg					{0,1}
+						::Set RDG Capable
+						0: Disabled
+						1: Enabled
+
+HtAmsdu					{0,1}
+						::Set AMSDU Capable
+						0: Disabled
+						1: Enabled
+
+HtAutoBa				{0,1}
+						::Set Auto BA Capable
+						0: Disabled
+						1: Enabled
+
+HtBaDecline				{0,1}
+						::Reject BA request from AP
+						0: Disabled
+						1: Enabled
+
+HtProtect				{0,1}
+						::Set HT Protect Capable
+						0: Disabled
+						1: Enabled
+
+FixedTxMode				{CCK, OFDM}
+						:: Set Fixed Tx Mode for fixed rate setting
+						Mode = CCK
+						MCS = 0		=> 1Mbps
+							= 1		=> 2Mbps
+							= 2		=> 5.5 Mbps
+							= 3		=> 11 Mbps
+						Mode = OFDM
+						MCS = 0		=> 6Mbps
+						 	= 1		=> 9Mbps
+							= 2		=> 12Mbps
+							= 3		=> 18Mbps
+							= 4		=> 24Mbps
+							= 5		=> 36Mbps
+							= 6		=> 48Mbps
+							= 7		=> 54Mbps
+
+==> Build Ethernet Convert function. Please set 'HAS_ETH_CONVERT_SUPPORT=y' in os/linux/config.mk
+EthConvertMode			{dongle, clone, hybrid}
+						::Set Ethernet Convert Mode
+
+EthCloneMac				{xx:xx:xx:xx:xx:xx}
+						:: Set Clone MAC
+
+LongRetry				{0,255}
+						:: Set Tx Long Retry Limit
+
+ShortRetry				{0,255}
+						:: Set Tx Short Retry Limit
+
+MeshId					{Length 1~32 ascii characters}
+						:: Set Mesh ID
+
+MeshHostName			{Length 1~32 ascii characters}
+						:: Set Mesh Host Name
+
+MeshAutoLink			{1,0}
+						:: Set Mesh Auto Link Capable
+						0: Disabled
+						1: Enabled
+
+MeshAddLink				{xx:xx:xx:xx:xx:xx}
+						:: Add Mesh Link
+
+MeshDelLink				{xx:xx:xx:xx:xx:xx}
+						:: Delete Mesh Link
+
+MeshMultiCastAgeOut		{20 ~ 65535 seconds}
+						:: Set AgeOut time for Mesh MultiCast
+
+MeshAuthMode			{OPEN, WPANONE}
+						:: Set Mesh Authentication Mode
+
+MeshEncrypType			{NONE, WEP, TKIP, AES}
+						:: Set Mesh Encryption Type
+
+MeshDefaultkey			{1 ~ 4}
+						:: Set Mesh Default Key ID
+
+MeshWEPKEY				{5 ascii characters or 10 hex number or 
+                     	13 ascii characters or 26 hex numbers}
+                     	:: Set Mesh WEP Key String
+
+MeshWPAKEY				{8~63 ascii or 64 hex characters}
+						:: Set Mesh WPA Pre-Shared Key
+
+Examples
+===================================================================
+-------------------------------------------------------------------------------------------------------
+a> Config STA to link with AP which is OPEN/NONE(Authentication/Encryption)
+	1. iwpriv ra0 set NetworkType=Infra
+	2. iwpriv ra0 set AuthMode=OPEN
+	3. iwpriv ra0 set EncrypType=NONE
+	4. iwpriv ra0 set SSID="AP's SSID"
+	
+b> Config STA to link with AP which is SHARED/WEP(Authentication/Encryption)
+	1. iwpriv ra0 set NetworkType=Infra
+	2. iwpriv ra0 set AuthMode=SHARED
+	3. iwpriv ra0 set EncrypType=WEP
+	4. iwpriv ra0 set DefaultKeyID=1
+	5. iwpriv ra0 set Key1="AP's wep key"
+	6. iwpriv ra0 set SSID="AP's SSID"
+	
+c> Config STA to link with AP which is WPAPSK/TKIP(Authentication/Encryption)
+	1. iwpriv ra0 set NetworkType=Infra
+	2. iwpriv ra0 set AuthMode=WPAPSK
+	3. iwpriv ra0 set EncrypType=TKIP
+	4. iwpriv ra0 set SSID="AP's SSID"
+	5. iwpriv ra0 set WPAPSK="AP's wpa-preshared key"
+	6. iwpriv ra0 set SSID="AP's SSID"
+	
+d> Config STA to link with AP which is WPAPSK/AES(Authentication/Encryption)
+	1. iwpriv ra0 set NetworkType=Infra
+	2. iwpriv ra0 set AuthMode=WPAPSK
+	3. iwpriv ra0 set EncrypType=AES
+	4. iwpriv ra0 set SSID="AP's SSID"
+	5. iwpriv ra0 set WPAPSK="AP's wpa-preshared key"
+	6. iwpriv ra0 set SSID="AP's SSID"
+
+e> Config STA to link with AP which is WPA2PSK/TKIP(Authentication/Encryption)
+	1. iwpriv ra0 set NetworkType=Infra
+	2. iwpriv ra0 set AuthMode=WPA2PSK
+	3. iwpriv ra0 set EncrypType=TKIP
+	4. iwpriv ra0 set SSID="AP's SSID"
+	5. iwpriv ra0 set WPAPSK=12345678
+	6. iwpriv ra0 set SSID="AP's SSID"
+	
+f> Config STA to create/link as adhoc mode, which is OPEN/NONE(Authentication/Encryption)
+	1. iwpriv ra0 set NetworkType=Adhoc
+	2. iwpriv ra0 set AuthMode=OPEN
+	3. iwpriv ra0 set EncrypType=NONE
+	4. iwpriv ra0 set SSID="Adhoc's SSID"
+
+g>  Config STA to create/link as adhoc mode, which is WPANONE/TKIP(Authentication/Encryption)
+    1. iwpriv ra0 set NetworkType=Adhoc
+	2. iwpriv ra0 set AuthMode=WPANONE
+	3. iwpriv ra0 set EncrypType=TKIP
+	4. iwpriv ra0 set SSID="AP's SSID"
+	5. iwpriv ra0 set WPAPSK=12345678
+	6. iwpriv ra0 set SSID="AP's SSID"
+  
+h> Get site survey 
+	usage: iwpriv ra0 get_site_survey
+		
+i> Get Statistics 
+	usage: iwpriv ra0 stat						; read statistic counter
+		   iwpriv ra0 set ResetCounter=0		; reset statistic counter
+
+j> Link with an AP which is the largest strength   ; set ANY SSID (ssidLen=0)
+   usage: iwconfig ra0 essid ""                 
+   or
+   usage: iwpriv ra0 set SSID=""
+
+k> Config STA to link as dongle mode with STA own MAC
+	usage: iwpriv ra0 set EthConvertMode=dongle
+
+l> Config STA to link as clone mode
+	usage: iwpriv ra0 set EthConvertMode=clone
+		   iwpriv ra0 set EthCloneMac="Desired MAC"		;; 00:00:00:00:00:00 means using STA own MAC
+														;; FF:FF:FF:FF:FF:FF means using source MAC of first packet coming from wired device
+
+m> Config STA to link as hybrid(dongle+clone) mode
+	usage: iwpriv ra0 set EthConvertMode=hybrid
+		   iwpriv ra0 set EthCloneMac="Desired MAC"		;; 00:00:00:00:00:00 means using STA own MAC
+														;; FF:FF:FF:FF:FF:FF means using source MAC of first packet coming from wired device
+
+===================================================================
+
+iwlist
+=================
+This is detailed explanation of each parameters for iwlist.
+
+-------------------------------------------------------------------------------------------------------
+iwlist ra0 scanning		; list the results after scanning(manual rescan)
+
+
+
+=======================================================================================================
+
+iwconfig
+=================
+The following are our support in standard configuration - iwconfig
+
+-------------------------------------------------------------------------------------------------------
+iwconfig ra0 essid {NN|on|off}			; set essid
+iwconfig ra0 mode {managed|ad-hoc|...}  ; set wireless mode
+>> rt2860sta driver support monitor mode with linux kernel > 2.4.20.
+>> Note: For using monitor mode => if mesh interface is ON, please down the mesh interface first.
+iwconfig ra0 freq N.NNNN[k|M|G]]		; set frequency
+iwconfig ra0 channel N					; set channel
+iwconfig ra0 ap {N|off|auto}			; set AP address
+iwconfig ra0 nick N						; set nickname
+iwconfig ra0 rate {N|auto|fixed}     	; set rate (only support legacy rate setting)
+iwconfig ra0 rts {N|auto|fixed|off}		; set RTS threshold
+iwconfig ra0 frag {N|auto|fixed|off}	; set Fragment threshold
+iwconfig ra0 enc {NNNN-NNNN|off}		; set encryption type
+iwconfig ra0 power {period N|timeout N}	; set power management modes
+
+*** Wireless extension usage please refer to man page of 'iwconfig', 'iwlist' and 'iwpriv'. ***
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/Kconfig linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/Kconfig
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/Kconfig	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/Kconfig	2017-09-23 03:42:49.818675675 +0800
@@ -0,0 +1,6 @@
+config RT3070_LS1B
+	tristate "loongson-1b of rt3070 Wireless module support"
+	depends on MAC80211
+	select CRC_CCITT
+	select WIRELESS_EXT
+	select WEXT_PRIV
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/Makefile linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/Makefile
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/Makefile	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/Makefile	2017-09-23 03:42:49.818675675 +0800
@@ -0,0 +1,518 @@
+ifeq ($(WIFI_MODE),)
+RT28xx_MODE = STA
+else
+RT28xx_MODE = $(WIFI_MODE)
+endif
+
+ifeq ($(TARGET),)
+TARGET = LINUX
+endif
+
+ifeq ($(CHIPSET),)
+#CHIPSET = 5370
+CHIPSET = 3070
+endif
+
+#OS ABL - YES or NO
+OSABL = NO
+
+ifneq ($(TARGET),THREADX)
+#RT28xx_DIR = home directory of RT28xx source code
+RT28xx_DIR = $(shell pwd)
+endif
+
+#lxy
+RT28xx_DIR = $(shell pwd)/drivers/net/wireless/rt3070_ls1b
+
+RTMP_SRC_DIR = $(RT28xx_DIR)/RT$(CHIPSET)
+
+PLATFORM = LS1B
+#PLATFORM: Target platform
+#PLATFORM = PC
+#PLATFORM = 5VT
+#PLATFORM = IKANOS_V160
+#PLATFORM = IKANOS_V180
+#PLATFORM = SIGMA
+#PLATFORM = SIGMA_8622
+#PLATFORM = INIC
+#PLATFORM = STAR
+#PLATFORM = IXP
+#PLATFORM = INF_TWINPASS
+#PLATFORM = INF_DANUBE
+#PLATFORM = INF_AR9
+#PLATFORM = INF_VR9
+#PLATFORM = BRCM_6358
+#PLATFORM = INF_AMAZON_SE
+#PLATFORM = CAVM_OCTEON
+#PLATFORM = CMPC
+#PLATFORM = RALINK_2880
+#PLATFORM = RALINK_3052
+#PLATFORM = SMDK
+#PLATFORM = RMI
+#PLATFORM = RMI_64
+#PLATFORM = KODAK_DC
+#PLATFORM = DM6446
+#PLATFORM = FREESCALE8377
+#PLATFORM = BL2348
+#PLATFORM = BLUBB
+#PLATFORM = BLPMP
+#PLATFORM = MT85XX
+#PLATFORM = NXP_TV550
+#PLATFORM = MVL5
+#PLATFORM = RALINK_3352
+
+#APSOC
+ifeq ($(CHIPSET),3050)
+PLATFORM = RALINK_3050
+endif
+ifeq ($(CHIPSET),3052)
+PLATFORM = RALINK_3052
+endif
+ifeq ($(CHIPSET),3350)
+PLATFORM = RALINK_3050
+endif
+ifeq ($(CHIPSET),3352)
+PLATFORM = RALINK_3352
+endif
+
+
+#RELEASE Package
+RELEASE = DPO
+
+
+ifeq ($(TARGET),LINUX)
+MAKE = make
+endif
+
+ifeq ($(TARGET), UCOS)
+MAKE = make
+endif
+ifeq ($(TARGET),THREADX)
+MAKE = gmake
+endif
+
+ifeq ($(TARGET), ECOS)
+MAKE = make
+MODULE = $(shell pwd | sed "s/.*\///" ).o
+export MODULE
+endif
+
+ifeq ($(PLATFORM),5VT)
+LINUX_SRC = /home/ralink-2860-sdk-5vt-distribution/linux-2.6.17
+CROSS_COMPILE = /opt/crosstool/uClibc_v5te_le_gcc_4_1_1/bin/arm-linux-
+endif
+
+ifeq ($(PLATFORM),IKANOS_V160)
+LINUX_SRC = /home/sample/projects/LX_2618_RG_5_3_00r4_SRC/linux-2.6.18
+CROSS_COMPILE = mips-linux-
+endif
+
+ifeq ($(PLATFORM),IKANOS_V180)
+LINUX_SRC = /home/sample/projects/LX_BSP_VX180_5_4_0r1_ALPHA_26DEC07/linux-2.6.18
+CROSS_COMPILE = mips-linux-
+endif
+
+
+ifeq ($(PLATFORM),LS1B)
+#LINUX_SRC = /root/sigma/smp86xx_kernel_source_2.7.172.0/linux-2.6.15
+#CROSS_COMPILE = /root/sigma/smp86xx_toolchain_2.7.172.0/build_mipsel_nofpu/staging_dir/bin/mipsel-linux-
+LINUX_SRC = /home/aa/1b-linux-3.0
+CROSS_COMPILE = mipsel-loongson-linux-gnu-
+endif
+
+ifeq ($(PLATFORM),SIGMA)
+#LINUX_SRC = /root/sigma/smp86xx_kernel_source_2.7.172.0/linux-2.6.15
+#CROSS_COMPILE = /root/sigma/smp86xx_toolchain_2.7.172.0/build_mipsel_nofpu/staging_dir/bin/mipsel-linux-
+LINUX_SRC = /home/aa/1b-linux-3.0
+CROSS_COMPILE = mipsel-loongson-linux-gnu-
+endif
+
+ifeq ($(PLATFORM),SIGMA_8622)
+LINUX_SRC = /home/snowpin/armutils_2.5.120.1/build_arm/linux-2.4.22-em86xx
+CROSS_COMPILE = /home/snowpin/armutils_2.5.120.1/toolchain/bin/arm-elf-
+CROSS_COMPILE_INCLUDE = /home/snowpin/armutils_2.5.120.1/toolchain/lib/gcc-lib/arm-elf/2.95.3
+endif
+
+ifeq ($(PLATFORM),INIC)
+UCOS_SRC = /opt/uCOS/iNIC_rt2880
+CROSS_COMPILE = /usr/bin/mipsel-linux-
+endif
+
+ifeq ($(PLATFORM),STAR)
+LINUX_SRC = /opt/star/kernel/linux-2.4.27-star
+CROSS_COMPILE = /opt/star/tools/arm-linux/bin/arm-linux-
+endif
+
+ifeq ($(PLATFORM),RMI)
+LINUX_SRC = /opt/rmi/1.7.0/linux/src/
+CROSS_COMPILE = /opt/rmi/1.7.0/mipscross/nptl/bin/mips64-unknown-linux-gnu-
+endif
+
+ifeq ($(PLATFORM),RMI_64)
+LINUX_SRC = /opt/rmi/1.7.0/linux_64/src/
+CROSS_COMPILE = /opt/rmi/1.7.0/mipscross/nptl/bin/mips64-unknown-linux-gnu-
+endif
+
+ifeq ($(PLATFORM), RALINK_2880)
+LINUX_SRC = /project/stable/RT288x/RT288x_SDK/source/linux-2.4.x
+CROSS_COMPILE = /opt/buildroot-gdb/bin/mipsel-linux-
+endif
+
+ifeq ($(PLATFORM),RALINK_3052)
+LINUX_SRC = /home/peter/ap_soc/SDK_3_3_0_0/RT288x_SDK/source/linux-2.6.21.x
+CROSS_COMPILE = /opt/buildroot-gcc342/bin/mipsel-linux-uclibc-
+endif
+
+ifeq ($(PLATFORM),FREESCALE8377)
+LINUX_SRC = /opt/ltib-mpc8377_rds-20090309/rpm/BUILD/linux-2.6.25 
+CROSS_COMPILE = /opt/freescale/usr/local/gcc-4.2.187-eglibc-2.5.187/powerpc-linux-gnu/bin/powerpc-linux-gnu-
+endif
+
+ifeq ($(PLATFORM),BL2348)
+LINUX_SRC = /home/sample/Customers/BroadLight/bl234x-linux-2.6.21-small-v29
+CROSS_COMPILE = mips-wrs-linux-gnu-
+endif
+
+ifeq ($(PLATFORM),BLUBB)
+LINUX_SRC = /home/sample/Customers/BroadLight/UBB/gmp20/linux-2.6.21-small
+CROSS_COMPILE = mips-wrs-linux-gnu-
+endif
+
+ifeq ($(PLATFORM),BLPMP)
+LINUX_SRC = /home/sample/Customers/BroadLight/UBB/pmp16/bl234x-linux-2.6.21-small-v30.2
+CROSS_COMPILE = mips-wrs-linux-gnu-
+endif
+
+ifeq ($(PLATFORM),PC)
+# Linux 2.6
+#LINUX_SRC = /lib/modules/$(shell uname -r)/build
+LINUX_SRC = /home/aa/1b-linux-3.0
+# Linux 2.4 Change to your local setting
+#LINUX_SRC = /usr/src/linux-2.4
+#LINUX_SRC_MODULE = /lib/modules/$(shell uname -r)/kernel/drivers/net/wireless/
+CROSS_COMPILE = mipsel-loongson-linux-gnu-
+endif
+
+ifeq ($(PLATFORM),IXP)
+LINUX_SRC = /project/stable/Gmtek/snapgear-uclibc/linux-2.6.x
+CROSS_COMPILE = arm-linux-
+endif
+
+ifeq ($(PLATFORM),INF_TWINPASS)
+# Linux 2.6
+#LINUX_SRC = /lib/modules/$(shell uname -r)/build
+# Linux 2.4 Change to your local setting
+LINUX_SRC = /project/stable/twinpass/release/2.0.1/source/kernel/opensource/linux-2.4.31/
+CROSS_COMPILE = mips-linux-
+endif
+
+ifeq ($(PLATFORM),INF_DANUBE)
+LINUX_SRC = /opt/danube/sdk/linux-2.6.16.x
+CROSS_COMPILE = mips-linux-
+ROOTDIR = /opt/danube/sdk
+export ROOTDIR
+endif
+
+ifeq ($(PLATFORM),INF_AR9)
+LINUX_SRC = /root/ar9/xR9_BSP1.2.2.0/source/kernel/opensource/linux-2.6.20/
+CROSS_COMPILE = /root/ar9/ifx-lxdb26-1.0.2/gcc-3.4.4/toolchain-mips/bin/
+endif
+
+ifeq ($(PLATFORM),INF_VR9)
+LINUX_SRC = /home/public/lantiq/VR9/UGW-4.2/build_dir/linux-ifxcpe_platform_vr9/linux-2.6.20.19
+CROSS_COMPILE = /home/public/lantiq/VR9/UGW-4.2/staging_dir/toolchain-mips_gcc-3.4.6_uClibc-0.9.29/bin/mips-linux-
+endif
+
+ifeq ($(PLATFORM),BRCM_6358)
+LINUX_SRC = 
+CROSS_COMPILE = 
+endif
+
+ifeq ($(PLATFORM),INF_AMAZON_SE)
+# Linux 2.6
+#LINUX_SRC = /lib/modules/$(shell uname -r)/build
+# Linux 2.4 Change to your local setting
+LINUX_SRC = /backup/ifx/3.6.2.2/source/kernel/opensource/linux-2.4.31
+#CROSS_COMPILE = mips-linux-
+#LINUX_SRC = /project/Infineon/3.6.2.2/source/kernel/opensource/linux-2.4.31
+CROSS_COMPILE = /opt/uclibc-toolchain/ifx-lxdb-1-2-3-external/gcc-3.3.6/toolchain-mips/R0208V35/mips-linux-uclibc/bin/
+endif
+
+ifeq ($(PLATFORM),ST)
+LINUX_SRC = /opt/STM/STLinux-2.2/devkit/sources/kernel/linux0039
+CROSS_COMPILE = /opt/STM/STLinux-2.2/devkit/sh4/bin/sh4-linux-
+ARCH := sh
+export ARCH
+endif
+
+ifeq ($(PLATFORM),CAVM_OCTEON)
+OCTEON_ROOT = /usr/local/Cavium_Networks/OCTEON-SDK
+LINUX_SRC = $(OCTEON_ROOT)/linux/kernel_2.6/linux
+CROSS_COMPILE = mips64-octeon-linux-gnu-
+endif
+
+ifeq ($(PLATFORM),CMPC)
+LINUX_SRC = /opt/fvt_11N_SDK_0807/fvt131x_SDK_11n/linux-2.6.17
+CROSS_COMPILE =
+endif
+
+ifeq ($(PLATFORM),SMDK)
+LINUX_SRC = /home/bhushan/itcenter/may28/linux-2.6-samsung
+CROSS_COMPILE = /usr/local/arm/4.2.2-eabi/usr/bin/arm-linux-
+endif
+
+ifeq ($(PLATFORM),RALINK_3352)
+LINUX_SRC = /home/sample/3352/RT288x_SDK/source/linux-2.6.21.x
+CROSS_COMPILE = /opt/buildroot-gcc342/bin/mipsel-linux-
+endif
+
+ifeq ($(PLATFORM),KODAK_DC)
+SKD_SRC = C:/SigmaTel/DC1250_SDK_v1-9/sdk
+CROSS_COMPILE = $(cc)
+endif
+
+ifeq ($(PLATFORM),DM6446)
+LINUX_SRC = /home/fonchi/work/soc/ti-davinci
+endif
+
+ifeq ($(PLATFORM),MT85XX)
+LINUX_SRC = /home/john/MTK/BDP_Linux/linux-2.6.27
+CROSS_COMPILE = armv6z-mediatek-linux-gnueabi-
+endif
+
+ifeq ($(PLATFORM),NXP_TV550) 
+LINUX_SRC = /data/tv550/kernel/linux-2.6.28.9
+LINUX_SRC_MODULE = /data/tv550/kernel/linux-2.6.28.9/drivers/net/wireless
+CROSS_COMPILE = /opt/embeddedalley/nxp_tv550/bin/mipsel-linux-
+endif
+
+ifeq ($(PLATFORM),MVL5)
+LINUX_SRC = /home2/charlestu/AP-VT3426/linux-2.6.18
+CROSS_COMPILE = /opt/montavista/pro/devkit/arm/v5t_le_mvl5/bin/arm_v5t_le-
+endif
+
+export OSABL RT28xx_DIR RT28xx_MODE LINUX_SRC CROSS_COMPILE CROSS_COMPILE_INCLUDE PLATFORM RELEASE CHIPSET RTMP_SRC_DIR LINUX_SRC_MODULE TARGET
+
+# The targets that may be used.
+PHONY += all build_tools test UCOS THREADX LINUX release prerelease clean uninstall install libwapi osabl
+
+ifeq ($(TARGET),LINUX)
+all: build_tools $(TARGET)
+else
+all: $(TARGET)
+endif 
+
+#lxy
+#all:
+obj-y += os/linux/
+#	cp -f os/linux/Makefile.6 $(RT28xx_DIR)/os/linux/Makefile
+#	$(MAKE) -C $(RT28xx_DIR)/os/linux -f  $(RT28xx_DIR)/os/linux/Makefile
+
+
+#build_tools:
+#	$(MAKE) -C tools
+#	$(RT28xx_DIR)/tools/bin2h
+#
+#test:
+#	$(MAKE) -C tools test
+#
+#UCOS:
+#	$(MAKE) -C os/ucos/ MODE=$(RT28xx_MODE)
+#	echo $(RT28xx_MODE)
+#
+#ECOS:
+#	$(MAKE) -C os/ecos/ MODE=$(RT28xx_MODE)
+#	cp -f os/ecos/$(MODULE) $(MODULE)
+#
+#THREADX:
+#	$(MAKE) -C $(RT28xx_DIR)/os/Threadx -f $(RT28xx_DIR)/os/ThreadX/Makefile
+#
+#LINUX:
+#ifneq (,$(findstring 2.4,$(LINUX_SRC)))
+#
+#ifeq ($(OSABL),YES)
+#	cp -f os/linux/Makefile.4.util $(RT28xx_DIR)/os/linux/Makefile
+#	$(MAKE) -C $(RT28xx_DIR)/os/linux/
+#endif
+#
+#	cp -f os/linux/Makefile.4 $(RT28xx_DIR)/os/linux/Makefile
+#	$(MAKE) -C $(RT28xx_DIR)/os/linux/
+#
+#ifeq ($(OSABL),YES)
+#	cp -f os/linux/Makefile.4.netif $(RT28xx_DIR)/os/linux/Makefile
+#	$(MAKE) -C $(RT28xx_DIR)/os/linux/
+#endif
+#
+#ifeq ($(RT28xx_MODE),AP)
+#	cp -f $(RT28xx_DIR)/os/linux/rt$(CHIPSET)ap.o /tftpboot
+#ifeq ($(OSABL),YES)
+#	cp -f $(RT28xx_DIR)/os/linux/rtutil$(CHIPSET)ap.o /tftpboot
+#	cp -f $(RT28xx_DIR)/os/linux/rtnet$(CHIPSET)ap.o /tftpboot
+#endif
+#ifeq ($(PLATFORM),INF_AMAZON_SE)
+#	cp -f /tftpboot/rt2870ap.o /backup/ifx/build/root_filesystem/lib/modules/2.4.31-Amazon_SE-3.6.2.2-R0416_Ralink/kernel/drivers/net
+#endif
+#else	
+#ifeq ($(RT28xx_MODE),APSTA)
+#	cp -f $(RT28xx_DIR)/os/linux/rt$(CHIPSET)apsta.o /tftpboot
+#ifeq ($(OSABL),YES)
+#	cp -f $(RT28xx_DIR)/os/linux/rtutil$(CHIPSET)apsta.o /tftpboot
+#	cp -f $(RT28xx_DIR)/os/linux/rtnet$(CHIPSET)apsta.o /tftpboot
+#endif
+#else
+#	cp -f $(RT28xx_DIR)/os/linux/rt$(CHIPSET)sta.o /tftpboot
+#ifeq ($(OSABL),YES)
+#	cp -f $(RT28xx_DIR)/os/linux/rtutil$(CHIPSET)sta.o /tftpboot
+#	cp -f $(RT28xx_DIR)/os/linux/rtnet$(CHIPSET)sta.o /tftpboot
+#endif
+#endif	
+#endif	
+#else
+#
+#ifeq ($(OSABL),YES)
+#	cp -f os/linux/Makefile.6.util $(RT28xx_DIR)/os/linux/Makefile
+#	$(MAKE) -C $(LINUX_SRC) SUBDIRS=$(RT28xx_DIR)/os/linux 
+#endif
+#
+#	cp -f os/linux/Makefile.6 $(RT28xx_DIR)/os/linux/Makefile
+#ifeq ($(PLATFORM),DM6446)
+#	$(MAKE)  ARCH=arm CROSS_COMPILE=arm_v5t_le- -C  $(LINUX_SRC) SUBDIRS=$(RT28xx_DIR)/os/linux 
+#else
+#ifeq ($(PLATFORM),FREESCALE8377)
+#	$(MAKE) ARCH=powerpc CROSS_COMPILE=$(CROSS_COMPILE) -C  $(LINUX_SRC) SUBDIRS=$(RT28xx_DIR)/os/linux 
+#else
+#	$(MAKE) -C $(LINUX_SRC) SUBDIRS=$(RT28xx_DIR)/os/linux 
+#endif
+#endif
+#
+#ifeq ($(OSABL),YES)
+#	cp -f os/linux/Makefile.6.netif $(RT28xx_DIR)/os/linux/Makefile
+#	$(MAKE) -C $(LINUX_SRC) SUBDIRS=$(RT28xx_DIR)/os/linux 
+#endif
+#
+#ifeq ($(RT28xx_MODE),AP)
+#	cp -f $(RT28xx_DIR)/os/linux/rt$(CHIPSET)ap.ko /tftpboot
+#ifeq ($(OSABL),YES)
+#	cp -f $(RT28xx_DIR)/os/linux/rtutil$(CHIPSET)ap.ko /tftpboot
+#	cp -f $(RT28xx_DIR)/os/linux/rtnet$(CHIPSET)ap.ko /tftpboot
+#endif
+#	rm -f os/linux/rt$(CHIPSET)ap.ko.lzma
+#	/root/bin/lzma e os/linux/rt$(CHIPSET)ap.ko os/linux/rt$(CHIPSET)ap.ko.lzma
+#else	
+#ifeq ($(RT28xx_MODE),APSTA)
+#	cp -f $(RT28xx_DIR)/os/linux/rt$(CHIPSET)apsta.ko /tftpboot
+#ifeq ($(OSABL),YES)
+#	cp -f $(RT28xx_DIR)/os/linux/rtutil$(CHIPSET)apsta.ko /tftpboot
+#	cp -f $(RT28xx_DIR)/os/linux/rtnet$(CHIPSET)apsta.ko /tftpboot
+#endif
+#else
+#	cp -f $(RT28xx_DIR)/os/linux/rt$(CHIPSET)sta.ko /tftpboot
+#ifeq ($(OSABL),YES)
+#	cp -f $(RT28xx_DIR)/os/linux/rtutil$(CHIPSET)sta.ko /tftpboot
+#	cp -f $(RT28xx_DIR)/os/linux/rtnet$(CHIPSET)sta.ko /tftpboot
+#endif
+#endif
+#endif
+#endif
+#
+#
+#release:
+#	$(MAKE) -C $(RT28xx_DIR)/striptool -f Makefile.release clean
+#	$(MAKE) -C $(RT28xx_DIR)/striptool -f Makefile.release
+#	striptool/striptool.out
+#ifeq ($(RELEASE), DPO)
+#	gcc -o striptool/banner striptool/banner.c
+#	./striptool/banner -b striptool/copyright.gpl -s DPO/ -d DPO_GPL -R
+#	./striptool/banner -b striptool/copyright.frm -s DPO_GPL/include/firmware.h
+#endif
+#
+#prerelease:
+#ifeq ($(CHIPSET), 2880)
+#	$(MAKE) -C $(RT28xx_DIR)/os/linux -f Makefile.release.2880 prerelease
+#else
+#	$(MAKE) -C $(RT28xx_DIR)/os/linux -f Makefile.release prerelease
+#endif
+#	cp $(RT28xx_DIR)/os/linux/Makefile.DPB $(RTMP_SRC_DIR)/os/linux/.
+#	cp $(RT28xx_DIR)/os/linux/Makefile.DPA $(RTMP_SRC_DIR)/os/linux/.
+#	cp $(RT28xx_DIR)/os/linux/Makefile.DPC $(RTMP_SRC_DIR)/os/linux/.
+#ifeq ($(RT28xx_MODE),STA)
+#	cp $(RT28xx_DIR)/os/linux/Makefile.DPD $(RTMP_SRC_DIR)/os/linux/.
+#	cp $(RT28xx_DIR)/os/linux/Makefile.DPO $(RTMP_SRC_DIR)/os/linux/.
+#endif	
+#
+#clean:
+#ifeq ($(TARGET), LINUX)
+#	cp -f os/linux/Makefile.clean os/linux/Makefile
+#	$(MAKE) -C os/linux clean
+#	rm -rf os/linux/Makefile
+#endif	
+#ifeq ($(TARGET), UCOS)
+#	$(MAKE) -C os/ucos clean MODE=$(RT28xx_MODE)
+#endif
+#ifeq ($(TARGET), ECOS)
+#	$(MAKE) -C os/ecos clean MODE=$(RT28xx_MODE)
+#endif
+#
+#uninstall:
+#ifeq ($(TARGET), LINUX)
+#ifneq (,$(findstring 2.4,$(LINUX_SRC)))
+#	$(MAKE) -C $(RT28xx_DIR)/os/linux -f Makefile.4 uninstall
+#else
+#	$(MAKE) -C $(RT28xx_DIR)/os/linux -f Makefile.6 uninstall
+#endif
+#endif
+#
+#install:
+#ifeq ($(TARGET), LINUX)
+#ifneq (,$(findstring 2.4,$(LINUX_SRC)))
+#	$(MAKE) -C $(RT28xx_DIR)/os/linux -f Makefile.4 install
+#else
+#	$(MAKE) -C $(RT28xx_DIR)/os/linux -f Makefile.6 install
+#endif
+#endif
+#
+#libwapi:
+#ifneq (,$(findstring 2.4,$(LINUX_SRC)))
+#	cp -f os/linux/Makefile.libwapi.4 $(RT28xx_DIR)/os/linux/Makefile
+#	$(MAKE) -C $(RT28xx_DIR)/os/linux/
+#else
+#	cp -f os/linux/Makefile.libwapi.6 $(RT28xx_DIR)/os/linux/Makefile	
+#	$(MAKE) -C  $(LINUX_SRC) SUBDIRS=$(RT28xx_DIR)/os/linux 
+#endif	
+#
+#osutil:
+#ifeq ($(OSABL),YES)
+#ifneq (,$(findstring 2.4,$(LINUX_SRC)))
+#	cp -f os/linux/Makefile.4.util $(RT28xx_DIR)/os/linux/Makefile
+#	$(MAKE) -C $(RT28xx_DIR)/os/linux/
+#else
+#	cp -f os/linux/Makefile.6.util $(RT28xx_DIR)/os/linux/Makefile
+#	$(MAKE) -C $(LINUX_SRC) SUBDIRS=$(RT28xx_DIR)/os/linux 
+#endif
+#endif
+#
+#osnet:
+#ifeq ($(OSABL),YES)
+#ifneq (,$(findstring 2.4,$(LINUX_SRC)))
+#	cp -f os/linux/Makefile.4.netif $(RT28xx_DIR)/os/linux/Makefile
+#	$(MAKE) -C $(RT28xx_DIR)/os/linux/
+#else
+#	cp -f os/linux/Makefile.6.netif $(RT28xx_DIR)/os/linux/Makefile
+#	$(MAKE) -C $(LINUX_SRC) SUBDIRS=$(RT28xx_DIR)/os/linux 
+#endif
+#endif
+#
+#osdrv:
+#ifneq (,$(findstring 2.4,$(LINUX_SRC)))
+#	cp -f os/linux/Makefile.4 $(RT28xx_DIR)/os/linux/Makefile
+#	$(MAKE) -C $(RT28xx_DIR)/os/linux/
+#else
+#	cp -f os/linux/Makefile.6 $(RT28xx_DIR)/os/linux/Makefile
+#	$(MAKE) -C $(LINUX_SRC) SUBDIRS=$(RT28xx_DIR)/os/linux
+#endif
+#
+## Declare the contents of the .PHONY variable as phony.  We keep that information in a variable
+#.PHONY: $(PHONY)
+
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/br_ftph.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/br_ftph.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/br_ftph.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/br_ftph.c	2017-09-23 03:42:49.818675675 +0800
@@ -0,0 +1,194 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+#ifdef BG_FT_SUPPORT
+#if defined(CONFIG_BRIDGE) || defined(CONFIG_BRIDGE_MODULE)
+#include <linux/netfilter_bridge.h> 
+#include "../net/bridge/br_private.h"
+
+/* extern export symbol in other drivers */
+/*
+	Example in other drivers:
+		UINT32 (*RALINK_FP_Handle)(PNDIS_PACKET pPacket);
+		EXPORT_SYMBOL(RALINK_FP_Handle);
+
+	packet_forward()
+	{
+		UINT32 HandRst = 1;
+
+		......
+
+		if (RALINK_FP_Handle != NULL)
+			HandRst = RALINK_FP_Handle(skb);
+
+		if (HandRst != 0)
+		{
+			/* pass the packet to upper layer */
+			skb->protocol = eth_type_trans(skb, skb->dev);
+			netif_rx(skb);
+		}
+	}
+*/
+UINT32 BG_FTPH_PacketFromApHandle(
+	IN		PNDIS_PACKET	pPacket);
+
+#ifdef BG_FT_OPEN_SUPPORT
+extern UINT32 (*RALINK_FP_Handle)(PNDIS_PACKET pPacket);
+#else
+UINT32 (*RALINK_FP_Handle)(PNDIS_PACKET pPacket);
+#endif /* BG_FT_OPEN_SUPPORT */
+
+
+
+
+/* --------------------------------- Public -------------------------------- */
+
+/*
+========================================================================
+Routine Description:
+	Init bridge fast path module.
+
+Arguments:
+	None
+
+Return Value:
+	None
+
+Note:
+	Used in module init.
+========================================================================
+*/
+VOID BG_FTPH_Init(VOID)
+{
+	RALINK_FP_Handle = BG_FTPH_PacketFromApHandle;
+} /* End of BG_FTPH_Init */
+
+
+/*
+========================================================================
+Routine Description:
+	Remove bridge fast path module.
+
+Arguments:
+	None
+
+Return Value:
+	None
+
+Note:
+	Used in module remove.
+========================================================================
+*/
+VOID BG_FTPH_Remove(VOID)
+{
+	RALINK_FP_Handle = NULL;
+} /* End of BG_FTPH_Init */
+
+
+
+
+/*
+========================================================================
+Routine Description:
+	Forward the received packet.
+
+Arguments:
+	pPacket			- the received packet
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+UINT32 BG_FTPH_PacketFromApHandle(
+	IN		PNDIS_PACKET	pPacket)
+{
+	struct net_device	*pNetDev;
+	struct sk_buff		*pRxPkt;
+	struct net_bridge_fdb_entry *pSrcFdbEntry, *pDstFdbEntry;
+
+
+	/* init */
+	pRxPkt = RTPKT_TO_OSPKT(pPacket);
+	pNetDev = pRxPkt->dev;
+
+	/* if pNetDev is promisc mode ??? */
+	DBGPRINT(RT_DEBUG_INFO, ("ft bg> BG_FTPH_PacketFromApHandle\n"));
+
+	if (pNetDev != NULL)
+	{
+		if (pNetDev->br_port != NULL)
+		{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12)
+			pDstFdbEntry = br_fdb_get_hook(pNetDev->br_port->br, pRxPkt->data);
+			pSrcFdbEntry = br_fdb_get_hook(pNetDev->br_port->br, pRxPkt->data + 6);
+#else
+			/* br_fdb_get is not exported symbol, need exported in net/bridge/br.c */
+			pDstFdbEntry = br_fdb_get(pNetDev->br_port->br, pRxPkt->data);
+			pSrcFdbEntry = br_fdb_get(pNetDev->br_port->br, pRxPkt->data + 6);
+#endif
+
+			/* check destination address in bridge forwarding table */
+			if ((pSrcFdbEntry == NULL) ||
+				(pDstFdbEntry == NULL) ||
+				(pDstFdbEntry->is_local) ||
+				(pDstFdbEntry->dst == NULL) ||
+				(pDstFdbEntry->dst->dev == NULL) ||
+				(pDstFdbEntry->dst->dev == pNetDev) ||
+				(pNetDev->br_port->state != BR_STATE_FORWARDING) ||
+				((pSrcFdbEntry->dst != NULL) &&
+					(pSrcFdbEntry->dst->dev != NULL) &&
+					(pSrcFdbEntry->dst->dev != pNetDev)))
+			{
+
+				goto LabelPassToUpperLayer;
+			} /* End of if */
+
+			if ((!pDstFdbEntry->is_local) &&
+				(pDstFdbEntry->dst != NULL) &&
+				(pDstFdbEntry->dst->dev != NULL))
+			{
+				pRxPkt->dev = pDstFdbEntry->dst->dev;
+				pDstFdbEntry->dst->dev->hard_start_xmit(pRxPkt, pDstFdbEntry->dst->dev);
+				return 0;
+			} /* End of if */
+		} /* End of if */
+	} /* End of if */
+
+LabelPassToUpperLayer:
+	DBGPRINT(RT_DEBUG_TRACE, ("ft bg> Pass packet to bridge module.\n"));
+	return 1;
+} /* End of BG_FTPH_PacketFromApHandle */
+
+
+#endif /* CONFIG_BRIDGE || CONFIG_BRIDGE_MODULE */
+#endif /* BG_FT_SUPPORT */
+
+/* End of bg_ftph.c */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/cfg80211.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/cfg80211.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/cfg80211.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/cfg80211.c	2017-09-23 03:42:49.818675675 +0800
@@ -0,0 +1,1570 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#define RTMP_MODULE_OS
+
+/*#include "rt_config.h" */
+#include "rtmp_comm.h"
+#include "rt_os_util.h"
+#include "rt_os_net.h"
+
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28))
+#ifdef RT_CFG80211_SUPPORT
+
+/* 36 ~ 64, 100 ~ 136, 140 ~ 161 */
+#define CFG80211_NUM_OF_CHAN_5GHZ			\
+							(sizeof(Cfg80211_Chan)-CFG80211_NUM_OF_CHAN_2GHZ)
+
+#ifdef OS_ABL_FUNC_SUPPORT
+/*
+	Array of bitrates the hardware can operate with
+	in this band. Must be sorted to give a valid "supported
+	rates" IE, i.e. CCK rates first, then OFDM.
+
+	For HT, assign MCS in another structure, ieee80211_sta_ht_cap.
+*/
+const struct ieee80211_rate Cfg80211_SupRate[12] = {
+	{
+		.flags = IEEE80211_RATE_SHORT_PREAMBLE,
+		.bitrate = 10,
+		.hw_value = 0,
+		.hw_value_short = 0,
+	},
+	{
+		.flags = IEEE80211_RATE_SHORT_PREAMBLE,
+		.bitrate = 20,
+		.hw_value = 1,
+		.hw_value_short = 1,
+	},
+	{
+		.flags = IEEE80211_RATE_SHORT_PREAMBLE,
+		.bitrate = 55,
+		.hw_value = 2,
+		.hw_value_short = 2,
+	},
+	{
+		.flags = IEEE80211_RATE_SHORT_PREAMBLE,
+		.bitrate = 110,
+		.hw_value = 3,
+		.hw_value_short = 3,
+	},
+	{
+		.flags = 0,
+		.bitrate = 60,
+		.hw_value = 4,
+		.hw_value_short = 4,
+	},
+	{
+		.flags = 0,
+		.bitrate = 90,
+		.hw_value = 5,
+		.hw_value_short = 5,
+	},
+	{
+		.flags = 0,
+		.bitrate = 120,
+		.hw_value = 6,
+		.hw_value_short = 6,
+	},
+	{
+		.flags = 0,
+		.bitrate = 180,
+		.hw_value = 7,
+		.hw_value_short = 7,
+	},
+	{
+		.flags = 0,
+		.bitrate = 240,
+		.hw_value = 8,
+		.hw_value_short = 8,
+	},
+	{
+		.flags = 0,
+		.bitrate = 360,
+		.hw_value = 9,
+		.hw_value_short = 9,
+	},
+	{
+		.flags = 0,
+		.bitrate = 480,
+		.hw_value = 10,
+		.hw_value_short = 10,
+	},
+	{
+		.flags = 0,
+		.bitrate = 540,
+		.hw_value = 11,
+		.hw_value_short = 11,
+	},
+};
+#endif /* OS_ABL_FUNC_SUPPORT */
+
+/* all available channels */
+static const UCHAR Cfg80211_Chan[] = {
+	1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
+
+	/* 802.11 UNI / HyperLan 2 */
+	36, 38, 40, 44, 46, 48, 52, 54, 56, 60, 62, 64,
+
+	/* 802.11 HyperLan 2 */
+	100, 104, 108, 112, 116, 118, 120, 124, 126, 128, 132, 134, 136,
+
+	/* 802.11 UNII */
+	140, 149, 151, 153, 157, 159, 161, 165, 167, 169, 171, 173,
+
+	/* Japan */
+	184, 188, 192, 196, 208, 212, 216,
+};
+
+
+static const UINT32 CipherSuites[] = {
+	WLAN_CIPHER_SUITE_WEP40,
+	WLAN_CIPHER_SUITE_WEP104,
+	WLAN_CIPHER_SUITE_TKIP,
+	WLAN_CIPHER_SUITE_CCMP,
+};
+
+
+
+/*
+	The driver's regulatory notification callback.
+*/
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30))
+static INT32 CFG80211_RegNotifier(
+	IN struct wiphy					*pWiphy,
+	IN struct regulatory_request	*pRequest);
+#else
+static INT32 CFG80211_RegNotifier(
+	IN struct wiphy					*pWiphy,
+	IN enum reg_set_by				Request);
+#endif /* LINUX_VERSION_CODE */
+
+
+
+
+/* =========================== Private Function ============================== */
+
+/* get RALINK pAd control block in 80211 Ops */
+#define MAC80211_PAD_GET(__pAd, __pWiphy)							\
+	{																\
+		ULONG *__pPriv;												\
+		__pPriv = (ULONG *)(wiphy_priv(__pWiphy));					\
+		__pAd = (VOID *)(*__pPriv);									\
+		if (__pAd == NULL)											\
+		{															\
+			DBGPRINT(RT_DEBUG_ERROR,								\
+					("80211> %s but pAd = NULL!", __FUNCTION__));	\
+			return -EINVAL;											\
+		}															\
+	}
+
+/*
+========================================================================
+Routine Description:
+	Set channel.
+
+Arguments:
+	pWiphy			- Wireless hardware description
+	pChan			- Channel information
+	ChannelType		- Channel type
+
+Return Value:
+	0				- success
+	-x				- fail
+
+Note:
+	For iw utility: set channel, set freq
+
+	enum nl80211_channel_type {
+		NL80211_CHAN_NO_HT,
+		NL80211_CHAN_HT20,
+		NL80211_CHAN_HT40MINUS,
+		NL80211_CHAN_HT40PLUS
+	};
+========================================================================
+*/
+static int CFG80211_OpsSetChannel(
+	IN struct wiphy					*pWiphy,
+	IN struct ieee80211_channel		*pChan,
+	IN enum nl80211_channel_type	ChannelType)
+{
+	VOID *pAd;
+	CFG80211_CB *p80211CB;
+	CMD_RTPRIV_IOCTL_80211_CHAN ChanInfo;
+	UINT32 ChanId;
+
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> CFG80211_OpsSetChannel ==>\n"));
+	MAC80211_PAD_GET(pAd, pWiphy);
+
+	/* get channel number */
+	ChanId = ieee80211_frequency_to_channel(pChan->center_freq);
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> Channel = %d\n", ChanId));
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> ChannelType = %d\n", ChannelType));
+
+	/* init */
+	memset(&ChanInfo, 0, sizeof(ChanInfo));
+	ChanInfo.ChanId = ChanId;
+
+	p80211CB = NULL;
+	RTMP_DRIVER_80211_CB_GET(pAd, &p80211CB);
+
+	if (p80211CB == NULL)
+	{
+		CFG80211DBG(RT_DEBUG_ERROR, ("80211> p80211CB == NULL!\n"));
+		return 0;
+	}
+
+	if (p80211CB->pCfg80211_Wdev->iftype == NL80211_IFTYPE_STATION)
+		ChanInfo.IfType = RT_CMD_80211_IFTYPE_STATION;
+	else if (p80211CB->pCfg80211_Wdev->iftype == NL80211_IFTYPE_ADHOC)
+		ChanInfo.IfType = RT_CMD_80211_IFTYPE_ADHOC;
+	else if (p80211CB->pCfg80211_Wdev->iftype == NL80211_IFTYPE_MONITOR)
+		ChanInfo.IfType = RT_CMD_80211_IFTYPE_MONITOR;
+
+	if (ChannelType == NL80211_CHAN_NO_HT)
+		ChanInfo.ChanType = RT_CMD_80211_CHANTYPE_NOHT;
+	else if (ChannelType == NL80211_CHAN_HT20)
+		ChanInfo.ChanType = RT_CMD_80211_CHANTYPE_HT20;
+	else if (ChannelType == NL80211_CHAN_HT40MINUS)
+		ChanInfo.ChanType = RT_CMD_80211_CHANTYPE_HT40MINUS;
+	else if (ChannelType == NL80211_CHAN_HT40PLUS)
+		ChanInfo.ChanType = RT_CMD_80211_CHANTYPE_HT40PLUS;
+
+	ChanInfo.MonFilterFlag = p80211CB->MonFilterFlag;
+
+	/* set channel */
+	RTMP_DRIVER_80211_CHAN_SET(pAd, &ChanInfo);
+
+	return 0;
+} /* End of CFG80211_OpsSetChannel */
+
+
+/*
+========================================================================
+Routine Description:
+	Change type/configuration of virtual interface.
+
+Arguments:
+	pWiphy			- Wireless hardware description
+	IfIndex			- Interface index
+	Type			- Interface type, managed/adhoc/ap/station, etc.
+	pFlags			- Monitor flags
+	pParams			- Mesh parameters
+
+Return Value:
+	0				- success
+	-x				- fail
+
+Note:
+	For iw utility: set type, set monitor
+========================================================================
+*/
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32))
+static int CFG80211_OpsChgVirtualInf(
+	IN struct wiphy					*pWiphy,
+	IN struct net_device			*pNetDevIn,
+	IN enum nl80211_iftype			Type,
+	IN u32							*pFlags,
+	struct vif_params				*pParams)
+#else
+static int CFG80211_OpsChgVirtualInf(
+	IN struct wiphy					*pWiphy,
+	IN int							IfIndex,
+	IN enum nl80211_iftype			Type,
+	IN u32							*pFlags,
+	struct vif_params				*pParams)
+#endif /* LINUX_VERSION_CODE */
+{
+	VOID *pAd;
+	CFG80211_CB *pCfg80211_CB;
+	struct net_device *pNetDev;
+	UINT32 Filter;
+
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> CFG80211_OpsChgVirtualInf ==>\n"));
+	MAC80211_PAD_GET(pAd, pWiphy);
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> Type = %d\n", Type));
+
+	/* sanity check */
+#ifdef CONFIG_STA_SUPPORT
+	if ((Type != NL80211_IFTYPE_ADHOC) &&
+		(Type != NL80211_IFTYPE_STATION) &&
+		(Type != NL80211_IFTYPE_MONITOR))
+#endif /* CONFIG_STA_SUPPORT */
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("80211> Wrong interface type %d!\n", Type));
+		return -EINVAL;
+	} /* End of if */
+
+	/* update interface type */
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32))
+	pNetDev = pNetDevIn;
+#else
+	pNetDev = __dev_get_by_index(&init_net, IfIndex);
+#endif /* LINUX_VERSION_CODE */
+
+	if (pNetDev == NULL)
+		return -ENODEV;
+	/* End of if */
+
+	pNetDev->ieee80211_ptr->iftype = Type;
+
+	if (pFlags != NULL)
+	{
+		Filter = 0;
+
+		if (((*pFlags) & NL80211_MNTR_FLAG_FCSFAIL) == NL80211_MNTR_FLAG_FCSFAIL)
+			Filter |= RT_CMD_80211_FILTER_FCSFAIL;
+
+		if (((*pFlags) & NL80211_MNTR_FLAG_FCSFAIL) == NL80211_MNTR_FLAG_PLCPFAIL)
+			Filter |= RT_CMD_80211_FILTER_PLCPFAIL;
+
+		if (((*pFlags) & NL80211_MNTR_FLAG_CONTROL) == NL80211_MNTR_FLAG_CONTROL)
+			Filter |= RT_CMD_80211_FILTER_CONTROL;
+
+		if (((*pFlags) & NL80211_MNTR_FLAG_CONTROL) == NL80211_MNTR_FLAG_OTHER_BSS)
+			Filter |= RT_CMD_80211_FILTER_OTHER_BSS;
+	} /* End of if */
+
+	RTMP_DRIVER_80211_VIF_SET(pAd, Filter, Type);
+
+	RTMP_DRIVER_80211_CB_GET(pAd, &pCfg80211_CB);
+	pCfg80211_CB->MonFilterFlag = Filter;
+	return 0;
+} /* End of CFG80211_OpsChgVirtualInf */
+
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30))
+#if defined(SIOCGIWSCAN) || defined(RT_CFG80211_SUPPORT)
+extern int rt_ioctl_siwscan(struct net_device *dev,
+			struct iw_request_info *info,
+			union iwreq_data *wreq, char *extra);
+#endif
+#ifdef CONFIG_STA_SUPPORT
+/*
+========================================================================
+Routine Description:
+	Request to do a scan. If returning zero, the scan request is given
+	the driver, and will be valid until passed to cfg80211_scan_done().
+	For scan results, call cfg80211_inform_bss(); you can call this outside
+	the scan/scan_done bracket too.
+
+Arguments:
+	pWiphy			- Wireless hardware description
+	pNdev			- Network device interface
+	pRequest		- Scan request
+
+Return Value:
+	0				- success
+	-x				- fail
+
+Note:
+	For iw utility: scan
+
+	struct cfg80211_scan_request {
+		struct cfg80211_ssid *ssids;
+		int n_ssids;
+		struct ieee80211_channel **channels;
+		u32 n_channels;
+		const u8 *ie;
+		size_t ie_len;
+
+	 * @ssids: SSIDs to scan for (active scan only)
+	 * @n_ssids: number of SSIDs
+	 * @channels: channels to scan on.
+	 * @n_channels: number of channels for each band
+	 * @ie: optional information element(s) to add into Probe Request or %NULL
+	 * @ie_len: length of ie in octets
+========================================================================
+*/
+static int CFG80211_OpsScan(
+	IN struct wiphy					*pWiphy,
+	IN struct net_device			*pNdev,
+	IN struct cfg80211_scan_request *pRequest)
+{
+	VOID *pAd;
+	CFG80211_CB *pCfg80211_CB;
+
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> CFG80211_OpsScan ==>\n"));
+	MAC80211_PAD_GET(pAd, pWiphy);
+
+	/* sanity check */
+	if ((pNdev->ieee80211_ptr->iftype != NL80211_IFTYPE_STATION) &&
+		(pNdev->ieee80211_ptr->iftype != NL80211_IFTYPE_ADHOC))
+	{
+		return -EOPNOTSUPP;
+	} /* End of if */
+
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("80211> Network is down!\n"));
+		return -ENETDOWN;
+	} /* End of if */
+
+	if (RTMP_DRIVER_80211_SCAN(pAd) != NDIS_STATUS_SUCCESS)
+		return -EBUSY; /* scanning */
+	/* End of if */
+
+	RTMP_DRIVER_80211_CB_GET(pAd, &pCfg80211_CB);
+	pCfg80211_CB->pCfg80211_ScanReq = pRequest; /* used in scan end */
+
+	rt_ioctl_siwscan(pNdev, NULL, NULL, NULL);
+	return 0;
+} /* End of CFG80211_OpsScan */
+#endif /* CONFIG_STA_SUPPORT */
+#endif /* LINUX_VERSION_CODE */
+
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,31))
+#ifdef CONFIG_STA_SUPPORT
+/*
+========================================================================
+Routine Description:
+	Join the specified IBSS (or create if necessary). Once done, call
+	cfg80211_ibss_joined(), also call that function when changing BSSID due
+	to a merge.
+
+Arguments:
+	pWiphy			- Wireless hardware description
+	pNdev			- Network device interface
+	pParams			- IBSS parameters
+
+Return Value:
+	0				- success
+	-x				- fail
+
+Note:
+	For iw utility: ibss join
+
+	No fixed-freq and fixed-bssid support.
+========================================================================
+*/
+static int CFG80211_OpsJoinIbss(
+	IN struct wiphy					*pWiphy,
+	IN struct net_device			*pNdev,
+	IN struct cfg80211_ibss_params	*pParams)
+{
+	VOID *pAd;
+	CMD_RTPRIV_IOCTL_80211_IBSS IbssInfo;
+
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> CFG80211_OpsJoinIbss ==>\n"));
+	MAC80211_PAD_GET(pAd, pWiphy);
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> SSID = %s\n",
+				pParams->ssid));
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> Beacon Interval = %d\n",
+				pParams->beacon_interval));
+
+	/* init */
+	memset(&IbssInfo, 0, sizeof(IbssInfo));
+	IbssInfo.BeaconInterval = pParams->beacon_interval;
+	IbssInfo.pSsid = pParams->ssid;
+
+	/* ibss join */
+	RTMP_DRIVER_80211_IBSS_JOIN(pAd, &IbssInfo);
+
+	return 0;
+} /* End of CFG80211_OpsJoinIbss */
+
+
+/*
+========================================================================
+Routine Description:
+	Leave the IBSS.
+
+Arguments:
+	pWiphy			- Wireless hardware description
+	pNdev			- Network device interface
+
+Return Value:
+	0				- success
+	-x				- fail
+
+Note:
+	For iw utility: ibss leave
+========================================================================
+*/
+static int CFG80211_OpsLeaveIbss(
+	IN struct wiphy					*pWiphy,
+	IN struct net_device			*pNdev)
+{
+	VOID *pAd;
+
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> CFG80211_OpsLeaveIbss ==>\n"));
+	MAC80211_PAD_GET(pAd, pWiphy);
+
+	RTMP_DRIVER_80211_STA_LEAVE(pAd);
+	return 0;
+} /* End of CFG80211_OpsLeaveIbss */
+#endif /* CONFIG_STA_SUPPORT */
+#endif /* LINUX_VERSION_CODE */
+
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32))
+/*
+========================================================================
+Routine Description:
+	Set the transmit power according to the parameters.
+
+Arguments:
+	pWiphy			- Wireless hardware description
+	Type			- 
+	dBm				- dBm
+
+Return Value:
+	0				- success
+	-x				- fail
+
+Note:
+	Type -
+	TX_POWER_AUTOMATIC: the dbm parameter is ignored
+	TX_POWER_LIMITED: limit TX power by the dbm parameter
+	TX_POWER_FIXED: fix TX power to the dbm parameter
+========================================================================
+*/
+static int CFG80211_TxPwrSet(
+	IN struct wiphy						*pWiphy,
+	IN enum tx_power_setting			Type,
+	IN int								dBm)
+{
+	return -EOPNOTSUPP;
+} /* End of CFG80211_TxPwrSet */
+
+
+/*
+========================================================================
+Routine Description:
+	Store the current TX power into the dbm variable.
+
+Arguments:
+	pWiphy			- Wireless hardware description
+	pdBm			- dBm
+
+Return Value:
+	0				- success
+	-x				- fail
+
+Note:
+========================================================================
+*/
+static int CFG80211_TxPwrGet(
+	IN struct wiphy						*pWiphy,
+	IN int								*pdBm)
+{
+	return -EOPNOTSUPP;
+} /* End of CFG80211_TxPwrGet */
+
+
+/*
+========================================================================
+Routine Description:
+	Power management.
+
+Arguments:
+	pWiphy			- Wireless hardware description
+	pNdev			- 
+	FlgIsEnabled	-
+	Timeout			-
+
+Return Value:
+	0				- success
+	-x				- fail
+
+Note:
+========================================================================
+*/
+static int CFG80211_PwrMgmt(
+	IN struct wiphy						*pWiphy,
+	IN struct net_device				*pNdev,
+	IN bool								FlgIsEnabled,
+	IN int								Timeout)
+{
+	return -EOPNOTSUPP;
+} /* End of CFG80211_PwrMgmt */
+
+
+/*
+========================================================================
+Routine Description:
+	Get information for a specific station.
+
+Arguments:
+	pWiphy			- Wireless hardware description
+	pNdev			-
+	pMac			- STA MAC
+	pSinfo			- STA INFO
+
+Return Value:
+	0				- success
+	-x				- fail
+
+Note:
+========================================================================
+*/
+static int CFG80211_StaGet(
+	IN struct wiphy						*pWiphy,
+	IN struct net_device				*pNdev,
+	IN UINT8							*pMac,
+	IN struct station_info				*pSinfo)
+{
+	VOID *pAd;
+	CMD_RTPRIV_IOCTL_80211_STA StaInfo;
+
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> CFG80211_StaGet ==>\n"));
+	MAC80211_PAD_GET(pAd, pWiphy);
+
+	/* init */
+	memset(pSinfo, 0, sizeof(*pSinfo));
+	memset(&StaInfo, 0, sizeof(StaInfo));
+
+	memcpy(StaInfo.MAC, pMac, 6);
+
+	/* get sta information */
+	if (RTMP_DRIVER_80211_STA_GET(pAd, &StaInfo) != NDIS_STATUS_SUCCESS)
+		return -ENOENT;
+
+	if (StaInfo.TxRateFlags != RT_CMD_80211_TXRATE_LEGACY)
+	{
+		pSinfo->txrate.flags = RATE_INFO_FLAGS_MCS;
+		if (StaInfo.TxRateFlags & RT_CMD_80211_TXRATE_BW_40)
+			pSinfo->txrate.flags |= RATE_INFO_FLAGS_40_MHZ_WIDTH;
+		/* End of if */
+		if (StaInfo.TxRateFlags & RT_CMD_80211_TXRATE_SHORT_GI)
+			pSinfo->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;
+		/* End of if */
+
+		pSinfo->txrate.mcs = StaInfo.TxRateMCS;
+	}
+	else
+	{
+		pSinfo->txrate.legacy = StaInfo.TxRateMCS;
+	} /* End of if */
+
+	pSinfo->filled |= STATION_INFO_TX_BITRATE;
+
+	/* fill signal */
+	pSinfo->signal = StaInfo.Signal;
+	pSinfo->filled |= STATION_INFO_SIGNAL;
+
+
+	return 0;
+} /* End of CFG80211_StaGet */
+
+
+/*
+========================================================================
+Routine Description:
+	List all stations known, e.g. the AP on managed interfaces.
+
+Arguments:
+	pWiphy			- Wireless hardware description
+	pNdev			-
+	Idx				- 
+	pMac			-
+	pSinfo			-
+
+Return Value:
+	0				- success
+	-x				- fail
+
+Note:
+========================================================================
+*/
+static int CFG80211_StaDump(
+	IN struct wiphy						*pWiphy,
+	IN struct net_device				*pNdev,
+	IN int								Idx,
+	IN UINT8							*pMac,
+	IN struct station_info				*pSinfo)
+{
+	VOID *pAd;
+
+
+	if (Idx != 0)
+		return -ENOENT;
+	/* End of if */
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> CFG80211_StaDump ==>\n"));
+	MAC80211_PAD_GET(pAd, pWiphy);
+
+#ifdef CONFIG_STA_SUPPORT
+	if (RTMP_DRIVER_AP_SSID_GET(pAd, pMac) != NDIS_STATUS_SUCCESS)
+		return -EBUSY;
+	else
+		return CFG80211_StaGet(pWiphy, pNdev, pMac, pSinfo);
+#endif /* CONFIG_STA_SUPPORT */
+
+	return -EOPNOTSUPP;
+} /* End of CFG80211_StaDump */
+
+
+/*
+========================================================================
+Routine Description:
+	Notify that wiphy parameters have changed.
+
+Arguments:
+	pWiphy			- Wireless hardware description
+	Changed			-
+
+Return Value:
+	0				- success
+	-x				- fail
+
+Note:
+========================================================================
+*/
+static int CFG80211_WiphyParamsSet(
+	IN struct wiphy						*pWiphy,
+	IN UINT32							Changed)
+{
+	return -EOPNOTSUPP;
+} /* End of CFG80211_WiphyParamsSet */
+
+
+/*
+========================================================================
+Routine Description:
+	Add a key with the given parameters.
+
+Arguments:
+	pWiphy			- Wireless hardware description
+	pNdev			-
+	KeyIdx			-
+	pMacAddr		-
+	pParams			-
+
+Return Value:
+	0				- success
+	-x				- fail
+
+Note:
+	pMacAddr will be NULL when adding a group key.
+========================================================================
+*/
+static int CFG80211_KeyAdd(
+	IN struct wiphy						*pWiphy,
+	IN struct net_device				*pNdev,
+	IN UINT8							KeyIdx,
+	IN const UINT8						*pMacAddr,
+	IN struct key_params				*pParams)
+{
+	VOID *pAd;
+	CMD_RTPRIV_IOCTL_80211_KEY KeyInfo;
+
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> CFG80211_KeyAdd ==>\n"));
+	MAC80211_PAD_GET(pAd, pWiphy);
+
+#ifdef RT_CFG80211_DEBUG
+	hex_dump("KeyBuf=", (UINT8 *)pParams->key, pParams->key_len);
+#endif /* RT_CFG80211_DEBUG */
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> KeyIdx = %d\n", KeyIdx));
+
+	if (pParams->key_len >= sizeof(KeyInfo.KeyBuf))
+		return -EINVAL;
+	/* End of if */
+
+#ifdef CONFIG_STA_SUPPORT
+	/* init */
+	memset(&KeyInfo, 0, sizeof(KeyInfo));
+	memcpy(KeyInfo.KeyBuf, pParams->key, pParams->key_len);
+	KeyInfo.KeyBuf[pParams->key_len] = 0x00;
+
+	if ((pParams->cipher == WLAN_CIPHER_SUITE_WEP40) ||
+		(pParams->cipher == WLAN_CIPHER_SUITE_WEP104))
+	{
+		KeyInfo.KeyType = RT_CMD_80211_KEY_WEP;
+	}
+	else if ((pParams->cipher == WLAN_CIPHER_SUITE_TKIP) ||
+		(pParams->cipher == WLAN_CIPHER_SUITE_CCMP))
+	{
+		KeyInfo.KeyType = RT_CMD_80211_KEY_WPA;
+	}
+	else
+		return -ENOTSUPP;
+
+	KeyInfo.KeyId = KeyIdx+1;
+
+	/* add key */
+	RTMP_DRIVER_80211_KEY_ADD(pAd, &KeyInfo);
+	return 0;
+#endif /* CONFIG_STA_SUPPORT */
+
+} /* End of CFG80211_KeyAdd */
+
+
+/*
+========================================================================
+Routine Description:
+	Get information about the key with the given parameters.
+
+Arguments:
+	pWiphy			- Wireless hardware description
+	pNdev			-
+	KeyIdx			-
+	pMacAddr		-
+	pCookie			-
+	pCallback		-
+
+Return Value:
+	0				- success
+	-x				- fail
+
+Note:
+	pMacAddr will be NULL when requesting information for a group key.
+
+	All pointers given to the pCallback function need not be valid after
+	it returns.
+
+	This function should return an error if it is not possible to
+	retrieve the key, -ENOENT if it doesn't exist.
+========================================================================
+*/
+static int CFG80211_KeyGet(
+	IN struct wiphy						*pWiphy,
+	IN struct net_device				*pNdev,
+	IN UINT8							KeyIdx,
+	IN const UINT8						*pMacAddr,
+	IN void								*pCookie,
+	IN void								(*pCallback)(void *cookie,
+												 struct key_params *))
+{
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> CFG80211_KeyGet ==>\n"));
+	return -ENOTSUPP;
+} /* End of CFG80211_KeyGet */
+
+
+/*
+========================================================================
+Routine Description:
+	Remove a key given the pMacAddr (NULL for a group key) and KeyIdx.
+
+Arguments:
+	pWiphy			- Wireless hardware description
+	pNdev			-
+	KeyIdx			-
+	pMacAddr		-
+
+Return Value:
+	0				- success
+	-x				- fail
+
+Note:
+	return -ENOENT if the key doesn't exist.
+========================================================================
+*/
+static int CFG80211_KeyDel(
+	IN struct wiphy						*pWiphy,
+	IN struct net_device				*pNdev,
+	IN UINT8							KeyIdx,
+	IN const UINT8						*pMacAddr)
+{
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> CFG80211_KeyDel ==>\n"));
+	return -ENOTSUPP;
+} /* End of CFG80211_KeyDel */
+
+
+/*
+========================================================================
+Routine Description:
+	Set the default key on an interface.
+
+Arguments:
+	pWiphy			- Wireless hardware description
+	pNdev			-
+	KeyIdx			-
+
+Return Value:
+	0				- success
+	-x				- fail
+
+Note:
+========================================================================
+*/
+static int CFG80211_KeyDefaultSet(
+	IN struct wiphy						*pWiphy,
+	IN struct net_device				*pNdev,
+	IN UINT8							KeyIdx)
+{
+	VOID *pAd;
+
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> CFG80211_KeyDefaultSet ==>\n"));
+	MAC80211_PAD_GET(pAd, pWiphy);
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> KeyIdx = %d\n", KeyIdx));
+
+	RTMP_DRIVER_80211_KEY_DEFAULT_SET(pAd, KeyIdx);
+	return 0;
+} /* End of CFG80211_KeyDefaultSet */
+
+
+#ifdef CONFIG_STA_SUPPORT
+/*
+========================================================================
+Routine Description:
+	Connect to the ESS with the specified parameters. When connected,
+	call cfg80211_connect_result() with status code %WLAN_STATUS_SUCCESS.
+	If the connection fails for some reason, call cfg80211_connect_result()
+	with the status from the AP.
+
+Arguments:
+	pWiphy			- Wireless hardware description
+	pNdev			- Network device interface
+	pSme			- 
+
+Return Value:
+	0				- success
+	-x				- fail
+
+Note:
+	For iw utility: connect
+
+	You must use "iw ra0 connect xxx", then "iw ra0 disconnect";
+	You can not use "iw ra0 connect xxx" twice without disconnect;
+	Or you will suffer "command failed: Operation already in progress (-114)".
+
+	You must support add_key and set_default_key function;
+	Or kernel will crash without any error message in linux 2.6.32.
+========================================================================
+*/
+static int CFG80211_Connect(
+	IN struct wiphy						*pWiphy,
+	IN struct net_device				*pNdev,
+	IN struct cfg80211_connect_params	*pSme)
+{
+	VOID *pAd;
+	CMD_RTPRIV_IOCTL_80211_CONNECT ConnInfo;
+	struct ieee80211_channel *pChannel = pSme->channel;
+	INT32 Pairwise = 0;
+	INT32 Groupwise = 0;
+	INT32 Keymgmt = 0;
+	INT32 WpaVersion = NL80211_WPA_VERSION_2;
+	INT32 Chan = -1, Idx, SSIDLen;
+
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> CFG80211_Connect ==>\n"));
+
+	/* init */
+	MAC80211_PAD_GET(pAd, pWiphy);
+
+	if (pChannel != NULL)
+		Chan = ieee80211_frequency_to_channel(pChannel->center_freq);
+
+	Groupwise = pSme->crypto.cipher_group;
+	for(Idx=0; Idx<pSme->crypto.n_ciphers_pairwise; Idx++)
+		Pairwise |= pSme->crypto.ciphers_pairwise[Idx];
+	/* End of for */
+
+	for(Idx=0; Idx<pSme->crypto.n_akm_suites; Idx++)
+		Keymgmt |= pSme->crypto.akm_suites[Idx];
+	/* End of for */
+
+	WpaVersion = pSme->crypto.wpa_versions;
+
+	memset(&ConnInfo, 0, sizeof(ConnInfo));
+	if (WpaVersion & NL80211_WPA_VERSION_2)
+		ConnInfo.WpaVer = 2;
+	else if (WpaVersion & NL80211_WPA_VERSION_1)
+		ConnInfo.WpaVer = 1;
+	else
+		ConnInfo.WpaVer = 0;
+
+	if (Keymgmt & WLAN_AKM_SUITE_8021X)
+		ConnInfo.FlgIs8021x = TRUE;
+	else
+		ConnInfo.FlgIs8021x = FALSE;
+
+	if (pSme->auth_type == NL80211_AUTHTYPE_SHARED_KEY)
+		ConnInfo.FlgIsAuthOpen = FALSE;
+	else
+		ConnInfo.FlgIsAuthOpen = TRUE;
+
+	if (Pairwise & WLAN_CIPHER_SUITE_CCMP)
+		ConnInfo.PairwiseEncrypType |= RT_CMD_80211_CONN_ENCRYPT_CCMP;
+	else if (Pairwise & WLAN_CIPHER_SUITE_TKIP)
+		ConnInfo.PairwiseEncrypType |= RT_CMD_80211_CONN_ENCRYPT_TKIP;
+	else if ((Pairwise & WLAN_CIPHER_SUITE_WEP40) ||
+			(Pairwise & WLAN_CIPHER_SUITE_WEP104))
+	{
+		ConnInfo.PairwiseEncrypType |= RT_CMD_80211_CONN_ENCRYPT_WEP;
+	}
+	else
+		ConnInfo.PairwiseEncrypType |= RT_CMD_80211_CONN_ENCRYPT_NONE;
+
+	if (Groupwise & WLAN_CIPHER_SUITE_CCMP)
+		ConnInfo.GroupwiseEncrypType |= RT_CMD_80211_CONN_ENCRYPT_CCMP;
+	else if (Groupwise & WLAN_CIPHER_SUITE_TKIP)
+		ConnInfo.GroupwiseEncrypType |= RT_CMD_80211_CONN_ENCRYPT_TKIP;
+	else
+		ConnInfo.GroupwiseEncrypType |= RT_CMD_80211_CONN_ENCRYPT_NONE;
+	/* End of if */
+
+	ConnInfo.pKey = pSme->key;
+	ConnInfo.KeyLen = pSme->key_len;
+	ConnInfo.pSsid = pSme->ssid;
+	ConnInfo.SsidLen = pSme->ssid_len;
+
+	CFG80211DBG(RT_DEBUG_ERROR,	("80211> SME %x\n",	pSme->auth_type));
+
+	RTMP_DRIVER_80211_CONNECT(pAd, &ConnInfo);
+	return 0;
+} /* End of CFG80211_Connect */
+
+
+/*
+========================================================================
+Routine Description:
+	Disconnect from the BSS/ESS.
+
+Arguments:
+	pWiphy			- Wireless hardware description
+	pNdev			- Network device interface
+	ReasonCode		- 
+
+Return Value:
+	0				- success
+	-x				- fail
+
+Note:
+	For iw utility: connect
+========================================================================
+*/
+static int CFG80211_Disconnect(
+	IN struct wiphy						*pWiphy,
+	IN struct net_device				*pNdev,
+	IN u16								ReasonCode)
+{
+	VOID *pAd;
+
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> CFG80211_Disconnect ==>\n"));
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> ReasonCode = %d\n", ReasonCode));
+
+	MAC80211_PAD_GET(pAd, pWiphy);
+
+	RTMP_DRIVER_80211_STA_LEAVE(pAd);
+	return 0;
+} /* End of CFG80211_Disconnect */
+#endif /* CONFIG_STA_SUPPORT */
+#endif /* LINUX_VERSION_CODE */
+
+
+#ifdef RFKILL_HW_SUPPORT
+static int CFG80211_RFKill(
+	IN struct wiphy						*pWiphy)
+{
+	VOID		*pAd;
+	BOOLEAN		active;
+
+
+	MAC80211_PAD_GET(pAd, pWiphy);
+
+	RTMP_DRIVER_80211_RFKILL(pAd, &active);
+	wiphy_rfkill_set_hw_state(pWiphy, !active);	
+	return active;
+}
+
+VOID CFG80211_RFKillStatusUpdate(
+        IN PVOID	pAd,
+        IN BOOLEAN	active)
+{
+        struct wiphy *pWiphy;
+		CFG80211_CB *pCfg80211_CB;
+
+		RTMP_DRIVER_80211_CB_GET(pAd, &pCfg80211_CB);
+        pWiphy = pCfg80211_CB->pCfg80211_Wdev->wiphy;
+        wiphy_rfkill_set_hw_state(pWiphy, !active);
+        return;
+}
+#endif /* RFKILL_HW_SUPPORT */
+
+
+struct cfg80211_ops CFG80211_Ops = {
+	.set_channel			= CFG80211_OpsSetChannel,
+	.change_virtual_intf	= CFG80211_OpsChgVirtualInf,
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30))
+#ifdef CONFIG_STA_SUPPORT
+	.scan					= CFG80211_OpsScan,
+#endif /* CONFIG_STA_SUPPORT */
+#endif /* LINUX_VERSION_CODE */
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,31))
+#ifdef CONFIG_STA_SUPPORT
+	.join_ibss				= CFG80211_OpsJoinIbss,
+	.leave_ibss				= CFG80211_OpsLeaveIbss,
+#endif /* CONFIG_STA_SUPPORT */
+#endif /* LINUX_VERSION_CODE */
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32))
+	.set_tx_power			= CFG80211_TxPwrSet,
+	.get_tx_power			= CFG80211_TxPwrGet,
+	.set_power_mgmt			= CFG80211_PwrMgmt,
+	.get_station			= CFG80211_StaGet,
+	.dump_station			= CFG80211_StaDump,
+	.set_wiphy_params		= CFG80211_WiphyParamsSet,
+	.add_key				= CFG80211_KeyAdd,
+	.get_key				= CFG80211_KeyGet,
+	.del_key				= CFG80211_KeyDel,
+	.set_default_key		= CFG80211_KeyDefaultSet,
+#ifdef CONFIG_STA_SUPPORT
+	.connect				= CFG80211_Connect,
+	.disconnect				= CFG80211_Disconnect,
+#endif /* CONFIG_STA_SUPPORT */
+#endif /* LINUX_VERSION_CODE */
+#ifdef RFKILL_HW_SUPPORT
+	.rfkill_poll			= CFG80211_RFKill,
+#endif /* RFKILL_HW_SUPPORT */
+};
+
+
+
+
+/* =========================== Global Function ============================== */
+
+/*
+========================================================================
+Routine Description:
+	Allocate a wireless device.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	pDev			- Generic device interface
+
+Return Value:
+	wireless device
+
+Note:
+========================================================================
+*/
+static struct wireless_dev *CFG80211_WdevAlloc(
+	IN CFG80211_CB					*pCfg80211_CB,
+	IN CFG80211_BAND				*pBandInfo,
+	IN VOID 						*pAd,
+	IN struct device				*pDev)
+{
+	struct wireless_dev *pWdev;
+	ULONG *pPriv;
+
+
+	/*
+	 * We're trying to have the following memory layout:
+	 *
+	 * +------------------------+
+	 * | struct wiphy			|
+	 * +------------------------+
+	 * | pAd pointer			|
+	 * +------------------------+
+	 */
+
+	pWdev = kzalloc(sizeof(struct wireless_dev), GFP_KERNEL);
+	if (pWdev == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("80211> Wireless device allocation fail!\n"));
+		return NULL;
+	} /* End of if */
+
+	pWdev->wiphy = wiphy_new(&CFG80211_Ops, sizeof(ULONG *));
+	if (pWdev->wiphy == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("80211> Wiphy device allocation fail!\n"));
+		goto LabelErrWiphyNew;
+	} /* End of if */
+
+	/* keep pAd pointer */
+	pPriv = (ULONG *)(wiphy_priv(pWdev->wiphy));
+	*pPriv = (ULONG)pAd;
+
+	set_wiphy_dev(pWdev->wiphy, pDev);
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30))
+	pWdev->wiphy->max_scan_ssids = pBandInfo->MaxBssTable;
+#endif /* KERNEL_VERSION */
+
+
+#ifdef CONFIG_STA_SUPPORT
+	pWdev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
+							       BIT(NL80211_IFTYPE_ADHOC) |
+							       BIT(NL80211_IFTYPE_MONITOR);
+#endif /* CONFIG_STA_SUPPORT */
+	pWdev->wiphy->reg_notifier = CFG80211_RegNotifier;
+
+	/* init channel information */
+	CFG80211_SupBandInit(pCfg80211_CB, pBandInfo, pWdev->wiphy, NULL, NULL);
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30))
+	/* CFG80211_SIGNAL_TYPE_MBM: signal strength in mBm (100*dBm) */
+	pWdev->wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM;
+#endif /* KERNEL_VERSION */
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32))
+	pWdev->wiphy->cipher_suites = CipherSuites;
+	pWdev->wiphy->n_cipher_suites = ARRAY_SIZE(CipherSuites);
+#endif /* LINUX_VERSION_CODE */
+
+	if (wiphy_register(pWdev->wiphy) < 0)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("80211> Register wiphy device fail!\n"));
+		goto LabelErrReg;
+	} /* End of if */
+
+	return pWdev;
+
+ LabelErrReg:
+	wiphy_free(pWdev->wiphy);
+
+ LabelErrWiphyNew:
+	os_free_mem(NULL, pWdev);
+
+	return NULL;
+} /* End of CFG80211_WdevAlloc */
+
+
+/*
+========================================================================
+Routine Description:
+	Register MAC80211 Module.
+
+Arguments:
+	pAdCB			- WLAN control block pointer
+	pDev			- Generic device interface
+	pNetDev			- Network device
+
+Return Value:
+	NONE
+
+Note:
+	pDev != pNetDev
+	#define SET_NETDEV_DEV(net, pdev)	((net)->dev.parent = (pdev))
+
+	Can not use pNetDev to replace pDev; Or kernel panic.
+========================================================================
+*/
+BOOLEAN CFG80211_Register(
+	IN VOID						*pAd,
+	IN struct device			*pDev,
+	IN struct net_device		*pNetDev)
+{
+	CFG80211_CB *pCfg80211_CB = NULL;
+	CFG80211_BAND BandInfo;
+
+
+	/* allocate MAC80211 structure */
+	os_alloc_mem(NULL, (UCHAR **)&pCfg80211_CB, sizeof(CFG80211_CB));
+	if (pCfg80211_CB == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("80211> Allocate MAC80211 CB fail!\n"));
+		return FALSE;
+	} /* End of if */
+
+	/* allocate wireless device */
+	RTMP_DRIVER_80211_BANDINFO_GET(pAd, &BandInfo);
+
+	pCfg80211_CB->pCfg80211_Wdev = \
+				CFG80211_WdevAlloc(pCfg80211_CB, &BandInfo, pAd, pDev);
+	if (pCfg80211_CB->pCfg80211_Wdev == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("80211> Allocate Wdev fail!\n"));
+		os_free_mem(NULL, pCfg80211_CB);
+		return FALSE;
+	} /* End of if */
+
+	/* bind wireless device with net device */
+
+#ifdef CONFIG_STA_SUPPORT
+	/* default we are station mode */
+	pCfg80211_CB->pCfg80211_Wdev->iftype = NL80211_IFTYPE_STATION;
+#endif /* CONFIG_STA_SUPPORT */
+
+	pNetDev->ieee80211_ptr = pCfg80211_CB->pCfg80211_Wdev;
+	SET_NETDEV_DEV(pNetDev, wiphy_dev(pCfg80211_CB->pCfg80211_Wdev->wiphy));
+	pCfg80211_CB->pCfg80211_Wdev->netdev = pNetDev;
+
+#ifdef RFKILL_HW_SUPPORT
+	wiphy_rfkill_start_polling(pCfg80211_CB->pCfg80211_Wdev->wiphy);
+#endif /* RFKILL_HW_SUPPORT */
+
+	RTMP_DRIVER_80211_CB_SET(pAd, pCfg80211_CB);
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> CFG80211_Register\n"));
+	return TRUE;
+} /* End of CFG80211_Register */
+
+
+
+
+/* =========================== Local Function =============================== */
+
+/*
+========================================================================
+Routine Description:
+	The driver's regulatory notification callback.
+
+Arguments:
+	pWiphy			- Wireless hardware description
+	pRequest		- Regulatory request
+
+Return Value:
+	0
+
+Note:
+========================================================================
+*/
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30))
+static INT32 CFG80211_RegNotifier(
+	IN struct wiphy					*pWiphy,
+	IN struct regulatory_request	*pRequest)
+{
+	VOID *pAd;
+	ULONG *pPriv;
+
+
+	/* sanity check */
+	pPriv = (ULONG *)(wiphy_priv(pWiphy));
+	pAd = (VOID *)(*pPriv);
+
+	if (pAd == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("crda> reg notify but pAd = NULL!"));
+		return 0;
+	} /* End of if */
+
+	/*
+		Change the band settings (PASS scan, IBSS allow, or DFS) in mac80211
+		based on EEPROM.
+
+		IEEE80211_CHAN_DISABLED: This channel is disabled.
+		IEEE80211_CHAN_PASSIVE_SCAN: Only passive scanning is permitted
+					on this channel.
+		IEEE80211_CHAN_NO_IBSS: IBSS is not allowed on this channel.
+		IEEE80211_CHAN_RADAR: Radar detection is required on this channel.
+		IEEE80211_CHAN_NO_FAT_ABOVE: extension channel above this channel
+					is not permitted.
+		IEEE80211_CHAN_NO_FAT_BELOW: extension channel below this channel
+					is not permitted.
+	*/
+
+	/*
+		Change regulatory rule here.
+
+		struct ieee80211_channel {
+			enum ieee80211_band band;
+			u16 center_freq;
+			u8 max_bandwidth;
+			u16 hw_value;
+			u32 flags;
+			int max_antenna_gain;
+			int max_power;
+			bool beacon_found;
+			u32 orig_flags;
+			int orig_mag, orig_mpwr;
+		};
+
+		In mac80211 layer, it will change flags, max_antenna_gain,
+		max_bandwidth, max_power.
+	*/
+
+	switch(pRequest->initiator)
+	{
+		case NL80211_REGDOM_SET_BY_CORE:
+			/*
+				Core queried CRDA for a dynamic world regulatory domain.
+			*/
+			CFG80211DBG(RT_DEBUG_ERROR, ("crda> requlation requestion by core: "));
+			break;
+
+		case NL80211_REGDOM_SET_BY_USER:
+			/*
+				User asked the wireless core to set the regulatory domain.
+				(when iw, network manager, wpa supplicant, etc.)
+			*/
+			CFG80211DBG(RT_DEBUG_ERROR, ("crda> requlation requestion by user: "));
+			break;
+
+		case NL80211_REGDOM_SET_BY_DRIVER:
+			/*
+				A wireless drivers has hinted to the wireless core it thinks
+				its knows the regulatory domain we should be in.
+				(when driver initialization, calling regulatory_hint)
+			*/
+			CFG80211DBG(RT_DEBUG_ERROR, ("crda> requlation requestion by driver: "));
+			break;
+
+		case NL80211_REGDOM_SET_BY_COUNTRY_IE:
+			/*
+				The wireless core has received an 802.11 country information
+				element with regulatory information it thinks we should consider.
+				(when beacon receive, calling regulatory_hint_11d)
+			*/
+			CFG80211DBG(RT_DEBUG_ERROR, ("crda> requlation requestion by country IE: "));
+			break;
+	} /* End of switch */
+
+	CFG80211DBG(RT_DEBUG_ERROR,
+				("%c%c\n", pRequest->alpha2[0], pRequest->alpha2[1]));
+
+	/* only follow rules from user */
+	if (pRequest->initiator == NL80211_REGDOM_SET_BY_USER)
+	{
+		/* keep Alpha2 and we can re-call the function when interface is up */
+		CMD_RTPRIV_IOCTL_80211_REG_NOTIFY RegInfo;
+
+		RegInfo.Alpha2[0] = pRequest->alpha2[0];
+		RegInfo.Alpha2[1] = pRequest->alpha2[1];
+		RegInfo.pWiphy = pWiphy;
+
+		RTMP_DRIVER_80211_REG_NOTIFY(pAd, &RegInfo);
+	} /* End of if */
+
+	return 0;
+} /* End of CFG80211_RegNotifier */
+
+#else
+
+static INT32 CFG80211_RegNotifier(
+	IN struct wiphy					*pWiphy,
+	IN enum reg_set_by				Request)
+{
+	struct device *pDev = pWiphy->dev.parent;
+	struct net_device *pNetDev = dev_get_drvdata(pDev);
+	VOID *pAd = (VOID *)RTMP_OS_NETDEV_GET_PRIV(pNetDev);
+	UINT32 ReqType = Request;
+
+
+	/* sanity check */
+	if (pAd == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("crda> reg notify but pAd = NULL!"));
+		return 0;
+	} /* End of if */
+
+	/*
+		Change the band settings (PASS scan, IBSS allow, or DFS) in mac80211
+		based on EEPROM.
+
+		IEEE80211_CHAN_DISABLED: This channel is disabled.
+		IEEE80211_CHAN_PASSIVE_SCAN: Only passive scanning is permitted
+					on this channel.
+		IEEE80211_CHAN_NO_IBSS: IBSS is not allowed on this channel.
+		IEEE80211_CHAN_RADAR: Radar detection is required on this channel.
+		IEEE80211_CHAN_NO_FAT_ABOVE: extension channel above this channel
+					is not permitted.
+		IEEE80211_CHAN_NO_FAT_BELOW: extension channel below this channel
+					is not permitted.
+	*/
+
+	/*
+		Change regulatory rule here.
+
+		struct ieee80211_channel {
+			enum ieee80211_band band;
+			u16 center_freq;
+			u8 max_bandwidth;
+			u16 hw_value;
+			u32 flags;
+			int max_antenna_gain;
+			int max_power;
+			bool beacon_found;
+			u32 orig_flags;
+			int orig_mag, orig_mpwr;
+		};
+
+		In mac80211 layer, it will change flags, max_antenna_gain,
+		max_bandwidth, max_power.
+	*/
+
+	switch(ReqType)
+	{
+		case REGDOM_SET_BY_CORE:
+			/*
+				Core queried CRDA for a dynamic world regulatory domain.
+			*/
+			CFG80211DBG(RT_DEBUG_ERROR, ("crda> requlation requestion by core: "));
+			break;
+
+		case REGDOM_SET_BY_USER:
+			/*
+				User asked the wireless core to set the regulatory domain.
+				(when iw, network manager, wpa supplicant, etc.)
+			*/
+			CFG80211DBG(RT_DEBUG_ERROR, ("crda> requlation requestion by user: "));
+			break;
+
+		case REGDOM_SET_BY_DRIVER:
+			/*
+				A wireless drivers has hinted to the wireless core it thinks
+				its knows the regulatory domain we should be in.
+				(when driver initialization, calling regulatory_hint)
+			*/
+			CFG80211DBG(RT_DEBUG_ERROR, ("crda> requlation requestion by driver: "));
+			break;
+
+		case REGDOM_SET_BY_COUNTRY_IE:
+			/*
+				The wireless core has received an 802.11 country information
+				element with regulatory information it thinks we should consider.
+				(when beacon receive, calling regulatory_hint_11d)
+			*/
+			CFG80211DBG(RT_DEBUG_ERROR, ("crda> requlation requestion by country IE: "));
+			break;
+	} /* End of switch */
+
+	DBGPRINT(RT_DEBUG_ERROR, ("00\n"));
+
+	/* only follow rules from user */
+	if (ReqType == REGDOM_SET_BY_USER)
+	{
+		/* keep Alpha2 and we can re-call the function when interface is up */
+		CMD_RTPRIV_IOCTL_80211_REG_NOTIFY RegInfo;
+
+		RegInfo.Alpha2[0] = '0';
+		RegInfo.Alpha2[1] = '0';
+		RegInfo.pWiphy = pWiphy;
+
+		RTMP_DRIVER_80211_REG_NOTIFY(pAd, &RegInfo);
+	} /* End of if */
+
+	return 0;
+} /* End of CFG80211_RegNotifier */
+#endif /* LINUX_VERSION_CODE */
+
+
+#endif /* RT_CFG80211_SUPPORT */
+#endif /* LINUX_VERSION_CODE */
+
+/* End of crda.c */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/cfg80211drv.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/cfg80211drv.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/cfg80211drv.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/cfg80211drv.c	2017-09-23 03:42:49.822675663 +0800
@@ -0,0 +1,1104 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifdef RT_CFG80211_SUPPORT
+
+#include "rt_config.h"
+
+#define RT_CFG80211_DEBUG /* debug use */
+#define CFG80211CB			(pAd->pCfg80211_CB)
+
+#ifdef RT_CFG80211_DEBUG
+#define CFG80211DBG(__Flg, __pMsg)		DBGPRINT(__Flg, __pMsg)
+#else
+#define CFG80211DBG(__Flg, __pMsg)
+#endif /* RT_CFG80211_DEBUG */
+
+
+
+
+BOOLEAN CFG80211DRV_OpsSetChannel(
+	VOID						*pAdOrg,
+	VOID						*pData)
+{
+	PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdOrg;
+	CMD_RTPRIV_IOCTL_80211_CHAN *pChan;
+	UINT8 ChanId;
+	UINT8 IfType;
+	UINT8 ChannelType;
+	STRING ChStr[5] = { 0 };
+#ifdef DOT11_N_SUPPORT
+	UCHAR BW_Old;
+	BOOLEAN FlgIsChanged;
+#endif /* DOT11_N_SUPPORT */
+
+
+	/* init */
+	pChan = (CMD_RTPRIV_IOCTL_80211_CHAN *)pData;
+	ChanId = pChan->ChanId;
+	IfType = pChan->IfType;
+	ChannelType = pChan->ChanType;
+
+#ifdef DOT11_N_SUPPORT
+	if (IfType != RT_CMD_80211_IFTYPE_MONITOR)
+	{
+		/* get channel BW */
+		FlgIsChanged = FALSE;
+		BW_Old = pAd->CommonCfg.RegTransmitSetting.field.BW;
+	
+		/* set to new channel BW */
+		if (ChannelType == RT_CMD_80211_CHANTYPE_HT20)
+		{
+			pAd->CommonCfg.RegTransmitSetting.field.BW = BW_20;
+			FlgIsChanged = TRUE;
+		}
+		else if ((ChannelType == RT_CMD_80211_CHANTYPE_HT40MINUS) ||
+				(ChannelType == RT_CMD_80211_CHANTYPE_HT40PLUS))
+		{
+			/* not support NL80211_CHAN_HT40MINUS or NL80211_CHAN_HT40PLUS */
+			/* i.e. primary channel = 36, secondary channel must be 40 */
+			pAd->CommonCfg.RegTransmitSetting.field.BW = BW_40;
+			FlgIsChanged = TRUE;
+		} /* End of if */
+	
+		CFG80211DBG(RT_DEBUG_ERROR, ("80211> New BW = %d\n",
+					pAd->CommonCfg.RegTransmitSetting.field.BW));
+	
+		/* change HT/non-HT mode (do NOT change wireless mode here) */
+		if (((ChannelType == RT_CMD_80211_CHANTYPE_NOHT) &&
+			(pAd->CommonCfg.HT_Disable == 0)) ||
+			((ChannelType != RT_CMD_80211_CHANTYPE_NOHT) &&
+			(pAd->CommonCfg.HT_Disable == 1)))
+		{
+			if (ChannelType == RT_CMD_80211_CHANTYPE_NOHT)
+				pAd->CommonCfg.HT_Disable = 1;
+			else
+				pAd->CommonCfg.HT_Disable = 0;
+			/* End of if */
+	
+			FlgIsChanged = TRUE;
+			CFG80211DBG(RT_DEBUG_ERROR, ("80211> HT Disable = %d\n",
+						pAd->CommonCfg.HT_Disable));
+		} /* End of if */
+	}
+	else
+	{
+		/* for monitor mode */
+		FlgIsChanged = TRUE;
+		pAd->CommonCfg.HT_Disable = 0;
+		pAd->CommonCfg.RegTransmitSetting.field.BW = BW_40;
+	} /* End of if */
+
+	if (FlgIsChanged == TRUE)
+		SetCommonHT(pAd);
+	/* End of if */
+#endif /* DOT11_N_SUPPORT */
+
+	/* switch to the channel */
+	sprintf(ChStr, "%d", ChanId);
+	if (Set_Channel_Proc(pAd, ChStr) == FALSE)
+	{
+		CFG80211DBG(RT_DEBUG_ERROR, ("80211> Change channel fail!\n"));
+	} /* End of if */
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef DOT11_N_SUPPORT
+	if ((IfType == RT_CMD_80211_IFTYPE_STATION) && (FlgIsChanged == TRUE))
+	{
+		/*
+			1. Station mode;
+			2. New BW settings is 20MHz but current BW is not 20MHz;
+			3. New BW settings is 40MHz but current BW is 20MHz;
+
+			Re-connect to the AP due to BW 20/40 or HT/non-HT change.
+		*/
+		Set_SSID_Proc(pAd, (PSTRING)pAd->CommonCfg.Ssid);
+	} /* End of if */
+#endif /* DOT11_N_SUPPORT */
+
+	if (IfType == RT_CMD_80211_IFTYPE_ADHOC)
+	{
+		/* update IBSS beacon */
+		MlmeUpdateTxRates(pAd, FALSE, 0);
+		MakeIbssBeacon(pAd);
+		AsicEnableIbssSync(pAd);
+
+		Set_SSID_Proc(pAd, (PSTRING)pAd->CommonCfg.Ssid);
+	} /* End of if */
+
+	if (IfType == RT_CMD_80211_IFTYPE_MONITOR)
+	{
+		/* reset monitor mode in the new channel */
+		Set_NetworkType_Proc(pAd, "Monitor");
+		RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, pChan->MonFilterFlag);
+	} /* End of if */
+#endif /* CONFIG_STA_SUPPORT */
+
+	return TRUE;
+}
+
+
+BOOLEAN CFG80211DRV_OpsChgVirtualInf(
+	VOID						*pAdOrg,
+	VOID						*pFlgFilter,
+	UINT8						IfType)
+{
+#ifdef CONFIG_STA_SUPPORT
+	PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdOrg;
+	UINT32 FlgFilter = *(UINT32 *)pFlgFilter;
+
+
+	/* change type */
+	if (IfType == RT_CMD_80211_IFTYPE_ADHOC)
+		Set_NetworkType_Proc(pAd, "Adhoc");
+	else if (IfType == RT_CMD_80211_IFTYPE_STATION)
+		Set_NetworkType_Proc(pAd, "Infra");
+	else if (IfType == RT_CMD_80211_IFTYPE_MONITOR)
+	{
+		/* set packet filter */
+		Set_NetworkType_Proc(pAd, "Monitor");
+
+		if (FlgFilter != 0)
+		{
+			UINT32 Filter;
+
+
+			RTMP_IO_READ32(pAd, RX_FILTR_CFG, &Filter);
+
+			if ((FlgFilter & RT_CMD_80211_FILTER_FCSFAIL) == \
+												RT_CMD_80211_FILTER_FCSFAIL)
+			{
+				Filter = Filter & (~0x01);
+			}
+			else
+				Filter = Filter | 0x01;
+			/* End of if */
+	
+			if ((FlgFilter & RT_CMD_80211_FILTER_PLCPFAIL) == \
+												RT_CMD_80211_FILTER_PLCPFAIL)
+			{
+				Filter = Filter & (~0x02);
+			}
+			else
+				Filter = Filter | 0x02;
+			/* End of if */
+	
+			if ((FlgFilter & RT_CMD_80211_FILTER_CONTROL) == \
+												RT_CMD_80211_FILTER_CONTROL)
+			{
+				Filter = Filter & (~0xFF00);
+			}
+			else
+				Filter = Filter | 0xFF00;
+			/* End of if */
+	
+			if ((FlgFilter & RT_CMD_80211_FILTER_OTHER_BSS) == \
+												RT_CMD_80211_FILTER_OTHER_BSS)
+			{
+				Filter = Filter & (~0x08);
+			}
+			else
+				Filter = Filter | 0x08;
+			/* End of if */
+
+			RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, Filter);
+			*(UINT32 *)pFlgFilter = Filter;
+		} /* End of if */
+
+		return TRUE; /* not need to set SSID */
+	} /* End of if */
+
+	pAd->StaCfg.bAutoReconnect = TRUE;
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> SSID = %s\n", pAd->CommonCfg.Ssid));
+	Set_SSID_Proc(pAd, (PSTRING)pAd->CommonCfg.Ssid);
+#endif /* CONFIG_STA_SUPPORT */
+
+	return TRUE;
+}
+
+
+BOOLEAN CFG80211DRV_OpsScan(
+	VOID						*pAdOrg)
+{
+	PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdOrg;
+
+
+	if (pAd->FlgCfg80211Scanning == TRUE)
+		return FALSE; /* scanning */
+	/* End of if */
+
+	/* do scan */
+	pAd->FlgCfg80211Scanning = TRUE;
+	return TRUE;
+}
+
+
+BOOLEAN CFG80211DRV_OpsJoinIbss(
+	VOID						*pAdOrg,
+	VOID						*pData)
+{
+#ifdef CONFIG_STA_SUPPORT
+	PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdOrg;
+	CMD_RTPRIV_IOCTL_80211_IBSS *pIbssInfo;
+
+
+	pIbssInfo = (CMD_RTPRIV_IOCTL_80211_IBSS *)pData;
+	pAd->StaCfg.bAutoReconnect = TRUE;
+
+	pAd->CommonCfg.BeaconPeriod = pIbssInfo->BeaconInterval;
+	Set_SSID_Proc(pAd, (PSTRING)pIbssInfo->pSsid);
+#endif /* CONFIG_STA_SUPPORT */
+	return TRUE;
+}
+
+
+BOOLEAN CFG80211DRV_OpsLeave(
+	VOID						*pAdOrg)
+{
+#ifdef CONFIG_STA_SUPPORT
+	PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdOrg;
+
+
+	pAd->StaCfg.bAutoReconnect = FALSE;
+	pAd->FlgCfg80211Connecting = FALSE;
+	LinkDown(pAd, FALSE);
+#endif /* CONFIG_STA_SUPPORT */
+	return TRUE;
+}
+
+
+BOOLEAN CFG80211DRV_StaGet(
+	VOID						*pAdOrg,
+	VOID						*pData)
+{
+	PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdOrg;
+	CMD_RTPRIV_IOCTL_80211_STA *pIbssInfo;
+
+
+	pIbssInfo = (CMD_RTPRIV_IOCTL_80211_STA *)pData;
+
+
+#ifdef CONFIG_STA_SUPPORT
+{
+	HTTRANSMIT_SETTING PhyInfo;
+	ULONG DataRate = 0;
+	UINT32 RSSI;
+
+
+	/* fill tx rate */
+    if ((pAd->CommonCfg.PhyMode <= PHY_11G) ||
+		(pAd->MacTab.Content[BSSID_WCID].HTPhyMode.field.MODE <= MODE_OFDM))
+	{
+		PhyInfo.word = pAd->StaCfg.HTPhyMode.word;
+	}
+    else
+		PhyInfo.word = pAd->MacTab.Content[BSSID_WCID].HTPhyMode.word;
+	/* End of if */
+
+	getRate(PhyInfo, &DataRate);
+
+	if ((PhyInfo.field.MODE == MODE_HTMIX) ||
+		(PhyInfo.field.MODE == MODE_HTGREENFIELD))
+	{
+		if (PhyInfo.field.BW)
+			pIbssInfo->TxRateFlags |= RT_CMD_80211_TXRATE_BW_40;
+		/* End of if */
+		if (PhyInfo.field.ShortGI)
+			pIbssInfo->TxRateFlags |= RT_CMD_80211_TXRATE_SHORT_GI;
+		/* End of if */
+
+		pIbssInfo->TxRateMCS = PhyInfo.field.MCS;
+	}
+	else
+	{
+		pIbssInfo->TxRateFlags = RT_CMD_80211_TXRATE_LEGACY;
+		pIbssInfo->TxRateMCS = DataRate*10; /* unit: 100kbps */
+	} /* End of if */
+
+	/* fill signal */
+	RSSI = (pAd->StaCfg.RssiSample.AvgRssi0 +
+			pAd->StaCfg.RssiSample.AvgRssi1 +
+			pAd->StaCfg.RssiSample.AvgRssi2) / 3;
+	pIbssInfo->Signal = RSSI;
+}
+#endif /* CONFIG_STA_SUPPORT */
+
+	return TRUE;
+}
+
+
+BOOLEAN CFG80211DRV_KeyAdd(
+	VOID						*pAdOrg,
+	VOID						*pData)
+{
+#ifdef CONFIG_STA_SUPPORT
+	PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdOrg;
+	CMD_RTPRIV_IOCTL_80211_KEY *pKeyInfo;
+
+
+	pKeyInfo = (CMD_RTPRIV_IOCTL_80211_KEY *)pData;
+
+	if (pKeyInfo->KeyType == RT_CMD_80211_KEY_WEP)
+	{
+		switch(pKeyInfo->KeyId)
+		{
+			case 1:
+			default:
+				Set_Key1_Proc(pAd, (PSTRING)pKeyInfo->KeyBuf);
+				break;
+
+			case 2:
+				Set_Key2_Proc(pAd, (PSTRING)pKeyInfo->KeyBuf);
+				break;
+
+			case 3:
+				Set_Key3_Proc(pAd, (PSTRING)pKeyInfo->KeyBuf);
+				break;
+
+			case 4:
+				Set_Key4_Proc(pAd, (PSTRING)pKeyInfo->KeyBuf);
+				break;
+		} /* End of switch */
+	}
+	else
+		Set_WPAPSK_Proc(pAd, (PSTRING)pKeyInfo->KeyBuf);
+#endif /* CONFIG_STA_SUPPORT */
+
+	return TRUE;
+}
+
+
+BOOLEAN CFG80211DRV_Connect(
+	VOID						*pAdOrg,
+	VOID						*pData)
+{
+#ifdef CONFIG_STA_SUPPORT
+	PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdOrg;
+	CMD_RTPRIV_IOCTL_80211_CONNECT *pConnInfo;
+	UCHAR SSID[NDIS_802_11_LENGTH_SSID];
+	UINT32 SSIDLen;
+
+
+	pConnInfo = (CMD_RTPRIV_IOCTL_80211_CONNECT *)pData;
+	/* change to infrastructure mode if we are in ADHOC mode */
+	Set_NetworkType_Proc(pAd, "Infra");
+
+	/* set authentication mode */
+	if (pConnInfo->WpaVer == 2)
+	{
+		if (pConnInfo->FlgIs8021x == TRUE)
+			Set_AuthMode_Proc(pAd, "WPA2");
+		else
+			Set_AuthMode_Proc(pAd, "WPA2PSK");
+		/* End of if */
+	}
+	else if (pConnInfo->WpaVer == 1)
+	{
+		if (pConnInfo->FlgIs8021x == TRUE)
+			Set_AuthMode_Proc(pAd, "WPA");
+		else
+			Set_AuthMode_Proc(pAd, "WPAPSK");
+		/* End of if */
+	}
+	else if (pConnInfo->FlgIsAuthOpen == FALSE)
+		Set_AuthMode_Proc(pAd, "SHARED");
+	else
+		Set_AuthMode_Proc(pAd, "OPEN");
+	/* End of if */
+
+	CFG80211DBG(RT_DEBUG_ERROR,
+				("80211> AuthMode = %d\n", pAd->StaCfg.AuthMode));
+
+	/* set encryption mode */
+	if (pConnInfo->PairwiseEncrypType & RT_CMD_80211_CONN_ENCRYPT_CCMP)
+		Set_EncrypType_Proc(pAd, "AES");
+	else if (pConnInfo->PairwiseEncrypType & RT_CMD_80211_CONN_ENCRYPT_TKIP)
+		Set_EncrypType_Proc(pAd, "TKIP");
+	else if (pConnInfo->PairwiseEncrypType & RT_CMD_80211_CONN_ENCRYPT_WEP)
+	{
+		Set_EncrypType_Proc(pAd, "WEP");
+	}
+	else if (pConnInfo->GroupwiseEncrypType & RT_CMD_80211_CONN_ENCRYPT_CCMP)
+		Set_EncrypType_Proc(pAd, "AES");
+	else if (pConnInfo->GroupwiseEncrypType & RT_CMD_80211_CONN_ENCRYPT_TKIP)
+		Set_EncrypType_Proc(pAd, "TKIP");
+	else
+		Set_EncrypType_Proc(pAd, "NONE");
+	/* End of if */
+
+	CFG80211DBG(RT_DEBUG_ERROR,
+				("80211> EncrypType = %d\n", pAd->StaCfg.WepStatus));
+
+	/* set channel: STATION will auto-scan */
+
+	/* set WEP key */
+	if (pConnInfo->pKey &&
+		((pConnInfo->GroupwiseEncrypType | pConnInfo->PairwiseEncrypType) &
+												RT_CMD_80211_CONN_ENCRYPT_WEP))
+	{
+		UCHAR KeyBuf[50];
+
+		/* reset AuthMode and EncrypType */
+		Set_AuthMode_Proc(pAd, "SHARED");
+		Set_EncrypType_Proc(pAd, "WEP");
+
+		/* reset key */
+#ifdef RT_CFG80211_DEBUG
+		hex_dump("KeyBuf=", (UINT8 *)pConnInfo->pKey, pConnInfo->KeyLen);
+#endif /* RT_CFG80211_DEBUG */
+
+		pAd->StaCfg.DefaultKeyId = pConnInfo->KeyIdx; /* base 0 */
+		if (pConnInfo->KeyLen >= sizeof(KeyBuf))
+			return FALSE;
+		/* End of if */
+		memcpy(KeyBuf, pConnInfo->pKey, pConnInfo->KeyLen);
+		KeyBuf[pConnInfo->KeyLen] = 0x00;
+
+		CFG80211DBG(RT_DEBUG_ERROR,
+					("80211> pAd->StaCfg.DefaultKeyId = %d\n",
+					pAd->StaCfg.DefaultKeyId));
+
+		switch(pConnInfo->KeyIdx)
+		{
+			case 1:
+			default:
+				Set_Key1_Proc(pAd, (PSTRING)KeyBuf);
+				break;
+
+			case 2:
+				Set_Key2_Proc(pAd, (PSTRING)KeyBuf);
+				break;
+
+			case 3:
+				Set_Key3_Proc(pAd, (PSTRING)KeyBuf);
+				break;
+
+			case 4:
+				Set_Key4_Proc(pAd, (PSTRING)KeyBuf);
+				break;
+		} /* End of switch */
+	} /* End of if */
+
+	/* TODO: We need to provide a command to set BSSID to associate a AP */
+
+	/* re-set SSID */
+	pAd->StaCfg.bAutoReconnect = TRUE;
+	pAd->FlgCfg80211Connecting = TRUE;
+
+	SSIDLen = pConnInfo->SsidLen;
+	if (SSIDLen > NDIS_802_11_LENGTH_SSID)
+		SSIDLen = NDIS_802_11_LENGTH_SSID;
+	/* End of if */
+
+	memset(&SSID, 0, sizeof(SSID));
+	memcpy(SSID, pConnInfo->pSsid, SSIDLen);
+	Set_SSID_Proc(pAd, (PSTRING)SSID);
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> SSID = %s\n", SSID));
+#endif /* CONFIG_STA_SUPPORT */
+
+	return TRUE;
+}
+
+
+VOID CFG80211DRV_RegNotify(
+	VOID						*pAdOrg,
+	VOID						*pData)
+{
+	PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdOrg;
+	CMD_RTPRIV_IOCTL_80211_REG_NOTIFY *pRegInfo;
+
+
+	pRegInfo = (CMD_RTPRIV_IOCTL_80211_REG_NOTIFY *)pData;
+
+	/* keep Alpha2 and we can re-call the function when interface is up */
+	pAd->Cfg80211_Alpha2[0] = pRegInfo->Alpha2[0];
+	pAd->Cfg80211_Alpha2[1] = pRegInfo->Alpha2[1];
+
+	/* apply the new regulatory rule */
+	if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_START_UP))
+	{
+		/* interface is up */
+		CFG80211_RegRuleApply(pAd, pRegInfo->pWiphy, (UCHAR *)pRegInfo->Alpha2);
+	}
+	else
+	{
+		CFG80211DBG(RT_DEBUG_ERROR, ("crda> interface is down!\n"));
+	} /* End of if */
+}
+
+
+VOID CFG80211_UnRegister(
+	IN PRTMP_ADAPTER		pAd,
+	IN VOID					*pNetDev)
+{
+#ifdef CONFIG_STA_SUPPORT
+	UINT32 BssId;
+
+	/* free channel information for scan table */
+	for(BssId=0; BssId<MAX_LEN_OF_BSS_TABLE; BssId++)
+	{
+		if (pAd->ScanTab.BssEntry[BssId].pCfg80211_Chan != NULL)
+			os_free_mem(NULL, pAd->ScanTab.BssEntry[BssId].pCfg80211_Chan);
+		/* End of if */
+
+		pAd->ScanTab.BssEntry[BssId].pCfg80211_Chan = NULL;
+	} /* End of for */
+#endif /* CONFIG_STA_SUPPORT */
+
+	/* sanity check */
+	if (pAd->pCfg80211_CB == NULL)
+		return;
+	/* End of if */
+
+	CFG80211OS_UnRegister(pAd->pCfg80211_CB, pNetDev);
+	pAd->pCfg80211_CB = NULL;
+	pAd->CommonCfg.HT_Disable = 0;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Parse and handle country region in beacon from associated AP.
+
+Arguments:
+	pAdCB			- WLAN control block pointer
+	pVIE			- Beacon elements
+	LenVIE			- Total length of Beacon elements
+
+Return Value:
+	NONE
+
+Note:
+========================================================================
+*/
+VOID CFG80211_BeaconCountryRegionParse(
+	IN VOID						*pAdCB,
+	IN NDIS_802_11_VARIABLE_IEs	*pVIE,
+	IN UINT16					LenVIE)
+{
+	PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdCB;
+	UCHAR *pElement = (UCHAR *)pVIE;
+	UINT32 LenEmt;
+
+
+	while(LenVIE > 0)
+	{
+		pVIE = (NDIS_802_11_VARIABLE_IEs *)pElement;
+
+		if (pVIE->ElementID == IE_COUNTRY)
+		{
+			/* send command to do regulation hint only when associated */
+			RTEnqueueInternalCmd(pAd, CMDTHREAD_REG_HINT_11D,
+								pVIE->data, pVIE->Length);
+			break;
+		} /* End of if */
+
+		LenEmt = pVIE->Length + 2;
+
+		if (LenVIE <= LenEmt)
+			break; /* length is not enough */
+		/* End of if */
+
+		pElement += LenEmt;
+		LenVIE -= LenEmt;
+	} /* End of while */
+} /* End of CFG80211_BeaconCountryRegionParse */
+
+
+/*
+========================================================================
+Routine Description:
+	Hint to the wireless core a regulatory domain from driver.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	pCountryIe		- pointer to the country IE
+	CountryIeLen	- length of the country IE
+
+Return Value:
+	NONE
+
+Note:
+	Must call the function in kernel thread.
+========================================================================
+*/
+VOID CFG80211_RegHint(
+	IN VOID						*pAdCB,
+	IN UCHAR					*pCountryIe,
+	IN ULONG					CountryIeLen)
+{
+	PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdCB;
+
+
+	CFG80211OS_RegHint(CFG80211CB, pCountryIe, CountryIeLen);
+} /* End of CFG80211_RegHint */
+
+
+/*
+========================================================================
+Routine Description:
+	Hint to the wireless core a regulatory domain from country element.
+
+Arguments:
+	pAdCB			- WLAN control block pointer
+	pCountryIe		- pointer to the country IE
+	CountryIeLen	- length of the country IE
+
+Return Value:
+	NONE
+
+Note:
+	Must call the function in kernel thread.
+========================================================================
+*/
+VOID CFG80211_RegHint11D(
+	IN VOID						*pAdCB,
+	IN UCHAR					*pCountryIe,
+	IN ULONG					CountryIeLen)
+{
+	/* no regulatory_hint_11d() in 2.6.32 */
+	PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdCB;
+
+
+	CFG80211OS_RegHint11D(CFG80211CB, pCountryIe, CountryIeLen);
+} /* End of CFG80211_RegHint11D */
+
+
+/*
+========================================================================
+Routine Description:
+	Apply new regulatory rule.
+
+Arguments:
+	pAdCB			- WLAN control block pointer
+	pWiphy			- Wireless hardware description
+	pAlpha2			- Regulation domain (2B)
+
+Return Value:
+	NONE
+
+Note:
+	Can only be called when interface is up.
+
+	For general mac80211 device, it will be set to new power by Ops->config()
+	In rt2x00/, the settings is done in rt2x00lib_config().
+========================================================================
+*/
+VOID CFG80211_RegRuleApply(
+	IN VOID						*pAdCB,
+	IN VOID						*pWiphy,
+	IN UCHAR					*pAlpha2)
+{
+	PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdCB;
+	VOID *pBand24G, *pBand5G;
+	RADAR_DETECT_STRUCT	*pRadarDetect;
+	UINT32 IdBand, IdChan, IdPwr;
+	UINT32 ChanNum, ChanId, Power, RecId, DfsType;
+	BOOLEAN FlgIsRadar;
+	ULONG IrqFlags;
+
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("crda> CFG80211_RegRuleApply ==>\n"));
+
+	/* init */
+	pBand24G = NULL;
+	pBand5G = NULL;
+
+	if (pAd == NULL)
+		return;
+
+	RTMP_IRQ_LOCK(&pAd->irq_lock, IrqFlags);
+
+	/* zero first */
+	NdisZeroMemory(pAd->ChannelList,
+					MAX_NUM_OF_CHANNELS * sizeof(CHANNEL_TX_POWER));
+
+	/* 2.4GHZ & 5GHz */
+	RecId = 0;
+	pRadarDetect = &pAd->CommonCfg.RadarDetect;
+
+	/* find the DfsType */
+	DfsType = CE;
+
+	pBand24G = NULL;
+	pBand5G = NULL;
+
+	if (CFG80211OS_BandInfoGet(CFG80211CB, pWiphy, &pBand24G, &pBand5G) == FALSE)
+		return;
+
+#ifdef AUTO_CH_SELECT_ENHANCE
+#ifdef EXT_BUILD_CHANNEL_LIST
+	if ((pAlpha2[0] != '0') && (pAlpha2[1] != '0'))
+	{
+		UINT32 IdReg;
+
+		if (pBand5G != NULL)
+		{
+			for(IdReg=0; ; IdReg++)
+			{
+				if (ChRegion[IdReg].CountReg[0] == 0x00)
+					break;
+				/* End of if */
+	
+				if ((pAlpha2[0] == ChRegion[IdReg].CountReg[0]) &&
+					(pAlpha2[1] == ChRegion[IdReg].CountReg[1]))
+				{
+					DfsType = ChRegion[IdReg].DfsType;
+	
+					CFG80211DBG(RT_DEBUG_ERROR,
+								("crda> find region %c%c, DFS Type %d\n",
+								pAlpha2[0], pAlpha2[1], DfsType));
+					break;
+				} /* End of if */
+			} /* End of for */
+		} /* End of if */
+	} /* End of if */
+#endif /* EXT_BUILD_CHANNEL_LIST */
+#endif /* AUTO_CH_SELECT_ENHANCE */
+
+	for(IdBand=0; IdBand<2; IdBand++)
+	{
+		if (((IdBand == 0) && (pBand24G == NULL)) ||
+			((IdBand == 1) && (pBand5G == NULL)))
+		{
+			continue;
+		} /* End of if */
+
+		if (IdBand == 0)
+		{
+			CFG80211DBG(RT_DEBUG_ERROR, ("crda> reset chan/power for 2.4GHz\n"));
+		}
+		else
+		{
+			CFG80211DBG(RT_DEBUG_ERROR, ("crda> reset chan/power for 5GHz\n"));
+		} /* End of if */
+
+		ChanNum = CFG80211OS_ChanNumGet(CFG80211CB, pWiphy, IdBand);
+
+		for(IdChan=0; IdChan<ChanNum; IdChan++)
+		{
+			if (CFG80211OS_ChanInfoGet(CFG80211CB, pWiphy, IdBand, IdChan,
+									&ChanId, &Power, &FlgIsRadar) == FALSE)
+			{
+				/* the channel is not allowed in the regulatory domain */
+				/* get next channel information */
+				continue;
+			} /* End of if */
+
+			if ((pAd->CommonCfg.PhyMode == PHY_11A) ||
+				(pAd->CommonCfg.PhyMode == PHY_11AN_MIXED))
+			{
+				/* 5G-only mode */
+				if (ChanId <= CFG80211_NUM_OF_CHAN_2GHZ)
+					continue; /* check next */
+				/* End of if */
+			} /* End of if */
+
+			if ((pAd->CommonCfg.PhyMode != PHY_11A) &&
+				(pAd->CommonCfg.PhyMode != PHY_11ABG_MIXED) &&
+				(pAd->CommonCfg.PhyMode != PHY_11AN_MIXED) &&
+				(pAd->CommonCfg.PhyMode != PHY_11ABGN_MIXED) &&
+				(pAd->CommonCfg.PhyMode != PHY_11AGN_MIXED))
+			{
+				/* 2.5G-only mode */
+				if (ChanId > CFG80211_NUM_OF_CHAN_2GHZ)
+					continue; /* check next */
+				/* End of if */
+			} /* End of if */
+
+			for(IdPwr=0; IdPwr<MAX_NUM_OF_CHANNELS; IdPwr++)
+			{
+				if (ChanId == pAd->TxPower[IdPwr].Channel)
+				{
+					/* init the channel info. */
+					NdisMoveMemory(&pAd->ChannelList[RecId],
+									&pAd->TxPower[IdPwr],
+									sizeof(CHANNEL_TX_POWER));
+
+					/* keep channel number */
+					pAd->ChannelList[RecId].Channel = ChanId;
+
+					/* keep maximum tranmission power */
+					pAd->ChannelList[RecId].MaxTxPwr = Power;
+
+					/* keep DFS flag */
+					if (FlgIsRadar == TRUE)
+						pAd->ChannelList[RecId].DfsReq = TRUE;
+					else
+						pAd->ChannelList[RecId].DfsReq = FALSE;
+					/* End of if */
+
+					/* keep DFS type */
+					pAd->ChannelList[RecId].RegulatoryDomain = DfsType;
+
+					/* re-set DFS info. */
+					pRadarDetect->RDDurRegion = DfsType;
+
+					if (DfsType == JAP_W53)
+						pRadarDetect->DfsSessionTime = 15;
+					else if (DfsType == JAP_W56)
+						pRadarDetect->DfsSessionTime = 13;
+					else if (DfsType == JAP)
+						pRadarDetect->DfsSessionTime = 5;
+					else if (DfsType == FCC)
+					{
+						pRadarDetect->DfsSessionTime = 5;
+					}
+					else if (DfsType == CE)
+						pRadarDetect->DfsSessionTime = 13;
+					else
+						pRadarDetect->DfsSessionTime = 13;
+					/* End of if */
+
+					CFG80211DBG(RT_DEBUG_ERROR,
+								("Chan %03d:\tpower %d dBm, "
+								"DFS %d, DFS Type %d\n",
+								ChanId, Power,
+								((FlgIsRadar == TRUE)?1:0),
+								DfsType));
+
+					/* change to record next channel info. */
+					RecId ++;
+					break;
+				} /* End of if */
+			} /* End of for */
+		} /* End of for */
+	} /* End of for */
+
+	pAd->ChannelListNum = RecId;
+	RTMP_IRQ_UNLOCK(&pAd->irq_lock, IrqFlags);
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("crda> Number of channels = %d\n", RecId));
+} /* End of CFG80211_RegRuleApply */
+
+
+/*
+========================================================================
+Routine Description:
+	Inform us that a scan is got.
+
+Arguments:
+	pAdCB				- WLAN control block pointer
+
+Return Value:
+	NONE
+
+Note:
+	Call RT_CFG80211_SCANNING_INFORM, not CFG80211_Scaning
+========================================================================
+*/
+VOID CFG80211_Scaning(
+	IN VOID							*pAdCB,
+	IN UINT32						BssIdx,
+	IN UINT32						ChanId,
+	IN UCHAR						*pFrame,
+	IN UINT32						FrameLen,
+	IN INT32						RSSI)
+{
+#ifdef CONFIG_STA_SUPPORT
+	PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdCB;
+	VOID *pCfg80211_CB = pAd->pCfg80211_CB;
+	BOOLEAN FlgIsNMode;
+	UINT8 BW;
+
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> CFG80211_Scaning ==>\n"));
+
+	if (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE))
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("80211> Network is down!\n"));
+		return;
+	} /* End of if */
+
+	/*
+		In connect function, we also need to report BSS information to cfg80211;
+		Not only scan function.
+	*/
+	if ((pAd->FlgCfg80211Scanning == FALSE) &&
+		(pAd->FlgCfg80211Connecting == FALSE))
+	{
+		return; /* no scan is running */
+	} /* End of if */
+
+	/* init */
+	/* Note: Can not use local variable to do pChan */
+	if (pAd->CommonCfg.PhyMode >= PHY_11ABGN_MIXED)
+		FlgIsNMode = TRUE;
+	else
+		FlgIsNMode = FALSE;
+
+	if (pAd->CommonCfg.RegTransmitSetting.field.BW == BW_20)
+		BW = 0;
+	else
+		BW = 1;
+
+	CFG80211OS_Scaning(pCfg80211_CB,
+						&pAd->ScanTab.BssEntry[BssIdx].pCfg80211_Chan,
+						ChanId,
+						pFrame,
+						FrameLen,
+						RSSI,
+						FlgIsNMode,
+						BW);
+#endif /* CONFIG_STA_SUPPORT */
+} /* End of CFG80211_Scaning */
+
+
+/*
+========================================================================
+Routine Description:
+	Inform us that scan ends.
+
+Arguments:
+	pAdCB			- WLAN control block pointer
+	FlgIsAborted	- 1: scan is aborted
+
+Return Value:
+	NONE
+
+Note:
+========================================================================
+*/
+VOID CFG80211_ScanEnd(
+	IN VOID						*pAdCB,
+	IN BOOLEAN					FlgIsAborted)
+{
+#ifdef CONFIG_STA_SUPPORT
+	PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdCB;
+
+
+	if (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE))
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("80211> Network is down!\n"));
+		return;
+	} /* End of if */
+
+	if (pAd->FlgCfg80211Scanning == FALSE)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("80211> No scan is running!\n"));
+		return; /* no scan is running */
+	} /* End of if */
+
+	if (FlgIsAborted == TRUE)
+		FlgIsAborted = 1;
+	else
+		FlgIsAborted = 0;
+	/* End of if */
+
+	CFG80211OS_ScanEnd(CFG80211CB, FlgIsAborted);
+
+	pAd->FlgCfg80211Scanning = FALSE;
+#endif /* CONFIG_STA_SUPPORT */
+} /* End of CFG80211_ScanEnd */
+
+
+/*
+========================================================================
+Routine Description:
+	Inform CFG80211 about association status.
+
+Arguments:
+	pAdCB			- WLAN control block pointer
+	pBSSID			- the BSSID of the AP
+	pReqIe			- the element list in the association request frame
+	ReqIeLen		- the request element length
+	pRspIe			- the element list in the association response frame
+	RspIeLen		- the response element length
+	FlgIsSuccess	- 1: success; otherwise: fail
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID CFG80211_ConnectResultInform(
+	IN VOID						*pAdCB,
+	IN UCHAR					*pBSSID,
+	IN UCHAR					*pReqIe,
+	IN UINT32					ReqIeLen,
+	IN UCHAR					*pRspIe,
+	IN UINT32					RspIeLen,
+	IN UCHAR					FlgIsSuccess)
+{
+	PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdCB;
+
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> CFG80211_ConnectResultInform ==>\n"));
+
+	CFG80211OS_ConnectResultInform(CFG80211CB,
+								pBSSID,
+								pReqIe,
+								ReqIeLen,
+								pRspIe,
+								RspIeLen,
+								FlgIsSuccess);
+
+	pAd->FlgCfg80211Connecting = FALSE;
+} /* End of CFG80211_ConnectResultInform */
+
+
+/*
+========================================================================
+Routine Description:
+	Re-Initialize wireless channel/PHY in 2.4GHZ and 5GHZ.
+
+Arguments:
+	pAdCB			- WLAN control block pointer
+
+Return Value:
+	TRUE			- re-init successfully
+	FALSE			- re-init fail
+
+Note:
+	CFG80211_SupBandInit() is called in xx_probe().
+	But we do not have complete chip information in xx_probe() so we
+	need to re-init bands in xx_open().
+========================================================================
+*/
+BOOLEAN CFG80211_SupBandReInit(
+	IN VOID						*pAdCB)
+{
+	PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdCB;
+	CFG80211_BAND BandInfo;
+
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> re-init bands...\n"));
+
+	/* re-init bands */
+	NdisZeroMemory(&BandInfo, sizeof(BandInfo));
+	CFG80211_BANDINFO_FILL(pAd, &BandInfo);
+
+	return CFG80211OS_SupBandReInit(CFG80211CB, &BandInfo);
+} /* End of CFG80211_SupBandReInit */
+
+
+#endif /* RT_CFG80211_SUPPORT */
+
+/* End of cfg80211drv.c */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/config.mk linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/config.mk
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/config.mk	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/config.mk	2017-09-23 03:42:49.822675663 +0800
@@ -0,0 +1,832 @@
+# Support ATE function
+HAS_ATE=y
+# Support ATE NEW TXCONT solution
+HAS_NEW_TXCONT=n
+
+# Support ATE NEW TXCARR solution
+HAS_NEW_TXCARR=n
+
+# Support ATE NEW TXCARS solution
+HAS_NEW_TXCARS=n
+
+#-----------------------------------------------#
+# NOTE : RT2xxx does not support this feature !
+# Do not touch this block !!! 
+ifeq ($(CHIPSET),2860)
+HAS_NEW_TXCONT=n
+HAS_NEW_TXCARR=n
+HAS_NEW_TXCARS=n
+endif
+ifeq ($(CHIPSET),2870)
+HAS_NEW_TXCONT=n
+HAS_NEW_TXCARR=n
+HAS_NEW_TXCARS=n
+endif
+ifeq ($(CHIPSET),2880)
+HAS_NEW_TXCONT=n
+HAS_NEW_TXCARR=n
+HAS_NEW_TXCARS=n
+endif
+ifeq ($(CHIPSET),2070)
+HAS_NEW_TXCONT=n
+HAS_NEW_TXCARR=n
+HAS_NEW_TXCARS=n
+endif
+#-----------------------------------------------#
+
+# Support QA ATE function
+HAS_QA_SUPPORT=y
+
+HAS_RSSI_FEEDBACK=n
+
+# Support XLINK mode
+HAS_XLINK=n
+
+
+HAS_NINTENDO=n
+
+# Support LLTD function
+HAS_LLTD=n
+
+
+# Support AP-Client function
+HAS_APCLI=n
+
+# Support Wpa_Supplicant
+#HAS_WPA_SUPPLICANT=n
+HAS_WPA_SUPPLICANT=y
+
+
+# Support Native WpaSupplicant for Network Maganger
+#HAS_NATIVE_WPA_SUPPLICANT_SUPPORT=n
+HAS_NATIVE_WPA_SUPPLICANT_SUPPORT=y
+
+#Support Net interface block while Tx-Sw queue full
+HAS_BLOCK_NET_IF=n
+
+#Support IGMP-Snooping function.
+HAS_IGMP_SNOOP_SUPPORT=n
+
+#Support DFS function
+HAS_DFS_SUPPORT=n
+
+#Support Carrier-Sense function
+HAS_CS_SUPPORT=n
+
+
+# Support user specific transmit rate of Multicast packet.
+HAS_MCAST_RATE_SPECIFIC_SUPPORT=n
+
+# Support for Multiple Cards
+HAS_MC_SUPPORT=n
+
+#Support for PCI-MSI
+HAS_MSI_SUPPORT=n
+
+
+#Support for IEEE802.11e DLS
+HAS_QOS_DLS_SUPPORT=n
+
+#Support for EXT_CHANNEL
+HAS_EXT_BUILD_CHANNEL_LIST=n
+
+#Support for IDS 
+HAS_IDS_SUPPORT=n
+
+
+#Support for Net-SNMP
+HAS_SNMP_SUPPORT=n
+
+#Support features of 802.11n Draft3
+HAS_DOT11N_DRAFT3_SUPPORT=n
+
+#Support features of Single SKU. 
+HAS_SINGLE_SKU_SUPPORT=n
+
+#Support features of 802.11n
+HAS_DOT11_N_SUPPORT=y
+
+
+#Support for RT5392 RT5372
+HAS_TEMPERATURE_COMPENSATION=n
+
+#Support for 2860/2880 co-exist 
+HAS_RT2880_RT2860_COEXIST=n
+
+HAS_KTHREAD_SUPPORT=n
+
+
+
+
+
+#Support for Auto channel select enhance
+HAS_AUTO_CH_SELECT_ENHANCE=n
+
+#Support statistics count
+HAS_STATS_COUNT=n
+
+
+#Support USB_BULK_BUF_ALIGMENT
+HAS_USB_BULK_BUF_ALIGMENT=n
+
+#Support for USB_SUPPORT_SELECTIVE_SUSPEND
+HAS_USB_SUPPORT_SELECTIVE_SUSPEND=n
+
+
+
+
+
+
+#Support Antenna Diversity
+HAS_ANTENNA_DIVERSITY_SUPPORT=n
+
+#Client support WDS function
+HAS_CLIENT_WDS_SUPPORT=n
+
+#Support for Bridge Fast Path & Bridge Fast Path function open to other module
+HAS_BGFP_SUPPORT=n
+HAS_BGFP_OPEN_SUPPORT=n
+
+# Support HOSTAPD function
+HAS_HOSTAPD_SUPPORT=n
+
+#Support GreenAP function
+HAS_GREENAP_SUPPORT=n
+
+#Support MAC80211 LINUX-only function
+#Please make sure the version for CFG80211.ko and MAC80211.ko is same as the one
+#our driver references to.
+HAS_CFG80211_SUPPORT=n
+
+#Support RFKILL hardware block/unblock LINUX-only function
+HAS_RFKILL_HW_SUPPORT=n
+
+
+
+
+HAS_RTMP_FLASH_SUPPORT=n
+
+ifeq ($(OSABL),YES)
+HAS_OSABL_FUNC_SUPPORT=y
+HAS_OSABL_OS_PCI_SUPPORT=y
+HAS_OSABL_OS_USB_SUPPORT=y
+HAS_OSABL_OS_RBUS_SUPPORT=n
+HAS_OSABL_OS_AP_SUPPORT=y
+HAS_OSABL_OS_STA_SUPPORT=y
+endif
+
+HAS_LED_CONTROL_SUPPORT=y
+
+
+#Support WIDI feature
+#Must enable HAS_WSC at the same time.
+
+
+
+HAS_RESOURCE_BOOT_ALLOC=n
+
+HAS_REFUSE_SCAN_QUERY_WHILE_SCANING=n
+
+#################################################
+
+CC := $(CROSS_COMPILE)gcc
+LD := $(CROSS_COMPILE)ld
+
+WFLAGS := -DAGGREGATION_SUPPORT -DPIGGYBACK_SUPPORT -DWMM_SUPPORT  -DLINUX -Wall -Wstrict-prototypes -Wno-trigraphs 
+WFLAGS += -DSYSTEM_LOG_SUPPORT  -DRT28xx_MODE=$(RT28xx_MODE) -DCHIPSET=$(CHIPSET) -DRESOURCE_PRE_ALLOC
+
+ifeq ($(HAS_RESOURCE_BOOT_ALLOC),y)
+WFLAGS += -DRESOURCE_BOOT_ALLOC
+endif
+
+ifeq ($(HAS_REFUSE_SCAN_QUERY_WHILE_SCANING),y)
+WFLAGS += -DREFUSE_SCAN_QUERY_WHILE_SCANING
+endif
+
+
+
+
+
+
+ifeq ($(HAS_KTHREAD_SUPPORT),y)
+WFLAGS += -DKTHREAD_SUPPORT
+endif
+
+ifeq ($(HAS_RTMP_FLASH_SUPPORT),y)
+WFLAGS += -DRTMP_FLASH_SUPPORT
+endif
+
+
+#################################################
+
+# config for STA mode
+
+ifeq ($(RT28xx_MODE),STA)
+WFLAGS += -DCONFIG_STA_SUPPORT -DDBG
+
+ifeq ($(HAS_XLINK),y)
+WFLAGS += -DXLINK_SUPPORT
+endif
+
+
+ifeq ($(HAS_WPA_SUPPLICANT),y)
+WFLAGS += -DWPA_SUPPLICANT_SUPPORT
+ifeq ($(HAS_NATIVE_WPA_SUPPLICANT_SUPPORT),y)
+WFLAGS += -DNATIVE_WPA_SUPPLICANT_SUPPORT
+endif
+endif
+
+
+
+
+ifeq ($(HAS_ATE),y)
+WFLAGS += -DRALINK_ATE
+WFLAGS += -DCONFIG_RT2880_ATE_CMD_NEW
+ifeq ($(HAS_NEW_TXCONT),y)
+WFLAGS += -DNEW_TXCONT
+endif
+ifeq ($(HAS_NEW_TXCARR),y)
+WFLAGS += -DNEW_TXCARR
+endif
+ifeq ($(HAS_NEW_TXCARS),y)
+WFLAGS += -DNEW_TXCARRSUPP
+endif
+ifeq ($(HAS_QA_SUPPORT),y)
+WFLAGS += -DRALINK_QA
+endif
+endif
+
+
+ifeq ($(HAS_SNMP_SUPPORT),y)
+WFLAGS += -DSNMP_SUPPORT
+endif
+
+ifeq ($(HAS_QOS_DLS_SUPPORT),y)
+WFLAGS += -DQOS_DLS_SUPPORT
+endif
+
+ifeq ($(HAS_DOT11_N_SUPPORT),y)
+WFLAGS += -DDOT11_N_SUPPORT
+ifeq ($(HAS_DOT11N_DRAFT3_SUPPORT),y)
+WFLAGS += -DDOT11N_DRAFT3
+endif
+endif
+
+
+
+ifeq ($(HAS_CS_SUPPORT),y)
+WFLAGS += -DCARRIER_DETECTION_SUPPORT
+endif
+
+ifeq ($(HAS_STATS_COUNT),y)
+WFLAGS += -DSTATS_COUNT_SUPPORT
+endif
+
+ifeq ($(HAS_USB_SUPPORT_SELECTIVE_SUSPEND),y)
+WFLAGS += -DUSB_SUPPORT_SELECTIVE_SUSPEND -DCONFIG_PM
+endif
+
+
+ifeq ($(HAS_CFG80211_SUPPORT),y)
+WFLAGS += -DRT_CFG80211_SUPPORT
+ifeq ($(HAS_RFKILL_HW_SUPPORT),y)
+WFLAGS += -DRFKILL_HW_SUPPORT
+endif
+endif
+
+ifeq ($(OSABL),YES)
+WFLAGS += -DOS_ABL_SUPPORT
+ifeq ($(HAS_OSABL_FUNC_SUPPORT),y)
+WFLAGS += -DOS_ABL_FUNC_SUPPORT
+endif
+ifeq ($(HAS_OSABL_OS_PCI_SUPPORT),y)
+WFLAGS += -DOS_ABL_OS_PCI_SUPPORT
+endif
+ifeq ($(HAS_OSABL_OS_USB_SUPPORT),y)
+WFLAGS += -DOS_ABL_OS_USB_SUPPORT
+endif
+ifeq ($(HAS_OSABL_OS_RBUS_SUPPORT),y)
+WFLAGS += -DOS_ABL_OS_RBUS_SUPPORT
+endif
+ifeq ($(HAS_OSABL_OS_AP_SUPPORT),y)
+WFLAGS += -DOS_ABL_OS_AP_SUPPORT
+endif
+ifeq ($(HAS_OSABL_OS_STA_SUPPORT),y)
+WFLAGS += -DOS_ABL_OS_STA_SUPPORT
+endif
+endif
+
+ifeq ($(HAS_ANTENNA_DIVERSITY_SUPPORT),y)
+WFLAGS += -DANT_DIVERSITY_SUPPORT
+endif
+
+
+ifeq ($(HAS_WIDI_SUPPORT),y)
+WFLAGS += -DWIDI_SUPPORT
+endif
+
+endif
+# endif of ifeq ($(RT28xx_MODE),STA)
+
+#################################################
+
+#################################################
+
+#
+# Common compiler flag
+#
+
+
+
+
+
+
+ifeq ($(HAS_EXT_BUILD_CHANNEL_LIST),y)
+WFLAGS += -DEXT_BUILD_CHANNEL_LIST
+endif
+
+ifeq ($(HAS_IDS_SUPPORT),y)
+WFLAGS += -DIDS_SUPPORT
+endif
+
+
+
+ifeq ($(HAS_TEMPERATURE_COMPENSATION),y)
+WFLAGS += -DRTMP_TEMPERATURE_COMPENSATION
+endif
+
+
+
+ifeq ($(OSABL),YES)
+WFLAGS += -DEXPORT_SYMTAB
+endif
+
+ifeq ($(HAS_CLIENT_WDS_SUPPORT),y)
+WFLAGS += -DCLIENT_WDS
+endif
+
+ifeq ($(HAS_BGFP_SUPPORT),y)
+WFLAGS += -DBG_FT_SUPPORT
+endif
+
+ifeq ($(HAS_BGFP_OPEN_SUPPORT),y)
+WFLAGS += -DBG_FT_OPEN_SUPPORT
+endif
+
+
+ifeq ($(HAS_LED_CONTROL_SUPPORT),y)
+WFLAGS += -DLED_CONTROL_SUPPORT
+endif
+
+#################################################
+# ChipSet specific definitions.
+#
+ifeq ($(CHIPSET),2860)
+WFLAGS +=-DRTMP_MAC_PCI -DRTMP_PCI_SUPPORT -DRT2860 -DRT28xx -DA_BAND_SUPPORT
+CHIPSET_DAT = 2860
+ifeq ($(HAS_DFS_SUPPORT),y)
+WFLAGS += -DDFS_SOFTWARE_SUPPORT
+endif
+endif
+
+ifeq ($(CHIPSET),3090)
+WFLAGS +=-DRTMP_MAC_PCI -DRT30xx -DRT3090  -DRTMP_PCI_SUPPORT -DRTMP_RF_RW_SUPPORT -DRTMP_EFUSE_SUPPORT -DSPECIFIC_VCORECAL_SUPPORT
+CHIPSET_DAT = 2860
+endif
+
+ifeq ($(CHIPSET),2870)
+WFLAGS +=-DRTMP_MAC_USB -DRTMP_USB_SUPPORT -DRT2870 -DRT28xx -DRTMP_TIMER_TASK_SUPPORT -DA_BAND_SUPPORT
+CHIPSET_DAT = 2870
+ifeq ($(HAS_DFS_SUPPORT),y)
+WFLAGS += -DDFS_SOFTWARE_SUPPORT
+endif
+
+endif
+
+ifeq ($(CHIPSET),2070)
+WFLAGS +=-DRTMP_MAC_USB -DRT30xx -DRT3070 -DRT2070 -DRTMP_USB_SUPPORT -DRTMP_TIMER_TASK_SUPPORT -DRTMP_RF_RW_SUPPORT -DRTMP_EFUSE_SUPPORT
+CHIPSET_DAT = 2870
+endif
+
+ifeq ($(CHIPSET),3070)
+WFLAGS +=-DRTMP_MAC_USB -DRT30xx -DRT3070 -DRTMP_USB_SUPPORT -DRTMP_TIMER_TASK_SUPPORT -DRTMP_RF_RW_SUPPORT -DRTMP_EFUSE_SUPPORT -DSPECIFIC_VCORECAL_SUPPORT
+CHIPSET_DAT = 2870
+endif
+
+ifeq ($(CHIPSET),2880)
+WFLAGS += -DRT2880 -DRT28xx -DRTMP_MAC_PCI -DCONFIG_RALINK_RT2880_MP -DRTMP_RBUS_SUPPORT -DMERGE_ARCH_TEAM -DA_BAND_SUPPORT -DCONFIG_SWMCU_SUPPORT
+ifeq ($(HAS_DFS_SUPPORT),y)
+WFLAGS += -DDFS_HARDWARE_SUPPORT -DDFS_FCC_BW40_FIX -DDFS_DEBUG
+endif
+ifeq ($(HAS_WIFI_LED_SHARE), y)
+WFLAGS += -DCONFIG_WIFI_LED_SHARE
+endif
+endif
+
+ifeq ($(CHIPSET),3572)
+WFLAGS +=-DRTMP_MAC_USB -DRTMP_USB_SUPPORT -DRT2870 -DRT28xx -DRT30xx -DRT35xx -DRTMP_TIMER_TASK_SUPPORT -DRTMP_RF_RW_SUPPORT -DRTMP_EFUSE_SUPPORT -DA_BAND_SUPPORT -DSPECIFIC_VCORECAL_SUPPORT
+CHIPSET_DAT = 2870
+ifeq ($(HAS_DFS_SUPPORT),y)
+WFLAGS += -DDFS_SOFTWARE_SUPPORT
+endif
+endif
+
+ifeq ($(CHIPSET),3062)
+WFLAGS +=-DRTMP_MAC_PCI -DRT2860 -DRT28xx -DRT30xx -DRT35xx -DRT3062 -DRTMP_PCI_SUPPORT -DRTMP_RF_RW_SUPPORT -DRTMP_EFUSE_SUPPORT -DSPECIFIC_VCORECAL_SUPPORT
+CHIPSET_DAT = 2860
+endif
+
+ifeq ($(CHIPSET),3562)
+WFLAGS +=-DRTMP_MAC_PCI -DRT2860 -DRT28xx -DRT30xx -DRT35xx -DRTMP_PCI_SUPPORT -DRTMP_RF_RW_SUPPORT -DRTMP_EFUSE_SUPPORT -DA_BAND_SUPPORT -DSPECIFIC_VCORECAL_SUPPORT
+ifeq ($(HAS_DFS_SUPPORT),y)
+WFLAGS += -DDFS_HARDWARE_SUPPORT  -DDFS_DEBUG 
+endif
+
+CHIPSET_DAT = 2860
+endif
+
+ifeq ($(CHIPSET),3593)
+WFLAGS +=-DRTMP_MAC_PCI -DDOT11N_SS3_SUPPORT -DNEW_RATE_ADAPT_SUPPORT -DRT3593 -DRT28xx -DRT30xx -DRT35xx -DRTMP_PCI_SUPPORT -DRTMP_RF_RW_SUPPORT -DRTMP_EFUSE_SUPPORT -DA_BAND_SUPPORT -DRTMP_FREQ_CALIBRATION_SUPPORT -DNEW_MBSSID_MODE -DSPECIFIC_BCN_BUF_SUPPORT
+ifeq ($(HAS_DFS_SUPPORT),y)
+WFLAGS += -DDFS_HARDWARE_SUPPORT  -DDFS_DEBUG
+endif
+
+CHIPSET_DAT = 2860
+endif
+
+ifeq ($(CHIPSET),3390)
+WFLAGS +=-DRTMP_MAC_PCI -DRT30xx -DRT33xx -DRT3090 -DRT3390 -DRTMP_PCI_SUPPORT -DRTMP_RF_RW_SUPPORT -DRTMP_EFUSE_SUPPORT -DRTMP_INTERNAL_TX_ALC -DSPECIFIC_VCORECAL_SUPPORT
+CHIPSET_DAT = 2860
+endif
+
+ifeq ($(CHIPSET),3370)
+WFLAGS +=-DRTMP_MAC_USB -DRT30xx -DRT33xx -DRT3070 -DRT3370 -DRTMP_USB_SUPPORT -DRTMP_TIMER_TASK_SUPPORT -DRTMP_RF_RW_SUPPORT -DRTMP_EFUSE_SUPPORT -DRTMP_INTERNAL_TX_ALC -DSPECIFIC_VCORECAL_SUPPORT
+CHIPSET_DAT = 2870
+endif
+
+ifeq ($(CHIPSET),5390)
+WFLAGS +=-DRTMP_MAC_PCI -DRT30xx -DRT33xx -DRT3090 -DRT3390 -DRT5390 -DRTMP_PCI_SUPPORT -DRTMP_RF_RW_SUPPORT -DRTMP_EFUSE_SUPPORT -DSPECIFIC_BCN_BUF_SUPPORT -DRTMP_FREQ_CALIBRATION_SUPPORT -DRTMP_INTERNAL_TX_ALC -DSPECIFIC_VCORECAL_SUPPORT
+CHIPSET_DAT = 2860
+endif
+
+ifeq ($(CHIPSET),5370)
+WFLAGS +=-DRTMP_MAC_USB -DRT30xx -DRT33xx -DRT3070 -DRT3370 -DRT5370 -DRTMP_USB_SUPPORT -DRTMP_TIMER_TASK_SUPPORT -DRTMP_RF_RW_SUPPORT -DRTMP_EFUSE_SUPPORT -DRTMP_INTERNAL_TX_ALC -DhSPECIFIC_BCN_BUF_SUPPORT -DRTMP_FREQ_CALIBRATION_SUPPORT -DSPECIFIC_VCORECAL_SUPPORT
+CHIPSET_DAT = 2870
+endif
+
+ifeq ($(CHIPSET), 3052)
+WFLAGS += -DRTMP_MAC_PCI -DRTMP_RBUS_SUPPORT -DRT3052 -DRT305x -DRTMP_RF_RW_SUPPORT -DCONFIG_SWMCU_SUPPORT -DSPECIFIC_VCORECAL_SUPPORT
+CHIPSET_DAT = 2870
+ifeq ($(HAS_WIFI_LED_SHARE), y)
+WFLAGS += -DCONFIG_WIFI_LED_SHARE
+endif
+endif
+
+ifeq ($(CHIPSET), 3352)
+WFLAGS += -DRTMP_MAC_PCI -DRTMP_RBUS_SUPPORT -DRT3352 -DRT305x -DRTMP_RF_RW_SUPPORT -DSPECIFIC_BCN_BUF_SUPPORT -DVCORECAL_SUPPORT -DCONFIG_SWMCU_SUPPORT -DRTMP_INTERNAL_TX_ALC
+CHIPSET_DAT = 2860
+ifeq ($(HAS_WIFI_LED_SHARE), y)
+WFLAGS += -DCONFIG_WIFI_LED_SHARE
+endif
+endif
+
+ifeq ($(CHIPSET), 5350)
+WFLAGS += -DRTMP_MAC_PCI -DRTMP_RBUS_SUPPORT -DRT5350 -DRT305x -DRT3050 -DRT3350 -DRTMP_RF_RW_SUPPORT -DSPECIFIC_BCN_BUF_SUPPORT -DVCORECAL_SUPPORT -DCONFIG_SWMCU_SUPPORT -DRTMP_INTERNAL_TX_ALC -DRTMP_FREQ_CALIBRATION_SUPPORT
+CHIPSET_DAT = 2860
+ifeq ($(HAS_WIFI_LED_SHARE), y)
+WFLAGS += -DCONFIG_WIFI_LED_SHARE
+endif
+endif
+
+
+
+
+ifeq ($(CHIPSET),USB)
+#3572
+WFLAGS +=-DRTMP_MAC_USB -DRTMP_USB_SUPPORT -DRT2870 -DRT28xx -DRT30xx -DRT35xx -DRTMP_TIMER_TASK_SUPPORT -DRTMP_RF_RW_SUPPORT -DRTMP_EFUSE_SUPPORT -DA_BAND_SUPPORT -DSPECIFIC_VCORECAL_SUPPORT
+#3370
+WFLAGS += -DRT33xx -DRT3070 -DRT3370 -DRTMP_TIMER_TASK_SUPPORT -DRTMP_INTERNAL_TX_ALC
+CHIPSET_DAT = 2870
+ifeq ($(HAS_DFS_SUPPORT),y)
+WFLAGS += -DDFS_SOFTWARE_SUPPORT
+endif
+endif
+
+
+ifeq ($(CHIPSET),PCI)
+#3562		
+WFLAGS +=-DRTMP_MAC_PCI -DRT2860 -DRT28xx -DRT30xx -DRT35xx -DRTMP_PCI_SUPPORT -DRTMP_RF_RW_SUPPORT -DRTMP_EFUSE_SUPPORT -DA_BAND_SUPPORT -DSPECIFIC_VCORECAL_SUPPORT
+#3390
+WFLAGS +=-DRT33xx -DRT3090 -DRT3390 -DRTMP_INTERNAL_TX_ALC
+ifeq ($(HAS_DFS_SUPPORT),y)
+WFLAGS += -DDFS_HARDWARE_SUPPORT  -DDFS_DEBUG 
+endif
+endif
+
+
+ifeq ($(CHIPSET),RBUS)
+WFLAGS += -DMERGE_ARCH_TEAM -DCONFIG_SWMCU_SUPPORT -DCONFIG_RA_NAT_NONE -DRTMP_RBUS_SUPPORT
+#5350, 3050, 3350
+WFLAGS +=-DRTMP_MAC_PCI -DRT305x -DRT5350 -DRT3050 -DRT3350 -DRTMP_PCI_SUPPORT -DRTMP_RF_RW_SUPPORT -DA_BAND_SUPPORT -DVCORECAL_SUPPORT -DSPECIFIC_BCN_BUF_SUPPORT
+ifeq ($(HAS_DFS_SUPPORT),y)
+WFLAGS += -DDFS_HARDWARE_SUPPORT  -DDFS_DEBUG 
+endif
+endif
+
+
+#################################################
+
+
+ifeq ($(PLATFORM),5VT)
+#WFLAGS += -DCONFIG_5VT_ENHANCE
+endif
+
+ifeq ($(HAS_BLOCK_NET_IF),y)
+WFLAGS += -DBLOCK_NET_IF
+endif
+
+ifeq ($(HAS_DFS_SUPPORT),y)
+WFLAGS += -DDFS_SUPPORT
+endif
+
+ifeq ($(HAS_MC_SUPPORT),y)
+WFLAGS += -DMULTIPLE_CARD_SUPPORT
+endif
+
+ifeq ($(HAS_LLTD),y)
+WFLAGS += -DLLTD_SUPPORT
+endif
+
+ifeq ($(PLATFORM),RMI)
+WFLAGS += -DRT_BIG_ENDIAN 
+endif
+
+ifeq ($(PLATFORM),BL2348)
+WFLAGS += -DRT_BIG_ENDIAN
+endif
+
+ifeq ($(PLATFORM),BLUBB)
+WFLAGS += -DRT_BIG_ENDIAN
+endif
+
+ifeq ($(PLATFORM),BLPMP)
+WFLAGS += -DRT_BIG_ENDIAN
+endif
+
+ifeq ($(PLATFORM),RMI_64)
+WFLAGS += -DRT_BIG_ENDIAN 
+endif
+ifeq ($(PLATFORM),IXP)
+WFLAGS += -DRT_BIG_ENDIAN
+endif
+
+ifeq ($(PLATFORM),IKANOS_V160)
+WFLAGS += -DRT_BIG_ENDIAN -DIKANOS_VX_1X0
+endif
+
+ifeq ($(PLATFORM),IKANOS_V180)
+WFLAGS += -DRT_BIG_ENDIAN -DIKANOS_VX_1X0
+endif
+
+ifeq ($(PLATFORM),INF_TWINPASS)
+WFLAGS += -DRT_BIG_ENDIAN -DINF_TWINPASS
+endif
+
+ifeq ($(PLATFORM),INF_DANUBE)
+ifneq (,$(findstring 2.4,$(LINUX_SRC)))
+# Linux 2.4
+WFLAGS += -DINF_DANUBE -DRT_BIG_ENDIAN
+else
+# Linux 2.6
+WFLAGS += -DRT_BIG_ENDIAN
+endif
+endif
+
+ifeq ($(PLATFORM),INF_AR9)
+WFLAGS += -DRT_BIG_ENDIAN -DINF_AR9
+# support MAPI function for AR9.
+#WFLAGS += -DAR9_MAPI_SUPPORT
+endif
+
+ifeq ($(PLATFORM),INF_VR9)
+WFLAGS += -DRT_BIG_ENDIAN -DINF_AR9 -DINF_VR9
+endif
+
+ifeq ($(PLATFORM),CAVM_OCTEON)
+WFLAGS += -DRT_BIG_ENDIAN
+endif
+
+ifeq ($(PLATFORM),BRCM_6358)
+WFLAGS += -DRT_BIG_ENDIAN -DBRCM_6358
+endif
+
+ifeq ($(PLATFORM),INF_AMAZON_SE)
+WFLAGS += -DRT_BIG_ENDIAN -DINF_AMAZON_SE
+endif
+
+ifeq ($(PLATFORM),RALINK_3052)
+WFLAGS += -DPLATFORM_RALINK_3052
+endif
+
+ifeq ($(PLATFORM),FREESCALE8377)
+#EXTRA_CFLAGS := -v -I$(RT28xx_DIR)/include -I$(LINUX_SRC)/include $(WFLAGS)-O2 -Wall -Wstrict-prototypes -Wno-trigraphs 
+#export EXTRA_CFLAGS
+WFLAGS += -DRT_BIG_ENDIAN
+EXTRA_CFLAGS := $(WFLAGS) -I$(RT28xx_DIR)/include
+endif
+
+ifeq ($(PLATFORM),ST)
+#WFLAGS += -DST
+WFLAGS += -DST
+endif
+
+#kernel build options for 2.4
+# move to Makefile outside LINUX_SRC := /opt/star/kernel/linux-2.4.27-star
+
+ifeq ($(PLATFORM),RALINK_3052)
+CFLAGS := -D__KERNEL__ -I$(LINUX_SRC)/include/asm-mips/mach-generic -I$(LINUX_SRC)/include -I$(RT28xx_DIR)/include -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -fomit-frame-pointer -G 0 -mno-abicalls -fno-pic -pipe  -finline-limit=100000 -march=mips2 -mabi=32 -Wa,--trap -DLINUX -nostdinc -iwithprefix include $(WFLAGS)
+export CFLAGS
+endif
+
+ifeq ($(PLATFORM), RALINK_2880)
+CFLAGS := -D__KERNEL__ -I$(LINUX_SRC)/include -I$(RT28xx_DIR)/include -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -fomit-frame-pointer -G 0 -mno-abicalls -fno-pic -pipe  -finline-limit=100000 -march=mips2 -mabi=32 -Wa,--trap -DLINUX -nostdinc -iwithprefix include $(WFLAGS)
+export CFLAGS
+endif
+
+ifeq ($(PLATFORM),STAR)
+CFLAGS := -D__KERNEL__ -I$(LINUX_SRC)/include -I$(RT28xx_DIR)/include -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -Uarm -fno-common -pipe -mapcs-32 -D__LINUX_ARM_ARCH__=4 -march=armv4  -mshort-load-bytes -msoft-float -Uarm -DMODULE -DMODVERSIONS -include $(LINUX_SRC)/include/linux/modversions.h $(WFLAGS)
+
+export CFLAGS
+endif
+
+
+ifeq ($(PLATFORM),LS1B)
+EXTRA_CFLAGS := -D__KERNEL__ -I$(RT28xx_DIR)/include -I$(LINUX_SRC)/include -I$(LINUX_SRC)/include/asm/gcc -I$(LINUX_SRC)/arch/mips/include/asm/mach-loongson/ls1x -I$(LINUX_SRC)/include/asm-mips/mach-generic -I$(RT2860_DIR)/include -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -ffreestanding -O2     -fomit-frame-pointer -G 0 -mno-abicalls -fno-pic -pipe  -mabi=32 -march=mips32 -Wa,-32 -Wa,-march=mips32 -Wa,-mips32 -Wa,--trap $(WFLAGS) 
+endif
+
+
+ifeq ($(PLATFORM),SIGMA)
+CFLAGS := -D__KERNEL__ -I$(RT28xx_DIR)/include -I$(LINUX_SRC)/include -I$(LINUX_SRC)/include/asm/gcc -I$(LINUX_SRC)/include/asm-mips/mach-tango2 -I$(LINUX_SRC)/include/asm-mips/mach-tango2 -DEM86XX_CHIP=EM86XX_CHIPID_TANGO2 -DEM86XX_REVISION=6 -I$(LINUX_SRC)/include/asm-mips/mach-generic -I$(RT2860_DIR)/include -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -ffreestanding -O2     -fomit-frame-pointer -G 0 -mno-abicalls -fno-pic -pipe  -mabi=32 -march=mips32r2 -Wa,-32 -Wa,-march=mips32r2 -Wa,-mips32r2 -Wa,--trap -DMODULE $(WFLAGS) -DSIGMA863X_PLATFORM
+
+export CFLAGS
+endif
+
+ifeq ($(PLATFORM),SIGMA_8622)
+CFLAGS := -D__KERNEL__ -I$(CROSS_COMPILE_INCLUDE)/include -I$(LINUX_SRC)/include -I$(RT28xx_DIR)/include -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -fno-common -pipe -fno-builtin -D__linux__ -DNO_MM -mapcs-32 -march=armv4 -mtune=arm7tdmi -msoft-float -DMODULE -mshort-load-bytes -nostdinc -iwithprefix -DMODULE $(WFLAGS)
+export CFLAGS
+endif
+
+ifeq ($(PLATFORM),5VT)
+CFLAGS := -D__KERNEL__ -I$(LINUX_SRC)/include -I$(RT28xx_DIR)/include -mlittle-endian -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -O3 -fno-omit-frame-pointer -fno-optimize-sibling-calls -fno-omit-frame-pointer -mapcs -mno-sched-prolog -mabi=apcs-gnu -mno-thumb-interwork -D__LINUX_ARM_ARCH__=5 -march=armv5te -mtune=arm926ej-s --param max-inline-insns-single=40000  -Uarm -Wdeclaration-after-statement -Wno-pointer-sign -DMODULE $(WFLAGS) 
+
+export CFLAGS
+endif
+
+ifeq ($(PLATFORM),IKANOS_V160)
+CFLAGS := -D__KERNEL__ -I$(LINUX_SRC)/include -I$(LINUX_SRC)/include/asm/gcc -I$(LINUX_SRC)/include/asm-mips/mach-tango2 -I$(LINUX_SRC)/include/asm-mips/mach-tango2 -I$(LINUX_SRC)/include/asm-mips/mach-generic -I$(RT28xx_DIR)/include -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -ffreestanding -O2 -fomit-frame-pointer -G 0 -mno-abicalls -fno-pic -pipe -march=lx4189 -Wa, -DMODULE $(WFLAGS)
+export CFLAGS
+endif
+
+ifeq ($(PLATFORM),IKANOS_V180)
+CFLAGS := -D__KERNEL__ -I$(LINUX_SRC)/include -I$(LINUX_SRC)/include/asm/gcc -I$(LINUX_SRC)/include/asm-mips/mach-tango2 -I$(LINUX_SRC)/include/asm-mips/mach-tango2 -I$(LINUX_SRC)/include/asm-mips/mach-generic -I$(RT28xx_DIR)/include -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -ffreestanding -O2 -fomit-frame-pointer -G 0 -mno-abicalls -fno-pic -pipe -mips32r2 -Wa, -DMODULE $(WFLAGS)
+export CFLAGS
+endif
+
+ifeq ($(PLATFORM),INF_TWINPASS)
+CFLAGS := -D__KERNEL__ -DMODULE -I$(LINUX_SRC)/include -I$(RT28xx_DIR)/include -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fomit-frame-pointer -fno-strict-aliasing -fno-common -G 0 -mno-abicalls -fno-pic -march=4kc -mips32 -Wa,--trap -pipe -mlong-calls $(WFLAGS)
+export CFLAGS
+endif
+
+ifeq ($(PLATFORM),INF_DANUBE)
+	ifneq (,$(findstring 2.4,$(LINUX_SRC)))
+	CFLAGS := -I$(RT28xx_DIR)/include $(WFLAGS) -Wundef -fno-strict-aliasing -fno-common -ffreestanding -Os -fomit-frame-pointer -G 0 -mno-abicalls -fno-pic -pipe -msoft-float  -mabi=32 -march=mips32 -Wa,-32 -Wa,-march=mips32 -Wa,-mips32 -Wa,--trap -I$(LINUX_SRC)/include/asm-mips/mach-generic
+	else
+	CFLAGS := -I$(RT28xx_DIR)/include $(WFLAGS) -Wundef -fno-strict-aliasing -fno-common -ffreestanding -Os -fomit-frame-pointer -G 0 -mno-abicalls -fno-pic -pipe -msoft-float  -mabi=32 -march=mips32r2 -Wa,-32 -Wa,-march=mips32r2 -Wa,-mips32r2 -Wa,--trap -I$(LINUX_SRC)/include/asm-mips/mach-generic
+	endif
+export CFLAGS
+endif
+
+ifeq ($(PLATFORM),INF_AR9)
+CFLAGS := -I$(RT28xx_DIR)/include $(WFLAGS) -Wundef -fno-strict-aliasing -fno-common -fno-pic -ffreestanding -Os -fomit-frame-pointer -G 0 -mno-abicalls -fno-pic -pipe -msoft-float  -mabi=32 -mlong-calls -march=mips32r2 -mtune=34kc -march=mips32r2 -Wa,-32 -Wa,-march=mips32r2 -Wa,-mips32r2 -Wa,--trap -I$(LINUX_SRC)/include/asm-mips/mach-generic
+export CFLAGS
+endif
+
+ifeq ($(PLATFORM),INF_VR9)
+CFLAGS := -I$(RT28xx_DIR)/include $(WFLAGS) -Wundef -fno-strict-aliasing -fno-common -fno-pic -ffreestanding -Os -fomit-frame-pointer -G 0 -mno-abicalls -fno-pic -pipe -msoft-float  -mabi=32 -mlong-calls -march=mips32r2 -march=mips32r2 -Wa,-32 -Wa,-march=mips32r2 -Wa,-mips32r2 -Wa,--trap -I$(LINUX_SRC)/include/asm-mips/mach-generic
+export CFLAGS
+endif
+
+ifeq ($(PLATFORM),BRCM_6358)
+CFLAGS := $(WFLAGS) -I$(RT28xx_DIR)/include -nostdinc -iwithprefix include -D__KERNEL__ -Wall -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -I $(LINUX_SRC)/include/asm/gcc -G 0 -mno-abicalls -fno-pic -pipe  -finline-limit=100000 -mabi=32 -march=mips32 -Wa,-32 -Wa,-march=mips32 -Wa,-mips32 -Wa,--trap -I$(LINUX_SRC)/include/asm-mips/mach-bcm963xx -I$(LINUX_SRC)/include/asm-mips/mach-generic  -Os -fomit-frame-pointer -Wdeclaration-after-statement  -DMODULE -mlong-calls
+export CFLAGS
+endif
+
+ifeq ($(PLATFORM),INF_AMAZON_SE)
+CFLAGS := -D__KERNEL__ -DMODULE=1 -I$(LINUX_SRC)/include -I$(RT28xx_DIR)/include -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -DCONFIG_IFX_ALG_QOS -DCONFIG_WAN_VLAN_SUPPORT -fomit-frame-pointer -DIFX_PPPOE_FRAME -G 0 -fno-pic -mno-abicalls -mlong-calls -pipe -finline-limit=100000 -mabi=32 -march=mips32 -Wa,-32 -Wa,-march=mips32 -Wa,-mips32 -Wa,--trap -nostdinc -iwithprefix include $(WFLAGS)
+export CFLAGS
+endif
+
+ifeq ($(PLATFORM),ST)
+CFLAGS := -D__KERNEL__ -I$(LINUX_SRC)/include -I$(RT28xx_DIR)/include -Wall -O2 -Wundef -Wstrict-prototypes -Wno-trigraphs -Wdeclaration-after-statement -Wno-pointer-sign -fno-strict-aliasing -fno-common -fomit-frame-pointer -ffreestanding -m4-nofpu -o $(WFLAGS) 
+export CFLAGS
+endif
+
+ifeq ($(PLATFORM),PC)
+    ifneq (,$(findstring 2.4,$(LINUX_SRC)))
+	# Linux 2.4
+	CFLAGS := -D__KERNEL__ -I$(LINUX_SRC)/include -I$(RT28xx_DIR)/include -O2 -fomit-frame-pointer -fno-strict-aliasing -fno-common -pipe -mpreferred-stack-boundary=2 -march=i686 -DMODULE -DMODVERSIONS -include $(LINUX_SRC)/include/linux/modversions.h $(WFLAGS)
+	export CFLAGS
+    else
+	# Linux 2.6
+	EXTRA_CFLAGS := $(WFLAGS) -I$(RT28xx_DIR)/include
+    endif
+endif
+
+#If the kernel version of RMI is newer than 2.6.27, please change "CFLAGS" to "EXTRA_FLAGS"
+ifeq ($(PLATFORM),RMI)
+EXTRA_CFLAGS := -D__KERNEL__ -DMODULE=1 -I$(LINUX_SRC)/include -I$(LINUX_SRC)/include/asm-mips/mach-generic  -I$(RT28xx_DIR)/include -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -DCONFIG_IFX_ALG_QOS -DCONFIG_WAN_VLAN_SUPPORT -fomit-frame-pointer -DIFX_PPPOE_FRAME -G 0 -fno-pic -mno-abicalls -mlong-calls -pipe -finline-limit=100000 -mabi=32 -G 0 -mno-abicalls -fno-pic -pipe -msoft-float -march=xlr -ffreestanding  -march=xlr -Wa,--trap, -nostdinc -iwithprefix include $(WFLAGS)
+export EXTRA_CFLAGS
+endif
+
+ifeq ($(PLATFORM),RMI_64)
+EXTRA_CFLAGS := -D__KERNEL__ -DMODULE=1 -I$(LINUX_SRC)/include -I$(LINUX_SRC)/include/asm-mips/mach-generic  -I$(RT28xx_DIR)/include -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -DCONFIG_IFX_ALG_QOS -DCONFIG_WAN_VLAN_SUPPORT -fomit-frame-pointer -DIFX_PPPOE_FRAME -G 0 -fno-pic -mno-abicalls -mlong-calls -pipe -finline-limit=100000 -mabi=64 -G 0 -mno-abicalls -fno-pic -pipe -msoft-float -march=xlr -ffreestanding  -march=xlr -Wa,--trap, -nostdinc -iwithprefix include $(WFLAGS)
+export EXTRA_CFLAGS
+endif
+
+ifeq ($(PLATFORM),IXP)
+	CFLAGS := -v -D__KERNEL__ -DMODULE -I$(LINUX_SRC)/include -I$(RT28xx_DIR)/include -mbig-endian -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -Uarm -fno-common -pipe -mapcs-32 -D__LINUX_ARM_ARCH__=5 -mcpu=xscale -mtune=xscale -malignment-traps -msoft-float $(WFLAGS)
+        EXTRA_CFLAGS := -v $(WFLAGS) -I$(RT28xx_DIR)/include -mbig-endian
+	export CFLAGS        
+endif
+
+ifeq ($(PLATFORM),SMDK)
+        EXTRA_CFLAGS := $(WFLAGS) -I$(RT28xx_DIR)/include
+endif
+
+ifeq ($(PLATFORM),CAVM_OCTEON)
+	EXTRA_CFLAGS := $(WFLAGS) -I$(RT28xx_DIR)/include \
+				    -mabi=64 $(WFLAGS)
+export CFLAGS
+endif
+
+ifeq ($(PLATFORM),DM6446)
+	CFLAGS := -nostdinc -iwithprefix include -D__KERNEL__ -I$(RT28xx_DIR)/include -I$(LINUX_SRC)/include  -Wall -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Os -fno-omit-frame-pointer -fno-omit-frame-pointer -mapcs -mno-sched-prolog -mlittle-endian -mabi=apcs-gnu -D__LINUX_ARM_ARCH__=5 -march=armv5te -mtune=arm9tdmi -msoft-float -Uarm -Wdeclaration-after-statement -c -o $(WFLAGS)
+export CFLAGS
+endif
+
+ifeq ($(PLATFORM),BL2348)
+CFLAGS := -D__KERNEL__ -I$(RT28xx_DIR)/include -I$(LINUX_SRC)/include -I$(LINUX_SRC)/include/asm/gcc -I$(LINUX_SRC)/include/asm-mips/mach-tango2 -I$(LINUX_SRC)/include/asm-mips/mach-tango2 -DEM86XX_CHIP=EM86XX_CHIPID_TANGO2 -DEM86XX_REVISION=6 -I$(LINUX_SRC)/include/asm-mips/mach-generic -I$(RT2860_DIR)/include -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -ffreestanding -O2     -fomit-frame-pointer -G 0 -mno-abicalls -fno-pic -pipe  -mabi=32 -march=mips32r2 -Wa,-32 -Wa,-march=mips32r2 -Wa,-mips32r2 -Wa,--trap -DMODULE $(WFLAGS) -DSIGMA863X_PLATFORM -DEXPORT_SYMTAB -DPLATFORM_BL2348
+export CFLAGS
+endif
+
+ifeq ($(PLATFORM),BLUBB)
+CFLAGS := -D__KERNEL__ -I$(RT28xx_DIR)/include -I$(LINUX_SRC)/include -I$(LINUX_SRC)/include/asm/gcc -I$(LINUX_SRC)/include/asm-mips/mach-tango2 -I$(LINUX_SRC)/include/asm-mips/mach-tango2 -DEM86XX_CHIP=EM86XX_CHIPID_TANGO2 -DEM86XX_REVISION=6 -I$(LINUX_SRC)/include/asm-mips/mach-generic -I$(RT2860_DIR)/include -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -ffreestanding -O2     -fomit-frame-pointer -G 0 -mno-abicalls -fno-pic -pipe  -mabi=32 -march=mips32r2 -Wa,-32 -Wa,-march=mips32r2 -Wa,-mips32r2 -Wa,--trap -DMODULE $(WFLAGS) -DSIGMA863X_PLATFORM -DEXPORT_SYMTAB -DPLATFORM_BL2348
+export CFLAGS
+endif
+
+ifeq ($(PLATFORM),BLPMP)
+CFLAGS := -D__KERNEL__ -I$(RT28xx_DIR)/include -I$(LINUX_SRC)/include -I$(LINUX_SRC)/include/asm/gcc -I$(LINUX_SRC)/include/asm-mips/mach-tango2 -I$(LINUX_SRC)/include/asm-mips/mach-tango2 -DEM86XX_CHIP=EM86XX_CHIPID_TANGO2 -DEM86XX_REVISION=6 -I$(LINUX_SRC)/include/asm-mips/mach-generic -I$(RT2860_DIR)/include -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -ffreestanding -O2     -fomit-frame-pointer -G 0 -mno-abicalls -fno-pic -pipe  -mabi=32 -march=mips32r2 -Wa,-32 -Wa,-march=mips32r2 -Wa,-mips32r2 -Wa,--trap -DMODULE $(WFLAGS) -DSIGMA863X_PLATFORM -DEXPORT_SYMTAB
+export CFLAGS
+endif
+
+ifeq ($(PLATFORM),MT85XX)
+    ifneq (,$(findstring 2.4,$(LINUX_SRC)))
+	# Linux 2.4
+	CFLAGS := -D__KERNEL__ -I$(LINUX_SRC)/include -I$(RT28xx_DIR)/include -O2 -fomit-frame-pointer -fno-strict-aliasing -fno-common -pipe -mpreferred-stack-boundary=2 -march=i686 -DMODULE -DMODVERSIONS -include $(LINUX_SRC)/include/linux/modversions.h $(WFLAGS)
+	export CFLAGS
+    else
+	# Linux 2.6
+	EXTRA_CFLAGS += $(WFLAGS) -I$(RT28xx_DIR)/include
+	EXTRA_CFLAGS += -D _NO_TYPEDEF_BOOL_ \
+	                -D _NO_TYPEDEF_UCHAR_ \
+	                -D _NO_TYPEDEF_UINT8_ \
+	                -D _NO_TYPEDEF_UINT16_ \
+	                -D _NO_TYPEDEF_UINT32_ \
+	                -D _NO_TYPEDEF_UINT64_ \
+	                -D _NO_TYPEDEF_CHAR_ \
+	                -D _NO_TYPEDEF_INT32_ \
+	                -D _NO_TYPEDEF_INT64_ \
+	                
+    endif
+endif
+
+ifeq ($(PLATFORM),NXP_TV550)
+    ifneq (,$(findstring 2.4,$(LINUX_SRC)))
+        # Linux 2.4
+        CFLAGS := -D__KERNEL__ -I$(LINUX_SRC)/include -I$(RT28xx_DIR)/include -O2 -fomit-frame-pointer -fno-strict-aliasing -fno-common -pipe -mpreferred-stack-boundary=2 -march=mips -DMODULE -DMODVERSIONS -include $(LINUX_SRC)/include/linux/modversions.h $(WFLAGS)
+        export CFLAGS
+    else
+        # Linux 2.6
+        EXTRA_CFLAGS := $(WFLAGS) -I$(RT28xx_DIR)/include
+    endif
+endif
+
+ifeq ($(PLATFORM),MVL5)
+CFLAGS := -D__KERNEL__ -I$(LINUX_SRC)/include -I$(RT28xx_DIR)/include -mlittle-endian -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -O3 -fno-omit-frame-pointer -fno-optimize-sibling-calls -fno-omit-frame-pointer -mapcs -mno-sched-prolog -mno-thumb-interwork -D__LINUX_ARM_ARCH__=5 -march=armv5te -mtune=arm926ej-s --param max-inline-insns-single=40000  -Uarm -Wdeclaration-after-statement -Wno-pointer-sign -DMODULE $(WFLAGS) 
+export CFLAGS
+endif
+
+ifeq ($(PLATFORM),RALINK_3352)
+CFLAGS := -D__KERNEL__ -I$(LINUX_SRC)/include/asm-mips/mach-generic -I$(LINUX_SRC)/include -I$(RT28xx_DIR)/include -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -fomit-frame-pointer -G 0 -mno-abicalls -fno-pic -pipe  -finline-limit=100000 -march=mips2 -mabi=32 -Wa,--trap -DLINUX -nostdinc -iwithprefix include $(WFLAGS)
+export CFLAGS
+endif
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/inf_ppa.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/inf_ppa.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/inf_ppa.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/inf_ppa.c	2017-09-23 03:42:49.822675663 +0800
@@ -0,0 +1,59 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifdef INF_PPA_SUPPORT
+
+#include "rt_config.h"
+#include <linux/skbuff.h>
+#include <linux/netdevice.h>
+
+extern INT rt28xx_send_packets(
+	IN struct sk_buff		*skb_p,
+	IN struct net_device	*net_dev);
+
+int ifx_ra_start_xmit(
+	struct net_device *rx_dev,
+	struct net_device *tx_dev,
+	struct sk_buff *skb, int len)
+{
+	if(tx_dev != NULL)
+	{
+		SET_OS_PKT_NETDEV(skb, tx_dev);
+		rt28xx_send_packets(skb, tx_dev);
+	}
+	else if(rx_dev != NULL)
+	{
+		skb->protocol = eth_type_trans(skb, skb->dev);
+		netif_rx(skb);
+	}
+	else
+	{
+		dev_kfree_skb_any(skb);
+	}
+	return 0;
+}
+#endif /* INF_PPA_SUPPORT */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile	2017-09-23 03:42:49.822675663 +0800
@@ -0,0 +1,375 @@
+include $(RT28xx_DIR)/os/linux/config.mk
+
+
+#ifdef CONFIG_STA_SUPPORT
+ifeq ($(RT28xx_MODE), STA)
+MOD_NAME = rt$(CHIPSET)sta
+DAT_PATH = /etc/Wireless/RT$(CHIPSET_DAT)STA
+DAT_FILE_NAME = RT$(CHIPSET_DAT)STA.dat
+endif
+#endif // CONFIG_STA_SUPPORT //
+
+
+#obj-m := $(MOD_NAME).o
+obj-$(CONFIG_RT3070_LS1B) := $(MOD_NAME).o
+
+
+#ifdef CONFIG_STA_SUPPORT
+rt$(CHIPSET)sta-objs := \
+	../../common/crypt_md5.o\
+	../../common/crypt_sha2.o\
+	../../common/crypt_hmac.o\
+	../../common/crypt_aes.o\
+	../../common/crypt_arc4.o\
+	../../common/mlme.o\
+	../../common/cmm_wep.o\
+	../../common/action.o\
+	../../common/cmm_data.o\
+	../../common/rtmp_init.o\
+	../../common/rtmp_init_inf.o\
+	../../common/cmm_tkip.o\
+	../../common/cmm_aes.o\
+	../../common/cmm_sync.o\
+	../../common/eeprom.o\
+	../../common/cmm_sanity.o\
+	../../common/cmm_info.o\
+	../../common/cmm_cfg.o\
+	../../common/cmm_wpa.o\
+	../../common/dfs.o\
+	../../common/spectrum.o\
+	../../common/rtmp_timer.o\
+	../../common/rt_channel.o\
+	../../common/cmm_profile.o\
+	../../common/cmm_asic.o\
+	../../common/cmm_cmd.o\
+	../../os/linux/rt_profile.o\
+	../../chips/rtmp_chip.o\
+	../../sta/assoc.o\
+	../../sta/auth.o\
+	../../sta/auth_rsp.o\
+	../../sta/sync.o\
+	../../sta/sanity.o\
+	../../sta/rtmp_data.o\
+	../../sta/connect.o\
+	../../sta/wpa.o\
+	../../sta/ags.o\
+	../../sta/sta_cfg.o
+
+ifeq ($(OSABL),NO)
+rt$(CHIPSET)sta-objs += \
+	../../common/rt_os_util.o\
+	../../os/linux/sta_ioctl.o\
+	../../os/linux/rt_linux.o\
+	../../os/linux/rt_main_dev.o
+else
+rt$(CHIPSET)sta-objs += \
+	../../os/linux/rt_symb.o
+endif
+
+#ifdef DOT11_N_SUPPORT
+ifeq ($(HAS_DOT11_N_SUPPORT),y)
+rt$(CHIPSET)sta-objs += \
+	../../common/ba_action.o
+endif
+#endif // DOT11_N_SUPPORT //
+
+#ifdef ETH_CONVERT
+ifeq ($(HAS_ETH_CONVERT_SUPPORT), y)
+rt$(CHIPSET)sta-objs += \
+	../../common/cmm_mat.o \
+	../../common/cmm_mat_iparp.o \
+	../../common/cmm_mat_pppoe.o \
+	../../common/cmm_mat_ipv6.o
+endif
+#endif // ETH_CONVERT //
+
+
+
+
+
+ifeq ($(HAS_BLOCK_NET_IF),y)
+rt$(CHIPSET)sta-objs += ../../common/netif_block.o
+endif
+
+ifeq ($(HAS_QOS_DLS_SUPPORT),y)
+rt$(CHIPSET)sta-objs += ../../sta/dls.o
+endif
+
+
+
+#ifdef LED_CONTROL_SUPPORT
+ifeq ($(HAS_LED_CONTROL_SUPPORT),y)
+rt$(CHIPSET)sta-objs += \
+	../../common/rt_led.o
+endif
+#endif // LED_CONTROL_SUPPORT //
+
+
+
+#ifdef RT5350
+ifeq ($(CHIPSET),5350)
+rt$(CHIPSET)sta-objs += \
+	../../common/cmm_mac_pci.o\
+	../../common/cmm_data_pci.o\
+	../../common/ee_flash.o\
+	../../common/rtmp_swmcu.o\
+	../../common/rt_rf.o\
+	../../chips/rt305x.o\
+	../../chips/rt5350.o
+
+ifeq ($(OSABL),NO)
+rt$(CHIPSET)sta-objs += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/rt_proc.o\
+	../../os/linux/rt_rbus_pci_util.o\
+	../../os/linux/rt_rbus_pci_drv.o\
+	../../os/linux/rbus_main_dev.o
+endif
+endif
+#endif // RT5350 //
+
+
+
+#ifdef RT3070
+ifeq ($(CHIPSET),2070)
+rt$(CHIPSET)sta-objs += \
+	../../common/cmm_mac_usb.o\
+	../../common/rtusb_io.o\
+	../../common/rtusb_data.o\
+	../../common/cmm_data_usb.o\
+	../../common/ee_prom.o\
+	../../common/ee_efuse.o\
+	../../common/rtmp_mcu.o\
+	../../chips/rt30xx.o\
+	../../common/rt_rf.o\
+	../../common/rtusb_bulk.o\
+	../../os/linux/rt_usb.o\
+	../../chips/rt3070.o
+
+ifeq ($(OSABL),NO)
+rt$(CHIPSET)sta-objs += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/rt_usb_util.o\
+	../../os/linux/usb_main_dev.o
+endif
+endif
+
+ifeq ($(CHIPSET),3070)
+rt$(CHIPSET)sta-objs += \
+	../../common/cmm_mac_usb.o\
+	../../common/rtusb_io.o\
+	../../common/rtusb_data.o\
+	../../common/cmm_data_usb.o\
+	../../common/ee_prom.o\
+	../../common/ee_efuse.o\
+	../../common/rtmp_mcu.o\
+	../../chips/rt30xx.o\
+	../../common/rt_rf.o\
+	../../common/rtusb_bulk.o\
+	../../os/linux/rt_usb.o\
+	../../chips/rt3070.o
+
+ifeq ($(OSABL),NO)
+rt$(CHIPSET)sta-objs += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/rt_usb_util.o\
+	../../os/linux/usb_main_dev.o
+endif
+endif
+#endif // RT3070 //
+
+
+
+
+#ifdef RT3370
+ifeq ($(CHIPSET),3370)
+rt$(CHIPSET)sta-objs += \
+	../../common/cmm_mac_usb.o\
+	../../common/rtusb_io.o\
+	../../common/rtusb_data.o\
+	../../common/cmm_data_usb.o\
+	../../common/rtusb_bulk.o\
+	../../common/ee_prom.o\
+	../../common/ee_efuse.o\
+	../../common/rtmp_mcu.o\
+	../../common/rt_rf.o\
+	../../chips/rt3070.o\
+	../../chips/rt30xx.o\
+	../../chips/rt33xx.o\
+	../../chips/rt3370.o
+
+ifeq ($(OSABL),NO)
+rt$(CHIPSET)sta-objs += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/rt_usb.o\
+	../../os/linux/rt_usb_util.o\
+	../../os/linux/usb_main_dev.o
+endif
+endif
+#endif // RT3370 //
+
+
+#ifdef RT5370
+ifeq ($(CHIPSET),5370)
+rt$(CHIPSET)sta-objs += \
+        ../../common/cmm_mac_usb.o\
+        ../../common/rtusb_io.o\
+        ../../common/rtusb_data.o\
+        ../../common/cmm_data_usb.o\
+        ../../common/rtusb_bulk.o\
+        ../../common/ee_prom.o\
+        ../../common/ee_efuse.o\
+        ../../common/rtmp_mcu.o\
+        ../../common/rt_rf.o\
+	../../os/linux/rt_usb.o\
+	../../common/frq_cal.o\
+        ../../chips/rt3070.o\
+        ../../chips/rt30xx.o\
+        ../../chips/rt33xx.o\
+        ../../chips/rt3370.o\
+	../../chips/rt5390.o
+
+ifeq ($(OSABL),NO)
+rt$(CHIPSET)sta-objs += \
+        ../../common/rtusb_dev_id.o\
+        ../../os/linux/rt_usb_util.o\
+        ../../os/linux/usb_main_dev.o
+endif
+endif
+#endif // RT5370 //
+
+ifeq ($(CHIPSET),PCI)
+rt$(CHIPSET)sta-objs += \
+	../../common/cmm_mac_pci.o\
+	../../common/cmm_data_pci.o\
+	../../os/linux/rt_rbus_pci_drv.o\
+	../../common/rtmp_mcu.o\
+	../../common/ee_prom.o\
+	../../common/ee_efuse.o\
+	../../common/rt_rf.o\
+	../../chips/rt28xx.o\
+	../../chips/rt30xx.o\
+	../../chips/rt35xx.o\
+	../../chips/rt3090.o\
+	../../chips/rt33xx.o\
+	../../chips/rt3390.o\
+	../../chips/rt5390.o
+
+ifeq ($(OSABL),NO)
+rt$(CHIPSET)sta-objs += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/rt_rbus_pci_util.o\
+	../../os/linux/pci_main_dev.o
+endif
+endif
+
+ifeq ($(CHIPSET),USB)
+rt$(CHIPSET)sta-objs += \
+	../../common/cmm_mac_usb.o\
+	../../common/rtusb_io.o\
+	../../common/rtusb_data.o\
+	../../common/cmm_data_usb.o\
+	../../common/ee_prom.o\
+	../../common/ee_efuse.o\
+	../../common/rtmp_mcu.o\
+	../../common/rt_rf.o\
+	../../common/rtusb_bulk.o\
+	../../os/linux/rt_usb.o\
+	../../chips/rt28xx.o\
+	../../chips/rt3070.o\
+	../../chips/rt30xx.o\
+	../../chips/rt33xx.o\
+	../../chips/rt35xx.o\
+	../../chips/rt3370.o\
+	../../chips/rt5390.o
+
+ifeq ($(OSABL),NO)
+rt$(CHIPSET)sta-objs += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/rt_usb_util.o\
+	../../os/linux/usb_main_dev.o
+endif
+endif
+
+ifeq ($(HAS_ATE),y)
+rt$(CHIPSET)sta-objs += ../../common/rt_ate.o
+endif
+
+
+
+
+
+
+
+#ifdef CRDA_SUPPORT
+ifeq ($(OSABL),NO)
+ifeq ($(HAS_CFG80211_SUPPORT),y)
+rt$(CHIPSET)sta-objs += \
+	../../os/linux/cfg80211.o \
+	../../os/linux/cfg80211drv.o
+endif
+endif
+
+ifeq ($(OSABL),YES)
+ifeq ($(HAS_CFG80211_SUPPORT),y)
+rt$(CHIPSET)sta-objs += \
+	../../os/linux/cfg80211drv.o
+endif
+endif
+#endif // CRDA_SUPPORT //
+
+
+#endif // CONFIG_STA_SUPPORT //
+
+
+
+PHONY := clean install uninstall
+
+clean:
+	rm -f ../../common/*.o
+	rm -f ../../common/.*.{cmd,flags,d}
+	rm -f ../../os/linux/*.{o,ko,mod.{o,c}}
+	rm -f ../../os/linux/.*.{cmd,flags,d}
+	rm -fr ../../os/linux/.tmp_versions
+#Must clean Module.symvers; or you will suffer symbol version not match
+#when OS_ABL = YES.
+	rm -f ../../os/linux/Module.symvers
+	rm -f ../../os/linux/Modules.symvers
+	rm -f ../../os/linux/Module.markers
+	rm -f ../../os/linux/modules.order
+	rm -f ../../chips/*.o
+	rm -f ../../chips/.*.{cmd,flags,d}
+ifeq ($(RT28xx_MODE),AP)
+	rm -f ../../ap/*.o
+	rm -f ../../ap/.*.{cmd,flags,d}
+else
+ifeq ($(RT28xx_MODE),STA)
+	rm -f ../../sta/*.o
+	rm -f ../../sta/.*.{cmd,flags,d}
+else
+ifeq ($(RT28xx_MODE),APSTA)
+	rm -f ../../ap/*.o
+	rm -f ../../ap/.*.{cmd,flags,d}
+	rm -f ../../sta/*.o
+	rm -f ../../sta/.*.{cmd,flags,d}
+endif
+endif
+endif
+
+install:
+	rm -rf $(DAT_PATH)
+	$(shell [ ! -f /etc/Wireless ] && mkdir /etc/Wireless)
+	mkdir $(DAT_PATH)
+	cp $(RT28xx_DIR)/$(DAT_FILE_NAME) $(DAT_PATH)/.
+	install -d $(LINUX_SRC_MODULE)
+	install -m 644 -c $(addsuffix .ko,$(MOD_NAME)) $(LINUX_SRC_MODULE)
+	/sbin/depmod -a ${shell uname -r}
+
+uninstall:
+#	rm -rf $(DAT_PATH)
+	rm -rf $(addprefix $(LINUX_SRC_MODULE),$(addsuffix .ko,$(MOD_NAME)))
+	/sbin/depmod -a ${shell uname -r}
+
+# Declare the contents of the .PHONY variable as phony.  We keep that
+# information in a variable so we can use it in if_changed and friends.
+.PHONY: $(PHONY)
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.4 linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.4
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.4	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.4	2017-09-23 03:42:49.822675663 +0800
@@ -0,0 +1,285 @@
+include $(RT28xx_DIR)/os/linux/config.mk
+
+
+#ifdef CONFIG_STA_SUPPORT
+ifeq ($(RT28xx_MODE), STA)
+MOD_NAME = rt$(CHIPSET)sta
+DAT_PATH = /etc/Wireless/RT$(CHIPSET_DAT)STA
+DAT_FILE_NAME = RT$(CHIPSET_DAT)STA.dat
+endif
+#endif // CONFIG_STA_SUPPORT //
+
+
+
+OBJ := $(MOD_NAME).o
+
+
+#ifdef CONFIG_STA_SUPPORT
+RT28XX_STA_OBJ := \
+	$(RT28xx_DIR)/common/crypt_md5.o\
+	$(RT28xx_DIR)/common/crypt_sha2.o\
+	$(RT28xx_DIR)/common/crypt_hmac.o\
+	$(RT28xx_DIR)/common/crypt_aes.o\
+	$(RT28xx_DIR)/common/crypt_arc4.o\
+	$(RT28xx_DIR)/common/mlme.o\
+	$(RT28xx_DIR)/common/cmm_wep.o\
+	$(RT28xx_DIR)/common/action.o\
+	$(RT28xx_DIR)/common/cmm_data.o\
+	$(RT28xx_DIR)/common/rtmp_init.o\
+	$(RT28xx_DIR)/common/rtmp_init_inf.o\
+	$(RT28xx_DIR)/common/cmm_tkip.o\
+	$(RT28xx_DIR)/common/cmm_aes.o\
+	$(RT28xx_DIR)/common/cmm_sync.o\
+	$(RT28xx_DIR)/common/eeprom.o\
+	$(RT28xx_DIR)/common/cmm_sanity.o\
+	$(RT28xx_DIR)/common/cmm_info.o\
+	$(RT28xx_DIR)/common/cmm_cfg.o\
+	$(RT28xx_DIR)/common/cmm_wpa.o\
+	$(RT28xx_DIR)/common/dfs.o\
+	$(RT28xx_DIR)/common/spectrum.o\
+	$(RT28xx_DIR)/common/rtmp_timer.o\
+	$(RT28xx_DIR)/common/rt_channel.o\
+	$(RT28xx_DIR)/common/cmm_profile.o\
+	$(RT28xx_DIR)/common/cmm_asic.o\
+	$(RT28xx_DIR)/common/cmm_cmd.o\
+	$(RT28xx_DIR)/os/linux/rt_profile.o\
+	$(RT28xx_DIR)/chips/rtmp_chip.o\
+	$(RT28xx_DIR)/sta/assoc.o\
+	$(RT28xx_DIR)/sta/auth.o\
+	$(RT28xx_DIR)/sta/auth_rsp.o\
+	$(RT28xx_DIR)/sta/sync.o\
+	$(RT28xx_DIR)/sta/sanity.o\
+	$(RT28xx_DIR)/sta/rtmp_data.o\
+	$(RT28xx_DIR)/sta/connect.o\
+	$(RT28xx_DIR)/sta/wpa.o\
+	$(RT28xx_DIR)/sta/ags.o\
+	$(RT28xx_DIR)/sta/sta_cfg.o
+
+ifeq ($(OSABL),NO)
+RT28XX_STA_OBJ += \
+	$(RT28xx_DIR)/common/rt_os_util.o\
+	$(RT28xx_DIR)/os/linux/sta_ioctl.o\
+	$(RT28xx_DIR)/os/linux/rt_linux.o\
+	$(RT28xx_DIR)/os/linux/rt_main_dev.o
+else
+RT28XX_STA_OBJ += \
+	$(RT28xx_DIR)/os/linux/rt_symb.o
+endif
+
+#ifdef DOT11_N_SUPPORT
+ifeq ($(HAS_DOT11_N_SUPPORT),y)
+RT28XX_STA_OBJ += \
+	$(RT28xx_DIR)/common/ba_action.o
+endif
+#endif // DOT11_N_SUPPORT //
+
+#ifdef ETH_CONVERT
+ifeq ($(HAS_ETH_CONVERT_SUPPORT), y)
+RT28XX_STA_OBJ += \
+	$(RT28xx_DIR)/common/cmm_mat.o \
+	$(RT28xx_DIR)/common/cmm_mat_iparp.o \
+	$(RT28xx_DIR)/common/cmm_mat_pppoe.o \
+	$(RT28xx_DIR)/common/cmm_mat_ipv6.o
+endif
+#endif // ETH_CONVERT //
+
+
+
+
+ifeq ($(HAS_BLOCK_NET_IF),y)
+RT28XX_STA_OBJ += $(RT28xx_DIR)/common/netif_block.o
+endif
+
+ifeq ($(HAS_QOS_DLS_SUPPORT),y)
+RT28XX_STA_OBJ += $(RT28xx_DIR)/sta/dls.o
+endif
+
+
+#ifdef LED_CONTROL_SUPPORT
+ifeq ($(HAS_LED_CONTROL_SUPPORT),y)
+RT28XX_STA_OBJ += \
+	$(RT28xx_DIR)/common/rt_led.o
+endif
+#endif // LED_CONTROL_SUPPORT //
+
+
+
+
+#ifdef RT3070
+ifeq ($(CHIPSET),2070)
+RT28XX_STA_OBJ += \
+	$(RT28xx_DIR)/common/cmm_mac_usb.o\
+	$(RT28xx_DIR)/common/rtusb_io.o\
+	$(RT28xx_DIR)/common/rtusb_data.o\
+	$(RT28xx_DIR)/common/cmm_data_usb.o\
+	$(RT28xx_DIR)/common/ee_prom.o\
+	$(RT28xx_DIR)/common/ee_efuse.o\
+	$(RT28xx_DIR)/common/rtmp_mcu.o\
+	$(RT28xx_DIR)/chips/rt30xx.o\
+	$(RT28xx_DIR)/common/rt_rf.o\
+	$(RT28xx_DIR)/common/rtusb_bulk.o\
+	$(RT28xx_DIR)/os/linux/rt_usb.o\
+	$(RT28xx_DIR)/chips/rt3070.o
+
+ifeq ($(OSABL),NO)
+RT28XX_STA_OBJ += \
+	$(RT28xx_DIR)/common/rtusb_dev_id.o\
+	$(RT28xx_DIR)/os/linux/rt_usb_util.o\
+	$(RT28xx_DIR)/os/linux/usb_main_dev.o
+endif
+endif
+
+ifeq ($(CHIPSET),3070)
+RT28XX_STA_OBJ += \
+	$(RT28xx_DIR)/common/cmm_mac_usb.o\
+	$(RT28xx_DIR)/common/rtusb_io.o\
+	$(RT28xx_DIR)/common/rtusb_data.o\
+	$(RT28xx_DIR)/common/cmm_data_usb.o\
+	$(RT28xx_DIR)/common/ee_prom.o\
+	$(RT28xx_DIR)/common/ee_efuse.o\
+	$(RT28xx_DIR)/common/rtmp_mcu.o\
+	$(RT28xx_DIR)/chips/rt30xx.o\
+	$(RT28xx_DIR)/common/rt_rf.o\
+	$(RT28xx_DIR)/common/rtusb_bulk.o\
+	$(RT28xx_DIR)/os/linux/rt_usb.o\
+	$(RT28xx_DIR)/chips/rt3070.o
+
+ifeq ($(OSABL),NO)
+RT28XX_STA_OBJ += \
+	$(RT28xx_DIR)/common/rtusb_dev_id.o\
+	$(RT28xx_DIR)/os/linux/rt_usb_util.o\
+	$(RT28xx_DIR)/os/linux/usb_main_dev.o
+endif
+endif
+#endif // RT3070 //
+
+
+
+#ifdef RT3370
+ifeq ($(CHIPSET),3370)
+RT28XX_STA_OBJ += \
+	$(RT28xx_DIR)/common/cmm_mac_usb.o\
+	$(RT28xx_DIR)/common/rtusb_io.o\
+	$(RT28xx_DIR)/common/rtusb_data.o\
+	$(RT28xx_DIR)/common/cmm_data_usb.o\
+	$(RT28xx_DIR)/common/rtusb_bulk.o\
+	$(RT28xx_DIR)/common/ee_prom.o\
+	$(RT28xx_DIR)/common/ee_efuse.o\
+	$(RT28xx_DIR)/common/rtmp_mcu.o\
+	$(RT28xx_DIR)/common/rt_rf.o\
+	$(RT28xx_DIR)/os/linux/rt_usb.o\
+	$(RT28xx_DIR)/chips/rt3070.o\
+	$(RT28xx_DIR)/chips/rt30xx.o\
+	$(RT28xx_DIR)/chips/rt33xx.o\
+	$(RT28xx_DIR)/chips/rt3370.o
+
+ifeq ($(OSABL),NO)
+RT28XX_STA_OBJ += \
+	$(RT28xx_DIR)/common/rtusb_dev_id.o\
+	$(RT28xx_DIR)/os/linux/rt_usb_util.o\
+	$(RT28xx_DIR)/os/linux/usb_main_dev.o
+endif
+endif
+#endif // RT3370 //
+
+
+#ifdef RT5370
+ifeq ($(CHIPSET),5370)
+RT28XX_STA_OBJ += \
+        $(RT28xx_DIR)/common/cmm_mac_usb.o\
+        $(RT28xx_DIR)/common/rtusb_io.o\
+        $(RT28xx_DIR)/common/rtusb_data.o\
+        $(RT28xx_DIR)/common/cmm_data_usb.o\
+        $(RT28xx_DIR)/common/rtusb_bulk.o\
+        $(RT28xx_DIR)/common/ee_prom.o\
+        $(RT28xx_DIR)/common/ee_efuse.o\
+        $(RT28xx_DIR)/common/rtmp_mcu.o\
+        $(RT28xx_DIR)/common/rt_rf.o\
+	$(RT28xx_DIR)/os/linux/rt_usb.o\
+        $(RT28xx_DIR)/chips/rt3070.o\
+        $(RT28xx_DIR)/chips/rt30xx.o\
+        $(RT28xx_DIR)/chips/rt33xx.o\
+        $(RT28xx_DIR)/chips/rt3370.o\
+	$(RT28xx_DIR)/chips/rt5390.o
+
+ifeq ($(OSABL),NO)
+RT28XX_STA_OBJ += \
+        $(RT28xx_DIR)/common/rtusb_dev_id.o\
+        $(RT28xx_DIR)/os/linux/rt_usb_util.o\
+        $(RT28xx_DIR)/os/linux/usb_main_dev.o
+endif
+endif
+#endif // RT5370 //
+
+ifeq ($(HAS_ATE),y)
+RT28XX_STA_OBJ += $(RT28xx_DIR)/common/rt_ate.o
+endif
+
+
+
+
+
+
+
+#endif // CONFIG_STA_SUPPORT //
+
+
+PHONY := all release clean install uninstall
+
+all:$(OBJ)
+
+rt$(CHIPSET)sta.o: $(RT28XX_STA_OBJ)
+	$(LD) -r $^ -o $@
+
+rt$(CHIPSET)ap.o: $(RT28XX_AP_OBJ)
+	$(LD) -r $^ -o $@
+
+rt$(CHIPSET)apsta.o: $(RT28XX_APSTA_OBJ)
+	$(LD) -r $^ -o $@
+
+release:
+	echo "MAKE Linux Station Code Release"
+
+clean:
+	rm -f $(RT28xx_DIR)/common/*.o
+	rm -f $(RT28xx_DIR)/common/.*.{cmd,flags,d}
+	rm -f $(RT28xx_DIR)/os/linux/*.{o,ko,mod.{o,c}}
+	rm -f $(RT28xx_DIR)/os/linux/.*.{cmd,flags,d}
+	rm -fr $(RT28xx_DIR)/os/linux/.tmp_versions
+	rm -f $(RT28xx_DIR)/chips/*.o
+	rm -f $(RT28xx_DIR)/chips/.*.{cmd,flags,d}
+ifeq ($(RT28xx_MODE),AP)
+	rm -f $(RT28xx_DIR)/ap/*.o
+	rm -f $(RT28xx_DIR)/ap/.*.{cmd,flags,d}
+else
+ifeq ($(RT28xx_MODE),STA)
+	rm -f $(RT28xx_DIR)/sta/*.o
+	rm -f $(RT28xx_DIR)/sta/.*.{cmd,flags,d}
+else
+ifeq ($(RT28xx_MODE),APSTA)
+	rm -f $(RT28xx_DIR)/ap/*.o
+	rm -f $(RT28xx_DIR)/ap/.*.{cmd,flags,d}
+	rm -f $(RT28xx_DIR)/sta/*.o
+	rm -f $(RT28xx_DIR)/sta/.*.{cmd,flags,d}
+endif
+endif
+endif
+
+install:
+	rm -rf $(DAT_PATH)
+	$(shell [ ! -f /etc/Wireless ] && mkdir /etc/Wireless)
+	mkdir $(DAT_PATH)
+	cp $(RT28xx_DIR)/$(DAT_FILE_NAME) $(DAT_PATH)/.
+	install -d $(LINUX_SRC_MODULE)
+	install -m 644 -c $(addsuffix .o,$(MOD_NAME)) $(LINUX_SRC_MODULE)
+	/sbin/depmod -a ${shell uname -r}
+
+uninstall:
+#	rm -rf $(DAT_PATH)
+	rm -rf $(addprefix $(LINUX_SRC_MODULE),$(addsuffix .o,$(MOD_NAME)))
+	/sbin/depmod -a ${shell uname -r}
+
+# Declare the contents of the .PHONY variable as phony.  We keep that
+# information in a variable so we can use it in if_changed and friends.
+.PHONY: $(PHONY)
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.4.netif linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.4.netif
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.4.netif	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.4.netif	2017-09-23 03:42:49.822675663 +0800
@@ -0,0 +1,375 @@
+include $(RT28xx_DIR)/os/linux/config.mk
+
+#ifdef CONFIG_AP_SUPPORT
+ifeq ($(RT28xx_MODE),AP)
+MOD_NAME = rtnet$(CHIPSET)ap
+endif
+#endif // CONFIG_AP_SUPPORT //
+
+#ifdef CONFIG_STA_SUPPORT
+ifeq ($(RT28xx_MODE), STA)
+MOD_NAME = rtnet$(CHIPSET)sta
+endif
+#endif // CONFIG_STA_SUPPORT //
+
+#ifdef CONFIG_APSTA_SUPPORT
+ifeq ($(RT28xx_MODE), APSTA)
+MOD_NAME = rtnet$(CHIPSET)apsta
+endif
+#endif // CONFIG_APSTA_SUPPORT //
+
+OBJ := $(MOD_NAME).o
+
+#ifdef CONFIG_AP_SUPPORT
+
+RT28XX_AP_OBJ := \
+	../../ap/ap_mbss_inf.o\
+	../../os/linux/ap_ioctl.o\
+	../../os/linux/rt_main_dev.o
+
+ifeq ($(HAS_WDS),y)
+RT28XX_AP_OBJ += \
+	../../ap/ap_wds_inf.o
+endif
+
+ifeq ($(HAS_APCLI),y)
+RT28XX_AP_OBJ += \
+	../../ap/ap_apcli_inf.o
+endif
+
+ifeq ($(HAS_MESH_SUPPORT),y)
+RT28XX_AP_OBJ += \
+	../../common/mesh_inf.o
+endif
+
+#ifdef RT2860
+ifeq ($(CHIPSET),2860)
+RT28XX_AP_OBJ += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3090
+ifeq ($(CHIPSET),3090)
+RT28XX_AP_OBJ += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT2870
+ifeq ($(CHIPSET),2870)
+RT28XX_AP_OBJ += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT2070
+ifeq ($(CHIPSET),2070)
+RT28XX_AP_OBJ += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT3070
+ifeq ($(CHIPSET),3070)
+RT28XX_AP_OBJ += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT2880
+ifeq ($(CHIPSET),2880)
+RT28XX_AP_OBJ += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3572
+ifeq ($(CHIPSET),3572)
+RT28XX_AP_OBJ += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT3062
+ifeq ($(CHIPSET),3062)
+RT28XX_AP_OBJ += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3562
+ifeq ($(CHIPSET),3562)
+RT28XX_AP_OBJ += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3593
+ifeq ($(CHIPSET),3593)
+RT28XX_AP_OBJ += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3390
+ifeq ($(CHIPSET),3390)
+RT28XX_AP_OBJ += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3370
+ifeq ($(CHIPSET),3370)
+RT28XX_AP_OBJ += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT5370
+ifeq ($(CHIPSET),5370)
+RT28XX_AP_OBJ += \
+        ../../common/rtusb_dev_id.o\
+        ../../os/linux/usb_main_dev.o
+endif
+
+#endif // CONFIG_AP_SUPPORT //
+
+#ifdef CONFIG_STA_SUPPORT
+RT28XX_STA_OBJ := \
+	../../os/linux/sta_ioctl.o\
+	../../os/linux/rt_main_dev.o
+
+ifeq ($(HAS_MESH_SUPPORT),y)
+RT28XX_STA_OBJ += \
+	../../common/mesh_inf.o
+endif
+
+ifeq ($(HAS_P2P_SUPPORT), y)
+RT28XX_STA_OBJ += \
+	../../common/p2p_inf.o\
+	../../os/linux/ap_ioctl.o
+endif
+
+#ifdef RT2860
+ifeq ($(CHIPSET),2860)
+RT28XX_STA_OBJ += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3090
+ifeq ($(CHIPSET),3090)
+RT28XX_STA_OBJ += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT2870
+ifeq ($(CHIPSET),2870)
+RT28XX_STA_OBJ += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT2070
+ifeq ($(CHIPSET),2070)
+RT28XX_STA_OBJ += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT3070
+ifeq ($(CHIPSET),3070)
+RT28XX_STA_OBJ += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT2880
+ifeq ($(CHIPSET),2880)
+RT28XX_STA_OBJ += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3572
+ifeq ($(CHIPSET),3572)
+RT28XX_STA_OBJ += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT3062
+ifeq ($(CHIPSET),3062)
+RT28XX_STA_OBJ += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3562
+ifeq ($(CHIPSET),3562)
+RT28XX_STA_OBJ += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3593
+ifeq ($(CHIPSET),3593)
+RT28XX_STA_OBJ += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3390
+ifeq ($(CHIPSET),3390)
+RT28XX_STA_OBJ += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3370
+ifeq ($(CHIPSET),3370)
+RT28XX_STA_OBJ += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT5370
+ifeq ($(CHIPSET),5370)
+RT28XX_STA_OBJ += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/usb_main_dev.o
+endif
+
+#endif // CONFIG_STA_SUPPORT //
+
+#ifdef CONFIG_APSTA_SUPPORT
+RT28XX_APSTA_OBJ := \
+	../../ap/ap_mbss_inf.o\
+	../../common/p2p_inf.o\
+	../../os/linux/ap_ioctl.o\
+	../../os/linux/sta_ioctl.o\
+	../../os/linux/rt_main_dev.o
+
+ifeq ($(HAS_WDS),y)
+RT28XX_APSTA_OBJ += \
+	../../ap/ap_wds_inf.o
+endif
+
+ifeq ($(HAS_APCLI),y)
+RT28XX_APSTA_OBJ += \
+	../../ap/ap_apcli_inf.o
+endif
+
+ifeq ($(HAS_MESH_SUPPORT),y)
+RT28XX_APSTA_OBJ += \
+	../../common/mesh_inf.o
+endif
+
+#ifdef RT2860
+ifeq ($(CHIPSET),2860)
+RT28XX_APSTA_OBJ += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3090
+ifeq ($(CHIPSET),3090)
+RT28XX_APSTA_OBJ += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT2870
+ifeq ($(CHIPSET),2870)
+RT28XX_APSTA_OBJ += \
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT2070
+ifeq ($(CHIPSET),2070)
+RT28XX_APSTA_OBJ += \
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT3070
+ifeq ($(CHIPSET),3070)
+RT28XX_APSTA_OBJ += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT3390
+ifeq ($(CHIPSET),3390)
+RT28XX_APSTA_OBJ += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3370
+ifeq ($(CHIPSET),3370)
+RT28XX_APSTA_OBJ += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT5370
+ifeq ($(CHIPSET),5370)
+RT28XX_APSTA_OBJ += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/usb_main_dev.o
+endif
+
+#endif // CONFIG_APSTA_SUPPORT //
+
+PHONY := all clean
+
+all:$(OBJ)
+
+rtnet$(CHIPSET)sta.o: $(RT28XX_STA_OBJ)
+	$(LD) -r $^ -o $@
+
+rtnet$(CHIPSET)ap.o: $(RT28XX_AP_OBJ)
+	$(LD) -r $^ -o $@
+
+rtnet$(CHIPSET)apsta.o: $(RT28XX_APSTA_OBJ)
+	$(LD) -r $^ -o $@
+
+clean:
+	rm -f $(RT28xx_DIR)/common/*.o
+	rm -f $(RT28xx_DIR)/common/.*.{cmd,flags,d}
+	rm -f $(RT28xx_DIR)/os/linux/*.{o,ko,mod.{o,c}}
+	rm -f $(RT28xx_DIR)/os/linux/.*.{cmd,flags,d}
+	rm -fr $(RT28xx_DIR)/os/linux/.tmp_versions
+	rm -f $(RT28xx_DIR)/chips/*.o
+	rm -f $(RT28xx_DIR)/chips/.*.{cmd,flags,d}
+ifeq ($(RT28xx_MODE),AP)
+	rm -f $(RT28xx_DIR)/ap/*.o
+	rm -f $(RT28xx_DIR)/ap/.*.{cmd,flags,d}
+else
+ifeq ($(RT28xx_MODE),STA)
+	rm -f $(RT28xx_DIR)/sta/*.o
+	rm -f $(RT28xx_DIR)/sta/.*.{cmd,flags,d}
+else
+ifeq ($(RT28xx_MODE),APSTA)
+	rm -f $(RT28xx_DIR)/ap/*.o
+	rm -f $(RT28xx_DIR)/ap/.*.{cmd,flags,d}
+	rm -f $(RT28xx_DIR)/sta/*.o
+	rm -f $(RT28xx_DIR)/sta/.*.{cmd,flags,d}
+endif
+endif
+endif
+
+install:
+	install -d $(LINUX_SRC_MODULE)
+	install -m 644 -c $(addsuffix .o,$(MOD_NAME)) $(LINUX_SRC_MODULE)
+	/sbin/depmod -a ${shell uname -r}
+
+uninstall:
+	rm -rf $(addprefix $(LINUX_SRC_MODULE),$(addsuffix .o,$(MOD_NAME)))
+	/sbin/depmod -a ${shell uname -r}
+
+# Declare the contents of the .PHONY variable as phony.  We keep that
+# # information in a variable so we can use it in if_changed and friends.
+.PHONY: $(PHONY)
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.4.util linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.4.util
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.4.util	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.4.util	2017-09-23 03:42:49.822675663 +0800
@@ -0,0 +1,110 @@
+include $(RT28xx_DIR)/os/linux/config.mk
+
+#ifdef CONFIG_AP_SUPPORT
+ifeq ($(RT28xx_MODE),AP)
+MOD_NAME = rtutil$(CHIPSET)ap
+endif
+#endif // CONFIG_AP_SUPPORT //
+
+#ifdef CONFIG_STA_SUPPORT
+ifeq ($(RT28xx_MODE), STA)
+MOD_NAME = rtutil$(CHIPSET)sta
+endif
+#endif // CONFIG_STA_SUPPORT //
+
+#ifdef CONFIG_APSTA_SUPPORT
+ifeq ($(RT28xx_MODE), APSTA)
+MOD_NAME = rtutil$(CHIPSET)apsta
+endif
+#endif // CONFIG_APSTA_SUPPORT //
+
+OBJ := $(MOD_NAME).o
+
+#ifdef CONFIG_AP_SUPPORT
+
+RT28XX_AP_OBJ := \
+	../../common/rt_os_util.o\
+	../../os/linux/rt_linux_symb.o\
+	../../os/linux/rt_rbus_pci_util.o\
+	../../os/linux/rt_usb_util.o\
+	../../os/linux/rt_linux.o
+
+ifeq ($(HAS_BGFP_SUPPORT),y)
+RT28XX_AP_OBJ += \
+	$(RT28xx_DIR)/os/linux/br_ftph.o
+endif
+
+#endif // CONFIG_AP_SUPPORT //
+
+
+#ifdef CONFIG_STA_SUPPORT
+
+RT28XX_STA_OBJ := \
+	../../common/rt_os_util.o\
+	../../os/linux/rt_linux_symb.o\
+	../../os/linux/rt_rbus_pci_util.o\
+	../../os/linux/rt_usb_util.o\
+	../../os/linux/rt_linux.o
+#endif // CONFIG_STA_SUPPORT //
+
+
+#ifdef CONFIG_APSTA_SUPPORT
+RT28XX_APSTA_OBJ := \
+	../../common/rt_os_util.o\
+	../../os/linux/rt_linux_symb.o\
+	../../os/linux/rt_rbus_pci_util.o\
+	../../os/linux/rt_usb_util.o\
+	../../os/linux/rt_linux.o
+
+#endif // CONFIG_APSTA_SUPPORT //
+
+PHONY := all clean
+
+all:$(OBJ)
+
+rtutil$(CHIPSET)sta.o: $(RT28XX_STA_OBJ)
+	$(LD) -r $^ -o $@
+
+rtutil$(CHIPSET)ap.o: $(RT28XX_AP_OBJ)
+	$(LD) -r $^ -o $@
+
+rtutil$(CHIPSET)apsta.o: $(RT28XX_APSTA_OBJ)
+	$(LD) -r $^ -o $@
+
+clean:
+	rm -f $(RT28xx_DIR)/common/*.o
+	rm -f $(RT28xx_DIR)/common/.*.{cmd,flags,d}
+	rm -f $(RT28xx_DIR)/os/linux/*.{o,ko,mod.{o,c}}
+	rm -f $(RT28xx_DIR)/os/linux/.*.{cmd,flags,d}
+	rm -fr $(RT28xx_DIR)/os/linux/.tmp_versions
+	rm -f $(RT28xx_DIR)/chips/*.o
+	rm -f $(RT28xx_DIR)/chips/.*.{cmd,flags,d}
+ifeq ($(RT28xx_MODE),AP)
+	rm -f $(RT28xx_DIR)/ap/*.o
+	rm -f $(RT28xx_DIR)/ap/.*.{cmd,flags,d}
+else
+ifeq ($(RT28xx_MODE),STA)
+	rm -f $(RT28xx_DIR)/sta/*.o
+	rm -f $(RT28xx_DIR)/sta/.*.{cmd,flags,d}
+else
+ifeq ($(RT28xx_MODE),APSTA)
+	rm -f $(RT28xx_DIR)/ap/*.o
+	rm -f $(RT28xx_DIR)/ap/.*.{cmd,flags,d}
+	rm -f $(RT28xx_DIR)/sta/*.o
+	rm -f $(RT28xx_DIR)/sta/.*.{cmd,flags,d}
+endif
+endif
+endif
+
+install:
+	install -d $(LINUX_SRC_MODULE)
+	install -m 644 -c $(addsuffix .o,$(MOD_NAME)) $(LINUX_SRC_MODULE)
+	/sbin/depmod -a ${shell uname -r}
+
+uninstall:
+	rm -rf $(addprefix $(LINUX_SRC_MODULE),$(addsuffix .o,$(MOD_NAME)))
+	/sbin/depmod -a ${shell uname -r}
+
+# Declare the contents of the .PHONY variable as phony.  We keep that
+# # information in a variable so we can use it in if_changed and friends.
+.PHONY: $(PHONY)
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.6 linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.6
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.6	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.6	2017-09-23 03:42:49.822675663 +0800
@@ -0,0 +1,376 @@
+include $(RT28xx_DIR)/os/linux/config.mk
+
+
+
+#ifdef CONFIG_STA_SUPPORT
+ifeq ($(RT28xx_MODE), STA)
+MOD_NAME = rt$(CHIPSET)sta
+DAT_PATH = /etc/Wireless/RT$(CHIPSET_DAT)STA
+DAT_FILE_NAME = RT$(CHIPSET_DAT)STA.dat
+endif
+#endif // CONFIG_STA_SUPPORT //
+
+
+#obj-m := $(MOD_NAME).o
+obj-$(CONFIG_RT3070_LS1B) := $(MOD_NAME).o
+
+
+#ifdef CONFIG_STA_SUPPORT
+rt$(CHIPSET)sta-objs := \
+	../../common/crypt_md5.o\
+	../../common/crypt_sha2.o\
+	../../common/crypt_hmac.o\
+	../../common/crypt_aes.o\
+	../../common/crypt_arc4.o\
+	../../common/mlme.o\
+	../../common/cmm_wep.o\
+	../../common/action.o\
+	../../common/cmm_data.o\
+	../../common/rtmp_init.o\
+	../../common/rtmp_init_inf.o\
+	../../common/cmm_tkip.o\
+	../../common/cmm_aes.o\
+	../../common/cmm_sync.o\
+	../../common/eeprom.o\
+	../../common/cmm_sanity.o\
+	../../common/cmm_info.o\
+	../../common/cmm_cfg.o\
+	../../common/cmm_wpa.o\
+	../../common/dfs.o\
+	../../common/spectrum.o\
+	../../common/rtmp_timer.o\
+	../../common/rt_channel.o\
+	../../common/cmm_profile.o\
+	../../common/cmm_asic.o\
+	../../common/cmm_cmd.o\
+	../../os/linux/rt_profile.o\
+	../../chips/rtmp_chip.o\
+	../../sta/assoc.o\
+	../../sta/auth.o\
+	../../sta/auth_rsp.o\
+	../../sta/sync.o\
+	../../sta/sanity.o\
+	../../sta/rtmp_data.o\
+	../../sta/connect.o\
+	../../sta/wpa.o\
+	../../sta/ags.o\
+	../../sta/sta_cfg.o
+
+ifeq ($(OSABL),NO)
+rt$(CHIPSET)sta-objs += \
+	../../common/rt_os_util.o\
+	../../os/linux/sta_ioctl.o\
+	../../os/linux/rt_linux.o\
+	../../os/linux/rt_main_dev.o
+else
+rt$(CHIPSET)sta-objs += \
+	../../os/linux/rt_symb.o
+endif
+
+#ifdef DOT11_N_SUPPORT
+ifeq ($(HAS_DOT11_N_SUPPORT),y)
+rt$(CHIPSET)sta-objs += \
+	../../common/ba_action.o
+endif
+#endif // DOT11_N_SUPPORT //
+
+#ifdef ETH_CONVERT
+ifeq ($(HAS_ETH_CONVERT_SUPPORT), y)
+rt$(CHIPSET)sta-objs += \
+	../../common/cmm_mat.o \
+	../../common/cmm_mat_iparp.o \
+	../../common/cmm_mat_pppoe.o \
+	../../common/cmm_mat_ipv6.o
+endif
+#endif // ETH_CONVERT //
+
+
+
+
+
+ifeq ($(HAS_BLOCK_NET_IF),y)
+rt$(CHIPSET)sta-objs += ../../common/netif_block.o
+endif
+
+ifeq ($(HAS_QOS_DLS_SUPPORT),y)
+rt$(CHIPSET)sta-objs += ../../sta/dls.o
+endif
+
+
+
+#ifdef LED_CONTROL_SUPPORT
+ifeq ($(HAS_LED_CONTROL_SUPPORT),y)
+rt$(CHIPSET)sta-objs += \
+	../../common/rt_led.o
+endif
+#endif // LED_CONTROL_SUPPORT //
+
+
+
+#ifdef RT5350
+ifeq ($(CHIPSET),5350)
+rt$(CHIPSET)sta-objs += \
+	../../common/cmm_mac_pci.o\
+	../../common/cmm_data_pci.o\
+	../../common/ee_flash.o\
+	../../common/rtmp_swmcu.o\
+	../../common/rt_rf.o\
+	../../chips/rt305x.o\
+	../../chips/rt5350.o
+
+ifeq ($(OSABL),NO)
+rt$(CHIPSET)sta-objs += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/rt_proc.o\
+	../../os/linux/rt_rbus_pci_util.o\
+	../../os/linux/rt_rbus_pci_drv.o\
+	../../os/linux/rbus_main_dev.o
+endif
+endif
+#endif // RT5350 //
+
+
+
+#ifdef RT3070
+ifeq ($(CHIPSET),2070)
+rt$(CHIPSET)sta-objs += \
+	../../common/cmm_mac_usb.o\
+	../../common/rtusb_io.o\
+	../../common/rtusb_data.o\
+	../../common/cmm_data_usb.o\
+	../../common/ee_prom.o\
+	../../common/ee_efuse.o\
+	../../common/rtmp_mcu.o\
+	../../chips/rt30xx.o\
+	../../common/rt_rf.o\
+	../../common/rtusb_bulk.o\
+	../../os/linux/rt_usb.o\
+	../../chips/rt3070.o
+
+ifeq ($(OSABL),NO)
+rt$(CHIPSET)sta-objs += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/rt_usb_util.o\
+	../../os/linux/usb_main_dev.o
+endif
+endif
+
+ifeq ($(CHIPSET),3070)
+rt$(CHIPSET)sta-objs += \
+	../../common/cmm_mac_usb.o\
+	../../common/rtusb_io.o\
+	../../common/rtusb_data.o\
+	../../common/cmm_data_usb.o\
+	../../common/ee_prom.o\
+	../../common/ee_efuse.o\
+	../../common/rtmp_mcu.o\
+	../../chips/rt30xx.o\
+	../../common/rt_rf.o\
+	../../common/rtusb_bulk.o\
+	../../os/linux/rt_usb.o\
+	../../chips/rt3070.o
+
+ifeq ($(OSABL),NO)
+rt$(CHIPSET)sta-objs += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/rt_usb_util.o\
+	../../os/linux/usb_main_dev.o
+endif
+endif
+#endif // RT3070 //
+
+
+
+
+#ifdef RT3370
+ifeq ($(CHIPSET),3370)
+rt$(CHIPSET)sta-objs += \
+	../../common/cmm_mac_usb.o\
+	../../common/rtusb_io.o\
+	../../common/rtusb_data.o\
+	../../common/cmm_data_usb.o\
+	../../common/rtusb_bulk.o\
+	../../common/ee_prom.o\
+	../../common/ee_efuse.o\
+	../../common/rtmp_mcu.o\
+	../../common/rt_rf.o\
+	../../chips/rt3070.o\
+	../../chips/rt30xx.o\
+	../../chips/rt33xx.o\
+	../../chips/rt3370.o
+
+ifeq ($(OSABL),NO)
+rt$(CHIPSET)sta-objs += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/rt_usb.o\
+	../../os/linux/rt_usb_util.o\
+	../../os/linux/usb_main_dev.o
+endif
+endif
+#endif // RT3370 //
+
+
+#ifdef RT5370
+ifeq ($(CHIPSET),5370)
+rt$(CHIPSET)sta-objs += \
+        ../../common/cmm_mac_usb.o\
+        ../../common/rtusb_io.o\
+        ../../common/rtusb_data.o\
+        ../../common/cmm_data_usb.o\
+        ../../common/rtusb_bulk.o\
+        ../../common/ee_prom.o\
+        ../../common/ee_efuse.o\
+        ../../common/rtmp_mcu.o\
+        ../../common/rt_rf.o\
+	../../os/linux/rt_usb.o\
+	../../common/frq_cal.o\
+        ../../chips/rt3070.o\
+        ../../chips/rt30xx.o\
+        ../../chips/rt33xx.o\
+        ../../chips/rt3370.o\
+	../../chips/rt5390.o
+
+ifeq ($(OSABL),NO)
+rt$(CHIPSET)sta-objs += \
+        ../../common/rtusb_dev_id.o\
+        ../../os/linux/rt_usb_util.o\
+        ../../os/linux/usb_main_dev.o
+endif
+endif
+#endif // RT5370 //
+
+ifeq ($(CHIPSET),PCI)
+rt$(CHIPSET)sta-objs += \
+	../../common/cmm_mac_pci.o\
+	../../common/cmm_data_pci.o\
+	../../os/linux/rt_rbus_pci_drv.o\
+	../../common/rtmp_mcu.o\
+	../../common/ee_prom.o\
+	../../common/ee_efuse.o\
+	../../common/rt_rf.o\
+	../../chips/rt28xx.o\
+	../../chips/rt30xx.o\
+	../../chips/rt35xx.o\
+	../../chips/rt3090.o\
+	../../chips/rt33xx.o\
+	../../chips/rt3390.o\
+	../../chips/rt5390.o
+
+ifeq ($(OSABL),NO)
+rt$(CHIPSET)sta-objs += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/rt_rbus_pci_util.o\
+	../../os/linux/pci_main_dev.o
+endif
+endif
+
+ifeq ($(CHIPSET),USB)
+rt$(CHIPSET)sta-objs += \
+	../../common/cmm_mac_usb.o\
+	../../common/rtusb_io.o\
+	../../common/rtusb_data.o\
+	../../common/cmm_data_usb.o\
+	../../common/ee_prom.o\
+	../../common/ee_efuse.o\
+	../../common/rtmp_mcu.o\
+	../../common/rt_rf.o\
+	../../common/rtusb_bulk.o\
+	../../os/linux/rt_usb.o\
+	../../chips/rt28xx.o\
+	../../chips/rt3070.o\
+	../../chips/rt30xx.o\
+	../../chips/rt33xx.o\
+	../../chips/rt35xx.o\
+	../../chips/rt3370.o\
+	../../chips/rt5390.o
+
+ifeq ($(OSABL),NO)
+rt$(CHIPSET)sta-objs += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/rt_usb_util.o\
+	../../os/linux/usb_main_dev.o
+endif
+endif
+
+ifeq ($(HAS_ATE),y)
+rt$(CHIPSET)sta-objs += ../../common/rt_ate.o
+endif
+
+
+
+
+
+
+
+#ifdef CRDA_SUPPORT
+ifeq ($(OSABL),NO)
+ifeq ($(HAS_CFG80211_SUPPORT),y)
+rt$(CHIPSET)sta-objs += \
+	../../os/linux/cfg80211.o \
+	../../os/linux/cfg80211drv.o
+endif
+endif
+
+ifeq ($(OSABL),YES)
+ifeq ($(HAS_CFG80211_SUPPORT),y)
+rt$(CHIPSET)sta-objs += \
+	../../os/linux/cfg80211drv.o
+endif
+endif
+#endif // CRDA_SUPPORT //
+
+
+#endif // CONFIG_STA_SUPPORT //
+
+
+
+PHONY := clean install uninstall
+
+clean:
+	rm -f ../../common/*.o
+	rm -f ../../common/.*.{cmd,flags,d}
+	rm -f ../../os/linux/*.{o,ko,mod.{o,c}}
+	rm -f ../../os/linux/.*.{cmd,flags,d}
+	rm -fr ../../os/linux/.tmp_versions
+#Must clean Module.symvers; or you will suffer symbol version not match
+#when OS_ABL = YES.
+	rm -f ../../os/linux/Module.symvers
+	rm -f ../../os/linux/Modules.symvers
+	rm -f ../../os/linux/Module.markers
+	rm -f ../../os/linux/modules.order
+	rm -f ../../chips/*.o
+	rm -f ../../chips/.*.{cmd,flags,d}
+ifeq ($(RT28xx_MODE),AP)
+	rm -f ../../ap/*.o
+	rm -f ../../ap/.*.{cmd,flags,d}
+else
+ifeq ($(RT28xx_MODE),STA)
+	rm -f ../../sta/*.o
+	rm -f ../../sta/.*.{cmd,flags,d}
+else
+ifeq ($(RT28xx_MODE),APSTA)
+	rm -f ../../ap/*.o
+	rm -f ../../ap/.*.{cmd,flags,d}
+	rm -f ../../sta/*.o
+	rm -f ../../sta/.*.{cmd,flags,d}
+endif
+endif
+endif
+
+install:
+	rm -rf $(DAT_PATH)
+	$(shell [ ! -f /etc/Wireless ] && mkdir /etc/Wireless)
+	mkdir $(DAT_PATH)
+	cp $(RT28xx_DIR)/$(DAT_FILE_NAME) $(DAT_PATH)/.
+	install -d $(LINUX_SRC_MODULE)
+	install -m 644 -c $(addsuffix .ko,$(MOD_NAME)) $(LINUX_SRC_MODULE)
+	/sbin/depmod -a ${shell uname -r}
+
+uninstall:
+#	rm -rf $(DAT_PATH)
+	rm -rf $(addprefix $(LINUX_SRC_MODULE),$(addsuffix .ko,$(MOD_NAME)))
+	/sbin/depmod -a ${shell uname -r}
+
+# Declare the contents of the .PHONY variable as phony.  We keep that
+# information in a variable so we can use it in if_changed and friends.
+.PHONY: $(PHONY)
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.6.netif linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.6.netif
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.6.netif	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.6.netif	2017-09-23 03:42:49.822675663 +0800
@@ -0,0 +1,380 @@
+include $(RT28xx_DIR)/os/linux/config.mk
+
+#ifdef CONFIG_AP_SUPPORT
+ifeq ($(RT28xx_MODE),AP)
+MOD_NAME = rtnet$(CHIPSET)ap
+endif
+#endif // CONFIG_AP_SUPPORT //
+
+#ifdef CONFIG_STA_SUPPORT
+ifeq ($(RT28xx_MODE), STA)
+MOD_NAME = rtnet$(CHIPSET)sta
+endif
+#endif // CONFIG_STA_SUPPORT //
+
+#ifdef CONFIG_APSTA_SUPPORT
+ifeq ($(RT28xx_MODE), APSTA)
+MOD_NAME = rtnet$(CHIPSET)apsta
+endif
+#endif // CONFIG_APSTA_SUPPORT //
+
+obj-m := $(MOD_NAME).o
+
+#ifdef CONFIG_AP_SUPPORT
+
+rtnet$(CHIPSET)ap-objs := \
+	../../ap/ap_mbss_inf.o\
+	../../os/linux/ap_ioctl.o\
+	../../os/linux/rt_main_dev.o
+
+ifeq ($(HAS_CFG80211_SUPPORT),y)
+rtnet$(CHIPSET)ap-objs += \
+	../../os/linux/cfg80211.o
+endif
+
+ifeq ($(HAS_WDS),y)
+rtnet$(CHIPSET)ap-objs += \
+	../../ap/ap_wds_inf.o
+endif
+
+ifeq ($(HAS_APCLI),y)
+rtnet$(CHIPSET)ap-objs += \
+	../../ap/ap_apcli_inf.o
+endif
+
+ifeq ($(HAS_MESH_SUPPORT),y)
+rtnet$(CHIPSET)ap-objs += \
+	../../common/mesh_inf.o
+endif
+
+#ifdef RT2860
+ifeq ($(CHIPSET),2860)
+rtnet$(CHIPSET)ap-objs += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3090
+ifeq ($(CHIPSET),3090)
+rtnet$(CHIPSET)ap-objs += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT5390
+ifeq ($(CHIPSET),5390)
+rtnet$(CHIPSET)ap-objs += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+#ifdef RT2870
+ifeq ($(CHIPSET),2870)
+rtnet$(CHIPSET)ap-objs += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT2070
+ifeq ($(CHIPSET),2070)
+rtnet$(CHIPSET)ap-objs += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT3070
+ifeq ($(CHIPSET),3070)
+rtnet$(CHIPSET)ap-objs += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT2880
+ifeq ($(CHIPSET),2880)
+rtnet$(CHIPSET)ap-objs += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3572
+ifeq ($(CHIPSET),3572)
+rtnet$(CHIPSET)ap-objs += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT3062
+ifeq ($(CHIPSET),3062)
+rtnet$(CHIPSET)ap-objs += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3562
+ifeq ($(CHIPSET),3562)
+rtnet$(CHIPSET)ap-objs += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3593
+ifeq ($(CHIPSET),3593)
+rtnet$(CHIPSET)ap-objs += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3390
+ifeq ($(CHIPSET),3390)
+rtnet$(CHIPSET)ap-objs += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3370
+ifeq ($(CHIPSET),3370)
+rtnet$(CHIPSET)ap-objs += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT5370
+ifeq ($(CHIPSET),5370)
+rtnet$(CHIPSET)ap-objs += \
+        ../../common/rtusb_dev_id.o\
+        ../../os/linux/usb_main_dev.o
+endif
+
+#endif // CONFIG_AP_SUPPORT //
+
+#ifdef CONFIG_STA_SUPPORT
+rtnet$(CHIPSET)sta-objs := \
+	../../os/linux/sta_ioctl.o\
+	../../os/linux/rt_main_dev.o
+
+ifeq ($(HAS_CFG80211_SUPPORT),y)
+rtnet$(CHIPSET)sta-objs += \
+	../../os/linux/cfg80211.o
+endif
+
+ifeq ($(HAS_MESH_SUPPORT),y)
+rtnet$(CHIPSET)sta-objs += \
+	../../common/mesh_inf.o
+endif
+
+ifeq ($(HAS_P2P_SUPPORT), y)
+rtnet$(CHIPSET)sta-objs += \
+	../../common/p2p_inf.o\
+	../../os/linux/ap_ioctl.o
+endif
+
+#ifdef RT2860
+ifeq ($(CHIPSET),2860)
+rtnet$(CHIPSET)sta-objs += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3090
+ifeq ($(CHIPSET),3090)
+rtnet$(CHIPSET)sta-objs += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT5390
+ifeq ($(CHIPSET),5390)
+rtnet$(CHIPSET)sta-objs += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT2870
+ifeq ($(CHIPSET),2870)
+rtnet$(CHIPSET)sta-objs += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT2070
+ifeq ($(CHIPSET),2070)
+rtnet$(CHIPSET)sta-objs += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT3070
+ifeq ($(CHIPSET),3070)
+rtnet$(CHIPSET)sta-objs += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT2880
+ifeq ($(CHIPSET),2880)
+rtnet$(CHIPSET)sta-objs += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3572
+ifeq ($(CHIPSET),3572)
+rtnet$(CHIPSET)sta-objs += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT3062
+ifeq ($(CHIPSET),3062)
+rtnet$(CHIPSET)sta-objs += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3562
+ifeq ($(CHIPSET),3562)
+rtnet$(CHIPSET)sta-objs += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3593
+ifeq ($(CHIPSET),3593)
+rtnet$(CHIPSET)sta-objs += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3390
+ifeq ($(CHIPSET),3390)
+rtnet$(CHIPSET)sta-objs += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3370
+ifeq ($(CHIPSET),3370)
+rtnet$(CHIPSET)sta-objs += \
+	../../common/rtusb_dev_id.o\
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT5370
+ifeq ($(CHIPSET),5370)
+rtnet$(CHIPSET)sta-objs += \
+        ../../common/rtusb_dev_id.o\
+        ../../os/linux/usb_main_dev.o
+endif
+
+#endif // CONFIG_STA_SUPPORT //
+
+#ifdef CONFIG_APSTA_SUPPORT
+rtnet$(CHIPSET)apsta-objs := \
+	../../ap/ap_mbss_inf.o\
+	../../common/p2p_inf.o\
+	../../os/linux/ap_ioctl.o\
+	../../os/linux/sta_ioctl.o\
+	../../os/linux/rt_main_dev.o
+
+ifeq ($(HAS_CFG80211_SUPPORT),y)
+rtnet$(CHIPSET)apsta-objs += \
+	../../os/linux/cfg80211.o
+endif
+
+ifeq ($(HAS_WDS),y)
+rtnet$(CHIPSET)apsta-objs += \
+	../../ap/ap_wds_inf.o
+endif
+
+ifeq ($(HAS_APCLI),y)
+rtnet$(CHIPSET)apsta-objs += \
+	../../ap/ap_apcli_inf.o
+endif
+
+ifeq ($(HAS_MESH_SUPPORT),y)
+rtnet$(CHIPSET)apsta-objs += \
+	../../common/mesh_inf.o
+endif
+
+#ifdef RT2860
+ifeq ($(CHIPSET),2860)
+rtnet$(CHIPSET)apsta-objs += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3090
+ifeq ($(CHIPSET),3090)
+rtnet$(CHIPSET)apsta-objs += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT2870
+ifeq ($(CHIPSET),2870)
+rtnet$(CHIPSET)apsta-objs += \
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT2070
+ifeq ($(CHIPSET),2070)
+rtnet$(CHIPSET)apsta-objs += \
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT3070
+ifeq ($(CHIPSET),3070)
+rtnet$(CHIPSET)apsta-objs += \
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT3390
+ifeq ($(CHIPSET),3390)
+rtnet$(CHIPSET)apsta-objs += \
+	../../os/linux/rt_pci_rbus.o\
+	../../os/linux/pci_main_dev.o
+endif
+
+#ifdef RT3370
+ifeq ($(CHIPSET),3370)
+rtnet$(CHIPSET)apsta-objs += \
+	../../os/linux/usb_main_dev.o
+endif
+
+#ifdef RT5370
+ifeq ($(CHIPSET),5370)
+rtnet$(CHIPSET)apsta-objs += \
+        ../../os/linux/usb_main_dev.o
+endif
+
+#endif // CONFIG_APSTA_SUPPORT //
+
+clean:
+	rm -f ../../common/*.o
+	rm -f ../../common/.*.{cmd,flags,d}
+	rm -f ../../os/linux/*.{o,ko,mod.{o,c}}
+	rm -f ../../os/linux/.*.{cmd,flags,d}
+	rm -fr ../../os/linux/.tmp_versions
+	rm -f ../../os/linux/Module.symvers
+	rm -f ../../os/linux/Modules.symvers
+	rm -f ../../os/linux/Module.markers
+	rm -f ../../os/linux/modules.order
+	rm -f ../../chips/*.o
+	rm -f ../../chips/.*.{cmd,flags,d}
+ifeq ($(RT28xx_MODE),AP)
+	rm -f ../../ap/*.o
+	rm -f ../../ap/.*.{cmd,flags,d}
+else
+ifeq ($(RT28xx_MODE),STA)
+	rm -f ../../sta/*.o
+	rm -f ../../sta/.*.{cmd,flags,d}
+endif
+endif
+
+install:
+	install -d $(LINUX_SRC_MODULE)
+	install -m 644 -c $(addsuffix .ko,$(MOD_NAME)) $(LINUX_SRC_MODULE)
+	/sbin/depmod -a ${shell uname -r}
+
+uninstall:
+	rm -rf $(addprefix $(LINUX_SRC_MODULE),$(addsuffix .ko,$(MOD_NAME)))
+	/sbin/depmod -a ${shell uname -r}
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.6.util linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.6.util
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.6.util	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.6.util	2017-09-23 03:42:49.822675663 +0800
@@ -0,0 +1,115 @@
+include $(RT28xx_DIR)/os/linux/config.mk
+
+#ifdef CONFIG_AP_SUPPORT
+ifeq ($(RT28xx_MODE),AP)
+MOD_NAME = rtutil$(CHIPSET)ap
+endif
+#endif // CONFIG_AP_SUPPORT //
+
+#ifdef CONFIG_STA_SUPPORT
+ifeq ($(RT28xx_MODE), STA)
+MOD_NAME = rtutil$(CHIPSET)sta
+endif
+#endif // CONFIG_STA_SUPPORT //
+
+#ifdef CONFIG_APSTA_SUPPORT
+ifeq ($(RT28xx_MODE), APSTA)
+MOD_NAME = rtutil$(CHIPSET)apsta
+endif
+#endif // CONFIG_APSTA_SUPPORT //
+
+obj-m := $(MOD_NAME).o
+
+#ifdef CONFIG_AP_SUPPORT
+
+rtutil$(CHIPSET)ap-objs := \
+	../../common/rt_os_util.o\
+	../../os/linux/rt_linux_symb.o\
+	../../os/linux/rt_rbus_pci_util.o\
+	../../os/linux/rt_usb_util.o\
+	../../os/linux/rt_linux.o
+
+ifeq ($(PLATFORM),BL2348)
+rtutil$(CHIPSET)ap-objs += \
+	../../os/linux/vr_bdlt.o
+endif
+
+ifeq ($(PLATFORM),BLUBB)
+rtutil$(CHIPSET)ap-objs += \
+	../../os/linux/vr_bdlt.o
+endif
+
+ifeq ($(HAS_BGFP_SUPPORT),y)
+rtutil$(CHIPSET)ap-objs += \
+	../../os/linux/br_ftph.o
+endif
+
+#endif // CONFIG_AP_SUPPORT //
+
+
+#ifdef CONFIG_STA_SUPPORT
+
+rtutil$(CHIPSET)sta-objs := \
+	../../common/rt_os_util.o\
+	../../os/linux/rt_linux_symb.o\
+	../../os/linux/rt_rbus_pci_util.o\
+	../../os/linux/rt_usb_util.o\
+	../../os/linux/rt_linux.o
+#endif // CONFIG_STA_SUPPORT //
+
+
+#ifdef CONFIG_APSTA_SUPPORT
+rtutil$(CHIPSET)apsta-objs := \
+	../../common/rt_os_util.o\
+	../../os/linux/rt_linux_symb.o\
+	../../os/linux/rt_rbus_pci_util.o\
+	../../os/linux/rt_usb_util.o\
+	../../os/linux/rt_linux.o
+
+ifeq ($(PLATFORM),BL2348)
+rtutil$(CHIPSET)ap-objs += \
+	../../os/linux/vr_bdlt.o
+endif
+
+ifeq ($(PLATFORM),BLUBB)
+rtutil$(CHIPSET)ap-objs += \
+	../../os/linux/vr_bdlt.o
+endif
+
+ifeq ($(HAS_BGFP_SUPPORT),y)
+rtutil$(CHIPSET)ap-objs += \
+	../../os/linux/br_ftph.o
+endif
+
+#endif // CONFIG_APSTA_SUPPORT //
+
+clean:
+	rm -f ../../common/*.o
+	rm -f ../../common/.*.{cmd,flags,d}
+	rm -f ../../os/linux/*.{o,ko,mod.{o,c}}
+	rm -f ../../os/linux/.*.{cmd,flags,d}
+	rm -fr ../../os/linux/.tmp_versions
+	rm -f ../../os/linux/Module.symvers
+	rm -f ../../os/linux/Modules.symvers
+	rm -f ../../os/linux/Module.markers
+	rm -f ../../os/linux/modules.order
+	rm -f ../../chips/*.o
+	rm -f ../../chips/.*.{cmd,flags,d}
+ifeq ($(RT28xx_MODE),AP)
+	rm -f ../../ap/*.o
+	rm -f ../../ap/.*.{cmd,flags,d}
+else
+ifeq ($(RT28xx_MODE),STA)
+	rm -f ../../sta/*.o
+	rm -f ../../sta/.*.{cmd,flags,d}
+endif
+endif
+
+install:
+	install -d $(LINUX_SRC_MODULE)
+	install -m 644 -c $(addsuffix .ko,$(MOD_NAME)) $(LINUX_SRC_MODULE)
+	/sbin/depmod -a ${shell uname -r}
+
+uninstall:
+	rm -rf $(addprefix $(LINUX_SRC_MODULE),$(addsuffix .ko,$(MOD_NAME)))
+	/sbin/depmod -a ${shell uname -r}
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.clean linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.clean
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.clean	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.clean	2017-09-23 03:42:49.826675651 +0800
@@ -0,0 +1,42 @@
+include $(RT28xx_DIR)/os/linux/config.mk
+
+PHONY := clean install uninstall
+
+clean:
+	rm -f ../../common/*.o
+	rm -f ../../common/.*.{cmd,flags,d}
+	rm -f ../../os/linux/*.{o,ko,mod.{o,c}}
+	rm -f ../../os/linux/.*.{cmd,flags,d}
+	rm -fr ../../os/linux/.tmp_versions
+#Must clean Module.symvers; or you will suffer symbol version not match
+#when OS_ABL = YES.
+	rm -f ../../os/linux/Module.symvers
+	rm -f ../../os/linux/Modules.symvers
+	rm -f ../../os/linux/Module.markers
+	rm -f ../../os/linux/modules.order
+	rm -f ../../chips/*.o
+	rm -f ../../chips/.*.{cmd,flags,d}
+ifeq ($(RT28xx_MODE),AP)
+	rm -f ../../ap/*.o
+	rm -f ../../ap/.*.{cmd,flags,d}
+else
+ifeq ($(RT28xx_MODE),STA)
+	rm -f ../../sta/*.o
+	rm -f ../../sta/.*.{cmd,flags,d}
+ifeq ($(HAS_P2P_SUPPORT),y)
+	rm -f ../../ap/*.o
+	rm -f ../../ap/.*.{cmd,flags,d}
+endif
+else
+ifeq ($(RT28xx_MODE),APSTA)
+	rm -f ../../ap/*.o
+	rm -f ../../ap/.*.{cmd,flags,d}
+	rm -f ../../sta/*.o
+	rm -f ../../sta/.*.{cmd,flags,d}
+endif
+endif
+endif
+
+# Declare the contents of the .PHONY variable as phony.  We keep that
+# information in a variable so we can use it in if_changed and friends.
+.PHONY: $(PHONY)
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.libautoprovision.6 linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.libautoprovision.6
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.libautoprovision.6	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/Makefile.libautoprovision.6	2017-09-23 03:42:49.826675651 +0800
@@ -0,0 +1,2 @@
+include $(RT28xx_DIR)/os/linux/config.mk
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/rt_linux.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/rt_linux.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/rt_linux.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/rt_linux.c	2017-09-23 03:42:49.826675651 +0800
@@ -0,0 +1,5024 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#define RTMP_MODULE_OS
+#define RTMP_MODULE_OS_UTIL
+
+/*#include "rt_config.h" */
+#include "rtmp_comm.h"
+#include "rtmp_osabl.h"
+#include "rt_os_util.h"
+
+#if defined (CONFIG_RA_HW_NAT) || defined (CONFIG_RA_HW_NAT_MODULE)
+#include "../../../../../../net/nat/hw_nat/ra_nat.h"
+#include "../../../../../../net/nat/hw_nat/frame_engine.h"
+#endif
+
+/* TODO */
+#undef RT_CONFIG_IF_OPMODE_ON_AP
+#undef RT_CONFIG_IF_OPMODE_ON_STA
+
+#if defined(CONFIG_AP_SUPPORT) && defined(CONFIG_STA_SUPPORT)
+#define RT_CONFIG_IF_OPMODE_ON_AP(__OpMode)	if (__OpMode == OPMODE_AP)
+#define RT_CONFIG_IF_OPMODE_ON_STA(__OpMode)	if (__OpMode == OPMODE_STA)
+#else
+#define RT_CONFIG_IF_OPMODE_ON_AP(__OpMode)
+#define RT_CONFIG_IF_OPMODE_ON_STA(__OpMode)
+#endif
+
+ULONG RTDebugLevel = RT_DEBUG_ERROR;
+
+#ifdef OS_ABL_FUNC_SUPPORT
+ULONG RTPktOffsetData = 0, RTPktOffsetLen = 0, RTPktOffsetCB = 0;
+#endif /* OS_ABL_FUNC_SUPPORT */
+
+
+#ifdef VENDOR_FEATURE4_SUPPORT
+ULONG OS_NumOfMemAlloc = 0, OS_NumOfMemFree = 0;
+#endif /* VENDOR_FEATURE4_SUPPORT */
+#ifdef VENDOR_FEATURE2_SUPPORT
+ULONG OS_NumOfPktAlloc = 0, OS_NumOfPktFree = 0;
+#endif /* VENDOR_FEATURE2_SUPPORT */
+
+/*
+ * the lock will not be used in TX/RX
+ * path so throughput should not be impacted
+ */
+BOOLEAN FlgIsUtilInit = FALSE;
+OS_NDIS_SPIN_LOCK UtilSemLock;
+
+
+/*
+========================================================================
+Routine Description:
+	Initialize something in UTIL module.
+
+Arguments:
+	None
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpUtilInit(
+	VOID)
+{
+	if (FlgIsUtilInit == FALSE) {
+		OS_NdisAllocateSpinLock(&UtilSemLock);
+		FlgIsUtilInit = TRUE;
+	}
+}
+
+/* timeout -- ms */
+static inline VOID __RTMP_SetPeriodicTimer(
+	IN OS_NDIS_MINIPORT_TIMER * pTimer,
+	IN unsigned long timeout)
+{
+	timeout = ((timeout * OS_HZ) / 1000);
+	pTimer->expires = jiffies + timeout;
+	add_timer(pTimer);
+}
+
+/* convert NdisMInitializeTimer --> RTMP_OS_Init_Timer */
+static inline VOID __RTMP_OS_Init_Timer(
+	IN VOID *pReserved,
+	IN OS_NDIS_MINIPORT_TIMER * pTimer,
+	IN TIMER_FUNCTION function,
+	IN PVOID data)
+{
+	if (!timer_pending(pTimer)) {
+		init_timer(pTimer);
+		pTimer->data = (unsigned long)data;
+		pTimer->function = function;
+	}
+}
+
+static inline VOID __RTMP_OS_Add_Timer(
+	IN OS_NDIS_MINIPORT_TIMER * pTimer,
+	IN unsigned long timeout)
+{
+	if (timer_pending(pTimer))
+		return;
+
+	timeout = ((timeout * OS_HZ) / 1000);
+	pTimer->expires = jiffies + timeout;
+	add_timer(pTimer);
+}
+
+static inline VOID __RTMP_OS_Mod_Timer(
+	IN OS_NDIS_MINIPORT_TIMER * pTimer,
+	IN unsigned long timeout)
+{
+	timeout = ((timeout * OS_HZ) / 1000);
+	mod_timer(pTimer, jiffies + timeout);
+}
+
+static inline VOID __RTMP_OS_Del_Timer(
+	IN OS_NDIS_MINIPORT_TIMER * pTimer,
+	OUT BOOLEAN *pCancelled)
+{
+	if (timer_pending(pTimer))
+		*pCancelled = del_timer_sync(pTimer);
+	else
+		*pCancelled = TRUE;
+}
+
+static inline VOID __RTMP_OS_Release_Timer(
+	IN OS_NDIS_MINIPORT_TIMER * pTimer)
+{
+	/* nothing to do */
+}
+
+
+/* Unify all delay routine by using udelay */
+VOID RTMPusecDelay(
+	IN ULONG usec)
+{
+	ULONG i;
+
+	for (i = 0; i < (usec / 50); i++)
+		udelay(50);
+
+	if (usec % 50)
+		udelay(usec % 50);
+}
+
+VOID RtmpOsMsDelay(
+	IN ULONG msec)
+{
+	mdelay(msec);
+}
+
+void RTMP_GetCurrentSystemTime(
+	LARGE_INTEGER * time)
+{
+	time->u.LowPart = jiffies;
+}
+
+void RTMP_GetCurrentSystemTick(
+	ULONG *pNow)
+{
+	*pNow = jiffies;
+}
+
+/* pAd MUST allow to be NULL */
+
+NDIS_STATUS os_alloc_mem(
+	IN VOID *pReserved,
+	OUT UCHAR **mem,
+	IN ULONG size)
+{
+	*mem = (PUCHAR) kmalloc(size, GFP_ATOMIC);
+	if (*mem) {
+#ifdef VENDOR_FEATURE4_SUPPORT
+		OS_NumOfMemAlloc++;
+#endif /* VENDOR_FEATURE4_SUPPORT */
+
+		return (NDIS_STATUS_SUCCESS);
+	} else
+		return (NDIS_STATUS_FAILURE);
+}
+
+NDIS_STATUS os_alloc_mem_suspend(
+	IN VOID *pReserved,
+	OUT UCHAR **mem,
+	IN ULONG size)
+{
+	*mem = (PUCHAR) kmalloc(size, GFP_KERNEL);
+	if (*mem) {
+#ifdef VENDOR_FEATURE4_SUPPORT
+		OS_NumOfMemAlloc++;
+#endif /* VENDOR_FEATURE4_SUPPORT */
+
+		return (NDIS_STATUS_SUCCESS);
+	} else
+		return (NDIS_STATUS_FAILURE);
+}
+
+/* pAd MUST allow to be NULL */
+NDIS_STATUS os_free_mem(
+	IN VOID *pReserved,
+	IN PVOID mem)
+{
+	ASSERT(mem);
+	kfree(mem);
+
+#ifdef VENDOR_FEATURE4_SUPPORT
+	OS_NumOfMemFree++;
+#endif /* VENDOR_FEATURE4_SUPPORT */
+
+	return (NDIS_STATUS_SUCCESS);
+}
+
+#if defined(RTMP_RBUS_SUPPORT) || defined (RTMP_FLASH_SUPPORT)
+/* The flag "CONFIG_RALINK_FLASH_API" is used for APSoC Linux SDK */
+#ifdef CONFIG_RALINK_FLASH_API
+
+int32_t FlashRead(
+	uint32_t *dst,
+	uint32_t *src,
+	uint32_t count);
+
+int32_t FlashWrite(
+	uint16_t *source,
+	uint16_t *destination,
+	uint32_t numBytes);
+#define NVRAM_OFFSET                            0x30000
+#if defined (CONFIG_RT2880_FLASH_32M)
+#define RF_OFFSET                               0x1FE0000
+#else
+#ifdef RTMP_FLASH_SUPPORT
+#define RF_OFFSET                               0x48000
+#else
+#define RF_OFFSET                               0x40000
+#endif /* RTMP_FLASH_SUPPORT */
+#endif
+
+#else /* CONFIG_RALINK_FLASH_API */
+
+#ifdef RA_MTD_RW_BY_NUM
+#if defined (CONFIG_RT2880_FLASH_32M)
+#define MTD_NUM_FACTORY 5
+#else
+#define MTD_NUM_FACTORY 2
+#endif
+extern int ra_mtd_write(
+	int num,
+	loff_t to,
+	size_t len,
+	const u_char *buf);
+
+extern int ra_mtd_read(
+	int num,
+	loff_t from,
+	size_t len,
+	u_char *buf);
+#else
+extern int ra_mtd_write_nm(
+	char *name,
+	loff_t to,
+	size_t len,
+	const u_char *buf);
+
+extern int ra_mtd_read_nm(
+	char *name,
+	loff_t from,
+	size_t len,
+	u_char *buf);
+#endif
+
+#endif /* CONFIG_RALINK_FLASH_API */
+
+void RtmpFlashRead(
+	UCHAR * p,
+	ULONG a,
+	ULONG b)
+{
+#ifdef CONFIG_RALINK_FLASH_API
+	FlashRead((uint32_t *) p, (uint32_t *) a, (uint32_t) b);
+#else
+#ifdef RA_MTD_RW_BY_NUM
+	ra_mtd_read(MTD_NUM_FACTORY, 0, (size_t) b, p);
+#else
+	ra_mtd_read_nm("Factory", a&0xFFFF, (size_t) b, p);
+#endif
+#endif /* CONFIG_RALINK_FLASH_API */
+}
+
+void RtmpFlashWrite(
+	UCHAR * p,
+	ULONG a,
+	ULONG b)
+{
+#ifdef CONFIG_RALINK_FLASH_API
+	FlashWrite((uint16_t *) p, (uint16_t *) a, (uint32_t) b);
+#else
+#ifdef RA_MTD_RW_BY_NUM
+	ra_mtd_write(MTD_NUM_FACTORY, 0, (size_t) b, p);
+#else
+	ra_mtd_write_nm("Factory", a&0xFFFF, (size_t) b, p);
+#endif
+#endif /* CONFIG_RALINK_FLASH_API */
+}
+#endif /* defined(RTMP_RBUS_SUPPORT) || defined (RTMP_FLASH_SUPPORT) */
+
+PNDIS_PACKET RtmpOSNetPktAlloc(
+	IN VOID *pReserved,
+	IN int size)
+{
+	struct sk_buff *skb;
+	/* Add 2 more bytes for ip header alignment */
+	skb = dev_alloc_skb(size + 2);
+	if (skb != NULL)
+		MEM_DBG_PKT_ALLOC_INC(skb);
+
+	return ((PNDIS_PACKET) skb);
+}
+
+PNDIS_PACKET RTMP_AllocateFragPacketBuffer(
+	IN VOID *pReserved,
+	IN ULONG Length)
+{
+	struct sk_buff *pkt;
+
+	pkt = dev_alloc_skb(Length);
+
+	if (pkt == NULL) {
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("can't allocate frag rx %ld size packet\n", Length));
+	}
+
+	if (pkt) {
+		MEM_DBG_PKT_ALLOC_INC(pkt);
+		RTMP_SET_PACKET_SOURCE(OSPKT_TO_RTPKT(pkt), PKTSRC_NDIS);
+	}
+
+	return (PNDIS_PACKET) pkt;
+}
+
+
+
+/* the allocated NDIS PACKET must be freed via RTMPFreeNdisPacket() */
+NDIS_STATUS RTMPAllocateNdisPacket(
+	IN VOID *pReserved,
+	OUT PNDIS_PACKET *ppPacket,
+	IN PUCHAR pHeader,
+	IN UINT HeaderLen,
+	IN PUCHAR pData,
+	IN UINT DataLen)
+{
+	PNDIS_PACKET pPacket;
+	ASSERT(pData);
+	ASSERT(DataLen);
+
+	/* 1. Allocate a packet */
+	pPacket =
+	    (PNDIS_PACKET) dev_alloc_skb(HeaderLen + DataLen +
+					 RTMP_PKT_TAIL_PADDING);
+
+	if (pPacket == NULL) {
+		*ppPacket = NULL;
+#ifdef DEBUG
+		printk(KERN_ERR "RTMPAllocateNdisPacket Fail\n\n");
+#endif
+		return NDIS_STATUS_FAILURE;
+	}
+	MEM_DBG_PKT_ALLOC_INC(pPacket);
+
+	/* 2. clone the frame content */
+	if (HeaderLen > 0)
+		NdisMoveMemory(GET_OS_PKT_DATAPTR(pPacket), pHeader, HeaderLen);
+	if (DataLen > 0)
+		NdisMoveMemory(GET_OS_PKT_DATAPTR(pPacket) + HeaderLen, pData,
+			       DataLen);
+
+	/* 3. update length of packet */
+	skb_put(GET_OS_PKT_TYPE(pPacket), HeaderLen + DataLen);
+
+	RTMP_SET_PACKET_SOURCE(pPacket, PKTSRC_NDIS);
+/*	printk(KERN_ERR "%s : pPacket = %p, len = %d\n", __FUNCTION__,
+	pPacket, GET_OS_PKT_LEN(pPacket));*/
+	*ppPacket = pPacket;
+	return NDIS_STATUS_SUCCESS;
+}
+
+/*
+  ========================================================================
+  Description:
+	This routine frees a miniport internally allocated NDIS_PACKET and its
+	corresponding NDIS_BUFFER and allocated memory.
+  ========================================================================
+*/
+VOID RTMPFreeNdisPacket(
+	IN VOID *pReserved,
+	IN PNDIS_PACKET pPacket)
+{
+	dev_kfree_skb_any(RTPKT_TO_OSPKT(pPacket));
+	MEM_DBG_PKT_FREE_INC(pPacket);
+}
+
+/* IRQL = DISPATCH_LEVEL */
+/* NOTE: we do have an assumption here, that Byte0 and Byte1
+ * always reasid at the same scatter gather buffer
+ */
+NDIS_STATUS Sniff2BytesFromNdisBuffer(
+	IN PNDIS_BUFFER pFirstBuffer,
+	IN UCHAR DesiredOffset,
+	OUT PUCHAR pByte0,
+	OUT PUCHAR pByte1)
+{
+	*pByte0 = *(PUCHAR) (pFirstBuffer + DesiredOffset);
+	*pByte1 = *(PUCHAR) (pFirstBuffer + DesiredOffset + 1);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+void RTMP_QueryPacketInfo(
+	IN PNDIS_PACKET pPacket,
+	OUT PACKET_INFO * pPacketInfo,
+	OUT PUCHAR * pSrcBufVA,
+	OUT UINT * pSrcBufLen)
+{
+	pPacketInfo->BufferCount = 1;
+	pPacketInfo->pFirstBuffer = (PNDIS_BUFFER) GET_OS_PKT_DATAPTR(pPacket);
+	pPacketInfo->PhysicalBufferCount = 1;
+	pPacketInfo->TotalPacketLength = GET_OS_PKT_LEN(pPacket);
+
+	*pSrcBufVA = GET_OS_PKT_DATAPTR(pPacket);
+	*pSrcBufLen = GET_OS_PKT_LEN(pPacket);
+}
+
+
+PNDIS_PACKET DuplicatePacket(
+	IN PNET_DEV pNetDev,
+	IN PNDIS_PACKET pPacket,
+	IN UCHAR FromWhichBSSID)
+{
+	struct sk_buff *skb;
+	PNDIS_PACKET pRetPacket = NULL;
+	USHORT DataSize;
+	UCHAR *pData;
+
+	DataSize = (USHORT) GET_OS_PKT_LEN(pPacket);
+	pData = (PUCHAR) GET_OS_PKT_DATAPTR(pPacket);
+
+	skb = skb_clone(RTPKT_TO_OSPKT(pPacket), MEM_ALLOC_FLAG);
+	if (skb) {
+		MEM_DBG_PKT_ALLOC_INC(skb);
+		skb->dev = pNetDev;	/*get_netdev_from_bssid(pAd, FromWhichBSSID); */
+		pRetPacket = OSPKT_TO_RTPKT(skb);
+	}
+
+	return pRetPacket;
+
+}
+
+PNDIS_PACKET duplicate_pkt(
+	IN PNET_DEV pNetDev,
+	IN PUCHAR pHeader802_3,
+	IN UINT HdrLen,
+	IN PUCHAR pData,
+	IN ULONG DataSize,
+	IN UCHAR FromWhichBSSID)
+{
+	struct sk_buff *skb;
+	PNDIS_PACKET pPacket = NULL;
+
+	if ((skb =
+	     __dev_alloc_skb(HdrLen + DataSize + 2, MEM_ALLOC_FLAG)) != NULL) {
+		MEM_DBG_PKT_ALLOC_INC(skb);
+
+		skb_reserve(skb, 2);
+		NdisMoveMemory(skb->tail, pHeader802_3, HdrLen);
+		skb_put(skb, HdrLen);
+		NdisMoveMemory(skb->tail, pData, DataSize);
+		skb_put(skb, DataSize);
+		skb->dev = pNetDev;	/*get_netdev_from_bssid(pAd, FromWhichBSSID); */
+		pPacket = OSPKT_TO_RTPKT(skb);
+	}
+
+	return pPacket;
+}
+
+#define TKIP_TX_MIC_SIZE		8
+PNDIS_PACKET duplicate_pkt_with_TKIP_MIC(
+	IN VOID *pReserved,
+	IN PNDIS_PACKET pPacket)
+{
+	struct sk_buff *skb, *newskb;
+
+	skb = RTPKT_TO_OSPKT(pPacket);
+	if (skb_tailroom(skb) < TKIP_TX_MIC_SIZE) {
+		/* alloc a new skb and copy the packet */
+		newskb =
+		    skb_copy_expand(skb, skb_headroom(skb), TKIP_TX_MIC_SIZE,
+				    GFP_ATOMIC);
+
+		dev_kfree_skb_any(skb);
+		MEM_DBG_PKT_FREE_INC(skb);
+
+		if (newskb == NULL) {
+			DBGPRINT(RT_DEBUG_ERROR,
+				 ("Extend Tx.MIC for packet failed!, dropping packet!\n"));
+			return NULL;
+		}
+		skb = newskb;
+		MEM_DBG_PKT_ALLOC_INC(skb);
+	}
+
+	return OSPKT_TO_RTPKT(skb);
+
+
+}
+
+
+/*
+	========================================================================
+
+	Routine Description:
+		Send a L2 frame to upper daemon to trigger state machine
+
+	Arguments:
+		pAd - pointer to our pAdapter context
+
+	Return Value:
+
+	Note:
+
+	========================================================================
+*/
+BOOLEAN RTMPL2FrameTxAction(
+	IN VOID * pCtrlBkPtr,
+	IN PNET_DEV pNetDev,
+	IN RTMP_CB_8023_PACKET_ANNOUNCE _announce_802_3_packet,
+	IN UCHAR apidx,
+	IN PUCHAR pData,
+	IN UINT32 data_len,
+	IN	UCHAR			OpMode)
+{
+	struct sk_buff *skb = dev_alloc_skb(data_len + 2);
+
+	if (!skb) {
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("%s : Error! Can't allocate a skb.\n", __FUNCTION__));
+		return FALSE;
+	}
+
+	MEM_DBG_PKT_ALLOC_INC(skb);
+	/*get_netdev_from_bssid(pAd, apidx)); */
+	SET_OS_PKT_NETDEV(skb, pNetDev);
+
+	/* 16 byte align the IP header */
+	skb_reserve(skb, 2);
+
+	/* Insert the frame content */
+	NdisMoveMemory(GET_OS_PKT_DATAPTR(skb), pData, data_len);
+
+	/* End this frame */
+	skb_put(GET_OS_PKT_TYPE(skb), data_len);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("%s doen\n", __FUNCTION__));
+
+	_announce_802_3_packet(pCtrlBkPtr, skb, OpMode);
+
+	return TRUE;
+
+}
+
+PNDIS_PACKET ExpandPacket(
+	IN VOID *pReserved,
+	IN PNDIS_PACKET pPacket,
+	IN UINT32 ext_head_len,
+	IN UINT32 ext_tail_len)
+{
+	struct sk_buff *skb, *newskb;
+
+	skb = RTPKT_TO_OSPKT(pPacket);
+	if (skb_cloned(skb) || (skb_headroom(skb) < ext_head_len)
+	    || (skb_tailroom(skb) < ext_tail_len)) {
+		UINT32 head_len =
+		    (skb_headroom(skb) <
+		     ext_head_len) ? ext_head_len : skb_headroom(skb);
+		UINT32 tail_len =
+		    (skb_tailroom(skb) <
+		     ext_tail_len) ? ext_tail_len : skb_tailroom(skb);
+
+		/* alloc a new skb and copy the packet */
+		newskb = skb_copy_expand(skb, head_len, tail_len, GFP_ATOMIC);
+
+		dev_kfree_skb_any(skb);
+		MEM_DBG_PKT_FREE_INC(skb);
+
+		if (newskb == NULL) {
+			DBGPRINT(RT_DEBUG_ERROR,
+				 ("Extend Tx buffer for WPI failed!, dropping packet!\n"));
+			return NULL;
+		}
+		skb = newskb;
+		MEM_DBG_PKT_ALLOC_INC(skb);
+	}
+
+	return OSPKT_TO_RTPKT(skb);
+
+}
+
+PNDIS_PACKET ClonePacket(
+	IN VOID *pReserved,
+	IN PNDIS_PACKET pPacket,
+	IN PUCHAR pData,
+	IN ULONG DataSize)
+{
+	struct sk_buff *pRxPkt;
+	struct sk_buff *pClonedPkt;
+
+	ASSERT(pPacket);
+	pRxPkt = RTPKT_TO_OSPKT(pPacket);
+
+	/* clone the packet */
+	pClonedPkt = skb_clone(pRxPkt, MEM_ALLOC_FLAG);
+
+	if (pClonedPkt) {
+		/* set the correct dataptr and data len */
+		MEM_DBG_PKT_ALLOC_INC(pClonedPkt);
+		pClonedPkt->dev = pRxPkt->dev;
+		pClonedPkt->data = pData;
+		pClonedPkt->len = DataSize;
+		pClonedPkt->tail = pClonedPkt->data + pClonedPkt->len;
+		ASSERT(DataSize < 1530);
+	}
+	return pClonedPkt;
+}
+
+VOID RtmpOsPktInit(
+	IN PNDIS_PACKET pNetPkt,
+	IN PNET_DEV pNetDev,
+	IN UCHAR *pData,
+	IN USHORT DataSize)
+{
+	PNDIS_PACKET pRxPkt;
+
+	pRxPkt = RTPKT_TO_OSPKT(pNetPkt);
+
+	SET_OS_PKT_NETDEV(pRxPkt, pNetDev);
+	SET_OS_PKT_DATAPTR(pRxPkt, pData);
+	SET_OS_PKT_LEN(pRxPkt, DataSize);
+	SET_OS_PKT_DATATAIL(pRxPkt, pData, DataSize);
+}
+
+
+void wlan_802_11_to_802_3_packet(
+	IN PNET_DEV pNetDev,
+	IN UCHAR OpMode,
+	IN USHORT VLAN_VID,
+	IN USHORT VLAN_Priority,
+	IN PNDIS_PACKET pRxPacket,
+	IN UCHAR *pData,
+	IN ULONG DataSize,
+	IN PUCHAR pHeader802_3,
+	IN UCHAR FromWhichBSSID,
+	IN UCHAR *TPID)
+{
+	struct sk_buff *pOSPkt;
+
+/*	ASSERT(pRxBlk->pRxPacket); */
+	ASSERT(pHeader802_3);
+
+	pOSPkt = RTPKT_TO_OSPKT(pRxPacket);
+
+	/*get_netdev_from_bssid(pAd, FromWhichBSSID); */
+	pOSPkt->dev = pNetDev;
+	pOSPkt->data = pData;
+	pOSPkt->len = DataSize;
+	pOSPkt->tail = pOSPkt->data + pOSPkt->len;
+
+	/* */
+	/* copy 802.3 header */
+	/* */
+	/* */
+
+#ifdef CONFIG_STA_SUPPORT
+	RT_CONFIG_IF_OPMODE_ON_STA(OpMode)
+	{
+	    NdisMoveMemory(skb_push(pOSPkt, LENGTH_802_3), pHeader802_3,
+			   LENGTH_802_3);
+
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+}
+
+
+
+void hex_dump(
+	char *str,
+	unsigned char *pSrcBufVA,
+	unsigned int SrcBufLen)
+{
+#ifdef DBG
+	unsigned char *pt;
+	int x;
+
+	if (RTDebugLevel < RT_DEBUG_TRACE)
+		return;
+
+	pt = pSrcBufVA;
+	printk("%s: %p, len = %d\n", str, pSrcBufVA, SrcBufLen);
+	for (x = 0; x < SrcBufLen; x++) {
+		if (x % 16 == 0)
+			printk("0x%04x : ", x);
+		printk("%02x ", ((unsigned char)pt[x]));
+		if (x % 16 == 15)
+			printk("\n");
+	}
+	printk("\n");
+#endif /* DBG */
+}
+
+#ifdef SYSTEM_LOG_SUPPORT
+/*
+	========================================================================
+
+	Routine Description:
+		Send log message through wireless event
+
+		Support standard iw_event with IWEVCUSTOM. It is used below.
+
+		iwreq_data.data.flags is used to store event_flag that is
+		defined by user. iwreq_data.data.length is the length of the
+		event log.
+
+		The format of the event log is composed of the entry's MAC
+		address and the desired log message (refer to
+		pWirelessEventText).
+
+			ex: 11:22:33:44:55:66 has associated successfully
+
+		p.s. The requirement of Wireless Extension is v15 or newer.
+
+	========================================================================
+*/
+VOID RtmpOsSendWirelessEvent(
+	IN VOID *pAd,
+	IN USHORT Event_flag,
+	IN PUCHAR pAddr,
+	IN UCHAR BssIdx,
+	IN CHAR Rssi,
+	IN RTMP_OS_SEND_WLAN_EVENT pFunc)
+{
+#if WIRELESS_EXT >= 15
+	pFunc(pAd, Event_flag, pAddr, BssIdx, Rssi);
+
+#else
+	DBGPRINT(RT_DEBUG_ERROR,
+		 ("%s : The Wireless Extension MUST be v15 or newer.\n",
+		  __FUNCTION__));
+#endif /* WIRELESS_EXT >= 15 */
+}
+#endif /* SYSTEM_LOG_SUPPORT */
+
+
+#ifdef CONFIG_STA_SUPPORT
+INT32 ralinkrate[] = {
+2, 4, 11, 22,		/* CCK */
+12, 18, 24, 36, 48, 72, 96, 108,	/* OFDM */
+/* 20MHz, 800ns GI, MCS: 0 ~ 15 */
+13, 26, 39, 52, 78, 104, 117, 130, 26, 52, 78, 104, 156, 208, 234, 260,
+39, 78, 117, 156, 234, 312, 351, 390,	/* 20MHz, 800ns GI, MCS: 16 ~ 23 */
+/* 40MHz, 800ns GI, MCS: 0 ~ 15 */
+27, 54, 81, 108, 162, 216, 243, 270, 54, 108, 162, 216, 324, 432, 486, 540,
+81, 162, 243, 324, 486, 648, 729, 810,	/* 40MHz, 800ns GI, MCS: 16 ~ 23 */
+/* 20MHz, 400ns GI, MCS: 0 ~ 15 */
+14, 29, 43, 57, 87, 115, 130, 144, 29, 59, 87, 115, 173, 230, 260, 288,
+43, 87, 130, 173, 260, 317, 390, 433,	/* 20MHz, 400ns GI, MCS: 16 ~ 23 */
+/* 40MHz, 400ns GI, MCS: 0 ~ 15 */
+30, 60, 90, 120, 180, 240, 270, 300, 60, 120, 180, 240, 360, 480, 540, 600,
+90, 180, 270, 360, 540, 720, 810, 900};	/* 40MHz, 400ns GI, MCS: 16 ~ 23 */
+
+UINT32 RT_RateSize = sizeof (ralinkrate);
+
+void send_monitor_packets(IN PNET_DEV pNetDev,
+			  IN PNDIS_PACKET pRxPacket,
+			  IN PHEADER_802_11 pHeader,
+			  IN UCHAR * pData,
+			  IN USHORT DataSize,
+			  IN UCHAR L2PAD,
+			  IN UCHAR PHYMODE,
+			  IN UCHAR BW,
+			  IN UCHAR ShortGI,
+			  IN UCHAR MCS,
+			  IN UCHAR AMPDU,
+			  IN UCHAR STBC,
+			  IN UCHAR RSSI1,
+			  IN UCHAR BssMonitorFlag11n,
+			  IN UCHAR * pDevName,
+			  IN UCHAR Channel,
+			  IN UCHAR CentralChannel,
+			  IN UINT32 MaxRssi) {
+	struct sk_buff *pOSPkt;
+	wlan_ng_prism2_header *ph;
+#ifdef MONITOR_FLAG_11N_SNIFFER_SUPPORT
+	ETHEREAL_RADIO h,
+	*ph_11n33;		/* for new 11n sniffer format */
+#endif /* MONITOR_FLAG_11N_SNIFFER_SUPPORT */
+	int rate_index = 0;
+	USHORT header_len = 0;
+	UCHAR temp_header[40] = {
+	0};
+
+	MEM_DBG_PKT_FREE_INC(pRxPacket);
+
+
+	pOSPkt = RTPKT_TO_OSPKT(pRxPacket);	/*pRxBlk->pRxPacket); */
+	pOSPkt->dev = pNetDev;	/*get_netdev_from_bssid(pAd, BSS0); */
+	if (pHeader->FC.Type == BTYPE_DATA) {
+		DataSize -= LENGTH_802_11;
+		if ((pHeader->FC.ToDs == 1) && (pHeader->FC.FrDs == 1))
+			header_len = LENGTH_802_11_WITH_ADDR4;
+		else
+			header_len = LENGTH_802_11;
+
+		/* QOS */
+		if (pHeader->FC.SubType & 0x08) {
+			header_len += 2;
+			/* Data skip QOS contorl field */
+			DataSize -= 2;
+		}
+
+		/* Order bit: A-Ralink or HTC+ */
+		if (pHeader->FC.Order) {
+			header_len += 4;
+			/* Data skip HTC contorl field */
+			DataSize -= 4;
+		}
+
+		/* Copy Header */
+		if (header_len <= 40)
+			NdisMoveMemory(temp_header, pData, header_len);
+
+		/* skip HW padding */
+		if (L2PAD)
+			pData += (header_len + 2);
+		else
+			pData += header_len;
+	}
+
+	/*end if */
+	if (DataSize < pOSPkt->len) {
+		skb_trim(pOSPkt, DataSize);
+	} else {
+		skb_put(pOSPkt, (DataSize - pOSPkt->len));
+	}			/*end if */
+
+	if ((pData - pOSPkt->data) > 0) {
+		skb_put(pOSPkt, (pData - pOSPkt->data));
+		skb_pull(pOSPkt, (pData - pOSPkt->data));
+	}
+	/*end if */
+	if (skb_headroom(pOSPkt) <
+	    (sizeof (wlan_ng_prism2_header) + header_len)) {
+		if (pskb_expand_head
+		    (pOSPkt, (sizeof (wlan_ng_prism2_header) + header_len), 0,
+		     GFP_ATOMIC)) {
+			DBGPRINT(RT_DEBUG_ERROR,
+				 ("%s : Reallocate header size of sk_buff fail!\n",
+				  __FUNCTION__));
+			goto err_free_sk_buff;
+		}		/*end if */
+	}
+	/*end if */
+	if (header_len > 0)
+		NdisMoveMemory(skb_push(pOSPkt, header_len), temp_header,
+			       header_len);
+
+#ifdef MONITOR_FLAG_11N_SNIFFER_SUPPORT
+	if (BssMonitorFlag11n == 0)
+#endif /* MONITOR_FLAG_11N_SNIFFER_SUPPORT */
+	{
+		ph = (wlan_ng_prism2_header *) skb_push(pOSPkt,
+							sizeof
+							(wlan_ng_prism2_header));
+		NdisZeroMemory(ph, sizeof (wlan_ng_prism2_header));
+
+		ph->msgcode = DIDmsg_lnxind_wlansniffrm;
+		ph->msglen = sizeof (wlan_ng_prism2_header);
+		strcpy((PSTRING) ph->devname, (PSTRING) pDevName);
+
+		ph->hosttime.did = DIDmsg_lnxind_wlansniffrm_hosttime;
+		ph->hosttime.status = 0;
+		ph->hosttime.len = 4;
+		ph->hosttime.data = jiffies;
+
+		ph->mactime.did = DIDmsg_lnxind_wlansniffrm_mactime;
+		ph->mactime.status = 0;
+		ph->mactime.len = 0;
+		ph->mactime.data = 0;
+
+		ph->istx.did = DIDmsg_lnxind_wlansniffrm_istx;
+		ph->istx.status = 0;
+		ph->istx.len = 0;
+		ph->istx.data = 0;
+
+		ph->channel.did = DIDmsg_lnxind_wlansniffrm_channel;
+		ph->channel.status = 0;
+		ph->channel.len = 4;
+
+		ph->channel.data = (u_int32_t) Channel;
+
+		ph->rssi.did = DIDmsg_lnxind_wlansniffrm_rssi;
+		ph->rssi.status = 0;
+		ph->rssi.len = 4;
+		ph->rssi.data = MaxRssi;
+		ph->signal.did = DIDmsg_lnxind_wlansniffrm_signal;
+		ph->signal.status = 0;
+		ph->signal.len = 4;
+		ph->signal.data = 0;	/*rssi + noise; */
+
+		ph->noise.did = DIDmsg_lnxind_wlansniffrm_noise;
+		ph->noise.status = 0;
+		ph->noise.len = 4;
+		ph->noise.data = 0;
+
+#ifdef DOT11_N_SUPPORT
+		if (PHYMODE >= MODE_HTMIX) {
+			rate_index =
+			    12 + ((UCHAR) BW * 24) + ((UCHAR) ShortGI * 48) +
+			    ((UCHAR) MCS);
+		} else
+#endif /* DOT11_N_SUPPORT */
+		if (PHYMODE == MODE_OFDM)
+			rate_index = (UCHAR) (MCS) + 4;
+		else
+			rate_index = (UCHAR) (MCS);
+
+		if (rate_index < 0)
+			rate_index = 0;
+		if (rate_index >=
+		    (sizeof (ralinkrate) / sizeof (ralinkrate[0])))
+			rate_index =
+			    (sizeof (ralinkrate) / sizeof (ralinkrate[0])) - 1;
+
+		ph->rate.did = DIDmsg_lnxind_wlansniffrm_rate;
+		ph->rate.status = 0;
+		ph->rate.len = 4;
+		/* real rate = ralinkrate[rate_index] / 2 */
+		ph->rate.data = ralinkrate[rate_index];
+
+		ph->frmlen.did = DIDmsg_lnxind_wlansniffrm_frmlen;
+		ph->frmlen.status = 0;
+		ph->frmlen.len = 4;
+		ph->frmlen.data = (u_int32_t) DataSize;
+	}
+#ifdef MONITOR_FLAG_11N_SNIFFER_SUPPORT
+	else {
+		ph_11n33 = &h;
+		NdisZeroMemory((unsigned char *)ph_11n33,
+			       sizeof (ETHEREAL_RADIO));
+
+		/*802.11n fields */
+		if (MCS > 15)
+			ph_11n33->Flag_80211n |= WIRESHARK_11N_FLAG_3x3;
+
+		if (PHYMODE == MODE_HTGREENFIELD)
+			ph_11n33->Flag_80211n |= WIRESHARK_11N_FLAG_GF;
+
+		if (BW == 1) {
+			ph_11n33->Flag_80211n |= WIRESHARK_11N_FLAG_BW40;
+		} else if (Channel < CentralChannel) {
+			ph_11n33->Flag_80211n |= WIRESHARK_11N_FLAG_BW20U;
+		} else if (Channel > CentralChannel) {
+			ph_11n33->Flag_80211n |= WIRESHARK_11N_FLAG_BW20D;
+		} else {
+			ph_11n33->Flag_80211n |=
+			    (WIRESHARK_11N_FLAG_BW20U |
+			     WIRESHARK_11N_FLAG_BW20D);
+		}
+
+		if (ShortGI == 1)
+			ph_11n33->Flag_80211n |= WIRESHARK_11N_FLAG_SGI;
+
+		/* RXD_STRUC   PRT28XX_RXD_STRUC pRxD = &(pRxBlk->RxD); */
+		if (AMPDU)
+			ph_11n33->Flag_80211n |= WIRESHARK_11N_FLAG_AMPDU;
+
+		if (STBC)
+			ph_11n33->Flag_80211n |= WIRESHARK_11N_FLAG_STBC;
+
+		ph_11n33->signal_level = (UCHAR) RSSI1;
+
+		/* data_rate is the rate index in the wireshark rate table */
+		if (PHYMODE >= MODE_HTMIX) {
+			if (MCS == 32) {
+				if (ShortGI)
+					ph_11n33->data_rate = 16;
+				else
+					ph_11n33->data_rate = 4;
+			} else if (MCS > 15)
+				ph_11n33->data_rate =
+				    (16 * 4 + ((UCHAR) BW * 16) +
+				     ((UCHAR) ShortGI * 32) + ((UCHAR) MCS));
+			else
+				ph_11n33->data_rate =
+				    16 + ((UCHAR) BW * 16) +
+				    ((UCHAR) ShortGI * 32) + ((UCHAR) MCS);
+		} else if (PHYMODE == MODE_OFDM)
+			ph_11n33->data_rate = (UCHAR) (MCS) + 4;
+		else
+			ph_11n33->data_rate = (UCHAR) (MCS);
+
+		/*channel field */
+		ph_11n33->channel = (UCHAR) Channel;
+
+		NdisMoveMemory(skb_put(pOSPkt, sizeof (ETHEREAL_RADIO)),
+			       (UCHAR *) ph_11n33, sizeof (ETHEREAL_RADIO));
+	}
+#endif /* MONITOR_FLAG_11N_SNIFFER_SUPPORT */
+
+	pOSPkt->pkt_type = PACKET_OTHERHOST;
+	pOSPkt->protocol = eth_type_trans(pOSPkt, pOSPkt->dev);
+	pOSPkt->ip_summed = CHECKSUM_NONE;
+	netif_rx(pOSPkt);
+
+	return;
+
+      err_free_sk_buff:
+	RELEASE_NDIS_PACKET(NULL, pRxPacket, NDIS_STATUS_FAILURE);
+	return;
+
+}
+#endif /* CONFIG_STA_SUPPORT */
+
+
+/*******************************************************************************
+
+	File open/close related functions.
+
+ *******************************************************************************/
+RTMP_OS_FD RtmpOSFileOpen(char *pPath,
+			  int flag,
+			  int mode) {
+	struct file *filePtr;
+
+	if (flag == RTMP_FILE_RDONLY)
+		flag = O_RDONLY;
+	else if (flag == RTMP_FILE_WRONLY)
+		flag = O_WRONLY;
+	else if (flag == RTMP_FILE_CREAT)
+		flag = O_CREAT;
+	else if (flag == RTMP_FILE_TRUNC)
+		flag = O_TRUNC;
+
+	filePtr = filp_open(pPath, flag, 0);
+	if (IS_ERR(filePtr)) {
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("%s(): Error %ld opening %s\n", __FUNCTION__,
+			  -PTR_ERR(filePtr), pPath));
+	}
+
+	return (RTMP_OS_FD) filePtr;
+}
+
+int RtmpOSFileClose(RTMP_OS_FD osfd) {
+	filp_close(osfd, NULL);
+	return 0;
+}
+
+void RtmpOSFileSeek(RTMP_OS_FD osfd,
+		    int offset) {
+	osfd->f_pos = offset;
+}
+
+int RtmpOSFileRead(RTMP_OS_FD osfd,
+		     char *pDataPtr, int readLen) {
+	/* The object must have a read method */
+	if (osfd->f_op && osfd->f_op->read) {
+		return osfd->f_op->read(osfd, pDataPtr, readLen, &osfd->f_pos);
+	} else {
+		DBGPRINT(RT_DEBUG_ERROR, ("no file read method\n"));
+		return -1;
+	}
+}
+
+int RtmpOSFileWrite(RTMP_OS_FD osfd,
+		    char *pDataPtr, int writeLen) {
+	return osfd->f_op->write(osfd,
+				 pDataPtr,
+				 (
+	size_t) writeLen,
+				 &osfd->f_pos);
+}
+
+static inline void __RtmpOSFSInfoChange(OS_FS_INFO * pOSFSInfo,
+					BOOLEAN bSet) {
+	if (bSet) {
+		/* Save uid and gid used for filesystem access. */
+		/* Set user and group to 0 (root) */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
+		pOSFSInfo->fsuid = current->fsuid;
+		pOSFSInfo->fsgid = current->fsgid;
+		current->fsuid = current->fsgid = 0;
+#else
+		pOSFSInfo->fsuid = current_fsuid();
+		pOSFSInfo->fsgid = current_fsgid();
+#endif
+		pOSFSInfo->fs = get_fs();
+		set_fs(KERNEL_DS);
+	} else {
+		set_fs(pOSFSInfo->fs);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
+		current->fsuid = pOSFSInfo->fsuid;
+		current->fsgid = pOSFSInfo->fsgid;
+#endif
+	}
+}
+
+/*******************************************************************************
+
+	Task create/management/kill related functions.
+
+ *******************************************************************************/
+static inline NDIS_STATUS __RtmpOSTaskKill(IN OS_TASK *pTask) {
+/*	RTMP_ADAPTER *pAd; */
+	int ret = NDIS_STATUS_FAILURE;
+
+/*	pAd = (RTMP_ADAPTER *)pTask->priv; */
+
+#ifdef KTHREAD_SUPPORT
+	if (pTask->kthread_task) {
+		kthread_stop(pTask->kthread_task);
+		ret = NDIS_STATUS_SUCCESS;
+	}
+#else
+	CHECK_PID_LEGALITY(pTask->taskPID) {
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("Terminate the task(%s) with pid(%d)!\n",
+			  pTask->taskName, GET_PID_NUMBER(pTask->taskPID)));
+		mb();
+		pTask->task_killed = 1;
+		mb();
+		ret = KILL_THREAD_PID(pTask->taskPID, SIGTERM, 1);
+		if (ret) {
+			printk(KERN_WARNING
+			       "kill task(%s) with pid(%d) failed(retVal=%d)!\n",
+			       pTask->taskName, GET_PID_NUMBER(pTask->taskPID),
+			       ret);
+		} else {
+			wait_for_completion(&pTask->taskComplete);
+			pTask->taskPID = THREAD_PID_INIT_VALUE;
+			pTask->task_killed = 0;
+			RTMP_SEM_EVENT_DESTORY(&pTask->taskSema);
+			ret = NDIS_STATUS_SUCCESS;
+		}
+	}
+#endif
+
+	return ret;
+
+}
+
+static inline INT __RtmpOSTaskNotifyToExit(IN OS_TASK *pTask) {
+
+#ifndef KTHREAD_SUPPORT
+	pTask->taskPID = THREAD_PID_INIT_VALUE;
+	complete_and_exit(&pTask->taskComplete, 0);
+#endif
+
+	return 0;
+}
+
+static inline void __RtmpOSTaskCustomize(IN OS_TASK *pTask) {
+
+#ifndef KTHREAD_SUPPORT
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+	daemonize((PSTRING) & pTask->taskName[0] /*"%s",pAd->net_dev->name */ );
+
+	allow_signal(SIGTERM);
+	allow_signal(SIGKILL);
+	current->flags |= PF_NOFREEZE;
+#else
+	unsigned long flags;
+
+	daemonize();
+	reparent_to_init();
+	strcpy(current->comm, &pTask->taskName[0]);
+
+	siginitsetinv(&current->blocked, sigmask(SIGTERM) | sigmask(SIGKILL));
+
+	/* Allow interception of SIGKILL only
+	 * Don't allow other signals to interrupt the transmission */
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
+	spin_lock_irqsave(&current->sigmask_lock, flags);
+	flush_signals(current);
+	recalc_sigpending(current);
+	spin_unlock_irqrestore(&current->sigmask_lock, flags);
+#endif
+#endif
+
+	RTMP_GET_OS_PID(pTask->taskPID, current->pid);
+
+	/* signal that we've started the thread */
+	complete(&pTask->taskComplete);
+
+#endif
+}
+
+static inline NDIS_STATUS __RtmpOSTaskAttach(IN OS_TASK *pTask,
+					     IN RTMP_OS_TASK_CALLBACK fn,
+					     IN ULONG arg) {
+	NDIS_STATUS status = NDIS_STATUS_SUCCESS;
+#ifndef KTHREAD_SUPPORT
+	pid_t pid_number = -1;
+#endif /* KTHREAD_SUPPORT */
+
+#ifdef KTHREAD_SUPPORT
+	pTask->task_killed = 0;
+	pTask->kthread_task = NULL;
+	pTask->kthread_task =
+	    kthread_run((cast_fn) fn, (void *)arg, pTask->taskName);
+	if (IS_ERR(pTask->kthread_task))
+		status = NDIS_STATUS_FAILURE;
+#else
+	pid_number =
+	    kernel_thread((cast_fn) fn, (void *)arg, RTMP_OS_MGMT_TASK_FLAGS);
+	if (pid_number < 0) {
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("Attach task(%s) failed!\n", pTask->taskName));
+		status = NDIS_STATUS_FAILURE;
+	} else {
+		/* Wait for the thread to start */
+		wait_for_completion(&pTask->taskComplete);
+		status = NDIS_STATUS_SUCCESS;
+	}
+#endif
+	return status;
+}
+
+static inline NDIS_STATUS __RtmpOSTaskInit(IN OS_TASK *pTask,
+					   IN PSTRING pTaskName,
+					   IN VOID *pPriv,
+					   IN LIST_HEADER *pSemList) {
+	int len;
+
+	ASSERT(pTask);
+
+#ifndef KTHREAD_SUPPORT
+	NdisZeroMemory((PUCHAR) (pTask), sizeof (OS_TASK));
+#endif
+
+	len = strlen(pTaskName);
+	len =
+	    len >
+	    (RTMP_OS_TASK_NAME_LEN - 1) ? (RTMP_OS_TASK_NAME_LEN - 1) : len;
+	NdisMoveMemory(&pTask->taskName[0], pTaskName, len);
+	pTask->priv = pPriv;
+
+#ifndef KTHREAD_SUPPORT
+	RTMP_SEM_EVENT_INIT_LOCKED(&(pTask->taskSema), pSemList);
+	pTask->taskPID = THREAD_PID_INIT_VALUE;
+	init_completion(&pTask->taskComplete);
+#endif
+
+#ifdef KTHREAD_SUPPORT
+	init_waitqueue_head(&(pTask->kthread_q));
+#endif /* KTHREAD_SUPPORT */
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+BOOLEAN __RtmpOSTaskWait(IN VOID *pReserved,
+			 IN OS_TASK *pTask,
+			 IN INT32 *pStatus) {
+#ifdef KTHREAD_SUPPORT
+	RTMP_WAIT_EVENT_INTERRUPTIBLE((*pStatus), pTask);
+
+	if ((pTask->task_killed == 1) || ((*pStatus) != 0))
+		return FALSE;
+#else
+
+	RTMP_SEM_EVENT_WAIT(&(pTask->taskSema), (*pStatus));
+
+	/* unlock the device pointers */
+	if ((*pStatus) != 0) {
+/*		RTMP_SET_FLAG_(*pFlags, fRTMP_ADAPTER_HALT_IN_PROGRESS); */
+		return FALSE;
+	}
+#endif /* KTHREAD_SUPPORT */
+
+	return TRUE;
+}
+
+
+#if LINUX_VERSION_CODE <= 0x20402	/* Red Hat 7.1 */
+struct net_device *alloc_netdev(
+	int sizeof_priv,
+	const char *mask,
+	void (*setup) (struct net_device *))
+{
+	struct net_device *dev;
+	INT alloc_size;
+
+	/* ensure 32-byte alignment of the private area */
+	alloc_size = sizeof (*dev) + sizeof_priv + 31;
+
+	dev = (struct net_device *)kmalloc(alloc_size, GFP_KERNEL);
+	if (dev == NULL) {
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("alloc_netdev: Unable to allocate device memory.\n"));
+		return NULL;
+	}
+
+	memset(dev, 0, alloc_size);
+
+	if (sizeof_priv)
+		dev->priv = (void *)(((long)(dev + 1) + 31) & ~31);
+
+	setup(dev);
+	strcpy(dev->name, mask);
+
+	return dev;
+}
+#endif /* LINUX_VERSION_CODE */
+
+static UINT32 RtmpOSWirelessEventTranslate(IN UINT32 eventType) {
+	switch (eventType) {
+	case RT_WLAN_EVENT_CUSTOM:
+		eventType = IWEVCUSTOM;
+		break;
+
+	case RT_WLAN_EVENT_CGIWAP:
+		eventType = SIOCGIWAP;
+		break;
+
+#if WIRELESS_EXT > 17
+	case RT_WLAN_EVENT_ASSOC_REQ_IE:
+		eventType = IWEVASSOCREQIE;
+		break;
+#endif /* WIRELESS_EXT */
+
+#if WIRELESS_EXT >= 14
+	case RT_WLAN_EVENT_SCAN:
+		eventType = SIOCGIWSCAN;
+		break;
+#endif /* WIRELESS_EXT */
+
+	case RT_WLAN_EVENT_EXPIRED:
+		eventType = IWEVEXPIRED;
+		break;
+
+	default:
+		printk("Unknown event: %d\n", eventType);
+		break;
+	}
+
+	return eventType;
+}
+
+int RtmpOSWrielessEventSend(IN PNET_DEV pNetDev,
+			    IN UINT32 eventType,
+			    IN INT flags,
+			    IN PUCHAR pSrcMac,
+			    IN PUCHAR pData,
+			    IN UINT32 dataLen) {
+	union iwreq_data wrqu;
+
+	/* translate event type */
+	eventType = RtmpOSWirelessEventTranslate(eventType);
+
+	memset(&wrqu, 0, sizeof (wrqu));
+
+	if (flags > -1)
+		wrqu.data.flags = flags;
+
+	if (pSrcMac)
+		memcpy(wrqu.ap_addr.sa_data, pSrcMac, MAC_ADDR_LEN);
+
+	if ((pData != NULL) && (dataLen > 0))
+		wrqu.data.length = dataLen;
+
+	wireless_send_event(pNetDev, eventType, &wrqu, (char *)pData);
+	return 0;
+}
+
+int RtmpOSWrielessEventSendExt(IN PNET_DEV pNetDev,
+			       IN UINT32 eventType,
+			       IN INT flags,
+			       IN PUCHAR pSrcMac,
+			       IN PUCHAR pData,
+			       IN UINT32 dataLen,
+			       IN UINT32 family) {
+	union iwreq_data wrqu;
+
+	/* translate event type */
+	eventType = RtmpOSWirelessEventTranslate(eventType);
+
+	/* translate event type */
+	memset(&wrqu, 0, sizeof (wrqu));
+
+	if (flags > -1)
+		wrqu.data.flags = flags;
+
+	if (pSrcMac)
+		memcpy(wrqu.ap_addr.sa_data, pSrcMac, MAC_ADDR_LEN);
+
+	if ((pData != NULL) && (dataLen > 0))
+		wrqu.data.length = dataLen;
+
+	wrqu.addr.sa_family = family;
+
+	wireless_send_event(pNetDev, eventType, &wrqu, (char *)pData);
+	return 0;
+}
+
+int RtmpOSNetDevAddrSet(IN UCHAR OpMode,
+			IN PNET_DEV pNetDev,
+			IN PUCHAR pMacAddr,
+			IN PUCHAR dev_name) {
+	struct net_device *net_dev;
+/*	RTMP_ADAPTER *pAd; */
+
+	net_dev = pNetDev;
+/*	GET_PAD_FROM_NET_DEV(pAd, net_dev); */
+
+#ifdef CONFIG_STA_SUPPORT
+	/* work-around for the SuSE due to it has it's own interface name management system. */
+	RT_CONFIG_IF_OPMODE_ON_STA(OpMode) {
+/*		NdisZeroMemory(pAd->StaCfg.dev_name, 16); */
+/*		NdisMoveMemory(pAd->StaCfg.dev_name, net_dev->name, strlen(net_dev->name)); */
+		NdisZeroMemory(dev_name, 16);
+		NdisMoveMemory(dev_name, net_dev->name, strlen(net_dev->name));
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	NdisMoveMemory(net_dev->dev_addr, pMacAddr, 6);
+
+	return 0;
+}
+
+/*
+  *	Assign the network dev name for created Ralink WiFi interface.
+  */
+static int RtmpOSNetDevRequestName(IN INT32 MC_RowID,
+				   IN UINT32 *pIoctlIF,
+				   IN PNET_DEV dev,
+				   IN PSTRING pPrefixStr,
+				   IN INT devIdx) {
+	PNET_DEV existNetDev;
+	STRING suffixName[IFNAMSIZ];
+	STRING desiredName[IFNAMSIZ];
+	int ifNameIdx,
+	 prefixLen,
+	 slotNameLen;
+	int Status;
+
+	prefixLen = strlen(pPrefixStr);
+	ASSERT((prefixLen < IFNAMSIZ));
+
+	for (ifNameIdx = devIdx; ifNameIdx < 32; ifNameIdx++) {
+		memset(suffixName, 0, IFNAMSIZ);
+		memset(desiredName, 0, IFNAMSIZ);
+		strncpy(&desiredName[0], pPrefixStr, prefixLen);
+
+#ifdef MULTIPLE_CARD_SUPPORT
+		if (MC_RowID >= 0)
+			sprintf(suffixName, "%02d_%d", MC_RowID, ifNameIdx);
+		else
+#endif /* MULTIPLE_CARD_SUPPORT */
+			sprintf(suffixName, "%d", ifNameIdx);
+
+		slotNameLen = strlen(suffixName);
+		ASSERT(((slotNameLen + prefixLen) < IFNAMSIZ));
+		strcat(desiredName, suffixName);
+
+		existNetDev = RtmpOSNetDevGetByName(dev, &desiredName[0]);
+		if (existNetDev == NULL)
+			break;
+		else
+			RtmpOSNetDeviceRefPut(existNetDev);
+	}
+
+	if (ifNameIdx < 32) {
+#ifdef HOSTAPD_SUPPORT
+		*pIoctlIF = ifNameIdx;
+#endif /*HOSTAPD_SUPPORT */
+		strcpy(&dev->name[0], &desiredName[0]);
+		Status = NDIS_STATUS_SUCCESS;
+	} else {
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("Cannot request DevName with preifx(%s) and in range(0~32) as suffix from OS!\n",
+			  pPrefixStr));
+		Status = NDIS_STATUS_FAILURE;
+	}
+
+	return Status;
+}
+
+void RtmpOSNetDevClose(IN PNET_DEV pNetDev) {
+	dev_close(pNetDev);
+}
+
+void RtmpOSNetDevFree(PNET_DEV pNetDev) {
+	ASSERT(pNetDev);
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+	free_netdev(pNetDev);
+#else
+	kfree(pNetDev);
+#endif
+}
+
+INT RtmpOSNetDevAlloc(IN PNET_DEV *new_dev_p,
+		      IN UINT32 privDataSize) {
+	/* assign it as null first. */
+	*new_dev_p = NULL;
+
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("Allocate a net device with private data size=%d!\n",
+		  privDataSize));
+#if LINUX_VERSION_CODE <= 0x20402	/* Red Hat 7.1 */
+	*new_dev_p = alloc_netdev(privDataSize, "eth%d", ether_setup);
+#else
+	*new_dev_p = alloc_etherdev(privDataSize);
+#endif /* LINUX_VERSION_CODE */
+
+	if (*new_dev_p)
+		return NDIS_STATUS_SUCCESS;
+	else
+		return NDIS_STATUS_FAILURE;
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,31)
+INT RtmpOSNetDevOpsAlloc(IN PVOID *pNetDevOps) {
+	*pNetDevOps = (PVOID) vmalloc(sizeof (struct net_device_ops));
+	if (*pNetDevOps) {
+		NdisZeroMemory(*pNetDevOps, sizeof (struct net_device_ops));
+		return NDIS_STATUS_SUCCESS;
+	} else {
+		return NDIS_STATUS_FAILURE;
+	}
+}
+#endif
+PNET_DEV RtmpOSNetDevGetByName(PNET_DEV pNetDev,
+			       PSTRING pDevName) {
+	PNET_DEV pTargetNetDev = NULL;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
+	pTargetNetDev = dev_get_by_name(dev_net(pNetDev), pDevName);
+#else
+	ASSERT(pNetDev);
+	pTargetNetDev = dev_get_by_name(pNetDev->nd_net, pDevName);
+#endif
+#else
+	pTargetNetDev = dev_get_by_name(pDevName);
+#endif /* KERNEL_VERSION(2,6,24) */
+
+#else
+	int devNameLen;
+
+	devNameLen = strlen(pDevName);
+	ASSERT((devNameLen <= IFNAMSIZ));
+
+	for (pTargetNetDev = dev_base; pTargetNetDev != NULL;
+	     pTargetNetDev = pTargetNetDev->next) {
+		if (strncmp(pTargetNetDev->name, pDevName, devNameLen) == 0)
+			break;
+	}
+#endif /* KERNEL_VERSION(2,5,0) */
+
+	return pTargetNetDev;
+}
+
+void RtmpOSNetDeviceRefPut(PNET_DEV pNetDev) {
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+	/* 
+	   every time dev_get_by_name is called, and it has returned a valid struct 
+	   net_device*, dev_put should be called afterwards, because otherwise the 
+	   machine hangs when the device is unregistered (since dev->refcnt > 1).
+	 */
+	if (pNetDev)
+		dev_put(pNetDev);
+#endif /* LINUX_VERSION_CODE */
+}
+
+INT RtmpOSNetDevDestory(IN VOID *pReserved,
+			IN PNET_DEV pNetDev) {
+
+	/* TODO: Need to fix this */
+	printk("WARNING: This function(%s) not implement yet!!!\n",
+	       __FUNCTION__);
+	return 0;
+}
+
+void RtmpOSNetDevDetach(PNET_DEV pNetDev) {
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,31)
+	struct net_device_ops *pNetDevOps = (struct net_device_ops *)pNetDev->netdev_ops;
+#endif
+
+	unregister_netdev(pNetDev);
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,31)
+	vfree(pNetDevOps);
+#endif
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
+static void RALINK_ET_DrvInfoGet(IN struct net_device *pDev,
+				 IN struct ethtool_drvinfo *pInfo) {
+	strcpy(pInfo->driver, "RALINK WLAN");
+
+
+	sprintf(pInfo->bus_info,
+		"CSR 0x%lx",
+		pDev->base_addr);
+} static struct ethtool_ops RALINK_Ethtool_Ops = {
+.get_drvinfo = RALINK_ET_DrvInfoGet,};
+#endif /* LINUX_VERSION_CODE */
+
+int RtmpOSNetDevAttach(IN UCHAR OpMode,
+		       IN PNET_DEV pNetDev,
+		       IN RTMP_OS_NETDEV_OP_HOOK *pDevOpHook) {
+	int ret,
+	 rtnl_locked = FALSE;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,31)
+	struct net_device_ops *pNetDevOps = (struct net_device_ops *)pNetDev->netdev_ops;
+#endif
+
+	DBGPRINT(RT_DEBUG_TRACE, ("RtmpOSNetDevAttach()--->\n"));
+
+	/* If we need hook some callback function to the net device structrue, now do it. */
+	if (pDevOpHook) {
+/*		PRTMP_ADAPTER pAd = NULL; */
+
+/*		GET_PAD_FROM_NET_DEV(pAd, pNetDev); */
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,31)
+		pNetDevOps->ndo_open = pDevOpHook->open;
+		pNetDevOps->ndo_stop = pDevOpHook->stop;
+		pNetDevOps->ndo_start_xmit =
+		    (HARD_START_XMIT_FUNC) (pDevOpHook->xmit);
+		pNetDevOps->ndo_do_ioctl = pDevOpHook->ioctl;
+#else
+		pNetDev->open = pDevOpHook->open;
+		pNetDev->stop = pDevOpHook->stop;
+		pNetDev->hard_start_xmit =
+		    (HARD_START_XMIT_FUNC) (pDevOpHook->xmit);
+		pNetDev->do_ioctl = pDevOpHook->ioctl;
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
+		pNetDev->ethtool_ops = &RALINK_Ethtool_Ops;
+#endif
+
+		/* if you don't implement get_stats, just leave the callback function as NULL, a dummy 
+		   function will make kernel panic.
+		 */
+		if (pDevOpHook->get_stats)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,31)
+			pNetDevOps->ndo_get_stats = pDevOpHook->get_stats;
+#else
+			pNetDev->get_stats = pDevOpHook->get_stats;
+#endif
+
+		/* OS specific flags, here we used to indicate if we are virtual interface */
+		pNetDev->priv_flags = pDevOpHook->priv_flags;
+
+#if (WIRELESS_EXT < 21) && (WIRELESS_EXT >= 12)
+/*		pNetDev->get_wireless_stats = rt28xx_get_wireless_stats; */
+		pNetDev->get_wireless_stats = pDevOpHook->get_wstats;
+#endif
+
+#ifdef CONFIG_STA_SUPPORT
+#if WIRELESS_EXT >= 12
+		if (OpMode == OPMODE_STA) {
+/*			pNetDev->wireless_handlers = &rt28xx_iw_handler_def; */
+			pNetDev->wireless_handlers = pDevOpHook->iw_handler;
+		}
+#endif /*WIRELESS_EXT >= 12 */
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef CONFIG_APSTA_MIXED_SUPPORT
+#if WIRELESS_EXT >= 12
+		if (OpMode == OPMODE_AP) {
+/*			pNetDev->wireless_handlers = &rt28xx_ap_iw_handler_def; */
+			pNetDev->wireless_handlers = pDevOpHook->iw_handler;
+		}
+#endif /*WIRELESS_EXT >= 12 */
+#endif /* CONFIG_APSTA_MIXED_SUPPORT */
+
+		/* copy the net device mac address to the net_device structure. */
+		NdisMoveMemory(pNetDev->dev_addr, &pDevOpHook->devAddr[0],
+			       MAC_ADDR_LEN);
+
+		rtnl_locked = pDevOpHook->needProtcted;
+
+	}
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,31)
+	pNetDevOps->ndo_validate_addr = NULL;
+	/*pNetDev->netdev_ops = ops; */
+#else
+	pNetDev->validate_addr = NULL;
+#endif
+#endif
+
+	if (rtnl_locked)
+		ret = register_netdevice(pNetDev);
+	else
+		ret = register_netdev(pNetDev);
+
+	netif_stop_queue(pNetDev);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<---RtmpOSNetDevAttach(), ret=%d\n", ret));
+	if (ret == 0)
+		return NDIS_STATUS_SUCCESS;
+	else
+		return NDIS_STATUS_FAILURE;
+}
+
+PNET_DEV RtmpOSNetDevCreate(IN INT32 MC_RowID,
+			    IN UINT32 *pIoctlIF,
+			    IN INT devType,
+			    IN INT devNum,
+			    IN INT privMemSize,
+			    IN PSTRING pNamePrefix) {
+	struct net_device *pNetDev = NULL;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,31)
+	struct net_device_ops *pNetDevOps = NULL;
+#endif
+	int status;
+
+	/* allocate a new network device */
+	status = RtmpOSNetDevAlloc(&pNetDev, 0 /*privMemSize */ );
+	if (status != NDIS_STATUS_SUCCESS) {
+		/* allocation fail, exit */
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("Allocate network device fail (%s)...\n",
+			  pNamePrefix));
+		return NULL;
+	}
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,31)
+	status = RtmpOSNetDevOpsAlloc((PVOID) & pNetDevOps);
+	if (status != NDIS_STATUS_SUCCESS) {
+		/* error! no any available ra name can be used! */
+		DBGPRINT(RT_DEBUG_TRACE, ("Allocate net device ops fail!\n"));
+		RtmpOSNetDevFree(pNetDev);
+
+		return NULL;
+	} else {
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("Allocate net device ops success!\n"));
+		pNetDev->netdev_ops = pNetDevOps;
+	}
+#endif
+	/* find a available interface name, max 32 interfaces */
+	status =
+	    RtmpOSNetDevRequestName(MC_RowID, pIoctlIF, pNetDev, pNamePrefix,
+				    devNum);
+	if (status != NDIS_STATUS_SUCCESS) {
+		/* error! no any available ra name can be used! */
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("Assign interface name (%s with suffix 0~32) failed...\n",
+			  pNamePrefix));
+		RtmpOSNetDevFree(pNetDev);
+
+		return NULL;
+	} else {
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("The name of the new %s interface is %s...\n",
+			  pNamePrefix, pNetDev->name));
+	}
+
+	return pNetDev;
+}
+
+
+
+/*
+========================================================================
+Routine Description:
+    Allocate memory for adapter control block.
+
+Arguments:
+    pAd					Pointer to our adapter
+
+Return Value:
+	NDIS_STATUS_SUCCESS
+	NDIS_STATUS_FAILURE
+	NDIS_STATUS_RESOURCES
+
+Note:
+========================================================================
+*/
+NDIS_STATUS AdapterBlockAllocateMemory(IN PVOID handle,
+				       OUT PVOID *ppAd,
+				       IN UINT32 SizeOfpAd) {
+/*	RTMP_ADAPTER *pAd; */
+#ifdef WORKQUEUE_BH
+/*	POS_COOKIE cookie; */
+#endif /* WORKQUEUE_BH */
+
+
+#ifdef OS_ABL_FUNC_SUPPORT
+	/* get offset for sk_buff */
+	{
+		struct sk_buff *pPkt = NULL;
+
+		pPkt = kmalloc(sizeof (struct sk_buff), GFP_ATOMIC);
+		if (pPkt == NULL) {
+			*ppAd = NULL;
+			return (NDIS_STATUS_FAILURE);
+		}
+
+		RTPktOffsetData = (ULONG) (&(pPkt->data)) - (ULONG) pPkt;
+		RTPktOffsetLen = (ULONG) (&(pPkt->len)) - (ULONG) pPkt;
+		RTPktOffsetCB = (ULONG) (pPkt->cb) - (ULONG) pPkt;
+		kfree(pPkt);
+
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("packet> data offset = %lu\n", RTPktOffsetData));
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("packet> len offset = %lu\n", RTPktOffsetLen));
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("packet> cb offset = %lu\n", RTPktOffsetCB));
+	}
+#endif /* OS_ABL_FUNC_SUPPORT */
+
+/*	*ppAd = (PVOID)vmalloc(sizeof(RTMP_ADAPTER)); //pci_alloc_consistent(pci_dev, sizeof(RTMP_ADAPTER), phy_addr); */
+	*ppAd = (PVOID) vmalloc(SizeOfpAd);	/*pci_alloc_consistent(pci_dev, sizeof(RTMP_ADAPTER), phy_addr); */
+/*	pAd = (RTMP_ADAPTER *)(*ppAd); */
+	if (*ppAd) {
+		NdisZeroMemory(*ppAd, SizeOfpAd);
+
+		return (NDIS_STATUS_SUCCESS);
+	} else {
+		return (NDIS_STATUS_FAILURE);
+	}
+}
+
+/* ========================================================================== */
+
+UINT RtmpOsWirelessExtVerGet(VOID) {
+	return WIRELESS_EXT;
+}
+
+VOID RtmpDrvAllMacPrint(IN VOID *pReserved,
+			IN UINT32 *pBufMac,
+			IN UINT32 AddrStart,
+			IN UINT32 AddrEnd,
+			IN UINT32 AddrStep) {
+	struct file *file_w;
+	PSTRING fileName = "MacDump.txt";
+	mm_segment_t orig_fs;
+	STRING *msg;//[1024];
+	ULONG macAddr = 0;
+	UINT32 macValue = 0;
+
+	os_alloc_mem(NULL, (UCHAR **)&msg, 1024);
+
+	if (msg)
+	{
+		orig_fs = get_fs();
+		set_fs(KERNEL_DS);
+
+		/* open file */
+		file_w = filp_open(fileName, O_WRONLY | O_CREAT, 0);
+		if (IS_ERR(file_w)) {
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("-->2) %s: Error %ld opening %s\n", __FUNCTION__,
+				  -PTR_ERR(file_w), fileName));
+		} else {
+			if (file_w->f_op && file_w->f_op->write) {
+				file_w->f_pos = 0;
+				macAddr = AddrStart;
+
+				while (macAddr <= AddrEnd) {
+	/*				RTMP_IO_READ32(pAd, macAddr, &macValue); // sample */
+					macValue = *pBufMac++;
+					sprintf(msg, "%08lx = %08X\n", macAddr,
+						macValue);
+
+					/* write data to file */
+					file_w->f_op->write(file_w, msg, strlen(msg),
+							    &file_w->f_pos);
+
+					printk("%s", msg);
+					macAddr += AddrStep;
+				}
+				sprintf(msg, "\nDump all MAC values to %s\n", fileName);
+			}
+			filp_close(file_w, NULL);
+		}
+		set_fs(orig_fs);
+		os_free_mem(NULL, msg);
+	}
+}
+
+VOID RtmpDrvAllE2PPrint(IN VOID *pReserved,
+			IN USHORT *pMacContent,
+			IN UINT32 AddrEnd,
+			IN UINT32 AddrStep) {
+	struct file *file_w;
+	PSTRING fileName = "EEPROMDump.txt";
+	mm_segment_t orig_fs;
+	STRING *msg;//[1024];
+	USHORT eepAddr = 0;
+	USHORT eepValue;
+
+	os_alloc_mem(NULL, (UCHAR **)&msg, 1024);
+
+	if (msg)
+	{
+		orig_fs = get_fs();
+		set_fs(KERNEL_DS);
+		
+		/* open file */
+		file_w = filp_open(fileName, O_WRONLY | O_CREAT, 0);
+		if (IS_ERR(file_w)) {
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("-->2) %s: Error %ld opening %s\n", __FUNCTION__,
+				  -PTR_ERR(file_w), fileName));
+		} else {
+			if (file_w->f_op && file_w->f_op->write) {
+				file_w->f_pos = 0;
+				eepAddr = 0x00;
+
+	/*			while (eepAddr <= 0xFE) */
+				while (eepAddr <= AddrEnd) {
+	/*				RT28xx_EEPROM_READ16(pAd, eepAddr, eepValue); // sample */
+					eepValue = *pMacContent;
+					sprintf(msg, "%08x = %04x\n", eepAddr,
+						eepValue);
+
+					/* write data to file */
+					file_w->f_op->write(file_w, msg, strlen(msg),
+							    &file_w->f_pos);
+
+					printk("%s", msg);
+					eepAddr += AddrStep;
+					pMacContent += (AddrStep/2);
+				}
+				sprintf(msg, "\nDump all EEPROM values to %s\n",
+					fileName);
+			}
+			filp_close(file_w, NULL);
+		}
+		set_fs(orig_fs);
+		os_free_mem(NULL, msg);
+	}
+}
+
+/*
+========================================================================
+Routine Description:
+	Check if the network interface is up.
+
+Arguments:
+	*pDev			- Network Interface
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+BOOLEAN RtmpOSNetDevIsUp(IN VOID *pDev) {
+	struct net_device *pNetDev = (struct net_device *)pDev;
+
+	if ((pNetDev == NULL) || !(pNetDev->flags & IFF_UP))
+		return FALSE;
+
+	return TRUE;
+}
+
+/*
+========================================================================
+Routine Description:
+	Wake up the command thread.
+
+Arguments:
+	pAd				- WLAN control block pointer
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsCmdUp(IN RTMP_OS_TASK *pCmdQTask) {
+#ifdef KTHREAD_SUPPORT
+	do {
+		OS_TASK *pTask = RTMP_OS_TASK_GET(pCmdQTask);
+		{
+			pTask->kthread_running = TRUE;
+			wake_up(&pTask->kthread_q);
+		}
+	} while (0);
+#else
+	do {
+		OS_TASK *pTask = RTMP_OS_TASK_GET(pCmdQTask);
+		CHECK_PID_LEGALITY(pTask->taskPID) {
+			RTMP_SEM_EVENT_UP(&(pTask->taskSema));
+		}
+	} while (0);
+#endif /* KTHREAD_SUPPORT */
+}
+
+/*
+========================================================================
+Routine Description:
+	Wake up USB Mlme thread.
+
+Arguments:
+	pAd				- WLAN control block pointer
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsMlmeUp(IN RTMP_OS_TASK *pMlmeQTask) {
+#ifdef RTMP_USB_SUPPORT
+/*	OS_RTUSBMlmeUp(pMlmeQTask); */
+
+#ifdef KTHREAD_SUPPORT
+	do {
+		OS_TASK *pTask = RTMP_OS_TASK_GET(pMlmeQTask);
+		if ((pTask != NULL) && (pTask->kthread_task)) {
+			pTask->kthread_running = TRUE;
+			wake_up(&pTask->kthread_q);
+		}
+	} while (0);
+#else
+	do {
+		OS_TASK *pTask = RTMP_OS_TASK_GET(pMlmeQTask);
+		if (pTask != NULL) {
+			CHECK_PID_LEGALITY(pTask->taskPID) {
+				RTMP_SEM_EVENT_UP(&(pTask->taskSema));
+			}
+		}
+	} while (0);
+#endif /* KTHREAD_SUPPORT */
+#endif /* RTMP_USB_SUPPORT */
+}
+
+/*
+========================================================================
+Routine Description:
+	Check if the file is error.
+
+Arguments:
+	pFile			- the file
+
+Return Value:
+	OK or any error
+
+Note:
+	rt_linux.h, not rt_drv.h
+========================================================================
+*/
+INT32 RtmpOsFileIsErr(IN VOID *pFile) {
+	return IS_FILE_OPEN_ERR(pFile);
+}
+
+int RtmpOSIRQRelease(IN PNET_DEV pNetDev,
+		     IN UINT32 infType,
+		     IN PPCI_DEV pci_dev,
+		     IN BOOLEAN *pHaveMsi) {
+	struct net_device *net_dev = pNetDev;
+/*	PRTMP_ADAPTER pAd = NULL; */
+
+/*	GET_PAD_FROM_NET_DEV(pAd, net_dev); */
+
+/*	ASSERT(pAd); */
+	net_dev = net_dev;	/* avoid compile warning */
+
+
+
+	return 0;
+}
+
+/*
+========================================================================
+Routine Description:
+	Enable or disable wireless event sent.
+
+Arguments:
+	pReserved		- Reserved
+	FlgIsWEntSup	- TRUE or FALSE
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsWlanEventSet(IN VOID *pReserved,
+			IN BOOLEAN *pCfgWEnt,
+			IN BOOLEAN FlgIsWEntSup) {
+#if WIRELESS_EXT >= 15
+/*	pAd->CommonCfg.bWirelessEvent = FlgIsWEntSup; */
+	*pCfgWEnt = FlgIsWEntSup;
+#else
+	*pCfgWEnt = 0;		/* disable */
+#endif
+}
+
+/*
+========================================================================
+Routine Description:
+	vmalloc
+
+Arguments:
+	Size			- memory size
+
+Return Value:
+	the memory
+
+Note:
+========================================================================
+*/
+VOID *RtmpOsVmalloc(IN ULONG Size) {
+	return vmalloc(Size);
+}
+
+/*
+========================================================================
+Routine Description:
+	vfree
+
+Arguments:
+	pMem			- the memory
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsVfree(IN VOID *pMem) {
+	if (pMem != NULL)
+		vfree(pMem);
+}
+
+/*
+========================================================================
+Routine Description:
+	Get network interface name.
+
+Arguments:
+	pDev			- the device
+
+Return Value:
+	the name
+
+Note:
+========================================================================
+*/
+char *RtmpOsGetNetDevName(IN VOID *pDev) {
+	return ((PNET_DEV) pDev)->name;
+}
+
+/*
+========================================================================
+Routine Description:
+	Assign protocol to the packet.
+
+Arguments:
+	pPkt			- the packet
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsPktProtocolAssign(IN PNDIS_PACKET pNetPkt) {
+	struct sk_buff *pRxPkt = RTPKT_TO_OSPKT(pNetPkt);
+	pRxPkt->protocol = eth_type_trans(pRxPkt, pRxPkt->dev);
+}
+
+BOOLEAN RtmpOsStatsAlloc(IN VOID **ppStats,
+			 IN VOID **ppIwStats) {
+	os_alloc_mem(NULL, (UCHAR **) ppStats,
+		     sizeof (struct net_device_stats));
+	if ((*ppStats) == NULL)
+		return FALSE;
+	NdisZeroMemory((UCHAR *) *ppStats, sizeof (struct net_device_stats));
+
+#if WIRELESS_EXT >= 12
+	os_alloc_mem(NULL, (UCHAR **) ppIwStats, sizeof (struct iw_statistics));
+	if ((*ppIwStats) == NULL) {
+		os_free_mem(NULL, *ppStats);
+		return FALSE;
+	}
+	NdisZeroMemory((UCHAR *)* ppIwStats, sizeof (struct iw_statistics));
+#endif
+
+	return TRUE;
+}
+
+/*
+========================================================================
+Routine Description:
+	Pass the received packet to OS.
+
+Arguments:
+	pPkt			- the packet
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsPktRcvHandle(IN PNDIS_PACKET pNetPkt) {
+	struct sk_buff *pRxPkt = RTPKT_TO_OSPKT(pNetPkt);
+	netif_rx(pRxPkt);
+}
+
+VOID RtmpOsTaskPidInit(IN RTMP_OS_PID *pPid) {
+	*pPid = THREAD_PID_INIT_VALUE;
+}
+
+/*
+========================================================================
+Routine Description:
+	Get the network interface for the packet.
+
+Arguments:
+	pPkt			- the packet
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+PNET_DEV RtmpOsPktNetDevGet(IN VOID *pPkt) {
+	return GET_OS_PKT_NETDEV(pPkt);
+}
+
+#ifdef IAPP_SUPPORT
+/* Layer 2 Update frame to switch/bridge */
+/* For any Layer2 devices, e.g., bridges, switches and other APs, the frame
+   can update their forwarding tables with the correct port to reach the new
+   location of the STA */
+typedef struct GNU_PACKED _RT_IAPP_L2_UPDATE_FRAME {
+
+	UCHAR DA[ETH_ALEN];	/* broadcast MAC address */
+	UCHAR SA[ETH_ALEN];	/* the MAC address of the STA that has just associated
+				   or reassociated */
+	USHORT Len;		/* 8 octets */
+	UCHAR DSAP;		/* null */
+	UCHAR SSAP;		/* null */
+	UCHAR Control;		/* reference to IEEE Std 802.2 */
+	UCHAR XIDInfo[3];	/* reference to IEEE Std 802.2 */
+} RT_IAPP_L2_UPDATE_FRAME, *PRT_IAPP_L2_UPDATE_FRAME;
+
+PNDIS_PACKET RtmpOsPktIappMakeUp(IN PNET_DEV pNetDev,
+				 IN UINT8 *pMac) {
+	RT_IAPP_L2_UPDATE_FRAME frame_body;
+	INT size = sizeof (RT_IAPP_L2_UPDATE_FRAME);
+	PNDIS_PACKET pNetBuf;
+
+	if (pNetDev == NULL)
+		return NULL;
+
+	pNetBuf = RtmpOSNetPktAlloc(NULL, size);
+	if (!pNetBuf) {
+		DBGPRINT(RT_DEBUG_ERROR, ("Error! Can't allocate a skb.\n"));
+		return NULL;
+	}
+
+	/* init the update frame body */
+	NdisZeroMemory(&frame_body, size);
+
+	memset(frame_body.DA, 0xFF, ETH_ALEN);
+	memcpy(frame_body.SA, pMac, ETH_ALEN);
+
+	frame_body.Len = OS_HTONS(ETH_ALEN);
+	frame_body.DSAP = 0;
+	frame_body.SSAP = 0x01;
+	frame_body.Control = 0xAF;
+
+	frame_body.XIDInfo[0] = 0x81;
+	frame_body.XIDInfo[1] = 1;
+	frame_body.XIDInfo[2] = 1 << 1;
+
+	SET_OS_PKT_NETDEV(pNetBuf, pNetDev);
+	skb_reserve(pNetBuf, 2);
+	memcpy(skb_put(pNetBuf, size), &frame_body, size);
+	return pNetBuf;
+}
+#endif /* IAPP_SUPPORT */
+
+VOID RtmpOsPktNatMagicTag(IN PNDIS_PACKET pNetPkt) {
+}
+
+VOID RtmpOsPktNatNone(IN PNDIS_PACKET pNetPkt) {
+}
+
+
+#ifdef RT_CFG80211_SUPPORT
+/* all available channels */
+UCHAR Cfg80211_Chan[] = {
+	1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
+
+	/* 802.11 UNI / HyperLan 2 */
+	36, 38, 40, 44, 46, 48, 52, 54, 56, 60, 62, 64,
+
+	/* 802.11 HyperLan 2 */
+	100, 104, 108, 112, 116, 118, 120, 124, 126, 128, 132, 134, 136,
+
+	/* 802.11 UNII */
+	140, 149, 151, 153, 157, 159, 161, 165, 167, 169, 171, 173,
+
+	/* Japan */
+	184, 188, 192, 196, 208, 212, 216,
+};
+
+/*
+	Array of bitrates the hardware can operate with
+	in this band. Must be sorted to give a valid "supported
+	rates" IE, i.e. CCK rates first, then OFDM.
+
+	For HT, assign MCS in another structure, ieee80211_sta_ht_cap.
+*/
+const struct ieee80211_rate Cfg80211_SupRate[12] = {
+	{
+		.flags = IEEE80211_RATE_SHORT_PREAMBLE,
+		.bitrate = 10,
+		.hw_value = 0,
+		.hw_value_short = 0,
+	},
+	{
+		.flags = IEEE80211_RATE_SHORT_PREAMBLE,
+		.bitrate = 20,
+		.hw_value = 1,
+		.hw_value_short = 1,
+	},
+	{
+		.flags = IEEE80211_RATE_SHORT_PREAMBLE,
+		.bitrate = 55,
+		.hw_value = 2,
+		.hw_value_short = 2,
+	},
+	{
+		.flags = IEEE80211_RATE_SHORT_PREAMBLE,
+		.bitrate = 110,
+		.hw_value = 3,
+		.hw_value_short = 3,
+	},
+	{
+		.flags = 0,
+		.bitrate = 60,
+		.hw_value = 4,
+		.hw_value_short = 4,
+	},
+	{
+		.flags = 0,
+		.bitrate = 90,
+		.hw_value = 5,
+		.hw_value_short = 5,
+	},
+	{
+		.flags = 0,
+		.bitrate = 120,
+		.hw_value = 6,
+		.hw_value_short = 6,
+	},
+	{
+		.flags = 0,
+		.bitrate = 180,
+		.hw_value = 7,
+		.hw_value_short = 7,
+	},
+	{
+		.flags = 0,
+		.bitrate = 240,
+		.hw_value = 8,
+		.hw_value_short = 8,
+	},
+	{
+		.flags = 0,
+		.bitrate = 360,
+		.hw_value = 9,
+		.hw_value_short = 9,
+	},
+	{
+		.flags = 0,
+		.bitrate = 480,
+		.hw_value = 10,
+		.hw_value_short = 10,
+	},
+	{
+		.flags = 0,
+		.bitrate = 540,
+		.hw_value = 11,
+		.hw_value_short = 11,
+	},
+};
+
+static const UINT32 CipherSuites[] = {
+	WLAN_CIPHER_SUITE_WEP40,
+	WLAN_CIPHER_SUITE_WEP104,
+	WLAN_CIPHER_SUITE_TKIP,
+	WLAN_CIPHER_SUITE_CCMP,
+};
+
+/*
+========================================================================
+Routine Description:
+	UnRegister MAC80211 Module.
+
+Arguments:
+	pCB				- CFG80211 control block pointer
+	pNetDev			- Network device
+
+Return Value:
+	NONE
+
+Note:
+========================================================================
+*/
+VOID CFG80211OS_UnRegister(
+	IN VOID						*pCB,
+	IN VOID						*pNetDevOrg)
+{
+	CFG80211_CB *pCfg80211_CB = (CFG80211_CB *)pCB;
+	struct net_device *pNetDev = (struct net_device *)pNetDevOrg;
+
+
+
+	/* unregister */
+	if (pCfg80211_CB->pCfg80211_Wdev != NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("80211> unregister/free wireless device\n"));
+
+		/*
+			Must unregister, or you will suffer problem when you change
+			regulatory domain by using iw.
+		*/
+		
+#ifdef RFKILL_HW_SUPPORT
+		wiphy_rfkill_stop_polling(pCfg80211_CB->pCfg80211_Wdev->wiphy);
+#endif /* RFKILL_HW_SUPPORT */
+		wiphy_unregister(pCfg80211_CB->pCfg80211_Wdev->wiphy);
+		wiphy_free(pCfg80211_CB->pCfg80211_Wdev->wiphy);
+		os_free_mem(NULL, pCfg80211_CB->pCfg80211_Wdev);
+
+		if (pCfg80211_CB->pCfg80211_Channels != NULL)
+			os_free_mem(NULL, pCfg80211_CB->pCfg80211_Channels);
+		/* End of if */
+
+		if (pCfg80211_CB->pCfg80211_Rates != NULL)
+			os_free_mem(NULL, pCfg80211_CB->pCfg80211_Rates);
+		/* End of if */
+
+		pCfg80211_CB->pCfg80211_Wdev = NULL;
+		pCfg80211_CB->pCfg80211_Channels = NULL;
+		pCfg80211_CB->pCfg80211_Rates = NULL;
+
+		/* must reset to NULL; or kernel will panic in unregister_netdev */
+		pNetDev->ieee80211_ptr = NULL;
+		SET_NETDEV_DEV(pNetDev, NULL);
+	} /* End of if */
+
+	os_free_mem(NULL, pCfg80211_CB);
+} /* End of CFG80211_UnRegister */
+
+
+/*
+========================================================================
+Routine Description:
+	Initialize wireless channel in 2.4GHZ and 5GHZ.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	pWiphy			- WLAN PHY interface
+	pChannels		- Current channel info
+	pRates			- Current rate info
+
+Return Value:
+	TRUE			- init successfully
+	FALSE			- init fail
+
+Note:
+	TX Power related:
+
+	1. Suppose we can send power to 15dBm in the board.
+	2. A value 0x0 ~ 0x1F for a channel. We will adjust it based on 15dBm/
+		54Mbps. So if value == 0x07, the TX power of 54Mbps is 15dBm and
+		the value is 0x07 in the EEPROM.
+	3. Based on TX power value of 54Mbps/channel, adjust another value
+		0x0 ~ 0xF for other data rate. (-6dBm ~ +6dBm)
+
+	Other related factors:
+	1. TX power percentage from UI/users;
+	2. Maximum TX power limitation in the regulatory domain.
+========================================================================
+*/
+BOOLEAN CFG80211_SupBandInit(
+	IN VOID						*pCB,
+	IN CFG80211_BAND 			*pBandInfo,
+	IN VOID						*pWiphyOrg,
+	IN VOID						*pChannelsOrg,
+	IN VOID						*pRatesOrg)
+{
+	CFG80211_CB *pCfg80211_CB = (CFG80211_CB *)pCB;
+	struct wiphy *pWiphy = (struct wiphy *)pWiphyOrg;
+	struct ieee80211_channel *pChannels = (struct ieee80211_channel *)pChannelsOrg;
+	struct ieee80211_rate *pRates = (struct ieee80211_rate *)pRatesOrg;
+	struct ieee80211_supported_band *pBand;
+	UINT32 NumOfChan, NumOfRate;
+	UINT32 IdLoop;
+	UINT32 CurTxPower;
+
+
+	/* sanity check */
+	if (pBandInfo->RFICType == 0)
+		pBandInfo->RFICType = RFIC_24GHZ | RFIC_5GHZ;
+	/* End of if */
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> RFICType = %d\n",
+				pBandInfo->RFICType));
+
+	/* init */
+	if (pBandInfo->RFICType & RFIC_5GHZ)
+		NumOfChan = CFG80211_NUM_OF_CHAN_2GHZ + CFG80211_NUM_OF_CHAN_5GHZ;
+	else
+		NumOfChan = CFG80211_NUM_OF_CHAN_2GHZ;
+	/* End of if */
+
+	if (pBandInfo->FlgIsBMode == TRUE)
+		NumOfRate = 4;
+	else
+		NumOfRate = 4 + 8;
+	/* End of if */
+
+	if (pChannels == NULL)
+	{
+		pChannels = kzalloc(sizeof(*pChannels) * NumOfChan, GFP_KERNEL);
+		if (!pChannels)
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("80211> ieee80211_channel allocation fail!\n"));
+			return FALSE;
+		} /* End of if */
+	} /* End of if */
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> Number of channel = %d\n",
+				CFG80211_NUM_OF_CHAN_5GHZ));
+
+	if (pRates == NULL)
+	{
+		pRates = kzalloc(sizeof(*pRates) * NumOfRate, GFP_KERNEL);
+		if (!pRates)
+		{
+			os_free_mem(NULL, pChannels);
+			DBGPRINT(RT_DEBUG_ERROR, ("80211> ieee80211_rate allocation fail!\n"));
+			return FALSE;
+		} /* End of if */
+	} /* End of if */
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> Number of rate = %d\n", NumOfRate));
+
+	/* get TX power */
+#ifdef SINGLE_SKU
+	CurTxPower = pBandInfo->DefineMaxTxPwr; /* dBm */
+#else
+	CurTxPower = 0; /* unknown */
+#endif /* SINGLE_SKU */
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> CurTxPower = %d dBm\n", CurTxPower));
+
+	/* init channel */
+	for(IdLoop=0; IdLoop<NumOfChan; IdLoop++)
+	{
+		pChannels[IdLoop].center_freq = \
+					ieee80211_channel_to_frequency(Cfg80211_Chan[IdLoop]);
+		pChannels[IdLoop].hw_value = IdLoop;
+
+		if (IdLoop < CFG80211_NUM_OF_CHAN_2GHZ)
+			pChannels[IdLoop].max_power = CurTxPower;
+		else
+			pChannels[IdLoop].max_power = CurTxPower;
+		/* End of if */
+
+		pChannels[IdLoop].max_antenna_gain = 0xff;
+	} /* End of if */
+
+	/* init rate */
+	for(IdLoop=0; IdLoop<NumOfRate; IdLoop++)
+		memcpy(&pRates[IdLoop], &Cfg80211_SupRate[IdLoop], sizeof(*pRates));
+	/* End of for */
+
+	pBand = &pCfg80211_CB->Cfg80211_bands[IEEE80211_BAND_2GHZ];
+	if (pBandInfo->RFICType & RFIC_24GHZ)
+	{
+		pBand->n_channels = CFG80211_NUM_OF_CHAN_2GHZ;
+		pBand->n_bitrates = NumOfRate;
+		pBand->channels = pChannels;
+		pBand->bitrates = pRates;
+
+#ifdef DOT11_N_SUPPORT
+		/* for HT, assign pBand->ht_cap */
+		pBand->ht_cap.ht_supported = true;
+		pBand->ht_cap.cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
+					       IEEE80211_HT_CAP_SM_PS |
+					       IEEE80211_HT_CAP_SGI_40 |
+					       IEEE80211_HT_CAP_DSSSCCK40;
+		pBand->ht_cap.ampdu_factor = 3; /* 2 ^ 16 */
+		pBand->ht_cap.ampdu_density = pBandInfo->MpduDensity;
+
+		memset(&pBand->ht_cap.mcs, 0, sizeof(pBand->ht_cap.mcs));
+		CFG80211DBG(RT_DEBUG_ERROR,
+					("80211> TxStream = %d\n", pBandInfo->TxStream));
+
+		switch(pBandInfo->TxStream)
+		{
+			case 1:
+			default:
+				pBand->ht_cap.mcs.rx_mask[0] = 0xff;
+				break;
+
+			case 2:
+				pBand->ht_cap.mcs.rx_mask[0] = 0xff;
+				pBand->ht_cap.mcs.rx_mask[1] = 0xff;
+				break;
+
+			case 3:
+				pBand->ht_cap.mcs.rx_mask[0] = 0xff;
+				pBand->ht_cap.mcs.rx_mask[1] = 0xff;
+				pBand->ht_cap.mcs.rx_mask[2] = 0xff;
+				break;
+		} /* End of switch */
+
+		pBand->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
+#endif /* DOT11_N_SUPPORT */
+
+		pWiphy->bands[IEEE80211_BAND_2GHZ] = pBand;
+	}
+	else
+	{
+		pWiphy->bands[IEEE80211_BAND_2GHZ] = NULL;
+		pBand->channels = NULL;
+		pBand->bitrates = NULL;
+	} /* End of if */
+
+	pBand = &pCfg80211_CB->Cfg80211_bands[IEEE80211_BAND_5GHZ];
+	if (pBandInfo->RFICType & RFIC_5GHZ)
+	{
+		pBand->n_channels = CFG80211_NUM_OF_CHAN_5GHZ;
+		pBand->n_bitrates = NumOfRate - 4;
+		pBand->channels = &pChannels[CFG80211_NUM_OF_CHAN_2GHZ];
+		pBand->bitrates = &pRates[4];
+
+		/* for HT, assign pBand->ht_cap */
+#ifdef DOT11_N_SUPPORT
+		/* for HT, assign pBand->ht_cap */
+		pBand->ht_cap.ht_supported = true;
+		pBand->ht_cap.cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
+					       IEEE80211_HT_CAP_SM_PS |
+					       IEEE80211_HT_CAP_SGI_40 |
+					       IEEE80211_HT_CAP_DSSSCCK40;
+		pBand->ht_cap.ampdu_factor = 3; /* 2 ^ 16 */
+		pBand->ht_cap.ampdu_density = pBandInfo->MpduDensity;
+
+		memset(&pBand->ht_cap.mcs, 0, sizeof(pBand->ht_cap.mcs));
+		switch(pBandInfo->RxStream)
+		{
+			case 1:
+			default:
+				pBand->ht_cap.mcs.rx_mask[0] = 0xff;
+				break;
+
+			case 2:
+				pBand->ht_cap.mcs.rx_mask[0] = 0xff;
+				pBand->ht_cap.mcs.rx_mask[1] = 0xff;
+				break;
+
+			case 3:
+				pBand->ht_cap.mcs.rx_mask[0] = 0xff;
+				pBand->ht_cap.mcs.rx_mask[1] = 0xff;
+				pBand->ht_cap.mcs.rx_mask[2] = 0xff;
+				break;
+		} /* End of switch */
+
+		pBand->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
+#endif /* DOT11_N_SUPPORT */
+
+		pWiphy->bands[IEEE80211_BAND_5GHZ] = pBand;
+	}
+	else
+	{
+		pWiphy->bands[IEEE80211_BAND_5GHZ] = NULL;
+		pBand->channels = NULL;
+		pBand->bitrates = NULL;
+	} /* End of if */
+
+	pCfg80211_CB->pCfg80211_Channels = pChannels;
+	pCfg80211_CB->pCfg80211_Rates = pRates;
+
+	return TRUE;
+} /* End of CFG80211_SupBandInit */
+
+
+/*
+========================================================================
+Routine Description:
+	Re-Initialize wireless channel/PHY in 2.4GHZ and 5GHZ.
+
+Arguments:
+	pCB				- CFG80211 control block pointer
+	pBandInfo		- Band information
+
+Return Value:
+	TRUE			- re-init successfully
+	FALSE			- re-init fail
+
+Note:
+	CFG80211_SupBandInit() is called in xx_probe().
+	But we do not have complete chip information in xx_probe() so we
+	need to re-init bands in xx_open().
+========================================================================
+*/
+BOOLEAN CFG80211OS_SupBandReInit(
+	IN VOID							*pCB,
+	IN CFG80211_BAND 				*pBandInfo)
+{
+	CFG80211_CB *pCfg80211_CB = (CFG80211_CB *)pCB;
+	struct wiphy *pWiphy;
+
+
+	/* sanity check */
+	if ((pCfg80211_CB == NULL) || (pCfg80211_CB->pCfg80211_Wdev == NULL))
+		return FALSE;
+	/* End of if */
+
+	pWiphy = pCfg80211_CB->pCfg80211_Wdev->wiphy;
+
+	if (pWiphy != NULL)
+	{
+		CFG80211DBG(RT_DEBUG_ERROR, ("80211> re-init bands...\n"));
+
+		/* re-init bands */
+		CFG80211_SupBandInit(pCfg80211_CB, pBandInfo, pWiphy,
+							pCfg80211_CB->pCfg80211_Channels,
+							pCfg80211_CB->pCfg80211_Rates);
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32))
+		/* re-init PHY */
+		pWiphy->rts_threshold = pBandInfo->RtsThreshold;
+		pWiphy->frag_threshold = pBandInfo->FragmentThreshold;
+		pWiphy->retry_short = pBandInfo->RetryMaxCnt & 0xff;
+		pWiphy->retry_long = (pBandInfo->RetryMaxCnt & 0xff00)>>8;
+#endif /* LINUX_VERSION_CODE */
+
+		return TRUE;
+	} /* End of if */
+
+	return FALSE;
+} /* End of CFG80211OS_SupBandReInit */
+
+
+/*
+========================================================================
+Routine Description:
+	Hint to the wireless core a regulatory domain from driver.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	pCountryIe		- pointer to the country IE
+	CountryIeLen	- length of the country IE
+
+Return Value:
+	NONE
+
+Note:
+	Must call the function in kernel thread.
+========================================================================
+*/
+VOID CFG80211OS_RegHint(
+	IN VOID						*pCB,
+	IN UCHAR					*pCountryIe,
+	IN ULONG					CountryIeLen)
+{
+	CFG80211_CB *pCfg80211_CB = (CFG80211_CB *)pCB;
+
+
+	CFG80211DBG(RT_DEBUG_ERROR,
+			("crda> regulatory domain hint: %c%c\n",
+			pCountryIe[0], pCountryIe[1]));
+
+	if ((pCfg80211_CB->pCfg80211_Wdev == NULL) || (pCountryIe == NULL))
+	{
+		CFG80211DBG(RT_DEBUG_ERROR, ("crda> regulatory domain hint not support!\n"));
+		return;
+	} /* End of if */
+
+	/* hints a country IE as a regulatory domain "without" channel/power info. */
+/*	regulatory_hint(pCfg80211_CB->pMac80211_Hw->wiphy, pCountryIe); */
+	regulatory_hint(pCfg80211_CB->pCfg80211_Wdev->wiphy, (const char *)pCountryIe);
+} /* End of CFG80211OS_RegHint */
+
+
+/*
+========================================================================
+Routine Description:
+	Hint to the wireless core a regulatory domain from country element.
+
+Arguments:
+	pAdCB			- WLAN control block pointer
+	pCountryIe		- pointer to the country IE
+	CountryIeLen	- length of the country IE
+
+Return Value:
+	NONE
+
+Note:
+	Must call the function in kernel thread.
+========================================================================
+*/
+VOID CFG80211OS_RegHint11D(
+	IN VOID						*pCB,
+	IN UCHAR					*pCountryIe,
+	IN ULONG					CountryIeLen)
+{
+	/* no regulatory_hint_11d() in 2.6.32 */
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32))
+	CFG80211_CB *pCfg80211_CB = (CFG80211_CB *)pCB;
+
+
+	if ((pCfg80211_CB->pCfg80211_Wdev == NULL) || (pCountryIe == NULL))
+	{
+		CFG80211DBG(RT_DEBUG_ERROR, ("crda> regulatory domain hint not support!\n"));
+		return;
+	} /* End of if */
+
+	CFG80211DBG(RT_DEBUG_ERROR,
+				("crda> regulatory domain hint: %c%c\n",
+				pCountryIe[0], pCountryIe[1]));
+
+	/*
+		hints a country IE as a regulatory domain "with" channel/power info.
+		but if you use regulatory_hint(), it only hint "regulatory domain".
+	*/
+/*	regulatory_hint_11d(pCfg80211_CB->pMac80211_Hw->wiphy, pCountryIe, CountryIeLen); */
+	regulatory_hint_11d(pCfg80211_CB->pCfg80211_Wdev->wiphy, pCountryIe, CountryIeLen);
+#endif /* LINUX_VERSION_CODE */
+} /* End of CFG80211_RegHint11D */
+
+
+BOOLEAN CFG80211OS_BandInfoGet(
+	IN VOID						*pCB,
+	IN VOID						*pWiphyOrg,
+	OUT VOID					**ppBand24,
+	OUT VOID					**ppBand5)
+{
+	CFG80211_CB *pCfg80211_CB = (CFG80211_CB *)pCB;
+	struct wiphy *pWiphy = (struct wiphy *)pWiphyOrg;
+
+
+	/* sanity check */
+	if (pWiphy == NULL)
+	{
+		if ((pCfg80211_CB != NULL) && (pCfg80211_CB->pCfg80211_Wdev != NULL))
+			pWiphy = pCfg80211_CB->pCfg80211_Wdev->wiphy;
+		/* End of if */
+	} /* End of if */
+
+	if (pWiphy == NULL)
+		return FALSE;
+
+	*ppBand24 = pWiphy->bands[IEEE80211_BAND_2GHZ];
+	*ppBand5 = pWiphy->bands[IEEE80211_BAND_5GHZ];
+	return TRUE;
+}
+
+
+UINT32 CFG80211OS_ChanNumGet(
+	IN VOID						*pCB,
+	IN VOID						*pWiphyOrg,
+	IN UINT32					IdBand)
+{
+	CFG80211_CB *pCfg80211_CB = (CFG80211_CB *)pCB;
+	struct wiphy *pWiphy = (struct wiphy *)pWiphyOrg;
+
+
+	/* sanity check */
+	if (pWiphy == NULL)
+	{
+		if ((pCfg80211_CB != NULL) && (pCfg80211_CB->pCfg80211_Wdev != NULL))
+			pWiphy = pCfg80211_CB->pCfg80211_Wdev->wiphy;
+		/* End of if */
+	} /* End of if */
+
+	if (pWiphy == NULL)
+		return 0;
+
+	if (pWiphy->bands[IdBand] != NULL)
+		return pWiphy->bands[IdBand]->n_channels;
+
+	return 0;
+}
+
+
+BOOLEAN CFG80211OS_ChanInfoGet(
+	IN VOID						*pCB,
+	IN VOID						*pWiphyOrg,
+	IN UINT32					IdBand,
+	IN UINT32					IdChan,
+	OUT UINT32					*pChanId,
+	OUT UINT32					*pPower,
+	OUT BOOLEAN					*pFlgIsRadar)
+{
+	CFG80211_CB *pCfg80211_CB = (CFG80211_CB *)pCB;
+	struct wiphy *pWiphy = (struct wiphy *)pWiphyOrg;
+	struct ieee80211_supported_band *pSband;
+	struct ieee80211_channel *pChan;
+
+
+	/* sanity check */
+	if (pWiphy == NULL)
+	{
+		if ((pCfg80211_CB != NULL) && (pCfg80211_CB->pCfg80211_Wdev != NULL))
+			pWiphy = pCfg80211_CB->pCfg80211_Wdev->wiphy;
+		/* End of if */
+	} /* End of if */
+
+	if (pWiphy == NULL)
+		return FALSE;
+
+	pSband = pWiphy->bands[IdBand];
+	pChan = &pSband->channels[IdChan];
+
+	*pChanId = ieee80211_frequency_to_channel(pChan->center_freq);
+
+	if (pChan->flags & IEEE80211_CHAN_DISABLED)
+	{
+		CFG80211DBG(RT_DEBUG_ERROR,
+					("Chan %03d (frq %d):\tnot allowed!\n",
+					(*pChanId), pChan->center_freq));
+		return FALSE;
+	}
+
+	*pPower = pChan->max_power;
+
+	if (pChan->flags & IEEE80211_CHAN_RADAR)
+		*pFlgIsRadar = TRUE;
+	else
+		*pFlgIsRadar = FALSE;
+
+	return TRUE;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Inform us that a scan is got.
+
+Arguments:
+	pAdCB				- WLAN control block pointer
+
+Return Value:
+	NONE
+
+Note:
+	Call RT_CFG80211_SCANNING_INFORM, not CFG80211_Scaning
+========================================================================
+*/
+VOID CFG80211OS_Scaning(
+	IN VOID						*pCB,
+	IN VOID						**pChanOrg,
+	IN UINT32					ChanId,
+	IN UCHAR					*pFrame,
+	IN UINT32					FrameLen,
+	IN INT32					RSSI,
+	IN BOOLEAN					FlgIsNMode,
+	IN UINT8					BW)
+{
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30))
+#ifdef CONFIG_STA_SUPPORT
+	CFG80211_CB *pCfg80211_CB = (CFG80211_CB *)pCB;
+	struct ieee80211_channel *pChan;
+
+
+	if ((*pChanOrg) == NULL)
+	{
+		os_alloc_mem(NULL, (UCHAR **)pChanOrg, sizeof(struct ieee80211_channel));
+		if ((*pChanOrg) == NULL)
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("80211> Allocate chan fail!\n"));
+			return;
+		}
+	}
+
+	pChan = (struct ieee80211_channel *)(*pChanOrg);
+	memset(pChan, 0, sizeof(*pChan));
+
+	if (ChanId > 14)
+		pChan->band = IEEE80211_BAND_5GHZ;
+	else
+		pChan->band = IEEE80211_BAND_2GHZ;
+	/* End of if */
+
+	pChan->center_freq = ieee80211_channel_to_frequency(ChanId);
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32))
+	if (FlgIsNMode == TRUE)
+	{
+		if (BW == 0)
+			pChan->max_bandwidth = 20; /* 20MHz */
+		else
+			pChan->max_bandwidth = 40; /* 40MHz */
+		/* End of if */
+	}
+	else
+		pChan->max_bandwidth = 5; /* 5MHz for non-HT device */
+	/* End of if */
+#endif /* LINUX_VERSION_CODE */
+
+	/* no use currently in 2.6.30 */
+/*	if (ieee80211_is_beacon(((struct ieee80211_mgmt *)pFrame)->frame_control)) */
+/*		pChan->beacon_found = 1; */
+	/* End of if */
+
+	/* inform 80211 a scan is got */
+	/* we can use cfg80211_inform_bss in 2.6.31, it is easy more than the one */
+	/* in cfg80211_inform_bss_frame(), it will memcpy pFrame but pChan */
+	cfg80211_inform_bss_frame(pCfg80211_CB->pCfg80211_Wdev->wiphy,
+								pChan,
+								(struct ieee80211_mgmt *)pFrame,
+								FrameLen,
+								RSSI,
+								GFP_ATOMIC);
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> cfg80211_inform_bss_frame\n"));
+#endif /* CONFIG_STA_SUPPORT */
+#endif /* LINUX_VERSION_CODE */
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Inform us that scan ends.
+
+Arguments:
+	pAdCB			- WLAN control block pointer
+	FlgIsAborted	- 1: scan is aborted
+
+Return Value:
+	NONE
+
+Note:
+========================================================================
+*/
+VOID CFG80211OS_ScanEnd(
+	IN VOID						*pCB,
+	IN BOOLEAN					FlgIsAborted)
+{
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30))
+#ifdef CONFIG_STA_SUPPORT
+	CFG80211_CB *pCfg80211_CB = (CFG80211_CB *)pCB;
+
+
+	CFG80211DBG(RT_DEBUG_ERROR, ("80211> cfg80211_scan_done\n"));
+	cfg80211_scan_done(pCfg80211_CB->pCfg80211_ScanReq, FlgIsAborted);
+#endif /* CONFIG_STA_SUPPORT */
+#endif /* LINUX_VERSION_CODE */
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Inform CFG80211 about association status.
+
+Arguments:
+	pAdCB			- WLAN control block pointer
+	pBSSID			- the BSSID of the AP
+	pReqIe			- the element list in the association request frame
+	ReqIeLen		- the request element length
+	pRspIe			- the element list in the association response frame
+	RspIeLen		- the response element length
+	FlgIsSuccess	- 1: success; otherwise: fail
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+void CFG80211OS_ConnectResultInform(
+	IN VOID						*pCB,
+	IN UCHAR					*pBSSID,
+	IN UCHAR					*pReqIe,
+	IN UINT32					ReqIeLen,
+	IN UCHAR					*pRspIe,
+	IN UINT32					RspIeLen,
+	IN UCHAR					FlgIsSuccess)
+{
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32))
+	CFG80211_CB *pCfg80211_CB = (CFG80211_CB *)pCB;
+
+
+	if ((pCfg80211_CB->pCfg80211_Wdev->netdev == NULL) || (pBSSID == NULL))
+		return;
+	/* End of if */
+
+	if (FlgIsSuccess)
+	{
+		cfg80211_connect_result(pCfg80211_CB->pCfg80211_Wdev->netdev,
+								pBSSID,
+								pReqIe,
+								ReqIeLen,
+								pRspIe,
+								RspIeLen,
+								WLAN_STATUS_SUCCESS,
+								GFP_KERNEL);
+	}
+	else
+	{
+		cfg80211_connect_result(pCfg80211_CB->pCfg80211_Wdev->netdev,
+								pBSSID,
+								NULL, 0, NULL, 0,
+								WLAN_STATUS_UNSPECIFIED_FAILURE,
+								GFP_KERNEL);
+	} /* End of if */
+#endif /* LINUX_VERSION_CODE */
+} /* End of CFG80211_ConnectResultInform */
+#endif /* RT_CFG80211_SUPPORT */
+
+
+
+
+#ifdef OS_ABL_FUNC_SUPPORT
+/*
+========================================================================
+Routine Description:
+	Change/Recover file UID/GID.
+
+Arguments:
+	pOSFSInfoOrg	- the file
+	bSet			- Change (TRUE) or Recover (FALSE)
+
+Return Value:
+	None
+
+Note:
+	rt_linux.h, not rt_drv.h
+========================================================================
+*/
+void RtmpOSFSInfoChange(IN RTMP_OS_FS_INFO *pOSFSInfoOrg,
+			IN BOOLEAN bSet) {
+	OS_FS_INFO *pOSFSInfo;
+
+	if (bSet == TRUE) {
+		os_alloc_mem(NULL, (UCHAR **) & (pOSFSInfoOrg->pContent),
+			     sizeof (OS_FS_INFO));
+		if (pOSFSInfoOrg->pContent == NULL) {
+			DBGPRINT(RT_DEBUG_ERROR,
+				 ("%s: alloc file info fail!\n", __FUNCTION__));
+			return;
+		} else
+			memset(pOSFSInfoOrg->pContent, 0, sizeof (OS_FS_INFO));
+	}
+
+	pOSFSInfo = (OS_FS_INFO *) (pOSFSInfoOrg->pContent);
+	if (pOSFSInfo == NULL) {
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("%s: pOSFSInfo == NULL!\n", __FUNCTION__));
+		return;
+	}
+
+	__RtmpOSFSInfoChange(pOSFSInfo, bSet);
+
+	if (bSet == FALSE) {
+		if (pOSFSInfoOrg->pContent != NULL) {
+			os_free_mem(NULL, pOSFSInfoOrg->pContent);
+			pOSFSInfoOrg->pContent = NULL;
+		}
+	}
+}
+
+/*
+========================================================================
+Routine Description:
+	Activate a tasklet.
+
+Arguments:
+	pTasklet		- the tasklet
+
+Return Value:
+	TRUE or FALSE
+
+Note:
+========================================================================
+*/
+BOOLEAN RtmpOsTaskletSche(IN RTMP_NET_TASK_STRUCT *pTasklet) {
+	if (pTasklet->pContent == NULL)
+		return FALSE;
+
+#ifdef WORKQUEUE_BH
+	schedule_work((struct work_struct *)(pTasklet->pContent));
+#else
+	tasklet_hi_schedule((OS_NET_TASK_STRUCT *) (pTasklet->pContent));
+#endif /* WORKQUEUE_BH */
+
+	return TRUE;
+}
+
+/*
+========================================================================
+Routine Description:
+	Initialize a tasklet.
+
+Arguments:
+	pTasklet		- the tasklet
+
+Return Value:
+	TRUE or FALSE
+
+Note:
+========================================================================
+*/
+BOOLEAN RtmpOsTaskletInit(IN RTMP_NET_TASK_STRUCT *pTasklet,
+			  IN VOID (*pFunc) (unsigned long data),
+			  IN ULONG Data,
+			  IN LIST_HEADER * pTaskletList) {
+#ifdef WORKQUEUE_BH
+	if (RTMP_OS_Alloc_Rsc(pTaskletList, pTasklet,
+			      sizeof (struct work_struct)) == FALSE) {
+		return FALSE;	/* allocate fail */
+	}
+
+	INIT_WORK((struct work_struct *)(pTasklet->pContent), pFunc);
+#else
+
+	if (RTMP_OS_Alloc_Rsc(pTaskletList, pTasklet,
+			      sizeof (OS_NET_TASK_STRUCT)) == FALSE) {
+		return FALSE;	/* allocate fail */
+	}
+
+	tasklet_init((OS_NET_TASK_STRUCT *) (pTasklet->pContent), pFunc, Data);
+#endif /* WORKQUEUE_BH */
+
+	return TRUE;
+}
+
+/*
+========================================================================
+Routine Description:
+	Delete a tasklet.
+
+Arguments:
+	pTasklet		- the tasklet
+
+Return Value:
+	TRUE or FALSE
+
+Note:
+========================================================================
+*/
+BOOLEAN RtmpOsTaskletKill(IN RTMP_NET_TASK_STRUCT *pTasklet) {
+	if (pTasklet->pContent != NULL) {
+#ifndef WORKQUEUE_BH
+		tasklet_kill((OS_NET_TASK_STRUCT *) (pTasklet->pContent));
+#endif /* WORKQUEUE_BH */
+
+		/* we will free all tasks memory in RTMP_OS_FREE_TASKLET() */
+/*		os_free_mem(NULL, pTasklet->pContent); */
+/*		pTasklet->pContent = NULL; */
+	}
+
+	return TRUE;
+}
+
+VOID RtmpOsTaskletDataAssign(IN RTMP_NET_TASK_STRUCT *pTasklet,
+			     IN ULONG Data) {
+#ifndef WORKQUEUE_BH
+	if (pTasklet->pContent != NULL)
+		((OS_NET_TASK_STRUCT *) (pTasklet->pContent))->data =
+		    (ULONG) Data;
+#endif /* WORKQUEUE_BH */
+}
+
+INT32 RtmpOsTaskIsKilled(IN RTMP_OS_TASK *pTaskOrg) {
+	OS_TASK *pTask;
+
+	pTask = (OS_TASK *) (pTaskOrg->pContent);
+	if (pTask == NULL)
+		return 1;
+	return pTask->task_killed;
+}
+
+VOID RtmpOsTaskWakeUp(IN RTMP_OS_TASK *pTaskOrg) {
+	OS_TASK *pTask;
+
+	pTask = (OS_TASK *) (pTaskOrg->pContent);
+	if (pTask == NULL)
+		return;
+
+#ifdef KTHREAD_SUPPORT
+	WAKE_UP(pTask);
+#else
+	RTMP_SEM_EVENT_UP(&pTask->taskSema);
+#endif
+}
+
+/*
+========================================================================
+Routine Description:
+	Check if the task is legal.
+
+Arguments:
+	pPkt			- the packet
+	pDev			- the device
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+BOOLEAN RtmpOsCheckTaskLegality(IN RTMP_OS_TASK *pTaskOrg) {
+	OS_TASK *pTask;
+
+	pTask = (OS_TASK *) (pTaskOrg->pContent);
+	if (pTask == NULL)
+		return FALSE;
+
+#ifdef KTHREAD_SUPPORT
+	if (pTask->kthread_task == NULL)
+#else
+	CHECK_PID_LEGALITY(pTask->taskPID);
+	else
+#endif
+	return FALSE;
+
+	return TRUE;
+}
+
+/* timeout -- ms */
+VOID RTMP_SetPeriodicTimer(IN NDIS_MINIPORT_TIMER *pTimerOrg,
+			   IN unsigned long timeout) {
+	OS_NDIS_MINIPORT_TIMER *pTimer;
+
+	pTimer = (OS_NDIS_MINIPORT_TIMER *) (pTimerOrg->pContent);
+	if (pTimer != NULL) {
+		__RTMP_SetPeriodicTimer(pTimer, timeout);
+	}
+}
+
+/* convert NdisMInitializeTimer --> RTMP_OS_Init_Timer */
+VOID RTMP_OS_Init_Timer(IN VOID *pReserved,
+			IN NDIS_MINIPORT_TIMER *pTimerOrg,
+			IN TIMER_FUNCTION function,
+			IN PVOID data,
+			IN LIST_HEADER *pTimerList) {
+	OS_NDIS_MINIPORT_TIMER *pTimer;
+
+	if (RTMP_OS_Alloc_Rsc(pTimerList, pTimerOrg,
+			      sizeof (OS_NDIS_MINIPORT_TIMER)) == FALSE) {
+		return;		/* allocate fail */
+	}
+
+	pTimer = (OS_NDIS_MINIPORT_TIMER *) (pTimerOrg->pContent);
+
+	if (pTimer != NULL) {
+		__RTMP_OS_Init_Timer(pReserved, pTimer, function, data);
+	}
+}
+
+VOID RTMP_OS_Add_Timer(IN NDIS_MINIPORT_TIMER *pTimerOrg,
+		       IN unsigned long timeout) {
+	OS_NDIS_MINIPORT_TIMER *pTimer;
+
+	 pTimer = (OS_NDIS_MINIPORT_TIMER *) (pTimerOrg->pContent);
+
+	if (pTimer != NULL) {
+		if (timer_pending(pTimer))
+			return;
+
+		__RTMP_OS_Add_Timer(pTimer,
+				    timeout);
+	}
+} 
+
+VOID RTMP_OS_Mod_Timer(IN NDIS_MINIPORT_TIMER *pTimerOrg,
+			 IN unsigned long timeout) {
+	OS_NDIS_MINIPORT_TIMER *pTimer;
+
+	pTimer = (OS_NDIS_MINIPORT_TIMER *) (pTimerOrg->pContent);
+	if (pTimer != NULL) {
+		__RTMP_OS_Mod_Timer(pTimer, timeout);
+	}
+}
+
+VOID RTMP_OS_Del_Timer(IN NDIS_MINIPORT_TIMER *pTimerOrg,
+		       OUT BOOLEAN *pCancelled) {
+	OS_NDIS_MINIPORT_TIMER *pTimer;
+
+	pTimer = (OS_NDIS_MINIPORT_TIMER *) (pTimerOrg->pContent);
+	if (pTimer != NULL) {
+		__RTMP_OS_Del_Timer(pTimer, pCancelled);
+	}
+}
+
+VOID RTMP_OS_Release_Timer(IN NDIS_MINIPORT_TIMER *pTimerOrg) {
+	OS_NDIS_MINIPORT_TIMER *pTimer;
+
+	pTimer = (OS_NDIS_MINIPORT_TIMER *) (pTimerOrg->pContent);
+	if (pTimer != NULL) {
+		__RTMP_OS_Release_Timer(pTimer);
+
+		os_free_mem(NULL, pTimer);
+		pTimerOrg->pContent = NULL;
+	}
+}
+
+/*
+========================================================================
+Routine Description:
+	Allocate a OS resource.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	pRsc			- the resource
+	RscLen			- resource length
+
+Return Value:
+	TRUE or FALSE
+
+Note:
+========================================================================
+*/
+BOOLEAN RTMP_OS_Alloc_Rsc(IN LIST_HEADER *pRscList,
+			  IN VOID *pRscSrc,
+			  IN UINT32 RscLen) {
+	OS_RSTRUC *pRsc = (OS_RSTRUC *) pRscSrc;
+
+	if (pRsc->pContent == NULL) {
+		/* new entry */
+		os_alloc_mem(NULL, (UCHAR **) & (pRsc->pContent), RscLen);
+		if (pRsc->pContent == NULL) {
+			DBGPRINT(RT_DEBUG_ERROR,
+				 ("%s: alloc timer fail!\n", __FUNCTION__));
+			return FALSE;
+		} else {
+			LIST_RESOURCE_OBJ_ENTRY *pObj;
+
+			/* allocate resource record entry */
+			os_alloc_mem(NULL, (UCHAR **) & (pObj),
+				     sizeof (LIST_RESOURCE_OBJ_ENTRY));
+			if (pObj == NULL) {
+				DBGPRINT(RT_DEBUG_ERROR,
+					 ("%s: alloc timer obj fail!\n",
+					  __FUNCTION__));
+				os_free_mem(NULL, pRsc->pContent);
+				pRsc->pContent = NULL;
+				return FALSE;
+			} else {
+				memset(pRsc->pContent, 0, RscLen);
+				pObj->pRscObj = (VOID *) pRsc;
+
+				OS_SEM_LOCK(&UtilSemLock);
+				insertTailList(pRscList, (LIST_ENTRY *) pObj);
+				OS_SEM_UNLOCK(&UtilSemLock);
+			}
+		}
+	}
+
+	return TRUE;
+}
+
+/*
+========================================================================
+Routine Description:
+	Free all timers.
+
+Arguments:
+	pAd				- WLAN control block pointer
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RTMP_OS_Free_Rscs(IN LIST_HEADER *pRscList) {
+	LIST_RESOURCE_OBJ_ENTRY *pObj;
+	OS_RSTRUC *pRsc;
+
+	OS_SEM_LOCK(&UtilSemLock);
+	while (TRUE) {
+		pObj = (LIST_RESOURCE_OBJ_ENTRY *) removeHeadList(pRscList);
+		if (pObj == NULL)
+			break;
+		pRsc = (OS_RSTRUC *) (pObj->pRscObj);
+
+		if (pRsc->pContent != NULL) {
+			/* free the timer memory */
+			os_free_mem(NULL, pRsc->pContent);
+			pRsc->pContent = NULL;
+		} else {
+			/*
+			   The case is possible because some timers are released during
+			   the driver life time, EX: we will release some timers in
+			   MacTableDeleteEntry().
+			   But we do not recommend the behavior, i.e. not to release
+			   timers in the driver life time; Or we can not cancel the
+			   timer for timer preemption problem.
+			 */
+		}
+
+		os_free_mem(NULL, pObj);	/* free the timer record entry */
+	}
+	OS_SEM_UNLOCK(&UtilSemLock);
+}
+
+/*
+========================================================================
+Routine Description:
+	Allocate a kernel task.
+
+Arguments:
+	pTask			- the task
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+BOOLEAN RtmpOSTaskAlloc(IN RTMP_OS_TASK *pTask,
+			IN LIST_HEADER *pTaskList) {
+	if (RTMP_OS_Alloc_Rsc(pTaskList, pTask, sizeof (OS_TASK)) == FALSE) {
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("%s: alloc task fail!\n", __FUNCTION__));
+		return FALSE;	/* allocate fail */
+	}
+
+	return TRUE;
+}
+
+/*
+========================================================================
+Routine Description:
+	Free a kernel task.
+
+Arguments:
+	pTask			- the task
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOSTaskFree(IN RTMP_OS_TASK *pTask) {
+	/* we will free all tasks memory in RTMP_OS_FREE_TASK() */
+}
+
+/*
+========================================================================
+Routine Description:
+	Kill a kernel task.
+
+Arguments:
+	pTaskOrg		- the task
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+NDIS_STATUS RtmpOSTaskKill(IN RTMP_OS_TASK *pTaskOrg) {
+	OS_TASK *pTask;
+	NDIS_STATUS Status;
+
+	pTask = (OS_TASK *) (pTaskOrg->pContent);
+	if (pTask != NULL) {
+		Status = __RtmpOSTaskKill(pTask);
+		RtmpOSTaskFree(pTaskOrg);
+		return Status;
+	}
+
+	return NDIS_STATUS_FAILURE;
+}
+
+/*
+========================================================================
+Routine Description:
+	Notify kernel the task exit.
+
+Arguments:
+	pTaskOrg		- the task
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+INT RtmpOSTaskNotifyToExit(IN RTMP_OS_TASK *pTaskOrg) {
+	OS_TASK *pTask;
+
+	pTask = (OS_TASK *) (pTaskOrg->pContent);
+	if (pTask == NULL)
+		return 0;
+	return __RtmpOSTaskNotifyToExit(pTask);
+}
+
+/*
+========================================================================
+Routine Description:
+	Customize the task.
+
+Arguments:
+	pTaskOrg		- the task
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOSTaskCustomize(IN RTMP_OS_TASK *pTaskOrg) {
+	OS_TASK *pTask;
+
+	pTask = (OS_TASK *) (pTaskOrg->pContent);
+	if (pTask == NULL)
+		return;
+	__RtmpOSTaskCustomize(pTask);
+}
+
+/*
+========================================================================
+Routine Description:
+	Activate a kernel task.
+
+Arguments:
+	pTaskOrg		- the task
+	fn				- task handler
+	arg				- task input argument
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+NDIS_STATUS RtmpOSTaskAttach(IN RTMP_OS_TASK *pTaskOrg,
+			     IN RTMP_OS_TASK_CALLBACK fn,
+			     IN ULONG arg) {
+	OS_TASK *pTask;
+
+	pTask = (OS_TASK *) (pTaskOrg->pContent);
+	if (pTask == NULL)
+		return NDIS_STATUS_FAILURE;
+	return __RtmpOSTaskAttach(pTask, fn, arg);
+}
+
+/*
+========================================================================
+Routine Description:
+	Initialize a kernel task.
+
+Arguments:
+	pTaskOrg		- the task
+	pTaskName		- task name
+	pPriv			- task input argument
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+NDIS_STATUS RtmpOSTaskInit(IN RTMP_OS_TASK *pTaskOrg,
+			   IN PSTRING pTaskName,
+			   IN VOID *pPriv,
+			   IN LIST_HEADER *pTaskList,
+			   IN LIST_HEADER *pSemList) {
+	OS_TASK *pTask;
+
+	if (RtmpOSTaskAlloc(pTaskOrg, pTaskList) == FALSE)
+		return NDIS_STATUS_FAILURE;
+
+	pTask = (OS_TASK *) (pTaskOrg->pContent);
+	if (pTask == NULL)
+		return NDIS_STATUS_FAILURE;
+
+	return __RtmpOSTaskInit(pTask, pTaskName, pPriv, pSemList);
+}
+
+/*
+========================================================================
+Routine Description:
+	Wait for a event in the task.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	pTaskOrg		- the task
+
+Return Value:
+	TRUE
+	FALSE
+
+Note:
+========================================================================
+*/
+BOOLEAN RtmpOSTaskWait(IN VOID *pReserved,
+		       IN RTMP_OS_TASK *pTaskOrg,
+		       IN INT32 *pStatus) {
+	OS_TASK *pTask;
+
+	pTask = (OS_TASK *) (pTaskOrg->pContent);
+	if (pTask == NULL)
+		return FALSE;
+
+	return __RtmpOSTaskWait(pReserved, pTask, pStatus);
+}
+
+/*
+========================================================================
+Routine Description:
+	Get private data for the task.
+
+Arguments:
+	pTaskOrg		- the task
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID *RtmpOsTaskDataGet(IN RTMP_OS_TASK *pTaskOrg) {
+	if (pTaskOrg->pContent == NULL)
+		return NULL;
+
+	return (((OS_TASK *) (pTaskOrg->pContent))->priv);
+}
+
+/*
+========================================================================
+Routine Description:
+	Allocate a lock.
+
+Arguments:
+	pLock			- the lock
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+BOOLEAN RtmpOsAllocateLock(IN NDIS_SPIN_LOCK *pLock,
+			   IN LIST_HEADER *pLockList) {
+	if (RTMP_OS_Alloc_Rsc(pLockList, pLock,
+			      sizeof (OS_NDIS_SPIN_LOCK)) == FALSE) {
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("%s: alloc lock fail!\n", __FUNCTION__));
+		return FALSE;	/* allocate fail */
+	}
+
+	OS_NdisAllocateSpinLock(pLock->pContent);
+	return TRUE;
+}
+
+/*
+========================================================================
+Routine Description:
+	Free a lock.
+
+Arguments:
+	pLockOrg		- the lock
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsFreeSpinLock(IN NDIS_SPIN_LOCK *pLockOrg) {
+	OS_NdisFreeSpinLock(pLock);
+
+	/* we will free all locks memory in RTMP_OS_FREE_LOCK() */
+}
+
+/*
+========================================================================
+Routine Description:
+	Spin lock bh.
+
+Arguments:
+	pLockOrg		- the lock
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsSpinLockBh(IN NDIS_SPIN_LOCK *pLockOrg) {
+	OS_NDIS_SPIN_LOCK *pLock;
+
+	pLock = (OS_NDIS_SPIN_LOCK *) (pLockOrg->pContent);
+	if (pLock != NULL) {
+		OS_SEM_LOCK(pLock);
+	} else
+		printk("lock> warning! the lock was freed!\n");
+}
+
+/*
+========================================================================
+Routine Description:
+	Spin unlock bh.
+
+Arguments:
+	pLockOrg		- the lock
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsSpinUnLockBh(IN NDIS_SPIN_LOCK *pLockOrg) {
+	OS_NDIS_SPIN_LOCK *pLock;
+
+	pLock = (OS_NDIS_SPIN_LOCK *) (pLockOrg->pContent);
+	if (pLock != NULL) {
+		OS_SEM_UNLOCK(pLock);
+	} else
+		printk("lock> warning! the lock was freed!\n");
+}
+
+/*
+========================================================================
+Routine Description:
+	Interrupt lock.
+
+Arguments:
+	pLockOrg		- the lock
+	pIrqFlags		- the lock flags
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsIntLock(IN NDIS_SPIN_LOCK *pLockOrg,
+		   IN ULONG *pIrqFlags) {
+	OS_NDIS_SPIN_LOCK *pLock;
+
+	pLock = (OS_NDIS_SPIN_LOCK *) (pLockOrg->pContent);
+	if (pLock != NULL) {
+		OS_INT_LOCK(pLock, *pIrqFlags);
+	} else
+		printk("lock> warning! the lock was freed!\n");
+}
+
+/*
+========================================================================
+Routine Description:
+	Interrupt unlock.
+
+Arguments:
+	pLockOrg		- the lock
+	IrqFlags		- the lock flags
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsIntUnLock(IN NDIS_SPIN_LOCK *pLockOrg,
+		     IN ULONG IrqFlags) {
+	OS_NDIS_SPIN_LOCK *pLock;
+
+	pLock = (OS_NDIS_SPIN_LOCK *) (pLockOrg->pContent);
+	if (pLock != NULL) {
+		OS_INT_UNLOCK(pLock, IrqFlags);
+	} else
+		printk("lock> warning! the lock was freed!\n");
+}
+
+/*
+========================================================================
+Routine Description:
+	Get MAC address for the network interface.
+
+Arguments:
+	pDev			- the device
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+unsigned char *RtmpOsNetDevGetPhyAddr(IN VOID *pDev) {
+	return RTMP_OS_NETDEV_GET_PHYADDR((PNET_DEV) pDev);
+}
+
+/*
+========================================================================
+Routine Description:
+	Start network interface TX queue.
+
+Arguments:
+	pDev			- the device
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsNetQueueStart(IN PNET_DEV pDev) {
+	RTMP_OS_NETDEV_START_QUEUE(pDev);
+}
+
+/*
+========================================================================
+Routine Description:
+	Stop network interface TX queue.
+
+Arguments:
+	pDev			- the device
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsNetQueueStop(IN PNET_DEV pDev) {
+	RTMP_OS_NETDEV_STOP_QUEUE(pDev);
+}
+
+/*
+========================================================================
+Routine Description:
+	Wake up network interface TX queue.
+
+Arguments:
+	pDev			- the device
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsNetQueueWake(IN PNET_DEV pDev) {
+	RTMP_OS_NETDEV_WAKE_QUEUE(pDev);
+}
+
+/*
+========================================================================
+Routine Description:
+	Assign network interface to the packet.
+
+Arguments:
+	pPkt			- the packet
+	pDev			- the device
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsSetPktNetDev(IN VOID *pPkt,
+			IN VOID *pDev) {
+	SET_OS_PKT_NETDEV(pPkt, (PNET_DEV) pDev);
+}
+
+/*
+========================================================================
+Routine Description:
+	Assign private data pointer to the network interface.
+
+Arguments:
+	pDev			- the device
+	pPriv			- the pointer
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsSetNetDevPriv(IN VOID *pDev,
+			 IN VOID *pPriv) {
+	RTMP_OS_NETDEV_SET_PRIV((PNET_DEV) pDev, pPriv);
+}
+
+/*
+========================================================================
+Routine Description:
+	Get private data pointer from the network interface.
+
+Arguments:
+	pDev			- the device
+	pPriv			- the pointer
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID *RtmpOsGetNetDevPriv(IN VOID *pDev) {
+	return (VOID *) RTMP_OS_NETDEV_GET_PRIV((PNET_DEV) pDev);
+}
+
+/*
+========================================================================
+Routine Description:
+	Assign network interface type.
+
+Arguments:
+	pDev			- the device
+	Type			- the type
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsSetNetDevType(IN VOID *pDev,
+			 IN USHORT Type) {
+	RTMP_OS_NETDEV_SET_TYPE((PNET_DEV) pDev, Type);
+}
+
+/*
+========================================================================
+Routine Description:
+	Assign network interface type for monitor mode.
+
+Arguments:
+	pDev			- the device
+	Type			- the type
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsSetNetDevTypeMonitor(IN VOID *pDev) {
+	RTMP_OS_NETDEV_SET_TYPE((PNET_DEV) pDev, ARPHRD_IEEE80211_PRISM);
+}
+
+/*
+========================================================================
+Routine Description:
+	Get PID.
+
+Arguments:
+	pPkt			- the packet
+	pDev			- the device
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsGetPid(IN ULONG *pDst,
+		  IN ULONG PID) {
+	RT_GET_OS_PID(*pDst, PID);
+}
+
+/*
+========================================================================
+Routine Description:
+	Wait for a moment.
+
+Arguments:
+	Time			- micro second
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsWait(IN UINT32 Time) {
+	OS_WAIT(Time);
+}
+
+/*
+========================================================================
+Routine Description:
+	Check if b is smaller than a.
+
+Arguments:
+	Time			- micro second
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+UINT32 RtmpOsTimerAfter(IN ULONG a,
+			IN ULONG b) {
+	return RTMP_TIME_AFTER(a, b);
+}
+
+/*
+========================================================================
+Routine Description:
+	Check if b is not smaller than a.
+
+Arguments:
+	Time			- micro second
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+UINT32 RtmpOsTimerBefore(IN ULONG a,
+			 IN ULONG b) {
+	return RTMP_TIME_BEFORE(a, b);
+}
+
+/*
+========================================================================
+Routine Description:
+	Get current system time.
+
+Arguments:
+	pTime			- system time (tick)
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsGetSystemUpTime(IN ULONG *pTime) {
+	NdisGetSystemUpTime(pTime);
+}
+
+/*
+========================================================================
+Routine Description:
+	Get OS tick unit.
+
+Arguments:
+	pOps			- Utility table
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+UINT32 RtmpOsTickUnitGet(VOID) {
+	return HZ;
+}
+
+/*
+========================================================================
+Routine Description:
+	ntohs
+
+Arguments:
+	Value			- the value
+
+Return Value:
+	the value
+
+Note:
+========================================================================
+*/
+UINT16 RtmpOsNtohs(IN UINT16 Value) {
+	return OS_NTOHS(Value);
+}
+
+/*
+========================================================================
+Routine Description:
+	htons
+
+Arguments:
+	Value			- the value
+
+Return Value:
+	the value
+
+Note:
+========================================================================
+*/
+UINT16 RtmpOsHtons(IN UINT16 Value) {
+	return OS_HTONS(Value);
+}
+
+/*
+========================================================================
+Routine Description:
+	ntohl
+
+Arguments:
+	Value			- the value
+
+Return Value:
+	the value
+
+Note:
+========================================================================
+*/
+UINT32 RtmpOsNtohl(IN UINT32 Value) {
+	return OS_NTOHL(Value);
+}
+
+/*
+========================================================================
+Routine Description:
+	htonl
+
+Arguments:
+	Value			- the value
+
+Return Value:
+	the value
+
+Note:
+========================================================================
+*/
+UINT32 RtmpOsHtonl(IN UINT32 Value) {
+	return OS_HTONL(Value);
+}
+
+/*
+========================================================================
+Routine Description:
+	get_unaligned for 16-bit value.
+
+Arguments:
+	pWord			- the value
+
+Return Value:
+	the value
+
+Note:
+========================================================================
+*/
+UINT16 RtmpOsGetUnaligned(IN UINT16 *pWord) {
+	return get_unaligned(pWord);
+}
+
+/*
+========================================================================
+Routine Description:
+	get_unaligned for 32-bit value.
+
+Arguments:
+	pWord			- the value
+
+Return Value:
+	the value
+
+Note:
+========================================================================
+*/
+UINT32 RtmpOsGetUnaligned32(IN UINT32 *pWord) {
+	return get_unaligned(pWord);
+}
+
+/*
+========================================================================
+Routine Description:
+	get_unaligned for long-bit value.
+
+Arguments:
+	pWord			- the value
+
+Return Value:
+	the value
+
+Note:
+========================================================================
+*/
+ULONG RtmpOsGetUnalignedlong(IN ULONG *pWord) {
+	return get_unaligned(pWord);
+}
+
+/*
+========================================================================
+Routine Description:
+	Get maximum scan data length.
+
+Arguments:
+	None
+
+Return Value:
+	length
+
+Note:
+	Used in site servey.
+========================================================================
+*/
+ULONG RtmpOsMaxScanDataGet(VOID) {
+	return IW_SCAN_MAX_DATA;
+}
+
+/*
+========================================================================
+Routine Description:
+	copy_from_user
+
+Arguments:
+	to				-
+	from			-
+	n				- size
+
+Return Value:
+	copy size
+
+Note:
+========================================================================
+*/
+ULONG RtmpOsCopyFromUser(OUT VOID *to,
+			 IN const void *from,
+			 IN ULONG n) {
+	return (copy_from_user(to, from, n));
+}
+
+/*
+========================================================================
+Routine Description:
+	copy_to_user
+
+Arguments:
+	to				-
+	from			-
+	n				- size
+
+Return Value:
+	copy size
+
+Note:
+========================================================================
+*/
+ULONG RtmpOsCopyToUser(OUT VOID *to,
+		       IN const void *from,
+		       IN ULONG n) {
+	return (copy_to_user(to, from, n));
+}
+
+/*
+========================================================================
+Routine Description:
+	Initialize a semaphore.
+
+Arguments:
+	pSem			- the semaphore
+
+Return Value:
+	TRUE			- Successfully
+	FALSE			- Fail
+
+Note:
+========================================================================
+*/
+BOOLEAN RtmpOsSemaInitLocked(IN RTMP_OS_SEM *pSem,
+			     IN LIST_HEADER *pSemList) {
+	if (RTMP_OS_Alloc_Rsc(pSemList, pSem, sizeof (OS_SEM)) == FALSE) {
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("%s: alloc semaphore fail!\n", __FUNCTION__));
+		return FALSE;	/* allocate fail */
+	}
+
+	OS_SEM_EVENT_INIT_LOCKED((OS_SEM *) (pSem->pContent));
+	return TRUE;
+}
+
+/*
+========================================================================
+Routine Description:
+	Initialize a semaphore.
+
+Arguments:
+	pSemOrg			- the semaphore
+
+Return Value:
+	TRUE			- Successfully
+	FALSE			- Fail
+
+Note:
+========================================================================
+*/
+BOOLEAN RtmpOsSemaInit(IN RTMP_OS_SEM *pSem,
+		       IN LIST_HEADER *pSemList) {
+	if (RTMP_OS_Alloc_Rsc(pSemList, pSem, sizeof (OS_SEM)) == FALSE) {
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("%s: alloc semaphore fail!\n", __FUNCTION__));
+		return FALSE;	/* allocate fail */
+	}
+
+	OS_SEM_EVENT_INIT((OS_SEM *) (pSem->pContent));
+	return TRUE;
+}
+
+/*
+========================================================================
+Routine Description:
+	Destroy a semaphore.
+
+Arguments:
+	pSemOrg			- the semaphore
+
+Return Value:
+	TRUE			- Successfully
+	FALSE			- Fail
+
+Note:
+========================================================================
+*/
+BOOLEAN RtmpOsSemaDestory(IN RTMP_OS_SEM *pSemOrg) {
+	OS_SEM *pSem;
+
+	pSem = (OS_SEM *) (pSemOrg->pContent);
+	if (pSem != NULL) {
+		OS_SEM_EVENT_DESTORY(pSem);
+
+		/* we will free all tasks memory in RTMP_OS_FREE_SEM() */
+/*		os_free_mem(NULL, pSem); */
+/*		pSemOrg->pContent = NULL; */
+	} else
+		printk("sem> warning! double-free sem!\n");
+	return TRUE;
+}
+
+/*
+========================================================================
+Routine Description:
+	Wait a semaphore.
+
+Arguments:
+	pSemOrg			- the semaphore
+
+Return Value:
+	0				- Successfully
+	Otherwise		- Fail
+
+Note:
+========================================================================
+*/
+INT32 RtmpOsSemaWaitInterruptible(IN RTMP_OS_SEM *pSemOrg) {
+	OS_SEM *pSem;
+	INT32 Status = -1;
+
+	pSem = (OS_SEM *) (pSemOrg->pContent);
+	if (pSem != NULL)
+		OS_SEM_EVENT_WAIT(pSem, Status);
+	return Status;
+}
+
+/*
+========================================================================
+Routine Description:
+	Wake up a semaphore.
+
+Arguments:
+	pSemOrg			- the semaphore
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsSemaWakeUp(IN RTMP_OS_SEM *pSemOrg) {
+	OS_SEM *pSem;
+
+	pSem = (OS_SEM *) (pSemOrg->pContent);
+	if (pSem != NULL)
+		OS_SEM_EVENT_UP(pSem);
+}
+
+/*
+========================================================================
+Routine Description:
+	Check if we are in a interrupt.
+
+Arguments:
+	None
+
+Return Value:
+	0				- No
+	Otherwise		- Yes
+
+Note:
+========================================================================
+*/
+INT32 RtmpOsIsInInterrupt(VOID) {
+	return (in_interrupt());
+}
+
+/*
+========================================================================
+Routine Description:
+	Copy the data buffer to the packet frame body.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	pNetPkt			- the packet
+	ThisFrameLen	- copy length
+	pData			- the data buffer
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsPktBodyCopy(IN PNET_DEV pNetDev,
+		       IN PNDIS_PACKET pNetPkt,
+		       IN ULONG ThisFrameLen,
+		       IN PUCHAR pData) {
+	memcpy(skb_put(pNetPkt, ThisFrameLen), pData, ThisFrameLen);
+	SET_OS_PKT_NETDEV(pNetPkt, pNetDev);
+	RTMP_SET_PACKET_SOURCE(OSPKT_TO_RTPKT(pNetPkt), PKTSRC_NDIS);
+}
+
+/*
+========================================================================
+Routine Description:
+	Check if the packet is cloned.
+
+Arguments:
+	pNetPkt			- the packet
+
+Return Value:
+	TRUE			- Yes
+	Otherwise		- No
+
+Note:
+========================================================================
+*/
+INT RtmpOsIsPktCloned(IN PNDIS_PACKET pNetPkt) {
+	return OS_PKT_CLONED(pNetPkt);
+}
+
+/*
+========================================================================
+Routine Description:
+	Duplicate a packet.
+
+Arguments:
+	pNetPkt			- the packet
+
+Return Value:
+	the new packet
+
+Note:
+========================================================================
+*/
+PNDIS_PACKET RtmpOsPktCopy(IN PNDIS_PACKET pNetPkt) {
+	return skb_copy(RTPKT_TO_OSPKT(pNetPkt), GFP_ATOMIC);
+}
+
+/*
+========================================================================
+Routine Description:
+	Clone a packet.
+
+Arguments:
+	pNetPkt			- the packet
+
+Return Value:
+	the cloned packet
+
+Note:
+========================================================================
+*/
+PNDIS_PACKET RtmpOsPktClone(IN PNDIS_PACKET pNetPkt) {
+	return skb_clone(RTPKT_TO_OSPKT(pNetPkt), MEM_ALLOC_FLAG);
+}
+
+/*
+========================================================================
+Routine Description:
+	Assign the data pointer for the packet.
+
+Arguments:
+	pNetPkt			- the packet
+	*pData			- the data buffer
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsPktDataPtrAssign(IN PNDIS_PACKET pNetPkt,
+			    IN UCHAR *pData) {
+	SET_OS_PKT_DATAPTR(pNetPkt, pData);
+}
+
+/*
+========================================================================
+Routine Description:
+	Assign the data length for the packet.
+
+Arguments:
+	pNetPkt			- the packet
+	Len				- the data length
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsPktLenAssign(IN PNDIS_PACKET pNetPkt,
+			IN LONG Len) {
+	SET_OS_PKT_LEN(pNetPkt, Len);
+}
+
+/*
+========================================================================
+Routine Description:
+	Adjust the tail pointer for the packet.
+
+Arguments:
+	pNetPkt			- the packet
+	removedTagLen	- the size for adjustment
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsPktTailAdjust(IN PNDIS_PACKET pNetPkt,
+			 IN UINT removedTagLen) {
+	OS_PKT_TAIL_ADJUST(pNetPkt, removedTagLen);
+}
+
+/*
+========================================================================
+Routine Description:
+	Adjust the data pointer for the packet.
+
+Arguments:
+	pNetPkt			- the packet
+	Len				- the size for adjustment
+
+Return Value:
+	the new data pointer for the packet
+
+Note:
+========================================================================
+*/
+PUCHAR RtmpOsPktTailBufExtend(IN PNDIS_PACKET pNetPkt,
+			      IN UINT Len) {
+	return OS_PKT_TAIL_BUF_EXTEND(pNetPkt, Len);
+}
+
+/*
+========================================================================
+Routine Description:
+	adjust headroom for the packet.
+
+Arguments:
+	pNetPkt			- the packet
+	Len				- the size for adjustment
+
+Return Value:
+	the new data pointer for the packet
+
+Note:
+========================================================================
+*/
+VOID RtmpOsPktReserve(IN PNDIS_PACKET pNetPkt,
+		      IN UINT Len) {
+	OS_PKT_RESERVE(pNetPkt, Len);
+}
+
+/*
+========================================================================
+Routine Description:
+	Adjust the data pointer for the packet.
+
+Arguments:
+	pNetPkt			- the packet
+	Len				- the size for adjustment
+
+Return Value:
+	the new data pointer for the packet
+
+Note:
+========================================================================
+*/
+PUCHAR RtmpOsPktHeadBufExtend(IN PNDIS_PACKET pNetPkt,
+			      IN UINT Len) {
+	return OS_PKT_HEAD_BUF_EXTEND(pNetPkt, Len);
+}
+
+/*
+========================================================================
+Routine Description:
+	
+
+Arguments:
+	pPkt			- the packet
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsPktInfPpaSend(IN PNDIS_PACKET pNetPkt) {
+#ifdef INF_PPA_SUPPORT
+	struct sk_buff *pRxPkt = RTPKT_TO_OSPKT(pNetPkt);
+	int ret = 0;
+	unsigned int ppa_flags = 0;	/* reserved for now */
+
+	pRxPkt->protocol = eth_type_trans(pRxPkt, pRxPkt->dev);
+
+	memset(pRxPkt->head, 0, pRxPkt->data - pRxPkt->head - 14);
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("ppa_hook_directpath_send_fn rx :ret:%d headroom:%d dev:%s pktlen:%d<===\n",
+		  ret, skb_headroom(pRxPkt)
+		  , pRxPkt->dev->name, pRxPkt->len));
+	hex_dump("rx packet", pRxPkt->data, 32);
+	ret =
+	    ppa_hook_directpath_send_fn(pAd->g_if_id, pRxPkt, pRxPkt->len,
+					ppa_flags);
+#endif /* INF_PPA_SUPPORT */
+}
+
+INT32 RtmpThreadPidKill(IN RTMP_OS_PID PID) {
+	return KILL_THREAD_PID(PID, SIGTERM, 1);
+}
+
+long RtmpOsSimpleStrtol(IN const char *cp, IN char **endp, IN unsigned int base) {
+	return simple_strtol(cp,
+			     endp,
+			     base);
+	return simple_strtol(cp, endp, base);
+}
+
+BOOLEAN RtmpOsPktOffsetInit(VOID) {
+	struct sk_buff *pPkt = NULL;
+
+	if ((RTPktOffsetData == 0) && (RTPktOffsetLen == 0)
+	    && (RTPktOffsetCB == 0)) {
+		pPkt = kmalloc(sizeof (struct sk_buff), GFP_ATOMIC);
+		if (pPkt == NULL)
+			return FALSE;
+
+		RTPktOffsetData = (ULONG) (&(pPkt->data)) - (ULONG) pPkt;
+		RTPktOffsetLen = (ULONG) (&(pPkt->len)) - (ULONG) pPkt;
+		RTPktOffsetCB = (ULONG) (pPkt->cb) - (ULONG) pPkt;
+		kfree(pPkt);
+
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("packet> data offset = %lu\n", RTPktOffsetData));
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("packet> len offset = %lu\n", RTPktOffsetLen));
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("packet> cb offset = %lu\n", RTPktOffsetCB));
+	}
+
+	return TRUE;
+}
+
+/*
+========================================================================
+Routine Description:
+	Initialize the OS atomic_t.
+
+Arguments:
+	pAtomic			- the atomic
+
+Return Value:
+	TRUE			- allocation successfully
+	FALSE			- allocation fail
+
+Note:
+========================================================================
+*/
+BOOLEAN RtmpOsAtomicInit(IN RTMP_OS_ATOMIC *pAtomic,
+			 IN LIST_HEADER *pAtomicList) {
+	if (RTMP_OS_Alloc_Rsc(pAtomicList, pAtomic, sizeof (atomic_t)) == FALSE) {
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("%s: alloc atomic fail!\n", __FUNCTION__));
+		return FALSE;	/* allocate fail */
+	}
+
+	return TRUE;
+}
+
+/*
+========================================================================
+Routine Description:
+	Atomic read a variable.
+
+Arguments:
+	pAtomic			- the atomic
+
+Return Value:
+	content
+
+Note:
+========================================================================
+*/
+LONG RtmpOsAtomicRead(IN RTMP_OS_ATOMIC *pAtomicSrc) {
+	atomic_t *pAtomic;
+
+	if (pAtomicSrc->pContent == NULL)
+		return 0;
+
+	pAtomic = (atomic_t *) (pAtomicSrc->pContent);
+	return atomic_read(pAtomic);
+}
+
+/*
+========================================================================
+Routine Description:
+	Atomic dec a variable.
+
+Arguments:
+	pAtomic			- the atomic
+
+Return Value:
+	content
+
+Note:
+========================================================================
+*/
+VOID RtmpOsAtomicDec(IN RTMP_OS_ATOMIC *pAtomicSrc) {
+	atomic_t *pAtomic;
+
+	if (pAtomicSrc->pContent == NULL)
+		return;
+
+	pAtomic = (atomic_t *) (pAtomicSrc->pContent);
+	atomic_dec(pAtomic);
+}
+
+/*
+========================================================================
+Routine Description:
+	Sets a 32-bit variable to the specified value as an atomic operation.
+
+Arguments:
+	pAtomic			- the atomic
+	Value			- the value to be exchanged
+
+Return Value:
+	the initial value of the pAtomicSrc parameter
+
+Note:
+========================================================================
+*/
+VOID RtmpOsAtomicInterlockedExchange(IN RTMP_OS_ATOMIC *pAtomicSrc,
+				     IN LONG Value) {
+	atomic_t *pAtomic;
+
+	if (pAtomicSrc->pContent == NULL)
+		return;
+
+	pAtomic = (atomic_t *) (pAtomicSrc->pContent);
+	InterlockedExchange(pAtomic, Value);
+}
+
+/*
+========================================================================
+Routine Description:
+	Initialize the OS utilities.
+
+Arguments:
+	pOps			- Utility table
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+VOID RtmpOsOpsInit(IN RTMP_OS_ABL_OPS *pOps) {
+	pOps->ra_printk = (RTMP_PRINTK)printk;
+	pOps->ra_snprintf = (RTMP_SNPRINTF)snprintf;
+}
+
+
+#else /* OS_ABL_FUNC_SUPPORT */
+
+void RtmpOSFSInfoChange(IN RTMP_OS_FS_INFO *pOSFSInfoOrg,
+			IN BOOLEAN bSet) {
+	__RtmpOSFSInfoChange(pOSFSInfoOrg, bSet);
+}
+
+/* timeout -- ms */
+VOID RTMP_SetPeriodicTimer(IN NDIS_MINIPORT_TIMER *pTimerOrg,
+			   IN unsigned long timeout) {
+	__RTMP_SetPeriodicTimer(pTimerOrg,
+				timeout);
+}
+
+/* convert NdisMInitializeTimer --> RTMP_OS_Init_Timer */
+VOID RTMP_OS_Init_Timer(
+					  IN VOID *pReserved,
+					  IN NDIS_MINIPORT_TIMER *pTimerOrg,
+					  IN TIMER_FUNCTION function,
+					  IN PVOID data,
+					  IN LIST_HEADER *pTimerList) {
+	__RTMP_OS_Init_Timer(pReserved, pTimerOrg, function, data);
+}
+
+VOID RTMP_OS_Add_Timer(IN NDIS_MINIPORT_TIMER *pTimerOrg,
+		       IN unsigned long timeout) {
+	__RTMP_OS_Add_Timer(pTimerOrg,
+			    timeout);
+}
+
+VOID RTMP_OS_Mod_Timer(IN NDIS_MINIPORT_TIMER *pTimerOrg,
+			 IN unsigned long timeout) {
+	__RTMP_OS_Mod_Timer(pTimerOrg,
+			    timeout);
+}
+
+VOID RTMP_OS_Del_Timer(IN NDIS_MINIPORT_TIMER *pTimerOrg,
+			 OUT BOOLEAN *pCancelled) {
+	__RTMP_OS_Del_Timer(pTimerOrg, pCancelled);
+}
+
+VOID RTMP_OS_Release_Timer(IN NDIS_MINIPORT_TIMER *pTimerOrg) {
+	__RTMP_OS_Release_Timer(pTimerOrg);
+}
+
+NDIS_STATUS RtmpOSTaskKill(IN RTMP_OS_TASK * pTask) {
+	return __RtmpOSTaskKill(pTask);
+}
+
+INT RtmpOSTaskNotifyToExit(IN RTMP_OS_TASK * pTask) {
+	return __RtmpOSTaskNotifyToExit(pTask);
+}
+
+void RtmpOSTaskCustomize(IN RTMP_OS_TASK * pTask) {
+	__RtmpOSTaskCustomize(pTask);
+}
+
+NDIS_STATUS RtmpOSTaskAttach(IN RTMP_OS_TASK * pTask,
+			     IN RTMP_OS_TASK_CALLBACK fn,
+			     IN ULONG arg) {
+	return __RtmpOSTaskAttach(pTask, fn, arg);
+}
+
+NDIS_STATUS RtmpOSTaskInit(IN RTMP_OS_TASK * pTask,
+			   IN PSTRING pTaskName,
+			   IN VOID *pPriv,
+			   IN LIST_HEADER * pTaskList,
+			   IN LIST_HEADER * pSemList) {
+	return __RtmpOSTaskInit(pTask, pTaskName, pPriv, pSemList);
+}
+
+BOOLEAN RtmpOSTaskWait(IN VOID *pReserved,
+		       IN RTMP_OS_TASK * pTask,
+		       IN INT32 *pStatus) {
+	return __RtmpOSTaskWait(pReserved, pTask, pStatus);
+}
+
+VOID RtmpOsTaskWakeUp(IN RTMP_OS_TASK * pTask) {
+#ifdef KTHREAD_SUPPORT
+	WAKE_UP(pTask);
+#else
+	RTMP_SEM_EVENT_UP(&pTask->taskSema);
+#endif
+}
+
+#endif /* OS_ABL_FUNC_SUPPORT */
+
+/* End of rt_linux.c */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/rt_linux_symb.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/rt_linux_symb.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/rt_linux_symb.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/rt_linux_symb.c	2017-09-23 03:42:49.830675639 +0800
@@ -0,0 +1,284 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#define RTMP_MODULE_OS
+#define RTMP_MODULE_OS_UTIL
+
+/*#include "rt_config.h" */
+#include "rtmp_comm.h"
+#include "rtmp_osabl.h"
+#include "rt_os_util.h"
+
+
+#ifdef OS_ABL_FUNC_SUPPORT
+
+EXPORT_SYMBOL(RTDebugLevel);
+
+/* utility */
+EXPORT_SYMBOL(RtmpUtilInit);
+EXPORT_SYMBOL(RTMPFreeNdisPacket);
+EXPORT_SYMBOL(AdapterBlockAllocateMemory);
+
+EXPORT_SYMBOL(RTMP_SetPeriodicTimer);
+EXPORT_SYMBOL(RTMP_OS_Add_Timer);
+EXPORT_SYMBOL(RTMP_OS_Mod_Timer);
+EXPORT_SYMBOL(RTMP_OS_Del_Timer);
+EXPORT_SYMBOL(RTMP_OS_Init_Timer);
+EXPORT_SYMBOL(RTMP_OS_Release_Timer);
+
+EXPORT_SYMBOL(RTMP_OS_Alloc_Rsc);
+EXPORT_SYMBOL(RTMP_OS_Free_Rscs);
+
+EXPORT_SYMBOL(os_alloc_mem);
+EXPORT_SYMBOL(os_alloc_mem_suspend);
+EXPORT_SYMBOL(os_free_mem);
+
+EXPORT_SYMBOL(ExpandPacket);
+EXPORT_SYMBOL(ClonePacket);
+EXPORT_SYMBOL(RTMP_AllocateFragPacketBuffer);
+EXPORT_SYMBOL(Sniff2BytesFromNdisBuffer);
+EXPORT_SYMBOL(RtmpOSNetPktAlloc);
+EXPORT_SYMBOL(duplicate_pkt_with_TKIP_MIC);
+EXPORT_SYMBOL(RTMPAllocateNdisPacket);
+EXPORT_SYMBOL(RTMP_QueryPacketInfo);
+EXPORT_SYMBOL(DuplicatePacket);
+EXPORT_SYMBOL(duplicate_pkt);
+EXPORT_SYMBOL(RTMPL2FrameTxAction);
+EXPORT_SYMBOL(RtmpOsPktBodyCopy);
+EXPORT_SYMBOL(RtmpOsIsPktCloned);
+EXPORT_SYMBOL(RtmpOsPktCopy);
+EXPORT_SYMBOL(RtmpOsPktClone);
+EXPORT_SYMBOL(RtmpOsPktDataPtrAssign);
+EXPORT_SYMBOL(RtmpOsPktLenAssign);
+EXPORT_SYMBOL(RtmpOsPktTailAdjust);
+EXPORT_SYMBOL(RtmpOsPktTailBufExtend);
+EXPORT_SYMBOL(RtmpOsPktHeadBufExtend);
+EXPORT_SYMBOL(RtmpOsPktReserve);
+EXPORT_SYMBOL(RtmpOsPktProtocolAssign);
+EXPORT_SYMBOL(RtmpOsPktInfPpaSend);
+EXPORT_SYMBOL(RtmpThreadPidKill);
+EXPORT_SYMBOL(RtmpOsPktRcvHandle);
+#ifdef IAPP_SUPPORT
+EXPORT_SYMBOL(RtmpOsPktIappMakeUp);
+#endif /* IAPP_SUPPORT */
+EXPORT_SYMBOL(RtmpOsPktInit);
+EXPORT_SYMBOL(wlan_802_11_to_802_3_packet);
+EXPORT_SYMBOL(RtmpOsPktOffsetInit);
+
+EXPORT_SYMBOL(RtmpOSNetDevCreate);
+EXPORT_SYMBOL(RtmpOSNetDevClose);
+EXPORT_SYMBOL(RtmpOSNetDevAttach);
+EXPORT_SYMBOL(RtmpOSNetDevDetach);
+EXPORT_SYMBOL(RtmpOSNetDevFree);
+EXPORT_SYMBOL(RtmpOSNetDevIsUp);
+EXPORT_SYMBOL(RtmpOsNetDevGetPhyAddr);
+EXPORT_SYMBOL(RtmpOsNetQueueStart);
+EXPORT_SYMBOL(RtmpOsNetQueueStop);
+EXPORT_SYMBOL(RtmpOsNetQueueWake);
+EXPORT_SYMBOL(RtmpOsSetPktNetDev);
+EXPORT_SYMBOL(RtmpOsPktNetDevGet);
+EXPORT_SYMBOL(RtmpOsGetNetDevName);
+EXPORT_SYMBOL(RtmpOsSetNetDevPriv);
+EXPORT_SYMBOL(RtmpOsGetNetDevPriv);
+EXPORT_SYMBOL(RtmpOsSetNetDevType);
+EXPORT_SYMBOL(RtmpOsSetNetDevTypeMonitor);
+EXPORT_SYMBOL(RtmpOSNetDevAddrSet);
+
+EXPORT_SYMBOL(RtmpOSFileOpen);
+EXPORT_SYMBOL(RtmpOSFSInfoChange);
+EXPORT_SYMBOL(RtmpOSFileWrite);
+EXPORT_SYMBOL(RtmpOSFileRead);
+EXPORT_SYMBOL(RtmpOSFileClose);
+EXPORT_SYMBOL(RtmpOSFileSeek);
+EXPORT_SYMBOL(RtmpOsFileIsErr);
+
+EXPORT_SYMBOL(RtmpOSTaskNotifyToExit);
+EXPORT_SYMBOL(RtmpOSTaskInit);
+EXPORT_SYMBOL(RtmpOSTaskAttach);
+EXPORT_SYMBOL(RtmpOSTaskCustomize);
+EXPORT_SYMBOL(RtmpOSTaskKill);
+EXPORT_SYMBOL(RtmpOSTaskAlloc);
+EXPORT_SYMBOL(RtmpOSTaskFree);
+EXPORT_SYMBOL(RtmpOSTaskWait);
+EXPORT_SYMBOL(RtmpOsCheckTaskLegality);
+EXPORT_SYMBOL(RtmpOsTaskDataGet);
+EXPORT_SYMBOL(RtmpOsTaskIsKilled);
+EXPORT_SYMBOL(RtmpOsTaskWakeUp);
+
+EXPORT_SYMBOL(RtmpOsTaskletSche);
+EXPORT_SYMBOL(RtmpOsTaskletInit);
+EXPORT_SYMBOL(RtmpOsTaskletKill);
+EXPORT_SYMBOL(RtmpOsTaskletDataAssign);
+EXPORT_SYMBOL(RtmpOsTaskPidInit);
+
+EXPORT_SYMBOL(RtmpOsAllocateLock);
+EXPORT_SYMBOL(RtmpOsFreeSpinLock);
+EXPORT_SYMBOL(RtmpOsSpinLockBh);
+EXPORT_SYMBOL(RtmpOsSpinUnLockBh);
+EXPORT_SYMBOL(RtmpOsIntLock);
+EXPORT_SYMBOL(RtmpOsIntUnLock);
+
+EXPORT_SYMBOL(RtmpOsSemaInitLocked);
+EXPORT_SYMBOL(RtmpOsSemaInit);
+EXPORT_SYMBOL(RtmpOsSemaDestory);
+EXPORT_SYMBOL(RtmpOsSemaWaitInterruptible);
+EXPORT_SYMBOL(RtmpOsSemaWakeUp);
+EXPORT_SYMBOL(RtmpOsMlmeUp);
+
+EXPORT_SYMBOL(RtmpOsGetPid);
+
+EXPORT_SYMBOL(RtmpOsWait);
+EXPORT_SYMBOL(RtmpOsTimerAfter);
+EXPORT_SYMBOL(RtmpOsTimerBefore);
+EXPORT_SYMBOL(RtmpOsGetSystemUpTime);
+
+
+EXPORT_SYMBOL(RtmpOsNtohs);
+EXPORT_SYMBOL(RtmpOsHtons);
+EXPORT_SYMBOL(RtmpOsNtohl);
+EXPORT_SYMBOL(RtmpOsHtonl);
+
+EXPORT_SYMBOL(RtmpOsVmalloc);
+EXPORT_SYMBOL(RtmpOsVfree);
+EXPORT_SYMBOL(RtmpOsCopyFromUser);
+EXPORT_SYMBOL(RtmpOsCopyToUser);
+
+EXPORT_SYMBOL(RtmpOsCmdUp);
+EXPORT_SYMBOL(RtmpOsCmdDisplayLenCheck);
+
+EXPORT_SYMBOL(hex_dump);
+EXPORT_SYMBOL(RtmpOsSendWirelessEvent);
+EXPORT_SYMBOL(RTMP_GetCurrentSystemTime);
+EXPORT_SYMBOL(RTMP_GetCurrentSystemTick);
+EXPORT_SYMBOL(RTMPusecDelay);
+EXPORT_SYMBOL(RtmpOsMsDelay);
+EXPORT_SYMBOL(RtmpOSWrielessEventSend);
+EXPORT_SYMBOL(RtmpOSWrielessEventSendExt);
+EXPORT_SYMBOL(RtmpOsTickUnitGet);
+EXPORT_SYMBOL(RtmpOsOpsInit);
+EXPORT_SYMBOL(RtmpOsGetUnaligned);
+EXPORT_SYMBOL(RtmpOsGetUnaligned32);
+EXPORT_SYMBOL(RtmpOsGetUnalignedlong);
+EXPORT_SYMBOL(RtmpOsMaxScanDataGet);
+EXPORT_SYMBOL(RtmpDrvMaxRateGet);
+EXPORT_SYMBOL(RtmpOsWirelessExtVerGet);
+EXPORT_SYMBOL(rtstrchr);
+EXPORT_SYMBOL(RtmpOsIsInInterrupt);
+EXPORT_SYMBOL(RtmpOsSimpleStrtol);
+EXPORT_SYMBOL(RtmpOsStatsAlloc);
+
+EXPORT_SYMBOL(RtmpOsAtomicInit);
+EXPORT_SYMBOL(RtmpOsAtomicRead);
+EXPORT_SYMBOL(RtmpOsAtomicDec);
+EXPORT_SYMBOL(RtmpOsAtomicInterlockedExchange);
+
+EXPORT_SYMBOL(RtmpDrvAllMacPrint);
+EXPORT_SYMBOL(RtmpDrvAllE2PPrint);
+
+EXPORT_SYMBOL(RtmpMeshDown);
+EXPORT_SYMBOL(RtmpOSIRQRelease);
+EXPORT_SYMBOL(RtmpOsWlanEventSet);
+
+/* cfg80211 */
+#ifdef RT_CFG80211_SUPPORT
+extern UCHAR Cfg80211_Chan[];
+EXPORT_SYMBOL(CFG80211OS_UnRegister);
+EXPORT_SYMBOL(CFG80211_SupBandInit);
+EXPORT_SYMBOL(Cfg80211_Chan);
+EXPORT_SYMBOL(CFG80211OS_RegHint);
+EXPORT_SYMBOL(CFG80211OS_RegHint11D);
+EXPORT_SYMBOL(CFG80211OS_BandInfoGet);
+EXPORT_SYMBOL(CFG80211OS_ChanNumGet);
+EXPORT_SYMBOL(CFG80211OS_ChanInfoGet);
+EXPORT_SYMBOL(CFG80211OS_Scaning);
+EXPORT_SYMBOL(CFG80211OS_ScanEnd);
+EXPORT_SYMBOL(CFG80211OS_ConnectResultInform);
+EXPORT_SYMBOL(CFG80211OS_SupBandReInit);
+#endif /* RT_CFG80211_SUPPORT */
+
+/* global variables */
+EXPORT_SYMBOL(RTPktOffsetData);
+EXPORT_SYMBOL(RTPktOffsetLen);
+EXPORT_SYMBOL(RTPktOffsetCB);
+
+#ifdef VENDOR_FEATURE4_SUPPORT
+EXPORT_SYMBOL(OS_NumOfMemAlloc);
+EXPORT_SYMBOL(OS_NumOfMemFree);
+#endif /* VENDOR_FEATURE4_SUPPORT */
+
+#ifdef VENDOR_FEATURE2_SUPPORT
+EXPORT_SYMBOL(OS_NumOfPktAlloc);
+EXPORT_SYMBOL(OS_NumOfPktFree);
+#endif /* VENDOR_FEATURE2_SUPPORT */
+
+/* only for AP */
+
+#ifdef CONFIG_STA_SUPPORT
+EXPORT_SYMBOL(ralinkrate);
+EXPORT_SYMBOL(RT_RateSize);
+EXPORT_SYMBOL(send_monitor_packets);
+
+#ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
+EXPORT_SYMBOL(wext_notify_event_assoc);
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+#ifndef NATIVE_WPA_SUPPLICANT_SUPPORT
+EXPORT_SYMBOL(SendAssocIEsToWpaSupplicant);
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+EXPORT_SYMBOL(WpaSendMicFailureToWpaSupplicant);
+#endif /* WPA_SUPPLICANT_SUPPORT */
+#endif /* CONFIG_STA_SUPPORT */
+
+
+/* only for PCI */
+
+/* only for USB */
+#ifdef RTMP_MAC_USB
+EXPORT_SYMBOL(dump_urb);
+EXPORT_SYMBOL(RtmpOsUsbUrbDataGet);
+EXPORT_SYMBOL(RtmpOsUsbUrbStatusGet);
+EXPORT_SYMBOL(RtmpOsUsbUrbLenGet);
+EXPORT_SYMBOL(RtmpOsUsbEmptyUrbCheck);
+EXPORT_SYMBOL(RtmpOsUsbInitHTTxDesc);
+EXPORT_SYMBOL(RtmpOsUsbInitRxDesc);
+EXPORT_SYMBOL(RtmpOsUsbContextGet);
+EXPORT_SYMBOL(RtmpOsUsbStatusGet);
+EXPORT_SYMBOL(RtmpOsUsbDmaMapping);
+EXPORT_SYMBOL(RtmpOsGetUsbDevVendorID);
+EXPORT_SYMBOL(RtmpOsGetUsbDevProductID);
+#endif /* RTMP_MAC_USB */
+
+/* only for RBUS */
+
+
+#endif /* OS_ABL_SUPPORT */
+
+/* End of rt_linux_symb.c */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/rt_main_dev.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/rt_main_dev.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/rt_main_dev.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/rt_main_dev.c	2017-09-23 03:42:49.830675639 +0800
@@ -0,0 +1,803 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#define RTMP_MODULE_OS
+
+/*#include "rt_config.h" */
+#include "rtmp_comm.h"
+#include "rt_os_util.h"
+#include "rt_os_net.h"
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
+#ifndef SA_SHIRQ
+#define SA_SHIRQ IRQF_SHARED
+#endif
+#endif
+
+#ifdef RTMP_MAC_USB
+#ifdef OS_ABL_SUPPORT
+MODULE_LICENSE("GPL");
+#endif /* OS_ABL_SUPPORT */
+#endif /* RTMP_MAC_USB */
+
+#ifdef CONFIG_APSTA_MIXED_SUPPORT
+/*UINT32 CW_MAX_IN_BITS;*/
+#endif /* CONFIG_APSTA_MIXED_SUPPORT */
+
+/*---------------------------------------------------------------------*/
+/* Private Variables Used                                              */
+/*---------------------------------------------------------------------*/
+
+PSTRING mac = "";		   /* default 00:00:00:00:00:00 */
+PSTRING hostname = "";		   /* default CMPC */
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,12)
+MODULE_PARM (mac, "s");
+#else
+module_param (mac, charp, 0);
+#endif
+MODULE_PARM_DESC (mac, "rt28xx: wireless mac addr");
+
+#ifdef OS_ABL_SUPPORT
+RTMP_DRV_ABL_OPS RtmpDrvOps, *pRtmpDrvOps = &RtmpDrvOps;
+RTMP_NET_ABL_OPS RtmpDrvNetOps, *pRtmpDrvNetOps = &RtmpDrvNetOps;
+#endif /* OS_ABL_SUPPORT */
+
+
+/*---------------------------------------------------------------------*/
+/* Prototypes of Functions Used                                        */
+/*---------------------------------------------------------------------*/
+
+/* public function prototype */
+int rt28xx_close(VOID *net_dev);
+int rt28xx_open(VOID *net_dev);
+
+/* private function prototype */
+static INT rt28xx_send_packets(IN struct sk_buff *skb_p, IN struct net_device *net_dev);
+
+
+
+
+static struct net_device_stats *RT28xx_get_ether_stats(
+    IN  struct net_device *net_dev);
+
+
+/*
+========================================================================
+Routine Description:
+    Close raxx interface.
+
+Arguments:
+	*net_dev			the raxx interface pointer
+
+Return Value:
+    0					Open OK
+	otherwise			Open Fail
+
+Note:
+	1. if open fail, kernel will not call the close function.
+	2. Free memory for
+		(1) Mlme Memory Handler:		MlmeHalt()
+		(2) TX & RX:					RTMPFreeTxRxRingMemory()
+		(3) BA Reordering: 				ba_reordering_resource_release()
+========================================================================
+*/
+int MainVirtualIF_close(IN struct net_device *net_dev)
+{
+    VOID *pAd = NULL;
+
+	GET_PAD_FROM_NET_DEV(pAd, net_dev);	
+
+	/* Sanity check for pAd */
+	if (pAd == NULL)
+		return 0; /* close ok */
+
+	netif_carrier_off(net_dev);
+	netif_stop_queue(net_dev);
+
+	RTMPInfClose(pAd);
+
+
+	VIRTUAL_IF_DOWN(pAd);
+
+	RT_MOD_DEC_USE_COUNT();
+
+	return 0; /* close ok */
+}
+
+/*
+========================================================================
+Routine Description:
+    Open raxx interface.
+
+Arguments:
+	*net_dev			the raxx interface pointer
+
+Return Value:
+    0					Open OK
+	otherwise			Open Fail
+
+Note:
+	1. if open fail, kernel will not call the close function.
+	2. Free memory for
+		(1) Mlme Memory Handler:		MlmeHalt()
+		(2) TX & RX:					RTMPFreeTxRxRingMemory()
+		(3) BA Reordering: 				ba_reordering_resource_release()
+========================================================================
+*/
+int MainVirtualIF_open(IN struct net_device *net_dev)
+{
+    VOID *pAd = NULL;
+
+	GET_PAD_FROM_NET_DEV(pAd, net_dev);	
+
+	/* Sanity check for pAd */
+	if (pAd == NULL)
+		return 0; /* close ok */
+
+
+	if (VIRTUAL_IF_UP(pAd) != 0)
+		return -1;
+
+	/* increase MODULE use count */
+	RT_MOD_INC_USE_COUNT();
+
+	netif_start_queue(net_dev);
+	netif_carrier_on(net_dev);
+	netif_wake_queue(net_dev);
+
+	return 0;
+}
+
+/*
+========================================================================
+Routine Description:
+    Close raxx interface.
+
+Arguments:
+	*net_dev			the raxx interface pointer
+
+Return Value:
+    0					Open OK
+	otherwise			Open Fail
+
+Note:
+	1. if open fail, kernel will not call the close function.
+	2. Free memory for
+		(1) Mlme Memory Handler:		MlmeHalt()
+		(2) TX & RX:					RTMPFreeTxRxRingMemory()
+		(3) BA Reordering: 				ba_reordering_resource_release()
+========================================================================
+*/
+int rt28xx_close(VOID *dev)
+{
+	struct net_device * net_dev = (struct net_device *)dev;
+    VOID	*pAd = NULL;
+/*	BOOLEAN 		Cancelled; */
+/*	UINT32			i = 0; */
+	GET_PAD_FROM_NET_DEV(pAd, net_dev);	
+
+	DBGPRINT(RT_DEBUG_TRACE, ("===> rt28xx_close\n"));
+
+	/* Sanity check for pAd */
+	if (pAd == NULL)
+		return 0; /* close ok */
+
+	RTMPDrvClose(pAd, net_dev);
+
+
+
+#ifdef VENDOR_FEATURE2_SUPPORT
+	printk("Number of Packet Allocated = %lu\n", OS_NumOfPktAlloc);
+	printk("Number of Packet Freed = %lu\n", OS_NumOfPktFree);
+#endif /* VENDOR_FEATURE2_SUPPORT */
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<=== rt28xx_close\n"));
+	return 0; /* close ok */
+} /* End of rt28xx_close */
+
+
+/*
+========================================================================
+Routine Description:
+    Open raxx interface.
+
+Arguments:
+	*net_dev			the raxx interface pointer
+
+Return Value:
+    0					Open OK
+	otherwise			Open Fail
+
+Note:
+========================================================================
+*/
+int rt28xx_open(VOID *dev)
+{				 
+	struct net_device * net_dev = (struct net_device *)dev;
+	VOID *pAd = NULL;
+	int retval = 0;
+	ULONG OpMode;
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef CONFIG_PM
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND
+	struct usb_interface *intf;
+	struct usb_device		*pUsb_Dev;
+	INT 		pm_usage_cnt;
+	UCHAR	Flag;
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */
+#endif /* CONFIG_PM */
+#endif /* CONFIG_STA_SUPPORT */
+
+	/* sanity check */
+	if (sizeof(ra_dma_addr_t) < sizeof(dma_addr_t))
+		DBGPRINT(RT_DEBUG_ERROR, ("Fatal error for DMA address size!!!\n"));
+ 
+	GET_PAD_FROM_NET_DEV(pAd, net_dev);	
+
+	/* Sanity check for pAd */
+	if (pAd == NULL)
+	{
+		/* if 1st open fail, pAd will be free;
+		   So the net_dev->priv will be NULL in 2rd open */
+		return -1;
+	}
+
+	RTMP_DRIVER_OP_MODE_GET(pAd, &OpMode);
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef CONFIG_PM
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND
+
+	RTMP_DRIVER_USB_DEV_GET(pAd, &pUsb_Dev);
+	RTMP_DRIVER_USB_INTF_GET(pAd, &intf);
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)
+	pm_usage_cnt = atomic_read(&intf->pm_usage_cnt);	
+#else
+	pm_usage_cnt = intf->pm_usage_cnt;
+#endif
+/*	if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_CPU_SUSPEND)) */
+	RTMP_DRIVER_ADAPTER_CPU_SUSPEND_TEST(pAd, &Flag);
+	if(!Flag)
+	{
+		if(pm_usage_cnt == 0)
+		{
+			int res=1;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,33)
+		if(pUsb_Dev->autosuspend_disabled  ==0)
+#else
+		if(pUsb_Dev->auto_pm ==1)
+#endif
+			{
+				res = usb_autopm_get_interface(intf);
+
+/*
+when system  power level from auto to on, auto_pm is 0 and the function radioon will set fRTMP_ADAPTER_SUSPEND
+so we must clear fkag here;
+
+*/				
+/*				RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_SUSPEND); */
+				RTMP_DRIVER_ADAPTER_SUSPEND_CLEAR(pAd);
+				if (res)
+				{
+					DBGPRINT(RT_DEBUG_ERROR, ("rt28xx_open autopm_resume fail ------\n"));
+					return (-1);;
+				}			
+			}
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)
+			else
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("rt28xx_open: fRTMP_ADAPTER_SUSPEND\n"));
+/*				RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_SUSPEND); */
+				RTMP_DRIVER_ADAPTER_SUSPEND_SET(pAd);
+				return (-1);
+			}
+#endif
+
+		}
+ 	}
+	else
+	{
+				DBGPRINT(RT_DEBUG_TRACE, ("rt28xx_open: fRTMP_ADAPTER_CPU_SUSPEND\n"));
+				return (-1);;
+	}
+
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */
+#endif /* CONFIG_PM */
+#endif /* CONFIG_STA_SUPPORT */
+
+
+#ifdef CONFIG_APSTA_MIXED_SUPPORT
+	if (OpMode == OPMODE_AP)
+	{
+		/*CW_MAX_IN_BITS = 6; */
+		RTMP_DRIVER_MAX_IN_BITS_SET(pAd, 6);
+	}
+	else if (OpMode == OPMODE_STA)
+	{
+		/*CW_MAX_IN_BITS = 10; */
+		RTMP_DRIVER_MAX_IN_BITS_SET(pAd, 10);
+	}
+#endif /* CONFIG_APSTA_MIXED_SUPPORT */
+
+#if WIRELESS_EXT >= 12
+/*	if (net_dev->priv_flags == INT_MAIN) */
+	if (RTMP_DRIVER_MAIN_INF_CHECK(pAd, net_dev->priv_flags) == NDIS_STATUS_SUCCESS)
+	{
+#ifdef CONFIG_APSTA_MIXED_SUPPORT
+		if (OpMode == OPMODE_AP)
+			net_dev->wireless_handlers = (struct iw_handler_def *) &rt28xx_ap_iw_handler_def;
+#endif /* CONFIG_APSTA_MIXED_SUPPORT */
+#ifdef CONFIG_STA_SUPPORT
+		if (OpMode == OPMODE_STA)
+			net_dev->wireless_handlers = (struct iw_handler_def *) &rt28xx_iw_handler_def;
+#endif /* CONFIG_STA_SUPPORT */
+	}
+#endif /* WIRELESS_EXT >= 12 */
+
+	/* Request interrupt service routine for PCI device */
+	/* register the interrupt routine with the os */
+	/*
+		AP Channel auto-selection will be run in rt28xx_init(),
+		so we must reqister IRQ hander here.
+	*/
+	RtmpOSIRQRequest(net_dev);
+
+	/* Init IRQ parameters stored in pAd */
+/*	RTMP_IRQ_INIT(pAd); */
+	RTMP_DRIVER_IRQ_INIT(pAd);
+
+	/* Chip & other init */
+	if (rt28xx_init(pAd, mac, hostname) == FALSE)
+		goto err;
+
+#ifdef MBSS_SUPPORT
+	/* the function can not be moved to RT2860_probe() even register_netdev()
+	   is changed as register_netdevice().
+	   Or in some PC, kernel will panic (Fedora 4) */
+	RT28xx_MBSS_Init(pAd, net_dev);
+#endif /* MBSS_SUPPORT */
+
+
+#ifdef APCLI_SUPPORT
+	RT28xx_ApCli_Init(pAd, net_dev);
+#endif /* APCLI_SUPPORT */
+
+
+
+#ifdef LINUX
+#ifdef RT_CFG80211_SUPPORT
+/*	RT_CFG80211_REINIT(pAd); */
+/*	RT_CFG80211_CRDA_REG_RULE_APPLY(pAd); */
+	RTMP_DRIVER_CFG80211_START(pAd);
+#endif /* RT_CFG80211_SUPPORT */
+#endif /* LINUX */
+
+	RTMPDrvOpen(pAd);
+
+
+#ifdef VENDOR_FEATURE2_SUPPORT
+	printk("Number of Packet Allocated in open = %lu\n", OS_NumOfPktAlloc);
+	printk("Number of Packet Freed in open = %lu\n", OS_NumOfPktFree);
+#endif /* VENDOR_FEATURE2_SUPPORT */
+
+	return (retval);
+
+err:
+/*+++Add by shiang, move from rt28xx_init() to here. */
+/*	RtmpOSIRQRelease(net_dev); */
+	RTMP_DRIVER_IRQ_RELEASE(pAd);
+/*---Add by shiang, move from rt28xx_init() to here. */
+
+	return (-1);
+} /* End of rt28xx_open */
+
+
+PNET_DEV RtmpPhyNetDevInit(
+	IN VOID						*pAd,
+	IN RTMP_OS_NETDEV_OP_HOOK	*pNetDevHook)
+{
+	struct net_device	*net_dev = NULL;
+/*	NDIS_STATUS		Status; */
+	ULONG InfId, OpMode;
+
+
+	RTMP_DRIVER_MAIN_INF_GET(pAd, &InfId);
+
+/*	net_dev = RtmpOSNetDevCreate(pAd, INT_MAIN, 0, sizeof(PRTMP_ADAPTER), INF_MAIN_DEV_NAME); */
+	RTMP_DRIVER_MAIN_INF_CREATE(pAd, &net_dev);
+	if (net_dev == NULL)
+	{
+		printk("RtmpPhyNetDevInit(): creation failed for main physical net device!\n");
+		return NULL;
+	}
+
+	NdisZeroMemory((unsigned char *)pNetDevHook, sizeof(RTMP_OS_NETDEV_OP_HOOK));
+	pNetDevHook->open = MainVirtualIF_open;
+	pNetDevHook->stop = MainVirtualIF_close;
+	pNetDevHook->xmit = rt28xx_send_packets;
+#ifdef IKANOS_VX_1X0
+	pNetDevHook->xmit = IKANOS_DataFramesTx;
+#endif /* IKANOS_VX_1X0 */
+	pNetDevHook->ioctl = rt28xx_ioctl;
+	pNetDevHook->priv_flags = InfId; /*INT_MAIN; */
+	pNetDevHook->get_stats = RT28xx_get_ether_stats;
+
+	pNetDevHook->needProtcted = FALSE;
+
+#if (WIRELESS_EXT < 21) && (WIRELESS_EXT >= 12)
+	pNetDevHook->get_wstats = rt28xx_get_wireless_stats;
+#endif
+
+	RTMP_DRIVER_OP_MODE_GET(pAd, &OpMode);
+
+#ifdef CONFIG_STA_SUPPORT
+#if WIRELESS_EXT >= 12
+	if (OpMode == OPMODE_STA)
+	{
+		pNetDevHook->iw_handler = (void *)&rt28xx_iw_handler_def;
+	}
+#endif /*WIRELESS_EXT >= 12 */
+#endif /* CONFIG_STA_SUPPORT */
+
+#ifdef CONFIG_APSTA_MIXED_SUPPORT
+#if WIRELESS_EXT >= 12
+	if (OpMode == OPMODE_AP)
+	{
+		pNetDevHook->iw_handler = &rt28xx_ap_iw_handler_def;
+	}
+#endif /*WIRELESS_EXT >= 12 */
+#endif /* CONFIG_APSTA_MIXED_SUPPORT */
+
+	RTMP_OS_NETDEV_SET_PRIV(net_dev, pAd);
+/*	pAd->net_dev = net_dev; */
+
+	RTMP_DRIVER_NET_DEV_SET(pAd, net_dev);
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
+	SET_MODULE_OWNER(net_dev);
+#endif 
+
+	return net_dev;
+	
+}
+
+
+VOID *RtmpNetEthConvertDevSearch(
+	IN	VOID			*net_dev_,
+	IN	UCHAR			*pData)
+{
+	struct net_device *pNetDev;
+
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
+	struct net_device *net_dev = (struct net_device *)net_dev_;
+	struct net *net;
+	net = dev_net(net_dev);
+	
+	BUG_ON(!net);
+	for_each_netdev(net, pNetDev)
+#else
+	struct net *net;
+
+	struct net_device *net_dev = (struct net_device *)net_dev_;
+	BUG_ON(!net_dev->nd_net);
+	net = net_dev->nd_net;
+	for_each_netdev(net, pNetDev)
+#endif
+#else
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
+		for_each_netdev(pNetDev)
+#else 
+	for (pNetDev = dev_base; pNetDev; pNetDev = pNetDev->next)
+#endif
+#endif
+	{
+		if ((pNetDev->type == ARPHRD_ETHER)
+			&& NdisEqualMemory(pNetDev->dev_addr, &pData[6], pNetDev->addr_len))
+			break;
+	}
+
+	return (VOID *)pNetDev;
+}
+
+
+/*
+========================================================================
+Routine Description:
+    The entry point for Linux kernel sent packet to our driver.
+
+Arguments:
+    sk_buff *skb		the pointer refer to a sk_buffer.
+
+Return Value:
+    0					
+
+Note:
+	This function is the entry point of Tx Path for Os delivery packet to 
+	our driver. You only can put OS-depened & STA/AP common handle procedures 
+	in here.
+========================================================================
+*/
+int rt28xx_packet_xmit(void *skbsrc)
+{
+	struct sk_buff *skb = (struct sk_buff *)skbsrc;
+	struct net_device *net_dev = skb->dev;
+	VOID *pAd = NULL;
+/*	int status = 0; */
+	PNDIS_PACKET pPacket = (PNDIS_PACKET) skb;
+
+	GET_PAD_FROM_NET_DEV(pAd, net_dev);	
+
+	return RTMPSendPackets((NDIS_HANDLE)pAd, (PPNDIS_PACKET) &pPacket, 1,
+							skb->len, RtmpNetEthConvertDevSearch);
+
+}
+
+
+/*
+========================================================================
+Routine Description:
+    Send a packet to WLAN.
+
+Arguments:
+    skb_p           points to our adapter
+    dev_p           which WLAN network interface
+
+Return Value:
+    0: transmit successfully
+    otherwise: transmit fail
+
+Note:
+========================================================================
+*/
+static int rt28xx_send_packets(
+	IN struct sk_buff 		*skb_p, 
+	IN struct net_device 	*net_dev)
+{
+/*	RTMP_ADAPTER *pAd = NULL; */
+
+/*	GET_PAD_FROM_NET_DEV(pAd, net_dev); */
+
+	if (!(RTMP_OS_NETDEV_STATE_RUNNING(net_dev)))
+	{
+		RELEASE_NDIS_PACKET(NULL, (PNDIS_PACKET)skb_p, NDIS_STATUS_FAILURE);
+		return 0;
+	}
+
+	NdisZeroMemory((PUCHAR)&skb_p->cb[CB_OFF], 15);
+	RTMP_SET_PACKET_NET_DEVICE_MBSSID(skb_p, MAIN_MBSSID);
+	MEM_DBG_PKT_ALLOC_INC(skb_p);
+
+	return rt28xx_packet_xmit(skb_p);
+}
+
+
+#if WIRELESS_EXT >= 12
+/* This function will be called when query /proc */
+struct iw_statistics *rt28xx_get_wireless_stats(
+    IN struct net_device *net_dev)
+{
+	VOID *pAd = NULL;
+	struct iw_statistics *pStats;
+	RT_CMD_IW_STATS DrvIwStats, *pDrvIwStats = &DrvIwStats;
+
+
+	GET_PAD_FROM_NET_DEV(pAd, net_dev);	
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("rt28xx_get_wireless_stats --->\n"));
+
+
+	pDrvIwStats->priv_flags = net_dev->priv_flags;
+	pDrvIwStats->dev_addr = (PUCHAR)net_dev->dev_addr;
+
+	if (RTMP_DRIVER_IW_STATS_GET(pAd, pDrvIwStats) != NDIS_STATUS_SUCCESS)
+		return NULL;
+
+	pStats = (struct iw_statistics *)(pDrvIwStats->pStats);
+	pStats->status = 0; /* Status - device dependent for now */
+
+
+	pStats->qual.updated = 1;     /* Flags to know if updated */
+#ifdef IW_QUAL_DBM
+	pStats->qual.updated |= IW_QUAL_DBM;	/* Level + Noise are dBm */
+#endif /* IW_QUAL_DBM */
+	pStats->qual.qual = pDrvIwStats->qual;
+	pStats->qual.level = pDrvIwStats->level;
+	pStats->qual.noise = pDrvIwStats->noise;
+	pStats->discard.nwid = 0;     /* Rx : Wrong nwid/essid */
+	pStats->miss.beacon = 0;      /* Missed beacons/superframe */
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("<--- rt28xx_get_wireless_stats\n"));
+	return pStats;
+}
+#endif /* WIRELESS_EXT */
+
+
+
+INT rt28xx_ioctl(
+	IN	PNET_DEV	net_dev, 
+	IN	OUT	struct ifreq	*rq, 
+	IN	INT					cmd)
+{
+	VOID			*pAd = NULL;
+	INT				ret = 0;
+	ULONG			OpMode;
+
+	GET_PAD_FROM_NET_DEV(pAd, net_dev);	
+
+	if (pAd == NULL)
+	{
+		/* if 1st open fail, pAd will be free;
+		   So the net_dev->priv will be NULL in 2rd open */
+		return -ENETDOWN;
+	}
+
+	RTMP_DRIVER_OP_MODE_GET(pAd, &OpMode);
+
+
+#ifdef CONFIG_STA_SUPPORT
+/*	IF_DEV_CONFIG_OPMODE_ON_STA(pAd) */
+	RT_CONFIG_IF_OPMODE_ON_STA(OpMode)
+	{
+		ret = rt28xx_sta_ioctl(net_dev, rq, cmd);
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	return ret;
+}
+
+
+/*
+    ========================================================================
+
+    Routine Description:
+        return ethernet statistics counter
+
+    Arguments:
+        net_dev                     Pointer to net_device
+
+    Return Value:
+        net_device_stats*
+
+    Note:
+
+    ========================================================================
+*/
+static struct net_device_stats *RT28xx_get_ether_stats(
+    IN  struct net_device *net_dev)
+{
+    VOID *pAd = NULL;
+	struct net_device_stats *pStats;
+
+	if (net_dev)
+		GET_PAD_FROM_NET_DEV(pAd, net_dev);	
+
+	if (pAd)
+	{
+		RT_CMD_STATS DrvStats, *pDrvStats = &DrvStats;
+ 
+
+		RTMP_DRIVER_INF_STATS_GET(pAd, pDrvStats);
+
+		pStats = (struct net_device_stats *)(pDrvStats->pStats);
+		pStats->rx_packets = pDrvStats->rx_packets;
+		pStats->tx_packets = pDrvStats->tx_packets;
+
+		pStats->rx_bytes = pDrvStats->rx_bytes;
+		pStats->tx_bytes = pDrvStats->tx_bytes;
+
+		pStats->rx_errors = pDrvStats->rx_errors;
+		pStats->tx_errors = pDrvStats->tx_errors;
+
+		pStats->rx_dropped = 0;
+		pStats->tx_dropped = 0;
+
+	    pStats->multicast = pDrvStats->multicast;
+	    pStats->collisions = pDrvStats->collisions;
+
+	    pStats->rx_length_errors = 0;
+	    pStats->rx_over_errors = pDrvStats->rx_over_errors;
+	    pStats->rx_crc_errors = 0;/*pAd->WlanCounters.FCSErrorCount;     // recved pkt with crc error */
+	    pStats->rx_frame_errors = pDrvStats->rx_frame_errors;
+	    pStats->rx_fifo_errors = pDrvStats->rx_fifo_errors;
+	    pStats->rx_missed_errors = 0;                                            /* receiver missed packet */
+
+	    /* detailed tx_errors */
+	    pStats->tx_aborted_errors = 0;
+	    pStats->tx_carrier_errors = 0;
+	    pStats->tx_fifo_errors = 0;
+	    pStats->tx_heartbeat_errors = 0;
+	    pStats->tx_window_errors = 0;
+
+	    /* for cslip etc */
+	    pStats->rx_compressed = 0;
+	    pStats->tx_compressed = 0;
+		
+		return pStats;
+	}
+	else
+    	return NULL;
+}
+
+
+BOOLEAN RtmpPhyNetDevExit(
+	IN VOID			*pAd, 
+	IN PNET_DEV		net_dev)
+{
+
+
+
+
+#ifdef INF_PPA_SUPPORT
+
+	RTMP_DRIVER_INF_PPA_EXIT(pAd);
+#endif /* INF_PPA_SUPPORT */
+
+	/* Unregister network device */
+	if (net_dev != NULL)
+	{
+		printk("RtmpOSNetDevDetach(): RtmpOSNetDeviceDetach(), dev->name=%s!\n", net_dev->name);
+		RtmpOSNetDevDetach(net_dev);
+	}
+
+	return TRUE;
+	
+}
+
+
+/*******************************************************************************
+
+	Device IRQ related functions.
+	
+ *******************************************************************************/
+int RtmpOSIRQRequest(IN PNET_DEV pNetDev)
+{
+	ULONG infType;
+	VOID *pAd = NULL;
+	int retval = 0;
+	
+	GET_PAD_FROM_NET_DEV(pAd, pNetDev);	
+	
+	ASSERT(pAd);
+
+	RTMP_DRIVER_INF_TYPE_GET(pAd, &infType);
+
+
+
+	return retval; 
+	
+}
+
+
+
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/rt_proc.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/rt_proc.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/rt_proc.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/rt_proc.c	2017-09-23 03:42:49.830675639 +0800
@@ -0,0 +1,504 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/proc_fs.h>
+#include <asm/uaccess.h>
+
+#include "rt_config.h"
+
+int wl_proc_init(void);
+int wl_proc_exit(void);
+
+#ifdef CONFIG_RALINK_RT2880
+#define PROCREG_DIR             "rt2880"
+#endif /* CONFIG_RALINK_RT2880 */
+
+#ifdef CONFIG_RALINK_RT3052
+#define PROCREG_DIR             "rt3052"
+#endif /* CONFIG_RALINK_RT3052 */
+
+#ifdef CONFIG_RALINK_RT2883
+#define PROCREG_DIR             "rt2883"
+#endif /* CONFIG_RALINK_RT2883 */
+
+#ifdef CONFIG_RALINK_RT3883
+#define PROCREG_DIR             "rt3883"
+#endif /* CONFIG_RALINK_RT3883 */
+
+#ifdef CONFIG_RALINK_RT5350
+#define PROCREG_DIR             "rt5350"
+#endif /* CONFIG_RALINK_RT5350 */
+
+#ifndef PROCREG_DIR
+#define PROCREG_DIR             "rt2880"
+#endif /* PROCREG_DIR */
+
+#ifdef CONFIG_PROC_FS
+extern struct proc_dir_entry *procRegDir;
+
+#ifdef VIDEO_TURBINE_SUPPORT
+AP_VIDEO_STRUCT GLOBAL_AP_VIDEO_CONFIG;
+/*struct proc_dir_entry *proc_ralink_platform, *proc_ralink_wl, *proc_ralink_wl_video; */
+struct proc_dir_entry *proc_ralink_wl, *proc_ralink_wl_video;
+static struct proc_dir_entry *entry_wl_video_Enable, *entry_wl_video_ClassifierEnable, *entry_wl_video_HighTxMode, *entry_wl_video_TxPwr, *entry_wl_video_VideoMCSEnable, *entry_wl_video_VideoMCS, *entry_wl_video_TxBASize, *entry_wl_video_TxLifeTimeMode, *entry_wl_video_TxLifeTime, *entry_wl_video_TxRetryLimit;
+
+ssize_t video_Enable_get(char *page, char **start, off_t off, int count,
+                          int *eof, void *data_unused)
+{
+	sprintf(page, "%d\n", GLOBAL_AP_VIDEO_CONFIG.Enable);
+	*eof = 1;
+        return strlen(page);
+}
+
+ssize_t video_Enable_set(struct file *file, const char __user * buffer,
+                       size_t count, loff_t *ppos)
+{
+	char *buf = kmalloc(count, GFP_KERNEL);
+
+	if (buf) {
+		unsigned long val;
+
+		if (copy_from_user(buf, buffer, count))
+			return -EFAULT;
+		
+		if (buf)
+			val = simple_strtoul(buf, NULL, 10);
+
+		GLOBAL_AP_VIDEO_CONFIG.Enable = val;
+	}
+        return count;
+}
+
+ssize_t video_ClassifierEnable_get(char *page, char **start, off_t off, int count,
+                          int *eof, void *data_unused)
+{
+	sprintf(page, "%d\n", GLOBAL_AP_VIDEO_CONFIG.ClassifierEnable);
+	*eof = 1;
+        return strlen(page);
+}
+
+ssize_t video_ClassifierEnable_set(struct file *file, const char __user * buffer,
+                       size_t count, loff_t *ppos)
+{
+	char *buf = kmalloc(count, GFP_KERNEL);
+
+	if (buf) {
+		unsigned long val;
+
+		if (copy_from_user(buf, buffer, count))
+			return -EFAULT;
+		
+		if (buf)
+			val = simple_strtoul(buf, NULL, 10);
+
+		GLOBAL_AP_VIDEO_CONFIG.ClassifierEnable = val;
+	}
+        return count;
+}
+
+ssize_t video_HighTxMode_get(char *page, char **start, off_t off, int count,
+                          int *eof, void *data_unused)
+{
+	sprintf(page, "%d\n", GLOBAL_AP_VIDEO_CONFIG.HighTxMode);
+	*eof = 1;
+        return strlen(page);
+}
+
+ssize_t video_HighTxMode_set(struct file *file, const char __user * buffer,
+                       size_t count, loff_t *ppos)
+{
+	char *buf = kmalloc(count, GFP_KERNEL);
+
+	if (buf) {
+		unsigned long val;
+
+		if (copy_from_user(buf, buffer, count))
+			return -EFAULT;
+		
+		if (buf)
+			val = simple_strtoul(buf, NULL, 10);
+
+		GLOBAL_AP_VIDEO_CONFIG.HighTxMode = val;
+	}
+        return count;
+}
+
+ssize_t video_TxPwr_get(char *page, char **start, off_t off, int count,
+                          int *eof, void *data_unused)
+{
+	sprintf(page, "%d\n", GLOBAL_AP_VIDEO_CONFIG.TxPwr);
+	*eof = 1;
+        return strlen(page);
+}
+
+ssize_t video_TxPwr_set(struct file *file, const char __user * buffer,
+                       size_t count, loff_t *ppos)
+{
+	char *buf = kmalloc(count, GFP_KERNEL);
+
+	if (buf) {
+		unsigned long val;
+
+		if (copy_from_user(buf, buffer, count))
+			return -EFAULT;
+		
+		if (buf)
+			val = simple_strtoul(buf, NULL, 10);
+
+		GLOBAL_AP_VIDEO_CONFIG.TxPwr = val;
+	}
+        return count;
+}
+
+ssize_t video_VideoMCSEnable_get(char *page, char **start, off_t off, int count,
+                          int *eof, void *data_unused)
+{
+	sprintf(page, "%d\n", GLOBAL_AP_VIDEO_CONFIG.VideoMCSEnable);
+	*eof = 1;
+        return strlen(page);
+}
+
+ssize_t video_VideoMCSEnable_set(struct file *file, const char __user * buffer,
+                       size_t count, loff_t *ppos)
+{
+	char *buf = kmalloc(count, GFP_KERNEL);
+
+	if (buf) {
+		unsigned long val;
+
+		if (copy_from_user(buf, buffer, count))
+			return -EFAULT;
+		
+		if (buf)
+			val = simple_strtoul(buf, NULL, 10);
+
+		GLOBAL_AP_VIDEO_CONFIG.VideoMCSEnable = val;
+	}
+        return count;
+}
+
+ssize_t video_VideoMCS_get(char *page, char **start, off_t off, int count,
+                          int *eof, void *data_unused)
+{
+	sprintf(page, "%d\n", GLOBAL_AP_VIDEO_CONFIG.VideoMCS);
+	*eof = 1;
+        return strlen(page);
+}
+
+ssize_t video_VideoMCS_set(struct file *file, const char __user * buffer,
+                       size_t count, loff_t *ppos)
+{
+	char *buf = kmalloc(count, GFP_KERNEL);
+
+	if (buf) {
+		unsigned long val;
+
+		if (copy_from_user(buf, buffer, count))
+			return -EFAULT;
+		
+		if (buf)
+			val = simple_strtoul(buf, NULL, 10);
+
+		GLOBAL_AP_VIDEO_CONFIG.VideoMCS = val;
+	}
+        return count;
+}
+
+ssize_t video_TxBASize_get(char *page, char **start, off_t off, int count,
+                          int *eof, void *data_unused)
+{
+	sprintf(page, "%d\n", GLOBAL_AP_VIDEO_CONFIG.TxBASize);
+	*eof = 1;
+        return strlen(page);
+}
+
+ssize_t video_TxBASize_set(struct file *file, const char __user * buffer,
+                       size_t count, loff_t *ppos)
+{
+	char *buf = kmalloc(count, GFP_KERNEL);
+
+	if (buf) {
+		unsigned long val;
+
+		if (copy_from_user(buf, buffer, count))
+			return -EFAULT;
+		
+		if (buf)
+			val = simple_strtoul(buf, NULL, 10);
+
+		GLOBAL_AP_VIDEO_CONFIG.TxBASize = val;
+	}
+        return count;
+}
+
+ssize_t video_TxLifeTimeMode_get(char *page, char **start, off_t off, int count,
+                          int *eof, void *data_unused)
+{
+	sprintf(page, "%d\n", GLOBAL_AP_VIDEO_CONFIG.TxLifeTimeMode);
+	*eof = 1;
+        return strlen(page);
+}
+
+ssize_t video_TxLifeTimeMode_set(struct file *file, const char __user * buffer,
+                       size_t count, loff_t *ppos)
+{
+	char *buf = kmalloc(count, GFP_KERNEL);
+
+	if (buf) {
+		unsigned long val;
+
+		if (copy_from_user(buf, buffer, count))
+			return -EFAULT;
+		
+		if (buf)
+			val = simple_strtoul(buf, NULL, 10);
+
+		GLOBAL_AP_VIDEO_CONFIG.TxLifeTimeMode = val;
+	}
+        return count;
+}
+
+ssize_t video_TxLifeTime_get(char *page, char **start, off_t off, int count,
+                          int *eof, void *data_unused)
+{
+	sprintf(page, "%d\n", GLOBAL_AP_VIDEO_CONFIG.TxLifeTime);
+	*eof = 1;
+        return strlen(page);
+}
+
+ssize_t video_TxLifeTime_set(struct file *file, const char __user * buffer,
+                       size_t count, loff_t *ppos)
+{
+	char *buf = kmalloc(count, GFP_KERNEL);
+
+	if (buf) {
+		unsigned long val;
+
+		if (copy_from_user(buf, buffer, count))
+			return -EFAULT;
+		
+		if (buf)
+			val = simple_strtoul(buf, NULL, 10);
+
+		GLOBAL_AP_VIDEO_CONFIG.TxLifeTime = val;
+	}
+        return count;
+}
+
+ssize_t video_TxRetryLimit_get(char *page, char **start, off_t off, int count,
+                          int *eof, void *data_unused)
+{
+	sprintf(page, "0x%x\n", GLOBAL_AP_VIDEO_CONFIG.TxRetryLimit);
+	*eof = 1;
+        return strlen(page);
+}
+
+ssize_t video_TxRetryLimit_set(struct file *file, const char __user * buffer,
+                       size_t count, loff_t *ppos)
+{
+	char *buf = kmalloc(count, GFP_KERNEL);
+
+	if (buf) {
+		unsigned long val;
+
+		if (copy_from_user(buf, buffer, count))
+			return -EFAULT;
+		
+		if (buf)
+			val = simple_strtoul(buf, NULL, 16);
+
+		GLOBAL_AP_VIDEO_CONFIG.TxRetryLimit = val;
+	}
+        return count;
+}
+
+int wl_video_proc_init(void)
+{
+
+	GLOBAL_AP_VIDEO_CONFIG.Enable = 1;
+	GLOBAL_AP_VIDEO_CONFIG.ClassifierEnable = 1;
+	GLOBAL_AP_VIDEO_CONFIG.HighTxMode = 0;
+	GLOBAL_AP_VIDEO_CONFIG.TxPwr = 0;
+	GLOBAL_AP_VIDEO_CONFIG.VideoMCSEnable = 1;
+	GLOBAL_AP_VIDEO_CONFIG.VideoMCS = 0;
+	GLOBAL_AP_VIDEO_CONFIG.TxBASize = 13;
+	GLOBAL_AP_VIDEO_CONFIG.TxLifeTimeMode = 0;
+	GLOBAL_AP_VIDEO_CONFIG.TxLifeTime = 0;
+	GLOBAL_AP_VIDEO_CONFIG.TxRetryLimit = 0x2f1f;
+
+		proc_ralink_wl = proc_mkdir("wl", procRegDir);
+
+	if (proc_ralink_wl)
+		proc_ralink_wl_video = proc_mkdir("VideoTurbine", proc_ralink_wl);
+
+	if (proc_ralink_wl_video) {
+		entry_wl_video_Enable = create_proc_entry("Enable", 0, proc_ralink_wl_video);
+		if (entry_wl_video_Enable) {
+			entry_wl_video_Enable->read_proc = (read_proc_t*)&video_Enable_get;
+			entry_wl_video_Enable->write_proc = (write_proc_t*)&video_Enable_set;
+		}
+
+		entry_wl_video_ClassifierEnable = create_proc_entry("ClassifierEnable", 0, proc_ralink_wl_video);
+		if (entry_wl_video_ClassifierEnable) {
+			entry_wl_video_ClassifierEnable->read_proc = (read_proc_t*)&video_ClassifierEnable_get;
+			entry_wl_video_ClassifierEnable->write_proc = (write_proc_t*)&video_ClassifierEnable_set;
+		}
+
+		entry_wl_video_HighTxMode = create_proc_entry("HighTxMode", 0, proc_ralink_wl_video);
+		if (entry_wl_video_HighTxMode) {
+			entry_wl_video_HighTxMode->read_proc = (read_proc_t*)&video_HighTxMode_get;
+			entry_wl_video_HighTxMode->write_proc = (write_proc_t*)&video_HighTxMode_set;
+		}
+
+		entry_wl_video_TxPwr = create_proc_entry("TxPwr", 0, proc_ralink_wl_video);
+		if (entry_wl_video_TxPwr) {
+			entry_wl_video_TxPwr->read_proc = (read_proc_t*)&video_TxPwr_get;
+			entry_wl_video_TxPwr->write_proc = (write_proc_t*)&video_TxPwr_set;
+		}
+
+		entry_wl_video_VideoMCSEnable = create_proc_entry("VideoMCSEnable", 0, proc_ralink_wl_video);
+		if (entry_wl_video_VideoMCSEnable) {
+			entry_wl_video_VideoMCSEnable->read_proc = (read_proc_t*)&video_VideoMCSEnable_get;
+			entry_wl_video_VideoMCSEnable->write_proc = (write_proc_t*)&video_VideoMCSEnable_set;
+		}
+
+		entry_wl_video_VideoMCS = create_proc_entry("VideoMCS", 0, proc_ralink_wl_video);
+		if (entry_wl_video_VideoMCS) {
+			entry_wl_video_VideoMCS->read_proc = (read_proc_t*)&video_VideoMCS_get;
+			entry_wl_video_VideoMCS->write_proc = (write_proc_t*)&video_VideoMCS_set;
+		}
+
+		entry_wl_video_TxBASize = create_proc_entry("TxBASize", 0, proc_ralink_wl_video);
+		if (entry_wl_video_TxBASize) {
+			entry_wl_video_TxBASize->read_proc = (read_proc_t*)&video_TxBASize_get;
+			entry_wl_video_TxBASize->write_proc = (write_proc_t*)&video_TxBASize_set;
+		}
+		entry_wl_video_TxLifeTimeMode = create_proc_entry("TxLifeTimeMode", 0, proc_ralink_wl_video);
+		if (entry_wl_video_TxLifeTimeMode) {
+			entry_wl_video_TxLifeTimeMode->read_proc = (read_proc_t*)&video_TxLifeTimeMode_get;
+			entry_wl_video_TxLifeTimeMode->write_proc = (write_proc_t*)&video_TxLifeTimeMode_set;
+		}
+
+		entry_wl_video_TxLifeTime = create_proc_entry("TxLifeTime", 0, proc_ralink_wl_video);
+		if (entry_wl_video_TxLifeTime) {
+			entry_wl_video_TxLifeTime->read_proc = (read_proc_t*)&video_TxLifeTime_get;
+			entry_wl_video_TxLifeTime->write_proc = (write_proc_t*)&video_TxLifeTime_set;
+		}
+
+		entry_wl_video_TxRetryLimit = create_proc_entry("TxRetryLimit", 0, proc_ralink_wl_video);
+		if (entry_wl_video_TxRetryLimit) {
+			entry_wl_video_TxRetryLimit->read_proc = (read_proc_t*)&video_TxRetryLimit_get;
+			entry_wl_video_TxRetryLimit->write_proc = (write_proc_t*)&video_TxRetryLimit_set;
+		}
+	}
+
+	return 0;
+}
+
+int wl_video_proc_exit(void)
+{
+
+	if (entry_wl_video_Enable)
+		remove_proc_entry("Enable", proc_ralink_wl_video);
+	
+	if (entry_wl_video_ClassifierEnable)
+		remove_proc_entry("ClassifierEnabl", proc_ralink_wl_video);
+
+	if (entry_wl_video_HighTxMode)
+		remove_proc_entry("HighTxMode", proc_ralink_wl_video);
+
+	if (entry_wl_video_TxPwr)
+		remove_proc_entry("TxPwr", proc_ralink_wl_video);
+
+	if (entry_wl_video_VideoMCSEnable)
+		remove_proc_entry("VideoMCSEnable", proc_ralink_wl_video);
+
+	if (entry_wl_video_VideoMCS)
+		remove_proc_entry("VideoMCS", proc_ralink_wl_video);
+
+	if (entry_wl_video_TxBASize)
+		remove_proc_entry("TxBASize", proc_ralink_wl_video);
+
+	if (entry_wl_video_TxLifeTimeMode)
+		remove_proc_entry("TxLifeTimeMode", proc_ralink_wl_video);
+
+	if (entry_wl_video_TxLifeTime)
+		remove_proc_entry("TxLifeTime", proc_ralink_wl_video);
+
+	if (entry_wl_video_TxRetryLimit)
+		remove_proc_entry("TxRetryLimit", proc_ralink_wl_video);
+
+	if (proc_ralink_wl_video)
+		remove_proc_entry("Video", proc_ralink_wl);
+
+	return 0;
+}
+#endif /* VIDEO_TURBINE_SUPPORT */
+
+int wl_proc_init(void)
+{
+	if (procRegDir == NULL)
+		procRegDir = proc_mkdir(PROCREG_DIR, NULL);
+
+	if (procRegDir) {
+#ifdef VIDEO_TURBINE_SUPPORT
+		wl_video_proc_init();
+#endif /* VIDEO_TURBINE_SUPPORT */
+	}
+
+	return 0;
+}
+
+int wl_proc_exit(void)
+{
+#ifdef VIDEO_TURBINE_SUPPORT
+	if (proc_ralink_wl_video) {
+		wl_video_proc_exit();
+		remove_proc_entry("Video", proc_ralink_wl);
+	}
+	if (proc_ralink_wl)
+		remove_proc_entry("wl", procRegDir);
+#endif /* VIDEO_TURBINE_SUPPORT */
+
+	
+	return 0;
+}
+#else
+int wl_proc_init(void)
+{
+	return 0;
+}
+
+int wl_proc_exit(void)
+{
+
+	return 0;
+}
+#endif /* CONFIG_PROC_FS */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/rt_profile.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/rt_profile.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/rt_profile.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/rt_profile.c	2017-09-23 03:42:49.830675639 +0800
@@ -0,0 +1,614 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+#if defined (CONFIG_RA_HW_NAT)  || defined (CONFIG_RA_HW_NAT_MODULE)
+#include "../../../../../../net/nat/hw_nat/ra_nat.h"
+#include "../../../../../../net/nat/hw_nat/frame_engine.h"
+#endif
+
+
+#ifdef SYSTEM_LOG_SUPPORT
+/* for wireless system event message */
+char const *pWirelessSysEventText[IW_SYS_EVENT_TYPE_NUM] = {    
+	/* system status event */
+    "had associated successfully",							/* IW_ASSOC_EVENT_FLAG */
+    "had disassociated",									/* IW_DISASSOC_EVENT_FLAG */
+    "had deauthenticated",									/* IW_DEAUTH_EVENT_FLAG */
+    "had been aged-out and disassociated",					/* IW_AGEOUT_EVENT_FLAG */
+    "occurred CounterMeasures attack",						/* IW_COUNTER_MEASURES_EVENT_FLAG */	
+    "occurred replay counter different in Key Handshaking",	/* IW_REPLAY_COUNTER_DIFF_EVENT_FLAG */
+    "occurred RSNIE different in Key Handshaking",			/* IW_RSNIE_DIFF_EVENT_FLAG */
+    "occurred MIC different in Key Handshaking",			/* IW_MIC_DIFF_EVENT_FLAG */
+    "occurred ICV error in RX",								/* IW_ICV_ERROR_EVENT_FLAG */
+    "occurred MIC error in RX",								/* IW_MIC_ERROR_EVENT_FLAG */
+	"Group Key Handshaking timeout",						/* IW_GROUP_HS_TIMEOUT_EVENT_FLAG */ 
+	"Pairwise Key Handshaking timeout",						/* IW_PAIRWISE_HS_TIMEOUT_EVENT_FLAG */ 
+	"RSN IE sanity check failure",							/* IW_RSNIE_SANITY_FAIL_EVENT_FLAG */ 
+	"set key done in WPA/WPAPSK",							/* IW_SET_KEY_DONE_WPA1_EVENT_FLAG */ 
+	"set key done in WPA2/WPA2PSK",                         /* IW_SET_KEY_DONE_WPA2_EVENT_FLAG */ 
+	"connects with our wireless client",                    /* IW_STA_LINKUP_EVENT_FLAG */ 
+	"disconnects with our wireless client",                 /* IW_STA_LINKDOWN_EVENT_FLAG */
+	"scan completed",										/* IW_SCAN_COMPLETED_EVENT_FLAG */
+	"scan terminate!! Busy!! Enqueue fail!!",				/* IW_SCAN_ENQUEUE_FAIL_EVENT_FLAG */
+	"channel switch to ",									/* IW_CHANNEL_CHANGE_EVENT_FLAG */
+	"wireless mode is not support",							/* IW_STA_MODE_EVENT_FLAG */
+	"blacklisted in MAC filter list",						/* IW_MAC_FILTER_LIST_EVENT_FLAG */
+	"Authentication rejected because of challenge failure",	/* IW_AUTH_REJECT_CHALLENGE_FAILURE */
+	"Scanning",												/* IW_SCANNING_EVENT_FLAG */
+	"Start a new IBSS",										/* IW_START_IBSS_FLAG */
+	"Join the IBSS",										/* IW_JOIN_IBSS_FLAG */
+	"Shared WEP fail",										/* IW_SHARED_WEP_FAIL*/
+	};
+
+#ifdef IDS_SUPPORT
+/* for wireless IDS_spoof_attack event message */
+char const *pWirelessSpoofEventText[IW_SPOOF_EVENT_TYPE_NUM] = {   	
+    "detected conflict SSID",								/* IW_CONFLICT_SSID_EVENT_FLAG */
+    "detected spoofed association response",				/* IW_SPOOF_ASSOC_RESP_EVENT_FLAG */
+    "detected spoofed reassociation responses",				/* IW_SPOOF_REASSOC_RESP_EVENT_FLAG */
+    "detected spoofed probe response",						/* IW_SPOOF_PROBE_RESP_EVENT_FLAG */
+    "detected spoofed beacon",								/* IW_SPOOF_BEACON_EVENT_FLAG */
+    "detected spoofed disassociation",						/* IW_SPOOF_DISASSOC_EVENT_FLAG */
+    "detected spoofed authentication",						/* IW_SPOOF_AUTH_EVENT_FLAG */
+    "detected spoofed deauthentication",					/* IW_SPOOF_DEAUTH_EVENT_FLAG */
+    "detected spoofed unknown management frame",			/* IW_SPOOF_UNKNOWN_MGMT_EVENT_FLAG */
+	"detected replay attack"								/* IW_REPLAY_ATTACK_EVENT_FLAG */	
+	};
+
+/* for wireless IDS_flooding_attack event message */
+char const *pWirelessFloodEventText[IW_FLOOD_EVENT_TYPE_NUM] = {   	
+	"detected authentication flooding",						/* IW_FLOOD_AUTH_EVENT_FLAG */
+    "detected association request flooding",				/* IW_FLOOD_ASSOC_REQ_EVENT_FLAG */
+    "detected reassociation request flooding",				/* IW_FLOOD_REASSOC_REQ_EVENT_FLAG */
+    "detected probe request flooding",						/* IW_FLOOD_PROBE_REQ_EVENT_FLAG */
+    "detected disassociation flooding",						/* IW_FLOOD_DISASSOC_EVENT_FLAG */
+    "detected deauthentication flooding",					/* IW_FLOOD_DEAUTH_EVENT_FLAG */
+    "detected 802.1x eap-request flooding"					/* IW_FLOOD_EAP_REQ_EVENT_FLAG */	
+	};
+#endif /* IDS_SUPPORT */
+
+#endif /* SYSTEM_LOG_SUPPORT */
+
+
+NDIS_STATUS	RTMPReadParametersHook(
+	IN	PRTMP_ADAPTER pAd)
+{
+	PSTRING					src = NULL;
+	RTMP_OS_FD				srcf;
+	RTMP_OS_FS_INFO			osFSInfo;
+	INT 						retval = NDIS_STATUS_FAILURE;
+	PSTRING					buffer;
+
+#ifdef HOSTAPD_SUPPORT
+	int i;
+#endif /*HOSTAPD_SUPPORT */
+
+/*	buffer = kmalloc(MAX_INI_BUFFER_SIZE, MEM_ALLOC_FLAG); */
+	os_alloc_mem(pAd, (UCHAR **)&buffer, MAX_INI_BUFFER_SIZE);
+	if(buffer == NULL)
+		return NDIS_STATUS_FAILURE;
+	memset(buffer, 0x00, MAX_INI_BUFFER_SIZE);
+			
+	{	
+
+#ifdef CONFIG_STA_SUPPORT
+		IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+		{
+			src = STA_PROFILE_PATH;
+		}
+#endif /* CONFIG_STA_SUPPORT */
+#ifdef MULTIPLE_CARD_SUPPORT
+		src = (PSTRING)pAd->MC_FileName;
+#endif /* MULTIPLE_CARD_SUPPORT */
+	}
+
+	if (src && *src)
+	{
+		RtmpOSFSInfoChange(&osFSInfo, TRUE);
+		srcf = RtmpOSFileOpen(src, O_RDONLY, 0);
+		if (IS_FILE_OPEN_ERR(srcf)) 
+		{
+			DBGPRINT(RT_DEBUG_ERROR, ("Open file \"%s\" failed!\n", src));
+		}
+		else 
+		{
+			retval =RtmpOSFileRead(srcf, buffer, MAX_INI_BUFFER_SIZE);
+			if (retval > 0)
+			{
+				RTMPSetProfileParameters(pAd, buffer);
+				retval = NDIS_STATUS_SUCCESS;
+			}
+			else
+				DBGPRINT(RT_DEBUG_ERROR, ("Read file \"%s\" failed(errCode=%d)!\n", src, retval));
+
+			retval = RtmpOSFileClose(srcf);
+			if ( retval != 0)
+			{
+				retval = NDIS_STATUS_FAILURE;
+				DBGPRINT(RT_DEBUG_ERROR, ("Close file \"%s\" failed(errCode=%d)!\n", src, retval));
+			}
+		}
+		
+		RtmpOSFSInfoChange(&osFSInfo, FALSE);
+	}
+
+#ifdef HOSTAPD_SUPPORT
+		for (i = 0; i < pAd->ApCfg.BssidNum; i++)
+		{
+			pAd->ApCfg.MBSSID[i].Hostapd=FALSE;
+			DBGPRINT(RT_DEBUG_TRACE, ("Reset ra%d hostapd support=FLASE", i));
+			
+		}
+#endif /*HOSTAPD_SUPPORT */
+
+/*	kfree(buffer); */
+	os_free_mem(NULL, buffer);
+	
+	return (retval);
+
+}
+
+
+#ifdef SYSTEM_LOG_SUPPORT
+/*
+	========================================================================
+	
+	Routine Description:
+		Send log message through wireless event
+
+		Support standard iw_event with IWEVCUSTOM. It is used below.
+
+		iwreq_data.data.flags is used to store event_flag that is defined by user. 
+		iwreq_data.data.length is the length of the event log.
+
+		The format of the event log is composed of the entry's MAC address and
+		the desired log message (refer to pWirelessEventText).
+
+			ex: 11:22:33:44:55:66 has associated successfully
+
+		p.s. The requirement of Wireless Extension is v15 or newer. 
+
+	========================================================================
+*/
+VOID RtmpDrvSendWirelessEvent(
+	IN	VOID					*pAdSrc,
+	IN	USHORT					Event_flag,
+	IN	PUCHAR 					pAddr,
+	IN  UCHAR					BssIdx,
+	IN	CHAR					Rssi)
+{
+	PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdSrc;
+	PSTRING	pBuf = NULL, pBufPtr = NULL;
+	USHORT	event, type, BufLen;	
+	UCHAR	event_table_len = 0;
+
+	if (pAd->CommonCfg.bWirelessEvent == FALSE)
+		return;
+
+	type = Event_flag & 0xFF00;	
+	event = Event_flag & 0x00FF;
+
+	switch (type)
+	{
+		case IW_SYS_EVENT_FLAG_START:
+			event_table_len = IW_SYS_EVENT_TYPE_NUM;
+			break;
+#ifdef IDS_SUPPORT
+		case IW_SPOOF_EVENT_FLAG_START:
+			event_table_len = IW_SPOOF_EVENT_TYPE_NUM;
+			break;
+
+		case IW_FLOOD_EVENT_FLAG_START:
+			event_table_len = IW_FLOOD_EVENT_TYPE_NUM;
+			break;
+#endif /* IDS_SUPPORT */ 			
+	}
+	
+	if (event_table_len == 0)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s : The type(%0x02x) is not valid.\n", __FUNCTION__, type));			       		       		
+		return;
+	}
+	
+	if (event >= event_table_len)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s : The event(%0x02x) is not valid.\n", __FUNCTION__, event));			       		       		
+		return;
+	}	
+ 
+	/*Allocate memory and copy the msg. */
+/*	if((pBuf = kmalloc(IW_CUSTOM_MAX_LEN, GFP_ATOMIC)) != NULL) */
+	os_alloc_mem(NULL, (UCHAR **)&pBuf, IW_CUSTOM_MAX_LEN);
+	if(pBuf != NULL)
+	{
+		/*Prepare the payload */
+		memset(pBuf, 0, IW_CUSTOM_MAX_LEN);
+
+		pBufPtr = pBuf;		
+
+		if (pAddr)
+			pBufPtr += sprintf(pBufPtr, "(RT2860) STA(%02x:%02x:%02x:%02x:%02x:%02x) ", PRINT_MAC(pAddr));				
+		else if (BssIdx < MAX_MBSSID_NUM(pAd))
+			pBufPtr += sprintf(pBufPtr, "(RT2860) BSS(ra%d) ", BssIdx);
+		else
+			pBufPtr += sprintf(pBufPtr, "(RT2860) ");
+
+		if (type == IW_SYS_EVENT_FLAG_START)
+        {
+			pBufPtr += sprintf(pBufPtr, "%s", pWirelessSysEventText[event]);
+		    
+            if (Event_flag == IW_CHANNEL_CHANGE_EVENT_FLAG)
+		  	{
+			 	pBufPtr += sprintf(pBufPtr, "%3d", Rssi);
+			}			
+		}
+#ifdef IDS_SUPPORT		
+		else if (type == IW_SPOOF_EVENT_FLAG_START)
+			pBufPtr += sprintf(pBufPtr, "%s (RSSI=%d)", pWirelessSpoofEventText[event], Rssi);
+		else if (type == IW_FLOOD_EVENT_FLAG_START)
+			pBufPtr += sprintf(pBufPtr, "%s", pWirelessFloodEventText[event]);
+#endif /* IDS_SUPPORT */		
+		else
+			pBufPtr += sprintf(pBufPtr, "%s", "unknown event");
+		
+		pBufPtr[pBufPtr - pBuf] = '\0';
+		BufLen = pBufPtr - pBuf;
+		
+		RtmpOSWrielessEventSend(pAd->net_dev, RT_WLAN_EVENT_CUSTOM, Event_flag, NULL, (PUCHAR)pBuf, BufLen);
+		/*DBGPRINT(RT_DEBUG_TRACE, ("%s : %s\n", __FUNCTION__, pBuf)); */
+	
+/*		kfree(pBuf); */
+		os_free_mem(NULL, pBuf);
+	}
+	else
+		DBGPRINT(RT_DEBUG_ERROR, ("%s : Can't allocate memory for wireless event.\n", __FUNCTION__));			       		       				
+}
+#endif /* SYSTEM_LOG_SUPPORT */
+
+
+void RTMP_IndicateMediaState(
+	IN	PRTMP_ADAPTER		pAd,
+	IN  NDIS_MEDIA_STATE	media_state)
+{	
+	pAd->IndicateMediaState = media_state;
+
+#ifdef SYSTEM_LOG_SUPPORT
+		if (pAd->IndicateMediaState == NdisMediaStateConnected)
+		{
+			RTMPSendWirelessEvent(pAd, IW_STA_LINKUP_EVENT_FLAG, pAd->MacTab.Content[BSSID_WCID].Addr, BSS0, 0);
+		}
+		else
+		{							
+			RTMPSendWirelessEvent(pAd, IW_STA_LINKDOWN_EVENT_FLAG, pAd->MacTab.Content[BSSID_WCID].Addr, BSS0, 0); 		
+		}	
+#endif /* SYSTEM_LOG_SUPPORT */
+}
+
+
+#ifdef WORKQUEUE_BH
+void tbtt_workq(struct work_struct *work)
+#else
+void tbtt_tasklet(unsigned long data)
+#endif /* WORKQUEUE_BH */
+{
+/*#define MAX_TX_IN_TBTT		(16) */
+
+}
+
+
+void announce_802_3_packet(
+	IN	VOID			*pAdSrc,
+	IN	PNDIS_PACKET	pPacket,
+	IN	UCHAR			OpMode)
+{
+	PRTMP_ADAPTER	pAd = (PRTMP_ADAPTER)pAdSrc;
+/*	struct sk_buff	*pRxPkt; */
+	PNDIS_PACKET pRxPkt;
+#ifdef INF_PPA_SUPPORT
+        int             ret = 0;
+        unsigned int ppa_flags = 0; /* reserved for now */
+#endif /* INF_PPA_SUPPORT */
+
+	pAd = pAd; /* avoid compile warning */
+
+	MEM_DBG_PKT_FREE_INC(pPacket);
+
+
+	ASSERT(pPacket);
+
+/*	pRxPkt = RTPKT_TO_OSPKT(pPacket); */
+	pRxPkt = pPacket;
+
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+
+    /* Push up the protocol stack */
+
+#ifdef IKANOS_VX_1X0
+	IKANOS_DataFrameRx(pAd, pRxPkt);
+#else
+
+/* mark for bridge fast path, 2009/06/22 */
+/*	pRxPkt->protocol = eth_type_trans(pRxPkt, pRxPkt->dev); */
+
+#ifdef INF_PPA_SUPPORT
+	if (ppa_hook_directpath_send_fn && pAd->PPAEnable==TRUE ) 
+	{
+		RtmpOsPktInfPpaSend(pRxPkt);
+
+		pRxPkt=NULL;
+		return;
+
+	}	  	
+#endif /* INF_PPA_SUPPORT */
+
+/*#ifdef CONFIG_5VT_ENHANCE */
+/*	*(int*)(pRxPkt->cb) = BRIDGE_TAG; */
+/*#endif */
+
+	{
+
+/*		pRxPkt->protocol = eth_type_trans(pRxPkt, pRxPkt->dev); */
+		RtmpOsPktProtocolAssign(pRxPkt);
+		RtmpOsPktRcvHandle(pRxPkt);
+	}
+
+#endif /* IKANOS_VX_1X0 */
+}
+
+
+#ifdef CONFIG_STA_SUPPORT
+void STA_MonPktSend(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	RX_BLK			*pRxBlk)
+{
+	PNET_DEV pNetDev;
+	PNDIS_PACKET pRxPacket;
+	PHEADER_802_11 pHeader;
+	USHORT DataSize;
+	UINT32 MaxRssi;
+	UCHAR L2PAD, PHYMODE, BW, ShortGI, MCS, AMPDU, STBC, RSSI1;
+	UCHAR BssMonitorFlag11n, Channel, CentralChannel;
+	UCHAR *pData, *pDevName;
+
+
+	/* sanity check */
+    ASSERT(pRxBlk->pRxPacket);
+    if (pRxBlk->DataSize < 10)
+    {
+        DBGPRINT(RT_DEBUG_ERROR, ("%s : Size is too small! (%d)\n", __FUNCTION__, pRxBlk->DataSize));
+		goto err_free_sk_buff;
+    }
+
+    if (pRxBlk->DataSize + sizeof(wlan_ng_prism2_header) > RX_BUFFER_AGGRESIZE)
+    {
+        DBGPRINT(RT_DEBUG_ERROR, ("%s : Size is too large! (%d)\n", __FUNCTION__, pRxBlk->DataSize + sizeof(wlan_ng_prism2_header)));
+		goto err_free_sk_buff;
+    }
+
+	/* init */
+	MaxRssi = RTMPMaxRssi(pAd,
+						ConvertToRssi(pAd, pRxBlk->pRxWI->RSSI0, RSSI_0),
+						ConvertToRssi(pAd, pRxBlk->pRxWI->RSSI1, RSSI_1),
+						ConvertToRssi(pAd, pRxBlk->pRxWI->RSSI2, RSSI_2));
+
+	pNetDev = get_netdev_from_bssid(pAd, BSS0); 
+	pRxPacket = pRxBlk->pRxPacket;
+	pHeader = pRxBlk->pHeader;
+	pData = pRxBlk->pData;
+	DataSize = pRxBlk->DataSize;
+	L2PAD = pRxBlk->RxD.L2PAD;
+	PHYMODE = pRxBlk->pRxWI->PHYMODE;
+	BW = pRxBlk->pRxWI->BW;
+	ShortGI = pRxBlk->pRxWI->ShortGI;
+	MCS = pRxBlk->pRxWI->MCS;
+	AMPDU = pRxBlk->RxD.AMPDU;
+	STBC = pRxBlk->pRxWI->STBC;
+	RSSI1 = pRxBlk->pRxWI->RSSI1;
+	BssMonitorFlag11n = 0;
+#ifdef MONITOR_FLAG_11N_SNIFFER_SUPPORT
+	BssMonitorFlag11n = (pAd->StaCfg.BssMonitorFlag & MONITOR_FLAG_11N_SNIFFER);
+#endif /* MONITOR_FLAG_11N_SNIFFER_SUPPORT */
+	pDevName = (UCHAR *)RtmpOsGetNetDevName(pAd->net_dev);
+	Channel = pAd->CommonCfg.Channel;
+	CentralChannel = pAd->CommonCfg.CentralChannel;
+
+	/* pass the packet */
+	send_monitor_packets(pNetDev, pRxPacket, pHeader, pData, DataSize,
+						L2PAD, PHYMODE, BW, ShortGI, MCS, AMPDU, STBC, RSSI1,
+						BssMonitorFlag11n, pDevName, Channel, CentralChannel,
+						MaxRssi);
+	return;
+
+err_free_sk_buff:
+	RELEASE_NDIS_PACKET(pAd, pRxBlk->pRxPacket, NDIS_STATUS_FAILURE);	
+	return;
+}
+#endif /* CONFIG_STA_SUPPORT */
+
+
+extern NDIS_SPIN_LOCK TimerSemLock;
+
+VOID	RTMPFreeAdapter(
+	IN	VOID		*pAdSrc)
+{
+	PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdSrc;
+	POS_COOKIE os_cookie;
+	int index;	
+
+	os_cookie=(POS_COOKIE)pAd->OS_Cookie;
+
+	if (pAd->BeaconBuf)
+		os_free_mem(NULL, pAd->BeaconBuf);
+
+
+	NdisFreeSpinLock(&pAd->MgmtRingLock);
+	
+
+	for (index =0 ; index < NUM_OF_TX_RING; index++)
+	{
+		NdisFreeSpinLock(&pAd->TxSwQueueLock[index]);
+		NdisFreeSpinLock(&pAd->DeQueueLock[index]);
+		pAd->DeQueueRunning[index] = FALSE;
+	}
+	
+	NdisFreeSpinLock(&pAd->irq_lock);
+
+
+#ifdef DOT11_N_SUPPORT
+	NdisFreeSpinLock(&pAd->mpdu_blk_pool.lock);
+#endif /* DOT11_N_SUPPORT */
+
+	if (pAd->iw_stats)
+	{
+		os_free_mem(NULL, pAd->iw_stats);
+		pAd->iw_stats = NULL;
+	}
+	if (pAd->stats)
+	{
+		os_free_mem(NULL, pAd->stats);
+		pAd->stats = NULL;
+	}
+
+	NdisFreeSpinLock(&TimerSemLock);
+	RTMP_OS_FREE_TIMER(pAd);
+	RTMP_OS_FREE_LOCK(pAd);
+	RTMP_OS_FREE_TASKLET(pAd);
+	RTMP_OS_FREE_TASK(pAd);
+	RTMP_OS_FREE_SEM(pAd);
+	RTMP_OS_FREE_ATOMIC(pAd);
+
+	RtmpOsVfree(pAd); /* pci_free_consistent(os_cookie->pci_dev,sizeof(RTMP_ADAPTER),pAd,os_cookie->pAd_pa); */
+	if (os_cookie)
+		os_free_mem(NULL, os_cookie);
+
+#ifdef VENDOR_FEATURE4_SUPPORT
+{
+	extern ULONG OS_NumOfMemAlloc, OS_NumOfMemFree;
+	printk("OS_NumOfMemAlloc = %ld, OS_NumOfMemFree = %ld\n",
+			OS_NumOfMemAlloc, OS_NumOfMemFree);
+}
+#endif /* VENDOR_FEATURE4_SUPPORT */
+}
+
+
+int	RTMPSendPackets(
+	IN	NDIS_HANDLE		MiniportAdapterContext,
+	IN	PPNDIS_PACKET	ppPacketArray,
+	IN	UINT			NumberOfPackets,
+	IN	UINT32			PktTotalLen,
+	IN	RTMP_NET_ETH_CONVERT_DEV_SEARCH	Func)
+{
+	PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)MiniportAdapterContext;
+	PNDIS_PACKET pPacket = ppPacketArray[0];
+
+
+	if (pPacket == NULL)
+		goto done;
+
+	/* RT2870STA does this in RTMPSendPackets() */
+#ifdef RALINK_ATE
+	if (ATE_ON(pAd))
+	{
+		RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_RESOURCES);
+		return 0;
+	}
+#endif /* RALINK_ATE */
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		/* Drop send request since we are in monitor mode */
+		if (MONITOR_ON(pAd))
+		{
+			RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_FAILURE);
+			return 0;
+		}
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+        /* EapolStart size is 18 */
+	if (PktTotalLen < 14)
+	{
+		/*printk("bad packet size: %d\n", pkt->len); */
+		hex_dump("bad packet", GET_OS_PKT_DATAPTR(pPacket), PktTotalLen);
+		RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_FAILURE);
+		return 0;
+	}
+
+
+
+	RTMP_SET_PACKET_5VT(pPacket, 0);
+/*	MiniportMMRequest(pAd, pkt->data, pkt->len); */
+#ifdef CONFIG_5VT_ENHANCE
+    if (*(int*)(GET_OS_PKT_CB(pPacket)) == BRIDGE_TAG) {
+		RTMP_SET_PACKET_5VT(pPacket, 1);
+    }
+#endif
+
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+
+		STASendPackets((NDIS_HANDLE)pAd, (PPNDIS_PACKET) &pPacket, 1);
+	}
+
+#endif /* CONFIG_STA_SUPPORT */
+
+done:
+	return 0;
+}
+
+
+PNET_DEV get_netdev_from_bssid(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	UCHAR			FromWhichBSSID)
+{
+	PNET_DEV dev_p = NULL;
+
+	do
+	{
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+		{
+			dev_p = pAd->net_dev;
+		}
+
+	} while (FALSE);
+
+	ASSERT(dev_p);
+	return dev_p; /* return one of MBSS */
+}
+
+
+
+
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/rt_rbus_pci_drv.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/rt_rbus_pci_drv.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/rt_rbus_pci_drv.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/rt_rbus_pci_drv.c	2017-09-23 03:42:49.830675639 +0800
@@ -0,0 +1,27 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/rt_symb.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/rt_symb.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/rt_symb.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/rt_symb.c	2017-09-23 03:42:49.830675639 +0800
@@ -0,0 +1,37 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#ifdef OS_ABL_SUPPORT
+
+#include <linux/module.h>
+#include "rt_config.h"
+
+EXPORT_SYMBOL(RTMP_DRV_OPS_FUNCTION);
+
+#endif /* OS_ABL_SUPPORT */
+
+/* End of rt_symb.c */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/rt_usb.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/rt_usb.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/rt_usb.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/rt_usb.c	2017-09-23 03:42:49.834675626 +0800
@@ -0,0 +1,1141 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+
+/*
+========================================================================
+Routine Description:
+    Create kernel threads & tasklets.
+
+Arguments:
+    *net_dev			Pointer to wireless net device interface
+
+Return Value:
+	NDIS_STATUS_SUCCESS
+	NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+NDIS_STATUS	 RtmpMgmtTaskInit(
+	IN RTMP_ADAPTER *pAd)
+{
+	RTMP_OS_TASK *pTask;
+	NDIS_STATUS status;
+
+	/*
+		Creat TimerQ Thread, We need init timerQ related structure before create the timer thread.
+	*/
+	RtmpTimerQInit(pAd);
+
+	pTask = &pAd->timerTask;
+	RTMP_OS_TASK_INIT(pTask, "RtmpTimerTask", pAd);
+	status = RtmpOSTaskAttach(pTask, RtmpTimerQThread, (ULONG)pTask);
+	if (status == NDIS_STATUS_FAILURE) 
+	{
+		printk (KERN_WARNING "%s: unable to start RtmpTimerQThread\n", RTMP_OS_NETDEV_GET_DEVNAME(pAd->net_dev));
+		return NDIS_STATUS_FAILURE;
+	}
+	
+	/* Creat MLME Thread */
+	pTask = &pAd->mlmeTask;
+	RTMP_OS_TASK_INIT(pTask, "RtmpMlmeTask", pAd);
+	status = RtmpOSTaskAttach(pTask, MlmeThread, (ULONG)pTask);
+	if (status == NDIS_STATUS_FAILURE) 
+	{
+		printk (KERN_WARNING "%s: unable to start MlmeThread\n", RTMP_OS_NETDEV_GET_DEVNAME(pAd->net_dev));
+		return NDIS_STATUS_FAILURE;
+	}
+
+	/* Creat Command Thread */
+	pTask = &pAd->cmdQTask;
+	RTMP_OS_TASK_INIT(pTask, "RtmpCmdQTask", pAd);
+	status = RtmpOSTaskAttach(pTask, RTUSBCmdThread, (ULONG)pTask);
+	if (status == NDIS_STATUS_FAILURE) 
+	{
+		printk (KERN_WARNING "%s: unable to start RTUSBCmdThread\n", RTMP_OS_NETDEV_GET_DEVNAME(pAd->net_dev));
+		return NDIS_STATUS_FAILURE;
+	}
+
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+
+/*
+========================================================================
+Routine Description:
+    Close kernel threads.
+
+Arguments:
+	*pAd				the raxx interface data pointer
+
+Return Value:
+    NONE
+
+Note:
+========================================================================
+*/
+VOID RtmpMgmtTaskExit(
+	IN RTMP_ADAPTER *pAd)
+{
+	INT			ret;
+	RTMP_OS_TASK	*pTask;
+	
+	/* Sleep 50 milliseconds so pending io might finish normally */
+	RTMPusecDelay(50000);
+
+	/* We want to wait until all pending receives and sends to the */
+	/* device object. We cancel any */
+	/* irps. Wait until sends and receives have stopped. */
+	RTUSBCancelPendingIRPs(pAd);
+
+	/* We need clear timerQ related structure before exits of the timer thread. */
+	RtmpTimerQExit(pAd);
+
+	/* Terminate Mlme Thread */
+	pTask = &pAd->mlmeTask;
+	ret = RtmpOSTaskKill(pTask);
+	if (ret == NDIS_STATUS_FAILURE)
+	{
+/*		DBGPRINT(RT_DEBUG_ERROR, ("%s: kill task(%s) failed!\n", */
+/*					RTMP_OS_NETDEV_GET_DEVNAME(pAd->net_dev), pTask->taskName)); */
+		DBGPRINT(RT_DEBUG_ERROR, ("kill mlme task failed!\n"));
+	}
+
+	/* Terminate cmdQ thread */
+	pTask = &pAd->cmdQTask;
+	RTMP_OS_TASK_LEGALITY(pTask)
+	{
+		NdisAcquireSpinLock(&pAd->CmdQLock);
+		pAd->CmdQ.CmdQState = RTMP_TASK_STAT_STOPED;
+		NdisReleaseSpinLock(&pAd->CmdQLock);
+
+		/*RTUSBCMDUp(&pAd->cmdQTask); */
+		ret = RtmpOSTaskKill(pTask);
+		if (ret == NDIS_STATUS_FAILURE)
+		{
+/*			DBGPRINT(RT_DEBUG_ERROR, ("%s: kill task(%s) failed!\n", */
+/*					RTMP_OS_NETDEV_GET_DEVNAME(pAd->net_dev), pTask->taskName)); */
+			DBGPRINT(RT_DEBUG_ERROR, ("kill command task failed!\n"));
+		}
+		pAd->CmdQ.CmdQState = RTMP_TASK_STAT_UNKNOWN;
+	}
+
+	/* Terminate timer thread */
+	pTask = &pAd->timerTask;
+	ret = RtmpOSTaskKill(pTask);
+	if (ret == NDIS_STATUS_FAILURE)
+	{
+/*		DBGPRINT(RT_DEBUG_ERROR, ("%s: kill task(%s) failed!\n", */
+/*					RTMP_OS_NETDEV_GET_DEVNAME(pAd->net_dev), pTask->taskName)); */
+		DBGPRINT(RT_DEBUG_ERROR, ("kill timer task failed!\n"));
+	}
+
+
+}
+
+
+static void rtusb_dataout_complete(unsigned long data)
+{
+	PRTMP_ADAPTER		pAd;
+	purbb_t				pUrb;
+	POS_COOKIE			pObj;
+	PHT_TX_CONTEXT		pHTTXContext;
+	UCHAR				BulkOutPipeId;
+	NTSTATUS			Status;
+	unsigned long		IrqFlags;
+
+
+	pUrb			= (purbb_t)data;
+/*	pHTTXContext	= (PHT_TX_CONTEXT)pUrb->context; */
+	pHTTXContext	= (PHT_TX_CONTEXT)RTMP_USB_URB_DATA_GET(pUrb);
+	Status			= RTMP_USB_URB_STATUS_GET(pUrb);
+	pAd				= pHTTXContext->pAd;
+	pObj 			= (POS_COOKIE) pAd->OS_Cookie;
+/*	Status			= pUrb->status; */
+
+	/* Store BulkOut PipeId */
+	BulkOutPipeId = pHTTXContext->BulkOutPipeId;
+	pAd->BulkOutDataOneSecCount++;
+
+	/*DBGPRINT(RT_DEBUG_LOUD, ("Done-B(%d):I=0x%lx, CWPos=%ld, NBPos=%ld, ENBPos=%ld, bCopy=%d!\n", BulkOutPipeId, in_interrupt(), pHTTXContext->CurWritePosition, */
+	/*		pHTTXContext->NextBulkOutPosition, pHTTXContext->ENextBulkOutPosition, pHTTXContext->bCopySavePad)); */
+
+	RTMP_IRQ_LOCK(&pAd->BulkOutLock[BulkOutPipeId], IrqFlags);
+	pAd->BulkOutPending[BulkOutPipeId] = FALSE;
+	pHTTXContext->IRPPending = FALSE;
+	pAd->watchDogTxPendingCnt[BulkOutPipeId] = 0;
+	
+	if (Status == USB_ST_NOERROR)
+	{	
+		pAd->BulkOutComplete++;
+
+		RTMP_IRQ_UNLOCK(&pAd->BulkOutLock[BulkOutPipeId], IrqFlags);
+	
+		pAd->Counters8023.GoodTransmits++;
+		/*RTMP_IRQ_LOCK(&pAd->TxContextQueueLock[BulkOutPipeId], IrqFlags); */
+		FREE_HTTX_RING(pAd, BulkOutPipeId, pHTTXContext);			
+		/*RTMP_IRQ_UNLOCK(&pAd->TxContextQueueLock[BulkOutPipeId], IrqFlags); */
+
+
+	}
+	else	/* STATUS_OTHER */
+	{
+		PUCHAR	pBuf;
+		
+		pAd->BulkOutCompleteOther++;
+		
+		pBuf = &pHTTXContext->TransferBuffer->field.WirelessPacket[pHTTXContext->NextBulkOutPosition];
+		
+		if (!RTMP_TEST_FLAG(pAd, (fRTMP_ADAPTER_RESET_IN_PROGRESS |
+									fRTMP_ADAPTER_HALT_IN_PROGRESS |
+									fRTMP_ADAPTER_NIC_NOT_EXIST |
+									fRTMP_ADAPTER_BULKOUT_RESET)))
+		{
+			RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_BULKOUT_RESET);
+			pAd->bulkResetPipeid = BulkOutPipeId;
+			pAd->bulkResetReq[BulkOutPipeId] = pAd->BulkOutReq;
+		}
+		RTMP_IRQ_UNLOCK(&pAd->BulkOutLock[BulkOutPipeId], IrqFlags);
+
+		DBGPRINT_RAW(RT_DEBUG_ERROR, ("BulkOutDataPacket failed: ReasonCode=%d!\n", Status));
+		DBGPRINT_RAW(RT_DEBUG_ERROR, ("\t>>BulkOut Req=0x%lx, Complete=0x%lx, Other=0x%lx\n", pAd->BulkOutReq, pAd->BulkOutComplete, pAd->BulkOutCompleteOther));
+		DBGPRINT_RAW(RT_DEBUG_ERROR, ("\t>>BulkOut Header:%x %x %x %x %x %x %x %x\n", pBuf[0], pBuf[1], pBuf[2], pBuf[3], pBuf[4], pBuf[5], pBuf[6], pBuf[7]));
+		/*DBGPRINT_RAW(RT_DEBUG_ERROR, (">>BulkOutCompleteCancel=0x%x, BulkOutCompleteOther=0x%x\n", pAd->BulkOutCompleteCancel, pAd->BulkOutCompleteOther)); */
+		
+	}
+
+	/* */
+	/* bInUse = TRUE, means some process are filling TX data, after that must turn on bWaitingBulkOut */
+	/* bWaitingBulkOut = TRUE, means the TX data are waiting for bulk out. */
+	/* */
+	/*RTMP_IRQ_LOCK(&pAd->TxContextQueueLock[BulkOutPipeId], IrqFlags); */
+	if (((pHTTXContext->ENextBulkOutPosition != pHTTXContext->CurWritePosition) && 
+		(pHTTXContext->ENextBulkOutPosition != (pHTTXContext->CurWritePosition+8)) && 
+		!RTUSB_TEST_BULK_FLAG(pAd, (fRTUSB_BULK_OUT_DATA_FRAG << BulkOutPipeId)))
+#ifdef USB_BULK_BUF_ALIGMENT
+				||	(pHTTXContext->NextBulkIdx != pHTTXContext->CurWriteIdx)
+#endif /* USB_BULK_BUF_ALIGMENT */
+	)
+	{
+		/* Indicate There is data avaliable */
+		RTUSB_SET_BULK_FLAG(pAd, (fRTUSB_BULK_OUT_DATA_NORMAL << BulkOutPipeId));
+	}
+	/*RTMP_IRQ_UNLOCK(&pAd->TxContextQueueLock[BulkOutPipeId], IrqFlags); */
+
+	/* Always call Bulk routine, even reset bulk. */
+	/* The protection of rest bulk should be in BulkOut routine */
+	RTUSBKickBulkOut(pAd);
+}
+
+
+static void rtusb_null_frame_done_tasklet(unsigned long data)
+{
+	PRTMP_ADAPTER	pAd;
+	PTX_CONTEXT		pNullContext;
+	purbb_t			pUrb;
+	NTSTATUS		Status;
+	unsigned long	irqFlag;
+
+
+	pUrb			= (purbb_t)data;
+/*	pNullContext	= (PTX_CONTEXT)pUrb->context; */
+	pNullContext	= (PTX_CONTEXT)RTMP_USB_URB_DATA_GET(pUrb);
+	Status			= RTMP_USB_URB_STATUS_GET(pUrb);
+	pAd 			= pNullContext->pAd;
+/*	Status 			= pUrb->status; */
+
+	/* Reset Null frame context flags */
+	RTMP_IRQ_LOCK(&pAd->BulkOutLock[0], irqFlag);
+	pNullContext->IRPPending 	= FALSE;
+	pNullContext->InUse 		= FALSE;
+	pAd->BulkOutPending[0] = FALSE;
+	pAd->watchDogTxPendingCnt[0] = 0;
+
+	if (Status == USB_ST_NOERROR)
+	{
+		RTMP_IRQ_UNLOCK(&pAd->BulkOutLock[0], irqFlag);
+		
+		RTMPDeQueuePacket(pAd, FALSE, NUM_OF_TX_RING, MAX_TX_PROCESS);
+	}
+	else	/* STATUS_OTHER */
+	{
+		if ((!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS)) &&
+			(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS)) &&
+			(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)) &&
+			(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BULKOUT_RESET)))
+		{
+			DBGPRINT_RAW(RT_DEBUG_ERROR, ("Bulk Out Null Frame Failed, ReasonCode=%d!\n", Status));
+			RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_BULKOUT_RESET);
+			pAd->bulkResetPipeid = (MGMTPIPEIDX | BULKOUT_MGMT_RESET_FLAG);
+			RTMP_IRQ_UNLOCK(&pAd->BulkOutLock[0], irqFlag);
+			RTEnqueueInternalCmd(pAd, CMDTHREAD_RESET_BULK_OUT, NULL, 0);
+		}
+		else
+		{
+			RTMP_IRQ_UNLOCK(&pAd->BulkOutLock[0], irqFlag);
+		}
+	}
+
+	/* Always call Bulk routine, even reset bulk. */
+	/* The protectioon of rest bulk should be in BulkOut routine */
+	RTUSBKickBulkOut(pAd);
+}
+
+
+static void rtusb_pspoll_frame_done_tasklet(unsigned long data)
+{
+	PRTMP_ADAPTER	pAd;
+	PTX_CONTEXT		pPsPollContext;
+	purbb_t			pUrb;
+	NTSTATUS		Status;
+
+
+
+	pUrb			= (purbb_t)data;
+/*	pPsPollContext	= (PTX_CONTEXT)pUrb->context; */
+	pPsPollContext	= (PTX_CONTEXT)RTMP_USB_URB_DATA_GET(pUrb);
+	Status			= RTMP_USB_URB_STATUS_GET(pUrb);
+	pAd				= pPsPollContext->pAd;
+/*	Status			= pUrb->status; */
+
+	/* Reset PsPoll context flags */
+	pPsPollContext->IRPPending	= FALSE;
+	pPsPollContext->InUse		= FALSE;
+	pAd->watchDogTxPendingCnt[0] = 0;
+	
+	if (Status == USB_ST_NOERROR)
+	{
+		RTMPDeQueuePacket(pAd, FALSE, NUM_OF_TX_RING, MAX_TX_PROCESS);
+	}
+	else /* STATUS_OTHER */
+	{
+		if ((!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS)) &&
+			(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS)) &&
+			(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)) &&
+			(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BULKOUT_RESET)))
+		{
+			DBGPRINT_RAW(RT_DEBUG_ERROR, ("Bulk Out PSPoll Failed\n"));
+			RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_BULKOUT_RESET);
+			pAd->bulkResetPipeid = (MGMTPIPEIDX | BULKOUT_MGMT_RESET_FLAG);
+			RTEnqueueInternalCmd(pAd, CMDTHREAD_RESET_BULK_OUT, NULL, 0);
+		}
+	}
+
+	RTMP_SEM_LOCK(&pAd->BulkOutLock[0]);
+	pAd->BulkOutPending[0] = FALSE;
+	RTMP_SEM_UNLOCK(&pAd->BulkOutLock[0]);
+
+	/* Always call Bulk routine, even reset bulk. */
+	/* The protectioon of rest bulk should be in BulkOut routine */
+	RTUSBKickBulkOut(pAd);
+
+}
+
+
+/*
+========================================================================
+Routine Description:
+    Handle received packets.
+
+Arguments:
+	data				- URB information pointer
+
+Return Value:
+    None
+
+Note:
+========================================================================
+*/
+static void rx_done_tasklet(unsigned long data)
+{
+	purbb_t 			pUrb;
+	PRX_CONTEXT			pRxContext;
+	PRTMP_ADAPTER		pAd;
+	NTSTATUS			Status;
+	unsigned int		IrqFlags;
+
+	pUrb		= (purbb_t)data;
+/*	pRxContext	= (PRX_CONTEXT)pUrb->context; */
+	pRxContext	= (PRX_CONTEXT)RTMP_USB_URB_DATA_GET(pUrb);
+	Status		= RTMP_USB_URB_STATUS_GET(pUrb);
+	pAd 		= pRxContext->pAd;
+/*	Status = pUrb->status; */
+
+
+	RTMP_IRQ_LOCK(&pAd->BulkInLock, IrqFlags);
+	pRxContext->InUse = FALSE;
+	pRxContext->IRPPending = FALSE;
+	pRxContext->BulkInOffset += RTMP_USB_URB_LEN_GET(pUrb); /*pUrb->actual_length; */
+	/*NdisInterlockedDecrement(&pAd->PendingRx); */
+	pAd->PendingRx--;
+
+	if (Status == USB_ST_NOERROR)
+	{
+		pAd->BulkInComplete++;
+		pAd->NextRxBulkInPosition = 0;
+		if (pRxContext->BulkInOffset)	/* As jan's comment, it may bulk-in success but size is zero. */
+		{
+			pRxContext->Readable = TRUE;
+			INC_RING_INDEX(pAd->NextRxBulkInIndex, RX_RING_SIZE);
+		}
+		RTMP_IRQ_UNLOCK(&pAd->BulkInLock, IrqFlags);
+	}
+	else	 /* STATUS_OTHER */
+	{
+		pAd->BulkInCompleteFail++;
+		/* Still read this packet although it may comtain wrong bytes. */
+		pRxContext->Readable = FALSE;
+		RTMP_IRQ_UNLOCK(&pAd->BulkInLock, IrqFlags);
+
+		/* Parsing all packets. because after reset, the index will reset to all zero. */
+		if ((!RTMP_TEST_FLAG(pAd, (fRTMP_ADAPTER_RESET_IN_PROGRESS |
+									fRTMP_ADAPTER_BULKIN_RESET |
+									fRTMP_ADAPTER_HALT_IN_PROGRESS |
+									fRTMP_ADAPTER_NIC_NOT_EXIST))))
+		{
+			
+			DBGPRINT_RAW(RT_DEBUG_ERROR, ("Bulk In Failed. Status=%d, BIIdx=0x%x, BIRIdx=0x%x, actual_length= 0x%x\n", 
+							Status, pAd->NextRxBulkInIndex, pAd->NextRxBulkInReadIndex, RTMP_USB_URB_LEN_GET(pRxContext->pUrb))); /*->actual_length)); */
+
+			RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_BULKIN_RESET);
+			RTEnqueueInternalCmd(pAd, CMDTHREAD_RESET_BULK_IN, NULL, 0);
+		}
+	}
+	
+	ASSERT((pRxContext->InUse == pRxContext->IRPPending));
+
+#ifdef RALINK_ATE
+	if (ATE_ON(pAd))
+	{
+		/* If the driver is in ATE mode and Rx frame is set into here. */
+		if (pAd->ContinBulkIn == TRUE)		
+		{
+			RTUSBBulkReceive(pAd);
+		}
+	}
+	else
+#endif /* RALINK_ATE */
+	RTUSBBulkReceive(pAd);
+
+
+	return;
+
+}
+
+
+static void rtusb_mgmt_dma_done_tasklet(unsigned long data)
+{
+	PRTMP_ADAPTER 	pAd;
+	PTX_CONTEXT		pMLMEContext;
+	int				index;
+	PNDIS_PACKET	pPacket;
+	purbb_t			pUrb;
+	NTSTATUS		Status;
+	unsigned long	IrqFlags;
+
+
+	pUrb			= (purbb_t)data;
+/*	pMLMEContext	= (PTX_CONTEXT)pUrb->context; */
+	pMLMEContext	= (PTX_CONTEXT)RTMP_USB_URB_DATA_GET(pUrb);
+	Status			= RTMP_USB_URB_STATUS_GET(pUrb);
+	pAd 			= pMLMEContext->pAd;
+/*	Status			= pUrb->status; */
+	index 			= pMLMEContext->SelfIdx;
+
+	ASSERT((pAd->MgmtRing.TxDmaIdx == index));
+
+	RTMP_IRQ_LOCK(&pAd->BulkOutLock[MGMTPIPEIDX], IrqFlags);
+
+
+	if (Status != USB_ST_NOERROR)
+	{
+		/*Bulk-Out fail status handle */
+		if ((!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS)) &&
+			(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS)) &&
+			(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)) &&
+			(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BULKOUT_RESET)))
+		{
+			DBGPRINT_RAW(RT_DEBUG_ERROR, ("Bulk Out MLME Failed, Status=%d!\n", Status));
+			/* TODO: How to handle about the MLMEBulkOut failed issue. Need to resend the mgmt pkt? */
+			RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_BULKOUT_RESET);
+			pAd->bulkResetPipeid = (MGMTPIPEIDX | BULKOUT_MGMT_RESET_FLAG);
+		}
+	}
+
+	pAd->BulkOutPending[MGMTPIPEIDX] = FALSE;
+	RTMP_IRQ_UNLOCK(&pAd->BulkOutLock[MGMTPIPEIDX], IrqFlags);
+
+	RTMP_IRQ_LOCK(&pAd->MLMEBulkOutLock, IrqFlags);
+	/* Reset MLME context flags */
+	pMLMEContext->IRPPending = FALSE;
+	pMLMEContext->InUse = FALSE;
+	pMLMEContext->bWaitingBulkOut = FALSE;
+	pMLMEContext->BulkOutSize = 0;
+
+	pPacket = pAd->MgmtRing.Cell[index].pNdisPacket;
+	pAd->MgmtRing.Cell[index].pNdisPacket = NULL;
+
+	/* Increase MgmtRing Index */
+	INC_RING_INDEX(pAd->MgmtRing.TxDmaIdx, MGMT_RING_SIZE);
+	pAd->MgmtRing.TxSwFreeIdx++;
+	RTMP_IRQ_UNLOCK(&pAd->MLMEBulkOutLock, IrqFlags);
+
+
+	/* No-matter success or fail, we free the mgmt packet. */
+	if (pPacket)
+		RTMPFreeNdisPacket(pAd, pPacket);
+
+	if ((RTMP_TEST_FLAG(pAd, (fRTMP_ADAPTER_RESET_IN_PROGRESS | 
+								fRTMP_ADAPTER_HALT_IN_PROGRESS | 
+								fRTMP_ADAPTER_NIC_NOT_EXIST))))
+	{
+		/* do nothing and return directly. */
+	}
+	else
+	{
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BULKOUT_RESET) && 
+			((pAd->bulkResetPipeid & BULKOUT_MGMT_RESET_FLAG) == BULKOUT_MGMT_RESET_FLAG))
+		{	/* For Mgmt Bulk-Out failed, ignore it now. */
+			RTEnqueueInternalCmd(pAd, CMDTHREAD_RESET_BULK_OUT, NULL, 0);
+		}
+		else
+		{
+
+			/* Always call Bulk routine, even reset bulk. */
+			/* The protectioon of rest bulk should be in BulkOut routine */
+			if (pAd->MgmtRing.TxSwFreeIdx < MGMT_RING_SIZE /* pMLMEContext->bWaitingBulkOut == TRUE */)
+			{
+				RTUSB_SET_BULK_FLAG(pAd, fRTUSB_BULK_OUT_MLME);
+			}
+				RTUSBKickBulkOut(pAd);
+			}
+		}
+
+
+#ifdef CONFIG_STA_SUPPORT
+#endif /* CONFIG_STA_SUPPORT */
+}
+
+
+static void rtusb_hcca_dma_done_tasklet(unsigned long data)
+{
+	PRTMP_ADAPTER		pAd;
+	PHT_TX_CONTEXT		pHTTXContext;
+	UCHAR				BulkOutPipeId = 4;
+	purbb_t				pUrb;
+
+	
+	DBGPRINT_RAW(RT_DEBUG_ERROR, ("--->hcca_dma_done_tasklet\n"));
+
+
+	pUrb			= (purbb_t)data;
+/*	pHTTXContext	= (PHT_TX_CONTEXT)pUrb->context; */
+	pHTTXContext	= (PHT_TX_CONTEXT)RTMP_USB_URB_DATA_GET(pUrb);
+	pAd				= pHTTXContext->pAd;
+
+	rtusb_dataout_complete((unsigned long)pUrb);
+
+	if ((RTMP_TEST_FLAG(pAd, (fRTMP_ADAPTER_RESET_IN_PROGRESS | 
+								fRTMP_ADAPTER_HALT_IN_PROGRESS | 
+								fRTMP_ADAPTER_NIC_NOT_EXIST)))) 
+	{
+		/* do nothing and return directly. */
+	}
+	else 
+	{	
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BULKOUT_RESET))
+		{
+			RTEnqueueInternalCmd(pAd, CMDTHREAD_RESET_BULK_OUT, NULL, 0);	
+		}
+		else
+		{	pHTTXContext = &pAd->TxContext[BulkOutPipeId];
+			if ((pAd->TxSwQueue[BulkOutPipeId].Number > 0) && 
+				/*((pHTTXContext->CurWritePosition > (pHTTXContext->NextBulkOutPosition + 0x6000)) || (pHTTXContext->NextBulkOutPosition > pHTTXContext->CurWritePosition + 0x6000)) && */
+				(pAd->DeQueueRunning[BulkOutPipeId] == FALSE) && 
+				(pHTTXContext->bCurWriting == FALSE))
+			{
+				RTMPDeQueuePacket(pAd, FALSE, BulkOutPipeId, MAX_TX_PROCESS);
+			}
+			
+			RTUSB_SET_BULK_FLAG(pAd, fRTUSB_BULK_OUT_DATA_NORMAL);
+			RTUSBKickBulkOut(pAd);
+		}
+	}
+	
+	DBGPRINT_RAW(RT_DEBUG_ERROR, ("<---hcca_dma_done_tasklet\n"));
+
+		return;
+}
+
+
+static void rtusb_ac3_dma_done_tasklet(unsigned long data)
+{
+	PRTMP_ADAPTER		pAd;
+	PHT_TX_CONTEXT		pHTTXContext;
+	UCHAR				BulkOutPipeId = 3;
+	purbb_t				pUrb;
+	
+
+	pUrb			= (purbb_t)data;
+/*	pHTTXContext	= (PHT_TX_CONTEXT)pUrb->context; */
+	pHTTXContext	= (PHT_TX_CONTEXT)RTMP_USB_URB_DATA_GET(pUrb);
+	pAd				= pHTTXContext->pAd;
+
+	rtusb_dataout_complete((unsigned long)pUrb);
+
+	if ((RTMP_TEST_FLAG(pAd, (fRTMP_ADAPTER_RESET_IN_PROGRESS | 
+								fRTMP_ADAPTER_HALT_IN_PROGRESS | 
+								fRTMP_ADAPTER_NIC_NOT_EXIST)))) 
+	{
+		/* do nothing and return directly. */
+	}
+	else 
+	{	
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BULKOUT_RESET))
+		{
+			RTEnqueueInternalCmd(pAd, CMDTHREAD_RESET_BULK_OUT, NULL, 0);	
+		}
+		else
+		{	pHTTXContext = &pAd->TxContext[BulkOutPipeId];
+			if ((pAd->TxSwQueue[BulkOutPipeId].Number > 0) && 
+				/*((pHTTXContext->CurWritePosition > (pHTTXContext->NextBulkOutPosition + 0x6000)) || (pHTTXContext->NextBulkOutPosition > pHTTXContext->CurWritePosition + 0x6000)) && */
+				(pAd->DeQueueRunning[BulkOutPipeId] == FALSE) && 
+				(pHTTXContext->bCurWriting == FALSE))
+			{
+				RTMPDeQueuePacket(pAd, FALSE, BulkOutPipeId, MAX_TX_PROCESS);
+			}
+			
+			RTUSB_SET_BULK_FLAG(pAd, fRTUSB_BULK_OUT_DATA_NORMAL<<3);
+			RTUSBKickBulkOut(pAd);
+		}
+	}
+
+
+	return;
+}
+
+
+static void rtusb_ac2_dma_done_tasklet(unsigned long data)
+{
+	PRTMP_ADAPTER		pAd;
+	PHT_TX_CONTEXT		pHTTXContext;
+	UCHAR				BulkOutPipeId = 2;
+	purbb_t				pUrb;
+
+
+	pUrb			= (purbb_t)data;
+/*	pHTTXContext	= (PHT_TX_CONTEXT)pUrb->context; */
+	pHTTXContext	= (PHT_TX_CONTEXT)RTMP_USB_URB_DATA_GET(pUrb);
+	pAd				= pHTTXContext->pAd;
+
+	rtusb_dataout_complete((unsigned long)pUrb);
+
+	if ((RTMP_TEST_FLAG(pAd, (fRTMP_ADAPTER_RESET_IN_PROGRESS | 
+								fRTMP_ADAPTER_HALT_IN_PROGRESS | 
+								fRTMP_ADAPTER_NIC_NOT_EXIST)))) 
+	{
+		/* do nothing and return directly. */
+	}
+	else 
+	{	
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BULKOUT_RESET))
+		{
+			RTEnqueueInternalCmd(pAd, CMDTHREAD_RESET_BULK_OUT, NULL, 0);	
+		}
+		else
+		{	pHTTXContext = &pAd->TxContext[BulkOutPipeId];
+			if ((pAd->TxSwQueue[BulkOutPipeId].Number > 0) && 
+				/*((pHTTXContext->CurWritePosition > (pHTTXContext->NextBulkOutPosition + 0x6000)) || (pHTTXContext->NextBulkOutPosition > pHTTXContext->CurWritePosition + 0x6000)) && */
+				(pAd->DeQueueRunning[BulkOutPipeId] == FALSE) && 
+				(pHTTXContext->bCurWriting == FALSE))
+			{
+				RTMPDeQueuePacket(pAd, FALSE, BulkOutPipeId, MAX_TX_PROCESS);
+			}
+			
+			RTUSB_SET_BULK_FLAG(pAd, fRTUSB_BULK_OUT_DATA_NORMAL<<2);
+			RTUSBKickBulkOut(pAd);
+		}
+	}
+
+
+	return;
+}
+
+
+static void rtusb_ac1_dma_done_tasklet(unsigned long data)
+{
+	PRTMP_ADAPTER		pAd;
+	PHT_TX_CONTEXT		pHTTXContext;
+	UCHAR				BulkOutPipeId = 1;
+	purbb_t				pUrb;
+
+
+	pUrb			= (purbb_t)data;
+/*	pHTTXContext	= (PHT_TX_CONTEXT)pUrb->context; */
+	pHTTXContext	= (PHT_TX_CONTEXT)RTMP_USB_URB_DATA_GET(pUrb);
+	pAd				= pHTTXContext->pAd;
+
+	rtusb_dataout_complete((unsigned long)pUrb);
+
+	if ((RTMP_TEST_FLAG(pAd, (fRTMP_ADAPTER_RESET_IN_PROGRESS | 
+								fRTMP_ADAPTER_HALT_IN_PROGRESS | 
+								fRTMP_ADAPTER_NIC_NOT_EXIST)))) 
+	{
+		/* do nothing and return directly. */
+	}
+	else 
+	{	
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BULKOUT_RESET))
+		{
+			RTEnqueueInternalCmd(pAd, CMDTHREAD_RESET_BULK_OUT, NULL, 0);	
+		}
+		else
+		{	pHTTXContext = &pAd->TxContext[BulkOutPipeId];
+			if ((pAd->TxSwQueue[BulkOutPipeId].Number > 0) && 
+				/*((pHTTXContext->CurWritePosition > (pHTTXContext->NextBulkOutPosition + 0x6000)) || (pHTTXContext->NextBulkOutPosition > pHTTXContext->CurWritePosition + 0x6000)) && */
+				(pAd->DeQueueRunning[BulkOutPipeId] == FALSE) && 
+				(pHTTXContext->bCurWriting == FALSE))
+			{
+				RTMPDeQueuePacket(pAd, FALSE, BulkOutPipeId, MAX_TX_PROCESS);
+			}
+			
+			RTUSB_SET_BULK_FLAG(pAd, fRTUSB_BULK_OUT_DATA_NORMAL<<1);
+			RTUSBKickBulkOut(pAd);
+		}
+	}
+	return;
+
+}
+
+
+static void rtusb_ac0_dma_done_tasklet(unsigned long data)
+{
+	PRTMP_ADAPTER		pAd;
+	PHT_TX_CONTEXT		pHTTXContext;
+	UCHAR				BulkOutPipeId = 0;
+	purbb_t				pUrb;
+	
+
+	pUrb			= (purbb_t)data;
+/*	pHTTXContext	= (PHT_TX_CONTEXT)pUrb->context; */
+	pHTTXContext	= (PHT_TX_CONTEXT)RTMP_USB_URB_DATA_GET(pUrb);
+	pAd				= pHTTXContext->pAd;
+
+	rtusb_dataout_complete((unsigned long)pUrb);
+		
+	if ((RTMP_TEST_FLAG(pAd, (fRTMP_ADAPTER_RESET_IN_PROGRESS | 
+								fRTMP_ADAPTER_HALT_IN_PROGRESS | 
+								fRTMP_ADAPTER_NIC_NOT_EXIST)))) 
+	{
+		/* do nothing and return directly. */
+	}
+	else 
+	{	
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BULKOUT_RESET))
+		{
+			RTEnqueueInternalCmd(pAd, CMDTHREAD_RESET_BULK_OUT, NULL, 0);	
+		}
+		else
+		{	pHTTXContext = &pAd->TxContext[BulkOutPipeId];
+			if ((pAd->TxSwQueue[BulkOutPipeId].Number > 0) && 
+				/*  ((pHTTXContext->CurWritePosition > (pHTTXContext->NextBulkOutPosition + 0x6000)) || (pHTTXContext->NextBulkOutPosition > pHTTXContext->CurWritePosition + 0x6000)) && */
+				(pAd->DeQueueRunning[BulkOutPipeId] == FALSE) &&
+				(pHTTXContext->bCurWriting == FALSE))
+			{
+				RTMPDeQueuePacket(pAd, FALSE, BulkOutPipeId, MAX_TX_PROCESS);
+			}
+			
+			RTUSB_SET_BULK_FLAG(pAd, fRTUSB_BULK_OUT_DATA_NORMAL);
+			RTUSBKickBulkOut(pAd);
+		}
+	}
+
+
+	return;
+
+}
+
+#ifdef RALINK_ATE
+static void rtusb_ate_ac0_dma_done_tasklet(unsigned long data)
+{
+	PRTMP_ADAPTER pAd;
+	PTX_CONTEXT pNullContext;
+	UCHAR BulkOutPipeId;
+	NTSTATUS Status;
+	ULONG IrqFlags;
+	ULONG OldValue;
+	purbb_t pURB;
+
+	pURB = (purbb_t)data;
+	/*pNullContext = (PTX_CONTEXT)pURB->rtusb_urb_context; */
+	pNullContext	= (PTX_CONTEXT)RTMP_USB_URB_DATA_GET(pURB);
+	pAd = pNullContext->pAd;
+	
+	/* Reset Null frame context flags */
+	pNullContext->IRPPending = FALSE;
+	pNullContext->InUse = FALSE;
+	Status = RTMP_USB_URB_STATUS_GET(pURB);/*pURB->rtusb_urb_status; */
+
+	/* Store BulkOut PipeId. */
+	BulkOutPipeId = pNullContext->BulkOutPipeId;
+	pAd->BulkOutDataOneSecCount++;
+	
+	if (Status == USB_ST_NOERROR)
+	{	
+#ifdef RALINK_QA
+		if ((ATE_ON(pAd)) && (pAd->ate.bQATxStart == TRUE))
+		{
+			if (pAd->ate.QID == BulkOutPipeId)
+			{
+				/*
+					Let Rx can have a chance to break in during Tx process,
+					especially for loopback mode in QA ATE.
+
+					To trade off between tx performance and loopback mode integrity.
+
+					Q   : Now Rx is handled by tasklet, do we still need this delay ?
+					Ans : Even tasklet is used, Rx/Tx < 1 if we do not delay for a while right here.
+				*/
+				RTMPusecDelay(500);
+				pAd->ate.TxDoneCount++;
+#ifdef RELASE_EXCLUDE
+				DBGPRINT(RT_DEBUG_INFO, ("pAd->ate.TxDoneCount == %d\n", pAd->ate.TxDoneCount));
+#endif /* RELASE_EXCLUDE */
+				pAd->RalinkCounters.KickTxCount++;
+				ASSERT(pAd->ate.QID == 0);
+				pAd->ate.TxAc0++;
+			}
+		}
+#endif /* RALINK_QA */
+		pAd->BulkOutComplete++;
+
+		pAd->Counters8023.GoodTransmits++;
+
+		/* Don't worry about the queue is empty or not. This function will check itself. */
+		/* In RT28xx, SendTxWaitQueue == TxSwQueue  */
+		RTMPDeQueuePacket(pAd, TRUE, BulkOutPipeId, MAX_TX_PROCESS);
+
+	}
+	else
+	{
+		pAd->BulkOutCompleteOther++;
+
+		DBGPRINT(RT_DEBUG_ERROR, ("BulkOutDataPacket Failed STATUS_OTHER = 0x%x . \n", Status));
+		DBGPRINT(RT_DEBUG_ERROR, (">>BulkOutReq=0x%lx, BulkOutComplete=0x%lx\n", pAd->BulkOutReq, pAd->BulkOutComplete));
+
+		if ((!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS)) &&
+			(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS)) &&
+			(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)) &&
+			(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BULKOUT_RESET)))
+		{
+			RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_BULKOUT_RESET);
+
+			/* In 28xx, RT_OID_USB_RESET_BULK_OUT ==> CMDTHREAD_RESET_BULK_OUT */
+			RTEnqueueInternalCmd(pAd, CMDTHREAD_RESET_BULK_OUT, NULL, 0);
+
+			/* check */
+			BULK_OUT_LOCK(&pAd->BulkOutLock[BulkOutPipeId], IrqFlags);
+			pAd->BulkOutPending[BulkOutPipeId] = FALSE;
+			pAd->bulkResetPipeid = BulkOutPipeId;
+			BULK_OUT_UNLOCK(&pAd->BulkOutLock[BulkOutPipeId], IrqFlags);
+
+			return;
+		}
+	}
+
+#ifdef RELASE_EXCLUDE
+	DBGPRINT(RT_DEBUG_OFF, ("pNullContext->pAd = 0x%lx\n", (ULONG)&pNullContext->pAd));
+	DBGPRINT(RT_DEBUG_OFF, ("pNullContext->pUrb = 0x%lx\n", (ULONG)&pNullContext->pUrb));
+	DBGPRINT(RT_DEBUG_OFF, ("pNullContext->TransferBuffer = 0x%lx\n", (ULONG)&pNullContext->TransferBuffer));
+	DBGPRINT(RT_DEBUG_OFF, ("pNullContext->BulkOutPipeId = %d\n", pNullContext->BulkOutPipeId));
+	DBGPRINT(RT_DEBUG_OFF, ("pNullContext->BulkOutSize = %ld\n", pNullContext->BulkOutSize));
+	DBGPRINT(RT_DEBUG_OFF, ("pNullContext->InUse = %d\n", (pNullContext->InUse==TRUE)));
+	DBGPRINT(RT_DEBUG_OFF, ("pNullContext->bWaitingBulkOut = %d\n", (pNullContext->bWaitingBulkOut==TRUE)));
+	DBGPRINT(RT_DEBUG_OFF, ("pNullContext->IRPPending = %d\n", (pNullContext->IRPPending==TRUE)));
+	DBGPRINT(RT_DEBUG_OFF, ("pNullContext->LastOne = %d\n", (pNullContext->LastOne==TRUE)));
+#endif /* RELASE_EXCLUDE */
+	
+
+	if (atomic_read(&pAd->BulkOutRemained) > 0)
+	{			
+		atomic_dec(&pAd->BulkOutRemained);
+#ifdef RELASE_EXCLUDE
+		DBGPRINT(RT_DEBUG_INFO, ("Bulk Out Remained = %d\n", atomic_read(&pAd->BulkOutRemained)));
+#endif /* RELASE_EXCLUDE */
+	}
+	
+	/* 1st - Transmit Success */
+	OldValue = pAd->WlanCounters.TransmittedFragmentCount.u.LowPart;
+	pAd->WlanCounters.TransmittedFragmentCount.u.LowPart++;
+
+	if (pAd->WlanCounters.TransmittedFragmentCount.u.LowPart < OldValue)
+	{
+		pAd->WlanCounters.TransmittedFragmentCount.u.HighPart++;
+	}
+	
+	if (((pAd->ContinBulkOut == TRUE ) ||(atomic_read(&pAd->BulkOutRemained) > 0))
+		&& (pAd->ate.Mode & ATE_TXFRAME))
+	{
+#ifdef RELASE_EXCLUDE
+		DBGPRINT(RT_DEBUG_INFO, ("Continue to BulkOut ! \n"));
+#endif /* RELASE_EXCLUDE */
+		RTUSB_SET_BULK_FLAG(pAd, fRTUSB_BULK_OUT_DATA_ATE);
+	}	
+	else
+	{
+		RTUSB_CLEAR_BULK_FLAG(pAd, fRTUSB_BULK_OUT_DATA_ATE);
+#ifdef RALINK_QA
+		pAd->ate.TxStatus = 0;
+#endif /* RALINK_QA */
+	}
+
+	BULK_OUT_LOCK(&pAd->BulkOutLock[BulkOutPipeId], IrqFlags);
+	pAd->BulkOutPending[BulkOutPipeId] = FALSE;
+	BULK_OUT_UNLOCK(&pAd->BulkOutLock[BulkOutPipeId], IrqFlags);	
+
+	/* Always call Bulk routine, even reset bulk. */
+	/* The protection of rest bulk should be in BulkOut routine. */
+	RTUSBKickBulkOut(pAd);
+}
+#endif /* RALINK_ATE */
+
+
+NDIS_STATUS RtmpNetTaskInit(
+	IN RTMP_ADAPTER *pAd)
+{
+	POS_COOKIE pObj = (POS_COOKIE) pAd->OS_Cookie;
+	
+	/* Create receive tasklet */
+	RTMP_OS_TASKLET_INIT(pAd, &pObj->rx_done_task, rx_done_tasklet, (ULONG)pAd);
+	RTMP_OS_TASKLET_INIT(pAd, &pObj->mgmt_dma_done_task, rtusb_mgmt_dma_done_tasklet, (unsigned long)pAd);
+	RTMP_OS_TASKLET_INIT(pAd, &pObj->ac0_dma_done_task, rtusb_ac0_dma_done_tasklet, (unsigned long)pAd);
+#ifdef RALINK_ATE
+	RTMP_OS_TASKLET_INIT(pAd, &pObj->ate_ac0_dma_done_task, rtusb_ate_ac0_dma_done_tasklet, (unsigned long)pAd);
+#endif /* RALINK_ATE */
+	RTMP_OS_TASKLET_INIT(pAd, &pObj->ac1_dma_done_task, rtusb_ac1_dma_done_tasklet, (unsigned long)pAd);
+	RTMP_OS_TASKLET_INIT(pAd, &pObj->ac2_dma_done_task, rtusb_ac2_dma_done_tasklet, (unsigned long)pAd);
+	RTMP_OS_TASKLET_INIT(pAd, &pObj->ac3_dma_done_task, rtusb_ac3_dma_done_tasklet, (unsigned long)pAd);
+	RTMP_OS_TASKLET_INIT(pAd, &pObj->hcca_dma_done_task, rtusb_hcca_dma_done_tasklet, (unsigned long)pAd);
+	RTMP_OS_TASKLET_INIT(pAd, &pObj->tbtt_task, tbtt_tasklet, (unsigned long)pAd);
+	RTMP_OS_TASKLET_INIT(pAd, &pObj->null_frame_complete_task, rtusb_null_frame_done_tasklet, (unsigned long)pAd);
+	RTMP_OS_TASKLET_INIT(pAd, &pObj->pspoll_frame_complete_task, rtusb_pspoll_frame_done_tasklet, (unsigned long)pAd);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+void RtmpNetTaskExit(IN RTMP_ADAPTER *pAd)
+{
+	POS_COOKIE pObj;
+
+	pObj = (POS_COOKIE) pAd->OS_Cookie;
+
+	RTMP_OS_TASKLET_KILL(&pObj->rx_done_task);
+	RTMP_OS_TASKLET_KILL(&pObj->mgmt_dma_done_task);
+	RTMP_OS_TASKLET_KILL(&pObj->ac0_dma_done_task);
+#ifdef RALINK_ATE
+	RTMP_OS_TASKLET_KILL(&pObj->ate_ac0_dma_done_task);
+#endif
+	RTMP_OS_TASKLET_KILL(&pObj->ac1_dma_done_task);
+	RTMP_OS_TASKLET_KILL(&pObj->ac2_dma_done_task);
+	RTMP_OS_TASKLET_KILL(&pObj->ac3_dma_done_task);
+	RTMP_OS_TASKLET_KILL(&pObj->hcca_dma_done_task);
+	RTMP_OS_TASKLET_KILL(&pObj->tbtt_task);
+	RTMP_OS_TASKLET_KILL(&pObj->null_frame_complete_task);
+	RTMP_OS_TASKLET_KILL(&pObj->pspoll_frame_complete_task);
+}
+
+
+/*
+========================================================================
+Routine Description:
+    MLME kernel thread.
+
+Arguments:
+	*Context			the pAd, driver control block pointer
+
+Return Value:
+    0					close the thread
+
+Note:
+========================================================================
+*/
+INT MlmeThread(
+	IN ULONG Context)
+{
+	RTMP_ADAPTER *pAd;
+	RTMP_OS_TASK *pTask;
+	int status;
+	status = 0;
+
+	pTask = (RTMP_OS_TASK *)Context;
+	pAd = (PRTMP_ADAPTER)RTMP_OS_TASK_DATA_GET(pTask);
+	if (pAd == NULL)
+		goto LabelExit; /* avoid compile warning */
+
+	RtmpOSTaskCustomize(pTask);
+
+	while(!RTMP_OS_TASK_IS_KILLED(pTask))
+	{
+		if (RtmpOSTaskWait(pAd, pTask, &status) == FALSE)
+		{
+			RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS);
+			break;
+		}
+			
+		/* lock the device pointers , need to check if required*/
+		/*down(&(pAd->usbdev_semaphore)); */
+		
+		if (!pAd->PM_FlgSuspend)
+			MlmeHandler(pAd);
+	}
+
+	/* notify the exit routine that we're actually exiting now 
+	 *
+	 * complete()/wait_for_completion() is similar to up()/down(),
+	 * except that complete() is safe in the case where the structure
+	 * is getting deleted in a parallel mode of execution (i.e. just
+	 * after the down() -- that's necessary for the thread-shutdown
+	 * case.
+	 *
+	 * complete_and_exit() goes even further than this -- it is safe in
+	 * the case that the thread of the caller is going away (not just
+	 * the structure) -- this is necessary for the module-remove case.
+	 * This is important in preemption kernels, which transfer the flow
+	 * of execution immediately upon a complete().
+	 */
+LabelExit:
+	DBGPRINT(RT_DEBUG_TRACE,( "<---%s\n",__FUNCTION__));
+	RtmpOSTaskNotifyToExit(pTask);
+	return 0;
+
+}
+
+
+/*
+========================================================================
+Routine Description:
+    USB command kernel thread.
+
+Arguments:
+	*Context			the pAd, driver control block pointer
+
+Return Value:
+    0					close the thread
+
+Note:
+========================================================================
+*/
+INT RTUSBCmdThread(
+	IN ULONG Context)
+{
+	RTMP_ADAPTER *pAd;
+	RTMP_OS_TASK *pTask;
+	int status;
+	status = 0;
+
+	pTask = (RTMP_OS_TASK *)Context;
+	pAd = (PRTMP_ADAPTER)RTMP_OS_TASK_DATA_GET(pTask);
+	
+	if (pAd == NULL)
+		return 0;
+	
+	RtmpOSTaskCustomize(pTask);
+
+	NdisAcquireSpinLock(&pAd->CmdQLock);
+	pAd->CmdQ.CmdQState = RTMP_TASK_STAT_RUNNING;
+	NdisReleaseSpinLock(&pAd->CmdQLock);
+	
+	while (pAd->CmdQ.CmdQState == RTMP_TASK_STAT_RUNNING)
+	{
+		if (RtmpOSTaskWait(pAd, pTask, &status) == FALSE)
+		{
+			RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS);
+			break;
+		}
+
+		if (pAd->CmdQ.CmdQState == RTMP_TASK_STAT_STOPED)
+			break;
+
+		if (!pAd->PM_FlgSuspend)
+			CMDHandler(pAd);
+	}
+
+	if (!pAd->PM_FlgSuspend)
+	{	/* Clear the CmdQElements. */
+		CmdQElmt	*pCmdQElmt = NULL;
+
+		NdisAcquireSpinLock(&pAd->CmdQLock);
+		pAd->CmdQ.CmdQState = RTMP_TASK_STAT_STOPED;
+		while(pAd->CmdQ.size)
+		{
+			RTThreadDequeueCmd(&pAd->CmdQ, &pCmdQElmt);
+			if (pCmdQElmt)
+			{
+				if (pCmdQElmt->CmdFromNdis == TRUE)
+				{
+					if (pCmdQElmt->buffer != NULL)
+						os_free_mem(pAd, pCmdQElmt->buffer);
+					os_free_mem(pAd, (PUCHAR)pCmdQElmt);
+				}
+				else
+				{
+					if ((pCmdQElmt->buffer != NULL) && (pCmdQElmt->bufferlength != 0))
+						os_free_mem(pAd, pCmdQElmt->buffer);
+					os_free_mem(pAd, (PUCHAR)pCmdQElmt);
+				}
+			}
+		}
+
+		NdisReleaseSpinLock(&pAd->CmdQLock);
+	}
+	/* notify the exit routine that we're actually exiting now 
+	 *
+	 * complete()/wait_for_completion() is similar to up()/down(),
+	 * except that complete() is safe in the case where the structure
+	 * is getting deleted in a parallel mode of execution (i.e. just
+	 * after the down() -- that's necessary for the thread-shutdown
+	 * case.
+	 *
+	 * complete_and_exit() goes even further than this -- it is safe in
+	 * the case that the thread of the caller is going away (not just
+	 * the structure) -- this is necessary for the module-remove case.
+	 * This is important in preemption kernels, which transfer the flow
+	 * of execution immediately upon a complete().
+	 */
+	DBGPRINT(RT_DEBUG_TRACE,( "<---RTUSBCmdThread\n"));
+
+	RtmpOSTaskNotifyToExit(pTask);
+	return 0;
+
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/rt_usb_util.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/rt_usb_util.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/rt_usb_util.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/rt_usb_util.c	2017-09-23 03:42:49.834675626 +0800
@@ -0,0 +1,1141 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#define RTMP_MODULE_OS
+#define RTMP_MODULE_OS_UTIL
+
+#include "rtmp_comm.h"
+#include "rtmp_osabl.h"
+#include "rt_os_util.h"
+
+#ifdef RTMP_MAC_USB
+#ifdef OS_ABL_SUPPORT
+MODULE_LICENSE("GPL");
+#endif /* OS_ABL_SUPPORT */
+
+#ifdef RESOURCE_BOOT_ALLOC
+#include <linux/usb.h>
+#include <hcd.h>
+
+#define RTUSB_MAX_BUS_CNT 1
+
+struct rtusb_bulk_mem{
+	void *buf;
+	dma_addr_t data_dma;
+	int len;
+	int assigned;
+};
+
+
+struct rtusb_mem_pool{
+	struct rtusb_mem_pool *next;
+	struct usb_bus *bus;
+	struct device *dev;
+	struct rtusb_bulk_mem *buf_pool;
+	int pool_cnt;
+};
+
+
+enum RTUSB_POOL_STATE{
+	MEM_POOL_INVALID = 0,
+	MEM_POOL_INITING = 1,
+	MEM_POOL_INITED = 2,
+	MEM_POOL_STOPING = 3,
+	MEM_POOL_MAX,
+};
+
+
+enum RTUSB_POOL_STAT_OP{
+	POOL_STAT_CHK = 1,
+	POOL_STAT_CHG = 2
+};
+
+
+static DEFINE_SPINLOCK(rtusb_mem_lock);
+static enum RTUSB_POOL_STATE mem_pool_stat = MEM_POOL_INVALID;
+static struct rtusb_mem_pool *rtusb_buf_pool = NULL;
+
+
+void dump_mem_pool(void)
+{
+	struct rtusb_mem_pool *pool;
+	struct rtusb_bulk_mem *mem;
+	unsigned long irqflags;
+	int idx;
+
+	spin_lock_irqsave(&rtusb_mem_lock, irqflags);
+	if ((rtusb_buf_pool == NULL) || (mem_pool_stat == MEM_POOL_INVALID)) {
+		printk("%s(): Invalid pool(0x%p) status(%d)\n", 
+				__FUNCTION__, rtusb_buf_pool, mem_pool_stat);
+	} else {
+
+		printk("Dump Pre-allocated mem pool(Hdr:0x%p, flag:%d):\n", 
+				rtusb_buf_pool, mem_pool_stat);
+		
+		pool = rtusb_buf_pool;
+		while(pool) {
+			printk("\tbus(%s): controller=0x%p, pool=0x%p, pool_cnt=%d\n", pool->bus->bus_name, pool->dev, pool, pool->pool_cnt);
+			for (idx = 0; idx < pool->pool_cnt; idx++) {
+				mem = (struct rtusb_bulk_mem *)(pool->buf_pool + idx);
+				printk("\t\t%d(0x%p):Flag=%d, buf=0x%p, dma=0x%x, len=%d\n", 
+						idx, mem, mem->assigned, mem->buf, mem->data_dma, mem->len);
+			}
+			pool = pool->next;
+		}
+	}
+	spin_unlock_irqrestore(&rtusb_mem_lock, irqflags);
+	
+}
+
+
+static int pool_stat_change(enum RTUSB_POOL_STATE old, enum RTUSB_POOL_STATE new)
+{
+	unsigned long irqflags;
+	int status = 0;
+
+	spin_lock_irqsave(&rtusb_mem_lock, irqflags);
+	if ((old != MEM_POOL_MAX) && (mem_pool_stat != old)) {
+		printk("%s(): invalid mem pool status(exp:%d, act:%d)\n", 
+				__FUNCTION__, old, mem_pool_stat);
+		status = -1;
+	}
+	else
+		mem_pool_stat = new;
+	spin_unlock_irqrestore(&rtusb_mem_lock, irqflags);
+	
+	return status;
+}
+
+
+int rtusb_resource_recycle(struct usb_device *udev, void *buf, dma_addr_t dma)
+{
+	struct rtusb_mem_pool *pool;
+	struct usb_bus *dev_bus = udev->bus;
+	struct rtusb_bulk_mem *mem;
+	unsigned long irqflags;
+	int pool_idx;
+
+	printk("-->%s()\n", __FUNCTION__);
+	if (!dev_bus) {
+		printk("Error:Invalid dev_bus!\n");
+		return -1;
+	}
+
+	printk("Recycle mem(0x%x, 0x%x) for usb_dev(%s) which attached to bus(0x%p, %s), controller=0x%p\n", 
+			buf, dma, udev->product, dev_bus, dev_bus->bus_name, dev_bus->controller);
+	
+	spin_lock_irqsave(&rtusb_mem_lock, irqflags);
+	if ((rtusb_buf_pool == NULL) || (mem_pool_stat != MEM_POOL_INITED)) {
+		printk("%s(): Invalid pool(0x%p) status(%d)\n", 
+				__FUNCTION__, rtusb_buf_pool, mem_pool_stat);
+		spin_unlock_irqrestore(&rtusb_mem_lock, irqflags);
+		return -1;
+	}
+
+	pool = rtusb_buf_pool;
+	while(pool != NULL)
+	{
+		if (dev_bus->controller == pool->dev)
+		{
+			printk("%s():Find attached controller(0x%p, %s)!\n", 
+					__FUNCTION__, pool->dev, (pool->bus ? pool->bus->bus_name : "Invalid"));
+			for (pool_idx = 0; pool_idx < pool->pool_cnt; pool_idx++)
+			{
+				mem = (struct rtusb_bulk_mem *)(pool->buf_pool + pool_idx);
+				if (mem->assigned && (mem->buf == buf) && (mem->data_dma == dma))
+				{
+					mem->assigned = 0;
+					printk("\tRecycle done\n");
+					break;
+				}
+			}
+			break;
+		}
+		pool = pool->next;
+	}
+	spin_unlock_irqrestore(&rtusb_mem_lock, irqflags);
+
+	if (pool == NULL) {
+		printk("%s():Cannot found buf(0x%p, 0x%x) assigned to usb_dev(%s) in mem pool\n", 
+				__FUNCTION__, buf, dma, udev->product);
+		dump_mem_pool();
+	}
+
+	return 0;
+	
+}
+
+void  *rtusb_resource_alloc(struct usb_device *udev, int len, dma_addr_t *dma)
+{
+	struct usb_bus *dev_bus = udev->bus;
+	struct rtusb_mem_pool *pool;
+	struct rtusb_bulk_mem *mem;
+	unsigned long irqflags;
+	int pool_idx;
+
+	printk("--->%s():\n", __FUNCTION__);
+	if (!dev_bus) {
+		printk("Error, invalid bus!\n");
+		return NULL;
+	}
+	
+	printk("Request mem(len:%d) for usb_dev(%s) which attached to bus(0x%p, %s), controller=0x%p\n", 
+			len, udev->product, dev_bus, dev_bus->bus_name, dev_bus->controller);
+	
+	spin_lock_irqsave(&rtusb_mem_lock, irqflags);
+	if ((rtusb_buf_pool == NULL) || (mem_pool_stat != MEM_POOL_INITED)) {
+		printk("%s(): Invalid pool(0x%p) status(%d)\n", 
+				__FUNCTION__, rtusb_buf_pool, mem_pool_stat);
+		spin_unlock_irqrestore(&rtusb_mem_lock, irqflags);
+		return NULL;
+	}
+
+	pool = rtusb_buf_pool;
+	while(pool != NULL)
+	{
+		if (dev_bus->controller == pool->dev)
+		{
+			printk("%s():Find attached controller(0x%p) at pool(0x%p)!\n", 
+					__FUNCTION__, dev_bus->controller, pool);
+			if (pool->bus != dev_bus) {
+				printk("Adjust the pool->bus as current one!\n");
+				pool->bus = dev_bus; /* write it back in case the bus is changed */
+			}
+
+			for (pool_idx = 0; pool_idx < pool->pool_cnt; pool_idx++)
+			{
+				mem = (struct rtusb_bulk_mem *)(pool->buf_pool + pool_idx);
+				if ((mem->assigned == 0) && (mem->len == len))
+				{
+					mem->assigned = 1;
+					*dma = mem->data_dma;
+					memset(mem->buf, 0, mem->len);
+					spin_unlock_irqrestore(&rtusb_mem_lock, irqflags);
+					
+					printk("%s():Assign the buf(0x%p, 0x%x, len=%d) to usb_dev(%s)\n", 
+							__FUNCTION__, mem->buf, mem->data_dma, mem->len, udev->product);
+
+					dump_mem_pool();
+					return mem->buf;
+				}
+			}
+		}
+		pool = pool->next;
+	}
+	spin_unlock_irqrestore(&rtusb_mem_lock, irqflags);
+
+	printk("%s():Cannot found buf assign to usb_dev(%s)!\n", __FUNCTION__, udev->product);
+	dump_mem_pool();
+
+	return NULL;
+	
+}
+
+
+int rtusb_resource_exit(void)
+{
+	struct usb_bus *bus;
+	struct rtusb_mem_pool *pool;
+	struct rtusb_bulk_mem *mem;
+	unsigned long irqflags;
+	int status, idx;
+
+	printk("--->%s()\n", __FUNCTION__);
+	dump_mem_pool();
+	
+	status = pool_stat_change(MEM_POOL_INITED, MEM_POOL_STOPING);
+	if (status != 0)
+		return -1;
+
+	//spin_lock_irqsave(&rtusb_mem_lock, irqflags);
+	while(rtusb_buf_pool != NULL) {
+		pool = rtusb_buf_pool;
+		printk("%s():Free Pre-allocated mem for bus(%s)!\n", __FUNCTION__, pool->bus->bus_name);
+		for (idx = 0; idx < pool->pool_cnt; idx++) {
+			mem = (struct rtusb_bulk_mem *)(pool->buf_pool + idx);
+			bus = pool->bus;
+			if (mem->assigned == 1)
+				printk("Warning, mem still occupied by someone?\n");
+			if (mem->buf) {
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)
+				usb_free_coherent(bus->root_hub, mem->len, mem->buf, mem->data_dma);
+#else
+				usb_buffer_free(bus->root_hub, mem->len, mem->buf, mem->data_dma);
+#endif
+#else
+				kfree(mem->buf);
+#endif
+				printk("%s():%d:Free the buf(0x%p) with len(%d)\n", 
+						__FUNCTION__, idx, mem, mem->len);
+			}
+		}
+		rtusb_buf_pool = rtusb_buf_pool->next;
+		kfree(pool);
+	}
+	//spin_unlock_irqrestore(&rtusb_mem_lock, irqflags);
+
+	printk("%s():After free pools, dump it\n", __FUNCTION__);
+	dump_mem_pool();
+	status = pool_stat_change(MEM_POOL_STOPING, MEM_POOL_INVALID);
+	
+	return status;
+}
+
+
+int rtusb_resource_init(int txlen, int rxlen, int tx_cnt, int rx_cnt)
+{
+	struct usb_bus *bus;
+	struct rtusb_mem_pool *pool;
+	struct rtusb_bulk_mem *mem;
+	int status, idx, buf_len, pool_cnt, bus_cnt;
+
+	pool_cnt = tx_cnt + rx_cnt;
+	printk("%s()--->txlen=%d,rxlen=%d, pool_cnt=%d(t:%d,r:%d)!\n", 
+		__FUNCTION__, txlen, rxlen, pool_cnt, tx_cnt,rx_cnt);
+	
+	status = pool_stat_change(MEM_POOL_INVALID, MEM_POOL_INITING);
+	if ((status!=0) || (txlen == 0) || (rxlen == 0) || (tx_cnt == 0) || (rx_cnt == 0))
+		return -1;
+
+	/* 
+		for each bus, we need to allocate resource for it, because we cannot 
+		expect which bus will be used for our dongle.
+	*/
+	bus_cnt = 0;
+	mutex_lock(&usb_bus_list_lock);
+	list_for_each_entry(bus, &usb_bus_list, bus_list) {
+		if (bus->root_hub) {
+			/*  Currently we only alloc memory for high speed bus */
+			if (bus->root_hub->speed != USB_SPEED_HIGH)
+				continue;
+			buf_len = sizeof(struct rtusb_mem_pool) + sizeof(struct rtusb_mem_pool) * pool_cnt;
+			pool = kmalloc(buf_len, GFP_ATOMIC);
+			if (!pool) {
+				printk("%s():Allocate pool structure for bus(%s) failed\n", 
+						__FUNCTION__, bus->bus_name);
+				continue;
+			}
+
+			memset(pool, 0, buf_len);
+			pool->pool_cnt = pool_cnt;
+			pool->bus = bus;
+			pool->dev = bus->controller;
+			pool->buf_pool = (struct rtusb_bulk_mem *)(pool + 1);
+			for (idx = 0; idx < pool_cnt; idx++) {
+				mem = (struct rtusb_bulk_mem *)(pool->buf_pool + idx);
+				buf_len = (idx >= tx_cnt) ? rxlen : txlen;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)
+				mem->buf = usb_alloc_coherent(bus->root_hub, buf_len, GFP_ATOMIC, &mem->data_dma);
+#else
+				mem->buf = usb_buffer_alloc(bus->root_hub, buf_len, GFP_ATOMIC, &mem->data_dma);
+#endif
+#else
+				mem->buf = kmalloc(buf_len, GFP_ATOMIC);
+#endif
+				if (mem->buf)
+					mem->len = buf_len;
+				else
+					printk("%s():Alloc membuf(idx:%d) for bus(%s) failed!\n", 
+							__FUNCTION__, idx, bus->bus_name);
+			}
+
+			if (rtusb_buf_pool)
+				pool->next = rtusb_buf_pool;
+			rtusb_buf_pool = pool;
+			
+			bus_cnt++;
+		}
+	}
+	mutex_unlock(&usb_bus_list_lock);
+
+	status = pool_stat_change(MEM_POOL_INITING, MEM_POOL_INITED);
+	dump_mem_pool();
+	
+	printk("<---%s(%d)\n", __FUNCTION__, status);
+	
+	return status;
+}
+
+#ifdef OS_ABL_SUPPORT
+EXPORT_SYMBOL(rtusb_resource_exit);
+EXPORT_SYMBOL(rtusb_resource_init);
+#endif /* OS_ABL_SUPPORT */
+#endif /* RESOURCE_BOOT_ALLOC */
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
+/*
+========================================================================
+Routine Description:
+	Dump URB information.
+
+Arguments:
+	purb_org		- the URB
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+void dump_urb(VOID *purb_org)
+{
+	struct urb *purb = (struct urb *)purb_org;
+
+	printk("urb                  :0x%08lx\n", (unsigned long)purb);
+	printk("\tdev                   :0x%08lx\n", (unsigned long)purb->dev);
+	printk("\t\tdev->state          :0x%d\n", purb->dev->state);
+	printk("\tpipe                  :0x%08x\n", purb->pipe);
+	printk("\tstatus                :%d\n", purb->status);
+	printk("\ttransfer_flags        :0x%08x\n", purb->transfer_flags);
+	printk("\ttransfer_buffer       :0x%08lx\n", (unsigned long)purb->transfer_buffer);
+	printk("\ttransfer_buffer_length:%d\n", purb->transfer_buffer_length);
+	printk("\tactual_length         :%d\n", purb->actual_length);
+	printk("\tsetup_packet          :0x%08lx\n", (unsigned long)purb->setup_packet);
+	printk("\tstart_frame           :%d\n", purb->start_frame);
+	printk("\tnumber_of_packets     :%d\n", purb->number_of_packets);
+	printk("\tinterval              :%d\n", purb->interval);
+	printk("\terror_count           :%d\n", purb->error_count);
+	printk("\tcontext               :0x%08lx\n", (unsigned long)purb->context);
+	printk("\tcomplete              :0x%08lx\n\n", (unsigned long)purb->complete);
+}
+#else
+void dump_urb(VOID *purb_org)
+{
+	return;
+}
+#endif /* LINUX_VERSION_CODE */
+
+
+
+#ifdef CONFIG_STA_SUPPORT
+#ifdef CONFIG_PM
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND
+
+
+void rausb_autopm_put_interface( void *intf)
+{
+	usb_autopm_put_interface((struct usb_interface *)intf);
+}
+
+int  rausb_autopm_get_interface( void *intf)
+{
+	return usb_autopm_get_interface((struct usb_interface *)intf);
+}
+
+
+
+/*
+========================================================================
+Routine Description:
+	RTMP_Usb_AutoPM_Put_Interface
+
+Arguments:
+	
+
+Return Value:
+	
+
+Note:
+========================================================================
+*/
+
+int RTMP_Usb_AutoPM_Put_Interface (
+	IN	VOID			*pUsb_Devsrc,
+	IN	VOID			*intfsrc)
+{
+
+	INT	 pm_usage_cnt;
+
+struct usb_device		*pUsb_Dev =(struct usb_device *)pUsb_Devsrc;	
+struct usb_interface	*intf =(struct usb_interface *)intfsrc;
+
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)
+		pm_usage_cnt = atomic_read(&intf->pm_usage_cnt);	
+#else
+		pm_usage_cnt = intf->pm_usage_cnt;
+#endif
+
+		if(pm_usage_cnt == 1)
+		{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,33)
+			if(pUsb_Dev->autosuspend_disabled  ==0)
+#else
+			if(pUsb_Dev->auto_pm ==1)
+#endif
+			{
+					rausb_autopm_put_interface(intf);
+			}
+	
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)
+			else
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("STAMlmePeriodicExec: AsicRadioOff  fRTMP_ADAPTER_SUSPEND\n"));
+/*				RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_SUSPEND); */
+/*				RTMP_DRIVER_ADAPTER_SUSPEND_SET(pAd); */
+				return (-1);
+			}
+#endif
+                }
+
+			return 0;
+}
+
+EXPORT_SYMBOL(RTMP_Usb_AutoPM_Put_Interface);
+
+/*
+========================================================================
+Routine Description:
+	RTMP_Usb_AutoPM_Get_Interface
+
+Arguments:
+	
+
+Return Value: (-1)  error (resume fail )    1 success ( resume success)  2  (do  nothing)
+	
+
+Note:
+========================================================================
+*/
+
+int RTMP_Usb_AutoPM_Get_Interface (
+	IN	VOID			*pUsb_Devsrc,
+	IN	VOID			*intfsrc)
+{
+
+	INT	 pm_usage_cnt;
+	struct usb_device		*pUsb_Dev =(struct usb_device *)pUsb_Devsrc;	
+	struct usb_interface	*intf =(struct usb_interface *)intfsrc;
+
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)
+	pm_usage_cnt = (INT)atomic_read(&intf->pm_usage_cnt);	
+#else
+	pm_usage_cnt = intf->pm_usage_cnt;
+#endif
+
+/*	if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_CPU_SUSPEND)) */
+	{
+		if(pm_usage_cnt == 0)
+		{
+			int res=1;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,33)
+		if(pUsb_Dev->autosuspend_disabled  ==0)
+#else
+		if(pUsb_Dev->auto_pm ==1)
+#endif
+			{
+				res = rausb_autopm_get_interface(intf);
+
+/*
+when system  power level from auto to on, auto_pm is 0 and the function radioon will set fRTMP_ADAPTER_SUSPEND
+so we must clear fkag here;
+
+*/				
+/*				RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_SUSPEND); */
+
+				if (res)
+				{
+/*					DBGPRINT(RT_DEBUG_ERROR, ("AsicSwitchChannel autopm_resume fail ------\n")); */
+/*					RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_SUSPEND); */
+					return (-1);
+				}			
+			}
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)
+			else
+			{
+/*				DBGPRINT(RT_DEBUG_TRACE, ("AsicSwitchChannel: fRTMP_ADAPTER_SUSPEND\n")); */
+/*				RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_SUSPEND); */
+				return (-1);
+			}
+#endif
+			return 1;
+		}
+			return 2;
+}
+/*
+	else
+	{
+				DBGPRINT(RT_DEBUG_TRACE, ("AsicSwitchChannel: fRTMP_ADAPTER_CPU_SUSPEND\n"));
+				return;
+	}
+*/
+}
+
+EXPORT_SYMBOL(RTMP_Usb_AutoPM_Get_Interface);
+
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */
+#endif /* CONFIG_PM */
+#endif /* CONFIG_STA_SUPPORT */
+
+
+
+#ifdef OS_ABL_SUPPORT
+/*
+========================================================================
+Routine Description:
+	Register a USB driver.
+
+Arguments:
+	new_driver		- the driver
+
+Return Value:
+	0				- successfully
+	Otherwise		- fail
+
+Note:
+========================================================================
+*/
+int rausb_register(VOID * new_driver)
+{
+	return usb_register((struct usb_driver *)new_driver);
+}
+EXPORT_SYMBOL(rausb_register);
+
+
+/*
+========================================================================
+Routine Description:
+	De-Register a USB driver.
+
+Arguments:
+	new_driver		- the driver
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+void rausb_deregister(VOID * driver)
+{
+	usb_deregister((struct usb_driver *)driver);
+}
+EXPORT_SYMBOL(rausb_deregister);
+
+
+/*
+========================================================================
+Routine Description:
+	Create a new urb for a USB driver to use.
+
+Arguments:
+	iso_packets		- number of iso packets for this urb
+
+Return Value:
+	the URB
+
+Note:
+========================================================================
+*/
+struct urb *rausb_alloc_urb(int iso_packets)
+{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+	return usb_alloc_urb(iso_packets, GFP_ATOMIC);
+#else
+	return usb_alloc_urb(iso_packets);
+#endif /* LINUX_VERSION_CODE */
+}
+EXPORT_SYMBOL(rausb_alloc_urb);
+
+
+/*
+========================================================================
+Routine Description:
+	Free the memory used by a urb.
+
+Arguments:
+	urb				- the URB
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+void rausb_free_urb(VOID *urb)
+{
+	usb_free_urb((struct urb *)urb);
+}
+EXPORT_SYMBOL(rausb_free_urb);
+
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+/*
+========================================================================
+Routine Description:
+	Release a use of the usb device structure.
+
+Arguments:
+	dev				- the USB device
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+void rausb_put_dev(VOID *dev)
+{
+	usb_put_dev((struct usb_device *)dev);
+}
+EXPORT_SYMBOL(rausb_put_dev);
+
+
+/*
+========================================================================
+Routine Description:
+	Increments the reference count of the usb device structure.
+
+Arguments:
+	dev				- the USB device
+
+Return Value:
+	the device with the incremented reference counter
+
+Note:
+========================================================================
+*/
+struct usb_device *rausb_get_dev(VOID *dev)
+{
+	return usb_get_dev((struct usb_device *)dev);
+}
+EXPORT_SYMBOL(rausb_get_dev);
+#endif /* LINUX_VERSION_CODE */
+
+
+/*
+========================================================================
+Routine Description:
+	Issue an asynchronous transfer request for an endpoint.
+
+Arguments:
+	urb				- the URB
+
+Return Value:
+	0				- successfully
+	Otherwise		- fail
+
+Note:
+========================================================================
+*/
+int rausb_submit_urb(VOID *urb)
+{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+	return usb_submit_urb((struct urb *)urb, GFP_ATOMIC);
+#else
+	return usb_submit_urb((struct urb *)urb);
+#endif /* LINUX_VERSION_CODE */
+}
+EXPORT_SYMBOL(rausb_submit_urb);
+
+/*
+========================================================================
+Routine Description:
+	Allocate dma-consistent buffer.
+
+Arguments:
+	dev				- the USB device
+	size			- buffer size
+	dma				- used to return DMA address of buffer
+
+Return Value:
+	a buffer that may be used to perform DMA to the specified device
+
+Note:
+========================================================================
+*/
+void *rausb_buffer_alloc(VOID *dev,
+							size_t size,
+							ra_dma_addr_t *dma)
+{
+#ifdef RESOURCE_BOOT_ALLOC
+	void *buf;
+	if (size > 4095) {
+		buf = rtusb_resource_alloc(dev, size, dma);
+		printk("%s():alloc usb buffer(p:0x%p, dma:0x%x, len:%d) %s!\n", 
+					__FUNCTION__, buf, *dma, size, (buf ? "done" : "fail"));
+		return buf;
+	}
+#endif /* RESOURCE_BOOT_ALLOC */
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+	dma_addr_t DmaAddr = (dma_addr_t)(*dma);
+	void *buf;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)
+	buf = usb_alloc_coherent(dev, size, GFP_ATOMIC, &DmaAddr);
+#else
+	buf = usb_buffer_alloc(dev, size, GFP_ATOMIC, &DmaAddr);
+#endif
+	*dma = (ra_dma_addr_t)DmaAddr;
+	return buf;
+
+#else
+	return kmalloc(size, GFP_ATOMIC);
+#endif
+}
+EXPORT_SYMBOL(rausb_buffer_alloc);
+
+
+/*
+========================================================================
+Routine Description:
+	Free memory allocated with usb_buffer_alloc.
+
+Arguments:
+	dev				- the USB device
+	size			- buffer size
+	addr			- CPU address of buffer
+	dma				- used to return DMA address of buffer
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+void rausb_buffer_free(VOID *dev,
+							size_t size,
+							void *addr,
+							ra_dma_addr_t dma)
+{
+#ifdef RESOURCE_BOOT_ALLOC
+	if (size > 4095)
+		rtusb_resource_recycle(dev, addr, dma);
+	else
+#endif /* RESOURCE_BOOT_ALLOC */
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)
+	usb_free_coherent(dev, size, addr, dma);
+#else
+	usb_buffer_free(dev, size, addr, dma);
+#endif
+#else
+	kfree(addr);
+#endif
+}
+EXPORT_SYMBOL(rausb_buffer_free);
+
+/*
+========================================================================
+Routine Description:
+	Send a control message to a device.
+
+Arguments:
+	dev				- the USB device
+
+Return Value:
+	0				- successfully
+	Otherwise		- fail
+
+Note:
+========================================================================
+*/
+int rausb_control_msg(VOID *dev,
+						unsigned int pipe,
+						__u8 request,
+						__u8 requesttype,
+						__u16 value,
+						__u16 index,
+						void *data,
+						__u16 size,
+						int timeout)
+{
+	int ret;
+
+	ret = usb_control_msg((struct usb_device *)dev, pipe, request, requesttype, value, index,
+							data, size, timeout);
+	if (ret == -ENODEV)
+		return RTMP_USB_CONTROL_MSG_ENODEV;
+	if (ret < 0)
+		return RTMP_USB_CONTROL_MSG_FAIL;
+	return ret;
+}
+EXPORT_SYMBOL(rausb_control_msg);
+
+unsigned int rausb_sndctrlpipe(VOID *dev, ULONG address)
+{
+	return usb_sndctrlpipe(dev, address);
+}
+EXPORT_SYMBOL(rausb_sndctrlpipe);
+
+unsigned int rausb_rcvctrlpipe(VOID *dev, ULONG address)
+{
+	return usb_rcvctrlpipe(dev, address);
+}
+EXPORT_SYMBOL(rausb_rcvctrlpipe);
+
+
+/*
+========================================================================
+Routine Description:
+	Cancel a transfer request and wait for it to finish.
+
+Arguments:
+	urb				- the URB
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+void rausb_kill_urb(VOID *urb)
+{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,7)
+	usb_kill_urb((struct urb *)urb);
+#else
+	usb_unlink_urb((struct urb *)urb);
+#endif /* LINUX_VERSION_CODE */
+}
+EXPORT_SYMBOL(rausb_kill_urb);
+
+#endif /* OS_ABL_SUPPORT */
+
+
+VOID RtmpOsUsbEmptyUrbCheck(
+	IN	VOID				**ppWait,
+	IN	NDIS_SPIN_LOCK		*pBulkInLock,
+	IN	UCHAR				PendingRx)
+{
+	UINT32 i = 0;
+	DECLARE_WAIT_QUEUE_HEAD(unlink_wakeup); 
+	DECLARE_WAITQUEUE(wait, current);
+
+
+	/* ensure there are no more active urbs. */
+	add_wait_queue (&unlink_wakeup, &wait);
+	*ppWait = &unlink_wakeup;
+
+	/* maybe wait for deletions to finish. */
+	i = 0;
+	/*while((i < 25) && atomic_read(&pAd->PendingRx) > 0) */
+	while(i < 25)
+	{
+/*		unsigned long IrqFlags; */
+
+		RTMP_SEM_LOCK(pBulkInLock);
+		if (PendingRx == 0)
+		{
+			RTMP_SEM_UNLOCK(pBulkInLock);
+			break;
+		}
+		RTMP_SEM_UNLOCK(pBulkInLock);
+		
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,9)
+		msleep(UNLINK_TIMEOUT_MS);	/*Time in millisecond */
+#else
+		RTMPusecDelay(UNLINK_TIMEOUT_MS*1000);	/*Time in microsecond */
+#endif
+		i++;
+	}
+	*ppWait = NULL;
+	remove_wait_queue (&unlink_wakeup, &wait); 
+}
+
+
+VOID	RtmpOsUsbInitHTTxDesc(
+	IN	VOID			*pUrbSrc,
+	IN	VOID			*pUsb_Dev,
+	IN	UINT			BulkOutEpAddr,
+	IN	PUCHAR			pSrc,
+	IN	ULONG			BulkOutSize,
+	IN	USB_COMPLETE_HANDLER	Func,
+	IN	VOID			*pTxContext,
+	IN	ra_dma_addr_t		TransferDma)
+{
+	PURB pUrb = (PURB)pUrbSrc;
+
+
+	ASSERT(pUrb);
+
+	/*Initialize a tx bulk urb */
+	RTUSB_FILL_HTTX_BULK_URB(pUrb,
+						pUsb_Dev,
+						BulkOutEpAddr,
+						pSrc,
+						BulkOutSize,
+						(usb_complete_t)Func,
+						pTxContext,
+						TransferDma);
+}
+
+
+VOID	RtmpOsUsbInitRxDesc(
+	IN	VOID			*pUrbSrc,
+	IN	VOID			*pUsb_Dev,
+	IN	UINT			BulkInEpAddr,
+	IN	UCHAR			*pTransferBuffer,
+	IN	UINT32			BufSize,
+	IN	USB_COMPLETE_HANDLER	Func,
+	IN	VOID			*pRxContext,
+	IN	ra_dma_addr_t		TransferDma)
+{
+	PURB pUrb = (PURB)pUrbSrc;
+
+
+	ASSERT(pUrb);
+
+	/*Initialize a rx bulk urb */
+	RTUSB_FILL_RX_BULK_URB(pUrb,
+						pUsb_Dev,
+						BulkInEpAddr,
+						pTransferBuffer,
+						BufSize,
+						(usb_complete_t)Func,
+						pRxContext,
+						TransferDma);
+}
+
+
+VOID *RtmpOsUsbContextGet(
+	IN	VOID			*pUrb)
+{
+	return ((purbb_t)pUrb)->rtusb_urb_context;
+}
+
+
+NTSTATUS RtmpOsUsbStatusGet(
+	IN	VOID			*pUrb)
+{
+	return ((purbb_t)pUrb)->rtusb_urb_status;
+}
+
+
+VOID RtmpOsUsbDmaMapping(
+	IN	VOID			*pUrb)
+{
+	RTUSB_URB_DMA_MAPPING(((purbb_t)pUrb));
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Get the data pointer from the URB.
+
+Arguments:
+	pUrb			- USB URB
+
+Return Value:
+	the data pointer
+
+Note:
+========================================================================
+*/
+VOID *RtmpOsUsbUrbDataGet(
+	IN	VOID					*pUrb)
+{
+	return RTMP_USB_URB_DATA_GET(pUrb);
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Get the status from the URB.
+
+Arguments:
+	pUrb			- USB URB
+
+Return Value:
+	the status
+
+Note:
+========================================================================
+*/
+NTSTATUS RtmpOsUsbUrbStatusGet(
+	IN	VOID					*pUrb)
+{
+	return RTMP_USB_URB_STATUS_GET(pUrb);
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Get the data length from the URB.
+
+Arguments:
+	pUrb			- USB URB
+
+Return Value:
+	the data length
+
+Note:
+========================================================================
+*/
+ULONG RtmpOsUsbUrbLenGet(
+	IN	VOID					*pUrb)
+{
+	return RTMP_USB_URB_LEN_GET(pUrb);
+}
+
+/*
+========================================================================
+Routine Description:
+	Get USB Vendor ID.
+
+Arguments:
+	pUsbDev			- the usb device
+
+Return Value:
+	the name
+
+Note:
+========================================================================
+*/
+UINT32 RtmpOsGetUsbDevVendorID(IN VOID *pUsbDev) {
+	return ((struct usb_device *) pUsbDev)->descriptor.idVendor;
+}
+
+/*
+========================================================================
+Routine Description:
+	Get USB Product ID.
+
+Arguments:
+	pUsbDev			- the usb device
+
+Return Value:
+	the name
+
+Note:
+========================================================================
+*/
+UINT32 RtmpOsGetUsbDevProductID(IN VOID *pUsbDev) {
+	return ((struct usb_device *) pUsbDev)->descriptor.idProduct;
+}
+
+#endif /* RTMP_MAC_USB */
+
+/* End of rt_usb_util.c */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/sta_ioctl.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/sta_ioctl.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/sta_ioctl.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/sta_ioctl.c	2017-09-23 03:42:49.838675614 +0800
@@ -0,0 +1,2526 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#define RTMP_MODULE_OS
+
+#include "rtmp_comm.h"
+#include "rt_os_util.h"
+#include "rt_os_net.h"
+/*#include	"rt_config.h" */
+
+#ifdef DBG
+extern ULONG    RTDebugLevel;
+#endif
+
+#define NR_WEP_KEYS 				4
+#define WEP_SMALL_KEY_LEN 			(40/8)
+#define WEP_LARGE_KEY_LEN 			(104/8)
+
+#define GROUP_KEY_NO                4
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
+#define IWE_STREAM_ADD_EVENT(_A, _B, _C, _D, _E)		iwe_stream_add_event(_A, _B, _C, _D, _E)
+#define IWE_STREAM_ADD_POINT(_A, _B, _C, _D, _E)		iwe_stream_add_point(_A, _B, _C, _D, _E)
+#define IWE_STREAM_ADD_VALUE(_A, _B, _C, _D, _E, _F)	iwe_stream_add_value(_A, _B, _C, _D, _E, _F)
+#else
+#define IWE_STREAM_ADD_EVENT(_A, _B, _C, _D, _E)		iwe_stream_add_event(_B, _C, _D, _E)
+#define IWE_STREAM_ADD_POINT(_A, _B, _C, _D, _E)		iwe_stream_add_point(_B, _C, _D, _E)
+#define IWE_STREAM_ADD_VALUE(_A, _B, _C, _D, _E, _F)	iwe_stream_add_value(_B, _C, _D, _E, _F)
+#endif
+
+extern UCHAR    CipherWpa2Template[];
+
+typedef struct GNU_PACKED _RT_VERSION_INFO{
+    UCHAR       DriverVersionW;
+    UCHAR       DriverVersionX;
+    UCHAR       DriverVersionY;
+    UCHAR       DriverVersionZ;
+    UINT        DriverBuildYear;
+    UINT        DriverBuildMonth;
+    UINT        DriverBuildDay;
+} RT_VERSION_INFO, *PRT_VERSION_INFO;
+
+struct iw_priv_args privtab[] = {
+{ RTPRIV_IOCTL_SET, 
+  IW_PRIV_TYPE_CHAR | 1024, 0,
+  "set"},
+
+{ RTPRIV_IOCTL_SHOW, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK,
+  ""},
+/* --- sub-ioctls definitions --- */   
+    { SHOW_CONN_STATUS,
+	  IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "connStatus" },
+	{ SHOW_DRVIER_VERION,
+	  IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "driverVer" },
+    { SHOW_BA_INFO,
+	  IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "bainfo" },
+	{ SHOW_DESC_INFO,
+	  IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "descinfo" },
+    { RAIO_OFF,
+	  IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "radio_off" },
+	{ RAIO_ON,
+	  IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "radio_on" },
+#ifdef QOS_DLS_SUPPORT
+	{ SHOW_DLS_ENTRY_INFO,
+	  IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "dlsentryinfo" },
+#endif /* QOS_DLS_SUPPORT */
+	{ SHOW_CFG_VALUE,
+	  IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "show" },
+	{ SHOW_ADHOC_ENTRY_INFO,
+	  IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "adhocEntry" },
+/* --- sub-ioctls relations --- */
+
+#ifdef DBG
+{ RTPRIV_IOCTL_BBP,
+  IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK,
+  "bbp"},
+{ RTPRIV_IOCTL_MAC,
+  IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | 1024,
+  "mac"},  
+#ifdef RTMP_RF_RW_SUPPORT
+{ RTPRIV_IOCTL_RF,
+  IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK,
+  "rf"},
+#endif /* RTMP_RF_RW_SUPPORT */
+{ RTPRIV_IOCTL_E2P,
+  IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | 1024,
+  "e2p"},
+#endif  /* DBG */
+
+{ RTPRIV_IOCTL_STATISTICS,
+  0, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK,
+  "stat"}, 
+{ RTPRIV_IOCTL_GSITESURVEY,
+  0, IW_PRIV_TYPE_CHAR | 1024,
+  "get_site_survey"},
+
+};
+
+extern INT32 ralinkrate[];
+extern UINT32 RT_RateSize;
+
+
+
+
+/*
+This is required for LinEX2004/kernel2.6.7 to provide iwlist scanning function
+*/
+
+int
+rt_ioctl_giwname(struct net_device *dev,
+		   struct iw_request_info *info,
+		   char *name, char *extra)
+{
+	strncpy(name, "Ralink STA", IFNAMSIZ);
+	return 0;
+}
+
+int rt_ioctl_siwfreq(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_freq *freq, char *extra)
+{
+	VOID *pAd = NULL;
+/*	int 	chan = -1; */
+	RT_CMD_STA_IOCTL_FREQ IoctlFreq, *pIoctlFreq = &IoctlFreq;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+    /*check if the interface is down */
+/*    if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+    {
+        DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+        return -ENETDOWN;   
+    }
+
+
+	if (freq->e > 1)
+		return -EINVAL;
+
+    
+	pIoctlFreq->m = freq->m;
+	pIoctlFreq->e = freq->e;
+
+	if (RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCSIWFREQ, 0,
+							pIoctlFreq, 0, dev->priv_flags) != NDIS_STATUS_SUCCESS)
+		return -EINVAL;
+
+	return 0;
+}
+
+
+int rt_ioctl_giwfreq(struct net_device *dev,
+		   struct iw_request_info *info,
+		   struct iw_freq *freq, char *extra)
+{
+	VOID *pAd = NULL;
+/*	UCHAR ch; */
+	ULONG	m = 2412000;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+	if (pAd == NULL)
+	{
+		/* if 1st open fail, pAd will be free;
+		   So the net_dev->priv will be NULL in 2rd open */
+		return -ENETDOWN;
+	}
+
+	/*check if the interface is down */
+/*	if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+		return -ENETDOWN;   
+	}
+
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCGIWFREQ, 0,
+						&m, dev->priv_flags, dev->priv_flags);
+
+	freq->m = m * 100;
+	freq->e = 1;
+	freq->i = 0;
+	
+	return 0;
+}
+
+
+int rt_ioctl_siwmode(struct net_device *dev,
+		   struct iw_request_info *info,
+		   __u32 *mode, char *extra)
+{
+	VOID *pAd = NULL;
+	LONG Mode;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+	/*check if the interface is down */
+/*    if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+    {
+    	DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+       	return -ENETDOWN;   
+    }
+
+
+	if (*mode == IW_MODE_ADHOC)
+		Mode = RTMP_CMD_STA_MODE_ADHOC;
+	else if (*mode == IW_MODE_INFRA)
+		Mode = RTMP_CMD_STA_MODE_INFRA;
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,20))
+	else if (*mode == IW_MODE_MONITOR)
+		Mode = RTMP_CMD_STA_MODE_MONITOR;
+#endif /* LINUX_VERSION_CODE */
+	else
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("===>rt_ioctl_siwmode::SIOCSIWMODE (unknown %d)\n", *mode));
+		return -EINVAL;
+	}
+
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCSIWMODE, 0, NULL, Mode, dev->priv_flags);
+	return 0;
+}
+
+
+int rt_ioctl_giwmode(struct net_device *dev,
+		   struct iw_request_info *info,
+		   __u32 *mode, char *extra)
+{
+	VOID *pAd = NULL;
+	ULONG Mode;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+	if (pAd == NULL)
+	{
+		/* if 1st open fail, pAd will be free;
+		   So the net_dev->priv will be NULL in 2rd open */
+		return -ENETDOWN;
+	}
+
+	/*check if the interface is down */
+/*    if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+    {
+        DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+        return -ENETDOWN;   
+    }
+
+
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCGIWMODE, 0, &Mode, 0, dev->priv_flags);
+
+	if (Mode == RTMP_CMD_STA_MODE_ADHOC)
+		*mode = IW_MODE_ADHOC;
+	else if (Mode == RTMP_CMD_STA_MODE_INFRA)
+		*mode = IW_MODE_INFRA;
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,20))
+	else if (Mode == RTMP_CMD_STA_MODE_MONITOR)
+		*mode = IW_MODE_MONITOR;
+#endif /* LINUX_VERSION_CODE */
+	else
+		*mode = IW_MODE_AUTO;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("==>rt_ioctl_giwmode(mode=%d)\n", *mode));
+	return 0;
+}
+
+int rt_ioctl_siwsens(struct net_device *dev,
+		   struct iw_request_info *info,
+		   char *name, char *extra)
+{
+	VOID *pAd = NULL;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+	/*check if the interface is down */
+/*    	if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+    	{
+        	DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+        	return -ENETDOWN;   
+    	}
+
+	return 0;
+}
+
+int rt_ioctl_giwsens(struct net_device *dev,
+		   struct iw_request_info *info,
+		   char *name, char *extra)
+{
+	return 0;
+}
+
+int rt_ioctl_giwrange(struct net_device *dev,
+		   struct iw_request_info *info,
+		   struct iw_point *data, char *extra)
+{
+	VOID *pAd = NULL;
+	struct iw_range *range = (struct iw_range *) extra;
+	u16 val;
+	int i;
+	ULONG Mode, ChannelListNum;
+	UCHAR *pChannel;
+	UINT32 *pFreq;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+	if (pAd == NULL)
+	{
+		/* if 1st open fail, pAd will be free;
+		   So the net_dev->priv will be NULL in 2rd open */
+		return -ENETDOWN;
+	}
+
+#ifndef NATIVE_WPA_SUPPLICANT_SUPPORT
+#ifndef RT_CFG80211_SUPPORT
+/*	if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+	{
+    	DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+    	return -ENETDOWN;   
+	}
+#endif /* RT_CFG80211_SUPPORT */
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+
+	DBGPRINT(RT_DEBUG_TRACE ,("===>rt_ioctl_giwrange\n"));
+	data->length = sizeof(struct iw_range);
+	memset(range, 0, sizeof(struct iw_range));
+
+	range->txpower_capa = IW_TXPOW_DBM;
+
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCGIWMODE, 0, &Mode, 0, dev->priv_flags);
+/*	if (INFRA_ON(pAd)||ADHOC_ON(pAd)) */
+	if ((Mode == RTMP_CMD_STA_MODE_INFRA) || (Mode == RTMP_CMD_STA_MODE_ADHOC))
+	{
+		range->min_pmp = 1 * 1024;
+		range->max_pmp = 65535 * 1024;
+		range->min_pmt = 1 * 1024;
+		range->max_pmt = 1000 * 1024;
+		range->pmp_flags = IW_POWER_PERIOD;
+		range->pmt_flags = IW_POWER_TIMEOUT;
+		range->pm_capa = IW_POWER_PERIOD | IW_POWER_TIMEOUT |
+			IW_POWER_UNICAST_R | IW_POWER_ALL_R;
+	}
+
+	range->we_version_compiled = WIRELESS_EXT;
+	range->we_version_source = 14;
+
+	range->retry_capa = IW_RETRY_LIMIT;
+	range->retry_flags = IW_RETRY_LIMIT;
+	range->min_retry = 0;
+	range->max_retry = 255;
+
+/*	range->num_channels =  pAd->ChannelListNum; */
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_CHAN_LIST_NUM_GET, 0, &ChannelListNum, 0, dev->priv_flags);
+	range->num_channels = ChannelListNum;
+
+	os_alloc_mem(NULL, (UCHAR **)&pChannel, sizeof(UCHAR)*ChannelListNum);
+	if (pChannel == NULL)
+		return -ENOMEM;
+	os_alloc_mem(NULL, (UCHAR **)&pFreq, sizeof(UINT32)*ChannelListNum);
+	if (pFreq == NULL)
+	{
+		os_free_mem(NULL, pChannel);
+		return -ENOMEM;
+	}
+
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_CHAN_LIST_GET, 0, pChannel, 0, dev->priv_flags);
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_FREQ_LIST_GET, 0, pFreq, 0, dev->priv_flags);
+
+	val = 0;
+	for (i = 1; i <= range->num_channels; i++) 
+	{
+/*		u32 m = 2412000; */
+		range->freq[val].i = pChannel[i-1];
+/*		MAP_CHANNEL_ID_TO_KHZ(pAd->ChannelList[i-1].Channel, m); */
+		range->freq[val].m = pFreq[i-1] * 100; /* OS_HZ */
+		
+		range->freq[val].e = 1;
+		val++;
+		if (val == IW_MAX_FREQUENCIES)
+			break;
+	}
+	os_free_mem(NULL, pChannel);
+	os_free_mem(NULL, pFreq);
+
+	range->num_frequency = val;
+
+	range->max_qual.qual = 100; /* what is correct max? This was not
+					* documented exactly. At least
+					* 69 has been observed. */
+	range->max_qual.level = 0; /* dB */
+	range->max_qual.noise = 0; /* dB */
+
+	/* What would be suitable values for "average/typical" qual? */
+	range->avg_qual.qual = 20;
+	range->avg_qual.level = -60;
+	range->avg_qual.noise = -95;
+	range->sensitivity = 3;
+
+	range->max_encoding_tokens = NR_WEP_KEYS;
+	range->num_encoding_sizes = 2;
+	range->encoding_size[0] = 5;
+	range->encoding_size[1] = 13;
+
+	range->min_rts = 0;
+	range->max_rts = 2347;
+	range->min_frag = 256;
+	range->max_frag = 2346;
+
+#if WIRELESS_EXT > 17
+	/* IW_ENC_CAPA_* bit field */
+	range->enc_capa = IW_ENC_CAPA_WPA | IW_ENC_CAPA_WPA2 | 
+					IW_ENC_CAPA_CIPHER_TKIP | IW_ENC_CAPA_CIPHER_CCMP;
+#endif
+
+	return 0;
+}
+
+int rt_ioctl_siwap(struct net_device *dev,
+		      struct iw_request_info *info,
+		      struct sockaddr *ap_addr, char *extra)
+{
+	VOID *pAd = NULL;
+    UCHAR Bssid[6];
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+	/*check if the interface is down */
+/*	if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+	{
+       	DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+       	return -ENETDOWN;   
+    }
+
+
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCSIWAP, 0,
+						(VOID *)(ap_addr->sa_data), 0, dev->priv_flags);
+
+    memcpy(Bssid, ap_addr->sa_data, MAC_ADDR_LEN);
+
+    DBGPRINT(RT_DEBUG_TRACE, ("IOCTL::SIOCSIWAP %02x:%02x:%02x:%02x:%02x:%02x\n",
+        Bssid[0], Bssid[1], Bssid[2], Bssid[3], Bssid[4], Bssid[5]));
+
+	return 0;
+}
+
+int rt_ioctl_giwap(struct net_device *dev,
+		      struct iw_request_info *info,
+		      struct sockaddr *ap_addr, char *extra)
+{
+	VOID *pAd = NULL;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+	if (pAd == NULL)
+	{
+		/* if 1st open fail, pAd will be free;
+		   So the net_dev->priv will be NULL in 2rd open */
+		return -ENETDOWN;
+	}
+
+	/*check if the interface is down */
+/*    if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+    {
+        DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+        return -ENETDOWN;   
+    }
+
+
+	if (RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCGIWAP, 0,
+						(VOID *)(ap_addr->sa_data), 0, dev->priv_flags) != NDIS_STATUS_SUCCESS)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("IOCTL::SIOCGIWAP(=EMPTY)\n"));
+		return -ENOTCONN;
+	}
+	ap_addr->sa_family = ARPHRD_ETHER;
+
+	return 0;
+}
+
+/*
+ * Units are in db above the noise floor. That means the
+ * rssi values reported in the tx/rx descriptors in the
+ * driver are the SNR expressed in db.
+ *
+ * If you assume that the noise floor is -95, which is an
+ * excellent assumption 99.5 % of the time, then you can
+ * derive the absolute signal level (i.e. -95 + rssi). 
+ * There are some other slight factors to take into account
+ * depending on whether the rssi measurement is from 11b,
+ * 11g, or 11a.   These differences are at most 2db and
+ * can be documented.
+ *
+ * NB: various calculations are based on the orinoco/wavelan
+ *     drivers for compatibility
+ */
+static void set_quality(VOID *pAd,
+                        struct iw_quality *iq, 
+						RT_CMD_STA_IOCTL_BSS *pBss)
+/*                        PBSS_ENTRY pBssEntry) */
+{
+
+	iq->qual = pBss->ChannelQuality;
+	iq->level = (__u8)(pBss->Rssi);
+	iq->noise = pBss->Noise;
+
+/*    iq->updated = pAd->iw_stats.qual.updated; */
+/*	iq->updated = ((struct iw_statistics *)(pAd->iw_stats))->qual.updated; */
+	iq->updated = 1;     /* Flags to know if updated */
+
+#if WIRELESS_EXT >= 17
+	iq->updated = IW_QUAL_QUAL_UPDATED | IW_QUAL_LEVEL_UPDATED | IW_QUAL_NOISE_UPDATED;
+#endif
+
+#if WIRELESS_EXT >= 19
+	iq->updated |= IW_QUAL_DBM;	/* Level + Noise are dBm */
+#endif
+}
+
+int rt_ioctl_iwaplist(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_point *data, char *extra)
+{
+ 	VOID *pAd = NULL;	
+
+/*	struct sockaddr addr[IW_MAX_AP]; */
+	struct sockaddr *addr = NULL;
+	struct iw_quality qual[IW_MAX_AP];
+	int i;
+	RT_CMD_STA_IOCTL_BSS_LIST BssList, *pBssList = &BssList;
+	RT_CMD_STA_IOCTL_BSS *pList;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+   	/*check if the interface is down */
+/*    if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+    {
+       	DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+		data->length = 0;
+		return 0;
+        /*return -ENETDOWN; */
+	}
+
+	/* allocate memory */
+	os_alloc_mem(NULL, (UCHAR **)&(pBssList->pList), sizeof(RT_CMD_STA_IOCTL_BSS_LIST) * IW_MAX_AP);
+	if (pBssList->pList == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+		return 0;
+	}
+
+	os_alloc_mem(NULL, (UCHAR **)&addr, sizeof(struct sockaddr) * IW_MAX_AP);
+	if (addr == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+		os_free_mem(NULL, pBssList);
+		return 0;
+	}
+
+	pBssList->MaxNum = IW_MAX_AP;
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_BSS_LIST_GET, 0, pBssList, 0, dev->priv_flags);
+
+	for (i = 0; i <IW_MAX_AP ; i++)
+	{
+		if (i >=  pBssList->BssNum) /*pAd->ScanTab.BssNr) */
+			break;
+		addr[i].sa_family = ARPHRD_ETHER;
+		pList = (pBssList->pList) + i;
+		memcpy(addr[i].sa_data, pList->Bssid, MAC_ADDR_LEN);
+		set_quality(pAd, &qual[i], pList); /*&pAd->ScanTab.BssEntry[i]); */
+	}
+	data->length = i;
+	memcpy(extra, &addr, i*sizeof(addr[0]));
+	data->flags = 1;		/* signal quality present (sort of) */
+	memcpy(extra + i*sizeof(addr[0]), &qual, i*sizeof(qual[i]));
+
+	os_free_mem(NULL, addr);
+	os_free_mem(NULL, pBssList->pList);
+	return 0;
+}
+
+#if defined(SIOCGIWSCAN) || defined(RT_CFG80211_SUPPORT)
+int rt_ioctl_siwscan(struct net_device *dev,
+			struct iw_request_info *info,
+			union iwreq_data *wreq, char *extra)
+{
+	VOID *pAd = NULL;
+	int Status = NDIS_STATUS_SUCCESS;
+	RT_CMD_STA_IOCTL_SCAN IoctlScan, *pIoctlScan = &IoctlScan;
+#ifdef WPA_SUPPLICANT_SUPPORT
+	struct iw_scan_req *req = (struct iw_scan_req *)extra;
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+	/*check if the interface is down */
+/*	if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+		return -ENETDOWN;   
+	}
+
+
+	memset(pIoctlScan, 0, sizeof(RT_CMD_STA_IOCTL_SCAN));
+#ifdef WPA_SUPPLICANT_SUPPORT
+#if WIRELESS_EXT > 17
+	pIoctlScan->FlgScanThisSsid = (wreq->data.length == sizeof(struct iw_scan_req) &&
+									wreq->data.flags & IW_SCAN_THIS_ESSID);
+	pIoctlScan->SsidLen = req->essid_len;
+	pIoctlScan->pSsid = (CHAR *)(req->essid);
+#endif
+#endif /* WPA_SUPPLICANT_SUPPORT */
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCSIWSCAN, 0, pIoctlScan, 0, dev->priv_flags);
+
+	RT_CMD_STATUS_TRANSLATE(pIoctlScan->Status);
+	Status = pIoctlScan->Status;
+	return Status;
+}
+
+int rt_ioctl_giwscan(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_point *data, char *extra)
+{
+	VOID *pAd = NULL;
+	int i=0;
+	PSTRING current_ev = extra, previous_ev = extra;
+	PSTRING end_buf;
+	PSTRING current_val;
+	STRING custom[MAX_CUSTOM_LEN] = {0};
+#ifndef IWEVGENIE
+	unsigned char idx;
+#endif /* IWEVGENIE */
+	struct iw_event iwe;
+	RT_CMD_STA_IOCTL_SCAN_TABLE IoctlScan, *pIoctlScan = &IoctlScan;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+	/*check if the interface is down */
+/*    if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+    {
+       	DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+        return -ENETDOWN;
+	}
+
+#ifdef REFUSE_SCAN_QUERY_WHILE_SCANING
+	if (RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SCAN_SANITY_CHECK, 0,
+							NULL, 0, dev->priv_flags) != NDIS_STATUS_SUCCESS)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("rt_ioctl_giwscan:: Still scanning\n"));
+		return -EAGAIN;
+	}
+#endif /* REFUSE_SCAN_QUERY_WHILE_SCANING */
+
+
+	pIoctlScan->priv_flags = dev->priv_flags;
+	pIoctlScan->pBssTable = NULL;
+	if (RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCGIWSCAN, 0,
+							pIoctlScan, 0, dev->priv_flags) != NDIS_STATUS_SUCCESS)
+	{
+		if (pIoctlScan->pBssTable != NULL)
+			os_free_mem(NULL, pIoctlScan->pBssTable);
+		return -EINVAL;
+	}
+
+
+	if (pIoctlScan->BssNr == 0)
+	{
+		data->length = 0;
+		return 0;
+	}
+	
+#if WIRELESS_EXT >= 17
+    if (data->length > 0)
+        end_buf = extra + data->length;
+    else
+        end_buf = extra + IW_SCAN_MAX_DATA;
+#else
+    end_buf = extra + IW_SCAN_MAX_DATA;
+#endif
+
+	for (i = 0; i < pIoctlScan->BssNr; i++) 
+	{
+		if (current_ev >= end_buf)
+        {
+#if WIRELESS_EXT >= 17
+            return -E2BIG;
+#else
+			break;
+#endif
+        }
+		
+		/*MAC address */
+		/*================================ */
+		memset(&iwe, 0, sizeof(iwe));
+		iwe.cmd = SIOCGIWAP;
+		iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
+				memcpy(iwe.u.ap_addr.sa_data, &pIoctlScan->pBssTable[i].Bssid, ETH_ALEN);
+
+        previous_ev = current_ev;
+		current_ev = IWE_STREAM_ADD_EVENT(info, current_ev,end_buf, &iwe, IW_EV_ADDR_LEN);
+        if (current_ev == previous_ev)
+#if WIRELESS_EXT >= 17
+            return -E2BIG;
+#else
+			break;
+#endif
+
+		/* 
+		Protocol:
+			it will show scanned AP's WirelessMode .
+			it might be
+					802.11a
+					802.11a/n
+					802.11g/n
+					802.11b/g/n
+					802.11g
+					802.11b/g
+		*/
+		memset(&iwe, 0, sizeof(iwe));
+		iwe.cmd = SIOCGIWNAME;
+
+
+	{
+		RT_CMD_STA_IOCTL_BSS_TABLE *pBssEntry=&pIoctlScan->pBssTable[i];
+		BOOLEAN isGonly=FALSE;
+		int rateCnt=0;
+
+		if (pBssEntry->Channel>14)
+		{
+			if (pBssEntry->HtCapabilityLen!=0)
+				strcpy(iwe.u.name,"802.11a/n");
+			else	
+				strcpy(iwe.u.name,"802.11a");
+		}
+		else
+		{
+			/*
+				if one of non B mode rate is set supported rate . it mean G only. 
+			*/
+			for (rateCnt=0;rateCnt<pBssEntry->SupRateLen;rateCnt++)
+			{									
+				/*
+					6Mbps(140) 9Mbps(146) and >=12Mbps(152) are supported rate , it mean G only. 
+				*/
+				if (pBssEntry->SupRate[rateCnt]==140 || pBssEntry->SupRate[rateCnt]==146 || pBssEntry->SupRate[rateCnt]>=152)
+					isGonly=TRUE;
+			}
+
+			for (rateCnt=0;rateCnt<pBssEntry->ExtRateLen;rateCnt++)
+			{
+				if (pBssEntry->ExtRate[rateCnt]==140 || pBssEntry->ExtRate[rateCnt]==146 || pBssEntry->ExtRate[rateCnt]>=152)
+					isGonly=TRUE;
+			}		
+			
+			
+			if (pBssEntry->HtCapabilityLen!=0)
+			{
+				if (isGonly==TRUE)
+					strcpy(iwe.u.name,"802.11g/n");
+				else
+					strcpy(iwe.u.name,"802.11b/g/n");
+			}
+			else
+			{
+				if (isGonly==TRUE)
+					strcpy(iwe.u.name,"802.11g");
+				else
+				{
+					if (pBssEntry->SupRateLen==4 && pBssEntry->ExtRateLen==0)
+						strcpy(iwe.u.name,"802.11b");
+					else
+						strcpy(iwe.u.name,"802.11b/g");		
+				}
+			}
+		}
+	}
+
+		previous_ev = current_ev;
+		current_ev = IWE_STREAM_ADD_EVENT(info, current_ev,end_buf, &iwe, IW_EV_ADDR_LEN);
+		if (current_ev == previous_ev)
+#if WIRELESS_EXT >= 17
+	   		return -E2BIG;
+#else
+			break;
+#endif
+
+		/*ESSID */
+		/*================================ */
+		memset(&iwe, 0, sizeof(iwe));
+		iwe.cmd = SIOCGIWESSID;
+		iwe.u.data.length = pIoctlScan->pBssTable[i].SsidLen;
+		iwe.u.data.flags = 1;
+ 
+        previous_ev = current_ev;
+		current_ev = IWE_STREAM_ADD_POINT(info, current_ev,end_buf, &iwe, (PSTRING) pIoctlScan->pBssTable[i].Ssid);
+        if (current_ev == previous_ev)
+#if WIRELESS_EXT >= 17
+            return -E2BIG;
+#else
+			break;
+#endif
+		
+		/*Network Type */
+		/*================================ */
+		memset(&iwe, 0, sizeof(iwe));
+		iwe.cmd = SIOCGIWMODE;
+		if (pIoctlScan->pBssTable[i].BssType == Ndis802_11IBSS)
+		{
+			iwe.u.mode = IW_MODE_ADHOC;
+		}
+		else if (pIoctlScan->pBssTable[i].BssType == Ndis802_11Infrastructure)
+		{
+			iwe.u.mode = IW_MODE_INFRA;
+		}
+		else
+		{
+			iwe.u.mode = IW_MODE_AUTO;
+		}
+		iwe.len = IW_EV_UINT_LEN;
+
+        previous_ev = current_ev;
+		current_ev = IWE_STREAM_ADD_EVENT(info, current_ev, end_buf, &iwe,  IW_EV_UINT_LEN);
+        if (current_ev == previous_ev)
+#if WIRELESS_EXT >= 17
+            return -E2BIG;
+#else
+			break;
+#endif
+
+		/*Channel and Frequency */
+		/*================================ */
+		memset(&iwe, 0, sizeof(iwe));
+		iwe.cmd = SIOCGIWFREQ;
+		{
+			UCHAR ch = pIoctlScan->pBssTable[i].Channel;
+			ULONG	m = 0;
+/*			MAP_CHANNEL_ID_TO_KHZ(ch, m); */
+			RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_CHID_2_FREQ, 0,
+								(VOID *)&m, ch, dev->priv_flags);
+			iwe.u.freq.m = m * 100;
+			iwe.u.freq.e = 1;
+		iwe.u.freq.i = 0;
+		previous_ev = current_ev;
+		current_ev = IWE_STREAM_ADD_EVENT(info, current_ev,end_buf, &iwe, IW_EV_FREQ_LEN);
+        if (current_ev == previous_ev)
+#if WIRELESS_EXT >= 17
+            return -E2BIG;
+#else
+			break;
+#endif
+		}	    
+
+        /*Add quality statistics */
+        /*================================ */
+        memset(&iwe, 0, sizeof(iwe));
+    	iwe.cmd = IWEVQUAL;
+    	iwe.u.qual.level = 0;
+    	iwe.u.qual.noise = 0;
+		set_quality(pAd, &iwe.u.qual, &pIoctlScan->pBssTable[i].Signal);
+    	current_ev = IWE_STREAM_ADD_EVENT(info, current_ev, end_buf, &iwe, IW_EV_QUAL_LEN);
+	if (current_ev == previous_ev)
+#if WIRELESS_EXT >= 17
+            return -E2BIG;
+#else
+			break;
+#endif
+
+		/*Encyption key */
+		/*================================ */
+		memset(&iwe, 0, sizeof(iwe));
+		iwe.cmd = SIOCGIWENCODE;
+		if (pIoctlScan->pBssTable[i].FlgIsPrivacyOn)
+			iwe.u.data.flags =IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
+		else
+			iwe.u.data.flags = IW_ENCODE_DISABLED;
+
+        previous_ev = current_ev;		
+        current_ev = IWE_STREAM_ADD_POINT(info, current_ev, end_buf,&iwe, (char *)pIoctlScan->MainSharedKey[(iwe.u.data.flags & IW_ENCODE_INDEX)-1]);
+        if (current_ev == previous_ev)
+#if WIRELESS_EXT >= 17
+            return -E2BIG;
+#else
+			break;
+#endif
+
+		/*Bit Rate */
+		/*================================ */
+		if (pIoctlScan->pBssTable[i].SupRateLen)
+        {
+            UCHAR tmpRate = pIoctlScan->pBssTable[i].SupRate[pIoctlScan->pBssTable[i].SupRateLen-1];
+			memset(&iwe, 0, sizeof(iwe));
+			iwe.cmd = SIOCGIWRATE;
+    		current_val = current_ev + IW_EV_LCP_LEN;            
+            if (tmpRate == 0x82)
+                iwe.u.bitrate.value =  1 * 1000000;
+            else if (tmpRate == 0x84)
+                iwe.u.bitrate.value =  2 * 1000000;
+            else if (tmpRate == 0x8B)
+                iwe.u.bitrate.value =  5.5 * 1000000;
+            else if (tmpRate == 0x96)
+                iwe.u.bitrate.value =  11 * 1000000;
+            else
+    		    iwe.u.bitrate.value =  (tmpRate/2) * 1000000;
+            
+			if (pIoctlScan->pBssTable[i].ExtRateLen)
+			{
+				UCHAR tmpSupRate =(pIoctlScan->pBssTable[i].SupRate[pIoctlScan->pBssTable[i].SupRateLen-1]& 0x7f);
+				UCHAR tmpExtRate =(pIoctlScan->pBssTable[i].ExtRate[pIoctlScan->pBssTable[i].ExtRateLen-1]& 0x7f);
+				iwe.u.bitrate.value = (tmpSupRate > tmpExtRate) ? (tmpSupRate)*500000 : (tmpExtRate)*500000;	
+			}
+
+			if (tmpRate == 0x6c && pIoctlScan->pBssTable[i].HtCapabilityLen > 0)
+			{
+				int rate_count = RT_RateSize/sizeof(__s32);
+/*				HT_CAP_INFO capInfo = pIoctlScan->pBssTable[i].HtCapability.HtCapInfo; */
+				int shortGI = pIoctlScan->pBssTable[i].ChannelWidth ? pIoctlScan->pBssTable[i].ShortGIfor40 : pIoctlScan->pBssTable[i].ShortGIfor20;
+				int maxMCS = pIoctlScan->pBssTable[i].MCSSet ?  15 : 7;
+				int rate_index = 12 + ((UCHAR)pIoctlScan->pBssTable[i].ChannelWidth * 24) +
+								((UCHAR)shortGI *48) + ((UCHAR)maxMCS);
+				if (rate_index < 0)
+					rate_index = 0;
+				if (rate_index >= rate_count)
+					rate_index = rate_count-1;
+				iwe.u.bitrate.value	=  ralinkrate[rate_index] * 500000;
+			}
+            
+			iwe.u.bitrate.disabled = 0;
+			current_val = IWE_STREAM_ADD_VALUE(info, current_ev,
+				current_val, end_buf, &iwe,
+    			IW_EV_PARAM_LEN);            
+
+        	if((current_val-current_ev)>IW_EV_LCP_LEN)
+            	current_ev = current_val;
+        	else
+#if WIRELESS_EXT >= 17
+                return -E2BIG;
+#else
+			    break;
+#endif
+        }
+            
+#ifdef IWEVGENIE
+        /*WPA IE */
+		if (pIoctlScan->pBssTable[i].WpaIeLen > 0)
+        {
+			memset(&iwe, 0, sizeof(iwe));
+			memset(&custom[0], 0, MAX_CUSTOM_LEN);
+			memcpy(custom, &(pIoctlScan->pBssTable[i].pWpaIe[0]), 
+						   pIoctlScan->pBssTable[i].WpaIeLen);
+			iwe.cmd = IWEVGENIE;
+			iwe.u.data.length = pIoctlScan->pBssTable[i].WpaIeLen;
+			current_ev = IWE_STREAM_ADD_POINT(info, current_ev, end_buf, &iwe, custom);
+			if (current_ev == previous_ev)
+#if WIRELESS_EXT >= 17
+                return -E2BIG;
+#else
+			    break;
+#endif
+		}
+            
+		/*WPA2 IE */
+        if (pIoctlScan->pBssTable[i].RsnIeLen > 0)
+        {
+        	memset(&iwe, 0, sizeof(iwe));
+			memset(&custom[0], 0, MAX_CUSTOM_LEN);
+			memcpy(custom, &(pIoctlScan->pBssTable[i].pRsnIe[0]), 
+						   pIoctlScan->pBssTable[i].RsnIeLen);
+			iwe.cmd = IWEVGENIE;
+			iwe.u.data.length = pIoctlScan->pBssTable[i].RsnIeLen;
+			current_ev = IWE_STREAM_ADD_POINT(info, current_ev, end_buf, &iwe, custom);
+			if (current_ev == previous_ev)
+#if WIRELESS_EXT >= 17
+                return -E2BIG;
+#else
+			    break;
+#endif
+        }
+
+		/*WPS IE */
+		if (pIoctlScan->pBssTable[i].WpsIeLen > 0)
+        {
+        	memset(&iwe, 0, sizeof(iwe));
+			memset(&custom[0], 0, MAX_CUSTOM_LEN);
+			memcpy(custom, &(pIoctlScan->pBssTable[i].pWpsIe[0]), 
+						   pIoctlScan->pBssTable[i].WpsIeLen);
+			iwe.cmd = IWEVGENIE;
+			iwe.u.data.length = pIoctlScan->pBssTable[i].WpsIeLen;
+			current_ev = IWE_STREAM_ADD_POINT(info, current_ev, end_buf, &iwe, custom);
+			if (current_ev == previous_ev)
+#if WIRELESS_EXT >= 17
+                return -E2BIG;
+#else
+			    break;
+#endif
+        }
+#else
+        /*WPA IE */
+		/*================================ */
+        if (pIoctlScan->pBssTable[i].WpaIeLen > 0)
+        {
+    		NdisZeroMemory(&iwe, sizeof(iwe));
+			memset(&custom[0], 0, MAX_CUSTOM_LEN);
+    		iwe.cmd = IWEVCUSTOM;
+            iwe.u.data.length = (pIoctlScan->pBssTable[i].WpaIeLen * 2) + 7;
+            NdisMoveMemory(custom, "wpa_ie=", 7);
+            for (idx = 0; idx < pIoctlScan->pBssTable[i].WpaIeLen; idx++)
+                sprintf(custom, "%s%02x", custom, pIoctlScan->pBssTable[i].pWpaIe[idx]);
+            previous_ev = current_ev;
+    		current_ev = IWE_STREAM_ADD_POINT(info, current_ev, end_buf, &iwe,  custom);
+            if (current_ev == previous_ev)
+#if WIRELESS_EXT >= 17
+                return -E2BIG;
+#else
+			    break;
+#endif
+        }
+
+        /*WPA2 IE */
+        if (pIoctlScan->pBssTable[i].RsnIeLen > 0)
+        {
+    		NdisZeroMemory(&iwe, sizeof(iwe));
+			memset(&custom[0], 0, MAX_CUSTOM_LEN);
+    		iwe.cmd = IWEVCUSTOM;
+            iwe.u.data.length = (pIoctlScan->pBssTable[i].RsnIeLen * 2) + 7;
+            NdisMoveMemory(custom, "rsn_ie=", 7);
+			for (idx = 0; idx < pIoctlScan->pBssTable[i].RsnIeLen; idx++)
+                sprintf(custom, "%s%02x", custom, pIoctlScan->pBssTable[i].pRsnIe[idx]);
+            previous_ev = current_ev;
+    		current_ev = IWE_STREAM_ADD_POINT(info, current_ev, end_buf, &iwe,  custom);
+            if (current_ev == previous_ev)
+#if WIRELESS_EXT >= 17
+                return -E2BIG;
+#else
+			    break;
+#endif
+        }
+
+
+#endif /* IWEVGENIE */
+	}
+
+	data->length = current_ev - extra;
+/*    pAd->StaCfg.bScanReqIsFromWebUI = FALSE; */
+/*	DBGPRINT(RT_DEBUG_ERROR ,("===>rt_ioctl_giwscan. %d(%d) BSS returned, data->length = %d\n",i , pAd->ScanTab.BssNr, data->length)); */
+
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SCAN_END, 0, NULL, data->length, dev->priv_flags);
+	return 0;
+}
+#endif
+
+int rt_ioctl_siwessid(struct net_device *dev,
+			 struct iw_request_info *info,
+			 struct iw_point *data, char *essid)
+{
+	VOID *pAd = NULL;
+	RT_CMD_STA_IOCTL_SSID IoctlEssid, *pIoctlEssid = &IoctlEssid;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+	/*check if the interface is down */
+/*    if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+    {
+       	DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+       	return -ENETDOWN;   
+    }
+
+	if (data->flags)
+	{
+		/* Includes null character. */
+		if (data->length > (IW_ESSID_MAX_SIZE + 1)) 
+			return -E2BIG;
+	}
+
+
+	pIoctlEssid->FlgAnySsid = data->flags;
+	pIoctlEssid->SsidLen = data->length;
+	pIoctlEssid->pSsid = (CHAR *)essid;
+	pIoctlEssid->Status = 0;
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCSIWESSID, 0, pIoctlEssid, 0, dev->priv_flags);
+
+	RT_CMD_STATUS_TRANSLATE(pIoctlEssid->Status);
+	return pIoctlEssid->Status;
+}
+
+int rt_ioctl_giwessid(struct net_device *dev,
+			 struct iw_request_info *info,
+			 struct iw_point *data, char *essid)
+{
+	VOID *pAd = NULL;
+	RT_CMD_STA_IOCTL_SSID IoctlEssid, *pIoctlEssid = &IoctlEssid;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+	if (pAd == NULL)
+	{
+		/* if 1st open fail, pAd will be free;
+		   So the net_dev->priv will be NULL in 2rd open */
+		return -ENETDOWN;
+	}
+
+	/*check if the interface is down */
+/*    if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+    {
+       	DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+        return -ENETDOWN;
+	}
+
+	data->flags = 1;
+
+
+	pIoctlEssid->pSsid = (CHAR *)essid;
+	pIoctlEssid->Status = 0;
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCGIWESSID, 0, pIoctlEssid, 0, dev->priv_flags);
+	data->length = pIoctlEssid->SsidLen;
+
+	RT_CMD_STATUS_TRANSLATE(pIoctlEssid->Status);
+	return pIoctlEssid->Status;
+}
+
+int rt_ioctl_siwnickn(struct net_device *dev,
+			 struct iw_request_info *info,
+			 struct iw_point *data, char *nickname)
+{
+	VOID *pAd = NULL;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+    /*check if the interface is down */
+/*    if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+    {
+        DBGPRINT(RT_DEBUG_TRACE ,("INFO::Network is down!\n"));
+        return -ENETDOWN;   
+    }
+
+	if (data->length > IW_ESSID_MAX_SIZE)
+		return -EINVAL;
+
+
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCSIWNICKN, 0,
+							nickname, data->length, dev->priv_flags);
+	return 0;
+}
+
+int rt_ioctl_giwnickn(struct net_device *dev,
+			 struct iw_request_info *info,
+			 struct iw_point *data, char *nickname)
+{
+	VOID *pAd = NULL;
+	RT_CMD_STA_IOCTL_NICK_NAME NickName, *pNickName = &NickName;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+	if (pAd == NULL)
+	{
+		/* if 1st open fail, pAd will be free;
+		   So the net_dev->priv will be NULL in 2rd open */
+		return -ENETDOWN;
+	}
+
+	/*check if the interface is down */
+/*    if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+    {
+       	DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+		data->length = 0;
+        return -ENETDOWN;
+	}
+
+
+	pNickName->NameLen = data->length;
+	pNickName->pName = (CHAR *)nickname;
+
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCGIWNICKN, 0,
+							pNickName, 0, dev->priv_flags);
+
+	data->length = pNickName->NameLen;
+	return 0;
+}
+
+int rt_ioctl_siwrts(struct net_device *dev,
+		       struct iw_request_info *info,
+		       struct iw_param *rts, char *extra)
+{
+	VOID *pAd = NULL;
+	u16 val;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+    /*check if the interface is down */
+/*    if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+    {
+        DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+        return -ENETDOWN;   
+    }
+	
+	if (rts->disabled)
+		val = MAX_RTS_THRESHOLD;
+	else if (rts->value < 0 || rts->value > MAX_RTS_THRESHOLD)
+		return -EINVAL;
+	else if (rts->value == 0)
+	    val = MAX_RTS_THRESHOLD;
+	else
+		val = rts->value;
+	
+/*	if (val != pAd->CommonCfg.RtsThreshold) */
+/*		pAd->CommonCfg.RtsThreshold = val; */
+
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCSIWRTS, 0, NULL, val, dev->priv_flags);
+	return 0;
+}
+
+int rt_ioctl_giwrts(struct net_device *dev,
+		       struct iw_request_info *info,
+		       struct iw_param *rts, char *extra)
+{
+	VOID *pAd = NULL;
+	USHORT RtsThreshold;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+	if (pAd == NULL)
+	{
+		/* if 1st open fail, pAd will be free;
+		   So the net_dev->priv will be NULL in 2rd open */
+		return -ENETDOWN;
+	}
+
+	/*check if the interface is down */
+/*    	if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+		if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+    	{
+      		DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+        	return -ENETDOWN;   
+    	}
+
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCGIWRTS, 0,
+						&RtsThreshold, 0, dev->priv_flags);
+	rts->value = RtsThreshold;
+	rts->disabled = (rts->value == MAX_RTS_THRESHOLD);
+	rts->fixed = 1;
+
+	return 0;
+}
+
+int rt_ioctl_siwfrag(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_param *frag, char *extra)
+{
+	VOID *pAd = NULL;
+	u16 val;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+	/*check if the interface is down */
+/*    	if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+		if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+    	{
+      		DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+        	return -ENETDOWN;   
+    	}
+
+	if (frag->disabled)
+		val = MAX_FRAG_THRESHOLD;
+	else if (frag->value >= MIN_FRAG_THRESHOLD || frag->value <= MAX_FRAG_THRESHOLD)
+        val = __cpu_to_le16(frag->value & ~0x1); /* even numbers only */
+	else if (frag->value == 0)
+	    val = MAX_FRAG_THRESHOLD;
+	else
+		return -EINVAL;
+
+/*	pAd->CommonCfg.FragmentThreshold = val; */
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCSIWFRAG, 0, NULL, val, dev->priv_flags);
+	return 0;
+}
+
+int rt_ioctl_giwfrag(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_param *frag, char *extra)
+{
+	VOID *pAd = NULL;
+	USHORT FragmentThreshold;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+	if (pAd == NULL)
+	{
+		/* if 1st open fail, pAd will be free;
+		   So the net_dev->priv will be NULL in 2rd open */
+		return -ENETDOWN;
+	}
+
+	/*check if the interface is down */
+/*    	if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+		if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+    	{
+      		DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+        	return -ENETDOWN;   
+    	}
+		
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCGIWFRAG, 0,
+						&FragmentThreshold, 0, dev->priv_flags);
+	frag->value = FragmentThreshold;
+	frag->disabled = (frag->value == MAX_FRAG_THRESHOLD);
+	frag->fixed = 1;
+
+	return 0;
+}
+
+#define MAX_WEP_KEY_SIZE 13
+#define MIN_WEP_KEY_SIZE 5
+int rt_ioctl_siwencode(struct net_device *dev,
+			  struct iw_request_info *info,
+			  struct iw_point *erq, char *extra)
+{
+	VOID *pAd = NULL;
+	RT_CMD_STA_IOCTL_SECURITY IoctlSec, *pIoctlSec = &IoctlSec;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+	/*check if the interface is down */
+/*    	if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+		if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+    	{
+      		DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+        	return -ENETDOWN;   
+    	}
+
+
+	pIoctlSec->pData = (CHAR *)extra;
+	pIoctlSec->length = erq->length;
+	pIoctlSec->KeyIdx = (erq->flags & IW_ENCODE_INDEX) - 1;
+	pIoctlSec->flags = 0;
+
+	if (erq->flags & IW_ENCODE_DISABLED)
+		pIoctlSec->flags |= RT_CMD_STA_IOCTL_SECURITY_DISABLED;
+	if (erq->flags & IW_ENCODE_RESTRICTED)
+		pIoctlSec->flags |= RT_CMD_STA_IOCTL_SECURITY_RESTRICTED;
+	if (erq->flags & IW_ENCODE_OPEN)
+		pIoctlSec->flags |= RT_CMD_STA_IOCTL_SECURITY_OPEN;
+	if (erq->flags & IW_ENCODE_NOKEY)
+		pIoctlSec->flags |= RT_CMD_STA_IOCTL_SECURITY_NOKEY;
+	if (erq->flags & IW_ENCODE_MODE)
+		pIoctlSec->flags |= RT_CMD_STA_IOCTL_SECURITY_MODE;
+
+	pIoctlSec->Status = 0;
+
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCSIWENCODE, 0,
+						pIoctlSec, 0, dev->priv_flags);
+	RT_CMD_STATUS_TRANSLATE(pIoctlSec->Status);
+	return pIoctlSec->Status;
+}
+
+int
+rt_ioctl_giwencode(struct net_device *dev,
+			  struct iw_request_info *info,
+			  struct iw_point *erq, char *key)
+{
+/*	int kid; */
+	VOID *pAd = NULL;
+	RT_CMD_STA_IOCTL_SECURITY IoctlSec, *pIoctlSec = &IoctlSec;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+	if (pAd == NULL)
+	{
+		/* if 1st open fail, pAd will be free;
+		   So the net_dev->priv will be NULL in 2rd open */
+		return -ENETDOWN;
+	}
+
+	/*check if the interface is down */
+/*	if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+	{
+  		DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+    	return -ENETDOWN;   
+	}
+		
+
+	pIoctlSec->pData = (CHAR *)key;
+	pIoctlSec->KeyIdx = erq->flags & IW_ENCODE_INDEX;
+	pIoctlSec->length = erq->length;
+
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCGIWENCODE, 0,
+						pIoctlSec, 0, dev->priv_flags);
+
+	erq->length = pIoctlSec->length;
+	erq->flags = pIoctlSec->KeyIdx;
+	if (pIoctlSec->flags & RT_CMD_STA_IOCTL_SECURITY_DISABLED)
+		erq->flags = RT_CMD_STA_IOCTL_SECURITY_DISABLED;
+	{
+		if (pIoctlSec->flags & RT_CMD_STA_IOCTL_SECURITY_ENABLED)
+			erq->flags |= IW_ENCODE_ENABLED;
+		if (pIoctlSec->flags & RT_CMD_STA_IOCTL_SECURITY_RESTRICTED)
+			erq->flags |= IW_ENCODE_RESTRICTED;	
+		if (pIoctlSec->flags & RT_CMD_STA_IOCTL_SECURITY_OPEN)
+			erq->flags |= IW_ENCODE_OPEN;
+	}
+	return 0;
+
+}
+
+int rt_ioctl_setparam(struct net_device *dev, struct iw_request_info *info,
+			 void *w, char *extra)
+{
+	VOID *pAd;
+/*	POS_COOKIE pObj; */
+	PSTRING this_char = extra;
+	PSTRING value;
+	int  Status=0;
+	RT_CMD_PARAM_SET CmdParam;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+	if (pAd == NULL)
+	{
+		/* if 1st open fail, pAd will be free;
+		   So the net_dev->priv will be NULL in 2rd open */
+		return -ENETDOWN;
+	}
+
+
+	
+	/*check if the interface is down */
+/*    	if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+		if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+    	{
+#ifdef CONFIG_APSTA_MIXED_SUPPORT
+			if (!*this_char)
+				return -EINVAL;
+	                                                                                                                            
+			if ((value = rtstrchr(this_char, '=')) != NULL)                                                                             
+	    		*value++ = 0;
+	                                                                                                                            
+			if (!value || (strcmp(this_char, "OpMode") != 0))   
+#endif /* CONFIG_APSTA_MIXED_SUPPORT */
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+				return -ENETDOWN;
+			}
+    	}
+	else
+	{
+		if (!*this_char)
+			return -EINVAL;
+	                                                                                                                            
+		if ((value = rtstrchr(this_char, '=')) != NULL)                                                                             
+		    *value++ = 0;
+
+		if (!value && (strcmp(this_char, "SiteSurvey") != 0))
+		    return -EINVAL;
+		else if (!value && (strcmp(this_char, "SiteSurvey") == 0))
+			goto SET_PROC;
+
+		/* reject setting nothing besides ANY ssid(ssidLen=0) */
+		if (!*value && (strcmp(this_char, "SSID") != 0))
+			return -EINVAL; 
+	}
+
+SET_PROC:
+	CmdParam.pThisChar = this_char;
+	CmdParam.pValue = value;
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_PARAM_SET, 0, &CmdParam, 0, dev->priv_flags);
+/*	Status = RTMPSTAPrivIoctlSet(pAd, this_char, value); */
+		
+    return Status;
+}
+
+
+
+static int
+rt_private_get_statistics(struct net_device *dev, struct iw_request_info *info,
+		struct iw_point *wrq, char *extra)
+{
+	INT				Status = 0;
+    VOID   *pAd = NULL;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+	/*check if the interface is down */
+/*    if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+    {
+       	DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+        return -ENETDOWN;
+	}
+
+    if (extra == NULL)
+    {
+        wrq->length = 0;
+        return -EIO;
+    }
+    
+    memset(extra, 0x00, IW_PRIV_SIZE_MASK);
+
+
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_IW_GET_STATISTICS, 0,
+						extra, IW_PRIV_SIZE_MASK, dev->priv_flags);
+
+    wrq->length = strlen(extra) + 1; /* 1: size of '\0' */
+    DBGPRINT(RT_DEBUG_TRACE, ("<== rt_private_get_statistics, wrq->length = %d\n", wrq->length));
+
+    return Status;
+}
+
+
+static int
+rt_private_show(struct net_device *dev, struct iw_request_info *info,
+		struct iw_point *wrq, PSTRING extra)
+{
+	RTMP_IOCTL_INPUT_STRUCT wrqin;
+	INT				Status = 0;
+	VOID   			*pAd;
+/*	POS_COOKIE		pObj; */
+	u32             subcmd = wrq->flags;
+	RT_CMD_STA_IOCTL_SHOW IoctlShow, *pIoctlShow = &IoctlShow;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+	if (pAd == NULL)
+	{
+		/* if 1st open fail, pAd will be free;
+		   So the net_dev->priv will be NULL in 2rd open */
+		return -ENETDOWN;
+	}
+
+	/*check if the interface is down */
+/*    if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+    {
+       	DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+        return -ENETDOWN;
+	}
+
+/*	pObj = (POS_COOKIE) pAd->OS_Cookie; */
+	if (extra == NULL)
+	{
+		wrq->length = 0;
+		return -EIO;
+	}
+	memset(extra, 0x00, IW_PRIV_SIZE_MASK);
+    
+    
+	wrqin.u.data.pointer = wrq->pointer;
+	wrqin.u.data.length = wrq->length;
+
+	pIoctlShow->pData = (CHAR *)extra;
+	pIoctlShow->MaxSize = IW_PRIV_SIZE_MASK;
+	pIoctlShow->InfType = dev->priv_flags;
+	RTMP_STA_IoctlHandle(pAd, &wrqin, CMD_RTPRIV_IOCTL_SHOW, subcmd, pIoctlShow, 0, dev->priv_flags);
+
+	wrq->length = wrqin.u.data.length;
+    return Status;
+}
+
+#ifdef SIOCSIWMLME
+int rt_ioctl_siwmlme(struct net_device *dev,
+			   struct iw_request_info *info,
+			   union iwreq_data *wrqu,
+			   char *extra)
+{
+	VOID   *pAd = NULL;
+	struct iw_mlme *pMlme = (struct iw_mlme *)wrqu->data.pointer;
+/*	MLME_QUEUE_ELEM				MsgElem; */
+/*	MLME_QUEUE_ELEM				*pMsgElem = NULL; */
+/*	MLME_DISASSOC_REQ_STRUCT	DisAssocReq; */
+/*	MLME_DEAUTH_REQ_STRUCT      DeAuthReq; */
+	ULONG Subcmd = 0;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("====> %s\n", __FUNCTION__));
+
+	/*check if the interface is down */
+/*    if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+    {
+       	DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+        return -ENETDOWN;
+	}
+
+	if (pMlme == NULL)
+		return -EINVAL;
+
+
+	switch(pMlme->cmd)
+	{
+#ifdef IW_MLME_DEAUTH	
+		case IW_MLME_DEAUTH:
+			Subcmd = RT_CMD_STA_IOCTL_IW_MLME_DEAUTH;
+			break;
+#endif /* IW_MLME_DEAUTH */
+#ifdef IW_MLME_DISASSOC
+		case IW_MLME_DISASSOC:
+			Subcmd = RT_CMD_STA_IOCTL_IW_MLME_DISASSOC;
+			break;
+#endif /* IW_MLME_DISASSOC */
+		default:
+			DBGPRINT(RT_DEBUG_TRACE, ("====> %s - Unknow Command\n", __FUNCTION__));
+			break;
+	}
+
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCSIWMLME, Subcmd,
+						NULL, pMlme->reason_code, dev->priv_flags);
+	return 0;
+}
+#endif /* SIOCSIWMLME */
+
+#if WIRELESS_EXT > 17
+
+
+int rt_ioctl_siwauth(struct net_device *dev,
+			  struct iw_request_info *info,
+			  union iwreq_data *wrqu, char *extra)
+{
+	VOID   *pAd = NULL;
+	struct iw_param *param = &wrqu->param;
+	RT_CMD_STA_IOCTL_SECURITY_ADV IoctlWpa, *pIoctlWpa = &IoctlWpa;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+    /*check if the interface is down */
+/*	if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+	{
+  		DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+    	return -ENETDOWN;   
+	}
+
+
+	pIoctlWpa->flags = 0;
+	pIoctlWpa->value = param->value; /* default */
+
+	switch (param->flags & IW_AUTH_INDEX) {
+    	case IW_AUTH_WPA_VERSION:
+			pIoctlWpa->flags = RT_CMD_STA_IOCTL_WPA_VERSION;
+            if (param->value == IW_AUTH_WPA_VERSION_WPA)
+				pIoctlWpa->value = RT_CMD_STA_IOCTL_WPA_VERSION1;
+            else if (param->value == IW_AUTH_WPA_VERSION_WPA2)
+				pIoctlWpa->value = RT_CMD_STA_IOCTL_WPA_VERSION2;
+
+            DBGPRINT(RT_DEBUG_TRACE, ("%s::IW_AUTH_WPA_VERSION - param->value = %d!\n", __FUNCTION__, param->value));
+            break;
+    	case IW_AUTH_CIPHER_PAIRWISE:
+			pIoctlWpa->flags = RT_CMD_STA_IOCTL_WPA_PAIRWISE;
+            if (param->value == IW_AUTH_CIPHER_NONE)
+                pIoctlWpa->value = RT_CMD_STA_IOCTL_WPA_PAIRWISE_NONE;
+            else if (param->value == IW_AUTH_CIPHER_WEP40)
+				pIoctlWpa->value = RT_CMD_STA_IOCTL_WPA_PAIRWISE_WEP40;
+            else if (param->value == IW_AUTH_CIPHER_WEP104)
+                pIoctlWpa->value = RT_CMD_STA_IOCTL_WPA_PAIRWISE_WEP104;
+            else if (param->value == IW_AUTH_CIPHER_TKIP)
+                pIoctlWpa->value = RT_CMD_STA_IOCTL_WPA_PAIRWISE_TKIP;
+            else if (param->value == IW_AUTH_CIPHER_CCMP)
+                pIoctlWpa->value = RT_CMD_STA_IOCTL_WPA_PAIRWISE_CCMP;
+            DBGPRINT(RT_DEBUG_TRACE, ("%s::IW_AUTH_CIPHER_PAIRWISE - param->value = %d!\n", __FUNCTION__, param->value));
+            break;
+    	case IW_AUTH_CIPHER_GROUP:
+			pIoctlWpa->flags = RT_CMD_STA_IOCTL_WPA_GROUP;
+            if (param->value == IW_AUTH_CIPHER_NONE)
+				pIoctlWpa->value = RT_CMD_STA_IOCTL_WPA_GROUP_NONE;
+            else if (param->value == IW_AUTH_CIPHER_WEP40)
+				pIoctlWpa->value = RT_CMD_STA_IOCTL_WPA_GROUP_WEP40;
+			else if (param->value == IW_AUTH_CIPHER_WEP104)
+				pIoctlWpa->value = RT_CMD_STA_IOCTL_WPA_GROUP_WEP104;
+            else if (param->value == IW_AUTH_CIPHER_TKIP)
+				pIoctlWpa->value = RT_CMD_STA_IOCTL_WPA_GROUP_TKIP;
+            else if (param->value == IW_AUTH_CIPHER_CCMP)
+				pIoctlWpa->value = RT_CMD_STA_IOCTL_WPA_GROUP_CCMP;
+            DBGPRINT(RT_DEBUG_TRACE, ("%s::IW_AUTH_CIPHER_GROUP - param->value = %d!\n", __FUNCTION__, param->value));
+            break;
+    	case IW_AUTH_KEY_MGMT:
+			pIoctlWpa->flags = RT_CMD_STA_IOCTL_WPA_KEY_MGMT;
+            if (param->value == IW_AUTH_KEY_MGMT_802_1X)
+				pIoctlWpa->value = RT_CMD_STA_IOCTL_WPA_KEY_MGMT_1X;
+            DBGPRINT(RT_DEBUG_TRACE, ("%s::IW_AUTH_KEY_MGMT - param->value = %d!\n", __FUNCTION__, param->value));
+            break;
+    	case IW_AUTH_RX_UNENCRYPTED_EAPOL:
+			pIoctlWpa->flags = RT_CMD_STA_IOCTL_WPA_AUTH_RX_UNENCRYPTED_EAPOL;
+            break;
+    	case IW_AUTH_PRIVACY_INVOKED:
+			pIoctlWpa->flags = RT_CMD_STA_IOCTL_WPA_AUTH_PRIVACY_INVOKED;
+            DBGPRINT(RT_DEBUG_TRACE, ("%s::IW_AUTH_PRIVACY_INVOKED - param->value = %d!\n", __FUNCTION__, param->value));
+    		break;
+    	case IW_AUTH_DROP_UNENCRYPTED:
+			pIoctlWpa->flags = RT_CMD_STA_IOCTL_WPA_AUTH_DROP_UNENCRYPTED;
+            DBGPRINT(RT_DEBUG_TRACE, ("%s::IW_AUTH_DROP_UNENCRYPTED - param->value = %d!\n", __FUNCTION__, param->value));
+    		break;
+    	case IW_AUTH_80211_AUTH_ALG: 
+			pIoctlWpa->flags = RT_CMD_STA_IOCTL_WPA_AUTH_80211_AUTH_ALG;
+			if (param->value & IW_AUTH_ALG_SHARED_KEY) 
+				pIoctlWpa->value = RT_CMD_STA_IOCTL_WPA_AUTH_80211_AUTH_ALG_SHARED;
+            else if (param->value & IW_AUTH_ALG_OPEN_SYSTEM)
+				pIoctlWpa->value = RT_CMD_STA_IOCTL_WPA_AUTH_80211_AUTH_ALG_OPEN;
+            else if (param->value & IW_AUTH_ALG_LEAP)
+				pIoctlWpa->value = RT_CMD_STA_IOCTL_WPA_AUTH_80211_AUTH_ALG_LEAP;
+            DBGPRINT(RT_DEBUG_TRACE, ("%s::IW_AUTH_80211_AUTH_ALG - param->value = %d!\n", __FUNCTION__, param->value));
+			break;
+    	case IW_AUTH_WPA_ENABLED:
+			pIoctlWpa->flags = RT_CMD_STA_IOCTL_WPA_AUTH_WPA_ENABLED;
+    		DBGPRINT(RT_DEBUG_TRACE, ("%s::IW_AUTH_WPA_ENABLED - Driver supports WPA!(param->value = %d)\n", __FUNCTION__, param->value));
+    		break;
+    	default:
+    		return -EOPNOTSUPP;
+}
+
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCSIWAUTH, 0,
+						pIoctlWpa, 0, dev->priv_flags);
+
+	return 0;
+}
+
+int rt_ioctl_giwauth(struct net_device *dev,
+			       struct iw_request_info *info,
+			       union iwreq_data *wrqu, char *extra)
+{
+	VOID   *pAd = NULL;
+	struct iw_param *param = &wrqu->param;
+	RT_CMD_STA_IOCTL_SECURITY_ADV IoctlWpa, *pIoctlWpa = &IoctlWpa;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+    /*check if the interface is down */
+/*	if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+    {
+  		DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+    	return -ENETDOWN;   
+    }
+
+
+	pIoctlWpa->flags = 0;
+	pIoctlWpa->value = 0;
+
+	switch (param->flags & IW_AUTH_INDEX) {
+	case IW_AUTH_DROP_UNENCRYPTED:
+		pIoctlWpa->flags = RT_CMD_STA_IOCTL_WPA_AUTH_DROP_UNENCRYPTED;
+		break;
+
+	case IW_AUTH_80211_AUTH_ALG:
+		pIoctlWpa->flags = RT_CMD_STA_IOCTL_WPA_AUTH_80211_AUTH_ALG;
+		break;
+
+	case IW_AUTH_WPA_ENABLED:
+		pIoctlWpa->flags = RT_CMD_STA_IOCTL_WPA_AUTH_WPA_ENABLED;
+		break;
+
+	default:
+		return -EOPNOTSUPP;
+	}
+
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCGIWAUTH, 0,
+						pIoctlWpa, 0, dev->priv_flags);
+
+	switch (param->flags & IW_AUTH_INDEX) {
+	case IW_AUTH_DROP_UNENCRYPTED:
+		param->value = pIoctlWpa->value;
+		break;
+
+	case IW_AUTH_80211_AUTH_ALG:
+		param->value = (pIoctlWpa->value == 0) ? IW_AUTH_ALG_SHARED_KEY : IW_AUTH_ALG_OPEN_SYSTEM;
+		break;
+
+	case IW_AUTH_WPA_ENABLED:
+		param->value = pIoctlWpa->value;
+		break;
+	}
+
+    DBGPRINT(RT_DEBUG_TRACE, ("rt_ioctl_giwauth::param->value = %d!\n", param->value));
+	return 0;
+}
+
+
+int rt_ioctl_siwencodeext(struct net_device *dev,
+			   struct iw_request_info *info,
+			   union iwreq_data *wrqu,
+			   char *extra)
+{
+	VOID   *pAd = NULL;
+	struct iw_point *encoding = &wrqu->encoding;
+	struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
+    int /* keyIdx, */ alg = ext->alg;
+	RT_CMD_STA_IOCTL_SECURITY IoctlSec, *pIoctlSec = &IoctlSec;
+	
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+	
+    /*check if the interface is down */
+/*	if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+	{
+  		DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+    	return -ENETDOWN;   
+	}
+
+			
+	pIoctlSec->pData = (CHAR *)ext->key;
+	pIoctlSec->length = ext->key_len;
+	pIoctlSec->KeyIdx = (encoding->flags & IW_ENCODE_INDEX) - 1;
+	if (alg == IW_ENCODE_ALG_NONE )
+		pIoctlSec->Alg = RT_CMD_STA_IOCTL_SECURITY_ALG_NONE;
+	else if (alg == IW_ENCODE_ALG_WEP)
+		pIoctlSec->Alg = RT_CMD_STA_IOCTL_SECURITY_ALG_WEP;
+	else if (alg == IW_ENCODE_ALG_TKIP)
+		pIoctlSec->Alg = RT_CMD_STA_IOCTL_SECURITY_ALG_TKIP;
+	else if (alg == IW_ENCODE_ALG_CCMP)
+		pIoctlSec->Alg = RT_CMD_STA_IOCTL_SECURITY_ALG_CCMP;
+	else 
+	{
+		DBGPRINT(RT_DEBUG_WARN, ("Warning: Security type is not supported. (alg = %d) \n", alg));
+		pIoctlSec->Alg = alg;
+		return -EOPNOTSUPP;
+	}
+	pIoctlSec->ext_flags = 0;
+	if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY)
+		pIoctlSec->ext_flags |= RT_CMD_STA_IOCTL_SECURTIY_EXT_SET_TX_KEY;
+	if (ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY)
+		pIoctlSec->ext_flags |= RT_CMD_STA_IOCTL_SECURTIY_EXT_GROUP_KEY;
+	if (encoding->flags & IW_ENCODE_DISABLED)
+		pIoctlSec->flags = RT_CMD_STA_IOCTL_SECURITY_DISABLED;
+	else
+		pIoctlSec->flags = 0;
+
+	if (RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCSIWENCODEEXT, 0,
+						pIoctlSec, 0, dev->priv_flags) != NDIS_STATUS_SUCCESS)
+		return -EINVAL;
+
+    return 0;
+}
+
+int
+rt_ioctl_giwencodeext(struct net_device *dev,
+			  struct iw_request_info *info,
+			  union iwreq_data *wrqu, char *extra)
+{
+	VOID *pAd = NULL;
+/*	PCHAR pKey = NULL; */
+	struct iw_point *encoding = &wrqu->encoding;
+	struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
+	int /* idx, */ max_key_len;
+	RT_CMD_STA_IOCTL_SECURITY IoctlSec, *pIoctlSec = &IoctlSec;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+	DBGPRINT(RT_DEBUG_TRACE ,("===> rt_ioctl_giwencodeext\n"));
+
+	/*check if the interface is down */
+/*    if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+    {
+       	DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+        return -ENETDOWN;
+	}
+
+	max_key_len = encoding->length - sizeof(*ext);
+	if (max_key_len < 0)
+		return -EINVAL;
+	memset(ext, 0, sizeof(*ext));
+
+
+	memset(pIoctlSec, 0, sizeof(RT_CMD_STA_IOCTL_SECURITY));
+	pIoctlSec->KeyIdx = encoding->flags & IW_ENCODE_INDEX;
+	pIoctlSec->MaxKeyLen = max_key_len;
+
+	if (RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCGIWENCODEEXT, 0,
+						pIoctlSec, 0, dev->priv_flags) != NDIS_STATUS_SUCCESS)
+	{
+		ext->key_len = 0;
+		RT_CMD_STATUS_TRANSLATE(pIoctlSec->Status);
+		return pIoctlSec->Status;
+	}
+
+	encoding->flags = pIoctlSec->KeyIdx;
+	ext->key_len = pIoctlSec->length;
+
+	if (pIoctlSec->Alg == RT_CMD_STA_IOCTL_SECURITY_ALG_NONE)
+		ext->alg = IW_ENCODE_ALG_NONE;
+	else if (pIoctlSec->Alg == RT_CMD_STA_IOCTL_SECURITY_ALG_WEP)
+		ext->alg = IW_ENCODE_ALG_WEP;
+	else if (pIoctlSec->Alg == RT_CMD_STA_IOCTL_SECURITY_ALG_TKIP)
+		ext->alg = IW_ENCODE_ALG_TKIP;
+	else if (pIoctlSec->Alg == RT_CMD_STA_IOCTL_SECURITY_ALG_CCMP)
+		ext->alg = IW_ENCODE_ALG_CCMP;
+
+	if (pIoctlSec->flags & RT_CMD_STA_IOCTL_SECURITY_DISABLED)
+		encoding->flags |= IW_ENCODE_DISABLED;
+
+	if (ext->key_len && pIoctlSec->pData)
+	{
+		encoding->flags |= IW_ENCODE_ENABLED;
+		memcpy(ext->key, pIoctlSec->pData, ext->key_len);
+	}
+	
+	return 0;
+}
+
+#ifdef SIOCSIWGENIE
+int rt_ioctl_siwgenie(struct net_device *dev,
+			  struct iw_request_info *info,
+			  union iwreq_data *wrqu, char *extra)
+{
+	VOID   *pAd = NULL;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);	
+	
+	/*check if the interface is down */
+/*    if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+    {
+       	DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+        return -ENETDOWN;
+	}	
+#ifdef WPA_SUPPLICANT_SUPPORT
+
+	if (RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCSIWGENIE, 0,
+						extra, wrqu->data.length, dev->priv_flags) != NDIS_STATUS_SUCCESS)
+		return -EINVAL;
+	else
+		return 0;
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+	return -EOPNOTSUPP;
+}
+#endif /* SIOCSIWGENIE */
+
+int rt_ioctl_giwgenie(struct net_device *dev,
+			       struct iw_request_info *info,
+			       union iwreq_data *wrqu, char *extra)
+{
+	VOID   *pAd = NULL;
+	RT_CMD_STA_IOCTL_RSN_IE IoctlRsnIe, *pIoctlRsnIe = &IoctlRsnIe;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);	
+	
+	/*check if the interface is down */
+/*    if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+    {
+       	DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+        return -ENETDOWN;
+	}
+
+
+	pIoctlRsnIe->length = wrqu->data.length;
+	pIoctlRsnIe->pRsnIe = (UCHAR *)extra;
+
+	if (RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCGIWGENIE, 0,
+						pIoctlRsnIe, 0, dev->priv_flags) != NDIS_STATUS_SUCCESS)
+		return -E2BIG;
+
+	wrqu->data.length = pIoctlRsnIe->length;
+	return 0;
+}
+
+int rt_ioctl_siwpmksa(struct net_device *dev,
+			   struct iw_request_info *info,
+			   union iwreq_data *wrqu,
+			   char *extra)
+{
+	VOID   *pAd = NULL;
+	struct iw_pmksa *pPmksa = (struct iw_pmksa *)wrqu->data.pointer;
+/*	INT	CachedIdx = 0, idx = 0; */
+	RT_CMD_STA_IOCTL_PMA_SA IoctlPmaSa, *pIoctlPmaSa = &IoctlPmaSa;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);	
+
+	/*check if the interface is down */
+/*    if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+    {
+       	DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+        return -ENETDOWN;
+	}
+
+	if (pPmksa == NULL)
+		return -EINVAL;
+
+	DBGPRINT(RT_DEBUG_TRACE ,("===> rt_ioctl_siwpmksa\n"));
+
+
+	if (pPmksa->cmd == IW_PMKSA_FLUSH)
+		pIoctlPmaSa->Cmd = RT_CMD_STA_IOCTL_PMA_SA_FLUSH;
+	else if (pPmksa->cmd == IW_PMKSA_REMOVE)
+		pIoctlPmaSa->Cmd = RT_CMD_STA_IOCTL_PMA_SA_REMOVE;
+	else if (pPmksa->cmd == IW_PMKSA_ADD)
+		pIoctlPmaSa->Cmd = RT_CMD_STA_IOCTL_PMA_SA_ADD;
+	else
+		pIoctlPmaSa->Cmd = 0;
+	pIoctlPmaSa->pBssid = (UCHAR *)pPmksa->bssid.sa_data;
+	pIoctlPmaSa->pPmkid = pPmksa->pmkid;
+
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCSIWPMKSA, 0,
+						pIoctlPmaSa, 0, dev->priv_flags);
+
+	return 0;
+}
+#endif /* #if WIRELESS_EXT > 17 */
+
+#ifdef DBG
+static int
+rt_private_ioctl_bbp(struct net_device *dev, struct iw_request_info *info,
+		struct iw_point *wrq, char *extra)
+{
+	RTMP_IOCTL_INPUT_STRUCT wrqin;
+	INT					Status = 0;
+    VOID       			*pAd = NULL;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);	
+
+
+	memset(extra, 0x00, IW_PRIV_SIZE_MASK);
+
+	wrqin.u.data.pointer = wrq->pointer;
+	wrqin.u.data.length = wrq->length;
+
+	RTMP_STA_IoctlHandle(pAd, &wrqin, CMD_RTPRIV_IOCTL_BBP, 0, extra, IW_PRIV_SIZE_MASK, dev->priv_flags);
+
+	wrq->length = wrqin.u.data.length;
+
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("<==rt_private_ioctl_bbp\n\n"));	
+    
+    return Status;
+}
+#endif /* DBG */
+
+int rt_ioctl_siwrate(struct net_device *dev,
+			struct iw_request_info *info,
+			union iwreq_data *wrqu, char *extra)
+{
+    VOID   *pAd = NULL;
+    UINT32          rate = wrqu->bitrate.value, fixed = wrqu->bitrate.fixed;
+	RT_CMD_RATE_SET CmdRate;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+    /*check if the interface is down */
+/*	if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+	{
+  		DBGPRINT(RT_DEBUG_TRACE, ("rt_ioctl_siwrate::Network is down!\n"));
+    	return -ENETDOWN;   
+	}    
+
+    DBGPRINT(RT_DEBUG_TRACE, ("rt_ioctl_siwrate::(rate = %d, fixed = %d)\n", rate, fixed));
+    /* rate = -1 => auto rate
+       rate = X, fixed = 1 => (fixed rate X)       
+    */
+
+
+	CmdRate.Rate = rate;
+	CmdRate.Fixed = fixed;
+
+	if (RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCSIWRATE, 0,
+							&CmdRate, 0, dev->priv_flags) != NDIS_STATUS_SUCCESS)
+		return -EOPNOTSUPP;
+
+    return 0;
+}
+
+int rt_ioctl_giwrate(struct net_device *dev,
+			       struct iw_request_info *info,
+			       union iwreq_data *wrqu, char *extra)
+{
+    VOID   *pAd = NULL;
+/*    int rate_index = 0, rate_count = 0; */
+/*    HTTRANSMIT_SETTING ht_setting; */
+	ULONG Rate;
+
+	GET_PAD_FROM_NET_DEV(pAd, dev);
+
+    /*check if the interface is down */
+/*	if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+	{
+  		DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+    	return -ENETDOWN;   
+	}
+
+
+	RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCGIWRATE, 0, &Rate, 0, dev->priv_flags);
+	wrqu->bitrate.value = Rate;
+    wrqu->bitrate.disabled = 0;
+
+    return 0;
+}
+
+static const iw_handler rt_handler[] =
+{
+	(iw_handler) NULL,			            /* SIOCSIWCOMMIT */
+	(iw_handler) rt_ioctl_giwname,			/* SIOCGIWNAME   */
+	(iw_handler) NULL,			            /* SIOCSIWNWID   */
+	(iw_handler) NULL,			            /* SIOCGIWNWID   */
+	(iw_handler) rt_ioctl_siwfreq,		    /* SIOCSIWFREQ   */
+	(iw_handler) rt_ioctl_giwfreq,		    /* SIOCGIWFREQ   */
+	(iw_handler) rt_ioctl_siwmode,		    /* SIOCSIWMODE   */
+	(iw_handler) rt_ioctl_giwmode,		    /* SIOCGIWMODE   */
+	(iw_handler) NULL,		                /* SIOCSIWSENS   */
+	(iw_handler) NULL,		                /* SIOCGIWSENS   */
+	(iw_handler) NULL /* not used */,		/* SIOCSIWRANGE  */
+	(iw_handler) rt_ioctl_giwrange,		    /* SIOCGIWRANGE  */
+	(iw_handler) NULL /* not used */,		/* SIOCSIWPRIV   */
+	(iw_handler) NULL /* kernel code */,    /* SIOCGIWPRIV   */
+	(iw_handler) NULL /* not used */,		/* SIOCSIWSTATS  */
+	(iw_handler) rt28xx_get_wireless_stats /* kernel code */,    /* SIOCGIWSTATS  */
+	(iw_handler) NULL,		                /* SIOCSIWSPY    */
+	(iw_handler) NULL,		                /* SIOCGIWSPY    */
+	(iw_handler) NULL,				        /* SIOCSIWTHRSPY */
+	(iw_handler) NULL,				        /* SIOCGIWTHRSPY */
+	(iw_handler) rt_ioctl_siwap,            /* SIOCSIWAP     */
+	(iw_handler) rt_ioctl_giwap,		    /* SIOCGIWAP     */
+#ifdef SIOCSIWMLME
+	(iw_handler) rt_ioctl_siwmlme,	        /* SIOCSIWMLME   */
+#else
+	(iw_handler) NULL,				        /* SIOCSIWMLME */
+#endif /* SIOCSIWMLME */
+	(iw_handler) rt_ioctl_iwaplist,		    /* SIOCGIWAPLIST */
+#ifdef SIOCGIWSCAN
+	(iw_handler) rt_ioctl_siwscan,		    /* SIOCSIWSCAN   */
+	(iw_handler) rt_ioctl_giwscan,		    /* SIOCGIWSCAN   */
+#else
+	(iw_handler) NULL,				        /* SIOCSIWSCAN   */
+	(iw_handler) NULL,				        /* SIOCGIWSCAN   */
+#endif /* SIOCGIWSCAN */
+	(iw_handler) rt_ioctl_siwessid,		    /* SIOCSIWESSID  */
+	(iw_handler) rt_ioctl_giwessid,		    /* SIOCGIWESSID  */
+	(iw_handler) rt_ioctl_siwnickn,		    /* SIOCSIWNICKN  */
+	(iw_handler) rt_ioctl_giwnickn,		    /* SIOCGIWNICKN  */
+	(iw_handler) NULL,				        /* -- hole --    */
+	(iw_handler) NULL,				        /* -- hole --    */
+	(iw_handler) rt_ioctl_siwrate,          /* SIOCSIWRATE   */
+	(iw_handler) rt_ioctl_giwrate,          /* SIOCGIWRATE   */
+	(iw_handler) rt_ioctl_siwrts,		    /* SIOCSIWRTS    */
+	(iw_handler) rt_ioctl_giwrts,		    /* SIOCGIWRTS    */
+	(iw_handler) rt_ioctl_siwfrag,		    /* SIOCSIWFRAG   */
+	(iw_handler) rt_ioctl_giwfrag,		    /* SIOCGIWFRAG   */
+	(iw_handler) NULL,		                /* SIOCSIWTXPOW  */
+	(iw_handler) NULL,		                /* SIOCGIWTXPOW  */
+	(iw_handler) NULL,		                /* SIOCSIWRETRY  */
+	(iw_handler) NULL,		                /* SIOCGIWRETRY  */
+	(iw_handler) rt_ioctl_siwencode,		/* SIOCSIWENCODE */
+	(iw_handler) rt_ioctl_giwencode,		/* SIOCGIWENCODE */
+	(iw_handler) NULL,		                /* SIOCSIWPOWER  */
+	(iw_handler) NULL,		                /* SIOCGIWPOWER  */
+	(iw_handler) NULL,						/* -- hole -- */	
+	(iw_handler) NULL,						/* -- hole -- */
+#if WIRELESS_EXT > 17	
+    (iw_handler) rt_ioctl_siwgenie,         /* SIOCSIWGENIE  */
+	(iw_handler) rt_ioctl_giwgenie,         /* SIOCGIWGENIE  */
+	(iw_handler) rt_ioctl_siwauth,		    /* SIOCSIWAUTH   */
+	(iw_handler) rt_ioctl_giwauth,		    /* SIOCGIWAUTH   */
+	(iw_handler) rt_ioctl_siwencodeext,	    /* SIOCSIWENCODEEXT */
+	(iw_handler) rt_ioctl_giwencodeext,		/* SIOCGIWENCODEEXT */
+	(iw_handler) rt_ioctl_siwpmksa,         /* SIOCSIWPMKSA  */
+#endif
+};
+
+static const iw_handler rt_priv_handlers[] = {
+	(iw_handler) NULL, /* + 0x00 */
+	(iw_handler) NULL, /* + 0x01 */
+	(iw_handler) rt_ioctl_setparam, /* + 0x02 */
+#ifdef DBG	
+	(iw_handler) rt_private_ioctl_bbp, /* + 0x03 */	
+#else
+	(iw_handler) NULL, /* + 0x03 */
+#endif
+	(iw_handler) NULL, /* + 0x04 */
+	(iw_handler) NULL, /* + 0x05 */
+	(iw_handler) NULL, /* + 0x06 */
+	(iw_handler) NULL, /* + 0x07 */
+	(iw_handler) NULL, /* + 0x08 */
+	(iw_handler) rt_private_get_statistics, /* + 0x09 */
+	(iw_handler) NULL, /* + 0x0A */
+	(iw_handler) NULL, /* + 0x0B */
+	(iw_handler) NULL, /* + 0x0C */
+	(iw_handler) NULL, /* + 0x0D */
+	(iw_handler) NULL, /* + 0x0E */
+	(iw_handler) NULL, /* + 0x0F */
+	(iw_handler) NULL, /* + 0x10 */
+	(iw_handler) rt_private_show, /* + 0x11 */
+    (iw_handler) NULL, /* + 0x12 */
+	(iw_handler) NULL, /* + 0x13 */
+    (iw_handler) NULL, /* + 0x14 */
+	(iw_handler) NULL, /* + 0x15 */
+    (iw_handler) NULL, /* + 0x16 */
+	(iw_handler) NULL, /* + 0x17 */
+	(iw_handler) NULL, /* + 0x18 */
+};
+
+const struct iw_handler_def rt28xx_iw_handler_def =
+{
+#define	N(a)	(sizeof (a) / sizeof (a[0]))
+	.standard	= (iw_handler *) rt_handler,
+	.num_standard	= sizeof(rt_handler) / sizeof(iw_handler),
+	.private	= (iw_handler *) rt_priv_handlers,
+	.num_private		= N(rt_priv_handlers),
+	.private_args	= (struct iw_priv_args *) privtab,
+	.num_private_args	= N(privtab),
+#if IW_HANDLER_VERSION >= 7
+    .get_wireless_stats = rt28xx_get_wireless_stats,
+#endif 
+};
+
+
+INT rt28xx_sta_ioctl(
+	IN	struct net_device	*net_dev, 
+	IN	OUT	struct ifreq	*rq, 
+	IN	INT					cmd)
+{
+/*	POS_COOKIE			pObj; */
+	VOID        		*pAd = NULL;
+	struct iwreq        *wrqin = (struct iwreq *) rq;
+	RTMP_IOCTL_INPUT_STRUCT rt_wrq, *wrq = &rt_wrq;
+/*	BOOLEAN				StateMachineTouched = FALSE; */
+	INT					Status = NDIS_STATUS_SUCCESS;
+	USHORT				subcmd;
+	UINT32				org_len;
+
+	GET_PAD_FROM_NET_DEV(pAd, net_dev);
+
+	if (pAd == NULL)
+	{
+		/* if 1st open fail, pAd will be free;
+		   So the net_dev->priv will be NULL in 2rd open */
+		return -ENETDOWN;
+	}
+
+	wrq->u.data.pointer = wrqin->u.data.pointer;
+	wrq->u.data.length = wrqin->u.data.length;
+	org_len = wrq->u.data.length;
+
+/*	pObj = (POS_COOKIE) pAd->OS_Cookie; */
+	
+    /*check if the interface is down */
+/*    if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) */
+	if (RTMP_DRIVER_IOCTL_SANITY_CHECK(pAd) != NDIS_STATUS_SUCCESS)
+    {
+#ifdef CONFIG_APSTA_MIXED_SUPPORT
+	    if (wrqin->u.data.pointer == NULL)
+	    {
+		    return Status;
+	    }
+
+		if (cmd == RTPRIV_IOCTL_SET)
+		{
+	    if (strstr(wrqin->u.data.pointer, "OpMode") == NULL)
+				return -ENETDOWN;
+		}
+		else
+#endif /* CONFIG_APSTA_MIXED_SUPPORT */
+		{
+            DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
+		    return -ENETDOWN;  
+        }
+    }
+
+
+
+	switch(cmd)
+	{			
+#ifdef RALINK_ATE
+#ifdef RALINK_QA
+		case RTPRIV_IOCTL_ATE:
+			{
+				/*
+					ATE is always controlled by ra0
+				*/
+				RTMP_COM_IoctlHandle(pAd, wrq, CMD_RTPRIV_IOCTL_ATE, 0, wrqin->ifr_name, 0);
+			}
+			break;
+#endif /* RALINK_QA */ 
+#endif /* RALINK_ATE */
+        case SIOCGIFHWADDR:
+			DBGPRINT(RT_DEBUG_TRACE, ("IOCTL::SIOCGIFHWADDR\n"));
+/*			memcpy(wrqin->u.name, pAd->CurrentAddress, ETH_ALEN); */
+			RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCGIFHWADDR,
+								0, wrqin->u.name, 0, net_dev->priv_flags);
+			break;	
+		case SIOCGIWNAME:
+        {
+        	char *name=&wrqin->u.name[0];
+        	rt_ioctl_giwname(net_dev, NULL, name, NULL);
+            break;
+		}
+		case SIOCGIWESSID:  /*Get ESSID */
+        {
+        	struct iw_point *essid=&wrqin->u.essid;
+        	rt_ioctl_giwessid(net_dev, NULL, essid, essid->pointer);
+            break;
+		}
+		case SIOCSIWESSID:  /*Set ESSID */
+        	{
+        	struct iw_point	*essid=&wrqin->u.essid;
+        	rt_ioctl_siwessid(net_dev, NULL, essid, essid->pointer);
+            break;  
+		}
+		case SIOCSIWNWID:   /* set network id (the cell) */
+		case SIOCGIWNWID:   /* get network id */
+			Status = -EOPNOTSUPP;
+			break;
+		case SIOCSIWFREQ:   /*set channel/frequency (Hz) */
+        	{
+        	struct iw_freq *freq=&wrqin->u.freq;
+        	rt_ioctl_siwfreq(net_dev, NULL, freq, NULL);
+			break;
+		}
+		case SIOCGIWFREQ:   /* get channel/frequency (Hz) */
+        	{
+        	struct iw_freq *freq=&wrqin->u.freq;
+        	rt_ioctl_giwfreq(net_dev, NULL, freq, NULL);
+			break;
+		}
+		case SIOCSIWNICKN: /*set node name/nickname */
+        	{
+        	/*struct iw_point *data=&wrq->u.data; */
+        	/*rt_ioctl_siwnickn(net_dev, NULL, data, NULL); */
+			break;
+			}
+		case SIOCGIWNICKN: /*get node name/nickname */
+        {
+			RT_CMD_STA_IOCTL_NICK_NAME NickName, *pNickName = &NickName;
+			CHAR nickname[IW_ESSID_MAX_SIZE+1];
+			struct iw_point	*erq = NULL;
+        	erq = &wrqin->u.data;
+
+			pNickName->NameLen = IW_ESSID_MAX_SIZE+1;
+			pNickName->pName = (CHAR *)nickname;
+			RTMP_STA_IoctlHandle(pAd, NULL, CMD_RTPRIV_IOCTL_STA_SIOCGIWNICKN, 0,
+							pNickName, 0, net_dev->priv_flags);
+
+            erq->length = pNickName->NameLen; /*strlen((PSTRING) pAd->nickname); */
+            Status = copy_to_user(erq->pointer, nickname, erq->length);
+			break;
+		}
+		case SIOCGIWRATE:   /*get default bit rate (bps) */
+		    rt_ioctl_giwrate(net_dev, NULL, &wrqin->u, NULL);
+            break;
+	    case SIOCSIWRATE:  /*set default bit rate (bps) */
+	        rt_ioctl_siwrate(net_dev, NULL, &wrqin->u, NULL);
+            break;
+        case SIOCGIWRTS:  /* get RTS/CTS threshold (bytes) */
+        	{
+        	struct iw_param *rts=&wrqin->u.rts;
+        	rt_ioctl_giwrts(net_dev, NULL, rts, NULL);
+            break;
+		}
+        case SIOCSIWRTS:  /*set RTS/CTS threshold (bytes) */
+        	{
+        	struct iw_param *rts=&wrqin->u.rts;
+        	rt_ioctl_siwrts(net_dev, NULL, rts, NULL);
+            break;
+		}
+        case SIOCGIWFRAG:  /*get fragmentation thr (bytes) */
+        	{
+        	struct iw_param *frag=&wrqin->u.frag;
+        	rt_ioctl_giwfrag(net_dev, NULL, frag, NULL);
+            break;
+		}
+        case SIOCSIWFRAG:  /*set fragmentation thr (bytes) */
+        	{
+        	struct iw_param *frag=&wrqin->u.frag;
+        	rt_ioctl_siwfrag(net_dev, NULL, frag, NULL);
+            break;
+		}
+        case SIOCGIWENCODE:  /*get encoding token & mode */
+        	{
+        	struct iw_point *erq=&wrqin->u.encoding;
+        	if(erq)
+        		rt_ioctl_giwencode(net_dev, NULL, erq, erq->pointer);
+            break;
+		}
+        case SIOCSIWENCODE:  /*set encoding token & mode */
+        	{
+        	struct iw_point *erq=&wrqin->u.encoding;
+        	if(erq)
+        		rt_ioctl_siwencode(net_dev, NULL, erq, erq->pointer);
+            break;
+		}
+		case SIOCGIWAP:     /*get access point MAC addresses */
+        	{
+        	struct sockaddr *ap_addr=&wrqin->u.ap_addr;
+        	rt_ioctl_giwap(net_dev, NULL, ap_addr, ap_addr->sa_data);
+			break;
+		}
+	    case SIOCSIWAP:  /*set access point MAC addresses */
+        	{
+        	struct sockaddr *ap_addr=&wrqin->u.ap_addr;
+        	rt_ioctl_siwap(net_dev, NULL, ap_addr, ap_addr->sa_data);
+            break;
+		}
+		case SIOCGIWMODE:   /*get operation mode */
+        	{
+        	__u32 *mode=&wrqin->u.mode;
+        	rt_ioctl_giwmode(net_dev, NULL, mode, NULL);
+            break;
+		}
+		case SIOCSIWMODE:   /*set operation mode */
+        	{
+        	__u32 *mode=&wrqin->u.mode;
+        	rt_ioctl_siwmode(net_dev, NULL, mode, NULL);
+            break;
+		}
+		case SIOCGIWSENS:   /*get sensitivity (dBm) */
+		case SIOCSIWSENS:	/*set sensitivity (dBm) */
+		case SIOCGIWPOWER:  /*get Power Management settings */
+		case SIOCSIWPOWER:  /*set Power Management settings */
+		case SIOCGIWTXPOW:  /*get transmit power (dBm) */
+		case SIOCSIWTXPOW:  /*set transmit power (dBm) */
+		case SIOCGIWRANGE:	/*Get range of parameters */
+		case SIOCGIWRETRY:	/*get retry limits and lifetime */
+		case SIOCSIWRETRY:	/*set retry limits and lifetime */
+			Status = -EOPNOTSUPP;
+			break;
+
+		case RT_PRIV_IOCTL:
+        case RT_PRIV_IOCTL_EXT:
+			subcmd = wrqin->u.data.flags;
+
+			Status = RTMP_STA_IoctlHandle(pAd, wrq, CMD_RT_PRIV_IOCTL, subcmd, NULL, 0, net_dev->priv_flags);
+			break;		
+		case SIOCGIWPRIV:
+			if (wrqin->u.data.pointer) 
+			{
+				if ( access_ok(VERIFY_WRITE, wrqin->u.data.pointer, sizeof(privtab)) != TRUE)
+					break;
+				if ((sizeof(privtab) / sizeof(privtab[0])) <= wrq->u.data.length)
+				{
+					wrqin->u.data.length = sizeof(privtab) / sizeof(privtab[0]);
+					if (copy_to_user(wrqin->u.data.pointer, privtab, sizeof(privtab)))
+						Status = -EFAULT;
+				}
+				else
+					Status = -E2BIG;
+			}
+			break;
+		case RTPRIV_IOCTL_SET:
+			if(access_ok(VERIFY_READ, wrqin->u.data.pointer, wrqin->u.data.length) != TRUE)   
+					break;
+			rt_ioctl_setparam(net_dev, NULL, NULL, wrqin->u.data.pointer);
+			break;
+		case RTPRIV_IOCTL_GSITESURVEY:
+			RTMP_STA_IoctlHandle(pAd, wrq, CMD_RTPRIV_IOCTL_SITESURVEY_GET, 0, NULL, 0, net_dev->priv_flags);
+/*			RTMPIoctlGetSiteSurvey(pAd, wrq); */
+		    break;			
+#ifdef DBG
+		case RTPRIV_IOCTL_MAC:
+			RTMP_STA_IoctlHandle(pAd, wrq, CMD_RTPRIV_IOCTL_MAC, 0, NULL, 0, net_dev->priv_flags);
+/*			RTMPIoctlMAC(pAd, wrq); */
+			break;
+		case RTPRIV_IOCTL_E2P:
+			RTMP_STA_IoctlHandle(pAd, wrq, CMD_RTPRIV_IOCTL_E2P, 0, NULL, 0, net_dev->priv_flags);
+/*			RTMPIoctlE2PROM(pAd, wrq); */
+			break;
+#ifdef RTMP_RF_RW_SUPPORT
+		case RTPRIV_IOCTL_RF:
+			RTMP_STA_IoctlHandle(pAd, wrq, CMD_RTPRIV_IOCTL_RF, 0, NULL, 0, net_dev->priv_flags);
+/*			RTMPIoctlRF(pAd, wrq); */
+			break;
+#endif /* RTMP_RF_RW_SUPPORT */
+#endif /* DBG */
+
+        case SIOCETHTOOL:
+                break;
+		default:
+			DBGPRINT(RT_DEBUG_ERROR, ("IOCTL::unknown IOCTL's cmd = 0x%08x\n", cmd));
+			Status = -EOPNOTSUPP;
+			break;
+	}
+
+/*    if(StateMachineTouched) // Upper layer sent a MLME-related operations */
+/*    	RTMP_MLME_HANDLER(pAd); */
+
+	if (Status != 0)
+	{
+		RT_CMD_STATUS_TRANSLATE(Status);
+	}
+	else
+	{
+		/*
+			If wrq length is modified, we reset the lenght of origin wrq;
+
+			Or we can not modify it because the address of wrq->u.data.length
+			maybe same as other union field, ex: iw_range, etc.
+
+			if the length is not changed but we change it, the value for other
+			union will also be changed, this is not correct.
+		*/
+		if (wrq->u.data.length != org_len)
+			wrqin->u.data.length = wrq->u.data.length;
+	}
+
+	return Status;
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/usb_main_dev.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/usb_main_dev.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/usb_main_dev.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/usb_main_dev.c	2017-09-23 03:42:49.838675614 +0800
@@ -0,0 +1,813 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#define RTMP_MODULE_OS
+
+/*#include "rt_config.h" */
+#include "rtmp_comm.h"
+#include "rt_os_util.h"
+#include "rt_os_net.h"
+
+
+/* Following information will be show when you run 'modinfo' */
+/* *** If you have a solution for the bug in current version of driver, please mail to me. */
+/* Otherwise post to forum in ralinktech's web site(www.ralinktech.com) and let all users help you. *** */
+MODULE_AUTHOR("Paul Lin <paul_lin@ralinktech.com>");
+MODULE_DESCRIPTION("RT2870 Wireless Lan Linux Driver");
+MODULE_LICENSE("GPL");
+#ifdef CONFIG_STA_SUPPORT
+#ifdef MODULE_VERSION
+MODULE_VERSION(STA_DRIVER_VERSION);
+#endif
+#endif /* CONFIG_STA_SUPPORT */
+
+
+extern USB_DEVICE_ID rtusb_dev_id[];
+extern INT const rtusb_usb_id_len;
+
+static void rt2870_disconnect(
+	IN struct usb_device *dev, 
+	IN VOID *pAd);
+
+static int rt2870_probe(
+	IN struct usb_interface *intf,
+	IN struct usb_device *usb_dev,
+	IN const USB_DEVICE_ID *dev_id,
+	IN VOID **ppAd);
+
+#ifndef PF_NOFREEZE
+#define PF_NOFREEZE  0
+#endif
+
+
+/*extern int rt28xx_close(IN struct net_device *net_dev); */
+/*extern int rt28xx_open(struct net_device *net_dev); */
+
+static BOOLEAN USBDevConfigInit(
+	IN struct usb_device 	*dev,
+	IN struct usb_interface *intf, 
+	IN VOID					*pAd);
+	
+
+VOID RT28XXVendorSpecificCheck(
+	IN struct usb_device 	*dev,
+	IN VOID 				*pAd)
+{
+
+
+	RT_CMD_USB_MORE_FLAG_CONFIG Config = { dev->descriptor.idVendor,
+										dev->descriptor.idProduct };
+	RTMP_DRIVER_USB_MORE_FLAG_SET(pAd, &Config);
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
+
+/**************************************************************************/
+/**************************************************************************/
+/*tested for kernel 2.4 series */
+/**************************************************************************/
+/**************************************************************************/
+static void *rtusb_probe(struct usb_device *dev, UINT interface,
+						const USB_DEVICE_ID *id_table);
+static void rtusb_disconnect(struct usb_device *dev, void *ptr);
+
+struct usb_driver rtusb_driver = {
+		name:RTMP_DRV_NAME,
+		probe:rtusb_probe,
+		disconnect:rtusb_disconnect,
+		id_table:rtusb_dev_id,
+	};
+
+
+static BOOLEAN USBDevConfigInit(
+	IN struct usb_device 	*dev,
+	IN struct usb_interface *intf, 
+	IN VOID					*pAd)
+{
+	struct usb_interface_descriptor *iface_desc;
+	struct usb_endpoint_descriptor *endpoint;
+	ULONG BulkOutIdx;
+	UINT32 i;
+	RT_CMD_USB_DEV_CONFIG Config, *pConfig = &Config;
+
+
+	iface_desc = &intf->altsetting[0];
+
+	/* get # of enpoints */
+	pConfig->NumberOfPipes = iface_desc->bNumEndpoints;
+	DBGPRINT(RT_DEBUG_TRACE, ("NumEndpoints=%d\n", iface_desc->bNumEndpoints));		 
+
+	/* Configure Pipes */
+	endpoint = &iface_desc->endpoint[0];
+	BulkOutIdx = 0;
+
+	for(i=0; i<pConfig->NumberOfPipes; i++)
+	{
+		if ((endpoint[i].bmAttributes == USB_ENDPOINT_XFER_BULK) && 
+			((endpoint[i].bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN))
+		{
+			pConfig->BulkInEpAddr = endpoint[i].bEndpointAddress;
+			pConfig->BulkInMaxPacketSize = endpoint[i].wMaxPacketSize;
+
+			DBGPRINT_RAW(RT_DEBUG_TRACE, ("BULK IN MaximumPacketSize = %d\n", pConfig->BulkInMaxPacketSize));
+			DBGPRINT_RAW(RT_DEBUG_TRACE, ("EP address = 0x%2x  \n", endpoint[i].bEndpointAddress));
+		}
+		else if ((endpoint[i].bmAttributes == USB_ENDPOINT_XFER_BULK) && 
+				((endpoint[i].bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT))
+		{
+			/* There are 6 bulk out EP. EP6 highest priority. */
+			/* EP1-4 is EDCA.  EP5 is HCCA. */
+			pConfig->BulkOutEpAddr[BulkOutIdx++] = endpoint[i].bEndpointAddress;
+			pConfig->BulkOutMaxPacketSize = endpoint[i].wMaxPacketSize;
+
+			DBGPRINT_RAW(RT_DEBUG_TRACE, ("BULK OUT MaximumPacketSize = %d\n", pConfig->BulkOutMaxPacketSize));
+			DBGPRINT_RAW(RT_DEBUG_TRACE, ("EP address = 0x%2x  \n", endpoint[i].bEndpointAddress));
+		}
+	}
+
+	if (!(pConfig->BulkInEpAddr && pConfig->BulkOutEpAddr[0])) 
+	{
+		printk("Could not find both bulk-in and bulk-out endpoints\n");
+		return FALSE;
+	}
+
+	pConfig->pConfig = dev->config;
+	RTMP_DRIVER_USB_CONFIG_INIT(pAd, pConfig);
+	RT28XXVendorSpecificCheck(dev, pAd);
+
+	return TRUE;
+	
+}
+
+static void *rtusb_probe(struct usb_device *dev, UINT interface,
+						const USB_DEVICE_ID *id)
+{
+	struct usb_interface *intf;
+	VOID *pAd;
+	int rv;
+
+
+	/* get the active interface descriptor */
+	intf = &dev->actconfig->interface[interface];
+
+	/* call generic probe procedure. */
+	rv = rt2870_probe(intf, dev, id, &pAd);
+	if (rv != 0)
+		pAd = NULL;
+	
+	return (void *)pAd;
+}
+
+/*Disconnect function is called within exit routine */
+static void rtusb_disconnect(struct usb_device *dev, void *ptr)
+{
+	rt2870_disconnect(dev, ptr);
+}
+
+
+#else	/* else if we are kernel 2.6 series */
+
+
+/**************************************************************************/
+/**************************************************************************/
+/*tested for kernel 2.6series */
+/**************************************************************************/
+/**************************************************************************/
+
+#ifdef CONFIG_PM
+
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,10)
+#define pm_message_t u32
+#endif
+
+static int rt2870_suspend(struct usb_interface *intf, pm_message_t state);
+static int rt2870_resume(struct usb_interface *intf);
+#endif /* CONFIG_PM */
+
+static int rtusb_probe (struct usb_interface *intf,
+						const USB_DEVICE_ID *id);
+static void rtusb_disconnect(struct usb_interface *intf);
+
+static BOOLEAN USBDevConfigInit(
+	IN struct usb_device 	*dev,
+	IN struct usb_interface *intf, 
+	IN VOID 				*pAd)
+{
+	struct usb_host_interface *iface_desc;
+	ULONG BulkOutIdx;
+	UINT32 i;
+	RT_CMD_USB_DEV_CONFIG Config, *pConfig = &Config;
+
+
+	/* get the active interface descriptor */
+	iface_desc = intf->cur_altsetting;
+
+	/* get # of enpoints  */
+	pConfig->NumberOfPipes = iface_desc->desc.bNumEndpoints;
+	DBGPRINT(RT_DEBUG_TRACE, ("NumEndpoints=%d\n", iface_desc->desc.bNumEndpoints));		  
+
+	/* Configure Pipes */
+	BulkOutIdx = 0;
+
+	for(i=0; i<pConfig->NumberOfPipes; i++)
+	{ 
+		if ((iface_desc->endpoint[i].desc.bmAttributes == 
+				USB_ENDPOINT_XFER_BULK) && 
+			((iface_desc->endpoint[i].desc.bEndpointAddress &
+				USB_ENDPOINT_DIR_MASK) == USB_DIR_IN))
+		{
+			pConfig->BulkInEpAddr = iface_desc->endpoint[i].desc.bEndpointAddress;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,11)
+			pConfig->BulkInMaxPacketSize = le2cpu16(iface_desc->endpoint[i].desc.wMaxPacketSize);
+#else
+			pConfig->BulkInMaxPacketSize = iface_desc->endpoint[i].desc.wMaxPacketSize;
+#endif /* LINUX_VERSION_CODE */
+
+			DBGPRINT_RAW(RT_DEBUG_TRACE, ("BULK IN MaxPacketSize = %d\n", pConfig->BulkInMaxPacketSize));
+			DBGPRINT_RAW(RT_DEBUG_TRACE, ("EP address = 0x%2x\n", iface_desc->endpoint[i].desc.bEndpointAddress));
+		}
+		else if ((iface_desc->endpoint[i].desc.bmAttributes ==
+					USB_ENDPOINT_XFER_BULK) && 
+				((iface_desc->endpoint[i].desc.bEndpointAddress &
+					USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT))
+		{
+			/* there are 6 bulk out EP. EP6 highest priority. */
+			/* EP1-4 is EDCA.  EP5 is HCCA. */
+			pConfig->BulkOutEpAddr[BulkOutIdx++] = iface_desc->endpoint[i].desc.bEndpointAddress;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,11)
+			pConfig->BulkOutMaxPacketSize = le2cpu16(iface_desc->endpoint[i].desc.wMaxPacketSize);
+#else
+			pConfig->BulkOutMaxPacketSize = iface_desc->endpoint[i].desc.wMaxPacketSize;
+#endif
+
+			DBGPRINT_RAW(RT_DEBUG_TRACE, ("BULK OUT MaxPacketSize = %d\n", pConfig->BulkOutMaxPacketSize));
+			DBGPRINT_RAW(RT_DEBUG_TRACE, ("EP address = 0x%2x  \n", iface_desc->endpoint[i].desc.bEndpointAddress));
+		}
+	}
+
+	if (!(pConfig->BulkInEpAddr && pConfig->BulkOutEpAddr[0])) 
+	{
+		printk("%s: Could not find both bulk-in and bulk-out endpoints\n", __FUNCTION__);
+		return FALSE;
+	}
+
+	pConfig->pConfig = &dev->config->desc;
+	usb_set_intfdata(intf, pAd);
+	RTMP_DRIVER_USB_CONFIG_INIT(pAd, pConfig);
+	RT28XXVendorSpecificCheck(dev, pAd);    
+	
+	return TRUE;
+	
+}
+
+
+
+static int rtusb_probe (struct usb_interface *intf,
+						const USB_DEVICE_ID *id)
+{	
+	VOID *pAd;
+	struct usb_device *dev;
+	int rv;
+
+	dev = interface_to_usbdev(intf);
+	dev = usb_get_dev(dev);
+	
+	rv = rt2870_probe(intf, dev, id, &pAd);
+	if (rv != 0)
+		usb_put_dev(dev);
+	
+	return rv;
+}
+
+
+static void rtusb_disconnect(struct usb_interface *intf)
+{
+	struct usb_device   *dev = interface_to_usbdev(intf);
+	VOID				*pAd;
+
+
+	pAd = usb_get_intfdata(intf);
+	usb_set_intfdata(intf, NULL);	
+
+	rt2870_disconnect(dev, pAd);
+}
+
+
+struct usb_driver rtusb_driver = {
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15)
+	.owner = THIS_MODULE,
+#endif	
+	.name=RTMP_DRV_NAME,
+	.probe=rtusb_probe,
+	.disconnect=rtusb_disconnect,
+	.id_table=rtusb_dev_id,
+
+#ifdef CONFIG_PM
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND
+	.supports_autosuspend = 1,
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */
+	suspend:	rt2870_suspend,
+	resume:		rt2870_resume,
+#endif /* CONFIG_PM */
+	};
+
+#ifdef CONFIG_PM
+
+VOID RT2870RejectPendingPackets(
+	IN	VOID	*pAd)
+{
+	/* clear PS packets */
+	/* clear TxSw packets */
+}
+
+static int rt2870_suspend(
+	struct usb_interface *intf,
+	pm_message_t state)
+{
+	struct net_device *net_dev;
+	VOID *pAd = usb_get_intfdata(intf);
+
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND
+	UCHAR Flag;
+	DBGPRINT(RT_DEBUG_ERROR, ("autosuspend===> rt2870_suspend()\n"));
+/*	if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF)) */
+	RTMP_DRIVER_ADAPTER_IDLE_RADIO_OFF_TEST(pAd, &Flag);
+	if(!Flag)
+	{
+		/*RT28xxUsbAsicRadioOff(pAd); */
+		RTMP_DRIVER_ADAPTER_RT28XX_USB_ASICRADIO_OFF(pAd);
+
+		/*RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_CPU_SUSPEND); */
+		RTMP_DRIVER_ADAPTER_CPU_SUSPEND_SET(pAd);
+	}
+		/*RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_SUSPEND); */
+		RTMP_DRIVER_ADAPTER_SUSPEND_SET(pAd);
+	return 0;
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("===> rt2870_suspend()\n"));
+/*	net_dev = pAd->net_dev; */
+	RTMP_DRIVER_NET_DEV_GET(pAd, &net_dev);
+	netif_device_detach(net_dev);
+
+	RTMP_DRIVER_USB_SUSPEND(pAd, netif_running(net_dev));
+	DBGPRINT(RT_DEBUG_TRACE, ("<=== rt2870_suspend()\n"));
+	return 0;
+}
+
+static int rt2870_resume(
+	struct usb_interface *intf)
+{
+	struct net_device *net_dev;
+	VOID *pAd = usb_get_intfdata(intf);
+
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND
+	struct usb_device		*pUsb_Dev;
+	UCHAR Flag;
+	INT 		pm_usage_cnt;
+
+	RTMP_DRIVER_USB_DEV_GET(pAd, &pUsb_Dev);
+	RTMP_DRIVER_USB_INTF_GET(pAd, &intf);
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)
+	pm_usage_cnt = atomic_read(&intf->pm_usage_cnt);	
+#else
+	pm_usage_cnt = intf->pm_usage_cnt;
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,33)
+	if(pUsb_Dev->autosuspend_disabled == 0)
+#else
+	if(pUsb_Dev->auto_pm == 1)
+#endif
+	{
+		if(pm_usage_cnt  <= 0)
+			usb_autopm_get_interface(intf);
+
+	}
+	DBGPRINT(RT_DEBUG_ERROR, ("autosuspend===> rt2870_resume()\n"));
+
+	/*RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_SUSPEND); */
+	RTMP_DRIVER_ADAPTER_SUSPEND_CLEAR(pAd);
+
+	RTMP_DRIVER_ADAPTER_CPU_SUSPEND_TEST(pAd, &Flag);
+	if(Flag)
+	/*if(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_CPU_SUSPEND)) */
+	{
+		/*RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_CPU_SUSPEND); */
+		RTMP_DRIVER_ADAPTER_CPU_SUSPEND_CLEAR(pAd);
+	}
+
+	/*RT28xxUsbAsicRadioOn(pAd); */
+	RTMP_DRIVER_ADAPTER_RT28XX_USB_ASICRADIO_ON(pAd);
+	DBGPRINT(RT_DEBUG_ERROR, ("autosuspend<===  rt2870_resume()\n"));
+
+	return 0;
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("===> rt2870_resume()\n"));
+
+/*	pAd->PM_FlgSuspend = 0; */
+	RTMP_DRIVER_USB_RESUME(pAd);
+
+/*	net_dev = pAd->net_dev; */
+	RTMP_DRIVER_NET_DEV_GET(pAd, &net_dev);
+	netif_device_attach(net_dev);
+	netif_start_queue(net_dev);
+	netif_carrier_on(net_dev);
+	netif_wake_queue(net_dev);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<=== rt2870_resume()\n"));
+	return 0;
+}
+#endif /* CONFIG_PM */
+#endif /* LINUX_VERSION_CODE */
+
+
+/* Init driver module */
+INT __init rtusb_init(void)
+{
+	printk("rtusb init %s --->\n", RTMP_DRV_NAME);
+
+#ifdef RESOURCE_BOOT_ALLOC
+{
+	int status;
+	status = rtusb_resource_init(rtusb_tx_buf_len, rtusb_rx_buf_len, rtusb_tx_buf_cnt, rtusb_rx_buf_cnt);
+	if (status)
+	{
+		printk("resource allocate failed, don't register driver!\n");
+		return -1;
+	}
+}
+#endif /* RESOURCE_BOOT_ALLOC */
+
+	return usb_register(&rtusb_driver);
+}
+
+/* Deinit driver module */
+VOID __exit rtusb_exit(void)
+{
+	usb_deregister(&rtusb_driver);	
+	
+#ifdef RESOURCE_BOOT_ALLOC
+	rtusb_resource_exit();
+#endif /* RESOURCE_BOOT_ALLOC */	
+
+	printk("<--- rtusb exit\n");
+}
+
+module_init(rtusb_init);
+module_exit(rtusb_exit);
+
+
+
+
+/*---------------------------------------------------------------------	*/
+/* function declarations												*/
+/*---------------------------------------------------------------------	*/
+
+
+
+/*
+========================================================================
+Routine Description:
+    Release allocated resources.
+
+Arguments:
+    *dev				Point to the PCI or USB device
+	pAd					driver control block pointer
+
+Return Value:
+    None
+
+Note:
+========================================================================
+*/
+static void rt2870_disconnect(struct usb_device *dev, VOID *pAd)
+{
+	struct net_device *net_dev;
+
+
+	DBGPRINT(RT_DEBUG_ERROR, ("rtusb_disconnect: unregister usbnet usb-%s-%s\n",
+				dev->bus->bus_name, dev->devpath));
+	if (!pAd)
+	{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)	/* kernel 2.4 series */
+		while(MOD_IN_USE > 0)
+		{
+			MOD_DEC_USE_COUNT;
+		}
+#else
+		usb_put_dev(dev);
+#endif /* LINUX_VERSION_CODE */
+
+		printk("rtusb_disconnect: pAd == NULL!\n");
+		return;
+	}
+/*	RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST); */
+	RTMP_DRIVER_NIC_NOT_EXIST_SET(pAd);
+
+	/* for debug, wait to show some messages to /proc system */
+	udelay(1);
+
+
+	RTMP_DRIVER_NET_DEV_GET(pAd, &net_dev);
+	RtmpPhyNetDevExit(pAd, net_dev);
+
+	/* FIXME: Shall we need following delay and flush the schedule?? */
+	udelay(1);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)	/* kernel 2.4 series */
+#else
+	flush_scheduled_work();
+#endif /* LINUX_VERSION_CODE */
+	udelay(1);
+
+	/* free the root net_device */
+	RtmpOSNetDevFree(net_dev);
+
+#ifdef RT_CFG80211_SUPPORT
+	RTMP_DRIVER_80211_UNREGISTER(pAd, net_dev);
+#endif /* RT_CFG80211_SUPPORT */
+
+	RtmpRaDevCtrlExit(pAd);
+
+	/* release a use of the usb device structure */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)	/* kernel 2.4 series */
+	while(MOD_IN_USE > 0)
+	{
+		MOD_DEC_USE_COUNT;
+	}
+#else
+	usb_put_dev(dev);
+#endif /* LINUX_VERSION_CODE */
+	udelay(1);
+
+	DBGPRINT(RT_DEBUG_ERROR, (" RTUSB disconnect successfully\n"));
+}
+
+
+static int rt2870_probe(
+	IN struct usb_interface *intf,
+	IN struct usb_device *usb_dev,
+	IN const USB_DEVICE_ID *dev_id,
+	IN VOID **ppAd)
+{
+	struct  net_device		*net_dev = NULL;
+	VOID       				*pAd = (VOID *) NULL;
+	INT                 	status, rv;
+	PVOID					handle;
+	RTMP_OS_NETDEV_OP_HOOK	netDevHook;
+	ULONG					OpMode;
+#ifdef CONFIG_PM
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND
+/*	INT 		pm_usage_cnt; */
+	INT		 res =1 ; 
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */
+#endif /* CONFIG_PM */	
+
+	
+
+	DBGPRINT(RT_DEBUG_TRACE, ("===>rt2870_probe()!\n"));
+	
+#ifdef CONFIG_PM
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND
+
+        res = usb_autopm_get_interface(intf);
+	if (res)
+	{
+			DBGPRINT(RT_DEBUG_ERROR, ("rt2870_probe autopm_resume fail ------\n"));
+		     return -EIO;
+	}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)
+	atomic_set(&intf->pm_usage_cnt, 1);
+	 printk(" rt2870_probe ====> pm_usage_cnt %d \n", atomic_read(&intf->pm_usage_cnt));
+#else
+         intf->pm_usage_cnt = 1;
+	 printk(" rt2870_probe ====> pm_usage_cnt %d \n", intf->pm_usage_cnt);
+#endif
+	
+
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */
+#endif /* CONFIG_PM */
+
+
+
+/*RtmpDevInit============================================= */
+	/* Allocate RTMP_ADAPTER adapter structure */
+/*	handle = kmalloc(sizeof(struct os_cookie), GFP_KERNEL); */
+	os_alloc_mem(NULL, (UCHAR **)&handle, sizeof(struct os_cookie));
+	if (handle == NULL)
+	{
+		printk("rt2870_probe(): Allocate memory for os handle failed!\n");
+		return -ENOMEM;
+	}
+	memset(handle, 0, sizeof(struct os_cookie));
+
+	((POS_COOKIE)handle)->pUsb_Dev = usb_dev;
+
+#ifdef CONFIG_PM
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND
+	((POS_COOKIE)handle)->intf = intf;
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */
+#endif /* CONFIG_PM */
+
+
+
+	/* set/get operators to/from DRIVER module */
+#ifdef OS_ABL_FUNC_SUPPORT
+	/* get DRIVER operations */
+	RtmpNetOpsInit(pRtmpDrvNetOps);
+	RTMP_DRV_OPS_FUNCTION(pRtmpDrvOps, pRtmpDrvNetOps, NULL, NULL);
+	RtmpNetOpsSet(pRtmpDrvNetOps);
+#endif /* OS_ABL_FUNC_SUPPORT */
+
+	rv = RTMPAllocAdapterBlock(handle, &pAd);
+	if (rv != NDIS_STATUS_SUCCESS) 
+	{
+/*		kfree(handle); */
+		os_free_mem(NULL, handle);
+		goto err_out;
+	}
+
+/*USBDevInit============================================== */
+	if (USBDevConfigInit(usb_dev, intf, pAd) == FALSE)
+		goto err_out_free_radev;
+
+	RtmpRaDevCtrlInit(pAd, RTMP_DEV_INF_USB);
+	
+/*NetDevInit============================================== */
+	net_dev = RtmpPhyNetDevInit(pAd, &netDevHook);
+	if (net_dev == NULL)
+		goto err_out_free_radev;
+	
+	/* Here are the net_device structure with usb specific parameters. */
+#ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
+	/* for supporting Network Manager.
+	  * Set the sysfs physical device reference for the network logical device if set prior to registration will 
+	  * cause a symlink during initialization.
+	 */
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0))
+	SET_NETDEV_DEV(net_dev, &(usb_dev->dev));
+#endif
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+
+#ifdef CONFIG_STA_SUPPORT
+/*    pAd->StaCfg.OriDevType = net_dev->type; */
+	RTMP_DRIVER_STA_DEV_TYPE_SET(pAd, net_dev->type);
+#endif /* CONFIG_STA_SUPPORT */
+
+/*All done, it's time to register the net device to linux kernel. */
+	/* Register this device */
+#ifdef RT_CFG80211_SUPPORT
+{
+/*	pAd->pCfgDev = &(usb_dev->dev); */
+/*	pAd->CFG80211_Register = CFG80211_Register; */
+/*	RTMP_DRIVER_CFG80211_INIT(pAd, usb_dev); */
+
+	/*
+		In 2.6.32, cfg80211 register must be before register_netdevice();
+		We can not put the register in rt28xx_open();
+		Or you will suffer NULL pointer in list_add of
+		cfg80211_netdev_notifier_call().
+	*/
+	CFG80211_Register(pAd, &(usb_dev->dev), net_dev);
+}
+#endif /* RT_CFG80211_SUPPORT */
+
+	RTMP_DRIVER_OP_MODE_GET(pAd, &OpMode);
+	status = RtmpOSNetDevAttach(OpMode, net_dev, &netDevHook);
+	if (status != 0)
+		goto err_out_free_netdev;
+
+/*#ifdef KTHREAD_SUPPORT */
+
+	*ppAd = pAd;
+
+#ifdef INF_PPA_SUPPORT
+/*	pAd->pDirectpathCb = (PPA_DIRECTPATH_CB *) kmalloc (sizeof(PPA_DIRECTPATH_CB), GFP_ATOMIC); */
+/*	os_alloc_mem(NULL, (UCHAR **)&(pAd->pDirectpathCb), sizeof(PPA_DIRECTPATH_CB)); */
+	RTMP_DRIVER_INF_PPA_INIT(pAd);
+#endif /* INF_PPA_SUPPORT */
+
+#ifdef PRE_ASSIGN_MAC_ADDR
+	UCHAR PermanentAddress[MAC_ADDR_LEN];
+	RTMP_DRIVER_MAC_ADDR_GET(pAd, &PermanentAddress[0]);
+	DBGPRINT(RT_DEBUG_TRACE, ("@%s MAC address: %02x:%02x:%02x:%02x:%02x:%02x\n", __FUNCTION__, PermanentAddress[0], PermanentAddress[1],PermanentAddress[2],PermanentAddress[3],PermanentAddress[4],PermanentAddress[5]));
+	/* Set up the Mac address */
+	RtmpOSNetDevAddrSet(OpMode, net_dev, &PermanentAddress[0], NULL);
+#endif /* PRE_ASSIGN_MAC_ADDR */
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<===rt2870_probe()!\n"));
+
+	return 0;
+
+	/* --------------------------- ERROR HANDLE --------------------------- */	
+err_out_free_netdev:
+	RtmpOSNetDevFree(net_dev);
+	
+err_out_free_radev:
+	RTMPFreeAdapter(pAd);
+	
+err_out:
+	*ppAd = NULL;
+
+	return -1;
+	
+}
+
+
+#ifdef OS_ABL_SUPPORT
+/* USB complete handlers in LINUX */
+RTMP_DRV_USB_COMPLETE_HANDLER RtmpDrvUsbBulkOutDataPacketComplete = NULL;
+RTMP_DRV_USB_COMPLETE_HANDLER RtmpDrvUsbBulkOutMLMEPacketComplete = NULL;
+RTMP_DRV_USB_COMPLETE_HANDLER RtmpDrvUsbBulkOutNullFrameComplete = NULL;
+RTMP_DRV_USB_COMPLETE_HANDLER RtmpDrvUsbBulkOutRTSFrameComplete = NULL;
+RTMP_DRV_USB_COMPLETE_HANDLER RtmpDrvUsbBulkOutPsPollComplete = NULL;
+RTMP_DRV_USB_COMPLETE_HANDLER RtmpDrvUsbBulkRxComplete = NULL;
+
+USBHST_STATUS RTUSBBulkOutDataPacketComplete(URBCompleteStatus Status, purbb_t pURB, pregs *pt_regs)
+{
+	RtmpDrvUsbBulkOutDataPacketComplete((VOID *)pURB);
+}
+
+USBHST_STATUS RTUSBBulkOutMLMEPacketComplete(URBCompleteStatus Status, purbb_t pURB, pregs *pt_regs)
+{
+	RtmpDrvUsbBulkOutMLMEPacketComplete((VOID *)pURB);
+}
+
+USBHST_STATUS RTUSBBulkOutNullFrameComplete(URBCompleteStatus Status, purbb_t pURB, pregs *pt_regs)
+{
+	RtmpDrvUsbBulkOutNullFrameComplete((VOID *)pURB);
+}
+
+USBHST_STATUS RTUSBBulkOutRTSFrameComplete(URBCompleteStatus Status, purbb_t pURB, pregs *pt_regs)
+{
+	RtmpDrvUsbBulkOutRTSFrameComplete((VOID *)pURB);
+}
+
+USBHST_STATUS RTUSBBulkOutPsPollComplete(URBCompleteStatus Status, purbb_t pURB, pregs *pt_regs)
+{
+	RtmpDrvUsbBulkOutPsPollComplete((VOID *)pURB);
+}
+
+USBHST_STATUS RTUSBBulkRxComplete(URBCompleteStatus Status, purbb_t pURB, pregs *pt_regs)
+{
+	RtmpDrvUsbBulkRxComplete((VOID *)pURB);
+}
+
+VOID RtmpNetOpsInit(
+	IN VOID			*pDrvNetOpsSrc)
+{
+	RTMP_NET_ABL_OPS *pDrvNetOps = (RTMP_NET_ABL_OPS *)pDrvNetOpsSrc;
+
+
+	pDrvNetOps->RtmpNetUsbBulkOutDataPacketComplete = (RTMP_DRV_USB_COMPLETE_HANDLER)RTUSBBulkOutDataPacketComplete;
+	pDrvNetOps->RtmpNetUsbBulkOutMLMEPacketComplete = (RTMP_DRV_USB_COMPLETE_HANDLER)RTUSBBulkOutMLMEPacketComplete;
+	pDrvNetOps->RtmpNetUsbBulkOutNullFrameComplete = (RTMP_DRV_USB_COMPLETE_HANDLER)RTUSBBulkOutNullFrameComplete;
+	pDrvNetOps->RtmpNetUsbBulkOutRTSFrameComplete = (RTMP_DRV_USB_COMPLETE_HANDLER)RTUSBBulkOutRTSFrameComplete;
+	pDrvNetOps->RtmpNetUsbBulkOutPsPollComplete = (RTMP_DRV_USB_COMPLETE_HANDLER)RTUSBBulkOutPsPollComplete;
+	pDrvNetOps->RtmpNetUsbBulkRxComplete = (RTMP_DRV_USB_COMPLETE_HANDLER)RTUSBBulkRxComplete;
+}
+
+
+VOID RtmpNetOpsSet(
+	IN VOID			*pDrvNetOpsSrc)
+{
+	RTMP_NET_ABL_OPS *pDrvNetOps = (RTMP_NET_ABL_OPS *)pDrvNetOpsSrc;
+
+
+	RtmpDrvUsbBulkOutDataPacketComplete = pDrvNetOps->RtmpDrvUsbBulkOutDataPacketComplete;
+	RtmpDrvUsbBulkOutMLMEPacketComplete = pDrvNetOps->RtmpDrvUsbBulkOutMLMEPacketComplete;
+	RtmpDrvUsbBulkOutNullFrameComplete = pDrvNetOps->RtmpDrvUsbBulkOutNullFrameComplete;
+	RtmpDrvUsbBulkOutRTSFrameComplete = pDrvNetOps->RtmpDrvUsbBulkOutRTSFrameComplete;
+	RtmpDrvUsbBulkOutPsPollComplete = pDrvNetOps->RtmpDrvUsbBulkOutPsPollComplete;
+	RtmpDrvUsbBulkRxComplete = pDrvNetOps->RtmpDrvUsbBulkRxComplete;
+}
+#endif /* OS_ABL_SUPPORT */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/vr_bdlt.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/vr_bdlt.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/vr_bdlt.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/vr_bdlt.c	2017-09-23 03:42:49.838675614 +0800
@@ -0,0 +1,75 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#define RTMP_MODULE_OS
+#define RTMP_MODULE_OS_UTIL
+
+#define MODULE_BDLT
+
+/*#include "rt_config.h" */
+#include "rtmp_comm.h"
+#include "rt_os_util.h"
+#include "rtmp_osabl.h"
+
+
+#ifdef PLATFORM_BL2348
+
+/* global variables */
+int (*pToUpperLayerPktSent)(struct sk_buff *pSkb) = netif_rx ;
+
+
+
+
+/*
+========================================================================
+Routine Description:
+	Assign the briding function.
+
+Arguments:
+	xi_destination_ptr	- bridging function
+
+Return Value:
+	None
+
+Note:
+	The function name must be replace_upper_layer_packet_destination.
+========================================================================
+*/
+VOID replace_upper_layer_packet_destination(VOID *pXiDestination)
+{
+	DBGPRINT(RT_DEBUG_TRACE, ("ralink broad light> replace_upper_layer_packet_destination\n"));
+	pToUpperLayerPktSent = pXiDestination ;
+} /* End of replace_upper_layer_packet_destination */
+
+
+EXPORT_SYMBOL(pToUpperLayerPktSent);
+EXPORT_SYMBOL(replace_upper_layer_packet_destination);
+
+#endif /* PLATFORM_BL2348 */
+
+
+/* End of vr_bdlt.c */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/vr_ikans.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/vr_ikans.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/os/linux/vr_ikans.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/os/linux/vr_ikans.c	2017-09-23 03:42:49.838675614 +0800
@@ -0,0 +1,341 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#define RTMP_MODULE_OS
+#define RTMP_MODULE_OS_UTIL
+
+#define MODULE_IKANOS
+
+#include "rt_config.h"
+#include <linux/config.h>
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/skbuff.h>
+#include <linux/netdevice.h>
+#include <netpro/apprehdr.h>
+
+
+#ifdef IKANOS_VX_1X0
+
+#define IKANOS_PERAP_ID		7 /* IKANOS Fix Peripheral ID */
+#define K0_TO_K1(x)			((unsigned)(x)|0xA0000000) /* kseg0 to kseg1 */
+/*#define IKANOS_DEBUG */
+
+
+extern INT rt28xx_send_packets(
+	IN struct sk_buff		*skb_p,
+	IN struct net_device	*net_dev);
+
+static INT32 IKANOS_WlanDataFramesTx(
+	IN void					*_pAdBuf,
+	IN struct net_device	*pNetDev);
+
+static void IKANOS_WlanPktFromAp(
+	IN apPreHeader_t 		*pFrame);
+
+static INT32 GetSpecInfoIdxFromBssid(
+	IN PRTMP_ADAPTER pAd,
+	IN INT32 FromWhichBSSID);
+
+
+
+
+/* --------------------------------- Public -------------------------------- */
+
+/*
+========================================================================
+Routine Description:
+	Init IKANOS fast path function.
+
+Arguments:
+	pApMac			- the MAC of AP
+
+Return Value:
+	None
+
+Note:
+	If you want to enable RX fast path, you must call the function.
+========================================================================
+*/
+void VR_IKANOS_FP_Init(
+	IN UINT8 BssNum,
+	IN UINT8 *pApMac)
+{
+	UINT32 i;
+	UINT8 mac[6];
+
+
+	memcpy(mac, pApMac, 6);
+
+	/* add all MAC of multiple BSS */
+	for(i=0; i<BssNum; i++)
+	{
+		apMacAddrConfig(7, mac, 0xAD);
+		mac[5] ++;
+	} /* End of for */
+} /* End of VR_IKANOS_FP_Init */
+
+
+/*
+========================================================================
+Routine Description:
+	Ikanos LAN --> WLAN transmit fast path function.
+
+Arguments:
+	skb				- the transmitted packet (SKB packet format)
+	netdev			- our WLAN network device
+
+Return Value:
+	
+
+Note:
+========================================================================
+*/
+INT32 IKANOS_DataFramesTx(
+	IN struct sk_buff		*pSkb,
+	IN struct net_device	*pNetDev)
+{
+	PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pNetDev->priv;
+	IkanosWlanTxCbFuncP *fp = &IKANOS_WlanDataFramesTx;
+
+	pSkb->apFlowData.txDev = pNetDev;
+	pSkb->apFlowData.txApId = IKANOS_PERAP_ID;
+	pAd->IkanosTxInfo.netdev = pNetDev;
+	pAd->IkanosTxInfo.fp = fp;
+	pSkb->apFlowData.txHandle = &(pAd->IkanosTxInfo);
+	ap2apFlowProcess(pSkb, pNetDev);
+
+#ifdef IKANOS_DEBUG
+	printk("ikanos> tx no fp\n"); /* debug use */
+#endif /* IKANOS_DEBUG */
+
+	return rt28xx_send_packets(pSkb, pNetDev);
+} /* End of IKANOS_DataFramesTx */
+
+
+/*
+========================================================================
+Routine Description:
+	Ikanos WLAN --> LAN transmit fast path function.
+
+Arguments:
+	pAd				- WLAN control block
+	pRxParam		-
+	pSkb			- the transmitted packet (SKB packet format)
+	Length			- packet length
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+/* Note: because no unsigned long private parameters in apPreHeader_t can be used,
+	we use a global variable to record pAd.
+	So we can not use multiple card function in Ikanos platform. */
+PRTMP_ADAPTER	pIkanosAd;
+
+void IKANOS_DataFrameRx(
+	IN PRTMP_ADAPTER	pAd,
+	IN struct sk_buff	*pSkb)
+{
+    apPreHeader_t *apBuf;
+	void *pRxParam = pSkb->dev;
+	UINT32 Length = pSkb->len;
+
+
+    apBuf = (apPreHeader_t *)(translateMbuf2Apbuf(pSkb, 0));
+
+    apBuf->flags1 = 1 << AP_FLAG1_IS_ETH_BIT;
+    apBuf->specInfoElement = RTMP_GET_PACKET_NET_DEVICE_MBSSID(pSkb); /* MBSS */
+	pIkanosAd = pAd;
+
+/*  apBuf->egressList[0].pEgress = NULL; */
+/*  apBuf->egressList[0].pFlowID = NULL; */
+    apBuf->flags2 = 0;
+
+    apClassify(IKANOS_PERAP_ID, apBuf, (void *)IKANOS_WlanPktFromAp);
+    dev_kfree_skb(pSkb); 
+} /* End of IKANOS_DataFrameRx */
+
+
+
+
+/* --------------------------------- Private -------------------------------- */
+
+/*
+========================================================================
+Routine Description:
+	Ikanos LAN --> WLAN transmit fast path function.
+
+Arguments:
+	_pAdBuf			- the transmitted packet (Ikanos packet format)
+	netdev			- our WLAN network device
+
+Return Value:
+	
+
+Note:
+========================================================================
+*/
+static INT32 IKANOS_WlanDataFramesTx(
+	IN void					*_pAdBuf,
+	IN struct net_device	*pNetDev)
+{
+	apPreHeader_t *pApBuf = (apPreHeader_t *)_pAdBuf;
+	struct sk_buff *sk = NULL;
+
+	sk = (struct sk_buff *)translateApbuf2Mbuf(pApBuf);
+	if (sk == NULL)
+	{
+		printk("ikanos> translateApbuf2Mbuf returned NULL!\n");
+		return 1;
+	} /* End of if */
+
+	sk->apFlowData.flags2 = 0;
+	sk->apFlowData.wlanFlags = 0;
+	sk->protocol = ETH_P_IP;
+	sk->dev = pNetDev;
+	sk->priority = 0;
+
+	return rt28xx_send_packets(sk, pNetDev);
+} /* End of IKANOS_WlanDataFramesTx */
+
+
+static INT32 GetSpecInfoIdxFromBssid(
+	IN PRTMP_ADAPTER pAd,
+	IN INT32 FromWhichBSSID)
+{
+	INT32 IfIdx = MAIN_MBSSID;
+
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		IfIdx = MAIN_MBSSID;
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	return IfIdx; /* return one of MBSS */
+}
+
+/*
+========================================================================
+Routine Description:
+	Get real interface index, used in get_netdev_from_bssid()
+
+Arguments:
+	pAd				- 
+	FromWhichBSSID	- 
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+static INT32 GetSpecInfoIdxFromBssid(
+	IN PRTMP_ADAPTER	pAd,
+	IN INT32			FromWhichBSSID)
+{
+	INT32 IfIdx = MAIN_MBSSID;
+
+
+#ifdef CONFIG_STA_SUPPORT
+	IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
+	{
+		IfIdx = MAIN_MBSSID;
+	}
+#endif /* CONFIG_STA_SUPPORT */
+
+	return IfIdx; /* return one of MBSS */
+} /* End of GetSpecInfoIdxFromBssid */
+
+
+/*
+========================================================================
+Routine Description:
+	Ikanos WLAN --> LAN transmit fast path function.
+
+Arguments:
+	pFrame			- the received packet (Ikanos packet format)
+
+Return Value:
+	None
+
+Note:
+	Ikanos platform supports only 8 VAPs
+========================================================================
+*/
+static void IKANOS_WlanPktFromAp(
+	IN apPreHeader_t		*pFrame)
+{
+	PRTMP_ADAPTER pAd;
+    struct net_device *dev = NULL;
+    struct sk_buff *skb;
+    INT32 index;
+    apPreHeader_t *apBuf = K0_TO_K1(pFrame);
+
+
+	pAd = pIkanosAd;
+    /*index = apBuf->specInfoElement; */
+	/*dev = pAd->ApCfg.MBSSID[index].MSSIDDev; */
+	index = GetSpecInfoIdxFromBssid(pAd, apBuf->specInfoElement);
+	dev = get_netdev_from_bssid(pAd, apBuf->specInfoElement);
+    if (dev == NULL)
+    {
+        printk("ikanos> %s: ERROR null device ***************\n", __FUNCTION__);
+        return;
+    } /* End of if */
+
+    skb = (struct sk_buff *)translateApbuf2Mbuf(apBuf);
+    if (NULL == skb)
+    {
+        printk("ikanos> %s: skb is null *********************\n", __FUNCTION__);
+        return;
+    } /* End of if */
+
+    pAd->IkanosRxInfo[index].netdev = dev;
+    pAd->IkanosRxInfo[index].fp = &IKANOS_WlanDataFramesTx;
+
+    skb->dev = dev;
+    skb->apFlowData.rxApId = IKANOS_PERAP_ID;
+    /*skb->apFlowData.txHandle = &(txinforx[index]); */
+    skb->apFlowData.rxHandle = &(pAd->IkanosRxInfo[index]);
+    skb->protocol = eth_type_trans(skb, skb->dev);
+
+#ifdef IKANOS_DEBUG
+	printk("ikanos> rx no fp!\n"); /* debug use */
+#endif /* IKANOS_DEBUG */
+
+    netif_rx(skb);
+    return;
+} /* End of IKANOS_WlanPktFromAp */
+
+#endif /* IKANOS_VX_1X0 */
+
+/* End of vr_ikans.c */
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/README_STA_usb linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/README_STA_usb
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/README_STA_usb	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/README_STA_usb	2017-09-23 03:42:49.842675602 +0800
@@ -0,0 +1,534 @@
+* README
+*
+* Ralink Tech Inc.
+* 
+* http://www.ralinktech.com
+*
+
+=======================================================================
+ModelName:
+===========
+RT2870 Wireless Lan Linux Driver
+
+
+=======================================================================
+Driver lName:
+===========
+rt2870.o/rt2870.ko
+
+
+=======================================================================
+Supporting Kernel:
+===================
+linux kernel 2.4 and 2.6 series. 
+Tested in Redhat 7.3 or later.
+
+
+=======================================================================
+Ralink Hardware:
+===================
+Ralink 802.11n Wireless LAN Card.
+
+
+=======================================================================
+Description:
+=============
+This is a linux device driver for Ralink RT2870 USB ABGN WLAN Card.
+
+
+=======================================================================
+Contents:
+=============
+Makefile	        : Makefile
+*.c					: c files
+*.h					: header files
+
+
+=======================================================================
+Features:
+==========
+   This driver implements basic IEEE802.11. Infrastructure and adhoc mode with 
+   open or shared or WPA-PSK or WPA2-PSK authentication method. 
+   NONE, WEP, TKIP and AES encryption. 
+
+
+=======================================================================
+Build Instructions:  
+====================
+
+1> $tar -xvzf DPB_RT2870_Linux_STA_x.x.x.x.tgz
+    go to "./DPB_RT2870_Linux_STA_x.x.x.x" directory.
+    
+2> In Makefile
+	 set the "MODE = STA" in Makefile and chose the TARGET to Linux by set "TARGET = LINUX"
+	 define the linux kernel source include file path LINUX_SRC
+	 modify to meet your need.
+
+3> In os/linux/config.mk 
+	define the GCC and LD of the target machine
+	define the compiler flags CFLAGS
+	modify to meet your need.
+	** Build for being controlled by NetworkManager or wpa_supplicant wext functions
+	   Please set 'HAS_WPA_SUPPLICANT=y' and 'HAS_NATIVE_WPA_SUPPLICANT_SUPPORT=y'.
+	   => #>cd wpa_supplicant-x.x
+	   => #>./wpa_supplicant -Dwext -ira0 -c wpa_supplicant.conf -d
+	** Build for being controlled by WpaSupplicant with Ralink Driver
+	   Please set 'HAS_WPA_SUPPLICANT=y' and 'HAS_NATIVE_WPA_SUPPLICANT_SUPPORT=n'.
+	   => #>cd wpa_supplicant-0.5.7
+	   => #>./wpa_supplicant -Dralink -ira0 -c wpa_supplicant.conf -d
+
+4> $make
+	# compile driver source code
+	# To fix "error: too few arguments to function ¡¥iwe_stream_add_event"
+	  => $patch -i os/linux/sta_ioctl.c.patch os/linux/sta_ioctl.c
+
+5> $cp RT2870STA.dat  /etc/Wireless/RT2870STA/RT2870STA.dat
+    
+6> load driver, go to "os/linux/" directory.
+    #[kernel 2.4]
+    #    $/sbin/insmod rt2870sta.o
+    #    $/sbin/ifconfig ra0 inet YOUR_IP up
+        
+    #[kernel 2.6]
+    #    $/sbin/insmod rt2870sta.ko
+    #    $/sbin/ifconfig ra0 inet YOUR_IP up
+
+7> unload driver    
+    $/sbin/ifconfig ra0 down
+	$/sbin/rmmod rt2870sta
+	
+=======================================================================
+CONFIGURATION:  
+====================
+RT2870 driver can be configured via following interfaces, 
+i.e. (i)"iwconfig" command, (ii)"iwpriv" command, (iii) configuration file
+
+i)  iwconfig comes with kernel.  
+ii) iwpriv usage, please refer to file "iwpriv_usage.txt" for details.
+iii)modify configuration file "RT2870STA.dat" in /etc/Wireless/RT2870STA/RT2870STA.dat.
+           
+Configuration File : RT2870STA.dat
+---------------------------------------
+# Copy this file to /etc/Wireless/RT2870STA/RT2870STA.dat
+# This file is a binary file and will be read on loading rt.o module.
+#
+# Use "vi RT2870STA.dat" to modify settings according to your need.
+# 
+# 1.) set NetworkType to "Adhoc" for using Adhoc-mode, otherwise using Infrastructure
+# 2.) set Channel to "0" for auto-select on Infrastructure mode
+# 3.) set SSID for connecting to your Accss-point.
+# 4.) AuthMode can be "WEPAUTO", "OPEN", "SHARED", "WPAPSK", "WPA2PSK", "WPANONE"
+# 5.) EncrypType can be "NONE", "WEP", "TKIP", "AES"
+# for more information refer to the Readme file.
+# 
+#The word of "Default" must not be removed
+Default
+CountryRegion=5
+CountryRegionABand=7
+CountryCode=
+SSID=Dennis2860AP
+NetworkType=Infra
+WirelessMode=9
+Channel=0
+BeaconPeriod=100
+TxPower=100
+BGProtection=0
+TxPreamble=0
+RTSThreshold=2347
+FragThreshold=2346
+TxBurst=1
+WmmCapable=0
+AckPolicy=0;0;0;0
+AuthMode=OPEN
+EncrypType=NONE
+WPAPSK=
+DefaultKeyID=1
+Key1Type=0
+Key1Str=
+Key2Type=0
+Key2Str=
+Key3Type=0
+Key3Str=
+Key4Type=0
+Key4Str=
+PSMode=CAM
+FastRoaming=0
+RoamThreshold=70
+HT_RDG=1
+HT_EXTCHA=0
+HT_OpMode=1
+HT_MpduDensity=4
+HT_BW=1
+HT_AutoBA=1
+HT_BADecline=0
+HT_AMSDU=0
+HT_BAWinSize=64
+HT_GI=1
+HT_MCS=33
+HT_MIMOPSMode=3
+EthConvertMode=
+EthCloneMac=
+IEEE80211H=0
+TGnWifiTest=0
+WirelessEvent=0
+MeshId=MESH
+MeshAutoLink=1
+MeshAuthMode=OPEN
+MeshEncrypType=NONE
+MeshWPAKEY=
+MeshDefaultkey=1
+MeshWEPKEY=
+CarrierDetect=0
+
+-----------------------------------------------
+*NOTE:
+	WMM parameters
+			WmmCapable			Set it as 1 to turn on WMM Qos support				
+			AckPolicy1~4		Ack policy which support normal Ack or no Ack
+								(AC_BK, AC_BE, AC_VI, AC_VO)		
+	
+	All WMM parameters do not support iwpriv command but ¡¥WmmCapable¡¦¡¦, 
+	please store all parameter to RT2870STA.dat, and restart driver. 	
+
+-----------------------------------------------
+syntax is 'Param'='Value' and describes below. 
+
+@> CountryRegion=value                                 
+	value
+		0: use 1 ~ 11 Channel
+		1: use 1 ~ 13 Channel
+		2: use 10 ~ 11 Channel
+		3: use 10 ~ 13 Channel
+		4: use 14 Channel
+		5: use 1 ~ 14 Channel
+		6: use 3 ~ 9 Channel
+		7: use 5 ~ 13 Channel
+	   31: use 1 ~ 14 Channel (ch1-11:active scan, ch12-14 passive scan)
+   	 	                                      
+@> CountryRegionABand=value      							
+	value	
+		0: use 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165 Channel
+		1: use 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140 Channel
+		2: use 36, 40, 44, 48, 52, 56, 60, 64 Channel
+		3: use 52, 56, 60, 64, 149, 153, 157, 161 Channel
+		4: use 149, 153, 157, 161, 165 Channel
+		5: use 149, 153, 157, 161 Channel
+		6: use 36, 40, 44, 48 Channel
+		7: use 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165 Channel
+		8: use 52, 56, 60, 64 Channel
+		9: use 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165 Channel
+	   10: use 36, 40, 44, 48, 149, 153, 157, 161, 165 Channel
+	   11: use 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 149, 153, 157, 161 Channel
+
+@> CountryCode=value
+	value
+		AG, AR, AW, AU, AT, BS, BB, BM, BR, BE, BG, CA, KY, CL, CN, CO, CR, CY, CZ, DK, DO, EC, SV, FI, FR, DE, 
+		GR, GU, GT, HT, HN, HK, HU, IS, IN, ID, IE, IL, IT, JP, JO, LV, LI, LT, LU, MY, MT, MA, MX, NL, NZ, NO,
+		PE, PT, PL, RO, RU, SA, CS, SG, SK, SI, ZA, KR, ES, SE, CH, TW, TR, GB, UA, AE, US, VE
+		"" => using default setting: 2.4 G - ch 1~11; 5G - ch 52~64, 100~140, 149~165
+                                                           
+@> SSID=value                	
+	value
+		0~z, 1~32 ascii characters.
+                    	
+@> WirelessMode=value
+	value	
+		0: legacy 11b/g mixed 
+		1: legacy 11B only 
+		2: legacy 11A only         //Not support in RfIcType=1(id=RFIC_5225) and RfIcType=2(id=RFIC_5325)
+		3: legacy 11a/b/g mixed     //Not support in RfIcType=1(id=RFIC_5225) and RfIcType=2(id=RFIC_5325)
+		4: legacy 11G only
+		5: 11ABGN mixed
+		6: 11N only
+		7: 11GN mixed
+		8: 11AN mixed
+		9: 11BGN mixed
+	   10: 11AGN mixed	
+                     
+@> Channel=value
+	value
+		depends on CountryRegion or CountryRegionABand
+                    	
+@> BGProtection=value
+	value
+		0: Auto 
+		1: Always on 
+		2: Always off
+                    	
+@> TxPreamble=value
+  	value
+		0:Preamble Long
+		1:Preamble Short 
+		2:Auto
+                    	
+@> RTSThreshold=value
+	value
+		1~2347                                                       
+                    	                                       
+@> FragThreshold=value
+	value       	
+		256~2346
+                    	
+@> TxBurst=value
+	value
+		0: Disable
+		1: Enable
+
+@> NetworkType=value	    		
+	value 
+		Infra: infrastructure mode
+       	Adhoc: adhoc mode
+                                                                                                                                                        	                                                          
+@> AuthMode=value
+	value
+		OPEN	 	For open system	
+		SHARED	  	For shared key system	
+		WEPAUTO     Auto switch between OPEN and SHARED
+		WPAPSK      For WPA pre-shared key  (Infra)
+		WPA2PSK     For WPA2 pre-shared key (Infra)
+		WPANONE		For WPA pre-shared key  (Adhoc)
+		WPA         Use WPA-Supplicant
+		WPA2        Use WPA-Supplicant
+
+@> EncrypType=value
+	value
+		NONE		For AuthMode=OPEN                    
+		WEP			For AuthMode=OPEN or AuthMode=SHARED 
+		TKIP		For AuthMode=WPAPSK or WPA2PSK                    
+		AES			For AuthMode=WPAPSK or WPA2PSK                     
+		
+@> DefaultKeyID=value
+	value
+		1~4
+
+@> Key1=value
+    Key2=value
+    Key3=value
+    Key4=value
+	value
+		10 or 26 hexadecimal characters eg: 012345678
+        5 or 13 ascii characters eg: passd
+    (usage : "iwpriv" only)     
+
+@> Key1Type=vaule
+    Key2Type=value
+    Key3Type=vaule
+    Key4Type=vaule
+    value
+		0   hexadecimal type
+		1   assic type
+    (usage : reading profile only)
+
+@> Key1Str=value
+    Key2Str=value
+    Key3Str=vaule
+    Key4Str=vaule
+    value
+		10 or 26 characters (key type=0)
+		5 or 13 characters  (key type=1)
+    (usage : reading profile only)	
+
+@> WPAPSK=value              	
+	value
+		8~63 ASCII  		or 
+		64 HEX characters
+																                    																		
+@> WmmCapable=value
+	value
+		0: Disable WMM
+		1: Enable WMM
+        
+@> PSMode=value
+    value
+    	CAM			    Constantly Awake Mode
+		Max_PSP		    Max Power Savings
+		Fast_PSP		Power Save Mode
+
+@> FastRoaming=value
+	value
+		0				Disabled
+		1				Enabled
+
+@> RoamThreshold=value
+	value
+		Positive Interger(dBm)
+
+@> HT_RDG=value
+	value
+		0				Disabled
+		1				Enabled
+
+@> HT_EXTCHA=value (Extended Channel Switch Announcement)
+	value
+		0				Below
+		1 				Above
+
+@> HT_OpMode=value
+	value
+		0				HT mixed format
+		1				HT greenfield format
+
+@> HT_MpduDensity=value
+	value (based on 802.11n D2.0)
+		0: no restriction
+		1: 1/4 £gs
+		2: 1/2 £gs
+		3: 1 £gs
+		4: 2 £gs
+		5: 4 £gs
+		6: 8 £gs
+		7: 16 £gs
+
+@> HT_BW=value
+	value
+		0				20MHz
+		1				40MHz
+
+@> HT_AutoBA=value
+	value
+		0				Disabled
+		1				Enabled
+
+@> HT_BADecline
+	value
+		0				Disabled
+		1			    Enabled <Reject BA request from AP>
+
+@> HT_AMSDU=value
+	value
+		0				Disabled
+		1				Enabled
+
+@> HT_BAWinSize=value
+	value
+		1 ~ 64
+
+@> HT_GI=value
+	value
+		0				long GI
+		1				short GI
+
+@> HT_MCS=value
+	value
+		0 ~ 15
+		33: auto
+
+@> HT_MIMOPSMode=value
+	value (based on 802.11n D2.0)
+		0				Static SM Power Save Mode
+		1				Dynamic SM Power Save Mode
+		2				Reserved
+		3				SM enabled
+	(not fully support yet)
+
+@> EthConvertMode=value
+	value
+		dongle
+		clone
+		hybrid
+
+@> EthCloneMac=value
+	value
+		xx:xx:xx:xx:xx:xx
+
+@> IEEE80211H=value
+	value
+		0				Disabled
+		1				Enabled
+
+@> TGnWifiTest=value
+	value
+		0				Disabled
+		1				Enabled
+
+@> WirelessEvent=value
+	value
+		0				Disabled
+		1				Enabled <send custom wireless event>
+	    
+@> MeshId=value
+	value
+		Length 1~32 ascii characters
+
+@> MeshAutoLink=value
+	value
+		0				Disabled
+		1				Enabled
+
+@> MeshAuthMode=value
+	value
+		OPEN	 	For open system	
+		WPANONE		For WPA pre-shared key  (Adhoc)
+
+@> MeshEncrypType=value
+	value
+		NONE		For MeshAuthMode=OPEN                    
+		WEP			For MeshAuthMode=OPEN
+		TKIP		For MeshAuthMode=WPANONE
+		AES			For MeshAuthMode=WPANONE
+
+@> MeshWPAKEY=value
+	value
+		8~63 ASCII  		or 
+		64 HEX characters
+
+@> MeshDefaultkey=value
+	value
+		1~4
+
+@> MeshWEPKEY=value
+	value
+		10 or 26 characters
+		5 or 13 characters
+
+@> CarrierDetect=value
+	value
+		0				Disabled
+		1				Enabled
+
+MORE INFORMATION
+=================================================================================
+If you want for rt2870 driver to auto-load at boot time:
+A) choose ra0 for first RT2870 WLAN card, ra1 for second RT2870 WLAN card, etc.
+   
+B) create(edit) 'ifcfg-ra0' file in /etc/sysconfig/network-scripts/,      
+   edit( or add the line) in /etc/modules.conf:
+       alias ra0 rt2870sta
+   
+C) edit(create) the file /etc/sysconfig/network-scripts/ifcfg-ra0  
+   DEVICE='ra0'
+   ONBOOT='yes'     
+
+
+NOTE:
+   if you use dhcp, add this line too .
+    BOOTPROTO='dhcp'
+
+*D) To ease the Default Gateway setting, 
+    add the line
+    GATEWAY=x.x.x.x   
+    in /etc/sysconfig/network
+   
+=======================================================================
+Dongle/Clone Features:
+======================
+A) Dongle mode: 
+   	Provides a 1-to-N MAC address mapping mechanism such that more than one PC behind the STA 
+   	can transparently connect to the AP.
+
+B) Clone mode:
+	Provides a 1-to-1 MAC address mapping mechanism. 
+	STA can use own MAC as SA MAC or 
+			use user desired MAC as SA MAC or
+		    use source MAC of first packet coming from wired device as SA MAC.
+	NOTE: In this mode, only the PC who own the specified MAC can connect to the AP.
+
+ 
+C) Hybrid mode(Dongle+Clone):
+	Provides a 1-to-N MAC address mapping mechanism such that more than one PC behind the STA 
+   	can transparently connect to the AP.
+	STA can use own MAC as SA MAC or 
+			use user desired MAC as SA MAC or
+		    use source MAC of first packet coming from wired device as SA MAC.
+
+D) Please refer to "Config STA to link as dongle mode..." in iwpriv_usage.txt for releated commands.
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/RT2870STACard.dat linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/RT2870STACard.dat
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/RT2870STACard.dat	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/RT2870STACard.dat	2017-09-23 03:42:49.842675602 +0800
@@ -0,0 +1,19 @@
+#The word of "Default" must not be removed, maximum 32 cards, 00 ~ 31
+Default
+
+#CARDID, MAC, CARDTYPE
+SELECT=CARDTYPE
+
+00CARDID=/etc/Wireless/RT2870STA/RT2870STA1.dat
+01CARDID=/etc/Wireless/RT2870STA/RT2870STA2.dat
+02CARDID=/etc/Wireless/RT2870STA/RT2870STA3.dat
+
+00MAC00:0E:2E:C3:D0:48=/etc/Wireless/RT2870STA/RT2870STA1.dat
+01MAC00:40:F4:FF:AA:40=/etc/Wireless/RT2870STA/RT2870STA2.dat
+02MAC00:0C:43:10:11:5C=/etc/Wireless/RT2870STA/RT2870STA3.dat
+
+00CARDTYPEbgn=/etc/Wireless/RT2870STA/RT2870STA1.dat
+01CARDTYPEbgn=/etc/Wireless/RT2870STA/RT2870STA2.dat
+02CARDTYPEabgn=/etc/Wireless/RT2870STA/RT2870STA3.dat
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/RT2870STA.dat linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/RT2870STA.dat
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/RT2870STA.dat	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/RT2870STA.dat	2017-09-23 03:42:49.842675602 +0800
@@ -0,0 +1,79 @@
+#The word of "Default" must not be removed
+Default
+CountryRegion=5
+CountryRegionABand=7
+CountryCode=
+ChannelGeography=1
+SSID=11n-AP
+NetworkType=Infra
+WirelessMode=5
+Channel=0
+BeaconPeriod=100
+TxPower=100
+BGProtection=0
+TxPreamble=0
+RTSThreshold=2347
+FragThreshold=2346
+TxBurst=1
+PktAggregate=0
+WmmCapable=1
+AckPolicy=0;0;0;0
+AuthMode=OPEN
+EncrypType=NONE
+WPAPSK=
+DefaultKeyID=1
+Key1Type=0
+Key1Str=
+Key2Type=0
+Key2Str=
+Key3Type=0
+Key3Str=
+Key4Type=0
+Key4Str=
+PSMode=CAM
+AutoRoaming=0
+RoamThreshold=70
+APSDCapable=0
+APSDAC=0;0;0;0
+HT_RDG=1
+HT_EXTCHA=0
+HT_OpMode=0
+HT_MpduDensity=4
+HT_BW=1
+HT_BADecline=0
+HT_AutoBA=1
+HT_AMSDU=0
+HT_BAWinSize=64
+HT_GI=1
+HT_MCS=33
+HT_MIMOPSMode=3
+HT_DisallowTKIP=1
+HT_STBC=0
+EthConvertMode=
+EthCloneMac=
+IEEE80211H=0
+TGnWifiTest=0
+WirelessEvent=0
+MeshId=MESH
+MeshAutoLink=1
+MeshAuthMode=OPEN
+MeshEncrypType=NONE
+MeshWPAKEY=
+MeshDefaultkey=1
+MeshWEPKEY=
+CarrierDetect=0
+AntDiversity=0
+BeaconLostTime=4
+FtSupport=0
+Wapiifname=ra0
+WapiPsk=
+WapiPskType=
+WapiUserCertPath=
+WapiAsCertPath=
+PSP_XLINK_MODE=0
+WscManufacturer=
+WscModelName=
+WscDeviceName=
+WscModelNumber=
+WscSerialNumber=
+RadioOn=1
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/sta/ags.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/sta/ags.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/sta/ags.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/sta/ags.c	2017-09-23 03:42:49.842675602 +0800
@@ -0,0 +1,1389 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#define MODULE_AGS
+#include "rt_config.h"
+    
+#ifdef AGS_SUPPORT
+    
+
+/* */
+/* AGS: 1x1 HT-capable rate table */
+/* */
+    UCHAR AGS1x1HTRateTable[] = 
+ {
+	
+	    /* */
+	    /* [Item no.] [Mode]* [CurrMCS] [TrainUp] [TrainDown] [downMCS  ] [upMCS3] [upMCS2] [upMCS1] */
+	    /* */
+	    /* [Mode]*: */
+	    /* bit0: STBC */
+	    /* bit1: Short GI */
+	    /* bit2: BW */
+	    /* bit4~bit5: Mode (0:CCK, 1:OFDM, 2:HT Mix, 3:HT GF) */
+	    /* */
+	    0x09, 0x08, 0, 0, 0, 0, 0, 0, 0,	/* Initial used item after association: the number of rate indexes, the initial mcs */
+	    0x00, 0x21, 0, 30, 101, 0, 16, 8, 1,	/* MCS 0 */
+	    0x01, 0x21, 1, 20, 50, 0, 16, 9, 2,	/* MCS 1 */
+	    0x02, 0x21, 2, 20, 50, 1, 17, 9, 3,	/* MCS 2 */
+	    0x03, 0x21, 3, 15, 50, 2, 17, 10, 4,	/* MCS 3 */
+	    0x04, 0x21, 4, 15, 30, 3, 18, 11, 5,	/* MCS 4 */
+	    0x05, 0x21, 5, 10, 25, 4, 18, 12, 6,	/* MCS 5 */
+	    0x06, 0x21, 6, 8, 14, 5, 19, 12, 7,	/* MCS 6 */
+	    0x07, 0x21, 7, 8, 14, 6, 19, 12, 8,	/* MCS 7 */
+	    0x08, 0x23, 7, 8, 14, 7, 19, 12, 8,	/* MCS 7 + Short GI */
+};
+
+
+
+/* */
+/* AGS: 2x2 HT-capable rate table */
+/* */
+    UCHAR AGS2x2HTRateTable[] = 
+ {
+	
+	    /* */
+	    /* [Item no.] [Mode]* [CurrMCS] [TrainUp] [TrainDown] [downMCS  ] [upMCS3] [upMCS2] [upMCS1] */
+	    /* */
+	    /* [Mode]*: */
+	    /* bit0: STBC */
+	    /* bit1: Short GI */
+	    /* bit2: BW */
+	    /* bit4~bit5: Mode (0:CCK, 1:OFDM, 2:HT Mix, 3:HT GF) */
+	    /* */
+	    0x11, 0x10, 0, 0, 0, 0, 0, 0, 0,	/* Initial used item after association: the number of rate indexes, the initial mcs */
+	    0x00, 0x21, 0, 30, 101, 0, 16, 8, 1,	/* MCS 0 */
+	    0x01, 0x21, 1, 20, 50, 0, 16, 9, 2,	/* MCS 1 */
+	    0x02, 0x21, 2, 20, 50, 1, 17, 9, 3,	/* MCS 2 */
+	    0x03, 0x21, 3, 15, 50, 2, 17, 10, 4,	/* MCS 3 */
+	    0x04, 0x21, 4, 15, 30, 3, 18, 11, 5,	/* MCS 4 */
+	    0x05, 0x21, 5, 10, 25, 4, 18, 12, 6,	/* MCS 5 */
+	    0x06, 0x21, 6, 8, 14, 5, 19, 12, 7,	/* MCS 6 */
+	    0x07, 0x21, 7, 8, 14, 6, 19, 12, 7,	/* MCS 7 */
+	    0x08, 0x20, 8, 30, 50, 0, 16, 9, 2,	/* MCS 8 */
+	    0x09, 0x20, 9, 20, 50, 8, 17, 10, 4,	/* MCS 9 */
+	    0x0A, 0x20, 10, 20, 50, 9, 18, 11, 5,	/* MCS 10 */
+	    0x0B, 0x20, 11, 15, 30, 10, 18, 12, 6,	/* MCS 11 */
+	    0x0C, 0x20, 12, 15, 30, 11, 20, 13, 12,	/* MCS 12 */
+	    0x0D, 0x20, 13, 8, 20, 12, 20, 14, 13,	/* MCS 13 */
+	    0x0E, 0x20, 14, 8, 18, 13, 21, 15, 14,	/* MCS 14 */
+	    0x0F, 0x20, 15, 8, 25, 14, 21, 16, 15,	/* MCS 15 */
+	    0x10, 0x22, 15, 8, 25, 15, 21, 16, 16,	/* MCS 15 + Short GI */
+};
+
+
+
+/* */
+/* AGS: 3x3 HT-capable rate table */
+/* */
+    UCHAR AGS3x3HTRateTable[] = 
+ {
+	
+	    /* */
+	    /* [Item no.] [Mode]* [CurrMCS] [TrainUp] [TrainDown] [downMCS  ] [upMCS3] [upMCS2] [upMCS1] */
+	    /* */
+	    /* [Mode]*: */
+	    /* bit0: STBC */
+	    /* bit1: Short GI */
+	    /* bit2: BW */
+	    /* bit4~bit5: Mode (0:CCK, 1:OFDM, 2:HT Mix, 3:HT GF) */
+	    /* */
+	    0x19, 0x18, 0, 0, 0, 0, 0, 0, 0,	/* Initial used item after association: the number of rate indexes, the initial mcs */
+	    0x00, 0x21, 0, 30, 101, 0, 16, 8, 1,	/* MCS 0 */
+	    0x01, 0x21, 1, 20, 50, 0, 16, 9, 2,	/* MCS 1 */
+	    0x02, 0x21, 2, 20, 50, 1, 17, 9, 3,	/* MCS 2 */
+	    0x03, 0x21, 3, 15, 50, 2, 17, 10, 4,	/* MCS 3 */
+	    0x04, 0x21, 4, 15, 30, 3, 18, 11, 5,	/* MCS 4 */
+	    0x05, 0x21, 5, 10, 25, 4, 18, 12, 6,	/* MCS 5 */
+	    0x06, 0x21, 6, 8, 14, 5, 19, 12, 7,	/* MCS 6 */
+	    0x07, 0x21, 7, 8, 14, 6, 19, 12, 7,	/* MCS 7 */
+	    0x08, 0x20, 8, 30, 50, 0, 16, 9, 2,	/* MCS 8 */
+	    0x09, 0x20, 9, 20, 50, 8, 17, 10, 4,	/* MCS 9 */
+	    0x0A, 0x20, 10, 20, 50, 9, 18, 11, 5,	/* MCS 10 */
+	    0x0B, 0x20, 11, 15, 30, 10, 18, 12, 6,	/* MCS 11 */
+	    0x0C, 0x20, 12, 15, 30, 11, 20, 13, 12,	/* MCS 12 */
+	    0x0D, 0x20, 13, 8, 20, 12, 20, 14, 13,	/* MCS 13 */
+	    0x0E, 0x20, 14, 8, 18, 13, 21, 15, 14,	/* MCS 14 */
+	    0x0F, 0x20, 15, 8, 14, 14, 21, 15, 15,	/* MCS 15 */
+	    0x10, 0x20, 16, 30, 50, 8, 17, 9, 3,	/* MCS 16 */
+	    0x11, 0x20, 17, 20, 50, 16, 18, 11, 5,	/* MCS 17 */
+	    0x12, 0x20, 18, 20, 50, 17, 19, 12, 7,	/* MCS 18 */
+	    0x13, 0x20, 19, 15, 30, 18, 20, 13, 19,	/* MCS 19 */
+	    0x14, 0x20, 20, 15, 30, 19, 21, 15, 20,	/* MCS 20 */
+	    0x15, 0x20, 21, 8, 20, 20, 22, 21, 21,	/* MCS 21 */
+	    0x16, 0x20, 22, 8, 20, 21, 23, 22, 22,	/* MCS 22 */
+	    0x17, 0x20, 23, 6, 18, 22, 24, 23, 23,	/* MCS 23 */
+	    0x18, 0x22, 23, 6, 14, 23, 24, 24, 24,	/* MCS 23 + Short GI */
+};
+
+
+
+
+INT Show_AGS_Proc(
+    IN  PRTMP_ADAPTER	pAd, 
+    IN  PSTRING			arg)
+{
+	MAC_TABLE_ENTRY *pEntry = &pAd->MacTab.Content[1];
+	UINT32 IdQuality;
+
+
+	printk("MCS Group\t\tMCS Index\n");
+	printk("%d\t\t\t%d\n\n", pEntry->AGSCtrl.MCSGroup, pEntry->CurrTxRateIndex);
+
+	printk("MCS Quality:\n");
+	for(IdQuality=0; IdQuality<=23; IdQuality++)
+		printk("%02d\t\t%d\n", IdQuality, pEntry->TxQuality[IdQuality]);
+
+	return TRUE;
+}
+
+
+/* */
+/* The dynamic Tx rate switching for AGS (Adaptive Group Switching) */
+/* */
+/* Parameters */
+/*	pAd: The adapter data structure */
+/*	pEntry: Pointer to a caller-supplied variable in which points to a MAC table entry */
+/*	pTable: Pointer to a caller-supplied variable in wich points to a Tx rate switching table */
+/*	TableSize: The size, in bytes, of the specified Tx rate switching table */
+/*	pAGSStatisticsInfo: Pointer to a caller-supplied variable in which points to the statistics information */
+/* */
+/* Return Value: */
+/*	None */
+/* */
+VOID MlmeDynamicTxRateSwitchingAGS(
+	IN PRTMP_ADAPTER pAd, 
+	IN PMAC_TABLE_ENTRY pEntry, 
+	IN PUCHAR pTable, 
+	IN UCHAR TableSize, 
+	IN PAGS_STATISTICS_INFO pAGSStatisticsInfo,
+	IN UCHAR InitTxRateIdx)
+{
+	UCHAR UpRateIdx = 0, DownRateIdx = 0, CurrRateIdx = 0;
+	BOOLEAN bTxRateChanged = TRUE, bUpgradeQuality = FALSE;
+	PRTMP_TX_RATE_SWITCH_AGS pCurrTxRate = NULL;
+	PRTMP_TX_RATE_SWITCH	pNextTxRate = NULL;
+	UCHAR TrainUp = 0, TrainDown = 0;
+	CHAR RssiOffset = 0;
+
+	DBGPRINT_RAW(RT_DEBUG_TRACE, ("\n\nAGS: ---> %s\n", __FUNCTION__));
+
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: QuickAGS: AccuTxTotalCnt = %lu, TxSuccess = %lu, TxRetransmit = %lu, TxFailCount = %lu, TxErrorRatio = %lu\n",
+		__FUNCTION__, 
+		pAGSStatisticsInfo->AccuTxTotalCnt, 
+		pAGSStatisticsInfo->TxSuccess, 
+		pAGSStatisticsInfo->TxRetransmit, 
+		pAGSStatisticsInfo->TxFailCount, 
+		pAGSStatisticsInfo->TxErrorRatio));
+
+	/* for 3*3, 1st time, pEntry->CurrTxRateIndex = 24 in StaAddMacTableEntry() */
+	CurrRateIdx = pEntry->CurrTxRateIndex;	
+
+	if (CurrRateIdx >= TableSize)
+	{
+		CurrRateIdx = TableSize - 1;
+	}
+
+	pCurrTxRate = (PRTMP_TX_RATE_SWITCH_AGS)(&pTable[(CurrRateIdx + 1) *
+												SIZE_OF_AGS_RATE_TABLE_ENTRY]);
+
+	/* */
+	/* Select the next upgrade rate and the next downgrade rate, if any */
+	/* */
+	do 
+	{
+		if (InitTxRateIdx == AGS3x3HTRateTable[1])
+		{
+			/* 3*3 table */
+			DBGPRINT_RAW(RT_DEBUG_TRACE,
+				("%s: AGS: pEntry->AGSCtrl.MCSGroup = %d, TxQuality2[%d] = %d,  "
+				"TxQuality1[%d] = %d, TxQuality0[%d] = %d, pCurrTxRate->upMcs1 = %d, "
+				"pCurrTxRate->ItemNo = %d\n",
+				__FUNCTION__, 
+				pEntry->AGSCtrl.MCSGroup, 
+				pCurrTxRate->upMcs3, 
+				pEntry->TxQuality[pCurrTxRate->upMcs3], 
+				pCurrTxRate->upMcs2, 
+				pEntry->TxQuality[pCurrTxRate->upMcs2], 
+				pCurrTxRate->upMcs1, 
+				pEntry->TxQuality[pCurrTxRate->upMcs1], 
+				pCurrTxRate->upMcs1, 
+				pCurrTxRate->ItemNo));
+
+			/* */
+			/* 3x3 peer device (Adhoc, DLS or AP) */
+			/* */
+			/* for 3*3, pEntry->AGSCtrl.MCSGroup = 0, 3, 3, 3, ... */
+			switch (pEntry->AGSCtrl.MCSGroup)
+			{
+				case 0: /* MCS selection in round robin policy (different MCS group) */
+				{
+					UpRateIdx = pCurrTxRate->upMcs3;
+					DBGPRINT_RAW(RT_DEBUG_TRACE,
+							("ags> MCSGroup = 0; UpRateIdx = %d in group 3 is better.\n",
+							UpRateIdx));
+
+					/* MCS group #2 has better Tx quality */
+					if ((pEntry->TxQuality[UpRateIdx] >
+								pEntry->TxQuality[pCurrTxRate->upMcs2]) && 
+					     (pCurrTxRate->upMcs2 != pCurrTxRate->ItemNo))
+					{
+						/* quality for group 2 is better */
+						UpRateIdx = pCurrTxRate->upMcs2;
+
+						DBGPRINT_RAW(RT_DEBUG_TRACE,
+							("ags> MCSGroup = 0; UpRateIdx = %d in group 2 is better.\n",
+							UpRateIdx));
+					}
+
+					/* MCS group #1 has better Tx quality */
+					if ((pEntry->TxQuality[UpRateIdx] >
+								pEntry->TxQuality[pCurrTxRate->upMcs1]) && 
+					     (pCurrTxRate->upMcs1 != pCurrTxRate->ItemNo))
+					{
+						/* quality for group 1 is better */
+						UpRateIdx = pCurrTxRate->upMcs1;
+
+						DBGPRINT_RAW(RT_DEBUG_TRACE,
+							("ags> MCSGroup = 0; UpRateIdx = %d in group 1 is better.\n",
+							UpRateIdx));
+					}
+				}
+				break;
+				
+				case 3:
+				{
+					UpRateIdx = pCurrTxRate->upMcs3;
+
+					DBGPRINT_RAW(RT_DEBUG_TRACE,
+							("ags> MCSGroup = 3; UpRateIdx = %d\n",
+							UpRateIdx));
+				}
+				break;
+				
+				case 2:
+				{
+					UpRateIdx = pCurrTxRate->upMcs2;
+
+					DBGPRINT_RAW(RT_DEBUG_TRACE,
+							("ags> MCSGroup = 2; UpRateIdx = %d\n",
+							UpRateIdx));
+				}
+				break;
+				
+				case 1:
+				{
+					UpRateIdx = pCurrTxRate->upMcs1;
+
+					DBGPRINT_RAW(RT_DEBUG_TRACE,
+							("ags> MCSGroup = 1; UpRateIdx = %d\n",
+							UpRateIdx));
+				}
+				break;
+				
+				default:
+				{
+					DBGPRINT_RAW(RT_DEBUG_ERROR,
+						("%s: AGS: [3x3 peer device (Adhoc, DLS or AP)], "
+						"Incorrect MCS group, pEntry->AGSCtrl.MCSGroup = %d\n", 
+						__FUNCTION__, 
+						pEntry->AGSCtrl.MCSGroup));
+				}
+				break;
+			}			
+
+			if ((pEntry->AGSCtrl.MCSGroup == 0) && 
+			     (((pEntry->TxQuality[pCurrTxRate->upMcs3] >
+						pEntry->TxQuality[pCurrTxRate->upMcs2]) &&
+					(pCurrTxRate->upMcs2 != pCurrTxRate->ItemNo)) || 
+			     ((pEntry->TxQuality[pCurrTxRate->upMcs3] >
+						pEntry->TxQuality[pCurrTxRate->upMcs1]) &&
+					(pCurrTxRate->upMcs1 != pCurrTxRate->ItemNo))))
+			{
+				/* quality of group 2 or 1 is better than group 3 */
+				/* just show debug information here */
+				DBGPRINT_RAW(RT_DEBUG_TRACE,
+					("%s: ###################################################"
+					"#######################\n", 
+					__FUNCTION__));
+
+				DBGPRINT_RAW(RT_DEBUG_TRACE,
+					("%s: AGS: [3x3 peer device (Adhoc, DLS or AP)], Before - "
+					"pEntry->AGSCtrl.MCSGroup = %d, TxQuality2[%d] = %d,  "
+					"TxQuality1[%d] = %d, TxQuality0[%d] = %d\n",
+					__FUNCTION__, 
+					pEntry->AGSCtrl.MCSGroup, 
+					pCurrTxRate->upMcs3, 
+					pEntry->TxQuality[pCurrTxRate->upMcs3], 
+					pCurrTxRate->upMcs2, 
+					pEntry->TxQuality[pCurrTxRate->upMcs2], 
+					pCurrTxRate->upMcs1, 
+					pEntry->TxQuality[pCurrTxRate->upMcs1]));
+			}
+		}
+		else if (InitTxRateIdx == AGS2x2HTRateTable[1])
+		{
+			/* 2*2 table */
+
+			DBGPRINT_RAW(RT_DEBUG_TRACE,
+				("%s: AGS: pEntry->AGSCtrl.MCSGroup = %d, TxQuality1[%d] = %d, "
+				"TxQuality0[%d] = %d, pCurrTxRate->upMcs1 = %d, "
+				"pCurrTxRate->ItemNo = %d\n",
+				__FUNCTION__, 
+				pEntry->AGSCtrl.MCSGroup, 
+				pCurrTxRate->upMcs2, 
+				pEntry->TxQuality[pCurrTxRate->upMcs2], 
+				pCurrTxRate->upMcs1, 
+				pEntry->TxQuality[pCurrTxRate->upMcs1], 
+				pCurrTxRate->upMcs1, 
+				pCurrTxRate->ItemNo));
+
+			/* */
+			/* 2x2 peer device (Adhoc, DLS or AP) */
+			/* */
+			switch (pEntry->AGSCtrl.MCSGroup)
+			{
+				case 0: /* MCS selection in round robin policy */
+				{
+					UpRateIdx = pCurrTxRate->upMcs2;
+
+					/* MCS group #1 has better Tx quality */
+					if ((pEntry->TxQuality[UpRateIdx] >
+								pEntry->TxQuality[pCurrTxRate->upMcs1]) && 
+					     (pCurrTxRate->upMcs1 != pCurrTxRate->ItemNo))
+					{
+						UpRateIdx = pCurrTxRate->upMcs1;
+					}
+				}
+				break;
+				
+				case 2:
+				{
+					UpRateIdx = pCurrTxRate->upMcs2;
+				}
+				break;
+				
+				case 1:
+				{
+					UpRateIdx = pCurrTxRate->upMcs1;
+				}
+				break;
+				
+				default:
+				{
+					DBGPRINT_RAW(RT_DEBUG_ERROR,
+						("%s: AGS: [2x2 peer device (Adhoc, DLS or AP)], "
+						"Incorrect MCS group, pEntry->AGSCtrl.MCSGroup = %d\n", 
+						__FUNCTION__, 
+						pEntry->AGSCtrl.MCSGroup));
+				}
+				break;
+			}	
+
+			if ((pEntry->AGSCtrl.MCSGroup == 0) && 
+			     ((pEntry->TxQuality[pCurrTxRate->upMcs2] >
+					pEntry->TxQuality[pCurrTxRate->upMcs1]) &&
+					(pCurrTxRate->upMcs1 != pCurrTxRate->ItemNo)))
+			{
+				DBGPRINT_RAW(RT_DEBUG_TRACE,
+					("%s: ###################################################"
+					"#######################\n", 
+					__FUNCTION__));
+
+				DBGPRINT_RAW(RT_DEBUG_TRACE,
+					("%s: AGS: [2x2 peer device (Adhoc, DLS or AP)], Before - "
+					"pEntry->AGSCtrl.MCSGroup = %d, TxQuality1[%d] = %d, "
+					"TxQuality0[%d] = %d\n",
+					__FUNCTION__, 
+					pEntry->AGSCtrl.MCSGroup, 
+					pCurrTxRate->upMcs2, 
+					pEntry->TxQuality[pCurrTxRate->upMcs2], 
+					pCurrTxRate->upMcs1, 
+					pEntry->TxQuality[pCurrTxRate->upMcs1]));
+			}
+		} 
+		else 
+		{
+			/* */
+			/* 1x1 peer device (Adhoc, DLS or AP) */
+			/* */
+			switch (pEntry->AGSCtrl.MCSGroup)
+			{
+				case 1:
+				case 0:
+				{
+					UpRateIdx = pCurrTxRate->upMcs1;
+				}
+				break;
+				
+				default:
+				{
+					DBGPRINT_RAW(RT_DEBUG_ERROR,
+						("%s: AGS: [1x1 peer device (Adhoc, DLS or AP)], "
+						"Incorrect MCS group, pEntry->AGSCtrl.MCSGroup = %d\n", 
+						__FUNCTION__, 
+						pEntry->AGSCtrl.MCSGroup));
+				}
+				break;
+			}	
+		}
+
+
+		/* */
+		/* The STA uses the best Tx rate at this moment. */
+		/* */
+		if (UpRateIdx == pEntry->CurrTxRateIndex)
+		{
+			/* current rate is the best one */
+			pEntry->AGSCtrl.MCSGroup = 0; /* Try to escape the local optima */
+
+			DBGPRINT_RAW(RT_DEBUG_TRACE,
+						("ags> Current rate is the best one!\n"));
+			break;
+		}
+		
+		if ((pEntry->TxQuality[UpRateIdx] > 0) &&
+			(pEntry->AGSCtrl.MCSGroup > 0))
+		{
+			/*
+				Quality of up rate is bad try to use lower group.
+				So continue to get the up rate index.
+			*/
+			pEntry->AGSCtrl.MCSGroup--; /* Try to use the MCS of the lower MCS group */
+		}
+		else
+		{
+			break;
+		}
+	} while (1);
+
+
+	DownRateIdx = pCurrTxRate->downMcs;
+
+	DBGPRINT_RAW(RT_DEBUG_TRACE,
+				("ags> UpRateIdx = %d, DownRateIdx = %d\n",
+				UpRateIdx, DownRateIdx));
+
+#ifdef DOT11_N_SUPPORT
+	if ((pAGSStatisticsInfo->RSSI > -65) &&
+		(pCurrTxRate->Mode >= MODE_HTMIX))
+	{
+		TrainUp = (pCurrTxRate->TrainUp + (pCurrTxRate->TrainUp >> 1));
+		TrainDown	= (pCurrTxRate->TrainDown + (pCurrTxRate->TrainDown >> 1));
+	}
+	else
+#endif /* DOT11_N_SUPPORT */
+	{
+		TrainUp = pCurrTxRate->TrainUp;
+		TrainDown	= pCurrTxRate->TrainDown;
+	}
+
+	/* */
+	/* Keep the TxRateChangeAction status */
+	/* */
+	pEntry->LastTimeTxRateChangeAction = pEntry->LastSecTxRateChangeAction;
+
+
+
+	/* */
+	/* MCS selection based on the RSSI information when the Tx samples are fewer than 15. */
+	/* */
+	if (pAGSStatisticsInfo->AccuTxTotalCnt <= 15)
+	{
+		CHAR idx = 0;
+		UCHAR TxRateIdx;
+		UCHAR MCS0 = 0, MCS1 = 0, MCS2 = 0, MCS3 = 0, MCS4 = 0,  MCS5 =0, MCS6 = 0, MCS7 = 0;	
+		UCHAR MCS8 = 0, MCS9 = 0, MCS10 = 0, MCS11 = 0, MCS12 = 0, MCS13 = 0, MCS14 = 0, MCS15 = 0;
+		UCHAR MCS16 = 0, MCS17 = 0, MCS18 = 0, MCS19 = 0, MCS20 = 0, MCS21 = 0, MCS22 = 0, MCS23 = 0;
+
+		/* */
+		/* Check the existence and index of each needed MCS */
+		/* */
+		/* for 3*3, maximum is 0x19 columns */
+		while (idx < pTable[0])
+		{
+			pCurrTxRate = (PRTMP_TX_RATE_SWITCH_AGS)(&pTable[(idx + 1) * SIZE_OF_AGS_RATE_TABLE_ENTRY]);
+
+			if (pCurrTxRate->CurrMCS == MCS_0)
+			{
+				MCS0 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_1)
+			{
+				MCS1 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_2)
+			{
+				MCS2 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_3)
+			{
+				MCS3 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_4)
+			{
+				MCS4 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_5)
+			{
+			 	MCS5 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_6)
+			{
+			    MCS6 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_7)
+			{
+				MCS7 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_8)
+			{
+				MCS8 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_9)
+			{
+				MCS9 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_10)
+			{
+				MCS10 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_11)
+			{
+				MCS11 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_12)
+			{
+				MCS12 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_13)
+			{
+				MCS13 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_14)
+			{
+				MCS14 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_15)
+			{
+				MCS15 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_16)
+			{
+				MCS16 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_17)
+			{
+				MCS17 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_18)
+			{
+				MCS18 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_19)
+			{
+				MCS19 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_20)
+			{
+				MCS20 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_21)
+			{
+				MCS21 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_22)
+			{
+				MCS22 = idx;
+			}
+			else if (pCurrTxRate->CurrMCS == MCS_23)
+			{
+				MCS23 = idx;
+			}
+			
+			idx++;
+		}
+
+		RssiOffset = 0;
+		
+		if (InitTxRateIdx == AGS3x3HTRateTable[1])
+		{
+			/* */
+			/* 3x3 peer device (Adhoc, DLS or AP) */
+			/* */
+			if (MCS23 && (pAGSStatisticsInfo->RSSI > (-67 + RssiOffset)))
+			{
+				TxRateIdx = MCS23;
+			}
+			else if (MCS22 && (pAGSStatisticsInfo->RSSI > (-69 + RssiOffset)))
+			{
+				TxRateIdx = MCS22;
+			}
+			else if (MCS21 && (pAGSStatisticsInfo->RSSI > (-72 + RssiOffset)))
+			{
+				TxRateIdx = MCS21;
+			}
+			else if (MCS20 && (pAGSStatisticsInfo->RSSI > (-74 + RssiOffset)))
+			{
+				TxRateIdx = MCS20;
+			}
+			else if (MCS19 && (pAGSStatisticsInfo->RSSI > (-78 + RssiOffset)))
+			{
+				TxRateIdx = MCS19;
+			}
+			else if (MCS18 && (pAGSStatisticsInfo->RSSI > (-80 + RssiOffset)))
+			{
+				TxRateIdx = MCS18;
+			}
+			else if (MCS17 && (pAGSStatisticsInfo->RSSI > (-85 + RssiOffset)))
+			{
+				TxRateIdx = MCS17;
+			}
+			else
+			{
+				TxRateIdx = MCS16;
+			}
+
+			pEntry->AGSCtrl.MCSGroup = 3;
+
+			DBGPRINT_RAW(RT_DEBUG_TRACE,
+					("ags> Group3 RSSI = %d, TxRateIdx = %d\n",
+					pAGSStatisticsInfo->RSSI, TxRateIdx));
+		}
+		else if (InitTxRateIdx == AGS2x2HTRateTable[1])
+		{
+			/* */
+			/* 2x2 peer device (Adhoc, DLS or AP) */
+			/* */
+			if (MCS15 && (pAGSStatisticsInfo->RSSI > (-69 + RssiOffset)))
+			{
+				TxRateIdx = MCS15;
+			}
+			else if (MCS14 && (pAGSStatisticsInfo->RSSI > (-71 + RssiOffset)))
+			{
+				TxRateIdx = MCS14;
+			}
+			else if (MCS13 && (pAGSStatisticsInfo->RSSI > (-74 + RssiOffset)))
+			{
+				TxRateIdx = MCS13;
+			}
+			else if (MCS12 && (pAGSStatisticsInfo->RSSI > (-76 + RssiOffset)))
+			{
+				TxRateIdx = MCS12;
+			}
+			else if (MCS11 && (pAGSStatisticsInfo->RSSI > (-80 + RssiOffset)))
+			{
+				TxRateIdx = MCS11;
+			}
+			else if (MCS10 && (pAGSStatisticsInfo->RSSI > (-82 + RssiOffset)))
+			{
+				TxRateIdx = MCS10;
+			}
+			else if (MCS9 && (pAGSStatisticsInfo->RSSI > (-87 + RssiOffset)))
+			{
+				TxRateIdx = MCS9;
+			}
+			else
+			{
+				TxRateIdx = MCS8;
+			}
+			
+			pEntry->AGSCtrl.MCSGroup = 2;
+		} 
+		else 
+		{
+			/* */
+			/* 1x1 peer device (Adhoc, DLS or AP) */
+			/* */
+			if (MCS7 && (pAGSStatisticsInfo->RSSI > (-71 + RssiOffset)))
+			{
+				TxRateIdx = MCS7;
+			}
+			else if (MCS6 && (pAGSStatisticsInfo->RSSI > (-73 + RssiOffset)))
+			{
+				TxRateIdx = MCS6;
+			}
+			else if (MCS5 && (pAGSStatisticsInfo->RSSI > (-76 + RssiOffset)))
+			{
+				TxRateIdx = MCS5;
+			}
+			else if (MCS4 && (pAGSStatisticsInfo->RSSI > (-78 + RssiOffset)))
+			{
+				TxRateIdx = MCS4;
+			}
+			else if (MCS3 && (pAGSStatisticsInfo->RSSI > (-82 + RssiOffset)))
+			{
+				TxRateIdx = MCS3;
+			}
+			else if (MCS2 && (pAGSStatisticsInfo->RSSI > (-84 + RssiOffset)))
+			{
+				TxRateIdx = MCS2;
+			}
+			else if (MCS1 && (pAGSStatisticsInfo->RSSI > (-89 + RssiOffset)))
+			{
+				TxRateIdx = MCS1;
+			}
+			else
+			{
+				TxRateIdx = MCS0;
+			}
+			
+			pEntry->AGSCtrl.MCSGroup = 1;
+		}
+
+		pEntry->AGSCtrl.lastRateIdx = pEntry->CurrTxRateIndex;
+		pEntry->CurrTxRateIndex = TxRateIdx;
+
+		pNextTxRate = (PRTMP_TX_RATE_SWITCH)(&pTable[(pEntry->CurrTxRateIndex + 1) * SIZE_OF_AGS_RATE_TABLE_ENTRY]);
+		MlmeSetTxRate(pAd, pEntry, pNextTxRate);
+
+		RTMPZeroMemory(pEntry->TxQuality, (sizeof(USHORT) * MAX_STEP_OF_TX_RATE_SWITCH));
+		RTMPZeroMemory(pEntry->PER, (sizeof(UCHAR) * MAX_STEP_OF_TX_RATE_SWITCH));
+
+		pEntry->fLastSecAccordingRSSI = TRUE;			
+		/* reset all OneSecTx counters */
+		RESET_ONE_SEC_TX_CNT(pEntry);
+		return;
+	}
+
+
+	/* */
+	/* The MCS selection is based on the RSSI and skips the rate tuning this time. */
+	/* */
+	if (pEntry->fLastSecAccordingRSSI == TRUE)
+	{
+		pEntry->fLastSecAccordingRSSI = FALSE;
+		pEntry->LastSecTxRateChangeAction = 0;
+		/* reset all OneSecTx counters */
+		RESET_ONE_SEC_TX_CNT(pEntry);
+		
+		DBGPRINT_RAW(RT_DEBUG_TRACE,
+			("%s: AGS: The MCS selection is based on the RSSI, and skips "
+			"the rate tuning this time.\n", 
+			__FUNCTION__));
+
+		return;
+	}
+
+
+	DBGPRINT_RAW(RT_DEBUG_TRACE,
+				("%s: AGS: TrainUp:%d, TrainDown:%d\n",
+				__FUNCTION__, TrainUp, TrainDown));
+
+	do
+	{
+		BOOLEAN	bTrainUpDown = FALSE;
+
+		DBGPRINT_RAW(RT_DEBUG_TRACE,
+					("%s: AGS: TxQuality[CurrRateIdx(%d)] = %d, UpPenalty:%d\n",
+					__FUNCTION__, CurrRateIdx,
+					pEntry->TxQuality[CurrRateIdx], pEntry->TxRateUpPenalty));
+
+		if (pAGSStatisticsInfo->TxErrorRatio >= TrainDown) /* Poor quality */
+		{
+			/* error ratio too high, do rate down */
+			DBGPRINT_RAW(RT_DEBUG_TRACE,
+						("%s: AGS: (DOWN) TxErrorRatio >= TrainDown\n",__FUNCTION__));
+			bTrainUpDown = TRUE;
+			pEntry->TxQuality[CurrRateIdx] = AGS_TX_QUALITY_WORST_BOUND;
+		}
+		else if (pAGSStatisticsInfo->TxErrorRatio <= TrainUp) /* Good quality */
+		{
+			/* error ratio low, maybe rate up */
+			bTrainUpDown = TRUE;
+			bUpgradeQuality = TRUE;
+
+			DBGPRINT_RAW(RT_DEBUG_TRACE,
+				("%s: AGS: (UP) pEntry->TxQuality[CurrRateIdx] = %d, "
+				"pEntry->TxRateUpPenalty = %d\n",
+				__FUNCTION__, 
+				pEntry->TxQuality[CurrRateIdx], 
+				pEntry->TxRateUpPenalty));
+
+			if (pEntry->TxQuality[CurrRateIdx])
+			{
+				/* Good quality in the current Tx rate */
+				pEntry->TxQuality[CurrRateIdx]--;
+			}
+
+			if (pEntry->TxRateUpPenalty) /* no use for the parameter */
+			{
+				pEntry->TxRateUpPenalty--;
+			}
+			else
+			{
+				if (pEntry->TxQuality[pCurrTxRate->upMcs3] &&
+					(pCurrTxRate->upMcs3 != CurrRateIdx))
+				{
+					/* hope do rate up next time for the MCS */
+					pEntry->TxQuality[pCurrTxRate->upMcs3]--;
+				}
+				
+				if (pEntry->TxQuality[pCurrTxRate->upMcs2] &&
+					(pCurrTxRate->upMcs2 != CurrRateIdx))
+				{
+					/* hope do rate up next time for the MCS */
+					pEntry->TxQuality[pCurrTxRate->upMcs2]--;
+				}
+				
+				if (pEntry->TxQuality[pCurrTxRate->upMcs1] &&
+					(pCurrTxRate->upMcs1 != CurrRateIdx))
+				{
+					/* hope do rate up next time for the MCS */
+					pEntry->TxQuality[pCurrTxRate->upMcs1]--;
+				}
+			}
+		}
+		else if (pEntry->AGSCtrl.MCSGroup > 0) /*even if TxErrorRatio > TrainUp */
+		{
+			/* not bad and not good */
+			if (UpRateIdx != 0)
+			{
+				bTrainUpDown = TRUE;
+				
+				if (pEntry->TxQuality[CurrRateIdx])
+				{
+					/* Good quality in the current Tx rate */
+					pEntry->TxQuality[CurrRateIdx]--;
+				}
+
+				if (pEntry->TxQuality[UpRateIdx])
+				{
+					/* It may improve next train-up Tx rate's quality */
+					pEntry->TxQuality[UpRateIdx]--;
+				}
+
+				DBGPRINT_RAW(RT_DEBUG_TRACE, ("ags> not bad and not good\n"));
+			}
+		}
+
+		/* update error ratio for current MCS */
+		pEntry->PER[CurrRateIdx] = (UCHAR)(pAGSStatisticsInfo->TxErrorRatio);
+
+		/* */
+		/* Update the current Tx rate */
+		/* */
+		if (bTrainUpDown)
+		{
+			/* need to rate up or down */
+			DBGPRINT_RAW(RT_DEBUG_TRACE, ("%s: AGS: bTrainUpDown = %d, CurrRateIdx = %d, DownRateIdx = %d, UpRateIdx = %d, pEntry->TxQuality[CurrRateIdx] = %d, pEntry->TxQuality[UpRateIdx] = %d\n",
+				__FUNCTION__, 
+				bTrainUpDown, 
+				CurrRateIdx, 
+				DownRateIdx, 
+				UpRateIdx, 
+				pEntry->TxQuality[CurrRateIdx], 
+				pEntry->TxQuality[UpRateIdx]));
+			
+			/* Downgrade Tx rate */
+			if ((CurrRateIdx != DownRateIdx) && 
+			     (pEntry->TxQuality[CurrRateIdx] >= AGS_TX_QUALITY_WORST_BOUND))
+			{
+				pEntry->CurrTxRateIndex = DownRateIdx;
+				pEntry->LastSecTxRateChangeAction = 2; /* Tx rate down */
+				DBGPRINT_RAW(RT_DEBUG_TRACE, ("ags> rate down!\n"));
+			}
+			else if ((CurrRateIdx != UpRateIdx) && 
+					(pEntry->TxQuality[UpRateIdx] <= 0)) /* Upgrade Tx rate */
+			{
+				pEntry->CurrTxRateIndex = UpRateIdx;
+				pEntry->LastSecTxRateChangeAction = 1; /* Tx rate up */
+				DBGPRINT_RAW(RT_DEBUG_TRACE, ("ags> rate up!\n"));
+			}
+		}
+	} while (FALSE);
+
+
+	DBGPRINT_RAW(RT_DEBUG_TRACE, ("%s: AGS: pEntry->CurrTxRateIndex = %d, CurrRateIdx = %d, pEntry->LastSecTxRateChangeAction = %d\n", 
+		__FUNCTION__, 
+		pEntry->CurrTxRateIndex, 
+		CurrRateIdx, 
+		pEntry->LastSecTxRateChangeAction));
+
+	/* rate up/down post handle */
+	/* Tx rate up */
+	if ((pEntry->CurrTxRateIndex != CurrRateIdx) && 
+	     (pEntry->LastSecTxRateChangeAction == 1))
+	{
+		DBGPRINT_RAW(RT_DEBUG_TRACE, ("%s: AGS: ++TX rate from %d to %d\n", 
+			__FUNCTION__, 
+			CurrRateIdx, 
+			pEntry->CurrTxRateIndex));
+		
+		pEntry->TxRateUpPenalty = 0;
+		pEntry->LastSecTxRateChangeAction = 1; /* Tx rate up */
+		RTMPZeroMemory(pEntry->PER, sizeof(UCHAR) * MAX_STEP_OF_TX_RATE_SWITCH);
+		pEntry->AGSCtrl.lastRateIdx = CurrRateIdx;
+
+		/* */
+		/* Tx rate fast train up */
+		/* */
+		if (!pAd->StaCfg.StaQuickResponeForRateUpTimerRunning)
+		{
+			RTMPSetTimer(&pAd->StaCfg.StaQuickResponeForRateUpTimer, 100);
+
+			pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = TRUE;
+		}
+
+		bTxRateChanged = TRUE;
+	}
+	else if ((pEntry->CurrTxRateIndex != CurrRateIdx) && 
+	             (pEntry->LastSecTxRateChangeAction == 2)) /* Tx rate down */
+	{
+		DBGPRINT_RAW(RT_DEBUG_TRACE, ("%s: AGS: --TX rate from %d to %d\n", 
+			__FUNCTION__, 
+			CurrRateIdx, 
+			pEntry->CurrTxRateIndex));
+		
+		pEntry->TxRateUpPenalty = 0; /* No penalty */
+		pEntry->LastSecTxRateChangeAction = 2; /* Tx rate down */
+		pEntry->TxQuality[pEntry->CurrTxRateIndex] = 0;
+		pEntry->PER[pEntry->CurrTxRateIndex] = 0;
+		pEntry->AGSCtrl.lastRateIdx = CurrRateIdx;
+
+		/* */
+		/* Tx rate fast train down */
+		/* */
+		if (!pAd->StaCfg.StaQuickResponeForRateUpTimerRunning)
+		{
+			RTMPSetTimer(&pAd->StaCfg.StaQuickResponeForRateUpTimer, 100);
+		
+			pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = TRUE;
+		}
+
+		bTxRateChanged = TRUE;
+	}
+	else /* Tx rate remains unchanged. */
+	{
+		pEntry->LastSecTxRateChangeAction = 0; /* Tx rate remains unchanged. */
+		bTxRateChanged = FALSE;
+		DBGPRINT_RAW(RT_DEBUG_TRACE, ("ags> no rate up/down!\n"));
+	}
+
+	pEntry->LastTxOkCount = pAGSStatisticsInfo->TxSuccess;
+
+	/* set new tx rate */
+	pNextTxRate = (PRTMP_TX_RATE_SWITCH)\
+									(&pTable[(pEntry->CurrTxRateIndex + 1) *
+									SIZE_OF_AGS_RATE_TABLE_ENTRY]);
+
+	if ((bTxRateChanged == TRUE) && (pNextTxRate != NULL))
+	{
+		DBGPRINT_RAW(RT_DEBUG_TRACE,
+					("ags> set new rate MCS = %d!\n", pEntry->CurrTxRateIndex));
+		MlmeSetTxRate(pAd, pEntry, pNextTxRate);
+	}
+
+	/* */
+	/* RDG threshold control for the infrastructure mode only */
+	/* */
+/*	if (INFRA_ON(pAd) && (pAd->OpMode == OPMODE_STA) && (!DLS_ON(pAd)) && (!TDLS_ON(pAd))) */
+	if (INFRA_ON(pAd))
+	{
+		if ((pAd->CommonCfg.bRdg == TRUE) &&
+			CLIENT_STATUS_TEST_FLAG(&pAd->MacTab.Content[BSSID_WCID],
+									fCLIENT_STATUS_RDG_CAPABLE)) /* RDG capable */
+		{
+			TXOP_THRESHOLD_CFG_STRUC TxopThCfg = {{0}};
+			TX_LINK_CFG_STRUC TxLinkCfg = {{0}};
+			
+			if ((pAd->RalinkCounters.OneSecReceivedByteCount > (pAd->RalinkCounters.OneSecTransmittedByteCount * 5)) && 
+			     (pNextTxRate->CurrMCS != MCS_23) && 
+			     ((pAd->RalinkCounters.OneSecReceivedByteCount + pAd->RalinkCounters.OneSecTransmittedByteCount) >= (50 * 1024)))
+			{
+				RTMP_IO_READ32(pAd, TX_LINK_CFG, &TxLinkCfg.word);
+				TxLinkCfg.field.TxRDGEn = 0;
+				RTMP_IO_WRITE32(pAd, TX_LINK_CFG, TxLinkCfg.word);
+
+				RTMP_IO_READ32(pAd, TXOP_THRES_CFG, &TxopThCfg.word);
+				TxopThCfg.field.RDG_IN_THRES = 0xFF; /* Similar to diable Rx RDG */
+				TxopThCfg.field.RDG_OUT_THRES = 0x00;
+				RTMP_IO_WRITE32(pAd, TXOP_THRES_CFG, TxopThCfg.word);
+
+				DBGPRINT_RAW(RT_DEBUG_TRACE, ("AGS: %s: RDG_IN_THRES = 0xFF\n", __FUNCTION__));
+			}
+			else
+			{
+				RTMP_IO_READ32(pAd, TX_LINK_CFG, &TxLinkCfg.word);
+				TxLinkCfg.field.TxRDGEn = 1;
+				RTMP_IO_WRITE32(pAd, TX_LINK_CFG, TxLinkCfg.word);
+
+				RTMP_IO_READ32(pAd, TXOP_THRES_CFG, &TxopThCfg.word);
+				TxopThCfg.field.RDG_IN_THRES = 0x00;
+				TxopThCfg.field.RDG_OUT_THRES = 0x00;
+				RTMP_IO_WRITE32(pAd, TXOP_THRES_CFG, TxopThCfg.word);
+
+				DBGPRINT_RAW(RT_DEBUG_TRACE, ("AGS: %s: RDG_IN_THRES = 0x00\n", __FUNCTION__));
+			}
+		}
+	}
+
+	/* reset all OneSecTx counters */
+	RESET_ONE_SEC_TX_CNT(pEntry);
+
+	DBGPRINT_RAW(RT_DEBUG_TRACE, ("AGS: <--- %s\n", __FUNCTION__));
+}
+
+/* */
+/* Auto Tx rate faster train up/down for AGS (Adaptive Group Switching) */
+/* */
+/* Parameters */
+/*	pAd: The adapter data structure */
+/*	pEntry: Pointer to a caller-supplied variable in which points to a MAC table entry */
+/*	pTable: Pointer to a caller-supplied variable in wich points to a Tx rate switching table */
+/*	TableSize: The size, in bytes, of the specified Tx rate switching table */
+/*	pAGSStatisticsInfo: Pointer to a caller-supplied variable in which points to the statistics information */
+/* */
+/* Return Value: */
+/*	None */
+/* */
+VOID StaQuickResponeForRateUpExecAGS(
+	IN PRTMP_ADAPTER pAd, 
+	IN PMAC_TABLE_ENTRY pEntry, 
+	IN PUCHAR pTable, 
+	IN UCHAR TableSize, 
+	IN PAGS_STATISTICS_INFO pAGSStatisticsInfo,
+	IN UCHAR InitTxRateIdx)
+{
+	UCHAR UpRateIdx = 0, DownRateIdx = 0, CurrRateIdx = 0;
+	BOOLEAN bTxRateChanged = TRUE;
+	PRTMP_TX_RATE_SWITCH_AGS pCurrTxRate = NULL;
+	PRTMP_TX_RATE_SWITCH	 pNextTxRate = NULL;
+	UCHAR TrainDown = 0, TrainUp = 0;
+	CHAR ratio = 0;
+	ULONG OneSecTxNoRetryOKRationCount = 0;
+
+
+	DBGPRINT_RAW(RT_DEBUG_TRACE, ("QuickAGS: ---> %s\n", __FUNCTION__));
+
+	pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
+
+	DBGPRINT(RT_DEBUG_TRACE,
+		("%s: QuickAGS: AccuTxTotalCnt = %lu, TxSuccess = %lu, "
+		"TxRetransmit = %lu, TxFailCount = %lu, TxErrorRatio = %lu\n",
+		__FUNCTION__, 
+		pAGSStatisticsInfo->AccuTxTotalCnt, 
+		pAGSStatisticsInfo->TxSuccess, 
+		pAGSStatisticsInfo->TxRetransmit, 
+		pAGSStatisticsInfo->TxFailCount, 
+		pAGSStatisticsInfo->TxErrorRatio));
+
+	CurrRateIdx = pEntry->CurrTxRateIndex;	
+
+	if (CurrRateIdx >= TableSize)
+	{
+		CurrRateIdx = TableSize - 1;
+	}
+
+	UpRateIdx = DownRateIdx = pEntry->AGSCtrl.lastRateIdx;
+
+	pCurrTxRate = (PRTMP_TX_RATE_SWITCH_AGS)(&pTable[(CurrRateIdx + 1) *
+												SIZE_OF_AGS_RATE_TABLE_ENTRY]);
+
+	if ((pAGSStatisticsInfo->RSSI > -65) && (pCurrTxRate->Mode >= MODE_HTMIX))
+	{
+		TrainUp = (pCurrTxRate->TrainUp + (pCurrTxRate->TrainUp >> 1));
+		TrainDown	= (pCurrTxRate->TrainDown + (pCurrTxRate->TrainDown >> 1));
+	}
+	else
+	{
+		TrainUp = pCurrTxRate->TrainUp;
+		TrainDown	= pCurrTxRate->TrainDown;
+	}
+		
+	/* */
+	/* MCS selection based on the RSSI information when the Tx samples are fewer than 15. */
+	/* */
+	if (pAGSStatisticsInfo->AccuTxTotalCnt <= 15)
+	{
+		RTMPZeroMemory(pEntry->TxQuality, sizeof(USHORT) * MAX_STEP_OF_TX_RATE_SWITCH);
+		RTMPZeroMemory(pEntry->PER, sizeof(UCHAR) * MAX_STEP_OF_TX_RATE_SWITCH);
+
+		if ((pEntry->LastSecTxRateChangeAction == 1) && (CurrRateIdx != DownRateIdx))
+		{
+			pEntry->CurrTxRateIndex = DownRateIdx;
+			pEntry->TxQuality[CurrRateIdx] = AGS_TX_QUALITY_WORST_BOUND;
+		}
+		else if ((pEntry->LastSecTxRateChangeAction == 2) && (CurrRateIdx != UpRateIdx))
+		{
+			pEntry->CurrTxRateIndex = UpRateIdx;
+		}
+
+		DBGPRINT_RAW(RT_DEBUG_TRACE, ("%s: QuickAGS: AccuTxTotalCnt <= 15, train back to original rate\n", 
+			__FUNCTION__));
+		
+		return;
+	}
+
+	do
+	{
+		if (pEntry->LastTimeTxRateChangeAction == 0)
+		{
+			ratio = 5;
+		}
+		else
+		{
+			ratio = 4;
+		}
+
+		if (pAGSStatisticsInfo->TxErrorRatio >= TrainDown) /* Poor quality */
+		{
+			pEntry->TxQuality[CurrRateIdx] = AGS_TX_QUALITY_WORST_BOUND;
+		}
+
+		pEntry->PER[CurrRateIdx] = (UCHAR)(pAGSStatisticsInfo->TxErrorRatio);
+
+		OneSecTxNoRetryOKRationCount = (pAGSStatisticsInfo->TxSuccess * ratio);
+		
+		/* Tx rate down */
+		if ((pEntry->LastSecTxRateChangeAction == 1) &&
+			(CurrRateIdx != DownRateIdx))
+		{
+			if ((pEntry->LastTxOkCount + 2) >= OneSecTxNoRetryOKRationCount) /* Poor quality */
+			{
+				pEntry->CurrTxRateIndex = DownRateIdx;
+				pEntry->TxQuality[CurrRateIdx] = AGS_TX_QUALITY_WORST_BOUND;
+
+				DBGPRINT_RAW(RT_DEBUG_TRACE, ("%s: QuickAGS: (UP) bad Tx ok count (L:%lu, C:%lu)\n", 
+					__FUNCTION__, 
+					pEntry->LastTxOkCount, 
+					OneSecTxNoRetryOKRationCount));
+			}
+			else /* Good quality */
+			{
+				DBGPRINT_RAW(RT_DEBUG_TRACE, ("%s: QuickAGS: (UP) keep rate-up (L:%lu, C:%lu)\n", 
+					__FUNCTION__, 
+					pEntry->LastTxOkCount, 
+					OneSecTxNoRetryOKRationCount));
+
+				RTMPZeroMemory(pEntry->TxQuality, sizeof(USHORT) * MAX_STEP_OF_TX_RATE_SWITCH);
+
+				if (pEntry->AGSCtrl.MCSGroup == 0)
+				{
+					if (InitTxRateIdx == AGS3x3HTRateTable[1])
+					{
+						/* */
+						/* 3x3 peer device (Adhoc, DLS or AP) */
+						/* */
+						pEntry->AGSCtrl.MCSGroup = 3;
+					}
+					else if (InitTxRateIdx == AGS2x2HTRateTable[1])
+					{
+						/* */
+						/* 2x2 peer device (Adhoc, DLS or AP) */
+						/* */
+						pEntry->AGSCtrl.MCSGroup = 2;
+					}
+					else
+					{
+						pEntry->AGSCtrl.MCSGroup = 1;
+					}
+				}
+			}
+		}
+		else if ((pEntry->LastSecTxRateChangeAction == 2) &&
+				(CurrRateIdx != UpRateIdx)) /* Tx rate up */
+		{
+			if ((pAGSStatisticsInfo->TxErrorRatio >= 50) ||
+				(pAGSStatisticsInfo->TxErrorRatio >= TrainDown)) /* Poor quality */
+			{
+				if (InitTxRateIdx == AGS3x3HTRateTable[1])
+				{
+					/* */
+					/* 3x3 peer device (Adhoc, DLS or AP) */
+					/* */
+					pEntry->AGSCtrl.MCSGroup = 3;
+				}
+				else if (InitTxRateIdx == AGS2x2HTRateTable[1])
+				{
+					/* */
+					/* 2x2 peer device (Adhoc, DLS or AP) */
+					/* */
+					pEntry->AGSCtrl.MCSGroup = 2;
+				}
+				else
+				{
+					pEntry->AGSCtrl.MCSGroup = 1;
+				}
+
+				DBGPRINT_RAW(RT_DEBUG_TRACE, ("%s: QuickAGS: (DOWN) direct train down (TxErrorRatio[%lu] >= TrainDown[%d])\n", 
+					__FUNCTION__, 
+					pAGSStatisticsInfo->TxErrorRatio, 
+					TrainDown));
+			}
+			else if ((pEntry->LastTxOkCount + 2) >= OneSecTxNoRetryOKRationCount)
+			{
+				pEntry->CurrTxRateIndex = UpRateIdx;
+				
+				DBGPRINT_RAW(RT_DEBUG_TRACE, ("%s: QuickAGS: (DOWN) bad tx ok count (L:%lu, C:%lu)\n", 
+					__FUNCTION__, 
+					pEntry->LastTxOkCount, 
+					OneSecTxNoRetryOKRationCount));
+			}
+			else
+			{
+				if (InitTxRateIdx == AGS3x3HTRateTable[1])
+				{
+					/* */
+					/* 3x3 peer device (Adhoc, DLS or AP) */
+					/* */
+					pEntry->AGSCtrl.MCSGroup = 3;
+				}
+				else if (InitTxRateIdx == AGS2x2HTRateTable[1])
+				{
+					/* */
+					/* 2x2 peer device (Adhoc, DLS or AP) */
+					/* */
+					pEntry->AGSCtrl.MCSGroup = 2;
+				}
+				else
+				{
+					pEntry->AGSCtrl.MCSGroup = 1;
+				}
+
+				DBGPRINT_RAW(RT_DEBUG_TRACE, ("%s: QuickAGS: (Down) keep rate-down (L:%lu, C:%lu)\n", 
+					__FUNCTION__, 
+					pEntry->LastTxOkCount, 
+					OneSecTxNoRetryOKRationCount));
+			}
+		}
+	}while (FALSE);
+
+	DBGPRINT_RAW(RT_DEBUG_TRACE,
+				("ags> new group = %d\n", pEntry->AGSCtrl.MCSGroup));
+
+	/* */
+	/* Last action is rate-up */
+	/* */
+	if (pEntry->LastSecTxRateChangeAction == 1) 
+	{
+		/* looking for the next group with valid MCS */
+		if ((pEntry->CurrTxRateIndex != CurrRateIdx) && (pEntry->AGSCtrl.MCSGroup > 0))
+		{
+			pEntry->AGSCtrl.MCSGroup--; /* Try to use the MCS of the lower MCS group */
+			pCurrTxRate = (PRTMP_TX_RATE_SWITCH_AGS)(&pTable[(DownRateIdx + 1) * SIZE_OF_AGS_RATE_TABLE_ENTRY]);
+		}
+		
+		/* UpRateIdx is for temp use in this section */
+		switch (pEntry->AGSCtrl.MCSGroup)
+		{
+			case 3: 
+			{
+				UpRateIdx = pCurrTxRate->upMcs3;
+			}
+			break;
+			
+			case 2: 
+			{
+				UpRateIdx = pCurrTxRate->upMcs2;
+			}
+			break;
+			
+			case 1: 
+			{
+				UpRateIdx = pCurrTxRate->upMcs1;
+			}
+			break;
+			
+			case 0: 
+			{
+				UpRateIdx = CurrRateIdx;
+			}
+			break;
+			
+			default: 
+			{
+				DBGPRINT_RAW(RT_DEBUG_TRACE, ("%s: QuickAGS: Incorrect MCS group, pEntry->AGSCtrl.MCSGroup = %d\n", 
+					__FUNCTION__, 
+					pEntry->AGSCtrl.MCSGroup));
+			}
+			break;
+		}
+
+		if (UpRateIdx == pEntry->CurrTxRateIndex)
+		{
+			pEntry->AGSCtrl.MCSGroup = 0; /* Try to escape the local optima */
+		}
+		
+		DBGPRINT_RAW(RT_DEBUG_TRACE, ("%s: QuickAGS: next MCS group,  pEntry->AGSCtrl.MCSGroup = %d\n", 
+			__FUNCTION__, 
+			pEntry->AGSCtrl.MCSGroup));
+		
+	}
+
+	if ((pEntry->CurrTxRateIndex != CurrRateIdx) && 
+	     (pEntry->LastSecTxRateChangeAction == 2)) /* Tx rate up */
+	{
+		DBGPRINT_RAW(RT_DEBUG_TRACE, ("%s: QuickAGS: ++TX rate from %d to %d\n", 
+			__FUNCTION__, 
+			CurrRateIdx, 
+			pEntry->CurrTxRateIndex));	
+		
+		pEntry->TxRateUpPenalty = 0;
+		pEntry->TxQuality[pEntry->CurrTxRateIndex] = 0; /*restore the TxQuality from max to 0 */
+		RTMPZeroMemory(pEntry->PER, sizeof(UCHAR) * MAX_STEP_OF_TX_RATE_SWITCH);
+	}
+	else if ((pEntry->CurrTxRateIndex != CurrRateIdx) && 
+	            (pEntry->LastSecTxRateChangeAction == 1)) /* Tx rate down */
+	{
+		DBGPRINT_RAW(RT_DEBUG_TRACE, ("%s: QuickAGS: --TX rate from %d to %d\n", 
+			__FUNCTION__, 
+			CurrRateIdx, 
+			pEntry->CurrTxRateIndex));
+		
+		pEntry->TxRateUpPenalty = 0; /* No penalty */
+		pEntry->TxQuality[pEntry->CurrTxRateIndex] = 0;
+		pEntry->PER[pEntry->CurrTxRateIndex] = 0;
+	}
+	else
+	{
+		bTxRateChanged = FALSE;
+		
+		DBGPRINT_RAW(RT_DEBUG_TRACE, ("%s: QuickAGS: rate is not changed\n", 
+			__FUNCTION__));
+	}
+
+	pNextTxRate = (PRTMP_TX_RATE_SWITCH)(&pTable[(pEntry->CurrTxRateIndex + 1) * SIZE_OF_AGS_RATE_TABLE_ENTRY]);
+	if ((bTxRateChanged == TRUE) && (pNextTxRate != NULL))
+	{
+		DBGPRINT_RAW(RT_DEBUG_TRACE,
+					("ags> confirm current rate MCS = %d!\n", pEntry->CurrTxRateIndex));
+
+		MlmeSetTxRate(pAd, pEntry, pNextTxRate);
+	}
+
+	/* reset all OneSecTx counters */
+	RESET_ONE_SEC_TX_CNT(pEntry);
+
+	DBGPRINT_RAW(RT_DEBUG_TRACE, ("QuickAGS: <--- %s\n", __FUNCTION__));
+}
+
+
+
+#endif	/* AGS_SUPPORT */
+    
+/* End of ags.c */ 
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/sta/assoc.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/sta/assoc.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/sta/assoc.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/sta/assoc.c	2017-09-23 03:42:49.846675590 +0800
@@ -0,0 +1,1999 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+UCHAR CipherWpaTemplate[] = {
+	0xdd,			/* WPA IE */
+	0x16,			/* Length */
+	0x00, 0x50, 0xf2, 0x01,	/* oui */
+	0x01, 0x00,		/* Version */
+	0x00, 0x50, 0xf2, 0x02,	/* Multicast */
+	0x01, 0x00,		/* Number of unicast */
+	0x00, 0x50, 0xf2, 0x02,	/* unicast */
+	0x01, 0x00,		/* number of authentication method */
+	0x00, 0x50, 0xf2, 0x01	/* authentication */
+};
+
+UCHAR CipherWpa2Template[] = {
+	0x30,			/* RSN IE */
+	0x14,			/* Length */
+	0x01, 0x00,		/* Version */
+	0x00, 0x0f, 0xac, 0x02,	/* group cipher, TKIP */
+	0x01, 0x00,		/* number of pairwise */
+	0x00, 0x0f, 0xac, 0x02,	/* unicast */
+	0x01, 0x00,		/* number of authentication method */
+	0x00, 0x0f, 0xac, 0x02,	/* authentication */
+	0x00, 0x00,		/* RSN capability */
+};
+
+/*  
+	==========================================================================
+	Description: 
+		association state machine init, including state transition and timer init
+	Parameters: 
+		S - pointer to the association state machine
+
+	IRQL = PASSIVE_LEVEL
+	
+	==========================================================================
+ */
+VOID AssocStateMachineInit(
+	IN PRTMP_ADAPTER pAd,
+	IN STATE_MACHINE *S,
+	OUT STATE_MACHINE_FUNC Trans[])
+{
+	StateMachineInit(S, Trans, MAX_ASSOC_STATE, MAX_ASSOC_MSG,
+			 (STATE_MACHINE_FUNC) Drop, ASSOC_IDLE,
+			 ASSOC_MACHINE_BASE);
+
+	/* first column */
+	StateMachineSetAction(S, ASSOC_IDLE, MT2_MLME_ASSOC_REQ,
+			      (STATE_MACHINE_FUNC) MlmeAssocReqAction);
+	StateMachineSetAction(S, ASSOC_IDLE, MT2_MLME_REASSOC_REQ,
+			      (STATE_MACHINE_FUNC) MlmeReassocReqAction);
+	StateMachineSetAction(S, ASSOC_IDLE, MT2_MLME_DISASSOC_REQ,
+			      (STATE_MACHINE_FUNC) MlmeDisassocReqAction);
+	StateMachineSetAction(S, ASSOC_IDLE, MT2_PEER_DISASSOC_REQ,
+			      (STATE_MACHINE_FUNC) PeerDisassocAction);
+
+	/* second column */
+	StateMachineSetAction(S, ASSOC_WAIT_RSP, MT2_MLME_ASSOC_REQ,
+			      (STATE_MACHINE_FUNC) InvalidStateWhenAssoc);
+	StateMachineSetAction(S, ASSOC_WAIT_RSP, MT2_MLME_REASSOC_REQ,
+			      (STATE_MACHINE_FUNC) InvalidStateWhenReassoc);
+	StateMachineSetAction(S, ASSOC_WAIT_RSP, MT2_MLME_DISASSOC_REQ,
+			      (STATE_MACHINE_FUNC)
+			      InvalidStateWhenDisassociate);
+	StateMachineSetAction(S, ASSOC_WAIT_RSP, MT2_PEER_DISASSOC_REQ,
+			      (STATE_MACHINE_FUNC) PeerDisassocAction);
+	StateMachineSetAction(S, ASSOC_WAIT_RSP, MT2_PEER_ASSOC_RSP,
+			      (STATE_MACHINE_FUNC) PeerAssocRspAction);
+	/* */
+	/* Patch 3Com AP MOde:3CRWE454G72 */
+	/* We send Assoc request frame to this AP, it always send Reassoc Rsp not Associate Rsp. */
+	/* */
+	StateMachineSetAction(S, ASSOC_WAIT_RSP, MT2_PEER_REASSOC_RSP,
+			      (STATE_MACHINE_FUNC) PeerAssocRspAction);
+	StateMachineSetAction(S, ASSOC_WAIT_RSP, MT2_ASSOC_TIMEOUT,
+			      (STATE_MACHINE_FUNC) AssocTimeoutAction);
+
+	/* third column */
+	StateMachineSetAction(S, REASSOC_WAIT_RSP, MT2_MLME_ASSOC_REQ,
+			      (STATE_MACHINE_FUNC) InvalidStateWhenAssoc);
+	StateMachineSetAction(S, REASSOC_WAIT_RSP, MT2_MLME_REASSOC_REQ,
+			      (STATE_MACHINE_FUNC) InvalidStateWhenReassoc);
+	StateMachineSetAction(S, REASSOC_WAIT_RSP, MT2_MLME_DISASSOC_REQ,
+			      (STATE_MACHINE_FUNC)
+			      InvalidStateWhenDisassociate);
+	StateMachineSetAction(S, REASSOC_WAIT_RSP, MT2_PEER_DISASSOC_REQ,
+			      (STATE_MACHINE_FUNC) PeerDisassocAction);
+	StateMachineSetAction(S, REASSOC_WAIT_RSP, MT2_PEER_REASSOC_RSP,
+			      (STATE_MACHINE_FUNC) PeerReassocRspAction);
+	/* */
+	/* Patch, AP doesn't send Reassociate Rsp frame to Station. */
+	/* */
+	StateMachineSetAction(S, REASSOC_WAIT_RSP, MT2_PEER_ASSOC_RSP,
+			      (STATE_MACHINE_FUNC) PeerReassocRspAction);
+	StateMachineSetAction(S, REASSOC_WAIT_RSP, MT2_REASSOC_TIMEOUT,
+			      (STATE_MACHINE_FUNC) ReassocTimeoutAction);
+
+	/* fourth column */
+	StateMachineSetAction(S, DISASSOC_WAIT_RSP, MT2_MLME_ASSOC_REQ,
+			      (STATE_MACHINE_FUNC) InvalidStateWhenAssoc);
+	StateMachineSetAction(S, DISASSOC_WAIT_RSP, MT2_MLME_REASSOC_REQ,
+			      (STATE_MACHINE_FUNC) InvalidStateWhenReassoc);
+	StateMachineSetAction(S, DISASSOC_WAIT_RSP, MT2_MLME_DISASSOC_REQ,
+			      (STATE_MACHINE_FUNC)
+			      InvalidStateWhenDisassociate);
+	StateMachineSetAction(S, DISASSOC_WAIT_RSP, MT2_PEER_DISASSOC_REQ,
+			      (STATE_MACHINE_FUNC) PeerDisassocAction);
+	StateMachineSetAction(S, DISASSOC_WAIT_RSP, MT2_DISASSOC_TIMEOUT,
+			      (STATE_MACHINE_FUNC) DisassocTimeoutAction);
+
+	/* initialize the timer */
+	RTMPInitTimer(pAd, &pAd->MlmeAux.AssocTimer,
+		      GET_TIMER_FUNCTION(AssocTimeout), pAd, FALSE);
+	RTMPInitTimer(pAd, &pAd->MlmeAux.ReassocTimer,
+		      GET_TIMER_FUNCTION(ReassocTimeout), pAd, FALSE);
+	RTMPInitTimer(pAd, &pAd->MlmeAux.DisassocTimer,
+		      GET_TIMER_FUNCTION(DisassocTimeout), pAd, FALSE);
+}
+
+/*
+	==========================================================================
+	Description:
+		Association timeout procedure. After association timeout, this function 
+		will be called and it will put a message into the MLME queue
+	Parameters:
+		Standard timer parameters
+
+	IRQL = DISPATCH_LEVEL
+
+	==========================================================================
+ */
+VOID AssocTimeout(
+	IN PVOID SystemSpecific1,
+	IN PVOID FunctionContext,
+	IN PVOID SystemSpecific2,
+	IN PVOID SystemSpecific3)
+{
+	RTMP_ADAPTER *pAd = (RTMP_ADAPTER *) FunctionContext;
+
+	/* Do nothing if the driver is starting halt state. */
+	/* This might happen when timer already been fired before cancel timer with mlmehalt */
+	if (RTMP_TEST_FLAG
+	    (pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS | fRTMP_ADAPTER_NIC_NOT_EXIST))
+		return;
+
+	MlmeEnqueue(pAd, ASSOC_STATE_MACHINE, MT2_ASSOC_TIMEOUT, 0, NULL, 0);
+	RTMP_MLME_HANDLER(pAd);
+}
+
+/*
+	==========================================================================
+	Description:
+		Reassociation timeout procedure. After reassociation timeout, this 
+		function will be called and put a message into the MLME queue
+	Parameters:
+		Standard timer parameters
+
+	IRQL = DISPATCH_LEVEL
+
+	==========================================================================
+ */
+VOID ReassocTimeout(
+	IN PVOID SystemSpecific1,
+	IN PVOID FunctionContext,
+	IN PVOID SystemSpecific2,
+	IN PVOID SystemSpecific3)
+{
+	RTMP_ADAPTER *pAd = (RTMP_ADAPTER *) FunctionContext;
+
+	/* Do nothing if the driver is starting halt state. */
+	/* This might happen when timer already been fired before cancel timer with mlmehalt */
+	if (RTMP_TEST_FLAG
+	    (pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS | fRTMP_ADAPTER_NIC_NOT_EXIST))
+		return;
+
+	MlmeEnqueue(pAd, ASSOC_STATE_MACHINE, MT2_REASSOC_TIMEOUT, 0, NULL, 0);
+	RTMP_MLME_HANDLER(pAd);
+}
+
+/*
+	==========================================================================
+	Description:
+		Disassociation timeout procedure. After disassociation timeout, this 
+		function will be called and put a message into the MLME queue
+	Parameters:
+		Standard timer parameters
+
+	IRQL = DISPATCH_LEVEL
+
+	==========================================================================
+ */
+VOID DisassocTimeout(
+	IN PVOID SystemSpecific1,
+	IN PVOID FunctionContext,
+	IN PVOID SystemSpecific2,
+	IN PVOID SystemSpecific3)
+{
+	RTMP_ADAPTER *pAd = (RTMP_ADAPTER *) FunctionContext;
+
+	/* Do nothing if the driver is starting halt state. */
+	/* This might happen when timer already been fired before cancel timer with mlmehalt */
+	if (RTMP_TEST_FLAG
+	    (pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS | fRTMP_ADAPTER_NIC_NOT_EXIST))
+		return;
+
+	MlmeEnqueue(pAd, ASSOC_STATE_MACHINE, MT2_DISASSOC_TIMEOUT, 0, NULL, 0);
+	RTMP_MLME_HANDLER(pAd);
+}
+
+/*
+	==========================================================================
+	Description:
+		mlme assoc req handling procedure
+	Parameters:
+		Adapter - Adapter pointer
+		Elem - MLME Queue Element
+	Pre:
+		the station has been authenticated and the following information is stored in the config
+			-# SSID
+			-# supported rates and their length
+			-# listen interval (Adapter->StaCfg.default_listen_count)
+			-# Transmit power  (Adapter->StaCfg.tx_power)
+	Post  :
+		-# An association request frame is generated and sent to the air
+		-# Association timer starts
+		-# Association state -> ASSOC_WAIT_RSP
+
+	IRQL = DISPATCH_LEVEL
+
+	==========================================================================
+ */
+VOID MlmeAssocReqAction(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	UCHAR ApAddr[6];
+	HEADER_802_11 AssocHdr;
+	UCHAR WmeIe[9] =
+	    { IE_VENDOR_SPECIFIC, 0x07, 0x00, 0x50, 0xf2, 0x02, 0x00, 0x01,
+       0x00 };
+	USHORT ListenIntv;
+	ULONG Timeout;
+	USHORT CapabilityInfo;
+	BOOLEAN TimerCancelled;
+	PUCHAR pOutBuffer = NULL;
+	NDIS_STATUS NStatus;
+	ULONG FrameLen = 0;
+	ULONG tmp;
+	USHORT VarIesOffset = 0;
+	USHORT Status;
+
+	/* Block all authentication request durning WPA block period */
+	if (pAd->StaCfg.bBlockAssoc == TRUE) {
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("ASSOC - Block Assoc request durning WPA block period!\n"));
+		pAd->Mlme.AssocMachine.CurrState = ASSOC_IDLE;
+		Status = MLME_STATE_MACHINE_REJECT;
+		MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_ASSOC_CONF, 2,
+			    &Status, 0);
+	}
+	/* check sanity first */
+	else if (MlmeAssocReqSanity
+		 (pAd, Elem->Msg, Elem->MsgLen, ApAddr, &CapabilityInfo,
+		  &Timeout, &ListenIntv)) {
+		RTMPCancelTimer(&pAd->MlmeAux.AssocTimer, &TimerCancelled);
+		COPY_MAC_ADDR(pAd->MlmeAux.Bssid, ApAddr);
+
+		/* Get an unused nonpaged memory */
+		NStatus = MlmeAllocateMemory(pAd, &pOutBuffer);
+		if (NStatus != NDIS_STATUS_SUCCESS) {
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("ASSOC - MlmeAssocReqAction() allocate memory failed \n"));
+			pAd->Mlme.AssocMachine.CurrState = ASSOC_IDLE;
+			Status = MLME_FAIL_NO_RESOURCE;
+			MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE,
+				    MT2_ASSOC_CONF, 2, &Status, 0);
+			return;
+		}
+
+		/* Add by James 03/06/27 */
+		pAd->StaCfg.AssocInfo.Length =
+		    sizeof (NDIS_802_11_ASSOCIATION_INFORMATION);
+		/* Association don't need to report MAC address */
+		pAd->StaCfg.AssocInfo.AvailableRequestFixedIEs =
+		    NDIS_802_11_AI_REQFI_CAPABILITIES |
+		    NDIS_802_11_AI_REQFI_LISTENINTERVAL;
+		pAd->StaCfg.AssocInfo.RequestFixedIEs.Capabilities =
+		    CapabilityInfo;
+		pAd->StaCfg.AssocInfo.RequestFixedIEs.ListenInterval =
+		    ListenIntv;
+		/* Only reassociate need this */
+		/*COPY_MAC_ADDR(pAd->StaCfg.AssocInfo.RequestFixedIEs.CurrentAPAddress, ApAddr); */
+		pAd->StaCfg.AssocInfo.OffsetRequestIEs =
+		    sizeof (NDIS_802_11_ASSOCIATION_INFORMATION);
+
+		NdisZeroMemory(pAd->StaCfg.ReqVarIEs, MAX_VIE_LEN);
+		/* First add SSID */
+		VarIesOffset = 0;
+		NdisMoveMemory(pAd->StaCfg.ReqVarIEs + VarIesOffset, &SsidIe,
+			       1);
+		VarIesOffset += 1;
+		NdisMoveMemory(pAd->StaCfg.ReqVarIEs + VarIesOffset,
+			       &pAd->MlmeAux.SsidLen, 1);
+		VarIesOffset += 1;
+		NdisMoveMemory(pAd->StaCfg.ReqVarIEs + VarIesOffset,
+			       pAd->MlmeAux.Ssid, pAd->MlmeAux.SsidLen);
+		VarIesOffset += pAd->MlmeAux.SsidLen;
+
+		/* Second add Supported rates */
+		NdisMoveMemory(pAd->StaCfg.ReqVarIEs + VarIesOffset, &SupRateIe,
+			       1);
+		VarIesOffset += 1;
+		NdisMoveMemory(pAd->StaCfg.ReqVarIEs + VarIesOffset,
+			       &pAd->MlmeAux.SupRateLen, 1);
+		VarIesOffset += 1;
+		NdisMoveMemory(pAd->StaCfg.ReqVarIEs + VarIesOffset,
+			       pAd->MlmeAux.SupRate, pAd->MlmeAux.SupRateLen);
+		VarIesOffset += pAd->MlmeAux.SupRateLen;
+		/* End Add by James */
+
+		DBGPRINT(RT_DEBUG_TRACE, ("ASSOC - Send ASSOC request...\n"));
+		MgtMacHeaderInit(pAd, &AssocHdr, SUBTYPE_ASSOC_REQ, 0, ApAddr,
+							ApAddr);
+
+		/* Build basic frame first */
+		MakeOutgoingFrame(pOutBuffer, &FrameLen,
+				  sizeof (HEADER_802_11), &AssocHdr,
+				  2, &CapabilityInfo,
+				  2, &ListenIntv,
+				  1, &SsidIe,
+				  1, &pAd->MlmeAux.SsidLen,
+				  pAd->MlmeAux.SsidLen, pAd->MlmeAux.Ssid,
+				  1, &SupRateIe,
+				  1, &pAd->MlmeAux.SupRateLen,
+				  pAd->MlmeAux.SupRateLen, pAd->MlmeAux.SupRate,
+				  END_OF_ARGS);
+
+		if (pAd->MlmeAux.ExtRateLen != 0) {
+			MakeOutgoingFrame(pOutBuffer + FrameLen, &tmp,
+					  1, &ExtRateIe,
+					  1, &pAd->MlmeAux.ExtRateLen,
+					  pAd->MlmeAux.ExtRateLen,
+					  pAd->MlmeAux.ExtRate, END_OF_ARGS);
+			FrameLen += tmp;
+		}
+
+#ifdef DOT11_N_SUPPORT
+		/* HT */
+		if ((pAd->MlmeAux.HtCapabilityLen > 0)
+		    && (pAd->CommonCfg.PhyMode >= PHY_11ABGN_MIXED)) {
+			ULONG TmpLen;
+			UCHAR HtLen;
+			UCHAR BROADCOM[4] = { 0x0, 0x90, 0x4c, 0x33 };
+			PHT_CAPABILITY_IE pHtCapability;
+#ifdef RT_BIG_ENDIAN
+			HT_CAPABILITY_IE HtCapabilityTmp;
+			NdisZeroMemory(&HtCapabilityTmp,
+				       sizeof (HT_CAPABILITY_IE));
+			NdisMoveMemory(&HtCapabilityTmp,
+				       &pAd->MlmeAux.HtCapability,
+				       pAd->MlmeAux.HtCapabilityLen);
+			*(USHORT *) (&HtCapabilityTmp.HtCapInfo) =
+			    SWAP16(*(USHORT *) (&HtCapabilityTmp.HtCapInfo));
+			*(USHORT *) (&HtCapabilityTmp.ExtHtCapInfo) =
+			    SWAP16(*(USHORT *) (&HtCapabilityTmp.ExtHtCapInfo));
+			pHtCapability = &HtCapabilityTmp;
+#else
+			pHtCapability = &pAd->MlmeAux.HtCapability;
+#endif
+
+			if (pAd->StaActive.SupportedPhyInfo.bPreNHt == TRUE) {
+				HtLen = SIZE_HT_CAP_IE + 4;
+				MakeOutgoingFrame(pOutBuffer + FrameLen,
+						  &TmpLen, 1, &WpaIe, 1, &HtLen,
+						  4, &BROADCOM[0],
+						  pAd->MlmeAux.HtCapabilityLen,
+						  pHtCapability, END_OF_ARGS);
+			} else {
+				MakeOutgoingFrame(pOutBuffer + FrameLen,
+						  &TmpLen, 1, &HtCapIe, 1,
+						  &pAd->MlmeAux.HtCapabilityLen,
+						  pAd->MlmeAux.HtCapabilityLen,
+						  pHtCapability, END_OF_ARGS);
+			}
+			FrameLen += TmpLen;
+		}
+#endif /* DOT11_N_SUPPORT */
+
+#if defined(DOT11N_DRAFT3) || defined(DOT11V_WNM_SUPPORT)
+		{
+			ULONG TmpLen;
+			EXT_CAP_INFO_ELEMENT extCapInfo;
+			UCHAR extInfoLen;
+
+			extInfoLen = sizeof (EXT_CAP_INFO_ELEMENT);
+			NdisZeroMemory(&extCapInfo, extInfoLen);
+
+#ifdef DOT11N_DRAFT3
+			if ((pAd->CommonCfg.bBssCoexEnable == TRUE) &&
+			    (pAd->CommonCfg.PhyMode >= PHY_11ABGN_MIXED)
+			    && (pAd->CommonCfg.Channel <= 14)
+			    ) {
+				extCapInfo.BssCoexistMgmtSupport = 1;
+			}
+#endif /* DOT11N_DRAFT3 */
+
+			MakeOutgoingFrame(pOutBuffer + FrameLen, &TmpLen,
+					  1, &ExtCapIe,
+					  1, &extInfoLen,
+					  extInfoLen, &extCapInfo, END_OF_ARGS);
+			FrameLen += TmpLen;
+		}
+#endif /* defined(DOT11N_DRAFT3) || defined(DOT11V_WNM_SUPPORT) */
+
+		/* add Ralink proprietary IE to inform AP this STA is going to use AGGREGATION or PIGGY-BACK+AGGREGATION */
+		/* Case I: (Aggregation + Piggy-Back) */
+		/* 1. user enable aggregation, AND */
+		/* 2. Mac support piggy-back */
+		/* 3. AP annouces it's PIGGY-BACK+AGGREGATION-capable in BEACON */
+		/* Case II: (Aggregation) */
+		/* 1. user enable aggregation, AND */
+		/* 2. AP annouces it's AGGREGATION-capable in BEACON */
+		if (pAd->CommonCfg.bAggregationCapable) {
+			if ((pAd->CommonCfg.bPiggyBackCapable)
+			    && ((pAd->MlmeAux.APRalinkIe & 0x00000003) == 3)) {
+				ULONG TmpLen;
+				UCHAR RalinkIe[9] =
+				    { IE_VENDOR_SPECIFIC, 7, 0x00, 0x0c, 0x43,
+			    0x03, 0x00, 0x00, 0x00 };
+				MakeOutgoingFrame(pOutBuffer + FrameLen,
+						  &TmpLen, 9, RalinkIe,
+						  END_OF_ARGS);
+				FrameLen += TmpLen;
+			} else if (pAd->MlmeAux.APRalinkIe & 0x00000001) {
+				ULONG TmpLen;
+				UCHAR RalinkIe[9] =
+				    { IE_VENDOR_SPECIFIC, 7, 0x00, 0x0c, 0x43,
+			    0x01, 0x00, 0x00, 0x00 };
+				MakeOutgoingFrame(pOutBuffer + FrameLen,
+						  &TmpLen, 9, RalinkIe,
+						  END_OF_ARGS);
+				FrameLen += TmpLen;
+			}
+		} else {
+			ULONG TmpLen;
+			UCHAR RalinkIe[9] =
+			    { IE_VENDOR_SPECIFIC, 7, 0x00, 0x0c, 0x43, 0x06,
+		    0x00, 0x00, 0x00 };
+			MakeOutgoingFrame(pOutBuffer + FrameLen, &TmpLen, 9,
+					  RalinkIe, END_OF_ARGS);
+			FrameLen += TmpLen;
+		}
+
+		if (pAd->MlmeAux.APEdcaParm.bValid) {
+			if (pAd->CommonCfg.bAPSDCapable
+			    && pAd->MlmeAux.APEdcaParm.bAPSDCapable) {
+				QBSS_STA_INFO_PARM QosInfo;
+
+				NdisZeroMemory(&QosInfo,
+					       sizeof (QBSS_STA_INFO_PARM));
+				QosInfo.UAPSD_AC_BE = pAd->CommonCfg.bAPSDAC_BE;
+				QosInfo.UAPSD_AC_BK = pAd->CommonCfg.bAPSDAC_BK;
+				QosInfo.UAPSD_AC_VI = pAd->CommonCfg.bAPSDAC_VI;
+				QosInfo.UAPSD_AC_VO = pAd->CommonCfg.bAPSDAC_VO;
+				QosInfo.MaxSPLength =
+				    pAd->CommonCfg.MaxSPLength;
+				WmeIe[8] |= *(PUCHAR) & QosInfo;
+			} else {
+				/* The Parameter Set Count is set to ¡§0¡¨ in the association request frames */
+				/* WmeIe[8] |= (pAd->MlmeAux.APEdcaParm.EdcaUpdateCount & 0x0f); */
+			}
+
+			MakeOutgoingFrame(pOutBuffer + FrameLen, &tmp,
+					  9, &WmeIe[0], END_OF_ARGS);
+			FrameLen += tmp;
+		}
+
+		/* */
+		/* Let WPA(#221) Element ID on the end of this association frame. */
+		/* Otherwise some AP will fail on parsing Element ID and set status fail on Assoc Rsp. */
+		/* For example: Put Vendor Specific IE on the front of WPA IE. */
+		/* This happens on AP (Model No:Linksys WRK54G) */
+		/* */
+		if (((pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPAPSK) ||
+		     (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2PSK) ||
+		     (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA) ||
+		     (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2)
+		    )
+		    ) {
+			UCHAR RSNIe = IE_WPA;
+
+			if ((pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2PSK)
+			    || (pAd->StaCfg.AuthMode ==
+				Ndis802_11AuthModeWPA2)) {
+				RSNIe = IE_WPA2;
+			}
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+			if (pAd->StaCfg.bRSN_IE_FromWpaSupplicant == FALSE)
+#endif /* WPA_SUPPLICANT_SUPPORT */
+			{
+				RTMPMakeRSNIE(pAd, pAd->StaCfg.AuthMode,
+					      pAd->StaCfg.WepStatus, BSS0);
+
+				/* Check for WPA PMK cache list */
+				if (pAd->StaCfg.AuthMode ==
+				    Ndis802_11AuthModeWPA2) {
+					INT idx;
+					BOOLEAN FoundPMK = FALSE;
+					/* Search chched PMKID, append it if existed */
+					for (idx = 0; idx < PMKID_NO; idx++) {
+						if (NdisEqualMemory
+						    (ApAddr,
+						     &pAd->StaCfg.SavedPMK[idx].
+						     BSSID, 6)) {
+							FoundPMK = TRUE;
+							break;
+						}
+					}
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+					/*
+					   When AuthMode is WPA2-Enterprise and AP reboot or STA lost AP,
+					   AP would not do PMK cache with STA after STA re-connect to AP again.
+					   In this case, driver doesn't need to send PMKID to AP and WpaSupplicant.
+					 */
+					if ((pAd->StaCfg.AuthMode ==
+					     Ndis802_11AuthModeWPA2)
+					    &&
+					    (NdisEqualMemory
+					     (pAd->MlmeAux.Bssid,
+					      pAd->CommonCfg.LastBssid,
+					      MAC_ADDR_LEN))) {
+						FoundPMK = FALSE;
+					}
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+					if (FoundPMK) {
+						/* Set PMK number */
+						*(PUSHORT) & pAd->StaCfg.
+						    RSN_IE[pAd->StaCfg.
+							   RSNIE_Len] = 1;
+						NdisMoveMemory(&pAd->StaCfg.
+							       RSN_IE[pAd->
+								      StaCfg.
+								      RSNIE_Len
+								      + 2],
+							       &pAd->StaCfg.
+							       SavedPMK[idx].
+							       PMKID, 16);
+						pAd->StaCfg.RSNIE_Len += 18;
+					}
+				}
+			}
+#ifdef WPA_SUPPLICANT_SUPPORT
+			/*
+				Can not use SIOCSIWGENIE definition, it is used in wireless.h
+				We will not see the definition in MODULE.
+				The definition can be saw in UTIL and NETIF.
+			*/
+/* #ifdef SIOCSIWGENIE */
+			if ((pAd->StaCfg.
+			     WpaSupplicantUP & WPA_SUPPLICANT_ENABLE)
+			    && (pAd->StaCfg.bRSN_IE_FromWpaSupplicant ==
+				TRUE)) {
+				;
+			} else
+/* #endif */
+#endif /* WPA_SUPPLICANT_SUPPORT */
+			{
+				MakeOutgoingFrame(pOutBuffer + FrameLen, &tmp,
+						  1, &RSNIe,
+						  1, &pAd->StaCfg.RSNIE_Len,
+						  pAd->StaCfg.RSNIE_Len,
+						  pAd->StaCfg.RSN_IE,
+						  END_OF_ARGS);
+				FrameLen += tmp;
+			}
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+			/*
+				Can not use SIOCSIWGENIE definition, it is used in wireless.h
+				We will not see the definition in MODULE.
+				The definition can be saw in UTIL and NETIF.
+			*/
+/* #ifdef SIOCSIWGENIE */
+			if (((pAd->StaCfg.WpaSupplicantUP & 0x7F) !=
+			     WPA_SUPPLICANT_ENABLE)
+			    || (pAd->StaCfg.bRSN_IE_FromWpaSupplicant == FALSE))
+/* #endif */
+#endif /* WPA_SUPPLICANT_SUPPORT */
+			{
+				/* Append Variable IE */
+				NdisMoveMemory(pAd->StaCfg.ReqVarIEs +
+					       VarIesOffset, &RSNIe, 1);
+				VarIesOffset += 1;
+				NdisMoveMemory(pAd->StaCfg.ReqVarIEs +
+					       VarIesOffset,
+					       &pAd->StaCfg.RSNIE_Len, 1);
+				VarIesOffset += 1;
+
+				NdisMoveMemory(pAd->StaCfg.ReqVarIEs +
+					       VarIesOffset, pAd->StaCfg.RSN_IE,
+					       pAd->StaCfg.RSNIE_Len);
+				VarIesOffset += pAd->StaCfg.RSNIE_Len;
+
+				/* Set Variable IEs Length */
+				pAd->StaCfg.ReqVarIELen = VarIesOffset;
+			}
+		}
+#ifdef WPA_SUPPLICANT_SUPPORT
+		/*
+			Can not use SIOCSIWGENIE definition, it is used in wireless.h
+			We will not see the definition in MODULE.
+			The definition can be saw in UTIL and NETIF.
+		*/
+/* #ifdef SIOCSIWGENIE */
+		if ((pAd->StaCfg.WpaSupplicantUP & WPA_SUPPLICANT_ENABLE) &&
+		    (pAd->StaCfg.bRSN_IE_FromWpaSupplicant == TRUE)) {
+			ULONG TmpWpaAssocIeLen = 0;
+			MakeOutgoingFrame(pOutBuffer + FrameLen,
+					  &TmpWpaAssocIeLen,
+					  pAd->StaCfg.WpaAssocIeLen,
+					  pAd->StaCfg.pWpaAssocIe, END_OF_ARGS);
+
+			FrameLen += TmpWpaAssocIeLen;
+
+			NdisMoveMemory(pAd->StaCfg.ReqVarIEs + VarIesOffset,
+				       pAd->StaCfg.pWpaAssocIe,
+				       pAd->StaCfg.WpaAssocIeLen);
+			VarIesOffset += pAd->StaCfg.WpaAssocIeLen;
+
+			/* Set Variable IEs Length */
+			pAd->StaCfg.ReqVarIELen = VarIesOffset;
+		}
+/* #endif */
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+
+		MiniportMMRequest(pAd, 0, pOutBuffer, FrameLen);
+		MlmeFreeMemory(pAd, pOutBuffer);
+
+		RTMPSetTimer(&pAd->MlmeAux.AssocTimer, Timeout);
+		pAd->Mlme.AssocMachine.CurrState = ASSOC_WAIT_RSP;
+	} else {
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("ASSOC - MlmeAssocReqAction() sanity check failed. BUG!!!!!! \n"));
+		pAd->Mlme.AssocMachine.CurrState = ASSOC_IDLE;
+		Status = MLME_INVALID_FORMAT;
+		MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_ASSOC_CONF, 2,
+			    &Status, 0);
+	}
+
+}
+
+/*
+	==========================================================================
+	Description:
+		mlme reassoc req handling procedure
+	Parameters:
+		Elem - 
+	Pre:
+		-# SSID  (Adapter->StaCfg.ssid[])
+		-# BSSID (AP address, Adapter->StaCfg.bssid)
+		-# Supported rates (Adapter->StaCfg.supported_rates[])
+		-# Supported rates length (Adapter->StaCfg.supported_rates_len)
+		-# Tx power (Adapter->StaCfg.tx_power)
+
+	IRQL = DISPATCH_LEVEL
+
+	==========================================================================
+ */
+VOID MlmeReassocReqAction(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM * Elem)
+{
+	UCHAR ApAddr[6];
+	HEADER_802_11 ReassocHdr;
+	UCHAR WmeIe[9] =
+	    { IE_VENDOR_SPECIFIC, 0x07, 0x00, 0x50, 0xf2, 0x02, 0x00, 0x01,
+       0x00 };
+	USHORT CapabilityInfo, ListenIntv;
+	ULONG Timeout;
+	ULONG FrameLen = 0;
+	BOOLEAN TimerCancelled;
+	NDIS_STATUS NStatus;
+	ULONG tmp;
+	PUCHAR pOutBuffer = NULL;
+	USHORT Status;
+
+	/* Block all authentication request durning WPA block period */
+	if (pAd->StaCfg.bBlockAssoc == TRUE) {
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("ASSOC - Block ReAssoc request durning WPA block period!\n"));
+		pAd->Mlme.AssocMachine.CurrState = ASSOC_IDLE;
+		Status = MLME_STATE_MACHINE_REJECT;
+		MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_REASSOC_CONF, 2,
+			    &Status, 0);
+	}
+	/* the parameters are the same as the association */
+	else if (MlmeAssocReqSanity
+		 (pAd, Elem->Msg, Elem->MsgLen, ApAddr, &CapabilityInfo,
+		  &Timeout, &ListenIntv)) {
+		RTMPCancelTimer(&pAd->MlmeAux.ReassocTimer, &TimerCancelled);
+
+		NStatus = MlmeAllocateMemory(pAd, &pOutBuffer);	/*Get an unused nonpaged memory */
+		if (NStatus != NDIS_STATUS_SUCCESS) {
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("ASSOC - MlmeReassocReqAction() allocate memory failed \n"));
+			pAd->Mlme.AssocMachine.CurrState = ASSOC_IDLE;
+			Status = MLME_FAIL_NO_RESOURCE;
+			MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE,
+				    MT2_REASSOC_CONF, 2, &Status, 0);
+			return;
+		}
+
+		COPY_MAC_ADDR(pAd->MlmeAux.Bssid, ApAddr);
+
+		/* make frame, use bssid as the AP address?? */
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("ASSOC - Send RE-ASSOC request...\n"));
+		MgtMacHeaderInit(pAd, &ReassocHdr, SUBTYPE_REASSOC_REQ, 0, ApAddr, 
+							ApAddr);
+		MakeOutgoingFrame(pOutBuffer, &FrameLen, sizeof (HEADER_802_11),
+				  &ReassocHdr, 2, &CapabilityInfo, 2,
+				  &ListenIntv, MAC_ADDR_LEN, ApAddr, 1, &SsidIe,
+				  1, &pAd->MlmeAux.SsidLen,
+				  pAd->MlmeAux.SsidLen, pAd->MlmeAux.Ssid, 1,
+				  &SupRateIe, 1, &pAd->MlmeAux.SupRateLen,
+				  pAd->MlmeAux.SupRateLen, pAd->MlmeAux.SupRate,
+				  END_OF_ARGS);
+
+		if (pAd->MlmeAux.ExtRateLen != 0) {
+			MakeOutgoingFrame(pOutBuffer + FrameLen, &tmp,
+					  1, &ExtRateIe,
+					  1, &pAd->MlmeAux.ExtRateLen,
+					  pAd->MlmeAux.ExtRateLen,
+					  pAd->MlmeAux.ExtRate, END_OF_ARGS);
+			FrameLen += tmp;
+		}
+
+		if (pAd->MlmeAux.APEdcaParm.bValid) {
+			if (pAd->CommonCfg.bAPSDCapable
+			    && pAd->MlmeAux.APEdcaParm.bAPSDCapable) {
+				QBSS_STA_INFO_PARM QosInfo;
+
+				NdisZeroMemory(&QosInfo,
+					       sizeof (QBSS_STA_INFO_PARM));
+				QosInfo.UAPSD_AC_BE = pAd->CommonCfg.bAPSDAC_BE;
+				QosInfo.UAPSD_AC_BK = pAd->CommonCfg.bAPSDAC_BK;
+				QosInfo.UAPSD_AC_VI = pAd->CommonCfg.bAPSDAC_VI;
+				QosInfo.UAPSD_AC_VO = pAd->CommonCfg.bAPSDAC_VO;
+				QosInfo.MaxSPLength =
+				    pAd->CommonCfg.MaxSPLength;
+
+				DBGPRINT(RT_DEBUG_TRACE,
+					 ("uapsd> MaxSPLength = %d!\n",
+					  QosInfo.MaxSPLength));
+				WmeIe[8] |= *(PUCHAR) & QosInfo;
+			}
+
+			MakeOutgoingFrame(pOutBuffer + FrameLen, &tmp,
+					  9, &WmeIe[0], END_OF_ARGS);
+			FrameLen += tmp;
+		}
+#ifdef DOT11_N_SUPPORT
+		/* HT */
+		if ((pAd->MlmeAux.HtCapabilityLen > 0)
+		    && (pAd->CommonCfg.PhyMode >= PHY_11ABGN_MIXED)) {
+			ULONG TmpLen;
+			UCHAR HtLen;
+			UCHAR BROADCOM[4] = { 0x0, 0x90, 0x4c, 0x33 };
+			PHT_CAPABILITY_IE pHtCapability;
+
+#ifdef RT_BIG_ENDIAN
+			HT_CAPABILITY_IE HtCapabilityTmp;
+			NdisZeroMemory(&HtCapabilityTmp,
+				       sizeof (HT_CAPABILITY_IE));
+			NdisMoveMemory(&HtCapabilityTmp,
+				       &pAd->MlmeAux.HtCapability,
+				       pAd->MlmeAux.HtCapabilityLen);
+			*(USHORT *) (&HtCapabilityTmp.HtCapInfo) =
+			    SWAP16(*(USHORT *) (&HtCapabilityTmp.HtCapInfo));
+			*(USHORT *) (&HtCapabilityTmp.ExtHtCapInfo) =
+			    SWAP16(*(USHORT *) (&HtCapabilityTmp.ExtHtCapInfo));
+			pHtCapability = &HtCapabilityTmp;
+#else
+			pHtCapability = &pAd->MlmeAux.HtCapability;
+#endif
+
+			if (pAd->StaActive.SupportedPhyInfo.bPreNHt == TRUE) {
+				HtLen = SIZE_HT_CAP_IE + 4;
+				MakeOutgoingFrame(pOutBuffer + FrameLen,
+						  &TmpLen, 1, &WpaIe, 1, &HtLen,
+						  4, &BROADCOM[0],
+						  pAd->MlmeAux.HtCapabilityLen,
+						  pHtCapability, END_OF_ARGS);
+			} else {
+				MakeOutgoingFrame(pOutBuffer + FrameLen,
+						  &TmpLen, 1, &HtCapIe, 1,
+						  &pAd->MlmeAux.HtCapabilityLen,
+						  pAd->MlmeAux.HtCapabilityLen,
+						  pHtCapability, END_OF_ARGS);
+			}
+			FrameLen += TmpLen;
+		}
+#endif /* DOT11_N_SUPPORT */
+
+
+		/* add Ralink proprietary IE to inform AP this STA is going to use AGGREGATION or PIGGY-BACK+AGGREGATION */
+		/* Case I: (Aggregation + Piggy-Back) */
+		/* 1. user enable aggregation, AND */
+		/* 2. Mac support piggy-back */
+		/* 3. AP annouces it's PIGGY-BACK+AGGREGATION-capable in BEACON */
+		/* Case II: (Aggregation) */
+		/* 1. user enable aggregation, AND */
+		/* 2. AP annouces it's AGGREGATION-capable in BEACON */
+		if (pAd->CommonCfg.bAggregationCapable) {
+			if ((pAd->CommonCfg.bPiggyBackCapable)
+			    && ((pAd->MlmeAux.APRalinkIe & 0x00000003) == 3)) {
+				ULONG TmpLen;
+				UCHAR RalinkIe[9] =
+				    { IE_VENDOR_SPECIFIC, 7, 0x00, 0x0c, 0x43,
+			    0x03, 0x00, 0x00, 0x00 };
+				MakeOutgoingFrame(pOutBuffer + FrameLen,
+						  &TmpLen, 9, RalinkIe,
+						  END_OF_ARGS);
+				FrameLen += TmpLen;
+			} else if (pAd->MlmeAux.APRalinkIe & 0x00000001) {
+				ULONG TmpLen;
+				UCHAR RalinkIe[9] =
+				    { IE_VENDOR_SPECIFIC, 7, 0x00, 0x0c, 0x43,
+			    0x01, 0x00, 0x00, 0x00 };
+				MakeOutgoingFrame(pOutBuffer + FrameLen,
+						  &TmpLen, 9, RalinkIe,
+						  END_OF_ARGS);
+				FrameLen += TmpLen;
+			}
+		} else {
+			ULONG TmpLen;
+			UCHAR RalinkIe[9] =
+			    { IE_VENDOR_SPECIFIC, 7, 0x00, 0x0c, 0x43, 0x04,
+		    0x00, 0x00, 0x00 };
+			MakeOutgoingFrame(pOutBuffer + FrameLen, &TmpLen, 9,
+					  RalinkIe, END_OF_ARGS);
+			FrameLen += TmpLen;
+		}
+
+		MiniportMMRequest(pAd, 0, pOutBuffer, FrameLen);
+		MlmeFreeMemory(pAd, pOutBuffer);
+
+		RTMPSetTimer(&pAd->MlmeAux.ReassocTimer, Timeout * 2);	/* in mSec */
+		pAd->Mlme.AssocMachine.CurrState = REASSOC_WAIT_RSP;
+	} else {
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("ASSOC - MlmeReassocReqAction() sanity check failed. BUG!!!! \n"));
+		pAd->Mlme.AssocMachine.CurrState = ASSOC_IDLE;
+		Status = MLME_INVALID_FORMAT;
+		MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_REASSOC_CONF, 2,
+			    &Status, 0);
+	}
+}
+
+/*
+	==========================================================================
+	Description:
+		Upper layer issues disassoc request
+	Parameters:
+		Elem -
+
+	IRQL = PASSIVE_LEVEL
+
+	==========================================================================
+ */
+VOID MlmeDisassocReqAction(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	PMLME_DISASSOC_REQ_STRUCT pDisassocReq;
+	HEADER_802_11 DisassocHdr;
+	PHEADER_802_11 pDisassocHdr;
+	PUCHAR pOutBuffer = NULL;
+	ULONG FrameLen = 0;
+	NDIS_STATUS NStatus;
+	BOOLEAN TimerCancelled;
+	ULONG Timeout = 500;
+	USHORT Status;
+
+#ifdef QOS_DLS_SUPPORT
+	/* send DLS-TEAR_DOWN message, */
+	if (pAd->CommonCfg.bDLSCapable) {
+		UCHAR i;
+
+		/* tear down local dls table entry */
+		for (i = 0; i < MAX_NUM_OF_INIT_DLS_ENTRY; i++) {
+			if (pAd->StaCfg.DLSEntry[i].Valid
+			    && (pAd->StaCfg.DLSEntry[i].Status == DLS_FINISH)) {
+				RTMPSendDLSTearDownFrame(pAd,
+							 pAd->StaCfg.
+							 DLSEntry[i].MacAddr);
+				pAd->StaCfg.DLSEntry[i].Status = DLS_NONE;
+				pAd->StaCfg.DLSEntry[i].Valid = FALSE;
+			}
+		}
+
+		/* tear down peer dls table entry */
+		for (i = MAX_NUM_OF_INIT_DLS_ENTRY; i < MAX_NUM_OF_DLS_ENTRY;
+		     i++) {
+			if (pAd->StaCfg.DLSEntry[i].Valid
+			    && (pAd->StaCfg.DLSEntry[i].Status == DLS_FINISH)) {
+				RTMPSendDLSTearDownFrame(pAd,
+							 pAd->StaCfg.
+							 DLSEntry[i].MacAddr);
+				pAd->StaCfg.DLSEntry[i].Status = DLS_NONE;
+				pAd->StaCfg.DLSEntry[i].Valid = FALSE;
+			}
+		}
+	}
+#endif /* QOS_DLS_SUPPORT */
+
+
+	/* skip sanity check */
+	pDisassocReq = (PMLME_DISASSOC_REQ_STRUCT) (Elem->Msg);
+
+	NStatus = MlmeAllocateMemory(pAd, &pOutBuffer);	/*Get an unused nonpaged memory */
+	if (NStatus != NDIS_STATUS_SUCCESS) {
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("ASSOC - MlmeDisassocReqAction() allocate memory failed\n"));
+		pAd->Mlme.AssocMachine.CurrState = ASSOC_IDLE;
+		Status = MLME_FAIL_NO_RESOURCE;
+		MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_DISASSOC_CONF, 2,
+			    &Status, 0);
+		return;
+	}
+
+
+	RTMPCancelTimer(&pAd->MlmeAux.DisassocTimer, &TimerCancelled);
+
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("ASSOC - Send DISASSOC request[BSSID::%02x:%02x:%02x:%02x:%02x:%02x (Reason=%d)\n",
+		  pDisassocReq->Addr[0], pDisassocReq->Addr[1],
+		  pDisassocReq->Addr[2], pDisassocReq->Addr[3],
+		  pDisassocReq->Addr[4], pDisassocReq->Addr[5],
+		  pDisassocReq->Reason));
+	MgtMacHeaderInit(pAd, &DisassocHdr, SUBTYPE_DISASSOC, 0, pDisassocReq->Addr, 
+						pDisassocReq->Addr);	/* patch peap ttls switching issue */
+	MakeOutgoingFrame(pOutBuffer, &FrameLen,
+			  sizeof (HEADER_802_11), &DisassocHdr,
+			  2, &pDisassocReq->Reason, END_OF_ARGS);
+	MiniportMMRequest(pAd, 0, pOutBuffer, FrameLen);
+
+	/* To patch Instance and Buffalo(N) AP */
+	/* Driver has to send deauth to Instance AP, but Buffalo(N) needs to send disassoc to reset Authenticator's state machine */
+	/* Therefore, we send both of them. */
+	pDisassocHdr = (PHEADER_802_11) pOutBuffer;
+	pDisassocHdr->FC.SubType = SUBTYPE_DEAUTH;
+	MiniportMMRequest(pAd, 0, pOutBuffer, FrameLen);
+
+	MlmeFreeMemory(pAd, pOutBuffer);
+
+	pAd->StaCfg.DisassocReason = REASON_DISASSOC_STA_LEAVING;
+	COPY_MAC_ADDR(pAd->StaCfg.DisassocSta, pDisassocReq->Addr);
+
+	RTMPSetTimer(&pAd->MlmeAux.DisassocTimer, Timeout);	/* in mSec */
+	pAd->Mlme.AssocMachine.CurrState = DISASSOC_WAIT_RSP;
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+#ifndef NATIVE_WPA_SUPPLICANT_SUPPORT
+	if (pAd->StaCfg.WpaSupplicantUP != WPA_SUPPLICANT_DISABLE) {
+		/*send disassociate event to wpa_supplicant */
+		RtmpOSWrielessEventSend(pAd->net_dev, RT_WLAN_EVENT_CUSTOM,
+					RT_DISASSOC_EVENT_FLAG, NULL, NULL, 0);
+	}
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+#ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
+	RtmpOSWrielessEventSend(pAd->net_dev, RT_WLAN_EVENT_CGIWAP, -1, NULL,
+				NULL, 0);
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+
+	RTMPSendWirelessEvent(pAd, IW_DISASSOC_EVENT_FLAG, NULL, BSS0, 0);
+
+}
+
+/*
+	==========================================================================
+	Description:
+		peer sends assoc rsp back
+	Parameters:
+		Elme - MLME message containing the received frame
+
+	IRQL = DISPATCH_LEVEL
+
+	==========================================================================
+ */
+VOID PeerAssocRspAction(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	USHORT CapabilityInfo, Status, Aid;
+	UCHAR SupRate[MAX_LEN_OF_SUPPORTED_RATES], SupRateLen;
+	UCHAR ExtRate[MAX_LEN_OF_SUPPORTED_RATES], ExtRateLen;
+	UCHAR Addr2[MAC_ADDR_LEN];
+	BOOLEAN TimerCancelled;
+	UCHAR CkipFlag;
+	EDCA_PARM EdcaParm;
+	HT_CAPABILITY_IE HtCapability;
+	ADD_HT_INFO_IE AddHtInfo;	/* AP might use this additional ht info IE */
+	UCHAR HtCapabilityLen = 0;
+	UCHAR AddHtInfoLen;
+	UCHAR NewExtChannelOffset = 0xff;
+	EXT_CAP_INFO_ELEMENT ExtCapInfo;
+
+	if (PeerAssocRspSanity(pAd, Elem->Msg, Elem->MsgLen,
+			       Addr2, &CapabilityInfo, &Status, &Aid, SupRate,
+			       &SupRateLen, ExtRate, &ExtRateLen, &HtCapability,
+			       &AddHtInfo, &HtCapabilityLen, &AddHtInfoLen,
+			       &NewExtChannelOffset, &EdcaParm, &ExtCapInfo,
+			       &CkipFlag)) {
+		/* The frame is for me ? */
+		if (MAC_ADDR_EQUAL(Addr2, pAd->MlmeAux.Bssid)) {
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("PeerAssocRspAction():ASSOC - receive ASSOC_RSP to me (status=%d)\n",
+				  Status));
+#ifdef DOT11_N_SUPPORT
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("PeerAssocRspAction():MacTable [%d].AMsduSize = %d. ClientStatusFlags = 0x%lx \n",
+				  Elem->Wcid,
+				  pAd->MacTab.Content[BSSID_WCID].AMsduSize,
+				  pAd->MacTab.Content[BSSID_WCID].
+				  ClientStatusFlags));
+#endif /* DOT11_N_SUPPORT */
+			RTMPCancelTimer(&pAd->MlmeAux.AssocTimer,
+					&TimerCancelled);
+
+
+
+			if (Status == MLME_SUCCESS) {
+				UCHAR MaxSupportedRateIn500Kbps = 0;
+				UCHAR idx;
+				PMAC_TABLE_ENTRY pEntry = NULL;
+
+				/*
+					In roaming case, LinkDown wouldn't be invoked.
+					For preventing finding MacTable Hash index malfunction,
+					we need to do MacTableDeleteEntry here.
+				*/
+				pEntry = MacTableLookup(pAd, pAd->CommonCfg.Bssid);	
+				if (pEntry)	
+				{
+					MacTableDeleteEntry(pAd, pEntry->Aid, pEntry->Addr);
+					pEntry = NULL;	
+				}
+
+				/* supported rates array may not be sorted. sort it and find the maximum rate */
+				for (idx = 0; idx < SupRateLen; idx++) {
+					if (MaxSupportedRateIn500Kbps <
+					    (SupRate[idx] & 0x7f))
+						MaxSupportedRateIn500Kbps =
+						    SupRate[idx] & 0x7f;
+				}
+
+				for (idx = 0; idx < ExtRateLen; idx++) {
+					if (MaxSupportedRateIn500Kbps <
+					    (ExtRate[idx] & 0x7f))
+						MaxSupportedRateIn500Kbps =
+						    ExtRate[idx] & 0x7f;
+				}
+				/* go to procedure listed on page 376 */
+				AssocPostProc(pAd, Addr2, CapabilityInfo, Aid,
+					      SupRate, SupRateLen, ExtRate,
+					      ExtRateLen, &EdcaParm,
+					      &HtCapability, HtCapabilityLen,
+					      &AddHtInfo);
+
+				StaAddMacTableEntry(pAd,
+						    &pAd->MacTab.
+						    Content[BSSID_WCID],
+						    MaxSupportedRateIn500Kbps,
+						    &HtCapability,
+						    HtCapabilityLen, &AddHtInfo,
+						    AddHtInfoLen,
+						    CapabilityInfo);
+			}
+			pAd->Mlme.AssocMachine.CurrState = ASSOC_IDLE;
+			MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE,
+				    MT2_ASSOC_CONF, 2, &Status, 0);
+
+#ifdef LINUX
+#ifdef RT_CFG80211_SUPPORT
+			{
+				PFRAME_802_11 pFrame =
+				    (PFRAME_802_11) (Elem->Msg);
+				RTEnqueueInternalCmd(pAd,
+						     CMDTHREAD_CONNECT_RESULT_INFORM,
+						     &pFrame->Octet[6],
+						     Elem->MsgLen - 6 -
+						     sizeof (HEADER_802_11));
+			}
+#endif /* RT_CFG80211_SUPPORT */
+#endif /* LINUX */
+		}
+	} else {
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("ASSOC - PeerAssocRspAction() sanity check fail\n"));
+	}
+}
+
+/*
+	==========================================================================
+	Description:
+		peer sends reassoc rsp
+	Parametrs:
+		Elem - MLME message cntaining the received frame
+
+	IRQL = DISPATCH_LEVEL
+
+	==========================================================================
+ */
+VOID PeerReassocRspAction(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	USHORT CapabilityInfo;
+	USHORT Status;
+	USHORT Aid;
+	UCHAR SupRate[MAX_LEN_OF_SUPPORTED_RATES], SupRateLen;
+	UCHAR ExtRate[MAX_LEN_OF_SUPPORTED_RATES], ExtRateLen;
+	UCHAR Addr2[MAC_ADDR_LEN];
+	UCHAR CkipFlag;
+	BOOLEAN TimerCancelled;
+	EDCA_PARM EdcaParm;
+	HT_CAPABILITY_IE HtCapability;
+	ADD_HT_INFO_IE AddHtInfo;	/* AP might use this additional ht info IE */
+	UCHAR HtCapabilityLen;
+	UCHAR AddHtInfoLen;
+	UCHAR NewExtChannelOffset = 0xff;
+	EXT_CAP_INFO_ELEMENT ExtCapInfo;
+
+	if (PeerAssocRspSanity(pAd, Elem->Msg, Elem->MsgLen, Addr2,
+			       &CapabilityInfo, &Status, &Aid, SupRate,
+			       &SupRateLen, ExtRate, &ExtRateLen, &HtCapability,
+			       &AddHtInfo, &HtCapabilityLen, &AddHtInfoLen,
+			       &NewExtChannelOffset, &EdcaParm, &ExtCapInfo,
+			       &CkipFlag)) {
+		if (MAC_ADDR_EQUAL(Addr2, pAd->MlmeAux.Bssid)) {	/* The frame is for me ? */
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("ASSOC - receive REASSOC_RSP to me (status=%d)\n",
+				  Status));
+			RTMPCancelTimer(&pAd->MlmeAux.ReassocTimer,
+					&TimerCancelled);
+
+			if (Status == MLME_SUCCESS) 
+			{
+				UCHAR MaxSupportedRateIn500Kbps = 0;
+				UCHAR idx;
+				PMAC_TABLE_ENTRY pEntry = NULL;
+
+				/*
+					In roaming case, LinkDown wouldn't be invoked.
+					For preventing finding MacTable Hash index malfunction,
+					we need to do MacTableDeleteEntry here.
+				*/
+				pEntry = MacTableLookup(pAd, pAd->CommonCfg.Bssid);	
+				if (pEntry)	
+				{
+					MacTableDeleteEntry(pAd, pEntry->Aid, pEntry->Addr);
+					pEntry = NULL;	
+				}
+
+				/* supported rates array may not be sorted. sort it and find the maximum rate */
+				for (idx = 0; idx < SupRateLen; idx++) {
+					if (MaxSupportedRateIn500Kbps <
+					    (SupRate[idx] & 0x7f))
+						MaxSupportedRateIn500Kbps =
+						    SupRate[idx] & 0x7f;
+				}
+
+				for (idx = 0; idx < ExtRateLen; idx++) {
+					if (MaxSupportedRateIn500Kbps <
+					    (ExtRate[idx] & 0x7f))
+						MaxSupportedRateIn500Kbps =
+						    ExtRate[idx] & 0x7f;
+				}
+				
+				/* go to procedure listed on page 376 */
+				AssocPostProc(pAd, Addr2, CapabilityInfo, Aid,
+					      SupRate, SupRateLen, ExtRate,
+					      ExtRateLen, &EdcaParm,
+					      &HtCapability, HtCapabilityLen,
+					      &AddHtInfo);
+
+				StaAddMacTableEntry(pAd,
+						    &pAd->MacTab.Content[BSSID_WCID],
+						    MaxSupportedRateIn500Kbps,
+						    &HtCapability,
+						    HtCapabilityLen, &AddHtInfo,
+						    AddHtInfoLen,
+						    CapabilityInfo);
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+#ifndef NATIVE_WPA_SUPPLICANT_SUPPORT
+				if (pAd->StaCfg.WpaSupplicantUP !=
+				    WPA_SUPPLICANT_DISABLE) {
+					SendAssocIEsToWpaSupplicant(pAd->
+								    net_dev,
+								    pAd->StaCfg.
+								    ReqVarIEs,
+								    pAd->StaCfg.
+								    ReqVarIELen);
+					RtmpOSWrielessEventSend(pAd->net_dev,
+								RT_WLAN_EVENT_CUSTOM,
+								RT_ASSOC_EVENT_FLAG,
+								NULL, NULL, 0);
+				}
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+#ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
+				{
+					wext_notify_event_assoc(pAd->net_dev,
+								pAd->StaCfg.
+								ReqVarIEs,
+								pAd->StaCfg.
+								ReqVarIELen);
+					RtmpOSWrielessEventSend(pAd->net_dev,
+								RT_WLAN_EVENT_CGIWAP,
+								-1,
+								&pAd->MlmeAux.
+								Bssid[0], NULL,
+								0);
+				}
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+
+			}
+
+			/* CkipFlag is no use for reassociate */
+			pAd->Mlme.AssocMachine.CurrState = ASSOC_IDLE;
+			MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE,
+				    MT2_REASSOC_CONF, 2, &Status, 0);
+		}
+	} else {
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("ASSOC - PeerReassocRspAction() sanity check fail\n"));
+	}
+
+}
+
+/*
+	==========================================================================
+	Description:
+		procedures on IEEE 802.11/1999 p.376 
+	Parametrs:
+
+	IRQL = DISPATCH_LEVEL
+
+	==========================================================================
+ */
+VOID AssocPostProc(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pAddr2,
+	IN USHORT CapabilityInfo,
+	IN USHORT Aid,
+	IN UCHAR SupRate[],
+	IN UCHAR SupRateLen,
+	IN UCHAR ExtRate[],
+	IN UCHAR ExtRateLen,
+	IN PEDCA_PARM pEdcaParm,
+	IN HT_CAPABILITY_IE *pHtCapability,
+	IN UCHAR HtCapabilityLen,
+	IN ADD_HT_INFO_IE *pAddHtInfo)
+{				/* AP might use this additional ht info IE */
+	ULONG Idx;
+
+	pAd->MlmeAux.BssType = BSS_INFRA;
+	COPY_MAC_ADDR(pAd->MlmeAux.Bssid, pAddr2);
+	pAd->MlmeAux.Aid = Aid;
+	pAd->MlmeAux.CapabilityInfo =
+	    CapabilityInfo & SUPPORTED_CAPABILITY_INFO;
+
+#ifdef DOT11_N_SUPPORT
+	/* Some HT AP might lost WMM IE. We add WMM ourselves. beacuase HT requires QoS on. */
+	if ((HtCapabilityLen > 0) && (pEdcaParm->bValid == FALSE)) {
+		pEdcaParm->bValid = TRUE;
+		pEdcaParm->Aifsn[0] = 3;
+		pEdcaParm->Aifsn[1] = 7;
+		pEdcaParm->Aifsn[2] = 2;
+		pEdcaParm->Aifsn[3] = 2;
+
+		pEdcaParm->Cwmin[0] = 4;
+		pEdcaParm->Cwmin[1] = 4;
+		pEdcaParm->Cwmin[2] = 3;
+		pEdcaParm->Cwmin[3] = 2;
+
+		pEdcaParm->Cwmax[0] = 10;
+		pEdcaParm->Cwmax[1] = 10;
+		pEdcaParm->Cwmax[2] = 4;
+		pEdcaParm->Cwmax[3] = 3;
+
+		pEdcaParm->Txop[0] = 0;
+		pEdcaParm->Txop[1] = 0;
+		pEdcaParm->Txop[2] = 96;
+		pEdcaParm->Txop[3] = 48;
+
+	}
+#endif /* DOT11_N_SUPPORT */
+
+	NdisMoveMemory(&pAd->MlmeAux.APEdcaParm, pEdcaParm, sizeof (EDCA_PARM));
+
+	/* filter out un-supported rates */
+	pAd->MlmeAux.SupRateLen = SupRateLen;
+	NdisMoveMemory(pAd->MlmeAux.SupRate, SupRate, SupRateLen);
+	RTMPCheckRates(pAd, pAd->MlmeAux.SupRate, &pAd->MlmeAux.SupRateLen);
+
+	/* filter out un-supported rates */
+	pAd->MlmeAux.ExtRateLen = ExtRateLen;
+	NdisMoveMemory(pAd->MlmeAux.ExtRate, ExtRate, ExtRateLen);
+	RTMPCheckRates(pAd, pAd->MlmeAux.ExtRate, &pAd->MlmeAux.ExtRateLen);
+
+#ifdef DOT11_N_SUPPORT
+	if (HtCapabilityLen > 0) {
+		RTMPCheckHt(pAd, BSSID_WCID, pHtCapability, pAddHtInfo);
+	}
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("AssocPostProc===>  AP.AMsduSize = %d. ClientStatusFlags = 0x%lx \n",
+		  pAd->MacTab.Content[BSSID_WCID].AMsduSize,
+		  pAd->MacTab.Content[BSSID_WCID].ClientStatusFlags));
+
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("AssocPostProc===>    (Mmps=%d, AmsduSize=%d, )\n",
+		  pAd->MacTab.Content[BSSID_WCID].MmpsMode,
+		  pAd->MacTab.Content[BSSID_WCID].AMsduSize));
+#endif /* DOT11_N_SUPPORT */
+
+	/* Set New WPA information */
+	Idx = BssTableSearch(&pAd->ScanTab, pAddr2, pAd->MlmeAux.Channel);
+	if (Idx == BSS_NOT_FOUND) {
+		DBGPRINT_ERR(("ASSOC - Can't find BSS after receiving Assoc response\n"));
+	} else {
+		/* Init variable */
+		pAd->MacTab.Content[BSSID_WCID].RSNIE_Len = 0;
+		NdisZeroMemory(pAd->MacTab.Content[BSSID_WCID].RSN_IE,
+			       MAX_LEN_OF_RSNIE);
+
+		/* Store appropriate RSN_IE for WPA SM negotiation later */
+		if ((pAd->StaCfg.AuthMode >= Ndis802_11AuthModeWPA)
+		    && (pAd->ScanTab.BssEntry[Idx].VarIELen != 0)) {
+			PUCHAR pVIE;
+			USHORT len;
+			PEID_STRUCT pEid;
+
+			pVIE = pAd->ScanTab.BssEntry[Idx].VarIEs;
+			len = pAd->ScanTab.BssEntry[Idx].VarIELen;
+
+#ifdef PCIE_PS_SUPPORT
+			/* Don't allow to go to sleep mode if authmode is WPA-related. */
+			/*This can make Authentication process more smoothly. */
+			RTMP_CLEAR_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP);
+#endif /* PCIE_PS_SUPPORT */
+			while (len > 0) {
+				pEid = (PEID_STRUCT) pVIE;
+				/* For WPA/WPAPSK */
+				if ((pEid->Eid == IE_WPA)
+				    &&
+				    (NdisEqualMemory(pEid->Octet, WPA_OUI, 4))
+				    && (pAd->StaCfg.AuthMode ==
+					Ndis802_11AuthModeWPA
+					|| pAd->StaCfg.AuthMode ==
+					Ndis802_11AuthModeWPAPSK)) {
+					NdisMoveMemory(pAd->MacTab.
+						       Content[BSSID_WCID].
+						       RSN_IE, pVIE,
+						       (pEid->Len + 2));
+					pAd->MacTab.Content[BSSID_WCID].
+					    RSNIE_Len = (pEid->Len + 2);
+					DBGPRINT(RT_DEBUG_TRACE,
+						 ("AssocPostProc===> Store RSN_IE for WPA SM negotiation \n"));
+				}
+				/* For WPA2/WPA2PSK */
+				else if ((pEid->Eid == IE_RSN)
+					 &&
+					 (NdisEqualMemory
+					  (pEid->Octet + 2, RSN_OUI, 3))
+					 && (pAd->StaCfg.AuthMode ==
+					     Ndis802_11AuthModeWPA2
+					     || pAd->StaCfg.AuthMode ==
+					     Ndis802_11AuthModeWPA2PSK)) {
+					NdisMoveMemory(pAd->MacTab.
+						       Content[BSSID_WCID].
+						       RSN_IE, pVIE,
+						       (pEid->Len + 2));
+					pAd->MacTab.Content[BSSID_WCID].
+					    RSNIE_Len = (pEid->Len + 2);
+					DBGPRINT(RT_DEBUG_TRACE,
+						 ("AssocPostProc===> Store RSN_IE for WPA2 SM negotiation \n"));
+				}
+
+				pVIE += (pEid->Len + 2);
+				len -= (pEid->Len + 2);
+			}
+
+
+		}
+
+		if (pAd->MacTab.Content[BSSID_WCID].RSNIE_Len == 0) {
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("AssocPostProc===> no RSN_IE \n"));
+		} else {
+			hex_dump("RSN_IE",
+				 pAd->MacTab.Content[BSSID_WCID].RSN_IE,
+				 pAd->MacTab.Content[BSSID_WCID].RSNIE_Len);
+		}
+	}
+}
+
+/*
+	==========================================================================
+	Description:
+		left part of IEEE 802.11/1999 p.374 
+	Parameters:
+		Elem - MLME message containing the received frame
+
+	IRQL = DISPATCH_LEVEL
+
+	==========================================================================
+ */
+VOID PeerDisassocAction(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	UCHAR Addr2[MAC_ADDR_LEN];
+	USHORT Reason;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("ASSOC - PeerDisassocAction()\n"));
+	if (PeerDisassocSanity(pAd, Elem->Msg, Elem->MsgLen, Addr2, &Reason)) {
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("ASSOC - PeerDisassocAction() Reason = %d\n",
+			  Reason));
+		if (INFRA_ON(pAd)
+		    && MAC_ADDR_EQUAL(pAd->CommonCfg.Bssid, Addr2)) {
+
+			RTMPSendWirelessEvent(pAd, IW_DISASSOC_EVENT_FLAG, NULL,
+					      BSS0, 0);
+
+
+			/*
+			   It is possible that AP sends dis-assoc frame(PeerDisassocAction) to STA 
+			   after driver enqueue MT2_MLME_DISASSOC_REQ (MlmeDisassocReqAction) 
+			   and set CntlMachine.CurrState = CNTL_WAIT_DISASSOC.                          
+			   DisassocTimer is useless because AssocMachine.CurrState will set to ASSOC_IDLE here.
+			   Therefore, we need to check CntlMachine.CurrState here and enqueue MT2_DISASSOC_CONF to 
+			   reset CntlMachine.CurrState to CNTL_IDLE state again.
+			 */
+			if (pAd->Mlme.CntlMachine.CurrState ==
+			    CNTL_WAIT_DISASSOC) {
+				USHORT Status;
+				Status = MLME_SUCCESS;
+				MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE,
+					    MT2_DISASSOC_CONF, 2, &Status, 0);
+			} else
+				LinkDown(pAd, TRUE);
+
+			pAd->Mlme.AssocMachine.CurrState = ASSOC_IDLE;
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+#ifndef NATIVE_WPA_SUPPLICANT_SUPPORT
+			if (pAd->StaCfg.WpaSupplicantUP !=
+			    WPA_SUPPLICANT_DISABLE) {
+				/*send disassociate event to wpa_supplicant */
+				RtmpOSWrielessEventSend(pAd->net_dev,
+							RT_WLAN_EVENT_CUSTOM,
+							RT_DISASSOC_EVENT_FLAG,
+							NULL, NULL, 0);
+			}
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+#ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
+			RtmpOSWrielessEventSend(pAd->net_dev,
+						RT_WLAN_EVENT_CGIWAP, -1, NULL,
+						NULL, 0);
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+		}
+	} else {
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("ASSOC - PeerDisassocAction() sanity check fail\n"));
+	}
+
+}
+
+/*
+	==========================================================================
+	Description:
+		what the state machine will do after assoc timeout
+	Parameters:
+		Elme -
+
+	IRQL = DISPATCH_LEVEL
+
+	==========================================================================
+ */
+VOID AssocTimeoutAction(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	USHORT Status;
+	DBGPRINT(RT_DEBUG_TRACE, ("ASSOC - AssocTimeoutAction\n"));
+	pAd->Mlme.AssocMachine.CurrState = ASSOC_IDLE;
+	Status = MLME_REJ_TIMEOUT;
+	MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_ASSOC_CONF, 2, &Status,
+		    0);
+}
+
+/*
+	==========================================================================
+	Description:
+		what the state machine will do after reassoc timeout
+
+	IRQL = DISPATCH_LEVEL
+
+	==========================================================================
+ */
+VOID ReassocTimeoutAction(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	USHORT Status;
+	DBGPRINT(RT_DEBUG_TRACE, ("ASSOC - ReassocTimeoutAction\n"));
+	pAd->Mlme.AssocMachine.CurrState = ASSOC_IDLE;
+	Status = MLME_REJ_TIMEOUT;
+	MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_REASSOC_CONF, 2, &Status,
+		    0);
+}
+
+/*
+	==========================================================================
+	Description:
+		what the state machine will do after disassoc timeout
+
+	IRQL = DISPATCH_LEVEL
+
+	==========================================================================
+ */
+VOID DisassocTimeoutAction(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	USHORT Status;
+	DBGPRINT(RT_DEBUG_TRACE, ("ASSOC - DisassocTimeoutAction\n"));
+	pAd->Mlme.AssocMachine.CurrState = ASSOC_IDLE;
+	Status = MLME_SUCCESS;
+	MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_DISASSOC_CONF, 2, &Status,
+		    0);
+}
+
+VOID InvalidStateWhenAssoc(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	USHORT Status;
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("ASSOC - InvalidStateWhenAssoc(state=%ld), reset ASSOC state machine\n",
+		  pAd->Mlme.AssocMachine.CurrState));
+	pAd->Mlme.AssocMachine.CurrState = ASSOC_IDLE;
+	Status = MLME_STATE_MACHINE_REJECT;
+	MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_ASSOC_CONF, 2, &Status,
+		    0);
+}
+
+VOID InvalidStateWhenReassoc(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	USHORT Status;
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("ASSOC - InvalidStateWhenReassoc(state=%ld), reset ASSOC state machine\n",
+		  pAd->Mlme.AssocMachine.CurrState));
+	pAd->Mlme.AssocMachine.CurrState = ASSOC_IDLE;
+	Status = MLME_STATE_MACHINE_REJECT;
+	MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_REASSOC_CONF, 2, &Status,
+		    0);
+}
+
+VOID InvalidStateWhenDisassociate(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+{
+	USHORT Status;
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("ASSOC - InvalidStateWhenDisassoc(state=%ld), reset ASSOC state machine\n",
+		  pAd->Mlme.AssocMachine.CurrState));
+	pAd->Mlme.AssocMachine.CurrState = ASSOC_IDLE;
+	Status = MLME_STATE_MACHINE_REJECT;
+	MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_DISASSOC_CONF, 2, &Status,
+		    0);
+}
+
+/*
+	==========================================================================
+	Description:
+		right part of IEEE 802.11/1999 page 374
+	Note: 
+		This event should never cause ASSOC state machine perform state
+		transition, and has no relationship with CNTL machine. So we separate
+		this routine as a service outside of ASSOC state transition table.
+
+	IRQL = DISPATCH_LEVEL
+
+	==========================================================================
+ */
+VOID Cls3errAction(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pAddr)
+{
+	HEADER_802_11 DisassocHdr;
+	PHEADER_802_11 pDisassocHdr;
+	PUCHAR pOutBuffer = NULL;
+	ULONG FrameLen = 0;
+	NDIS_STATUS NStatus;
+	USHORT Reason = REASON_CLS3ERR;
+
+	NStatus = MlmeAllocateMemory(pAd, &pOutBuffer);	/*Get an unused nonpaged memory */
+	if (NStatus != NDIS_STATUS_SUCCESS)
+		return;
+
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("ASSOC - Class 3 Error, Send DISASSOC frame\n"));
+	MgtMacHeaderInit(pAd, &DisassocHdr, SUBTYPE_DISASSOC, 0, pAddr, 
+						pAd->CommonCfg.Bssid);	/* patch peap ttls switching issue */
+	MakeOutgoingFrame(pOutBuffer, &FrameLen,
+			  sizeof (HEADER_802_11), &DisassocHdr,
+			  2, &Reason, END_OF_ARGS);
+	MiniportMMRequest(pAd, 0, pOutBuffer, FrameLen);
+
+	/* To patch Instance and Buffalo(N) AP */
+	/* Driver has to send deauth to Instance AP, but Buffalo(N) needs to send disassoc to reset Authenticator's state machine */
+	/* Therefore, we send both of them. */
+	pDisassocHdr = (PHEADER_802_11) pOutBuffer;
+	pDisassocHdr->FC.SubType = SUBTYPE_DEAUTH;
+	MiniportMMRequest(pAd, 0, pOutBuffer, FrameLen);
+
+	MlmeFreeMemory(pAd, pOutBuffer);
+
+	pAd->StaCfg.DisassocReason = REASON_CLS3ERR;
+	COPY_MAC_ADDR(pAd->StaCfg.DisassocSta, pAddr);
+}
+
+
+BOOLEAN StaAddMacTableEntry(
+	IN PRTMP_ADAPTER pAd,
+	IN PMAC_TABLE_ENTRY pEntry,
+	IN UCHAR MaxSupportedRateIn500Kbps,
+	IN HT_CAPABILITY_IE *pHtCapability,
+	IN UCHAR HtCapabilityLen,
+	IN ADD_HT_INFO_IE *pAddHtInfo,
+	IN UCHAR AddHtInfoLen,
+	IN USHORT CapabilityInfo)
+{
+	UCHAR MaxSupportedRate = RATE_11;
+	BOOLEAN bSupportN = FALSE;
+
+	if (!pEntry)
+		return FALSE;
+
+	if (ADHOC_ON(pAd))
+		CLIENT_STATUS_CLEAR_FLAG(pEntry, fCLIENT_STATUS_WMM_CAPABLE);
+
+	switch (MaxSupportedRateIn500Kbps) {
+	case 108:
+		MaxSupportedRate = RATE_54;
+		break;
+	case 96:
+		MaxSupportedRate = RATE_48;
+		break;
+	case 72:
+		MaxSupportedRate = RATE_36;
+		break;
+	case 48:
+		MaxSupportedRate = RATE_24;
+		break;
+	case 36:
+		MaxSupportedRate = RATE_18;
+		break;
+	case 24:
+		MaxSupportedRate = RATE_12;
+		break;
+	case 18:
+		MaxSupportedRate = RATE_9;
+		break;
+	case 12:
+		MaxSupportedRate = RATE_6;
+		break;
+	case 22:
+		MaxSupportedRate = RATE_11;
+		break;
+	case 11:
+		MaxSupportedRate = RATE_5_5;
+		break;
+	case 4:
+		MaxSupportedRate = RATE_2;
+		break;
+	case 2:
+		MaxSupportedRate = RATE_1;
+		break;
+	default:
+		MaxSupportedRate = RATE_11;
+		break;
+	}
+
+	if ((pAd->CommonCfg.PhyMode == PHY_11G)
+	    && (MaxSupportedRate < RATE_FIRST_OFDM_RATE))
+		return FALSE;
+
+#ifdef DOT11_N_SUPPORT
+	/* 11n only */
+	if (((pAd->CommonCfg.PhyMode == PHY_11N_2_4G)
+	     || (pAd->CommonCfg.PhyMode == PHY_11N_5G))
+	    && (HtCapabilityLen == 0))
+		return FALSE;
+#endif /* DOT11_N_SUPPORT */
+
+	NdisAcquireSpinLock(&pAd->MacTabLock);
+	if (pEntry) {
+		pEntry->PortSecured = WPA_802_1X_PORT_SECURED;
+		if ((MaxSupportedRate < RATE_FIRST_OFDM_RATE) ||
+		    (pAd->CommonCfg.PhyMode == PHY_11B)) {
+			pEntry->RateLen = 4;
+			if (MaxSupportedRate >= RATE_FIRST_OFDM_RATE)
+				MaxSupportedRate = RATE_11;
+		} else
+			pEntry->RateLen = 12;
+
+		pEntry->MaxHTPhyMode.word = 0;
+		pEntry->MinHTPhyMode.word = 0;
+		pEntry->HTPhyMode.word = 0;
+		pEntry->MaxSupportedRate = MaxSupportedRate;
+		if (pEntry->MaxSupportedRate < RATE_FIRST_OFDM_RATE) {
+			pEntry->MaxHTPhyMode.field.MODE = MODE_CCK;
+			pEntry->MaxHTPhyMode.field.MCS =
+			    pEntry->MaxSupportedRate;
+			pEntry->MinHTPhyMode.field.MODE = MODE_CCK;
+			pEntry->MinHTPhyMode.field.MCS =
+			    pEntry->MaxSupportedRate;
+			pEntry->HTPhyMode.field.MODE = MODE_CCK;
+			pEntry->HTPhyMode.field.MCS = pEntry->MaxSupportedRate;
+		} else {
+			pEntry->MaxHTPhyMode.field.MODE = MODE_OFDM;
+			pEntry->MaxHTPhyMode.field.MCS =
+			    OfdmRateToRxwiMCS[pEntry->MaxSupportedRate];
+			pEntry->MinHTPhyMode.field.MODE = MODE_OFDM;
+			pEntry->MinHTPhyMode.field.MCS =
+			    OfdmRateToRxwiMCS[pEntry->MaxSupportedRate];
+			pEntry->HTPhyMode.field.MODE = MODE_OFDM;
+			pEntry->HTPhyMode.field.MCS =
+			    OfdmRateToRxwiMCS[pEntry->MaxSupportedRate];
+		}
+		pEntry->CapabilityInfo = CapabilityInfo;
+		CLIENT_STATUS_CLEAR_FLAG(pEntry,
+					 fCLIENT_STATUS_AGGREGATION_CAPABLE);
+		CLIENT_STATUS_CLEAR_FLAG(pEntry,
+					 fCLIENT_STATUS_PIGGYBACK_CAPABLE);
+	}
+#ifdef DOT11_N_SUPPORT
+	NdisZeroMemory(&pEntry->HTCapability, sizeof (pEntry->HTCapability));
+	/* If this Entry supports 802.11n, upgrade to HT rate. */
+	if (((pAd->StaCfg.WepStatus != Ndis802_11WEPEnabled)
+	     && (pAd->StaCfg.WepStatus != Ndis802_11Encryption2Enabled))
+	    || (pAd->CommonCfg.HT_DisallowTKIP == FALSE)) {
+		if ((pAd->StaCfg.BssType == BSS_INFRA) &&
+		    (HtCapabilityLen != 0) &&
+		    (pAd->CommonCfg.PhyMode >= PHY_11ABGN_MIXED))
+			bSupportN = TRUE;
+		if ((pAd->StaCfg.BssType == BSS_ADHOC) &&
+		    (pAd->StaCfg.bAdhocN == TRUE) &&
+		    (HtCapabilityLen != 0) &&
+		    (pAd->CommonCfg.PhyMode >= PHY_11ABGN_MIXED))
+			bSupportN = TRUE;
+	}
+	if (bSupportN) {
+		UCHAR j, bitmask;	/*k,bitmask; */
+		CHAR i;
+
+		if (ADHOC_ON(pAd))
+			CLIENT_STATUS_SET_FLAG(pEntry,
+					       fCLIENT_STATUS_WMM_CAPABLE);
+		if ((pHtCapability->HtCapInfo.GF)
+		    && (pAd->CommonCfg.DesiredHtPhy.GF)) {
+			pEntry->MaxHTPhyMode.field.MODE = MODE_HTGREENFIELD;
+		} else {
+			pEntry->MaxHTPhyMode.field.MODE = MODE_HTMIX;
+			pAd->MacTab.fAnyStationNonGF = TRUE;
+			pAd->CommonCfg.AddHTInfo.AddHtInfo2.NonGfPresent = 1;
+		}
+
+		if ((pHtCapability->HtCapInfo.ChannelWidth) &&
+		    (pAd->CommonCfg.DesiredHtPhy.ChannelWidth)) {
+			pEntry->MaxHTPhyMode.field.BW = BW_40;
+			pEntry->MaxHTPhyMode.field.ShortGI =
+			    ((pAd->CommonCfg.DesiredHtPhy.
+			      ShortGIfor40) & (pHtCapability->HtCapInfo.
+					       ShortGIfor40));
+		} else {
+			pEntry->MaxHTPhyMode.field.BW = BW_20;
+			pEntry->MaxHTPhyMode.field.ShortGI =
+			    ((pAd->CommonCfg.DesiredHtPhy.
+			      ShortGIfor20) & (pHtCapability->HtCapInfo.
+					       ShortGIfor20));
+			pAd->MacTab.fAnyStation20Only = TRUE;
+		}
+
+
+		/* find max fixed rate */
+		for (i = 23; i >= 0; i--) {	/* 3*3 */
+			j = i / 8;
+			bitmask = (1 << (i - (j * 8)));
+			if ((pAd->StaCfg.DesiredHtPhyInfo.MCSSet[j] & bitmask)
+			    && (pHtCapability->MCSSet[j] & bitmask)) {
+				pEntry->MaxHTPhyMode.field.MCS = i;
+				break;
+			}
+			if (i == 0)
+				break;
+		}
+
+		if (pAd->StaCfg.DesiredTransmitSetting.field.MCS != MCS_AUTO) {
+			if (pAd->StaCfg.DesiredTransmitSetting.field.MCS == 32) {
+				/* Fix MCS as HT Duplicated Mode */
+				pEntry->MaxHTPhyMode.field.BW = 1;
+				pEntry->MaxHTPhyMode.field.MODE = MODE_HTMIX;
+				pEntry->MaxHTPhyMode.field.STBC = 0;
+				pEntry->MaxHTPhyMode.field.ShortGI = 0;
+				pEntry->MaxHTPhyMode.field.MCS = 32;
+			} else if (pEntry->MaxHTPhyMode.field.MCS >
+				   pAd->StaCfg.HTPhyMode.field.MCS) {
+				/* STA supports fixed MCS */
+				pEntry->MaxHTPhyMode.field.MCS =
+				    pAd->StaCfg.HTPhyMode.field.MCS;
+			}
+		}
+
+		pEntry->MaxHTPhyMode.field.STBC =
+		    (pHtCapability->HtCapInfo.
+		     RxSTBC & (pAd->CommonCfg.DesiredHtPhy.TxSTBC));
+		pEntry->MpduDensity = pHtCapability->HtCapParm.MpduDensity;
+		pEntry->MaxRAmpduFactor =
+		    pHtCapability->HtCapParm.MaxRAmpduFactor;
+		pEntry->MmpsMode = (UCHAR) pHtCapability->HtCapInfo.MimoPs;
+		pEntry->AMsduSize = (UCHAR) pHtCapability->HtCapInfo.AMsduSize;
+		pEntry->HTPhyMode.word = pEntry->MaxHTPhyMode.word;
+
+		if (pAd->CommonCfg.DesiredHtPhy.AmsduEnable
+		    && (pAd->CommonCfg.REGBACapability.field.AutoBA == FALSE))
+			CLIENT_STATUS_SET_FLAG(pEntry,
+					       fCLIENT_STATUS_AMSDU_INUSED);
+		if (pHtCapability->HtCapInfo.ShortGIfor20)
+			CLIENT_STATUS_SET_FLAG(pEntry,
+					       fCLIENT_STATUS_SGI20_CAPABLE);
+		if (pHtCapability->HtCapInfo.ShortGIfor40)
+			CLIENT_STATUS_SET_FLAG(pEntry,
+					       fCLIENT_STATUS_SGI40_CAPABLE);
+		if (pHtCapability->HtCapInfo.TxSTBC)
+			CLIENT_STATUS_SET_FLAG(pEntry,
+					       fCLIENT_STATUS_TxSTBC_CAPABLE);
+		if (pHtCapability->HtCapInfo.RxSTBC)
+			CLIENT_STATUS_SET_FLAG(pEntry,
+					       fCLIENT_STATUS_RxSTBC_CAPABLE);
+		if (pHtCapability->ExtHtCapInfo.PlusHTC)
+			CLIENT_STATUS_SET_FLAG(pEntry,
+					       fCLIENT_STATUS_HTC_CAPABLE);
+		if (pAd->CommonCfg.bRdg
+		    && pHtCapability->ExtHtCapInfo.RDGSupport)
+			CLIENT_STATUS_SET_FLAG(pEntry,
+					       fCLIENT_STATUS_RDG_CAPABLE);
+		if (pHtCapability->ExtHtCapInfo.MCSFeedback == 0x03)
+			CLIENT_STATUS_SET_FLAG(pEntry,
+					       fCLIENT_STATUS_MCSFEEDBACK_CAPABLE);
+		NdisMoveMemory(&pEntry->HTCapability, pHtCapability,
+			       HtCapabilityLen);
+	} else {
+		pAd->MacTab.fAnyStationIsLegacy = TRUE;
+	}
+#endif /* DOT11_N_SUPPORT */
+
+	pEntry->HTPhyMode.word = pEntry->MaxHTPhyMode.word;
+	pEntry->CurrTxRate = pEntry->MaxSupportedRate;
+
+	/* Set asic auto fall back */
+	if (pAd->StaCfg.bAutoTxRateSwitch == TRUE) {
+		PUCHAR pTable;
+		UCHAR TableSize = 0;
+
+		MlmeSelectTxRateTable(pAd, pEntry, &pTable, &TableSize,
+				      &pEntry->CurrTxRateIndex);
+		pEntry->bAutoTxRateSwitch = TRUE;
+	} else {
+		pEntry->HTPhyMode.field.MODE = pAd->StaCfg.HTPhyMode.field.MODE;
+		pEntry->HTPhyMode.field.MCS = pAd->StaCfg.HTPhyMode.field.MCS;
+		pEntry->bAutoTxRateSwitch = FALSE;
+
+		/* If the legacy mode is set, overwrite the transmit setting of this entry. */
+		RTMPUpdateLegacyTxSetting((UCHAR) pAd->StaCfg.
+					  DesiredTransmitSetting.field.
+					  FixedTxMode, pEntry);
+	}
+
+
+	pEntry->PortSecured = WPA_802_1X_PORT_SECURED;
+	pEntry->Sst = SST_ASSOC;
+	pEntry->AuthState = AS_AUTH_OPEN;
+	pEntry->AuthMode = pAd->StaCfg.AuthMode;
+	pEntry->WepStatus = pAd->StaCfg.WepStatus;
+	if (pEntry->AuthMode < Ndis802_11AuthModeWPA) {
+		pEntry->WpaState = AS_NOTUSE;
+		pEntry->PrivacyFilter = Ndis802_11PrivFilterAcceptAll;
+	} else {
+		pEntry->WpaState = AS_PTKSTART;
+		pEntry->PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
+	}
+
+	if (pAd->StaCfg.BssType == BSS_INFRA) {
+		UCHAR HashIdx = 0;
+		MAC_TABLE_ENTRY *pCurrEntry = NULL;
+		HashIdx = MAC_ADDR_HASH_INDEX(pAd->MlmeAux.Bssid);
+		if (pAd->MacTab.Hash[HashIdx] == NULL) {
+			pAd->MacTab.Hash[HashIdx] = pEntry;
+		} else {
+			pCurrEntry = pAd->MacTab.Hash[HashIdx];
+			while (pCurrEntry->pNext != NULL) {
+				pCurrEntry = pCurrEntry->pNext;
+			}
+			pCurrEntry->pNext = pEntry;
+		}
+		RTMPMoveMemory(pEntry->Addr, pAd->MlmeAux.Bssid, MAC_ADDR_LEN);
+		pEntry->Aid = BSSID_WCID;
+		pEntry->pAd = pAd;
+		SET_ENTRY_CLIENT(pEntry);
+		pAd->MacTab.Size = 1;	/* infra mode always set MACtab size =1. */
+	}
+
+	NdisReleaseSpinLock(&pAd->MacTabLock);
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+#ifndef NATIVE_WPA_SUPPLICANT_SUPPORT
+	if (pAd->StaCfg.WpaSupplicantUP) {
+/*        union iwreq_data    wrqu; */
+
+		SendAssocIEsToWpaSupplicant(pAd->net_dev, pAd->StaCfg.ReqVarIEs,
+					    pAd->StaCfg.ReqVarIELen);
+
+
+		RtmpOSWrielessEventSend(pAd->net_dev, RT_WLAN_EVENT_CUSTOM,
+					RT_ASSOC_EVENT_FLAG, NULL, NULL, 0);
+	}
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+#ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
+	{
+/*        union iwreq_data    wrqu; */
+		wext_notify_event_assoc(pAd->net_dev, pAd->StaCfg.ReqVarIEs,
+					pAd->StaCfg.ReqVarIELen);
+
+
+		RtmpOSWrielessEventSend(pAd->net_dev, RT_WLAN_EVENT_CGIWAP, -1,
+					pAd->MlmeAux.Bssid, NULL, 0);
+	}
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+
+
+	return TRUE;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/sta/auth.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/sta/auth.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/sta/auth.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/sta/auth.c	2017-09-23 03:42:49.846675590 +0800
@@ -0,0 +1,595 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+/*
+    ==========================================================================
+    Description:
+        authenticate state machine init, including state transition and timer init
+    Parameters:
+        Sm - pointer to the auth state machine
+    Note:
+        The state machine looks like this
+        
+                        AUTH_REQ_IDLE           AUTH_WAIT_SEQ2                   AUTH_WAIT_SEQ4
+    MT2_MLME_AUTH_REQ   mlme_auth_req_action    invalid_state_when_auth          invalid_state_when_auth
+    MT2_PEER_AUTH_EVEN  drop                    peer_auth_even_at_seq2_action    peer_auth_even_at_seq4_action
+    MT2_AUTH_TIMEOUT    Drop                    auth_timeout_action              auth_timeout_action
+        
+	IRQL = PASSIVE_LEVEL
+
+    ==========================================================================
+ */
+
+void AuthStateMachineInit(
+	IN PRTMP_ADAPTER pAd,
+	IN STATE_MACHINE *Sm,
+	OUT STATE_MACHINE_FUNC Trans[])
+{
+	StateMachineInit(Sm, Trans, MAX_AUTH_STATE, MAX_AUTH_MSG,
+			 (STATE_MACHINE_FUNC) Drop, AUTH_REQ_IDLE,
+			 AUTH_MACHINE_BASE);
+
+	/* the first column */
+	StateMachineSetAction(Sm, AUTH_REQ_IDLE, MT2_MLME_AUTH_REQ,
+			      (STATE_MACHINE_FUNC) MlmeAuthReqAction);
+
+	/* the second column */
+	StateMachineSetAction(Sm, AUTH_WAIT_SEQ2, MT2_MLME_AUTH_REQ,
+			      (STATE_MACHINE_FUNC) InvalidStateWhenAuth);
+	StateMachineSetAction(Sm, AUTH_WAIT_SEQ2, MT2_PEER_AUTH_EVEN,
+			      (STATE_MACHINE_FUNC) PeerAuthRspAtSeq2Action);
+	StateMachineSetAction(Sm, AUTH_WAIT_SEQ2, MT2_AUTH_TIMEOUT,
+			      (STATE_MACHINE_FUNC) AuthTimeoutAction);
+
+	/* the third column */
+	StateMachineSetAction(Sm, AUTH_WAIT_SEQ4, MT2_MLME_AUTH_REQ,
+			      (STATE_MACHINE_FUNC) InvalidStateWhenAuth);
+	StateMachineSetAction(Sm, AUTH_WAIT_SEQ4, MT2_PEER_AUTH_EVEN,
+			      (STATE_MACHINE_FUNC) PeerAuthRspAtSeq4Action);
+	StateMachineSetAction(Sm, AUTH_WAIT_SEQ4, MT2_AUTH_TIMEOUT,
+			      (STATE_MACHINE_FUNC) AuthTimeoutAction);
+
+	RTMPInitTimer(pAd, &pAd->MlmeAux.AuthTimer,
+		      GET_TIMER_FUNCTION(AuthTimeout), pAd, FALSE);
+}
+
+/*
+    ==========================================================================
+    Description:
+        function to be executed at timer thread when auth timer expires
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+VOID AuthTimeout(
+	IN PVOID SystemSpecific1,
+	IN PVOID FunctionContext,
+	IN PVOID SystemSpecific2,
+	IN PVOID SystemSpecific3)
+{
+	RTMP_ADAPTER *pAd = (RTMP_ADAPTER *) FunctionContext;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("AUTH - AuthTimeout\n"));
+
+	/* Do nothing if the driver is starting halt state. */
+	/* This might happen when timer already been fired before cancel timer with mlmehalt */
+	if (RTMP_TEST_FLAG
+	    (pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS | fRTMP_ADAPTER_NIC_NOT_EXIST))
+		return;
+
+	/* send a de-auth to reset AP's state machine (Patch AP-Dir635) */
+	if (pAd->Mlme.AuthMachine.CurrState == AUTH_WAIT_SEQ2)
+		Cls2errAction(pAd, pAd->MlmeAux.Bssid);
+
+	MlmeEnqueue(pAd, AUTH_STATE_MACHINE, MT2_AUTH_TIMEOUT, 0, NULL, 0);
+	RTMP_MLME_HANDLER(pAd);
+}
+
+/*
+    ==========================================================================
+    Description:
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+VOID MlmeAuthReqAction(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	if (AUTH_ReqSend
+	    (pAd, Elem, &pAd->MlmeAux.AuthTimer, "AUTH", 1, NULL, 0))
+		pAd->Mlme.AuthMachine.CurrState = AUTH_WAIT_SEQ2;
+	else {
+		USHORT Status;
+
+		pAd->Mlme.AuthMachine.CurrState = AUTH_REQ_IDLE;
+		Status = MLME_INVALID_FORMAT;
+		MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_AUTH_CONF, 2,
+			    &Status, 0);
+	}
+}
+
+/*
+    ==========================================================================
+    Description:
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+VOID PeerAuthRspAtSeq2Action(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM * Elem)
+{
+	UCHAR Addr2[MAC_ADDR_LEN];
+	USHORT Seq, Status, RemoteStatus, Alg;
+	UCHAR iv_hdr[4];
+/*    UCHAR         ChlgText[CIPHER_TEXT_LEN]; */
+	UCHAR *ChlgText = NULL;
+/*    UCHAR         CyperChlgText[CIPHER_TEXT_LEN + 8 + 8]; */
+	UCHAR *CyperChlgText = NULL;
+	ULONG c_len = 0;
+	HEADER_802_11 AuthHdr;
+	BOOLEAN TimerCancelled;
+	PUCHAR pOutBuffer = NULL;
+	NDIS_STATUS NStatus;
+	ULONG FrameLen = 0;
+	USHORT Status2;
+	UCHAR ChallengeIe = IE_CHALLENGE_TEXT;
+	UCHAR len_challengeText = CIPHER_TEXT_LEN;
+
+	/* allocate memory */
+	os_alloc_mem(NULL, (UCHAR **) & ChlgText, CIPHER_TEXT_LEN);
+	if (ChlgText == NULL) {
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("%s: ChlgText Allocate memory fail!!!\n",
+			  __FUNCTION__));
+		return;
+	}
+
+	os_alloc_mem(NULL, (UCHAR **) & CyperChlgText, CIPHER_TEXT_LEN + 8 + 8);
+	if (CyperChlgText == NULL) {
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("%s: CyperChlgText Allocate memory fail!!!\n",
+			  __FUNCTION__));
+		os_free_mem(NULL, ChlgText);
+		return;
+	}
+
+	if (PeerAuthSanity
+	    (pAd, Elem->Msg, Elem->MsgLen, Addr2, &Alg, &Seq, &Status,
+	     (PCHAR) ChlgText)) {
+		if (MAC_ADDR_EQUAL(pAd->MlmeAux.Bssid, Addr2) && Seq == 2) {
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("AUTH - Receive AUTH_RSP seq#2 to me (Alg=%d, Status=%d)\n",
+				  Alg, Status));
+			RTMPCancelTimer(&pAd->MlmeAux.AuthTimer,
+					&TimerCancelled);
+
+			if (Status == MLME_SUCCESS) {
+				/* Authentication Mode "LEAP" has allow for CCX 1.X */
+				if (pAd->MlmeAux.Alg == Ndis802_11AuthModeOpen) {
+					pAd->Mlme.AuthMachine.CurrState =
+					    AUTH_REQ_IDLE;
+					MlmeEnqueue(pAd,
+						    MLME_CNTL_STATE_MACHINE,
+						    MT2_AUTH_CONF, 2, &Status,
+						    0);
+				} else {
+					/* 2. shared key, need to be challenged */
+					Seq++;
+					RemoteStatus = MLME_SUCCESS;
+
+					/* Get an unused nonpaged memory */
+					NStatus =
+					    MlmeAllocateMemory(pAd,
+							       &pOutBuffer);
+					if (NStatus != NDIS_STATUS_SUCCESS) {
+						DBGPRINT(RT_DEBUG_TRACE,
+							 ("AUTH - PeerAuthRspAtSeq2Action() allocate memory fail\n"));
+						pAd->Mlme.AuthMachine.
+						    CurrState = AUTH_REQ_IDLE;
+						Status2 = MLME_FAIL_NO_RESOURCE;
+						MlmeEnqueue(pAd,
+							    MLME_CNTL_STATE_MACHINE,
+							    MT2_AUTH_CONF, 2,
+							    &Status2, 0);
+						goto LabelOK;
+					}
+
+					DBGPRINT(RT_DEBUG_TRACE,
+						 ("AUTH - Send AUTH request seq#3...\n"));
+					MgtMacHeaderInit(pAd, &AuthHdr,
+							 SUBTYPE_AUTH, 0, Addr2,
+							 pAd->MlmeAux.Bssid);
+					AuthHdr.FC.Wep = 1;
+
+					/* TSC increment */
+					INC_TX_TSC(pAd->
+						   SharedKey[BSS0][pAd->StaCfg.
+								   DefaultKeyId].
+						   TxTsc, LEN_WEP_TSC);
+
+					/* Construct the 4-bytes WEP IV header */
+					RTMPConstructWEPIVHdr(pAd->StaCfg.
+							      DefaultKeyId,
+							      pAd->
+							      SharedKey[BSS0]
+							      [pAd->StaCfg.
+							       DefaultKeyId].
+							      TxTsc, iv_hdr);
+
+					Alg = cpu2le16(*(USHORT *) & Alg);
+					Seq = cpu2le16(*(USHORT *) & Seq);
+					RemoteStatus =
+					    cpu2le16(*(USHORT *) &
+						     RemoteStatus);
+
+					/* Construct message text */
+					MakeOutgoingFrame(CyperChlgText, &c_len,
+							  2, &Alg,
+							  2, &Seq,
+							  2, &RemoteStatus,
+							  1, &ChallengeIe,
+							  1, &len_challengeText,
+							  len_challengeText,
+							  ChlgText,
+							  END_OF_ARGS);
+
+					if (RTMPSoftEncryptWEP(pAd,
+							       iv_hdr,
+							       &pAd->
+							       SharedKey[BSS0]
+							       [pAd->StaCfg.
+								DefaultKeyId],
+							       CyperChlgText,
+							       c_len) ==
+					    FALSE) {
+						MlmeFreeMemory(pAd, pOutBuffer);
+						pAd->Mlme.AuthMachine.
+						    CurrState = AUTH_REQ_IDLE;
+						Status2 = MLME_FAIL_NO_RESOURCE;
+						MlmeEnqueue(pAd,
+							    MLME_CNTL_STATE_MACHINE,
+							    MT2_AUTH_CONF, 2,
+							    &Status2, 0);
+						goto LabelOK;
+					}
+
+					/* Update the total length for 4-bytes ICV */
+					c_len += LEN_ICV;
+
+					MakeOutgoingFrame(pOutBuffer, &FrameLen,
+							  sizeof
+							  (HEADER_802_11),
+							  &AuthHdr,
+							  LEN_WEP_IV_HDR,
+							  iv_hdr, c_len,
+							  CyperChlgText,
+							  END_OF_ARGS);
+
+					MiniportMMRequest(pAd, 0, pOutBuffer,
+							  FrameLen);
+					MlmeFreeMemory(pAd, pOutBuffer);
+
+					RTMPSetTimer(&pAd->MlmeAux.AuthTimer,
+						     AUTH_TIMEOUT);
+					pAd->Mlme.AuthMachine.CurrState =
+					    AUTH_WAIT_SEQ4;
+				}
+			} else {
+				pAd->StaCfg.AuthFailReason = Status;
+				COPY_MAC_ADDR(pAd->StaCfg.AuthFailSta, Addr2);
+				pAd->Mlme.AuthMachine.CurrState = AUTH_REQ_IDLE;
+				MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE,
+					    MT2_AUTH_CONF, 2, &Status, 0);
+			}
+		}
+	} else {
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("AUTH - PeerAuthSanity() sanity check fail\n"));
+	}
+
+      LabelOK:
+	if (ChlgText != NULL)
+		os_free_mem(NULL, ChlgText);
+
+	if (CyperChlgText != NULL)
+		os_free_mem(NULL, CyperChlgText);
+	return;
+}
+
+/*
+    ==========================================================================
+    Description:
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+VOID PeerAuthRspAtSeq4Action(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	UCHAR Addr2[MAC_ADDR_LEN];
+	USHORT Alg, Seq, Status;
+/*    CHAR          ChlgText[CIPHER_TEXT_LEN]; */
+	CHAR *ChlgText = NULL;
+	BOOLEAN TimerCancelled;
+
+	/* allocate memory */
+	os_alloc_mem(NULL, (UCHAR **) & ChlgText, CIPHER_TEXT_LEN);
+	if (ChlgText == NULL) {
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("%s: ChlgText Allocate memory fail!!!\n",
+			  __FUNCTION__));
+		return;
+	}
+
+	if (PeerAuthSanity
+	    (pAd, Elem->Msg, Elem->MsgLen, Addr2, &Alg, &Seq, &Status,
+	     ChlgText)) {
+		if (MAC_ADDR_EQUAL(pAd->MlmeAux.Bssid, Addr2) && Seq == 4) {
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("AUTH - Receive AUTH_RSP seq#4 to me\n"));
+			RTMPCancelTimer(&pAd->MlmeAux.AuthTimer,
+					&TimerCancelled);
+
+			if (Status != MLME_SUCCESS) {
+				pAd->StaCfg.AuthFailReason = Status;
+				COPY_MAC_ADDR(pAd->StaCfg.AuthFailSta, Addr2);
+				RTMPSendWirelessEvent(pAd, IW_SHARED_WEP_FAIL,
+						      NULL, BSS0, 0);
+			}
+
+			pAd->Mlme.AuthMachine.CurrState = AUTH_REQ_IDLE;
+			MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_AUTH_CONF,
+				    2, &Status, 0);
+		}
+	} else {
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("AUTH - PeerAuthRspAtSeq4Action() sanity check fail\n"));
+	}
+
+	if (ChlgText != NULL)
+		os_free_mem(NULL, ChlgText);
+}
+
+/*
+    ==========================================================================
+    Description:
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+VOID MlmeDeauthReqAction(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	MLME_DEAUTH_REQ_STRUCT *pInfo;
+	HEADER_802_11 DeauthHdr;
+	PUCHAR pOutBuffer = NULL;
+	NDIS_STATUS NStatus;
+	ULONG FrameLen = 0;
+	USHORT Status;
+
+	pInfo = (MLME_DEAUTH_REQ_STRUCT *) Elem->Msg;
+
+	NStatus = MlmeAllocateMemory(pAd, &pOutBuffer);	/*Get an unused nonpaged memory */
+	if (NStatus != NDIS_STATUS_SUCCESS) {
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("AUTH - MlmeDeauthReqAction() allocate memory fail\n"));
+		pAd->Mlme.AuthMachine.CurrState = AUTH_REQ_IDLE;
+		Status = MLME_FAIL_NO_RESOURCE;
+		MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_DEAUTH_CONF, 2,
+			    &Status, 0);
+		return;
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("AUTH - Send DE-AUTH request (Reason=%d)...\n",
+		  pInfo->Reason));
+	MgtMacHeaderInit(pAd, &DeauthHdr, SUBTYPE_DEAUTH, 0, pInfo->Addr,
+						pAd->MlmeAux.Bssid);
+	MakeOutgoingFrame(pOutBuffer, &FrameLen, sizeof (HEADER_802_11),
+			  &DeauthHdr, 2, &pInfo->Reason, END_OF_ARGS);
+	MiniportMMRequest(pAd, 0, pOutBuffer, FrameLen);
+	MlmeFreeMemory(pAd, pOutBuffer);
+
+	pAd->StaCfg.DeauthReason = pInfo->Reason;
+	COPY_MAC_ADDR(pAd->StaCfg.DeauthSta, pInfo->Addr);
+	pAd->Mlme.AuthMachine.CurrState = AUTH_REQ_IDLE;
+	Status = MLME_SUCCESS;
+	MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_DEAUTH_CONF, 2, &Status,
+		    0);
+
+	/* send wireless event - for deauthentication */
+	RTMPSendWirelessEvent(pAd, IW_DEAUTH_EVENT_FLAG, NULL, BSS0, 0);
+}
+
+/*
+    ==========================================================================
+    Description:
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+VOID AuthTimeoutAction(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	USHORT Status;
+	DBGPRINT(RT_DEBUG_TRACE, ("AUTH - AuthTimeoutAction\n"));
+	pAd->Mlme.AuthMachine.CurrState = AUTH_REQ_IDLE;
+	Status = MLME_REJ_TIMEOUT;
+	MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_AUTH_CONF, 2, &Status, 0);
+}
+
+/*
+    ==========================================================================
+    Description:
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+VOID InvalidStateWhenAuth(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	USHORT Status;
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("AUTH - InvalidStateWhenAuth (state=%ld), reset AUTH state machine\n",
+		  pAd->Mlme.AuthMachine.CurrState));
+	pAd->Mlme.AuthMachine.CurrState = AUTH_REQ_IDLE;
+	Status = MLME_STATE_MACHINE_REJECT;
+	MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_AUTH_CONF, 2, &Status, 0);
+}
+
+/*
+    ==========================================================================
+    Description:
+        Some STA/AP
+    Note:
+        This action should never trigger AUTH state transition, therefore we
+        separate it from AUTH state machine, and make it as a standalone service
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+VOID Cls2errAction(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pAddr)
+{
+	HEADER_802_11 DeauthHdr;
+	PUCHAR pOutBuffer = NULL;
+	NDIS_STATUS NStatus;
+	ULONG FrameLen = 0;
+	USHORT Reason = REASON_CLS2ERR;
+
+	NStatus = MlmeAllocateMemory(pAd, &pOutBuffer);	/*Get an unused nonpaged memory */
+	if (NStatus != NDIS_STATUS_SUCCESS)
+		return;
+
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("AUTH - Class 2 error, Send DEAUTH frame...\n"));
+	MgtMacHeaderInit(pAd, &DeauthHdr, SUBTYPE_DEAUTH, 0, pAddr,
+						pAd->MlmeAux.Bssid);
+	MakeOutgoingFrame(pOutBuffer, &FrameLen, sizeof (HEADER_802_11),
+			  &DeauthHdr, 2, &Reason, END_OF_ARGS);
+	MiniportMMRequest(pAd, 0, pOutBuffer, FrameLen);
+	MlmeFreeMemory(pAd, pOutBuffer);
+
+	pAd->StaCfg.DeauthReason = Reason;
+	COPY_MAC_ADDR(pAd->StaCfg.DeauthSta, pAddr);
+}
+
+BOOLEAN AUTH_ReqSend(
+	IN PRTMP_ADAPTER pAd,
+	IN PMLME_QUEUE_ELEM pElem,
+	IN PRALINK_TIMER_STRUCT pAuthTimer,
+	IN PSTRING pSMName,
+	IN USHORT SeqNo,
+	IN PUCHAR pNewElement,
+	IN ULONG ElementLen)
+{
+	USHORT Alg, Seq, Status;
+	UCHAR Addr[6];
+	ULONG Timeout;
+	HEADER_802_11 AuthHdr;
+	BOOLEAN TimerCancelled;
+	NDIS_STATUS NStatus;
+	PUCHAR pOutBuffer = NULL;
+	ULONG FrameLen = 0, tmp = 0;
+
+	/* Block all authentication request durning WPA block period */
+	if (pAd->StaCfg.bBlockAssoc == TRUE) {
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("%s - Block Auth request durning WPA block period!\n",
+			  pSMName));
+		pAd->Mlme.AuthMachine.CurrState = AUTH_REQ_IDLE;
+		Status = MLME_STATE_MACHINE_REJECT;
+		MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_AUTH_CONF, 2,
+			    &Status, 0);
+	} else
+	    if (MlmeAuthReqSanity
+		(pAd, pElem->Msg, pElem->MsgLen, Addr, &Timeout, &Alg)) {
+		/* reset timer */
+		RTMPCancelTimer(pAuthTimer, &TimerCancelled);
+
+		COPY_MAC_ADDR(pAd->MlmeAux.Bssid, Addr);
+		pAd->MlmeAux.Alg = Alg;
+		Seq = SeqNo;
+		Status = MLME_SUCCESS;
+
+		NStatus = MlmeAllocateMemory(pAd, &pOutBuffer);	/*Get an unused nonpaged memory */
+		if (NStatus != NDIS_STATUS_SUCCESS) {
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("%s - MlmeAuthReqAction(Alg:%d) allocate memory failed\n",
+				  pSMName, Alg));
+			pAd->Mlme.AuthMachine.CurrState = AUTH_REQ_IDLE;
+			Status = MLME_FAIL_NO_RESOURCE;
+			MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_AUTH_CONF,
+				    2, &Status, 0);
+			return FALSE;
+		}
+
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("%s - Send AUTH request seq#1 (Alg=%d)...\n", pSMName,
+			  Alg));
+		MgtMacHeaderInit(pAd, &AuthHdr, SUBTYPE_AUTH, 0, Addr,
+							pAd->MlmeAux.Bssid);
+		MakeOutgoingFrame(pOutBuffer, &FrameLen, sizeof (HEADER_802_11),
+				  &AuthHdr, 2, &Alg, 2, &Seq, 2, &Status,
+				  END_OF_ARGS);
+
+		if (pNewElement && ElementLen) {
+			MakeOutgoingFrame(pOutBuffer + FrameLen, &tmp,
+					  ElementLen, pNewElement, END_OF_ARGS);
+			FrameLen += tmp;
+		}
+
+		MiniportMMRequest(pAd, 0, pOutBuffer, FrameLen);
+		MlmeFreeMemory(pAd, pOutBuffer);
+
+		RTMPSetTimer(pAuthTimer, Timeout);
+		return TRUE;
+	} else {
+		DBGPRINT_ERR(("%s - MlmeAuthReqAction() sanity check failed\n",
+			      pSMName));
+		return FALSE;
+	}
+
+	return TRUE;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/sta/auth_rsp.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/sta/auth_rsp.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/sta/auth_rsp.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/sta/auth_rsp.c	2017-09-23 03:42:49.846675590 +0800
@@ -0,0 +1,187 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+/*
+    ==========================================================================
+    Description:
+        authentication state machine init procedure
+    Parameters:
+        Sm - the state machine
+        
+	IRQL = PASSIVE_LEVEL
+
+    ==========================================================================
+ */
+VOID AuthRspStateMachineInit(
+	IN PRTMP_ADAPTER pAd,
+	IN PSTATE_MACHINE Sm,
+	IN STATE_MACHINE_FUNC Trans[])
+{
+	StateMachineInit(Sm, Trans, MAX_AUTH_RSP_STATE, MAX_AUTH_RSP_MSG,
+			 (STATE_MACHINE_FUNC) Drop, AUTH_RSP_IDLE,
+			 AUTH_RSP_MACHINE_BASE);
+
+	/* column 1 */
+	StateMachineSetAction(Sm, AUTH_RSP_IDLE, MT2_PEER_DEAUTH,
+			      (STATE_MACHINE_FUNC) PeerDeauthAction);
+
+	/* column 2 */
+	StateMachineSetAction(Sm, AUTH_RSP_WAIT_CHAL, MT2_PEER_DEAUTH,
+			      (STATE_MACHINE_FUNC) PeerDeauthAction);
+
+}
+
+/*
+    ==========================================================================
+    Description:
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+*/
+VOID PeerAuthSimpleRspGenAndSend(
+	IN PRTMP_ADAPTER pAd,
+	IN PHEADER_802_11 pHdr80211,
+	IN USHORT Alg,
+	IN USHORT Seq,
+	IN USHORT Reason,
+	IN USHORT Status)
+{
+	HEADER_802_11 AuthHdr;
+	ULONG FrameLen = 0;
+	PUCHAR pOutBuffer = NULL;
+	NDIS_STATUS NStatus;
+
+	if (Reason != MLME_SUCCESS) {
+		DBGPRINT(RT_DEBUG_TRACE, ("Peer AUTH fail...\n"));
+		return;
+	}
+
+	/*Get an unused nonpaged memory */
+	NStatus = MlmeAllocateMemory(pAd, &pOutBuffer);
+	if (NStatus != NDIS_STATUS_SUCCESS)
+		return;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Send AUTH response (seq#2)...\n"));
+	MgtMacHeaderInit(pAd, &AuthHdr, SUBTYPE_AUTH, 0, pHdr80211->Addr2,
+						pAd->MlmeAux.Bssid);
+	MakeOutgoingFrame(pOutBuffer, &FrameLen, sizeof (HEADER_802_11),
+			  &AuthHdr, 2, &Alg, 2, &Seq, 2, &Reason, END_OF_ARGS);
+	MiniportMMRequest(pAd, 0, pOutBuffer, FrameLen);
+	MlmeFreeMemory(pAd, pOutBuffer);
+}
+
+/*
+    ==========================================================================
+    Description:
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+*/
+VOID PeerDeauthAction(
+	IN PRTMP_ADAPTER pAd,
+	IN PMLME_QUEUE_ELEM Elem)
+{
+	UCHAR Addr1[MAC_ADDR_LEN];
+	UCHAR Addr2[MAC_ADDR_LEN];
+	UCHAR Addr3[MAC_ADDR_LEN];
+	USHORT Reason;
+	BOOLEAN bDoIterate = FALSE;
+
+	if (PeerDeauthSanity
+	    (pAd, Elem->Msg, Elem->MsgLen, Addr1, Addr2, Addr3, &Reason)) {
+		if (INFRA_ON(pAd)
+		    && (MAC_ADDR_EQUAL(Addr1, pAd->CurrentAddress)
+			|| MAC_ADDR_EQUAL(Addr1, BROADCAST_ADDR))
+		    && MAC_ADDR_EQUAL(Addr2, pAd->CommonCfg.Bssid)
+		    && MAC_ADDR_EQUAL(Addr3, pAd->CommonCfg.Bssid)
+		    ) {
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("AUTH_RSP - receive DE-AUTH from our AP (Reason=%d)\n",
+				  Reason));
+
+			if (Reason == REASON_4_WAY_TIMEOUT)
+				RTMPSendWirelessEvent(pAd,
+						      IW_PAIRWISE_HS_TIMEOUT_EVENT_FLAG,
+						      NULL, 0, 0);
+
+			if (Reason == REASON_GROUP_KEY_HS_TIMEOUT)
+				RTMPSendWirelessEvent(pAd,
+						      IW_GROUP_HS_TIMEOUT_EVENT_FLAG,
+						      NULL, 0, 0);
+
+
+#ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
+			RtmpOSWrielessEventSend(pAd->net_dev,
+						RT_WLAN_EVENT_CGIWAP, -1, NULL,
+						NULL, 0);
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+
+			/* send wireless event - for deauthentication */
+			RTMPSendWirelessEvent(pAd, IW_DEAUTH_EVENT_FLAG, NULL,
+					      BSS0, 0);
+
+
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+			if ((pAd->StaCfg.WpaSupplicantUP !=
+			     WPA_SUPPLICANT_DISABLE)
+			    && (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2)
+			    && (pAd->StaCfg.PortSecured ==
+				WPA_802_1X_PORT_SECURED))
+				pAd->StaCfg.bLostAp = TRUE;
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+			/*
+			   Some customer would set AP1 & AP2 same SSID, AuthMode & EncrypType but different WPAPSK,
+			   therefore we need to do iterate here.
+			 */
+			if ((pAd->StaCfg.PortSecured ==
+			     WPA_802_1X_PORT_NOT_SECURED)
+			    &&
+			    ((pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPAPSK)
+			     || (pAd->StaCfg.AuthMode ==
+				 Ndis802_11AuthModeWPA2PSK))
+			    )
+				bDoIterate = TRUE;
+
+			LinkDown(pAd, TRUE);
+
+			if (bDoIterate) {
+				pAd->MlmeAux.BssIdx++;
+				IterateOnBssTab(pAd);
+			}
+
+		}
+	} else {
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("AUTH_RSP - PeerDeauthAction() sanity check fail\n"));
+	}
+}
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/sta/connect.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/sta/connect.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/sta/connect.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/sta/connect.c	2017-09-23 03:42:49.846675590 +0800
@@ -0,0 +1,3408 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+UCHAR CipherSuiteWpaNoneTkip[] = {
+	0x00, 0x50, 0xf2, 0x01,	/* oui */
+	0x01, 0x00,		/* Version */
+	0x00, 0x50, 0xf2, 0x02,	/* Multicast */
+	0x01, 0x00,		/* Number of unicast */
+	0x00, 0x50, 0xf2, 0x02,	/* unicast */
+	0x01, 0x00,		/* number of authentication method */
+	0x00, 0x50, 0xf2, 0x00	/* authentication */
+};
+UCHAR CipherSuiteWpaNoneTkipLen =
+    (sizeof (CipherSuiteWpaNoneTkip) / sizeof (UCHAR));
+
+UCHAR CipherSuiteWpaNoneAes[] = {
+	0x00, 0x50, 0xf2, 0x01,	/* oui */
+	0x01, 0x00,		/* Version */
+	0x00, 0x50, 0xf2, 0x04,	/* Multicast */
+	0x01, 0x00,		/* Number of unicast */
+	0x00, 0x50, 0xf2, 0x04,	/* unicast */
+	0x01, 0x00,		/* number of authentication method */
+	0x00, 0x50, 0xf2, 0x00	/* authentication */
+};
+UCHAR CipherSuiteWpaNoneAesLen =
+    (sizeof (CipherSuiteWpaNoneAes) / sizeof (UCHAR));
+
+/* The following MACRO is called after 1. starting an new IBSS, 2. succesfully JOIN an IBSS, */
+/* or 3. succesfully ASSOCIATE to a BSS, 4. successfully RE_ASSOCIATE to a BSS */
+/* All settings successfuly negotiated furing MLME state machines become final settings */
+/* and are copied to pAd->StaActive */
+#define COPY_SETTINGS_FROM_MLME_AUX_TO_ACTIVE_CFG(_pAd)                                 \
+{                                                                                       \
+	NdisZeroMemory((_pAd)->CommonCfg.Ssid, MAX_LEN_OF_SSID); 							\
+	(_pAd)->CommonCfg.SsidLen = (_pAd)->MlmeAux.SsidLen;                                \
+	NdisMoveMemory((_pAd)->CommonCfg.Ssid, (_pAd)->MlmeAux.Ssid, (_pAd)->MlmeAux.SsidLen); \
+	COPY_MAC_ADDR((_pAd)->CommonCfg.Bssid, (_pAd)->MlmeAux.Bssid);                      \
+	(_pAd)->CommonCfg.Channel = (_pAd)->MlmeAux.Channel;                                \
+	(_pAd)->CommonCfg.CentralChannel = (_pAd)->MlmeAux.CentralChannel;                  \
+	(_pAd)->StaActive.Aid = (_pAd)->MlmeAux.Aid;                                        \
+	(_pAd)->StaActive.AtimWin = (_pAd)->MlmeAux.AtimWin;                                \
+	(_pAd)->StaActive.CapabilityInfo = (_pAd)->MlmeAux.CapabilityInfo;                  \
+	(_pAd)->CommonCfg.BeaconPeriod = (_pAd)->MlmeAux.BeaconPeriod;                      \
+	(_pAd)->StaActive.CfpMaxDuration = (_pAd)->MlmeAux.CfpMaxDuration;                  \
+	(_pAd)->StaActive.CfpPeriod = (_pAd)->MlmeAux.CfpPeriod;                            \
+	(_pAd)->StaActive.SupRateLen = (_pAd)->MlmeAux.SupRateLen;                          \
+	NdisMoveMemory((_pAd)->StaActive.SupRate, (_pAd)->MlmeAux.SupRate, (_pAd)->MlmeAux.SupRateLen);\
+	(_pAd)->StaActive.ExtRateLen = (_pAd)->MlmeAux.ExtRateLen;                          \
+	NdisMoveMemory((_pAd)->StaActive.ExtRate, (_pAd)->MlmeAux.ExtRate, (_pAd)->MlmeAux.ExtRateLen);\
+	NdisMoveMemory(&(_pAd)->CommonCfg.APEdcaParm, &(_pAd)->MlmeAux.APEdcaParm, sizeof(EDCA_PARM));\
+	NdisMoveMemory(&(_pAd)->CommonCfg.APQosCapability, &(_pAd)->MlmeAux.APQosCapability, sizeof(QOS_CAPABILITY_PARM));\
+	NdisMoveMemory(&(_pAd)->CommonCfg.APQbssLoad, &(_pAd)->MlmeAux.APQbssLoad, sizeof(QBSS_LOAD_PARM));\
+	COPY_MAC_ADDR((_pAd)->MacTab.Content[BSSID_WCID].Addr, (_pAd)->MlmeAux.Bssid);      \
+	(_pAd)->MacTab.Content[BSSID_WCID].PairwiseKey.CipherAlg = (_pAd)->StaCfg.PairCipher;\
+	COPY_MAC_ADDR((_pAd)->MacTab.Content[BSSID_WCID].PairwiseKey.BssId, (_pAd)->MlmeAux.Bssid);\
+	(_pAd)->MacTab.Content[BSSID_WCID].RateLen = (_pAd)->StaActive.SupRateLen + (_pAd)->StaActive.ExtRateLen;\
+}
+
+/*
+	==========================================================================
+	Description:
+
+	IRQL = PASSIVE_LEVEL
+
+	==========================================================================
+*/
+VOID MlmeCntlInit(
+	IN PRTMP_ADAPTER pAd,
+	IN STATE_MACHINE *S,
+	OUT STATE_MACHINE_FUNC Trans[])
+{
+	/* Control state machine differs from other state machines, the interface */
+	/* follows the standard interface */
+	pAd->Mlme.CntlMachine.CurrState = CNTL_IDLE;
+}
+
+/*
+	==========================================================================
+	Description:
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+*/
+VOID MlmeCntlMachinePerformAction(
+	IN PRTMP_ADAPTER pAd,
+	IN STATE_MACHINE *S,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	switch (pAd->Mlme.CntlMachine.CurrState) {
+	case CNTL_IDLE:
+		CntlIdleProc(pAd, Elem);
+		break;
+	case CNTL_WAIT_DISASSOC:
+		CntlWaitDisassocProc(pAd, Elem);
+		break;
+	case CNTL_WAIT_JOIN:
+		CntlWaitJoinProc(pAd, Elem);
+		break;
+
+		/* CNTL_WAIT_REASSOC is the only state in CNTL machine that does */
+		/* not triggered directly or indirectly by "RTMPSetInformation(OID_xxx)". */
+		/* Therefore not protected by NDIS's "only one outstanding OID request" */
+		/* rule. Which means NDIS may SET OID in the middle of ROAMing attempts. */
+		/* Current approach is to block new SET request at RTMPSetInformation() */
+		/* when CntlMachine.CurrState is not CNTL_IDLE */
+	case CNTL_WAIT_REASSOC:
+		CntlWaitReassocProc(pAd, Elem);
+		break;
+
+	case CNTL_WAIT_START:
+		CntlWaitStartProc(pAd, Elem);
+		break;
+	case CNTL_WAIT_AUTH:
+		CntlWaitAuthProc(pAd, Elem);
+		break;
+	case CNTL_WAIT_AUTH2:
+		CntlWaitAuthProc2(pAd, Elem);
+		break;
+	case CNTL_WAIT_ASSOC:
+		CntlWaitAssocProc(pAd, Elem);
+		break;
+
+	case CNTL_WAIT_OID_LIST_SCAN:
+		if (Elem->MsgType == MT2_SCAN_CONF) {
+			USHORT	Status = MLME_SUCCESS;
+				
+			NdisMoveMemory(&Status, Elem->Msg, sizeof(USHORT));
+				
+			/* Resume TxRing after SCANING complete. We hope the out-of-service time */
+			/* won't be too long to let upper layer time-out the waiting frames */
+			RTMPResumeMsduTransmission(pAd);
+
+			pAd->Mlme.CntlMachine.CurrState = CNTL_IDLE;
+
+			/* scan completed, init to not FastScan */
+			pAd->StaCfg.bImprovedScan = FALSE;
+
+#ifdef LED_CONTROL_SUPPORT
+			/* */
+			/* Set LED status to previous status. */
+			/* */
+			if (pAd->LedCntl.bLedOnScanning) {
+				pAd->LedCntl.bLedOnScanning = FALSE;
+				RTMPSetLED(pAd, pAd->LedCntl.LedStatus);
+			}
+#endif /* LED_CONTROL_SUPPORT */
+
+#ifdef DOT11N_DRAFT3
+			/* AP sent a 2040Coexistence mgmt frame, then station perform a scan, and then send back the respone. */
+			if ((pAd->CommonCfg.BSSCoexist2040.field.InfoReq == 1)
+			    && INFRA_ON(pAd)
+			    && OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_SCAN_2040)) {
+				Update2040CoexistFrameAndNotify(pAd, BSSID_WCID,
+								TRUE);
+			}
+#endif /* DOT11N_DRAFT3 */
+#ifdef WPA_SUPPLICANT_SUPPORT
+
+                                if (pAd->IndicateMediaState != NdisMediaStateConnected && (pAd->StaCfg.WpaSupplicantUP != WPA_SUPPLICANT_ENABLE_WITH_WEB_UI) )
+                                {
+                                        BssTableSsidSort(pAd, &pAd->MlmeAux.SsidBssTab, (PCHAR)pAd->MlmeAux.Ssid, pAd->MlmeAux.SsidLen);
+                                        pAd->MlmeAux.BssIdx = 0;
+                                        IterateOnBssTab(pAd);
+                                }
+#endif // WPA_SUPPLICANT_SUPPORT //
+
+
+				if (Status == MLME_SUCCESS)
+				{
+					/* 
+						Maintain Scan Table 
+						MaxBeaconRxTimeDiff: 120 seconds
+						MaxSameBeaconRxTimeCount: 1
+					*/
+					MaintainBssTable(pAd, &pAd->ScanTab, 120, 2);
+					
+				{
+					RTMPSendWirelessEvent(pAd, IW_SCAN_COMPLETED_EVENT_FLAG, NULL, BSS0, 0);
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+					RtmpOSWrielessEventSend(pAd->net_dev, RT_WLAN_EVENT_SCAN, -1, NULL, NULL, 0);
+#endif /* WPA_SUPPLICANT_SUPPORT */
+				}
+
+			}
+		}
+		break;
+
+	case CNTL_WAIT_OID_DISASSOC:
+		if (Elem->MsgType == MT2_DISASSOC_CONF) {
+			LinkDown(pAd, FALSE);
+			pAd->Mlme.CntlMachine.CurrState = CNTL_IDLE;
+		}
+		break;
+#ifdef RTMP_MAC_USB
+		/* */
+		/* This state is for that we want to connect to an AP but */
+		/* it didn't find on BSS List table. So we need to scan the air first, */
+		/* after that we can try to connect to the desired AP if available. */
+		/* */
+	case CNTL_WAIT_SCAN_FOR_CONNECT:
+		if (Elem->MsgType == MT2_SCAN_CONF) {
+			/* Resume TxRing after SCANING complete. We hope the out-of-service time */
+			/* won't be too long to let upper layer time-out the waiting frames */
+			RTMPResumeMsduTransmission(pAd);
+#ifdef CCX_SUPPORT
+			if (pAd->StaCfg.CCXReqType != MSRN_TYPE_UNUSED) {
+				/* Cisco scan request is finished, prepare beacon report */
+				MlmeEnqueue(pAd, AIRONET_STATE_MACHINE,
+					    MT2_AIRONET_SCAN_DONE, 0, NULL, 0);
+			}
+#endif /* CCX_SUPPORT */
+			pAd->Mlme.CntlMachine.CurrState = CNTL_IDLE;
+
+			/* */
+			/* Check if we can connect to. */
+			/* */
+			BssTableSsidSort(pAd, &pAd->MlmeAux.SsidBssTab,
+					 (CHAR *) pAd->MlmeAux.
+					 AutoReconnectSsid,
+					 pAd->MlmeAux.AutoReconnectSsidLen);
+
+
+			if (pAd->MlmeAux.SsidBssTab.BssNr > 0) {
+				MlmeAutoReconnectLastSSID(pAd);
+			}
+		}
+		break;
+#endif /* RTMP_MAC_USB */
+	default:
+		DBGPRINT_ERR(("!ERROR! CNTL - Illegal message type(=%ld)",
+			      Elem->MsgType));
+		break;
+	}
+}
+
+/*
+	==========================================================================
+	Description:
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+*/
+VOID CntlIdleProc(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	MLME_DISASSOC_REQ_STRUCT DisassocReq;
+
+	if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF))
+		return;
+
+	switch (Elem->MsgType) {
+	case OID_802_11_SSID:
+		CntlOidSsidProc(pAd, Elem);
+		break;
+
+	case OID_802_11_BSSID:
+		CntlOidRTBssidProc(pAd, Elem);
+		break;
+
+	case OID_802_11_BSSID_LIST_SCAN:
+		CntlOidScanProc(pAd, Elem);
+		break;
+
+	case OID_802_11_DISASSOCIATE:
+		DisassocParmFill(pAd, &DisassocReq, pAd->CommonCfg.Bssid,
+				 REASON_DISASSOC_STA_LEAVING);
+		MlmeEnqueue(pAd, ASSOC_STATE_MACHINE, MT2_MLME_DISASSOC_REQ,
+			    sizeof (MLME_DISASSOC_REQ_STRUCT), &DisassocReq, 0);
+		pAd->Mlme.CntlMachine.CurrState = CNTL_WAIT_OID_DISASSOC;
+#ifdef WPA_SUPPLICANT_SUPPORT
+		if ((pAd->StaCfg.WpaSupplicantUP & 0x7F) !=
+		    WPA_SUPPLICANT_ENABLE_WITH_WEB_UI)
+#endif /* WPA_SUPPLICANT_SUPPORT */
+		{
+			/* Set the AutoReconnectSsid to prevent it reconnect to old SSID */
+			/* Since calling this indicate user don't want to connect to that SSID anymore. */
+			pAd->MlmeAux.AutoReconnectSsidLen = 32;
+			NdisZeroMemory(pAd->MlmeAux.AutoReconnectSsid,
+				       pAd->MlmeAux.AutoReconnectSsidLen);
+		}
+		break;
+
+	case MT2_MLME_ROAMING_REQ:
+		CntlMlmeRoamingProc(pAd, Elem);
+		break;
+
+	case OID_802_11_MIC_FAILURE_REPORT_FRAME:
+		WpaMicFailureReportFrame(pAd, Elem);
+		break;
+
+#ifdef QOS_DLS_SUPPORT
+	case RT_OID_802_11_SET_DLS_PARAM:
+		CntlOidDLSSetupProc(pAd, Elem);
+		break;
+#endif /* QOS_DLS_SUPPORT */
+
+
+	default:
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("CNTL - Illegal message in CntlIdleProc(MsgType=%ld)\n",
+			  Elem->MsgType));
+		break;
+	}
+}
+
+VOID CntlOidScanProc(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	MLME_SCAN_REQ_STRUCT ScanReq;
+	ULONG BssIdx = BSS_NOT_FOUND;
+/*	BSS_ENTRY                  CurrBss; */
+	BSS_ENTRY *pCurrBss = NULL;
+
+#ifdef RALINK_ATE
+/* Disable scanning when ATE is running. */
+	if (ATE_ON(pAd))
+		return;
+#endif /* RALINK_ATE */
+
+
+	/* allocate memory */
+	os_alloc_mem(NULL, (UCHAR **) & pCurrBss, sizeof (BSS_ENTRY));
+	if (pCurrBss == NULL) {
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+		return;
+	}
+
+	/* record current BSS if network is connected. */
+	/* 2003-2-13 do not include current IBSS if this is the only STA in this IBSS. */
+	if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED)) {
+		BssIdx =
+		    BssSsidTableSearch(&pAd->ScanTab, pAd->CommonCfg.Bssid,
+				       (PUCHAR) pAd->CommonCfg.Ssid,
+				       pAd->CommonCfg.SsidLen,
+				       pAd->CommonCfg.Channel);
+		if (BssIdx != BSS_NOT_FOUND) {
+			NdisMoveMemory(pCurrBss, &pAd->ScanTab.BssEntry[BssIdx],
+				       sizeof (BSS_ENTRY));
+		}
+	}
+
+
+	ScanParmFill(pAd, &ScanReq, (PSTRING) Elem->Msg, Elem->MsgLen, BSS_ANY,
+		     SCAN_ACTIVE);
+	MlmeEnqueue(pAd, SYNC_STATE_MACHINE, MT2_MLME_SCAN_REQ,
+		    sizeof (MLME_SCAN_REQ_STRUCT), &ScanReq, 0);
+	pAd->Mlme.CntlMachine.CurrState = CNTL_WAIT_OID_LIST_SCAN;
+
+	if (pCurrBss != NULL)
+		os_free_mem(NULL, pCurrBss);
+}
+
+/*
+	==========================================================================
+	Description:
+		Before calling this routine, user desired SSID should already been
+		recorded in CommonCfg.Ssid[]
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+*/
+VOID CntlOidSsidProc(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	PNDIS_802_11_SSID pOidSsid = (NDIS_802_11_SSID *) Elem->Msg;
+	MLME_DISASSOC_REQ_STRUCT DisassocReq;
+	ULONG Now;
+
+
+	/* Step 1. record the desired user settings to MlmeAux */
+	NdisZeroMemory(pAd->MlmeAux.Ssid, MAX_LEN_OF_SSID);
+	NdisMoveMemory(pAd->MlmeAux.Ssid, pOidSsid->Ssid, pOidSsid->SsidLength);
+	pAd->MlmeAux.SsidLen = (UCHAR) pOidSsid->SsidLength;
+	if (pAd->StaCfg.BssType == BSS_INFRA)
+		NdisZeroMemory(pAd->MlmeAux.Bssid, MAC_ADDR_LEN);
+	pAd->MlmeAux.BssType = pAd->StaCfg.BssType;
+
+	pAd->StaCfg.bAutoConnectByBssid = FALSE;
+
+	/* */
+	/* Update Reconnect Ssid, that user desired to connect. */
+	/* */
+	NdisZeroMemory(pAd->MlmeAux.AutoReconnectSsid, MAX_LEN_OF_SSID);
+	NdisMoveMemory(pAd->MlmeAux.AutoReconnectSsid, pAd->MlmeAux.Ssid,
+		       pAd->MlmeAux.SsidLen);
+	pAd->MlmeAux.AutoReconnectSsidLen = pAd->MlmeAux.SsidLen;
+
+	/* step 2. find all matching BSS in the lastest SCAN result (inBssTab) */
+	/*    & log them into MlmeAux.SsidBssTab for later-on iteration. Sort by RSSI order */
+	BssTableSsidSort(pAd, &pAd->MlmeAux.SsidBssTab,
+			 (PCHAR) pAd->MlmeAux.Ssid, pAd->MlmeAux.SsidLen);
+
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("CntlOidSsidProc():CNTL - %d BSS of %d BSS match the desire ",
+		  pAd->MlmeAux.SsidBssTab.BssNr, pAd->ScanTab.BssNr));
+	if (pAd->MlmeAux.SsidLen == MAX_LEN_OF_SSID)
+		hex_dump("\nSSID", pAd->MlmeAux.Ssid, pAd->MlmeAux.SsidLen);
+	else
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("(%d)SSID - %s\n", pAd->MlmeAux.SsidLen,
+			  pAd->MlmeAux.Ssid));
+
+	NdisGetSystemUpTime(&Now);
+
+	if (INFRA_ON(pAd) &&
+	    OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED) &&
+	    (pAd->CommonCfg.SsidLen ==
+	     pAd->MlmeAux.SsidBssTab.BssEntry[0].SsidLen)
+	    && NdisEqualMemory(pAd->CommonCfg.Ssid,
+			       pAd->MlmeAux.SsidBssTab.BssEntry[0].Ssid,
+			       pAd->CommonCfg.SsidLen)
+	    && MAC_ADDR_EQUAL(pAd->CommonCfg.Bssid,
+			      pAd->MlmeAux.SsidBssTab.BssEntry[0].Bssid)) {
+		/* Case 1. already connected with an AP who has the desired SSID */
+		/*         with highest RSSI */
+
+		/* Add checking Mode "LEAP" for CCX 1.0 */
+		if (((pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA) ||
+		     (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPAPSK) ||
+		     (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2) ||
+		     (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2PSK)
+		    ) &&
+		    (pAd->StaCfg.PortSecured == WPA_802_1X_PORT_NOT_SECURED)) {
+			/* case 1.1 For WPA, WPA-PSK, if the 1x port is not secured, we have to redo */
+			/*          connection process */
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("CntlOidSsidProc():CNTL - disassociate with current AP...\n"));
+			DisassocParmFill(pAd, &DisassocReq,
+					 pAd->CommonCfg.Bssid,
+					 REASON_DISASSOC_STA_LEAVING);
+			MlmeEnqueue(pAd, ASSOC_STATE_MACHINE,
+				    MT2_MLME_DISASSOC_REQ,
+				    sizeof (MLME_DISASSOC_REQ_STRUCT),
+				    &DisassocReq, 0);
+			pAd->Mlme.CntlMachine.CurrState = CNTL_WAIT_DISASSOC;
+		} else if (pAd->bConfigChanged == TRUE) {
+			/* case 1.2 Important Config has changed, we have to reconnect to the same AP */
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("CntlOidSsidProc():CNTL - disassociate with current AP Because config changed...\n"));
+			DisassocParmFill(pAd, &DisassocReq,
+					 pAd->CommonCfg.Bssid,
+					 REASON_DISASSOC_STA_LEAVING);
+			MlmeEnqueue(pAd, ASSOC_STATE_MACHINE,
+				    MT2_MLME_DISASSOC_REQ,
+				    sizeof (MLME_DISASSOC_REQ_STRUCT),
+				    &DisassocReq, 0);
+			pAd->Mlme.CntlMachine.CurrState = CNTL_WAIT_DISASSOC;
+		} else {
+			/* case 1.3. already connected to the SSID with highest RSSI. */
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("CntlOidSsidProc():CNTL - already with this BSSID. ignore this SET_SSID request\n"));
+			/* */
+			/* (HCT 12.1) 1c_wlan_mediaevents required */
+			/* media connect events are indicated when associating with the same AP */
+			/* */
+			if (INFRA_ON(pAd)) {
+				/* */
+				/* Since MediaState already is NdisMediaStateConnected */
+				/* We just indicate the connect event again to meet the WHQL required. */
+				/* */
+				RTMP_IndicateMediaState(pAd,
+							NdisMediaStateConnected);
+				pAd->ExtraInfo = GENERAL_LINK_UP;	/* Update extra information to link is up */
+			}
+
+			pAd->Mlme.CntlMachine.CurrState = CNTL_IDLE;
+#ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
+			RtmpOSWrielessEventSend(pAd->net_dev,
+						RT_WLAN_EVENT_CGIWAP, -1,
+						&pAd->MlmeAux.Bssid[0], NULL,
+						0);
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+		}
+	} else if (INFRA_ON(pAd)) {
+		/* */
+		/* For RT61 */
+		/* [88888] OID_802_11_SSID should have returned NDTEST_WEP_AP2(Returned: ) */
+		/* RT61 may lost SSID, and not connect to NDTEST_WEP_AP2 and will connect to NDTEST_WEP_AP2 by Autoreconnect */
+		/* But media status is connected, so the SSID not report correctly. */
+		/* */
+		if (!SSID_EQUAL
+		    (pAd->CommonCfg.Ssid, pAd->CommonCfg.SsidLen,
+		     pAd->MlmeAux.Ssid, pAd->MlmeAux.SsidLen)) {
+			/* */
+			/* Different SSID means not Roaming case, so we let LinkDown() to Indicate a disconnect event. */
+			/* */
+			pAd->MlmeAux.CurrReqIsFromNdis = TRUE;
+		}
+		/* case 2. active INFRA association existent */
+		/*    roaming is done within miniport driver, nothing to do with configuration */
+		/*    utility. so upon a new SET(OID_802_11_SSID) is received, we just */
+		/*    disassociate with the current associated AP, */
+		/*    then perform a new association with this new SSID, no matter the */
+		/*    new/old SSID are the same or not. */
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("CntlOidSsidProc():CNTL - disassociate with current AP...\n"));
+		DisassocParmFill(pAd, &DisassocReq, pAd->CommonCfg.Bssid,
+				 REASON_DISASSOC_STA_LEAVING);
+		MlmeEnqueue(pAd, ASSOC_STATE_MACHINE, MT2_MLME_DISASSOC_REQ,
+			    sizeof (MLME_DISASSOC_REQ_STRUCT), &DisassocReq, 0);
+		pAd->Mlme.CntlMachine.CurrState = CNTL_WAIT_DISASSOC;
+	} else {
+		if (ADHOC_ON(pAd)) {
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("CntlOidSsidProc():CNTL - drop current ADHOC\n"));
+			LinkDown(pAd, FALSE);
+			OPSTATUS_CLEAR_FLAG(pAd,
+					    fOP_STATUS_MEDIA_STATE_CONNECTED);
+			RTMP_IndicateMediaState(pAd,
+						NdisMediaStateDisconnected);
+			pAd->ExtraInfo = GENERAL_LINK_DOWN;
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("CntlOidSsidProc():NDIS_STATUS_MEDIA_DISCONNECT Event C!\n"));
+		}
+
+		if ((pAd->MlmeAux.SsidBssTab.BssNr == 0) &&
+		    (pAd->StaCfg.bAutoReconnect == TRUE) &&
+		    ((pAd->MlmeAux.BssType == BSS_INFRA)
+		     || ((pAd->MlmeAux.BssType == BSS_ADHOC)
+			 && !pAd->StaCfg.bNotFirstScan))
+		    &&
+		    (MlmeValidateSSID(pAd->MlmeAux.Ssid, pAd->MlmeAux.SsidLen)
+		     == TRUE)
+		    ) {
+			MLME_SCAN_REQ_STRUCT ScanReq;
+			
+			if (pAd->MlmeAux.BssType == BSS_ADHOC)
+				pAd->StaCfg.bNotFirstScan = TRUE;
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("CntlOidSsidProc():CNTL - No matching BSS, start a new scan\n"));
+			ScanParmFill(pAd, &ScanReq, (PSTRING) pAd->MlmeAux.Ssid,
+				     pAd->MlmeAux.SsidLen, BSS_ANY,
+				     SCAN_ACTIVE);
+			MlmeEnqueue(pAd, SYNC_STATE_MACHINE, MT2_MLME_SCAN_REQ,
+				    sizeof (MLME_SCAN_REQ_STRUCT), &ScanReq, 0);
+			pAd->Mlme.CntlMachine.CurrState =
+			    CNTL_WAIT_OID_LIST_SCAN;
+			/* Reset Missed scan number */
+			pAd->StaCfg.LastScanTime = Now;
+			pAd->StaCfg.bNotFirstScan = TRUE;
+		} else {
+
+			if ((pAd->MlmeAux.SsidBssTab.
+			     BssEntry[pAd->MlmeAux.BssIdx].Channel == 14)
+			    && ((pAd->CommonCfg.CountryRegion & 0x7f) ==
+				REGION_33_BG_BAND)
+			    && (pAd->CommonCfg.SavedPhyMode == 0xFF)) {
+				pAd->CommonCfg.SavedPhyMode =
+				    pAd->CommonCfg.PhyMode;
+				RTMPSetPhyMode(pAd, PHY_11B);
+			} else
+			    if ((pAd->MlmeAux.SsidBssTab.
+				 BssEntry[pAd->MlmeAux.BssIdx].Channel != 14)
+				&& (pAd->MlmeAux.SsidBssTab.
+				    BssEntry[pAd->MlmeAux.BssIdx].Channel != 0)
+				&& ((pAd->CommonCfg.CountryRegion & 0x7f) ==
+				    REGION_33_BG_BAND)
+				&& (pAd->CommonCfg.SavedPhyMode != 0xFF)) {
+				RTMPSetPhyMode(pAd,
+					       pAd->CommonCfg.SavedPhyMode);
+				pAd->CommonCfg.SavedPhyMode = 0xFF;
+			}
+
+			pAd->MlmeAux.BssIdx = 0;
+			IterateOnBssTab(pAd);
+		}
+	}
+}
+
+
+/*
+	==========================================================================
+	Description:
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+*/
+VOID CntlOidRTBssidProc(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	ULONG BssIdx;
+	PUCHAR pOidBssid = (PUCHAR) Elem->Msg;
+	MLME_DISASSOC_REQ_STRUCT DisassocReq;
+	MLME_JOIN_REQ_STRUCT JoinReq;
+	PBSS_ENTRY pInBss = NULL;
+
+#ifdef RALINK_ATE
+/* No need to perform this routine when ATE is running. */
+	if (ATE_ON(pAd))
+		return;
+#endif /* RALINK_ATE */
+
+	/* record user desired settings */
+	COPY_MAC_ADDR(pAd->MlmeAux.Bssid, pOidBssid);
+	pAd->MlmeAux.BssType = pAd->StaCfg.BssType;
+
+	/* find the desired BSS in the latest SCAN result table */
+	BssIdx = BssTableSearch(&pAd->ScanTab, pOidBssid, pAd->MlmeAux.Channel);
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+	if (pAd->StaCfg.WpaSupplicantUP & WPA_SUPPLICANT_ENABLE_WPS) ;
+	else
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+	{
+		pInBss = &pAd->ScanTab.BssEntry[BssIdx];
+
+		if (SSID_EQUAL
+		    (pAd->MlmeAux.Ssid, pAd->MlmeAux.SsidLen, pInBss->Ssid,
+		     pInBss->SsidLen) == FALSE)
+			BssIdx = BSS_NOT_FOUND;
+
+		if (pAd->StaCfg.AuthMode <= Ndis802_11AuthModeAutoSwitch) {
+			if (pAd->StaCfg.WepStatus != pInBss->WepStatus)
+				BssIdx = BSS_NOT_FOUND;
+		} else {
+			/* Check AuthMode and AuthModeAux for matching, in case AP support dual-mode */
+			if ((pAd->StaCfg.AuthMode != pInBss->AuthMode) &&
+			    (pAd->StaCfg.AuthMode != pInBss->AuthModeAux))
+				BssIdx = BSS_NOT_FOUND;
+		}
+	}
+
+
+	if (BssIdx == BSS_NOT_FOUND) {
+		if ((pAd->StaCfg.BssType == BSS_INFRA) ||
+		    (pAd->StaCfg.bNotFirstScan == FALSE)) {
+			MLME_SCAN_REQ_STRUCT ScanReq;
+
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("CNTL - BSSID not found. reply NDIS_STATUS_NOT_ACCEPTED\n"));
+			if (pAd->StaCfg.BssType == BSS_ADHOC)
+				pAd->StaCfg.bNotFirstScan = TRUE;
+
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("CNTL - BSSID not found. start a new scan\n"));
+			ScanParmFill(pAd, &ScanReq, (PSTRING) pAd->MlmeAux.Ssid,
+				     pAd->MlmeAux.SsidLen, BSS_ANY,
+				     SCAN_ACTIVE);
+			MlmeEnqueue(pAd, SYNC_STATE_MACHINE, MT2_MLME_SCAN_REQ,
+				    sizeof (MLME_SCAN_REQ_STRUCT), &ScanReq, 0);
+			pAd->Mlme.CntlMachine.CurrState =
+			    CNTL_WAIT_OID_LIST_SCAN;
+			/* Reset Missed scan number */
+			NdisGetSystemUpTime(&pAd->StaCfg.LastScanTime);
+		} else {
+			MLME_START_REQ_STRUCT StartReq;
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("CNTL - BSSID not found. start a new ADHOC (Ssid=%s)...\n",
+				  pAd->MlmeAux.Ssid));
+			StartParmFill(pAd, &StartReq, (PCHAR) pAd->MlmeAux.Ssid,
+				      pAd->MlmeAux.SsidLen);
+			MlmeEnqueue(pAd, SYNC_STATE_MACHINE, MT2_MLME_START_REQ,
+				    sizeof (MLME_START_REQ_STRUCT), &StartReq,
+				    0);
+
+			pAd->Mlme.CntlMachine.CurrState = CNTL_WAIT_START;
+		}
+		return;
+	}
+
+	pInBss = &pAd->ScanTab.BssEntry[BssIdx];
+	/* */
+	/* Update Reconnect Ssid, that user desired to connect. */
+	/* */
+	NdisZeroMemory(pAd->MlmeAux.AutoReconnectSsid, MAX_LEN_OF_SSID);
+	pAd->MlmeAux.AutoReconnectSsidLen = pInBss->SsidLen;
+	NdisMoveMemory(pAd->MlmeAux.AutoReconnectSsid, pInBss->Ssid,
+		       pInBss->SsidLen);
+
+
+	/* copy the matched BSS entry from ScanTab to MlmeAux.SsidBssTab. Why? */
+	/* Because we need this entry to become the JOIN target in later on SYNC state machine */
+	pAd->MlmeAux.BssIdx = 0;
+	pAd->MlmeAux.SsidBssTab.BssNr = 1;
+	NdisMoveMemory(&pAd->MlmeAux.SsidBssTab.BssEntry[0], pInBss,
+		       sizeof (BSS_ENTRY));
+
+	{
+		if (INFRA_ON(pAd)) {
+			/* disassoc from current AP first */
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("CNTL - disassociate with current AP ...\n"));
+			DisassocParmFill(pAd, &DisassocReq,
+					 pAd->CommonCfg.Bssid,
+					 REASON_DISASSOC_STA_LEAVING);
+			MlmeEnqueue(pAd, ASSOC_STATE_MACHINE,
+				    MT2_MLME_DISASSOC_REQ,
+				    sizeof (MLME_DISASSOC_REQ_STRUCT),
+				    &DisassocReq, 0);
+
+			pAd->Mlme.CntlMachine.CurrState = CNTL_WAIT_DISASSOC;
+		} else {
+			if (ADHOC_ON(pAd)) {
+				DBGPRINT(RT_DEBUG_TRACE,
+					 ("CNTL - drop current ADHOC\n"));
+				LinkDown(pAd, FALSE);
+				OPSTATUS_CLEAR_FLAG(pAd,
+						    fOP_STATUS_MEDIA_STATE_CONNECTED);
+				RTMP_IndicateMediaState(pAd,
+							NdisMediaStateDisconnected);
+				pAd->ExtraInfo = GENERAL_LINK_DOWN;
+				DBGPRINT(RT_DEBUG_TRACE,
+					 ("NDIS_STATUS_MEDIA_DISCONNECT Event C!\n"));
+			}
+
+			pInBss = &pAd->MlmeAux.SsidBssTab.BssEntry[0];
+
+			pAd->StaCfg.PairCipher = pAd->StaCfg.WepStatus;
+#ifdef WPA_SUPPLICANT_SUPPORT
+			if (pAd->StaCfg.WpaSupplicantUP == WPA_SUPPLICANT_DISABLE)
+#endif /* WPA_SUPPLICANT_SUPPORT */
+			pAd->StaCfg.GroupCipher = pAd->StaCfg.WepStatus;
+
+			/* Check cipher suite, AP must have more secured cipher than station setting */
+			/* Set the Pairwise and Group cipher to match the intended AP setting */
+			/* We can only connect to AP with less secured cipher setting */
+			if ((pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA)
+			    || (pAd->StaCfg.AuthMode ==
+				Ndis802_11AuthModeWPAPSK)) {
+				pAd->StaCfg.GroupCipher =
+				    pInBss->WPA.GroupCipher;
+
+				if (pAd->StaCfg.WepStatus ==
+				    pInBss->WPA.PairCipher)
+					pAd->StaCfg.PairCipher =
+					    pInBss->WPA.PairCipher;
+				else if (pInBss->WPA.PairCipherAux !=
+					 Ndis802_11WEPDisabled)
+					pAd->StaCfg.PairCipher =
+					    pInBss->WPA.PairCipherAux;
+				else	/* There is no PairCipher Aux, downgrade our capability to TKIP */
+					pAd->StaCfg.PairCipher =
+					    Ndis802_11Encryption2Enabled;
+			} else
+			    if ((pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2)
+				|| (pAd->StaCfg.AuthMode ==
+				    Ndis802_11AuthModeWPA2PSK)) {
+				pAd->StaCfg.GroupCipher =
+				    pInBss->WPA2.GroupCipher;
+
+				if (pAd->StaCfg.WepStatus ==
+				    pInBss->WPA2.PairCipher)
+					pAd->StaCfg.PairCipher =
+					    pInBss->WPA2.PairCipher;
+				else if (pInBss->WPA2.PairCipherAux !=
+					 Ndis802_11WEPDisabled)
+					pAd->StaCfg.PairCipher =
+					    pInBss->WPA2.PairCipherAux;
+				else	/* There is no PairCipher Aux, downgrade our capability to TKIP */
+					pAd->StaCfg.PairCipher =
+					    Ndis802_11Encryption2Enabled;
+
+				/* RSN capability */
+				pAd->StaCfg.RsnCapability = pInBss->WPA2.RsnCapability;
+			}
+
+			/* Set Mix cipher flag */
+			pAd->StaCfg.bMixCipher =
+			    (pAd->StaCfg.PairCipher ==
+			     pAd->StaCfg.GroupCipher) ? FALSE : TRUE;
+
+			/* No active association, join the BSS immediately */
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("CNTL - joining %02x:%02x:%02x:%02x:%02x:%02x ...\n",
+				  pOidBssid[0], pOidBssid[1], pOidBssid[2],
+				  pOidBssid[3], pOidBssid[4], pOidBssid[5]));
+
+			JoinParmFill(pAd, &JoinReq, pAd->MlmeAux.BssIdx);
+			MlmeEnqueue(pAd, SYNC_STATE_MACHINE, MT2_MLME_JOIN_REQ,
+				    sizeof (MLME_JOIN_REQ_STRUCT), &JoinReq, 0);
+
+			pAd->Mlme.CntlMachine.CurrState = CNTL_WAIT_JOIN;
+		}
+	}
+}
+
+/* Roaming is the only external request triggering CNTL state machine */
+/* despite of other "SET OID" operation. All "SET OID" related oerations */
+/* happen in sequence, because no other SET OID will be sent to this device */
+/* until the the previous SET operation is complete (successful o failed). */
+/* So, how do we quarantee this ROAMING request won't corrupt other "SET OID"? */
+/* or been corrupted by other "SET OID"? */
+/* */
+/* IRQL = DISPATCH_LEVEL */
+VOID CntlMlmeRoamingProc(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	UCHAR BBPValue = 0;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("CNTL - Roaming in MlmeAux.RoamTab...\n"));
+
+	{
+		/*Let BBP register at 20MHz to do (fast) roaming. */
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
+		BBPValue &= (~0x18);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
+
+		NdisMoveMemory(&pAd->MlmeAux.SsidBssTab, &pAd->MlmeAux.RoamTab,
+			       sizeof (pAd->MlmeAux.RoamTab));
+		pAd->MlmeAux.SsidBssTab.BssNr = pAd->MlmeAux.RoamTab.BssNr;
+
+		BssTableSortByRssi(&pAd->MlmeAux.SsidBssTab);
+		pAd->MlmeAux.BssIdx = 0;
+		IterateOnBssTab(pAd);
+	}
+}
+
+#ifdef QOS_DLS_SUPPORT
+/*
+	==========================================================================
+	Description:
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+*/
+VOID CntlOidDLSSetupProc(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	PRT_802_11_DLS pDLS = (PRT_802_11_DLS) Elem->Msg;
+	MLME_DLS_REQ_STRUCT MlmeDlsReq;
+	INT i;
+	USHORT reason = REASON_UNSPECIFY;
+
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("CNTL - (OID set %02x:%02x:%02x:%02x:%02x:%02x with Valid=%d, Status=%d, TimeOut=%d, CountDownTimer=%d)\n",
+		  pDLS->MacAddr[0], pDLS->MacAddr[1], pDLS->MacAddr[2],
+		  pDLS->MacAddr[3], pDLS->MacAddr[4], pDLS->MacAddr[5],
+		  pDLS->Valid, pDLS->Status, pDLS->TimeOut,
+		  pDLS->CountDownTimer));
+
+	if (!pAd->CommonCfg.bDLSCapable)
+		return;
+
+	/* DLS will not be supported when Adhoc mode */
+	if (INFRA_ON(pAd)) {
+		for (i = 0; i < MAX_NUM_OF_DLS_ENTRY; i++) {
+			if (pDLS->Valid && pAd->StaCfg.DLSEntry[i].Valid
+			    && (pAd->StaCfg.DLSEntry[i].Status == DLS_FINISH)
+			    && (pDLS->TimeOut ==
+				pAd->StaCfg.DLSEntry[i].TimeOut)
+			    && MAC_ADDR_EQUAL(pDLS->MacAddr,
+					      pAd->StaCfg.DLSEntry[i].
+					      MacAddr)) {
+				/* 1. Same setting, just drop it */
+				DBGPRINT(RT_DEBUG_TRACE,
+					 ("CNTL - setting unchanged\n"));
+				break;
+			} else if (!pDLS->Valid && pAd->StaCfg.DLSEntry[i].Valid
+				   && (pAd->StaCfg.DLSEntry[i].Status ==
+				       DLS_FINISH)
+				   && MAC_ADDR_EQUAL(pDLS->MacAddr,
+						     pAd->StaCfg.DLSEntry[i].
+						     MacAddr)) {
+				/* 2. Disable DLS link case, just tear down DLS link */
+				reason = REASON_QOS_UNWANTED_MECHANISM;
+				pAd->StaCfg.DLSEntry[i].Valid = FALSE;
+				pAd->StaCfg.DLSEntry[i].Status = DLS_NONE;
+				DlsParmFill(pAd, &MlmeDlsReq,
+					    &pAd->StaCfg.DLSEntry[i], reason);
+				MlmeEnqueue(pAd, DLS_STATE_MACHINE,
+					    MT2_MLME_DLS_TEAR_DOWN,
+					    sizeof (MLME_DLS_REQ_STRUCT),
+					    &MlmeDlsReq, 0);
+				DBGPRINT(RT_DEBUG_TRACE,
+					 ("CNTL - start tear down procedure\n"));
+				break;
+			} else if ((i < MAX_NUM_OF_DLS_ENTRY) && pDLS->Valid
+				   && !pAd->StaCfg.DLSEntry[i].Valid) {
+				/* 3. Enable case, start DLS setup procedure */
+				NdisMoveMemory(&pAd->StaCfg.DLSEntry[i], pDLS,
+					       sizeof (RT_802_11_DLS_UI));
+
+				/*Update countdown timer */
+				pAd->StaCfg.DLSEntry[i].CountDownTimer =
+				    pAd->StaCfg.DLSEntry[i].TimeOut;
+				DlsParmFill(pAd, &MlmeDlsReq,
+					    &pAd->StaCfg.DLSEntry[i], reason);
+				MlmeEnqueue(pAd, DLS_STATE_MACHINE,
+					    MT2_MLME_DLS_REQ,
+					    sizeof (MLME_DLS_REQ_STRUCT),
+					    &MlmeDlsReq, 0);
+				DBGPRINT(RT_DEBUG_TRACE,
+					 ("CNTL - DLS setup case\n"));
+				break;
+			} else if ((i < MAX_NUM_OF_DLS_ENTRY) && pDLS->Valid
+				   && pAd->StaCfg.DLSEntry[i].Valid
+				   && (pAd->StaCfg.DLSEntry[i].Status ==
+				       DLS_FINISH)
+				   && !MAC_ADDR_EQUAL(pDLS->MacAddr,
+						      pAd->StaCfg.DLSEntry[i].
+						      MacAddr)) {
+				/* 4. update mac case, tear down old DLS and setup new DLS */
+				reason = REASON_QOS_UNWANTED_MECHANISM;
+				pAd->StaCfg.DLSEntry[i].Valid = FALSE;
+				pAd->StaCfg.DLSEntry[i].Status = DLS_NONE;
+				DlsParmFill(pAd, &MlmeDlsReq,
+					    &pAd->StaCfg.DLSEntry[i], reason);
+				MlmeEnqueue(pAd, DLS_STATE_MACHINE,
+					    MT2_MLME_DLS_TEAR_DOWN,
+					    sizeof (MLME_DLS_REQ_STRUCT),
+					    &MlmeDlsReq, 0);
+				NdisMoveMemory(&pAd->StaCfg.DLSEntry[i], pDLS,
+					       sizeof (RT_802_11_DLS_UI));
+				DlsParmFill(pAd, &MlmeDlsReq,
+					    &pAd->StaCfg.DLSEntry[i], reason);
+				MlmeEnqueue(pAd, DLS_STATE_MACHINE,
+					    MT2_MLME_DLS_REQ,
+					    sizeof (MLME_DLS_REQ_STRUCT),
+					    &MlmeDlsReq, 0);
+				DBGPRINT(RT_DEBUG_TRACE,
+					 ("CNTL - DLS tear down and restart case\n"));
+				break;
+			} else if (pDLS->Valid && pAd->StaCfg.DLSEntry[i].Valid
+				   && MAC_ADDR_EQUAL(pDLS->MacAddr,
+						     pAd->StaCfg.DLSEntry[i].
+						     MacAddr)
+				   && (pAd->StaCfg.DLSEntry[i].TimeOut !=
+				       pDLS->TimeOut)) {
+				/* 5. update timeout case, start DLS setup procedure (no tear down) */
+				pAd->StaCfg.DLSEntry[i].TimeOut = pDLS->TimeOut;
+				/*Update countdown timer */
+				pAd->StaCfg.DLSEntry[i].CountDownTimer =
+				    pAd->StaCfg.DLSEntry[i].TimeOut;
+				DlsParmFill(pAd, &MlmeDlsReq,
+					    &pAd->StaCfg.DLSEntry[i], reason);
+				MlmeEnqueue(pAd, DLS_STATE_MACHINE,
+					    MT2_MLME_DLS_REQ,
+					    sizeof (MLME_DLS_REQ_STRUCT),
+					    &MlmeDlsReq, 0);
+				DBGPRINT(RT_DEBUG_TRACE,
+					 ("CNTL - DLS update timeout case\n"));
+				break;
+			} else if (pDLS->Valid && pAd->StaCfg.DLSEntry[i].Valid
+				   && (pAd->StaCfg.DLSEntry[i].Status !=
+				       DLS_FINISH)
+				   && MAC_ADDR_EQUAL(pDLS->MacAddr,
+						     pAd->StaCfg.DLSEntry[i].
+						     MacAddr)) {
+				/* 6. re-setup case, start DLS setup procedure (no tear down) */
+				DlsParmFill(pAd, &MlmeDlsReq,
+					    &pAd->StaCfg.DLSEntry[i], reason);
+				MlmeEnqueue(pAd, DLS_STATE_MACHINE,
+					    MT2_MLME_DLS_REQ,
+					    sizeof (MLME_DLS_REQ_STRUCT),
+					    &MlmeDlsReq, 0);
+				DBGPRINT(RT_DEBUG_TRACE,
+					 ("CNTL - DLS retry setup procedure\n"));
+				break;
+			} else {
+				DBGPRINT(RT_DEBUG_WARN,
+					 ("CNTL - DLS not changed in entry - %d - Valid=%d, Status=%d, TimeOut=%d\n",
+					  i, pAd->StaCfg.DLSEntry[i].Valid,
+					  pAd->StaCfg.DLSEntry[i].Status,
+					  pAd->StaCfg.DLSEntry[i].TimeOut));
+			}
+		}
+	}
+}
+#endif /* QOS_DLS_SUPPORT */
+
+/*
+	==========================================================================
+	Description:
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+*/
+VOID CntlWaitDisassocProc(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	MLME_START_REQ_STRUCT StartReq;
+
+	if (Elem->MsgType == MT2_DISASSOC_CONF) {
+		DBGPRINT(RT_DEBUG_TRACE, ("CNTL - Dis-associate successful\n"));
+
+		RTMPSendWirelessEvent(pAd, IW_DISASSOC_EVENT_FLAG, NULL, BSS0,
+				      0);
+
+		LinkDown(pAd, FALSE);
+
+		/* case 1. no matching BSS, and user wants ADHOC, so we just start a new one */
+		if ((pAd->MlmeAux.SsidBssTab.BssNr == 0)
+		    && (pAd->StaCfg.BssType == BSS_ADHOC)) {
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("CNTL - No matching BSS, start a new ADHOC (Ssid=%s)...\n",
+				  pAd->MlmeAux.Ssid));
+			StartParmFill(pAd, &StartReq, (PCHAR) pAd->MlmeAux.Ssid,
+				      pAd->MlmeAux.SsidLen);
+			MlmeEnqueue(pAd, SYNC_STATE_MACHINE, MT2_MLME_START_REQ,
+				    sizeof (MLME_START_REQ_STRUCT), &StartReq,
+				    0);
+			pAd->Mlme.CntlMachine.CurrState = CNTL_WAIT_START;
+		}
+		/* case 2. try each matched BSS */
+		else {
+			/*
+			   Some customer would set AP1 & AP2 same SSID, AuthMode & EncrypType but different WPAPSK,
+			   therefore we need to try next AP here.
+			 */
+			/*pAd->MlmeAux.BssIdx = 0;*/
+			pAd->MlmeAux.BssIdx++;
+
+				IterateOnBssTab(pAd);
+		}
+	}
+}
+
+/*
+	==========================================================================
+	Description:
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+*/
+VOID CntlWaitJoinProc(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	USHORT Reason;
+	MLME_AUTH_REQ_STRUCT AuthReq;
+
+	if (Elem->MsgType == MT2_JOIN_CONF) {
+		NdisMoveMemory(&Reason, Elem->Msg, sizeof (USHORT));
+		if (Reason == MLME_SUCCESS) {
+			/* 1. joined an IBSS, we are pretty much done here */
+			if (pAd->MlmeAux.BssType == BSS_ADHOC) {
+				/* */
+				/* 5G bands rules of Japan: */
+				/* Ad hoc must be disabled in W53(ch52,56,60,64) channels. */
+				/* */
+				if ((pAd->CommonCfg.bIEEE80211H == 1) &&
+				    RadarChannelCheck(pAd,
+						      pAd->CommonCfg.Channel)
+				    ) {
+					pAd->Mlme.CntlMachine.CurrState =
+					    CNTL_IDLE;
+					DBGPRINT(RT_DEBUG_TRACE,
+						 ("CNTL - Channel=%d, Join adhoc on W53(52,56,60,64) Channels are not accepted\n",
+						  pAd->CommonCfg.Channel));
+					return;
+				}
+
+				LinkUp(pAd, BSS_ADHOC);
+				pAd->Mlme.CntlMachine.CurrState = CNTL_IDLE;
+				DBGPRINT(RT_DEBUG_TRACE,
+					 ("CNTL - join the IBSS = %02x:%02x:%02x:%02x:%02x:%02x ...\n",
+					  pAd->CommonCfg.Bssid[0],
+					  pAd->CommonCfg.Bssid[1],
+					  pAd->CommonCfg.Bssid[2],
+					  pAd->CommonCfg.Bssid[3],
+					  pAd->CommonCfg.Bssid[4],
+					  pAd->CommonCfg.Bssid[5]));
+
+				RTMP_IndicateMediaState(pAd,
+							NdisMediaStateConnected);
+				pAd->ExtraInfo = GENERAL_LINK_UP;
+
+				RTMPSendWirelessEvent(pAd, IW_JOIN_IBSS_FLAG,
+						      NULL, BSS0, 0);
+			}
+			/* 2. joined a new INFRA network, start from authentication */
+			else {
+				{
+					/* either Ndis802_11AuthModeShared or Ndis802_11AuthModeAutoSwitch, try shared key first */
+					if ((pAd->StaCfg.AuthMode ==
+					     Ndis802_11AuthModeShared)
+					    || (pAd->StaCfg.AuthMode ==
+						Ndis802_11AuthModeAutoSwitch)) {
+						AuthParmFill(pAd, &AuthReq,
+							     pAd->MlmeAux.Bssid,
+							     AUTH_MODE_KEY);
+					} else {
+						AuthParmFill(pAd, &AuthReq,
+							     pAd->MlmeAux.Bssid,
+							     AUTH_MODE_OPEN);
+					}
+					MlmeEnqueue(pAd, AUTH_STATE_MACHINE,
+						    MT2_MLME_AUTH_REQ,
+						    sizeof
+						    (MLME_AUTH_REQ_STRUCT),
+						    &AuthReq, 0);
+				}
+
+				pAd->Mlme.CntlMachine.CurrState =
+				    CNTL_WAIT_AUTH;
+			}
+		} else {
+			/* 3. failed, try next BSS */
+			pAd->MlmeAux.BssIdx++;
+			IterateOnBssTab(pAd);
+		}
+	}
+}
+
+/*
+	==========================================================================
+	Description:
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+*/
+VOID CntlWaitStartProc(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	USHORT Result;
+
+	if (Elem->MsgType == MT2_START_CONF) {
+		NdisMoveMemory(&Result, Elem->Msg, sizeof (USHORT));
+		if (Result == MLME_SUCCESS) {
+			/* */
+			/* 5G bands rules of Japan: */
+			/* Ad hoc must be disabled in W53(ch52,56,60,64) channels. */
+			/* */
+			if ((pAd->CommonCfg.bIEEE80211H == 1) &&
+			    RadarChannelCheck(pAd, pAd->CommonCfg.Channel)
+			    ) {
+				pAd->Mlme.CntlMachine.CurrState = CNTL_IDLE;
+				DBGPRINT(RT_DEBUG_TRACE,
+					 ("CNTL - Channel=%d, Start adhoc on W53(52,56,60,64) Channels are not accepted\n",
+					  pAd->CommonCfg.Channel));
+				return;
+			}
+#ifdef DOT11_N_SUPPORT
+			NdisZeroMemory(&pAd->StaActive.SupportedPhyInfo.
+				       MCSSet[0], 16);
+			if ((pAd->CommonCfg.PhyMode >= PHY_11ABGN_MIXED)
+			    && (pAd->StaCfg.bAdhocN == TRUE)
+			    && (!pAd->CommonCfg.HT_DisallowTKIP
+				|| !IS_INVALID_HT_SECURITY(pAd->StaCfg.
+							   WepStatus))) {
+				N_ChannelCheck(pAd);
+				SetCommonHT(pAd);
+				if ((pAd->CommonCfg.HtCapability.HtCapInfo.
+				     ChannelWidth == BW_40)
+				    && (pAd->CommonCfg.AddHTInfo.AddHtInfo.
+					ExtChanOffset == EXTCHA_ABOVE)) {
+					pAd->MlmeAux.CentralChannel =
+					    pAd->CommonCfg.Channel + 2;
+				} else
+				    if ((pAd->CommonCfg.HtCapability.HtCapInfo.
+					 ChannelWidth == BW_40)
+					&& (pAd->CommonCfg.AddHTInfo.AddHtInfo.
+					    ExtChanOffset == EXTCHA_BELOW)) {
+					pAd->MlmeAux.CentralChannel =
+					    pAd->CommonCfg.Channel - 2;
+				}
+				NdisMoveMemory(&pAd->MlmeAux.AddHtInfo,
+					       &pAd->CommonCfg.AddHTInfo,
+					       sizeof (ADD_HT_INFO_IE));
+				RTMPCheckHt(pAd, BSSID_WCID,
+					    &pAd->CommonCfg.HtCapability,
+					    &pAd->CommonCfg.AddHTInfo);
+				pAd->StaActive.SupportedPhyInfo.bHtEnable =
+				    TRUE;
+				NdisMoveMemory(&pAd->StaActive.SupportedPhyInfo.
+					       MCSSet[0],
+					       &pAd->CommonCfg.HtCapability.
+					       MCSSet[0], 16);
+				COPY_HTSETTINGS_FROM_MLME_AUX_TO_ACTIVE_CFG
+				    (pAd);
+			} else
+#endif /* DOT11_N_SUPPORT */
+			{
+				pAd->StaActive.SupportedPhyInfo.bHtEnable =
+				    FALSE;
+			}
+			pAd->StaCfg.bAdhocCreator = TRUE;
+			LinkUp(pAd, BSS_ADHOC);
+			pAd->Mlme.CntlMachine.CurrState = CNTL_IDLE;
+			/* Before send beacon, driver need do radar detection */
+			if ((pAd->CommonCfg.Channel > 14)
+			    && (pAd->CommonCfg.bIEEE80211H == 1)
+			    && RadarChannelCheck(pAd, pAd->CommonCfg.Channel)) {
+				pAd->CommonCfg.RadarDetect.RDMode =
+				    RD_SILENCE_MODE;
+				pAd->CommonCfg.RadarDetect.RDCount = 0;
+			}
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("CNTL - start a new IBSS = %02x:%02x:%02x:%02x:%02x:%02x ...\n",
+				  pAd->CommonCfg.Bssid[0],
+				  pAd->CommonCfg.Bssid[1],
+				  pAd->CommonCfg.Bssid[2],
+				  pAd->CommonCfg.Bssid[3],
+				  pAd->CommonCfg.Bssid[4],
+				  pAd->CommonCfg.Bssid[5]));
+
+			RTMPSendWirelessEvent(pAd, IW_START_IBSS_FLAG, NULL,
+					      BSS0, 0);
+		} else {
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("CNTL - Start IBSS fail. BUG!!!!!\n"));
+			pAd->Mlme.CntlMachine.CurrState = CNTL_IDLE;
+		}
+	}
+}
+
+/*
+	==========================================================================
+	Description:
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+*/
+VOID CntlWaitAuthProc(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	USHORT Reason;
+	MLME_ASSOC_REQ_STRUCT AssocReq;
+	MLME_AUTH_REQ_STRUCT AuthReq;
+
+	if (Elem->MsgType == MT2_AUTH_CONF) {
+		NdisMoveMemory(&Reason, Elem->Msg, sizeof (USHORT));
+		if (Reason == MLME_SUCCESS) {
+			DBGPRINT(RT_DEBUG_TRACE, ("CNTL - AUTH OK\n"));
+			AssocParmFill(pAd, &AssocReq, pAd->MlmeAux.Bssid,
+				      pAd->MlmeAux.CapabilityInfo,
+				      ASSOC_TIMEOUT,
+				      pAd->StaCfg.DefaultListenCount);
+
+			{
+				MlmeEnqueue(pAd, ASSOC_STATE_MACHINE,
+					    MT2_MLME_ASSOC_REQ,
+					    sizeof (MLME_ASSOC_REQ_STRUCT),
+					    &AssocReq, 0);
+
+				pAd->Mlme.CntlMachine.CurrState =
+				    CNTL_WAIT_ASSOC;
+			}
+		} else {
+			/* This fail may because of the AP already keep us in its MAC table without */
+			/* ageing-out. The previous authentication attempt must have let it remove us. */
+			/* so try Authentication again may help. For D-Link DWL-900AP+ compatibility. */
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("CNTL - AUTH FAIL, try again...\n"));
+			{
+				if ((pAd->StaCfg.AuthMode ==
+				     Ndis802_11AuthModeShared)
+				    || (pAd->StaCfg.AuthMode ==
+					Ndis802_11AuthModeAutoSwitch)) {
+					/* either Ndis802_11AuthModeShared or Ndis802_11AuthModeAutoSwitch, try shared key first */
+					AuthParmFill(pAd, &AuthReq,
+						     pAd->MlmeAux.Bssid,
+						     AUTH_MODE_KEY);
+				} else {
+					AuthParmFill(pAd, &AuthReq,
+						     pAd->MlmeAux.Bssid,
+						     AUTH_MODE_OPEN);
+				}
+				MlmeEnqueue(pAd, AUTH_STATE_MACHINE,
+					    MT2_MLME_AUTH_REQ,
+					    sizeof (MLME_AUTH_REQ_STRUCT),
+					    &AuthReq, 0);
+
+			}
+			pAd->Mlme.CntlMachine.CurrState = CNTL_WAIT_AUTH2;
+		}
+	}
+}
+
+/*
+	==========================================================================
+	Description:
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+*/
+VOID CntlWaitAuthProc2(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	USHORT Reason;
+	MLME_ASSOC_REQ_STRUCT AssocReq;
+	MLME_AUTH_REQ_STRUCT AuthReq;
+
+	if (Elem->MsgType == MT2_AUTH_CONF) {
+		NdisMoveMemory(&Reason, Elem->Msg, sizeof (USHORT));
+		if (Reason == MLME_SUCCESS) {
+			DBGPRINT(RT_DEBUG_TRACE, ("CNTL - AUTH OK\n"));
+			AssocParmFill(pAd, &AssocReq, pAd->MlmeAux.Bssid,
+				      pAd->MlmeAux.CapabilityInfo,
+				      ASSOC_TIMEOUT,
+				      pAd->StaCfg.DefaultListenCount);
+			{
+				MlmeEnqueue(pAd, ASSOC_STATE_MACHINE,
+					    MT2_MLME_ASSOC_REQ,
+					    sizeof (MLME_ASSOC_REQ_STRUCT),
+					    &AssocReq, 0);
+
+				pAd->Mlme.CntlMachine.CurrState =
+				    CNTL_WAIT_ASSOC;
+			}
+		} else {
+			if ((pAd->StaCfg.AuthMode ==
+				     Ndis802_11AuthModeAutoSwitch)
+				    && (pAd->MlmeAux.Alg ==
+						Ndis802_11AuthModeShared)) {
+				DBGPRINT(RT_DEBUG_TRACE,
+					 ("CNTL - AUTH FAIL, try OPEN system...\n"));
+				AuthParmFill(pAd, &AuthReq, pAd->MlmeAux.Bssid,
+					     Ndis802_11AuthModeOpen);
+				MlmeEnqueue(pAd, AUTH_STATE_MACHINE,
+					    MT2_MLME_AUTH_REQ,
+					    sizeof (MLME_AUTH_REQ_STRUCT),
+					    &AuthReq, 0);
+
+				pAd->Mlme.CntlMachine.CurrState =
+				    CNTL_WAIT_AUTH2;
+			} else {
+				/* not success, try next BSS */
+				DBGPRINT(RT_DEBUG_TRACE,
+					 ("CNTL - AUTH FAIL, give up; try next BSS\n"));
+				RTMP_STA_ENTRY_MAC_RESET(pAd, BSSID_WCID);
+				pAd->Mlme.CntlMachine.CurrState = CNTL_IDLE;
+				pAd->MlmeAux.BssIdx++;
+				IterateOnBssTab(pAd);
+			}
+		}
+	}
+}
+
+/*
+	==========================================================================
+	Description:
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+*/
+VOID CntlWaitAssocProc(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	USHORT Reason;
+
+	if (Elem->MsgType == MT2_ASSOC_CONF) {
+		NdisMoveMemory(&Reason, Elem->Msg, sizeof (USHORT));
+		if (Reason == MLME_SUCCESS) {
+			RTMPSendWirelessEvent(pAd, IW_ASSOC_EVENT_FLAG, NULL,
+					      BSS0, 0);
+
+			LinkUp(pAd, BSS_INFRA);
+			pAd->Mlme.CntlMachine.CurrState = CNTL_IDLE;
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("CNTL - Association successful on BSS #%ld\n",
+				  pAd->MlmeAux.BssIdx));
+		} else {
+			/* not success, try next BSS */
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("CNTL - Association fails on BSS #%ld\n",
+				  pAd->MlmeAux.BssIdx));
+			RTMP_STA_ENTRY_MAC_RESET(pAd, BSSID_WCID);
+			pAd->MlmeAux.BssIdx++;
+			IterateOnBssTab(pAd);
+		}
+	}
+}
+
+/*
+	==========================================================================
+	Description:
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+*/
+VOID CntlWaitReassocProc(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	USHORT Result;
+
+	if (Elem->MsgType == MT2_REASSOC_CONF) {
+		NdisMoveMemory(&Result, Elem->Msg, sizeof (USHORT));
+		if (Result == MLME_SUCCESS) {
+			/* send wireless event - for association */
+			RTMPSendWirelessEvent(pAd, IW_ASSOC_EVENT_FLAG, NULL,
+					      BSS0, 0);
+
+
+			/* */
+			/* NDIS requires a new Link UP indication but no Link Down for RE-ASSOC */
+			/* */
+			LinkUp(pAd, BSS_INFRA);
+
+			pAd->Mlme.CntlMachine.CurrState = CNTL_IDLE;
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("CNTL - Re-assocition successful on BSS #%ld\n",
+				  pAd->MlmeAux.RoamIdx));
+		} else {
+			/* reassoc failed, try to pick next BSS in the BSS Table */
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("CNTL - Re-assocition fails on BSS #%ld\n",
+				  pAd->MlmeAux.RoamIdx));
+			{
+				pAd->MlmeAux.RoamIdx++;
+				IterateOnBssTab2(pAd);
+			}
+		}
+	}
+}
+
+VOID AdhocTurnOnQos(
+	IN PRTMP_ADAPTER pAd)
+{
+#define AC0_DEF_TXOP		0
+#define AC1_DEF_TXOP		0
+#define AC2_DEF_TXOP		94
+#define AC3_DEF_TXOP		47
+
+	/* Turn on QOs if use HT rate. */
+	if (pAd->CommonCfg.APEdcaParm.bValid == FALSE) {
+		pAd->CommonCfg.APEdcaParm.bValid = TRUE;
+		pAd->CommonCfg.APEdcaParm.Aifsn[0] = 3;
+		pAd->CommonCfg.APEdcaParm.Aifsn[1] = 7;
+		pAd->CommonCfg.APEdcaParm.Aifsn[2] = 1;
+		pAd->CommonCfg.APEdcaParm.Aifsn[3] = 1;
+
+		pAd->CommonCfg.APEdcaParm.Cwmin[0] = 4;
+		pAd->CommonCfg.APEdcaParm.Cwmin[1] = 4;
+		pAd->CommonCfg.APEdcaParm.Cwmin[2] = 3;
+		pAd->CommonCfg.APEdcaParm.Cwmin[3] = 2;
+
+		pAd->CommonCfg.APEdcaParm.Cwmax[0] = 10;
+		pAd->CommonCfg.APEdcaParm.Cwmax[1] = 6;
+		pAd->CommonCfg.APEdcaParm.Cwmax[2] = 4;
+		pAd->CommonCfg.APEdcaParm.Cwmax[3] = 3;
+
+		pAd->CommonCfg.APEdcaParm.Txop[0] = 0;
+		pAd->CommonCfg.APEdcaParm.Txop[1] = 0;
+		pAd->CommonCfg.APEdcaParm.Txop[2] = AC2_DEF_TXOP;
+		pAd->CommonCfg.APEdcaParm.Txop[3] = AC3_DEF_TXOP;
+	}
+	AsicSetEdcaParm(pAd, &pAd->CommonCfg.APEdcaParm);
+}
+
+/*
+	==========================================================================
+	Description:
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+*/
+VOID LinkUp(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR BssType)
+{
+	ULONG Now;
+	UINT32 Data;
+	BOOLEAN Cancelled;
+	UCHAR Value = 0, idx = 0; /*, HashIdx = 0; */
+	MAC_TABLE_ENTRY *pEntry = NULL; /* *pCurrEntry = NULL; */
+
+	/* Init ChannelQuality to prevent DEAD_CQI at initial LinkUp */
+	pAd->Mlme.ChannelQuality = 50;
+
+	/* init to not doing improved scan */
+	pAd->StaCfg.bImprovedScan = FALSE;
+	pAd->StaCfg.bNotFirstScan = TRUE;
+	pAd->StaCfg.bAutoConnectByBssid = FALSE;
+
+#ifdef RTMP_MAC_USB
+	/* Within 10 seconds after link up, don't allow to go to sleep. */
+	pAd->CountDowntoPsm = STAY_10_SECONDS_AWAKE;
+#endif /* RTMP_MAC_USB */
+
+
+	pEntry = &pAd->MacTab.Content[BSSID_WCID];
+
+	/* */
+	/* ASSOC - DisassocTimeoutAction */
+	/* CNTL - Dis-associate successful */
+	/* !!! LINK DOWN !!! */
+	/* [88888] OID_802_11_SSID should have returned NDTEST_WEP_AP2(Returned: ) */
+	/* */
+	/* To prevent DisassocTimeoutAction to call Link down after we link up, */
+	/* cancel the DisassocTimer no matter what it start or not. */
+	/* */
+	RTMPCancelTimer(&pAd->MlmeAux.DisassocTimer, &Cancelled);
+
+	COPY_SETTINGS_FROM_MLME_AUX_TO_ACTIVE_CFG(pAd);
+
+#ifdef DOT11_N_SUPPORT
+	COPY_HTSETTINGS_FROM_MLME_AUX_TO_ACTIVE_CFG(pAd);
+#endif /* DOT11_N_SUPPORT */
+
+	if (BssType == BSS_ADHOC) {
+		OPSTATUS_SET_FLAG(pAd, fOP_STATUS_ADHOC_ON);
+		OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
+
+#ifdef CARRIER_DETECTION_SUPPORT	/* Roger sync Carrier */
+		/* No carrier detection when adhoc */
+		/* CarrierDetectionStop(pAd); */
+		pAd->CommonCfg.CarrierDetect.CD_State = CD_NORMAL;
+#endif /* CARRIER_DETECTION_SUPPORT */
+
+#ifdef DOT11_N_SUPPORT
+		if ((pAd->CommonCfg.PhyMode >= PHY_11ABGN_MIXED)
+		    && (pAd->StaCfg.bAdhocN == TRUE))
+			AdhocTurnOnQos(pAd);
+#endif /* DOT11_N_SUPPORT */
+
+		InitChannelRelatedValue(pAd);
+
+		DBGPRINT(RT_DEBUG_TRACE, ("!!!Adhoc LINK UP !!! \n"));
+	} else {
+		OPSTATUS_SET_FLAG(pAd, fOP_STATUS_INFRA_ON);
+		OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
+		OPSTATUS_SET_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED);
+		DBGPRINT(RT_DEBUG_TRACE, ("!!!Infra LINK UP !!! \n"));
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("!!! LINK UP !!! (BssType=%d, AID=%d, ssid=%s, Channel=%d, CentralChannel = %d)\n",
+		  BssType, pAd->StaActive.Aid, pAd->CommonCfg.Ssid,
+		  pAd->CommonCfg.Channel, pAd->CommonCfg.CentralChannel));
+
+#ifdef DOT11_N_SUPPORT
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("!!! LINK UP !!! (Density =%d, )\n",
+		  pAd->MacTab.Content[BSSID_WCID].MpduDensity));
+#endif /* DOT11_N_SUPPORT */
+
+	if (BssType == BSS_ADHOC)
+		AsicSetBssid(pAd, pAd->CommonCfg.Bssid);
+
+
+	AsicSetSlotTime(pAd, TRUE);
+	AsicSetEdcaParm(pAd, &pAd->CommonCfg.APEdcaParm);
+
+
+	/* Call this for RTS protectionfor legacy rate, we will always enable RTS threshold, but normally it will not hit */
+	AsicUpdateProtect(pAd, 0, (OFDMSETPROTECT | CCKSETPROTECT), TRUE,
+			  FALSE);
+
+#ifdef DOT11_N_SUPPORT
+	if ((pAd->StaActive.SupportedPhyInfo.bHtEnable == TRUE)) {
+		/* Update HT protectionfor based on AP's operating mode. */
+		if (pAd->MlmeAux.AddHtInfo.AddHtInfo2.NonGfPresent == 1) {
+			AsicUpdateProtect(pAd,
+					  pAd->MlmeAux.AddHtInfo.AddHtInfo2.
+					  OperaionMode, ALLN_SETPROTECT, FALSE,
+					  TRUE);
+		} else
+			AsicUpdateProtect(pAd,
+					  pAd->MlmeAux.AddHtInfo.AddHtInfo2.
+					  OperaionMode, ALLN_SETPROTECT, FALSE,
+					  FALSE);
+	}
+#endif /* DOT11_N_SUPPORT */
+
+/*
+	NdisZeroMemory(&pAd->DrsCounters, sizeof (COUNTER_DRS));
+*/
+
+	NdisGetSystemUpTime(&Now);
+	pAd->StaCfg.LastBeaconRxTime = Now;	/* last RX timestamp */
+
+	if ((pAd->CommonCfg.TxPreamble != Rt802_11PreambleLong) &&
+	    CAP_IS_SHORT_PREAMBLE_ON(pAd->StaActive.CapabilityInfo)) {
+		MlmeSetTxPreamble(pAd, Rt802_11PreambleShort);
+	}
+
+	OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_AGGREGATION_INUSED);
+
+	if (pAd->CommonCfg.RadarDetect.RDMode == RD_SILENCE_MODE) {
+	}
+	pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
+
+	if (pAd->StaCfg.WepStatus <= Ndis802_11WEPDisabled) 
+	{
+#ifdef WPA_SUPPLICANT_SUPPORT
+		if (pAd->StaCfg.WpaSupplicantUP &&
+		    (pAd->StaCfg.WepStatus == Ndis802_11WEPEnabled) &&
+		    (pAd->StaCfg.IEEE8021X == TRUE)) ;
+		else
+#endif /* WPA_SUPPLICANT_SUPPORT */
+		{
+			pAd->StaCfg.PortSecured = WPA_802_1X_PORT_SECURED;
+			pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilterAcceptAll;
+		}
+	}
+
+	if (BssType == BSS_ADHOC) {
+		MakeIbssBeacon(pAd);
+		if ((pAd->CommonCfg.Channel > 14)
+		    && (pAd->CommonCfg.bIEEE80211H == 1)
+		    && RadarChannelCheck(pAd, pAd->CommonCfg.Channel)) {
+			;	/*Do nothing */
+		} else {
+			AsicEnableIbssSync(pAd);
+		}
+
+		/* In ad hoc mode, use MAC table from index 1. */
+		/* p.s ASIC use all 0xff as termination of WCID table search.To prevent it's 0xff-ff-ff-ff-ff-ff, Write 0 here. */
+		RTMP_IO_WRITE32(pAd, MAC_WCID_BASE, 0x00);
+		RTMP_IO_WRITE32(pAd, 0x1808, 0x00);
+
+		/* If WEP is enabled, add key material and cipherAlg into Asic */
+		/* Fill in Shared Key Table(offset: 0x6c00) and Shared Key Mode(offset: 0x7000) */
+
+		if (pAd->StaCfg.WepStatus == Ndis802_11WEPEnabled) {
+			UCHAR CipherAlg;
+
+			for (idx = 0; idx < SHARE_KEY_NUM; idx++) {
+				CipherAlg = pAd->SharedKey[BSS0][idx].CipherAlg;
+
+				if (pAd->SharedKey[BSS0][idx].KeyLen > 0) {
+					/* Set key material and cipherAlg to Asic */
+					AsicAddSharedKeyEntry(pAd, BSS0, idx,
+							      &pAd->
+							      SharedKey[BSS0]
+							      [idx]);
+
+					if (idx == pAd->StaCfg.DefaultKeyId) {
+						INT cnt;
+
+						/* Generate 3-bytes IV randomly for software encryption using */
+						for (cnt = 0; cnt < LEN_WEP_TSC;
+						     cnt++)
+							pAd->
+							    SharedKey[BSS0]
+							    [idx].TxTsc[cnt] =
+							    RandomByte(pAd);
+
+						/* Update WCID attribute table and IVEIV table for this group key table */
+						RTMPSetWcidSecurityInfo(pAd,
+									BSS0,
+									idx,
+									CipherAlg,
+									MCAST_WCID,
+									SHAREDKEYTABLE);
+					}
+				}
+
+			}
+		}
+		/* If WPANone is enabled, add key material and cipherAlg into Asic */
+		/* Fill in Shared Key Table(offset: 0x6c00) and Shared Key Mode(offset: 0x7000) */
+		else if (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPANone) {
+			pAd->StaCfg.DefaultKeyId = 0;	/* always be zero */
+
+			NdisZeroMemory(&pAd->SharedKey[BSS0][0],
+				       sizeof (CIPHER_KEY));
+			pAd->SharedKey[BSS0][0].KeyLen = LEN_TK;
+			NdisMoveMemory(pAd->SharedKey[BSS0][0].Key,
+				       pAd->StaCfg.PMK, LEN_TK);
+
+			if (pAd->StaCfg.PairCipher ==
+			    Ndis802_11Encryption2Enabled) {
+				NdisMoveMemory(pAd->SharedKey[BSS0][0].RxMic,
+					       &pAd->StaCfg.PMK[16],
+					       LEN_TKIP_MIC);
+				NdisMoveMemory(pAd->SharedKey[BSS0][0].TxMic,
+					       &pAd->StaCfg.PMK[16],
+					       LEN_TKIP_MIC);
+			}
+
+			/* Decide its ChiperAlg */
+			if (pAd->StaCfg.PairCipher ==
+			    Ndis802_11Encryption2Enabled)
+				pAd->SharedKey[BSS0][0].CipherAlg = CIPHER_TKIP;
+			else if (pAd->StaCfg.PairCipher ==
+				 Ndis802_11Encryption3Enabled)
+				pAd->SharedKey[BSS0][0].CipherAlg = CIPHER_AES;
+			else {
+				DBGPRINT(RT_DEBUG_TRACE,
+					 ("Unknow Cipher (=%d), set Cipher to AES\n",
+					  pAd->StaCfg.PairCipher));
+				pAd->SharedKey[BSS0][0].CipherAlg = CIPHER_AES;
+			}
+
+			/* Set key material and cipherAlg to Asic */
+			AsicAddSharedKeyEntry(pAd,
+					      BSS0,
+					      0, &pAd->SharedKey[BSS0][0]);
+
+			/* Update WCID attribute table and IVEIV table for this group key table */
+			RTMPSetWcidSecurityInfo(pAd,
+						BSS0,
+						0,
+						pAd->SharedKey[BSS0][0].
+						CipherAlg, MCAST_WCID,
+						SHAREDKEYTABLE);
+		}
+	} else {		/* BSS_INFRA */
+
+		/* Check the new SSID with last SSID */
+		while (Cancelled == TRUE) {
+			if (pAd->CommonCfg.LastSsidLen ==
+			    pAd->CommonCfg.SsidLen) {
+				if (RTMPCompareMemory
+				    (pAd->CommonCfg.LastSsid,
+				     pAd->CommonCfg.Ssid,
+				     pAd->CommonCfg.LastSsidLen) == 0) {
+					/* Link to the old one no linkdown is required. */
+					break;
+				}
+			}
+			/* Send link down event before set to link up */
+			RTMP_IndicateMediaState(pAd,
+						NdisMediaStateDisconnected);
+			pAd->ExtraInfo = GENERAL_LINK_DOWN;
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("NDIS_STATUS_MEDIA_DISCONNECT Event AA!\n"));
+			break;
+		}
+
+		/* */
+		/* On WPA mode, Remove All Keys if not connect to the last BSSID */
+		/* Key will be set after 4-way handshake. */
+		/* */
+		if (pAd->StaCfg.AuthMode >= Ndis802_11AuthModeWPA) {
+			/*ULONG                 IV; */
+
+			/* Remove all WPA keys */
+#ifdef PCIE_PS_SUPPORT
+			RTMP_CLEAR_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP);
+#endif /* PCIE_PS_SUPPORT */
+/*
+ 		 for dhcp,issue ,wpa_supplicant ioctl too fast , at link_up, it will add key before driver remove key  
+		 move to assoc.c 
+ */
+/*			RTMPWPARemoveAllKeys(pAd);*/
+			pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
+			pAd->StaCfg.PrivacyFilter =
+			    Ndis802_11PrivFilter8021xWEP;
+
+
+#ifdef SOFT_ENCRYPT
+			/* There are some situation to need to encryption by software                           
+			   1. The Client support PMF. It shall ony support AES cipher.
+			   2. The Client support WAPI.
+			   If use RT3883 or later, HW can handle the above.     
+			 */
+			if (!(IS_HW_WAPI_SUPPORT(pAd)) && (FALSE
+			    )) {
+				CLIENT_STATUS_SET_FLAG(pEntry,
+						       fCLIENT_STATUS_SOFTWARE_ENCRYPT);
+			}
+#endif /* SOFT_ENCRYPT */
+
+		}
+
+		/* NOTE: */
+		/* the decision of using "short slot time" or not may change dynamically due to */
+		/* new STA association to the AP. so we have to decide that upon parsing BEACON, not here */
+
+		/* NOTE: */
+		/* the decision to use "RTC/CTS" or "CTS-to-self" protection or not may change dynamically */
+		/* due to new STA association to the AP. so we have to decide that upon parsing BEACON, not here */
+
+		ComposePsPoll(pAd);
+		ComposeNullFrame(pAd);
+
+			AsicEnableBssSync(pAd);
+
+		/* If WEP is enabled, add paiewise and shared key */
+#ifdef WPA_SUPPLICANT_SUPPORT
+		if (((pAd->StaCfg.WpaSupplicantUP) &&
+		     (pAd->StaCfg.WepStatus == Ndis802_11WEPEnabled) &&
+		     (pAd->StaCfg.PortSecured == WPA_802_1X_PORT_SECURED)) ||
+		    ((pAd->StaCfg.WpaSupplicantUP == WPA_SUPPLICANT_DISABLE) &&
+		     (pAd->StaCfg.WepStatus == Ndis802_11WEPEnabled)))
+#else
+		if (pAd->StaCfg.WepStatus == Ndis802_11WEPEnabled)
+#endif /* WPA_SUPPLICANT_SUPPORT */
+		{
+			UCHAR CipherAlg;
+
+			for (idx = 0; idx < SHARE_KEY_NUM; idx++) {
+				CipherAlg = pAd->SharedKey[BSS0][idx].CipherAlg;
+
+				if (pAd->SharedKey[BSS0][idx].KeyLen > 0) {
+					/* Set key material and cipherAlg to Asic */
+					AsicAddSharedKeyEntry(pAd, BSS0, idx,
+							      &pAd->
+							      SharedKey[BSS0]
+							      [idx]);
+
+					if (idx == pAd->StaCfg.DefaultKeyId) {
+						/* STA doesn't need to set WCID attribute for group key */
+
+						/* Assign pairwise key info to Asic */
+						pEntry->Aid = BSSID_WCID;
+						RTMPSetWcidSecurityInfo(pAd,
+									BSS0,
+									idx,
+									CipherAlg,
+									pEntry->
+									Aid,
+									SHAREDKEYTABLE);
+					}
+				}
+			}
+		}
+		/* For GUI ++ */
+		if (pAd->StaCfg.AuthMode < Ndis802_11AuthModeWPA) {
+			pAd->ExtraInfo = GENERAL_LINK_UP;
+			RTMP_IndicateMediaState(pAd, NdisMediaStateConnected);
+		} else if ((pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPAPSK) ||
+			   (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2PSK))
+		{
+#ifdef WPA_SUPPLICANT_SUPPORT
+			if (pAd->StaCfg.WpaSupplicantUP ==
+			    WPA_SUPPLICANT_DISABLE)
+#endif /* WPA_SUPPLICANT_SUPPORT */
+				RTMPSetTimer(&pAd->Mlme.LinkDownTimer,
+					     LINK_DOWN_TIMEOUT);
+
+		}
+		/* -- */
+
+
+
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("!!! LINK UP !!!  ClientStatusFlags=%lx)\n",
+			  pAd->MacTab.Content[BSSID_WCID].ClientStatusFlags));
+
+
+
+		MlmeUpdateTxRates(pAd, TRUE, BSS0);
+#ifdef DOT11_N_SUPPORT
+		MlmeUpdateHtTxRates(pAd, BSS0);
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("!!! LINK UP !! (StaActive.bHtEnable =%d, )\n",
+			  pAd->StaActive.SupportedPhyInfo.bHtEnable));
+#endif /* DOT11_N_SUPPORT */
+
+
+		if (pAd->CommonCfg.bAggregationCapable) {
+			if ((pAd->CommonCfg.bPiggyBackCapable)
+			    && (pAd->MlmeAux.APRalinkIe & 0x00000003) == 3) {
+				OPSTATUS_SET_FLAG(pAd,
+						  fOP_STATUS_PIGGYBACK_INUSED);
+				OPSTATUS_SET_FLAG(pAd,
+						  fOP_STATUS_AGGREGATION_INUSED);
+				CLIENT_STATUS_SET_FLAG(pEntry,
+						       fCLIENT_STATUS_AGGREGATION_CAPABLE);
+				CLIENT_STATUS_SET_FLAG(pEntry,
+						       fCLIENT_STATUS_PIGGYBACK_CAPABLE);
+				RTMPSetPiggyBack(pAd, TRUE);
+				DBGPRINT(RT_DEBUG_TRACE,
+					 ("Turn on Piggy-Back\n"));
+			} else if (pAd->MlmeAux.APRalinkIe & 0x00000001) {
+				OPSTATUS_SET_FLAG(pAd,
+						  fOP_STATUS_AGGREGATION_INUSED);
+				CLIENT_STATUS_SET_FLAG(pEntry,
+						       fCLIENT_STATUS_AGGREGATION_CAPABLE);
+				DBGPRINT(RT_DEBUG_TRACE,
+					 ("Ralink Aggregation\n"));
+			}
+		}
+
+		if (pAd->MlmeAux.APRalinkIe != 0x0) {
+#ifdef DOT11_N_SUPPORT
+			if (CLIENT_STATUS_TEST_FLAG
+			    (pEntry, fCLIENT_STATUS_RDG_CAPABLE)) {
+				AsicEnableRDG(pAd);
+			}
+#endif /* DOT11_N_SUPPORT */
+			OPSTATUS_SET_FLAG(pAd, fCLIENT_STATUS_RALINK_CHIPSET);
+			CLIENT_STATUS_SET_FLAG(pEntry,
+					       fCLIENT_STATUS_RALINK_CHIPSET);
+		} else {
+			OPSTATUS_CLEAR_FLAG(pAd, fCLIENT_STATUS_RALINK_CHIPSET);
+			CLIENT_STATUS_CLEAR_FLAG(pEntry,
+						 fCLIENT_STATUS_RALINK_CHIPSET);
+		}
+	}
+
+
+#ifdef DOT11_N_SUPPORT
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("NDIS_STATUS_MEDIA_CONNECT Event B!.BACapability = %x. ClientStatusFlags = %lx\n",
+		  pAd->CommonCfg.BACapability.word,
+		  pAd->MacTab.Content[BSSID_WCID].ClientStatusFlags));
+#endif /* DOT11_N_SUPPORT */
+
+#ifdef LED_CONTROL_SUPPORT
+	/* Set LED */
+	RTMPSetLED(pAd, LED_LINK_UP);
+#endif /* LED_CONTROL_SUPPORT */
+
+	pAd->Mlme.PeriodicRound = 0;
+	pAd->Mlme.OneSecPeriodicRound = 0;
+	pAd->bConfigChanged = FALSE;	/* Reset config flag */
+	pAd->ExtraInfo = GENERAL_LINK_UP;	/* Update extra information to link is up */
+
+	/* Set asic auto fall back */
+	{
+		PUCHAR pTable;
+		UCHAR TableSize = 0;
+
+		MlmeSelectTxRateTable(pAd, &pAd->MacTab.Content[BSSID_WCID],
+				      &pTable, &TableSize,
+				      &pAd->CommonCfg.TxRateIndex);
+		AsicUpdateAutoFallBackTable(pAd, pTable);
+	}
+
+	NdisAcquireSpinLock(&pAd->MacTabLock);
+	pEntry->HTPhyMode.word = pAd->StaCfg.HTPhyMode.word;
+	pEntry->MaxHTPhyMode.word = pAd->StaCfg.HTPhyMode.word;
+	if (pAd->StaCfg.bAutoTxRateSwitch == FALSE) {
+		pEntry->bAutoTxRateSwitch = FALSE;
+#ifdef DOT11_N_SUPPORT
+		if (pEntry->HTPhyMode.field.MCS == 32)
+			pEntry->HTPhyMode.field.ShortGI = GI_800;
+
+		if ((pEntry->HTPhyMode.field.MCS > MCS_7)
+		    || (pEntry->HTPhyMode.field.MCS == 32))
+			pEntry->HTPhyMode.field.STBC = STBC_NONE;
+#endif /* DOT11_N_SUPPORT */
+		/* If the legacy mode is set, overwrite the transmit setting of this entry. */
+		if (pEntry->HTPhyMode.field.MODE <= MODE_OFDM)
+			RTMPUpdateLegacyTxSetting((UCHAR) pAd->StaCfg.
+						  DesiredTransmitSetting.field.
+						  FixedTxMode, pEntry);
+	} else
+		pEntry->bAutoTxRateSwitch = TRUE;
+	NdisReleaseSpinLock(&pAd->MacTabLock);
+
+	/*  Let Link Status Page display first initial rate. */
+	pAd->LastTxRate = (USHORT) (pEntry->HTPhyMode.word);
+
+		/* Select DAC according to HT or Legacy */
+	if (pAd->StaActive.SupportedPhyInfo.MCSSet[0] != 0x00) {
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &Value);
+		Value &= (~0x18);
+
+		{
+			if (pAd->Antenna.field.TxPath >= 2) {
+				Value |= 0x10;
+			}
+		}
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, Value);
+	} else {
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &Value);
+		Value &= (~0x18);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, Value);
+	}
+
+#ifdef DOT11_N_SUPPORT
+	if ((pAd->StaActive.SupportedPhyInfo.bHtEnable == TRUE)) {
+		if (pEntry->MaxRAmpduFactor == 0) {
+			/* If HT AP doesn't support MaxRAmpduFactor = 1, we need to set max PSDU to 0. */
+			/* Because our Init value is 1 at MACRegTable. */
+			RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, 0x000A0fff);	/* Default set to 0x1fff. But if one peer can't support 0x1fff, we need to change to 0xfff */
+		} else if (pEntry->MaxRAmpduFactor == 1) {
+			RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, 0x000A1fff);
+		} else if (pEntry->MaxRAmpduFactor == 2) {
+			RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, 0x000A2fff);
+		} else if (pEntry->MaxRAmpduFactor == 3) {
+			RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, 0x000A3fff);
+		}
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("!!!MaxRAmpduFactor= %d \n",
+			  pEntry->MaxRAmpduFactor));
+	}
+#endif /* DOT11_N_SUPPORT */
+
+	/* Patch for Marvel AP to gain high throughput */
+	/* Need to set as following, */
+	/* 1. Set txop in register-EDCA_AC0_CFG as 0x60 */
+	/* 2. Set EnTXWriteBackDDONE in register-WPDMA_GLO_CFG as zero */
+	/* 3. PBF_MAX_PCNT as 0x1F3FBF9F */
+	/* 4. kick per two packets when dequeue */
+	/* */
+	/* Txop can only be modified when RDG is off, WMM is disable and TxBurst is enable */
+	/* */
+	/* if 1. Legacy AP WMM on,  or 2. 11n AP, AMPDU disable.  Force turn off burst no matter what bEnableTxBurst is. */
+#ifdef DOT11_N_SUPPORT
+	if (!((pAd->CommonCfg.RxStream == 1) && (pAd->CommonCfg.TxStream == 1))
+	    && (pAd->StaCfg.bForceTxBurst == FALSE)
+	    &&
+	    (((pAd->StaActive.SupportedPhyInfo.bHtEnable == FALSE)
+	      && OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_WMM_INUSED))
+	     || ((pAd->StaActive.SupportedPhyInfo.bHtEnable == TRUE)
+		 && (pAd->CommonCfg.BACapability.field.Policy == BA_NOTUSE)))) {
+		RTMP_IO_READ32(pAd, EDCA_AC0_CFG, &Data);
+		Data &= 0xFFFFFF00;
+		RTMP_IO_WRITE32(pAd, EDCA_AC0_CFG, Data);
+
+		RTMP_IO_WRITE32(pAd, PBF_MAX_PCNT, 0x1F3F7F9F);
+		DBGPRINT(RT_DEBUG_TRACE, ("Txburst 1\n"));
+	} else
+#endif /* DOT11_N_SUPPORT */
+	if (pAd->CommonCfg.bEnableTxBurst) {
+		RTMP_IO_READ32(pAd, EDCA_AC0_CFG, &Data);
+		Data &= 0xFFFFFF00;
+		Data |= 0x60;
+		RTMP_IO_WRITE32(pAd, EDCA_AC0_CFG, Data);
+		pAd->CommonCfg.IOTestParm.bNowAtherosBurstOn = TRUE;
+
+		RTMP_IO_WRITE32(pAd, PBF_MAX_PCNT, 0x1F3FBF9F);
+		DBGPRINT(RT_DEBUG_TRACE, ("Txburst 2\n"));
+	} else {
+		RTMP_IO_READ32(pAd, EDCA_AC0_CFG, &Data);
+		Data &= 0xFFFFFF00;
+		RTMP_IO_WRITE32(pAd, EDCA_AC0_CFG, Data);
+
+		RTMP_IO_WRITE32(pAd, PBF_MAX_PCNT, 0x1F3F7F9F);
+		DBGPRINT(RT_DEBUG_TRACE, ("Txburst 3\n"));
+	}
+
+#ifdef DOT11_N_SUPPORT
+	/* Re-check to turn on TX burst or not. */
+	if ((pAd->CommonCfg.IOTestParm.bLastAtheros == TRUE)
+	    && ((STA_WEP_ON(pAd)) || (STA_TKIP_ON(pAd)))) {
+		pAd->CommonCfg.IOTestParm.bNextDisableRxBA = TRUE;
+		if (pAd->CommonCfg.bEnableTxBurst) {
+			UINT32 MACValue = 0;
+			/* Force disable  TXOP value in this case. The same action in MLMEUpdateProtect too. */
+			/* I didn't change PBF_MAX_PCNT setting. */
+			RTMP_IO_READ32(pAd, EDCA_AC0_CFG, &MACValue);
+			MACValue &= 0xFFFFFF00;
+			RTMP_IO_WRITE32(pAd, EDCA_AC0_CFG, MACValue);
+			pAd->CommonCfg.IOTestParm.bNowAtherosBurstOn = FALSE;
+		}
+	} else {
+		pAd->CommonCfg.IOTestParm.bNextDisableRxBA = FALSE;
+	}
+#endif /* DOT11_N_SUPPORT */
+
+	pAd->CommonCfg.IOTestParm.bLastAtheros = FALSE;
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+	/*
+	   If STA connects to different AP, STA couldn't send EAPOL_Start for WpaSupplicant.
+	 */
+	if ((pAd->StaCfg.BssType == BSS_INFRA) &&
+	    (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2) &&
+	    (NdisEqualMemory
+	     (pAd->CommonCfg.Bssid, pAd->CommonCfg.LastBssid,
+	      MAC_ADDR_LEN) == FALSE) && (pAd->StaCfg.bLostAp == TRUE)) {
+		pAd->StaCfg.bLostAp = FALSE;
+	}
+#endif /* WPA_SUPPLICANT_SUPPORT */
+	/*
+	   Need to check this COPY. This COPY is from Windows Driver.
+	 */
+
+	COPY_MAC_ADDR(pAd->CommonCfg.LastBssid, pAd->CommonCfg.Bssid);
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("!!!pAd->bNextDisableRxBA= %d \n",
+		  pAd->CommonCfg.IOTestParm.bNextDisableRxBA));
+	/* BSSID add in one MAC entry too.  Because in Tx, ASIC need to check Cipher and IV/EIV, BAbitmap */
+	/* Pther information in MACTab.Content[BSSID_WCID] is not necessary for driver. */
+	/* Note: As STA, The MACTab.Content[BSSID_WCID]. PairwiseKey and Shared Key for BSS0 are the same. */
+
+	NdisAcquireSpinLock(&pAd->MacTabLock);
+	pEntry->PortSecured = pAd->StaCfg.PortSecured;
+	NdisReleaseSpinLock(&pAd->MacTabLock);
+
+	/* */
+	/* Patch Atheros AP TX will breakdown issue. */
+	/* AP Model: DLink DWL-8200AP */
+	/* */
+	if (INFRA_ON(pAd) && OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_WMM_INUSED)
+	    && STA_TKIP_ON(pAd)) {
+		RTMP_IO_WRITE32(pAd, RX_PARSER_CFG, 0x01);
+	} else {
+		RTMP_IO_WRITE32(pAd, RX_PARSER_CFG, 0x00);
+	}
+
+	RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS);
+	/*RTMP_CLEAR_PSFLAG(pAd, fRTMP_PS_GO_TO_SLEEP_NOW); */
+
+
+#ifdef DOT11_N_SUPPORT
+#ifdef DOT11N_DRAFT3
+	if (INFRA_ON(pAd)) {
+		if ((pAd->CommonCfg.bBssCoexEnable == TRUE)
+		    && (pAd->CommonCfg.Channel <= 14)
+		    && (pAd->StaActive.SupportedPhyInfo.bHtEnable == TRUE)
+		    && (pAd->MlmeAux.ExtCapInfo.BssCoexistMgmtSupport == 1)) {
+			OPSTATUS_SET_FLAG(pAd, fOP_STATUS_SCAN_2040);
+			BuildEffectedChannelList(pAd);
+			/*pAd->CommonCfg.ScanParameter.Dot11BssWidthTriggerScanInt = 150; */
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("LinkUP AP supports 20/40 BSS COEX !!! Dot11BssWidthTriggerScanInt[%d]\n",
+				  pAd->CommonCfg.Dot11BssWidthTriggerScanInt));
+		} else {
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("not supports 20/40 BSS COEX !!! \n"));
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("pAd->CommonCfg.bBssCoexEnable %d !!! \n",
+				  pAd->CommonCfg.bBssCoexEnable));
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("pAd->CommonCfg.Channel %d !!! \n",
+				  pAd->CommonCfg.Channel));
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("pAd->StaActive.SupportedHtPhy.bHtEnable %d !!! \n",
+				  pAd->StaActive.SupportedPhyInfo.bHtEnable));
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("pAd->MlmeAux.ExtCapInfo.BssCoexstSup %d !!! \n",
+				  pAd->MlmeAux.ExtCapInfo.
+				  BssCoexistMgmtSupport));
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("pAd->CommonCfg.CentralChannel %d !!! \n",
+				  pAd->CommonCfg.CentralChannel));
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("pAd->CommonCfg.PhyMode %d !!! \n",
+				  pAd->CommonCfg.PhyMode));
+		}
+	}
+#endif /* DOT11N_DRAFT3 */
+#endif /* DOT11_N_SUPPORT */
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+	/*
+	   When AuthMode is WPA2-Enterprise and AP reboot or STA lost AP, 
+	   WpaSupplicant would not send EapolStart to AP after STA re-connect to AP again.
+	   In this case, driver would send EapolStart to AP.
+	 */
+	if ((pAd->StaCfg.BssType == BSS_INFRA) &&
+	    (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2) &&
+	    (NdisEqualMemory
+	     (pAd->CommonCfg.Bssid, pAd->CommonCfg.LastBssid, MAC_ADDR_LEN))
+	    && (pAd->StaCfg.bLostAp == TRUE)) {
+		WpaSendEapolStart(pAd, pAd->CommonCfg.Bssid);
+		pAd->StaCfg.bLostAp = FALSE;
+	}
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+#ifdef RTMP_INTERNAL_TX_ALC
+	/* Initialize the index of the internal Tx ALC table */
+	if (pAd->TxPowerCtrl.bInternalTxALC == TRUE
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+		|| (IS_RT5392(pAd) && pAd->bAutoTxAgcG)
+#endif // RT5390//
+		)
+	{
+		UCHAR index = 0;
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+		if (IS_RT5390(pAd))
+		{
+			/* Initialize the lookup table index */
+			pAd->TxPowerCtrl.LookupTableIndex = 0;
+
+			for (index = 0; index < MAX_NUM_OF_CHANNELS; index++)
+			{
+				if (pAd->CommonCfg.Channel == pAd->TxPower[index].Channel)
+				{
+					pAd->TxPowerCtrl.idxTxPowerTable = pAd->TxPower[index].Power;
+					pAd->TxPowerCtrl.idxTxPowerTable2 = pAd->TxPower[index].Power2;
+					break;
+				}
+			}
+
+			if (pAd->CommonCfg.Channel <= 14)
+			{
+				
+				/* The boundary verification */
+				
+				if ((pAd->TxPowerCtrl.idxTxPowerTable < LOWERBOUND_TX_POWER_TUNING_ENTRY_OVER_5390) || 
+				    (pAd->TxPowerCtrl.idxTxPowerTable > UPPERBOUND_TX_POWER_TUNING_ENTRY_OVER_5390))
+				{
+					pAd->TxPowerCtrl.idxTxPowerTable = 0; /* default array index */
+				}
+
+				if ((pAd->TxPowerCtrl.idxTxPowerTable2 < LOWERBOUND_TX_POWER_TUNING_ENTRY_OVER_5390) ||
+				    (pAd->TxPowerCtrl.idxTxPowerTable2 > UPPERBOUND_TX_POWER_TUNING_ENTRY_OVER_5390))
+				{
+					pAd->TxPowerCtrl.idxTxPowerTable2 = 0; /* default array index */
+				}
+
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: pAd->TxPowerCtrl.idxTxPowerTable = %d"
+
+					", idxTxPowerTable2 = %d\n", 
+					__FUNCTION__, 
+					pAd->TxPowerCtrl.idxTxPowerTable
+					, pAd->TxPowerCtrl.idxTxPowerTable2
+					));
+			}
+			else
+			{
+				pAd->TxPowerCtrl.idxTxPowerTable = 0; /* default array index */
+				pAd->TxPowerCtrl.idxTxPowerTable2 = 0; /* default array index */
+
+				DBGPRINT(RT_DEBUG_TRACE, ("%s: pAd->TxPowerCtrl.idxTxPowerTable = %d"
+
+					", idxTxPowerTable2 = %d\n", 
+					__FUNCTION__, 
+					pAd->TxPowerCtrl.idxTxPowerTable
+					, pAd->TxPowerCtrl.idxTxPowerTable2
+					));
+			}
+		}
+		else
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */	
+		{
+		for (index = 0; index < MAX_NUM_OF_CHANNELS; index++) {
+			if (pAd->CommonCfg.Channel ==
+			    pAd->TxPower[index].Channel) {
+				pAd->TxPowerCtrl.idxTxPowerTable =
+				    pAd->TxPower[index].Power;
+				break;
+			}
+		}
+
+		if (pAd->CommonCfg.Channel <= 14) {
+			/* */
+			/* The boundary verification */
+			/* */
+			if ((pAd->TxPowerCtrl.idxTxPowerTable <
+			     LOWERBOUND_TX_POWER_TUNING_ENTRY)
+			    || (pAd->TxPowerCtrl.idxTxPowerTable >
+				UPPERBOUND_TX_POWER_TUNING_ENTRY(pAd))) {
+				pAd->TxPowerCtrl.idxTxPowerTable = 0;	/* default array index */
+			}
+
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("%s: pAd->TxPowerCtrl.idxTxPowerTable = %d\n",
+				  __FUNCTION__,
+				  pAd->TxPowerCtrl.idxTxPowerTable));
+		} else {
+			pAd->TxPowerCtrl.idxTxPowerTable = 0;	/* default array index */
+
+			DBGPRINT(RT_DEBUG_ERROR,
+				 ("%s: pAd->TxPowerCtrl.idxTxPowerTable = %d\n",
+				  __FUNCTION__,
+				  pAd->TxPowerCtrl.idxTxPowerTable));
+		}
+	}
+	}
+#endif /* RTMP_INTERNAL_TX_ALC */
+}
+
+/*
+	==========================================================================
+
+	Routine	Description:
+		Disconnect current BSSID
+
+	Arguments:
+		pAd				- Pointer to our adapter
+		IsReqFromAP		- Request from AP
+		
+	Return Value:		
+		None
+		
+	IRQL = DISPATCH_LEVEL
+
+	Note:
+		We need more information to know it's this requst from AP.
+		If yes! we need to do extra handling, for example, remove the WPA key.
+		Otherwise on 4-way handshaking will faied, since the WPA key didn't be
+		remove while auto reconnect.
+		Disconnect request from AP, it means we will start afresh 4-way handshaking 
+		on WPA mode.
+
+	==========================================================================
+*/
+VOID LinkDown(
+	IN PRTMP_ADAPTER pAd,
+	IN BOOLEAN IsReqFromAP)
+{
+	UCHAR i, ByteValue = 0;
+
+	/* Do nothing if monitor mode is on */
+	if (MONITOR_ON(pAd))
+		return;
+
+#ifdef RALINK_ATE
+	/* Nothing to do in ATE mode. */
+	if (ATE_ON(pAd))
+		return;
+#endif /* RALINK_ATE */
+
+#ifdef PCIE_PS_SUPPORT
+	/* Not allow go to sleep within linkdown function. */
+	RTMP_CLEAR_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP);
+#endif /* PCIE_PS_SUPPORT */
+
+
+	RTMPSendWirelessEvent(pAd, IW_STA_LINKDOWN_EVENT_FLAG, NULL, BSS0, 0);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("!!! LINK DOWN !!!\n"));
+	OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_AGGREGATION_INUSED);
+
+	/* reset to not doing improved scan */
+	pAd->StaCfg.bImprovedScan = FALSE;
+
+#ifdef PCIE_PS_SUPPORT
+
+	if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_ADVANCE_POWER_SAVE_PCIE_DEVICE)) {
+		BOOLEAN Cancelled;
+		pAd->Mlme.bPsPollTimerRunning = FALSE;
+		RTMPCancelTimer(&pAd->Mlme.PsPollTimer, &Cancelled);
+	}
+
+	pAd->bPCIclkOff = FALSE;
+#endif /* PCIE_PS_SUPPORT */
+	if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE)
+/*||	RTMP_TEST_PSFLAG(pAd, fRTMP_PS_SET_PCI_CLK_OFF_COMMAND) */
+	    || RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF)) {
+		AUTO_WAKEUP_STRUC AutoWakeupCfg;
+		AsicForceWakeup(pAd, TRUE);
+		AutoWakeupCfg.word = 0;
+		RTMP_IO_WRITE32(pAd, AUTO_WAKEUP_CFG, AutoWakeupCfg.word);
+		OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
+	}
+
+	if (ADHOC_ON(pAd)) {	/* Adhoc mode link down */
+		DBGPRINT(RT_DEBUG_TRACE, ("!!! LINK DOWN 1!!!\n"));
+
+
+		OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
+		OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED);
+		RTMP_IndicateMediaState(pAd, NdisMediaStateDisconnected);
+		pAd->ExtraInfo = GENERAL_LINK_DOWN;
+		BssTableDeleteEntry(&pAd->ScanTab, pAd->CommonCfg.Bssid,
+				    pAd->CommonCfg.Channel);
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("!!! MacTab.Size=%d !!!\n", pAd->MacTab.Size));
+	} else {		/* Infra structure mode */
+
+		DBGPRINT(RT_DEBUG_TRACE, ("!!! LINK DOWN 2!!!\n"));
+
+#ifdef QOS_DLS_SUPPORT
+		/* DLS tear down frame must be sent before link down */
+		/* send DLS-TEAR_DOWN message */
+		if (pAd->CommonCfg.bDLSCapable) {
+			/* tear down local dls table entry */
+			for (i = 0; i < MAX_NUM_OF_INIT_DLS_ENTRY; i++) {
+				if (pAd->StaCfg.DLSEntry[i].Valid
+				    && (pAd->StaCfg.DLSEntry[i].Status ==
+					DLS_FINISH)) {
+					pAd->StaCfg.DLSEntry[i].Status =
+					    DLS_NONE;
+					RTMPSendDLSTearDownFrame(pAd,
+								 pAd->StaCfg.
+								 DLSEntry[i].
+								 MacAddr);
+				}
+			}
+
+			/* tear down peer dls table entry */
+			for (i = MAX_NUM_OF_INIT_DLS_ENTRY;
+			     i < MAX_NUM_OF_DLS_ENTRY; i++) {
+				if (pAd->StaCfg.DLSEntry[i].Valid
+				    && (pAd->StaCfg.DLSEntry[i].Status ==
+					DLS_FINISH)) {
+					pAd->StaCfg.DLSEntry[i].Status =
+					    DLS_NONE;
+					RTMPSendDLSTearDownFrame(pAd,
+								 pAd->StaCfg.
+								 DLSEntry[i].
+								 MacAddr);
+				}
+			}
+		}
+#endif /* QOS_DLS_SUPPORT */
+
+
+
+		OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
+		OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED);
+
+
+		/* Saved last SSID for linkup comparison */
+		pAd->CommonCfg.LastSsidLen = pAd->CommonCfg.SsidLen;
+		NdisMoveMemory(pAd->CommonCfg.LastSsid, pAd->CommonCfg.Ssid,
+			       pAd->CommonCfg.LastSsidLen);
+		COPY_MAC_ADDR(pAd->CommonCfg.LastBssid, pAd->CommonCfg.Bssid);
+		if (pAd->MlmeAux.CurrReqIsFromNdis == TRUE) {
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("NDIS_STATUS_MEDIA_DISCONNECT Event A!\n"));
+			pAd->MlmeAux.CurrReqIsFromNdis = FALSE;
+		} else {
+			if ((pAd->StaCfg.PortSecured == WPA_802_1X_PORT_SECURED)
+			    || (pAd->StaCfg.AuthMode < Ndis802_11AuthModeWPA)) {
+				/* */
+				/* If disassociation request is from NDIS, then we don't need to delete BSSID from entry. */
+				/* Otherwise lost beacon or receive De-Authentication from AP, */
+				/* then we should delete BSSID from BssTable. */
+				/* If we don't delete from entry, roaming will fail. */
+				/* */
+				BssTableDeleteEntry(&pAd->ScanTab,
+						    pAd->CommonCfg.Bssid,
+						    pAd->CommonCfg.Channel);
+			}
+		}
+
+		/* restore back to - */
+		/*      1. long slot (20 us) or short slot (9 us) time */
+		/*      2. turn on/off RTS/CTS and/or CTS-to-self protection */
+		/*      3. short preamble */
+		OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_BG_PROTECTION_INUSED);
+
+#ifdef EXT_BUILD_CHANNEL_LIST
+		/* Country IE of the AP will be evaluated and will be used. */
+		if (pAd->StaCfg.IEEE80211dClientMode != Rt802_11_D_None) {
+			NdisMoveMemory(&pAd->CommonCfg.CountryCode[0],
+				       &pAd->StaCfg.StaOriCountryCode[0], 2);
+			pAd->CommonCfg.Geography = pAd->StaCfg.StaOriGeography;
+			BuildChannelListEx(pAd);
+		}
+#endif /* EXT_BUILD_CHANNEL_LIST */
+
+	}
+
+
+	for (i = 1; i < MAX_LEN_OF_MAC_TABLE; i++) {
+		if (IS_ENTRY_CLIENT(&pAd->MacTab.Content[i]))
+			MacTableDeleteEntry(pAd, pAd->MacTab.Content[i].Aid,
+					    pAd->MacTab.Content[i].Addr);
+	}
+
+	AsicSetSlotTime(pAd, TRUE);	/*FALSE); */
+	AsicSetEdcaParm(pAd, NULL);
+
+#ifdef LED_CONTROL_SUPPORT
+	/* Set LED */
+	RTMPSetLED(pAd, LED_LINK_DOWN);
+	pAd->LedCntl.LedIndicatorStrength = 0xF0;
+	RTMPSetSignalLED(pAd, -100);	/* Force signal strength Led to be turned off, firmware is not done it. */
+#endif /* LED_CONTROL_SUPPORT */
+
+		AsicDisableSync(pAd);
+
+	pAd->Mlme.PeriodicRound = 0;
+	pAd->Mlme.OneSecPeriodicRound = 0;
+
+#ifdef DOT11_N_SUPPORT
+	NdisZeroMemory(&pAd->MlmeAux.HtCapability, sizeof (HT_CAPABILITY_IE));
+	NdisZeroMemory(&pAd->MlmeAux.AddHtInfo, sizeof (ADD_HT_INFO_IE));
+	pAd->MlmeAux.HtCapabilityLen = 0;
+	pAd->MlmeAux.NewExtChannelOffset = 0xff;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("LinkDownCleanMlmeAux.ExtCapInfo!\n"));
+	NdisZeroMemory((PUCHAR) (&pAd->MlmeAux.ExtCapInfo),
+		       sizeof (EXT_CAP_INFO_ELEMENT));
+#endif /* DOT11_N_SUPPORT */
+
+	/* Reset WPA-PSK state. Only reset when supplicant enabled */
+	if (pAd->StaCfg.WpaState != SS_NOTUSE) {
+		pAd->StaCfg.WpaState = SS_START;
+		/* Clear Replay counter */
+		NdisZeroMemory(pAd->StaCfg.ReplayCounter, 8);
+
+#ifdef QOS_DLS_SUPPORT
+		if (pAd->CommonCfg.bDLSCapable)
+			NdisZeroMemory(pAd->StaCfg.DlsReplayCounter, 8);
+#endif /* QOS_DLS_SUPPORT */
+	}
+
+	/* */
+	/* if link down come from AP, we need to remove all WPA keys on WPA mode. */
+	/* otherwise will cause 4-way handshaking failed, since the WPA key not empty. */
+	/* */
+	if ((IsReqFromAP) && (pAd->StaCfg.AuthMode >= Ndis802_11AuthModeWPA)) {
+		/* Remove all WPA keys */
+		RTMPWPARemoveAllKeys(pAd);
+	}
+
+	/* 802.1x port control */
+#ifdef WPA_SUPPLICANT_SUPPORT
+	/* Prevent clear PortSecured here with static WEP */
+	/* NetworkManger set security policy first then set SSID to connect AP. */
+	if (pAd->StaCfg.WpaSupplicantUP &&
+	    (pAd->StaCfg.WepStatus == Ndis802_11WEPEnabled) &&
+	    (pAd->StaCfg.IEEE8021X == FALSE)) {
+		pAd->StaCfg.PortSecured = WPA_802_1X_PORT_SECURED;
+	} else
+#endif /* WPA_SUPPLICANT_SUPPORT */
+	{
+		pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
+		pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
+	}
+
+	NdisAcquireSpinLock(&pAd->MacTabLock);
+	NdisZeroMemory(&pAd->MacTab, sizeof (MAC_TABLE));
+	pAd->MacTab.Content[BSSID_WCID].PortSecured = pAd->StaCfg.PortSecured;
+	NdisReleaseSpinLock(&pAd->MacTabLock);
+
+	pAd->StaCfg.MicErrCnt = 0;
+
+	RTMP_IndicateMediaState(pAd, NdisMediaStateDisconnected);
+	/* Update extra information to link is up */
+	pAd->ExtraInfo = GENERAL_LINK_DOWN;
+
+	pAd->StaActive.SupportedPhyInfo.bHtEnable = FALSE;
+
+#ifdef RTMP_MAC_USB
+	pAd->bUsbTxBulkAggre = FALSE;
+#endif /* RTMP_MAC_USB */
+
+	/* Clean association information */
+	NdisZeroMemory(&pAd->StaCfg.AssocInfo,
+		       sizeof (NDIS_802_11_ASSOCIATION_INFORMATION));
+	pAd->StaCfg.AssocInfo.Length =
+	    sizeof (NDIS_802_11_ASSOCIATION_INFORMATION);
+	pAd->StaCfg.ReqVarIELen = 0;
+	pAd->StaCfg.ResVarIELen = 0;
+
+	/* */
+	/* Reset RSSI value after link down */
+	/* */
+	NdisZeroMemory((PUCHAR) (&pAd->StaCfg.RssiSample),
+		       sizeof (pAd->StaCfg.RssiSample));
+
+	/* Restore MlmeRate */
+	pAd->CommonCfg.MlmeRate = pAd->CommonCfg.BasicMlmeRate;
+	pAd->CommonCfg.RtsRate = pAd->CommonCfg.BasicMlmeRate;
+
+#ifdef DOT11_N_SUPPORT
+	/* */
+	/* After Link down, reset piggy-back setting in ASIC. Disable RDG. */
+	/* */
+	if (pAd->CommonCfg.BBPCurrentBW == BW_40) {
+		pAd->CommonCfg.BBPCurrentBW = BW_20;
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &ByteValue);
+		ByteValue &= (~0x18);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, ByteValue);
+	}
+#endif /* DOT11_N_SUPPORT */
+
+	{
+		/* Reset DAC */
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &ByteValue);
+		ByteValue &= (~0x18);
+
+		{
+			if (pAd->Antenna.field.TxPath >= 2) {
+				ByteValue |= 0x10;
+			}
+		}
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, ByteValue);
+	}
+
+	RTMPSetPiggyBack(pAd, FALSE);
+	OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_PIGGYBACK_INUSED);
+
+#ifdef DOT11_N_SUPPORT
+	pAd->CommonCfg.BACapability.word = pAd->CommonCfg.REGBACapability.word;
+#endif /* DOT11_N_SUPPORT */
+
+	/* Restore all settings in the following. */
+	AsicUpdateProtect(pAd, 0,
+			  (ALLN_SETPROTECT | CCKSETPROTECT | OFDMSETPROTECT),
+			  TRUE, FALSE);
+#ifdef DOT11_N_SUPPORT
+	AsicDisableRDG(pAd);
+#endif /* DOT11_N_SUPPORT */
+	pAd->CommonCfg.IOTestParm.bCurrentAtheros = FALSE;
+	pAd->CommonCfg.IOTestParm.bNowAtherosBurstOn = FALSE;
+
+#ifdef DOT11_N_SUPPORT
+#ifdef DOT11N_DRAFT3
+	OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SCAN_2040);
+	pAd->CommonCfg.BSSCoexist2040.word = 0;
+	TriEventInit(pAd);
+	for (i = 0; i < (pAd->ChannelListNum - 1); i++) {
+		pAd->ChannelList[i].bEffectedChannel = FALSE;
+	}
+#endif /* DOT11N_DRAFT3 */
+#endif /* DOT11_N_SUPPORT */
+
+	RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, 0x1fff);
+	RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS);
+/* Allow go to sleep after linkdown steps. */
+#ifdef  PCIE_PS_SUPPORT
+
+	RTMP_SET_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP);
+#endif /* PCIE_PS_SUPPORT */
+
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+#ifndef NATIVE_WPA_SUPPLICANT_SUPPORT
+	if (pAd->StaCfg.WpaSupplicantUP) {
+		/*send disassociate event to wpa_supplicant */
+		RtmpOSWrielessEventSend(pAd->net_dev, RT_WLAN_EVENT_CUSTOM,
+					RT_DISASSOC_EVENT_FLAG, NULL, NULL, 0);
+	}
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+#ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
+	RtmpOSWrielessEventSend(pAd->net_dev, RT_WLAN_EVENT_CGIWAP, -1, NULL,
+				NULL, 0);
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+
+#ifdef RT30xx
+	if ((IS_RT3071(pAd) || IS_RT3572(pAd) || IS_RT3593(pAd))
+	    && (pAd->Antenna.field.RxPath > 1 || pAd->Antenna.field.TxPath > 1)) {
+		RTMP_ASIC_MMPS_DISABLE(pAd);
+	}
+#endif /* RT30xx */
+
+	if (pAd->StaCfg.BssType != BSS_ADHOC)
+		pAd->StaCfg.bNotFirstScan = FALSE;
+	else
+		pAd->StaCfg.bAdhocCreator = FALSE;
+
+/*After change from one ap to another , we need to re-init rssi for AdjustTxPower  */
+	pAd->StaCfg.RssiSample.AvgRssi0	= -127;
+	pAd->StaCfg.RssiSample.AvgRssi1	= -127;
+	pAd->StaCfg.RssiSample.AvgRssi2	= -127;
+
+
+#ifdef RTMP_FREQ_CALIBRATION_SUPPORT
+	/*if (IS_RT3593(pAd)) */
+	RTMP_CHIP_ASIC_FREQ_CAL_STOP(pAd);	/* To stop the frequency calibration */
+#endif /* RTMP_FREQ_CALIBRATION_SUPPORT */
+}
+
+/*
+	==========================================================================
+	Description:
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+*/
+VOID IterateOnBssTab(
+	IN PRTMP_ADAPTER pAd)
+{
+	MLME_START_REQ_STRUCT StartReq;
+	MLME_JOIN_REQ_STRUCT JoinReq;
+	ULONG BssIdx;
+	BSS_ENTRY *pInBss = NULL;
+
+	/* Change the wepstatus to original wepstatus */
+	pAd->StaCfg.PairCipher = pAd->StaCfg.WepStatus;
+#ifdef WPA_SUPPLICANT_SUPPORT
+	if (pAd->StaCfg.WpaSupplicantUP == WPA_SUPPLICANT_DISABLE)
+#endif /* WPA_SUPPLICANT_SUPPORT */
+	pAd->StaCfg.GroupCipher = pAd->StaCfg.WepStatus;
+
+	BssIdx = pAd->MlmeAux.BssIdx;
+
+	if (pAd->StaCfg.BssType == BSS_ADHOC) {
+		if (BssIdx < pAd->MlmeAux.SsidBssTab.BssNr) {
+			pInBss = &pAd->MlmeAux.SsidBssTab.BssEntry[BssIdx];
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("CNTL - iterate BSS %ld of %d\n", BssIdx,
+				  pAd->MlmeAux.SsidBssTab.BssNr));
+			JoinParmFill(pAd, &JoinReq, BssIdx);
+			MlmeEnqueue(pAd, SYNC_STATE_MACHINE, MT2_MLME_JOIN_REQ,
+				    sizeof (MLME_JOIN_REQ_STRUCT), &JoinReq, 0);
+			pAd->Mlme.CntlMachine.CurrState = CNTL_WAIT_JOIN;
+			return;
+		}
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("CNTL - All BSS fail; start a new ADHOC (Ssid=%s)...\n",
+			  pAd->MlmeAux.Ssid));
+		StartParmFill(pAd, &StartReq, (PCHAR) pAd->MlmeAux.Ssid,
+			      pAd->MlmeAux.SsidLen);
+		MlmeEnqueue(pAd, SYNC_STATE_MACHINE, MT2_MLME_START_REQ,
+			    sizeof (MLME_START_REQ_STRUCT), &StartReq, 0);
+
+		pAd->Mlme.CntlMachine.CurrState = CNTL_WAIT_START;
+	} else if ((BssIdx < pAd->MlmeAux.SsidBssTab.BssNr) &&
+		   (pAd->StaCfg.BssType == BSS_INFRA)) {
+		pInBss = &pAd->MlmeAux.SsidBssTab.BssEntry[BssIdx];
+		/* Check cipher suite, AP must have more secured cipher than station setting */
+		/* Set the Pairwise and Group cipher to match the intended AP setting */
+		/* We can only connect to AP with less secured cipher setting */
+		if ((pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA)
+		    || (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPAPSK)) {
+			pAd->StaCfg.GroupCipher = pInBss->WPA.GroupCipher;
+
+			if (pAd->StaCfg.WepStatus == pInBss->WPA.PairCipher)
+				pAd->StaCfg.PairCipher = pInBss->WPA.PairCipher;
+			else if (pInBss->WPA.PairCipherAux !=
+				 Ndis802_11WEPDisabled)
+				pAd->StaCfg.PairCipher =
+				    pInBss->WPA.PairCipherAux;
+			else	/* There is no PairCipher Aux, downgrade our capability to TKIP */
+				pAd->StaCfg.PairCipher =
+				    Ndis802_11Encryption2Enabled;
+		} else if ((pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2)
+			   || (pAd->StaCfg.AuthMode ==
+			       Ndis802_11AuthModeWPA2PSK)) {
+			pAd->StaCfg.GroupCipher = pInBss->WPA2.GroupCipher;
+
+			if (pAd->StaCfg.WepStatus == pInBss->WPA2.PairCipher)
+				pAd->StaCfg.PairCipher =
+				    pInBss->WPA2.PairCipher;
+			else if (pInBss->WPA2.PairCipherAux !=
+				 Ndis802_11WEPDisabled)
+				pAd->StaCfg.PairCipher =
+				    pInBss->WPA2.PairCipherAux;
+			else	/* There is no PairCipher Aux, downgrade our capability to TKIP */
+				pAd->StaCfg.PairCipher =
+				    Ndis802_11Encryption2Enabled;
+
+			/* RSN capability */
+			pAd->StaCfg.RsnCapability = pInBss->WPA2.RsnCapability;
+		}
+
+		/* Set Mix cipher flag */
+		pAd->StaCfg.bMixCipher =
+		    (pAd->StaCfg.PairCipher ==
+		     pAd->StaCfg.GroupCipher) ? FALSE : TRUE;
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("CNTL - iterate BSS %ld of %d\n", BssIdx,
+			  pAd->MlmeAux.SsidBssTab.BssNr));
+		JoinParmFill(pAd, &JoinReq, BssIdx);
+		MlmeEnqueue(pAd, SYNC_STATE_MACHINE, MT2_MLME_JOIN_REQ,
+			    sizeof (MLME_JOIN_REQ_STRUCT), &JoinReq, 0);
+		pAd->Mlme.CntlMachine.CurrState = CNTL_WAIT_JOIN;
+	} else {		/* no more BSS */
+
+#ifdef DOT11_N_SUPPORT
+#endif /* DOT11_N_SUPPORT */
+		{
+			AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
+			AsicLockChannel(pAd, pAd->CommonCfg.Channel);
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("CNTL - All roaming failed, restore to channel %d, Total BSS[%02d]\n",
+				  pAd->CommonCfg.Channel, pAd->ScanTab.BssNr));
+		}
+
+		pAd->MlmeAux.SsidBssTab.BssNr = 0;
+		BssTableDeleteEntry(&pAd->ScanTab,
+				    pAd->MlmeAux.SsidBssTab.BssEntry[0].Bssid,
+				    pAd->MlmeAux.SsidBssTab.BssEntry[0].
+				    Channel);
+
+		pAd->Mlme.CntlMachine.CurrState = CNTL_IDLE;
+	}
+}
+
+/* for re-association only */
+/* IRQL = DISPATCH_LEVEL */
+VOID IterateOnBssTab2(
+	IN PRTMP_ADAPTER pAd)
+{
+	MLME_REASSOC_REQ_STRUCT ReassocReq;
+	ULONG BssIdx;
+	BSS_ENTRY *pBss;
+
+	BssIdx = pAd->MlmeAux.RoamIdx;
+	pBss = &pAd->MlmeAux.RoamTab.BssEntry[BssIdx];
+
+	if (BssIdx < pAd->MlmeAux.RoamTab.BssNr) {
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("CNTL - iterate BSS %ld of %d\n", BssIdx,
+			  pAd->MlmeAux.RoamTab.BssNr));
+
+		AsicSwitchChannel(pAd, pBss->Channel, FALSE);
+		AsicLockChannel(pAd, pBss->Channel);
+
+		/* reassociate message has the same structure as associate message */
+		AssocParmFill(pAd, &ReassocReq, pBss->Bssid,
+			      pBss->CapabilityInfo, ASSOC_TIMEOUT,
+			      pAd->StaCfg.DefaultListenCount);
+		MlmeEnqueue(pAd, ASSOC_STATE_MACHINE, MT2_MLME_REASSOC_REQ,
+			    sizeof (MLME_REASSOC_REQ_STRUCT), &ReassocReq, 0);
+
+		pAd->Mlme.CntlMachine.CurrState = CNTL_WAIT_REASSOC;
+	} else {		/* no more BSS */
+
+#ifdef DOT11_N_SUPPORT
+#endif /* DOT11_N_SUPPORT */
+		{
+			AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
+			AsicLockChannel(pAd, pAd->CommonCfg.Channel);
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("CNTL - All roaming failed, restore to channel %d, Total BSS[%02d]\n",
+				  pAd->CommonCfg.Channel, pAd->ScanTab.BssNr));
+		}
+
+		pAd->Mlme.CntlMachine.CurrState = CNTL_IDLE;
+	}
+}
+
+/*
+	==========================================================================
+	Description:
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+*/
+VOID JoinParmFill(
+	IN PRTMP_ADAPTER pAd,
+	IN OUT MLME_JOIN_REQ_STRUCT *JoinReq,
+	IN ULONG BssIdx)
+{
+	JoinReq->BssIdx = BssIdx;
+}
+
+/*
+	==========================================================================
+	Description:
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+*/
+VOID ScanParmFill(
+	IN PRTMP_ADAPTER pAd,
+	IN OUT MLME_SCAN_REQ_STRUCT *ScanReq,
+	IN STRING Ssid[],
+	IN UCHAR SsidLen,
+	IN UCHAR BssType,
+	IN UCHAR ScanType)
+{
+	NdisZeroMemory(ScanReq->Ssid, MAX_LEN_OF_SSID);
+	ScanReq->SsidLen = SsidLen;
+	NdisMoveMemory(ScanReq->Ssid, Ssid, SsidLen);
+	ScanReq->BssType = BssType;
+	ScanReq->ScanType = ScanType;
+}
+
+#ifdef QOS_DLS_SUPPORT
+/*
+	==========================================================================
+	Description:
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+*/
+VOID DlsParmFill(
+	IN PRTMP_ADAPTER pAd,
+	IN OUT MLME_DLS_REQ_STRUCT *pDlsReq,
+	IN PRT_802_11_DLS pDls,
+	IN USHORT reason)
+{
+	pDlsReq->pDLS = pDls;
+	pDlsReq->Reason = reason;
+}
+#endif /* QOS_DLS_SUPPORT */
+
+/*
+	==========================================================================
+	Description:
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+*/
+VOID StartParmFill(
+	IN PRTMP_ADAPTER pAd,
+	IN OUT MLME_START_REQ_STRUCT *StartReq,
+	IN CHAR Ssid[],
+	IN UCHAR SsidLen)
+{
+	ASSERT(SsidLen <= MAX_LEN_OF_SSID);
+	if (SsidLen > MAX_LEN_OF_SSID)
+		SsidLen = MAX_LEN_OF_SSID;
+	NdisMoveMemory(StartReq->Ssid, Ssid, SsidLen);
+	StartReq->SsidLen = SsidLen;
+}
+
+/*
+	==========================================================================
+	Description:
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+*/
+VOID AuthParmFill(
+	IN PRTMP_ADAPTER pAd,
+	IN OUT MLME_AUTH_REQ_STRUCT *AuthReq,
+	IN PUCHAR pAddr,
+	IN USHORT Alg)
+{
+	COPY_MAC_ADDR(AuthReq->Addr, pAddr);
+	AuthReq->Alg = Alg;
+	AuthReq->Timeout = AUTH_TIMEOUT;
+}
+
+/*
+	==========================================================================
+	Description:
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+ */
+
+#ifdef RTMP_MAC_USB
+
+VOID MlmeCntlConfirm(
+	IN PRTMP_ADAPTER pAd,
+	IN ULONG MsgType,
+	IN USHORT Msg)
+{
+	MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MsgType, sizeof (USHORT),
+		    &Msg, 0);
+}
+
+VOID ComposePsPoll(
+	IN PRTMP_ADAPTER pAd)
+{
+	PTXINFO_STRUC pTxInfo;
+	PTXWI_STRUC pTxWI;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("ComposePsPoll\n"));
+	NdisZeroMemory(&pAd->PsPollFrame, sizeof (PSPOLL_FRAME));
+
+	pAd->PsPollFrame.FC.PwrMgmt = 0;
+	pAd->PsPollFrame.FC.Type = BTYPE_CNTL;
+	pAd->PsPollFrame.FC.SubType = SUBTYPE_PS_POLL;
+	pAd->PsPollFrame.Aid = pAd->StaActive.Aid | 0xC000;
+	COPY_MAC_ADDR(pAd->PsPollFrame.Bssid, pAd->CommonCfg.Bssid);
+	COPY_MAC_ADDR(pAd->PsPollFrame.Ta, pAd->CurrentAddress);
+
+	RTMPZeroMemory(&pAd->PsPollContext.TransferBuffer->field.
+		       WirelessPacket[0], 100);
+	pTxInfo =
+	    (PTXINFO_STRUC) & pAd->PsPollContext.TransferBuffer->field.
+	    WirelessPacket[0];
+	RTMPWriteTxInfo(pAd, pTxInfo,
+			(USHORT) (sizeof (PSPOLL_FRAME) + TXWI_SIZE), TRUE,
+			EpToQueue[MGMTPIPEIDX], FALSE, FALSE);
+	pTxWI =
+	    (PTXWI_STRUC) & pAd->PsPollContext.TransferBuffer->field.
+	    WirelessPacket[TXINFO_SIZE];
+	RTMPWriteTxWI(pAd, pTxWI, FALSE, FALSE, FALSE, FALSE, TRUE, FALSE, 0,
+		      BSSID_WCID, (sizeof (PSPOLL_FRAME)), 0, 0,
+		      (UCHAR) pAd->CommonCfg.MlmeTransmit.field.MCS,
+		      IFS_BACKOFF, FALSE, &pAd->CommonCfg.MlmeTransmit);
+	RTMPMoveMemory(&pAd->PsPollContext.TransferBuffer->field.
+		       WirelessPacket[TXWI_SIZE + TXINFO_SIZE],
+		       &pAd->PsPollFrame, sizeof (PSPOLL_FRAME));
+	/* Append 4 extra zero bytes. */
+	pAd->PsPollContext.BulkOutSize =
+	    TXINFO_SIZE + TXWI_SIZE + sizeof (PSPOLL_FRAME) + 4;
+}
+
+/* IRQL = DISPATCH_LEVEL */
+VOID ComposeNullFrame(
+	IN PRTMP_ADAPTER pAd)
+{
+	PTXINFO_STRUC pTxInfo;
+	PTXWI_STRUC pTxWI;
+
+	NdisZeroMemory(&pAd->NullFrame, sizeof (HEADER_802_11));
+	pAd->NullFrame.FC.Type = BTYPE_DATA;
+	pAd->NullFrame.FC.SubType = SUBTYPE_NULL_FUNC;
+	pAd->NullFrame.FC.ToDs = 1;
+	COPY_MAC_ADDR(pAd->NullFrame.Addr1, pAd->CommonCfg.Bssid);
+	COPY_MAC_ADDR(pAd->NullFrame.Addr2, pAd->CurrentAddress);
+	COPY_MAC_ADDR(pAd->NullFrame.Addr3, pAd->CommonCfg.Bssid);
+	RTMPZeroMemory(&pAd->NullContext.TransferBuffer->field.
+		       WirelessPacket[0], 100);
+	pTxInfo =
+	    (PTXINFO_STRUC) & pAd->NullContext.TransferBuffer->field.
+	    WirelessPacket[0];
+	RTMPWriteTxInfo(pAd, pTxInfo,
+			(USHORT) (sizeof (HEADER_802_11) + TXWI_SIZE), TRUE,
+			EpToQueue[MGMTPIPEIDX], FALSE, FALSE);
+	pTxWI =
+	    (PTXWI_STRUC) & pAd->NullContext.TransferBuffer->field.
+	    WirelessPacket[TXINFO_SIZE];
+	RTMPWriteTxWI(pAd, pTxWI, FALSE, FALSE, FALSE, FALSE, TRUE, FALSE, 0,
+		      BSSID_WCID, (sizeof (HEADER_802_11)), 0, 0,
+		      (UCHAR) pAd->CommonCfg.MlmeTransmit.field.MCS,
+		      IFS_BACKOFF, FALSE, &pAd->CommonCfg.MlmeTransmit);
+	RTMPMoveMemory(&pAd->NullContext.TransferBuffer->field.
+		       WirelessPacket[TXWI_SIZE + TXINFO_SIZE], &pAd->NullFrame,
+		       sizeof (HEADER_802_11));
+	pAd->NullContext.BulkOutSize =
+	    TXINFO_SIZE + TXWI_SIZE + sizeof (pAd->NullFrame) + 4;
+}
+#endif /* RTMP_MAC_USB */
+
+/*
+	==========================================================================
+	Description:
+		Pre-build a BEACON frame in the shared memory
+
+	IRQL = PASSIVE_LEVEL
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+*/
+ULONG MakeIbssBeacon(
+	IN PRTMP_ADAPTER pAd)
+{
+	UCHAR DsLen = 1, IbssLen = 2;
+	UCHAR LocalErpIe[3] = { IE_ERP, 1, 0x04 };
+	HEADER_802_11 BcnHdr;
+	USHORT CapabilityInfo;
+	LARGE_INTEGER FakeTimestamp;
+	ULONG FrameLen = 0;
+	PTXWI_STRUC pTxWI = &pAd->BeaconTxWI;
+	UCHAR *pBeaconFrame = pAd->BeaconBuf;
+	BOOLEAN Privacy;
+	UCHAR SupRate[MAX_LEN_OF_SUPPORTED_RATES];
+	UCHAR SupRateLen = 0;
+	UCHAR ExtRate[MAX_LEN_OF_SUPPORTED_RATES];
+	UCHAR ExtRateLen = 0;
+
+	if ((pAd->CommonCfg.PhyMode == PHY_11B)
+	    && (pAd->CommonCfg.Channel <= 14)) {
+		SupRate[0] = 0x82;	/* 1 mbps */
+		SupRate[1] = 0x84;	/* 2 mbps */
+		SupRate[2] = 0x8b;	/* 5.5 mbps */
+		SupRate[3] = 0x96;	/* 11 mbps */
+		SupRateLen = 4;
+		ExtRateLen = 0;
+	} else if (pAd->CommonCfg.Channel > 14) {
+		SupRate[0] = 0x8C;	/* 6 mbps, in units of 0.5 Mbps, basic rate */
+		SupRate[1] = 0x12;	/* 9 mbps, in units of 0.5 Mbps */
+		SupRate[2] = 0x98;	/* 12 mbps, in units of 0.5 Mbps, basic rate */
+		SupRate[3] = 0x24;	/* 18 mbps, in units of 0.5 Mbps */
+		SupRate[4] = 0xb0;	/* 24 mbps, in units of 0.5 Mbps, basic rate */
+		SupRate[5] = 0x48;	/* 36 mbps, in units of 0.5 Mbps */
+		SupRate[6] = 0x60;	/* 48 mbps, in units of 0.5 Mbps */
+		SupRate[7] = 0x6c;	/* 54 mbps, in units of 0.5 Mbps */
+		SupRateLen = 8;
+		ExtRateLen = 0;
+
+		/* */
+		/* Also Update MlmeRate & RtsRate for G only & A only */
+		/* */
+		pAd->CommonCfg.MlmeRate = RATE_6;
+		pAd->CommonCfg.RtsRate = RATE_6;
+		pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
+		pAd->CommonCfg.MlmeTransmit.field.MCS =
+		    OfdmRateToRxwiMCS[pAd->CommonCfg.MlmeRate];
+		pAd->MacTab.Content[BSS0Mcast_WCID].HTPhyMode.field.MODE =
+		    MODE_OFDM;
+		pAd->MacTab.Content[BSS0Mcast_WCID].HTPhyMode.field.MCS =
+		    OfdmRateToRxwiMCS[pAd->CommonCfg.MlmeRate];
+	} else {
+		SupRate[0] = 0x82;	/* 1 mbps */
+		SupRate[1] = 0x84;	/* 2 mbps */
+		SupRate[2] = 0x8b;	/* 5.5 mbps */
+		SupRate[3] = 0x96;	/* 11 mbps */
+		SupRateLen = 4;
+
+		ExtRate[0] = 0x0C;	/* 6 mbps, in units of 0.5 Mbps, */
+		ExtRate[1] = 0x12;	/* 9 mbps, in units of 0.5 Mbps */
+		ExtRate[2] = 0x18;	/* 12 mbps, in units of 0.5 Mbps, */
+		ExtRate[3] = 0x24;	/* 18 mbps, in units of 0.5 Mbps */
+		ExtRate[4] = 0x30;	/* 24 mbps, in units of 0.5 Mbps, */
+		ExtRate[5] = 0x48;	/* 36 mbps, in units of 0.5 Mbps */
+		ExtRate[6] = 0x60;	/* 48 mbps, in units of 0.5 Mbps */
+		ExtRate[7] = 0x6c;	/* 54 mbps, in units of 0.5 Mbps */
+		ExtRateLen = 8;
+	}
+
+	pAd->StaActive.SupRateLen = SupRateLen;
+	NdisMoveMemory(pAd->StaActive.SupRate, SupRate, SupRateLen);
+	pAd->StaActive.ExtRateLen = ExtRateLen;
+	NdisMoveMemory(pAd->StaActive.ExtRate, ExtRate, ExtRateLen);
+
+	/* compose IBSS beacon frame */
+	MgtMacHeaderInit(pAd, &BcnHdr, SUBTYPE_BEACON, 0, BROADCAST_ADDR,
+			 pAd->CommonCfg.Bssid);
+	Privacy = (pAd->StaCfg.WepStatus == Ndis802_11Encryption1Enabled)
+	    || (pAd->StaCfg.WepStatus == Ndis802_11Encryption2Enabled)
+	    || (pAd->StaCfg.WepStatus == Ndis802_11Encryption3Enabled);
+	CapabilityInfo =
+	    CAP_GENERATE(0, 1, Privacy,
+			 (pAd->CommonCfg.TxPreamble == Rt802_11PreambleShort),
+			 0, 0);
+
+	MakeOutgoingFrame(pBeaconFrame, &FrameLen,
+			  sizeof (HEADER_802_11), &BcnHdr,
+			  TIMESTAMP_LEN, &FakeTimestamp,
+			  2, &pAd->CommonCfg.BeaconPeriod,
+			  2, &CapabilityInfo,
+			  1, &SsidIe,
+			  1, &pAd->CommonCfg.SsidLen,
+			  pAd->CommonCfg.SsidLen, pAd->CommonCfg.Ssid,
+			  1, &SupRateIe,
+			  1, &SupRateLen,
+			  SupRateLen, SupRate,
+			  1, &DsIe,
+			  1, &DsLen,
+			  1, &pAd->CommonCfg.Channel,
+			  1, &IbssIe,
+			  1, &IbssLen, 2, &pAd->StaActive.AtimWin, END_OF_ARGS);
+
+	/* add ERP_IE and EXT_RAE IE of in 802.11g */
+	if (ExtRateLen) {
+		ULONG tmp;
+
+		MakeOutgoingFrame(pBeaconFrame + FrameLen, &tmp,
+				  3, LocalErpIe,
+				  1, &ExtRateIe,
+				  1, &ExtRateLen,
+				  ExtRateLen, ExtRate, END_OF_ARGS);
+		FrameLen += tmp;
+	}
+
+	/* If adhoc secruity is set for WPA-None, append the cipher suite IE */
+	/* Modify by Eddy, support WPA2PSK in Adhoc mode */
+	if ((pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPANone)
+	    ) {
+		UCHAR RSNIe = IE_WPA;
+		ULONG tmp;
+
+		RTMPMakeRSNIE(pAd, pAd->StaCfg.AuthMode, pAd->StaCfg.WepStatus,
+			      BSS0);
+
+		MakeOutgoingFrame(pBeaconFrame + FrameLen, &tmp,
+				  1, &RSNIe,
+				  1, &pAd->StaCfg.RSNIE_Len,
+				  pAd->StaCfg.RSNIE_Len, pAd->StaCfg.RSN_IE,
+				  END_OF_ARGS);
+		FrameLen += tmp;
+	}
+
+#ifdef DOT11_N_SUPPORT
+	if ((pAd->CommonCfg.PhyMode >= PHY_11ABGN_MIXED)
+	    && (pAd->StaCfg.bAdhocN == TRUE)) {
+		ULONG TmpLen;
+		UCHAR HtLen, HtLen1;
+
+#ifdef RT_BIG_ENDIAN
+		HT_CAPABILITY_IE HtCapabilityTmp;
+		ADD_HT_INFO_IE addHTInfoTmp;
+		USHORT b2lTmp, b2lTmp2;
+#endif
+
+		/* add HT Capability IE */
+		HtLen = sizeof (pAd->CommonCfg.HtCapability);
+		HtLen1 = sizeof (pAd->CommonCfg.AddHTInfo);
+#ifndef RT_BIG_ENDIAN
+		MakeOutgoingFrame(pBeaconFrame + FrameLen, &TmpLen,
+				  1, &HtCapIe,
+				  1, &HtLen,
+				  HtLen, &pAd->CommonCfg.HtCapability,
+				  1, &AddHtInfoIe,
+				  1, &HtLen1,
+				  HtLen1, &pAd->CommonCfg.AddHTInfo,
+				  END_OF_ARGS);
+#else
+		NdisMoveMemory(&HtCapabilityTmp, &pAd->CommonCfg.HtCapability,
+			       HtLen);
+		*(USHORT *) (&HtCapabilityTmp.HtCapInfo) =
+		    SWAP16(*(USHORT *) (&HtCapabilityTmp.HtCapInfo));
+		*(USHORT *) (&HtCapabilityTmp.ExtHtCapInfo) =
+		    SWAP16(*(USHORT *) (&HtCapabilityTmp.ExtHtCapInfo));
+
+		NdisMoveMemory(&addHTInfoTmp, &pAd->CommonCfg.AddHTInfo,
+			       HtLen1);
+		*(USHORT *) (&addHTInfoTmp.AddHtInfo2) =
+		    SWAP16(*(USHORT *) (&addHTInfoTmp.AddHtInfo2));
+		*(USHORT *) (&addHTInfoTmp.AddHtInfo3) =
+		    SWAP16(*(USHORT *) (&addHTInfoTmp.AddHtInfo3));
+
+		MakeOutgoingFrame(pBeaconFrame + FrameLen, &TmpLen,
+				  1, &HtCapIe,
+				  1, &HtLen,
+				  HtLen, &HtCapabilityTmp,
+				  1, &AddHtInfoIe,
+				  1, &HtLen1,
+				  HtLen1, &addHTInfoTmp, END_OF_ARGS);
+#endif
+		FrameLen += TmpLen;
+	}
+#endif /* DOT11_N_SUPPORT */
+
+	/*beacon use reserved WCID 0xff */
+	if (pAd->CommonCfg.Channel > 14) {
+		RTMPWriteTxWI(pAd, pTxWI, FALSE, FALSE, TRUE, FALSE, FALSE,
+			      TRUE, 0, 0xff, FrameLen, PID_MGMT, PID_BEACON,
+			      RATE_1, IFS_HTTXOP, FALSE,
+			      &pAd->CommonCfg.MlmeTransmit);
+	} else {
+		/* Set to use 1Mbps for Adhoc beacon. */
+		HTTRANSMIT_SETTING Transmit;
+		Transmit.word = 0;
+		RTMPWriteTxWI(pAd, pTxWI, FALSE, FALSE, TRUE, FALSE, FALSE,
+			      TRUE, 0, 0xff, FrameLen, PID_MGMT, PID_BEACON,
+			      RATE_1, IFS_HTTXOP, FALSE, &Transmit);
+	}
+
+#ifdef RT_BIG_ENDIAN
+	RTMPFrameEndianChange(pAd, pBeaconFrame, DIR_WRITE, FALSE);
+	RTMPWIEndianChange((PUCHAR) pTxWI, TYPE_TXWI);
+#endif
+
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("MakeIbssBeacon (len=%ld), SupRateLen=%d, ExtRateLen=%d, Channel=%d, PhyMode=%d\n",
+		  FrameLen, SupRateLen, ExtRateLen, pAd->CommonCfg.Channel,
+		  pAd->CommonCfg.PhyMode));
+	return FrameLen;
+}
+
+VOID InitChannelRelatedValue(
+	IN PRTMP_ADAPTER pAd)
+{
+	UCHAR Value = 0;
+	UINT32 Data = 0;
+
+
+	pAd->CommonCfg.CentralChannel = pAd->MlmeAux.CentralChannel;
+	pAd->CommonCfg.Channel = pAd->MlmeAux.Channel;
+#ifdef DOT11_N_SUPPORT
+	/* Change to AP channel */
+	if ((pAd->CommonCfg.CentralChannel > pAd->CommonCfg.Channel)
+	    && (pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth == BW_40)) {
+		/* Must using 40MHz. */
+		pAd->CommonCfg.BBPCurrentBW = BW_40;
+		AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
+		AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
+
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
+		Value &= (~0x18);
+		Value |= 0x10;
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
+
+		/*  RX : control channel at lower */
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
+		Value &= (~0x20);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
+
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
+		Data &= 0xfffffffe;
+		RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
+
+		if (pAd->MACVersion == 0x28600100) {
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
+			DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n"));
+		}
+
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("!!!40MHz Lower !!! Control Channel at Below. Central = %d \n",
+			  pAd->CommonCfg.CentralChannel));
+	} else if ((pAd->CommonCfg.CentralChannel < pAd->CommonCfg.Channel)
+		   && (pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth ==
+		       BW_40)) {
+		/* Must using 40MHz. */
+		pAd->CommonCfg.BBPCurrentBW = BW_40;
+		AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
+		AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
+
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
+		Value &= (~0x18);
+		Value |= 0x10;
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
+
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
+		Data |= 0x1;
+		RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
+
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
+		Value |= (0x20);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
+
+		if (pAd->MACVersion == 0x28600100) {
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
+			DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n"));
+		}
+
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("!!! 40MHz Upper !!! Control Channel at UpperCentral = %d \n",
+			  pAd->CommonCfg.CentralChannel));
+	} else
+#endif /* DOT11_N_SUPPORT */
+	{
+		pAd->CommonCfg.BBPCurrentBW = BW_20;
+		pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel;
+		AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
+		AsicLockChannel(pAd, pAd->CommonCfg.Channel);
+
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
+		Value &= (~0x18);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
+
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
+		Data &= 0xfffffffe;
+		RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
+
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
+		Value &= (~0x20);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
+
+		if (pAd->MACVersion == 0x28600100) {
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x08);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x11);
+			DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n"));
+		}
+
+		DBGPRINT(RT_DEBUG_TRACE, ("!!! 20MHz !!! \n"));
+	}
+
+	RTMPSetAGCInitValue(pAd, pAd->CommonCfg.BBPCurrentBW);
+
+	/* */
+	/* Save BBP_R66 value, it will be used in RTUSBResumeMsduTransmission */
+	/* */
+	RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R66,
+				    &pAd->BbpTuning.R66CurrentValue);
+}
+
+/* IRQL = DISPATCH_LEVEL */
+VOID	MaintainBssTable(
+	IN  PRTMP_ADAPTER pAd,
+	IN OUT	BSS_TABLE *Tab,
+	IN  ULONG	MaxRxTimeDiff,
+	IN  UCHAR	MaxSameRxTimeCount)
+{
+	UCHAR	i, j;
+	UCHAR	total_bssNr = Tab->BssNr;
+	BOOLEAN	bDelEntry = FALSE;
+	ULONG	now_time = 0;
+
+	for (i = 0; i < total_bssNr; i++) 
+	{
+		PBSS_ENTRY	pBss = &Tab->BssEntry[i];
+
+		bDelEntry = FALSE;
+		if (pBss->LastBeaconRxTimeA != pBss->LastBeaconRxTime)
+		{
+			pBss->LastBeaconRxTimeA = pBss->LastBeaconRxTime;
+			pBss->SameRxTimeCount = 0;
+		}
+		else
+			pBss->SameRxTimeCount++;
+
+		NdisGetSystemUpTime(&now_time);
+		if (RTMP_TIME_AFTER(now_time, pBss->LastBeaconRxTime + (MaxRxTimeDiff * OS_HZ)))
+			bDelEntry = TRUE;		
+		else if (pBss->SameRxTimeCount > MaxSameRxTimeCount)
+			bDelEntry = TRUE;
+		
+		if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED)
+			&& NdisEqualMemory(pBss->Ssid, pAd->CommonCfg.Ssid, pAd->CommonCfg.SsidLen))
+			bDelEntry = FALSE;
+		
+		if (bDelEntry)
+		{
+			UCHAR *pOldAddr = NULL;
+			
+			for (j = i; j < total_bssNr - 1; j++)
+			{
+				pOldAddr = Tab->BssEntry[j].pVarIeFromProbRsp;
+				NdisMoveMemory(&(Tab->BssEntry[j]), &(Tab->BssEntry[j + 1]), sizeof(BSS_ENTRY));
+				if (pOldAddr)
+				{
+					RTMPZeroMemory(pOldAddr, MAX_VIE_LEN);
+					NdisMoveMemory(pOldAddr, 
+								   Tab->BssEntry[j + 1].pVarIeFromProbRsp, 
+								   Tab->BssEntry[j + 1].VarIeFromProbeRspLen);
+					Tab->BssEntry[j].pVarIeFromProbRsp = pOldAddr;
+				}
+			}
+
+			pOldAddr = Tab->BssEntry[total_bssNr - 1].pVarIeFromProbRsp;
+			NdisZeroMemory(&(Tab->BssEntry[total_bssNr - 1]), sizeof(BSS_ENTRY));
+			if (pOldAddr)
+			{
+				RTMPZeroMemory(pOldAddr, MAX_VIE_LEN);
+			}
+			
+			total_bssNr -= 1;
+		}
+	}
+	Tab->BssNr = total_bssNr;
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/sta/dls.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/sta/dls.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/sta/dls.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/sta/dls.c	2017-09-23 03:42:49.850675577 +0800
@@ -0,0 +1,2872 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+/*
+    ==========================================================================
+    Description:
+        dls state machine init, including state transition and timer init
+    Parameters:
+        Sm - pointer to the dls state machine
+    Note:
+        The state machine looks like this
+        
+                            DLS_IDLE
+    MT2_MLME_DLS_REQUEST   MlmeDlsReqAction
+    MT2_PEER_DLS_REQUEST   PeerDlsReqAction
+    MT2_PEER_DLS_RESPONSE  PeerDlsRspAction
+    MT2_MLME_DLS_TEARDOWN  MlmeTearDownAction
+    MT2_PEER_DLS_TEARDOWN  PeerTearDownAction
+        
+	IRQL = PASSIVE_LEVEL
+
+    ==========================================================================
+ */
+void DlsStateMachineInit(
+	IN PRTMP_ADAPTER pAd,
+	IN STATE_MACHINE *Sm,
+	OUT STATE_MACHINE_FUNC Trans[])
+{
+	UCHAR i;
+
+	StateMachineInit(Sm, (STATE_MACHINE_FUNC *) Trans, MAX_DLS_STATE,
+			 MAX_DLS_MSG, (STATE_MACHINE_FUNC) Drop, DLS_IDLE,
+			 DLS_MACHINE_BASE);
+
+	/* the first column */
+	StateMachineSetAction(Sm, DLS_IDLE, MT2_MLME_DLS_REQ,
+			      (STATE_MACHINE_FUNC) MlmeDlsReqAction);
+	StateMachineSetAction(Sm, DLS_IDLE, MT2_PEER_DLS_REQ,
+			      (STATE_MACHINE_FUNC) PeerDlsReqAction);
+	StateMachineSetAction(Sm, DLS_IDLE, MT2_PEER_DLS_RSP,
+			      (STATE_MACHINE_FUNC) PeerDlsRspAction);
+	StateMachineSetAction(Sm, DLS_IDLE, MT2_MLME_DLS_TEAR_DOWN,
+			      (STATE_MACHINE_FUNC) MlmeDlsTearDownAction);
+	StateMachineSetAction(Sm, DLS_IDLE, MT2_PEER_DLS_TEAR_DOWN,
+			      (STATE_MACHINE_FUNC) PeerDlsTearDownAction);
+
+	for (i = 0; i < MAX_NUM_OF_DLS_ENTRY; i++) {
+		pAd->StaCfg.DLSEntry[i].pAd = pAd;
+		RTMPInitTimer(pAd, &pAd->StaCfg.DLSEntry[i].Timer,
+			      GET_TIMER_FUNCTION(DlsTimeoutAction), pAd, FALSE);
+	}
+}
+
+/*
+    ==========================================================================
+    Description:
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+VOID MlmeDlsReqAction(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	PUCHAR pOutBuffer = NULL;
+	NDIS_STATUS NStatus;
+	ULONG FrameLen = 0;
+	HEADER_802_11 DlsReqHdr;
+	PRT_802_11_DLS pDLS = NULL;
+	UCHAR Category = CATEGORY_DLS;
+	UCHAR Action = ACTION_DLS_REQUEST;
+	ULONG tmp;
+	USHORT reason;
+	ULONG Timeout;
+	BOOLEAN TimerCancelled;
+
+	if (!MlmeDlsReqSanity(pAd, Elem->Msg, Elem->MsgLen, &pDLS, &reason))
+		return;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("DLS - MlmeDlsReqAction() \n"));
+
+	NStatus = MlmeAllocateMemory(pAd, &pOutBuffer);	/*Get an unused nonpaged memory */
+	if (NStatus != NDIS_STATUS_SUCCESS) {
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("DLS - MlmeDlsReqAction() allocate memory failed \n"));
+		return;
+	}
+
+	ActHeaderInit(pAd, &DlsReqHdr, pAd->CommonCfg.Bssid,
+		      pAd->CurrentAddress, pAd->CommonCfg.Bssid);
+
+	/* Build basic frame first */
+	MakeOutgoingFrame(pOutBuffer, &FrameLen,
+			  sizeof (HEADER_802_11), &DlsReqHdr,
+			  1, &Category,
+			  1, &Action,
+			  6, &pDLS->MacAddr,
+			  6, pAd->CurrentAddress,
+			  2, &pAd->StaActive.CapabilityInfo,
+			  2, &pDLS->TimeOut,
+			  1, &SupRateIe,
+			  1, &pAd->MlmeAux.SupRateLen,
+			  pAd->MlmeAux.SupRateLen, pAd->MlmeAux.SupRate,
+			  END_OF_ARGS);
+
+	if (pAd->MlmeAux.ExtRateLen != 0) {
+		MakeOutgoingFrame(pOutBuffer + FrameLen, &tmp,
+				  1, &ExtRateIe,
+				  1, &pAd->MlmeAux.ExtRateLen,
+				  pAd->MlmeAux.ExtRateLen, pAd->MlmeAux.ExtRate,
+				  END_OF_ARGS);
+		FrameLen += tmp;
+	}
+#ifdef DOT11_N_SUPPORT
+	if ((pAd->CommonCfg.PhyMode >= PHY_11ABGN_MIXED)) {
+		UCHAR HtLen;
+
+#ifdef RT_BIG_ENDIAN
+		HT_CAPABILITY_IE HtCapabilityTmp;
+#endif
+
+		/* add HT Capability IE */
+		HtLen = sizeof (HT_CAPABILITY_IE);
+#ifndef RT_BIG_ENDIAN
+		MakeOutgoingFrame(pOutBuffer + FrameLen, &tmp,
+				  1, &HtCapIe,
+				  1, &HtLen,
+				  HtLen, &pAd->CommonCfg.HtCapability,
+				  END_OF_ARGS);
+#else
+		NdisMoveMemory(&HtCapabilityTmp, &pAd->CommonCfg.HtCapability,
+			       HtLen);
+		*(USHORT *) (&HtCapabilityTmp.HtCapInfo) =
+		    SWAP16(*(USHORT *) (&HtCapabilityTmp.HtCapInfo));
+		*(USHORT *) (&HtCapabilityTmp.ExtHtCapInfo) =
+		    SWAP16(*(USHORT *) (&HtCapabilityTmp.ExtHtCapInfo));
+
+		MakeOutgoingFrame(pOutBuffer + FrameLen, &tmp,
+				  1, &HtCapIe,
+				  1, &HtLen,
+				  HtLen, &HtCapabilityTmp, END_OF_ARGS);
+#endif
+		FrameLen = FrameLen + tmp;
+	}
+#endif /* DOT11_N_SUPPORT */
+
+	RTMPCancelTimer(&pDLS->Timer, &TimerCancelled);
+	Timeout = DLS_TIMEOUT;
+	RTMPSetTimer(&pDLS->Timer, Timeout);
+
+	MiniportMMRequest(pAd, QID_AC_BE, pOutBuffer, FrameLen);
+	MlmeFreeMemory(pAd, pOutBuffer);
+}
+
+/*
+    ==========================================================================
+    Description:
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+VOID PeerDlsReqAction(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	PUCHAR pOutBuffer = NULL;
+	NDIS_STATUS NStatus;
+	ULONG FrameLen = 0;
+	USHORT StatusCode = MLME_SUCCESS;
+	HEADER_802_11 DlsRspHdr;
+	UCHAR Category = CATEGORY_DLS;
+	UCHAR Action = ACTION_DLS_RESPONSE;
+	ULONG tmp;
+	USHORT CapabilityInfo;
+	UCHAR DA[MAC_ADDR_LEN], SA[MAC_ADDR_LEN];
+	USHORT DLSTimeOut;
+	SHORT i;
+	ULONG Timeout;
+	BOOLEAN TimerCancelled;
+	PRT_802_11_DLS pDLS = NULL;
+	UCHAR MaxSupportedRateIn500Kbps = 0;
+	UCHAR SupportedRatesLen;
+	UCHAR SupportedRates[MAX_LEN_OF_SUPPORTED_RATES];
+	UCHAR HtCapabilityLen;
+	HT_CAPABILITY_IE HtCapability;
+
+	if (!PeerDlsReqSanity
+	    (pAd, Elem->Msg, Elem->MsgLen, DA, SA, &CapabilityInfo, &DLSTimeOut,
+	     &SupportedRatesLen, &SupportedRates[0], &HtCapabilityLen,
+	     &HtCapability))
+		return;
+
+	/* supported rates array may not be sorted. sort it and find the maximum rate */
+	for (i = 0; i < SupportedRatesLen; i++) {
+		if (MaxSupportedRateIn500Kbps < (SupportedRates[i] & 0x7f))
+			MaxSupportedRateIn500Kbps = SupportedRates[i] & 0x7f;
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("DLS - PeerDlsReqAction() from %02x:%02x:%02x:%02x:%02x:%02x\n",
+		  SA[0], SA[1], SA[2], SA[3], SA[4], SA[5]));
+
+	NStatus = MlmeAllocateMemory(pAd, &pOutBuffer);	/*Get an unused nonpaged memory */
+	if (NStatus != NDIS_STATUS_SUCCESS) {
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("DLS - PeerDlsReqAction() allocate memory failed \n"));
+		return;
+	}
+
+	if (!INFRA_ON(pAd)) {
+		StatusCode = MLME_REQUEST_DECLINED;
+	} else if (!pAd->CommonCfg.bWmmCapable) {
+		StatusCode = MLME_DEST_STA_IS_NOT_A_QSTA;
+	} else if (!pAd->CommonCfg.bDLSCapable) {
+		StatusCode = MLME_REQUEST_DECLINED;
+	} else {
+		/* find table to update parameters */
+		for (i = (MAX_NUM_OF_DLS_ENTRY - 1); i >= 0; i--) {
+			if (pAd->StaCfg.DLSEntry[i].Valid
+			    && MAC_ADDR_EQUAL(SA,
+					      pAd->StaCfg.DLSEntry[i].
+					      MacAddr)) {
+				if (pAd->StaCfg.AuthMode >=
+				    Ndis802_11AuthModeWPA)
+					pAd->StaCfg.DLSEntry[i].Status =
+					    DLS_WAIT_KEY;
+				else {
+					RTMPCancelTimer(&pAd->StaCfg.
+							DLSEntry[i].Timer,
+							&TimerCancelled);
+					pAd->StaCfg.DLSEntry[i].Status =
+					    DLS_FINISH;
+				}
+
+				pAd->StaCfg.DLSEntry[i].Sequence = 0;
+				pAd->StaCfg.DLSEntry[i].TimeOut = DLSTimeOut;
+				pAd->StaCfg.DLSEntry[i].CountDownTimer =
+				    DLSTimeOut;
+				if (HtCapabilityLen != 0)
+					pAd->StaCfg.DLSEntry[i].bHTCap = TRUE;
+				else
+					pAd->StaCfg.DLSEntry[i].bHTCap = FALSE;
+				pDLS = &pAd->StaCfg.DLSEntry[i];
+				break;
+			}
+		}
+
+		/* can not find in table, create a new one */
+		if (i < 0) {
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("DLS - PeerDlsReqAction() can not find same entry \n"));
+			for (i = (MAX_NUM_OF_DLS_ENTRY - 1);
+			     i >= MAX_NUM_OF_INIT_DLS_ENTRY; i--) {
+				if (!pAd->StaCfg.DLSEntry[i].Valid) {
+					MAC_TABLE_ENTRY *pEntry;
+					UCHAR MaxSupportedRate = RATE_11;
+
+					if (pAd->StaCfg.AuthMode >=
+					    Ndis802_11AuthModeWPA) {
+						pAd->StaCfg.DLSEntry[i].Status =
+						    DLS_WAIT_KEY;
+					} else {
+						RTMPCancelTimer(&pAd->StaCfg.
+								DLSEntry[i].
+								Timer,
+								&TimerCancelled);
+						pAd->StaCfg.DLSEntry[i].Status =
+						    DLS_FINISH;
+					}
+
+					pAd->StaCfg.DLSEntry[i].Sequence = 0;
+					pAd->StaCfg.DLSEntry[i].Valid = TRUE;
+					pAd->StaCfg.DLSEntry[i].TimeOut =
+					    DLSTimeOut;
+					pAd->StaCfg.DLSEntry[i].CountDownTimer =
+					    DLSTimeOut;
+					NdisMoveMemory(pAd->StaCfg.DLSEntry[i].
+						       MacAddr, SA,
+						       MAC_ADDR_LEN);
+					if (HtCapabilityLen != 0)
+						pAd->StaCfg.DLSEntry[i].bHTCap =
+						    TRUE;
+					else
+						pAd->StaCfg.DLSEntry[i].bHTCap =
+						    FALSE;
+					pDLS = &pAd->StaCfg.DLSEntry[i];
+					pEntry =
+					    MacTableInsertDlsEntry(pAd, SA, i);
+
+					switch (MaxSupportedRateIn500Kbps) {
+					case 108:
+						MaxSupportedRate = RATE_54;
+						break;
+					case 96:
+						MaxSupportedRate = RATE_48;
+						break;
+					case 72:
+						MaxSupportedRate = RATE_36;
+						break;
+					case 48:
+						MaxSupportedRate = RATE_24;
+						break;
+					case 36:
+						MaxSupportedRate = RATE_18;
+						break;
+					case 24:
+						MaxSupportedRate = RATE_12;
+						break;
+					case 18:
+						MaxSupportedRate = RATE_9;
+						break;
+					case 12:
+						MaxSupportedRate = RATE_6;
+						break;
+					case 22:
+						MaxSupportedRate = RATE_11;
+						break;
+					case 11:
+						MaxSupportedRate = RATE_5_5;
+						break;
+					case 4:
+						MaxSupportedRate = RATE_2;
+						break;
+					case 2:
+						MaxSupportedRate = RATE_1;
+						break;
+					default:
+						MaxSupportedRate = RATE_11;
+						break;
+					}
+
+					pEntry->MaxSupportedRate =
+					    min(pAd->CommonCfg.MaxTxRate,
+						MaxSupportedRate);
+
+					if (pEntry->MaxSupportedRate <
+					    RATE_FIRST_OFDM_RATE) {
+						pEntry->MaxHTPhyMode.field.
+						    MODE = MODE_CCK;
+						pEntry->MaxHTPhyMode.field.MCS =
+						    pEntry->MaxSupportedRate;
+						pEntry->MinHTPhyMode.field.
+						    MODE = MODE_CCK;
+						pEntry->MinHTPhyMode.field.MCS =
+						    pEntry->MaxSupportedRate;
+						pEntry->HTPhyMode.field.MODE =
+						    MODE_CCK;
+						pEntry->HTPhyMode.field.MCS =
+						    pEntry->MaxSupportedRate;
+					} else {
+						pEntry->MaxHTPhyMode.field.
+						    MODE = MODE_OFDM;
+						pEntry->MaxHTPhyMode.field.MCS =
+						    OfdmRateToRxwiMCS[pEntry->
+								      MaxSupportedRate];
+						pEntry->MinHTPhyMode.field.
+						    MODE = MODE_OFDM;
+						pEntry->MinHTPhyMode.field.MCS =
+						    OfdmRateToRxwiMCS[pEntry->
+								      MaxSupportedRate];
+						pEntry->HTPhyMode.field.MODE =
+						    MODE_OFDM;
+						pEntry->HTPhyMode.field.MCS =
+						    OfdmRateToRxwiMCS[pEntry->
+								      MaxSupportedRate];
+					}
+
+					pEntry->MaxHTPhyMode.field.BW = BW_20;
+					pEntry->MinHTPhyMode.field.BW = BW_20;
+
+#ifdef DOT11_N_SUPPORT
+					pEntry->HTCapability.MCSSet[0] = 0;
+					pEntry->HTCapability.MCSSet[1] = 0;
+
+					/* If this Entry supports 802.11n, upgrade to HT rate. */
+					if ((HtCapabilityLen != 0)
+					    && (pAd->CommonCfg.PhyMode >=
+						PHY_11ABGN_MIXED)) {
+						UCHAR j, bitmask;	/*k,bitmask; */
+						CHAR ii;
+
+						DBGPRINT(RT_DEBUG_TRACE,
+							 ("DLS - PeerDlsReqAction() Receive Peer HT Capable STA from %02x:%02x:%02x:%02x:%02x:%02x\n",
+							  SA[0], SA[1], SA[2],
+							  SA[3], SA[4], SA[5]));
+
+						if ((HtCapability.HtCapInfo.GF)
+						    && (pAd->CommonCfg.
+							DesiredHtPhy.GF)) {
+							pEntry->MaxHTPhyMode.
+							    field.MODE =
+							    MODE_HTGREENFIELD;
+						} else {
+							pEntry->MaxHTPhyMode.
+							    field.MODE =
+							    MODE_HTMIX;
+							pAd->MacTab.
+							    fAnyStationNonGF =
+							    TRUE;
+							pAd->CommonCfg.
+							    AddHTInfo.
+							    AddHtInfo2.
+							    NonGfPresent = 1;
+						}
+
+						if ((HtCapability.HtCapInfo.
+						     ChannelWidth)
+						    && (pAd->CommonCfg.
+							DesiredHtPhy.
+							ChannelWidth)) {
+							pEntry->MaxHTPhyMode.
+							    field.BW = BW_40;
+							pEntry->MaxHTPhyMode.
+							    field.ShortGI =
+							    ((pAd->CommonCfg.
+							      DesiredHtPhy.
+							      ShortGIfor40) &
+							     (HtCapability.
+							      HtCapInfo.
+							      ShortGIfor40));
+						} else {
+							pEntry->MaxHTPhyMode.
+							    field.BW = BW_20;
+							pEntry->MaxHTPhyMode.
+							    field.ShortGI =
+							    ((pAd->CommonCfg.
+							      DesiredHtPhy.
+							      ShortGIfor20) &
+							     (HtCapability.
+							      HtCapInfo.
+							      ShortGIfor20));
+							pAd->MacTab.
+							    fAnyStation20Only =
+							    TRUE;
+						}
+
+						/* find max fixed rate */
+						for (ii = 15; ii >= 0; ii--) {
+							j = ii / 8;
+							bitmask =
+							    (1 <<
+							     (ii - (j * 8)));
+							if ((pAd->StaCfg.
+							     DesiredHtPhyInfo.
+							     MCSSet[j] &
+							     bitmask)
+							    && (HtCapability.
+								MCSSet[j] &
+								bitmask)) {
+								pEntry->
+								    MaxHTPhyMode.
+								    field.MCS =
+								    ii;
+								break;
+							}
+							if (ii == 0)
+								break;
+						}
+
+						if (pAd->StaCfg.
+						    DesiredTransmitSetting.
+						    field.MCS != MCS_AUTO) {
+
+							DBGPRINT(RT_DEBUG_OFF,
+								 ("@@@ pAd->CommonCfg.RegTransmitSetting.field.MCS = %d\n",
+								  pAd->StaCfg.
+								  DesiredTransmitSetting.
+								  field.MCS));
+							if (pAd->StaCfg.
+							    DesiredTransmitSetting.
+							    field.MCS == 32) {
+								/* Fix MCS as HT Duplicated Mode */
+								pEntry->
+								    MaxHTPhyMode.
+								    field.BW =
+								    1;
+								pEntry->
+								    MaxHTPhyMode.
+								    field.MODE =
+								    MODE_HTMIX;
+								pEntry->
+								    MaxHTPhyMode.
+								    field.STBC =
+								    0;
+								pEntry->
+								    MaxHTPhyMode.
+								    field.
+								    ShortGI = 0;
+								pEntry->
+								    MaxHTPhyMode.
+								    field.MCS =
+								    32;
+							} else if (pEntry->
+								   MaxHTPhyMode.
+								   field.MCS >
+								   pAd->StaCfg.
+								   HTPhyMode.
+								   field.MCS) {
+								/* STA supports fixed MCS */
+								pEntry->
+								    MaxHTPhyMode.
+								    field.MCS =
+								    pAd->StaCfg.
+								    HTPhyMode.
+								    field.MCS;
+							}
+						}
+
+						pEntry->MaxHTPhyMode.field.
+						    STBC =
+						    (HtCapability.HtCapInfo.
+						     RxSTBC & (pAd->CommonCfg.
+							       DesiredHtPhy.
+							       TxSTBC));
+						pEntry->MpduDensity =
+						    HtCapability.HtCapParm.
+						    MpduDensity;
+						pEntry->MaxRAmpduFactor =
+						    HtCapability.HtCapParm.
+						    MaxRAmpduFactor;
+						pEntry->MmpsMode =
+						    (UCHAR) HtCapability.
+						    HtCapInfo.MimoPs;
+						pEntry->AMsduSize =
+						    (UCHAR) HtCapability.
+						    HtCapInfo.AMsduSize;
+						pEntry->HTPhyMode.word =
+						    pEntry->MaxHTPhyMode.word;
+
+						if (HtCapability.HtCapInfo.
+						    ShortGIfor20)
+							CLIENT_STATUS_SET_FLAG
+							    (pEntry,
+							     fCLIENT_STATUS_SGI20_CAPABLE);
+						if (HtCapability.HtCapInfo.
+						    ShortGIfor40)
+							CLIENT_STATUS_SET_FLAG
+							    (pEntry,
+							     fCLIENT_STATUS_SGI40_CAPABLE);
+						if (HtCapability.HtCapInfo.
+						    TxSTBC)
+							CLIENT_STATUS_SET_FLAG
+							    (pEntry,
+							     fCLIENT_STATUS_TxSTBC_CAPABLE);
+						if (HtCapability.HtCapInfo.
+						    RxSTBC)
+							CLIENT_STATUS_SET_FLAG
+							    (pEntry,
+							     fCLIENT_STATUS_RxSTBC_CAPABLE);
+						if (HtCapability.ExtHtCapInfo.
+						    PlusHTC)
+							CLIENT_STATUS_SET_FLAG
+							    (pEntry,
+							     fCLIENT_STATUS_HTC_CAPABLE);
+						if (pAd->CommonCfg.bRdg
+						    && HtCapability.
+						    ExtHtCapInfo.RDGSupport)
+							CLIENT_STATUS_SET_FLAG
+							    (pEntry,
+							     fCLIENT_STATUS_RDG_CAPABLE);
+						if (HtCapability.ExtHtCapInfo.
+						    MCSFeedback == 0x03)
+							CLIENT_STATUS_SET_FLAG
+							    (pEntry,
+							     fCLIENT_STATUS_MCSFEEDBACK_CAPABLE);
+
+						NdisMoveMemory(&pEntry->
+							       HTCapability,
+							       &HtCapability,
+							       sizeof
+							       (HT_CAPABILITY_IE));
+					}
+#endif /* DOT11_N_SUPPORT */
+
+					pEntry->HTPhyMode.word =
+					    pEntry->MaxHTPhyMode.word;
+					pEntry->CurrTxRate =
+					    pEntry->MaxSupportedRate;
+					CLIENT_STATUS_SET_FLAG(pEntry,
+							       fCLIENT_STATUS_WMM_CAPABLE);
+
+					if (pAd->StaCfg.bAutoTxRateSwitch ==
+					    TRUE) {
+						PUCHAR pTable;
+						UCHAR TableSize = 0;
+
+						MlmeSelectTxRateTable(pAd,
+								      pEntry,
+								      &pTable,
+								      &TableSize,
+								      &pEntry->
+								      CurrTxRateIndex);
+						pEntry->bAutoTxRateSwitch =
+						    TRUE;
+					} else {
+						pEntry->HTPhyMode.field.MODE =
+						    pAd->StaCfg.HTPhyMode.field.
+						    MODE;
+						pEntry->HTPhyMode.field.MCS =
+						    pAd->StaCfg.HTPhyMode.field.
+						    MCS;
+						pEntry->bAutoTxRateSwitch =
+						    FALSE;
+
+						RTMPUpdateLegacyTxSetting((UCHAR) pAd->StaCfg.DesiredTransmitSetting.field.FixedTxMode, pEntry);
+					}
+					pEntry->RateLen = SupportedRatesLen;
+
+					break;
+				}
+			}
+		}
+		StatusCode = MLME_SUCCESS;
+
+		/* can not find in table, create a new one */
+		if (i < 0) {
+			StatusCode = MLME_QOS_UNSPECIFY;
+			DBGPRINT(RT_DEBUG_ERROR,
+				 ("DLS - PeerDlsReqAction() DLSEntry table full(only can support %d DLS session) \n",
+				  MAX_NUM_OF_DLS_ENTRY -
+				  MAX_NUM_OF_INIT_DLS_ENTRY));
+		} else {
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("DLS - PeerDlsReqAction() use entry(%d) %02x:%02x:%02x:%02x:%02x:%02x\n",
+				  i, SA[0], SA[1], SA[2], SA[3], SA[4], SA[5]));
+		}
+	}
+
+	ActHeaderInit(pAd, &DlsRspHdr, pAd->CommonCfg.Bssid,
+		      pAd->CurrentAddress, pAd->CommonCfg.Bssid);
+
+	/* Build basic frame first */
+	if (StatusCode == MLME_SUCCESS) {
+		MakeOutgoingFrame(pOutBuffer, &FrameLen,
+				  sizeof (HEADER_802_11), &DlsRspHdr,
+				  1, &Category,
+				  1, &Action,
+				  2, &StatusCode,
+				  6, SA,
+				  6, pAd->CurrentAddress,
+				  2, &pAd->StaActive.CapabilityInfo,
+				  1, &SupRateIe,
+				  1, &pAd->MlmeAux.SupRateLen,
+				  pAd->MlmeAux.SupRateLen, pAd->MlmeAux.SupRate,
+				  END_OF_ARGS);
+
+		if (pAd->MlmeAux.ExtRateLen != 0) {
+			MakeOutgoingFrame(pOutBuffer + FrameLen, &tmp,
+					  1, &ExtRateIe,
+					  1, &pAd->MlmeAux.ExtRateLen,
+					  pAd->MlmeAux.ExtRateLen,
+					  pAd->MlmeAux.ExtRate, END_OF_ARGS);
+			FrameLen += tmp;
+		}
+#ifdef DOT11_N_SUPPORT
+		if ((pAd->CommonCfg.PhyMode >= PHY_11ABGN_MIXED)) {
+			UCHAR HtLen;
+
+#ifdef RT_BIG_ENDIAN
+			HT_CAPABILITY_IE HtCapabilityTmp;
+#endif
+
+			/* add HT Capability IE */
+			HtLen = sizeof (HT_CAPABILITY_IE);
+#ifndef RT_BIG_ENDIAN
+			MakeOutgoingFrame(pOutBuffer + FrameLen, &tmp,
+					  1, &HtCapIe,
+					  1, &HtLen,
+					  HtLen, &pAd->CommonCfg.HtCapability,
+					  END_OF_ARGS);
+#else
+			NdisMoveMemory(&HtCapabilityTmp,
+				       &pAd->CommonCfg.HtCapability, HtLen);
+			*(USHORT *) (&HtCapabilityTmp.HtCapInfo) =
+			    SWAP16(*(USHORT *) (&HtCapabilityTmp.HtCapInfo));
+			*(USHORT *) (&HtCapabilityTmp.ExtHtCapInfo) =
+			    SWAP16(*(USHORT *) (&HtCapabilityTmp.ExtHtCapInfo));
+
+			MakeOutgoingFrame(pOutBuffer + FrameLen, &tmp,
+					  1, &HtCapIe,
+					  1, &HtLen,
+					  HtLen, &HtCapabilityTmp, END_OF_ARGS);
+#endif
+			FrameLen = FrameLen + tmp;
+		}
+#endif /* DOT11_N_SUPPORT */
+
+		if (pDLS && (pDLS->Status != DLS_FINISH)) {
+			RTMPCancelTimer(&pDLS->Timer, &TimerCancelled);
+			Timeout = DLS_TIMEOUT;
+			RTMPSetTimer(&pDLS->Timer, Timeout);
+		}
+	} else {
+		MakeOutgoingFrame(pOutBuffer, &FrameLen,
+				  sizeof (HEADER_802_11), &DlsRspHdr,
+				  1, &Category,
+				  1, &Action,
+				  2, &StatusCode,
+				  6, SA, 6, pAd->CurrentAddress, END_OF_ARGS);
+	}
+
+	MiniportMMRequest(pAd, QID_AC_BE, pOutBuffer, FrameLen);
+	MlmeFreeMemory(pAd, pOutBuffer);
+}
+
+/*
+    ==========================================================================
+    Description:
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+VOID PeerDlsRspAction(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	USHORT CapabilityInfo;
+	UCHAR DA[MAC_ADDR_LEN], SA[MAC_ADDR_LEN];
+	USHORT StatusCode;
+	SHORT i;
+	BOOLEAN TimerCancelled;
+	UCHAR MaxSupportedRateIn500Kbps = 0;
+	UCHAR SupportedRatesLen;
+	UCHAR SupportedRates[MAX_LEN_OF_SUPPORTED_RATES];
+	UCHAR HtCapabilityLen;
+	HT_CAPABILITY_IE HtCapability;
+
+	if (!pAd->CommonCfg.bDLSCapable)
+		return;
+
+	if (!INFRA_ON(pAd))
+		return;
+
+	if (!PeerDlsRspSanity
+	    (pAd, Elem->Msg, Elem->MsgLen, DA, SA, &CapabilityInfo, &StatusCode,
+	     &SupportedRatesLen, &SupportedRates[0], &HtCapabilityLen,
+	     &HtCapability))
+		return;
+
+	/* supported rates array may not be sorted. sort it and find the maximum rate */
+	for (i = 0; i < SupportedRatesLen; i++) {
+		if (MaxSupportedRateIn500Kbps < (SupportedRates[i] & 0x7f))
+			MaxSupportedRateIn500Kbps = SupportedRates[i] & 0x7f;
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("DLS - PeerDlsRspAction() from %02x:%02x:%02x:%02x:%02x:%02x with StatusCode=%d, CapabilityInfo=0x%x\n",
+		  SA[0], SA[1], SA[2], SA[3], SA[4], SA[5], StatusCode,
+		  CapabilityInfo));
+
+	for (i = 0; i < MAX_NUM_OF_INIT_DLS_ENTRY; i++) {
+		if (pAd->StaCfg.DLSEntry[i].Valid
+		    && MAC_ADDR_EQUAL(SA, pAd->StaCfg.DLSEntry[i].MacAddr)) {
+			if (StatusCode == MLME_SUCCESS) {
+				MAC_TABLE_ENTRY *pEntry;
+				UCHAR MaxSupportedRate = RATE_11;
+
+				pEntry = MacTableInsertDlsEntry(pAd, SA, i);
+
+				switch (MaxSupportedRateIn500Kbps) {
+				case 108:
+					MaxSupportedRate = RATE_54;
+					break;
+				case 96:
+					MaxSupportedRate = RATE_48;
+					break;
+				case 72:
+					MaxSupportedRate = RATE_36;
+					break;
+				case 48:
+					MaxSupportedRate = RATE_24;
+					break;
+				case 36:
+					MaxSupportedRate = RATE_18;
+					break;
+				case 24:
+					MaxSupportedRate = RATE_12;
+					break;
+				case 18:
+					MaxSupportedRate = RATE_9;
+					break;
+				case 12:
+					MaxSupportedRate = RATE_6;
+					break;
+				case 22:
+					MaxSupportedRate = RATE_11;
+					break;
+				case 11:
+					MaxSupportedRate = RATE_5_5;
+					break;
+				case 4:
+					MaxSupportedRate = RATE_2;
+					break;
+				case 2:
+					MaxSupportedRate = RATE_1;
+					break;
+				default:
+					MaxSupportedRate = RATE_11;
+					break;
+				}
+
+				pEntry->MaxSupportedRate =
+				    min(pAd->CommonCfg.MaxTxRate,
+					MaxSupportedRate);
+
+				if (pEntry->MaxSupportedRate <
+				    RATE_FIRST_OFDM_RATE) {
+					pEntry->MaxHTPhyMode.field.MODE =
+					    MODE_CCK;
+					pEntry->MaxHTPhyMode.field.MCS =
+					    pEntry->MaxSupportedRate;
+					pEntry->MinHTPhyMode.field.MODE =
+					    MODE_CCK;
+					pEntry->MinHTPhyMode.field.MCS =
+					    pEntry->MaxSupportedRate;
+					pEntry->HTPhyMode.field.MODE = MODE_CCK;
+					pEntry->HTPhyMode.field.MCS =
+					    pEntry->MaxSupportedRate;
+				} else {
+					pEntry->MaxHTPhyMode.field.MODE =
+					    MODE_OFDM;
+					pEntry->MaxHTPhyMode.field.MCS =
+					    OfdmRateToRxwiMCS[pEntry->
+							      MaxSupportedRate];
+					pEntry->MinHTPhyMode.field.MODE =
+					    MODE_OFDM;
+					pEntry->MinHTPhyMode.field.MCS =
+					    OfdmRateToRxwiMCS[pEntry->
+							      MaxSupportedRate];
+					pEntry->HTPhyMode.field.MODE =
+					    MODE_OFDM;
+					pEntry->HTPhyMode.field.MCS =
+					    OfdmRateToRxwiMCS[pEntry->
+							      MaxSupportedRate];
+				}
+
+				pEntry->MaxHTPhyMode.field.BW = BW_20;
+				pEntry->MinHTPhyMode.field.BW = BW_20;
+
+#ifdef DOT11_N_SUPPORT
+				pEntry->HTCapability.MCSSet[0] = 0;
+				pEntry->HTCapability.MCSSet[1] = 0;
+
+				/* If this Entry supports 802.11n, upgrade to HT rate. */
+				if ((HtCapabilityLen != 0)
+				    && (pAd->CommonCfg.PhyMode >=
+					PHY_11ABGN_MIXED)) {
+					UCHAR j, bitmask;	/*k,bitmask; */
+					CHAR ii;
+
+					DBGPRINT(RT_DEBUG_OFF,
+						 ("DLS - PeerDlsRspAction Receive Peer HT Capable STA from %02x:%02x:%02x:%02x:%02x:%02x\n",
+						  SA[0], SA[1], SA[2], SA[3],
+						  SA[4], SA[5]));
+
+					if ((HtCapability.HtCapInfo.GF)
+					    && (pAd->CommonCfg.DesiredHtPhy.
+						GF)) {
+						pEntry->MaxHTPhyMode.field.
+						    MODE = MODE_HTGREENFIELD;
+					} else {
+						pEntry->MaxHTPhyMode.field.
+						    MODE = MODE_HTMIX;
+						pAd->MacTab.fAnyStationNonGF =
+						    TRUE;
+						pAd->CommonCfg.AddHTInfo.
+						    AddHtInfo2.NonGfPresent = 1;
+					}
+
+					if ((HtCapability.HtCapInfo.
+					     ChannelWidth)
+					    && (pAd->CommonCfg.DesiredHtPhy.
+						ChannelWidth)) {
+						pEntry->MaxHTPhyMode.field.BW =
+						    BW_40;
+						pEntry->MaxHTPhyMode.field.
+						    ShortGI =
+						    ((pAd->CommonCfg.
+						      DesiredHtPhy.
+						      ShortGIfor40) &
+						     (HtCapability.HtCapInfo.
+						      ShortGIfor40));
+					} else {
+						pEntry->MaxHTPhyMode.field.BW =
+						    BW_20;
+						pEntry->MaxHTPhyMode.field.
+						    ShortGI =
+						    ((pAd->CommonCfg.
+						      DesiredHtPhy.
+						      ShortGIfor20) &
+						     (HtCapability.HtCapInfo.
+						      ShortGIfor20));
+						pAd->MacTab.fAnyStation20Only =
+						    TRUE;
+					}
+
+					/* find max fixed rate */
+					for (ii = 15; ii >= 0; ii--) {
+						j = ii / 8;
+						bitmask = (1 << (ii - (j * 8)));
+						if ((pAd->StaCfg.
+						     DesiredHtPhyInfo.
+						     MCSSet[j] & bitmask)
+						    && (HtCapability.
+							MCSSet[j] & bitmask)) {
+							pEntry->MaxHTPhyMode.
+							    field.MCS = ii;
+							break;
+						}
+						if (ii == 0)
+							break;
+					}
+
+					if (pAd->StaCfg.DesiredTransmitSetting.
+					    field.MCS != MCS_AUTO) {
+						if (pAd->StaCfg.
+						    DesiredTransmitSetting.
+						    field.MCS == 32) {
+							/* Fix MCS as HT Duplicated Mode */
+							pEntry->MaxHTPhyMode.
+							    field.BW = 1;
+							pEntry->MaxHTPhyMode.
+							    field.MODE =
+							    MODE_HTMIX;
+							pEntry->MaxHTPhyMode.
+							    field.STBC = 0;
+							pEntry->MaxHTPhyMode.
+							    field.ShortGI = 0;
+							pEntry->MaxHTPhyMode.
+							    field.MCS = 32;
+						} else if (pEntry->MaxHTPhyMode.
+							   field.MCS >
+							   pAd->StaCfg.
+							   HTPhyMode.field.
+							   MCS) {
+							/* STA supports fixed MCS */
+							pEntry->MaxHTPhyMode.
+							    field.MCS =
+							    pAd->StaCfg.
+							    HTPhyMode.field.MCS;
+						}
+					}
+
+					pEntry->MaxHTPhyMode.field.STBC =
+					    (HtCapability.HtCapInfo.
+					     RxSTBC & (pAd->CommonCfg.
+						       DesiredHtPhy.TxSTBC));
+					pEntry->MpduDensity =
+					    HtCapability.HtCapParm.MpduDensity;
+					pEntry->MaxRAmpduFactor =
+					    HtCapability.HtCapParm.
+					    MaxRAmpduFactor;
+					pEntry->MmpsMode =
+					    (UCHAR) HtCapability.HtCapInfo.
+					    MimoPs;
+					pEntry->AMsduSize =
+					    (UCHAR) HtCapability.HtCapInfo.
+					    AMsduSize;
+					pEntry->HTPhyMode.word =
+					    pEntry->MaxHTPhyMode.word;
+
+					if (HtCapability.HtCapInfo.ShortGIfor20)
+						CLIENT_STATUS_SET_FLAG(pEntry,
+								       fCLIENT_STATUS_SGI20_CAPABLE);
+					if (HtCapability.HtCapInfo.ShortGIfor40)
+						CLIENT_STATUS_SET_FLAG(pEntry,
+								       fCLIENT_STATUS_SGI40_CAPABLE);
+					if (HtCapability.HtCapInfo.TxSTBC)
+						CLIENT_STATUS_SET_FLAG(pEntry,
+								       fCLIENT_STATUS_TxSTBC_CAPABLE);
+					if (HtCapability.HtCapInfo.RxSTBC)
+						CLIENT_STATUS_SET_FLAG(pEntry,
+								       fCLIENT_STATUS_RxSTBC_CAPABLE);
+					if (HtCapability.ExtHtCapInfo.PlusHTC)
+						CLIENT_STATUS_SET_FLAG(pEntry,
+								       fCLIENT_STATUS_HTC_CAPABLE);
+					if (pAd->CommonCfg.bRdg
+					    && HtCapability.ExtHtCapInfo.
+					    RDGSupport)
+						CLIENT_STATUS_SET_FLAG(pEntry,
+								       fCLIENT_STATUS_RDG_CAPABLE);
+					if (HtCapability.ExtHtCapInfo.
+					    MCSFeedback == 0x03)
+						CLIENT_STATUS_SET_FLAG(pEntry,
+								       fCLIENT_STATUS_MCSFEEDBACK_CAPABLE);
+
+					NdisMoveMemory(&pEntry->HTCapability,
+						       &HtCapability,
+						       sizeof
+						       (HT_CAPABILITY_IE));
+				}
+#endif /* DOT11_N_SUPPORT */
+				pEntry->HTPhyMode.word =
+				    pEntry->MaxHTPhyMode.word;
+				pEntry->CurrTxRate = pEntry->MaxSupportedRate;
+				CLIENT_STATUS_SET_FLAG(pEntry,
+						       fCLIENT_STATUS_WMM_CAPABLE);
+
+				if (pAd->StaCfg.bAutoTxRateSwitch == TRUE) {
+					PUCHAR pTable;
+					UCHAR TableSize = 0;
+
+					MlmeSelectTxRateTable(pAd, pEntry,
+							      &pTable,
+							      &TableSize,
+							      &pEntry->
+							      CurrTxRateIndex);
+					pEntry->bAutoTxRateSwitch = TRUE;
+				} else {
+					pEntry->HTPhyMode.field.MODE =
+					    pAd->StaCfg.HTPhyMode.field.MODE;
+					pEntry->HTPhyMode.field.MCS =
+					    pAd->StaCfg.HTPhyMode.field.MCS;
+					pEntry->bAutoTxRateSwitch = FALSE;
+
+					RTMPUpdateLegacyTxSetting((UCHAR) pAd->
+								  StaCfg.
+								  DesiredTransmitSetting.
+								  field.
+								  FixedTxMode,
+								  pEntry);
+				}
+				pEntry->RateLen = SupportedRatesLen;
+
+				if (pAd->StaCfg.AuthMode >=
+				    Ndis802_11AuthModeWPA) {
+					/* If support WPA or WPA2, start STAKey hand shake, */
+					/* If failed hand shake, just tear down peer DLS */
+					if (RTMPSendSTAKeyRequest
+					    (pAd,
+					     pAd->StaCfg.DLSEntry[i].MacAddr) !=
+					    NDIS_STATUS_SUCCESS) {
+						MLME_DLS_REQ_STRUCT MlmeDlsReq;
+						USHORT reason =
+						    REASON_QOS_CIPHER_NOT_SUPPORT;
+
+						DlsParmFill(pAd, &MlmeDlsReq,
+							    &pAd->StaCfg.
+							    DLSEntry[i],
+							    reason);
+						MlmeEnqueue(pAd,
+							    DLS_STATE_MACHINE,
+							    MT2_MLME_DLS_TEAR_DOWN,
+							    sizeof
+							    (MLME_DLS_REQ_STRUCT),
+							    &MlmeDlsReq, 0);
+						pAd->StaCfg.DLSEntry[i].Status =
+						    DLS_NONE;
+						pAd->StaCfg.DLSEntry[i].Valid =
+						    FALSE;
+						DBGPRINT(RT_DEBUG_ERROR,
+							 ("DLS - PeerDlsRspAction failed when call RTMPSendSTAKeyRequest \n"));
+					} else {
+						pAd->StaCfg.DLSEntry[i].Status =
+						    DLS_WAIT_KEY;
+						DBGPRINT(RT_DEBUG_TRACE,
+							 ("DLS - waiting for STAKey handshake procedure\n"));
+					}
+				} else {
+					RTMPCancelTimer(&pAd->StaCfg.
+							DLSEntry[i].Timer,
+							&TimerCancelled);
+					pAd->StaCfg.DLSEntry[i].Status =
+					    DLS_FINISH;
+					DBGPRINT(RT_DEBUG_TRACE,
+						 ("DLS - PeerDlsRspAction() from %02x:%02x:%02x:%02x:%02x:%02x Succeed with WEP or no security\n",
+						  SA[0], SA[1], SA[2], SA[3],
+						  SA[4], SA[5]));
+				}
+
+				/*initialize seq no for DLS frames. */
+				pAd->StaCfg.DLSEntry[i].Sequence = 0;
+				if (HtCapabilityLen != 0)
+					pAd->StaCfg.DLSEntry[i].bHTCap = TRUE;
+				else
+					pAd->StaCfg.DLSEntry[i].bHTCap = FALSE;
+			} else {
+				/* DLS setup procedure failed. */
+				pAd->StaCfg.DLSEntry[i].Status = DLS_NONE;
+				pAd->StaCfg.DLSEntry[i].Valid = FALSE;
+				RTMPCancelTimer(&pAd->StaCfg.DLSEntry[i].Timer,
+						&TimerCancelled);
+				DBGPRINT(RT_DEBUG_ERROR,
+					 ("DLS - PeerDlsRspAction failed with StatusCode=%d \n",
+					  StatusCode));
+			}
+		}
+	}
+
+	if (i >= MAX_NUM_OF_INIT_DLS_ENTRY) {
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("DLS - PeerDlsRspAction() update timeout value \n"));
+		for (i = (MAX_NUM_OF_DLS_ENTRY - 1);
+		     i >= MAX_NUM_OF_INIT_DLS_ENTRY; i--) {
+			if (pAd->StaCfg.DLSEntry[i].Valid
+			    && MAC_ADDR_EQUAL(SA,
+					      pAd->StaCfg.DLSEntry[i].
+					      MacAddr)) {
+				if (StatusCode == MLME_SUCCESS) {
+					MAC_TABLE_ENTRY *pEntry;
+					UCHAR MaxSupportedRate = RATE_11;
+
+					pEntry =
+					    MacTableInsertDlsEntry(pAd, SA, i);
+
+					switch (MaxSupportedRateIn500Kbps) {
+					case 108:
+						MaxSupportedRate = RATE_54;
+						break;
+					case 96:
+						MaxSupportedRate = RATE_48;
+						break;
+					case 72:
+						MaxSupportedRate = RATE_36;
+						break;
+					case 48:
+						MaxSupportedRate = RATE_24;
+						break;
+					case 36:
+						MaxSupportedRate = RATE_18;
+						break;
+					case 24:
+						MaxSupportedRate = RATE_12;
+						break;
+					case 18:
+						MaxSupportedRate = RATE_9;
+						break;
+					case 12:
+						MaxSupportedRate = RATE_6;
+						break;
+					case 22:
+						MaxSupportedRate = RATE_11;
+						break;
+					case 11:
+						MaxSupportedRate = RATE_5_5;
+						break;
+					case 4:
+						MaxSupportedRate = RATE_2;
+						break;
+					case 2:
+						MaxSupportedRate = RATE_1;
+						break;
+					default:
+						MaxSupportedRate = RATE_11;
+						break;
+					}
+
+					pEntry->MaxSupportedRate =
+					    min(pAd->CommonCfg.MaxTxRate,
+						MaxSupportedRate);
+
+					if (pEntry->MaxSupportedRate <
+					    RATE_FIRST_OFDM_RATE) {
+						pEntry->MaxHTPhyMode.field.
+						    MODE = MODE_CCK;
+						pEntry->MaxHTPhyMode.field.MCS =
+						    pEntry->MaxSupportedRate;
+						pEntry->MinHTPhyMode.field.
+						    MODE = MODE_CCK;
+						pEntry->MinHTPhyMode.field.MCS =
+						    pEntry->MaxSupportedRate;
+						pEntry->HTPhyMode.field.MODE =
+						    MODE_CCK;
+						pEntry->HTPhyMode.field.MCS =
+						    pEntry->MaxSupportedRate;
+					} else {
+						pEntry->MaxHTPhyMode.field.
+						    MODE = MODE_OFDM;
+						pEntry->MaxHTPhyMode.field.MCS =
+						    OfdmRateToRxwiMCS[pEntry->
+								      MaxSupportedRate];
+						pEntry->MinHTPhyMode.field.
+						    MODE = MODE_OFDM;
+						pEntry->MinHTPhyMode.field.MCS =
+						    OfdmRateToRxwiMCS[pEntry->
+								      MaxSupportedRate];
+						pEntry->HTPhyMode.field.MODE =
+						    MODE_OFDM;
+						pEntry->HTPhyMode.field.MCS =
+						    OfdmRateToRxwiMCS[pEntry->
+								      MaxSupportedRate];
+					}
+
+					pEntry->MaxHTPhyMode.field.BW = BW_20;
+					pEntry->MinHTPhyMode.field.BW = BW_20;
+
+#ifdef DOT11_N_SUPPORT
+					pEntry->HTCapability.MCSSet[0] = 0;
+					pEntry->HTCapability.MCSSet[1] = 0;
+
+					/* If this Entry supports 802.11n, upgrade to HT rate. */
+					if ((HtCapabilityLen != 0)
+					    && (pAd->CommonCfg.PhyMode >=
+						PHY_11ABGN_MIXED)) {
+						UCHAR j, bitmask;	/*k,bitmask; */
+						CHAR ii;
+
+						DBGPRINT(RT_DEBUG_TRACE,
+							 ("DLS - PeerDlsRspAction Receive Peer HT Capable STA from %02x:%02x:%02x:%02x:%02x:%02x\n",
+							  SA[0], SA[1], SA[2],
+							  SA[3], SA[4], SA[5]));
+
+						if ((HtCapability.HtCapInfo.GF)
+						    && (pAd->CommonCfg.
+							DesiredHtPhy.GF)) {
+							pEntry->MaxHTPhyMode.
+							    field.MODE =
+							    MODE_HTGREENFIELD;
+						} else {
+							pEntry->MaxHTPhyMode.
+							    field.MODE =
+							    MODE_HTMIX;
+							pAd->MacTab.
+							    fAnyStationNonGF =
+							    TRUE;
+							pAd->CommonCfg.
+							    AddHTInfo.
+							    AddHtInfo2.
+							    NonGfPresent = 1;
+						}
+
+						if ((HtCapability.HtCapInfo.
+						     ChannelWidth)
+						    && (pAd->CommonCfg.
+							DesiredHtPhy.
+							ChannelWidth)) {
+							pEntry->MaxHTPhyMode.
+							    field.BW = BW_40;
+							pEntry->MaxHTPhyMode.
+							    field.ShortGI =
+							    ((pAd->CommonCfg.
+							      DesiredHtPhy.
+							      ShortGIfor40) &
+							     (HtCapability.
+							      HtCapInfo.
+							      ShortGIfor40));
+						} else {
+							pEntry->MaxHTPhyMode.
+							    field.BW = BW_20;
+							pEntry->MaxHTPhyMode.
+							    field.ShortGI =
+							    ((pAd->CommonCfg.
+							      DesiredHtPhy.
+							      ShortGIfor20) &
+							     (HtCapability.
+							      HtCapInfo.
+							      ShortGIfor20));
+							pAd->MacTab.
+							    fAnyStation20Only =
+							    TRUE;
+						}
+
+						/* find max fixed rate */
+						for (ii = 15; ii >= 0; ii--) {
+							j = ii / 8;
+							bitmask =
+							    (1 <<
+							     (ii - (j * 8)));
+							if ((pAd->StaCfg.
+							     DesiredHtPhyInfo.
+							     MCSSet[j] &
+							     bitmask)
+							    && (HtCapability.
+								MCSSet[j] &
+								bitmask)) {
+								pEntry->
+								    MaxHTPhyMode.
+								    field.MCS =
+								    ii;
+								break;
+							}
+							if (ii == 0)
+								break;
+						}
+
+						if (pAd->StaCfg.
+						    DesiredTransmitSetting.
+						    field.MCS != MCS_AUTO) {
+							DBGPRINT(RT_DEBUG_OFF,
+								 ("@@@ pAd->CommonCfg.RegTransmitSetting.field.MCS = %d\n",
+								  pAd->StaCfg.
+								  DesiredTransmitSetting.
+								  field.MCS));
+							if (pAd->StaCfg.
+							    DesiredTransmitSetting.
+							    field.MCS == 32) {
+								/* Fix MCS as HT Duplicated Mode */
+								pEntry->
+								    MaxHTPhyMode.
+								    field.BW =
+								    1;
+								pEntry->
+								    MaxHTPhyMode.
+								    field.MODE =
+								    MODE_HTMIX;
+								pEntry->
+								    MaxHTPhyMode.
+								    field.STBC =
+								    0;
+								pEntry->
+								    MaxHTPhyMode.
+								    field.
+								    ShortGI = 0;
+								pEntry->
+								    MaxHTPhyMode.
+								    field.MCS =
+								    32;
+							} else if (pEntry->
+								   MaxHTPhyMode.
+								   field.MCS >
+								   pAd->StaCfg.
+								   HTPhyMode.
+								   field.MCS) {
+								/* STA supports fixed MCS */
+								pEntry->
+								    MaxHTPhyMode.
+								    field.MCS =
+								    pAd->StaCfg.
+								    HTPhyMode.
+								    field.MCS;
+							}
+						}
+
+						pEntry->MaxHTPhyMode.field.
+						    STBC =
+						    (HtCapability.HtCapInfo.
+						     RxSTBC & (pAd->CommonCfg.
+							       DesiredHtPhy.
+							       TxSTBC));
+						pEntry->MpduDensity =
+						    HtCapability.HtCapParm.
+						    MpduDensity;
+						pEntry->MaxRAmpduFactor =
+						    HtCapability.HtCapParm.
+						    MaxRAmpduFactor;
+						pEntry->MmpsMode =
+						    (UCHAR) HtCapability.
+						    HtCapInfo.MimoPs;
+						pEntry->AMsduSize =
+						    (UCHAR) HtCapability.
+						    HtCapInfo.AMsduSize;
+						pEntry->HTPhyMode.word =
+						    pEntry->MaxHTPhyMode.word;
+
+						if (HtCapability.HtCapInfo.
+						    ShortGIfor20)
+							CLIENT_STATUS_SET_FLAG
+							    (pEntry,
+							     fCLIENT_STATUS_SGI20_CAPABLE);
+						if (HtCapability.HtCapInfo.
+						    ShortGIfor40)
+							CLIENT_STATUS_SET_FLAG
+							    (pEntry,
+							     fCLIENT_STATUS_SGI40_CAPABLE);
+						if (HtCapability.HtCapInfo.
+						    TxSTBC)
+							CLIENT_STATUS_SET_FLAG
+							    (pEntry,
+							     fCLIENT_STATUS_TxSTBC_CAPABLE);
+						if (HtCapability.HtCapInfo.
+						    RxSTBC)
+							CLIENT_STATUS_SET_FLAG
+							    (pEntry,
+							     fCLIENT_STATUS_RxSTBC_CAPABLE);
+						if (HtCapability.ExtHtCapInfo.
+						    PlusHTC)
+							CLIENT_STATUS_SET_FLAG
+							    (pEntry,
+							     fCLIENT_STATUS_HTC_CAPABLE);
+						if (pAd->CommonCfg.bRdg
+						    && HtCapability.
+						    ExtHtCapInfo.RDGSupport)
+							CLIENT_STATUS_SET_FLAG
+							    (pEntry,
+							     fCLIENT_STATUS_RDG_CAPABLE);
+						if (HtCapability.ExtHtCapInfo.
+						    MCSFeedback == 0x03)
+							CLIENT_STATUS_SET_FLAG
+							    (pEntry,
+							     fCLIENT_STATUS_MCSFEEDBACK_CAPABLE);
+
+						NdisMoveMemory(&pEntry->
+							       HTCapability,
+							       &HtCapability,
+							       sizeof
+							       (HT_CAPABILITY_IE));
+					}
+#endif /* DOT11_N_SUPPORT */
+
+					pEntry->HTPhyMode.word =
+					    pEntry->MaxHTPhyMode.word;
+					pEntry->CurrTxRate =
+					    pEntry->MaxSupportedRate;
+					CLIENT_STATUS_SET_FLAG(pEntry,
+							       fCLIENT_STATUS_WMM_CAPABLE);
+
+					if (pAd->StaCfg.bAutoTxRateSwitch ==
+					    TRUE) {
+						PUCHAR pTable;
+						UCHAR TableSize = 0;
+
+						MlmeSelectTxRateTable(pAd,
+								      pEntry,
+								      &pTable,
+								      &TableSize,
+								      &pEntry->
+								      CurrTxRateIndex);
+						pEntry->bAutoTxRateSwitch =
+						    TRUE;
+					} else {
+						pEntry->HTPhyMode.field.MODE =
+						    pAd->StaCfg.HTPhyMode.field.
+						    MODE;
+						pEntry->HTPhyMode.field.MCS =
+						    pAd->StaCfg.HTPhyMode.field.
+						    MCS;
+						pEntry->bAutoTxRateSwitch =
+						    FALSE;
+
+						RTMPUpdateLegacyTxSetting((UCHAR) pAd->StaCfg.DesiredTransmitSetting.field.FixedTxMode, pEntry);
+					}
+					pEntry->RateLen = SupportedRatesLen;
+
+					if (pAd->StaCfg.AuthMode >=
+					    Ndis802_11AuthModeWPA) {
+						/* If support WPA or WPA2, start STAKey hand shake, */
+						/* If failed hand shake, just tear down peer DLS */
+						if (RTMPSendSTAKeyRequest
+						    (pAd,
+						     pAd->StaCfg.DLSEntry[i].
+						     MacAddr) !=
+						    NDIS_STATUS_SUCCESS) {
+							MLME_DLS_REQ_STRUCT
+							    MlmeDlsReq;
+							USHORT reason =
+							    REASON_QOS_CIPHER_NOT_SUPPORT;
+
+							DlsParmFill(pAd,
+								    &MlmeDlsReq,
+								    &pAd->
+								    StaCfg.
+								    DLSEntry[i],
+								    reason);
+							MlmeEnqueue(pAd,
+								    DLS_STATE_MACHINE,
+								    MT2_MLME_DLS_TEAR_DOWN,
+								    sizeof
+								    (MLME_DLS_REQ_STRUCT),
+								    &MlmeDlsReq,
+								    0);
+							pAd->StaCfg.DLSEntry[i].
+							    Status = DLS_NONE;
+							pAd->StaCfg.DLSEntry[i].
+							    Valid = FALSE;
+							DBGPRINT(RT_DEBUG_ERROR,
+								 ("DLS - PeerDlsRspAction failed when call RTMPSendSTAKeyRequest \n"));
+						} else {
+							pAd->StaCfg.DLSEntry[i].
+							    Status =
+							    DLS_WAIT_KEY;
+							DBGPRINT(RT_DEBUG_TRACE,
+								 ("DLS - waiting for STAKey handshake procedure\n"));
+						}
+					} else {
+						RTMPCancelTimer(&pAd->StaCfg.
+								DLSEntry[i].
+								Timer,
+								&TimerCancelled);
+						pAd->StaCfg.DLSEntry[i].Status =
+						    DLS_FINISH;
+						DBGPRINT(RT_DEBUG_TRACE,
+							 ("DLS - PeerDlsRspAction() from %02x:%02x:%02x:%02x:%02x:%02x Succeed with WEP or no security\n",
+							  SA[0], SA[1], SA[2],
+							  SA[3], SA[4], SA[5]));
+					}
+					pAd->StaCfg.DLSEntry[i].Sequence = 0;
+					if (HtCapabilityLen != 0)
+						pAd->StaCfg.DLSEntry[i].bHTCap =
+						    TRUE;
+					else
+						pAd->StaCfg.DLSEntry[i].bHTCap =
+						    FALSE;
+				} else {
+					/* DLS setup procedure failed. */
+					pAd->StaCfg.DLSEntry[i].Status =
+					    DLS_NONE;
+					pAd->StaCfg.DLSEntry[i].Valid = FALSE;
+					RTMPCancelTimer(&pAd->StaCfg.
+							DLSEntry[i].Timer,
+							&TimerCancelled);
+					DBGPRINT(RT_DEBUG_ERROR,
+						 ("DLS - PeerDlsRspAction failed with StatusCode=%d \n",
+						  StatusCode));
+				}
+			}
+		}
+	}
+}
+
+/*
+    ==========================================================================
+    Description:
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+VOID MlmeDlsTearDownAction(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	PUCHAR pOutBuffer = NULL;
+	NDIS_STATUS NStatus;
+	ULONG FrameLen = 0;
+	UCHAR Category = CATEGORY_DLS;
+	UCHAR Action = ACTION_DLS_TEARDOWN;
+	USHORT ReasonCode = REASON_QOS_UNSPECIFY;
+	HEADER_802_11 DlsTearDownHdr;
+	PRT_802_11_DLS pDLS;
+	BOOLEAN TimerCancelled;
+	UCHAR i;
+
+	if (!MlmeDlsReqSanity(pAd, Elem->Msg, Elem->MsgLen, &pDLS, &ReasonCode))
+		return;
+
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("DLS - MlmeDlsTearDownAction() with ReasonCode=%d \n",
+		  ReasonCode));
+
+	NStatus = MlmeAllocateMemory(pAd, &pOutBuffer);	/*Get an unused nonpaged memory */
+	if (NStatus != NDIS_STATUS_SUCCESS) {
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("DLS - MlmeDlsTearDownAction() allocate memory failed \n"));
+		return;
+	}
+
+	ActHeaderInit(pAd, &DlsTearDownHdr, pAd->CommonCfg.Bssid,
+		      pAd->CurrentAddress, pAd->CommonCfg.Bssid);
+
+	/* Build basic frame first */
+	MakeOutgoingFrame(pOutBuffer, &FrameLen,
+			  sizeof (HEADER_802_11), &DlsTearDownHdr,
+			  1, &Category,
+			  1, &Action,
+			  6, &pDLS->MacAddr,
+			  6, pAd->CurrentAddress, 2, &ReasonCode, END_OF_ARGS);
+
+	MiniportMMRequest(pAd, QID_AC_BE, pOutBuffer, FrameLen);
+	MlmeFreeMemory(pAd, pOutBuffer);
+	RTMPCancelTimer(&pDLS->Timer, &TimerCancelled);
+
+	/* Remove key in local dls table entry */
+	for (i = 0; i < MAX_NUM_OF_INIT_DLS_ENTRY; i++) {
+		if (MAC_ADDR_EQUAL
+		    (pDLS->MacAddr, pAd->StaCfg.DLSEntry[i].MacAddr)) {
+			MacTableDeleteDlsEntry(pAd,
+					       pAd->StaCfg.DLSEntry[i].
+					       MacTabMatchWCID,
+					       pAd->StaCfg.DLSEntry[i].MacAddr);
+		}
+	}
+
+	/* clear peer dls table entry */
+	for (i = MAX_NUM_OF_INIT_DLS_ENTRY; i < MAX_NUM_OF_DLS_ENTRY; i++) {
+		if (MAC_ADDR_EQUAL
+		    (pDLS->MacAddr, pAd->StaCfg.DLSEntry[i].MacAddr)) {
+			pAd->StaCfg.DLSEntry[i].Status = DLS_NONE;
+			pAd->StaCfg.DLSEntry[i].Valid = FALSE;
+			RTMPCancelTimer(&pAd->StaCfg.DLSEntry[i].Timer,
+					&TimerCancelled);
+			MacTableDeleteDlsEntry(pAd,
+					       pAd->StaCfg.DLSEntry[i].
+					       MacTabMatchWCID,
+					       pAd->StaCfg.DLSEntry[i].MacAddr);
+		}
+	}
+}
+
+/*
+    ==========================================================================
+    Description:
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+VOID PeerDlsTearDownAction(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	UCHAR DA[MAC_ADDR_LEN], SA[MAC_ADDR_LEN];
+	USHORT ReasonCode;
+	UINT i;
+	BOOLEAN TimerCancelled;
+
+	if (!pAd->CommonCfg.bDLSCapable)
+		return;
+
+	if (!INFRA_ON(pAd))
+		return;
+
+	if (!PeerDlsTearDownSanity
+	    (pAd, Elem->Msg, Elem->MsgLen, DA, SA, &ReasonCode))
+		return;
+
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("DLS - PeerDlsTearDownAction() from %02x:%02x:%02x:%02x:%02x:%02x with ReasonCode=%d\n",
+		  SA[0], SA[1], SA[2], SA[3], SA[4], SA[5], ReasonCode));
+
+	/* clear local dls table entry */
+	for (i = 0; i < MAX_NUM_OF_INIT_DLS_ENTRY; i++) {
+		if (pAd->StaCfg.DLSEntry[i].Valid
+		    && MAC_ADDR_EQUAL(SA, pAd->StaCfg.DLSEntry[i].MacAddr)) {
+			pAd->StaCfg.DLSEntry[i].Status = DLS_NONE;
+			pAd->StaCfg.DLSEntry[i].Valid = FALSE;
+			RTMPCancelTimer(&pAd->StaCfg.DLSEntry[i].Timer,
+					&TimerCancelled);
+			/*AsicDelWcidTab(pAd, pAd->StaCfg.DLSEntry[i].MacTabMatchWCID); */
+			/*AsicRemovePairwiseKeyEntry(pAd, pAd->StaCfg.DLSEntry[i].MacTabMatchWCID); */
+			MacTableDeleteDlsEntry(pAd,
+					       pAd->StaCfg.DLSEntry[i].
+					       MacTabMatchWCID,
+					       pAd->StaCfg.DLSEntry[i].MacAddr);
+		}
+	}
+
+	/* clear peer dls table entry */
+	for (i = MAX_NUM_OF_INIT_DLS_ENTRY; i < MAX_NUM_OF_DLS_ENTRY; i++) {
+		if (pAd->StaCfg.DLSEntry[i].Valid
+		    && MAC_ADDR_EQUAL(SA, pAd->StaCfg.DLSEntry[i].MacAddr)) {
+			pAd->StaCfg.DLSEntry[i].Status = DLS_NONE;
+			pAd->StaCfg.DLSEntry[i].Valid = FALSE;
+			RTMPCancelTimer(&pAd->StaCfg.DLSEntry[i].Timer,
+					&TimerCancelled);
+			/*AsicDelWcidTab(pAd, pAd->StaCfg.DLSEntry[i].MacTabMatchWCID); */
+			/*AsicRemovePairwiseKeyEntry(pAd, pAd->StaCfg.DLSEntry[i].MacTabMatchWCID); */
+			MacTableDeleteDlsEntry(pAd,
+					       pAd->StaCfg.DLSEntry[i].
+					       MacTabMatchWCID,
+					       pAd->StaCfg.DLSEntry[i].MacAddr);
+		}
+	}
+}
+
+/*
+    ==========================================================================
+    Description:
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+VOID RTMPCheckDLSTimeOut(
+	IN PRTMP_ADAPTER pAd)
+{
+	ULONG i;
+	MLME_DLS_REQ_STRUCT MlmeDlsReq;
+	USHORT reason = REASON_QOS_UNSPECIFY;
+
+	if (!pAd->CommonCfg.bDLSCapable)
+		return;
+
+	if (!INFRA_ON(pAd))
+		return;
+
+	/* If timeout value is equaled to zero, it means always not be timeout. */
+
+	/* update local dls table entry */
+	for (i = 0; i < MAX_NUM_OF_INIT_DLS_ENTRY; i++) {
+		if ((pAd->StaCfg.DLSEntry[i].Valid)
+		    && (pAd->StaCfg.DLSEntry[i].Status == DLS_FINISH)
+		    && (pAd->StaCfg.DLSEntry[i].TimeOut != 0)) {
+			pAd->StaCfg.DLSEntry[i].CountDownTimer--;
+
+			if (pAd->StaCfg.DLSEntry[i].CountDownTimer == 0) {
+				reason = REASON_QOS_REQUEST_TIMEOUT;
+				pAd->StaCfg.DLSEntry[i].Valid = FALSE;
+				pAd->StaCfg.DLSEntry[i].Status = DLS_NONE;
+				DlsParmFill(pAd, &MlmeDlsReq,
+					    &pAd->StaCfg.DLSEntry[i], reason);
+				MlmeEnqueue(pAd, DLS_STATE_MACHINE,
+					    MT2_MLME_DLS_TEAR_DOWN,
+					    sizeof (MLME_DLS_REQ_STRUCT),
+					    &MlmeDlsReq, 0);
+			}
+		}
+	}
+
+	/* update peer dls table entry */
+	for (i = MAX_NUM_OF_INIT_DLS_ENTRY; i < MAX_NUM_OF_DLS_ENTRY; i++) {
+		if ((pAd->StaCfg.DLSEntry[i].Valid)
+		    && (pAd->StaCfg.DLSEntry[i].Status == DLS_FINISH)
+		    && (pAd->StaCfg.DLSEntry[i].TimeOut != 0)) {
+			pAd->StaCfg.DLSEntry[i].CountDownTimer--;
+
+			if (pAd->StaCfg.DLSEntry[i].CountDownTimer == 0) {
+				reason = REASON_QOS_REQUEST_TIMEOUT;
+				pAd->StaCfg.DLSEntry[i].Valid = FALSE;
+				pAd->StaCfg.DLSEntry[i].Status = DLS_NONE;
+				DlsParmFill(pAd, &MlmeDlsReq,
+					    &pAd->StaCfg.DLSEntry[i], reason);
+				MlmeEnqueue(pAd, DLS_STATE_MACHINE,
+					    MT2_MLME_DLS_TEAR_DOWN,
+					    sizeof (MLME_DLS_REQ_STRUCT),
+					    &MlmeDlsReq, 0);
+			}
+		}
+	}
+}
+
+/*
+    ==========================================================================
+    Description:
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+BOOLEAN RTMPRcvFrameDLSCheck(
+	IN PRTMP_ADAPTER pAd,
+	IN PHEADER_802_11 pHeader,
+	IN ULONG Len,
+	IN PRT28XX_RXD_STRUC pRxD)
+{
+	ULONG i;
+	BOOLEAN bFindEntry = FALSE;
+	BOOLEAN bSTAKeyFrame = FALSE;
+	PEAPOL_PACKET pEap;
+	PUCHAR pProto, pAddr = NULL;
+	PUCHAR pSTAKey = NULL;
+	UCHAR ZeroReplay[LEN_KEY_DESC_REPLAY];
+	UCHAR Mic[16], OldMic[16];
+	UCHAR digest[80];
+	UCHAR DlsPTK[80];
+	UCHAR temp[64];
+	BOOLEAN TimerCancelled;
+	CIPHER_KEY PairwiseKey;
+
+	if (!pAd->CommonCfg.bDLSCapable)
+		return bSTAKeyFrame;
+
+	if (!INFRA_ON(pAd))
+		return bSTAKeyFrame;
+
+	if (Len < LENGTH_802_11 + 6 + 2)	/* LENGTH_802_11 + LLC + EAPOL protocol type */
+		return bSTAKeyFrame;
+
+	pProto = (PUCHAR) pHeader + LENGTH_802_11;
+
+	if ((pHeader->FC.SubType & 0x08))
+		pProto += 2;	/* QOS Control field */
+
+	/* Skip 4-bytes for HTC */
+	if (pHeader->FC.Order
+	    && (!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_AGGREGATION_INUSED))) {
+		pProto += 4;
+	}
+
+	/* L2PAD bit on will pad 2 bytes at LLC */
+	if (pRxD->L2PAD) {
+		pProto += 2;
+	}
+
+	pProto += 6;		/* 0xAA 0xAA 0xAA 0x00 0x00 0x00 */
+
+	if ((!(pHeader->FC.SubType & 0x08))
+	    && (!RTMPEqualMemory(EAPOL, pProto, 2)))
+		return bSTAKeyFrame;
+
+	pAddr = pHeader->Addr2;
+
+	if (RTMPEqualMemory(EAPOL, pProto, 2)
+	    && (pAd->StaCfg.AuthMode >= Ndis802_11AuthModeWPA)) {
+		pEap = (PEAPOL_PACKET) (pProto + 2);
+
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("DLS - Sniff Len=%ld, DataLen=%d, KeyMic=%d, Install=%d, KeyAck=%d, Secure=%d, EKD_DL=%d, Error=%d, Request=%d\n",
+			  Len,
+			  (LENGTH_802_11 + 6 + 2 + 2 +
+			   MIN_LEN_OF_EAPOL_KEY_MSG + 16),
+			  pEap->KeyDesc.KeyInfo.KeyMic,
+			  pEap->KeyDesc.KeyInfo.Install,
+			  pEap->KeyDesc.KeyInfo.KeyAck,
+			  pEap->KeyDesc.KeyInfo.Secure,
+			  pEap->KeyDesc.KeyInfo.EKD_DL,
+			  pEap->KeyDesc.KeyInfo.Error,
+			  pEap->KeyDesc.KeyInfo.Request));
+
+		if ((Len >=
+		     (LENGTH_802_11 + 6 + 2 + 2 + MIN_LEN_OF_EAPOL_KEY_MSG +
+		      16)) && pEap->KeyDesc.KeyInfo.KeyMic
+		    && pEap->KeyDesc.KeyInfo.Install
+		    && pEap->KeyDesc.KeyInfo.KeyAck
+		    && pEap->KeyDesc.KeyInfo.Secure
+		    && pEap->KeyDesc.KeyInfo.EKD_DL
+		    && !pEap->KeyDesc.KeyInfo.Error
+		    && !pEap->KeyDesc.KeyInfo.Request) {
+			/* First validate replay counter, only accept message with larger replay counter */
+			/* Let equal pass, some AP start with all zero replay counter */
+			NdisZeroMemory(ZeroReplay, LEN_KEY_DESC_REPLAY);
+			if ((RTMPCompareMemory
+			     (pEap->KeyDesc.ReplayCounter,
+			      pAd->StaCfg.ReplayCounter,
+			      LEN_KEY_DESC_REPLAY) != 1)
+			    &&
+			    (RTMPCompareMemory
+			     (pEap->KeyDesc.ReplayCounter, ZeroReplay,
+			      LEN_KEY_DESC_REPLAY) != 0))
+				return bSTAKeyFrame;
+
+			/*RTMPMoveMemory(pAd->StaCfg.ReplayCounter, pEap->KeyDesc.ReplayCounter, LEN_KEY_DESC_REPLAY); */
+			RTMPMoveMemory(pAd->StaCfg.DlsReplayCounter,
+				       pEap->KeyDesc.ReplayCounter,
+				       LEN_KEY_DESC_REPLAY);
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("DLS - Sniff replay counter (%02x-%02x-%02x-%02x-%02x-%02x-%02x-%02x) Len=%ld, KeyDataLen=%d\n",
+				  pAd->StaCfg.ReplayCounter[0],
+				  pAd->StaCfg.ReplayCounter[1],
+				  pAd->StaCfg.ReplayCounter[2],
+				  pAd->StaCfg.ReplayCounter[3],
+				  pAd->StaCfg.ReplayCounter[4],
+				  pAd->StaCfg.ReplayCounter[5],
+				  pAd->StaCfg.ReplayCounter[6],
+				  pAd->StaCfg.ReplayCounter[7], Len,
+				  pEap->KeyDesc.KeyData[1]));
+
+			/* put these code segment to get the replay counter */
+			if (pAd->StaCfg.PortSecured ==
+			    WPA_802_1X_PORT_NOT_SECURED)
+				return bSTAKeyFrame;
+
+			/* Check MIC value */
+			/* Save the MIC and replace with zero */
+			/* use proprietary PTK */
+			NdisZeroMemory(temp, 64);
+			NdisMoveMemory(temp, "IEEE802.11 WIRELESS ACCESS POINT",
+				       32);
+			WpaDerivePTK(pAd, temp, temp, pAd->CommonCfg.Bssid,
+				     temp, pAd->CurrentAddress, DlsPTK,
+				     LEN_PTK);
+
+			NdisMoveMemory(OldMic, pEap->KeyDesc.KeyMic,
+				       LEN_KEY_DESC_MIC);
+			NdisZeroMemory(pEap->KeyDesc.KeyMic, LEN_KEY_DESC_MIC);
+			if (pAd->StaCfg.WepStatus ==
+			    Ndis802_11Encryption3Enabled) {
+				/* AES */
+				RT_HMAC_SHA1(DlsPTK, LEN_PTK_KCK, (PUCHAR) pEap,
+					     pEap->Body_Len[1] + 4, digest,
+					     SHA1_DIGEST_SIZE);
+				NdisMoveMemory(Mic, digest, LEN_KEY_DESC_MIC);
+			} else {
+				RT_HMAC_MD5(DlsPTK, LEN_PTK_KCK, (PUCHAR) pEap,
+					    pEap->Body_Len[1] + 4, Mic,
+					    MD5_DIGEST_SIZE);
+			}
+
+			if (!NdisEqualMemory(OldMic, Mic, LEN_KEY_DESC_MIC)) {
+				DBGPRINT(RT_DEBUG_ERROR,
+					 ("MIC Different in Msg1 of STAKey handshake! \n"));
+				return bSTAKeyFrame;
+			} else
+				DBGPRINT(RT_DEBUG_TRACE,
+					 ("MIC VALID in Msg1 of STAKey handshake! \n"));
+			if ((pEap->KeyDesc.KeyData[0] == 0xDD)
+			    && (pEap->KeyDesc.KeyData[2] == 0x00)
+			    && (pEap->KeyDesc.KeyData[3] == 0x0C)
+			    && (pEap->KeyDesc.KeyData[4] == 0x43)
+			    && (pEap->KeyDesc.KeyData[5] == 0x02)) {
+				pAddr = pEap->KeyDesc.KeyData + 8;	/* Tpe(1), Len(1), OUI(3), DataType(1), Reserved(2) */
+				pSTAKey = pEap->KeyDesc.KeyData + 14;	/* Tpe(1), Len(1), OUI(3), DataType(1), Reserved(2), STAKey_Mac_Addr(6) */
+
+				DBGPRINT(RT_DEBUG_TRACE,
+					 ("DLS - Receive STAKey Message-1 from %02x:%02x:%02x:%02x:%02x:%02x Len=%ld, KeyDataLen=%d\n",
+					  pAddr[0], pAddr[1], pAddr[2],
+					  pAddr[3], pAddr[4], pAddr[5], Len,
+					  pEap->KeyDesc.KeyData[1]));
+
+				bSTAKeyFrame = TRUE;
+			}
+
+		} else if (Len >=
+			   (LENGTH_802_11 + 6 + 2 + 2 +
+			    MIN_LEN_OF_EAPOL_KEY_MSG)) {
+			RTMPMoveMemory(pAd->StaCfg.DlsReplayCounter,
+				       pEap->KeyDesc.ReplayCounter,
+				       LEN_KEY_DESC_REPLAY);
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("DLS - Sniff replay counter 2(%02x-%02x-%02x-%02x-%02x-%02x-%02x-%02x) Len=%ld, KeyDataLen=%d\n",
+				  pAd->StaCfg.ReplayCounter[0],
+				  pAd->StaCfg.ReplayCounter[1],
+				  pAd->StaCfg.ReplayCounter[2],
+				  pAd->StaCfg.ReplayCounter[3],
+				  pAd->StaCfg.ReplayCounter[4],
+				  pAd->StaCfg.ReplayCounter[5],
+				  pAd->StaCfg.ReplayCounter[6],
+				  pAd->StaCfg.ReplayCounter[7], Len,
+				  pEap->KeyDesc.KeyData[1]));
+		}
+	}
+
+	/* If timeout value is equaled to zero, it means always not be timeout. */
+	/* update local dls table entry */
+	for (i = 0; i < MAX_NUM_OF_INIT_DLS_ENTRY; i++) {
+		if (pAd->StaCfg.DLSEntry[i].Valid
+		    && MAC_ADDR_EQUAL(pAddr, pAd->StaCfg.DLSEntry[i].MacAddr)) {
+			if (bSTAKeyFrame) {
+				PMAC_TABLE_ENTRY pEntry;
+
+				/* STAKey frame, add pairwise key table */
+				pAd->StaCfg.DLSEntry[i].Status = DLS_FINISH;
+				RTMPCancelTimer(&pAd->StaCfg.DLSEntry[i].Timer,
+						&TimerCancelled);
+
+				PairwiseKey.KeyLen = LEN_TK;
+				NdisMoveMemory(PairwiseKey.Key, &pSTAKey[0],
+					       LEN_TK);
+				NdisMoveMemory(PairwiseKey.TxMic, &pSTAKey[16],
+					       LEN_TKIP_MIC);
+				NdisMoveMemory(PairwiseKey.RxMic, &pSTAKey[24],
+					       LEN_TKIP_MIC);
+
+				/*PairwiseKey.CipherAlg = pAd->SharedKey[BSS0][pAd->StaCfg.DefaultKeyId].CipherAlg; */
+				if (pAd->StaCfg.PairCipher ==
+				    Ndis802_11Encryption2Enabled)
+					PairwiseKey.CipherAlg = CIPHER_TKIP;
+				else if (pAd->StaCfg.PairCipher ==
+					 Ndis802_11Encryption3Enabled)
+					PairwiseKey.CipherAlg = CIPHER_AES;
+
+				pEntry =
+				    DlsEntryTableLookup(pAd,
+							pAd->StaCfg.DLSEntry[i].
+							MacAddr, TRUE);
+				/*AsicAddKeyEntry(pAd, (USHORT)(i + 2), BSS0, 0, &PairwiseKey, TRUE, TRUE);     // reserve 0 for multicast, 1 for unicast */
+				/*AsicUpdateRxWCIDTable(pAd, (USHORT)(i + 2), pAddr); */
+
+				/* Add Pair-wise key to Asic */
+				RTMP_ASIC_PAIRWISE_KEY_TABLE(pAd,
+							     (UCHAR) pAd->
+							     StaCfg.DLSEntry[i].
+							     MacTabMatchWCID,
+							     &PairwiseKey);
+
+				RTMP_SET_WCID_SEC_INFO(pAd,
+						       BSS0,
+						       0,
+						       PairwiseKey.CipherAlg,
+						       (UCHAR) pAd->StaCfg.
+						       DLSEntry[i].
+						       MacTabMatchWCID,
+						       PAIRWISEKEYTABLE);
+
+				NdisMoveMemory(&pEntry->PairwiseKey,
+					       &PairwiseKey,
+					       sizeof (CIPHER_KEY));
+				DBGPRINT(RT_DEBUG_TRACE,
+					 ("DLS - Receive STAKey Message-1 (Peer STA MAC Address STAKey) \n"));
+
+				RTMPSendSTAKeyHandShake(pAd,
+							pAd->StaCfg.DLSEntry[i].
+							MacAddr);
+
+				DBGPRINT(RT_DEBUG_TRACE,
+					 ("DLS - Finish STAKey handshake procedure (Initiator side)\n"));
+			} else {
+				/* Data frame, update timeout value */
+				if (pAd->StaCfg.DLSEntry[i].Status ==
+				    DLS_FINISH) {
+					pAd->StaCfg.DLSEntry[i].CountDownTimer =
+					    pAd->StaCfg.DLSEntry[i].TimeOut;
+					/*AsicUpdateRxWCIDTable(pAd, (USHORT)(i + 2), pAddr); */
+				}
+			}
+
+			bFindEntry = TRUE;
+		}
+	}
+
+	/* update peer dls table entry */
+	for (i = MAX_NUM_OF_INIT_DLS_ENTRY; i < MAX_NUM_OF_DLS_ENTRY; i++) {
+		if (pAd->StaCfg.DLSEntry[i].Valid
+		    && MAC_ADDR_EQUAL(pAddr, pAd->StaCfg.DLSEntry[i].MacAddr)) {
+			if (bSTAKeyFrame) {
+				PMAC_TABLE_ENTRY pEntry = NULL;
+
+				/* STAKey frame, add pairwise key table, and send STAkey Msg-2 */
+				pAd->StaCfg.DLSEntry[i].Status = DLS_FINISH;
+				RTMPCancelTimer(&pAd->StaCfg.DLSEntry[i].Timer,
+						&TimerCancelled);
+
+				PairwiseKey.KeyLen = LEN_TK;
+				NdisMoveMemory(PairwiseKey.Key, &pSTAKey[0],
+					       LEN_TK);
+				NdisMoveMemory(PairwiseKey.TxMic, &pSTAKey[16],
+					       LEN_TKIP_MIC);
+				NdisMoveMemory(PairwiseKey.RxMic, &pSTAKey[24],
+					       LEN_TKIP_MIC);
+
+				/*PairwiseKey.CipherAlg = pAd->SharedKey[BSS0][pAd->StaCfg.DefaultKeyId].CipherAlg; */
+				if (pAd->StaCfg.PairCipher ==
+				    Ndis802_11Encryption2Enabled)
+					PairwiseKey.CipherAlg = CIPHER_TKIP;
+				else if (pAd->StaCfg.PairCipher ==
+					 Ndis802_11Encryption3Enabled)
+					PairwiseKey.CipherAlg = CIPHER_AES;
+
+				pEntry =
+				    DlsEntryTableLookup(pAd,
+							pAd->StaCfg.DLSEntry[i].
+							MacAddr, TRUE);
+				/*AsicAddKeyEntry(pAd, (USHORT)(i + 2), BSS0, 0, &PairwiseKey, TRUE, TRUE);     // reserve 0 for multicast, 1 for unicast */
+				/*AsicUpdateRxWCIDTable(pAd, (USHORT)(i + 2), pAddr); */
+
+				/* Add Pair-wise key to Asic */
+				RTMP_ASIC_PAIRWISE_KEY_TABLE(pAd,
+							     (UCHAR) pAd->
+							     StaCfg.DLSEntry[i].
+							     MacTabMatchWCID,
+							     &PairwiseKey);
+
+				RTMP_SET_WCID_SEC_INFO(pAd,
+						       BSS0,
+						       0,
+						       PairwiseKey.CipherAlg,
+						       (UCHAR) pAd->StaCfg.
+						       DLSEntry[i].
+						       MacTabMatchWCID,
+						       PAIRWISEKEYTABLE);
+
+				NdisMoveMemory(&pEntry->PairwiseKey,
+					       &PairwiseKey,
+					       sizeof (CIPHER_KEY));
+				DBGPRINT(RT_DEBUG_TRACE,
+					 ("DLS - Receive STAKey Message-1 (Initiator STA MAC Address STAKey)\n"));
+
+				/* If support WPA or WPA2, start STAKey hand shake, */
+				/* If failed hand shake, just tear down peer DLS */
+				if (RTMPSendSTAKeyHandShake(pAd, pAddr) !=
+				    NDIS_STATUS_SUCCESS) {
+					MLME_DLS_REQ_STRUCT MlmeDlsReq;
+					USHORT reason =
+					    REASON_QOS_CIPHER_NOT_SUPPORT;
+
+					pAd->StaCfg.DLSEntry[i].Valid = FALSE;
+					pAd->StaCfg.DLSEntry[i].Status =
+					    DLS_NONE;
+					DlsParmFill(pAd, &MlmeDlsReq,
+						    &pAd->StaCfg.DLSEntry[i],
+						    reason);
+					MlmeEnqueue(pAd, DLS_STATE_MACHINE,
+						    MT2_MLME_DLS_TEAR_DOWN,
+						    sizeof
+						    (MLME_DLS_REQ_STRUCT),
+						    &MlmeDlsReq, 0);
+				} else {
+					DBGPRINT(RT_DEBUG_TRACE,
+						 ("DLS - Finish STAKey handshake procedure (Peer side)\n"));
+				}
+			} else {
+				/* Data frame, update timeout value */
+				if (pAd->StaCfg.DLSEntry[i].Status ==
+				    DLS_FINISH) {
+					pAd->StaCfg.DLSEntry[i].CountDownTimer =
+					    pAd->StaCfg.DLSEntry[i].TimeOut;
+				}
+			}
+
+			bFindEntry = TRUE;
+		}
+	}
+
+	return bSTAKeyFrame;
+}
+
+/*
+	========================================================================
+
+	Routine	Description:
+		Check if the frame can be sent through DLS direct link interface
+		
+	Arguments:
+		pAd		Pointer	to adapter
+		
+	Return Value:
+		DLS entry index
+		
+	Note:
+	
+	========================================================================
+*/
+INT RTMPCheckDLSFrame(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pDA)
+{
+	INT rval = -1;
+	INT i;
+
+	if (!pAd->CommonCfg.bDLSCapable)
+		return rval;
+
+	if (!INFRA_ON(pAd))
+		return rval;
+
+	do {
+		/* check local dls table entry */
+		for (i = 0; i < MAX_NUM_OF_INIT_DLS_ENTRY; i++) {
+			if (pAd->StaCfg.DLSEntry[i].Valid
+			    && (pAd->StaCfg.DLSEntry[i].Status == DLS_FINISH)
+			    && MAC_ADDR_EQUAL(pDA,
+					      pAd->StaCfg.DLSEntry[i].
+					      MacAddr)) {
+				rval = i;
+				break;
+			}
+		}
+
+		/* check peer dls table entry */
+		for (i = MAX_NUM_OF_INIT_DLS_ENTRY; i < MAX_NUM_OF_DLS_ENTRY;
+		     i++) {
+			if (pAd->StaCfg.DLSEntry[i].Valid
+			    && (pAd->StaCfg.DLSEntry[i].Status == DLS_FINISH)
+			    && MAC_ADDR_EQUAL(pDA,
+					      pAd->StaCfg.DLSEntry[i].
+					      MacAddr)) {
+				rval = i;
+				break;
+			}
+		}
+	} while (FALSE);
+
+	return rval;
+}
+
+/*
+    ==========================================================================
+    Description:
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+VOID RTMPSendDLSTearDownFrame(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pDA)
+{
+	PUCHAR pOutBuffer = NULL;
+	NDIS_STATUS NStatus;
+	HEADER_802_11 DlsTearDownHdr;
+	ULONG FrameLen = 0;
+	USHORT Reason = REASON_QOS_QSTA_LEAVING_QBSS;
+	UCHAR Category = CATEGORY_DLS;
+	UCHAR Action = ACTION_DLS_TEARDOWN;
+	UCHAR i = 0;
+
+	if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS) ||
+	    RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS))
+		return;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("Send DLS TearDown Frame \n"));
+
+	NStatus = MlmeAllocateMemory(pAd, &pOutBuffer);	/*Get an unused nonpaged memory */
+	if (NStatus != NDIS_STATUS_SUCCESS) {
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("ASSOC - RTMPSendDLSTearDownFrame() allocate memory failed \n"));
+		return;
+	}
+
+	ActHeaderInit(pAd, &DlsTearDownHdr, pAd->CommonCfg.Bssid,
+		      pAd->CurrentAddress, pAd->CommonCfg.Bssid);
+	MakeOutgoingFrame(pOutBuffer, &FrameLen, sizeof (HEADER_802_11),
+			  &DlsTearDownHdr, 1, &Category, 1, &Action, 6, pDA, 6,
+			  pAd->CurrentAddress, 2, &Reason, END_OF_ARGS);
+
+	MiniportMMRequest(pAd, 0, pOutBuffer, FrameLen);
+	MlmeFreeMemory(pAd, pOutBuffer);
+
+	/* Remove key in local dls table entry */
+	for (i = 0; i < MAX_NUM_OF_INIT_DLS_ENTRY; i++) {
+		if (pAd->StaCfg.DLSEntry[i].Valid
+		    && (pAd->StaCfg.DLSEntry[i].Status == DLS_FINISH)
+		    && MAC_ADDR_EQUAL(pDA, pAd->StaCfg.DLSEntry[i].MacAddr)) {
+			MacTableDeleteDlsEntry(pAd,
+					       pAd->StaCfg.DLSEntry[i].
+					       MacTabMatchWCID,
+					       pAd->StaCfg.DLSEntry[i].MacAddr);
+		}
+	}
+
+	/* Remove key in peer dls table entry */
+	for (i = MAX_NUM_OF_INIT_DLS_ENTRY; i < MAX_NUM_OF_DLS_ENTRY; i++) {
+		if (pAd->StaCfg.DLSEntry[i].Valid
+		    && (pAd->StaCfg.DLSEntry[i].Status == DLS_FINISH)
+		    && MAC_ADDR_EQUAL(pDA, pAd->StaCfg.DLSEntry[i].MacAddr)) {
+			MacTableDeleteDlsEntry(pAd,
+					       pAd->StaCfg.DLSEntry[i].
+					       MacTabMatchWCID,
+					       pAd->StaCfg.DLSEntry[i].MacAddr);
+		}
+	}
+
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("Send DLS TearDown Frame and remove key in (i=%d) \n", i));
+}
+
+/*
+    ==========================================================================
+    Description:
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+NDIS_STATUS RTMPSendSTAKeyRequest(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pDA)
+{
+	UCHAR Header802_3[14];
+	NDIS_STATUS NStatus;
+	ULONG FrameLen = 0;
+	PEAPOL_PACKET pPacket;
+	UCHAR *mpool;
+	UCHAR Mic[16];
+	UCHAR digest[80];
+	PUCHAR pOutBuffer = NULL;
+	PNDIS_PACKET pNdisPacket;
+	UCHAR temp[64];
+	UCHAR DlsPTK[80];
+
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("DLS - RTMPSendSTAKeyRequest() to %02x:%02x:%02x:%02x:%02x:%02x\n",
+		  pDA[0], pDA[1], pDA[2], pDA[3], pDA[4], pDA[5]));
+
+	pAd->Sequence++;
+	MAKE_802_3_HEADER(Header802_3, pAd->CommonCfg.Bssid,
+			  pAd->CurrentAddress, EAPOL);
+
+	/* Allocate memory for output */
+	os_alloc_mem(NULL, (PUCHAR *) & mpool, TX_EAPOL_BUFFER);
+	if (mpool == NULL) {
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("!!!%s : no memory!!!\n", __FUNCTION__));
+		return NDIS_STATUS_FAILURE;
+	}
+
+	/* Zero message body */
+	pPacket = (PEAPOL_PACKET) mpool;
+	NdisZeroMemory(pPacket, TX_EAPOL_BUFFER);
+
+	pPacket->ProVer = EAPOL_VER;
+	pPacket->ProType = EAPOLKey;
+	pPacket->Body_Len[1] = sizeof (KEY_DESCRIPTER) + 6 + MAC_ADDR_LEN;	/* data field contain KDE andPeer MAC address */
+
+	/* STAKey Message is as EAPOL-Key(1,1,0,0,G/0,0,0, MIC, 0,Peer MAC KDE) */
+	if ((pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA)
+	    || (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPAPSK)) {
+		pPacket->KeyDesc.Type = WPA1_KEY_DESC;
+	} else if ((pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2)
+		   || (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2PSK)) {
+		pPacket->KeyDesc.Type = WPA2_KEY_DESC;
+	}
+
+	/* Key descriptor version */
+	pPacket->KeyDesc.KeyInfo.KeyDescVer =
+	    (((pAd->StaCfg.PairCipher == Ndis802_11Encryption3Enabled)
+	      || (pAd->StaCfg.GroupCipher ==
+		  Ndis802_11Encryption3Enabled)) ? (KEY_DESC_AES)
+	     : (KEY_DESC_TKIP));
+
+	pPacket->KeyDesc.KeyInfo.KeyMic = 1;
+	pPacket->KeyDesc.KeyInfo.Secure = 1;
+	pPacket->KeyDesc.KeyInfo.Request = 1;
+
+	pPacket->KeyDesc.KeyDataLen[1] = 12;
+
+	/* use our own OUI to distinguish proprietary with standard. */
+	pPacket->KeyDesc.KeyData[0] = 0xDD;
+	pPacket->KeyDesc.KeyData[1] = 0x0A;
+	pPacket->KeyDesc.KeyData[2] = 0x00;
+	pPacket->KeyDesc.KeyData[3] = 0x0C;
+	pPacket->KeyDesc.KeyData[4] = 0x43;
+	pPacket->KeyDesc.KeyData[5] = 0x03;
+	NdisMoveMemory(&pPacket->KeyDesc.KeyData[6], pDA, MAC_ADDR_LEN);
+
+	NdisMoveMemory(pPacket->KeyDesc.ReplayCounter,
+		       pAd->StaCfg.DlsReplayCounter, LEN_KEY_DESC_REPLAY);
+
+	/* Allocate buffer for transmitting message */
+	NStatus = MlmeAllocateMemory(pAd, &pOutBuffer);
+	if (NStatus != NDIS_STATUS_SUCCESS) {
+		os_free_mem(NULL, mpool);
+		return NStatus;
+	}
+	/* Prepare EAPOL frame for MIC calculation */
+	/* Be careful, only EAPOL frame is counted for MIC calculation */
+	MakeOutgoingFrame(pOutBuffer, &FrameLen,
+			  pPacket->Body_Len[1] + 4, pPacket, END_OF_ARGS);
+
+	/* use proprietary PTK */
+	NdisZeroMemory(temp, 64);
+	NdisMoveMemory(temp, "IEEE802.11 WIRELESS ACCESS POINT", 32);
+	WpaDerivePTK(pAd, temp, temp, pAd->CommonCfg.Bssid, temp,
+		     pAd->CurrentAddress, DlsPTK, LEN_PTK);
+
+	/* calculate MIC */
+	if (pAd->StaCfg.WepStatus == Ndis802_11Encryption3Enabled) {
+		/* AES */
+		NdisZeroMemory(digest, sizeof (digest));
+		RT_HMAC_SHA1(DlsPTK, LEN_PTK_KCK, pOutBuffer, FrameLen, digest,
+			     SHA1_DIGEST_SIZE);
+		NdisMoveMemory(pPacket->KeyDesc.KeyMic, digest,
+			       LEN_KEY_DESC_MIC);
+	} else {
+		NdisZeroMemory(Mic, sizeof (Mic));
+		RT_HMAC_MD5(DlsPTK, LEN_PTK_KCK, pOutBuffer, FrameLen, Mic,
+			    MD5_DIGEST_SIZE);
+		NdisMoveMemory(pPacket->KeyDesc.KeyMic, Mic, LEN_KEY_DESC_MIC);
+	}
+
+	MakeOutgoingFrame(pOutBuffer, &FrameLen,
+			  sizeof (Header802_3), Header802_3,
+			  pPacket->Body_Len[1] + 4, pPacket, END_OF_ARGS);
+
+	NStatus =
+	    RTMPAllocateNdisPacket(pAd, &pNdisPacket, NULL, 0, pOutBuffer,
+				   FrameLen);
+	if (NStatus == NDIS_STATUS_SUCCESS) {
+		RTMP_SET_PACKET_WCID(pNdisPacket, BSSID_WCID);
+		STASendPacket(pAd, pNdisPacket);
+		RTMPDeQueuePacket(pAd, FALSE, NUM_OF_TX_RING, MAX_TX_PROCESS);
+	}
+
+	MlmeFreeMemory(pAd, pOutBuffer);
+	os_free_mem(NULL, mpool);
+
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("RTMPSendSTAKeyRequest- Send STAKey request (NStatus=%x, FrameLen=%ld)\n",
+		  NStatus, FrameLen));
+
+	return NStatus;
+}
+
+/*
+    ==========================================================================
+    Description:
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+NDIS_STATUS RTMPSendSTAKeyHandShake(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pDA)
+{
+	UCHAR Header802_3[14];
+	NDIS_STATUS NStatus;
+	ULONG FrameLen = 0;
+	PEAPOL_PACKET pPacket;
+	UCHAR *mpool;
+	UCHAR Mic[16];
+	UCHAR digest[80];
+	PUCHAR pOutBuffer = NULL;
+	PNDIS_PACKET pNdisPacket;
+	UCHAR temp[64];
+	UCHAR DlsPTK[80];	/* Due to dirver can not get PTK, use proprietary PTK */
+
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("DLS - RTMPSendSTAKeyHandShake() to %02x:%02x:%02x:%02x:%02x:%02x\n",
+		  pDA[0], pDA[1], pDA[2], pDA[3], pDA[4], pDA[5]));
+
+	pAd->Sequence++;
+	MAKE_802_3_HEADER(Header802_3, pAd->CommonCfg.Bssid,
+			  pAd->CurrentAddress, EAPOL);
+
+	/* Allocate memory for output */
+	os_alloc_mem(NULL, (PUCHAR *) & mpool, TX_EAPOL_BUFFER);
+	if (mpool == NULL) {
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("!!!%s : no memory!!!\n", __FUNCTION__));
+		return NDIS_STATUS_FAILURE;
+	}
+
+	/* Zero message body */
+	pPacket = (PEAPOL_PACKET) mpool;
+	NdisZeroMemory(pPacket, TX_EAPOL_BUFFER);
+
+	pPacket->ProVer = EAPOL_VER;
+	pPacket->ProType = EAPOLKey;
+	pPacket->Body_Len[1] = sizeof (KEY_DESCRIPTER) + 6 + MAC_ADDR_LEN;	/* data field contain KDE and Peer MAC address */
+
+	/* STAKey Message is as EAPOL-Key(1,1,0,0,G/0,0,0, MIC, 0,Peer MAC KDE) */
+	if ((pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA)
+	    || (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPAPSK)) {
+		pPacket->KeyDesc.Type = WPA1_KEY_DESC;
+	} else if ((pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2)
+		   || (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2PSK)) {
+		pPacket->KeyDesc.Type = WPA2_KEY_DESC;
+	}
+
+	/* Key descriptor version */
+	pPacket->KeyDesc.KeyInfo.KeyDescVer =
+	    (((pAd->StaCfg.PairCipher == Ndis802_11Encryption3Enabled)
+	      || (pAd->StaCfg.GroupCipher ==
+		  Ndis802_11Encryption3Enabled)) ? (KEY_DESC_AES)
+	     : (KEY_DESC_TKIP));
+
+	pPacket->KeyDesc.KeyInfo.KeyMic = 1;
+	pPacket->KeyDesc.KeyInfo.Secure = 1;
+
+	pPacket->KeyDesc.KeyDataLen[1] = 12;
+
+	/* use our own OUI to distinguish proprietary with standard. */
+	pPacket->KeyDesc.KeyData[0] = 0xDD;
+	pPacket->KeyDesc.KeyData[1] = 0x0A;
+	pPacket->KeyDesc.KeyData[2] = 0x00;
+	pPacket->KeyDesc.KeyData[3] = 0x0C;
+	pPacket->KeyDesc.KeyData[4] = 0x43;
+	pPacket->KeyDesc.KeyData[5] = 0x03;
+	NdisMoveMemory(&pPacket->KeyDesc.KeyData[6], pDA, MAC_ADDR_LEN);
+
+	NdisMoveMemory(pPacket->KeyDesc.ReplayCounter,
+		       pAd->StaCfg.DlsReplayCounter, LEN_KEY_DESC_REPLAY);
+
+	/* Allocate buffer for transmitting message */
+	NStatus = MlmeAllocateMemory(pAd, &pOutBuffer);
+	if (NStatus != NDIS_STATUS_SUCCESS) {
+		os_free_mem(NULL, mpool);
+		return NStatus;
+	}
+	/* Prepare EAPOL frame for MIC calculation */
+	/* Be careful, only EAPOL frame is counted for MIC calculation */
+	MakeOutgoingFrame(pOutBuffer, &FrameLen,
+			  pPacket->Body_Len[1] + 4, pPacket, END_OF_ARGS);
+
+	/* use proprietary PTK */
+	NdisZeroMemory(temp, 64);
+	NdisMoveMemory(temp, "IEEE802.11 WIRELESS ACCESS POINT", 32);
+	WpaDerivePTK(pAd, temp, temp, pAd->CommonCfg.Bssid, temp,
+		     pAd->CurrentAddress, DlsPTK, LEN_PTK);
+
+	/* calculate MIC */
+	if (pAd->StaCfg.WepStatus == Ndis802_11Encryption3Enabled) {
+		/* AES */
+		NdisZeroMemory(digest, sizeof (digest));
+		RT_HMAC_SHA1(DlsPTK, LEN_PTK_KCK, pOutBuffer, FrameLen, digest,
+			     SHA1_DIGEST_SIZE);
+		NdisMoveMemory(pPacket->KeyDesc.KeyMic, digest,
+			       LEN_KEY_DESC_MIC);
+	} else {
+		NdisZeroMemory(Mic, sizeof (Mic));
+		RT_HMAC_MD5(DlsPTK, LEN_PTK_KCK, pOutBuffer, FrameLen, Mic,
+			    MD5_DIGEST_SIZE);
+		NdisMoveMemory(pPacket->KeyDesc.KeyMic, Mic, LEN_KEY_DESC_MIC);
+	}
+
+	MakeOutgoingFrame(pOutBuffer, &FrameLen,
+			  sizeof (Header802_3), Header802_3,
+			  pPacket->Body_Len[1] + 4, pPacket, END_OF_ARGS);
+
+	NStatus =
+	    RTMPAllocateNdisPacket(pAd, &pNdisPacket, NULL, 0, pOutBuffer,
+				   FrameLen);
+	if (NStatus == NDIS_STATUS_SUCCESS) {
+		RTMP_SET_PACKET_WCID(pNdisPacket, BSSID_WCID);
+		STASendPacket(pAd, pNdisPacket);
+		RTMPDeQueuePacket(pAd, FALSE, NUM_OF_TX_RING, MAX_TX_PROCESS);
+	}
+
+	MlmeFreeMemory(pAd, pOutBuffer);
+	os_free_mem(NULL, mpool);
+
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("RTMPSendSTAKeyHandShake- Send STAKey Message-2 (NStatus=%x, FrameLen=%ld)\n",
+		  NStatus, FrameLen));
+
+	return NStatus;
+}
+
+VOID DlsTimeoutAction(
+	IN PVOID SystemSpecific1,
+	IN PVOID FunctionContext,
+	IN PVOID SystemSpecific2,
+	IN PVOID SystemSpecific3)
+{
+	MLME_DLS_REQ_STRUCT MlmeDlsReq;
+	USHORT reason;
+	PRT_802_11_DLS pDLS = (PRT_802_11_DLS) FunctionContext;
+	PRTMP_ADAPTER pAd = NULL;
+
+	if (pDLS == NULL)
+		return;
+
+	pAd = (PRTMP_ADAPTER)pDLS->pAd;
+
+	DBGPRINT(RT_DEBUG_TRACE,
+		 ("DlsTimeout - Tear down DLS links (%02x:%02x:%02x:%02x:%02x:%02x)\n",
+		  pDLS->MacAddr[0], pDLS->MacAddr[1], pDLS->MacAddr[2],
+		  pDLS->MacAddr[3], pDLS->MacAddr[4], pDLS->MacAddr[5]));
+
+	if ((pDLS) && (pDLS->Valid)) {
+		reason = REASON_QOS_REQUEST_TIMEOUT;
+		pDLS->Valid = FALSE;
+		pDLS->Status = DLS_NONE;
+		DlsParmFill(pAd, &MlmeDlsReq, pDLS, reason);
+		MlmeEnqueue(pAd, DLS_STATE_MACHINE, MT2_MLME_DLS_TEAR_DOWN,
+			    sizeof (MLME_DLS_REQ_STRUCT), &MlmeDlsReq, 0);
+		RTMP_MLME_HANDLER(pAd);
+	}
+}
+
+/*
+================================================================
+Description : because DLS and CLI share the same WCID table in ASIC. 
+Mesh entry also insert to pAd->MacTab.content[].
+Also fills the pairwise key.
+Because front MAX_AID_BA entries have direct mapping to BAEntry, which is only used as CLI. So we insert Dls
+from index MAX_AID_BA.
+================================================================
+*/
+MAC_TABLE_ENTRY *MacTableInsertDlsEntry(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pAddr,
+	IN UINT DlsEntryIdx)
+{
+	PMAC_TABLE_ENTRY pEntry = NULL;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("====> MacTableInsertDlsEntry\n"));
+	/* if FULL, return */
+	if (pAd->MacTab.Size >= MAX_LEN_OF_MAC_TABLE)
+		return NULL;
+
+	do {
+		if ((pEntry = DlsEntryTableLookup(pAd, pAddr, TRUE)) != NULL)
+			break;
+
+		/* allocate one MAC entry */
+		pEntry =
+		    MacTableInsertEntry(pAd, pAddr,
+					DlsEntryIdx + MIN_NET_DEVICE_FOR_DLS,
+					OPMODE_STA,
+					TRUE);
+		if (pEntry) {
+			pAd->StaCfg.DLSEntry[DlsEntryIdx].MacTabMatchWCID =
+			    pEntry->Aid;
+			pEntry->MatchDlsEntryIdx = DlsEntryIdx;
+			pEntry->AuthMode = pAd->StaCfg.AuthMode;
+			pEntry->WepStatus = pAd->StaCfg.WepStatus;
+			pEntry->PortSecured = WPA_802_1X_PORT_SECURED;
+
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("MacTableInsertDlsEntry - allocate entry #%d, Total= %d\n",
+				  pEntry->Aid, pAd->MacTab.Size));
+
+			/* If legacy WEP is used, set pair-wise cipherAlg into WCID attribute table for this entry */
+			if (IS_ENTRY_DLS(pEntry)
+			    && (pAd->StaCfg.WepStatus ==
+				Ndis802_11WEPEnabled)) {
+				UCHAR KeyIdx = 0;
+				UCHAR CipherAlg = 0;
+
+				KeyIdx = pAd->StaCfg.DefaultKeyId;
+
+				CipherAlg =
+				    pAd->SharedKey[BSS0][KeyIdx].CipherAlg;
+
+				RTMPSetWcidSecurityInfo(pAd,
+							BSS0,
+							pAd->StaCfg.
+							DefaultKeyId,
+							pAd->
+							SharedKey[BSS0][pAd->
+									StaCfg.
+									DefaultKeyId].
+							CipherAlg, pEntry->Aid,
+							SHAREDKEYTABLE);
+			}
+
+			break;
+		}
+	} while (FALSE);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<==== MacTableInsertDlsEntry\n"));
+
+	return pEntry;
+}
+
+/*
+	==========================================================================
+	Description:
+		Delete all Mesh Entry in pAd->MacTab
+	==========================================================================
+ */
+BOOLEAN MacTableDeleteDlsEntry(
+	IN PRTMP_ADAPTER pAd,
+	IN USHORT wcid,
+	IN PUCHAR pAddr)
+{
+	DBGPRINT(RT_DEBUG_TRACE, ("====> MacTableDeleteDlsEntry\n"));
+
+	if (!VALID_WCID(wcid))
+		return FALSE;
+
+	MacTableDeleteEntry(pAd, wcid, pAddr);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<==== MacTableDeleteDlsEntry\n"));
+
+	return TRUE;
+}
+
+MAC_TABLE_ENTRY *DlsEntryTableLookup(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR pAddr,
+	IN BOOLEAN bResetIdelCount)
+{
+	ULONG HashIdx;
+	MAC_TABLE_ENTRY *pEntry = NULL;
+
+	RTMP_SEM_LOCK(&pAd->MacTabLock);
+	HashIdx = MAC_ADDR_HASH_INDEX(pAddr);
+	pEntry = pAd->MacTab.Hash[HashIdx];
+
+	while (pEntry) {
+		if (IS_ENTRY_DLS(pEntry)
+		    && MAC_ADDR_EQUAL(pEntry->Addr, pAddr)) {
+			if (bResetIdelCount)
+				pEntry->NoDataIdleCount = 0;
+			break;
+		} else
+			pEntry = pEntry->pNext;
+	}
+
+	RTMP_SEM_UNLOCK(&pAd->MacTabLock);
+	return pEntry;
+}
+
+MAC_TABLE_ENTRY *DlsEntryTableLookupByWcid(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR wcid,
+	IN PUCHAR pAddr,
+	IN BOOLEAN bResetIdelCount)
+{
+	ULONG DLsIndex;
+	PMAC_TABLE_ENTRY pCurEntry = NULL;
+	PMAC_TABLE_ENTRY pEntry = NULL;
+
+	if (!VALID_WCID(wcid))
+		return NULL;
+
+	RTMP_SEM_LOCK(&pAd->MacTabLock);
+
+	do {
+		pCurEntry = &pAd->MacTab.Content[wcid];
+
+		DLsIndex = 0xff;
+		if ((pCurEntry) && IS_ENTRY_DLS(pCurEntry)) {
+			DLsIndex = pCurEntry->MatchDlsEntryIdx;
+		}
+
+		if (DLsIndex == 0xff)
+			break;
+
+		if (MAC_ADDR_EQUAL(pCurEntry->Addr, pAddr)) {
+			if (bResetIdelCount)
+				pCurEntry->NoDataIdleCount = 0;
+			pEntry = pCurEntry;
+			break;
+		}
+	} while (FALSE);
+
+	RTMP_SEM_UNLOCK(&pAd->MacTabLock);
+
+	return pEntry;
+}
+
+INT Set_DlsEntryInfo_Display_Proc(
+	IN PRTMP_ADAPTER pAd,
+	IN PUCHAR arg)
+{
+	INT i;
+
+	DBGPRINT(RT_DEBUG_OFF, ("\n%-19s%-8s\n", "MAC", "TIMEOUT\n"));
+	for (i = 0; i < MAX_NUM_OF_DLS_ENTRY; i++) {
+		if ((pAd->StaCfg.DLSEntry[i].Valid)
+		    && (pAd->StaCfg.DLSEntry[i].Status == DLS_FINISH)) {
+			PMAC_TABLE_ENTRY pEntry =
+			    &pAd->MacTab.Content[pAd->StaCfg.DLSEntry[i].
+						 MacTabMatchWCID];
+
+			DBGPRINT(RT_DEBUG_OFF,
+				 ("%02x:%02x:%02x:%02x:%02x:%02x  ",
+				  pAd->StaCfg.DLSEntry[i].MacAddr[0],
+				  pAd->StaCfg.DLSEntry[i].MacAddr[1],
+				  pAd->StaCfg.DLSEntry[i].MacAddr[2],
+				  pAd->StaCfg.DLSEntry[i].MacAddr[3],
+				  pAd->StaCfg.DLSEntry[i].MacAddr[4],
+				  pAd->StaCfg.DLSEntry[i].MacAddr[5]));
+			DBGPRINT(RT_DEBUG_OFF,
+				 ("%-8d\n", pAd->StaCfg.DLSEntry[i].TimeOut));
+
+			DBGPRINT(RT_DEBUG_OFF, ("\n"));
+			DBGPRINT(RT_DEBUG_OFF,
+				 ("\n%-19s%-4s%-4s%-4s%-4s%-7s%-7s%-7s", "MAC",
+				  "AID", "BSS", "PSM", "WMM", "RSSI0", "RSSI1",
+				  "RSSI2"));
+#ifdef DOT11_N_SUPPORT
+			DBGPRINT(RT_DEBUG_OFF,
+				 ("%-8s%-10s%-6s%-6s%-6s%-6s", "MIMOPS", "PhMd",
+				  "BW", "MCS", "SGI", "STBC"));
+#endif /* DOT11_N_SUPPORT */
+			DBGPRINT(RT_DEBUG_OFF,
+				 ("\n%02X:%02X:%02X:%02X:%02X:%02X  ",
+				  pEntry->Addr[0], pEntry->Addr[1],
+				  pEntry->Addr[2], pEntry->Addr[3],
+				  pEntry->Addr[4], pEntry->Addr[5]));
+			DBGPRINT(RT_DEBUG_OFF, ("%-4d", (int)pEntry->Aid));
+			DBGPRINT(RT_DEBUG_OFF, ("%-4d", (int)pEntry->apidx));
+			DBGPRINT(RT_DEBUG_OFF, ("%-4d", (int)pEntry->PsMode));
+			DBGPRINT(RT_DEBUG_OFF,
+				 ("%-4d",
+				  (int)CLIENT_STATUS_TEST_FLAG(pEntry,
+							       fCLIENT_STATUS_WMM_CAPABLE)));
+			DBGPRINT(RT_DEBUG_OFF,
+				 ("%-7d", pEntry->RssiSample.AvgRssi0));
+			DBGPRINT(RT_DEBUG_OFF,
+				 ("%-7d", pEntry->RssiSample.AvgRssi1));
+			DBGPRINT(RT_DEBUG_OFF,
+				 ("%-7d", pEntry->RssiSample.AvgRssi2));
+#ifdef DOT11_N_SUPPORT
+			DBGPRINT(RT_DEBUG_OFF, ("%-8d", (int)pEntry->MmpsMode));
+			DBGPRINT(RT_DEBUG_OFF,
+				 ("%-10s",
+				  GetPhyMode(pEntry->HTPhyMode.field.MODE)));
+			DBGPRINT(RT_DEBUG_OFF,
+				 ("%-6s", GetBW(pEntry->HTPhyMode.field.BW)));
+			DBGPRINT(RT_DEBUG_OFF,
+				 ("%-6d", pEntry->HTPhyMode.field.MCS));
+			DBGPRINT(RT_DEBUG_OFF,
+				 ("%-6d", pEntry->HTPhyMode.field.ShortGI));
+			DBGPRINT(RT_DEBUG_OFF,
+				 ("%-6d", pEntry->HTPhyMode.field.STBC));
+#endif /* DOT11_N_SUPPORT */
+			DBGPRINT(RT_DEBUG_OFF,
+				 ("%-10d, %d, %d%%\n", pEntry->DebugFIFOCount,
+				  pEntry->DebugTxCount,
+				  (pEntry->
+				   DebugTxCount) ? ((pEntry->DebugTxCount -
+						     pEntry->DebugFIFOCount) *
+						    100 /
+						    pEntry->DebugTxCount) : 0));
+			DBGPRINT(RT_DEBUG_OFF, ("\n"));
+
+		}
+	}
+
+	return TRUE;
+}
+
+INT Set_DlsAddEntry_Proc(
+	IN PRTMP_ADAPTER pAd,
+	IN PSTRING arg)
+{
+	UCHAR mac[MAC_ADDR_LEN];
+	USHORT Timeout;
+	PSTRING token;
+	STRING sepValue[] = ":", DASH = '-';
+	INT i;
+	RT_802_11_DLS Dls;
+
+	if (strlen(arg) < 19)	/*Mac address acceptable format 01:02:03:04:05:06 length 17 plus the "-" and timeout value in decimal format. */
+		return FALSE;
+
+	token = strchr(arg, DASH);
+	if ((token != NULL) && (strlen(token) > 1)) {
+		Timeout = (USHORT) simple_strtol((token + 1), 0, 10);
+
+		*token = '\0';
+		for (i = 0, token = rstrtok(arg, &sepValue[0]); token;
+		     token = rstrtok(NULL, &sepValue[0]), i++) {
+			if ((strlen(token) != 2) || (!isxdigit(*token))
+			    || (!isxdigit(*(token + 1))))
+				return FALSE;
+			AtoH(token, (&mac[i]), 1);
+		}
+		if (i != 6)
+			return FALSE;
+
+		DBGPRINT(RT_DEBUG_OFF,
+			 ("\n%02x:%02x:%02x:%02x:%02x:%02x-%d", mac[0], mac[1],
+			  mac[2], mac[3], mac[4], mac[5], (int)Timeout));
+
+		NdisZeroMemory(&Dls, sizeof (RT_802_11_DLS));
+		Dls.TimeOut = Timeout;
+		COPY_MAC_ADDR(Dls.MacAddr, mac);
+		Dls.Valid = 1;
+
+		MlmeEnqueue(pAd,
+			    MLME_CNTL_STATE_MACHINE,
+			    RT_OID_802_11_SET_DLS_PARAM,
+			    sizeof (RT_802_11_DLS), &Dls, 0);
+
+		return TRUE;
+	}
+
+	return FALSE;
+
+}
+
+INT Set_DlsTearDownEntry_Proc(
+	IN PRTMP_ADAPTER pAd,
+	IN PSTRING arg)
+{
+	UCHAR macAddr[MAC_ADDR_LEN];
+	PSTRING value;
+	INT i;
+	RT_802_11_DLS Dls;
+
+	if (strlen(arg) != 17)	/*Mac address acceptable format 01:02:03:04:05:06 length 17 */
+		return FALSE;
+
+	for (i = 0, value = rstrtok(arg, ":"); value;
+	     value = rstrtok(NULL, ":")) {
+		if ((strlen(value) != 2) || (!isxdigit(*value))
+		    || (!isxdigit(*(value + 1))))
+			return FALSE;	/*Invalid */
+
+		AtoH(value, &macAddr[i++], 2);
+	}
+
+	DBGPRINT(RT_DEBUG_OFF,
+		 ("\n%02x:%02x:%02x:%02x:%02x:%02x", macAddr[0], macAddr[1],
+		  macAddr[2], macAddr[3], macAddr[4], macAddr[5]));
+
+	NdisZeroMemory(&Dls, sizeof (RT_802_11_DLS));
+	COPY_MAC_ADDR(Dls.MacAddr, macAddr);
+	Dls.Valid = 0;
+
+	MlmeEnqueue(pAd,
+		    MLME_CNTL_STATE_MACHINE,
+		    RT_OID_802_11_SET_DLS_PARAM,
+		    sizeof (RT_802_11_DLS), &Dls, 0);
+
+	return TRUE;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/sta/rtmp_ckipmic.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/sta/rtmp_ckipmic.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/sta/rtmp_ckipmic.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/sta/rtmp_ckipmic.c	2017-09-23 03:42:49.850675577 +0800
@@ -0,0 +1,569 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+#include "rtmp_ckipmic.h"
+
+#define MIC_ACCUM(v)            pContext->accum += (ULONGLONG)v * RTMPMicGetCoefficient(pContext)
+#define GB(p,i,s)               ( ((ULONG) *((UCHAR*)(p)+i) ) << (s) )
+#define GETBIG32(p)             GB(p,0,24)|GB(p,1,16)|GB(p,2,8)|GB(p,3,0)
+
+/*****************************/
+/******** SBOX Table *********/
+/*****************************/
+
+UCHAR SboxTable[256] =
+{
+    0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5,
+    0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76,
+    0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0,
+    0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0,
+    0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc,
+    0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15,
+    0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a,
+    0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75,
+    0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0,
+    0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84,
+    0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b,
+    0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf,
+    0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85,
+    0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8,
+    0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5,
+    0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2,
+    0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17,
+    0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73,
+    0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88,
+    0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb,
+    0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c,
+    0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79,
+    0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9,
+    0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08,
+    0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6,
+    0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a,
+    0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e,
+    0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e,
+    0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94,
+    0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf,
+    0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68,
+    0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16
+};
+
+/*===========================================================================*/
+/*=================== CKIP KEY PERMUTATION ==================================*/
+/*===========================================================================*/
+
+/* 2-byte by 2-byte subset of the full AES table */
+static const USHORT Sbox[256] =
+{
+    0xC6A5,0xF884,0xEE99,0xF68D,0xFF0D,0xD6BD,0xDEB1,0x9154,
+    0x6050,0x0203,0xCEA9,0x567D,0xE719,0xB562,0x4DE6,0xEC9A,
+    0x8F45,0x1F9D,0x8940,0xFA87,0xEF15,0xB2EB,0x8EC9,0xFB0B,
+    0x41EC,0xB367,0x5FFD,0x45EA,0x23BF,0x53F7,0xE496,0x9B5B,
+    0x75C2,0xE11C,0x3DAE,0x4C6A,0x6C5A,0x7E41,0xF502,0x834F,
+    0x685C,0x51F4,0xD134,0xF908,0xE293,0xAB73,0x6253,0x2A3F,
+    0x080C,0x9552,0x4665,0x9D5E,0x3028,0x37A1,0x0A0F,0x2FB5,
+    0x0E09,0x2436,0x1B9B,0xDF3D,0xCD26,0x4E69,0x7FCD,0xEA9F,
+    0x121B,0x1D9E,0x5874,0x342E,0x362D,0xDCB2,0xB4EE,0x5BFB,
+    0xA4F6,0x764D,0xB761,0x7DCE,0x527B,0xDD3E,0x5E71,0x1397,
+    0xA6F5,0xB968,0x0000,0xC12C,0x4060,0xE31F,0x79C8,0xB6ED,
+    0xD4BE,0x8D46,0x67D9,0x724B,0x94DE,0x98D4,0xB0E8,0x854A,
+    0xBB6B,0xC52A,0x4FE5,0xED16,0x86C5,0x9AD7,0x6655,0x1194,
+    0x8ACF,0xE910,0x0406,0xFE81,0xA0F0,0x7844,0x25BA,0x4BE3,
+    0xA2F3,0x5DFE,0x80C0,0x058A,0x3FAD,0x21BC,0x7048,0xF104,
+    0x63DF,0x77C1,0xAF75,0x4263,0x2030,0xE51A,0xFD0E,0xBF6D,
+    0x814C,0x1814,0x2635,0xC32F,0xBEE1,0x35A2,0x88CC,0x2E39,
+    0x9357,0x55F2,0xFC82,0x7A47,0xC8AC,0xBAE7,0x322B,0xE695,
+    0xC0A0,0x1998,0x9ED1,0xA37F,0x4466,0x547E,0x3BAB,0x0B83,
+    0x8CCA,0xC729,0x6BD3,0x283C,0xA779,0xBCE2,0x161D,0xAD76,
+    0xDB3B,0x6456,0x744E,0x141E,0x92DB,0x0C0A,0x486C,0xB8E4,
+    0x9F5D,0xBD6E,0x43EF,0xC4A6,0x39A8,0x31A4,0xD337,0xF28B,
+    0xD532,0x8B43,0x6E59,0xDAB7,0x018C,0xB164,0x9CD2,0x49E0,
+    0xD8B4,0xACFA,0xF307,0xCF25,0xCAAF,0xF48E,0x47E9,0x1018,
+    0x6FD5,0xF088,0x4A6F,0x5C72,0x3824,0x57F1,0x73C7,0x9751,
+    0xCB23,0xA17C,0xE89C,0x3E21,0x96DD,0x61DC,0x0D86,0x0F85,
+    0xE090,0x7C42,0x71C4,0xCCAA,0x90D8,0x0605,0xF701,0x1C12,
+    0xC2A3,0x6A5F,0xAEF9,0x69D0,0x1791,0x9958,0x3A27,0x27B9,
+    0xD938,0xEB13,0x2BB3,0x2233,0xD2BB,0xA970,0x0789,0x33A7,
+    0x2DB6,0x3C22,0x1592,0xC920,0x8749,0xAAFF,0x5078,0xA57A,
+    0x038F,0x59F8,0x0980,0x1A17,0x65DA,0xD731,0x84C6,0xD0B8,
+    0x82C3,0x29B0,0x5A77,0x1E11,0x7BCB,0xA8FC,0x6DD6,0x2C3A
+    };
+
+#define Lo8(v16)     ((v16)       & 0xFF)
+#define Hi8(v16)    (((v16) >> 8) & 0xFF)
+#define u16Swap(i)  ( (((i) >> 8) & 0xFF) | (((i) << 8) & 0xFF00) )
+#define _S_(i)      (Sbox[Lo8(i)] ^ u16Swap(Sbox[Hi8(i)]))
+
+#define rotLeft_1(x) ((((x) << 1) | ((x) >> 15)) & 0xFFFF)
+VOID CKIP_key_permute
+    (
+     OUT UCHAR  *PK,           /* output permuted key */
+     IN UCHAR *CK,           /* input CKIP key */
+     IN UCHAR  toDsFromDs,    /* input toDs/FromDs bits */
+     IN UCHAR *piv           /* input pointer to IV */
+     )
+{
+    int i;
+    USHORT H[2], tmp;          /* H=32-bits of per-packet hash value */
+    USHORT L[8], R[8];         /* L=u16 array of CK, R=u16 array of PK */
+
+    /* build L from input key */
+    memset(L, 0, sizeof(L));
+    for (i=0; i<16; i++) {
+        L[i>>1] |= ( ((USHORT)(CK[i])) << ( i & 1 ? 8 : 0) );
+    }
+
+    H[0] = (((USHORT)piv[0]) << 8) + piv[1];
+    H[1] = ( ((USHORT)toDsFromDs) << 8) | piv[2];
+
+    for (i=0; i<8; i++) {
+        H[0] ^= L[i];           /* 16-bits of key material */
+        tmp   = _S_(H[0]);      /* 16x16 permutation */
+        H[0]  = tmp ^ H[1];     /* set up for next round */
+        H[1]  = tmp;
+        R[i]  = H[0];           /* store into key array  */
+    }
+    
+    /* sweep in the other direction */
+    tmp=L[0];
+    for (i=7; i>0; i--) {
+        R[i] = tmp = rotLeft_1(tmp) + R[i];
+    }
+    
+    /* IV of the permuted key is unchanged */
+    PK[0] = piv[0];
+    PK[1] = piv[1];
+    PK[2] = piv[2];
+
+    /* key portion of the permuted key is changed */
+    for (i=3; i<16; i++) {
+        PK[i] = (UCHAR) (R[i>>1] >> (i & 1 ? 8 : 0));
+    }
+}    
+
+/* prepare for calculation of a new mic */
+VOID RTMPCkipMicInit(
+    IN  PMIC_CONTEXT        pContext,
+    IN  PUCHAR              CK)
+{
+    /* prepare for new mic calculation */
+    NdisMoveMemory(pContext->CK, CK, sizeof(pContext->CK));
+    pContext->accum = 0;
+    pContext->position = 0;
+}
+
+/* add some bytes to the mic calculation */
+VOID RTMPMicUpdate(
+    IN  PMIC_CONTEXT        pContext,
+    IN  PUCHAR              pOctets,
+    IN  INT                 len)
+{
+    INT     byte_position;
+    ULONG   val;
+
+    byte_position = (pContext->position & 3);
+    while (len > 0) {
+        /* build a 32-bit word for MIC multiply accumulate */
+        do {
+            if (len == 0) return;
+            pContext->part[byte_position++] = *pOctets++;
+            pContext->position++;
+            len--;
+        } while (byte_position < 4);
+        /* have a full 32-bit word to process */
+        val = GETBIG32(&pContext->part[0]);
+        MIC_ACCUM(val);
+        byte_position = 0;
+    }
+}
+
+ULONG RTMPMicGetCoefficient(
+    IN  PMIC_CONTEXT         pContext)
+{
+    UCHAR   aes_counter[16];
+    INT     coeff_position;
+    UCHAR   *p;
+
+    coeff_position = (pContext->position - 1) >> 2;
+    if ( (coeff_position & 3) == 0) {
+        /* fetching the first coefficient -- get new 16-byte aes counter output */
+        u32 counter = (coeff_position >> 2);
+            
+        /* new counter value */
+        memset(&aes_counter[0], 0, sizeof(aes_counter));
+        aes_counter[15] = (UINT8)(counter >> 0);
+        aes_counter[14] = (UINT8)(counter >> 8);
+        aes_counter[13] = (UINT8)(counter >> 16);
+        aes_counter[12] = (UINT8)(counter >> 24);
+
+        RTMPAesEncrypt(&pContext->CK[0], &aes_counter[0], pContext->coefficient);
+    }
+    p = &(pContext->coefficient[ (coeff_position & 3) << 2 ]);
+    return GETBIG32(p);
+}
+
+/****************************************/
+/* aes128k128d()                        */
+/* Performs a 128 bit AES encrypt with  */
+/* 128 bit data.                        */
+/****************************************/
+VOID xor_128(
+    IN  PUCHAR  a,
+    IN  PUCHAR  b,
+    OUT PUCHAR  out)
+{
+    INT i;
+
+    for (i=0;i<16; i++)
+    {
+        out[i] = a[i] ^ b[i];
+    }
+}
+
+UCHAR RTMPCkipSbox(
+    IN  UCHAR   a)
+{
+    return SboxTable[(int)a];
+}
+
+VOID xor_32(
+    IN  PUCHAR  a,
+    IN  PUCHAR  b,
+    OUT PUCHAR  out)
+{
+    INT i;
+
+    for (i=0;i<4; i++)
+    {
+        out[i] = a[i] ^ b[i];
+    }
+}
+
+VOID next_key(
+    IN  PUCHAR  key,
+    IN  INT     round)
+{
+    UCHAR       rcon;
+    UCHAR       sbox_key[4];
+    UCHAR       rcon_table[12] =
+    {
+        0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80,
+        0x1b, 0x36, 0x36, 0x36
+    };
+
+    sbox_key[0] = RTMPCkipSbox(key[13]);
+    sbox_key[1] = RTMPCkipSbox(key[14]);
+    sbox_key[2] = RTMPCkipSbox(key[15]);
+    sbox_key[3] = RTMPCkipSbox(key[12]);
+
+    rcon = rcon_table[round];
+
+    xor_32(&key[0], sbox_key, &key[0]);
+    key[0] = key[0] ^ rcon;
+
+    xor_32(&key[4], &key[0], &key[4]);
+    xor_32(&key[8], &key[4], &key[8]);
+    xor_32(&key[12], &key[8], &key[12]);
+}
+
+VOID byte_sub(
+    IN  PUCHAR  in,
+    OUT PUCHAR  out)
+{
+    INT i;
+
+    for (i=0; i< 16; i++)
+    {
+        out[i] = RTMPCkipSbox(in[i]);
+    }
+}
+
+VOID shift_row(
+    IN  PUCHAR  in,
+    OUT PUCHAR  out)
+{
+    out[0] =  in[0];
+    out[1] =  in[5];
+    out[2] =  in[10];
+    out[3] =  in[15];
+    out[4] =  in[4];
+    out[5] =  in[9];
+    out[6] =  in[14];
+    out[7] =  in[3];
+    out[8] =  in[8];
+    out[9] =  in[13];
+    out[10] = in[2];
+    out[11] = in[7];
+    out[12] = in[12];
+    out[13] = in[1];
+    out[14] = in[6];
+    out[15] = in[11];
+}
+
+VOID mix_column(
+    IN  PUCHAR  in,
+    OUT PUCHAR  out)
+{
+    INT         i;
+    UCHAR       add1b[4];
+    UCHAR       add1bf7[4];
+    UCHAR       rotl[4];
+    UCHAR       swap_halfs[4];
+    UCHAR       andf7[4];
+    UCHAR       rotr[4];
+    UCHAR       temp[4];
+    UCHAR       tempb[4];
+
+    for (i=0 ; i<4; i++)
+    {
+        if ((in[i] & 0x80)== 0x80)
+            add1b[i] = 0x1b;
+        else
+            add1b[i] = 0x00;
+    }
+
+    swap_halfs[0] = in[2];    /* Swap halfs */
+    swap_halfs[1] = in[3];
+    swap_halfs[2] = in[0];
+    swap_halfs[3] = in[1];
+
+    rotl[0] = in[3];        /* Rotate left 8 bits */
+    rotl[1] = in[0];
+    rotl[2] = in[1];
+    rotl[3] = in[2];
+
+    andf7[0] = in[0] & 0x7f;
+    andf7[1] = in[1] & 0x7f;
+    andf7[2] = in[2] & 0x7f;
+    andf7[3] = in[3] & 0x7f;
+
+    for (i = 3; i>0; i--)    /* logical shift left 1 bit */
+    {
+        andf7[i] = andf7[i] << 1;
+        if ((andf7[i-1] & 0x80) == 0x80)
+        {
+            andf7[i] = (andf7[i] | 0x01);
+        }
+    }
+    andf7[0] = andf7[0] << 1;
+    andf7[0] = andf7[0] & 0xfe;
+
+    xor_32(add1b, andf7, add1bf7);
+
+    xor_32(in, add1bf7, rotr);
+
+    temp[0] = rotr[0];         /* Rotate right 8 bits */
+    rotr[0] = rotr[1];
+    rotr[1] = rotr[2];
+    rotr[2] = rotr[3];
+    rotr[3] = temp[0];
+
+    xor_32(add1bf7, rotr, temp);
+    xor_32(swap_halfs, rotl,tempb);
+    xor_32(temp, tempb, out);
+}
+
+VOID RTMPAesEncrypt(
+    IN  PUCHAR  key,
+    IN  PUCHAR  data,
+    IN  PUCHAR  ciphertext)
+{
+    INT             round;
+    INT             i;
+    UCHAR           intermediatea[16];
+    UCHAR           intermediateb[16];
+    UCHAR           round_key[16];
+
+    for(i=0; i<16; i++) round_key[i] = key[i];
+
+    for (round = 0; round < 11; round++)
+    {
+        if (round == 0)
+        {
+            xor_128(round_key, data, ciphertext);
+            next_key(round_key, round); 
+        }
+        else if (round == 10)
+        {
+            byte_sub(ciphertext, intermediatea);
+            shift_row(intermediatea, intermediateb);
+            xor_128(intermediateb, round_key, ciphertext);
+        }
+        else    /* 1 - 9 */
+        {
+            byte_sub(ciphertext, intermediatea);
+            shift_row(intermediatea, intermediateb);
+            mix_column(&intermediateb[0], &intermediatea[0]);
+            mix_column(&intermediateb[4], &intermediatea[4]);
+            mix_column(&intermediateb[8], &intermediatea[8]);
+            mix_column(&intermediateb[12], &intermediatea[12]);
+            xor_128(intermediatea, round_key, ciphertext);
+            next_key(round_key, round);
+        }
+    }
+
+}
+
+/* calculate the mic */
+VOID RTMPMicFinal(
+    IN  PMIC_CONTEXT    pContext,
+    OUT UCHAR           digest[4])
+{
+    INT             byte_position;
+    ULONG           val;
+    ULONGLONG       sum, utmp;
+    LONGLONG        stmp;
+
+    /* deal with partial 32-bit word left over from last update */
+    if ( (byte_position = (pContext->position & 3)) != 0) {
+        /* have a partial word in part to deal with -- zero unused bytes */
+        do {
+            pContext->part[byte_position++] = 0;
+            pContext->position++;
+        } while (byte_position < 4);
+        val = GETBIG32(&pContext->part[0]);
+        MIC_ACCUM(val);
+    }
+
+    /* reduce the accumulated u64 to a 32-bit MIC */
+    sum = pContext->accum;
+    stmp = (sum  & 0xffffffffL) - ((sum >> 32)  * 15);
+    utmp = (stmp & 0xffffffffL) - ((stmp >> 32) * 15);
+    sum = utmp & 0xffffffffL;
+    if (utmp > 0x10000000fL)
+        sum -= 15;
+
+    val = (ULONG)sum;
+    digest[0] = (UCHAR)((val>>24) & 0xFF);
+    digest[1] = (UCHAR) ((val>>16) & 0xFF);
+    digest[2] = (UCHAR) ((val>>8) & 0xFF);
+    digest[3] = (UCHAR)((val>>0) & 0xFF);
+}
+
+VOID RTMPCkipInsertCMIC(
+    IN  PRTMP_ADAPTER   pAd,
+    OUT PUCHAR          pMIC,
+    IN  PUCHAR          p80211hdr,
+    IN  PNDIS_PACKET    pPacket,
+    IN  PCIPHER_KEY     pKey,
+    IN  PUCHAR          mic_snap)
+{
+	PACKET_INFO		PacketInfo;
+	PUCHAR			pSrcBufVA;
+	ULONG			SrcBufLen;
+    PUCHAR          pDA, pSA, pProto;
+    UCHAR           bigethlen[2];
+	UCHAR			ckip_ck[16];
+    MIC_CONTEXT     mic_ctx;
+    USHORT          payloadlen;
+	UCHAR			i;
+
+	if (pKey == NULL)
+	{
+		DBGPRINT_ERR(("RTMPCkipInsertCMIC, Before to form the CKIP key (CK), pKey can't be NULL\n"));
+		return;
+	}
+
+    switch (*(p80211hdr+1) & 3)
+    {
+        case 0: /* FromDs=0, ToDs=0 */
+            pDA = p80211hdr+4;
+            pSA = p80211hdr+10;
+            break;
+        case 1: /* FromDs=0, ToDs=1 */
+            pDA = p80211hdr+16;
+            pSA = p80211hdr+10;
+            break;
+        case 2: /* FromDs=1, ToDs=0 */
+            pDA = p80211hdr+4;
+            pSA = p80211hdr+16;
+            break;
+        case 3: /* FromDs=1, ToDs=1 */
+            pDA = p80211hdr+16;
+            pSA = p80211hdr+24;
+            break;
+    }
+
+	RTMP_QueryPacketInfo(pPacket, &PacketInfo, &pSrcBufVA, &SrcBufLen);
+
+    if (SrcBufLen < LENGTH_802_3)
+        return;
+
+    pProto = pSrcBufVA + 12;
+    payloadlen = PacketInfo.TotalPacketLength - LENGTH_802_3 + 18; /* CKIP_LLC(8)+CMIC(4)+TxSEQ(4)+PROTO(2)=18 */
+    
+    bigethlen[0] = (unsigned char)(payloadlen >> 8);
+    bigethlen[1] = (unsigned char)payloadlen;
+
+	/* */
+	/* Encryption Key expansion to form the CKIP Key (CKIP_CK). */
+	/* */
+	if (pKey->KeyLen < 16)
+	{
+		for(i = 0; i < (16 / pKey->KeyLen); i++)
+		{
+			NdisMoveMemory(ckip_ck + i * pKey->KeyLen, 
+							pKey->Key, 
+							pKey->KeyLen);			
+		}
+		NdisMoveMemory(ckip_ck + i * pKey->KeyLen,
+						pKey->Key,
+						16 - (i * pKey->KeyLen));
+	}
+	else
+	{
+		NdisMoveMemory(ckip_ck, pKey->Key, pKey->KeyLen);
+	}	
+    RTMPCkipMicInit(&mic_ctx, ckip_ck);
+    RTMPMicUpdate(&mic_ctx, pDA, MAC_ADDR_LEN);            /* MIC <-- DA */
+    RTMPMicUpdate(&mic_ctx, pSA, MAC_ADDR_LEN);            /* MIC <-- SA */
+    RTMPMicUpdate(&mic_ctx, bigethlen, 2);                 /* MIC <-- payload length starting from CKIP SNAP */
+    RTMPMicUpdate(&mic_ctx, mic_snap, 8);                  /* MIC <-- snap header */
+    RTMPMicUpdate(&mic_ctx, pAd->StaCfg.TxSEQ, 4);   /* MIC <-- TxSEQ */
+    RTMPMicUpdate(&mic_ctx, pProto, 2);                    /* MIC <-- Protocol */
+
+    pSrcBufVA += LENGTH_802_3;
+    SrcBufLen -= LENGTH_802_3;
+
+    /* Mic <-- original payload. loop until all payload processed */
+    do
+    {
+        if (SrcBufLen > 0)
+            RTMPMicUpdate(&mic_ctx, pSrcBufVA, SrcBufLen); 
+
+		NdisGetNextBuffer(PacketInfo.pFirstBuffer, &PacketInfo.pFirstBuffer);
+        if (PacketInfo.pFirstBuffer)
+        {
+            NDIS_QUERY_BUFFER(PacketInfo.pFirstBuffer, &pSrcBufVA, &SrcBufLen);
+        }
+        else
+            break;
+    } while (TRUE);
+    
+    RTMPMicFinal(&mic_ctx, pMIC);                          /* update MIC */
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/sta/rtmp_data.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/sta/rtmp_data.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/sta/rtmp_data.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/sta/rtmp_data.c	2017-09-23 03:42:49.854675566 +0800
@@ -0,0 +1,3200 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+VOID STARxEAPOLFrameIndicate(
+	IN PRTMP_ADAPTER pAd,
+	IN MAC_TABLE_ENTRY *pEntry,
+	IN RX_BLK *pRxBlk,
+	IN UCHAR FromWhichBSSID)
+{
+	PRXWI_STRUC pRxWI = pRxBlk->pRxWI;
+	UCHAR *pTmpBuf;
+
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+	if (pAd->StaCfg.WpaSupplicantUP) {
+		/* All EAPoL frames have to pass to upper layer (ex. WPA_SUPPLICANT daemon) */
+		/* TBD : process fragmented EAPol frames */
+		{
+			/* In 802.1x mode, if the received frame is EAP-SUCCESS packet, turn on the PortSecured variable */
+			if ((pAd->StaCfg.IEEE8021X == TRUE) &&
+			    (pAd->StaCfg.WepStatus == Ndis802_11WEPEnabled) &&
+			    (EAP_CODE_SUCCESS ==
+			     WpaCheckEapCode(pAd, pRxBlk->pData,
+					     pRxBlk->DataSize,
+					     LENGTH_802_1_H))) {
+				PUCHAR Key;
+				UCHAR CipherAlg;
+				int idx = 0;
+
+				DBGPRINT_RAW(RT_DEBUG_TRACE,
+					     ("Receive EAP-SUCCESS Packet\n"));
+				STA_PORT_SECURED(pAd);
+
+				if (pAd->StaCfg.IEEE8021x_required_keys ==
+				    FALSE) {
+					idx = pAd->StaCfg.DesireSharedKeyId;
+					CipherAlg =
+					    pAd->StaCfg.DesireSharedKey[idx].
+					    CipherAlg;
+					Key =
+					    pAd->StaCfg.DesireSharedKey[idx].
+					    Key;
+
+					if (pAd->StaCfg.DesireSharedKey[idx].
+					    KeyLen > 0) {
+						/* Set key material and cipherAlg to Asic */
+						RTMP_ASIC_SHARED_KEY_TABLE(pAd,
+									   BSS0,
+									   idx,
+									   &pAd->
+									   StaCfg.
+									   DesireSharedKey
+									   [idx]);
+
+						/* STA doesn't need to set WCID attribute for group key */
+
+						/* Assign pairwise key info */
+						RTMP_SET_WCID_SEC_INFO(pAd,
+								       BSS0,
+								       idx,
+								       CipherAlg,
+								       BSSID_WCID,
+								       SHAREDKEYTABLE);
+
+						RTMP_IndicateMediaState(pAd,
+									NdisMediaStateConnected);
+						pAd->ExtraInfo =
+						    GENERAL_LINK_UP;
+
+						/* For Preventing ShardKey Table is cleared by remove key procedure. */
+						pAd->SharedKey[BSS0][idx].
+						    CipherAlg = CipherAlg;
+						pAd->SharedKey[BSS0][idx].
+						    KeyLen =
+						    pAd->StaCfg.
+						    DesireSharedKey[idx].KeyLen;
+						NdisMoveMemory(pAd->
+							       SharedKey[BSS0]
+							       [idx].Key,
+							       pAd->StaCfg.
+							       DesireSharedKey
+							       [idx].Key,
+							       pAd->StaCfg.
+							       DesireSharedKey
+							       [idx].KeyLen);
+					}
+				}
+			}
+
+			Indicate_Legacy_Packet(pAd, pRxBlk, FromWhichBSSID);
+			return;
+		}
+	} else
+#endif /* WPA_SUPPLICANT_SUPPORT */
+	{
+		/*
+		   Special DATA frame that has to pass to MLME
+		   1. Cisco Aironet frames for CCX2. We need pass it to MLME for special process
+		   2. EAPOL handshaking frames when driver supplicant enabled, pass to MLME for special process
+		 */
+		{
+			pTmpBuf = pRxBlk->pData - LENGTH_802_11;
+			NdisMoveMemory(pTmpBuf, pRxBlk->pHeader, LENGTH_802_11);
+			REPORT_MGMT_FRAME_TO_MLME(pAd, pRxWI->WirelessCliID,
+						  pTmpBuf,
+						  pRxBlk->DataSize +
+						  LENGTH_802_11, pRxWI->RSSI0,
+						  pRxWI->RSSI1, pRxWI->RSSI2,
+						  0,
+						  OPMODE_STA);
+			DBGPRINT_RAW(RT_DEBUG_TRACE,
+				     ("!!! report EAPOL DATA to MLME (len=%d) !!!\n",
+				      pRxBlk->DataSize));
+		}
+	}
+
+	RELEASE_NDIS_PACKET(pAd, pRxBlk->pRxPacket, NDIS_STATUS_FAILURE);
+	return;
+
+}
+
+VOID STARxDataFrameAnnounce(
+	IN PRTMP_ADAPTER pAd,
+	IN MAC_TABLE_ENTRY *pEntry,
+	IN RX_BLK *pRxBlk,
+	IN UCHAR FromWhichBSSID)
+{
+
+	/* non-EAP frame */
+	if (!RTMPCheckWPAframe
+	    (pAd, pEntry, pRxBlk->pData, pRxBlk->DataSize, FromWhichBSSID)) {
+		/* before LINK UP, all DATA frames are rejected */
+		if (!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED)) {
+			RELEASE_NDIS_PACKET(pAd, pRxBlk->pRxPacket,
+					    NDIS_STATUS_FAILURE);
+			return;
+		}
+
+
+		{
+			/* drop all non-EAP DATA frame before */
+			/* this client's Port-Access-Control is secured */
+			if (pRxBlk->pHeader->FC.Wep) {
+				/* unsupported cipher suite */
+				if (pAd->StaCfg.WepStatus ==
+				    Ndis802_11EncryptionDisabled) {
+					/* release packet */
+					RELEASE_NDIS_PACKET(pAd,
+							    pRxBlk->pRxPacket,
+							    NDIS_STATUS_FAILURE);
+					return;
+				}
+			} else {
+				/* encryption in-use but receive a non-EAPOL clear text frame, drop it */
+				if ((pAd->StaCfg.WepStatus !=
+				     Ndis802_11EncryptionDisabled)
+				    && (pAd->StaCfg.PortSecured ==
+					WPA_802_1X_PORT_NOT_SECURED)) {
+					/* release packet */
+					RELEASE_NDIS_PACKET(pAd,
+							    pRxBlk->pRxPacket,
+							    NDIS_STATUS_FAILURE);
+					return;
+				}
+			}
+		}
+		RX_BLK_CLEAR_FLAG(pRxBlk, fRX_EAP);
+
+
+		if (!RX_BLK_TEST_FLAG(pRxBlk, fRX_ARALINK)) {
+			/* Normal legacy, AMPDU or AMSDU */
+			CmmRxnonRalinkFrameIndicate(pAd, pRxBlk,
+						    FromWhichBSSID);
+
+		} else {
+			/* ARALINK */
+			CmmRxRalinkFrameIndicate(pAd, pEntry, pRxBlk,
+						 FromWhichBSSID);
+		}
+#ifdef QOS_DLS_SUPPORT
+		RX_BLK_CLEAR_FLAG(pRxBlk, fRX_DLS);
+#endif /* QOS_DLS_SUPPORT */
+	} else {
+		RX_BLK_SET_FLAG(pRxBlk, fRX_EAP);
+#ifdef DOT11_N_SUPPORT
+		if (RX_BLK_TEST_FLAG(pRxBlk, fRX_AMPDU)
+		    && (pAd->CommonCfg.bDisableReordering == 0)) {
+			Indicate_AMPDU_Packet(pAd, pRxBlk, FromWhichBSSID);
+		} else
+#endif /* DOT11_N_SUPPORT */
+		{
+			/* Determin the destination of the EAP frame */
+			/*  to WPA state machine or upper layer */
+			STARxEAPOLFrameIndicate(pAd, pEntry, pRxBlk,
+						FromWhichBSSID);
+		}
+	}
+}
+
+/* For TKIP frame, calculate the MIC value	*/
+BOOLEAN STACheckTkipMICValue(
+	IN PRTMP_ADAPTER pAd,
+	IN MAC_TABLE_ENTRY *pEntry,
+	IN RX_BLK * pRxBlk)
+{
+	PHEADER_802_11 pHeader = pRxBlk->pHeader;
+	UCHAR *pData = pRxBlk->pData;
+	USHORT DataSize = pRxBlk->DataSize;
+	UCHAR UserPriority = pRxBlk->UserPriority;
+	PCIPHER_KEY pWpaKey;
+	UCHAR *pDA, *pSA;
+
+	pWpaKey = &pAd->SharedKey[BSS0][pRxBlk->pRxWI->KeyIndex];
+
+	pDA = pHeader->Addr1;
+	if (RX_BLK_TEST_FLAG(pRxBlk, fRX_INFRA)) {
+		pSA = pHeader->Addr3;
+	} else {
+		pSA = pHeader->Addr2;
+	}
+
+	if (RTMPTkipCompareMICValue(pAd,
+				    pData,
+				    pDA,
+				    pSA,
+				    pWpaKey->RxMic,
+				    UserPriority, DataSize) == FALSE) {
+		DBGPRINT_RAW(RT_DEBUG_ERROR, ("Rx MIC Value error 2\n"));
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+		if (pAd->StaCfg.WpaSupplicantUP) {
+			WpaSendMicFailureToWpaSupplicant(pAd->net_dev,
+							 (pWpaKey->Type ==
+							  PAIRWISEKEY) ? TRUE :
+							 FALSE);
+		} else
+#endif /* WPA_SUPPLICANT_SUPPORT */
+		{
+			RTMPReportMicError(pAd, pWpaKey);
+		}
+
+		/* release packet */
+		RELEASE_NDIS_PACKET(pAd, pRxBlk->pRxPacket,
+				    NDIS_STATUS_FAILURE);
+		return FALSE;
+	}
+
+	return TRUE;
+}
+
+
+/*
+ All Rx routines use RX_BLK structure to hande rx events
+ It is very important to build pRxBlk attributes
+  1. pHeader pointer to 802.11 Header
+  2. pData pointer to payload including LLC (just skip Header)
+  3. set payload size including LLC to DataSize
+  4. set some flags with RX_BLK_SET_FLAG()
+*/
+VOID STAHandleRxDataFrame(
+	IN PRTMP_ADAPTER pAd,
+	IN RX_BLK *pRxBlk)
+{
+	PRT28XX_RXD_STRUC pRxD = &(pRxBlk->RxD);
+	PRXWI_STRUC pRxWI = pRxBlk->pRxWI;
+	PHEADER_802_11 pHeader = pRxBlk->pHeader;
+	PNDIS_PACKET pRxPacket = pRxBlk->pRxPacket;
+	BOOLEAN bFragment = FALSE;
+	MAC_TABLE_ENTRY *pEntry = NULL;
+	UCHAR FromWhichBSSID = BSS0;
+	UCHAR UserPriority = 0;
+
+	if ((pHeader->FC.FrDs == 1) && (pHeader->FC.ToDs == 1)) {
+#ifdef CLIENT_WDS
+			if ((pRxWI->WirelessCliID < MAX_LEN_OF_MAC_TABLE)
+			    && IS_ENTRY_CLIENT(&pAd->MacTab.
+					       Content[pRxWI->WirelessCliID])) {
+			RX_BLK_SET_FLAG(pRxBlk, fRX_WDS);
+		} else
+#endif /* CLIENT_WDS */
+		{		/* release packet */
+			RELEASE_NDIS_PACKET(pAd, pRxPacket,
+					    NDIS_STATUS_FAILURE);
+			return;
+		}
+	} else {
+
+
+#ifdef QOS_DLS_SUPPORT
+		if (RTMPRcvFrameDLSCheck
+		    (pAd, pHeader, pRxWI->MPDUtotalByteCount, pRxD)) {
+			return;
+		}
+#endif /* QOS_DLS_SUPPORT */
+
+		/* Drop not my BSS frames */
+		if (pRxD->MyBss == 0) {
+			{
+				/* release packet */
+				RELEASE_NDIS_PACKET(pAd, pRxPacket,
+						    NDIS_STATUS_FAILURE);
+				return;
+			}
+		}
+
+		pAd->RalinkCounters.RxCountSinceLastNULL++;
+		if (pAd->CommonCfg.bAPSDCapable
+		    && pAd->CommonCfg.APEdcaParm.bAPSDCapable
+		    && (pHeader->FC.SubType & 0x08)) {
+			UCHAR *pData;
+			DBGPRINT(RT_DEBUG_INFO, ("bAPSDCapable\n"));
+
+			/* Qos bit 4 */
+			pData = (PUCHAR) pHeader + LENGTH_802_11;
+			if ((*pData >> 4) & 0x01) {
+				DBGPRINT(RT_DEBUG_INFO,
+					 ("RxDone- Rcv EOSP frame, driver may fall into sleep\n"));
+				pAd->CommonCfg.bInServicePeriod = FALSE;
+
+				/* Force driver to fall into sleep mode when rcv EOSP frame */
+				if (!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE)) {
+
+#ifdef RTMP_MAC_USB
+					RTEnqueueInternalCmd(pAd,
+							     CMDTHREAD_FORCE_SLEEP_AUTO_WAKEUP,
+							     NULL, 0);
+#endif /* RTMP_MAC_USB */
+				}
+			}
+
+			if ((pHeader->FC.MoreData)
+			    && (pAd->CommonCfg.bInServicePeriod)) {
+				DBGPRINT(RT_DEBUG_TRACE,
+					 ("Sending another trigger frame when More Data bit is set to 1\n"));
+			}
+		}
+
+		/* Drop NULL, CF-ACK(no data), CF-POLL(no data), and CF-ACK+CF-POLL(no data) data frame */
+		if ((pHeader->FC.SubType & 0x04)) {	/* bit 2 : no DATA */
+			/* release packet */
+			RELEASE_NDIS_PACKET(pAd, pRxPacket,
+					    NDIS_STATUS_FAILURE);
+			return;
+		}
+
+		if (pAd->StaCfg.BssType == BSS_INFRA) {
+			/* Infrastructure mode, check address 2 for BSSID */
+			if (1
+#ifdef QOS_DLS_SUPPORT
+			    && (!pAd->CommonCfg.bDLSCapable)
+#endif /* QOS_DLS_SUPPORT */
+			    ) {
+				if (!RTMPEqualMemory
+				    (&pHeader->Addr2, &pAd->MlmeAux.Bssid, 6)) {
+					/* Receive frame not my BSSID */
+					/* release packet */
+					RELEASE_NDIS_PACKET(pAd, pRxPacket,
+							    NDIS_STATUS_FAILURE);
+					return;
+				}
+			}
+		} else {	/* Ad-Hoc mode or Not associated */
+
+			/* Ad-Hoc mode, check address 3 for BSSID */
+			if (!RTMPEqualMemory
+			    (&pHeader->Addr3, &pAd->CommonCfg.Bssid, 6)) {
+				/* Receive frame not my BSSID */
+				/* release packet */
+				RELEASE_NDIS_PACKET(pAd, pRxPacket,
+						    NDIS_STATUS_FAILURE);
+				return;
+			}
+		}
+
+		/*/ find pEntry */
+		if (pRxWI->WirelessCliID < MAX_LEN_OF_MAC_TABLE) {
+			pEntry = &pAd->MacTab.Content[pRxWI->WirelessCliID];
+
+		} else {
+			RELEASE_NDIS_PACKET(pAd, pRxPacket,
+					    NDIS_STATUS_FAILURE);
+			return;
+		}
+
+		/* infra or ad-hoc */
+		if (pAd->StaCfg.BssType == BSS_INFRA) {
+			RX_BLK_SET_FLAG(pRxBlk, fRX_INFRA);
+#if defined(DOT11Z_TDLS_SUPPORT) || defined(QOS_DLS_SUPPORT)
+			if ((pHeader->FC.FrDs == 0) && (pHeader->FC.ToDs == 0))
+				RX_BLK_SET_FLAG(pRxBlk, fRX_DLS);
+			else
+#endif
+				ASSERT(pRxWI->WirelessCliID == BSSID_WCID);
+		}
+
+		/* check Atheros Client */
+		if ((pEntry->bIAmBadAtheros == FALSE) && (pRxD->AMPDU == 1)
+		    && (pHeader->FC.Retry)) {
+			pEntry->bIAmBadAtheros = TRUE;
+			pAd->CommonCfg.IOTestParm.bCurrentAtheros = TRUE;
+			pAd->CommonCfg.IOTestParm.bLastAtheros = TRUE;
+			if (!STA_AES_ON(pAd)) {
+				AsicUpdateProtect(pAd, 8, ALLN_SETPROTECT, TRUE,
+						  FALSE);
+			}
+		}
+	}
+
+	pRxBlk->pData = (UCHAR *) pHeader;
+
+	/*
+	   update RxBlk->pData, DataSize
+	   802.11 Header, QOS, HTC, Hw Padding
+	 */
+	/* 1. skip 802.11 HEADER */
+#ifdef CLIENT_WDS
+	if (RX_BLK_TEST_FLAG(pRxBlk, fRX_WDS)) {
+		pRxBlk->pData += LENGTH_802_11_WITH_ADDR4;
+		pRxBlk->DataSize -= LENGTH_802_11_WITH_ADDR4;
+	} else
+#endif /* CLIENT_WDS */
+	{
+		pRxBlk->pData += LENGTH_802_11;
+		pRxBlk->DataSize -= LENGTH_802_11;
+	}
+
+	/* 2. QOS */
+	if (pHeader->FC.SubType & 0x08) {
+		RX_BLK_SET_FLAG(pRxBlk, fRX_QOS);
+		UserPriority = *(pRxBlk->pData) & 0x0f;
+		/* bit 7 in QoS Control field signals the HT A-MSDU format */
+		if ((*pRxBlk->pData) & 0x80) {
+			RX_BLK_SET_FLAG(pRxBlk, fRX_AMSDU);
+		}
+
+		/* skip QOS contorl field */
+		pRxBlk->pData += 2;
+		pRxBlk->DataSize -= 2;
+	}
+	pRxBlk->UserPriority = UserPriority;
+
+	/* check if need to resend PS Poll when received packet with MoreData = 1 */
+	if ((pAd->StaCfg.Psm == PWR_SAVE) && (pHeader->FC.MoreData == 1)) {
+		if ((((UserPriority == 0) || (UserPriority == 3)) &&
+		     pAd->CommonCfg.bAPSDAC_BE == 0) ||
+		    (((UserPriority == 1) || (UserPriority == 2)) &&
+		     pAd->CommonCfg.bAPSDAC_BK == 0) ||
+		    (((UserPriority == 4) || (UserPriority == 5)) &&
+		     pAd->CommonCfg.bAPSDAC_VI == 0) ||
+		    (((UserPriority == 6) || (UserPriority == 7)) &&
+		     pAd->CommonCfg.bAPSDAC_VO == 0)) {
+			/* non-UAPSD delivery-enabled AC */
+			RTMP_PS_POLL_ENQUEUE(pAd);
+		}
+	}
+
+	/* 3. Order bit: A-Ralink or HTC+ */
+	if (pHeader->FC.Order) {
+#ifdef AGGREGATION_SUPPORT
+		if ((pRxWI->PHYMODE <= MODE_OFDM)
+		    && (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_AGGREGATION_INUSED)))
+		{
+			RX_BLK_SET_FLAG(pRxBlk, fRX_ARALINK);
+		} else
+#endif /* AGGREGATION_SUPPORT */
+		{
+#ifdef DOT11_N_SUPPORT
+			RX_BLK_SET_FLAG(pRxBlk, fRX_HTC);
+			/* skip HTC contorl field */
+			pRxBlk->pData += 4;
+			pRxBlk->DataSize -= 4;
+#endif /* DOT11_N_SUPPORT */
+		}
+	}
+
+	/* 4. skip HW padding */
+	if (pRxD->L2PAD) {
+		/* just move pData pointer */
+		/* because DataSize excluding HW padding */
+		RX_BLK_SET_FLAG(pRxBlk, fRX_PAD);
+		pRxBlk->pData += 2;
+	}
+#ifdef DOT11_N_SUPPORT
+	if (pRxD->BA) {
+		RX_BLK_SET_FLAG(pRxBlk, fRX_AMPDU);
+	}
+#endif /* DOT11_N_SUPPORT */
+
+#if defined(SOFT_ENCRYPT) || defined(ADHOC_WPA2PSK_SUPPORT)
+	/* Use software to decrypt the encrypted frame if necessary.
+	   If a received "encrypted" unicast packet(its WEP bit as 1) 
+	   and it's passed to driver with "Decrypted" marked as 0 in RxD. */
+	if ((pHeader->FC.Wep == 1) && (pRxD->Decrypted == 0)) {
+		PCIPHER_KEY pSwKey = NULL;
+
+		/* Cipher key table selection */
+		if ((pSwKey = RTMPSwCipherKeySelection(pAd,
+						       pRxBlk->pData,
+						       pRxBlk,
+						       pEntry)) == NULL) {
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("No vaild cipher key for SW decryption!!!\n"));
+			/* release packet       */
+			RELEASE_NDIS_PACKET(pAd, pRxPacket,
+					    NDIS_STATUS_FAILURE);
+			return;
+		}
+
+		/* Decryption by Software */
+		if (RTMPSoftDecryptionAction(pAd,
+					     (PUCHAR) pHeader,
+					     UserPriority,
+					     pSwKey,
+					     pRxBlk->pData,
+					     &(pRxBlk->DataSize)) !=
+		    NDIS_STATUS_SUCCESS) {
+			/* release packet */
+			RELEASE_NDIS_PACKET(pAd, pRxPacket,
+					    NDIS_STATUS_FAILURE);
+			return;
+		}
+		/* Record the Decrypted bit as 1 */
+		pRxD->Decrypted = 1;
+	}
+#endif /* SOFT_ENCRYPT || ADHOC_WPA2PSK_SUPPORT */
+
+	/* Case I  Process Broadcast & Multicast data frame */
+	if (pRxD->Bcast || pRxD->Mcast) {
+#ifdef STATS_COUNT_SUPPORT
+		INC_COUNTER64(pAd->WlanCounters.MulticastReceivedFrameCount);
+#endif /* STATS_COUNT_SUPPORT */
+
+		/* Drop Mcast/Bcast frame with fragment bit on */
+		if (pHeader->FC.MoreFrag) {
+			/* release packet */
+			RELEASE_NDIS_PACKET(pAd, pRxPacket,
+					    NDIS_STATUS_FAILURE);
+			return;
+		}
+
+		/* Filter out Bcast frame which AP relayed for us */
+		if (pHeader->FC.FrDs
+		    && MAC_ADDR_EQUAL(pHeader->Addr3, pAd->CurrentAddress)) {
+			/* release packet */
+			RELEASE_NDIS_PACKET(pAd, pRxPacket,
+					    NDIS_STATUS_FAILURE);
+			return;
+		}
+
+		if (ADHOC_ON(pAd)) {
+			MAC_TABLE_ENTRY *pAdhocEntry = NULL;
+			pAdhocEntry = MacTableLookup(pAd, pHeader->Addr2);
+			if (pAdhocEntry)
+				Update_Rssi_Sample(pAd,
+						   &pAdhocEntry->RssiSample,
+						   pRxWI);
+		}
+
+		Indicate_Legacy_Packet(pAd, pRxBlk, FromWhichBSSID);
+		return;
+	} else if (pRxD->U2M) {
+		pAd->LastRxRate =
+		    (USHORT) ((pRxWI->MCS) + (pRxWI->BW << 7) +
+			      (pRxWI->ShortGI << 8) + (pRxWI->PHYMODE << 14));
+
+#if defined(DOT11Z_TDLS_SUPPORT) || defined(QOS_DLS_SUPPORT)
+		if (RX_BLK_TEST_FLAG(pRxBlk, fRX_DLS)) {
+			MAC_TABLE_ENTRY *pDlsEntry = NULL;
+
+			pDlsEntry = &pAd->MacTab.Content[pRxWI->WirelessCliID];
+			if (pDlsEntry
+			    && (pRxWI->WirelessCliID < MAX_LEN_OF_MAC_TABLE)) {
+				Update_Rssi_Sample(pAd, &pDlsEntry->RssiSample,
+						   pRxWI);
+				NdisAcquireSpinLock(&pAd->MacTabLock);
+				pDlsEntry->NoDataIdleCount = 0;
+				NdisReleaseSpinLock(&pAd->MacTabLock);
+			}
+		} else
+#endif
+		if (ADHOC_ON(pAd)) {
+			MAC_TABLE_ENTRY *pAdhocEntry = NULL;
+			pAdhocEntry = MacTableLookup(pAd, pHeader->Addr2);
+			if (pAdhocEntry)
+				Update_Rssi_Sample(pAd,
+						   &pAdhocEntry->RssiSample,
+						   pRxWI);
+		}
+
+		Update_Rssi_Sample(pAd, &pAd->StaCfg.RssiSample, pRxWI);
+
+		pAd->StaCfg.LastSNR0 = (UCHAR) (pRxWI->SNR0);
+		pAd->StaCfg.LastSNR1 = (UCHAR) (pRxWI->SNR1);
+
+
+
+		pAd->RalinkCounters.OneSecRxOkDataCnt++;
+
+
+#ifdef RTMP_MAC_USB
+		/* there's packet sent to me, keep awake for 1200ms */
+		if (pAd->CountDowntoPsm < 12)
+			pAd->CountDowntoPsm = 12;
+#endif /* RTMP_MAC_USB */
+
+		if (!((pHeader->Frag == 0) && (pHeader->FC.MoreFrag == 0))) {
+			/* re-assemble the fragmented packets */
+			/* return complete frame (pRxPacket) or NULL */
+			bFragment = TRUE;
+			pRxPacket = RTMPDeFragmentDataFrame(pAd, pRxBlk);
+		}
+
+		if (pRxPacket) {
+			pEntry = &pAd->MacTab.Content[pRxWI->WirelessCliID];
+
+			/* process complete frame */
+			if (bFragment && (pRxD->Decrypted)
+			    && (pEntry->WepStatus ==
+				Ndis802_11Encryption2Enabled)) {
+				/* Minus MIC length */
+				pRxBlk->DataSize -= 8;
+
+				/* For TKIP frame, calculate the MIC value      */
+				if (STACheckTkipMICValue(pAd, pEntry, pRxBlk) ==
+				    FALSE) {
+					return;
+				}
+			}
+
+			STARxDataFrameAnnounce(pAd, pEntry, pRxBlk,
+					       FromWhichBSSID);
+			return;
+		} else {
+			/*
+			   just return 
+			   because RTMPDeFragmentDataFrame() will release rx packet, 
+			   if packet is fragmented
+			 */
+			return;
+		}
+	}
+#ifdef XLINK_SUPPORT
+	else if (pAd->StaCfg.PSPXlink) {
+		Indicate_Legacy_Packet(pAd, pRxBlk, FromWhichBSSID);
+		return;
+	}
+#endif /* XLINK_SUPPORT */
+
+	ASSERT(0);
+	/* release packet */
+	RELEASE_NDIS_PACKET(pAd, pRxPacket, NDIS_STATUS_FAILURE);
+}
+
+VOID STAHandleRxMgmtFrame(
+	IN PRTMP_ADAPTER pAd,
+	IN RX_BLK *pRxBlk)
+{
+#ifdef ANT_DIVERSITY_SUPPORT
+	PRT28XX_RXD_STRUC pRxD = &(pRxBlk->RxD);
+#endif /* ANT_DIVERSITY_SUPPORT */
+	PRXWI_STRUC pRxWI = pRxBlk->pRxWI;
+	PHEADER_802_11 pHeader = pRxBlk->pHeader;
+	PNDIS_PACKET pRxPacket = pRxBlk->pRxPacket;
+	UCHAR MinSNR = 0;
+
+	do {
+
+		/* check if need to resend PS Poll when received packet with MoreData = 1 */
+		if ((pAd->StaCfg.Psm == PWR_SAVE)
+		    && (pHeader->FC.MoreData == 1)) {
+			/* for UAPSD, all management frames will be VO priority */
+			if (pAd->CommonCfg.bAPSDAC_VO == 0) {
+				/* non-UAPSD delivery-enabled AC */
+				RTMP_PS_POLL_ENQUEUE(pAd);
+			}
+		}
+
+		/* TODO: if MoreData == 0, station can go to sleep */
+
+		/* We should collect RSSI not only U2M data but also my beacon */
+		if ((pHeader->FC.SubType == SUBTYPE_BEACON)
+		    && (MAC_ADDR_EQUAL(&pAd->CommonCfg.Bssid, &pHeader->Addr2))
+		    && (pAd->RxAnt.EvaluatePeriod == 0)) {
+			Update_Rssi_Sample(pAd, &pAd->StaCfg.RssiSample, pRxWI);
+
+			pAd->StaCfg.LastSNR0 = (UCHAR) (pRxWI->SNR0);
+			pAd->StaCfg.LastSNR1 = (UCHAR) (pRxWI->SNR1);
+		}
+
+		if ((pHeader->FC.SubType == SUBTYPE_BEACON) &&
+		    (ADHOC_ON(pAd)) &&
+		    (pRxWI->WirelessCliID < MAX_LEN_OF_MAC_TABLE)) {
+			MAC_TABLE_ENTRY *pEntry = NULL;
+			pEntry = &pAd->MacTab.Content[pRxWI->WirelessCliID];
+			if (pEntry)
+				Update_Rssi_Sample(pAd, &pEntry->RssiSample,
+						   pRxWI);
+		}
+#ifdef RT30xx
+#ifdef ANT_DIVERSITY_SUPPORT
+		/* collect rssi information for antenna diversity */
+		if (((pAd->NicConfig2.field.AntDiversity) 
+#if TXRX_SW_ANTDIV_SUPPORT
+			|| (pAd->chipCap.bTxRxSwAntDiv)	
+#endif
+			) && (pAd->CommonCfg.bRxAntDiversity != ANT_DIVERSITY_DISABLE)) {
+			if ((pRxD->U2M)
+			    || ((pHeader->FC.SubType == SUBTYPE_BEACON)
+				&&
+				(MAC_ADDR_EQUAL
+				 (&pAd->CommonCfg.Bssid, &pHeader->Addr2)))) {
+				STA_COLLECT_RX_ANTENNA_AVERAGE_RSSI(pAd, ConvertToRssi(pAd, (UCHAR) pRxWI->RSSI0, RSSI_0), 0);	/* Note: RSSI2 not used on RT73 */
+				pAd->StaCfg.NumOfAvgRssiSample++;
+			}
+		}
+#endif /* ANT_DIVERSITY_SUPPORT */
+#endif /* RT30xx */
+
+		/* First check the size, it MUST not exceed the mlme queue size */
+		if (pRxWI->MPDUtotalByteCount > MGMT_DMA_BUFFER_SIZE) {
+			DBGPRINT_ERR(("STAHandleRxMgmtFrame: frame too large, size = %d \n", pRxWI->MPDUtotalByteCount));
+			break;
+		}
+
+		MinSNR = min((CHAR) pRxWI->SNR0, (CHAR) pRxWI->SNR1);
+		/* 
+		   Signal in MLME_QUEUE isn't used, therefore take this item to save min SNR.
+		 */
+		REPORT_MGMT_FRAME_TO_MLME(pAd, pRxWI->WirelessCliID, pHeader,
+					  pRxWI->MPDUtotalByteCount,
+					  pRxWI->RSSI0, pRxWI->RSSI1,
+					  pRxWI->RSSI2, MinSNR,
+					  OPMODE_STA);
+	} while (FALSE);
+
+	RELEASE_NDIS_PACKET(pAd, pRxPacket, NDIS_STATUS_SUCCESS);
+}
+
+VOID STAHandleRxControlFrame(
+	IN PRTMP_ADAPTER pAd,
+	IN RX_BLK *pRxBlk)
+{
+#ifdef DOT11_N_SUPPORT
+	PRXWI_STRUC pRxWI = pRxBlk->pRxWI;
+#endif /* DOT11_N_SUPPORT */
+	PHEADER_802_11 pHeader = pRxBlk->pHeader;
+	PNDIS_PACKET pRxPacket = pRxBlk->pRxPacket;
+	BOOLEAN retStatus;
+	NDIS_STATUS status = NDIS_STATUS_FAILURE;
+
+	switch (pHeader->FC.SubType) {
+	case SUBTYPE_BLOCK_ACK_REQ:
+#ifdef DOT11_N_SUPPORT
+		{
+			retStatus =
+			    CntlEnqueueForRecv(pAd, pRxWI->WirelessCliID,
+					       (pRxWI->MPDUtotalByteCount),
+					       (PFRAME_BA_REQ) pHeader);
+			status =
+			    (retStatus ==
+			     TRUE) ? NDIS_STATUS_SUCCESS : NDIS_STATUS_FAILURE;
+		}
+		break;
+#endif /* DOT11_N_SUPPORT */
+	case SUBTYPE_BLOCK_ACK:
+	case SUBTYPE_ACK:
+	default:
+		break;
+	}
+
+	RELEASE_NDIS_PACKET(pAd, pRxPacket, status);
+}
+
+/*
+	========================================================================
+
+	Routine Description:
+		Process RxDone interrupt, running in DPC level
+
+	Arguments:
+		pAd Pointer to our adapter
+
+	Return Value:
+		None
+
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+		This routine has to maintain Rx ring read pointer.
+		Need to consider QOS DATA format when converting to 802.3
+	========================================================================
+*/
+BOOLEAN STARxDoneInterruptHandle(
+	IN PRTMP_ADAPTER pAd,
+	IN BOOLEAN argc)
+{
+	NDIS_STATUS Status;
+	UINT32 RxProcessed, RxPending;
+	BOOLEAN bReschedule = FALSE;
+	RT28XX_RXD_STRUC *pRxD;
+	UCHAR *pData;
+	PRXWI_STRUC pRxWI;
+	PNDIS_PACKET pRxPacket;
+	PHEADER_802_11 pHeader;
+	RX_BLK RxCell;
+
+	RxProcessed = RxPending = 0;
+
+	/* process whole rx ring */
+	while (1) {
+
+		if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF |
+				   fRTMP_ADAPTER_RESET_IN_PROGRESS |
+				   fRTMP_ADAPTER_HALT_IN_PROGRESS |
+				   fRTMP_ADAPTER_NIC_NOT_EXIST) ||
+		    !RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_START_UP)) {
+			break;
+		}
+
+		RxProcessed++;
+
+		/*
+		   1. allocate a new data packet into rx ring to replace received packet 
+		   then processing the received packet
+		   2. the callee must take charge of release of packet
+		   3. As far as driver is concerned ,
+		   the rx packet must 
+		   a. be indicated to upper layer or 
+		   b. be released if it is discarded
+		 */
+		pRxPacket =
+		    GetPacketFromRxRing(pAd, &(RxCell.RxD), &bReschedule,
+					&RxPending);
+		if (pRxPacket == NULL) {
+			/* no more packet to process */
+			break;
+		}
+
+		/* get rx ring descriptor */
+		pRxD = &(RxCell.RxD);
+		/* get rx data buffer */
+		pData = GET_OS_PKT_DATAPTR(pRxPacket);
+		pRxWI = (PRXWI_STRUC) pData;
+		pHeader = (PHEADER_802_11) (pData + RXWI_SIZE);
+
+#ifdef RT_BIG_ENDIAN
+		RTMPFrameEndianChange(pAd, (PUCHAR) pHeader, DIR_READ, TRUE);
+		RTMPWIEndianChange((PUCHAR) pRxWI, TYPE_RXWI);
+#endif
+
+		/* build RxCell */
+		RxCell.pRxWI = pRxWI;
+		RxCell.pHeader = pHeader;
+		RxCell.pRxPacket = pRxPacket;
+		RxCell.pData = (UCHAR *) pHeader;
+		RxCell.DataSize = pRxWI->MPDUtotalByteCount;
+		RxCell.Flags = 0;
+		SET_OPMODE_STA(&RxCell);
+
+		/* Increase Total receive byte counter after real data received no mater any error or not */
+		pAd->RalinkCounters.ReceivedByteCount +=
+		    pRxWI->MPDUtotalByteCount;
+		pAd->RalinkCounters.OneSecReceivedByteCount +=
+		    pRxWI->MPDUtotalByteCount;
+		pAd->RalinkCounters.RxCount++;
+
+#ifdef STATS_COUNT_SUPPORT
+		INC_COUNTER64(pAd->WlanCounters.ReceivedFragmentCount);
+#endif /* STATS_COUNT_SUPPORT */
+
+		if (pRxWI->MPDUtotalByteCount < 14)
+			Status = NDIS_STATUS_FAILURE;
+
+		if (MONITOR_ON(pAd)) {
+			STA_MonPktSend(pAd, &RxCell);
+			break;
+		}
+
+		/* STARxDoneInterruptHandle() is called in rtusb_bulk.c */
+#ifdef RALINK_ATE
+		if (ATE_ON(pAd)) {
+			pAd->ate.RxCntPerSec++;
+			ATESampleRssi(pAd, pRxWI);
+#ifdef RALINK_QA
+			if (pAd->ate.bQARxStart == TRUE) {
+				/* (*pRxD) has been swapped in GetPacketFromRxRing() */
+				ATE_QA_Statistics(pAd, pRxWI, pRxD, pHeader);
+			}
+#endif /* RALINK_QA */
+			RELEASE_NDIS_PACKET(pAd, pRxPacket,
+					    NDIS_STATUS_SUCCESS);
+			continue;
+		}
+#endif /* RALINK_ATE */
+
+		/* Check for all RxD errors */
+		Status = RTMPCheckRxError(pAd, pHeader, pRxWI, pRxD);
+
+		/* Handle the received frame */
+		if (Status == NDIS_STATUS_SUCCESS) {
+#ifdef RTMP_FREQ_CALIBRATION_SUPPORT
+			if ((pAd->FreqCalibrationCtrl.
+			     bEnableFrequencyCalibration == TRUE)
+			    && (INFRA_ON(pAd)) && (pRxD->Crc == 0)
+			    && (pHeader->FC.Type == BTYPE_MGMT)
+			    && (pHeader->FC.SubType == SUBTYPE_BEACON)
+			    &&
+			    (MAC_ADDR_EQUAL
+			     (&pAd->CommonCfg.Bssid, &pHeader->Addr2))) {
+				RTMP_CHIP_ASIC_FREQ_OFFSET_GET(pAd, pRxWI,
+							       pAd->
+							       FreqCalibrationCtrl.
+							       LatestFreqOffsetOverBeacon);
+				pAd->FreqCalibrationCtrl.BeaconPhyMode =
+				    (UCHAR) (pRxWI->PHYMODE);
+
+				DBGPRINT(RT_DEBUG_TRACE,
+					 ("%s: Beacon, CRC error = %d, pHeader->Sequence = %d, SA = %02X:%02X:%02X:%02X:%02X:%02X, frequency offset = %d, MCS = %d, BW = %d PHYMODE = %d\n",
+					  __FUNCTION__, pRxD->Crc,
+					  pHeader->Sequence, pHeader->Addr2[0],
+					  pHeader->Addr2[1], pHeader->Addr2[2],
+					  pHeader->Addr2[3], pHeader->Addr2[4],
+					  pHeader->Addr2[5],
+					  ((CHAR) (pRxWI->FOFFSET)), pRxWI->MCS,
+					  pRxWI->BW, pRxWI->PHYMODE));
+			}
+#endif /* RTMP_FREQ_CALIBRATION_SUPPORT */
+
+			switch (pHeader->FC.Type) {
+				/* CASE I, receive a DATA frame */
+			case BTYPE_DATA:
+				{
+					/* process DATA frame */
+					STAHandleRxDataFrame(pAd, &RxCell);
+				}
+				break;
+				/* CASE II, receive a MGMT frame */
+			case BTYPE_MGMT:
+				{
+					STAHandleRxMgmtFrame(pAd, &RxCell);
+				}
+				break;
+				/* CASE III. receive a CNTL frame */
+			case BTYPE_CNTL:
+				{
+					STAHandleRxControlFrame(pAd, &RxCell);
+				}
+				break;
+				/* discard other type */
+			default:
+				RELEASE_NDIS_PACKET(pAd, pRxPacket,
+						    NDIS_STATUS_FAILURE);
+				break;
+			}
+		} else {
+			pAd->Counters8023.RxErrors++;
+			/* discard this frame */
+			RELEASE_NDIS_PACKET(pAd, pRxPacket,
+					    NDIS_STATUS_FAILURE);
+		}
+	}
+
+	return bReschedule;
+}
+
+BOOLEAN STAHandleRxDonePacket(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	PNDIS_PACKET	pRxPacket,
+	IN	RX_BLK			*pRxCell)
+{
+	RT28XX_RXD_STRUC	*pRxD;
+	PRXWI_STRUC		pRxWI;
+	PHEADER_802_11	pHeader;
+	BOOLEAN		bReschedule = FALSE;
+	NDIS_STATUS			Status;
+
+	SET_OPMODE_STA(pRxCell);
+	/*pRxCell->OpMode = OPMODE_STA;*/
+	pRxWI = pRxCell->pRxWI;
+	pRxD = &pRxCell->RxD;
+	pHeader = pRxCell->pHeader;
+
+	if (MONITOR_ON(pAd))
+	{
+		/*send_monitor_packets(pAd, pRxCell, RTMPMaxRssi, ConvertToRssi);*/
+		STA_MonPktSend(pAd, pRxCell);
+		return bReschedule;
+	}
+
+	/* STARxDoneInterruptHandle() is called in rtusb_bulk.c */
+#ifdef RALINK_ATE
+	if (ATE_ON(pAd))
+	{
+		pAd->ate.RxCntPerSec++;
+		ATESampleRssi(pAd, pRxWI);
+#ifdef RALINK_QA
+		if (pAd->ate.bQARxStart == TRUE)
+		{
+			/* (*pRxD) has been swapped in GetPacketFromRxRing() */
+			ATE_QA_Statistics(pAd, pRxWI, pRxD,	pHeader);
+		}
+#endif /* RALINK_QA */
+		RELEASE_NDIS_PACKET(pAd, pRxPacket, NDIS_STATUS_SUCCESS);
+		return bReschedule;
+	}
+#endif /* RALINK_ATE */
+
+	/* Check for all RxD errors */
+	Status = RTMPCheckRxError(pAd, pHeader, pRxWI, pRxD);
+
+	/* Handle the received frame */
+	if (Status == NDIS_STATUS_SUCCESS)
+	{
+
+		switch (pHeader->FC.Type)
+		{
+			/* CASE I, receive a DATA frame */
+			case BTYPE_DATA:
+				STAHandleRxDataFrame(pAd, pRxCell);
+				break;
+
+			/* CASE II, receive a MGMT frame */
+			case BTYPE_MGMT:
+				STAHandleRxMgmtFrame(pAd, pRxCell);
+				break;
+
+			/* CASE III. receive a CNTL frame */
+			case BTYPE_CNTL:
+				STAHandleRxControlFrame(pAd, pRxCell);
+				break;
+		
+			/* discard other type */
+			default:
+				RELEASE_NDIS_PACKET(pAd, pRxPacket, NDIS_STATUS_FAILURE);
+				break;
+		}
+	}
+	else
+	{
+		pAd->Counters8023.RxErrors++;
+		/* discard this frame */
+		RELEASE_NDIS_PACKET(pAd, pRxPacket, NDIS_STATUS_FAILURE);
+	}
+
+	return bReschedule;
+
+}
+
+/*
+	========================================================================
+
+	Routine Description:
+	Arguments:
+		pAd 	Pointer to our adapter
+
+	IRQL = DISPATCH_LEVEL
+	
+	========================================================================
+*/
+VOID RTMPHandleTwakeupInterrupt(
+	IN PRTMP_ADAPTER pAd)
+{
+	AsicForceWakeup(pAd, FALSE);
+}
+
+/*
+========================================================================
+Routine Description:
+    Early checking and OS-depened parsing for Tx packet send to our STA driver.
+
+Arguments:
+    NDIS_HANDLE 	MiniportAdapterContext	Pointer refer to the device handle, i.e., the pAd.
+	PPNDIS_PACKET	ppPacketArray			The packet array need to do transmission.
+	UINT			NumberOfPackets			Number of packet in packet array.
+	
+Return Value:
+	NONE					
+
+Note:
+	This function do early checking and classification for send-out packet.
+	You only can put OS-depened & STA related code in here.
+========================================================================
+*/
+VOID STASendPackets(
+	IN NDIS_HANDLE MiniportAdapterContext,
+	IN PPNDIS_PACKET ppPacketArray,
+	IN UINT NumberOfPackets)
+{
+	UINT Index;
+	PRTMP_ADAPTER pAd = (PRTMP_ADAPTER) MiniportAdapterContext;
+	PNDIS_PACKET pPacket;
+	BOOLEAN allowToSend = FALSE;
+
+
+	for (Index = 0; Index < NumberOfPackets; Index++) {
+		pPacket = ppPacketArray[Index];
+
+		do {
+
+			if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS)
+			    || RTMP_TEST_FLAG(pAd,
+					      fRTMP_ADAPTER_HALT_IN_PROGRESS)
+			    || RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF)) {
+				/* Drop send request since hardware is in reset state */
+				break;
+			} else if (!INFRA_ON(pAd) && !ADHOC_ON(pAd)) {
+				/* Drop send request since there are no physical connection yet */
+				break;
+			} else {
+				/* Record that orignal packet source is from NDIS layer,so that */
+				/* later on driver knows how to release this NDIS PACKET */
+				if (0
+#ifdef QOS_DLS_SUPPORT
+				    || (pAd->CommonCfg.bDLSCapable)
+#endif /* QOS_DLS_SUPPORT */
+				    ) {
+					MAC_TABLE_ENTRY *pEntry;
+					PUCHAR pSrcBufVA =
+					    GET_OS_PKT_DATAPTR(pPacket);
+
+					pEntry = MacTableLookup(pAd, pSrcBufVA);
+
+					if (pEntry
+					    && (IS_ENTRY_DLS(pEntry)
+						|| IS_ENTRY_TDLS(pEntry))) {
+						RTMP_SET_PACKET_WCID(pPacket,
+								     pEntry->
+								     Aid);
+					} else {
+						RTMP_SET_PACKET_WCID(pPacket,
+								     0);
+					}
+				} else {
+					RTMP_SET_PACKET_WCID(pPacket, 0);
+				}
+
+				RTMP_SET_PACKET_SOURCE(pPacket, PKTSRC_NDIS);
+				NDIS_SET_PACKET_STATUS(pPacket,
+						       NDIS_STATUS_PENDING);
+				pAd->RalinkCounters.PendingNdisPacketCount++;
+
+				allowToSend = TRUE;
+			}
+		} while (FALSE);
+
+		if (allowToSend == TRUE)
+			STASendPacket(pAd, pPacket);
+		else
+			RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_FAILURE);
+	}
+
+	/* Dequeue outgoing frames from TxSwQueue[] and process it */
+	RTMPDeQueuePacket(pAd, FALSE, NUM_OF_TX_RING, MAX_TX_PROCESS);
+
+}
+
+/*
+========================================================================
+Routine Description:
+	This routine is used to do packet parsing and classification for Tx packet 
+	to STA device, and it will en-queue packets to our TxSwQueue depends on AC 
+	class.
+	
+Arguments:
+	pAd    		Pointer to our adapter
+	pPacket 	Pointer to send packet
+
+Return Value:
+	NDIS_STATUS_SUCCESS			If succes to queue the packet into TxSwQueue.
+	NDIS_STATUS_FAILURE			If failed to do en-queue.
+
+Note:
+	You only can put OS-indepened & STA related code in here.
+========================================================================
+*/
+NDIS_STATUS STASendPacket(
+	IN PRTMP_ADAPTER pAd,
+	IN PNDIS_PACKET pPacket)
+{
+	PACKET_INFO PacketInfo;
+	PUCHAR pSrcBufVA;
+	UINT SrcBufLen;
+	UINT AllowFragSize;
+	UCHAR NumberOfFrag;
+	UCHAR RTSRequired;
+	UCHAR QueIdx, UserPriority;
+	MAC_TABLE_ENTRY *pEntry = NULL;
+	unsigned int IrqFlags;
+	UCHAR Rate;
+
+	/* Prepare packet information structure for buffer descriptor */
+	/* chained within a single NDIS packet. */
+	RTMP_QueryPacketInfo(pPacket, &PacketInfo, &pSrcBufVA, &SrcBufLen);
+
+	if (pSrcBufVA == NULL) {
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("STASendPacket --> pSrcBufVA == NULL !!!SrcBufLen=%x\n",
+			  SrcBufLen));
+		/* Resourece is low, system did not allocate virtual address */
+		/* return NDIS_STATUS_FAILURE directly to upper layer */
+		RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_FAILURE);
+		return NDIS_STATUS_FAILURE;
+	}
+
+	if (SrcBufLen < 14) {
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("STASendPacket --> Ndis Packet buffer error !!!\n"));
+		RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_FAILURE);
+		return (NDIS_STATUS_FAILURE);
+	}
+
+	/* In HT rate adhoc mode, A-MPDU is often used. So need to lookup BA Table and MAC Entry. */
+	/* Note multicast packets in adhoc also use BSSID_WCID index. */
+	{
+		if (pAd->StaCfg.BssType == BSS_INFRA) {
+#if defined(QOS_DLS_SUPPORT) || defined(DOT11Z_TDLS_SUPPORT)
+			USHORT tmpWcid;
+
+			tmpWcid = RTMP_GET_PACKET_WCID(pPacket);
+
+			if (VALID_WCID(tmpWcid) &&
+			    (IS_ENTRY_DLS(&pAd->MacTab.Content[tmpWcid]) ||
+			     IS_ENTRY_TDLS(&pAd->MacTab.Content[tmpWcid]))) {
+				pEntry = &pAd->MacTab.Content[tmpWcid];
+				Rate = pAd->MacTab.Content[tmpWcid].CurrTxRate;
+			} else
+#endif
+			{
+				pEntry = &pAd->MacTab.Content[BSSID_WCID];
+				RTMP_SET_PACKET_WCID(pPacket, BSSID_WCID);
+				Rate = pAd->CommonCfg.TxRate;
+			}
+		} else if (ADHOC_ON(pAd)) {
+			if (*pSrcBufVA & 0x01) {
+				RTMP_SET_PACKET_WCID(pPacket, MCAST_WCID);
+				pEntry = &pAd->MacTab.Content[MCAST_WCID];
+			} else {
+#ifdef XLINK_SUPPORT
+				if (pAd->StaCfg.PSPXlink) {
+					pEntry =
+					    &pAd->MacTab.Content[MCAST_WCID];
+					pEntry->Aid = MCAST_WCID;
+				} else
+#endif /* XLINK_SUPPORT */
+					pEntry = MacTableLookup(pAd, pSrcBufVA);
+
+				if (pEntry)
+					RTMP_SET_PACKET_WCID(pPacket,
+							     pEntry->Aid);
+			}
+			Rate = pAd->CommonCfg.TxRate;
+		}
+	}
+
+	if (!pEntry) {
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("STASendPacket->Cannot find pEntry(%2x:%2x:%2x:%2x:%2x:%2x) in MacTab!\n",
+			  PRINT_MAC(pSrcBufVA)));
+		/* Resourece is low, system did not allocate virtual address */
+		/* return NDIS_STATUS_FAILURE directly to upper layer */
+		RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_FAILURE);
+		return NDIS_STATUS_FAILURE;
+	}
+
+	if (ADHOC_ON(pAd)
+	    ) {
+		RTMP_SET_PACKET_WCID(pPacket, (UCHAR) pEntry->Aid);
+	}
+
+	/* Check the Ethernet Frame type of this packet, and set the RTMP_SET_PACKET_SPECIFIC flags. */
+	/*              Here we set the PACKET_SPECIFIC flags(LLC, VLAN, DHCP/ARP, EAPOL). */
+	UserPriority = 0;
+	QueIdx = QID_AC_BE;
+	RTMPCheckEtherType(pAd, pPacket, pEntry, OPMODE_STA, &UserPriority, &QueIdx);
+
+
+
+	/* WPA 802.1x secured port control - drop all non-802.1x frame before port secured */
+	if (((pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA) ||
+	     (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPAPSK) ||
+	     (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2) ||
+	     (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2PSK)
+#ifdef WPA_SUPPLICANT_SUPPORT
+	     || (pAd->StaCfg.IEEE8021X == TRUE)
+#endif /* WPA_SUPPLICANT_SUPPORT */
+	    )
+	    && ((pAd->StaCfg.PortSecured == WPA_802_1X_PORT_NOT_SECURED)
+		|| (pAd->StaCfg.MicErrCnt >= 2))
+	    && (RTMP_GET_PACKET_EAPOL(pPacket) == FALSE)
+	    ) {
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("STASendPacket --> Drop packet before port secured !!!\n"));
+		RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_FAILURE);
+
+		return (NDIS_STATUS_FAILURE);
+	}
+
+	/*
+	   STEP 1. Decide number of fragments required to deliver this MSDU. 
+	   The estimation here is not very accurate because difficult to 
+	   take encryption overhead into consideration here. The result 
+	   "NumberOfFrag" is then just used to pre-check if enough free 
+	   TXD are available to hold this MSDU.
+	 */
+	if (*pSrcBufVA & 0x01)	/* fragmentation not allowed on multicast & broadcast */
+		NumberOfFrag = 1;
+	else if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_AGGREGATION_INUSED))
+		NumberOfFrag = 1;	/* Aggregation overwhelms fragmentation */
+	else if (CLIENT_STATUS_TEST_FLAG(pEntry, fCLIENT_STATUS_AMSDU_INUSED))
+		NumberOfFrag = 1;	/* Aggregation overwhelms fragmentation */
+#ifdef DOT11_N_SUPPORT
+	else if ((pAd->StaCfg.HTPhyMode.field.MODE == MODE_HTMIX)
+		 || (pAd->StaCfg.HTPhyMode.field.MODE == MODE_HTGREENFIELD))
+		NumberOfFrag = 1;	/* MIMO RATE overwhelms fragmentation */
+#endif /* DOT11_N_SUPPORT */
+	else {
+		/*
+		   The calculated "NumberOfFrag" is a rough estimation because of various 
+		   encryption/encapsulation overhead not taken into consideration. This number is just
+		   used to make sure enough free TXD are available before fragmentation takes place.
+		   In case the actual required number of fragments of an NDIS packet 
+		   excceeds "NumberOfFrag"caculated here and not enough free TXD available, the
+		   last fragment (i.e. last MPDU) will be dropped in RTMPHardTransmit() due to out of 
+		   resource, and the NDIS packet will be indicated NDIS_STATUS_FAILURE. This should 
+		   rarely happen and the penalty is just like a TX RETRY fail. Affordable.
+		 */
+
+		AllowFragSize =
+		    (pAd->CommonCfg.FragmentThreshold) - LENGTH_802_11 -
+		    LENGTH_CRC;
+		NumberOfFrag =
+		    ((PacketInfo.TotalPacketLength - LENGTH_802_3 +
+		      LENGTH_802_1_H) / AllowFragSize) + 1;
+		/* To get accurate number of fragmentation, Minus 1 if the size just match to allowable fragment size */
+		if (((PacketInfo.TotalPacketLength - LENGTH_802_3 +
+		      LENGTH_802_1_H) % AllowFragSize) == 0) {
+			NumberOfFrag--;
+		}
+	}
+
+	/* Save fragment number to Ndis packet reserved field */
+	RTMP_SET_PACKET_FRAGMENTS(pPacket, NumberOfFrag);
+
+	/*
+	   STEP 2. Check the requirement of RTS:
+	   If multiple fragment required, RTS is required only for the first fragment
+	   if the fragment size large than RTS threshold
+	   For RT28xx, Let ASIC send RTS/CTS
+	 */
+	if (NumberOfFrag > 1)
+		RTSRequired =
+		    (pAd->CommonCfg.FragmentThreshold >
+		     pAd->CommonCfg.RtsThreshold) ? 1 : 0;
+	else
+		RTSRequired =
+		    (PacketInfo.TotalPacketLength >
+		     pAd->CommonCfg.RtsThreshold) ? 1 : 0;
+
+	/* Save RTS requirement to Ndis packet reserved field */
+	RTMP_SET_PACKET_RTS(pPacket, RTSRequired);
+	RTMP_SET_PACKET_TXRATE(pPacket, pAd->CommonCfg.TxRate);
+
+
+	RTMP_SET_PACKET_UP(pPacket, UserPriority);
+
+
+		/* Make sure SendTxWait queue resource won't be used by other threads */
+		RTMP_IRQ_LOCK(&pAd->irq_lock, IrqFlags);
+		if (pAd->TxSwQueue[QueIdx].Number >= MAX_PACKETS_IN_QUEUE) {
+			RTMP_IRQ_UNLOCK(&pAd->irq_lock, IrqFlags);
+#ifdef BLOCK_NET_IF
+			StopNetIfQueue(pAd, QueIdx, pPacket);
+#endif /* BLOCK_NET_IF */
+			RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_FAILURE);
+
+			return NDIS_STATUS_FAILURE;
+		} else {
+			InsertTailQueueAc(pAd, pEntry, &pAd->TxSwQueue[QueIdx],
+					  PACKET_TO_QUEUE_ENTRY(pPacket));
+		}
+		RTMP_IRQ_UNLOCK(&pAd->irq_lock, IrqFlags);
+
+#ifdef DOT11_N_SUPPORT
+	if ((pAd->CommonCfg.BACapability.field.AutoBA == TRUE) &&
+	    (pEntry->NoBADataCountDown == 0) && IS_HT_STA(pEntry)) {
+		if (((pEntry->TXBAbitmap & (1 << UserPriority)) == 0) &&
+		    ((pEntry->BADeclineBitmap & (1 << UserPriority)) == 0) &&
+		    (pEntry->PortSecured == WPA_802_1X_PORT_SECURED)
+		    /*
+		       For IOT compatibility, if  
+		       1. It is Ralink chip or                          
+		       2. It is OPEN or AES mode, 
+		       then BA session can be bulit.
+		     */
+		    &&
+		    ((IS_ENTRY_CLIENT(pEntry) && pAd->MlmeAux.APRalinkIe != 0x0)
+		     || (pEntry->WepStatus != Ndis802_11WEPEnabled
+			 && pEntry->WepStatus != Ndis802_11Encryption2Enabled))
+		    &&
+		    (!(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS)))
+		    ) {
+			BAOriSessionSetUp(pAd, pEntry, UserPriority, 0, 10,
+					  FALSE);
+		}
+	}
+#endif /* DOT11_N_SUPPORT */
+
+	pAd->RalinkCounters.OneSecOsTxCount[QueIdx]++;	/* TODO: for debug only. to be removed */
+	return NDIS_STATUS_SUCCESS;
+}
+
+/*
+	========================================================================
+
+	Routine Description:
+		This subroutine will scan through releative ring descriptor to find
+		out avaliable free ring descriptor and compare with request size.
+		
+	Arguments:
+		pAd Pointer to our adapter
+		QueIdx		Selected TX Ring
+		
+	Return Value:
+		NDIS_STATUS_FAILURE 	Not enough free descriptor
+		NDIS_STATUS_SUCCESS 	Enough free descriptor
+
+	IRQL = PASSIVE_LEVEL
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+	
+	========================================================================
+*/
+
+#ifdef RTMP_MAC_USB
+/*
+	Actually, this function used to check if the TxHardware Queue still has frame need to send.
+	If no frame need to send, go to sleep, else, still wake up.
+*/
+NDIS_STATUS RTMPFreeTXDRequest(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR QueIdx,
+	IN UCHAR NumberRequired,
+	IN PUCHAR FreeNumberIs)
+{
+	/*ULONG         FreeNumber = 0; */
+	NDIS_STATUS Status = NDIS_STATUS_FAILURE;
+	unsigned long IrqFlags;
+	HT_TX_CONTEXT *pHTTXContext;
+
+	switch (QueIdx) {
+	case QID_AC_BK:
+	case QID_AC_BE:
+	case QID_AC_VI:
+	case QID_AC_VO:
+	case QID_HCCA:
+		{
+			pHTTXContext = &pAd->TxContext[QueIdx];
+			RTMP_IRQ_LOCK(&pAd->TxContextQueueLock[QueIdx],
+				      IrqFlags);
+			if ((pHTTXContext->CurWritePosition !=
+			     pHTTXContext->ENextBulkOutPosition)
+			    || (pHTTXContext->IRPPending == TRUE)) {
+				Status = NDIS_STATUS_FAILURE;
+			} else {
+				Status = NDIS_STATUS_SUCCESS;
+			}
+			RTMP_IRQ_UNLOCK(&pAd->TxContextQueueLock[QueIdx],
+					IrqFlags);
+		}
+		break;
+
+	case QID_MGMT:
+		if (pAd->MgmtRing.TxSwFreeIdx != MGMT_RING_SIZE)
+			Status = NDIS_STATUS_FAILURE;
+		else
+			Status = NDIS_STATUS_SUCCESS;
+		break;
+
+	default:
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("RTMPFreeTXDRequest::Invalid QueIdx(=%d)\n", QueIdx));
+		break;
+	}
+
+	return (Status);
+
+}
+#endif /* RTMP_MAC_USB */
+
+VOID RTMPSendNullFrame(
+	IN PRTMP_ADAPTER pAd,
+	IN UCHAR TxRate,
+	IN BOOLEAN bQosNull)
+{
+	UCHAR NullFrame[48];
+	ULONG Length;
+	PHEADER_802_11 pHeader_802_11;
+
+#ifdef RALINK_ATE
+	if (ATE_ON(pAd)) {
+		return;
+	}
+#endif /* RALINK_ATE */
+
+	/* WPA 802.1x secured port control */
+	if (((pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA) ||
+	     (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPAPSK) ||
+	     (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2) ||
+	     (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2PSK)
+#ifdef WPA_SUPPLICANT_SUPPORT
+	     || (pAd->StaCfg.IEEE8021X == TRUE)
+#endif
+	    ) && (pAd->StaCfg.PortSecured == WPA_802_1X_PORT_NOT_SECURED)) {
+		return;
+	}
+
+	NdisZeroMemory(NullFrame, 48);
+	Length = sizeof (HEADER_802_11);
+
+	pHeader_802_11 = (PHEADER_802_11) NullFrame;
+
+	pHeader_802_11->FC.Type = BTYPE_DATA;
+	pHeader_802_11->FC.SubType = SUBTYPE_NULL_FUNC;
+	pHeader_802_11->FC.ToDs = 1;
+	COPY_MAC_ADDR(pHeader_802_11->Addr1, pAd->CommonCfg.Bssid);
+	COPY_MAC_ADDR(pHeader_802_11->Addr2, pAd->CurrentAddress);
+	COPY_MAC_ADDR(pHeader_802_11->Addr3, pAd->CommonCfg.Bssid);
+
+	if (pAd->CommonCfg.bAPSDForcePowerSave) {
+		pHeader_802_11->FC.PwrMgmt = PWR_SAVE;
+	} else {
+		pHeader_802_11->FC.PwrMgmt =
+		    (pAd->StaCfg.Psm == PWR_SAVE) ? 1 : 0;
+	}
+	pHeader_802_11->Duration =
+	    pAd->CommonCfg.Dsifs + RTMPCalcDuration(pAd, TxRate, 14);
+
+	/* sequence is increased in MlmeHardTx */
+	pHeader_802_11->Sequence = pAd->Sequence;
+	pAd->Sequence = (pAd->Sequence + 1) & MAXSEQ;	/* next sequence  */
+
+	/* Prepare QosNull function frame */
+	if (bQosNull) {
+		pHeader_802_11->FC.SubType = SUBTYPE_QOS_NULL;
+
+		/* copy QOS control bytes */
+		NullFrame[Length] = 0;
+		NullFrame[Length + 1] = 0;
+		Length += 2;	/* if pad with 2 bytes for alignment, APSD will fail */
+	}
+
+	HAL_KickOutNullFrameTx(pAd, 0, NullFrame, Length);
+
+}
+
+/*
+--------------------------------------------------------
+FIND ENCRYPT KEY AND DECIDE CIPHER ALGORITHM
+	Find the WPA key, either Group or Pairwise Key
+	LEAP + TKIP also use WPA key.
+--------------------------------------------------------
+Decide WEP bit and cipher suite to be used. Same cipher suite should be used for whole fragment burst
+	In Cisco CCX 2.0 Leap Authentication
+	WepStatus is Ndis802_11Encryption1Enabled but the key will use PairwiseKey
+	Instead of the SharedKey, SharedKey Length may be Zero.
+*/
+VOID STAFindCipherAlgorithm(
+	IN PRTMP_ADAPTER pAd,
+	IN TX_BLK *pTxBlk)
+{
+	NDIS_802_11_ENCRYPTION_STATUS Cipher;	/* To indicate cipher used for this packet */
+	UCHAR CipherAlg = CIPHER_NONE;	/* cipher alogrithm */
+	UCHAR KeyIdx = 0xff;
+	PUCHAR pSrcBufVA;
+	PCIPHER_KEY pKey = NULL;
+	PMAC_TABLE_ENTRY pMacEntry;
+
+	pSrcBufVA = GET_OS_PKT_DATAPTR(pTxBlk->pPacket);
+	pMacEntry = pTxBlk->pMacEntry;
+
+	{
+		/* Select Cipher */
+		if ((*pSrcBufVA & 0x01) && (ADHOC_ON(pAd)))
+			Cipher = pAd->StaCfg.GroupCipher;	/* Cipher for Multicast or Broadcast */
+		else
+			Cipher = pAd->StaCfg.PairCipher;	/* Cipher for Unicast */
+
+		if (RTMP_GET_PACKET_EAPOL(pTxBlk->pPacket)) {
+			ASSERT(pAd->SharedKey[BSS0][0].CipherAlg <=
+			       CIPHER_CKIP128);
+
+			/* 4-way handshaking frame must be clear */
+			if (!(TX_BLK_TEST_FLAG(pTxBlk, fTX_bClearEAPFrame)) &&
+			    (pAd->SharedKey[BSS0][0].CipherAlg) &&
+			    (pAd->SharedKey[BSS0][0].KeyLen)) {
+				CipherAlg = pAd->SharedKey[BSS0][0].CipherAlg;
+				KeyIdx = 0;
+			}
+		} else if (Cipher == Ndis802_11Encryption1Enabled) {
+			KeyIdx = pAd->StaCfg.DefaultKeyId;
+		} else if ((Cipher == Ndis802_11Encryption2Enabled) ||
+			   (Cipher == Ndis802_11Encryption3Enabled)) {
+			if ((*pSrcBufVA & 0x01) && (ADHOC_ON(pAd)))	/* multicast */
+				KeyIdx = pAd->StaCfg.DefaultKeyId;
+			else if (pAd->SharedKey[BSS0][0].KeyLen)
+				KeyIdx = 0;
+			else
+				KeyIdx = pAd->StaCfg.DefaultKeyId;
+		}
+
+		if (KeyIdx == 0xff)
+			CipherAlg = CIPHER_NONE;
+		else if ((Cipher == Ndis802_11EncryptionDisabled)
+			 || (pAd->SharedKey[BSS0][KeyIdx].KeyLen == 0))
+			CipherAlg = CIPHER_NONE;
+#ifdef WPA_SUPPLICANT_SUPPORT
+		else if (pAd->StaCfg.WpaSupplicantUP &&
+			 (Cipher == Ndis802_11Encryption1Enabled) &&
+			 (pAd->StaCfg.IEEE8021X == TRUE) &&
+			 (pAd->StaCfg.PortSecured ==
+			  WPA_802_1X_PORT_NOT_SECURED))
+			CipherAlg = CIPHER_NONE;
+#endif /* WPA_SUPPLICANT_SUPPORT */
+		else {
+			CipherAlg = pAd->SharedKey[BSS0][KeyIdx].CipherAlg;
+			pKey = &pAd->SharedKey[BSS0][KeyIdx];
+		}
+	}
+
+	pTxBlk->CipherAlg = CipherAlg;
+	pTxBlk->pKey = pKey;
+	pTxBlk->KeyIdx = KeyIdx;
+}
+
+VOID STABuildCommon802_11Header(
+	IN PRTMP_ADAPTER pAd,
+	IN TX_BLK *pTxBlk)
+{
+
+	HEADER_802_11 *pHeader_802_11;
+#ifdef QOS_DLS_SUPPORT
+	BOOLEAN bDLSFrame = FALSE;
+	INT DlsEntryIndex = 0;
+#endif /* QOS_DLS_SUPPORT */
+
+	/* MAKE A COMMON 802.11 HEADER */
+
+	/* normal wlan header size : 24 octets */
+	pTxBlk->MpduHeaderLen = sizeof (HEADER_802_11);
+
+	pHeader_802_11 =
+	    (HEADER_802_11 *) & pTxBlk->HeaderBuf[TXINFO_SIZE + TXWI_SIZE];
+
+	NdisZeroMemory(pHeader_802_11, sizeof (HEADER_802_11));
+
+	pHeader_802_11->FC.FrDs = 0;
+	pHeader_802_11->FC.Type = BTYPE_DATA;
+	pHeader_802_11->FC.SubType =
+	    ((TX_BLK_TEST_FLAG(pTxBlk, fTX_bWMM)) ? SUBTYPE_QDATA :
+	     SUBTYPE_DATA);
+
+#ifdef QOS_DLS_SUPPORT
+	if (INFRA_ON(pAd)) {
+		/* Check if the frame can be sent through DLS direct link interface */
+		/* If packet can be sent through DLS, then force aggregation disable. (Hard to determine peer STA's capability) */
+		DlsEntryIndex = RTMPCheckDLSFrame(pAd, pTxBlk->pSrcBufHeader);
+		if (DlsEntryIndex >= 0)
+			bDLSFrame = TRUE;
+		else
+			bDLSFrame = FALSE;
+	}
+#endif /* QOS_DLS_SUPPORT */
+
+	if (pTxBlk->pMacEntry) {
+		if (TX_BLK_TEST_FLAG(pTxBlk, fTX_bForceNonQoS)) {
+			pHeader_802_11->Sequence =
+			    pTxBlk->pMacEntry->NonQosDataSeq;
+			pTxBlk->pMacEntry->NonQosDataSeq =
+			    (pTxBlk->pMacEntry->NonQosDataSeq + 1) & MAXSEQ;
+		} else {
+			pHeader_802_11->Sequence =
+			    pTxBlk->pMacEntry->TxSeq[pTxBlk->UserPriority];
+			pTxBlk->pMacEntry->TxSeq[pTxBlk->UserPriority] =
+			    (pTxBlk->pMacEntry->TxSeq[pTxBlk->UserPriority] +
+			     1) & MAXSEQ;
+		}
+	} else {
+		pHeader_802_11->Sequence = pAd->Sequence;
+		pAd->Sequence = (pAd->Sequence + 1) & MAXSEQ;	/* next sequence  */
+	}
+
+	pHeader_802_11->Frag = 0;
+
+	pHeader_802_11->FC.MoreData = TX_BLK_TEST_FLAG(pTxBlk, fTX_bMoreData);
+
+	{
+		if (pAd->StaCfg.BssType == BSS_INFRA) {
+#ifdef QOS_DLS_SUPPORT
+			if (bDLSFrame) {
+				COPY_MAC_ADDR(pHeader_802_11->Addr1,
+					      pTxBlk->pSrcBufHeader);
+				COPY_MAC_ADDR(pHeader_802_11->Addr2,
+					      pAd->CurrentAddress);
+				COPY_MAC_ADDR(pHeader_802_11->Addr3,
+					      pAd->CommonCfg.Bssid);
+				pHeader_802_11->FC.ToDs = 0;
+			} else
+#endif /* QOS_DLS_SUPPORT */
+			{
+				COPY_MAC_ADDR(pHeader_802_11->Addr1,
+					      pAd->CommonCfg.Bssid);
+				COPY_MAC_ADDR(pHeader_802_11->Addr2,
+					      pAd->CurrentAddress);
+				COPY_MAC_ADDR(pHeader_802_11->Addr3,
+					      pTxBlk->pSrcBufHeader);
+				pHeader_802_11->FC.ToDs = 1;
+#ifdef CLIENT_WDS
+				if (!MAC_ADDR_EQUAL
+				    ((pTxBlk->pSrcBufHeader + MAC_ADDR_LEN),
+				     pAd->CurrentAddress)) {
+					pHeader_802_11->FC.FrDs = 1;
+					COPY_MAC_ADDR(&pHeader_802_11->Octet[0], pTxBlk->pSrcBufHeader + MAC_ADDR_LEN);	/* ADDR4 = SA */
+					pTxBlk->MpduHeaderLen += MAC_ADDR_LEN;
+				}
+#endif /* CLIENT_WDS */
+			}
+		} else if (ADHOC_ON(pAd)) {
+			COPY_MAC_ADDR(pHeader_802_11->Addr1,
+				      pTxBlk->pSrcBufHeader);
+#ifdef XLINK_SUPPORT
+			if (pAd->StaCfg.PSPXlink)
+				/* copy the SA of ether frames to address 2 of 802.11 frame */
+				COPY_MAC_ADDR(pHeader_802_11->Addr2,
+					      pTxBlk->pSrcBufHeader +
+					      MAC_ADDR_LEN);
+			else
+#endif /* XLINK_SUPPORT */
+				COPY_MAC_ADDR(pHeader_802_11->Addr2,
+					      pAd->CurrentAddress);
+			COPY_MAC_ADDR(pHeader_802_11->Addr3,
+				      pAd->CommonCfg.Bssid);
+			pHeader_802_11->FC.ToDs = 0;
+		}
+	}
+
+	if (pTxBlk->CipherAlg != CIPHER_NONE)
+		pHeader_802_11->FC.Wep = 1;
+
+	/*
+	   -----------------------------------------------------------------
+	   STEP 2. MAKE A COMMON 802.11 HEADER SHARED BY ENTIRE FRAGMENT BURST. Fill sequence later. 
+	   -----------------------------------------------------------------
+	 */
+	if (pAd->CommonCfg.bAPSDForcePowerSave)
+		pHeader_802_11->FC.PwrMgmt = PWR_SAVE;
+	else
+		pHeader_802_11->FC.PwrMgmt = (pAd->StaCfg.Psm == PWR_SAVE);
+}
+
+#ifdef DOT11_N_SUPPORT
+VOID STABuildCache802_11Header(
+	IN RTMP_ADAPTER *pAd,
+	IN TX_BLK *pTxBlk,
+	IN UCHAR *pHeader)
+{
+	MAC_TABLE_ENTRY *pMacEntry;
+	PHEADER_802_11 pHeader80211;
+
+	pHeader80211 = (PHEADER_802_11) pHeader;
+	pMacEntry = pTxBlk->pMacEntry;
+
+	/* Update the cached 802.11 HEADER */
+
+	/* normal wlan header size : 24 octets */
+	pTxBlk->MpduHeaderLen = sizeof (HEADER_802_11);
+
+	/* More Bit */
+	pHeader80211->FC.MoreData = TX_BLK_TEST_FLAG(pTxBlk, fTX_bMoreData);
+
+	/* Sequence */
+	pHeader80211->Sequence = pMacEntry->TxSeq[pTxBlk->UserPriority];
+	pMacEntry->TxSeq[pTxBlk->UserPriority] =
+	    (pMacEntry->TxSeq[pTxBlk->UserPriority] + 1) & MAXSEQ;
+
+	{
+		/* Check if the frame can be sent through DLS direct link interface
+		   If packet can be sent through DLS, then force aggregation disable. (Hard to determine peer STA's capability) */
+#ifdef QOS_DLS_SUPPORT
+		BOOLEAN bDLSFrame = FALSE;
+		INT DlsEntryIndex = 0;
+
+		DlsEntryIndex = RTMPCheckDLSFrame(pAd, pTxBlk->pSrcBufHeader);
+		if (DlsEntryIndex >= 0)
+			bDLSFrame = TRUE;
+		else
+			bDLSFrame = FALSE;
+#endif /* QOS_DLS_SUPPORT */
+
+		/* The addr3 of normal packet send from DS is Dest Mac address. */
+#ifdef QOS_DLS_SUPPORT
+		if (bDLSFrame) {
+			COPY_MAC_ADDR(pHeader80211->Addr1,
+				      pTxBlk->pSrcBufHeader);
+			COPY_MAC_ADDR(pHeader80211->Addr3,
+				      pAd->CommonCfg.Bssid);
+			pHeader80211->FC.ToDs = 0;
+		} else
+#endif /* QOS_DLS_SUPPORT */
+		if (ADHOC_ON(pAd))
+			COPY_MAC_ADDR(pHeader80211->Addr3,
+				      pAd->CommonCfg.Bssid);
+		else {
+			COPY_MAC_ADDR(pHeader80211->Addr3,
+				      pTxBlk->pSrcBufHeader);
+#ifdef CLIENT_WDS
+			if (!MAC_ADDR_EQUAL
+			    ((pTxBlk->pSrcBufHeader + MAC_ADDR_LEN),
+			     pAd->CurrentAddress)) {
+				pHeader80211->FC.FrDs = 1;
+				COPY_MAC_ADDR(&pHeader80211->Octet[0], pTxBlk->pSrcBufHeader + MAC_ADDR_LEN);	/* ADDR4 = SA */
+				pTxBlk->MpduHeaderLen += MAC_ADDR_LEN;
+			}
+#endif /* CLIENT_WDS */
+		}
+	}
+
+	/* 
+	   -----------------------------------------------------------------
+	   STEP 2. MAKE A COMMON 802.11 HEADER SHARED BY ENTIRE FRAGMENT BURST. Fill sequence later. 
+	   -----------------------------------------------------------------
+	 */
+	if (pAd->CommonCfg.bAPSDForcePowerSave)
+		pHeader80211->FC.PwrMgmt = PWR_SAVE;
+	else
+		pHeader80211->FC.PwrMgmt = (pAd->StaCfg.Psm == PWR_SAVE);
+}
+#endif /* DOT11_N_SUPPORT */
+
+static inline PUCHAR STA_Build_ARalink_Frame_Header(
+	IN RTMP_ADAPTER *pAd,
+	IN TX_BLK *pTxBlk)
+{
+	PUCHAR pHeaderBufPtr;
+	HEADER_802_11 *pHeader_802_11;
+	PNDIS_PACKET pNextPacket;
+	UINT32 nextBufLen;
+	PQUEUE_ENTRY pQEntry;
+
+	STAFindCipherAlgorithm(pAd, pTxBlk);
+	STABuildCommon802_11Header(pAd, pTxBlk);
+
+	pHeaderBufPtr = &pTxBlk->HeaderBuf[TXINFO_SIZE + TXWI_SIZE];
+	pHeader_802_11 = (HEADER_802_11 *) pHeaderBufPtr;
+
+	/* steal "order" bit to mark "aggregation" */
+	pHeader_802_11->FC.Order = 1;
+
+	/* skip common header */
+	pHeaderBufPtr += pTxBlk->MpduHeaderLen;
+
+	if (TX_BLK_TEST_FLAG(pTxBlk, fTX_bWMM)) {
+		/* build QOS Control bytes */
+		*pHeaderBufPtr = (pTxBlk->UserPriority & 0x0F);
+
+		*(pHeaderBufPtr + 1) = 0;
+		pHeaderBufPtr += 2;
+		pTxBlk->MpduHeaderLen += 2;
+	}
+
+	/* padding at front of LLC header. LLC header should at 4-bytes aligment. */
+	pTxBlk->HdrPadLen = (ULONG) pHeaderBufPtr;
+	pHeaderBufPtr = (PUCHAR) ROUND_UP(pHeaderBufPtr, 4);
+	pTxBlk->HdrPadLen = (ULONG) (pHeaderBufPtr - pTxBlk->HdrPadLen);
+
+	/* For RA Aggregation, */
+	/* put the 2nd MSDU length(extra 2-byte field) after QOS_CONTROL in little endian format */
+	pQEntry = pTxBlk->TxPacketList.Head;
+	pNextPacket = QUEUE_ENTRY_TO_PACKET(pQEntry);
+	nextBufLen = GET_OS_PKT_LEN(pNextPacket);
+	if (RTMP_GET_PACKET_VLAN(pNextPacket))
+		nextBufLen -= LENGTH_802_1Q;
+
+	*pHeaderBufPtr = (UCHAR) nextBufLen & 0xff;
+	*(pHeaderBufPtr + 1) = (UCHAR) (nextBufLen >> 8);
+
+	pHeaderBufPtr += 2;
+	pTxBlk->MpduHeaderLen += 2;
+
+	return pHeaderBufPtr;
+
+}
+
+#ifdef DOT11_N_SUPPORT
+static inline PUCHAR STA_Build_AMSDU_Frame_Header(
+	IN RTMP_ADAPTER *pAd,
+	IN TX_BLK *pTxBlk)
+{
+	PUCHAR pHeaderBufPtr;
+	HEADER_802_11 *pHeader_802_11;
+
+	STAFindCipherAlgorithm(pAd, pTxBlk);
+	STABuildCommon802_11Header(pAd, pTxBlk);
+
+	pHeaderBufPtr = &pTxBlk->HeaderBuf[TXINFO_SIZE + TXWI_SIZE];
+	pHeader_802_11 = (HEADER_802_11 *) pHeaderBufPtr;
+
+	/* skip common header */
+	pHeaderBufPtr += pTxBlk->MpduHeaderLen;
+
+	/* build QOS Control bytes */
+	*pHeaderBufPtr =
+	    (pTxBlk->UserPriority & 0x0F) | (pAd->CommonCfg.
+					     AckPolicy[pTxBlk->QueIdx] << 5);
+
+	/* A-MSDU packet */
+	*pHeaderBufPtr |= 0x80;
+
+	*(pHeaderBufPtr + 1) = 0;
+	pHeaderBufPtr += 2;
+	pTxBlk->MpduHeaderLen += 2;
+
+	/*
+	   padding at front of LLC header
+	   LLC header should locate at 4-octets aligment
+
+	   @@@ MpduHeaderLen excluding padding @@@
+	 */
+	pTxBlk->HdrPadLen = (ULONG) pHeaderBufPtr;
+	pHeaderBufPtr = (PUCHAR) ROUND_UP(pHeaderBufPtr, 4);
+	pTxBlk->HdrPadLen = (ULONG) (pHeaderBufPtr - pTxBlk->HdrPadLen);
+
+	return pHeaderBufPtr;
+
+}
+
+VOID STA_AMPDU_Frame_Tx(
+	IN PRTMP_ADAPTER pAd,
+	IN TX_BLK *pTxBlk)
+{
+	HEADER_802_11 *pHeader_802_11;
+	PUCHAR pHeaderBufPtr;
+	USHORT FreeNumber = 0;
+	MAC_TABLE_ENTRY *pMacEntry;
+	BOOLEAN bVLANPkt;
+	PQUEUE_ENTRY pQEntry;
+
+	ASSERT(pTxBlk);
+
+	while (pTxBlk->TxPacketList.Head) {
+		pQEntry = RemoveHeadQueue(&pTxBlk->TxPacketList);
+		pTxBlk->pPacket = QUEUE_ENTRY_TO_PACKET(pQEntry);
+		if (RTMP_FillTxBlkInfo(pAd, pTxBlk) != TRUE) {
+			RELEASE_NDIS_PACKET(pAd, pTxBlk->pPacket,
+					    NDIS_STATUS_FAILURE);
+			continue;
+		}
+
+		bVLANPkt =
+		    (RTMP_GET_PACKET_VLAN(pTxBlk->pPacket) ? TRUE : FALSE);
+
+		pMacEntry = pTxBlk->pMacEntry;
+		if (pMacEntry->isCached) {
+			/* NOTE: Please make sure the size of pMacEntry->CachedBuf[] is smaller than pTxBlk->HeaderBuf[]!!!! */
+#ifndef VENDOR_FEATURE1_SUPPORT
+			NdisMoveMemory((PUCHAR)
+				       (&pTxBlk->HeaderBuf[TXINFO_SIZE]),
+				       (PUCHAR) (&pMacEntry->CachedBuf[0]),
+				       TXWI_SIZE + sizeof (HEADER_802_11));
+#else
+			pTxBlk->HeaderBuf = (UCHAR *) (pMacEntry->HeaderBuf);
+#endif /* VENDOR_FEATURE1_SUPPORT */
+
+			pHeaderBufPtr =
+			    (PUCHAR) (&pTxBlk->
+				      HeaderBuf[TXINFO_SIZE + TXWI_SIZE]);
+			STABuildCache802_11Header(pAd, pTxBlk, pHeaderBufPtr);
+
+#ifdef SOFT_ENCRYPT
+			RTMPUpdateSwCacheCipherInfo(pAd, pTxBlk, pHeaderBufPtr);
+#endif /* SOFT_ENCRYPT */
+		} else {
+			STAFindCipherAlgorithm(pAd, pTxBlk);
+			STABuildCommon802_11Header(pAd, pTxBlk);
+
+			pHeaderBufPtr =
+			    &pTxBlk->HeaderBuf[TXINFO_SIZE + TXWI_SIZE];
+		}
+
+#ifdef SOFT_ENCRYPT
+		if (TX_BLK_TEST_FLAG(pTxBlk, fTX_bSwEncrypt)) {
+			/* Check if the original data has enough buffer 
+			   to insert or append WPI related field. */
+			if (RTMPExpandPacketForSwEncrypt(pAd, pTxBlk) == FALSE) {
+				RELEASE_NDIS_PACKET(pAd, pTxBlk->pPacket,
+						    NDIS_STATUS_FAILURE);
+				continue;
+			}
+		}
+#endif /* SOFT_ENCRYPT */
+
+#ifdef VENDOR_FEATURE1_SUPPORT
+		if (pMacEntry->isCached
+		    && (pMacEntry->Protocol ==
+			RTMP_GET_PACKET_PROTOCOL(pTxBlk->pPacket))
+#ifdef SOFT_ENCRYPT
+		    && !TX_BLK_TEST_FLAG(pTxBlk, fTX_bSwEncrypt)
+#endif /* SOFT_ENCRYPT */
+		    ) {
+			pHeader_802_11 = (HEADER_802_11 *) pHeaderBufPtr;
+
+			/* skip common header */
+			pHeaderBufPtr += pTxBlk->MpduHeaderLen;
+
+			/* build QOS Control bytes */
+			*pHeaderBufPtr = (pTxBlk->UserPriority & 0x0F);
+			pTxBlk->MpduHeaderLen = pMacEntry->MpduHeaderLen;
+			pHeaderBufPtr =
+			    ((PUCHAR) pHeader_802_11) + pTxBlk->MpduHeaderLen;
+
+			pTxBlk->HdrPadLen = pMacEntry->HdrPadLen;
+
+			/* skip 802.3 header */
+			pTxBlk->pSrcBufData =
+			    pTxBlk->pSrcBufHeader + LENGTH_802_3;
+			pTxBlk->SrcBufLen -= LENGTH_802_3;
+
+			/* skip vlan tag */
+			if (RTMP_GET_PACKET_VLAN(pTxBlk->pPacket)) {
+				pTxBlk->pSrcBufData += LENGTH_802_1Q;
+				pTxBlk->SrcBufLen -= LENGTH_802_1Q;
+			}
+		} else
+#endif /* VENDOR_FEATURE1_SUPPORT */
+		{
+			pHeader_802_11 = (HEADER_802_11 *) pHeaderBufPtr;
+
+			/* skip common header */
+			pHeaderBufPtr += pTxBlk->MpduHeaderLen;
+
+			/*
+			   build QOS Control bytes
+			 */
+			*pHeaderBufPtr = (pTxBlk->UserPriority & 0x0F);
+			*(pHeaderBufPtr + 1) = 0;
+			pHeaderBufPtr += 2;
+			pTxBlk->MpduHeaderLen += 2;
+
+			/*
+			   build HTC+ 
+			   HTC control filed following QoS field
+			 */
+			if ((pAd->CommonCfg.bRdg == TRUE)
+			    && CLIENT_STATUS_TEST_FLAG(pTxBlk->pMacEntry,
+						       fCLIENT_STATUS_RDG_CAPABLE))
+			{
+				if (pMacEntry->isCached == FALSE) {
+					/* mark HTC bit */
+					pHeader_802_11->FC.Order = 1;
+
+					NdisZeroMemory(pHeaderBufPtr, 4);
+					*(pHeaderBufPtr + 3) |= 0x80;
+				}
+				pHeaderBufPtr += 4;
+				pTxBlk->MpduHeaderLen += 4;
+			}
+			ASSERT(pTxBlk->MpduHeaderLen >= 24);
+
+			/* skip 802.3 header */
+			pTxBlk->pSrcBufData =
+			    pTxBlk->pSrcBufHeader + LENGTH_802_3;
+			pTxBlk->SrcBufLen -= LENGTH_802_3;
+
+			/* skip vlan tag */
+			if (bVLANPkt) {
+				pTxBlk->pSrcBufData += LENGTH_802_1Q;
+				pTxBlk->SrcBufLen -= LENGTH_802_1Q;
+			}
+
+			/*
+			   padding at front of LLC header
+			   LLC header should locate at 4-octets aligment
+
+			   @@@ MpduHeaderLen excluding padding @@@
+			 */
+			pTxBlk->HdrPadLen = (ULONG) pHeaderBufPtr;
+			pHeaderBufPtr = (PUCHAR) ROUND_UP(pHeaderBufPtr, 4);
+			pTxBlk->HdrPadLen =
+			    (ULONG) (pHeaderBufPtr - pTxBlk->HdrPadLen);
+
+#ifdef VENDOR_FEATURE1_SUPPORT
+			pMacEntry->HdrPadLen = pTxBlk->HdrPadLen;
+#endif /* VENDOR_FEATURE1_SUPPORT */
+
+#ifdef SOFT_ENCRYPT
+			if (TX_BLK_TEST_FLAG(pTxBlk, fTX_bSwEncrypt)) {
+				UCHAR iv_offset = 0, ext_offset = 0;
+
+				/*
+				   if original Ethernet frame contains no LLC/SNAP, 
+				   then an extra LLC/SNAP encap is required
+				 */
+				EXTRA_LLCSNAP_ENCAP_FROM_PKT_OFFSET(pTxBlk->
+								    pSrcBufData
+								    - 2,
+								    pTxBlk->
+								    pExtraLlcSnapEncap);
+
+				/* Insert LLC-SNAP encapsulation (8 octets) to MPDU data buffer */
+				if (pTxBlk->pExtraLlcSnapEncap) {
+					/* Reserve the front 8 bytes of data for LLC header */
+					pTxBlk->pSrcBufData -= LENGTH_802_1_H;
+					pTxBlk->SrcBufLen += LENGTH_802_1_H;
+
+					NdisMoveMemory(pTxBlk->pSrcBufData,
+						       pTxBlk->
+						       pExtraLlcSnapEncap, 6);
+				}
+
+				/* Construct and insert specific IV header to MPDU header */
+				RTMPSoftConstructIVHdr(pTxBlk->CipherAlg,
+						       pTxBlk->KeyIdx,
+						       pTxBlk->pKey->TxTsc,
+						       pHeaderBufPtr,
+						       &iv_offset);
+				pHeaderBufPtr += iv_offset;
+				pTxBlk->MpduHeaderLen += iv_offset;
+
+				/* Encrypt the MPDU data by software */
+				RTMPSoftEncryptionAction(pAd,
+							 pTxBlk->CipherAlg,
+							 (PUCHAR)
+							 pHeader_802_11,
+							 pTxBlk->pSrcBufData,
+							 pTxBlk->SrcBufLen,
+							 pTxBlk->KeyIdx,
+							 pTxBlk->pKey,
+							 &ext_offset);
+				pTxBlk->SrcBufLen += ext_offset;
+				pTxBlk->TotalFrameLen += ext_offset;
+
+			} else
+#endif /* SOFT_ENCRYPT */
+			{
+
+				/*
+				   Insert LLC-SNAP encapsulation - 8 octets
+				 */
+				EXTRA_LLCSNAP_ENCAP_FROM_PKT_OFFSET(pTxBlk->
+								    pSrcBufData
+								    - 2,
+								    pTxBlk->
+								    pExtraLlcSnapEncap);
+				if (pTxBlk->pExtraLlcSnapEncap) {
+					NdisMoveMemory(pHeaderBufPtr,
+						       pTxBlk->
+						       pExtraLlcSnapEncap, 6);
+					pHeaderBufPtr += 6;
+					/* get 2 octets (TypeofLen) */
+					NdisMoveMemory(pHeaderBufPtr,
+						       pTxBlk->pSrcBufData - 2,
+						       2);
+					pHeaderBufPtr += 2;
+					pTxBlk->MpduHeaderLen += LENGTH_802_1_H;
+				}
+
+			}
+
+#ifdef VENDOR_FEATURE1_SUPPORT
+			pMacEntry->Protocol =
+			    RTMP_GET_PACKET_PROTOCOL(pTxBlk->pPacket);
+			pMacEntry->MpduHeaderLen = pTxBlk->MpduHeaderLen;
+#endif /* VENDOR_FEATURE1_SUPPORT */
+		}
+
+		if (pMacEntry->isCached) {
+			RTMPWriteTxWI_Cache(pAd,
+					    (PTXWI_STRUC) (&pTxBlk->
+							   HeaderBuf
+							   [TXINFO_SIZE]),
+					    pTxBlk);
+		} else {
+			RTMPWriteTxWI_Data(pAd,
+					   (PTXWI_STRUC) (&pTxBlk->
+							  HeaderBuf
+							  [TXINFO_SIZE]),
+					   pTxBlk);
+
+			NdisZeroMemory((PUCHAR) (&pMacEntry->CachedBuf[0]),
+				       sizeof (pMacEntry->CachedBuf));
+			NdisMoveMemory((PUCHAR) (&pMacEntry->CachedBuf[0]),
+				       (PUCHAR) (&pTxBlk->
+						 HeaderBuf[TXINFO_SIZE]),
+				       (pHeaderBufPtr -
+					(PUCHAR) (&pTxBlk->
+						  HeaderBuf[TXINFO_SIZE])));
+
+#ifdef VENDOR_FEATURE1_SUPPORT
+			/* use space to get performance enhancement */
+			NdisZeroMemory((PUCHAR) (&pMacEntry->HeaderBuf[0]),
+				       sizeof (pMacEntry->HeaderBuf));
+			NdisMoveMemory((PUCHAR) (&pMacEntry->HeaderBuf[0]),
+				       (PUCHAR) (&pTxBlk->HeaderBuf[0]),
+				       (pHeaderBufPtr -
+					(PUCHAR) (&pTxBlk->HeaderBuf[0])));
+#endif /* VENDOR_FEATURE1_SUPPORT */
+
+			pMacEntry->isCached = TRUE;
+		}
+
+#ifdef STATS_COUNT_SUPPORT
+		/* calculate Transmitted AMPDU count and ByteCount  */
+		{
+			pAd->RalinkCounters.TransmittedMPDUsInAMPDUCount.u.
+			    LowPart++;
+			pAd->RalinkCounters.TransmittedOctetsInAMPDUCount.
+			    QuadPart += pTxBlk->SrcBufLen;
+		}
+#endif /* STATS_COUNT_SUPPORT */
+		HAL_WriteTxResource(pAd, pTxBlk, TRUE, &FreeNumber);
+
+		/* Kick out Tx */
+#ifdef PCIE_PS_SUPPORT
+		if (!RTMP_TEST_PSFLAG(pAd, fRTMP_PS_DISABLE_TX))
+#endif /* PCIE_PS_SUPPORT */
+			HAL_KickOutTx(pAd, pTxBlk, pTxBlk->QueIdx);
+
+		pAd->RalinkCounters.KickTxCount++;
+		pAd->RalinkCounters.OneSecTxDoneCount++;
+	}
+
+}
+
+VOID STA_AMSDU_Frame_Tx(
+	IN PRTMP_ADAPTER pAd,
+	IN TX_BLK *pTxBlk)
+{
+	PUCHAR pHeaderBufPtr;
+	USHORT FreeNumber = 0;
+	USHORT subFramePayloadLen = 0;	/* AMSDU Subframe length without AMSDU-Header / Padding */
+	USHORT totalMPDUSize = 0;
+	UCHAR *subFrameHeader;
+	UCHAR padding = 0;
+	USHORT FirstTx = 0, LastTxIdx = 0;
+	BOOLEAN bVLANPkt;
+	int frameNum = 0;
+	PQUEUE_ENTRY pQEntry;
+
+
+	ASSERT(pTxBlk);
+
+	ASSERT((pTxBlk->TxPacketList.Number > 1));
+
+	while (pTxBlk->TxPacketList.Head) {
+		pQEntry = RemoveHeadQueue(&pTxBlk->TxPacketList);
+		pTxBlk->pPacket = QUEUE_ENTRY_TO_PACKET(pQEntry);
+		if (RTMP_FillTxBlkInfo(pAd, pTxBlk) != TRUE) {
+			RELEASE_NDIS_PACKET(pAd, pTxBlk->pPacket,
+					    NDIS_STATUS_FAILURE);
+			continue;
+		}
+
+		bVLANPkt =
+		    (RTMP_GET_PACKET_VLAN(pTxBlk->pPacket) ? TRUE : FALSE);
+
+		/* skip 802.3 header */
+		pTxBlk->pSrcBufData = pTxBlk->pSrcBufHeader + LENGTH_802_3;
+		pTxBlk->SrcBufLen -= LENGTH_802_3;
+
+		/* skip vlan tag */
+		if (bVLANPkt) {
+			pTxBlk->pSrcBufData += LENGTH_802_1Q;
+			pTxBlk->SrcBufLen -= LENGTH_802_1Q;
+		}
+
+		if (frameNum == 0) {
+			pHeaderBufPtr =
+			    STA_Build_AMSDU_Frame_Header(pAd, pTxBlk);
+
+			/* NOTE: TxWI->MPDUtotalByteCount will be updated after final frame was handled. */
+			RTMPWriteTxWI_Data(pAd,
+					   (PTXWI_STRUC) (&pTxBlk->
+							  HeaderBuf
+							  [TXINFO_SIZE]),
+					   pTxBlk);
+		} else {
+			pHeaderBufPtr = &pTxBlk->HeaderBuf[0];
+			padding =
+			    ROUND_UP(LENGTH_AMSDU_SUBFRAMEHEAD +
+				     subFramePayloadLen,
+				     4) - (LENGTH_AMSDU_SUBFRAMEHEAD +
+					   subFramePayloadLen);
+			NdisZeroMemory(pHeaderBufPtr,
+				       padding + LENGTH_AMSDU_SUBFRAMEHEAD);
+			pHeaderBufPtr += padding;
+			pTxBlk->MpduHeaderLen = padding;
+		}
+
+		/*
+		   A-MSDU subframe
+		   DA(6)+SA(6)+Length(2) + LLC/SNAP Encap
+		 */
+		subFrameHeader = pHeaderBufPtr;
+		subFramePayloadLen = pTxBlk->SrcBufLen;
+
+		NdisMoveMemory(subFrameHeader, pTxBlk->pSrcBufHeader, 12);
+
+
+		pHeaderBufPtr += LENGTH_AMSDU_SUBFRAMEHEAD;
+		pTxBlk->MpduHeaderLen += LENGTH_AMSDU_SUBFRAMEHEAD;
+
+		/* Insert LLC-SNAP encapsulation - 8 octets */
+		EXTRA_LLCSNAP_ENCAP_FROM_PKT_OFFSET(pTxBlk->pSrcBufData - 2,
+						    pTxBlk->pExtraLlcSnapEncap);
+
+		subFramePayloadLen = pTxBlk->SrcBufLen;
+
+		if (pTxBlk->pExtraLlcSnapEncap) {
+			NdisMoveMemory(pHeaderBufPtr,
+				       pTxBlk->pExtraLlcSnapEncap, 6);
+			pHeaderBufPtr += 6;
+			/* get 2 octets (TypeofLen) */
+			NdisMoveMemory(pHeaderBufPtr, pTxBlk->pSrcBufData - 2,
+				       2);
+			pHeaderBufPtr += 2;
+			pTxBlk->MpduHeaderLen += LENGTH_802_1_H;
+			subFramePayloadLen += LENGTH_802_1_H;
+		}
+
+		/* update subFrame Length field */
+		subFrameHeader[12] = (subFramePayloadLen & 0xFF00) >> 8;
+		subFrameHeader[13] = subFramePayloadLen & 0xFF;
+
+		totalMPDUSize += pTxBlk->MpduHeaderLen + pTxBlk->SrcBufLen;
+
+		if (frameNum == 0)
+			FirstTx =
+			    HAL_WriteMultiTxResource(pAd, pTxBlk, frameNum,
+						     &FreeNumber);
+		else
+			LastTxIdx =
+			    HAL_WriteMultiTxResource(pAd, pTxBlk, frameNum,
+						     &FreeNumber);
+
+		frameNum++;
+
+		pAd->RalinkCounters.KickTxCount++;
+		pAd->RalinkCounters.OneSecTxDoneCount++;
+
+		/* calculate Transmitted AMSDU Count and ByteCount */
+		{
+			pAd->RalinkCounters.TransmittedAMSDUCount.u.LowPart++;
+			pAd->RalinkCounters.TransmittedOctetsInAMSDU.QuadPart +=
+			    totalMPDUSize;
+		}
+
+	}
+
+	HAL_FinalWriteTxResource(pAd, pTxBlk, totalMPDUSize, FirstTx);
+	HAL_LastTxIdx(pAd, pTxBlk->QueIdx, LastTxIdx);
+
+	/* Kick out Tx */
+#ifdef PCIE_PS_SUPPORT
+	if (!RTMP_TEST_PSFLAG(pAd, fRTMP_PS_DISABLE_TX))
+#endif /* PCIE_PS_SUPPORT */
+		HAL_KickOutTx(pAd, pTxBlk, pTxBlk->QueIdx);
+}
+#endif /* DOT11_N_SUPPORT */
+
+VOID STA_Legacy_Frame_Tx(
+	IN PRTMP_ADAPTER pAd,
+	IN TX_BLK *pTxBlk)
+{
+	HEADER_802_11 *pHeader_802_11;
+	PUCHAR pHeaderBufPtr;
+	USHORT FreeNumber = 0;
+	BOOLEAN bVLANPkt;
+	PQUEUE_ENTRY pQEntry;
+
+	ASSERT(pTxBlk);
+
+	pQEntry = RemoveHeadQueue(&pTxBlk->TxPacketList);
+	pTxBlk->pPacket = QUEUE_ENTRY_TO_PACKET(pQEntry);
+	if (RTMP_FillTxBlkInfo(pAd, pTxBlk) != TRUE) {
+		RELEASE_NDIS_PACKET(pAd, pTxBlk->pPacket, NDIS_STATUS_FAILURE);
+		return;
+	}
+#ifdef STATS_COUNT_SUPPORT
+	if (pTxBlk->TxFrameType == TX_MCAST_FRAME) {
+		INC_COUNTER64(pAd->WlanCounters.MulticastTransmittedFrameCount);
+	}
+#endif /* STATS_COUNT_SUPPORT */
+
+	if (RTMP_GET_PACKET_RTS(pTxBlk->pPacket))
+		TX_BLK_SET_FLAG(pTxBlk, fTX_bRtsRequired);
+	else
+		TX_BLK_CLEAR_FLAG(pTxBlk, fTX_bRtsRequired);
+
+	bVLANPkt = (RTMP_GET_PACKET_VLAN(pTxBlk->pPacket) ? TRUE : FALSE);
+
+	if (pTxBlk->TxRate < pAd->CommonCfg.MinTxRate)
+		pTxBlk->TxRate = pAd->CommonCfg.MinTxRate;
+
+	STAFindCipherAlgorithm(pAd, pTxBlk);
+	STABuildCommon802_11Header(pAd, pTxBlk);
+
+#ifdef SOFT_ENCRYPT
+	if (TX_BLK_TEST_FLAG(pTxBlk, fTX_bSwEncrypt)) {
+		/* Check if the original data has enough buffer 
+		   to insert or append WPI related field. */
+		if (RTMPExpandPacketForSwEncrypt(pAd, pTxBlk) == FALSE) {
+			RELEASE_NDIS_PACKET(pAd, pTxBlk->pPacket,
+					    NDIS_STATUS_FAILURE);
+			return;
+		}
+	}
+#endif /* SOFT_ENCRYPT */
+
+	/* skip 802.3 header */
+	pTxBlk->pSrcBufData = pTxBlk->pSrcBufHeader + LENGTH_802_3;
+	pTxBlk->SrcBufLen -= LENGTH_802_3;
+
+	/* skip vlan tag */
+	if (bVLANPkt) {
+		pTxBlk->pSrcBufData += LENGTH_802_1Q;
+		pTxBlk->SrcBufLen -= LENGTH_802_1Q;
+	}
+
+	pHeaderBufPtr = &pTxBlk->HeaderBuf[TXINFO_SIZE + TXWI_SIZE];
+	pHeader_802_11 = (HEADER_802_11 *) pHeaderBufPtr;
+
+	/* skip common header */
+	pHeaderBufPtr += pTxBlk->MpduHeaderLen;
+
+	if (TX_BLK_TEST_FLAG(pTxBlk, fTX_bWMM)) {
+		/* build QOS Control bytes */
+		*(pHeaderBufPtr) =
+		    ((pTxBlk->UserPriority & 0x0F) | (pAd->CommonCfg.
+						      AckPolicy[pTxBlk->
+								QueIdx] << 5));
+		*(pHeaderBufPtr + 1) = 0;
+		pHeaderBufPtr += 2;
+		pTxBlk->MpduHeaderLen += 2;
+	}
+
+	/* The remaining content of MPDU header should locate at 4-octets aligment      */
+	pTxBlk->HdrPadLen = (ULONG) pHeaderBufPtr;
+	pHeaderBufPtr = (PUCHAR) ROUND_UP(pHeaderBufPtr, 4);
+	pTxBlk->HdrPadLen = (ULONG) (pHeaderBufPtr - pTxBlk->HdrPadLen);
+
+#ifdef SOFT_ENCRYPT
+	if (TX_BLK_TEST_FLAG(pTxBlk, fTX_bSwEncrypt)) {
+		UCHAR iv_offset = 0, ext_offset = 0;
+
+		/*
+		   if original Ethernet frame contains no LLC/SNAP, 
+		   then an extra LLC/SNAP encap is required 
+		 */
+		EXTRA_LLCSNAP_ENCAP_FROM_PKT_OFFSET(pTxBlk->pSrcBufData - 2,
+						    pTxBlk->pExtraLlcSnapEncap);
+
+		/* Insert LLC-SNAP encapsulation (8 octets) to MPDU data buffer */
+		if (pTxBlk->pExtraLlcSnapEncap) {
+			/* Reserve the front 8 bytes of data for LLC header */
+			pTxBlk->pSrcBufData -= LENGTH_802_1_H;
+			pTxBlk->SrcBufLen += LENGTH_802_1_H;
+
+			NdisMoveMemory(pTxBlk->pSrcBufData,
+				       pTxBlk->pExtraLlcSnapEncap, 6);
+		}
+
+		/* Construct and insert specific IV header to MPDU header */
+		RTMPSoftConstructIVHdr(pTxBlk->CipherAlg,
+				       pTxBlk->KeyIdx,
+				       pTxBlk->pKey->TxTsc,
+				       pHeaderBufPtr, &iv_offset);
+		pHeaderBufPtr += iv_offset;
+		pTxBlk->MpduHeaderLen += iv_offset;
+
+		/* Encrypt the MPDU data by software */
+		RTMPSoftEncryptionAction(pAd,
+					 pTxBlk->CipherAlg,
+					 (PUCHAR) pHeader_802_11,
+					 pTxBlk->pSrcBufData,
+					 pTxBlk->SrcBufLen,
+					 pTxBlk->KeyIdx,
+					 pTxBlk->pKey, &ext_offset);
+		pTxBlk->SrcBufLen += ext_offset;
+		pTxBlk->TotalFrameLen += ext_offset;
+
+	} else
+#endif /* SOFT_ENCRYPT */
+	{
+
+		/*
+		   Insert LLC-SNAP encapsulation - 8 octets
+
+		   if original Ethernet frame contains no LLC/SNAP, 
+		   then an extra LLC/SNAP encap is required 
+		 */
+		EXTRA_LLCSNAP_ENCAP_FROM_PKT_START(pTxBlk->pSrcBufHeader,
+						   pTxBlk->pExtraLlcSnapEncap);
+		if (pTxBlk->pExtraLlcSnapEncap) {
+			UCHAR vlan_size;
+
+			NdisMoveMemory(pHeaderBufPtr,
+				       pTxBlk->pExtraLlcSnapEncap, 6);
+			pHeaderBufPtr += 6;
+			/* skip vlan tag */
+			vlan_size = (bVLANPkt) ? LENGTH_802_1Q : 0;
+			/* get 2 octets (TypeofLen) */
+			NdisMoveMemory(pHeaderBufPtr,
+				       pTxBlk->pSrcBufHeader + 12 + vlan_size,
+				       2);
+			pHeaderBufPtr += 2;
+			pTxBlk->MpduHeaderLen += LENGTH_802_1_H;
+		}
+
+	}
+
+
+	/*
+	   prepare for TXWI
+	   use Wcid as Key Index
+	 */
+
+	RTMPWriteTxWI_Data(pAd, (PTXWI_STRUC) (&pTxBlk->HeaderBuf[TXINFO_SIZE]),
+			   pTxBlk);
+	HAL_WriteTxResource(pAd, pTxBlk, TRUE, &FreeNumber);
+
+	pAd->RalinkCounters.KickTxCount++;
+	pAd->RalinkCounters.OneSecTxDoneCount++;
+
+	/*
+	   Kick out Tx
+	 */
+#ifdef PCIE_PS_SUPPORT
+	if (!RTMP_TEST_PSFLAG(pAd, fRTMP_PS_DISABLE_TX))
+#endif /* PCIE_PS_SUPPORT */
+		HAL_KickOutTx(pAd, pTxBlk, pTxBlk->QueIdx);
+}
+
+VOID STA_ARalink_Frame_Tx(
+	IN PRTMP_ADAPTER pAd,
+	IN TX_BLK * pTxBlk)
+{
+	PUCHAR pHeaderBufPtr;
+	USHORT FreeNumber = 0;
+	USHORT totalMPDUSize = 0;
+	USHORT FirstTx, LastTxIdx;
+	int frameNum = 0;
+	BOOLEAN bVLANPkt;
+	PQUEUE_ENTRY pQEntry;
+
+	ASSERT(pTxBlk);
+
+	ASSERT((pTxBlk->TxPacketList.Number == 2));
+
+	FirstTx = LastTxIdx = 0;	/* Is it ok init they as 0? */
+	while (pTxBlk->TxPacketList.Head) {
+		pQEntry = RemoveHeadQueue(&pTxBlk->TxPacketList);
+		pTxBlk->pPacket = QUEUE_ENTRY_TO_PACKET(pQEntry);
+
+		if (RTMP_FillTxBlkInfo(pAd, pTxBlk) != TRUE) {
+			RELEASE_NDIS_PACKET(pAd, pTxBlk->pPacket,
+					    NDIS_STATUS_FAILURE);
+			continue;
+		}
+
+		bVLANPkt =
+		    (RTMP_GET_PACKET_VLAN(pTxBlk->pPacket) ? TRUE : FALSE);
+
+		/* skip 802.3 header */
+		pTxBlk->pSrcBufData = pTxBlk->pSrcBufHeader + LENGTH_802_3;
+		pTxBlk->SrcBufLen -= LENGTH_802_3;
+
+		/* skip vlan tag */
+		if (bVLANPkt) {
+			pTxBlk->pSrcBufData += LENGTH_802_1Q;
+			pTxBlk->SrcBufLen -= LENGTH_802_1Q;
+		}
+
+		if (frameNum == 0) {	/* For first frame, we need to create the 802.11 header + padding(optional) + RA-AGG-LEN + SNAP Header */
+
+			pHeaderBufPtr =
+			    STA_Build_ARalink_Frame_Header(pAd, pTxBlk);
+
+			/*
+			   It's ok write the TxWI here, because the TxWI->MPDUtotalByteCount 
+			   will be updated after final frame was handled.
+			 */
+			RTMPWriteTxWI_Data(pAd,
+					   (PTXWI_STRUC) (&pTxBlk->
+							  HeaderBuf
+							  [TXINFO_SIZE]),
+					   pTxBlk);
+
+
+			/*
+			   Insert LLC-SNAP encapsulation - 8 octets
+			 */
+			EXTRA_LLCSNAP_ENCAP_FROM_PKT_OFFSET(pTxBlk->
+							    pSrcBufData - 2,
+							    pTxBlk->
+							    pExtraLlcSnapEncap);
+
+			if (pTxBlk->pExtraLlcSnapEncap) {
+				NdisMoveMemory(pHeaderBufPtr,
+					       pTxBlk->pExtraLlcSnapEncap, 6);
+				pHeaderBufPtr += 6;
+				/* get 2 octets (TypeofLen) */
+				NdisMoveMemory(pHeaderBufPtr,
+					       pTxBlk->pSrcBufData - 2, 2);
+				pHeaderBufPtr += 2;
+				pTxBlk->MpduHeaderLen += LENGTH_802_1_H;
+			}
+		} else {	/* For second aggregated frame, we need create the 802.3 header to headerBuf, because PCI will copy it to SDPtr0. */
+
+			pHeaderBufPtr = &pTxBlk->HeaderBuf[0];
+			pTxBlk->MpduHeaderLen = 0;
+
+			/* 
+			   A-Ralink sub-sequent frame header is the same as 802.3 header.
+			   DA(6)+SA(6)+FrameType(2)
+			 */
+			NdisMoveMemory(pHeaderBufPtr, pTxBlk->pSrcBufHeader,
+				       12);
+			pHeaderBufPtr += 12;
+			/* get 2 octets (TypeofLen) */
+			NdisMoveMemory(pHeaderBufPtr, pTxBlk->pSrcBufData - 2,
+				       2);
+			pHeaderBufPtr += 2;
+			pTxBlk->MpduHeaderLen = LENGTH_ARALINK_SUBFRAMEHEAD;
+		}
+
+		totalMPDUSize += pTxBlk->MpduHeaderLen + pTxBlk->SrcBufLen;
+
+		/* FreeNumber = GET_TXRING_FREENO(pAd, QueIdx); */
+		if (frameNum == 0)
+			FirstTx =
+			    HAL_WriteMultiTxResource(pAd, pTxBlk, frameNum,
+						     &FreeNumber);
+		else
+			LastTxIdx =
+			    HAL_WriteMultiTxResource(pAd, pTxBlk, frameNum,
+						     &FreeNumber);
+
+		frameNum++;
+
+		pAd->RalinkCounters.OneSecTxAggregationCount++;
+		pAd->RalinkCounters.KickTxCount++;
+		pAd->RalinkCounters.OneSecTxDoneCount++;
+
+	}
+
+	HAL_FinalWriteTxResource(pAd, pTxBlk, totalMPDUSize, FirstTx);
+	HAL_LastTxIdx(pAd, pTxBlk->QueIdx, LastTxIdx);
+
+	/*
+	   Kick out Tx
+	 */
+#ifdef PCIE_PS_SUPPORT
+	if (!RTMP_TEST_PSFLAG(pAd, fRTMP_PS_DISABLE_TX))
+#endif /* PCIE_PS_SUPPORT */
+		HAL_KickOutTx(pAd, pTxBlk, pTxBlk->QueIdx);
+
+}
+
+VOID STA_Fragment_Frame_Tx(
+	IN RTMP_ADAPTER *pAd,
+	IN TX_BLK *pTxBlk)
+{
+	HEADER_802_11 *pHeader_802_11;
+	PUCHAR pHeaderBufPtr;
+	USHORT FreeNumber = 0;
+	UCHAR fragNum = 0;
+	PACKET_INFO PacketInfo;
+	USHORT EncryptionOverhead = 0;
+	UINT32 FreeMpduSize, SrcRemainingBytes;
+	USHORT AckDuration;
+	UINT NextMpduSize;
+	BOOLEAN bVLANPkt;
+	PQUEUE_ENTRY pQEntry;
+	HTTRANSMIT_SETTING *pTransmit;
+#ifdef SOFT_ENCRYPT
+	PUCHAR tmp_ptr = NULL;
+	UINT32 buf_offset = 0;
+#endif /* SOFT_ENCRYPT */
+
+	ASSERT(pTxBlk);
+
+	pQEntry = RemoveHeadQueue(&pTxBlk->TxPacketList);
+	pTxBlk->pPacket = QUEUE_ENTRY_TO_PACKET(pQEntry);
+	if (RTMP_FillTxBlkInfo(pAd, pTxBlk) != TRUE) {
+		RELEASE_NDIS_PACKET(pAd, pTxBlk->pPacket, NDIS_STATUS_FAILURE);
+		return;
+	}
+
+	ASSERT(TX_BLK_TEST_FLAG(pTxBlk, fTX_bAllowFrag));
+	bVLANPkt = (RTMP_GET_PACKET_VLAN(pTxBlk->pPacket) ? TRUE : FALSE);
+
+	STAFindCipherAlgorithm(pAd, pTxBlk);
+	STABuildCommon802_11Header(pAd, pTxBlk);
+
+#ifdef SOFT_ENCRYPT
+	/*
+	   Check if the original data has enough buffer 
+	   to insert or append extended field.
+	 */
+	if (TX_BLK_TEST_FLAG(pTxBlk, fTX_bSwEncrypt)) {
+		if (RTMPExpandPacketForSwEncrypt(pAd, pTxBlk) == FALSE) {
+			RELEASE_NDIS_PACKET(pAd, pTxBlk->pPacket,
+					    NDIS_STATUS_FAILURE);
+			return;
+		}
+	}
+#endif /* SOFT_ENCRYPT */
+
+	if (pTxBlk->CipherAlg == CIPHER_TKIP) {
+		pTxBlk->pPacket =
+		    duplicate_pkt_with_TKIP_MIC(pAd, pTxBlk->pPacket);
+		if (pTxBlk->pPacket == NULL)
+			return;
+		RTMP_QueryPacketInfo(pTxBlk->pPacket, &PacketInfo,
+				     &pTxBlk->pSrcBufHeader,
+				     &pTxBlk->SrcBufLen);
+	}
+
+	/* skip 802.3 header */
+	pTxBlk->pSrcBufData = pTxBlk->pSrcBufHeader + LENGTH_802_3;
+	pTxBlk->SrcBufLen -= LENGTH_802_3;
+
+	/* skip vlan tag */
+	if (bVLANPkt) {
+		pTxBlk->pSrcBufData += LENGTH_802_1Q;
+		pTxBlk->SrcBufLen -= LENGTH_802_1Q;
+	}
+
+	pHeaderBufPtr = &pTxBlk->HeaderBuf[TXINFO_SIZE + TXWI_SIZE];
+	pHeader_802_11 = (HEADER_802_11 *) pHeaderBufPtr;
+
+	/* skip common header */
+	pHeaderBufPtr += pTxBlk->MpduHeaderLen;
+
+	if (TX_BLK_TEST_FLAG(pTxBlk, fTX_bWMM)) {
+		/*
+		   build QOS Control bytes
+		 */
+		*pHeaderBufPtr = (pTxBlk->UserPriority & 0x0F);
+
+		*(pHeaderBufPtr + 1) = 0;
+		pHeaderBufPtr += 2;
+		pTxBlk->MpduHeaderLen += 2;
+	}
+
+	/*
+	   padding at front of LLC header
+	   LLC header should locate at 4-octets aligment
+	 */
+	pTxBlk->HdrPadLen = (ULONG) pHeaderBufPtr;
+	pHeaderBufPtr = (PUCHAR) ROUND_UP(pHeaderBufPtr, 4);
+	pTxBlk->HdrPadLen = (ULONG) (pHeaderBufPtr - pTxBlk->HdrPadLen);
+
+#ifdef SOFT_ENCRYPT
+	if (TX_BLK_TEST_FLAG(pTxBlk, fTX_bSwEncrypt)) {
+		UCHAR iv_offset = 0;
+
+		/* if original Ethernet frame contains no LLC/SNAP, */
+		/* then an extra LLC/SNAP encap is required */
+		EXTRA_LLCSNAP_ENCAP_FROM_PKT_OFFSET(pTxBlk->pSrcBufData - 2,
+						    pTxBlk->pExtraLlcSnapEncap);
+
+		/* Insert LLC-SNAP encapsulation (8 octets) to MPDU data buffer */
+		if (pTxBlk->pExtraLlcSnapEncap) {
+			/* Reserve the front 8 bytes of data for LLC header */
+			pTxBlk->pSrcBufData -= LENGTH_802_1_H;
+			pTxBlk->SrcBufLen += LENGTH_802_1_H;
+
+			NdisMoveMemory(pTxBlk->pSrcBufData,
+				       pTxBlk->pExtraLlcSnapEncap, 6);
+		}
+
+		/* Construct and insert specific IV header to MPDU header */
+		RTMPSoftConstructIVHdr(pTxBlk->CipherAlg,
+				       pTxBlk->KeyIdx,
+				       pTxBlk->pKey->TxTsc,
+				       pHeaderBufPtr, &iv_offset);
+		pHeaderBufPtr += iv_offset;
+		pTxBlk->MpduHeaderLen += iv_offset;
+
+	} else
+#endif /* SOFT_ENCRYPT */
+	{
+
+
+		/*
+		   Insert LLC-SNAP encapsulation - 8 octets
+
+		   if original Ethernet frame contains no LLC/SNAP, 
+		   then an extra LLC/SNAP encap is required 
+		 */
+		EXTRA_LLCSNAP_ENCAP_FROM_PKT_START(pTxBlk->pSrcBufHeader,
+						   pTxBlk->pExtraLlcSnapEncap);
+		if (pTxBlk->pExtraLlcSnapEncap) {
+			UCHAR vlan_size;
+
+			NdisMoveMemory(pHeaderBufPtr,
+				       pTxBlk->pExtraLlcSnapEncap, 6);
+			pHeaderBufPtr += 6;
+			/* skip vlan tag */
+			vlan_size = (bVLANPkt) ? LENGTH_802_1Q : 0;
+			/* get 2 octets (TypeofLen) */
+			NdisMoveMemory(pHeaderBufPtr,
+				       pTxBlk->pSrcBufHeader + 12 + vlan_size,
+				       2);
+			pHeaderBufPtr += 2;
+			pTxBlk->MpduHeaderLen += LENGTH_802_1_H;
+		}
+	}
+
+	/*
+	   If TKIP is used and fragmentation is required. Driver has to
+	   append TKIP MIC at tail of the scatter buffer
+	   MAC ASIC will only perform IV/EIV/ICV insertion but no TKIP MIC
+	 */
+	if (pTxBlk->CipherAlg == CIPHER_TKIP) {
+		RTMPCalculateMICValue(pAd, pTxBlk->pPacket,
+				      pTxBlk->pExtraLlcSnapEncap, pTxBlk->pKey,
+				      0);
+
+		/*
+		   NOTE: DON'T refer the skb->len directly after following copy. Becasue the length is not adjust
+		   to correct lenght, refer to pTxBlk->SrcBufLen for the packet length in following progress. 
+		 */
+		NdisMoveMemory(pTxBlk->pSrcBufData + pTxBlk->SrcBufLen,
+			       &pAd->PrivateInfo.Tx.MIC[0], 8);
+		pTxBlk->SrcBufLen += 8;
+		pTxBlk->TotalFrameLen += 8;
+	}
+
+	/*
+	   calcuate the overhead bytes that encryption algorithm may add. This
+	   affects the calculate of "duration" field
+	 */
+	if ((pTxBlk->CipherAlg == CIPHER_WEP64)
+	    || (pTxBlk->CipherAlg == CIPHER_WEP128))
+		EncryptionOverhead = 8;	/* WEP: IV[4] + ICV[4]; */
+	else if (pTxBlk->CipherAlg == CIPHER_TKIP)
+		EncryptionOverhead = 12;	/* TKIP: IV[4] + EIV[4] + ICV[4], MIC will be added to TotalPacketLength */
+	else if (pTxBlk->CipherAlg == CIPHER_AES)
+		EncryptionOverhead = 16;	/* AES: IV[4] + EIV[4] + MIC[8] */
+	else
+		EncryptionOverhead = 0;
+
+	pTransmit = pTxBlk->pTransmit;
+	/* Decide the TX rate */
+	if (pTransmit->field.MODE == MODE_CCK)
+		pTxBlk->TxRate = pTransmit->field.MCS;
+	else if (pTransmit->field.MODE == MODE_OFDM)
+		pTxBlk->TxRate = pTransmit->field.MCS + RATE_FIRST_OFDM_RATE;
+	else
+		pTxBlk->TxRate = RATE_6_5;
+
+	/* decide how much time an ACK/CTS frame will consume in the air */
+	if (pTxBlk->TxRate <= RATE_LAST_OFDM_RATE)
+		AckDuration =
+		    RTMPCalcDuration(pAd,
+				     pAd->CommonCfg.ExpectedACKRate[pTxBlk->
+								    TxRate],
+				     14);
+	else
+		AckDuration = RTMPCalcDuration(pAd, RATE_6_5, 14);
+
+	/* Init the total payload length of this frame. */
+	SrcRemainingBytes = pTxBlk->SrcBufLen;
+
+	pTxBlk->TotalFragNum = 0xff;
+
+#ifdef SOFT_ENCRYPT
+	if (TX_BLK_TEST_FLAG(pTxBlk, fTX_bSwEncrypt)) {
+		/* store the outgoing frame for calculating MIC per fragmented frame */
+		os_alloc_mem(pAd, (PUCHAR *) & tmp_ptr, pTxBlk->SrcBufLen);
+		if (tmp_ptr == NULL) {
+			DBGPRINT(RT_DEBUG_ERROR,
+				 ("!!!%s : no memory for SW MIC calculation !!!\n",
+				  __FUNCTION__));
+			RELEASE_NDIS_PACKET(pAd, pTxBlk->pPacket,
+					    NDIS_STATUS_FAILURE);
+			return;
+		}
+		NdisMoveMemory(tmp_ptr, pTxBlk->pSrcBufData, pTxBlk->SrcBufLen);
+	}
+#endif /* SOFT_ENCRYPT */
+
+	do {
+
+		FreeMpduSize = pAd->CommonCfg.FragmentThreshold - LENGTH_CRC;
+
+		FreeMpduSize -= pTxBlk->MpduHeaderLen;
+
+		if (SrcRemainingBytes <= FreeMpduSize) {	/* this is the last or only fragment */
+
+			pTxBlk->SrcBufLen = SrcRemainingBytes;
+
+			pHeader_802_11->FC.MoreFrag = 0;
+			pHeader_802_11->Duration =
+			    pAd->CommonCfg.Dsifs + AckDuration;
+
+			/* Indicate the lower layer that this's the last fragment. */
+			pTxBlk->TotalFragNum = fragNum;
+		} else {	/* more fragment is required */
+
+			pTxBlk->SrcBufLen = FreeMpduSize;
+
+			NextMpduSize =
+			    min(((UINT) SrcRemainingBytes - pTxBlk->SrcBufLen),
+				((UINT) pAd->CommonCfg.FragmentThreshold));
+			pHeader_802_11->FC.MoreFrag = 1;
+			pHeader_802_11->Duration =
+			    (3 * pAd->CommonCfg.Dsifs) + (2 * AckDuration) +
+			    RTMPCalcDuration(pAd, pTxBlk->TxRate,
+					     NextMpduSize + EncryptionOverhead);
+		}
+
+		SrcRemainingBytes -= pTxBlk->SrcBufLen;
+
+		if (fragNum == 0)
+			pTxBlk->FrameGap = IFS_HTTXOP;
+		else
+			pTxBlk->FrameGap = IFS_SIFS;
+
+#ifdef SOFT_ENCRYPT
+		if (TX_BLK_TEST_FLAG(pTxBlk, fTX_bSwEncrypt)) {
+			UCHAR ext_offset = 0;
+
+			NdisMoveMemory(pTxBlk->pSrcBufData,
+				       tmp_ptr + buf_offset, pTxBlk->SrcBufLen);
+			buf_offset += pTxBlk->SrcBufLen;
+
+			/* Encrypt the MPDU data by software */
+			RTMPSoftEncryptionAction(pAd,
+						 pTxBlk->CipherAlg,
+						 (PUCHAR) pHeader_802_11,
+						 pTxBlk->pSrcBufData,
+						 pTxBlk->SrcBufLen,
+						 pTxBlk->KeyIdx,
+						 pTxBlk->pKey, &ext_offset);
+			pTxBlk->SrcBufLen += ext_offset;
+			pTxBlk->TotalFrameLen += ext_offset;
+
+		}
+#endif /* SOFT_ENCRYPT */
+
+		RTMPWriteTxWI_Data(pAd,
+				   (PTXWI_STRUC) (&pTxBlk->
+						  HeaderBuf[TXINFO_SIZE]),
+				   pTxBlk);
+
+		HAL_WriteFragTxResource(pAd, pTxBlk, fragNum, &FreeNumber);
+
+		pAd->RalinkCounters.KickTxCount++;
+		pAd->RalinkCounters.OneSecTxDoneCount++;
+
+		/* Update the frame number, remaining size of the NDIS packet payload. */
+#ifdef SOFT_ENCRYPT
+		if (TX_BLK_TEST_FLAG(pTxBlk, fTX_bSwEncrypt)) {
+			if ((pTxBlk->CipherAlg == CIPHER_WEP64)
+				    || (pTxBlk->CipherAlg == CIPHER_WEP128)) {
+				inc_iv_byte(pTxBlk->pKey->TxTsc, LEN_WEP_TSC,
+					    1);
+				/* Construct and insert 4-bytes WEP IV header to MPDU header */
+				RTMPConstructWEPIVHdr(pTxBlk->KeyIdx,
+						      pTxBlk->pKey->TxTsc,
+						      pHeaderBufPtr -
+						      (LEN_WEP_IV_HDR));
+			} else if (pTxBlk->CipherAlg == CIPHER_TKIP) ;
+			else if (pTxBlk->CipherAlg == CIPHER_AES) {
+				inc_iv_byte(pTxBlk->pKey->TxTsc, LEN_WPA_TSC,
+					    1);
+				/* Construct and insert 8-bytes CCMP header to MPDU header */
+				RTMPConstructCCMPHdr(pTxBlk->KeyIdx,
+						     pTxBlk->pKey->TxTsc,
+						     pHeaderBufPtr -
+						     (LEN_CCMP_HDR));
+			}
+		} else
+#endif /* SOFT_ENCRYPT */
+		{
+			/* space for 802.11 header. */
+			if (fragNum == 0 && pTxBlk->pExtraLlcSnapEncap)
+				pTxBlk->MpduHeaderLen -= LENGTH_802_1_H;
+		}
+
+		fragNum++;
+		/* SrcRemainingBytes -= pTxBlk->SrcBufLen; */
+		pTxBlk->pSrcBufData += pTxBlk->SrcBufLen;
+
+		pHeader_802_11->Frag++;	/* increase Frag # */
+
+	} while (SrcRemainingBytes > 0);
+
+#ifdef SOFT_ENCRYPT
+	if (tmp_ptr != NULL)
+		os_free_mem(pAd, tmp_ptr);
+#endif /* SOFT_ENCRYPT */
+
+	/*
+	   Kick out Tx
+	 */
+#ifdef PCIE_PS_SUPPORT
+	if (!RTMP_TEST_PSFLAG(pAd, fRTMP_PS_DISABLE_TX))
+#endif /* PCIE_PS_SUPPORT */
+		HAL_KickOutTx(pAd, pTxBlk, pTxBlk->QueIdx);
+}
+
+#define RELEASE_FRAMES_OF_TXBLK(_pAd, _pTxBlk, _pQEntry, _Status) 										\
+		while(_pTxBlk->TxPacketList.Head)														\
+		{																						\
+			_pQEntry = RemoveHeadQueue(&_pTxBlk->TxPacketList);									\
+			RELEASE_NDIS_PACKET(_pAd, QUEUE_ENTRY_TO_PACKET(_pQEntry), _Status);	\
+		}
+
+/*
+	========================================================================
+
+	Routine Description:
+		Copy frame from waiting queue into relative ring buffer and set 
+	appropriate ASIC register to kick hardware encryption before really
+	sent out to air.
+		
+	Arguments:
+		pAd 	Pointer to our adapter
+		PNDIS_PACKET	Pointer to outgoing Ndis frame
+		NumberOfFrag	Number of fragment required
+		
+	Return Value:
+		None
+
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+	
+	========================================================================
+*/
+NDIS_STATUS STAHardTransmit(
+	IN PRTMP_ADAPTER pAd,
+	IN TX_BLK *pTxBlk,
+	IN UCHAR QueIdx)
+{
+	NDIS_PACKET *pPacket;
+	PQUEUE_ENTRY pQEntry;
+
+	/*
+	   ---------------------------------------------
+	   STEP 0. DO SANITY CHECK AND SOME EARLY PREPARATION.
+	   ---------------------------------------------        
+	 */
+	ASSERT(pTxBlk->TxPacketList.Number);
+	if (pTxBlk->TxPacketList.Head == NULL) {
+		DBGPRINT(RT_DEBUG_ERROR,
+			 ("pTxBlk->TotalFrameNum == %ld!\n",
+			  pTxBlk->TxPacketList.Number));
+		return NDIS_STATUS_FAILURE;
+	}
+
+	pPacket = QUEUE_ENTRY_TO_PACKET(pTxBlk->TxPacketList.Head);
+
+#ifdef RTMP_MAC_USB
+	/* there's packet to be sent, keep awake for 1200ms */
+	if (pAd->CountDowntoPsm < 12)
+		pAd->CountDowntoPsm = 12;
+
+#endif /* RTMP_MAC_USB */
+
+
+	/* ------------------------------------------------------------------
+	   STEP 1. WAKE UP PHY
+	   outgoing frame always wakeup PHY to prevent frame lost and 
+	   turn off PSM bit to improve performance
+	   ------------------------------------------------------------------
+	   not to change PSM bit, just send this frame out?
+	 */
+	if ((pAd->StaCfg.Psm == PWR_SAVE)
+	    && OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE)) {
+		DBGPRINT_RAW(RT_DEBUG_INFO, ("AsicForceWakeup At HardTx\n"));
+#ifdef RTMP_MAC_USB
+		RTEnqueueInternalCmd(pAd, CMDTHREAD_FORCE_WAKE_UP, NULL, 0);
+#endif /* RTMP_MAC_USB */
+	}
+
+	/* It should not change PSM bit, when APSD turn on. */
+	if ((!
+	     (pAd->CommonCfg.bAPSDCapable
+	      && pAd->CommonCfg.APEdcaParm.bAPSDCapable)
+	     && (pAd->CommonCfg.bAPSDForcePowerSave == FALSE))
+	    || (RTMP_GET_PACKET_EAPOL(pTxBlk->pPacket))
+	    || (RTMP_GET_PACKET_WAI(pTxBlk->pPacket))) {
+		if ((pAd->StaCfg.Psm == PWR_SAVE) &&
+		    (pAd->StaCfg.WindowsPowerMode ==
+		     Ndis802_11PowerModeFast_PSP))
+			RTMP_SET_PSM_BIT(pAd, PWR_ACTIVE);
+	}
+
+	switch (pTxBlk->TxFrameType) {
+#ifdef DOT11_N_SUPPORT
+	case TX_AMPDU_FRAME:
+		STA_AMPDU_Frame_Tx(pAd, pTxBlk);
+		break;
+	case TX_AMSDU_FRAME:
+		STA_AMSDU_Frame_Tx(pAd, pTxBlk);
+		break;
+#endif /* DOT11_N_SUPPORT */
+	case TX_LEGACY_FRAME:
+		STA_Legacy_Frame_Tx(pAd, pTxBlk);
+		break;
+	case TX_MCAST_FRAME:
+		STA_Legacy_Frame_Tx(pAd, pTxBlk);
+		break;
+	case TX_RALINK_FRAME:
+		STA_ARalink_Frame_Tx(pAd, pTxBlk);
+		break;
+	case TX_FRAG_FRAME:
+		STA_Fragment_Frame_Tx(pAd, pTxBlk);
+		break;
+	default:
+		{
+			/* It should not happened! */
+			DBGPRINT(RT_DEBUG_ERROR,
+				 ("Send a pacekt was not classified!! It should not happen!\n"));
+			while (pTxBlk->TxPacketList.Number) {
+				pQEntry =
+				    RemoveHeadQueue(&pTxBlk->TxPacketList);
+				pPacket = QUEUE_ENTRY_TO_PACKET(pQEntry);
+				if (pPacket)
+					RELEASE_NDIS_PACKET(pAd, pPacket,
+							    NDIS_STATUS_FAILURE);
+			}
+		}
+		break;
+	}
+
+	return (NDIS_STATUS_SUCCESS);
+
+}
+
+ULONG HashBytesPolynomial(
+	UCHAR *value,
+	unsigned int len)
+{
+	unsigned char *word = value;
+	unsigned int ret = 0;
+	unsigned int i;
+
+	for (i = 0; i < len; i++) {
+		int mod = i % 32;
+		ret ^= (unsigned int)(word[i]) << mod;
+		ret ^= (unsigned int)(word[i]) >> (32 - mod);
+	}
+	return ret;
+}
+
+VOID Sta_Announce_or_Forward_802_3_Packet(
+	IN PRTMP_ADAPTER pAd,
+	IN PNDIS_PACKET pPacket,
+	IN UCHAR FromWhichBSSID)
+{
+	if (TRUE
+	    ) {
+		announce_802_3_packet(pAd, pPacket, OPMODE_STA);
+	} else {
+		/* release packet */
+		RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_FAILURE);
+	}
+}
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/sta/sanity.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/sta/sanity.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/sta/sanity.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/sta/sanity.c	2017-09-23 03:42:49.854675566 +0800
@@ -0,0 +1,329 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+extern UCHAR CISCO_OUI[];
+
+extern UCHAR WPA_OUI[];
+extern UCHAR RSN_OUI[];
+extern UCHAR WME_INFO_ELEM[];
+extern UCHAR WME_PARM_ELEM[];
+extern UCHAR RALINK_OUI[];
+extern UCHAR BROADCOM_OUI[];
+
+/* 
+    ==========================================================================
+    Description:
+        MLME message sanity check
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+ */
+BOOLEAN MlmeStartReqSanity(
+	IN PRTMP_ADAPTER pAd,
+	IN VOID *Msg,
+	IN ULONG MsgLen,
+	OUT CHAR Ssid[],
+	OUT UCHAR *pSsidLen)
+{
+	MLME_START_REQ_STRUCT *Info;
+
+	Info = (MLME_START_REQ_STRUCT *) (Msg);
+
+	if (Info->SsidLen > MAX_LEN_OF_SSID) {
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("MlmeStartReqSanity fail - wrong SSID length\n"));
+		return FALSE;
+	}
+
+	*pSsidLen = Info->SsidLen;
+	NdisMoveMemory(Ssid, Info->Ssid, *pSsidLen);
+
+	return TRUE;
+}
+
+/* 
+    ==========================================================================
+    Description:
+        MLME message sanity check
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+        
+    IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+BOOLEAN PeerAssocRspSanity(
+	IN PRTMP_ADAPTER pAd,
+	IN VOID *pMsg,
+	IN ULONG MsgLen,
+	OUT PUCHAR pAddr2,
+	OUT USHORT *pCapabilityInfo,
+	OUT USHORT *pStatus,
+	OUT USHORT *pAid,
+	OUT UCHAR SupRate[],
+	OUT UCHAR *pSupRateLen,
+	OUT UCHAR ExtRate[],
+	OUT UCHAR *pExtRateLen,
+	OUT HT_CAPABILITY_IE *pHtCapability,
+	OUT ADD_HT_INFO_IE *pAddHtInfo,	/* AP might use this additional ht info IE */
+	OUT UCHAR *pHtCapabilityLen,
+	OUT UCHAR *pAddHtInfoLen,
+	OUT UCHAR *pNewExtChannelOffset,
+	OUT PEDCA_PARM pEdcaParm,
+	OUT EXT_CAP_INFO_ELEMENT *pExtCapInfo,
+	OUT UCHAR *pCkipFlag)
+{
+	CHAR IeType, *Ptr;
+	PFRAME_802_11 pFrame = (PFRAME_802_11) pMsg;
+	PEID_STRUCT pEid;
+	ULONG Length = 0;
+
+	*pNewExtChannelOffset = 0xff;
+	*pHtCapabilityLen = 0;
+	*pAddHtInfoLen = 0;
+	COPY_MAC_ADDR(pAddr2, pFrame->Hdr.Addr2);
+	Ptr = (PCHAR) pFrame->Octet;
+	Length += LENGTH_802_11;
+
+	NdisMoveMemory(pCapabilityInfo, &pFrame->Octet[0], 2);
+	Length += 2;
+	NdisMoveMemory(pStatus, &pFrame->Octet[2], 2);
+	Length += 2;
+	*pCkipFlag = 0;
+	*pExtRateLen = 0;
+	pEdcaParm->bValid = FALSE;
+
+	if (*pStatus != MLME_SUCCESS)
+		return TRUE;
+
+	NdisMoveMemory(pAid, &pFrame->Octet[4], 2);
+	Length += 2;
+
+	/* Aid already swaped byte order in RTMPFrameEndianChange() for big endian platform */
+	*pAid = (*pAid) & 0x3fff;	/* AID is low 14-bit */
+
+	/* -- get supported rates from payload and advance the pointer */
+	IeType = pFrame->Octet[6];
+	*pSupRateLen = pFrame->Octet[7];
+	if ((IeType != IE_SUPP_RATES)
+	    || (*pSupRateLen > MAX_LEN_OF_SUPPORTED_RATES)) {
+		DBGPRINT(RT_DEBUG_TRACE,
+			 ("PeerAssocRspSanity fail - wrong SupportedRates IE\n"));
+		return FALSE;
+	} else
+		NdisMoveMemory(SupRate, &pFrame->Octet[8], *pSupRateLen);
+
+
+	Length = Length + 2 + *pSupRateLen;
+
+	/*
+	   many AP implement proprietary IEs in non-standard order, we'd better
+	   tolerate mis-ordered IEs to get best compatibility
+	 */
+	pEid = (PEID_STRUCT) & pFrame->Octet[8 + (*pSupRateLen)];
+
+	/* get variable fields from payload and advance the pointer */
+	while ((Length + 2 + pEid->Len) <= MsgLen) {
+		switch (pEid->Eid) {
+		case IE_EXT_SUPP_RATES:
+			if (pEid->Len <= MAX_LEN_OF_SUPPORTED_RATES) {
+				NdisMoveMemory(ExtRate, pEid->Octet, pEid->Len);
+				*pExtRateLen = pEid->Len;
+			}
+			break;
+
+		case IE_HT_CAP:
+		case IE_HT_CAP2:
+			if (pEid->Len >= SIZE_HT_CAP_IE) {	/* Note: allow extension.!! */
+				NdisMoveMemory(pHtCapability, pEid->Octet,
+					       SIZE_HT_CAP_IE);
+
+				*(USHORT *) (&pHtCapability->HtCapInfo) =
+				    cpu2le16(*(USHORT *)
+					     (&pHtCapability->HtCapInfo));
+				*(USHORT *) (&pHtCapability->ExtHtCapInfo) =
+				    cpu2le16(*(USHORT *)
+					     (&pHtCapability->ExtHtCapInfo));
+
+				*pHtCapabilityLen = SIZE_HT_CAP_IE;
+			} else {
+				DBGPRINT(RT_DEBUG_WARN,
+					 ("PeerAssocRspSanity - wrong IE_HT_CAP. \n"));
+			}
+
+			break;
+#ifdef DOT11_N_SUPPORT
+		case IE_ADD_HT:
+		case IE_ADD_HT2:
+			if (pEid->Len >= sizeof (ADD_HT_INFO_IE)) {
+				/*
+				   This IE allows extension, but we can ignore extra bytes beyond our knowledge , so only
+				   copy first sizeof(ADD_HT_INFO_IE)
+				 */
+				NdisMoveMemory(pAddHtInfo, pEid->Octet,
+					       sizeof (ADD_HT_INFO_IE));
+
+				*(USHORT *) (&pAddHtInfo->AddHtInfo2) =
+				    cpu2le16(*(USHORT *)
+					     (&pAddHtInfo->AddHtInfo2));
+				*(USHORT *) (&pAddHtInfo->AddHtInfo3) =
+				    cpu2le16(*(USHORT *)
+					     (&pAddHtInfo->AddHtInfo3));
+
+				*pAddHtInfoLen = SIZE_ADD_HT_INFO_IE;
+			} else {
+				DBGPRINT(RT_DEBUG_WARN,
+					 ("PeerAssocRspSanity - wrong IE_ADD_HT. \n"));
+			}
+
+			break;
+		case IE_SECONDARY_CH_OFFSET:
+			if (pEid->Len == 1) {
+				*pNewExtChannelOffset = pEid->Octet[0];
+			} else {
+				DBGPRINT(RT_DEBUG_WARN,
+					 ("PeerAssocRspSanity - wrong IE_SECONDARY_CH_OFFSET. \n"));
+			}
+#endif /* DOT11_N_SUPPORT */
+			break;
+
+		case IE_VENDOR_SPECIFIC:
+			/* handle WME PARAMTER ELEMENT */
+			if (NdisEqualMemory(pEid->Octet, WME_PARM_ELEM, 6)
+			    && (pEid->Len == 24)) {
+				PUCHAR ptr;
+				int i;
+
+				/* parsing EDCA parameters */
+				pEdcaParm->bValid = TRUE;
+				pEdcaParm->bQAck = FALSE;	/* pEid->Octet[0] & 0x10; */
+				pEdcaParm->bQueueRequest = FALSE;	/* pEid->Octet[0] & 0x20; */
+				pEdcaParm->bTxopRequest = FALSE;	/* pEid->Octet[0] & 0x40; */
+				pEdcaParm->EdcaUpdateCount =
+				    pEid->Octet[6] & 0x0f;
+				pEdcaParm->bAPSDCapable =
+				    (pEid->Octet[6] & 0x80) ? 1 : 0;
+				ptr = (PUCHAR) & pEid->Octet[8];
+				for (i = 0; i < 4; i++) {
+					UCHAR aci = (*ptr & 0x60) >> 5;	/* b5~6 is AC INDEX */
+					pEdcaParm->bACM[aci] = (((*ptr) & 0x10) == 0x10);	/* b5 is ACM */
+					pEdcaParm->Aifsn[aci] = (*ptr) & 0x0f;	/* b0~3 is AIFSN */
+					pEdcaParm->Cwmin[aci] = *(ptr + 1) & 0x0f;	/* b0~4 is Cwmin */
+					pEdcaParm->Cwmax[aci] = *(ptr + 1) >> 4;	/* b5~8 is Cwmax */
+					pEdcaParm->Txop[aci] = *(ptr + 2) + 256 * (*(ptr + 3));	/* in unit of 32-us */
+					ptr += 4;	/* point to next AC */
+				}
+			}
+			break;
+		case IE_EXT_CAPABILITY:
+			if (pEid->Len >= sizeof (EXT_CAP_INFO_ELEMENT)) {
+				NdisMoveMemory(pExtCapInfo, &pEid->Octet[0],
+					       sizeof (EXT_CAP_INFO_ELEMENT));
+				DBGPRINT(RT_DEBUG_WARN,
+					 ("PeerAssocReqSanity - IE_EXT_CAPABILITY!\n"));
+			}
+			break;
+
+		default:
+			DBGPRINT(RT_DEBUG_TRACE,
+				 ("PeerAssocRspSanity - ignore unrecognized EID = %d\n",
+				  pEid->Eid));
+			break;
+		}
+
+		Length = Length + 2 + pEid->Len;
+		pEid = (PEID_STRUCT) ((UCHAR *) pEid + 2 + pEid->Len);
+	}
+
+
+	return TRUE;
+}
+
+/* 
+    ==========================================================================
+    Description:
+        
+	IRQL = DISPATCH_LEVEL
+
+    ==========================================================================
+ */
+BOOLEAN GetTimBit(
+	IN CHAR *Ptr,
+	IN USHORT Aid,
+	OUT UCHAR *TimLen,
+	OUT UCHAR *BcastFlag,
+	OUT UCHAR *DtimCount,
+	OUT UCHAR *DtimPeriod,
+	OUT UCHAR *MessageToMe)
+{
+	UCHAR BitCntl, N1, N2, MyByte, MyBit;
+	CHAR *IdxPtr;
+
+	IdxPtr = Ptr;
+
+	IdxPtr++;
+	*TimLen = *IdxPtr;
+
+	/* get DTIM Count from TIM element */
+	IdxPtr++;
+	*DtimCount = *IdxPtr;
+
+	/* get DTIM Period from TIM element */
+	IdxPtr++;
+	*DtimPeriod = *IdxPtr;
+
+	/* get Bitmap Control from TIM element */
+	IdxPtr++;
+	BitCntl = *IdxPtr;
+
+	if ((*DtimCount == 0) && (BitCntl & 0x01))
+		*BcastFlag = TRUE;
+	else
+		*BcastFlag = FALSE;
+
+	/* Parse Partial Virtual Bitmap from TIM element */
+	N1 = BitCntl & 0xfe;	/* N1 is the first bitmap byte# */
+	N2 = *TimLen - 4 + N1;	/* N2 is the last bitmap byte# */
+
+	if ((Aid < (N1 << 3)) || (Aid >= ((N2 + 1) << 3)))
+		*MessageToMe = FALSE;
+	else {
+		MyByte = (Aid >> 3) - N1;	/* my byte position in the bitmap byte-stream */
+		MyBit = Aid % 16 - ((MyByte & 0x01) ? 8 : 0);
+
+		IdxPtr += (MyByte + 1);
+
+		if (*IdxPtr & (0x01 << MyBit))
+			*MessageToMe = TRUE;
+		else
+			*MessageToMe = FALSE;
+	}
+
+	return TRUE;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/sta/sta_cfg.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/sta/sta_cfg.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/sta/sta_cfg.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/sta/sta_cfg.c	2017-09-23 03:42:49.862675541 +0800
@@ -0,0 +1,7381 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include	"rt_config.h"
+
+
+
+INT Set_AutoReconnect_Proc(
+    IN  PRTMP_ADAPTER	pAd, 
+    IN  PSTRING			arg);
+
+INT Set_AdhocN_Proc(
+    IN  PRTMP_ADAPTER	pAd, 
+    IN  PSTRING			arg);
+
+
+
+static struct {
+	PSTRING name;
+	INT (*set_proc)(PRTMP_ADAPTER pAdapter, PSTRING arg);
+} *PRTMP_PRIVATE_SET_PROC, RTMP_PRIVATE_SUPPORT_PROC[] = {
+	{"DriverVersion",				Set_DriverVersion_Proc},
+	{"CountryRegion",				Set_CountryRegion_Proc},	
+	{"CountryRegionABand",			Set_CountryRegionABand_Proc},      
+	{"SSID",						Set_SSID_Proc}, 
+	{"WirelessMode",				Set_WirelessMode_Proc},       
+	{"TxBurst",					Set_TxBurst_Proc},
+	{"TxPreamble",				Set_TxPreamble_Proc},
+	{"TxPower",					Set_TxPower_Proc},
+	{"Channel",					Set_Channel_Proc},            
+	{"BGProtection",				Set_BGProtection_Proc},
+	{"RTSThreshold",				Set_RTSThreshold_Proc},       
+	{"FragThreshold",				Set_FragThreshold_Proc},      
+#ifdef DOT11_N_SUPPORT
+	{"HtBw",		                Set_HtBw_Proc},
+	{"HtMcs",		                Set_HtMcs_Proc},
+	{"HtGi",		                Set_HtGi_Proc},
+	{"HtOpMode",		            Set_HtOpMode_Proc},
+	{"HtStbc",						Set_HtStbc_Proc},
+	{"HtExtcha",		            Set_HtExtcha_Proc},
+	{"HtMpduDensity",		        Set_HtMpduDensity_Proc},
+	{"HtBaWinSize",		        	Set_HtBaWinSize_Proc},
+	{"HtRdg",		        		Set_HtRdg_Proc},
+	{"HtAmsdu",		        		Set_HtAmsdu_Proc},
+	{"HtAutoBa",		        	Set_HtAutoBa_Proc},
+	{"HtBaDecline",					Set_BADecline_Proc},
+	{"HtProtect",		        	Set_HtProtect_Proc},
+	{"HtMimoPs",		        	Set_HtMimoPs_Proc},
+	{"HtDisallowTKIP",				Set_HtDisallowTKIP_Proc},
+#ifdef DOT11N_DRAFT3
+	{"HtBssCoex",				Set_HT_BssCoex_Proc},
+#endif /* DOT11N_DRAFT3 */
+#endif /* DOT11_N_SUPPORT */
+	
+#ifdef AGGREGATION_SUPPORT
+	{"PktAggregate",				Set_PktAggregate_Proc},       
+#endif /* AGGREGATION_SUPPORT */
+
+#ifdef WMM_SUPPORT
+	{"WmmCapable",					Set_WmmCapable_Proc},         
+#endif         
+	{"IEEE80211H",					Set_IEEE80211H_Proc},
+    {"NetworkType",                 Set_NetworkType_Proc},        
+	{"AuthMode",					Set_AuthMode_Proc},           
+	{"EncrypType",					Set_EncrypType_Proc},         
+	{"DefaultKeyID",				Set_DefaultKeyID_Proc},       
+	{"Key1",						Set_Key1_Proc},               
+	{"Key2",						Set_Key2_Proc},               
+	{"Key3",						Set_Key3_Proc},               
+	{"Key4",						Set_Key4_Proc},               
+	{"WPAPSK",						Set_WPAPSK_Proc},
+	{"ResetCounter",				Set_ResetStatCounter_Proc},
+	{"PSMode",                      Set_PSMode_Proc},
+#ifdef DBG
+	{"Debug",						Set_Debug_Proc},             
+#endif /* DBG */
+
+
+#ifdef RALINK_ATE
+	{"ATE",							Set_ATE_Proc},
+	{"ATEDA",						Set_ATE_DA_Proc},
+	{"ATESA",						Set_ATE_SA_Proc},
+	{"ATEBSSID",					Set_ATE_BSSID_Proc},
+	{"ATECHANNEL",					Set_ATE_CHANNEL_Proc},
+#ifdef RTMP_INTERNAL_TX_ALC
+	{"ATETSSICBA",					Set_ATE_TSSI_CALIBRATION_Proc},
+	{"ATETSSICBAEX",					Set_ATE_TSSI_CALIBRATION_EX_Proc},
+#endif /* RTMP_INTERNAL_TX_ALC */
+#ifdef RTMP_TEMPERATURE_COMPENSATION
+	{"ATEREADEXTSSI",				Set_ATE_READ_EXTERNAL_TSSI_Proc},
+#endif /* RTMP_TEMPERATURE_COMPENSATION */
+#ifdef HW_ANTENNA_DIVERSITY_SUPPORT
+	{"ATEANTDIV",					Set_ATE_DIV_ANTENNA_Proc},
+#endif // HW_ANTENNA_DIVERSITY_SUPPORT //
+	{"ATETXPOW0",					Set_ATE_TX_POWER0_Proc},
+	{"ATETXPOW1",					Set_ATE_TX_POWER1_Proc},
+#ifdef DOT11N_SS3_SUPPORT
+	{"ATETXPOW2",					Set_ATE_TX_POWER2_Proc},
+#endif /* DOT11N_SS3_SUPPORT */
+	{"ATETXANT",					Set_ATE_TX_Antenna_Proc},
+	{"ATERXANT",					Set_ATE_RX_Antenna_Proc},
+	{"ATETXFREQOFFSET",				Set_ATE_TX_FREQOFFSET_Proc},
+	{"ATETXBW",						Set_ATE_TX_BW_Proc},
+	{"ATETXLEN",					Set_ATE_TX_LENGTH_Proc},
+	{"ATETXCNT",					Set_ATE_TX_COUNT_Proc},
+	{"ATETXMCS",					Set_ATE_TX_MCS_Proc},
+	{"ATETXMODE",					Set_ATE_TX_MODE_Proc},
+	{"ATETXGI",						Set_ATE_TX_GI_Proc},
+	{"ATERXFER",					Set_ATE_RX_FER_Proc},
+	{"ATERRF",						Set_ATE_Read_RF_Proc},
+#ifndef RTMP_RF_RW_SUPPORT
+	{"ATEWRF1",						Set_ATE_Write_RF1_Proc},
+	{"ATEWRF2",						Set_ATE_Write_RF2_Proc},
+	{"ATEWRF3",						Set_ATE_Write_RF3_Proc},
+	{"ATEWRF4",						Set_ATE_Write_RF4_Proc},
+#endif /* RTMP_RF_RW_SUPPORT */
+	{"ATELDE2P",				    Set_ATE_Load_E2P_Proc},
+	{"ATERE2P",						Set_ATE_Read_E2P_Proc},
+#ifdef LED_CONTROL_SUPPORT
+#endif /* LED_CONTROL_SUUPORT */
+	{"ATEAUTOALC",					Set_ATE_AUTO_ALC_Proc},	
+	{"ATEIPG",						Set_ATE_IPG_Proc},
+	{"ATEPAYLOAD",					Set_ATE_Payload_Proc},
+#ifdef TXBF_SUPPORT
+	{"ATETXBF",					Set_ATE_TX_BF_Proc},
+#endif /* TXBF_SUPPORT */
+	{"ATESHOW",						Set_ATE_Show_Proc},
+	{"ATEHELP",						Set_ATE_Help_Proc},
+
+#ifdef RALINK_QA
+	{"TxStop",						Set_TxStop_Proc},
+	{"RxStop",						Set_RxStop_Proc},	
+#endif /* RALINK_QA */
+#endif /* RALINK_ATE */
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+    {"WpaSupport",                  Set_Wpa_Support},
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+
+
+
+
+	{"FixedTxMode",                 Set_FixedTxMode_Proc},
+#ifdef CONFIG_APSTA_MIXED_SUPPORT
+	{"OpMode",						Set_OpMode_Proc},
+#endif /* CONFIG_APSTA_MIXED_SUPPORT */
+#ifdef DOT11_N_SUPPORT
+    {"TGnWifiTest",                 Set_TGnWifiTest_Proc},
+#endif /* DOT11_N_SUPPORT */
+#ifdef QOS_DLS_SUPPORT
+	{"DlsAddEntry",					Set_DlsAddEntry_Proc},
+	{"DlsTearDownEntry",			Set_DlsTearDownEntry_Proc},
+#endif /* QOS_DLS_SUPPORT */
+	{"LongRetry",	        		Set_LongRetryLimit_Proc},
+	{"ShortRetry",	        		Set_ShortRetryLimit_Proc},
+	{"AutoFallBack",	        	Set_AutoFallBack_Proc},
+#ifdef EXT_BUILD_CHANNEL_LIST
+	{"11dClientMode",				Set_Ieee80211dClientMode_Proc},
+#endif /* EXT_BUILD_CHANNEL_LIST */
+#ifdef CARRIER_DETECTION_SUPPORT
+	{"CarrierDetect",				Set_CarrierDetect_Proc},
+#endif /* CARRIER_DETECTION_SUPPORT */
+
+
+/*2008/09/11:KH add to support efuse<-- */
+#ifdef RT30xx
+#ifdef RTMP_EFUSE_SUPPORT
+	{"efuseFreeNumber",				set_eFuseGetFreeBlockCount_Proc},
+	{"efuseDump",					set_eFusedump_Proc},
+	{"efuseLoadFromBin",				set_eFuseLoadFromBin_Proc},
+#ifdef RALINK_ATE
+	{"efuseBufferModeWriteBack",		set_eFuseBufferModeWriteBack_Proc},
+#endif /* RALINK_ATE */
+#endif /* RTMP_EFUSE_SUPPORT */
+	{"ant",					Set_Antenna_Proc},
+#endif /* RT30xx */
+
+#ifdef RT5350
+    {"HwAntDiv",                Set_Hw_Antenna_Div_Proc},
+#endif // RT5350 //
+
+	{"BeaconLostTime",				Set_BeaconLostTime_Proc},
+	{"AutoRoaming",					Set_AutoRoaming_Proc},
+	{"SiteSurvey",					Set_SiteSurvey_Proc},
+	{"ForceTxBurst",				Set_ForceTxBurst_Proc},
+
+
+#ifdef XLINK_SUPPORT
+	{"XlinkMode",					Set_XlinkMode_Proc},
+#endif /* XLINK_SUPPORT */
+
+
+	{"AutoReconnect", 				Set_AutoReconnect_Proc},
+	{"AdhocN",						Set_AdhocN_Proc},
+
+#ifdef AGS_SUPPORT
+	{"Ags",						Show_AGS_Proc},
+#endif /* AGS_SUPPORT */
+	{NULL,}
+};
+
+
+INT RTMPSTAPrivIoctlSet(
+	IN RTMP_ADAPTER *pAd, 
+	IN PSTRING SetProcName,
+	IN PSTRING ProcArg)
+{
+	int ret = 0;
+	
+	for (PRTMP_PRIVATE_SET_PROC = RTMP_PRIVATE_SUPPORT_PROC; PRTMP_PRIVATE_SET_PROC->name; PRTMP_PRIVATE_SET_PROC++)            
+	{                                                                                                                           
+	    if (strcmp(SetProcName, PRTMP_PRIVATE_SET_PROC->name) == 0)                                                               
+	    {						                                                                                                
+	        if(!PRTMP_PRIVATE_SET_PROC->set_proc(pAd, ProcArg))                                                              
+	        {	/*FALSE:Set private failed then return Invalid argument */
+			    return NDIS_STATUS_FAILURE;                                                                                               
+	        }                                                                                                                   
+		    break;	/*Exit for loop. */
+	    }
+	}
+	
+	if(PRTMP_PRIVATE_SET_PROC->name == NULL)                                                                                    
+	{  /*Not found argument */
+	 	DBGPRINT(RT_DEBUG_TRACE, ("===>rt_ioctl_setparam:: (iwpriv) Not Support Set Command [%s=%s]\n", SetProcName, ProcArg));
+	    return -EINVAL;                                                                                                       
+	   
+	}         
+
+	return ret;
+}
+
+
+/* 
+    ==========================================================================
+    Description:
+        Set SSID
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT Set_SSID_Proc(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  PSTRING          arg)
+{
+    NDIS_802_11_SSID                    Ssid, *pSsid=NULL;
+    BOOLEAN                             StateMachineTouched = FALSE;
+    int                                 success = TRUE;
+
+	/*
+		Set the AutoReconnectSsid to prevent it reconnect to old SSID
+		Since calling this indicate user don't want to connect to that SSID anymore.
+	*/
+	pAd->MlmeAux.AutoReconnectSsidLen= 32;
+	NdisZeroMemory(pAd->MlmeAux.AutoReconnectSsid, pAd->MlmeAux.AutoReconnectSsidLen);
+
+    if( strlen(arg) <= MAX_LEN_OF_SSID)
+    {
+        NdisZeroMemory(&Ssid, sizeof(NDIS_802_11_SSID));
+        if (strlen(arg) != 0)
+        {
+            NdisMoveMemory(Ssid.Ssid, arg, strlen(arg));
+            Ssid.SsidLength = strlen(arg);
+        }
+        else   /*ANY ssid */
+        {    
+            Ssid.SsidLength = 0; 
+	    	memcpy(Ssid.Ssid, "", 0);
+			pAd->StaCfg.BssType = BSS_INFRA;	
+			pAd->StaCfg.AuthMode = Ndis802_11AuthModeOpen;
+	        pAd->StaCfg.WepStatus  = Ndis802_11EncryptionDisabled;		    
+	}	 
+        pSsid = &Ssid;
+
+        if (pAd->Mlme.CntlMachine.CurrState != CNTL_IDLE)
+        {
+            RTMP_MLME_RESET_STATE_MACHINE(pAd);
+            DBGPRINT(RT_DEBUG_TRACE, ("!!! MLME busy, reset MLME state machine !!!\n"));
+        }
+
+		if ((pAd->StaCfg.WpaPassPhraseLen >= 8) &&
+			(pAd->StaCfg.WpaPassPhraseLen <= 64))
+		{
+			UCHAR keyMaterial[40];
+			
+			RTMPZeroMemory(pAd->StaCfg.PMK, 32);
+			if (pAd->StaCfg.WpaPassPhraseLen == 64)
+			{
+			    AtoH((PSTRING) pAd->StaCfg.WpaPassPhrase, pAd->StaCfg.PMK, 32);
+			}
+			else
+			{
+			    RtmpPasswordHash((PSTRING) pAd->StaCfg.WpaPassPhrase, Ssid.Ssid, Ssid.SsidLength, keyMaterial);
+			    NdisMoveMemory(pAd->StaCfg.PMK, keyMaterial, 32);		
+			}
+		}
+
+		/* Record the desired user settings to MlmeAux */
+		NdisZeroMemory(pAd->MlmeAux.Ssid, MAX_LEN_OF_SSID);
+		NdisMoveMemory(pAd->MlmeAux.Ssid, Ssid.Ssid, Ssid.SsidLength);
+		pAd->MlmeAux.SsidLen = (UCHAR)Ssid.SsidLength;
+
+		NdisMoveMemory(pAd->MlmeAux.AutoReconnectSsid, Ssid.Ssid, Ssid.SsidLength);
+		pAd->MlmeAux.AutoReconnectSsidLen = (UCHAR)Ssid.SsidLength;
+
+        pAd->MlmeAux.CurrReqIsFromNdis = TRUE;
+        pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
+		pAd->bConfigChanged = TRUE;
+        pAd->StaCfg.bNotFirstScan = FALSE;     
+
+	MlmeEnqueue(pAd, 
+		MLME_CNTL_STATE_MACHINE, 
+		OID_802_11_SSID,
+		sizeof(NDIS_802_11_SSID),
+		(VOID *)pSsid, 0);
+
+	StateMachineTouched = TRUE;	
+
+		if (Ssid.SsidLength == MAX_LEN_OF_SSID)
+			hex_dump("Set_SSID_Proc::Ssid", Ssid.Ssid, Ssid.SsidLength);
+		else
+			DBGPRINT(RT_DEBUG_TRACE, ("Set_SSID_Proc::(Len=%d,Ssid=%s)\n", Ssid.SsidLength, Ssid.Ssid));
+    }
+    else
+        success = FALSE;
+
+    if (StateMachineTouched) /* Upper layer sent a MLME-related operations */
+    	RTMP_MLME_HANDLER(pAd);
+
+    return success;
+}
+
+#ifdef WMM_SUPPORT
+/* 
+    ==========================================================================
+    Description:
+        Set WmmCapable Enable or Disable
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT	Set_WmmCapable_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+	BOOLEAN	bWmmCapable;
+
+	bWmmCapable = simple_strtol(arg, 0, 10);
+
+	if ((bWmmCapable == 1)
+#ifdef RTMP_MAC_USB
+		&& (pAd->NumberOfPipes >= 5)
+#endif /* RTMP_MAC_USB */
+		)
+		pAd->CommonCfg.bWmmCapable = TRUE;
+	else if (bWmmCapable == 0)
+		pAd->CommonCfg.bWmmCapable = FALSE;
+	else
+		return FALSE;  /*Invalid argument */
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("Set_WmmCapable_Proc::(bWmmCapable=%d)\n", 
+		pAd->CommonCfg.bWmmCapable));
+
+	return TRUE;
+}
+#endif /* WMM_SUPPORT */
+
+/* 
+    ==========================================================================
+    Description:
+        Set Network Type(Infrastructure/Adhoc mode)
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT Set_NetworkType_Proc(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  PSTRING          arg)
+{
+    UINT32	Value = 0;
+
+    if (strcmp(arg, "Adhoc") == 0)
+	{
+		if (pAd->StaCfg.BssType != BSS_ADHOC)
+		{				    
+			/* Config has changed */
+			pAd->bConfigChanged = TRUE;
+            if (MONITOR_ON(pAd))
+            {
+                RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, STANORMAL);
+                RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
+				Value &= (~0x80);
+				RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
+                OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED);
+                pAd->StaCfg.bAutoReconnect = TRUE;
+                LinkDown(pAd, FALSE);
+            }
+			if (INFRA_ON(pAd))
+			{
+				/*BOOLEAN Cancelled; */
+				/* Set the AutoReconnectSsid to prevent it reconnect to old SSID */
+				/* Since calling this indicate user don't want to connect to that SSID anymore. */
+				pAd->MlmeAux.AutoReconnectSsidLen= 32;
+				NdisZeroMemory(pAd->MlmeAux.AutoReconnectSsid, pAd->MlmeAux.AutoReconnectSsidLen);		
+				
+				LinkDown(pAd, FALSE);
+
+				DBGPRINT(RT_DEBUG_TRACE, ("NDIS_STATUS_MEDIA_DISCONNECT Event BB!\n"));
+			}
+#ifdef DOT11_N_SUPPORT
+			SetCommonHT(pAd);
+#endif /* DOT11_N_SUPPORT */
+		}			
+		pAd->StaCfg.BssType = BSS_ADHOC;
+		RTMP_OS_NETDEV_SET_TYPE(pAd->net_dev, pAd->StaCfg.OriDevType);
+		
+		DBGPRINT(RT_DEBUG_TRACE, ("===>Set_NetworkType_Proc::(AD-HOC)\n"));
+	}
+    else if (strcmp(arg, "Infra") == 0)
+	{
+		if (pAd->StaCfg.BssType != BSS_INFRA)
+		{			    
+			/* Config has changed */
+			pAd->bConfigChanged = TRUE;
+            if (MONITOR_ON(pAd))
+            {
+                RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, STANORMAL);
+                RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
+				Value &= (~0x80);
+				RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
+                OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED);
+                pAd->StaCfg.bAutoReconnect = TRUE;
+                LinkDown(pAd, FALSE);
+            }
+			if (ADHOC_ON(pAd))
+			{
+				/* Set the AutoReconnectSsid to prevent it reconnect to old SSID */
+				/* Since calling this indicate user don't want to connect to that SSID anymore. */
+				pAd->MlmeAux.AutoReconnectSsidLen= 32;
+				NdisZeroMemory(pAd->MlmeAux.AutoReconnectSsid, pAd->MlmeAux.AutoReconnectSsidLen);			
+			
+				LinkDown(pAd, FALSE);
+			}
+#ifdef DOT11_N_SUPPORT
+			SetCommonHT(pAd);
+#endif /* DOT11_N_SUPPORT */
+		}			
+		pAd->StaCfg.BssType = BSS_INFRA;
+		RTMP_OS_NETDEV_SET_TYPE(pAd->net_dev, pAd->StaCfg.OriDevType);
+		DBGPRINT(RT_DEBUG_TRACE, ("===>Set_NetworkType_Proc::(INFRA)\n"));            
+	}
+#ifdef MONITOR_FLAG_11N_SNIFFER_SUPPORT
+	/*
+		Monitor2 is for 3593 11n wireshark sniffer tool.
+		The name, Monitor2, follows the command format in RT2883.
+	*/
+    else if ((strcmp(arg, "Monitor") == 0) || (strcmp(arg, "Monitor2") == 0))
+#else
+    else if (strcmp(arg, "Monitor") == 0)
+#endif /* MONITOR_FLAG_11N_SNIFFER_SUPPORT */
+    {
+			UCHAR	bbpValue = 0;
+			BCN_TIME_CFG_STRUC csr;
+
+#ifdef MONITOR_FLAG_11N_SNIFFER_SUPPORT
+			if (strcmp(arg, "Monitor2") == 0)
+				pAd->StaCfg.BssMonitorFlag |= MONITOR_FLAG_11N_SNIFFER;
+			/* End of if */
+#endif /* MONITOR_FLAG_11N_SNIFFER_SUPPORT */
+
+			OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
+            OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
+			OPSTATUS_SET_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED);
+			/* disable all periodic state machine */
+			pAd->StaCfg.bAutoReconnect = FALSE;
+			/* reset all mlme state machine */
+			RTMP_MLME_RESET_STATE_MACHINE(pAd);
+			DBGPRINT(RT_DEBUG_TRACE, ("fOP_STATUS_MEDIA_STATE_CONNECTED \n"));
+            if (pAd->CommonCfg.CentralChannel == 0)
+            {
+#ifdef DOT11_N_SUPPORT
+                if (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED)
+                    pAd->CommonCfg.CentralChannel = 36;
+                else
+#endif /* DOT11_N_SUPPORT */
+                    pAd->CommonCfg.CentralChannel = 6;
+            }
+#ifdef DOT11_N_SUPPORT
+            else
+                N_ChannelCheck(pAd);
+#endif /* DOT11_N_SUPPORT */
+
+
+			/* same procedure with window driver */
+#ifdef DOT11_N_SUPPORT
+			if (pAd->CommonCfg.PhyMode >= PHY_11ABGN_MIXED &&
+                pAd->CommonCfg.RegTransmitSetting.field.BW == BW_40 &&
+                pAd->CommonCfg.RegTransmitSetting.field.EXTCHA == EXTCHA_ABOVE)
+			{
+				/* 40MHz ,control channel at lower */
+				RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &bbpValue);
+				bbpValue &= (~0x18);
+				bbpValue |= 0x10;
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, bbpValue);
+				pAd->CommonCfg.BBPCurrentBW = BW_40;
+				/*  RX : control channel at lower */
+				RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &bbpValue);
+				bbpValue &= (~0x20);
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, bbpValue);
+
+				RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
+				Value &= 0xfffffffe;
+				RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
+				pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel + 2;
+                AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
+			    AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
+                DBGPRINT(RT_DEBUG_TRACE, ("BW_40 ,control_channel(%d), CentralChannel(%d) \n", 
+                                           pAd->CommonCfg.Channel,
+                                           pAd->CommonCfg.CentralChannel));
+			}
+			else if (pAd->CommonCfg.PhyMode >= PHY_11ABGN_MIXED &&
+                     pAd->CommonCfg.RegTransmitSetting.field.BW == BW_40 &&
+                     pAd->CommonCfg.RegTransmitSetting.field.EXTCHA == EXTCHA_BELOW)
+			{
+				/* 40MHz ,control channel at upper */
+				RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &bbpValue);
+				bbpValue &= (~0x18);
+				bbpValue |= 0x10;
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, bbpValue);
+				pAd->CommonCfg.BBPCurrentBW = BW_40;
+				RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
+				Value |= 0x1;
+				RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
+				
+				RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &bbpValue);
+				bbpValue |= (0x20);
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, bbpValue);
+				pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel - 2;
+                AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
+			    AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
+                DBGPRINT(RT_DEBUG_TRACE, ("BW_40 ,control_channel(%d), CentralChannel(%d) \n", 
+                                           pAd->CommonCfg.Channel,
+                                           pAd->CommonCfg.CentralChannel));
+			}
+			else
+#endif /* DOT11_N_SUPPORT */
+			{
+				/* 20MHz */
+				RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &bbpValue);
+				bbpValue &= (~0x18);
+				RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, bbpValue);
+				pAd->CommonCfg.BBPCurrentBW = BW_20;
+                AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
+			    AsicLockChannel(pAd, pAd->CommonCfg.Channel);
+				DBGPRINT(RT_DEBUG_TRACE, ("BW_20, Channel(%d)\n", pAd->CommonCfg.Channel));
+			}
+
+
+			/* Enable Rx with promiscuous reception */
+			RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, 0x3);
+			/* ASIC supporsts sniffer function with replacing RSSI with timestamp. */
+			/*RTMP_IO_READ32(pAdapter, MAC_SYS_CTRL, &Value); */
+			/*Value |= (0x80); */
+			/*RTMP_IO_WRITE32(pAdapter, MAC_SYS_CTRL, Value); */
+			/* disable sync */
+			RTMP_IO_READ32(pAd, BCN_TIME_CFG, &csr.word);
+			csr.field.bBeaconGen = 0;
+			csr.field.bTBTTEnable = 0;
+			csr.field.TsfSyncMode = 0;
+			RTMP_IO_WRITE32(pAd, BCN_TIME_CFG, csr.word);
+            
+			pAd->StaCfg.BssType = BSS_MONITOR;
+			RTMP_OS_NETDEV_SET_TYPE_MONITOR(pAd->net_dev);
+			DBGPRINT(RT_DEBUG_TRACE, ("===>Set_NetworkType_Proc::(MONITOR)\n"));
+    }
+
+    /* Reset Ralink supplicant to not use, it will be set to start when UI set PMK key */
+    pAd->StaCfg.WpaState = SS_NOTUSE;
+
+    DBGPRINT(RT_DEBUG_TRACE, ("Set_NetworkType_Proc::(NetworkType=%d)\n", pAd->StaCfg.BssType));
+
+    return TRUE;
+}
+
+/* 
+    ==========================================================================
+    Description:
+        Set Authentication mode
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT Set_AuthMode_Proc(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  PSTRING          arg)
+{
+    if ((strcmp(arg, "WEPAUTO") == 0) || (strcmp(arg, "wepauto") == 0))
+        pAd->StaCfg.AuthMode = Ndis802_11AuthModeAutoSwitch;
+    else if ((strcmp(arg, "OPEN") == 0) || (strcmp(arg, "open") == 0))
+        pAd->StaCfg.AuthMode = Ndis802_11AuthModeOpen;
+    else if ((strcmp(arg, "SHARED") == 0) || (strcmp(arg, "shared") == 0))
+        pAd->StaCfg.AuthMode = Ndis802_11AuthModeShared;
+    else if ((strcmp(arg, "WPAPSK") == 0) || (strcmp(arg, "wpapsk") == 0))
+        pAd->StaCfg.AuthMode = Ndis802_11AuthModeWPAPSK;
+    else if ((strcmp(arg, "WPANONE") == 0) || (strcmp(arg, "wpanone") == 0))
+        pAd->StaCfg.AuthMode = Ndis802_11AuthModeWPANone;
+    else if ((strcmp(arg, "WPA2PSK") == 0) || (strcmp(arg, "wpa2psk") == 0))
+        pAd->StaCfg.AuthMode = Ndis802_11AuthModeWPA2PSK;    
+#ifdef WPA_SUPPLICANT_SUPPORT    
+    else if ((strcmp(arg, "WPA") == 0) || (strcmp(arg, "wpa") == 0))
+        pAd->StaCfg.AuthMode = Ndis802_11AuthModeWPA;    
+    else if ((strcmp(arg, "WPA2") == 0) || (strcmp(arg, "wpa2") == 0))
+        pAd->StaCfg.AuthMode = Ndis802_11AuthModeWPA2;
+#endif /* WPA_SUPPLICANT_SUPPORT */
+    else
+        return FALSE;  
+
+    pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
+
+    DBGPRINT(RT_DEBUG_TRACE, ("Set_AuthMode_Proc::(AuthMode=%d)\n", pAd->StaCfg.AuthMode));
+
+    return TRUE;
+}
+
+/* 
+    ==========================================================================
+    Description:
+        Set Encryption Type
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT Set_EncrypType_Proc(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  PSTRING          arg)
+{
+    if ((strcmp(arg, "NONE") == 0) || (strcmp(arg, "none") == 0))
+    {
+        if (pAd->StaCfg.AuthMode >= Ndis802_11AuthModeWPA)
+            return TRUE;    /* do nothing */
+            
+        pAd->StaCfg.WepStatus     = Ndis802_11WEPDisabled;
+        pAd->StaCfg.PairCipher    = Ndis802_11WEPDisabled;
+	    pAd->StaCfg.GroupCipher   = Ndis802_11WEPDisabled;
+    }
+    else if ((strcmp(arg, "WEP") == 0) || (strcmp(arg, "wep") == 0))
+    {
+        if (pAd->StaCfg.AuthMode >= Ndis802_11AuthModeWPA)
+            return TRUE;    /* do nothing */
+            
+        pAd->StaCfg.WepStatus     = Ndis802_11WEPEnabled;
+        pAd->StaCfg.PairCipher    = Ndis802_11WEPEnabled;
+	    pAd->StaCfg.GroupCipher   = Ndis802_11WEPEnabled;		
+    }
+    else if ((strcmp(arg, "TKIP") == 0) || (strcmp(arg, "tkip") == 0))
+    {
+        if (pAd->StaCfg.AuthMode < Ndis802_11AuthModeWPA)
+            return TRUE;    /* do nothing */
+            
+        pAd->StaCfg.WepStatus     = Ndis802_11Encryption2Enabled;
+        pAd->StaCfg.PairCipher    = Ndis802_11Encryption2Enabled;
+	    pAd->StaCfg.GroupCipher   = Ndis802_11Encryption2Enabled;
+    }
+    else if ((strcmp(arg, "AES") == 0) || (strcmp(arg, "aes") == 0))
+    {
+        if (pAd->StaCfg.AuthMode < Ndis802_11AuthModeWPA)
+            return TRUE;    /* do nothing */
+            
+        pAd->StaCfg.WepStatus     = Ndis802_11Encryption3Enabled;
+        pAd->StaCfg.PairCipher    = Ndis802_11Encryption3Enabled;
+	    pAd->StaCfg.GroupCipher   = Ndis802_11Encryption3Enabled;
+    }
+    else
+        return FALSE;
+
+	if (pAd->StaCfg.BssType == BSS_ADHOC)
+	{
+		/* Build all corresponding channel information */
+		RTMPSetPhyMode(pAd, pAd->CommonCfg.DesiredPhyMode);
+#ifdef DOT11_N_SUPPORT
+		SetCommonHT(pAd);
+#endif /* DOT11_N_SUPPORT */
+	}
+
+    DBGPRINT(RT_DEBUG_TRACE, ("Set_EncrypType_Proc::(EncrypType=%d)\n", pAd->StaCfg.WepStatus));
+
+    return TRUE;
+}
+
+/* 
+    ==========================================================================
+    Description:
+        Set Default Key ID
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT Set_DefaultKeyID_Proc(
+    IN  PRTMP_ADAPTER   pAdapter, 
+    IN  PSTRING          arg)
+{
+    ULONG                               KeyIdx;
+
+    KeyIdx = simple_strtol(arg, 0, 10);
+    if((KeyIdx >= 1 ) && (KeyIdx <= 4))
+        pAdapter->StaCfg.DefaultKeyId = (UCHAR) (KeyIdx - 1 );
+    else
+        return FALSE;  /*Invalid argument */
+
+    DBGPRINT(RT_DEBUG_TRACE, ("Set_DefaultKeyID_Proc::(DefaultKeyID=%d)\n", pAdapter->StaCfg.DefaultKeyId));
+
+    return TRUE;
+}
+
+/* 
+    ==========================================================================
+    Description:
+        Set WEP KEY1
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT Set_Key1_Proc(
+    IN  PRTMP_ADAPTER   pAdapter, 
+    IN  PSTRING          arg)
+{
+    int                                 KeyLen;
+    int                                 i;
+    UCHAR                               CipherAlg=CIPHER_WEP64;
+
+    if (pAdapter->StaCfg.AuthMode >= Ndis802_11AuthModeWPA)
+        return TRUE;    /* do nothing */
+    
+    KeyLen = strlen(arg);
+
+    switch (KeyLen)
+    {
+        case 5: /*wep 40 Ascii type */
+            pAdapter->SharedKey[BSS0][0].KeyLen = KeyLen;
+            memcpy(pAdapter->SharedKey[BSS0][0].Key, arg, KeyLen);
+            CipherAlg = CIPHER_WEP64;
+            DBGPRINT(RT_DEBUG_TRACE, ("Set_Key1_Proc::(Key1=%s and type=%s)\n", arg, "Ascii"));       
+            break;
+        case 10: /*wep 40 Hex type */
+            for(i=0; i < KeyLen; i++)
+            {
+                if( !isxdigit(*(arg+i)) )
+                    return FALSE;  /*Not Hex value; */
+            }
+            pAdapter->SharedKey[BSS0][0].KeyLen = KeyLen / 2 ;
+            AtoH(arg, pAdapter->SharedKey[BSS0][0].Key, KeyLen / 2);
+            CipherAlg = CIPHER_WEP64;
+            DBGPRINT(RT_DEBUG_TRACE, ("Set_Key1_Proc::(Key1=%s and type=%s)\n", arg, "Hex"));     
+            break;
+        case 13: /*wep 104 Ascii type */
+            pAdapter->SharedKey[BSS0][0].KeyLen = KeyLen;
+            memcpy(pAdapter->SharedKey[BSS0][0].Key, arg, KeyLen);
+            CipherAlg = CIPHER_WEP128;
+            DBGPRINT(RT_DEBUG_TRACE, ("Set_Key1_Proc::(Key1=%s and type=%s)\n", arg, "Ascii"));       
+            break;
+        case 26: /*wep 104 Hex type */
+            for(i=0; i < KeyLen; i++)
+            {
+                if( !isxdigit(*(arg+i)) )
+                    return FALSE;  /*Not Hex value; */
+            }
+            pAdapter->SharedKey[BSS0][0].KeyLen = KeyLen / 2 ;
+            AtoH(arg, pAdapter->SharedKey[BSS0][0].Key, KeyLen / 2);
+            CipherAlg = CIPHER_WEP128;
+            DBGPRINT(RT_DEBUG_TRACE, ("Set_Key1_Proc::(Key1=%s and type=%s)\n", arg, "Hex"));     
+            break;
+        default: /*Invalid argument */
+            DBGPRINT(RT_DEBUG_TRACE, ("Set_Key1_Proc::Invalid argument (=%s)\n", arg));       
+            return FALSE;
+    }
+    
+    pAdapter->SharedKey[BSS0][0].CipherAlg = CipherAlg;
+
+    /* Set keys (into ASIC) */
+    if (pAdapter->StaCfg.AuthMode >= Ndis802_11AuthModeWPA)
+        ;   /* not support */
+    else    /* Old WEP stuff */
+    {
+        AsicAddSharedKeyEntry(pAdapter, 
+                              0, 
+                              0, 
+                              &pAdapter->SharedKey[BSS0][0]);
+    }
+    
+    return TRUE;
+}
+/* 
+    ==========================================================================
+
+    Description:
+        Set WEP KEY2
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT Set_Key2_Proc(
+    IN  PRTMP_ADAPTER   pAdapter, 
+    IN  PSTRING          arg)
+{
+    int                                 KeyLen;
+    int                                 i;
+    UCHAR                               CipherAlg=CIPHER_WEP64;
+
+    if (pAdapter->StaCfg.AuthMode >= Ndis802_11AuthModeWPA)
+        return TRUE;    /* do nothing */
+    
+    KeyLen = strlen(arg);
+
+    switch (KeyLen)
+    {
+        case 5: /*wep 40 Ascii type */
+            pAdapter->SharedKey[BSS0][1].KeyLen = KeyLen;
+            memcpy(pAdapter->SharedKey[BSS0][1].Key, arg, KeyLen);
+            CipherAlg = CIPHER_WEP64;
+            DBGPRINT(RT_DEBUG_TRACE, ("Set_Key2_Proc::(Key2=%s and type=%s)\n", arg, "Ascii"));
+            break;
+        case 10: /*wep 40 Hex type */
+            for(i=0; i < KeyLen; i++)
+            {
+                if( !isxdigit(*(arg+i)) )
+                    return FALSE;  /*Not Hex value; */
+            }
+            pAdapter->SharedKey[BSS0][1].KeyLen = KeyLen / 2 ;
+            AtoH(arg, pAdapter->SharedKey[BSS0][1].Key, KeyLen / 2);
+            CipherAlg = CIPHER_WEP64;
+            DBGPRINT(RT_DEBUG_TRACE, ("Set_Key2_Proc::(Key2=%s and type=%s)\n", arg, "Hex"));
+            break;
+        case 13: /*wep 104 Ascii type */
+            pAdapter->SharedKey[BSS0][1].KeyLen = KeyLen;
+            memcpy(pAdapter->SharedKey[BSS0][1].Key, arg, KeyLen);
+            CipherAlg = CIPHER_WEP128;
+            DBGPRINT(RT_DEBUG_TRACE, ("Set_Key2_Proc::(Key2=%s and type=%s)\n", arg, "Ascii"));
+            break;
+        case 26: /*wep 104 Hex type */
+            for(i=0; i < KeyLen; i++)
+            {
+                if( !isxdigit(*(arg+i)) )
+                    return FALSE;  /*Not Hex value; */
+            }
+            pAdapter->SharedKey[BSS0][1].KeyLen = KeyLen / 2 ;
+            AtoH(arg, pAdapter->SharedKey[BSS0][1].Key, KeyLen / 2);
+            CipherAlg = CIPHER_WEP128;
+            DBGPRINT(RT_DEBUG_TRACE, ("Set_Key2_Proc::(Key2=%s and type=%s)\n", arg, "Hex"));
+            break;
+        default: /*Invalid argument */
+            DBGPRINT(RT_DEBUG_TRACE, ("Set_Key2_Proc::Invalid argument (=%s)\n", arg));
+            return FALSE;
+    }
+    pAdapter->SharedKey[BSS0][1].CipherAlg = CipherAlg;
+
+    /* Set keys (into ASIC) */
+    if (pAdapter->StaCfg.AuthMode >= Ndis802_11AuthModeWPA)
+        ;   /* not support */
+    else    /* Old WEP stuff */
+    {
+        AsicAddSharedKeyEntry(pAdapter, 
+                              0, 
+                              1, 
+                              &pAdapter->SharedKey[BSS0][1]);
+    }        
+    
+    return TRUE;
+}
+/* 
+    ==========================================================================
+    Description:
+        Set WEP KEY3
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT Set_Key3_Proc(
+    IN  PRTMP_ADAPTER   pAdapter, 
+    IN  PSTRING          arg)
+{
+    int                                 KeyLen;
+    int                                 i;
+    UCHAR                               CipherAlg=CIPHER_WEP64;
+
+    if (pAdapter->StaCfg.AuthMode >= Ndis802_11AuthModeWPA)
+        return TRUE;    /* do nothing */
+    
+    KeyLen = strlen(arg);
+
+    switch (KeyLen)
+    {
+        case 5: /*wep 40 Ascii type */
+            pAdapter->SharedKey[BSS0][2].KeyLen = KeyLen;
+            memcpy(pAdapter->SharedKey[BSS0][2].Key, arg, KeyLen);
+            CipherAlg = CIPHER_WEP64;
+            DBGPRINT(RT_DEBUG_TRACE, ("Set_Key3_Proc::(Key3=%s and type=Ascii)\n", arg));
+            break;
+        case 10: /*wep 40 Hex type */
+            for(i=0; i < KeyLen; i++)
+            {
+                if( !isxdigit(*(arg+i)) )
+                    return FALSE;  /*Not Hex value; */
+            }
+            pAdapter->SharedKey[BSS0][2].KeyLen = KeyLen / 2 ;
+            AtoH(arg, pAdapter->SharedKey[BSS0][2].Key, KeyLen / 2);
+            CipherAlg = CIPHER_WEP64;
+            DBGPRINT(RT_DEBUG_TRACE, ("Set_Key3_Proc::(Key3=%s and type=Hex)\n", arg));
+            break;
+        case 13: /*wep 104 Ascii type */
+            pAdapter->SharedKey[BSS0][2].KeyLen = KeyLen;
+            memcpy(pAdapter->SharedKey[BSS0][2].Key, arg, KeyLen);
+            CipherAlg = CIPHER_WEP128;
+            DBGPRINT(RT_DEBUG_TRACE, ("Set_Key3_Proc::(Key3=%s and type=Ascii)\n", arg));
+            break;
+        case 26: /*wep 104 Hex type */
+            for(i=0; i < KeyLen; i++)
+            {
+                if( !isxdigit(*(arg+i)) )
+                    return FALSE;  /*Not Hex value; */
+            }
+            pAdapter->SharedKey[BSS0][2].KeyLen = KeyLen / 2 ;
+            AtoH(arg, pAdapter->SharedKey[BSS0][2].Key, KeyLen / 2);
+            CipherAlg = CIPHER_WEP128;
+            DBGPRINT(RT_DEBUG_TRACE, ("Set_Key3_Proc::(Key3=%s and type=Hex)\n", arg));
+            break;
+        default: /*Invalid argument */
+            DBGPRINT(RT_DEBUG_TRACE, ("Set_Key3_Proc::Invalid argument (=%s)\n", arg));
+            return FALSE;
+    }
+    pAdapter->SharedKey[BSS0][2].CipherAlg = CipherAlg;
+    
+    /* Set keys (into ASIC) */
+    if (pAdapter->StaCfg.AuthMode >= Ndis802_11AuthModeWPA)
+        ;   /* not support */
+    else    /* Old WEP stuff */
+    {
+        AsicAddSharedKeyEntry(pAdapter, 
+                              0, 
+                              2, 
+                              &pAdapter->SharedKey[BSS0][2]);
+    }
+    
+    return TRUE;
+}
+/* 
+    ==========================================================================
+    Description:
+        Set WEP KEY4
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT Set_Key4_Proc(
+    IN  PRTMP_ADAPTER   pAdapter, 
+    IN  PSTRING          arg)
+{
+    int                                 KeyLen;
+    int                                 i;
+    UCHAR                               CipherAlg=CIPHER_WEP64;
+
+    if (pAdapter->StaCfg.AuthMode >= Ndis802_11AuthModeWPA)
+        return TRUE;    /* do nothing */
+    
+    KeyLen = strlen(arg);
+
+    switch (KeyLen)
+    {
+        case 5: /*wep 40 Ascii type */
+            pAdapter->SharedKey[BSS0][3].KeyLen = KeyLen;
+            memcpy(pAdapter->SharedKey[BSS0][3].Key, arg, KeyLen);
+            CipherAlg = CIPHER_WEP64;
+            DBGPRINT(RT_DEBUG_TRACE, ("Set_Key4_Proc::(Key4=%s and type=%s)\n", arg, "Ascii"));
+            break;
+        case 10: /*wep 40 Hex type */
+            for(i=0; i < KeyLen; i++)
+            {
+                if( !isxdigit(*(arg+i)) )
+                    return FALSE;  /*Not Hex value; */
+            }
+            pAdapter->SharedKey[BSS0][3].KeyLen = KeyLen / 2 ;
+            AtoH(arg, pAdapter->SharedKey[BSS0][3].Key, KeyLen / 2);
+            CipherAlg = CIPHER_WEP64;
+            DBGPRINT(RT_DEBUG_TRACE, ("Set_Key4_Proc::(Key4=%s and type=%s)\n", arg, "Hex"));
+            break;
+        case 13: /*wep 104 Ascii type */
+            pAdapter->SharedKey[BSS0][3].KeyLen = KeyLen;
+            memcpy(pAdapter->SharedKey[BSS0][3].Key, arg, KeyLen);
+            CipherAlg = CIPHER_WEP128;
+            DBGPRINT(RT_DEBUG_TRACE, ("Set_Key4_Proc::(Key4=%s and type=%s)\n", arg, "Ascii"));
+            break;
+        case 26: /*wep 104 Hex type */
+            for(i=0; i < KeyLen; i++)
+            {
+                if( !isxdigit(*(arg+i)) )
+                    return FALSE;  /*Not Hex value; */
+            }
+            pAdapter->SharedKey[BSS0][3].KeyLen = KeyLen / 2 ;
+            AtoH(arg, pAdapter->SharedKey[BSS0][3].Key, KeyLen / 2);
+            CipherAlg = CIPHER_WEP128;
+            DBGPRINT(RT_DEBUG_TRACE, ("Set_Key4_Proc::(Key4=%s and type=%s)\n", arg, "Hex"));
+            break;
+        default: /*Invalid argument */
+            DBGPRINT(RT_DEBUG_TRACE, ("Set_Key4_Proc::Invalid argument (=%s)\n", arg));
+            return FALSE;
+    } 
+    pAdapter->SharedKey[BSS0][3].CipherAlg = CipherAlg;
+    
+    /* Set keys (into ASIC) */
+    if (pAdapter->StaCfg.AuthMode >= Ndis802_11AuthModeWPA)
+        ;   /* not support */
+    else    /* Old WEP stuff */
+    {
+        AsicAddSharedKeyEntry(pAdapter, 
+                              0, 
+                              3, 
+                              &pAdapter->SharedKey[BSS0][3]);
+    }
+    
+    return TRUE;
+}
+
+/* 
+    ==========================================================================
+    Description:
+        Set WPA PSK key
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT Set_WPAPSK_Proc(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  PSTRING          arg)
+{
+    int status;
+	
+    if ((pAd->StaCfg.AuthMode != Ndis802_11AuthModeWPAPSK) && 
+        (pAd->StaCfg.AuthMode != Ndis802_11AuthModeWPA2PSK) &&
+	    (pAd->StaCfg.AuthMode != Ndis802_11AuthModeWPANone)
+		)
+        return TRUE;    /* do nothing */
+        
+    DBGPRINT(RT_DEBUG_TRACE, ("Set_WPAPSK_Proc::(WPAPSK=%s)\n", arg));
+
+	status = RT_CfgSetWPAPSKKey(pAd, arg, pAd->MlmeAux.Ssid, pAd->MlmeAux.SsidLen, pAd->StaCfg.PMK);
+	if (status == FALSE)
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("Set_WPAPSK_Proc(): Set key failed!\n"));
+		return FALSE;
+	}
+	NdisZeroMemory(pAd->StaCfg.WpaPassPhrase, 64);
+    NdisMoveMemory(pAd->StaCfg.WpaPassPhrase, arg, strlen(arg));
+    pAd->StaCfg.WpaPassPhraseLen = (UINT)strlen(arg);
+
+
+
+    if(pAd->StaCfg.BssType == BSS_ADHOC &&
+       pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPANone)
+    {
+        pAd->StaCfg.WpaState = SS_NOTUSE;     
+    }
+    else
+    {
+        /* Start STA supplicant state machine */
+        pAd->StaCfg.WpaState = SS_START;
+    }    
+
+    return TRUE;
+}
+
+/* 
+    ==========================================================================
+    Description:
+        Set Power Saving mode
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT Set_PSMode_Proc(
+    IN  PRTMP_ADAPTER   pAdapter, 
+    IN  PSTRING          arg)
+{
+    if (pAdapter->StaCfg.BssType == BSS_INFRA)
+    {
+        if ((strcmp(arg, "Max_PSP") == 0) || 
+			(strcmp(arg, "max_psp") == 0) ||
+			(strcmp(arg, "MAX_PSP") == 0))
+        {
+            /* do NOT turn on PSM bit here, wait until MlmeCheckPsmChange() */
+            /* to exclude certain situations. */
+            if (pAdapter->StaCfg.bWindowsACCAMEnable == FALSE)
+                pAdapter->StaCfg.WindowsPowerMode = Ndis802_11PowerModeMAX_PSP;
+            pAdapter->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeMAX_PSP;
+            OPSTATUS_SET_FLAG(pAdapter, fOP_STATUS_RECEIVE_DTIM);
+            pAdapter->StaCfg.DefaultListenCount = 5;
+        
+        }
+        else if ((strcmp(arg, "Fast_PSP") == 0) || 
+				 (strcmp(arg, "fast_psp") == 0) ||
+                 (strcmp(arg, "FAST_PSP") == 0))
+        {
+            /* do NOT turn on PSM bit here, wait until MlmeCheckPsmChange() */
+            /* to exclude certain situations. */
+            OPSTATUS_SET_FLAG(pAdapter, fOP_STATUS_RECEIVE_DTIM);
+            if (pAdapter->StaCfg.bWindowsACCAMEnable == FALSE)
+                pAdapter->StaCfg.WindowsPowerMode = Ndis802_11PowerModeFast_PSP;
+            pAdapter->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeFast_PSP;
+            pAdapter->StaCfg.DefaultListenCount = 3;
+        }
+        else if ((strcmp(arg, "Legacy_PSP") == 0) || 
+                 (strcmp(arg, "legacy_psp") == 0) || 
+                 (strcmp(arg, "LEGACY_PSP") == 0))
+        {
+            /* do NOT turn on PSM bit here, wait until MlmeCheckPsmChange() */
+            /* to exclude certain situations. */
+            OPSTATUS_SET_FLAG(pAdapter, fOP_STATUS_RECEIVE_DTIM);
+            if (pAdapter->StaCfg.bWindowsACCAMEnable == FALSE)
+                pAdapter->StaCfg.WindowsPowerMode = Ndis802_11PowerModeLegacy_PSP;
+            pAdapter->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeLegacy_PSP;
+            pAdapter->StaCfg.DefaultListenCount = 3;
+        }
+        else
+        {
+            /*Default Ndis802_11PowerModeCAM */
+            /* clear PSM bit immediately */
+            RTMP_SET_PSM_BIT(pAdapter, PWR_ACTIVE);
+            OPSTATUS_SET_FLAG(pAdapter, fOP_STATUS_RECEIVE_DTIM);
+            if (pAdapter->StaCfg.bWindowsACCAMEnable == FALSE)
+                pAdapter->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
+            pAdapter->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
+
+        }
+
+        DBGPRINT(RT_DEBUG_TRACE, ("Set_PSMode_Proc::(PSMode=%ld)\n", pAdapter->StaCfg.WindowsPowerMode));
+    }
+    else
+        return FALSE;
+
+        
+    return TRUE;
+}
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+/* 
+    ==========================================================================
+    Description:
+        Set WpaSupport flag.
+    Value:
+        0: Driver ignore wpa_supplicant.
+        1: wpa_supplicant initiates scanning and AP selection.
+        2: driver takes care of scanning, AP selection, and IEEE 802.11 association parameters.
+    Return:
+        TRUE if all parameters are OK, FALSE otherwise
+    ==========================================================================
+*/
+INT Set_Wpa_Support(
+    IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			arg)
+{
+
+    if ( simple_strtol(arg, 0, 10) == 0)
+        pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
+    else if ( simple_strtol(arg, 0, 10) == 1)
+        pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
+    else if ( simple_strtol(arg, 0, 10) == 2)
+        pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE_WITH_WEB_UI;
+    else
+        pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
+
+    DBGPRINT(RT_DEBUG_TRACE, ("Set_Wpa_Support::(WpaSupplicantUP=%d)\n", pAd->StaCfg.WpaSupplicantUP));
+    
+    return TRUE;    
+}
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+
+
+
+INT Set_TGnWifiTest_Proc(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  PSTRING          arg)
+{
+    if (simple_strtol(arg, 0, 10) == 0)
+        pAd->StaCfg.bTGnWifiTest = FALSE;
+    else
+        pAd->StaCfg.bTGnWifiTest = TRUE;
+
+    DBGPRINT(RT_DEBUG_TRACE, ("IF Set_TGnWifiTest_Proc::(bTGnWifiTest=%d)\n", pAd->StaCfg.bTGnWifiTest));
+	return TRUE;
+}
+
+#ifdef EXT_BUILD_CHANNEL_LIST
+INT Set_Ieee80211dClientMode_Proc(
+    IN  PRTMP_ADAPTER   pAdapter, 
+    IN  PSTRING          arg)
+{
+    if (simple_strtol(arg, 0, 10) == 0)
+        pAdapter->StaCfg.IEEE80211dClientMode = Rt802_11_D_None;
+    else if (simple_strtol(arg, 0, 10) == 1)
+        pAdapter->StaCfg.IEEE80211dClientMode = Rt802_11_D_Flexible;
+    else if (simple_strtol(arg, 0, 10) == 2)
+        pAdapter->StaCfg.IEEE80211dClientMode = Rt802_11_D_Strict;
+    else
+        return FALSE;  
+
+    DBGPRINT(RT_DEBUG_TRACE, ("Set_Ieee802dMode_Proc::(IEEEE0211dMode=%d)\n", pAdapter->StaCfg.IEEE80211dClientMode));
+    return TRUE;
+}
+#endif /* EXT_BUILD_CHANNEL_LIST */
+
+#ifdef CARRIER_DETECTION_SUPPORT
+INT Set_CarrierDetect_Proc(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  PSTRING         arg)
+{
+    if (simple_strtol(arg, 0, 10) == 0)
+        pAd->CommonCfg.CarrierDetect.Enable = FALSE;
+    else
+        pAd->CommonCfg.CarrierDetect.Enable = TRUE;
+
+    DBGPRINT(RT_DEBUG_TRACE, ("IF Set_CarrierDetect_Proc::(CarrierDetect.Enable=%d)\n", pAd->CommonCfg.CarrierDetect.Enable));
+	return TRUE;
+}
+#endif /* CARRIER_DETECTION_SUPPORT */
+
+
+INT	Show_Adhoc_MacTable_Proc(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			extra,
+	IN	UINT32			size)
+{
+	INT i;
+	
+	sprintf(extra, "\n");
+
+#ifdef DOT11_N_SUPPORT
+	sprintf(extra, "%sHT Operating Mode : %d\n", extra, pAd->CommonCfg.AddHTInfo.AddHtInfo2.OperaionMode);
+#endif /* DOT11_N_SUPPORT */
+
+	sprintf(extra + strlen(extra), "\n%-19s%-4s%-4s%-7s%-7s%-7s%-10s%-6s%-6s%-6s%-6s\n",
+			"MAC", "AID", "BSS", "RSSI0", "RSSI1", "RSSI2", "PhMd", "BW", "MCS", "SGI", "STBC");
+	
+	for (i=1; i<MAX_LEN_OF_MAC_TABLE; i++)
+	{
+		PMAC_TABLE_ENTRY pEntry = &pAd->MacTab.Content[i];
+		
+		if (strlen(extra) > (size - 30))
+		    break;
+		if ((IS_ENTRY_CLIENT(pEntry) || IS_ENTRY_APCLI(pEntry)) && (pEntry->Sst == SST_ASSOC))
+		{
+			sprintf(extra + strlen(extra), "%02X:%02X:%02X:%02X:%02X:%02X  ",
+				pEntry->Addr[0], pEntry->Addr[1], pEntry->Addr[2],
+				pEntry->Addr[3], pEntry->Addr[4], pEntry->Addr[5]);
+			sprintf(extra + strlen(extra), "%-4d", (int)pEntry->Aid);
+			sprintf(extra + strlen(extra), "%-4d", (int)pEntry->apidx);
+			sprintf(extra + strlen(extra), "%-7d", pEntry->RssiSample.AvgRssi0);
+			sprintf(extra + strlen(extra), "%-7d", pEntry->RssiSample.AvgRssi1);
+			sprintf(extra + strlen(extra), "%-7d", pEntry->RssiSample.AvgRssi2);
+			sprintf(extra + strlen(extra), "%-10s", GetPhyMode(pEntry->HTPhyMode.field.MODE));
+			sprintf(extra + strlen(extra), "%-6s", GetBW(pEntry->HTPhyMode.field.BW));
+			sprintf(extra + strlen(extra), "%-6d", pEntry->HTPhyMode.field.MCS);
+			sprintf(extra + strlen(extra), "%-6d", pEntry->HTPhyMode.field.ShortGI);
+			sprintf(extra + strlen(extra), "%-6d", pEntry->HTPhyMode.field.STBC);
+			sprintf(extra + strlen(extra), "%-10d, %d, %d%%\n", pEntry->DebugFIFOCount, pEntry->DebugTxCount, 
+						(pEntry->DebugTxCount) ? ((pEntry->DebugTxCount-pEntry->DebugFIFOCount)*100/pEntry->DebugTxCount) : 0);
+			sprintf(extra + strlen(extra), "\n");
+		}
+	} 
+
+	return TRUE;
+}
+
+
+INT Set_BeaconLostTime_Proc(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  PSTRING         arg)
+{
+	ULONG ltmp = (ULONG)simple_strtol(arg, 0, 10);
+
+	if ((ltmp != 0) && (ltmp <= 60))
+		pAd->StaCfg.BeaconLostTime = (ltmp * OS_HZ);
+
+    DBGPRINT(RT_DEBUG_TRACE, ("IF Set_BeaconLostTime_Proc::(BeaconLostTime=%ld)\n", pAd->StaCfg.BeaconLostTime));
+	return TRUE;
+}
+
+INT Set_AutoRoaming_Proc(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  PSTRING         arg)
+{
+    if (simple_strtol(arg, 0, 10) == 0)
+        pAd->StaCfg.bAutoRoaming = FALSE;
+    else
+        pAd->StaCfg.bAutoRoaming = TRUE;
+
+    DBGPRINT(RT_DEBUG_TRACE, ("IF Set_AutoRoaming_Proc::(bAutoRoaming=%d)\n", pAd->StaCfg.bAutoRoaming));
+	return TRUE;
+}
+
+
+/* 
+    ==========================================================================
+    Description:
+        Issue a site survey command to driver
+	Arguments:
+	    pAdapter                    Pointer to our adapter
+	    wrq                         Pointer to the ioctl argument
+
+    Return Value:
+        None
+
+    Note:
+        Usage: 
+               1.) iwpriv ra0 set site_survey
+    ==========================================================================
+*/
+
+INT Set_ForceTxBurst_Proc(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  PSTRING         arg)
+{
+    if (simple_strtol(arg, 0, 10) == 0)
+        pAd->StaCfg.bForceTxBurst = FALSE;
+    else
+        pAd->StaCfg.bForceTxBurst = TRUE;
+
+    DBGPRINT(RT_DEBUG_TRACE, ("IF Set_ForceTxBurst_Proc::(bForceTxBurst=%d)\n", pAd->StaCfg.bForceTxBurst));
+	return TRUE;
+}
+
+
+#ifdef XLINK_SUPPORT
+INT Set_XlinkMode_Proc(
+    IN  PRTMP_ADAPTER   pAd, 
+    IN  PSTRING         arg)
+{
+	UINT32 Value = 0;
+
+    if (simple_strtol(arg, 0, 10) == 0)
+        pAd->StaCfg.PSPXlink = 0;
+    else
+        pAd->StaCfg.PSPXlink = 1;
+
+	if (pAd->StaCfg.PSPXlink)
+		Value = PSPXLINK;
+	else
+		Value = STANORMAL;
+	RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, Value);
+	Value = 0;
+	RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
+	Value &= (~0x80);
+	RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
+
+    DBGPRINT(RT_DEBUG_TRACE, ("IF Set_XlinkMode_Proc::(PSPXlink=%d)\n", pAd->StaCfg.PSPXlink));
+	return TRUE;
+}
+#endif /* XLINK_SUPPORT */
+
+
+VOID RTMPAddKey(
+	IN	PRTMP_ADAPTER	    pAd, 
+	IN	PNDIS_802_11_KEY    pKey)
+{
+	ULONG				KeyIdx;
+	MAC_TABLE_ENTRY  	*pEntry;
+		
+    DBGPRINT(RT_DEBUG_TRACE, ("RTMPAddKey ------>\n"));
+
+	if (pAd->StaCfg.AuthMode >= Ndis802_11AuthModeWPA)
+	{
+		if (pKey->KeyIndex & 0x80000000)
+		{
+		    if (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPANone)
+            {
+                NdisZeroMemory(pAd->StaCfg.PMK, 32);
+                NdisMoveMemory(pAd->StaCfg.PMK, pKey->KeyMaterial, pKey->KeyLength);
+                goto end;
+            }
+		    /* Update PTK */
+		    NdisZeroMemory(&pAd->SharedKey[BSS0][0], sizeof(CIPHER_KEY));  
+            pAd->SharedKey[BSS0][0].KeyLen = LEN_TK;
+            NdisMoveMemory(pAd->SharedKey[BSS0][0].Key, pKey->KeyMaterial, LEN_TK);
+#ifdef WPA_SUPPLICANT_SUPPORT            
+            if (pAd->StaCfg.PairCipher == Ndis802_11Encryption2Enabled)
+            {
+                NdisMoveMemory(pAd->SharedKey[BSS0][0].RxMic, pKey->KeyMaterial + LEN_TK, LEN_TKIP_MIC);            
+                NdisMoveMemory(pAd->SharedKey[BSS0][0].TxMic, pKey->KeyMaterial + LEN_TK + LEN_TKIP_MIC, LEN_TKIP_MIC);
+            }
+            else
+#endif /* WPA_SUPPLICANT_SUPPORT */
+            {
+            	NdisMoveMemory(pAd->SharedKey[BSS0][0].TxMic, pKey->KeyMaterial + LEN_TK, LEN_TKIP_MIC);            
+                NdisMoveMemory(pAd->SharedKey[BSS0][0].RxMic, pKey->KeyMaterial + LEN_TK + LEN_TKIP_MIC, LEN_TKIP_MIC);
+            }
+
+            /* Decide its ChiperAlg */
+        	if (pAd->StaCfg.PairCipher == Ndis802_11Encryption2Enabled)
+        		pAd->SharedKey[BSS0][0].CipherAlg = CIPHER_TKIP;
+        	else if (pAd->StaCfg.PairCipher == Ndis802_11Encryption3Enabled)
+        		pAd->SharedKey[BSS0][0].CipherAlg = CIPHER_AES;
+        	else
+        		pAd->SharedKey[BSS0][0].CipherAlg = CIPHER_NONE; 
+
+            /* Update these related information to MAC_TABLE_ENTRY */
+        	pEntry = &pAd->MacTab.Content[BSSID_WCID];
+            NdisMoveMemory(pEntry->PairwiseKey.Key, pAd->SharedKey[BSS0][0].Key, LEN_TK);            
+        	NdisMoveMemory(pEntry->PairwiseKey.RxMic, pAd->SharedKey[BSS0][0].RxMic, LEN_TKIP_MIC);
+        	NdisMoveMemory(pEntry->PairwiseKey.TxMic, pAd->SharedKey[BSS0][0].TxMic, LEN_TKIP_MIC);
+        	pEntry->PairwiseKey.CipherAlg = pAd->SharedKey[BSS0][0].CipherAlg;
+
+        	/* Update pairwise key information to ASIC Shared Key Table */
+        	AsicAddSharedKeyEntry(pAd, 
+        						  BSS0, 
+        						  0, 
+        						  &pAd->SharedKey[BSS0][0]);
+
+        	/* Update ASIC WCID attribute table and IVEIV table */
+        	RTMPSetWcidSecurityInfo(pAd, 
+        							  BSS0, 
+        							  0, 
+        							  pAd->SharedKey[BSS0][0].CipherAlg, 
+        							  BSSID_WCID,
+        							  SHAREDKEYTABLE);
+
+            if (pAd->StaCfg.AuthMode >= Ndis802_11AuthModeWPA2)
+            {
+                /* set 802.1x port control */
+				STA_PORT_SECURED(pAd);
+            }
+		}
+        else
+        {
+            /* Update GTK */
+            pAd->StaCfg.DefaultKeyId = (pKey->KeyIndex & 0xFF);
+            NdisZeroMemory(&pAd->SharedKey[BSS0][pAd->StaCfg.DefaultKeyId], sizeof(CIPHER_KEY));  
+            pAd->SharedKey[BSS0][pAd->StaCfg.DefaultKeyId].KeyLen = LEN_TK;
+            NdisMoveMemory(pAd->SharedKey[BSS0][pAd->StaCfg.DefaultKeyId].Key, pKey->KeyMaterial, LEN_TK);
+#ifdef WPA_SUPPLICANT_SUPPORT            
+            if (pAd->StaCfg.GroupCipher == Ndis802_11Encryption2Enabled)
+            {
+                NdisMoveMemory(pAd->SharedKey[BSS0][pAd->StaCfg.DefaultKeyId].RxMic, pKey->KeyMaterial + LEN_TK, LEN_TKIP_MIC);            
+                NdisMoveMemory(pAd->SharedKey[BSS0][pAd->StaCfg.DefaultKeyId].TxMic, pKey->KeyMaterial + LEN_TK + LEN_TKIP_MIC, LEN_TKIP_MIC);        	
+            }
+            else
+#endif /* WPA_SUPPLICANT_SUPPORT */                
+            {
+            	NdisMoveMemory(pAd->SharedKey[BSS0][pAd->StaCfg.DefaultKeyId].TxMic, pKey->KeyMaterial + LEN_TK, LEN_TKIP_MIC);            
+                NdisMoveMemory(pAd->SharedKey[BSS0][pAd->StaCfg.DefaultKeyId].RxMic, pKey->KeyMaterial + LEN_TK + LEN_TKIP_MIC, LEN_TKIP_MIC);        	
+            }
+
+            /* Update Shared Key CipherAlg */
+    		pAd->SharedKey[BSS0][pAd->StaCfg.DefaultKeyId].CipherAlg = CIPHER_NONE;
+    		if (pAd->StaCfg.GroupCipher == Ndis802_11Encryption2Enabled)
+    			pAd->SharedKey[BSS0][pAd->StaCfg.DefaultKeyId].CipherAlg = CIPHER_TKIP;
+    		else if (pAd->StaCfg.GroupCipher == Ndis802_11Encryption3Enabled)
+    			pAd->SharedKey[BSS0][pAd->StaCfg.DefaultKeyId].CipherAlg = CIPHER_AES;
+
+            /* Update group key information to ASIC Shared Key Table */
+        	AsicAddSharedKeyEntry(pAd, 
+        						  BSS0, 
+        						  pAd->StaCfg.DefaultKeyId, 
+        						  &pAd->SharedKey[BSS0][pAd->StaCfg.DefaultKeyId]);
+
+
+            /* set 802.1x port control */
+			STA_PORT_SECURED(pAd);
+        }
+	}
+	else	/* dynamic WEP from wpa_supplicant */
+	{
+		UCHAR	CipherAlg;
+    	PUCHAR	Key;
+
+		if(pKey->KeyLength == 32)
+			goto end;
+		
+		KeyIdx = pKey->KeyIndex & 0x0fffffff;
+
+		if (KeyIdx < 4)
+		{
+			/* it is a default shared key, for Pairwise key setting */
+			if (pKey->KeyIndex & 0x80000000)
+			{
+				pEntry = MacTableLookup(pAd, pKey->BSSID);
+
+				if (pEntry)
+				{
+					DBGPRINT(RT_DEBUG_TRACE, ("RTMPAddKey: Set Pair-wise Key\n"));
+		
+					/* set key material and key length */
+ 					pEntry->PairwiseKey.KeyLen = (UCHAR)pKey->KeyLength;
+					NdisMoveMemory(pEntry->PairwiseKey.Key, &pKey->KeyMaterial, pKey->KeyLength);
+					
+					/* set Cipher type */
+					if (pKey->KeyLength == 5)
+						pEntry->PairwiseKey.CipherAlg = CIPHER_WEP64;
+					else
+						pEntry->PairwiseKey.CipherAlg = CIPHER_WEP128;
+						
+					/* Add Pair-wise key to Asic */
+					AsicAddPairwiseKeyEntry(
+						pAd, 
+						(UCHAR)pEntry->Aid,
+                		&pEntry->PairwiseKey);
+
+					/* update WCID attribute table and IVEIV table for this entry */
+					RTMPSetWcidSecurityInfo(pAd, 
+											BSS0, 
+											KeyIdx, 
+											pEntry->PairwiseKey.CipherAlg, 
+											pEntry->Aid, 
+											PAIRWISEKEYTABLE);
+				}	
+			}
+			else	
+            {
+				/* Default key for tx (shared key) */
+				pAd->StaCfg.DefaultKeyId = (UCHAR) KeyIdx;
+                     
+				/* set key material and key length */
+				pAd->SharedKey[BSS0][KeyIdx].KeyLen = (UCHAR) pKey->KeyLength;
+				NdisMoveMemory(pAd->SharedKey[BSS0][KeyIdx].Key, &pKey->KeyMaterial, pKey->KeyLength);
+				
+				/* Set Ciper type */
+				if (pKey->KeyLength == 5)
+					pAd->SharedKey[BSS0][KeyIdx].CipherAlg = CIPHER_WEP64;
+				else
+					pAd->SharedKey[BSS0][KeyIdx].CipherAlg = CIPHER_WEP128;
+			
+    			CipherAlg = pAd->SharedKey[BSS0][KeyIdx].CipherAlg;
+    			Key = pAd->SharedKey[BSS0][KeyIdx].Key;
+
+				/* Set Group key material to Asic */
+    			AsicAddSharedKeyEntry(pAd, BSS0, KeyIdx, &pAd->SharedKey[BSS0][KeyIdx]);
+		
+			}
+		}
+	}
+end:
+	return;
+}
+
+
+
+/*
+    ==========================================================================
+    Description:
+        Site survey entry point
+
+    NOTE:
+    ==========================================================================
+*/
+VOID StaSiteSurvey(
+	IN	PRTMP_ADAPTER  		pAd,
+	IN	PNDIS_802_11_SSID	pSsid,
+	IN	UCHAR				ScanType)
+{
+	if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS))
+	{
+		/*
+		 * Still scanning, ignore this scanning.
+		 */
+		DBGPRINT(RT_DEBUG_TRACE, ("StaSiteSurvey:: Scanning now\n"));
+		return;
+	}
+	if (INFRA_ON(pAd))
+	{
+		pAd->StaCfg.bImprovedScan = TRUE;
+		pAd->StaCfg.ScanChannelCnt = 0;	/* reset channel counter to 0 */
+	}
+
+			
+	if (pAd->Mlme.CntlMachine.CurrState != CNTL_IDLE)
+	{
+		RTMP_MLME_RESET_STATE_MACHINE(pAd);
+		DBGPRINT(RT_DEBUG_TRACE, ("!!! MLME busy, reset MLME state machine !!!\n"));
+	}
+
+	NdisGetSystemUpTime(&pAd->StaCfg.LastScanTime);
+	if (pSsid)
+		MlmeEnqueue(pAd, 
+			MLME_CNTL_STATE_MACHINE, 
+			OID_802_11_BSSID_LIST_SCAN, 
+			pSsid->SsidLength,
+			pSsid->Ssid, 
+			0);
+	else
+		MlmeEnqueue(pAd, 
+			MLME_CNTL_STATE_MACHINE, 
+			OID_802_11_BSSID_LIST_SCAN, 
+			0,
+			"",
+			0);
+	
+	RTMP_MLME_HANDLER(pAd);
+}
+
+INT Set_AutoReconnect_Proc(
+    IN  PRTMP_ADAPTER	pAd, 
+    IN  PSTRING			arg)
+{
+	if (simple_strtol(arg, 0, 10) == 0)
+        pAd->StaCfg.bAutoReconnect = FALSE;
+	else
+		pAd->StaCfg.bAutoReconnect = TRUE;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("IF Set_AutoReconnect_Proc::(bAutoReconnect=%d)\n", pAd->StaCfg.bAutoReconnect));
+	return TRUE;
+}
+
+INT Set_AdhocN_Proc(
+    IN  PRTMP_ADAPTER	pAd, 
+    IN  PSTRING			arg)
+{
+	if (simple_strtol(arg, 0, 10) == 0)
+        pAd->StaCfg.bAdhocN = FALSE;
+	else
+		pAd->StaCfg.bAdhocN = TRUE;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("IF Set_AdhocN_Proc::(bAdhocN=%d)\n", pAd->StaCfg.bAdhocN));
+	return TRUE;
+}
+
+
+
+
+INT RTMPSetInformation(
+    IN  PRTMP_ADAPTER pAd,
+    IN  OUT RTMP_IOCTL_INPUT_STRUCT	*rq,
+    IN  INT                 cmd)
+{
+    RTMP_IOCTL_INPUT_STRUCT				*wrq = (RTMP_IOCTL_INPUT_STRUCT *) rq;
+    NDIS_802_11_SSID                    Ssid;
+    NDIS_802_11_MAC_ADDRESS             Bssid;
+    RT_802_11_PHY_MODE                  PhyMode;
+    RT_802_11_STA_CONFIG                StaConfig;
+    NDIS_802_11_RATES                   aryRates;
+    RT_802_11_PREAMBLE                  Preamble;
+    NDIS_802_11_WEP_STATUS              WepStatus;
+    NDIS_802_11_AUTHENTICATION_MODE     AuthMode = Ndis802_11AuthModeMax;
+    NDIS_802_11_NETWORK_INFRASTRUCTURE  BssType;
+    NDIS_802_11_RTS_THRESHOLD           RtsThresh = 0;
+    NDIS_802_11_FRAGMENTATION_THRESHOLD FragThresh;
+    NDIS_802_11_POWER_MODE              PowerMode;
+    PNDIS_802_11_KEY                    pKey = NULL;
+    PNDIS_802_11_WEP			        pWepKey =NULL;
+    PNDIS_802_11_REMOVE_KEY             pRemoveKey = NULL;
+/*    NDIS_802_11_CONFIGURATION           Config, *pConfig = NULL; */
+	NDIS_802_11_CONFIGURATION			*pConfig = NULL;
+    NDIS_802_11_NETWORK_TYPE            NetType;
+    ULONG                               Now;
+    UINT                                KeyIdx = 0;
+    INT                                 Status = NDIS_STATUS_SUCCESS, MaxPhyMode = PHY_11G;
+    ULONG                               PowerTemp;
+    BOOLEAN                             RadioState;
+    BOOLEAN                             StateMachineTouched = FALSE;
+     PNDIS_802_11_PASSPHRASE                    ppassphrase = NULL;     
+#ifdef DOT11_N_SUPPORT
+	OID_SET_HT_PHYMODE					HT_PhyMode;	/*11n ,kathy */
+#endif /* DOT11_N_SUPPORT */
+#ifdef WPA_SUPPLICANT_SUPPORT    
+    PNDIS_802_11_PMKID                  pPmkId = NULL;
+    BOOLEAN				                IEEE8021xState = FALSE;
+    BOOLEAN				                IEEE8021x_required_keys = FALSE;
+    UCHAR                               wpa_supplicant_enable = 0;
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+#ifdef SNMP_SUPPORT	
+	TX_RTY_CFG_STRUC			tx_rty_cfg;
+	ULONG						ShortRetryLimit, LongRetryLimit;
+	UCHAR						ctmp;
+#endif /* SNMP_SUPPORT */
+
+
+
+
+#ifdef DOT11_N_SUPPORT
+	MaxPhyMode = PHY_11N_5G;
+#endif /* DOT11_N_SUPPORT */
+
+	DBGPRINT(RT_DEBUG_TRACE, ("-->RTMPSetInformation(),	0x%08x\n", cmd&0x7FFF));
+	switch(cmd & 0x7FFF) {
+		case RT_OID_802_11_COUNTRY_REGION:
+			if (wrq->u.data.length < sizeof(UCHAR))
+				Status = -EINVAL;
+			/* Only avaliable when EEPROM not programming */
+            else if (!(pAd->CommonCfg.CountryRegion & 0x80) && !(pAd->CommonCfg.CountryRegionForABand & 0x80))
+			{
+				ULONG   Country;
+				UCHAR	TmpPhy;
+
+				Status = copy_from_user(&Country, wrq->u.data.pointer, wrq->u.data.length);
+				pAd->CommonCfg.CountryRegion = (UCHAR)(Country & 0x000000FF);
+				pAd->CommonCfg.CountryRegionForABand = (UCHAR)((Country >> 8) & 0x000000FF);
+                TmpPhy = pAd->CommonCfg.PhyMode;
+				pAd->CommonCfg.PhyMode = 0xff;
+				/* Build all corresponding channel information */
+				RTMPSetPhyMode(pAd, TmpPhy);
+#ifdef DOT11_N_SUPPORT
+				SetCommonHT(pAd);
+#endif /* DOT11_N_SUPPORT */
+				DBGPRINT(RT_DEBUG_TRACE, ("Set::RT_OID_802_11_COUNTRY_REGION (A:%d  B/G:%d)\n", pAd->CommonCfg.CountryRegionForABand,
+				    pAd->CommonCfg.CountryRegion));
+            }
+            break;
+        case OID_802_11_BSSID_LIST_SCAN:
+			RTMP_GetCurrentSystemTick(&Now);
+/*            Now = jiffies; */
+			DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_BSSID_LIST_SCAN, TxCnt = %d \n", pAd->RalinkCounters.LastOneSecTotalTxCount));
+
+            if (MONITOR_ON(pAd))
+            {
+                DBGPRINT(RT_DEBUG_TRACE, ("!!! Driver is in Monitor Mode now !!!\n"));
+                break;
+            }
+
+			/*Benson add 20080527, when radio off, sta don't need to scan */
+			if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF))
+				break;
+				
+			if (pAd->RalinkCounters.LastOneSecTotalTxCount > 100)
+            {
+                DBGPRINT(RT_DEBUG_TRACE, ("!!! Link UP, ignore this set::OID_802_11_BSSID_LIST_SCAN\n"));
+				Status = NDIS_STATUS_SUCCESS;
+				break;
+            }
+            
+            if ((OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED)) &&
+				((pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA) || 
+				(pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPAPSK) ||
+				(pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2) ||
+				(pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2PSK)) &&
+                (pAd->StaCfg.PortSecured == WPA_802_1X_PORT_NOT_SECURED))
+            {
+                DBGPRINT(RT_DEBUG_TRACE, ("!!! Link UP, Port Not Secured! ignore this set::OID_802_11_BSSID_LIST_SCAN\n"));
+				Status = NDIS_STATUS_SUCCESS;
+				break;
+            }
+
+
+			StaSiteSurvey(pAd, NULL, SCAN_ACTIVE);
+            break;
+        case OID_802_11_SSID:
+            if (wrq->u.data.length != sizeof(NDIS_802_11_SSID))
+                Status = -EINVAL;
+            else
+            {
+            	PSTRING pSsidString = NULL;
+                Status = copy_from_user(&Ssid, wrq->u.data.pointer, wrq->u.data.length);
+
+				DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_SSID (Len=%d,Ssid=%s)\n", Ssid.SsidLength, Ssid.Ssid));
+                if (Ssid.SsidLength > MAX_LEN_OF_SSID)
+                    Status = -EINVAL;
+                else
+                {
+                	if (Ssid.SsidLength == 0)
+		    		{
+                		Set_SSID_Proc(pAd, "");
+		    		}
+					else
+                    {
+/*	                	pSsidString = (PSTRING)kmalloc(MAX_LEN_OF_SSID+1, MEM_ALLOC_FLAG); */
+						os_alloc_mem(pAd, (UCHAR **)&pSsidString, MAX_LEN_OF_SSID+1);
+						if (pSsidString)
+						{
+							NdisZeroMemory(pSsidString, MAX_LEN_OF_SSID+1);
+							NdisMoveMemory(pSsidString, Ssid.Ssid, Ssid.SsidLength);
+							pSsidString[MAX_LEN_OF_SSID] = 0x00;
+							Set_SSID_Proc(pAd, pSsidString);
+							os_free_mem(NULL, pSsidString);
+						}
+						else
+							Status = -ENOMEM;
+                    }
+                }
+            }
+            break;
+		case OID_802_11_SET_PASSPHRASE:
+/*    	    ppassphrase= kmalloc(wrq->u.data.length, MEM_ALLOC_FLAG); */
+			os_alloc_mem(pAd, (UCHAR **)&ppassphrase, wrq->u.data.length);
+
+    	    if(ppassphrase== NULL)
+            {
+               	Status = -ENOMEM;
+				DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_SET_PASSPHRASE, Failed!!\n"));
+               	break;
+            }
+			else
+           	{
+               	Status = copy_from_user(ppassphrase, wrq->u.data.pointer, wrq->u.data.length);
+
+				if (Status)
+            	{
+                	Status  = -EINVAL;
+                	DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_SET_PASSPHRASE, Failed (length mismatch)!!\n"));
+           		}
+           		else
+           		{
+					if(ppassphrase->KeyLength < 8 || ppassphrase->KeyLength > 64)
+					{
+						Status  = -EINVAL;
+                    	DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_SET_PASSPHRASE, Failed (len less than 8 or greater than 64)!!\n"));
+					}
+					else
+					{
+	                    			/* set key passphrase and length */
+	 					NdisZeroMemory(pAd->StaCfg.WpaPassPhrase, 64);
+	    				NdisMoveMemory(pAd->StaCfg.WpaPassPhrase, &ppassphrase->KeyMaterial, ppassphrase->KeyLength);
+	   					pAd->StaCfg.WpaPassPhraseLen = ppassphrase->KeyLength;
+						hex_dump("pAd->StaCfg.WpaPassPhrase", pAd->StaCfg.WpaPassPhrase, 64);
+						printk("WpaPassPhrase=%s\n",pAd->StaCfg.WpaPassPhrase);
+					}
+                }
+            }
+         	os_free_mem(NULL, ppassphrase);
+	   		break;
+		
+        case OID_802_11_BSSID:
+            if (wrq->u.data.length != sizeof(NDIS_802_11_MAC_ADDRESS))
+                Status  = -EINVAL;
+            else
+            {
+                Status = copy_from_user(&Bssid, wrq->u.data.pointer, wrq->u.data.length);
+
+                /* tell CNTL state machine to call NdisMSetInformationComplete() after completing */
+                /* this request, because this request is initiated by NDIS. */
+                pAd->MlmeAux.CurrReqIsFromNdis = FALSE; 
+
+				/* Prevent to connect AP again in STAMlmePeriodicExec */
+				pAd->MlmeAux.AutoReconnectSsidLen= 32;
+
+                if (pAd->Mlme.CntlMachine.CurrState != CNTL_IDLE)
+                {
+                    RTMP_MLME_RESET_STATE_MACHINE(pAd);
+                    DBGPRINT(RT_DEBUG_TRACE, ("!!! MLME busy, reset MLME state machine !!!\n"));
+                }
+                MlmeEnqueue(pAd, 
+                            MLME_CNTL_STATE_MACHINE, 
+                            OID_802_11_BSSID, 
+                            sizeof(NDIS_802_11_MAC_ADDRESS),
+                            (VOID *)&Bssid, 0);
+                Status = NDIS_STATUS_SUCCESS;
+                StateMachineTouched = TRUE;
+
+                DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_BSSID %02x:%02x:%02x:%02x:%02x:%02x\n",
+                                        Bssid[0], Bssid[1], Bssid[2], Bssid[3], Bssid[4], Bssid[5]));
+            }
+            break;
+        case RT_OID_802_11_RADIO:
+            if (wrq->u.data.length != sizeof(BOOLEAN))
+                Status  = -EINVAL;
+            else
+            {
+                Status = copy_from_user(&RadioState, wrq->u.data.pointer, wrq->u.data.length);
+                DBGPRINT(RT_DEBUG_TRACE, ("Set::RT_OID_802_11_RADIO (=%d)\n", RadioState));
+                if (pAd->StaCfg.bSwRadio != RadioState)
+                {
+                    pAd->StaCfg.bSwRadio = RadioState;
+                    if (pAd->StaCfg.bRadio != (pAd->StaCfg.bHwRadio && pAd->StaCfg.bSwRadio))
+                    {
+                        pAd->StaCfg.bRadio = (pAd->StaCfg.bHwRadio && pAd->StaCfg.bSwRadio);
+                        if (pAd->StaCfg.bRadio == TRUE)
+                        {
+                            MlmeRadioOn(pAd);
+                            /* Update extra information */
+							pAd->ExtraInfo = EXTRA_INFO_CLEAR;
+                        }
+                        else
+                        {
+                        	if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS))
+				            {
+				                if (pAd->Mlme.CntlMachine.CurrState != CNTL_IDLE)
+						        {
+						            RTMP_MLME_RESET_STATE_MACHINE(pAd);
+						            DBGPRINT(RT_DEBUG_TRACE, ("!!! MLME busy, reset MLME state machine !!!\n"));
+						        }
+				            }
+							
+                            MlmeRadioOff(pAd);
+                            /* Update extra information */
+							pAd->ExtraInfo = SW_RADIO_OFF;
+                        }
+                    }
+                }
+            }
+            break;
+        case RT_OID_802_11_PHY_MODE:
+            if (wrq->u.data.length != sizeof(RT_802_11_PHY_MODE))
+                Status  = -EINVAL;
+            else
+            {
+                Status = copy_from_user(&PhyMode, wrq->u.data.pointer, wrq->u.data.length);
+				if (PhyMode <= MaxPhyMode)
+				{
+					pAd->CommonCfg.DesiredPhyMode = PhyMode;
+                	RTMPSetPhyMode(pAd, PhyMode);
+#ifdef DOT11_N_SUPPORT
+					SetCommonHT(pAd);
+#endif /* DOT11_N_SUPPORT */
+				}
+                DBGPRINT(RT_DEBUG_TRACE, ("Set::RT_OID_802_11_PHY_MODE (=%d)\n", PhyMode));
+            }
+            break;
+        case RT_OID_802_11_STA_CONFIG:
+            if (wrq->u.data.length != sizeof(RT_802_11_STA_CONFIG))
+                Status  = -EINVAL;
+            else
+            {
+            	UINT32	Value;
+				
+                Status = copy_from_user(&StaConfig, wrq->u.data.pointer, wrq->u.data.length);
+                pAd->CommonCfg.bEnableTxBurst = StaConfig.EnableTxBurst;
+                pAd->CommonCfg.UseBGProtection = StaConfig.UseBGProtection;
+                pAd->CommonCfg.bUseShortSlotTime = 1; /* 2003-10-30 always SHORT SLOT capable */
+                if ((pAd->CommonCfg.PhyMode != StaConfig.AdhocMode) &&
+					(StaConfig.AdhocMode <= MaxPhyMode))
+                {
+                    /* allow dynamic change of "USE OFDM rate or not" in ADHOC mode */
+                    /* if setting changed, need to reset current TX rate as well as BEACON frame format */
+                    if (pAd->StaCfg.BssType == BSS_ADHOC)
+                    {
+                    	pAd->CommonCfg.PhyMode = StaConfig.AdhocMode;
+                    	RTMPSetPhyMode(pAd, pAd->CommonCfg.PhyMode);
+                        MlmeUpdateTxRates(pAd, FALSE, 0);
+                        MakeIbssBeacon(pAd);           /* re-build BEACON frame */
+                        AsicEnableIbssSync(pAd);   /* copy to on-chip memory */
+                    }
+                }
+                DBGPRINT(RT_DEBUG_TRACE, ("Set::RT_OID_802_11_SET_STA_CONFIG (Burst=%d, Protection=%ld,ShortSlot=%d\n",
+                                        pAd->CommonCfg.bEnableTxBurst,
+                                        pAd->CommonCfg.UseBGProtection,
+                                        pAd->CommonCfg.bUseShortSlotTime));
+
+#ifdef XLINK_SUPPORT
+				if (pAd->StaCfg.PSPXlink)
+					Value = PSPXLINK;
+				else
+#endif /* XLINK_SUPPORT */
+					Value = STANORMAL;
+				RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, Value);
+            }
+            break;
+        case OID_802_11_DESIRED_RATES:
+            if (wrq->u.data.length != sizeof(NDIS_802_11_RATES))
+                Status  = -EINVAL;
+            else
+            {
+                Status = copy_from_user(&aryRates, wrq->u.data.pointer, wrq->u.data.length);
+                NdisZeroMemory(pAd->CommonCfg.DesireRate, MAX_LEN_OF_SUPPORTED_RATES);
+                NdisMoveMemory(pAd->CommonCfg.DesireRate, &aryRates, sizeof(NDIS_802_11_RATES));
+                DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_DESIRED_RATES (%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x)\n",
+                    pAd->CommonCfg.DesireRate[0],pAd->CommonCfg.DesireRate[1],
+                    pAd->CommonCfg.DesireRate[2],pAd->CommonCfg.DesireRate[3],
+                    pAd->CommonCfg.DesireRate[4],pAd->CommonCfg.DesireRate[5],
+                    pAd->CommonCfg.DesireRate[6],pAd->CommonCfg.DesireRate[7] ));
+                /* Changing DesiredRate may affect the MAX TX rate we used to TX frames out */
+                MlmeUpdateTxRates(pAd, FALSE, 0);
+            }
+            break;
+        case RT_OID_802_11_PREAMBLE:
+            if (wrq->u.data.length != sizeof(RT_802_11_PREAMBLE))
+                Status  = -EINVAL;
+            else
+            {
+                Status = copy_from_user(&Preamble, wrq->u.data.pointer, wrq->u.data.length);
+                if (Preamble == Rt802_11PreambleShort)
+                {
+                    pAd->CommonCfg.TxPreamble = Preamble;
+                    MlmeSetTxPreamble(pAd, Rt802_11PreambleShort);
+                }
+                else if ((Preamble == Rt802_11PreambleLong) || (Preamble == Rt802_11PreambleAuto))
+                {
+                    /* if user wants AUTO, initialize to LONG here, then change according to AP's */
+                    /* capability upon association. */
+                    pAd->CommonCfg.TxPreamble = Preamble;
+                    MlmeSetTxPreamble(pAd, Rt802_11PreambleLong);
+                }
+                else
+                {
+                    Status = -EINVAL;
+                    break;
+                }
+                DBGPRINT(RT_DEBUG_TRACE, ("Set::RT_OID_802_11_PREAMBLE (=%d)\n", Preamble));
+            }
+            break;
+        case OID_802_11_WEP_STATUS:
+            if (wrq->u.data.length != sizeof(NDIS_802_11_WEP_STATUS))
+                Status  = -EINVAL;
+            else
+            {
+                Status = copy_from_user(&WepStatus, wrq->u.data.pointer, wrq->u.data.length);
+                /* Since TKIP, AES, WEP are all supported. It should not have any invalid setting */
+                if (WepStatus <= Ndis802_11Encryption3KeyAbsent)
+                {
+                    if (pAd->StaCfg.WepStatus != WepStatus)
+                    {
+                        /* Config has changed */
+                        pAd->bConfigChanged = TRUE;
+                    }
+                    pAd->StaCfg.WepStatus     = WepStatus;
+                    pAd->StaCfg.PairCipher    = WepStatus;
+                	pAd->StaCfg.GroupCipher   = WepStatus;
+
+					if (pAd->StaCfg.BssType == BSS_ADHOC)
+					{
+						/* Build all corresponding channel information */
+						RTMPSetPhyMode(pAd, pAd->CommonCfg.DesiredPhyMode);
+#ifdef DOT11_N_SUPPORT
+					SetCommonHT(pAd);
+#endif /* DOT11_N_SUPPORT */
+					}
+                }
+                else
+                {
+                    Status  = -EINVAL;
+                    break;
+                }
+                DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_WEP_STATUS (=%d)\n",WepStatus));
+            }
+            break;
+        case OID_802_11_AUTHENTICATION_MODE:
+            if (wrq->u.data.length != sizeof(NDIS_802_11_AUTHENTICATION_MODE)) 
+                Status  = -EINVAL;
+            else
+            {
+                Status = copy_from_user(&AuthMode, wrq->u.data.pointer, wrq->u.data.length);
+                if (AuthMode > Ndis802_11AuthModeMax)
+                {
+                    Status  = -EINVAL;
+                    break;
+                }
+                else
+                {
+                    if (pAd->StaCfg.AuthMode != AuthMode)
+                    {
+                        /* Config has changed */
+                        pAd->bConfigChanged = TRUE;
+                    }
+                    pAd->StaCfg.AuthMode = AuthMode;
+                }
+                pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
+                DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_AUTHENTICATION_MODE (=%d) \n",pAd->StaCfg.AuthMode));
+            }
+            break;
+        case OID_802_11_INFRASTRUCTURE_MODE:
+            if (wrq->u.data.length != sizeof(NDIS_802_11_NETWORK_INFRASTRUCTURE))
+                Status  = -EINVAL;
+            else
+            {
+                Status = copy_from_user(&BssType, wrq->u.data.pointer, wrq->u.data.length);
+							
+				if (BssType == Ndis802_11IBSS)
+					Set_NetworkType_Proc(pAd, "Adhoc");
+				else if (BssType == Ndis802_11Infrastructure)
+					Set_NetworkType_Proc(pAd, "Infra");
+                else if (BssType == Ndis802_11Monitor)
+					Set_NetworkType_Proc(pAd, "Monitor");
+                else
+                {
+                    Status  = -EINVAL;
+                    DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_INFRASTRUCTURE_MODE (unknown)\n"));
+                }
+            }
+            break;
+	 case OID_802_11_REMOVE_WEP:
+            DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_REMOVE_WEP\n"));
+            if (wrq->u.data.length != sizeof(NDIS_802_11_KEY_INDEX))
+            {
+				Status = -EINVAL;
+            }
+            else 
+            {
+		KeyIdx = *(NDIS_802_11_KEY_INDEX *) wrq->u.data.pointer;
+
+		if (KeyIdx & 0x80000000)
+		{
+			/* Should never set default bit when remove key */
+			Status = -EINVAL;
+		}
+		else
+		{
+			KeyIdx = KeyIdx & 0x0fffffff;
+			if (KeyIdx >= 4){
+				Status = -EINVAL;
+			}
+			else
+			{
+						pAd->SharedKey[BSS0][KeyIdx].KeyLen = 0;
+						pAd->SharedKey[BSS0][KeyIdx].CipherAlg = CIPHER_NONE;
+						AsicRemoveSharedKeyEntry(pAd, 0, (UCHAR)KeyIdx);
+			}
+		}
+            }
+            break;
+        case RT_OID_802_11_RESET_COUNTERS:
+            NdisZeroMemory(&pAd->WlanCounters, sizeof(COUNTER_802_11));
+            NdisZeroMemory(&pAd->Counters8023, sizeof(COUNTER_802_3));
+            NdisZeroMemory(&pAd->RalinkCounters, sizeof(COUNTER_RALINK));
+            pAd->Counters8023.RxNoBuffer   = 0;
+			pAd->Counters8023.GoodReceives = 0;
+			pAd->Counters8023.RxNoBuffer   = 0;
+#ifdef RTMP_MAC_USB
+			pAd->BulkOutComplete	= 0;
+			pAd->BulkOutCompleteOther= 0;
+			pAd->BulkOutCompleteCancel = 0;
+			pAd->BulkOutReq = 0;
+			pAd->BulkInReq= 0;
+			pAd->BulkInComplete = 0;
+			pAd->BulkInCompleteFail = 0;
+#endif /* RTMP_MAC_USB */
+            DBGPRINT(RT_DEBUG_TRACE, ("Set::RT_OID_802_11_RESET_COUNTERS \n"));
+            break;
+        case OID_802_11_RTS_THRESHOLD:
+            if (wrq->u.data.length != sizeof(NDIS_802_11_RTS_THRESHOLD))
+                Status  = -EINVAL;
+            else
+            {
+                Status = copy_from_user(&RtsThresh, wrq->u.data.pointer, wrq->u.data.length);
+                if (RtsThresh > MAX_RTS_THRESHOLD)
+				{
+                    Status = -EINVAL;
+					RtsThresh = 0; /* avoid compile warning in printk() */
+                }
+				else
+                    pAd->CommonCfg.RtsThreshold = (USHORT)RtsThresh;
+            }
+            DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_RTS_THRESHOLD (=%ld)\n",RtsThresh));
+            break;
+        case OID_802_11_FRAGMENTATION_THRESHOLD:
+            if (wrq->u.data.length != sizeof(NDIS_802_11_FRAGMENTATION_THRESHOLD))
+			{
+                Status  = -EINVAL;
+				FragThresh = 0; /* avoid compile warning in printk() */
+            }
+			else
+            {
+                Status = copy_from_user(&FragThresh, wrq->u.data.pointer, wrq->u.data.length);
+                pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
+                if (FragThresh > MAX_FRAG_THRESHOLD || FragThresh < MIN_FRAG_THRESHOLD)
+                {
+                    if (FragThresh == 0)
+                    {
+                        pAd->CommonCfg.FragmentThreshold = MAX_FRAG_THRESHOLD;
+                        pAd->CommonCfg.bUseZeroToDisableFragment = TRUE;
+                    }
+                    else
+                        Status  = -EINVAL;
+                }
+                else
+                    pAd->CommonCfg.FragmentThreshold = (USHORT)FragThresh;
+            }
+            DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_FRAGMENTATION_THRESHOLD (=%ld) \n",FragThresh));
+            break;
+        case OID_802_11_POWER_MODE:
+            if (wrq->u.data.length != sizeof(NDIS_802_11_POWER_MODE))
+			{
+                Status = -EINVAL;
+				PowerMode = 0; /* avoid compile warning in printk() */
+            }
+			else
+            {
+                Status = copy_from_user(&PowerMode, wrq->u.data.pointer, wrq->u.data.length);
+                if (PowerMode == Ndis802_11PowerModeCAM) 
+                	Set_PSMode_Proc(pAd, "CAM");
+                else if (PowerMode == Ndis802_11PowerModeMAX_PSP) 
+                	Set_PSMode_Proc(pAd, "Max_PSP");
+                else if (PowerMode == Ndis802_11PowerModeFast_PSP) 
+					Set_PSMode_Proc(pAd, "Fast_PSP");
+                else if (PowerMode == Ndis802_11PowerModeLegacy_PSP) 
+					Set_PSMode_Proc(pAd, "Legacy_PSP");
+                else
+                    Status = -EINVAL;
+            }
+            DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_POWER_MODE (=%d)\n",PowerMode));
+            break;
+         case RT_OID_802_11_TX_POWER_LEVEL_1:
+			if (wrq->u.data.length  < sizeof(ULONG))
+				Status = -EINVAL;
+			else
+			{
+				Status = copy_from_user(&PowerTemp, wrq->u.data.pointer, wrq->u.data.length);
+				if (PowerTemp > 100)
+					PowerTemp = 0xffffffff;  /* AUTO */
+				pAd->CommonCfg.TxPowerDefault = PowerTemp; /*keep current setting. */
+				pAd->CommonCfg.TxPowerPercentage = pAd->CommonCfg.TxPowerDefault;			
+                DBGPRINT(RT_DEBUG_TRACE, ("Set::RT_OID_802_11_TX_POWER_LEVEL_1 (=%ld)\n", pAd->CommonCfg.TxPowerPercentage));
+			}	
+	        break;
+		case OID_802_11_NETWORK_TYPE_IN_USE: 
+			if (wrq->u.data.length != sizeof(NDIS_802_11_NETWORK_TYPE))
+				Status = -EINVAL;
+			else 
+			{
+				Status = copy_from_user(&NetType, wrq->u.data.pointer, wrq->u.data.length);
+
+				if (NetType == Ndis802_11DS)
+					RTMPSetPhyMode(pAd, PHY_11B);
+				else if (NetType == Ndis802_11OFDM24)
+					RTMPSetPhyMode(pAd, PHY_11BG_MIXED);
+				else if (NetType == Ndis802_11OFDM5)
+					RTMPSetPhyMode(pAd, PHY_11A);
+				else 
+					Status = -EINVAL;
+#ifdef DOT11_N_SUPPORT
+				if (Status == NDIS_STATUS_SUCCESS)
+					SetCommonHT(pAd);
+#endif /* DOT11_N_SUPPORT */
+                DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_NETWORK_TYPE_IN_USE (=%d)\n",NetType));
+		    }	    
+			break;
+        /* For WPA PSK PMK key */
+        case RT_OID_802_11_ADD_WPA:
+/*            pKey = kmalloc(wrq->u.data.length, MEM_ALLOC_FLAG); */
+			os_alloc_mem(pAd, (UCHAR **)&pKey, wrq->u.data.length);
+            if(pKey == NULL)
+            {
+                Status = -ENOMEM;
+                break;
+            }
+            
+            Status = copy_from_user(pKey, wrq->u.data.pointer, wrq->u.data.length);
+            if ((pKey->Length != wrq->u.data.length) ||
+				(pKey->KeyLength > LEN_PMK))
+            {
+                Status  = -EINVAL;
+                DBGPRINT(RT_DEBUG_TRACE, ("Set::RT_OID_802_11_ADD_WPA, Failed!!\n"));
+            }
+            else
+            {
+                if ((pAd->StaCfg.AuthMode != Ndis802_11AuthModeWPAPSK) &&
+				    (pAd->StaCfg.AuthMode != Ndis802_11AuthModeWPA2PSK) &&
+				    (pAd->StaCfg.AuthMode != Ndis802_11AuthModeWPANone) )
+                {
+                    Status = -EOPNOTSUPP;
+                    DBGPRINT(RT_DEBUG_TRACE, ("Set::RT_OID_802_11_ADD_WPA, Failed!! [AuthMode != WPAPSK/WPA2PSK/WPANONE]\n"));
+                }
+                else if ((pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPAPSK) ||
+						 (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2PSK) ||
+						 (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPANone) )     /* Only for WPA PSK mode */
+				{		
+                    NdisMoveMemory(pAd->StaCfg.PMK, &pKey->KeyMaterial, pKey->KeyLength);
+                    /* Use RaConfig as PSK agent. */
+                    /* Start STA supplicant state machine */
+                    if (pAd->StaCfg.AuthMode != Ndis802_11AuthModeWPANone)
+                        pAd->StaCfg.WpaState = SS_START;
+
+                    DBGPRINT(RT_DEBUG_TRACE, ("Set::RT_OID_802_11_ADD_WPA (id=0x%x, Len=%d-byte)\n", pKey->KeyIndex, pKey->KeyLength));
+                }
+                else
+                {   
+                    pAd->StaCfg.WpaState = SS_NOTUSE;
+                    DBGPRINT(RT_DEBUG_TRACE, ("Set::RT_OID_802_11_ADD_WPA (id=0x%x, Len=%d-byte)\n", pKey->KeyIndex, pKey->KeyLength));
+                }
+            }
+			os_free_mem(NULL, pKey);
+/*            kfree(pKey); */
+            break;
+        case OID_802_11_REMOVE_KEY:
+/*            pRemoveKey = kmalloc(wrq->u.data.length, MEM_ALLOC_FLAG); */
+			os_alloc_mem(pAd, (UCHAR **)&pRemoveKey, wrq->u.data.length);
+            if(pRemoveKey == NULL)
+            {
+                Status = -ENOMEM;
+                break;
+            }
+            
+            Status = copy_from_user(pRemoveKey, wrq->u.data.pointer, wrq->u.data.length);
+            if (pRemoveKey->Length != wrq->u.data.length)
+            {
+                Status  = -EINVAL;
+                DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_REMOVE_KEY, Failed!!\n"));
+            }
+            else
+            {
+                if (pAd->StaCfg.AuthMode >= Ndis802_11AuthModeWPA)
+                {
+                    RTMPWPARemoveKeyProc(pAd, pRemoveKey);
+                    DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_REMOVE_KEY, Remove WPA Key!!\n"));
+                }
+                else
+                {
+                    KeyIdx = pRemoveKey->KeyIndex;
+
+                    if (KeyIdx & 0x80000000)
+                    {
+                        /* Should never set default bit when remove key */
+                        Status  = -EINVAL;
+                        DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_REMOVE_KEY, Failed!!(Should never set default bit when remove key)\n"));
+                    }
+                    else
+                    {
+                        KeyIdx = KeyIdx & 0x0fffffff;
+                        if (KeyIdx > 3)
+                        {
+                            Status  = -EINVAL;
+                            DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_REMOVE_KEY, Failed!!(KeyId[%d] out of range)\n", KeyIdx));
+                        }
+                        else
+                        {
+                            pAd->SharedKey[BSS0][KeyIdx].KeyLen = 0;
+                            pAd->SharedKey[BSS0][KeyIdx].CipherAlg = CIPHER_NONE;
+                            AsicRemoveSharedKeyEntry(pAd, 0, (UCHAR)KeyIdx); 
+                            DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_REMOVE_KEY (id=0x%x, Len=%d-byte)\n", pRemoveKey->KeyIndex, pRemoveKey->Length));
+                        }
+                    }
+                }
+            }
+			os_free_mem(NULL, pRemoveKey);
+/*            kfree(pRemoveKey); */
+            break;        
+        /* New for WPA */
+        case OID_802_11_ADD_KEY:
+/*            pKey = kmalloc(wrq->u.data.length, MEM_ALLOC_FLAG); */
+			os_alloc_mem(pAd, (UCHAR **)&pKey, wrq->u.data.length);
+            if(pKey == NULL)
+            {
+                Status = -ENOMEM;
+                break;
+            }
+            Status = copy_from_user(pKey, wrq->u.data.pointer, wrq->u.data.length);
+            if ((pKey->Length != wrq->u.data.length) ||
+				(pKey->KeyLength > LEN_PMK))
+            {
+                Status  = -EINVAL;
+                DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_ADD_KEY, Failed!!\n"));
+            }
+            else
+            {
+                RTMPAddKey(pAd, pKey);
+                DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_ADD_KEY (id=0x%x, Len=%d-byte)\n", pKey->KeyIndex, pKey->KeyLength));
+            }
+			os_free_mem(NULL, pKey);
+/*            kfree(pKey); */
+            break;
+        case OID_802_11_CONFIGURATION:
+            if (wrq->u.data.length != sizeof(NDIS_802_11_CONFIGURATION))
+                Status  = -EINVAL;
+            else
+            {
+				os_alloc_mem(NULL, (UCHAR **)&pConfig, sizeof(NDIS_802_11_CONFIGURATION));
+				if (pConfig != NULL)
+				{
+					Status = copy_from_user(pConfig, wrq->u.data.pointer, wrq->u.data.length);
+/*                pConfig = &Config; */
+
+	                if ((pConfig->BeaconPeriod >= 20) && (pConfig->BeaconPeriod <=400))
+	                     pAd->CommonCfg.BeaconPeriod = (USHORT) pConfig->BeaconPeriod;
+	                
+	                pAd->StaActive.AtimWin = (USHORT) pConfig->ATIMWindow;
+	                MAP_KHZ_TO_CHANNEL_ID(pConfig->DSConfig, pAd->CommonCfg.Channel);
+	                /* */
+					/* Save the channel on MlmeAux for CntlOidRTBssidProc used. */
+					/* */
+					pAd->MlmeAux.Channel = pAd->CommonCfg.Channel;
+					
+	                DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_CONFIGURATION (BeacnPeriod=%ld,AtimW=%ld,Ch=%d)\n",
+	                    pConfig->BeaconPeriod, pConfig->ATIMWindow, pAd->CommonCfg.Channel));
+	                /* Config has changed */
+	                pAd->bConfigChanged = TRUE;
+					os_free_mem(NULL, pConfig);
+				}
+            }
+            break;
+#ifdef DOT11_N_SUPPORT
+		case RT_OID_802_11_SET_HT_PHYMODE:
+			if (wrq->u.data.length	!= sizeof(OID_SET_HT_PHYMODE))
+				Status = -EINVAL;
+			else 
+			{
+			    POID_SET_HT_PHYMODE	pHTPhyMode = &HT_PhyMode;
+                
+				Status = copy_from_user(&HT_PhyMode, wrq->u.data.pointer, wrq->u.data.length);				
+				DBGPRINT(RT_DEBUG_TRACE, ("Set::pHTPhyMode	(PhyMode = %d,TransmitNo = %d, HtMode =	%d,	ExtOffset =	%d , MCS = %d, BW =	%d,	STBC = %d, SHORTGI = %d) \n", 
+				pHTPhyMode->PhyMode, pHTPhyMode->TransmitNo,pHTPhyMode->HtMode,pHTPhyMode->ExtOffset,
+				pHTPhyMode->MCS, pHTPhyMode->BW, pHTPhyMode->STBC,	pHTPhyMode->SHORTGI));
+				if (pAd->CommonCfg.PhyMode	>= PHY_11ABGN_MIXED)
+					RTMPSetHT(pAd,	pHTPhyMode);
+			}
+			DBGPRINT(RT_DEBUG_TRACE, ("Set::RT_OID_802_11_SET_HT_PHYMODE(MCS=%d,BW=%d,SGI=%d,STBC=%d)\n", 
+				pAd->StaCfg.HTPhyMode.field.MCS, pAd->StaCfg.HTPhyMode.field.BW, pAd->StaCfg.HTPhyMode.field.ShortGI,
+				pAd->StaCfg.HTPhyMode.field.STBC));
+			break;
+#endif /* DOT11_N_SUPPORT */
+		case RT_OID_802_11_SET_APSD_SETTING:
+			if (wrq->u.data.length != sizeof(ULONG))
+				Status = -EINVAL;
+			else 
+			{
+				ULONG apsd ;
+				Status = copy_from_user(&apsd, wrq->u.data.pointer,	wrq->u.data.length);
+
+				/*-------------------------------------------------------------------
+				|B31~B7	|	B6~B5	 |	 B4	 |	 B3	 |	B2	 |	B1	 |	   B0		|
+				---------------------------------------------------------------------
+				| Rsvd	| Max SP Len | AC_VO | AC_VI | AC_BK | AC_BE | APSD	Capable	|
+				---------------------------------------------------------------------*/
+				pAd->CommonCfg.bAPSDCapable = (apsd & 0x00000001) ? TRUE :	FALSE;
+				pAd->CommonCfg.bAPSDAC_BE = ((apsd	& 0x00000002) >> 1)	? TRUE : FALSE;
+				pAd->CommonCfg.bAPSDAC_BK = ((apsd	& 0x00000004) >> 2)	? TRUE : FALSE;
+				pAd->CommonCfg.bAPSDAC_VI = ((apsd	& 0x00000008) >> 3)	? TRUE : FALSE;
+				pAd->CommonCfg.bAPSDAC_VO = ((apsd	& 0x00000010) >> 4)	? TRUE : FALSE;
+				pAd->CommonCfg.MaxSPLength	= (UCHAR)((apsd	& 0x00000060) >> 5);
+
+				DBGPRINT(RT_DEBUG_TRACE, ("Set::RT_OID_802_11_SET_APSD_SETTING (apsd=0x%lx, APSDCap=%d, [BE,BK,VI,VO]=[%d/%d/%d/%d],	MaxSPLen=%d)\n", apsd, pAd->CommonCfg.bAPSDCapable,
+					pAd->CommonCfg.bAPSDAC_BE,	pAd->CommonCfg.bAPSDAC_BK,	pAd->CommonCfg.bAPSDAC_VI,	pAd->CommonCfg.bAPSDAC_VO,	pAd->CommonCfg.MaxSPLength));
+			}
+			break;
+
+		case RT_OID_802_11_SET_APSD_PSM:
+			if (wrq->u.data.length	!= sizeof(ULONG))
+				Status = -EINVAL;
+			else 
+			{
+				/* Driver needs to notify AP when PSM changes */
+				Status = copy_from_user(&pAd->CommonCfg.bAPSDForcePowerSave, wrq->u.data.pointer, wrq->u.data.length);
+				if (pAd->CommonCfg.bAPSDForcePowerSave	!= pAd->StaCfg.Psm)
+				{
+					RTMP_SET_PSM_BIT(pAd,	pAd->CommonCfg.bAPSDForcePowerSave);
+					RTMPSendNullFrame(pAd,	pAd->CommonCfg.TxRate,	TRUE);
+				}
+				DBGPRINT(RT_DEBUG_TRACE, ("Set::RT_OID_802_11_SET_APSD_PSM (bAPSDForcePowerSave:%d)\n",	pAd->CommonCfg.bAPSDForcePowerSave));
+			}
+			break;
+#ifdef QOS_DLS_SUPPORT
+		case RT_OID_802_11_SET_DLS:
+			if (wrq->u.data.length != sizeof(ULONG))
+				Status = -EINVAL;
+			else 
+			{
+				BOOLEAN	oldvalue = pAd->CommonCfg.bDLSCapable;
+				Status = copy_from_user(&pAd->CommonCfg.bDLSCapable, wrq->u.data.pointer, wrq->u.data.length);
+				if (oldvalue &&	!pAd->CommonCfg.bDLSCapable)
+				{
+					int	i;
+					/* tear	down local dls table entry */
+					for	(i=0; i<MAX_NUM_OF_INIT_DLS_ENTRY; i++)
+					{
+						if (pAd->StaCfg.DLSEntry[i].Valid && (pAd->StaCfg.DLSEntry[i].Status == DLS_FINISH))
+						{
+							pAd->StaCfg.DLSEntry[i].Status	= DLS_NONE;
+							pAd->StaCfg.DLSEntry[i].Valid	= FALSE;
+							RTMPSendDLSTearDownFrame(pAd, pAd->StaCfg.DLSEntry[i].MacAddr);
+						}
+					}
+
+					/* tear	down peer dls table	entry */
+					for	(i=MAX_NUM_OF_INIT_DLS_ENTRY; i<MAX_NUM_OF_DLS_ENTRY; i++)
+					{
+						if (pAd->StaCfg.DLSEntry[i].Valid && (pAd->StaCfg.DLSEntry[i].Status == DLS_FINISH))
+						{
+							pAd->StaCfg.DLSEntry[i].Status	= DLS_NONE;
+							pAd->StaCfg.DLSEntry[i].Valid	= FALSE;
+							RTMPSendDLSTearDownFrame(pAd, pAd->StaCfg.DLSEntry[i].MacAddr);
+						}
+					}
+				}
+
+				DBGPRINT(RT_DEBUG_TRACE,("Set::RT_OID_802_11_SET_DLS (=%d)\n", pAd->CommonCfg.bDLSCapable));
+			}
+			break;
+
+		case RT_OID_802_11_SET_DLS_PARAM:
+			if (wrq->u.data.length	!= sizeof(RT_802_11_DLS_UI))
+				Status = -EINVAL;
+			else 
+			{
+				RT_802_11_DLS	Dls;
+
+				NdisZeroMemory(&Dls, sizeof(RT_802_11_DLS));
+				RTMPMoveMemory(&Dls, wrq->u.data.pointer, sizeof(RT_802_11_DLS_UI));
+				MlmeEnqueue(pAd, 
+							MLME_CNTL_STATE_MACHINE, 
+							RT_OID_802_11_SET_DLS_PARAM, 
+							sizeof(RT_802_11_DLS), 
+							&Dls, 0);
+				DBGPRINT(RT_DEBUG_TRACE,("Set::RT_OID_802_11_SET_DLS_PARAM \n"));
+			}
+			break;
+#endif /* QOS_DLS_SUPPORT */
+
+
+		case RT_OID_802_11_SET_WMM:
+			if (wrq->u.data.length	!= sizeof(BOOLEAN))
+				Status = -EINVAL;
+			else 
+			{
+				Status = copy_from_user(&pAd->CommonCfg.bWmmCapable, wrq->u.data.pointer, wrq->u.data.length);
+				DBGPRINT(RT_DEBUG_TRACE, ("Set::RT_OID_802_11_SET_WMM (=%d)	\n", pAd->CommonCfg.bWmmCapable));
+			}
+			break;
+
+		case OID_802_11_DISASSOCIATE:
+			/* */
+			/* Set NdisRadioStateOff to	TRUE, instead of called	MlmeRadioOff. */
+			/* Later on, NDIS_802_11_BSSID_LIST_EX->NumberOfItems should be	0 */
+			/* when	query OID_802_11_BSSID_LIST. */
+			/* */
+			/* TRUE:  NumberOfItems	will set to	0. */
+			/* FALSE: NumberOfItems	no change. */
+			/* */
+			pAd->CommonCfg.NdisRadioStateOff =	TRUE;
+			/* Set to immediately send the media disconnect	event */
+			pAd->MlmeAux.CurrReqIsFromNdis	= TRUE;			
+			DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_DISASSOCIATE	\n"));
+
+
+			if (INFRA_ON(pAd))
+			{
+				if (pAd->Mlme.CntlMachine.CurrState !=	CNTL_IDLE)
+				{
+					RTMP_MLME_RESET_STATE_MACHINE(pAd);
+					DBGPRINT(RT_DEBUG_TRACE, ("!!! MLME	busy, reset	MLME state machine !!!\n"));
+				}
+
+				MlmeEnqueue(pAd, 
+					MLME_CNTL_STATE_MACHINE,
+					OID_802_11_DISASSOCIATE,
+					0,
+					NULL, 0);
+
+				StateMachineTouched	= TRUE;
+			}
+			break;
+
+#ifdef DOT11_N_SUPPORT
+		case RT_OID_802_11_SET_IMME_BA_CAP:
+				if (wrq->u.data.length != sizeof(OID_BACAP_STRUC))
+					Status = -EINVAL;
+				else
+				{
+					OID_BACAP_STRUC Orde ;
+					Status = copy_from_user(&Orde, wrq->u.data.pointer, wrq->u.data.length);
+					if (Orde.Policy > BA_NOTUSE)
+					{
+						Status = NDIS_STATUS_INVALID_DATA;
+					}
+					else if (Orde.Policy == BA_NOTUSE)
+					{
+						pAd->CommonCfg.BACapability.field.Policy = BA_NOTUSE;
+						pAd->CommonCfg.BACapability.field.MpduDensity = Orde.MpduDensity;
+						pAd->CommonCfg.DesiredHtPhy.MpduDensity = Orde.MpduDensity;
+						pAd->CommonCfg.DesiredHtPhy.AmsduEnable = Orde.AmsduEnable;
+						pAd->CommonCfg.DesiredHtPhy.AmsduSize= Orde.AmsduSize;
+						pAd->CommonCfg.DesiredHtPhy.MimoPs= Orde.MMPSmode;
+						pAd->CommonCfg.BACapability.field.MMPSmode = Orde.MMPSmode;
+						/* UPdata to HT IE */
+						pAd->CommonCfg.HtCapability.HtCapInfo.MimoPs = Orde.MMPSmode;
+						pAd->CommonCfg.HtCapability.HtCapInfo.AMsduSize = Orde.AmsduSize;
+						pAd->CommonCfg.HtCapability.HtCapParm.MpduDensity = Orde.MpduDensity;
+					}
+					else
+					{
+                        pAd->CommonCfg.BACapability.field.AutoBA = Orde.AutoBA;
+						pAd->CommonCfg.BACapability.field.Policy = IMMED_BA; /* we only support immediate BA. */
+						pAd->CommonCfg.BACapability.field.MpduDensity = Orde.MpduDensity;
+						pAd->CommonCfg.DesiredHtPhy.MpduDensity = Orde.MpduDensity;
+						pAd->CommonCfg.DesiredHtPhy.AmsduEnable = Orde.AmsduEnable;
+						pAd->CommonCfg.DesiredHtPhy.AmsduSize= Orde.AmsduSize;
+						pAd->CommonCfg.DesiredHtPhy.MimoPs = Orde.MMPSmode;
+						pAd->CommonCfg.BACapability.field.MMPSmode = Orde.MMPSmode;
+							
+						/* UPdata to HT IE */
+						pAd->CommonCfg.HtCapability.HtCapInfo.MimoPs = Orde.MMPSmode;
+						pAd->CommonCfg.HtCapability.HtCapInfo.AMsduSize = Orde.AmsduSize;
+						pAd->CommonCfg.HtCapability.HtCapParm.MpduDensity = Orde.MpduDensity;
+						
+						if (pAd->CommonCfg.BACapability.field.RxBAWinLimit > MAX_RX_REORDERBUF)
+							pAd->CommonCfg.BACapability.field.RxBAWinLimit = MAX_RX_REORDERBUF;
+
+					}
+
+					pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
+					DBGPRINT(RT_DEBUG_TRACE, ("Set::(Orde.AutoBA = %d) (Policy=%d)(ReBAWinLimit=%d)(TxBAWinLimit=%d)(AutoMode=%d)\n",Orde.AutoBA, pAd->CommonCfg.BACapability.field.Policy,
+						pAd->CommonCfg.BACapability.field.RxBAWinLimit,pAd->CommonCfg.BACapability.field.TxBAWinLimit, pAd->CommonCfg.BACapability.field.AutoBA));
+					DBGPRINT(RT_DEBUG_TRACE, ("Set::(MimoPs = %d)(AmsduEnable = %d) (AmsduSize=%d)(MpduDensity=%d)\n",pAd->CommonCfg.DesiredHtPhy.MimoPs, pAd->CommonCfg.DesiredHtPhy.AmsduEnable,
+						pAd->CommonCfg.DesiredHtPhy.AmsduSize, pAd->CommonCfg.DesiredHtPhy.MpduDensity));
+				}
+
+				break;
+		case RT_OID_802_11_ADD_IMME_BA:
+			DBGPRINT(RT_DEBUG_TRACE, (" Set :: RT_OID_802_11_ADD_IMME_BA \n"));
+			if (wrq->u.data.length != sizeof(OID_ADD_BA_ENTRY))
+					Status = -EINVAL;
+			else 
+			{
+				UCHAR		        index;
+				OID_ADD_BA_ENTRY    BA;
+				MAC_TABLE_ENTRY     *pEntry;
+
+				Status = copy_from_user(&BA, wrq->u.data.pointer, wrq->u.data.length);
+				if (BA.TID > (NUM_OF_TID-1))
+				{
+					Status = NDIS_STATUS_INVALID_DATA;
+					break;
+				}
+				else
+				{
+					/*BATableInsertEntry */
+					/*As ad-hoc mode, BA pair is not limited to only BSSID. so add via OID. */
+					index = BA.TID;
+					/* in ad hoc mode, when adding BA pair, we should insert this entry into MACEntry too */
+					pEntry = MacTableLookup(pAd, BA.MACAddr);
+					if (!pEntry)
+					{
+						DBGPRINT(RT_DEBUG_TRACE, ("RT_OID_802_11_ADD_IMME_BA. break on no connection.----:%x:%x\n", BA.MACAddr[4], BA.MACAddr[5]));
+						break;
+					}
+					if (BA.IsRecipient == FALSE)
+					{
+					    if (pEntry->bIAmBadAtheros == TRUE)
+							pAd->CommonCfg.BACapability.field.RxBAWinLimit = 0x10;
+
+						BAOriSessionSetUp(pAd, pEntry, index, 0, 100, TRUE);
+					}
+					else 
+					{
+						/*BATableInsertEntry(pAd, pEntry->Aid, BA.MACAddr, 0, 0xffff, BA.TID, BA.nMSDU, BA.IsRecipient); */
+					}
+
+					DBGPRINT(RT_DEBUG_TRACE, ("Set::RT_OID_802_11_ADD_IMME_BA. Rec = %d. Mac = %x:%x:%x:%x:%x:%x . \n",
+						BA.IsRecipient, BA.MACAddr[0], BA.MACAddr[1], BA.MACAddr[2], BA.MACAddr[2]
+						, BA.MACAddr[4], BA.MACAddr[5]));
+				}
+			}
+			break;
+
+		case RT_OID_802_11_TEAR_IMME_BA:
+			DBGPRINT(RT_DEBUG_TRACE, ("Set :: RT_OID_802_11_TEAR_IMME_BA \n"));
+			if (wrq->u.data.length != sizeof(OID_ADD_BA_ENTRY))
+					Status = -EINVAL;
+			else 
+			{
+				POID_ADD_BA_ENTRY	pBA;
+				MAC_TABLE_ENTRY *pEntry;
+				
+/*				pBA = kmalloc(wrq->u.data.length, MEM_ALLOC_FLAG); */
+				os_alloc_mem(pAd, (UCHAR **)&pBA, wrq->u.data.length);
+
+				if (pBA == NULL)
+				{
+					DBGPRINT(RT_DEBUG_TRACE, ("Set :: RT_OID_802_11_TEAR_IMME_BA kmalloc() can't allocate enough memory\n"));
+					Status = NDIS_STATUS_FAILURE;
+				}
+				else
+				{
+					Status = copy_from_user(pBA, wrq->u.data.pointer, wrq->u.data.length);
+					DBGPRINT(RT_DEBUG_TRACE, ("Set :: RT_OID_802_11_TEAR_IMME_BA(TID=%d, bAllTid=%d)\n", pBA->TID, pBA->bAllTid));
+					
+					if (!pBA->bAllTid && (pBA->TID > (NUM_OF_TID-1)))
+					{
+						Status = NDIS_STATUS_INVALID_DATA;
+						os_free_mem(NULL, pBA);
+/*						kfree(pBA); */
+						break;
+					}
+					
+					if (pBA->IsRecipient == FALSE)
+					{
+						pEntry = MacTableLookup(pAd, pBA->MACAddr);
+						DBGPRINT(RT_DEBUG_TRACE, (" pBA->IsRecipient == FALSE\n"));
+						if (pEntry)
+						{
+							DBGPRINT(RT_DEBUG_TRACE, (" pBA->pEntry\n"));
+							BAOriSessionTearDown(pAd, pEntry->Aid, pBA->TID, FALSE, TRUE);
+						}
+						else
+							DBGPRINT(RT_DEBUG_TRACE, ("Set :: Not found pEntry \n"));
+					}
+					else
+					{
+						pEntry = MacTableLookup(pAd, pBA->MACAddr);
+						if (pEntry)
+						{
+							BARecSessionTearDown( pAd, (UCHAR)pEntry->Aid, pBA->TID, TRUE);
+						}
+						else
+							DBGPRINT(RT_DEBUG_TRACE, ("Set :: Not found pEntry \n"));
+					}
+					os_free_mem(NULL, pBA);
+/*					kfree(pBA); */
+				}
+            }
+            break;
+#endif /* DOT11_N_SUPPORT */
+
+        /* For WPA_SUPPLICANT to set static wep key */
+    	case OID_802_11_ADD_WEP:
+/*    	    pWepKey = kmalloc(wrq->u.data.length, MEM_ALLOC_FLAG); */
+			os_alloc_mem(pAd, (UCHAR **)&pWepKey, wrq->u.data.length);
+
+    	    if(pWepKey == NULL)
+            {
+                Status = -ENOMEM;
+				DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_ADD_WEP, Failed!!\n"));
+                break;
+            }
+            Status = copy_from_user(pWepKey, wrq->u.data.pointer, wrq->u.data.length);
+            if (Status)
+            {
+                Status  = -EINVAL;
+                DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_ADD_WEP, Failed (length mismatch)!!\n"));
+            }
+            else
+            {
+		        KeyIdx = pWepKey->KeyIndex & 0x0fffffff;
+                /* KeyIdx must be 0 ~ 3 */
+                if (KeyIdx >= 4)
+    			{
+                    Status  = -EINVAL;
+                    DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_ADD_WEP, Failed (KeyIdx must be smaller than 4)!!\n"));
+                }
+                else
+                {
+                    UCHAR CipherAlg = 0;
+                    PUCHAR Key;
+
+					/* Zero the specific shared key */
+					NdisZeroMemory(&pAd->SharedKey[BSS0][KeyIdx], sizeof(CIPHER_KEY));
+
+                    /* set key material and key length */
+                    pAd->SharedKey[BSS0][KeyIdx].KeyLen = (UCHAR) pWepKey->KeyLength;
+                    NdisMoveMemory(pAd->SharedKey[BSS0][KeyIdx].Key, &pWepKey->KeyMaterial, pWepKey->KeyLength);
+
+                    switch(pWepKey->KeyLength)
+                    {
+                        case 5:
+                            CipherAlg = CIPHER_WEP64;
+                            break;
+                        case 13:
+                            CipherAlg = CIPHER_WEP128;
+                            break;
+                        default:
+                            DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_ADD_WEP, only support CIPHER_WEP64(len:5) & CIPHER_WEP128(len:13)!!\n"));
+                            Status = -EINVAL;
+                            break;
+                    }
+                    pAd->SharedKey[BSS0][KeyIdx].CipherAlg = CipherAlg;
+
+                    /* Default key for tx (shared key) */
+                    if (pWepKey->KeyIndex & 0x80000000)
+                    {
+#ifdef WPA_SUPPLICANT_SUPPORT
+                        NdisZeroMemory(&pAd->StaCfg.DesireSharedKey[KeyIdx], sizeof(CIPHER_KEY));
+								
+                        /* set key material and key length */
+                        pAd->StaCfg.DesireSharedKey[KeyIdx].KeyLen = (UCHAR) pWepKey->KeyLength;
+                        NdisMoveMemory(pAd->StaCfg.DesireSharedKey[KeyIdx].Key, &pWepKey->KeyMaterial, pWepKey->KeyLength);
+                        pAd->StaCfg.DesireSharedKeyId = KeyIdx;
+                        pAd->StaCfg.DesireSharedKey[KeyIdx].CipherAlg = CipherAlg;
+#endif /* WPA_SUPPLICANT_SUPPORT */                    
+                        pAd->StaCfg.DefaultKeyId = (UCHAR) KeyIdx;
+                    }
+                    
+#ifdef WPA_SUPPLICANT_SUPPORT
+					if ((pAd->StaCfg.WpaSupplicantUP != WPA_SUPPLICANT_DISABLE) &&
+						(pAd->StaCfg.AuthMode >= Ndis802_11AuthModeWPA))
+					{
+						Key = pWepKey->KeyMaterial;
+						
+						/* Set Group key material to Asic */
+    					AsicAddSharedKeyEntry(pAd, BSS0, KeyIdx, &pAd->SharedKey[BSS0][KeyIdx]);
+						
+						STA_PORT_SECURED(pAd);
+					}
+                    else if (pAd->StaCfg.PortSecured == WPA_802_1X_PORT_SECURED)
+#endif /* WPA_SUPPLICANT_SUPPORT */
+                    {
+                        Key = pAd->SharedKey[BSS0][KeyIdx].Key;
+
+                        /* Set key material and cipherAlg to Asic */
+        				AsicAddSharedKeyEntry(pAd, BSS0, KeyIdx, &pAd->SharedKey[BSS0][KeyIdx]);	
+                        
+                        if (pWepKey->KeyIndex & 0x80000000)
+                        {
+    						/* Assign pairwise key info */
+    						RTMPSetWcidSecurityInfo(pAd, 
+												 BSS0, 
+												 KeyIdx, 
+												 CipherAlg, 												 
+												 BSSID_WCID, 
+												 SHAREDKEYTABLE);
+                        }
+                    }
+					DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_ADD_WEP (id=0x%x, Len=%d-byte), %s\n", pWepKey->KeyIndex, pWepKey->KeyLength, (pAd->StaCfg.PortSecured == WPA_802_1X_PORT_SECURED) ? "Port Secured":"Port NOT Secured"));
+				}
+            }
+			os_free_mem(NULL, pWepKey);
+/*            kfree(pWepKey); */
+            break;
+#ifdef WPA_SUPPLICANT_SUPPORT
+	    case OID_SET_COUNTERMEASURES:
+            if (wrq->u.data.length != sizeof(int))
+                Status  = -EINVAL;
+            else
+            {
+                int enabled = 0;
+                Status = copy_from_user(&enabled, wrq->u.data.pointer, wrq->u.data.length);
+                if (enabled == 1)
+                    pAd->StaCfg.bBlockAssoc = TRUE;
+                else
+                    /* WPA MIC error should block association attempt for 60 seconds */
+                    pAd->StaCfg.bBlockAssoc = FALSE;
+                DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_SET_COUNTERMEASURES bBlockAssoc=%s\n", pAd->StaCfg.bBlockAssoc ? "TRUE":"FALSE"));
+            }
+	        break;
+        case RT_OID_WPA_SUPPLICANT_SUPPORT:
+			if (wrq->u.data.length != sizeof(UCHAR))
+                Status  = -EINVAL;
+            else
+            {
+				Status = copy_from_user(&wpa_supplicant_enable, wrq->u.data.pointer, wrq->u.data.length);
+				if (wpa_supplicant_enable & WPA_SUPPLICANT_ENABLE_WPS)
+					pAd->StaCfg.WpaSupplicantUP |= WPA_SUPPLICANT_ENABLE_WPS;
+				else
+				{
+					pAd->StaCfg.WpaSupplicantUP = wpa_supplicant_enable;
+					pAd->StaCfg.WpaSupplicantUP &= 0x7F;
+				}
+				DBGPRINT(RT_DEBUG_TRACE, ("Set::RT_OID_WPA_SUPPLICANT_SUPPORT (=0x%02X)\n", pAd->StaCfg.WpaSupplicantUP));
+			}
+            break;	   
+        case OID_802_11_DEAUTHENTICATION:
+            if (wrq->u.data.length != sizeof(MLME_DEAUTH_REQ_STRUCT))
+                Status  = -EINVAL;
+            else
+            {
+                MLME_DEAUTH_REQ_STRUCT      *pInfo;
+				MLME_QUEUE_ELEM *MsgElem;/* = (MLME_QUEUE_ELEM *) kmalloc(sizeof(MLME_QUEUE_ELEM), MEM_ALLOC_FLAG); */
+				os_alloc_mem(pAd, (UCHAR **)&MsgElem, sizeof(MLME_QUEUE_ELEM));
+                if (MsgElem == NULL)
+                {
+                	DBGPRINT(RT_DEBUG_ERROR, ("%s():alloc memory failed!\n", __FUNCTION__));
+                        return -EINVAL;
+                }
+
+                pInfo = (MLME_DEAUTH_REQ_STRUCT *) MsgElem->Msg;
+                Status = copy_from_user(pInfo, wrq->u.data.pointer, wrq->u.data.length);
+                MlmeDeauthReqAction(pAd, MsgElem);
+/*				kfree(MsgElem); */
+				os_free_mem(NULL, MsgElem);
+				
+                if (INFRA_ON(pAd))
+                {
+                    LinkDown(pAd, FALSE);
+                    pAd->Mlme.AssocMachine.CurrState = ASSOC_IDLE;
+                }
+                DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_DEAUTHENTICATION (Reason=%d)\n", pInfo->Reason));
+            }
+            break;
+        case OID_802_11_DROP_UNENCRYPTED:
+            if (wrq->u.data.length != sizeof(int))
+                Status  = -EINVAL;
+            else
+            {
+                int enabled = 0;
+                Status = copy_from_user(&enabled, wrq->u.data.pointer, wrq->u.data.length);
+                if (enabled == 1)
+                    pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
+                else
+                    pAd->StaCfg.PortSecured = WPA_802_1X_PORT_SECURED;
+				NdisAcquireSpinLock(&pAd->MacTabLock);
+				pAd->MacTab.Content[BSSID_WCID].PortSecured = pAd->StaCfg.PortSecured;
+				NdisReleaseSpinLock(&pAd->MacTabLock);
+                DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_DROP_UNENCRYPTED (=%d)\n", enabled));
+            }
+            break;
+        case OID_802_11_SET_IEEE8021X:
+            if (wrq->u.data.length != sizeof(BOOLEAN))
+                Status  = -EINVAL;
+            else
+            {
+                Status = copy_from_user(&IEEE8021xState, wrq->u.data.pointer, wrq->u.data.length);                				
+		        pAd->StaCfg.IEEE8021X = IEEE8021xState;
+                DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_SET_IEEE8021X (=%d)\n", IEEE8021xState));
+            }
+            break;
+        case OID_802_11_SET_IEEE8021X_REQUIRE_KEY:	
+			if (wrq->u.data.length != sizeof(BOOLEAN))
+				 Status  = -EINVAL;
+            else
+            {
+                Status = copy_from_user(&IEEE8021x_required_keys, wrq->u.data.pointer, wrq->u.data.length);                				
+				pAd->StaCfg.IEEE8021x_required_keys = IEEE8021x_required_keys;				
+				DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_SET_IEEE8021X_REQUIRE_KEY (%d)\n", IEEE8021x_required_keys));
+			}	
+			break;
+        case OID_802_11_PMKID:
+/*	        pPmkId = kmalloc(wrq->u.data.length, MEM_ALLOC_FLAG); */
+			os_alloc_mem(pAd, (UCHAR **)&pPmkId, wrq->u.data.length);
+
+	        if(pPmkId == NULL) {
+                Status = -ENOMEM;
+                break;
+            }
+            Status = copy_from_user(pPmkId, wrq->u.data.pointer, wrq->u.data.length);
+	  	  
+	        /* check the PMKID information */
+	        if (pPmkId->BSSIDInfoCount == 0)
+                NdisZeroMemory(pAd->StaCfg.SavedPMK, sizeof(BSSID_INFO)*PMKID_NO);
+	        else
+	        {
+		        PBSSID_INFO	pBssIdInfo;
+		        UINT		BssIdx;
+		        UINT		CachedIdx;
+
+		        for (BssIdx = 0; BssIdx < pPmkId->BSSIDInfoCount; BssIdx++)
+		        {
+			        /* point to the indexed BSSID_INFO structure */
+			        pBssIdInfo = (PBSSID_INFO) ((PUCHAR) pPmkId + 2 * sizeof(UINT) + BssIdx * sizeof(BSSID_INFO));
+			        /* Find the entry in the saved data base. */
+			        for (CachedIdx = 0; CachedIdx < pAd->StaCfg.SavedPMKNum; CachedIdx++)
+			        {
+				        /* compare the BSSID */
+				        if (NdisEqualMemory(pBssIdInfo->BSSID, pAd->StaCfg.SavedPMK[CachedIdx].BSSID, sizeof(NDIS_802_11_MAC_ADDRESS)))
+					        break;			
+			        }
+
+			        /* Found, replace it */
+			        if (CachedIdx < PMKID_NO)
+			        {
+				        DBGPRINT(RT_DEBUG_OFF, ("Update OID_802_11_PMKID, idx = %d\n", CachedIdx));
+				        NdisMoveMemory(&pAd->StaCfg.SavedPMK[CachedIdx], pBssIdInfo, sizeof(BSSID_INFO));
+				        pAd->StaCfg.SavedPMKNum++;
+			        }
+			        /* Not found, replace the last one */
+			        else
+			        {
+				        /* Randomly replace one */
+				        CachedIdx = (pBssIdInfo->BSSID[5] % PMKID_NO);
+				        DBGPRINT(RT_DEBUG_OFF, ("Update OID_802_11_PMKID, idx = %d\n", CachedIdx));
+				        NdisMoveMemory(&pAd->StaCfg.SavedPMK[CachedIdx], pBssIdInfo, sizeof(BSSID_INFO));
+			        }				
+		        }
+			}
+			if(pPmkId) 
+/*				kfree(pPmkId); */
+				os_free_mem(NULL, pPmkId);
+	        break;
+
+		case RT_OID_WPS_PROBE_REQ_IE:
+			if (pAd->StaCfg.pWpsProbeReqIe)
+			{
+/*				kfree(pAd->StaCfg.pWpsProbeReqIe); */
+				os_free_mem(NULL, pAd->StaCfg.pWpsProbeReqIe);
+				pAd->StaCfg.pWpsProbeReqIe = NULL;
+			}
+			pAd->StaCfg.WpsProbeReqIeLen = 0;
+/*			pAd->StaCfg.pWpsProbeReqIe = kmalloc(wrq->u.data.length, MEM_ALLOC_FLAG); */
+			os_alloc_mem(pAd, (UCHAR **)&(pAd->StaCfg.pWpsProbeReqIe), wrq->u.data.length);
+			if (pAd->StaCfg.pWpsProbeReqIe)
+			{
+				Status = copy_from_user(pAd->StaCfg.pWpsProbeReqIe, wrq->u.data.pointer, wrq->u.data.length);
+
+				if (Status)
+            	{
+                	Status  = -EINVAL;
+					if (pAd->StaCfg.pWpsProbeReqIe)
+					{
+/*						kfree(pAd->StaCfg.pWpsProbeReqIe); */
+						os_free_mem(NULL, pAd->StaCfg.pWpsProbeReqIe);
+						pAd->StaCfg.pWpsProbeReqIe = NULL;
+					}
+					pAd->StaCfg.WpsProbeReqIeLen = 0;
+                	DBGPRINT(RT_DEBUG_TRACE, ("Set::RT_OID_WPS_PROBE_REQ_IE, Failed (copy_from_user failed)!!\n"));
+           		}
+           		else
+           		{
+					pAd->StaCfg.WpsProbeReqIeLen = wrq->u.data.length;
+					hex_dump("WpsProbeReqIe", pAd->StaCfg.pWpsProbeReqIe, pAd->StaCfg.WpsProbeReqIeLen);
+					DBGPRINT(RT_DEBUG_TRACE, ("Set::RT_OID_WPS_PROBE_REQ_IE, WpsProbeReqIeLen = %d!!\n",
+								pAd->StaCfg.WpsProbeReqIeLen));
+           		}
+			}
+			else
+				Status = -ENOMEM;
+			break;
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+
+
+#ifdef SNMP_SUPPORT
+		case OID_802_11_SHORTRETRYLIMIT:
+			if (wrq->u.data.length != sizeof(ULONG))
+				Status = -EINVAL;
+			else
+			{
+				Status = copy_from_user(&ShortRetryLimit, wrq->u.data.pointer, wrq->u.data.length);
+				RTMP_IO_READ32(pAd, TX_RTY_CFG, &tx_rty_cfg.word);
+				tx_rty_cfg.field.ShortRtyLimit = ShortRetryLimit;
+				RTMP_IO_WRITE32(pAd, TX_RTY_CFG, tx_rty_cfg.word);
+				DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_SHORTRETRYLIMIT (tx_rty_cfg.field.ShortRetryLimit=%d, ShortRetryLimit=%ld)\n", tx_rty_cfg.field.ShortRtyLimit, ShortRetryLimit));
+			}
+			break;
+
+		case OID_802_11_LONGRETRYLIMIT:
+			DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_LONGRETRYLIMIT \n"));
+			if (wrq->u.data.length != sizeof(ULONG))
+				Status = -EINVAL;
+			else
+			{
+				Status = copy_from_user(&LongRetryLimit, wrq->u.data.pointer, wrq->u.data.length);
+				RTMP_IO_READ32(pAd, TX_RTY_CFG, &tx_rty_cfg.word);
+				tx_rty_cfg.field.LongRtyLimit = LongRetryLimit;
+				RTMP_IO_WRITE32(pAd, TX_RTY_CFG, tx_rty_cfg.word);
+				DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_LONGRETRYLIMIT (tx_rty_cfg.field.LongRetryLimit= %d,LongRetryLimit=%ld)\n", tx_rty_cfg.field.LongRtyLimit, LongRetryLimit));
+			}
+			break;
+
+		case OID_802_11_WEPDEFAULTKEYVALUE:
+			DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_WEPDEFAULTKEYVALUE\n"));
+/*			pKey = kmalloc(wrq->u.data.length, GFP_KERNEL); */
+			os_alloc_mem(pAd, (UCHAR **)&pKey, wrq->u.data.length);
+			if (pKey == NULL)
+			{
+				Status = -EINVAL;
+				DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_WEPDEFAULTKEYVALUE, Failed!!\n"));
+				break;
+			}
+
+			Status = copy_from_user(pKey, wrq->u.data.pointer, wrq->u.data.length);
+			/*pKey = &WepKey; */
+			
+			if ( pKey->Length != wrq->u.data.length)
+			{
+				Status = -EINVAL;
+				DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_WEPDEFAULTKEYVALUE, Failed!!\n"));
+			}
+			KeyIdx = pKey->KeyIndex & 0x0fffffff;
+			DBGPRINT(RT_DEBUG_TRACE,("pKey->KeyIndex =%d, pKey->KeyLength=%d\n", pKey->KeyIndex, pKey->KeyLength));
+
+			/* it is a shared key */
+			if (KeyIdx >= 4)
+				Status = -EINVAL;
+			else
+			{
+				pAd->SharedKey[BSS0][pAd->StaCfg.DefaultKeyId].KeyLen = (UCHAR) pKey->KeyLength;
+				NdisMoveMemory(&pAd->SharedKey[BSS0][pAd->StaCfg.DefaultKeyId].Key, &pKey->KeyMaterial, pKey->KeyLength);
+				if (pKey->KeyIndex & 0x80000000)
+				{
+					/* Default key for tx (shared key) */
+					pAd->StaCfg.DefaultKeyId = (UCHAR) KeyIdx;
+				}
+				/*RestartAPIsRequired = TRUE; */
+			}
+/*			kfree(pKey); */
+			os_free_mem(NULL, pKey);
+			break;
+
+
+		case OID_802_11_WEPDEFAULTKEYID:
+			DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_WEPDEFAULTKEYID \n"));
+
+			if (wrq->u.data.length != sizeof(UCHAR))
+				Status = -EINVAL;
+			else
+				Status = copy_from_user(&pAd->StaCfg.DefaultKeyId, wrq->u.data.pointer, wrq->u.data.length);
+
+			break;
+
+
+		case OID_802_11_CURRENTCHANNEL:
+			DBGPRINT(RT_DEBUG_TRACE, ("Set::OID_802_11_CURRENTCHANNEL \n"));
+			if (wrq->u.data.length != sizeof(UCHAR))
+				Status = -EINVAL;
+			else
+			{
+				STRING	ChStr[5] = {0};
+				Status = copy_from_user(&ctmp, wrq->u.data.pointer, wrq->u.data.length);
+				snprintf(ChStr, sizeof(ChStr), "%d", ctmp);
+				Set_Channel_Proc(pAd, ChStr);
+			}
+			break;
+#endif /* SNMP_SUPPORT */
+
+
+
+
+#ifdef XLINK_SUPPORT
+		case RT_OID_802_11_SET_PSPXLINK_MODE:
+			if (wrq->u.data.length != sizeof(BOOLEAN))
+                Status  = -EINVAL;
+            else
+            {
+                Status = copy_from_user(&pAd->StaCfg.PSPXlink, wrq->u.data.pointer, wrq->u.data.length);
+				/*if (pAd->StaCfg.PSPXlink)
+					RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_PROMISCUOUS)*/
+				DBGPRINT(RT_DEBUG_TRACE,("Set::RT_OID_802_11_SET_PSPXLINK_MODE(=%d) \n", pAd->StaCfg.PSPXlink));
+            }
+			break;
+#endif /* XLINK_SUPPORT */
+
+
+
+        default:
+            DBGPRINT(RT_DEBUG_TRACE, ("Set::unknown IOCTL's subcmd = 0x%08x\n", cmd));
+            Status = -EOPNOTSUPP;
+            break;
+    }
+
+
+    return Status;
+}
+
+INT RTMPQueryInformation(
+    IN  PRTMP_ADAPTER pAd,
+    IN  OUT RTMP_IOCTL_INPUT_STRUCT    *rq,
+    IN  INT                 cmd)
+{
+    RTMP_IOCTL_INPUT_STRUCT				*wrq = (RTMP_IOCTL_INPUT_STRUCT *) rq;
+    NDIS_802_11_BSSID_LIST_EX           *pBssidList = NULL;
+    PNDIS_WLAN_BSSID_EX                 pBss;
+    NDIS_802_11_SSID                    Ssid;
+    NDIS_802_11_CONFIGURATION           *pConfiguration = NULL;
+    RT_802_11_LINK_STATUS               *pLinkStatus = NULL;
+    RT_802_11_STA_CONFIG                *pStaConfig = NULL;
+    NDIS_802_11_STATISTICS              *pStatistics = NULL;
+    NDIS_802_11_RTS_THRESHOLD           RtsThresh;
+    NDIS_802_11_FRAGMENTATION_THRESHOLD FragThresh;
+    NDIS_802_11_POWER_MODE              PowerMode;
+    NDIS_802_11_NETWORK_INFRASTRUCTURE  BssType;
+    RT_802_11_PREAMBLE                  PreamType;
+    NDIS_802_11_AUTHENTICATION_MODE     AuthMode;
+    NDIS_802_11_WEP_STATUS              WepStatus;
+    NDIS_MEDIA_STATE                    MediaState;
+    ULONG                               BssBufSize, ulInfo=0, NetworkTypeList[4], apsd = 0, RateValue=0;
+    USHORT                              BssLen = 0;
+    PUCHAR                              pBuf = NULL, pPtr;
+    INT                                 Status = NDIS_STATUS_SUCCESS;
+    UINT                                we_version_compiled;
+    UCHAR                               i, Padding = 0;
+    BOOLEAN                             RadioState;
+    STRING								driverVersion[8];
+    OID_SET_HT_PHYMODE			        *pHTPhyMode = NULL;
+    HTTRANSMIT_SETTING	HTPhyMode;
+	
+
+#ifdef SNMP_SUPPORT	
+	/*for snmp, kathy */
+	DefaultKeyIdxValue			*pKeyIdxValue;
+	INT							valueLen;
+	TX_RTY_CFG_STRUC			tx_rty_cfg;
+	ULONG						ShortRetryLimit, LongRetryLimit;
+	UCHAR						tmp[64];
+#endif /*SNMP */
+
+
+
+
+    switch(cmd) 
+    {
+        case RT_OID_DEVICE_NAME:
+            wrq->u.data.length = sizeof(pAd->nickname);
+            Status = copy_to_user(wrq->u.data.pointer, pAd->nickname, wrq->u.data.length);
+            break;        
+        case RT_OID_VERSION_INFO:
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_VERSION_INFO \n"));
+			wrq->u.data.length = 8*sizeof(CHAR);
+			snprintf(&driverVersion[0], sizeof(driverVersion), "%s", STA_DRIVER_VERSION);
+			driverVersion[7] = '\0';
+			if (copy_to_user(wrq->u.data.pointer, &driverVersion[0], wrq->u.data.length))
+            {
+				Status = -EFAULT;
+            }
+            break;
+
+        case OID_802_11_BSSID_LIST:
+#ifdef WPA_SUPPLICANT_SUPPORT
+			if ((pAd->StaCfg.WpaSupplicantUP & 0x7F) == WPA_SUPPLICANT_ENABLE)
+			{
+				pAd->StaCfg.WpaSupplicantScanCount = 0;
+			}
+#endif /* WPA_SUPPLICANT_SUPPORT */
+            DBGPRINT(RT_DEBUG_TRACE, ("Query::OID_802_11_BSSID_LIST (%d BSS returned)\n",pAd->ScanTab.BssNr));
+			pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
+            /* Claculate total buffer size required */
+            BssBufSize = sizeof(ULONG);
+            
+            for (i = 0; i < pAd->ScanTab.BssNr; i++) 
+            {
+                /* Align pointer to 4 bytes boundary. */
+                /*Padding = 4 - (pAd->ScanTab.BssEntry[i].VarIELen & 0x0003); */
+                /*if (Padding == 4) */
+                /*    Padding = 0; */
+                BssBufSize += (sizeof(NDIS_WLAN_BSSID_EX) - 1 + sizeof(NDIS_802_11_FIXED_IEs) + pAd->ScanTab.BssEntry[i].VarIELen + Padding);
+            }
+
+            /* For safety issue, we add 256 bytes just in case */
+            BssBufSize += 256;
+            /* Allocate the same size as passed from higher layer */
+/*            pBuf = kmalloc(BssBufSize, MEM_ALLOC_FLAG); */
+			os_alloc_mem(pAd, (UCHAR **)&pBuf, BssBufSize);
+            if(pBuf == NULL)
+            {
+                Status = -ENOMEM;
+                break;
+            }
+
+            /* Init 802_11_BSSID_LIST_EX structure */
+            NdisZeroMemory(pBuf, BssBufSize);
+            pBssidList = (PNDIS_802_11_BSSID_LIST_EX) pBuf;
+            pBssidList->NumberOfItems = pAd->ScanTab.BssNr;
+            
+            /* Calculate total buffer length */
+            BssLen = 4; /* Consist of NumberOfItems */
+            /* Point to start of NDIS_WLAN_BSSID_EX */
+            /* pPtr = pBuf + sizeof(ULONG); */
+            pPtr = (PUCHAR) &pBssidList->Bssid[0];
+            for (i = 0; i < pAd->ScanTab.BssNr; i++) 
+            {
+                pBss = (PNDIS_WLAN_BSSID_EX) pPtr;
+                NdisMoveMemory(&pBss->MacAddress, &pAd->ScanTab.BssEntry[i].Bssid, MAC_ADDR_LEN);
+                if ((pAd->ScanTab.BssEntry[i].Hidden == 1) && (pAd->StaCfg.bShowHiddenSSID == FALSE))
+                {
+                    /* */
+					/* We must return this SSID during 4way handshaking, otherwise Aegis will failed to parse WPA infomation */
+					/* and then failed to send EAPOl farame. */
+					/* */
+					if ((pAd->StaCfg.AuthMode >= Ndis802_11AuthModeWPA) && (pAd->StaCfg.PortSecured != WPA_802_1X_PORT_SECURED))
+					{
+						pBss->Ssid.SsidLength = pAd->ScanTab.BssEntry[i].SsidLen;
+						NdisMoveMemory(pBss->Ssid.Ssid, pAd->ScanTab.BssEntry[i].Ssid, pAd->ScanTab.BssEntry[i].SsidLen);
+					}
+					else
+                    	pBss->Ssid.SsidLength = 0;
+                }
+                else
+                {
+                    pBss->Ssid.SsidLength = pAd->ScanTab.BssEntry[i].SsidLen;
+                    NdisMoveMemory(pBss->Ssid.Ssid, pAd->ScanTab.BssEntry[i].Ssid, pAd->ScanTab.BssEntry[i].SsidLen);
+                }
+                pBss->Privacy = pAd->ScanTab.BssEntry[i].Privacy;
+                pBss->Rssi = pAd->ScanTab.BssEntry[i].Rssi - pAd->BbpRssiToDbmDelta;
+				pBss->MinSNR = pAd->ScanTab.BssEntry[i].MinSNR;
+                pBss->NetworkTypeInUse = NetworkTypeInUseSanity(&pAd->ScanTab.BssEntry[i]);
+                pBss->Configuration.Length = sizeof(NDIS_802_11_CONFIGURATION);
+                pBss->Configuration.BeaconPeriod = pAd->ScanTab.BssEntry[i].BeaconPeriod;  
+                pBss->Configuration.ATIMWindow = pAd->ScanTab.BssEntry[i].AtimWin;
+				/*NdisMoveMemory(&pBss->QBssLoad, &pAd->ScanTab.BssEntry[i].QbssLoad, sizeof(QBSS_LOAD_UI)); */
+
+                MAP_CHANNEL_ID_TO_KHZ(pAd->ScanTab.BssEntry[i].Channel, pBss->Configuration.DSConfig);
+
+                if (pAd->ScanTab.BssEntry[i].BssType == BSS_INFRA) 
+                    pBss->InfrastructureMode = Ndis802_11Infrastructure;
+                else
+                    pBss->InfrastructureMode = Ndis802_11IBSS;
+
+                NdisMoveMemory(pBss->SupportedRates, pAd->ScanTab.BssEntry[i].SupRate, pAd->ScanTab.BssEntry[i].SupRateLen);
+                NdisMoveMemory(pBss->SupportedRates + pAd->ScanTab.BssEntry[i].SupRateLen,
+                               pAd->ScanTab.BssEntry[i].ExtRate,
+                               pAd->ScanTab.BssEntry[i].ExtRateLen);
+
+                if (pAd->ScanTab.BssEntry[i].VarIELen == 0)
+                {
+                    pBss->IELength = sizeof(NDIS_802_11_FIXED_IEs);
+                    NdisMoveMemory(pBss->IEs, &pAd->ScanTab.BssEntry[i].FixIEs, sizeof(NDIS_802_11_FIXED_IEs));
+                    pPtr = pPtr + sizeof(NDIS_WLAN_BSSID_EX) - 1 + sizeof(NDIS_802_11_FIXED_IEs);
+                }
+                else
+                {
+                    pBss->IELength = (ULONG)(sizeof(NDIS_802_11_FIXED_IEs) + pAd->ScanTab.BssEntry[i].VarIELen);
+                    pPtr = pPtr + sizeof(NDIS_WLAN_BSSID_EX) - 1 + sizeof(NDIS_802_11_FIXED_IEs);
+                    NdisMoveMemory(pBss->IEs, &pAd->ScanTab.BssEntry[i].FixIEs, sizeof(NDIS_802_11_FIXED_IEs));
+                    NdisMoveMemory(pBss->IEs + sizeof(NDIS_802_11_FIXED_IEs), pAd->ScanTab.BssEntry[i].VarIEs, pAd->ScanTab.BssEntry[i].VarIELen);
+                    pPtr += pAd->ScanTab.BssEntry[i].VarIELen;
+                }
+                pBss->Length = (ULONG)(sizeof(NDIS_WLAN_BSSID_EX) - 1 + sizeof(NDIS_802_11_FIXED_IEs) + pAd->ScanTab.BssEntry[i].VarIELen + Padding);
+
+				if (RtmpOsWirelessExtVerGet() < 17)
+				{
+	                if ((BssLen + pBss->Length) < wrq->u.data.length)
+						BssLen += pBss->Length;
+	                else
+	                {
+	                    pBssidList->NumberOfItems = i;
+	                    break;
+	                }
+				}
+				else
+					BssLen += pBss->Length;
+
+            }
+
+			if (RtmpOsWirelessExtVerGet() < 17)
+				wrq->u.data.length = BssLen;
+			else
+			{
+	            if (BssLen > wrq->u.data.length)
+	            {
+/*                kfree(pBssidList); */
+					os_free_mem(NULL, pBssidList);
+	                return -E2BIG;
+	            }
+	            else
+	                wrq->u.data.length = BssLen;
+			}
+
+            Status = copy_to_user(wrq->u.data.pointer, pBssidList, BssLen);
+/*            kfree(pBssidList); */
+			os_free_mem(NULL, pBssidList);
+            break;
+        case OID_802_3_CURRENT_ADDRESS:
+            wrq->u.data.length = MAC_ADDR_LEN;
+            Status = copy_to_user(wrq->u.data.pointer, &pAd->CurrentAddress, wrq->u.data.length);
+            break;
+        case OID_GEN_MEDIA_CONNECT_STATUS:
+            if (pAd->IndicateMediaState == NdisMediaStateConnected)
+                MediaState = NdisMediaStateConnected;
+            else
+                MediaState = NdisMediaStateDisconnected;
+                
+            wrq->u.data.length = sizeof(NDIS_MEDIA_STATE);
+            Status = copy_to_user(wrq->u.data.pointer, &MediaState, wrq->u.data.length);
+            break;   
+        case OID_802_11_BSSID:
+            if (INFRA_ON(pAd) || ADHOC_ON(pAd))
+            {
+                Status = copy_to_user(wrq->u.data.pointer, &pAd->CommonCfg.Bssid, sizeof(NDIS_802_11_MAC_ADDRESS));
+
+            }
+            else
+            {
+                DBGPRINT(RT_DEBUG_TRACE, ("Query::OID_802_11_BSSID(=EMPTY)\n"));
+                Status = -ENOTCONN;
+            }
+            break;
+        case OID_802_11_SSID:
+			NdisZeroMemory(&Ssid, sizeof(NDIS_802_11_SSID));
+			NdisZeroMemory(Ssid.Ssid, MAX_LEN_OF_SSID);
+            Ssid.SsidLength = pAd->CommonCfg.SsidLen;
+			memcpy(Ssid.Ssid, pAd->CommonCfg.Ssid,	Ssid.SsidLength);
+            wrq->u.data.length = sizeof(NDIS_802_11_SSID);
+            Status = copy_to_user(wrq->u.data.pointer, &Ssid, wrq->u.data.length);
+            DBGPRINT(RT_DEBUG_TRACE, ("Query::OID_802_11_SSID (Len=%d, ssid=%s)\n", Ssid.SsidLength,Ssid.Ssid));
+            break;
+        case RT_OID_802_11_QUERY_LINK_STATUS:
+/*            pLinkStatus = (RT_802_11_LINK_STATUS *) kmalloc(sizeof(RT_802_11_LINK_STATUS), MEM_ALLOC_FLAG); */
+			os_alloc_mem(pAd, (UCHAR **)&pLinkStatus, sizeof(RT_802_11_LINK_STATUS));
+            if (pLinkStatus)
+            {
+                pLinkStatus->CurrTxRate = RateIdTo500Kbps[pAd->CommonCfg.TxRate];   /* unit : 500 kbps */
+                pLinkStatus->ChannelQuality = pAd->Mlme.ChannelQuality;
+                pLinkStatus->RxByteCount = pAd->RalinkCounters.ReceivedByteCount;
+                pLinkStatus->TxByteCount = pAd->RalinkCounters.TransmittedByteCount;
+        		pLinkStatus->CentralChannel = pAd->CommonCfg.CentralChannel;
+                wrq->u.data.length = sizeof(RT_802_11_LINK_STATUS);
+                Status = copy_to_user(wrq->u.data.pointer, pLinkStatus, wrq->u.data.length);
+/*                kfree(pLinkStatus); */
+				os_free_mem(NULL, pLinkStatus);
+                DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_QUERY_LINK_STATUS\n"));
+            }
+            else
+            {
+                DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_QUERY_LINK_STATUS(kmalloc failed)\n"));
+                Status = -EFAULT;
+            }
+            break;
+        case OID_802_11_CONFIGURATION:
+/*            pConfiguration = (NDIS_802_11_CONFIGURATION *) kmalloc(sizeof(NDIS_802_11_CONFIGURATION), MEM_ALLOC_FLAG); */
+			os_alloc_mem(pAd, (UCHAR **)&pConfiguration, sizeof(NDIS_802_11_CONFIGURATION));
+            if (pConfiguration)
+            {
+                pConfiguration->Length = sizeof(NDIS_802_11_CONFIGURATION);
+                pConfiguration->BeaconPeriod = pAd->CommonCfg.BeaconPeriod;
+                pConfiguration->ATIMWindow = pAd->StaActive.AtimWin;
+                MAP_CHANNEL_ID_TO_KHZ(pAd->CommonCfg.Channel, pConfiguration->DSConfig);
+                wrq->u.data.length = sizeof(NDIS_802_11_CONFIGURATION);
+                Status = copy_to_user(wrq->u.data.pointer, pConfiguration, wrq->u.data.length);
+                DBGPRINT(RT_DEBUG_TRACE, ("Query::OID_802_11_CONFIGURATION(BeaconPeriod=%ld,AtimW=%ld,Channel=%d) \n", 
+                                        pConfiguration->BeaconPeriod, pConfiguration->ATIMWindow, pAd->CommonCfg.Channel));
+/*				kfree(pConfiguration); */
+				os_free_mem(NULL, pConfiguration);
+            }
+            else
+            {
+                DBGPRINT(RT_DEBUG_TRACE, ("Query::OID_802_11_CONFIGURATION(kmalloc failed)\n"));
+                Status = -EFAULT;
+            }
+            break;
+		case RT_OID_802_11_SNR_0:
+			if ((pAd->StaCfg.LastSNR0 > 0))
+			{
+				if (pAd->chipCap.SnrFormula == SNR_FORMULA2)
+				{
+					ulInfo = (pAd->StaCfg.LastSNR0 * 3 + 8) >> 4;
+				}
+				else
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+/* Maybe someday SNR_FORMULA3 should open to other chipsets. */
+				if (pAd->chipCap.SnrFormula == SNR_FORMULA3)
+				{
+					ulInfo = pAd->StaCfg.LastSNR0 * 3 / 16 ; /* * 0.1881 */
+				}
+				else					
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+				{
+					ulInfo = ((0xeb	- pAd->StaCfg.LastSNR0) * 3) /	16 ;
+				}
+				wrq->u.data.length = sizeof(ulInfo);
+				Status = copy_to_user(wrq->u.data.pointer, &ulInfo,	wrq->u.data.length);
+				DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_SNR_0(0x=%lx)\n", ulInfo));
+			}
+            else
+			    Status = -EFAULT;
+			break;
+		case RT_OID_802_11_SNR_1:
+			if ((pAd->Antenna.field.RxPath	> 1) && 
+                (pAd->StaCfg.LastSNR1 > 0))
+			{
+				if (pAd->chipCap.SnrFormula == SNR_FORMULA2)
+				{
+					ulInfo = (pAd->StaCfg.LastSNR1 * 3 + 8) >> 4;
+				}
+				else
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+/* Maybe someday SNR_FORMULA3 should open to other chipsets. */
+				if (pAd->chipCap.SnrFormula == SNR_FORMULA3)
+				{
+					ulInfo = pAd->StaCfg.LastSNR1 * 3 / 16 ; /* * 0.1881 */
+				}
+				else
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+				{
+					ulInfo = ((0xeb	- pAd->StaCfg.LastSNR1) * 3) /	16 ;
+				}
+				wrq->u.data.length = sizeof(ulInfo);
+				Status = copy_to_user(wrq->u.data.pointer, &ulInfo,	wrq->u.data.length);
+				DBGPRINT(RT_DEBUG_TRACE,("Query::RT_OID_802_11_SNR_1(0x=%lx)\n",ulInfo));
+			}
+			else
+				Status = -EFAULT;
+            DBGPRINT(RT_DEBUG_TRACE,("Query::RT_OID_802_11_SNR_1(pAd->StaCfg.LastSNR1=%d)\n",pAd->StaCfg.LastSNR1));
+			break;
+
+
+
+        case OID_802_11_RSSI_TRIGGER:
+            ulInfo = pAd->StaCfg.RssiSample.LastRssi0 - pAd->BbpRssiToDbmDelta;
+            wrq->u.data.length = sizeof(ulInfo);
+            Status = copy_to_user(wrq->u.data.pointer, &ulInfo, wrq->u.data.length);
+            DBGPRINT(RT_DEBUG_TRACE, ("Query::OID_802_11_RSSI_TRIGGER(=%ld)\n", ulInfo));
+            break;
+		case OID_802_11_RSSI:
+        case RT_OID_802_11_RSSI:
+			ulInfo = pAd->StaCfg.RssiSample.LastRssi0;
+			wrq->u.data.length = sizeof(ulInfo);
+			Status = copy_to_user(wrq->u.data.pointer, &ulInfo,	wrq->u.data.length);
+			break;
+		case RT_OID_802_11_RSSI_1:
+            ulInfo = pAd->StaCfg.RssiSample.LastRssi1;
+			wrq->u.data.length = sizeof(ulInfo);
+			Status = copy_to_user(wrq->u.data.pointer, &ulInfo,	wrq->u.data.length);
+			break;
+        case RT_OID_802_11_RSSI_2:
+            ulInfo = pAd->StaCfg.RssiSample.LastRssi2;
+			wrq->u.data.length = sizeof(ulInfo);
+			Status = copy_to_user(wrq->u.data.pointer, &ulInfo,	wrq->u.data.length);
+			break;
+        case OID_802_11_STATISTICS:
+/*            pStatistics = (NDIS_802_11_STATISTICS *) kmalloc(sizeof(NDIS_802_11_STATISTICS), MEM_ALLOC_FLAG); */
+			os_alloc_mem(pAd, (UCHAR **)&pStatistics, sizeof(NDIS_802_11_STATISTICS));
+            if (pStatistics)
+            {
+                DBGPRINT(RT_DEBUG_TRACE, ("Query::OID_802_11_STATISTICS \n"));
+                /* add the most up-to-date h/w raw counters into software counters */
+			    NICUpdateRawCounters(pAd);
+                
+                /* Sanity check for calculation of sucessful count */
+                if (pAd->WlanCounters.TransmittedFragmentCount.QuadPart < pAd->WlanCounters.RetryCount.QuadPart)
+                    pAd->WlanCounters.TransmittedFragmentCount.QuadPart = pAd->WlanCounters.RetryCount.QuadPart;
+
+                pStatistics->TransmittedFragmentCount.QuadPart = pAd->WlanCounters.TransmittedFragmentCount.QuadPart;
+                pStatistics->MulticastTransmittedFrameCount.QuadPart = pAd->WlanCounters.MulticastTransmittedFrameCount.QuadPart;
+                pStatistics->FailedCount.QuadPart = pAd->WlanCounters.FailedCount.QuadPart;
+                pStatistics->RetryCount.QuadPart = pAd->WlanCounters.RetryCount.QuadPart;
+                pStatistics->MultipleRetryCount.QuadPart = pAd->WlanCounters.MultipleRetryCount.QuadPart;
+                pStatistics->RTSSuccessCount.QuadPart = pAd->WlanCounters.RTSSuccessCount.QuadPart;
+                pStatistics->RTSFailureCount.QuadPart = pAd->WlanCounters.RTSFailureCount.QuadPart;
+                pStatistics->ACKFailureCount.QuadPart = pAd->WlanCounters.ACKFailureCount.QuadPart;
+                pStatistics->FrameDuplicateCount.QuadPart = pAd->WlanCounters.FrameDuplicateCount.QuadPart;
+                pStatistics->ReceivedFragmentCount.QuadPart = pAd->WlanCounters.ReceivedFragmentCount.QuadPart;
+                pStatistics->MulticastReceivedFrameCount.QuadPart = pAd->WlanCounters.MulticastReceivedFrameCount.QuadPart;
+#ifdef DBG	
+                pStatistics->FCSErrorCount = pAd->RalinkCounters.RealFcsErrCount;
+#else
+                pStatistics->FCSErrorCount.QuadPart = pAd->WlanCounters.FCSErrorCount.QuadPart;
+                pStatistics->FrameDuplicateCount.u.LowPart = pAd->WlanCounters.FrameDuplicateCount.u.LowPart / 100;
+#endif
+                wrq->u.data.length = sizeof(NDIS_802_11_STATISTICS);
+                Status = copy_to_user(wrq->u.data.pointer, pStatistics, wrq->u.data.length);
+/*                kfree(pStatistics); */
+				os_free_mem(NULL, pStatistics);
+            }
+            else
+            {
+                DBGPRINT(RT_DEBUG_TRACE, ("Query::OID_802_11_STATISTICS(kmalloc failed)\n"));
+                Status = -EFAULT;
+            }
+            break;
+        case OID_GEN_RCV_OK:
+            ulInfo = pAd->Counters8023.GoodReceives;
+            wrq->u.data.length = sizeof(ulInfo);
+            Status = copy_to_user(wrq->u.data.pointer, &ulInfo, wrq->u.data.length);
+            break;
+        case OID_GEN_RCV_NO_BUFFER:
+            ulInfo = pAd->Counters8023.RxNoBuffer;
+            wrq->u.data.length = sizeof(ulInfo);
+            Status = copy_to_user(wrq->u.data.pointer, &ulInfo, wrq->u.data.length);
+            break;
+        case RT_OID_802_11_PHY_MODE:
+            ulInfo = (ULONG)pAd->CommonCfg.PhyMode;
+            wrq->u.data.length = sizeof(ulInfo);
+            Status = copy_to_user(wrq->u.data.pointer, &ulInfo, wrq->u.data.length);
+            DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_PHY_MODE (=%ld)\n", ulInfo));
+            break;
+        case RT_OID_802_11_STA_CONFIG:
+/*            pStaConfig = (RT_802_11_STA_CONFIG *) kmalloc(sizeof(RT_802_11_STA_CONFIG), MEM_ALLOC_FLAG); */
+			os_alloc_mem(pAd, (UCHAR **)&pStaConfig, sizeof(RT_802_11_STA_CONFIG));
+            if (pStaConfig)
+            {
+                DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_STA_CONFIG\n"));
+                pStaConfig->EnableTxBurst = pAd->CommonCfg.bEnableTxBurst;
+                pStaConfig->EnableTurboRate = 0;
+                pStaConfig->UseBGProtection = pAd->CommonCfg.UseBGProtection;
+                pStaConfig->UseShortSlotTime = pAd->CommonCfg.bUseShortSlotTime;
+                /*pStaConfig->AdhocMode = pAd->StaCfg.AdhocMode; */
+                pStaConfig->HwRadioStatus = (pAd->StaCfg.bHwRadio == TRUE) ? 1 : 0;
+                pStaConfig->Rsv1 = 0;
+                pStaConfig->SystemErrorBitmap = pAd->SystemErrorBitmap;
+                wrq->u.data.length = sizeof(RT_802_11_STA_CONFIG);
+                Status = copy_to_user(wrq->u.data.pointer, pStaConfig, wrq->u.data.length);
+/*                kfree(pStaConfig); */
+				os_free_mem(NULL, pStaConfig);
+            }
+            else
+            {
+                DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_STA_CONFIG(kmalloc failed)\n"));
+                Status = -EFAULT;
+            }
+            break;
+        case OID_802_11_RTS_THRESHOLD:
+            RtsThresh = pAd->CommonCfg.RtsThreshold;
+            wrq->u.data.length = sizeof(RtsThresh);
+            Status = copy_to_user(wrq->u.data.pointer, &RtsThresh, wrq->u.data.length);
+            DBGPRINT(RT_DEBUG_TRACE, ("Query::OID_802_11_RTS_THRESHOLD(=%ld)\n", RtsThresh));
+            break;
+        case OID_802_11_FRAGMENTATION_THRESHOLD:
+            FragThresh = pAd->CommonCfg.FragmentThreshold;
+            if (pAd->CommonCfg.bUseZeroToDisableFragment == TRUE)
+                FragThresh = 0;
+            wrq->u.data.length = sizeof(FragThresh);
+            Status = copy_to_user(wrq->u.data.pointer, &FragThresh, wrq->u.data.length);
+            DBGPRINT(RT_DEBUG_TRACE, ("Query::OID_802_11_FRAGMENTATION_THRESHOLD(=%ld)\n", FragThresh));
+            break;
+        case OID_802_11_POWER_MODE:
+            PowerMode = pAd->StaCfg.WindowsPowerMode;
+            wrq->u.data.length = sizeof(PowerMode);
+            Status = copy_to_user(wrq->u.data.pointer, &PowerMode, wrq->u.data.length);
+            DBGPRINT(RT_DEBUG_TRACE, ("Query::OID_802_11_POWER_MODE(=%d)\n", PowerMode));
+            break;
+        case RT_OID_802_11_RADIO:
+            RadioState = (BOOLEAN) pAd->StaCfg.bSwRadio;
+            wrq->u.data.length = sizeof(RadioState);
+            Status = copy_to_user(wrq->u.data.pointer, &RadioState, wrq->u.data.length);
+            DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_QUERY_RADIO (=%d)\n", RadioState));
+            break;
+        case OID_802_11_INFRASTRUCTURE_MODE:
+            if (pAd->StaCfg.BssType == BSS_ADHOC)
+                BssType = Ndis802_11IBSS;
+            else if (pAd->StaCfg.BssType == BSS_INFRA)
+                BssType = Ndis802_11Infrastructure;
+            else if (pAd->StaCfg.BssType == BSS_MONITOR)
+                BssType = Ndis802_11Monitor;
+            else
+                BssType = Ndis802_11AutoUnknown;
+
+            wrq->u.data.length = sizeof(BssType);
+            Status = copy_to_user(wrq->u.data.pointer, &BssType, wrq->u.data.length);
+            DBGPRINT(RT_DEBUG_TRACE, ("Query::OID_802_11_INFRASTRUCTURE_MODE(=%d)\n", BssType));
+            break;
+        case RT_OID_802_11_PREAMBLE:
+            PreamType = pAd->CommonCfg.TxPreamble;
+            wrq->u.data.length = sizeof(PreamType);
+            Status = copy_to_user(wrq->u.data.pointer, &PreamType, wrq->u.data.length);
+            DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_PREAMBLE(=%d)\n", PreamType));
+            break;
+        case OID_802_11_AUTHENTICATION_MODE:
+            AuthMode = pAd->StaCfg.AuthMode;
+            wrq->u.data.length = sizeof(AuthMode);
+            Status = copy_to_user(wrq->u.data.pointer, &AuthMode, wrq->u.data.length);
+            DBGPRINT(RT_DEBUG_TRACE, ("Query::OID_802_11_AUTHENTICATION_MODE(=%d)\n", AuthMode));
+            break;
+        case OID_802_11_WEP_STATUS:
+            WepStatus = pAd->StaCfg.WepStatus;
+            wrq->u.data.length = sizeof(WepStatus);
+            Status = copy_to_user(wrq->u.data.pointer, &WepStatus, wrq->u.data.length);
+            DBGPRINT(RT_DEBUG_TRACE, ("Query::OID_802_11_WEP_STATUS(=%d)\n", WepStatus));
+            break;
+        case OID_802_11_TX_POWER_LEVEL:
+			wrq->u.data.length = sizeof(ULONG);
+			Status = copy_to_user(wrq->u.data.pointer, &pAd->CommonCfg.TxPower, wrq->u.data.length);
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::OID_802_11_TX_POWER_LEVEL %x\n",pAd->CommonCfg.TxPower));
+			break;
+        case RT_OID_802_11_TX_POWER_LEVEL_1:
+            wrq->u.data.length = sizeof(ULONG);
+            Status = copy_to_user(wrq->u.data.pointer, &pAd->CommonCfg.TxPowerPercentage, wrq->u.data.length);
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_TX_POWER_LEVEL_1 (=%ld)\n", pAd->CommonCfg.TxPowerPercentage));
+			break;
+        case OID_802_11_NETWORK_TYPES_SUPPORTED:
+			if ((pAd->RfIcType	== RFIC_2850) ||
+				(pAd->RfIcType ==	RFIC_2750) ||
+				(pAd->RfIcType == RFIC_3052) ||
+				(pAd->RfIcType == RFIC_3053) || 
+				(pAd->RfIcType == RFIC_2853) || 
+				(pAd->RfIcType == RFIC_3853))
+			{
+				NetworkTypeList[0] = 3;                 /* NumberOfItems = 3 */
+				NetworkTypeList[1] = Ndis802_11DS;      /* NetworkType[1] = 11b */
+				NetworkTypeList[2] = Ndis802_11OFDM24;  /* NetworkType[2] = 11g */
+				NetworkTypeList[3] = Ndis802_11OFDM5;   /* NetworkType[3] = 11a */
+                wrq->u.data.length = 16;
+				Status = copy_to_user(wrq->u.data.pointer, &NetworkTypeList[0], wrq->u.data.length);
+			}
+			else
+			{
+				NetworkTypeList[0] = 2;                 /* NumberOfItems = 2 */
+				NetworkTypeList[1] = Ndis802_11DS;      /* NetworkType[1] = 11b */
+				NetworkTypeList[2] = Ndis802_11OFDM24;  /* NetworkType[2] = 11g */
+			    wrq->u.data.length = 12;
+				Status = copy_to_user(wrq->u.data.pointer, &NetworkTypeList[0], wrq->u.data.length);
+			}
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::OID_802_11_NETWORK_TYPES_SUPPORTED\n"));
+				break;
+	    case OID_802_11_NETWORK_TYPE_IN_USE:
+            wrq->u.data.length = sizeof(ULONG);
+			if (pAd->CommonCfg.PhyMode == PHY_11A)
+				ulInfo = Ndis802_11OFDM5;
+			else if ((pAd->CommonCfg.PhyMode == PHY_11BG_MIXED) || (pAd->CommonCfg.PhyMode == PHY_11G))
+				ulInfo = Ndis802_11OFDM24;
+			else
+				ulInfo = Ndis802_11DS;
+            Status = copy_to_user(wrq->u.data.pointer, &ulInfo, wrq->u.data.length);
+			break;
+        	case RT_OID_802_11_QUERY_LAST_RX_RATE:
+            		ulInfo = (ULONG)pAd->LastRxRate;
+            		wrq->u.data.length = sizeof(ulInfo);
+			Status = copy_to_user(wrq->u.data.pointer, &ulInfo, wrq->u.data.length);
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_QUERY_LAST_RX_RATE (=%ld)\n", ulInfo));
+			break;
+		case RT_OID_802_11_QUERY_LAST_TX_RATE:
+			ulInfo = (ULONG)pAd->LastTxRate;
+			wrq->u.data.length = sizeof(ulInfo);
+			Status = copy_to_user(wrq->u.data.pointer, &ulInfo, wrq->u.data.length);
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_QUERY_LAST_TX_RATE (=%lx)\n", ulInfo));
+			break;
+        		case RT_OID_802_11_QUERY_MAP_REAL_RX_RATE:
+			RateValue=0;
+			HTPhyMode.word =(USHORT) pAd->LastRxRate;
+			getRate(HTPhyMode, &RateValue);
+			wrq->u.data.length = sizeof(RateValue);
+			Status = copy_to_user(wrq->u.data.pointer, &RateValue, wrq->u.data.length);
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_QUERY_LAST_RX_RATE (=%ld)\n", RateValue));
+			break;
+		case RT_OID_802_11_QUERY_MAP_REAL_TX_RATE:
+			RateValue=0;
+			HTPhyMode.word = (USHORT)pAd->LastTxRate;
+			getRate(HTPhyMode, &RateValue);
+			wrq->u.data.length = sizeof(RateValue);
+			Status = copy_to_user(wrq->u.data.pointer, &RateValue, wrq->u.data.length);
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_QUERY_LAST_TX_RATE (=%ld)\n", RateValue));
+			break;
+		case RT_OID_802_11_QUERY_TX_PHYMODE:
+			ulInfo = (ULONG)pAd->MacTab.Content[BSSID_WCID].HTPhyMode.word;
+			wrq->u.data.length = sizeof(ulInfo);
+			Status = copy_to_user(wrq->u.data.pointer, &ulInfo,	wrq->u.data.length);
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_QUERY_TX_PHYMODE (=%lx)\n", ulInfo));
+			break;
+        case RT_OID_802_11_QUERY_EEPROM_VERSION:
+            wrq->u.data.length = sizeof(ULONG);
+            Status = copy_to_user(wrq->u.data.pointer, &pAd->EepromVersion, wrq->u.data.length);
+            break;
+        case RT_OID_802_11_QUERY_FIRMWARE_VERSION:
+            wrq->u.data.length = sizeof(ULONG);
+            Status = copy_to_user(wrq->u.data.pointer, &pAd->FirmwareVersion, wrq->u.data.length);
+			break;
+	    case RT_OID_802_11_QUERY_NOISE_LEVEL:
+			wrq->u.data.length = sizeof(UCHAR);
+			Status = copy_to_user(wrq->u.data.pointer, &pAd->BbpWriteLatch[17], wrq->u.data.length);
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_QUERY_NOISE_LEVEL (=%d)\n", pAd->BbpWriteLatch[17]));
+			break;
+	    case RT_OID_802_11_EXTRA_INFO:
+			wrq->u.data.length = sizeof(ULONG);
+			Status = copy_to_user(wrq->u.data.pointer, &pAd->ExtraInfo, wrq->u.data.length);
+	        DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_EXTRA_INFO (=%ld)\n", pAd->ExtraInfo));
+	        break;
+	    case RT_OID_WE_VERSION_COMPILED:
+	        wrq->u.data.length = sizeof(UINT);
+	        we_version_compiled = RtmpOsWirelessExtVerGet();
+	        Status = copy_to_user(wrq->u.data.pointer, &we_version_compiled, wrq->u.data.length);
+	        break;
+		case RT_OID_802_11_QUERY_APSD_SETTING:
+			apsd = (pAd->CommonCfg.bAPSDCapable | (pAd->CommonCfg.bAPSDAC_BE << 1) | (pAd->CommonCfg.bAPSDAC_BK << 2)
+				| (pAd->CommonCfg.bAPSDAC_VI << 3)	| (pAd->CommonCfg.bAPSDAC_VO << 4)	| (pAd->CommonCfg.MaxSPLength << 5));
+
+			wrq->u.data.length = sizeof(ULONG);
+			Status = copy_to_user(wrq->u.data.pointer, &apsd, wrq->u.data.length);
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_QUERY_APSD_SETTING (=0x%lx,APSDCap=%d,AC_BE=%d,AC_BK=%d,AC_VI=%d,AC_VO=%d,MAXSPLen=%d)\n", 
+				apsd,pAd->CommonCfg.bAPSDCapable,pAd->CommonCfg.bAPSDAC_BE,pAd->CommonCfg.bAPSDAC_BK,pAd->CommonCfg.bAPSDAC_VI,pAd->CommonCfg.bAPSDAC_VO,pAd->CommonCfg.MaxSPLength));
+			break;
+		case RT_OID_802_11_QUERY_APSD_PSM:
+			wrq->u.data.length = sizeof(ULONG);
+			Status = copy_to_user(wrq->u.data.pointer, &pAd->CommonCfg.bAPSDForcePowerSave, wrq->u.data.length);
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_QUERY_APSD_PSM (=%d)\n", pAd->CommonCfg.bAPSDForcePowerSave));			
+			break;
+		case RT_OID_802_11_QUERY_WMM:
+			wrq->u.data.length = sizeof(BOOLEAN);
+			Status = copy_to_user(wrq->u.data.pointer, &pAd->CommonCfg.bWmmCapable, wrq->u.data.length);
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_QUERY_WMM (=%d)\n",	pAd->CommonCfg.bWmmCapable));
+			break;
+
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+        case RT_OID_NEW_DRIVER:
+            {
+                UCHAR enabled = 1;
+    	        wrq->u.data.length = sizeof(UCHAR);
+    	        Status = copy_to_user(wrq->u.data.pointer, &enabled, wrq->u.data.length);
+                DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_NEW_DRIVER (=%d)\n", enabled));
+            }
+	        break;
+        case RT_OID_WPA_SUPPLICANT_SUPPORT:
+	        wrq->u.data.length = sizeof(UCHAR);
+	        Status = copy_to_user(wrq->u.data.pointer, &pAd->StaCfg.WpaSupplicantUP, wrq->u.data.length);
+            DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_WPA_SUPPLICANT_SUPPORT (=%d)\n", pAd->StaCfg.WpaSupplicantUP));
+	        break;
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+        case RT_OID_DRIVER_DEVICE_NAME:
+            DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_DRIVER_DEVICE_NAME \n"));
+			wrq->u.data.length = 16;
+			if (copy_to_user(wrq->u.data.pointer, pAd->StaCfg.dev_name, wrq->u.data.length))
+			{
+				Status = -EFAULT;
+			}
+            break;
+        case RT_OID_802_11_QUERY_HT_PHYMODE:
+/*            pHTPhyMode = (OID_SET_HT_PHYMODE *) kmalloc(sizeof(OID_SET_HT_PHYMODE), MEM_ALLOC_FLAG); */
+			os_alloc_mem(pAd, (UCHAR **)&pHTPhyMode, sizeof(OID_SET_HT_PHYMODE));
+            if (pHTPhyMode)
+            {           
+                pHTPhyMode->PhyMode = pAd->CommonCfg.PhyMode;
+    			pHTPhyMode->HtMode = (UCHAR)pAd->MacTab.Content[BSSID_WCID].HTPhyMode.field.MODE;
+    			pHTPhyMode->BW = (UCHAR)pAd->MacTab.Content[BSSID_WCID].HTPhyMode.field.BW;
+    			pHTPhyMode->MCS= (UCHAR)pAd->MacTab.Content[BSSID_WCID].HTPhyMode.field.MCS;
+    			pHTPhyMode->SHORTGI= (UCHAR)pAd->MacTab.Content[BSSID_WCID].HTPhyMode.field.ShortGI;
+    			pHTPhyMode->STBC= (UCHAR)pAd->MacTab.Content[BSSID_WCID].HTPhyMode.field.STBC;
+    	
+    			pHTPhyMode->ExtOffset = ((pAd->CommonCfg.CentralChannel < pAd->CommonCfg.Channel) ? (EXTCHA_BELOW) : (EXTCHA_ABOVE));
+                wrq->u.data.length = sizeof(OID_SET_HT_PHYMODE);
+                if (copy_to_user(wrq->u.data.pointer, pHTPhyMode, wrq->u.data.length))
+    			{
+    				Status = -EFAULT;
+    			}
+    			DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_QUERY_HT_PHYMODE (PhyMode = %d, MCS =%d, BW = %d, STBC = %d, ExtOffset=%d)\n",
+    				pHTPhyMode->HtMode, pHTPhyMode->MCS, pHTPhyMode->BW, pHTPhyMode->STBC, pHTPhyMode->ExtOffset));
+    			DBGPRINT(RT_DEBUG_TRACE, (" MlmeUpdateTxRates (.word = %x )\n", pAd->MacTab.Content[BSSID_WCID].HTPhyMode.word));
+/*				kfree(pHTPhyMode); */
+				os_free_mem(NULL, pHTPhyMode);
+            }
+            else
+            {
+                DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_STA_CONFIG(kmalloc failed)\n"));
+                Status = -EFAULT;
+            }
+            break;
+        case RT_OID_802_11_COUNTRY_REGION:
+            DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_COUNTRY_REGION \n"));
+			wrq->u.data.length = sizeof(ulInfo);
+            ulInfo = pAd->CommonCfg.CountryRegionForABand;
+            ulInfo = (ulInfo << 8)|(pAd->CommonCfg.CountryRegion);
+			if (copy_to_user(wrq->u.data.pointer, &ulInfo, wrq->u.data.length))
+            {
+				Status = -EFAULT;
+            }
+            break;
+        case RT_OID_802_11_QUERY_DAT_HT_PHYMODE:
+/*            pHTPhyMode = (OID_SET_HT_PHYMODE *) kmalloc(sizeof(OID_SET_HT_PHYMODE), MEM_ALLOC_FLAG); */
+			os_alloc_mem(pAd, (UCHAR **)&pHTPhyMode, sizeof(OID_SET_HT_PHYMODE));
+            if (pHTPhyMode)
+            {           
+                pHTPhyMode->PhyMode = pAd->CommonCfg.PhyMode;
+    			pHTPhyMode->HtMode = (UCHAR)pAd->CommonCfg.RegTransmitSetting.field.HTMODE;
+    			pHTPhyMode->BW = (UCHAR)pAd->CommonCfg.RegTransmitSetting.field.BW;
+    			pHTPhyMode->MCS= (UCHAR)pAd->StaCfg.DesiredTransmitSetting.field.MCS;
+    			pHTPhyMode->SHORTGI= (UCHAR)pAd->CommonCfg.RegTransmitSetting.field.ShortGI;
+    			pHTPhyMode->STBC= (UCHAR)pAd->CommonCfg.RegTransmitSetting.field.STBC;
+    	
+                wrq->u.data.length = sizeof(OID_SET_HT_PHYMODE);
+                if (copy_to_user(wrq->u.data.pointer, pHTPhyMode, wrq->u.data.length))
+    			{
+    				Status = -EFAULT;
+    			}
+    			DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_QUERY_HT_PHYMODE (PhyMode = %d, MCS =%d, BW = %d, STBC = %d, ExtOffset=%d)\n",
+    				pHTPhyMode->HtMode, pHTPhyMode->MCS, pHTPhyMode->BW, pHTPhyMode->STBC, pHTPhyMode->ExtOffset));
+    			DBGPRINT(RT_DEBUG_TRACE, (" MlmeUpdateTxRates (.word = %x )\n", pAd->MacTab.Content[BSSID_WCID].HTPhyMode.word));
+/*				kfree(pHTPhyMode); */
+				os_free_mem(NULL, pHTPhyMode);
+            }
+            else
+            {
+                DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_STA_CONFIG(kmalloc failed)\n"));
+                Status = -EFAULT;
+            }
+            break;
+        case RT_OID_QUERY_MULTIPLE_CARD_SUPPORT:            
+			wrq->u.data.length = sizeof(UCHAR);
+            i = 0;
+#ifdef MULTIPLE_CARD_SUPPORT
+            i = 1;
+#endif /* MULTIPLE_CARD_SUPPORT */
+			if (copy_to_user(wrq->u.data.pointer, &i, wrq->u.data.length))
+            {
+				Status = -EFAULT;
+            }
+            DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_QUERY_MULTIPLE_CARD_SUPPORT(=%d) \n", i));
+            break;
+#ifdef SNMP_SUPPORT
+		case RT_OID_802_11_MAC_ADDRESS:
+            wrq->u.data.length = MAC_ADDR_LEN;
+            Status = copy_to_user(wrq->u.data.pointer, &pAd->CurrentAddress, wrq->u.data.length);
+			break;
+
+		case RT_OID_802_11_MANUFACTUREROUI:
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_MANUFACTUREROUI \n"));
+			wrq->u.data.length = ManufacturerOUI_LEN;
+			Status = copy_to_user(wrq->u.data.pointer, &pAd->CurrentAddress, wrq->u.data.length);
+			break;
+
+		case RT_OID_802_11_MANUFACTURERNAME:
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_MANUFACTURERNAME \n"));
+			wrq->u.data.length = strlen(ManufacturerNAME);
+			Status = copy_to_user(wrq->u.data.pointer, ManufacturerNAME, wrq->u.data.length);
+			break;
+
+		case RT_OID_802_11_RESOURCETYPEIDNAME:
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_RESOURCETYPEIDNAME \n"));
+			wrq->u.data.length = strlen(ResourceTypeIdName);
+			Status = copy_to_user(wrq->u.data.pointer, ResourceTypeIdName, wrq->u.data.length);
+			break;
+
+		case RT_OID_802_11_PRIVACYOPTIONIMPLEMENTED:
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_PRIVACYOPTIONIMPLEMENTED \n"));
+			ulInfo = 1; /* 1 is support wep else 2 is not support. */
+			wrq->u.data.length = sizeof(ulInfo);
+			Status = copy_to_user(wrq->u.data.pointer, &ulInfo, wrq->u.data.length);
+			break;
+
+		case RT_OID_802_11_POWERMANAGEMENTMODE:
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_POWERMANAGEMENTMODE \n"));
+			if (pAd->StaCfg.Psm == PSMP_ACTION)
+				ulInfo = 1; /* 1 is power active else 2 is power save. */
+			else
+				ulInfo = 2;
+			
+			wrq->u.data.length = sizeof(ulInfo);
+			Status = copy_to_user(wrq->u.data.pointer, &ulInfo, wrq->u.data.length);
+			break;
+
+		case OID_802_11_WEPDEFAULTKEYVALUE:
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::OID_802_11_WEPDEFAULTKEYVALUE \n"));
+			/*KeyIdxValue.KeyIdx = pAd->PortCfg.MBSSID[pAd->IoctlIF].DefaultKeyId; */
+			pKeyIdxValue = wrq->u.data.pointer;
+			DBGPRINT(RT_DEBUG_TRACE,("KeyIdxValue.KeyIdx = %d, \n",pKeyIdxValue->KeyIdx));
+			valueLen = pAd->SharedKey[BSS0][pAd->StaCfg.DefaultKeyId].KeyLen;
+			NdisMoveMemory(pKeyIdxValue->Value,
+						   &pAd->SharedKey[BSS0][pAd->StaCfg.DefaultKeyId].Key,
+						   valueLen);
+			pKeyIdxValue->Value[valueLen]='\0';
+
+			wrq->u.data.length = sizeof(DefaultKeyIdxValue);
+
+			Status = copy_to_user(wrq->u.data.pointer, pKeyIdxValue, wrq->u.data.length);
+			DBGPRINT(RT_DEBUG_TRACE,("DefaultKeyId = %d, total len = %d, str len=%d, KeyValue= %02x %02x %02x %02x \n", 
+										pAd->StaCfg.DefaultKeyId, 
+										wrq->u.data.length, 
+										pAd->SharedKey[BSS0][pAd->StaCfg.DefaultKeyId].KeyLen,
+										pAd->SharedKey[BSS0][0].Key[0],
+										pAd->SharedKey[BSS0][1].Key[0],
+										pAd->SharedKey[BSS0][2].Key[0],
+										pAd->SharedKey[BSS0][3].Key[0]));
+			break;
+
+		case OID_802_11_WEPDEFAULTKEYID:
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_WEPDEFAULTKEYID \n"));
+			wrq->u.data.length = sizeof(UCHAR);
+			Status = copy_to_user(wrq->u.data.pointer, &pAd->StaCfg.DefaultKeyId, wrq->u.data.length);
+			DBGPRINT(RT_DEBUG_TRACE, ("DefaultKeyId =%d \n", pAd->StaCfg.DefaultKeyId));
+			break;
+
+		case RT_OID_802_11_WEPKEYMAPPINGLENGTH:
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_WEPKEYMAPPINGLENGTH \n"));
+			wrq->u.data.length = sizeof(UCHAR);
+			Status = copy_to_user(wrq->u.data.pointer,
+									&pAd->SharedKey[BSS0][pAd->StaCfg.DefaultKeyId].KeyLen,
+									wrq->u.data.length);
+			break;
+
+		case OID_802_11_SHORTRETRYLIMIT:
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::OID_802_11_SHORTRETRYLIMIT \n"));
+			wrq->u.data.length = sizeof(ULONG);
+			RTMP_IO_READ32(pAd, TX_RTY_CFG, &tx_rty_cfg.word);
+			ShortRetryLimit = tx_rty_cfg.field.ShortRtyLimit;
+			DBGPRINT(RT_DEBUG_TRACE, ("ShortRetryLimit =%ld,  tx_rty_cfg.field.ShortRetryLimit=%d\n", ShortRetryLimit, tx_rty_cfg.field.ShortRtyLimit));
+			Status = copy_to_user(wrq->u.data.pointer, &ShortRetryLimit, wrq->u.data.length);
+			break;
+
+		case OID_802_11_LONGRETRYLIMIT:
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::OID_802_11_LONGRETRYLIMIT \n"));
+			wrq->u.data.length = sizeof(ULONG);
+			RTMP_IO_READ32(pAd, TX_RTY_CFG, &tx_rty_cfg.word);
+			LongRetryLimit = tx_rty_cfg.field.LongRtyLimit;
+			DBGPRINT(RT_DEBUG_TRACE, ("LongRetryLimit =%ld,  tx_rty_cfg.field.LongRtyLimit=%d\n", LongRetryLimit, tx_rty_cfg.field.LongRtyLimit));
+			Status = copy_to_user(wrq->u.data.pointer, &LongRetryLimit, wrq->u.data.length);
+			break;
+			
+		case RT_OID_802_11_PRODUCTID:
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_PRODUCTID \n"));
+		
+#ifdef RTMP_MAC_USB
+			snprintf((PSTRING)tmp, sizeof(tmp), "%04x %04x\n", 
+						RtmpOsGetUsbDevVendorID(((POS_COOKIE)pAd->OS_Cookie)->pUsb_Dev),
+						RtmpOsGetUsbDevProductID(((POS_COOKIE)pAd->OS_Cookie)->pUsb_Dev));
+
+#endif /* RTMP_MAC_USB */
+			wrq->u.data.length = strlen((PSTRING)tmp);
+			Status = copy_to_user(wrq->u.data.pointer, tmp, wrq->u.data.length);
+			break;
+
+		case RT_OID_802_11_MANUFACTUREID:
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_MANUFACTUREID \n"));
+			wrq->u.data.length = strlen(ManufacturerNAME);
+			Status = copy_to_user(wrq->u.data.pointer, ManufacturerNAME, wrq->u.data.length);
+			break;
+
+		case OID_802_11_CURRENTCHANNEL:
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::OID_802_11_CURRENTCHANNEL \n"));
+			wrq->u.data.length = sizeof(UCHAR);
+			DBGPRINT(RT_DEBUG_TRACE, ("sizeof UCHAR=%d, channel=%d \n", sizeof(UCHAR), pAd->CommonCfg.Channel));
+			Status = copy_to_user(wrq->u.data.pointer, &pAd->CommonCfg.Channel, wrq->u.data.length);
+			DBGPRINT(RT_DEBUG_TRACE, ("Status=%d\n", Status));
+			break;
+#endif /*SNMP_SUPPORT */
+		
+		case OID_802_11_BUILD_CHANNEL_EX:
+			{
+				UCHAR value;
+				DBGPRINT(RT_DEBUG_TRACE, ("Query::OID_802_11_BUILD_CHANNEL_EX \n"));
+				wrq->u.data.length = sizeof(UCHAR);
+#ifdef EXT_BUILD_CHANNEL_LIST
+				DBGPRINT(RT_DEBUG_TRACE, ("Support EXT_BUILD_CHANNEL_LIST.\n"));
+				value = 1;
+#else
+				DBGPRINT(RT_DEBUG_TRACE, ("Doesn't support EXT_BUILD_CHANNEL_LIST.\n"));
+				value = 0;
+#endif /* EXT_BUILD_CHANNEL_LIST */
+				Status = copy_to_user(wrq->u.data.pointer, &value, 1);
+				DBGPRINT(RT_DEBUG_TRACE, ("Status=%d\n", Status));
+			}
+			break;
+
+		case OID_802_11_GET_CH_LIST:
+			{
+				PRT_CHANNEL_LIST_INFO pChListBuf;
+
+				DBGPRINT(RT_DEBUG_TRACE, ("Query::OID_802_11_GET_CH_LIST \n"));
+				if (pAd->ChannelListNum == 0)
+				{
+					wrq->u.data.length = 0;
+					break;
+				}
+
+/*				pChListBuf = (RT_CHANNEL_LIST_INFO *) kmalloc(sizeof(RT_CHANNEL_LIST_INFO), MEM_ALLOC_FLAG); */
+				os_alloc_mem(pAd, (UCHAR **)&pChListBuf, sizeof(RT_CHANNEL_LIST_INFO));
+				if (pChListBuf == NULL)
+				{
+					wrq->u.data.length = 0;
+					break;
+				}
+
+				pChListBuf->ChannelListNum = pAd->ChannelListNum;
+				for (i = 0; i < pChListBuf->ChannelListNum; i++)
+					pChListBuf->ChannelList[i] = pAd->ChannelList[i].Channel;
+
+				wrq->u.data.length = sizeof(RT_CHANNEL_LIST_INFO);
+				Status = copy_to_user(wrq->u.data.pointer, pChListBuf, sizeof(RT_CHANNEL_LIST_INFO));
+				DBGPRINT(RT_DEBUG_TRACE, ("Status=%d\n", Status));
+
+				if (pChListBuf)
+/*					kfree(pChListBuf); */
+					os_free_mem(NULL, pChListBuf);
+			}
+			break;
+
+		case OID_802_11_GET_COUNTRY_CODE:
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::OID_802_11_GET_COUNTRY_CODE \n"));
+			wrq->u.data.length = 2;
+			Status = copy_to_user(wrq->u.data.pointer, &pAd->CommonCfg.CountryCode, 2);
+			DBGPRINT(RT_DEBUG_TRACE, ("Status=%d\n", Status));
+			break;
+
+#ifdef EXT_BUILD_CHANNEL_LIST
+		case OID_802_11_GET_CHANNEL_GEOGRAPHY:
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::OID_802_11_GET_CHANNEL_GEOGRAPHY \n"));
+			wrq->u.data.length = 1;
+			Status = copy_to_user(wrq->u.data.pointer, &pAd->CommonCfg.Geography, 1);
+			DBGPRINT(RT_DEBUG_TRACE, ("Status=%d\n", Status));
+			break;			
+#endif /* EXT_BUILD_CHANNEL_LIST */
+
+
+
+#ifdef QOS_DLS_SUPPORT
+		case RT_OID_802_11_QUERY_DLS:
+			wrq->u.data.length = sizeof(BOOLEAN);
+			Status = copy_to_user(wrq->u.data.pointer, &pAd->CommonCfg.bDLSCapable, wrq->u.data.length);
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_QUERY_DLS(=%d)\n", pAd->CommonCfg.bDLSCapable));
+			break;
+
+		case RT_OID_802_11_QUERY_DLS_PARAM:
+			{
+				PRT_802_11_DLS_INFO	pDlsInfo;/* = kmalloc(sizeof(RT_802_11_DLS_INFO), GFP_ATOMIC); */
+				os_alloc_mem(pAd, (UCHAR **)&pDlsInfo, sizeof(RT_802_11_DLS_INFO));
+				if (pDlsInfo == NULL)
+					break;
+
+				for (i=0; i<MAX_NUM_OF_DLS_ENTRY; i++)
+				{
+					RTMPMoveMemory(&pDlsInfo->Entry[i], &pAd->StaCfg.DLSEntry[i], sizeof(RT_802_11_DLS_UI));
+				}
+
+				pDlsInfo->num = MAX_NUM_OF_DLS_ENTRY;
+				wrq->u.data.length = sizeof(RT_802_11_DLS_INFO);
+				Status = copy_to_user(wrq->u.data.pointer, pDlsInfo, wrq->u.data.length);
+				DBGPRINT(RT_DEBUG_TRACE, ("Query::RT_OID_802_11_QUERY_DLS_PARAM\n"));
+
+				if (pDlsInfo)
+/*					kfree(pDlsInfo); */
+					os_free_mem(NULL, pDlsInfo);
+			}
+			break;
+#endif /* QOS_DLS_SUPPORT */
+
+#ifdef XLINK_SUPPORT
+		case OID_802_11_SET_PSPXLINK_MODE:
+			wrq->u.data.length = sizeof(BOOLEAN);
+            Status = copy_to_user(wrq->u.data.pointer, &pAd->StaCfg.PSPXlink, wrq->u.data.length);
+			DBGPRINT(RT_DEBUG_TRACE, ("Query::OID_802_11_SET_PSPXLINK_MODE(=%d)\n", pAd->StaCfg.PSPXlink));
+			break;
+#endif /* XLINK_SUPPORT */
+
+
+
+
+    default:
+            DBGPRINT(RT_DEBUG_TRACE, ("Query::unknown IOCTL's subcmd = 0x%08x\n", cmd));
+            Status = -EOPNOTSUPP;
+            break;
+    }
+    return Status;
+}
+
+
+#ifdef DBG
+/* 
+    ==========================================================================
+    Description:
+        Read / Write MAC
+    Arguments:
+        pAd                    Pointer to our adapter
+        wrq                         Pointer to the ioctl argument
+
+    Return Value:
+        None
+
+    Note:
+        Usage: 
+               1.) iwpriv ra0 mac 0        ==> read MAC where Addr=0x0
+               2.) iwpriv ra0 mac 0=12     ==> write MAC where Addr=0x0, value=12
+    ==========================================================================
+*/
+VOID RTMPIoctlMAC(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq)
+{
+	PSTRING				this_char;
+	PSTRING				value;
+	INT					j = 0, k = 0;
+/*	STRING				msg[1024]; */
+	STRING				*msg = NULL;
+/*	STRING				arg[255]; */
+	STRING				*arg = NULL;
+	ULONG				macAddr = 0;
+	UCHAR				temp[16];
+	STRING				temp2[16];
+	UINT32				macValue = 0;
+	INT					Status;
+	BOOLEAN				bIsPrintAllMAC = FALSE;
+
+
+	/* allocate memory */
+	os_alloc_mem(NULL, (UCHAR **)&msg, sizeof(STRING)*1024);
+	if (msg == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+		goto LabelOK;
+	}
+	os_alloc_mem(NULL, (UCHAR **)&arg, sizeof(STRING)*255);
+	if (arg == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+		goto LabelOK;
+	}
+
+	memset(msg, 0x00, 1024);
+	memset(arg, 0x00, 255);
+	if (wrq->u.data.length > 1) /*No parameters. */
+	{   
+	    Status = copy_from_user(arg, wrq->u.data.pointer, (wrq->u.data.length > 255) ? 255 : wrq->u.data.length);
+		arg[254] = 0x00;
+		sprintf(msg, "\n");
+		
+		/*Parsing Read or Write */
+	    this_char = arg;
+		if (!*this_char)
+			goto next;
+
+		if ((value = rtstrchr(this_char, '=')) != NULL)
+			*value++ = 0;
+
+		if (!value || !*value)
+		{ /*Read */
+			/* Sanity check */
+			if(strlen(this_char) > 4)
+				goto next;
+
+			j = strlen(this_char);
+			while(j-- > 0)
+			{
+				if(this_char[j] > 'f' || this_char[j] < '0')
+					goto LabelOK;
+			}
+
+			/* Mac Addr */
+			k = j = strlen(this_char);
+			while(j-- > 0)
+			{
+				this_char[4-k+j] = this_char[j];
+			}
+			
+			while(k < 4)
+				this_char[3-k++]='0';
+			this_char[4]='\0';
+
+			if(strlen(this_char) == 4)
+			{
+				AtoH(this_char, temp, 2);
+				macAddr = *temp*256 + temp[1];					
+				if (macAddr < 0xFFFF)
+				{
+					RTMP_IO_READ32(pAd, macAddr, &macValue);
+					DBGPRINT(RT_DEBUG_TRACE, ("MacAddr=%lx, MacValue=%x\n", macAddr, macValue));
+					sprintf(msg+strlen(msg), "[0x%08lX]:%08X  ", macAddr , macValue);
+				}
+				else
+				{/*Invalid parametes, so default printk all mac */
+					bIsPrintAllMAC = TRUE;
+					goto next;
+				}
+			}
+		}
+		else
+		{ /*Write */
+			memcpy(&temp2, value, strlen(value));
+			temp2[strlen(value)] = '\0';
+
+			/* Sanity check */
+			if((strlen(this_char) > 4) || strlen(temp2) > 8)
+				goto next;
+
+			j = strlen(this_char);
+			while(j-- > 0)
+			{
+				if(this_char[j] > 'f' || this_char[j] < '0')
+					goto LabelOK;
+			}
+
+			j = strlen(temp2);
+			while(j-- > 0)
+			{
+				if(temp2[j] > 'f' || temp2[j] < '0')
+					goto LabelOK;
+			}
+
+			/*MAC Addr */
+			k = j = strlen(this_char);
+			while(j-- > 0)
+			{
+				this_char[4-k+j] = this_char[j];
+			}
+
+			while(k < 4)
+				this_char[3-k++]='0';
+			this_char[4]='\0';
+
+			/*MAC value */
+			k = j = strlen(temp2);
+			while(j-- > 0)
+			{
+				temp2[8-k+j] = temp2[j];
+			}
+			
+			while(k < 8)
+				temp2[7-k++]='0';
+			temp2[8]='\0';
+
+			{
+				AtoH(this_char, temp, 2);
+				macAddr = *temp*256 + temp[1];
+
+				AtoH(temp2, temp, 4);
+				macValue = *temp*256*256*256 + temp[1]*256*256 + temp[2]*256 + temp[3];
+
+				/* debug mode */
+				if (macAddr == (HW_DEBUG_SETTING_BASE + 4))
+				{
+					/* 0x2bf4: byte0 non-zero: enable R17 tuning, 0: disable R17 tuning */
+                    if (macValue & 0x000000ff) 
+                    {
+                        pAd->BbpTuning.bEnable = TRUE;
+                        DBGPRINT(RT_DEBUG_TRACE,("turn on R17 tuning\n"));
+                    }
+                    else
+                    {
+/*                        UCHAR R66; */
+                        pAd->BbpTuning.bEnable = FALSE;
+
+						RTMP_CHIP_RX_SENSITIVITY_TUNING(pAd);
+                    }
+					goto LabelOK;
+				}
+
+				DBGPRINT(RT_DEBUG_TRACE, ("MacAddr=%02lx, MacValue=0x%x\n", macAddr, macValue));
+				
+				RTMP_IO_WRITE32(pAd, macAddr, macValue);
+				sprintf(msg+strlen(msg), "[0x%08lX]:%08X  ", macAddr, macValue);
+			}
+		}
+	}
+	else
+		bIsPrintAllMAC = TRUE;
+next:
+	if (bIsPrintAllMAC)
+	{
+		UINT32 *pBufMac = NULL, *pBuf;
+		/* Note: AddrEnd must >= AddrStart */
+		UINT32 AddrStart = 0x1000, AddrEnd = 0x1800;
+		UINT32 IdAddr;
+
+		/* *2 for safe */
+		os_alloc_mem(NULL, (UCHAR **)&pBufMac, (AddrEnd - AddrStart)*2);
+		if (pBufMac != NULL)
+		{
+			pBuf = pBufMac;
+			for(IdAddr=AddrStart; IdAddr<=AddrEnd; IdAddr+=4, pBuf++)
+				RTMP_IO_READ32(pAd, IdAddr, pBuf);
+			RtmpDrvAllMacPrint(pAd, pBufMac, AddrStart, AddrEnd, 4);
+			os_free_mem(NULL, pBufMac);
+		}
+	}
+	if(strlen(msg) == 1)
+		sprintf(msg+strlen(msg), "===>Error command format!");
+
+	/* Copy the information into the user buffer */
+	wrq->u.data.length = strlen(msg);
+	Status = copy_to_user(wrq->u.data.pointer, msg, wrq->u.data.length);
+	
+LabelOK:
+	if (msg != NULL)
+		os_free_mem(NULL, msg);
+	if (arg != NULL)
+		os_free_mem(NULL, arg);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<==RTMPIoctlMAC\n\n"));
+	return;
+}
+
+/* 
+    ==========================================================================
+    Description:
+        Read / Write E2PROM
+    Arguments:
+        pAd                    Pointer to our adapter
+        wrq                         Pointer to the ioctl argument
+
+    Return Value:
+        None
+
+    Note:
+        Usage: 
+               1.) iwpriv ra0 e2p 0     	==> read E2PROM where Addr=0x0
+               2.) iwpriv ra0 e2p 0=1234    ==> write E2PROM where Addr=0x0, value=1234
+    ==========================================================================
+*/
+VOID RTMPIoctlE2PROM(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq)
+{
+	PSTRING				this_char;
+	PSTRING				value;
+	INT					j = 0, k = 0;
+/*	STRING				msg[1024]; */
+	STRING				*msg = NULL;
+/*	STRING				arg[255]; */
+	STRING				*arg = NULL;
+	USHORT				eepAddr = 0;
+	UCHAR				temp[16];
+	STRING				temp2[16];
+	USHORT				eepValue;
+	int					Status;
+	BOOLEAN				bIsPrintAllE2P = FALSE;
+
+
+	/* allocate memory */
+	os_alloc_mem(NULL, (UCHAR **)&msg, sizeof(STRING)*1024);
+	if (msg == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+		goto LabelOK;
+	}
+	os_alloc_mem(NULL, (UCHAR **)&arg, sizeof(STRING)*255);
+	if (arg == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+		goto LabelOK;
+	}
+
+	memset(msg, 0x00, 1024);
+	memset(arg, 0x00, 255);
+	if (wrq->u.data.length > 1) /*No parameters. */
+	{   
+	    Status = copy_from_user(arg, wrq->u.data.pointer, (wrq->u.data.length > 255) ? 255 : wrq->u.data.length);
+		sprintf(msg, "\n");
+		arg[254] = 0x00;
+
+	    /*Parsing Read or Write */
+		this_char = arg;
+		
+		
+		if (!*this_char)
+			goto next;
+
+		if ((value = rtstrchr(this_char, '=')) != NULL)
+			*value++ = 0;
+
+		if (!value || !*value)
+		{ /*Read */
+
+			/* Sanity check */
+			if(strlen(this_char) > 4)
+				goto next;
+
+			j = strlen(this_char);
+			while(j-- > 0)
+			{
+				if(this_char[j] > 'f' || this_char[j] < '0')
+					goto LabelOK;
+			}
+
+			/* E2PROM addr */
+			k = j = strlen(this_char);
+			while(j-- > 0)
+			{
+				this_char[4-k+j] = this_char[j];
+			}
+			
+			while(k < 4)
+				this_char[3-k++]='0';
+			this_char[4]='\0';
+
+			if(strlen(this_char) == 4)
+			{
+				AtoH(this_char, temp, 2);
+				eepAddr = *temp*256 + temp[1];					
+				if (eepAddr < 0xFFFF)
+				{
+					RT28xx_EEPROM_READ16(pAd, eepAddr, eepValue);
+					sprintf(msg+strlen(msg), "[0x%04X]:0x%04X  ", eepAddr , eepValue);
+				}
+				else
+				{/*Invalid parametes, so default printk all bbp */
+					bIsPrintAllE2P = TRUE;
+					goto next;
+				}
+			}
+		}
+		else
+		{ /*Write */
+			memcpy(&temp2, value, strlen(value));
+			temp2[strlen(value)] = '\0';
+
+			/* Sanity check */
+			if((strlen(this_char) > 4) || strlen(temp2) > 8)
+				goto next;
+
+			j = strlen(this_char);
+			while(j-- > 0)
+			{
+				if(this_char[j] > 'f' || this_char[j] < '0')
+					goto LabelOK;
+			}
+			j = strlen(temp2);
+			while(j-- > 0)
+			{
+				if(temp2[j] > 'f' || temp2[j] < '0')
+					goto LabelOK;
+			}
+
+			/*MAC Addr */
+			k = j = strlen(this_char);
+			while(j-- > 0)
+			{
+				this_char[4-k+j] = this_char[j];
+			}
+
+			while(k < 4)
+				this_char[3-k++]='0';
+			this_char[4]='\0';
+
+			/*MAC value */
+			k = j = strlen(temp2);
+			while(j-- > 0)
+			{
+				temp2[4-k+j] = temp2[j];
+			}
+			
+			while(k < 4)
+				temp2[3-k++]='0';
+			temp2[4]='\0';
+
+			AtoH(this_char, temp, 2);
+			eepAddr = *temp*256 + temp[1];
+
+			AtoH(temp2, temp, 2);
+			eepValue = *temp*256 + temp[1];
+
+			RT28xx_EEPROM_WRITE16(pAd, eepAddr, eepValue);
+			sprintf(msg+strlen(msg), "[0x%02X]:%02X  ", eepAddr, eepValue);
+		}
+	}
+	else
+		bIsPrintAllE2P = TRUE;
+next:
+	if (bIsPrintAllE2P)
+	{
+		USHORT *pMacContent, *pMacIndex;
+		UINT32 ContentLen;
+		UINT32 AddrEnd = 0xFE;
+
+
+		ContentLen = AddrEnd+2;
+		os_alloc_mem(NULL, (UCHAR **)&pMacContent, ContentLen);
+		if (pMacContent == NULL)
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("-->2) %s: Allocate memory fail!\n", __FUNCTION__));
+		}
+		else
+		{
+			/* get MAC content */
+			USHORT eepAddr = 0;
+			USHORT eepValue;
+
+			pMacIndex = pMacContent;
+			while(eepAddr <= AddrEnd)
+			{
+				RT28xx_EEPROM_READ16(pAd, eepAddr, eepValue);
+				*pMacIndex = eepValue;
+
+				pMacIndex ++;
+				eepAddr += 2;
+			}
+
+			/* print content to a file */
+			RtmpDrvAllE2PPrint(pAd, pMacContent, AddrEnd, 2);
+			os_free_mem(NULL, pMacContent);
+		}
+
+	}
+	if(strlen(msg) == 1)
+		sprintf(msg+strlen(msg), "===>Error command format!");
+
+
+	/* Copy the information into the user buffer */
+	wrq->u.data.length = strlen(msg);
+	Status = copy_to_user(wrq->u.data.pointer, msg, wrq->u.data.length);
+
+LabelOK:
+	if (msg != NULL)
+		os_free_mem(NULL, msg);
+	if (arg != NULL)
+		os_free_mem(NULL, arg);
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("<==RTMPIoctlE2PROM\n"));
+	return;
+}
+
+
+#ifdef RTMP_RF_RW_SUPPORT
+/* 
+    ==========================================================================
+    Description:
+        Read / Write RF register
+Arguments:
+    pAd                    Pointer to our adapter
+    wrq                         Pointer to the ioctl argument
+
+    Return Value:
+        None
+
+    Note:
+        Usage: 
+               1.) iwpriv ra0 rf                ==> read all RF registers
+               2.) iwpriv ra0 rf 1              ==> read RF where RegID=1
+               3.) iwpriv ra0 rf 1=10		    ==> write RF R1=0x10
+    ==========================================================================
+*/
+VOID RTMPIoctlRF(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq)
+{
+	CHAR				*this_char;
+	CHAR				*value;
+	UCHAR				regRF = 0;
+	CHAR				*mpool, *msg; /*msg[2048]; */
+	CHAR				*arg; /*arg[255]; */
+	CHAR				*ptr;
+	INT					rfId;
+	LONG				rfValue;
+	BOOLEAN				bIsPrintAllRF = FALSE;
+	int 				maxRFIdx;
+	
+
+	maxRFIdx = pAd->chipCap.MaxNumOfRfId;
+#if defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392)
+	if ( IS_RT5390(pAd))
+		maxRFIdx = 63;
+#endif /* defined(RT5370) || defined(RT5372) || defined(RT5390) || defined(RT5392) */
+
+
+/*	mpool = (CHAR *) kmalloc(sizeof(CHAR)*(2048+256+12), MEM_ALLOC_FLAG); */
+	os_alloc_mem(pAd, (UCHAR **)&mpool, sizeof(CHAR)*(2048+256+12));
+	if (mpool == NULL) {
+		return;
+	}
+
+	msg = (CHAR *)((ULONG)(mpool+3) & (ULONG)~0x03);
+	arg = (CHAR *)((ULONG)(msg+2048+3) & (ULONG)~0x03);
+
+	memset(msg, 0x00, 2048);
+	memset(arg, 0x00, 255);
+	if (wrq->u.data.length > 1) /*No parameters. */
+	{
+		NdisMoveMemory(arg, wrq->u.data.pointer, (wrq->u.data.length > 255) ? 255 : wrq->u.data.length);
+		arg[254] = 0x00;
+		ptr = arg;
+		sprintf(msg, "\n");
+	    /*Parsing Read or Write */
+		while ((this_char = strsep((char **)&ptr, ",")) != NULL)
+		{
+		if (!*this_char)
+			goto next;
+
+		if ((value = strchr(this_char,'=')) != NULL)
+			*value++ = 0;
+
+		if (!value || !*value)
+		{ /*Read */
+			if (sscanf((PSTRING) this_char, "%d", &(rfId)) == 1)
+			{
+					if (rfId <= maxRFIdx)
+				{
+					RT30xxReadRFRegister(pAd, rfId, &regRF);
+
+						sprintf(msg+strlen(msg), "R%02d:%02X  ", rfId, regRF);
+				}
+				else
+				{/*Invalid parametes, so default printk all RF */
+					bIsPrintAllRF = TRUE;
+					goto next;
+				}
+			}
+			else
+			{
+				/* Invalid parametes, so default printk all RF */
+				bIsPrintAllRF = TRUE;
+				goto next;
+			}
+		}
+		else
+		{ /*Write */
+				if ((sscanf((PSTRING)this_char, "%d", &(rfId)) == 1) && (sscanf(value, "%lx", &(rfValue)) == 1))
+			{
+					if (rfId <= maxRFIdx)
+						{
+							RT30xxReadRFRegister(pAd, rfId, &regRF);
+						RT30xxWriteRFRegister(pAd, rfId, rfValue);
+							/*Read it back for showing */
+							RT30xxReadRFRegister(pAd, rfId, &regRF);
+						sprintf(msg+strlen(msg), "R%02d:%02X\n", rfId, regRF);
+				                }
+				else
+					{
+					bIsPrintAllRF = TRUE;
+						break;
+				}
+			}
+			else
+				{
+				bIsPrintAllRF = TRUE;
+					break;
+				}
+			}
+		}
+	}
+	else
+		bIsPrintAllRF = TRUE;
+
+next:
+	/* Copy the information into the user buffer */
+	if (bIsPrintAllRF)
+	{
+		memset(msg, 0x00, 2048);
+		sprintf(msg, "\n");
+		for (rfId = 0; rfId <= maxRFIdx; rfId++)
+		{
+			RT30xxReadRFRegister(pAd, rfId, &regRF);
+			sprintf(msg+strlen(msg), "%03d = %02X\n", rfId, regRF);
+		}
+		wrq->u.data.length = strlen(msg);
+		if (copy_to_user(wrq->u.data.pointer, msg, wrq->u.data.length)) 
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: copy_to_user() fail\n", __FUNCTION__));			
+		}
+	}
+	else
+	{
+		if(strlen(msg) == 1)
+			sprintf(msg+strlen(msg), "===>Error command format!");
+
+		wrq->u.data.length = strlen(msg);
+		if (copy_to_user(wrq->u.data.pointer, msg, wrq->u.data.length))
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("%s: copy_to_user() fail\n", __FUNCTION__));			
+		}
+	}
+
+/*	kfree(mpool); */
+	os_free_mem(NULL, mpool);
+	DBGPRINT(RT_DEBUG_TRACE, ("<==RTMPIoctlRF\n\n"));
+}
+#endif /* RTMP_RF_RW_SUPPORT */
+#endif /* DBG */
+
+
+VOID RTMPIoctlBbp(
+	IN	PRTMP_ADAPTER	pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN	CHAR *extra,
+	IN	UINT32 size)
+{
+	PSTRING				this_char;
+	PSTRING				value = NULL;
+	UCHAR				regBBP = 0;
+/*	CHAR				arg[255]={0}; */
+	UINT32				bbpId;
+	UINT32				bbpValue;
+	BOOLEAN				bIsPrintAllBBP = FALSE;
+
+	if (wrq->u.data.length > 1) /*No parameters. */
+	{
+		sprintf(extra, "\n");
+					
+		/*Parsing Read or Write */
+		this_char = wrq->u.data.pointer;
+		DBGPRINT(RT_DEBUG_TRACE, ("this_char=%s\n", this_char));
+		if (!*this_char)                                                                            
+			goto next;
+
+		if ((value = rtstrchr(this_char, '=')) != NULL)
+			*value++ = 0;		
+		
+		if (!value || !*value)
+		{ /*Read */
+			DBGPRINT(RT_DEBUG_TRACE, ("this_char=%s, value=%s\n", this_char, value));
+			if (sscanf(this_char, "%d", &(bbpId)) == 1)                                             
+			{  
+				if (bbpId <= pAd->chipCap.MaxNumOfBbpId)
+				{                                                                                   
+#ifdef RALINK_ATE
+					if (ATE_ON(pAd))
+					{
+						ATE_BBP_IO_READ8_BY_REG_ID(pAd, bbpId, &regBBP);
+					}
+					else
+#endif /* RALINK_ATE */
+					{
+					RTMP_BBP_IO_READ8_BY_REG_ID(pAd, bbpId, &regBBP);                          
+					}
+					sprintf(extra+strlen(extra), "R%02d[0x%02X]:%02X\n", bbpId, bbpId, regBBP);
+                    wrq->u.data.length = strlen(extra) + 1; /* 1: size of '\0' */
+					DBGPRINT(RT_DEBUG_TRACE, ("msg=%s\n", extra));
+				}                                                                                   
+				else                                                                                
+				{/*Invalid parametes, so default printk all bbp */
+					bIsPrintAllBBP = TRUE;
+					goto next;                                                                          
+				}                                                                                   
+			}                                                                                       
+			else                                                                                    
+			{ /*Invalid parametes, so default printk all bbp */
+				bIsPrintAllBBP = TRUE;
+				goto next;                                                                              
+			}                                                                                       
+		}                                                                                           
+		else                                                                                        
+		{ /*Write */
+			if ((sscanf(this_char, "%d", &(bbpId)) == 1) && (sscanf(value, "%x", &(bbpValue)) == 1))
+			{
+				if (bbpId <= pAd->chipCap.MaxNumOfBbpId)
+				{                                                                                   
+#ifdef RALINK_ATE
+					if (ATE_ON(pAd))
+					{
+						ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, bbpId, bbpValue);          
+						/* read it back for showing */                                                      
+						ATE_BBP_IO_READ8_BY_REG_ID(pAd, bbpId, &regBBP);  
+					}
+					else
+#endif /* RALINK_ATE */
+					{
+					    RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, bbpId, bbpValue);          
+    					/* read it back for showing */                                                      
+    					RTMP_BBP_IO_READ8_BY_REG_ID(pAd, bbpId, &regBBP);                          
+			}
+					sprintf(extra+strlen(extra), "R%02d[0x%02X]:%02X\n", bbpId, bbpId, regBBP);
+                    wrq->u.data.length = strlen(extra) + 1; /* 1: size of '\0' */
+					DBGPRINT(RT_DEBUG_TRACE, ("msg=%s\n", extra));                                       
+				}                                                                                   
+				else                                                                                
+				{/*Invalid parametes, so default printk all bbp */
+					bIsPrintAllBBP = TRUE;                                                          
+					goto next;                                                                          
+				}                                                                                   
+			}                                                                                       
+			else                                                                                    
+			{ /*Invalid parametes, so default printk all bbp */
+				bIsPrintAllBBP = TRUE;                                                              
+				goto next;                                                                              
+			}                                                                                       
+		}                             
+		}
+	else
+		bIsPrintAllBBP = TRUE;
+
+next:    
+	if (bIsPrintAllBBP)
+	{   
+		memset(extra, 0x00, size);
+		sprintf(extra, "\n");
+		for (bbpId = 0; bbpId <= pAd->chipCap.MaxNumOfBbpId; bbpId++)
+		{
+		    if (strlen(extra) >= (size - 20))
+                break;
+#ifdef RALINK_ATE
+			if (ATE_ON(pAd))
+			{
+				ATE_BBP_IO_READ8_BY_REG_ID(pAd, bbpId, &regBBP); 
+			}
+			else
+#endif /* RALINK_ATE */
+			RTMP_BBP_IO_READ8_BY_REG_ID(pAd, bbpId, &regBBP);
+			/*sprintf(extra+strlen(extra), "R%02d[0x%02X]:%02X    ", bbpId, bbpId, regBBP);
+			if (bbpId%5 == 4)*/
+			sprintf(extra+strlen(extra), "%03d = %02X\n", bbpId, regBBP);  /* edit by johnli, change display format */
+		}
+		
+        wrq->u.data.length = strlen(extra) + 1; /* 1: size of '\0' */
+        DBGPRINT(RT_DEBUG_TRACE, ("wrq->length = %d\n", wrq->u.data.length));
+	}
+}
+
+
+
+
+#ifdef DOT11_N_SUPPORT
+void	getBaInfo(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PSTRING			pOutBuf,
+	IN	UINT32			size)
+{
+	INT i, j;
+	BA_ORI_ENTRY *pOriBAEntry;
+	BA_REC_ENTRY *pRecBAEntry;
+
+	for (i=0; i<MAX_LEN_OF_MAC_TABLE; i++)
+	{
+		PMAC_TABLE_ENTRY pEntry = &pAd->MacTab.Content[i];
+		if (((IS_ENTRY_CLIENT(pEntry) || IS_ENTRY_APCLI(pEntry) || IS_ENTRY_TDLS(pEntry)) && (pEntry->Sst == SST_ASSOC))
+			|| IS_ENTRY_WDS(pEntry) || IS_ENTRY_MESH(pEntry))
+		{		
+			sprintf(pOutBuf, "%s\n%02X:%02X:%02X:%02X:%02X:%02X (Aid = %d) (AP) -\n",
+                pOutBuf,
+				pEntry->Addr[0], pEntry->Addr[1], pEntry->Addr[2],
+				pEntry->Addr[3], pEntry->Addr[4], pEntry->Addr[5], pEntry->Aid);
+			
+			sprintf(pOutBuf, "%s[Recipient]\n", pOutBuf);
+			for (j=0; j < NUM_OF_TID; j++)
+			{
+				if (pEntry->BARecWcidArray[j] != 0)
+				{
+					pRecBAEntry =&pAd->BATable.BARecEntry[pEntry->BARecWcidArray[j]];
+					sprintf(pOutBuf, "%sTID=%d, BAWinSize=%d, LastIndSeq=%d, ReorderingPkts=%d\n", pOutBuf, j, pRecBAEntry->BAWinSize, pRecBAEntry->LastIndSeq, pRecBAEntry->list.qlen);
+				}
+			}
+			sprintf(pOutBuf, "%s\n", pOutBuf);
+
+			sprintf(pOutBuf, "%s[Originator]\n", pOutBuf);
+			for (j=0; j < NUM_OF_TID; j++)
+			{
+				if (pEntry->BAOriWcidArray[j] != 0)
+				{
+					pOriBAEntry =&pAd->BATable.BAOriEntry[pEntry->BAOriWcidArray[j]];
+					sprintf(pOutBuf, "%sTID=%d, BAWinSize=%d, StartSeq=%d, CurTxSeq=%d\n", pOutBuf, j, pOriBAEntry->BAWinSize, pOriBAEntry->Sequence, pEntry->TxSeq[j]);
+				}
+			}
+			sprintf(pOutBuf, "%s\n\n", pOutBuf);
+		}
+        if (strlen(pOutBuf) > (size - 30))
+                break;
+	}
+
+	return;
+}
+#endif /* DOT11_N_SUPPORT */
+
+
+VOID RTMPIoctlShow(
+	IN	PRTMP_ADAPTER			pAd,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*wrq,
+	IN	UINT32					subcmd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	RT_CMD_STA_IOCTL_SHOW *pIoctlShow = (RT_CMD_STA_IOCTL_SHOW *)pData;
+	POS_COOKIE pObj;
+	INT Status = 0;
+	char *extra = (char *)pIoctlShow->pData;
+	UINT32 size = (UINT32)(pIoctlShow->MaxSize);
+
+
+	pObj = (POS_COOKIE) pAd->OS_Cookie;
+
+	{
+		pObj->ioctl_if_type = INT_MAIN;
+		pObj->ioctl_if = MAIN_MBSSID;
+	}
+
+    switch(subcmd)
+    {
+
+        case SHOW_CONN_STATUS:
+            if (MONITOR_ON(pAd))
+            {
+#ifdef DOT11_N_SUPPORT
+                if (pAd->CommonCfg.PhyMode >= PHY_11ABGN_MIXED &&
+                    pAd->CommonCfg.RegTransmitSetting.field.BW)
+                    snprintf(extra, size, "Monitor Mode(CentralChannel %d)\n", pAd->CommonCfg.CentralChannel);
+                else
+#endif /* DOT11_N_SUPPORT */
+                    snprintf(extra, size, "Monitor Mode(Channel %d)\n", pAd->CommonCfg.Channel);
+            }
+            else
+            {
+                if (pAd->IndicateMediaState == NdisMediaStateConnected)
+            	{        	    
+            	    if (INFRA_ON(pAd))
+                    {   
+                    snprintf(extra, size, "Connected(AP: %s[%02X:%02X:%02X:%02X:%02X:%02X])\n", 
+                                    pAd->CommonCfg.Ssid, 
+                                    pAd->CommonCfg.Bssid[0],
+                                    pAd->CommonCfg.Bssid[1],
+                                    pAd->CommonCfg.Bssid[2],
+                                    pAd->CommonCfg.Bssid[3],
+                                    pAd->CommonCfg.Bssid[4],
+                                    pAd->CommonCfg.Bssid[5]);
+            		DBGPRINT(RT_DEBUG_TRACE ,("Ssid=%s ,Ssidlen = %d\n",pAd->CommonCfg.Ssid, pAd->CommonCfg.SsidLen));
+            	}
+                    else if (ADHOC_ON(pAd))
+                        snprintf(extra, size, "Connected\n");
+            	}
+            	else
+            	{
+            	    snprintf(extra, size, "Disconnected\n");
+            		DBGPRINT(RT_DEBUG_TRACE ,("ConnStatus is not connected\n"));
+            	}
+            }
+            wrq->u.data.length = strlen(extra) + 1; /* 1: size of '\0' */
+            break;
+        case SHOW_DRVIER_VERION:
+            snprintf(extra, size, "Driver version-%s, %s %s\n", STA_DRIVER_VERSION, __DATE__, __TIME__ );
+            wrq->u.data.length = strlen(extra) + 1; /* 1: size of '\0' */
+            break;
+#ifdef DOT11_N_SUPPORT
+        case SHOW_BA_INFO:
+            getBaInfo(pAd, extra, size);
+            wrq->u.data.length = strlen(extra) + 1; /* 1: size of '\0' */
+            break;
+#endif /* DOT11_N_SUPPORT */
+		case SHOW_DESC_INFO:
+			{
+				Show_DescInfo_Proc(pAd, NULL);
+				wrq->u.data.length = 0; /* 1: size of '\0' */
+			}
+			break;
+        case RAIO_OFF:
+			/* Link down first if any association exists*/
+			if (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))
+			{
+				if (INFRA_ON(pAd) || ADHOC_ON(pAd))
+				{
+					MLME_DISASSOC_REQ_STRUCT DisReq;
+					MLME_QUEUE_ELEM *pMsgElem;
+
+					os_alloc_mem(NULL, (UCHAR **)&pMsgElem, sizeof(MLME_QUEUE_ELEM));
+					if (pMsgElem)
+					{
+						COPY_MAC_ADDR(&DisReq.Addr, pAd->CommonCfg.Bssid);
+						DisReq.Reason =  REASON_DISASSOC_STA_LEAVING;
+
+						pMsgElem->Machine = ASSOC_STATE_MACHINE;
+						pMsgElem->MsgType = MT2_MLME_DISASSOC_REQ;
+						pMsgElem->MsgLen = sizeof(MLME_DISASSOC_REQ_STRUCT);
+						NdisMoveMemory(pMsgElem->Msg, &DisReq, sizeof(MLME_DISASSOC_REQ_STRUCT));
+					
+						MlmeDisassocReqAction(pAd, pMsgElem);
+						os_free_mem(NULL, pMsgElem);
+						
+						RTMPusecDelay(1000);
+					}
+				}
+			}
+
+            if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS))
+            {
+                if (pAd->Mlme.CntlMachine.CurrState != CNTL_IDLE)
+		        {
+		            RTMP_MLME_RESET_STATE_MACHINE(pAd);
+		            DBGPRINT(RT_DEBUG_TRACE, ("!!! MLME busy, reset MLME state machine !!!\n"));
+		        }
+            }
+            pAd->StaCfg.bSwRadio = FALSE;
+            if (pAd->StaCfg.bRadio != (pAd->StaCfg.bHwRadio && pAd->StaCfg.bSwRadio))
+            {
+                pAd->StaCfg.bRadio = (pAd->StaCfg.bHwRadio && pAd->StaCfg.bSwRadio);
+                if (pAd->StaCfg.bRadio == FALSE)
+                {
+                    MlmeRadioOff(pAd);
+                    /* Update extra information */
+					pAd->ExtraInfo = SW_RADIO_OFF;
+                } 
+            }
+            snprintf(extra, size, "Radio Off\n");
+            wrq->u.data.length = strlen(extra) + 1; /* 1: size of '\0' */
+            break;
+        case RAIO_ON:
+            pAd->StaCfg.bSwRadio = TRUE;
+            /*if (pAd->StaCfg.bRadio != (pAd->StaCfg.bHwRadio && pAd->StaCfg.bSwRadio)) */
+            {
+                pAd->StaCfg.bRadio = (pAd->StaCfg.bHwRadio && pAd->StaCfg.bSwRadio);
+                if (pAd->StaCfg.bRadio == TRUE)
+                {
+                    MlmeRadioOn(pAd);
+                    /* Update extra information */
+					pAd->ExtraInfo = EXTRA_INFO_CLEAR;
+                }
+            }
+            snprintf(extra, size, "Radio On\n");
+            wrq->u.data.length = strlen(extra) + 1; /* 1: size of '\0' */
+            break;
+
+
+#ifdef QOS_DLS_SUPPORT
+		case SHOW_DLS_ENTRY_INFO:
+			{
+				Set_DlsEntryInfo_Display_Proc(pAd, NULL);
+				wrq->u.data.length = 0; /* 1: size of '\0' */
+			}
+			break;
+#endif /* QOS_DLS_SUPPORT */
+
+
+		case SHOW_CFG_VALUE:
+			{
+				Status = RTMPShowCfgValue(pAd, (PSTRING) wrq->u.data.pointer,
+										extra, pIoctlShow->MaxSize);
+				if (Status == 0)
+					wrq->u.data.length = strlen(extra) + 1; /* 1: size of '\0' */
+			}
+			break;
+		case SHOW_ADHOC_ENTRY_INFO:
+			Show_Adhoc_MacTable_Proc(pAd, extra, size);
+			wrq->u.data.length = strlen(extra) + 1; /* 1: size of '\0' */
+			break;
+
+        default:
+            DBGPRINT(RT_DEBUG_TRACE, ("%s - unknow subcmd = %d\n", __FUNCTION__, subcmd));
+            break;
+    }
+}
+
+
+/* ------------------- Functions for Standard IOCTL ------------------------- */
+#define RTMP_STA_STANDARD_IOCTL_HANDLE(__pAd, __pData, __Data, __SubCmd)	\
+	case CMD_RTPRIV_IOCTL_STA_SIOCSIWFREQ:									\
+		return RtmpIoctl_rt_ioctl_siwfreq(__pAd, __pData, __Data);			\
+	case CMD_RTPRIV_IOCTL_STA_SIOCGIWFREQ:									\
+		return RtmpIoctl_rt_ioctl_giwfreq(__pAd, __pData, __Data);			\
+	case CMD_RTPRIV_IOCTL_STA_SIOCSIWMODE:									\
+		return RtmpIoctl_rt_ioctl_siwmode(__pAd, __pData, __Data);			\
+	case CMD_RTPRIV_IOCTL_STA_SIOCGIWMODE:									\
+		return RtmpIoctl_rt_ioctl_giwmode(__pAd, __pData, __Data);			\
+	case CMD_RTPRIV_IOCTL_STA_SIOCSIWAP:									\
+		return RtmpIoctl_rt_ioctl_siwap(__pAd, __pData, __Data);			\
+	case CMD_RTPRIV_IOCTL_STA_SIOCGIWAP:									\
+		return RtmpIoctl_rt_ioctl_giwap(__pAd, __pData, __Data);			\
+	case CMD_RTPRIV_IOCTL_STA_SIOCSIWSCAN:									\
+		return RtmpIoctl_rt_ioctl_siwscan(__pAd, __pData, __Data);			\
+	case CMD_RTPRIV_IOCTL_STA_SIOCGIWSCAN:									\
+		return RtmpIoctl_rt_ioctl_giwscan(__pAd, __pData, __Data);			\
+	case CMD_RTPRIV_IOCTL_STA_SIOCSIWESSID:									\
+		return RtmpIoctl_rt_ioctl_siwessid(__pAd, __pData, __Data);			\
+	case CMD_RTPRIV_IOCTL_STA_SIOCGIWESSID:									\
+		return RtmpIoctl_rt_ioctl_giwessid(__pAd, __pData, __Data);			\
+	case CMD_RTPRIV_IOCTL_STA_SIOCSIWNICKN:									\
+		return RtmpIoctl_rt_ioctl_siwnickn(__pAd, __pData, __Data);			\
+	case CMD_RTPRIV_IOCTL_STA_SIOCGIWNICKN:									\
+		return RtmpIoctl_rt_ioctl_giwnickn(__pAd, __pData, __Data);			\
+	case CMD_RTPRIV_IOCTL_STA_SIOCSIWRTS:									\
+		return RtmpIoctl_rt_ioctl_siwrts(__pAd, __pData, __Data);			\
+	case CMD_RTPRIV_IOCTL_STA_SIOCGIWRTS:									\
+		return RtmpIoctl_rt_ioctl_giwrts(__pAd, __pData, __Data);			\
+	case CMD_RTPRIV_IOCTL_STA_SIOCSIWFRAG:									\
+		return RtmpIoctl_rt_ioctl_siwfrag(__pAd, __pData, __Data);			\
+	case CMD_RTPRIV_IOCTL_STA_SIOCGIWFRAG:									\
+		return RtmpIoctl_rt_ioctl_giwfrag(__pAd, __pData, __Data);			\
+	case CMD_RTPRIV_IOCTL_STA_SIOCSIWENCODE:								\
+		return RtmpIoctl_rt_ioctl_siwencode(__pAd, __pData, __Data);		\
+	case CMD_RTPRIV_IOCTL_STA_SIOCGIWENCODE:								\
+		return RtmpIoctl_rt_ioctl_giwencode(__pAd, __pData, __Data);		\
+	case CMD_RTPRIV_IOCTL_STA_SIOCSIWMLME:									\
+		return RtmpIoctl_rt_ioctl_siwmlme(__pAd, __pData, __Data, __SubCmd);\
+	case CMD_RTPRIV_IOCTL_STA_SIOCSIWAUTH:									\
+		return RtmpIoctl_rt_ioctl_siwauth(__pAd, __pData, __Data);			\
+	case CMD_RTPRIV_IOCTL_STA_SIOCGIWAUTH:									\
+		return RtmpIoctl_rt_ioctl_giwauth(__pAd, __pData, __Data);			\
+	case CMD_RTPRIV_IOCTL_STA_SIOCSIWENCODEEXT:								\
+		return RtmpIoctl_rt_ioctl_siwencodeext(__pAd, __pData, __Data);		\
+	case CMD_RTPRIV_IOCTL_STA_SIOCGIWENCODEEXT:								\
+		return RtmpIoctl_rt_ioctl_giwencodeext(__pAd, __pData, __Data);		\
+	case CMD_RTPRIV_IOCTL_STA_SIOCSIWGENIE:									\
+		return RtmpIoctl_rt_ioctl_siwgenie(__pAd, __pData, __Data);			\
+	case CMD_RTPRIV_IOCTL_STA_SIOCGIWGENIE:									\
+		return RtmpIoctl_rt_ioctl_giwgenie(__pAd, __pData, __Data);			\
+	case CMD_RTPRIV_IOCTL_STA_SIOCSIWPMKSA:									\
+		return RtmpIoctl_rt_ioctl_siwpmksa(__pAd, __pData, __Data);			\
+	case CMD_RTPRIV_IOCTL_STA_SIOCSIWRATE:									\
+		return RtmpIoctl_rt_ioctl_siwrate(__pAd, __pData, __Data);			\
+	case CMD_RTPRIV_IOCTL_STA_SIOCGIWRATE:									\
+		return RtmpIoctl_rt_ioctl_giwrate(__pAd, __pData, __Data);			\
+	case CMD_RTPRIV_IOCTL_STA_SIOCGIFHWADDR:								\
+		return RtmpIoctl_rt_ioctl_gifhwaddr(__pAd, __pData, __Data);		\
+	case CMD_RTPRIV_IOCTL_STA_IW_SET_WSC_U32_ITEM:							\
+		return RtmpIoctl_rt_private_set_wsc_u32_item(__pAd, __pData, __Data);\
+	case CMD_RTPRIV_IOCTL_STA_IW_SET_WSC_STR_ITEM:							\
+		return RtmpIoctl_rt_private_set_wsc_string_item(__pAd, __pData, __Data);\
+	case CMD_RTPRIV_IOCTL_STA_IW_GET_STATISTICS:							\
+		return RtmpIoctl_rt_private_get_statistics(__pAd, __pData, __Data);	\
+	;
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCSIWFREQ.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_siwfreq(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	RT_CMD_STA_IOCTL_FREQ *pIoctlFreq = (RT_CMD_STA_IOCTL_FREQ *)pData;
+	int 	chan = -1;
+	ULONG	freq;
+	
+	if ( pIoctlFreq->m > 100000000 )
+		freq = pIoctlFreq->m / 100000;
+	else if ( pIoctlFreq->m > 100000 )
+		freq = pIoctlFreq->m / 100;
+	else
+		freq = pIoctlFreq->m;
+
+
+	if((pIoctlFreq->e == 0) && (freq <= 1000))
+		chan = pIoctlFreq->m;	/* Setting by channel number */
+	else
+	{
+		MAP_KHZ_TO_CHANNEL_ID( freq , chan); /* Setting by frequency - search the table , like 2.412G, 2.422G, */
+	}
+
+    if (ChannelSanity(pAd, chan) == TRUE)
+    {
+	pAd->CommonCfg.Channel = chan;
+		/*
+			Save the channel on MlmeAux for CntlOidRTBssidProc used.
+		*/
+		pAd->MlmeAux.Channel = pAd->CommonCfg.Channel;
+	DBGPRINT(RT_DEBUG_ERROR, ("==>rt_ioctl_siwfreq::SIOCSIWFREQ(Channel=%d)\n", pAd->CommonCfg.Channel));
+    }
+    else
+        return NDIS_STATUS_FAILURE;
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCGIWFREQ.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_giwfreq(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	UCHAR ch;
+	ULONG	m = 2412000;
+
+		ch = pAd->CommonCfg.Channel;
+
+	DBGPRINT(RT_DEBUG_TRACE,("==>rt_ioctl_giwfreq  %d\n", ch));
+
+	MAP_CHANNEL_ID_TO_KHZ(ch, m);
+	*(ULONG *)pData = m;
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCSIWMODE.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_siwmode(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	switch(Data)
+	{
+		case RTMP_CMD_STA_MODE_ADHOC:
+			Set_NetworkType_Proc(pAd, "Adhoc");
+			break;
+		case RTMP_CMD_STA_MODE_INFRA:
+			Set_NetworkType_Proc(pAd, "Infra");
+			break;
+		case RTMP_CMD_STA_MODE_MONITOR:
+			Set_NetworkType_Proc(pAd, "Monitor");
+			break;
+	}
+	
+	/* Reset Ralink supplicant to not use, it will be set to start when UI set PMK key */
+	pAd->StaCfg.WpaState = SS_NOTUSE;
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCGIWMODE.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_giwmode(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	if (ADHOC_ON(pAd))
+		*(ULONG *)pData = RTMP_CMD_STA_MODE_ADHOC;
+	else if (INFRA_ON(pAd))
+		*(ULONG *)pData = RTMP_CMD_STA_MODE_INFRA;
+	else if (MONITOR_ON(pAd))
+		*(ULONG *)pData = RTMP_CMD_STA_MODE_MONITOR;
+	else
+		*(ULONG *)pData = RTMP_CMD_STA_MODE_AUTO;
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCSIWAP.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_siwap(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	UCHAR *pBssid = (UCHAR *)pData;
+
+
+	if (pAd->Mlme.CntlMachine.CurrState != CNTL_IDLE)
+	{
+		RTMP_MLME_RESET_STATE_MACHINE(pAd);
+		DBGPRINT(RT_DEBUG_TRACE, ("!!! MLME busy, reset MLME state machine !!!\n"));
+	}
+
+	/* tell CNTL state machine to call NdisMSetInformationComplete() after completing */
+	/* this request, because this request is initiated by NDIS. */
+	pAd->MlmeAux.CurrReqIsFromNdis = FALSE; 
+	/* Prevent to connect AP again in STAMlmePeriodicExec */
+	pAd->MlmeAux.AutoReconnectSsidLen= 32;
+
+	if (MAC_ADDR_EQUAL(pBssid, ZERO_MAC_ADDR))
+	{
+		if (INFRA_ON(pAd))
+		{
+			LinkDown(pAd, FALSE);
+		}
+	}
+	else
+	{
+		MlmeEnqueue(pAd, 
+			MLME_CNTL_STATE_MACHINE, 
+			OID_802_11_BSSID, 
+			sizeof(NDIS_802_11_MAC_ADDRESS),
+			(VOID *)pBssid, 0);
+	}
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCGIWAP.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_giwap(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	if (INFRA_ON(pAd) || ADHOC_ON(pAd))
+		NdisMoveMemory(pData, pAd->CommonCfg.Bssid, MAC_ADDR_LEN);
+#ifdef WPA_SUPPLICANT_SUPPORT    
+	/* Add for RT2870 */
+	else if (pAd->StaCfg.WpaSupplicantUP != WPA_SUPPLICANT_DISABLE)
+		NdisMoveMemory(pData, pAd->MlmeAux.Bssid, MAC_ADDR_LEN);
+#endif /* WPA_SUPPLICANT_SUPPORT */
+	else
+		return NDIS_STATUS_FAILURE;
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCSIWSCAN.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_siwscan(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	/*
+		Can not use SIOCGIWSCAN definition, it is used in wireless.h
+		We will not see the definition in MODULE.
+		The definition can be saw in UTIL and NETIF.
+	*/
+/* #if defined(SIOCGIWSCAN) || defined(RT_CFG80211_SUPPORT) */
+	RT_CMD_STA_IOCTL_SCAN *pConfig = (RT_CMD_STA_IOCTL_SCAN *)pData;
+	int Status = NDIS_STATUS_SUCCESS;
+
+
+	pConfig->Status = 0;
+
+	if (MONITOR_ON(pAd))
+    {
+        DBGPRINT(RT_DEBUG_TRACE, ("!!! Driver is in Monitor Mode now !!!\n"));
+		pConfig->Status = RTMP_IO_EINVAL;
+		return NDIS_STATUS_FAILURE;
+    }
+
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+	if ((pAd->StaCfg.WpaSupplicantUP & 0x7F) == WPA_SUPPLICANT_ENABLE)
+	{
+		pAd->StaCfg.WpaSupplicantScanCount++;
+	}
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+    pAd->StaCfg.bScanReqIsFromWebUI = TRUE;
+	do{
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+		if (((pAd->StaCfg.WpaSupplicantUP & 0x7F) == WPA_SUPPLICANT_ENABLE) &&
+			(pAd->StaCfg.WpaSupplicantScanCount > 3))
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("!!! WpaSupplicantScanCount > 3\n"));
+			Status = NDIS_STATUS_SUCCESS;
+			break;
+		}
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+		if ((OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED)) &&
+			((pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA) || 
+				(pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPAPSK) ||
+				(pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2) ||
+				(pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2PSK)) &&	
+			(pAd->StaCfg.PortSecured == WPA_802_1X_PORT_NOT_SECURED))
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("!!! Link UP, Port Not Secured! ignore this set::OID_802_11_BSSID_LIST_SCAN\n"));
+			Status = NDIS_STATUS_SUCCESS;
+			break;
+		}
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+		if (pConfig->FlgScanThisSsid)
+		{
+				NDIS_802_11_SSID          Ssid;
+				Ssid.SsidLength = pConfig->SsidLen;
+				DBGPRINT(RT_DEBUG_TRACE, ("rt_ioctl_siwscan:: req.essid_len-%d, essid-%s\n", pConfig->SsidLen, pConfig->pSsid));
+				NdisZeroMemory(&Ssid.Ssid, NDIS_802_11_LENGTH_SSID);
+				NdisMoveMemory(Ssid.Ssid, pConfig->pSsid, Ssid.SsidLength);
+				StaSiteSurvey(pAd, &Ssid, SCAN_ACTIVE);
+		}
+		else
+#endif /* WPA_SUPPLICANT_SUPPORT */
+               if (pAd->RalinkCounters.LastOneSecTotalTxCount > 30)
+               {
+                         DBGPRINT(RT_DEBUG_TRACE, ("!!! Link UP, ignore this set::OID_802_11_BSSID_LIST_SCAN\n"));
+                         Status = NDIS_STATUS_SUCCESS;
+                         break;
+               }
+               else
+		StaSiteSurvey(pAd, NULL, SCAN_ACTIVE);
+	}while(0);
+
+	pConfig->Status = Status;
+/* #endif */ /* SIOCGIWSCAN || RT_CFG80211_SUPPORT */
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Set the signal quality.
+
+Arguments:
+	*pSignal		- signal structure
+	pBssEntry		- the BSS information
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+static void set_quality(
+	IN	RT_CMD_STA_IOCTL_BSS	*pSignal,
+	IN	PBSS_ENTRY				pBssEntry)
+{
+	memcpy(pSignal->Bssid, pBssEntry->Bssid, MAC_ADDR_LEN);
+
+	/* Normalize Rssi */
+	if (pBssEntry->Rssi >= -50)
+        pSignal->ChannelQuality = 100;
+	else if (pBssEntry->Rssi >= -80) /* between -50 ~ -80dbm */
+		pSignal->ChannelQuality = (__u8)(24 + ((pBssEntry->Rssi + 80) * 26)/10);
+	else if (pBssEntry->Rssi >= -90)   /* between -80 ~ -90dbm */
+        pSignal->ChannelQuality = (__u8)((pBssEntry->Rssi + 90) * 26)/10;   
+	else
+		pSignal->ChannelQuality = 0;
+        
+    pSignal->Rssi = (__u8)(pBssEntry->Rssi);
+
+    if (pBssEntry->Rssi >= -70)
+		pSignal->Noise = -92;
+	else
+		pSignal->Noise = pBssEntry->Rssi - pBssEntry->MinSNR;		
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCGIWSCAN.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_giwscan(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	RT_CMD_STA_IOCTL_SCAN_TABLE *pIoctlScan = (RT_CMD_STA_IOCTL_SCAN_TABLE *)pData;
+	RT_CMD_STA_IOCTL_BSS_TABLE *pBssTable;
+	PBSS_ENTRY pBssEntry;
+	UINT32 IdBss;
+
+
+	pIoctlScan->BssNr = 0;
+
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+	if ((pAd->StaCfg.WpaSupplicantUP & 0x7F) == WPA_SUPPLICANT_ENABLE)
+	{
+		pAd->StaCfg.WpaSupplicantScanCount = 0;
+	}
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+	pIoctlScan->BssNr = pAd->ScanTab.BssNr;
+	if (pIoctlScan->BssNr == 0)
+		return NDIS_STATUS_SUCCESS;
+
+	os_alloc_mem(NULL, (UCHAR **)&(pIoctlScan->pBssTable),
+				pAd->ScanTab.BssNr * sizeof(RT_CMD_STA_IOCTL_BSS_TABLE));
+	if (pIoctlScan->pBssTable == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("Allocate memory fail!\n"));
+		return NDIS_STATUS_FAILURE;
+	}
+
+	for(IdBss=0; IdBss<pAd->ScanTab.BssNr; IdBss++)
+	{
+		HT_CAP_INFO capInfo = pAd->ScanTab.BssEntry[IdBss].HtCapability.HtCapInfo;
+
+		pBssTable = pIoctlScan->pBssTable + IdBss;
+		pBssEntry = &pAd->ScanTab.BssEntry[IdBss];
+
+		memcpy(pBssTable->Bssid, pBssEntry->Bssid, ETH_ALEN);
+		pBssTable->Channel = pBssEntry->Channel;
+		pBssTable->BssType = pBssEntry->BssType;
+		pBssTable->HtCapabilityLen = pBssEntry->HtCapabilityLen;
+		memcpy(pBssTable->SupRate, pBssEntry->SupRate, 12);
+		pBssTable->SupRateLen = pBssEntry->SupRateLen;
+		memcpy(pBssTable->ExtRate, pBssEntry->ExtRate, 12);
+		pBssTable->ExtRateLen = pBssEntry->ExtRateLen;
+		pBssTable->SsidLen = pBssEntry->SsidLen;
+		memcpy(pBssTable->Ssid, pBssEntry->Ssid, 32);
+		pBssTable->CapabilityInfo = pBssEntry->CapabilityInfo;
+		pBssTable->ChannelWidth = capInfo.ChannelWidth;
+		pBssTable->ShortGIfor40 = capInfo.ShortGIfor40;
+		pBssTable->ShortGIfor20 = capInfo.ShortGIfor20;
+		pBssTable->MCSSet = pBssEntry->HtCapability.MCSSet[1];
+		pBssTable->WpaIeLen = pBssEntry->WpaIE.IELen;
+		pBssTable->pWpaIe = pBssEntry->WpaIE.IE;
+		pBssTable->RsnIeLen = pBssEntry->RsnIE.IELen;
+		pBssTable->pRsnIe = pBssEntry->RsnIE.IE;
+		pBssTable->WpsIeLen = pBssEntry->WpsIE.IELen;
+		pBssTable->pWpsIe = pBssEntry->WpsIE.IE;
+		pBssTable->FlgIsPrivacyOn = CAP_IS_PRIVACY_ON(pBssEntry->CapabilityInfo);
+		set_quality(&pBssTable->Signal, pBssEntry);
+	}
+
+	memcpy(pIoctlScan->MainSharedKey[0], pAd->SharedKey[BSS0][0].Key, 16);
+	memcpy(pIoctlScan->MainSharedKey[1], pAd->SharedKey[BSS0][1].Key, 16);
+	memcpy(pIoctlScan->MainSharedKey[2], pAd->SharedKey[BSS0][2].Key, 16);
+	memcpy(pIoctlScan->MainSharedKey[3], pAd->SharedKey[BSS0][3].Key, 16);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCSIWESSID.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_siwessid(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	RT_CMD_STA_IOCTL_SSID *pSsid = (RT_CMD_STA_IOCTL_SSID *)pData;
+
+	if (pSsid->FlgAnySsid)
+	{
+		PSTRING	pSsidString = NULL;
+
+		/* Includes null character. */
+/*				pSsidString = kmalloc(MAX_LEN_OF_SSID+1, MEM_ALLOC_FLAG); */
+		os_alloc_mem(NULL, (UCHAR **)&pSsidString, MAX_LEN_OF_SSID+1);
+		if (pSsidString)
+		{
+			NdisZeroMemory(pSsidString, MAX_LEN_OF_SSID+1);
+			NdisMoveMemory(pSsidString, pSsid->pSsid, pSsid->SsidLen);
+			if (Set_SSID_Proc(pAd, pSsidString) == FALSE)
+			{
+				os_free_mem(NULL, pSsidString);
+				pSsid->Status = RTMP_IO_EINVAL;
+				return NDIS_STATUS_SUCCESS;
+			}
+			os_free_mem(NULL, pSsidString);
+		}
+		else
+		{
+			pSsid->Status = RTMP_IO_ENOMEM;
+			return NDIS_STATUS_SUCCESS;
+		}
+	}
+	else
+	{
+		/* ANY ssid */
+		if (Set_SSID_Proc(pAd, "") == FALSE)
+		{
+			pSsid->Status = RTMP_IO_EINVAL;
+			return NDIS_STATUS_SUCCESS;
+		}
+	}
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCGIWESSID.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_giwessid(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	RT_CMD_STA_IOCTL_SSID *pSsid = (RT_CMD_STA_IOCTL_SSID *)pData;
+
+	if (MONITOR_ON(pAd))
+	{
+		pSsid->SsidLen = 0;
+		return NDIS_STATUS_SUCCESS;
+	}
+
+	if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED))
+	{
+		DBGPRINT(RT_DEBUG_TRACE ,("MediaState is connected\n"));
+		pSsid->SsidLen = pAd->CommonCfg.SsidLen;
+		memcpy(pSsid->pSsid, pAd->CommonCfg.Ssid, pAd->CommonCfg.SsidLen);
+	}
+#ifdef RTMP_MAC_USB
+#ifdef WPA_SUPPLICANT_SUPPORT
+	/* Add for RT2870 */
+	else if (pAd->StaCfg.WpaSupplicantUP != WPA_SUPPLICANT_DISABLE)
+	{
+		pSsid->SsidLen = pAd->CommonCfg.SsidLen;
+		memcpy(pSsid->pSsid, pAd->CommonCfg.Ssid, pAd->CommonCfg.SsidLen);
+	}
+#endif /* WPA_SUPPLICANT_SUPPORT */
+#endif /* RTMP_MAC_USB */
+	else
+	{/*the ANY ssid was specified */
+		pSsid->SsidLen = 0;
+		DBGPRINT(RT_DEBUG_TRACE ,("MediaState is not connected, ess\n"));
+	}
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCSIWNICKN.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_siwnickn(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	memset(pAd->nickname, 0, IW_ESSID_MAX_SIZE + 1);
+	memcpy(pAd->nickname, pData, Data);
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCGIWNICKN.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_giwnickn(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	RT_CMD_STA_IOCTL_NICK_NAME *IoctlName = (RT_CMD_STA_IOCTL_NICK_NAME *)pData;
+
+
+	if (IoctlName->NameLen > strlen((PSTRING) pAd->nickname) + 1)
+		IoctlName->NameLen = strlen((PSTRING) pAd->nickname) + 1;
+	if (IoctlName->NameLen > 0) {
+		memcpy(IoctlName->pName, pAd->nickname, IoctlName->NameLen-1);
+		IoctlName->pName[IoctlName->NameLen-1] = '\0';
+	}
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCSIWRTS.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_siwrts(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	pAd->CommonCfg.RtsThreshold = Data;
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCGIWRTS.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_giwrts(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	*(USHORT *)pData = pAd->CommonCfg.RtsThreshold;
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCSIWFRAG.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_siwfrag(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	pAd->CommonCfg.FragmentThreshold = Data;
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCGIWFRAG.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_giwfrag(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	*(USHORT *)pData = pAd->CommonCfg.FragmentThreshold;
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCSIWENCODE.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+#define NR_WEP_KEYS 				4
+#define MAX_WEP_KEY_SIZE			13
+#define MIN_WEP_KEY_SIZE			5
+INT
+RtmpIoctl_rt_ioctl_siwencode(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	RT_CMD_STA_IOCTL_SECURITY *pIoctlSec = (RT_CMD_STA_IOCTL_SECURITY *)pData;
+
+
+	if ((pIoctlSec->length == 0) &&
+        (pIoctlSec->flags & RT_CMD_STA_IOCTL_SECURITY_DISABLED))
+	{
+		pAd->StaCfg.PairCipher = Ndis802_11WEPDisabled;
+		pAd->StaCfg.GroupCipher = Ndis802_11WEPDisabled;
+		pAd->StaCfg.WepStatus = Ndis802_11WEPDisabled;
+        pAd->StaCfg.AuthMode = Ndis802_11AuthModeOpen;
+        goto done;
+	}
+	else if (pIoctlSec->flags & RT_CMD_STA_IOCTL_SECURITY_RESTRICTED ||
+				pIoctlSec->flags & RT_CMD_STA_IOCTL_SECURITY_OPEN)
+	{
+	    /*pAd->StaCfg.PortSecured = WPA_802_1X_PORT_SECURED; */
+		STA_PORT_SECURED(pAd);
+		pAd->StaCfg.PairCipher = Ndis802_11WEPEnabled;
+		pAd->StaCfg.GroupCipher = Ndis802_11WEPEnabled;
+		pAd->StaCfg.WepStatus = Ndis802_11WEPEnabled;
+		if (pIoctlSec->flags & RT_CMD_STA_IOCTL_SECURITY_RESTRICTED)
+			pAd->StaCfg.AuthMode = Ndis802_11AuthModeShared;
+    	else
+			pAd->StaCfg.AuthMode = Ndis802_11AuthModeOpen;
+	}
+    
+    if (pIoctlSec->length > 0) 
+	{
+		int keyIdx = pIoctlSec->KeyIdx; /*(erq->flags & IW_ENCODE_INDEX) - 1; */
+		/* Check the size of the key */
+		if (pIoctlSec->length > MAX_WEP_KEY_SIZE) 
+		{
+			pIoctlSec->Status = RTMP_IO_EINVAL;
+			return NDIS_STATUS_SUCCESS;
+		}
+		/* Check key index */
+		if ((keyIdx < 0) || (keyIdx >= NR_WEP_KEYS))
+        {
+            DBGPRINT(RT_DEBUG_TRACE ,("==>rt_ioctl_siwencode::Wrong keyIdx=%d! Using default key instead (%d)\n", 
+                                        keyIdx, pAd->StaCfg.DefaultKeyId));
+            
+            /*Using default key */
+			keyIdx = pAd->StaCfg.DefaultKeyId;   
+        }
+		else
+			pAd->StaCfg.DefaultKeyId = keyIdx;
+
+        NdisZeroMemory(pAd->SharedKey[BSS0][keyIdx].Key,  16);
+		
+		if (pIoctlSec->length == MAX_WEP_KEY_SIZE)
+        {      
+			pAd->SharedKey[BSS0][keyIdx].KeyLen = MAX_WEP_KEY_SIZE;
+            pAd->SharedKey[BSS0][keyIdx].CipherAlg = CIPHER_WEP128;
+		}
+		else if (pIoctlSec->length == MIN_WEP_KEY_SIZE)
+        {      
+            pAd->SharedKey[BSS0][keyIdx].KeyLen = MIN_WEP_KEY_SIZE;
+            pAd->SharedKey[BSS0][keyIdx].CipherAlg = CIPHER_WEP64;
+		}
+		else
+			/* Disable the key */
+			pAd->SharedKey[BSS0][keyIdx].KeyLen = 0;
+
+		/* Check if the key is not marked as invalid */
+		if(!(pIoctlSec->flags & RT_CMD_STA_IOCTL_SECURITY_NOKEY)) 
+		{
+			/* Copy the key in the driver */
+			NdisMoveMemory(pAd->SharedKey[BSS0][keyIdx].Key, pIoctlSec->pData, pIoctlSec->length);
+        }
+	} 
+    else 
+			{
+		/* Do we want to just set the transmit key index ? */
+		int index = pIoctlSec->KeyIdx; /*(erq->flags & IW_ENCODE_INDEX) - 1; */
+		if ((index >= 0) && (index < 4)) 
+        {      
+			pAd->StaCfg.DefaultKeyId = index;
+            }
+        else
+			/* Don't complain if only change the mode */
+		if(!(pIoctlSec->flags & RT_CMD_STA_IOCTL_SECURITY_MODE))
+		{
+			pIoctlSec->Status = RTMP_IO_EINVAL;
+			return NDIS_STATUS_SUCCESS;
+		}
+	}
+		
+done:
+    DBGPRINT(RT_DEBUG_TRACE ,("==>rt_ioctl_siwencode::erq->flags=%x\n",pIoctlSec->flags));
+	DBGPRINT(RT_DEBUG_TRACE ,("==>rt_ioctl_siwencode::AuthMode=%x\n",pAd->StaCfg.AuthMode));
+	DBGPRINT(RT_DEBUG_TRACE ,("==>rt_ioctl_siwencode::DefaultKeyId=%x, KeyLen = %d\n",pAd->StaCfg.DefaultKeyId , pAd->SharedKey[BSS0][pAd->StaCfg.DefaultKeyId].KeyLen));
+	DBGPRINT(RT_DEBUG_TRACE ,("==>rt_ioctl_siwencode::WepStatus=%x\n",pAd->StaCfg.WepStatus));
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCGIWENCODE.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_giwencode(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	RT_CMD_STA_IOCTL_SECURITY *pIoctlSec = (RT_CMD_STA_IOCTL_SECURITY *)pData;
+	int kid;
+
+
+	kid = pIoctlSec->KeyIdx; /*erq->flags & IW_ENCODE_INDEX; */
+	DBGPRINT(RT_DEBUG_TRACE, ("===>rt_ioctl_giwencode %d\n", kid));
+
+	if (pAd->StaCfg.WepStatus == Ndis802_11WEPDisabled)
+	{
+		pIoctlSec->length = 0;
+		pIoctlSec->flags = RT_CMD_STA_IOCTL_SECURITY_DISABLED;
+	} 
+	else if ((kid > 0) && (kid <=4))
+	{
+		/* copy wep key */
+		pIoctlSec->KeyIdx = kid;
+		if (pIoctlSec->length > pAd->SharedKey[BSS0][kid-1].KeyLen)
+			pIoctlSec->length = pAd->SharedKey[BSS0][kid-1].KeyLen;
+		memcpy(pIoctlSec->pData, pAd->SharedKey[BSS0][kid-1].Key, pIoctlSec->length);
+		if (pAd->StaCfg.AuthMode == Ndis802_11AuthModeShared)
+			pIoctlSec->flags |= RT_CMD_STA_IOCTL_SECURITY_RESTRICTED;		/* XXX */
+		else
+			pIoctlSec->flags |= RT_CMD_STA_IOCTL_SECURITY_OPEN;		/* XXX */
+		
+	}
+	else if (kid == 0)
+	{
+		if (pAd->StaCfg.AuthMode == Ndis802_11AuthModeShared)
+			pIoctlSec->flags |= RT_CMD_STA_IOCTL_SECURITY_RESTRICTED;		/* XXX */
+		else
+			pIoctlSec->flags |= RT_CMD_STA_IOCTL_SECURITY_OPEN;		/* XXX */
+		pIoctlSec->length = pAd->SharedKey[BSS0][pAd->StaCfg.DefaultKeyId].KeyLen;
+		memcpy(pIoctlSec->pData, pAd->SharedKey[BSS0][pAd->StaCfg.DefaultKeyId].Key, pIoctlSec->length);
+		/* copy default key ID */
+		if (pAd->StaCfg.AuthMode == Ndis802_11AuthModeShared)
+			pIoctlSec->flags |= RT_CMD_STA_IOCTL_SECURITY_RESTRICTED;		/* XXX */
+		else
+			pIoctlSec->flags |= RT_CMD_STA_IOCTL_SECURITY_OPEN;		/* XXX */
+		pIoctlSec->KeyIdx = pAd->StaCfg.DefaultKeyId + 1;			/* NB: base 1 */
+		pIoctlSec->flags |= RT_CMD_STA_IOCTL_SECURITY_ENABLED;	/* XXX */
+	}
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCSIWMLME.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_siwmlme(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data,
+	IN	UINT32					Subcmd)
+{
+	MLME_QUEUE_ELEM				*pMsgElem = NULL;
+	MLME_DISASSOC_REQ_STRUCT	DisAssocReq;
+	MLME_DEAUTH_REQ_STRUCT      DeAuthReq;
+	ULONG						reason_code = (ULONG)Data;
+
+
+	/* allocate memory */
+	os_alloc_mem(NULL, (UCHAR **)&pMsgElem, sizeof(MLME_QUEUE_ELEM));
+	if (pMsgElem == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+		return NDIS_STATUS_FAILURE;
+	}
+
+	switch(Subcmd)
+	{
+		case RT_CMD_STA_IOCTL_IW_MLME_DEAUTH:
+			DBGPRINT(RT_DEBUG_TRACE, ("====> %s - IW_MLME_DEAUTH\n", __FUNCTION__));			                
+			COPY_MAC_ADDR(DeAuthReq.Addr, pAd->CommonCfg.Bssid);
+			DeAuthReq.Reason = reason_code;
+			pMsgElem->MsgLen = sizeof(MLME_DEAUTH_REQ_STRUCT);
+			NdisMoveMemory(pMsgElem->Msg, &DeAuthReq, sizeof(MLME_DEAUTH_REQ_STRUCT));
+			MlmeDeauthReqAction(pAd, pMsgElem);
+			if (INFRA_ON(pAd))
+			{
+			    LinkDown(pAd, FALSE);
+			    pAd->Mlme.AssocMachine.CurrState = ASSOC_IDLE;
+			}
+			break;
+		case RT_CMD_STA_IOCTL_IW_MLME_DISASSOC:
+			DBGPRINT(RT_DEBUG_TRACE, ("====> %s - IW_MLME_DISASSOC\n", __FUNCTION__));
+			COPY_MAC_ADDR(DisAssocReq.Addr, pAd->CommonCfg.Bssid);
+			DisAssocReq.Reason =  reason_code;
+
+			pMsgElem->Machine = ASSOC_STATE_MACHINE;
+			pMsgElem->MsgType = MT2_MLME_DISASSOC_REQ;
+			pMsgElem->MsgLen = sizeof(MLME_DISASSOC_REQ_STRUCT);
+			NdisMoveMemory(pMsgElem->Msg, &DisAssocReq, sizeof(MLME_DISASSOC_REQ_STRUCT));
+
+			pAd->Mlme.CntlMachine.CurrState = CNTL_WAIT_OID_DISASSOC;
+			MlmeDisassocReqAction(pAd, pMsgElem);
+			break;
+	}
+	
+	if (pMsgElem != NULL)
+		os_free_mem(NULL, pMsgElem);
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCSIWAUTH.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_siwauth(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	RT_CMD_STA_IOCTL_SECURITY_ADV *pIoctlWpa = (RT_CMD_STA_IOCTL_SECURITY_ADV *)pData;
+
+
+	switch (pIoctlWpa->flags)
+	{
+    	case RT_CMD_STA_IOCTL_WPA_VERSION:
+            if (pIoctlWpa->value == RT_CMD_STA_IOCTL_WPA_VERSION1)
+            {            
+                pAd->StaCfg.AuthMode = Ndis802_11AuthModeWPAPSK;
+				if (pAd->StaCfg.BssType == BSS_ADHOC)
+					pAd->StaCfg.AuthMode = Ndis802_11AuthModeWPANone;
+            }
+            else if (pIoctlWpa->value == RT_CMD_STA_IOCTL_WPA_VERSION2)
+                pAd->StaCfg.AuthMode = Ndis802_11AuthModeWPA2PSK;
+			
+            DBGPRINT(RT_DEBUG_TRACE, ("%s::IW_AUTH_WPA_VERSION - param->value = %d!\n", __FUNCTION__, pIoctlWpa->value));
+            break;
+    	case RT_CMD_STA_IOCTL_WPA_PAIRWISE:
+            if (pIoctlWpa->value == RT_CMD_STA_IOCTL_WPA_PAIRWISE_NONE)
+            {
+                pAd->StaCfg.WepStatus = Ndis802_11WEPDisabled;
+                pAd->StaCfg.PairCipher = Ndis802_11WEPDisabled;
+            }
+            else if (pIoctlWpa->value == RT_CMD_STA_IOCTL_WPA_PAIRWISE_WEP40 ||
+                     pIoctlWpa->value == RT_CMD_STA_IOCTL_WPA_PAIRWISE_WEP104)
+            {
+                pAd->StaCfg.WepStatus = Ndis802_11WEPEnabled;
+                pAd->StaCfg.PairCipher = Ndis802_11WEPEnabled;
+#ifdef WPA_SUPPLICANT_SUPPORT                
+                pAd->StaCfg.IEEE8021X = FALSE;
+#endif /* WPA_SUPPLICANT_SUPPORT */
+            }
+            else if (pIoctlWpa->value == RT_CMD_STA_IOCTL_WPA_PAIRWISE_TKIP)
+            {
+                pAd->StaCfg.WepStatus = Ndis802_11Encryption2Enabled;
+                pAd->StaCfg.PairCipher = Ndis802_11Encryption2Enabled;
+            }
+            else if (pIoctlWpa->value == RT_CMD_STA_IOCTL_WPA_PAIRWISE_CCMP)
+            {
+                pAd->StaCfg.WepStatus = Ndis802_11Encryption3Enabled;
+                pAd->StaCfg.PairCipher = Ndis802_11Encryption3Enabled;
+            }
+            DBGPRINT(RT_DEBUG_TRACE, ("%s::IW_AUTH_CIPHER_PAIRWISE - param->value = %d!\n", __FUNCTION__, pIoctlWpa->value));
+            break;
+    	case RT_CMD_STA_IOCTL_WPA_GROUP:
+            if (pIoctlWpa->value == RT_CMD_STA_IOCTL_WPA_GROUP_NONE)
+            {
+                pAd->StaCfg.GroupCipher = Ndis802_11WEPDisabled;
+            }
+            else if (pIoctlWpa->value == RT_CMD_STA_IOCTL_WPA_GROUP_WEP40)
+            {
+                pAd->StaCfg.GroupCipher = Ndis802_11GroupWEP40Enabled;
+            }
+			else if (pIoctlWpa->value == RT_CMD_STA_IOCTL_WPA_GROUP_WEP104)
+            {
+				pAd->StaCfg.GroupCipher = Ndis802_11GroupWEP104Enabled;
+            }
+            else if (pIoctlWpa->value == RT_CMD_STA_IOCTL_WPA_GROUP_TKIP)
+            {
+                pAd->StaCfg.GroupCipher = Ndis802_11Encryption2Enabled;
+            }
+            else if (pIoctlWpa->value == RT_CMD_STA_IOCTL_WPA_GROUP_CCMP)
+            {
+                pAd->StaCfg.GroupCipher = Ndis802_11Encryption3Enabled;
+            }
+            DBGPRINT(RT_DEBUG_TRACE, ("%s::IW_AUTH_CIPHER_GROUP - param->value = %d!\n", __FUNCTION__, pIoctlWpa->value));
+            break;
+    	case RT_CMD_STA_IOCTL_WPA_KEY_MGMT:
+#ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
+			pAd->StaCfg.WpaSupplicantUP &= 0x7F;
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+            if (pIoctlWpa->value == RT_CMD_STA_IOCTL_WPA_KEY_MGMT_1X)
+            { 
+                if (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPAPSK)
+                {
+                    pAd->StaCfg.AuthMode = Ndis802_11AuthModeWPA;
+#ifdef WPA_SUPPLICANT_SUPPORT                    
+                    pAd->StaCfg.IEEE8021X = FALSE;
+#endif /* WPA_SUPPLICANT_SUPPORT */
+                }
+                else if (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2PSK)
+                {
+                    pAd->StaCfg.AuthMode = Ndis802_11AuthModeWPA2;
+#ifdef WPA_SUPPLICANT_SUPPORT
+                    pAd->StaCfg.IEEE8021X = FALSE;
+#endif /* WPA_SUPPLICANT_SUPPORT */
+                }
+#ifdef WPA_SUPPLICANT_SUPPORT                
+                else
+                    /* WEP 1x */
+                    pAd->StaCfg.IEEE8021X = TRUE;
+#endif /* WPA_SUPPLICANT_SUPPORT */                
+            }
+#ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+            else if (pIoctlWpa->value == 0)
+            {
+                /*pAd->StaCfg.PortSecured = WPA_802_1X_PORT_SECURED; */
+				STA_PORT_SECURED(pAd);
+            }
+            DBGPRINT(RT_DEBUG_TRACE, ("%s::IW_AUTH_KEY_MGMT - param->value = %d!\n", __FUNCTION__, pIoctlWpa->value));
+            break;
+    	case RT_CMD_STA_IOCTL_WPA_AUTH_RX_UNENCRYPTED_EAPOL:
+            break;
+    	case RT_CMD_STA_IOCTL_WPA_AUTH_PRIVACY_INVOKED:
+            /*if (pIoctlWpa->value == 0)
+			{
+                pAd->StaCfg.AuthMode = Ndis802_11AuthModeOpen;
+                pAd->StaCfg.WepStatus = Ndis802_11WEPDisabled;
+                pAd->StaCfg.PairCipher = Ndis802_11WEPDisabled;
+        	    pAd->StaCfg.GroupCipher = Ndis802_11WEPDisabled;
+            }*/            
+            DBGPRINT(RT_DEBUG_TRACE, ("%s::IW_AUTH_PRIVACY_INVOKED - param->value = %d!\n", __FUNCTION__, pIoctlWpa->value));
+    		break;
+    	case RT_CMD_STA_IOCTL_WPA_AUTH_DROP_UNENCRYPTED:
+            if (pIoctlWpa->value != 0)
+                pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
+			else
+			{
+                /*pAd->StaCfg.PortSecured = WPA_802_1X_PORT_SECURED; */
+				STA_PORT_SECURED(pAd);
+			}
+            DBGPRINT(RT_DEBUG_TRACE, ("%s::IW_AUTH_DROP_UNENCRYPTED - param->value = %d!\n", __FUNCTION__, pIoctlWpa->value));
+    		break;
+    	case RT_CMD_STA_IOCTL_WPA_AUTH_80211_AUTH_ALG: 
+			if (pIoctlWpa->value == RT_CMD_STA_IOCTL_WPA_AUTH_80211_AUTH_ALG_OPEN)
+				pAd->StaCfg.AuthMode = Ndis802_11AuthModeOpen;
+			else if (pIoctlWpa->value == RT_CMD_STA_IOCTL_WPA_AUTH_80211_AUTH_ALG_SHARED)
+				pAd->StaCfg.AuthMode = Ndis802_11AuthModeShared;
+            else
+				pAd->StaCfg.AuthMode = Ndis802_11AuthModeAutoSwitch;
+            DBGPRINT(RT_DEBUG_TRACE, ("%s::IW_AUTH_80211_AUTH_ALG - param->value = %d!\n", __FUNCTION__, pIoctlWpa->value));
+			break;
+    	case RT_CMD_STA_IOCTL_WPA_AUTH_WPA_ENABLED:
+    		DBGPRINT(RT_DEBUG_TRACE, ("%s::IW_AUTH_WPA_ENABLED - Driver supports WPA!(param->value = %d)\n", __FUNCTION__, pIoctlWpa->value));
+    		break;
+}
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCGIWAUTH.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_giwauth(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	RT_CMD_STA_IOCTL_SECURITY_ADV *pIoctlWpa = (RT_CMD_STA_IOCTL_SECURITY_ADV *)pData;
+
+
+	switch (pIoctlWpa->flags) {
+	case RT_CMD_STA_IOCTL_WPA_AUTH_DROP_UNENCRYPTED:
+        pIoctlWpa->value = (pAd->StaCfg.WepStatus == Ndis802_11WEPDisabled) ? 0 : 1;
+		break;
+
+	case RT_CMD_STA_IOCTL_WPA_AUTH_80211_AUTH_ALG:
+        pIoctlWpa->value = (pAd->StaCfg.AuthMode == Ndis802_11AuthModeShared) ? 0 : 1;
+		break;
+
+	case RT_CMD_STA_IOCTL_WPA_AUTH_WPA_ENABLED:
+		pIoctlWpa->value = (pAd->StaCfg.AuthMode >= Ndis802_11AuthModeWPA) ? 1 : 0;
+		break;
+	}
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Set security key.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	keyIdx			- key index
+	CipherAlg		- cipher algorithm
+	bGTK			- 1: the key is group key
+	*pKey			- the key
+
+Return Value:
+	None
+
+Note:
+========================================================================
+*/
+void fnSetCipherKey(
+    IN  PRTMP_ADAPTER   pAd,
+    IN  INT             keyIdx,    
+    IN  UCHAR           CipherAlg,
+    IN  BOOLEAN         bGTK,
+    IN  UCHAR			*pKey)
+{
+    NdisZeroMemory(&pAd->SharedKey[BSS0][keyIdx], sizeof(CIPHER_KEY));
+    pAd->SharedKey[BSS0][keyIdx].KeyLen = LEN_TK;
+    NdisMoveMemory(pAd->SharedKey[BSS0][keyIdx].Key, pKey, LEN_TK);
+    NdisMoveMemory(pAd->SharedKey[BSS0][keyIdx].TxMic, pKey + LEN_TK, LEN_TKIP_MIC);
+    NdisMoveMemory(pAd->SharedKey[BSS0][keyIdx].RxMic, pKey + LEN_TK + LEN_TKIP_MIC, LEN_TKIP_MIC);
+    pAd->SharedKey[BSS0][keyIdx].CipherAlg = CipherAlg;
+
+    /* Update group key information to ASIC Shared Key Table */
+	AsicAddSharedKeyEntry(pAd, 
+						  BSS0, 
+						  keyIdx, 
+						  &pAd->SharedKey[BSS0][keyIdx]);
+			
+	/* Update ASIC WCID attribute table and IVEIV table */
+	if (!bGTK)
+		RTMPSetWcidSecurityInfo(pAd, 
+	    						BSS0, 
+	    						keyIdx, 
+	    						pAd->SharedKey[BSS0][keyIdx].CipherAlg, 
+	       						BSSID_WCID, 
+	       						SHAREDKEYTABLE);
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCSIWENCODEEXT.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_siwencodeext(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	RT_CMD_STA_IOCTL_SECURITY *pIoctlSec = (RT_CMD_STA_IOCTL_SECURITY *)pData;
+    int keyIdx;
+
+
+    if (pIoctlSec->flags == RT_CMD_STA_IOCTL_SECURITY_DISABLED)
+	{
+        keyIdx = pIoctlSec->KeyIdx; /*(encoding->flags & IW_ENCODE_INDEX) - 1; */
+        /* set BSSID wcid entry of the Pair-wise Key table as no-security mode */
+	    AsicRemovePairwiseKeyEntry(pAd, BSSID_WCID);
+        pAd->SharedKey[BSS0][keyIdx].KeyLen = 0;
+		pAd->SharedKey[BSS0][keyIdx].CipherAlg = CIPHER_NONE;
+		AsicRemoveSharedKeyEntry(pAd, 0, (UCHAR)keyIdx);
+        NdisZeroMemory(&pAd->SharedKey[BSS0][keyIdx], sizeof(CIPHER_KEY));
+        DBGPRINT(RT_DEBUG_TRACE, ("%s::Remove all keys!\n", __FUNCTION__));
+    }
+	else
+    {
+        /* Get Key Index and convet to our own defined key index */
+    	keyIdx = pIoctlSec->KeyIdx; /*(encoding->flags & IW_ENCODE_INDEX) - 1; */
+    	if((keyIdx < 0) || (keyIdx >= NR_WEP_KEYS))
+    		return NDIS_STATUS_FAILURE;
+					
+        if (pIoctlSec->ext_flags & RT_CMD_STA_IOCTL_SECURTIY_EXT_SET_TX_KEY)
+        {
+            pAd->StaCfg.DefaultKeyId = keyIdx;
+            DBGPRINT(RT_DEBUG_TRACE, ("%s::DefaultKeyId = %d\n", __FUNCTION__, pAd->StaCfg.DefaultKeyId));
+        }
+
+        switch (pIoctlSec->Alg) {
+    		case RT_CMD_STA_IOCTL_SECURITY_ALG_NONE:
+                DBGPRINT(RT_DEBUG_TRACE, ("%s::IW_ENCODE_ALG_NONE\n", __FUNCTION__));
+    			break;
+    		case RT_CMD_STA_IOCTL_SECURITY_ALG_WEP:
+                DBGPRINT(RT_DEBUG_TRACE, ("%s::IW_ENCODE_ALG_WEP - ext->key_len = %d, keyIdx = %d\n", __FUNCTION__, pIoctlSec->length, keyIdx));
+    			if (pIoctlSec->length == MAX_WEP_KEY_SIZE)
+                {      
+        			pAd->SharedKey[BSS0][keyIdx].KeyLen = MAX_WEP_KEY_SIZE;
+                    pAd->SharedKey[BSS0][keyIdx].CipherAlg = CIPHER_WEP128;
+				}
+        		else if (pIoctlSec->length == MIN_WEP_KEY_SIZE)
+                {      
+                    pAd->SharedKey[BSS0][keyIdx].KeyLen = MIN_WEP_KEY_SIZE;
+                    pAd->SharedKey[BSS0][keyIdx].CipherAlg = CIPHER_WEP64;
+				}
+        		else
+                    return NDIS_STATUS_FAILURE;
+                                
+                NdisZeroMemory(pAd->SharedKey[BSS0][keyIdx].Key,  16);
+			    NdisMoveMemory(pAd->SharedKey[BSS0][keyIdx].Key, pIoctlSec->pData, pIoctlSec->length);
+
+				if ((pAd->StaCfg.GroupCipher == Ndis802_11GroupWEP40Enabled) ||
+					(pAd->StaCfg.GroupCipher == Ndis802_11GroupWEP104Enabled))				
+				{										
+					/* Set Group key material to Asic */
+					AsicAddSharedKeyEntry(pAd, BSS0, keyIdx, &pAd->SharedKey[BSS0][keyIdx]);										
+
+					/* Assign pairwise key info */
+					RTMPSetWcidSecurityInfo(pAd,
+										 	BSS0, 
+										 	keyIdx, 
+										 	pAd->SharedKey[BSS0][keyIdx].CipherAlg, 												 
+										 	BSSID_WCID, 
+										 	SHAREDKEYTABLE);
+
+					STA_PORT_SECURED(pAd);					    				
+				}
+    			break;
+            case RT_CMD_STA_IOCTL_SECURITY_ALG_TKIP:
+                DBGPRINT(RT_DEBUG_TRACE, ("%s::IW_ENCODE_ALG_TKIP - keyIdx = %d, ext->key_len = %d\n", __FUNCTION__, keyIdx, pIoctlSec->length));
+                if (pIoctlSec->length == 32)
+                {
+                	if (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPANone)
+                	{
+                		RTMPZeroMemory(pAd->StaCfg.PMK, LEN_PMK);
+                		RTMPMoveMemory(pAd->StaCfg.PMK, pIoctlSec->pData, pIoctlSec->length);
+                	}
+					else
+					{
+	                    if (pIoctlSec->ext_flags & RT_CMD_STA_IOCTL_SECURTIY_EXT_SET_TX_KEY)
+	                    {
+	                        fnSetCipherKey(pAd, keyIdx, CIPHER_TKIP, FALSE, pIoctlSec->pData);
+	                        if (pAd->StaCfg.AuthMode >= Ndis802_11AuthModeWPA2)
+	                        {
+	                            STA_PORT_SECURED(pAd);
+	                        }
+						}
+	                    else if (pIoctlSec->ext_flags & RT_CMD_STA_IOCTL_SECURTIY_EXT_GROUP_KEY)
+	                    {
+	                        fnSetCipherKey(pAd, keyIdx, CIPHER_TKIP, TRUE, pIoctlSec->pData);
+			
+	                        /* set 802.1x port control */
+	            	        STA_PORT_SECURED(pAd);
+	                    }
+					}
+                }
+                else
+                    return NDIS_STATUS_FAILURE;
+                break;
+            case RT_CMD_STA_IOCTL_SECURITY_ALG_CCMP:
+				if (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPANone)
+            	{
+            		RTMPZeroMemory(pAd->StaCfg.PMK, LEN_PMK);
+            		RTMPMoveMemory(pAd->StaCfg.PMK, pIoctlSec->pData, pIoctlSec->length);
+            	}
+				else
+				{
+	                if (pIoctlSec->ext_flags & RT_CMD_STA_IOCTL_SECURTIY_EXT_SET_TX_KEY)
+					{
+	                    fnSetCipherKey(pAd, keyIdx, CIPHER_AES, FALSE, pIoctlSec->pData);
+	                    if (pAd->StaCfg.AuthMode >= Ndis802_11AuthModeWPA2)
+						{
+	                    	STA_PORT_SECURED(pAd);
+						}
+	                }
+	                else if (pIoctlSec->ext_flags & RT_CMD_STA_IOCTL_SECURTIY_EXT_GROUP_KEY)
+	                {
+	                    fnSetCipherKey(pAd, keyIdx, CIPHER_AES, TRUE, pIoctlSec->pData);
+	                    
+	                    /* set 802.1x port control */
+	        	        STA_PORT_SECURED(pAd);
+	                }
+				}
+                break;
+    		default:
+    			return NDIS_STATUS_FAILURE;
+		}
+    }
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCGIWENCODEEXT.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_giwencodeext(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	RT_CMD_STA_IOCTL_SECURITY *pIoctlSec = (RT_CMD_STA_IOCTL_SECURITY *)pData;
+	int idx;
+
+
+	idx = pIoctlSec->KeyIdx;
+	if (idx) 
+	{
+		if (idx < 1 || idx > 4)
+		{
+			pIoctlSec->Status = RTMP_IO_EINVAL;
+			return NDIS_STATUS_FAILURE;
+		}
+		idx--;
+
+		if ((pAd->StaCfg.WepStatus == Ndis802_11Encryption2Enabled) ||
+			(pAd->StaCfg.WepStatus == Ndis802_11Encryption3Enabled))
+		{
+			if (idx != pAd->StaCfg.DefaultKeyId)
+			{
+				pIoctlSec->Status = 0;
+				pIoctlSec->length = 0;
+				return NDIS_STATUS_FAILURE;
+			}
+		}
+	} 
+	else
+		idx = pAd->StaCfg.DefaultKeyId;
+
+	pIoctlSec->KeyIdx = idx + 1;
+
+	pIoctlSec->length = 0;
+	switch(pAd->StaCfg.WepStatus) {
+		case Ndis802_11WEPDisabled:
+			pIoctlSec->Alg = RT_CMD_STA_IOCTL_SECURITY_ALG_NONE;
+			pIoctlSec->flags |= RT_CMD_STA_IOCTL_SECURITY_DISABLED;		
+			break;
+		case Ndis802_11WEPEnabled:
+			pIoctlSec->Alg = RT_CMD_STA_IOCTL_SECURITY_ALG_WEP;
+			if (pAd->SharedKey[BSS0][idx].KeyLen > pIoctlSec->MaxKeyLen)
+			{
+				pIoctlSec->Status = RTMP_IO_E2BIG;
+				return NDIS_STATUS_FAILURE;
+			}
+			else
+			{
+				pIoctlSec->length = pAd->SharedKey[BSS0][idx].KeyLen;				
+				pIoctlSec->pData = (PCHAR)&(pAd->SharedKey[BSS0][idx].Key[0]);
+			}
+			break;
+		case Ndis802_11Encryption2Enabled:
+		case Ndis802_11Encryption3Enabled:
+			if (pAd->StaCfg.WepStatus == Ndis802_11Encryption2Enabled)
+				pIoctlSec->Alg = RT_CMD_STA_IOCTL_SECURITY_ALG_TKIP;
+			else
+				pIoctlSec->Alg = RT_CMD_STA_IOCTL_SECURITY_ALG_CCMP;
+			
+			if (pIoctlSec->MaxKeyLen < 32)
+			{
+				pIoctlSec->Status = RTMP_IO_E2BIG;
+				return NDIS_STATUS_FAILURE;
+			}
+			else
+			{
+				pIoctlSec->length = 32;
+				pIoctlSec->pData = (PCHAR)&pAd->StaCfg.PMK[0];
+			}
+			break;
+		default:
+			pIoctlSec->Status = RTMP_IO_EINVAL;
+			return NDIS_STATUS_FAILURE;
+	}
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCSIWGENIE.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_siwgenie(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+#ifdef WPA_SUPPLICANT_SUPPORT
+	ULONG length = (ULONG)Data;
+
+
+	if (pAd->StaCfg.WpaSupplicantUP != WPA_SUPPLICANT_DISABLE)
+	{
+		DBGPRINT(RT_DEBUG_TRACE ,("===> rt_ioctl_siwgenie\n"));
+		pAd->StaCfg.bRSN_IE_FromWpaSupplicant = FALSE;
+		if ((length > 0) &&
+		    (pData == NULL))
+		{
+			return NDIS_STATUS_FAILURE;
+		}
+		else if (length) 
+		{
+			if (pAd->StaCfg.pWpaAssocIe)
+			{
+				os_free_mem(NULL, pAd->StaCfg.pWpaAssocIe);
+				pAd->StaCfg.pWpaAssocIe = NULL;
+			}
+/*			pAd->StaCfg.pWpaAssocIe = kmalloc(wrqu->data.length, MEM_ALLOC_FLAG); */
+			os_alloc_mem(NULL, (UCHAR **)&pAd->StaCfg.pWpaAssocIe, length);
+			if (pAd->StaCfg.pWpaAssocIe)
+			{
+				pAd->StaCfg.WpaAssocIeLen = length;
+				NdisMoveMemory(pAd->StaCfg.pWpaAssocIe, pData, pAd->StaCfg.WpaAssocIeLen);
+				pAd->StaCfg.bRSN_IE_FromWpaSupplicant = TRUE;
+			}
+			else
+				pAd->StaCfg.WpaAssocIeLen = 0;
+		}
+	}
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCGIWGENIE.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_giwgenie(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	RT_CMD_STA_IOCTL_RSN_IE *IoctlRsnIe = (RT_CMD_STA_IOCTL_RSN_IE *)pData;
+
+
+	if ((pAd->StaCfg.RSNIE_Len == 0) ||
+		(pAd->StaCfg.AuthMode < Ndis802_11AuthModeWPA))
+	{
+		IoctlRsnIe->length = 0;
+		return NDIS_STATUS_SUCCESS;
+	}
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+	/*
+		Can not use SIOCSIWGENIE definition, it is used in wireless.h
+		We will not see the definition in MODULE.
+		The definition can be saw in UTIL and NETIF.
+	*/
+/* #ifdef SIOCSIWGENIE */
+	if ((pAd->StaCfg.WpaSupplicantUP & 0x7F) == WPA_SUPPLICANT_ENABLE &&
+		(pAd->StaCfg.WpaAssocIeLen > 0))
+	{
+		if (IoctlRsnIe->length < pAd->StaCfg.WpaAssocIeLen)
+			return NDIS_STATUS_FAILURE;
+
+		IoctlRsnIe->length = pAd->StaCfg.WpaAssocIeLen;
+		memcpy(IoctlRsnIe->pRsnIe, pAd->StaCfg.pWpaAssocIe, pAd->StaCfg.WpaAssocIeLen);
+	}
+	else
+/* #endif */ /* SIOCSIWGENIE */
+#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
+	{
+		UCHAR RSNIe = IE_WPA;
+		
+		if (IoctlRsnIe->length < (pAd->StaCfg.RSNIE_Len + 2)) /* ID, Len */
+			return NDIS_STATUS_FAILURE;
+		IoctlRsnIe->length = pAd->StaCfg.RSNIE_Len + 2;
+		
+		if ((pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2PSK) ||
+            (pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPA2))
+			RSNIe = IE_RSN;
+		
+		IoctlRsnIe->pRsnIe[0] = (char)RSNIe;
+		IoctlRsnIe->pRsnIe[1] = pAd->StaCfg.RSNIE_Len;
+		memcpy(IoctlRsnIe->pRsnIe+2, &pAd->StaCfg.RSN_IE[0], pAd->StaCfg.RSNIE_Len);
+	}
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCSIWPMKSA.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_siwpmksa(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	RT_CMD_STA_IOCTL_PMA_SA *pIoctlPmaSa = (RT_CMD_STA_IOCTL_PMA_SA *)pData;
+	INT	CachedIdx = 0, idx = 0;
+
+
+	switch(pIoctlPmaSa->Cmd)
+	{
+		case RT_CMD_STA_IOCTL_PMA_SA_FLUSH:
+			NdisZeroMemory(pAd->StaCfg.SavedPMK, sizeof(BSSID_INFO)*PMKID_NO);
+			DBGPRINT(RT_DEBUG_TRACE ,("rt_ioctl_siwpmksa - IW_PMKSA_FLUSH\n"));
+			break;
+		case RT_CMD_STA_IOCTL_PMA_SA_REMOVE:
+			for (CachedIdx = 0; CachedIdx < pAd->StaCfg.SavedPMKNum; CachedIdx++)
+			{
+		        /* compare the BSSID */
+		        if (NdisEqualMemory(pIoctlPmaSa->pBssid, pAd->StaCfg.SavedPMK[CachedIdx].BSSID, MAC_ADDR_LEN))
+		        {
+		        	NdisZeroMemory(pAd->StaCfg.SavedPMK[CachedIdx].BSSID, MAC_ADDR_LEN);
+					NdisZeroMemory(pAd->StaCfg.SavedPMK[CachedIdx].PMKID, 16);
+					for (idx = CachedIdx; idx < (pAd->StaCfg.SavedPMKNum - 1); idx++)
+					{
+						NdisMoveMemory(&pAd->StaCfg.SavedPMK[idx].BSSID[0], &pAd->StaCfg.SavedPMK[idx+1].BSSID[0], MAC_ADDR_LEN);
+						NdisMoveMemory(&pAd->StaCfg.SavedPMK[idx].PMKID[0], &pAd->StaCfg.SavedPMK[idx+1].PMKID[0], 16);
+					}
+					pAd->StaCfg.SavedPMKNum--;
+			        break;
+		        }
+	        }
+			
+			DBGPRINT(RT_DEBUG_TRACE ,("rt_ioctl_siwpmksa - IW_PMKSA_REMOVE\n"));
+			break;
+		case RT_CMD_STA_IOCTL_PMA_SA_ADD:
+			for (CachedIdx = 0; CachedIdx < pAd->StaCfg.SavedPMKNum; CachedIdx++)
+			{
+		        /* compare the BSSID */
+		        if (NdisEqualMemory(pIoctlPmaSa->pBssid, pAd->StaCfg.SavedPMK[CachedIdx].BSSID, MAC_ADDR_LEN))
+			        break;			
+	        }
+
+	        /* Found, replace it */
+	        if (CachedIdx < PMKID_NO)
+	        {
+		        DBGPRINT(RT_DEBUG_OFF, ("Update PMKID, idx = %d\n", CachedIdx));
+		        NdisMoveMemory(&pAd->StaCfg.SavedPMK[CachedIdx].BSSID[0], pIoctlPmaSa->pBssid, MAC_ADDR_LEN);
+				NdisMoveMemory(&pAd->StaCfg.SavedPMK[CachedIdx].PMKID[0], pIoctlPmaSa->pPmkid, 16);
+		        pAd->StaCfg.SavedPMKNum++;
+	        }
+	        /* Not found, replace the last one */
+	        else
+	        {
+		        /* Randomly replace one */
+		        CachedIdx = (pIoctlPmaSa->pBssid[5] % PMKID_NO);
+		        DBGPRINT(RT_DEBUG_OFF, ("Update PMKID, idx = %d\n", CachedIdx));
+		        NdisMoveMemory(&pAd->StaCfg.SavedPMK[CachedIdx].BSSID[0], pIoctlPmaSa->pBssid, MAC_ADDR_LEN);
+				NdisMoveMemory(&pAd->StaCfg.SavedPMK[CachedIdx].PMKID[0], pIoctlPmaSa->pPmkid, 16);
+	        }
+			
+			DBGPRINT(RT_DEBUG_TRACE ,("rt_ioctl_siwpmksa - IW_PMKSA_ADD\n"));
+			break;
+		default:
+			DBGPRINT(RT_DEBUG_TRACE ,("rt_ioctl_siwpmksa - Unknow Command!!\n"));
+			break;
+	}
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCSIWRATE.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_siwrate(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	RT_CMD_RATE_SET *pCmdRate = (RT_CMD_RATE_SET *)pData;
+	UINT32 rate = pCmdRate->Rate;
+	UINT32 fixed = pCmdRate->Fixed;
+
+
+    /* rate = -1 => auto rate
+       rate = X, fixed = 1 => (fixed rate X)       
+    */
+    if (rate == -1)
+    {
+        /*Auto Rate */
+        pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;	
+		pAd->StaCfg.bAutoTxRateSwitch = TRUE;
+		if ((pAd->CommonCfg.PhyMode <= PHY_11G) ||
+			(pAd->MacTab.Content[BSSID_WCID].HTPhyMode.field.MODE <= MODE_OFDM))
+			RTMPSetDesiredRates(pAd, -1);
+			
+#ifdef DOT11_N_SUPPORT
+			SetCommonHT(pAd);
+#endif /* DOT11_N_SUPPORT */
+	}
+	else
+	{
+		if (fixed)
+		{
+			pAd->StaCfg.bAutoTxRateSwitch = FALSE;
+			if ((pAd->CommonCfg.PhyMode <= PHY_11G) ||
+				(pAd->MacTab.Content[BSSID_WCID].HTPhyMode.field.MODE <= MODE_OFDM))
+				RTMPSetDesiredRates(pAd, rate);
+			else
+			{
+				pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
+#ifdef DOT11_N_SUPPORT
+				SetCommonHT(pAd);
+#endif /* DOT11_N_SUPPORT */
+			}
+			DBGPRINT(RT_DEBUG_TRACE,
+					("rt_ioctl_siwrate::(HtMcs=%d)\n",pAd->StaCfg.DesiredTransmitSetting.field.MCS));
+		}
+		else
+		{
+			/* TODO: rate = X, fixed = 0 => (rates <= X) */
+			return NDIS_STATUS_FAILURE;
+		}
+	}
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCGIWRATE.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_giwrate(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+    int rate_index = 0, rate_count = 0;
+	HTTRANSMIT_SETTING ht_setting; 
+
+
+    rate_count = RT_RateSize/sizeof(__s32);
+
+    if ((pAd->StaCfg.bAutoTxRateSwitch == FALSE) &&
+        (INFRA_ON(pAd)) &&
+        ((pAd->CommonCfg.PhyMode <= PHY_11G) || (pAd->MacTab.Content[BSSID_WCID].HTPhyMode.field.MODE <= MODE_OFDM)))
+        ht_setting.word = pAd->StaCfg.HTPhyMode.word;
+    else
+        ht_setting.word = pAd->MacTab.Content[BSSID_WCID].HTPhyMode.word;
+    
+#ifdef DOT11_N_SUPPORT
+    if (ht_setting.field.MODE >= MODE_HTMIX)
+    {
+/*    	rate_index = 12 + ((UCHAR)ht_setting.field.BW *16) + ((UCHAR)ht_setting.field.ShortGI *32) + ((UCHAR)ht_setting.field.MCS); */
+    	rate_index = 12 + ((UCHAR)ht_setting.field.BW *24) + ((UCHAR)ht_setting.field.ShortGI *48) + ((UCHAR)ht_setting.field.MCS);
+    }
+    else 
+#endif /* DOT11_N_SUPPORT */
+    if (ht_setting.field.MODE == MODE_OFDM)                
+    	rate_index = (UCHAR)(ht_setting.field.MCS) + 4;
+    else if (ht_setting.field.MODE == MODE_CCK)   
+    	rate_index = (UCHAR)(ht_setting.field.MCS);
+
+    if (rate_index < 0)
+        rate_index = 0;
+    
+    if (rate_index >= rate_count)
+        rate_index = rate_count-1;
+
+	*(ULONG *)pData = ralinkrate[rate_index] * 500000;
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_SIOCGIFHWADDR.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_gifhwaddr(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	memcpy(pData, pAd->CurrentAddress, ETH_ALEN);
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_IW_SET_PARAM_PRE.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_ioctl_setparam(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	POS_COOKIE pObj;
+
+
+	pObj = (POS_COOKIE) pAd->OS_Cookie;
+	{
+		pObj->ioctl_if_type = INT_MAIN;
+        pObj->ioctl_if = MAIN_MBSSID;
+	}
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_IW_SET_WSC_U32_ITEM.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_private_set_wsc_u32_item(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+    
+    return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_IW_SET_WSC_STR_ITEM.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_private_set_wsc_string_item(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+    
+    return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Handler for CMD_RTPRIV_IOCTL_STA_IW_GET_STATISTICS.
+
+Arguments:
+	pAd				- WLAN control block pointer
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT
+RtmpIoctl_rt_private_get_statistics(
+	IN	RTMP_ADAPTER			*pAd,
+	IN	VOID					*pData,
+	IN	ULONG					Data)
+{
+	char *extra = (char *)pData;
+
+
+    sprintf(extra, "\n\n");
+
+#ifdef RALINK_ATE
+	if (ATE_ON(pAd))
+	{
+	    sprintf(extra+strlen(extra), "Tx success                      = %ld\n", (ULONG)pAd->ate.TxDoneCount);
+	    /*sprintf(extra+strlen(extra), "Tx success without retry        = %ld\n", (ULONG)pAd->ate.TxDoneCount); */
+	}
+	else
+#endif /* RALINK_ATE */
+	{
+	    sprintf(extra+strlen(extra), "Tx success                      = %lu\n", (ULONG)pAd->WlanCounters.TransmittedFragmentCount.u.LowPart);
+	}
+    sprintf(extra+strlen(extra), "Tx retry count          		  = %lu\n", (ULONG)pAd->WlanCounters.RetryCount.u.LowPart);
+    sprintf(extra+strlen(extra), "Tx fail to Rcv ACK after retry  = %lu\n", (ULONG)pAd->WlanCounters.FailedCount.u.LowPart);
+    sprintf(extra+strlen(extra), "RTS Success Rcv CTS             = %lu\n", (ULONG)pAd->WlanCounters.RTSSuccessCount.u.LowPart);
+    sprintf(extra+strlen(extra), "RTS Fail Rcv CTS                = %lu\n", (ULONG)pAd->WlanCounters.RTSFailureCount.u.LowPart);
+
+    sprintf(extra+strlen(extra), "Rx success                      = %lu\n", (ULONG)pAd->WlanCounters.ReceivedFragmentCount.QuadPart);
+    sprintf(extra+strlen(extra), "Rx with CRC                     = %lu\n", (ULONG)pAd->WlanCounters.FCSErrorCount.u.LowPart);
+    sprintf(extra+strlen(extra), "Rx drop due to out of resource  = %lu\n", (ULONG)pAd->Counters8023.RxNoBuffer);
+    sprintf(extra+strlen(extra), "Rx duplicate frame              = %lu\n", (ULONG)pAd->WlanCounters.FrameDuplicateCount.u.LowPart);
+
+    sprintf(extra+strlen(extra), "False CCA (one second)          = %lu\n", (ULONG)pAd->RalinkCounters.OneSecFalseCCACnt);
+
+#ifdef RALINK_ATE
+	if (ATE_ON(pAd))
+	{
+		if (pAd->ate.RxAntennaSel == 0)
+		{
+    		sprintf(extra+strlen(extra), "RSSI-A                          = %ld\n", (LONG)(pAd->ate.LastRssi0 - pAd->BbpRssiToDbmDelta));
+			sprintf(extra+strlen(extra), "RSSI-B (if available)           = %ld\n", (LONG)(pAd->ate.LastRssi1 - pAd->BbpRssiToDbmDelta));
+			sprintf(extra+strlen(extra), "RSSI-C (if available)           = %ld\n\n", (LONG)(pAd->ate.LastRssi2 - pAd->BbpRssiToDbmDelta));
+		}
+		else
+		{
+    		sprintf(extra+strlen(extra), "RSSI                            = %ld\n", (LONG)(pAd->ate.LastRssi0 - pAd->BbpRssiToDbmDelta));
+		}
+	}
+	else
+#endif /* RALINK_ATE */
+	{
+    		    	
+		sprintf(extra+strlen(extra), "RSSI-A                          = %ld\n", (LONG)(pAd->StaCfg.RssiSample.AvgRssi0 - pAd->BbpRssiToDbmDelta));
+		sprintf(extra+strlen(extra), "RSSI-B (if available)           = %ld\n", (LONG)(pAd->StaCfg.RssiSample.AvgRssi1 - pAd->BbpRssiToDbmDelta));
+        	sprintf(extra+strlen(extra), "RSSI-C (if available)           = %ld\n\n", (LONG)(pAd->StaCfg.RssiSample.AvgRssi2 - pAd->BbpRssiToDbmDelta));
+		sprintf(extra+strlen(extra), "SNR-A                          = %ld\n", (LONG)(pAd->StaCfg.RssiSample.AvgSnr0));
+        	sprintf(extra+strlen(extra), "SNR-B (if available)           = %ld\n\n", (LONG)(pAd->StaCfg.RssiSample.AvgSnr1));		}   
+#ifdef WPA_SUPPLICANT_SUPPORT
+    sprintf(extra+strlen(extra), "WpaSupplicantUP                 = %d\n\n", pAd->StaCfg.WpaSupplicantUP);
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+
+/*
+========================================================================
+Routine Description:
+	Communication with DRIVER module, whatever IOCTL.
+
+Arguments:
+	pAdSrc			- WLAN control block pointer
+	*pRequest		- the request from IOCTL
+	Command			- communication command
+	Subcmd			- communication sub-command
+	*pData			- the communication data pointer
+	Data			- the communication data
+
+Return Value:
+	NDIS_STATUS_SUCCESS or NDIS_STATUS_FAILURE
+
+Note:
+========================================================================
+*/
+INT RTMP_STA_IoctlHandle(
+	IN	VOID					*pAdSrc,
+	IN	RTMP_IOCTL_INPUT_STRUCT	*pRequest,
+	IN	INT						Command,
+	IN	USHORT					Subcmd,
+	IN	VOID					*pData,
+	IN  ULONG					Data,
+	IN  USHORT                  priv_flags)
+{
+	PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdSrc;
+	POS_COOKIE pObj = (POS_COOKIE)pAd->OS_Cookie;
+	INT Status = NDIS_STATUS_SUCCESS;
+
+	{	/* determine this ioctl command is comming from which interface. */
+		pObj->ioctl_if_type = INT_MAIN;
+		pObj->ioctl_if = MAIN_MBSSID;
+	}
+
+
+	/* handle by command */
+	switch(Command)
+	{
+		case CMD_RT_PRIV_IOCTL:
+			if (Subcmd & OID_GET_SET_TOGGLE)
+				Status = RTMPSetInformation(pAd, pRequest,  Subcmd);
+			else
+				Status = RTMPQueryInformation(pAd, pRequest, Subcmd);
+			break;
+
+		case CMD_RTPRIV_IOCTL_PARAM_SET:
+		{
+			RT_CMD_PARAM_SET *pCmdParam = (RT_CMD_PARAM_SET *)pData;
+			PSTRING this_char = pCmdParam->pThisChar;
+			PSTRING value = pCmdParam->pValue;
+
+			Status = RTMPSTAPrivIoctlSet(pAd, this_char, value);
+		}
+			break;
+
+		case CMD_RTPRIV_IOCTL_SITESURVEY_GET:
+			RTMPIoctlGetSiteSurvey(pAd, pRequest);
+			break;
+
+		case CMD_RTPRIV_IOCTL_MAC:
+			RTMPIoctlMAC(pAd, pRequest);
+			break;
+
+		case CMD_RTPRIV_IOCTL_E2P:
+			RTMPIoctlE2PROM(pAd, pRequest);
+			break;
+
+		case CMD_RTPRIV_IOCTL_RF:
+#ifdef RTMP_RF_RW_SUPPORT
+			RTMPIoctlRF(pAd, pRequest);
+#endif /* RTMP_RF_RW_SUPPORT */
+			break;
+
+		case CMD_RTPRIV_IOCTL_BBP:
+			RTMPIoctlBbp(pAd, pRequest, pData, Data);
+			break;
+
+		case CMD_RTPRIV_IOCTL_SHOW:
+			RTMPIoctlShow(pAd, pRequest, Subcmd, pData, Data);
+			break;
+
+		case CMD_RTPRIV_IOCTL_SITESURVEY:
+			StaSiteSurvey(pAd, (NDIS_802_11_SSID *)pData, Data);
+			break;
+
+		case CMD_RTPRIV_IOCTL_CHID_2_FREQ:
+			RTMP_MapChannelID2KHZ(Data, (UINT32 *)pData);
+			break;
+
+		case CMD_RTPRIV_IOCTL_FREQ_2_CHID:
+			RTMP_MapKHZ2ChannelID(Data, (UINT32 *)pData);
+			break;
+
+		case CMD_RTPRIV_IOCTL_ORI_DEV_TYPE_SET:
+			pAd->StaCfg.OriDevType = Data;
+			break;
+		case CMD_RTPRIV_IOCTL_STA_SCAN_SANITY_CHECK:
+			if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS))
+		    {
+				/*
+				 * Still scanning, indicate the caller should try again.
+				 */
+				pAd->StaCfg.bScanReqIsFromWebUI = TRUE;
+				return NDIS_STATUS_FAILURE;
+			}
+
+			if (pAd->StaCfg.bImprovedScan)
+			{
+				/*
+				 * Fast scanning doesn't complete yet.
+				 */
+				pAd->StaCfg.bScanReqIsFromWebUI = TRUE;
+				return NDIS_STATUS_FAILURE;
+			}
+			break;
+
+		case CMD_RTPRIV_IOCTL_STA_SCAN_END:
+		    pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
+			DBGPRINT(RT_DEBUG_ERROR ,("===>rt_ioctl_giwscan. %d(%d) BSS returned, data->length = %ld\n",pAd->ScanTab.BssNr , pAd->ScanTab.BssNr, Data));
+			break;
+
+		case CMD_RTPRIV_IOCTL_BSS_LIST_GET:
+		{
+			RT_CMD_STA_IOCTL_BSS_LIST *pBssList = (RT_CMD_STA_IOCTL_BSS_LIST *)pData;
+			RT_CMD_STA_IOCTL_BSS *pList;
+			UINT32 i;
+
+			pBssList->BssNum = pAd->ScanTab.BssNr;
+			for (i = 0; i <pBssList->MaxNum ; i++)
+			{
+				if (i >=  pAd->ScanTab.BssNr)
+					break;
+				pList = (pBssList->pList) + i;
+				set_quality(pList, &pAd->ScanTab.BssEntry[i]);
+			}
+		}
+			break;
+
+		/* ------------------------------------------------------------------ */
+		/* for standard IOCTL in LINUX OS */
+
+		RTMP_STA_STANDARD_IOCTL_HANDLE(pAd, pData, Data, Subcmd);
+
+		/* ------------------------------------------------------------------ */
+
+		default:
+			/* for IOCTL that also can be used in AP mode */
+			Status = RTMP_COM_IoctlHandle(pAd, pRequest, Command, Subcmd, pData, Data);
+			break;
+	}
+
+	return Status;
+}
+
+/* End of sta_cfg.c */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/sta/sync.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/sta/sync.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/sta/sync.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/sta/sync.c	2017-09-23 03:42:49.862675541 +0800
@@ -0,0 +1,2573 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+
+#define ADHOC_ENTRY_BEACON_LOST_TIME	(2*OS_HZ)	/* 2 sec */
+
+/*
+	==========================================================================
+	Description:
+		The sync state machine, 
+	Parameters:
+		Sm - pointer to the state machine
+	Note:
+		the state machine looks like the following
+
+	==========================================================================
+ */
+VOID SyncStateMachineInit(
+	IN PRTMP_ADAPTER pAd, 
+	IN STATE_MACHINE *Sm, 
+	OUT STATE_MACHINE_FUNC Trans[]) 
+{
+	StateMachineInit(Sm, Trans, MAX_SYNC_STATE, MAX_SYNC_MSG, (STATE_MACHINE_FUNC)Drop, SYNC_IDLE, SYNC_MACHINE_BASE);
+
+	/* column 1 */
+	StateMachineSetAction(Sm, SYNC_IDLE, MT2_MLME_SCAN_REQ, (STATE_MACHINE_FUNC)MlmeScanReqAction);
+	StateMachineSetAction(Sm, SYNC_IDLE, MT2_MLME_JOIN_REQ, (STATE_MACHINE_FUNC)MlmeJoinReqAction);
+	StateMachineSetAction(Sm, SYNC_IDLE, MT2_MLME_START_REQ, (STATE_MACHINE_FUNC)MlmeStartReqAction);
+	StateMachineSetAction(Sm, SYNC_IDLE, MT2_PEER_BEACON, (STATE_MACHINE_FUNC)PeerBeacon);
+	StateMachineSetAction(Sm, SYNC_IDLE, MT2_PEER_PROBE_REQ, (STATE_MACHINE_FUNC)PeerProbeReqAction); 
+
+	/* column 2 */
+	StateMachineSetAction(Sm, JOIN_WAIT_BEACON, MT2_MLME_SCAN_REQ, (STATE_MACHINE_FUNC)InvalidStateWhenScan);
+	StateMachineSetAction(Sm, JOIN_WAIT_BEACON, MT2_MLME_JOIN_REQ, (STATE_MACHINE_FUNC)InvalidStateWhenJoin);
+	StateMachineSetAction(Sm, JOIN_WAIT_BEACON, MT2_MLME_START_REQ, (STATE_MACHINE_FUNC)InvalidStateWhenStart);
+	StateMachineSetAction(Sm, JOIN_WAIT_BEACON, MT2_PEER_BEACON, (STATE_MACHINE_FUNC)PeerBeaconAtJoinAction);
+	StateMachineSetAction(Sm, JOIN_WAIT_BEACON, MT2_BEACON_TIMEOUT, (STATE_MACHINE_FUNC)BeaconTimeoutAtJoinAction);
+	StateMachineSetAction(Sm, JOIN_WAIT_BEACON, MT2_PEER_PROBE_RSP, (STATE_MACHINE_FUNC)PeerBeaconAtScanAction);
+
+	/* column 3 */
+	StateMachineSetAction(Sm, SCAN_LISTEN, MT2_MLME_SCAN_REQ, (STATE_MACHINE_FUNC)InvalidStateWhenScan);
+	StateMachineSetAction(Sm, SCAN_LISTEN, MT2_MLME_JOIN_REQ, (STATE_MACHINE_FUNC)InvalidStateWhenJoin);
+	StateMachineSetAction(Sm, SCAN_LISTEN, MT2_MLME_START_REQ, (STATE_MACHINE_FUNC)InvalidStateWhenStart);
+	StateMachineSetAction(Sm, SCAN_LISTEN, MT2_PEER_BEACON, (STATE_MACHINE_FUNC)PeerBeaconAtScanAction);
+	StateMachineSetAction(Sm, SCAN_LISTEN, MT2_PEER_PROBE_RSP, (STATE_MACHINE_FUNC)PeerBeaconAtScanAction);
+	StateMachineSetAction(Sm, SCAN_LISTEN, MT2_SCAN_TIMEOUT, (STATE_MACHINE_FUNC)ScanTimeoutAction);
+	/* StateMachineSetAction(Sm, SCAN_LISTEN, MT2_MLME_SCAN_CNCL, (STATE_MACHINE_FUNC)ScanCnclAction); */
+
+	/* resume scanning for fast-roaming */
+	StateMachineSetAction(Sm, SCAN_PENDING, MT2_MLME_SCAN_REQ, (STATE_MACHINE_FUNC)MlmeScanReqAction);
+
+	/* timer init */
+	RTMPInitTimer(pAd, &pAd->MlmeAux.BeaconTimer, GET_TIMER_FUNCTION(BeaconTimeout), pAd, FALSE);
+	RTMPInitTimer(pAd, &pAd->MlmeAux.ScanTimer, GET_TIMER_FUNCTION(ScanTimeout), pAd, FALSE);
+}
+
+/* 
+	==========================================================================
+	Description:
+		Beacon timeout handler, executed in timer thread
+
+	IRQL = DISPATCH_LEVEL
+
+	==========================================================================
+ */
+VOID BeaconTimeout(
+	IN PVOID SystemSpecific1, 
+	IN PVOID FunctionContext, 
+	IN PVOID SystemSpecific2, 
+	IN PVOID SystemSpecific3) 
+{
+	RTMP_ADAPTER *pAd = (RTMP_ADAPTER *)FunctionContext;
+
+	DBGPRINT(RT_DEBUG_TRACE,("SYNC - BeaconTimeout\n"));
+	
+	/*
+	    Do nothing if the driver is starting halt state.
+	    This might happen when timer already been fired before cancel timer with mlmehalt
+	*/
+	if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS))
+		return;
+	
+#ifdef DOT11_N_SUPPORT
+	if ((pAd->CommonCfg.BBPCurrentBW == BW_40)
+		)
+	{
+		UCHAR        BBPValue = 0;
+		AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
+		AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
+		BBPValue &= (~0x18);
+		BBPValue |= 0x10;
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
+		DBGPRINT(RT_DEBUG_TRACE, ("SYNC - End of SCAN, restore to 40MHz channel %d, Total BSS[%02d]\n",pAd->CommonCfg.CentralChannel, pAd->ScanTab.BssNr));
+	}
+#endif /* DOT11_N_SUPPORT */
+
+	MlmeEnqueue(pAd, SYNC_STATE_MACHINE, MT2_BEACON_TIMEOUT, 0, NULL, 0);
+	RTMP_MLME_HANDLER(pAd);
+}
+
+/* 
+	==========================================================================
+	Description:
+		Scan timeout handler, executed in timer thread
+
+	IRQL = DISPATCH_LEVEL
+
+	==========================================================================
+ */
+VOID ScanTimeout(
+	IN PVOID SystemSpecific1, 
+	IN PVOID FunctionContext, 
+	IN PVOID SystemSpecific2, 
+	IN PVOID SystemSpecific3) 
+{
+	RTMP_ADAPTER *pAd = (RTMP_ADAPTER *)FunctionContext;
+
+	
+	/* 
+	    Do nothing if the driver is starting halt state.
+	    This might happen when timer already been fired before cancel timer with mlmehalt
+	*/
+	if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS))
+		return;
+	
+	if (MlmeEnqueue(pAd, SYNC_STATE_MACHINE, MT2_SCAN_TIMEOUT, 0, NULL, 0))
+	{
+	RTMP_MLME_HANDLER(pAd);
+}
+	else
+	{
+		/* To prevent SyncMachine.CurrState is SCAN_LISTEN forever. */
+		pAd->MlmeAux.Channel = 0;
+		ScanNextChannel(pAd, OPMODE_STA);
+			RTMPSendWirelessEvent(pAd, IW_SCAN_ENQUEUE_FAIL_EVENT_FLAG, NULL, BSS0, 0); 
+	}
+}
+
+/* 
+	==========================================================================
+	Description:
+		MLME SCAN req state machine procedure
+	==========================================================================
+ */
+VOID MlmeScanReqAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+{
+	UCHAR          Ssid[MAX_LEN_OF_SSID], SsidLen, ScanType, BssType, BBPValue = 0;
+	BOOLEAN        TimerCancelled;
+	ULONG		   Now;
+	USHORT         Status;
+#ifdef RTMP_MAC_USB
+	if(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF))
+	{
+#ifdef CONFIG_PM
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND
+		if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_CPU_SUSPEND))
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */
+#endif /* CONFIG_PM */
+		{
+			RT28xxUsbAsicRadioOn(pAd);
+		}
+	}
+#endif /* RTMP_MAC_USB */
+       /*
+	    Check the total scan tries for one single OID command
+	    If this is the CCX 2.0 Case, skip that!
+	*/
+	if ( !RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_START_UP))
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("SYNC - MlmeScanReqAction before Startup\n"));
+		return;
+	}
+
+#ifdef PCIE_PS_SUPPORT
+    if ((OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_ADVANCE_POWER_SAVE_PCIE_DEVICE)) && 
+        (IDLE_ON(pAd)) &&
+		(pAd->StaCfg.bRadio == TRUE) &&
+		(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF)))
+	{
+	    if (pAd->StaCfg.PSControl.field.EnableNewPS == FALSE)
+		{
+			AsicSendCommandToMcu(pAd, 0x31, PowerWakeCID, 0x00, 0x02);   
+			AsicCheckCommanOk(pAd, PowerWakeCID);	
+			RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF);
+			DBGPRINT(RT_DEBUG_TRACE, ("PSM - Issue Wake up command \n"));
+		}
+		else
+		{
+			RT28xxPciAsicRadioOn(pAd, GUI_IDLE_POWER_SAVE);
+		}
+	}
+#endif /* PCIE_PS_SUPPORT */
+
+	/* first check the parameter sanity */
+	if (MlmeScanReqSanity(pAd, 
+						  Elem->Msg, 
+						  Elem->MsgLen, 
+						  &BssType, 
+						  (PCHAR)Ssid, 
+						  &SsidLen, 
+						  &ScanType)) 
+	{
+
+		/* 
+		     Check for channel load and noise hist request
+		     Suspend MSDU only at scan request, not the last two mentioned
+		     Suspend MSDU transmission here
+		*/
+		RTMPSuspendMsduTransmission(pAd);
+		
+		/*
+		    To prevent data lost.	
+		    Send an NULL data with turned PSM bit on to current associated AP before SCAN progress.
+		    And should send an NULL data with turned PSM bit off to AP, when scan progress done 
+		*/
+		if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED) && (INFRA_ON(pAd)))
+		{
+			RTMPSendNullFrame(pAd, 
+							  pAd->CommonCfg.TxRate, 
+							  (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_WMM_INUSED) ? TRUE:FALSE));
+			DBGPRINT(RT_DEBUG_TRACE, ("MlmeScanReqAction -- Send PSM Data frame for off channel RM, SCAN_IN_PROGRESS=%d!\n",
+											RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS)));
+				OS_WAIT(20);
+		}
+		
+			RTMPSendWirelessEvent(pAd, IW_SCANNING_EVENT_FLAG, NULL, BSS0, 0);
+
+		NdisGetSystemUpTime(&Now);
+		pAd->StaCfg.LastScanTime = Now;
+		/* reset all the timers */
+		RTMPCancelTimer(&pAd->MlmeAux.BeaconTimer, &TimerCancelled);
+		RTMPCancelTimer(&pAd->MlmeAux.ScanTimer, &TimerCancelled);
+
+		/* record desired BSS parameters */
+		pAd->MlmeAux.BssType = BssType;
+		pAd->MlmeAux.ScanType = ScanType;
+		pAd->MlmeAux.SsidLen = SsidLen;
+        NdisZeroMemory(pAd->MlmeAux.Ssid, MAX_LEN_OF_SSID);
+		NdisMoveMemory(pAd->MlmeAux.Ssid, Ssid, SsidLen);
+
+		/*
+			Scanning was pending (for fast scanning)
+		*/
+		if ((pAd->StaCfg.bImprovedScan) && (pAd->Mlme.SyncMachine.CurrState == SCAN_PENDING))
+		{
+			pAd->MlmeAux.Channel = pAd->StaCfg.LastScanChannel;
+		}
+		else
+		{
+			if (pAd->StaCfg.bFastConnect && (pAd->CommonCfg.Channel != 0) && !pAd->StaCfg.bNotFirstScan)
+			{
+				pAd->MlmeAux.Channel = pAd->CommonCfg.Channel;
+			}
+			else
+				/* start from the first channel */
+				pAd->MlmeAux.Channel = FirstChannel(pAd);
+		}
+
+		/* Let BBP register at 20MHz to do scan */
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
+		BBPValue &= (~0x18);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
+		DBGPRINT(RT_DEBUG_TRACE, ("SYNC - BBP R4 to 20MHz.l\n"));
+#ifdef DOT11_N_SUPPORT
+#ifdef DOT11N_DRAFT3
+		/* Before scan, reset trigger event table. */
+		TriEventInit(pAd);
+#endif /* DOT11N_DRAFT3 */
+#endif /* DOT11_N_SUPPORT */
+
+
+		ScanNextChannel(pAd, OPMODE_STA);
+		pAd->Mlme.CntlMachine.CurrState = CNTL_WAIT_OID_LIST_SCAN;
+	} 
+	else 
+	{
+		DBGPRINT_ERR(("SYNC - MlmeScanReqAction() sanity check fail\n"));
+		pAd->Mlme.SyncMachine.CurrState = SYNC_IDLE;
+		Status = MLME_INVALID_FORMAT;
+		MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_SCAN_CONF, 2, &Status, 0);
+	}
+}
+
+/* 
+	==========================================================================
+	Description:
+		MLME JOIN req state machine procedure
+	==========================================================================
+ */
+VOID MlmeJoinReqAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+{
+	UCHAR        BBPValue = 0;
+	BSS_ENTRY    *pBss;
+	BOOLEAN       TimerCancelled;
+	HEADER_802_11 Hdr80211;	
+	NDIS_STATUS   NStatus;
+	ULONG         FrameLen = 0;	
+	PUCHAR        pOutBuffer = NULL;
+	PUCHAR        pSupRate = NULL;
+	UCHAR         SupRateLen;
+	PUCHAR        pExtRate = NULL;
+	UCHAR         ExtRateLen;	
+	UCHAR         ASupRate[] = {0x8C, 0x12, 0x98, 0x24, 0xb0, 0x48, 0x60, 0x6C};
+	UCHAR         ASupRateLen = sizeof(ASupRate)/sizeof(UCHAR);	
+	MLME_JOIN_REQ_STRUCT *pInfo = (MLME_JOIN_REQ_STRUCT *)(Elem->Msg);
+
+#ifdef CONFIG_PM
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND
+	POS_COOKIE  pObj = (POS_COOKIE) pAd->OS_Cookie;
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */
+#endif /* CONFIG_PM */
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("SYNC - MlmeJoinReqAction(BSS #%ld)\n", pInfo->BssIdx));
+
+#ifdef CONFIG_PM
+#ifdef USB_SUPPORT_SELECTIVE_SUSPEND
+
+		if(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_CPU_SUSPEND))
+		{
+			if( (RTMP_Usb_AutoPM_Get_Interface(pObj->pUsb_Dev,pObj->intf)) == 1)
+			{
+				DBGPRINT(RT_DEBUG_TRACE, ("MlmeJoinReqAction: autopm_resume success\n"));
+				RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_SUSPEND);
+			}
+			else if ((RTMP_Usb_AutoPM_Get_Interface(pObj->pUsb_Dev,pObj->intf)) == (-1))
+			{
+				DBGPRINT(RT_DEBUG_ERROR, ("MlmeJoinReqAction autopm_resume fail ------\n"));
+				RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_SUSPEND);
+				return;
+			}
+			else
+				DBGPRINT(RT_DEBUG_TRACE, ("MlmeJoinReqAction: autopm_resume do nothing \n"));
+
+		}
+		else
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("MlmeJoinReqAction: fRTMP_ADAPTER_CPU_SUSPEND\n"));
+			return;
+		}
+
+#endif /* USB_SUPPORT_SELECTIVE_SUSPEND */
+#endif /* CONFIG_PM */
+
+
+
+#ifdef PCIE_PS_SUPPORT
+    if ((OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_ADVANCE_POWER_SAVE_PCIE_DEVICE)) && 
+        (IDLE_ON(pAd)) &&
+		(pAd->StaCfg.bRadio == TRUE) &&
+		(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_IDLE_RADIO_OFF)))
+	{
+		RT28xxPciAsicRadioOn(pAd, GUI_IDLE_POWER_SAVE);
+	}
+#endif /* PCIE_PS_SUPPORT */
+
+	/* reset all the timers */
+	RTMPCancelTimer(&pAd->MlmeAux.ScanTimer, &TimerCancelled);
+	RTMPCancelTimer(&pAd->MlmeAux.BeaconTimer, &TimerCancelled);
+
+	pBss = &pAd->MlmeAux.SsidBssTab.BssEntry[pInfo->BssIdx];
+
+	/* record the desired SSID & BSSID we're waiting for */
+	COPY_MAC_ADDR(pAd->MlmeAux.Bssid, pBss->Bssid);
+	
+	/* If AP's SSID is not hidden, it is OK for updating ssid to MlmeAux again. */
+	if (pBss->Hidden == 0)
+	{
+		RTMPZeroMemory(pAd->MlmeAux.Ssid, MAX_LEN_OF_SSID);
+		NdisMoveMemory(pAd->MlmeAux.Ssid, pBss->Ssid, pBss->SsidLen);	
+	pAd->MlmeAux.SsidLen = pBss->SsidLen;
+	}
+	
+	pAd->MlmeAux.BssType = pBss->BssType;
+	pAd->MlmeAux.Channel = pBss->Channel;
+	pAd->MlmeAux.CentralChannel = pBss->CentralChannel;
+	
+#ifdef EXT_BUILD_CHANNEL_LIST
+	/* Country IE of the AP will be evaluated and will be used. */
+	if ((pAd->StaCfg.IEEE80211dClientMode != Rt802_11_D_None) &&
+		(pBss->bHasCountryIE == TRUE))
+	{
+		NdisMoveMemory(&pAd->CommonCfg.CountryCode[0], &pBss->CountryString[0], 2);
+		if (pBss->CountryString[2] == 'I')
+			pAd->CommonCfg.Geography = IDOR;
+		else if (pBss->CountryString[2] == 'O')
+			pAd->CommonCfg.Geography = ODOR;
+		else
+			pAd->CommonCfg.Geography = BOTH;
+		BuildChannelListEx(pAd);
+	}
+#endif /* EXT_BUILD_CHANNEL_LIST */
+	
+	/* Let BBP register at 20MHz to do scan */
+	RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
+	BBPValue &= (~0x18);
+	RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
+	pAd->CommonCfg.BBPCurrentBW = BW_20;
+	DBGPRINT(RT_DEBUG_TRACE, ("SYNC - BBP R4 to 20MHz.l\n"));
+
+	/* switch channel and waiting for beacon timer */
+	AsicSwitchChannel(pAd, pAd->MlmeAux.Channel, FALSE);
+	AsicLockChannel(pAd, pAd->MlmeAux.Channel);
+
+
+	RTMPSetTimer(&pAd->MlmeAux.BeaconTimer, JOIN_TIMEOUT);
+
+    do
+	{
+		if (((pAd->CommonCfg.bIEEE80211H == 1) && 
+            (pAd->MlmeAux.Channel > 14) && 
+             RadarChannelCheck(pAd, pAd->MlmeAux.Channel))
+#ifdef CARRIER_DETECTION_SUPPORT /* Roger sync Carrier */             
+             || (pAd->CommonCfg.CarrierDetect.Enable == TRUE)
+#endif /* CARRIER_DETECTION_SUPPORT */
+            )
+		{
+			/*
+			    We can't send any Probe request frame to meet 802.11h.
+			*/
+			if (pBss->Hidden == 0)
+			break;
+		}
+        
+	/*
+	    send probe request
+	*/
+	NStatus = MlmeAllocateMemory(pAd, &pOutBuffer);
+	if (NStatus == NDIS_STATUS_SUCCESS)
+	{
+		if (pAd->MlmeAux.Channel <= 14)
+		{
+			pSupRate = pAd->CommonCfg.SupRate;
+			SupRateLen = pAd->CommonCfg.SupRateLen;
+			pExtRate = pAd->CommonCfg.ExtRate;
+			ExtRateLen = pAd->CommonCfg.ExtRateLen;
+		}
+		else
+		{
+			/*
+		           Overwrite Support Rate, CCK rate are not allowed
+			*/
+			pSupRate = ASupRate;
+			SupRateLen = ASupRateLen;
+			ExtRateLen = 0;
+		}
+
+		if (pAd->MlmeAux.BssType == BSS_INFRA)
+			MgtMacHeaderInit(pAd, &Hdr80211, SUBTYPE_PROBE_REQ, 0, pAd->MlmeAux.Bssid,
+								pAd->MlmeAux.Bssid);
+		else
+			MgtMacHeaderInit(pAd, &Hdr80211, SUBTYPE_PROBE_REQ, 0, BROADCAST_ADDR,
+								BROADCAST_ADDR);
+
+		MakeOutgoingFrame(pOutBuffer,               &FrameLen,
+						  sizeof(HEADER_802_11),    &Hdr80211,
+						  1,                        &SsidIe,
+						  1,                        &pAd->MlmeAux.SsidLen,
+						  pAd->MlmeAux.SsidLen,	    pAd->MlmeAux.Ssid,
+						  1,                        &SupRateIe,
+						  1,                        &SupRateLen,
+						  SupRateLen,               pSupRate,
+						  END_OF_ARGS);
+
+		if (ExtRateLen)
+		{
+			ULONG Tmp;
+			MakeOutgoingFrame(pOutBuffer + FrameLen,            &Tmp,
+							  1,                                &ExtRateIe,
+							  1,                                &ExtRateLen,
+							  ExtRateLen,                       pExtRate, 
+							  END_OF_ARGS);
+			FrameLen += Tmp;
+		}
+		
+
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+		if ((pAd->OpMode == OPMODE_STA) &&
+			(pAd->StaCfg.WpaSupplicantUP != WPA_SUPPLICANT_DISABLE) &&
+			(pAd->StaCfg.WpsProbeReqIeLen != 0))
+		{
+			ULONG 		WpsTmpLen = 0;
+			
+			MakeOutgoingFrame(pOutBuffer + FrameLen,              &WpsTmpLen,
+							pAd->StaCfg.WpsProbeReqIeLen,	pAd->StaCfg.pWpsProbeReqIe,
+							END_OF_ARGS);
+
+			FrameLen += WpsTmpLen;
+		}
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+		MiniportMMRequest(pAd, 0, pOutBuffer, FrameLen);
+		MlmeFreeMemory(pAd, pOutBuffer);
+	}
+    } while (FALSE);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("SYNC - Switch to ch %d, Wait BEACON from %02x:%02x:%02x:%02x:%02x:%02x\n", 
+		pBss->Channel, pBss->Bssid[0], pBss->Bssid[1], pBss->Bssid[2], pBss->Bssid[3], pBss->Bssid[4], pBss->Bssid[5]));
+
+	pAd->Mlme.SyncMachine.CurrState = JOIN_WAIT_BEACON;
+}
+
+/* 
+	==========================================================================
+	Description:
+		MLME START Request state machine procedure, starting an IBSS
+	==========================================================================
+ */
+VOID MlmeStartReqAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+{
+	UCHAR         Ssid[MAX_LEN_OF_SSID], SsidLen; 
+	BOOLEAN       TimerCancelled;
+
+	/* New for WPA security suites */
+	UCHAR						*VarIE = NULL;
+	NDIS_802_11_VARIABLE_IEs	*pVIE = NULL;
+	LARGE_INTEGER				TimeStamp;
+	BOOLEAN Privacy;
+	USHORT Status;
+
+
+	/* allocate memory */
+	os_alloc_mem(NULL, (UCHAR **)&VarIE, MAX_VIE_LEN);
+	if (VarIE == NULL)
+	{
+		DBGPRINT(RT_DEBUG_ERROR, ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+		return;
+	}
+
+	/* Init Variable IE structure */
+	pVIE = (PNDIS_802_11_VARIABLE_IEs) VarIE;
+	pVIE->Length = 0;
+	TimeStamp.u.LowPart  = 0;
+	TimeStamp.u.HighPart = 0;
+
+	if ((MlmeStartReqSanity(pAd, Elem->Msg, Elem->MsgLen, (PCHAR)Ssid, &SsidLen)) &&
+		(CHAN_PropertyCheck(pAd, pAd->MlmeAux.Channel, CHANNEL_NO_IBSS) == FALSE))
+	{
+		/* reset all the timers */
+		RTMPCancelTimer(&pAd->MlmeAux.ScanTimer, &TimerCancelled);
+		RTMPCancelTimer(&pAd->MlmeAux.BeaconTimer, &TimerCancelled);
+
+		/*
+		    Start a new IBSS. All IBSS parameters are decided now....
+		*/
+		DBGPRINT(RT_DEBUG_TRACE, ("MlmeStartReqAction - Start a new IBSS. All IBSS parameters are decided now.... \n"));
+		pAd->MlmeAux.BssType           = BSS_ADHOC;
+		NdisMoveMemory(pAd->MlmeAux.Ssid, Ssid, SsidLen); 
+		pAd->MlmeAux.SsidLen           = SsidLen;
+
+		/* generate a radom number as BSSID */
+		MacAddrRandomBssid(pAd, pAd->MlmeAux.Bssid);
+		DBGPRINT(RT_DEBUG_TRACE, ("MlmeStartReqAction - generate a radom number as BSSID \n"));
+
+		Privacy = (pAd->StaCfg.WepStatus == Ndis802_11Encryption1Enabled) || 
+				  (pAd->StaCfg.WepStatus == Ndis802_11Encryption2Enabled) || 
+				  (pAd->StaCfg.WepStatus == Ndis802_11Encryption3Enabled);
+		pAd->MlmeAux.CapabilityInfo    = CAP_GENERATE(0,1,Privacy, (pAd->CommonCfg.TxPreamble == Rt802_11PreambleShort), 1, 0);
+		pAd->MlmeAux.BeaconPeriod      = pAd->CommonCfg.BeaconPeriod;
+		pAd->MlmeAux.AtimWin           = pAd->StaCfg.AtimWin;
+		pAd->MlmeAux.Channel           = pAd->CommonCfg.Channel;
+
+		pAd->CommonCfg.CentralChannel  = pAd->CommonCfg.Channel;
+		pAd->MlmeAux.CentralChannel    = pAd->CommonCfg.CentralChannel;
+
+		pAd->MlmeAux.SupRateLen= pAd->CommonCfg.SupRateLen;
+		NdisMoveMemory(pAd->MlmeAux.SupRate, pAd->CommonCfg.SupRate, MAX_LEN_OF_SUPPORTED_RATES);
+		RTMPCheckRates(pAd, pAd->MlmeAux.SupRate, &pAd->MlmeAux.SupRateLen);
+		pAd->MlmeAux.ExtRateLen = pAd->CommonCfg.ExtRateLen;
+		NdisMoveMemory(pAd->MlmeAux.ExtRate, pAd->CommonCfg.ExtRate, MAX_LEN_OF_SUPPORTED_RATES);
+		RTMPCheckRates(pAd, pAd->MlmeAux.ExtRate, &pAd->MlmeAux.ExtRateLen);
+#ifdef DOT11_N_SUPPORT
+		if ((pAd->CommonCfg.PhyMode >= PHY_11ABGN_MIXED) && (pAd->StaCfg.bAdhocN == TRUE))
+		{
+			RTMPUpdateHTIE(&pAd->CommonCfg.DesiredHtPhy, &pAd->StaCfg.DesiredHtPhyInfo.MCSSet[0], &pAd->MlmeAux.HtCapability, &pAd->MlmeAux.AddHtInfo);
+			pAd->MlmeAux.HtCapabilityLen = sizeof(HT_CAPABILITY_IE);
+			/* Not turn pAd->StaActive.SupportedHtPhy.bHtEnable = TRUE here. */
+			DBGPRINT(RT_DEBUG_TRACE, ("SYNC -pAd->StaActive.SupportedHtPhy.bHtEnable = TRUE\n"));
+		}
+		else
+#endif /* DOT11_N_SUPPORT */
+		{
+			pAd->MlmeAux.HtCapabilityLen = 0;
+			pAd->StaActive.SupportedPhyInfo.bHtEnable = FALSE;
+			NdisZeroMemory(&pAd->StaActive.SupportedPhyInfo.MCSSet[0], 16);
+		}
+		/* temporarily not support QOS in IBSS */
+		NdisZeroMemory(&pAd->MlmeAux.APEdcaParm, sizeof(EDCA_PARM));
+		NdisZeroMemory(&pAd->MlmeAux.APQbssLoad, sizeof(QBSS_LOAD_PARM));
+		NdisZeroMemory(&pAd->MlmeAux.APQosCapability, sizeof(QOS_CAPABILITY_PARM));
+
+		AsicSwitchChannel(pAd, pAd->MlmeAux.Channel, FALSE);
+		AsicLockChannel(pAd, pAd->MlmeAux.Channel);
+
+		DBGPRINT(RT_DEBUG_TRACE, ("SYNC - MlmeStartReqAction(ch= %d,sup rates= %d, ext rates=%d)\n",
+			pAd->MlmeAux.Channel, pAd->MlmeAux.SupRateLen, pAd->MlmeAux.ExtRateLen));
+
+		pAd->Mlme.SyncMachine.CurrState = SYNC_IDLE;
+		Status = MLME_SUCCESS;
+		MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_START_CONF, 2, &Status, 0);
+	} 
+	else 
+	{
+		DBGPRINT_ERR(("SYNC - MlmeStartReqAction() sanity check fail.\n"));
+		pAd->Mlme.SyncMachine.CurrState = SYNC_IDLE;
+		Status = MLME_INVALID_FORMAT;
+		MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_START_CONF, 2, &Status, 0);
+	}
+
+	if (VarIE != NULL)
+		os_free_mem(NULL, VarIE);
+}
+
+/* 
+	==========================================================================
+	Description:
+		peer sends beacon back when scanning
+	==========================================================================
+ */
+VOID PeerBeaconAtScanAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+{
+	UCHAR           Bssid[MAC_ADDR_LEN], Addr2[MAC_ADDR_LEN];
+	UCHAR           /* Ssid[MAX_LEN_OF_SSID], */ BssType, Channel = 0, NewChannel,
+					SsidLen=0, DtimCount, DtimPeriod, BcastFlag, MessageToMe;
+	UCHAR			*Ssid = NULL;
+	CF_PARM         CfParm;
+	USHORT          BeaconPeriod, AtimWin, CapabilityInfo;
+	PFRAME_802_11   pFrame;
+	LARGE_INTEGER   TimeStamp;
+	UCHAR           Erp;
+	UCHAR         	SupRate[MAX_LEN_OF_SUPPORTED_RATES], ExtRate[MAX_LEN_OF_SUPPORTED_RATES];
+	UCHAR		  	SupRateLen, ExtRateLen;
+	USHORT 			LenVIE;
+	UCHAR			CkipFlag;
+	UCHAR			AironetCellPowerLimit;
+	EDCA_PARM       EdcaParm;
+	QBSS_LOAD_PARM  QbssLoad;
+	QOS_CAPABILITY_PARM QosCapability;
+	ULONG						RalinkIe;
+	UCHAR						*VarIE = NULL;
+	NDIS_802_11_VARIABLE_IEs	*pVIE = NULL;
+	HT_CAPABILITY_IE		*pHtCapability = NULL;
+	ADD_HT_INFO_IE		*pAddHtInfo = NULL;	/* AP might use this additional ht info IE */
+	UCHAR			HtCapabilityLen = 0, PreNHtCapabilityLen = 0;
+	UCHAR			AddHtInfoLen;
+	UCHAR			NewExtChannelOffset = 0xff;
+
+	EXT_CAP_INFO_ELEMENT	ExtCapInfo;
+
+	/* allocate memory */
+	os_alloc_mem(NULL, (UCHAR **)&Ssid, MAX_LEN_OF_SSID);
+	if (Ssid == NULL)
+		goto LabelErr;
+	os_alloc_mem(NULL, (UCHAR **)&VarIE, MAX_VIE_LEN);
+	if (VarIE == NULL)
+		goto LabelErr;
+	os_alloc_mem(NULL, (UCHAR **)&pHtCapability, sizeof(HT_CAPABILITY_IE));
+	if (pHtCapability == NULL)
+		goto LabelErr;
+	os_alloc_mem(NULL, (UCHAR **)&pAddHtInfo, sizeof(ADD_HT_INFO_IE));
+	if (pAddHtInfo == NULL)
+		goto LabelErr;
+
+	NdisZeroMemory(Ssid, MAX_LEN_OF_SSID);
+	pFrame = (PFRAME_802_11) Elem->Msg;
+	/* Init Variable IE structure */
+	pVIE = (PNDIS_802_11_VARIABLE_IEs) VarIE;
+	pVIE->Length = 0;
+#ifdef DOT11_N_SUPPORT
+    RTMPZeroMemory(pHtCapability, sizeof(HT_CAPABILITY_IE));
+	RTMPZeroMemory(pAddHtInfo, sizeof(ADD_HT_INFO_IE));
+#endif /* DOT11_N_SUPPORT */
+
+	NdisZeroMemory(&QbssLoad, sizeof(QBSS_LOAD_PARM)); /* woody */
+	if (PeerBeaconAndProbeRspSanity(pAd, 
+								Elem->Msg, 
+								Elem->MsgLen, 
+								Elem->Channel,
+								Addr2, 
+								Bssid, 
+								(PCHAR)Ssid, 
+								&SsidLen, 
+								&BssType, 
+								&BeaconPeriod, 
+								&Channel, 
+								&NewChannel,
+								&TimeStamp, 
+								&CfParm, 
+								&AtimWin, 
+								&CapabilityInfo, 
+								&Erp,
+								&DtimCount, 
+								&DtimPeriod, 
+								&BcastFlag, 
+								&MessageToMe, 
+								SupRate,
+								&SupRateLen,
+								ExtRate,
+								&ExtRateLen,
+								&CkipFlag,
+								&AironetCellPowerLimit,
+								&EdcaParm,
+								&QbssLoad,
+								&QosCapability,
+								&RalinkIe,
+								&HtCapabilityLen,
+#ifdef CONFIG_STA_SUPPORT
+								&PreNHtCapabilityLen,
+#endif /* CONFIG_STA_SUPPORT */
+								pHtCapability,
+								&ExtCapInfo,
+								&AddHtInfoLen,
+								pAddHtInfo,
+								&NewExtChannelOffset,
+								&LenVIE,
+								pVIE)) 
+	{
+		ULONG Idx = 0;
+		CHAR Rssi = 0;
+
+		Idx = BssTableSearch(&pAd->ScanTab, Bssid, Channel);
+		if (Idx != BSS_NOT_FOUND) 
+			Rssi = pAd->ScanTab.BssEntry[Idx].Rssi;
+
+		Rssi = RTMPMaxRssi(pAd, ConvertToRssi(pAd, Elem->Rssi0, RSSI_0), ConvertToRssi(pAd, Elem->Rssi1, RSSI_1), ConvertToRssi(pAd, Elem->Rssi2, RSSI_2));
+
+
+#ifdef DOT11_N_SUPPORT
+		if ((HtCapabilityLen > 0) || (PreNHtCapabilityLen > 0))
+			HtCapabilityLen = SIZE_HT_CAP_IE;
+#endif /* DOT11_N_SUPPORT */
+
+		Idx = BssTableSetEntry(pAd, &pAd->ScanTab, Bssid, (PCHAR)Ssid, SsidLen, BssType, BeaconPeriod,
+					  &CfParm, AtimWin, CapabilityInfo, SupRate, SupRateLen, ExtRate, ExtRateLen,  pHtCapability,
+					 pAddHtInfo, HtCapabilityLen, AddHtInfoLen, NewExtChannelOffset, Channel, Rssi, TimeStamp, CkipFlag, 
+					 &EdcaParm, &QosCapability, &QbssLoad, LenVIE, pVIE);
+#ifdef DOT11_N_SUPPORT
+		/* TODO: Check for things need to do when enable "DOT11V_WNM_SUPPORT" */
+#ifdef DOT11N_DRAFT3
+		/* Check if this scan channel is the effeced channel */
+		if (INFRA_ON(pAd) 
+			&& (pAd->CommonCfg.bBssCoexEnable == TRUE) 
+			&& ((Channel > 0) && (Channel <= 14)))
+		{
+			int chListIdx;
+
+			/* 
+				First we find the channel list idx by the channel number
+			*/
+			for (chListIdx = 0; chListIdx < pAd->ChannelListNum; chListIdx++)
+			{
+				if (Channel == pAd->ChannelList[chListIdx].Channel)
+					break;
+			}
+
+			if (chListIdx < pAd->ChannelListNum)
+			{
+				/* 
+					If this channel is effected channel for the 20/40 coex operation. Check the related IEs.
+				*/
+				if (pAd->ChannelList[chListIdx].bEffectedChannel == TRUE)
+				{
+					UCHAR RegClass;
+					OVERLAP_BSS_SCAN_IE	BssScan;
+
+					/* Read Beacon's Reg Class IE if any. */
+					PeerBeaconAndProbeRspSanity2(pAd, Elem->Msg, Elem->MsgLen, &BssScan, &RegClass);
+					TriEventTableSetEntry(pAd, &pAd->CommonCfg.TriggerEventTab, Bssid, pHtCapability, HtCapabilityLen, RegClass, Channel);
+				}
+			}
+		}
+#endif /* DOT11N_DRAFT3 */
+#endif /* DOT11_N_SUPPORT */
+		if (Idx != BSS_NOT_FOUND)
+		{
+			PBSS_ENTRY	pBssEntry = &pAd->ScanTab.BssEntry[Idx];
+			NdisMoveMemory(pBssEntry->PTSF, &Elem->Msg[24], 4);
+			NdisMoveMemory(&pBssEntry->TTSF[0], &Elem->TimeStamp.u.LowPart, 4);
+			NdisMoveMemory(&pBssEntry->TTSF[4], &Elem->TimeStamp.u.LowPart, 4);
+
+			pBssEntry->MinSNR = Elem->Signal % 10;
+			if (pBssEntry->MinSNR == 0)
+				pBssEntry->MinSNR = -5;
+
+			NdisMoveMemory(pBssEntry->MacAddr, Addr2, MAC_ADDR_LEN);
+
+			if ((pFrame->Hdr.FC.SubType == SUBTYPE_PROBE_RSP) &&
+				(LenVIE != 0))
+			{
+				pBssEntry->VarIeFromProbeRspLen = 0;
+				if (pBssEntry->pVarIeFromProbRsp)
+				{
+					pBssEntry->VarIeFromProbeRspLen = LenVIE;
+					RTMPZeroMemory(pBssEntry->pVarIeFromProbRsp, MAX_VIE_LEN);
+					RTMPMoveMemory(pBssEntry->pVarIeFromProbRsp, pVIE, LenVIE);
+				}
+			}
+		}
+
+#ifdef LINUX
+#ifdef RT_CFG80211_SUPPORT
+		RT_CFG80211_SCANNING_INFORM(pAd, Idx, Elem->Channel, (UCHAR *)pFrame,
+									Elem->MsgLen, Rssi);
+#endif /* RT_CFG80211_SUPPORT */
+#endif /* LINUX */
+	}
+	/* sanity check fail, ignored */
+	goto LabelOK;
+
+LabelErr:
+	DBGPRINT(RT_DEBUG_ERROR, ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+
+LabelOK:
+	if (Ssid != NULL)
+		os_free_mem(NULL, Ssid);
+	if (VarIE != NULL)
+		os_free_mem(NULL, VarIE);
+	if (pHtCapability != NULL)
+		os_free_mem(NULL, pHtCapability);
+	if (pAddHtInfo != NULL)
+		os_free_mem(NULL, pAddHtInfo);
+	return;
+}
+
+/* 
+	==========================================================================
+	Description:
+		When waiting joining the (I)BSS, beacon received from external
+	==========================================================================
+ */
+VOID PeerBeaconAtJoinAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+{
+	UCHAR         Bssid[MAC_ADDR_LEN], Addr2[MAC_ADDR_LEN];
+	UCHAR         /* Ssid[MAX_LEN_OF_SSID], */ SsidLen=0, BssType, Channel, MessageToMe, 
+				  DtimCount, DtimPeriod, BcastFlag, NewChannel; 
+	UCHAR			*Ssid = NULL;
+	LARGE_INTEGER TimeStamp;
+	USHORT        BeaconPeriod, AtimWin, CapabilityInfo;
+	CF_PARM       Cf;
+	BOOLEAN       TimerCancelled;
+	UCHAR         Erp;
+	UCHAR         SupRate[MAX_LEN_OF_SUPPORTED_RATES], ExtRate[MAX_LEN_OF_SUPPORTED_RATES];
+	UCHAR		  SupRateLen, ExtRateLen;
+	UCHAR         CkipFlag;
+	USHORT 		  LenVIE;
+	UCHAR		  AironetCellPowerLimit;
+	EDCA_PARM       EdcaParm;
+	QBSS_LOAD_PARM  QbssLoad;
+	QOS_CAPABILITY_PARM QosCapability;
+	USHORT        Status;
+	UCHAR						*VarIE = NULL;
+	NDIS_802_11_VARIABLE_IEs	*pVIE = NULL;
+	ULONG           RalinkIe;
+	ULONG         Idx = 0;
+	CHAR			Rssi = 0;
+	HT_CAPABILITY_IE		*pHtCapability = NULL;
+	ADD_HT_INFO_IE		*pAddHtInfo = NULL;	/* AP might use this additional ht info IE */
+	UCHAR				HtCapabilityLen = 0, PreNHtCapabilityLen = 0;
+	UCHAR			AddHtInfoLen;
+	UCHAR			NewExtChannelOffset = 0xff;
+#ifdef DOT11_N_SUPPORT
+	UCHAR			CentralChannel;
+	BOOLEAN			bAllowNrate = FALSE;
+#endif /* DOT11_N_SUPPORT */
+	EXT_CAP_INFO_ELEMENT	ExtCapInfo;
+
+
+	/* allocate memory */
+	os_alloc_mem(NULL, (UCHAR **)&Ssid, MAX_LEN_OF_SSID);
+	if (Ssid == NULL)
+		goto LabelErr;
+	os_alloc_mem(NULL, (UCHAR **)&VarIE, MAX_VIE_LEN);
+	if (VarIE == NULL)
+		goto LabelErr;
+	os_alloc_mem(NULL, (UCHAR **)&pHtCapability, sizeof(HT_CAPABILITY_IE));
+	if (pHtCapability == NULL)
+		goto LabelErr;
+	os_alloc_mem(NULL, (UCHAR **)&pAddHtInfo, sizeof(ADD_HT_INFO_IE));
+	if (pAddHtInfo == NULL)
+		goto LabelErr;
+
+	/* Init Variable IE structure */
+	pVIE = (PNDIS_802_11_VARIABLE_IEs) VarIE;
+	pVIE->Length = 0;
+    RTMPZeroMemory(pHtCapability, sizeof(HT_CAPABILITY_IE));
+	RTMPZeroMemory(pAddHtInfo, sizeof(ADD_HT_INFO_IE));
+
+	EdcaParm.bValid = FALSE;
+	if (PeerBeaconAndProbeRspSanity(pAd, 
+								Elem->Msg, 
+								Elem->MsgLen, 
+								Elem->Channel,
+								Addr2, 
+								Bssid, 
+								(PCHAR)Ssid, 
+								&SsidLen, 
+								&BssType, 
+								&BeaconPeriod, 
+								&Channel, 
+								&NewChannel,
+								&TimeStamp, 
+								&Cf, 
+								&AtimWin, 
+								&CapabilityInfo, 
+								&Erp,
+								&DtimCount, 
+								&DtimPeriod, 
+								&BcastFlag, 
+								&MessageToMe, 
+								SupRate,
+								&SupRateLen,
+								ExtRate,
+								&ExtRateLen,
+								&CkipFlag,
+								&AironetCellPowerLimit,
+								&EdcaParm,
+								&QbssLoad,
+								&QosCapability,
+								&RalinkIe,
+								&HtCapabilityLen,
+								&PreNHtCapabilityLen,
+								pHtCapability,
+								&ExtCapInfo,
+								&AddHtInfoLen,
+								pAddHtInfo,
+								&NewExtChannelOffset,
+								&LenVIE,
+								pVIE)) 
+	{
+		/* Disqualify 11b only adhoc when we are in 11g only adhoc mode */
+		if ((BssType == BSS_ADHOC) && (pAd->CommonCfg.PhyMode == PHY_11G) && ((SupRateLen+ExtRateLen)< 12))
+			goto LabelOK;
+
+		/*
+		    BEACON from desired BSS/IBSS found. We should be able to decide most
+		    BSS parameters here.
+		    Q. But what happen if this JOIN doesn't conclude a successful ASSOCIATEION?
+		        Do we need to receover back all parameters belonging to previous BSS?
+		    A. Should be not. There's no back-door recover to previous AP. It still need
+		        a new JOIN-AUTH-ASSOC sequence.
+		*/
+		if (MAC_ADDR_EQUAL(pAd->MlmeAux.Bssid, Bssid)) 
+		{
+			DBGPRINT(RT_DEBUG_TRACE, ("SYNC - receive desired BEACON at JoinWaitBeacon... Channel = %d\n", Channel));
+			RTMPCancelTimer(&pAd->MlmeAux.BeaconTimer, &TimerCancelled);
+
+			/* Update RSSI to prevent No signal display when cards first initialized */
+			pAd->StaCfg.RssiSample.LastRssi0	= ConvertToRssi(pAd, Elem->Rssi0, RSSI_0);
+			pAd->StaCfg.RssiSample.LastRssi1	= ConvertToRssi(pAd, Elem->Rssi1, RSSI_1);
+			pAd->StaCfg.RssiSample.LastRssi2	= ConvertToRssi(pAd, Elem->Rssi2, RSSI_2);
+			pAd->StaCfg.RssiSample.AvgRssi0	= pAd->StaCfg.RssiSample.LastRssi0;
+			pAd->StaCfg.RssiSample.AvgRssi0X8	= pAd->StaCfg.RssiSample.AvgRssi0 << 3;
+			pAd->StaCfg.RssiSample.AvgRssi1	= pAd->StaCfg.RssiSample.LastRssi1;
+			pAd->StaCfg.RssiSample.AvgRssi1X8	= pAd->StaCfg.RssiSample.AvgRssi1 << 3;
+			pAd->StaCfg.RssiSample.AvgRssi2	= pAd->StaCfg.RssiSample.LastRssi2;
+			pAd->StaCfg.RssiSample.AvgRssi2X8	= pAd->StaCfg.RssiSample.AvgRssi2 << 3;
+
+			/*
+			  We need to check if SSID only set to any, then we can record the current SSID.
+			  Otherwise will cause hidden SSID association failed. 
+			*/
+			if (pAd->MlmeAux.SsidLen == 0)
+			{
+				NdisMoveMemory(pAd->MlmeAux.Ssid, Ssid, SsidLen);
+				pAd->MlmeAux.SsidLen = SsidLen;
+			}
+			else
+			{
+				Idx = BssSsidTableSearch(&pAd->ScanTab, Bssid, pAd->MlmeAux.Ssid, pAd->MlmeAux.SsidLen, Channel);
+
+				if (Idx == BSS_NOT_FOUND)				
+				{
+					Rssi = RTMPMaxRssi(pAd, ConvertToRssi(pAd, Elem->Rssi0, RSSI_0), ConvertToRssi(pAd, Elem->Rssi1, RSSI_1), ConvertToRssi(pAd, Elem->Rssi2, RSSI_2));
+					Idx = BssTableSetEntry(pAd, &pAd->ScanTab, Bssid, (CHAR *) Ssid, SsidLen, BssType, BeaconPeriod,
+										&Cf, AtimWin, CapabilityInfo, SupRate, SupRateLen, ExtRate, ExtRateLen,  pHtCapability,
+										pAddHtInfo, HtCapabilityLen, AddHtInfoLen, NewExtChannelOffset, Channel, Rssi, TimeStamp, CkipFlag,
+										&EdcaParm, &QosCapability, &QbssLoad, LenVIE, pVIE);
+					if (Idx != BSS_NOT_FOUND)
+					{
+						NdisMoveMemory(pAd->ScanTab.BssEntry[Idx].PTSF, &Elem->Msg[24], 4);
+						NdisMoveMemory(&pAd->ScanTab.BssEntry[Idx].TTSF[0], &Elem->TimeStamp.u.LowPart, 4);
+						NdisMoveMemory(&pAd->ScanTab.BssEntry[Idx].TTSF[4], &Elem->TimeStamp.u.LowPart, 4);
+						CapabilityInfo = pAd->ScanTab.BssEntry[Idx].CapabilityInfo;
+
+						pAd->ScanTab.BssEntry[Idx].MinSNR = Elem->Signal % 10;
+						if (pAd->ScanTab.BssEntry[Idx].MinSNR == 0)
+							pAd->ScanTab.BssEntry[Idx].MinSNR = -5;
+
+						NdisMoveMemory(pAd->ScanTab.BssEntry[Idx].MacAddr, Addr2, MAC_ADDR_LEN);
+					}
+				}
+				else
+				{
+#ifdef WPA_SUPPLICANT_SUPPORT
+					if (pAd->StaCfg.WpaSupplicantUP & WPA_SUPPLICANT_ENABLE_WPS) ;
+					else
+#endif /* WPA_SUPPLICANT_SUPPORT */
+					{
+
+						/*
+						    Check if AP privacy is different Staion, if yes, 
+						    start a new scan and ignore the frame 
+						    (often happen during AP change privacy at short time)
+						*/
+						if ((((pAd->StaCfg.WepStatus != Ndis802_11WEPDisabled) << 4) ^
+							CapabilityInfo) &
+							0x0010)
+						{	
+							MLME_SCAN_REQ_STRUCT ScanReq;
+							DBGPRINT(RT_DEBUG_TRACE, ("%s:AP privacy %d is differenct from STA privacy%d\n", __FUNCTION__, (CapabilityInfo & 0x0010) >> 4 ,pAd->StaCfg.WepStatus != Ndis802_11WEPDisabled));
+							ScanParmFill(pAd, &ScanReq, (PSTRING) pAd->MlmeAux.Ssid, pAd->MlmeAux.SsidLen, BSS_ANY, SCAN_ACTIVE);
+							MlmeEnqueue(pAd, SYNC_STATE_MACHINE, MT2_MLME_SCAN_REQ, sizeof(MLME_SCAN_REQ_STRUCT), &ScanReq, 0);
+							pAd->Mlme.CntlMachine.CurrState = CNTL_WAIT_OID_LIST_SCAN;
+							NdisGetSystemUpTime(&pAd->StaCfg.LastScanTime);
+							goto LabelOK;
+						}
+					}
+
+					/*
+					    Multiple SSID case, used correct CapabilityInfo
+					*/
+					CapabilityInfo = pAd->ScanTab.BssEntry[Idx].CapabilityInfo;
+				}
+			}
+			/*NdisMoveMemory(pAd->MlmeAux.Bssid, Bssid, MAC_ADDR_LEN);*/
+			pAd->MlmeAux.CapabilityInfo = CapabilityInfo & SUPPORTED_CAPABILITY_INFO;
+			pAd->MlmeAux.BssType = BssType;
+			pAd->MlmeAux.BeaconPeriod = BeaconPeriod;
+
+			/*
+				Some AP may carrys wrong beacon interval (ex. 0) in Beacon IE.
+				We need to check here for preventing divided by 0 error.
+			*/
+			if (pAd->MlmeAux.BeaconPeriod == 0)
+				pAd->MlmeAux.BeaconPeriod = 100;
+			
+			pAd->MlmeAux.Channel = Channel;
+			pAd->MlmeAux.AtimWin = AtimWin;
+			pAd->MlmeAux.CfpPeriod = Cf.CfpPeriod;
+			pAd->MlmeAux.CfpMaxDuration = Cf.CfpMaxDuration;
+			pAd->MlmeAux.APRalinkIe = RalinkIe;
+
+			/* 
+			    Copy AP's supported rate to MlmeAux for creating assoication request
+			    Also filter out not supported rate
+			*/
+			pAd->MlmeAux.SupRateLen = SupRateLen;
+			NdisMoveMemory(pAd->MlmeAux.SupRate, SupRate, SupRateLen);
+			RTMPCheckRates(pAd, pAd->MlmeAux.SupRate, &pAd->MlmeAux.SupRateLen);
+			pAd->MlmeAux.ExtRateLen = ExtRateLen;
+			NdisMoveMemory(pAd->MlmeAux.ExtRate, ExtRate, ExtRateLen);
+			RTMPCheckRates(pAd, pAd->MlmeAux.ExtRate, &pAd->MlmeAux.ExtRateLen);
+
+            NdisZeroMemory(pAd->StaActive.SupportedPhyInfo.MCSSet, 16);
+
+
+			/*  Get the ext capability info element */
+			NdisMoveMemory(&pAd->MlmeAux.ExtCapInfo, &ExtCapInfo,sizeof(ExtCapInfo));
+
+#ifdef DOT11_N_SUPPORT
+#ifdef DOT11N_DRAFT3
+			DBGPRINT(RT_DEBUG_TRACE, ("MlmeAux.ExtCapInfo=%d\n", pAd->MlmeAux.ExtCapInfo.BssCoexistMgmtSupport));
+			if (pAd->CommonCfg.bBssCoexEnable == TRUE)
+				pAd->CommonCfg.ExtCapIE.BssCoexistMgmtSupport = 1;
+#endif /* DOT11N_DRAFT3 */
+
+			if (((pAd->StaCfg.WepStatus != Ndis802_11WEPEnabled) && (pAd->StaCfg.WepStatus != Ndis802_11Encryption2Enabled))
+				|| (pAd->CommonCfg.HT_DisallowTKIP == FALSE))
+			{
+				if ((pAd->StaCfg.BssType == BSS_INFRA) || 
+					((pAd->StaCfg.BssType == BSS_ADHOC) && (pAd->StaCfg.bAdhocN == TRUE)))
+				bAllowNrate = TRUE;			
+			}
+			
+			pAd->MlmeAux.NewExtChannelOffset = NewExtChannelOffset;
+			pAd->MlmeAux.HtCapabilityLen = HtCapabilityLen;
+
+			RTMPZeroMemory(&pAd->MlmeAux.HtCapability, SIZE_HT_CAP_IE);
+			/* filter out un-supported ht rates */
+			if (((HtCapabilityLen > 0) || (PreNHtCapabilityLen > 0)) && 
+				(pAd->StaCfg.DesiredHtPhyInfo.bHtEnable) &&
+				((pAd->CommonCfg.PhyMode >= PHY_11ABGN_MIXED) && bAllowNrate))
+			{
+   				RTMPMoveMemory(&pAd->MlmeAux.AddHtInfo, pAddHtInfo, SIZE_ADD_HT_INFO_IE);
+				
+                		/* StaActive.SupportedHtPhy.MCSSet stores Peer AP's 11n Rx capability */
+				NdisMoveMemory(pAd->StaActive.SupportedPhyInfo.MCSSet, pHtCapability->MCSSet, 16);
+				pAd->MlmeAux.NewExtChannelOffset = NewExtChannelOffset;
+				pAd->MlmeAux.HtCapabilityLen = SIZE_HT_CAP_IE;
+				pAd->StaActive.SupportedPhyInfo.bHtEnable = TRUE;
+				if (PreNHtCapabilityLen > 0)
+					pAd->StaActive.SupportedPhyInfo.bPreNHt = TRUE;
+				RTMPCheckHt(pAd, BSSID_WCID, pHtCapability, pAddHtInfo);
+				/* Copy AP Parameter to StaActive.  This is also in LinkUp. */
+				DBGPRINT(RT_DEBUG_TRACE, ("PeerBeaconAtJoinAction! (MpduDensity=%d, MaxRAmpduFactor=%d, BW=%d)\n", 
+					pAd->StaActive.SupportedHtPhy.MpduDensity, pAd->StaActive.SupportedHtPhy.MaxRAmpduFactor, pHtCapability->HtCapInfo.ChannelWidth));
+				
+				if (AddHtInfoLen > 0)
+				{
+					CentralChannel = pAddHtInfo->ControlChan;
+		 			/* Check again the Bandwidth capability of this AP. */
+		 			if ((pAddHtInfo->ControlChan > 2)&& (pAddHtInfo->AddHtInfo.ExtChanOffset == EXTCHA_BELOW) && (pHtCapability->HtCapInfo.ChannelWidth == BW_40))
+		 			{
+		 				CentralChannel = pAddHtInfo->ControlChan - 2;
+		 			}
+		 			else if ((pAddHtInfo->AddHtInfo.ExtChanOffset == EXTCHA_ABOVE) && (pHtCapability->HtCapInfo.ChannelWidth == BW_40))
+		 			{
+		 				CentralChannel = pAddHtInfo->ControlChan + 2;
+		 			}
+                    
+                    /* Check Error . */
+					if (pAd->MlmeAux.CentralChannel != CentralChannel)
+		 				DBGPRINT(RT_DEBUG_ERROR, ("PeerBeaconAtJoinAction HT===>Beacon Central Channel = %d, Control Channel = %d. Mlmeaux CentralChannel = %d\n", CentralChannel, pAddHtInfo->ControlChan, pAd->MlmeAux.CentralChannel));
+
+		 			DBGPRINT(RT_DEBUG_TRACE, ("PeerBeaconAtJoinAction HT===>Central Channel = %d, Control Channel = %d,  .\n", CentralChannel, pAddHtInfo->ControlChan));
+
+				}
+				
+			}
+			else
+#endif /* DOT11_N_SUPPORT */
+			{
+   				/* To prevent error, let legacy AP must have same CentralChannel and Channel. */
+				if ((HtCapabilityLen == 0) && (PreNHtCapabilityLen == 0))
+					pAd->MlmeAux.CentralChannel = pAd->MlmeAux.Channel;
+
+				pAd->StaActive.SupportedPhyInfo.bHtEnable = FALSE;
+				pAd->MlmeAux.NewExtChannelOffset = 0xff;
+				RTMPZeroMemory(&pAd->MlmeAux.HtCapability, SIZE_HT_CAP_IE);
+				pAd->MlmeAux.HtCapabilityLen = 0;
+				RTMPZeroMemory(&pAd->MlmeAux.AddHtInfo, SIZE_ADD_HT_INFO_IE);
+			}
+
+			RTMPUpdateMlmeRate(pAd);
+	
+			/* copy QOS related information */
+			if ((pAd->CommonCfg.bWmmCapable)
+#ifdef DOT11_N_SUPPORT
+				 || (pAd->CommonCfg.PhyMode >= PHY_11ABGN_MIXED)
+#endif /* DOT11_N_SUPPORT */
+				)
+			{
+				NdisMoveMemory(&pAd->MlmeAux.APEdcaParm, &EdcaParm, sizeof(EDCA_PARM));
+				NdisMoveMemory(&pAd->MlmeAux.APQbssLoad, &QbssLoad, sizeof(QBSS_LOAD_PARM));
+				NdisMoveMemory(&pAd->MlmeAux.APQosCapability, &QosCapability, sizeof(QOS_CAPABILITY_PARM));
+			}
+			else
+			{
+				NdisZeroMemory(&pAd->MlmeAux.APEdcaParm, sizeof(EDCA_PARM));
+				NdisZeroMemory(&pAd->MlmeAux.APQbssLoad, sizeof(QBSS_LOAD_PARM));
+				NdisZeroMemory(&pAd->MlmeAux.APQosCapability, sizeof(QOS_CAPABILITY_PARM));
+			}
+			
+			DBGPRINT(RT_DEBUG_TRACE, ("SYNC - after JOIN, SupRateLen=%d, ExtRateLen=%d\n", 
+				pAd->MlmeAux.SupRateLen, pAd->MlmeAux.ExtRateLen));
+
+			if (AironetCellPowerLimit != 0xFF)
+			{
+				/* We need to change our TxPower for CCX 2.0 AP Control of Client Transmit Power */
+				ChangeToCellPowerLimit(pAd, AironetCellPowerLimit);
+			}
+			else  /* Used the default TX Power Percentage. */
+				pAd->CommonCfg.TxPowerPercentage = pAd->CommonCfg.TxPowerDefault;
+
+			if (pAd->StaCfg.BssType == BSS_INFRA)
+			{
+				/*
+					Ad-hoc call this function in LinkUp
+				*/
+				InitChannelRelatedValue(pAd);
+				{
+					AsicSetBssid(pAd, pAd->MlmeAux.Bssid);
+				}
+				/* Add BSSID to WCID search table */
+				AsicUpdateRxWCIDTable(pAd, BSSID_WCID, pAd->MlmeAux.Bssid);	
+			}
+
+			pAd->Mlme.SyncMachine.CurrState = SYNC_IDLE;
+			Status = MLME_SUCCESS;
+			MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_JOIN_CONF, 2, &Status, 0);
+
+#ifdef LINUX
+#ifdef RT_CFG80211_SUPPORT
+			RT_CFG80211_SCANNING_INFORM(pAd, Idx, Elem->Channel, Elem->Msg,
+										Elem->MsgLen, Rssi);
+#endif /* RT_CFG80211_SUPPORT */
+#endif /* LINUX */
+		}
+		/* not to me BEACON, ignored */
+	} 
+	/* sanity check fail, ignore this frame */
+
+	goto LabelOK;
+
+LabelErr:
+	DBGPRINT(RT_DEBUG_ERROR, ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+
+LabelOK:
+	if (Ssid != NULL)
+		os_free_mem(NULL, Ssid);
+	if (VarIE != NULL)
+		os_free_mem(NULL, VarIE);
+	if (pHtCapability != NULL)
+		os_free_mem(NULL, pHtCapability);
+	if (pAddHtInfo != NULL)
+		os_free_mem(NULL, pAddHtInfo);
+	return;
+}
+
+/* 
+	==========================================================================
+	Description:
+		receive BEACON from peer
+
+	IRQL = DISPATCH_LEVEL
+
+	==========================================================================
+ */
+VOID PeerBeacon(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+{
+	UCHAR         Bssid[MAC_ADDR_LEN], Addr2[MAC_ADDR_LEN];
+	CHAR          *Ssid = NULL;
+	CF_PARM       CfParm;
+	UCHAR         SsidLen=0, MessageToMe=0, BssType, Channel, NewChannel, index=0;
+	UCHAR         DtimCount=0, DtimPeriod=0, BcastFlag=0;
+	USHORT        CapabilityInfo, AtimWin, BeaconPeriod;
+	LARGE_INTEGER TimeStamp;
+	USHORT        TbttNumToNextWakeUp;
+	UCHAR         Erp;
+	UCHAR         SupRate[MAX_LEN_OF_SUPPORTED_RATES], ExtRate[MAX_LEN_OF_SUPPORTED_RATES];
+	UCHAR		  SupRateLen, ExtRateLen;
+	UCHAR		  CkipFlag;
+	USHORT        LenVIE;
+	UCHAR		  AironetCellPowerLimit;
+	EDCA_PARM       *pEdcaParm = NULL;
+	QBSS_LOAD_PARM  QbssLoad;
+	QOS_CAPABILITY_PARM QosCapability;
+	ULONG           RalinkIe;
+	UCHAR						*VarIE = NULL;		/* Total VIE length = MAX_VIE_LEN - -5 */
+	NDIS_802_11_VARIABLE_IEs	*pVIE = NULL;
+	HT_CAPABILITY_IE		*pHtCapability = NULL;
+	ADD_HT_INFO_IE		*pAddHtInfo = NULL;	/* AP might use this additional ht info IE */
+	UCHAR			HtCapabilityLen, PreNHtCapabilityLen;
+	UCHAR			AddHtInfoLen;
+	UCHAR			NewExtChannelOffset = 0xff;
+	EXT_CAP_INFO_ELEMENT	ExtCapInfo;
+
+
+#ifdef RALINK_ATE
+    if (ATE_ON(pAd))
+    {
+		return;
+    }
+#endif /* RALINK_ATE */
+
+	if (!(INFRA_ON(pAd) || ADHOC_ON(pAd)
+		))
+		return;
+
+	/* allocate memory */
+	os_alloc_mem(NULL, (UCHAR **)&Ssid, MAX_LEN_OF_SSID);
+	if (Ssid == NULL)
+		goto LabelErr;
+	os_alloc_mem(NULL, (UCHAR **)&pEdcaParm, sizeof(EDCA_PARM));
+	if (pEdcaParm == NULL)
+		goto LabelErr;
+	os_alloc_mem(NULL, (UCHAR **)&VarIE, MAX_VIE_LEN);
+	if (VarIE == NULL)
+		goto LabelErr;
+	os_alloc_mem(NULL, (UCHAR **)&pHtCapability, sizeof(HT_CAPABILITY_IE));
+	if (pHtCapability == NULL)
+		goto LabelErr;
+	os_alloc_mem(NULL, (UCHAR **)&pAddHtInfo, sizeof(ADD_HT_INFO_IE));
+	if (pAddHtInfo == NULL)
+		goto LabelErr;
+
+	/* Init Variable IE structure */
+	pVIE = (PNDIS_802_11_VARIABLE_IEs) VarIE;
+	pVIE->Length = 0;
+    RTMPZeroMemory(pHtCapability, sizeof(HT_CAPABILITY_IE));
+	RTMPZeroMemory(pAddHtInfo, sizeof(ADD_HT_INFO_IE));
+	RTMPZeroMemory(&ExtCapInfo, sizeof(ExtCapInfo));
+
+	if (PeerBeaconAndProbeRspSanity(pAd, 
+								Elem->Msg, 
+								Elem->MsgLen, 
+								Elem->Channel,
+								Addr2, 
+								Bssid, 
+								Ssid, 
+								&SsidLen, 
+								&BssType, 
+								&BeaconPeriod, 
+								&Channel, 
+								&NewChannel,
+								&TimeStamp, 
+								&CfParm, 
+								&AtimWin, 
+								&CapabilityInfo, 
+								&Erp,
+								&DtimCount, 
+								&DtimPeriod, 
+								&BcastFlag, 
+								&MessageToMe, 
+								SupRate,
+								&SupRateLen,
+								ExtRate,
+								&ExtRateLen,
+								&CkipFlag,
+								&AironetCellPowerLimit,
+								pEdcaParm,
+								&QbssLoad,
+								&QosCapability,
+								&RalinkIe,
+								&HtCapabilityLen,
+#ifdef CONFIG_STA_SUPPORT
+								&PreNHtCapabilityLen,
+#endif /* CONFIG_STA_SUPPORT */
+								pHtCapability,
+								&ExtCapInfo,
+								&AddHtInfoLen,
+								pAddHtInfo,
+								&NewExtChannelOffset,
+								&LenVIE,
+								pVIE)) 
+	{
+		BOOLEAN is_my_bssid, is_my_ssid;
+		ULONG   Bssidx, Now;
+		BSS_ENTRY *pBss;
+		CHAR		RealRssi = RTMPMaxRssi(pAd, ConvertToRssi(pAd, Elem->Rssi0, RSSI_0), ConvertToRssi(pAd, Elem->Rssi1, RSSI_1), ConvertToRssi(pAd, Elem->Rssi2, RSSI_2));
+
+		is_my_bssid = MAC_ADDR_EQUAL(Bssid, pAd->CommonCfg.Bssid)? TRUE : FALSE;
+		is_my_ssid = SSID_EQUAL(Ssid, SsidLen, pAd->CommonCfg.Ssid, pAd->CommonCfg.SsidLen)? TRUE:FALSE;
+
+
+		/* ignore BEACON not for my SSID */
+		if ((!is_my_ssid) && (!is_my_bssid))
+			goto LabelOK;
+
+		/* It means STA waits disassoc completely from this AP, ignores this beacon. */
+		if (pAd->Mlme.CntlMachine.CurrState == CNTL_WAIT_DISASSOC)
+			goto LabelOK;
+		
+#ifdef DOT11_N_SUPPORT
+		/* Copy Control channel for this BSSID. */	
+		if (AddHtInfoLen != 0)
+			Channel = pAddHtInfo->ControlChan;
+
+		if ((HtCapabilityLen > 0) || (PreNHtCapabilityLen > 0))
+			HtCapabilityLen = SIZE_HT_CAP_IE;
+#endif /* DOT11_N_SUPPORT */
+
+		/*
+		   Housekeeping "SsidBssTab" table for later-on ROAMing usage. 
+		*/
+		Bssidx = BssTableSearchWithSSID(&pAd->MlmeAux.SsidBssTab, Bssid, Ssid, SsidLen, Channel);
+		if (Bssidx == BSS_NOT_FOUND)
+		{			
+			/* discover new AP of this network, create BSS entry */
+			Bssidx = BssTableSetEntry(pAd, &pAd->MlmeAux.SsidBssTab, Bssid, Ssid, SsidLen, BssType, BeaconPeriod,
+						 &CfParm, AtimWin, CapabilityInfo, SupRate, SupRateLen, ExtRate, ExtRateLen, 
+						pHtCapability, pAddHtInfo, HtCapabilityLen,AddHtInfoLen,NewExtChannelOffset, Channel, 
+						RealRssi, TimeStamp, CkipFlag, pEdcaParm, &QosCapability, 
+						&QbssLoad, LenVIE, pVIE);
+			if (Bssidx == BSS_NOT_FOUND)
+				;
+			else
+			{
+				PBSS_ENTRY	pBssEntry = &pAd->MlmeAux.SsidBssTab.BssEntry[Bssidx];
+				NdisMoveMemory(&pBssEntry->PTSF[0], &Elem->Msg[24], 4);
+				NdisMoveMemory(&pBssEntry->TTSF[0], &Elem->TimeStamp.u.LowPart, 4);
+				NdisMoveMemory(&pBssEntry->TTSF[4], &Elem->TimeStamp.u.LowPart, 4);
+				pBssEntry->Rssi = RealRssi;
+
+				NdisMoveMemory(pBssEntry->MacAddr, Addr2, MAC_ADDR_LEN);
+				
+
+			}
+		}			
+		
+		/*
+			Update ScanTab
+		*/
+		Bssidx = BssTableSearch(&pAd->ScanTab, Bssid, Channel);
+		if (Bssidx == BSS_NOT_FOUND)
+		{
+			/* discover new AP of this network, create BSS entry */
+			Bssidx = BssTableSetEntry(pAd, &pAd->ScanTab, Bssid, Ssid, SsidLen, BssType, BeaconPeriod,
+						 &CfParm, AtimWin, CapabilityInfo, SupRate, SupRateLen, ExtRate, ExtRateLen, 
+						pHtCapability, pAddHtInfo, HtCapabilityLen,AddHtInfoLen,NewExtChannelOffset, Channel, 
+						RealRssi, TimeStamp, CkipFlag, pEdcaParm, &QosCapability, 
+						&QbssLoad, LenVIE, pVIE);
+			if (Bssidx == BSS_NOT_FOUND) /* return if BSS table full */
+				goto LabelOK;  
+			
+			NdisMoveMemory(pAd->ScanTab.BssEntry[Bssidx].PTSF, &Elem->Msg[24], 4);
+			NdisMoveMemory(&pAd->ScanTab.BssEntry[Bssidx].TTSF[0], &Elem->TimeStamp.u.LowPart, 4);
+			NdisMoveMemory(&pAd->ScanTab.BssEntry[Bssidx].TTSF[4], &Elem->TimeStamp.u.LowPart, 4);
+			pAd->ScanTab.BssEntry[Bssidx].MinSNR = Elem->Signal % 10;
+			if (pAd->ScanTab.BssEntry[Bssidx].MinSNR == 0)
+				pAd->ScanTab.BssEntry[Bssidx].MinSNR = -5;
+			
+			NdisMoveMemory(pAd->ScanTab.BssEntry[Bssidx].MacAddr, Addr2, MAC_ADDR_LEN);
+			
+			
+			
+		}
+
+		/* 
+		    if the ssid matched & bssid unmatched, we should select the bssid with large value.
+		    This might happened when two STA start at the same time
+		*/
+		if ((! is_my_bssid) && ADHOC_ON(pAd))
+		{
+			INT	i;
+			/* Add the safeguard against the mismatch of adhoc wep status */
+			if ((pAd->StaCfg.WepStatus != pAd->ScanTab.BssEntry[Bssidx].WepStatus) ||
+				(pAd->StaCfg.AuthMode != pAd->ScanTab.BssEntry[Bssidx].AuthMode))
+			{
+				goto LabelOK;
+			}
+			/* collapse into the ADHOC network which has bigger BSSID value. */
+			for (i = 0; i < 6; i++)
+			{
+				if (Bssid[i] > pAd->CommonCfg.Bssid[i])
+				{
+					DBGPRINT(RT_DEBUG_TRACE, ("SYNC - merge to the IBSS with bigger BSSID=%02x:%02x:%02x:%02x:%02x:%02x\n", 
+						Bssid[0], Bssid[1], Bssid[2], Bssid[3], Bssid[4], Bssid[5]));
+					AsicDisableSync(pAd);
+					COPY_MAC_ADDR(pAd->CommonCfg.Bssid, Bssid);
+					AsicSetBssid(pAd, pAd->CommonCfg.Bssid); 
+					MakeIbssBeacon(pAd);        /* re-build BEACON frame */
+					AsicEnableIbssSync(pAd);    /* copy BEACON frame to on-chip memory */
+					is_my_bssid = TRUE;
+					break;
+				}
+				else if (Bssid[i] < pAd->CommonCfg.Bssid[i])
+					break;
+			}
+		}
+
+
+		NdisGetSystemUpTime(&Now);
+		pBss = &pAd->ScanTab.BssEntry[Bssidx];
+		pBss->Rssi = RealRssi;       /* lastest RSSI */
+		pBss->LastBeaconRxTime = Now;   /* last RX timestamp */
+
+		/*
+		   BEACON from my BSSID - either IBSS or INFRA network
+		*/ 
+		if (is_my_bssid)
+		{
+			RXWI_STRUC	RxWI;
+
+#ifdef DOT11_N_SUPPORT
+#ifdef DOT11N_DRAFT3
+			OVERLAP_BSS_SCAN_IE	BssScan;
+			UCHAR					RegClass;
+			BOOLEAN					brc;
+
+			/* Read Beacon's Reg Class IE if any. */
+			brc = PeerBeaconAndProbeRspSanity2(pAd, Elem->Msg, Elem->MsgLen, &BssScan, &RegClass);
+			if (brc == TRUE)
+			{
+				UpdateBssScanParm(pAd, BssScan);
+				pAd->StaCfg.RegClass = RegClass;
+			}
+#endif /* DOT11N_DRAFT3 */
+#endif /* DOT11_N_SUPPORT */
+
+			pAd->StaCfg.DtimCount = DtimCount;
+			pAd->StaCfg.DtimPeriod = DtimPeriod;
+			pAd->StaCfg.LastBeaconRxTime = Now;
+
+
+			NdisZeroMemory(&RxWI, sizeof(RXWI_STRUC));
+			RxWI.RSSI0 = Elem->Rssi0;
+			RxWI.RSSI1 = Elem->Rssi1;
+			RxWI.RSSI2 = Elem->Rssi2;
+			RxWI.PHYMODE = 0; /* Prevent SNR calculate error. */
+			
+			Update_Rssi_Sample(pAd, &pAd->StaCfg.RssiSample, &RxWI);
+
+			if ((pAd->CommonCfg.bIEEE80211H == 1) && (NewChannel != 0) && (Channel != NewChannel))
+			{
+				/* Switching to channel 1 can prevent from rescanning the current channel immediately (by auto reconnection). */
+				/* In addition, clear the MLME queue and the scan table to discard the RX packets and previous scanning results. */
+				AsicSwitchChannel(pAd, 1, FALSE);
+				AsicLockChannel(pAd, 1);
+			    LinkDown(pAd, FALSE);
+				MlmeQueueInit(pAd, &pAd->Mlme.Queue);
+				BssTableInit(&pAd->ScanTab);
+			    RTMPusecDelay(1000000);		/* use delay to prevent STA do reassoc */
+						
+				/* channel sanity check */
+				for (index = 0 ; index < pAd->ChannelListNum; index++)
+				{
+					if (pAd->ChannelList[index].Channel == NewChannel)
+					{
+						pAd->ScanTab.BssEntry[Bssidx].Channel = NewChannel;
+						pAd->CommonCfg.Channel = NewChannel;
+						AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
+						AsicLockChannel(pAd, pAd->CommonCfg.Channel);
+						DBGPRINT(RT_DEBUG_TRACE, ("PeerBeacon - STA receive channel switch announcement IE (New Channel =%d)\n", NewChannel));
+						break;
+					}
+				}
+
+				if (index >= pAd->ChannelListNum)
+				{
+					DBGPRINT_ERR(("PeerBeacon(can not find New Channel=%d in ChannelList[%d]\n", pAd->CommonCfg.Channel, pAd->ChannelListNum));
+				}
+			}
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+			if (pAd->StaCfg.WpaSupplicantUP & WPA_SUPPLICANT_ENABLE_WPS) ;
+			else
+#endif /* WPA_SUPPLICANT_SUPPORT */
+			{
+				if ((((pAd->StaCfg.WepStatus != Ndis802_11WEPDisabled) << 4) ^
+					CapabilityInfo) &
+					0x0010)
+				{
+					/*
+						To prevent STA connect to OPEN/WEP AP when STA is OPEN/NONE or 
+						STA connect to OPEN/NONE AP when STA is OPEN/WEP AP.
+					*/
+					DBGPRINT(RT_DEBUG_TRACE, ("%s:AP privacy:%x is differenct from STA privacy:%x\n", __FUNCTION__, (CapabilityInfo & 0x0010) >> 4 , pAd->StaCfg.WepStatus != Ndis802_11WEPDisabled));
+					if (INFRA_ON(pAd))
+					{
+						LinkDown(pAd,FALSE);
+						BssTableInit(&pAd->ScanTab);
+					}
+					goto LabelOK;
+				}
+			}
+
+#ifdef LINUX
+#ifdef RT_CFG80211_SUPPORT
+/*			CFG80211_BeaconCountryRegionParse(pAd, pVIE, LenVIE); */
+#endif /* RT_CFG80211_SUPPORT */
+#endif /* LINUX */
+
+			if (AironetCellPowerLimit != 0xFF)
+			{
+				/*
+				   We get the Cisco (ccx) "TxPower Limit" required
+				   Changed to appropriate TxPower Limit for Ciso Compatible Extensions
+				*/
+				ChangeToCellPowerLimit(pAd, AironetCellPowerLimit);
+			}
+			else
+			{
+				/*
+				   AironetCellPowerLimit equal to 0xFF means the Cisco (ccx) "TxPower Limit" not exist.
+				   Used the default TX Power Percentage, that set from UI.	
+				*/
+				pAd->CommonCfg.TxPowerPercentage = pAd->CommonCfg.TxPowerDefault;	
+			}
+
+			if (ADHOC_ON(pAd) && (CAP_IS_IBSS_ON(CapabilityInfo)))   
+			{
+				UCHAR			MaxSupportedRateIn500Kbps = 0;
+				UCHAR			idx;
+				MAC_TABLE_ENTRY *pEntry;
+	
+				/* supported rates array may not be sorted. sort it and find the maximum rate */
+			    for (idx=0; idx<SupRateLen; idx++)
+				{
+			        if (MaxSupportedRateIn500Kbps < (SupRate[idx] & 0x7f)) 
+			            MaxSupportedRateIn500Kbps = SupRate[idx] & 0x7f;
+						}
+				
+				for (idx=0; idx<ExtRateLen; idx++)
+			    {
+			        if (MaxSupportedRateIn500Kbps < (ExtRate[idx] & 0x7f)) 
+			            MaxSupportedRateIn500Kbps = ExtRate[idx] & 0x7f;
+					}
+						
+				/* look up the existing table */
+				pEntry = MacTableLookup(pAd, Addr2);
+
+				/*
+				   Ad-hoc mode is using MAC address as BA session. So we need to continuously find newly joined adhoc station by receiving beacon.
+				   To prevent always check this, we use wcid == RESERVED_WCID to recognize it as newly joined adhoc station.
+				*/
+				if ((ADHOC_ON(pAd) && ((!pEntry) || (pEntry && IS_ENTRY_NONE(pEntry)))) ||
+					(pEntry && RTMP_TIME_AFTER(Now, pEntry->LastBeaconRxTime + ADHOC_ENTRY_BEACON_LOST_TIME)))
+				{
+					if (pEntry == NULL)
+						/* Another adhoc joining, add to our MAC table. */
+						pEntry = MacTableInsertEntry(pAd, Addr2, BSS0, OPMODE_STA, FALSE);
+
+					if (pEntry == NULL)
+						goto LabelOK;
+
+					if (StaAddMacTableEntry(pAd, 
+											pEntry, 
+											MaxSupportedRateIn500Kbps, 
+											pHtCapability, 
+											HtCapabilityLen, 
+											pAddHtInfo,
+											AddHtInfoLen,
+											CapabilityInfo) == FALSE)
+					{
+						DBGPRINT(RT_DEBUG_TRACE, ("ADHOC - Add Entry failed.\n"));
+						goto LabelOK;
+					}
+					pEntry->LastBeaconRxTime = 0;
+
+
+					if (pEntry &&
+						(Elem->Wcid == RESERVED_WCID))
+					{
+						idx = pAd->StaCfg.DefaultKeyId;
+							RTMP_SET_WCID_SEC_INFO(pAd, BSS0, idx, 
+												   pAd->SharedKey[BSS0][idx].CipherAlg,
+												   pEntry->Aid,
+												   SHAREDKEYTABLE);
+					}
+				}
+
+				if (pEntry && IS_ENTRY_CLIENT(pEntry))
+					pEntry->LastBeaconRxTime = Now;
+
+				/* At least another peer in this IBSS, declare MediaState as CONNECTED */
+				if (!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED))
+				{
+					OPSTATUS_SET_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED); 
+					RTMP_IndicateMediaState(pAd, NdisMediaStateConnected);
+	                pAd->ExtraInfo = GENERAL_LINK_UP;
+					DBGPRINT(RT_DEBUG_TRACE, ("ADHOC  fOP_STATUS_MEDIA_STATE_CONNECTED.\n"));
+				}	
+			}
+
+			if (INFRA_ON(pAd))
+			{
+				BOOLEAN bUseShortSlot, bUseBGProtection;
+
+				/*
+				   decide to use/change to - 
+				      1. long slot (20 us) or short slot (9 us) time
+				      2. turn on/off RTS/CTS and/or CTS-to-self protection
+				      3. short preamble
+				*/
+
+					
+				/* bUseShortSlot = pAd->CommonCfg.bUseShortSlotTime && CAP_IS_SHORT_SLOT(CapabilityInfo); */
+				bUseShortSlot = CAP_IS_SHORT_SLOT(CapabilityInfo);
+				if (bUseShortSlot != OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_SHORT_SLOT_INUSED))
+					AsicSetSlotTime(pAd, bUseShortSlot);
+
+				bUseBGProtection = (pAd->CommonCfg.UseBGProtection == 1) ||    /* always use */
+								   ((pAd->CommonCfg.UseBGProtection == 0) && ERP_IS_USE_PROTECTION(Erp));
+
+				if (pAd->CommonCfg.Channel > 14)  /* always no BG protection in A-band. falsely happened when switching A/G band to a dual-band AP */
+					bUseBGProtection = FALSE;
+
+				if (bUseBGProtection != OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_BG_PROTECTION_INUSED))
+				{
+					if (bUseBGProtection)
+					{
+						OPSTATUS_SET_FLAG(pAd, fOP_STATUS_BG_PROTECTION_INUSED);
+						AsicUpdateProtect(pAd, pAd->MlmeAux.AddHtInfo.AddHtInfo2.OperaionMode, (OFDMSETPROTECT|CCKSETPROTECT|ALLN_SETPROTECT),FALSE,(pAd->MlmeAux.AddHtInfo.AddHtInfo2.NonGfPresent == 1));
+					}
+					else
+					{
+						OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_BG_PROTECTION_INUSED);
+						AsicUpdateProtect(pAd, pAd->MlmeAux.AddHtInfo.AddHtInfo2.OperaionMode, (OFDMSETPROTECT|CCKSETPROTECT|ALLN_SETPROTECT),TRUE,(pAd->MlmeAux.AddHtInfo.AddHtInfo2.NonGfPresent == 1));
+					}
+					
+					DBGPRINT(RT_DEBUG_WARN, ("SYNC - AP changed B/G protection to %d\n", bUseBGProtection));
+				}
+				
+#ifdef DOT11_N_SUPPORT
+				/* check Ht protection mode. and adhere to the Non-GF device indication by AP. */
+				if ((AddHtInfoLen != 0) && 
+					((pAddHtInfo->AddHtInfo2.OperaionMode != pAd->MlmeAux.AddHtInfo.AddHtInfo2.OperaionMode) ||
+					(pAddHtInfo->AddHtInfo2.NonGfPresent != pAd->MlmeAux.AddHtInfo.AddHtInfo2.NonGfPresent)))
+				{
+					pAd->MlmeAux.AddHtInfo.AddHtInfo2.NonGfPresent = pAddHtInfo->AddHtInfo2.NonGfPresent;
+					pAd->MlmeAux.AddHtInfo.AddHtInfo2.OperaionMode = pAddHtInfo->AddHtInfo2.OperaionMode;
+					if (pAd->MlmeAux.AddHtInfo.AddHtInfo2.NonGfPresent == 1)
+				{
+						AsicUpdateProtect(pAd, pAd->MlmeAux.AddHtInfo.AddHtInfo2.OperaionMode, ALLN_SETPROTECT, FALSE, TRUE);
+					}
+					else
+						AsicUpdateProtect(pAd, pAd->MlmeAux.AddHtInfo.AddHtInfo2.OperaionMode, ALLN_SETPROTECT, FALSE, FALSE);
+
+					DBGPRINT(RT_DEBUG_TRACE, ("SYNC - AP changed N OperaionMode to %d\n", pAd->MlmeAux.AddHtInfo.AddHtInfo2.OperaionMode));
+				}
+#endif /* DOT11_N_SUPPORT */
+				
+				if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED) && 
+					ERP_IS_USE_BARKER_PREAMBLE(Erp))
+				{
+					MlmeSetTxPreamble(pAd, Rt802_11PreambleLong);
+					DBGPRINT(RT_DEBUG_TRACE, ("SYNC - AP forced to use LONG preamble\n"));
+				}
+
+				if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_WMM_INUSED)    &&
+					(pEdcaParm->bValid == TRUE)                          &&
+					(pEdcaParm->EdcaUpdateCount != pAd->CommonCfg.APEdcaParm.EdcaUpdateCount))
+				{
+					DBGPRINT(RT_DEBUG_TRACE, ("SYNC - AP change EDCA parameters(from %d to %d)\n", 
+						pAd->CommonCfg.APEdcaParm.EdcaUpdateCount,
+						pEdcaParm->EdcaUpdateCount));
+					AsicSetEdcaParm(pAd, pEdcaParm);
+				}
+
+				/* copy QOS related information */
+				NdisMoveMemory(&pAd->CommonCfg.APQbssLoad, &QbssLoad, sizeof(QBSS_LOAD_PARM));
+				NdisMoveMemory(&pAd->CommonCfg.APQosCapability, &QosCapability, sizeof(QOS_CAPABILITY_PARM));
+#ifdef DOT11_N_SUPPORT
+#ifdef DOT11N_DRAFT3
+				/* 
+				   2009: PF#1: 20/40 Coexistence in 2.4 GHz Band
+				   When AP changes "STA Channel Width" and "Secondary Channel Offset" fields of HT Operation Element in the Beacon to 0
+				*/
+				if ((AddHtInfoLen != 0) && INFRA_ON(pAd))
+				{
+					BOOLEAN bChangeBW = FALSE;
+					/*
+					     1) HT Information
+					     2) Secondary Channel Offset Element
+					
+					     40 -> 20 case
+					*/
+					if (pAd->CommonCfg.BBPCurrentBW == BW_40)
+					{
+						if (((pAddHtInfo->AddHtInfo.ExtChanOffset == EXTCHA_NONE) && (pAddHtInfo->AddHtInfo.RecomWidth == 0)) 
+							||(NewExtChannelOffset==0x0)
+						)
+						{
+							bChangeBW = TRUE;
+							pAd->CommonCfg.CentralChannel = pAd->CommonCfg.Channel;
+							pAd->MacTab.Content[BSSID_WCID].HTPhyMode.field.BW = 0;
+							DBGPRINT(RT_DEBUG_TRACE, ("FallBack from 40MHz to 20MHz(CtrlCh=%d, CentralCh=%d)\n", 
+														pAd->CommonCfg.Channel, pAd->CommonCfg.CentralChannel));
+							CntlChannelWidth(pAd, pAd->CommonCfg.Channel, pAd->CommonCfg.CentralChannel, BW_20, 0);
+						}
+					}
+					/*
+					    20 -> 40 case
+					    1.) Supported Channel Width Set Field of the HT Capabilities element of both STAs is set to a non-zero
+					    2.) Secondary Channel Offset field is SCA or SCB
+					    3.) 40MHzRegulatoryClass is TRUE (not implement it)
+					*/
+					else if (((pAd->CommonCfg.BBPCurrentBW == BW_20) ||(NewExtChannelOffset!=0x0)) &&
+							(pAd->CommonCfg.DesiredHtPhy.ChannelWidth != BW_20)
+						)
+					{
+						if ((pAddHtInfo->AddHtInfo.ExtChanOffset != EXTCHA_NONE) && (HtCapabilityLen>0) && (pHtCapability->HtCapInfo.ChannelWidth == 1))
+						{
+							if ((pAddHtInfo->ControlChan > 2)&& (pAddHtInfo->AddHtInfo.ExtChanOffset == EXTCHA_BELOW))
+							{
+								pAd->CommonCfg.CentralChannel = pAddHtInfo->ControlChan - 2;
+								bChangeBW = TRUE;
+							}
+							else if ((pAddHtInfo->AddHtInfo.ExtChanOffset == EXTCHA_ABOVE))
+							{
+								pAd->CommonCfg.CentralChannel = pAddHtInfo->ControlChan + 2;
+								bChangeBW = TRUE;
+							}
+							
+							if (bChangeBW)
+							{
+								pAd->CommonCfg.Channel = pAddHtInfo->ControlChan;
+								DBGPRINT(RT_DEBUG_TRACE, ("FallBack from 20MHz to 40MHz(CtrlCh=%d, CentralCh=%d)\n", 
+															pAd->CommonCfg.Channel, pAd->CommonCfg.CentralChannel));
+								CntlChannelWidth(pAd, pAd->CommonCfg.Channel, pAd->CommonCfg.CentralChannel, BW_40, pAddHtInfo->AddHtInfo.ExtChanOffset);
+								pAd->MacTab.Content[BSSID_WCID].HTPhyMode.field.BW = 1;
+							}
+						}
+					}
+
+					if (bChangeBW)
+					{
+						pAd->CommonCfg.BSSCoexist2040.word = 0;
+						TriEventInit(pAd);
+						BuildEffectedChannelList(pAd);
+					}
+				}
+#endif /* DOT11N_DRAFT3 */
+#endif /* DOT11_N_SUPPORT */
+			}
+
+			/* only INFRASTRUCTURE mode support power-saving feature */
+			if ((INFRA_ON(pAd) && (pAd->StaCfg.Psm == PWR_SAVE)) || (pAd->CommonCfg.bAPSDForcePowerSave))
+			{
+				UCHAR FreeNumber;
+				/*
+				     1. AP has backlogged unicast-to-me frame, stay AWAKE, send PSPOLL
+				     2. AP has backlogged broadcast/multicast frame and we want those frames, stay AWAKE
+				     3. we have outgoing frames in TxRing or MgmtRing, better stay AWAKE
+				     4. Psm change to PWR_SAVE, but AP not been informed yet, we better stay AWAKE
+				     5. otherwise, put PHY back to sleep to save battery.
+				*/
+				if (MessageToMe)
+				{
+#ifdef PCIE_PS_SUPPORT
+					if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_ADVANCE_POWER_SAVE_PCIE_DEVICE))
+					{
+						/* Restore to correct BBP R3 value */
+						if (pAd->Antenna.field.RxPath > 1)
+						RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, pAd->StaCfg.BBPR3);
+						/* Turn clk to 80Mhz. */
+					}
+#endif /* PCIE_PS_SUPPORT */
+					if (pAd->CommonCfg.bAPSDCapable && pAd->CommonCfg.APEdcaParm.bAPSDCapable &&
+						pAd->CommonCfg.bAPSDAC_BE && pAd->CommonCfg.bAPSDAC_BK && pAd->CommonCfg.bAPSDAC_VI && pAd->CommonCfg.bAPSDAC_VO)
+					{
+						pAd->CommonCfg.bNeedSendTriggerFrame = TRUE;
+					}
+					else
+					{
+						if (pAd->StaCfg.WindowsBatteryPowerMode == Ndis802_11PowerModeFast_PSP)
+						{
+							/* wake up and send a NULL frame with PM = 0 to the AP */
+							RTMP_SET_PSM_BIT(pAd, PWR_ACTIVE);
+							RTMPSendNullFrame(pAd, 
+											  pAd->CommonCfg.TxRate, 
+											  (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_WMM_INUSED) ? TRUE:FALSE));
+						}
+						else
+						{
+							/* use PS-Poll to get any buffered packet */
+							RTMP_PS_POLL_ENQUEUE(pAd);
+						}
+					}
+				}
+				else if (BcastFlag && (DtimCount == 0) && OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM))
+				{
+#ifdef PCIE_PS_SUPPORT
+					if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_ADVANCE_POWER_SAVE_PCIE_DEVICE))
+					{
+						if (pAd->Antenna.field.RxPath > 1)
+						RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, pAd->StaCfg.BBPR3);
+					}
+#endif /* PCIE_PS_SUPPORT */
+				} 
+				else if ((pAd->TxSwQueue[QID_AC_BK].Number != 0)													||
+						(pAd->TxSwQueue[QID_AC_BE].Number != 0)														||
+						(pAd->TxSwQueue[QID_AC_VI].Number != 0)														||
+						(pAd->TxSwQueue[QID_AC_VO].Number != 0)														||
+						(RTMPFreeTXDRequest(pAd, QID_AC_BK, TX_RING_SIZE - 1, &FreeNumber) != NDIS_STATUS_SUCCESS)	||
+						(RTMPFreeTXDRequest(pAd, QID_AC_BE, TX_RING_SIZE - 1, &FreeNumber) != NDIS_STATUS_SUCCESS)	||
+						(RTMPFreeTXDRequest(pAd, QID_AC_VI, TX_RING_SIZE - 1, &FreeNumber) != NDIS_STATUS_SUCCESS)	||
+						(RTMPFreeTXDRequest(pAd, QID_AC_VO, TX_RING_SIZE - 1, &FreeNumber) != NDIS_STATUS_SUCCESS)	||
+						(RTMPFreeTXDRequest(pAd, QID_MGMT, MGMT_RING_SIZE - 1, &FreeNumber) != NDIS_STATUS_SUCCESS)) 
+				{
+					/* TODO: consider scheduled HCCA. might not be proper to use traditional DTIM-based power-saving scheme */
+					/* can we cheat here (i.e. just check MGMT & AC_BE) for better performance? */
+#ifdef PCIE_PS_SUPPORT
+					if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_ADVANCE_POWER_SAVE_PCIE_DEVICE))
+					{
+						if (pAd->Antenna.field.RxPath > 1)
+						RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, pAd->StaCfg.BBPR3);
+					}
+#endif /* PCIE_PS_SUPPORT */
+				}
+				else 
+				{
+					if ((pAd->CommonCfg.bACMAPSDTr[QID_AC_VO]) ||
+						(pAd->CommonCfg.bACMAPSDTr[QID_AC_VI]) ||
+						(pAd->CommonCfg.bACMAPSDTr[QID_AC_BK]) ||
+						(pAd->CommonCfg.bACMAPSDTr[QID_AC_BE]))
+					{
+						/*
+							WMM Spec v1.0 3.6.2.4,
+							The WMM STA shall remain awake until it receives a
+							QoS Data or Null frame addressed to it, with the
+							EOSP subfield in QoS Control field set to 1.
+
+							So we can not sleep here or we will suffer a case:
+
+							PS Management Frame -->
+							Trigger frame -->
+							Beacon (TIM=0) (Beacon is closer to Trig frame) -->
+							Station goes to sleep -->
+							AP delivery queued UAPSD packets -->
+							Station can NOT receive the reply
+
+							Maybe we need a timeout timer to avoid that we do
+							NOT receive the EOSP frame.
+
+							We can not use More Data to check if SP is ended
+							due to MaxSPLength.
+						*/
+					}
+					else
+					{
+						USHORT NextDtim = DtimCount;
+
+
+						if (NextDtim == 0) 
+							NextDtim = DtimPeriod;
+
+						TbttNumToNextWakeUp = pAd->StaCfg.DefaultListenCount;
+						if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM) && (TbttNumToNextWakeUp > NextDtim))
+							TbttNumToNextWakeUp = NextDtim;
+
+						if (!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE))
+						{
+							/* Set a flag to go to sleep . Then after parse this RxDoneInterrupt, will go to sleep mode. */
+							pAd->ThisTbttNumToNextWakeUp = TbttNumToNextWakeUp;
+		                                        AsicSleepThenAutoWakeup(pAd, pAd->ThisTbttNumToNextWakeUp);
+							
+						}
+					}
+				}
+			}
+		}
+		/* not my BSSID, ignore it */
+	}
+	/* sanity check fail, ignore this frame */
+	goto LabelOK;
+
+LabelErr:
+	DBGPRINT(RT_DEBUG_ERROR, ("%s: Allocate memory fail!!!\n", __FUNCTION__));
+
+LabelOK:
+	if (Ssid != NULL)
+		os_free_mem(NULL, Ssid);
+	if (pEdcaParm != NULL)
+		os_free_mem(NULL, pEdcaParm);
+	if (VarIE != NULL)
+		os_free_mem(NULL, VarIE);
+	if (pHtCapability != NULL)
+		os_free_mem(NULL, pHtCapability);
+	if (pAddHtInfo != NULL)
+		os_free_mem(NULL, pAddHtInfo);
+	return;
+}
+
+/* 
+	==========================================================================
+	Description:
+		Receive PROBE REQ from remote peer when operating in IBSS mode
+	==========================================================================
+ */
+VOID PeerProbeReqAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+{
+	UCHAR         Addr2[MAC_ADDR_LEN];
+	CHAR          Ssid[MAX_LEN_OF_SSID];
+	UCHAR         SsidLen;
+#ifdef DOT11_N_SUPPORT
+	UCHAR		  HtLen, AddHtLen, NewExtLen;
+#endif /* DOT11_N_SUPPORT */
+	HEADER_802_11 ProbeRspHdr;
+	NDIS_STATUS   NStatus;
+	PUCHAR        pOutBuffer = NULL;
+	ULONG         FrameLen = 0;
+	LARGE_INTEGER FakeTimestamp;
+	UCHAR         DsLen = 1, IbssLen = 2;
+	UCHAR         LocalErpIe[3] = {IE_ERP, 1, 0};
+	BOOLEAN       Privacy;
+	USHORT        CapabilityInfo;
+
+
+	if (! ADHOC_ON(pAd))
+		return;
+
+	if (PeerProbeReqSanity(pAd, Elem->Msg, Elem->MsgLen, Addr2, Ssid, &SsidLen, NULL))
+	{
+		if ((SsidLen == 0) || SSID_EQUAL(Ssid, SsidLen, pAd->CommonCfg.Ssid, pAd->CommonCfg.SsidLen))
+		{			
+			/* allocate and send out ProbeRsp frame */
+			NStatus = MlmeAllocateMemory(pAd, &pOutBuffer);  /* Get an unused nonpaged memory */
+			if (NStatus != NDIS_STATUS_SUCCESS)
+				return;
+
+			MgtMacHeaderInit(pAd, &ProbeRspHdr, SUBTYPE_PROBE_RSP, 0, Addr2,
+								pAd->CommonCfg.Bssid);
+
+			Privacy = (pAd->StaCfg.WepStatus == Ndis802_11Encryption1Enabled) || 
+					  (pAd->StaCfg.WepStatus == Ndis802_11Encryption2Enabled) || 
+					  (pAd->StaCfg.WepStatus == Ndis802_11Encryption3Enabled);
+			CapabilityInfo = CAP_GENERATE(0, 1, Privacy, (pAd->CommonCfg.TxPreamble == Rt802_11PreambleShort), 0, 0);
+
+			MakeOutgoingFrame(pOutBuffer,                   &FrameLen, 
+							  sizeof(HEADER_802_11),        &ProbeRspHdr, 
+							  TIMESTAMP_LEN,                &FakeTimestamp,
+							  2,                            &pAd->CommonCfg.BeaconPeriod,
+							  2,                            &CapabilityInfo,
+							  1,                            &SsidIe, 
+							  1,                            &pAd->CommonCfg.SsidLen, 
+							  pAd->CommonCfg.SsidLen,       pAd->CommonCfg.Ssid,
+							  1,                            &SupRateIe, 
+							  1,                            &pAd->StaActive.SupRateLen,
+							  pAd->StaActive.SupRateLen,    pAd->StaActive.SupRate, 
+							  1,                            &DsIe, 
+							  1,                            &DsLen, 
+							  1,                            &pAd->CommonCfg.Channel,
+							  1,                            &IbssIe, 
+							  1,                            &IbssLen, 
+							  2,                            &pAd->StaActive.AtimWin,
+							  END_OF_ARGS);
+
+			if (pAd->StaActive.ExtRateLen)
+			{
+				ULONG tmp;
+				MakeOutgoingFrame(pOutBuffer + FrameLen,        &tmp, 
+								  3,                            LocalErpIe,
+								  1,                            &ExtRateIe,
+								  1,                            &pAd->StaActive.ExtRateLen,
+								  pAd->StaActive.ExtRateLen,    &pAd->StaActive.ExtRate,
+								  END_OF_ARGS);
+				FrameLen += tmp;
+			}
+
+        	/* Modify by Eddy, support WPA2PSK in Adhoc mode */
+        	if ((pAd->StaCfg.AuthMode == Ndis802_11AuthModeWPANone)
+                )
+        	{
+        		ULONG   tmp;
+       	        UCHAR   RSNIe = IE_WPA;
+
+                
+        		MakeOutgoingFrame(pOutBuffer + FrameLen,        	&tmp,
+        						  1,                              	&RSNIe,
+        						  1,                            	&pAd->StaCfg.RSNIE_Len,
+        						  pAd->StaCfg.RSNIE_Len,      		pAd->StaCfg.RSN_IE,
+        						  END_OF_ARGS);
+        		FrameLen += tmp;	
+        	}
+
+#ifdef DOT11_N_SUPPORT
+			if (pAd->CommonCfg.PhyMode >= PHY_11ABGN_MIXED)
+			{
+				ULONG TmpLen;
+				USHORT  epigram_ie_len;
+				UCHAR	BROADCOM[4] = {0x0, 0x90, 0x4c, 0x33};
+				HtLen = sizeof(pAd->CommonCfg.HtCapability);
+				AddHtLen = sizeof(pAd->CommonCfg.AddHTInfo);
+				NewExtLen = 1;
+				/* New extension channel offset IE is included in Beacon, Probe Rsp or channel Switch Announcement Frame */
+				if (pAd->bBroadComHT == TRUE)
+				{
+					epigram_ie_len = pAd->MlmeAux.HtCapabilityLen + 4;
+					MakeOutgoingFrame(pOutBuffer + FrameLen,            &TmpLen,
+								  1,                                &WpaIe,
+								  1,          						&epigram_ie_len,
+								  4,                                &BROADCOM[0],
+								 pAd->MlmeAux.HtCapabilityLen,          &pAd->MlmeAux.HtCapability, 
+								  END_OF_ARGS);
+				}
+				else				
+				{
+				MakeOutgoingFrame(pOutBuffer + FrameLen,            &TmpLen,
+								  1,                                &HtCapIe,
+								  1,                                &HtLen,
+								 sizeof(HT_CAPABILITY_IE),          &pAd->CommonCfg.HtCapability, 
+								  1,                                &AddHtInfoIe,
+								  1,                                &AddHtLen,
+								 sizeof(ADD_HT_INFO_IE),          &pAd->CommonCfg.AddHTInfo, 
+								  1,                                &NewExtChanIe,
+								  1,                                &NewExtLen,
+								 sizeof(NEW_EXT_CHAN_IE),          &pAd->CommonCfg.NewExtChanOffset, 
+								  END_OF_ARGS);
+				}
+				FrameLen += TmpLen;
+			}
+#endif /* DOT11_N_SUPPORT */
+
+
+
+			MiniportMMRequest(pAd, 0, pOutBuffer, FrameLen);
+			MlmeFreeMemory(pAd, pOutBuffer);
+		}
+	}
+}
+
+VOID BeaconTimeoutAtJoinAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+{
+	USHORT Status;
+	DBGPRINT(RT_DEBUG_TRACE, ("SYNC - BeaconTimeoutAtJoinAction\n"));
+	pAd->Mlme.SyncMachine.CurrState = SYNC_IDLE;
+	Status = MLME_REJ_TIMEOUT;
+	MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_JOIN_CONF, 2, &Status, 0);
+}
+
+/* 
+	==========================================================================
+	Description:
+		Scan timeout procedure. basically add channel index by 1 and rescan
+	==========================================================================
+ */
+VOID ScanTimeoutAction(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+{
+
+#ifdef RTMP_MAC_USB
+	/*
+	    To prevent data lost.
+	    Send an NULL data with turned PSM bit on to current associated AP when SCAN in the channel where
+	    associated AP located.
+	*/
+	if ((pAd->CommonCfg.Channel == pAd->MlmeAux.Channel) && 
+		(pAd->MlmeAux.ScanType == SCAN_ACTIVE) && 
+		(INFRA_ON(pAd)) && 
+		OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED)
+	)
+	{
+		RTMPSendNullFrame(pAd, 
+						  pAd->CommonCfg.TxRate, 
+						  (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_WMM_INUSED) ? TRUE:FALSE));
+	}
+#endif /* RTMP_MAC_USB */
+
+	if (pAd->StaCfg.bFastConnect && !pAd->StaCfg.bNotFirstScan)
+	{
+		pAd->MlmeAux.Channel = 0;
+		pAd->StaCfg.bNotFirstScan = TRUE;
+	}
+	else
+		pAd->MlmeAux.Channel = NextChannel(pAd, pAd->MlmeAux.Channel);
+
+	/* Only one channel scanned for CISCO beacon request */
+	if ((pAd->MlmeAux.ScanType == SCAN_CISCO_ACTIVE) || 
+		(pAd->MlmeAux.ScanType == SCAN_CISCO_PASSIVE) ||
+		(pAd->MlmeAux.ScanType == SCAN_CISCO_NOISE) ||
+		(pAd->MlmeAux.ScanType == SCAN_CISCO_CHANNEL_LOAD))
+		pAd->MlmeAux.Channel = 0;
+
+	/* this routine will stop if pAd->MlmeAux.Channel == 0 */
+	ScanNextChannel(pAd, OPMODE_STA); 
+}
+
+/* 
+	==========================================================================
+	Description:
+	==========================================================================
+ */
+VOID InvalidStateWhenScan(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+{
+	USHORT Status;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("AYNC - InvalidStateWhenScan(state=%ld). Reset SYNC machine\n", pAd->Mlme.SyncMachine.CurrState));
+	pAd->Mlme.SyncMachine.CurrState = SYNC_IDLE;
+	Status = MLME_STATE_MACHINE_REJECT;
+	MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_SCAN_CONF, 2, &Status, 0);
+}
+
+/* 
+	==========================================================================
+	Description:
+	==========================================================================
+ */
+VOID InvalidStateWhenJoin(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+{
+	USHORT Status;
+	DBGPRINT(RT_DEBUG_TRACE, ("InvalidStateWhenJoin(state=%ld, msg=%ld). Reset SYNC machine\n", 
+								pAd->Mlme.SyncMachine.CurrState,
+								Elem->MsgType));
+	if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BSS_SCAN_IN_PROGRESS))
+	{
+		RTMPResumeMsduTransmission(pAd);
+	}
+	pAd->Mlme.SyncMachine.CurrState = SYNC_IDLE;
+	Status = MLME_STATE_MACHINE_REJECT;
+	MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_JOIN_CONF, 2, &Status, 0);
+}
+
+/* 
+	==========================================================================
+	Description:
+	==========================================================================
+ */
+VOID InvalidStateWhenStart(
+	IN PRTMP_ADAPTER pAd, 
+	IN MLME_QUEUE_ELEM *Elem) 
+{
+	USHORT Status;
+	DBGPRINT(RT_DEBUG_TRACE, ("InvalidStateWhenStart(state=%ld). Reset SYNC machine\n", pAd->Mlme.SyncMachine.CurrState));
+	pAd->Mlme.SyncMachine.CurrState = SYNC_IDLE;
+	Status = MLME_STATE_MACHINE_REJECT;
+	MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_START_CONF, 2, &Status, 0);
+}
+
+/* 
+	==========================================================================
+	Description:
+
+	IRQL = DISPATCH_LEVEL
+	
+	==========================================================================
+ */
+VOID EnqueuePsPoll(
+	IN PRTMP_ADAPTER pAd) 
+{
+#ifdef RALINK_ATE
+    if (ATE_ON(pAd))
+    {
+		return;
+    }
+#endif /* RALINK_ATE */
+
+	
+	if (pAd->StaCfg.WindowsPowerMode == Ndis802_11PowerModeLegacy_PSP)
+    	pAd->PsPollFrame.FC.PwrMgmt = PWR_SAVE;
+	MiniportMMRequest(pAd, 0, (PUCHAR)&pAd->PsPollFrame, sizeof(PSPOLL_FRAME));
+#ifdef RTMP_MAC_USB
+	/* Keep Waking up */
+	if (pAd->CountDowntoPsm == 0)
+		pAd->CountDowntoPsm = 2;	/* 100 ms; stay awake 200ms at most, average will be 1xx ms */
+#endif /* RTMP_MAC_USB */
+
+}
+
+
+/* 
+	==========================================================================
+	Description:
+	==========================================================================
+ */
+VOID EnqueueProbeRequest(
+	IN PRTMP_ADAPTER pAd) 
+{
+	NDIS_STATUS     NState;
+	PUCHAR          pOutBuffer;
+	ULONG           FrameLen = 0;
+	HEADER_802_11   Hdr80211;
+
+	DBGPRINT(RT_DEBUG_TRACE, ("force out a ProbeRequest ...\n"));
+
+	NState = MlmeAllocateMemory(pAd, &pOutBuffer);  /* Get an unused nonpaged memory */
+	if (NState == NDIS_STATUS_SUCCESS) 
+	{
+		MgtMacHeaderInit(pAd, &Hdr80211, SUBTYPE_PROBE_REQ, 0, BROADCAST_ADDR,
+							BROADCAST_ADDR);
+
+		/* this ProbeRequest explicitly specify SSID to reduce unwanted ProbeResponse */
+		MakeOutgoingFrame(pOutBuffer,                     &FrameLen,
+						  sizeof(HEADER_802_11),          &Hdr80211,
+						  1,                              &SsidIe,
+						  1,                              &pAd->CommonCfg.SsidLen,
+						  pAd->CommonCfg.SsidLen,		  pAd->CommonCfg.Ssid,
+						  1,                              &SupRateIe,
+						  1,                              &pAd->StaActive.SupRateLen,
+						  pAd->StaActive.SupRateLen,      pAd->StaActive.SupRate, 
+						  END_OF_ARGS);
+		MiniportMMRequest(pAd, 0, pOutBuffer, FrameLen);
+		MlmeFreeMemory(pAd, pOutBuffer);
+	}
+
+}
+
+#ifdef DOT11_N_SUPPORT
+#ifdef DOT11N_DRAFT3
+VOID BuildEffectedChannelList(
+	IN PRTMP_ADAPTER pAd)
+{
+	UCHAR		EChannel[11];
+	UCHAR		i, j, k;
+	UCHAR		UpperChannel = 0, LowerChannel = 0;
+	
+	RTMPZeroMemory(EChannel, 11);
+	DBGPRINT(RT_DEBUG_TRACE, ("BuildEffectedChannelList:CtrlCh=%d,CentCh=%d,AuxCtrlCh=%d,AuxExtCh=%d\n", 
+								pAd->CommonCfg.Channel, pAd->CommonCfg.CentralChannel, 
+								pAd->MlmeAux.AddHtInfo.ControlChan, 
+								pAd->MlmeAux.AddHtInfo.AddHtInfo.ExtChanOffset));
+
+	/* 802.11n D4 11.14.3.3: If no secondary channel has been selected, all channels in the frequency band shall be scanned. */
+	{
+		for (k = 0;k < pAd->ChannelListNum;k++)
+		{
+			if (pAd->ChannelList[k].Channel <=14 )
+			pAd->ChannelList[k].bEffectedChannel = TRUE;
+		}
+		return;
+	}	
+	
+	i = 0;
+	/* Find upper and lower channel according to 40MHz current operation. */
+	if (pAd->CommonCfg.CentralChannel < pAd->CommonCfg.Channel)
+	{
+		UpperChannel = pAd->CommonCfg.Channel;
+		LowerChannel = pAd->CommonCfg.CentralChannel-2;
+	}
+	else if (pAd->CommonCfg.CentralChannel > pAd->CommonCfg.Channel)
+	{
+		UpperChannel = pAd->CommonCfg.CentralChannel+2;
+		LowerChannel = pAd->CommonCfg.Channel;
+	}
+	else
+	{
+		DBGPRINT(RT_DEBUG_TRACE, ("LinkUP 20MHz . No Effected Channel \n"));
+		/* Now operating in 20MHz, doesn't find 40MHz effected channels */
+		return;
+	}
+
+	DeleteEffectedChannelList(pAd);	
+
+	DBGPRINT(RT_DEBUG_TRACE, ("BuildEffectedChannelList!LowerChannel ~ UpperChannel; %d ~ %d \n", LowerChannel, UpperChannel));
+
+	/* Find all channels that are below lower channel.. */
+	if (LowerChannel > 1)
+	{
+		EChannel[0] = LowerChannel - 1;
+		i = 1;
+		if (LowerChannel > 2)
+		{
+			EChannel[1] = LowerChannel - 2;
+			i = 2;
+			if (LowerChannel > 3)
+			{
+				EChannel[2] = LowerChannel - 3;
+				i = 3;
+			}
+		}
+	}
+	/* Find all channels that are between  lower channel and upper channel. */
+	for (k = LowerChannel;k <= UpperChannel;k++)
+	{
+		EChannel[i] = k;
+		i++;
+	}
+	/* Find all channels that are above upper channel.. */
+	if (UpperChannel < 14)
+	{
+		EChannel[i] = UpperChannel + 1;
+		i++;
+		if (UpperChannel < 13)
+		{
+			EChannel[i] = UpperChannel + 2;
+			i++;
+			if (UpperChannel < 12)
+			{
+				EChannel[i] = UpperChannel + 3;
+				i++;
+			}
+		}
+	}
+	/* 
+	    Total i channels are effected channels. 
+	    Now find corresponding channel in ChannelList array.  Then set its bEffectedChannel= TRUE
+	*/
+	for (j = 0;j < i;j++)
+	{
+		for (k = 0;k < pAd->ChannelListNum;k++)
+		{
+			if (pAd->ChannelList[k].Channel == EChannel[j])
+			{
+				pAd->ChannelList[k].bEffectedChannel = TRUE;
+				DBGPRINT(RT_DEBUG_TRACE,(" EffectedChannel[%d]( =%d)\n", k, EChannel[j]));
+				break;
+			}
+		}
+	}
+}
+
+
+VOID DeleteEffectedChannelList(
+	IN PRTMP_ADAPTER pAd)
+{
+	UCHAR		i;
+	/*Clear all bEffectedChannel in ChannelList array. */
+ 	for (i = 0; i < pAd->ChannelListNum; i++)		
+	{
+		pAd->ChannelList[i].bEffectedChannel = FALSE;
+	}	
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Control Primary&Central Channel, ChannelWidth and Second Channel Offset
+
+	Arguments:
+		pAd						Pointer to our adapter
+		PrimaryChannel			Primary Channel
+		CentralChannel			Central Channel
+		ChannelWidth				BW_20 or BW_40
+		SecondaryChannelOffset	EXTCHA_NONE, EXTCHA_ABOVE and EXTCHA_BELOW
+		
+	Return Value:
+		None
+		
+	Note:
+		
+	========================================================================
+*/
+VOID CntlChannelWidth(
+	IN PRTMP_ADAPTER	pAd,
+	IN UCHAR			PrimaryChannel,
+	IN UCHAR			CentralChannel,	
+	IN UCHAR			ChannelWidth,
+	IN UCHAR			SecondaryChannelOffset) 
+{
+	UCHAR	Value = 0;
+	UINT32	Data = 0;
+
+
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: PrimaryChannel[%d] \n",__FUNCTION__,PrimaryChannel));
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: CentralChannel[%d] \n",__FUNCTION__,CentralChannel));
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: ChannelWidth[%d] \n",__FUNCTION__,ChannelWidth));
+	DBGPRINT(RT_DEBUG_TRACE, ("%s: SecondaryChannelOffset[%d] \n",__FUNCTION__,SecondaryChannelOffset));
+
+#ifdef DOT11_N_SUPPORT
+	/*Change to AP channel */
+	if (ChannelWidth == BW_40)
+	{
+		if(SecondaryChannelOffset == EXTCHA_ABOVE)
+		{	
+			/* Must using 40MHz. */
+			pAd->CommonCfg.BBPCurrentBW = BW_40;
+			AsicSwitchChannel(pAd, CentralChannel, FALSE);
+			AsicLockChannel(pAd, CentralChannel);
+
+			RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
+			Value &= (~0x18);
+			Value |= 0x10;
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
+
+			/*  RX : control channel at lower */ 
+			RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
+			Value &= (~0x20);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
+
+			RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
+			Data &= 0xfffffffe;
+			RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
+
+			if (pAd->MACVersion == 0x28600100)
+			{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
+			DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
+			}	
+
+			DBGPRINT(RT_DEBUG_TRACE, ("!!!40MHz Lower !!! Control Channel at Below. Central = %d \n", pAd->CommonCfg.CentralChannel ));
+		}
+		else if (SecondaryChannelOffset == EXTCHA_BELOW)
+		{	
+			/* Must using 40MHz. */
+			pAd->CommonCfg.BBPCurrentBW = BW_40;
+			AsicSwitchChannel(pAd, CentralChannel, FALSE);
+			AsicLockChannel(pAd, CentralChannel);
+
+			RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
+			Value &= (~0x18);
+			Value |= 0x10;
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
+
+			RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
+			Data |= 0x1;
+			RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
+
+			RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
+			Value |= (0x20);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
+
+			if (pAd->MACVersion == 0x28600100)
+			{
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
+			RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
+			DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
+			}
+
+			DBGPRINT(RT_DEBUG_TRACE, ("!!! 40MHz Upper !!! Control Channel at UpperCentral = %d \n", CentralChannel));
+		}
+	}
+	else
+#endif /* DOT11_N_SUPPORT */
+	{
+		pAd->CommonCfg.BBPCurrentBW = BW_20;
+		AsicSwitchChannel(pAd, PrimaryChannel, FALSE);
+		AsicLockChannel(pAd, PrimaryChannel);
+
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
+		Value &= (~0x18);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
+
+		RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
+		Data &= 0xfffffffe;
+		RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
+
+		RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
+		Value &= (~0x20);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
+
+		if (pAd->MACVersion == 0x28600100)
+		{
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x08);
+		RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x11);
+		DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
+		}
+
+		DBGPRINT(RT_DEBUG_TRACE, ("!!! 20MHz !!! \n" ));
+	}
+
+	RTMPSetAGCInitValue(pAd, pAd->CommonCfg.BBPCurrentBW);
+
+	RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R66, &pAd->BbpTuning.R66CurrentValue);
+}
+
+
+#endif /* DOT11N_DRAFT3 */
+#endif /* DOT11_N_SUPPORT */
+
+/*
+    ==========================================================================
+    Description:
+        MLME Cancel the SCAN req state machine procedure
+    ==========================================================================
+ */
+VOID ScanCnclAction(
+	IN PRTMP_ADAPTER pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	BOOLEAN Cancelled;
+
+	RTMPCancelTimer(&pAd->MlmeAux.ScanTimer, &Cancelled);
+	pAd->MlmeAux.Channel = 0;
+	ScanNextChannel(pAd, OPMODE_STA);
+
+	return;
+}
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/sta/wpa.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/sta/wpa.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/sta/wpa.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/sta/wpa.c	2017-09-23 03:42:49.866675529 +0800
@@ -0,0 +1,420 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include "rt_config.h"
+
+void inc_byte_array(UCHAR *counter, int len);
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Process MIC error indication and record MIC error timer.
+		
+	Arguments:
+		pAd 	Pointer to our adapter
+		pWpaKey 		Pointer to the WPA key structure
+		
+	Return Value:
+		None
+		
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+	
+	========================================================================
+*/
+VOID	RTMPReportMicError(
+	IN	PRTMP_ADAPTER	pAd, 
+	IN	PCIPHER_KEY 	pWpaKey)
+{
+	ULONG	Now;
+    UCHAR   unicastKey = (pWpaKey->Type == PAIRWISE_KEY ? 1:0);
+
+	/* Record Last MIC error time and count */
+	NdisGetSystemUpTime(&Now);
+	if (pAd->StaCfg.MicErrCnt == 0)
+	{
+		pAd->StaCfg.MicErrCnt++;
+		pAd->StaCfg.LastMicErrorTime = Now;
+        NdisZeroMemory(pAd->StaCfg.ReplayCounter, 8);        
+	}
+	else if (pAd->StaCfg.MicErrCnt == 1)
+	{
+		if ((pAd->StaCfg.LastMicErrorTime + (60 * OS_HZ)) < Now)
+		{
+			/* Update Last MIC error time, this did not violate two MIC errors within 60 seconds */
+			pAd->StaCfg.LastMicErrorTime = Now; 		
+		}
+		else
+		{
+
+				RTMPSendWirelessEvent(pAd, IW_COUNTER_MEASURES_EVENT_FLAG, pAd->MacTab.Content[BSSID_WCID].Addr, BSS0, 0); 
+
+			pAd->StaCfg.LastMicErrorTime = Now; 		
+			/* Violate MIC error counts, MIC countermeasures kicks in */
+			pAd->StaCfg.MicErrCnt++;
+			/*
+			 We shall block all reception
+			 We shall clean all Tx ring and disassoicate from AP after next EAPOL frame
+			 
+			 No necessary to clean all Tx ring, on RTMPHardTransmit will stop sending non-802.1X EAPOL packets
+			 if pAd->StaCfg.MicErrCnt greater than 2.
+			*/
+		}
+	}
+	else
+	{
+		/* MIC error count >= 2 */
+		/* This should not happen */
+		;
+	}
+    MlmeEnqueue(pAd, 
+				MLME_CNTL_STATE_MACHINE,
+				OID_802_11_MIC_FAILURE_REPORT_FRAME,
+				1,
+				&unicastKey, 0);
+
+    if (pAd->StaCfg.MicErrCnt == 2)
+    {
+        RTMPSetTimer(&pAd->StaCfg.WpaDisassocAndBlockAssocTimer, 100);
+    }
+}
+
+
+#ifdef WPA_SUPPLICANT_SUPPORT
+#define	LENGTH_EAP_H    4
+/* If the received frame is EAP-Packet ,find out its EAP-Code (Request(0x01), Response(0x02), Success(0x03), Failure(0x04)). */
+INT	    WpaCheckEapCode(
+	IN  PRTMP_ADAPTER   		pAd,
+	IN  PUCHAR				pFrame,
+	IN  USHORT				FrameLen,
+	IN  USHORT				OffSet)
+{
+	
+	PUCHAR	pData;
+	INT	result = 0;
+		
+	if( FrameLen < OffSet + LENGTH_EAPOL_H + LENGTH_EAP_H ) 
+		return result;
+		
+	pData = pFrame + OffSet;		/* skip offset bytes */
+ 	
+	if(*(pData+1) == EAPPacket) 	/* 802.1x header - Packet Type */
+	{
+		 result = *(pData+4);		/* EAP header - Code */
+	}
+
+	return result;
+}
+
+#endif /* WPA_SUPPLICANT_SUPPORT */
+
+VOID	WpaMicFailureReportFrame(
+	IN  PRTMP_ADAPTER   pAd,
+	IN MLME_QUEUE_ELEM *Elem)
+{
+	PUCHAR              pOutBuffer = NULL;
+	UCHAR               Header802_3[14];
+	ULONG               FrameLen = 0;
+	UCHAR				*mpool;
+	PEAPOL_PACKET       pPacket;
+	UCHAR               Mic[16];
+    BOOLEAN             bUnicast;
+        
+	DBGPRINT(RT_DEBUG_TRACE, ("WpaMicFailureReportFrame ----->\n"));
+
+    bUnicast = (Elem->Msg[0] == 1 ? TRUE:FALSE);
+	pAd->Sequence = ((pAd->Sequence) + 1) & (MAX_SEQ_NUMBER);
+
+	/* init 802.3 header and Fill Packet */
+	MAKE_802_3_HEADER(Header802_3, pAd->CommonCfg.Bssid, pAd->CurrentAddress, EAPOL);	
+
+	/* Allocate memory for output */
+	os_alloc_mem(NULL, (PUCHAR *)&mpool, TX_EAPOL_BUFFER);
+	if (mpool == NULL)
+    {
+        DBGPRINT(RT_DEBUG_ERROR, ("!!!%s : no memory!!!\n", __FUNCTION__));
+        return;
+    }
+
+	pPacket = (PEAPOL_PACKET)mpool;
+	NdisZeroMemory(pPacket, TX_EAPOL_BUFFER);
+	
+	pPacket->ProVer	= EAPOL_VER;
+	pPacket->ProType	= EAPOLKey;
+	
+	pPacket->KeyDesc.Type = WPA1_KEY_DESC;
+
+    /* Request field presented */
+    pPacket->KeyDesc.KeyInfo.Request = 1;
+    
+	if(pAd->StaCfg.WepStatus  == Ndis802_11Encryption3Enabled)
+	{
+		pPacket->KeyDesc.KeyInfo.KeyDescVer = 2;
+	} 
+	else	  /* TKIP */
+	{
+		pPacket->KeyDesc.KeyInfo.KeyDescVer = 1;
+	}
+
+    pPacket->KeyDesc.KeyInfo.KeyType = (bUnicast ? PAIRWISEKEY : GROUPKEY);
+
+	/* KeyMic field presented */
+	pPacket->KeyDesc.KeyInfo.KeyMic  = 1;
+
+    /* Error field presented */
+	pPacket->KeyDesc.KeyInfo.Error  = 1;
+    
+	/* Update packet length after decide Key data payload */
+	SET_UINT16_TO_ARRARY(pPacket->Body_Len, MIN_LEN_OF_EAPOL_KEY_MSG)
+
+	/* Key Replay Count */
+	NdisMoveMemory(pPacket->KeyDesc.ReplayCounter, pAd->StaCfg.ReplayCounter, LEN_KEY_DESC_REPLAY);
+    inc_byte_array(pAd->StaCfg.ReplayCounter, 8);
+
+	/* Convert to little-endian format. */
+	*((USHORT *)&pPacket->KeyDesc.KeyInfo) = cpu2le16(*((USHORT *)&pPacket->KeyDesc.KeyInfo));
+
+
+	MlmeAllocateMemory(pAd, (PUCHAR *)&pOutBuffer);  /* allocate memory */
+	if(pOutBuffer == NULL)
+	{
+		os_free_mem(NULL, mpool);
+		return;
+	}
+    
+	/*
+	   Prepare EAPOL frame for MIC calculation
+	   Be careful, only EAPOL frame is counted for MIC calculation
+	*/
+	MakeOutgoingFrame(pOutBuffer,               &FrameLen,
+		              CONV_ARRARY_TO_UINT16(pPacket->Body_Len) + 4,   pPacket,
+		              END_OF_ARGS);
+
+	/* Prepare and Fill MIC value */
+	NdisZeroMemory(Mic, sizeof(Mic));
+	if(pAd->StaCfg.WepStatus  == Ndis802_11Encryption3Enabled)
+	{	/* AES */
+        UCHAR digest[20] = {0};
+		RT_HMAC_SHA1(pAd->StaCfg.PTK, LEN_PTK_KCK, pOutBuffer, FrameLen, digest, SHA1_DIGEST_SIZE);
+		NdisMoveMemory(Mic, digest, LEN_KEY_DESC_MIC);
+	} 
+	else
+	{	/* TKIP */
+		RT_HMAC_MD5(pAd->StaCfg.PTK, LEN_PTK_KCK, pOutBuffer, FrameLen, Mic, MD5_DIGEST_SIZE);
+	}
+	NdisMoveMemory(pPacket->KeyDesc.KeyMic, Mic, LEN_KEY_DESC_MIC);
+
+	/* copy frame to Tx ring and send MIC failure report frame to authenticator */
+	RTMPToWirelessSta(pAd, &pAd->MacTab.Content[BSSID_WCID],
+					  Header802_3, LENGTH_802_3, 
+					  (PUCHAR)pPacket, 
+					  CONV_ARRARY_TO_UINT16(pPacket->Body_Len) + 4, FALSE);
+
+	MlmeFreeMemory(pAd, (PUCHAR)pOutBuffer);
+
+	os_free_mem(NULL, mpool);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("WpaMicFailureReportFrame <-----\n"));
+}
+
+/** from wpa_supplicant
+ * inc_byte_array - Increment arbitrary length byte array by one
+ * @counter: Pointer to byte array
+ * @len: Length of the counter in bytes
+ *
+ * This function increments the last byte of the counter by one and continues
+ * rolling over to more significant bytes if the byte was incremented from
+ * 0xff to 0x00.
+ */
+void inc_byte_array(UCHAR *counter, int len)
+{
+	int pos = len - 1;
+	while (pos >= 0) {
+		counter[pos]++;
+		if (counter[pos] != 0)
+			break;
+		pos--;
+	}
+}
+
+VOID WpaDisassocApAndBlockAssoc(
+    IN PVOID SystemSpecific1, 
+    IN PVOID FunctionContext, 
+    IN PVOID SystemSpecific2, 
+    IN PVOID SystemSpecific3) 
+{
+    RTMP_ADAPTER                *pAd = (PRTMP_ADAPTER)FunctionContext;
+    MLME_DISASSOC_REQ_STRUCT    DisassocReq;
+
+	/* disassoc from current AP first */
+	DBGPRINT(RT_DEBUG_TRACE, ("RTMPReportMicError - disassociate with current AP after sending second continuous EAPOL frame\n"));
+	DisassocParmFill(pAd, &DisassocReq, pAd->CommonCfg.Bssid, REASON_MIC_FAILURE);
+	MlmeEnqueue(pAd, ASSOC_STATE_MACHINE, MT2_MLME_DISASSOC_REQ, sizeof(MLME_DISASSOC_REQ_STRUCT), &DisassocReq, 0);
+
+	pAd->Mlme.CntlMachine.CurrState = CNTL_WAIT_DISASSOC;
+	pAd->StaCfg.bBlockAssoc = TRUE;
+}
+
+VOID WpaStaPairwiseKeySetting(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	PCIPHER_KEY pSharedKey;
+	PMAC_TABLE_ENTRY pEntry;
+
+	pEntry = &pAd->MacTab.Content[BSSID_WCID];
+	
+	/* Pairwise key shall use key#0  */
+	pSharedKey = &pAd->SharedKey[BSS0][0];
+
+	NdisMoveMemory(pAd->StaCfg.PTK, pEntry->PTK, LEN_PTK);
+	
+	/* Prepare pair-wise key information into shared key table */
+	NdisZeroMemory(pSharedKey, sizeof(CIPHER_KEY));  
+	pSharedKey->KeyLen = LEN_TK;
+    NdisMoveMemory(pSharedKey->Key, &pAd->StaCfg.PTK[32], LEN_TK);
+	NdisMoveMemory(pSharedKey->RxMic, &pAd->StaCfg.PTK[48], LEN_TKIP_MIC);
+	NdisMoveMemory(pSharedKey->TxMic, &pAd->StaCfg.PTK[48+LEN_TKIP_MIC], LEN_TKIP_MIC);            
+
+	/* Decide its ChiperAlg */
+	if (pAd->StaCfg.PairCipher == Ndis802_11Encryption2Enabled)
+		pSharedKey->CipherAlg = CIPHER_TKIP;
+	else if (pAd->StaCfg.PairCipher == Ndis802_11Encryption3Enabled)
+		pSharedKey->CipherAlg = CIPHER_AES;
+	else
+		pSharedKey->CipherAlg = CIPHER_NONE;
+
+	/* Update these related information to MAC_TABLE_ENTRY */
+	NdisMoveMemory(pEntry->PairwiseKey.Key, &pAd->StaCfg.PTK[32], LEN_TK);
+	NdisMoveMemory(pEntry->PairwiseKey.RxMic, &pAd->StaCfg.PTK[48], LEN_TKIP_MIC);
+	NdisMoveMemory(pEntry->PairwiseKey.TxMic, &pAd->StaCfg.PTK[48+LEN_TKIP_MIC], LEN_TKIP_MIC);            
+	pEntry->PairwiseKey.CipherAlg = pSharedKey->CipherAlg;
+	
+	/* Update pairwise key information to ASIC Shared Key Table	 */
+	RTMP_ASIC_SHARED_KEY_TABLE(pAd, 
+						  BSS0, 
+						  0, 
+						  pSharedKey);
+
+	/* Update ASIC WCID attribute table and IVEIV table */
+	RTMP_SET_WCID_SEC_INFO(pAd, 
+						BSS0, 
+						0, 
+						pSharedKey->CipherAlg, 
+						BSSID_WCID,
+						SHAREDKEYTABLE);
+
+	RTMP_SET_PORT_SECURED(pAd);
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("%s : AID(%d) port secured\n", __FUNCTION__, pEntry->Aid));
+
+}
+
+VOID WpaStaGroupKeySetting(
+	IN	PRTMP_ADAPTER	pAd)
+{
+	PCIPHER_KEY 		pSharedKey;
+
+	pSharedKey = &pAd->SharedKey[BSS0][pAd->StaCfg.DefaultKeyId];
+
+	/* Prepare pair-wise key information into shared key table */
+	NdisZeroMemory(pSharedKey, sizeof(CIPHER_KEY));  
+	pSharedKey->KeyLen = LEN_TK;
+	NdisMoveMemory(pSharedKey->Key, pAd->StaCfg.GTK, LEN_TK);
+	NdisMoveMemory(pSharedKey->RxMic, &pAd->StaCfg.GTK[16], LEN_TKIP_MIC);
+	NdisMoveMemory(pSharedKey->TxMic, &pAd->StaCfg.GTK[24], LEN_TKIP_MIC);
+
+	/* Update Shared Key CipherAlg */
+	pSharedKey->CipherAlg = CIPHER_NONE;
+	if (pAd->StaCfg.GroupCipher == Ndis802_11Encryption2Enabled)
+		pSharedKey->CipherAlg = CIPHER_TKIP;
+	else if (pAd->StaCfg.GroupCipher == Ndis802_11Encryption3Enabled)
+		pSharedKey->CipherAlg = CIPHER_AES;
+	else if (pAd->StaCfg.GroupCipher == Ndis802_11GroupWEP40Enabled)
+		pSharedKey->CipherAlg = CIPHER_WEP64;
+	else if (pAd->StaCfg.GroupCipher == Ndis802_11GroupWEP104Enabled)
+		pSharedKey->CipherAlg = CIPHER_WEP128;
+
+	/* Update group key information to ASIC Shared Key Table */
+	RTMP_ASIC_SHARED_KEY_TABLE(pAd, 
+						  	BSS0, 
+						  	pAd->StaCfg.DefaultKeyId, 
+							pSharedKey);
+
+	/* STA doesn't need to set WCID attribute for group key */
+}
+
+
+/*
+	========================================================================
+	
+	Routine Description:
+		Send EAPoL-Start packet to AP.
+
+	Arguments:
+		pAd         - NIC Adapter pointer
+		
+	Return Value:
+		None
+		
+	IRQL = DISPATCH_LEVEL
+	
+	Note:
+		Actions after link up
+		1. Change the correct parameters
+		2. Send EAPOL - START
+		
+	========================================================================
+*/
+VOID    WpaSendEapolStart(
+	IN	PRTMP_ADAPTER	pAd,
+	IN  PUCHAR          pBssid)
+{
+	IEEE8021X_FRAME		Packet;
+	UCHAR               Header802_3[14];
+	
+	DBGPRINT(RT_DEBUG_TRACE, ("-----> WpaSendEapolStart\n"));
+
+	NdisZeroMemory(Header802_3,sizeof(UCHAR)*14);
+
+	MAKE_802_3_HEADER(Header802_3, pBssid, &pAd->CurrentAddress[0], EAPOL);
+	
+	/* Zero message 2 body */
+	NdisZeroMemory(&Packet, sizeof(Packet));
+	Packet.Version = EAPOL_VER;
+	Packet.Type    = EAPOLStart;
+	Packet.Length  = cpu2be16(0);
+	
+	/* Copy frame to Tx ring */
+	RTMPToWirelessSta((PRTMP_ADAPTER)pAd, &pAd->MacTab.Content[BSSID_WCID],
+					 Header802_3, LENGTH_802_3, (PUCHAR)&Packet, 4, TRUE);
+
+	DBGPRINT(RT_DEBUG_TRACE, ("<----- WpaSendEapolStart\n"));
+}
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/sta_ate_iwpriv_usage.txt linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/sta_ate_iwpriv_usage.txt
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/sta_ate_iwpriv_usage.txt	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/sta_ate_iwpriv_usage.txt	2017-09-23 03:42:49.866675529 +0800
@@ -0,0 +1,445 @@
+===================================================================================================
+ATE Test Command Format for station driver
+
+****** IMPORTANT ******
+If you are not familiar with hardware, it is recommanded not to modify hardware default value.
+It may damage hardware.
+
+===================================================================================================
+Usage:
+	iwpriv ra0 [act] [parameters]=[val]
+
+
+where
+
+[act]	[parameters] 	[val] constraints		explaination
+-----	------------- 	-----------------    	--------------------------------
+
+=====================================
+1. Set ATE actions.
+	Value:
+		ATESTART	- Start ATE function and stop station function.
+		ATESTOP		- Stop ATE function and start station function.
+		TXCONT		- Start continuous TX, for power mask.
+		TXCARR		- Start carrier test, for frequency calibration.
+		TXFRAME		- Transmit frame, for EVM.
+		RXFRAME		- Continuous RX, for PER/FER.
+		
+1.1 ATEDA
+		Set ATE frame header destination address.
+	Value:
+		xx:xx:xx:xx:xx:xx	; hex
+
+1.2 ATESA		    
+		Set ATE frame header source addr.
+	Value:
+		xx:xx:xx:xx:xx:xx	; hex
+
+1.3 ATEBSSID	    
+		Set ATE frame header BSSID.
+	Value:
+		xx:xx:xx:xx:xx:xx	; hex
+
+1.4 ATECHANNEL	    
+		Set ATE Channel, deimal.
+	Value:
+		802.11b/g: 1 ~ 14 depends on CountryRegion setting
+
+1.5 ATETXPOW0
+		Set ATE Tx power for Antenna 1.
+	Value:
+		0 ~ 31			; 2.4GHz, deimal
+		-7 ~15			; 5.5GHz, deimal
+
+1.6 ATETXPOW1
+		Set ATE Tx power for Antenna 2.
+	Value:
+		0 ~ 31			; 2.4GHz, decimal
+		-7 ~15			; 5.5GHz, deimal
+
+1.7 ATETXFREQOFFSET	    
+		Set ATE RF frequency offset.
+	Value:
+		0 ~ 63			; unit: 2KHz, decimal
+
+1.8 ATETXLEN	    
+		Set ATE frame length.
+	Value:
+		24 ~ 2312			; decimal
+
+1.9 ATETXCNT	    
+		Set ATE frame Tx count.
+	Value:
+		1 ~				; 32-bit, decimal
+
+1.10 ATETXMODE (Refer to TxMode)
+		Set ATE Tx Mode.
+	Value:
+		0: 	CCK			802.11b
+		1: 	OFDM		        802.11g
+		2: 	HT_MIX 		        802.11b/g/n
+		3: 	Green Field		802.11n
+
+1.11 ATETXBW (Refer to TxMode)
+		Set ATE Tx and Rx Bandwidth.
+	Value:
+		0: 	20MHz
+		1: 	40MHz
+
+1.12 ATETXGI (Refer to TxMode) 
+		Set ATE Tx Guard Interval.
+	Value:
+		0: 	Long 
+		1: 	Short
+
+1.13 ATETXMCS (Refer to TxMode)
+		Set ATE Tx MCS type.
+	Value:
+		0 ~ 15
+
+1.14 ATETXANT	    
+		Set ATE TX antenna.
+	Value:
+		0: 	All
+		1: 	Antenna one
+		2: 	Antenna two
+
+1.15 ATERXANT
+		Set ATE RX antenna.
+	Value:
+		0: 	All
+		1: 	Antenna one
+		2: 	Antenna two 
+		3: 	Antenna three
+
+1.16 ATERXFER	    
+		Set ATE to periodically reset and show up RxCount (per-second) and RxTotalCount.
+	Value:
+		0: 	Disable counter visability
+		1: 	Enable counter visability
+
+1.17 ATESHOW	    
+		Show all parameters of ATE.
+	Value:
+		1
+
+1.18 ATEHELP
+		List all commands of ATE.
+	Value:
+		1
+
+1.19 ResetCounter
+		Reset statistic counter.
+	Value:
+		1
+
+1.20 ATERRF
+		Read all of the RF registers.
+	Value:
+		1
+
+1.21 ATEWRF1
+		Write the RF register 1.
+	Value:
+		xxxxxxxx          ;32-bit, hex
+
+1.22 ATEWRF2
+		Write the RF register 2.
+	Value:
+		xxxxxxxx          ;32-bit, hex
+
+1.23 ATEWRF3
+		Write the RF register 3.
+	Value:
+		xxxxxxxx          ;32-bit, hex
+
+1.24 ATEWRF4
+		Write the RF register 4.
+	Value:
+		xxxxxxxx          ;32-bit, hex
+
+1.25 ATELDE2P
+		Overwrite all EEPROM contents
+	Value:
+		1
+	E.g.
+		iwpriv ra0 set ATELDE2P=1
+
+1.26 ATERE2P
+		Display all EEPROM content.
+	Value:
+		1
+	E.g.
+		iwpriv ra0 set ATERE2P=1
+
+===================================================================================================
+2. Examples:
+=========
+
+2.1 Check EVM & Power
+		iwpriv ra0 set ATE=ATESTART
+		iwpriv ra0 set ATEDA=00:11:22:33:44:55
+		iwpriv ra0 set ATESA=00:aa:bb:cc:dd:ee
+		iwpriv ra0 set ATEBSSID=00:11:22:33:44:55
+		iwpriv ra0 set ATECHANNEL=1			; set Channel
+		iwpriv ra0 set ATETXMODE=1			; set TX-Mode.
+		iwpriv ra0 set ATETXMCS=7			; set MCS type.
+		iwpriv ra0 set ATETXBW=0			; set Bandwidth
+		iwpriv ra0 set ATETXGI=0			; set Long GI.
+		iwpriv ra0 set ATETXLEN=1024		        ; set packet length.
+		iwpriv ra0 set ATETXPOW0=18
+		iwpriv ra0 set ATETXPOW1=18
+		iwpriv ra0 set ATETXCNT=100000
+		iwpriv ra0 set ATE=TXFRAME
+		¡K
+		iwpriv ra0 set ATETXPOW0=19
+		¡K
+		iwpriv ra0 set ATETXPOW0=20
+		¡K
+		iwpriv ra0 set ATE=ATESTART
+
+2.2 Check Carrier
+		iwpriv ra0 set ATE=ATESTART
+		iwpriv ra0 set ATECHANNEL=1			; set Channel
+		iwpriv ra0 set ATETXMODE=1			; set TX-Mode.
+		iwpriv ra0 set ATETXMCS=7			; set MCS type.
+		iwpriv ra0 set ATETXBW=0			; set Bandwidth
+		iwpriv ra0 set ATETXCNT=200			; Tx frame count(decmial)
+		iwpriv ra0 set ATE=TXFRAME			; Start Tx Frame(inform BBP to change, modulation mode)
+		iwpriv ra0 set ATE=TXCARR			; Start Tx carrier, Measure carrier with instrument
+		iwpriv ra0 set ATETXPOW0=05
+		iwpriv ra0 set ATETXPOW1=05
+		iwpriv ra0 set ATETXFREQOFFSET=19
+		iwpriv ra0 set ATE=ATESTART
+
+2.3 Check specturm mask
+		iwpriv ra0 set ATE=ATESTART
+		iwpriv ra0 set ATECHANNEL=1			; set Channel
+		iwpriv ra0 set ATETXMODE=1			; set TX-Mode.
+		iwpriv ra0 set ATETXMCS=7			; set MCS type.
+		iwpriv ra0 set ATETXBW=0			; set Bandwidth
+		iwpriv ra0 set ATETXCNT=200			; Tx frame count(decmial)
+		iwpriv ra0 set ATE=TXFRAME			; Start Tx Frame(inform BBP to change, modulation mode)
+		iwpriv ra0 set ATE=TXCONT			; Start continuous TX, Measure specturm mask with instrument
+		iwpriv ra0 set ATETXPOW0=5
+		iwpriv ra0 set ATETXPOW1=5
+		iwpriv ra0 set ATE=ATESTART
+
+2.4 Frequency offset tuning
+		iwpriv ra0 set ATE=ATESTART
+		iwpriv ra0 set ATECHANNEL=1			; set Channel
+		iwpriv ra0 set ATETXMODE=1			; set TX-Mode.
+		iwpriv ra0 set ATETXMCS=7			; set MCS type.
+		iwpriv ra0 set ATETXCNT=200			; Tx frame count(decmial)
+		iwpriv ra0 set ATETXFREQOFFSET=0	        ; Set frequency offset 0(decimal)
+		iwpriv ra0 set ATE=TXFRAME			; Start Tx Frame
+		iwpriv ra0 set ATE=TXCARR			; Start Tx carrier, Measure carrier frequency with instrument
+		iwpriv ra0 set ATETXFREQOFFSET=10	        ; Dynamic turning frequency offset, 10(decimal)
+		iwpriv ra0 set ATETXFREQOFFSET=20	        ; Dynamic turning frequency offset, 20(decimal)
+		iwpriv ra0 set ATE=ATESTART			; Stop, Store the tuning result to EEPROM
+
+2.5 Rx
+		iwpriv ra0 set ATE=ATESTART
+		iwpriv ra0 set ATECHANNEL=1			; set Channel
+		iwpriv ra0 set ResetCounter=1		        ; Reset statistic counter
+		iwpriv ra0 set ATETXFREQOFFSET=value            ;To use the ¡§value¡¨(decimal) you got in tx calibration
+		iwpriv ra0 set ATETXMODE=1			; set TX-Mode.
+		iwpriv ra0 set ATETXMCS=7			; set MCS type.
+		iwpriv ra0 set ATETXBW=0			; set Bandwidth
+		iwpriv ra0 set ATE=RXFRAME			; Start Rx,
+		iwpriv ra0 set ATERXFER=1			; show RxCnt and RSSI/per-antenna, Transmit test packets
+		iwpriv ra0 set ATE=ATESTART			; Stop
+		iwpriv ra0 stat 					; get statistics counter
+		iwpriv ra0 set ATERXFER=1
+		iwpriv ra0 set ATERXANT=1
+		
+		iwpriv ra0 set ATE=ATESTART
+		iwpriv ra0 set ATERXANT=0
+		iwpriv ra0 set ATE=RXFRAME
+
+2.6 Show all ate parameters
+		iwpriv ra0 set ATESHOW=1
+
+			Mode=4
+			TxPower0=0
+			TxPower1=0
+			TxAntennaSel=0
+			RxAntennaSel=0
+			BBPCurrentBW=0
+			GI=0
+			MCS=7
+			TxMode=1
+			Addr1=00:11:22:aa:bb:cc
+			Addr2=00:11:22:aa:bb:cc
+			Addr3=00:11:22:aa:bb:cc
+			Channel=1
+			TxLength=1024
+			TxCount=40000
+			TxRate=11
+			RFFreqOffset=0
+
+2.7 Online help
+		iwpriv ra0 set ATEHELP=1
+		
+			ATE=ATESTART, ATESTOP, TXCONT, TXCARR, TXFRAME, RXFRAME
+			ATEDA
+			ATESA
+			ATEBSSID
+			ATECHANNEL, range:0~14(unless A band !). 
+			ATETXPOW0, set power level of antenna 1.
+			ATETXPOW1, set power level of antenna 2.
+			ATETXANT, set TX antenna. 0: all, 1: antenna one, 2: antenna two.
+			ATERXANT, set RX antenna.0: all, 1: antenna one, 2: antenna two, 3: antenna three.
+			ATETXFREQOFFSET, set frequency offset, range 0~63.
+			ATETXBW, set BandWidth, 0:20MHz, 1:40MHz.
+			ATETXLEN, set Frame length, range 24~2312.
+			ATETXCNT, set how many frame going to transmit.
+			ATETXMCS, set MCS, reference to rate table.
+			ATETXMODE, set Mode 0: CCK, 1: OFDM, 2: HT-Mix, 3: GreenField, reference to rate table.
+			ATETXGI, set GI interval, 0: Long, 1: Short.
+			ATERXFER, 0: disable Rx Frame error rate. 1: enable Rx Frame error rate.
+		  	ATERRF, show all RF registers.
+			ATEWRF1, set RF1 register.
+			ATEWRF2, set RF2 register.
+			ATEWRF3, set RF3 register.
+			ATEWRF4, set RF4 register.
+			ATELDE2P, load EEPROM from .bin file.
+			ATERE2P, display all EEPROM content.
+			ATESHOW, display all parameters of ATE.
+			ATEHELP, online help.
+
+2.8 Display Rx Packet Count and RSSI
+		iwpriv ra0 set ATERXANT=0		==> Enable All Three Rx Antennas
+		iwpriv ra0 set ATERXFER=1		==> Enable Rx Frame Error Rate: RxCnt/RxTotal
+		iwpriv ra0 set ATE=RXFRAME	        ==> Start Rx
+			MlmePeriodicExec: Rx packet cnt = 2/4
+			MlmePeriodicExec: Rx AvgRssi0=-88, AvgRssi1=-80, AvgRssi2=-91
+			MlmePeriodicExec: Rx packet cnt = 2/6
+			MlmePeriodicExec: Rx AvgRssi0=-86, AvgRssi1=-77, AvgRssi2=-89¡K
+			¡K
+
+		iwpriv ra0 set ATERXANT=1		==> Enable Three Rx Antenna-1
+		iwpriv ra0 set ATERXFER=1		==> Enable Rx Frame Error Rate: RxCnt/RxTotal
+		iwpriv ra0 set ATE=RXFRAME	        ==> Start Rx
+			MlmePeriodicExec: Rx packet cnt = 0/7
+			MlmePeriodicExec: Rx AvgRssi=-87
+			MlmePeriodicExec: Rx packet cnt = 7/14
+			MlmePeriodicExec: Rx AvgRssi=-90
+			¡K
+			¡K
+
+
+===================================================================================================
+3. Hardware Access
+==================
+
+=====================================
+3.1 iwpriv ra0 bbp [parameters]=[Value]
+		Read/Write BBP registers by ID number.
+	BBPID
+
+3.1.1 Read BBP register, BBPID only, no ¡§=¡¨ symbol.
+	BBPID:
+		0 ~ xx			; decimal, 8-bit
+	BBPID=Value
+
+3.1.2 Write BBP register.
+	BBPID:
+		0 ~ xx			; decimal, 8-bit
+	Value:
+		00 ~FF			; hexdecimal, 8-bit
+
+=====================================
+3.2 iwpriv ra0 mac [parameters]=[val]
+		Read/Write MAC registers by offset.
+	MAC_OFFSET
+
+3.2.1 Read MAC register, MAC_OFFSET only, no ¡§=¡¨ symbol.
+	MAC_OFFSET:
+		0000 ~ FFFF		; hexdecimal, 16-bit
+	MAC_OFFSET=Value
+
+3.2.2 Write MAC register.
+	MAC_OFFSET:
+		0000 ~ FFFF		; hexdecimal, 16-bit
+	Value:
+		0000 ~FFFF		; hexdecimal, 32-bit
+
+=====================================
+3.3 iwpriv ra0 e2p [parameters]=[val]
+		Read/Write EEPROM content by address.
+	EEP_ADDR
+
+3.3.1 Read EEPROM content, EEP_ADDR only, no ¡§=¡¨ symbol.
+	EEP_ADDR:
+		00 ~ FF			; hexdecimal, 16-bit alignment (0, 2, 4, 6, 8, A, C, ¡K)
+	EEP_ADDR=Value
+
+3.3.2 Write EEPROM content.
+	EEP_ADDR:
+		00 ~ FF			; hexdecimal, 16-bit alignment (0, 2, 4, 6, 8, A, C, ¡K)
+	Value:
+		0000 ~FFFF		; hexdecimal, 16-bit
+
+=====================================
+3.4 Example
+
+3.4.1 Hardware access
+		iwpriv ra0 bbp 0				# read BBP register 0
+		iwpriv ra0 bbp 0=12				# write BBP register 0 as 0x12
+		iwpriv ra0 mac 0				# read MAC register 0
+		iwpriv ra0 mac 0=1234abcd		        # write MAC register 0 as 0x1234abcd
+		iwpriv ra0 e2p 0				# read E2PROM 0
+		iwpriv ra0 e2p c=12ab			        # write E2PROM 0xc as 0x12ab
+
+3.4.2 Statistic counter operation
+		iwpriv ra0 stat					# read statistic counter
+		iwpriv ra0 set ResetCounter=0	                # reset statistic counter
+
+	Suggestion:
+		1. To turn on ATE functionality, you have to add compile flag "RALINK_ATE" to Makefile
+		2. Before doing ATE testing, please stop AP function
+		3. If you want to test another ATE action, prefer to stop AP & ATE function
+		4. All ATE function settings will lose efficacy after reboot.
+		5. Before hardware register access, please reference hardware spec.
+	Note. 
+		In ATE mode, the channel must set via "ATECHANNEL"
+
+===================================================================================================
+4. ated
+=======
+4.1  Introduction
+The ated is an optional user space component for RT28xx Linux driver. 
+When Windows GUI starts, AP enters ATE mode (i.e.,ATESTART) immediately.
+It behaves as a proxy between Windows GUI and RT28xx Linux driver when ATE process proceeds.
+The ated will be killed automatically when Windows GUI is closed.
+You can kill it manually, too(for example, type '$killall ated').
+RT28xx linux driver will leave ATE mode either ated is killed or Windows GUI is closed.
+
+4.2  Environment setup
+1. Connect the platform you want to test directly with a Windows host by ether network line.
+2. In the Windows host, run WinPcap_4_0.exe for the QA GUI or ./RT2880_ATE/RaUI.exe(please unrar "RT2880_ATE.rar" to get it).
+
+4.3  How to use ated for ATE purpose
+0. First you should set both "HAS_ATE=y" and "HAS_QA_SUPPORT=y" in the file ~/Module/os/linux/config.mk and compile the driver.
+1. Modify the Makefile according to our target "PLATFORM".
+2. Change the path of "CROSS_COMPILE" if needed.
+3. Then type 'make' command to compile the source code of the daemon.
+4. After the driver interface has started up, attach both of the wireless interface and the ethernet       interface to the bridge interface.
+5. If you have no bridge interface, please give an IP address to the ethernet interface.
+   (for example : '$ated -beth0')
+6. After the interfaces have entered forwarding states, manually start ated, type '$ated -bbrX -iraX'.
+7. If your WLAN interface and Bridge interface is "ra0" and "br0" respectively, just type $ated.
+   (For further usage of options, type $ated -h)
+8. In the Windows host, run RT28xxQA_ATE.exe or ./RT2880_ATE/RaUI.exe.
+9. Select the wired network adapter, then press OK and wait for a moment.
+10.If the Windows host cannot tolerate such a broadcast storm from ated,
+   please run ated with option -u.(for example : '$ated -ira1 -u')
+11.If your target platform concerns its network security, please run RT28xxQA_unicast.exe instead of RT28xxQA_ATE.exe.
+
+Note : 
+a. The names of WLAN interface(default is "ra0") and Bridge interface(default is "br0") must be specified manually(for example : '$ated -bbr1 -ira2') if your WLAN interface or Bridge interface is not "ra0" or "br0" respectively !
+b. Please make sure no other RaUI is running before you excute ./RT2880_ATE/RaUI.exe.
+
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/tools/bin2h linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/tools/bin2h
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/tools/bin2h.c linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/tools/bin2h.c
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/tools/bin2h.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/tools/bin2h.c	2017-09-23 03:42:49.866675529 +0800
@@ -0,0 +1,136 @@
+/*
+ *************************************************************************
+ * Ralink Tech Inc.
+ * 5F., No.36, Taiyuan St., Jhubei City,
+ * Hsinchu County 302,
+ * Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2010, Ralink Technology, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify  *
+ * it under the terms of the GNU General Public License as published by  *
+ * the Free Software Foundation; either version 2 of the License, or     *
+ * (at your option) any later version.                                   *
+ *                                                                       *
+ * This program is distributed in the hope that it will be useful,       *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ * GNU General Public License for more details.                          *
+ *                                                                       *
+ * You should have received a copy of the GNU General Public License     *
+ * along with this program; if not, write to the                         *
+ * Free Software Foundation, Inc.,                                       *
+ * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *                                                                       *
+ *************************************************************************/
+
+
+#include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
+
+int main(int argc ,char *argv[])
+{
+    FILE *infile, *outfile;	
+    char infname[1024];
+    char outfname[1024];
+    char *rt28xxdir;
+    char *chipset;
+    int i=0;//,n=0;
+    unsigned char c;
+   
+    memset(infname,0,1024);
+    memset(outfname,0,1024);
+    
+    rt28xxdir = (char *)getenv("RT28xx_DIR");
+    chipset = (char *)getenv("CHIPSET");
+    if(!rt28xxdir)
+    {
+         printf("Environment value \"RT28xx_DIR\" not export \n");
+	 return -1;
+    }
+    if(!chipset)
+    {
+	 printf("Environment value \"CHIPSET\" not export \n");
+	 return -1;
+    }	    
+	if (strlen(rt28xxdir) > (sizeof(infname)-100))
+	{
+		printf("Environment value \"RT28xx_DIR\" is too long!\n");
+		return -1;
+	}
+
+    strcat(infname,rt28xxdir);
+    if(strncmp(chipset, "2860",4)==0)
+	    strcat(infname,"/common/rt2860.bin");
+    else if(strncmp(chipset, "2870",4)==0)
+	    strcat(infname,"/common/rt2870.bin");
+	else if(strncmp(chipset, "3090",4)==0)
+	    strcat(infname,"/common/rt2860.bin");
+	else if(strncmp(chipset, "2070",4)==0)
+	    strcat(infname,"/common/rt2870.bin");
+	else if(strncmp(chipset, "3070",4)==0)
+	    strcat(infname,"/common/rt2870.bin");
+	else if(strncmp(chipset, "3572",4)==0)
+	    strcat(infname,"/common/rt2870.bin");
+	else if(strncmp(chipset, "3370",4)==0)
+            strcat(infname,"/common/rt2870.bin");
+	else if(strncmp(chipset, "5370",4)==0)
+            strcat(infname,"/common/rt2870.bin");
+	else if(strncmp(chipset, "USB",3)==0)
+	    strcat(infname,"/common/rt2870.bin");
+	else if(strncmp(chipset, "PCI",3)==0)
+	    strcat(infname,"/common/rt2860.bin");
+    else
+    	strcat(infname,"/common/rt2860.bin");
+	    
+    strcat(outfname,rt28xxdir);
+    strcat(outfname,"/include/firmware.h");
+     
+    infile = fopen(infname,"r");
+    if (infile == (FILE *) NULL)
+    {
+         printf("Can't read file %s \n",infname);
+	 return -1;
+    }
+    outfile = fopen(outfname,"w");
+    
+    if (outfile == (FILE *) NULL)
+    {
+         printf("Can't open write file %s \n",outfname);
+        return -1;
+    }
+    
+    fputs("/* AUTO GEN PLEASE DO NOT MODIFY IT */ \n",outfile);
+    fputs("/* AUTO GEN PLEASE DO NOT MODIFY IT */ \n",outfile);
+    fputs("\n",outfile);
+    fputs("\n",outfile);
+    fputs("UCHAR FirmwareImage [] = { \n",outfile);
+    while(1)
+    {
+	char cc[3];    
+
+	c = getc(infile);
+	
+	if (feof(infile))
+	    break;
+	
+	memset(cc,0,2);
+	
+	if (i>=16)
+	{	
+	    fputs("\n", outfile);	
+	    i = 0;
+	}    
+	fputs("0x", outfile); 
+	sprintf(cc,"%02x",c);
+	fputs(cc, outfile);
+	fputs(", ", outfile);
+	i++;
+    } 
+    
+    fputs("} ;\n", outfile);
+    fclose(infile);
+    fclose(outfile);
+    exit(0);
+}	
diff -uNra linux-3.0.82/drivers/net/wireless/rt3070_ls1b/tools/Makefile linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/tools/Makefile
--- linux-3.0.82/drivers/net/wireless/rt3070_ls1b/tools/Makefile	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rt3070_ls1b/tools/Makefile	2017-09-23 03:42:49.866675529 +0800
@@ -0,0 +1,6 @@
+all:
+	gcc -g bin2h.c -o bin2h
+clean:
+	rm -f *.o bin2h
+
+	
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/autoconf_rtl8192c_usb_linux.h linux-3.0.82x/drivers/net/wireless/rtl8188/autoconf_rtl8192c_usb_linux.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/autoconf_rtl8192c_usb_linux.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/autoconf_rtl8192c_usb_linux.h	2017-09-23 03:42:49.866675529 +0800
@@ -0,0 +1,268 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+/*
+ * Public  General Config
+ */
+#define AUTOCONF_INCLUDED
+#define RTL871X_MODULE_NAME "92CU"
+#define DRV_NAME "rtl8192cu"
+
+#define CONFIG_USB_HCI	1
+
+#define CONFIG_RTL8192C	1
+
+#define PLATFORM_LINUX	1
+
+
+/*
+ * Internal  General Config
+ */
+//#define CONFIG_PWRCTRL
+//#define CONFIG_H2CLBK
+
+#define CONFIG_EMBEDDED_FWIMG	1
+//#define CONFIG_FILE_FWIMG
+
+#define CONFIG_R871X_TEST	1
+
+#define CONFIG_80211N_HT	1
+
+#define CONFIG_RECV_REORDERING_CTRL	1
+
+//#define CONFIG_TCP_CSUM_OFFLOAD_RX	1
+
+//#define CONFIG_DRVEXT_MODULE	1
+
+#ifndef CONFIG_MP_INCLUDED
+	#define CONFIG_IPS	1
+	#ifdef CONFIG_IPS
+		//#define CONFIG_IPS_LEVEL_2	1 //enable this to set default IPS mode to IPS_LEVEL_2
+	#endif
+	#define SUPPORT_HW_RFOFF_DETECTED	1
+	
+	#define CONFIG_LPS	1
+	#define CONFIG_BT_COEXIST	1
+	//befor link
+	#define CONFIG_ANTENNA_DIVERSITY	 	
+	//after link
+	#ifdef CONFIG_ANTENNA_DIVERSITY
+	#define CONFIG_SW_ANTENNA_DIVERSITY	 
+	//#define CONFIG_HW_ANTENNA_DIVERSITY	
+	#endif
+	
+	#define CONFIG_IOL
+#else  //#ifndef CONFIG_MP_INCLUDED
+	#define CONFIG_MP_IWPRIV_SUPPORT	1
+#endif  //#ifndef CONFIG_MP_INCLUDED
+
+#define CONFIG_AP_MODE	1
+#define CONFIG_NATIVEAP_MLME	1
+
+//	Added by Albert 20110314
+#define CONFIG_P2P	1
+
+
+#ifdef CONFIG_P2P
+//	Added by Albert 20110812
+//	The CONFIG_WFD is for supporting the Wi-Fi display
+//#define CONFIG_WFD	1
+
+//	Unmarked if there is low p2p scanned ratio; Kurt
+//#define CONFIG_P2P_AGAINST_NOISE	1
+#endif
+
+//	Added by Kurt 20110511
+//#define CONFIG_TDLS	1
+			
+#ifdef CONFIG_AP_MODE
+	#ifndef CONFIG_NATIVEAP_MLME
+		#define CONFIG_HOSTAPD_MLME	1
+	#endif			
+	#define CONFIG_FIND_BEST_CHANNEL	1
+#endif
+
+#define CONFIG_SKB_COPY	1//for amsdu
+
+#define CONFIG_LED
+#ifdef CONFIG_LED
+	#define CONFIG_SW_LED
+	#ifdef CONFIG_SW_LED
+		//#define CONFIG_LED_HANDLED_BY_CMD_THREAD
+	#endif
+#endif // CONFIG_LED
+
+
+
+#define USB_INTERFERENCE_ISSUE // this should be checked in all usb interface
+#define CONFIG_GLOBAL_UI_PID
+
+#define CONFIG_LAYER2_ROAMING
+#define CONFIG_LAYER2_ROAMING_RESUME
+//#define CONFIG_ADAPTOR_INFO_CACHING_FILE // now just applied on 8192cu only, should make it general...
+//#define CONFIG_RESUME_IN_WORKQUEUE
+//#define CONFIG_SET_SCAN_DENY_TIMER
+#define CONFIG_LONG_DELAY_ISSUE
+#define CONFIG_NEW_SIGNAL_STAT_PROCESS
+//#define CONFIG_SIGNAL_DISPLAY_DBM //display RX signal with dbm
+
+#ifdef CONFIG_IOL
+	#define CONFIG_IOL_LLT
+	#define CONFIG_IOL_MAC
+	#define CONFIG_IOL_BB_PHY_REG
+	#define CONFIG_IOL_BB_AGC_TAB
+	#define CONFIG_IOL_RF_RF90_PATH_A
+	#define CONFIG_IOL_RF_RF90_PATH_B
+#endif
+
+#define CONFIG_BR_EXT	1	// Enable NAT2.5 support for STA mode interface with a L2 Bridge
+#ifdef CONFIG_BR_EXT
+#define CONFIG_BR_EXT_BRNAME	"br0"
+#endif	// CONFIG_BR_EXT
+
+#define CONFIG_TX_MCAST2UNI	1	// Support IP multicast->unicast
+//#define CONFIG_CHECK_AC_LIFETIME 1	// Check packet lifetime of 4 ACs.
+
+
+/*
+ * Interface  Related Config
+ */
+//#define CONFIG_USB_INTERRUPT_IN_PIPE	1
+
+#ifndef CONFIG_MINIMAL_MEMORY_USAGE
+	#define CONFIG_USB_TX_AGGREGATION	1
+	#define CONFIG_USB_RX_AGGREGATION	1
+#endif
+
+#define CONFIG_PREALLOC_RECV_SKB	1
+//#define CONFIG_REDUCE_USB_TX_INT	1	// Trade-off: Improve performance, but may cause TX URBs blocked by USB Host/Bus driver on few platforms.
+//#define CONFIG_EASY_REPLACEMENT	1
+
+/* 
+ * CONFIG_USE_USB_BUFFER_ALLOC_XX uses Linux USB Buffer alloc API and is for Linux platform only now!
+ */
+#define CONFIG_USE_USB_BUFFER_ALLOC_TX 1	// Trade-off: For TX path, improve stability on some platforms, but may cause performance degrade on other platforms.
+//#define CONFIG_USE_USB_BUFFER_ALLOC_RX 1	// For RX path
+
+/* 
+ * USB VENDOR REQ BUFFER ALLOCATION METHOD
+ * if not set we'll use function local variable (stack memory)
+ */
+//#define CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE
+#define CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC
+
+#define CONFIG_USB_VENDOR_REQ_MUTEX
+#define CONFIG_VENDOR_REQ_RETRY
+
+//#define CONFIG_USB_SUPPORT_ASYNC_VDN_REQ 1
+
+
+/*
+ * HAL  Related Config
+ */
+
+#define RTL8192C_RX_PACKET_NO_INCLUDE_CRC	1
+
+#define SUPPORTED_BLOCK_IO
+
+
+
+#define RTL8192CU_FW_DOWNLOAD_ENABLE	1
+
+#define CONFIG_ONLY_ONE_OUT_EP_TO_LOW	0
+
+#define CONFIG_OUT_EP_WIFI_MODE	0
+
+#define ENABLE_USB_DROP_INCORRECT_OUT	0
+
+#define RTL8192CU_ASIC_VERIFICATION	0	// For ASIC verification.
+
+#define RTL8192CU_ADHOC_WORKAROUND_SETTING	1
+
+#define DISABLE_BB_RF	0
+
+#define RTL8191C_FPGA_NETWORKTYPE_ADHOC 0
+
+#ifdef CONFIG_MP_INCLUDED
+	#define MP_DRIVER 1
+	#undef CONFIG_USB_TX_AGGREGATION
+	#undef CONFIG_USB_RX_AGGREGATION
+#else
+	#define MP_DRIVER 0
+#endif
+
+
+/*
+ * Platform  Related Config
+ */
+#ifdef CONFIG_PLATFORM_MN10300
+#define CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV
+
+#if	defined (CONFIG_SW_ANTENNA_DIVERSITY)
+	#undef CONFIG_SW_ANTENNA_DIVERSITY
+	#define CONFIG_HW_ANTENNA_DIVERSITY
+#endif
+
+#endif
+
+#ifdef CONFIG_WISTRON_PLATFORM
+
+#endif
+
+#ifdef CONFIG_PLATFORM_TI_DM365
+#define CONFIG_USE_USB_BUFFER_ALLOC_RX 1
+#endif
+
+
+/*
+ * Debug  Related Config
+ */
+//#define CONFIG_DEBUG_RTL871X
+
+#define DBG	0
+#define CONFIG_DEBUG_RTL819X
+
+#define CONFIG_PROC_DEBUG	1
+
+//#define DBG_IO
+//#define DBG_DELAY_OS
+//#define DBG_MEM_ALLOC
+//#define DBG_IOCTL
+
+//#define DBG_TX
+//#define DBG_XMIT_BUF
+//#define DBG_TX_DROP_FRAME
+
+//#define DBG_RX_DROP_FRAME
+//#define DBG_RX_SEQ
+//#define DBG_RX_SIGNAL_DISPLAY_PROCESSING
+//#define DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED "jeff-ap"
+
+
+
+//#define DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE
+//#define DBG_ROAMING_TEST
+
+//#define DBG_HAL_INIT_PROFILING
+#define DBG_MEMORY_LEAK	1
+
+#define DBG_CONFIG_ERROR_DETECT
+//#define DBG_CONFIG_ERROR_RESET
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/autoconf_rtl8192d_usb_linux.h linux-3.0.82x/drivers/net/wireless/rtl8188/autoconf_rtl8192d_usb_linux.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/autoconf_rtl8192d_usb_linux.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/autoconf_rtl8192d_usb_linux.h	2017-09-23 03:42:49.866675529 +0800
@@ -0,0 +1,208 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+/*
+ * Public  General Config
+ */
+#define AUTOCONF_INCLUDED
+#define RTL871X_MODULE_NAME "92DU"
+#define DRV_NAME "rtl8192du"
+
+#define CONFIG_USB_HCI	1
+
+#define CONFIG_RTL8192D	1
+
+#define PLATFORM_LINUX	1
+
+
+/*
+ * Internal  General Config
+ */
+//#define CONFIG_PWRCTRL	1
+//#define CONFIG_H2CLBK	1
+
+#define CONFIG_EMBEDDED_FWIMG	1
+//#define CONFIG_FILE_FWIMG
+
+#define CONFIG_R871X_TEST	1
+
+#define CONFIG_80211N_HT	1
+
+#define CONFIG_RECV_REORDERING_CTRL	1
+
+//#define CONFIG_TCP_CSUM_OFFLOAD_RX	1
+
+//#define CONFIG_DRVEXT_MODULE	1
+
+
+#ifndef CONFIG_MP_INCLUDED
+//#define CONFIG_IPS	1
+#define CONFIG_LPS	1
+//#define CONFIG_BT_COEXIST  	1
+//#define SUPPORT_HW_RFOFF_DETECTED	1
+#else
+#define CONFIG_MP_IWPRIV_SUPPORT 1
+#endif
+
+#define CONFIG_AP_MODE 1
+#define CONFIG_NATIVEAP_MLME 1
+
+//	Added by Albert 20110314
+#define CONFIG_P2P	1
+
+#ifdef CONFIG_P2P
+//	Added by Albert 20110812
+//	The CONFIG_WFD is for supporting the Wi-Fi display
+//#define CONFIG_WFD	1
+
+//	Unmarked if there is low p2p scanned ratio; Kurt
+//#define CONFIG_P2P_AGAINST_NOISE	1
+#endif
+
+//	Added by Kurt 20110511
+//#define CONFIG_TDLS 1
+
+#ifdef CONFIG_AP_MODE
+	#ifndef CONFIG_NATIVEAP_MLME
+		#define CONFIG_HOSTAPD_MLME	1
+	#endif			
+	#define CONFIG_FIND_BEST_CHANNEL	1
+#endif
+
+#define CONFIG_SKB_COPY	1//for amsdu
+
+#define CONFIG_DFS	1
+
+#define CONFIG_LED
+#ifdef CONFIG_LED
+#define CONFIG_SW_LED
+#endif //CONFIG_LED
+
+
+//#define CONFIG_LAYER2_ROAMING
+//#define CONFIG_LAYER2_ROAMING_RESUME
+//#define CONFIG_SET_SCAN_DENY_TIMER
+#define CONFIG_NEW_SIGNAL_STAT_PROCESS
+//#define CONFIG_SIGNAL_DISPLAY_DBM //display RX signal with dbm
+
+#define CONFIG_BR_EXT	1	// Enable NAT2.5 support for STA mode interface with a L2 Bridge
+#ifdef CONFIG_BR_EXT
+#define CONFIG_BR_EXT_BRNAME	"br0"
+#endif	// CONFIG_BR_EXT
+
+#define CONFIG_TX_MCAST2UNI	1	// Support IP multicast->unicast
+
+//#define CONFIG_CHECK_AC_LIFETIME	1	// Check packet lifetime of 4 ACs.
+//#define CONFIG_DISABLE_MCS13TO15	1	// Disable MSC13-15 rates for more stable throughput with some 5G APs
+
+/*
+ * Interface  Related Config
+ */
+//#define CONFIG_USB_INTERRUPT_IN_PIPE	1
+
+#ifndef CONFIG_MINIMAL_MEMORY_USAGE
+	#define CONFIG_USB_TX_AGGREGATION	1
+	#define CONFIG_USB_RX_AGGREGATION	1
+#endif
+
+#define CONFIG_PREALLOC_RECV_SKB	1
+//#define CONFIG_REDUCE_USB_TX_INT	1	// Trade-off: Improve performance, but may cause TX URBs blocked by USB Host/Bus driver on few platforms.
+//#define CONFIG_EASY_REPLACEMENT	1
+
+
+
+/* 
+ * CONFIG_USE_USB_BUFFER_ALLOC_XX uses Linux USB Buffer alloc API and is for Linux platform only now!
+ */
+#define CONFIG_USE_USB_BUFFER_ALLOC_TX 1	// Trade-off: For TX path, improve stability on some platforms, but may cause performance degrade on other platforms.
+//#define CONFIG_USE_USB_BUFFER_ALLOC_RX 1	// For RX path
+
+/* 
+ * USB VENDOR REQ BUFFER ALLOCATION METHOD
+ * if not set we'll use function local variable (stack memory)
+ */
+//#define CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE
+#define CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC
+
+#define CONFIG_USB_VENDOR_REQ_MUTEX
+
+
+//#define CONFIG_USB_SUPPORT_ASYNC_VDN_REQ 1
+
+
+/*
+ * HAL  Related Config
+ */
+
+#define RTL8192C_RX_PACKET_NO_INCLUDE_CRC	1
+
+#define CONFIG_ONLY_ONE_OUT_EP_TO_LOW	0
+
+#define CONFIG_OUT_EP_WIFI_MODE	0
+
+#define ENABLE_USB_DROP_INCORRECT_OUT	0
+
+#define RTL8192CU_ASIC_VERIFICATION	0	// For ASIC verification.
+
+#define RTL8192CU_ADHOC_WORKAROUND_SETTING 1
+
+#define DISABLE_BB_RF	0	
+
+#define RTL8191C_FPGA_NETWORKTYPE_ADHOC 0
+
+#define ANTENNA_SELECTION_STATIC_SETTING 0
+
+#define TX_POWER_FOR_5G_BAND				1	//For 5G band TX Power
+
+#define RTL8192D_EASY_SMART_CONCURRENT	0
+
+#define RTL8192D_DUAL_MAC_MODE_SWITCH	0
+
+#define SWLCK   1
+
+#define FW_PROCESS_VENDOR_CMD 1
+
+#ifdef CONFIG_MP_INCLUDED
+	#define MP_DRIVER 1
+	#undef CONFIG_USB_TX_AGGREGATION
+	#undef CONFIG_USB_RX_AGGREGATION
+#else
+	#define MP_DRIVER 0
+#endif
+
+/*
+ * Platform  Related Config
+ */
+#ifndef CONFIG_WISTRON_PLATFORM
+//#define CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE	1
+#endif
+
+/*
+ * Debug  Related Config
+ */
+//#define CONFIG_DEBUG_RTL871X
+
+#define DBG 0
+
+#define CONFIG_DEBUG_RTL819X
+
+#define CONFIG_PROC_DEBUG 1
+
+#define DBG_MEMORY_LEAK	1
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/clean linux-3.0.82x/drivers/net/wireless/rtl8188/clean
--- linux-3.0.82/drivers/net/wireless/rtl8188/clean	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/clean	2017-09-23 03:42:49.866675529 +0800
@@ -0,0 +1,9 @@
+#!/bin/bash
+rmmod 8192cu
+rmmod 8192ce
+rmmod 8192du
+rmmod 8192de
+
+rmmod rtl8192cu
+rmmod rtl8192c_common
+rmmod rtlwifi
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/core/efuse/rtw_efuse.c linux-3.0.82x/drivers/net/wireless/rtl8188/core/efuse/rtw_efuse.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/core/efuse/rtw_efuse.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/core/efuse/rtw_efuse.c	2017-09-23 03:42:49.870675516 +0800
@@ -0,0 +1,1097 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _RTW_EFUSE_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+#include <rtw_efuse.h>
+
+
+
+/*------------------------Define local variable------------------------------*/
+u8	fakeEfuseBank=0;
+u32	fakeEfuseUsedBytes=0;
+u8	fakeEfuseContent[EFUSE_MAX_HW_SIZE]={0};
+u8	fakeEfuseInitMap[EFUSE_MAX_MAP_LEN]={0};
+u8	fakeEfuseModifiedMap[EFUSE_MAX_MAP_LEN]={0};
+
+u32	BTEfuseUsedBytes=0;
+u8	BTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE];
+u8	BTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN]={0};
+u8	BTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN]={0};
+
+u32	fakeBTEfuseUsedBytes=0;
+u8	fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE];
+u8	fakeBTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN]={0};
+u8	fakeBTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN]={0};
+/*------------------------Define local variable------------------------------*/
+
+//------------------------------------------------------------------------------
+#define REG_EFUSE_CTRL		0x0030
+#define EFUSE_CTRL			REG_EFUSE_CTRL		// E-Fuse Control.
+//------------------------------------------------------------------------------
+
+BOOLEAN
+Efuse_Read1ByteFromFakeContent(
+	IN		PADAPTER	pAdapter,
+	IN		u16		Offset,
+	IN OUT	u8		*Value	)
+{
+	if(Offset >= EFUSE_MAX_HW_SIZE)
+	{
+		return _FALSE;
+	}
+	//DbgPrint("Read fake content, offset = %d\n", Offset);
+	if(fakeEfuseBank == 0)
+		*Value = fakeEfuseContent[Offset];
+	else
+		*Value = fakeBTEfuseContent[fakeEfuseBank-1][Offset];
+	return _TRUE;
+}
+BOOLEAN
+Efuse_Write1ByteToFakeContent(
+	IN		PADAPTER	pAdapter,
+	IN		u16		Offset,
+	IN 		u8		Value	)
+{
+	if(Offset >= EFUSE_MAX_HW_SIZE)
+	{
+		return _FALSE;
+	}
+	if(fakeEfuseBank == 0)
+		fakeEfuseContent[Offset] = Value;
+	else
+	{
+		fakeBTEfuseContent[fakeEfuseBank-1][Offset] = Value;
+	}
+	return _TRUE;
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:	Efuse_PowerSwitch
+ *
+ * Overview:	When we want to enable write operation, we should change to 
+ *				pwr on state. When we stop write, we should switch to 500k mode
+ *				and disable LDO 2.5V.
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/17/2008 	MHC		Create Version 0.
+ *
+ *---------------------------------------------------------------------------*/
+VOID
+Efuse_PowerSwitch(
+	IN	PADAPTER	pAdapter,
+	IN	u8		bWrite,
+	IN	u8		PwrState)
+{
+	pAdapter->HalFunc.EfusePowerSwitch(pAdapter, bWrite, PwrState);
+}	
+
+/*-----------------------------------------------------------------------------
+ * Function:	efuse_GetCurrentSize
+ *
+ * Overview:	Get current efuse size!!!
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/16/2008 	MHC		Create Version 0.
+ *
+ *---------------------------------------------------------------------------*/
+u16
+Efuse_GetCurrentSize(
+	IN PADAPTER		pAdapter,
+	IN u8			efuseType,
+	IN BOOLEAN		bPseudoTest)
+{
+	u16 ret=0;
+
+	ret = pAdapter->HalFunc.EfuseGetCurrentSize(pAdapter, efuseType, bPseudoTest);
+
+	return ret;
+}
+
+/*  11/16/2008 MH Add description. Get current efuse area enabled word!!. */
+u8
+Efuse_CalculateWordCnts(IN u8	word_en)
+{
+	u8 word_cnts = 0;
+	if(!(word_en & BIT(0)))	word_cnts++; // 0 : write enable
+	if(!(word_en & BIT(1)))	word_cnts++;
+	if(!(word_en & BIT(2)))	word_cnts++;
+	if(!(word_en & BIT(3)))	word_cnts++;
+	return word_cnts;
+}
+
+//
+//	Description:
+//		Execute E-Fuse read byte operation.
+//		Refered from SD1 Richard.
+//
+//	Assumption:
+//		1. Boot from E-Fuse and successfully auto-load.
+//		2. PASSIVE_LEVEL (USB interface)
+//
+//	Created by Roger, 2008.10.21.
+//
+VOID
+ReadEFuseByte(
+		PADAPTER	Adapter,
+		u16 			_offset, 
+		u8 			*pbuf, 
+		IN BOOLEAN	bPseudoTest) 
+{
+	u32	value32;
+	u8	readbyte;
+	u16	retry;
+	//u32 start=rtw_get_current_time();
+
+	if(bPseudoTest)
+	{
+		Efuse_Read1ByteFromFakeContent(Adapter, _offset, pbuf);
+		return;
+	}
+
+	//Write Address
+	rtw_write8(Adapter, EFUSE_CTRL+1, (_offset & 0xff));  		
+	readbyte = rtw_read8(Adapter, EFUSE_CTRL+2);
+	rtw_write8(Adapter, EFUSE_CTRL+2, ((_offset >> 8) & 0x03) | (readbyte & 0xfc));  		
+
+	//Write bit 32 0
+	readbyte = rtw_read8(Adapter, EFUSE_CTRL+3);		
+	rtw_write8(Adapter, EFUSE_CTRL+3, (readbyte & 0x7f));  	
+	
+	//Check bit 32 read-ready
+	retry = 0;
+	value32 = rtw_read32(Adapter, EFUSE_CTRL);
+	//while(!(((value32 >> 24) & 0xff) & 0x80)  && (retry<10))
+	while(!(((value32 >> 24) & 0xff) & 0x80)  && (retry<10000))
+	{
+		value32 = rtw_read32(Adapter, EFUSE_CTRL);
+		retry++;
+	}
+
+	// 20100205 Joseph: Add delay suggested by SD1 Victor.
+	// This fix the problem that Efuse read error in high temperature condition.
+	// Designer says that there shall be some delay after ready bit is set, or the
+	// result will always stay on last data we read.
+	rtw_udelay_os(50);
+	value32 = rtw_read32(Adapter, EFUSE_CTRL);
+	
+	*pbuf = (u8)(value32 & 0xff);
+	//MSG_8192C("ReadEFuseByte _offset:%08u, in %d ms\n",_offset ,rtw_get_passing_time_ms(start));
+	
+}
+
+
+//
+//	Description:
+//		1. Execute E-Fuse read byte operation according as map offset and 
+//		    save to E-Fuse table.
+//		2. Refered from SD1 Richard.
+//
+//	Assumption:
+//		1. Boot from E-Fuse and successfully auto-load.
+//		2. PASSIVE_LEVEL (USB interface)
+//
+//	Created by Roger, 2008.10.21.
+//
+//	2008/12/12 MH 	1. Reorganize code flow and reserve bytes. and add description.
+//					2. Add efuse utilization collect.
+//	2008/12/22 MH	Read Efuse must check if we write section 1 data again!!! Sec1
+//					write addr must be after sec5.
+//
+VOID
+efuse_ReadEFuse(
+	PADAPTER	Adapter,
+	u8		efuseType,
+	u16		_offset,
+	u16 		_size_byte,
+	u8      	*pbuf,
+	IN	BOOLEAN	bPseudoTest
+	)
+{
+	Adapter->HalFunc.ReadEFuse(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest);
+}
+
+VOID
+EFUSE_GetEfuseDefinition(
+	IN		PADAPTER	pAdapter,
+	IN		u8		efuseType,
+	IN		u8		type,
+	OUT		PVOID		*pOut,
+	IN		BOOLEAN		bPseudoTest
+	)
+{
+	pAdapter->HalFunc.EFUSEGetEfuseDefinition(pAdapter, efuseType, type, pOut, bPseudoTest);
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:	EFUSE_Read1Byte
+ *
+ * Overview:	Copy from WMAC fot EFUSE read 1 byte.
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 09/23/2008 	MHC		Copy from WMAC.
+ *
+ *---------------------------------------------------------------------------*/
+u8
+EFUSE_Read1Byte(	
+	IN	PADAPTER	Adapter, 
+	IN	u16		Address)
+{
+	u8	data;
+	u8	Bytetemp = {0x00};
+	u8	temp = {0x00};
+	u32	k=0;
+	u16	contentLen=0;
+
+	EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI , TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&contentLen, _FALSE);
+
+	if (Address < contentLen)	//E-fuse 512Byte
+	{
+		//Write E-fuse Register address bit0~7
+		temp = Address & 0xFF;	
+		rtw_write8(Adapter, EFUSE_CTRL+1, temp);	
+		Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+2);	
+		//Write E-fuse Register address bit8~9
+		temp = ((Address >> 8) & 0x03) | (Bytetemp & 0xFC);	
+		rtw_write8(Adapter, EFUSE_CTRL+2, temp);	
+
+		//Write 0x30[31]=0
+		Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);
+		temp = Bytetemp & 0x7F;
+		rtw_write8(Adapter, EFUSE_CTRL+3, temp);
+
+		//Wait Write-ready (0x30[31]=1)
+		Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);
+		while(!(Bytetemp & 0x80))
+		{				
+			Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);
+			k++;
+			if(k==1000)
+			{
+				k=0;
+				break;
+			}
+		}
+		data=rtw_read8(Adapter, EFUSE_CTRL);
+		return data;
+	}
+	else
+		return 0xFF;
+	
+}/* EFUSE_Read1Byte */
+
+/*-----------------------------------------------------------------------------
+ * Function:	EFUSE_Write1Byte
+ *
+ * Overview:	Copy from WMAC fot EFUSE write 1 byte.
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 09/23/2008 	MHC		Copy from WMAC.
+ *
+ *---------------------------------------------------------------------------*/
+void	
+EFUSE_Write1Byte(	
+	IN	PADAPTER	Adapter, 
+	IN	u16		Address,
+	IN	u8		Value)
+{
+	u8	Bytetemp = {0x00};
+	u8	temp = {0x00};
+	u32	k=0;
+	u16	contentLen=0;
+
+	//RT_TRACE(COMP_EFUSE, DBG_LOUD, ("Addr=%x Data =%x\n", Address, Value));
+	EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI , TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&contentLen, _FALSE);
+
+	if( Address < contentLen)	//E-fuse 512Byte
+	{
+		rtw_write8(Adapter, EFUSE_CTRL, Value);
+
+		//Write E-fuse Register address bit0~7
+		temp = Address & 0xFF;	
+		rtw_write8(Adapter, EFUSE_CTRL+1, temp);	
+		Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+2);	
+		
+		//Write E-fuse Register address bit8~9
+		temp = ((Address >> 8) & 0x03) | (Bytetemp & 0xFC);	
+		rtw_write8(Adapter, EFUSE_CTRL+2, temp);	
+
+		//Write 0x30[31]=1
+		Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);
+		temp = Bytetemp | 0x80;
+		rtw_write8(Adapter, EFUSE_CTRL+3, temp);
+
+		//Wait Write-ready (0x30[31]=0)
+		Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);
+		while(Bytetemp & 0x80)
+		{
+			Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);			
+			k++;
+			if(k==100)
+			{
+				k=0;
+				break;
+			}
+		}
+	}
+}/* EFUSE_Write1Byte */
+
+/*  11/16/2008 MH Read one byte from real Efuse. */
+u8
+efuse_OneByteRead(
+	IN	PADAPTER	pAdapter, 
+	IN	u16			addr,
+	IN	u8			*data,
+	IN	BOOLEAN		bPseudoTest)
+{
+	u8	tmpidx = 0;
+	u8	bResult;
+
+	if(bPseudoTest)
+	{
+		bResult = Efuse_Read1ByteFromFakeContent(pAdapter, addr, data);
+		return bResult;
+	}
+	// -----------------e-fuse reg ctrl ---------------------------------
+	//address			
+	rtw_write8(pAdapter, EFUSE_CTRL+1, (u8)(addr&0xff));		
+	rtw_write8(pAdapter, EFUSE_CTRL+2, ((u8)((addr>>8) &0x03) ) | 
+	(rtw_read8(pAdapter, EFUSE_CTRL+2)&0xFC ));	
+
+	rtw_write8(pAdapter, EFUSE_CTRL+3,  0x72);//read cmd	
+
+	while(!(0x80 &rtw_read8(pAdapter, EFUSE_CTRL+3))&&(tmpidx<100))
+	{
+		tmpidx++;
+	}
+	if(tmpidx<100)
+	{			
+		*data=rtw_read8(pAdapter, EFUSE_CTRL);		
+		bResult = _TRUE;
+	}
+	else
+	{
+		*data = 0xff;	
+		bResult = _FALSE;
+	}
+	return bResult;
+}
+		
+/*  11/16/2008 MH Write one byte to reald Efuse. */
+u8
+efuse_OneByteWrite(
+	IN	PADAPTER	pAdapter,  
+	IN	u16			addr, 
+	IN	u8			data,
+	IN	BOOLEAN		bPseudoTest)
+{
+	u8	tmpidx = 0;
+	u8	bResult;
+
+	if(bPseudoTest)
+	{
+		bResult = Efuse_Write1ByteToFakeContent(pAdapter, addr, data);
+		return bResult;
+	}
+	//RT_TRACE(COMP_EFUSE, DBG_LOUD, ("Addr = %x Data=%x\n", addr, data));
+
+	//return	0;
+
+	// -----------------e-fuse reg ctrl ---------------------------------	
+	//address			
+	rtw_write8(pAdapter, EFUSE_CTRL+1, (u8)(addr&0xff));
+	rtw_write8(pAdapter, EFUSE_CTRL+2, 
+	(rtw_read8(pAdapter, EFUSE_CTRL+2)&0xFC )|(u8)((addr>>8)&0x03) );	
+	rtw_write8(pAdapter, EFUSE_CTRL, data);//data		
+
+	rtw_write8(pAdapter, EFUSE_CTRL+3, 0xF2);//write cmd
+		
+	while((0x80 &  rtw_read8(pAdapter, EFUSE_CTRL+3)) && (tmpidx<100) ){
+		tmpidx++;
+	}
+	
+	if(tmpidx<100)
+	{					
+		bResult = _TRUE;
+	}
+	else
+	{			
+		bResult = _FALSE;
+	}		
+	
+	return bResult;	
+}
+
+int
+Efuse_PgPacketRead(	IN	PADAPTER	pAdapter,
+					IN	u8			offset,
+					IN	u8			*data,
+					IN	BOOLEAN		bPseudoTest)
+{
+	int	ret=0;
+
+	ret =  pAdapter->HalFunc.Efuse_PgPacketRead(pAdapter, offset, data, bPseudoTest);
+
+	return ret;
+}
+
+int 
+Efuse_PgPacketWrite(IN	PADAPTER	pAdapter, 
+					IN	u8 			offset,
+					IN	u8			word_en,
+					IN	u8			*data,
+					IN	BOOLEAN		bPseudoTest)
+{
+	int ret;
+
+	ret =  pAdapter->HalFunc.Efuse_PgPacketWrite(pAdapter, offset, word_en, data, bPseudoTest);
+
+	return ret;
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:	efuse_WordEnableDataRead
+ *
+ * Overview:	Read allowed word in current efuse section data.
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/16/2008 	MHC		Create Version 0.
+ * 11/21/2008 	MHC		Fix Write bug when we only enable late word.
+ *
+ *---------------------------------------------------------------------------*/
+void
+efuse_WordEnableDataRead(IN	u8	word_en,
+							IN	u8	*sourdata,
+							IN	u8	*targetdata)
+{	
+	if (!(word_en&BIT(0)))
+	{
+		targetdata[0] = sourdata[0];
+		targetdata[1] = sourdata[1];
+	}
+	if (!(word_en&BIT(1)))
+	{
+		targetdata[2] = sourdata[2];
+		targetdata[3] = sourdata[3];
+	}
+	if (!(word_en&BIT(2)))
+	{
+		targetdata[4] = sourdata[4];
+		targetdata[5] = sourdata[5];
+	}
+	if (!(word_en&BIT(3)))
+	{
+		targetdata[6] = sourdata[6];
+		targetdata[7] = sourdata[7];
+	}
+}
+
+
+u8
+Efuse_WordEnableDataWrite(	IN	PADAPTER	pAdapter,
+							IN	u16		efuse_addr,
+							IN	u8		word_en, 
+							IN	u8		*data,
+							IN	BOOLEAN		bPseudoTest)
+{
+	u8	ret=0;
+
+	ret =  pAdapter->HalFunc.Efuse_WordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest);
+	
+	return ret;
+}
+
+static u8 efuse_read8(PADAPTER padapter, u16 address, u8 *value)
+{
+	return efuse_OneByteRead(padapter,address, value, _FALSE);
+}
+
+static u8 efuse_write8(PADAPTER padapter, u16 address, u8 *value)
+{
+	return efuse_OneByteWrite(padapter,address, *value, _FALSE);
+}
+
+/*
+ * read/wirte raw efuse data
+ */
+u8 rtw_efuse_access(PADAPTER padapter, u8 bWrite, u16 start_addr, u16 cnts, u8 *data)
+{
+	int i = 0;
+	u16	real_content_len = 0, max_available_size = 0;
+	u8 res = _FAIL ;
+	u8 (*rw8)(PADAPTER, u16, u8*);
+
+	EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&real_content_len, _FALSE);
+	EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE);
+
+	if (start_addr > real_content_len)
+		return _FAIL;
+
+	if (_TRUE == bWrite) {
+		if ((start_addr + cnts) > max_available_size)
+			return _FAIL;
+		rw8 = &efuse_write8;
+	} else
+		rw8 = &efuse_read8;
+
+	Efuse_PowerSwitch(padapter, bWrite, _TRUE);
+
+	// e-fuse one byte read / write
+	for (i = 0; i < cnts; i++) {
+		if (start_addr >= real_content_len) {
+			res = _FAIL;
+			break;
+		}
+
+		res = rw8(padapter, start_addr++, data++);
+		if (_FAIL == res) break;
+	}
+
+	Efuse_PowerSwitch(padapter, bWrite, _FALSE);
+
+	return res;
+}
+//------------------------------------------------------------------------------
+u16 efuse_GetMaxSize(PADAPTER padapter)
+{
+	u16	max_size;
+	EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI , TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_size, _FALSE);
+	return max_size;
+}
+//------------------------------------------------------------------------------
+u8 efuse_GetCurrentSize(PADAPTER padapter, u16 *size)
+{
+	Efuse_PowerSwitch(padapter, _FALSE, _TRUE);
+	*size = Efuse_GetCurrentSize(padapter, EFUSE_WIFI, _FALSE);
+	Efuse_PowerSwitch(padapter, _FALSE, _FALSE);
+
+	return _SUCCESS;
+}
+//------------------------------------------------------------------------------
+u8 rtw_efuse_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data)
+{
+	u16	mapLen=0;
+
+	EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE);
+
+	if ((addr + cnts) > mapLen)
+		return _FAIL;
+
+	Efuse_PowerSwitch(padapter, _FALSE, _TRUE);
+
+	efuse_ReadEFuse(padapter, EFUSE_WIFI, addr, cnts, data, _FALSE);
+
+	Efuse_PowerSwitch(padapter, _FALSE, _FALSE);
+
+	return _SUCCESS;
+}
+//------------------------------------------------------------------------------
+u8 rtw_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data)
+{
+	u8	offset, word_en;
+	u8	*map;
+	u8	newdata[PGPKT_DATA_SIZE];
+	s32	i, j, idx;
+	u8	ret = _SUCCESS;
+	u16	mapLen=0;
+
+	EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE);
+
+	if ((addr + cnts) > mapLen)
+		return _FAIL;
+
+	map = rtw_zmalloc(mapLen);
+	if(map == NULL){
+		return _FAIL;
+	}
+
+	ret = rtw_efuse_map_read(padapter, 0, mapLen, map);
+	if (ret == _FAIL) goto exit;
+
+	Efuse_PowerSwitch(padapter, _TRUE, _TRUE);
+
+	offset = (addr >> 3);
+	word_en = 0xF;
+	_rtw_memset(newdata, 0xFF, PGPKT_DATA_SIZE);
+	i = addr & 0x7;	// index of one package
+	j = 0;		// index of new package
+	idx = 0;	// data index
+
+	if (i & 0x1) {
+		// odd start
+		if (data[idx] != map[addr+idx]) {
+			word_en &= ~BIT(i >> 1);
+			newdata[i-1] = map[addr+idx-1];
+			newdata[i] = data[idx];
+		}
+		i++;
+		idx++;
+	}
+	do {
+		for (; i < PGPKT_DATA_SIZE; i += 2)
+		{
+			if (cnts == idx) break;
+			if ((cnts - idx) == 1) {
+				if (data[idx] != map[addr+idx]) {
+					word_en &= ~BIT(i >> 1);
+					newdata[i] = data[idx];
+					newdata[i+1] = map[addr+idx+1];
+				}
+				idx++;
+				break;
+			} else {
+				if ((data[idx] != map[addr+idx]) ||
+				    (data[idx+1] != map[addr+idx+1]))
+				{
+					word_en &= ~BIT(i >> 1);
+					newdata[i] = data[idx];
+					newdata[i+1] = data[idx + 1];
+				}
+				idx += 2;
+			}
+			if (idx == cnts) break;
+		}
+
+		if (word_en != 0xF) {
+			ret = Efuse_PgPacketWrite(padapter, offset, word_en, newdata, _FALSE);
+			DBG_8192C("offset=%x \n",offset);
+			DBG_8192C("word_en=%x \n",word_en);
+
+			for(i=0;i<PGPKT_DATA_SIZE;i++)
+			{
+				DBG_8192C("data=%x \t",newdata[i]);
+			}
+			if (ret == _FAIL) break;
+		}
+
+		if (idx == cnts) break;
+
+		offset++;
+		i = 0;
+		j = 0;
+		word_en = 0xF;
+		_rtw_memset(newdata, 0xFF, PGPKT_DATA_SIZE);
+	} while (1);
+
+	Efuse_PowerSwitch(padapter, _TRUE, _FALSE);
+
+exit:
+
+	rtw_mfree(map, mapLen);
+
+	return ret;
+}
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	Efuse_ReadAllMap
+ *
+ * Overview:	Read All Efuse content
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/11/2008 	MHC		Create Version 0.
+ *
+ *---------------------------------------------------------------------------*/
+VOID 
+Efuse_ReadAllMap(
+	IN		PADAPTER	pAdapter, 
+	IN		u8		efuseType,
+	IN OUT	u8		*Efuse,
+	IN		BOOLEAN		bPseudoTest)
+{
+	u16	mapLen=0;
+
+	Efuse_PowerSwitch(pAdapter,_FALSE, _TRUE);
+
+	EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, bPseudoTest);
+
+	efuse_ReadEFuse(pAdapter, efuseType, 0, mapLen, Efuse, bPseudoTest);
+
+	Efuse_PowerSwitch(pAdapter,_FALSE, _FALSE);
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:	efuse_ShadowRead1Byte
+ *			efuse_ShadowRead2Byte
+ *			efuse_ShadowRead4Byte
+ *
+ * Overview:	Read from efuse init map by one/two/four bytes !!!!!
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/12/2008 	MHC		Create Version 0.
+ *
+ *---------------------------------------------------------------------------*/
+static VOID
+efuse_ShadowRead1Byte(
+	IN	PADAPTER	pAdapter,
+	IN	u16		Offset,
+	IN OUT	u8		*Value)
+{
+	EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter);
+
+	*Value = pEEPROM->efuse_eeprom_data[Offset];
+
+}	// EFUSE_ShadowRead1Byte
+
+//---------------Read Two Bytes
+static VOID
+efuse_ShadowRead2Byte(
+	IN	PADAPTER	pAdapter,
+	IN	u16		Offset,
+	IN OUT	u16		*Value)
+{
+	EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter);
+
+	*Value = pEEPROM->efuse_eeprom_data[Offset];
+	*Value |= pEEPROM->efuse_eeprom_data[Offset+1]<<8;
+
+}	// EFUSE_ShadowRead2Byte
+
+//---------------Read Four Bytes
+static VOID
+efuse_ShadowRead4Byte(
+	IN	PADAPTER	pAdapter,
+	IN	u16		Offset,
+	IN OUT	u32		*Value)
+{
+	EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter);
+
+	*Value = pEEPROM->efuse_eeprom_data[Offset];
+	*Value |= pEEPROM->efuse_eeprom_data[Offset+1]<<8;
+	*Value |= pEEPROM->efuse_eeprom_data[Offset+2]<<16;
+	*Value |= pEEPROM->efuse_eeprom_data[Offset+3]<<24;
+
+}	// efuse_ShadowRead4Byte
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	efuse_ShadowWrite1Byte
+ *			efuse_ShadowWrite2Byte
+ *			efuse_ShadowWrite4Byte
+ *
+ * Overview:	Write efuse modify map by one/two/four byte.
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/12/2008 	MHC		Create Version 0.
+ *
+ *---------------------------------------------------------------------------*/
+static VOID
+efuse_ShadowWrite1Byte(
+	IN	PADAPTER	pAdapter,
+	IN	u16		Offset,
+	IN 	u8		Value)
+{
+	EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter);
+
+	pEEPROM->efuse_eeprom_data[Offset] = Value;
+
+}	// efuse_ShadowWrite1Byte
+
+//---------------Write Two Bytes
+static VOID
+efuse_ShadowWrite2Byte(
+	IN	PADAPTER	pAdapter,
+	IN	u16		Offset,
+	IN 	u16		Value)
+{
+	EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter);
+
+	pEEPROM->efuse_eeprom_data[Offset] = Value&0x00FF;
+	pEEPROM->efuse_eeprom_data[Offset+1] = Value>>8;
+
+}	// efuse_ShadowWrite1Byte
+
+//---------------Write Four Bytes
+static VOID
+efuse_ShadowWrite4Byte(
+	IN	PADAPTER	pAdapter,
+	IN	u16		Offset,
+	IN	u32		Value)
+{
+	EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter);
+
+	pEEPROM->efuse_eeprom_data[Offset] = (u8)(Value&0x000000FF);
+	pEEPROM->efuse_eeprom_data[Offset+1] = (u8)((Value>>8)&0x0000FF);
+	pEEPROM->efuse_eeprom_data[Offset+2] = (u8)((Value>>16)&0x00FF);
+	pEEPROM->efuse_eeprom_data[Offset+3] = (u8)((Value>>24)&0xFF);
+
+}	// efuse_ShadowWrite1Byte
+
+/*-----------------------------------------------------------------------------
+ * Function:	EFUSE_ShadowMapUpdate
+ *
+ * Overview:	Transfer current EFUSE content to shadow init and modify map.
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/13/2008 	MHC		Create Version 0.
+ *
+ *---------------------------------------------------------------------------*/
+void EFUSE_ShadowMapUpdate(
+	IN PADAPTER	pAdapter,
+	IN u8		efuseType,
+	IN BOOLEAN	bPseudoTest)
+{
+	EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter);
+	u16	mapLen=0;
+
+	EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, bPseudoTest);
+
+	if (pEEPROM->bautoload_fail_flag == _TRUE)
+	{
+		_rtw_memset(pEEPROM->efuse_eeprom_data, 0xFF, mapLen);
+	}
+	else
+	{
+		#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE			
+		if(_SUCCESS != retriveAdaptorInfoFile(pAdapter->registrypriv.adaptor_info_caching_file_path, pEEPROM)) {
+		#endif
+		
+		Efuse_ReadAllMap(pAdapter, efuseType, pEEPROM->efuse_eeprom_data, bPseudoTest);
+		
+		#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE
+			storeAdaptorInfoFile(pAdapter->registrypriv.adaptor_info_caching_file_path, pEEPROM);
+		}
+		#endif
+	}
+
+	//PlatformMoveMemory((PVOID)&pHalData->EfuseMap[EFUSE_MODIFY_MAP][0], 
+	//(PVOID)&pHalData->EfuseMap[EFUSE_INIT_MAP][0], mapLen);
+}// EFUSE_ShadowMapUpdate
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	EFUSE_ShadowRead
+ *
+ * Overview:	Read from efuse init map !!!!!
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/12/2008 	MHC		Create Version 0.
+ *
+ *---------------------------------------------------------------------------*/
+void
+EFUSE_ShadowRead(
+	IN		PADAPTER	pAdapter,
+	IN		u8		Type,
+	IN		u16		Offset,
+	IN OUT	u32		*Value	)
+{
+	if (Type == 1)
+		efuse_ShadowRead1Byte(pAdapter, Offset, (u8 *)Value);
+	else if (Type == 2)
+		efuse_ShadowRead2Byte(pAdapter, Offset, (u16 *)Value);
+	else if (Type == 4)
+		efuse_ShadowRead4Byte(pAdapter, Offset, (u32 *)Value);
+	
+}	// EFUSE_ShadowRead
+
+/*-----------------------------------------------------------------------------
+ * Function:	EFUSE_ShadowWrite
+ *
+ * Overview:	Write efuse modify map for later update operation to use!!!!!
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/12/2008 	MHC		Create Version 0.
+ *
+ *---------------------------------------------------------------------------*/
+extern VOID
+EFUSE_ShadowWrite(
+	IN	PADAPTER	pAdapter,
+	IN	u8		Type,
+	IN	u16		Offset,
+	IN OUT	u32		Value)
+{
+#if (MP_DRIVER == 0)
+	return;
+#endif
+
+	if (Type == 1)
+		efuse_ShadowWrite1Byte(pAdapter, Offset, (u8)Value);
+	else if (Type == 2)
+		efuse_ShadowWrite2Byte(pAdapter, Offset, (u16)Value);
+	else if (Type == 4)
+		efuse_ShadowWrite4Byte(pAdapter, Offset, (u32)Value);
+
+}	// EFUSE_ShadowWrite
+
+VOID
+Efuse_InitSomeVar(
+	IN		PADAPTER	pAdapter
+	)
+{
+	u8 i;
+	
+	_rtw_memset((PVOID)&fakeEfuseContent[0], 0xff, EFUSE_MAX_HW_SIZE);
+	_rtw_memset((PVOID)&fakeEfuseInitMap[0], 0xff, EFUSE_MAX_MAP_LEN);
+	_rtw_memset((PVOID)&fakeEfuseModifiedMap[0], 0xff, EFUSE_MAX_MAP_LEN);
+
+	for(i=0; i<EFUSE_MAX_BT_BANK; i++)
+	{
+		_rtw_memset((PVOID)&BTEfuseContent[i][0], EFUSE_MAX_HW_SIZE, 0xff);
+	}
+	_rtw_memset((PVOID)&BTEfuseInitMap[0], 0xff, EFUSE_BT_MAX_MAP_LEN);
+	_rtw_memset((PVOID)&BTEfuseModifiedMap[0], 0xff, EFUSE_BT_MAX_MAP_LEN);
+
+	for(i=0; i<EFUSE_MAX_BT_BANK; i++)
+	{
+		_rtw_memset((PVOID)&fakeBTEfuseContent[i][0], 0xff, EFUSE_MAX_HW_SIZE);
+	}
+	_rtw_memset((PVOID)&fakeBTEfuseInitMap[0], 0xff, EFUSE_BT_MAX_MAP_LEN);
+	_rtw_memset((PVOID)&fakeBTEfuseModifiedMap[0], 0xff, EFUSE_BT_MAX_MAP_LEN);
+}
+
+#ifdef PLATFORM_LINUX
+#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE
+//#include <rtw_eeprom.h>
+
+ int isAdaptorInfoFileValid(void)
+{
+	return _TRUE;
+}
+
+int storeAdaptorInfoFile(char *path, struct eeprom_priv * eeprom_priv)
+{
+	int ret =_SUCCESS;
+
+	if(path && eeprom_priv) {
+		ret = rtw_store_to_file(path, eeprom_priv->efuse_eeprom_data, EEPROM_MAX_SIZE);
+		if(ret == EEPROM_MAX_SIZE)
+			ret = _SUCCESS;
+		else
+			ret = _FAIL;
+	} else {
+		DBG_8192C("%s NULL pointer\n",__FUNCTION__);
+		ret =  _FAIL;
+	}
+	return ret;
+}
+
+int retriveAdaptorInfoFile(char *path, struct eeprom_priv * eeprom_priv)
+{
+	int ret = _SUCCESS;
+	mm_segment_t oldfs;
+	struct file *fp;
+	
+	if(path && eeprom_priv) {
+
+		ret = rtw_retrive_from_file(path, eeprom_priv->efuse_eeprom_data, EEPROM_MAX_SIZE);
+		
+		if(ret == EEPROM_MAX_SIZE)
+			ret = _SUCCESS;
+		else
+			ret = _FAIL;
+
+		#if 0
+		if(isAdaptorInfoFileValid()) {	
+			return 0;
+		} else {
+			return _FAIL;
+		}
+		#endif
+		
+	} else {
+		DBG_8192C("%s NULL pointer\n",__FUNCTION__);
+		ret = _FAIL;
+	}
+	return ret;
+}
+#endif //CONFIG_ADAPTOR_INFO_CACHING_FILE
+#endif //PLATFORM_LINUX
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_br_ext.c linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_br_ext.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_br_ext.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_br_ext.c	2017-09-23 03:42:49.870675516 +0800
@@ -0,0 +1,1694 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _RTW_BR_EXT_C_
+
+#ifdef __KERNEL__
+#include <linux/if_arp.h>
+#include <net/ip.h>
+#include <net/ipx.h>
+#include <linux/atalk.h>
+#include <linux/udp.h>
+#include <linux/if_pppox.h>
+#endif
+
+#if 1	// rtw_wifi_driver
+#include <drv_conf.h>
+#include <drv_types.h>
+#include "rtw_br_ext.h"
+#else	// rtw_wifi_driver
+#include "./8192cd_cfg.h"
+
+#ifndef __KERNEL__
+#include "./sys-support.h"
+#endif
+
+#include "./8192cd.h"
+#include "./8192cd_headers.h"
+#include "./8192cd_br_ext.h"
+#include "./8192cd_debug.h"
+#endif	// rtw_wifi_driver
+
+#ifdef CL_IPV6_PASS
+#ifdef __KERNEL__
+#include <linux/ipv6.h>
+#include <linux/icmpv6.h>
+#include <net/ndisc.h>
+#include <net/checksum.h>
+#endif
+#endif
+
+#ifdef CONFIG_BR_EXT
+
+//#define BR_EXT_DEBUG
+
+#define NAT25_IPV4		01
+#define NAT25_IPV6		02
+#define NAT25_IPX		03
+#define NAT25_APPLE		04
+#define NAT25_PPPOE		05
+
+#define RTL_RELAY_TAG_LEN (ETH_ALEN)
+#define TAG_HDR_LEN		4
+
+#define MAGIC_CODE		0x8186
+#define MAGIC_CODE_LEN	2
+#define WAIT_TIME_PPPOE	5	// waiting time for pppoe server in sec
+
+/*-----------------------------------------------------------------
+  How database records network address:
+           0    1    2    3    4    5    6    7    8    9   10
+        |----|----|----|----|----|----|----|----|----|----|----|
+  IPv4  |type|                             |      IP addr      |
+  IPX   |type|      Net addr     |          Node addr          |
+  IPX   |type|      Net addr     |Sckt addr|
+  Apple |type| Network |node|
+  PPPoE |type|   SID   |           AC MAC            |
+-----------------------------------------------------------------*/
+
+
+//Find a tag in pppoe frame and return the pointer
+static __inline__ unsigned char *__nat25_find_pppoe_tag(struct pppoe_hdr *ph, unsigned short type)
+{
+	unsigned char *cur_ptr, *start_ptr;
+	unsigned short tagLen, tagType;
+
+	start_ptr = cur_ptr = (unsigned char *)ph->tag;
+	while((cur_ptr - start_ptr) < ntohs(ph->length)) {
+		// prevent un-alignment access
+		tagType = (unsigned short)((cur_ptr[0] << 8) + cur_ptr[1]);
+		tagLen  = (unsigned short)((cur_ptr[2] << 8) + cur_ptr[3]);
+		if(tagType == type)
+			return cur_ptr;
+		cur_ptr = cur_ptr + TAG_HDR_LEN + tagLen;
+	}
+	return 0;
+}
+
+
+static __inline__ int __nat25_add_pppoe_tag(struct sk_buff *skb, struct pppoe_tag *tag)
+{
+	struct pppoe_hdr *ph = (struct pppoe_hdr *)(skb->data + ETH_HLEN);
+	int data_len;
+
+	data_len = tag->tag_len + TAG_HDR_LEN;
+	if (skb_tailroom(skb) < data_len) {
+		_DEBUG_ERR("skb_tailroom() failed in add SID tag!\n");
+		return -1;
+	}
+
+	skb_put(skb, data_len);
+	// have a room for new tag
+	memmove(((unsigned char *)ph->tag + data_len), (unsigned char *)ph->tag, ntohs(ph->length));
+	ph->length = htons(ntohs(ph->length) + data_len);
+	memcpy((unsigned char *)ph->tag, tag, data_len);
+	return data_len;
+}
+
+static int skb_pull_and_merge(struct sk_buff *skb, unsigned char *src, int len)
+{
+	int tail_len;
+	unsigned long end, tail;
+
+	if ((src+len) > skb->tail || skb->len < len)
+		return -1;
+
+	tail = (unsigned long)skb->tail;
+	end = (unsigned long)src+len;
+	if (tail < end)
+		return -1;
+
+	tail_len = (int)(tail-end);
+	if (tail_len > 0)
+		memmove(src, src+len, tail_len);
+
+	skb_trim(skb, skb->len-len);
+	return 0;
+}
+
+static __inline__ unsigned long __nat25_timeout(_adapter *priv)
+{
+	unsigned long timeout;
+
+	timeout = jiffies - NAT25_AGEING_TIME*HZ;
+
+	return timeout;
+}
+
+
+static __inline__ int  __nat25_has_expired(_adapter *priv,
+				struct nat25_network_db_entry *fdb)
+{
+	if(time_before_eq(fdb->ageing_timer, __nat25_timeout(priv)))
+		return 1;
+
+	return 0;
+}
+
+
+static __inline__ void __nat25_generate_ipv4_network_addr(unsigned char *networkAddr,
+				unsigned int *ipAddr)
+{
+	memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN);
+
+	networkAddr[0] = NAT25_IPV4;
+	memcpy(networkAddr+7, (unsigned char *)ipAddr, 4);
+}
+
+
+static __inline__ void __nat25_generate_ipx_network_addr_with_node(unsigned char *networkAddr,
+				unsigned int *ipxNetAddr, unsigned char *ipxNodeAddr)
+{
+	memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN);
+
+	networkAddr[0] = NAT25_IPX;
+	memcpy(networkAddr+1, (unsigned char *)ipxNetAddr, 4);
+	memcpy(networkAddr+5, ipxNodeAddr, 6);
+}
+
+
+static __inline__ void __nat25_generate_ipx_network_addr_with_socket(unsigned char *networkAddr,
+				unsigned int *ipxNetAddr, unsigned short *ipxSocketAddr)
+{
+	memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN);
+
+	networkAddr[0] = NAT25_IPX;
+	memcpy(networkAddr+1, (unsigned char *)ipxNetAddr, 4);
+	memcpy(networkAddr+5, (unsigned char *)ipxSocketAddr, 2);
+}
+
+
+static __inline__ void __nat25_generate_apple_network_addr(unsigned char *networkAddr,
+				unsigned short *network, unsigned char *node)
+{
+	memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN);
+
+	networkAddr[0] = NAT25_APPLE;
+	memcpy(networkAddr+1, (unsigned char *)network, 2);
+	networkAddr[3] = *node;
+}
+
+
+static __inline__ void __nat25_generate_pppoe_network_addr(unsigned char *networkAddr,
+				unsigned char *ac_mac, unsigned short *sid)
+{
+	memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN);
+
+	networkAddr[0] = NAT25_PPPOE;
+	memcpy(networkAddr+1, (unsigned char *)sid, 2);
+	memcpy(networkAddr+3, (unsigned char *)ac_mac, 6);
+}
+
+
+#ifdef CL_IPV6_PASS
+static  void __nat25_generate_ipv6_network_addr(unsigned char *networkAddr,
+				unsigned int *ipAddr)
+{
+	memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN);
+
+	networkAddr[0] = NAT25_IPV6;
+	memcpy(networkAddr+1, (unsigned char *)ipAddr, 16);
+}
+
+
+static unsigned char *scan_tlv(unsigned char *data, int len, unsigned char tag, unsigned char len8b)
+{
+	while (len > 0) {
+		if (*data == tag && *(data+1) == len8b && len >= len8b*8)
+			return data+2;	
+		
+		len -= (*(data+1))*8;		
+		data += (*(data+1))*8;		
+	}
+	return NULL;
+}
+
+
+static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char *replace_mac)
+{
+	struct icmp6hdr *icmphdr = (struct icmp6hdr *)data;
+	unsigned char *mac;
+	
+	if (icmphdr->icmp6_type == NDISC_ROUTER_SOLICITATION) { 
+		if (len >= 8) {
+			mac = scan_tlv(&data[8], len-8, 1, 1);
+			if (mac) {
+				_DEBUG_INFO("Router Solicitation, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
+					mac[0],mac[1],mac[2],mac[3],mac[4],mac[5],					
+					replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]);
+				memcpy(mac, replace_mac, 6);	
+				return 1;				
+			}
+		}
+	}
+	else if (icmphdr->icmp6_type == NDISC_ROUTER_ADVERTISEMENT) {
+		if (len >= 16) {
+			mac = scan_tlv(&data[16], len-16, 1, 1);
+			if (mac) {
+				_DEBUG_INFO("Router Advertisement, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
+					mac[0],mac[1],mac[2],mac[3],mac[4],mac[5],					
+					replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]);
+				memcpy(mac, replace_mac, 6);			
+				return 1;				
+			}
+		}		
+	}
+	else if (icmphdr->icmp6_type == NDISC_NEIGHBOUR_SOLICITATION) {
+		if (len >= 24) {
+			mac = scan_tlv(&data[24], len-24, 1, 1);
+			if (mac) {		
+				_DEBUG_INFO("Neighbor Solicitation, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
+					mac[0],mac[1],mac[2],mac[3],mac[4],mac[5],					
+					replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]);
+				memcpy(mac, replace_mac, 6);	
+				return 1;								
+			}
+		}		
+	}
+	else if (icmphdr->icmp6_type == NDISC_NEIGHBOUR_ADVERTISEMENT) {
+		if (len >= 24) {
+			mac = scan_tlv(&data[24], len-24, 2, 1);
+			if (mac) {
+				_DEBUG_INFO("Neighbor Advertisement, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
+					mac[0],mac[1],mac[2],mac[3],mac[4],mac[5],					
+					replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]);
+				memcpy(mac, replace_mac, 6);		
+				return 1;				
+			}
+		}		
+	}
+	else if (icmphdr->icmp6_type == NDISC_REDIRECT) {
+		if (len >= 40) {
+			mac = scan_tlv(&data[40], len-40, 2, 1);
+			if (mac) {				
+				_DEBUG_INFO("Redirect,  replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
+					mac[0],mac[1],mac[2],mac[3],mac[4],mac[5],					
+					replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]);
+				memcpy(mac, replace_mac, 6);	
+				return 1;				
+			}
+		}		
+	}	
+	return 0;
+}
+
+
+static void convert_ipv6_mac_to_mc(struct sk_buff *skb)
+{	
+	struct ipv6hdr *iph = (struct ipv6hdr *)(skb->data + ETH_HLEN);
+	unsigned char *dst_mac = skb->data;
+
+	//dst_mac[0] = 0xff;
+	//dst_mac[1] = 0xff;
+	/*modified by qinjunjie,ipv6 multicast address ix 0x33-33-xx-xx-xx-xx*/
+	dst_mac[0] = 0x33;
+	dst_mac[1] = 0x33;
+	memcpy(&dst_mac[2], &iph->daddr.s6_addr32[3], 4);
+	#if defined(__LINUX_2_6__) 
+	/*modified by qinjunjie,warning:should not remove next line*/
+	skb->pkt_type = PACKET_MULTICAST;
+	#endif
+}
+#endif /* CL_IPV6_PASS */
+
+
+static __inline__ int __nat25_network_hash(unsigned char *networkAddr)
+{
+	if(networkAddr[0] == NAT25_IPV4)
+	{
+		unsigned long x;
+
+		x = networkAddr[7] ^ networkAddr[8] ^ networkAddr[9] ^ networkAddr[10];
+
+		return x & (NAT25_HASH_SIZE - 1);
+	}
+	else if(networkAddr[0] == NAT25_IPX)
+	{
+		unsigned long x;
+
+		x = networkAddr[1] ^ networkAddr[2] ^ networkAddr[3] ^ networkAddr[4] ^ networkAddr[5] ^
+			networkAddr[6] ^ networkAddr[7] ^ networkAddr[8] ^ networkAddr[9] ^ networkAddr[10];
+
+		return x & (NAT25_HASH_SIZE - 1);
+	}
+	else if(networkAddr[0] == NAT25_APPLE)
+	{
+		unsigned long x;
+
+		x = networkAddr[1] ^ networkAddr[2] ^ networkAddr[3];
+
+		return x & (NAT25_HASH_SIZE - 1);
+	}
+	else if(networkAddr[0] == NAT25_PPPOE)
+	{
+		unsigned long x;
+
+		x = networkAddr[0] ^ networkAddr[1] ^ networkAddr[2] ^ networkAddr[3] ^ networkAddr[4] ^ networkAddr[5] ^ networkAddr[6] ^ networkAddr[7] ^ networkAddr[8];
+
+		return x & (NAT25_HASH_SIZE - 1);
+	}
+#ifdef CL_IPV6_PASS
+	else if(networkAddr[0] == NAT25_IPV6)
+	{
+		unsigned long x;
+
+		x = networkAddr[1] ^ networkAddr[2] ^ networkAddr[3] ^ networkAddr[4] ^ networkAddr[5] ^
+			networkAddr[6] ^ networkAddr[7] ^ networkAddr[8] ^ networkAddr[9] ^ networkAddr[10] ^
+			networkAddr[11] ^ networkAddr[12] ^ networkAddr[13] ^ networkAddr[14] ^ networkAddr[15] ^
+			networkAddr[16];
+	
+		return x & (NAT25_HASH_SIZE - 1);
+	}
+#endif	
+	else
+	{
+		unsigned long x = 0;
+		int i;
+
+		for (i=0; i<MAX_NETWORK_ADDR_LEN; i++)
+			x ^= networkAddr[i];
+
+		return x & (NAT25_HASH_SIZE - 1);
+	}
+}
+
+
+static __inline__ void __network_hash_link(_adapter *priv,
+				struct nat25_network_db_entry *ent, int hash)
+{
+	// Caller must _enter_critical_bh already!
+	//_irqL irqL;
+	//_enter_critical_bh(&priv->br_ext_lock, &irqL);
+
+	ent->next_hash = priv->nethash[hash];
+	if(ent->next_hash != NULL)
+		ent->next_hash->pprev_hash = &ent->next_hash;
+	priv->nethash[hash] = ent;
+	ent->pprev_hash = &priv->nethash[hash];
+
+	//_exit_critical_bh(&priv->br_ext_lock, &irqL);
+}
+
+
+static __inline__ void __network_hash_unlink(struct nat25_network_db_entry *ent)
+{
+	// Caller must _enter_critical_bh already!
+	//_irqL irqL;
+	//_enter_critical_bh(&priv->br_ext_lock, &irqL);
+
+	*(ent->pprev_hash) = ent->next_hash;
+	if(ent->next_hash != NULL)
+		ent->next_hash->pprev_hash = ent->pprev_hash;
+	ent->next_hash = NULL;
+	ent->pprev_hash = NULL;
+
+	//_exit_critical_bh(&priv->br_ext_lock, &irqL);
+}
+
+
+static int __nat25_db_network_lookup_and_replace(_adapter *priv,
+				struct sk_buff *skb, unsigned char *networkAddr)
+{
+	struct nat25_network_db_entry *db;
+	_irqL irqL;
+	_enter_critical_bh(&priv->br_ext_lock, &irqL);
+
+	db = priv->nethash[__nat25_network_hash(networkAddr)];
+	while (db != NULL)
+	{
+		if(!memcmp(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN))
+		{
+			if(!__nat25_has_expired(priv, db))
+			{
+				// replace the destination mac address
+				memcpy(skb->data, db->macAddr, ETH_ALEN);
+				atomic_inc(&db->use_count);
+
+#ifdef CL_IPV6_PASS
+				DEBUG_INFO("NAT25: Lookup M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x"	
+							"%02x%02x%02x%02x%02x%02x\n",				
+					db->macAddr[0],
+					db->macAddr[1],
+					db->macAddr[2],
+					db->macAddr[3],
+					db->macAddr[4],
+					db->macAddr[5],
+					db->networkAddr[0],
+					db->networkAddr[1],
+					db->networkAddr[2],
+					db->networkAddr[3],
+					db->networkAddr[4],
+					db->networkAddr[5],
+					db->networkAddr[6],
+					db->networkAddr[7],
+					db->networkAddr[8],
+					db->networkAddr[9],
+					db->networkAddr[10],
+					db->networkAddr[11],
+					db->networkAddr[12],
+					db->networkAddr[13],
+					db->networkAddr[14],
+					db->networkAddr[15],
+					db->networkAddr[16]);
+#else				
+				DEBUG_INFO("NAT25: Lookup M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
+					db->macAddr[0],
+					db->macAddr[1],
+					db->macAddr[2],
+					db->macAddr[3],
+					db->macAddr[4],
+					db->macAddr[5],
+					db->networkAddr[0],
+					db->networkAddr[1],
+					db->networkAddr[2],
+					db->networkAddr[3],
+					db->networkAddr[4],
+					db->networkAddr[5],
+					db->networkAddr[6],
+					db->networkAddr[7],
+					db->networkAddr[8],
+					db->networkAddr[9],
+					db->networkAddr[10]);
+#endif
+			}
+			_exit_critical_bh(&priv->br_ext_lock, &irqL);
+			return 1;
+		}
+
+		db = db->next_hash;
+	}
+
+	_exit_critical_bh(&priv->br_ext_lock, &irqL);
+	return 0;
+}
+
+
+static void __nat25_db_network_insert(_adapter *priv,
+				unsigned char *macAddr, unsigned char *networkAddr)
+{
+	struct nat25_network_db_entry *db;
+	int hash;
+	_irqL irqL;
+	_enter_critical_bh(&priv->br_ext_lock, &irqL);
+
+	hash = __nat25_network_hash(networkAddr);
+	db = priv->nethash[hash];
+	while (db != NULL)
+	{
+		if(!memcmp(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN))
+		{
+			memcpy(db->macAddr, macAddr, ETH_ALEN);
+			db->ageing_timer = jiffies;
+			_exit_critical_bh(&priv->br_ext_lock, &irqL);
+			return;
+		}
+
+		db = db->next_hash;
+	}
+
+	db = (struct nat25_network_db_entry *) _rtw_malloc(sizeof(*db));
+	if(db == NULL) {
+		_exit_critical_bh(&priv->br_ext_lock, &irqL);
+		return;
+	}
+
+	memcpy(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN);
+	memcpy(db->macAddr, macAddr, ETH_ALEN);
+	atomic_set(&db->use_count, 1);
+	db->ageing_timer = jiffies;
+
+	__network_hash_link(priv, db, hash);
+
+	_exit_critical_bh(&priv->br_ext_lock, &irqL);
+}
+
+
+static void __nat25_db_print(_adapter *priv)
+{
+	_irqL irqL;
+	_enter_critical_bh(&priv->br_ext_lock, &irqL);
+
+#ifdef BR_EXT_DEBUG
+	static int counter = 0;
+	int i, j;
+	struct nat25_network_db_entry *db;
+
+	counter++;
+	if((counter % 16) != 0)
+		return;
+
+	for(i=0, j=0; i<NAT25_HASH_SIZE; i++)
+	{
+		db = priv->nethash[i];
+
+		while (db != NULL)
+		{
+#ifdef CL_IPV6_PASS
+			panic_printk("NAT25: DB(%d) H(%02d) C(%d) M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x"
+					"%02x%02x%02x%02x%02x%02x\n",
+				j,
+				i,
+				atomic_read(&db->use_count),
+				db->macAddr[0],
+				db->macAddr[1],
+				db->macAddr[2],
+				db->macAddr[3],
+				db->macAddr[4],
+				db->macAddr[5],
+				db->networkAddr[0],
+				db->networkAddr[1],
+				db->networkAddr[2],
+				db->networkAddr[3],
+				db->networkAddr[4],
+				db->networkAddr[5],
+				db->networkAddr[6],
+				db->networkAddr[7],
+				db->networkAddr[8],
+				db->networkAddr[9],
+				db->networkAddr[10],
+				db->networkAddr[11],
+				db->networkAddr[12],
+				db->networkAddr[13],
+				db->networkAddr[14],
+				db->networkAddr[15],
+				db->networkAddr[16]);
+#else
+			panic_printk("NAT25: DB(%d) H(%02d) C(%d) M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
+				j,
+				i,
+				atomic_read(&db->use_count),
+				db->macAddr[0],
+				db->macAddr[1],
+				db->macAddr[2],
+				db->macAddr[3],
+				db->macAddr[4],
+				db->macAddr[5],
+				db->networkAddr[0],
+				db->networkAddr[1],
+				db->networkAddr[2],
+				db->networkAddr[3],
+				db->networkAddr[4],
+				db->networkAddr[5],
+				db->networkAddr[6],
+				db->networkAddr[7],
+				db->networkAddr[8],
+				db->networkAddr[9],
+				db->networkAddr[10]);
+#endif
+			j++;
+
+			db = db->next_hash;
+		}
+	}
+#endif
+
+	_exit_critical_bh(&priv->br_ext_lock, &irqL);
+}
+
+
+
+
+/*
+ *	NAT2.5 interface
+ */
+
+void nat25_db_cleanup(_adapter *priv)
+{
+	int i;
+	_irqL irqL;
+	_enter_critical_bh(&priv->br_ext_lock, &irqL);
+
+	for(i=0; i<NAT25_HASH_SIZE; i++)
+	{
+		struct nat25_network_db_entry *f;
+		f = priv->nethash[i];
+		while (f != NULL) {
+			struct nat25_network_db_entry *g;
+
+			g = f->next_hash;
+			if(priv->scdb_entry == f)
+			{
+				memset(priv->scdb_mac, 0, ETH_ALEN);
+				memset(priv->scdb_ip, 0, 4);
+				priv->scdb_entry = NULL;
+			}
+			__network_hash_unlink(f);
+			_rtw_mfree((u8 *) f, sizeof(struct nat25_network_db_entry));
+
+			f = g;
+		}
+	}
+
+	_exit_critical_bh(&priv->br_ext_lock, &irqL);
+}
+
+
+void nat25_db_expire(_adapter *priv)
+{
+	int i;
+	_irqL irqL;
+	_enter_critical_bh(&priv->br_ext_lock, &irqL);
+
+	//if(!priv->ethBrExtInfo.nat25_disable)
+	{
+		for (i=0; i<NAT25_HASH_SIZE; i++)
+		{
+			struct nat25_network_db_entry *f;
+			f = priv->nethash[i];
+
+			while (f != NULL)
+			{
+				struct nat25_network_db_entry *g;
+				g = f->next_hash;
+
+				if(__nat25_has_expired(priv, f))
+				{
+					if(atomic_dec_and_test(&f->use_count))
+					{
+#ifdef BR_EXT_DEBUG
+#ifdef CL_IPV6_PASS
+						panic_printk("NAT25 Expire H(%02d) M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x"
+								"%02x%02x%02x%02x%02x%02x\n",
+							i,
+							f->macAddr[0],
+							f->macAddr[1],
+							f->macAddr[2],
+							f->macAddr[3],
+							f->macAddr[4],
+							f->macAddr[5],
+							f->networkAddr[0],
+							f->networkAddr[1],
+							f->networkAddr[2],
+							f->networkAddr[3],
+							f->networkAddr[4],
+							f->networkAddr[5],
+							f->networkAddr[6],
+							f->networkAddr[7],
+							f->networkAddr[8],
+							f->networkAddr[9],
+							f->networkAddr[10],
+							f->networkAddr[11],
+							f->networkAddr[12],
+							f->networkAddr[13],
+							f->networkAddr[14],
+							f->networkAddr[15],
+							f->networkAddr[16]);
+#else
+
+						panic_printk("NAT25 Expire H(%02d) M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
+							i,
+							f->macAddr[0],
+							f->macAddr[1],
+							f->macAddr[2],
+							f->macAddr[3],
+							f->macAddr[4],
+							f->macAddr[5],
+							f->networkAddr[0],
+							f->networkAddr[1],
+							f->networkAddr[2],
+							f->networkAddr[3],
+							f->networkAddr[4],
+							f->networkAddr[5],
+							f->networkAddr[6],
+							f->networkAddr[7],
+							f->networkAddr[8],
+							f->networkAddr[9],
+							f->networkAddr[10]);
+#endif
+#endif
+						if(priv->scdb_entry == f)
+						{
+							memset(priv->scdb_mac, 0, ETH_ALEN);
+							memset(priv->scdb_ip, 0, 4);
+							priv->scdb_entry = NULL;
+						}
+						__network_hash_unlink(f);
+						_rtw_mfree((u8 *) f, sizeof(struct nat25_network_db_entry));
+					}
+				}
+
+				f = g;
+			}
+		}
+	}
+
+	_exit_critical_bh(&priv->br_ext_lock, &irqL);
+}
+
+
+#ifdef SUPPORT_TX_MCAST2UNI
+static int checkIPMcAndReplace(_adapter *priv, struct sk_buff *skb, unsigned int *dst_ip)
+{
+	struct stat_info	*pstat;
+	struct list_head	*phead, *plist;
+	int i;
+
+	phead = &priv->asoc_list;
+	plist = phead->next;
+
+	while (plist != phead) {
+		pstat = list_entry(plist, struct stat_info, asoc_list);
+		plist = plist->next;
+
+		if (pstat->ipmc_num == 0)
+			continue;
+
+		for (i=0; i<MAX_IP_MC_ENTRY; i++) {
+			if (pstat->ipmc[i].used && !memcmp(&pstat->ipmc[i].mcmac[3], ((unsigned char *)dst_ip)+1, 3)) {
+				memcpy(skb->data, pstat->ipmc[i].mcmac, ETH_ALEN);
+				return 1;
+			}
+		}
+	}
+	return 0;
+}
+#endif
+
+int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
+{
+	unsigned short protocol;
+	unsigned char networkAddr[MAX_NETWORK_ADDR_LEN];
+
+	if(skb == NULL)
+		return -1;
+
+	if((method <= NAT25_MIN) || (method >= NAT25_MAX))
+		return -1;
+
+	protocol = *((unsigned short *)(skb->data + 2 * ETH_ALEN));
+
+	/*---------------------------------------------------*/
+	/*                 Handle IP frame                   */
+	/*---------------------------------------------------*/
+	if(protocol == __constant_htons(ETH_P_IP))
+	{
+		struct iphdr* iph = (struct iphdr *)(skb->data + ETH_HLEN);
+
+		if(((unsigned char*)(iph) + (iph->ihl<<2)) >= (skb->data + ETH_HLEN + skb->len))
+		{
+			DEBUG_WARN("NAT25: malformed IP packet !\n");
+			return -1;
+		}
+
+		switch(method)
+		{
+			case NAT25_CHECK:
+				return -1;
+
+			case NAT25_INSERT:
+				{
+					//some muticast with source IP is all zero, maybe other case is illegal
+					//in class A, B, C, host address is all zero or all one is illegal
+					if (iph->saddr == 0)
+						return 0;
+					DEBUG_INFO("NAT25: Insert IP, SA=%08x, DA=%08x\n", iph->saddr, iph->daddr);
+					__nat25_generate_ipv4_network_addr(networkAddr, &iph->saddr);
+					//record source IP address and , source mac address into db
+					__nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
+
+					__nat25_db_print(priv);
+				}
+				return 0;
+
+			case NAT25_LOOKUP:
+				{
+					DEBUG_INFO("NAT25: Lookup IP, SA=%08x, DA=%08x\n", iph->saddr, iph->daddr);
+#ifdef SUPPORT_TX_MCAST2UNI
+					if (priv->pshare->rf_ft_var.mc2u_disable ||
+							((((OPMODE & (WIFI_STATION_STATE|WIFI_ASOC_STATE))
+							== (WIFI_STATION_STATE|WIFI_ASOC_STATE)) &&
+							!checkIPMcAndReplace(priv, skb, &iph->daddr)) ||
+							(OPMODE & WIFI_ADHOC_STATE)))
+#endif
+					{
+						__nat25_generate_ipv4_network_addr(networkAddr, &iph->daddr);
+
+						if (!__nat25_db_network_lookup_and_replace(priv, skb, networkAddr)) {
+							if (*((unsigned char *)&iph->daddr + 3) == 0xff) {
+								// L2 is unicast but L3 is broadcast, make L2 bacome broadcast
+								DEBUG_INFO("NAT25: Set DA as boardcast\n");
+								memset(skb->data, 0xff, ETH_ALEN);
+							}
+							else {
+								// forward unknow IP packet to upper TCP/IP
+								DEBUG_INFO("NAT25: Replace DA with BR's MAC\n");
+								memcpy(skb->data, priv->br_mac, ETH_ALEN);
+							}
+						}
+					}
+				}
+				return 0;
+
+			default:
+				return -1;
+		}
+	}
+
+	/*---------------------------------------------------*/
+	/*                 Handle ARP frame                  */
+	/*---------------------------------------------------*/
+	else if(protocol == __constant_htons(ETH_P_ARP))
+	{
+		struct arphdr *arp = (struct arphdr *)(skb->data + ETH_HLEN);
+		unsigned char *arp_ptr = (unsigned char *)(arp + 1);
+		unsigned int *sender, *target;
+
+		if(arp->ar_pro != __constant_htons(ETH_P_IP))
+		{
+			DEBUG_WARN("NAT25: arp protocol unknown (%4x)!\n", htons(arp->ar_pro));
+			return -1;
+		}
+
+		switch(method)
+		{
+			case NAT25_CHECK:
+				return 0;	// skb_copy for all ARP frame
+
+			case NAT25_INSERT:
+				{
+					DEBUG_INFO("NAT25: Insert ARP, MAC=%02x%02x%02x%02x%02x%02x\n", arp_ptr[0],
+						arp_ptr[1], arp_ptr[2], arp_ptr[3], arp_ptr[4], arp_ptr[5]);
+
+					// change to ARP sender mac address to wlan STA address
+                                        memcpy(arp_ptr, GET_MY_HWADDR(priv), ETH_ALEN);
+
+					arp_ptr += arp->ar_hln;
+					sender = (unsigned int *)arp_ptr;
+
+					__nat25_generate_ipv4_network_addr(networkAddr, sender);
+
+					__nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
+
+					__nat25_db_print(priv);
+				}
+				return 0;
+
+			case NAT25_LOOKUP:
+				{
+					DEBUG_INFO("NAT25: Lookup ARP\n");
+
+					arp_ptr += arp->ar_hln;
+					sender = (unsigned int *)arp_ptr;
+					arp_ptr += (arp->ar_hln + arp->ar_pln);
+					target = (unsigned int *)arp_ptr;
+
+					__nat25_generate_ipv4_network_addr(networkAddr, target);
+
+					__nat25_db_network_lookup_and_replace(priv, skb, networkAddr);
+
+					// change to ARP target mac address to Lookup result
+					arp_ptr = (unsigned char *)(arp + 1);
+					arp_ptr += (arp->ar_hln + arp->ar_pln);
+					memcpy(arp_ptr, skb->data, ETH_ALEN);
+				}
+				return 0;
+
+			default:
+				return -1;
+		}
+	}
+
+	/*---------------------------------------------------*/
+	/*         Handle IPX and Apple Talk frame           */
+	/*---------------------------------------------------*/
+	else if((protocol == __constant_htons(ETH_P_IPX)) ||
+		(protocol <= __constant_htons(ETH_FRAME_LEN)))
+	{
+		unsigned char ipx_header[2] = {0xFF, 0xFF};
+		struct ipxhdr	*ipx = NULL;
+		struct elapaarp	*ea = NULL;
+		struct ddpehdr	*ddp = NULL;
+		unsigned char *framePtr = skb->data + ETH_HLEN;
+
+		if(protocol == __constant_htons(ETH_P_IPX))
+		{
+			DEBUG_INFO("NAT25: Protocol=IPX (Ethernet II)\n");
+			ipx = (struct ipxhdr *)framePtr;
+		}
+		else if(protocol <= __constant_htons(ETH_FRAME_LEN))
+		{
+			if(!memcmp(ipx_header, framePtr, 2))
+			{
+				DEBUG_INFO("NAT25: Protocol=IPX (Ethernet 802.3)\n");
+				ipx = (struct ipxhdr *)framePtr;
+			}
+			else
+			{
+				unsigned char ipx_8022_type =  0xE0;
+				unsigned char snap_8022_type = 0xAA;
+
+				if(*framePtr == snap_8022_type)
+				{
+					unsigned char ipx_snap_id[5] = {0x0, 0x0, 0x0, 0x81, 0x37};		// IPX SNAP ID
+					unsigned char aarp_snap_id[5] = {0x00, 0x00, 0x00, 0x80, 0xF3};	// Apple Talk AARP SNAP ID
+					unsigned char ddp_snap_id[5] = {0x08, 0x00, 0x07, 0x80, 0x9B};	// Apple Talk DDP SNAP ID
+
+					framePtr += 3;	// eliminate the 802.2 header
+
+					if(!memcmp(ipx_snap_id, framePtr, 5))
+					{
+						framePtr += 5;	// eliminate the SNAP header
+
+						DEBUG_INFO("NAT25: Protocol=IPX (Ethernet SNAP)\n");
+						ipx = (struct ipxhdr *)framePtr;
+					}
+					else if(!memcmp(aarp_snap_id, framePtr, 5))
+					{
+						framePtr += 5;	// eliminate the SNAP header
+
+						ea = (struct elapaarp *)framePtr;
+					}
+					else if(!memcmp(ddp_snap_id, framePtr, 5))
+					{
+						framePtr += 5;	// eliminate the SNAP header
+
+						ddp = (struct ddpehdr *)framePtr;
+					}
+					else
+					{
+						DEBUG_WARN("NAT25: Protocol=Ethernet SNAP %02x%02x%02x%02x%02x\n", framePtr[0],
+							framePtr[1], framePtr[2], framePtr[3], framePtr[4]);
+						return -1;
+					}
+				}
+				else if(*framePtr == ipx_8022_type)
+				{
+					framePtr += 3;	// eliminate the 802.2 header
+
+					if(!memcmp(ipx_header, framePtr, 2))
+					{
+						DEBUG_INFO("NAT25: Protocol=IPX (Ethernet 802.2)\n");
+						ipx = (struct ipxhdr *)framePtr;
+					}
+					else
+						return -1;
+				}
+				else
+					return -1;
+			}
+		}
+		else
+			return -1;
+
+		/*   IPX   */
+		if(ipx != NULL)
+		{
+			switch(method)
+			{
+				case NAT25_CHECK:
+					if(!memcmp(skb->data+ETH_ALEN, ipx->ipx_source.node, ETH_ALEN))
+					{
+						DEBUG_INFO("NAT25: Check IPX skb_copy\n");
+						return 0;
+					}
+					return -1;
+
+				case NAT25_INSERT:
+					{
+						DEBUG_INFO("NAT25: Insert IPX, Dest=%08x,%02x%02x%02x%02x%02x%02x,%04x Source=%08x,%02x%02x%02x%02x%02x%02x,%04x\n",
+							ipx->ipx_dest.net,
+							ipx->ipx_dest.node[0],
+							ipx->ipx_dest.node[1],
+							ipx->ipx_dest.node[2],
+							ipx->ipx_dest.node[3],
+							ipx->ipx_dest.node[4],
+							ipx->ipx_dest.node[5],
+							ipx->ipx_dest.sock,
+							ipx->ipx_source.net,
+							ipx->ipx_source.node[0],
+							ipx->ipx_source.node[1],
+							ipx->ipx_source.node[2],
+							ipx->ipx_source.node[3],
+							ipx->ipx_source.node[4],
+							ipx->ipx_source.node[5],
+							ipx->ipx_source.sock);
+
+						if(!memcmp(skb->data+ETH_ALEN, ipx->ipx_source.node, ETH_ALEN))
+						{
+							DEBUG_INFO("NAT25: Use IPX Net, and Socket as network addr\n");
+
+							__nat25_generate_ipx_network_addr_with_socket(networkAddr, &ipx->ipx_source.net, &ipx->ipx_source.sock);
+
+							// change IPX source node addr to wlan STA address
+                                                        memcpy(ipx->ipx_source.node, GET_MY_HWADDR(priv), ETH_ALEN);
+						}
+						else
+						{
+							__nat25_generate_ipx_network_addr_with_node(networkAddr, &ipx->ipx_source.net, ipx->ipx_source.node);
+						}
+
+						__nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
+
+						__nat25_db_print(priv);
+					}
+					return 0;
+
+				case NAT25_LOOKUP:
+					{
+                                                if(!memcmp(GET_MY_HWADDR(priv), ipx->ipx_dest.node, ETH_ALEN))
+						{
+							DEBUG_INFO("NAT25: Lookup IPX, Modify Destination IPX Node addr\n");
+
+							__nat25_generate_ipx_network_addr_with_socket(networkAddr, &ipx->ipx_dest.net, &ipx->ipx_dest.sock);
+
+							__nat25_db_network_lookup_and_replace(priv, skb, networkAddr);
+
+							// replace IPX destination node addr with Lookup destination MAC addr
+							memcpy(ipx->ipx_dest.node, skb->data, ETH_ALEN);
+						}
+						else
+						{
+							__nat25_generate_ipx_network_addr_with_node(networkAddr, &ipx->ipx_dest.net, ipx->ipx_dest.node);
+
+							__nat25_db_network_lookup_and_replace(priv, skb, networkAddr);
+						}
+					}
+					return 0;
+
+				default:
+					return -1;
+			}
+		}
+
+		/*   AARP   */
+		else if(ea != NULL)
+		{
+			/* Sanity check fields. */
+			if(ea->hw_len != ETH_ALEN || ea->pa_len != AARP_PA_ALEN)
+			{
+				DEBUG_WARN("NAT25: Appletalk AARP Sanity check fail!\n");
+				return -1;
+			}
+
+			switch(method)
+			{
+				case NAT25_CHECK:
+					return 0;
+
+				case NAT25_INSERT:
+					{
+						// change to AARP source mac address to wlan STA address
+                                                memcpy(ea->hw_src, GET_MY_HWADDR(priv), ETH_ALEN);
+
+						DEBUG_INFO("NAT25: Insert AARP, Source=%d,%d Destination=%d,%d\n",
+							ea->pa_src_net,
+							ea->pa_src_node,
+							ea->pa_dst_net,
+							ea->pa_dst_node);
+
+						__nat25_generate_apple_network_addr(networkAddr, &ea->pa_src_net, &ea->pa_src_node);
+
+						__nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
+
+						__nat25_db_print(priv);
+					}
+					return 0;
+
+				case NAT25_LOOKUP:
+					{
+						DEBUG_INFO("NAT25: Lookup AARP, Source=%d,%d Destination=%d,%d\n",
+							ea->pa_src_net,
+							ea->pa_src_node,
+							ea->pa_dst_net,
+							ea->pa_dst_node);
+
+						__nat25_generate_apple_network_addr(networkAddr, &ea->pa_dst_net, &ea->pa_dst_node);
+
+						__nat25_db_network_lookup_and_replace(priv, skb, networkAddr);
+
+						// change to AARP destination mac address to Lookup result
+						memcpy(ea->hw_dst, skb->data, ETH_ALEN);
+					}
+					return 0;
+
+				default:
+					return -1;
+			}
+		}
+
+		/*   DDP   */
+		else if(ddp != NULL)
+		{
+			switch(method)
+			{
+				case NAT25_CHECK:
+					return -1;
+
+				case NAT25_INSERT:
+					{
+						DEBUG_INFO("NAT25: Insert DDP, Source=%d,%d Destination=%d,%d\n",
+							ddp->deh_snet,
+							ddp->deh_snode,
+							ddp->deh_dnet,
+							ddp->deh_dnode);
+
+						__nat25_generate_apple_network_addr(networkAddr, &ddp->deh_snet, &ddp->deh_snode);
+
+						__nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
+
+						__nat25_db_print(priv);
+					}
+					return 0;
+
+				case NAT25_LOOKUP:
+					{
+						DEBUG_INFO("NAT25: Lookup DDP, Source=%d,%d Destination=%d,%d\n",
+							ddp->deh_snet,
+							ddp->deh_snode,
+							ddp->deh_dnet,
+							ddp->deh_dnode);
+
+						__nat25_generate_apple_network_addr(networkAddr, &ddp->deh_dnet, &ddp->deh_dnode);
+
+						__nat25_db_network_lookup_and_replace(priv, skb, networkAddr);
+					}
+					return 0;
+
+				default:
+					return -1;
+			}
+		}
+
+		return -1;
+	}
+
+	/*---------------------------------------------------*/
+	/*                Handle PPPoE frame                 */
+	/*---------------------------------------------------*/
+	else if((protocol == __constant_htons(ETH_P_PPP_DISC)) ||
+		(protocol == __constant_htons(ETH_P_PPP_SES)))
+	{
+		struct pppoe_hdr *ph = (struct pppoe_hdr *)(skb->data + ETH_HLEN);
+		unsigned short *pMagic;
+
+		switch(method)
+		{
+			case NAT25_CHECK:
+				if (ph->sid == 0)
+					return 0;
+				return 1;
+
+			case NAT25_INSERT:
+				if(ph->sid == 0)	// Discovery phase according to tag
+				{
+					if(ph->code == PADI_CODE || ph->code == PADR_CODE)
+					{
+						if (priv->ethBrExtInfo.addPPPoETag) {
+							struct pppoe_tag *tag, *pOldTag;
+							unsigned char tag_buf[40];
+							int old_tag_len=0;
+
+							tag = (struct pppoe_tag *)tag_buf;
+							pOldTag = (struct pppoe_tag *)__nat25_find_pppoe_tag(ph, ntohs(PTT_RELAY_SID));
+							if (pOldTag) { // if SID existed, copy old value and delete it
+								old_tag_len = ntohs(pOldTag->tag_len);
+								if (old_tag_len+TAG_HDR_LEN+MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN > sizeof(tag_buf)) {
+									DEBUG_ERR("SID tag length too long!\n");
+									return -1;
+								}
+
+								memcpy(tag->tag_data+MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN,
+									pOldTag->tag_data, old_tag_len);
+
+								if (skb_pull_and_merge(skb, (unsigned char *)pOldTag, TAG_HDR_LEN+old_tag_len) < 0) {
+									DEBUG_ERR("call skb_pull_and_merge() failed in PADI/R packet!\n");
+									return -1;
+								}
+								ph->length = htons(ntohs(ph->length)-TAG_HDR_LEN-old_tag_len);
+							}
+
+							tag->tag_type = PTT_RELAY_SID;
+							tag->tag_len = htons(MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN+old_tag_len);
+
+							// insert the magic_code+client mac in relay tag
+							pMagic = (unsigned short *)tag->tag_data;
+							*pMagic = htons(MAGIC_CODE);
+							memcpy(tag->tag_data+MAGIC_CODE_LEN, skb->data+ETH_ALEN, ETH_ALEN);
+
+							//Add relay tag
+							if(__nat25_add_pppoe_tag(skb, tag) < 0)
+								return -1;
+
+							DEBUG_INFO("NAT25: Insert PPPoE, forward %s packet\n",
+											(ph->code == PADI_CODE ? "PADI" : "PADR"));
+						}
+						else { // not add relay tag
+							if (priv->pppoe_connection_in_progress &&
+									memcmp(skb->data+ETH_ALEN, priv->pppoe_addr, ETH_ALEN))	 {
+								DEBUG_ERR("Discard PPPoE packet due to another PPPoE connection is in progress!\n");
+								return -2;
+							}
+
+							if (priv->pppoe_connection_in_progress == 0)
+								memcpy(priv->pppoe_addr, skb->data+ETH_ALEN, ETH_ALEN);
+
+							priv->pppoe_connection_in_progress = WAIT_TIME_PPPOE;
+						}
+					}
+					else
+						return -1;
+				}
+				else	// session phase
+				{
+						DEBUG_INFO("NAT25: Insert PPPoE, insert session packet to %s\n", skb->dev->name);
+
+						__nat25_generate_pppoe_network_addr(networkAddr, skb->data, &(ph->sid));
+
+						__nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
+
+						__nat25_db_print(priv);
+
+						if (!priv->ethBrExtInfo.addPPPoETag &&
+								priv->pppoe_connection_in_progress &&
+									!memcmp(skb->data+ETH_ALEN, priv->pppoe_addr, ETH_ALEN))
+							priv->pppoe_connection_in_progress = 0;
+				}
+				return 0;
+
+			case NAT25_LOOKUP:
+				if(ph->code == PADO_CODE || ph->code == PADS_CODE)
+				{
+					if (priv->ethBrExtInfo.addPPPoETag) {
+						struct pppoe_tag *tag;
+						unsigned char *ptr;
+						unsigned short tagType, tagLen;
+						int offset=0;
+
+						if((ptr = __nat25_find_pppoe_tag(ph, ntohs(PTT_RELAY_SID))) == 0) {
+							DEBUG_ERR("Fail to find PTT_RELAY_SID in FADO!\n");
+							return -1;
+						}
+
+						tag = (struct pppoe_tag *)ptr;
+						tagType = (unsigned short)((ptr[0] << 8) + ptr[1]);
+						tagLen = (unsigned short)((ptr[2] << 8) + ptr[3]);
+
+						if((tagType != ntohs(PTT_RELAY_SID)) || (tagLen < (MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN))) {
+							DEBUG_ERR("Invalid PTT_RELAY_SID tag length [%d]!\n", tagLen);
+							return -1;
+						}
+
+						pMagic = (unsigned short *)tag->tag_data;
+						if (ntohs(*pMagic) != MAGIC_CODE) {
+							DEBUG_ERR("Can't find MAGIC_CODE in %s packet!\n",
+								(ph->code == PADO_CODE ? "PADO" : "PADS"));
+							return -1;
+						}
+
+						memcpy(skb->data, tag->tag_data+MAGIC_CODE_LEN, ETH_ALEN);
+
+						if (tagLen > MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN)
+							offset = TAG_HDR_LEN;
+
+						if (skb_pull_and_merge(skb, ptr+offset, TAG_HDR_LEN+MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN-offset) < 0) {
+							DEBUG_ERR("call skb_pull_and_merge() failed in PADO packet!\n");
+							return -1;
+						}
+						ph->length = htons(ntohs(ph->length)-(TAG_HDR_LEN+MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN-offset));
+						if (offset > 0)
+							tag->tag_len = htons(tagLen-MAGIC_CODE_LEN-RTL_RELAY_TAG_LEN);
+
+						DEBUG_INFO("NAT25: Lookup PPPoE, forward %s Packet from %s\n",
+							(ph->code == PADO_CODE ? "PADO" : "PADS"),	skb->dev->name);
+					}
+					else { // not add relay tag
+						if (!priv->pppoe_connection_in_progress) {
+							DEBUG_ERR("Discard PPPoE packet due to no connection in progresss!\n");
+							return -1;
+						}
+						memcpy(skb->data, priv->pppoe_addr, ETH_ALEN);
+						priv->pppoe_connection_in_progress = WAIT_TIME_PPPOE;
+					}
+				}
+				else {
+					if(ph->sid != 0)
+					{
+						DEBUG_INFO("NAT25: Lookup PPPoE, lookup session packet from %s\n", skb->dev->name);
+						__nat25_generate_pppoe_network_addr(networkAddr, skb->data+ETH_ALEN, &(ph->sid));
+
+						__nat25_db_network_lookup_and_replace(priv, skb, networkAddr);
+
+						__nat25_db_print(priv);
+					}
+					else
+						return -1;
+
+				}
+				return 0;
+
+			default:
+				return -1;
+		}
+	}
+
+	/*---------------------------------------------------*/
+	/*                 Handle EAP frame                  */
+	/*---------------------------------------------------*/
+	else if(protocol == __constant_htons(0x888e))
+	{
+		switch(method)
+		{
+			case NAT25_CHECK:
+				return -1;
+
+			case NAT25_INSERT:
+				return 0;
+
+			case NAT25_LOOKUP:
+				return 0;
+
+			default:
+				return -1;
+		}
+	}
+
+	/*---------------------------------------------------*/
+	/*         Handle C-Media proprietary frame          */
+	/*---------------------------------------------------*/
+	else if((protocol == __constant_htons(0xe2ae)) ||
+		(protocol == __constant_htons(0xe2af)))
+	{
+		switch(method)
+		{
+			case NAT25_CHECK:
+				return -1;
+
+			case NAT25_INSERT:
+				return 0;
+
+			case NAT25_LOOKUP:
+				return 0;
+
+			default:
+				return -1;
+		}
+	}
+
+	/*---------------------------------------------------*/
+	/*         Handle IPV6 frame      							  */
+	/*---------------------------------------------------*/
+#ifdef CL_IPV6_PASS
+	else if(protocol == __constant_htons(ETH_P_IPV6))
+	{
+		struct ipv6hdr *iph = (struct ipv6hdr *)(skb->data + ETH_HLEN);
+
+		if (sizeof(*iph) >= (skb->len - ETH_HLEN))
+		{
+			DEBUG_WARN("NAT25: malformed IPv6 packet !\n");
+			return -1;
+		}
+
+		switch(method)
+		{
+			case NAT25_CHECK:
+				if (skb->data[0] & 1)
+					return 0;				
+				return -1;
+
+			case NAT25_INSERT:
+				{
+					DEBUG_INFO("NAT25: Insert IP, SA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x,"
+									" DA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x\n", 
+						iph->saddr.s6_addr16[0],iph->saddr.s6_addr16[1],iph->saddr.s6_addr16[2],iph->saddr.s6_addr16[3],
+						iph->saddr.s6_addr16[4],iph->saddr.s6_addr16[5],iph->saddr.s6_addr16[6],iph->saddr.s6_addr16[7],
+						iph->daddr.s6_addr16[0],iph->daddr.s6_addr16[1],iph->daddr.s6_addr16[2],iph->daddr.s6_addr16[3],
+						iph->daddr.s6_addr16[4],iph->daddr.s6_addr16[5],iph->daddr.s6_addr16[6],iph->daddr.s6_addr16[7]);
+
+					if (memcmp(&iph->saddr, "\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0", 16)) {
+						__nat25_generate_ipv6_network_addr(networkAddr, (unsigned int *)&iph->saddr);
+						__nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
+						__nat25_db_print(priv);
+
+						if (iph->nexthdr == IPPROTO_ICMPV6 && 
+								skb->len > (ETH_HLEN +  sizeof(*iph) + 4)) {
+							if (update_nd_link_layer_addr(skb->data + ETH_HLEN + sizeof(*iph), 
+                                                                skb->len - ETH_HLEN - sizeof(*iph), GET_MY_HWADDR(priv))) {                                                   
+								struct icmp6hdr  *hdr = (struct icmp6hdr *)(skb->data + ETH_HLEN + sizeof(*iph));
+								hdr->icmp6_cksum = 0;
+								hdr->icmp6_cksum = csum_ipv6_magic(&iph->saddr, &iph->daddr,
+												iph->payload_len,
+												IPPROTO_ICMPV6,
+												csum_partial((__u8 *)hdr, iph->payload_len, 0));
+							}
+						}						
+					}
+				}
+				return 0;
+
+			case NAT25_LOOKUP:
+				DEBUG_INFO("NAT25: Lookup IP, SA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x,"
+								" DA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x\n", 
+						iph->saddr.s6_addr16[0],iph->saddr.s6_addr16[1],iph->saddr.s6_addr16[2],iph->saddr.s6_addr16[3],
+						iph->saddr.s6_addr16[4],iph->saddr.s6_addr16[5],iph->saddr.s6_addr16[6],iph->saddr.s6_addr16[7],
+						iph->daddr.s6_addr16[0],iph->daddr.s6_addr16[1],iph->daddr.s6_addr16[2],iph->daddr.s6_addr16[3],
+						iph->daddr.s6_addr16[4],iph->daddr.s6_addr16[5],iph->daddr.s6_addr16[6],iph->daddr.s6_addr16[7]);
+			
+
+				__nat25_generate_ipv6_network_addr(networkAddr, (unsigned int *)&iph->daddr);
+				if (!__nat25_db_network_lookup_and_replace(priv, skb, networkAddr)) {
+#ifdef SUPPORT_RX_UNI2MCAST							
+					if (iph->daddr.s6_addr[0] == 0xff)
+						convert_ipv6_mac_to_mc(skb);	
+#endif											
+				}
+				return 0;
+
+			default:
+				return -1;
+		}
+	}
+#endif	// CL_IPV6_PASS
+
+	return -1;
+}
+
+
+int nat25_handle_frame(_adapter *priv, struct sk_buff *skb)
+{
+#ifdef BR_EXT_DEBUG
+	if((!priv->ethBrExtInfo.nat25_disable) && (!(skb->data[0] & 1)))
+	{
+		panic_printk("NAT25: Input Frame: DA=%02x%02x%02x%02x%02x%02x SA=%02x%02x%02x%02x%02x%02x\n",
+			skb->data[0],
+			skb->data[1],
+			skb->data[2],
+			skb->data[3],
+			skb->data[4],
+			skb->data[5],
+			skb->data[6],
+			skb->data[7],
+			skb->data[8],
+			skb->data[9],
+			skb->data[10],
+			skb->data[11]);
+	}
+#endif
+
+	if(!(skb->data[0] & 1))
+	{
+		int is_vlan_tag=0, i, retval=0;
+		unsigned short vlan_hdr=0;
+
+		if (*((unsigned short *)(skb->data+ETH_ALEN*2)) == __constant_htons(ETH_P_8021Q)) {
+			is_vlan_tag = 1;
+			vlan_hdr = *((unsigned short *)(skb->data+ETH_ALEN*2+2));
+			for (i=0; i<6; i++)
+				*((unsigned short *)(skb->data+ETH_ALEN*2+2-i*2)) = *((unsigned short *)(skb->data+ETH_ALEN*2-2-i*2));
+			skb_pull(skb, 4);
+		}
+
+		if (!priv->ethBrExtInfo.nat25_disable)
+		{
+			_irqL irqL;
+			_enter_critical_bh(&priv->br_ext_lock, &irqL);
+			/*
+			 *	This function look up the destination network address from
+			 *	the NAT2.5 database. Return value = -1 means that the
+			 *	corresponding network protocol is NOT support.
+			 */
+			if (!priv->ethBrExtInfo.nat25sc_disable &&
+				(*((unsigned short *)(skb->data+ETH_ALEN*2)) == __constant_htons(ETH_P_IP)) &&
+				!memcmp(priv->scdb_ip, skb->data+ETH_HLEN+16, 4)) {
+				memcpy(skb->data, priv->scdb_mac, ETH_ALEN);
+				
+				_exit_critical_bh(&priv->br_ext_lock, &irqL);
+			}
+			else {
+				_exit_critical_bh(&priv->br_ext_lock, &irqL);
+				
+				retval = nat25_db_handle(priv, skb, NAT25_LOOKUP);
+		}
+		}
+		else {
+			if (((*((unsigned short *)(skb->data+ETH_ALEN*2)) == __constant_htons(ETH_P_IP)) &&
+					!memcmp(priv->br_ip, skb->data+ETH_HLEN+16, 4)) ||
+				((*((unsigned short *)(skb->data+ETH_ALEN*2)) == __constant_htons(ETH_P_ARP)) &&
+					!memcmp(priv->br_ip, skb->data+ETH_HLEN+24, 4))) {
+				// for traffic to upper TCP/IP
+				retval = nat25_db_handle(priv, skb, NAT25_LOOKUP);
+			}
+		}
+
+		if (is_vlan_tag) {
+			skb_push(skb, 4);
+			for (i=0; i<6; i++)
+				*((unsigned short *)(skb->data+i*2)) = *((unsigned short *)(skb->data+4+i*2));
+			*((unsigned short *)(skb->data+ETH_ALEN*2)) = __constant_htons(ETH_P_8021Q);
+			*((unsigned short *)(skb->data+ETH_ALEN*2+2)) = vlan_hdr;
+		}
+
+		if(retval == -1) {
+			//DEBUG_ERR("NAT25: Lookup fail!\n");
+			return -1;
+		}
+	}
+
+	return 0;
+}
+
+#if 0
+void mac_clone(_adapter *priv, unsigned char *addr)
+{
+	struct sockaddr sa;
+
+	memcpy(sa.sa_data, addr, ETH_ALEN);
+	DEBUG_INFO("MAC Clone: Addr=%02x%02x%02x%02x%02x%02x\n",
+		addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]);
+	rtl8192cd_set_hwaddr(priv->dev, &sa);
+}
+
+
+int mac_clone_handle_frame(_adapter *priv, struct sk_buff *skb)
+{
+	if(priv->ethBrExtInfo.macclone_enable && !priv->macclone_completed)
+	{
+		if(!(skb->data[ETH_ALEN] & 1))	//// check any other particular MAC add
+		{
+                        if(memcmp(skb->data+ETH_ALEN, GET_MY_HWADDR(priv), ETH_ALEN) &&
+				((priv->dev->br_port) &&
+				 memcmp(skb->data+ETH_ALEN, priv->br_mac, ETH_ALEN)))
+			{
+				mac_clone(priv, skb->data+ETH_ALEN);
+				priv->macclone_completed = 1;
+			}
+		}
+	}
+
+	return 0;
+}
+#endif // 0
+
+#define SERVER_PORT			67
+#define CLIENT_PORT			68
+#define DHCP_MAGIC			0x63825363
+#define BROADCAST_FLAG		0x8000
+
+struct dhcpMessage {
+	u_int8_t op;
+	u_int8_t htype;
+	u_int8_t hlen;
+	u_int8_t hops;
+	u_int32_t xid;
+	u_int16_t secs;
+	u_int16_t flags;
+	u_int32_t ciaddr;
+	u_int32_t yiaddr;
+	u_int32_t siaddr;
+	u_int32_t giaddr;
+	u_int8_t chaddr[16];
+	u_int8_t sname[64];
+	u_int8_t file[128];
+	u_int32_t cookie;
+	u_int8_t options[308]; /* 312 - cookie */
+};
+
+void dhcp_flag_bcast(_adapter *priv, struct sk_buff *skb)
+{
+	if(skb == NULL)
+		return;
+
+	if(!priv->ethBrExtInfo.dhcp_bcst_disable)
+	{
+		unsigned short protocol = *((unsigned short *)(skb->data + 2 * ETH_ALEN));
+
+		if(protocol == __constant_htons(ETH_P_IP)) // IP
+		{
+			struct iphdr* iph = (struct iphdr *)(skb->data + ETH_HLEN);
+
+			if(iph->protocol == IPPROTO_UDP) // UDP
+			{
+				struct udphdr *udph = (struct udphdr *)((unsigned int)iph + (iph->ihl << 2));
+
+				if((udph->source == __constant_htons(CLIENT_PORT))
+					&& (udph->dest == __constant_htons(SERVER_PORT))) // DHCP request
+				{
+					struct dhcpMessage *dhcph =
+						(struct dhcpMessage *)((unsigned int)udph + sizeof(struct udphdr));
+
+					if(dhcph->cookie == __constant_htonl(DHCP_MAGIC)) // match magic word
+					{
+						if(!(dhcph->flags & htons(BROADCAST_FLAG))) // if not broadcast
+						{
+							register int sum = 0;
+
+							DEBUG_INFO("DHCP: change flag of DHCP request to broadcast.\n");
+							// or BROADCAST flag
+							dhcph->flags |= htons(BROADCAST_FLAG);
+							// recalculate checksum
+							sum = ~(udph->check) & 0xffff;
+							sum += dhcph->flags;
+							while(sum >> 16)
+								sum = (sum & 0xffff) + (sum >> 16);
+							udph->check = ~sum;
+						}
+					}
+				}
+			}
+		}
+	}
+}
+
+
+void *scdb_findEntry(_adapter *priv, unsigned char *macAddr,
+				unsigned char *ipAddr)
+{
+	unsigned char networkAddr[MAX_NETWORK_ADDR_LEN];
+	struct nat25_network_db_entry *db;
+	int hash;
+	//_irqL irqL;
+	//_enter_critical_bh(&priv->br_ext_lock, &irqL);
+
+	__nat25_generate_ipv4_network_addr(networkAddr, (unsigned int *)ipAddr);
+	hash = __nat25_network_hash(networkAddr);
+	db = priv->nethash[hash];
+	while (db != NULL)
+	{
+		if(!memcmp(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN)) {
+			//_exit_critical_bh(&priv->br_ext_lock, &irqL);
+			return (void *)db;
+		}
+
+		db = db->next_hash;
+	}
+
+	//_exit_critical_bh(&priv->br_ext_lock, &irqL);
+	return NULL;
+}
+
+#endif	// CONFIG_BR_EXT
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_cmd.c linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_cmd.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_cmd.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_cmd.c	2017-09-23 03:42:49.874675505 +0800
@@ -0,0 +1,2486 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+******************************************************************************/
+#define _RTW_CMD_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <recv_osdep.h>
+#include <cmd_osdep.h>
+#include <mlme_osdep.h>
+#include <rtw_byteorder.h>
+#ifdef CONFIG_BR_EXT
+#include <rtw_br_ext.h>
+#endif //CONFIG_BR_EXT
+/*
+Caller and the rtw_cmd_thread can protect cmd_q by spin_lock.
+No irqsave is necessary.
+*/
+
+sint	_rtw_init_cmd_priv (struct	cmd_priv *pcmdpriv)
+{
+	sint res=_SUCCESS;
+	
+_func_enter_;	
+
+	_rtw_init_sema(&(pcmdpriv->cmd_queue_sema), 0);
+	//_rtw_init_sema(&(pcmdpriv->cmd_done_sema), 0);
+	_rtw_init_sema(&(pcmdpriv->terminate_cmdthread_sema), 0);
+	
+	
+	_rtw_init_queue(&(pcmdpriv->cmd_queue));
+	
+	//allocate DMA-able/Non-Page memory for cmd_buf and rsp_buf
+	
+	pcmdpriv->cmd_seq = 1;
+	
+	pcmdpriv->cmd_allocated_buf = rtw_zmalloc(MAX_CMDSZ + CMDBUFF_ALIGN_SZ);
+	
+	if (pcmdpriv->cmd_allocated_buf == NULL){
+		res= _FAIL;
+		goto exit;
+	}
+	
+	//pcmdpriv->cmd_buf = pcmdpriv->cmd_allocated_buf  +  CMDBUFF_ALIGN_SZ - ( (SIZE_PTR)(pcmdpriv->cmd_allocated_buf) & (CMDBUFF_ALIGN_SZ-1));
+	pcmdpriv->cmd_buf =  (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pcmdpriv->cmd_allocated_buf ), CMDBUFF_ALIGN_SZ);		
+		 
+	pcmdpriv->rsp_allocated_buf = rtw_zmalloc(MAX_RSPSZ + 4);
+	
+	if (pcmdpriv->rsp_allocated_buf == NULL){
+		res= _FAIL;
+		goto exit;
+	}
+	
+	//pcmdpriv->rsp_buf = pcmdpriv->rsp_allocated_buf  +  4 - ( (SIZE_PTR)(pcmdpriv->rsp_allocated_buf) & 3);
+	pcmdpriv->rsp_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pcmdpriv->rsp_allocated_buf ), 4);
+	
+	pcmdpriv->cmd_issued_cnt = pcmdpriv->cmd_done_cnt = pcmdpriv->rsp_cnt = 0;
+
+exit:
+	
+_func_exit_;	  
+
+	return res;
+	
+}	
+
+
+sint _rtw_init_evt_priv(struct evt_priv *pevtpriv)
+{
+	sint res=_SUCCESS;
+
+_func_enter_;	
+
+#ifdef CONFIG_H2CLBK
+	_rtw_init_sema(&(pevtpriv->lbkevt_done), 0);
+	pevtpriv->lbkevt_limit = 0;
+	pevtpriv->lbkevt_num = 0;
+	pevtpriv->cmdevt_parm = NULL;		
+#endif		
+	
+	//allocate DMA-able/Non-Page memory for cmd_buf and rsp_buf
+	ATOMIC_SET(&pevtpriv->event_seq, 0);
+	pevtpriv->evt_done_cnt = 0;
+
+#ifdef CONFIG_EVENT_THREAD_MODE
+
+	_rtw_init_sema(&(pevtpriv->evt_notify), 0);
+	_rtw_init_sema(&(pevtpriv->terminate_evtthread_sema), 0);
+
+	pevtpriv->evt_allocated_buf = rtw_zmalloc(MAX_EVTSZ + 4);	
+	if (pevtpriv->evt_allocated_buf == NULL){
+		res= _FAIL;
+		goto exit;
+		}
+	//pevtpriv->evt_buf = pevtpriv->evt_allocated_buf  +  4 - ((unsigned int)(pevtpriv->evt_allocated_buf) & 3);
+	pevtpriv->evt_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pevtpriv->evt_allocated_buf ), 4);		
+	
+		
+#ifdef CONFIG_SDIO_HCI
+	pevtpriv->allocated_c2h_mem = rtw_zmalloc(C2H_MEM_SZ +4); 
+	
+	if (pevtpriv->allocated_c2h_mem == NULL){
+		res= _FAIL;
+		goto exit;
+	}
+
+	//pevtpriv->c2h_mem = pevtpriv->allocated_c2h_mem +  4
+	//- ( (u32)(pevtpriv->allocated_c2h_mem) & 3);
+	pevtpriv->c2h_mem = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pevtpriv->allocated_c2h_mem ), 4);	
+	
+#ifdef PLATFORM_OS_XP
+	pevtpriv->pc2h_mdl= IoAllocateMdl((u8 *)pevtpriv->c2h_mem, C2H_MEM_SZ , FALSE, FALSE, NULL);
+	
+	if(pevtpriv->pc2h_mdl == NULL){
+		res= _FAIL;
+		goto exit;
+	}
+	MmBuildMdlForNonPagedPool(pevtpriv->pc2h_mdl);
+#endif
+#endif //end of CONFIG_SDIO_HCI
+
+	_rtw_init_queue(&(pevtpriv->evt_queue));
+
+exit:	
+
+#endif //end of CONFIG_EVENT_THREAD_MODE
+
+_func_exit_;		 
+
+	return res;
+}
+
+void _rtw_free_evt_priv (struct	evt_priv *pevtpriv)
+{
+_func_enter_;
+
+	RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("+_rtw_free_evt_priv \n"));
+
+#ifdef CONFIG_EVENT_THREAD_MODE
+	_rtw_free_sema(&(pevtpriv->evt_notify));
+	_rtw_free_sema(&(pevtpriv->terminate_evtthread_sema));
+
+
+	if (pevtpriv->evt_allocated_buf)
+		rtw_mfree(pevtpriv->evt_allocated_buf, MAX_EVTSZ + 4);
+#endif
+
+	RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("-_rtw_free_evt_priv \n"));
+
+_func_exit_;	  	
+
+}
+
+void _rtw_free_cmd_priv (struct	cmd_priv *pcmdpriv)
+{
+_func_enter_;
+
+	if(pcmdpriv){
+		_rtw_spinlock_free(&(pcmdpriv->cmd_queue.lock));
+		_rtw_free_sema(&(pcmdpriv->cmd_queue_sema));
+		//_rtw_free_sema(&(pcmdpriv->cmd_done_sema));
+		_rtw_free_sema(&(pcmdpriv->terminate_cmdthread_sema));
+
+		if (pcmdpriv->cmd_allocated_buf)
+			rtw_mfree(pcmdpriv->cmd_allocated_buf, MAX_CMDSZ + CMDBUFF_ALIGN_SZ);
+		
+		if (pcmdpriv->rsp_allocated_buf)
+			rtw_mfree(pcmdpriv->rsp_allocated_buf, MAX_RSPSZ + 4);
+	}
+_func_exit_;		
+}
+
+/*
+Calling Context:
+
+rtw_enqueue_cmd can only be called between kernel thread, 
+since only spin_lock is used.
+
+ISR/Call-Back functions can't call this sub-function.
+
+*/
+
+sint	_rtw_enqueue_cmd(_queue *queue, struct cmd_obj *obj)
+{
+	_irqL irqL;
+
+_func_enter_;
+
+	if (obj == NULL)
+		goto exit;
+
+	//_enter_critical_bh(&queue->lock, &irqL);
+	_enter_critical(&queue->lock, &irqL);	
+
+	rtw_list_insert_tail(&obj->list, &queue->queue);
+
+	//_exit_critical_bh(&queue->lock, &irqL);	
+	_exit_critical(&queue->lock, &irqL);
+
+exit:	
+
+_func_exit_;
+
+	return _SUCCESS;
+}
+
+struct	cmd_obj	*_rtw_dequeue_cmd(_queue *queue)
+{
+	_irqL irqL;
+	struct cmd_obj *obj;
+
+_func_enter_;
+
+	//_enter_critical_bh(&(queue->lock), &irqL);
+	_enter_critical(&(queue->lock), &irqL);
+
+	if (rtw_is_list_empty(&(queue->queue)))
+		obj = NULL;
+	else
+	{
+		obj = LIST_CONTAINOR(get_next(&(queue->queue)), struct cmd_obj, list);
+		rtw_list_delete(&obj->list);
+	}
+
+	//_exit_critical_bh(&(queue->lock), &irqL);
+	_exit_critical(&(queue->lock), &irqL);
+
+_func_exit_;	
+
+	return obj;
+}
+
+u32	rtw_init_cmd_priv(struct cmd_priv *pcmdpriv)
+{
+	u32	res;
+_func_enter_;	
+	res = _rtw_init_cmd_priv (pcmdpriv);
+_func_exit_;	
+	return res;	
+}
+
+u32	rtw_init_evt_priv (struct	evt_priv *pevtpriv)
+{
+	int	res;
+_func_enter_;		
+	res = _rtw_init_evt_priv(pevtpriv);
+_func_exit_;		
+	return res;
+}
+
+void rtw_free_evt_priv (struct	evt_priv *pevtpriv)
+{
+_func_enter_;
+	RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("rtw_free_evt_priv\n"));
+	_rtw_free_evt_priv(pevtpriv);
+_func_exit_;		
+}	
+
+void rtw_free_cmd_priv (struct	cmd_priv *pcmdpriv)
+{
+_func_enter_;
+	RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("rtw_free_cmd_priv\n"));
+	_rtw_free_cmd_priv(pcmdpriv);
+_func_exit_;	
+}	
+
+int rtw_cmd_filter(struct cmd_priv *pcmdpriv, struct cmd_obj *cmd_obj)
+{
+	u8 bAllow = _FALSE; //set to _TRUE to allow enqueuing cmd when hw_init_completed is _FALSE
+	
+	#ifdef SUPPORT_HW_RFOFF_DETECTED
+	//To decide allow or not
+	if(	(pcmdpriv->padapter->pwrctrlpriv.bHWPwrPindetect)
+		&&(!pcmdpriv->padapter->registrypriv.usbss_enable)
+	)		
+	{
+		if(cmd_obj->cmdcode == GEN_CMD_CODE(_Set_Drv_Extra) ) 
+	{
+			struct drvextra_cmd_parm	*pdrvextra_cmd_parm = (struct drvextra_cmd_parm	*)cmd_obj->parmbuf;	
+			if(pdrvextra_cmd_parm->ec_id == POWER_SAVING_CTRL_WK_CID)
+			{	
+				//DBG_8192C("==>enqueue POWER_SAVING_CTRL_WK_CID\n");
+				bAllow = _TRUE;	
+			}
+		}
+	}
+#endif
+
+	if(cmd_obj->cmdcode == GEN_CMD_CODE(_SetChannelPlan))
+		bAllow = _TRUE;
+
+	if( (pcmdpriv->padapter->hw_init_completed ==_FALSE && bAllow == _FALSE)
+		|| pcmdpriv->cmdthd_running== _FALSE //com_thread not running
+	)		
+	{
+		//DBG_871X("%s:%s: drop cmdcode:%u, hw_init_completed:%u, cmdthd_running:%u\n", caller_func, __FUNCTION__,
+		//	cmd_obj->cmdcode,
+		//	pcmdpriv->padapter->hw_init_completed,
+		//	pcmdpriv->cmdthd_running
+		//);
+
+		return _FAIL;
+	}	
+	return _SUCCESS;
+}
+
+
+
+u32 rtw_enqueue_cmd(struct cmd_priv *pcmdpriv, struct cmd_obj *cmd_obj)
+{
+	int res = _FAIL;
+	
+_func_enter_;	
+	
+	if (cmd_obj == NULL) {
+		goto exit;
+	}
+
+	if( _FAIL == (res=rtw_cmd_filter(pcmdpriv, cmd_obj)) ) {
+		rtw_free_cmd_obj(cmd_obj);
+		goto exit;
+	}
+
+	res = _rtw_enqueue_cmd(&pcmdpriv->cmd_queue, cmd_obj);
+
+	if(res == _SUCCESS)
+		_rtw_up_sema(&pcmdpriv->cmd_queue_sema);
+	
+exit:	
+	
+_func_exit_;
+
+	return res;
+}
+
+struct	cmd_obj	*rtw_dequeue_cmd(struct cmd_priv *pcmdpriv)
+{
+	struct cmd_obj *cmd_obj;
+	
+_func_enter_;		
+
+	cmd_obj = _rtw_dequeue_cmd(&pcmdpriv->cmd_queue);
+		
+_func_exit_;			
+	return cmd_obj;
+}
+
+void rtw_cmd_clr_isr(struct	cmd_priv *pcmdpriv)
+{
+_func_enter_;
+	pcmdpriv->cmd_done_cnt++;
+	//_rtw_up_sema(&(pcmdpriv->cmd_done_sema));
+_func_exit_;		
+}
+
+void rtw_free_cmd_obj(struct cmd_obj *pcmd)
+{
+_func_enter_;
+
+	if((pcmd->cmdcode!=_JoinBss_CMD_) &&(pcmd->cmdcode!= _CreateBss_CMD_))
+	{
+		//free parmbuf in cmd_obj
+		rtw_mfree((unsigned char*)pcmd->parmbuf, pcmd->cmdsz);
+	}	
+	
+	if(pcmd->rsp!=NULL)
+	{
+		if(pcmd->rspsz!= 0)
+		{
+			//free rsp in cmd_obj
+			rtw_mfree((unsigned char*)pcmd->rsp, pcmd->rspsz);
+		}	
+	}	
+
+	//free cmd_obj
+	rtw_mfree((unsigned char*)pcmd, sizeof(struct cmd_obj));
+	
+_func_exit_;		
+}
+
+
+thread_return rtw_cmd_thread(thread_context context)
+{
+	u8 ret;
+	struct cmd_obj *pcmd;
+	u8 *pcmdbuf, *prspbuf;
+	u8 (*cmd_hdl)(_adapter *padapter, u8* pbuf);
+	void (*pcmd_callback)(_adapter *dev, struct cmd_obj *pcmd);
+       _adapter *padapter = (_adapter *)context;
+	struct cmd_priv *pcmdpriv = &(padapter->cmdpriv);
+	
+_func_enter_;
+
+	thread_enter(padapter);
+
+	pcmdbuf = pcmdpriv->cmd_buf;
+	prspbuf = pcmdpriv->rsp_buf;
+
+	pcmdpriv->cmdthd_running=_TRUE;
+	_rtw_up_sema(&pcmdpriv->terminate_cmdthread_sema);
+	
+	RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("start r871x rtw_cmd_thread !!!!\n"));
+
+	while(1)
+	{
+		if ((_rtw_down_sema(&(pcmdpriv->cmd_queue_sema))) == _FAIL)
+			break;
+
+		if (rtw_register_cmd_alive(padapter) != _SUCCESS)
+		{
+			continue;
+		}
+
+_next:
+		if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE))
+		{
+			DBG_8192C("###> rtw_cmd_thread break.................\n");
+			RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_, ("rtw_cmd_thread:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved));		
+			break;
+		}
+
+		if(!(pcmd = rtw_dequeue_cmd(pcmdpriv))) {
+			rtw_unregister_cmd_alive(padapter);
+			continue;
+		}
+
+		if( _FAIL == rtw_cmd_filter(pcmdpriv, pcmd) ) {
+			rtw_free_cmd_obj(pcmd);
+			continue;
+		}
+
+		pcmdpriv->cmd_issued_cnt++;
+
+		pcmd->cmdsz = _RND4((pcmd->cmdsz));//_RND4
+
+		_rtw_memcpy(pcmdbuf, pcmd->parmbuf, pcmd->cmdsz);
+
+		if(pcmd->cmdcode <= (sizeof(wlancmds) /sizeof(struct cmd_hdl)))
+		{
+			cmd_hdl = wlancmds[pcmd->cmdcode].h2cfuns;
+
+			if (cmd_hdl)
+			{
+				ret = cmd_hdl(padapter, pcmdbuf);
+				pcmd->res = ret;
+			}
+
+			//invoke cmd->callback function		
+			pcmd_callback = rtw_cmd_callback[pcmd->cmdcode].callback;
+			if(pcmd_callback == NULL)
+			{
+				RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("mlme_cmd_hdl(): pcmd_callback=0x%p, cmdcode=0x%x\n", pcmd_callback, pcmd->cmdcode));
+				rtw_free_cmd_obj(pcmd);
+			}
+			else
+			{
+				//todo: !!! fill rsp_buf to pcmd->rsp if (pcmd->rsp!=NULL)
+
+				pcmd_callback(padapter, pcmd);//need conider that free cmd_obj in rtw_cmd_callback
+			}
+
+			pcmdpriv->cmd_seq++;
+		}
+
+		cmd_hdl = NULL;
+
+		flush_signals_thread();
+
+		goto _next;
+
+	}
+	pcmdpriv->cmdthd_running=_FALSE;
+
+
+	// free all cmd_obj resources
+	do{
+		pcmd = rtw_dequeue_cmd(pcmdpriv);
+		if(pcmd==NULL)
+			break;
+
+		//DBG_871X("%s: leaving... drop cmdcode:%u\n", __FUNCTION__, pcmd->cmdcode);
+
+		rtw_free_cmd_obj(pcmd);	
+	}while(1);
+
+	_rtw_up_sema(&pcmdpriv->terminate_cmdthread_sema);
+
+_func_exit_;
+
+	thread_exit();
+
+}
+
+
+#ifdef CONFIG_EVENT_THREAD_MODE
+u32 rtw_enqueue_evt(struct evt_priv *pevtpriv, struct evt_obj *obj)
+{
+	_irqL irqL;
+	int	res;
+	_queue *queue = &pevtpriv->evt_queue;
+	
+_func_enter_;	
+
+	res = _SUCCESS; 		
+
+	if (obj == NULL) {
+		res = _FAIL;
+		goto exit;
+	}	
+
+	_enter_critical_bh(&queue->lock, &irqL);
+
+	rtw_list_insert_tail(&obj->list, &queue->queue);
+	
+	_exit_critical_bh(&queue->lock, &irqL);
+
+	//rtw_evt_notify_isr(pevtpriv);
+
+exit:
+	
+_func_exit_;		
+
+	return res;	
+}
+
+struct evt_obj *rtw_dequeue_evt(_queue *queue)
+{
+	_irqL irqL;
+	struct	evt_obj	*pevtobj;
+	
+_func_enter_;		
+
+	_enter_critical_bh(&queue->lock, &irqL);
+
+	if (rtw_is_list_empty(&(queue->queue)))
+		pevtobj = NULL;
+	else
+	{
+		pevtobj = LIST_CONTAINOR(get_next(&(queue->queue)), struct evt_obj, list);
+		rtw_list_delete(&pevtobj->list);
+	}
+
+	_exit_critical_bh(&queue->lock, &irqL);
+	
+_func_exit_;			
+
+	return pevtobj;	
+}
+
+void rtw_free_evt_obj(struct evt_obj *pevtobj)
+{
+_func_enter_;
+
+	if(pevtobj->parmbuf)
+		rtw_mfree((unsigned char*)pevtobj->parmbuf, pevtobj->evtsz);
+	
+	rtw_mfree((unsigned char*)pevtobj, sizeof(struct evt_obj));
+	
+_func_exit_;		
+}
+
+void rtw_evt_notify_isr(struct evt_priv *pevtpriv)
+{
+_func_enter_;
+	pevtpriv->evt_done_cnt++;
+	_rtw_up_sema(&(pevtpriv->evt_notify));
+_func_exit_;	
+}
+#endif
+
+
+/*
+u8 rtw_setstandby_cmd(unsigned char  *adapter) 
+*/
+u8 rtw_setstandby_cmd(_adapter *padapter, uint action)
+{
+	struct cmd_obj*			ph2c;
+	struct usb_suspend_parm*	psetusbsuspend;
+	struct cmd_priv 			*pcmdpriv=&padapter->cmdpriv;
+
+	u8 ret = _SUCCESS;
+	
+_func_enter_;	
+
+	ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));
+	if (ph2c == NULL) {
+		ret = _FAIL;
+		goto exit;
+	}
+	
+	psetusbsuspend = (struct usb_suspend_parm*)rtw_zmalloc(sizeof(struct usb_suspend_parm)); 
+	if (psetusbsuspend == NULL) {
+		rtw_mfree((u8 *) ph2c, sizeof(struct	cmd_obj));
+		ret = _FAIL;
+		goto exit;
+	}
+
+	psetusbsuspend->action = action;
+
+	init_h2fwcmd_w_parm_no_rsp(ph2c, psetusbsuspend, GEN_CMD_CODE(_SetUsbSuspend));
+
+	ret = rtw_enqueue_cmd(pcmdpriv, ph2c);	
+	
+exit:	
+	
+_func_exit_;		
+
+	return ret;
+}
+
+/*
+rtw_sitesurvey_cmd(~)
+	### NOTE:#### (!!!!)
+	MUST TAKE CARE THAT BEFORE CALLING THIS FUNC, YOU SHOULD HAVE LOCKED pmlmepriv->lock
+*/
+u8 rtw_sitesurvey_cmd(_adapter  *padapter, NDIS_802_11_SSID *pssid, int ssid_max_num)
+{
+	u8 res = _FAIL;
+	struct cmd_obj		*ph2c;
+	struct sitesurvey_parm	*psurveyPara;
+	struct cmd_priv 	*pcmdpriv = &padapter->cmdpriv;
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+#ifdef CONFIG_P2P
+	struct wifidirect_info *pwdinfo= &(padapter->wdinfo);
+#endif //CONFIG_P2P
+
+_func_enter_;	
+	
+#ifdef CONFIG_LPS
+	if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE){
+		rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_SCAN, 1);
+	}
+#endif
+
+#ifdef CONFIG_P2P
+	p2p_ps_wk_cmd(padapter, P2P_PS_SCAN, 1);
+#endif //CONFIG_P2P
+
+	ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));
+	if (ph2c == NULL)
+		return _FAIL;
+
+	psurveyPara = (struct sitesurvey_parm*)rtw_zmalloc(sizeof(struct sitesurvey_parm)); 
+	if (psurveyPara == NULL) {
+		rtw_mfree((unsigned char*) ph2c, sizeof(struct cmd_obj));
+		return _FAIL;
+	}
+
+	rtw_free_network_queue(padapter, _FALSE);
+
+	RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_, ("\nflush  network queue\n\n"));
+
+	init_h2fwcmd_w_parm_no_rsp(ph2c, psurveyPara, GEN_CMD_CODE(_SiteSurvey));
+
+	psurveyPara->bsslimit = cpu_to_le32(48);
+	psurveyPara->scan_mode = cpu_to_le32(pmlmepriv->scan_mode);
+
+	_rtw_memset(psurveyPara->ssid, 0, sizeof(NDIS_802_11_SSID)*RTW_SSID_SCAN_AMOUNT);
+
+	if(pssid){
+		int i;
+		for(i=0; i<ssid_max_num && i< RTW_SSID_SCAN_AMOUNT; i++){
+			if(pssid[i].SsidLength){
+				_rtw_memcpy(&psurveyPara->ssid[i], &pssid[i], sizeof(NDIS_802_11_SSID));
+				//DBG_871X("%s scan for specific ssid: %s, %d\n", __FUNCTION__
+				//	, psurveyPara->ssid[i].Ssid, psurveyPara->ssid[i].SsidLength);
+			}
+		}
+	}
+
+	set_fwstate(pmlmepriv, _FW_UNDER_SURVEY);
+
+	res = rtw_enqueue_cmd(pcmdpriv, ph2c);
+
+	if(res == _SUCCESS) {
+
+		pmlmepriv->scan_start_time = rtw_get_current_time();
+
+		_set_timer(&pmlmepriv->scan_to_timer, SCANNING_TIMEOUT);
+
+		rtw_led_control(padapter, LED_CTL_SITE_SURVEY);
+
+		pmlmepriv->scan_interval = SCAN_INTERVAL;// 30*2 sec = 60sec
+	} else {
+		_clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY);
+	}
+
+_func_exit_;		
+
+	return res;
+}
+
+u8 rtw_setdatarate_cmd(_adapter *padapter, u8 *rateset)
+{
+	struct cmd_obj*			ph2c;
+	struct setdatarate_parm*	pbsetdataratepara;
+	struct cmd_priv*		pcmdpriv = &padapter->cmdpriv;
+	u8	res = _SUCCESS;
+
+_func_enter_;	
+
+	ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));
+	if (ph2c == NULL) {
+		res = _FAIL;
+		goto exit;
+	}
+
+	pbsetdataratepara = (struct setdatarate_parm*)rtw_zmalloc(sizeof(struct setdatarate_parm)); 
+	if (pbsetdataratepara == NULL) {
+		rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj));
+		res = _FAIL;
+		goto exit;
+	}
+
+	init_h2fwcmd_w_parm_no_rsp(ph2c, pbsetdataratepara, GEN_CMD_CODE(_SetDataRate));
+#ifdef MP_FIRMWARE_OFFLOAD
+	pbsetdataratepara->curr_rateidx = *(u32*)rateset;
+//	_rtw_memcpy(pbsetdataratepara, rateset, sizeof(u32));
+#else
+	pbsetdataratepara->mac_id = 5;
+	_rtw_memcpy(pbsetdataratepara->datarates, rateset, NumRates);
+#endif
+	res = rtw_enqueue_cmd(pcmdpriv, ph2c);
+exit:
+
+_func_exit_;
+
+	return res;
+}
+
+u8 rtw_setbasicrate_cmd(_adapter *padapter, u8 *rateset)
+{
+	struct cmd_obj*			ph2c;
+	struct setbasicrate_parm*	pssetbasicratepara;
+	struct cmd_priv*		pcmdpriv=&padapter->cmdpriv;
+	u8	res = _SUCCESS;
+
+_func_enter_;
+
+	ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));
+	if (ph2c == NULL) {
+		res= _FAIL;
+		goto exit;
+	}
+	pssetbasicratepara = (struct setbasicrate_parm*)rtw_zmalloc(sizeof(struct setbasicrate_parm)); 
+
+	if (pssetbasicratepara == NULL) {
+		rtw_mfree((u8*) ph2c, sizeof(struct cmd_obj));
+		res = _FAIL;
+		goto exit;
+	}
+
+	init_h2fwcmd_w_parm_no_rsp(ph2c, pssetbasicratepara, _SetBasicRate_CMD_);
+
+	_rtw_memcpy(pssetbasicratepara->basicrates, rateset, NumRates);	   
+
+	res = rtw_enqueue_cmd(pcmdpriv, ph2c);	
+exit:	
+
+_func_exit_;		
+
+	return res;
+}
+
+
+/*
+unsigned char rtw_setphy_cmd(unsigned char  *adapter) 
+
+1.  be called only after rtw_update_registrypriv_dev_network( ~) or mp testing program
+2.  for AdHoc/Ap mode or mp mode?
+
+*/
+u8 rtw_setphy_cmd(_adapter *padapter, u8 modem, u8 ch)
+{
+	struct cmd_obj*			ph2c;
+	struct setphy_parm*		psetphypara;
+	struct cmd_priv 			*pcmdpriv=&padapter->cmdpriv;
+//	struct mlme_priv			*pmlmepriv = &padapter->mlmepriv;
+//	struct registry_priv*		pregistry_priv = &padapter->registrypriv;
+	u8	res=_SUCCESS;
+
+_func_enter_;	
+
+	ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));
+	if(ph2c==NULL){
+		res= _FAIL;
+		goto exit;
+		}
+	psetphypara = (struct setphy_parm*)rtw_zmalloc(sizeof(struct setphy_parm)); 
+
+	if(psetphypara==NULL){
+		rtw_mfree((u8 *) ph2c, sizeof(struct	cmd_obj));
+		res= _FAIL;
+		goto exit;
+	}
+
+	init_h2fwcmd_w_parm_no_rsp(ph2c, psetphypara, _SetPhy_CMD_);
+
+	RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("CH=%d, modem=%d", ch, modem));
+
+	psetphypara->modem = modem;
+	psetphypara->rfchannel = ch;
+
+	res = rtw_enqueue_cmd(pcmdpriv, ph2c);	
+exit:	
+_func_exit_;		
+	return res;
+}
+
+u8 rtw_setbbreg_cmd(_adapter*padapter, u8 offset, u8 val)
+{	
+	struct cmd_obj*			ph2c;
+	struct writeBB_parm*		pwritebbparm;
+	struct cmd_priv 			*pcmdpriv=&padapter->cmdpriv;	
+	u8	res=_SUCCESS;
+_func_enter_;
+	ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));
+	if(ph2c==NULL){
+		res= _FAIL;
+		goto exit;
+		}
+	pwritebbparm = (struct writeBB_parm*)rtw_zmalloc(sizeof(struct writeBB_parm)); 
+
+	if(pwritebbparm==NULL){
+		rtw_mfree((u8 *) ph2c, sizeof(struct	cmd_obj));
+		res= _FAIL;
+		goto exit;
+	}
+
+	init_h2fwcmd_w_parm_no_rsp(ph2c, pwritebbparm, GEN_CMD_CODE(_SetBBReg));	
+
+	pwritebbparm->offset = offset;
+	pwritebbparm->value = val;
+
+	res = rtw_enqueue_cmd(pcmdpriv, ph2c);	
+exit:	
+_func_exit_;	
+	return res;
+}
+
+u8 rtw_getbbreg_cmd(_adapter  *padapter, u8 offset, u8 *pval)
+{	
+	struct cmd_obj*			ph2c;
+	struct readBB_parm*		prdbbparm;
+	struct cmd_priv 			*pcmdpriv=&padapter->cmdpriv;
+	u8	res=_SUCCESS;
+	
+_func_enter_;
+	ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));
+	if(ph2c==NULL){
+		res=_FAIL;
+		goto exit;
+		}
+	prdbbparm = (struct readBB_parm*)rtw_zmalloc(sizeof(struct readBB_parm)); 
+
+	if(prdbbparm ==NULL){
+		rtw_mfree((unsigned char *) ph2c, sizeof(struct	cmd_obj));
+		return _FAIL;
+	}
+
+	_rtw_init_listhead(&ph2c->list);
+	ph2c->cmdcode =GEN_CMD_CODE(_GetBBReg);
+	ph2c->parmbuf = (unsigned char *)prdbbparm;
+	ph2c->cmdsz =  sizeof(struct readBB_parm);
+	ph2c->rsp = pval;
+	ph2c->rspsz = sizeof(struct readBB_rsp);
+	
+	prdbbparm ->offset = offset;
+	
+	res = rtw_enqueue_cmd(pcmdpriv, ph2c);	
+exit:
+_func_exit_;	
+	return res;
+}
+
+u8 rtw_setrfreg_cmd(_adapter  *padapter, u8 offset, u32 val)
+{	
+	struct cmd_obj*			ph2c;
+	struct writeRF_parm*		pwriterfparm;
+	struct cmd_priv 			*pcmdpriv=&padapter->cmdpriv;	
+	u8	res=_SUCCESS;
+_func_enter_;
+	ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));
+	if(ph2c==NULL){
+		res= _FAIL;	
+		goto exit;
+	}
+	pwriterfparm = (struct writeRF_parm*)rtw_zmalloc(sizeof(struct writeRF_parm)); 
+
+	if(pwriterfparm==NULL){
+		rtw_mfree((u8 *) ph2c, sizeof(struct	cmd_obj));
+		res= _FAIL;
+		goto exit;
+	}
+
+	init_h2fwcmd_w_parm_no_rsp(ph2c, pwriterfparm, GEN_CMD_CODE(_SetRFReg));	
+
+	pwriterfparm->offset = offset;
+	pwriterfparm->value = val;
+
+	res = rtw_enqueue_cmd(pcmdpriv, ph2c);	
+exit:
+_func_exit_;	
+	return res;
+}
+
+u8 rtw_getrfreg_cmd(_adapter  *padapter, u8 offset, u8 *pval)
+{	
+	struct cmd_obj*			ph2c;
+	struct readRF_parm*		prdrfparm;
+	struct cmd_priv 			*pcmdpriv=&padapter->cmdpriv;	
+	u8	res=_SUCCESS;
+
+_func_enter_;
+
+	ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));
+	if(ph2c==NULL){
+		res= _FAIL;
+		goto exit;
+	}
+
+	prdrfparm = (struct readRF_parm*)rtw_zmalloc(sizeof(struct readRF_parm)); 
+	if(prdrfparm ==NULL){
+		rtw_mfree((u8 *) ph2c, sizeof(struct	cmd_obj));
+		res= _FAIL;
+		goto exit;
+	}
+
+	_rtw_init_listhead(&ph2c->list);
+	ph2c->cmdcode =GEN_CMD_CODE(_GetRFReg);
+	ph2c->parmbuf = (unsigned char *)prdrfparm;
+	ph2c->cmdsz =  sizeof(struct readRF_parm);
+	ph2c->rsp = pval;
+	ph2c->rspsz = sizeof(struct readRF_rsp);
+	
+	prdrfparm ->offset = offset;
+	
+	res = rtw_enqueue_cmd(pcmdpriv, ph2c);	
+
+exit:
+
+_func_exit_;	
+
+	return res;
+}
+
+void rtw_getbbrfreg_cmdrsp_callback(_adapter*	padapter,  struct cmd_obj *pcmd)
+{       
+ _func_enter_;  
+		
+	//rtw_free_cmd_obj(pcmd);
+	rtw_mfree((unsigned char*) pcmd->parmbuf, pcmd->cmdsz);
+	rtw_mfree((unsigned char*) pcmd, sizeof(struct cmd_obj));
+	
+#ifdef CONFIG_MP_INCLUDED	
+	padapter->mppriv.workparam.bcompleted= _TRUE;
+#endif	
+_func_exit_;		
+}
+
+void rtw_readtssi_cmdrsp_callback(_adapter*	padapter,  struct cmd_obj *pcmd)
+{
+ _func_enter_;  
+
+	rtw_mfree((unsigned char*) pcmd->parmbuf, pcmd->cmdsz);
+	rtw_mfree((unsigned char*) pcmd, sizeof(struct cmd_obj));
+	
+#ifdef CONFIG_MP_INCLUDED	
+	padapter->mppriv.workparam.bcompleted= _TRUE;
+#endif
+
+_func_exit_;
+}
+
+u8 rtw_createbss_cmd(_adapter  *padapter)
+{
+	struct cmd_obj*			pcmd;
+	struct cmd_priv 			*pcmdpriv=&padapter->cmdpriv;
+	struct mlme_priv			*pmlmepriv = &padapter->mlmepriv;
+	WLAN_BSSID_EX		*pdev_network = &padapter->registrypriv.dev_network;
+	u8	res=_SUCCESS;
+
+_func_enter_;
+
+	rtw_led_control(padapter, LED_CTL_START_TO_LINK);
+
+	if (pmlmepriv->assoc_ssid.SsidLength == 0){
+		RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,(" createbss for Any SSid:%s\n",pmlmepriv->assoc_ssid.Ssid));		
+	} else {
+		RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,(" createbss for SSid:%s\n", pmlmepriv->assoc_ssid.Ssid));
+	}
+		
+	pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));
+	if(pcmd==NULL){
+		res= _FAIL;
+		goto exit;
+	}
+
+	_rtw_init_listhead(&pcmd->list);
+	pcmd->cmdcode = _CreateBss_CMD_;
+	pcmd->parmbuf = (unsigned char *)pdev_network;
+	pcmd->cmdsz = get_WLAN_BSSID_EX_sz((WLAN_BSSID_EX*)pdev_network);
+	pcmd->rsp = NULL;
+	pcmd->rspsz = 0;	
+	
+	pdev_network->Length = pcmd->cmdsz;	
+
+#ifdef CONFIG_RTL8712
+	//notes: translate IELength & Length after assign the Length to cmdsz;
+	pdev_network->Length = cpu_to_le32(pcmd->cmdsz);
+	pdev_network->IELength = cpu_to_le32(pdev_network->IELength);
+	pdev_network->Ssid.SsidLength = cpu_to_le32(pdev_network->Ssid.SsidLength);
+#endif
+
+	res = rtw_enqueue_cmd(pcmdpriv, pcmd);	
+
+exit:
+
+_func_exit_;	
+
+	return res;
+}
+
+u8 rtw_createbss_cmd_ex(_adapter  *padapter, unsigned char *pbss, unsigned int sz)
+{
+	struct cmd_obj*	pcmd;
+	struct cmd_priv 	*pcmdpriv=&padapter->cmdpriv;
+	u8	res=_SUCCESS;
+	
+_func_enter_;
+			
+	pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));
+	if(pcmd==NULL){
+		res= _FAIL;
+		goto exit;
+	}
+
+	_rtw_init_listhead(&pcmd->list);
+	pcmd->cmdcode = GEN_CMD_CODE(_CreateBss);
+	pcmd->parmbuf = pbss;
+	pcmd->cmdsz =  sz;
+	pcmd->rsp = NULL;
+	pcmd->rspsz = 0;
+
+	res = rtw_enqueue_cmd(pcmdpriv, pcmd);
+
+exit:
+	
+_func_exit_;	
+
+	return res;	
+}
+
+u8 rtw_joinbss_cmd(_adapter  *padapter, struct wlan_network* pnetwork)
+{
+	u8	*auth, res = _SUCCESS;
+	uint	t_len = 0;
+	WLAN_BSSID_EX		*psecnetwork;
+	struct cmd_obj		*pcmd;
+	struct cmd_priv		*pcmdpriv=&padapter->cmdpriv;
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	struct qos_priv		*pqospriv= &pmlmepriv->qospriv;
+	struct security_priv	*psecuritypriv=&padapter->securitypriv;
+	struct registry_priv	*pregistrypriv = &padapter->registrypriv;
+	struct ht_priv			*phtpriv = &pmlmepriv->htpriv;
+	NDIS_802_11_NETWORK_INFRASTRUCTURE ndis_network_mode = pnetwork->network.InfrastructureMode;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+_func_enter_;
+
+	rtw_led_control(padapter, LED_CTL_START_TO_LINK);
+
+	if (pmlmepriv->assoc_ssid.SsidLength == 0){
+		RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_, ("+Join cmd: Any SSid\n"));
+	} else {
+		RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+Join cmd: SSid=[%s]\n", pmlmepriv->assoc_ssid.Ssid));
+	}
+
+	pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));
+	if(pcmd==NULL){
+		res=_FAIL;
+		RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_, ("rtw_joinbss_cmd: memory allocate for cmd_obj fail!!!\n"));
+		goto exit;
+	}
+	/* // for IEs is pointer 
+	t_len = sizeof (ULONG) + sizeof (NDIS_802_11_MAC_ADDRESS) + 2 + 
+			sizeof (NDIS_802_11_SSID) + sizeof (ULONG) + 
+			sizeof (NDIS_802_11_RSSI) + sizeof (NDIS_802_11_NETWORK_TYPE) + 
+			sizeof (NDIS_802_11_CONFIGURATION) +	
+			sizeof (NDIS_802_11_NETWORK_INFRASTRUCTURE) +   
+			sizeof (NDIS_802_11_RATES_EX)+ sizeof(WLAN_PHY_INFO)+ sizeof (ULONG) + MAX_IE_SZ;
+	*/
+	//for IEs is fix buf size
+	t_len = sizeof(WLAN_BSSID_EX);
+
+
+	//for hidden ap to set fw_state here
+	if (check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) != _TRUE)
+	{
+		switch(ndis_network_mode)
+		{
+			case Ndis802_11IBSS:
+				set_fwstate(pmlmepriv, WIFI_ADHOC_STATE);
+				break;
+
+			case Ndis802_11Infrastructure:
+				set_fwstate(pmlmepriv, WIFI_STATION_STATE);
+				break;
+
+			case Ndis802_11APMode:
+			case Ndis802_11AutoUnknown:
+			case Ndis802_11InfrastructureMax:
+				break;
+
+		}
+	}
+
+	psecnetwork=(WLAN_BSSID_EX *)&psecuritypriv->sec_bss;
+	if(psecnetwork==NULL)
+	{
+		if(pcmd !=NULL)
+			rtw_mfree((unsigned char *)pcmd, sizeof(struct	cmd_obj));
+		
+		res=_FAIL;
+		
+		RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_, ("rtw_joinbss_cmd :psecnetwork==NULL!!!\n"));
+		
+		goto exit;
+	}
+
+	_rtw_memset(psecnetwork, 0, t_len);
+
+	_rtw_memcpy(psecnetwork, &pnetwork->network, get_WLAN_BSSID_EX_sz(&pnetwork->network));
+	
+	auth=&psecuritypriv->authenticator_ie[0];
+	psecuritypriv->authenticator_ie[0]=(unsigned char)psecnetwork->IELength;
+
+	if((psecnetwork->IELength-12) < (256-1)) {
+		_rtw_memcpy(&psecuritypriv->authenticator_ie[1], &psecnetwork->IEs[12], psecnetwork->IELength-12);
+	} else {
+		_rtw_memcpy(&psecuritypriv->authenticator_ie[1], &psecnetwork->IEs[12], (256-1));
+	}
+	  
+	psecnetwork->IELength = 0;
+	// Added by Albert 2009/02/18
+	// If the the driver wants to use the bssid to create the connection.
+	// If not,  we have to copy the connecting AP's MAC address to it so that
+	// the driver just has the bssid information for PMKIDList searching.
+        
+	if ( pmlmepriv->assoc_by_bssid == _FALSE )
+	{
+		_rtw_memcpy( &pmlmepriv->assoc_bssid[ 0 ], &pnetwork->network.MacAddress[ 0 ], ETH_ALEN );
+	}
+
+	psecnetwork->IELength = rtw_restruct_sec_ie(padapter, &pnetwork->network.IEs[0], &psecnetwork->IEs[0], pnetwork->network.IELength);
+
+
+	pqospriv->qos_option = 0;
+	
+	if(pregistrypriv->wmm_enable)	
+	{	
+		u32 tmp_len;
+		
+		tmp_len = rtw_restruct_wmm_ie(padapter, &pnetwork->network.IEs[0], &psecnetwork->IEs[0], pnetwork->network.IELength, psecnetwork->IELength);	
+
+		if (psecnetwork->IELength != tmp_len)		
+		{
+			psecnetwork->IELength = tmp_len;
+			pqospriv->qos_option = 1; //There is WMM IE in this corresp. beacon
+		}
+		else 
+		{
+			pqospriv->qos_option = 0;//There is no WMM IE in this corresp. beacon
+		}		
+	}	
+
+#ifdef CONFIG_80211N_HT
+	phtpriv->ht_option = _FALSE;
+	if(pregistrypriv->ht_enable)
+	{
+		//	Added by Albert 2010/06/23
+		//	For the WEP mode, we will use the bg mode to do the connection to avoid some IOT issue.
+		//	Especially for Realtek 8192u SoftAP.
+		if (	( padapter->securitypriv.dot11PrivacyAlgrthm != _WEP40_ ) &&
+			( padapter->securitypriv.dot11PrivacyAlgrthm != _WEP104_ ) &&
+			( padapter->securitypriv.dot11PrivacyAlgrthm != _TKIP_ ))
+		{
+			//rtw_restructure_ht_ie
+			rtw_restructure_ht_ie(padapter, &pnetwork->network.IEs[0], &psecnetwork->IEs[0], 
+									pnetwork->network.IELength, &psecnetwork->IELength);			
+		}
+	}
+
+#endif
+
+	pmlmeinfo->assoc_AP_vendor = check_assoc_AP(pnetwork->network.IEs, pnetwork->network.IELength);
+
+	#if 0
+	psecuritypriv->supplicant_ie[0]=(u8)psecnetwork->IELength;
+
+	if(psecnetwork->IELength < (256-1))
+	{
+		_rtw_memcpy(&psecuritypriv->supplicant_ie[1], &psecnetwork->IEs[0], psecnetwork->IELength);
+	}
+	else
+	{
+		_rtw_memcpy(&psecuritypriv->supplicant_ie[1], &psecnetwork->IEs[0], (256-1));
+	}
+	#endif
+	
+	pcmd->cmdsz = get_WLAN_BSSID_EX_sz(psecnetwork);//get cmdsz before endian conversion
+
+#ifdef CONFIG_RTL8712
+	//wlan_network endian conversion	
+	psecnetwork->Length = cpu_to_le32(psecnetwork->Length);
+	psecnetwork->Ssid.SsidLength= cpu_to_le32(psecnetwork->Ssid.SsidLength);
+	psecnetwork->Privacy = cpu_to_le32(psecnetwork->Privacy);
+	psecnetwork->Rssi = cpu_to_le32(psecnetwork->Rssi);
+	psecnetwork->NetworkTypeInUse = cpu_to_le32(psecnetwork->NetworkTypeInUse);
+	psecnetwork->Configuration.ATIMWindow = cpu_to_le32(psecnetwork->Configuration.ATIMWindow);
+	psecnetwork->Configuration.BeaconPeriod = cpu_to_le32(psecnetwork->Configuration.BeaconPeriod);
+	psecnetwork->Configuration.DSConfig = cpu_to_le32(psecnetwork->Configuration.DSConfig);
+	psecnetwork->Configuration.FHConfig.DwellTime=cpu_to_le32(psecnetwork->Configuration.FHConfig.DwellTime);
+	psecnetwork->Configuration.FHConfig.HopPattern=cpu_to_le32(psecnetwork->Configuration.FHConfig.HopPattern);
+	psecnetwork->Configuration.FHConfig.HopSet=cpu_to_le32(psecnetwork->Configuration.FHConfig.HopSet);
+	psecnetwork->Configuration.FHConfig.Length=cpu_to_le32(psecnetwork->Configuration.FHConfig.Length);	
+	psecnetwork->Configuration.Length = cpu_to_le32(psecnetwork->Configuration.Length);
+	psecnetwork->InfrastructureMode = cpu_to_le32(psecnetwork->InfrastructureMode);
+	psecnetwork->IELength = cpu_to_le32(psecnetwork->IELength);      
+#endif
+
+	_rtw_init_listhead(&pcmd->list);
+	pcmd->cmdcode = _JoinBss_CMD_;//GEN_CMD_CODE(_JoinBss)
+	pcmd->parmbuf = (unsigned char *)psecnetwork;
+	pcmd->rsp = NULL;
+	pcmd->rspsz = 0;
+
+	res = rtw_enqueue_cmd(pcmdpriv, pcmd);
+
+exit:
+	
+_func_exit_;
+
+	return res;
+}
+
+u8 rtw_disassoc_cmd(_adapter*padapter) // for sta_mode
+{
+	struct	cmd_obj*	pdisconnect_cmd;
+	struct	disconnect_parm* pdisconnect;
+	struct 	mlme_priv *pmlmepriv = &padapter->mlmepriv;
+	struct	cmd_priv   *pcmdpriv = &padapter->cmdpriv;
+
+	u8	res=_SUCCESS;
+
+_func_enter_;
+
+	RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+rtw_disassoc_cmd\n"));
+	
+	//if ((check_fwstate(pmlmepriv, _FW_LINKED)) == _TRUE) {
+
+		pdisconnect_cmd = (struct	cmd_obj*)rtw_zmalloc(sizeof(struct	cmd_obj));
+		if(pdisconnect_cmd == NULL){
+			res=_FAIL;
+			goto exit;
+			}
+
+		pdisconnect = (struct	disconnect_parm*)rtw_zmalloc(sizeof(struct	disconnect_parm));
+		if(pdisconnect == NULL) {
+			rtw_mfree((u8 *)pdisconnect_cmd, sizeof(struct cmd_obj));
+			res= _FAIL;
+			goto exit;
+		}
+		
+		init_h2fwcmd_w_parm_no_rsp(pdisconnect_cmd, pdisconnect, _DisConnect_CMD_);
+		res = rtw_enqueue_cmd(pcmdpriv, pdisconnect_cmd);
+	//}
+	
+exit:
+
+_func_exit_;	
+
+	return res;
+}
+
+u8 rtw_setopmode_cmd(_adapter  *padapter, NDIS_802_11_NETWORK_INFRASTRUCTURE networktype)
+{
+	struct	cmd_obj*	ph2c;
+	struct	setopmode_parm* psetop;
+
+	struct	cmd_priv   *pcmdpriv= &padapter->cmdpriv;
+	u8	res=_SUCCESS;
+
+_func_enter_;
+
+	ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));			
+	if(ph2c==NULL){
+		res= _FALSE;
+		goto exit;
+	}
+	psetop = (struct setopmode_parm*)rtw_zmalloc(sizeof(struct setopmode_parm)); 
+
+	if(psetop==NULL){
+		rtw_mfree((u8 *) ph2c, sizeof(struct	cmd_obj));
+		res=_FALSE;
+		goto exit;
+	}
+
+	init_h2fwcmd_w_parm_no_rsp(ph2c, psetop, _SetOpMode_CMD_);
+	psetop->mode = (u8)networktype;
+
+	res = rtw_enqueue_cmd(pcmdpriv, ph2c);
+
+exit:
+
+_func_exit_;	
+
+	return res;
+}
+
+u8 rtw_setstakey_cmd(_adapter *padapter, u8 *psta, u8 unicast_key)
+{
+	struct cmd_obj*			ph2c;
+	struct set_stakey_parm	*psetstakey_para;
+	struct cmd_priv 			*pcmdpriv=&padapter->cmdpriv;
+	struct set_stakey_rsp		*psetstakey_rsp = NULL;
+	
+	struct mlme_priv			*pmlmepriv = &padapter->mlmepriv;
+	struct security_priv 		*psecuritypriv = &padapter->securitypriv;
+	struct sta_info* 			sta = (struct sta_info* )psta;
+	u8	res=_SUCCESS;
+
+_func_enter_;
+
+	ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));
+	if ( ph2c == NULL){
+		res= _FAIL;
+		goto exit;
+	}
+
+	psetstakey_para = (struct set_stakey_parm*)rtw_zmalloc(sizeof(struct set_stakey_parm));
+	if(psetstakey_para==NULL){
+		rtw_mfree((u8 *) ph2c, sizeof(struct	cmd_obj));
+		res=_FAIL;
+		goto exit;
+	}
+
+	psetstakey_rsp = (struct set_stakey_rsp*)rtw_zmalloc(sizeof(struct set_stakey_rsp)); 
+	if(psetstakey_rsp == NULL){
+		rtw_mfree((u8 *) ph2c, sizeof(struct	cmd_obj));
+		rtw_mfree((u8 *) psetstakey_para, sizeof(struct set_stakey_parm));
+		res=_FAIL;
+		goto exit;
+	}
+
+	init_h2fwcmd_w_parm_no_rsp(ph2c, psetstakey_para, _SetStaKey_CMD_);
+	ph2c->rsp = (u8 *) psetstakey_rsp;
+	ph2c->rspsz = sizeof(struct set_stakey_rsp);
+
+	_rtw_memcpy(psetstakey_para->addr, sta->hwaddr,ETH_ALEN);
+	
+	if(check_fwstate(pmlmepriv, WIFI_STATION_STATE)){
+#ifdef CONFIG_TDLS		
+		if((sta->state&TDLS_LINKED_STATE)==TDLS_LINKED_STATE)
+			psetstakey_para->algorithm=(u8)sta->dot118021XPrivacy;
+		else
+#endif
+		psetstakey_para->algorithm =(unsigned char) psecuritypriv->dot11PrivacyAlgrthm;
+	}else{
+		GET_ENCRY_ALGO(psecuritypriv, sta, psetstakey_para->algorithm, _FALSE);
+	}
+
+	if (unicast_key == _TRUE) {
+#ifdef CONFIG_TDLS
+		if((sta->state&TDLS_LINKED_STATE)==TDLS_LINKED_STATE)
+			_rtw_memcpy(&psetstakey_para->key, sta->tpk.tk, 16);
+		else
+#endif
+			_rtw_memcpy(&psetstakey_para->key, &sta->dot118021x_UncstKey, 16);
+        } else {
+		_rtw_memcpy(&psetstakey_para->key, &psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey, 16);
+        }
+
+	//jeff: set this becasue at least sw key is ready
+	padapter->securitypriv.busetkipkey=_TRUE;
+
+	res = rtw_enqueue_cmd(pcmdpriv, ph2c);	
+
+exit:
+
+_func_exit_;	
+
+	return res;
+}
+
+u8 rtw_setrttbl_cmd(_adapter  *padapter, struct setratable_parm *prate_table)
+{
+	struct cmd_obj*			ph2c;
+	struct setratable_parm *	psetrttblparm;	
+	struct cmd_priv 			*pcmdpriv=&padapter->cmdpriv;
+	u8	res=_SUCCESS;
+_func_enter_;	
+
+	ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));
+	if(ph2c==NULL){
+		res= _FAIL;
+		goto exit;
+		}
+	psetrttblparm = (struct setratable_parm*)rtw_zmalloc(sizeof(struct setratable_parm)); 
+
+	if(psetrttblparm==NULL){
+		rtw_mfree((unsigned char *) ph2c, sizeof(struct	cmd_obj));
+		res= _FAIL;
+		goto exit;
+	}
+
+	init_h2fwcmd_w_parm_no_rsp(ph2c, psetrttblparm, GEN_CMD_CODE(_SetRaTable));
+
+	_rtw_memcpy(psetrttblparm,prate_table,sizeof(struct setratable_parm));
+
+	res = rtw_enqueue_cmd(pcmdpriv, ph2c);	
+exit:
+_func_exit_;	
+	return res;
+
+}
+
+u8 rtw_getrttbl_cmd(_adapter  *padapter, struct getratable_rsp *pval)
+{
+	struct cmd_obj*			ph2c;
+	struct getratable_parm *	pgetrttblparm;	
+	struct cmd_priv 			*pcmdpriv=&padapter->cmdpriv;
+	u8	res=_SUCCESS;
+_func_enter_;	
+
+	ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));
+	if(ph2c==NULL){
+		res= _FAIL;
+		goto exit;
+	}
+	pgetrttblparm = (struct getratable_parm*)rtw_zmalloc(sizeof(struct getratable_parm)); 
+
+	if(pgetrttblparm==NULL){
+		rtw_mfree((unsigned char *) ph2c, sizeof(struct	cmd_obj));
+		res= _FAIL;
+		goto exit;
+	}
+
+//	init_h2fwcmd_w_parm_no_rsp(ph2c, psetrttblparm, GEN_CMD_CODE(_SetRaTable));
+
+	_rtw_init_listhead(&ph2c->list);
+	ph2c->cmdcode =GEN_CMD_CODE(_GetRaTable);
+	ph2c->parmbuf = (unsigned char *)pgetrttblparm;
+	ph2c->cmdsz =  sizeof(struct getratable_parm);
+	ph2c->rsp = (u8*)pval;
+	ph2c->rspsz = sizeof(struct getratable_rsp);
+	
+	pgetrttblparm ->rsvd = 0x0;
+	
+	res = rtw_enqueue_cmd(pcmdpriv, ph2c);	
+exit:
+_func_exit_;	
+	return res;
+
+}
+
+u8 rtw_setassocsta_cmd(_adapter  *padapter, u8 *mac_addr)
+{
+	struct cmd_priv 		*pcmdpriv = &padapter->cmdpriv;
+	struct cmd_obj*			ph2c;
+	struct set_assocsta_parm	*psetassocsta_para;	
+	struct set_stakey_rsp		*psetassocsta_rsp = NULL;
+
+	u8	res=_SUCCESS;
+
+_func_enter_;	
+
+	ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));
+	if(ph2c==NULL){
+		res= _FAIL;
+		goto exit;
+	}
+
+	psetassocsta_para = (struct set_assocsta_parm*)rtw_zmalloc(sizeof(struct set_assocsta_parm));
+	if(psetassocsta_para==NULL){
+		rtw_mfree((u8 *) ph2c, sizeof(struct	cmd_obj));
+		res=_FAIL;
+		goto exit;
+	}
+
+	psetassocsta_rsp = (struct set_stakey_rsp*)rtw_zmalloc(sizeof(struct set_assocsta_rsp)); 
+	if(psetassocsta_rsp==NULL){
+		rtw_mfree((u8 *) ph2c, sizeof(struct	cmd_obj));
+		rtw_mfree((u8 *) psetassocsta_para, sizeof(struct set_assocsta_parm));
+		return _FAIL;
+	}
+
+	init_h2fwcmd_w_parm_no_rsp(ph2c, psetassocsta_para, _SetAssocSta_CMD_);
+	ph2c->rsp = (u8 *) psetassocsta_rsp;
+	ph2c->rspsz = sizeof(struct set_assocsta_rsp);
+
+	_rtw_memcpy(psetassocsta_para->addr, mac_addr,ETH_ALEN);
+	
+	res = rtw_enqueue_cmd(pcmdpriv, ph2c);	
+
+exit:
+
+_func_exit_;	
+
+	return res;
+ }
+
+u8 rtw_addbareq_cmd(_adapter*padapter, u8 tid, u8 *addr)
+{
+	struct cmd_priv		*pcmdpriv = &padapter->cmdpriv;
+	struct cmd_obj*		ph2c;
+	struct addBaReq_parm	*paddbareq_parm;
+
+	u8	res=_SUCCESS;
+	
+_func_enter_;	
+
+	ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));	
+	if(ph2c==NULL){
+		res= _FAIL;
+		goto exit;
+	}
+	
+	paddbareq_parm = (struct addBaReq_parm*)rtw_zmalloc(sizeof(struct addBaReq_parm)); 
+	if(paddbareq_parm==NULL){
+		rtw_mfree((unsigned char *)ph2c, sizeof(struct	cmd_obj));
+		res= _FAIL;
+		goto exit;
+	}
+
+	paddbareq_parm->tid = tid;
+	_rtw_memcpy(paddbareq_parm->addr, addr, ETH_ALEN);
+
+	init_h2fwcmd_w_parm_no_rsp(ph2c, paddbareq_parm, GEN_CMD_CODE(_AddBAReq));
+
+	//DBG_8192C("rtw_addbareq_cmd, tid=%d\n", tid);
+
+	//rtw_enqueue_cmd(pcmdpriv, ph2c);	
+	res = rtw_enqueue_cmd(pcmdpriv, ph2c);
+	
+exit:
+	
+_func_exit_;
+
+	return res;
+}
+
+u8 rtw_dynamic_chk_wk_cmd(_adapter*padapter)
+{
+	struct cmd_obj*		ph2c;
+	struct drvextra_cmd_parm  *pdrvextra_cmd_parm;	
+	struct cmd_priv	*pcmdpriv=&padapter->cmdpriv;
+	u8	res=_SUCCESS;
+	
+_func_enter_;	
+
+	ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));	
+	if(ph2c==NULL){
+		res= _FAIL;
+		goto exit;
+	}
+	
+	pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); 
+	if(pdrvextra_cmd_parm==NULL){
+		rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj));
+		res= _FAIL;
+		goto exit;
+	}
+
+	pdrvextra_cmd_parm->ec_id = DYNAMIC_CHK_WK_CID;
+	pdrvextra_cmd_parm->type_size = 0;
+	pdrvextra_cmd_parm->pbuf = NULL;
+
+	init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra));
+
+	
+	//rtw_enqueue_cmd(pcmdpriv, ph2c);	
+	res = rtw_enqueue_cmd(pcmdpriv, ph2c);
+	
+exit:
+	
+_func_exit_;
+
+	return res;
+
+}
+
+u8 rtw_set_chplan_cmd(_adapter*padapter, u8 chplan, u8 enqueue)
+{
+	struct	cmd_obj*	pcmdobj;
+	struct	SetChannelPlan_param *setChannelPlan_param;
+	struct 	mlme_priv *pmlmepriv = &padapter->mlmepriv;
+	struct	cmd_priv   *pcmdpriv = &padapter->cmdpriv;
+
+	u8	res=_SUCCESS;
+
+_func_enter_;
+
+	RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+rtw_set_chplan_cmd\n"));
+
+	//check input parameter
+	if(!rtw_is_channel_plan_valid(chplan)) {
+		res = _FAIL;
+		goto exit;
+	}
+
+	//prepare cmd parameter
+	setChannelPlan_param = (struct	SetChannelPlan_param *)rtw_zmalloc(sizeof(struct SetChannelPlan_param));
+	if(setChannelPlan_param == NULL) {
+		res= _FAIL;
+		goto exit;
+	}
+	setChannelPlan_param->channel_plan=chplan;
+
+	if(enqueue)
+	{
+		//need enqueue, prepare cmd_obj and enqueue
+		pcmdobj = (struct	cmd_obj*)rtw_zmalloc(sizeof(struct	cmd_obj));
+		if(pcmdobj == NULL){
+			rtw_mfree((u8 *)setChannelPlan_param, sizeof(struct SetChannelPlan_param));
+			res=_FAIL;
+			goto exit;
+		}
+
+		init_h2fwcmd_w_parm_no_rsp(pcmdobj, setChannelPlan_param, GEN_CMD_CODE(_SetChannelPlan));
+		res = rtw_enqueue_cmd(pcmdpriv, pcmdobj);
+	}
+	else
+	{
+		//no need to enqueue, do the cmd hdl directly and free cmd parameter
+		if( H2C_SUCCESS !=set_chplan_hdl(padapter, (unsigned char *)setChannelPlan_param) )
+			res = _FAIL;
+		
+		rtw_mfree((u8 *)setChannelPlan_param, sizeof(struct SetChannelPlan_param));
+	}
+
+	//do something based on res...
+	if(res == _SUCCESS)
+		padapter->mlmepriv.ChannelPlan = chplan;
+	
+exit:
+
+_func_exit_;	
+
+	return res;
+}
+
+u8 rtw_led_blink_cmd(_adapter*padapter, PLED_871x pLed)
+{
+	struct	cmd_obj*	pcmdobj;
+	struct	LedBlink_param *ledBlink_param;
+	struct	cmd_priv   *pcmdpriv = &padapter->cmdpriv;
+
+	u8	res=_SUCCESS;
+
+_func_enter_;
+
+	RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+rtw_led_blink_cmd\n"));
+	
+	pcmdobj = (struct	cmd_obj*)rtw_zmalloc(sizeof(struct	cmd_obj));
+	if(pcmdobj == NULL){
+		res=_FAIL;
+		goto exit;
+	}
+
+	ledBlink_param = (struct	LedBlink_param *)rtw_zmalloc(sizeof(struct	LedBlink_param));
+	if(ledBlink_param == NULL) {
+		rtw_mfree((u8 *)pcmdobj, sizeof(struct cmd_obj));
+		res= _FAIL;
+		goto exit;
+	}
+
+	ledBlink_param->pLed=pLed;
+	
+	init_h2fwcmd_w_parm_no_rsp(pcmdobj, ledBlink_param, GEN_CMD_CODE(_LedBlink));
+	res = rtw_enqueue_cmd(pcmdpriv, pcmdobj);
+	
+exit:
+
+_func_exit_;	
+
+	return res;
+}
+
+u8 rtw_set_csa_cmd(_adapter*padapter, u8 new_ch_no)
+{
+	struct	cmd_obj*	pcmdobj;
+	struct	SetChannelSwitch_param*setChannelSwitch_param;
+	struct 	mlme_priv *pmlmepriv = &padapter->mlmepriv;
+	struct	cmd_priv   *pcmdpriv = &padapter->cmdpriv;
+
+	u8	res=_SUCCESS;
+
+_func_enter_;
+
+	RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+rtw_set_csa_cmd\n"));
+	
+	pcmdobj = (struct	cmd_obj*)rtw_zmalloc(sizeof(struct	cmd_obj));
+	if(pcmdobj == NULL){
+		res=_FAIL;
+		goto exit;
+	}
+
+	setChannelSwitch_param = (struct	SetChannelSwitch_param *)rtw_zmalloc(sizeof(struct	SetChannelSwitch_param));
+	if(setChannelSwitch_param == NULL) {
+		rtw_mfree((u8 *)pcmdobj, sizeof(struct cmd_obj));
+		res= _FAIL;
+		goto exit;
+	}
+
+	setChannelSwitch_param->new_ch_no=new_ch_no;
+	
+	init_h2fwcmd_w_parm_no_rsp(pcmdobj, setChannelSwitch_param, GEN_CMD_CODE(_SetChannelSwitch));
+	res = rtw_enqueue_cmd(pcmdpriv, pcmdobj);
+	
+exit:
+
+_func_exit_;	
+
+	return res;
+}
+
+static void traffic_status_watchdog(_adapter *padapter)
+{
+#ifdef CONFIG_LPS
+	u8	bEnterPS;
+#endif
+	u8	bBusyTraffic = _FALSE, bTxBusyTraffic = _FALSE, bRxBusyTraffic = _FALSE;
+	u8	bHigherBusyTraffic = _FALSE, bHigherBusyRxTraffic = _FALSE, bHigherBusyTxTraffic = _FALSE;
+	struct mlme_priv		*pmlmepriv = &(padapter->mlmepriv);
+
+	//
+	// Determine if our traffic is busy now
+	//
+	if((check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) 
+		/*&& !MgntInitAdapterInProgress(pMgntInfo)*/)
+	{
+
+		if( pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > 100 ||
+			pmlmepriv->LinkDetectInfo.NumTxOkInPeriod > 100 )
+		{
+			bBusyTraffic = _TRUE;
+
+			if(pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > 100)
+				bRxBusyTraffic = _TRUE;
+
+			if(pmlmepriv->LinkDetectInfo.NumTxOkInPeriod > 100)
+				bTxBusyTraffic = _TRUE;
+		}
+
+		// Higher Tx/Rx data.
+		if( pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > 4000 ||
+			pmlmepriv->LinkDetectInfo.NumTxOkInPeriod > 4000 )
+		{
+			bHigherBusyTraffic = _TRUE;
+
+			// Extremely high Rx data.
+			if(pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > 5000)
+				bHigherBusyRxTraffic = _TRUE;
+
+			// Extremely high Tx data.
+			if(pmlmepriv->LinkDetectInfo.NumTxOkInPeriod > 5000)
+				bHigherBusyTxTraffic = _TRUE;
+		}
+		
+#ifdef CONFIG_LPS
+		// check traffic for  powersaving.
+		if( ((pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod + pmlmepriv->LinkDetectInfo.NumTxOkInPeriod) > 8 ) ||
+			(pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod > 2) )
+		{
+			//DBG_8192C("Tx = %d, Rx = %d \n",pmlmepriv->LinkDetectInfo.NumTxOkInPeriod,pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod);
+			bEnterPS= _FALSE;
+		}
+		else
+		{
+			bEnterPS= _TRUE;
+		}
+
+		// LeisurePS only work in infra mode.
+		if(bEnterPS)
+		{
+			LPS_Enter(padapter);
+		}
+		else
+		{
+			LPS_Leave(padapter);
+		}
+#endif
+	}
+	else
+	{
+#ifdef CONFIG_LPS
+		LPS_Leave(padapter);
+#endif
+	}
+
+	pmlmepriv->LinkDetectInfo.NumRxOkInPeriod = 0;
+	pmlmepriv->LinkDetectInfo.NumTxOkInPeriod = 0;
+	pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod = 0;
+	pmlmepriv->LinkDetectInfo.bBusyTraffic = bBusyTraffic;
+	pmlmepriv->LinkDetectInfo.bTxBusyTraffic = bTxBusyTraffic;
+	pmlmepriv->LinkDetectInfo.bRxBusyTraffic = bRxBusyTraffic;
+	pmlmepriv->LinkDetectInfo.bHigherBusyTraffic = bHigherBusyTraffic;
+	pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic = bHigherBusyRxTraffic;
+}
+
+void dynamic_chk_wk_hdl(_adapter *padapter, u8 *pbuf, int sz)
+{
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	//struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+	#ifdef DBG_CONFIG_ERROR_DETECT	
+	if(padapter->HalFunc.sreset_xmit_status_check)
+		padapter->HalFunc.sreset_xmit_status_check(padapter);		
+	#endif	
+
+	if(check_fwstate(pmlmepriv, _FW_UNDER_LINKING|_FW_UNDER_SURVEY)==_FALSE)
+	{
+		//if(pmlmeext->linked_to > 0)
+		//{
+		//	pmlmeext->linked_to--;	
+		//	if(pmlmeext->linked_to==0)
+			    linked_status_chk(padapter);		
+		//}
+
+		traffic_status_watchdog(padapter);
+	}
+
+	padapter->HalFunc.hal_dm_watchdog(padapter);
+
+	//check_hw_pbc(padapter, pdrvextra_cmd->pbuf, pdrvextra_cmd->type_size);	
+
+}
+
+#ifdef CONFIG_LPS
+void lps_ctrl_wk_hdl(_adapter *padapter, u8 lps_ctrl_type)
+{
+	struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	u8	mstatus;
+	
+_func_enter_;
+
+	if((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)
+		|| (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE))
+	{
+		return;
+	}
+
+	switch(lps_ctrl_type)
+	{
+		case LPS_CTRL_SCAN:
+			//DBG_8192C("LPS_CTRL_SCAN \n");
+			LeaveAllPowerSaveMode(padapter);
+			break;
+		case LPS_CTRL_JOINBSS:
+			//DBG_8192C("LPS_CTRL_JOINBSS \n");
+			LPS_Leave(padapter);
+			break;
+		case LPS_CTRL_CONNECT:
+			//DBG_8192C("LPS_CTRL_CONNECT \n");
+			mstatus = 1;
+			// Reset LPS Setting
+			padapter->pwrctrlpriv.LpsIdleCount = 0;
+			padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus));
+			break;
+		case LPS_CTRL_DISCONNECT:
+			//DBG_8192C("LPS_CTRL_DISCONNECT \n");
+			mstatus = 0;
+			LPS_Leave(padapter);
+			padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus));
+			break;
+		case LPS_CTRL_SPECIAL_PACKET:
+			//DBG_8192C("LPS_CTRL_SPECIAL_PACKET \n");
+			pwrpriv->DelayLPSLastTimeStamp = rtw_get_current_time();
+			LPS_Leave(padapter);
+			break;
+
+		default:
+			break;
+	}
+
+_func_exit_;
+}
+
+u8 rtw_lps_ctrl_wk_cmd(_adapter*padapter, u8 lps_ctrl_type, u8 enqueue)
+{
+	struct cmd_obj	*ph2c;
+	struct drvextra_cmd_parm	*pdrvextra_cmd_parm;	
+	struct cmd_priv	*pcmdpriv = &padapter->cmdpriv;
+	struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv;
+	u8	res = _SUCCESS;
+	
+_func_enter_;
+
+	//if(!pwrctrlpriv->bLeisurePs)
+	//	return res;
+
+	if(enqueue)
+	{
+		ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));	
+		if(ph2c==NULL){
+			res= _FAIL;
+			goto exit;
+		}
+		
+		pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); 
+		if(pdrvextra_cmd_parm==NULL){
+			rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj));
+			res= _FAIL;
+			goto exit;
+		}
+
+		pdrvextra_cmd_parm->ec_id = LPS_CTRL_WK_CID;
+		pdrvextra_cmd_parm->type_size = lps_ctrl_type;
+		pdrvextra_cmd_parm->pbuf = NULL;
+
+		init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra));
+
+		res = rtw_enqueue_cmd(pcmdpriv, ph2c);
+	}
+	else
+	{
+		lps_ctrl_wk_hdl(padapter, lps_ctrl_type);
+	}
+	
+exit:
+	
+_func_exit_;
+
+	return res;
+
+}
+
+#endif
+#ifdef CONFIG_ANTENNA_DIVERSITY
+
+void antenna_select_wk_hdl(_adapter *padapter, u8 antenna)
+{
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_ANTENNA_DIVERSITY_SELECT, (u8 *)(&antenna));
+}
+
+u8 rtw_antenna_select_cmd(_adapter*padapter, u8 antenna,u8 enqueue)
+{
+	struct cmd_obj		*ph2c;
+	struct drvextra_cmd_parm	*pdrvextra_cmd_parm;	
+	struct cmd_priv	*pcmdpriv = &padapter->cmdpriv;
+	u8 	bSupportAntDiv = _FALSE;
+	u8	res = _SUCCESS;
+
+_func_enter_;
+	padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_IS_SUPPORT_ANT_DIV, &(bSupportAntDiv));
+	if(_FALSE == bSupportAntDiv )	return res;
+
+	if(_TRUE == enqueue)
+	{
+		ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));	
+		if(ph2c==NULL){
+			res= _FAIL;
+			goto exit;
+		}
+
+		pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm));
+		if(pdrvextra_cmd_parm==NULL){
+			rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj));
+			res= _FAIL;
+			goto exit;
+		}
+
+		pdrvextra_cmd_parm->ec_id = ANT_SELECT_WK_CID;
+		pdrvextra_cmd_parm->type_size = antenna;
+		pdrvextra_cmd_parm->pbuf = NULL;
+		init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra));
+
+		res = rtw_enqueue_cmd(pcmdpriv, ph2c);
+	}
+	else{
+		antenna_select_wk_hdl(padapter,antenna );
+	}
+exit:
+
+_func_exit_;
+
+	return res;
+
+}
+#endif
+
+void power_saving_wk_hdl(_adapter *padapter, u8 *pbuf, int sz)
+{
+	 rtw_ps_processor(padapter);
+}
+
+#ifdef CONFIG_P2P
+u8 p2p_protocol_wk_cmd(_adapter*padapter, int intCmdType )
+{
+	struct cmd_obj	*ph2c;
+	struct drvextra_cmd_parm	*pdrvextra_cmd_parm;
+	struct wifidirect_info	*pwdinfo= &(padapter->wdinfo);
+	struct cmd_priv	*pcmdpriv = &padapter->cmdpriv;
+	u8	res = _SUCCESS;
+	
+_func_enter_;
+
+	if ( pwdinfo->p2p_state == P2P_STATE_NONE )
+	{
+		return res;
+	}
+
+	ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));	
+	if(ph2c==NULL){
+		res= _FAIL;
+		goto exit;
+	}
+			
+	pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); 
+	if(pdrvextra_cmd_parm==NULL){
+		rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj));
+		res= _FAIL;
+		goto exit;
+	}
+
+	pdrvextra_cmd_parm->ec_id = P2P_PROTO_WK_CID;
+	pdrvextra_cmd_parm->type_size = intCmdType;	//	As the command tppe.
+	pdrvextra_cmd_parm->pbuf = NULL;		//	Must be NULL here
+
+	init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra));
+
+	res = rtw_enqueue_cmd(pcmdpriv, ph2c);
+	
+exit:
+	
+_func_exit_;
+
+	return res;
+
+}
+#endif //CONFIG_P2P
+
+u8 rtw_ps_cmd(_adapter*padapter)
+{
+	struct cmd_obj		*ppscmd;
+	struct drvextra_cmd_parm	*pdrvextra_cmd_parm;	
+	struct cmd_priv	*pcmdpriv = &padapter->cmdpriv;
+	
+	u8	res = _SUCCESS;
+_func_enter_;
+	
+	ppscmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));	
+	if(ppscmd==NULL){
+		res= _FAIL;
+		goto exit;
+	}
+		
+	pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); 
+	if(pdrvextra_cmd_parm==NULL){
+		rtw_mfree((unsigned char *)ppscmd, sizeof(struct cmd_obj));
+		res= _FAIL;
+		goto exit;
+	}
+
+	pdrvextra_cmd_parm->ec_id = POWER_SAVING_CTRL_WK_CID;	
+	pdrvextra_cmd_parm->pbuf = NULL;
+	DBG_8192C("==> %s  , enqueue CMD \n",__FUNCTION__);	
+	init_h2fwcmd_w_parm_no_rsp(ppscmd, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra));
+
+	res = rtw_enqueue_cmd(pcmdpriv, ppscmd);
+	
+exit:
+	
+_func_exit_;
+
+	return res;
+
+}
+
+#ifdef CONFIG_AP_MODE
+
+static void rtw_chk_hi_queue_hdl(_adapter *padapter)
+{
+	int cnt=0;
+	struct sta_info *psta_bmc;
+	struct sta_priv *pstapriv = &padapter->stapriv;
+
+	psta_bmc = rtw_get_bcmc_stainfo(padapter);
+	if(!psta_bmc)
+		return;
+
+
+	if(psta_bmc->sleepq_len==0)
+	{
+		while((rtw_read32(padapter, 0x414)&0x00ffff00)!=0)
+		{
+			rtw_msleep_os(100);
+
+			cnt++;
+			
+			if(cnt>10)
+				break;	
+		}
+
+		if(cnt<=10)
+		{
+			pstapriv->tim_bitmap &= ~BIT(0);
+			
+			update_beacon(padapter, _TIM_IE_, NULL, _FALSE);
+		}	
+	}	
+	
+}
+
+u8 rtw_chk_hi_queue_cmd(_adapter*padapter)
+{
+	struct cmd_obj	*ph2c;
+	struct drvextra_cmd_parm	*pdrvextra_cmd_parm;	
+	struct cmd_priv	*pcmdpriv = &padapter->cmdpriv;
+	u8	res = _SUCCESS;
+	
+	ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));	
+	if(ph2c==NULL){
+		res= _FAIL;
+		goto exit;
+	}
+			
+	pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); 
+	if(pdrvextra_cmd_parm==NULL){
+		rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj));
+		res= _FAIL;
+		goto exit;
+	}
+
+	pdrvextra_cmd_parm->ec_id = CHECK_HIQ_WK_CID;
+	pdrvextra_cmd_parm->type_size = 0;
+	pdrvextra_cmd_parm->pbuf = NULL;
+
+	init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra));
+
+	res = rtw_enqueue_cmd(pcmdpriv, ph2c);
+	
+exit:
+	
+	return res;
+
+}
+#endif
+
+u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf)
+{
+	struct drvextra_cmd_parm *pdrvextra_cmd;
+
+	if(!pbuf)
+		return H2C_PARAMETERS_ERROR;
+
+	pdrvextra_cmd = (struct drvextra_cmd_parm*)pbuf;
+	
+	switch(pdrvextra_cmd->ec_id)
+	{
+		case DYNAMIC_CHK_WK_CID:
+			dynamic_chk_wk_hdl(padapter, pdrvextra_cmd->pbuf, pdrvextra_cmd->type_size);
+			break;
+		case POWER_SAVING_CTRL_WK_CID:
+			power_saving_wk_hdl(padapter, pdrvextra_cmd->pbuf, pdrvextra_cmd->type_size);	
+			break;
+#ifdef CONFIG_LPS
+		case LPS_CTRL_WK_CID:
+			lps_ctrl_wk_hdl(padapter, (u8)pdrvextra_cmd->type_size);
+			break;
+#endif
+#ifdef CONFIG_ANTENNA_DIVERSITY
+		case ANT_SELECT_WK_CID:
+			antenna_select_wk_hdl(padapter, pdrvextra_cmd->type_size);
+			break;
+#endif
+#ifdef CONFIG_P2P
+		case P2P_PS_WK_CID:
+			p2p_ps_wk_hdl(padapter, pdrvextra_cmd->type_size);
+			break;
+		case P2P_PROTO_WK_CID:
+			//	Commented by Albert 2011/07/01
+			//	I used the type_size as the type command
+			p2p_protocol_wk_hdl( padapter, pdrvextra_cmd->type_size );
+			break;
+#endif //CONFIG_P2P
+#ifdef CONFIG_AP_MODE
+		case CHECK_HIQ_WK_CID:
+			rtw_chk_hi_queue_hdl(padapter);
+			break;
+#endif //CONFIG_AP_MODE			
+		default:
+			break;
+
+	}
+
+
+	if(pdrvextra_cmd->pbuf && pdrvextra_cmd->type_size>0)
+	{
+		rtw_mfree(pdrvextra_cmd->pbuf, pdrvextra_cmd->type_size);
+	}
+
+
+	return H2C_SUCCESS;
+
+}
+
+void rtw_survey_cmd_callback(_adapter*	padapter ,  struct cmd_obj *pcmd)
+{
+	struct 	mlme_priv *pmlmepriv = &padapter->mlmepriv;
+
+_func_enter_;
+
+	if (pcmd->res != H2C_SUCCESS) {
+		clr_fwstate(pmlmepriv, _FW_UNDER_SURVEY);
+		RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nrtw_survey_cmd_callback : clr _FW_UNDER_SURVEY "));		
+		RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\n ********Error: MgntActrtw_set_802_11_bssid_LIST_SCAN Fail ************\n\n."));
+	} 
+
+	// free cmd
+	rtw_free_cmd_obj(pcmd);
+
+_func_exit_;	
+}
+void rtw_disassoc_cmd_callback(_adapter*	padapter,  struct cmd_obj *pcmd)
+{
+	_irqL	irqL;
+	struct 	mlme_priv *pmlmepriv = &padapter->mlmepriv;
+	
+_func_enter_;	
+
+	if (pcmd->res != H2C_SUCCESS)
+	{
+		_enter_critical_bh(&pmlmepriv->lock, &irqL);
+		set_fwstate(pmlmepriv, _FW_LINKED);
+		_exit_critical_bh(&pmlmepriv->lock, &irqL);
+				
+		RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\n ***Error: disconnect_cmd_callback Fail ***\n."));
+
+		goto exit;
+	}
+#ifdef CONFIG_BR_EXT
+	else //clear bridge database
+		nat25_db_cleanup(padapter);
+#endif //CONFIG_BR_EXT
+
+	// free cmd
+	rtw_free_cmd_obj(pcmd);
+	
+exit:
+	
+_func_exit_;	
+}
+
+
+void rtw_joinbss_cmd_callback(_adapter*	padapter,  struct cmd_obj *pcmd)
+{
+	struct 	mlme_priv *pmlmepriv = &padapter->mlmepriv;
+
+_func_enter_;	
+
+	if((pcmd->res != H2C_SUCCESS))
+	{				
+		RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("********Error:rtw_select_and_join_from_scanned_queue Wait Sema  Fail ************\n"));
+		_set_timer(&pmlmepriv->assoc_timer, 1);		
+	}
+	
+	rtw_free_cmd_obj(pcmd);
+	
+_func_exit_;	
+}
+
+void rtw_createbss_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd)
+{	
+	_irqL irqL;
+	u8 timer_cancelled;
+	struct sta_info *psta = NULL;
+	struct wlan_network *pwlan = NULL;		
+	struct 	mlme_priv *pmlmepriv = &padapter->mlmepriv;	
+	WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)pcmd->parmbuf;
+	struct wlan_network *tgt_network = &(pmlmepriv->cur_network);
+
+_func_enter_;	
+
+	if((pcmd->res != H2C_SUCCESS))
+	{	
+		RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\n ********Error: rtw_createbss_cmd_callback  Fail ************\n\n."));
+		_set_timer(&pmlmepriv->assoc_timer, 1 );		
+	}
+	
+	_cancel_timer(&pmlmepriv->assoc_timer, &timer_cancelled);
+
+       //endian_convert
+	pnetwork->Length = le32_to_cpu(pnetwork->Length);
+  	pnetwork->Ssid.SsidLength = le32_to_cpu(pnetwork->Ssid.SsidLength);
+	pnetwork->Privacy =le32_to_cpu(pnetwork->Privacy);
+	pnetwork->Rssi = le32_to_cpu(pnetwork->Rssi);
+	pnetwork->NetworkTypeInUse =le32_to_cpu(pnetwork->NetworkTypeInUse);	
+	pnetwork->Configuration.ATIMWindow = le32_to_cpu(pnetwork->Configuration.ATIMWindow);
+	//pnetwork->Configuration.BeaconPeriod = le32_to_cpu(pnetwork->Configuration.BeaconPeriod);
+	pnetwork->Configuration.DSConfig =le32_to_cpu(pnetwork->Configuration.DSConfig);
+	pnetwork->Configuration.FHConfig.DwellTime=le32_to_cpu(pnetwork->Configuration.FHConfig.DwellTime);
+	pnetwork->Configuration.FHConfig.HopPattern=le32_to_cpu(pnetwork->Configuration.FHConfig.HopPattern);
+	pnetwork->Configuration.FHConfig.HopSet=le32_to_cpu(pnetwork->Configuration.FHConfig.HopSet);
+	pnetwork->Configuration.FHConfig.Length=le32_to_cpu(pnetwork->Configuration.FHConfig.Length);	
+	pnetwork->Configuration.Length = le32_to_cpu(pnetwork->Configuration.Length);
+	pnetwork->InfrastructureMode = le32_to_cpu(pnetwork->InfrastructureMode);
+	pnetwork->IELength = le32_to_cpu(pnetwork->IELength);
+
+	
+	_enter_critical_bh(&pmlmepriv->lock, &irqL);
+	
+	
+	if(check_fwstate(pmlmepriv, WIFI_AP_STATE) )
+	{
+		psta = rtw_get_stainfo(&padapter->stapriv, pnetwork->MacAddress);
+		if(!psta)
+		{
+		psta = rtw_alloc_stainfo(&padapter->stapriv, pnetwork->MacAddress);
+		if (psta == NULL) 
+		{ 
+			RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nCan't alloc sta_info when createbss_cmd_callback\n"));
+			goto createbss_cmd_fail ;
+		}
+		}	
+			
+		rtw_indicate_connect( padapter);
+	}
+	else
+	{	
+		_irqL	irqL;
+
+		pwlan = _rtw_alloc_network(pmlmepriv);
+		_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+		if ( pwlan == NULL)
+		{
+			pwlan = rtw_get_oldest_wlan_network(&pmlmepriv->scanned_queue);
+			if( pwlan == NULL)
+			{
+				RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\n Error:  can't get pwlan in rtw_joinbss_event_callback \n"));
+				_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+				goto createbss_cmd_fail;
+			}
+			pwlan->last_scanned = rtw_get_current_time();			
+		}	
+		else
+		{
+			rtw_list_insert_tail(&(pwlan->list), &pmlmepriv->scanned_queue.queue);
+		}
+				
+		pnetwork->Length = get_WLAN_BSSID_EX_sz(pnetwork);
+		_rtw_memcpy(&(pwlan->network), pnetwork, pnetwork->Length);
+		//pwlan->fixed = _TRUE;
+
+		//rtw_list_insert_tail(&(pwlan->list), &pmlmepriv->scanned_queue.queue);
+
+		// copy pdev_network information to 	pmlmepriv->cur_network
+		_rtw_memcpy(&tgt_network->network, pnetwork, (get_WLAN_BSSID_EX_sz(pnetwork)));
+
+		// reset DSConfig
+		//tgt_network->network.Configuration.DSConfig = (u32)rtw_ch2freq(pnetwork->Configuration.DSConfig);
+
+		_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
+
+#if 0		
+		if((pmlmepriv->fw_state) & WIFI_AP_STATE)
+		{
+			psta = rtw_alloc_stainfo(&padapter->stapriv, pnetwork->MacAddress);
+
+			if (psta == NULL) { // for AP Mode & Adhoc Master Mode
+				RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nCan't alloc sta_info when createbss_cmd_callback\n"));
+				goto createbss_cmd_fail ;
+			}
+			
+			rtw_indicate_connect( padapter);
+		}
+		else {
+
+			//rtw_indicate_disconnect(dev);
+		}		
+#endif
+		_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+		// we will set _FW_LINKED when there is one more sat to join us (rtw_stassoc_event_callback)
+			
+	}
+
+createbss_cmd_fail:
+	
+	_exit_critical_bh(&pmlmepriv->lock, &irqL);
+
+	rtw_free_cmd_obj(pcmd);
+	
+_func_exit_;	
+
+}
+
+
+
+void rtw_setstaKey_cmdrsp_callback(_adapter*	padapter ,  struct cmd_obj *pcmd)
+{
+	
+	struct sta_priv * pstapriv = &padapter->stapriv;
+	struct set_stakey_rsp* psetstakey_rsp = (struct set_stakey_rsp*) (pcmd->rsp);
+	struct sta_info*	psta = rtw_get_stainfo(pstapriv, psetstakey_rsp->addr);
+
+_func_enter_;	
+
+	if(psta==NULL)
+	{
+		RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nERROR: rtw_setstaKey_cmdrsp_callback => can't get sta_info \n\n"));
+		goto exit;
+	}
+	
+	//psta->aid = psta->mac_id = psetstakey_rsp->keyid; //CAM_ID(CAM_ENTRY)
+	
+exit:	
+
+	rtw_free_cmd_obj(pcmd);
+	
+_func_exit_;	
+
+}
+void rtw_setassocsta_cmdrsp_callback(_adapter*	padapter,  struct cmd_obj *pcmd)
+{
+	_irqL	irqL;
+	struct sta_priv * pstapriv = &padapter->stapriv;
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;	
+	struct set_assocsta_parm* passocsta_parm = (struct set_assocsta_parm*)(pcmd->parmbuf);
+	struct set_assocsta_rsp* passocsta_rsp = (struct set_assocsta_rsp*) (pcmd->rsp);		
+	struct sta_info*	psta = rtw_get_stainfo(pstapriv, passocsta_parm->addr);
+
+_func_enter_;	
+	
+	if(psta==NULL)
+	{
+		RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nERROR: setassocsta_cmdrsp_callbac => can't get sta_info \n\n"));
+		goto exit;
+	}
+	
+	psta->aid = psta->mac_id = passocsta_rsp->cam_id;
+
+	_enter_critical_bh(&pmlmepriv->lock, &irqL);
+
+	if ((check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) && (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE))           	
+		_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
+
+       set_fwstate(pmlmepriv, _FW_LINKED);       	   
+	_exit_critical_bh(&pmlmepriv->lock, &irqL);
+	  
+	rtw_free_cmd_obj(pcmd);
+exit:	
+_func_exit_;	  
+}
+
+void rtw_getrttbl_cmd_cmdrsp_callback(_adapter*	padapter,  struct cmd_obj *pcmd)
+{
+_func_enter_;	
+	  
+	rtw_free_cmd_obj(pcmd);
+#ifdef CONFIG_MP_INCLUDED
+	padapter->mppriv.workparam.bcompleted=_TRUE;
+#endif
+
+_func_exit_;	  
+
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_debug.c linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_debug.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_debug.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_debug.c	2017-09-23 03:42:49.874675505 +0800
@@ -0,0 +1,611 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _RTW_DEBUG_C_
+
+
+#include <rtw_debug.h>
+
+#ifdef CONFIG_DEBUG_RTL871X
+
+	u32 GlobalDebugLevel = _drv_info_;
+
+	u64 GlobalDebugComponents = \
+			_module_rtl871x_xmit_c_ |
+			_module_xmit_osdep_c_ |
+			_module_rtl871x_recv_c_ |
+			_module_recv_osdep_c_ |
+			_module_rtl871x_mlme_c_ |
+			_module_mlme_osdep_c_ |
+			_module_rtl871x_sta_mgt_c_ |
+			_module_rtl871x_cmd_c_ |
+			_module_cmd_osdep_c_ |
+			_module_rtl871x_io_c_ |
+			_module_io_osdep_c_ |
+			_module_os_intfs_c_|
+			_module_rtl871x_security_c_|
+			_module_rtl871x_eeprom_c_|
+			_module_hal_init_c_|
+			_module_hci_hal_init_c_|
+			_module_rtl871x_ioctl_c_|
+			_module_rtl871x_ioctl_set_c_|
+			_module_rtl871x_ioctl_query_c_|
+			_module_rtl871x_pwrctrl_c_|
+			_module_hci_intfs_c_|
+			_module_hci_ops_c_|
+			_module_hci_ops_os_c_|
+			_module_rtl871x_ioctl_os_c|
+			_module_rtl8712_cmd_c_|
+			_module_rtl8192c_xmit_c_|
+			_module_rtl8712_recv_c_ |
+			_module_mp_ |
+			_module_efuse_;
+
+#endif
+
+#ifdef CONFIG_PROC_DEBUG
+#include <rtw_version.h>
+
+int proc_get_drv_version(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	
+	int len = 0;
+
+	len += snprintf(page + len, count - len, "%s\n", DRIVERVERSION);
+				
+	*eof = 1;
+	return len;
+}
+
+int proc_get_write_reg(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	*eof = 1;
+	return 0;
+}
+
+int proc_set_write_reg(struct file *file, const char *buffer,
+		unsigned long count, void *data)
+{
+	struct net_device *dev = (struct net_device *)data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	char tmp[32];
+	u32 addr, val, len;
+
+	if (count < 3)
+	{
+		DBG_8192C("argument size is less than 3\n");
+		return -EFAULT;
+	}	
+
+	if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {		
+
+		int num = sscanf(tmp, "%x %x %x", &addr, &val, &len);
+
+		if (num !=  3) {
+			DBG_8192C("invalid write_reg parameter!\n");
+			return count;
+		}
+
+		switch(len)
+		{
+			case 1:
+				rtw_write8(padapter, addr, (u8)val);				
+				break;
+			case 2:
+				rtw_write16(padapter, addr, (u16)val);				
+				break;
+			case 4:
+				rtw_write32(padapter, addr, val);				
+				break;
+			default:
+				DBG_8192C("error write length=%d", len);
+				break;
+		}			
+		
+	}
+	
+	return count;
+	
+}
+
+static u32 proc_get_read_addr=0xeeeeeeee;
+static u32 proc_get_read_len=0x4;
+
+int proc_get_read_reg(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{	
+	struct net_device *dev = data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);	
+	
+	int len = 0;
+
+	if(proc_get_read_addr==0xeeeeeeee)
+	{
+		*eof = 1;
+		return len;
+	}	
+
+	switch(proc_get_read_len)
+	{
+		case 1:			
+			len += snprintf(page + len, count - len, "rtw_read8(0x%x)=0x%x\n", proc_get_read_addr, rtw_read8(padapter, proc_get_read_addr));
+			break;
+		case 2:
+			len += snprintf(page + len, count - len, "rtw_read16(0x%x)=0x%x\n", proc_get_read_addr, rtw_read16(padapter, proc_get_read_addr));
+			break;
+		case 4:
+			len += snprintf(page + len, count - len, "rtw_read32(0x%x)=0x%x\n", proc_get_read_addr, rtw_read32(padapter, proc_get_read_addr));
+			break;
+		default:
+			len += snprintf(page + len, count - len, "error read length=%d\n", proc_get_read_len);
+			break;
+	}
+
+	*eof = 1;
+	return len;
+
+}
+
+int proc_set_read_reg(struct file *file, const char *buffer,
+		unsigned long count, void *data)
+{
+	struct net_device *dev = (struct net_device *)data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	char tmp[16];
+	u32 addr, len;
+
+	if (count < 2)
+	{
+		DBG_8192C("argument size is less than 2\n");
+		return -EFAULT;
+	}	
+
+	if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {		
+
+		int num = sscanf(tmp, "%x %x", &addr, &len);
+
+		if (num !=  2) {
+			DBG_8192C("invalid read_reg parameter!\n");
+			return count;
+		}
+
+		proc_get_read_addr = addr;
+		
+		proc_get_read_len = len;
+	}
+	
+	return count;
+
+}
+
+int proc_get_fwstate(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	
+	int len = 0;
+
+	len += snprintf(page + len, count - len, "fwstate=0x%x\n", get_fwstate(pmlmepriv));
+				
+	*eof = 1;
+	return len;
+}
+
+int proc_get_sec_info(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);	
+	struct security_priv *psecuritypriv = &padapter->securitypriv;
+	
+	int len = 0;
+
+	len += snprintf(page + len, count - len, "auth_alg=0x%x, enc_alg=0x%x, auth_type=0x%x, enc_type=0x%x\n", 
+						psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm,
+						psecuritypriv->ndisauthtype, psecuritypriv->ndisencryptstatus);
+				
+	*eof = 1;
+	return len;
+}
+
+int proc_get_mlmext_state(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);	
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	
+	int len = 0;
+
+	len += snprintf(page + len, count - len, "pmlmeinfo->state=0x%x\n", pmlmeinfo->state);
+				
+	*eof = 1;
+	return len;
+}
+
+int proc_get_qos_option(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	
+	int len = 0;
+
+	len += snprintf(page + len, count - len, "qos_option=%d\n", pmlmepriv->qospriv.qos_option);
+				
+	*eof = 1;
+	return len;
+
+}
+
+int proc_get_ht_option(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	
+	int len = 0;
+
+	len += snprintf(page + len, count - len, "ht_option=%d\n", pmlmepriv->htpriv.ht_option);
+				
+	*eof = 1;
+	return len;
+}
+
+int proc_get_rf_info(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);	
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;	
+	int len = 0;
+
+	len += snprintf(page + len, count - len, "cur_ch=%d, cur_bw=%d, cur_ch_offet=%d\n", 
+					pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset);
+	
+				
+	*eof = 1;
+	return len;
+
+}
+
+int proc_get_ap_info(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct sta_info *psta;
+	struct net_device *dev = data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	struct wlan_network *cur_network = &(pmlmepriv->cur_network);
+	struct sta_priv *pstapriv = &padapter->stapriv;
+	int len = 0;
+
+	psta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress);
+	if(psta)
+	{
+		int i;
+		struct recv_reorder_ctrl *preorder_ctrl;
+					
+		len += snprintf(page + len, count - len, "sta's macaddr:" MAC_FMT "\n", MAC_ARG(psta->hwaddr));
+		len += snprintf(page + len, count - len, "rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self);
+		len += snprintf(page + len, count - len, "qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate);	
+		len += snprintf(page + len, count - len, "state=0x%x, aid=%d, macid=%d, raid=%d\n", psta->state, psta->aid, psta->mac_id, psta->raid);	
+		len += snprintf(page + len, count - len, "bwmode=%d, ch_offset=%d, sgi=%d\n", psta->htpriv.bwmode, psta->htpriv.ch_offset, psta->htpriv.sgi);						
+		len += snprintf(page + len, count - len, "ampdu_enable = %d\n", psta->htpriv.ampdu_enable);	
+		len += snprintf(page + len, count - len, "agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap);
+					
+		for(i=0;i<16;i++)
+		{							
+			preorder_ctrl = &psta->recvreorder_ctrl[i];
+			if(preorder_ctrl->enable)
+			{
+				len += snprintf(page + len, count - len, "tid=%d, indicate_seq=%d\n", i, preorder_ctrl->indicate_seq);
+			}
+		}	
+							
+	}
+	else
+	{							
+		len += snprintf(page + len, count - len, "can't get sta's macaddr, cur_network's macaddr:" MAC_FMT "\n", MAC_ARG(cur_network->network.MacAddress));
+	}
+
+	*eof = 1;
+	return len;
+
+}
+
+int proc_get_adapter_state(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	int len = 0;
+	
+	len += snprintf(page + len, count - len, "bSurpriseRemoved=%d, bDriverStopped=%d\n", 
+						padapter->bSurpriseRemoved, padapter->bDriverStopped);
+
+	*eof = 1;
+	return len;
+
+}
+	
+int proc_get_trx_info(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
+	struct recv_priv  *precvpriv = &padapter->recvpriv;
+	int len = 0;
+	
+	len += snprintf(page + len, count - len, "free_xmitbuf_cnt=%d, free_xmitframe_cnt=%d, free_ext_xmitbuf_cnt=%d, free_recvframe_cnt=%d\n", 
+				pxmitpriv->free_xmitbuf_cnt, pxmitpriv->free_xmitframe_cnt,pxmitpriv->free_xmit_extbuf_cnt, precvpriv->free_recvframe_cnt);
+#ifdef CONFIG_USB_HCI
+	len += snprintf(page + len, count - len, "rx_urb_pending_cn=%d\n", precvpriv->rx_pending_cnt);
+#endif
+
+	*eof = 1;
+	return len;
+
+}
+	
+		
+int proc_get_rx_signal(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	
+	int len = 0;
+
+	len += snprintf(page + len, count - len,
+		"rssi:%d\n"
+		"rxpwdb:%d\n"
+		"signal_strength:%u\n"
+		"signal_qual:%u\n"
+		"noise:%u\n", 
+		padapter->recvpriv.rssi,
+		padapter->recvpriv.rxpwdb,
+		padapter->recvpriv.signal_strength,
+		padapter->recvpriv.signal_qual,
+		padapter->recvpriv.noise
+		);
+				
+	*eof = 1;
+	return len;
+}
+
+int proc_set_rx_signal(struct file *file, const char *buffer,
+		unsigned long count, void *data)
+{
+	struct net_device *dev = (struct net_device *)data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	char tmp[32];
+	u32 is_signal_dbg, signal_strength;
+
+	if (count < 1)
+		return -EFAULT;
+
+	if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {		
+
+		int num = sscanf(tmp, "%u %u", &is_signal_dbg, &signal_strength);
+
+		is_signal_dbg = is_signal_dbg==0?0:1;
+		
+		if(is_signal_dbg && num!=2)
+			return count;
+			
+		signal_strength = signal_strength>100?100:signal_strength;
+		signal_strength = signal_strength<0?0:signal_strength;
+
+		padapter->recvpriv.is_signal_dbg = is_signal_dbg;
+		padapter->recvpriv.signal_strength_dbg=signal_strength;
+
+		if(is_signal_dbg)
+			DBG_871X("set %s %u\n", "DBG_SIGNAL_STRENGTH", signal_strength);
+		else
+			DBG_871X("set %s\n", "HW_SIGNAL_STRENGTH");
+		
+	}
+	
+	return count;
+	
+}
+
+		
+#ifdef CONFIG_AP_MODE
+
+int proc_get_all_sta_info(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	_irqL irqL;
+	struct sta_info *psta;
+	struct net_device *dev = data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct sta_priv *pstapriv = &padapter->stapriv;
+	int i, j;
+	_list	*plist, *phead;
+	struct recv_reorder_ctrl *preorder_ctrl;
+	int len = 0;	
+						
+
+	len += snprintf(page + len, count - len, "sta_dz_bitmap=0x%x, tim_bitmap=0x%x\n", pstapriv->sta_dz_bitmap, pstapriv->tim_bitmap);
+					
+	_enter_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+
+	for(i=0; i< NUM_STA; i++)
+	{
+		phead = &(pstapriv->sta_hash[i]);
+		plist = get_next(phead);
+		
+		while ((rtw_end_of_queue_search(phead, plist)) == _FALSE)
+		{
+			psta = LIST_CONTAINOR(plist, struct sta_info, hash_list);
+
+			plist = get_next(plist);
+
+			//if(extra_arg == psta->aid)
+			{
+				len += snprintf(page + len, count - len, "sta's macaddr:" MAC_FMT "\n", MAC_ARG(psta->hwaddr));
+				len += snprintf(page + len, count - len, "rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self);
+				len += snprintf(page + len, count - len, "qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate);	
+				len += snprintf(page + len, count - len, "state=0x%x, aid=%d, macid=%d, raid=%d\n", psta->state, psta->aid, psta->mac_id, psta->raid);	
+				len += snprintf(page + len, count - len, "bwmode=%d, ch_offset=%d, sgi=%d\n", psta->htpriv.bwmode, psta->htpriv.ch_offset, psta->htpriv.sgi);						
+				len += snprintf(page + len, count - len, "ampdu_enable = %d\n", psta->htpriv.ampdu_enable);									
+				len += snprintf(page + len, count - len, "agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap);
+				len += snprintf(page + len, count - len, "sleepq_len=%d\n", psta->sleepq_len);
+				len += snprintf(page + len, count - len, "capability=0x%x\n", psta->capability);
+				len += snprintf(page + len, count - len, "flags=0x%x\n", psta->flags);
+				len += snprintf(page + len, count - len, "wpa_psk=0x%x\n", psta->wpa_psk);
+				len += snprintf(page + len, count - len, "wpa2_group_cipher=0x%x\n", psta->wpa2_group_cipher);
+				len += snprintf(page + len, count - len, "wpa2_pairwise_cipher=0x%x\n", psta->wpa2_pairwise_cipher);
+				len += snprintf(page + len, count - len, "qos_info=0x%x\n", psta->qos_info);
+				len += snprintf(page + len, count - len, "dot118021XPrivacy=0x%x\n", psta->dot118021XPrivacy);
+								
+				for(j=0;j<16;j++)
+				{							
+					preorder_ctrl = &psta->recvreorder_ctrl[j];
+					if(preorder_ctrl->enable)
+					{
+						len += snprintf(page + len, count - len, "tid=%d, indicate_seq=%d\n", j, preorder_ctrl->indicate_seq);
+					}
+				}		
+									
+			}							
+			
+		}
+		
+	}
+	
+	_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+
+	*eof = 1;
+	return len;
+
+}
+	
+#endif		
+
+#ifdef DBG_MEMORY_LEAK
+#include <asm/atomic.h>
+extern atomic_t _malloc_cnt;;
+extern atomic_t _malloc_size;;
+
+int proc_get_malloc_cnt(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	
+	int len = 0;
+
+	len += snprintf(page + len, count - len, "_malloc_cnt=%d\n", atomic_read(&_malloc_cnt));
+	len += snprintf(page + len, count - len, "_malloc_size=%d\n", atomic_read(&_malloc_size));
+				
+	*eof = 1;
+	return len;
+}
+#endif /* DBG_MEMORY_LEAK */
+
+#ifdef CONFIG_FIND_BEST_CHANNEL
+int proc_get_best_channel(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+	int len = 0;
+	u32 i, best_channel_24G = 1, best_channel_5G = 36, index_24G = 0, index_5G = 0;
+
+	for (i=0; pmlmeext->channel_set[i].ChannelNum !=0; i++) {
+		if ( pmlmeext->channel_set[i].ChannelNum == 1)
+			index_24G = i;
+		if ( pmlmeext->channel_set[i].ChannelNum == 36)
+			index_5G = i;
+	}	
+	
+	for (i=0; pmlmeext->channel_set[i].ChannelNum !=0; i++) {
+		// 2.4G
+		if ( pmlmeext->channel_set[i].ChannelNum == 6 ) {
+			if ( pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_24G].rx_count ) {
+				index_24G = i;
+				best_channel_24G = pmlmeext->channel_set[i].ChannelNum;
+			}
+		}
+
+		// 5G
+		if ( pmlmeext->channel_set[i].ChannelNum >= 36
+			&& pmlmeext->channel_set[i].ChannelNum < 140 ) {
+			 // Find primary channel
+			if ( (( pmlmeext->channel_set[i].ChannelNum - 36) % 8 == 0)
+				&& (pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_5G].rx_count) ) {
+				index_5G = i;
+				best_channel_5G = pmlmeext->channel_set[i].ChannelNum;
+			}
+		}
+
+		if ( pmlmeext->channel_set[i].ChannelNum >= 149
+			&& pmlmeext->channel_set[i].ChannelNum < 165) {
+			 // find primary channel
+			if ( (( pmlmeext->channel_set[i].ChannelNum - 149) % 8 == 0)
+				&& (pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_5G].rx_count) ) {
+				index_5G = i;
+				best_channel_5G = pmlmeext->channel_set[i].ChannelNum;
+			}
+		}
+#if 1 // debug
+		len += snprintf(page + len, count - len, "The rx cnt of channel %3d = %d\n", 
+					pmlmeext->channel_set[i].ChannelNum, pmlmeext->channel_set[i].rx_count);
+#endif
+	}
+	
+	len += snprintf(page + len, count - len, "best_channel_5G = %d\n", best_channel_5G);
+	len += snprintf(page + len, count - len, "best_channel_24G = %d\n", best_channel_24G);
+
+	*eof = 1;
+	return len;
+
+}
+#endif /* CONFIG_FIND_BEST_CHANNEL */
+	
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_eeprom.c linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_eeprom.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_eeprom.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_eeprom.c	2017-09-23 03:42:49.874675505 +0800
@@ -0,0 +1,424 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#define _RTW_EEPROM_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+void up_clk(_adapter*	padapter,	 u16 *x)
+{
+_func_enter_;
+	*x = *x | _EESK;
+	rtw_write8(padapter, EE_9346CR, (u8)*x);
+	rtw_udelay_os(CLOCK_RATE);
+
+_func_exit_;
+	
+}
+
+void down_clk(_adapter *	padapter, u16 *x	)
+{
+_func_enter_;
+	*x = *x & ~_EESK;
+	rtw_write8(padapter, EE_9346CR, (u8)*x);
+	rtw_udelay_os(CLOCK_RATE);
+_func_exit_;	
+}
+
+void shift_out_bits(_adapter * padapter, u16 data, u16 count)
+{
+	u16 x,mask;
+_func_enter_;
+
+	if(padapter->bSurpriseRemoved==_TRUE){
+		RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
+		goto out;
+	}
+	mask = 0x01 << (count - 1);
+	x = rtw_read8(padapter, EE_9346CR);
+
+	x &= ~(_EEDO | _EEDI);
+
+	do
+	{
+		x &= ~_EEDI;
+		if(data & mask)
+			x |= _EEDI;
+		if(padapter->bSurpriseRemoved==_TRUE){
+		RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
+		goto out;
+		}
+		rtw_write8(padapter, EE_9346CR, (u8)x);
+		rtw_udelay_os(CLOCK_RATE);
+		up_clk(padapter, &x);
+		down_clk(padapter, &x);
+		mask = mask >> 1;
+	} while(mask);
+	if(padapter->bSurpriseRemoved==_TRUE){
+		RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
+		goto out;
+	}
+	x &= ~_EEDI;
+	rtw_write8(padapter, EE_9346CR, (u8)x);
+out:	
+_func_exit_;		
+}
+
+u16 shift_in_bits (_adapter * padapter)
+{
+	u16 x,d=0,i;
+_func_enter_;	
+	if(padapter->bSurpriseRemoved==_TRUE){
+		RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
+		goto out;
+	}
+	x = rtw_read8(padapter, EE_9346CR);
+
+	x &= ~( _EEDO | _EEDI);
+	d = 0;
+
+	for(i=0; i<16; i++)
+	{
+		d = d << 1;
+		up_clk(padapter, &x);
+	if(padapter->bSurpriseRemoved==_TRUE){
+		RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
+		goto out;
+	}
+		x = rtw_read8(padapter, EE_9346CR);
+
+		x &= ~(_EEDI);
+		if(x & _EEDO)
+		d |= 1;
+
+		down_clk(padapter, &x);
+	}
+out:	
+_func_exit_;		
+
+	return d;
+}
+
+void standby(_adapter *	padapter	)
+{
+	u8   x;
+_func_enter_;	
+	x = rtw_read8(padapter, EE_9346CR);
+
+	x &= ~(_EECS | _EESK);
+	rtw_write8(padapter, EE_9346CR,x);
+
+	rtw_udelay_os(CLOCK_RATE);
+	x |= _EECS;
+	rtw_write8(padapter, EE_9346CR, x);
+	rtw_udelay_os(CLOCK_RATE);
+_func_exit_;		
+}
+
+u16 wait_eeprom_cmd_done(_adapter* padapter)
+{
+	u8 	x;
+	u16	i,res=_FALSE;
+_func_enter_;	
+	standby(padapter );
+	for (i=0; i<200; i++) 
+	{
+		x = rtw_read8(padapter, EE_9346CR);
+		if (x & _EEDO){
+			res=_TRUE;
+			goto exit;
+			}
+		rtw_udelay_os(CLOCK_RATE);
+	}
+exit:	
+_func_exit_;			
+	return res;
+}
+
+void eeprom_clean(_adapter * padapter)
+{
+	u16 x;
+_func_enter_;		
+	if(padapter->bSurpriseRemoved==_TRUE){
+		RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
+		goto out;
+	}
+	x = rtw_read8(padapter, EE_9346CR);
+	if(padapter->bSurpriseRemoved==_TRUE){
+		RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
+		goto out;
+	}
+	x &= ~(_EECS | _EEDI);
+	rtw_write8(padapter, EE_9346CR, (u8)x);
+	if(padapter->bSurpriseRemoved==_TRUE){
+		RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
+		goto out;
+	}
+	up_clk(padapter, &x);
+		if(padapter->bSurpriseRemoved==_TRUE){
+		RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
+		goto out;
+	}
+	down_clk(padapter, &x);
+out:	
+_func_exit_;			
+}
+
+void eeprom_write16(_adapter * padapter, u16 reg, u16 data)
+{
+	u8 x;
+#ifdef CONFIG_RTL8712
+	u8	tmp8_ori,tmp8_new,tmp8_clk_ori,tmp8_clk_new;
+	tmp8_ori=rtw_read8(padapter, 0x102502f1);
+	tmp8_new=tmp8_ori & 0xf7;
+	if(tmp8_ori != tmp8_new){	
+		rtw_write8(padapter, 0x102502f1, tmp8_new);
+		RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x102502f1=====\n"));
+	}
+	tmp8_clk_ori=rtw_read8(padapter,0x10250003);
+	tmp8_clk_new=tmp8_clk_ori|0x20;
+	if(tmp8_clk_new!=tmp8_clk_ori){
+		RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x10250003=====\n"));
+		rtw_write8(padapter, 0x10250003, tmp8_clk_new);
+	}	
+#endif
+_func_enter_;		
+	
+	x = rtw_read8(padapter, EE_9346CR);
+
+	x &= ~(_EEDI | _EEDO | _EESK | _EEM0);
+	x |= _EEM1 | _EECS;
+	rtw_write8(padapter, EE_9346CR, x);
+
+	shift_out_bits(padapter, EEPROM_EWEN_OPCODE, 5);
+	
+	if(padapter->EepromAddressSize==8)	//CF+ and SDIO
+		shift_out_bits(padapter, 0, 6);
+	else									//USB
+		shift_out_bits(padapter, 0, 4);
+	
+	standby( padapter);
+
+// Commented out by rcnjko, 2004.0
+//	// Erase this particular word.  Write the erase opcode and register
+//	// number in that order. The opcode is 3bits in length; reg is 6 bits long.
+//	shift_out_bits(Adapter, EEPROM_ERASE_OPCODE, 3);
+//	shift_out_bits(Adapter, reg, Adapter->EepromAddressSize);
+//
+//	if (wait_eeprom_cmd_done(Adapter ) == FALSE) 
+//	{
+//		return;
+//	}
+
+
+	standby(padapter );
+
+	// write the new word to the EEPROM
+
+	// send the write opcode the EEPORM
+	shift_out_bits(padapter, EEPROM_WRITE_OPCODE, 3);
+
+	// select which word in the EEPROM that we are writing to.
+	shift_out_bits(padapter, reg, padapter->EepromAddressSize);
+
+	// write the data to the selected EEPROM word.
+	shift_out_bits(padapter, data, 16);
+
+	if (wait_eeprom_cmd_done(padapter ) == _FALSE) 
+	{
+
+		goto exit;
+	}
+
+	standby(padapter );
+
+	shift_out_bits(padapter, EEPROM_EWDS_OPCODE, 5);
+	shift_out_bits(padapter, reg, 4);
+
+	eeprom_clean(padapter );
+exit:	
+#ifdef CONFIG_RTL8712
+	if(tmp8_clk_new!=tmp8_clk_ori)
+		rtw_write8(padapter, 0x10250003, tmp8_clk_ori);
+	if(tmp8_new!=tmp8_ori)
+		rtw_write8(padapter, 0x102502f1, tmp8_ori);
+
+#endif
+_func_exit_;	
+	return;
+}
+
+u16 eeprom_read16(_adapter * padapter, u16 reg) //ReadEEprom
+{
+
+	u16 x;
+	u16 data=0;
+#ifdef CONFIG_RTL8712
+	u8	tmp8_ori,tmp8_new,tmp8_clk_ori,tmp8_clk_new;
+	tmp8_ori= rtw_read8(padapter, 0x102502f1);
+	tmp8_new = tmp8_ori & 0xf7;
+	if(tmp8_ori != tmp8_new){	
+		rtw_write8(padapter, 0x102502f1, tmp8_new);
+		RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x102502f1=====\n"));
+	}
+	tmp8_clk_ori=rtw_read8(padapter,0x10250003);
+	tmp8_clk_new=tmp8_clk_ori|0x20;
+	if(tmp8_clk_new!=tmp8_clk_ori){
+		RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x10250003=====\n"));
+		rtw_write8(padapter, 0x10250003, tmp8_clk_new);
+	}	
+#endif
+_func_enter_;		
+
+	if(padapter->bSurpriseRemoved==_TRUE){
+		RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
+		goto out;
+	}
+	// select EEPROM, reset bits, set _EECS
+	x = rtw_read8(padapter, EE_9346CR);
+
+	if(padapter->bSurpriseRemoved==_TRUE){
+		RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
+		goto out;
+	}
+
+	x &= ~(_EEDI | _EEDO | _EESK | _EEM0);
+	x |= _EEM1 | _EECS;
+	rtw_write8(padapter, EE_9346CR, (unsigned char)x);
+
+	// write the read opcode and register number in that order
+	// The opcode is 3bits in length, reg is 6 bits long
+	shift_out_bits(padapter, EEPROM_READ_OPCODE, 3);
+	shift_out_bits(padapter, reg, padapter->EepromAddressSize);
+
+	// Now read the data (16 bits) in from the selected EEPROM word
+	data = shift_in_bits(padapter);
+
+	eeprom_clean(padapter);
+out:	
+#ifdef CONFIG_RTL8712
+	if(tmp8_clk_new!=tmp8_clk_ori)
+		rtw_write8(padapter, 0x10250003, tmp8_clk_ori);
+	if(tmp8_new!=tmp8_ori)
+		rtw_write8(padapter, 0x102502f1, tmp8_ori);
+
+#endif
+_func_exit_;		
+	return data;
+
+
+}
+
+
+
+
+//From even offset
+void eeprom_read_sz(_adapter * padapter, u16 reg, u8* data, u32 sz) 
+{
+
+	u16 x, data16;
+	u32 i;
+_func_enter_;		
+	if(padapter->bSurpriseRemoved==_TRUE){
+		RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
+		goto out;
+	}
+	// select EEPROM, reset bits, set _EECS
+	x = rtw_read8(padapter, EE_9346CR);
+
+	if(padapter->bSurpriseRemoved==_TRUE){
+		RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
+		goto out;
+	}
+
+	x &= ~(_EEDI | _EEDO | _EESK | _EEM0);
+	x |= _EEM1 | _EECS;
+	rtw_write8(padapter, EE_9346CR, (unsigned char)x);
+
+	// write the read opcode and register number in that order
+	// The opcode is 3bits in length, reg is 6 bits long
+	shift_out_bits(padapter, EEPROM_READ_OPCODE, 3);
+	shift_out_bits(padapter, reg, padapter->EepromAddressSize);
+
+
+	for(i=0; i<sz; i+=2)
+	{
+		data16 = shift_in_bits(padapter);
+		data[i] = data16 & 0xff;
+		data[i+1] = data16 >>8;		
+	}
+
+	eeprom_clean(padapter);
+out:	
+_func_exit_;		
+
+
+
+}
+
+
+//addr_off : address offset of the entry in eeprom (not the tuple number of eeprom (reg); that is addr_off !=reg)
+u8 eeprom_read(_adapter * padapter, u32 addr_off, u8 sz, u8* rbuf)
+{
+	u8 quotient, remainder, addr_2align_odd;
+	u16 reg, stmp , i=0, idx = 0;
+_func_enter_;		
+	reg = (u16)(addr_off >> 1);
+	addr_2align_odd = (u8)(addr_off & 0x1);
+
+	if(addr_2align_odd) //read that start at high part: e.g  1,3,5,7,9,...
+	{
+		stmp = eeprom_read16(padapter, reg);
+		rbuf[idx++] = (u8) ((stmp>>8)&0xff); //return hogh-part of the short
+		reg++; sz--;
+	}
+	
+	quotient = sz >> 1;
+	remainder = sz & 0x1;
+
+	for( i=0 ; i < quotient; i++)
+	{
+		stmp = eeprom_read16(padapter, reg+i);
+		rbuf[idx++] = (u8) (stmp&0xff);
+		rbuf[idx++] = (u8) ((stmp>>8)&0xff);
+	}
+	
+	reg = reg+i;
+	if(remainder){ //end of read at lower part of short : 0,2,4,6,...
+		stmp = eeprom_read16(padapter, reg);
+		rbuf[idx] = (u8)(stmp & 0xff); 
+	}
+_func_exit_;		
+	return _TRUE;
+}
+
+
+
+VOID read_eeprom_content(_adapter *	padapter)
+{
+
+_func_enter_;		
+
+
+_func_exit_;		
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_ieee80211.c linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_ieee80211.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_ieee80211.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_ieee80211.c	2017-09-23 03:42:49.878675492 +0800
@@ -0,0 +1,1307 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _IEEE80211_C
+
+#include <drv_types.h>
+#include <ieee80211.h>
+#include <wifi.h>
+#include <osdep_service.h>
+#include <wlan_bssdef.h>
+
+
+//-----------------------------------------------------------
+// for adhoc-master to generate ie and provide supported-rate to fw 
+//-----------------------------------------------------------
+
+static u8 	WIFI_CCKRATES[] = 
+{(IEEE80211_CCK_RATE_1MB | IEEE80211_BASIC_RATE_MASK),
+ (IEEE80211_CCK_RATE_2MB | IEEE80211_BASIC_RATE_MASK),
+ (IEEE80211_CCK_RATE_5MB | IEEE80211_BASIC_RATE_MASK),
+ (IEEE80211_CCK_RATE_11MB | IEEE80211_BASIC_RATE_MASK)};
+
+static u8 	WIFI_OFDMRATES[] = 
+{(IEEE80211_OFDM_RATE_6MB),
+ (IEEE80211_OFDM_RATE_9MB),
+ (IEEE80211_OFDM_RATE_12MB),
+ (IEEE80211_OFDM_RATE_18MB),
+ (IEEE80211_OFDM_RATE_24MB),
+ IEEE80211_OFDM_RATE_36MB,
+ IEEE80211_OFDM_RATE_48MB,
+ IEEE80211_OFDM_RATE_54MB};
+
+
+int rtw_get_bit_value_from_ieee_value(u8 val)
+{
+	unsigned char dot11_rate_table[]={2,4,11,22,12,18,24,36,48,72,96,108,0}; // last element must be zero!!
+
+	int i=0;
+	while(dot11_rate_table[i] != 0) {
+		if (dot11_rate_table[i] == val)
+			return BIT(i);
+		i++;
+	}
+	return 0;
+}
+
+uint	rtw_is_cckrates_included(u8 *rate)
+{	
+		u32	i = 0;			
+
+		while(rate[i]!=0)
+		{		
+			if  (  (((rate[i]) & 0x7f) == 2)	|| (((rate[i]) & 0x7f) == 4) ||		
+			(((rate[i]) & 0x7f) == 11)  || (((rate[i]) & 0x7f) == 22) )		
+			return _TRUE;	
+			i++;
+		}
+		
+		return _FALSE;
+}
+
+uint	rtw_is_cckratesonly_included(u8 *rate)
+{
+	u32 i = 0;
+
+
+	while(rate[i]!=0)
+	{
+			if  (  (((rate[i]) & 0x7f) != 2) && (((rate[i]) & 0x7f) != 4) &&
+				(((rate[i]) & 0x7f) != 11)  && (((rate[i]) & 0x7f) != 22) )
+
+			return _FALSE;		
+
+			i++;
+	}
+	
+	return _TRUE;
+
+}
+
+int rtw_check_network_type(unsigned char *rate, int ratelen, int channel)
+{
+	if (channel > 14)
+	{
+		if ((rtw_is_cckrates_included(rate)) == _TRUE)
+			return WIRELESS_INVALID;
+		else
+			return WIRELESS_11A;
+	}	
+	else  // could be pure B, pure G, or B/G
+	{
+		if ((rtw_is_cckratesonly_included(rate)) == _TRUE)	
+			return WIRELESS_11B;
+		else if((rtw_is_cckrates_included(rate)) == _TRUE)
+			return 	WIRELESS_11BG;
+		else
+			return WIRELESS_11G;
+	}
+	
+}
+
+u8 *rtw_set_fixed_ie(unsigned char *pbuf, unsigned int len, unsigned char *source,
+				unsigned int *frlen)
+{
+	_rtw_memcpy((void *)pbuf, (void *)source, len);
+	*frlen = *frlen + len;
+	return (pbuf + len);
+}
+
+// rtw_set_ie will update frame length
+u8 *rtw_set_ie
+(
+	u8 *pbuf, 
+	sint index, 
+	uint len,
+	u8 *source, 
+	uint *frlen //frame length
+)
+{
+_func_enter_;
+	*pbuf = (u8)index;
+
+	*(pbuf + 1) = (u8)len;
+
+	if (len > 0)
+		_rtw_memcpy((void *)(pbuf + 2), (void *)source, len);
+	
+	*frlen = *frlen + (len + 2);
+	
+	return (pbuf + len + 2);
+_func_exit_;	
+}
+
+
+
+/*----------------------------------------------------------------------------
+index: the information element id index, limit is the limit for search
+-----------------------------------------------------------------------------*/
+u8 *rtw_get_ie(u8 *pbuf, sint index, sint *len, sint limit)
+{
+	sint tmp,i;
+	u8 *p;
+_func_enter_;
+	if (limit < 1){
+		_func_exit_;	
+		return NULL;
+	}
+
+	p = pbuf;
+	i = 0;
+	*len = 0;
+	while(1)
+	{
+		if (*p == index)
+		{
+			*len = *(p + 1);
+			return (p);
+		}
+		else
+		{
+			tmp = *(p + 1);
+			p += (tmp + 2);
+			i += (tmp + 2);
+		}
+		if (i >= limit)
+			break;
+	}
+_func_exit_;		
+	return NULL;
+}
+
+void rtw_set_supported_rate(u8* SupportedRates, uint mode) 
+{
+_func_enter_;
+
+	_rtw_memset(SupportedRates, 0, NDIS_802_11_LENGTH_RATES_EX);
+	
+	switch (mode)
+	{
+		case WIRELESS_11B:
+			_rtw_memcpy(SupportedRates, WIFI_CCKRATES, IEEE80211_CCK_RATE_LEN);
+			break;
+		
+		case WIRELESS_11G:
+		case WIRELESS_11A:
+		case WIRELESS_11_5N:
+		case WIRELESS_11A_5N://Todo: no basic rate for ofdm ?
+			_rtw_memcpy(SupportedRates, WIFI_OFDMRATES, IEEE80211_NUM_OFDM_RATESLEN);
+			break;
+		
+		case WIRELESS_11BG:
+		case WIRELESS_11G_24N:
+		case WIRELESS_11_24N:
+		case WIRELESS_11BG_24N:
+			_rtw_memcpy(SupportedRates, WIFI_CCKRATES, IEEE80211_CCK_RATE_LEN);
+			_rtw_memcpy(SupportedRates + IEEE80211_CCK_RATE_LEN, WIFI_OFDMRATES, IEEE80211_NUM_OFDM_RATESLEN);
+			break;
+	
+	}
+_func_exit_;	
+}
+
+uint	rtw_get_rateset_len(u8	*rateset)
+{
+	uint i = 0;
+_func_enter_;	
+	while(1)
+	{
+		if ((rateset[i]) == 0)
+			break;
+			
+		if (i > 12)
+			break;
+			
+		i++;			
+	}
+_func_exit_;		
+	return i;
+}
+
+int rtw_generate_ie(struct registry_priv *pregistrypriv)
+{
+	u8	wireless_mode;
+	int 	sz = 0, rateLen;
+	WLAN_BSSID_EX*	pdev_network = &pregistrypriv->dev_network;
+	u8*	ie = pdev_network->IEs;
+	
+_func_enter_;		
+
+	//timestamp will be inserted by hardware
+	sz += 8;	
+	ie += sz;
+	
+	//beacon interval : 2bytes
+	*(u16*)ie = cpu_to_le16((u16)pdev_network->Configuration.BeaconPeriod);//BCN_INTERVAL;
+	sz += 2; 
+	ie += 2;
+	
+	//capability info
+	*(u16*)ie = 0;
+	
+	*(u16*)ie |= cpu_to_le16(cap_IBSS);
+
+	if(pregistrypriv->preamble == PREAMBLE_SHORT)
+		*(u16*)ie |= cpu_to_le16(cap_ShortPremble);
+	
+	if (pdev_network->Privacy)
+		*(u16*)ie |= cpu_to_le16(cap_Privacy);
+	
+	sz += 2;
+	ie += 2;
+	
+	//SSID
+	ie = rtw_set_ie(ie, _SSID_IE_, pdev_network->Ssid.SsidLength, pdev_network->Ssid.Ssid, &sz);
+	
+	//supported rates
+	if(pregistrypriv->wireless_mode == WIRELESS_11ABGN)
+	{
+		if(pdev_network->Configuration.DSConfig > 14)
+			wireless_mode = WIRELESS_11A_5N;
+		else
+			wireless_mode = WIRELESS_11BG_24N;
+	}
+	else
+	{
+		wireless_mode = pregistrypriv->wireless_mode;
+	}
+	
+	rtw_set_supported_rate(pdev_network->SupportedRates, wireless_mode) ;
+	
+	rateLen = rtw_get_rateset_len(pdev_network->SupportedRates);
+
+	if (rateLen > 8)
+	{
+		ie = rtw_set_ie(ie, _SUPPORTEDRATES_IE_, 8, pdev_network->SupportedRates, &sz);
+		//ie = rtw_set_ie(ie, _EXT_SUPPORTEDRATES_IE_, (rateLen - 8), (pdev_network->SupportedRates + 8), &sz);
+	}
+	else
+	{
+		ie = rtw_set_ie(ie, _SUPPORTEDRATES_IE_, rateLen, pdev_network->SupportedRates, &sz);
+	}
+
+	//DS parameter set
+	ie = rtw_set_ie(ie, _DSSET_IE_, 1, (u8 *)&(pdev_network->Configuration.DSConfig), &sz);
+
+
+	//IBSS Parameter Set
+	
+	ie = rtw_set_ie(ie, _IBSS_PARA_IE_, 2, (u8 *)&(pdev_network->Configuration.ATIMWindow), &sz);
+
+	if (rateLen > 8)
+	{		
+		ie = rtw_set_ie(ie, _EXT_SUPPORTEDRATES_IE_, (rateLen - 8), (pdev_network->SupportedRates + 8), &sz);
+	}
+	
+		
+	//HT Cap.
+	if(((pregistrypriv->wireless_mode&WIRELESS_11_5N)||(pregistrypriv->wireless_mode&WIRELESS_11_24N)) 
+		&& (pregistrypriv->ht_enable==_TRUE))
+	{
+		//todo:
+	}
+
+	//pdev_network->IELength =  sz; //update IELength
+
+_func_exit_;
+
+	//return _SUCCESS;
+
+	return sz;
+
+}
+
+unsigned char *rtw_get_wpa_ie(unsigned char *pie, int *wpa_ie_len, int limit)
+{	
+	int len;
+	u16 val16;
+	unsigned char wpa_oui_type[] = {0x00, 0x50, 0xf2, 0x01};		
+	u8 *pbuf = pie;
+
+	while(1) 
+	{
+		pbuf = rtw_get_ie(pbuf, _WPA_IE_ID_, &len, limit);
+
+		if (pbuf) {
+
+			//check if oui matches...
+			if (_rtw_memcmp((pbuf + 2), wpa_oui_type, sizeof (wpa_oui_type)) == _FALSE) {
+
+				goto check_next_ie;
+			}
+
+			//check version...
+			_rtw_memcpy((u8 *)&val16, (pbuf + 6), sizeof(val16));
+
+			val16 = le16_to_cpu(val16);
+			if (val16 != 0x0001)
+				goto check_next_ie;	
+
+			*wpa_ie_len = *(pbuf + 1);
+
+			return pbuf;
+
+		}
+		else {
+
+			*wpa_ie_len = 0;			
+			return NULL;
+		}
+
+check_next_ie:
+
+		limit = limit - (pbuf - pie) - 2 - len;
+
+		if (limit <= 0)
+			break;
+
+		pbuf += (2 + len);
+		
+	}
+	
+	*wpa_ie_len = 0;
+	
+	return NULL;
+
+}
+
+unsigned char *rtw_get_wpa2_ie(unsigned char *pie, int *rsn_ie_len, int limit)
+{	
+
+	return rtw_get_ie(pie, _WPA2_IE_ID_,rsn_ie_len, limit);
+
+}
+
+int rtw_get_wpa_cipher_suite(u8 *s)
+{
+	if (_rtw_memcmp(s, WPA_CIPHER_SUITE_NONE, WPA_SELECTOR_LEN) == _TRUE)
+		return WPA_CIPHER_NONE;
+	if (_rtw_memcmp(s, WPA_CIPHER_SUITE_WEP40, WPA_SELECTOR_LEN) == _TRUE)
+		return WPA_CIPHER_WEP40;
+	if (_rtw_memcmp(s, WPA_CIPHER_SUITE_TKIP, WPA_SELECTOR_LEN) == _TRUE)
+		return WPA_CIPHER_TKIP;
+	if (_rtw_memcmp(s, WPA_CIPHER_SUITE_CCMP, WPA_SELECTOR_LEN) == _TRUE)
+		return WPA_CIPHER_CCMP;
+	if (_rtw_memcmp(s, WPA_CIPHER_SUITE_WEP104, WPA_SELECTOR_LEN) == _TRUE)
+		return WPA_CIPHER_WEP104;
+
+	return 0;
+}
+
+int rtw_get_wpa2_cipher_suite(u8 *s)
+{
+	if (_rtw_memcmp(s, RSN_CIPHER_SUITE_NONE, RSN_SELECTOR_LEN) == _TRUE)
+		return WPA_CIPHER_NONE;
+	if (_rtw_memcmp(s, RSN_CIPHER_SUITE_WEP40, RSN_SELECTOR_LEN) == _TRUE)
+		return WPA_CIPHER_WEP40;
+	if (_rtw_memcmp(s, RSN_CIPHER_SUITE_TKIP, RSN_SELECTOR_LEN) == _TRUE)
+		return WPA_CIPHER_TKIP;
+	if (_rtw_memcmp(s, RSN_CIPHER_SUITE_CCMP, RSN_SELECTOR_LEN) == _TRUE)
+		return WPA_CIPHER_CCMP;
+	if (_rtw_memcmp(s, RSN_CIPHER_SUITE_WEP104, RSN_SELECTOR_LEN) == _TRUE)
+		return WPA_CIPHER_WEP104;
+
+	return 0;
+}
+
+
+int rtw_parse_wpa_ie(u8* wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwise_cipher)
+{
+	int i, ret=_SUCCESS;
+	int left, count;
+	u8 *pos;
+
+	if (wpa_ie_len <= 0) {
+		/* No WPA IE - fail silently */
+		return _FAIL;
+	}
+
+	
+	if ((*wpa_ie != _WPA_IE_ID_) || (*(wpa_ie+1) != (u8)(wpa_ie_len - 2)) ||
+	   (_rtw_memcmp(wpa_ie+2, WPA_OUI_TYPE, WPA_SELECTOR_LEN) != _TRUE) )
+	{		
+		return _FAIL;
+	}
+
+	pos = wpa_ie;
+
+	pos += 8;
+	left = wpa_ie_len - 8;	
+
+
+	//group_cipher
+	if (left >= WPA_SELECTOR_LEN) {
+
+		*group_cipher = rtw_get_wpa_cipher_suite(pos);
+		
+		pos += WPA_SELECTOR_LEN;
+		left -= WPA_SELECTOR_LEN;
+		
+	} 
+	else if (left > 0)
+	{
+		RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s: ie length mismatch, %u too much", __FUNCTION__, left));
+		
+		return _FAIL;
+	}
+
+
+	//pairwise_cipher
+	if (left >= 2)
+	{		
+                //count = le16_to_cpu(*(u16*)pos);	
+		count = RTW_GET_LE16(pos);
+		pos += 2;
+		left -= 2;
+		
+		if (count == 0 || left < count * WPA_SELECTOR_LEN) {
+			RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s: ie count botch (pairwise), "
+				   		"count %u left %u", __FUNCTION__, count, left));
+			return _FAIL;
+		}
+		
+		for (i = 0; i < count; i++)
+		{
+			*pairwise_cipher |= rtw_get_wpa_cipher_suite(pos);
+			
+			pos += WPA_SELECTOR_LEN;
+			left -= WPA_SELECTOR_LEN;
+		}
+		
+	} 
+	else if (left == 1)
+	{
+		RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s: ie too short (for key mgmt)",   __FUNCTION__));
+		return _FAIL;
+	}
+
+	
+	return ret;
+	
+}
+
+int rtw_parse_wpa2_ie(u8* rsn_ie, int rsn_ie_len, int *group_cipher, int *pairwise_cipher)
+{
+	int i, ret=_SUCCESS;
+	int left, count;
+	u8 *pos;
+
+	if (rsn_ie_len <= 0) {
+		/* No RSN IE - fail silently */
+		return _FAIL;
+	}
+
+
+	if ((*rsn_ie!= _WPA2_IE_ID_) || (*(rsn_ie+1) != (u8)(rsn_ie_len - 2)))
+	{		
+		return _FAIL;
+	}
+	
+	pos = rsn_ie;
+	pos += 4;
+	left = rsn_ie_len - 4;	
+
+	//group_cipher
+	if (left >= RSN_SELECTOR_LEN) {
+
+		*group_cipher = rtw_get_wpa2_cipher_suite(pos);
+		
+		pos += RSN_SELECTOR_LEN;
+		left -= RSN_SELECTOR_LEN;
+		
+	} else if (left > 0) {
+		RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s: ie length mismatch, %u too much", __FUNCTION__, left));
+		return _FAIL;
+	}
+
+	//pairwise_cipher
+	if (left >= 2)
+	{		
+	        //count = le16_to_cpu(*(u16*)pos);
+		count = RTW_GET_LE16(pos);
+		pos += 2;
+		left -= 2;
+
+		if (count == 0 || left < count * RSN_SELECTOR_LEN) {
+			RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s: ie count botch (pairwise), "
+				  		 "count %u left %u", __FUNCTION__, count, left));
+			return _FAIL;
+		}
+		
+		for (i = 0; i < count; i++)
+		{			
+			*pairwise_cipher |= rtw_get_wpa2_cipher_suite(pos);
+			
+			pos += RSN_SELECTOR_LEN;
+			left -= RSN_SELECTOR_LEN;
+		}
+
+	} 
+	else if (left == 1)
+	{
+		RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s: ie too short (for key mgmt)",  __FUNCTION__));
+		
+		return _FAIL;
+	}
+
+
+	return ret;
+	
+}
+
+int rtw_get_sec_ie(u8 *in_ie,uint in_len,u8 *rsn_ie,u16 *rsn_len,u8 *wpa_ie,u16 *wpa_len)
+{
+	u8 authmode, sec_idx, i;
+	u8 wpa_oui[4]={0x0,0x50,0xf2,0x01};
+	uint 	cnt;
+	
+_func_enter_;
+
+	//Search required WPA or WPA2 IE and copy to sec_ie[ ]
+	
+	cnt = (_TIMESTAMP_ + _BEACON_ITERVAL_ + _CAPABILITY_);
+	
+	sec_idx=0;
+		
+	while(cnt<in_len)
+	{
+		authmode=in_ie[cnt];
+		
+		if((authmode==_WPA_IE_ID_)&&(_rtw_memcmp(&in_ie[cnt+2], &wpa_oui[0],4)==_TRUE))
+		{	
+				RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("\n rtw_get_wpa_ie: sec_idx=%d in_ie[cnt+1]+2=%d\n",sec_idx,in_ie[cnt+1]+2));		
+
+				_rtw_memcpy(wpa_ie, &in_ie[cnt],in_ie[cnt+1]+2);
+
+				for(i=0;i<(in_ie[cnt+1]+2);i=i+8){
+					RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("\n %2x,%2x,%2x,%2x,%2x,%2x,%2x,%2x\n",wpa_ie[i],wpa_ie[i+1],wpa_ie[i+2],wpa_ie[i+3],wpa_ie[i+4],wpa_ie[i+5],wpa_ie[i+6],wpa_ie[i+7]));
+				}
+
+				*wpa_len=in_ie[cnt+1]+2;
+				cnt+=in_ie[cnt+1]+2;  //get next
+		}
+		else
+		{
+			if(authmode==_WPA2_IE_ID_)
+			{
+				RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("\n get_rsn_ie: sec_idx=%d in_ie[cnt+1]+2=%d\n",sec_idx,in_ie[cnt+1]+2));		
+
+				_rtw_memcpy(rsn_ie, &in_ie[cnt],in_ie[cnt+1]+2);
+
+				for(i=0;i<(in_ie[cnt+1]+2);i=i+8){
+					RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("\n %2x,%2x,%2x,%2x,%2x,%2x,%2x,%2x\n",rsn_ie[i],rsn_ie[i+1],rsn_ie[i+2],rsn_ie[i+3],rsn_ie[i+4],rsn_ie[i+5],rsn_ie[i+6],rsn_ie[i+7]));
+				}
+
+				*rsn_len=in_ie[cnt+1]+2;
+				cnt+=in_ie[cnt+1]+2;  //get next
+			}
+			else
+			{
+				cnt+=in_ie[cnt+1]+2;   //get next
+			}	
+		}
+		
+	}
+	
+_func_exit_;
+
+	return (*rsn_len+*wpa_len);
+	
+}
+
+u8 rtw_is_wps_ie(u8 *ie_ptr, uint *wps_ielen)
+{	
+	u8 match = _FALSE;
+	u8 eid, wps_oui[4]={0x0,0x50,0xf2,0x04};
+	
+	if(ie_ptr == NULL) return match;
+	
+	eid = ie_ptr[0];
+	
+	if((eid==_WPA_IE_ID_)&&(_rtw_memcmp(&ie_ptr[2], wps_oui, 4)==_TRUE))
+	{			
+		//printk("==> found WPS_IE.....\n");		
+		*wps_ielen = ie_ptr[1]+2;			
+		match=_TRUE;
+	}	
+	return match;
+}
+
+u8 *rtw_get_wps_ie(u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps_ielen)
+{
+	//int match;	
+	uint cnt;	
+	u8 *wpsie_ptr=NULL;
+	u8 eid, wps_oui[4]={0x0,0x50,0xf2,0x04};
+
+	cnt=_FIXED_IE_LENGTH_;	
+	//match=_FALSE;
+	while(cnt<in_len)
+	{
+		eid = in_ie[cnt];
+
+		if((eid==_WPA_IE_ID_)&&(_rtw_memcmp(&in_ie[cnt+2], wps_oui, 4)==_TRUE))
+		{
+			if(wps_ie)
+			_rtw_memcpy(wps_ie, &in_ie[cnt], in_ie[cnt+1]+2);
+			
+			wpsie_ptr = &in_ie[cnt];
+			
+			if(wps_ielen)
+				*wps_ielen = in_ie[cnt+1]+2;
+			
+			cnt+=in_ie[cnt+1]+2;
+
+			//match = _TRUE;
+			break;
+		}
+		else
+		{
+			cnt+=in_ie[cnt+1]+2; //goto next	
+		}		
+
+	}	
+
+	//return match;
+	return wpsie_ptr;
+
+}
+
+static int rtw_ieee802_11_parse_vendor_specific(u8 *pos, uint elen,
+					    struct ieee802_11_elems *elems,
+					    int show_errors)
+{
+	unsigned int oui;
+
+	/* first 3 bytes in vendor specific information element are the IEEE
+	 * OUI of the vendor. The following byte is used a vendor specific
+	 * sub-type. */
+	if (elen < 4) {
+		if (show_errors) {
+			DBG_871X("short vendor specific "
+				   "information element ignored (len=%lu)\n",
+				   (unsigned long) elen);
+		}
+		return -1;
+	}
+
+	oui = RTW_GET_BE24(pos);
+	switch (oui) {
+	case OUI_MICROSOFT:
+		/* Microsoft/Wi-Fi information elements are further typed and
+		 * subtyped */
+		switch (pos[3]) {
+		case 1:
+			/* Microsoft OUI (00:50:F2) with OUI Type 1:
+			 * real WPA information element */
+			elems->wpa_ie = pos;
+			elems->wpa_ie_len = elen;
+			break;
+		case WME_OUI_TYPE: /* this is a Wi-Fi WME info. element */
+			if (elen < 5) {
+				DBG_871X("short WME "
+					   "information element ignored "
+					   "(len=%lu)\n",
+					   (unsigned long) elen);
+				return -1;
+			}
+			switch (pos[4]) {
+			case WME_OUI_SUBTYPE_INFORMATION_ELEMENT:
+			case WME_OUI_SUBTYPE_PARAMETER_ELEMENT:
+				elems->wme = pos;
+				elems->wme_len = elen;
+				break;
+			case WME_OUI_SUBTYPE_TSPEC_ELEMENT:
+				elems->wme_tspec = pos;
+				elems->wme_tspec_len = elen;
+				break;
+			default:
+				DBG_871X("unknown WME "
+					   "information element ignored "
+					   "(subtype=%d len=%lu)\n",
+					   pos[4], (unsigned long) elen);
+				return -1;
+			}
+			break;
+		case 4:
+			/* Wi-Fi Protected Setup (WPS) IE */
+			elems->wps_ie = pos;
+			elems->wps_ie_len = elen;
+			break;
+		default:
+			DBG_871X("Unknown Microsoft "
+				   "information element ignored "
+				   "(type=%d len=%lu)\n",
+				   pos[3], (unsigned long) elen);
+			return -1;
+		}
+		break;
+
+	case OUI_BROADCOM:
+		switch (pos[3]) {
+		case VENDOR_HT_CAPAB_OUI_TYPE:
+			elems->vendor_ht_cap = pos;
+			elems->vendor_ht_cap_len = elen;
+			break;
+		default:
+			DBG_871X("Unknown Broadcom "
+				   "information element ignored "
+				   "(type=%d len=%lu)\n",
+				   pos[3], (unsigned long) elen);
+			return -1;
+		}
+		break;
+
+	default:
+		DBG_871X("unknown vendor specific information "
+			   "element ignored (vendor OUI %02x:%02x:%02x "
+			   "len=%lu)\n",
+			   pos[0], pos[1], pos[2], (unsigned long) elen);
+		return -1;
+	}
+
+	return 0;
+	
+}
+
+/**
+ * ieee802_11_parse_elems - Parse information elements in management frames
+ * @start: Pointer to the start of IEs
+ * @len: Length of IE buffer in octets
+ * @elems: Data structure for parsed elements
+ * @show_errors: Whether to show parsing errors in debug log
+ * Returns: Parsing result
+ */
+ParseRes rtw_ieee802_11_parse_elems(u8 *start, uint len,
+				struct ieee802_11_elems *elems,
+				int show_errors)
+{
+	uint left = len;
+	u8 *pos = start;
+	int unknown = 0;
+
+	_rtw_memset(elems, 0, sizeof(*elems));
+
+	while (left >= 2) {
+		u8 id, elen;
+
+		id = *pos++;
+		elen = *pos++;
+		left -= 2;
+
+		if (elen > left) {
+			if (show_errors) {
+				DBG_871X("IEEE 802.11 element "
+					   "parse failed (id=%d elen=%d "
+					   "left=%lu)\n",
+					   id, elen, (unsigned long) left);				
+			}
+			return ParseFailed;
+		}
+
+		switch (id) {
+		case WLAN_EID_SSID:
+			elems->ssid = pos;
+			elems->ssid_len = elen;
+			break;
+		case WLAN_EID_SUPP_RATES:
+			elems->supp_rates = pos;
+			elems->supp_rates_len = elen;
+			break;
+		case WLAN_EID_FH_PARAMS:
+			elems->fh_params = pos;
+			elems->fh_params_len = elen;
+			break;
+		case WLAN_EID_DS_PARAMS:
+			elems->ds_params = pos;
+			elems->ds_params_len = elen;
+			break;
+		case WLAN_EID_CF_PARAMS:
+			elems->cf_params = pos;
+			elems->cf_params_len = elen;
+			break;
+		case WLAN_EID_TIM:
+			elems->tim = pos;
+			elems->tim_len = elen;
+			break;
+		case WLAN_EID_IBSS_PARAMS:
+			elems->ibss_params = pos;
+			elems->ibss_params_len = elen;
+			break;
+		case WLAN_EID_CHALLENGE:
+			elems->challenge = pos;
+			elems->challenge_len = elen;
+			break;
+		case WLAN_EID_ERP_INFO:
+			elems->erp_info = pos;
+			elems->erp_info_len = elen;
+			break;
+		case WLAN_EID_EXT_SUPP_RATES:
+			elems->ext_supp_rates = pos;
+			elems->ext_supp_rates_len = elen;
+			break;
+		case WLAN_EID_VENDOR_SPECIFIC:
+			if (rtw_ieee802_11_parse_vendor_specific(pos, elen,
+							     elems,
+							     show_errors))
+				unknown++;
+			break;
+		case WLAN_EID_RSN:
+			elems->rsn_ie = pos;
+			elems->rsn_ie_len = elen;
+			break;
+		case WLAN_EID_PWR_CAPABILITY:
+			elems->power_cap = pos;
+			elems->power_cap_len = elen;
+			break;
+		case WLAN_EID_SUPPORTED_CHANNELS:
+			elems->supp_channels = pos;
+			elems->supp_channels_len = elen;
+			break;
+		case WLAN_EID_MOBILITY_DOMAIN:
+			elems->mdie = pos;
+			elems->mdie_len = elen;
+			break;
+		case WLAN_EID_FAST_BSS_TRANSITION:
+			elems->ftie = pos;
+			elems->ftie_len = elen;
+			break;
+		case WLAN_EID_TIMEOUT_INTERVAL:
+			elems->timeout_int = pos;
+			elems->timeout_int_len = elen;
+			break;
+		case WLAN_EID_HT_CAP:
+			elems->ht_capabilities = pos;
+			elems->ht_capabilities_len = elen;
+			break;
+		case WLAN_EID_HT_OPERATION:
+			elems->ht_operation = pos;
+			elems->ht_operation_len = elen;
+			break;
+		default:
+			unknown++;
+			if (!show_errors)
+				break;
+			DBG_871X("IEEE 802.11 element parse "
+				   "ignored unknown element (id=%d elen=%d)\n",
+				   id, elen);
+			break;
+		}
+
+		left -= elen;
+		pos += elen;
+	}
+
+	if (left)
+		return ParseFailed;
+
+	return unknown ? ParseUnknown : ParseOK;
+	
+}
+
+u8 key_char2num(u8 ch)
+{
+    if((ch>='0')&&(ch<='9'))
+        return ch - '0';
+    else if ((ch>='a')&&(ch<='f'))
+        return ch - 'a' + 10;
+    else if ((ch>='A')&&(ch<='F'))
+        return ch - 'A' + 10;
+    else
+	 return 0xff;
+}
+
+u8 str_2char2num(u8 hch, u8 lch)
+{
+    return ((key_char2num(hch) * 10 ) + key_char2num(lch));
+}
+
+u8 key_2char2num(u8 hch, u8 lch)
+{
+    return ((key_char2num(hch) << 4) | key_char2num(lch));
+}
+
+extern char* rtw_initmac;
+void rtw_macaddr_cfg(u8 *mac_addr)
+{
+	u8 mac[ETH_ALEN];
+	if(mac_addr == NULL)	return;
+	
+	if ( rtw_initmac )
+	{	//	Users specify the mac address
+		int jj,kk;
+
+		for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3 )
+		{
+			mac[jj] = key_2char2num(rtw_initmac[kk], rtw_initmac[kk+ 1]);
+		}
+		_rtw_memcpy(mac_addr, mac, ETH_ALEN);
+	}
+	else
+	{	//	Use the mac address stored in the Efuse
+		_rtw_memcpy(mac, mac_addr, ETH_ALEN);
+	}
+	
+	if (((mac[0]==0xff) &&(mac[1]==0xff) && (mac[2]==0xff) &&
+	     (mac[3]==0xff) && (mac[4]==0xff) &&(mac[5]==0xff)) ||
+	    ((mac[0]==0x0) && (mac[1]==0x0) && (mac[2]==0x0) &&
+	     (mac[3]==0x0) && (mac[4]==0x0) &&(mac[5]==0x0)))
+	{
+		mac[0] = 0x00;
+		mac[1] = 0xe0;
+		mac[2] = 0x4c;
+		mac[3] = 0x87;
+		mac[4] = 0x00;
+		mac[5] = 0x00;
+		// use default mac addresss
+		_rtw_memcpy(mac_addr, mac, ETH_ALEN);
+		DBG_8192C("MAC Address from efuse error, assign default one !!!\n");
+	}	
+
+	DBG_8192C("rtw_macaddr_cfg MAC Address  = "MAC_FMT"\n", MAC_ARG(mac_addr));
+}
+
+#ifdef CONFIG_P2P
+//	Added by Albert 20100910
+//	The input buffer in_ie should be pointer to the address of any information element of management frame.
+//	The p2p_ie buffer will contain "whole" the P2P IE, include the Element ID, Length, P2P OUI and P2P Attributes.
+//	The p2p_ielen will be the length of p2p_ie buffer.
+//	The return value will be the offset for the next IE.
+
+int rtw_get_p2p_ie(u8 *in_ie, uint in_len, u8 *p2p_ie, uint *p2p_ielen)
+{
+	int match;
+	uint cnt = 0;	
+	u8 eid, p2p_oui[4]={0x50,0x6F,0x9A,0x09};
+
+
+	match=_FALSE;
+	while(cnt<in_len)
+	{
+		eid = in_ie[cnt];
+		
+		if( ( eid == _VENDOR_SPECIFIC_IE_ ) && ( _rtw_memcmp( &in_ie[cnt+2], p2p_oui, 4) == _TRUE ) )
+		{
+			if ( p2p_ie != NULL )
+			{
+				_rtw_memcpy( p2p_ie, &in_ie[ cnt ], in_ie[ cnt + 1 ] + 2 );
+				if ( p2p_ielen != NULL )
+				{
+					*p2p_ielen = in_ie[ cnt + 1 ] + 2;
+				}
+			}
+			else
+			{
+				if ( p2p_ielen != NULL )
+				{
+					*p2p_ielen = 0;
+				}
+			}
+			
+			cnt += in_ie[ cnt + 1 ] + 2;
+
+			match = _TRUE;
+			break;
+		}
+		else
+		{
+			cnt += in_ie[ cnt + 1 ] +2; //goto next	
+		}		
+		
+	}	
+
+	if ( match == _TRUE )
+	{
+		match = cnt;
+	}
+	
+	return match;
+
+}
+
+//	attr_content: The output buffer, contains the "body field" of P2P attribute.
+//	attr_contentlen: The data length of the "body field" of P2P attribute.
+int rtw_get_p2p_attr_content(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id ,u8 *attr_content, uint *attr_contentlen)
+{
+	int match;
+	uint cnt = 0;	
+	u8 attr_id, p2p_oui[4]={0x50,0x6F,0x9A,0x09};
+
+
+	match=_FALSE;
+
+	if ( ( p2p_ie[ 0 ] != _VENDOR_SPECIFIC_IE_ ) ||
+		( _rtw_memcmp( p2p_ie + 2, p2p_oui , 4 ) != _TRUE ) )
+	{
+		return( match );
+	}
+
+	//	1 ( P2P IE ) + 1 ( Length ) + 3 ( OUI ) + 1 ( OUI Type )
+	cnt = 6;
+	while( cnt < p2p_ielen )
+	{
+		//u16	attrlen = le16_to_cpu(*(u16*)(p2p_ie + cnt + 1 ));
+		u16 attrlen = RTW_GET_LE16(p2p_ie + cnt + 1);
+		
+		attr_id = p2p_ie[cnt];
+		if( attr_id == target_attr_id )
+		{
+			//	3 -> 1 byte for attribute ID field, 2 bytes for length field
+			if(attr_content)
+				_rtw_memcpy( attr_content, &p2p_ie[ cnt + 3 ], attrlen );
+			
+			if(attr_contentlen)
+				*attr_contentlen = attrlen;
+			
+			cnt += attrlen + 3;
+
+			match = _TRUE;
+			break;
+		}
+		else
+		{
+			cnt += attrlen + 3; //goto next	
+		}		
+		
+	}	
+
+	return match;
+
+}
+
+u32 rtw_set_p2p_attr_content(u8 *pbuf, u8 attr_id, u16 attr_len, u8 *pdata_attr)
+{	
+	u32 a_len;
+
+	*pbuf = attr_id;
+		
+	//*(u16*)(pbuf + 1) = cpu_to_le16(attr_len);
+	RTW_PUT_LE16(pbuf + 1, attr_len);
+
+	if(pdata_attr)
+		_rtw_memcpy(pbuf + 3, pdata_attr, attr_len);		
+		
+	a_len = attr_len + 3;
+		
+	return a_len;
+}
+
+//	Noted by Albert 20100910
+//	1. WPS uses the TLV format to store the attribute contents.
+//	T: Type, 2bytes length
+//	L: Length, 2bytes length
+//	V: Value, variable length
+//	2. WPS uses the big endian to store the WPS attribute contents.
+
+//	attr_content: The output buffer, contains the "value part" of WPS attribute field.
+//	attr_contentlen: The data length of the "value part" of WPS attribute field.
+
+int rtw_get_wps_attr_content(u8 *wps_ie, uint wps_ielen, u16 target_attr_id ,u8 *attr_content, uint *attr_contentlen)
+{
+	int match;
+	uint cnt = 0;	
+	u8 wps_oui[4]={0x00,0x50,0xF2,0x04};
+	u16	attr_id;
+
+
+	match=_FALSE;
+
+	if ( ( wps_ie[ 0 ] != _VENDOR_SPECIFIC_IE_ ) ||
+		( _rtw_memcmp( wps_ie + 2, wps_oui , 4 ) != _TRUE ) )
+	{
+		return( match );
+	}
+
+	//	1 ( WPS IE ) + 1 ( Length ) + 4 ( WPS OUI )
+	cnt = 6;
+	while( cnt < wps_ielen )
+	{
+		//	2 -> the length of WPS attribute type field.
+		//u16	attrlen = be16_to_cpu(*(u16*)(wps_ie + cnt + 2 ));
+		u16	attrlen = RTW_GET_BE16(wps_ie + cnt + 2);
+		
+		//attr_id = be16_to_cpu( *(u16*) ( wps_ie + cnt ) );
+		attr_id = RTW_GET_BE16(wps_ie + cnt);
+		if( attr_id == target_attr_id )
+		{
+			//	3 -> 1 byte for attribute ID field, 2 bytes for length field
+			_rtw_memcpy( attr_content, &wps_ie[ cnt + 4 ], attrlen );
+			
+			*attr_contentlen = attrlen;
+			
+			cnt += attrlen + 4;
+
+			match = _TRUE;
+			break;
+		}
+		else
+		{
+			cnt += attrlen + 4; //goto next	
+		}		
+		
+	}	
+
+	return match;
+
+}
+
+//	Commented by Albert 20110520
+//	This function is only used by P2P
+int rtw_get_wps_ie_p2p(u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps_ielen)
+{
+	int match;
+	uint cnt = 0;
+	u8 eid, wps_oui[4]={0x0,0x50,0xf2,0x04};
+
+	match=_FALSE;
+	while(cnt<in_len)
+	{
+		eid = in_ie[cnt];
+		
+		if((eid==_WPA_IE_ID_)&&(_rtw_memcmp(&in_ie[cnt+2], wps_oui, 4)==_TRUE))
+		{
+			if ( wps_ie != NULL )
+			{
+				_rtw_memcpy(wps_ie, &in_ie[cnt], in_ie[cnt+1]+2);
+			}
+			
+			*wps_ielen = in_ie[cnt+1]+2;
+			
+			cnt+=in_ie[cnt+1]+2;
+
+			match = _TRUE;
+			break;
+		}
+		else
+		{
+			cnt+=in_ie[cnt+1]+2; //goto next	
+		}		
+		
+	}	
+
+	return match;
+
+}
+
+#ifdef CONFIG_WFD
+int rtw_get_wfd_ie(u8 *in_ie, uint in_len, u8 *wfd_ie, uint *wfd_ielen)
+{
+	int match;
+	uint cnt = 0;	
+	u8 eid, wfd_oui[4]={0x50,0x6F,0x9A,0x0A};
+
+
+	match=_FALSE;
+	while(cnt<in_len)
+	{
+		eid = in_ie[cnt];
+		
+		if( ( eid == _VENDOR_SPECIFIC_IE_ ) && ( _rtw_memcmp( &in_ie[cnt+2], wfd_oui, 4) == _TRUE ) )
+		{
+			if ( wfd_ie != NULL )
+			{
+				_rtw_memcpy( wfd_ie, &in_ie[ cnt ], in_ie[ cnt + 1 ] + 2 );
+				if ( wfd_ielen != NULL )
+				{
+					*wfd_ielen = in_ie[ cnt + 1 ] + 2;
+				}
+			}
+			else
+			{
+				if ( wfd_ielen != NULL )
+				{
+					*wfd_ielen = 0;
+				}
+			}
+			
+			cnt += in_ie[ cnt + 1 ] + 2;
+
+			match = _TRUE;
+			break;
+		}
+		else
+		{
+			cnt += in_ie[ cnt + 1 ] +2; //goto next	
+		}		
+		
+	}	
+
+	if ( match == _TRUE )
+	{
+		match = cnt;
+	}
+	
+	return match;
+
+}
+
+//	attr_content: The output buffer, contains the "body field" of WFD attribute.
+//	attr_contentlen: The data length of the "body field" of WFD attribute.
+int rtw_get_wfd_attr_content(u8 *wfd_ie, uint wfd_ielen, u8 target_attr_id ,u8 *attr_content, uint *attr_contentlen)
+{
+	int match;
+	uint cnt = 0;	
+	u8 attr_id, wfd_oui[4]={0x50,0x6F,0x9A,0x0A};
+
+
+	match=_FALSE;
+
+	if ( ( wfd_ie[ 0 ] != _VENDOR_SPECIFIC_IE_ ) ||
+		( _rtw_memcmp( wfd_ie + 2, wfd_oui , 4 ) != _TRUE ) )
+	{
+		return( match );
+	}
+
+	//	1 ( WFD IE ) + 1 ( Length ) + 3 ( OUI ) + 1 ( OUI Type )
+	cnt = 6;
+	while( cnt < wfd_ielen )
+	{
+		//u16	attrlen = le16_to_cpu(*(u16*)(p2p_ie + cnt + 1 ));
+		u16 attrlen = RTW_GET_LE16(wfd_ie + cnt + 1);
+		
+		attr_id = wfd_ie[cnt];
+		if( attr_id == target_attr_id )
+		{
+			//	2 -> 1 byte for attribute ID field, 1 bytes for length field
+			if(attr_content)
+			_rtw_memcpy( attr_content, &wfd_ie[ cnt + 2 ], attrlen );
+			
+			if(attr_contentlen)
+			*attr_contentlen = attrlen;
+			
+			cnt += attrlen + 2;
+
+			match = _TRUE;
+			break;
+		}
+		else
+		{
+			cnt += attrlen + 2; //goto next	
+		}		
+		
+	}	
+
+	return match;
+
+}
+
+
+#endif // CONFIG_WFD
+#endif // CONFIG_P2P
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_io.c linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_io.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_io.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_io.c	2017-09-23 03:42:49.878675492 +0800
@@ -0,0 +1,490 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+/*
+
+The purpose of rtw_io.c
+
+a. provides the API 
+
+b. provides the protocol engine
+
+c. provides the software interface between caller and the hardware interface
+
+
+Compiler Flag Option:
+
+1. CONFIG_SDIO_HCI:
+    a. USE_SYNC_IRP:  Only sync operations are provided.
+    b. USE_ASYNC_IRP:Both sync/async operations are provided.
+
+2. CONFIG_USB_HCI:
+   a. USE_ASYNC_IRP: Both sync/async operations are provided.
+
+3. CONFIG_CFIO_HCI:
+   b. USE_SYNC_IRP: Only sync operations are provided.
+
+
+Only sync read/rtw_write_mem operations are provided.
+
+jackson@realtek.com.tw
+
+*/
+
+#define _RTW_IO_C_
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtw_io.h>
+#include <osdep_intf.h>
+
+#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
+#error "Shall be Linux or Windows, but not both!\n"
+#endif
+
+#ifdef CONFIG_SDIO_HCI
+#include <sdio_ops.h>
+#endif
+
+#ifdef CONFIG_USB_HCI
+#include <usb_ops.h>
+#endif
+
+#ifdef CONFIG_PCI_HCI
+#include <pci_ops.h>
+#endif
+
+
+u8 _rtw_read8(_adapter *adapter, u32 addr)
+{
+	u8 r_val;
+	//struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue;
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+	u8 (*_read8)(struct intf_hdl *pintfhdl, u32 addr);
+	_func_enter_;
+	_read8 = pintfhdl->io_ops._read8;
+
+	r_val = _read8(pintfhdl, addr);
+	_func_exit_;
+	return r_val;
+}
+
+u16 _rtw_read16(_adapter *adapter, u32 addr)
+{
+	u16 r_val;
+	//struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue;
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+	u16 	(*_read16)(struct intf_hdl *pintfhdl, u32 addr);
+	_func_enter_;
+	_read16 = pintfhdl->io_ops._read16;
+
+	r_val = _read16(pintfhdl, addr);
+	_func_exit_;
+	return r_val;
+}
+	
+u32 _rtw_read32(_adapter *adapter, u32 addr)
+{
+	u32 r_val;
+	//struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue;
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+	u32 	(*_read32)(struct intf_hdl *pintfhdl, u32 addr);
+	_func_enter_;
+	_read32 = pintfhdl->io_ops._read32;
+
+	r_val = _read32(pintfhdl, addr);
+	_func_exit_;
+	return r_val;	
+
+}
+
+int _rtw_write8(_adapter *adapter, u32 addr, u8 val)
+{
+	//struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue;
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+	int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
+	int ret;
+	_func_enter_;
+	_write8 = pintfhdl->io_ops._write8;
+
+	ret = _write8(pintfhdl, addr, val);
+	_func_exit_;
+	
+	return RTW_STATUS_CODE(ret);
+}
+int _rtw_write16(_adapter *adapter, u32 addr, u16 val)
+{
+	//struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue;
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+	int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
+	int ret;
+	_func_enter_;
+	_write16 = pintfhdl->io_ops._write16;
+	
+	ret = _write16(pintfhdl, addr, val);
+	_func_exit_;
+
+	return RTW_STATUS_CODE(ret);
+}
+int _rtw_write32(_adapter *adapter, u32 addr, u32 val)
+{
+	//struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue;
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+	int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
+	int ret;
+	_func_enter_;
+	_write32 = pintfhdl->io_ops._write32;
+
+	ret = _write32(pintfhdl, addr, val);
+	_func_exit_;
+
+	return RTW_STATUS_CODE(ret);
+}
+
+int _rtw_writeN(_adapter *adapter, u32 addr ,u32 length , u8 *pdata)
+{
+	//struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue;
+	struct io_priv *pio_priv = &adapter->iopriv;
+        struct	intf_hdl	*pintfhdl = (struct intf_hdl*)(&(pio_priv->intf));
+	int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr,u32 length, u8 *pdata);
+	int ret;
+	_func_enter_;
+	_writeN = pintfhdl->io_ops._writeN;
+
+	ret = _writeN(pintfhdl, addr,length,pdata);	
+	_func_exit_;
+
+	return RTW_STATUS_CODE(ret);
+}
+int _rtw_write8_async(_adapter *adapter, u32 addr, u8 val)
+{
+	//struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue;
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+	int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
+	int ret;
+	_func_enter_;
+	_write8_async = pintfhdl->io_ops._write8_async;
+	
+	ret = _write8_async(pintfhdl, addr, val);	
+	_func_exit_;
+
+	return RTW_STATUS_CODE(ret);
+}
+int _rtw_write16_async(_adapter *adapter, u32 addr, u16 val)
+{
+	//struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue;
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+	int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
+	int ret;
+	_func_enter_;
+	_write16_async = pintfhdl->io_ops._write16_async;
+	
+	ret = _write16_async(pintfhdl, addr, val);	
+	_func_exit_;
+
+	return RTW_STATUS_CODE(ret);
+}
+int _rtw_write32_async(_adapter *adapter, u32 addr, u32 val)
+{
+	//struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue;
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+	int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
+	int ret;
+	_func_enter_;
+	_write32_async = pintfhdl->io_ops._write32_async;
+	
+	ret = _write32_async(pintfhdl, addr, val);	
+	_func_exit_;
+
+	return RTW_STATUS_CODE(ret);
+}
+void _rtw_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
+{
+	void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);	
+	//struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue;
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+	
+	_func_enter_;
+
+	if( (adapter->bDriverStopped ==_TRUE) || (adapter->bSurpriseRemoved == _TRUE))
+	{
+	     RT_TRACE(_module_rtl871x_io_c_, _drv_info_, ("rtw_read_mem:bDriverStopped(%d) OR bSurpriseRemoved(%d)", adapter->bDriverStopped, adapter->bSurpriseRemoved));	    
+	     return;
+	}	
+	
+	_read_mem = pintfhdl->io_ops._read_mem;
+	
+	_read_mem(pintfhdl, addr, cnt, pmem);
+	
+	_func_exit_;
+	
+}
+
+void _rtw_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
+{	
+	void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);	
+	//struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue;
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+
+	_func_enter_;
+	
+	_write_mem = pintfhdl->io_ops._write_mem;
+	
+	_write_mem(pintfhdl, addr, cnt, pmem);
+	
+	_func_exit_;	
+	
+}
+
+void _rtw_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
+{	
+	u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);	
+	//struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue;
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+	
+	_func_enter_;	
+
+	if( (adapter->bDriverStopped ==_TRUE) || (adapter->bSurpriseRemoved == _TRUE))
+	{
+	     RT_TRACE(_module_rtl871x_io_c_, _drv_info_, ("rtw_read_port:bDriverStopped(%d) OR bSurpriseRemoved(%d)", adapter->bDriverStopped, adapter->bSurpriseRemoved));	    
+	     return;
+	}	
+
+	_read_port = pintfhdl->io_ops._read_port;
+	
+	_read_port(pintfhdl, addr, cnt, pmem);
+	 
+	_func_exit_;
+
+}
+
+void _rtw_read_port_cancel(_adapter *adapter)
+{
+	void (*_read_port_cancel)(struct intf_hdl *pintfhdl);
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct intf_hdl *pintfhdl = &(pio_priv->intf);
+	
+	_read_port_cancel = pintfhdl->io_ops._read_port_cancel;
+
+	if(_read_port_cancel)
+		_read_port_cancel(pintfhdl);	
+			
+}
+
+void _rtw_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
+{	
+	u32 (*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
+	//struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue;
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+	
+	_func_enter_;	
+	
+	_write_port = pintfhdl->io_ops._write_port;
+	
+	_write_port(pintfhdl, addr, cnt, pmem);
+	
+	 _func_exit_;
+	 
+}
+
+int _rtw_write_port_sync(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
+{
+	int (*_write_port_sync)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
+	//struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue;
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+	int ret = _SUCCESS;
+	
+	_func_enter_;
+
+	_write_port_sync = pintfhdl->io_ops._write_port_sync;
+
+	if(_write_port_sync)
+		ret = _write_port_sync(pintfhdl, addr, cnt, pmem);
+	else
+		ret = _FAIL;
+
+	_func_exit_;
+
+	return ret;
+}
+
+void _rtw_write_port_cancel(_adapter *adapter)
+{
+	void (*_write_port_cancel)(struct intf_hdl *pintfhdl);
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct intf_hdl *pintfhdl = &(pio_priv->intf);
+	
+	_write_port_cancel = pintfhdl->io_ops._write_port_cancel;
+
+	if(_write_port_cancel)
+		_write_port_cancel(pintfhdl);	
+
+}
+
+
+void _rtw_attrib_read(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem){
+#ifdef CONFIG_SDIO_HCI
+	void (*_attrib_read)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
+	
+	//struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue;
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+	
+	_func_enter_;	
+	
+	_attrib_read= pintfhdl->io_ops._attrib_read;
+	
+	_attrib_read(pintfhdl, addr, cnt, pmem);
+	
+	 _func_exit_;
+#endif
+}
+
+void _rtw_attrib_write(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem){
+#ifdef CONFIG_SDIO_HCI
+	void (*_attrib_write)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
+	
+	//struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue;
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+	
+	_func_enter_;	
+	
+	_attrib_write= pintfhdl->io_ops._attrib_write;
+	
+	_attrib_write(pintfhdl, addr, cnt, pmem);
+	
+	 _func_exit_;
+
+#endif
+}
+
+int rtw_init_io_priv(_adapter *padapter)
+{	
+	void (*set_intf_ops)(struct _io_ops	*pops);
+	struct io_priv	*piopriv = &padapter->iopriv;
+	struct intf_hdl *pintf = &piopriv->intf;
+
+	piopriv->padapter = padapter;
+	pintf->padapter = padapter;
+	pintf->pintf_dev = &padapter->dvobjpriv;
+
+	
+#ifdef CONFIG_SDIO_HCI	
+	set_intf_ops = &sdio_set_intf_ops;	
+#endif //END OF CONFIG_SDIO_HCI
+
+
+#ifdef CONFIG_USB_HCI	
+
+	if(padapter->chip_type == RTL8188C_8192C)
+	{
+#ifdef CONFIG_RTL8192C
+		set_intf_ops = &rtl8192cu_set_intf_ops;
+#endif
+	}
+	else if(padapter->chip_type == RTL8192D)
+	{
+#ifdef CONFIG_RTL8192D
+		set_intf_ops = &rtl8192du_set_intf_ops;
+#endif		
+	}
+	else
+	{
+		set_intf_ops = NULL;		
+	}
+#endif //END OF CONFIG_USB_HCI
+
+#ifdef CONFIG_PCI_HCI
+
+	if(padapter->chip_type == RTL8188C_8192C)
+	{
+#ifdef CONFIG_RTL8192C
+		set_intf_ops = &rtl8192ce_set_intf_ops;
+#endif
+	}
+	else if(padapter->chip_type == RTL8192D)
+	{
+#ifdef CONFIG_RTL8192D
+		set_intf_ops = &rtl8192de_set_intf_ops;
+#endif		
+	}
+	else
+	{
+		set_intf_ops = NULL;		
+	}
+#endif //END OF CONFIG_PCI_HCI
+
+
+	if(set_intf_ops==NULL)
+		return _FAIL;
+
+	set_intf_ops(&pintf->io_ops);
+
+	return _SUCCESS;
+
+}
+
+#ifdef DBG_IO
+int dbg_rtw_write8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line)
+{
+	if(addr + 1 > DBG_IO_WRITE_SNIFF_ADDR_START && addr <= DBG_IO_WRITE_SNIFF_ADDR_END)
+		DBG_871X("DBG_IO %s:%d rtw_write8(0x%04x, 0x%02x)\n", caller, line, addr, val);
+	
+	return _rtw_write8(adapter, addr, val);
+}
+int dbg_rtw_write16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line)
+{
+	if(addr + 2 > DBG_IO_WRITE_SNIFF_ADDR_START && addr <= DBG_IO_WRITE_SNIFF_ADDR_END)
+		DBG_871X("DBG_IO %s:%d rtw_write16(0x%04x, 0x%04x)\n", caller, line, addr, val);
+	
+	return _rtw_write16(adapter, addr, val);
+}
+int dbg_rtw_write32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line)
+{
+	if(addr + 4 > DBG_IO_WRITE_SNIFF_ADDR_START && addr <= DBG_IO_WRITE_SNIFF_ADDR_END)
+		DBG_871X("DBG_IO %s:%d rtw_write32(0x%04x, 0x%08x)\n", caller, line, addr, val);
+	
+	return _rtw_write32(adapter, addr, val);
+}
+int dbg_rtw_writeN(_adapter *adapter, u32 addr ,u32 length , u8 *data, const char *caller, const int line)
+{
+	if(addr + length> DBG_IO_WRITE_SNIFF_ADDR_START && addr <= DBG_IO_WRITE_SNIFF_ADDR_END)
+		DBG_871X("DBG_IO %s:%d rtw_writeN(0x%04x, %u)\n", caller, line, addr, length);
+
+	return _rtw_writeN(adapter, addr, length, data);
+}
+#endif
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_ioctl_query.c linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_ioctl_query.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_ioctl_query.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_ioctl_query.c	2017-09-23 03:42:49.878675492 +0800
@@ -0,0 +1,197 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#define _RTW_IOCTL_QUERY_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtw_ioctl_query.h>
+#include <wifi.h>
+
+
+#ifdef PLATFORM_WINDOWS
+//
+// Added for WPA2-PSK, by Annie, 2005-09-20.
+//
+u8
+query_802_11_capability(
+	_adapter*		Adapter,
+	u8*			pucBuf,
+	u32 *		pulOutLen
+)
+{
+	static NDIS_802_11_AUTHENTICATION_ENCRYPTION szAuthEnc[] = 
+	{
+		{Ndis802_11AuthModeOpen, Ndis802_11EncryptionDisabled}, 
+		{Ndis802_11AuthModeOpen, Ndis802_11Encryption1Enabled},
+		{Ndis802_11AuthModeShared, Ndis802_11EncryptionDisabled}, 
+		{Ndis802_11AuthModeShared, Ndis802_11Encryption1Enabled},
+		{Ndis802_11AuthModeWPA, Ndis802_11Encryption2Enabled}, 
+		{Ndis802_11AuthModeWPA, Ndis802_11Encryption3Enabled},
+		{Ndis802_11AuthModeWPAPSK, Ndis802_11Encryption2Enabled}, 
+		{Ndis802_11AuthModeWPAPSK, Ndis802_11Encryption3Enabled},
+		{Ndis802_11AuthModeWPANone, Ndis802_11Encryption2Enabled}, 
+		{Ndis802_11AuthModeWPANone, Ndis802_11Encryption3Enabled},
+		{Ndis802_11AuthModeWPA2, Ndis802_11Encryption2Enabled}, 
+		{Ndis802_11AuthModeWPA2, Ndis802_11Encryption3Enabled},
+		{Ndis802_11AuthModeWPA2PSK, Ndis802_11Encryption2Enabled}, 
+		{Ndis802_11AuthModeWPA2PSK, Ndis802_11Encryption3Enabled}
+	};	
+	static ULONG	ulNumOfPairSupported = sizeof(szAuthEnc)/sizeof(NDIS_802_11_AUTHENTICATION_ENCRYPTION);
+	NDIS_802_11_CAPABILITY * pCap = (NDIS_802_11_CAPABILITY *)pucBuf;
+	u8*	pucAuthEncryptionSupported = (u8*) pCap->AuthenticationEncryptionSupported;
+
+
+	pCap->Length = sizeof(NDIS_802_11_CAPABILITY);
+	if(ulNumOfPairSupported > 1 )
+		pCap->Length += 	(ulNumOfPairSupported-1) * sizeof(NDIS_802_11_AUTHENTICATION_ENCRYPTION);
+	
+	pCap->Version = 2;	
+	pCap->NoOfPMKIDs = NUM_PMKID_CACHE;	
+	pCap->NoOfAuthEncryptPairsSupported = ulNumOfPairSupported;
+
+	if( sizeof (szAuthEnc) <= 240 )		// 240 = 256 - 4*4	// SecurityInfo.szCapability: only 256 bytes in size.
+	{
+		_rtw_memcpy( pucAuthEncryptionSupported, (u8*)szAuthEnc,  sizeof (szAuthEnc) );
+		*pulOutLen = pCap->Length;
+		return _TRUE;
+	}
+	else
+	{
+		*pulOutLen = 0;
+		RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("_query_802_11_capability(): szAuthEnc size is too large.\n"));
+		return _FALSE;
+	}
+}
+
+u8 query_802_11_association_information(	_adapter *padapter,PNDIS_802_11_ASSOCIATION_INFORMATION	pAssocInfo)
+{
+	struct wlan_network *tgt_network;
+	struct	mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	struct	security_priv  *psecuritypriv=&(padapter->securitypriv);
+	WLAN_BSSID_EX	*psecnetwork=(WLAN_BSSID_EX*)&(psecuritypriv->sec_bss);					
+	u8 *	pDest = (u8 *)pAssocInfo + sizeof(NDIS_802_11_ASSOCIATION_INFORMATION);
+	unsigned char i,*auth_ie,*supp_ie;
+
+	//NdisZeroMemory(pAssocInfo, sizeof(NDIS_802_11_ASSOCIATION_INFORMATION));
+	_rtw_memset(pAssocInfo, 0, sizeof(NDIS_802_11_ASSOCIATION_INFORMATION));
+	//pAssocInfo->Length = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION);
+
+	//------------------------------------------------------
+	// Association Request related information
+	//------------------------------------------------------
+	// Req_1. AvailableRequestFixedIEs
+	if(psecnetwork!=NULL){
+		
+	pAssocInfo->AvailableRequestFixedIEs |= NDIS_802_11_AI_REQFI_CAPABILITIES|NDIS_802_11_AI_REQFI_CURRENTAPADDRESS;
+	pAssocInfo->RequestFixedIEs.Capabilities = (unsigned short)* & psecnetwork->IEs[10];
+	_rtw_memcpy(pAssocInfo->RequestFixedIEs.CurrentAPAddress,
+		& psecnetwork->MacAddress, 6);
+
+	pAssocInfo->OffsetRequestIEs = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION);
+
+	if(check_fwstate( pmlmepriv, _FW_UNDER_LINKING|_FW_LINKED)==_TRUE)
+	{
+		
+		if(psecuritypriv->ndisauthtype>=Ndis802_11AuthModeWPA2)
+			pDest[0] =48;		//RSN Information Element
+		else 
+			pDest[0] =221;	//WPA(SSN) Information Element
+		
+		RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("\n Adapter->ndisauthtype==Ndis802_11AuthModeWPA)?0xdd:0x30 [%d]",pDest[0]));
+		supp_ie=&psecuritypriv->supplicant_ie[0];
+		for(i=0;i<supp_ie[0];i++)
+		{
+			RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("IEs [%d] = 0x%x \n\n", i,supp_ie[i]));
+		}
+
+		i=13;	//0~11 is fixed information element		
+		RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("i= %d tgt_network->network.IELength=%d\n\n", i,(int)psecnetwork->IELength));
+		while((i<supp_ie[0]) && (i<256)){
+			if((unsigned char)supp_ie[i]==pDest[0]){
+						_rtw_memcpy((u8 *)(pDest),
+							&supp_ie[i], 
+							supp_ie[1+i]+2);
+			
+				break;
+			}
+			
+			i=i+supp_ie[i+1]+2;
+			if(supp_ie[1+i]==0)
+				i=i+1;
+			RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("iteration i=%d IEs [%d] = 0x%x \n\n", i,i,supp_ie[i+1]));
+			
+		}
+		
+
+		pAssocInfo->RequestIELength += (2 + supp_ie[1+i]);// (2 + psecnetwork->IEs[1+i]+4);
+
+	}
+	
+
+		RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("\n psecnetwork != NULL,fwstate==_FW_UNDER_LINKING \n"));
+
+	}
+	
+
+	//------------------------------------------------------
+	// Association Response related information
+	//------------------------------------------------------
+
+	if(check_fwstate( pmlmepriv, _FW_LINKED)==_TRUE)
+	{
+		tgt_network =&(pmlmepriv->cur_network);
+		if(tgt_network!=NULL){
+		pAssocInfo->AvailableResponseFixedIEs =
+				NDIS_802_11_AI_RESFI_CAPABILITIES
+				|NDIS_802_11_AI_RESFI_ASSOCIATIONID
+				;
+
+		pAssocInfo->ResponseFixedIEs.Capabilities =(unsigned short)* & tgt_network->network.IEs[10];
+		pAssocInfo->ResponseFixedIEs.StatusCode = 0;
+		pAssocInfo->ResponseFixedIEs.AssociationId =(unsigned short) tgt_network->aid;
+
+		pDest = (u8 *)pAssocInfo + sizeof(NDIS_802_11_ASSOCIATION_INFORMATION)+pAssocInfo->RequestIELength;
+		auth_ie=&psecuritypriv->authenticator_ie[0];
+
+		for(i=0;i<auth_ie[0];i++)
+			RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("IEs [%d] = 0x%x \n\n", i,auth_ie[i]));
+
+		i=auth_ie[0]-12;
+		if(i>0){
+			_rtw_memcpy((u8 *)&pDest[0],&auth_ie[1],i);
+			pAssocInfo->ResponseIELength =i; 
+		}
+
+
+		pAssocInfo->OffsetResponseIEs = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION) + pAssocInfo->RequestIELength;  
+
+
+		RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("\n tgt_network != NULL,fwstate==_FW_LINKED \n"));
+		}
+	}												  	
+	RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("\n exit query_802_11_association_information \n"));
+_func_exit_;
+
+	return _TRUE;
+}
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_ioctl_rtl.c linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_ioctl_rtl.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_ioctl_rtl.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_ioctl_rtl.c	2017-09-23 03:42:49.878675492 +0800
@@ -0,0 +1,1032 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#define  _RTW_IOCTL_RTL_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <wlan_bssdef.h>
+#include <wifi.h>
+#include <rtw_ioctl.h>
+#include <rtw_ioctl_set.h>
+#include <rtw_ioctl_query.h>
+#include <rtw_ioctl_rtl.h>
+#include <mp_custom_oid.h>
+#ifdef CONFIG_MP_INCLUDED
+#include <rtw_mp.h>
+#include <rtw_mp_ioctl.h>
+#endif
+
+struct oid_obj_priv oid_rtl_seg_01_01[] =
+{
+	{1, &oid_null_function},										//0x80
+	{1, &oid_null_function},										//0x81
+	{1, &oid_null_function},										//0x82
+	{1, &oid_null_function},										//0x83//OID_RT_SET_SNIFFER_MODE
+	{1, &oid_rt_get_signal_quality_hdl},							//0x84
+	{1, &oid_rt_get_small_packet_crc_hdl},						//0x85
+	{1, &oid_rt_get_middle_packet_crc_hdl},						//0x86
+	{1, &oid_rt_get_large_packet_crc_hdl},						//0x87
+	{1, &oid_rt_get_tx_retry_hdl},								//0x88
+	{1, &oid_rt_get_rx_retry_hdl},								//0x89
+	{1, &oid_rt_pro_set_fw_dig_state_hdl},						//0x8A
+	{1, &oid_rt_pro_set_fw_ra_state_hdl}	,						//0x8B
+	{1, &oid_null_function},										//0x8C
+	{1, &oid_null_function},										//0x8D
+	{1, &oid_null_function},										//0x8E
+	{1, &oid_null_function},										//0x8F
+	{1, &oid_rt_get_rx_total_packet_hdl},							//0x90
+	{1, &oid_rt_get_tx_beacon_ok_hdl},							//0x91
+	{1, &oid_rt_get_tx_beacon_err_hdl},							//0x92
+	{1, &oid_rt_get_rx_icv_err_hdl},								//0x93
+	{1, &oid_rt_set_encryption_algorithm_hdl},					//0x94
+	{1, &oid_null_function},										//0x95
+	{1, &oid_rt_get_preamble_mode_hdl},							//0x96
+	{1, &oid_null_function},										//0x97
+	{1, &oid_rt_get_ap_ip_hdl},									//0x98
+	{1, &oid_rt_get_channelplan_hdl},							//0x99	
+	{1, &oid_rt_set_preamble_mode_hdl},	 						//0x9A
+	{1, &oid_rt_set_bcn_intvl_hdl},								//0x9B
+	{1, &oid_null_function},										//0x9C
+	{1, &oid_rt_dedicate_probe_hdl},								//0x9D
+	{1, &oid_null_function},										//0x9E
+	{1, &oid_null_function},										//0x9F
+	{1, &oid_null_function},										//0xA0
+	{1, &oid_null_function},										//0xA1
+	{1, &oid_null_function},										//0xA2
+	{1, &oid_null_function},										//0xA3
+	{1, &oid_null_function},										//0xA4
+	{1, &oid_null_function},										//0xA5
+	{1, &oid_null_function},										//0xA6
+	{1, &oid_rt_get_total_tx_bytes_hdl},							//0xA7
+	{1, &oid_rt_get_total_rx_bytes_hdl},							//0xA8
+	{1, &oid_rt_current_tx_power_level_hdl},						//0xA9	
+	{1, &oid_rt_get_enc_key_mismatch_count_hdl},	 			//0xAA
+	{1, &oid_rt_get_enc_key_match_count_hdl},					//0xAB
+	{1, &oid_rt_get_channel_hdl},								//0xAC
+	{1, &oid_rt_set_channelplan_hdl},								//0xAD
+	{1, &oid_rt_get_hardware_radio_off_hdl},						//0xAE
+	{1, &oid_null_function},										//0xAF
+	{1, &oid_null_function},										//0xB0
+	{1, &oid_null_function},										//0xB1
+	{1, &oid_null_function},										//0xB2
+	{1, &oid_null_function},										//0xB3
+	{1, &oid_rt_get_key_mismatch_hdl},							//0xB4
+	{1, &oid_null_function},										//0xB5
+	{1, &oid_null_function},										//0xB6
+	{1, &oid_null_function},										//0xB7
+	{1, &oid_null_function},										//0xB8
+	{1, &oid_null_function},										//0xB9	
+	{1, &oid_null_function},	 									//0xBA
+	{1, &oid_rt_supported_wireless_mode_hdl},					//0xBB
+	{1, &oid_rt_get_channel_list_hdl},							//0xBC
+	{1, &oid_rt_get_scan_in_progress_hdl},						//0xBD
+	{1, &oid_null_function},										//0xBE
+	{1, &oid_null_function},										//0xBF
+	{1, &oid_null_function},										//0xC0
+	{1, &oid_rt_forced_data_rate_hdl},							//0xC1
+	{1, &oid_rt_wireless_mode_for_scan_list_hdl},					//0xC2
+	{1, &oid_rt_get_bss_wireless_mode_hdl},						//0xC3
+	{1, &oid_rt_scan_with_magic_packet_hdl},					//0xC4
+	{1, &oid_null_function},										//0xC5
+	{1, &oid_null_function},										//0xC6
+	{1, &oid_null_function},										//0xC7
+	{1, &oid_null_function},										//0xC8
+	{1, &oid_null_function},										//0xC9	
+	{1, &oid_null_function},	 									//0xCA
+	{1, &oid_null_function},										//0xCB
+	{1, &oid_null_function},										//0xCC
+	{1, &oid_null_function},										//0xCD
+	{1, &oid_null_function},										//0xCE
+	{1, &oid_null_function},										//0xCF
+	
+};
+
+struct oid_obj_priv oid_rtl_seg_01_03[] =
+{
+	{1, &oid_rt_ap_get_associated_station_list_hdl},				//0x00
+	{1, &oid_null_function},										//0x01
+	{1, &oid_rt_ap_switch_into_ap_mode_hdl},					//0x02
+	{1, &oid_null_function},										//0x03
+	{1, &oid_rt_ap_supported_hdl},								//0x04
+	{1, &oid_rt_ap_set_passphrase_hdl},							//0x05
+
+};
+
+struct oid_obj_priv oid_rtl_seg_01_11[] =
+{
+	{1, &oid_null_function},					//0xC0	OID_RT_PRO_RX_FILTER	
+	{1, &oid_null_function},					//0xC1	OID_CE_USB_WRITE_REGISTRY
+	{1, &oid_null_function},					//0xC2	OID_CE_USB_READ_REGISTRY
+	{1, &oid_null_function},					//0xC3	OID_RT_PRO_SET_INITIAL_GAIN
+	{1, &oid_null_function},					//0xC4	OID_RT_PRO_SET_BB_RF_STANDBY_MODE
+	{1, &oid_null_function},					//0xC5	OID_RT_PRO_SET_BB_RF_SHUTDOWN_MODE
+	{1, &oid_null_function},					//0xC6	OID_RT_PRO_SET_TX_CHARGE_PUMP
+	{1, &oid_null_function},					//0xC7	OID_RT_PRO_SET_RX_CHARGE_PUMP
+	{1, &oid_rt_pro_rf_write_registry_hdl},	//0xC8	
+	{1, &oid_rt_pro_rf_read_registry_hdl},	//0xC9	
+	{1, &oid_null_function}					//0xCA	OID_RT_PRO_QUERY_RF_TYPE
+	
+};
+
+struct oid_obj_priv oid_rtl_seg_03_00[] =
+{
+	{1, &oid_null_function},										//0x00
+	{1, &oid_rt_get_connect_state_hdl},							//0x01
+	{1, &oid_null_function},										//0x02
+	{1, &oid_null_function},										//0x03
+	{1, &oid_rt_set_default_key_id_hdl},							//0x04
+
+	
+};
+
+
+//**************  oid_rtl_seg_01_01 section start ************** 
+
+NDIS_STATUS oid_rt_pro_set_fw_dig_state_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+#if 0
+	PADAPTER		Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+	_irqL			oldirql;
+	
+	_func_enter_;
+	
+	if(poid_par_priv->type_of_oid != SET_OID) 
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+			
+	_irqlevel_changed_(&oldirql,LOWER);
+	if(poid_par_priv->information_buf_len >= sizeof(struct setdig_parm))
+	{
+		//DEBUG_ERR(("===> oid_rt_pro_set_fw_dig_state_hdl. type:0x%02x.\n",*((unsigned char*)poid_par_priv->information_buf )));	
+		if(!rtw_setfwdig_cmd(Adapter,*((unsigned char*)poid_par_priv->information_buf )))			
+		{
+			status = NDIS_STATUS_NOT_ACCEPTED;
+		}
+		                   
+	}
+	else{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+	}  
+	_irqlevel_changed_(&oldirql,RAISE);
+	_func_exit_;
+#endif
+	return status;
+}
+//-----------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_set_fw_ra_state_hdl(struct oid_par_priv* poid_par_priv)
+{
+
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+#if 0
+	PADAPTER		Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+	_irqL			oldirql;
+	
+	_func_enter_;	
+	if(poid_par_priv->type_of_oid != SET_OID) 
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+					
+	_irqlevel_changed_(&oldirql,LOWER);
+	
+	if(poid_par_priv->information_buf_len >= sizeof(struct setra_parm))
+	{
+		//DEBUG_ERR(("===> oid_rt_pro_set_fw_ra_state_hdl. type:0x%02x.\n",*((unsigned char*)poid_par_priv->information_buf )));	
+		if(!rtw_setfwra_cmd(Adapter,*((unsigned char*)poid_par_priv->information_buf )))			
+		{
+			status = NDIS_STATUS_NOT_ACCEPTED;
+		}
+		                   
+	}
+	else{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+	}  
+	_irqlevel_changed_(&oldirql,RAISE);
+	_func_exit_;
+#endif
+	return status;
+}
+//-----------------------------------------------------------------------------
+NDIS_STATUS oid_rt_get_signal_quality_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	//DEBUG_ERR(("<**********************oid_rt_get_signal_quality_hdl \n"));
+	if(poid_par_priv->type_of_oid != QUERY_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}		
+
+#if 0
+		if(pMgntInfo->mAssoc || pMgntInfo->mIbss)
+		{
+			ulInfo = pAdapter->RxStats.SignalQuality;
+			*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+		}
+		else
+		{
+			ulInfo = 0xffffffff; // It stands for -1 in 4-byte integer.
+		}
+		break;
+#endif
+
+	return status;
+}
+
+//------------------------------------------------------------------------------
+
+NDIS_STATUS oid_rt_get_small_packet_crc_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if(poid_par_priv->type_of_oid != QUERY_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}		
+		
+	if(poid_par_priv->information_buf_len >=  sizeof(ULONG) )
+	{		
+		*(ULONG *)poid_par_priv->information_buf = padapter->recvpriv.rx_smallpacket_crcerr;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;		
+	}
+	else
+	{
+		status = NDIS_STATUS_INVALID_LENGTH;
+	}
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_get_middle_packet_crc_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if(poid_par_priv->type_of_oid != QUERY_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}		
+
+	if(poid_par_priv->information_buf_len >=  sizeof(ULONG) )
+	{		
+		*(ULONG *)poid_par_priv->information_buf = padapter->recvpriv.rx_middlepacket_crcerr;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;		
+	}
+	else
+	{
+		status = NDIS_STATUS_INVALID_LENGTH;
+	}
+
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_get_large_packet_crc_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if(poid_par_priv->type_of_oid != QUERY_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}	
+
+	if(poid_par_priv->information_buf_len >=  sizeof(ULONG) )
+	{		
+		*(ULONG *)poid_par_priv->information_buf = padapter->recvpriv.rx_largepacket_crcerr;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;		
+	}
+	else
+	{
+		status = NDIS_STATUS_INVALID_LENGTH;
+	}
+
+
+	return status;
+}
+
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_get_tx_retry_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if(poid_par_priv->type_of_oid != QUERY_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}		
+
+	return status;
+}
+NDIS_STATUS oid_rt_get_rx_retry_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if(poid_par_priv->type_of_oid != QUERY_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}		
+	*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_get_rx_total_packet_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if(poid_par_priv->type_of_oid != QUERY_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}	
+	if(poid_par_priv->information_buf_len >=  sizeof(ULONG) )
+	{		
+		*(u64 *)poid_par_priv->information_buf = padapter->recvpriv.rx_pkts + padapter->recvpriv.rx_drop;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;		
+	}
+	else
+	{
+		status = NDIS_STATUS_INVALID_LENGTH;
+	}
+
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_get_tx_beacon_ok_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if(poid_par_priv->type_of_oid != QUERY_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}		
+
+	return status;
+}
+NDIS_STATUS oid_rt_get_tx_beacon_err_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if(poid_par_priv->type_of_oid != QUERY_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}		
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_get_rx_icv_err_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if(poid_par_priv->type_of_oid != QUERY_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+	if(poid_par_priv->information_buf_len>= sizeof(u32))
+	{
+		//_rtw_memcpy(*(uint *)poid_par_priv->information_buf,padapter->recvpriv.rx_icv_err,sizeof(u32));
+		*(uint *)poid_par_priv->information_buf = padapter->recvpriv.rx_icv_err;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+	}
+	else
+	{
+		status = NDIS_STATUS_INVALID_LENGTH ;
+	}
+	
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_set_encryption_algorithm_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if(poid_par_priv->type_of_oid != SET_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}	
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_get_preamble_mode_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+	ULONG			preamblemode = 0 ;			
+		
+	if(poid_par_priv->type_of_oid != QUERY_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}		
+	if(poid_par_priv->information_buf_len>= sizeof(ULONG))
+	{		
+		if(padapter->registrypriv.preamble == PREAMBLE_LONG)
+			preamblemode = 0;
+		else if (padapter->registrypriv.preamble == PREAMBLE_AUTO)
+			preamblemode = 1;
+		else if (padapter->registrypriv.preamble == PREAMBLE_SHORT)
+			preamblemode = 2;
+		
+			
+		*(ULONG *)poid_par_priv->information_buf = preamblemode ;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+	}
+	else
+	{
+		status = NDIS_STATUS_INVALID_LENGTH ;
+	}
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_get_ap_ip_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if(poid_par_priv->type_of_oid != QUERY_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}		
+
+	return status;
+}
+
+NDIS_STATUS oid_rt_get_channelplan_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+	struct eeprom_priv*	peeprompriv = &padapter->eeprompriv;	
+
+	if(poid_par_priv->type_of_oid != QUERY_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}		
+	*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+	*(u16 *)poid_par_priv->information_buf = peeprompriv->channel_plan ;
+
+	return status;
+}
+NDIS_STATUS oid_rt_set_channelplan_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+	struct eeprom_priv*	peeprompriv = &padapter->eeprompriv;	
+	
+	if(poid_par_priv->type_of_oid != SET_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}		
+	
+	peeprompriv->channel_plan = *(u16 *)poid_par_priv->information_buf ;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_set_preamble_mode_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+	ULONG			preamblemode = 0;
+	if(poid_par_priv->type_of_oid != SET_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+	 
+	if(poid_par_priv->information_buf_len>= sizeof(ULONG))
+	{		
+		preamblemode = *(ULONG *)poid_par_priv->information_buf ;
+		if( preamblemode == 0)
+			padapter->registrypriv.preamble = PREAMBLE_LONG;
+		else if (preamblemode==1 )
+			padapter->registrypriv.preamble = PREAMBLE_AUTO;
+		else if ( preamblemode==2 )
+			padapter->registrypriv.preamble = PREAMBLE_SHORT;		
+			
+		*(ULONG *)poid_par_priv->information_buf = preamblemode ;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+	}
+	else
+	{
+		status = NDIS_STATUS_INVALID_LENGTH ;
+	}	
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_set_bcn_intvl_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if(poid_par_priv->type_of_oid != SET_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	return status;
+}
+NDIS_STATUS oid_rt_dedicate_probe_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_get_total_tx_bytes_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if(poid_par_priv->type_of_oid != QUERY_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}	
+	if(poid_par_priv->information_buf_len>= sizeof(ULONG))
+	{		
+		*(u64 *)poid_par_priv->information_buf = padapter->xmitpriv.tx_bytes;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+	}
+	else
+	{
+		status = NDIS_STATUS_INVALID_LENGTH ;
+	}
+	
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_get_total_rx_bytes_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if(poid_par_priv->type_of_oid != QUERY_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+	if(poid_par_priv->information_buf_len>= sizeof(ULONG))
+	{
+		//_rtw_memcpy(*(uint *)poid_par_priv->information_buf,padapter->recvpriv.rx_icv_err,sizeof(u32));
+		*(u64 *)poid_par_priv->information_buf = padapter->recvpriv.rx_bytes;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+	}
+	else
+	{
+		status = NDIS_STATUS_INVALID_LENGTH ;
+	}
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_current_tx_power_level_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	return status;
+}
+NDIS_STATUS oid_rt_get_enc_key_mismatch_count_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if(poid_par_priv->type_of_oid != QUERY_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}		
+
+	return status;
+}
+NDIS_STATUS oid_rt_get_enc_key_match_count_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if(poid_par_priv->type_of_oid != QUERY_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}		
+
+	return status;
+}
+NDIS_STATUS oid_rt_get_channel_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+	struct	mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	NDIS_802_11_CONFIGURATION		*pnic_Config;
+
+	ULONG   channelnum;
+
+	_func_enter_;
+	if(poid_par_priv->type_of_oid != QUERY_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}		
+
+	if ( (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ||
+		(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE))
+		pnic_Config = &pmlmepriv->cur_network.network.Configuration;
+	else
+		pnic_Config = &padapter->registrypriv.dev_network.Configuration;
+
+	channelnum = pnic_Config->DSConfig;
+	*(ULONG *)poid_par_priv->information_buf = channelnum;
+	
+	*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+
+	_func_exit_;
+
+
+
+	return status;
+}
+NDIS_STATUS oid_rt_get_hardware_radio_off_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if(poid_par_priv->type_of_oid != QUERY_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}		
+
+	return status;
+}
+NDIS_STATUS oid_rt_get_key_mismatch_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if(poid_par_priv->type_of_oid != QUERY_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}		
+
+	return status;
+}
+NDIS_STATUS oid_rt_supported_wireless_mode_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+	ULONG 			ulInfo = 0 ;
+	//DEBUG_ERR(("<**********************oid_rt_supported_wireless_mode_hdl \n"));	
+	if(poid_par_priv->type_of_oid != QUERY_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}		
+	if(poid_par_priv->information_buf_len >= sizeof(ULONG)){
+		ulInfo |= 0x0100; //WIRELESS_MODE_B
+		ulInfo |= 0x0200; //WIRELESS_MODE_G
+		ulInfo |= 0x0400; //WIRELESS_MODE_A
+
+		*(ULONG *) poid_par_priv->information_buf = ulInfo;		
+		//DEBUG_ERR(("<===oid_rt_supported_wireless_mode %x\n",ulInfo));	
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+	}
+	else{
+		status = NDIS_STATUS_INVALID_LENGTH;
+	}		
+
+	return status;
+}
+NDIS_STATUS oid_rt_get_channel_list_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if(poid_par_priv->type_of_oid != QUERY_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}		
+
+	return status;
+}
+NDIS_STATUS oid_rt_get_scan_in_progress_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if(poid_par_priv->type_of_oid != QUERY_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}		
+
+	return status;
+}
+
+
+NDIS_STATUS oid_rt_forced_data_rate_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	return status;
+}
+NDIS_STATUS oid_rt_wireless_mode_for_scan_list_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	return status;
+}
+NDIS_STATUS oid_rt_get_bss_wireless_mode_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if(poid_par_priv->type_of_oid != QUERY_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}		
+
+	return status;
+}
+
+NDIS_STATUS oid_rt_scan_with_magic_packet_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	return status;
+}
+//**************  oid_rtl_seg_01_01 section end ************** 
+
+//**************  oid_rtl_seg_01_03 section start ************** 
+NDIS_STATUS oid_rt_ap_get_associated_station_list_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if(poid_par_priv->type_of_oid != QUERY_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}		
+
+	return status;
+}
+NDIS_STATUS oid_rt_ap_switch_into_ap_mode_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	return status;
+}
+NDIS_STATUS oid_rt_ap_supported_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	return status;
+}
+NDIS_STATUS oid_rt_ap_set_passphrase_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if(poid_par_priv->type_of_oid != SET_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}		
+
+	return status;
+}
+
+//**************  oid_rtl_seg_01_03 section end ************** 
+
+//****************  oid_rtl_seg_01_11   section start ****************
+NDIS_STATUS oid_rt_pro_rf_write_registry_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+	_irqL			oldirql;
+	_func_enter_;
+	//DEBUG_ERR(("<**********************oid_rt_pro_rf_write_registry_hdl \n"));
+	if(poid_par_priv->type_of_oid != SET_OID) //QUERY_OID
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+	
+	_irqlevel_changed_(&oldirql,LOWER);
+	if(poid_par_priv->information_buf_len== (sizeof(unsigned long)*3))
+	{      
+		//RegOffsetValue	- The offset of RF register to write.
+		//RegDataWidth	- The data width of RF register to write.
+		//RegDataValue	- The value to write. 
+		//RegOffsetValue = *((unsigned long*)InformationBuffer);
+		//RegDataWidth = *((unsigned long*)InformationBuffer+1);	   
+		//RegDataValue =  *((unsigned long*)InformationBuffer+2);	
+		if(!rtw_setrfreg_cmd(Adapter, 
+						*(unsigned char*)poid_par_priv->information_buf, 
+						(unsigned long)(*((unsigned long*)poid_par_priv->information_buf+2))))
+		{
+			status = NDIS_STATUS_NOT_ACCEPTED;
+		}
+	                   
+	}
+	else{
+		status = NDIS_STATUS_INVALID_LENGTH;
+	}   
+	_irqlevel_changed_(&oldirql,RAISE);
+	_func_exit_;
+
+	return status;
+}
+
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_rf_read_registry_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+#if 0
+	PADAPTER		Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+	_irqL	oldirql;
+	_func_enter_;
+
+	//DEBUG_ERR(("<**********************oid_rt_pro_rf_read_registry_hdl \n"));
+	if(poid_par_priv->type_of_oid != SET_OID) //QUERY_OID
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}	
+	
+	_irqlevel_changed_(&oldirql,LOWER);
+	if(poid_par_priv->information_buf_len== (sizeof(unsigned long)*3))
+	{
+		if(Adapter->mppriv.act_in_progress == _TRUE)
+		{
+			status = NDIS_STATUS_NOT_ACCEPTED;
+		}
+		else
+		{
+			//init workparam
+			Adapter->mppriv.act_in_progress = _TRUE;
+			Adapter->mppriv.workparam.bcompleted= _FALSE;
+			Adapter->mppriv.workparam.act_type = MPT_READ_RF;
+			Adapter->mppriv.workparam.io_offset = *(unsigned long*)poid_par_priv->information_buf;		
+			Adapter->mppriv.workparam.io_value = 0xcccccccc;
+				       
+			//RegOffsetValue	- The offset of RF register to read.
+			//RegDataWidth	- The data width of RF register to read.
+			//RegDataValue	- The value to read. 
+			//RegOffsetValue = *((unsigned long*)InformationBuffer);
+			//RegDataWidth = *((unsigned long*)InformationBuffer+1);	   
+			//RegDataValue =  *((unsigned long*)InformationBuffer+2);	   	 	                   
+			if(!rtw_getrfreg_cmd(Adapter, 
+							*(unsigned char*)poid_par_priv->information_buf, 
+							(unsigned char*)&Adapter->mppriv.workparam.io_value))
+			{
+				status = NDIS_STATUS_NOT_ACCEPTED;
+			}
+		}
+				      		   
+		                   
+	}
+	else	{
+		status = NDIS_STATUS_INVALID_LENGTH;
+	}
+	_irqlevel_changed_(&oldirql,RAISE);
+	_func_exit_;
+#endif
+	return status;
+}
+
+//****************  oid_rtl_seg_01_11   section end****************	
+
+
+//**************  oid_rtl_seg_03_00 section start **************  
+enum _CONNECT_STATE_{
+	CHECKINGSTATUS,
+	ASSOCIATED,
+	ADHOCMODE,
+	NOTASSOCIATED
+};
+
+NDIS_STATUS oid_rt_get_connect_state_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+
+	ULONG ulInfo;
+		
+	if(poid_par_priv->type_of_oid != QUERY_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}		
+
+	// nStatus==0	CheckingStatus
+	// nStatus==1	Associated
+	// nStatus==2	AdHocMode
+	// nStatus==3	NotAssociated
+	
+	if(check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE)
+		ulInfo = CHECKINGSTATUS;
+	else if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)	
+		ulInfo = ASSOCIATED;
+	else if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)== _TRUE)
+		ulInfo = ADHOCMODE;
+	else
+		ulInfo = NOTASSOCIATED ;
+
+	*(ULONG *)poid_par_priv->information_buf = ulInfo;
+	*poid_par_priv->bytes_rw =  poid_par_priv->information_buf_len;
+
+#if 0
+	// Rearrange the order to let the UI still shows connection when scan is in progress
+	RT_TRACE(COMP_OID_QUERY, DBG_LOUD, ("===> Query OID_RT_GET_CONNECT_STATE.\n"));
+	if(pMgntInfo->mAssoc)
+		ulInfo = 1;
+	else if(pMgntInfo->mIbss)
+		ulInfo = 2;
+	else if(pMgntInfo->bScanInProgress)
+		ulInfo = 0;
+	else
+		ulInfo = 3;
+	ulInfoLen = sizeof(ULONG);
+	RT_TRACE(COMP_OID_QUERY, DBG_LOUD, ("<=== Query OID_RT_GET_CONNECT_STATE: %d\n", ulInfo));
+#endif
+
+	return status;
+}
+
+NDIS_STATUS oid_rt_set_default_key_id_hdl(struct oid_par_priv* poid_par_priv)
+{
+	NDIS_STATUS	 	status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if(poid_par_priv->type_of_oid != SET_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+	
+	return status;
+}
+//**************  oid_rtl_seg_03_00 section end **************  
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_ioctl_set.c linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_ioctl_set.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_ioctl_set.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_ioctl_set.c	2017-09-23 03:42:49.878675492 +0800
@@ -0,0 +1,1301 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+******************************************************************************/
+#define _RTW_IOCTL_SET_C_
+
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtw_ioctl_set.h>
+#include <hal_init.h>
+
+#ifdef CONFIG_USB_HCI
+#include <usb_osintf.h>
+#include <usb_ops.h>
+#endif
+#ifdef CONFIG_SDIO_HCI
+#include <sdio_osintf.h>
+#endif
+
+extern void indicate_wx_scan_complete_event(_adapter *padapter);
+
+#define IS_MAC_ADDRESS_BROADCAST(addr) \
+( \
+	( (addr[0] == 0xff) && (addr[1] == 0xff) && \
+		(addr[2] == 0xff) && (addr[3] == 0xff) && \
+		(addr[4] == 0xff) && (addr[5] == 0xff) )  ? _TRUE : _FALSE \
+)
+
+u8 rtw_validate_ssid(NDIS_802_11_SSID *ssid)
+{
+	u8	 i;
+	u8	ret=_TRUE;
+
+_func_enter_;	
+
+	if (ssid->SsidLength > 32) {
+		RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("ssid length >32\n"));
+		ret= _FALSE;
+		goto exit;
+	}
+
+	for(i = 0; i < ssid->SsidLength; i++)
+	{
+		//wifi, printable ascii code must be supported
+		if(!( (ssid->Ssid[i] >= 0x20) && (ssid->Ssid[i] <= 0x7e) )){
+			RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("ssid has nonprintabl ascii\n"));
+			ret= _FALSE;
+			break;
+		}
+	}
+
+exit:	
+
+_func_exit_;
+
+	return ret;
+}
+
+u8 rtw_do_join(_adapter * padapter)
+{
+	_irqL	irqL;
+	_list	*plist, *phead;
+	u8* pibss = NULL;
+	struct	mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	_queue	*queue	= &(pmlmepriv->scanned_queue);
+	u8 ret=_SUCCESS;
+	
+_func_enter_;
+
+	_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+	phead = get_list_head(queue);
+	plist = get_next(phead);
+
+	RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("\n rtw_do_join: phead = %p; plist = %p \n\n\n", phead, plist));
+
+	pmlmepriv->cur_network.join_res = -2;
+		
+	set_fwstate(pmlmepriv, _FW_UNDER_LINKING);
+
+	pmlmepriv->pscanned = plist;
+
+	pmlmepriv->to_join = _TRUE;
+
+	if(_rtw_queue_empty(queue)== _TRUE)
+	{	
+		_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+		_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
+            		
+		//when set_ssid/set_bssid for rtw_do_join(), but scanning queue is empty
+		//we try to issue sitesurvey firstly	
+            		
+		if(pmlmepriv->LinkDetectInfo.bBusyTraffic==_FALSE
+			#ifdef CONFIG_LAYER2_ROAMING
+			|| pmlmepriv->to_roaming >0
+			#endif
+		)
+		{
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_do_join(): site survey if scanned_queue is empty\n."));
+			// submit site_survey_cmd
+			if(_SUCCESS!=(ret=rtw_sitesurvey_cmd(padapter, &pmlmepriv->assoc_ssid, 1)) ) {
+				RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("rtw_do_join(): site survey return error\n."));
+			}
+		}
+		
+		goto exit;
+	}	
+	else 	
+	{
+		int select_ret;
+		_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+		if((select_ret=rtw_select_and_join_from_scanned_queue(pmlmepriv))==_SUCCESS)
+		{
+			pmlmepriv->to_join = _FALSE;
+			_set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT);
+		}
+		else if(ret == 2)//there is no need to wait for join
+		{
+			ret = _SUCCESS;
+			clr_fwstate(pmlmepriv, _FW_UNDER_LINKING);
+			rtw_indicate_connect(padapter);
+		}
+		else	
+		{
+			if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)==_TRUE)
+			{
+				// submit createbss_cmd to change to a ADHOC_MASTER
+
+ 				//pmlmepriv->lock has been acquired by caller...
+				WLAN_BSSID_EX    *pdev_network = &(padapter->registrypriv.dev_network);
+
+				pmlmepriv->fw_state = WIFI_ADHOC_MASTER_STATE;
+				
+				pibss = padapter->registrypriv.dev_network.MacAddress;
+
+				_rtw_memset(&pdev_network->Ssid, 0, sizeof(NDIS_802_11_SSID));
+				_rtw_memcpy(&pdev_network->Ssid, &pmlmepriv->assoc_ssid, sizeof(NDIS_802_11_SSID));
+	
+				rtw_update_registrypriv_dev_network(padapter);
+
+				rtw_generate_random_ibss(pibss);
+					
+				if(rtw_createbss_cmd(padapter)!=_SUCCESS)
+				{
+					RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("***Error=>do_goin: rtw_createbss_cmd status FAIL*** \n "));						
+					ret =  _FALSE;
+					goto exit;
+				}
+
+			     	pmlmepriv->to_join = _FALSE;
+
+				RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("***Error=> rtw_select_and_join_from_scanned_queue FAIL under STA_Mode*** \n "));						
+
+			}			
+			else
+			{ 
+				// can't associate ; reset under-linking			
+				_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
+
+#if 0	
+				if((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE))
+				{
+					if(_rtw_memcmp(pmlmepriv->cur_network.network.Ssid.Ssid, pmlmepriv->assoc_ssid.Ssid, pmlmepriv->assoc_ssid.SsidLength))
+					{ 
+						// for funk to do roaming
+						// funk will reconnect, but funk will not sitesurvey before reconnect
+						RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("for funk to do roaming"));
+						if(pmlmepriv->sitesurveyctrl.traffic_busy==_FALSE)
+							rtw_sitesurvey_cmd(padapter, &pmlmepriv->assoc_ssid, 1);
+					}
+				
+				}				
+#endif
+
+				//when set_ssid/set_bssid for rtw_do_join(), but there are no desired bss in scanning queue
+				//we try to issue sitesurvey firstly			
+				if(pmlmepriv->LinkDetectInfo.bBusyTraffic==_FALSE
+					#ifdef CONFIG_LAYER2_ROAMING
+					|| pmlmepriv->to_roaming >0
+					#endif
+				)
+				{
+					//DBG_8192C("rtw_do_join() when   no desired bss in scanning queue \n");
+					if( _SUCCESS!=(ret=rtw_sitesurvey_cmd(padapter, &pmlmepriv->assoc_ssid, 1)) ){
+						RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("do_join(): site survey return error\n."));
+					}
+				}				
+
+
+			}
+
+		}
+
+	}
+	
+exit:
+	
+_func_exit_;	
+
+	return ret;	
+}
+
+#ifdef PLATFORM_WINDOWS
+u8 rtw_pnp_set_power_wakeup(_adapter* padapter)
+{
+	u8 res=_SUCCESS;
+
+_func_enter_;
+
+	RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("==>rtw_pnp_set_power_wakeup!!!\n"));
+	
+	res = rtw_setstandby_cmd(padapter, 0);
+
+	RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("<==rtw_pnp_set_power_wakeup!!!\n"));
+
+_func_exit_;
+	
+	return res;
+}
+
+u8 rtw_pnp_set_power_sleep(_adapter* padapter)
+{
+	u8 res=_SUCCESS;	
+	
+_func_enter_;
+
+	RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("==>rtw_pnp_set_power_sleep!!!\n"));
+	//DbgPrint("+rtw_pnp_set_power_sleep\n");
+
+	res = rtw_setstandby_cmd(padapter, 1);
+
+	RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("<==rtw_pnp_set_power_sleep!!!\n"));
+
+_func_exit_;
+
+	return res;
+}
+
+u8 rtw_set_802_11_reload_defaults(_adapter * padapter, NDIS_802_11_RELOAD_DEFAULTS reloadDefaults)
+{
+_func_enter_;
+
+	switch( reloadDefaults)
+	{
+		case Ndis802_11ReloadWEPKeys:
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("SetInfo OID_802_11_RELOAD_DEFAULTS : Ndis802_11ReloadWEPKeys\n"));
+			break;
+	}
+
+	// SecClearAllKeys(Adapter);
+	// 8711 CAM was not for En/Decrypt only
+	// so, we can't clear all keys.
+	// should we disable WPAcfg (ox0088) bit 1-2, instead of clear all CAM
+	
+	//TO DO...
+
+_func_exit_;
+	
+	return _TRUE;
+}
+
+u8 set_802_11_test(_adapter* padapter, NDIS_802_11_TEST *test)
+{
+	u8 ret=_TRUE;
+	
+_func_enter_;
+
+	switch(test->Type)
+	{
+		case 1:
+			NdisMIndicateStatus(padapter->hndis_adapter, NDIS_STATUS_MEDIA_SPECIFIC_INDICATION, (PVOID)&test->AuthenticationEvent, test->Length - 8);
+			NdisMIndicateStatusComplete(padapter->hndis_adapter);
+			break;
+
+		case 2:
+			NdisMIndicateStatus(padapter->hndis_adapter, NDIS_STATUS_MEDIA_SPECIFIC_INDICATION, (PVOID)&test->RssiTrigger, sizeof(NDIS_802_11_RSSI));
+			NdisMIndicateStatusComplete(padapter->hndis_adapter);
+			break;
+
+		default:
+			ret=_FALSE;
+			break;
+	}
+
+_func_exit_;
+
+	return ret;	
+}
+
+u8	rtw_set_802_11_pmkid(_adapter*	padapter, NDIS_802_11_PMKID *pmkid)
+{
+	u8	ret=_SUCCESS;
+
+	return ret;
+}
+
+#endif
+
+u8 rtw_set_802_11_bssid(_adapter* padapter, u8 *bssid)
+{	
+	_irqL irqL;	
+	u8 status=_SUCCESS;
+	u32 cur_time = 0;
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+	_queue *queue = &pmlmepriv->scanned_queue;
+	
+_func_enter_;
+	
+	RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_notice_,
+		 ("+rtw_set_802_11_bssid: bssid="MAC_FMT"\n", MAC_ARG(bssid) ));
+
+	if ((bssid[0]==0x00 && bssid[1]==0x00 && bssid[2]==0x00 && bssid[3]==0x00 && bssid[4]==0x00 &&bssid[5]==0x00) ||
+	    (bssid[0]==0xFF && bssid[1]==0xFF && bssid[2]==0xFF && bssid[3]==0xFF && bssid[4]==0xFF &&bssid[5]==0xFF))
+	{
+		status = _FAIL;
+		goto exit;
+	}
+		
+	_enter_critical_bh(&pmlmepriv->lock, &irqL);
+
+
+	DBG_871X("Set BSSID under fw_state=0x%08x\n", get_fwstate(pmlmepriv));
+	if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) {
+		goto handle_tkip_countermeasure;
+	} else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) {
+		goto release_mlme_lock;
+	}
+
+	if (check_fwstate(pmlmepriv, _FW_LINKED|WIFI_ADHOC_MASTER_STATE) == _TRUE)
+	{
+		RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_, ("set_bssid: _FW_LINKED||WIFI_ADHOC_MASTER_STATE\n"));
+
+		if (_rtw_memcmp(&pmlmepriv->cur_network.network.MacAddress, bssid, ETH_ALEN) == _TRUE)
+		{		
+			if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _FALSE)
+				goto release_mlme_lock;//it means driver is in WIFI_ADHOC_MASTER_STATE, we needn't create bss again.
+		} else {
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("Set BSSID not the same bssid\n"));
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("set_bssid="MAC_FMT"\n", MAC_ARG(bssid) ));
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("cur_bssid="MAC_FMT"\n", MAC_ARG(pmlmepriv->cur_network.network.MacAddress) ));
+
+			rtw_disassoc_cmd(padapter);
+
+			if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
+				rtw_indicate_disconnect(padapter);
+
+			rtw_free_assoc_resources(padapter, 1);
+
+			if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) {
+				_clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
+				set_fwstate(pmlmepriv, WIFI_ADHOC_STATE);
+			}		
+		}
+	}
+
+handle_tkip_countermeasure:
+	//should we add something here...?
+
+#ifdef PLATFORM_LINUX
+	if (padapter->securitypriv.btkip_countermeasure == _TRUE) {
+		cur_time = rtw_get_current_time();
+
+		if( (cur_time - padapter->securitypriv.btkip_countermeasure_time) > 60 * HZ )
+		{
+			padapter->securitypriv.btkip_countermeasure = _FALSE;
+			padapter->securitypriv.btkip_countermeasure_time = 0;
+		}
+		else
+		{
+			status = _FAIL;
+			goto release_mlme_lock;
+		}
+	}
+#endif
+
+	_rtw_memcpy(&pmlmepriv->assoc_bssid, bssid, ETH_ALEN);
+	pmlmepriv->assoc_by_bssid=_TRUE;
+
+	if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) {
+		pmlmepriv->to_join = _TRUE;	
+	}
+	else {
+		status = rtw_do_join(padapter);
+	}
+
+release_mlme_lock:
+	_exit_critical_bh(&pmlmepriv->lock, &irqL);
+		
+exit:
+	RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
+		("rtw_set_802_11_bssid: status=%d\n", status));
+	
+_func_exit_;
+
+	return status;
+}
+
+u8 rtw_set_802_11_ssid(_adapter* padapter, NDIS_802_11_SSID *ssid)
+{	
+	_irqL irqL;
+	u8 status = _SUCCESS;
+	u32 cur_time = 0;
+
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+	struct wlan_network *pnetwork = &pmlmepriv->cur_network;
+
+	
+_func_enter_;
+	
+	RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_notice_,
+		 ("+rtw_set_802_11_ssid: ssid=[%s] fw_state=0x%08x\n",
+		  ssid->Ssid, get_fwstate(pmlmepriv)));
+
+	if(padapter->hw_init_completed==_FALSE){
+		RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
+			 ("set_ssid: hw_init_completed==_FALSE=>exit!!!\n"));
+		status = _FAIL;
+		goto exit;
+	}
+		
+	_enter_critical_bh(&pmlmepriv->lock, &irqL);
+
+	DBG_871X("Set SSID under fw_state=0x%08x\n", get_fwstate(pmlmepriv));
+	if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) {	
+		goto handle_tkip_countermeasure;
+	} else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) {
+		goto release_mlme_lock;
+	}
+
+	if (check_fwstate(pmlmepriv, _FW_LINKED|WIFI_ADHOC_MASTER_STATE) == _TRUE)
+	{
+		RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
+			 ("set_ssid: _FW_LINKED||WIFI_ADHOC_MASTER_STATE\n"));
+
+		if ((pmlmepriv->assoc_ssid.SsidLength == ssid->SsidLength) &&
+		    (_rtw_memcmp(&pmlmepriv->assoc_ssid.Ssid, ssid->Ssid, ssid->SsidLength) == _TRUE))
+		{			
+			if((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _FALSE))
+			{
+				RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
+					 ("Set SSID is the same ssid, fw_state=0x%08x\n",
+					  get_fwstate(pmlmepriv)));
+
+				if(rtw_is_same_ibss(padapter, pnetwork) == _FALSE)
+				{				
+					//if in WIFI_ADHOC_MASTER_STATE | WIFI_ADHOC_STATE, create bss or rejoin again
+					rtw_disassoc_cmd(padapter);
+
+					if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
+						rtw_indicate_disconnect(padapter);
+						
+					rtw_free_assoc_resources(padapter, 1);
+
+					if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) {
+						_clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
+						set_fwstate(pmlmepriv, WIFI_ADHOC_STATE);
+					}
+				}
+				else
+				{
+					goto release_mlme_lock;//it means driver is in WIFI_ADHOC_MASTER_STATE, we needn't create bss again.
+				}
+			}
+#ifdef CONFIG_LPS
+			else {
+				rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_JOINBSS, 1);
+			}
+#endif
+		}
+		else
+		{
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("Set SSID not the same ssid\n"));
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("set_ssid=[%s] len=0x%x\n", ssid->Ssid, (unsigned int)ssid->SsidLength));
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("assoc_ssid=[%s] len=0x%x\n", pmlmepriv->assoc_ssid.Ssid, (unsigned int)pmlmepriv->assoc_ssid.SsidLength));
+
+			rtw_disassoc_cmd(padapter);
+
+			if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
+				rtw_indicate_disconnect(padapter);
+			
+			rtw_free_assoc_resources(padapter, 1);
+
+			if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) {
+				_clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
+				set_fwstate(pmlmepriv, WIFI_ADHOC_STATE);
+			}
+		}		
+	}
+
+handle_tkip_countermeasure:
+#ifdef PLATFORM_WINDOWS
+	if (padapter->securitypriv.btkip_countermeasure==_TRUE)
+	{
+		LARGE_INTEGER	sys_time;
+		u32  diff_time,cur_time ;
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_ssid:padapter->securitypriv.btkip_countermeasure==_TRUE\n"));
+		NdisGetCurrentSystemTime(&sys_time);	
+		cur_time=(u32)(sys_time.QuadPart/10);  // In micro-second.
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_ssid:cur_time=0x%x\n",cur_time));
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_ssid:psecuritypriv->last_mic_err_time=0x%x\n",padapter->securitypriv.btkip_countermeasure_time));
+		diff_time = cur_time -padapter->securitypriv.btkip_countermeasure_time; // In micro-second.
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_ssid:diff_time=0x%x\n",diff_time));
+
+		if (diff_time > 60000000) {
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_ssid(): countermeasure time >60s.\n"));
+			padapter->securitypriv.btkip_countermeasure=_FALSE;
+			// Update MIC error time.
+			padapter->securitypriv.btkip_countermeasure_time=0;
+		} else {
+			// can't join  in 60 seconds.
+			status = _FAIL;
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_ssid(): countermeasure time <60s.\n"));
+			goto release_mlme_lock;
+		}
+	}
+#endif
+
+#ifdef PLATFORM_LINUX
+	if (padapter->securitypriv.btkip_countermeasure == _TRUE) {
+		cur_time = rtw_get_current_time();
+
+		if( (cur_time - padapter->securitypriv.btkip_countermeasure_time) > 60 * HZ )
+		{
+			padapter->securitypriv.btkip_countermeasure = _FALSE;
+			padapter->securitypriv.btkip_countermeasure_time = 0;
+		}
+		else
+		{
+			status = _FAIL;
+			goto release_mlme_lock;
+		}
+	}
+#endif
+
+	#ifdef CONFIG_VALIDATE_SSID
+	if (rtw_validate_ssid(ssid) == _FALSE) {
+		status = _FAIL;
+		goto release_mlme_lock;
+	}
+	#endif
+
+	_rtw_memcpy(&pmlmepriv->assoc_ssid, ssid, sizeof(NDIS_802_11_SSID));
+	pmlmepriv->assoc_by_bssid=_FALSE;
+
+	if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) {
+		pmlmepriv->to_join = _TRUE;	
+	}
+	else {
+		status = rtw_do_join(padapter);
+	}
+
+release_mlme_lock:
+	_exit_critical_bh(&pmlmepriv->lock, &irqL);
+
+exit:
+	RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
+		("-rtw_set_802_11_ssid: status=%d\n", status));
+	
+_func_exit_;
+
+	return status;
+	
+}
+
+u8 rtw_set_802_11_infrastructure_mode(_adapter* padapter, 
+	NDIS_802_11_NETWORK_INFRASTRUCTURE networktype)
+{
+	_irqL irqL;
+	struct	mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	struct	wlan_network	*cur_network = &pmlmepriv->cur_network;
+	NDIS_802_11_NETWORK_INFRASTRUCTURE* pold_state = &(cur_network->network.InfrastructureMode);
+	
+_func_enter_;
+
+	RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_notice_,
+		 ("+rtw_set_802_11_infrastructure_mode: old=%d new=%d fw_state=0x%08x\n",
+		  *pold_state, networktype, get_fwstate(pmlmepriv)));
+	
+	if(*pold_state != networktype)
+	{
+		_enter_critical_bh(&pmlmepriv->lock, &irqL);
+		
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,(" change mode!"));
+		//DBG_871X("change mode, old_mode=%d, new_mode=%d, fw_state=0x%x\n", *pold_state, networktype, get_fwstate(pmlmepriv));
+
+		if((check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ||(*pold_state==Ndis802_11IBSS))
+			rtw_disassoc_cmd(padapter);
+
+		if((check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ||
+			(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)== _TRUE) )
+			rtw_free_assoc_resources(padapter, 1);
+
+
+		if((check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) || (*pold_state==Ndis802_11Infrastructure) ||(*pold_state==Ndis802_11IBSS))
+		{		
+			rtw_indicate_disconnect(padapter); //will clr Linked_state; before this function, we must have chked whether  issue dis-assoc_cmd or not
+		}	
+	
+		if(*pold_state==Ndis802_11APMode)
+		{		
+			//change to other mode from Ndis802_11APMode			
+			cur_network->join_res = -1;
+			
+#ifdef CONFIG_NATIVEAP_MLME
+			stop_ap_mode(padapter);
+#endif
+		}	
+		
+		*pold_state = networktype;
+
+				// clear WIFI_STATION_STATE; WIFI_AP_STATE; WIFI_ADHOC_STATE; WIFI_ADHOC_MASTER_STATE
+		//pmlmepriv->fw_state &= 0xffffff87;		
+		_clr_fwstate_(pmlmepriv, WIFI_STATION_STATE|WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE);
+				
+		switch(networktype)
+		{
+			case Ndis802_11IBSS:
+				set_fwstate(pmlmepriv, WIFI_ADHOC_STATE);
+				break;
+				
+			case Ndis802_11Infrastructure:
+				set_fwstate(pmlmepriv, WIFI_STATION_STATE);
+				break;
+				
+			case Ndis802_11APMode:
+				set_fwstate(pmlmepriv, WIFI_AP_STATE);
+#ifdef CONFIG_NATIVEAP_MLME
+				start_ap_mode(padapter);
+				//rtw_indicate_connect(padapter);
+#endif				
+				
+				break;
+
+			case Ndis802_11AutoUnknown:
+			case Ndis802_11InfrastructureMax:
+				break;                        				
+		}
+
+		//SecClearAllKeys(adapter);
+		
+		//RT_TRACE(COMP_OID_SET, DBG_LOUD, ("set_infrastructure: fw_state:%x after changing mode\n",
+		//									get_fwstate(pmlmepriv) ));
+
+		_exit_critical_bh(&pmlmepriv->lock, &irqL);
+	}
+
+_func_exit_;
+
+	return _TRUE;
+}
+
+
+u8 rtw_set_802_11_disassociate(_adapter *padapter)
+{
+	_irqL irqL;
+	struct mlme_priv * pmlmepriv = &padapter->mlmepriv;
+
+_func_enter_;
+
+	_enter_critical_bh(&pmlmepriv->lock, &irqL);
+
+	if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
+	{
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("MgntActrtw_set_802_11_disassociate: rtw_indicate_disconnect\n"));
+
+		rtw_disassoc_cmd(padapter);		
+		rtw_indicate_disconnect(padapter);
+		rtw_free_assoc_resources(padapter, 1);			
+	}
+
+	_exit_critical_bh(&pmlmepriv->lock, &irqL);
+	
+_func_exit_;
+
+	return _TRUE;	
+}
+
+u8 rtw_set_802_11_bssid_list_scan(_adapter* padapter)
+{	
+	_irqL	irqL;
+	struct	mlme_priv		*pmlmepriv= &padapter->mlmepriv;
+	u8	res=_TRUE;
+	
+_func_enter_;
+
+	RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("+rtw_set_802_11_bssid_list_scan(), fw_state=%x\n", get_fwstate(pmlmepriv)));
+
+	if (padapter == NULL) {
+		res=_FALSE;
+		goto exit;
+	}
+	if (padapter->hw_init_completed==_FALSE){
+		res = _FALSE;
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n===rtw_set_802_11_bssid_list_scan:hw_init_completed==_FALSE===\n"));
+		goto exit;
+	}
+	
+	if ((check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) ||
+		(pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE))
+	{
+		// Scan or linking is in progress, do nothing.
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("rtw_set_802_11_bssid_list_scan fail since fw_state = %x\n", get_fwstate(pmlmepriv)));
+		res = _TRUE;
+
+		if(check_fwstate(pmlmepriv, (_FW_UNDER_SURVEY|_FW_UNDER_LINKING))== _TRUE){
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n###_FW_UNDER_SURVEY|_FW_UNDER_LINKING\n\n"));
+		} else {
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n###pmlmepriv->sitesurveyctrl.traffic_busy==_TRUE\n\n"));
+		}
+	} else {		
+		#ifdef CONFIG_SET_SCAN_DENY_TIMER
+		if(ATOMIC_READ(&pmlmepriv->set_scan_deny)==1){
+			DBG_871X("%s:%d CONFIG_SET_SCAN_DENY_TIMER deny scan\n", __FUNCTION__, __LINE__);
+			indicate_wx_scan_complete_event(padapter);
+			return _SUCCESS;
+		}
+		#endif
+		
+		_enter_critical_bh(&pmlmepriv->lock, &irqL);		
+		
+		res = rtw_sitesurvey_cmd(padapter, NULL, 0);
+		
+		_exit_critical_bh(&pmlmepriv->lock, &irqL);
+	}
+exit:
+	
+_func_exit_;
+
+	return res;	
+}
+
+u8 rtw_set_802_11_authentication_mode(_adapter* padapter, NDIS_802_11_AUTHENTICATION_MODE authmode) 
+{
+	struct security_priv *psecuritypriv = &padapter->securitypriv;
+	int res;
+	u8 ret;
+	
+_func_enter_;
+
+	RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("set_802_11_auth.mode(): mode=%x\n", authmode));
+
+	psecuritypriv->ndisauthtype=authmode;
+	
+	RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_authentication_mode:psecuritypriv->ndisauthtype=%d", psecuritypriv->ndisauthtype));
+	
+	if(psecuritypriv->ndisauthtype>3)
+		psecuritypriv->dot11AuthAlgrthm=dot11AuthAlgrthm_8021X;
+	
+	res=rtw_set_auth(padapter,psecuritypriv);
+	
+	if(res==_SUCCESS)
+		ret=_TRUE;
+	else
+		ret=_FALSE;
+	
+_func_exit_;
+
+	return ret;
+}
+
+u8 rtw_set_802_11_add_wep(_adapter* padapter, NDIS_802_11_WEP *wep){
+
+	u8		bdefaultkey;
+	u8		btransmitkey;
+	sint		keyid,res;
+	struct security_priv* psecuritypriv=&(padapter->securitypriv);
+	u8		ret=_SUCCESS;
+
+_func_enter_;
+
+	bdefaultkey=(wep->KeyIndex & 0x40000000) > 0 ? _FALSE : _TRUE;   //for ???
+	btransmitkey= (wep->KeyIndex & 0x80000000) > 0 ? _TRUE  : _FALSE;	//for ???
+	keyid=wep->KeyIndex & 0x3fffffff;
+
+	if(keyid>4)
+	{
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("MgntActrtw_set_802_11_add_wep:keyid>4=>fail\n"));
+		ret=_FALSE;
+		goto exit;
+	}
+	
+	switch(wep->KeyLength)
+	{
+		case 5:
+			psecuritypriv->dot11PrivacyAlgrthm=_WEP40_;
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("MgntActrtw_set_802_11_add_wep:wep->KeyLength=5\n"));
+			break;
+		case 13:
+			psecuritypriv->dot11PrivacyAlgrthm=_WEP104_;
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("MgntActrtw_set_802_11_add_wep:wep->KeyLength=13\n"));
+			break;
+		default:
+			psecuritypriv->dot11PrivacyAlgrthm=_NO_PRIVACY_;
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("MgntActrtw_set_802_11_add_wep:wep->KeyLength!=5 or 13\n"));
+			break;
+	}
+	
+	RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_add_wep:befor memcpy, wep->KeyLength=0x%x wep->KeyIndex=0x%x  keyid =%x\n",wep->KeyLength,wep->KeyIndex,keyid));
+
+	_rtw_memcpy(&(psecuritypriv->dot11DefKey[keyid].skey[0]),&(wep->KeyMaterial),wep->KeyLength);
+
+	psecuritypriv->dot11DefKeylen[keyid]=wep->KeyLength;
+
+	psecuritypriv->dot11PrivacyKeyIndex=keyid;
+
+	RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_add_wep:security key material : %x %x %x %x %x %x %x %x %x %x %x %x %x \n",
+		psecuritypriv->dot11DefKey[keyid].skey[0],psecuritypriv->dot11DefKey[keyid].skey[1],psecuritypriv->dot11DefKey[keyid].skey[2],
+		psecuritypriv->dot11DefKey[keyid].skey[3],psecuritypriv->dot11DefKey[keyid].skey[4],psecuritypriv->dot11DefKey[keyid].skey[5],
+		psecuritypriv->dot11DefKey[keyid].skey[6],psecuritypriv->dot11DefKey[keyid].skey[7],psecuritypriv->dot11DefKey[keyid].skey[8],
+		psecuritypriv->dot11DefKey[keyid].skey[9],psecuritypriv->dot11DefKey[keyid].skey[10],psecuritypriv->dot11DefKey[keyid].skey[11],
+		psecuritypriv->dot11DefKey[keyid].skey[12]));
+
+	res=rtw_set_key(padapter,psecuritypriv, keyid, 1);
+	
+	if(res==_FAIL)
+		ret= _FALSE;
+exit:
+	
+_func_exit_;
+
+	return ret;
+	
+}
+
+u8 rtw_set_802_11_remove_wep(_adapter* padapter, u32 keyindex){
+	
+	u8 ret=_SUCCESS;
+	
+_func_enter_;
+
+	if (keyindex >= 0x80000000 || padapter == NULL){
+		
+		ret=_FALSE;
+		goto exit;
+
+	}
+	else 
+	{
+		int res;
+		struct security_priv* psecuritypriv=&(padapter->securitypriv);
+		if( keyindex < 4 ){
+			
+			_rtw_memset(&psecuritypriv->dot11DefKey[keyindex], 0, 16);
+			
+			res=rtw_set_key(padapter,psecuritypriv,keyindex, 0);
+			
+			psecuritypriv->dot11DefKeylen[keyindex]=0;
+			
+			if(res==_FAIL)
+				ret=_FAIL;
+			
+		}
+		else
+		{			
+			ret=_FAIL;
+		}
+		
+	}
+	
+exit:	
+	
+_func_exit_;
+
+	return ret;
+	
+}
+
+u8 rtw_set_802_11_add_key(_adapter* padapter, NDIS_802_11_KEY *key){
+
+	uint	encryptionalgo;
+	u8 * pbssid;
+	struct sta_info *stainfo;
+	u8	bgroup = _FALSE;
+	u8	bgrouptkey = _FALSE;//can be remove later
+	u8	ret=_SUCCESS;
+	
+_func_enter_;
+
+	if (((key->KeyIndex & 0x80000000) == 0) && ((key->KeyIndex & 0x40000000) > 0)){
+
+		// It is invalid to clear bit 31 and set bit 30. If the miniport driver encounters this combination, 
+		// it must fail the request and return NDIS_STATUS_INVALID_DATA.
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_add_key: ((key->KeyIndex & 0x80000000) == 0)[=%d] ",(int)(key->KeyIndex & 0x80000000) == 0));
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_add_key:((key->KeyIndex & 0x40000000) > 0)[=%d]" , (int)(key->KeyIndex & 0x40000000) > 0));
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_add_key: key->KeyIndex=%d \n" ,(int)key->KeyIndex));
+		ret= _FAIL;
+		goto exit;
+	}
+
+	if(key->KeyIndex & 0x40000000)
+	{ 
+		// Pairwise key
+
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY: +++++ Pairwise key +++++\n"));
+	
+		pbssid=get_bssid(&padapter->mlmepriv);
+		stainfo=rtw_get_stainfo(&padapter->stapriv, pbssid);
+
+		if((stainfo!=NULL)&&(padapter->securitypriv.dot11AuthAlgrthm==dot11AuthAlgrthm_8021X)){
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY:( stainfo!=NULL)&&(Adapter->securitypriv.dot11AuthAlgrthm==dot11AuthAlgrthm_8021X)\n"));
+			encryptionalgo=stainfo->dot118021XPrivacy;
+		}
+		else{
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY: stainfo==NULL)||(Adapter->securitypriv.dot11AuthAlgrthm!=dot11AuthAlgrthm_8021X)\n"));
+			encryptionalgo=padapter->securitypriv.dot11PrivacyAlgrthm;
+		}
+
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("rtw_set_802_11_add_key: (encryptionalgo ==%d)!\n",encryptionalgo ));
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("rtw_set_802_11_add_key: (Adapter->securitypriv.dot11PrivacyAlgrthm ==%d)!\n",padapter->securitypriv.dot11PrivacyAlgrthm));
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("rtw_set_802_11_add_key: (Adapter->securitypriv.dot11AuthAlgrthm ==%d)!\n",padapter->securitypriv.dot11AuthAlgrthm));
+
+		if((stainfo!=NULL)){
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("rtw_set_802_11_add_key: (stainfo->dot118021XPrivacy ==%d)!\n", stainfo->dot118021XPrivacy));
+		}
+		
+		if(key->KeyIndex & 0x000000FF){
+			// The key index is specified in the lower 8 bits by values of zero to 255.
+			// The key index should be set to zero for a Pairwise key, and the driver should fail with
+			// NDIS_STATUS_INVALID_DATA if the lower 8 bits is not zero
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,(" key->KeyIndex & 0x000000FF.\n"));
+			ret= _FAIL;
+			goto exit;
+		}
+
+		// check BSSID
+		if (IS_MAC_ADDRESS_BROADCAST(key->BSSID) == _TRUE){
+
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("MacAddr_isBcst(key->BSSID)\n"));
+			ret= _FALSE;
+			goto exit;
+		}
+
+		// Check key length for TKIP.
+		//if(encryptionAlgorithm == RT_ENC_TKIP_ENCRYPTION && key->KeyLength != 32)
+		if((encryptionalgo== _TKIP_)&& (key->KeyLength != 32)){
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("TKIP KeyLength:0x%x != 32\n", key->KeyLength));
+			ret=_FAIL;
+			goto exit;
+
+		}
+
+		// Check key length for AES.
+		if((encryptionalgo== _AES_)&& (key->KeyLength != 16)) {
+			// For our supplicant, EAPPkt9x.vxd, cannot differentiate TKIP and AES case.
+			if(key->KeyLength == 32) {
+				key->KeyLength = 16; 
+			} else {
+				ret= _FAIL;
+				goto exit;
+			}
+		}
+
+		// Check key length for WEP. For NDTEST, 2005.01.27, by rcnjko.
+		if(	(encryptionalgo== _WEP40_|| encryptionalgo== _WEP104_) && (key->KeyLength != 5 || key->KeyLength != 13)) {
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("WEP KeyLength:0x%x != 5 or 13\n", key->KeyLength));
+			ret=_FAIL;
+			goto exit;
+		}
+
+		bgroup = _FALSE;
+
+		// Check the pairwise key. Added by Annie, 2005-07-06.
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("------------------------------------------\n"));
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("[Pairwise Key set]\n"));
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("------------------------------------------\n"));
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("key index: 0x%8x(0x%8x)\n", key->KeyIndex,(key->KeyIndex&0x3)));
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("key Length: %d\n", key->KeyLength));
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("------------------------------------------\n"));
+	
+	}
+	else 
+	{	
+		// Group key - KeyIndex(BIT30==0)
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY: +++++ Group key +++++\n"));
+
+
+		// when add wep key through add key and didn't assigned encryption type before
+		if((padapter->securitypriv.ndisauthtype<=3)&&(padapter->securitypriv.dot118021XGrpPrivacy==0))
+		{
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("keylen=%d( Adapter->securitypriv.dot11PrivacyAlgrthm=%x  )padapter->securitypriv.dot118021XGrpPrivacy(%x)\n", key->KeyLength,padapter->securitypriv.dot11PrivacyAlgrthm,padapter->securitypriv.dot118021XGrpPrivacy));
+
+			switch(key->KeyLength)
+			{
+				case 5:
+					padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_;
+					RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("Adapter->securitypriv.dot11PrivacyAlgrthm= %x key->KeyLength=%u\n", padapter->securitypriv.dot11PrivacyAlgrthm,key->KeyLength));
+					break;
+				case 13:
+					padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_;
+					RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("Adapter->securitypriv.dot11PrivacyAlgrthm= %x key->KeyLength=%u\n", padapter->securitypriv.dot11PrivacyAlgrthm,key->KeyLength));
+					break;
+				default:
+					padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_;
+					RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("Adapter->securitypriv.dot11PrivacyAlgrthm= %x key->KeyLength=%u \n", padapter->securitypriv.dot11PrivacyAlgrthm,key->KeyLength));
+					break;
+			}
+			
+			encryptionalgo=padapter->securitypriv.dot11PrivacyAlgrthm;
+			
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,(" Adapter->securitypriv.dot11PrivacyAlgrthm=%x\n", padapter->securitypriv.dot11PrivacyAlgrthm));
+			
+		}
+		else 
+		{
+			encryptionalgo=padapter->securitypriv.dot118021XGrpPrivacy;
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("( Adapter->securitypriv.dot11PrivacyAlgrthm=%x  )encryptionalgo(%x)=padapter->securitypriv.dot118021XGrpPrivacy(%x)keylen=%d\n", padapter->securitypriv.dot11PrivacyAlgrthm,encryptionalgo,padapter->securitypriv.dot118021XGrpPrivacy,key->KeyLength));
+
+		}
+		
+		if((check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE)==_TRUE) && (IS_MAC_ADDRESS_BROADCAST(key->BSSID) == _FALSE)) {
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,(" IBSS but BSSID is not Broadcast Address.\n"));
+			ret= _FAIL;
+			goto exit;
+		}
+
+		// Check key length for TKIP
+		if((encryptionalgo== _TKIP_) && (key->KeyLength != 32)) {
+
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,(" TKIP GTK KeyLength:%u != 32\n", key->KeyLength));
+			ret= _FAIL;
+			goto exit;
+
+		} else if(encryptionalgo== _AES_ && (key->KeyLength != 16 && key->KeyLength != 32) ) {
+			
+			// Check key length for AES
+			// For NDTEST, we allow keylen=32 in this case. 2005.01.27, by rcnjko.
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("<=== SetInfo, OID_802_11_ADD_KEY: AES GTK KeyLength:%u != 16 or 32\n", key->KeyLength));
+			ret= _FAIL;
+			goto exit;
+		}
+
+		// Change the key length for EAPPkt9x.vxd. Added by Annie, 2005-11-03.
+		if((encryptionalgo==  _AES_) && (key->KeyLength == 32) ) {
+			key->KeyLength = 16; 
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("AES key length changed: %u\n", key->KeyLength) );
+		}
+
+		if(key->KeyIndex & 0x8000000) {//error ??? 0x8000_0000
+			bgrouptkey = _TRUE;
+		}
+
+		if((check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE)==_TRUE)&&(check_fwstate(&padapter->mlmepriv, _FW_LINKED)==_TRUE))
+		{
+			bgrouptkey = _TRUE;
+		}
+
+		bgroup = _TRUE;
+
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("------------------------------------------\n") );
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("[Group Key set]\n") );
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("------------------------------------------\n")) ;
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("key index: 0x%8x(0x%8x)\n", key->KeyIndex,(key->KeyIndex&0x3)));
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("key Length: %d\n", key->KeyLength)) ;
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("------------------------------------------\n"));
+		
+	}	
+
+	// If WEP encryption algorithm, just call rtw_set_802_11_add_wep().
+	if((padapter->securitypriv.dot11AuthAlgrthm !=dot11AuthAlgrthm_8021X)&&(encryptionalgo== _WEP40_  || encryptionalgo== _WEP104_))
+	{
+		u8 ret;		
+		u32 keyindex;		
+		u32 len = FIELD_OFFSET(NDIS_802_11_KEY, KeyMaterial) + key->KeyLength;
+		NDIS_802_11_WEP *wep = &padapter->securitypriv.ndiswep;
+				
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY: +++++ WEP key +++++\n"));
+
+		wep->Length = len;
+		keyindex = key->KeyIndex&0x7fffffff;
+		wep->KeyIndex = keyindex ;
+		wep->KeyLength = key->KeyLength;
+		
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY:Before memcpy \n"));
+
+		_rtw_memcpy(wep->KeyMaterial, key->KeyMaterial, key->KeyLength);	
+		_rtw_memcpy(&(padapter->securitypriv.dot11DefKey[keyindex].skey[0]), key->KeyMaterial, key->KeyLength);
+
+		padapter->securitypriv.dot11DefKeylen[keyindex]=key->KeyLength;		
+		padapter->securitypriv.dot11PrivacyKeyIndex=keyindex;
+		
+		ret = rtw_set_802_11_add_wep(padapter, wep);
+	
+		goto exit;
+		
+	}
+
+	if(key->KeyIndex & 0x20000000){
+		// SetRSC
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY: +++++ SetRSC+++++\n"));
+		if(bgroup == _TRUE)
+		{
+			NDIS_802_11_KEY_RSC keysrc=key->KeyRSC & 0x00FFFFFFFFFFFFULL;
+			_rtw_memcpy(&padapter->securitypriv.dot11Grprxpn, &keysrc, 8);			
+		} 
+		else 
+		{		
+			NDIS_802_11_KEY_RSC keysrc=key->KeyRSC & 0x00FFFFFFFFFFFFULL;	
+			_rtw_memcpy(&padapter->securitypriv.dot11Grptxpn, &keysrc, 8);			
+		}
+			
+	}
+
+	// Indicate this key idx is used for TX
+	// Save the key in KeyMaterial
+	if(bgroup == _TRUE) // Group transmit key
+	{
+		int res;
+		
+		if(bgrouptkey == _TRUE)
+		{		
+			padapter->securitypriv.dot118021XGrpKeyid=(u8)key->KeyIndex;
+		}
+		
+		if((key->KeyIndex&0x3) == 0){
+			ret = _FAIL;
+			goto exit;
+		}		
+		
+		_rtw_memset(&padapter->securitypriv.dot118021XGrpKey[(u8)((key->KeyIndex) & 0x03)], 0, 16);
+		_rtw_memset(&padapter->securitypriv.dot118021XGrptxmickey[(u8)((key->KeyIndex) & 0x03)], 0, 16);
+		_rtw_memset(&padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)], 0, 16);
+		
+		if((key->KeyIndex & 0x10000000))
+		{
+			_rtw_memcpy(&padapter->securitypriv.dot118021XGrptxmickey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial + 16, 8);
+			_rtw_memcpy(&padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial + 24, 8);
+			
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:rx mic :0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n",
+				padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[0],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[1],
+				padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[2],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[3],
+				padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[4],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[5],
+				padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[6],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[7]));
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:set Group mic key!!!!!!!!\n"));
+
+		}
+		else
+		{
+			_rtw_memcpy(&padapter->securitypriv.dot118021XGrptxmickey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial + 24, 8);
+			_rtw_memcpy(&padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial + 16, 8);
+			
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:rx mic :0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n",
+				padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[0],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[1],
+				padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[2],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[3],
+				padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[4],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[5],
+				padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[6],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[7]));
+			RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:set Group mic key!!!!!!!!\n"));
+		
+		}
+
+		//set group key by index
+		_rtw_memcpy(&padapter->securitypriv.dot118021XGrpKey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial, key->KeyLength);
+		
+		key->KeyIndex=key->KeyIndex & 0x03;
+		
+		padapter->securitypriv.binstallGrpkey=_TRUE;
+		
+		padapter->securitypriv.bcheck_grpkey=_FALSE;
+		
+		RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("reset group key"));
+		
+		res=rtw_set_key(padapter,&padapter->securitypriv, key->KeyIndex, 1);
+
+		if(res==_FAIL)
+			ret= _FAIL;
+
+		goto exit;
+			
+	}
+	else // Pairwise Key
+	{
+		u8 res;
+		
+		pbssid=get_bssid(&padapter->mlmepriv);
+		stainfo=rtw_get_stainfo(&padapter->stapriv , pbssid );
+		
+		if(stainfo!=NULL)
+		{			
+			_rtw_memset( &stainfo->dot118021x_UncstKey, 0, 16);// clear keybuffer
+			
+			_rtw_memcpy(&stainfo->dot118021x_UncstKey, key->KeyMaterial, 16);
+			
+			if(encryptionalgo== _TKIP_)
+			{
+				padapter->securitypriv.busetkipkey=_FALSE;
+				
+				//_set_timer(&padapter->securitypriv.tkip_timer, 50);
+				
+				RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n ==========_set_timer\n"));
+				
+				// if TKIP, save the Receive/Transmit MIC key in KeyMaterial[128-255]
+				if((key->KeyIndex & 0x10000000)){
+					_rtw_memcpy(&stainfo->dot11tkiptxmickey, key->KeyMaterial + 16, 8);
+					_rtw_memcpy(&stainfo->dot11tkiprxmickey, key->KeyMaterial + 24, 8);
+
+				} else {
+					_rtw_memcpy(&stainfo->dot11tkiptxmickey, key->KeyMaterial + 24, 8);
+					_rtw_memcpy(&stainfo->dot11tkiprxmickey, key->KeyMaterial + 16, 8);
+
+				}
+		
+			}
+			else if(encryptionalgo == _AES_)
+			{		
+	
+			}
+
+		
+			//Set key to CAM through H2C command
+			if(bgrouptkey)//never go to here
+			{
+				res=rtw_setstakey_cmd(padapter, (unsigned char *)stainfo, _FALSE);
+				RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:rtw_setstakey_cmd(group)\n"));
+			}
+			else{
+				res=rtw_setstakey_cmd(padapter, (unsigned char *)stainfo, _TRUE);
+				RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:rtw_setstakey_cmd(unicast)\n"));
+			}
+			
+			if(res ==_FALSE)
+				ret= _FAIL;
+			
+		}
+
+	}
+
+exit:
+	
+_func_exit_;
+
+	return ret;	
+}
+
+u8 rtw_set_802_11_remove_key(_adapter*	padapter, NDIS_802_11_REMOVE_KEY *key){
+	
+	uint				encryptionalgo;
+	u8 * pbssid;
+	struct sta_info *stainfo;
+	u8	bgroup = (key->KeyIndex & 0x4000000) > 0 ? _FALSE: _TRUE;
+	u8	keyIndex = (u8)key->KeyIndex & 0x03;
+	u8	ret=_SUCCESS;
+	
+_func_enter_;
+
+	if ((key->KeyIndex & 0xbffffffc) > 0) {
+		ret=_FAIL;
+		goto exit;
+	}
+
+	if (bgroup == _TRUE) {
+		encryptionalgo= padapter->securitypriv.dot118021XGrpPrivacy;
+		// clear group key by index
+		//NdisZeroMemory(Adapter->MgntInfo.SecurityInfo.KeyBuf[keyIndex], MAX_WEP_KEY_LEN);
+		//Adapter->MgntInfo.SecurityInfo.KeyLen[keyIndex] = 0;
+		
+		_rtw_memset(&padapter->securitypriv.dot118021XGrpKey[keyIndex], 0, 16);
+		
+		//! \todo Send a H2C Command to Firmware for removing this Key in CAM Entry.
+	
+	} else {
+	
+		pbssid=get_bssid(&padapter->mlmepriv);
+		stainfo=rtw_get_stainfo(&padapter->stapriv , pbssid );
+		if(stainfo !=NULL){
+			encryptionalgo=stainfo->dot118021XPrivacy;
+
+		// clear key by BSSID
+		_rtw_memset(&stainfo->dot118021x_UncstKey, 0, 16);
+		
+		//! \todo Send a H2C Command to Firmware for disable this Key in CAM Entry.
+
+		}
+		else{
+			ret= _FAIL;
+			goto exit;
+		}
+	}
+
+exit:
+	
+_func_exit_;
+
+	return _TRUE;
+	
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_iol.c linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_iol.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_iol.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_iol.c	2017-09-23 03:42:49.878675492 +0800
@@ -0,0 +1,251 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+#include<rtw_iol.h>
+
+#ifdef CONFIG_IOL
+struct xmit_frame	*rtw_IOL_accquire_xmit_frame(ADAPTER *adapter)
+{
+	struct xmit_frame	*xmit_frame;
+	struct xmit_buf	*xmitbuf;
+	struct pkt_attrib	*pattrib;
+	struct xmit_priv	*pxmitpriv = &(adapter->xmitpriv);
+
+#if 1
+	if ((xmit_frame = rtw_alloc_xmitframe(pxmitpriv)) == NULL)
+	{
+		DBG_871X("%s rtw_alloc_xmitframe return null\n", __FUNCTION__);
+		goto exit;
+	}
+	
+	if ((xmitbuf = rtw_alloc_xmitbuf(pxmitpriv)) == NULL)
+	{
+		DBG_871X("%s rtw_alloc_xmitbuf return null\n", __FUNCTION__);
+		rtw_free_xmitframe_ex(pxmitpriv, xmit_frame);
+		xmit_frame=NULL;
+		goto exit;
+	}
+	
+	xmit_frame->frame_tag = MGNT_FRAMETAG;
+	xmit_frame->pxmitbuf = xmitbuf;
+	xmit_frame->buf_addr = xmitbuf->pbuf;
+	xmitbuf->priv_data = xmit_frame;
+
+	pattrib = &xmit_frame->attrib;
+	update_mgntframe_attrib(adapter, pattrib);
+	pattrib->qsel = 0x10;
+	pattrib->pktlen = pattrib->last_txcmdsz = 0;
+
+#else
+	if ((xmit_frame = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		DBG_871X("%s alloc_mgtxmitframe return null\n", __FUNCTION__);
+	}
+	else {
+		pattrib = &xmit_frame->attrib;
+		update_mgntframe_attrib(adapter, pattrib);
+		pattrib->qsel = 0x10;
+		pattrib->pktlen = pattrib->last_txcmdsz = 0;
+	}
+#endif
+
+exit:
+	return xmit_frame;
+}
+
+
+int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds, u32 cmd_len)
+{
+	struct pkt_attrib	*pattrib = &xmit_frame->attrib;
+	u16 buf_offset;
+	u32 ori_len;
+
+//Todo: bulkout without this offset
+#ifdef CONFIG_USB_HCI
+	buf_offset = TXDESC_OFFSET;
+#else
+	buf_offset = 0;
+#endif
+
+	ori_len = buf_offset+pattrib->pktlen;
+
+	//check if the io_buf can accommodate new cmds
+	if(ori_len + cmd_len + 8 > MAX_XMITBUF_SZ) {
+		DBG_871X("%s %u is large than MAX_XMITBUF_SZ:%u, can't accommodate new cmds\n", __FUNCTION__
+			, ori_len + cmd_len + 8, MAX_XMITBUF_SZ);
+		return _FAIL;
+	}
+
+	_rtw_memcpy(xmit_frame->buf_addr + buf_offset + pattrib->pktlen, IOL_cmds, cmd_len);
+	pattrib->pktlen += cmd_len;
+	pattrib->last_txcmdsz += cmd_len;
+
+	//DBG_871X("%s ori:%u + cmd_len:%u = %u\n", __FUNCTION__, ori_len, cmd_len, buf_offset+pattrib->pktlen);
+	
+	return _SUCCESS;
+}
+
+int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary)
+{
+	IOL_CMD cmd = {0x0, IOL_CMD_LLT, 0x0, 0x0};
+	
+	RTW_PUT_BE32((u8*)&cmd.value, (u32)page_boundary);
+
+	return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8);
+}
+
+int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value)
+{
+	IOL_CMD cmd = {0x0, IOL_CMD_WB_REG, 0x0, 0x0};
+	
+	RTW_PUT_BE16((u8*)&cmd.address, (u16)addr);
+	RTW_PUT_BE32((u8*)&cmd.value, (u32)value);
+
+	return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8);
+}
+
+int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value)
+{
+	IOL_CMD cmd = {0x0, IOL_CMD_WW_REG, 0x0, 0x0};
+	
+	RTW_PUT_BE16((u8*)&cmd.address, (u16)addr);
+	RTW_PUT_BE32((u8*)&cmd.value, (u32)value);
+
+	return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8);
+}
+
+int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value)
+{
+	IOL_CMD cmd = {0x0, IOL_CMD_WD_REG, 0x0, 0x0};
+	u8* pos = (u8 *)&cmd;
+	
+	RTW_PUT_BE16((u8*)&cmd.address, (u16)addr);
+	RTW_PUT_BE32((u8*)&cmd.value, (u32)value);
+
+	return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8);
+}
+
+#ifdef DBG_IO
+int dbg_rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, const char *caller, const int line)
+{
+	if(addr + 1 > DBG_IO_WRITE_SNIFF_ADDR_START && addr <= DBG_IO_WRITE_SNIFF_ADDR_END)
+		DBG_871X("DBG_IO %s:%d IOL_WB(0x%04x, 0x%02x)\n", caller, line, addr, value);
+
+	return _rtw_IOL_append_WB_cmd(xmit_frame, addr, value);
+}
+
+int dbg_rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, const char *caller, const int line)
+{
+	if(addr + 2 > DBG_IO_WRITE_SNIFF_ADDR_START && addr <= DBG_IO_WRITE_SNIFF_ADDR_END)
+		DBG_871X("DBG_IO %s:%d IOL_WW(0x%04x, 0x%04x)\n", caller, line, addr, value);
+
+	return _rtw_IOL_append_WW_cmd(xmit_frame, addr, value);
+}
+
+int dbg_rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, const char *caller, const int line)
+{
+	if(addr + 4 > DBG_IO_WRITE_SNIFF_ADDR_START && addr <= DBG_IO_WRITE_SNIFF_ADDR_END)
+		DBG_871X("DBG_IO %s:%d IOL_WD(0x%04x, 0x%08x)\n", caller, line, addr, value);
+
+	return _rtw_IOL_append_WD_cmd(xmit_frame, addr, value);
+}
+#endif
+
+int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us)
+{
+	IOL_CMD cmd = {0x0, IOL_CMD_DELAY_US, 0x0, 0x0};
+	
+	RTW_PUT_BE32((u8*)&cmd.value, (u32)us);
+
+	//DBG_871X("%s %u\n", __FUNCTION__, us);
+
+	return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8);
+}
+
+int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms)
+{
+	IOL_CMD cmd = {0x0, IOL_CMD_DELAY_MS, 0x0, 0x0};
+	
+	RTW_PUT_BE32((u8*)&cmd.value, (u32)ms);
+
+	//DBG_871X("%s %u\n", __FUNCTION__, ms);
+
+	return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8);
+}
+
+int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame)
+{
+	struct pkt_attrib	*pattrib = &xmit_frame->attrib;
+	u16 buf_offset;
+	u32 ori_len;
+	IOL_CMD end_cmd = {0x0, IOL_CMD_END, 0x0, 0x0};
+
+//Todo: bulkout without this offset
+#ifdef CONFIG_USB_HCI
+	buf_offset = TXDESC_OFFSET;
+#else
+	buf_offset = 0;
+#endif
+
+	ori_len = buf_offset+pattrib->pktlen;
+
+	//check if the io_buf can accommodate new cmds
+	if(ori_len + 8 > MAX_XMITBUF_SZ) {
+		DBG_871X("%s %u is large than MAX_XMITBUF_SZ:%u, can't accommodate end cmd\n", __FUNCTION__
+			, ori_len + 8, MAX_XMITBUF_SZ);
+		return _FAIL;
+	}
+
+	_rtw_memcpy(xmit_frame->buf_addr + buf_offset + pattrib->pktlen, (u8*)&end_cmd, 8);
+	pattrib->pktlen += 8;
+	pattrib->last_txcmdsz += 8;
+
+	//DBG_871X("%s ori:%u + 8 = %u\n", __FUNCTION__ , ori_len, buf_offset+pattrib->pktlen);
+	
+	return _SUCCESS;
+}
+
+int rtw_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms)
+{
+	if(adapter->HalFunc.IOL_exec_cmds_sync)
+		return adapter->HalFunc.IOL_exec_cmds_sync(adapter, xmit_frame, max_wating_ms);
+
+	return _FAIL;
+}
+
+int rtw_IOL_exec_cmd_array_sync(PADAPTER adapter, u8 *IOL_cmds, u32 cmd_num, u32 max_wating_ms)
+{
+	struct xmit_frame	*xmit_frame;
+
+	if((xmit_frame=rtw_IOL_accquire_xmit_frame(adapter)) == NULL)
+		return _FAIL;
+
+	if(rtw_IOL_append_cmds(xmit_frame, IOL_cmds, cmd_num<<3) == _FAIL)
+		return _FAIL;
+
+	return rtw_IOL_exec_cmds_sync(adapter, xmit_frame, max_wating_ms);
+}
+
+int rtw_IOL_exec_empty_cmds_sync(ADAPTER *adapter, u32 max_wating_ms)
+{
+	IOL_CMD end_cmd = {0x0, IOL_CMD_END, 0x0, 0x0};
+	return rtw_IOL_exec_cmd_array_sync(adapter, (u8*)&end_cmd, 1, max_wating_ms);
+}
+#endif //CONFIG_IOL
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_mlme.c linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_mlme.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_mlme.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_mlme.c	2017-09-23 03:42:49.882675480 +0800
@@ -0,0 +1,3433 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+******************************************************************************/
+#define _RTW_MLME_C_
+
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <recv_osdep.h>
+#include <xmit_osdep.h>
+#include <hal_init.h>
+#include <mlme_osdep.h>
+#include <sta_info.h>
+#include <wifi.h>
+#include <wlan_bssdef.h>
+#include <rtw_ioctl_set.h>
+
+extern void indicate_wx_scan_complete_event(_adapter *padapter);
+extern u8 rtw_do_join(_adapter * padapter);
+
+sint	_rtw_init_mlme_priv (_adapter* padapter)
+{
+	sint	i;
+	u8	*pbuf;
+	struct wlan_network	*pnetwork;
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	sint	res = _SUCCESS;
+
+_func_enter_;
+
+	// We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc().
+	//_rtw_memset((u8 *)pmlmepriv, 0, sizeof(struct mlme_priv));
+
+	pmlmepriv->nic_hdl = (u8 *)padapter;
+
+	pmlmepriv->pscanned = NULL;
+	pmlmepriv->fw_state = 0;
+	pmlmepriv->cur_network.network.InfrastructureMode = Ndis802_11AutoUnknown;
+	pmlmepriv->scan_mode=SCAN_ACTIVE;// 1: active, 0: pasive. Maybe someday we should rename this varable to "active_mode" (Jeff)
+
+	_rtw_spinlock_init(&(pmlmepriv->lock));	
+	_rtw_init_queue(&(pmlmepriv->free_bss_pool));
+	_rtw_init_queue(&(pmlmepriv->scanned_queue));
+
+	set_scanned_network_val(pmlmepriv, 0);
+	
+	_rtw_memset(&pmlmepriv->assoc_ssid,0,sizeof(NDIS_802_11_SSID));
+
+	pbuf = rtw_zvmalloc(MAX_BSS_CNT * (sizeof(struct wlan_network)));
+	
+	if (pbuf == NULL){
+		res=_FAIL;
+		goto exit;
+	}
+	pmlmepriv->free_bss_buf = pbuf;
+		
+	pnetwork = (struct wlan_network *)pbuf;
+	
+	for(i = 0; i < MAX_BSS_CNT; i++)
+	{		
+		_rtw_init_listhead(&(pnetwork->list));
+
+		rtw_list_insert_tail(&(pnetwork->list), &(pmlmepriv->free_bss_pool.queue));
+
+		pnetwork++;
+	}
+
+	//allocate DMA-able/Non-Page memory for cmd_buf and rsp_buf
+
+	#ifdef CONFIG_SET_SCAN_DENY_TIMER
+	ATOMIC_SET(&pmlmepriv->set_scan_deny, 0);
+	#endif
+
+	rtw_init_mlme_timer(padapter);
+
+exit:
+
+_func_exit_;
+
+	return res;
+}	
+
+void rtw_mfree_mlme_priv_lock (struct mlme_priv *pmlmepriv)
+{
+	_rtw_spinlock_free(&pmlmepriv->lock);
+	_rtw_spinlock_free(&(pmlmepriv->free_bss_pool.lock));
+	_rtw_spinlock_free(&(pmlmepriv->scanned_queue.lock));
+}
+
+void _rtw_free_mlme_priv (struct mlme_priv *pmlmepriv)
+{
+_func_enter_;
+
+	if(pmlmepriv){
+		rtw_mfree_mlme_priv_lock (pmlmepriv);
+
+		if (pmlmepriv->free_bss_buf) {
+			rtw_vmfree(pmlmepriv->free_bss_buf, MAX_BSS_CNT * sizeof(struct wlan_network));
+		}
+	}
+_func_exit_;	
+}
+
+sint	_rtw_enqueue_network(_queue *queue, struct wlan_network *pnetwork)
+{
+	_irqL irqL;
+
+_func_enter_;	
+
+	if (pnetwork == NULL)
+		goto exit;
+	
+	_enter_critical_bh(&queue->lock, &irqL);
+
+	rtw_list_insert_tail(&pnetwork->list, &queue->queue);
+
+	_exit_critical_bh(&queue->lock, &irqL);
+
+exit:	
+
+_func_exit_;		
+
+	return _SUCCESS;
+}
+
+struct	wlan_network *_rtw_dequeue_network(_queue *queue)
+{
+	_irqL irqL;
+
+	struct wlan_network *pnetwork;
+
+_func_enter_;	
+
+	_enter_critical_bh(&queue->lock, &irqL);
+
+	if (_rtw_queue_empty(queue) == _TRUE)
+
+		pnetwork = NULL;
+	
+	else
+	{
+		pnetwork = LIST_CONTAINOR(get_next(&queue->queue), struct wlan_network, list);
+		
+		rtw_list_delete(&(pnetwork->list));
+	}
+	
+	_exit_critical_bh(&queue->lock, &irqL);
+
+_func_exit_;		
+
+	return pnetwork;
+}
+
+struct	wlan_network *_rtw_alloc_network(struct	mlme_priv *pmlmepriv )//(_queue *free_queue)
+{
+	_irqL	irqL;
+	struct	wlan_network	*pnetwork;	
+	_queue *free_queue = &pmlmepriv->free_bss_pool;
+	_list* plist = NULL;
+	
+_func_enter_;	
+
+	_enter_critical_bh(&free_queue->lock, &irqL);
+	
+	if (_rtw_queue_empty(free_queue) == _TRUE) {
+		pnetwork=NULL;
+		goto exit;
+	}
+	plist = get_next(&(free_queue->queue));
+	
+	pnetwork = LIST_CONTAINOR(plist , struct wlan_network, list);
+	
+	rtw_list_delete(&pnetwork->list);
+	
+	RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("_rtw_alloc_network: ptr=%p\n", plist));
+	pnetwork->network_type = 0;
+	pnetwork->fixed = _FALSE;
+	pnetwork->last_scanned = rtw_get_current_time();
+	pnetwork->aid=0;	
+	pnetwork->join_res=0;
+
+	pmlmepriv->num_of_scanned ++;
+	
+exit:
+	_exit_critical_bh(&free_queue->lock, &irqL);
+
+_func_exit_;		
+
+	return pnetwork;	
+}
+
+void _rtw_free_network(struct	mlme_priv *pmlmepriv ,struct wlan_network *pnetwork, u8 isfreeall)
+{
+	u32 curr_time, delta_time;
+	u32 lifetime = SCANQUEUE_LIFETIME;
+	_irqL irqL;	
+	_queue *free_queue = &(pmlmepriv->free_bss_pool);
+	
+_func_enter_;		
+
+	if (pnetwork == NULL)
+		goto exit;
+
+	if (pnetwork->fixed == _TRUE)
+		goto exit;
+
+	curr_time = rtw_get_current_time();	
+
+	if ( (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)==_TRUE ) || 
+		(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)==_TRUE ) )
+		lifetime = 1;
+
+	if(!isfreeall)
+	{
+#ifdef PLATFORM_WINDOWS
+
+		delta_time = (curr_time -pnetwork->last_scanned)/10;
+
+		if(delta_time  < lifetime*1000000)// unit:usec
+		{
+			goto exit;
+		}
+
+#endif
+
+#ifdef PLATFORM_LINUX
+
+		delta_time = (curr_time -pnetwork->last_scanned)/HZ;	
+
+		if(delta_time < lifetime)// unit:sec
+		{		
+			goto exit;
+		}
+
+#endif
+	}
+
+	_enter_critical_bh(&free_queue->lock, &irqL);
+	
+	rtw_list_delete(&(pnetwork->list));
+
+	rtw_list_insert_tail(&(pnetwork->list),&(free_queue->queue));
+		
+	pmlmepriv->num_of_scanned --;
+	
+
+	//DBG_871X("_rtw_free_network:SSID=%s\n", pnetwork->network.Ssid.Ssid);
+	
+	_exit_critical_bh(&free_queue->lock, &irqL);
+	
+exit:		
+	
+_func_exit_;			
+
+}
+
+void _rtw_free_network_nolock(struct	mlme_priv *pmlmepriv, struct wlan_network *pnetwork)
+{
+
+	_queue *free_queue = &(pmlmepriv->free_bss_pool);
+
+_func_enter_;		
+
+	if (pnetwork == NULL)
+		goto exit;
+
+	if (pnetwork->fixed == _TRUE)
+		goto exit;
+
+	//_enter_critical(&free_queue->lock, &irqL);
+	
+	rtw_list_delete(&(pnetwork->list));
+
+	rtw_list_insert_tail(&(pnetwork->list), get_list_head(free_queue));
+		
+	pmlmepriv->num_of_scanned --;
+	
+	//_exit_critical(&free_queue->lock, &irqL);
+	
+exit:		
+
+_func_exit_;			
+
+}
+
+
+/*
+	return the wlan_network with the matching addr
+
+	Shall be calle under atomic context... to avoid possible racing condition...
+*/
+struct wlan_network *_rtw_find_network(_queue *scanned_queue, u8 *addr)
+{
+
+	//_irqL irqL;
+	_list	*phead, *plist;
+	struct	wlan_network *pnetwork = NULL;
+	u8 zero_addr[ETH_ALEN] = {0,0,0,0,0,0};
+	
+_func_enter_;	
+
+	if(_rtw_memcmp(zero_addr, addr, ETH_ALEN)){
+		pnetwork=NULL;
+		goto exit;
+	}
+	
+	//_enter_critical_bh(&scanned_queue->lock, &irqL);
+	
+	phead = get_list_head(scanned_queue);
+	plist = get_next(phead);
+	 
+	while (plist != phead)
+       {
+                pnetwork = LIST_CONTAINOR(plist, struct wlan_network ,list);
+
+		if (_rtw_memcmp(addr, pnetwork->network.MacAddress, ETH_ALEN) == _TRUE)
+                        break;
+		
+		plist = get_next(plist);
+        }
+
+	if(plist == phead)
+		pnetwork = NULL;
+
+	//_exit_critical_bh(&scanned_queue->lock, &irqL);
+	
+exit:		
+	
+_func_exit_;		
+
+	return pnetwork;
+	
+}
+
+
+void _rtw_free_network_queue(_adapter *padapter, u8 isfreeall)
+{
+	_irqL irqL;
+	_list *phead, *plist;
+	struct wlan_network *pnetwork;
+	struct mlme_priv* pmlmepriv = &padapter->mlmepriv;
+	_queue *scanned_queue = &pmlmepriv->scanned_queue;
+	_queue	*free_queue = &pmlmepriv->free_bss_pool;
+	u8 *mybssid = get_bssid(pmlmepriv);
+
+_func_enter_;	
+	
+
+	_enter_critical_bh(&scanned_queue->lock, &irqL);
+
+	phead = get_list_head(scanned_queue);
+	plist = get_next(phead);
+
+	while (rtw_end_of_queue_search(phead, plist) == _FALSE)
+	{
+
+		pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list);
+
+		plist = get_next(plist);
+
+		_rtw_free_network(pmlmepriv,pnetwork, isfreeall);
+		
+	}
+
+	_exit_critical_bh(&scanned_queue->lock, &irqL);
+	
+_func_exit_;		
+
+}
+
+
+
+
+sint rtw_if_up(_adapter *padapter)	{
+
+	sint res;
+_func_enter_;		
+
+	if( padapter->bDriverStopped || padapter->bSurpriseRemoved ||
+		(check_fwstate(&padapter->mlmepriv, _FW_LINKED)== _FALSE)){		
+		RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("rtw_if_up:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved));	
+		res=_FALSE;
+	}
+	else
+		res=  _TRUE;
+	
+_func_exit_;
+	return res;
+}
+
+
+void rtw_generate_random_ibss(u8* pibss)
+{
+	u32	curtime = rtw_get_current_time();
+
+_func_enter_;
+	pibss[0] = 0x02;  //in ad-hoc mode bit1 must set to 1
+	pibss[1] = 0x11;
+	pibss[2] = 0x87;
+	pibss[3] = (u8)(curtime & 0xff) ;//p[0];
+	pibss[4] = (u8)((curtime>>8) & 0xff) ;//p[1];
+	pibss[5] = (u8)((curtime>>16) & 0xff) ;//p[2];
+_func_exit_;
+	return;
+}
+
+u8 *rtw_get_capability_from_ie(u8 *ie)
+{
+	return (ie + 8 + 2);
+}
+
+
+u16 rtw_get_capability(WLAN_BSSID_EX *bss)
+{
+	u16	val;
+_func_enter_;	
+
+	_rtw_memcpy((u8 *)&val, rtw_get_capability_from_ie(bss->IEs), 2); 
+
+_func_exit_;		
+	return le16_to_cpu(val);
+}
+
+u8 *rtw_get_timestampe_from_ie(u8 *ie)
+{
+	return (ie + 0);	
+}
+
+u8 *rtw_get_beacon_interval_from_ie(u8 *ie)
+{
+	return (ie + 8);	
+}
+
+
+int	rtw_init_mlme_priv (_adapter *padapter)//(struct	mlme_priv *pmlmepriv)
+{
+	int	res;
+_func_enter_;	
+	res = _rtw_init_mlme_priv(padapter);// (pmlmepriv);
+_func_exit_;	
+	return res;
+}
+
+void rtw_free_mlme_priv (struct mlme_priv *pmlmepriv)
+{
+_func_enter_;
+	RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_free_mlme_priv\n"));
+	_rtw_free_mlme_priv (pmlmepriv);
+_func_exit_;	
+}
+
+int	rtw_enqueue_network(_queue *queue, struct wlan_network *pnetwork)
+{
+	int	res;
+_func_enter_;		
+	res = _rtw_enqueue_network(queue, pnetwork);
+_func_exit_;		
+	return res;
+}
+
+
+
+static struct	wlan_network *rtw_dequeue_network(_queue *queue)
+{
+	struct wlan_network *pnetwork;
+_func_enter_;		
+	pnetwork = _rtw_dequeue_network(queue);
+_func_exit_;		
+	return pnetwork;
+}
+
+
+struct	wlan_network *rtw_alloc_network(struct	mlme_priv *pmlmepriv )//(_queue	*free_queue)
+{
+	struct	wlan_network	*pnetwork;
+_func_enter_;			
+	pnetwork = _rtw_alloc_network(pmlmepriv);
+_func_exit_;			
+	return pnetwork;
+}
+
+void rtw_free_network(struct mlme_priv *pmlmepriv, struct	wlan_network *pnetwork, u8 is_freeall)//(struct	wlan_network *pnetwork, _queue	*free_queue)
+{
+_func_enter_;		
+	RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_free_network==> ssid = %s \n\n" , pnetwork->network.Ssid.Ssid));
+	_rtw_free_network(pmlmepriv, pnetwork, is_freeall);
+_func_exit_;		
+}
+
+
+void rtw_free_network_nolock(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork )
+{
+_func_enter_;		
+	//RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_free_network==> ssid = %s \n\n" , pnetwork->network.Ssid.Ssid));
+	_rtw_free_network_nolock(pmlmepriv, pnetwork);
+_func_exit_;		
+}
+
+
+void rtw_free_network_queue(_adapter* dev, u8 isfreeall)
+{
+_func_enter_;		
+	_rtw_free_network_queue(dev, isfreeall);
+_func_exit_;			
+}
+
+/*
+	return the wlan_network with the matching addr
+
+	Shall be calle under atomic context... to avoid possible racing condition...
+*/
+struct	wlan_network *rtw_find_network(_queue *scanned_queue, u8 *addr)
+{
+	struct	wlan_network *pnetwork = _rtw_find_network(scanned_queue, addr);
+
+	return pnetwork;
+}
+
+int rtw_is_same_ibss(_adapter *adapter, struct wlan_network *pnetwork)
+{
+	int ret=_TRUE;
+	struct security_priv *psecuritypriv = &adapter->securitypriv;
+
+	if ( (psecuritypriv->dot11PrivacyAlgrthm != _NO_PRIVACY_ ) &&
+		    ( pnetwork->network.Privacy == 0 ) )
+	{
+		ret=_FALSE;
+	}
+	else if((psecuritypriv->dot11PrivacyAlgrthm == _NO_PRIVACY_ ) &&
+		 ( pnetwork->network.Privacy == 1 ) )
+	{
+		ret=_FALSE;
+	}
+	else
+	{
+		ret=_TRUE;
+	}
+	
+	return ret;
+	
+}
+
+inline int is_same_ess(WLAN_BSSID_EX *a, WLAN_BSSID_EX *b)
+{
+	//RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("(%s,%d)(%s,%d)\n",
+	//		a->Ssid.Ssid,a->Ssid.SsidLength,b->Ssid.Ssid,b->Ssid.SsidLength));
+	return (a->Ssid.SsidLength == b->Ssid.SsidLength) 
+		&&  _rtw_memcmp(a->Ssid.Ssid, b->Ssid.Ssid, a->Ssid.SsidLength)==_TRUE;
+}
+
+static int is_same_network(WLAN_BSSID_EX *src, WLAN_BSSID_EX *dst)
+{
+	 u16 s_cap, d_cap;
+	 
+_func_enter_;	
+
+#ifdef PLATFORM_OS_XP
+	 if ( ((uint)dst) <= 0x7fffffff || 
+	 	((uint)src) <= 0x7fffffff ||
+	 	((uint)&s_cap) <= 0x7fffffff ||
+	 	((uint)&d_cap) <= 0x7fffffff)
+	{
+		RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n@@@@ error address of dst\n"));
+			
+		KeBugCheckEx(0x87110000, (ULONG_PTR)dst, (ULONG_PTR)src,(ULONG_PTR)&s_cap, (ULONG_PTR)&d_cap);
+
+		return _FALSE;
+	}
+#endif
+
+
+	_rtw_memcpy((u8 *)&s_cap, rtw_get_capability_from_ie(src->IEs), 2);
+	_rtw_memcpy((u8 *)&d_cap, rtw_get_capability_from_ie(dst->IEs), 2);
+
+	
+	s_cap = le16_to_cpu(s_cap);
+	d_cap = le16_to_cpu(d_cap);
+	
+_func_exit_;			
+
+	return ((src->Ssid.SsidLength == dst->Ssid.SsidLength) &&
+			(src->Configuration.DSConfig == dst->Configuration.DSConfig) &&
+			( (_rtw_memcmp(src->MacAddress, dst->MacAddress, ETH_ALEN)) == _TRUE) &&
+			( (_rtw_memcmp(src->Ssid.Ssid, dst->Ssid.Ssid, src->Ssid.SsidLength)) == _TRUE) &&
+			((s_cap & WLAN_CAPABILITY_IBSS) == 
+			(d_cap & WLAN_CAPABILITY_IBSS)) &&
+			((s_cap & WLAN_CAPABILITY_BSS) == 
+			(d_cap & WLAN_CAPABILITY_BSS)));
+	
+}
+
+struct	wlan_network	* rtw_get_oldest_wlan_network(_queue *scanned_queue)
+{
+	_list	*plist, *phead;
+
+	
+	struct	wlan_network	*pwlan = NULL;
+	struct	wlan_network	*oldest = NULL;
+_func_enter_;		
+	phead = get_list_head(scanned_queue);
+	
+	plist = get_next(phead);
+
+	while(1)
+	{
+		
+		if (rtw_end_of_queue_search(phead,plist)== _TRUE)
+			break;
+		
+		pwlan= LIST_CONTAINOR(plist, struct wlan_network, list);
+
+		if(pwlan->fixed!=_TRUE)
+		{		
+			if (oldest == NULL ||time_after(oldest->last_scanned, pwlan->last_scanned))
+				oldest = pwlan;
+		}
+		
+		plist = get_next(plist);
+	}
+_func_exit_;		
+	return oldest;
+	
+}
+
+static void update_network(WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src,_adapter * padapter)
+{
+	u32 last_evm = 0, tmpVal;
+	u8 ss_ori = dst->PhyInfo.SignalStrength;
+	u8 sq_ori = dst->PhyInfo.SignalQuality;
+	long rssi_ori = dst->Rssi;
+
+	u8 ss_smp = src->PhyInfo.SignalStrength;
+	u8 sq_smp = src->PhyInfo.SignalQuality;
+	long rssi_smp = src->Rssi;
+
+_func_enter_;		
+
+#ifdef CONFIG_ANTENNA_DIVERSITY
+	padapter->HalFunc.SwAntDivCompareHandler(padapter, dst, src);
+#endif
+
+	#if defined(DBG_RX_SIGNAL_DISPLAY_PROCESSING) && 1	
+	if(strcmp(dst->Ssid.Ssid, DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) == 0) {
+		DBG_871X("%s %s("MAC_FMT", ch%u) ss_ori:%3u, sq_ori:%3u, rssi_ori:%3ld, ss_smp:%3u, sq_smp:%3u, rssi_smp:%3ld\n"
+			, __FUNCTION__
+			, src->Ssid.Ssid, MAC_ARG(src->MacAddress), src->Configuration.DSConfig
+			,ss_ori, sq_ori, rssi_ori
+			,ss_smp, sq_smp, rssi_smp
+		);
+	}
+	#endif
+
+	
+	//Update signal strength first. Alwlays using the newest value will cause large vibration of scan result's signal strength 
+	//The rule below is 1/5 for sample value, 4/5 for history value
+	if (check_fwstate(&padapter->mlmepriv, _FW_LINKED) && is_same_network(&(padapter->mlmepriv.cur_network.network), src)) {
+		//Because we've process the rx phy info in rtl8192c_process_phy_info/rtl8192d_process_phy_info,
+		//we can just take the recvpriv's value
+		src->PhyInfo.SignalStrength = padapter->recvpriv.signal_strength;
+		src->PhyInfo.SignalQuality = padapter->recvpriv.signal_qual;
+		// the rssi value here is undecorated, and will be used for antenna diversity
+		if(src->PhyInfo.SignalQuality != 101)
+			src->Rssi = (src->Rssi+dst->Rssi*4)/5;
+		else
+			src->Rssi = dst->Rssi;
+	}
+	else {
+		if(src->PhyInfo.SignalQuality != 101) {
+			// handle bss info receving from the right channel
+			src->PhyInfo.SignalStrength = ((u32)(src->PhyInfo.SignalStrength)+(u32)(dst->PhyInfo.SignalStrength)*4)/5;
+			src->PhyInfo.SignalQuality = ((u32)(src->PhyInfo.SignalQuality)+(u32)(dst->PhyInfo.SignalQuality)*4)/5;
+			src->Rssi = (src->Rssi+dst->Rssi*4)/5; // the rssi value here is undecorated, and will be used for antenna diversity
+		} else {
+			// bss info not receving from the right channel, use the original RX signal infos
+			src->PhyInfo.SignalStrength = dst->PhyInfo.SignalStrength;
+			src->PhyInfo.SignalQuality = dst->PhyInfo.SignalQuality;
+			src->Rssi = dst->Rssi;
+		}
+		
+	}
+
+
+	_rtw_memcpy((u8 *)dst, (u8 *)src, get_WLAN_BSSID_EX_sz(src));
+
+	src->PhyInfo.SignalStrength = ss_smp;
+	src->PhyInfo.SignalQuality = sq_smp;
+	src->Rssi = rssi_smp;
+
+	 #if defined(DBG_RX_SIGNAL_DISPLAY_PROCESSING) && 1
+	 if(strcmp(dst->Ssid.Ssid, DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) == 0) {
+		DBG_871X("%s %s("MAC_FMT"), SignalStrength:%u, SignalQuality:%u, RawRSSI:%ld\n"
+			, __FUNCTION__
+			, dst->Ssid.Ssid, MAC_ARG(dst->MacAddress), dst->PhyInfo.SignalStrength, dst->PhyInfo.SignalQuality, dst->Rssi);
+	 }
+	 #endif
+
+#if 0 // old codes, may be useful one day...
+//	DBG_8192C("update_network: rssi=0x%lx dst->Rssi=%d ,dst->Rssi=0x%lx , src->Rssi=0x%lx",(dst->Rssi+src->Rssi)/2,dst->Rssi,dst->Rssi,src->Rssi);
+	if (check_fwstate(&padapter->mlmepriv, _FW_LINKED) && is_same_network(&(padapter->mlmepriv.cur_network.network), src))
+	{
+	
+		//DBG_8192C("b:ssid=%s update_network: src->rssi=0x%d padapter->recvpriv.ui_rssi=%d\n",src->Ssid.Ssid,src->Rssi,padapter->recvpriv.signal);
+		if(padapter->recvpriv.signal_qual_data.total_num++ >= PHY_LINKQUALITY_SLID_WIN_MAX)
+	        {
+	              padapter->recvpriv.signal_qual_data.total_num = PHY_LINKQUALITY_SLID_WIN_MAX;
+	              last_evm = padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index];
+	              padapter->recvpriv.signal_qual_data.total_val -= last_evm;
+	        }
+               	padapter->recvpriv.signal_qual_data.total_val += query_rx_pwr_percentage(src->Rssi);
+
+              	padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index++] = query_rx_pwr_percentage(src->Rssi);
+                if(padapter->recvpriv.signal_qual_data.index >= PHY_LINKQUALITY_SLID_WIN_MAX)
+                       padapter->recvpriv.signal_qual_data.index = 0;
+
+		//DBG_8192C("Total SQ=%d  pattrib->signal_qual= %d\n", padapter->recvpriv.signal_qual_data.total_val, src->Rssi);
+
+		// <1> Showed on UI for user,in percentage.
+		tmpVal = padapter->recvpriv.signal_qual_data.total_val/padapter->recvpriv.signal_qual_data.total_num;
+                padapter->recvpriv.signal=(u8)tmpVal;//Link quality
+
+		src->Rssi= translate_percentage_to_dbm(padapter->recvpriv.signal) ;
+	}
+	else{
+//	DBG_8192C("ELSE:ssid=%s update_network: src->rssi=0x%d dst->rssi=%d\n",src->Ssid.Ssid,src->Rssi,dst->Rssi);
+		src->Rssi=(src->Rssi +dst->Rssi)/2;//dBM
+	}	
+
+//	DBG_8192C("a:update_network: src->rssi=0x%d padapter->recvpriv.ui_rssi=%d\n",src->Rssi,padapter->recvpriv.signal);
+
+#endif
+
+_func_exit_;		
+}
+
+static void update_current_network(_adapter *adapter, WLAN_BSSID_EX *pnetwork)
+{
+	struct	mlme_priv	*pmlmepriv = &(adapter->mlmepriv);
+	
+_func_enter_;		
+
+#ifdef PLATFORM_OS_XP
+	if ((unsigned long)(&(pmlmepriv->cur_network.network)) < 0x7ffffff)
+	{		
+		KeBugCheckEx(0x87111c1c, (ULONG_PTR)(&(pmlmepriv->cur_network.network)), 0, 0,0);
+	}
+#endif
+
+	if ( (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && (is_same_network(&(pmlmepriv->cur_network.network), pnetwork)))
+	{
+		//RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,"Same Network\n");
+
+		//if(pmlmepriv->cur_network.network.IELength<= pnetwork->IELength)
+		{
+			update_network(&(pmlmepriv->cur_network.network), pnetwork,adapter);
+			rtw_update_protection(adapter, (pmlmepriv->cur_network.network.IEs) + sizeof (NDIS_802_11_FIXED_IEs), 
+									pmlmepriv->cur_network.network.IELength);
+		}
+	}
+
+_func_exit_;			
+
+}
+
+
+/*
+
+Caller must hold pmlmepriv->lock first.
+
+
+*/
+void rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target)
+{
+	_irqL irqL;
+	_list	*plist, *phead;
+	ULONG	bssid_ex_sz;
+	struct mlme_priv	*pmlmepriv = &(adapter->mlmepriv);
+	_queue	*queue	= &(pmlmepriv->scanned_queue);
+	struct wlan_network	*pnetwork = NULL;
+	struct wlan_network	*oldest = NULL;
+
+_func_enter_;
+	_enter_critical_bh(&queue->lock, &irqL);
+	phead = get_list_head(queue);
+	plist = get_next(phead);
+
+	while(1)
+	{
+		if (rtw_end_of_queue_search(phead,plist)== _TRUE)
+			break;
+
+		pnetwork	= LIST_CONTAINOR(plist, struct wlan_network, list);
+
+		if ((unsigned long)(pnetwork) < 0x7ffffff)
+		{
+#ifdef PLATFORM_OS_XP
+			KeBugCheckEx(0x87111c1c, (ULONG_PTR)pnetwork, 0, 0,0);
+#endif
+		}
+
+		if (is_same_network(&(pnetwork->network), target))
+			break;
+
+		if ((oldest == ((struct wlan_network *)0)) ||
+		time_after(oldest->last_scanned, pnetwork->last_scanned))
+			oldest = pnetwork;
+
+		plist = get_next(plist);
+
+	}
+	
+	
+	/* If we didn't find a match, then get a new network slot to initialize
+	 * with this beacon's information */
+	if (rtw_end_of_queue_search(phead,plist)== _TRUE) {
+		
+		if (_rtw_queue_empty(&(pmlmepriv->free_bss_pool)) == _TRUE) {
+			/* If there are no more slots, expire the oldest */
+			//list_del_init(&oldest->list);
+			pnetwork = oldest;
+
+#ifdef CONFIG_ANTENNA_DIVERSITY
+			//target->PhyInfo.Optimum_antenna = pHalData->CurAntenna;//optimum_antenna=>For antenna diversity
+			adapter->HalFunc.GetHalDefVarHandler(adapter, HAL_DEF_CURRENT_ANTENNA, &(target->PhyInfo.Optimum_antenna));
+#endif
+			_rtw_memcpy(&(pnetwork->network), target,  get_WLAN_BSSID_EX_sz(target));
+			pnetwork->last_scanned = rtw_get_current_time();
+			//variable initialize
+			pnetwork->fixed = _FALSE;
+			pnetwork->last_scanned = rtw_get_current_time();
+
+			pnetwork->network_type = 0;	
+			pnetwork->aid=0;		
+			pnetwork->join_res=0;
+		}
+		else {
+			/* Otherwise just pull from the free list */
+
+			pnetwork = rtw_alloc_network(pmlmepriv); // will update scan_time
+
+			if(pnetwork==NULL){ 
+				RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n\n\nsomething wrong here\n\n\n"));
+				goto exit;
+			}
+
+			bssid_ex_sz = get_WLAN_BSSID_EX_sz(target);
+			target->Length = bssid_ex_sz;
+#ifdef CONFIG_ANTENNA_DIVERSITY
+			//target->PhyInfo.Optimum_antenna = pHalData->CurAntenna;
+			adapter->HalFunc.GetHalDefVarHandler(adapter, HAL_DEF_CURRENT_ANTENNA, &(target->PhyInfo.Optimum_antenna));
+#endif
+			_rtw_memcpy(&(pnetwork->network), target, bssid_ex_sz );
+
+			rtw_list_insert_tail(&(pnetwork->list),&(queue->queue)); 
+
+		}
+	}
+	else {
+		/* we have an entry and we are going to update it. But this entry may
+		 * be already expired. In this case we do the same as we found a new 
+		 * net and call the new_net handler
+		 */
+		//target.Reserved[0]==1, means that scaned network is a bcn frame.
+		if((pnetwork->network.IELength>target->IELength) && (target->Reserved[0]==1))
+			goto exit;
+
+		update_network(&(pnetwork->network),target,adapter);
+
+		pnetwork->last_scanned = rtw_get_current_time();
+
+	}
+
+exit:
+	_exit_critical_bh(&queue->lock, &irqL);
+_func_exit_;
+
+}
+
+
+void rtw_add_network(_adapter *adapter, WLAN_BSSID_EX *pnetwork)
+{
+	_irqL irqL;
+	struct	mlme_priv	*pmlmepriv = &(((_adapter *)adapter)->mlmepriv);
+	//_queue	*queue	= &(pmlmepriv->scanned_queue);
+
+_func_enter_;		
+
+	//_enter_critical_bh(&queue->lock, &irqL);
+	
+	update_current_network(adapter, pnetwork);
+	
+	rtw_update_scanned_network(adapter, pnetwork);
+
+	//_exit_critical_bh(&queue->lock, &irqL);
+	
+_func_exit_;		
+}
+
+//select the desired network based on the capability of the (i)bss.
+// check items: (1) security
+//			   (2) network_type
+//			   (3) WMM
+//			   (4) HT
+//                     (5) others
+int rtw_is_desired_network(_adapter *adapter, struct wlan_network *pnetwork)
+{
+	struct security_priv *psecuritypriv = &adapter->securitypriv;
+	struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
+	u32 desired_encmode;
+	u32 privacy;
+
+	//u8 wps_ie[512];
+	uint wps_ielen;
+
+	int bselected = _TRUE;
+	
+	desired_encmode = psecuritypriv->ndisencryptstatus;
+	privacy = pnetwork->network.Privacy;
+
+	if(psecuritypriv->wps_phase == _TRUE)
+	{
+		if(rtw_get_wps_ie(pnetwork->network.IEs, pnetwork->network.IELength, NULL, &wps_ielen)!=NULL)
+		{
+			return _TRUE;
+		}
+		else
+		{	
+			return _FALSE;
+		}	
+	}
+	if (adapter->registrypriv.wifi_spec == 1) //for  correct flow of 8021X  to do....
+	{
+		if ((desired_encmode == Ndis802_11EncryptionDisabled) && (privacy != 0))
+	            bselected = _FALSE;
+	}
+	
+
+ 	if ((desired_encmode != Ndis802_11EncryptionDisabled) && (privacy == 0)) {
+		DBG_871X("desired_encmode: %d, privacy: %d\n", desired_encmode, privacy);
+		bselected = _FALSE;
+ 	}
+
+	if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)
+	{
+		if(pnetwork->network.InfrastructureMode != pmlmepriv->cur_network.network.InfrastructureMode)
+			bselected = _FALSE;
+	}	
+		
+
+	return bselected;
+}
+
+/* TODO: Perry : For Power Management */
+void rtw_atimdone_event_callback(_adapter	*adapter , u8 *pbuf)
+{
+
+_func_enter_;		
+	RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("receive atimdone_evet\n"));	
+_func_exit_;			
+	return;	
+}
+
+
+void rtw_survey_event_callback(_adapter	*adapter, u8 *pbuf)
+{
+	_irqL  irqL;
+	u32 len;
+	WLAN_BSSID_EX *pnetwork;
+	struct	mlme_priv	*pmlmepriv = &(adapter->mlmepriv);
+
+_func_enter_;		
+
+	pnetwork = (WLAN_BSSID_EX *)pbuf;
+
+	RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_survey_event_callback, ssid=%s\n",  pnetwork->Ssid.Ssid));
+
+#ifdef CONFIG_RTL8712
+        //endian_convert
+ 	pnetwork->Length = le32_to_cpu(pnetwork->Length);
+  	pnetwork->Ssid.SsidLength = le32_to_cpu(pnetwork->Ssid.SsidLength);	
+	pnetwork->Privacy =le32_to_cpu( pnetwork->Privacy);
+	pnetwork->Rssi = le32_to_cpu(pnetwork->Rssi);
+	pnetwork->NetworkTypeInUse =le32_to_cpu(pnetwork->NetworkTypeInUse);	
+	pnetwork->Configuration.ATIMWindow = le32_to_cpu(pnetwork->Configuration.ATIMWindow);
+	pnetwork->Configuration.BeaconPeriod = le32_to_cpu(pnetwork->Configuration.BeaconPeriod);
+	pnetwork->Configuration.DSConfig =le32_to_cpu(pnetwork->Configuration.DSConfig);
+	pnetwork->Configuration.FHConfig.DwellTime=le32_to_cpu(pnetwork->Configuration.FHConfig.DwellTime);
+	pnetwork->Configuration.FHConfig.HopPattern=le32_to_cpu(pnetwork->Configuration.FHConfig.HopPattern);
+	pnetwork->Configuration.FHConfig.HopSet=le32_to_cpu(pnetwork->Configuration.FHConfig.HopSet);
+	pnetwork->Configuration.FHConfig.Length=le32_to_cpu(pnetwork->Configuration.FHConfig.Length);	
+	pnetwork->Configuration.Length = le32_to_cpu(pnetwork->Configuration.Length);
+	pnetwork->InfrastructureMode = le32_to_cpu(pnetwork->InfrastructureMode);
+	pnetwork->IELength = le32_to_cpu(pnetwork->IELength);
+#endif	
+
+	len = get_WLAN_BSSID_EX_sz(pnetwork);
+	if(len > (sizeof(WLAN_BSSID_EX)))
+	{
+		RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n ****rtw_survey_event_callback: return a wrong bss ***\n"));
+		return;
+	}
+
+
+	_enter_critical_bh(&pmlmepriv->lock, &irqL);
+
+	// update IBSS_network 's timestamp
+	if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) == _TRUE)
+	{
+		//RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,"rtw_survey_event_callback : WIFI_ADHOC_MASTER_STATE \n\n");
+		if(_rtw_memcmp(&(pmlmepriv->cur_network.network.MacAddress), pnetwork->MacAddress, ETH_ALEN))
+		{
+			struct wlan_network* ibss_wlan = NULL;
+			_irqL	irqL;
+			
+			_rtw_memcpy(pmlmepriv->cur_network.network.IEs, pnetwork->IEs, 8);
+			_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+			ibss_wlan = rtw_find_network(&pmlmepriv->scanned_queue,  pnetwork->MacAddress);
+			if(ibss_wlan)
+			{
+				_rtw_memcpy(ibss_wlan->network.IEs , pnetwork->IEs, 8);			
+				_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);		
+				goto exit;
+			}
+			_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+		}
+	}
+
+	// lock pmlmepriv->lock when you accessing network_q
+	if ((check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) == _FALSE)
+	{		
+   	        if( pnetwork->Ssid.Ssid[0] == 0 )
+		{
+			pnetwork->Ssid.SsidLength = 0;
+		}	
+		rtw_add_network(adapter, pnetwork);
+	}	
+
+exit:	
+		
+	_exit_critical_bh(&pmlmepriv->lock, &irqL);
+
+_func_exit_;		
+
+	return;	
+}
+
+
+
+void rtw_surveydone_event_callback(_adapter	*adapter, u8 *pbuf)
+{
+	_irqL  irqL;
+	struct	mlme_priv	*pmlmepriv = &(adapter->mlmepriv);
+	
+#ifdef CONFIG_MLME_EXT	
+
+	mlmeext_surveydone_event_callback(adapter);
+
+#endif
+
+_func_enter_;			
+
+	_enter_critical_bh(&pmlmepriv->lock, &irqL);
+
+	pmlmepriv->probereq_wpsie_len = 0 ;//reset to zero	
+	
+	RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_surveydone_event_callback: fw_state:%x\n\n", get_fwstate(pmlmepriv)));
+	
+	if (check_fwstate(pmlmepriv,_FW_UNDER_SURVEY))
+	{
+		u8 timer_cancelled;
+		
+		_cancel_timer(&pmlmepriv->scan_to_timer, &timer_cancelled);
+		
+		_clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY);
+	}
+	else {
+	
+		RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("nic status =%x, survey done event comes too late!\n", get_fwstate(pmlmepriv)));	
+	}	
+	
+	#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
+	rtw_set_signal_stat_timer(&adapter->recvpriv);
+	#endif
+	
+	if(pmlmepriv->to_join == _TRUE)
+	{
+		if((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)==_TRUE) )
+		{
+			if(check_fwstate(pmlmepriv, _FW_LINKED)==_FALSE)
+			{
+				set_fwstate(pmlmepriv, _FW_UNDER_LINKING);	
+				
+		   		if(rtw_select_and_join_from_scanned_queue(pmlmepriv)==_SUCCESS)
+		   		{
+		       			_set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT );	 
+                  		}
+		   		else	
+		  		{
+					WLAN_BSSID_EX    *pdev_network = &(adapter->registrypriv.dev_network); 			
+					u8 *pibss = adapter->registrypriv.dev_network.MacAddress;
+
+					//pmlmepriv->fw_state ^= _FW_UNDER_SURVEY;//because don't set assoc_timer
+					_clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY);
+
+					RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("switching to adhoc master\n"));
+				
+					_rtw_memset(&pdev_network->Ssid, 0, sizeof(NDIS_802_11_SSID));
+					_rtw_memcpy(&pdev_network->Ssid, &pmlmepriv->assoc_ssid, sizeof(NDIS_802_11_SSID));
+	
+					rtw_update_registrypriv_dev_network(adapter);
+					rtw_generate_random_ibss(pibss);
+
+                       			pmlmepriv->fw_state = WIFI_ADHOC_MASTER_STATE;
+			
+					if(rtw_createbss_cmd(adapter)!=_SUCCESS)
+					{
+	                     		RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Error=>rtw_createbss_cmd status FAIL\n"));						
+					}	
+
+			     		pmlmepriv->to_join = _FALSE;
+		   		}
+		 	}
+		}
+		else
+		{
+			int s_ret;
+			set_fwstate(pmlmepriv, _FW_UNDER_LINKING);
+			pmlmepriv->to_join = _FALSE;
+			if(_SUCCESS == (s_ret=rtw_select_and_join_from_scanned_queue(pmlmepriv)))
+			{
+	     		     _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT);	 
+			}
+			else if(s_ret == 2)//there is no need to wait for join
+			{
+				_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
+				rtw_indicate_connect(adapter);
+			}
+			else
+			{
+				#ifdef CONFIG_LAYER2_ROAMING
+				DBG_871X("try_to_join, but select scanning queue fail, to_roaming:%d\n", pmlmepriv->to_roaming);
+				#else
+				DBG_871X("try_to_join, but select scanning queue fail\n");
+				#endif
+
+				#ifdef CONFIG_LAYER2_ROAMING
+				if(pmlmepriv->to_roaming!=0) {
+					if( --pmlmepriv->to_roaming == 0
+						|| _SUCCESS != rtw_sitesurvey_cmd(adapter, &pmlmepriv->assoc_ssid, 1)
+					) {
+						pmlmepriv->to_roaming = 0;
+						rtw_free_assoc_resources(adapter, 1);
+						rtw_indicate_disconnect(adapter);
+					} else {
+						pmlmepriv->to_join = _TRUE;
+					}
+				}
+				#endif
+				_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
+			}
+		}
+	} 
+	//else
+	{
+		/*
+		*  20110324 Commented by Jeff
+		*  indicate the scan complete event when this scan isn't caused by join
+		*/
+		indicate_wx_scan_complete_event(adapter);
+
+		//DBG_871X("scan complete in %dms\n",rtw_get_passing_time_ms(pmlmepriv->scan_start_time));
+
+	}
+
+	_exit_critical_bh(&pmlmepriv->lock, &irqL);
+
+#ifdef CONFIG_P2P
+	p2p_ps_wk_cmd(adapter, P2P_PS_SCAN_DONE, 0);
+#endif //CONFIG_P2P
+
+	rtw_os_xmit_schedule(adapter);
+
+#ifdef CONFIG_DRVEXT_MODULE_WSC
+	drvext_surveydone_callback(&adapter->drvextpriv);
+#endif
+
+#ifdef DBG_CONFIG_ERROR_DETECT
+	{
+		struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;		
+		if(pmlmeext->sitesurvey_res.bss_cnt == 0){
+			if(adapter->HalFunc.silentreset)
+				adapter->HalFunc.silentreset(adapter);			
+		}
+	}
+	#endif	
+_func_exit_;	
+
+}
+
+void rtw_dummy_event_callback(_adapter *adapter , u8 *pbuf)
+{
+
+}
+
+void rtw_fwdbg_event_callback(_adapter *adapter , u8 *pbuf)
+{
+
+}
+
+static void free_scanqueue(struct	mlme_priv *pmlmepriv)
+{
+	_irqL irqL, irqL0;
+	_queue *free_queue = &pmlmepriv->free_bss_pool;
+	_queue *scan_queue = &pmlmepriv->scanned_queue;
+	_list	*plist, *phead, *ptemp;
+	
+_func_enter_;		
+	
+	RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ("+free_scanqueue\n"));
+	_enter_critical_bh(&scan_queue->lock, &irqL0);
+	_enter_critical_bh(&free_queue->lock, &irqL);
+
+	phead = get_list_head(scan_queue);
+	plist = get_next(phead);
+
+	while (plist != phead)
+       {
+		ptemp = get_next(plist);
+		rtw_list_delete(plist);
+		rtw_list_insert_tail(plist, &free_queue->queue);
+		plist =ptemp;
+		pmlmepriv->num_of_scanned --;
+        }
+	
+	_exit_critical_bh(&free_queue->lock, &irqL);
+	_exit_critical_bh(&scan_queue->lock, &irqL0);
+	
+_func_exit_;
+}
+	
+/*
+*rtw_free_assoc_resources: the caller has to lock pmlmepriv->lock
+*/
+void rtw_free_assoc_resources(_adapter *adapter, int lock_scanned_queue)
+{
+	_irqL irqL;
+	struct wlan_network* pwlan = NULL;
+     	struct	mlme_priv *pmlmepriv = &adapter->mlmepriv;
+	struct 	mlme_ext_info *pmlmeinfo = &adapter->mlmeextpriv.mlmext_info;
+   	struct	sta_priv *pstapriv = &adapter->stapriv;
+	struct wlan_network *tgt_network = &pmlmepriv->cur_network;
+	
+_func_enter_;			
+
+	RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ("+rtw_free_assoc_resources\n"));
+
+	
+	
+	RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("tgt_network->network.MacAddress="MAC_FMT" ssid=%s\n",
+		MAC_ARG(tgt_network->network.MacAddress), tgt_network->network.Ssid.Ssid));
+
+	if(check_fwstate( pmlmepriv, WIFI_STATION_STATE|WIFI_AP_STATE))
+	{
+		struct sta_info* psta;
+		
+		psta = rtw_get_stainfo(&adapter->stapriv, tgt_network->network.MacAddress);
+
+		_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
+		rtw_free_stainfo(adapter,  psta);
+		_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
+		
+	}
+
+	if(check_fwstate( pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE|WIFI_AP_STATE))
+	{
+		struct sta_info* psta;
+	
+		rtw_free_all_stainfo(adapter);
+
+		psta = rtw_get_bcmc_stainfo(adapter);
+		_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);		
+		rtw_free_stainfo(adapter, psta);
+		_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);		
+
+		rtw_init_bcmc_stainfo(adapter);	
+	}
+
+	if(lock_scanned_queue)
+		_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+	
+	pwlan = rtw_find_network(&pmlmepriv->scanned_queue, tgt_network->network.MacAddress);
+	if(pwlan)		
+	{
+		pwlan->fixed = _FALSE;
+	}	
+	else
+	{
+		RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_free_assoc_resources : pwlan== NULL \n\n"));
+	}
+
+
+	if((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) && (adapter->stapriv.asoc_sta_count== 1))
+		/*||check_fwstate(pmlmepriv, WIFI_STATION_STATE)*/)
+	{
+		rtw_free_network_nolock(pmlmepriv, pwlan); 
+	}
+
+	if(lock_scanned_queue)
+		_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+	
+	pmlmepriv->key_mask = 0;
+
+_func_exit_;	
+	
+}
+
+/*
+*rtw_indicate_connect: the caller has to lock pmlmepriv->lock
+*/
+void rtw_indicate_connect(_adapter *padapter)
+{
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	struct xmit_priv	*pxmitpriv = &padapter->xmitpriv;
+	
+_func_enter_;
+
+	RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("+rtw_indicate_connect\n"));
+ 
+	pmlmepriv->to_join = _FALSE;
+#ifdef CONFIG_SW_ANTENNA_DIVERSITY
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_ANTENNA_DIVERSITY_LINK, 0);
+#endif
+	set_fwstate(pmlmepriv, _FW_LINKED);
+
+	rtw_led_control(padapter, LED_CTL_LINK);	
+
+#ifdef CONFIG_DRVEXT_MODULE
+	if(padapter->drvextpriv.enable_wpa)
+	{
+		indicate_l2_connect(padapter);
+	}
+	else
+#endif
+	{
+		rtw_os_indicate_connect(padapter);
+	}
+
+	#ifdef CONFIG_LAYER2_ROAMING
+	pmlmepriv->to_roaming=0;
+	#endif
+
+	#ifdef CONFIG_SET_SCAN_DENY_TIMER
+	rtw_set_scan_deny(pmlmepriv, 3000);
+	#endif
+
+	RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("-rtw_indicate_connect: fw_state=0x%08x\n", get_fwstate(pmlmepriv)));
+ 
+_func_exit_;
+
+}
+
+
+/*
+*rtw_indicate_connect: the caller has to lock pmlmepriv->lock
+*/
+void rtw_indicate_disconnect( _adapter *padapter )
+{
+	struct	mlme_priv *pmlmepriv = &padapter->mlmepriv;	
+
+_func_enter_;	
+	
+	RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("+rtw_indicate_disconnect\n"));
+
+	_clr_fwstate_(pmlmepriv, _FW_LINKED);
+
+	rtw_led_control(padapter, LED_CTL_NO_LINK);
+
+	#ifdef CONFIG_LAYER2_ROAMING
+	if(pmlmepriv->to_roaming<=0)
+	#endif
+		rtw_os_indicate_disconnect(padapter);
+
+#ifdef CONFIG_LPS
+	rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_DISCONNECT, 1);
+#endif
+
+#ifdef CONFIG_P2P
+	p2p_ps_wk_cmd(padapter, P2P_PS_DISABLE, 1);
+#endif //CONFIG_P2P
+
+_func_exit_;	
+}
+
+static struct sta_info *rtw_joinbss_update_stainfo(_adapter *padapter, struct wlan_network *pnetwork)
+{
+	int i;
+	struct sta_info *bmc_sta, *psta=NULL;
+	struct recv_reorder_ctrl *preorder_ctrl;
+	struct sta_priv *pstapriv = &padapter->stapriv;	
+#ifdef CONFIG_CONCURRENT_MODE	
+	PADAPTER pbuddy_adapter = padapter->pbuddy_adapter;
+	struct mlme_priv *pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv);
+#endif	
+
+	psta = rtw_get_stainfo(pstapriv, pnetwork->network.MacAddress);
+	if(psta==NULL) {
+		psta = rtw_alloc_stainfo(pstapriv, pnetwork->network.MacAddress);
+	}
+
+	if(psta) //update ptarget_sta
+	{
+		DBG_871X("%s\n", __FUNCTION__);
+	
+		psta->aid  = pnetwork->join_res;
+#ifdef CONFIG_CONCURRENT_MODE	
+		if((check_fwstate(pbuddy_mlmepriv, WIFI_STATION_STATE) == _TRUE)
+			&& (check_fwstate(pbuddy_mlmepriv, _FW_LINKED) == _TRUE))
+		{
+			psta->mac_id=2;
+		}
+		else
+#endif						
+		{
+			psta->mac_id=0;
+		}
+
+		//security related
+		if(padapter->securitypriv.dot11AuthAlgrthm== dot11AuthAlgrthm_8021X)
+		{						
+			padapter->securitypriv.binstallGrpkey=_FALSE;
+			padapter->securitypriv.busetkipkey=_FALSE;						
+			padapter->securitypriv.bgrpkey_handshake=_FALSE;
+
+			psta->ieee8021x_blocked=_TRUE;
+			psta->dot118021XPrivacy=padapter->securitypriv.dot11PrivacyAlgrthm;
+						
+			_rtw_memset((u8 *)&psta->dot118021x_UncstKey, 0, sizeof (union Keytype));
+						
+			_rtw_memset((u8 *)&psta->dot11tkiprxmickey, 0, sizeof (union Keytype));
+			_rtw_memset((u8 *)&psta->dot11tkiptxmickey, 0, sizeof (union Keytype));
+						
+			_rtw_memset((u8 *)&psta->dot11txpn, 0, sizeof (union pn48));	
+			_rtw_memset((u8 *)&psta->dot11rxpn, 0, sizeof (union pn48));	
+		}
+
+
+		//for A-MPDU Rx reordering buffer control for bmc_sta & sta_info
+		//if A-MPDU Rx is enabled, reseting  rx_ordering_ctrl wstart_b(indicate_seq) to default value=0xffff
+		//todo: check if AP can send A-MPDU packets
+		for(i=0; i < 16 ; i++)
+		{
+			//preorder_ctrl = &precvpriv->recvreorder_ctrl[i];
+			preorder_ctrl = &psta->recvreorder_ctrl[i];
+			preorder_ctrl->enable = _FALSE;
+			preorder_ctrl->indicate_seq = 0xffff;
+			#ifdef DBG_RX_SEQ
+			DBG_871X("DBG_RX_SEQ %s:%d indicate_seq:%u \n", __FUNCTION__, __LINE__,
+				preorder_ctrl->indicate_seq);
+			#endif
+			preorder_ctrl->wend_b= 0xffff;
+			preorder_ctrl->wsize_b = 64;//max_ampdu_sz;//ex. 32(kbytes) -> wsize_b=32
+		}
+
+		
+		bmc_sta = rtw_get_bcmc_stainfo(padapter);
+		if(bmc_sta)
+		{
+			for(i=0; i < 16 ; i++)
+			{
+				//preorder_ctrl = &precvpriv->recvreorder_ctrl[i];
+				preorder_ctrl = &bmc_sta->recvreorder_ctrl[i];
+				preorder_ctrl->enable = _FALSE;
+				preorder_ctrl->indicate_seq = 0xffff;
+				#ifdef DBG_RX_SEQ
+				DBG_871X("DBG_RX_SEQ %s:%d indicate_seq:%u \n", __FUNCTION__, __LINE__,
+					preorder_ctrl->indicate_seq);
+				#endif
+				preorder_ctrl->wend_b= 0xffff;
+				preorder_ctrl->wsize_b = 64;//max_ampdu_sz;//ex. 32(kbytes) -> wsize_b=32
+			}
+		}
+
+	
+		//misc.
+		update_sta_info(padapter, psta);
+		
+	}
+					
+	return psta;
+	
+}
+
+//pnetwork : returns from rtw_joinbss_event_callback
+//ptarget_wlan: found from scanned_queue
+static void rtw_joinbss_update_network(_adapter *padapter, struct wlan_network *ptarget_wlan, struct wlan_network  *pnetwork)
+{
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);	
+	struct wlan_network  *cur_network = &(pmlmepriv->cur_network);
+
+	DBG_871X("%s\n", __FUNCTION__);
+	
+	RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("\nfw_state:%x, BSSID:"MAC_FMT"\n"
+		,get_fwstate(pmlmepriv), MAC_ARG(pnetwork->network.MacAddress)));
+
+				
+	// why not use ptarget_wlan??
+	_rtw_memcpy(&cur_network->network, &pnetwork->network, pnetwork->network.Length);
+
+	cur_network->aid = pnetwork->join_res;
+
+				
+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
+	rtw_set_signal_stat_timer(&padapter->recvpriv);
+#endif
+	padapter->recvpriv.signal_strength = ptarget_wlan->network.PhyInfo.SignalStrength;
+	padapter->recvpriv.signal_qual = ptarget_wlan->network.PhyInfo.SignalQuality;
+	//the ptarget_wlan->network.Rssi is raw data, we use ptarget_wlan->network.PhyInfo.SignalStrength instead (has scaled)
+	padapter->recvpriv.rssi = translate_percentage_to_dbm(ptarget_wlan->network.PhyInfo.SignalStrength);
+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
+	rtw_set_signal_stat_timer(&padapter->recvpriv);
+#endif
+				
+	//update fw_state //will clr _FW_UNDER_LINKING here indirectly
+	switch(pnetwork->network.InfrastructureMode)
+	{
+		case Ndis802_11Infrastructure:						
+				pmlmepriv->fw_state = WIFI_STATION_STATE;
+				break;
+		case Ndis802_11IBSS:		
+				pmlmepriv->fw_state = WIFI_ADHOC_STATE;
+				break;
+		default:
+				pmlmepriv->fw_state = WIFI_NULL_STATE;
+				RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Invalid network_mode\n"));
+				break;
+	}
+
+	rtw_update_protection(padapter, (cur_network->network.IEs) + sizeof (NDIS_802_11_FIXED_IEs), 
+									(cur_network->network.IELength));
+			
+#ifdef CONFIG_80211N_HT			
+	rtw_update_ht_cap(padapter, cur_network->network.IEs, cur_network->network.IELength);
+#endif
+
+
+}
+
+//Notes: the fucntion could be > passive_level (the same context as Rx tasklet)
+//pnetwork : returns from rtw_joinbss_event_callback
+//ptarget_wlan: found from scanned_queue
+//if join_res > 0, for (fw_state==WIFI_STATION_STATE), we check if  "ptarget_sta" & "ptarget_wlan" exist.	
+//if join_res > 0, for (fw_state==WIFI_ADHOC_STATE), we only check if "ptarget_wlan" exist.
+//if join_res > 0, update "cur_network->network" from "pnetwork->network" if (ptarget_wlan !=NULL).
+//
+//#define REJOIN
+void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf)
+{
+	_irqL irqL,irqL2;
+	int	res;
+	static u8 retry=0;
+	u8 timer_cancelled;
+	struct sta_info *ptarget_sta= NULL, *pcur_sta = NULL;
+   	struct	sta_priv *pstapriv = &adapter->stapriv;
+	struct	mlme_priv	*pmlmepriv = &(adapter->mlmepriv);
+	struct wlan_network 	*pnetwork	= (struct wlan_network *)pbuf;
+	struct wlan_network 	*cur_network = &(pmlmepriv->cur_network);
+	struct wlan_network	*pcur_wlan = NULL, *ptarget_wlan = NULL;
+	unsigned int 		the_same_macaddr = _FALSE;	
+
+_func_enter_;	
+
+#ifdef CONFIG_RTL8712
+       //endian_convert
+	pnetwork->join_res = le32_to_cpu(pnetwork->join_res);
+	pnetwork->network_type = le32_to_cpu(pnetwork->network_type);
+	pnetwork->network.Length = le32_to_cpu(pnetwork->network.Length);
+	pnetwork->network.Ssid.SsidLength = le32_to_cpu(pnetwork->network.Ssid.SsidLength);
+	pnetwork->network.Privacy =le32_to_cpu( pnetwork->network.Privacy);
+	pnetwork->network.Rssi = le32_to_cpu(pnetwork->network.Rssi);
+	pnetwork->network.NetworkTypeInUse =le32_to_cpu(pnetwork->network.NetworkTypeInUse) ;	
+	pnetwork->network.Configuration.ATIMWindow = le32_to_cpu(pnetwork->network.Configuration.ATIMWindow);
+	pnetwork->network.Configuration.BeaconPeriod = le32_to_cpu(pnetwork->network.Configuration.BeaconPeriod);
+	pnetwork->network.Configuration.DSConfig = le32_to_cpu(pnetwork->network.Configuration.DSConfig);
+	pnetwork->network.Configuration.FHConfig.DwellTime=le32_to_cpu(pnetwork->network.Configuration.FHConfig.DwellTime);
+	pnetwork->network.Configuration.FHConfig.HopPattern=le32_to_cpu(pnetwork->network.Configuration.FHConfig.HopPattern);
+	pnetwork->network.Configuration.FHConfig.HopSet=le32_to_cpu(pnetwork->network.Configuration.FHConfig.HopSet);
+	pnetwork->network.Configuration.FHConfig.Length=le32_to_cpu(pnetwork->network.Configuration.FHConfig.Length);	
+	pnetwork->network.Configuration.Length = le32_to_cpu(pnetwork->network.Configuration.Length);
+	pnetwork->network.InfrastructureMode = le32_to_cpu(pnetwork->network.InfrastructureMode);
+	pnetwork->network.IELength = le32_to_cpu(pnetwork->network.IELength );
+#endif
+
+	RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("joinbss event call back received with res=%d\n", pnetwork->join_res));
+
+	rtw_get_encrypt_decrypt_from_registrypriv(adapter);
+	
+
+	if (pmlmepriv->assoc_ssid.SsidLength == 0)
+	{
+		RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("@@@@@   joinbss event call back  for Any SSid\n"));		
+	}
+	else
+	{
+		RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("@@@@@   rtw_joinbss_event_callback for SSid:%s\n", pmlmepriv->assoc_ssid.Ssid));
+	}
+	
+	the_same_macaddr = _rtw_memcmp(pnetwork->network.MacAddress, cur_network->network.MacAddress, ETH_ALEN);
+
+	pnetwork->network.Length = get_WLAN_BSSID_EX_sz(&pnetwork->network);
+	if(pnetwork->network.Length > sizeof(WLAN_BSSID_EX))
+	{
+		RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n\n ***joinbss_evt_callback return a wrong bss ***\n\n"));
+		goto ignore_joinbss_callback;
+	}
+		
+	_enter_critical_bh(&pmlmepriv->lock, &irqL);
+	
+	RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("\n rtw_joinbss_event_callback !! _enter_critical \n"));
+
+	if(pnetwork->join_res > 0)
+	{
+		_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+		retry = 0;
+		if (check_fwstate(pmlmepriv,_FW_UNDER_LINKING) )
+		{
+			//s1. find ptarget_wlan
+			if(check_fwstate(pmlmepriv, _FW_LINKED) )
+			{
+				if(the_same_macaddr == _TRUE)
+				{
+					ptarget_wlan = rtw_find_network(&pmlmepriv->scanned_queue, cur_network->network.MacAddress);					
+				}
+				else
+				{
+					pcur_wlan = rtw_find_network(&pmlmepriv->scanned_queue, cur_network->network.MacAddress);
+					if(pcur_wlan)	pcur_wlan->fixed = _FALSE;
+
+					pcur_sta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress);
+					if(pcur_sta){
+						_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL2);
+						rtw_free_stainfo(adapter,  pcur_sta);
+						_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2);
+					}
+
+					ptarget_wlan = rtw_find_network(&pmlmepriv->scanned_queue, pnetwork->network.MacAddress);
+					if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE){
+						if(ptarget_wlan)	ptarget_wlan->fixed = _TRUE;			
+					}
+				}
+
+			}
+			else
+			{
+				ptarget_wlan = rtw_find_network(&pmlmepriv->scanned_queue, pnetwork->network.MacAddress);
+				if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE){
+					if(ptarget_wlan)	ptarget_wlan->fixed = _TRUE;			
+				}
+			}
+		
+			//s2. update cur_network 
+			if(ptarget_wlan)
+			{			
+				rtw_joinbss_update_network(adapter, ptarget_wlan, pnetwork);
+			}
+			else
+			{
+				RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Can't find ptarget_wlan when joinbss_event callback\n"));
+				_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+				goto ignore_joinbss_callback;
+			}
+					
+			
+	                //s3. find ptarget_sta & update ptarget_sta after update cur_network only for station mode 
+			if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
+			{
+				ptarget_sta = rtw_joinbss_update_stainfo(adapter, pnetwork);
+				if(ptarget_sta==NULL)
+				{
+					RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Can't update stainfo when joinbss_event callback\n"));
+					_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+					goto ignore_joinbss_callback;
+				}
+			}
+		
+		        //s4. indicate connect			
+			if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
+			{
+				rtw_indicate_connect(adapter);
+			}
+			else
+			{
+				//adhoc mode will rtw_indicate_connect when rtw_stassoc_event_callback
+				RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("adhoc mode, fw_state:%x", get_fwstate(pmlmepriv)));
+			}
+		
+
+			//s5. Cancle assoc_timer					
+			_cancel_timer(&pmlmepriv->assoc_timer, &timer_cancelled);
+	
+			RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("Cancle assoc_timer\n"));
+
+		}
+		else
+		{
+			RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_joinbss_event_callback err: fw_state:%x", get_fwstate(pmlmepriv)));	
+			_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+			goto ignore_joinbss_callback;
+		}
+		
+		_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+				
+	}
+	else if(pnetwork->join_res == -4) 
+	{
+		rtw_reset_securitypriv(adapter);
+		_set_timer(&pmlmepriv->assoc_timer, 1);					
+
+		//rtw_free_assoc_resources(adapter, 1);
+
+		if((check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) == _TRUE)
+		{		
+			RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("fail! clear _FW_UNDER_LINKING ^^^fw_state=%x\n", get_fwstate(pmlmepriv)));
+			_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
+		}	
+		
+	}
+	else //if join_res < 0 (join fails), then try again
+	{
+	
+		#ifdef REJOIN
+		res = _FAIL;
+		if(retry < 2) {
+			res = rtw_select_and_join_from_scanned_queue(pmlmepriv);
+			RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_select_and_join_from_scanned_queue again! res:%d\n",res));
+		}
+
+		 if(res == _SUCCESS)
+		{
+			//extend time of assoc_timer
+			_set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT);
+			retry++;
+		}
+		else if(res == 2)//there is no need to wait for join
+		{
+			_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
+			rtw_indicate_connect(adapter);
+		}	
+		else
+		{
+			RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Set Assoc_Timer = 1; can't find match ssid in scanned_q \n"));
+		#endif
+			
+			_set_timer(&pmlmepriv->assoc_timer, 1);
+			//rtw_free_assoc_resources(adapter, 1);
+			_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
+			
+		#ifdef REJOIN
+			retry = 0;	
+		}
+		#endif
+	}
+
+ignore_joinbss_callback:
+
+	_exit_critical_bh(&pmlmepriv->lock, &irqL);
+	_func_exit_;	
+}
+
+void rtw_joinbss_event_callback(_adapter *adapter, u8 *pbuf)
+{
+	struct wlan_network 	*pnetwork	= (struct wlan_network *)pbuf;
+	struct xmit_priv *pxmitpriv = &adapter->xmitpriv;
+
+_func_enter_;
+
+	mlmeext_joinbss_event_callback(adapter, pnetwork->join_res);
+
+	//Set Value to 1 to xmit data frame.
+	ATOMIC_SET(&pxmitpriv->HwRdyXmitData, 1);
+	rtw_os_xmit_schedule(adapter);
+
+_func_exit_;
+}
+
+void rtw_stassoc_event_callback(_adapter *adapter, u8 *pbuf)
+{
+	_irqL irqL;	
+	struct sta_info *psta;
+	struct mlme_priv *pmlmepriv = &(adapter->mlmepriv);
+	struct stassoc_event	*pstassoc	= (struct stassoc_event*)pbuf;
+	struct wlan_network 	*cur_network = &(pmlmepriv->cur_network);
+	struct wlan_network	*ptarget_wlan = NULL;
+
+_func_enter_;	
+	
+	// to do: 
+	if(rtw_access_ctrl(&adapter->acl_list, pstassoc->macaddr) == _FALSE)
+		return;
+
+#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME)
+	if(check_fwstate(pmlmepriv, WIFI_AP_STATE))
+	{
+		psta = rtw_get_stainfo(&adapter->stapriv, pstassoc->macaddr);	
+		if(psta)
+		{
+			//bss_cap_update(adapter, psta);		
+			//sta_info_update(adapter, psta);
+			ap_sta_info_defer_update(adapter, psta);						
+		}	
+		
+		goto exit;
+	}	
+#endif	
+
+	psta = rtw_get_stainfo(&adapter->stapriv, pstassoc->macaddr);	
+	if( psta != NULL)
+	{
+		//the sta have been in sta_info_queue => do nothing 
+		
+		RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Error: rtw_stassoc_event_callback: sta has been in sta_hash_queue \n"));
+		
+		goto exit; //(between drv has received this event before and  fw have not yet to set key to CAM_ENTRY)
+	}
+
+	psta = rtw_alloc_stainfo(&adapter->stapriv, pstassoc->macaddr);	
+	if (psta == NULL) {
+		RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Can't alloc sta_info when rtw_stassoc_event_callback\n"));
+		goto exit;
+	}	
+	
+	//to do : init sta_info variable
+	psta->qos_option = 0;	
+	psta->mac_id = le32_to_cpu((uint)pstassoc->cam_id);
+	//psta->aid = (uint)pstassoc->cam_id;
+	
+	if(adapter->securitypriv.dot11AuthAlgrthm==dot11AuthAlgrthm_8021X)
+		psta->dot118021XPrivacy = adapter->securitypriv.dot11PrivacyAlgrthm;
+
+	psta->ieee8021x_blocked = _FALSE;		
+	
+	_enter_critical_bh(&pmlmepriv->lock, &irqL);
+
+	if ( (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)==_TRUE ) || 
+		(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)==_TRUE ) )
+	{
+		if(adapter->stapriv.asoc_sta_count== 2)
+		{
+			_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+			ptarget_wlan = rtw_find_network(&pmlmepriv->scanned_queue, cur_network->network.MacAddress);
+			if(ptarget_wlan)	ptarget_wlan->fixed = _TRUE;
+			_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+			// a sta + bc/mc_stainfo (not Ibss_stainfo)
+			rtw_indicate_connect(adapter);
+		}
+	}
+
+	_exit_critical_bh(&pmlmepriv->lock, &irqL);
+
+
+	mlmeext_sta_add_event_callback(adapter, psta);
+	
+#ifdef CONFIG_RTL8711
+	//submit SetStaKey_cmd to tell fw, fw will allocate an CAM entry for this sta	
+	rtw_setstakey_cmd(adapter, (unsigned char*)psta, _FALSE);
+#endif
+		
+exit:
+	
+_func_exit_;	
+
+}
+
+void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf)
+{
+	_irqL irqL,irqL2;	
+	struct sta_info *psta;
+	struct wlan_network* pwlan = NULL;
+	WLAN_BSSID_EX    *pdev_network=NULL;
+	u8* pibss = NULL;
+	struct	mlme_priv	*pmlmepriv = &(adapter->mlmepriv);
+	struct 	stadel_event *pstadel	= (struct stadel_event*)pbuf;
+   	struct	sta_priv *pstapriv = &adapter->stapriv;
+	struct wlan_network *tgt_network = &(pmlmepriv->cur_network);
+	
+_func_enter_;	
+
+	mlmeext_sta_del_event_callback(adapter);
+
+        if(check_fwstate(pmlmepriv, WIFI_AP_STATE))
+		return;
+
+	_enter_critical_bh(&pmlmepriv->lock, &irqL2);
+
+	if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) )
+	{
+
+		#ifdef CONFIG_LAYER2_ROAMING
+		if(pmlmepriv->to_roaming > 0)
+			pmlmepriv->to_roaming--; // this stadel_event is caused by roaming, decrease to_roaming
+		else if(pmlmepriv->to_roaming ==0)
+			pmlmepriv->to_roaming= adapter->registrypriv.max_roaming_times;
+
+		if(*((unsigned short *)(pstadel->rsvd)) !=65535 ) //if stadel_event isn't caused by no rx
+			pmlmepriv->to_roaming=0; // don't roam
+		#endif //CONFIG_LAYER2_ROAMING
+
+
+		rtw_free_assoc_resources(adapter, 1);
+		rtw_indicate_disconnect(adapter);
+		_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+		// remove the network entry in scanned_queue
+		pwlan = rtw_find_network(&pmlmepriv->scanned_queue, tgt_network->network.MacAddress);	
+		if (pwlan) {			
+			pwlan->fixed = _FALSE;
+			rtw_free_network_nolock(pmlmepriv, pwlan);
+		}
+		_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+		#ifdef CONFIG_LAYER2_ROAMING
+		_rtw_roaming(adapter, tgt_network);
+		#endif //CONFIG_LAYER2_ROAMING
+		
+	}
+
+	if ( check_fwstate(pmlmepriv,WIFI_ADHOC_MASTER_STATE) || 
+	      check_fwstate(pmlmepriv,WIFI_ADHOC_STATE))
+	{
+		psta = rtw_get_stainfo(&adapter->stapriv, pstadel->macaddr);
+		
+		_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
+		rtw_free_stainfo(adapter,  psta);
+		_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
+		
+		if(adapter->stapriv.asoc_sta_count== 1) //a sta + bc/mc_stainfo (not Ibss_stainfo)
+		{ 
+			//rtw_indicate_disconnect(adapter);//removed@20091105
+			_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+			//free old ibss network
+			//pwlan = rtw_find_network(&pmlmepriv->scanned_queue, pstadel->macaddr);
+			pwlan = rtw_find_network(&pmlmepriv->scanned_queue, tgt_network->network.MacAddress);
+			if(pwlan)	
+			{
+				pwlan->fixed = _FALSE;
+				rtw_free_network_nolock(pmlmepriv, pwlan); 
+			}
+			_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+			//re-create ibss
+			pdev_network = &(adapter->registrypriv.dev_network);			
+			pibss = adapter->registrypriv.dev_network.MacAddress;
+
+			_rtw_memcpy(pdev_network, &tgt_network->network, get_WLAN_BSSID_EX_sz(&tgt_network->network));
+			
+			_rtw_memset(&pdev_network->Ssid, 0, sizeof(NDIS_802_11_SSID));
+			_rtw_memcpy(&pdev_network->Ssid, &pmlmepriv->assoc_ssid, sizeof(NDIS_802_11_SSID));
+	
+			rtw_update_registrypriv_dev_network(adapter);			
+
+			rtw_generate_random_ibss(pibss);
+			
+			if(check_fwstate(pmlmepriv,WIFI_ADHOC_STATE))
+			{
+				set_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
+				_clr_fwstate_(pmlmepriv, WIFI_ADHOC_STATE);
+			}
+
+			if(rtw_createbss_cmd(adapter)!=_SUCCESS)
+			{
+
+				RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("***Error=>stadel_event_callback: rtw_createbss_cmd status FAIL*** \n "));										
+
+			}
+
+			
+		}
+		
+	}
+	
+	_exit_critical_bh(&pmlmepriv->lock, &irqL2);
+	
+_func_exit_;	
+
+}
+
+
+void rtw_cpwm_event_callback(_adapter *adapter, u8 *pbuf)
+{
+	struct reportpwrstate_parm *preportpwrstate = (struct reportpwrstate_parm *)pbuf;
+
+_func_enter_;
+
+	RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_cpwm_event_callback !!!\n"));
+#ifdef CONFIG_PWRCTRL
+	preportpwrstate->state |= (u8)(adapter->pwrctrlpriv.cpwm_tog + 0x80);
+	cpwm_int_hdl(adapter, preportpwrstate);
+#endif
+
+_func_exit_;
+
+}
+
+void _rtw_join_timeout_handler (_adapter *adapter)
+{
+	_irqL irqL;
+	struct	mlme_priv *pmlmepriv = &adapter->mlmepriv;
+	int do_join_r;
+
+#if 0
+	if (adapter->bDriverStopped == _TRUE){
+		_rtw_up_sema(&pmlmepriv->assoc_terminate);
+		return;
+	}
+#endif	
+
+_func_enter_;		
+
+	RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n^^^rtw_join_timeout_handler ^^^fw_state=%x\n", get_fwstate(pmlmepriv)));
+	RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("+rtw_join_timeout_handler, fw_state=%x\n", get_fwstate(pmlmepriv)));	
+	
+	if(adapter->bDriverStopped ||adapter->bSurpriseRemoved)
+		return;
+
+	
+	_enter_critical_bh(&pmlmepriv->lock, &irqL);
+
+	#ifdef CONFIG_LAYER2_ROAMING
+	if(pmlmepriv->to_roaming>0) { // join timeout caused by roaming
+		while(1) {
+			pmlmepriv->to_roaming--;
+			if(pmlmepriv->to_roaming!=0) { //try another ,
+				DBG_871X("%s try another roaming\n", __FUNCTION__);
+				if( _SUCCESS!=(do_join_r=rtw_do_join(adapter)) ) {
+					DBG_871X("%s roaming do_join return %d\n", __FUNCTION__ ,do_join_r);
+					continue;
+				}
+				break;
+			} else {
+				DBG_871X("%s We've try roaming but fail\n", __FUNCTION__);
+				_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
+				rtw_indicate_disconnect(adapter);
+				break;
+			}
+		}
+		
+	} else 
+	#endif
+	{
+		if((check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) == _TRUE)
+		{
+			RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("clear _FW_UNDER_LINKING ^^^fw_state=%x\n", get_fwstate(pmlmepriv)));
+			_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);              
+		}
+
+		//Jeff: Even if not linked, we still need to reset securitypriv
+		//if((check_fwstate(pmlmepriv, _FW_LINKED)) == _TRUE)
+		{
+			rtw_os_indicate_disconnect(adapter);
+			_clr_fwstate_(pmlmepriv, _FW_LINKED);
+		}
+
+		free_scanqueue(pmlmepriv);//???
+		rtw_led_control(adapter, LED_CTL_NO_LINK);
+ 	}
+
+	_exit_critical_bh(&pmlmepriv->lock, &irqL);
+	
+
+#ifdef CONFIG_DRVEXT_MODULE_WSC	
+	drvext_assoc_fail_indicate(&adapter->drvextpriv);	
+#endif	
+	
+_func_exit_;
+
+}
+
+void rtw_scan_timeout_handler (_adapter *adapter)
+{	
+	_irqL irqL;
+	struct	mlme_priv *pmlmepriv = &adapter->mlmepriv;
+	
+	RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("\n^^^rtw_scan_timeout_handler ^^^fw_state=%x\n", get_fwstate(pmlmepriv)));
+
+	_enter_critical_bh(&pmlmepriv->lock, &irqL);
+	
+	if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) )
+	{		
+		_clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY);
+	}
+	else 
+	{	
+		RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("fw status =%x, rtw_scan_timeout_handler: survey done event comes too late!\n", get_fwstate(pmlmepriv)));	
+	}	
+
+	_exit_critical_bh(&pmlmepriv->lock, &irqL);
+	
+}
+
+static void rtw_auto_scan_handler(_adapter *padapter)
+{
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+	struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv;
+
+	//auto site survey per 60sec
+	if(pmlmepriv->scan_interval >0)
+	{
+		pmlmepriv->scan_interval--;
+		if(pmlmepriv->scan_interval==0)
+		{
+			if( pwrctrlpriv->power_mgnt != PS_MODE_ACTIVE )
+				return;			
+
+/*		
+			if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) 
+			{
+				DBG_8192C("exit %s when _FW_UNDER_SURVEY|_FW_UNDER_LINKING -> \n", __FUNCTION__);
+				return;
+			}
+			
+			if(pmlmepriv->sitesurveyctrl.traffic_busy == _TRUE)
+			{
+				DBG_8192C("%s exit cause traffic_busy(%x)\n",__FUNCTION__, pmlmepriv->sitesurveyctrl.traffic_busy);
+				return;
+			}
+*/
+
+			DBG_871X("%s\n", __FUNCTION__);
+
+			rtw_set_802_11_bssid_list_scan(padapter);			
+			
+			pmlmepriv->scan_interval = SCAN_INTERVAL;// 30*2 sec = 60sec
+			
+		}
+		
+	}
+
+}
+
+void rtw_dynamic_check_timer_handlder(_adapter *adapter)
+{
+#ifdef CONFIG_AP_MODE
+	struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
+#endif //CONFIG_AP_MODE
+	struct registry_priv *pregistrypriv = &adapter->registrypriv;
+
+	if(adapter->hw_init_completed == _FALSE)
+		return;
+
+	if ((adapter->bDriverStopped == _TRUE)||(adapter->bSurpriseRemoved== _TRUE))
+		return;
+
+	if(adapter->net_closed == _TRUE)
+		return;
+
+	rtw_dynamic_chk_wk_cmd(adapter);
+
+	if(pregistrypriv->wifi_spec==1)
+	{	
+#ifdef CONFIG_P2P
+		struct wifidirect_info *pwdinfo = &adapter->wdinfo;
+		if(pwdinfo->p2p_state == P2P_STATE_NONE)
+#endif	
+		{
+			//auto site survey
+			rtw_auto_scan_handler(adapter);
+		}	
+	}
+
+#ifdef CONFIG_AP_MODE
+	if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)
+	{
+		expire_timeout_chk(adapter);
+	}	
+#endif
+
+#ifdef CONFIG_BR_EXT
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35))
+	rcu_read_lock();
+#endif	// (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35))
+
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) 
+	if( adapter->pnetdev->br_port 
+#else	// (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35))
+	if( rcu_dereference(adapter->pnetdev->rx_handler_data)
+#endif	// (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35))
+		&& (check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE) )
+	{
+		// expire NAT2.5 entry
+		void nat25_db_expire(_adapter *priv);
+		nat25_db_expire(adapter);
+
+		if (adapter->pppoe_connection_in_progress > 0) {
+			adapter->pppoe_connection_in_progress--;
+		}
+		
+		// due to rtw_dynamic_check_timer_handlder() is called every 2 seconds
+		if (adapter->pppoe_connection_in_progress > 0) {
+			adapter->pppoe_connection_in_progress--;
+		}
+	}
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35))
+	rcu_read_unlock();
+#endif	// (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35))
+
+#endif	// CONFIG_BR_EXT
+	
+}
+
+
+#ifdef CONFIG_SET_SCAN_DENY_TIMER
+void rtw_set_scan_deny_timer_hdl(_adapter *adapter)
+{
+	struct mlme_priv *mlmepriv = &adapter->mlmepriv;
+
+	//allowed set scan
+	ATOMIC_SET(&mlmepriv->set_scan_deny, 0);
+}
+
+void rtw_set_scan_deny(struct mlme_priv *mlmepriv, u32 ms)
+{
+	ATOMIC_SET(&mlmepriv->set_scan_deny, 1);
+	_set_timer(&mlmepriv->set_scan_deny_timer, ms);
+}
+#endif
+
+/*
+* Select a new join candidate from the original @param candidate and @param competitor
+* @return _TRUE: candidate is updated
+* @return _FALSE: candidate is not updated
+*/
+static int rtw_check_join_candidate(struct mlme_priv *pmlmepriv
+	, struct wlan_network **candidate, struct wlan_network *competitor)
+{
+	int updated = _FALSE;
+	_adapter *adapter = container_of(pmlmepriv, _adapter, mlmepriv);
+
+	if(pmlmepriv->assoc_by_bssid==_TRUE) { // associate with bssid
+		if(	(*candidate == NULL ||(*candidate)->network.Rssi<competitor->network.Rssi )
+			&& _rtw_memcmp(competitor->network.MacAddress, pmlmepriv->assoc_bssid, ETH_ALEN)==_TRUE
+		) {
+			*candidate = competitor;
+			updated = _TRUE;
+		}
+	} else  if (pmlmepriv->assoc_ssid.SsidLength == 0 ) { // associate with ssid, but ssidlength is 0
+		if(	(*candidate == NULL ||(*candidate)->network.Rssi<competitor->network.Rssi ) ) {
+			*candidate = competitor;
+			updated = _TRUE;
+		}
+	} else
+#ifdef  CONFIG_LAYER2_ROAMING
+	if(pmlmepriv->to_roaming) { // roaming
+		if(	(*candidate == NULL ||(*candidate)->network.Rssi<competitor->network.Rssi )
+			&& is_same_ess(&competitor->network, &pmlmepriv->cur_network.network) 
+			//&&(!is_same_network(&competitor->network, &pmlmepriv->cur_network.network))
+			&& rtw_get_passing_time_ms((u32)competitor->last_scanned) < 5000
+			&& rtw_is_desired_network(adapter, competitor)
+		) {
+			*candidate = competitor;
+			updated = _TRUE;
+		}
+		
+	} else
+#endif
+	{ // associate with ssid
+		if(	(*candidate == NULL ||(*candidate)->network.Rssi<competitor->network.Rssi )
+			&& (competitor->network.Ssid.SsidLength==pmlmepriv->assoc_ssid.SsidLength)
+			&&((_rtw_memcmp(competitor->network.Ssid.Ssid, pmlmepriv->assoc_ssid.Ssid, pmlmepriv->assoc_ssid.SsidLength)) == _TRUE)
+			&& rtw_is_desired_network(adapter, competitor)
+		) {
+			*candidate = competitor;
+			updated = _TRUE;
+		}
+	}
+
+	if(updated){
+		DBG_871X("[by_bssid:%u][assoc_ssid:%s]"
+			#ifdef  CONFIG_LAYER2_ROAMING
+			"[to_roaming:%u] "
+			#endif
+			"new candidate: %s("MAC_FMT") rssi:%d\n",
+			pmlmepriv->assoc_by_bssid,
+			pmlmepriv->assoc_ssid.Ssid,
+			#ifdef  CONFIG_LAYER2_ROAMING
+			pmlmepriv->to_roaming,
+			#endif
+			(*candidate)->network.Ssid.Ssid,
+			MAC_ARG((*candidate)->network.MacAddress),
+			(int)(*candidate)->network.Rssi
+		);
+	}
+	
+	return updated;
+}
+
+
+/*
+Calling context:
+The caller of the sub-routine will be in critical section...
+
+The caller must hold the following spinlock
+
+pmlmepriv->lock
+
+
+*/
+#if 1
+int rtw_select_and_join_from_scanned_queue(struct mlme_priv *pmlmepriv )
+{
+	_irqL	irqL;
+	int ret;
+	_list	*phead;
+	_adapter *adapter;	
+	_queue	*queue	= &(pmlmepriv->scanned_queue);
+	struct	wlan_network	*pnetwork = NULL;
+	struct	wlan_network	*candidate = NULL;
+	u8 		bSupportAntDiv = _FALSE;
+
+_func_enter_;
+
+	_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+	phead = get_list_head(queue);		
+	adapter = (_adapter *)pmlmepriv->nic_hdl;
+
+	pmlmepriv->pscanned = get_next( phead );
+
+	while (!rtw_end_of_queue_search(phead, pmlmepriv->pscanned)) {
+
+		pnetwork = LIST_CONTAINOR(pmlmepriv->pscanned, struct wlan_network, list);
+		if(pnetwork==NULL){
+			RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s return _FAIL:(pnetwork==NULL)\n", __FUNCTION__));
+			ret = _FAIL;
+			goto exit;
+		}
+		
+		pmlmepriv->pscanned = get_next(pmlmepriv->pscanned);
+
+		#if 0
+		DBG_871X("MacAddress:"MAC_FMT" ssid:%s\n", MAC_ARG(pnetwork->network.MacAddress), pnetwork->network.Ssid.Ssid);
+		#endif
+
+		rtw_check_join_candidate(pmlmepriv, &candidate, pnetwork);
+ 
+ 	}
+
+	if(candidate == NULL) {
+		DBG_871X("%s: return _FAIL(candidate == NULL)\n", __FUNCTION__);
+		ret = _FAIL;
+		goto exit;
+	} else {
+		DBG_871X("%s: candidate: %s("MAC_FMT")\n", __FUNCTION__,
+			candidate->network.Ssid.Ssid, MAC_ARG(candidate->network.MacAddress));;
+	}
+	
+
+	// check for situation of  _FW_LINKED 
+	if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
+	{
+		DBG_871X("%s: _FW_LINKED while ask_for_joinbss!!!\n", __FUNCTION__);
+
+		#if 0 // for WPA/WPA2 authentication, wpa_supplicant will expect authentication from AP, it is needed to reconnect AP...
+		if(is_same_network(&pmlmepriv->cur_network.network, &candidate->network))
+		{
+			DBG_871X("%s: _FW_LINKED and is same network, it needn't join again\n", __FUNCTION__);
+
+			rtw_indicate_connect(adapter);//rtw_indicate_connect again
+				
+			ret = 2;
+			goto exit;
+		}
+		else
+		#endif
+		{
+			rtw_disassoc_cmd(adapter);
+			rtw_indicate_disconnect(adapter);
+			rtw_free_assoc_resources(adapter, 0);
+		}
+	}
+	
+	#ifdef CONFIG_ANTENNA_DIVERSITY
+	adapter->HalFunc.GetHalDefVarHandler(adapter, HAL_DEF_IS_SUPPORT_ANT_DIV, &(bSupportAntDiv));
+	if(_TRUE == bSupportAntDiv)	
+	{
+		u8 CurrentAntenna;
+		adapter->HalFunc.GetHalDefVarHandler(adapter, HAL_DEF_CURRENT_ANTENNA, &(CurrentAntenna));			
+		DBG_8192C("#### Opt_Ant_(%s) , cur_Ant(%s)\n",
+			(2==candidate->network.PhyInfo.Optimum_antenna)?"A":"B",
+			(2==CurrentAntenna)?"A":"B"
+		);
+	}
+	#endif
+
+	ret = rtw_joinbss_cmd(adapter, candidate);
+	
+exit:
+	_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+_func_exit_;
+
+	return ret;
+
+}
+#else
+int rtw_select_and_join_from_scanned_queue(struct mlme_priv *pmlmepriv )
+{	
+	_irqL	irqL;
+	_list	*phead;
+	u8 CurrentAntenna;
+	unsigned char *dst_ssid, *src_ssid;
+	_adapter *adapter;	
+	_queue	*queue	= &(pmlmepriv->scanned_queue);
+	struct	wlan_network	*pnetwork = NULL;
+	struct	wlan_network	*pnetwork_max_rssi = NULL;
+	#ifdef CONFIG_LAYER2_ROAMING
+	struct wlan_network * roaming_candidate=NULL;
+	u32 cur_time=rtw_get_current_time();
+	#endif
+
+_func_enter_;
+	_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+	phead = get_list_head(queue);		
+	adapter = (_adapter *)pmlmepriv->nic_hdl;
+
+	pmlmepriv->pscanned = get_next( phead );
+
+	while (!rtw_end_of_queue_search(phead, pmlmepriv->pscanned)) {
+
+		pnetwork = LIST_CONTAINOR(pmlmepriv->pscanned, struct wlan_network, list);
+		if(pnetwork==NULL){
+			RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("(2)rtw_select_and_join_from_scanned_queue return _FAIL:(pnetwork==NULL)\n"));
+			_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+			return _FAIL;	
+		}
+
+		dst_ssid = pnetwork->network.Ssid.Ssid;
+		src_ssid = pmlmepriv->assoc_ssid.Ssid;
+		
+		pmlmepriv->pscanned = get_next(pmlmepriv->pscanned);
+
+		#if 0
+		DBG_871X("MacAddress:"MAC_FMT" ssid:%s\n", MAC_ARG(pnetwork->network.MacAddress), pnetwork->network.Ssid.Ssid);
+		#endif
+
+		if(pmlmepriv->assoc_by_bssid==_TRUE)
+		{
+			if(_rtw_memcmp(pnetwork->network.MacAddress, pmlmepriv->assoc_bssid, ETH_ALEN)==_TRUE)
+			{
+				//remove the condition @ 20081125
+				//if((pmlmepriv->cur_network.network.InfrastructureMode==Ndis802_11AutoUnknown)||
+				//	pmlmepriv->cur_network.network.InfrastructureMode == pnetwork->network.InfrastructureMode)
+				//		goto ask_for_joinbss;
+				
+				if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
+				{
+					if(is_same_network(&pmlmepriv->cur_network.network, &pnetwork->network))
+					{
+						//DBG_871X("select_and_join(1): _FW_LINKED and is same network, it needn't join again\n");
+
+						rtw_indicate_connect(adapter);//rtw_indicate_connect again
+						_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);	
+						return 2;
+					}
+					else
+					{
+						rtw_disassoc_cmd(adapter);
+						rtw_indicate_disconnect(adapter);
+						rtw_free_assoc_resources(adapter, 0);
+						_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+						goto ask_for_joinbss;
+						
+					}
+				}
+				else
+				{
+					_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+					goto ask_for_joinbss;
+				}
+							
+			}
+			
+		} else if (pmlmepriv->assoc_ssid.SsidLength == 0) {			
+			goto ask_for_joinbss;//anyway, join first selected(dequeued) pnetwork if ssid_len=0				
+	
+		#ifdef CONFIG_LAYER2_ROAMING
+		} else if(pmlmepriv->to_roaming>0) {
+		
+			if(	(roaming_candidate == NULL ||roaming_candidate->network.Rssi<pnetwork->network.Rssi )
+				&& is_same_ess(&pnetwork->network, &pmlmepriv->cur_network.network) 
+				//&&(!is_same_network(&pnetwork->network, &pmlmepriv->cur_network.network))
+				&&  rtw_get_time_interval_ms((u32)pnetwork->last_scanned,cur_time) < 5000
+				) {
+				roaming_candidate = pnetwork;
+				//RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,
+				DBG_871X
+					("roaming_candidate???: %s("MAC_FMT")\n",
+					roaming_candidate->network.Ssid.Ssid, MAC_ARG(roaming_candidate->network.MacAddress) )
+					//)
+					;
+			}
+			continue;
+		#endif
+
+		} else if ( (pnetwork->network.Ssid.SsidLength==pmlmepriv->assoc_ssid.SsidLength)
+			&&((_rtw_memcmp(dst_ssid, src_ssid, pmlmepriv->assoc_ssid.SsidLength)) == _TRUE)
+			)
+		{
+			RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("dst_ssid=%s, src_ssid=%s \n", dst_ssid, src_ssid));
+#ifdef CONFIG_ANTENNA_DIVERSITY
+			adapter->HalFunc.GetHalDefVarHandler(adapter, HAL_DEF_CURRENT_ANTENNA, &(CurrentAntenna));			
+			DBG_8192C("#### dst_ssid=(%s) Opt_Ant_(%s) , cur_Ant(%s)\n", dst_ssid,
+				(2==pnetwork->network.PhyInfo.Optimum_antenna)?"A":"B",
+				(2==CurrentAntenna)?"A":"B");
+#endif
+			//remove the condition @ 20081125
+			//if((pmlmepriv->cur_network.network.InfrastructureMode==Ndis802_11AutoUnknown)||
+			//	pmlmepriv->cur_network.network.InfrastructureMode == pnetwork->network.InfrastructureMode)
+			//{
+			//	_rtw_memcpy(pmlmepriv->assoc_bssid, pnetwork->network.MacAddress, ETH_ALEN);
+			//	goto ask_for_joinbss;
+			//}
+
+			if(pmlmepriv->assoc_by_rssi==_TRUE)//if the ssid is the same, select the bss which has the max rssi
+			{
+				if( NULL==pnetwork_max_rssi|| pnetwork->network.Rssi > pnetwork_max_rssi->network.Rssi)
+						pnetwork_max_rssi = pnetwork;					
+			}
+			else if(rtw_is_desired_network(adapter, pnetwork) == _TRUE)
+			{
+				if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
+				{
+#if 0				
+					if(is_same_network(&pmlmepriv->cur_network.network, &pnetwork->network))
+					{
+						DBG_871X("select_and_join(2): _FW_LINKED and is same network, it needn't join again\n");
+						
+						rtw_indicate_connect(adapter);//rtw_indicate_connect again
+						
+						return 2;
+					}
+					else
+#endif						
+					{
+						rtw_disassoc_cmd(adapter);
+						//rtw_indicate_disconnect(adapter);//
+						rtw_free_assoc_resources(adapter, 0);
+						_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+						goto ask_for_joinbss;						
+					}
+				}
+				else
+				{
+					_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+					goto ask_for_joinbss;
+				}				
+
+			}
+		
+			
+		}
+ 	
+ 	}
+	_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+	#ifdef CONFIG_LAYER2_ROAMING
+	if(pmlmepriv->to_roaming>0 && roaming_candidate ){
+		pnetwork=roaming_candidate;
+		DBG_871X("select_and_join_from_scanned_queue: roaming_candidate: %s("MAC_FMT")\n",
+			pnetwork->network.Ssid.Ssid, MAC_ARG(pnetwork->network.MacAddress));
+		goto ask_for_joinbss;
+	}
+	#endif
+
+	if((pmlmepriv->assoc_by_rssi==_TRUE)  && (pnetwork_max_rssi!=NULL))
+	{
+		pnetwork = pnetwork_max_rssi;
+		DBG_871X("select_and_join_from_scanned_queue: pnetwork_max_rssi: %s("MAC_FMT")\n",
+			pnetwork->network.Ssid.Ssid, MAC_ARG(pnetwork->network.MacAddress));
+		goto ask_for_joinbss;
+	}
+
+	DBG_871X("(1)rtw_select_and_join_from_scanned_queue return _FAIL\n");
+	
+_func_exit_;	
+
+     return _FAIL;
+
+ask_for_joinbss:
+	
+_func_exit_;
+
+	return rtw_joinbss_cmd(adapter, pnetwork);
+
+}
+#endif
+
+
+sint rtw_set_auth(_adapter * adapter,struct security_priv *psecuritypriv)
+{
+	struct	cmd_obj* pcmd;
+	struct 	setauth_parm *psetauthparm;
+	struct	cmd_priv	*pcmdpriv=&(adapter->cmdpriv);
+	sint		res=_SUCCESS;
+	
+_func_enter_;	
+
+	pcmd = (struct	cmd_obj*)rtw_zmalloc(sizeof(struct	cmd_obj));
+	if(pcmd==NULL){
+		res= _FAIL;  //try again
+		goto exit;
+	}
+	
+	psetauthparm=(struct setauth_parm*)rtw_zmalloc(sizeof(struct setauth_parm));
+	if(psetauthparm==NULL){
+		rtw_mfree((unsigned char *)pcmd, sizeof(struct	cmd_obj));
+		res= _FAIL;
+		goto exit;
+	}
+
+	_rtw_memset(psetauthparm, 0, sizeof(struct setauth_parm));
+	psetauthparm->mode=(unsigned char)psecuritypriv->dot11AuthAlgrthm;
+	
+	pcmd->cmdcode = _SetAuth_CMD_;
+	pcmd->parmbuf = (unsigned char *)psetauthparm;   
+	pcmd->cmdsz =  (sizeof(struct setauth_parm));  
+	pcmd->rsp = NULL;
+	pcmd->rspsz = 0;
+
+
+	_rtw_init_listhead(&pcmd->list);
+
+	RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("after enqueue set_auth_cmd, auth_mode=%x\n", psecuritypriv->dot11AuthAlgrthm));
+
+	res = rtw_enqueue_cmd(pcmdpriv, pcmd);
+
+exit:
+
+_func_exit_;
+
+	return res;
+
+}
+
+
+sint rtw_set_key(_adapter * adapter,struct security_priv *psecuritypriv,sint keyid, u8 set_tx)
+{
+	u8	keylen;
+	struct cmd_obj		*pcmd;
+	struct setkey_parm	*psetkeyparm;
+	struct cmd_priv		*pcmdpriv = &(adapter->cmdpriv);
+	struct mlme_priv		*pmlmepriv = &(adapter->mlmepriv);
+	sint	res=_SUCCESS;
+	
+_func_enter_;
+	
+	pcmd = (struct	cmd_obj*)rtw_zmalloc(sizeof(struct	cmd_obj));
+	if(pcmd==NULL){
+		res= _FAIL;  //try again
+		goto exit;
+	}
+	psetkeyparm=(struct setkey_parm*)rtw_zmalloc(sizeof(struct setkey_parm));
+	if(psetkeyparm==NULL){
+		rtw_mfree((unsigned char *)pcmd, sizeof(struct	cmd_obj));
+		res= _FAIL;
+		goto exit;
+	}
+
+	_rtw_memset(psetkeyparm, 0, sizeof(struct setkey_parm));
+
+	if(psecuritypriv->dot11AuthAlgrthm ==dot11AuthAlgrthm_8021X){		
+		psetkeyparm->algorithm=(unsigned char)psecuritypriv->dot118021XGrpPrivacy;	
+		RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n rtw_set_key: psetkeyparm->algorithm=(unsigned char)psecuritypriv->dot118021XGrpPrivacy=%d \n", psetkeyparm->algorithm));
+	}	
+	else{
+		psetkeyparm->algorithm=(u8)psecuritypriv->dot11PrivacyAlgrthm;
+		RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n rtw_set_key: psetkeyparm->algorithm=(u8)psecuritypriv->dot11PrivacyAlgrthm=%d \n", psetkeyparm->algorithm));
+
+	}
+	psetkeyparm->keyid = (u8)keyid;//0~3
+	psetkeyparm->set_tx = set_tx;
+	pmlmepriv->key_mask |= BIT(psetkeyparm->keyid);
+#ifdef CONFIG_AUTOSUSPEND
+	if( _TRUE  == adapter->pwrctrlpriv.bInternalAutoSuspend)
+	{
+		adapter->pwrctrlpriv.wepkeymask = pmlmepriv->key_mask;
+		DBG_8192C("....AutoSuspend pwrctrlpriv.wepkeymask(%x)\n",adapter->pwrctrlpriv.wepkeymask);
+	}
+#endif
+	DBG_8192C("==> rtw_set_key algorithm(%x),keyid(%x),key_mask(%x)\n",psetkeyparm->algorithm,psetkeyparm->keyid,pmlmepriv->key_mask);
+	RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n rtw_set_key: psetkeyparm->algorithm=%d psetkeyparm->keyid=(u8)keyid=%d \n",psetkeyparm->algorithm, keyid));
+
+	switch(psetkeyparm->algorithm){
+		
+		case _WEP40_:
+			keylen=5;
+			_rtw_memcpy(&(psetkeyparm->key[0]), &(psecuritypriv->dot11DefKey[keyid].skey[0]), keylen);
+			break;
+		case _WEP104_:
+			keylen=13;
+			_rtw_memcpy(&(psetkeyparm->key[0]), &(psecuritypriv->dot11DefKey[keyid].skey[0]), keylen);
+			break;
+		case _TKIP_:
+			keylen=16;			
+			_rtw_memcpy(&psetkeyparm->key, &psecuritypriv->dot118021XGrpKey[keyid], keylen);
+			psetkeyparm->grpkey=1;
+			break;
+		case _AES_:
+			keylen=16;			
+			_rtw_memcpy(&psetkeyparm->key, &psecuritypriv->dot118021XGrpKey[keyid], keylen);
+			psetkeyparm->grpkey=1;
+			break;
+		default:
+			RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n rtw_set_key:psecuritypriv->dot11PrivacyAlgrthm = %x (must be 1 or 2 or 4 or 5)\n",psecuritypriv->dot11PrivacyAlgrthm));
+			res= _FAIL;
+			goto exit;
+	}
+
+	
+	pcmd->cmdcode = _SetKey_CMD_;
+	pcmd->parmbuf = (u8 *)psetkeyparm;   
+	pcmd->cmdsz =  (sizeof(struct setkey_parm));  
+	pcmd->rsp = NULL;
+	pcmd->rspsz = 0;
+
+
+	_rtw_init_listhead(&pcmd->list);
+
+	//_rtw_init_sema(&(pcmd->cmd_sem), 0);
+
+	res = rtw_enqueue_cmd(pcmdpriv, pcmd);
+
+exit:
+_func_exit_;
+	return res;
+
+}
+
+
+//adjust IEs for rtw_joinbss_cmd in WMM
+int rtw_restruct_wmm_ie(_adapter *adapter, u8 *in_ie, u8 *out_ie, uint in_len, uint initial_out_len)
+{
+	unsigned	int ielength=0;
+	unsigned int i, j;
+
+	i = 12; //after the fixed IE
+	while(i<in_len)
+	{
+		ielength = initial_out_len;		
+		
+		if(in_ie[i] == 0xDD && in_ie[i+2] == 0x00 && in_ie[i+3] == 0x50  && in_ie[i+4] == 0xF2 && in_ie[i+5] == 0x02 && i+5 < in_len) //WMM element ID and OUI
+		{
+
+			//Append WMM IE to the last index of out_ie
+			/*
+			for(j=i; j< i+(in_ie[i+1]+2); j++)
+			{
+				out_ie[ielength] = in_ie[j];				
+				ielength++;
+			}
+			out_ie[initial_out_len+8] = 0x00; //force the QoS Info Field to be zero
+	                */
+                       
+                        for ( j = i; j < i + 9; j++ )
+                        {
+                            out_ie[ ielength] = in_ie[ j ];
+                            ielength++;
+                        } 
+                        out_ie[ initial_out_len + 1 ] = 0x07;
+                        out_ie[ initial_out_len + 6 ] = 0x00;
+                        out_ie[ initial_out_len + 8 ] = 0x00;
+	
+			break;
+		}
+
+		i+=(in_ie[i+1]+2); // to the next IE element
+	}
+	
+	return ielength;
+	
+}
+
+
+//
+// Ported from 8185: IsInPreAuthKeyList(). (Renamed from SecIsInPreAuthKeyList(), 2006-10-13.)
+// Added by Annie, 2006-05-07.
+//
+// Search by BSSID,
+// Return Value:
+//		-1 		:if there is no pre-auth key in the  table
+//		>=0		:if there is pre-auth key, and   return the entry id
+//
+//
+
+static int SecIsInPMKIDList(_adapter *Adapter, u8 *bssid)
+{
+	struct security_priv *psecuritypriv=&Adapter->securitypriv;
+	int i=0;
+
+	do
+	{
+		if( ( psecuritypriv->PMKIDList[i].bUsed ) && 
+                    (  _rtw_memcmp( psecuritypriv->PMKIDList[i].Bssid, bssid, ETH_ALEN ) == _TRUE ) )
+		{
+			break;
+		}
+		else
+		{	
+			i++;
+			//continue;
+		}
+		
+	}while(i<NUM_PMKID_CACHE);
+
+	if( i == NUM_PMKID_CACHE )
+	{ 
+		i = -1;// Could not find.
+	}
+	else
+	{ 
+		// There is one Pre-Authentication Key for the specific BSSID.
+	}
+
+	return (i);
+	
+}
+
+//
+// Check the RSN IE length
+// If the RSN IE length <= 20, the RSN IE didn't include the PMKID information
+// 0-11th element in the array are the fixed IE
+// 12th element in the array is the IE
+// 13th element in the array is the IE length  
+//
+
+static int rtw_append_pmkid(_adapter *Adapter,int iEntry, u8 *ie, uint ie_len)
+{
+	struct security_priv *psecuritypriv=&Adapter->securitypriv;
+
+	if(ie[13]<=20){	
+		// The RSN IE didn't include the PMK ID, append the PMK information 
+			ie[ie_len]=1;
+			ie_len++;
+			ie[ie_len]=0;	//PMKID count = 0x0100
+			ie_len++;
+			_rtw_memcpy(	&ie[ie_len], &psecuritypriv->PMKIDList[iEntry].PMKID, 16);
+		
+			ie_len+=16;
+			ie[13]+=18;//PMKID length = 2+16
+
+	}
+	return (ie_len);
+	
+}
+sint rtw_restruct_sec_ie(_adapter *adapter,u8 *in_ie, u8 *out_ie, uint in_len)
+{
+	u8 authmode, securitytype, match;
+	u8 sec_ie[255], uncst_oui[4], bkup_ie[255];
+	u8 wpa_oui[4]={0x0, 0x50, 0xf2, 0x01};
+	uint 	ielength, cnt, remove_cnt;
+	int iEntry;
+
+	struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
+	struct security_priv *psecuritypriv=&adapter->securitypriv;
+	uint 	ndisauthmode=psecuritypriv->ndisauthtype;
+	uint ndissecuritytype = psecuritypriv->ndisencryptstatus;
+	
+_func_enter_;
+
+	RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_,
+		 ("+rtw_restruct_sec_ie: ndisauthmode=%d ndissecuritytype=%d\n",
+		  ndisauthmode, ndissecuritytype));
+	
+	//copy fixed ie only
+	_rtw_memcpy(out_ie, in_ie,12);
+	ielength=12;
+
+	if((ndisauthmode==Ndis802_11AuthModeWPA)||(ndisauthmode==Ndis802_11AuthModeWPAPSK))
+			authmode=_WPA_IE_ID_;
+	if((ndisauthmode==Ndis802_11AuthModeWPA2)||(ndisauthmode==Ndis802_11AuthModeWPA2PSK))
+			authmode=_WPA2_IE_ID_;
+
+	if(psecuritypriv->wps_phase == _TRUE)
+	{
+		//DBG_871X("wps_phase == _TRUE\n");
+
+		_rtw_memcpy(out_ie+ielength, psecuritypriv->wps_ie, psecuritypriv->wps_ie_len);
+		
+		ielength += psecuritypriv->wps_ie_len;
+		psecuritypriv->wps_phase = _FALSE;
+	
+	}
+	else if((ndisauthmode==Ndis802_11AuthModeWPA)||(ndisauthmode==Ndis802_11AuthModeWPAPSK)||(ndisauthmode==Ndis802_11AuthModeWPA2)||(ndisauthmode==Ndis802_11AuthModeWPA2PSK))
+	{		
+		//copy RSN or SSN		
+			_rtw_memcpy(&out_ie[ielength], &psecuritypriv->supplicant_ie[0], psecuritypriv->supplicant_ie[1]+2);
+			ielength+=psecuritypriv->supplicant_ie[1]+2;
+
+			rtw_report_sec_ie(adapter, authmode, psecuritypriv->supplicant_ie);
+	
+#ifdef CONFIG_DRVEXT_MODULE
+			drvext_report_sec_ie(&adapter->drvextpriv, authmode, sec_ie);	
+#endif
+			
+
+		
+	}
+	iEntry = SecIsInPMKIDList(adapter, pmlmepriv->assoc_bssid);
+	if(iEntry<0)
+	{
+		return ielength;
+	}
+	else
+	{
+		if(authmode == _WPA2_IE_ID_)
+		{
+#if 0		
+			out_ie[ielength]=1;
+			ielength++;
+			out_ie[ielength]=0;	//PMKID count = 0x0100
+			ielength++;
+			_rtw_memcpy(	&out_ie[ielength], &psecuritypriv->PMKIDList[iEntry].PMKID, 16);
+		
+			ielength+=16;
+			out_ie[13]+=18;//PMKID length = 2+16
+#endif			
+			ielength=rtw_append_pmkid(adapter, iEntry, out_ie, ielength);
+		}
+	}
+
+_func_exit_;
+	
+	return ielength;	
+}
+
+void rtw_init_registrypriv_dev_network(	_adapter* adapter)
+{
+	struct registry_priv* pregistrypriv = &adapter->registrypriv;
+	struct eeprom_priv* peepriv = &adapter->eeprompriv;
+	WLAN_BSSID_EX    *pdev_network = &pregistrypriv->dev_network;
+	u8 *myhwaddr = myid(peepriv);
+	
+_func_enter_;
+
+	_rtw_memcpy(pdev_network->MacAddress, myhwaddr, ETH_ALEN);
+
+	_rtw_memcpy(&pdev_network->Ssid, &pregistrypriv->ssid, sizeof(NDIS_802_11_SSID));
+	
+	pdev_network->Configuration.Length=sizeof(NDIS_802_11_CONFIGURATION);
+	pdev_network->Configuration.BeaconPeriod = 100;	
+	pdev_network->Configuration.FHConfig.Length = 0;
+	pdev_network->Configuration.FHConfig.HopPattern = 0;
+	pdev_network->Configuration.FHConfig.HopSet = 0;
+	pdev_network->Configuration.FHConfig.DwellTime = 0;
+	
+	
+_func_exit_;	
+	
+}
+
+void rtw_update_registrypriv_dev_network(_adapter* adapter) 
+{
+	int sz=0;
+	struct registry_priv* pregistrypriv = &adapter->registrypriv;	
+	WLAN_BSSID_EX    *pdev_network = &pregistrypriv->dev_network;
+	struct	security_priv*	psecuritypriv = &adapter->securitypriv;
+	struct	wlan_network	*cur_network = &adapter->mlmepriv.cur_network;
+	struct	xmit_priv	*pxmitpriv = &adapter->xmitpriv;
+
+_func_enter_;
+
+#if 0
+	pxmitpriv->vcs_setting = pregistrypriv->vrtl_carrier_sense;
+	pxmitpriv->vcs = pregistrypriv->vcs_type;
+	pxmitpriv->vcs_type = pregistrypriv->vcs_type;
+	//pxmitpriv->rts_thresh = pregistrypriv->rts_thresh;
+	pxmitpriv->frag_len = pregistrypriv->frag_thresh;
+	
+	adapter->qospriv.qos_option = pregistrypriv->wmm_enable;
+#endif	
+
+	pdev_network->Privacy = (psecuritypriv->dot11PrivacyAlgrthm > 0 ? 1 : 0) ; // adhoc no 802.1x
+
+	pdev_network->Rssi = 0;
+
+	switch(pregistrypriv->wireless_mode)
+	{
+		case WIRELESS_11B:
+			pdev_network->NetworkTypeInUse = (Ndis802_11DS);
+			break;	
+		case WIRELESS_11G:
+		case WIRELESS_11BG:
+		case WIRELESS_11_24N:
+		case WIRELESS_11G_24N:
+		case WIRELESS_11BG_24N:
+			pdev_network->NetworkTypeInUse = (Ndis802_11OFDM24);
+			break;
+		case WIRELESS_11A:
+		case WIRELESS_11A_5N:
+			pdev_network->NetworkTypeInUse = (Ndis802_11OFDM5);
+			break;
+		case WIRELESS_11ABGN:
+			if(pregistrypriv->channel > 14)
+				pdev_network->NetworkTypeInUse = (Ndis802_11OFDM5);
+			else
+				pdev_network->NetworkTypeInUse = (Ndis802_11OFDM24);
+			break;
+		default :
+			// TODO
+			break;
+	}
+	
+	pdev_network->Configuration.DSConfig = (pregistrypriv->channel);
+	RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("pregistrypriv->channel=%d, pdev_network->Configuration.DSConfig=0x%x\n", pregistrypriv->channel, pdev_network->Configuration.DSConfig));	
+
+	if(cur_network->network.InfrastructureMode == Ndis802_11IBSS)
+		pdev_network->Configuration.ATIMWindow = (0);
+
+	pdev_network->InfrastructureMode = (cur_network->network.InfrastructureMode);
+
+	// 1. Supported rates
+	// 2. IE
+
+	//rtw_set_supported_rate(pdev_network->SupportedRates, pregistrypriv->wireless_mode) ; // will be called in rtw_generate_ie
+	sz = rtw_generate_ie(pregistrypriv);
+
+	pdev_network->IELength = sz;
+
+	pdev_network->Length = get_WLAN_BSSID_EX_sz((WLAN_BSSID_EX  *)pdev_network);
+
+	//notes: translate IELength & Length after assign the Length to cmdsz in createbss_cmd();
+	//pdev_network->IELength = cpu_to_le32(sz);
+		
+_func_exit_;	
+
+}
+
+void rtw_get_encrypt_decrypt_from_registrypriv(_adapter* adapter)
+{
+	u16	wpaconfig=0;
+	struct registry_priv* pregistrypriv = &adapter->registrypriv;
+	struct security_priv* psecuritypriv= &adapter->securitypriv;
+_func_enter_;
+
+
+_func_exit_;	
+	
+}
+
+//the fucntion is at passive_level 
+void rtw_joinbss_reset(_adapter *padapter)
+{
+	u8	threshold;
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+
+#ifdef CONFIG_80211N_HT	
+	struct ht_priv		*phtpriv = &pmlmepriv->htpriv;
+#endif
+
+	//todo: if you want to do something io/reg/hw setting before join_bss, please add code here
+	
+
+
+
+#ifdef CONFIG_80211N_HT
+
+	pmlmepriv->num_FortyMHzIntolerant = 0;
+
+	pmlmepriv->num_sta_no_ht = 0;
+
+	phtpriv->ampdu_enable = _FALSE;//reset to disabled
+
+#ifdef CONFIG_USB_HCI
+	// TH=1 => means that invalidate usb rx aggregation
+	// TH=0 => means that validate usb rx aggregation, use init value.
+	if(phtpriv->ht_option)
+	{
+		if(padapter->registrypriv.wifi_spec==1)		
+			threshold = 1;
+		else
+			threshold = 0;
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold));
+	}
+	else
+	{
+		threshold = 1;
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold));
+	}
+#endif
+
+#endif	
+
+}
+
+
+#ifdef CONFIG_80211N_HT
+
+//the fucntion is >= passive_level 
+unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len)
+{
+	u32 ielen, out_len;
+	unsigned char *p, *pframe;
+	struct ieee80211_ht_cap ht_capie;
+	unsigned char WMM_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01, 0x00};
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	struct qos_priv   	*pqospriv= &pmlmepriv->qospriv;
+	struct ht_priv		*phtpriv = &pmlmepriv->htpriv;
+
+
+	phtpriv->ht_option = _FALSE;
+
+	p = rtw_get_ie(in_ie+12, _HT_CAPABILITY_IE_, &ielen, in_len-12);
+
+	if(p && ielen>0)
+	{
+		if(pqospriv->qos_option == 0)
+		{
+			out_len = *pout_len;
+			pframe = rtw_set_ie(out_ie+out_len, _VENDOR_SPECIFIC_IE_, 
+								_WMM_IE_Length_, WMM_IE, pout_len);
+
+			pqospriv->qos_option = 1;
+		}
+
+		out_len = *pout_len;
+
+		_rtw_memset(&ht_capie, 0, sizeof(struct ieee80211_ht_cap));
+
+		ht_capie.cap_info = IEEE80211_HT_CAP_SUP_WIDTH |IEEE80211_HT_CAP_SGI_20 |
+							IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_TX_STBC |
+							IEEE80211_HT_CAP_DSSSCCK40;
+
+
+		{
+			u32 rx_packet_offset, max_recvbuf_sz;
+			padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_RX_PACKET_OFFSET, &rx_packet_offset);
+			padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz);
+			if(max_recvbuf_sz-rx_packet_offset>(8191-256)) {
+				DBG_871X("%s IEEE80211_HT_CAP_MAX_AMSDU is set\n", __FUNCTION__);
+				ht_capie.cap_info = ht_capie.cap_info |IEEE80211_HT_CAP_MAX_AMSDU;
+			}
+		}
+		
+		ht_capie.ampdu_params_info = (IEEE80211_HT_CAP_AMPDU_FACTOR&0x03);
+
+		if(padapter->securitypriv.dot11PrivacyAlgrthm == _AES_ )
+			ht_capie.ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&(0x07<<2));
+		else
+			ht_capie.ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&0x00);										
+
+		
+		pframe = rtw_set_ie(out_ie+out_len, _HT_CAPABILITY_IE_, 
+							sizeof(struct ieee80211_ht_cap), (unsigned char*)&ht_capie, pout_len);
+
+
+		//_rtw_memcpy(out_ie+out_len, p, ielen+2);//gtest
+		//*pout_len = *pout_len + (ielen+2);
+
+							
+		phtpriv->ht_option = _TRUE;
+
+		p = rtw_get_ie(in_ie+12, _HT_ADD_INFO_IE_, &ielen, in_len-12);
+		if(p && (ielen==sizeof(struct ieee80211_ht_addt_info)))
+		{
+			out_len = *pout_len;		
+			pframe = rtw_set_ie(out_ie+out_len, _HT_ADD_INFO_IE_, ielen, p+2 , pout_len);
+		}
+
+	}
+	
+	return (phtpriv->ht_option);
+	
+}
+
+//the fucntion is > passive_level (in critical_section)
+void rtw_update_ht_cap(_adapter *padapter, u8 *pie, uint ie_len)
+{	
+	u8 *p, max_ampdu_sz;
+	int len;		
+	//struct sta_info *bmc_sta, *psta;	
+	struct ieee80211_ht_cap *pht_capie;
+	struct ieee80211_ht_addt_info *pht_addtinfo;
+	//struct recv_reorder_ctrl *preorder_ctrl;
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	struct ht_priv		*phtpriv = &pmlmepriv->htpriv;
+	//struct recv_priv *precvpriv = &padapter->recvpriv;
+	struct registry_priv *pregistrypriv = &padapter->registrypriv;
+	//struct wlan_network *pcur_network = &(pmlmepriv->cur_network);;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);	
+	
+
+	if(!phtpriv->ht_option)
+		return;
+
+	if ((!pmlmeinfo->HT_info_enable) || (!pmlmeinfo->HT_caps_enable))
+		return;
+
+	DBG_871X("+rtw_update_ht_cap()\n");
+
+	//maybe needs check if ap supports rx ampdu.
+	if((phtpriv->ampdu_enable==_FALSE) &&(pregistrypriv->ampdu_enable==1))
+	{
+		if(pregistrypriv->wifi_spec==1)
+		{
+			phtpriv->ampdu_enable = _FALSE;
+		}
+		else
+		{
+			phtpriv->ampdu_enable = _TRUE;
+		}
+	}
+	else if(pregistrypriv->ampdu_enable==2)
+	{
+		phtpriv->ampdu_enable = _TRUE;
+	}
+
+	
+	//check Max Rx A-MPDU Size 
+	len = 0;
+	p = rtw_get_ie(pie+sizeof (NDIS_802_11_FIXED_IEs), _HT_CAPABILITY_IE_, &len, ie_len-sizeof (NDIS_802_11_FIXED_IEs));
+	if(p && len>0)	
+	{
+		pht_capie = (struct ieee80211_ht_cap *)(p+2);
+		max_ampdu_sz = (pht_capie->ampdu_params_info & IEEE80211_HT_CAP_AMPDU_FACTOR);
+		max_ampdu_sz = 1 << (max_ampdu_sz+3); // max_ampdu_sz (kbytes);
+		
+		//DBG_8192C("rtw_update_ht_cap(): max_ampdu_sz=%d\n", max_ampdu_sz);
+		phtpriv->rx_ampdu_maxlen = max_ampdu_sz;
+		
+	}
+  
+
+        len=0;
+	p = rtw_get_ie(pie+sizeof (NDIS_802_11_FIXED_IEs), _HT_ADD_INFO_IE_, &len, ie_len-sizeof (NDIS_802_11_FIXED_IEs));
+	if(p && len>0)	
+	{
+		pht_addtinfo = (struct ieee80211_ht_addt_info *)(p+2);
+		//todo:
+	}
+
+
+	//update cur_bwmode & cur_ch_offset
+	if ((pregistrypriv->cbw40_enable) &&
+		(pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info & BIT(1)) && 
+		(pmlmeinfo->HT_info.infos[0] & BIT(2)))
+	{
+		//switch to the 40M Hz mode accoring to the AP
+		pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_40;
+		switch ((pmlmeinfo->HT_info.infos[0] & 0x3))
+		{
+			case HT_EXTCHNL_OFFSET_UPPER:
+				pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER;
+				break;
+			
+			case HT_EXTCHNL_OFFSET_LOWER:
+				pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER;
+				break;
+				
+			default:
+				pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+				break;
+		}			
+	}
+
+        //
+	// Config SM Power Save setting
+	//
+	pmlmeinfo->SM_PS = (pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info & 0x0C) >> 2;
+	if(pmlmeinfo->SM_PS == WLAN_HT_CAP_SM_PS_STATIC)
+	{
+		/*u8 i;
+		//update the MCS rates
+		for (i = 0; i < 16; i++)
+		{
+			pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i];
+		}*/
+		DBG_871X("%s(): WLAN_HT_CAP_SM_PS_STATIC\n",__FUNCTION__);
+	}
+
+	//
+	// Config current HT Protection mode.
+	//
+	pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3;
+
+	
+	
+#if 0 //move to rtw_update_sta_info_client()
+	//for A-MPDU Rx reordering buffer control for bmc_sta & sta_info
+	//if A-MPDU Rx is enabled, reseting  rx_ordering_ctrl wstart_b(indicate_seq) to default value=0xffff
+	//todo: check if AP can send A-MPDU packets
+	bmc_sta = rtw_get_bcmc_stainfo(padapter);
+	if(bmc_sta)
+	{
+		for(i=0; i < 16 ; i++)
+		{
+			//preorder_ctrl = &precvpriv->recvreorder_ctrl[i];
+			preorder_ctrl = &bmc_sta->recvreorder_ctrl[i];
+			preorder_ctrl->enable = _FALSE;
+			preorder_ctrl->indicate_seq = 0xffff;
+			#ifdef DBG_RX_SEQ
+			DBG_871X("DBG_RX_SEQ %s:%d indicate_seq:%u \n", __FUNCTION__, __LINE__,
+				preorder_ctrl->indicate_seq);
+			#endif
+			preorder_ctrl->wend_b= 0xffff;
+			preorder_ctrl->wsize_b = 64;//max_ampdu_sz;//ex. 32(kbytes) -> wsize_b=32
+		}
+	}
+
+	psta = rtw_get_stainfo(&padapter->stapriv, pcur_network->network.MacAddress);
+	if(psta)
+	{
+		for(i=0; i < 16 ; i++)
+		{
+			//preorder_ctrl = &precvpriv->recvreorder_ctrl[i];
+			preorder_ctrl = &psta->recvreorder_ctrl[i];
+			preorder_ctrl->enable = _FALSE;
+			preorder_ctrl->indicate_seq = 0xffff;
+			#ifdef DBG_RX_SEQ
+			DBG_871X("DBG_RX_SEQ %s:%d indicate_seq:%u \n", __FUNCTION__, __LINE__,
+				preorder_ctrl->indicate_seq);
+			#endif
+			preorder_ctrl->wend_b= 0xffff;
+			preorder_ctrl->wsize_b = 64;//max_ampdu_sz;//ex. 32(kbytes) -> wsize_b=32
+		}
+	}
+#endif	
+
+}
+
+void rtw_issue_addbareq_cmd(_adapter *padapter, struct xmit_frame *pxmitframe)
+{
+	u8 issued;
+	int priority;
+	struct sta_info *psta=NULL;
+	struct ht_priv	*phtpriv;
+	struct pkt_attrib *pattrib =&pxmitframe->attrib;
+ 	struct sta_priv *pstapriv = &padapter->stapriv;	
+	s32 bmcst = IS_MCAST(pattrib->ra);
+
+	if(bmcst || (padapter->mlmepriv.LinkDetectInfo.bTxBusyTraffic == _FALSE))
+		return;
+	
+	priority = pattrib->priority;
+
+	if (pattrib->psta)
+		psta = pattrib->psta;
+	else
+		psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra);
+	
+	if(psta==NULL)
+		return;
+	
+	phtpriv = &psta->htpriv;
+
+	if((phtpriv->ht_option==_TRUE) && (phtpriv->ampdu_enable==_TRUE)) 
+	{
+		issued = (phtpriv->agg_enable_bitmap>>priority)&0x1;
+		issued |= (phtpriv->candidate_tid_bitmap>>priority)&0x1;
+
+		if(0==issued)
+		{
+			DBG_871X("rtw_issue_addbareq_cmd, p=%d\n", priority);
+			psta->htpriv.candidate_tid_bitmap |= BIT((u8)priority);
+			rtw_addbareq_cmd(padapter,(u8) priority, pattrib->ra);
+		}
+	}
+	
+}
+
+#endif
+
+#ifdef CONFIG_LAYER2_ROAMING
+void rtw_roaming(_adapter *padapter, struct wlan_network *tgt_network)
+{
+	_irqL irqL;
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+
+	_enter_critical_bh(&pmlmepriv->lock, &irqL);
+	_rtw_roaming(padapter, tgt_network);
+	_exit_critical_bh(&pmlmepriv->lock, &irqL);
+}
+void _rtw_roaming(_adapter *padapter, struct wlan_network *tgt_network)
+{
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	int do_join_r;
+
+	struct wlan_network *pnetwork;
+
+	if(tgt_network != NULL)
+		pnetwork = tgt_network;
+	else
+		pnetwork = &pmlmepriv->cur_network;
+	
+	if(0 < pmlmepriv->to_roaming) {
+		DBG_871X("roaming from %s("MAC_FMT"), length:%d\n",
+				pnetwork->network.Ssid.Ssid, MAC_ARG(pnetwork->network.MacAddress),
+				pnetwork->network.Ssid.SsidLength);
+		_rtw_memcpy(&pmlmepriv->assoc_ssid, &pnetwork->network.Ssid, sizeof(NDIS_802_11_SSID));
+
+		pmlmepriv->assoc_by_bssid = _FALSE;
+
+		while(1) {
+			if( _SUCCESS==(do_join_r=rtw_do_join(padapter)) ) {
+				break;
+			} else {
+				DBG_871X("roaming do_join return %d\n", do_join_r);
+				pmlmepriv->to_roaming--;
+				
+				if(0< pmlmepriv->to_roaming) {
+					continue;
+				} else {
+					DBG_871X("%s(%d) -to roaming fail, indicate_disconnect\n", __FUNCTION__,__LINE__);
+					rtw_indicate_disconnect(padapter);
+					break;
+				}
+			}
+		}
+	}
+	
+}
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_mlme_ext.c linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_mlme_ext.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_mlme_ext.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_mlme_ext.c	2017-09-23 03:42:49.890675456 +0800
@@ -0,0 +1,11415 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _RTW_MLME_EXT_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <wifi.h>
+#include <rtw_mlme_ext.h>
+#include <wlan_bssdef.h>
+#include <mlme_osdep.h>
+#include <recv_osdep.h>
+
+struct mlme_handler mlme_sta_tbl[]={
+	{WIFI_ASSOCREQ,		"OnAssocReq",	&OnAssocReq},
+	{WIFI_ASSOCRSP,		"OnAssocRsp",	&OnAssocRsp},
+	{WIFI_REASSOCREQ,	"OnReAssocReq",	&OnAssocReq},
+	{WIFI_REASSOCRSP,	"OnReAssocRsp",	&OnAssocRsp},
+	{WIFI_PROBEREQ,		"OnProbeReq",	&OnProbeReq},
+	{WIFI_PROBERSP,		"OnProbeRsp",		&OnProbeRsp},
+
+	/*----------------------------------------------------------
+					below 2 are reserved
+	-----------------------------------------------------------*/
+	{0,					"DoReserved",		&DoReserved},
+	{0,					"DoReserved",		&DoReserved},
+	{WIFI_BEACON,		"OnBeacon",		&OnBeacon},
+	{WIFI_ATIM,			"OnATIM",		&OnAtim},
+	{WIFI_DISASSOC,		"OnDisassoc",		&OnDisassoc},
+	{WIFI_AUTH,			"OnAuth",		&OnAuthClient},
+	{WIFI_DEAUTH,		"OnDeAuth",		&OnDeAuth},
+	{WIFI_ACTION,		"OnAction",		&OnAction},
+};
+
+#ifdef _CONFIG_NATIVEAP_MLME_
+struct mlme_handler mlme_ap_tbl[]={
+	{WIFI_ASSOCREQ,		"OnAssocReq",	&OnAssocReq},
+	{WIFI_ASSOCRSP,		"OnAssocRsp",	&OnAssocRsp},
+	{WIFI_REASSOCREQ,	"OnReAssocReq",	&OnAssocReq},
+	{WIFI_REASSOCRSP,	"OnReAssocRsp",	&OnAssocRsp},
+	{WIFI_PROBEREQ,		"OnProbeReq",	&OnProbeReq},
+	{WIFI_PROBERSP,		"OnProbeRsp",		&OnProbeRsp},
+
+	/*----------------------------------------------------------
+					below 2 are reserved
+	-----------------------------------------------------------*/
+	{0,					"DoReserved",		&DoReserved},
+	{0,					"DoReserved",		&DoReserved},
+	{WIFI_BEACON,		"OnBeacon",		&OnBeacon},
+	{WIFI_ATIM,			"OnATIM",		&OnAtim},
+	{WIFI_DISASSOC,		"OnDisassoc",		&OnDisassoc},
+	{WIFI_AUTH,			"OnAuth",		&OnAuth},
+	{WIFI_DEAUTH,		"OnDeAuth",		&OnDeAuth},
+	{WIFI_ACTION,		"OnAction",		&OnAction},
+};
+#endif
+
+struct action_handler OnAction_tbl[]={
+	{WLAN_CATEGORY_SPECTRUM_MGMT,	 "ACTION_SPECTRUM_MGMT", &DoReserved},
+	{WLAN_CATEGORY_QOS, "ACTION_QOS", &OnAction_qos},
+	{WLAN_CATEGORY_DLS, "ACTION_DLS", &OnAction_dls},
+	{WLAN_CATEGORY_BACK, "ACTION_BACK", &OnAction_back},
+	{WLAN_CATEGORY_PUBLIC, "ACTION_PUBLIC", &OnAction_public},
+	{WLAN_CATEGORY_RADIO_MEASUREMENT, "ACTION_RADIO_MEASUREMENT", &DoReserved},
+	{WLAN_CATEGORY_FT, "ACTION_FT",	&DoReserved},
+	{WLAN_CATEGORY_HT,	"ACTION_HT",	&OnAction_ht},
+	{WLAN_CATEGORY_SA_QUERY, "ACTION_SA_QUERY", &DoReserved},
+	{WLAN_CATEGORY_WMM, "ACTION_WMM", &OnAction_wmm},	
+	{WLAN_CATEGORY_P2P, "ACTION_P2P", &OnAction_p2p},	
+};
+
+
+/**************************************************
+OUI definitions for the vendor specific IE
+***************************************************/
+unsigned char	WPA_OUI[] = {0x00, 0x50, 0xf2, 0x01};
+unsigned char WMM_OUI[] = {0x00, 0x50, 0xf2, 0x02};
+unsigned char	WPS_OUI[] = {0x00, 0x50, 0xf2, 0x04};
+
+unsigned char	WMM_INFO_OUI[] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01};
+unsigned char	WMM_PARA_OUI[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01};
+
+unsigned char WPA_TKIP_CIPHER[4] = {0x00, 0x50, 0xf2, 0x02};
+unsigned char RSN_TKIP_CIPHER[4] = {0x00, 0x0f, 0xac, 0x02};
+
+extern unsigned char REALTEK_96B_IE[];
+
+/********************************************************
+MCS rate definitions
+*********************************************************/
+#ifdef CONFIG_DISABLE_MCS13TO15
+unsigned char	MCS_rate_2R[16] = {0xff, 0x1f, 0x0, 0x0, 0x01, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0};
+#else //CONFIG_DISABLE_MCS13TO15
+unsigned char	MCS_rate_2R[16] = {0xff, 0xff, 0x0, 0x0, 0x01, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0};
+#endif //CONFIG_DISABLE_MCS13TO15
+unsigned char	MCS_rate_1R[16] = {0xff, 0x00, 0x0, 0x0, 0x01, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0};
+
+/********************************************************
+ChannelPlan definitions
+*********************************************************/
+static RT_CHANNEL_PLAN	DefaultChannelPlan[RT_CHANNEL_DOMAIN_MAX] = {
+							{{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161,165},32},	// 0x00, RT_CHANNEL_DOMAIN_FCC
+							{{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165},31},					// 0x01, RT_CHANNEL_DOMAIN_IC
+							{{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140},32},				// 0x02, RT_CHANNEL_DOMAIN_ETSI
+							{{1,2,3,4,5,6,7,8,9,10,11,12,13},13},												// 0x03, RT_CHANNEL_DOMAIN_SPAIN
+							{{1,2,3,4,5,6,7,8,9,10,11,12,13},13},												// 0x04, RT_CHANNEL_DOMAIN_FRANCE
+							{{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22},						// 0x05, RT_CHANNEL_DOMAIN_MKK
+							{{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22},						// 0x06, RT_CHANNEL_DOMAIN_MKK1
+							{{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},							// 0x07, RT_CHANNEL_DOMAIN_ISRAEL
+							{{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22},						// 0x08, RT_CHANNEL_DOMAIN_TELEC
+#if 0 /* Not using EEPROM_CHANNEL_PLAN directly */
+							{{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},							// 0x09, RT_CHANNEL_DOMAIN_MIC
+							{{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14},									// 0x0A, RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN
+							{{1,2,3,4,5,6,7,8,9,10,11,12,13},13},										// 0x0B, RT_CHANNEL_DOMAIN_WORLD_WIDE_13
+							{{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},							// 0x0C, RT_CHANNEL_DOMAIN_TELEC_NETGEAR
+							{{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24},					// 0x0D, RT_CHANNEL_DOMAIN_NCC
+#endif /* Not using EEPROM_CHANNEL_PLAN directly */
+							{{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14},									// 0x09, RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN
+							{{1,2,3,4,5,6,7,8,9,10,11,12,13},13},										// 0x0A, RT_CHANNEL_DOMAIN_WORLD_WIDE_13
+							{{1,2,3,4,5,6,7,8,9,10,11,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165},26},			// 0x0B, RT_CHANNEL_DOMAIN_NCC
+							{{1,2,3,4,5,6,7,8,9,10,11,149,153,157,161,165},16},								// 0x0C, RT_CHANNEL_DOMAIN_CHINA
+							{{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24},					// 0x0D, RT_CHANNEL_DOMAIN__SINGAPORE_INDIA_MEXICO
+							{{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,149,153,157,161,165},31},		// 0x0E, RT_CHANNEL_DOMAIN_KOREA
+							{{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19},								// 0x0F, RT_CHANNEL_DOMAIN_TURKEY
+							{{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140},32},	// 0x10, RT_CHANNEL_DOMAIN_JAPAN
+							{{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,149,153,157,161,165},20},							// 0x11, RT_CHANNEL_DOMAIN_FCC_NO_DFS
+							{{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165},37},	// 0x12, RT_CHANNEL_DOMAIN_WORLD_WIDE37
+							};
+
+
+/*
+* Test if the given @param channel_set contains the channel specified by @param channel_num
+* @param channel_set the given channel set
+* @param channel_num the given channel number
+* @return _TRUE or _FALSE
+*/
+int rtw_is_channel_set_contains_channel(RT_CHANNEL_INFO *channel_set, const u32 channel_num)
+{
+	int i;
+	for(i=0;channel_set[i].ChannelNum!=0;i++){
+		if(channel_num == channel_set[i].ChannelNum)
+			return _TRUE;
+	}
+	if(channel_set[i].ChannelNum == 0)
+		return _FALSE;
+	return _TRUE;
+}
+
+/****************************************************************************
+
+Following are the initialization functions for WiFi MLME
+
+*****************************************************************************/
+
+int init_hw_mlme_ext(_adapter *padapter)
+{
+	struct	mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+
+	//set_opmode_cmd(padapter, infra_client_with_mlme);//removed
+
+	set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
+
+	return _SUCCESS;
+}
+
+static void init_mlme_ext_priv_value(_adapter* padapter)
+{
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+#ifdef CONFIG_TDLS
+	u8 i;
+#endif
+
+	//unsigned char default_channel_set[MAX_CHANNEL_NUM] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 0, 0};
+	unsigned char	mixed_datarate[NumRates] = {_1M_RATE_, _2M_RATE_, _5M_RATE_, _11M_RATE_, _6M_RATE_,_9M_RATE_, _12M_RATE_, _18M_RATE_, _24M_RATE_, _36M_RATE_, _48M_RATE_, _54M_RATE_, 0xff};
+	unsigned char	mixed_basicrate[NumRates] ={_1M_RATE_, _2M_RATE_, _5M_RATE_, _11M_RATE_, 0xff,};
+
+	ATOMIC_SET(&pmlmeext->event_seq, 0);
+	pmlmeext->mgnt_seq = 0;//reset to zero when disconnect at client mode
+
+	pmlmeext->cur_channel = padapter->registrypriv.channel;
+	pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_20;
+	pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+	pmlmeext->retry = 0;
+
+	pmlmeext->cur_wireless_mode = padapter->registrypriv.wireless_mode;
+
+	//_rtw_memcpy(pmlmeext->channel_set, DefaultChannelPlan[padapter->mlmepriv.ChannelPlan].Channel, DefaultChannelPlan[padapter->mlmepriv.ChannelPlan].Len);
+	//_rtw_memcpy(pmlmeext->channel_set, default_channel_set, MAX_CHANNEL_NUM);
+	_rtw_memcpy(pmlmeext->datarate, mixed_datarate, NumRates);
+	_rtw_memcpy(pmlmeext->basicrate, mixed_basicrate, NumRates);
+
+	pmlmeext->sitesurvey_res.state = SCAN_DISABLE;
+	pmlmeext->sitesurvey_res.channel_idx = 0;
+	pmlmeext->sitesurvey_res.bss_cnt = 0;
+
+#ifdef CONFIG_TDLS
+	_init_workitem(&pmlmeext->TDLS_restore_workitem, TDLS_restore_workitem_callback, pmlmeext);
+#endif
+
+	pmlmeinfo->state = WIFI_FW_NULL_STATE;
+	pmlmeinfo->reauth_count = 0;
+	pmlmeinfo->reassoc_count = 0;
+	pmlmeinfo->link_count = 0;
+	pmlmeinfo->auth_seq = 0;
+	pmlmeinfo->auth_algo = dot11AuthAlgrthm_Open;
+	pmlmeinfo->key_index = 0;
+	pmlmeinfo->iv = 0;
+
+#ifdef CONFIG_TDLS
+	pmlmeinfo->tdls_setup_state=UN_TDLS_STATE;
+	pmlmeinfo->tdls_sta_cnt=0;
+	pmlmeinfo->tdls_dis_req=0;
+	pmlmeinfo->tdls_cam_entry_to_write=6;
+	pmlmeinfo->tdls_cam_entry_to_clear=0;
+	pmlmeinfo->tdls_ch_sensing=0;
+	pmlmeinfo->tdls_cur_channel=0;
+	pmlmeinfo->tdls_candidate_ch=1;	//when inplement channel switching, default candidate channel is 1
+	for(i=0; i<14; i++)
+		pmlmeinfo->tdls_collect_pkt_num[i]=0;
+#endif
+
+	pmlmeinfo->enc_algo = _NO_PRIVACY_;
+	pmlmeinfo->authModeToggle = 0;
+
+	_rtw_memset(pmlmeinfo->chg_txt, 0, 128);
+
+	pmlmeinfo->slotTime = SHORT_SLOT_TIME;
+	pmlmeinfo->preamble_mode = PREAMBLE_AUTO;
+
+	pmlmeinfo->dialogToken = 0;
+}
+
+static u8 init_channel_set(_adapter* padapter, u8 ChannelPlan, RT_CHANNEL_INFO *channel_set)
+{
+	u8	index,chanset_size = 0;
+	u8	b5GBand = _FALSE, b2_4GBand = _FALSE;
+
+	_rtw_memset(channel_set, 0, sizeof(RT_CHANNEL_INFO)*MAX_CHANNEL_NUM);
+
+	if(ChannelPlan >= RT_CHANNEL_DOMAIN_MAX)
+	{
+		DBG_871X("channel plan id error \n");
+		return chanset_size;
+	}
+
+	if(padapter->registrypriv.wireless_mode & WIRELESS_11G)
+	{
+		b2_4GBand = _TRUE;
+	}
+
+	if(padapter->registrypriv.wireless_mode & WIRELESS_11A)
+	{
+		b5GBand = _TRUE;
+	}
+
+	for(index=0;index<DefaultChannelPlan[ChannelPlan].Len;index++)
+	{
+		if((DefaultChannelPlan[ChannelPlan].Channel[index]  <= 14) && (b2_4GBand))
+		{
+			channel_set[chanset_size].ChannelNum = DefaultChannelPlan[ChannelPlan].Channel[index];
+
+			if(RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN == ChannelPlan) //Channel 1~11 is active, and 12~14 is passive
+			{
+				if(channel_set[chanset_size].ChannelNum >= 1 && channel_set[chanset_size].ChannelNum <= 11)
+					channel_set[chanset_size].ScanType = SCAN_ACTIVE;
+				else if((channel_set[chanset_size].ChannelNum  >= 12 && channel_set[chanset_size].ChannelNum  <= 14))
+					channel_set[chanset_size].ScanType  = SCAN_PASSIVE;			
+			}
+			else if(RT_CHANNEL_DOMAIN_WORLD_WIDE_13 == ChannelPlan ||
+				RT_CHANNEL_DOMAIN_WORLD_WIDE37 == ChannelPlan)// channel 12~13, passive scan
+			{
+				if(channel_set[chanset_size].ChannelNum <= 11)
+					channel_set[chanset_size].ScanType = SCAN_ACTIVE;
+				else
+					channel_set[chanset_size].ScanType = SCAN_PASSIVE;
+			}
+			else
+			{
+				channel_set[chanset_size].ScanType = SCAN_ACTIVE;
+			}
+
+			chanset_size++;
+		}
+		else if((DefaultChannelPlan[ChannelPlan].Channel[index]  >= 36) && (b5GBand))
+		{
+#ifdef CONFIG_DFS
+			channel_set[chanset_size].ChannelNum = DefaultChannelPlan[ChannelPlan].Channel[index];
+			if ( channel_set[chanset_size].ChannelNum <= 48 
+				|| channel_set[chanset_size].ChannelNum >= 149 )
+			{
+				if(RT_CHANNEL_DOMAIN_WORLD_WIDE37 == ChannelPlan)//passive scan for all 5G channels
+					channel_set[chanset_size].ScanType = SCAN_PASSIVE;
+				else
+					channel_set[chanset_size].ScanType = SCAN_ACTIVE;
+			}
+			else
+			{
+				channel_set[chanset_size].ScanType = SCAN_PASSIVE;
+			}
+			chanset_size++;
+#else /* CONFIG_DFS */
+			if ( DefaultChannelPlan[ChannelPlan].Channel[index] <= 48 
+				|| DefaultChannelPlan[ChannelPlan].Channel[index] >= 149 ) {
+				channel_set[chanset_size].ChannelNum = DefaultChannelPlan[ChannelPlan].Channel[index];
+				if(RT_CHANNEL_DOMAIN_WORLD_WIDE37 == ChannelPlan)//passive scan for all 5G channels
+					channel_set[chanset_size].ScanType = SCAN_PASSIVE;
+				else
+					channel_set[chanset_size].ScanType = SCAN_ACTIVE;
+				DBG_871X("%s(): channel_set[%d].ChannelNum = %d\n", __FUNCTION__, chanset_size, channel_set[chanset_size].ChannelNum);
+				chanset_size++;
+			}
+#endif /* CONFIG_DFS */
+		}
+	}
+		
+	return chanset_size;
+}
+
+int	init_mlme_ext_priv(_adapter* padapter)
+{
+	int	res = _SUCCESS;
+	struct registry_priv* pregistrypriv = &padapter->registrypriv;
+	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	// We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc().
+	//_rtw_memset((u8 *)pmlmeext, 0, sizeof(struct mlme_ext_priv));
+
+	pmlmeext->padapter = padapter;
+
+	//fill_fwpriv(padapter, &(pmlmeext->fwpriv));
+
+	init_mlme_ext_priv_value(padapter);
+	pmlmeinfo->bAcceptAddbaReq = pregistrypriv->bAcceptAddbaReq;
+	
+	init_mlme_ext_timer(padapter);
+
+#ifdef CONFIG_AP_MODE
+	init_mlme_ap_info(padapter);	
+#endif
+
+	pmlmeext->max_chan_nums = init_channel_set(padapter, pmlmepriv->ChannelPlan,pmlmeext->channel_set);
+
+	pmlmeext->chan_scan_time = SURVEY_TO;
+	pmlmeext->mlmeext_init = _TRUE;
+
+	return res;
+
+}
+
+void free_mlme_ext_priv (struct mlme_ext_priv *pmlmeext)
+{
+	_adapter *padapter = pmlmeext->padapter;
+
+	if (!padapter)
+		return;
+
+	if (padapter->bDriverStopped == _TRUE)
+	{
+		_cancel_timer_ex(&pmlmeext->survey_timer);
+		_cancel_timer_ex(&pmlmeext->link_timer);
+		//_cancel_timer_ex(&pmlmeext->ADDBA_timer);
+	}
+}
+
+static void UpdateBrateTbl(
+	IN PADAPTER		Adapter,
+	IN u8			*mBratesOS
+)
+{
+	u8	i;
+	u8	rate;
+
+	// 1M, 2M, 5.5M, 11M, 6M, 12M, 24M are mandatory.
+	for(i=0;i<NDIS_802_11_LENGTH_RATES_EX;i++)
+	{
+		rate = mBratesOS[i] & 0x7f;
+		switch(rate)
+		{
+			case IEEE80211_CCK_RATE_1MB:
+			case IEEE80211_CCK_RATE_2MB:
+			case IEEE80211_CCK_RATE_5MB:
+			case IEEE80211_CCK_RATE_11MB:
+			case IEEE80211_OFDM_RATE_6MB:
+			case IEEE80211_OFDM_RATE_12MB:
+			case IEEE80211_OFDM_RATE_24MB:
+				mBratesOS[i] |= IEEE80211_BASIC_RATE_MASK;
+				break;
+		}
+	}
+
+}
+
+static void _mgt_dispatcher(_adapter *padapter, struct mlme_handler *ptable, union recv_frame *precv_frame)
+{
+	u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff};
+	u8 *pframe = precv_frame->u.hdr.rx_data; 
+	uint len = precv_frame->u.hdr.len;
+
+	  if(ptable->func)
+        {
+       	 //receive the frames that ra(a1) is my address or ra(a1) is bc address.
+		if (!_rtw_memcmp(GetAddr1Ptr(pframe), myid(&padapter->eeprompriv), ETH_ALEN) &&
+			!_rtw_memcmp(GetAddr1Ptr(pframe), bc_addr, ETH_ALEN)) 
+		{
+			return;
+		}
+		
+		ptable->func(padapter, precv_frame);
+        }
+	
+}
+
+void mgt_dispatcher(_adapter *padapter, union recv_frame *precv_frame)
+{
+	int index;
+	struct mlme_handler *ptable;
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+	u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff};
+	u8 *pframe = precv_frame->u.hdr.rx_data;
+	uint len = precv_frame->u.hdr.len;
+
+	RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
+		 ("+mgt_dispatcher: type(0x%x) subtype(0x%x)\n",
+		  GetFrameType(pframe), GetFrameSubType(pframe)));
+
+#if 0
+	{
+		u8 *pbuf;
+		pbuf = GetAddr1Ptr(pframe);
+		DBG_8192C("A1-%x:%x:%x:%x:%x:%x\n", *pbuf, *(pbuf+1), *(pbuf+2), *(pbuf+3), *(pbuf+4), *(pbuf+5));
+		pbuf = GetAddr2Ptr(pframe);
+		DBG_8192C("A2-%x:%x:%x:%x:%x:%x\n", *pbuf, *(pbuf+1), *(pbuf+2), *(pbuf+3), *(pbuf+4), *(pbuf+5));
+		pbuf = GetAddr3Ptr(pframe);
+		DBG_8192C("A3-%x:%x:%x:%x:%x:%x\n", *pbuf, *(pbuf+1), *(pbuf+2), *(pbuf+3), *(pbuf+4), *(pbuf+5));
+	}
+#endif
+
+	if (GetFrameType(pframe) != WIFI_MGT_TYPE)
+	{
+		RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("mgt_dispatcher: type(0x%x) error!\n", GetFrameType(pframe)));
+		return;
+	}
+
+	//receive the frames that ra(a1) is my address or ra(a1) is bc address.
+	if (!_rtw_memcmp(GetAddr1Ptr(pframe), myid(&padapter->eeprompriv), ETH_ALEN) &&
+		!_rtw_memcmp(GetAddr1Ptr(pframe), bc_addr, ETH_ALEN))
+	{
+		return;
+	}
+
+	ptable = mlme_sta_tbl;
+
+	index = GetFrameSubType(pframe) >> 4;
+
+#ifdef CONFIG_TDLS
+	if((index << 4)==WIFI_ACTION){
+		//category==public (4), action==TDLS_DISCOVERY_RESPONSE
+		if(*(pframe+24)==0x04 && *(pframe+25)==TDLS_DISCOVERY_RESPONSE){
+			DBG_8192C("recv tdls discovery response frame\n");
+			On_TDLS_Dis_Rsp(padapter, precv_frame);
+		}
+	}
+#endif
+
+	if (index > 13)
+	{
+		RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Currently we do not support reserved sub-fr-type=%d\n", index));
+		return;
+	}
+	ptable += index;
+
+#if 0//gtest
+	sa = get_sa(pframe);
+	psta = search_assoc_sta(sa, padapter);
+	// only check last cache seq number for management frame
+	if (psta != NULL) {
+		if (GetRetry(pframe)) {
+			if (GetTupleCache(pframe) == psta->rxcache->nonqos_seq){
+				RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("drop due to decache!\n"));
+				return;
+			}
+		}
+		psta->rxcache->nonqos_seq = GetTupleCache(pframe);
+	}
+#else
+
+	if(GetRetry(pframe))
+	{
+		//RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("drop due to decache!\n"));
+		//return;
+	}
+#endif
+
+#ifdef CONFIG_AP_MODE
+	switch (GetFrameSubType(pframe)) 
+	{
+		case WIFI_AUTH:
+			if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)
+				ptable->func = &OnAuth;
+			else
+				ptable->func = &OnAuthClient;
+			//pass through
+		case WIFI_ASSOCREQ:
+		case WIFI_REASSOCREQ:
+			_mgt_dispatcher(padapter, ptable, precv_frame);	
+#ifdef CONFIG_HOSTAPD_MLME				
+			if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)
+				rtw_hostapd_mlme_rx(padapter, precv_frame);
+#endif			
+			break;
+		case WIFI_PROBEREQ:
+			if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)
+			{
+#ifdef CONFIG_HOSTAPD_MLME		
+				rtw_hostapd_mlme_rx(padapter, precv_frame);		
+#else
+				_mgt_dispatcher(padapter, ptable, precv_frame);
+#endif
+			}
+			else
+				_mgt_dispatcher(padapter, ptable, precv_frame);
+			break;
+		case WIFI_BEACON:			
+			_mgt_dispatcher(padapter, ptable, precv_frame);
+			break;
+		case WIFI_ACTION:
+			//if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)
+			_mgt_dispatcher(padapter, ptable, precv_frame);		
+			break;
+		default:
+			_mgt_dispatcher(padapter, ptable, precv_frame);	
+			if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)
+				rtw_hostapd_mlme_rx(padapter, precv_frame);			
+			break;
+	}
+#else
+
+	_mgt_dispatcher(padapter, ptable, precv_frame);	
+	
+#endif
+
+}
+
+#ifdef CONFIG_P2P
+u32 p2p_listen_state_process(_adapter *padapter, unsigned char *da)
+{
+	issue_probersp_p2p( padapter, da);
+	return _SUCCESS;
+}
+#endif //CONFIG_P2P
+
+
+/****************************************************************************
+
+Following are the callback functions for each subtype of the management frames
+
+*****************************************************************************/
+
+unsigned int OnProbeReq(_adapter *padapter, union recv_frame *precv_frame)
+{
+	unsigned int	ielen;
+	unsigned char	*p;
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX 	*cur = &(pmlmeinfo->network);
+	u8 *pframe = precv_frame->u.hdr.rx_data;
+	uint len = precv_frame->u.hdr.len;
+	u8 is_valid_p2p_probereq = _FALSE;
+
+#ifdef CONFIG_P2P
+	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
+	struct rx_pkt_attrib	*pattrib = &precv_frame->u.hdr.attrib;
+	
+	if ( ( pwdinfo->p2p_state != P2P_STATE_NONE ) && 
+		( pwdinfo->p2p_state != P2P_STATE_IDLE ) && 
+		( pwdinfo->role != P2P_ROLE_CLIENT ) &&
+		( pwdinfo->p2p_state != P2P_STATE_FIND_PHASE_SEARCH ) &&
+		(pwdinfo->p2p_state != P2P_STATE_SCAN )
+	   )
+	{
+		//	Commented by Albert 2011/03/17
+		//	mcs_rate = 0 -> CCK 1M rate
+		//	mcs_rate = 1 -> CCK 2M rate
+		//	mcs_rate = 2 -> CCK 5.5M rate
+		//	mcs_rate = 3 -> CCK 11M rate
+		//	In the P2P mode, the driver should not support the CCK rate
+		if ( pattrib->mcs_rate > 3 )
+		{
+			if((is_valid_p2p_probereq = process_probe_req_p2p_ie(pwdinfo, pframe, len)) == _TRUE)
+			{
+				if(pwdinfo->role == P2P_ROLE_DEVICE)
+				{
+					p2p_listen_state_process( padapter,  get_sa(pframe));
+
+					return _SUCCESS;	
+				}
+
+				if(pwdinfo->role == P2P_ROLE_GO)
+				{
+					goto _continue;
+				}
+			}
+		}
+	}
+#endif //CONFIG_P2P
+
+_continue:
+
+	if(check_fwstate(pmlmepriv, WIFI_STATION_STATE))
+	{
+		return _SUCCESS;
+	}
+
+	if(check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE && 
+		check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE|WIFI_AP_STATE)==_FALSE)
+	{
+		return _SUCCESS;
+	}
+
+
+	//DBG_871X("+OnProbeReq\n");
+
+	p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, _SSID_IE_, (int *)&ielen,
+			len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_);
+
+
+	//check (wildcard) SSID 
+	if (p != NULL)
+	{
+		if(is_valid_p2p_probereq == _TRUE)
+		{
+			goto _issue_probersp;
+		}
+
+		if ((ielen != 0) && (!_rtw_memcmp((void *)(p+2), (void *)cur->Ssid.Ssid, le32_to_cpu(cur->Ssid.SsidLength))))
+		{
+			return _SUCCESS;
+		}
+
+_issue_probersp:
+
+		issue_probersp(padapter, get_sa(pframe), is_valid_p2p_probereq);		
+
+	}
+
+	return _SUCCESS;
+
+}
+
+unsigned int OnProbeRsp(_adapter *padapter, union recv_frame *precv_frame)
+{
+	struct sta_info		*psta;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct sta_priv		*pstapriv = &padapter->stapriv;
+	u8	*pframe = precv_frame->u.hdr.rx_data;
+#ifdef CONFIG_P2P
+	struct wifidirect_info	*pwdinfo = &padapter->wdinfo;
+#endif
+
+
+#ifdef CONFIG_P2P
+	if (P2P_STATE_TX_PROVISION_DIS_REQ == pwdinfo->p2p_state )
+	{
+		if ( _TRUE == pwdinfo->tx_prov_disc_info.benable )
+		{
+			if( _rtw_memcmp( pwdinfo->tx_prov_disc_info.peerIFAddr, GetAddr2Ptr(pframe), ETH_ALEN ) )
+			{
+				if ( P2P_ROLE_CLIENT == pwdinfo->role )
+				{
+					pwdinfo->tx_prov_disc_info.benable = _FALSE;
+					issue_p2p_provision_request( padapter,
+												pwdinfo->tx_prov_disc_info.peerIFAddr,
+												pwdinfo->tx_prov_disc_info.ssid.Ssid, 
+												pwdinfo->tx_prov_disc_info.ssid.SsidLength,
+												pwdinfo->tx_prov_disc_info.peerDevAddr );
+				}
+				else if ( ( P2P_ROLE_DEVICE == pwdinfo->role ) || ( P2P_ROLE_GO == pwdinfo->role ) )
+				{
+					pwdinfo->tx_prov_disc_info.benable = _FALSE;
+					issue_p2p_provision_request( padapter,
+												pwdinfo->tx_prov_disc_info.peerIFAddr,
+												NULL, 
+												0,
+												pwdinfo->tx_prov_disc_info.peerDevAddr );
+				}
+			}		
+		}
+		return _SUCCESS;
+	}
+	else if ( P2P_STATE_GONEGO_ING == pwdinfo->p2p_state )
+	{
+		if ( _TRUE == pwdinfo->nego_req_info.benable )
+		{
+			printk( "[%s] P2P State is GONEGO ING!\n", __FUNCTION__ );
+			if( _rtw_memcmp( pwdinfo->nego_req_info.peerDevAddr, GetAddr2Ptr(pframe), ETH_ALEN ) )
+			{
+				pwdinfo->nego_req_info.benable = _FALSE;
+				issue_p2p_GO_request( padapter, pwdinfo->nego_req_info.peerDevAddr);
+			}
+		}
+	}
+#endif
+
+
+	if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS)
+	{
+		report_survey_event(padapter, precv_frame);	
+		return _SUCCESS;
+	}
+
+	if (_rtw_memcmp(GetAddr3Ptr(pframe), get_my_bssid(&pmlmeinfo->network), ETH_ALEN))
+	{
+		if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)
+		{
+			if ((psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe))) != NULL)
+			{
+				psta->sta_stats.rx_pkts++;
+			}
+		}
+	}
+	
+	return _SUCCESS;
+	
+}
+
+unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame)
+{
+	int cam_idx;
+	struct sta_info	*psta;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct sta_priv	*pstapriv = &padapter->stapriv;
+	u8 *pframe = precv_frame->u.hdr.rx_data;
+	uint len = precv_frame->u.hdr.len;
+
+	if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS)
+	{
+		report_survey_event(padapter, precv_frame);
+
+		return _SUCCESS;
+	}
+
+	if (_rtw_memcmp(GetAddr3Ptr(pframe), get_my_bssid(&pmlmeinfo->network), ETH_ALEN))
+	{
+		if (pmlmeinfo->state & WIFI_FW_AUTH_NULL)
+		{
+			//check the vendor of the assoc AP
+			pmlmeinfo->assoc_AP_vendor = check_assoc_AP(pframe+sizeof(struct ieee80211_hdr_3addr), len-sizeof(struct ieee80211_hdr_3addr));				
+
+			//update TSF Value
+			update_TSF(pmlmeext, pframe, len);
+
+			//start auth
+			start_clnt_auth(padapter);
+
+			return _SUCCESS;
+		}
+
+		if(((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) && (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS))
+		{
+			if ((psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe))) != NULL)
+			{
+				//update WMM, ERP in the beacon
+				//todo: the timer is used instead of the number of the beacon received
+				if ((psta->sta_stats.rx_pkts & 0xf) == 0)
+				{
+					//DBG_871X("update_bcn_info\n");
+					update_beacon_info(padapter, pframe, len, psta);
+				}
+#ifdef CONFIG_DFS
+				process_csa_ie(padapter, pframe, len);	//channel switch announcement
+#endif //CONFIG_DFS
+
+#ifdef CONFIG_P2P
+				process_p2p_ps_ie(padapter, (pframe + WLAN_HDR_A3_LEN), (len - WLAN_HDR_A3_LEN));
+#endif //CONFIG_P2P
+				psta->sta_stats.rx_pkts++;
+			}
+		}
+		else if((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)
+		{
+			if ((psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe))) != NULL)
+			{
+				//update WMM, ERP in the beacon
+				//todo: the timer is used instead of the number of the beacon received
+				if ((psta->sta_stats.rx_pkts & 0xf) == 0)
+				{
+					//DBG_871X("update_bcn_info\n");
+					update_beacon_info(padapter, pframe, len, psta);
+				}
+				psta->sta_stats.rx_pkts++;
+			}
+			else
+			{
+				//allocate a new CAM entry for IBSS station
+				if ((cam_idx = allocate_fw_sta_entry(padapter)) == NUM_STA)
+				{
+					goto _END_ONBEACON_;
+				}
+
+				//get supported rate
+				if (update_sta_support_rate(padapter, (pframe + WLAN_HDR_A3_LEN + _BEACON_IE_OFFSET_), (len - WLAN_HDR_A3_LEN - _BEACON_IE_OFFSET_), cam_idx) == _FAIL)
+				{
+					pmlmeinfo->FW_sta_info[cam_idx].status = 0;
+					goto _END_ONBEACON_;
+				}
+
+				//update TSF Value
+				update_TSF(pmlmeext, pframe, len);			
+
+				//report sta add event
+				report_add_sta_event(padapter, GetAddr2Ptr(pframe), cam_idx);
+
+				//pmlmeext->linked_to = LINKED_TO;
+			}
+		}
+	}
+
+_END_ONBEACON_:
+
+	return _SUCCESS;
+
+}
+
+unsigned int OnAuth(_adapter *padapter, union recv_frame *precv_frame)
+{
+#ifdef CONFIG_AP_MODE
+	_irqL irqL;
+	unsigned int	auth_mode, seq, ie_len;	
+	unsigned char	*sa, *p;	
+	u16	algorithm;
+	int	status;
+	static struct sta_info stat;	
+	struct	sta_info	*pstat=NULL;	
+	struct	sta_priv *pstapriv = &padapter->stapriv;
+	struct security_priv *psecuritypriv = &padapter->securitypriv;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	u8 *pframe = precv_frame->u.hdr.rx_data; 
+	uint len = precv_frame->u.hdr.len;
+
+	if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE)
+		return _FAIL;
+
+	DBG_871X("+OnAuth\n");
+	
+	sa = GetAddr2Ptr(pframe);
+	
+	auth_mode = psecuritypriv->dot11AuthAlgrthm;
+	seq = cpu_to_le16(*(unsigned short *)((unsigned int)pframe + WLAN_HDR_A3_LEN + 2));
+	algorithm = cpu_to_le16(*(unsigned short *)((unsigned int)pframe + WLAN_HDR_A3_LEN));
+
+	if (GetPrivacy(pframe))
+	{	
+#if 0 //TODO: SW rtw_wep_decrypt
+		if (SWCRYPTO)
+		{
+			status = rtw_wep_decrypt(priv, pframe, pfrinfo->pktlen,
+				priv->pmib->dot1180211AuthEntry.dot11PrivacyAlgrthm);
+			if (status == FALSE)
+			{
+				SAVE_INT_AND_CLI(flags);
+				RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,"wep-decrypt a Auth frame error!\n");
+				status = _STATS_CHALLENGE_FAIL_;
+				goto auth_fail;
+			}
+		}
+
+		seq = cpu_to_le16(*(unsigned short *)((unsigned int)pframe + WLAN_HDR_A3_LEN + 4 + 2));
+		algorithm = cpu_to_le16(*(unsigned short *)((unsigned int)pframe + WLAN_HDR_A3_LEN + 4));
+#endif
+	}
+
+
+	DBG_871X("auth alg=%x, seq=%X\n", algorithm, seq);
+
+	if (auth_mode == 2 &&
+			psecuritypriv->dot11PrivacyAlgrthm != _WEP40_ &&
+			psecuritypriv->dot11PrivacyAlgrthm != _WEP104_)
+		auth_mode = 0;
+
+	if ((algorithm > 0 && auth_mode == 0) ||	// rx a shared-key auth but shared not enabled
+		(algorithm == 0 && auth_mode == 1) )	// rx a open-system auth but shared-key is enabled
+	{		
+		DBG_871X("auth rejected due to bad alg [alg=%d, auth_mib=%d] %02X%02X%02X%02X%02X%02X\n",
+			algorithm, auth_mode, sa[0], sa[1], sa[2], sa[3], sa[4], sa[5]);
+		
+		status = _STATS_NO_SUPP_ALG_;
+		
+		goto auth_fail;
+	}
+	
+#if 0 //TODO:ACL control	
+	phead = &priv->wlan_acl_list;
+	plist = phead->next;
+	//check sa
+	if (acl_mode == 1)		// 1: positive check, only those on acl_list can be connected.
+		res = FAIL;
+	else
+		res = SUCCESS;
+
+	while(plist != phead)
+	{
+		paclnode = list_entry(plist, struct rtw_wlan_acl_node, list);
+		plist = plist->next;
+		if (!memcmp((void *)sa, paclnode->addr, 6)) {
+			if (paclnode->mode & 2) { // deny
+				res = FAIL;
+				break;
+			}
+			else {
+				res = SUCCESS;
+				break;
+			}
+		}
+	}
+
+	if (res != SUCCESS) {
+		RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,"auth abort because ACL!\n");
+		return FAIL;
+	}
+#endif
+
+	pstat = rtw_get_stainfo(pstapriv, sa);
+	if (pstat == NULL)
+	{
+		// allocate a new one
+		DBG_871X("going to alloc stainfo for sa=%02X%02X%02X%02X%02X%02X\n",  sa[0],sa[1],sa[2],sa[3],sa[4],sa[5]);
+		pstat = rtw_alloc_stainfo(pstapriv, sa);
+		if (pstat == NULL)
+		{
+			DBG_871X(" Exceed the upper limit of supported clients...\n");
+			status = _STATS_UNABLE_HANDLE_STA_;
+			goto auth_fail;
+		}
+		
+		pstat->state = WIFI_FW_AUTH_NULL;
+		pstat->auth_seq = 0;
+		
+		//pstat->flags = 0;
+		//pstat->capability = 0;
+	}
+	else
+	{		
+		_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL);
+		if(rtw_is_list_empty(&pstat->asoc_list)==_FALSE)
+		{			
+			rtw_list_delete(&pstat->asoc_list);
+			if (pstat->expire_to > 0)
+			{
+				//TODO: STA re_auth within expire_to
+			}
+		}
+		_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL);
+		
+		if (seq==1) {
+			//TODO: STA re_auth and auth timeout 
+		}
+	}
+
+	_enter_critical_bh(&pstapriv->auth_list_lock, &irqL);
+	if (rtw_is_list_empty(&pstat->auth_list))
+	{		
+		rtw_list_insert_tail(&pstat->auth_list, &pstapriv->auth_list);
+	}	
+	_exit_critical_bh(&pstapriv->auth_list_lock, &irqL);
+
+	if (pstat->auth_seq == 0)
+		pstat->expire_to = pstapriv->auth_to;
+
+	if ((pstat->auth_seq + 1) != seq)
+	{
+		DBG_871X("(1)auth rejected because out of seq [rx_seq=%d, exp_seq=%d]!\n",
+			seq, pstat->auth_seq+1);
+		status = _STATS_OUT_OF_AUTH_SEQ_;
+		goto auth_fail;
+	}
+
+	if (algorithm==0 && (auth_mode == 0 || auth_mode == 2))
+	{
+		if (seq == 1)
+		{
+			pstat->state &= ~WIFI_FW_AUTH_NULL;
+			pstat->state |= WIFI_FW_AUTH_SUCCESS;
+			pstat->expire_to = pstapriv->assoc_to;
+			pstat->authalg = algorithm;
+		}
+		else
+		{
+			DBG_871X("(2)auth rejected because out of seq [rx_seq=%d, exp_seq=%d]!\n",
+				seq, pstat->auth_seq+1);
+			status = _STATS_OUT_OF_AUTH_SEQ_;
+			goto auth_fail;
+		}
+	}
+	else // shared system or auto authentication
+	{
+		if (seq == 1)
+		{
+			//prepare for the challenging txt...
+			
+			//get_random_bytes((void *)pstat->chg_txt, 128);//TODO:
+			
+			pstat->state &= ~WIFI_FW_AUTH_NULL;
+			pstat->state |= WIFI_FW_AUTH_STATE;
+			pstat->authalg = algorithm;
+			pstat->auth_seq = 2;
+		}
+		else if (seq == 3)
+		{
+			//checking for challenging txt...
+			DBG_871X("checking for challenging txt...\n");
+			
+			p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + 4 + _AUTH_IE_OFFSET_ , _CHLGETXT_IE_, (int *)&ie_len,
+					len - WLAN_HDR_A3_LEN - _AUTH_IE_OFFSET_ - 4);
+
+			if((p==NULL) || (ie_len<=0))
+			{
+				DBG_871X("auth rejected because challenge failure!(1)\n");
+				status = _STATS_CHALLENGE_FAIL_;
+				goto auth_fail;
+			}
+			
+			if (_rtw_memcmp((void *)(p + 2), pstat->chg_txt, 128))
+			{
+				pstat->state &= (~WIFI_FW_AUTH_STATE);
+				pstat->state |= WIFI_FW_AUTH_SUCCESS;
+				// challenging txt is correct...
+				pstat->expire_to =  pstapriv->assoc_to;
+			}
+			else
+			{
+				DBG_871X("auth rejected because challenge failure!\n");
+				status = _STATS_CHALLENGE_FAIL_;
+				goto auth_fail;
+			}
+		}
+		else
+		{
+			DBG_871X("(3)auth rejected because out of seq [rx_seq=%d, exp_seq=%d]!\n",
+				seq, pstat->auth_seq+1);
+			status = _STATS_OUT_OF_AUTH_SEQ_;
+			goto auth_fail;
+		}
+	}
+
+
+	// Now, we are going to issue_auth...
+	pstat->auth_seq = seq + 1;	
+	
+#ifdef CONFIG_NATIVEAP_MLME
+	issue_auth(padapter, pstat, (unsigned short)(_STATS_SUCCESSFUL_));
+#endif
+
+	if (pstat->state & WIFI_FW_AUTH_SUCCESS)
+		pstat->auth_seq = 0;
+
+		
+	return _SUCCESS;
+
+auth_fail:
+
+	if (pstat) 
+	{
+		pstat = &stat;
+		_rtw_memset((char *)pstat, '\0', sizeof(stat));
+		pstat->auth_seq = 2;
+		_rtw_memcpy(pstat->hwaddr, sa, 6);
+	}
+	
+#ifdef CONFIG_NATIVEAP_MLME
+	issue_auth(padapter, pstat, (unsigned short)status);	
+#endif
+
+#endif
+	return _FAIL;
+
+}
+
+unsigned int OnAuthClient(_adapter *padapter, union recv_frame *precv_frame)
+{
+	unsigned int	seq, len, status, algthm, offset;
+	unsigned char	*p;
+	unsigned int	go2asoc = 0;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	u8 *pframe = precv_frame->u.hdr.rx_data;
+	uint pkt_len = precv_frame->u.hdr.len;
+
+	DBG_871X("%s\n", __FUNCTION__);
+
+	//check A1 matches or not
+	if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), get_da(pframe), ETH_ALEN))
+		return _SUCCESS;
+
+	if (!(pmlmeinfo->state & WIFI_FW_AUTH_STATE))
+		return _SUCCESS;
+
+	offset = (GetPrivacy(pframe))? 4: 0;
+
+	algthm 	= le16_to_cpu(*(unsigned short *)((SIZE_PTR)pframe + WLAN_HDR_A3_LEN + offset));
+	seq 	= le16_to_cpu(*(unsigned short *)((SIZE_PTR)pframe + WLAN_HDR_A3_LEN + offset + 2));
+	status 	= le16_to_cpu(*(unsigned short *)((SIZE_PTR)pframe + WLAN_HDR_A3_LEN + offset + 4));
+
+	if (status != 0)
+	{
+		DBG_871X("clnt auth fail, status: %d\n", status);
+		if(status == 13)//&& pmlmeinfo->auth_algo == dot11AuthAlgrthm_Auto)
+		{
+			if(pmlmeinfo->auth_algo == dot11AuthAlgrthm_Shared)
+				pmlmeinfo->auth_algo = dot11AuthAlgrthm_Open;
+			else
+				pmlmeinfo->auth_algo = dot11AuthAlgrthm_Shared;
+			//pmlmeinfo->reauth_count = 0;
+		}
+		
+		set_link_timer(pmlmeext, 1);
+		goto authclnt_fail;
+	}
+
+	if (seq == 2)
+	{
+		if (pmlmeinfo->auth_algo == dot11AuthAlgrthm_Shared)
+		{
+			 // legendary shared system
+			p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _AUTH_IE_OFFSET_, _CHLGETXT_IE_, (int *)&len,
+				pkt_len - WLAN_HDR_A3_LEN - _AUTH_IE_OFFSET_);
+
+			if (p == NULL)
+			{
+				//DBG_8192C("marc: no challenge text?\n");
+				goto authclnt_fail;
+			}
+
+			_rtw_memcpy((void *)(pmlmeinfo->chg_txt), (void *)(p + 2), len);
+			pmlmeinfo->auth_seq = 3;
+			issue_auth(padapter, NULL, 0);
+			set_link_timer(pmlmeext, REAUTH_TO);
+
+			return _SUCCESS;
+		}
+		else
+		{
+			// open system
+			go2asoc = 1;
+		}
+	}
+	else if (seq == 4)
+	{
+		if (pmlmeinfo->auth_algo == dot11AuthAlgrthm_Shared)
+		{
+			go2asoc = 1;
+		}
+		else
+		{
+			goto authclnt_fail;
+		}
+	}
+	else
+	{
+		// this is also illegal
+		//DBG_8192C("marc: clnt auth failed due to illegal seq=%x\n", seq);
+		goto authclnt_fail;
+	}
+
+	if (go2asoc)
+	{
+		start_clnt_assoc(padapter);
+		return _SUCCESS;
+	}
+
+authclnt_fail:
+
+	//pmlmeinfo->state &= ~(WIFI_FW_AUTH_STATE);
+
+	return _FAIL;
+
+}
+
+unsigned int OnAssocReq(_adapter *padapter, union recv_frame *precv_frame)
+{
+#ifdef CONFIG_AP_MODE
+	_irqL irqL;
+	u16 capab_info, listen_interval;
+	struct ieee802_11_elems elems;	
+	struct sta_info	*pstat;
+	unsigned char		reassoc, *p, *pos, *wpa_ie;
+	unsigned char		rsnie_hdr[4]={0x00, 0x50, 0xf2, 0x01};
+	unsigned char WMM_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01};
+	int		i, ie_len, wpa_ie_len, left;
+	unsigned long		flags;
+	unsigned char		supportRate[16];
+	int					supportRateNum;
+	unsigned short		status = _STATS_SUCCESSFUL_;
+	unsigned short		frame_type, ie_offset=0;	
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+	struct security_priv *psecuritypriv = &padapter->securitypriv;
+	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);	
+	WLAN_BSSID_EX 	*cur = &(pmlmeinfo->network);
+	struct sta_priv *pstapriv = &padapter->stapriv;
+	u8 *pframe = precv_frame->u.hdr.rx_data;
+	uint pkt_len = precv_frame->u.hdr.len;
+#ifdef CONFIG_P2P
+	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
+	u8 p2p_status_code = P2P_STATUS_SUCCESS;
+	u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 };
+	u32 p2pielen = 0;
+#endif //CONFIG_P2P
+
+	if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE)
+		return _FAIL;
+	
+	frame_type = GetFrameSubType(pframe);
+	if (frame_type == WIFI_ASSOCREQ)
+	{
+		reassoc = 0;
+		ie_offset = _ASOCREQ_IE_OFFSET_;
+	}	
+	else // WIFI_REASSOCREQ
+	{
+		reassoc = 1;
+		ie_offset = _REASOCREQ_IE_OFFSET_;
+	}
+	
+
+	if (pkt_len < IEEE80211_3ADDR_LEN + ie_offset) {
+		DBG_871X("handle_assoc(reassoc=%d) - too short payload (len=%lu)"
+		       "\n", reassoc, (unsigned long)pkt_len);
+		return _FAIL;
+	}
+	
+	pstat = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe));
+	if (pstat == (struct sta_info *)NULL)
+	{
+		status = _RSON_CLS2_;
+		goto asoc_class2_error;
+	}
+
+	capab_info = RTW_GET_LE16(pframe + WLAN_HDR_A3_LEN);
+	//capab_info = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN));	
+	//listen_interval = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN+2));
+	listen_interval = RTW_GET_LE16(pframe + WLAN_HDR_A3_LEN+2);
+
+	left = pkt_len - (IEEE80211_3ADDR_LEN + ie_offset);
+	pos = pframe + (IEEE80211_3ADDR_LEN + ie_offset);
+	
+
+	DBG_871X("%s\n", __FUNCTION__);
+
+	// check if this stat has been successfully authenticated/assocated
+	if (!((pstat->state) & WIFI_FW_AUTH_SUCCESS))
+	{
+		if (!((pstat->state) & WIFI_FW_ASSOC_SUCCESS))
+		{
+			status = _RSON_CLS2_;
+			goto asoc_class2_error;
+		}
+		else
+		{
+			pstat->state &= (~WIFI_FW_ASSOC_SUCCESS);
+			pstat->state |= WIFI_FW_ASSOC_STATE;				
+		}
+	}
+	else
+	{
+		pstat->state &= (~WIFI_FW_AUTH_SUCCESS);
+		pstat->state |= WIFI_FW_ASSOC_STATE;
+	}
+
+
+#if 0// todo:tkip_countermeasures
+	if (hapd->tkip_countermeasures) {
+		resp = WLAN_REASON_MICHAEL_MIC_FAILURE;
+		goto fail;
+	}
+#endif
+
+	pstat->capability = capab_info;
+
+#if 0//todo:
+	//check listen_interval
+	if (listen_interval > hapd->conf->max_listen_interval) {
+		hostapd_logger(hapd, mgmt->sa, HOSTAPD_MODULE_IEEE80211,
+			       HOSTAPD_LEVEL_DEBUG,
+			       "Too large Listen Interval (%d)",
+			       listen_interval);
+		resp = WLAN_STATUS_ASSOC_DENIED_LISTEN_INT_TOO_LARGE;
+		goto fail;
+	}
+	
+	pstat->listen_interval = listen_interval;
+#endif
+
+	//now parse all ieee802_11 ie to point to elems
+	if (rtw_ieee802_11_parse_elems(pos, left, &elems, 1) == ParseFailed ||
+	    !elems.ssid) {
+		DBG_871X("STA " MAC_FMT " sent invalid association request\n",
+		       MAC_ARG(pstat->hwaddr));
+		status = _STATS_FAILURE_;		
+		goto OnAssocReqFail;
+	}
+
+
+	// now we should check all the fields...
+	// checking SSID
+	p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + ie_offset, _SSID_IE_, &ie_len,
+		pkt_len - WLAN_HDR_A3_LEN - ie_offset);
+	if (p == NULL)
+	{
+		status = _STATS_FAILURE_;		
+	}
+
+	if (ie_len == 0) // broadcast ssid, however it is not allowed in assocreq
+		status = _STATS_FAILURE_;
+	else
+	{
+		// check if ssid match
+		if (!_rtw_memcmp((void *)(p+2), cur->Ssid.Ssid, cur->Ssid.SsidLength))
+			status = _STATS_FAILURE_;
+
+		if (ie_len != cur->Ssid.SsidLength)
+			status = _STATS_FAILURE_;
+	}
+
+	if(_STATS_SUCCESSFUL_ != status)
+		goto OnAssocReqFail;
+
+	// check if the supported rate is ok
+	p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + ie_offset, _SUPPORTEDRATES_IE_, &ie_len, pkt_len - WLAN_HDR_A3_LEN - ie_offset);
+	if (p == NULL) {
+		DBG_871X("Rx a sta assoc-req which supported rate is empty!\n");
+		// use our own rate set as statoin used
+		//_rtw_memcpy(supportRate, AP_BSSRATE, AP_BSSRATE_LEN);
+		//supportRateNum = AP_BSSRATE_LEN;
+		
+		status = _STATS_FAILURE_;
+		goto OnAssocReqFail;
+	}
+	else {
+		_rtw_memcpy(supportRate, p+2, ie_len);
+		supportRateNum = ie_len;
+
+		p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + ie_offset, _EXT_SUPPORTEDRATES_IE_ , &ie_len,
+				pkt_len - WLAN_HDR_A3_LEN - ie_offset);
+		if (p !=  NULL) {
+			
+			if(supportRateNum<=sizeof(supportRate))
+			{
+				_rtw_memcpy(supportRate+supportRateNum, p+2, ie_len);
+				supportRateNum += ie_len;
+			}			
+		}
+	}
+
+	//todo: mask supportRate between AP & STA -> move to update raid
+	//get_matched_rate(pmlmeext, supportRate, &supportRateNum, 0);
+
+	//update station supportRate	
+	pstat->bssratelen = supportRateNum;
+	_rtw_memcpy(pstat->bssrateset, supportRate, supportRateNum);
+
+
+	//check RSN/WPA/WPS
+	pstat->dot8021xalg = 0;
+      	pstat->wpa_psk = 0;
+	pstat->wpa_group_cipher = 0;
+	pstat->wpa2_group_cipher = 0;
+	pstat->wpa_pairwise_cipher = 0;
+	pstat->wpa2_pairwise_cipher = 0;
+	_rtw_memset(pstat->wpa_ie, 0, sizeof(pstat->wpa_ie));
+	if((psecuritypriv->wpa_psk & BIT(1)) && elems.rsn_ie) {
+
+		int group_cipher=0, pairwise_cipher=0;	
+		
+		wpa_ie = elems.rsn_ie;
+		wpa_ie_len = elems.rsn_ie_len;
+
+		if(rtw_parse_wpa2_ie(wpa_ie-2, wpa_ie_len+2, &group_cipher, &pairwise_cipher) == _SUCCESS)
+		{
+			pstat->dot8021xalg = 1;//psk,  todo:802.1x						
+			pstat->wpa_psk |= BIT(1);
+
+			pstat->wpa2_group_cipher = group_cipher&psecuritypriv->wpa2_group_cipher;				
+			pstat->wpa2_pairwise_cipher = pairwise_cipher&psecuritypriv->wpa2_pairwise_cipher;
+			
+			if(!pstat->wpa2_group_cipher)
+				status = WLAN_STATUS_GROUP_CIPHER_NOT_VALID;
+
+			if(!pstat->wpa2_pairwise_cipher)
+				status = WLAN_STATUS_PAIRWISE_CIPHER_NOT_VALID;
+		}
+		else
+		{
+			status = WLAN_STATUS_INVALID_IE;
+		}	
+			
+	} else if ((psecuritypriv->wpa_psk & BIT(0)) && elems.wpa_ie) {
+
+		int group_cipher=0, pairwise_cipher=0;	
+		
+		wpa_ie = elems.wpa_ie;
+		wpa_ie_len = elems.wpa_ie_len;
+
+		if(rtw_parse_wpa_ie(wpa_ie-2, wpa_ie_len+2, &group_cipher, &pairwise_cipher) == _SUCCESS)
+		{
+			pstat->dot8021xalg = 1;//psk,  todo:802.1x						
+			pstat->wpa_psk |= BIT(0);
+
+			pstat->wpa_group_cipher = group_cipher&psecuritypriv->wpa_group_cipher;				
+			pstat->wpa_pairwise_cipher = pairwise_cipher&psecuritypriv->wpa_pairwise_cipher;
+			
+			if(!pstat->wpa_group_cipher)
+				status = WLAN_STATUS_GROUP_CIPHER_NOT_VALID;
+
+			if(!pstat->wpa_pairwise_cipher)
+				status = WLAN_STATUS_PAIRWISE_CIPHER_NOT_VALID;
+		
+		}
+		else
+		{
+			status = WLAN_STATUS_INVALID_IE;
+		}
+		
+	} else {
+		wpa_ie = NULL;
+		wpa_ie_len = 0;
+	}
+
+	if(_STATS_SUCCESSFUL_ != status)
+		goto OnAssocReqFail;
+
+	pstat->flags &= ~(WLAN_STA_WPS | WLAN_STA_MAYBE_WPS);
+	//if (hapd->conf->wps_state && wpa_ie == NULL) { //todo: to check ap if supporting WPS
+	if(wpa_ie == NULL) {
+		if (elems.wps_ie) {
+			DBG_871X("STA included WPS IE in "
+				   "(Re)Association Request - assume WPS is "
+				   "used\n");
+			pstat->flags |= WLAN_STA_WPS;
+			//wpabuf_free(sta->wps_ie);
+			//sta->wps_ie = wpabuf_alloc_copy(elems.wps_ie + 4,
+			//				elems.wps_ie_len - 4);
+		} else {
+			DBG_871X("STA did not include WPA/RSN IE "
+				   "in (Re)Association Request - possible WPS "
+				   "use\n");
+			pstat->flags |= WLAN_STA_MAYBE_WPS;
+		}
+	}
+	else
+	{
+		int copy_len;
+
+		if(psecuritypriv->wpa_psk == 0)
+		{
+			DBG_871X("STA " MAC_FMT ": WPA/RSN IE in association "
+		       	"request, but AP don't support WPA/RSN\n", MAC_ARG(pstat->hwaddr));
+			
+			status = WLAN_STATUS_INVALID_IE;
+			
+			goto OnAssocReqFail;
+
+		}
+
+		if (elems.wps_ie) {
+			DBG_871X("STA included WPS IE in "
+				   "(Re)Association Request - WPS is "
+				   "used\n");
+			pstat->flags |= WLAN_STA_WPS;
+			copy_len=0;
+		}
+		else
+		{
+			copy_len = ((wpa_ie_len+2) > sizeof(pstat->wpa_ie)) ? (sizeof(pstat->wpa_ie)):(wpa_ie_len+2);
+		}
+
+
+		if(copy_len>0)
+			_rtw_memcpy(pstat->wpa_ie, wpa_ie-2, copy_len);
+		
+	}
+
+
+	// check if there is WMM IE & support WWM-PS
+	pstat->flags &= ~WLAN_STA_WME;
+	pstat->qos_option = 0;
+	pstat->qos_info = 0;
+	pstat->has_legacy_ac = _TRUE;
+	pstat->uapsd_vo = 0;
+	pstat->uapsd_vi = 0;
+	pstat->uapsd_be = 0;
+	pstat->uapsd_bk = 0;
+	if (pmlmepriv->qospriv.qos_option) 
+	{
+		p = pframe + WLAN_HDR_A3_LEN + ie_offset; ie_len = 0;
+		for (;;) 
+		{
+			p = rtw_get_ie(p, _VENDOR_SPECIFIC_IE_, &ie_len, pkt_len - WLAN_HDR_A3_LEN - ie_offset);
+			if (p != NULL) {
+				if (_rtw_memcmp(p+2, WMM_IE, 6)) {
+
+					pstat->flags |= WLAN_STA_WME;
+					
+					pstat->qos_option = 1;				
+					pstat->qos_info = *(p+8);
+					
+					pstat->max_sp_len = (pstat->qos_info>>5)&0x3;
+
+					if((pstat->qos_info&0xf) !=0xf)
+						pstat->has_legacy_ac = _TRUE;
+					else
+						pstat->has_legacy_ac = _FALSE;
+					
+					if(pstat->qos_info&0xf)
+					{
+						if(pstat->qos_info&BIT(0))
+							pstat->uapsd_vo = BIT(0)|BIT(1);
+						else
+							pstat->uapsd_vo = 0;
+		
+						if(pstat->qos_info&BIT(1))
+							pstat->uapsd_vi = BIT(0)|BIT(1);
+						else
+							pstat->uapsd_vi = 0;
+			
+						if(pstat->qos_info&BIT(2))
+							pstat->uapsd_bk = BIT(0)|BIT(1);
+						else
+							pstat->uapsd_bk = 0;
+			
+						if(pstat->qos_info&BIT(3))			
+							pstat->uapsd_be = BIT(0)|BIT(1);
+						else
+							pstat->uapsd_be = 0;
+		
+					}
+	
+					break;
+				}
+			}
+			else {
+				break;
+			}
+			p = p + ie_len + 2;
+		}
+	}
+
+
+#ifdef CONFIG_80211N_HT
+	/* save HT capabilities in the sta object */
+	_rtw_memset(&pstat->htpriv.ht_cap, 0, sizeof(struct ieee80211_ht_cap));
+	if (elems.ht_capabilities && elems.ht_capabilities_len >= sizeof(struct ieee80211_ht_cap)) 
+	{
+		pstat->flags |= WLAN_STA_HT;
+		
+		pstat->flags |= WLAN_STA_WME;
+		
+		_rtw_memcpy(&pstat->htpriv.ht_cap, elems.ht_capabilities, sizeof(struct ieee80211_ht_cap));			
+		
+	} else
+		pstat->flags &= ~WLAN_STA_HT;
+
+	
+	if((pmlmepriv->htpriv.ht_option == _FALSE) && (pstat->flags&WLAN_STA_HT))
+	{
+		status = _STATS_FAILURE_;
+		goto OnAssocReqFail;
+	}
+		
+
+	if ((pstat->flags & WLAN_STA_HT) &&
+		    ((pstat->wpa2_pairwise_cipher&WPA_CIPHER_TKIP) ||
+		      (pstat->wpa_pairwise_cipher&WPA_CIPHER_TKIP)))
+	{		    
+		DBG_871X("HT: " MAC_FMT " tried to "
+				   "use TKIP with HT association\n", MAC_ARG(pstat->hwaddr));
+		
+		//status = WLAN_STATUS_CIPHER_REJECTED_PER_POLICY;
+		//goto OnAssocReqFail;
+	}
+#endif /* CONFIG_80211N_HT */
+
+       //
+       //if (hapd->iface->current_mode->mode == HOSTAPD_MODE_IEEE80211G)//?
+	pstat->flags |= WLAN_STA_NONERP;	
+	for (i = 0; i < pstat->bssratelen; i++) {
+		if ((pstat->bssrateset[i] & 0x7f) > 22) {
+			pstat->flags &= ~WLAN_STA_NONERP;
+			break;
+		}
+	}
+
+	if (pstat->capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
+		pstat->flags |= WLAN_STA_SHORT_PREAMBLE;
+	else
+		pstat->flags &= ~WLAN_STA_SHORT_PREAMBLE;
+
+	
+	
+	if (status != _STATS_SUCCESSFUL_)
+		goto OnAssocReqFail;
+
+#ifdef CONFIG_P2P
+	pstat->is_p2p_device = _FALSE;
+	if(pwdinfo->role == P2P_ROLE_GO)
+	{		
+		if(rtw_get_p2p_ie(pframe + WLAN_HDR_A3_LEN + ie_offset , pkt_len - WLAN_HDR_A3_LEN - ie_offset , p2pie, &p2pielen))
+		{
+			pstat->is_p2p_device = _TRUE;
+			if((p2p_status_code=(u8)process_assoc_req_p2p_ie(pwdinfo, p2pie, p2pielen, pstat))>0)
+			{
+				pstat->p2p_status_code = p2p_status_code;
+				status = _STATS_CAP_FAIL_;
+				goto OnAssocReqFail;
+			}
+		}
+	}	
+	pstat->p2p_status_code = p2p_status_code;
+#endif //CONFIG_P2P
+
+	//TODO: identify_proprietary_vendor_ie();
+	// Realtek proprietary IE
+	// identify if this is Broadcom sta
+	// identify if this is ralink sta
+	// Customer proprietary IE
+
+	
+
+	/* get a unique AID */
+	if (pstat->aid > 0) {
+		DBG_871X("  old AID %d\n", pstat->aid);
+	} else {
+		for (pstat->aid = 1; pstat->aid <= NUM_STA; pstat->aid++)
+			if (pstapriv->sta_aid[pstat->aid - 1] == NULL)
+				break;
+				
+		//if (pstat->aid > NUM_STA) {
+		if (pstat->aid > pstapriv->max_num_sta) {
+				
+			pstat->aid = 0;
+				
+			DBG_871X("  no room for more AIDs\n");
+
+			status = WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA;
+				
+			goto OnAssocReqFail;
+				
+			
+		} else {
+			pstapriv->sta_aid[pstat->aid - 1] = pstat;
+			DBG_871X("allocate new AID = (%d)\n", pstat->aid);
+		}	
+	}
+
+
+	pstat->state &= (~WIFI_FW_ASSOC_STATE);	
+	pstat->state |= WIFI_FW_ASSOC_SUCCESS;
+	
+	_enter_critical_bh(&pstapriv->auth_list_lock, &irqL);
+	if (!rtw_is_list_empty(&pstat->auth_list))
+	{
+		rtw_list_delete(&pstat->auth_list);
+	}
+	_exit_critical_bh(&pstapriv->auth_list_lock, &irqL);
+
+	_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL);	
+	if (rtw_is_list_empty(&pstat->asoc_list))
+	{
+		pstat->expire_to = pstapriv->expire_to;
+		rtw_list_insert_tail(&pstat->asoc_list, &pstapriv->asoc_list);		
+	}
+	_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL);
+
+	// now the station is qualified to join our BSS...	
+	if(pstat && (pstat->state & WIFI_FW_ASSOC_SUCCESS) && (_STATS_SUCCESSFUL_==status))
+	{
+#ifdef CONFIG_NATIVEAP_MLME
+		//.1 bss_cap_update & sta_info_update
+		bss_cap_update(padapter, pstat);
+		sta_info_update(padapter, pstat);
+		
+		//.2 - report to upper layer 
+		DBG_871X("indicate_sta_join_event to upper layer - hostapd\n");		 
+		rtw_indicate_sta_assoc_event(padapter, pstat);
+		
+		//.3-(1) report sta add event
+		report_add_sta_event(padapter, pstat->hwaddr, pstat->aid);
+		
+		if (frame_type == WIFI_ASSOCREQ)
+			issue_asocrsp(padapter, status, pstat, WIFI_ASSOCRSP);
+		else
+			issue_asocrsp(padapter, status, pstat, WIFI_REASSOCRSP);
+	
+#endif
+	}
+
+	return _SUCCESS;
+
+asoc_class2_error:
+
+#ifdef CONFIG_NATIVEAP_MLME
+	issue_deauth(padapter, (void *)GetAddr2Ptr(pframe), status);
+#endif
+
+	return _FAIL;		
+
+OnAssocReqFail:
+
+
+#ifdef CONFIG_NATIVEAP_MLME
+	pstat->aid = 0;
+	if (frame_type == WIFI_ASSOCREQ)
+		issue_asocrsp(padapter, status, pstat, WIFI_ASSOCRSP);
+	else
+		issue_asocrsp(padapter, status, pstat, WIFI_REASSOCRSP);
+#endif
+
+
+#endif /* CONFIG_AP_MODE */
+
+	return _FAIL;		
+
+}
+
+unsigned int OnAssocRsp(_adapter *padapter, union recv_frame *precv_frame)
+{
+	uint i;
+	int res;
+	unsigned short	status;
+	PNDIS_802_11_VARIABLE_IEs	pIE;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	//WLAN_BSSID_EX 		*cur_network = &(pmlmeinfo->network);
+	u8 *pframe = precv_frame->u.hdr.rx_data;
+	uint pkt_len = precv_frame->u.hdr.len;
+
+	DBG_871X("%s\n", __FUNCTION__);
+	
+	//check A1 matches or not
+	if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), get_da(pframe), ETH_ALEN))
+		return _SUCCESS;
+
+	if (!(pmlmeinfo->state & (WIFI_FW_AUTH_SUCCESS | WIFI_FW_ASSOC_STATE)))
+		return _SUCCESS;
+
+	if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)
+		return _SUCCESS;
+
+	_cancel_timer_ex(&pmlmeext->link_timer);
+
+	//status
+	if ((status = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN + 2))) > 0)
+	{
+		DBG_871X("assoc reject, status code: %d\n", status);
+		pmlmeinfo->state = WIFI_FW_NULL_STATE;
+		res = -4;
+		goto report_assoc_result;
+	}
+
+	//get capabilities
+	pmlmeinfo->capability = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN));
+
+	//set slot time
+	pmlmeinfo->slotTime = (pmlmeinfo->capability & BIT(10))? 9: 20;
+
+	//AID
+	res = pmlmeinfo->aid = (int)(le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN + 4))&0x3fff);
+
+	//following are moved to join event callback function
+	//to handle HT, WMM, rate adaptive, update MAC reg
+	//for not to handle the synchronous IO in the tasklet
+	for (i = (6 + WLAN_HDR_A3_LEN); i < pkt_len;)
+	{
+		pIE = (PNDIS_802_11_VARIABLE_IEs)(pframe + i);
+
+		switch (pIE->ElementID)
+		{
+			case _VENDOR_SPECIFIC_IE_:
+				if (_rtw_memcmp(pIE->data, WMM_PARA_OUI, 6))	//WMM
+				{
+					WMM_param_handler(padapter, pIE);
+				}
+				break;
+
+			case _HT_CAPABILITY_IE_:	//HT caps
+				HT_caps_handler(padapter, pIE);
+				break;
+
+			case _HT_EXTRA_INFO_IE_:	//HT info
+				HT_info_handler(padapter, pIE);
+				break;
+
+			case _ERPINFO_IE_:
+				ERP_IE_handler(padapter, pIE);
+
+			default:
+				break;
+		}
+
+		i += (pIE->Length + 2);
+	}
+
+	pmlmeinfo->state &= (~WIFI_FW_ASSOC_STATE);
+	pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS;
+
+	//Update Basic Rate Table for spec, 2010-12-28 , by thomas
+	UpdateBrateTbl(padapter, pmlmeinfo->network.SupportedRates);
+
+report_assoc_result:
+
+	report_join_res(padapter, res);
+
+	return _SUCCESS;
+}
+
+unsigned int OnDeAuth(_adapter *padapter, union recv_frame *precv_frame)
+{
+	unsigned short	reason;
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	u8 *pframe = precv_frame->u.hdr.rx_data;
+	uint pktlen = precv_frame->u.hdr.len;
+
+	//check A3
+	if (!(_rtw_memcmp(GetAddr3Ptr(pframe), get_my_bssid(&pmlmeinfo->network), ETH_ALEN)))
+		return _SUCCESS;
+
+	reason = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN));
+
+	DBG_871X("%s Reason code(%d)\n", __FUNCTION__,reason);
+
+#ifdef CONFIG_AP_MODE
+	if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)
+	{		
+#if 0	
+		_irqL irqL;
+		struct sta_info *psta;
+		struct sta_priv *pstapriv = &padapter->stapriv;
+		
+		psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe));
+		_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);		
+		rtw_free_stainfo(padapter, psta);
+		_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);		
+#endif
+		ap_free_sta(padapter, rtw_get_stainfo(&padapter->stapriv, GetAddr2Ptr(pframe)));
+
+		return _SUCCESS;
+	}
+	else
+#endif
+	{
+		receive_disconnect(padapter, GetAddr3Ptr(pframe) ,reason);
+	}	
+	pmlmepriv->LinkDetectInfo.bBusyTraffic = _FALSE;
+	return _SUCCESS;
+
+}
+
+unsigned int OnDisassoc(_adapter *padapter, union recv_frame *precv_frame)
+{
+	unsigned short	reason;
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	u8 *pframe = precv_frame->u.hdr.rx_data;
+	uint pktlen = precv_frame->u.hdr.len;
+
+	//check A3
+	if (!(_rtw_memcmp(GetAddr3Ptr(pframe), get_my_bssid(&pmlmeinfo->network), ETH_ALEN)))
+		return _SUCCESS;
+
+	reason = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN));
+
+        DBG_871X("%s Reason code(%d)\n", __FUNCTION__,reason);
+
+#ifdef CONFIG_AP_MODE
+	if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)
+	{	
+#if 0	
+		_irqL irqL;
+		struct sta_info *psta;
+		struct sta_priv *pstapriv = &padapter->stapriv;
+		
+		psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe));
+		_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);	
+		rtw_free_stainfo(padapter, psta);
+		_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);		
+#endif
+
+		ap_free_sta(padapter, rtw_get_stainfo(&padapter->stapriv, GetAddr2Ptr(pframe)));
+
+		return _SUCCESS;
+	}
+	else
+#endif
+	{
+		receive_disconnect(padapter, GetAddr3Ptr(pframe), reason);
+	}	
+	pmlmepriv->LinkDetectInfo.bBusyTraffic = _FALSE;
+	return _SUCCESS;
+
+}
+
+unsigned int OnAtim(_adapter *padapter, union recv_frame *precv_frame)
+{
+	DBG_871X("%s\n", __FUNCTION__);
+	return _SUCCESS;
+}
+
+unsigned int OnAction_qos(_adapter *padapter, union recv_frame *precv_frame)
+{
+	return _SUCCESS;
+}
+
+unsigned int OnAction_dls(_adapter *padapter, union recv_frame *precv_frame)
+{
+	return _SUCCESS;
+}
+
+unsigned int OnAction_back(_adapter *padapter, union recv_frame *precv_frame)
+{
+	u8 *addr;
+	struct sta_info *psta=NULL;
+	struct recv_reorder_ctrl *preorder_ctrl;
+	unsigned char		*frame_body;
+	unsigned char		category, action;
+	unsigned short	tid, status, reason_code = 0;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	u8 *pframe = precv_frame->u.hdr.rx_data;
+	struct sta_priv *pstapriv = &padapter->stapriv;
+					
+	uint len = precv_frame->u.hdr.len;
+
+	//check RA matches or not	
+	if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), GetAddr1Ptr(pframe), ETH_ALEN))//for if1, sta/ap mode
+		return _SUCCESS;
+
+/*
+	//check A1 matches or not
+	if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), get_da(pframe), ETH_ALEN))
+		return _SUCCESS;
+*/
+	DBG_871X("%s\n", __FUNCTION__);
+
+	if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE)	
+		if (!(pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS))
+			return _SUCCESS;
+
+	addr = GetAddr2Ptr(pframe);
+	psta = rtw_get_stainfo(pstapriv, addr);
+
+	if(psta==NULL)
+		return _SUCCESS;
+
+	frame_body = (unsigned char *)(pframe + sizeof(struct ieee80211_hdr_3addr));
+
+	category = frame_body[0];
+	if (category == WLAN_CATEGORY_BACK)// representing Block Ack
+	{
+		if (!pmlmeinfo->HT_enable)
+		{
+			return _SUCCESS;
+		}
+
+		action = frame_body[1];
+		DBG_871X("%s, action=%d\n", __FUNCTION__, action);
+		switch (action)
+		{
+			case WLAN_ACTION_ADDBA_REQ: //ADDBA request
+
+				_rtw_memcpy(&(pmlmeinfo->ADDBA_req), &(frame_body[2]), sizeof(struct ADDBA_request));
+				//process_addba_req(padapter, (u8*)&(pmlmeinfo->ADDBA_req), GetAddr3Ptr(pframe));
+				process_addba_req(padapter, (u8*)&(pmlmeinfo->ADDBA_req), addr);
+				
+				if(pmlmeinfo->bAcceptAddbaReq == _TRUE)
+				{
+					issue_action_BA(padapter, addr, WLAN_ACTION_ADDBA_RESP, 0);
+				}
+				else
+				{
+					issue_action_BA(padapter, addr, WLAN_ACTION_ADDBA_RESP, 37);//reject ADDBA Req
+				}
+								
+				break;
+
+			case WLAN_ACTION_ADDBA_RESP: //ADDBA response
+
+				//status = frame_body[3] | (frame_body[4] << 8); //endian issue
+				status = RTW_GET_LE16(&frame_body[3]);
+				tid = ((frame_body[5] >> 2) & 0x7);
+
+				if (status == 0)
+				{	//successful					
+					DBG_871X("agg_enable for TID=%d\n", tid);
+					psta->htpriv.agg_enable_bitmap |= 1 << tid;					
+					psta->htpriv.candidate_tid_bitmap &= ~BIT(tid);				
+				}
+				else
+				{					
+					psta->htpriv.agg_enable_bitmap &= ~BIT(tid);					
+				}
+
+				//DBG_8192C("marc: ADDBA RSP: %x\n", pmlmeinfo->agg_enable_bitmap);
+				break;
+
+			case WLAN_ACTION_DELBA: //DELBA
+				if ((frame_body[3] & BIT(3)) == 0)
+				{
+					psta->htpriv.agg_enable_bitmap &= ~(1 << ((frame_body[3] >> 4) & 0xf));
+					psta->htpriv.candidate_tid_bitmap &= ~(1 << ((frame_body[3] >> 4) & 0xf));
+					
+					//reason_code = frame_body[4] | (frame_body[5] << 8);
+					reason_code = RTW_GET_LE16(&frame_body[4]);
+				}
+				else if((frame_body[3] & BIT(3)) == BIT(3))
+				{						
+					tid = (frame_body[3] >> 4) & 0x0F;
+				
+					preorder_ctrl =  &psta->recvreorder_ctrl[tid];
+					preorder_ctrl->enable = _FALSE;
+					preorder_ctrl->indicate_seq = 0xffff;
+					#ifdef DBG_RX_SEQ
+					DBG_871X("DBG_RX_SEQ %s:%d indicate_seq:%u \n", __FUNCTION__, __LINE__,
+						preorder_ctrl->indicate_seq);
+					#endif
+				}
+				
+				DBG_8192C("%s(): DELBA: %x(%x)\n", __FUNCTION__,pmlmeinfo->agg_enable_bitmap, reason_code);
+				//todo: how to notify the host while receiving DELETE BA
+				break;
+
+			default:
+				break;
+		}
+	}
+
+	return _SUCCESS;
+}
+
+#ifdef CONFIG_P2P
+void issue_p2p_GO_request(_adapter *padapter, u8* raddr)
+{
+
+	unsigned char category = WLAN_CATEGORY_PUBLIC;
+	u8			action = P2P_PUB_ACTION_ACTION;
+	u32			p2poui = cpu_to_be32(P2POUI);
+	u8			oui_subtype = P2P_GO_NEGO_REQ;
+	u8			wpsie[ 255 ] = { 0x00 }, p2pie[ 255 ] = { 0x00 };
+	u8			wpsielen = 0, p2pielen = 0, i;
+	u16			chnum = 0;
+#ifdef CONFIG_WFD
+	u32					wfdielen = 0;
+#endif //CONFIG_WFD	
+	
+	struct xmit_frame			*pmgntframe;
+	struct pkt_attrib			*pattrib;
+	unsigned char					*pframe;
+	struct ieee80211_hdr	*pwlanhdr;
+	unsigned short				*fctrl;
+	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct wifidirect_info	*pwdinfo = &( padapter->wdinfo);
+
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+
+	DBG_8192C( "[%s] In\n", __FUNCTION__ );
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(padapter, pattrib);
+
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+
+	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+
+	_rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+	pmlmeext->mgnt_seq++;
+	SetFrameSubType(pframe, WIFI_ACTION);
+
+	pframe += sizeof(struct ieee80211_hdr_3addr);
+	pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr);
+
+	pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen));	
+	pwdinfo->negotiation_dialog_token = 1;	//	Initialize the dialog value
+	pframe = rtw_set_fixed_ie(pframe, 1, &pwdinfo->negotiation_dialog_token, &(pattrib->pktlen));
+
+	
+
+	//	WPS Section
+	wpsielen = 0;
+	//	WPS OUI
+	*(u32*) ( wpsie ) = cpu_to_be32( WPSOUI );
+	wpsielen += 4;
+
+	//	WPS version
+	//	Type:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 );
+	wpsielen += 2;
+
+	//	Length:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 );
+	wpsielen += 2;
+
+	//	Value:
+	wpsie[wpsielen++] = WPS_VERSION_1;	//	Version 1.0
+
+	//	Device Password ID
+	//	Type:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_DEVICE_PWID );
+	wpsielen += 2;
+
+	//	Length:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 );
+	wpsielen += 2;
+
+	//	Value:
+
+	if ( pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_PEER_DISPLAY_PIN )
+	{
+		*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_USER_SPEC );
+	}
+	else if ( pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_SELF_DISPLAY_PIN )
+	{
+		*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_REGISTRAR_SPEC );
+	}
+	else if ( pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_PBC )
+	{
+		*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_PBC );
+	}
+
+	wpsielen += 2;
+
+	pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen );
+
+
+	//	P2P IE Section.
+
+	//	P2P OUI
+	p2pielen = 0;
+	p2pie[ p2pielen++ ] = 0x50;
+	p2pie[ p2pielen++ ] = 0x6F;
+	p2pie[ p2pielen++ ] = 0x9A;
+	p2pie[ p2pielen++ ] = 0x09;	//	WFA P2P v1.0
+
+	//	Commented by Albert 20110306
+	//	According to the P2P Specification, the group negoitation request frame should contain 9 P2P attributes
+	//	1. P2P Capability
+	//	2. Group Owner Intent
+	//	3. Configuration Timeout
+	//	4. Listen Channel
+	//	5. Extended Listen Timing
+	//	6. Intended P2P Interface Address
+	//	7. Channel List
+	//	8. P2P Device Info
+	//	9. Operating Channel
+
+
+	//	P2P Capability
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 );
+	p2pielen += 2;
+
+	//	Value:
+	//	Device Capability Bitmap, 1 byte
+	//	Be able to participate in additional P2P Groups and
+	//	support the P2P Invitation Procedure
+	p2pie[ p2pielen++ ] = P2P_DEVCAP_INVITATION_PROC;
+	
+	//	Group Capability Bitmap, 1 byte
+	p2pie[ p2pielen++ ] = 0x00;
+
+	//	Group Owner Intent
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_GO_INTENT;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 );
+	p2pielen += 2;
+
+	//	Value:
+	//	Todo the tie breaker bit.
+	p2pie[ p2pielen++ ] = ( ( pwdinfo->intent << 1 ) | BIT(0) );
+
+	//	Configuration Timeout
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_CONF_TIMEOUT;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 );
+	p2pielen += 2;
+
+	//	Value:
+	p2pie[ p2pielen++ ] = 200;	//	2 seconds needed to be the P2P GO
+	p2pie[ p2pielen++ ] = 200;	//	2 seconds needed to be the P2P Client
+
+
+	//	Listen Channel
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_LISTEN_CH;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 );
+	p2pielen += 2;
+
+	//	Value:
+	//	Country String
+	p2pie[ p2pielen++ ] = 'U';
+	p2pie[ p2pielen++ ] = 'S';
+	
+	//	The third byte should be set to 0x04.
+	//	Described in the "Operating Channel Attribute" section.
+	p2pie[ p2pielen++ ] = 0x04;
+
+	//	Operating Class
+	p2pie[ p2pielen++ ] = 0x51;	//	Copy from SD7
+	
+	//	Channel Number
+	p2pie[ p2pielen++ ] = pwdinfo->listen_channel;	//	listening channel number
+	
+
+	//	Extended Listen Timing ATTR
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_EX_LISTEN_TIMING;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0004 );
+	p2pielen += 2;
+
+	//	Value:
+	//	Availability Period
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF );
+	p2pielen += 2;
+
+	//	Availability Interval
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF );
+	p2pielen += 2;
+
+
+	//	Intended P2P Interface Address
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_INTENTED_IF_ADDR;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN );
+	p2pielen += 2;
+
+	//	Value:
+	_rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN );
+	p2pielen += ETH_ALEN;
+
+
+	//	Channel List
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_CH_LIST;
+
+	//	Length:
+	chnum = ( u16 ) pmlmeext->max_chan_nums;
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 5 + chnum );
+	p2pielen += 2;
+
+	//	Value:
+	//	Country String
+	p2pie[ p2pielen++ ] = 'U';
+	p2pie[ p2pielen++ ] = 'S';
+	
+	//	The third byte should be set to 0x04.
+	//	Described in the "Operating Channel Attribute" section.
+	p2pie[ p2pielen++ ] = 0x04;
+
+	//	Channel Entry List
+	//	Operating Class
+	p2pie[ p2pielen++ ] = 0x51;	//	Copy from SD7
+
+	//	Number of Channels
+	//	Depends on the channel plan
+	p2pie[ p2pielen++ ] = pmlmeext->max_chan_nums;	
+
+	//	Channel List
+	for( i = 0; i < pmlmeext->max_chan_nums; i++ )
+	{
+		p2pie[ p2pielen++ ] = pmlmeext->channel_set[ i ].ChannelNum;
+	}
+
+	//	Device Info
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO;
+
+	//	Length:
+	//	21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) 
+	//	+ NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes)
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len );
+	p2pielen += 2;
+
+	//	Value:
+	//	P2P Device Address
+	_rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN );
+	p2pielen += ETH_ALEN;
+
+	//	Config Method
+	//	This field should be big endian. Noted by P2P specification.
+
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->supported_wps_cm );
+
+	p2pielen += 2;
+
+	//	Primary Device Type
+	//	Category ID
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_RTK_WIDI );
+	p2pielen += 2;
+
+	//	OUI
+	*(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI );
+	p2pielen += 4;
+
+	//	Sub Category ID
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_RTK_DMP );
+	p2pielen += 2;
+
+	//	Number of Secondary Device Types
+	p2pie[ p2pielen++ ] = 0x00;	//	No Secondary Device Type List
+
+	//	Device Name
+	//	Type:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME );
+	p2pielen += 2;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len );
+	p2pielen += 2;
+
+	//	Value:
+	_rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name , pwdinfo->device_name_len );
+	p2pielen += pwdinfo->device_name_len;	
+	
+
+	//	Operating Channel
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_OPERATING_CH;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 );
+	p2pielen += 2;
+
+	//	Value:
+	//	Country String
+	p2pie[ p2pielen++ ] = 'U';
+	p2pie[ p2pielen++ ] = 'S';
+	
+	//	The third byte should be set to 0x04.
+	//	Described in the "Operating Channel Attribute" section.
+	p2pie[ p2pielen++ ] = 0x04;
+
+	//	Operating Class
+	p2pie[ p2pielen++ ] = 0x51;	//	Copy from SD7
+	
+	//	Channel Number
+	p2pie[ p2pielen++ ] = pwdinfo->operating_channel;	//	operating channel number
+
+	pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen );		
+
+#ifdef CONFIG_WFD
+	wfdielen = build_nego_req_wfd_ie(pwdinfo, pframe);
+	pframe += wfdielen;
+	pattrib->pktlen += wfdielen;
+#endif //CONFIG_WFD
+
+	pattrib->last_txcmdsz = pattrib->pktlen;
+
+	dump_mgntframe(padapter, pmgntframe);
+
+	return;
+
+}
+
+
+void issue_p2p_GO_response(_adapter *padapter, u8* raddr, u8* frame_body,uint len, u8 result)
+{
+
+	unsigned char category = WLAN_CATEGORY_PUBLIC;
+	u8			action = P2P_PUB_ACTION_ACTION;
+	u32			p2poui = cpu_to_be32(P2POUI);
+	u8			oui_subtype = P2P_GO_NEGO_RESP;
+	u8			wpsie[ 255 ] = { 0x00 }, p2pie[ 255 ] = { 0x00 };
+	u8			p2pielen = 0, i;
+	uint			wpsielen = 0;
+	u16			wps_devicepassword_id = 0x0000;
+	uint			wps_devicepassword_id_len = 0;
+	u16			chnum = 0;
+#ifdef CONFIG_WFD
+	u32					wfdielen = 0;
+#endif //CONFIG_WFD		
+	
+	struct xmit_frame			*pmgntframe;
+	struct pkt_attrib			*pattrib;
+	unsigned char					*pframe;
+	struct ieee80211_hdr	*pwlanhdr;
+	unsigned short				*fctrl;
+	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct wifidirect_info	*pwdinfo = &( padapter->wdinfo);
+
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+
+	DBG_8192C( "[%s] In\n", __FUNCTION__ );
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(padapter, pattrib);
+
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+
+	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+
+	_rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+	pmlmeext->mgnt_seq++;
+	SetFrameSubType(pframe, WIFI_ACTION);
+
+	pframe += sizeof(struct ieee80211_hdr_3addr);
+	pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr);
+
+	pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen));	
+	pwdinfo->negotiation_dialog_token = frame_body[7];	//	The Dialog Token of provisioning discovery request frame.
+	pframe = rtw_set_fixed_ie(pframe, 1, &(pwdinfo->negotiation_dialog_token), &(pattrib->pktlen));
+
+	//	Commented by Albert 20110328
+	//	Try to get the device password ID from the WPS IE of group negotiation request frame
+	//	WiFi Direct test plan 5.1.15
+	rtw_get_wps_ie_p2p( frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, wpsie, &wpsielen);
+	rtw_get_wps_attr_content( wpsie, wpsielen, WPS_ATTR_DEVICE_PWID, (u8*) &wps_devicepassword_id, &wps_devicepassword_id_len);
+	wps_devicepassword_id = be16_to_cpu( wps_devicepassword_id );
+
+	_rtw_memset( wpsie, 0x00, 255 );
+	wpsielen = 0;
+
+	//	WPS Section
+	wpsielen = 0;
+	//	WPS OUI
+	*(u32*) ( wpsie ) = cpu_to_be32( WPSOUI );
+	wpsielen += 4;
+
+	//	WPS version
+	//	Type:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 );
+	wpsielen += 2;
+
+	//	Length:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 );
+	wpsielen += 2;
+
+	//	Value:
+	wpsie[wpsielen++] = WPS_VERSION_1;	//	Version 1.0
+
+	//	Device Password ID
+	//	Type:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_DEVICE_PWID );
+	wpsielen += 2;
+
+	//	Length:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 );
+	wpsielen += 2;
+
+	//	Value:
+	if ( wps_devicepassword_id == WPS_DPID_USER_SPEC )
+	{
+		*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_REGISTRAR_SPEC );
+	}
+	else if ( wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC )
+	{
+		*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_USER_SPEC );
+	}
+	else
+	{
+		*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_PBC );
+	}
+	wpsielen += 2;
+
+	pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen );
+
+
+	//	P2P IE Section.
+
+	//	P2P OUI
+	p2pielen = 0;
+	p2pie[ p2pielen++ ] = 0x50;
+	p2pie[ p2pielen++ ] = 0x6F;
+	p2pie[ p2pielen++ ] = 0x9A;
+	p2pie[ p2pielen++ ] = 0x09;	//	WFA P2P v1.0
+
+	//	Commented by Albert 20100908
+	//	According to the P2P Specification, the group negoitation response frame should contain 9 P2P attributes
+	//	1. Status
+	//	2. P2P Capability
+	//	3. Group Owner Intent
+	//	4. Configuration Timeout
+	//	5. Operating Channel
+	//	6. Intended P2P Interface Address
+	//	7. Channel List
+	//	8. Device Info
+	//	9. Group ID	( Only GO )
+
+
+	//	ToDo:
+
+	//	P2P Status
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_STATUS;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 );
+	p2pielen += 2;
+
+	//	Value:
+	p2pie[ p2pielen++ ] = result;
+	
+	//	P2P Capability
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 );
+	p2pielen += 2;
+
+	//	Value:
+	//	Device Capability Bitmap, 1 byte
+
+	if ( pwdinfo->role == P2P_ROLE_CLIENT )
+	{
+		//	Commented by Albert 2011/03/08
+		//	According to the P2P specification
+		//	if the sending device will be client, the P2P Capability should be reserved of group negotation response frame
+		p2pie[ p2pielen++ ] = 0;
+	}
+	else
+	{
+		//	Be group owner or meet the error case
+		//	Be able to participate in additional P2P Groups and
+		//	support the P2P Invitation Procedure	
+		p2pie[ p2pielen++ ] = P2P_DEVCAP_INVITATION_PROC;
+	}
+	
+	//	Group Capability Bitmap, 1 byte
+	p2pie[ p2pielen++ ] = 0x00;
+
+	//	Group Owner Intent
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_GO_INTENT;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 );
+	p2pielen += 2;
+
+	//	Value:
+	if ( pwdinfo->peer_intent & 0x01 )
+	{
+		//	Peer's tie breaker bit is 1, our tie breaker bit should be 0
+		p2pie[ p2pielen++ ] = ( pwdinfo->intent << 1 );
+	}
+	else
+	{
+		//	Peer's tie breaker bit is 0, our tie breaker bit should be 1
+		p2pie[ p2pielen++ ] = ( ( pwdinfo->intent << 1 ) | BIT(0) );
+	}
+
+
+	//	Configuration Timeout
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_CONF_TIMEOUT;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 );
+	p2pielen += 2;
+
+	//	Value:
+	p2pie[ p2pielen++ ] = 200;	//	2 seconds needed to be the P2P GO
+	p2pie[ p2pielen++ ] = 200;	//	2 seconds needed to be the P2P Client
+
+	//	Operating Channel
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_OPERATING_CH;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 );
+	p2pielen += 2;
+
+	//	Value:
+	//	Country String
+	p2pie[ p2pielen++ ] = 'U';
+	p2pie[ p2pielen++ ] = 'S';
+	
+	//	The third byte should be set to 0x04.
+	//	Described in the "Operating Channel Attribute" section.
+	p2pie[ p2pielen++ ] = 0x04;
+
+	//	Operating Class
+	p2pie[ p2pielen++ ] = 0x51;	//	Copy from SD7
+	
+	//	Channel Number
+	p2pie[ p2pielen++ ] = pwdinfo->operating_channel;	//	operating channel number
+
+	//	Intended P2P Interface Address	
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_INTENTED_IF_ADDR;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN );
+	p2pielen += 2;
+
+	//	Value:
+	_rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN );
+	p2pielen += ETH_ALEN;
+
+	//	Channel List
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_CH_LIST;
+
+	//	Length:
+	chnum = ( u16 ) pmlmeext->max_chan_nums;
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 5 + chnum );
+	p2pielen += 2;
+
+	//	Value:
+	//	Country String
+	p2pie[ p2pielen++ ] = 'U';
+	p2pie[ p2pielen++ ] = 'S';
+	
+	//	The third byte should be set to 0x04.
+	//	Described in the "Operating Channel Attribute" section.
+	p2pie[ p2pielen++ ] = 0x04;
+
+	//	Channel Entry List
+	//	Operating Class
+	p2pie[ p2pielen++ ] = 0x51;	//	Copy from SD7
+
+	//	Number of Channels
+	//	Depends on the channel plan
+	p2pie[ p2pielen++ ] = pmlmeext->max_chan_nums;	
+
+	//	Channel List
+	for( i = 0; i < pmlmeext->max_chan_nums; i++ )
+	{
+		p2pie[ p2pielen++ ] = pmlmeext->channel_set[ i ].ChannelNum;
+	}
+	
+	//	Device Info
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO;
+
+	//	Length:
+	//	21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) 
+	//	+ NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes)
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len );
+	p2pielen += 2;
+
+	//	Value:
+	//	P2P Device Address
+	_rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN );
+	p2pielen += ETH_ALEN;
+
+	//	Config Method
+	//	This field should be big endian. Noted by P2P specification.
+
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->supported_wps_cm );
+
+	p2pielen += 2;
+
+	//	Primary Device Type
+	//	Category ID
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_RTK_WIDI );
+	p2pielen += 2;
+
+	//	OUI
+	*(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI );
+	p2pielen += 4;
+
+	//	Sub Category ID
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_RTK_DMP );
+	p2pielen += 2;
+
+	//	Number of Secondary Device Types
+	p2pie[ p2pielen++ ] = 0x00;	//	No Secondary Device Type List
+
+	//	Device Name
+	//	Type:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME );
+	p2pielen += 2;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len );
+	p2pielen += 2;
+
+	//	Value:
+	_rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name , pwdinfo->device_name_len );
+	p2pielen += pwdinfo->device_name_len;	
+	
+	if ( pwdinfo->role == P2P_ROLE_GO )
+	{
+		//	Group ID Attribute
+		//	Type:
+		p2pie[ p2pielen++ ] = P2P_ATTR_GROUP_ID;
+
+		//	Length:
+		*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN + pwdinfo->nego_ssidlen );
+		p2pielen += 2;
+
+		//	Value:
+		//	p2P Device Address
+		_rtw_memcpy( p2pie + p2pielen , pwdinfo->device_addr, ETH_ALEN );
+		p2pielen += ETH_ALEN;
+
+		//	SSID
+		_rtw_memcpy( p2pie + p2pielen, pwdinfo->nego_ssid, pwdinfo->nego_ssidlen );
+		p2pielen += pwdinfo->nego_ssidlen;
+		
+	}
+	
+	pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen );	
+
+#ifdef CONFIG_WFD
+	wfdielen = build_nego_resp_wfd_ie(pwdinfo, pframe);
+	pframe += wfdielen;
+	pattrib->pktlen += wfdielen;
+#endif //CONFIG_WFD	
+
+	pattrib->last_txcmdsz = pattrib->pktlen;
+
+	dump_mgntframe(padapter, pmgntframe);
+
+	return;
+
+}
+
+void issue_p2p_GO_confirm(_adapter *padapter, u8* raddr, u8 result)
+{
+
+	unsigned char category = WLAN_CATEGORY_PUBLIC;
+	u8			action = P2P_PUB_ACTION_ACTION;
+	u32			p2poui = cpu_to_be32(P2POUI);
+	u8			oui_subtype = P2P_GO_NEGO_CONF;
+	u8			wpsie[ 255 ] = { 0x00 }, p2pie[ 255 ] = { 0x00 };
+	u8			wpsielen = 0, p2pielen = 0;
+#ifdef CONFIG_WFD
+	u32					wfdielen = 0;
+#endif //CONFIG_WFD			
+	
+	struct xmit_frame			*pmgntframe;
+	struct pkt_attrib			*pattrib;
+	unsigned char					*pframe;
+	struct ieee80211_hdr	*pwlanhdr;
+	unsigned short				*fctrl;
+	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct wifidirect_info	*pwdinfo = &( padapter->wdinfo);
+
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+
+	DBG_8192C( "[%s] In\n", __FUNCTION__ );
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(padapter, pattrib);
+
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+
+	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+
+	_rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+	pmlmeext->mgnt_seq++;
+	SetFrameSubType(pframe, WIFI_ACTION);
+
+	pframe += sizeof(struct ieee80211_hdr_3addr);
+	pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr);
+
+	pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen));	
+	pframe = rtw_set_fixed_ie(pframe, 1, &(pwdinfo->negotiation_dialog_token), &(pattrib->pktlen));
+
+	
+
+	//	P2P IE Section.
+
+	//	P2P OUI
+	p2pielen = 0;
+	p2pie[ p2pielen++ ] = 0x50;
+	p2pie[ p2pielen++ ] = 0x6F;
+	p2pie[ p2pielen++ ] = 0x9A;
+	p2pie[ p2pielen++ ] = 0x09;	//	WFA P2P v1.0
+
+	//	Commented by Albert 20110306
+	//	According to the P2P Specification, the group negoitation request frame should contain 5 P2P attributes
+	//	1. Status
+	//	2. P2P Capability
+	//	3. Operating Channel
+	//	4. Channel List
+	//	5. Group ID	( if this WiFi is GO )
+
+	//	P2P Status
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_STATUS;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 );
+	p2pielen += 2;
+
+	//	Value:
+	p2pie[ p2pielen++ ] = result;
+
+	//	P2P Capability
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 );
+	p2pielen += 2;
+
+	//	Value:
+	//	Device Capability Bitmap, 1 byte
+	//	Be able to participate in additional P2P Groups and
+	//	support the P2P Invitation Procedure
+	p2pie[ p2pielen++ ] = P2P_DEVCAP_INVITATION_PROC;
+	
+	//	Group Capability Bitmap, 1 byte
+	p2pie[ p2pielen++ ] = 0x00;
+
+
+	//	Operating Channel
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_OPERATING_CH;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 );
+	p2pielen += 2;
+
+	//	Value:
+	//	Country String
+	p2pie[ p2pielen++ ] = 'U';
+	p2pie[ p2pielen++ ] = 'S';
+	
+	//	The third byte should be set to 0x04.
+	//	Described in the "Operating Channel Attribute" section.
+	p2pie[ p2pielen++ ] = 0x04;
+
+	//	Operating Class
+	p2pie[ p2pielen++ ] = 0x51;	//	Copy from SD7
+
+	if ( pwdinfo->role == P2P_ROLE_CLIENT )
+	{
+		p2pie[ p2pielen++ ] = pwdinfo->peer_operating_ch;
+	}
+	else
+	{
+		//	Channel Number
+		p2pie[ p2pielen++ ] = pwdinfo->operating_channel;		//	Use the listen channel as the operating channel
+	}
+
+
+	//	Channel List
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_CH_LIST;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 5 + pwdinfo->channel_cnt );
+	p2pielen += 2;
+
+	//	Value:
+	//	Country String
+	p2pie[ p2pielen++ ] = 'U';
+	p2pie[ p2pielen++ ] = 'S';
+	
+	//	The third byte should be set to 0x04.
+	//	Described in the "Operating Channel Attribute" section.
+	p2pie[ p2pielen++ ] = 0x04;
+
+	//	Channel Entry List
+	//	Operating Class
+	p2pie[ p2pielen++ ] = 0x51;	//	Copy from SD7
+
+	//	Number of Channels
+	p2pie[ p2pielen++ ] = pwdinfo->channel_cnt;
+
+	//	Channel List
+	_rtw_memcpy( p2pie + p2pielen, pwdinfo->channel_list, pwdinfo->channel_cnt );
+	p2pielen += pwdinfo->channel_cnt;
+
+	if ( pwdinfo->role == P2P_ROLE_GO )
+	{
+		//	Group ID Attribute
+		//	Type:
+		p2pie[ p2pielen++ ] = P2P_ATTR_GROUP_ID;
+
+		//	Length:
+		*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN + pwdinfo->nego_ssidlen );
+		p2pielen += 2;
+
+		//	Value:
+		//	p2P Device Address
+		_rtw_memcpy( p2pie + p2pielen , pwdinfo->device_addr, ETH_ALEN );
+		p2pielen += ETH_ALEN;
+
+		//	SSID
+		_rtw_memcpy( p2pie + p2pielen, pwdinfo->nego_ssid, pwdinfo->nego_ssidlen );
+		p2pielen += pwdinfo->nego_ssidlen;
+	}
+	
+	pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen );
+
+#ifdef CONFIG_WFD
+	wfdielen = build_nego_confirm_wfd_ie(pwdinfo, pframe);
+	pframe += wfdielen;
+	pattrib->pktlen += wfdielen;
+#endif //CONFIG_WFD	
+
+	pattrib->last_txcmdsz = pattrib->pktlen;
+
+	dump_mgntframe(padapter, pmgntframe);
+
+	return;
+
+}
+
+void issue_p2p_invitation_request(_adapter *padapter, u8* raddr )
+{
+
+	unsigned char category = WLAN_CATEGORY_PUBLIC;
+	u8			action = P2P_PUB_ACTION_ACTION;
+	u32			p2poui = cpu_to_be32(P2POUI);
+	u8			oui_subtype = P2P_INVIT_REQ;
+	u8			p2pie[ 255 ] = { 0x00 };
+	u8			p2pielen = 0;
+	u8			dialogToken = 3;
+	
+	struct xmit_frame			*pmgntframe;
+	struct pkt_attrib			*pattrib;
+	unsigned char					*pframe;
+	struct ieee80211_hdr	*pwlanhdr;
+	unsigned short				*fctrl;
+	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct wifidirect_info	*pwdinfo = &( padapter->wdinfo);
+
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(padapter, pattrib);
+
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+
+	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+
+	_rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, raddr,  ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+	pmlmeext->mgnt_seq++;
+	SetFrameSubType(pframe, WIFI_ACTION);
+
+	pframe += sizeof(struct ieee80211_hdr_3addr);
+	pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr);
+
+	pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen));	
+	pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen));
+
+	//	P2P IE Section.
+
+	//	P2P OUI
+	p2pielen = 0;
+	p2pie[ p2pielen++ ] = 0x50;
+	p2pie[ p2pielen++ ] = 0x6F;
+	p2pie[ p2pielen++ ] = 0x9A;
+	p2pie[ p2pielen++ ] = 0x09;	//	WFA P2P v1.0
+
+	//	Commented by Albert 20101011
+	//	According to the P2P Specification, the P2P Invitation request frame should contain 7 P2P attributes
+	//	1. Configuration Timeout
+	//	2. Invitation Flags
+	//	3. Operating Channel	( Only GO )
+	//	4. P2P Group BSSID	( Only GO )
+	//	5. Channel List
+	//	6. P2P Group ID
+	//	7. P2P Device Info
+
+	//	Configuration Timeout
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_CONF_TIMEOUT;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 );
+	p2pielen += 2;
+
+	//	Value:
+	p2pie[ p2pielen++ ] = 200;	//	2 seconds needed to be the P2P GO
+	p2pie[ p2pielen++ ] = 200;	//	2 seconds needed to be the P2P Client
+
+	//	Invitation Flags
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_INVITATION_FLAGS;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 );
+	p2pielen += 2;
+
+	//	Value:
+	p2pie[ p2pielen++ ] = P2P_INVITATION_FLAGS_PERSISTENT;
+
+
+	//	Channel List
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_CH_LIST;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0010 );
+	p2pielen += 2;
+
+	//	Value:
+	//	Country String
+	p2pie[ p2pielen++ ] = 'U';
+	p2pie[ p2pielen++ ] = 'S';
+	
+	//	The third byte should be set to 0x04.
+	//	Described in the "Operating Channel Attribute" section.
+	p2pie[ p2pielen++ ] = 0x04;
+
+	//	Channel Entry List
+	//	Operating Class
+	p2pie[ p2pielen++ ] = 0x51;	//	Copy from SD7
+
+	//	Number of Channels
+	p2pie[ p2pielen++ ] = 0x0B;	//	support channel 1 - 11
+
+	//	Channel List
+	p2pie[ p2pielen++ ] = 0x01;
+	p2pie[ p2pielen++ ] = 0x02;
+	p2pie[ p2pielen++ ] = 0x03;
+	p2pie[ p2pielen++ ] = 0x04;
+	p2pie[ p2pielen++ ] = 0x05;
+	p2pie[ p2pielen++ ] = 0x06;
+	p2pie[ p2pielen++ ] = 0x07;
+	p2pie[ p2pielen++ ] = 0x08;
+	p2pie[ p2pielen++ ] = 0x09;
+	p2pie[ p2pielen++ ] = 0x0A;
+	p2pie[ p2pielen++ ] = 0x0B;	
+
+	//	P2P Group ID
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_GROUP_ID;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 6 + pwdinfo->invitereq_info.ssidlen );
+	p2pielen += 2;
+
+	//	Value:
+	//	P2P Device Address for GO
+	_rtw_memcpy( p2pie + p2pielen, raddr, ETH_ALEN );
+	p2pielen += ETH_ALEN;
+
+	//	SSID
+	_rtw_memcpy( p2pie + p2pielen, pwdinfo->invitereq_info.ssid, pwdinfo->invitereq_info.ssidlen );
+	p2pielen += pwdinfo->invitereq_info.ssidlen;
+	
+
+	//	Device Info
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO;
+
+	//	Length:
+	//	21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) 
+	//	+ NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes)
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len );
+	p2pielen += 2;
+	
+	//	Value:
+	//	P2P Device Address
+	_rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN );
+	p2pielen += ETH_ALEN;
+
+	//	Config Method
+	//	This field should be big endian. Noted by P2P specification.
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_CONFIG_METHOD_DISPLAY );
+	p2pielen += 2;
+
+	//	Primary Device Type
+	//	Category ID
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_RTK_WIDI );
+	p2pielen += 2;
+
+	//	OUI
+	*(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI );
+	p2pielen += 4;
+
+	//	Sub Category ID
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_RTK_DMP );
+	p2pielen += 2;
+
+	//	Number of Secondary Device Types
+	p2pie[ p2pielen++ ] = 0x00;	//	No Secondary Device Type List
+
+	//	Device Name
+	//	Type:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME );
+	p2pielen += 2;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len );
+	p2pielen += 2;
+
+	//	Value:
+	_rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name, pwdinfo->device_name_len );
+	p2pielen += pwdinfo->device_name_len;
+		
+	pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen );	
+	
+
+	pattrib->last_txcmdsz = pattrib->pktlen;
+
+	dump_mgntframe(padapter, pmgntframe);
+
+	return;
+
+}
+
+void issue_p2p_invitation_response(_adapter *padapter, u8* raddr, u8 dialogToken, u8 success)
+{
+
+	unsigned char category = WLAN_CATEGORY_PUBLIC;
+	u8			action = P2P_PUB_ACTION_ACTION;
+	u32			p2poui = cpu_to_be32(P2POUI);
+	u8			oui_subtype = P2P_INVIT_RESP;
+	u8			p2pie[ 255 ] = { 0x00 };
+	u8			p2pielen = 0;
+	
+	struct xmit_frame			*pmgntframe;
+	struct pkt_attrib			*pattrib;
+	unsigned char					*pframe;
+	struct ieee80211_hdr	*pwlanhdr;
+	unsigned short				*fctrl;
+	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct wifidirect_info	*pwdinfo = &( padapter->wdinfo);
+
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(padapter, pattrib);
+
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+
+	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+
+	_rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, raddr,  ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+	pmlmeext->mgnt_seq++;
+	SetFrameSubType(pframe, WIFI_ACTION);
+
+	pframe += sizeof(struct ieee80211_hdr_3addr);
+	pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr);
+
+	pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen));	
+	pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen));
+
+	//	P2P IE Section.
+
+	//	P2P OUI
+	p2pielen = 0;
+	p2pie[ p2pielen++ ] = 0x50;
+	p2pie[ p2pielen++ ] = 0x6F;
+	p2pie[ p2pielen++ ] = 0x9A;
+	p2pie[ p2pielen++ ] = 0x09;	//	WFA P2P v1.0
+
+	//	Commented by Albert 20101005
+	//	According to the P2P Specification, the P2P Invitation response frame should contain 5 P2P attributes
+	//	1. Status
+	//	2. Configuration Timeout
+	//	3. Operating Channel	( Only GO )
+	//	4. P2P Group BSSID	( Only GO )
+	//	5. Channel List
+
+	//	P2P Status
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_STATUS;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 );
+	p2pielen += 2;
+
+	//	Value:
+	if ( success )
+	{
+		p2pie[ p2pielen++ ] = P2P_STATUS_SUCCESS;
+	}
+	else
+	{
+		//	Sent the event receiving the P2P Invitation Req frame to DMP UI.
+		//	DMP had to compare the MAC address to find out the profile.
+		//	So, the WiFi driver will send the P2P_STATUS_FAIL_INFO_UNAVAILABLE to NB.
+		//	If the UI found the corresponding profile, the WiFi driver sends the P2P Invitation Req
+		//	to NB to rebuild the persistent group.
+		p2pie[ p2pielen++ ] = P2P_STATUS_FAIL_INFO_UNAVAILABLE;
+	}
+	
+	//	Configuration Timeout
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_CONF_TIMEOUT;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 );
+	p2pielen += 2;
+
+	//	Value:
+	p2pie[ p2pielen++ ] = 200;	//	2 seconds needed to be the P2P GO
+	p2pie[ p2pielen++ ] = 200;	//	2 seconds needed to be the P2P Client
+
+
+	if ( success )
+	{
+		//	Channel List
+		//	Type:
+		p2pie[ p2pielen++ ] = P2P_ATTR_CH_LIST;
+
+		//	Length:
+		*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0010 );
+		p2pielen += 2;
+
+		//	Value:
+		//	Country String
+		p2pie[ p2pielen++ ] = 'U';
+		p2pie[ p2pielen++ ] = 'S';
+	
+		//	The third byte should be set to 0x04.
+		//	Described in the "Operating Channel Attribute" section.
+		p2pie[ p2pielen++ ] = 0x04;
+
+		//	Channel Entry List
+		//	Operating Class
+		p2pie[ p2pielen++ ] = 0x51;	//	Copy from SD7
+
+		//	Number of Channels
+		p2pie[ p2pielen++ ] = 0x0B;	//	support channel 1 - 11
+
+		//	Channel List
+		p2pie[ p2pielen++ ] = 0x01;
+		p2pie[ p2pielen++ ] = 0x02;
+		p2pie[ p2pielen++ ] = 0x03;
+		p2pie[ p2pielen++ ] = 0x04;
+		p2pie[ p2pielen++ ] = 0x05;
+		p2pie[ p2pielen++ ] = 0x06;
+		p2pie[ p2pielen++ ] = 0x07;
+		p2pie[ p2pielen++ ] = 0x08;
+		p2pie[ p2pielen++ ] = 0x09;
+		p2pie[ p2pielen++ ] = 0x0A;
+		p2pie[ p2pielen++ ] = 0x0B;	
+	}
+		
+	pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen );	
+	
+
+	pattrib->last_txcmdsz = pattrib->pktlen;
+
+	dump_mgntframe(padapter, pmgntframe);
+
+	return;
+
+}
+
+void issue_p2p_provision_request(_adapter *padapter, u8* pinterface_raddr, u8* pssid, u8 ussidlen, u8* pdev_raddr )
+{
+	unsigned char category = WLAN_CATEGORY_PUBLIC;
+	u8			action = P2P_PUB_ACTION_ACTION;
+	u8			dialogToken = 1;
+	u32			p2poui = cpu_to_be32(P2POUI);
+	u8			oui_subtype = P2P_PROVISION_DISC_REQ;
+	u8			wpsie[ 100 ] = { 0x00 };
+	u8			wpsielen = 0;
+	u32			p2pielen = 0;
+#ifdef CONFIG_WFD
+	u32					wfdielen = 0;
+#endif //CONFIG_WFD		
+	
+	struct xmit_frame			*pmgntframe;
+	struct pkt_attrib			*pattrib;
+	unsigned char					*pframe;
+	struct ieee80211_hdr	*pwlanhdr;
+	unsigned short				*fctrl;
+	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
+
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+
+	DBG_8192C( "[%s] In\n", __FUNCTION__ );
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(padapter, pattrib);
+
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+
+	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+
+	_rtw_memcpy(pwlanhdr->addr1, pinterface_raddr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+	pmlmeext->mgnt_seq++;
+	SetFrameSubType(pframe, WIFI_ACTION);
+
+	pframe += sizeof(struct ieee80211_hdr_3addr);
+	pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr);
+
+	pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen));	
+	pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen));		
+
+	p2pielen = build_prov_disc_request_p2p_ie( pwdinfo, pframe, pssid, ussidlen, pdev_raddr );
+
+	pframe += p2pielen;
+	pattrib->pktlen += p2pielen;
+
+	wpsielen = 0;
+	//	WPS OUI
+	*(u32*) ( wpsie ) = cpu_to_be32( WPSOUI );
+	wpsielen += 4;
+
+	//	WPS version
+	//	Type:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 );
+	wpsielen += 2;
+
+	//	Length:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 );
+	wpsielen += 2;
+
+	//	Value:
+	wpsie[wpsielen++] = WPS_VERSION_1;	//	Version 1.0
+
+	//	Config Method
+	//	Type:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD );
+	wpsielen += 2;
+
+	//	Length:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 );
+	wpsielen += 2;
+
+	//	Value:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->tx_prov_disc_info.wps_config_method_request );
+	wpsielen += 2;
+
+	pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen );
+
+
+#ifdef CONFIG_WFD
+	wfdielen = build_provdisc_req_wfd_ie(pwdinfo, pframe);
+	pframe += wfdielen;
+	pattrib->pktlen += wfdielen;
+#endif //CONFIG_WFD
+
+	pattrib->last_txcmdsz = pattrib->pktlen;
+
+	dump_mgntframe(padapter, pmgntframe);
+
+	return;
+
+}
+
+u8 is_matched_in_profilelist( u8* peermacaddr, struct profile_info* profileinfo )
+{
+	u8 i, match_result = 0;
+
+	DBG_8192C( "[%s] peermac = %.2X %.2X %.2X %.2X %.2X %.2X\n", __FUNCTION__,
+	  	    peermacaddr[0], peermacaddr[1],peermacaddr[2],peermacaddr[3],peermacaddr[4],peermacaddr[5]);
+	
+	for( i = 0; i < P2P_MAX_PERSISTENT_GROUP_NUM; i++, profileinfo++ )
+	{
+	       DBG_8192C( "[%s] profileinfo_mac = %.2X %.2X %.2X %.2X %.2X %.2X\n", __FUNCTION__,
+		   	    profileinfo->peermac[0], profileinfo->peermac[1],profileinfo->peermac[2],profileinfo->peermac[3],profileinfo->peermac[4],profileinfo->peermac[5]);		   
+		if ( _rtw_memcmp( peermacaddr, profileinfo->peermac, ETH_ALEN ) )
+		{
+			match_result = 1;
+			DBG_8192C( "[%s] Match!\n", __FUNCTION__ );
+			break;
+		}
+	}
+	
+	return (match_result );
+}
+
+void issue_probersp_p2p(_adapter *padapter, unsigned char *da)
+{
+	struct xmit_frame			*pmgntframe;
+	struct pkt_attrib			*pattrib;
+	unsigned char					*pframe;
+	struct ieee80211_hdr	*pwlanhdr;
+	unsigned short				*fctrl;	
+	unsigned char					*mac;
+	struct xmit_priv	*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	//WLAN_BSSID_EX 		*cur_network = &(pmlmeinfo->network);
+	u16					beacon_interval = 100;
+	u16					capInfo = 0;
+	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
+	u8					wpsie[255] = { 0x00 };
+	u32					wpsielen = 0, p2pielen = 0;
+#ifdef CONFIG_WFD
+	u32					wfdielen = 0;
+#endif //CONFIG_WFD
+	
+	
+	DBG_871X("%s\n", __FUNCTION__);
+	
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+	
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(padapter, pattrib);	
+	
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+		
+	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct ieee80211_hdr *)pframe;	
+	
+	mac = myid(&(padapter->eeprompriv));
+	
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+	_rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN);
+	
+	//	Use the device address for BSSID field.	
+	_rtw_memcpy(pwlanhdr->addr3, mac, ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+	pmlmeext->mgnt_seq++;
+	SetFrameSubType(fctrl, WIFI_PROBERSP);
+	
+	pattrib->hdrlen = sizeof(struct ieee80211_hdr_3addr);
+	pattrib->pktlen = pattrib->hdrlen;
+	pframe += pattrib->hdrlen;
+
+	//timestamp will be inserted by hardware
+	pframe += 8;
+	pattrib->pktlen += 8;
+
+	// beacon interval: 2 bytes
+	_rtw_memcpy(pframe, (unsigned char *) &beacon_interval, 2); 
+	pframe += 2;
+	pattrib->pktlen += 2;
+
+	//	capability info: 2 bytes
+	//	ESS and IBSS bits must be 0 (defined in the 3.1.2.1.1 of WiFi Direct Spec)
+	capInfo |= cap_ShortPremble;
+	capInfo |= cap_ShortSlot;
+	
+	_rtw_memcpy(pframe, (unsigned char *) &capInfo, 2);
+	pframe += 2;
+	pattrib->pktlen += 2;
+
+
+	// SSID
+	pframe = rtw_set_ie(pframe, _SSID_IE_, 7, pwdinfo->p2p_wildcard_ssid, &pattrib->pktlen);
+
+	// supported rates...
+	//	Use the OFDM rate in the P2P probe response frame. ( 6(B), 9(B), 12, 18, 24, 36, 48, 54 )
+	pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, 8, pwdinfo->support_rate, &pattrib->pktlen);
+
+	// DS parameter set
+	pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&pwdinfo->listen_channel, &pattrib->pktlen);
+
+	//	Todo: WPS IE
+	//	Noted by Albert 20100907
+	//	According to the WPS specification, all the WPS attribute is presented by Big Endian.
+
+	wpsielen = 0;
+	//	WPS OUI
+	*(u32*) ( wpsie ) = cpu_to_be32( WPSOUI );
+	wpsielen += 4;
+
+	//	WPS version
+	//	Type:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 );
+	wpsielen += 2;
+
+	//	Length:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 );
+	wpsielen += 2;
+
+	//	Value:
+	wpsie[wpsielen++] = WPS_VERSION_1;	//	Version 1.0
+
+	//	WiFi Simple Config State
+	//	Type:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_SIMPLE_CONF_STATE );
+	wpsielen += 2;
+
+	//	Length:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 );
+	wpsielen += 2;
+
+	//	Value:
+	wpsie[wpsielen++] = WPS_WSC_STATE_NOT_CONFIG;	//	Not Configured.
+
+	//	Response Type
+	//	Type:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_RESP_TYPE );
+	wpsielen += 2;
+
+	//	Length:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 );
+	wpsielen += 2;
+
+	//	Value:
+	wpsie[wpsielen++] = WPS_RESPONSE_TYPE_8021X;
+
+	//	UUID-E
+	//	Type:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_UUID_E );
+	wpsielen += 2;
+
+	//	Length:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0010 );
+	wpsielen += 2;
+
+	//	Value:
+	_rtw_memcpy( wpsie + wpsielen, myid( &padapter->eeprompriv ), ETH_ALEN );
+	wpsielen += 0x10;
+
+	//	Manufacturer
+	//	Type:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_MANUFACTURER );
+	wpsielen += 2;
+
+	//	Length:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0007 );
+	wpsielen += 2;
+
+	//	Value:
+	_rtw_memcpy( wpsie + wpsielen, "Realtek", 7 );
+	wpsielen += 7;
+
+	//	Model Name
+	//	Type:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_MODEL_NAME );
+	wpsielen += 2;
+
+	//	Length:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0006 );
+	wpsielen += 2;	
+
+	//	Value:
+	_rtw_memcpy( wpsie + wpsielen, "8192CU", 6 );
+	wpsielen += 6;
+
+	//	Model Number
+	//	Type:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_MODEL_NUMBER );
+	wpsielen += 2;
+
+	//	Length:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 );
+	wpsielen += 2;
+
+	//	Value:
+	wpsie[ wpsielen++ ] = 0x31;		//	character 1
+
+	//	Serial Number
+	//	Type:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_SERIAL_NUMBER );
+	wpsielen += 2;
+
+	//	Length:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( ETH_ALEN );
+	wpsielen += 2;
+
+	//	Value:
+	_rtw_memcpy( wpsie + wpsielen, "123456" , ETH_ALEN );
+	wpsielen += ETH_ALEN;
+
+	//	Primary Device Type
+	//	Type:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_PRIMARY_DEV_TYPE );
+	wpsielen += 2;
+
+	//	Length:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0008 );
+	wpsielen += 2;
+
+	//	Value:
+	//	Category ID
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_PDT_CID_RTK_WIDI );
+	wpsielen += 2;
+
+	//	OUI
+	*(u32*) ( wpsie + wpsielen ) = cpu_to_be32( WPSOUI );
+	wpsielen += 4;
+
+	//	Sub Category ID
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_PDT_SCID_RTK_DMP );
+	wpsielen += 2;
+
+	//	Device Name
+	//	Type:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME );
+	wpsielen += 2;
+
+	//	Length:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->device_name_len );
+	wpsielen += 2;
+
+	//	Value:
+	_rtw_memcpy( wpsie + wpsielen, pwdinfo->device_name, pwdinfo->device_name_len );
+	wpsielen += pwdinfo->device_name_len;
+
+	//	Config Method
+	//	Type:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD );
+	wpsielen += 2;
+
+	//	Length:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 );
+	wpsielen += 2;
+
+	//	Value:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->supported_wps_cm );
+	wpsielen += 2;
+	
+
+	pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen );
+	
+
+	p2pielen = build_probe_resp_p2p_ie(pwdinfo, pframe);
+	pframe += p2pielen;
+	pattrib->pktlen += p2pielen;
+
+#ifdef CONFIG_WFD
+	wfdielen = build_probe_resp_wfd_ie(pwdinfo, pframe);
+	pframe += wfdielen;
+	pattrib->pktlen += wfdielen;
+#endif //CONFIG_WFD
+
+	pattrib->last_txcmdsz = pattrib->pktlen;
+	
+
+	dump_mgntframe(padapter, pmgntframe);
+	
+	return;
+
+}
+
+void issue_probereq_p2p(_adapter *padapter)
+{
+	struct xmit_frame		*pmgntframe;
+	struct pkt_attrib		*pattrib;
+	unsigned char			*pframe;
+	struct ieee80211_hdr	*pwlanhdr;
+	unsigned short		*fctrl;
+	unsigned char			*mac;
+	unsigned char			bssrate[NumRates];
+	struct xmit_priv		*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	int	bssrate_len = 0;
+	u8	bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);	
+	u8					wpsie[255] = { 0x00 }, p2pie[ 255 ] = { 0x00 };
+	u16					wpsielen = 0, p2pielen = 0;
+#ifdef CONFIG_WFD
+	u32					wfdielen = 0;
+#endif //CONFIG_WFD
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(padapter, pattrib);
+
+
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+
+	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	mac = myid(&(padapter->eeprompriv));
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+
+	//	broadcast probe request frame
+	_rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, bc_addr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+	pmlmeext->mgnt_seq++;
+	SetFrameSubType(pframe, WIFI_PROBEREQ);
+
+	pframe += sizeof (struct ieee80211_hdr_3addr);
+	pattrib->pktlen = sizeof (struct ieee80211_hdr_3addr);
+
+	if ( P2P_STATE_TX_PROVISION_DIS_REQ == pwdinfo->p2p_state )
+	{
+		pframe = rtw_set_ie(pframe, _SSID_IE_, pwdinfo->tx_prov_disc_info.ssid.SsidLength, pwdinfo->tx_prov_disc_info.ssid.Ssid, &(pattrib->pktlen));
+	}
+	else
+	{
+		pframe = rtw_set_ie(pframe, _SSID_IE_, P2P_WILDCARD_SSID_LEN, pwdinfo->p2p_wildcard_ssid, &(pattrib->pktlen));
+	}	
+	//	Use the OFDM rate in the P2P probe request frame. ( 6(B), 9(B), 12(B), 24(B), 36, 48, 54 )
+	pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, 8, pwdinfo->support_rate, &pattrib->pktlen);
+
+	//	WPS IE
+	//	Noted by Albert 20110221
+	//	According to the WPS specification, all the WPS attribute is presented by Big Endian.
+
+	wpsielen = 0;
+	//	WPS OUI
+	*(u32*) ( wpsie ) = cpu_to_be32( WPSOUI );
+	wpsielen += 4;
+
+	//	WPS version
+	//	Type:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 );
+	wpsielen += 2;
+
+	//	Length:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 );
+	wpsielen += 2;
+
+	//	Value:
+	wpsie[wpsielen++] = WPS_VERSION_1;	//	Version 1.0
+
+	//	Device Name
+	//	Type:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME );
+	wpsielen += 2;
+
+	//	Length:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->device_name_len );
+	wpsielen += 2;
+
+	//	Value:
+	_rtw_memcpy( wpsie + wpsielen, pwdinfo->device_name, pwdinfo->device_name_len );
+	wpsielen += pwdinfo->device_name_len;
+
+	//	Primary Device Type
+	//	Type:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_PRIMARY_DEV_TYPE );
+	wpsielen += 2;
+
+	//	Length:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0008 );
+	wpsielen += 2;
+
+	//	Value:
+	//	Category ID
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_PDT_CID_RTK_WIDI );
+	wpsielen += 2;
+
+	//	OUI
+	*(u32*) ( wpsie + wpsielen ) = cpu_to_be32( WPSOUI );
+	wpsielen += 4;
+
+	//	Sub Category ID
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_PDT_SCID_RTK_DMP );
+	wpsielen += 2;	
+
+	pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen );
+	
+	//	P2P OUI
+	p2pielen = 0;
+	p2pie[ p2pielen++ ] = 0x50;
+	p2pie[ p2pielen++ ] = 0x6F;
+	p2pie[ p2pielen++ ] = 0x9A;
+	p2pie[ p2pielen++ ] = 0x09;	//	WFA P2P v1.0
+
+	//	Commented by Albert 20110221
+	//	According to the P2P Specification, the probe request frame should contain 5 P2P attributes
+	//	1. P2P Capability
+	//	2. P2P Device ID if this probe request wants to find the specific P2P device
+	//	3. Listen Channel
+	//	4. Extended Listen Timing
+	//	5. Operating Channel if this WiFi is working as the group owner now
+
+	//	P2P Capability
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 );
+	p2pielen += 2;
+
+	//	Value:
+	//	Device Capability Bitmap, 1 byte
+	//	Be able to participate in additional P2P Groups and
+	//	support the P2P Invitation Procedure
+	p2pie[ p2pielen++ ] = P2P_DEVCAP_INVITATION_PROC;
+	
+	//	Group Capability Bitmap, 1 byte
+	p2pie[ p2pielen++ ] = 0x00;
+
+	//	Listen Channel
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_LISTEN_CH;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 );
+	p2pielen += 2;
+
+	//	Value:
+	//	Country String
+	p2pie[ p2pielen++ ] = 'U';
+	p2pie[ p2pielen++ ] = 'S';
+	
+	//	The third byte should be set to 0x04.
+	//	Described in the "Operating Channel Attribute" section.
+	p2pie[ p2pielen++ ] = 0x04;
+
+	//	Operating Class
+	p2pie[ p2pielen++ ] = 0x51;	//	Copy from SD7
+	
+	//	Channel Number
+	p2pie[ p2pielen++ ] = pwdinfo->listen_channel;	//	listen channel
+	
+
+	//	Extended Listen Timing
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_EX_LISTEN_TIMING;
+
+	//	Length:
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0004 );
+	p2pielen += 2;
+
+	//	Value:
+	//	Availability Period
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF );
+	p2pielen += 2;
+
+	//	Availability Interval
+	*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF );
+	p2pielen += 2;
+
+	if ( pwdinfo->role == P2P_ROLE_GO )
+	{
+		//	Operating Channel (if this WiFi is working as the group owner now)
+		//	Type:
+		p2pie[ p2pielen++ ] = P2P_ATTR_OPERATING_CH;
+
+		//	Length:
+		*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 );
+		p2pielen += 2;
+
+		//	Value:
+		//	Country String
+		p2pie[ p2pielen++ ] = 'U';
+		p2pie[ p2pielen++ ] = 'S';
+	
+		//	The third byte should be set to 0x04.
+		//	Described in the "Operating Channel Attribute" section.
+		p2pie[ p2pielen++ ] = 0x04;
+
+		//	Operating Class
+		p2pie[ p2pielen++ ] = 0x51;	//	Copy from SD7
+	
+		//	Channel Number
+		p2pie[ p2pielen++ ] = pwdinfo->operating_channel;	//	operating channel number
+		
+	}
+	
+	pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen );
+
+#ifdef CONFIG_WFD
+	wfdielen = build_probe_req_wfd_ie(pwdinfo, pframe);
+	pframe += wfdielen;
+	pattrib->pktlen += wfdielen;
+#endif //CONFIG_WFD	
+
+	pattrib->last_txcmdsz = pattrib->pktlen;
+
+	RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("issuing probe_req, tx_len=%d\n", pattrib->last_txcmdsz));
+
+	dump_mgntframe(padapter, pmgntframe);
+
+	return;
+}
+
+#endif //CONFIG_P2P
+
+unsigned int OnAction_public(_adapter *padapter, union recv_frame *precv_frame)
+{
+	unsigned char		*frame_body;
+	unsigned char		category, action;
+	u8 *pframe = precv_frame->u.hdr.rx_data;
+	uint len = precv_frame->u.hdr.len;
+#ifdef CONFIG_P2P
+	u8	p2p_ie[ 255 ];
+	u32	p2p_ielen, wps_ielen;
+	struct	wifidirect_info	*pwdinfo = &( padapter->wdinfo );
+	u8	result = P2P_STATUS_SUCCESS;	
+#endif //CONFIG_P2P
+
+	//check RA matches or not
+	if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), GetAddr1Ptr(pframe), ETH_ALEN))//for if1, sta/ap mode
+		return _SUCCESS;
+
+	frame_body = (unsigned char *)(pframe + sizeof(struct ieee80211_hdr_3addr));
+
+	category = frame_body[0];
+	if(category != WLAN_CATEGORY_PUBLIC)
+		return _SUCCESS;
+
+	action = frame_body[ 1 ];
+	if ( action == ACT_PUBLIC_P2P )	//	IEEE 802.11 P2P Public Action usage.
+	{		
+#ifdef CONFIG_P2P
+		//	Do nothing if the driver doesn't enable the P2P function.
+		if ( ( pwdinfo->p2p_state == P2P_STATE_NONE ) || ( pwdinfo->p2p_state == P2P_STATE_IDLE ) )
+			return _SUCCESS;
+
+		//	Commented by Albert 20100908
+		//	Low byte -> High byte is 0x50, 0x6F, 0x9A, 0x09 for P2P OUI.
+		//	But the P2POUT is defined as 0x506F9A09 -> should use the cpu_to_be32
+		if ( cpu_to_be32( *( ( u32* ) ( frame_body + 2 ) ) ) == P2POUI )
+		{
+			_rtw_memset( p2p_ie, 0x00, 255 );
+			p2p_ielen = 0;
+			
+			switch( frame_body[ 6 ] )//OUI Subtype
+			{
+				case P2P_GO_NEGO_REQ:
+				{
+					DBG_8192C( "[%s] Got GO Nego Req Frame\n", __FUNCTION__);
+					_rtw_memset( &pwdinfo->groupid_info, 0x00, sizeof( struct group_id_info ) );
+					
+					if ( pwdinfo->p2p_state == P2P_STATE_GONEGO_FAIL )
+					{
+						//	Commented by Albert 20110526
+						//	In this case, this means the previous nego fail doesn't be reset yet.
+						_cancel_timer_ex( &pwdinfo->restore_p2p_state_timer );
+						//	Restore the previous p2p state
+						pwdinfo->p2p_state = pwdinfo->pre_p2p_state;
+						printk( "[%s] Restore the previous p2p state to %d\n", __FUNCTION__, pwdinfo->p2p_state );						
+					}					
+
+					//20110902 Kurt
+					//Add if statement to avoid receiving duplicate prov disc req. such that pre_p2p_state would be covered.
+					if(pwdinfo->p2p_state != P2P_STATE_GONEGO_ING)										
+						pwdinfo->pre_p2p_state = pwdinfo->p2p_state;
+
+					result = process_p2p_group_negotation_req( pwdinfo, frame_body, len );
+					issue_p2p_GO_response( padapter, GetAddr2Ptr(pframe), frame_body, len, result );
+					//	Commented by Albert 20110718
+					//	No matter negotiating or negotiation failure, the driver should set up the restore P2P state timer.
+					_set_timer( &pwdinfo->restore_p2p_state_timer, 5000 );
+					break;					
+				}
+				case P2P_GO_NEGO_RESP:
+				{
+					DBG_8192C( "[%s] Got GO Nego Resp Frame\n", __FUNCTION__);
+
+					if ( pwdinfo->p2p_state == P2P_STATE_GONEGO_ING )
+					{
+						//	Commented by Albert 20110425
+						//	The restore timer is enabled when issuing the nego request frame of rtw_p2p_connect function.
+						_cancel_timer_ex( &pwdinfo->restore_p2p_state_timer );
+						result = process_p2p_group_negotation_resp( pwdinfo, frame_body, len);
+
+						issue_p2p_GO_confirm( pwdinfo->padapter, GetAddr2Ptr(pframe), result);
+
+						//	Reset the dialog token for group negotiation frames.
+						pwdinfo->negotiation_dialog_token = 1;
+
+						if( pwdinfo->p2p_state == P2P_STATE_GONEGO_FAIL )
+						{
+							_set_timer( &pwdinfo->restore_p2p_state_timer, 5000 );
+						}
+					}
+					else
+					{
+						DBG_8192C( "[%s] Skipped GO Nego Resp Frame (p2p_state != P2P_STATE_GONEGO_ING)\n", __FUNCTION__);
+					}
+					
+					break;
+				}
+				case P2P_GO_NEGO_CONF:
+				{
+					DBG_8192C( "[%s] Got GO Nego Confirm Frame\n", __FUNCTION__);
+					process_p2p_group_negotation_confirm( pwdinfo, frame_body, len);
+					break;
+				}
+				case P2P_INVIT_REQ:
+				{
+					//	Added by Albert 2010/10/05
+					//	Received the P2P Invite Request frame.
+					
+					DBG_8192C( "[%s] Got invite request frame!\n", __FUNCTION__ );
+					if ( rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, p2p_ie, &p2p_ielen ) )
+					{
+						//	Parse the necessary information from the P2P Invitation Request frame.
+						//	For example: The MAC address of sending this P2P Invitation Request frame.
+						u8	groupid[ 38 ] = { 0x00 };
+						u32	attr_contentlen = 0;
+						u8	match_result = 0;						
+
+						rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, groupid, &attr_contentlen);
+						_rtw_memcpy( pwdinfo->p2p_peer_interface_addr, groupid, ETH_ALEN );
+						pwdinfo->p2p_state = P2P_STATE_RECV_INVITE_REQ;
+						DBG_8192C( "[%s] peer address %.2X %.2X %.2X %.2X %.2X %.2X\n", __FUNCTION__,
+								groupid[0], groupid[1], groupid[2], groupid[3], groupid[4], groupid[5] );
+
+						if ( is_matched_in_profilelist( pwdinfo->p2p_peer_interface_addr, &pwdinfo->profileinfo[ 0 ] ) )
+						{
+							match_result = 1;
+						}
+						else
+						{
+							match_result = 0;
+						}
+
+						DBG_8192C( "[%s] match_result = %d\n", __FUNCTION__, match_result );
+						
+						pwdinfo->inviteresp_info.token = frame_body[ 7 ];
+						issue_p2p_invitation_response( padapter, pwdinfo->p2p_peer_interface_addr, pwdinfo->inviteresp_info.token, match_result );
+					}
+
+					break;
+				}
+				case P2P_INVIT_RESP:
+				{
+					u8	attr_content = 0x00;
+					u32	attr_contentlen = 0;
+					
+					DBG_8192C( "[%s] Got invite response frame!\n", __FUNCTION__ );
+					if ( rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, p2p_ie, &p2p_ielen ) )
+					{
+						rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, &attr_content, &attr_contentlen);
+										
+						if ( attr_contentlen == 1 )
+						{
+							DBG_8192C( "[%s] Status = %d\n", __FUNCTION__, attr_content );
+							if ( attr_content == P2P_STATUS_SUCCESS )
+							{
+								pwdinfo->role = P2P_ROLE_CLIENT;
+							}
+							else
+							{
+								pwdinfo->role = P2P_ROLE_DEVICE;
+							}
+						}
+						else
+						{
+								pwdinfo->role = P2P_ROLE_DEVICE;
+						}
+					}
+					break;
+				}
+				case P2P_DEVDISC_REQ:
+
+					process_p2p_devdisc_req(pwdinfo, pframe, len);
+
+					break;
+
+				case P2P_DEVDISC_RESP:
+
+					process_p2p_devdisc_resp(pwdinfo, pframe, len);
+
+					break;
+
+				case P2P_PROVISION_DISC_REQ:
+					DBG_8192C( "[%s] Got Provisioning Discovery Request Frame\n", __FUNCTION__ );
+					process_p2p_provdisc_req(pwdinfo, pframe, len);
+					_rtw_memcpy(pwdinfo->rx_prov_disc_info.peerDevAddr, GetAddr2Ptr(pframe), ETH_ALEN);
+
+					//20110902 Kurt
+					//Add the following statement to avoid receiving duplicate prov disc req. such that pre_p2p_state would be covered.
+					if(pwdinfo->p2p_state != P2P_STATE_RX_PROVISION_DIS_REQ)
+						pwdinfo->pre_p2p_state = pwdinfo->p2p_state;
+					pwdinfo->p2p_state = P2P_STATE_RX_PROVISION_DIS_REQ;
+					_set_timer( &pwdinfo->restore_p2p_state_timer, P2P_PROVISION_TIMEOUT );
+					break;
+
+				case P2P_PROVISION_DISC_RESP:
+					//	Commented by Albert 20110707
+					//	Should we check the pwdinfo->tx_prov_disc_info.bsent flag here??
+					DBG_8192C( "[%s] Got Provisioning Discovery Response Frame\n", __FUNCTION__ );
+					//	Commented by Albert 20110426
+					//	The restore timer is enabled when issuing the provisioing request frame in rtw_p2p_prov_disc function.
+					_cancel_timer_ex( &pwdinfo->restore_p2p_state_timer );
+					pwdinfo->p2p_state = P2P_STATE_RX_PROVISION_DIS_RSP;
+					process_p2p_provdisc_resp(pwdinfo, pframe);
+					_set_timer( &pwdinfo->restore_p2p_state_timer, P2P_PROVISION_TIMEOUT );
+					break;
+
+			}
+
+		}		
+#endif //CONFIG_P2P
+	}
+	
+	return _SUCCESS;
+}
+
+unsigned int OnAction_ht(_adapter *padapter, union recv_frame *precv_frame)
+{
+	return _SUCCESS;
+}
+
+unsigned int OnAction_wmm(_adapter *padapter, union recv_frame *precv_frame)
+{
+	return _SUCCESS;
+}
+
+unsigned int OnAction_p2p(_adapter *padapter, union recv_frame *precv_frame)
+{
+#ifdef CONFIG_P2P
+	u8 *frame_body;
+	u8 category, OUI_Subtype, dialogToken=0;
+	u8 *pframe = precv_frame->u.hdr.rx_data;
+	uint len = precv_frame->u.hdr.len;
+	struct	wifidirect_info	*pwdinfo = &( padapter->wdinfo );
+	
+
+	DBG_871X("%s\n", __FUNCTION__);
+	
+	//check RA matches or not
+	if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), GetAddr1Ptr(pframe), ETH_ALEN))//for if1, sta/ap mode
+		return _SUCCESS;
+
+	frame_body = (unsigned char *)(pframe + sizeof(struct ieee80211_hdr_3addr));
+
+	category = frame_body[0];
+	if(category != WLAN_CATEGORY_P2P)
+		return _SUCCESS;
+
+	if ( cpu_to_be32( *( ( u32* ) ( frame_body + 1 ) ) ) != P2POUI )
+		return _SUCCESS;
+
+	OUI_Subtype = frame_body[5];
+	dialogToken = frame_body[6];
+
+	switch(OUI_Subtype)
+	{
+		case P2P_NOTICE_OF_ABSENCE:
+			
+			break;
+			
+		case P2P_PRESENCE_REQUEST:
+
+			process_p2p_presence_req(pwdinfo, pframe, len);			
+			
+			break;
+			
+		case P2P_PRESENCE_RESPONSE:
+			
+			break;
+			
+		case P2P_GO_DISC_REQUEST:
+			
+			break;
+			
+		default:
+			break;
+			
+	}	
+
+#endif //CONFIG_P2P
+
+	return _SUCCESS;
+
+}
+
+unsigned int OnAction(_adapter *padapter, union recv_frame *precv_frame)
+{
+	int i;
+	unsigned char	category;
+	struct action_handler *ptable;
+	unsigned char	*frame_body;
+	u8 *pframe = precv_frame->u.hdr.rx_data; 
+
+	frame_body = (unsigned char *)(pframe + sizeof(struct ieee80211_hdr_3addr));
+	
+	category = frame_body[0];
+	
+	for(i = 0; i < sizeof(OnAction_tbl)/sizeof(struct action_handler); i++)	
+	{
+		ptable = &OnAction_tbl[i];
+		
+		if(category == ptable->num)
+			ptable->func(padapter, precv_frame);
+	
+	}
+
+	return _SUCCESS;
+
+}
+
+unsigned int DoReserved(_adapter *padapter, union recv_frame *precv_frame)
+{
+	u8 *pframe = precv_frame->u.hdr.rx_data;
+	uint len = precv_frame->u.hdr.len;
+
+	//DBG_871X("rcvd mgt frame(%x, %x)\n", (GetFrameSubType(pframe) >> 4), *(unsigned int *)GetAddr1Ptr(pframe));
+	return _SUCCESS;
+}
+
+struct xmit_frame *alloc_mgtxmitframe(struct xmit_priv *pxmitpriv)
+{
+	struct xmit_frame			*pmgntframe;
+	struct xmit_buf				*pxmitbuf;
+
+	if ((pmgntframe = rtw_alloc_xmitframe(pxmitpriv)) == NULL)
+	{
+		return NULL;
+	}
+
+	if ((pxmitbuf = rtw_alloc_xmitbuf_ext(pxmitpriv)) == NULL)
+	{
+		rtw_free_xmitframe_ex(pxmitpriv, pmgntframe);
+		return NULL;
+	}
+
+	pmgntframe->frame_tag = MGNT_FRAMETAG;
+
+	pmgntframe->pxmitbuf = pxmitbuf;
+
+	pmgntframe->buf_addr = pxmitbuf->pbuf;
+
+	pxmitbuf->priv_data = pmgntframe;
+
+	return pmgntframe;
+
+}
+
+
+/****************************************************************************
+
+Following are some TX fuctions for WiFi MLME
+
+*****************************************************************************/
+
+void update_mgntframe_attrib(_adapter *padapter, struct pkt_attrib *pattrib)
+{
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+
+	_rtw_memset((u8 *)(pattrib), 0, sizeof(struct pkt_attrib));
+
+	pattrib->hdrlen = 24;
+	pattrib->nr_frags = 1;
+	pattrib->priority = 7;
+	pattrib->mac_id = 0;
+	pattrib->qsel = 0x12;
+
+	pattrib->pktlen = 0;
+
+	if(pmlmeext->cur_wireless_mode & WIRELESS_11B)
+		pattrib->raid = 6;//b mode
+	else
+		pattrib->raid = 5;//a/g mode
+
+	pattrib->encrypt = _NO_PRIVACY_;
+	pattrib->bswenc = _FALSE;	
+
+	pattrib->qos_en = _FALSE;
+	pattrib->ht_en = _FALSE;
+	pattrib->bwmode = HT_CHANNEL_WIDTH_20;
+	pattrib->ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+	pattrib->sgi = _FALSE;
+
+	pattrib->seqnum = pmlmeext->mgnt_seq;
+
+}
+
+void dump_mgntframe(_adapter *padapter, struct xmit_frame *pmgntframe)
+{
+	if(padapter->bSurpriseRemoved == _TRUE ||
+		padapter->bDriverStopped == _TRUE)
+		return;
+	
+	padapter->HalFunc.mgnt_xmit(padapter, pmgntframe);
+}
+
+//Commented by Kurt
+#ifdef CONFIG_TDLS
+void issue_nulldata_to_TDLS_peer_STA(_adapter *padapter, struct sta_info *ptdls_sta, unsigned int power_mode)
+{
+	struct xmit_frame			*pmgntframe;
+	struct pkt_attrib			*pattrib;
+	unsigned char					*pframe;
+	struct ieee80211_hdr	*pwlanhdr;
+	unsigned short				*fctrl;
+	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(padapter, pattrib);
+
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+
+	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+//	SetToDs(fctrl);
+	if (power_mode)
+	{
+		SetPwrMgt(fctrl);
+	}
+
+	_rtw_memcpy(pwlanhdr->addr1, ptdls_sta->hwaddr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+
+	ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority]++;
+	ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority] &= 0xFFF;
+	pattrib->seqnum = ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority];
+	SetSeqNum(pwlanhdr, pattrib->seqnum);
+
+	SetFrameSubType(pframe, WIFI_DATA_NULL);
+
+	pframe += sizeof(struct ieee80211_hdr_3addr);
+	pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr);
+
+	pattrib->last_txcmdsz = pattrib->pktlen;
+	dump_mgntframe(padapter, pmgntframe);
+
+	return;
+}
+
+s32 update_tdls_attrib(_adapter *padapter, struct pkt_attrib *pattrib)
+{
+
+	struct sta_info *psta = NULL;
+	struct sta_priv		*pstapriv = &padapter->stapriv;
+	struct security_priv	*psecuritypriv = &padapter->securitypriv;
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	struct qos_priv		*pqospriv= &pmlmepriv->qospriv;
+
+	s32 res=_SUCCESS;
+	sint bmcast;
+
+	bmcast = IS_MCAST(pattrib->ra);
+	
+	psta = rtw_get_stainfo(pstapriv, pattrib->ra);
+	if (psta == NULL)	{ 
+		res =_FAIL;
+		goto exit;
+	}
+
+	pattrib->mac_id = psta->mac_id;
+				
+	pattrib->psta = psta;
+
+	pattrib->ack_policy = 0;
+	// get ether_hdr_len
+	pattrib->pkt_hdrlen = ETH_HLEN;//(pattrib->ether_type == 0x8100) ? (14 + 4 ): 14; //vlan tag
+
+	if (pqospriv->qos_option &&  psta->qos_option) {
+		if(pattrib->priority==0)
+			pattrib->priority = 1;	//tdls management frame should be AC_BK
+		pattrib->hdrlen = WLAN_HDR_A3_QOS_LEN;
+		pattrib->subtype = WIFI_QOS_DATA_TYPE;
+	} else {
+		pattrib->hdrlen = WLAN_HDR_A3_LEN;
+		pattrib->subtype = WIFI_DATA_TYPE;	
+		pattrib->priority = 0;
+	}
+
+	if (psta->ieee8021x_blocked == _TRUE)
+	{
+		pattrib->encrypt = 0;
+	}
+	else
+	{
+		GET_ENCRY_ALGO(psecuritypriv, psta, pattrib->encrypt, bmcast);
+
+		switch(psecuritypriv->dot11AuthAlgrthm)
+		{
+			case dot11AuthAlgrthm_Open:
+			case dot11AuthAlgrthm_Shared:
+			case dot11AuthAlgrthm_Auto:				
+				pattrib->key_idx = (u8)psecuritypriv->dot11PrivacyKeyIndex;
+				break;
+			case dot11AuthAlgrthm_8021X:
+				pattrib->key_idx = 0;
+				break;
+			default:
+				pattrib->key_idx = 0;
+				break;
+		}
+	}
+
+	switch (pattrib->encrypt)
+	{
+		case _WEP40_:
+		case _WEP104_:
+			pattrib->iv_len = 4;
+			pattrib->icv_len = 4;
+			break;
+		case _TKIP_:
+			pattrib->iv_len = 8;
+			pattrib->icv_len = 4;
+			if(padapter->securitypriv.busetkipkey==_FAIL)
+			{
+				res =_FAIL;
+				goto exit;
+			}
+			break;			
+		case _AES_:
+			pattrib->iv_len = 8;
+			pattrib->icv_len = 8;
+			break;
+		default:
+			pattrib->iv_len = 0;
+			pattrib->icv_len = 0;
+			break;
+	}
+
+	if (pattrib->encrypt &&
+	    ((padapter->securitypriv.sw_encrypt == _TRUE) || (psecuritypriv->hw_decrypted == _FALSE)))
+	{
+		pattrib->bswenc = _TRUE;
+	} else {
+		pattrib->bswenc = _FALSE;
+	}
+
+	//qos_en, ht_en, init rate, ,bw, ch_offset, sgi
+	pattrib->qos_en = psta->qos_option;
+	pattrib->ht_en = psta->htpriv.ht_option;
+	pattrib->raid = psta->raid;
+	pattrib->bwmode = psta->htpriv.bwmode;
+	pattrib->ch_offset = psta->htpriv.ch_offset;
+	pattrib->sgi= psta->htpriv.sgi;
+	pattrib->ampdu_en = _FALSE;
+	
+	if(pattrib->ht_en && psta->htpriv.ampdu_enable)
+	{
+		if(psta->htpriv.agg_enable_bitmap & BIT(pattrib->priority))
+			pattrib->ampdu_en = _TRUE;
+	}	
+
+exit:
+
+	return res;
+}
+
+void issue_tdls_setup_req(_adapter *padapter, u8 *mac_addr)
+{
+	struct xmit_frame			*pmgntframe;
+	struct pkt_attrib			*pattrib;
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+   	struct sta_priv *pstapriv = &padapter->stapriv;
+	struct sta_info *ptdls_sta= NULL;
+	_irqL irqL;
+	static u8 dialogtoken = 0;
+	u32 timeout_interval= TPK_RESEND_COUNT * 1000;	//retry timer should set at least 301 sec, using TPK_count counting 301 times.
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+	
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+
+	pmgntframe->frame_tag = DATA_FRAMETAG;
+	pattrib->ether_type = 0x890d;
+	pattrib->pctrl =0;		
+
+	_rtw_memcpy(pattrib->dst, mac_addr, ETH_ALEN);
+	_rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN);
+
+	_rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN);
+	_rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
+
+	//for tdls; pattrib->nr_frags is used to fill dialogtoken
+	pattrib->nr_frags = dialogtoken;		
+	dialogtoken = (dialogtoken+1)%256;
+
+	update_tdls_attrib(padapter, pattrib);
+
+	//init peer sta_info
+	ptdls_sta = rtw_get_stainfo(pstapriv, mac_addr);
+	if(ptdls_sta==NULL){
+		ptdls_sta = rtw_alloc_stainfo(pstapriv, mac_addr);
+	}
+	
+	if(ptdls_sta){	
+		ptdls_sta->state |= TDLS_RESPONDER_STATE;
+		//for tdls; ptdls_sta->aid is used to fill dialogtoken
+		ptdls_sta->aid = pattrib->nr_frags;		
+		ptdls_sta->TDLS_PeerKey_Lifetime = timeout_interval;
+		_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);	
+		pmlmeinfo->tdls_sta_cnt++;
+		_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);	
+	}
+	else	{
+		rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf);
+		rtw_free_xmitframe_ex(pxmitpriv, pmgntframe);
+		goto exit;
+	}
+
+	pattrib->qsel=pattrib->priority;
+	if(xmit_tdls_coalesce(padapter, pmgntframe, TDLS_SETUP_REQUEST) !=_SUCCESS ){
+		rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf);
+		rtw_free_xmitframe_ex(pxmitpriv, pmgntframe);
+	}
+	rtw_dump_xframe(padapter, pmgntframe);
+
+exit:
+
+	return;
+}
+
+void issue_tdls_teardown(_adapter *padapter, u8 *mac_addr)
+{
+	struct xmit_frame			*pmgntframe;
+	struct pkt_attrib			*pattrib;
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct sta_priv *pstapriv = &padapter->stapriv;
+	struct sta_info	*ptdls_sta=NULL;
+	_irqL irqL;
+
+	ptdls_sta = rtw_get_stainfo(pstapriv, mac_addr);
+	if(ptdls_sta==NULL){
+		DBG_8192C("issue tdls teardown unsuccessful\n");
+		return;
+	}else{
+		ptdls_sta->state=UN_TDLS_STATE;
+	}
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+	
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+
+	pmgntframe->frame_tag = DATA_FRAMETAG;
+	pattrib->ether_type = 0x890d;
+	pattrib->pctrl =0;
+
+	_rtw_memcpy(pattrib->dst, mac_addr, ETH_ALEN);
+	_rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN);
+
+	_rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN);
+	_rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
+
+	update_tdls_attrib(padapter, pattrib);
+	pattrib->qsel=pattrib->priority;
+	if (xmit_tdls_coalesce(padapter, pmgntframe, TDLS_TEARDOWN) != _SUCCESS) {
+		rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf);
+		rtw_free_xmitframe_ex(pxmitpriv, pmgntframe);
+	}
+	rtw_dump_xframe(padapter, pmgntframe);
+
+	if(ptdls_sta->state & TDLS_CH_SWITCH_ON_STATE){
+		ptdls_sta->option =3;
+		_set_workitem(&ptdls_sta->option_workitem);
+	}
+	
+	//free peer sta_info
+	DBG_8192C("tdls teardown, free sta_info\n");
+	_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);		
+	pmlmeinfo->tdls_sta_cnt--;
+	_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
+	//ready to clear cam
+	if(ptdls_sta->cam_entry!=0){
+		pmlmeinfo->tdls_cam_entry_to_clear=ptdls_sta->cam_entry;
+		rtw_setstakey_cmd(padapter, (u8 *)ptdls_sta, _TRUE);
+	}
+	_set_workitem(&pmlmeext->TDLS_restore_workitem);
+	rtw_free_stainfo(padapter,  ptdls_sta);
+	if(pmlmeinfo->tdls_sta_cnt==0)
+		pmlmeinfo->tdls_setup_state=UN_TDLS_STATE;		//tdls;kurt			
+
+exit:
+
+	return;
+}
+
+void issue_tdls_dis_req(_adapter *padapter)
+{
+	struct xmit_frame			*pmgntframe;
+	struct pkt_attrib			*pattrib;
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
+
+	static u8 dialogtoken=0;
+	u8 mac_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 
+	
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+	
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+
+	pmgntframe->frame_tag = DATA_FRAMETAG;
+	pattrib->ether_type = 0x890d;
+	pattrib->pctrl =0;
+
+	_rtw_memcpy(pattrib->dst, mac_addr, ETH_ALEN);
+	_rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN);
+
+	_rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN);
+	_rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
+
+	//for tdls; pattrib->nr_frags is used to fill dialogtoken
+	pattrib->nr_frags = dialogtoken;
+	dialogtoken = (dialogtoken+1)%256;
+	//for tdls; pattrib->type is used to fill status
+	pattrib->type = 0;
+
+	update_tdls_attrib(padapter, pattrib);
+	pattrib->qsel=pattrib->priority;
+	if (xmit_tdls_coalesce(padapter, pmgntframe, TDLS_DISCOVERY_REQUEST) != _SUCCESS) {
+		rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf);
+		rtw_free_xmitframe_ex(pxmitpriv, pmgntframe);
+	}
+	rtw_dump_xframe(padapter, pmgntframe);
+	DBG_8192C("issue tdls dis req\n");
+
+exit:
+
+	return;
+}
+
+void issue_tdls_setup_rsp(_adapter *padapter, union recv_frame *precv_frame)
+{
+	struct xmit_frame			*pmgntframe;
+	struct pkt_attrib			*pattrib;
+	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct sta_priv *pstapriv = &padapter->stapriv;
+	struct sta_info	*ptdls_sta=NULL;
+	_irqL irqL;
+
+	struct rx_pkt_attrib	*rx_pkt_pattrib = &precv_frame->u.hdr.attrib;
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+	
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+
+	pmgntframe->frame_tag = DATA_FRAMETAG;
+	pattrib->ether_type = 0x890d;
+	pattrib->pctrl =0;
+
+	_rtw_memcpy(pattrib->dst, rx_pkt_pattrib->src, ETH_ALEN);
+	_rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN);
+
+	_rtw_memcpy(pattrib->ra, rx_pkt_pattrib->bssid, ETH_ALEN);
+	_rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
+
+	//pattrib->nr_frags is used to fill dialogtoken
+	pattrib->nr_frags = rx_pkt_pattrib->frag_num;
+
+	update_tdls_attrib(padapter, pattrib);
+	pattrib->qsel=pattrib->priority;
+	if (xmit_tdls_coalesce(padapter, pmgntframe, TDLS_SETUP_RESPONSE) != _SUCCESS) {
+		rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf);
+		rtw_free_xmitframe_ex(pxmitpriv, pmgntframe);
+	}
+	rtw_dump_xframe(padapter, pmgntframe);
+
+	ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst);
+	//status code!=0 ; setup unsuccess
+	if(ptdls_sta->stat_code!=0){
+		_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);		
+		pmlmeinfo->tdls_sta_cnt--;
+		_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
+		rtw_free_stainfo(padapter,  ptdls_sta);		
+		if(pmlmeinfo->tdls_sta_cnt==0)
+			pmlmeinfo->tdls_setup_state=UN_TDLS_STATE;
+	}
+	
+exit:
+
+	return;
+
+}
+
+void issue_tdls_setup_cfm(_adapter *padapter, union recv_frame *precv_frame)
+{
+	struct xmit_frame			*pmgntframe;
+	struct pkt_attrib			*pattrib;
+	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct sta_priv		*pstapriv = &padapter->stapriv;
+	struct sta_info		*ptdls_sta=NULL;
+	_irqL irqL;
+
+	struct rx_pkt_attrib	*rx_pkt_pattrib = & precv_frame->u.hdr.attrib;
+	
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+	
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+
+	pmgntframe->frame_tag = DATA_FRAMETAG;
+	pattrib->ether_type = 0x890d;
+	pattrib->pctrl =0;
+
+	_rtw_memcpy(pattrib->dst, rx_pkt_pattrib->src, ETH_ALEN);
+	_rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN);
+
+	_rtw_memcpy(pattrib->ra, rx_pkt_pattrib->bssid, ETH_ALEN);
+	_rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
+
+	//pattrib->nr_frags is used to fill dialogtoken
+	pattrib->nr_frags = rx_pkt_pattrib->frag_num;		
+
+	update_tdls_attrib(padapter, pattrib);
+	pattrib->qsel=pattrib->priority;
+	if (xmit_tdls_coalesce(padapter, pmgntframe, TDLS_SETUP_CONFIRM) != _SUCCESS) {
+		rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf);
+		rtw_free_xmitframe_ex(pxmitpriv, pmgntframe);
+	}
+	pmlmeinfo->tdls_setup_state=TDLS_LINKED_STATE;
+
+	rtw_dump_xframe(padapter, pmgntframe);
+
+	ptdls_sta=rtw_get_stainfo(pstapriv, pattrib->dst);
+
+	ptdls_sta->option=1;
+	_set_workitem(&ptdls_sta->option_workitem);
+	//status code!=0 ; setup unsuccess
+	if(ptdls_sta->stat_code!=0){
+		_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
+		pmlmeinfo->tdls_sta_cnt--;
+		_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
+		//ready to clear cam
+		if(ptdls_sta->cam_entry!=0){
+			pmlmeinfo->tdls_cam_entry_to_clear=ptdls_sta->cam_entry;
+			rtw_setstakey_cmd(padapter, (u8 *)ptdls_sta, _TRUE);
+		}
+		rtw_free_stainfo(padapter,  ptdls_sta);
+		if(pmlmeinfo->tdls_sta_cnt==0)
+			pmlmeinfo->tdls_setup_state=UN_TDLS_STATE;
+	}
+		
+exit:
+
+	return;
+
+}
+
+//TDLS Discovery Response frame is a management action frame
+void issue_tdls_dis_rsp(_adapter *padapter, union recv_frame *precv_frame)
+{
+	struct xmit_frame		*pmgntframe;
+	struct pkt_attrib		*pattrib;
+	unsigned char			*pframe;
+	struct ieee80211_hdr	*pwlanhdr;
+	unsigned short		*fctrl;
+	struct xmit_priv		*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	struct rx_pkt_attrib	*rx_pkt_pattrib = &precv_frame->u.hdr.attrib;
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(padapter, pattrib);
+
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+
+	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+
+	//	unicast probe request frame
+	_rtw_memcpy(pwlanhdr->addr1, rx_pkt_pattrib->src, ETH_ALEN);
+	_rtw_memcpy(pattrib->dst, pwlanhdr->addr1, ETH_ALEN);
+	
+	_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+	_rtw_memcpy(pattrib->src, pwlanhdr->addr2, ETH_ALEN);
+
+	_rtw_memcpy(pwlanhdr->addr3, rx_pkt_pattrib->bssid, ETH_ALEN);
+	_rtw_memcpy(pattrib->ra, pwlanhdr->addr3, ETH_ALEN);
+	
+	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+	pmlmeext->mgnt_seq++;
+	SetFrameSubType(pframe, WIFI_ACTION);
+
+	pframe += sizeof (struct ieee80211_hdr_3addr);
+	pattrib->pktlen = sizeof (struct ieee80211_hdr_3addr);
+	//tdls; pattrib->nr_frags is used to fill dialogtoken
+	pattrib->nr_frags = rx_pkt_pattrib->frag_num;
+	
+	fill_tdls_dis_rsp_frbody(padapter, pmgntframe, pframe);
+
+	pattrib->nr_frags = 1;
+	pattrib->last_txcmdsz = pattrib->pktlen;
+
+	dump_mgntframe(padapter, pmgntframe);
+
+	return;
+}
+
+void issue_tdls_peer_traffic_indication(_adapter *padapter, struct sta_info *psta)
+{
+	struct xmit_frame			*pmgntframe;
+	struct pkt_attrib			*pattrib;
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
+
+	static u8 dialogtoken=0;
+	
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+	
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+
+	pmgntframe->frame_tag = DATA_FRAMETAG;
+	pattrib->ether_type = 0x890d;
+	pattrib->pctrl =0;
+
+	_rtw_memcpy(pattrib->dst, psta->hwaddr, ETH_ALEN);
+	_rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN);
+
+	_rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN);
+	_rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
+
+	//for tdls; pattrib->nr_frags is used to fill dialogtoken
+	pattrib->nr_frags = dialogtoken;
+	dialogtoken = (dialogtoken+1)%256;
+	//for tdls; pattrib->type is used to fill status
+	pattrib->type = 0;
+	//PTI frame's priority should be AC_VO
+	pattrib->priority = 7; 
+
+	update_tdls_attrib(padapter, pattrib);
+	pattrib->qsel=pattrib->priority;
+	if (xmit_tdls_coalesce(padapter, pmgntframe, TDLS_PEER_TRAFFIC_INDICATION) != _SUCCESS) {
+		rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf);
+		rtw_free_xmitframe_ex(pxmitpriv, pmgntframe);
+	}
+	rtw_dump_xframe(padapter, pmgntframe);
+	
+exit:
+
+	return;
+}
+
+void issue_tdls_ch_switch_req(_adapter *padapter, u8 *mac_addr)
+{
+	struct xmit_frame	*pmgntframe;
+	struct pkt_attrib	*pattrib;
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	struct xmit_priv	*pxmitpriv = &(padapter->xmitpriv);
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+	
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+
+	pmgntframe->frame_tag = DATA_FRAMETAG;
+	pattrib->ether_type = 0x890d;
+	pattrib->pctrl =0;		
+
+	_rtw_memcpy(pattrib->dst, mac_addr, ETH_ALEN);
+	_rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN);
+
+	_rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN);
+	_rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
+
+	update_tdls_attrib(padapter, pattrib);
+
+	pattrib->qsel=pattrib->priority;
+	if(xmit_tdls_coalesce(padapter, pmgntframe, TDLS_CHANNEL_SWITCH_REQUEST) !=_SUCCESS ){
+		rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf);
+		rtw_free_xmitframe_ex(pxmitpriv, pmgntframe);
+	}
+	rtw_dump_xframe(padapter, pmgntframe);
+
+exit:
+
+	return;
+}
+
+void issue_tdls_ch_switch_rsp(_adapter *padapter, u8 *mac_addr)
+{
+	struct xmit_frame	*pmgntframe;
+	struct pkt_attrib	*pattrib;
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	struct xmit_priv	*pxmitpriv = &(padapter->xmitpriv);
+
+        _irqL irqL;	
+		
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+	
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+
+	pmgntframe->frame_tag = DATA_FRAMETAG;
+	pattrib->ether_type = 0x890d;
+	pattrib->pctrl =0;		
+
+	_rtw_memcpy(pattrib->dst, mac_addr, ETH_ALEN);
+	_rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN);
+
+	_rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN);
+	_rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
+
+	update_tdls_attrib(padapter, pattrib);
+
+	pattrib->qsel=pattrib->priority;
+/*
+	_enter_critical_bh(&pxmitpriv->lock, &irqL);
+	if(xmit_tdls_enqueue_for_sleeping_sta(padapter, pmgntframe)==_TRUE){
+		_exit_critical_bh(&pxmitpriv->lock, &irqL);
+		return _FALSE;
+	}
+*/
+	if(xmit_tdls_coalesce(padapter, pmgntframe, TDLS_CHANNEL_SWITCH_RESPONSE) !=_SUCCESS ){
+		rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf);
+		rtw_free_xmitframe_ex(pxmitpriv, pmgntframe);
+	}
+	rtw_dump_xframe(padapter, pmgntframe);
+
+exit:
+
+	return;
+}
+
+sint On_TDLS_Dis_Rsp(_adapter *adapter, union recv_frame *precv_frame)
+{
+	struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	if(pmlmeinfo->tdls_dis_req==1 || pmlmeinfo->tdls_dis_req==2){
+		report_survey_event(adapter, precv_frame);
+	}
+
+	return _FAIL;
+}
+
+u8 collect_tdls_info(_adapter *padapter, union recv_frame *precv_frame, WLAN_BSSID_EX *bssid)
+{
+	int FIXED_IE=5;
+	int				i;
+	unsigned int		len;
+	unsigned char		*p;
+	u8 *pframe = precv_frame->u.hdr.rx_data;
+	uint packet_len = precv_frame->u.hdr.len;
+	struct rx_pkt_attrib	*pattrib = &precv_frame->u.hdr.attrib;
+
+//	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(padapter);
+//	struct registry_priv *pregistrypriv = &padapter->registrypriv;
+
+	//[-24]: mgt_frame hdrlen
+	len = packet_len - 24 ;
+
+	if (len > MAX_IE_SZ)
+	{
+		DBG_8192C("TDLS dis rsp IE too long for survey event\n");
+		return _FAIL;
+	}
+
+	_rtw_memset(bssid, 0, sizeof(WLAN_BSSID_EX));
+
+	//represent tdls peer
+	bssid->Reserved[1] = 'T';
+		
+	bssid->Length = sizeof(WLAN_BSSID_EX) - MAX_IE_SZ + len;
+
+	//below is to copy the information element
+	bssid->IELength = len;
+	_rtw_memcpy(bssid->IEs, (pframe + 24), bssid->IELength);
+
+	//get the signal strength
+	//bssid->Rssi = precv_frame->u.hdr.attrib.signal_strength; // 0-100 index.	
+	bssid->Rssi = precv_frame->u.hdr.attrib.RecvSignalPower; // in dBM.raw data	
+	bssid->PhyInfo.SignalQuality = precv_frame->u.hdr.attrib.signal_qual;//in percentage 
+	bssid->PhyInfo.SignalStrength = precv_frame->u.hdr.attrib.signal_strength;//in percentage
+#ifdef CONFIG_ANTENNA_DIVERSITY
+	//padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_CURRENT_ANTENNA, (u8 *)(&bssid->PhyInfo.Optimum_antenna));
+	padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_CURRENT_ANTENNA,  &bssid->PhyInfo.Optimum_antenna);
+#endif
+
+	_rtw_memset(bssid->SupportedRates, 0, NDIS_802_11_LENGTH_RATES_EX);
+
+	//checking rate info...
+	i = 0;
+	p = rtw_get_ie(bssid->IEs + FIXED_IE, _SUPPORTEDRATES_IE_, &len, bssid->IELength - FIXED_IE);
+	if (p != NULL)
+	{
+		_rtw_memcpy(bssid->SupportedRates, (p + 2), len);
+		i = len;
+	}
+
+	p = rtw_get_ie(bssid->IEs + FIXED_IE, _EXT_SUPPORTEDRATES_IE_, &len, bssid->IELength - FIXED_IE);
+	if (p != NULL)
+	{
+		_rtw_memcpy(bssid->SupportedRates + i, (p + 2), len);
+	}
+
+	//pframe+10 would be src_addr
+	_rtw_memcpy(bssid->MacAddress, (pframe+10), ETH_ALEN);
+	return _SUCCESS;
+
+}
+
+#endif
+
+void issue_beacon(_adapter *padapter)
+{
+	_irqL irqL;		
+	struct xmit_frame	*pmgntframe;
+	struct pkt_attrib	*pattrib;
+	unsigned char	*pframe;
+	struct ieee80211_hdr *pwlanhdr;
+	unsigned short *fctrl;
+	unsigned int	rate_len;
+	struct xmit_priv	*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX 		*cur_network = &(pmlmeinfo->network);
+	u8	bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+#ifdef CONFIG_P2P
+	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
+#endif //CONFIG_P2P
+
+
+	//DBG_871X("%s\n", __FUNCTION__);
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		DBG_871X("%s, alloc mgnt frame fail\n", __FUNCTION__);
+		return;
+	}
+
+	_enter_critical_bh(&pmlmepriv->bcn_update_lock, &irqL);			
+
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(padapter, pattrib);
+	pattrib->qsel = 0x10;
+	
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+		
+	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct ieee80211_hdr *)pframe;	
+	
+	
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+	
+	_rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/);
+	//pmlmeext->mgnt_seq++;
+	SetFrameSubType(pframe, WIFI_BEACON);
+	
+	pframe += sizeof(struct ieee80211_hdr_3addr);	
+	pattrib->pktlen = sizeof (struct ieee80211_hdr_3addr);
+	
+	if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)
+	{
+		//DBG_871X("ie len=%d\n", cur_network->IELength);
+#ifdef CONFIG_P2P
+		// for P2P : Primary Device Type & Device Name
+		u32 wpsielen=0, insert_len=0;
+		u8 *wpsie=NULL;		
+		wpsie = rtw_get_wps_ie(cur_network->IEs, cur_network->IELength, NULL, &wpsielen);
+		
+		if(pwdinfo->role == P2P_ROLE_GO && wpsie && wpsielen>0)
+		{
+			uint wps_offset, remainder_ielen;
+			u8 *premainder_ie, *pframe_wscie;		
+	
+			wps_offset = (uint)(wpsie - cur_network->IEs);
+
+			premainder_ie = wpsie + wpsielen;
+
+			remainder_ielen = cur_network->IELength - wps_offset - wpsielen;
+
+			pframe_wscie = pframe + wps_offset;
+			_rtw_memcpy(pframe, cur_network->IEs, wps_offset+wpsielen);			
+			pframe += (wps_offset + wpsielen);		
+			pattrib->pktlen += (wps_offset + wpsielen);
+
+			//now pframe is end of wsc ie, insert Primary Device Type & Device Name
+			//	Primary Device Type
+			//	Type:
+			*(u16*) ( pframe + insert_len) = cpu_to_be16( WPS_ATTR_PRIMARY_DEV_TYPE );
+			insert_len += 2;
+			
+			//	Length:
+			*(u16*) ( pframe + insert_len ) = cpu_to_be16( 0x0008 );
+			insert_len += 2;
+			
+			//	Value:
+			//	Category ID
+			*(u16*) ( pframe + insert_len ) = cpu_to_be16( WPS_PDT_CID_RTK_WIDI );
+			insert_len += 2;
+
+			//	OUI
+			*(u32*) ( pframe + insert_len ) = cpu_to_be32( WPSOUI );
+			insert_len += 4;
+
+			//	Sub Category ID
+			*(u16*) ( pframe + insert_len ) = cpu_to_be16( WPS_PDT_SCID_RTK_DMP );
+			insert_len += 2;
+
+
+			//	Device Name
+			//	Type:
+			*(u16*) ( pframe + insert_len ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME );
+			insert_len += 2;
+
+			//	Length:
+			*(u16*) ( pframe + insert_len ) = cpu_to_be16( pwdinfo->device_name_len );
+			insert_len += 2;
+
+			//	Value:
+			_rtw_memcpy( pframe + insert_len, pwdinfo->device_name, pwdinfo->device_name_len );
+			insert_len += pwdinfo->device_name_len;
+
+
+			//update wsc ie length
+			*(pframe_wscie+1) = (wpsielen -2) + insert_len;
+
+			//pframe move to end
+			pframe+=insert_len;
+			pattrib->pktlen += insert_len;
+
+			//copy remainder_ie to pframe
+			_rtw_memcpy(pframe, premainder_ie, remainder_ielen);
+			pframe += remainder_ielen;		
+			pattrib->pktlen += remainder_ielen;	
+							
+		}
+		else
+#endif //CONFIG_P2P
+		{
+			_rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength);
+			pframe += cur_network->IELength;
+			pattrib->pktlen += cur_network->IELength;
+		}
+
+#ifdef CONFIG_P2P
+		if(pwdinfo->role == P2P_ROLE_GO)
+		{
+			u32 len;
+		
+			len = build_beacon_p2p_ie(pwdinfo, pframe);
+		
+			pframe += len;
+			pattrib->pktlen += len;
+#ifdef CONFIG_WFD
+			len = build_beacon_wfd_ie( pwdinfo, pframe );
+			pframe += len;
+			pattrib->pktlen += len;
+#endif //CONFIG_WFD
+		}
+#endif //CONFIG_P2P
+
+		goto _issue_bcn;
+
+	}
+
+	//below for ad-hoc mode
+
+	//timestamp will be inserted by hardware
+	pframe += 8;
+	pattrib->pktlen += 8;
+
+	// beacon interval: 2 bytes
+
+	_rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); 
+
+	pframe += 2;
+	pattrib->pktlen += 2;
+
+	// capability info: 2 bytes
+
+	_rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2);
+
+	pframe += 2;
+	pattrib->pktlen += 2;
+
+	// SSID
+	pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pattrib->pktlen);
+
+	// supported rates...
+	rate_len = rtw_get_rateset_len(cur_network->SupportedRates);
+	pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &pattrib->pktlen);
+
+	// DS parameter set
+	pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pattrib->pktlen);
+
+	//if( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)
+	{
+		u8 erpinfo=0;
+		u32 ATIMWindow;
+		// IBSS Parameter Set...
+		//ATIMWindow = cur->Configuration.ATIMWindow;
+		ATIMWindow = 0;
+		pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pattrib->pktlen);
+
+		//ERP IE
+		pframe = rtw_set_ie(pframe, _ERPINFO_IE_, 1, &erpinfo, &pattrib->pktlen);
+	}	
+
+
+	// EXTERNDED SUPPORTED RATE
+	if (rate_len > 8)
+	{
+		pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pattrib->pktlen);
+	}
+
+
+	//todo:HT for adhoc
+
+_issue_bcn:
+
+	pmlmepriv->update_bcn = _FALSE;
+	
+	_exit_critical_bh(&pmlmepriv->bcn_update_lock, &irqL);	
+
+	if ((pattrib->pktlen + TXDESC_SIZE) > 512)
+	{
+		DBG_871X("beacon frame too large\n");
+		return;
+	}
+	
+	pattrib->last_txcmdsz = pattrib->pktlen;
+
+	//DBG_871X("issue bcn_sz=%d\n", pattrib->last_txcmdsz);
+
+	dump_mgntframe(padapter, pmgntframe);
+
+}
+
+void issue_probersp(_adapter *padapter, unsigned char *da, u8 is_valid_p2p_probereq)
+{
+	u8 *pwps_ie;
+	uint wps_ielen;
+	struct xmit_frame			*pmgntframe;
+	struct pkt_attrib			*pattrib;
+	unsigned char					*pframe;
+	struct ieee80211_hdr	*pwlanhdr;
+	unsigned short				*fctrl;	
+	unsigned char					*mac, *bssid;
+	struct xmit_priv	*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX 		*cur_network = &(pmlmeinfo->network);
+	unsigned int	rate_len;
+#ifdef CONFIG_P2P
+	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
+#ifdef CONFIG_WFD
+	u32					wfdielen = 0;
+#endif //CONFIG_WFD
+#endif //CONFIG_P2P
+
+
+
+	//DBG_871X("%s\n", __FUNCTION__);
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		DBG_871X("%s, alloc mgnt frame fail\n", __FUNCTION__);
+		return;
+	}
+
+
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(padapter, pattrib);	
+	
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+		
+	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct ieee80211_hdr *)pframe;	
+	
+	mac = myid(&(padapter->eeprompriv));
+	bssid = cur_network->MacAddress;
+	
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+	_rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, bssid, ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+	pmlmeext->mgnt_seq++;
+	SetFrameSubType(fctrl, WIFI_PROBERSP);
+	
+	pattrib->hdrlen = sizeof(struct ieee80211_hdr_3addr);
+	pattrib->pktlen = pattrib->hdrlen;
+	pframe += pattrib->hdrlen;
+
+
+	if(cur_network->IELength>MAX_IE_SZ)
+		return;
+	
+#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME)
+	if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)
+	{
+		pwps_ie = rtw_get_wps_ie(cur_network->IEs, cur_network->IELength, NULL, &wps_ielen);
+	
+		//inerset & update wps_probe_resp_ie
+		if((pmlmepriv->wps_probe_resp_ie!=NULL) && pwps_ie && (wps_ielen>0))
+		{
+			uint wps_offset, remainder_ielen;
+			u8 *premainder_ie;		
+	
+			wps_offset = (uint)(pwps_ie - cur_network->IEs);
+
+			premainder_ie = pwps_ie + wps_ielen;
+
+			remainder_ielen = cur_network->IELength - wps_offset - wps_ielen;
+
+			_rtw_memcpy(pframe, cur_network->IEs, wps_offset);		
+			pframe += wps_offset;		
+			pattrib->pktlen += wps_offset;		
+
+			wps_ielen = (uint)pmlmepriv->wps_probe_resp_ie[1];//to get ie data len
+			if((wps_offset+wps_ielen+2)<=MAX_IE_SZ)
+			{
+				_rtw_memcpy(pframe, pmlmepriv->wps_probe_resp_ie, wps_ielen+2);
+				pframe += wps_ielen+2;		
+				pattrib->pktlen += wps_ielen+2;	
+			}
+
+			if((wps_offset+wps_ielen+2+remainder_ielen)<=MAX_IE_SZ)
+			{
+				_rtw_memcpy(pframe, premainder_ie, remainder_ielen);
+				pframe += remainder_ielen;		
+				pattrib->pktlen += remainder_ielen;	
+			}
+		}
+		else
+		{
+			_rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength);
+			pframe += cur_network->IELength;
+			pattrib->pktlen += cur_network->IELength;
+		}
+		
+	}	
+	else		
+#endif		
+	{
+	
+		//timestamp will be inserted by hardware
+		pframe += 8;
+		pattrib->pktlen += 8;
+
+		// beacon interval: 2 bytes
+
+		_rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); 
+
+		pframe += 2;
+		pattrib->pktlen += 2;
+
+		// capability info: 2 bytes
+
+		_rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2);
+
+		pframe += 2;
+		pattrib->pktlen += 2;
+
+		//below for ad-hoc mode
+
+		// SSID
+		pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pattrib->pktlen);
+
+		// supported rates...
+		rate_len = rtw_get_rateset_len(cur_network->SupportedRates);
+		pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &pattrib->pktlen);
+
+		// DS parameter set
+		pframe =rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pattrib->pktlen);
+
+		if( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)
+		{
+			u8 erpinfo=0;
+			u32 ATIMWindow;
+			// IBSS Parameter Set...
+			//ATIMWindow = cur->Configuration.ATIMWindow;
+			ATIMWindow = 0;
+			pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pattrib->pktlen);
+
+			//ERP IE
+			pframe = rtw_set_ie(pframe, _ERPINFO_IE_, 1, &erpinfo, &pattrib->pktlen);
+		}
+
+		
+		// EXTERNDED SUPPORTED RATE
+		if (rate_len > 8)
+		{
+			pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pattrib->pktlen);
+		}
+
+
+		//todo:HT for adhoc
+
+	}	
+
+#ifdef CONFIG_P2P
+	if(pwdinfo->role == P2P_ROLE_GO && is_valid_p2p_probereq)
+	{
+		u32 len;
+		
+		len = build_probe_resp_p2p_ie(pwdinfo, pframe);
+		
+		pframe += len;
+		pattrib->pktlen += len;
+		
+#ifdef CONFIG_WFD
+	wfdielen = build_probe_resp_wfd_ie(pwdinfo, pframe);
+	pframe += wfdielen;
+	pattrib->pktlen += wfdielen;
+#endif //CONFIG_WFD
+
+	}	
+#endif //CONFIG_P2P
+
+
+	pattrib->last_txcmdsz = pattrib->pktlen;
+	
+
+	dump_mgntframe(padapter, pmgntframe);
+	
+	return;
+
+}
+
+void issue_probereq(_adapter *padapter, NDIS_802_11_SSID *pssid, u8 blnbc)
+{
+	struct xmit_frame		*pmgntframe;
+	struct pkt_attrib		*pattrib;
+	unsigned char			*pframe;
+	struct ieee80211_hdr	*pwlanhdr;
+	unsigned short		*fctrl;
+	unsigned char			*mac;
+	unsigned char			bssrate[NumRates];
+	struct xmit_priv		*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	int	bssrate_len = 0;
+	u8	bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+
+	RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("+issue_probereq\n"));
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(padapter, pattrib);
+
+
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+
+	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	mac = myid(&(padapter->eeprompriv));
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+
+	if ( 0 == blnbc )
+	{
+		//	unicast probe request frame
+		_rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+		_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+	}
+	else
+	{
+		//	broadcast probe request frame
+		_rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN);
+		_rtw_memcpy(pwlanhdr->addr3, bc_addr, ETH_ALEN);
+	}
+
+	_rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+	pmlmeext->mgnt_seq++;
+	SetFrameSubType(pframe, WIFI_PROBEREQ);
+
+	pframe += sizeof (struct ieee80211_hdr_3addr);
+	pattrib->pktlen = sizeof (struct ieee80211_hdr_3addr);
+
+	if(pssid)
+		pframe = rtw_set_ie(pframe, _SSID_IE_, pssid->SsidLength, pssid->Ssid, &(pattrib->pktlen));
+	else
+		pframe = rtw_set_ie(pframe, _SSID_IE_, 0, NULL, &(pattrib->pktlen));
+
+	get_rate_set(padapter, bssrate, &bssrate_len);
+
+	if (bssrate_len > 8)
+	{
+		pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen));
+		pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen));
+	}
+	else
+	{
+		pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen));
+	}
+
+
+	//add wps_ie for wps2.0
+	if(pmlmepriv->probereq_wpsie_len>0 && pmlmepriv->probereq_wpsie_len<MAX_WPS_IE_LEN)
+	{
+		_rtw_memcpy(pframe, pmlmepriv->probereq_wpsie, pmlmepriv->probereq_wpsie_len);
+		pframe += pmlmepriv->probereq_wpsie_len;
+		pattrib->pktlen += pmlmepriv->probereq_wpsie_len;
+		//pmlmepriv->probereq_wpsie_len = 0 ;//reset to zero		
+	}	
+
+
+	pattrib->last_txcmdsz = pattrib->pktlen;
+
+	RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("issuing probe_req, tx_len=%d\n", pattrib->last_txcmdsz));
+
+	dump_mgntframe(padapter, pmgntframe);
+
+	return;
+}
+
+// if psta == NULL, indiate we are station(client) now...
+void issue_auth(_adapter *padapter, struct sta_info *psta, unsigned short status)
+{
+	struct xmit_frame			*pmgntframe;
+	struct pkt_attrib			*pattrib;
+	unsigned char					*pframe;
+	struct ieee80211_hdr	*pwlanhdr;
+	unsigned short				*fctrl;
+	unsigned int					val32;
+	unsigned short				val16;
+	int use_shared_key = 0;
+	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+
+	if(pmlmeinfo->auth_seq != 3) {		
+		// Because of AP's not receiving deauth before
+		// AP may: 1)not response auth or 2)deauth us after link is complete
+		// issue deauth before issuing auth to deal with the situation
+		issue_deauth(padapter, (&(pmlmeinfo->network))->MacAddress, WLAN_REASON_DEAUTH_LEAVING);
+	}
+
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(padapter, pattrib);
+
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+
+	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+
+	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+	pmlmeext->mgnt_seq++;
+	SetFrameSubType(pframe, WIFI_AUTH);
+
+	pframe += sizeof(struct ieee80211_hdr_3addr);
+	pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr);
+
+
+	if(psta)// for AP mode
+	{
+#ifdef CONFIG_NATIVEAP_MLME
+
+		_rtw_memcpy(pwlanhdr->addr1, psta->hwaddr, ETH_ALEN);		
+		_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+		_rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN);
+
+	
+		// setting auth algo number	
+		val16 = (u16)psta->authalg;
+
+		if(status != _STATS_SUCCESSFUL_)
+			val16 = 0;
+
+		if (val16)	{
+			val16 = cpu_to_le16(val16);	
+			use_shared_key = 1;
+		}
+
+		pframe = rtw_set_fixed_ie(pframe, _AUTH_ALGM_NUM_, (unsigned char *)&val16, &(pattrib->pktlen));
+
+		// setting auth seq number
+		val16 =(u16)psta->auth_seq;
+		val16 = cpu_to_le16(val16);	
+		pframe = rtw_set_fixed_ie(pframe, _AUTH_SEQ_NUM_, (unsigned char *)&val16, &(pattrib->pktlen));
+
+		// setting status code...
+		val16 = status;
+		val16 = cpu_to_le16(val16);	
+		pframe = rtw_set_fixed_ie(pframe, _STATUS_CODE_, (unsigned char *)&val16, &(pattrib->pktlen));
+
+		// added challenging text...
+		if ((psta->auth_seq == 2) && (psta->state & WIFI_FW_AUTH_STATE) && (use_shared_key==1))
+		{
+			pframe = rtw_set_ie(pframe, _CHLGETXT_IE_, 128, psta->chg_txt, &(pattrib->pktlen));			
+		}
+#endif
+	}
+	else
+	{		
+		_rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&pmlmeinfo->network), ETH_ALEN);
+		_rtw_memcpy(pwlanhdr->addr2, myid(&padapter->eeprompriv), ETH_ALEN);
+		_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&pmlmeinfo->network), ETH_ALEN);
+	
+		// setting auth algo number		
+		val16 = (pmlmeinfo->auth_algo == dot11AuthAlgrthm_Shared)? 1: 0;// 0:OPEN System, 1:Shared key
+		if (val16)	{
+			val16 = cpu_to_le16(val16);	
+			use_shared_key = 1;
+		}	
+		//DBG_8192C("%s auth_algo= %s auth_seq=%d\n",__FUNCTION__,(pmlmeinfo->auth_algo==0)?"OPEN":"SHARED",pmlmeinfo->auth_seq);
+		
+		//setting IV for auth seq #3
+		if ((pmlmeinfo->auth_seq == 3) && (pmlmeinfo->state & WIFI_FW_AUTH_STATE) && (use_shared_key==1))
+		{
+			//DBG_8192C("==> iv(%d),key_index(%d)\n",pmlmeinfo->iv,pmlmeinfo->key_index);
+			val32 = ((pmlmeinfo->iv++) | (pmlmeinfo->key_index << 30));
+			val32 = cpu_to_le32(val32);
+			pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *)&val32, &(pattrib->pktlen));
+
+			pattrib->iv_len = 4;
+		}
+
+		pframe = rtw_set_fixed_ie(pframe, _AUTH_ALGM_NUM_, (unsigned char *)&val16, &(pattrib->pktlen));
+		
+		// setting auth seq number
+		val16 = pmlmeinfo->auth_seq;
+		val16 = cpu_to_le16(val16);	
+		pframe = rtw_set_fixed_ie(pframe, _AUTH_SEQ_NUM_, (unsigned char *)&val16, &(pattrib->pktlen));
+
+		
+		// setting status code...
+		val16 = status;
+		val16 = cpu_to_le16(val16);	
+		pframe = rtw_set_fixed_ie(pframe, _STATUS_CODE_, (unsigned char *)&val16, &(pattrib->pktlen));
+
+		// then checking to see if sending challenging text...
+		if ((pmlmeinfo->auth_seq == 3) && (pmlmeinfo->state & WIFI_FW_AUTH_STATE) && (use_shared_key==1))
+		{
+			pframe = rtw_set_ie(pframe, _CHLGETXT_IE_, 128, pmlmeinfo->chg_txt, &(pattrib->pktlen));
+
+			SetPrivacy(fctrl);
+			
+			pattrib->hdrlen = sizeof(struct ieee80211_hdr_3addr);			
+			
+			pattrib->encrypt = _WEP40_;
+
+			pattrib->icv_len = 4;
+			
+			pattrib->pktlen += pattrib->icv_len;			
+			
+		}
+		
+	}
+
+	pattrib->last_txcmdsz = pattrib->pktlen;
+
+	rtw_wep_encrypt(padapter, (u8 *)pmgntframe);
+
+	dump_mgntframe(padapter, pmgntframe);
+
+	return;
+}
+
+
+void issue_asocrsp(_adapter *padapter, unsigned short status, struct sta_info *pstat, int pkt_type)
+{
+#ifdef CONFIG_AP_MODE
+	struct xmit_frame	*pmgntframe;
+	struct ieee80211_hdr	*pwlanhdr;
+	struct pkt_attrib *pattrib;
+	unsigned char	*pbuf, *pframe;
+	unsigned short val;		
+	unsigned short *fctrl;
+	struct xmit_priv *pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);	
+	WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network);
+	u8 *ie = pnetwork->IEs; 
+#ifdef CONFIG_P2P
+	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
+#ifdef CONFIG_WFD
+	u32					wfdielen = 0;
+#endif //CONFIG_WFD
+
+#endif //CONFIG_P2P
+
+	DBG_871X("%s\n", __FUNCTION__);
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(padapter, pattrib);
+
+
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+
+	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+
+	_rtw_memcpy((void *)GetAddr1Ptr(pwlanhdr), pstat->hwaddr, ETH_ALEN);
+	_rtw_memcpy((void *)GetAddr2Ptr(pwlanhdr), myid(&(padapter->eeprompriv)), ETH_ALEN);
+	_rtw_memcpy((void *)GetAddr3Ptr(pwlanhdr), get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+
+
+	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+	pmlmeext->mgnt_seq++;
+	if ((pkt_type == WIFI_ASSOCRSP) || (pkt_type == WIFI_REASSOCRSP))
+		SetFrameSubType(pwlanhdr, pkt_type);		
+	else
+		return;
+
+	pattrib->hdrlen = sizeof(struct ieee80211_hdr_3addr);
+	pattrib->pktlen += pattrib->hdrlen;
+	pframe += pattrib->hdrlen;
+
+	//capability
+	val = *(unsigned short *)rtw_get_capability_from_ie(ie);
+
+	pframe = rtw_set_fixed_ie(pframe, _CAPABILITY_ , (unsigned char *)&val, &(pattrib->pktlen));
+
+	status = cpu_to_le16(status);
+	pframe = rtw_set_fixed_ie(pframe , _STATUS_CODE_ , (unsigned char *)&status, &(pattrib->pktlen));
+	
+	val = cpu_to_le16(pstat->aid | BIT(14) | BIT(15));
+	pframe = rtw_set_fixed_ie(pframe, _ASOC_ID_ , (unsigned char *)&val, &(pattrib->pktlen));
+
+	if (pstat->bssratelen <= 8)
+	{
+		pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, pstat->bssratelen, pstat->bssrateset, &(pattrib->pktlen));
+	}	
+	else 
+	{
+		pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, 8, pstat->bssrateset, &(pattrib->pktlen));
+		pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (pstat->bssratelen-8), pstat->bssrateset+8, &(pattrib->pktlen));
+	}
+
+#ifdef CONFIG_80211N_HT
+	if ((pstat->flags & WLAN_STA_HT) && (pmlmepriv->htpriv.ht_option))
+	{
+		uint ie_len=0;
+		
+		//FILL HT CAP INFO IE
+		//p = hostapd_eid_ht_capabilities_info(hapd, p);
+		pbuf = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_CAPABILITY_IE_, &ie_len, (pnetwork->IELength - _BEACON_IE_OFFSET_));
+		if(pbuf && ie_len>0)
+		{
+			_rtw_memcpy(pframe, pbuf, ie_len+2);
+			pframe += (ie_len+2);
+			pattrib->pktlen +=(ie_len+2);
+		}
+
+		//FILL HT ADD INFO IE
+		//p = hostapd_eid_ht_operation(hapd, p);
+		pbuf = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_ADD_INFO_IE_, &ie_len, (pnetwork->IELength - _BEACON_IE_OFFSET_));
+		if(pbuf && ie_len>0)
+		{
+			_rtw_memcpy(pframe, pbuf, ie_len+2);
+			pframe += (ie_len+2);
+			pattrib->pktlen +=(ie_len+2);
+		}
+		
+	}	
+#endif
+
+	//FILL WMM IE
+	if ((pstat->flags & WLAN_STA_WME) && (pmlmepriv->qospriv.qos_option))
+	{
+		uint ie_len=0;
+		unsigned char WMM_PARA_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01};	
+		
+		for (pbuf = ie + _BEACON_IE_OFFSET_; ;pbuf+= (ie_len + 2))
+		{			
+			pbuf = rtw_get_ie(pbuf, _VENDOR_SPECIFIC_IE_, &ie_len, (pnetwork->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2)));	
+			if(pbuf && _rtw_memcmp(pbuf+2, WMM_PARA_IE, 6)) 
+			{				
+				_rtw_memcpy(pframe, pbuf, ie_len+2);
+				pframe += (ie_len+2);
+				pattrib->pktlen +=(ie_len+2);
+				
+				break;				
+			}
+			
+			if ((pbuf == NULL) || (ie_len == 0))
+			{
+				break;
+			}			
+		}
+		
+	}
+
+
+	if (pmlmeinfo->assoc_AP_vendor == realtekAP)
+	{
+		pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 6 , REALTEK_96B_IE, &(pattrib->pktlen));
+	}
+
+	//add WPS IE ie for wps 2.0
+	if(pmlmepriv->wps_assoc_resp_ie && pmlmepriv->wps_assoc_resp_ie_len>0)
+	{
+		_rtw_memcpy(pframe, pmlmepriv->wps_assoc_resp_ie, pmlmepriv->wps_assoc_resp_ie_len);
+		
+		pframe += pmlmepriv->wps_assoc_resp_ie_len;
+		pattrib->pktlen += pmlmepriv->wps_assoc_resp_ie_len;
+	}
+
+#ifdef CONFIG_P2P
+	if((pwdinfo->role == P2P_ROLE_GO) && (pstat->is_p2p_device == _TRUE))
+	{
+		u32 len;
+
+		len = build_assoc_resp_p2p_ie(pwdinfo, pframe, pstat->p2p_status_code);
+
+		pframe += len;
+		pattrib->pktlen += len;
+	}
+#ifdef CONFIG_WFD
+	wfdielen = build_assoc_resp_wfd_ie(pwdinfo, pframe);
+	pframe += wfdielen;
+	pattrib->pktlen += wfdielen;
+#endif //CONFIG_WFD
+
+#endif //CONFIG_P2P
+
+	pattrib->last_txcmdsz = pattrib->pktlen;
+	
+	dump_mgntframe(padapter, pmgntframe);
+	
+#endif
+}
+
+void issue_assocreq(_adapter *padapter)
+{
+	struct xmit_frame				*pmgntframe;
+	struct pkt_attrib				*pattrib;
+	unsigned char					*pframe, *p;
+	struct ieee80211_hdr			*pwlanhdr;
+	unsigned short				*fctrl;
+	unsigned short				val16;
+	unsigned int					i, j, ie_len, index=0;
+	unsigned char					rf_type, bssrate[NumRates], sta_bssrate[NumRates];
+	PNDIS_802_11_VARIABLE_IEs	pIE;
+	struct registry_priv	*pregpriv = &padapter->registrypriv;
+	struct xmit_priv		*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	int	bssrate_len = 0, sta_bssrate_len = 0;
+#ifdef CONFIG_P2P
+	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
+	u8					p2pie[ 255 ] = { 0x00 };
+	u16					p2pielen = 0;
+#ifdef CONFIG_WFD
+	u32					wfdielen = 0;
+#endif //CONFIG_WFD
+
+#endif //CONFIG_P2P
+
+#ifdef CONFIG_DFS
+	u16	cap;
+#endif //CONFIG_DFS
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(padapter, pattrib);
+
+
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+
+	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+	_rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+	pmlmeext->mgnt_seq++;
+	SetFrameSubType(pframe, WIFI_ASSOCREQ);
+
+	pframe += sizeof(struct ieee80211_hdr_3addr);
+	pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr);
+
+	//caps
+
+#ifdef CONFIG_DFS
+	_rtw_memcpy(&cap, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2);
+	cap |= BIT(8);
+	_rtw_memcpy(pframe, &cap, 2);
+#else
+	_rtw_memcpy(pframe, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2);
+#endif //CONFIG_DFS
+
+	pframe += 2;
+	pattrib->pktlen += 2;
+
+	//listen interval
+	//todo: listen interval for power saving
+	val16 = cpu_to_le16(3);
+	_rtw_memcpy(pframe ,(unsigned char *)&val16, 2);
+	pframe += 2;
+	pattrib->pktlen += 2;
+
+	//SSID
+	pframe = rtw_set_ie(pframe, _SSID_IE_,  pmlmeinfo->network.Ssid.SsidLength, pmlmeinfo->network.Ssid.Ssid, &(pattrib->pktlen));
+
+	//supported rate & extended supported rate
+
+#if 1	// Check if the AP's supported rates are also supported by STA.
+	get_rate_set(padapter, sta_bssrate, &sta_bssrate_len);
+	//DBG_871X("sta_bssrate_len=%d\n", sta_bssrate_len);
+	
+	//for (i = 0; i < sta_bssrate_len; i++) {
+	//	DBG_871X("sta_bssrate[%d]=%02X\n", i, sta_bssrate[i]);
+	//}
+
+	for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) {
+		if (pmlmeinfo->network.SupportedRates[i] == 0) break;
+		DBG_871X("network.SupportedRates[%d]=%02X\n", i, pmlmeinfo->network.SupportedRates[i]);
+	}
+	
+
+	for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) {
+		if (pmlmeinfo->network.SupportedRates[i] == 0) break;
+
+		
+		// Check if the AP's supported rates are also supported by STA.
+		for (j=0; j < sta_bssrate_len; j++) {
+			 // Avoid the proprietary data rate (22Mbps) of Handlink WSG-4000 AP
+			if ( (pmlmeinfo->network.SupportedRates[i]|IEEE80211_BASIC_RATE_MASK) 
+					== (sta_bssrate[j]|IEEE80211_BASIC_RATE_MASK)) {
+				//DBG_871X("match i = %d, j=%d\n", i, j);
+				break;
+			} else {
+				//DBG_871X("not match: %02X != %02X\n", (pmlmeinfo->network.SupportedRates[i]|IEEE80211_BASIC_RATE_MASK), (sta_bssrate[j]|IEEE80211_BASIC_RATE_MASK));
+			}
+		}
+		
+		if (j == sta_bssrate_len) {
+			// the rate is not supported by STA
+			DBG_871X("%s(): the rate[%d]=%02X is not supported by STA!\n",__FUNCTION__, i, pmlmeinfo->network.SupportedRates[i]);
+		} else {
+			// the rate is supported by STA
+			bssrate[index++] = pmlmeinfo->network.SupportedRates[i];
+		}
+	}
+	
+	bssrate_len = index;
+	DBG_871X("bssrate_len = %d\n", bssrate_len);
+
+#else	// Check if the AP's supported rates are also supported by STA.
+#if 0
+	get_rate_set(padapter, bssrate, &bssrate_len);
+#else
+	for (bssrate_len = 0; bssrate_len < NumRates; bssrate_len++) {
+		if (pmlmeinfo->network.SupportedRates[bssrate_len] == 0) break;
+
+		if (pmlmeinfo->network.SupportedRates[bssrate_len] == 0x2C) // Avoid the proprietary data rate (22Mbps) of Handlink WSG-4000 AP
+			break;
+
+		bssrate[bssrate_len] = pmlmeinfo->network.SupportedRates[bssrate_len];
+	}
+#endif
+#endif	// Check if the AP's supported rates are also supported by STA.
+
+	if (bssrate_len > 8)
+	{
+		pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen));
+		pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen));
+	}
+	else
+	{
+		pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen));
+	}
+
+	//RSN
+	p = rtw_get_ie((pmlmeinfo->network.IEs + sizeof(NDIS_802_11_FIXED_IEs)), _RSN_IE_2_, &ie_len, (pmlmeinfo->network.IELength - sizeof(NDIS_802_11_FIXED_IEs)));
+	if (p != NULL)
+	{
+		pframe = rtw_set_ie(pframe, _RSN_IE_2_, ie_len, (p + 2), &(pattrib->pktlen));
+	}
+
+#ifdef CONFIG_80211N_HT
+	//HT caps
+	if(padapter->mlmepriv.htpriv.ht_option==_TRUE)
+	{
+		p = rtw_get_ie((pmlmeinfo->network.IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_CAPABILITY_IE_, &ie_len, (pmlmeinfo->network.IELength - sizeof(NDIS_802_11_FIXED_IEs)));
+		if ((p != NULL) && (!(is_ap_in_tkip(padapter))))
+		{
+			_rtw_memcpy(&(pmlmeinfo->HT_caps), (p + 2), sizeof(struct HT_caps_element));
+
+			//to disable 40M Hz support while gd_bw_40MHz_en = 0
+			if (pregpriv->cbw40_enable == 0)
+			{
+				pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info &= (~(BIT(6) | BIT(1)));
+			}
+			else
+			{
+				pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info |= BIT(1);
+			}
+
+			//todo: disable SM power save mode
+			pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info |= 0x000c;
+
+			padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
+			//switch (pregpriv->rf_config)
+			switch(rf_type)
+			{
+				case RF_1T1R:
+				
+					if(pregpriv->rx_stbc)
+						pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info |= cpu_to_le16(0x0100);//RX STBC One spatial stream
+						
+					_rtw_memcpy(pmlmeinfo->HT_caps.HT_cap_element.MCS_rate, MCS_rate_1R, 16);
+					break;
+
+				case RF_2T2R:
+				case RF_1T2R:
+				default:
+				
+					if((pregpriv->rx_stbc == 0x3) ||//enable for 2.4/5 GHz	
+						((pmlmeext->cur_wireless_mode & WIRELESS_11_24N) && (pregpriv->rx_stbc == 0x1)) || //enable for 2.4GHz
+						((pmlmeext->cur_wireless_mode & WIRELESS_11_5N) && (pregpriv->rx_stbc == 0x2))) //enable for 5GHz					
+					{
+						DBG_871X("declare supporting RX STBC\n");
+						pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info |= cpu_to_le16(0x0200);//RX STBC two spatial stream
+					}
+						
+					_rtw_memcpy(pmlmeinfo->HT_caps.HT_cap_element.MCS_rate, MCS_rate_2R, 16);
+					break;
+
+			}
+			#ifdef RTL8192C_RECONFIG_TO_1T1R
+			{
+				//if(pregpriv->rx_stbc)
+					//pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info |= cpu_to_le16(0x0100);//RX STBC One spatial stream
+			
+				_rtw_memcpy(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_rate_1R, 16);
+			}
+			#endif
+			pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info = cpu_to_le16(pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info);
+			pframe = rtw_set_ie(pframe, _HT_CAPABILITY_IE_, ie_len , (u8 *)(&(pmlmeinfo->HT_caps)), &(pattrib->pktlen));
+
+		}
+	}
+#endif
+
+	//vendor specific IE, such as WPA, WMM, WPS
+	for (i = sizeof(NDIS_802_11_FIXED_IEs); i < pmlmeinfo->network.IELength;)
+	{
+		pIE = (PNDIS_802_11_VARIABLE_IEs)(pmlmeinfo->network.IEs + i);
+
+		switch (pIE->ElementID)
+		{
+			case _VENDOR_SPECIFIC_IE_:
+				if ((_rtw_memcmp(pIE->data, WPA_OUI, 4)) ||
+						(_rtw_memcmp(pIE->data, WMM_OUI, 4)) ||
+						(_rtw_memcmp(pIE->data, WPS_OUI, 4)))
+				{
+					//Commented by Kurt 20110629
+					//In some older APs, WPS handshake
+					//would be fail if we append vender extensions informations to AP
+					if(_rtw_memcmp(pIE->data, WPS_OUI, 4)){
+						pIE->Length=14;
+					}
+					
+					pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, pIE->Length, pIE->data, &(pattrib->pktlen));
+				}
+				break;
+
+			default:
+				break;
+		}
+
+		i += (pIE->Length + 2);
+	}
+
+	if (pmlmeinfo->assoc_AP_vendor == realtekAP)
+	{
+		pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 6 , REALTEK_96B_IE, &(pattrib->pktlen));
+	}
+
+#ifdef CONFIG_P2P
+	if ( ( pwdinfo->p2p_state != P2P_STATE_NONE ) && ( pwdinfo->p2p_state != P2P_STATE_IDLE ) )
+	{
+		//	Should add the P2P IE in the association request frame.	
+		//	P2P OUI
+		
+		p2pielen = 0;
+		p2pie[ p2pielen++ ] = 0x50;
+		p2pie[ p2pielen++ ] = 0x6F;
+		p2pie[ p2pielen++ ] = 0x9A;
+		p2pie[ p2pielen++ ] = 0x09;	//	WFA P2P v1.0
+
+		//	Commented by Albert 20101109
+		//	According to the P2P Specification, the association request frame should contain 3 P2P attributes
+		//	1. P2P Capability
+		//	2. Extended Listen Timing
+		//	3. Device Info
+		//	Commented by Albert 20110516
+		//	4. P2P Interface
+
+		//	P2P Capability
+		//	Type:
+		p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY;
+
+		//	Length:
+		*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 );
+		p2pielen += 2;
+
+		//	Value:
+		//	Device Capability Bitmap, 1 byte
+		//	Be able to participate in additional P2P Groups and
+		//	support the P2P Invitation Procedure
+		p2pie[ p2pielen++ ] = P2P_DEVCAP_INVITATION_PROC;
+	
+		//	Group Capability Bitmap, 1 byte
+		p2pie[ p2pielen++ ] = 0x00;
+
+		//	Extended Listen Timing
+		//	Type:
+		p2pie[ p2pielen++ ] = P2P_ATTR_EX_LISTEN_TIMING;
+
+		//	Length:
+		*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0004 );
+		p2pielen += 2;
+
+		//	Value:
+		//	Availability Period
+		*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF );
+		p2pielen += 2;
+
+		//	Availability Interval
+		*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF );
+		p2pielen += 2;
+
+		//	Device Info
+		//	Type:
+		p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO;
+
+		//	Length:
+		//	21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) 
+		//	+ NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes)
+		*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len );
+		p2pielen += 2;
+
+		//	Value:
+		//	P2P Device Address
+		_rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN );
+		p2pielen += ETH_ALEN;
+
+		//	Config Method
+		//	This field should be big endian. Noted by P2P specification.
+		if ( ( pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_PEER_DISPLAY_PIN ) ||
+			( pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_SELF_DISPLAY_PIN ) )
+		{
+			*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_CONFIG_METHOD_DISPLAY );
+		}
+		else
+		{
+			*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_CONFIG_METHOD_PBC );
+		}
+
+		p2pielen += 2;
+
+		//	Primary Device Type
+		//	Category ID
+		*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_RTK_WIDI );
+		p2pielen += 2;
+
+		//	OUI
+		*(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI );
+		p2pielen += 4;
+
+		//	Sub Category ID
+		*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_RTK_DMP );
+		p2pielen += 2;
+
+		//	Number of Secondary Device Types
+		p2pie[ p2pielen++ ] = 0x00;	//	No Secondary Device Type List
+
+		//	Device Name
+		//	Type:
+		*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME );
+		p2pielen += 2;
+
+		//	Length:
+		*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len );
+		p2pielen += 2;
+
+		//	Value:
+		_rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name, pwdinfo->device_name_len );
+		p2pielen += pwdinfo->device_name_len;
+	
+		//	P2P Interface
+		//	Type:
+		p2pie[ p2pielen++ ] = P2P_ATTR_INTERFACE;
+		
+		//	Length:
+		*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x000D );
+		p2pielen += 2;
+		
+		//	Value:
+		_rtw_memcpy( p2pie + p2pielen, pwdinfo->device_addr, ETH_ALEN );	//	P2P Device Address
+		p2pielen += ETH_ALEN;
+
+		p2pie[ p2pielen++ ] = 1;	//	P2P Interface Address Count
+		
+		_rtw_memcpy( p2pie + p2pielen, pwdinfo->device_addr, ETH_ALEN );	//	P2P Interface Address List
+		p2pielen += ETH_ALEN;
+	
+		pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen );
+		
+	}
+
+#ifdef CONFIG_WFD
+	wfdielen = build_assoc_req_wfd_ie(pwdinfo, pframe);
+	pframe += wfdielen;
+	pattrib->pktlen += wfdielen;
+#endif //CONFIG_WFD
+
+#endif //CONFIG_P2P
+
+	pattrib->last_txcmdsz = pattrib->pktlen;
+	dump_mgntframe(padapter, pmgntframe);
+
+	return;
+}
+
+void issue_nulldata(_adapter *padapter, unsigned int power_mode)
+{
+	struct xmit_frame			*pmgntframe;
+	struct pkt_attrib			*pattrib;
+	unsigned char					*pframe;
+	struct ieee80211_hdr	*pwlanhdr;
+	unsigned short				*fctrl;
+	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	//DBG_871X("%s:%d\n", __FUNCTION__, power_mode);
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(padapter, pattrib);
+
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+
+	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+
+	if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)
+	{
+		SetFrDs(fctrl);
+	}
+	else if((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE)
+	{
+		SetToDs(fctrl);
+	}
+	
+	if (power_mode)
+	{
+		SetPwrMgt(fctrl);
+	}
+
+	_rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+	pmlmeext->mgnt_seq++;
+	SetFrameSubType(pframe, WIFI_DATA_NULL);
+
+	pframe += sizeof(struct ieee80211_hdr_3addr);
+	pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr);
+
+	pattrib->last_txcmdsz = pattrib->pktlen;
+	dump_mgntframe(padapter, pmgntframe);
+
+	return;
+}
+
+
+void issue_qos_nulldata(_adapter *padapter, unsigned char *da, u16 tid)
+{
+	struct xmit_frame			*pmgntframe;
+	struct pkt_attrib			*pattrib;
+	unsigned char					*pframe;
+	struct ieee80211_hdr	*pwlanhdr;
+	unsigned short				*fctrl, *qc;
+	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	DBG_871X("%s\n", __FUNCTION__);
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(padapter, pattrib);
+
+	pattrib->hdrlen +=2;
+	pattrib->qos_en = _TRUE;
+	pattrib->eosp = 1;
+	pattrib->ack_policy = 0;
+	pattrib->mdata = 0;
+
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+
+	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+
+	if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)
+	{
+		SetFrDs(fctrl);
+	}
+	else if((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE)
+	{
+		SetToDs(fctrl);
+	}
+
+	if(pattrib->mdata)
+		SetMData(fctrl);
+
+	qc = (unsigned short *)(pframe + pattrib->hdrlen - 2);
+	
+	SetPriority(qc, tid);
+
+	SetEOSP(qc, pattrib->eosp);
+
+	SetAckpolicy(qc, pattrib->ack_policy);
+
+	_rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+	pmlmeext->mgnt_seq++;
+	SetFrameSubType(pframe, WIFI_QOS_DATA_NULL);
+
+	pframe += sizeof(struct ieee80211_hdr_3addr_qos);
+	pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr_qos);
+
+	pattrib->last_txcmdsz = pattrib->pktlen;
+	dump_mgntframe(padapter, pmgntframe);
+	
+}
+
+void issue_deauth(_adapter *padapter, unsigned char *da, unsigned short reason)
+{
+	struct xmit_frame			*pmgntframe;
+	struct pkt_attrib			*pattrib;
+	unsigned char					*pframe;
+	struct ieee80211_hdr	*pwlanhdr;
+	unsigned short				*fctrl;
+	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(padapter, pattrib);
+
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+
+	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+
+	_rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+	pmlmeext->mgnt_seq++;
+	SetFrameSubType(pframe, WIFI_DEAUTH);
+
+	pframe += sizeof(struct ieee80211_hdr_3addr);
+	pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr);
+
+	reason = cpu_to_le16(reason);
+	pframe = rtw_set_fixed_ie(pframe, _RSON_CODE_ , (unsigned char *)&reason, &(pattrib->pktlen));
+
+	pattrib->last_txcmdsz = pattrib->pktlen;
+
+	dump_mgntframe(padapter, pmgntframe);
+}
+
+void issue_action_BA(_adapter *padapter, unsigned char *raddr, unsigned char action, unsigned short status)
+{
+	u8	category = WLAN_CATEGORY_BACK;
+	u16	start_seq;
+	u16	BA_para_set;
+	u16	reason_code;
+	u16	BA_timeout_value;
+	u16	BA_starting_seqctrl;
+	struct xmit_frame		*pmgntframe;
+	struct pkt_attrib		*pattrib;
+	u8					*pframe;
+	struct ieee80211_hdr	*pwlanhdr;
+	u16					*fctrl;
+	struct xmit_priv		*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct sta_info		*psta;
+	struct sta_priv		*pstapriv = &padapter->stapriv;
+	struct registry_priv	 	*pregpriv = &padapter->registrypriv;
+
+
+	DBG_871X("%s, category=%d, action=%d, status=%d\n", __FUNCTION__, category, action, status);
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(padapter, pattrib);
+
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+
+	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+
+	//_rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+	pmlmeext->mgnt_seq++;
+	SetFrameSubType(pframe, WIFI_ACTION);
+
+	pframe += sizeof(struct ieee80211_hdr_3addr);
+	pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr);
+
+	pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen));
+
+      status = cpu_to_le16(status);
+	
+
+	if (category == 3)
+	{
+		switch (action)
+		{
+			case 0: //ADDBA req
+				do {
+					pmlmeinfo->dialogToken++;
+				} while (pmlmeinfo->dialogToken == 0);
+				pframe = rtw_set_fixed_ie(pframe, 1, &(pmlmeinfo->dialogToken), &(pattrib->pktlen));
+
+				BA_para_set = (0x1002 | ((status & 0xf) << 2)); //immediate ack & 64 buffer size
+				//sys_mib.BA_para_set = 0x0802; //immediate ack & 32 buffer size
+				BA_para_set = cpu_to_le16(BA_para_set);
+				pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_para_set)), &(pattrib->pktlen));
+
+				//BA_timeout_value = 0xffff;//max: 65535 TUs(~ 65 ms)
+				BA_timeout_value = 5000;//~ 5ms
+				BA_timeout_value = cpu_to_le16(BA_timeout_value);
+				pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_timeout_value)), &(pattrib->pktlen));
+
+				//if ((psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress)) != NULL)
+				if ((psta = rtw_get_stainfo(pstapriv, raddr)) != NULL)
+				{
+					start_seq = (psta->sta_xmitpriv.txseq_tid[status & 0x07]&0xfff) + 1;
+
+					DBG_871X("BA_starting_seqctrl = %d for TID=%d\n", start_seq, status & 0x07);
+					
+					psta->BA_starting_seqctrl[status & 0x07] = start_seq;
+					
+					BA_starting_seqctrl = start_seq << 4;
+				}
+				
+				BA_starting_seqctrl = cpu_to_le16(BA_starting_seqctrl);
+				pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_starting_seqctrl)), &(pattrib->pktlen));
+				break;
+
+			case 1: //ADDBA rsp
+				pframe = rtw_set_fixed_ie(pframe, 1, &(pmlmeinfo->ADDBA_req.dialog_token), &(pattrib->pktlen));
+				pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&status), &(pattrib->pktlen));
+
+				//BA_para_set = cpu_to_le16((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x1000); //64 buffer size
+				BA_para_set = ((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x1000); //64 buffer size
+
+				if(pregpriv->ampdu_amsdu==0)//disabled
+					BA_para_set = cpu_to_le16(BA_para_set & ~BIT(0));
+				else if(pregpriv->ampdu_amsdu==1)//enabled
+					BA_para_set = cpu_to_le16(BA_para_set | BIT(0));
+				else //auto
+					BA_para_set = cpu_to_le16(BA_para_set);
+				
+				pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_para_set)), &(pattrib->pktlen));
+				pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(pmlmeinfo->ADDBA_req.BA_timeout_value)), &(pattrib->pktlen));
+				break;
+			case 2://DELBA
+				BA_para_set = (status & 0x1F) << 3;
+				BA_para_set = cpu_to_le16(BA_para_set);				
+				pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_para_set)), &(pattrib->pktlen));
+
+				reason_code = 37;//Requested from peer STA as it does not want to use the mechanism
+				reason_code = cpu_to_le16(reason_code);
+				pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(reason_code)), &(pattrib->pktlen));
+				break;
+			default:
+				break;
+		}
+	}
+
+	pattrib->last_txcmdsz = pattrib->pktlen;
+
+	dump_mgntframe(padapter, pmgntframe);
+}
+
+static void issue_action_BSSCoexistPacket(_adapter *padapter)
+{	
+	_irqL	irqL;
+	_list		*plist, *phead;
+	unsigned char category, action;
+	struct xmit_frame			*pmgntframe;
+	struct pkt_attrib			*pattrib;
+	unsigned char				*pframe;
+	struct ieee80211_hdr	*pwlanhdr;
+	unsigned short			*fctrl;
+	struct	wlan_network	*pnetwork = NULL;
+	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	_queue		*queue	= &(pmlmepriv->scanned_queue);
+	u8 InfoContent[16] = {0};
+	u8 ICS[8][15];
+	
+	if((pmlmepriv->num_FortyMHzIntolerant==0) || (pmlmepriv->num_sta_no_ht==0))
+		return;
+
+	if(_TRUE == pmlmeinfo->bwmode_updated)
+		return;
+	
+
+	DBG_871X("%s\n", __FUNCTION__);
+
+
+	category = WLAN_CATEGORY_PUBLIC;
+	action = ACT_PUBLIC_BSSCOEXIST;
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(padapter, pattrib);
+
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+
+	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+
+	_rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+	pmlmeext->mgnt_seq++;
+	SetFrameSubType(pframe, WIFI_ACTION);
+
+	pframe += sizeof(struct ieee80211_hdr_3addr);
+	pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr);
+
+	pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen));
+
+
+	//
+	if(pmlmepriv->num_FortyMHzIntolerant>0)
+	{
+		u8 iedata=0;
+		
+		iedata |= BIT(2);//20 MHz BSS Width Request
+
+		pframe = rtw_set_ie(pframe, EID_BSSCoexistence,  1, &iedata, &(pattrib->pktlen));
+		
+	}
+	
+
+	//
+	_rtw_memset(ICS, 0, sizeof(ICS));
+	if(pmlmepriv->num_sta_no_ht>0)
+	{	
+		int i;
+	
+		_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+
+		phead = get_list_head(queue);
+		plist = get_next(phead);
+       
+		while(1)
+		{
+			int len;
+			u8 *p;
+			WLAN_BSSID_EX *pbss_network;
+	
+			if (rtw_end_of_queue_search(phead,plist)== _TRUE)
+				break;		
+
+			pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list);      
+		
+			plist = get_next(plist);
+
+			pbss_network = (WLAN_BSSID_EX *)&pnetwork->network;
+
+			p = rtw_get_ie(pbss_network->IEs + _FIXED_IE_LENGTH_, _HT_CAPABILITY_IE_, &len, pbss_network->IELength - _FIXED_IE_LENGTH_);
+			if((p==NULL) || (len==0))//non-HT
+			{
+				if((pbss_network->Configuration.DSConfig<=0) || (pbss_network->Configuration.DSConfig>14))
+					continue;
+				
+				ICS[0][pbss_network->Configuration.DSConfig]=1;
+				
+				if(ICS[0][0] == 0)
+					ICS[0][0] = 1;		
+			}		
+	
+		}        
+
+		_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+
+
+		for(i= 0;i<8;i++)
+		{
+			if(ICS[i][0] == 1)
+			{
+				int j, k = 0;
+				
+				InfoContent[k] = i;				
+				//SET_BSS_INTOLERANT_ELE_REG_CLASS(InfoContent,i);
+				k++;
+				
+				for(j=1;j<=14;j++)
+				{
+					if(ICS[i][j]==1)
+					{
+						if(k<16)
+						{
+							InfoContent[k] = j; //channel number
+							//SET_BSS_INTOLERANT_ELE_CHANNEL(InfoContent+k, j);
+							k++;
+						}	
+					}	
+				}	
+
+				pframe = rtw_set_ie(pframe, EID_BSSIntolerantChlReport, k, InfoContent, &(pattrib->pktlen));
+				
+			}
+			
+		}
+		
+
+	}
+		
+
+	pattrib->last_txcmdsz = pattrib->pktlen;
+
+	dump_mgntframe(padapter, pmgntframe);
+
+}
+
+unsigned int send_delba(_adapter *padapter, u8 initiator, u8 *addr)
+{
+	struct sta_priv *pstapriv = &padapter->stapriv;
+	struct sta_info *psta = NULL;
+	//struct recv_reorder_ctrl *preorder_ctrl;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	u16 tid;
+
+	if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE)	
+		if (!(pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS))
+			return _SUCCESS;
+	
+	psta = rtw_get_stainfo(pstapriv, addr);
+	if(psta==NULL)
+		return _SUCCESS;
+
+	//DBG_8192C("%s:%s\n", __FUNCTION__, (initiator==0)?"RX_DIR":"TX_DIR");
+	
+	if(initiator==0) // recipient
+	{
+		for(tid = 0;tid<MAXTID;tid++)
+		{
+			if(psta->recvreorder_ctrl[tid].enable == _TRUE)
+			{
+				DBG_8192C("rx agg disable tid(%d)\n",tid);
+				issue_action_BA(padapter, addr, WLAN_ACTION_DELBA, (((tid <<1) |initiator)&0x1F));
+				psta->recvreorder_ctrl[tid].enable = _FALSE;
+				psta->recvreorder_ctrl[tid].indicate_seq = 0xffff;
+				#ifdef DBG_RX_SEQ
+				DBG_871X("DBG_RX_SEQ %s:%d indicate_seq:%u \n", __FUNCTION__, __LINE__,
+					psta->recvreorder_ctrl[tid].indicate_seq);
+				#endif
+			}		
+		}
+	}
+	else if(initiator == 1)// originator
+	{
+		//DBG_8192C("tx agg_enable_bitmap(0x%08x)\n", psta->htpriv.agg_enable_bitmap);
+		for(tid = 0;tid<MAXTID;tid++)
+		{
+			if(psta->htpriv.agg_enable_bitmap & BIT(tid))
+			{
+				DBG_8192C("tx agg disable tid(%d)\n",tid);
+				issue_action_BA(padapter, addr, WLAN_ACTION_DELBA, (((tid <<1) |initiator)&0x1F) );
+				psta->htpriv.agg_enable_bitmap &= ~BIT(tid);
+				psta->htpriv.candidate_tid_bitmap &= ~BIT(tid);
+				
+			}			
+		}
+	}
+	
+	return _SUCCESS;
+	
+}
+
+unsigned int send_beacon(_adapter *padapter)
+{
+	u8	bxmitok = _FALSE;
+	int	retry=0;
+
+#ifdef CONFIG_PCI_HCI
+
+	//DBG_871X("%s\n", __FUNCTION__);
+
+	issue_beacon(padapter);
+
+	return _SUCCESS;
+
+#endif
+
+#ifdef CONFIG_USB_HCI
+	do{
+
+		issue_beacon(padapter);
+
+		padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_TX_BCN_DONE, (u8 *)(&bxmitok));
+
+	}while((_FALSE == bxmitok) &&((retry++)<100 ));
+
+	if(retry == 100)
+	{
+		DBG_871X("send_beacon, fail!\n");
+		return _FAIL;
+	}
+	else
+	{
+		return _SUCCESS;
+	}
+#endif	
+	
+}
+
+/****************************************************************************
+
+Following are some utitity fuctions for WiFi MLME
+
+*****************************************************************************/
+
+BOOLEAN IsLegal5GChannel(
+	IN PADAPTER			Adapter,
+	IN u8			channel)
+{
+	
+	int i=0;
+	u8 Channel_5G[45] = {36,38,40,42,44,46,48,50,52,54,56,58,
+		60,62,64,100,102,104,106,108,110,112,114,116,118,120,122,
+		124,126,128,130,132,134,136,138,140,149,151,153,155,157,159,
+		161,163,165};
+	for(i=0;i<sizeof(Channel_5G);i++)
+		if(channel == Channel_5G[i])
+			return _TRUE;
+	return _FALSE;
+}
+
+void site_survey(_adapter *padapter)
+{
+	unsigned char		survey_channel, val8;
+	RT_SCAN_TYPE	ScanType;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	u32 initialgain = 0;
+#ifdef CONFIG_P2P
+	struct wifidirect_info *pwdinfo= &(padapter->wdinfo);
+	static unsigned char  prev_survey_channel = 0;
+	static unsigned int p2p_scan_count = 0;	
+#endif //CONFIG_P2P
+	
+#ifdef CONFIG_TDLS
+	u32 v, bit_6=1<<6;
+	if(pmlmeinfo->tdls_dis_req==1){ 
+		SelectChannel(padapter, pmlmeext->cur_channel);
+
+		val8 = 0;
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
+
+		//when we already set at a direct link and also want to dicovery TDLS STAs
+		//it is used to avoiding RCR DATA BIT on
+		v = rtw_read32(padapter, 0x0608);
+		v &= ~(bit_6);
+		rtw_write32(padapter, 0x0608, v);
+
+		issue_tdls_dis_req(padapter);
+
+		set_survey_timer(pmlmeext, 300);
+
+		pmlmeinfo->tdls_dis_req=2;
+		return;
+	}
+	else if(pmlmeinfo->tdls_dis_req==2){
+		pmlmeinfo->tdls_dis_req=3;
+
+		//config MSR
+		Set_NETYPE0_MSR(padapter, (pmlmeinfo->state & 0x3));
+
+		initialgain = 0xff; //restore RX GAIN
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain));	
+		
+
+		//turn on dynamic functions
+		Restore_DM_Func_Flag(padapter);
+
+		report_surveydone_event(padapter);
+		
+		pmlmeext->chan_scan_time = SURVEY_TO;
+		pmlmeext->sitesurvey_res.state = SCAN_DISABLE;
+		return;
+	}
+#endif
+
+#ifdef CONFIG_P2P
+	survey_channel = 0;
+	ScanType = SCAN_PASSIVE;
+	
+	if ( pwdinfo->p2p_state == P2P_STATE_FIND_PHASE_SEARCH )
+	{
+		if ( pwdinfo->find_phase_state_exchange_cnt != 0 )
+		{
+			//	Commented by Albert 2011/06/03
+			//	The driver is in the find phase, it should go through the social channel.
+			survey_channel = pwdinfo->social_chan[pmlmeext->sitesurvey_res.channel_idx];
+			ScanType = SCAN_ACTIVE;
+		}
+		else
+		{
+			//	Commented by Albert 2011/06/03
+			//	The driver is in the scan phase, it should go through all the channel.
+			survey_channel = pmlmeext->channel_set[pmlmeext->sitesurvey_res.channel_idx].ChannelNum;
+			ScanType = pmlmeext->channel_set[pmlmeext->sitesurvey_res.channel_idx].ScanType;
+		}
+	}
+	else if ( ( P2P_STATE_NONE == pwdinfo->p2p_state ) || ( P2P_STATE_IDLE == pwdinfo->p2p_state ) )
+	{
+		//	Commented by Albert 20110805
+		//	The following code will be executed only when the P2P is disable.
+		survey_channel = pmlmeext->channel_set[pmlmeext->sitesurvey_res.channel_idx].ChannelNum;
+		ScanType = pmlmeext->channel_set[pmlmeext->sitesurvey_res.channel_idx].ScanType;
+	}
+#else
+	{
+		survey_channel = pmlmeext->channel_set[pmlmeext->sitesurvey_res.channel_idx].ChannelNum;
+		ScanType = pmlmeext->channel_set[pmlmeext->sitesurvey_res.channel_idx].ScanType;
+	}
+#endif //CONFIG_P2P
+
+	if(survey_channel != 0)
+	{
+
+		//DBG_871X("switching to channel:%d at %dms\n", 
+		//	survey_channel, rtw_get_passing_time_ms(padapter->mlmepriv.scan_start_time)
+		//);
+		//PAUSE 4-AC Queue when site_survey
+		//padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_TXPAUSE, (u8 *)(&val8));
+		//val8 |= 0x0f;
+		//padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_TXPAUSE, (u8 *)(&val8));
+
+		if(pmlmeext->sitesurvey_res.channel_idx == 0)
+		{
+			set_channel_bwmode(padapter, survey_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20);
+		}
+		else
+		{
+			SelectChannel(padapter, survey_channel);
+		}
+
+#ifdef CONFIG_TDLS
+		if(pmlmeinfo->tdls_ch_sensing==1)
+			pmlmeinfo->tdls_cur_channel =survey_channel;
+#endif
+
+		//DBG_871X("%s scan_mode:%d, ScanType:%d\n", __FUNCTION__, pmlmeext->sitesurvey_res.scan_mode, ScanType);
+		if((pmlmeext->sitesurvey_res.scan_mode == SCAN_ACTIVE) && (ScanType == SCAN_ACTIVE))
+		{
+		
+#ifdef CONFIG_P2P
+			if ( ( pwdinfo->p2p_state == P2P_STATE_SCAN ) || 
+				( pwdinfo->p2p_state == P2P_STATE_FIND_PHASE_SEARCH )
+			   )
+			{
+				issue_probereq_p2p(padapter);
+				issue_probereq_p2p(padapter);
+				issue_probereq_p2p(padapter);
+			}
+			else
+#endif //CONFIG_P2P
+			{
+				int i;
+				for(i=0;i<RTW_SSID_SCAN_AMOUNT;i++){
+					if(pmlmeext->sitesurvey_res.ssid[i].SsidLength) {
+						//todo: to issue two probe req???
+						issue_probereq(padapter, &(pmlmeext->sitesurvey_res.ssid[i]),1);
+						//rtw_msleep_os(SURVEY_TO>>1);
+						issue_probereq(padapter, &(pmlmeext->sitesurvey_res.ssid[i]),1);
+					}
+				}
+				//todo: to issue two probe req???
+				issue_probereq(padapter, NULL, 1);
+				//rtw_msleep_os(SURVEY_TO>>1);
+				issue_probereq(padapter, NULL, 1);
+			}
+		}
+
+		set_survey_timer(pmlmeext, pmlmeext->chan_scan_time);
+
+	}
+	else
+	{
+
+		//	channel number is 0 or this channel is not valid.
+#ifdef CONFIG_P2P
+		if ( ( pwdinfo->p2p_state == P2P_STATE_SCAN ) || ( pwdinfo->p2p_state == P2P_STATE_FIND_PHASE_SEARCH ) )
+		{
+			DBG_8192C( "[%s] find phase exchange cnt = %d\n", __FUNCTION__, pwdinfo->find_phase_state_exchange_cnt );
+		}
+		
+		if ( ( ( pwdinfo->p2p_state == P2P_STATE_SCAN ) || ( pwdinfo->p2p_state == P2P_STATE_FIND_PHASE_SEARCH ) ) && 
+			( pwdinfo->find_phase_state_exchange_cnt < P2P_FINDPHASE_EX_CNT ) )
+		{
+			//	Set the P2P State to the listen state of find phase and set the current channel to the listen channel
+			pwdinfo->p2p_state = P2P_STATE_FIND_PHASE_LISTEN;
+			pmlmeext->sitesurvey_res.state = SCAN_DISABLE;
+			set_channel_bwmode(padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20);
+			_set_timer( &pwdinfo->find_phase_timer, ( u32 ) ( ( u32 ) ( pwdinfo->listen_dwell ) * 100 ) );
+		}
+		else
+#endif //CONFIG_P2P
+
+		{
+
+#ifdef CONFIG_ANTENNA_DIVERSITY
+			// 20100721:Interrupt scan operation here.
+			// For SW antenna diversity before link, it needs to switch to another antenna and scan again.
+			// It compares the scan result and select beter one to do connection.
+			if(padapter->HalFunc.SwAntDivBeforeLinkHandler(padapter))
+			{				
+				pmlmeext->sitesurvey_res.bss_cnt = 0;
+				pmlmeext->sitesurvey_res.channel_idx = -1;
+				pmlmeext->chan_scan_time = SURVEY_TO /2;			
+				set_survey_timer(pmlmeext, pmlmeext->chan_scan_time);
+				return;
+			}
+#endif
+
+#ifdef CONFIG_P2P
+			if ( ( pwdinfo->p2p_state == P2P_STATE_SCAN ) || ( pwdinfo->p2p_state == P2P_STATE_FIND_PHASE_SEARCH ) )
+			{
+				pwdinfo->p2p_state = P2P_STATE_LISTEN;
+			}
+#endif //CONFIG_P2P
+			
+			pmlmeext->sitesurvey_res.state = SCAN_COMPLETE;
+
+			//switch back to the original channel
+			//SelectChannel(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset);
+
+#ifdef CONFIG_P2P
+			if ( pwdinfo->p2p_state == P2P_STATE_GONEGO_OK )
+			{
+				DBG_8192C( "[%s] In P2P WPS mode, stay in the peer operating channel = %d\n", __FUNCTION__,  pwdinfo->peer_operating_ch );
+				set_channel_bwmode(padapter, pwdinfo->peer_operating_ch, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
+			}
+			else
+#endif //CONFIG_P2P
+			{
+				set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
+			}
+
+			//flush 4-AC Queue after site_survey
+			//val8 = 0;
+			//padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_TXPAUSE, (u8 *)(&val8));
+
+			val8 = 0;
+			padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
+
+			//config MSR
+			Set_NETYPE0_MSR(padapter, (pmlmeinfo->state & 0x3));
+
+			initialgain = 0xff; //restore RX GAIN
+			padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain));	
+			//turn on dynamic functions
+			Restore_DM_Func_Flag(padapter);
+			//Switch_DM_Func(padapter, DYNAMIC_FUNC_DIG|DYNAMIC_FUNC_HP|DYNAMIC_FUNC_SS, _TRUE);
+
+			if (is_client_associated_to_ap(padapter) == _TRUE)
+			{
+				//issue null data 
+				issue_nulldata(padapter, 0);
+			}
+
+#ifdef CONFIG_TDLS
+			if(pmlmeinfo->tdls_ch_sensing==1){
+				u8 i, min;
+				pmlmeinfo->tdls_ch_sensing=0;
+				pmlmeinfo->tdls_cur_channel=1;
+				min=pmlmeinfo->tdls_collect_pkt_num[0];
+				for(i=1; i<14-1; i++){
+					if(min > pmlmeinfo->tdls_collect_pkt_num[i]){
+						pmlmeinfo->tdls_cur_channel=i+1;
+						min=pmlmeinfo->tdls_collect_pkt_num[i];
+					}
+					pmlmeinfo->tdls_collect_pkt_num[i]=0;
+				}
+				pmlmeinfo->tdls_collect_pkt_num[0]=0;
+				pmlmeinfo->tdls_candidate_ch=pmlmeinfo->tdls_cur_channel;
+				DBG_8192C("TDLS channel sensing done, candidate channel: %02x\n", pmlmeinfo->tdls_candidate_ch);
+				pmlmeinfo->tdls_cur_channel=0;
+
+				// If we support TDLS, then when we finished site survey,
+				// we stil turn RCR_CBSSID_DATA off,
+				// such we can receive all kinds of data frames.
+				v = rtw_read32(padapter, 0x0608);
+				bit_6=1<<6;
+				v &= ~(bit_6);
+				rtw_write32(padapter, 0x0608, v);
+			}
+#else
+			report_surveydone_event(padapter);
+#endif
+			pmlmeext->chan_scan_time = SURVEY_TO;
+			pmlmeext->sitesurvey_res.state = SCAN_DISABLE;
+
+			issue_action_BSSCoexistPacket(padapter);
+			issue_action_BSSCoexistPacket(padapter);
+			issue_action_BSSCoexistPacket(padapter);
+
+		}
+
+	}
+
+	return;
+
+}
+
+//collect bss info from Beacon and Probe response frames.
+u8 collect_bss_info(_adapter *padapter, union recv_frame *precv_frame, WLAN_BSSID_EX *bssid)
+{
+	int	i;
+	u32	len;
+	u8	*p;
+	u16	val16, subtype;
+	u8	*pframe = precv_frame->u.hdr.rx_data;
+	u32	packet_len = precv_frame->u.hdr.len;
+	struct registry_priv 	*pregistrypriv = &padapter->registrypriv;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	len = packet_len - sizeof(struct ieee80211_hdr_3addr);
+
+	if (len > MAX_IE_SZ)
+	{
+		//DBG_8192C("IE too long for survey event\n");
+		return _FAIL;
+	}
+
+	_rtw_memset(bssid, 0, sizeof(WLAN_BSSID_EX));
+
+	subtype = GetFrameSubType(pframe) >> 4;
+
+	if(subtype==WIFI_BEACON)
+		bssid->Reserved[0] = 1;
+		
+	bssid->Length = sizeof(WLAN_BSSID_EX) - MAX_IE_SZ + len;
+
+	//below is to copy the information element
+	bssid->IELength = len;
+	_rtw_memcpy(bssid->IEs, (pframe + sizeof(struct ieee80211_hdr_3addr)), bssid->IELength);
+
+	//get the signal strength
+	bssid->PhyInfo.SignalQuality = precv_frame->u.hdr.attrib.signal_qual;//in percentage 
+	bssid->PhyInfo.SignalStrength = precv_frame->u.hdr.attrib.signal_strength;//in percentage
+	bssid->Rssi = precv_frame->u.hdr.attrib.RecvSignalPower; // in dBM.raw data
+	
+#ifdef CONFIG_ANTENNA_DIVERSITY
+	//padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_CURRENT_ANTENNA, (u8 *)(&bssid->PhyInfo.Optimum_antenna));
+	padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_CURRENT_ANTENNA,  &bssid->PhyInfo.Optimum_antenna);
+#endif
+
+	// checking SSID
+	if ((p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _SSID_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_)) == NULL)
+	{
+		DBG_871X("marc: cannot find SSID for survey event\n");
+		return _FAIL;
+	}
+
+	if (*(p + 1))
+	{
+		_rtw_memcpy(bssid->Ssid.Ssid, (p + 2), *(p + 1));
+		bssid->Ssid.SsidLength = *(p + 1);
+	}
+	else
+	{
+		bssid->Ssid.SsidLength = 0;
+	}
+
+	_rtw_memset(bssid->SupportedRates, 0, NDIS_802_11_LENGTH_RATES_EX);
+
+	//checking rate info...
+	i = 0;
+	p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _SUPPORTEDRATES_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_);
+	if (p != NULL)
+	{
+		_rtw_memcpy(bssid->SupportedRates, (p + 2), len);
+		i = len;
+	}
+
+	p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _EXT_SUPPORTEDRATES_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_);
+	if (p != NULL)
+	{
+		_rtw_memcpy(bssid->SupportedRates + i, (p + 2), len);
+	}
+
+	//todo:
+#if 0
+	if (judge_network_type(bssid->SupportedRates, (len + i)) == WIRELESS_11B)
+	{
+		bssid->NetworkTypeInUse = Ndis802_11DS;
+	}
+	else
+#endif
+	{
+		bssid->NetworkTypeInUse = Ndis802_11OFDM24;
+	}
+
+	// Checking for DSConfig
+	p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _DSSET_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_);
+
+	bssid->Configuration.DSConfig = 0;
+	bssid->Configuration.Length = 0;
+
+	if (p)
+	{
+		bssid->Configuration.DSConfig = *(p + 2);
+	}
+	else
+	{// In 5G, some ap do not have DSSET IE
+		// checking HT info for channel
+		p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _HT_ADD_INFO_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_);
+		if(p)
+		{
+			struct HT_info_element *HT_info = (struct HT_info_element *)(p + 2);
+			bssid->Configuration.DSConfig = HT_info->primary_channel;
+		}
+		else
+		{ // use current channel
+			if (padapter->mlmeextpriv.sitesurvey_res.state == SCAN_PROCESS)
+				bssid->Configuration.DSConfig = padapter->mlmeextpriv.channel_set[padapter->mlmeextpriv.sitesurvey_res.channel_idx].ChannelNum;
+			else
+				bssid->Configuration.DSConfig = padapter->mlmeextpriv.cur_channel;
+		}
+	}
+
+	_rtw_memcpy(&bssid->Configuration.BeaconPeriod, rtw_get_beacon_interval_from_ie(bssid->IEs), 2);
+
+
+	bssid->Configuration.BeaconPeriod = le32_to_cpu(bssid->Configuration.BeaconPeriod);
+
+	val16 = rtw_get_capability((WLAN_BSSID_EX *)bssid);
+
+	if (val16 & BIT(0))
+	{
+		bssid->InfrastructureMode = Ndis802_11Infrastructure;
+		_rtw_memcpy(bssid->MacAddress, GetAddr2Ptr(pframe), ETH_ALEN);
+	}
+	else
+	{
+		bssid->InfrastructureMode = Ndis802_11IBSS;
+		_rtw_memcpy(bssid->MacAddress, GetAddr3Ptr(pframe), ETH_ALEN);
+	}
+
+	if (val16 & BIT(4))
+		bssid->Privacy = 1;
+	else
+		bssid->Privacy = 0;
+
+	bssid->Configuration.ATIMWindow = 0;
+
+	//20/40 BSS Coexistence check
+	if((pregistrypriv->wifi_spec==1) && (_FALSE == pmlmeinfo->bwmode_updated))
+	{	
+		struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+		
+		p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _HT_CAPABILITY_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_);
+		if(p && len>0)
+		{
+			struct HT_caps_element	*pHT_caps;
+			pHT_caps = (struct HT_caps_element	*)(p + 2);
+			
+			if(pHT_caps->HT_cap_element.HT_caps_info&BIT(14))
+			{				
+				pmlmepriv->num_FortyMHzIntolerant++;
+			}
+		}
+		else
+		{
+			pmlmepriv->num_sta_no_ht++;
+		}
+		
+	}
+
+
+	#if defined(DBG_RX_SIGNAL_DISPLAY_PROCESSING) & 1
+	if(strcmp(bssid->Ssid.Ssid, DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) == 0) {
+		DBG_871X("Receiving %s("MAC_FMT", DSConfig:%u) from ch%u with ss:%3u, sq:%3u, RawRSSI:%3ld\n"
+			, bssid->Ssid.Ssid, MAC_ARG(bssid->MacAddress), bssid->Configuration.DSConfig
+			, padapter->mlmeextpriv.channel_set[padapter->mlmeextpriv.sitesurvey_res.channel_idx].ChannelNum
+			, bssid->PhyInfo.SignalStrength, bssid->PhyInfo.SignalQuality, bssid->Rssi
+		);
+	}
+	#endif
+		
+	// mark bss info receving from nearby channel as SignalQuality 101
+	if(bssid->Configuration.DSConfig != padapter->mlmeextpriv.channel_set[padapter->mlmeextpriv.sitesurvey_res.channel_idx].ChannelNum)
+	{
+		bssid->PhyInfo.SignalQuality= 101;
+	}
+
+	return _SUCCESS;
+
+}
+
+void start_create_ibss(_adapter* padapter)
+{
+	unsigned short	caps;
+	u32	val32;
+	u8	val8;
+	u8	join_type;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX		*pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network));
+	pmlmeext->cur_channel = (u8)pnetwork->Configuration.DSConfig;
+	pmlmeinfo->bcn_interval = get_beacon_interval(pnetwork);
+
+	//update wireless mode
+	update_wireless_mode(padapter);
+
+	//udpate capability
+	caps = rtw_get_capability((WLAN_BSSID_EX *)pnetwork);
+	update_capinfo(padapter, caps);
+	if(caps&cap_IBSS)//adhoc master
+	{
+		//set_opmode_cmd(padapter, adhoc);//removed
+
+		val8 = 0xcf;
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8));
+
+		//switch channel
+		//SelectChannel(padapter, pmlmeext->cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE);
+		set_channel_bwmode(padapter, pmlmeext->cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20);
+
+		beacon_timing_control(padapter);
+
+		//set msr to WIFI_FW_ADHOC_STATE
+		pmlmeinfo->state = WIFI_FW_ADHOC_STATE;
+		Set_NETYPE0_MSR(padapter, (pmlmeinfo->state & 0x3));
+
+		//issue beacon
+		if(send_beacon(padapter)==_FAIL)
+		{
+			RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("issuing beacon frame fail....\n"));
+
+			report_join_res(padapter, -1);
+			pmlmeinfo->state = WIFI_FW_NULL_STATE;
+		}
+		else
+		{			
+			padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BSSID, padapter->registrypriv.dev_network.MacAddress);
+			join_type = 0;
+			padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
+	
+			report_join_res(padapter, 1);
+			pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS;
+		}
+	}
+	else
+	{
+		DBG_871X("start_create_ibss, invalid cap:%x\n", caps);
+		return;
+	}
+
+}
+
+void start_clnt_join(_adapter* padapter)
+{
+	unsigned short	caps;
+	u8	val8;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX		*pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network));
+
+
+	pmlmeext->cur_channel = (u8)pnetwork->Configuration.DSConfig;
+	pmlmeinfo->bcn_interval = get_beacon_interval(pnetwork);
+
+	//update wireless mode
+	update_wireless_mode(padapter);
+
+	//udpate capability
+	caps = rtw_get_capability((WLAN_BSSID_EX *)pnetwork);
+	update_capinfo(padapter, caps);
+	if (caps&cap_ESS)
+	{
+		Set_NETYPE0_MSR(padapter, WIFI_FW_STATION_STATE);
+
+		val8 = (pmlmeinfo->auth_algo == dot11AuthAlgrthm_8021X)? 0xcc: 0xcf;
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8));
+
+		//switch channel
+		set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
+
+		//here wait for receiving the beacon to start auth
+		//and enable a timer
+		set_link_timer(pmlmeext, decide_wait_for_beacon_timeout(pmlmeinfo->bcn_interval));
+
+		pmlmeinfo->state = WIFI_FW_AUTH_NULL | WIFI_FW_STATION_STATE;
+	}
+	else if (caps&cap_IBSS) //adhoc client
+	{
+		Set_NETYPE0_MSR(padapter, WIFI_FW_ADHOC_STATE);
+
+		val8 = 0xcf;
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8));
+
+		//switch channel
+		set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
+
+		beacon_timing_control(padapter);
+
+		pmlmeinfo->state = WIFI_FW_ADHOC_STATE;
+
+		report_join_res(padapter, 1);
+	}
+	else
+	{
+		//DBG_8192C("marc: invalid cap:%x\n", caps);
+		return;
+	}
+
+}
+
+void start_clnt_auth(_adapter* padapter)
+{
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	_cancel_timer_ex(&pmlmeext->link_timer);
+
+	pmlmeinfo->state &= (~WIFI_FW_AUTH_NULL);
+	pmlmeinfo->state |= WIFI_FW_AUTH_STATE;
+
+	pmlmeinfo->auth_seq = 1;
+	pmlmeinfo->reauth_count = 0;
+	pmlmeinfo->reassoc_count = 0;
+	pmlmeinfo->link_count = 0;
+
+	issue_auth(padapter, NULL, 0);
+
+	set_link_timer(pmlmeext, REAUTH_TO);
+
+}
+
+
+void start_clnt_assoc(_adapter* padapter)
+{
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	_cancel_timer_ex(&pmlmeext->link_timer);
+
+	pmlmeinfo->state &= (~(WIFI_FW_AUTH_NULL | WIFI_FW_AUTH_STATE));
+	pmlmeinfo->state |= (WIFI_FW_AUTH_SUCCESS | WIFI_FW_ASSOC_STATE);
+
+	issue_assocreq(padapter);
+
+	set_link_timer(pmlmeext, REASSOC_TO);
+}
+
+unsigned int receive_disconnect(_adapter *padapter, unsigned char *MacAddr, unsigned short reason)
+{
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	//check A3
+	if (!(_rtw_memcmp(MacAddr, get_my_bssid(&pmlmeinfo->network), ETH_ALEN)))
+		return _SUCCESS;
+
+	DBG_871X("%s\n", __FUNCTION__);
+
+	if((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE)
+	{
+		if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)
+		{
+			pmlmeinfo->state = WIFI_FW_NULL_STATE;
+			report_del_sta_event(padapter, MacAddr, reason);
+		}
+		else if (pmlmeinfo->state & WIFI_FW_LINKING_STATE)
+		{
+			pmlmeinfo->state = WIFI_FW_NULL_STATE;
+			report_join_res(padapter, -2);
+		}
+	}
+
+	return _SUCCESS;
+}
+
+/****************************************************************************
+
+Following are the functions to report events
+
+*****************************************************************************/
+
+void report_survey_event(_adapter *padapter, union recv_frame *precv_frame)
+{
+	struct cmd_obj *pcmd_obj;
+	u8	*pevtcmd;
+	u32 cmdsz;
+	struct survey_event	*psurvey_evt;
+	struct C2HEvent_Header *pc2h_evt_hdr;
+	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+	struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
+	//u8 *pframe = precv_frame->u.hdr.rx_data;
+	//uint len = precv_frame->u.hdr.len;
+#ifdef CONFIG_TDLS
+	struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
+	u8 *pframe = get_recvframe_data(precv_frame);
+#endif
+	if ((pcmd_obj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL)
+	{
+		return;
+	}
+
+	cmdsz = (sizeof(struct survey_event) + sizeof(struct C2HEvent_Header));
+	if ((pevtcmd = (u8*)rtw_zmalloc(cmdsz)) == NULL)
+	{
+		rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj));
+		return;
+	}
+
+	_rtw_init_listhead(&pcmd_obj->list);
+
+	pcmd_obj->cmdcode = GEN_CMD_CODE(_Set_MLME_EVT);
+	pcmd_obj->cmdsz = cmdsz;
+	pcmd_obj->parmbuf = pevtcmd;
+
+	pcmd_obj->rsp = NULL;
+	pcmd_obj->rspsz  = 0;
+
+	pc2h_evt_hdr = (struct C2HEvent_Header*)(pevtcmd);
+	pc2h_evt_hdr->len = sizeof(struct survey_event);
+	pc2h_evt_hdr->ID = GEN_EVT_CODE(_Survey);
+	pc2h_evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq);
+
+	psurvey_evt = (struct survey_event*)(pevtcmd + sizeof(struct C2HEvent_Header));
+
+#ifdef CONFIG_TDLS
+	//when tdls_dis_req is on, it would only report STAs who respond TDLS discovery response frame
+	if((pmlmeinfo->tdls_dis_req==1 || pmlmeinfo->tdls_dis_req==2)){
+		if(*(pframe+24)==0x04 && *(pframe+25)==TDLS_DISCOVERY_RESPONSE){
+			if (collect_tdls_info(padapter, precv_frame, (WLAN_BSSID_EX *)&psurvey_evt->bss) == _FAIL){
+				rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj));
+				rtw_mfree((u8 *)pevtcmd, cmdsz);
+				return;
+			}
+		}
+	}else 
+#endif
+	if (collect_bss_info(padapter, precv_frame, (WLAN_BSSID_EX *)&psurvey_evt->bss) == _FAIL)
+	{
+		rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj));
+		rtw_mfree((u8 *)pevtcmd, cmdsz);
+		return;
+	}
+
+	rtw_enqueue_cmd(pcmdpriv, pcmd_obj);
+
+	pmlmeext->sitesurvey_res.bss_cnt++;
+
+	return;
+
+}
+
+void report_surveydone_event(_adapter *padapter)
+{
+	struct cmd_obj *pcmd_obj;
+	u8	*pevtcmd;
+	u32 cmdsz;
+	struct surveydone_event *psurveydone_evt;
+	struct C2HEvent_Header	*pc2h_evt_hdr;
+	struct mlme_ext_priv		*pmlmeext = &padapter->mlmeextpriv;
+	struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
+
+	if ((pcmd_obj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL)
+	{
+		return;
+	}
+
+	cmdsz = (sizeof(struct surveydone_event) + sizeof(struct C2HEvent_Header));
+	if ((pevtcmd = (u8*)rtw_zmalloc(cmdsz)) == NULL)
+	{
+		rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj));
+		return;
+	}
+
+	_rtw_init_listhead(&pcmd_obj->list);
+
+	pcmd_obj->cmdcode = GEN_CMD_CODE(_Set_MLME_EVT);
+	pcmd_obj->cmdsz = cmdsz;
+	pcmd_obj->parmbuf = pevtcmd;
+
+	pcmd_obj->rsp = NULL;
+	pcmd_obj->rspsz  = 0;
+
+	pc2h_evt_hdr = (struct C2HEvent_Header*)(pevtcmd);
+	pc2h_evt_hdr->len = sizeof(struct surveydone_event);
+	pc2h_evt_hdr->ID = GEN_EVT_CODE(_SurveyDone);
+	pc2h_evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq);
+
+	psurveydone_evt = (struct surveydone_event*)(pevtcmd + sizeof(struct C2HEvent_Header));
+	psurveydone_evt->bss_cnt = pmlmeext->sitesurvey_res.bss_cnt;
+
+	DBG_871X("survey done event(%x)\n", psurveydone_evt->bss_cnt);
+
+	rtw_enqueue_cmd(pcmdpriv, pcmd_obj);
+
+	return;
+
+}
+
+void report_join_res(_adapter *padapter, int res)
+{
+	struct cmd_obj *pcmd_obj;
+	u8	*pevtcmd;
+	u32 cmdsz;
+	struct joinbss_event		*pjoinbss_evt;
+	struct C2HEvent_Header	*pc2h_evt_hdr;
+	struct mlme_ext_priv		*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
+
+	if ((pcmd_obj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL)
+	{
+		return;
+	}
+
+	cmdsz = (sizeof(struct joinbss_event) + sizeof(struct C2HEvent_Header));
+	if ((pevtcmd = (u8*)rtw_zmalloc(cmdsz)) == NULL)
+	{
+		rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj));
+		return;
+	}
+
+	_rtw_init_listhead(&pcmd_obj->list);
+
+	pcmd_obj->cmdcode = GEN_CMD_CODE(_Set_MLME_EVT);
+	pcmd_obj->cmdsz = cmdsz;
+	pcmd_obj->parmbuf = pevtcmd;
+
+	pcmd_obj->rsp = NULL;
+	pcmd_obj->rspsz  = 0;
+
+	pc2h_evt_hdr = (struct C2HEvent_Header*)(pevtcmd);
+	pc2h_evt_hdr->len = sizeof(struct joinbss_event);
+	pc2h_evt_hdr->ID = GEN_EVT_CODE(_JoinBss);
+	pc2h_evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq);
+
+	pjoinbss_evt = (struct joinbss_event*)(pevtcmd + sizeof(struct C2HEvent_Header));
+	_rtw_memcpy((unsigned char *)(&(pjoinbss_evt->network.network)), &(pmlmeinfo->network), sizeof(WLAN_BSSID_EX));
+	pjoinbss_evt->network.join_res 	= pjoinbss_evt->network.aid = res;
+
+	DBG_871X("report_join_res(%d)\n", res);
+
+	
+	rtw_joinbss_event_prehandle(padapter, (u8 *)&pjoinbss_evt->network);
+	
+
+	rtw_enqueue_cmd(pcmdpriv, pcmd_obj);
+
+	return;
+
+}
+
+void report_del_sta_event(_adapter *padapter, unsigned char* MacAddr, unsigned short reason)
+{
+	struct cmd_obj *pcmd_obj;
+	u8	*pevtcmd;
+	u32 cmdsz;
+	struct stadel_event			*pdel_sta_evt;
+	struct C2HEvent_Header	*pc2h_evt_hdr;
+	struct mlme_ext_priv		*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
+
+	if ((pcmd_obj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL)
+	{
+		return;
+	}
+
+	cmdsz = (sizeof(struct stadel_event) + sizeof(struct C2HEvent_Header));
+	if ((pevtcmd = (u8*)rtw_zmalloc(cmdsz)) == NULL)
+	{
+		rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj));
+		return;
+	}
+
+	_rtw_init_listhead(&pcmd_obj->list);
+
+	pcmd_obj->cmdcode = GEN_CMD_CODE(_Set_MLME_EVT);
+	pcmd_obj->cmdsz = cmdsz;
+	pcmd_obj->parmbuf = pevtcmd;
+
+	pcmd_obj->rsp = NULL;
+	pcmd_obj->rspsz  = 0;
+
+	pc2h_evt_hdr = (struct C2HEvent_Header*)(pevtcmd);
+	pc2h_evt_hdr->len = sizeof(struct stadel_event);
+	pc2h_evt_hdr->ID = GEN_EVT_CODE(_DelSTA);
+	pc2h_evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq);
+
+	pdel_sta_evt = (struct stadel_event*)(pevtcmd + sizeof(struct C2HEvent_Header));
+	_rtw_memcpy((unsigned char *)(&(pdel_sta_evt->macaddr)), MacAddr, ETH_ALEN);
+	_rtw_memcpy((unsigned char *)(pdel_sta_evt->rsvd),(unsigned char *)(&reason),2);
+
+	DBG_871X("rtl8192: delete STA\n");
+
+	rtw_enqueue_cmd(pcmdpriv, pcmd_obj);
+
+	return;
+}
+
+void report_add_sta_event(_adapter *padapter, unsigned char* MacAddr, int cam_idx)
+{
+	struct cmd_obj *pcmd_obj;
+	u8	*pevtcmd;
+	u32 cmdsz;
+	struct stassoc_event		*padd_sta_evt;
+	struct C2HEvent_Header	*pc2h_evt_hdr;
+	struct mlme_ext_priv		*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
+
+	if ((pcmd_obj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL)
+	{
+		return;
+	}
+
+	cmdsz = (sizeof(struct stassoc_event) + sizeof(struct C2HEvent_Header));
+	if ((pevtcmd = (u8*)rtw_zmalloc(cmdsz)) == NULL)
+	{
+		rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj));
+		return;
+	}
+
+	_rtw_init_listhead(&pcmd_obj->list);
+
+	pcmd_obj->cmdcode = GEN_CMD_CODE(_Set_MLME_EVT);
+	pcmd_obj->cmdsz = cmdsz;
+	pcmd_obj->parmbuf = pevtcmd;
+
+	pcmd_obj->rsp = NULL;
+	pcmd_obj->rspsz  = 0;
+
+	pc2h_evt_hdr = (struct C2HEvent_Header*)(pevtcmd);
+	pc2h_evt_hdr->len = sizeof(struct stassoc_event);
+	pc2h_evt_hdr->ID = GEN_EVT_CODE(_AddSTA);
+	pc2h_evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq);
+
+	padd_sta_evt = (struct stassoc_event*)(pevtcmd + sizeof(struct C2HEvent_Header));
+	_rtw_memcpy((unsigned char *)(&(padd_sta_evt->macaddr)), MacAddr, ETH_ALEN);
+	padd_sta_evt->cam_id = cam_idx;
+
+	DBG_871X("report_add_sta_event: add STA\n");
+
+	rtw_enqueue_cmd(pcmdpriv, pcmd_obj);
+
+	return;
+}
+
+
+/****************************************************************************
+
+Following are the event callback functions
+
+*****************************************************************************/
+
+//for sta/adhoc mode
+void update_sta_info(_adapter *padapter, struct sta_info *psta)
+{
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	//ERP
+	VCS_update(padapter, psta);
+
+
+	//HT
+	if(pmlmepriv->htpriv.ht_option)
+	{
+		psta->htpriv.ht_option = _TRUE;
+
+		psta->htpriv.ampdu_enable = pmlmepriv->htpriv.ampdu_enable;
+
+		if (support_short_GI(padapter, &(pmlmeinfo->HT_caps)))
+			psta->htpriv.sgi = _TRUE;
+
+		psta->qos_option = _TRUE;
+		
+	}
+	else
+	{
+		psta->htpriv.ht_option = _FALSE;
+
+		psta->htpriv.ampdu_enable = _FALSE;
+		
+		psta->htpriv.sgi = _FALSE;
+
+		psta->qos_option = _FALSE;
+
+	}
+	
+	psta->htpriv.bwmode = pmlmeext->cur_bwmode;
+	psta->htpriv.ch_offset = pmlmeext->cur_ch_offset;
+	
+	psta->htpriv.agg_enable_bitmap = 0x0;//reset
+	psta->htpriv.candidate_tid_bitmap = 0x0;//reset
+	
+
+	//QoS
+	if(pmlmepriv->qospriv.qos_option)
+		psta->qos_option = _TRUE;
+	
+
+	psta->state = _FW_LINKED;
+
+}
+
+u8	null_addr[ETH_ALEN]= {0,0,0,0,0,0};
+
+void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res)
+{
+	struct sta_info		*psta, *psta_bmc;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX 		*cur_network = &(pmlmeinfo->network);
+	struct sta_priv		*pstapriv = &padapter->stapriv;
+	u8	join_type, init_rts_rate;
+
+	if(join_res < 0)
+	{
+		join_type = 1;
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BSSID, null_addr);
+		return;
+	}
+
+	if((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)
+	{
+		//for bc/mc
+		psta_bmc = rtw_get_bcmc_stainfo(padapter);
+		if(psta_bmc)
+		{
+			pmlmeinfo->FW_sta_info[psta_bmc->mac_id].psta = psta_bmc;
+			update_bmc_sta_support_rate(padapter, psta_bmc->mac_id);
+			Update_RA_Entry(padapter, psta_bmc->mac_id);
+		}
+	}
+
+
+	//turn on dynamic functions
+	Switch_DM_Func(padapter, DYNAMIC_FUNC_DIG|DYNAMIC_FUNC_HP|DYNAMIC_FUNC_SS, _TRUE);
+
+	// update IOT-releated issue
+	update_IOT_info(padapter);
+
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BASIC_RATE, cur_network->SupportedRates);
+
+	//BCN interval
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)(&pmlmeinfo->bcn_interval));
+
+	//udpate capability
+	update_capinfo(padapter, pmlmeinfo->capability);
+
+	//WMM, Update EDCA param
+	WMMOnAssocRsp(padapter);
+
+	//HT
+	HTOnAssocRsp(padapter);
+
+
+	//Set cur_channel&cur_bwmode&cur_ch_offset
+	set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
+
+
+	psta = rtw_get_stainfo(pstapriv, cur_network->MacAddress);
+	if (psta) //only for infra. mode
+	{
+		pmlmeinfo->FW_sta_info[psta->mac_id].psta = psta;
+
+		//DBG_871X("set_sta_rate\n");
+	
+		//set per sta rate after updating HT cap.
+		set_sta_rate(padapter, psta);	
+	}
+
+	join_type = 2;
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
+
+	if((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE)
+	{
+		// correcting TSF
+		correct_TSF(padapter, pmlmeext);
+	
+		//set_link_timer(pmlmeext, DISCONNECT_TO);
+		pmlmeext->linked_to = LINKED_TO;
+	}
+
+#ifdef CONFIG_LPS
+	rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_CONNECT, 0);
+#endif
+	
+	DBG_871X("=>%s\n", __FUNCTION__);
+
+}
+
+void mlmeext_sta_add_event_callback(_adapter *padapter, struct sta_info *psta)
+{
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	u8	join_type;
+
+	DBG_871X("%s\n", __FUNCTION__);
+
+	if((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)
+	{
+		if(pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)//adhoc master or sta_count>1
+		{
+			//nothing to do
+		}
+		else//adhoc client
+		{
+			//update TSF Value
+			//update_TSF(pmlmeext, pframe, len);			
+
+			// correcting TSF
+			correct_TSF(padapter, pmlmeext);
+
+			//start beacon
+			if(send_beacon(padapter)==_FAIL)
+			{
+				pmlmeinfo->FW_sta_info[psta->mac_id].status = 0;
+
+				pmlmeinfo->state ^= WIFI_FW_ADHOC_STATE;
+
+				return;
+			}
+
+			pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS;
+				
+		}
+
+		join_type = 2;
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
+	}
+
+	pmlmeinfo->FW_sta_info[psta->mac_id].psta = psta;
+
+	//rate radaptive
+	Update_RA_Entry(padapter, psta->mac_id);
+
+	//update adhoc sta_info
+	update_sta_info(padapter, psta);
+
+	pmlmeext->linked_to = LINKED_TO;
+
+}
+
+void mlmeext_sta_del_event_callback(_adapter *padapter)
+{
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	if (is_client_associated_to_ap(padapter) || is_IBSS_empty(padapter))
+	{
+		//set_opmode_cmd(padapter, infra_client_with_mlme);
+
+		//switch to the 20M Hz mode after disconnect
+		pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_20;
+		pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_DISCONNECT, 0);
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BSSID, null_addr);
+
+		//SelectChannel(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset);
+		set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
+		flush_all_cam_entry(padapter);
+
+		pmlmeinfo->state = WIFI_FW_NULL_STATE;
+
+		//set MSR to no link state
+		Set_NETYPE0_MSR(padapter, _HW_STATE_NOLINK_);
+
+		pmlmeext->linked_to = 0;
+		_cancel_timer_ex(&pmlmeext->link_timer);
+
+	}
+
+}
+
+/****************************************************************************
+
+Following are the functions for the timer handlers
+
+*****************************************************************************/
+
+void _linked_rx_signal_strehgth_display(_adapter *padapter)
+{
+	int	UndecoratedSmoothedPWDB;
+	DBG_8192C("============ linked status check ===================\n");
+	DBG_8192C("pathA Rx SNRdb:%d, pathB Rx SNRdb:%d\n",padapter->recvpriv.RxSNRdB[0],padapter->recvpriv.RxSNRdB[1]);
+	DBG_8192C("pathA Rx RSSI:%d,pathB Rx RSSI:%d\n",padapter->recvpriv.RxRssi[0],padapter->recvpriv.RxRssi[1]);
+
+	DBG_8192C("pathA Rx PWDB:%d\n",padapter->recvpriv.rxpwdb);		
+	padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_UNDERCORATEDSMOOTHEDPWDB, &UndecoratedSmoothedPWDB);
+	DBG_8192C("UndecoratedSmoothedPWDB:%d\n",UndecoratedSmoothedPWDB);
+	DBG_8192C("Rx RSSI:%d\n",padapter->recvpriv.rssi);
+	DBG_8192C("Rx Signal_strength:%d\n",padapter->recvpriv.signal_strength);
+	DBG_8192C("Rx Signal_qual:%d \n",padapter->recvpriv.signal_qual);
+	DBG_8192C("============ linked status check ===================\n");
+	DBG_8192C(" DIG PATH-A(0x%02x), PATH-B(0x%02x)\n",rtw_read8(padapter,0xc50),rtw_read8(padapter,0xc58));
+	DBG_8192C(" OFDM -Alarm DA2(0x%04x),DA4(0x%04x),DA6(0x%04x),DA8(0x%04x)\n",
+		rtw_read16(padapter,0xDA2),rtw_read16(padapter,0xDA4),rtw_read16(padapter,0xDA6),rtw_read16(padapter,0xDA8));
+
+	DBG_8192C(" CCK -Alarm A5B(0x%02x),A5C(0x%02x)\n",rtw_read8(padapter,0xA5B),rtw_read8(padapter,0xA5C));
+	DBG_8192C(" FalseAlmCnt_all(%d)\n",padapter->recvpriv.FalseAlmCnt_all);
+}
+
+void linked_status_chk(_adapter *padapter)
+{
+	u32	i;
+	struct sta_info		*psta;
+	struct xmit_priv		*pxmitpriv = &(padapter->xmitpriv);
+	struct recv_priv		*precvpriv = &(padapter->recvpriv);
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct sta_priv		*pstapriv = &padapter->stapriv;
+	struct registry_priv	*pregistrypriv = &padapter->registrypriv;
+
+	if(padapter->bRxRSSIDisplay)
+		 	_linked_rx_signal_strehgth_display(padapter);
+
+	if (is_client_associated_to_ap(padapter))
+	{
+		
+		//linked infrastructure client mode
+		if ((psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress)) != NULL)
+		{
+			/*to monitor whether the AP is alive or not*/
+			if (psta->sta_stats.last_rx_pkts == psta->sta_stats.rx_pkts)
+			{
+				//	Commented by Albert 2010/07/21
+				//	In this case, there is no any rx packet received by driver.
+
+				#ifdef DBG_ROAMING_TEST
+				if(pmlmeext->retry<1)
+				#else
+				if(pmlmeext->retry<8)// Alter the retry limit to 8
+				#endif
+				{
+					if(pmlmeext->retry==0)
+					{
+						pmlmeext->sitesurvey_res.scan_mode = SCAN_ACTIVE;
+						pmlmeext->sitesurvey_res.state = SCAN_DISABLE;
+						#ifdef DBG_CONFIG_ERROR_DETECT	
+						if(padapter->HalFunc.sreset_linked_status_check)
+							padapter->HalFunc.sreset_linked_status_check(padapter);						
+						#endif
+
+						//DBG_871X("issue_probereq to check if ap alive, retry=%d\n", pmlmeext->retry);
+					
+						//	In order to know the AP's current state, try to send the probe request 
+						//	to trigger the AP to send the probe response.
+						issue_probereq(padapter, &(pmlmeinfo->network.Ssid), 0);
+						issue_probereq(padapter, &(pmlmeinfo->network.Ssid), 0);
+						issue_probereq(padapter, &(pmlmeinfo->network.Ssid), 0);
+					}
+					
+					pmlmeext->retry++;
+					pmlmeext->linked_to = LINKED_TO;
+				}
+				else
+				{
+					pmlmeext->retry = 0;
+                                	DBG_871X("no beacon to call receive_disconnect()\n");
+					receive_disconnect(padapter, pmlmeinfo->network.MacAddress
+						, 65535// indicate disconnect caused by no rx
+					);
+					pmlmeinfo->link_count = 0;
+					return;
+				}
+			}
+			else
+			{
+				pmlmeext->retry = 0;
+				psta->sta_stats.last_rx_pkts = psta->sta_stats.rx_pkts;
+				//set_link_timer(pmlmeext, DISCONNECT_TO);
+				pmlmeext->linked_to = LINKED_TO;
+			}
+
+			/*to send the AP a nulldata if no frame is xmitted in order to keep alive*/
+			if (pmlmeinfo->link_count++ == 0)
+			{
+				pxmitpriv->last_tx_pkts = pxmitpriv->tx_pkts;
+			}
+			else if ((pmlmeinfo->link_count & 0xf) == 0)
+			{
+				if ( pxmitpriv->last_tx_pkts == pxmitpriv->tx_pkts)
+				{
+					//DBG_871X("(Interface %d)issue nulldata to keep alive\n",padapter->dvobjpriv.InterfaceNumber);
+					issue_nulldata(padapter, 0);
+				}
+
+				pxmitpriv->last_tx_pkts = pxmitpriv->tx_pkts;
+			}
+
+		} //end of if ((psta = rtw_get_stainfo(pstapriv, passoc_res->network.MacAddress)) != NULL)
+	}
+	else if (is_client_associated_to_ibss(padapter))
+	{
+		//linked IBSS mode
+		//for each assoc list entry to check the rx pkt counter
+		for (i = IBSS_START_MAC_ID; i < NUM_STA; i++)
+		{
+			if (pmlmeinfo->FW_sta_info[i].status == 1)
+			{
+				psta = pmlmeinfo->FW_sta_info[i].psta;
+
+				if(NULL==psta) continue;
+
+				if (pmlmeinfo->FW_sta_info[i].rx_pkt == psta->sta_stats.rx_pkts)
+				{
+
+					if(pmlmeinfo->FW_sta_info[i].retry<3)
+					{
+						pmlmeinfo->FW_sta_info[i].retry++;
+					}
+					else
+					{
+						pmlmeinfo->FW_sta_info[i].retry = 0;
+						pmlmeinfo->FW_sta_info[i].status = 0;
+						report_del_sta_event(padapter, psta->hwaddr
+							, 65535// indicate disconnect caused by no rx
+						);
+					}	
+				}
+				else
+				{
+					pmlmeinfo->FW_sta_info[i].retry = 0;
+					pmlmeinfo->FW_sta_info[i].rx_pkt = (u32)psta->sta_stats.rx_pkts;
+				}
+			}
+		}
+
+		//set_link_timer(pmlmeext, DISCONNECT_TO);
+		pmlmeext->linked_to = LINKED_TO;
+
+	}
+
+}
+
+void survey_timer_hdl(_adapter *padapter)
+{
+	struct cmd_obj	*ph2c;
+	struct sitesurvey_parm	*psurveyPara;
+	struct cmd_priv					*pcmdpriv=&padapter->cmdpriv;
+	struct mlme_priv				*pmlmepriv = &padapter->mlmepriv;
+	struct mlme_ext_priv 		*pmlmeext = &padapter->mlmeextpriv;
+
+	//DBG_8192C("marc: survey timer\n");
+
+	//issue rtw_sitesurvey_cmd
+	if (pmlmeext->sitesurvey_res.state > SCAN_START)
+	{
+		if(pmlmeext->sitesurvey_res.state ==  SCAN_PROCESS)
+			pmlmeext->sitesurvey_res.channel_idx++;
+
+		if ((ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL)
+		{
+			goto exit_survey_timer_hdl;
+		}
+
+		if ((psurveyPara = (struct sitesurvey_parm*)rtw_zmalloc(sizeof(struct sitesurvey_parm))) == NULL)
+		{
+			rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj));
+			goto exit_survey_timer_hdl;
+		}
+
+		init_h2fwcmd_w_parm_no_rsp(ph2c, psurveyPara, GEN_CMD_CODE(_SiteSurvey));
+		rtw_enqueue_cmd(pcmdpriv, ph2c);
+	}
+
+
+exit_survey_timer_hdl:
+
+	return;
+}
+
+void link_timer_hdl(_adapter *padapter)
+{
+	static unsigned int		rx_pkt = 0;
+	static u64				tx_cnt = 0;
+	struct xmit_priv		*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct sta_priv		*pstapriv = &padapter->stapriv;
+
+	if (pmlmeinfo->state & WIFI_FW_AUTH_NULL)
+	{
+		DBG_871X("link_timer_hdl:no beacon while connecting\n");
+		pmlmeinfo->state = WIFI_FW_NULL_STATE;
+		report_join_res(padapter, -3);
+	}
+	else if (pmlmeinfo->state & WIFI_FW_AUTH_STATE)
+	{
+		//re-auth timer
+		if (++pmlmeinfo->reauth_count > REAUTH_LIMIT)
+		{
+			//if (pmlmeinfo->auth_algo != dot11AuthAlgrthm_Auto)
+			//{
+				pmlmeinfo->state = 0;
+				report_join_res(padapter, -1);
+				return;
+			//}
+			//else
+			//{
+			//	pmlmeinfo->auth_algo = dot11AuthAlgrthm_Shared;
+			//	pmlmeinfo->reauth_count = 0;
+			//}
+		}
+		
+		DBG_871X("link_timer_hdl: auth timeout and try again\n");
+		pmlmeinfo->auth_seq = 1;
+		issue_auth(padapter, NULL, 0);
+		set_link_timer(pmlmeext, REAUTH_TO);
+	}
+	else if (pmlmeinfo->state & WIFI_FW_ASSOC_STATE)
+	{
+		//re-assoc timer
+		if (++pmlmeinfo->reassoc_count > REASSOC_LIMIT)
+		{
+			pmlmeinfo->state = WIFI_FW_NULL_STATE;
+			report_join_res(padapter, -2);
+			return;
+		}
+
+		DBG_871X("link_timer_hdl: assoc timeout and try again\n");
+		issue_assocreq(padapter);
+		set_link_timer(pmlmeext, REASSOC_TO);
+	}
+#if 0
+	else if (is_client_associated_to_ap(padapter))
+	{
+		//linked infrastructure client mode
+		if ((psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress)) != NULL)
+		{
+			/*to monitor whether the AP is alive or not*/
+			if (rx_pkt == psta->sta_stats.rx_pkts)
+			{
+				receive_disconnect(padapter, pmlmeinfo->network.MacAddress);
+				return;
+			}
+			else
+			{
+				rx_pkt = psta->sta_stats.rx_pkts;
+				set_link_timer(pmlmeext, DISCONNECT_TO);
+			}
+
+			//update the EDCA paramter according to the Tx/RX mode
+			update_EDCA_param(padapter);
+
+			/*to send the AP a nulldata if no frame is xmitted in order to keep alive*/
+			if (pmlmeinfo->link_count++ == 0)
+			{
+				tx_cnt = pxmitpriv->tx_pkts;
+			}
+			else if ((pmlmeinfo->link_count & 0xf) == 0)
+			{
+				if (tx_cnt == pxmitpriv->tx_pkts)
+				{
+					issue_nulldata(padapter, 0);
+				}
+
+				tx_cnt = pxmitpriv->tx_pkts;
+			}
+		} //end of if ((psta = rtw_get_stainfo(pstapriv, passoc_res->network.MacAddress)) != NULL)
+	}
+	else if (is_client_associated_to_ibss(padapter))
+	{
+		//linked IBSS mode
+		//for each assoc list entry to check the rx pkt counter
+		for (i = IBSS_START_MAC_ID; i < NUM_STA; i++)
+		{
+			if (pmlmeinfo->FW_sta_info[i].status == 1)
+			{
+				psta = pmlmeinfo->FW_sta_info[i].psta;
+
+				if (pmlmeinfo->FW_sta_info[i].rx_pkt == psta->sta_stats.rx_pkts)
+				{
+					pmlmeinfo->FW_sta_info[i].status = 0;
+					report_del_sta_event(padapter, psta->hwaddr);
+				}
+				else
+				{
+					pmlmeinfo->FW_sta_info[i].rx_pkt = psta->sta_stats.rx_pkts;
+				}
+			}
+		}
+
+		set_link_timer(pmlmeext, DISCONNECT_TO);
+	}
+#endif
+
+	return;
+}
+
+void addba_timer_hdl(struct sta_info *psta)
+{
+	u8 bitmap;
+	u16 tid;
+	struct ht_priv	*phtpriv;
+
+	if(!psta)
+		return;
+	
+	phtpriv = &psta->htpriv;
+
+	if((phtpriv->ht_option==_TRUE) && (phtpriv->ampdu_enable==_TRUE)) 
+	{
+		if(phtpriv->candidate_tid_bitmap)
+			phtpriv->candidate_tid_bitmap=0x0;
+		
+	}
+	
+}
+
+u8 NULL_hdl(_adapter *padapter, u8 *pbuf)
+{
+	return H2C_SUCCESS;
+}
+
+u8 setopmode_hdl(_adapter *padapter, u8 *pbuf)
+{
+	u8	type;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct setopmode_parm *psetop = (struct setopmode_parm *)pbuf;
+
+	if(psetop->mode == Ndis802_11APMode)
+	{
+		pmlmeinfo->state = WIFI_FW_AP_STATE;
+		type = _HW_STATE_AP_;
+#ifdef CONFIG_NATIVEAP_MLME
+		//start_ap_mode(padapter);
+#endif
+	}
+	else if(psetop->mode == Ndis802_11Infrastructure)
+	{
+		type = _HW_STATE_STATION_;
+	}
+	else if(psetop->mode == Ndis802_11IBSS)
+	{
+		type = _HW_STATE_ADHOC_;
+	}
+	else
+	{
+		type = _HW_STATE_NOLINK_;
+	}
+
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_SET_OPMODE, (u8 *)(&type));
+	//Set_NETYPE0_MSR(padapter, type);
+
+	return H2C_SUCCESS;
+	
+}
+
+u8 createbss_hdl(_adapter *padapter, u8 *pbuf)
+{
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX	*pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network));
+	struct joinbss_parm *pparm = (struct joinbss_parm *)pbuf;
+	u32	initialgain;
+
+	
+	if(pparm->network.InfrastructureMode == Ndis802_11APMode)
+	{
+#ifdef CONFIG_AP_MODE
+	
+		if(pmlmeinfo->state == WIFI_FW_AP_STATE)
+		{		
+			//todo:
+			return H2C_SUCCESS;		
+		}		
+#endif
+	}
+
+	//below is for ad-hoc master
+	if(pparm->network.InfrastructureMode == Ndis802_11IBSS)
+	{
+		rtw_joinbss_reset(padapter);
+
+		pmlmeext->linked_to = 0;
+	
+		pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_20;
+		pmlmeext->cur_ch_offset= HAL_PRIME_CHNL_OFFSET_DONT_CARE;	
+		pmlmeinfo->ERP_enable = 0;
+		pmlmeinfo->WMM_enable = 0;
+		pmlmeinfo->HT_enable = 0;
+		pmlmeinfo->HT_caps_enable = 0;
+		pmlmeinfo->HT_info_enable = 0;
+		pmlmeinfo->agg_enable_bitmap = 0;
+		pmlmeinfo->candidate_tid_bitmap = 0;
+
+		//disable dynamic functions, such as high power, DIG
+		Save_DM_Func_Flag(padapter);
+		Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE);
+
+		//config the initial gain under linking, need to write the BB registers
+		initialgain = 0x1E;
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain));
+
+		//cancel link timer 
+		_cancel_timer_ex(&pmlmeext->link_timer);
+
+		//clear CAM
+		flush_all_cam_entry(padapter);	
+
+		_rtw_memcpy(pnetwork, pbuf, FIELD_OFFSET(WLAN_BSSID_EX, IELength)); 
+		pnetwork->IELength = ((WLAN_BSSID_EX *)pbuf)->IELength;
+
+		if(pnetwork->IELength>MAX_IE_SZ)//Check pbuf->IELength
+			return H2C_PARAMETERS_ERROR;
+
+		_rtw_memcpy(pnetwork->IEs, ((WLAN_BSSID_EX *)pbuf)->IEs, pnetwork->IELength);
+	
+		start_create_ibss(padapter);
+
+	}	
+
+	return H2C_SUCCESS;
+
+}
+
+u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf)
+{
+	u8	join_type;
+	PNDIS_802_11_VARIABLE_IEs	pIE;
+	struct registry_priv	*pregpriv = &padapter->registrypriv;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX		*pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network));
+	struct joinbss_parm	*pparm = (struct joinbss_parm *)pbuf;
+	u32	acparm, initialgain, i;
+
+	//check already connecting to AP or not
+	if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)
+	{
+		if (pmlmeinfo->state & WIFI_FW_STATION_STATE)
+		{
+			issue_deauth(padapter, pnetwork->MacAddress, WLAN_REASON_DEAUTH_LEAVING);
+		}
+
+		pmlmeinfo->state = WIFI_FW_NULL_STATE;
+		
+		//clear CAM
+		flush_all_cam_entry(padapter);		
+		
+		_cancel_timer_ex(&pmlmeext->link_timer);
+		
+		//set MSR to nolink		
+		Set_NETYPE0_MSR(padapter, _HW_STATE_NOLINK_);	
+
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_DISCONNECT, 0);
+	}
+
+#ifdef CONFIG_ANTENNA_DIVERSITY
+	rtw_antenna_select_cmd(padapter, pparm->network.PhyInfo.Optimum_antenna, _FALSE);
+#endif
+
+	rtw_joinbss_reset(padapter);
+
+	pmlmeext->linked_to = 0;
+	
+	pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_20;
+	pmlmeext->cur_ch_offset= HAL_PRIME_CHNL_OFFSET_DONT_CARE;	
+	pmlmeinfo->ERP_enable = 0;
+	pmlmeinfo->WMM_enable = 0;
+	pmlmeinfo->HT_enable = 0;
+	pmlmeinfo->HT_caps_enable = 0;
+	pmlmeinfo->HT_info_enable = 0;
+	pmlmeinfo->agg_enable_bitmap = 0;
+	pmlmeinfo->candidate_tid_bitmap = 0;
+	pmlmeinfo->bwmode_updated = _FALSE;
+	//pmlmeinfo->assoc_AP_vendor = maxAP;
+
+	_rtw_memcpy(pnetwork, pbuf, FIELD_OFFSET(WLAN_BSSID_EX, IELength)); 
+	pnetwork->IELength = ((WLAN_BSSID_EX *)pbuf)->IELength;
+	
+	if(pnetwork->IELength>MAX_IE_SZ)//Check pbuf->IELength
+		return H2C_PARAMETERS_ERROR;	
+		
+	_rtw_memcpy(pnetwork->IEs, ((WLAN_BSSID_EX *)pbuf)->IEs, pnetwork->IELength); 
+
+	//Check AP vendor to move rtw_joinbss_cmd()
+	//pmlmeinfo->assoc_AP_vendor = check_assoc_AP(pnetwork->IEs, pnetwork->IELength);
+
+	for (i = sizeof(NDIS_802_11_FIXED_IEs); i < pnetwork->IELength;)
+	{
+		pIE = (PNDIS_802_11_VARIABLE_IEs)(pnetwork->IEs + i);
+
+		switch (pIE->ElementID)
+		{
+			case _VENDOR_SPECIFIC_IE_://Get WMM IE.
+				if ( _rtw_memcmp(pIE->data, WMM_OUI, 4) )
+				{
+					pmlmeinfo->WMM_enable = 1;
+				}
+				break;
+
+			case _HT_CAPABILITY_IE_:	//Get HT Cap IE.
+				pmlmeinfo->HT_caps_enable = 1;
+				break;
+
+			case _HT_EXTRA_INFO_IE_:	//Get HT Info IE.
+				pmlmeinfo->HT_info_enable = 1;
+
+				//spec case only for cisco's ap because cisco's ap issue assoc rsp using mcs rate @40MHz or @20MHz	
+				//if(pmlmeinfo->assoc_AP_vendor == ciscoAP)
+				{
+					struct HT_info_element *pht_info = (struct HT_info_element *)(pIE->data);
+							
+					if ((pregpriv->cbw40_enable) &&	 (pht_info->infos[0] & BIT(2)))
+					{
+						//switch to the 40M Hz mode according to the AP
+						pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_40;
+						switch (pht_info->infos[0] & 0x3)
+						{
+							case 1:
+								pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER;
+								break;
+			
+							case 3:
+								pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER;
+								break;
+				
+							default:
+								pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+								break;
+						}
+
+						DBG_871X("set ch/bw before connected\n");
+					}
+				}
+				break;
+
+			default:
+				break;
+		}
+
+		i += (pIE->Length + 2);
+	}
+#if 0
+	if (padapter->registrypriv.wifi_spec) {
+		// for WiFi test, follow WMM test plan spec
+		acparm = 0x002F431C; // VO
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acparm));
+		acparm = 0x005E541C; // VI
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acparm));
+		acparm = 0x0000A525; // BE
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm));
+		acparm = 0x0000A549; // BK
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acparm));
+	
+		// for WiFi test, mixed mode with intel STA under bg mode throughput issue
+		if (padapter->mlmepriv.htpriv.ht_option == _FALSE){
+			acparm = 0x00004320;
+			padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm));
+		}
+	}
+	else {
+		acparm = 0x002F3217; // VO
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acparm));
+		acparm = 0x005E4317; // VI
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acparm));
+		acparm = 0x00105320; // BE
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm));
+		acparm = 0x0000A444; // BK
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acparm));
+	}
+#endif
+	//disable dynamic functions, such as high power, DIG
+	//Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE);
+
+	//config the initial gain under linking, need to write the BB registers
+	initialgain = 0x1E;
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain));
+
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress);
+	join_type = 0;
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
+
+	//cancel link timer 
+	_cancel_timer_ex(&pmlmeext->link_timer);
+	
+	start_clnt_join(padapter);
+	
+	return H2C_SUCCESS;
+	
+}
+
+u8 disconnect_hdl(_adapter *padapter, unsigned char *pbuf)
+{
+	struct disconnect_parm	*pparm = (struct disconnect_parm *)pbuf;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX		*pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network));
+	u8	val8;
+	
+	if (is_client_associated_to_ap(padapter))
+	{
+		issue_deauth(padapter, pnetwork->MacAddress, WLAN_REASON_DEAUTH_LEAVING);
+	}
+
+	//set_opmode_cmd(padapter, infra_client_with_mlme);
+
+	pmlmeinfo->state = WIFI_FW_NULL_STATE;
+	
+	//switch to the 20M Hz mode after disconnect
+	pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_20;
+	pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+		
+	//set MSR to no link state
+	Set_NETYPE0_MSR(padapter, _HW_STATE_NOLINK_);
+
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_DISCONNECT, 0);
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BSSID, null_addr);
+	
+	if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
+	{
+		//Stop BCN
+		val8 = 0;
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BCN_FUNC, (u8 *)(&val8));
+	}
+
+	pmlmeinfo->state = WIFI_FW_NULL_STATE;
+	
+	set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
+
+	flush_all_cam_entry(padapter);
+		
+	_cancel_timer_ex(&pmlmeext->link_timer);
+	pmlmeext->linked_to = 0;
+	
+	return 	H2C_SUCCESS;
+}
+
+u8 sitesurvey_cmd_hdl(_adapter *padapter, u8 *pbuf)
+{
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct sitesurvey_parm	*pparm = (struct sitesurvey_parm *)pbuf;
+	u8	val8;
+	u32	initialgain;
+	u32 i;
+#ifdef CONFIG_TDLS
+	struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
+#endif
+
+#ifdef CONFIG_P2P
+	struct wifidirect_info*	pwdinfo = &padapter->wdinfo;
+#endif
+
+	if (pmlmeext->sitesurvey_res.state == SCAN_DISABLE)
+	{
+		//for first time sitesurvey_cmd
+		pmlmeext->sitesurvey_res.state = SCAN_START;
+		pmlmeext->sitesurvey_res.bss_cnt = 0;
+		pmlmeext->sitesurvey_res.channel_idx = 0;
+
+		for(i=0;i<RTW_SSID_SCAN_AMOUNT;i++){
+			if(le32_to_cpu(pparm->ssid[i].SsidLength)) {
+				_rtw_memcpy(pmlmeext->sitesurvey_res.ssid[i].Ssid, pparm->ssid[i].Ssid, IW_ESSID_MAX_SIZE);
+				pmlmeext->sitesurvey_res.ssid[i].SsidLength= le32_to_cpu(pparm->ssid[i].SsidLength);
+			} else {
+				pmlmeext->sitesurvey_res.ssid[i].SsidLength= 0;
+			}	
+		}
+
+#ifdef CONFIG_TDLS
+		if(pmlmeinfo->tdls_ch_sensing==1)
+			pmlmeext->sitesurvey_res.scan_mode=SCAN_PASSIVE;
+		else
+			pmlmeext->sitesurvey_res.scan_mode = le32_to_cpu(pparm->scan_mode);			
+#else
+		pmlmeext->sitesurvey_res.scan_mode = le32_to_cpu(pparm->scan_mode);
+#endif
+
+		//issue null data if associating to the AP
+		if (is_client_associated_to_ap(padapter) == _TRUE)
+		{
+			pmlmeext->sitesurvey_res.state = SCAN_TXNULL;
+
+			issue_nulldata(padapter, 1);
+			issue_nulldata(padapter, 1);
+
+			//delay 50ms to protect nulldata(1).
+			set_survey_timer(pmlmeext, 50);
+
+			return H2C_SUCCESS;
+		}
+	}
+
+	if ((pmlmeext->sitesurvey_res.state == SCAN_START) || (pmlmeext->sitesurvey_res.state == SCAN_TXNULL))
+	{
+#ifdef CONFIG_FIND_BEST_CHANNEL
+#if 0
+		for (i=0; pmlmeext->channel_set[i].ChannelNum !=0; i++) {
+			pmlmeext->channel_set[i].rx_count = 0;				
+		}
+#endif
+#endif /* CONFIG_FIND_BEST_CHANNEL */
+
+		//disable dynamic functions, such as high power, DIG
+		Save_DM_Func_Flag(padapter);
+		Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE);
+
+		//config the initial gain under scaning, need to write the BB registers
+		initialgain = 0x17;
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain));		
+		
+		//set MSR to no link state
+		Set_NETYPE0_MSR(padapter, _HW_STATE_NOLINK_);
+
+		val8 = 1; //before site survey
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
+
+		//	Commented by Albert 2011/08/05
+		//	The pre_tx_scan_timer_process will issue the scan H2C command.
+		//	However, the driver should NOT enter the scanning mode at that time.
+		pmlmeext->sitesurvey_res.state = SCAN_PROCESS;
+	}
+
+#ifdef CONFIG_TDLS
+		if(pmlmeinfo->tdls_ch_sensing==1){
+			rtw_write16(padapter, 0x06A4,0xffff);
+		}
+#endif
+
+	site_survey(padapter);
+
+	return H2C_SUCCESS;
+	
+}
+
+u8 setauth_hdl(_adapter *padapter, unsigned char *pbuf)
+{
+	struct setauth_parm		*pparm = (struct setauth_parm *)pbuf;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	
+	if (pparm->mode < 4)
+	{
+		pmlmeinfo->auth_algo = pparm->mode;
+	}
+
+	return 	H2C_SUCCESS;
+}
+
+u8 setkey_hdl(_adapter *padapter, u8 *pbuf)
+{
+	unsigned short				ctrl;
+	struct setkey_parm		*pparm = (struct setkey_parm *)pbuf;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	unsigned char					null_sta[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+
+	//main tx key for wep.
+	if(pparm->set_tx)
+		pmlmeinfo->key_index = pparm->keyid;
+	
+	//write cam
+	ctrl = BIT(15) | ((pparm->algorithm) << 2) | pparm->keyid;	
+
+	write_cam(padapter, pparm->keyid, ctrl, null_sta, pparm->key);
+	
+	return H2C_SUCCESS;
+}
+
+u8 set_stakey_hdl(_adapter *padapter, u8 *pbuf)
+{
+	unsigned short ctrl=0;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct set_stakey_parm	*pparm = (struct set_stakey_parm *)pbuf;
+#ifdef CONFIG_TDLS
+	struct sta_priv	*pstapriv = &padapter->stapriv;
+	struct sta_info	*psta;
+#endif
+
+	if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)
+	{
+		unsigned char cam_id;//cam_entry
+		struct sta_info *psta;
+		struct sta_priv *pstapriv = &padapter->stapriv;
+		
+		psta = rtw_get_stainfo(pstapriv, pparm->addr);
+		if(psta)
+		{			
+			ctrl = (BIT(15) | ((pparm->algorithm) << 2));
+
+			DBG_8192C("r871x_set_stakey_hdl(): enc_algorithm=%d\n", pparm->algorithm);
+
+			if((psta->mac_id<1) || (psta->mac_id>(NUM_STA-4)))
+			{
+				DBG_8192C("r871x_set_stakey_hdl():set_stakey failed, mac_id(aid)=%d\n", psta->mac_id);
+				return H2C_REJECTED;
+			}	
+				 
+			cam_id = (psta->mac_id + 3);//0~3 for default key, cmd_id=macid + 3, macid=aid+1;
+
+			DBG_8192C("Write CAM, mac_addr=%x:%x:%x:%x:%x:%x, cam_entry=%d\n", pparm->addr[0], 
+						pparm->addr[1], pparm->addr[2], pparm->addr[3], pparm->addr[4],
+						pparm->addr[5], cam_id);
+
+			write_cam(padapter, cam_id, ctrl, pparm->addr, pparm->key);
+	
+			return H2C_SUCCESS_RSP;
+		
+		}
+		else
+		{
+			DBG_8192C("r871x_set_stakey_hdl(): sta has been free\n");
+			return H2C_REJECTED;
+		}
+		
+	}
+
+	//below for sta mode
+	
+	ctrl = BIT(15) | ((pparm->algorithm) << 2);	
+	
+#ifdef CONFIG_TDLS
+	if(pmlmeinfo->tdls_cam_entry_to_clear!=0){
+		clear_cam_entry(padapter, pmlmeinfo->tdls_cam_entry_to_clear);
+		pmlmeinfo->tdls_cam_entry_to_clear=0;
+
+		return H2C_SUCCESS;
+	}
+
+	psta = rtw_get_stainfo(pstapriv, pparm->addr);//Get TDLS Peer STA
+	if((psta->state&TDLS_LINKED_STATE)==TDLS_LINKED_STATE){
+		write_cam(padapter, psta->cam_entry, ctrl, pparm->addr, pparm->key);
+	}
+	else
+#endif
+	write_cam(padapter, 5, ctrl, pparm->addr, pparm->key);
+
+	pmlmeinfo->enc_algo = pparm->algorithm;
+	
+	return H2C_SUCCESS;
+}
+
+u8 add_ba_hdl(_adapter *padapter, unsigned char *pbuf)
+{
+	struct addBaReq_parm 	*pparm = (struct addBaReq_parm *)pbuf;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	struct sta_info *psta = rtw_get_stainfo(&padapter->stapriv, pparm->addr);
+	
+	if(!psta)
+		return 	H2C_SUCCESS;
+		
+
+	if (((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && (pmlmeinfo->HT_enable)) ||
+		((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
+	{
+		//pmlmeinfo->ADDBA_retry_count = 0;
+		//pmlmeinfo->candidate_tid_bitmap |= (0x1 << pparm->tid);		
+		//psta->htpriv.candidate_tid_bitmap |= BIT(pparm->tid);
+		issue_action_BA(padapter, pparm->addr, WLAN_ACTION_ADDBA_REQ, (u16)pparm->tid);		
+		//_set_timer(&pmlmeext->ADDBA_timer, ADDBA_TO);
+		_set_timer(&psta->addba_retry_timer, ADDBA_TO);
+	}
+	else
+	{		
+		psta->htpriv.candidate_tid_bitmap &= ~BIT(pparm->tid);		
+	}
+	
+	return 	H2C_SUCCESS;
+}
+
+u8 set_tx_beacon_cmd(_adapter* padapter)
+{
+	struct cmd_obj	*ph2c;
+	struct Tx_Beacon_param 	*ptxBeacon_parm;	
+	struct cmd_priv	*pcmdpriv = &(padapter->cmdpriv);
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	u8	res = _SUCCESS;
+	
+_func_enter_;	
+	
+	if ((ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL)
+	{
+		res= _FAIL;
+		goto exit;
+	}
+	
+	if ((ptxBeacon_parm = (struct Tx_Beacon_param *)rtw_zmalloc(sizeof(struct Tx_Beacon_param))) == NULL)
+	{
+		rtw_mfree((unsigned char *)ph2c, sizeof(struct	cmd_obj));
+		res= _FAIL;
+		goto exit;
+	}
+
+	_rtw_memcpy(&(ptxBeacon_parm->network), &(pmlmeinfo->network), sizeof(WLAN_BSSID_EX));
+	init_h2fwcmd_w_parm_no_rsp(ph2c, ptxBeacon_parm, GEN_CMD_CODE(_TX_Beacon));
+
+	res = rtw_enqueue_cmd(pcmdpriv, ph2c);
+
+	
+exit:
+	
+_func_exit_;
+
+	return res;
+}
+
+
+u8 mlme_evt_hdl(_adapter *padapter, unsigned char *pbuf)
+{
+	u8 evt_code, evt_seq;
+	u16 evt_sz;
+	uint 	*peventbuf;
+	void (*event_callback)(_adapter *dev, u8 *pbuf);
+	struct evt_priv *pevt_priv = &(padapter->evtpriv);
+
+	peventbuf = (uint*)pbuf;
+	evt_sz = (u16)(*peventbuf&0xffff);
+	evt_seq = (u8)((*peventbuf>>24)&0x7f);
+	evt_code = (u8)((*peventbuf>>16)&0xff);
+	
+		
+	#ifdef CHECK_EVENT_SEQ
+	// checking event sequence...		
+	if (evt_seq != (ATOMIC_READ(&pevt_priv->event_seq) & 0x7f) )
+	{
+		RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("Evetn Seq Error! %d vs %d\n", (evt_seq & 0x7f), (ATOMIC_READ(&pevt_priv->event_seq) & 0x7f)));
+	
+		pevt_priv->event_seq = (evt_seq+1)&0x7f;
+
+		goto _abort_event_;
+	}
+	#endif
+
+	// checking if event code is valid
+	if (evt_code >= MAX_C2HEVT)
+	{
+		RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nEvent Code(%d) mismatch!\n", evt_code));
+		goto _abort_event_;
+	}
+
+	// checking if event size match the event parm size	
+	if ((wlanevents[evt_code].parmsize != 0) && 
+			(wlanevents[evt_code].parmsize != evt_sz))
+	{
+			
+		RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nEvent(%d) Parm Size mismatch (%d vs %d)!\n", 
+			evt_code, wlanevents[evt_code].parmsize, evt_sz));
+		goto _abort_event_;	
+			
+	}
+
+	ATOMIC_INC(&pevt_priv->event_seq);
+
+	peventbuf += 2;
+				
+	if(peventbuf)
+	{
+		event_callback = wlanevents[evt_code].event_callback;
+		event_callback(padapter, (u8*)peventbuf);
+
+		pevt_priv->evt_done_cnt++;
+	}
+
+
+_abort_event_:
+
+
+	return H2C_SUCCESS;
+		
+}
+
+u8 h2c_msg_hdl(_adapter *padapter, unsigned char *pbuf)
+{
+	if(!pbuf)
+		return H2C_PARAMETERS_ERROR;
+
+	return H2C_SUCCESS;
+}
+
+
+u8 tx_beacon_hdl(_adapter *padapter, unsigned char *pbuf)
+{
+	if(send_beacon(padapter)==_FAIL)
+	{
+		DBG_871X("issue_beacon, fail!\n");
+		return H2C_PARAMETERS_ERROR;
+	}
+#ifdef CONFIG_AP_MODE
+	else //tx bc/mc frames after update TIM 
+	{	
+		_irqL irqL;
+		struct sta_info *psta_bmc;
+		_list	*xmitframe_plist, *xmitframe_phead;
+		struct xmit_frame *pxmitframe=NULL;
+		struct sta_priv  *pstapriv = &padapter->stapriv;
+		
+		//for BC/MC Frames
+		psta_bmc = rtw_get_bcmc_stainfo(padapter);
+		if(!psta_bmc)
+			return H2C_SUCCESS;
+	
+		if((pstapriv->tim_bitmap&BIT(0)) && (psta_bmc->sleepq_len>0))
+		{				
+
+			rtw_msleep_os(10);// 10ms, ATIM(HIQ) Windows
+		
+			_enter_critical_bh(&psta_bmc->sleep_q.lock, &irqL);	
+
+			xmitframe_phead = get_list_head(&psta_bmc->sleep_q);
+			xmitframe_plist = get_next(xmitframe_phead);
+
+			while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE)
+			{			
+				pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list);
+
+				xmitframe_plist = get_next(xmitframe_plist);
+
+				rtw_list_delete(&pxmitframe->list);
+
+				psta_bmc->sleepq_len--;
+				if(psta_bmc->sleepq_len>0)
+					pxmitframe->attrib.mdata = 1;
+				else
+					pxmitframe->attrib.mdata = 0;
+
+				pxmitframe->attrib.triggered=1;
+
+				if(padapter->HalFunc.hal_xmit(padapter, pxmitframe) == _TRUE)
+				{		
+					rtw_os_xmit_complete(padapter, pxmitframe);
+				}
+
+				//pstapriv->tim_bitmap &= ~BIT(0);				
+		
+			}	
+	
+			_exit_critical_bh(&psta_bmc->sleep_q.lock, &irqL);	
+
+		}
+
+	}
+#endif
+
+	return H2C_SUCCESS;
+	
+}
+
+#ifdef CONFIG_AP_MODE
+
+void init_mlme_ap_info(_adapter *padapter)
+{
+	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+
+	_rtw_spinlock_init(&pmlmepriv->bcn_update_lock);	
+
+	//pmlmeext->bstart_bss = _FALSE;
+
+	start_ap_mode(padapter);
+}
+
+void free_mlme_ap_info(_adapter *padapter)
+{
+	_irqL irqL;
+	struct sta_info *psta=NULL;
+	struct sta_priv *pstapriv = &padapter->stapriv;
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	//stop_ap_mode(padapter);
+
+	pmlmepriv->update_bcn = _FALSE;
+	pmlmeext->bstart_bss = _FALSE;	
+	
+	rtw_sta_flush(padapter);
+
+	pmlmeinfo->state = _HW_STATE_NOLINK_;
+
+	//free_assoc_sta_resources
+	rtw_free_all_stainfo(padapter);
+
+	//free bc/mc sta_info
+	psta = rtw_get_bcmc_stainfo(padapter);	
+	_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);		
+	rtw_free_stainfo(padapter, psta);
+	_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
+	
+
+	_rtw_spinlock_free(&pmlmepriv->bcn_update_lock);
+	
+}
+
+static void update_BCNTIM(_adapter *padapter)
+{
+	struct sta_priv *pstapriv = &padapter->stapriv;
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network;
+	struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX *pnetwork_mlmeext = &(pmlmeinfo->network);
+	unsigned char *src_ie = pnetwork->IEs;
+	unsigned int src_ielen = pnetwork->IELength;
+	unsigned char *dst_ie = pnetwork_mlmeext->IEs;
+	
+	
+	//update TIM IE
+	//if(pstapriv->tim_bitmap)
+	if(_TRUE)
+	{
+		u8 *p, ie_len;
+		u16 tim_bitmap_le;
+		u32 tmp_len, head_len=0;
+
+		tim_bitmap_le = cpu_to_le16(pstapriv->tim_bitmap);
+	
+		//calucate head_len		
+		head_len = _FIXED_IE_LENGTH_;
+		head_len += pnetwork->Ssid.SsidLength + 2;
+
+		// get supported rates len
+		p = rtw_get_ie(src_ie + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, &tmp_len, (pnetwork->IELength - _BEACON_IE_OFFSET_));	
+		if (p !=  NULL) 
+		{			
+			head_len += tmp_len+2;
+		}
+
+		//DS Parameter Set IE, len=3	
+		head_len += 3;
+
+		//copy head offset
+		_rtw_memcpy(dst_ie, src_ie, head_len);
+		
+
+		//append TIM IE from head_len offset
+		dst_ie+=head_len;
+
+		*dst_ie++=_TIM_IE_;
+
+		if((pstapriv->tim_bitmap&0xff00) && (pstapriv->tim_bitmap&0x00fc))			
+			ie_len = 5;
+		else
+			ie_len = 4;
+
+		*dst_ie++= ie_len;
+		
+		*dst_ie++=0;//DTIM count
+		*dst_ie++=1;//DTIM peroid
+		
+		if(pstapriv->tim_bitmap&BIT(0))//for bc/mc frames
+			*dst_ie++ = BIT(0);//bitmap ctrl 
+		else
+			*dst_ie++ = 0;
+
+		if(ie_len==4)
+		{
+			*dst_ie++ = *(u8*)&tim_bitmap_le;
+		}	
+		else if(ie_len==5)
+		{
+			_rtw_memcpy(dst_ie, &tim_bitmap_le, 2);
+			dst_ie+=2;				
+		}	
+		
+		//copy remainder IE
+		_rtw_memcpy(dst_ie, src_ie+head_len, src_ielen-head_len);
+
+		//pnetwork_mlmeext->Length += ie_len+2;
+		//pnetwork_mlmeext->IELength += ie_len+2;
+		pnetwork_mlmeext->Length = pnetwork->Length+ie_len+2;
+		pnetwork_mlmeext->IELength = src_ielen+ie_len+2;
+		
+	}
+	else
+	{
+		_rtw_memcpy(dst_ie, src_ie, src_ielen);
+		pnetwork_mlmeext->Length = pnetwork->Length;
+		pnetwork_mlmeext->IELength = src_ielen;
+	}
+
+#ifdef CONFIG_USB_HCI
+	set_tx_beacon_cmd(padapter);
+#endif
+
+
+/*
+	if(send_beacon(padapter)==_FAIL)
+	{
+		DBG_871X("issue_beacon, fail!\n");
+	}
+*/
+
+}
+
+u8 chk_sta_is_alive(struct sta_info *psta)
+{	
+	struct stainfo_stats *pstats;
+
+	pstats = &psta->sta_stats;
+
+	if(pstats->rx_pkts == pstats->last_rx_pkts)
+	{
+		if(psta->state&WIFI_SLEEP_STATE)
+			return _TRUE;
+		else
+			return _FALSE;
+	}
+	else
+	{
+		pstats->last_rx_pkts = pstats->rx_pkts;
+		
+		return _TRUE;
+	}
+	
+}
+
+void	expire_timeout_chk(_adapter *padapter)
+{
+	_irqL irqL;
+	_list	*phead, *plist;
+	struct sta_info *psta=NULL;	
+	struct sta_priv *pstapriv = &padapter->stapriv;	
+
+
+	_enter_critical_bh(&pstapriv->auth_list_lock, &irqL);
+	
+	phead = &pstapriv->auth_list;
+	plist = get_next(phead);
+
+	//check auth_queue
+	while ((rtw_end_of_queue_search(phead, plist)) == _FALSE)	
+	{
+		psta = LIST_CONTAINOR(plist, struct sta_info, auth_list);
+		
+		plist = get_next(plist);
+	
+		if(psta->expire_to>0)
+		{
+			psta->expire_to--;
+			if (psta->expire_to == 0)
+			{					
+				rtw_list_delete(&psta->auth_list);
+				
+				DBG_871X("auth expire %02X%02X%02X%02X%02X%02X\n",
+					psta->hwaddr[0],psta->hwaddr[1],psta->hwaddr[2],psta->hwaddr[3],psta->hwaddr[4],psta->hwaddr[5]);
+				
+				_exit_critical_bh(&pstapriv->auth_list_lock, &irqL);
+				
+				_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);	
+				rtw_free_stainfo(padapter, psta);
+				_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);	
+				
+				_enter_critical_bh(&pstapriv->auth_list_lock, &irqL);
+			}	
+		}	
+		
+	}
+
+	_exit_critical_bh(&pstapriv->auth_list_lock, &irqL);
+
+	psta = NULL;
+	
+
+	_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL);
+	
+	phead = &pstapriv->asoc_list;
+	plist = get_next(phead);
+
+	//check asoc_queue
+	while ((rtw_end_of_queue_search(phead, plist)) == _FALSE)	
+	{
+		psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list);
+		
+		plist = get_next(plist);
+	
+		if(chk_sta_is_alive(psta))
+		{
+			psta->expire_to = pstapriv->expire_to;
+#ifdef CONFIG_TX_MCAST2UNI
+			psta->under_exist_checking = 0;
+#endif	// CONFIG_TX_MCAST2UNI
+		}		
+	
+		if(psta->expire_to>0)
+		{
+			psta->expire_to--;
+
+#ifdef CONFIG_TX_MCAST2UNI
+			if ( (psta->flags & WLAN_STA_HT) && (psta->htpriv.agg_enable_bitmap || psta->under_exist_checking) ) {
+				// check sta by delba(addba) for 11n STA 
+				// ToDo: use CCX report to check for all STAs
+				//DBG_871X("asoc check by DELBA/ADDBA! (%d s), [%02x, %d]\n", (pstapriv->expire_to-psta->expire_to)*2, psta->htpriv.agg_enable_bitmap, psta->under_exist_checking);
+ 				if ( psta->expire_to <= (pstapriv->expire_to - 16 ) ) {
+					DBG_871X("asoc expire by DELBA/ADDBA! (%d s)\n", (pstapriv->expire_to-psta->expire_to)*2);
+					psta->under_exist_checking = 0;
+					psta->expire_to = 0;
+				} else if ( psta->expire_to <= (pstapriv->expire_to - 3) && (psta->under_exist_checking==0)) {
+					DBG_871X("asoc check by DELBA/ADDBA! (%d s)\n", (pstapriv->expire_to-psta->expire_to)*2);
+					psta->under_exist_checking = 1;
+					//tear down TX AMPDU
+					send_delba(padapter, 1, psta->hwaddr);// // originator
+					psta->htpriv.agg_enable_bitmap = 0x0;//reset
+					psta->htpriv.candidate_tid_bitmap = 0x0;//reset
+				}
+			}
+#endif	// CONFIG_TX_MCAST2UNI
+
+			if (psta->expire_to == 0)
+			{				
+				//_irqL irqL;
+			
+				rtw_list_delete(&psta->asoc_list);
+				
+				DBG_871X("asoc expire %02X%02X%02X%02X%02X%02X\n",
+					psta->hwaddr[0],psta->hwaddr[1],psta->hwaddr[2],psta->hwaddr[3],psta->hwaddr[4],psta->hwaddr[5]);
+#if 0
+				//tear down Rx AMPDU
+				send_delba(padapter, 0, psta->hwaddr);// recipient
+	
+				//tear down TX AMPDU
+				send_delba(padapter, 1, psta->hwaddr);// // originator
+				psta->htpriv.agg_enable_bitmap = 0x0;//reset
+				psta->htpriv.candidate_tid_bitmap = 0x0;//reset
+
+				issue_deauth(padapter, psta->hwaddr, WLAN_REASON_DEAUTH_LEAVING);
+
+				_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);	
+				rtw_free_stainfo(padapter, psta);
+				_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
+#endif
+				_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL);
+				ap_free_sta(padapter, psta);
+				_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL);
+				
+			}	
+		}	
+		
+	}
+
+	_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL);
+
+}
+
+
+static void add_RATid(_adapter *padapter, struct sta_info *psta)
+{	
+	int i;
+	u8 rf_type;
+	u32 init_rate=0;
+	unsigned char sta_band = 0, raid, shortGIrate = _FALSE;
+	unsigned char limit;	
+	unsigned int tx_ra_bitmap=0;
+	struct ht_priv	*psta_ht = NULL;
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	WLAN_BSSID_EX *pcur_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network;	
+
+	
+	if(psta)
+		psta_ht = &psta->htpriv;
+	else
+		return;
+	
+	//b/g mode ra_bitmap  
+	for (i=0; i<sizeof(psta->bssrateset); i++)
+	{
+		if (psta->bssrateset[i])
+			tx_ra_bitmap |= rtw_get_bit_value_from_ieee_value(psta->bssrateset[i]&0x7f);
+	}
+
+	//n mode ra_bitmap
+	if(psta_ht->ht_option) 
+	{
+		padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
+		if(rf_type == RF_2T2R)
+			limit=16;// 2R
+		else
+			limit=8;//  1R
+
+		for (i=0; i<limit; i++) {
+			if (psta_ht->ht_cap.supp_mcs_set[i/8] & BIT(i%8))
+				tx_ra_bitmap |= BIT(i+12);
+		}
+
+		//max short GI rate
+		shortGIrate = psta_ht->sgi;
+	}
+
+
+#if 0//gtest
+	if(get_rf_mimo_mode(padapter) == RTL8712_RF_2T2R)
+	{
+		//is this a 2r STA?
+		if((pstat->tx_ra_bitmap & 0x0ff00000) != 0 && !(priv->pshare->has_2r_sta & BIT(pstat->aid)))
+		{
+			priv->pshare->has_2r_sta |= BIT(pstat->aid);
+			if(rtw_read16(padapter, 0x102501f6) != 0xffff)
+			{
+				rtw_write16(padapter, 0x102501f6, 0xffff);
+				reset_1r_sta_RA(priv, 0xffff);
+				Switch_1SS_Antenna(priv, 3);
+			}
+		}
+		else// bg or 1R STA? 
+		{ 
+			if((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) && pstat->ht_cap_len && priv->pshare->has_2r_sta == 0)
+			{
+				if(rtw_read16(padapter, 0x102501f6) != 0x7777)
+				{ // MCS7 SGI
+					rtw_write16(padapter, 0x102501f6,0x7777);
+					reset_1r_sta_RA(priv, 0x7777);
+					Switch_1SS_Antenna(priv, 2);
+				}
+			}
+		}
+		
+	}
+
+	if ((pstat->rssi_level < 1) || (pstat->rssi_level > 3)) 
+	{
+		if (pstat->rssi >= priv->pshare->rf_ft_var.raGoDownUpper)
+			pstat->rssi_level = 1;
+		else if ((pstat->rssi >= priv->pshare->rf_ft_var.raGoDown20MLower) ||
+			((priv->pshare->is_40m_bw) && (pstat->ht_cap_len) &&
+			(pstat->rssi >= priv->pshare->rf_ft_var.raGoDown40MLower) &&
+			(pstat->ht_cap_buf.ht_cap_info & cpu_to_le16(_HTCAP_SUPPORT_CH_WDTH_))))
+			pstat->rssi_level = 2;
+		else
+			pstat->rssi_level = 3;
+	}
+
+	// rate adaptive by rssi
+	if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) && pstat->ht_cap_len)
+	{
+		if ((get_rf_mimo_mode(priv) == MIMO_1T2R) || (get_rf_mimo_mode(priv) == MIMO_1T1R))
+		{
+			switch (pstat->rssi_level) {
+				case 1:
+					pstat->tx_ra_bitmap &= 0x100f0000;
+					break;
+				case 2:
+					pstat->tx_ra_bitmap &= 0x100ff000;
+					break;
+				case 3:
+					if (priv->pshare->is_40m_bw)
+						pstat->tx_ra_bitmap &= 0x100ff005;
+					else
+						pstat->tx_ra_bitmap &= 0x100ff001;
+
+					break;
+			}
+		}
+		else 
+		{
+			switch (pstat->rssi_level) {
+				case 1:
+					pstat->tx_ra_bitmap &= 0x1f0f0000;
+					break;
+				case 2:
+					pstat->tx_ra_bitmap &= 0x1f0ff000;
+					break;
+				case 3:
+					if (priv->pshare->is_40m_bw)
+						pstat->tx_ra_bitmap &= 0x000ff005;
+					else
+						pstat->tx_ra_bitmap &= 0x000ff001;
+
+					break;
+			}
+
+			// Don't need to mask high rates due to new rate adaptive parameters
+			//if (pstat->is_broadcom_sta)		// use MCS12 as the highest rate vs. Broadcom sta
+			//	pstat->tx_ra_bitmap &= 0x81ffffff;
+
+			// NIC driver will report not supporting MCS15 and MCS14 in asoc req
+			//if (pstat->is_rtl8190_sta && !pstat->is_2t_mimo_sta)
+			//	pstat->tx_ra_bitmap &= 0x83ffffff;		// if Realtek 1x2 sta, don't use MCS15 and MCS14
+		}
+	}
+	else if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11G) && isErpSta(pstat))
+	{
+		switch (pstat->rssi_level) {
+			case 1:
+				pstat->tx_ra_bitmap &= 0x00000f00;
+				break;
+			case 2:
+				pstat->tx_ra_bitmap &= 0x00000ff0;
+				break;
+			case 3:
+				pstat->tx_ra_bitmap &= 0x00000ff5;
+				break;
+		}
+	}
+	else 
+	{
+		pstat->tx_ra_bitmap &= 0x0000000d;
+	}
+
+	// disable tx short GI when station cannot rx MCS15(AP is 2T2R)
+	// disable tx short GI when station cannot rx MCS7 (AP is 1T2R or 1T1R)
+	// if there is only 1r STA and we are 2T2R, DO NOT mask SGI rate
+	if ((!(pstat->tx_ra_bitmap & 0x8000000) && (priv->pshare->has_2r_sta > 0) && (get_rf_mimo_mode(padapter) == RTL8712_RF_2T2R)) ||
+		 (!(pstat->tx_ra_bitmap & 0x80000) && (get_rf_mimo_mode(padapter) != RTL8712_RF_2T2R)))
+	{
+		pstat->tx_ra_bitmap &= ~BIT(28);	
+	}
+#endif
+
+	if ( pcur_network->Configuration.DSConfig > 14 ) {
+		// 5G band
+		if (tx_ra_bitmap & 0xffff000)
+			sta_band |= WIRELESS_11_5N | WIRELESS_11A;
+		else
+			sta_band |= WIRELESS_11A;
+	} else {
+		if (tx_ra_bitmap & 0xffff000)
+			sta_band |= WIRELESS_11_24N | WIRELESS_11G | WIRELESS_11B;
+		else if (tx_ra_bitmap & 0xff0)
+			sta_band |= WIRELESS_11G |WIRELESS_11B;
+		else
+			sta_band |= WIRELESS_11B;
+	}
+
+	raid = networktype_to_raid(sta_band);	
+	init_rate = get_highest_rate_idx(tx_ra_bitmap&0x0fffffff)&0x3f;
+	
+	if (psta->aid < NUM_STA) 
+	{
+		u8 arg = 0;
+
+		arg = psta->mac_id&0x1f;
+		
+		arg |= BIT(7);
+		
+		if (shortGIrate==_TRUE)
+			arg |= BIT(5);
+
+		tx_ra_bitmap |= ((raid<<28)&0xf0000000);
+
+		DBG_871X("update raid entry, bitmap=0x%x, arg=0x%x\n", tx_ra_bitmap, arg);
+
+		//bitmap[0:27] = tx_rate_bitmap
+		//bitmap[28:31]= Rate Adaptive id
+		//arg[0:4] = macid
+		//arg[5] = Short GI
+		padapter->HalFunc.Add_RateATid(padapter, tx_ra_bitmap, arg);
+
+		if (shortGIrate==_TRUE)
+			init_rate |= BIT(6);
+		
+		//set ra_id, init_rate
+		psta->raid = raid;
+		psta->init_rate = init_rate;
+		
+	}
+	else 
+	{
+		DBG_871X("station aid %d exceed the max number\n", psta->aid);
+	}
+
+}
+
+static void update_bmc_sta(_adapter *padapter)
+{
+	_irqL	irqL;
+	u32 init_rate=0;
+	unsigned char	network_type, raid;
+	unsigned short para16;
+	int i, supportRateNum = 0;	
+	unsigned int tx_ra_bitmap=0;
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	WLAN_BSSID_EX *pcur_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network;	
+	struct sta_info *psta = rtw_get_bcmc_stainfo(padapter);
+
+	if(psta)
+	{
+		psta->aid = 0;//default set to 0
+		//psta->mac_id = psta->aid+4;	
+		psta->mac_id = psta->aid + 1;
+
+		psta->qos_option = 0;		
+		psta->htpriv.ht_option = _FALSE;
+
+		psta->ieee8021x_blocked = 0;
+
+		_rtw_memset((void*)&psta->sta_stats, 0, sizeof(struct stainfo_stats));
+
+		//psta->dot118021XPrivacy = _NO_PRIVACY_;//!!! remove it, because it has been set before this.
+
+
+
+		//prepare for add_RATid		
+		supportRateNum = rtw_get_rateset_len((u8*)&pcur_network->SupportedRates);
+		network_type = rtw_check_network_type((u8*)&pcur_network->SupportedRates, supportRateNum, 1);
+		
+		_rtw_memcpy(psta->bssrateset, &pcur_network->SupportedRates, supportRateNum);
+		psta->bssratelen = supportRateNum;
+
+		//b/g mode ra_bitmap  
+		for (i=0; i<supportRateNum; i++)
+		{	
+			if (psta->bssrateset[i])
+				tx_ra_bitmap |= rtw_get_bit_value_from_ieee_value(psta->bssrateset[i]&0x7f);
+		}
+
+		if ( pcur_network->Configuration.DSConfig > 14 ) {
+			//force to A mode. 5G doesn't support CCK rates
+			network_type = WIRELESS_11A;
+			tx_ra_bitmap = 0x150; // 6, 12, 24 Mbps		
+		} else {
+			//force to b mode 
+			network_type = WIRELESS_11B;
+			tx_ra_bitmap = 0xf;		
+		}
+
+		//tx_ra_bitmap = update_basic_rate(pcur_network->SupportedRates, supportRateNum);
+
+		raid = networktype_to_raid(network_type);
+		init_rate = get_highest_rate_idx(tx_ra_bitmap&0x0fffffff)&0x3f;
+				
+		//DBG_871X("Add id %d val %08x to ratr for bmc sta\n", psta->aid, tx_ra_bitmap);
+
+		//if(pHalData->fw_ractrl == _TRUE)
+		{
+			u8 arg = 0;
+
+			arg = psta->mac_id&0x1f;
+		
+			arg |= BIT(7);
+		
+			//if (shortGIrate==_TRUE)
+			//	arg |= BIT(5);
+			
+			tx_ra_bitmap |= ((raid<<28)&0xf0000000);			
+
+			DBG_871X("update_bmc_sta, mask=0x%x, arg=0x%x\n", tx_ra_bitmap, arg);
+
+			//bitmap[0:27] = tx_rate_bitmap
+			//bitmap[28:31]= Rate Adaptive id
+			//arg[0:4] = macid
+			//arg[5] = Short GI
+			padapter->HalFunc.Add_RateATid(padapter, tx_ra_bitmap, arg);			
+		
+		}
+
+		//set ra_id, init_rate
+		psta->raid = raid;
+		psta->init_rate = init_rate;
+	 
+		_enter_critical_bh(&psta->lock, &irqL);
+		psta->state = _FW_LINKED;
+		_exit_critical_bh(&psta->lock, &irqL);
+
+	}
+	else
+	{
+		DBG_871X("add_RATid_bmc_sta error!\n");
+	}
+		
+}
+
+//notes:
+//AID: 1~MAX for sta and 0 for bc/mc in ap/adhoc mode 
+//MAC_ID = AID+1 for sta in ap/adhoc mode 
+//MAC_ID = 1 for bc/mc for sta/ap/adhoc
+//MAC_ID = 0 for bssid for sta/ap/adhoc
+//CAM_ID = //0~3 for default key, cmd_id=macid + 3, macid=aid+1;
+
+void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta)
+{	
+	_irqL	irqL;
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	struct security_priv *psecuritypriv = &padapter->securitypriv;
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct ht_priv	*phtpriv_ap = &pmlmepriv->htpriv;
+	struct ht_priv	*phtpriv_sta = &psta->htpriv;
+
+	//set intf_tag to if1
+	//psta->intf_tag = 0;
+
+	//psta->mac_id = psta->aid+4;
+	psta->mac_id = psta->aid+1; 
+	
+	if(psecuritypriv->dot11AuthAlgrthm==dot11AuthAlgrthm_8021X)
+		psta->ieee8021x_blocked = _TRUE;
+	else
+		psta->ieee8021x_blocked = _FALSE;
+	
+
+	//update sta's cap
+	
+	//ERP
+	VCS_update(padapter, psta);
+		
+	//HT related cap
+	if(phtpriv_sta->ht_option)
+	{
+		//check if sta supports rx ampdu
+		phtpriv_sta->ampdu_enable = phtpriv_ap->ampdu_enable;
+
+		//check if sta support s Short GI
+		if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_20|IEEE80211_HT_CAP_SGI_40))
+		{
+			phtpriv_sta->sgi = _TRUE;
+		}
+
+		// bwmode
+		if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SUP_WIDTH))
+		{
+			//phtpriv_sta->bwmode = HT_CHANNEL_WIDTH_40;
+			phtpriv_sta->bwmode = pmlmeext->cur_bwmode;
+			phtpriv_sta->ch_offset = pmlmeext->cur_ch_offset;
+			
+		}		
+
+		psta->qos_option = _TRUE;
+		
+	}
+	else
+	{
+		phtpriv_sta->ampdu_enable = _FALSE;
+		
+		phtpriv_sta->sgi = _FALSE;
+		phtpriv_sta->bwmode = HT_CHANNEL_WIDTH_20;
+		phtpriv_sta->ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+	}
+
+	//Rx AMPDU
+	send_delba(padapter, 0, psta->hwaddr);// recipient
+	
+	//TX AMPDU
+	send_delba(padapter, 1, psta->hwaddr);// // originator
+	phtpriv_sta->agg_enable_bitmap = 0x0;//reset
+	phtpriv_sta->candidate_tid_bitmap = 0x0;//reset
+	
+
+	//todo: init other variables
+	
+	_rtw_memset((void*)&psta->sta_stats, 0, sizeof(struct stainfo_stats));
+
+
+	//add ratid
+	//add_RATid(padapter, psta);//move to ap_sta_info_defer_update()
+
+
+	_enter_critical_bh(&psta->lock, &irqL);
+	psta->state |= _FW_LINKED;
+	_exit_critical_bh(&psta->lock, &irqL);
+	
+
+}
+
+static void update_hw_ht_param(_adapter *padapter)
+{
+	unsigned char		max_AMPDU_len;
+	unsigned char		min_MPDU_spacing;
+	struct registry_priv	 *pregpriv = &padapter->registrypriv;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	
+	DBG_871X("%s\n", __FUNCTION__);
+	
+
+	//handle A-MPDU parameter field
+	/* 	
+		AMPDU_para [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k
+		AMPDU_para [4:2]:Min MPDU Start Spacing	
+	*/
+	max_AMPDU_len = pmlmeinfo->HT_caps.HT_cap_element.AMPDU_para & 0x03;	
+	
+	min_MPDU_spacing = (pmlmeinfo->HT_caps.HT_cap_element.AMPDU_para & 0x1c) >> 2;	
+
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AMPDU_MIN_SPACE, (u8 *)(&min_MPDU_spacing));
+
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&max_AMPDU_len));
+
+	//
+	// Config SM Power Save setting
+	//
+	pmlmeinfo->SM_PS = (pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info & 0x0C) >> 2;
+	if(pmlmeinfo->SM_PS == WLAN_HT_CAP_SM_PS_STATIC)
+	{
+		/*u8 i;
+		//update the MCS rates
+		for (i = 0; i < 16; i++)
+		{
+			pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i];
+		}*/
+		DBG_8192C("%s(): WLAN_HT_CAP_SM_PS_STATIC\n",__FUNCTION__);
+	}
+
+	//
+	// Config current HT Protection mode.
+	//
+	//pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3;
+
+}
+
+static void start_bss_network(_adapter *padapter, u8 *pbuf)
+{
+	u8 *p;
+	u8 val8, cur_channel, cur_bwmode, cur_ch_offset;
+	u16 bcn_interval;
+	u32	acparm;	
+	int	ie_len;	
+	struct registry_priv	 *pregpriv = &padapter->registrypriv;
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	struct security_priv* psecuritypriv=&(padapter->securitypriv);	
+	WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network;
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX *pnetwork_mlmeext = &(pmlmeinfo->network);
+#ifdef CONFIG_P2P
+	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
+#endif //CONFIG_P2P
+	
+	
+	//DBG_8192C("%s\n", __FUNCTION__);
+
+	bcn_interval = (u16)pnetwork->Configuration.BeaconPeriod;	
+	cur_channel = pnetwork->Configuration.DSConfig;
+	cur_bwmode = HT_CHANNEL_WIDTH_20;;
+	cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+	
+
+	//check if there is wps ie, 
+	//if there is wpsie in beacon, the hostapd will update beacon twice when stating hostapd,
+	//and at first time the security ie ( RSN/WPA IE) will not include in beacon.
+	if(NULL == rtw_get_wps_ie(pnetwork->IEs, pnetwork->IELength, NULL, &ie_len))
+	{
+		pmlmeext->bstart_bss = _TRUE;
+	}
+	
+	//udpate capability	
+	update_capinfo(padapter, rtw_get_capability((WLAN_BSSID_EX *)pnetwork));
+	
+	//todo: update wmm, ht cap
+	//pmlmeinfo->WMM_enable;
+	//pmlmeinfo->HT_enable;
+	if(pmlmepriv->qospriv.qos_option)
+		pmlmeinfo->WMM_enable = _TRUE;
+
+	if(pmlmepriv->htpriv.ht_option)
+	{
+		pmlmeinfo->WMM_enable = _TRUE;
+		pmlmeinfo->HT_enable = _TRUE;
+		//pmlmeinfo->HT_info_enable = _TRUE;
+		//pmlmeinfo->HT_caps_enable = _TRUE;
+
+		update_hw_ht_param(padapter);
+	}
+	
+
+	if(pmlmepriv->cur_network.join_res != _TRUE) //setting only at  first time
+	{		
+		flush_all_cam_entry(padapter);	//clear CAM
+	}	
+
+	//set MSR to AP_Mode		
+	Set_NETYPE0_MSR(padapter, _HW_STATE_AP_);	
+		
+	//Set BSSID REG
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BSSID, pnetwork->MacAddress);
+
+	//Set EDCA param reg
+	acparm = 0x002F3217; // VO
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acparm));
+	acparm = 0x005E4317; // VI
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acparm));
+	//acparm = 0x00105320; // BE
+	acparm = 0x005ea42b;
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm));
+	acparm = 0x0000A444; // BK
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acparm));
+
+	//Set Security
+	val8 = (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X)? 0xcc: 0xcf;
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8));
+
+	//Beacon Control related register
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)(&bcn_interval));
+
+	
+	UpdateBrateTbl(padapter, pnetwork->SupportedRates);
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BASIC_RATE, pnetwork->SupportedRates);
+
+	if(pmlmepriv->cur_network.join_res != _TRUE) //setting only at  first time
+	{
+		u32 initialgain;
+
+		//disable dynamic functions, such as high power, DIG
+		//Save_DM_Func_Flag(padapter);
+		//Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE);
+		
+			//turn on dynamic functions	
+			Switch_DM_Func(padapter, DYNAMIC_FUNC_DIG|DYNAMIC_FUNC_HP|DYNAMIC_FUNC_SS, _TRUE);
+
+		initialgain = 0x30;
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain));
+	
+	}
+
+	//set channel, bwmode	
+	p = rtw_get_ie((pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_ADD_INFO_IE_, &ie_len, (pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs)));
+	if( p && ie_len)
+	{
+		struct HT_info_element *pht_info = (struct HT_info_element *)(p+2);
+					
+		if ((pregpriv->cbw40_enable) &&	 (pht_info->infos[0] & BIT(2)))
+		{
+			//switch to the 40M Hz mode
+			//pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_40;
+			cur_bwmode = HT_CHANNEL_WIDTH_40;
+			switch (pht_info->infos[0] & 0x3)
+			{
+				case 1:
+					//pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER;
+					cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER;
+					break;
+			
+				case 3:
+					//pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER;
+					cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER;					
+					break;
+				
+				default:
+					//pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+					cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+					break;
+			}		
+						
+		}
+					
+	}
+
+	//TODO: need to judge the phy parameters on concurrent mode for single phy
+	//set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
+	set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode);
+
+	DBG_871X("CH=%d, BW=%d, offset=%d\n", cur_channel, cur_bwmode, cur_ch_offset);
+
+	//
+	pmlmeext->cur_channel = cur_channel;	
+	pmlmeext->cur_bwmode = cur_bwmode;
+	pmlmeext->cur_ch_offset = cur_ch_offset;	
+	pmlmeext->cur_wireless_mode = pmlmepriv->cur_network.network_type;
+
+	//update cur_wireless_mode
+	update_wireless_mode(padapter);
+	
+	//let pnetwork_mlmeext == pnetwork_mlme.
+	_rtw_memcpy(pnetwork_mlmeext, pnetwork, pnetwork->Length);
+
+#ifdef CONFIG_P2P
+	_rtw_memcpy(pwdinfo->p2p_group_ssid, pnetwork->Ssid.Ssid, pnetwork->Ssid.SsidLength);	
+	pwdinfo->p2p_group_ssid_len = pnetwork->Ssid.SsidLength;
+#endif //CONFIG_P2P
+
+	
+	if(_TRUE == pmlmeext->bstart_bss)
+	{
+       	        update_beacon(padapter, _TIM_IE_, NULL, _FALSE);
+
+		//issue beacon frame
+		if(send_beacon(padapter)==_FAIL)
+		{
+			DBG_871X("issue_beacon, fail!\n");
+		}
+	}
+
+
+	//update bc/mc sta_info
+	update_bmc_sta(padapter);
+	
+	//pmlmeext->bstart_bss = _TRUE;
+	
+}
+
+int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf,  int len)
+{
+	int ret=_SUCCESS;
+	u8 *p;
+	u8 *pHT_caps_ie=NULL;
+	u8 *pHT_info_ie=NULL;
+	struct sta_info *psta = NULL;
+	u16 cap, ht_cap=_FALSE;
+	uint ie_len = 0;
+	int group_cipher, pairwise_cipher;	
+	u8	channel, network_type, supportRate[NDIS_802_11_LENGTH_RATES_EX];
+	int supportRateNum = 0;
+	u8 OUI1[] = {0x00, 0x50, 0xf2,0x01};
+	u8 wps_oui[4]={0x0,0x50,0xf2,0x04};
+	u8 WMM_PARA_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01};	
+	struct registry_priv *pregistrypriv = &padapter->registrypriv;	
+	struct security_priv *psecuritypriv = &padapter->securitypriv;
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	WLAN_BSSID_EX *pbss_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network;	
+	struct sta_priv *pstapriv = &padapter->stapriv;
+	u8 *ie = pbss_network->IEs;
+	
+
+	/* SSID */
+	/* Supported rates */
+	/* DS Params */
+	/* WLAN_EID_COUNTRY */
+	/* ERP Information element */
+	/* Extended supported rates */
+	/* WPA/WPA2 */
+	/* Wi-Fi Wireless Multimedia Extensions */
+	/* ht_capab, ht_oper */
+	/* WPS IE */
+
+	DBG_8192C("%s, len=%d\n", __FUNCTION__, len);
+
+	if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE)
+		return _FAIL;
+
+
+	if(len>MAX_IE_SZ)
+		return _FAIL;
+	
+	pbss_network->IELength = len;
+
+	_rtw_memset(ie, 0, MAX_IE_SZ);
+	
+	_rtw_memcpy(ie, pbuf, pbss_network->IELength);
+
+
+	if(pbss_network->InfrastructureMode!=Ndis802_11APMode)
+		return _FAIL;
+
+	pbss_network->Rssi = 0;
+
+	_rtw_memcpy(pbss_network->MacAddress, myid(&(padapter->eeprompriv)), ETH_ALEN);
+	
+	//beacon interval
+	p = rtw_get_beacon_interval_from_ie(ie);//ie + 8;	// 8: TimeStamp, 2: Beacon Interval 2:Capability
+	//pbss_network->Configuration.BeaconPeriod = le16_to_cpu(*(unsigned short*)p);
+	pbss_network->Configuration.BeaconPeriod = RTW_GET_LE16(p);
+	
+	//capability
+	//cap = *(unsigned short *)rtw_get_capability_from_ie(ie);
+	//cap = le16_to_cpu(cap);
+	cap = RTW_GET_LE16(ie);
+
+	//SSID
+	p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SSID_IE_, &ie_len, (pbss_network->IELength -_BEACON_IE_OFFSET_));
+	if(p && ie_len>0)
+	{
+		_rtw_memset(&pbss_network->Ssid, 0, sizeof(NDIS_802_11_SSID));
+		_rtw_memcpy(pbss_network->Ssid.Ssid, (p + 2), ie_len);
+		pbss_network->Ssid.SsidLength = ie_len;
+	}	
+
+	//chnnel
+	channel = 0;
+	pbss_network->Configuration.Length = 0;
+	p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _DSSET_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_));
+	if(p && ie_len>0)
+		channel = *(p + 2);
+
+	pbss_network->Configuration.DSConfig = channel;
+
+	
+	_rtw_memset(supportRate, 0, NDIS_802_11_LENGTH_RATES_EX);
+	// get supported rates
+	p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_));	
+	if (p !=  NULL) 
+	{
+		_rtw_memcpy(supportRate, p+2, ie_len);	
+		supportRateNum = ie_len;
+	}
+	
+	//get ext_supported rates
+	p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _EXT_SUPPORTEDRATES_IE_, &ie_len, pbss_network->IELength - _BEACON_IE_OFFSET_);	
+	if (p !=  NULL)
+	{
+		_rtw_memcpy(supportRate+supportRateNum, p+2, ie_len);
+		supportRateNum += ie_len;
+	
+	}
+
+	network_type = rtw_check_network_type(supportRate, supportRateNum, channel);
+
+	rtw_set_supported_rate(pbss_network->SupportedRates, network_type);
+
+
+	//parsing ERP_IE
+	p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _ERPINFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_));
+	if(p && ie_len>0)
+	{
+		ERP_IE_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)p);
+	}
+
+	//update privacy/security
+	if (cap & BIT(4))
+		pbss_network->Privacy = 1;
+	else
+		pbss_network->Privacy = 0;
+
+	psecuritypriv->wpa_psk = 0;
+
+	//wpa2
+	group_cipher = 0; pairwise_cipher = 0;
+	psecuritypriv->wpa2_group_cipher = _NO_PRIVACY_;
+	psecuritypriv->wpa2_pairwise_cipher = _NO_PRIVACY_;	
+	p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _RSN_IE_2_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_));		
+	if(p && ie_len>0)
+	{
+		if(rtw_parse_wpa2_ie(p, ie_len+2, &group_cipher, &pairwise_cipher) == _SUCCESS)
+		{
+			psecuritypriv->dot11AuthAlgrthm= dot11AuthAlgrthm_8021X;
+			
+			psecuritypriv->dot8021xalg = 1;//psk,  todo:802.1x
+			psecuritypriv->wpa_psk |= BIT(1);
+
+			psecuritypriv->wpa2_group_cipher = group_cipher;
+			psecuritypriv->wpa2_pairwise_cipher = pairwise_cipher;
+#if 0
+			switch(group_cipher)
+			{
+				case WPA_CIPHER_NONE:				
+				psecuritypriv->wpa2_group_cipher = _NO_PRIVACY_;
+				break;
+				case WPA_CIPHER_WEP40:				
+				psecuritypriv->wpa2_group_cipher = _WEP40_;
+				break;
+				case WPA_CIPHER_TKIP:				
+				psecuritypriv->wpa2_group_cipher = _TKIP_;
+				break;
+				case WPA_CIPHER_CCMP:				
+				psecuritypriv->wpa2_group_cipher = _AES_;				
+				break;
+				case WPA_CIPHER_WEP104:					
+				psecuritypriv->wpa2_group_cipher = _WEP104_;
+				break;
+			}
+
+			switch(pairwise_cipher)
+			{
+				case WPA_CIPHER_NONE:			
+				psecuritypriv->wpa2_pairwise_cipher = _NO_PRIVACY_;
+				break;
+				case WPA_CIPHER_WEP40:			
+				psecuritypriv->wpa2_pairwise_cipher = _WEP40_;
+				break;
+				case WPA_CIPHER_TKIP:				
+				psecuritypriv->wpa2_pairwise_cipher = _TKIP_;
+				break;
+				case WPA_CIPHER_CCMP:			
+				psecuritypriv->wpa2_pairwise_cipher = _AES_;
+				break;
+				case WPA_CIPHER_WEP104:					
+				psecuritypriv->wpa2_pairwise_cipher = _WEP104_;
+				break;
+			}
+#endif			
+		}
+		
+	}
+
+	//wpa
+	ie_len = 0;
+	group_cipher = 0; pairwise_cipher = 0;
+	psecuritypriv->wpa_group_cipher = _NO_PRIVACY_;
+	psecuritypriv->wpa_pairwise_cipher = _NO_PRIVACY_;	
+	for (p = ie + _BEACON_IE_OFFSET_; ;p += (ie_len + 2))
+	{
+		p = rtw_get_ie(p, _SSN_IE_1_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2)));		
+		if ((p) && (_rtw_memcmp(p+2, OUI1, 4)))
+		{
+			if(rtw_parse_wpa_ie(p, ie_len+2, &group_cipher, &pairwise_cipher) == _SUCCESS)
+			{
+				psecuritypriv->dot11AuthAlgrthm= dot11AuthAlgrthm_8021X;
+				
+				psecuritypriv->dot8021xalg = 1;//psk,  todo:802.1x
+
+				psecuritypriv->wpa_psk |= BIT(0);
+
+				psecuritypriv->wpa_group_cipher = group_cipher;
+				psecuritypriv->wpa_pairwise_cipher = pairwise_cipher;
+
+#if 0
+				switch(group_cipher)
+				{
+					case WPA_CIPHER_NONE:					
+					psecuritypriv->wpa_group_cipher = _NO_PRIVACY_;
+					break;
+					case WPA_CIPHER_WEP40:					
+					psecuritypriv->wpa_group_cipher = _WEP40_;
+					break;
+					case WPA_CIPHER_TKIP:					
+					psecuritypriv->wpa_group_cipher = _TKIP_;
+					break;
+					case WPA_CIPHER_CCMP:					
+					psecuritypriv->wpa_group_cipher = _AES_;				
+					break;
+					case WPA_CIPHER_WEP104:					
+					psecuritypriv->wpa_group_cipher = _WEP104_;
+					break;
+				}
+
+				switch(pairwise_cipher)
+				{
+					case WPA_CIPHER_NONE:					
+					psecuritypriv->wpa_pairwise_cipher = _NO_PRIVACY_;
+					break;
+					case WPA_CIPHER_WEP40:					
+					psecuritypriv->wpa_pairwise_cipher = _WEP40_;
+					break;
+					case WPA_CIPHER_TKIP:					
+					psecuritypriv->wpa_pairwise_cipher = _TKIP_;
+					break;
+					case WPA_CIPHER_CCMP:					
+					psecuritypriv->wpa_pairwise_cipher = _AES_;
+					break;
+					case WPA_CIPHER_WEP104:					
+					psecuritypriv->wpa_pairwise_cipher = _WEP104_;
+					break;
+				}
+#endif				
+			}
+
+			break;
+			
+		}
+			
+		if ((p == NULL) || (ie_len == 0))
+		{
+				break;
+		}
+		
+	}
+
+	//wmm
+	ie_len = 0;
+	pmlmepriv->qospriv.qos_option = 0;
+	if(pregistrypriv->wmm_enable)
+	{
+		for (p = ie + _BEACON_IE_OFFSET_; ;p += (ie_len + 2))
+		{			
+			p = rtw_get_ie(p, _VENDOR_SPECIFIC_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2)));	
+			if((p) && _rtw_memcmp(p+2, WMM_PARA_IE, 6)) 
+			{
+				pmlmepriv->qospriv.qos_option = 1;	
+
+				*(p+8) |= BIT(7);//QoS Info, support U-APSD
+				
+				break;				
+			}
+			
+			if ((p == NULL) || (ie_len == 0))
+			{
+				break;
+			}			
+		}		
+	}
+
+	//parsing HT_CAP_IE
+	p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_CAPABILITY_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_));
+	if(p && ie_len>0)
+	{
+		u8 rf_type;
+
+		struct ieee80211_ht_cap *pht_cap = (struct ieee80211_ht_cap *)(p+2);
+
+		pHT_caps_ie=p;
+		
+		
+		ht_cap = _TRUE;
+		network_type |= WIRELESS_11_24N;
+
+	
+		padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
+
+		if((psecuritypriv->wpa_pairwise_cipher & WPA_CIPHER_CCMP) ||
+			(psecuritypriv->wpa2_pairwise_cipher & WPA_CIPHER_CCMP))
+		{
+			pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&(0x07<<2)); 
+		}	
+		else
+		{
+			pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&0x00);	
+		}	
+		
+
+		if(rf_type == RF_1T1R)
+		{			
+			pht_cap->supp_mcs_set[0] = 0xff;
+			pht_cap->supp_mcs_set[1] = 0x0;				
+		}
+
+		_rtw_memcpy(&pmlmepriv->htpriv.ht_cap, p+2, ie_len);		
+		
+	}
+
+	//parsing HT_INFO_IE
+	p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_ADD_INFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_));
+	if(p && ie_len>0)
+	{
+		pHT_info_ie=p;
+	}
+
+	switch(network_type)
+	{
+		case WIRELESS_11B:
+			pbss_network->NetworkTypeInUse = Ndis802_11DS;
+			break;	
+		case WIRELESS_11G:
+		case WIRELESS_11BG:
+             case WIRELESS_11G_24N:
+		case WIRELESS_11BG_24N:
+			pbss_network->NetworkTypeInUse = Ndis802_11OFDM24;
+			break;
+		case WIRELESS_11A:
+			pbss_network->NetworkTypeInUse = Ndis802_11OFDM5;
+			break;
+		default :
+			pbss_network->NetworkTypeInUse = Ndis802_11OFDM24;
+			break;
+	}
+	
+	pmlmepriv->cur_network.network_type = network_type;
+
+
+	pmlmepriv->htpriv.ht_option = _FALSE;
+#ifdef CONFIG_80211N_HT
+	if( (psecuritypriv->wpa2_pairwise_cipher&WPA_CIPHER_TKIP) ||
+		      (psecuritypriv->wpa_pairwise_cipher&WPA_CIPHER_TKIP))
+	{	
+		//todo:
+		//ht_cap = _FALSE;
+	}
+		      
+	//ht_cap	
+	if(pregistrypriv->ht_enable && ht_cap==_TRUE)
+	{		
+		pmlmepriv->htpriv.ht_option = _TRUE;
+		pmlmepriv->qospriv.qos_option = 1;
+
+		if(pregistrypriv->ampdu_enable==1)
+		{
+			pmlmepriv->htpriv.ampdu_enable = _TRUE;
+		}
+
+		HT_caps_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)pHT_caps_ie);
+		
+		HT_info_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)pHT_info_ie);
+	}
+#endif
+
+
+	pbss_network->Length = get_WLAN_BSSID_EX_sz((WLAN_BSSID_EX  *)pbss_network);
+
+	//issue beacon to start bss network
+	start_bss_network(padapter, (u8*)pbss_network);
+			
+
+	//alloc sta_info for ap itself
+	psta = rtw_get_stainfo(&padapter->stapriv, pbss_network->MacAddress);
+	if(!psta)
+	{
+		psta = rtw_alloc_stainfo(&padapter->stapriv, pbss_network->MacAddress);
+		if (psta == NULL) 
+		{ 
+			return _FAIL;
+		}	
+	}	
+			
+	rtw_indicate_connect( padapter);
+
+	pmlmepriv->cur_network.join_res = _TRUE;//for check if already set beacon
+		
+	//update bc/mc sta_info
+	//update_bmc_sta(padapter);
+
+	return ret;
+
+}
+
+#ifdef CONFIG_NATIVEAP_MLME
+
+static void update_bcn_fixed_ie(_adapter *padapter)
+{
+	DBG_871X("%s\n", __FUNCTION__);
+
+}
+
+static void update_bcn_erpinfo_ie(_adapter *padapter)
+{
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	DBG_871X("%s\n", __FUNCTION__);
+
+	if(!pmlmeinfo->ERP_enable)
+		return;
+	
+
+}
+
+static void update_bcn_htcap_ie(_adapter *padapter)
+{
+	DBG_871X("%s\n", __FUNCTION__);
+
+}
+
+static void update_bcn_htinfo_ie(_adapter *padapter)
+{	
+	DBG_871X("%s\n", __FUNCTION__);
+
+}
+
+static void update_bcn_rsn_ie(_adapter *padapter)
+{
+	DBG_871X("%s\n", __FUNCTION__);
+
+}
+
+static void update_bcn_wpa_ie(_adapter *padapter)
+{
+	DBG_871X("%s\n", __FUNCTION__);
+
+}
+
+static void update_bcn_wmm_ie(_adapter *padapter)
+{
+	DBG_871X("%s\n", __FUNCTION__);
+	
+}
+
+static void update_bcn_wps_ie(_adapter *padapter)
+{
+	int match;
+	u8 *pwps_ie=NULL, *pwps_ie_src, *premainder_ie, *pbackup_remainder_ie=NULL;
+	uint wps_ielen=0, wps_offset, remainder_ielen;
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network);
+	unsigned char *ie = pnetwork->IEs;
+	u32 ielen = pnetwork->IELength;
+
+
+	DBG_871X("%s\n", __FUNCTION__);
+
+	pwps_ie = rtw_get_wps_ie(ie, ielen, NULL, &wps_ielen);
+	
+	if(pwps_ie==NULL || wps_ielen==0)
+		return;
+
+	wps_offset = (uint)(pwps_ie-ie);
+
+	premainder_ie = pwps_ie + wps_ielen;
+
+	remainder_ielen = ielen - wps_offset - wps_ielen;
+
+	if(remainder_ielen>0)
+	{
+		pbackup_remainder_ie = rtw_malloc(remainder_ielen);
+		if(pbackup_remainder_ie)
+			_rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen);
+	}
+
+	
+	pwps_ie_src = pmlmepriv->wps_beacon_ie;
+	if(pwps_ie_src == NULL)
+		return;
+
+
+	wps_ielen = (uint)pwps_ie_src[1];//to get ie data len
+	if((wps_offset+wps_ielen+2+remainder_ielen)<=MAX_IE_SZ)
+	{
+		_rtw_memcpy(pwps_ie, pwps_ie_src, wps_ielen+2);
+		pwps_ie += (wps_ielen+2);
+
+		if(pbackup_remainder_ie)
+			_rtw_memcpy(pwps_ie, pbackup_remainder_ie, remainder_ielen);
+
+		//update IELength
+		pnetwork->IELength = wps_offset + (wps_ielen+2) + remainder_ielen;
+	}
+
+	if(pbackup_remainder_ie)
+		rtw_mfree(pbackup_remainder_ie, remainder_ielen);
+
+}
+
+static void update_bcn_vendor_spec_ie(_adapter *padapter, u8*oui)
+{
+	DBG_871X("%s\n", __FUNCTION__);
+
+	if(_rtw_memcmp(WPA_OUI, oui, 4))
+	{
+		update_bcn_wpa_ie(padapter);
+	}
+	else if(_rtw_memcmp(WMM_OUI, oui, 4))
+	{
+		update_bcn_wmm_ie(padapter);
+	}
+	else if(_rtw_memcmp(WPS_OUI, oui, 4))
+	{
+		update_bcn_wps_ie(padapter);
+	}
+	else
+	{
+		DBG_871X("unknown OUI type!\n");
+ 	}
+	
+	
+}
+
+void update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx)
+{
+	_irqL irqL;
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	
+	//DBG_871X("%s\n", __FUNCTION__);
+
+	if(_FALSE == pmlmeext->bstart_bss)
+		return;
+
+	_enter_critical_bh(&pmlmepriv->bcn_update_lock, &irqL);
+
+	switch(ie_id)
+	{
+		case 0xFF:
+
+			update_bcn_fixed_ie(padapter);//8: TimeStamp, 2: Beacon Interval 2:Capability
+			
+			break;
+	
+		case _TIM_IE_:
+			
+			update_BCNTIM(padapter);
+			
+			break;
+
+		case _ERPINFO_IE_:
+
+			update_bcn_erpinfo_ie(padapter);
+
+			break;
+
+		case _HT_CAPABILITY_IE_:
+
+			update_bcn_htcap_ie(padapter);
+			
+			break;
+
+		case _RSN_IE_2_:
+
+			update_bcn_rsn_ie(padapter);
+
+			break;
+			
+		case _HT_ADD_INFO_IE_:
+
+			update_bcn_htinfo_ie(padapter);
+			
+			break;
+	
+		case _VENDOR_SPECIFIC_IE_:
+
+			update_bcn_vendor_spec_ie(padapter, oui);
+			
+			break;
+			
+		default:
+			break;
+	}
+
+	pmlmepriv->update_bcn = _TRUE;
+	
+	_exit_critical_bh(&pmlmepriv->bcn_update_lock, &irqL);		
+
+#ifdef CONFIG_USB_HCI
+	if(tx)
+	{
+		//send_beacon(padapter);//send_beacon must execute on TSR level
+		set_tx_beacon_cmd(padapter);
+	}
+#else
+	{	
+		//PCI will issue beacon when BCN interrupt occurs.		
+	}
+#endif
+	
+}
+
+#ifdef CONFIG_80211N_HT
+
+/*
+op_mode
+Set to 0 (HT pure) under the followign conditions
+	- all STAs in the BSS are 20/40 MHz HT in 20/40 MHz BSS or
+	- all STAs in the BSS are 20 MHz HT in 20 MHz BSS
+Set to 1 (HT non-member protection) if there may be non-HT STAs
+	in both the primary and the secondary channel
+Set to 2 if only HT STAs are associated in BSS,
+	however and at least one 20 MHz HT STA is associated
+Set to 3 (HT mixed mode) when one or more non-HT STAs are associated
+	(currently non-GF HT station is considered as non-HT STA also)
+*/
+static int rtw_ht_operation_update(_adapter *padapter)
+{
+	u16 cur_op_mode, new_op_mode;
+	int op_mode_changes = 0;
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	struct ht_priv	*phtpriv_ap = &pmlmepriv->htpriv;
+
+	if(pmlmepriv->htpriv.ht_option == _TRUE) 
+		return 0;
+	
+	//if (!iface->conf->ieee80211n || iface->conf->ht_op_mode_fixed)
+	//	return 0;
+
+	DBG_871X("%s current operation mode=0x%X\n",
+		   __FUNCTION__, pmlmepriv->ht_op_mode);
+
+	if (!(pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT)
+	    && pmlmepriv->num_sta_ht_no_gf) {
+		pmlmepriv->ht_op_mode |=
+			HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT;
+		op_mode_changes++;
+	} else if ((pmlmepriv->ht_op_mode &
+		    HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT) &&
+		   pmlmepriv->num_sta_ht_no_gf == 0) {
+		pmlmepriv->ht_op_mode &=
+			~HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT;
+		op_mode_changes++;
+	}
+
+	if (!(pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT) &&
+	    (pmlmepriv->num_sta_no_ht || pmlmepriv->olbc_ht)) {
+		pmlmepriv->ht_op_mode |= HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT;
+		op_mode_changes++;
+	} else if ((pmlmepriv->ht_op_mode &
+		    HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT) &&
+		   (pmlmepriv->num_sta_no_ht == 0 && !pmlmepriv->olbc_ht)) {
+		pmlmepriv->ht_op_mode &=
+			~HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT;
+		op_mode_changes++;
+	}
+
+	/* Note: currently we switch to the MIXED op mode if HT non-greenfield
+	 * station is associated. Probably it's a theoretical case, since
+	 * it looks like all known HT STAs support greenfield.
+	 */
+	new_op_mode = 0;
+	if (pmlmepriv->num_sta_no_ht ||
+	    (pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT))
+		new_op_mode = OP_MODE_MIXED;
+	else if ((phtpriv_ap->ht_cap.cap_info & IEEE80211_HT_CAP_SUP_WIDTH)
+		 && pmlmepriv->num_sta_ht_20mhz)
+		new_op_mode = OP_MODE_20MHZ_HT_STA_ASSOCED;
+	else if (pmlmepriv->olbc_ht)
+		new_op_mode = OP_MODE_MAY_BE_LEGACY_STAS;
+	else
+		new_op_mode = OP_MODE_PURE;
+
+	cur_op_mode = pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_OP_MODE_MASK;
+	if (cur_op_mode != new_op_mode) {
+		pmlmepriv->ht_op_mode &= ~HT_INFO_OPERATION_MODE_OP_MODE_MASK;
+		pmlmepriv->ht_op_mode |= new_op_mode;
+		op_mode_changes++;
+	}
+
+	DBG_871X("%s new operation mode=0x%X changes=%d\n",
+		   __FUNCTION__, pmlmepriv->ht_op_mode, op_mode_changes);
+
+	return op_mode_changes;
+	
+}
+
+#endif /* CONFIG_80211N_HT */
+
+/* called > TSR LEVEL for USB or SDIO Interface*/
+void bss_cap_update(_adapter *padapter, struct sta_info *psta)
+{
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+
+#if 0
+	if (psta->flags & WLAN_STA_NONERP && !psta->nonerp_set) {
+		psta->nonerp_set = 1;
+		pmlmepriv->num_sta_non_erp++;
+		if (pmlmepriv->num_sta_non_erp == 1)
+			ieee802_11_set_beacons(hapd->iface);
+	}
+#endif
+
+	if(psta->flags & WLAN_STA_NONERP)
+	{
+		if(!psta->nonerp_set)
+		{
+			psta->nonerp_set = 1;
+			
+			pmlmepriv->num_sta_non_erp++;
+			
+			if (pmlmepriv->num_sta_non_erp == 1)
+				update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE);
+		}
+		
+	}
+	else
+	{
+		if(psta->nonerp_set)
+		{
+			psta->nonerp_set = 0;
+			
+			pmlmepriv->num_sta_non_erp--;
+			
+			if (pmlmepriv->num_sta_non_erp == 0)
+				update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE);
+		}
+		
+	}
+
+
+#if 0
+	if (!(psta->capability & WLAN_CAPABILITY_SHORT_SLOT) &&
+	    !psta->no_short_slot_time_set) {
+		psta->no_short_slot_time_set = 1;
+		pmlmepriv->num_sta_no_short_slot_time++;
+		if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) &&
+		    (pmlmepriv->num_sta_no_short_slot_time == 1))
+			ieee802_11_set_beacons(hapd->iface);
+	}
+#endif
+
+	if(!(psta->capability & WLAN_CAPABILITY_SHORT_SLOT))
+	{
+		if(!psta->no_short_slot_time_set)
+		{
+			psta->no_short_slot_time_set = 1;
+			
+			pmlmepriv->num_sta_no_short_slot_time++;
+			
+			if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) &&
+		   		 (pmlmepriv->num_sta_no_short_slot_time == 1))
+						update_beacon(padapter, 0xFF, NULL, _TRUE);
+			
+		}
+	}
+	else
+	{
+		if(psta->no_short_slot_time_set)
+		{
+			psta->no_short_slot_time_set = 0;
+			
+			pmlmepriv->num_sta_no_short_slot_time--;
+			
+			if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) &&
+		   		 (pmlmepriv->num_sta_no_short_slot_time == 0))
+						update_beacon(padapter, 0xFF, NULL, _TRUE);
+		}
+	}
+		
+	
+#if 0
+	if (!(psta->capability & WLAN_CAPABILITY_SHORT_PREAMBLE) &&
+	    !psta->no_short_preamble_set) {
+		psta->no_short_preamble_set = 1;
+		pmlmepriv->num_sta_no_short_preamble++;
+		if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && 
+		     (pmlmepriv->num_sta_no_short_preamble == 1))
+			ieee802_11_set_beacons(hapd->iface);
+	}
+#endif
+
+
+	if(!(psta->flags & WLAN_STA_SHORT_PREAMBLE))	
+	{
+		if(!psta->no_short_preamble_set)
+		{
+			psta->no_short_preamble_set = 1;
+			
+			pmlmepriv->num_sta_no_short_preamble++;
+			
+			if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && 
+		     		(pmlmepriv->num_sta_no_short_preamble == 1))
+					update_beacon(padapter, 0xFF, NULL, _TRUE);
+			
+		}
+	}
+	else
+	{
+		if(psta->no_short_preamble_set)
+		{
+			psta->no_short_preamble_set = 0;
+			
+			pmlmepriv->num_sta_no_short_preamble--;
+			
+			if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && 
+		     		(pmlmepriv->num_sta_no_short_preamble == 0))
+					update_beacon(padapter, 0xFF, NULL, _TRUE);
+			
+		}
+	}
+
+
+#ifdef CONFIG_80211N_HT
+
+	if (psta->flags & WLAN_STA_HT) 
+	{
+		u16 ht_capab = le16_to_cpu(psta->htpriv.ht_cap.cap_info);
+			
+		DBG_871X("HT: STA " MAC_FMT " HT Capabilities "
+			   "Info: 0x%04x\n", MAC_ARG(psta->hwaddr), ht_capab);
+
+		if (psta->no_ht_set) {
+			psta->no_ht_set = 0;
+			pmlmepriv->num_sta_no_ht--;
+		}
+		
+		if ((ht_capab & IEEE80211_HT_CAP_GRN_FLD) == 0) {
+			if (!psta->no_ht_gf_set) {
+				psta->no_ht_gf_set = 1;
+				pmlmepriv->num_sta_ht_no_gf++;
+			}
+			DBG_871X("%s STA " MAC_FMT " - no "
+				   "greenfield, num of non-gf stations %d\n",
+				   __FUNCTION__, MAC_ARG(psta->hwaddr),
+				   pmlmepriv->num_sta_ht_no_gf);
+		}
+		
+		if ((ht_capab & IEEE80211_HT_CAP_SUP_WIDTH) == 0) {
+			if (!psta->ht_20mhz_set) {
+				psta->ht_20mhz_set = 1;
+				pmlmepriv->num_sta_ht_20mhz++;
+			}
+			DBG_871X("%s STA " MAC_FMT " - 20 MHz HT, "
+				   "num of 20MHz HT STAs %d\n",
+				   __FUNCTION__, MAC_ARG(psta->hwaddr),
+				   pmlmepriv->num_sta_ht_20mhz);
+		}
+		
+	} 
+	else 
+	{
+		if (!psta->no_ht_set) {
+			psta->no_ht_set = 1;
+			pmlmepriv->num_sta_no_ht++;
+		}
+		if(pmlmepriv->htpriv.ht_option == _TRUE) {		
+			DBG_871X("%s STA " MAC_FMT
+				   " - no HT, num of non-HT stations %d\n",
+				   __FUNCTION__, MAC_ARG(psta->hwaddr),
+				   pmlmepriv->num_sta_no_ht);
+		}
+	}
+
+	if (rtw_ht_operation_update(padapter) > 0)
+	{
+		update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, _FALSE);
+		update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _TRUE);
+	}	
+	
+#endif /* CONFIG_80211N_HT */
+
+}
+
+void ap_free_sta(_adapter *padapter, struct sta_info *psta)
+{
+	_irqL irqL;	
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct sta_priv *pstapriv = &padapter->stapriv;
+
+	if(!psta)
+		return;
+
+
+	if (psta->nonerp_set) {
+		psta->nonerp_set = 0;		
+		pmlmepriv->num_sta_non_erp--;
+		if (pmlmepriv->num_sta_non_erp == 0)
+			update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE);
+	}
+
+	if (psta->no_short_slot_time_set) {
+		psta->no_short_slot_time_set = 0;
+		pmlmepriv->num_sta_no_short_slot_time--;
+		if (pmlmeext->cur_wireless_mode > WIRELESS_11B
+		    && pmlmepriv->num_sta_no_short_slot_time == 0)
+			update_beacon(padapter, 0xFF, NULL, _TRUE);
+	}
+
+	if (psta->no_short_preamble_set) {
+		psta->no_short_preamble_set = 0;
+		pmlmepriv->num_sta_no_short_preamble--;
+		if (pmlmeext->cur_wireless_mode > WIRELESS_11B
+		    && pmlmepriv->num_sta_no_short_preamble == 0)
+			update_beacon(padapter, 0xFF, NULL, _TRUE);
+	}
+	
+#ifdef CONFIG_80211N_HT
+
+	if (psta->no_ht_gf_set) {
+		psta->no_ht_gf_set = 0;
+		pmlmepriv->num_sta_ht_no_gf--;
+	}
+
+	if (psta->no_ht_set) {
+		psta->no_ht_set = 0;
+		pmlmepriv->num_sta_no_ht--;
+	}
+
+	if (psta->ht_20mhz_set) {
+		psta->ht_20mhz_set = 0;
+		pmlmepriv->num_sta_ht_20mhz--;
+	}
+
+	if (rtw_ht_operation_update(padapter) > 0)
+	{
+		update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, _FALSE);
+		update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _TRUE);
+	}
+	
+#endif /* CONFIG_80211N_HT */
+		
+	
+	//tear down Rx AMPDU
+	send_delba(padapter, 0, psta->hwaddr);// recipient
+	
+	//tear down TX AMPDU
+	send_delba(padapter, 1, psta->hwaddr);// // originator
+	psta->htpriv.agg_enable_bitmap = 0x0;//reset
+	psta->htpriv.candidate_tid_bitmap = 0x0;//reset
+
+
+	issue_deauth(padapter, psta->hwaddr, WLAN_REASON_DEAUTH_LEAVING);
+
+	//report_del_sta_event(padapter, psta->hwaddr);
+
+	//clear key
+	//clear_cam_entry(padapter, (psta->mac_id + 3));
+
+	_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);					
+	rtw_free_stainfo(padapter, psta);
+	_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
+	
+
+}
+
+int rtw_sta_flush(_adapter *padapter)
+{
+	_irqL irqL;
+	_list	*phead, *plist;
+	int ret=0;	
+	struct sta_info *psta = NULL;	
+	struct sta_priv *pstapriv = &padapter->stapriv;
+	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff};
+
+	DBG_871X("%s\n", __FUNCTION__);
+
+	if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE)
+		return ret;
+
+
+	_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL);
+	phead = &pstapriv->asoc_list;
+	plist = get_next(phead);
+	
+	//free sta asoc_queue
+	while ((rtw_end_of_queue_search(phead, plist)) == _FALSE)	
+	{		
+		psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list);
+		
+		plist = get_next(plist);
+
+		rtw_list_delete(&psta->asoc_list);		
+
+		_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL);
+		ap_free_sta(padapter, psta);
+		_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL);
+	}
+	_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL);
+
+
+	issue_deauth(padapter, bc_addr, WLAN_REASON_DEAUTH_LEAVING);
+
+	return ret;
+
+}
+
+/* called > TSR LEVEL for USB or SDIO Interface*/
+void sta_info_update(_adapter *padapter, struct sta_info *psta)
+{	
+	int flags = psta->flags;
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	
+				
+	//update wmm cap.
+	if(WLAN_STA_WME&flags)
+		psta->qos_option = 1;
+	else
+		psta->qos_option = 0;
+
+	if(pmlmepriv->qospriv.qos_option == 0)	
+		psta->qos_option = 0;
+
+		
+#ifdef CONFIG_80211N_HT		
+	//update 802.11n ht cap.
+	if(WLAN_STA_HT&flags)
+	{
+		psta->htpriv.ht_option = _TRUE;
+		psta->qos_option = 1;	
+	}
+	else		
+	{
+		psta->htpriv.ht_option = _FALSE;
+	}
+		
+	if(pmlmepriv->htpriv.ht_option == _FALSE)	
+		psta->htpriv.ht_option = _FALSE;
+#endif		
+
+
+	update_sta_info_apmode(padapter, psta);
+		
+
+}
+
+/* called >= TSR LEVEL for USB or SDIO Interface*/
+void ap_sta_info_defer_update(_adapter *padapter, struct sta_info *psta)
+{
+	if(psta->state & _FW_LINKED)
+	{	
+		//add ratid
+		add_RATid(padapter, psta);
+	}	
+}
+
+void start_ap_mode(_adapter *padapter)
+{
+	int i;
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	struct sta_priv *pstapriv = &padapter->stapriv;
+	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+	
+	pmlmepriv->update_bcn = _FALSE;
+	
+	//init_mlme_ap_info(padapter);
+	pmlmeext->bstart_bss = _FALSE;
+
+	pmlmepriv->num_sta_non_erp = 0;
+
+	pmlmepriv->num_sta_no_short_slot_time = 0;
+
+	pmlmepriv->num_sta_no_short_preamble = 0;
+
+	pmlmepriv->num_sta_ht_no_gf = 0;
+
+	pmlmepriv->num_sta_no_ht = 0;
+	
+	pmlmepriv->num_sta_ht_20mhz = 0;
+
+	pmlmepriv->olbc = _FALSE;
+
+	pmlmepriv->olbc_ht = _FALSE;
+	
+#ifdef CONFIG_80211N_HT
+	pmlmepriv->ht_op_mode = 0;
+#endif
+
+	for(i=0; i<NUM_STA; i++)
+		pstapriv->sta_aid[i] = NULL;
+
+	pmlmepriv->wps_beacon_ie = NULL;	
+	pmlmepriv->wps_probe_resp_ie = NULL;
+	pmlmepriv->wps_assoc_resp_ie = NULL;
+	
+
+}
+
+void stop_ap_mode(_adapter *padapter)
+{
+	_irqL irqL;
+	//_list	*phead, *plist;
+	struct sta_info *psta=NULL;
+	struct sta_priv *pstapriv = &padapter->stapriv;
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+
+	pmlmepriv->update_bcn = _FALSE;
+	pmlmeext->bstart_bss = _FALSE;
+	//_rtw_spinlock_free(&pmlmepriv->bcn_update_lock);
+
+	//phead = &pstapriv->asoc_list;
+	//plist = get_next(phead);
+	
+	rtw_sta_flush(padapter);
+
+#if 0	
+	//free sta asoc_queue
+	while ((rtw_end_of_queue_search(phead, plist)) == _FALSE)	
+	{		
+		psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list);
+		
+		plist = get_next(plist);
+
+		rtw_list_delete(&psta->asoc_list);		
+
+		//tear down Rx AMPDU
+		send_delba(padapter, 0, psta->hwaddr);// recipient
+	
+		//tear down TX AMPDU
+		send_delba(padapter, 1, psta->hwaddr);// // originator
+		psta->htpriv.agg_enable_bitmap = 0x0;//reset
+		psta->htpriv.candidate_tid_bitmap = 0x0;//reset
+
+		issue_deauth(padapter, psta->hwaddr, WLAN_REASON_DEAUTH_LEAVING);
+
+		_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);					
+		rtw_free_stainfo(padapter, psta);
+		_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
+		
+	}
+#endif	
+
+	//free_assoc_sta_resources	
+	rtw_free_all_stainfo(padapter);
+	
+	psta = rtw_get_bcmc_stainfo(padapter);
+	_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);		
+	rtw_free_stainfo(padapter, psta);
+	_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
+	
+	rtw_init_bcmc_stainfo(padapter);	
+
+
+	if(pmlmepriv->wps_beacon_ie)
+	{
+		rtw_mfree(pmlmepriv->wps_beacon_ie, pmlmepriv->wps_beacon_ie_len);
+		pmlmepriv->wps_beacon_ie = NULL;
+	}	
+
+	if(pmlmepriv->wps_probe_resp_ie)
+	{
+		rtw_mfree(pmlmepriv->wps_probe_resp_ie, pmlmepriv->wps_probe_resp_ie_len);
+		pmlmepriv->wps_probe_resp_ie = NULL;
+	}	
+
+	if(pmlmepriv->wps_assoc_resp_ie)
+	{
+		rtw_mfree(pmlmepriv->wps_assoc_resp_ie, pmlmepriv->wps_assoc_resp_ie_len);
+		pmlmepriv->wps_assoc_resp_ie = NULL;
+	}
+
+}
+
+
+#endif
+
+#endif
+
+u8 set_chplan_hdl(_adapter *padapter, unsigned char *pbuf)
+{
+	struct SetChannelPlan_param *setChannelPlan_param;
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+
+	if(!pbuf)
+		return H2C_PARAMETERS_ERROR;
+	setChannelPlan_param = (struct SetChannelPlan_param *)pbuf;
+
+	pmlmeext->max_chan_nums = init_channel_set(padapter, setChannelPlan_param->channel_plan, pmlmeext->channel_set);
+
+	return 	H2C_SUCCESS;
+}
+
+u8 led_blink_hdl(_adapter *padapter, unsigned char *pbuf)
+{
+	struct LedBlink_param *ledBlink_param;
+
+	if(!pbuf)
+		return H2C_PARAMETERS_ERROR;
+
+	ledBlink_param = (struct LedBlink_param *)pbuf;
+
+	#ifdef CONFIG_LED_HANDLED_BY_CMD_THREAD
+	BlinkHandler(ledBlink_param->pLed);
+	#endif
+
+	return 	H2C_SUCCESS;
+}
+
+u8 set_csa_hdl(_adapter *padapter, unsigned char *pbuf)
+{
+#ifdef CONFIG_DFS
+	struct SetChannelSwitch_param *setChannelSwitch_param;
+	struct SetChannelPlan_param *setChannelPlan_param;
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
+	u8 new_ch_no;
+	u8 gval8 = 0x00, sval8 = 0xff;
+
+	if(!pbuf)
+		return H2C_PARAMETERS_ERROR;
+
+	setChannelSwitch_param = (struct SetChannelSwitch_param *)pbuf;
+	new_ch_no = setChannelSwitch_param->new_ch_no;
+	
+	padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_TXPAUSE, &gval8);
+	
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_TXPAUSE, &sval8);
+
+	DBG_8192C("DFS detected! Swiching channel to %d!\n", new_ch_no);
+	SelectChannel(padapter, new_ch_no);
+
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_TXPAUSE, &gval8);
+
+	rtw_free_network_queue(padapter, _TRUE);
+	rtw_indicate_disconnect(padapter);
+
+	if ( ((new_ch_no >= 52) && (new_ch_no <= 64)) ||((new_ch_no >= 100) && (new_ch_no <= 140)) ) {
+		DBG_8192C("Switched to DFS band (ch %02x) again!!\n", new_ch_no);
+	 } 
+
+	return 	H2C_SUCCESS;
+#else
+	return	H2C_REJECTED;
+#endif //CONFIG_DFS
+
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_mp.c linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_mp.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_mp.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_mp.c	2017-09-23 03:42:49.894675443 +0800
@@ -0,0 +1,1318 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _RTW_MP_C_
+
+#include <drv_types.h>
+
+#ifdef CONFIG_RTL8712
+#include <rtw_mp_phy_regdef.h>
+#endif
+#ifdef CONFIG_RTL8192C
+#include <rtl8192c_hal.h>
+#endif
+#ifdef CONFIG_RTL8192D
+#include <rtl8192d_hal.h>
+#endif
+
+
+#ifdef CONFIG_MP_INCLUDED
+
+u32 read_macreg(_adapter *padapter, u32 addr, u32 sz)
+{
+	u32 val = 0;
+
+	switch(sz)
+	{
+		case 1:
+			val = rtw_read8(padapter, addr);
+			break;
+		case 2:
+			val = rtw_read16(padapter, addr);
+			break;
+		case 4:
+			val = rtw_read32(padapter, addr);
+			break;
+		default:
+			val = 0xffffffff;
+			break;
+	}
+
+	return val;
+	
+}
+
+void write_macreg(_adapter *padapter, u32 addr, u32 val, u32 sz)
+{
+	switch(sz)
+	{
+		case 1:
+			rtw_write8(padapter, addr, (u8)val);
+			break;
+		case 2:
+			rtw_write16(padapter, addr, (u16)val);
+			break;
+		case 4:
+			rtw_write32(padapter, addr, val);
+			break;
+		default:
+			break;
+	}
+
+}
+
+u32 read_bbreg(_adapter *padapter, u32 addr, u32 bitmask)
+{
+	return padapter->HalFunc.read_bbreg(padapter, addr, bitmask);
+}
+
+void write_bbreg(_adapter *padapter, u32 addr, u32 bitmask, u32 val)
+{
+	padapter->HalFunc.write_bbreg(padapter, addr, bitmask, val);
+}
+
+u32 _read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask)
+{
+	return padapter->HalFunc.read_rfreg(padapter, (RF90_RADIO_PATH_E)rfpath, addr, bitmask);
+}
+
+void _write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask, u32 val)
+{
+	padapter->HalFunc.write_rfreg(padapter, (RF90_RADIO_PATH_E)rfpath, addr, bitmask, val);
+}
+
+u32 read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr)
+{
+	return _read_rfreg(padapter, (RF90_RADIO_PATH_E)rfpath, addr, bRFRegOffsetMask);
+}
+
+void write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 val)
+{
+	_write_rfreg(padapter, (RF90_RADIO_PATH_E)rfpath, addr, bRFRegOffsetMask, val);
+}
+
+
+static void _init_mp_priv_(struct mp_priv *pmp_priv)
+{
+	WLAN_BSSID_EX *pnetwork;
+
+	_rtw_memset(pmp_priv, 0, sizeof(struct mp_priv));
+
+	pmp_priv->mode = MP_OFF;
+
+	pmp_priv->channel = 1;
+	pmp_priv->bandwidth = HT_CHANNEL_WIDTH_20;
+	pmp_priv->prime_channel_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+	pmp_priv->rateidx = MPT_RATE_1M;
+	pmp_priv->txpoweridx = 0x2A;
+
+	pmp_priv->antenna_tx = ANTENNA_A;
+	pmp_priv->antenna_rx = ANTENNA_AB;
+
+	pmp_priv->check_mp_pkt = 0;
+
+	pmp_priv->tx_pktcount = 0;
+
+	pmp_priv->rx_pktcount = 0;
+	pmp_priv->rx_crcerrpktcount = 0;
+
+	pmp_priv->network_macaddr[0] = 0x00;
+	pmp_priv->network_macaddr[1] = 0xE0;
+	pmp_priv->network_macaddr[2] = 0x4C;
+	pmp_priv->network_macaddr[3] = 0x87;
+	pmp_priv->network_macaddr[4] = 0x66;
+	pmp_priv->network_macaddr[5] = 0x55;
+
+	pnetwork = &pmp_priv->mp_network.network;
+	_rtw_memcpy(pnetwork->MacAddress, pmp_priv->network_macaddr, ETH_ALEN);
+
+	pnetwork->Ssid.SsidLength = 8;
+	_rtw_memcpy(pnetwork->Ssid.Ssid, "mp_871x", pnetwork->Ssid.SsidLength);
+}
+
+#ifdef PLATFORM_WINDOWS
+/*
+void mp_wi_callback(
+	IN NDIS_WORK_ITEM*	pwk_item,
+	IN PVOID			cntx
+	)
+{
+	_adapter* padapter =(_adapter *)cntx;
+	struct mp_priv *pmppriv=&padapter->mppriv;
+	struct mp_wi_cntx	*pmp_wi_cntx=&pmppriv->wi_cntx;
+
+	// Execute specified action.
+	if(pmp_wi_cntx->curractfunc != NULL)
+	{
+		LARGE_INTEGER	cur_time;
+		ULONGLONG start_time, end_time;
+		NdisGetCurrentSystemTime(&cur_time);	// driver version
+		start_time = cur_time.QuadPart/10; // The return value is in microsecond
+
+		pmp_wi_cntx->curractfunc(padapter);
+
+		NdisGetCurrentSystemTime(&cur_time);	// driver version
+		end_time = cur_time.QuadPart/10; // The return value is in microsecond
+
+		RT_TRACE(_module_mp_, _drv_info_,
+			 ("WorkItemActType: %d, time spent: %I64d us\n",
+			  pmp_wi_cntx->param.act_type, (end_time-start_time)));
+	}
+
+	NdisAcquireSpinLock(&(pmp_wi_cntx->mp_wi_lock));
+	pmp_wi_cntx->bmp_wi_progress= _FALSE;
+	NdisReleaseSpinLock(&(pmp_wi_cntx->mp_wi_lock));
+
+	if (pmp_wi_cntx->bmpdrv_unload)
+	{
+		NdisSetEvent(&(pmp_wi_cntx->mp_wi_evt));
+	}
+
+}
+*/
+
+static int init_mp_priv_by_os(struct mp_priv *pmp_priv)
+{
+	struct mp_wi_cntx *pmp_wi_cntx;
+
+	if (pmp_priv == NULL) return _FAIL;
+
+	pmp_priv->rx_testcnt = 0;
+	pmp_priv->rx_testcnt1 = 0;
+	pmp_priv->rx_testcnt2 = 0;
+
+	pmp_priv->tx_testcnt = 0;
+	pmp_priv->tx_testcnt1 = 0;
+
+	pmp_wi_cntx = &pmp_priv->wi_cntx
+	pmp_wi_cntx->bmpdrv_unload = _FALSE;
+	pmp_wi_cntx->bmp_wi_progress = _FALSE;
+	pmp_wi_cntx->curractfunc = NULL;
+
+	return _SUCCESS;
+}
+#endif
+
+#ifdef PLATFORM_LINUX
+static int init_mp_priv_by_os(struct mp_priv *pmp_priv)
+{
+	int i, res;
+	struct mp_xmit_frame *pmp_xmitframe;
+
+	if (pmp_priv == NULL) return _FAIL;
+
+	_rtw_init_queue(&pmp_priv->free_mp_xmitqueue);
+
+	pmp_priv->pallocated_mp_xmitframe_buf = NULL;
+	pmp_priv->pallocated_mp_xmitframe_buf = rtw_zmalloc(NR_MP_XMITFRAME * sizeof(struct mp_xmit_frame) + 4);
+	if (pmp_priv->pallocated_mp_xmitframe_buf == NULL) {
+		res = _FAIL;
+		goto _exit_init_mp_priv;
+	}
+
+	pmp_priv->pmp_xmtframe_buf = pmp_priv->pallocated_mp_xmitframe_buf + 4 - ((uint) (pmp_priv->pallocated_mp_xmitframe_buf) & 3);
+
+	pmp_xmitframe = (struct mp_xmit_frame*)pmp_priv->pmp_xmtframe_buf;
+
+	for (i = 0; i < NR_MP_XMITFRAME; i++)
+	{
+		_rtw_init_listhead(&pmp_xmitframe->list);
+		rtw_list_insert_tail(&pmp_xmitframe->list, &pmp_priv->free_mp_xmitqueue.queue);
+
+		pmp_xmitframe->pkt = NULL;
+		pmp_xmitframe->frame_tag = MP_FRAMETAG;
+		pmp_xmitframe->padapter = pmp_priv->papdater;
+
+		pmp_xmitframe++;
+	}
+
+	pmp_priv->free_mp_xmitframe_cnt = NR_MP_XMITFRAME;
+
+	res = _SUCCESS;
+
+_exit_init_mp_priv:
+
+	return res;
+}
+#endif
+
+static void mp_init_xmit_attrib(struct mp_tx *pmptx, PADAPTER padapter)
+{
+	struct pkt_attrib *pattrib;
+	struct tx_desc *desc;
+
+	// init xmitframe attribute
+	pattrib = &pmptx->attrib;
+	_rtw_memset(pattrib, 0, sizeof(struct pkt_attrib));
+	desc = &pmptx->desc;
+	_rtw_memset(desc, 0, TXDESC_SIZE);
+
+	pattrib->ether_type = 0x8712;
+	//_rtw_memcpy(pattrib->src, padapter->eeprompriv.mac_addr, ETH_ALEN);
+//	_rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
+	_rtw_memset(pattrib->dst, 0xFF, ETH_ALEN);
+//	pattrib->pctrl = 0;
+//	pattrib->dhcp_pkt = 0;
+//	pattrib->pktlen = 0;
+	pattrib->ack_policy = 0;
+//	pattrib->pkt_hdrlen = ETH_HLEN;
+	pattrib->hdrlen = WLAN_HDR_A3_LEN;
+	pattrib->subtype = WIFI_DATA;
+	pattrib->priority = 0;
+	pattrib->qsel = pattrib->priority;
+//	do_queue_select(padapter, pattrib);
+	pattrib->nr_frags = 1;
+	pattrib->encrypt = 0;
+	pattrib->bswenc = _FALSE;
+	pattrib->qos_en = _FALSE;
+}
+
+s32 init_mp_priv(PADAPTER padapter)
+{
+	struct mp_priv *pmppriv = &padapter->mppriv;
+
+	_init_mp_priv_(pmppriv);
+	pmppriv->papdater = padapter;
+
+	pmppriv->tx.stop = 1;
+	mp_init_xmit_attrib(&pmppriv->tx, padapter);
+
+	switch (padapter->registrypriv.rf_config) {
+		case RF_1T1R:
+			pmppriv->antenna_tx = ANTENNA_A;
+			pmppriv->antenna_rx = ANTENNA_A;
+			break;
+		case RF_1T2R:
+		default:
+			pmppriv->antenna_tx = ANTENNA_A;
+			pmppriv->antenna_rx = ANTENNA_AB;
+			break;
+		case RF_2T2R:
+		case RF_2T2R_GREEN:
+			pmppriv->antenna_tx = ANTENNA_AB;
+			pmppriv->antenna_rx = ANTENNA_AB;
+			break;
+		case RF_2T4R:
+			pmppriv->antenna_tx = ANTENNA_AB;
+			pmppriv->antenna_rx = ANTENNA_ABCD;
+			break;
+	}
+
+	return _SUCCESS;
+}
+
+void free_mp_priv(struct mp_priv *pmp_priv)
+{
+	if (pmp_priv->pallocated_mp_xmitframe_buf) {
+		rtw_mfree(pmp_priv->pallocated_mp_xmitframe_buf, 0);
+		pmp_priv->pallocated_mp_xmitframe_buf = NULL;
+	}
+	pmp_priv->pmp_xmtframe_buf = NULL;
+}
+
+#ifdef CONFIG_RTL8192C
+#define PHY_IQCalibrate(a,b)	rtl8192c_PHY_IQCalibrate(a,b)
+#define PHY_LCCalibrate(a)	rtl8192c_PHY_LCCalibrate(a)
+#define dm_CheckTXPowerTracking(a)	rtl8192c_dm_CheckTXPowerTracking(a)
+#define PHY_SetRFPathSwitch(a,b)	rtl8192c_PHY_SetRFPathSwitch(a,b)
+#endif
+
+#ifdef CONFIG_RTL8192D
+#define PHY_IQCalibrate(a)	rtl8192d_PHY_IQCalibrate(a)
+#define PHY_LCCalibrate(a)	rtl8192d_PHY_LCCalibrate(a)
+#define dm_CheckTXPowerTracking(a)	rtl8192d_dm_CheckTXPowerTracking(a)
+#define PHY_SetRFPathSwitch(a,b)	rtl8192d_PHY_SetRFPathSwitch(a,b)
+#endif
+
+s32
+MPT_InitializeAdapter(
+	IN	PADAPTER			pAdapter,
+	IN	u8				Channel
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	s32		rtStatus = _SUCCESS;
+	PMPT_CONTEXT	pMptCtx = &pAdapter->mppriv.MptCtx;
+	u32		tmpRegA, tmpRegC, TempCCk,ledsetting;
+
+	//-------------------------------------------------------------------------
+	// HW Initialization for 8190 MPT.
+	//-------------------------------------------------------------------------
+	//-------------------------------------------------------------------------
+	// SW Initialization for 8190 MP.
+	//-------------------------------------------------------------------------
+	pMptCtx->bMptDrvUnload = _FALSE;
+	pMptCtx->bMassProdTest = _FALSE;
+	pMptCtx->bMptIndexEven = _TRUE;	//default gain index is -6.0db
+
+	/* Init mpt event. */
+#if 0 // for Windows
+	NdisInitializeEvent( &(pMptCtx->MptWorkItemEvent) );
+	NdisAllocateSpinLock( &(pMptCtx->MptWorkItemSpinLock) );
+
+	PlatformInitializeWorkItem(
+		Adapter,
+		&(pMptCtx->MptWorkItem),
+		(RT_WORKITEM_CALL_BACK)MPT_WorkItemCallback,
+		(PVOID)Adapter,
+		"MptWorkItem");
+#endif
+	pMptCtx->bMptWorkItemInProgress = _FALSE;
+	pMptCtx->CurrMptAct = NULL;
+	//-------------------------------------------------------------------------
+
+#if 1
+	// Don't accept any packets
+	rtw_write32(pAdapter, REG_RCR, 0);
+#else
+	// Accept CRC error and destination address
+	pHalData->ReceiveConfig |= (RCR_ACRC32|RCR_AAP);
+	rtw_write32(pAdapter, REG_RCR, pHalData->ReceiveConfig);
+#endif
+
+#if 0
+	// If EEPROM or EFUSE is empty,we assign as RF 2T2R for MP.
+	if (pHalData->AutoloadFailFlag == TRUE)
+	{
+		pHalData->RF_Type = RF_2T2R;
+	}
+#endif
+	ledsetting = rtw_read32(pAdapter, REG_LEDCFG0);
+	rtw_write32(pAdapter, REG_LEDCFG0, ledsetting & ~LED0DIS);
+
+#ifdef CONFIG_RTL8192C
+	PHY_IQCalibrate(pAdapter, _FALSE);
+	dm_CheckTXPowerTracking(pAdapter);	//trigger thermal meter
+	PHY_LCCalibrate(pAdapter);
+#endif
+
+#ifdef CONFIG_RTL8192D
+	PHY_IQCalibrate(pAdapter);
+	dm_CheckTXPowerTracking(pAdapter);	//trigger thermal meter
+	PHY_LCCalibrate(pAdapter);
+#endif
+
+#ifdef CONFIG_PCI_HCI
+	PHY_SetRFPathSwitch(pAdapter, 1/*pHalData->bDefaultAntenna*/);	//Wifi default use Main
+#else
+
+#ifdef CONFIG_RTL8192C
+#if 1
+	if (pHalData->BoardType == BOARD_MINICARD)
+		PHY_SetRFPathSwitch(pAdapter, 1/*pHalData->bDefaultAntenna*/); //default use Main
+#else
+	if(pAdapter->HalFunc.GetInterfaceSelectionHandler(pAdapter) == INTF_SEL2_MINICARD )
+		PHY_SetRFPathSwitch(Adapter, pAdapter->MgntInfo.bDefaultAntenna); //default use Main
+#endif
+
+#endif
+
+#endif
+
+	pMptCtx->backup0xc50 = (u1Byte)PHY_QueryBBReg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0);
+	pMptCtx->backup0xc58 = (u1Byte)PHY_QueryBBReg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0);
+	pMptCtx->backup0xc30 = (u1Byte)PHY_QueryBBReg(pAdapter, rOFDM0_RxDetector1, bMaskByte0);
+
+	return	rtStatus;
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:	MPT_DeInitAdapter()
+ *
+ * Overview:	Extra DeInitialization for Mass Production Test.
+ *
+ * Input:		PADAPTER	pAdapter
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	05/08/2007	MHC		Create Version 0.
+ *	05/18/2007	MHC		Add normal driver MPHalt code.
+ *
+ *---------------------------------------------------------------------------*/
+VOID
+MPT_DeInitAdapter(
+	IN	PADAPTER	pAdapter
+	)
+{
+	PMPT_CONTEXT		pMptCtx = &pAdapter->mppriv.MptCtx;
+
+	pMptCtx->bMptDrvUnload = _TRUE;
+#if 0 // for Windows
+	PlatformFreeWorkItem( &(pMptCtx->MptWorkItem) );
+
+	while(pMptCtx->bMptWorkItemInProgress)
+	{
+		if(NdisWaitEvent(&(pMptCtx->MptWorkItemEvent), 50))
+		{
+			break;
+		}
+	}
+	NdisFreeSpinLock( &(pMptCtx->MptWorkItemSpinLock) );
+#endif
+}
+
+static u8 mpt_ProStartTest(PADAPTER padapter)
+{
+	PMPT_CONTEXT pMptCtx = &padapter->mppriv.MptCtx;
+
+	pMptCtx->bMassProdTest = _TRUE;
+	pMptCtx->bStartContTx = _FALSE;
+	pMptCtx->bCckContTx = _FALSE;
+	pMptCtx->bOfdmContTx = _FALSE;
+	pMptCtx->bSingleCarrier = _FALSE;
+	pMptCtx->bCarrierSuppression = _FALSE;
+	pMptCtx->bSingleTone = _FALSE;
+
+	return _SUCCESS;
+}
+
+/*
+ * General use
+ */
+s32 SetPowerTracking(PADAPTER padapter, u8 enable)
+{
+
+	Hal_SetPowerTracking( padapter, enable );
+	return 0;
+}
+
+void GetPowerTracking(PADAPTER padapter, u8 *enable)
+{
+	Hal_GetPowerTracking( padapter, enable );
+}
+
+static void disable_dm(PADAPTER padapter)
+{
+	u8 v8;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+
+	//3 1. disable firmware dynamic mechanism
+	// disable Power Training, Rate Adaptive
+	v8 = rtw_read8(padapter, REG_BCN_CTRL);
+	v8 &= ~EN_BCN_FUNCTION;
+	rtw_write8(padapter, REG_BCN_CTRL, v8);
+
+	//3 2. disable driver dynamic mechanism
+	// disable Dynamic Initial Gain
+	// disable High Power
+	// disable Power Tracking
+	Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE);
+
+	// enable APK, LCK and IQK but disable power tracking
+	pdmpriv->TxPowerTrackControl = _FALSE;
+	Switch_DM_Func(padapter, DYNAMIC_FUNC_SS, _TRUE);
+}
+
+//This function initializes the DUT to the MP test mode
+s32 mp_start_test(PADAPTER padapter)
+{
+	WLAN_BSSID_EX bssid;
+	struct sta_info *psta;
+	u32 length;
+	u8 val8;
+
+	_irqL irqL;
+	s32 res = _SUCCESS;
+
+	struct mp_priv *pmppriv = &padapter->mppriv;
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+	struct wlan_network *tgt_network = &pmlmepriv->cur_network;
+
+
+	//3 disable dynamic mechanism
+	disable_dm(padapter);
+
+	//3 0. update mp_priv
+#if  defined (CONFIG_RTL8192C)  ||  defined (CONFIG_RTL8192D)
+	if (padapter->registrypriv.rf_config == RF_819X_MAX_TYPE) {
+//		HAL_DATA_TYPE *phal = GET_HAL_DATA(padapter);
+//		switch (phal->rf_type) {
+		switch (GET_RF_TYPE(padapter)) {
+			case RF_1T1R:
+				pmppriv->antenna_tx = ANTENNA_A;
+				pmppriv->antenna_rx = ANTENNA_A;
+				break;
+			case RF_1T2R:
+			default:
+				pmppriv->antenna_tx = ANTENNA_A;
+				pmppriv->antenna_rx = ANTENNA_AB;
+				break;
+			case RF_2T2R:
+			case RF_2T2R_GREEN:
+				pmppriv->antenna_tx = ANTENNA_AB;
+				pmppriv->antenna_rx = ANTENNA_AB;
+				break;
+			case RF_2T4R:
+				pmppriv->antenna_tx = ANTENNA_AB;
+				pmppriv->antenna_rx = ANTENNA_ABCD;
+				break;
+		}
+	}
+#endif
+	mpt_ProStartTest(padapter);
+
+	//3 1. initialize a new WLAN_BSSID_EX
+//	_rtw_memset(&bssid, 0, sizeof(WLAN_BSSID_EX));
+	_rtw_memcpy(bssid.MacAddress, pmppriv->network_macaddr, ETH_ALEN);
+	bssid.Ssid.SsidLength = strlen("mp_pseudo_adhoc");
+	_rtw_memcpy(bssid.Ssid.Ssid, (u8*)"mp_pseudo_adhoc", bssid.Ssid.SsidLength);
+	bssid.InfrastructureMode = Ndis802_11IBSS;
+	bssid.NetworkTypeInUse = Ndis802_11DS;
+	bssid.IELength = 0;
+
+	length = get_WLAN_BSSID_EX_sz(&bssid);
+	if (length % 4)
+		bssid.Length = ((length >> 2) + 1) << 2; //round up to multiple of 4 bytes.
+	else
+		bssid.Length = length;
+
+	_enter_critical_bh(&pmlmepriv->lock, &irqL);
+
+	if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE)
+		goto end_of_mp_start_test;
+
+	//init mp_start_test status
+	if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) {
+		rtw_disassoc_cmd(padapter);
+		rtw_indicate_disconnect(padapter);
+		rtw_free_assoc_resources(padapter, 1);
+	}
+	pmppriv->prev_fw_state = get_fwstate(pmlmepriv);
+	pmlmepriv->fw_state = WIFI_MP_STATE;
+#if 0
+	if (pmppriv->mode == _LOOPBOOK_MODE_) {
+		set_fwstate(pmlmepriv, WIFI_MP_LPBK_STATE); //append txdesc
+		RT_TRACE(_module_mp_, _drv_notice_, ("+start mp in Lookback mode\n"));
+	} else {
+		RT_TRACE(_module_mp_, _drv_notice_, ("+start mp in normal mode\n"));
+	}
+#endif
+	set_fwstate(pmlmepriv, _FW_UNDER_LINKING);
+
+	//3 2. create a new psta for mp driver
+	//clear psta in the cur_network, if any
+	psta = rtw_get_stainfo(&padapter->stapriv, tgt_network->network.MacAddress);
+	if (psta) rtw_free_stainfo(padapter, psta);
+
+	psta = rtw_alloc_stainfo(&padapter->stapriv, bssid.MacAddress);
+	if (psta == NULL) {
+		RT_TRACE(_module_mp_, _drv_err_, ("mp_start_test: Can't alloc sta_info!\n"));
+		pmlmepriv->fw_state = pmppriv->prev_fw_state;
+		res = _FAIL;
+		goto end_of_mp_start_test;
+	}
+
+	//3 3. join psudo AdHoc
+	tgt_network->join_res = 1;
+	tgt_network->aid = psta->aid = 1;
+	_rtw_memcpy(&tgt_network->network, &bssid, length);
+
+	rtw_indicate_connect(padapter);
+	_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
+
+end_of_mp_start_test:
+
+	_exit_critical_bh(&pmlmepriv->lock, &irqL);
+
+	if (res == _SUCCESS)
+	{
+		// set MSR to WIFI_FW_ADHOC_STATE
+#if  defined (CONFIG_RTL8192C)  ||  defined (CONFIG_RTL8192D)
+		val8 = rtw_read8(padapter, MSR) & 0xFC; // 0x0102
+		val8 |= WIFI_FW_ADHOC_STATE;
+		rtw_write8(padapter, MSR, val8); // Link in ad hoc network
+#endif
+
+#if  !defined (CONFIG_RTL8192C)  &&  !defined (CONFIG_RTL8192D)
+		rtw_write8(padapter, MSR, 1); // Link in ad hoc network
+		rtw_write8(padapter, RCR, 0); // RCR : disable all pkt, 0x10250048
+		rtw_write8(padapter, RCR+2, 0x57); // RCR disable Check BSSID, 0x1025004a
+
+		// disable RX filter map , mgt frames will put in RX FIFO 0
+		rtw_write16(padapter, RXFLTMAP0, 0x0); // 0x10250116
+
+		val8 = rtw_read8(padapter, EE_9346CR); // 0x1025000A
+		if (!(val8 & _9356SEL))//boot from EFUSE
+			efuse_change_max_size(padapter);
+#endif
+	}
+
+	return res;
+}
+//------------------------------------------------------------------------------
+//This function change the DUT from the MP test mode into normal mode
+void mp_stop_test(PADAPTER padapter)
+{
+	struct mp_priv *pmppriv = &padapter->mppriv;
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+	struct wlan_network *tgt_network = &pmlmepriv->cur_network;
+	struct sta_info *psta;
+
+	_irqL irqL;
+
+
+	_enter_critical_bh(&pmlmepriv->lock, &irqL);
+
+	if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _FALSE)
+		goto end_of_mp_stop_test;
+
+	//3 1. disconnect psudo AdHoc
+	rtw_indicate_disconnect(padapter);
+
+	//3 2. clear psta used in mp test mode.
+//	rtw_free_assoc_resources(padapter, 1);
+	psta = rtw_get_stainfo(&padapter->stapriv, tgt_network->network.MacAddress);
+	if (psta) rtw_free_stainfo(padapter, psta);
+
+	//3 3. return to normal state (default:station mode)
+	pmlmepriv->fw_state = pmppriv->prev_fw_state; // WIFI_STATION_STATE;
+
+	//flush the cur_network
+	_rtw_memset(tgt_network, 0, sizeof(struct wlan_network));
+
+	_clr_fwstate_(pmlmepriv, WIFI_MP_STATE);
+
+end_of_mp_stop_test:
+
+	_exit_critical_bh(&pmlmepriv->lock, &irqL);
+}
+/*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/
+#if 0
+//#ifdef CONFIG_USB_HCI
+static VOID mpt_AdjustRFRegByRateByChan92CU(PADAPTER pAdapter, u8 RateIdx, u8 Channel, u8 BandWidthID)
+{
+	u8		eRFPath;
+	u32		rfReg0x26;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+
+
+	if (RateIdx < MPT_RATE_6M) {	// CCK rate,for 88cu
+		rfReg0x26 = 0xf400;
+	}
+	else if ((RateIdx >= MPT_RATE_6M) && (RateIdx <= MPT_RATE_54M)) {// OFDM rate,for 88cu
+		if ((4 == Channel) || (8 == Channel) || (12 == Channel))
+			rfReg0x26 = 0xf000;
+		else if ((5 == Channel) || (7 == Channel) || (13 == Channel) || (14 == Channel))
+			rfReg0x26 = 0xf400;
+		else
+			rfReg0x26 = 0x4f200;
+	}
+	else if ((RateIdx >= MPT_RATE_MCS0) && (RateIdx <= MPT_RATE_MCS15)) {// MCS 20M ,for 88cu // MCS40M rate,for 88cu
+
+		if (HT_CHANNEL_WIDTH_20 == BandWidthID) {
+			if ((4 == Channel) || (8 == Channel))
+				rfReg0x26 = 0xf000;
+			else if ((5 == Channel) || (7 == Channel) || (13 == Channel) || (14 == Channel))
+				rfReg0x26 = 0xf400;
+			else
+				rfReg0x26 = 0x4f200;
+		}
+		else{
+			if ((4 == Channel) || (8 == Channel))
+				rfReg0x26 = 0xf000;
+			else if ((5 == Channel) || (7 == Channel))
+				rfReg0x26 = 0xf400;
+			else
+				rfReg0x26 = 0x4f200;
+		}
+	}
+
+//	RT_TRACE(COMP_CMD, DBG_LOUD, ("\n mpt_AdjustRFRegByRateByChan92CU():Chan:%d Rate=%d rfReg0x26:0x%08x\n",Channel, RateIdx,rfReg0x26));
+	for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) {
+		write_rfreg(pAdapter, eRFPath, RF_SYN_G2, rfReg0x26);
+	}
+}
+#endif
+/*-----------------------------------------------------------------------------
+ * Function:	mpt_SwitchRfSetting
+ *
+ * Overview:	Change RF Setting when we siwthc channel/rate/BW for MP.
+ *
+ * Input:       IN	PADAPTER				pAdapter
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 01/08/2009	MHC		Suggestion from SD3 Willis for 92S series.
+ * 01/09/2009	MHC		Add CCK modification for 40MHZ. Suggestion from SD3.
+ *
+ *---------------------------------------------------------------------------*/
+static void mpt_SwitchRfSetting(PADAPTER pAdapter)
+{
+	Hal_mpt_SwitchRfSetting(pAdapter);
+	 }
+
+/*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/
+/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/
+static void MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14)
+{
+	Hal_MPT_CCKTxPowerAdjust(Adapter,bInCH14);
+}
+
+static void MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven)
+{
+	Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter,beven);
+	}
+
+/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/
+
+/*
+ * SetChannel
+ * Description
+ *	Use H2C command to change channel,
+ *	not only modify rf register, but also other setting need to be done.
+ */
+void SetChannel(PADAPTER pAdapter)
+{
+	Hal_SetChannel(pAdapter);
+
+}
+
+/*
+ * Notice
+ *	Switch bandwitdth may change center frequency(channel)
+ */
+void SetBandwidth(PADAPTER pAdapter)
+{
+	Hal_SetBandwidth(pAdapter);
+
+}
+
+static void SetCCKTxPower(PADAPTER pAdapter, u8 *TxPower)
+{
+	Hal_SetCCKTxPower(pAdapter,TxPower);
+}
+
+static void SetOFDMTxPower(PADAPTER pAdapter, u8 *TxPower)
+{
+	Hal_SetOFDMTxPower(pAdapter,TxPower);
+	}
+
+
+void SetAntenna(PADAPTER pAdapter)
+	{
+	Hal_SetAntenna(pAdapter);
+}
+
+void	SetAntennaPathPower(PADAPTER pAdapter)
+{
+	Hal_SetAntennaPathPower(pAdapter);
+}
+	
+void SetTxPower(PADAPTER pAdapter)
+{
+	Hal_SetTxPower(pAdapter);
+}
+
+void SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset)
+{
+	u32 TxAGCOffset_B, TxAGCOffset_C, TxAGCOffset_D,tmpAGC;
+
+	TxAGCOffset_B = (ulTxAGCOffset&0x000000ff);
+	TxAGCOffset_C = ((ulTxAGCOffset&0x0000ff00)>>8);
+	TxAGCOffset_D = ((ulTxAGCOffset&0x00ff0000)>>16);
+
+	tmpAGC = (TxAGCOffset_D<<8 | TxAGCOffset_C<<4 | TxAGCOffset_B);
+	write_bbreg(pAdapter, rFPGA0_TxGainStage,
+			(bXBTxAGC|bXCTxAGC|bXDTxAGC), tmpAGC);
+}
+
+void SetDataRate(PADAPTER pAdapter)
+{
+	Hal_SetDataRate(pAdapter);
+}
+
+#if  !defined (CONFIG_RTL8192C)  &&  !defined (CONFIG_RTL8192D)
+/*------------------------------Define structure----------------------------*/
+typedef struct _R_ANTENNA_SELECT_OFDM {
+	u32	r_tx_antenna:4;
+	u32	r_ant_l:4;
+	u32	r_ant_non_ht:4;
+	u32	r_ant_ht1:4;
+	u32	r_ant_ht2:4;
+	u32	r_ant_ht_s1:4;
+	u32	r_ant_non_ht_s1:4;
+	u32	OFDM_TXSC:2;
+	u32	Reserved:2;
+}R_ANTENNA_SELECT_OFDM;
+
+typedef struct _R_ANTENNA_SELECT_CCK {
+	u8	r_cckrx_enable_2:2;
+	u8	r_cckrx_enable:2;
+	u8	r_ccktx_enable:4;
+}R_ANTENNA_SELECT_CCK;
+#endif
+
+s32 SetThermalMeter(PADAPTER pAdapter, u8 target_ther)
+{
+	return Hal_SetThermalMeter( pAdapter, target_ther);
+}
+
+static void TriggerRFThermalMeter(PADAPTER pAdapter)
+{
+	Hal_TriggerRFThermalMeter(pAdapter);
+}
+
+static u8 ReadRFThermalMeter(PADAPTER pAdapter)
+{
+	return Hal_ReadRFThermalMeter(pAdapter);
+}
+
+void GetThermalMeter(PADAPTER pAdapter, u8 *value)
+{
+	Hal_GetThermalMeter(pAdapter,value);
+}
+
+void SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart)
+{
+	Hal_SetSingleCarrierTx(pAdapter,bStart);
+}
+
+void SetSingleToneTx(PADAPTER pAdapter, u8 bStart)
+{
+	Hal_SetSingleToneTx(pAdapter,bStart);
+}
+
+void SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart)
+{
+	Hal_SetCarrierSuppressionTx(pAdapter, bStart);
+}
+
+void SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart)
+{
+	Hal_SetCCKContinuousTx(pAdapter,bStart);
+		}
+
+void SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart)
+{
+   Hal_SetOFDMContinuousTx( pAdapter, bStart);
+}/* mpt_StartOfdmContTx */
+
+void SetContinuousTx(PADAPTER pAdapter, u8 bStart)
+{
+	Hal_SetContinuousTx(pAdapter,bStart);
+}
+
+//------------------------------------------------------------------------------
+void dump_mpframe(_adapter *padapter, struct xmit_frame *pmpframe)
+{
+	padapter->HalFunc.mgnt_xmit(padapter, pmpframe);
+}
+
+struct xmit_frame *alloc_mp_xmitframe(struct xmit_priv *pxmitpriv)
+{
+	struct xmit_frame	*pmpframe;
+	struct xmit_buf	*pxmitbuf;
+
+	if ((pmpframe = rtw_alloc_xmitframe(pxmitpriv)) == NULL)
+	{
+		return NULL;
+	}
+
+	if ((pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv)) == NULL)
+	{
+		rtw_free_xmitframe_ex(pxmitpriv, pmpframe);
+		return NULL;
+	}
+
+	pmpframe->frame_tag = MP_FRAMETAG;
+
+	pmpframe->pxmitbuf = pxmitbuf;
+
+	pmpframe->buf_addr = pxmitbuf->pbuf;
+
+	pxmitbuf->priv_data = pmpframe;
+
+	return pmpframe;
+
+}
+
+thread_return mp_xmit_packet_thread(thread_context context)
+{
+	struct xmit_frame	*pxmitframe;
+	struct mp_tx		*pmptx;
+	struct mp_priv	*pmp_priv;
+	struct xmit_priv	*pxmitpriv;
+	PADAPTER padapter;
+
+	pmp_priv = (struct mp_priv *)context;
+	pmptx = &pmp_priv->tx;
+	padapter = pmp_priv->papdater;
+	pxmitpriv = &(padapter->xmitpriv);
+
+	thread_enter(padapter);
+
+	//DBG_8192C("%s:pkTx Start\n", __func__);
+	while (1) {
+		pxmitframe = alloc_mp_xmitframe(pxmitpriv);
+		if (pxmitframe == NULL) {
+			if (pmptx->stop ||
+			    padapter->bSurpriseRemoved ||
+			    padapter->bDriverStopped) {
+				goto exit;
+			}
+			else {
+				rtw_msleep_os(1);
+				continue;
+			}
+		}
+
+		_rtw_memcpy((u8 *)(pxmitframe->buf_addr+TXDESC_OFFSET), pmptx->buf, pmptx->write_size);
+		_rtw_memcpy(&(pxmitframe->attrib), &(pmptx->attrib), sizeof(struct pkt_attrib));
+
+		dump_mpframe(padapter, pxmitframe);
+
+		pmptx->sended++;
+		pmp_priv->tx_pktcount++;
+
+		if (pmptx->stop ||
+		    padapter->bSurpriseRemoved ||
+		    padapter->bDriverStopped)
+			goto exit;
+		if ((pmptx->count != 0) &&
+		    (pmptx->count == pmptx->sended))
+			goto exit;
+
+		flush_signals_thread();
+	}
+
+exit:
+	//DBG_8192C("%s:pkTx Exit\n", __func__);
+	rtw_mfree(pmptx->pallocated_buf, pmptx->buf_size);
+	pmptx->pallocated_buf = NULL;
+	pmptx->stop = 1;
+
+	thread_exit();
+}
+
+void fill_txdesc_for_mp(PADAPTER padapter, struct tx_desc *ptxdesc)
+{		
+	struct mp_priv *pmp_priv = &padapter->mppriv;
+	_rtw_memcpy(ptxdesc, &(pmp_priv->tx.desc), TXDESC_SIZE);
+}
+
+void SetPacketTx(PADAPTER padapter)
+{
+	u8 *ptr, *pkt_start, *pkt_end;
+	u32 pkt_size;
+	struct tx_desc *desc;
+	struct ieee80211_hdr *hdr;
+	u8 payload;
+	s32 bmcast;
+	struct pkt_attrib *pattrib;
+	struct mp_priv *pmp_priv;
+
+
+	pmp_priv = &padapter->mppriv;
+	if (pmp_priv->tx.stop) return;
+	pmp_priv->tx.sended = 0;
+	pmp_priv->tx.stop = 0;
+	pmp_priv->tx_pktcount = 0;
+
+	//3 1. update_attrib()
+	pattrib = &pmp_priv->tx.attrib;
+	_rtw_memcpy(pattrib->src, padapter->eeprompriv.mac_addr, ETH_ALEN);
+	_rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
+	_rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN);
+	bmcast = IS_MCAST(pattrib->ra);
+	if (bmcast) {
+		pattrib->mac_id = 1;
+		pattrib->psta = rtw_get_bcmc_stainfo(padapter);
+	} else {
+		pattrib->mac_id = 0;
+		pattrib->psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv));
+	}
+
+	pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->pktlen;
+
+	//3 2. allocate xmit buffer
+	pkt_size = pattrib->last_txcmdsz;
+
+	if (pmp_priv->tx.pallocated_buf)
+		rtw_mfree(pmp_priv->tx.pallocated_buf, pmp_priv->tx.buf_size);
+	pmp_priv->tx.write_size = pkt_size;
+	pmp_priv->tx.buf_size = pkt_size + XMITBUF_ALIGN_SZ;
+	pmp_priv->tx.pallocated_buf = rtw_zmalloc(pmp_priv->tx.buf_size);
+	if (pmp_priv->tx.pallocated_buf == NULL) {
+		DBG_8192C("%s: malloc(%d) fail!!\n", __func__, pmp_priv->tx.buf_size);
+		return;
+	}
+	pmp_priv->tx.buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pmp_priv->tx.pallocated_buf), XMITBUF_ALIGN_SZ);
+	ptr = pmp_priv->tx.buf;
+
+	desc = &(pmp_priv->tx.desc);
+	_rtw_memset(desc, 0, TXDESC_SIZE);
+	pkt_start = ptr;
+	pkt_end = pkt_start + pkt_size;
+
+	//3 3. init TX descriptor
+	// offset 0
+	//desc->txdw0 |= cpu_to_le32(pkt_size & 0x0000FFFF); // packet size
+	//desc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
+	//desc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00FF0000); //32 bytes for TX Desc
+	//if (bmcast) desc->txdw0 |= cpu_to_le32(BMC); // broadcast packet
+
+	// offset 4
+	desc->txdw1 |= cpu_to_le32(BK); // don't aggregate(AMPDU)
+	desc->txdw1 |= cpu_to_le32((pattrib->mac_id) & 0x1F); //CAM_ID(MAC_ID)
+	desc->txdw1 |= cpu_to_le32((pattrib->qsel << QSEL_SHT) & 0x00001F00); // Queue Select, TID
+	desc->txdw1 |= cpu_to_le32((pattrib->raid << Rate_ID_SHT) & 0x000F0000); // Rate Adaptive ID
+
+	// offset 8
+	// offset 12
+	//desc->txdw3 |= cpu_to_le32((pattrib->seqnum << SEQ_SHT) & 0xffff0000);
+
+	// offset 16
+	//desc->txdw4 |= cpu_to_le32(QoS);
+	desc->txdw4 |= cpu_to_le32(HW_SEQ_EN);
+	desc->txdw4 |= cpu_to_le32(USERATE);
+	desc->txdw4 |= cpu_to_le32(DISDATAFB);
+
+	if( pmp_priv->preamble ){
+		if (pmp_priv->rateidx <=  MPT_RATE_54M)
+			desc->txdw4 |= cpu_to_le32(DATA_SHORT); // CCK Short Preamble
+	}
+	if (pmp_priv->bandwidth == HT_CHANNEL_WIDTH_40)
+		desc->txdw4 |= cpu_to_le32(DATA_BW);
+
+	// offset 20
+	desc->txdw5 |= cpu_to_le32(pmp_priv->rateidx & 0x0000001F);
+
+	if( pmp_priv->preamble ){
+		if (pmp_priv->rateidx > MPT_RATE_54M)
+			desc->txdw5 |= cpu_to_le32(SGI); // MCS Short Guard Interval
+	}
+	desc->txdw5 |= cpu_to_le32(0x0001FF00); // DATA/RTS Rate Fallback Limit
+
+	//3 4. make wlan header, make_wlanhdr()
+	hdr = (struct ieee80211_hdr *)pkt_start;
+	SetFrameSubType(&hdr->frame_ctl, pattrib->subtype);
+	_rtw_memcpy(hdr->addr1, pattrib->dst, ETH_ALEN); // DA
+	_rtw_memcpy(hdr->addr2, pattrib->src, ETH_ALEN); // SA
+	_rtw_memcpy(hdr->addr3, get_bssid(&padapter->mlmepriv), ETH_ALEN); // RA, BSSID
+
+	//3 5. make payload
+	ptr = pkt_start + pattrib->hdrlen;
+
+	switch (pmp_priv->tx.payload) {
+		case 0:
+			payload = 0x00;
+			break;
+		case 1:
+			payload = 0x5a;
+			break;
+		case 2:
+			payload = 0xa5;
+			break;
+		case 3:
+			payload = 0xff;
+			break;
+		default:
+			payload = 0x00;
+			break;
+	}
+
+	_rtw_memset(ptr, payload, pkt_end - ptr);
+
+	//3 6. start thread
+	pmp_priv->tx.PktTxThread = kernel_thread(mp_xmit_packet_thread, pmp_priv, CLONE_FS|CLONE_FILES);
+	if(pmp_priv->tx.PktTxThread < 0)
+		DBG_871X("Create PktTx Thread Fail !!!!!\n");
+
+}
+
+void SetPacketRx(PADAPTER pAdapter, u8 bStartRx)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+
+	if(bStartRx)
+	{
+		// Accept CRC error and destination address
+		pHalData->ReceiveConfig |= (RCR_ACRC32|RCR_AAP);
+		rtw_write32(pAdapter, REG_RCR, pHalData->ReceiveConfig);
+	}
+	else
+	{
+		rtw_write32(pAdapter, REG_RCR, 0);
+	}
+}
+
+void ResetPhyRxPktCount(PADAPTER pAdapter)
+{
+	u32 i, phyrx_set = 0;
+
+	for (i = 0; i <= 0xF; i++) {
+		phyrx_set = 0;
+		phyrx_set |= _RXERR_RPT_SEL(i);	//select
+		phyrx_set |= RXERR_RPT_RST;	// set counter to zero
+		rtw_write32(pAdapter, REG_RXERR_RPT, phyrx_set);
+	}
+}
+
+static u32 GetPhyRxPktCounts(PADAPTER pAdapter, u32 selbit)
+{
+	//selection
+	u32 phyrx_set = 0, count = 0;
+
+	phyrx_set = _RXERR_RPT_SEL(selbit & 0xF);
+	rtw_write32(pAdapter, REG_RXERR_RPT, phyrx_set);
+
+	//Read packet count
+	count = rtw_read32(pAdapter, REG_RXERR_RPT) & RXERR_COUNTER_MASK;
+
+	return count;
+}
+
+u32 GetPhyRxPktReceived(PADAPTER pAdapter)
+{
+	u32 OFDM_cnt = 0, CCK_cnt = 0, HT_cnt = 0;
+
+	OFDM_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_OFDM_MPDU_OK);
+	CCK_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_CCK_MPDU_OK);
+	HT_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_HT_MPDU_OK);
+
+	return OFDM_cnt + CCK_cnt + HT_cnt;
+}
+
+u32 GetPhyRxPktCRC32Error(PADAPTER pAdapter)
+{
+	u32 OFDM_cnt = 0, CCK_cnt = 0, HT_cnt = 0;
+
+	OFDM_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_OFDM_MPDU_FAIL);
+	CCK_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_CCK_MPDU_FAIL);
+	HT_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_HT_MPDU_FAIL);
+
+	return OFDM_cnt + CCK_cnt + HT_cnt;
+}
+
+//reg 0x808[9:0]: FFT data x
+//reg 0x808[22]:  0  -->  1  to get 1 FFT data y
+//reg 0x8B4[15:0]: FFT data y report
+static u32 GetPSDData(PADAPTER pAdapter, u32 point)
+{
+	int psd_val;
+
+
+	psd_val = rtw_read32(pAdapter, 0x808);
+	psd_val &= 0xFFBFFC00;
+	psd_val |= point;
+
+	rtw_write32(pAdapter, 0x808, psd_val);
+	rtw_mdelay_os(1);
+	psd_val |= 0x00400000;
+
+	rtw_write32(pAdapter, 0x808, psd_val);
+	rtw_mdelay_os(1);
+	psd_val = rtw_read32(pAdapter, 0x8B4);
+
+	psd_val &= 0x0000FFFF;
+
+	return psd_val;
+}
+
+/*
+ * pts	start_point_min		stop_point_max
+ * 128	64			64 + 128 = 192
+ * 256	128			128 + 256 = 384
+ * 512	256			256 + 512 = 768
+ * 1024	512			512 + 1024 = 1536
+ *
+ */
+u32 mp_query_psd(PADAPTER pAdapter, u8 *data)
+{
+	u8 *val;
+	u32 i, psd_pts=0, psd_start=0, psd_stop=0;
+	u32 psd_data=0;
+
+
+	if (!netif_running(pAdapter->pnetdev)) {
+		RT_TRACE(_module_mp_, _drv_warning_, ("mp_query_psd: Fail! interface not opened!\n"));
+		return 0;
+	}
+
+	if (check_fwstate(&pAdapter->mlmepriv, WIFI_MP_STATE) == _FALSE) {
+		RT_TRACE(_module_mp_, _drv_warning_, ("mp_query_psd: Fail! not in MP mode!\n"));
+		return 0;
+	}
+
+	if (strlen(data) == 0) { //default value
+		psd_pts = 128;
+		psd_start = 64;
+		psd_stop = 128;   
+	} else {
+		sscanf(data, "pts=%d,start=%d,stop=%d", &psd_pts, &psd_start, &psd_stop);
+	}
+
+	_rtw_memset(data, '\0', sizeof(data));
+
+	i = psd_start;
+	while (i < psd_stop)
+	{
+		if (i >= psd_pts) {
+			psd_data = GetPSDData(pAdapter, i-psd_pts);
+		} else {
+			psd_data = GetPSDData(pAdapter, i);
+		}
+		sprintf(data, "%s%x ", data, psd_data);
+		i++;
+	}
+
+	#ifdef CONFIG_LONG_DELAY_ISSUE
+	rtw_msleep_os(100);
+	#else
+	rtw_mdelay_os(100);
+	#endif
+
+	return strlen(data)+1;
+}
+
+
+u32 rtw_atoi(u8* s)
+{
+
+	int num=0,flag=0;
+	int i;
+	for(i=0;i<=strlen(s);i++)
+	{
+	  if(s[i] >= '0' && s[i] <= '9')
+		 num = num * 10 + s[i] -'0';
+	  else if(s[0] == '-' && i==0) 
+		 flag =1;
+	  else 
+		  break;
+	 }
+
+	if(flag == 1)
+	   num = num * -1;
+
+	 return(num); 
+
+}
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_mp_ioctl.c linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_mp_ioctl.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_mp_ioctl.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_mp_ioctl.c	2017-09-23 03:42:49.894675443 +0800
@@ -0,0 +1,2841 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _RTW_MP_IOCTL_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <mlme_osdep.h>
+
+//#include <rtw_mp.h>
+#include <rtw_mp_ioctl.h>
+
+
+//****************  oid_rtl_seg_81_85   section start ****************
+NDIS_STATUS oid_rt_wireless_mode_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS status = NDIS_STATUS_SUCCESS;
+	PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	if (poid_par_priv->information_buf_len < sizeof(u8))
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	if (poid_par_priv->type_of_oid == SET_OID) {
+		Adapter->registrypriv.wireless_mode = *(u8*)poid_par_priv->information_buf;
+	} else if (poid_par_priv->type_of_oid == QUERY_OID) {
+		*(u8*)poid_par_priv->information_buf = Adapter->registrypriv.wireless_mode;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+		 RT_TRACE(_module_mp_, _drv_info_, ("-query Wireless Mode=%d\n", Adapter->registrypriv.wireless_mode));
+	} else {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+	}
+
+_func_exit_;
+
+	return status;
+}
+//****************  oid_rtl_seg_81_87_80   section start ****************
+NDIS_STATUS oid_rt_pro_write_bb_reg_hdl(struct oid_par_priv *poid_par_priv)
+{
+	_irqL oldirql;
+	struct bb_reg_param *pbbreg;
+	u16 offset;
+	u32 value;
+	NDIS_STATUS status = NDIS_STATUS_SUCCESS;
+	PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_write_bb_reg_hdl\n"));
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	if (poid_par_priv->information_buf_len < sizeof(struct bb_reg_param))
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	pbbreg = (struct bb_reg_param *)(poid_par_priv->information_buf);
+
+	offset = (u16)(pbbreg->offset) & 0xFFF; //0ffset :0x800~0xfff
+	if (offset < BB_REG_BASE_ADDR) offset |= BB_REG_BASE_ADDR;
+
+	value = pbbreg->value;
+
+	RT_TRACE(_module_mp_, _drv_notice_,
+		 ("oid_rt_pro_write_bb_reg_hdl: offset=0x%03X value=0x%08X\n",
+		  offset, value));
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	write_bbreg(Adapter, offset, 0xFFFFFFFF, value);
+	_irqlevel_changed_(&oldirql, RAISE);
+
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_read_bb_reg_hdl(struct oid_par_priv *poid_par_priv)
+{
+	_irqL oldirql;
+	struct bb_reg_param *pbbreg;
+	u16 offset;
+	u32 value;
+	NDIS_STATUS status = NDIS_STATUS_SUCCESS;
+	PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_read_bb_reg_hdl\n"));
+
+	if (poid_par_priv->type_of_oid != QUERY_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	if (poid_par_priv->information_buf_len < sizeof(struct bb_reg_param))
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	pbbreg = (struct bb_reg_param *)(poid_par_priv->information_buf);
+
+	offset = (u16)(pbbreg->offset) & 0xFFF; //0ffset :0x800~0xfff
+	if (offset < BB_REG_BASE_ADDR) offset |= BB_REG_BASE_ADDR;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	value = read_bbreg(Adapter, offset, 0xFFFFFFFF);
+	_irqlevel_changed_(&oldirql, RAISE);
+
+	pbbreg->value = value;
+	*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+
+	RT_TRACE(_module_mp_, _drv_notice_,
+		 ("-oid_rt_pro_read_bb_reg_hdl: offset=0x%03X value:0x%08X\n",
+		  offset, value));
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_write_rf_reg_hdl(struct oid_par_priv *poid_par_priv)
+{
+	_irqL oldirql;
+	struct rf_reg_param *pbbreg;
+	u8 path;
+	u8 offset;
+	u32 value;
+	NDIS_STATUS status = NDIS_STATUS_SUCCESS;
+	PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_write_rf_reg_hdl\n"));
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	if (poid_par_priv->information_buf_len < sizeof(struct rf_reg_param))
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	pbbreg = (struct rf_reg_param *)(poid_par_priv->information_buf);
+
+	if (pbbreg->path >= MAX_RF_PATH_NUMS)
+		return NDIS_STATUS_NOT_ACCEPTED;
+	if (pbbreg->offset > 0xFF)
+		return NDIS_STATUS_NOT_ACCEPTED;
+	if (pbbreg->value > 0xFFFFF)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	path = (u8)pbbreg->path;
+	offset = (u8)pbbreg->offset;
+	value = pbbreg->value;
+
+	RT_TRACE(_module_mp_, _drv_notice_,
+		 ("oid_rt_pro_write_rf_reg_hdl: path=%d offset=0x%02X value=0x%05X\n",
+		  path, offset, value));
+
+	_irqlevel_changed_(&oldirql, LOWER);
+ 	write_rfreg(Adapter, path, offset, value);
+	_irqlevel_changed_(&oldirql, RAISE);
+
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_read_rf_reg_hdl(struct oid_par_priv *poid_par_priv)
+{
+	_irqL oldirql;
+	struct rf_reg_param *pbbreg;
+	u8 path;
+	u8 offset;
+	u32 value;
+	PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+	NDIS_STATUS status = NDIS_STATUS_SUCCESS;
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_read_rf_reg_hdl\n"));
+
+	if (poid_par_priv->type_of_oid != QUERY_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	if (poid_par_priv->information_buf_len < sizeof(struct rf_reg_param))
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	pbbreg = (struct rf_reg_param *)(poid_par_priv->information_buf);
+
+	if (pbbreg->path >= MAX_RF_PATH_NUMS)
+		return NDIS_STATUS_NOT_ACCEPTED;
+	if (pbbreg->offset > 0xFF)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	path = (u8)pbbreg->path;
+	offset = (u8)pbbreg->offset;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	value = read_rfreg(Adapter, path, offset);
+	_irqlevel_changed_(&oldirql, RAISE);
+
+	pbbreg->value = value;
+
+	*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+
+	RT_TRACE(_module_mp_, _drv_notice_,
+		 ("-oid_rt_pro_read_rf_reg_hdl: path=%d offset=0x%02X value=0x%05X\n",
+		  path, offset, value));
+
+_func_exit_;
+
+	return status;
+}
+//****************  oid_rtl_seg_81_87_00   section end****************
+//------------------------------------------------------------------------------
+
+//****************  oid_rtl_seg_81_80_00   section start ****************
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_set_data_rate_hdl(struct oid_par_priv *poid_par_priv)
+{
+	_irqL		oldirql;
+	u32		ratevalue;//4
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_notice_,
+		 ("+oid_rt_pro_set_data_rate_hdl\n"));
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	if (poid_par_priv->information_buf_len != sizeof(u32))
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	ratevalue = *((u32*)poid_par_priv->information_buf);//4
+	RT_TRACE(_module_mp_, _drv_notice_,
+		 ("oid_rt_pro_set_data_rate_hdl: data rate idx=%d\n", ratevalue));
+	if (ratevalue >= MPT_RATE_LAST)
+		return NDIS_STATUS_INVALID_DATA;
+
+	Adapter->mppriv.rateidx = ratevalue;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	SetDataRate(Adapter);
+	_irqlevel_changed_(&oldirql, RAISE);
+
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_start_test_hdl(struct oid_par_priv *poid_par_priv)
+{
+	_irqL		oldirql;
+	u32		mode;
+	u8		val8;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_start_test_hdl\n"));
+
+	if (Adapter->registrypriv.mp_mode == 0)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+
+	//IQCalibrateBcut(Adapter);
+
+	mode = *((u32*)poid_par_priv->information_buf);
+	Adapter->mppriv.mode = mode;// 1 for loopback
+
+	if (mp_start_test(Adapter) == _FAIL) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		goto exit;
+	}
+
+exit:
+	_irqlevel_changed_(&oldirql, RAISE);
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("-oid_rt_pro_start_test_hdl: mp_mode=%d\n", Adapter->mppriv.mode));
+
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_stop_test_hdl(struct oid_par_priv *poid_par_priv)
+{
+	_irqL		oldirql;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("+Set OID_RT_PRO_STOP_TEST\n"));
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	mp_stop_test(Adapter);
+	_irqlevel_changed_(&oldirql, RAISE);
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("-Set OID_RT_PRO_STOP_TEST\n"));
+
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_set_channel_direct_call_hdl(struct oid_par_priv *poid_par_priv)
+{
+	_irqL		oldirql;
+	u32		Channel;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_set_channel_direct_call_hdl\n"));
+
+	if (poid_par_priv->information_buf_len != sizeof(u32))
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	if (poid_par_priv->type_of_oid == QUERY_OID) {
+		*((u32*)poid_par_priv->information_buf) = Adapter->mppriv.channel;
+		return NDIS_STATUS_SUCCESS;
+	}
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	Channel = *((u32*)poid_par_priv->information_buf);
+	RT_TRACE(_module_mp_, _drv_notice_, ("oid_rt_pro_set_channel_direct_call_hdl: Channel=%d\n", Channel));
+	if (Channel > 14)
+		return NDIS_STATUS_NOT_ACCEPTED;
+	Adapter->mppriv.channel = Channel;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	SetChannel(Adapter);
+	_irqlevel_changed_(&oldirql, RAISE);
+
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_set_bandwidth_hdl(struct oid_par_priv *poid_par_priv)
+{
+	_irqL		oldirql;
+	u16		bandwidth, channel_offset;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_info_,
+		 ("+oid_rt_set_bandwidth_hdl\n"));
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	if (poid_par_priv->information_buf_len < sizeof(u32))
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	bandwidth = *((u32*)poid_par_priv->information_buf);//4
+	if (bandwidth != HT_CHANNEL_WIDTH_40)
+		bandwidth = HT_CHANNEL_WIDTH_20;
+	Adapter->mppriv.bandwidth = (u8)bandwidth;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	SetBandwidth(Adapter);
+	_irqlevel_changed_(&oldirql, RAISE);
+
+	RT_TRACE(_module_mp_, _drv_notice_,
+		 ("-oid_rt_set_bandwidth_hdl: bandwidth=%d channel_offset=%d\n",
+		  bandwidth, channel_offset));
+
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_set_antenna_bb_hdl(struct oid_par_priv *poid_par_priv)
+{
+	_irqL		oldirql;
+	u32		antenna;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_set_antenna_bb_hdl\n"));
+
+	if (poid_par_priv->information_buf_len != sizeof(u32))
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	if (poid_par_priv->type_of_oid == SET_OID)
+	{
+		antenna = *(u32*)poid_par_priv->information_buf;
+
+		Adapter->mppriv.antenna_tx = (u16)((antenna & 0xFFFF0000) >> 16);
+		Adapter->mppriv.antenna_rx = (u16)(antenna & 0x0000FFFF);
+		RT_TRACE(_module_mp_, _drv_notice_,
+			 ("oid_rt_pro_set_antenna_bb_hdl: tx_ant=0x%04x rx_ant=0x%04x\n",
+			  Adapter->mppriv.antenna_tx, Adapter->mppriv.antenna_rx));
+
+		_irqlevel_changed_(&oldirql, LOWER);
+		SetAntenna(Adapter);
+		_irqlevel_changed_(&oldirql, RAISE);
+	} else {
+		antenna = (Adapter->mppriv.antenna_tx << 16)|Adapter->mppriv.antenna_rx;
+		*(u32*)poid_par_priv->information_buf = antenna;
+	}
+
+_func_exit_;
+
+	return status;
+}
+
+NDIS_STATUS oid_rt_pro_set_tx_power_control_hdl(struct oid_par_priv *poid_par_priv)
+{
+	_irqL		oldirql;
+	u32		tx_pwr_idx;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_info_, ("+oid_rt_pro_set_tx_power_control_hdl\n"));
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	if (poid_par_priv->information_buf_len != sizeof(u32))
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	tx_pwr_idx = *((u32*)poid_par_priv->information_buf);
+	if (tx_pwr_idx > MAX_TX_PWR_INDEX_N_MODE)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	Adapter->mppriv.txpoweridx = (u8)tx_pwr_idx;
+
+	RT_TRACE(_module_mp_, _drv_notice_,
+		 ("oid_rt_pro_set_tx_power_control_hdl: idx=0x%2x\n",
+		  Adapter->mppriv.txpoweridx));
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	SetTxPower(Adapter);
+	_irqlevel_changed_(&oldirql, RAISE);
+
+_func_exit_;
+
+	return status;
+}
+
+//------------------------------------------------------------------------------
+//****************  oid_rtl_seg_81_80_20   section start ****************
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_query_tx_packet_sent_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	if (poid_par_priv->type_of_oid !=QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	if (poid_par_priv->information_buf_len == sizeof(ULONG)) {
+		*(ULONG*)poid_par_priv->information_buf =  Adapter->mppriv.tx_pktcount;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+	} else {
+		status = NDIS_STATUS_INVALID_LENGTH;
+	}
+
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_query_rx_packet_received_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+	RT_TRACE(_module_mp_, _drv_alert_, ("===> oid_rt_pro_query_rx_packet_received_hdl.\n"));
+	if (poid_par_priv->information_buf_len == sizeof(ULONG)) {
+		*(ULONG*)poid_par_priv->information_buf =  Adapter->mppriv.rx_pktcount;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+		RT_TRACE(_module_mp_, _drv_alert_, ("recv_ok:%d \n",Adapter->mppriv.rx_pktcount));
+	} else {
+		status = NDIS_STATUS_INVALID_LENGTH;
+	}
+
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_query_rx_packet_crc32_error_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+	RT_TRACE(_module_mp_, _drv_alert_, ("===> oid_rt_pro_query_rx_packet_crc32_error_hdl.\n"));
+	if (poid_par_priv->information_buf_len == sizeof(ULONG)) {
+		*(ULONG*)poid_par_priv->information_buf =  Adapter->mppriv.rx_crcerrpktcount;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+		RT_TRACE(_module_mp_, _drv_alert_, ("recv_err:%d \n",Adapter->mppriv.rx_crcerrpktcount));
+	} else {
+		status = NDIS_STATUS_INVALID_LENGTH;
+	}
+
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+
+NDIS_STATUS oid_rt_pro_reset_tx_packet_sent_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	if (poid_par_priv->type_of_oid != SET_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	RT_TRACE(_module_mp_, _drv_alert_, ("===> oid_rt_pro_reset_tx_packet_sent_hdl.\n"));
+	Adapter->mppriv.tx_pktcount = 0;
+
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_reset_rx_packet_received_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+	{
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	if (poid_par_priv->information_buf_len == sizeof(ULONG)) {
+		Adapter->mppriv.rx_pktcount = 0;
+		Adapter->mppriv.rx_crcerrpktcount = 0;
+	} else {
+		status = NDIS_STATUS_INVALID_LENGTH;
+	}
+
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_reset_phy_rx_packet_count_hdl(struct oid_par_priv *poid_par_priv)
+{
+	_irqL		oldirql;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	if (poid_par_priv->type_of_oid != SET_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	ResetPhyRxPktCount(Adapter);
+	_irqlevel_changed_(&oldirql, RAISE);
+
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_get_phy_rx_packet_received_hdl(struct oid_par_priv *poid_par_priv)
+{
+	_irqL		oldirql;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_info_, ("+oid_rt_get_phy_rx_packet_received_hdl\n"));
+
+	if (poid_par_priv->type_of_oid != QUERY_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	if (poid_par_priv->information_buf_len != sizeof(ULONG))
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	*(ULONG*)poid_par_priv->information_buf = GetPhyRxPktReceived(Adapter);
+	_irqlevel_changed_(&oldirql, RAISE);
+
+	*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("-oid_rt_get_phy_rx_packet_received_hdl: recv_ok=%d\n", *(ULONG*)poid_par_priv->information_buf));
+
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_get_phy_rx_packet_crc32_error_hdl(struct oid_par_priv *poid_par_priv)
+{
+	_irqL		oldirql;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_info_, ("+oid_rt_get_phy_rx_packet_crc32_error_hdl\n"));
+
+	if (poid_par_priv->type_of_oid != QUERY_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+
+	if (poid_par_priv->information_buf_len != sizeof(ULONG))
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	*(ULONG*)poid_par_priv->information_buf = GetPhyRxPktCRC32Error(Adapter);
+	_irqlevel_changed_(&oldirql, RAISE);
+
+	*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+
+	RT_TRACE(_module_mp_, _drv_info_, ("-oid_rt_get_phy_rx_packet_crc32_error_hdl: recv_err=%d\n", *(ULONG*)poid_par_priv->information_buf));
+
+_func_exit_;
+
+	return status;
+}
+//****************  oid_rtl_seg_81_80_20   section end ****************
+NDIS_STATUS oid_rt_pro_set_continuous_tx_hdl(struct oid_par_priv *poid_par_priv)
+{
+	_irqL		oldirql;
+	u32		bStartTest;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_set_continuous_tx_hdl\n"));
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	bStartTest = *((u32*)poid_par_priv->information_buf);
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	SetContinuousTx(Adapter,(u8)bStartTest);
+	if (bStartTest) {
+		struct mp_priv *pmp_priv = &Adapter->mppriv;
+		if (pmp_priv->tx.stop == 0) {
+			pmp_priv->tx.stop = 1;
+			DBG_8192C("%s: pkt tx is running...\n", __func__);
+			rtw_msleep_os(5);
+		}
+		pmp_priv->tx.stop = 0;
+		pmp_priv->tx.count = 1;
+		SetPacketTx(Adapter);
+	}
+	_irqlevel_changed_(&oldirql, RAISE);
+
+_func_exit_;
+
+	return status;
+}
+
+NDIS_STATUS oid_rt_pro_set_single_carrier_tx_hdl(struct oid_par_priv *poid_par_priv)
+{
+	_irqL		oldirql;
+	u32		bStartTest;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_alert_, ("+oid_rt_pro_set_single_carrier_tx_hdl\n"));
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	bStartTest = *((u32*)poid_par_priv->information_buf);
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	SetSingleCarrierTx(Adapter, (u8)bStartTest);
+	if (bStartTest) {
+		struct mp_priv *pmp_priv = &Adapter->mppriv;
+		if (pmp_priv->tx.stop == 0) {
+			pmp_priv->tx.stop = 1;
+			DBG_8192C("%s: pkt tx is running...\n", __func__);
+			rtw_msleep_os(5);
+		}
+		pmp_priv->tx.stop = 0;
+		pmp_priv->tx.count = 1;
+		SetPacketTx(Adapter);
+	}
+	_irqlevel_changed_(&oldirql, RAISE);
+
+_func_exit_;
+
+	return status;
+}
+
+NDIS_STATUS oid_rt_pro_set_carrier_suppression_tx_hdl(struct oid_par_priv *poid_par_priv)
+{
+	_irqL		oldirql;
+	u32		bStartTest;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_set_carrier_suppression_tx_hdl\n"));
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	bStartTest = *((u32*)poid_par_priv->information_buf);
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	SetCarrierSuppressionTx(Adapter, (u8)bStartTest);
+	if (bStartTest) {
+		struct mp_priv *pmp_priv = &Adapter->mppriv;
+		if (pmp_priv->tx.stop == 0) {
+			pmp_priv->tx.stop = 1;
+			DBG_8192C("%s: pkt tx is running...\n", __func__);
+			rtw_msleep_os(5);
+		}
+		pmp_priv->tx.stop = 0;
+		pmp_priv->tx.count = 1;
+		SetPacketTx(Adapter);
+	}
+	_irqlevel_changed_(&oldirql, RAISE);
+
+_func_exit_;
+
+	return status;
+}
+
+NDIS_STATUS oid_rt_pro_set_single_tone_tx_hdl(struct oid_par_priv *poid_par_priv)
+{
+	_irqL		oldirql;
+	u32 		bStartTest;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_alert_, ("+oid_rt_pro_set_single_tone_tx_hdl\n"));
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	bStartTest = *((u32*)poid_par_priv->information_buf);
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	SetSingleToneTx(Adapter,(u8)bStartTest);
+	_irqlevel_changed_(&oldirql, RAISE);
+
+_func_exit_;
+
+	return status;
+}
+
+NDIS_STATUS oid_rt_pro_set_modulation_hdl(struct oid_par_priv* poid_par_priv)
+{
+	return 0;
+}
+
+NDIS_STATUS oid_rt_pro_trigger_gpio_hdl(struct oid_par_priv *poid_par_priv)
+{
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	_irqL		oldirql;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+_func_enter_;
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_TRIGGER_GPIO_0, 0);
+	_irqlevel_changed_(&oldirql, RAISE);
+
+_func_exit_;
+
+	return status;
+}
+//****************  oid_rtl_seg_81_80_00   section end ****************
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro8711_join_bss_hdl(struct oid_par_priv *poid_par_priv)
+{
+#if 0
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	_irqL		oldirql;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+
+	PNDIS_802_11_SSID pssid;
+
+_func_enter_;
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	*poid_par_priv->bytes_needed = (u32)sizeof(NDIS_802_11_SSID);
+	*poid_par_priv->bytes_rw = 0;
+	if (poid_par_priv->information_buf_len < *poid_par_priv->bytes_needed)
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	pssid = (PNDIS_802_11_SSID)poid_par_priv->information_buf;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+
+	if (mp_start_joinbss(Adapter, pssid) == _FAIL)
+		status = NDIS_STATUS_NOT_ACCEPTED;
+
+	_irqlevel_changed_(&oldirql, RAISE);
+
+	*poid_par_priv->bytes_rw = sizeof(NDIS_802_11_SSID);
+
+_func_exit_;
+
+	return status;
+#else
+	return 0;
+#endif
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_read_register_hdl(struct oid_par_priv *poid_par_priv)
+{
+	_irqL		oldirql;
+	pRW_Reg 	RegRWStruct;
+	u32		offset, width;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_info_,
+		 ("+oid_rt_pro_read_register_hdl\n"));
+
+	if (poid_par_priv->type_of_oid != QUERY_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	RegRWStruct = (pRW_Reg)poid_par_priv->information_buf;
+	offset = RegRWStruct->offset;
+	width = RegRWStruct->width;
+
+	if (offset > 0xFFF)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+
+	switch (width) {
+		case 1:
+			RegRWStruct->value = rtw_read8(Adapter, offset);
+			break;
+		case 2:
+			RegRWStruct->value = rtw_read16(Adapter, offset);
+			break;
+		default:
+			width = 4;
+			RegRWStruct->value = rtw_read32(Adapter, offset);
+			break;
+	}
+	RT_TRACE(_module_mp_, _drv_notice_,
+		 ("oid_rt_pro_read_register_hdl: offset:0x%04X value:0x%X\n",
+		  offset, RegRWStruct->value));
+
+	_irqlevel_changed_(&oldirql, RAISE);
+
+	*poid_par_priv->bytes_rw = width;
+
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_write_register_hdl(struct oid_par_priv *poid_par_priv)
+{
+	_irqL		oldirql;
+	pRW_Reg 	RegRWStruct;
+	u32		offset, width, value;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_info_,
+		 ("+oid_rt_pro_write_register_hdl\n"));
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	RegRWStruct = (pRW_Reg)poid_par_priv->information_buf;
+	offset = RegRWStruct->offset;
+	width = RegRWStruct->width;
+	value = RegRWStruct->value;
+
+	if (offset > 0xFFF)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+
+	switch (RegRWStruct->width)
+	{
+		case 1:
+			if (value > 0xFF) {
+				status = NDIS_STATUS_NOT_ACCEPTED;
+				break;
+			}
+			rtw_write8(padapter, offset, (u8)value);
+			break;
+		case 2:
+			if (value > 0xFFFF) {
+				status = NDIS_STATUS_NOT_ACCEPTED;
+				break;
+			}
+			rtw_write16(padapter, offset, (u16)value);
+			break;
+		case 4:
+			rtw_write32(padapter, offset, value);
+			break;
+		default:
+			status = NDIS_STATUS_NOT_ACCEPTED;
+			break;
+	}
+
+	_irqlevel_changed_(&oldirql, RAISE);
+
+	RT_TRACE(_module_mp_, _drv_info_,
+		 ("-oid_rt_pro_write_register_hdl: offset=0x%08X width=%d value=0x%X\n",
+		  offset, width, value));
+
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_burst_read_register_hdl(struct oid_par_priv *poid_par_priv)
+{
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	_irqL		oldirql;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+
+	pBurst_RW_Reg	pBstRwReg;
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_burst_read_register_hdl\n"));
+
+	if (poid_par_priv->type_of_oid != QUERY_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+#if 0
+	pBstRwReg = (pBurst_RW_Reg)poid_par_priv->information_buf;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	rtw_read_mem(Adapter, pBstRwReg->offset, (u32)pBstRwReg->len, pBstRwReg->Data);
+	_irqlevel_changed_(&oldirql,RAISE);
+
+	*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+#endif
+	RT_TRACE(_module_mp_, _drv_info_, ("-oid_rt_pro_burst_read_register_hdl\n"));
+
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_burst_write_register_hdl(struct oid_par_priv *poid_par_priv)
+{
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	_irqL		oldirql;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+
+	pBurst_RW_Reg	pBstRwReg;
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_burst_write_register_hdl\n"));
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+#if 0
+	pBstRwReg = (pBurst_RW_Reg)poid_par_priv->information_buf;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	rtw_write_mem(Adapter, pBstRwReg->offset, (u32)pBstRwReg->len, pBstRwReg->Data);
+	_irqlevel_changed_(&oldirql, RAISE);
+#endif
+	RT_TRACE(_module_mp_, _drv_info_, ("-oid_rt_pro_burst_write_register_hdl\n"));
+
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_write_txcmd_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+/*
+	PADAPTER	Adapter = (PADAPTER)( poid_par_priv->adapter_context);
+
+	_irqL		oldirql;
+
+	TX_CMD_Desc	*TxCmd_Info;
+
+_func_enter_;
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	RT_TRACE(_module_mp_, _drv_info_, ("+Set OID_RT_PRO_WRITE_TXCMD\n"));
+
+	TxCmd_Info=(TX_CMD_Desc*)poid_par_priv->information_buf;
+
+	RT_TRACE(_module_mp_, _drv_info_, ("WRITE_TXCMD:Addr=%.8X\n", TxCmd_Info->offset));
+  	RT_TRACE(_module_mp_, _drv_info_, ("WRITE_TXCMD:1.)%.8X\n", (ULONG)TxCmd_Info->TxCMD.value[0]));
+	RT_TRACE(_module_mp_, _drv_info_, ("WRITE_TXCMD:2.)%.8X\n", (ULONG)TxCmd_Info->TxCMD.value[1]));
+	RT_TRACE(_module_mp_, _drv_info_, (("WRITE_TXCMD:3.)%.8X\n", (ULONG)TxCmd_Info->TxCMD.value[2]));
+	RT_TRACE(_module_mp_, _drv_info_, ("WRITE_TXCMD:4.)%.8X\n", (ULONG)TxCmd_Info->TxCMD.value[3]));
+
+	_irqlevel_changed_(&oldirql, LOWER);
+
+	rtw_write32(Adapter, TxCmd_Info->offset + 0, (unsigned int)TxCmd_Info->TxCMD.value[0]);
+	rtw_write32(Adapter, TxCmd_Info->offset + 4, (unsigned int)TxCmd_Info->TxCMD.value[1]);
+
+	_irqlevel_changed_(&oldirql, RAISE);
+*/
+
+	RT_TRACE(_module_mp_, _drv_notice_,
+		 ("-Set OID_RT_PRO_WRITE_TXCMD: status=0x%08X\n", status));
+
+_func_exit_;
+
+	return status;
+}
+
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_read16_eeprom_hdl(struct oid_par_priv *poid_par_priv)
+{
+	PADAPTER	Adapter = (PADAPTER)( poid_par_priv->adapter_context);
+
+	_irqL		oldirql;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+
+	pEEPROM_RWParam pEEPROM;
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_info_, ("+Query OID_RT_PRO_READ16_EEPROM\n"));
+
+	if (poid_par_priv->type_of_oid != QUERY_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+#if 0
+	pEEPROM = (pEEPROM_RWParam)poid_par_priv->information_buf;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	pEEPROM->value = eeprom_read16(Adapter, (u16)(pEEPROM->offset >> 1));
+	_irqlevel_changed_(&oldirql, RAISE);
+
+	*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+
+	RT_TRACE(_module_mp_,  _drv_notice_,
+		 ("-Query OID_RT_PRO_READ16_EEPROM: offset=0x%x value=0x%x\n",
+		  pEEPROM->offset, pEEPROM->value));
+#endif
+_func_exit_;
+
+	return status;
+}
+
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_write16_eeprom_hdl (struct oid_par_priv *poid_par_priv)
+{
+	PADAPTER	Adapter = (PADAPTER)( poid_par_priv->adapter_context);
+
+	_irqL		oldirql;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+
+	pEEPROM_RWParam pEEPROM;
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("+Set OID_RT_PRO_WRITE16_EEPROM\n"));
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+#if 0
+	pEEPROM = (pEEPROM_RWParam)poid_par_priv->information_buf;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	eeprom_write16(Adapter, (u16)(pEEPROM->offset >> 1), pEEPROM->value);
+	_irqlevel_changed_(&oldirql, RAISE);
+
+	*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+#endif
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro8711_wi_poll_hdl(struct oid_par_priv *poid_par_priv)
+{
+#if 0
+	PADAPTER	Adapter = (PADAPTER)( poid_par_priv->adapter_context);
+
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+
+	struct mp_wiparam *pwi_param;
+
+_func_enter_;
+
+	if (poid_par_priv->type_of_oid != QUERY_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	if (poid_par_priv->information_buf_len < sizeof(struct mp_wiparam))
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	if (Adapter->mppriv.workparam.bcompleted == _FALSE)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	pwi_param = (struct mp_wiparam *)poid_par_priv->information_buf;
+
+	_rtw_memcpy(pwi_param, &Adapter->mppriv.workparam, sizeof(struct mp_wiparam));
+	Adapter->mppriv.act_in_progress = _FALSE;
+//	RT_TRACE(_module_mp_, _drv_info_, ("rf:%x\n", pwiparam->IoValue));
+	*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+
+_func_exit_;
+
+	return status;
+#else
+	return 0;
+#endif
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro8711_pkt_loss_hdl(struct oid_par_priv *poid_par_priv)
+{
+#if 0
+	PADAPTER	Adapter = (PADAPTER)( poid_par_priv->adapter_context);
+
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro8711_pkt_loss_hdl\n"));
+
+	if (poid_par_priv->type_of_oid != QUERY_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	if (poid_par_priv->information_buf_len < sizeof(uint)*2) {
+		RT_TRACE(_module_mp_, _drv_err_, ("-oid_rt_pro8711_pkt_loss_hdl: buf_len=%d\n", (int)poid_par_priv->information_buf_len));
+		return NDIS_STATUS_INVALID_LENGTH;
+	}
+
+	if (*(uint*)poid_par_priv->information_buf == 1)//init==1
+		Adapter->mppriv.rx_pktloss = 0;
+
+	*((uint*)poid_par_priv->information_buf+1) = Adapter->mppriv.rx_pktloss;
+	*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+
+_func_exit_;
+
+	return status;
+#else
+	return 0;
+#endif
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_rd_attrib_mem_hdl(struct oid_par_priv *poid_par_priv)
+{
+#if 0
+	PADAPTER	Adapter = (PADAPTER)( poid_par_priv->adapter_context);
+	struct io_queue *pio_queue = (struct io_queue *)Adapter->pio_queue;
+	struct intf_hdl	*pintfhdl = &pio_queue->intf;
+
+	_irqL	oldirql;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+
+#ifdef CONFIG_SDIO_HCI
+	void (*_attrib_read)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
+#endif
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("+Query OID_RT_RD_ATTRIB_MEM\n"));
+
+	if (poid_par_priv->type_of_oid != QUERY_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+#ifdef CONFIG_SDIO_HCI
+	_irqlevel_changed_(&oldirql, LOWER);
+{
+	u32 *plmem = (u32*)poid_par_priv->information_buf+2;
+	_attrib_read = pintfhdl->io_ops._attrib_read;
+	_attrib_read(pintfhdl, *((u32*)poid_par_priv->information_buf),
+				*((u32*)poid_par_priv->information_buf+1), (u8*)plmem);
+	*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+}
+	_irqlevel_changed_(&oldirql, RAISE);
+#endif
+
+_func_exit_;
+
+	return status;
+#else
+	return 0;
+#endif
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_wr_attrib_mem_hdl (struct oid_par_priv *poid_par_priv)
+{
+#if 0
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+	struct io_queue *pio_queue = (struct io_queue *)Adapter->pio_queue;
+	struct intf_hdl	*pintfhdl = &pio_queue->intf;
+
+	_irqL		oldirql;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+
+#ifdef CONFIG_SDIO_HCI
+	void (*_attrib_write)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
+#endif
+
+_func_enter_;
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+#ifdef CONFIG_SDIO_HCI
+	_irqlevel_changed_(&oldirql, LOWER);
+{
+	u32 *plmem = (u32*)poid_par_priv->information_buf + 2;
+	_attrib_write = pintfhdl->io_ops._attrib_write;
+	_attrib_write(pintfhdl, *(u32*)poid_par_priv->information_buf,
+				*((u32*)poid_par_priv->information_buf+1), (u8*)plmem);
+}
+	_irqlevel_changed_(&oldirql, RAISE);
+#endif
+
+_func_exit_;
+
+	return status;
+#else
+	return 0;
+#endif
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS  oid_rt_pro_set_rf_intfs_hdl(struct oid_par_priv *poid_par_priv)
+{
+#if 0
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	_irqL		oldirql;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("+OID_RT_PRO_SET_RF_INTFS\n"));
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+
+	if (rtw_setrfintfs_cmd(Adapter, *(unsigned char*)poid_par_priv->information_buf) == _FAIL)
+		status = NDIS_STATUS_NOT_ACCEPTED;
+
+	_irqlevel_changed_(&oldirql, RAISE);
+
+_func_exit_;
+
+	return status;
+#else
+	return 0;
+#endif
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_poll_rx_status_hdl(struct oid_par_priv *poid_par_priv)
+{
+#if 0
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+
+_func_enter_;
+
+	if (poid_par_priv->type_of_oid != QUERY_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	_rtw_memcpy(poid_par_priv->information_buf, (unsigned char*)&Adapter->mppriv.rxstat, sizeof(struct recv_stat));
+	*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+
+_func_exit_;
+
+	return status;
+#else
+	return 0;
+#endif
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_cfg_debug_message_hdl(struct oid_par_priv *poid_par_priv)
+{
+#if 0
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+
+	PCFG_DBG_MSG_STRUCT pdbg_msg;
+
+_func_enter_;
+
+//	RT_TRACE(0xffffffffff,_drv_alert_,("===> oid_rt_pro_cfg_debug_message_hdl.\n"));
+
+#if 0//#ifdef CONFIG_DEBUG_RTL871X
+
+	pdbg_msg = (PCFG_DBG_MSG_STRUCT)(poid_par_priv->information_buf);
+
+	if (poid_par_priv->type_of_oid == SET_OID) {
+		RT_TRACE(0xffffffffff, _drv_alert_,
+			 ("===>Set level :0x%08x, H32:0x%08x L32:0x%08x\n",
+			  pdbg_msg->DebugLevel, pdbg_msg->DebugComponent_H32, pdbg_msg->DebugComponent_L32));
+
+		GlobalDebugLevel = pdbg_msg->DebugLevel;
+		GlobalDebugComponents = (pdbg_msg->DebugComponent_H32 << 32) | pdbg_msg->DebugComponent_L32;
+		RT_TRACE(0xffffffffff, _drv_alert_,
+			 ("===> Set level :0x%08x, component:0x%016x\n",
+			  GlobalDebugLevel, (u32)GlobalDebugComponents));
+	} else {
+		pdbg_msg->DebugLevel = GlobalDebugLevel;
+		pdbg_msg->DebugComponent_H32 = (u32)(GlobalDebugComponents >> 32);
+		pdbg_msg->DebugComponent_L32 = (u32)GlobalDebugComponents;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+
+		RT_TRACE(0xffffffffff, _drv_alert_,
+			 ("===>Query level:0x%08x H32:0x%08x L32:0x%08x\n",
+			  (u32)pdbg_msg->DebugLevel, (u32)pdbg_msg->DebugComponent_H32, (u32)pdbg_msg->DebugComponent_L32));
+	}
+
+#endif
+
+_func_exit_;
+
+	return status;
+#else
+	return 0;
+#endif
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_set_data_rate_ex_hdl(struct oid_par_priv *poid_par_priv)
+{
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	_irqL		oldirql;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("+OID_RT_PRO_SET_DATA_RATE_EX\n"));
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+
+	if (rtw_setdatarate_cmd(Adapter, poid_par_priv->information_buf) !=_SUCCESS)
+		status = NDIS_STATUS_NOT_ACCEPTED;
+
+	_irqlevel_changed_(&oldirql, RAISE);
+
+_func_exit_;
+
+	return status;
+}
+//-----------------------------------------------------------------------------
+NDIS_STATUS oid_rt_get_thermal_meter_hdl(struct oid_par_priv *poid_par_priv)
+{
+	_irqL		oldirql;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	u8 thermal = 0;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_get_thermal_meter_hdl\n"));
+
+	if (poid_par_priv->type_of_oid != QUERY_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	if (poid_par_priv->information_buf_len < sizeof(u32))
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	GetThermalMeter(Adapter, &thermal);
+	_irqlevel_changed_(&oldirql, RAISE);
+
+	*(u32*)poid_par_priv->information_buf = (u32)thermal;
+	*poid_par_priv->bytes_rw = sizeof(u32);
+
+_func_exit_;
+
+	return status;
+}
+//-----------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_read_tssi_hdl(struct oid_par_priv *poid_par_priv)
+{
+#if 0
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	_irqL		oldirql;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_read_tssi_hdl\n"));
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	if (Adapter->mppriv.act_in_progress == _TRUE)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	if (poid_par_priv->information_buf_len < sizeof(u8))
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	//init workparam
+	Adapter->mppriv.act_in_progress = _TRUE;
+	Adapter->mppriv.workparam.bcompleted = _FALSE;
+	Adapter->mppriv.workparam.act_type = MPT_READ_TSSI;
+	Adapter->mppriv.workparam.io_offset = 0;
+	Adapter->mppriv.workparam.io_value = 0xFFFFFFFF;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+
+	if (!rtw_gettssi_cmd(Adapter,0, (u8*)&Adapter->mppriv.workparam.io_value))
+		status = NDIS_STATUS_NOT_ACCEPTED;
+
+	_irqlevel_changed_(&oldirql, RAISE);
+
+_func_exit_;
+
+	return status;
+#else
+	return 0;
+#endif
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_set_power_tracking_hdl(struct oid_par_priv *poid_par_priv)
+{
+	_irqL		oldirql;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+
+_func_enter_;
+
+//	if (poid_par_priv->type_of_oid != SET_OID)
+//		return NDIS_STATUS_NOT_ACCEPTED;
+
+	if (poid_par_priv->information_buf_len < sizeof(u8))
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	if (poid_par_priv->type_of_oid == SET_OID) {
+		u8 enable;
+
+		enable = *(u8*)poid_par_priv->information_buf;
+		RT_TRACE(_module_mp_, _drv_notice_,
+			 ("+oid_rt_pro_set_power_tracking_hdl: enable=%d\n", enable));
+
+		SetPowerTracking(Adapter, enable);
+	} else {
+		GetPowerTracking(Adapter, (u8*)poid_par_priv->information_buf);
+	}
+	_irqlevel_changed_(&oldirql, RAISE);
+
+_func_exit_;
+
+	return status;
+}
+//-----------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_set_basic_rate_hdl(struct oid_par_priv *poid_par_priv)
+{
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	_irqL		oldirql;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+
+	u32 ratevalue;
+	u8 datarates[NumRates];
+	int i;
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_info_, ("+OID_RT_PRO_SET_BASIC_RATE\n"));
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+#if 0
+	ratevalue = *((u32*)poid_par_priv->information_buf);
+
+	for (i = 0; i < NumRates; i++) {
+		if (ratevalue == mpdatarate[i])
+			datarates[i] = mpdatarate[i];
+		else
+			datarates[i] = 0xff;
+		RT_TRACE(_module_rtl871x_ioctl_c_, _drv_info_, ("basicrate_inx=%d\n", datarates[i]));
+	}
+
+	_irqlevel_changed_(&oldirql, LOWER);
+
+	if (rtw_setbasicrate_cmd(Adapter, datarates) != _SUCCESS)
+		status = NDIS_STATUS_NOT_ACCEPTED;
+
+	_irqlevel_changed_(&oldirql, RAISE);
+#endif
+	RT_TRACE(_module_mp_, _drv_notice_,
+		 ("-OID_RT_PRO_SET_BASIC_RATE: status=0x%08X\n", status));
+
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_qry_pwrstate_hdl(struct oid_par_priv *poid_par_priv)
+{
+#if 0
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+
+_func_enter_;
+
+	if (poid_par_priv->type_of_oid != QUERY_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	if (poid_par_priv->information_buf_len < 8)
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	*poid_par_priv->bytes_rw = 8;
+	_rtw_memcpy(poid_par_priv->information_buf, &(Adapter->pwrctrlpriv.pwr_mode), 8);
+	*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+
+	RT_TRACE(_module_mp_, _drv_notice_,
+		 ("-oid_rt_pro_qry_pwrstate_hdl: pwr_mode=%d smart_ps=%d\n",
+		  Adapter->pwrctrlpriv.pwr_mode, Adapter->pwrctrlpriv.smart_ps));
+
+_func_exit_;
+
+	return status;
+#else
+	return 0;
+#endif
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_set_pwrstate_hdl(struct oid_par_priv *poid_par_priv)
+{
+#if 0
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+
+	uint pwr_mode, smart_ps;
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("+Set OID_RT_PRO_SET_PWRSTATE\n"));
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	*poid_par_priv->bytes_rw = 0;
+	*poid_par_priv->bytes_needed = 8;
+
+	if (poid_par_priv->information_buf_len < 8)
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	pwr_mode = *(uint *)(poid_par_priv->information_buf);
+	smart_ps = *(uint *)((int)poid_par_priv->information_buf + 4);
+
+	*poid_par_priv->bytes_rw = 8;
+
+_func_exit_;
+
+	return status;
+#else
+	return 0;
+#endif
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_h2c_set_rate_table_hdl(struct oid_par_priv *poid_par_priv)
+{
+#if 0
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	_irqL		oldirql;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+
+	struct setratable_parm *prate_table;
+	u8		res;
+
+_func_enter_;
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	*poid_par_priv->bytes_needed  = sizeof(struct setratable_parm);
+	if (poid_par_priv->information_buf_len < sizeof(struct setratable_parm))
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	prate_table = (struct setratable_parm*)poid_par_priv->information_buf;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	res = rtw_setrttbl_cmd(Adapter, prate_table);
+	_irqlevel_changed_(&oldirql, RAISE);
+
+	if (res == _FAIL)
+		status = NDIS_STATUS_FAILURE;
+
+_func_exit_;
+
+	return status;
+#else
+	return 0;
+#endif
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_h2c_get_rate_table_hdl(struct oid_par_priv *poid_par_priv)
+{
+#if 0
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+
+_func_enter_;
+
+	if (poid_par_priv->type_of_oid != QUERY_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	#if 0
+			struct mp_wi_cntx *pmp_wi_cntx=&(Adapter->mppriv.wi_cntx);
+			u8 res=_SUCCESS;
+			DEBUG_INFO(("===> Set OID_RT_PRO_H2C_GET_RATE_TABLE.\n"));
+
+			if(pmp_wi_cntx->bmp_wi_progress ==_TRUE){
+				DEBUG_ERR(("\n mp workitem is progressing, not allow to set another workitem right now!!!\n"));
+				Status = NDIS_STATUS_NOT_ACCEPTED;
+				break;
+			}
+			else{
+				pmp_wi_cntx->bmp_wi_progress=_TRUE;
+				pmp_wi_cntx->param.bcompleted=_FALSE;
+				pmp_wi_cntx->param.act_type=MPT_GET_RATE_TABLE;
+				pmp_wi_cntx->param.io_offset=0x0;
+				pmp_wi_cntx->param.bytes_cnt=sizeof(struct getratable_rsp);
+				pmp_wi_cntx->param.io_value=0xffffffff;
+
+				res=rtw_getrttbl_cmd(Adapter,(struct getratable_rsp *)pmp_wi_cntx->param.data);
+				*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+				if(res != _SUCCESS)
+				{
+					Status = NDIS_STATUS_NOT_ACCEPTED;
+				}
+			}
+			DEBUG_INFO(("\n <=== Set OID_RT_PRO_H2C_GET_RATE_TABLE.\n"));
+	#endif
+
+_func_exit_;
+
+	return status;
+#else
+	return 0;
+#endif
+}
+
+//****************  oid_rtl_seg_87_12_00   section start ****************
+NDIS_STATUS oid_rt_pro_encryption_ctrl_hdl(struct oid_par_priv *poid_par_priv)
+{
+#if 0
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+	struct security_priv *psecuritypriv = &Adapter->securitypriv;
+
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+
+	ENCRY_CTRL_STATE encry_mode;
+
+
+	*poid_par_priv->bytes_needed = sizeof(u8);
+	if (poid_par_priv->information_buf_len < *poid_par_priv->bytes_needed)
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	if (poid_par_priv->type_of_oid == SET_OID)
+	{
+		encry_mode = *((u8*)poid_par_priv->information_buf);
+		switch (encry_mode)
+		{
+			case HW_CONTROL:
+				#if 0
+				Adapter->registrypriv.software_decrypt=_FALSE;
+				Adapter->registrypriv.software_encrypt=_FALSE;
+				#else
+				psecuritypriv->sw_decrypt = _FALSE;
+				psecuritypriv->sw_encrypt = _FALSE;
+				#endif
+				break;
+			case SW_CONTROL:
+				#if 0
+				Adapter->registrypriv.software_decrypt=_TRUE;
+				Adapter->registrypriv.software_encrypt=_TRUE;
+				#else
+				psecuritypriv->sw_decrypt = _TRUE;
+				psecuritypriv->sw_encrypt = _TRUE;
+				#endif
+				break;
+			case HW_ENCRY_SW_DECRY:
+				#if 0
+				Adapter->registrypriv.software_decrypt=_TRUE;
+				Adapter->registrypriv.software_encrypt=_FALSE;
+				#else
+				psecuritypriv->sw_decrypt = _TRUE;
+				psecuritypriv->sw_encrypt = _FALSE;
+				#endif
+				break;
+			case SW_ENCRY_HW_DECRY:
+				#if 0
+				Adapter->registrypriv.software_decrypt=_FALSE;
+				Adapter->registrypriv.software_encrypt=_TRUE;
+				#else
+				psecuritypriv->sw_decrypt = _FALSE;
+				psecuritypriv->sw_encrypt = _TRUE;
+				#endif
+				break;
+		}
+
+		RT_TRACE(_module_rtl871x_ioctl_c_, _drv_notice_,
+			 ("-oid_rt_pro_encryption_ctrl_hdl: SET encry_mode=0x%x sw_encrypt=0x%x sw_decrypt=0x%x\n",
+			  encry_mode, psecuritypriv->sw_encrypt, psecuritypriv->sw_decrypt));
+	}
+	else {
+		#if 0
+		if (Adapter->registrypriv.software_encrypt == _FALSE) {
+			if (Adapter->registrypriv.software_decrypt == _FALSE)
+				encry_mode = HW_CONTROL;
+			else
+				encry_mode = HW_ENCRY_SW_DECRY;
+		}
+		else {
+			if (Adapter->registrypriv.software_decrypt == _FALSE)
+				encry_mode = SW_ENCRY_HW_DECRY;
+			else
+				encry_mode = SW_CONTROL;
+		}
+		#else
+
+		if ((psecuritypriv->sw_encrypt == _FALSE) && (psecuritypriv->sw_decrypt == _FALSE))
+			encry_mode = HW_CONTROL;
+		else if ((psecuritypriv->sw_encrypt == _FALSE) && (psecuritypriv->sw_decrypt == _TRUE))
+			encry_mode = HW_ENCRY_SW_DECRY;
+		else if ((psecuritypriv->sw_encrypt == _TRUE) && (psecuritypriv->sw_decrypt == _FALSE))
+			encry_mode = SW_ENCRY_HW_DECRY;
+		else if ((psecuritypriv->sw_encrypt == _TRUE) && (psecuritypriv->sw_decrypt == _TRUE))
+			encry_mode = SW_CONTROL;
+
+		#endif
+
+		*(u8*)poid_par_priv->information_buf =  encry_mode;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+
+		RT_TRACE(_module_mp_, _drv_notice_,
+			 ("-oid_rt_pro_encryption_ctrl_hdl: QUERY encry_mode=0x%x\n",
+			  encry_mode));
+	}
+
+	return status;
+#else
+	return 0;
+#endif
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_add_sta_info_hdl(struct oid_par_priv *poid_par_priv)
+{
+#if 0
+	PADAPTER		Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	_irqL			oldirql;
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+
+	struct sta_info 	*psta = NULL;
+	UCHAR 			*macaddr;
+
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	*poid_par_priv->bytes_needed = ETH_ALEN;
+	if (poid_par_priv->information_buf_len < *poid_par_priv->bytes_needed)
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	macaddr = (UCHAR *) poid_par_priv->information_buf ;
+
+	RT_TRACE(_module_rtl871x_ioctl_c_,_drv_notice_,
+		 ("OID_RT_PRO_ADD_STA_INFO: addr="MAC_FMT"\n", MAC_ARG(macaddr) ));
+
+	_irqlevel_changed_(&oldirql, LOWER);
+
+	psta = rtw_get_stainfo(&Adapter->stapriv, macaddr);
+
+	if (psta == NULL) { // the sta have been in sta_info_queue => do nothing
+		psta = rtw_alloc_stainfo(&Adapter->stapriv, macaddr);
+
+		if (psta == NULL) {
+			RT_TRACE(_module_rtl871x_ioctl_c_,_drv_err_,("Can't alloc sta_info when OID_RT_PRO_ADD_STA_INFO\n"));
+			status = NDIS_STATUS_FAILURE;
+		}
+	} else { //(between drv has received this event before and  fw have not yet to set key to CAM_ENTRY)
+		RT_TRACE(_module_rtl871x_ioctl_c_, _drv_err_,
+			("Error: OID_RT_PRO_ADD_STA_INFO: sta has been in sta_hash_queue \n"));
+	}
+
+	_irqlevel_changed_(&oldirql, RAISE);
+
+	return status;
+#else
+	return 0;
+#endif
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_dele_sta_info_hdl(struct oid_par_priv *poid_par_priv)
+{
+#if 0
+	PADAPTER		Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	_irqL			irqL;
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+
+	struct sta_info 	*psta = NULL;
+	UCHAR			*macaddr;
+
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	*poid_par_priv->bytes_needed = ETH_ALEN;
+	if (poid_par_priv->information_buf_len < *poid_par_priv->bytes_needed)
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	macaddr = (UCHAR *) poid_par_priv->information_buf ;
+	RT_TRACE(_module_rtl871x_ioctl_c_,_drv_notice_,
+		 ("+OID_RT_PRO_ADD_STA_INFO: addr="MAC_FMT"\n", MAC_ARG(macaddr) ));
+
+	psta = rtw_get_stainfo(&Adapter->stapriv, macaddr);
+	if (psta != NULL) {
+		_enter_critical(&(Adapter->stapriv.sta_hash_lock), &irqL);
+		rtw_free_stainfo(Adapter, psta);
+		_exit_critical(&(Adapter->stapriv.sta_hash_lock), &irqL);
+	}
+
+	return status;
+#else
+	return 0;
+#endif
+}
+//------------------------------------------------------------------------------
+#include <sdio_osintf.h>
+u32 mp_query_drv_var(_adapter *padapter, u8 offset, u32 var)
+{
+#if 0
+#ifdef CONFIG_SDIO_HCI
+
+	if (offset == 1) {
+		u16 tmp_blk_num;
+		tmp_blk_num = rtw_read16(padapter, SDIO_RX0_RDYBLK_NUM);
+		RT_TRACE(_module_mp_, _drv_err_, ("Query Information, mp_query_drv_var  SDIO_RX0_RDYBLK_NUM=0x%x   padapter->dvobjpriv.rxblknum=0x%x\n", tmp_blk_num, padapter->dvobjpriv.rxblknum));
+		if (padapter->dvobjpriv.rxblknum != tmp_blk_num) {
+			RT_TRACE(_module_mp_,_drv_err_, ("Query Information, mp_query_drv_var  call recv rx\n"));
+		//	sd_recv_rxfifo(padapter);
+		}
+	}
+
+#if 0
+	if(offset <=100){  //For setting data rate and query data rate
+		if(offset==100){ //For query data rate
+			RT_TRACE(_module_mp_, _drv_emerg_, ("\n mp_query_drv_var: offset(%d): query rate=0x%.2x \n",offset,padapter->registrypriv.tx_rate));
+			var=padapter->registrypriv.tx_rate;
+
+		}
+		else if(offset<0x1d){  //For setting data rate
+			padapter->registrypriv.tx_rate=offset;
+			var=padapter->registrypriv.tx_rate;
+			padapter->registrypriv.use_rate=_TRUE;
+			RT_TRACE(_module_mp_, _drv_emerg_, ("\n mp_query_drv_var: offset(%d): set rate=0x%.2x \n",offset,padapter->registrypriv.tx_rate));
+		}
+		else{ //not use the data rate
+			padapter->registrypriv.use_rate=_FALSE;
+			RT_TRACE(_module_mp_, _drv_emerg_, ("\n mp_query_drv_var: offset(%d) out of rate range\n",offset));
+		}
+	}
+	else if (offset<=110){  //for setting debug level
+		RT_TRACE(_module_mp_, _drv_emerg_, (" mp_query_drv_var: offset(%d) for set debug level\n",offset));
+		if(offset==110){ //For query data rate
+			RT_TRACE(_module_mp_, _drv_emerg_, (" mp_query_drv_var: offset(%d): query dbg level=0x%.2x \n",offset,padapter->registrypriv.dbg_level));
+			padapter->registrypriv.dbg_level=GlobalDebugLevel;
+			var=padapter->registrypriv.dbg_level;
+		}
+		else if(offset<110 && offset>100){
+			RT_TRACE(_module_mp_, _drv_emerg_, (" mp_query_drv_var: offset(%d): set dbg level=0x%.2x \n",offset,offset-100));
+			padapter->registrypriv.dbg_level=GlobalDebugLevel=offset-100;
+			var=padapter->registrypriv.dbg_level;
+			RT_TRACE(_module_mp_, _drv_emerg_, (" mp_query_drv_var(_drv_emerg_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel));
+			RT_TRACE(_module_mp_, _drv_alert_, (" mp_query_drv_var(_drv_alert_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel));
+			RT_TRACE(_module_mp_, _drv_crit_, (" mp_query_drv_var(_drv_crit_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel));
+			RT_TRACE(_module_mp_, _drv_err_, (" mp_query_drv_var(_drv_err_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel));
+			RT_TRACE(_module_mp_, _drv_warning_, (" mp_query_drv_var(_drv_warning_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel));
+			RT_TRACE(_module_mp_, _drv_notice_, (" mp_query_drv_var(_drv_notice_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel));
+			RT_TRACE(_module_mp_, _drv_info_, (" mp_query_drv_var(_drv_info_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel));
+			RT_TRACE(_module_mp_, _drv_debug_, (" mp_query_drv_var(_drv_debug_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel));
+
+		}
+	}
+	else if(offset >110 &&offset <116){
+		if(115==offset){
+			RT_TRACE(_module_mp_, _drv_emerg_, (" mp_query_drv_var(_drv_emerg_): offset(%d): query TRX access type: [tx_block_mode=%x,rx_block_mode=%x]\n",\
+															offset,padapter->dvobjpriv.tx_block_mode,padapter->dvobjpriv.rx_block_mode));
+		}
+		else {
+			switch(offset){
+				case 111:
+					padapter->dvobjpriv.tx_block_mode=1;
+					padapter->dvobjpriv.rx_block_mode=1;
+					RT_TRACE(_module_mp_, _drv_emerg_, \
+						(" mp_query_drv_var(_drv_emerg_): offset(%d): SET TRX access type:(TX block/RX block) [tx_block_mode=%x,rx_block_mode=%x]\n",\
+						offset,padapter->dvobjpriv.tx_block_mode,padapter->dvobjpriv.rx_block_mode));
+					break;
+				case 112:
+					padapter->dvobjpriv.tx_block_mode=1;
+					padapter->dvobjpriv.rx_block_mode=0;
+					RT_TRACE(_module_mp_, _drv_emerg_, \
+						(" mp_query_drv_var(_drv_emerg_): offset(%d): SET TRX access type:(TX block/RX byte) [tx_block_mode=%x,rx_block_mode=%x]\n",\
+						offset,padapter->dvobjpriv.tx_block_mode,padapter->dvobjpriv.rx_block_mode));
+					break;
+				case 113:
+					padapter->dvobjpriv.tx_block_mode=0;
+					padapter->dvobjpriv.rx_block_mode=1;
+					RT_TRACE(_module_mp_, _drv_emerg_, \
+						(" mp_query_drv_var(_drv_emerg_): offset(%d): SET TRX access type:(TX byte/RX block) [tx_block_mode=%x,rx_block_mode=%x]\n",\
+						offset,padapter->dvobjpriv.tx_block_mode,padapter->dvobjpriv.rx_block_mode));
+					break;
+				case 114:
+					padapter->dvobjpriv.tx_block_mode=0;
+					padapter->dvobjpriv.rx_block_mode=0;
+					RT_TRACE(_module_mp_, _drv_emerg_, \
+						(" mp_query_drv_var(_drv_emerg_): offset(%d): SET TRX access type:(TX byte/RX byte) [tx_block_mode=%x,rx_block_mode=%x]\n",\
+						offset,padapter->dvobjpriv.tx_block_mode,padapter->dvobjpriv.rx_block_mode));
+					break;
+				default :
+					break;
+
+			}
+
+		}
+
+	}
+	else if(offset>=127){
+		u64	prnt_dbg_comp;
+		u8   chg_idx;
+		u64	tmp_dbg_comp;
+		chg_idx=offset-0x80;
+		tmp_dbg_comp=BIT(chg_idx);
+		prnt_dbg_comp=padapter->registrypriv.dbg_component= GlobalDebugComponents;
+		RT_TRACE(_module_mp_, _drv_emerg_, (" 1: mp_query_drv_var: offset(%d;0x%x):for dbg conpoment prnt_dbg_comp=0x%.16x GlobalDebugComponents=0x%.16x padapter->registrypriv.dbg_component=0x%.16x\n",offset,offset,prnt_dbg_comp,GlobalDebugComponents,padapter->registrypriv.dbg_component));
+		if(offset==127){
+	//		prnt_dbg_comp=padapter->registrypriv.dbg_component= GlobalDebugComponents;
+			var=(u32)(padapter->registrypriv.dbg_component);
+			RT_TRACE(0xffffffff, _drv_emerg_, ("2: mp_query_drv_var: offset(%d;0x%x):for query dbg conpoment=0x%x(l) 0x%x(h)  GlobalDebugComponents=0x%x(l) 0x%x(h) \n",offset,offset,padapter->registrypriv.dbg_component,prnt_dbg_comp));
+			prnt_dbg_comp=GlobalDebugComponents;
+			RT_TRACE(0xffffffff, _drv_emerg_, ("2-1: mp_query_drv_var: offset(%d;0x%x):for query dbg conpoment=0x%x(l) 0x%x(h)  GlobalDebugComponents=0x%x(l) 0x%x(h)\n",offset,offset,padapter->registrypriv.dbg_component,prnt_dbg_comp));
+			prnt_dbg_comp=GlobalDebugComponents=padapter->registrypriv.dbg_component;
+			RT_TRACE(0xffffffff, _drv_emerg_, ("2-2: mp_query_drv_var: offset(%d;0x%x):for query dbg conpoment=0x%x(l) 0x%x(h)  GlobalDebugComponents=0x%x(l) 0x%x(h)\n",offset,offset,padapter->registrypriv.dbg_component,prnt_dbg_comp));
+
+		}
+		else{
+			RT_TRACE(0xffffffff, _drv_emerg_, ("3: mp_query_drv_var: offset(%d;0x%x):for query dbg conpoment=0x%x(l) 0x%x(h) GlobalDebugComponents=0x%x(l) 0x%x(h) chg_idx=%d\n",offset,offset,padapter->registrypriv.dbg_component,prnt_dbg_comp,chg_idx));
+			prnt_dbg_comp=GlobalDebugComponents;
+			RT_TRACE(0xffffffff, _drv_emerg_,("3-1: mp_query_drv_var: offset(%d;0x%x):for query dbg conpoment=0x%x(l) 0x%x(h)  GlobalDebugComponents=0x%x(l) 0x%x(h) chg_idx=%d\n",offset,offset,padapter->registrypriv.dbg_component,prnt_dbg_comp,chg_idx));// ("3-1: mp_query_drv_var: offset(%d;0x%x):before set dbg conpoment=0x%x chg_idx=%d or0x%x BIT(chg_idx[%d]=0x%x)\n",offset,offset,prnt_dbg_comp,chg_idx,chg_idx,(chg_idx),tmp_dbg_comp)
+			prnt_dbg_comp=GlobalDebugComponents=padapter->registrypriv.dbg_component;
+			RT_TRACE(0xffffffff, _drv_emerg_, ("3-2: mp_query_drv_var: offset(%d;0x%x):for query dbg conpoment=0x%x(l) 0x%x(h)  GlobalDebugComponents=0x%x(l) 0x%x(h)\n",offset,offset,padapter->registrypriv.dbg_component,prnt_dbg_comp));
+
+			if(GlobalDebugComponents&tmp_dbg_comp){
+				//this bit is already set, now clear it
+				GlobalDebugComponents=GlobalDebugComponents&(~tmp_dbg_comp);
+			}
+			else{
+				//this bit is not set, now set it.
+				GlobalDebugComponents =GlobalDebugComponents|tmp_dbg_comp;
+			}
+			RT_TRACE(0xffffffff, _drv_emerg_, ("4: mp_query_drv_var: offset(%d;0x%x):before set dbg conpoment tmp_dbg_comp=0x%x GlobalDebugComponents=0x%x(l) 0x%x(h)",offset,offset,tmp_dbg_comp,prnt_dbg_comp));
+			prnt_dbg_comp=GlobalDebugComponents;
+			RT_TRACE(0xffffffff, _drv_emerg_, ("4-1: mp_query_drv_var: offset(%d;0x%x):before set dbg conpoment tmp_dbg_comp=0x%x GlobalDebugComponents=0x%x(l) 0x%x(h)",offset,offset,tmp_dbg_comp,prnt_dbg_comp));
+
+			RT_TRACE(_module_rtl871x_xmit_c_, _drv_emerg_, ("0: mp_query_drv_var(_module_rtl871x_xmit_c_:0): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,prnt_dbg_comp));
+			RT_TRACE(_module_xmit_osdep_c_, _drv_emerg_, ("1: mp_query_drv_var(_module_xmit_osdep_c_:1): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents));
+			RT_TRACE(_module_rtl871x_recv_c_, _drv_emerg_, ("2: mp_query_drv_var(_module_rtl871x_recv_c_:2): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents));
+			RT_TRACE(_module_recv_osdep_c_, _drv_emerg_, ("3: mp_query_drv_var(_module_recv_osdep_c_:3): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents));
+			RT_TRACE(_module_rtl871x_mlme_c_, _drv_emerg_, ("4: mp_query_drv_var(_module_rtl871x_mlme_c_:4): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents));
+			RT_TRACE(_module_mlme_osdep_c_, _drv_emerg_, (" 5:mp_query_drv_var(_module_mlme_osdep_c_:5): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents));
+			RT_TRACE(_module_rtl871x_sta_mgt_c_, _drv_emerg_, ("6: mp_query_drv_var(_module_rtl871x_sta_mgt_c_:6): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents));
+			RT_TRACE(_module_rtl871x_cmd_c_, _drv_emerg_, ("7: mp_query_drv_var(_module_rtl871x_cmd_c_:7): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents));
+			RT_TRACE(_module_cmd_osdep_c_, _drv_emerg_, ("8: mp_query_drv_var(_module_cmd_osdep_c_:8): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents));
+			RT_TRACE(_module_rtl871x_io_c_, _drv_emerg_, ("9: mp_query_drv_var(_module_rtl871x_io_c_:9): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents));
+			RT_TRACE(_module_io_osdep_c_, _drv_emerg_, ("10: mp_query_drv_var(_module_io_osdep_c_:10): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents));
+			RT_TRACE(_module_os_intfs_c_, _drv_emerg_, ("11: mp_query_drv_var(_module_os_intfs_c_:11): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents));
+			RT_TRACE(_module_rtl871x_security_c_, _drv_emerg_, ("12: mp_query_drv_var(_module_rtl871x_security_c_:12): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents));
+			RT_TRACE(_module_rtl871x_eeprom_c_, _drv_emerg_, ("13: mp_query_drv_var(_module_rtl871x_eeprom_c_:13): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents));
+			RT_TRACE(_module_hal_init_c_, _drv_emerg_, ("14: mp_query_drv_var(_module_hal_init_c_:14): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents));
+			RT_TRACE(_module_hci_hal_init_c_, _drv_emerg_, ("15: mp_query_drv_var(_module_hci_hal_init_c_:15): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents));
+			RT_TRACE(_module_rtl871x_ioctl_c_, _drv_emerg_, ("16: mp_query_drv_var(_module_rtl871x_ioctl_c_:16): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents));
+			RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_emerg_, ("17: mp_query_drv_var(_module_rtl871x_ioctl_set_c_:17): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents));
+			RT_TRACE(_module_rtl871x_ioctl_query_c_, _drv_emerg_, ("18: mp_query_drv_var(_module_rtl871x_ioctl_query_c_:18): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents));
+			RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_emerg_, ("19: mp_query_drv_var(_module_rtl871x_pwrctrl_c_:19): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents));
+			RT_TRACE(_module_hci_intfs_c_, _drv_emerg_, ("20: mp_query_drv_var(_module_hci_intfs_c_:20): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents));
+			RT_TRACE(_module_hci_ops_c_, _drv_emerg_, ("21: mp_query_drv_var(_module_hci_ops_c_:21): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents));
+			RT_TRACE(_module_osdep_service_c_, _drv_emerg_, ("22: mp_query_drv_var(_module_osdep_service_c_:22): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents));
+			RT_TRACE(_module_mp_, _drv_emerg_, ("23: mp_query_drv_var(_module_mp_:23): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents));
+			RT_TRACE(_module_hci_ops_os_c_, _drv_emerg_, ("24: mp_query_drv_var(_module_hci_ops_os_c_:24): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents));
+			var=(u32)(GlobalDebugComponents);
+			//GlobalDebugComponents=padapter->registrypriv.dbg_component;
+			RT_TRACE(0xffffffff, _drv_emerg_, (" ==mp_query_drv_var(_module_mp_): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents));
+
+		}
+	}
+	else{
+		RT_TRACE(_module_mp_, _drv_emerg_, ("\n mp_query_drv_var: offset(%d) >110\n",offset));
+	}
+#endif
+#endif
+
+	return var;
+#else
+	return 0;
+#endif
+}
+
+NDIS_STATUS oid_rt_pro_query_dr_variable_hdl(struct oid_par_priv *poid_par_priv)
+{
+#if 0
+	PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	_irqL oldirql;
+	NDIS_STATUS status = NDIS_STATUS_SUCCESS;
+
+	DR_VARIABLE_STRUCT *pdrv_var;
+
+
+	if (poid_par_priv->type_of_oid != QUERY_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	*poid_par_priv->bytes_needed = sizeof(DR_VARIABLE_STRUCT);
+	if (poid_par_priv->information_buf_len < *poid_par_priv->bytes_needed)
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("+Query Information, OID_RT_PRO_QUERY_DR_VARIABLE\n"));
+
+	pdrv_var = (struct _DR_VARIABLE_STRUCT_ *)poid_par_priv->information_buf;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	pdrv_var->variable = mp_query_drv_var(Adapter, pdrv_var->offset, pdrv_var->variable);
+	_irqlevel_changed_(&oldirql, RAISE);
+
+	*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+
+	RT_TRACE(_module_mp_, _drv_notice_,
+		 ("-oid_rt_pro_query_dr_variable_hdl: offset=0x%x valule=0x%x\n",
+		  pdrv_var->offset, pdrv_var->variable));
+
+	return status;
+#else
+	return 0;
+#endif
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_rx_packet_type_hdl(struct oid_par_priv *poid_par_priv)
+{
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+
+	RT_TRACE(_module_mp_, _drv_err_, ("oid_rt_pro_rx_packet_type_hdl...................\n"));
+#if 0
+
+	if (poid_par_priv->information_buf_len < sizeof (UCHAR)) {
+		status = NDIS_STATUS_INVALID_LENGTH;
+		*poid_par_priv->bytes_needed = sizeof(UCHAR);
+		return status;
+	}
+
+	if (poid_par_priv->type_of_oid == SET_OID) {
+		Adapter->mppriv.rx_with_status = *(UCHAR *) poid_par_priv->information_buf;
+		RT_TRACE(_module_rtl871x_ioctl_c_,_drv_err_, ("Query Information, OID_RT_PRO_RX_PACKET_TYPE:%d \n",\
+												Adapter->mppriv.rx_with_status));
+
+		//*(u32 *)&Adapter->eeprompriv.mac_addr[0]=rtw_read32(Adapter, 0x10250050);
+		//*(u16 *)&Adapter->eeprompriv.mac_addr[4]=rtw_read16(Adapter, 0x10250054);
+		RT_TRACE(_module_rtl871x_ioctl_c_,_drv_err_,("MAC addr=0x%x:0x%x:0x%x:0x%x:0x%x:0x%x  \n",
+			Adapter->eeprompriv.mac_addr[0],Adapter->eeprompriv.mac_addr[1],Adapter->eeprompriv.mac_addr[2],\
+			Adapter->eeprompriv.mac_addr[3],Adapter->eeprompriv.mac_addr[4],Adapter->eeprompriv.mac_addr[5]));
+
+	}
+	else {
+		*(UCHAR *) poid_par_priv->information_buf = Adapter->mppriv.rx_with_status;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+
+		RT_TRACE(_module_rtl871x_ioctl_c_,_drv_err_, ("Query Information, OID_RT_PRO_RX_PACKET_TYPE:%d \n", \
+												Adapter->mppriv.rx_with_status));
+
+		//*(u32 *)&Adapter->eeprompriv.mac_addr[0]=rtw_read32(Adapter, 0x10250050);
+		//*(u16 *)&Adapter->eeprompriv.mac_addr[4]=rtw_read16(Adapter, 0x10250054);
+		RT_TRACE(_module_rtl871x_ioctl_c_,_drv_err_,("MAC addr=0x%x:0x%x:0x%x:0x%x:0x%x:0x%x  \n",
+			Adapter->eeprompriv.mac_addr[0],Adapter->eeprompriv.mac_addr[1],Adapter->eeprompriv.mac_addr[2],\
+			Adapter->eeprompriv.mac_addr[3],Adapter->eeprompriv.mac_addr[4],Adapter->eeprompriv.mac_addr[5]));
+	}
+#endif
+
+	return NDIS_STATUS_SUCCESS;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_read_efuse_hdl(struct oid_par_priv *poid_par_priv)
+{
+	_irqL oldirql;
+	PEFUSE_ACCESS_STRUCT pefuse;
+	u8 *data;
+	u16 addr = 0, cnts = 0, max_available_size = 0;
+	NDIS_STATUS status = NDIS_STATUS_SUCCESS;
+	PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	if (poid_par_priv->type_of_oid != QUERY_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	if (poid_par_priv->information_buf_len < sizeof(EFUSE_ACCESS_STRUCT))
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	pefuse = (PEFUSE_ACCESS_STRUCT)poid_par_priv->information_buf;
+	addr = pefuse->start_addr;
+	cnts = pefuse->cnts;
+	data = pefuse->data;
+
+	RT_TRACE(_module_mp_, _drv_notice_,
+		("+oid_rt_pro_read_efuse_hd: buf_len=%ld addr=%d cnts=%d\n",
+		 poid_par_priv->information_buf_len, addr, cnts));
+
+	EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE);
+
+	if ((addr + cnts) > max_available_size) {
+		RT_TRACE(_module_mp_, _drv_err_, ("!oid_rt_pro_read_efuse_hdl: parameter error!\n"));
+		return NDIS_STATUS_NOT_ACCEPTED;
+	}
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	if (rtw_efuse_access(Adapter, _FALSE, addr, cnts, data) == _FAIL) {
+		RT_TRACE(_module_mp_, _drv_err_, ("!oid_rt_pro_read_efuse_hdl: rtw_efuse_access FAIL!\n"));
+		status = NDIS_STATUS_FAILURE;
+	} else
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+	_irqlevel_changed_(&oldirql, RAISE);
+
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_write_efuse_hdl(struct oid_par_priv *poid_par_priv)
+{
+
+	_irqL oldirql;
+	PEFUSE_ACCESS_STRUCT pefuse;
+	u8 *data;
+	u16 addr = 0, cnts = 0, max_available_size = 0;
+	NDIS_STATUS status = NDIS_STATUS_SUCCESS;
+	PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+
+_func_enter_;
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	pefuse = (PEFUSE_ACCESS_STRUCT)poid_par_priv->information_buf;
+	addr = pefuse->start_addr;
+	cnts = pefuse->cnts;
+	data = pefuse->data;
+
+	RT_TRACE(_module_mp_, _drv_notice_,
+		 ("+oid_rt_pro_write_efuse_hdl: buf_len=%ld addr=0x%04x cnts=%d\n",
+		  poid_par_priv->information_buf_len, addr, cnts));
+
+	EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE);
+
+	if ((addr + cnts) > max_available_size) {
+		RT_TRACE(_module_mp_, _drv_err_, ("!oid_rt_pro_write_efuse_hdl: parameter error"));
+		return NDIS_STATUS_NOT_ACCEPTED;
+	}
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	if (rtw_efuse_access(Adapter, _TRUE, addr, cnts, data) == _FAIL)
+		status = NDIS_STATUS_FAILURE;
+	_irqlevel_changed_(&oldirql, RAISE);
+
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_rw_efuse_pgpkt_hdl(struct oid_par_priv *poid_par_priv)
+{
+	_irqL		oldirql;
+	PPGPKT_STRUCT	ppgpkt;
+	u8		tmpidx;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+//	RT_TRACE(_module_mp_, _drv_info_, ("+oid_rt_pro_rw_efuse_pgpkt_hdl\n"));
+
+	*poid_par_priv->bytes_rw = 0;
+
+	if (poid_par_priv->information_buf_len < sizeof(PGPKT_STRUCT))
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	ppgpkt = (PPGPKT_STRUCT)poid_par_priv->information_buf;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+
+	if (poid_par_priv->type_of_oid == QUERY_OID)
+	{
+		RT_TRACE(_module_mp_, _drv_notice_,
+			("oid_rt_pro_rw_efuse_pgpkt_hdl: Read offset=0x%x\n",\
+			ppgpkt->offset));
+
+		Efuse_PowerSwitch(Adapter, _FALSE, _TRUE);
+		if (Efuse_PgPacketRead(Adapter, ppgpkt->offset, ppgpkt->data, _FALSE) == _TRUE)
+			*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+		else
+			status = NDIS_STATUS_FAILURE;
+		Efuse_PowerSwitch(Adapter, _FALSE, _FALSE);
+	} else {
+		RT_TRACE(_module_mp_, _drv_notice_,
+			("oid_rt_pro_rw_efuse_pgpkt_hdl: Write offset=0x%x word_en=0x%x\n",\
+			ppgpkt->offset, ppgpkt->word_en));
+
+		Efuse_PowerSwitch(Adapter, _TRUE, _TRUE);
+		if (Efuse_PgPacketWrite(Adapter, ppgpkt->offset, ppgpkt->word_en, ppgpkt->data, _FALSE) == _TRUE)
+			*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+		else
+			status = NDIS_STATUS_FAILURE;
+		Efuse_PowerSwitch(Adapter, _TRUE, _FALSE);
+	}
+
+	_irqlevel_changed_(&oldirql, RAISE);
+
+	RT_TRACE(_module_mp_, _drv_info_,
+		 ("-oid_rt_pro_rw_efuse_pgpkt_hdl: status=0x%08X\n", status));
+
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_get_efuse_current_size_hdl(struct oid_par_priv *poid_par_priv)
+{
+	_irqL		oldirql;
+	u16 size;
+	u8 ret;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+_func_enter_;
+
+	if (poid_par_priv->type_of_oid != QUERY_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	if (poid_par_priv->information_buf_len <sizeof(u32))
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	ret = efuse_GetCurrentSize(Adapter, &size);
+	_irqlevel_changed_(&oldirql, RAISE);
+	if (ret == _SUCCESS) {
+		*(u32*)poid_par_priv->information_buf = size;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+	} else
+		status = NDIS_STATUS_FAILURE;
+
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_get_efuse_max_size_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+	u16	max_size;
+
+_func_enter_;
+
+	if (poid_par_priv->type_of_oid != QUERY_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	if (poid_par_priv->information_buf_len < sizeof(u32))
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	*(u32*)poid_par_priv->information_buf = efuse_GetMaxSize(Adapter);
+	*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+
+	RT_TRACE(_module_mp_, _drv_info_,
+		 ("-oid_rt_get_efuse_max_size_hdl: size=%d status=0x%08X\n",
+		  *(int*)poid_par_priv->information_buf, status));
+
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_efuse_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS	status;
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_info_, ("+oid_rt_pro_efuse_hdl\n"));
+
+	if (poid_par_priv->type_of_oid == QUERY_OID)
+		status = oid_rt_pro_read_efuse_hdl(poid_par_priv);
+	else
+		status = oid_rt_pro_write_efuse_hdl(poid_par_priv);
+
+	RT_TRACE(_module_mp_, _drv_info_, ("-oid_rt_pro_efuse_hdl: status=0x%08X\n", status));
+
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_pro_efuse_map_hdl(struct oid_par_priv *poid_par_priv)
+{
+	_irqL		oldirql;
+	u8		*data;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+	u16	mapLen=0;
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_efuse_map_hdl\n"));
+
+	EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE);
+
+	*poid_par_priv->bytes_rw = 0;
+
+	if (poid_par_priv->information_buf_len < mapLen)
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	data = (u8*)poid_par_priv->information_buf;
+
+	_irqlevel_changed_(&oldirql, LOWER);
+
+	if (poid_par_priv->type_of_oid == QUERY_OID)
+	{
+		RT_TRACE(_module_mp_, _drv_info_,
+			("oid_rt_pro_efuse_map_hdl: READ\n"));
+
+		if (rtw_efuse_map_read(Adapter, 0, mapLen, data) == _SUCCESS)
+			*poid_par_priv->bytes_rw = mapLen;
+		else {
+			RT_TRACE(_module_mp_, _drv_err_,
+				("oid_rt_pro_efuse_map_hdl: READ fail\n"));
+			status = NDIS_STATUS_FAILURE;
+		}
+	} else {
+		// SET_OID
+		RT_TRACE(_module_mp_, _drv_info_,
+			("oid_rt_pro_efuse_map_hdl: WRITE\n"));
+
+		if (rtw_efuse_map_write(Adapter, 0, mapLen, data) == _SUCCESS)
+			*poid_par_priv->bytes_rw = mapLen;
+		else {
+			RT_TRACE(_module_mp_, _drv_err_,
+				("oid_rt_pro_efuse_map_hdl: WRITE fail\n"));
+			status = NDIS_STATUS_FAILURE;
+		}
+	}
+
+	_irqlevel_changed_(&oldirql, RAISE);
+
+	RT_TRACE(_module_mp_, _drv_info_,
+		 ("-oid_rt_pro_efuse_map_hdl: status=0x%08X\n", status));
+
+_func_exit_;
+
+	return status;
+}
+
+NDIS_STATUS oid_rt_set_crystal_cap_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+#if 0
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	_irqL		oldirql;
+
+	u32		crystal_cap = 0;
+
+_func_enter_;
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	if (poid_par_priv->information_buf_len <sizeof(u32))
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	crystal_cap = *((u32*)poid_par_priv->information_buf);//4
+	if (crystal_cap > 0xf)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	Adapter->mppriv.curr_crystalcap = crystal_cap;
+
+	_irqlevel_changed_(&oldirql,LOWER);
+	SetCrystalCap(Adapter);
+	_irqlevel_changed_(&oldirql,RAISE);
+
+_func_exit_;
+
+#endif
+	return status;
+}
+
+NDIS_STATUS oid_rt_set_rx_packet_type_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+	_irqL		oldirql;
+	u8		rx_pkt_type;
+	u32		rcr_val32;
+
+_func_enter_;
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_set_rx_packet_type_hdl\n"));
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	if (poid_par_priv->information_buf_len < sizeof(u8))
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	rx_pkt_type = *((u8*)poid_par_priv->information_buf);//4
+
+	RT_TRACE(_module_mp_, _drv_info_, ("rx_pkt_type: %x\n",rx_pkt_type ));
+#if 0
+	_irqlevel_changed_(&oldirql, LOWER);
+#if 0
+	rcr_val8 = rtw_read8(Adapter, 0x10250048);//RCR
+	rcr_val8 &= ~(RCR_AB|RCR_AM|RCR_APM|RCR_AAP);
+
+	if(rx_pkt_type == RX_PKT_BROADCAST){
+		rcr_val8 |= (RCR_AB | RCR_ACRC32 );
+	}
+	else if(rx_pkt_type == RX_PKT_DEST_ADDR){
+		rcr_val8 |= (RCR_AAP| RCR_AM |RCR_ACRC32);
+	}
+	else if(rx_pkt_type == RX_PKT_PHY_MATCH){
+		rcr_val8 |= (RCR_APM|RCR_ACRC32);
+	}
+	else{
+		rcr_val8 &= ~(RCR_AAP|RCR_APM|RCR_AM|RCR_AB|RCR_ACRC32);
+	}
+	rtw_write8(Adapter, 0x10250048,rcr_val8);
+#else
+	rcr_val32 = rtw_read32(Adapter, RCR);//RCR = 0x10250048
+	rcr_val32 &= ~(RCR_CBSSID|RCR_AB|RCR_AM|RCR_APM|RCR_AAP);
+#if 0
+	if(rx_pkt_type == RX_PKT_BROADCAST){
+		rcr_val32 |= (RCR_AB|RCR_AM|RCR_APM|RCR_AAP|RCR_ACRC32);
+	}
+	else if(rx_pkt_type == RX_PKT_DEST_ADDR){
+		//rcr_val32 |= (RCR_CBSSID|RCR_AAP|RCR_AM|RCR_ACRC32);
+		rcr_val32 |= (RCR_CBSSID|RCR_APM|RCR_ACRC32);
+	}
+	else if(rx_pkt_type == RX_PKT_PHY_MATCH){
+		rcr_val32 |= (RCR_APM|RCR_ACRC32);
+		//rcr_val32 |= (RCR_AAP|RCR_ACRC32);
+	}
+	else{
+		rcr_val32 &= ~(RCR_AAP|RCR_APM|RCR_AM|RCR_AB|RCR_ACRC32);
+	}
+#else
+	switch (rx_pkt_type)
+	{
+		case RX_PKT_BROADCAST :
+			rcr_val32 |= (RCR_AB|RCR_AM|RCR_APM|RCR_AAP|RCR_ACRC32);
+			break;
+		case RX_PKT_DEST_ADDR :
+			rcr_val32 |= (RCR_AB|RCR_AM|RCR_APM|RCR_AAP|RCR_ACRC32);
+			break;
+		case RX_PKT_PHY_MATCH:
+			rcr_val32 |= (RCR_APM|RCR_ACRC32);
+			break;
+		default:
+			rcr_val32 &= ~(RCR_AAP|RCR_APM|RCR_AM|RCR_AB|RCR_ACRC32);
+			break;
+	}
+
+	if (rx_pkt_type == RX_PKT_DEST_ADDR) {
+		Adapter->mppriv.check_mp_pkt = 1;
+	} else {
+		Adapter->mppriv.check_mp_pkt = 0;
+	}
+#endif
+	rtw_write32(Adapter, RCR, rcr_val32);
+
+#endif
+	_irqlevel_changed_(&oldirql, RAISE);
+#endif
+_func_exit_;
+
+	return status;
+}
+
+NDIS_STATUS oid_rt_pro_set_tx_agc_offset_hdl(struct oid_par_priv *poid_par_priv)
+{
+#if 0
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	_irqL		oldirql;
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+
+	u32 		txagc;
+
+_func_enter_;
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	if (poid_par_priv->information_buf_len < sizeof(u32))
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	txagc = *(u32*)poid_par_priv->information_buf;
+	RT_TRACE(_module_mp_, _drv_info_,
+		 ("oid_rt_pro_set_tx_agc_offset_hdl: 0x%08x\n", txagc));
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	SetTxAGCOffset(Adapter, txagc);
+	_irqlevel_changed_(&oldirql, RAISE);
+
+_func_exit_;
+
+	return status;
+#else
+	return 0;
+#endif
+}
+
+NDIS_STATUS oid_rt_pro_set_pkt_test_mode_hdl(struct oid_par_priv *poid_par_priv)
+{
+#if 0
+	PADAPTER		Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+
+	struct mlme_priv	*pmlmepriv = &Adapter->mlmepriv;
+	struct mp_priv		*pmppriv = &Adapter->mppriv;
+	u32 			type;
+
+_func_enter_;
+
+	if (poid_par_priv->type_of_oid != SET_OID)
+		return NDIS_STATUS_NOT_ACCEPTED;
+
+	if (poid_par_priv->information_buf_len <sizeof(u32))
+		return NDIS_STATUS_INVALID_LENGTH;
+
+	type = *(u32*)poid_par_priv->information_buf;
+
+	if (_LOOPBOOK_MODE_ == type) {
+		pmppriv->mode = type;
+		set_fwstate(pmlmepriv, WIFI_MP_LPBK_STATE); //append txdesc
+		RT_TRACE(_module_mp_, _drv_info_, ("test mode change to loopback mode:0x%08x.\n", get_fwstate(pmlmepriv)));
+	} else if (_2MAC_MODE_ == type){
+		pmppriv->mode = type;
+		_clr_fwstate_(pmlmepriv, WIFI_MP_LPBK_STATE);
+		RT_TRACE(_module_mp_, _drv_info_, ("test mode change to 2mac mode:0x%08x.\n", get_fwstate(pmlmepriv)));
+	} else
+		status = NDIS_STATUS_NOT_ACCEPTED;
+
+_func_exit_;
+
+	return status;
+#else
+	return 0;
+#endif
+}
+
+unsigned int mp_ioctl_xmit_packet_hdl(struct oid_par_priv *poid_par_priv)
+{
+	PMP_XMIT_PARM pparm;
+	PADAPTER padapter;
+	struct mp_priv *pmp_priv;
+	struct pkt_attrib *pattrib;
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("+%s\n", __func__));
+
+	pparm = (PMP_XMIT_PARM)poid_par_priv->information_buf;
+	padapter = (PADAPTER)poid_par_priv->adapter_context;
+	pmp_priv = &padapter->mppriv;
+
+	if (poid_par_priv->type_of_oid == QUERY_OID) {
+		pparm->enable = !pmp_priv->tx.stop;
+		pparm->count = pmp_priv->tx.sended;
+	} else {
+		if (pparm->enable == 0) {
+			pmp_priv->tx.stop = 1;
+		} else if (pmp_priv->tx.stop == 1) {
+			pmp_priv->tx.stop = 0;
+			pmp_priv->tx.count = pparm->count;
+			pmp_priv->tx.payload = pparm->payload_type;
+			pattrib = &pmp_priv->tx.attrib;
+			pattrib->pktlen = pparm->length;
+			_rtw_memcpy(pattrib->dst, pparm->da, ETH_ALEN);
+			SetPacketTx(padapter);
+		} else
+			return NDIS_STATUS_FAILURE;
+	}
+
+	return NDIS_STATUS_SUCCESS;
+}
+
+#if 0
+unsigned int mp_ioctl_xmit_packet_hdl(struct oid_par_priv *poid_par_priv)
+{
+	unsigned char *pframe, *pmp_pkt;
+	struct ethhdr *pethhdr;
+	struct pkt_attrib *pattrib;
+	struct ieee80211_hdr *pwlanhdr;
+	unsigned short *fctrl;
+	int llc_sz, payload_len;
+	struct mp_xmit_frame *pxframe=  NULL;
+	struct mp_xmit_packet *pmp_xmitpkt = (struct mp_xmit_packet*)param;
+	u8 addr3[] = {0x02, 0xE0, 0x4C, 0x87, 0x66, 0x55};
+
+//	DBG_8192C("+mp_ioctl_xmit_packet_hdl\n");
+
+	pxframe = alloc_mp_xmitframe(&padapter->mppriv);
+	if (pxframe == NULL)
+	{
+		DEBUG_ERR(("Can't alloc pmpframe %d:%s\n", __LINE__, __FILE__));
+		return -1;
+	}
+
+	//mp_xmit_pkt
+	payload_len = pmp_xmitpkt->len - 14;
+	pmp_pkt = (unsigned char*)pmp_xmitpkt->mem;
+	pethhdr = (struct ethhdr *)pmp_pkt;
+
+	//DBG_8192C("payload_len=%d, pkt_mem=0x%x\n", pmp_xmitpkt->len, (void*)pmp_xmitpkt->mem);
+
+	//DBG_8192C("pxframe=0x%x\n", (void*)pxframe);
+	//DBG_8192C("pxframe->mem=0x%x\n", (void*)pxframe->mem);
+
+	//update attribute
+	pattrib = &pxframe->attrib;
+	memset((u8 *)(pattrib), 0, sizeof (struct pkt_attrib));
+	pattrib->pktlen = pmp_xmitpkt->len;
+	pattrib->ether_type = ntohs(pethhdr->h_proto);
+	pattrib->hdrlen = 24;
+	pattrib->nr_frags = 1;
+	pattrib->priority = 0;
+#ifndef CONFIG_MP_LINUX
+	if(IS_MCAST(pethhdr->h_dest))
+		pattrib->mac_id = 4;
+	else
+		pattrib->mac_id = 5;
+#else
+	pattrib->mac_id = 5;
+#endif
+
+	//
+	memset(pxframe->mem, 0 , WLANHDR_OFFSET);
+	pframe = (u8 *)(pxframe->mem) + WLANHDR_OFFSET;
+
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+	SetFrameSubType(pframe, WIFI_DATA);
+
+	_rtw_memcpy(pwlanhdr->addr1, pethhdr->h_dest, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, pethhdr->h_source, ETH_ALEN);
+
+	_rtw_memcpy(pwlanhdr->addr3, addr3, ETH_ALEN);
+
+	pwlanhdr->seq_ctl = 0;
+	pframe += pattrib->hdrlen;
+
+	llc_sz= rtw_put_snap(pframe, pattrib->ether_type);
+	pframe += llc_sz;
+
+	_rtw_memcpy(pframe, (void*)(pmp_pkt+14),  payload_len);
+
+	pattrib->last_txcmdsz = pattrib->hdrlen + llc_sz + payload_len;
+
+	DEBUG_INFO(("issuing mp_xmit_frame, tx_len=%d, ether_type=0x%x\n", pattrib->last_txcmdsz, pattrib->ether_type));
+	xmit_mp_frame(padapter, pxframe);
+
+	return _SUCCESS;
+}
+#endif
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_set_power_down_hdl(struct oid_par_priv *poid_par_priv)
+{
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	_irqL		oldirql;
+	u8		bpwrup;
+
+_func_enter_;
+
+	if (poid_par_priv->type_of_oid != SET_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	RT_TRACE(_module_mp_, _drv_info_,
+		 ("\n ===> Setoid_rt_set_power_down_hdl.\n"));
+
+	_irqlevel_changed_(&oldirql, LOWER);
+
+	bpwrup = *(u8 *)poid_par_priv->information_buf;
+	//CALL  the power_down function
+#ifdef PLATFORM_LINUX
+#ifdef CONFIG_SDIO_HCI
+	dev_power_down(Adapter,bpwrup);
+#endif
+#endif
+	_irqlevel_changed_(&oldirql, RAISE);
+
+	//DEBUG_ERR(("\n <=== Query OID_RT_PRO_READ_REGISTER.
+	//	Add:0x%08x Width:%d Value:0x%08x\n",RegRWStruct->offset,RegRWStruct->width,RegRWStruct->value));
+
+_func_exit_;
+
+	return status;
+}
+//------------------------------------------------------------------------------
+NDIS_STATUS oid_rt_get_power_mode_hdl(struct oid_par_priv *poid_par_priv)
+{
+#if 0
+	NDIS_STATUS	status = NDIS_STATUS_SUCCESS;
+	PADAPTER	Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+//	_irqL		oldirql;
+
+_func_enter_;
+
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+	if (poid_par_priv->information_buf_len < sizeof(u32)) {
+		status = NDIS_STATUS_INVALID_LENGTH;
+		return status;
+	}
+
+	RT_TRACE(_module_mp_, _drv_info_,
+		 ("\n ===> oid_rt_get_power_mode_hdl.\n"));
+
+//	_irqlevel_changed_(&oldirql, LOWER);
+	*(int*)poid_par_priv->information_buf = Adapter->registrypriv.low_power ? POWER_LOW : POWER_NORMAL;
+	*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+//	_irqlevel_changed_(&oldirql, RAISE);
+
+_func_exit_;
+
+	return status;
+#else
+	return 0;
+#endif
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_p2p.c linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_p2p.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_p2p.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_p2p.c	2017-09-23 03:42:49.898675431 +0800
@@ -0,0 +1,2792 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _RTW_P2P_C_
+
+#include <drv_types.h>
+#include <rtw_p2p.h>
+#include <wifi.h>
+
+#ifdef CONFIG_P2P
+
+
+static u32 go_add_group_info_attr(struct wifidirect_info *pwdinfo, u8 *pbuf)
+{
+	_irqL irqL;
+	_list	*phead, *plist;
+	u32 len=0;
+	u16 attr_len = 0;
+	u8 tmplen, *pdata_attr, *pstart, *pcur;
+	struct sta_info *psta = NULL;
+	_adapter *padapter = pwdinfo->padapter;
+	struct sta_priv *pstapriv = &padapter->stapriv;
+
+	DBG_871X("%s\n", __FUNCTION__);
+
+	pdata_attr = rtw_zmalloc(MAX_P2P_IE_LEN);
+
+	pstart = pdata_attr;
+	pcur = pdata_attr;
+
+	_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL);
+	phead = &pstapriv->asoc_list;
+	plist = get_next(phead);
+
+	//look up sta asoc_queue
+	while ((rtw_end_of_queue_search(phead, plist)) == _FALSE)	
+	{		
+		psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list);
+		
+		plist = get_next(plist);
+		
+
+		if(psta->is_p2p_device)
+		{
+			tmplen = 0;
+			
+			pcur++;
+		
+			//P2P device address
+			_rtw_memcpy(pcur, psta->dev_addr, ETH_ALEN);
+			pcur += ETH_ALEN;
+
+			//P2P interface address
+			_rtw_memcpy(pcur, psta->hwaddr, ETH_ALEN);
+			pcur += ETH_ALEN;
+
+			*pcur = psta->dev_cap;
+			pcur++;
+
+			//*(u16*)(pcur) = cpu_to_be16(psta->config_methods);
+			RTW_PUT_BE16(pcur, psta->config_methods);
+			pcur += 2;
+
+			_rtw_memcpy(pcur, psta->primary_dev_type, 8);
+			pcur += 8;
+
+			*pcur = psta->num_of_secdev_type;
+			pcur++;
+
+			_rtw_memcpy(pcur, psta->secdev_types_list, psta->num_of_secdev_type*8);
+			pcur += psta->num_of_secdev_type*8;
+			
+			if(psta->dev_name_len>0)
+			{
+				//*(u16*)(pcur) = cpu_to_be16( WPS_ATTR_DEVICE_NAME );
+				RTW_PUT_BE16(pcur, WPS_ATTR_DEVICE_NAME);
+				pcur += 2;
+
+				//*(u16*)(pcur) = cpu_to_be16( psta->dev_name_len );
+				RTW_PUT_BE16(pcur, psta->dev_name_len);
+				pcur += 2;
+
+				_rtw_memcpy(pcur, psta->dev_name, psta->dev_name_len);
+				pcur += psta->dev_name_len;
+			}
+
+
+			tmplen = (u8)(pcur-pstart);
+			
+			*pstart = (tmplen-1);
+
+			attr_len += tmplen;
+
+			//pstart += tmplen;
+			pstart = pcur;
+			
+		}
+		
+		
+	}
+	_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL);
+
+	if(attr_len>0)
+	{
+		len = rtw_set_p2p_attr_content(pbuf, P2P_ATTR_GROUP_INFO, attr_len, pdata_attr);
+	}
+
+	rtw_mfree(pdata_attr, MAX_P2P_IE_LEN);
+
+	return len;
+
+}
+
+static void issue_group_disc_req(struct wifidirect_info *pwdinfo, u8 *da)
+{
+	struct xmit_frame			*pmgntframe;
+	struct pkt_attrib			*pattrib;
+	unsigned char					*pframe;
+	struct ieee80211_hdr	*pwlanhdr;
+	unsigned short				*fctrl;
+	_adapter *padapter = pwdinfo->padapter;
+	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);	
+	unsigned char category = WLAN_CATEGORY_P2P;//P2P action frame	
+	u32	p2poui = cpu_to_be32(P2POUI);
+	u8	oui_subtype = P2P_GO_DISC_REQUEST;
+	u8	dialogToken=0;
+
+	DBG_871X("[%s]\n", __FUNCTION__);
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(padapter, pattrib);
+
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+
+	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+
+	_rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, pwdinfo->interface_addr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, pwdinfo->interface_addr, ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+	pmlmeext->mgnt_seq++;
+	SetFrameSubType(pframe, WIFI_ACTION);
+
+	pframe += sizeof(struct ieee80211_hdr_3addr);
+	pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr);
+
+	//Build P2P action frame header
+	pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));	
+	pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen));	
+	pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen));		
+
+	//there is no IE in this P2P action frame
+
+	pattrib->last_txcmdsz = pattrib->pktlen;
+
+	dump_mgntframe(padapter, pmgntframe);
+
+}
+
+static void issue_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *da, u8 status, u8 dialogToken)
+{	
+	struct xmit_frame			*pmgntframe;
+	struct pkt_attrib			*pattrib;
+	unsigned char					*pframe;
+	struct ieee80211_hdr	*pwlanhdr;
+	unsigned short				*fctrl;
+	_adapter *padapter = pwdinfo->padapter;
+	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);	
+	unsigned char category = WLAN_CATEGORY_PUBLIC;
+	u8			action = P2P_PUB_ACTION_ACTION;
+	u32			p2poui = cpu_to_be32(P2POUI);
+	u8			oui_subtype = P2P_DEVDISC_RESP;
+	u8 p2pie[8] = { 0x00 };
+	u32 p2pielen = 0;	
+
+	DBG_871X("[%s]\n", __FUNCTION__);
+	
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(padapter, pattrib);
+
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+
+	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+
+	_rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, pwdinfo->device_addr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, pwdinfo->device_addr, ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+	pmlmeext->mgnt_seq++;
+	SetFrameSubType(pframe, WIFI_ACTION);
+
+	pframe += sizeof(struct ieee80211_hdr_3addr);
+	pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr);
+
+	//Build P2P public action frame header
+	pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen));	
+	pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen));		
+
+
+	//Build P2P IE
+	//	P2P OUI
+	p2pielen = 0;
+	p2pie[ p2pielen++ ] = 0x50;
+	p2pie[ p2pielen++ ] = 0x6F;
+	p2pie[ p2pielen++ ] = 0x9A;
+	p2pie[ p2pielen++ ] = 0x09;	//	WFA P2P v1.0
+
+	// P2P_ATTR_STATUS
+	p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_STATUS, 1, &status);
+	
+	pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, p2pie, &pattrib->pktlen);	
+
+	pattrib->last_txcmdsz = pattrib->pktlen;
+
+	dump_mgntframe(padapter, pmgntframe);
+
+}
+
+static void issue_p2p_provision_resp(struct wifidirect_info *pwdinfo, u8* raddr, u8* frame_body, u16 config_method)
+{
+	_adapter *padapter = pwdinfo->padapter;
+	unsigned char category = WLAN_CATEGORY_PUBLIC;
+	u8			action = P2P_PUB_ACTION_ACTION;
+	u8			dialogToken = frame_body[7];	//	The Dialog Token of provisioning discovery request frame.
+	u32			p2poui = cpu_to_be32(P2POUI);
+	u8			oui_subtype = P2P_PROVISION_DISC_RESP;
+	u8			wpsie[ 100 ] = { 0x00 };
+	u8			wpsielen = 0;
+#ifdef CONFIG_WFD
+	u32					wfdielen = 0;
+#endif //CONFIG_WFD		
+	
+	struct xmit_frame			*pmgntframe;
+	struct pkt_attrib			*pattrib;
+	unsigned char					*pframe;
+	struct ieee80211_hdr	*pwlanhdr;
+	unsigned short				*fctrl;
+	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(padapter, pattrib);
+
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+
+	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+
+	_rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+	pmlmeext->mgnt_seq++;
+	SetFrameSubType(pframe, WIFI_ACTION);
+
+	pframe += sizeof(struct ieee80211_hdr_3addr);
+	pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr);
+
+	pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen));	
+	pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen));		
+
+	wpsielen = 0;
+	//	WPS OUI
+	//*(u32*) ( wpsie ) = cpu_to_be32( WPSOUI );
+	RTW_PUT_BE32(wpsie, WPSOUI);
+	wpsielen += 4;
+
+#if 0
+	//	WPS version
+	//	Type:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 );
+	wpsielen += 2;
+
+	//	Length:
+	*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 );
+	wpsielen += 2;
+
+	//	Value:
+	wpsie[wpsielen++] = WPS_VERSION_1;	//	Version 1.0
+#endif
+
+	//	Config Method
+	//	Type:
+	//*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD );
+	RTW_PUT_BE16(wpsie + wpsielen, WPS_ATTR_CONF_METHOD);
+	wpsielen += 2;
+
+	//	Length:
+	//*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 );
+	RTW_PUT_BE16(wpsie + wpsielen, 0x0002);
+	wpsielen += 2;
+
+	//	Value:
+	//*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( config_method );
+	RTW_PUT_BE16(wpsie + wpsielen, config_method);
+	wpsielen += 2;
+
+	pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen );	
+
+#ifdef CONFIG_WFD
+	wfdielen = build_provdisc_resp_wfd_ie(pwdinfo, pframe);
+	pframe += wfdielen;
+	pattrib->pktlen += wfdielen;
+#endif //CONFIG_WFD
+
+	pattrib->last_txcmdsz = pattrib->pktlen;
+
+	dump_mgntframe(padapter, pmgntframe);
+
+	return;
+
+}
+
+static void issue_p2p_presence_resp(struct wifidirect_info *pwdinfo, u8 *da, u8 status, u8 dialogToken)
+{
+	struct xmit_frame			*pmgntframe;
+	struct pkt_attrib			*pattrib;
+	unsigned char					*pframe;
+	struct ieee80211_hdr	*pwlanhdr;
+	unsigned short				*fctrl;
+	_adapter *padapter = pwdinfo->padapter;
+	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);	
+	unsigned char category = WLAN_CATEGORY_P2P;//P2P action frame	
+	u32	p2poui = cpu_to_be32(P2POUI);
+	u8	oui_subtype = P2P_PRESENCE_RESPONSE;	
+	u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 };
+	u8 noa_attr_content[32] = { 0x00 };
+	u32 p2pielen = 0;
+
+	DBG_871X("[%s]\n", __FUNCTION__);
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(padapter, pattrib);
+
+	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
+
+	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+
+	_rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, pwdinfo->interface_addr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, pwdinfo->interface_addr, ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
+	pmlmeext->mgnt_seq++;
+	SetFrameSubType(pframe, WIFI_ACTION);
+
+	pframe += sizeof(struct ieee80211_hdr_3addr);
+	pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr);
+
+	//Build P2P action frame header
+	pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));	
+	pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen));	
+	pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen));	
+
+
+	//Add P2P IE header
+	//	P2P OUI
+	p2pielen = 0;
+	p2pie[ p2pielen++ ] = 0x50;
+	p2pie[ p2pielen++ ] = 0x6F;
+	p2pie[ p2pielen++ ] = 0x9A;
+	p2pie[ p2pielen++ ] = 0x09;	//	WFA P2P v1.0
+
+	//Add Status attribute in P2P IE 
+	p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_STATUS, 1, &status);
+
+	//Add NoA attribute in P2P IE
+	noa_attr_content[0] = 0x1;//index
+	noa_attr_content[1] = 0x0;//CTWindow and OppPS Parameters
+	
+	//todo: Notice of Absence Descriptor(s)
+	
+	p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_NOA, 2, noa_attr_content);
+
+
+
+	pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, p2pie, &(pattrib->pktlen));
+
+	
+	pattrib->last_txcmdsz = pattrib->pktlen;
+
+	dump_mgntframe(padapter, pmgntframe);
+
+}
+
+u32 build_beacon_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
+{
+	u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 };
+	u16 capability=0;
+	u32 len=0, p2pielen = 0;
+	
+
+	//	P2P OUI
+	p2pielen = 0;
+	p2pie[ p2pielen++ ] = 0x50;
+	p2pie[ p2pielen++ ] = 0x6F;
+	p2pie[ p2pielen++ ] = 0x9A;
+	p2pie[ p2pielen++ ] = 0x09;	//	WFA P2P v1.0
+
+
+	//	According to the P2P Specification, the beacon frame should contain 3 P2P attributes
+	//	1. P2P Capability
+	//	2. P2P Device ID
+	//	3. Notice of Absence ( NOA )	
+
+	//	P2P Capability ATTR
+	//	Type:
+	//	Length:
+	//	Value:
+	//	Device Capability Bitmap, 1 byte
+	//	Be able to participate in additional P2P Groups and
+	//	support the P2P Invitation Procedure	
+	//	Group Capability Bitmap, 1 byte	
+	capability = P2P_DEVCAP_INVITATION_PROC|P2P_DEVCAP_CLIENT_DISCOVERABILITY;
+	capability |=  ((P2P_GRPCAP_GO | P2P_GRPCAP_INTRABSS) << 8);
+	if(pwdinfo->p2p_state == P2P_STATE_PROVISIONING_ING)
+		capability |= (P2P_GRPCAP_GROUP_FORMATION<<8);
+
+	capability = cpu_to_le16(capability);
+
+	p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_CAPABILITY, 2, (u8*)&capability);
+
+	
+	// P2P Device ID ATTR
+	p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_DEVICE_ID, ETH_ALEN, pwdinfo->device_addr);
+
+	
+	// Notice of Absence ATTR
+	//	Type: 
+	//	Length:
+	//	Value:
+	
+	//go_add_noa_attr(pwdinfo);
+	
+	
+	pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len);
+	
+	
+	return len;
+	
+}
+
+#ifdef CONFIG_WFD
+u32 build_beacon_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
+{
+	u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 };
+	u32 len=0, wfdielen = 0;
+	_adapter *padapter = pwdinfo->padapter;
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	struct wifi_display_info*	pwfd_info = &padapter->wdinfo.wfd_info;
+
+	//	WFD OUI
+	wfdielen = 0;
+	wfdie[ wfdielen++ ] = 0x50;
+	wfdie[ wfdielen++ ] = 0x6F;
+	wfdie[ wfdielen++ ] = 0x9A;
+	wfdie[ wfdielen++ ] = 0x0A;	//	WFA WFD v1.0
+
+	//	Commented by Albert 20110812
+	//	According to the WFD Specification, the beacon frame should contain 4 WFD attributes
+	//	1. WFD Device Information
+	//	2. Associated BSSID
+	//	3. Coupled Sink Information
+
+
+	//	WFD Device Information ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 6;
+
+	//	Value1:
+	//	WFD device information
+	//	WFD primary sink + available for WFD session + WiFi Direct mode
+	RTW_PUT_BE16(wfdie + wfdielen, 0x0011);
+	wfdielen += 2;
+
+	//	Value2:
+	//	Session Management Control Port
+	//	Default TCP port for RTSP messages is 554
+	RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport );
+	wfdielen += 2;
+
+	//	Value3:
+	//	WFD Device Maximum Throughput
+	//	300Mbps is the maximum throughput
+	RTW_PUT_BE16(wfdie + wfdielen, 300);
+	wfdielen += 2;
+
+	//	Associated BSSID ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 6;
+
+	//	Value:
+	//	Associated BSSID
+	if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE )
+	{
+		_rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN );
+	}
+	else
+	{
+		_rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN );
+	}
+
+	wfdielen += ETH_ALEN;
+
+	//	Coupled Sink Information ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 1;
+
+	//	Value:
+	//	Coupled Sink Status bitmap
+	//	Not coupled/available for Coupling
+	wfdie[ wfdielen++ ] = 0;
+
+	pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len);
+
+	return len;
+	
+}
+
+u32 build_probe_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
+{
+	u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 };
+	u32 len=0, wfdielen = 0;
+	_adapter *padapter = pwdinfo->padapter;
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	struct wifi_display_info*	pwfd_info = &padapter->wdinfo.wfd_info;
+
+	//	WFD OUI
+	wfdielen = 0;
+	wfdie[ wfdielen++ ] = 0x50;
+	wfdie[ wfdielen++ ] = 0x6F;
+	wfdie[ wfdielen++ ] = 0x9A;
+	wfdie[ wfdielen++ ] = 0x0A;	//	WFA WFD v1.0
+
+	//	Commented by Albert 20110812
+	//	According to the WFD Specification, the probe request frame should contain 4 WFD attributes
+	//	1. WFD Device Information
+	//	2. Associated BSSID
+	//	3. Coupled Sink Information
+
+
+	//	WFD Device Information ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 6;
+
+	//	Value1:
+	//	WFD device information
+	//	WFD primary sink + available for WFD session + WiFi Direct mode
+	RTW_PUT_BE16(wfdie + wfdielen, 0x0011);
+	wfdielen += 2;
+
+	//	Value2:
+	//	Session Management Control Port
+	//	Default TCP port for RTSP messages is 554
+	RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport );
+	wfdielen += 2;
+
+	//	Value3:
+	//	WFD Device Maximum Throughput
+	//	300Mbps is the maximum throughput
+	RTW_PUT_BE16(wfdie + wfdielen, 300);
+	wfdielen += 2;
+
+	//	Associated BSSID ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 6;
+
+	//	Value:
+	//	Associated BSSID
+	if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE )
+	{
+		_rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN );
+	}
+	else
+	{
+		_rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN );
+	}
+
+	wfdielen += ETH_ALEN;
+
+	//	Coupled Sink Information ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 1;
+
+	//	Value:
+	//	Coupled Sink Status bitmap
+	//	Not coupled/available for Coupling
+	wfdie[ wfdielen++ ] = 0;
+
+	pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len);
+
+	return len;
+	
+}
+
+u32 build_probe_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
+{
+	u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 };
+	u32 len=0, wfdielen = 0;
+	_adapter *padapter = pwdinfo->padapter;
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	struct wifi_display_info*	pwfd_info = &padapter->wdinfo.wfd_info;
+
+	//	WFD OUI
+	wfdielen = 0;
+	wfdie[ wfdielen++ ] = 0x50;
+	wfdie[ wfdielen++ ] = 0x6F;
+	wfdie[ wfdielen++ ] = 0x9A;
+	wfdie[ wfdielen++ ] = 0x0A;	//	WFA WFD v1.0
+
+	//	Commented by Albert 20110812
+	//	According to the WFD Specification, the probe response frame should contain 4 WFD attributes
+	//	1. WFD Device Information
+	//	2. Associated BSSID
+	//	3. Coupled Sink Information
+	//	4. WFD Session Information
+
+
+	//	WFD Device Information ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 6;
+
+	//	Value1:
+	//	WFD device information
+	//	WFD primary sink + available for WFD session + WiFi Direct mode
+	RTW_PUT_BE16(wfdie + wfdielen, 0x0011);
+	wfdielen += 2;
+
+	//	Value2:
+	//	Session Management Control Port
+	//	Default TCP port for RTSP messages is 554
+	RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport );
+	wfdielen += 2;
+
+	//	Value3:
+	//	WFD Device Maximum Throughput
+	//	300Mbps is the maximum throughput
+	RTW_PUT_BE16(wfdie + wfdielen, 300);
+	wfdielen += 2;
+
+	//	Associated BSSID ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 6;
+
+	//	Value:
+	//	Associated BSSID
+	if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE )
+	{
+		_rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN );
+	}
+	else
+	{
+		_rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN );
+	}
+
+	wfdielen += ETH_ALEN;
+
+	//	Coupled Sink Information ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 1;
+
+	//	Value:
+	//	Coupled Sink Status bitmap
+	//	Not coupled/available for Coupling
+	wfdie[ wfdielen++ ] = 0;
+
+	if ( P2P_ROLE_GO == pwdinfo->role )
+	{
+		//	WFD Session Information ATTR
+		//	Type:
+		wfdie[ wfdielen++ ] = WFD_ATTR_SESSION_INFO;
+
+		//	Length:
+		//	Note: In the WFD specification, the size of length field is 1.
+		wfdie[ wfdielen++ ] = 0;
+
+		//	Todo: to add the list of WFD device info descriptor in WFD group.
+
+	}
+
+	pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len);
+
+	return len;
+	
+}
+
+u32 build_assoc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
+{
+	u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 };
+	u32 len=0, wfdielen = 0;
+	_adapter *padapter = pwdinfo->padapter;
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	struct wifi_display_info*	pwfd_info = &padapter->wdinfo.wfd_info;
+
+	//	WFD OUI
+	wfdielen = 0;
+	wfdie[ wfdielen++ ] = 0x50;
+	wfdie[ wfdielen++ ] = 0x6F;
+	wfdie[ wfdielen++ ] = 0x9A;
+	wfdie[ wfdielen++ ] = 0x0A;	//	WFA WFD v1.0
+
+	//	Commented by Albert 20110812
+	//	According to the WFD Specification, the probe request frame should contain 4 WFD attributes
+	//	1. WFD Device Information
+	//	2. Associated BSSID
+	//	3. Coupled Sink Information
+
+
+	//	WFD Device Information ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 6;
+
+	//	Value1:
+	//	WFD device information
+	//	WFD primary sink + available for WFD session + WiFi Direct mode
+	RTW_PUT_BE16(wfdie + wfdielen, 0x0011);
+	wfdielen += 2;
+
+	//	Value2:
+	//	Session Management Control Port
+	//	Default TCP port for RTSP messages is 554
+	RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport );
+	wfdielen += 2;
+
+	//	Value3:
+	//	WFD Device Maximum Throughput
+	//	300Mbps is the maximum throughput
+	RTW_PUT_BE16(wfdie + wfdielen, 300);
+	wfdielen += 2;
+
+	//	Associated BSSID ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 6;
+
+	//	Value:
+	//	Associated BSSID
+	if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE )
+	{
+		_rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN );
+	}
+	else
+	{
+		_rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN );
+	}
+
+	wfdielen += ETH_ALEN;
+
+	//	Coupled Sink Information ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 1;
+
+	//	Value:
+	//	Coupled Sink Status bitmap
+	//	Not coupled/available for Coupling
+	wfdie[ wfdielen++ ] = 0;
+
+	pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len);
+
+	return len;
+	
+}
+
+u32 build_assoc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
+{
+	u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 };
+	u32 len=0, wfdielen = 0;
+	_adapter *padapter = pwdinfo->padapter;
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	struct wifi_display_info*	pwfd_info = &padapter->wdinfo.wfd_info;
+
+	//	WFD OUI
+	wfdielen = 0;
+	wfdie[ wfdielen++ ] = 0x50;
+	wfdie[ wfdielen++ ] = 0x6F;
+	wfdie[ wfdielen++ ] = 0x9A;
+	wfdie[ wfdielen++ ] = 0x0A;	//	WFA WFD v1.0
+
+	//	Commented by Albert 20110812
+	//	According to the WFD Specification, the probe request frame should contain 4 WFD attributes
+	//	1. WFD Device Information
+	//	2. Associated BSSID
+	//	3. Coupled Sink Information
+
+
+	//	WFD Device Information ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 6;
+
+	//	Value1:
+	//	WFD device information
+	//	WFD primary sink + available for WFD session + WiFi Direct mode
+	RTW_PUT_BE16(wfdie + wfdielen, 0x0011);
+	wfdielen += 2;
+
+	//	Value2:
+	//	Session Management Control Port
+	//	Default TCP port for RTSP messages is 554
+	RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport );
+	wfdielen += 2;
+
+	//	Value3:
+	//	WFD Device Maximum Throughput
+	//	300Mbps is the maximum throughput
+	RTW_PUT_BE16(wfdie + wfdielen, 300);
+	wfdielen += 2;
+
+	//	Associated BSSID ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 6;
+
+	//	Value:
+	//	Associated BSSID
+	if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE )
+	{
+		_rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN );
+	}
+	else
+	{
+		_rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN );
+	}
+
+	wfdielen += ETH_ALEN;
+
+	//	Coupled Sink Information ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 1;
+
+	//	Value:
+	//	Coupled Sink Status bitmap
+	//	Not coupled/available for Coupling
+	wfdie[ wfdielen++ ] = 0;
+
+	pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len);
+
+	return len;
+	
+}
+
+u32 build_nego_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
+{
+	u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 };
+	u32 len=0, wfdielen = 0;
+	_adapter *padapter = pwdinfo->padapter;
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	struct wifi_display_info*	pwfd_info = &padapter->wdinfo.wfd_info;
+
+	//	WFD OUI
+	wfdielen = 0;
+	wfdie[ wfdielen++ ] = 0x50;
+	wfdie[ wfdielen++ ] = 0x6F;
+	wfdie[ wfdielen++ ] = 0x9A;
+	wfdie[ wfdielen++ ] = 0x0A;	//	WFA WFD v1.0
+
+	//	Commented by Albert 20110825
+	//	According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes
+	//	1. WFD Device Information
+	//	2. Associated BSSID ( Optional )
+	//	3. Local IP Adress ( Optional )
+
+
+	//	WFD Device Information ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 6;
+
+	//	Value1:
+	//	WFD device information
+	//	WFD primary sink + available for WFD session + WiFi Direct mode
+	RTW_PUT_BE16(wfdie + wfdielen, 0x0011);
+	wfdielen += 2;
+
+	//	Value2:
+	//	Session Management Control Port
+	//	Default TCP port for RTSP messages is 554
+	RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport );
+	wfdielen += 2;
+
+	//	Value3:
+	//	WFD Device Maximum Throughput
+	//	300Mbps is the maximum throughput
+	RTW_PUT_BE16(wfdie + wfdielen, 300);
+	wfdielen += 2;
+
+	//	Associated BSSID ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 6;
+
+	//	Value:
+	//	Associated BSSID
+	if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE )
+	{
+		_rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN );
+	}
+	else
+	{
+		_rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN );
+	}
+
+	wfdielen += ETH_ALEN;
+
+	//	Coupled Sink Information ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 1;
+
+	//	Value:
+	//	Coupled Sink Status bitmap
+	//	Not coupled/available for Coupling
+	wfdie[ wfdielen++ ] = 0;
+
+	pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len);
+
+	return len;
+	
+}
+
+u32 build_nego_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
+{
+	u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 };
+	u32 len=0, wfdielen = 0;
+	_adapter *padapter = pwdinfo->padapter;
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	struct wifi_display_info*	pwfd_info = &padapter->wdinfo.wfd_info;
+
+	//	WFD OUI
+	wfdielen = 0;
+	wfdie[ wfdielen++ ] = 0x50;
+	wfdie[ wfdielen++ ] = 0x6F;
+	wfdie[ wfdielen++ ] = 0x9A;
+	wfdie[ wfdielen++ ] = 0x0A;	//	WFA WFD v1.0
+
+	//	Commented by Albert 20110825
+	//	According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes
+	//	1. WFD Device Information
+	//	2. Associated BSSID ( Optional )
+	//	3. Local IP Adress ( Optional )
+
+
+	//	WFD Device Information ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 6;
+
+	//	Value1:
+	//	WFD device information
+	//	WFD primary sink + available for WFD session + WiFi Direct mode
+	RTW_PUT_BE16(wfdie + wfdielen, 0x0011);
+	wfdielen += 2;
+
+	//	Value2:
+	//	Session Management Control Port
+	//	Default TCP port for RTSP messages is 554
+	RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport );
+	wfdielen += 2;
+
+	//	Value3:
+	//	WFD Device Maximum Throughput
+	//	300Mbps is the maximum throughput
+	RTW_PUT_BE16(wfdie + wfdielen, 300);
+	wfdielen += 2;
+
+	//	Associated BSSID ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 6;
+
+	//	Value:
+	//	Associated BSSID
+	if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE )
+	{
+		_rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN );
+	}
+	else
+	{
+		_rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN );
+	}
+
+	wfdielen += ETH_ALEN;
+
+	//	Coupled Sink Information ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 1;
+
+	//	Value:
+	//	Coupled Sink Status bitmap
+	//	Not coupled/available for Coupling
+	wfdie[ wfdielen++ ] = 0;
+
+
+	pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len);
+
+	return len;
+	
+}
+
+u32 build_nego_confirm_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
+{
+	u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 };
+	u32 len=0, wfdielen = 0;
+	_adapter *padapter = pwdinfo->padapter;
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	struct wifi_display_info*	pwfd_info = &padapter->wdinfo.wfd_info;
+
+	//	WFD OUI
+	wfdielen = 0;
+	wfdie[ wfdielen++ ] = 0x50;
+	wfdie[ wfdielen++ ] = 0x6F;
+	wfdie[ wfdielen++ ] = 0x9A;
+	wfdie[ wfdielen++ ] = 0x0A;	//	WFA WFD v1.0
+
+	//	Commented by Albert 20110825
+	//	According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes
+	//	1. WFD Device Information
+	//	2. Associated BSSID ( Optional )
+	//	3. Local IP Adress ( Optional )
+
+
+	//	WFD Device Information ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 6;
+
+	//	Value1:
+	//	WFD device information
+	//	WFD primary sink + available for WFD session + WiFi Direct mode
+	RTW_PUT_BE16(wfdie + wfdielen, 0x0011);
+	wfdielen += 2;
+
+	//	Value2:
+	//	Session Management Control Port
+	//	Default TCP port for RTSP messages is 554
+	RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport );
+	wfdielen += 2;
+
+	//	Value3:
+	//	WFD Device Maximum Throughput
+	//	300Mbps is the maximum throughput
+	RTW_PUT_BE16(wfdie + wfdielen, 300);
+	wfdielen += 2;
+
+	//	Associated BSSID ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 6;
+
+	//	Value:
+	//	Associated BSSID
+	if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE )
+	{
+		_rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN );
+	}
+	else
+	{
+		_rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN );
+	}
+
+	wfdielen += ETH_ALEN;
+
+	//	Coupled Sink Information ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 1;
+
+	//	Value:
+	//	Coupled Sink Status bitmap
+	//	Not coupled/available for Coupling
+	wfdie[ wfdielen++ ] = 0;
+
+
+	pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len);
+
+	return len;
+	
+}
+
+u32 build_provdisc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
+{
+	u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 };
+	u32 len=0, wfdielen = 0;
+	_adapter *padapter = pwdinfo->padapter;
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	struct wifi_display_info*	pwfd_info = &padapter->wdinfo.wfd_info;
+
+	//	WFD OUI
+	wfdielen = 0;
+	wfdie[ wfdielen++ ] = 0x50;
+	wfdie[ wfdielen++ ] = 0x6F;
+	wfdie[ wfdielen++ ] = 0x9A;
+	wfdie[ wfdielen++ ] = 0x0A;	//	WFA WFD v1.0
+
+	//	Commented by Albert 20110825
+	//	According to the WFD Specification, the provision discovery request frame should contain 3 WFD attributes
+	//	1. WFD Device Information
+	//	2. Associated BSSID ( Optional )
+	//	3. Local IP Adress ( Optional )
+
+
+	//	WFD Device Information ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 6;
+
+	//	Value1:
+	//	WFD device information
+	//	WFD primary sink + available for WFD session + WiFi Direct mode
+	RTW_PUT_BE16(wfdie + wfdielen, 0x0011);
+	wfdielen += 2;
+
+	//	Value2:
+	//	Session Management Control Port
+	//	Default TCP port for RTSP messages is 554
+	RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport );
+	wfdielen += 2;
+
+	//	Value3:
+	//	WFD Device Maximum Throughput
+	//	300Mbps is the maximum throughput
+	RTW_PUT_BE16(wfdie + wfdielen, 300);
+	wfdielen += 2;
+
+	//	Associated BSSID ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 6;
+
+	//	Value:
+	//	Associated BSSID
+	if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE )
+	{
+		_rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN );
+	}
+	else
+	{
+		_rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN );
+	}
+
+	wfdielen += ETH_ALEN;
+
+	//	Coupled Sink Information ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 1;
+
+	//	Value:
+	//	Coupled Sink Status bitmap
+	//	Not coupled/available for Coupling
+	wfdie[ wfdielen++ ] = 0;
+
+
+	pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len);
+
+	return len;
+	
+}
+
+u32 build_provdisc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
+{
+	u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 };
+	u32 len=0, wfdielen = 0;
+	_adapter *padapter = pwdinfo->padapter;
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	struct wifi_display_info*	pwfd_info = &padapter->wdinfo.wfd_info;
+
+	//	WFD OUI
+	wfdielen = 0;
+	wfdie[ wfdielen++ ] = 0x50;
+	wfdie[ wfdielen++ ] = 0x6F;
+	wfdie[ wfdielen++ ] = 0x9A;
+	wfdie[ wfdielen++ ] = 0x0A;	//	WFA WFD v1.0
+
+	//	Commented by Albert 20110825
+	//	According to the WFD Specification, the provision discovery response frame should contain 3 WFD attributes
+	//	1. WFD Device Information
+	//	2. Associated BSSID ( Optional )
+	//	3. Local IP Adress ( Optional )
+
+
+	//	WFD Device Information ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 6;
+
+	//	Value1:
+	//	WFD device information
+	//	WFD primary sink + available for WFD session + WiFi Direct mode
+	RTW_PUT_BE16(wfdie + wfdielen, 0x0011);
+	wfdielen += 2;
+
+	//	Value2:
+	//	Session Management Control Port
+	//	Default TCP port for RTSP messages is 554
+	RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport );
+	wfdielen += 2;
+
+	//	Value3:
+	//	WFD Device Maximum Throughput
+	//	300Mbps is the maximum throughput
+	RTW_PUT_BE16(wfdie + wfdielen, 300);
+	wfdielen += 2;
+
+	//	Associated BSSID ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 6;
+
+	//	Value:
+	//	Associated BSSID
+	if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE )
+	{
+		_rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN );
+	}
+	else
+	{
+		_rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN );
+	}
+
+	wfdielen += ETH_ALEN;
+
+	//	Coupled Sink Information ATTR
+	//	Type:
+	wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO;
+
+	//	Length:
+	//	Note: In the WFD specification, the size of length field is 1.
+	wfdie[ wfdielen++ ] = 1;
+
+	//	Value:
+	//	Coupled Sink Status bitmap
+	//	Not coupled/available for Coupling
+	wfdie[ wfdielen++ ] = 0;
+
+	pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len);
+
+	return len;
+	
+}
+
+
+#endif //CONFIG_WFD
+
+u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
+{
+	u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 };
+	u32 len=0, p2pielen = 0;	
+
+	//	P2P OUI
+	p2pielen = 0;
+	p2pie[ p2pielen++ ] = 0x50;
+	p2pie[ p2pielen++ ] = 0x6F;
+	p2pie[ p2pielen++ ] = 0x9A;
+	p2pie[ p2pielen++ ] = 0x09;	//	WFA P2P v1.0
+
+	//	Commented by Albert 20100907
+	//	According to the P2P Specification, the probe response frame should contain 5 P2P attributes
+	//	1. P2P Capability
+	//	2. Extended Listen Timing
+	//	3. Notice of Absence ( NOA )	( Only GO needs this )
+	//	4. Device Info
+	//	5. Group Info	( Only GO need this )
+
+	//	P2P Capability ATTR
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY;
+
+	//	Length:
+	//*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 );
+	RTW_PUT_LE16(p2pie + p2pielen, 0x0002);
+	p2pielen += 2;
+
+	//	Value:
+	//	Device Capability Bitmap, 1 byte
+	//	Be able to participate in additional P2P Groups and
+	//	support the P2P Invitation Procedure
+	p2pie[ p2pielen++ ] = P2P_DEVCAP_INVITATION_PROC|P2P_DEVCAP_CLIENT_DISCOVERABILITY;
+	
+	//	Group Capability Bitmap, 1 byte
+	if(pwdinfo->role == P2P_ROLE_GO)
+	{
+		p2pie[ p2pielen ] = (P2P_GRPCAP_GO | P2P_GRPCAP_INTRABSS);
+
+		if(pwdinfo->p2p_state == P2P_STATE_PROVISIONING_ING)
+			p2pie[ p2pielen ] |= P2P_GRPCAP_GROUP_FORMATION;
+
+		p2pielen++;
+	}
+	else if ( pwdinfo->role == P2P_ROLE_DEVICE )
+	{
+		//	Group Capability Bitmap, 1 byte
+		p2pie[ p2pielen++ ] = 0x00;
+	}
+
+	//	Extended Listen Timing ATTR
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_EX_LISTEN_TIMING;
+
+	//	Length:
+	//*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0004 );
+	RTW_PUT_LE16(p2pie + p2pielen, 0x0004);
+	p2pielen += 2;
+
+	//	Value:
+	//	Availability Period
+	//*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF );
+	RTW_PUT_LE16(p2pie + p2pielen, 0xFFFF);
+	p2pielen += 2;
+
+	//	Availability Interval
+	//*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF );
+	RTW_PUT_LE16(p2pie + p2pielen, 0xFFFF);
+	p2pielen += 2;
+
+
+	// Notice of Absence ATTR
+	//	Type: 
+	//	Length:
+	//	Value:
+	if(pwdinfo->role == P2P_ROLE_GO)
+	{
+		//go_add_noa_attr(pwdinfo);
+	}	
+
+	//	Device Info ATTR
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO;
+
+	//	Length:
+	//	21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) 
+	//	+ NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes)
+	//*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len );
+	RTW_PUT_LE16(p2pie + p2pielen, 21 + pwdinfo->device_name_len);
+	p2pielen += 2;
+
+	//	Value:
+	//	P2P Device Address
+	_rtw_memcpy( p2pie + p2pielen, pwdinfo->device_addr, ETH_ALEN );
+	p2pielen += ETH_ALEN;
+
+	//	Config Method
+	//	This field should be big endian. Noted by P2P specification.
+	//*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->supported_wps_cm );
+	RTW_PUT_BE16(p2pie + p2pielen, pwdinfo->supported_wps_cm);
+	p2pielen += 2;
+
+	//	Primary Device Type
+	//	Category ID
+	//*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_RTK_WIDI );
+	RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_CID_RTK_WIDI);
+	p2pielen += 2;
+
+	//	OUI
+	//*(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI );
+	RTW_PUT_BE32(p2pie + p2pielen, WPSOUI);
+	p2pielen += 4;
+
+	//	Sub Category ID
+	//*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_RTK_DMP );
+	RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_SCID_RTK_DMP);
+	p2pielen += 2;
+
+	//	Number of Secondary Device Types
+	p2pie[ p2pielen++ ] = 0x00;	//	No Secondary Device Type List
+
+	//	Device Name
+	//	Type:
+	//*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME );
+	RTW_PUT_BE16(p2pie + p2pielen, WPS_ATTR_DEVICE_NAME);
+	p2pielen += 2;
+
+	//	Length:
+	//*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len );
+	RTW_PUT_BE16(p2pie + p2pielen, pwdinfo->device_name_len);
+	p2pielen += 2;
+
+	//	Value:
+	_rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name, pwdinfo->device_name_len );
+	p2pielen += pwdinfo->device_name_len;
+
+
+	// Group Info ATTR
+	//	Type:
+	//	Length:
+	//	Value:
+	if(pwdinfo->role == P2P_ROLE_GO)
+	{
+		p2pielen += go_add_group_info_attr(pwdinfo, p2pie + p2pielen);
+	}
+
+	
+	pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len);
+	
+
+	return len;
+	
+}
+
+u32 build_prov_disc_request_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8* pssid, u8 ussidlen, u8* pdev_raddr )
+{
+	u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 };
+	u32 len=0, p2pielen = 0;	
+
+	//	P2P OUI
+	p2pielen = 0;
+	p2pie[ p2pielen++ ] = 0x50;
+	p2pie[ p2pielen++ ] = 0x6F;
+	p2pie[ p2pielen++ ] = 0x9A;
+	p2pie[ p2pielen++ ] = 0x09;	//	WFA P2P v1.0
+
+	//	Commented by Albert 20110301
+	//	According to the P2P Specification, the provision discovery request frame should contain 3 P2P attributes
+	//	1. P2P Capability
+	//	2. Device Info
+	//	3. Group ID ( When joining an operating P2P Group )
+
+	//	P2P Capability ATTR
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY;
+
+	//	Length:
+	//*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 );
+	RTW_PUT_LE16(p2pie + p2pielen, 0x0002);
+	p2pielen += 2;
+
+	//	Value:
+	//	Device Capability Bitmap, 1 byte
+	//	Be able to participate in additional P2P Groups and
+	//	support the P2P Invitation Procedure
+	p2pie[ p2pielen++ ] = P2P_DEVCAP_INVITATION_PROC;
+	
+	//	Group Capability Bitmap, 1 byte
+	p2pie[ p2pielen++ ] = 0x00;
+
+
+	//	Device Info ATTR
+	//	Type:
+	p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO;
+
+	//	Length:
+	//	21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) 
+	//	+ NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes)
+	//*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len );
+	RTW_PUT_LE16(p2pie + p2pielen, 21 + pwdinfo->device_name_len);
+	p2pielen += 2;
+
+	//	Value:
+	//	P2P Device Address
+	_rtw_memcpy( p2pie + p2pielen, pwdinfo->device_addr, ETH_ALEN );
+	p2pielen += ETH_ALEN;
+
+	//	Config Method
+	//	This field should be big endian. Noted by P2P specification.
+	if ( pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_PBC )
+	{
+		//*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_CONFIG_METHOD_PBC );
+		RTW_PUT_BE16(p2pie + p2pielen, WPS_CONFIG_METHOD_PBC);
+	}
+	else
+	{
+		//*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_CONFIG_METHOD_DISPLAY );
+		RTW_PUT_BE16(p2pie + p2pielen, WPS_CONFIG_METHOD_DISPLAY);
+	}
+
+	p2pielen += 2;
+
+	//	Primary Device Type
+	//	Category ID
+	//*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_RTK_WIDI );
+	RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_CID_RTK_WIDI);
+	p2pielen += 2;
+
+	//	OUI
+	//*(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI );
+	RTW_PUT_BE32(p2pie + p2pielen, WPSOUI);
+	p2pielen += 4;
+
+	//	Sub Category ID
+	//*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_RTK_DMP );
+	RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_SCID_RTK_DMP);
+	p2pielen += 2;
+
+	//	Number of Secondary Device Types
+	p2pie[ p2pielen++ ] = 0x00;	//	No Secondary Device Type List
+
+	//	Device Name
+	//	Type:
+	//*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME );
+	RTW_PUT_BE16(p2pie + p2pielen, WPS_ATTR_DEVICE_NAME);
+	p2pielen += 2;
+
+	//	Length:
+	//*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len );
+	RTW_PUT_BE16(p2pie + p2pielen, pwdinfo->device_name_len);
+	p2pielen += 2;
+
+	//	Value:
+	_rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name, pwdinfo->device_name_len );
+	p2pielen += pwdinfo->device_name_len;
+
+	if ( pwdinfo->role == P2P_ROLE_CLIENT )
+	{
+		//	Added by Albert 2011/05/19
+		//	In this case, the pdev_raddr is the device address of the group owner.
+		
+		//	P2P Group ID ATTR
+		//	Type:
+		p2pie[ p2pielen++ ] = P2P_ATTR_GROUP_ID;
+
+		//	Length:
+		//*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN + ussidlen );
+		RTW_PUT_LE16(p2pie + p2pielen, ETH_ALEN + ussidlen);
+		p2pielen += 2;
+
+		//	Value:
+		_rtw_memcpy( p2pie + p2pielen, pdev_raddr, ETH_ALEN );
+		p2pielen += ETH_ALEN;
+
+		_rtw_memcpy( p2pie + p2pielen, pssid, ussidlen );
+		p2pielen += ussidlen;
+		
+	}
+
+	pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len);
+	
+
+	return len;
+	
+}
+
+
+u32 build_assoc_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 status_code)
+{
+	u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 };
+	u32 len=0, p2pielen = 0;	
+
+	//	P2P OUI
+	p2pielen = 0;
+	p2pie[ p2pielen++ ] = 0x50;
+	p2pie[ p2pielen++ ] = 0x6F;
+	p2pie[ p2pielen++ ] = 0x9A;
+	p2pie[ p2pielen++ ] = 0x09;	//	WFA P2P v1.0
+
+	// According to the P2P Specification, the Association response frame should contain 2 P2P attributes
+	//	1. Status
+	//	2. Extended Listen Timing (optional)
+
+
+	//	Status ATTR
+	p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_STATUS, 1, &status_code);
+
+
+	// Extended Listen Timing ATTR
+	//	Type:
+	//	Length:
+	//	Value:
+
+
+	pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len);
+	
+	return len;
+	
+}
+
+u32 build_deauth_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
+{
+	u32 len=0;
+	
+	return len;
+}
+
+u32 process_probe_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len)
+{	
+	u8 *p;
+	u32 ret=_FALSE;
+	u8	p2pie[ MAX_P2P_IE_LEN ] = { 0xFF };
+	u32	p2pielen = 0;
+	int ssid_len=0, rate_cnt = 0;
+
+	p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, _SUPPORTEDRATES_IE_, (int *)&rate_cnt,
+			len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_);
+
+	if ( rate_cnt <= 4 )
+	{
+		int i, g_rate =0;
+
+		for( i = 0; i < rate_cnt; i++ )
+		{
+			if ( ( ( *( p + 2 + i ) & 0xff ) != 0x02 ) &&
+				( ( *( p + 2 + i ) & 0xff ) != 0x04 ) &&
+				( ( *( p + 2 + i ) & 0xff ) != 0x0B ) &&
+				( ( *( p + 2 + i ) & 0xff ) != 0x16 ) )
+			{
+				g_rate = 1;
+			}
+		}
+
+		if ( g_rate == 0 )
+		{
+			//	There is no OFDM rate included in SupportedRates IE of this probe request frame
+			//	The driver should response this probe request.
+			return ret;
+		}
+	}
+	else
+	{
+		//	rate_cnt > 4 means the SupportRates IE contains the OFDM rate because the count of CCK rates are 4.
+		//	We should proceed the following check for this probe request.
+	}
+
+	//	Added comments by Albert 20100906
+	//	There are several items we should check here.
+	//	1. This probe request frame must contain the P2P IE. (Done)
+	//	2. This probe request frame must contain the wildcard SSID. (Done)
+	//	3. Wildcard BSSID. (Todo)
+	//	4. Destination Address. ( Done in mgt_dispatcher function )
+	//	5. Requested Device Type in WSC IE. (Todo)
+	//	6. Device ID attribute in P2P IE. (Todo)
+
+	p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, _SSID_IE_, (int *)&ssid_len,
+			len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_);	
+
+	if((pwdinfo->role == P2P_ROLE_DEVICE) || (pwdinfo->role == P2P_ROLE_GO))
+	{
+		if(rtw_get_p2p_ie( pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_ , len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_ , p2pie, &p2pielen))
+		{
+			if ( (p != NULL) && _rtw_memcmp( ( void * ) ( p+2 ), ( void * ) pwdinfo->p2p_wildcard_ssid , 7 ))
+			{
+				//todo:
+				//Check Requested Device Type attributes in WSC IE.
+				//Check Device ID attribute in P2P IE
+
+				ret = _TRUE;			
+			}
+		}
+		else
+		{
+			//non -p2p device
+		}
+		
+	}	
+
+	
+	return ret;
+	
+}
+
+u32 process_assoc_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *p2p_ie, uint p2p_ielen, struct sta_info *psta)
+{
+	u8 status_code = P2P_STATUS_SUCCESS;
+	u8 *pbuf, *pattr_content=NULL;
+	u32 attr_contentlen = 0;
+	u16 cap_attr=0;
+
+	if(pwdinfo->role != P2P_ROLE_GO)
+		return P2P_STATUS_FAIL_REQUEST_UNABLE;
+
+	//Check P2P Capability ATTR
+	if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&cap_attr, (uint*)&attr_contentlen)==_FALSE)
+		return P2P_STATUS_FAIL_INVALID_PARAM;
+
+	cap_attr = le16_to_cpu(cap_attr);
+	psta->dev_cap = cap_attr&0xff;
+
+
+	//Check Extended Listen Timing ATTR
+	
+
+	//Check P2P Device Info ATTR
+	if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO, NULL, (uint*)&attr_contentlen)==_TRUE)
+	{
+		pattr_content = pbuf = rtw_zmalloc(attr_contentlen);
+		if(pattr_content)
+		{
+			u8 num_of_secdev_type;
+			u16 dev_name_len;
+			
+		
+			rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO , pattr_content, (uint*)&attr_contentlen);
+
+			_rtw_memcpy(psta->dev_addr, 	pattr_content, ETH_ALEN);//P2P Device Address
+			
+			pattr_content += ETH_ALEN;
+
+			_rtw_memcpy(&psta->config_methods, pattr_content, 2);//Config Methods
+			psta->config_methods = be16_to_cpu(psta->config_methods);
+
+			pattr_content += 2;
+
+			_rtw_memcpy(psta->primary_dev_type, pattr_content, 8);
+
+			pattr_content += 8;
+
+			num_of_secdev_type = *pattr_content;
+			pattr_content += 1;
+
+			if(num_of_secdev_type==0)
+			{
+				psta->num_of_secdev_type = 0;
+			}
+			else
+			{
+				u32 len;
+
+				psta->num_of_secdev_type = num_of_secdev_type;
+
+				len = (sizeof(psta->secdev_types_list)<(num_of_secdev_type*8)) ? (sizeof(psta->secdev_types_list)) : (num_of_secdev_type*8);
+
+				_rtw_memcpy(psta->secdev_types_list, pattr_content, len);
+
+				pattr_content += (num_of_secdev_type*8);
+			}
+
+
+			//dev_name_len = attr_contentlen - ETH_ALEN - 2 - 8 - 1 - (num_of_secdev_type*8);
+			psta->dev_name_len=0;
+			if(WPS_ATTR_DEVICE_NAME == be16_to_cpu(*(u16*)pattr_content))
+			{				
+				dev_name_len = be16_to_cpu(*(u16*)(pattr_content+2));
+
+				psta->dev_name_len = (sizeof(psta->dev_name)<dev_name_len) ? sizeof(psta->dev_name):dev_name_len;
+
+				_rtw_memcpy(psta->dev_name, pattr_content+4, psta->dev_name_len);
+			}
+
+			rtw_mfree(pbuf, attr_contentlen);
+
+		}
+
+	}
+	else
+	{
+		status_code =  P2P_STATUS_FAIL_INVALID_PARAM;
+	}
+
+	return status_code;
+
+}
+
+u32 process_p2p_devdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len)
+{
+	u8 *frame_body;
+	u8 status, dialogToken;
+	struct sta_info *psta = NULL;
+	_adapter *padapter = pwdinfo->padapter;
+	struct sta_priv *pstapriv = &padapter->stapriv;
+	u8	p2p_ie[ MAX_P2P_IE_LEN ] = { 0xFF };
+	u32	p2p_ielen = 0;	
+	
+	frame_body = (unsigned char *)(pframe + sizeof(struct ieee80211_hdr_3addr));
+
+	dialogToken = frame_body[7];
+	status = P2P_STATUS_FAIL_UNKNOWN_P2PGROUP;
+		
+	if ( rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, p2p_ie, &p2p_ielen ) )
+	{
+		u8 groupid[ 38 ] = { 0x00 };
+		u8 dev_addr[ETH_ALEN] = { 0x00 };		
+		u32	attr_contentlen = 0;
+
+		if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, groupid, &attr_contentlen))
+		{
+			if(_rtw_memcmp(pwdinfo->device_addr, groupid, ETH_ALEN) && 
+				_rtw_memcmp(pwdinfo->p2p_group_ssid, groupid+ETH_ALEN, pwdinfo->p2p_group_ssid_len))
+			{
+				attr_contentlen=0;
+				if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_ID, dev_addr, &attr_contentlen))
+				{
+					_irqL irqL;
+					_list	*phead, *plist;					
+
+					_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL);
+					phead = &pstapriv->asoc_list;
+					plist = get_next(phead);
+
+					//look up sta asoc_queue
+					while ((rtw_end_of_queue_search(phead, plist)) == _FALSE)	
+					{		
+						psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list);
+		
+						plist = get_next(plist);
+
+						if(psta->is_p2p_device && (psta->dev_cap&P2P_DEVCAP_CLIENT_DISCOVERABILITY) &&
+							_rtw_memcmp(psta->dev_addr, dev_addr, ETH_ALEN))
+						{
+
+							//_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL);
+							//issue GO Discoverability Request
+							issue_group_disc_req(pwdinfo, psta->hwaddr);
+							//_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL);
+							
+							status = P2P_STATUS_SUCCESS;
+							
+							break;
+						}
+						else
+						{
+							status = P2P_STATUS_FAIL_INFO_UNAVAILABLE;
+						}
+		
+					}				
+					_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL);
+					
+				}
+				else
+				{
+					status = P2P_STATUS_FAIL_INVALID_PARAM;
+				}
+
+			}
+			else
+			{
+				status = P2P_STATUS_FAIL_INVALID_PARAM;
+			}
+			
+		}	
+		
+	}
+
+	
+	//issue Device Discoverability Response
+	issue_p2p_devdisc_resp(pwdinfo, GetAddr2Ptr(pframe), status, dialogToken);
+	
+	
+	return (status==P2P_STATUS_SUCCESS) ? _TRUE:_FALSE;
+	
+}
+
+u32 process_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe, uint len)
+{
+	return _TRUE;
+}
+
+u8 process_p2p_provdisc_req(struct wifidirect_info *pwdinfo,  u8 *pframe, uint len )
+{
+	u8 *frame_body;
+	u8	wpsie[255] = { 0x00 };
+	uint	wps_ielen = 0, attr_contentlen = 0;
+	u16	uconfig_method = 0;
+	
+
+	frame_body = (pframe + sizeof(struct ieee80211_hdr_3addr));
+
+	if ( rtw_get_wps_ie_p2p( frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, wpsie, &wps_ielen) )
+	{
+		if ( rtw_get_wps_attr_content( wpsie, wps_ielen, WPS_ATTR_CONF_METHOD , ( u8* ) &uconfig_method, &attr_contentlen) )
+		{
+			uconfig_method = be16_to_cpu( uconfig_method );
+			switch( uconfig_method )
+			{
+				case WPS_CM_DISPLYA:
+				{
+					_rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "dis", 3 );
+					break;
+				}
+				case WPS_CM_LABEL:
+				{
+					_rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "lab", 3 );
+					break;
+				}
+				case WPS_CM_PUSH_BUTTON:
+				{
+					_rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pbc", 3 );
+					break;
+				}
+				case WPS_CM_KEYPAD:
+				{
+					_rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pad", 3 );
+					break;
+				}
+			}
+			issue_p2p_provision_resp( pwdinfo, GetAddr2Ptr(pframe), frame_body, uconfig_method);
+		}
+	}
+	DBG_8192C( "[%s] config method = %s\n", __FUNCTION__, pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req );
+	return _TRUE;
+	
+}
+	
+u8 process_p2p_provdisc_resp(struct wifidirect_info *pwdinfo,  u8 *pframe)
+{
+
+	return _TRUE;
+}
+
+
+
+u8 process_p2p_group_negotation_req( struct wifidirect_info *pwdinfo, u8 *pframe, uint len )
+{
+	u8	result = P2P_STATUS_SUCCESS;
+	u32	p2p_ielen = 0, wps_ielen = 0;
+	u8	p2p_ie[ 255 ] = { 0x00 };
+	uint	cnt = 0;
+#ifdef CONFIG_WFD
+	u8	wfd_ie[ 128 ] = { 0x00 };
+	u32	wfd_ielen = 0;
+#endif // CONFIG_WFD
+
+	if ( pwdinfo->ui_got_wps_info == P2P_NO_WPSINFO )
+	{
+		result = P2P_STATUS_FAIL_INFO_UNAVAILABLE;
+		pwdinfo->p2p_state = P2P_STATE_GONEGO_FAIL;
+		return( result );
+	}
+	
+	if ( rtw_get_wps_ie_p2p( pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &wps_ielen) )
+	{
+
+	}
+	else
+	{
+		DBG_8192C( "[%s] WPS IE not Found!!\n", __FUNCTION__ );
+		result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM;
+		pwdinfo->p2p_state = P2P_STATE_GONEGO_FAIL;
+		return( result );
+	}
+					
+	cnt = rtw_get_p2p_ie( pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, p2p_ie, &p2p_ielen );
+
+	if ( cnt == 0 )
+	{
+		DBG_8192C( "[%s] P2P IE not Found!!\n", __FUNCTION__ );
+		result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM;
+		pwdinfo->p2p_state = P2P_STATE_GONEGO_FAIL;
+	}
+	
+	while ( cnt )
+	{
+		u8	attr_content = 0x00;
+		u32	attr_contentlen = 0;						
+
+		pwdinfo->p2p_state = P2P_STATE_GONEGO_ING;
+				
+		if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT , &attr_content, &attr_contentlen) )
+		{
+			DBG_8192C( "[%s] GO Intent = %d, tie = %d\n", __FUNCTION__, attr_content >> 1, attr_content & 0x01 );
+			pwdinfo->peer_intent = attr_content;	//	include both intent and tie breaker values.
+
+			if ( pwdinfo->intent == ( pwdinfo->peer_intent >> 1 ) )
+			{
+				//	Try to match the tie breaker value
+				if ( pwdinfo->intent == P2P_MAX_INTENT )
+				{
+					pwdinfo->role = P2P_ROLE_DEVICE;
+					result = P2P_STATUS_FAIL_BOTH_GOINTENT_15;
+				}
+				else
+				{
+					if ( attr_content & 0x01 )
+					{
+						pwdinfo->role = P2P_ROLE_CLIENT;
+					}
+					else
+					{
+						pwdinfo->role = P2P_ROLE_GO;
+					}
+				}							
+			}
+			else if ( pwdinfo->intent > ( pwdinfo->peer_intent >> 1 ) )
+			{
+				pwdinfo->role = P2P_ROLE_GO;
+			}
+			else
+			{
+				pwdinfo->role = P2P_ROLE_CLIENT;
+			}
+
+			if ( P2P_ROLE_GO ==  pwdinfo->role )
+			{
+				//	Store the group id information.
+				_rtw_memcpy( pwdinfo->groupid_info.go_device_addr, pwdinfo->device_addr, ETH_ALEN );
+				_rtw_memcpy( pwdinfo->groupid_info.ssid, pwdinfo->nego_ssid, pwdinfo->nego_ssidlen );		
+			}
+		}
+
+		
+		attr_contentlen = 0;
+		if ( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_INTENTED_IF_ADDR, pwdinfo->p2p_peer_interface_addr, &attr_contentlen ) )
+		{
+			if ( attr_contentlen != ETH_ALEN )
+			{
+				_rtw_memset( pwdinfo->p2p_peer_interface_addr, 0x00, ETH_ALEN );
+			}
+		}
+
+		//	Get the next P2P IE
+		//	If the cnt is 0 -> no the next P2P IE
+
+		_rtw_memset( p2p_ie, 0x00, 255);
+		p2p_ielen = 0;
+		cnt = rtw_get_p2p_ie( pframe + _PUBLIC_ACTION_IE_OFFSET_ + cnt, len - _PUBLIC_ACTION_IE_OFFSET_ - cnt, p2p_ie, &p2p_ielen );		
+	}
+	
+#ifdef CONFIG_WFD
+	//	Added by Albert 20110823
+	//	Try to get the TCP port information when receiving the negotiation request.
+	if ( rtw_get_wfd_ie( pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, wfd_ie, &wfd_ielen ) )
+	{
+		u8	attr_content[ 10 ] = { 0x00 };
+		u32	attr_contentlen = 0;
+
+		DBG_8192C( "[%s] WFD IE Found!!\n", __FUNCTION__ );
+		rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, attr_content, &attr_contentlen);
+		if ( attr_contentlen )
+		{
+			pwdinfo->wfd_info.peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 );
+			DBG_8192C( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, pwdinfo->wfd_info.peer_rtsp_ctrlport );
+		}
+	}
+#endif // CONFIG_WFD
+
+	return( result );
+}
+
+u8 process_p2p_group_negotation_resp( struct wifidirect_info *pwdinfo, u8 *pframe, uint len )
+{
+	u8	result = P2P_STATUS_SUCCESS;
+	u32	p2p_ielen, wps_ielen;
+	u8	p2p_ie[ 255 ];
+	uint	cnt = 0;
+#ifdef CONFIG_WFD
+	u8	wfd_ie[ 128 ] = { 0x00 };
+	u32	wfd_ielen = 0;
+#endif // CONFIG_WFD
+
+	//	Be able to know which one is the P2P GO and which one is P2P client.
+					
+	if ( rtw_get_wps_ie_p2p( pframe+ _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &wps_ielen) )
+	{
+
+	}
+	else
+	{
+		DBG_8192C( "[%s] WPS IE not Found!!\n", __FUNCTION__ );
+		result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM;
+		pwdinfo->p2p_state = P2P_STATE_GONEGO_FAIL;
+	}
+
+	cnt = rtw_get_p2p_ie( pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, p2p_ie, &p2p_ielen );
+	if ( cnt == 0 )
+	{
+		pwdinfo->role = P2P_ROLE_DEVICE;
+		pwdinfo->p2p_state = P2P_STATE_GONEGO_FAIL;
+		result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM;
+	}
+	else
+	{

+		u8	attr_content = 0x00;
+		u32	attr_contentlen = 0;
+		u8	operatingch_info[5] = { 0x00 };
+		uint	ch_cnt = 0;
+		u8	ch_content[50] = { 0x00 };
+		u8	groupid[ 38 ];
+		
+		while ( cnt )	//	Found the P2P IE.
+		{
+
+			rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, &attr_content, &attr_contentlen);
+			if ( attr_contentlen == 1 )
+			{			
+				DBG_8192C( "[%s] Status = %d\n", __FUNCTION__, attr_content );
+				if ( attr_content == P2P_STATUS_SUCCESS )
+				{
+					//	Do nothing.
+				}
+				else
+				{
+					pwdinfo->role = P2P_ROLE_DEVICE;
+					pwdinfo->p2p_state = P2P_STATE_GONEGO_FAIL;
+					result = attr_content;
+					break;
+				}
+			}
+
+			//	Try to get the peer's interface address
+			attr_contentlen = 0;
+			if ( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_INTENTED_IF_ADDR, pwdinfo->p2p_peer_interface_addr, &attr_contentlen ) )
+			{
+				if ( attr_contentlen != ETH_ALEN )
+				{
+					_rtw_memset( pwdinfo->p2p_peer_interface_addr, 0x00, ETH_ALEN );
+				}
+			}
+			
+			//	Try to get the peer's intent and tie breaker value.
+			attr_content = 0x00;
+			attr_contentlen = 0;
+			if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT , &attr_content, &attr_contentlen) )
+			{
+				DBG_8192C( "[%s] GO Intent = %d, tie = %d\n", __FUNCTION__, attr_content >> 1, attr_content & 0x01 );
+				pwdinfo->peer_intent = attr_content;	//	include both intent and tie breaker values.
+
+				if ( pwdinfo->intent == ( pwdinfo->peer_intent >> 1 ) )
+				{
+					//	Try to match the tie breaker value
+					if ( pwdinfo->intent == P2P_MAX_INTENT )
+					{
+						pwdinfo->role = P2P_ROLE_DEVICE;
+						result = P2P_STATUS_FAIL_BOTH_GOINTENT_15;
+						pwdinfo->p2p_state = P2P_STATE_GONEGO_FAIL;
+					}
+					else
+					{
+						pwdinfo->p2p_state = P2P_STATE_GONEGO_OK;
+						if ( attr_content & 0x01 )
+						{
+							pwdinfo->role = P2P_ROLE_CLIENT;
+						}
+						else
+						{
+							pwdinfo->role = P2P_ROLE_GO;
+						}
+					}							
+				}
+				else if ( pwdinfo->intent > ( pwdinfo->peer_intent >> 1 ) )
+				{
+					pwdinfo->p2p_state = P2P_STATE_GONEGO_OK;
+					pwdinfo->role = P2P_ROLE_GO;
+				}
+				else
+				{
+					pwdinfo->p2p_state = P2P_STATE_GONEGO_OK;
+					pwdinfo->role = P2P_ROLE_CLIENT;
+				}
+
+				if ( P2P_ROLE_GO ==  pwdinfo->role )
+				{
+					//	Store the group id information.
+					_rtw_memcpy( pwdinfo->groupid_info.go_device_addr, pwdinfo->device_addr, ETH_ALEN );
+					_rtw_memcpy( pwdinfo->groupid_info.ssid, pwdinfo->nego_ssid, pwdinfo->nego_ssidlen );
+		
+				}
+			}
+			
+			//	Try to get the operation channel information
+					
+			attr_contentlen = 0;
+			if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, &attr_contentlen))
+			{
+				DBG_8192C( "[%s] Peer's operating channel = %d\n", __FUNCTION__, operatingch_info[4] );
+				pwdinfo->peer_operating_ch = operatingch_info[4];
+			}
+			
+			//	Try to get the channel list information
+			if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, ch_content, &ch_cnt) )
+			{
+				pwdinfo->channel_cnt = ch_content[ 4 ];	//	Number of Channels
+				_rtw_memcpy( pwdinfo->channel_list, &ch_content[ 5 ], pwdinfo->channel_cnt );	//	Channel List
+				DBG_8192C( "[%s] channel count = %d\n", __FUNCTION__, pwdinfo->channel_cnt );
+			}
+			else
+			{
+				DBG_8192C( "[%s] channel list attribute not found!\n", __FUNCTION__);
+			}
+
+			//	Try to get the group id information if peer is GO
+			attr_contentlen = 0;
+			_rtw_memset( groupid, 0x00, 38 );
+			if ( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, groupid, &attr_contentlen) )
+			{
+				_rtw_memcpy( pwdinfo->groupid_info.go_device_addr, &groupid[0], ETH_ALEN );
+				_rtw_memcpy( pwdinfo->groupid_info.ssid, &groupid[6], attr_contentlen - ETH_ALEN );
+			}
+			
+			//	Get the next P2P IE
+			//	If the cnt is 0 -> no the next P2P IE
+			
+			_rtw_memset( p2p_ie, 0x00, 255);
+			p2p_ielen = 0;
+			cnt = rtw_get_p2p_ie( pframe + _PUBLIC_ACTION_IE_OFFSET_ + cnt, len - _PUBLIC_ACTION_IE_OFFSET_ - cnt, p2p_ie, &p2p_ielen );		
+		}
+		
+	}
+
+#ifdef CONFIG_WFD
+	//	Added by Albert 20111122
+	//	Try to get the TCP port information when receiving the negotiation response.
+	if ( rtw_get_wfd_ie( pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, wfd_ie, &wfd_ielen ) )
+	{
+		u8	attr_content[ 10 ] = { 0x00 };
+		u32	attr_contentlen = 0;
+
+		DBG_8192C( "[%s] WFD IE Found!!\n", __FUNCTION__ );
+		rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, attr_content, &attr_contentlen);
+		if ( attr_contentlen )
+		{
+			pwdinfo->wfd_info.peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 );
+			DBG_8192C( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, pwdinfo->wfd_info.peer_rtsp_ctrlport );
+		}
+	}
+#endif // CONFIG_WFD
+
+	return( result );
+
+}
+
+u8 process_p2p_group_negotation_confirm( struct wifidirect_info *pwdinfo, u8 *pframe, uint len )
+{
+	u32	p2p_ielen = 0;
+	u8	p2p_ie[ 255 ] = { 0x00 };
+	u8	result = P2P_STATUS_SUCCESS;
+	uint	cnt = 0;
+	
+	cnt = rtw_get_p2p_ie( pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, p2p_ie, &p2p_ielen );
+	while ( cnt )	//	Found the P2P IE.
+	{
+		u8	attr_content = 0x00, operatingch_info[5] = { 0x00 };
+		u8	groupid[ 38 ] = { 0x00 };
+		u32	attr_contentlen = 0;
+
+		pwdinfo->negotiation_dialog_token = 1;
+		rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, &attr_content, &attr_contentlen);
+		if ( attr_contentlen == 1 )
+		{
+			DBG_8192C( "[%s] Status = %d\n", __FUNCTION__, attr_content );
+			result = attr_content;
+
+			if ( attr_content == P2P_STATUS_SUCCESS )
+			{
+				u8	bcancelled = 0;
+																
+				_cancel_timer( &pwdinfo->restore_p2p_state_timer, &bcancelled );
+
+				//	Commented by Albert 20100911
+				//	Todo: Need to handle the case which both Intents are the same.
+				pwdinfo->p2p_state = P2P_STATE_GONEGO_OK;								
+				if ( ( pwdinfo->intent ) > ( pwdinfo->peer_intent >> 1 ) )
+				{
+					pwdinfo->role = P2P_ROLE_GO;
+				}
+				else if ( ( pwdinfo->intent ) < ( pwdinfo->peer_intent >> 1 ) )
+				{
+					pwdinfo->role = P2P_ROLE_CLIENT;
+				}
+				else
+				{
+					//	Have to compare the Tie Breaker
+					if ( pwdinfo->peer_intent & 0x01 )
+					{
+						pwdinfo->role = P2P_ROLE_CLIENT;
+					}
+					else
+					{
+						pwdinfo->role = P2P_ROLE_GO;
+					}
+				}								
+			}
+			else
+			{
+				pwdinfo->role = P2P_ROLE_DEVICE;
+				pwdinfo->p2p_state = P2P_STATE_GONEGO_FAIL;
+				break;
+			}
+		}
+
+		//	Try to get the group id information
+		attr_contentlen = 0;
+		_rtw_memset( groupid, 0x00, 38 );
+		if ( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, groupid, &attr_contentlen) )
+		{
+			DBG_8192C( "[%s] Ssid = %s, ssidlen = %d\n", __FUNCTION__, &groupid[ETH_ALEN], strlen(&groupid[ETH_ALEN]) );
+			_rtw_memcpy( pwdinfo->groupid_info.go_device_addr, &groupid[0], ETH_ALEN );
+			_rtw_memcpy( pwdinfo->groupid_info.ssid, &groupid[6], attr_contentlen - ETH_ALEN );			
+		}
+
+		attr_contentlen = 0;
+		if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, &attr_contentlen) )
+		{		
+			DBG_8192C( "[%s] Peer's operating channel = %d\n", __FUNCTION__, operatingch_info[4] );
+			pwdinfo->peer_operating_ch = operatingch_info[4];
+		}
+
+		//	Get the next P2P IE
+		//	If the cnt is 0 -> no the next P2P IE
+
+		_rtw_memset( p2p_ie, 0x00, 255);
+		p2p_ielen = 0;
+		cnt = rtw_get_p2p_ie( pframe + _PUBLIC_ACTION_IE_OFFSET_ + cnt, len - _PUBLIC_ACTION_IE_OFFSET_ - cnt, p2p_ie, &p2p_ielen );
+		
+	}
+
+	return( result );
+}
+
+u8 process_p2p_presence_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len)
+{
+	u8 *frame_body;	
+	u8 dialogToken=0;
+	u8 status = P2P_STATUS_SUCCESS;
+	
+	frame_body = (unsigned char *)(pframe + sizeof(struct ieee80211_hdr_3addr));
+
+	dialogToken = frame_body[6];
+
+	//todo: check NoA attribute
+
+	issue_p2p_presence_resp(pwdinfo, GetAddr2Ptr(pframe), status, dialogToken);
+
+	return _TRUE;
+}
+
+void process_p2p_ps_ie(PADAPTER padapter, u8 *IEs, u32 IELength)
+{
+	u32	p2p_ielen = 0;
+	u32	attr_contentlen = 0;
+	u8	p2p_ie[ MAX_P2P_IE_LEN] = { 0x00 };
+	u8	noa_attr[MAX_P2P_IE_LEN] = { 0x00 };// NoA length should be n*(13) + 2
+	struct wifidirect_info	*pwdinfo = &( padapter->wdinfo );
+	u8	find_p2p = _FALSE, find_p2p_ps = _FALSE;
+	u8	noa_offset, noa_num, noa_index;
+	u32	offset, cnt;
+
+_func_enter_;
+
+	if ( pwdinfo->p2p_state == P2P_STATE_NONE )
+	{
+		return;
+	}
+
+	cnt =  _BEACON_IE_OFFSET_;
+	while(cnt < IELength)
+	{
+		offset = rtw_get_p2p_ie( &IEs[cnt], IELength-cnt, p2p_ie, &p2p_ielen);
+
+		if(offset)
+		{
+			find_p2p = _TRUE;
+			// Get Notice of Absence IE.
+			if(rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_NOA, noa_attr, &attr_contentlen))
+			{
+				find_p2p_ps = _TRUE;
+				noa_index = noa_attr[0];
+
+				if( (pwdinfo->p2p_ps_enable == _FALSE) ||
+					(noa_index != pwdinfo->noa_index) )// if index change, driver should reconfigure related setting.
+				{
+					pwdinfo->noa_index = noa_index;
+					pwdinfo->opp_ps = noa_attr[1] >> 7;
+					pwdinfo->ctwindow = noa_attr[1] & 0x7F;
+
+					noa_offset = 2;
+					noa_num = 0;
+					// NoA length should be n*(13) + 2
+					if(attr_contentlen > 2)
+					{
+						while(noa_offset < attr_contentlen)
+						{
+							//_rtw_memcpy(&wifidirect_info->noa_count[noa_num], &noa_attr[noa_offset], 1);
+							pwdinfo->noa_count[noa_num] = noa_attr[noa_offset];
+							noa_offset += 1;
+
+							_rtw_memcpy(&pwdinfo->noa_duration[noa_num], &noa_attr[noa_offset], 4);
+							noa_offset += 4;
+
+							_rtw_memcpy(&pwdinfo->noa_interval[noa_num], &noa_attr[noa_offset], 4);
+							noa_offset += 4;
+
+							_rtw_memcpy(&pwdinfo->noa_start_time[noa_num], &noa_attr[noa_offset], 4);
+							noa_offset += 4;
+
+							noa_num++;
+						}
+					}
+					pwdinfo->noa_num = noa_num;
+
+					if( pwdinfo->opp_ps == 1 )
+					{
+						pwdinfo->p2p_ps_enable = _TRUE;
+						// driver should wait LPS for entering CTWindow
+						if(padapter->pwrctrlpriv.bFwCurrentInPSMode == _TRUE)
+						{
+							p2p_ps_wk_cmd(padapter, P2P_PS_ENABLE, 1);
+						}
+					}
+					else if( pwdinfo->noa_num > 0 )
+					{
+						pwdinfo->p2p_ps_enable = _TRUE;
+						p2p_ps_wk_cmd(padapter, P2P_PS_ENABLE, 1);
+					}
+					else if( pwdinfo->p2p_ps_enable == _TRUE)
+					{
+						p2p_ps_wk_cmd(padapter, P2P_PS_DISABLE, 1);
+					}
+				}
+
+				break; // find target, just break.
+			}
+
+			cnt += offset;
+		}
+		else // No p2p IE.
+		{
+			break;
+		}
+	}
+
+	if(find_p2p == _TRUE)
+	{
+		if( (pwdinfo->p2p_ps_enable == _TRUE) && (find_p2p_ps == _FALSE) )
+		{
+			p2p_ps_wk_cmd(padapter, P2P_PS_DISABLE, 1);
+		}
+	}
+
+_func_exit_;
+}
+
+void find_phase_handler( _adapter*	padapter )
+{
+	struct wifidirect_info  *pwdinfo = &padapter->wdinfo;
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	NDIS_802_11_SSID 	ssid;
+	_irqL				irqL;
+	u8					_status = 0;
+
+_func_enter_;
+
+	_rtw_memset((unsigned char*)&ssid, 0, sizeof(NDIS_802_11_SSID));
+	_rtw_memcpy(ssid.Ssid, pwdinfo->p2p_wildcard_ssid, P2P_WILDCARD_SSID_LEN );
+	ssid.SsidLength = P2P_WILDCARD_SSID_LEN;
+
+	pwdinfo->p2p_state = P2P_STATE_FIND_PHASE_SEARCH;
+		
+	_enter_critical_bh(&pmlmepriv->lock, &irqL);
+	_status = rtw_sitesurvey_cmd(padapter, &ssid, 1);
+	_exit_critical_bh(&pmlmepriv->lock, &irqL);
+
+
+_func_exit_;
+}
+
+void restore_p2p_state_handler( _adapter*	padapter )
+{
+	struct wifidirect_info  *pwdinfo = &padapter->wdinfo;
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+
+_func_enter_;
+
+	pwdinfo->p2p_state = pwdinfo->pre_p2p_state;
+	if ( pwdinfo->role != P2P_ROLE_CLIENT )
+	{
+		//	In the P2P client mode, the driver should not switch back to its listen channel
+		//	because this P2P client should stay at the operating channel of P2P GO.
+		set_channel_bwmode( padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20);
+	}
+_func_exit_;
+}
+
+void pre_tx_provdisc_handler( _adapter*	padapter )
+{
+	struct wifidirect_info  *pwdinfo = &padapter->wdinfo;
+	u8	val8 = 1;
+_func_enter_;
+
+	set_channel_bwmode(padapter, pwdinfo->tx_prov_disc_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20);
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
+	issue_probereq_p2p( padapter );
+	_set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT );
+	
+_func_exit_;
+}
+
+void pre_tx_negoreq_handler( _adapter*	padapter )
+{
+	struct wifidirect_info  *pwdinfo = &padapter->wdinfo;
+	u8	val8 = 1;
+_func_enter_;
+
+	set_channel_bwmode(padapter, pwdinfo->nego_req_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20);
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));	
+	issue_probereq_p2p( padapter );
+	_set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT );
+	
+_func_exit_;
+}
+
+
+void p2p_protocol_wk_hdl(_adapter *padapter, int intCmdType)
+{
+	struct wifidirect_info	*pwdinfo= &(padapter->wdinfo);
+	
+_func_enter_;
+
+	switch(intCmdType)
+	{
+		case P2P_FIND_PHASE_WK:
+		{
+			find_phase_handler( padapter );
+			break;
+		}
+		case P2P_RESTORE_STATE_WK:
+		{
+			restore_p2p_state_handler( padapter );
+			break;
+		}
+		case P2P_PRE_TX_PROVDISC_PROCESS_WK:
+		{
+			pre_tx_provdisc_handler( padapter );
+			break;
+		}
+		case P2P_PRE_TX_NEGOREQ_PROCESS_WK:
+		{
+			pre_tx_negoreq_handler( padapter );
+			break;
+		}
+	}
+	
+_func_exit_;
+}
+
+
+
+void p2p_ps_wk_hdl(_adapter *padapter, u8 p2p_ps_state)
+{
+	struct pwrctrl_priv		*pwrpriv = &padapter->pwrctrlpriv;
+	struct wifidirect_info	*pwdinfo= &(padapter->wdinfo);
+	
+_func_enter_;
+
+	// Pre action for p2p state
+	switch(p2p_ps_state)
+	{
+		case P2P_PS_ENABLE:
+			if( pwdinfo->ctwindow > 0 )
+			{
+				if(pwrpriv->smart_ps != 0)
+				{
+					pwrpriv->smart_ps = 0;
+					DBG_871X("%s(): Enter CTW, change SmartPS\n", __FUNCTION__);
+					padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&(padapter->pwrctrlpriv.pwr_mode)));
+				}
+			}
+			break;
+		default:
+			break;
+	}
+
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_H2C_FW_P2P_PS_OFFLOAD, (u8 *)(&p2p_ps_state));
+
+	// clear P2P SW status
+	if(p2p_ps_state == P2P_PS_DISABLE)
+	{
+		pwdinfo->noa_index = 0;
+		pwdinfo->ctwindow = 0;
+		pwdinfo->opp_ps = 0;
+		pwdinfo->noa_num = 0;
+		pwdinfo->p2p_ps_enable = _FALSE;
+		if(padapter->pwrctrlpriv.bFwCurrentInPSMode == _TRUE)
+		{
+			if(pwrpriv->smart_ps == 0)
+			{
+				pwrpriv->smart_ps = 2;
+				padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&(padapter->pwrctrlpriv.pwr_mode)));
+			}
+		}
+	}
+
+_func_exit_;
+}
+
+u8 p2p_ps_wk_cmd(_adapter*padapter, u8 p2p_ps_state, u8 enqueue)
+{
+	struct cmd_obj	*ph2c;
+	struct drvextra_cmd_parm	*pdrvextra_cmd_parm;
+	struct wifidirect_info	*pwdinfo= &(padapter->wdinfo);
+	struct cmd_priv	*pcmdpriv = &padapter->cmdpriv;
+	u8	res = _SUCCESS;
+	
+_func_enter_;
+
+	if ( (pwdinfo->p2p_state == P2P_STATE_NONE) ||
+		( pwdinfo->p2p_ps == p2p_ps_state ) )
+	{
+		return res;
+	}
+
+	// driver only perform p2p ps when GO have Opp_Ps or NoA
+	if( pwdinfo->p2p_ps_enable )
+	{
+		pwdinfo->p2p_ps = p2p_ps_state;
+	
+		if(enqueue)
+		{
+			ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));	
+			if(ph2c==NULL){
+				res= _FAIL;
+				goto exit;
+			}
+			
+			pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); 
+			if(pdrvextra_cmd_parm==NULL){
+				rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj));
+				res= _FAIL;
+				goto exit;
+			}
+
+			pdrvextra_cmd_parm->ec_id = P2P_PS_WK_CID;
+			pdrvextra_cmd_parm->type_size = p2p_ps_state;
+			pdrvextra_cmd_parm->pbuf = NULL;
+
+			init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra));
+
+			res = rtw_enqueue_cmd(pcmdpriv, ph2c);
+		}
+		else
+		{
+			p2p_ps_wk_hdl(padapter, p2p_ps_state);
+		}
+	}
+	
+exit:
+	
+_func_exit_;
+
+	return res;
+
+}
+
+#endif //CONFIG_P2P
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_pwrctrl.c linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_pwrctrl.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_pwrctrl.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_pwrctrl.c	2017-09-23 03:42:49.898675431 +0800
@@ -0,0 +1,1130 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#define _RTW_PWRCTRL_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <osdep_intf.h>
+
+#ifdef CONFIG_SDIO_HCI
+#include <sdio_ops.h>
+#endif
+
+#ifdef CONFIG_IPS
+void ips_enter(_adapter * padapter)
+{
+	struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	
+	_enter_pwrlock(&pwrpriv->lock);
+
+	pwrpriv->bips_processing = _TRUE;	
+
+	// syn ips_mode with request
+	pwrpriv->ips_mode = pwrpriv->ips_mode_req;
+	
+	pwrpriv->ips_enter_cnts++;	
+	DBG_8192C("==>ips_enter cnts:%d\n",pwrpriv->ips_enter_cnts);
+	
+	if(rf_off == pwrpriv->change_rfpwrstate )
+	{	
+		DBG_8192C("==>power_saving_ctrl_wk_hdl change rf to OFF...LED(0x%08x).... \n\n",rtw_read32(padapter,0x4c));
+		
+		if(pwrpriv->ips_mode == IPS_LEVEL_2)
+			pwrpriv->bkeepfwalive = _TRUE;
+		
+		rtw_ips_pwr_down(padapter);
+		pwrpriv->rf_pwrstate = rf_off;
+	}	
+	pwrpriv->bips_processing = _FALSE;	
+	_exit_pwrlock(&pwrpriv->lock);
+	
+}
+
+int ips_leave(_adapter * padapter)
+{
+	struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
+	struct security_priv* psecuritypriv=&(padapter->securitypriv);
+	struct mlme_priv		*pmlmepriv = &(padapter->mlmepriv);
+	int result = _SUCCESS;
+	sint keyid;
+	_enter_pwrlock(&pwrpriv->lock);
+	if((pwrpriv->rf_pwrstate == rf_off) &&(!pwrpriv->bips_processing))
+	{
+		pwrpriv->change_rfpwrstate = rf_on;
+		pwrpriv->ips_leave_cnts++;
+		DBG_8192C("==>ips_leave cnts:%d\n",pwrpriv->ips_leave_cnts);
+
+		result = rtw_ips_pwr_up(padapter);		
+		pwrpriv->bips_processing = _TRUE;
+		pwrpriv->rf_pwrstate = rf_on;
+
+		if((_WEP40_ == psecuritypriv->dot11PrivacyAlgrthm) ||(_WEP104_ == psecuritypriv->dot11PrivacyAlgrthm))
+		{
+			DBG_8192C("==>%s,channel(%d),processing(%x)\n",__FUNCTION__,padapter->mlmeextpriv.cur_channel,pwrpriv->bips_processing);
+			set_channel_bwmode(padapter, padapter->mlmeextpriv.cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20);			
+			for(keyid=0;keyid<4;keyid++){
+				if(pmlmepriv->key_mask & BIT(keyid)){
+					if(keyid == psecuritypriv->dot11PrivacyKeyIndex)
+						result=rtw_set_key(padapter,psecuritypriv, keyid, 1);
+					else
+						result=rtw_set_key(padapter,psecuritypriv, keyid, 0);
+				}
+			}
+		}
+		
+		DBG_8192C("==> ips_leave.....LED(0x%08x)...\n",rtw_read32(padapter,0x4c));
+		pwrpriv->bips_processing = _FALSE;
+
+		pwrpriv->bkeepfwalive = _FALSE;
+
+
+	}
+	_exit_pwrlock(&pwrpriv->lock);
+	return result;
+}
+
+
+#endif
+
+#ifdef CONFIG_AUTOSUSPEND
+extern void autosuspend_enter(_adapter* padapter);	
+extern int autoresume_enter(_adapter* padapter);
+#endif
+
+#ifdef SUPPORT_HW_RFOFF_DETECTED
+int rtw_hw_suspend(_adapter *padapter );
+int rtw_hw_resume(_adapter *padapter);
+#endif
+
+#ifdef PLATFORM_LINUX
+void rtw_ps_processor(_adapter*padapter)
+{
+#ifdef CONFIG_P2P
+	struct wifidirect_info	*pwdinfo = &( padapter->wdinfo );
+#endif //CONFIG_P2P
+	struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	int res;
+	rt_rf_power_state rfpwrstate;
+	
+#ifdef SUPPORT_HW_RFOFF_DETECTED
+	if(pwrpriv->bips_processing == _TRUE)	return;		
+	
+	//DBG_8192C("==> fw report state(0x%x)\n",rtw_read8(padapter,0x1ca));	
+	if(padapter->pwrctrlpriv.bHWPwrPindetect) 
+	{
+	#ifdef CONFIG_AUTOSUSPEND
+		if(padapter->registrypriv.usbss_enable)
+		{
+			if(pwrpriv->rf_pwrstate == rf_on)
+			{
+				if(padapter->net_closed == _TRUE)
+					pwrpriv->ps_flag = _TRUE;
+
+				rfpwrstate = RfOnOffDetect(padapter);
+				DBG_8192C("@@@@- #1  %s==> rfstate:%s \n",__FUNCTION__,(rfpwrstate==rf_on)?"rf_on":"rf_off");
+				if(rfpwrstate!= pwrpriv->rf_pwrstate)
+				{
+					if(rfpwrstate == rf_off)
+					{
+						pwrpriv->change_rfpwrstate = rf_off;
+						
+						pwrpriv->bkeepfwalive = _TRUE;	
+						pwrpriv->brfoffbyhw = _TRUE;						
+						
+						autosuspend_enter(padapter);							
+					}
+				}
+			}			
+		}
+		else
+	#endif //CONFIG_AUTOSUSPEND
+		{
+			rfpwrstate = RfOnOffDetect(padapter);
+			DBG_8192C("@@@@- #2  %s==> rfstate:%s \n",__FUNCTION__,(rfpwrstate==rf_on)?"rf_on":"rf_off");
+
+			if(rfpwrstate!= pwrpriv->rf_pwrstate)
+			{
+				if(rfpwrstate == rf_off)
+				{	
+					pwrpriv->change_rfpwrstate = rf_off;														
+					pwrpriv->brfoffbyhw = _TRUE;
+					padapter->bCardDisableWOHSM = _TRUE;
+					rtw_hw_suspend(padapter );	
+				}
+				else
+				{
+					pwrpriv->change_rfpwrstate = rf_on;
+					rtw_hw_resume(padapter );			
+				}
+				DBG_8192C("current rf_pwrstate(%s)\n",(pwrpriv->rf_pwrstate == rf_off)?"rf_off":"rf_on");
+			}
+		}
+		pwrpriv->pwr_state_check_cnts ++;	
+	}
+#endif //SUPPORT_HW_RFOFF_DETECTED
+
+	if( pwrpriv->power_mgnt == PS_MODE_ACTIVE )	return;
+
+	if((pwrpriv->rf_pwrstate == rf_on) && ((pwrpriv->pwr_state_check_cnts%4)==0))
+	{
+		if (	(check_fwstate(pmlmepriv, _FW_LINKED|_FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) ||
+			(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ||
+			(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) ||
+			(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) ||
+			(padapter->bup == _FALSE)	
+			#ifdef CONFIG_P2P
+			|| (pwdinfo->p2p_state != P2P_STATE_NONE)
+			#endif //CONFIG_P2P
+		)
+		{
+			return;
+		}
+			
+		DBG_8192C("==>%s .fw_state(%x)\n",__FUNCTION__,get_fwstate(pmlmepriv));
+		pwrpriv->change_rfpwrstate = rf_off;
+
+		#ifdef CONFIG_AUTOSUSPEND
+		if(padapter->registrypriv.usbss_enable)
+		{		
+			if(padapter->pwrctrlpriv.bHWPwrPindetect) 
+				pwrpriv->bkeepfwalive = _TRUE;	
+
+			if(padapter->net_closed == _TRUE)
+				pwrpriv->ps_flag = _TRUE;
+
+			padapter->bCardDisableWOHSM = _TRUE;
+			autosuspend_enter(padapter);
+		}		
+		else if(padapter->pwrctrlpriv.bHWPwrPindetect)
+		{
+		}
+		else
+		#endif //CONFIG_AUTOSUSPEND
+		{
+			#ifdef CONFIG_IPS	
+			ips_enter(padapter);			
+			#endif
+		}
+	}
+
+	
+}
+
+void pwr_state_check_handler(void *FunctionContext)
+{
+	_adapter *padapter = (_adapter *)FunctionContext;
+	struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv;
+#ifdef CONFIG_P2P
+	struct wifidirect_info	*pwdinfo = &( padapter->wdinfo );
+#endif //CONFIG_P2P
+	//DBG_871X("%s\n", __FUNCTION__);
+
+#ifdef SUPPORT_HW_RFOFF_DETECTED
+	//DBG_8192C("%s...bHWPwrPindetect(%d)\n",__FUNCTION__,padapter->pwrctrlpriv.bHWPwrPindetect);
+	if(padapter->pwrctrlpriv.bHWPwrPindetect)
+	{
+		rtw_ps_cmd(padapter);		
+		rtw_set_pwr_state_check_timer(&padapter->pwrctrlpriv);
+	}	
+	else	
+#endif
+	{
+		//if(padapter->net_closed == _TRUE)		return;
+		//DBG_8192C("==>%s .fw_state(%x)\n", __FUNCTION__, get_fwstate(pmlmepriv));
+		if (	(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ||
+			(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) ||
+			(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) ||	
+			(check_fwstate(pmlmepriv, _FW_LINKED|_FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE)  ||
+			(padapter->bup == _FALSE)		
+#ifdef CONFIG_P2P
+			|| (pwdinfo->p2p_state != P2P_STATE_NONE)
+#endif //CONFIG_P2P
+			)
+		{	
+			//other pwr ctrl....	
+			rtw_set_pwr_state_check_timer(&padapter->pwrctrlpriv);
+		}
+		else
+		{	
+			if((pwrpriv->rf_pwrstate == rf_on) &&(_FALSE == pwrpriv->bips_processing))
+			{	
+				pwrpriv->change_rfpwrstate = rf_off;
+				pwrctrlpriv->pwr_state_check_cnts = 0;
+				DBG_8192C("==>pwr_state_check_handler .fw_state(%x)\n",get_fwstate(pmlmepriv));				
+				rtw_ps_cmd(padapter);				
+			}
+
+		}
+	}
+	
+
+
+}
+#endif
+
+
+#ifdef CONFIG_LPS
+void rtw_set_rpwm(_adapter * padapter, u8 val8)
+{
+	u8	rpwm;
+	struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
+
+_func_enter_;
+
+	if(pwrpriv->rpwm == val8){
+		RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("Already set rpwm [%d] ! \n", val8));
+		return;
+	}
+
+	if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE)){
+		RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("rtw_set_rpwm=> bDriverStopped or bSurpriseRemoved \n"));
+		return;
+	}
+	rpwm = val8 |pwrpriv->tog;
+
+	pwrpriv->rpwm = val8;
+	
+	RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("rtw_set_rpwm: value = %x\n", rpwm));
+
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm));
+	
+	pwrpriv->tog += 0x80;
+
+_func_exit_;
+}
+
+u8 PS_RDY_CHECK(_adapter * padapter)
+{
+	u32 curr_time, delta_time;
+	struct pwrctrl_priv	*pwrpriv = &padapter->pwrctrlpriv;
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+
+	curr_time = rtw_get_current_time();	
+
+	delta_time = curr_time -pwrpriv->DelayLPSLastTimeStamp;
+
+	if(delta_time < LPS_DELAY_TIME)
+	{		
+		return _FALSE;
+	}
+
+	if (	(check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE) ||
+		(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ||
+		(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) ||
+		(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) )
+		return _FALSE;
+
+	if(_TRUE == pwrpriv->bInSuspend )
+		return _FALSE;
+	
+	if( (padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) && (padapter->securitypriv.binstallGrpkey == _FALSE) )
+	{
+		DBG_8192C("Group handshake still in progress !!!\n");
+		return _FALSE;
+	}
+
+	return _TRUE;
+}
+
+void rtw_set_ps_mode(_adapter * padapter, u8 ps_mode, u8 smart_ps)
+{
+	struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
+#ifdef CONFIG_P2P
+	struct wifidirect_info	*pwdinfo = &( padapter->wdinfo );
+#endif //CONFIG_P2P
+
+_func_enter_;
+
+	RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("========= Power Mode is :%d, Smart_PS = %d\n", ps_mode,smart_ps));
+	//DBG_8192C("========= Power Mode is :%d, Smart_PS = %d\n", ps_mode,smart_ps);
+
+	if(ps_mode > PM_Card_Disable) {
+		RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("ps_mode:%d error\n", ps_mode));
+		return;
+	}
+
+	if((pwrpriv->pwr_mode == ps_mode) &&
+		(pwrpriv->smart_ps == smart_ps)){
+		return;
+	}
+
+	//if(pwrpriv->pwr_mode == PS_MODE_ACTIVE)
+	if(ps_mode == PS_MODE_ACTIVE)
+	{
+#ifdef CONFIG_P2P
+		if(pwdinfo->opp_ps == 0)
+#endif //CONFIG_P2P
+		{
+			DBG_8192C("rtw_set_ps_mode(): Busy Traffic , Leave 802.11 power save..\n");
+			pwrpriv->smart_ps = smart_ps;
+			pwrpriv->pwr_mode = ps_mode;
+			rtw_set_rpwm(padapter, PS_STATE_S4);
+			padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode));
+			pwrpriv->bFwCurrentInPSMode = _FALSE;
+		}
+	}
+	else
+	{
+		if(PS_RDY_CHECK(padapter))
+		{
+			DBG_8192C("rtw_set_ps_mode(): Enter 802.11 power save mode...\n");
+			pwrpriv->smart_ps = smart_ps;
+			pwrpriv->pwr_mode = ps_mode;
+			pwrpriv->bFwCurrentInPSMode = _TRUE;
+			padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode));
+#ifdef CONFIG_P2P
+			// Set CTWindow after LPS
+			if(pwdinfo->opp_ps == 1)
+			//if(pwdinfo->p2p_ps_enable == _TRUE)
+				p2p_ps_wk_cmd(padapter, P2P_PS_ENABLE, 0);
+#endif //CONFIG_P2P
+			rtw_set_rpwm(padapter, PS_STATE_S2);
+		}
+		//else
+		//{
+		//	pwrpriv->pwr_mode = PS_MODE_ACTIVE;
+		//}
+	}
+
+_func_exit_;
+}
+
+
+//
+//	Description:
+//		Enter the leisure power save mode.
+//
+void LPS_Enter(PADAPTER padapter)
+{
+	struct pwrctrl_priv	*pwrpriv = &padapter->pwrctrlpriv;
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+
+_func_enter_;
+
+	//DBG_8192C("LeisurePSEnter()...\n");
+	
+	if (	(check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE) ||
+		(check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) ||
+		(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ||
+		(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) ||
+		(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) )
+		return;
+	
+	if(_TRUE == pwrpriv->bInSuspend )
+		return ;
+	
+	if (pwrpriv->bLeisurePs)
+	{
+		// Idle for a while if we connect to AP a while ago.
+		if(pwrpriv->LpsIdleCount >= 2) //  4 Sec 
+		{
+			if(pwrpriv->pwr_mode == PS_MODE_ACTIVE)
+			{
+				rtw_set_ps_mode(padapter, pwrpriv->power_mgnt, 2);
+			}	
+		}
+		else
+			pwrpriv->LpsIdleCount++;
+	}
+
+_func_exit_;
+}
+
+
+//
+//	Description:
+//		Leave the leisure power save mode.
+//
+void LPS_Leave(PADAPTER padapter)
+{
+	struct pwrctrl_priv	*pwrpriv = &padapter->pwrctrlpriv;
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+
+_func_enter_;
+
+	//DBG_8192C("LeisurePSLeave()...\n");
+
+	if (pwrpriv->bLeisurePs)
+	{	
+		if(pwrpriv->pwr_mode != PS_MODE_ACTIVE)
+		{
+			rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0);
+		}
+	}
+
+_func_exit_;
+}
+
+#endif
+
+//
+// Description: Leave all power save mode: LPS, FwLPS, IPS if needed.
+// Move code to function by tynli. 2010.03.26. 
+//
+void LeaveAllPowerSaveMode(IN PADAPTER Adapter)
+{
+	struct mlme_priv	*pmlmepriv = &(Adapter->mlmepriv);
+	u32 LPSLeaveTimeOut = 10000;
+	//u32 IPSLeaveTimeOut = 10000;
+
+_func_enter_;
+
+	//DBG_8192C("%s.....\n",__FUNCTION__);
+	if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
+	{ //connect
+#ifdef CONFIG_P2P
+		p2p_ps_wk_cmd(Adapter, P2P_PS_DISABLE, 0);
+#endif //CONFIG_P2P
+#ifdef CONFIG_LPS
+		//DBG_8192C("==> leave LPS.......\n");
+		LPS_Leave(Adapter);
+
+		if (Adapter->pwrctrlpriv.bLeisurePs)
+		{
+			BOOLEAN bAwake = _TRUE;
+			Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bAwake));
+			while(!bAwake)
+			{
+				rtw_usleep_os(100);
+				LPSLeaveTimeOut--;
+				if(LPSLeaveTimeOut <= 0)
+				{
+					DBG_8192C("Wait for FW LPS leave too long!!! LPSLeaveTimeOut  = %d\n", LPSLeaveTimeOut );
+					break;
+				}
+				Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bAwake));
+			}
+		}
+#endif
+	}
+	else
+	{
+		if(Adapter->pwrctrlpriv.rf_pwrstate== rf_off)
+		{
+			#ifdef CONFIG_AUTOSUSPEND
+			if(Adapter->registrypriv.usbss_enable)
+			{
+				#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35))
+				usb_disable_autosuspend(Adapter->dvobjpriv.pusbdev);
+				#elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,34))
+				Adapter->dvobjpriv.pusbdev->autosuspend_disabled = Adapter->bDisableAutosuspend;//autosuspend disabled by the user
+				#endif
+			}		
+			else
+			#endif
+			{
+			/*
+				#ifdef CONFIG_IPS
+				if(_FALSE == ips_leave(Adapter))
+				{
+					DBG_8192C("======> ips_leave fail.............\n");			
+				}
+				#endif
+			*/
+			}		
+		}	
+	}
+
+_func_exit_;
+}
+
+#ifdef CONFIG_PWRCTRL
+
+/*
+Caller:ISR handler...
+
+This will be called when CPWM interrupt is up.
+
+using to update cpwn of drv; and drv willl make a decision to up or down pwr level
+*/
+void cpwm_int_hdl(_adapter *padapter, struct reportpwrstate_parm *preportpwrstate)
+{
+	struct pwrctrl_priv *pwrpriv = &(padapter->pwrctrlpriv);
+	struct cmd_priv	*pcmdpriv = &(padapter->cmdpriv);
+	struct xmit_priv	*pxmitpriv = &(padapter->xmitpriv);
+
+_func_enter_;
+
+	if(pwrpriv->cpwm_tog == ((preportpwrstate->state)&0x80)){
+		RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("cpwm_int_hdl : cpwm_tog = %x this time cpwm=0x%x  toggle bit didn't change !!!\n",pwrpriv->cpwm_tog ,preportpwrstate->state));	
+		goto exit;
+	}
+
+	_enter_pwrlock(&pwrpriv->lock);
+
+	pwrpriv->cpwm = (preportpwrstate->state)&0xf;
+
+	if(pwrpriv->cpwm >= PS_STATE_S2){
+		if(pwrpriv->alives & CMD_ALIVE)
+			_rtw_up_sema(&(pcmdpriv->cmd_queue_sema));
+
+		if(pwrpriv->alives & XMIT_ALIVE)
+			_rtw_up_sema(&(pxmitpriv->xmit_sema));
+	}
+	pwrpriv->cpwm_tog=  (preportpwrstate->state)&0x80;
+	_exit_pwrlock(&pwrpriv->lock);
+exit:
+	RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("cpwm_int_hdl : cpwm = %x !!!\n",pwrpriv->cpwm));
+
+_func_exit_;
+
+}
+
+
+__inline static void	register_task_alive(struct pwrctrl_priv *pwrctrl, uint tag)
+{
+_func_enter_;
+		pwrctrl->alives |= tag;
+_func_exit_;
+}
+
+__inline static void	unregister_task_alive(struct pwrctrl_priv *pwrctrl, uint tag)
+{
+_func_enter_;
+
+	if (pwrctrl->alives & tag)
+		pwrctrl->alives ^= tag;
+
+_func_exit_;	
+}
+#endif
+
+#ifdef CONFIG_RESUME_IN_WORKQUEUE
+static void resume_workitem_callback(struct work_struct *work);
+#endif //CONFIG_RESUME_IN_WORKQUEUE
+
+void	rtw_init_pwrctrl_priv(_adapter *padapter)
+{
+	struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv;
+
+_func_enter_;
+
+#ifdef PLATFORM_WINDOWS
+	pwrctrlpriv->pnp_current_pwr_state=NdisDeviceStateD0;
+#endif
+
+	_init_pwrlock(&pwrctrlpriv->lock);
+	pwrctrlpriv->rf_pwrstate = rf_on;
+	pwrctrlpriv->ips_enter_cnts=0;
+	pwrctrlpriv->ips_leave_cnts=0;
+
+	pwrctrlpriv->ips_mode = padapter->registrypriv.ips_mode;
+	pwrctrlpriv->ips_mode_req = padapter->registrypriv.ips_mode;
+
+	pwrctrlpriv->pwr_state_check_interval = 2000;
+	pwrctrlpriv->pwr_state_check_cnts = 0;
+	pwrctrlpriv->bInternalAutoSuspend = _FALSE;
+	pwrctrlpriv->bInSuspend = _FALSE;
+	pwrctrlpriv->bkeepfwalive = _FALSE;
+	
+#ifdef CONFIG_AUTOSUSPEND	
+#ifdef SUPPORT_HW_RFOFF_DETECTED
+	pwrctrlpriv->pwr_state_check_interval = (pwrctrlpriv->bHWPwrPindetect) ?1000:2000;		
+#endif	
+#endif
+	
+	pwrctrlpriv->LpsIdleCount = 0;
+	//pwrctrlpriv->FWCtrlPSMode =padapter->registrypriv.power_mgnt;// PS_MODE_MIN;
+	pwrctrlpriv->power_mgnt =padapter->registrypriv.power_mgnt;// PS_MODE_MIN;
+	pwrctrlpriv->bLeisurePs = (PS_MODE_ACTIVE != pwrctrlpriv->power_mgnt)?_TRUE:_FALSE;
+
+	pwrctrlpriv->bFwCurrentInPSMode = _FALSE;
+
+	pwrctrlpriv->cpwm = PS_STATE_S4;
+
+	pwrctrlpriv->pwr_mode = PS_MODE_ACTIVE;
+
+	
+	pwrctrlpriv->smart_ps = 0;
+
+	pwrctrlpriv->tog = 0x80;
+
+#ifdef PLATFORM_LINUX		
+	_init_timer(&(pwrctrlpriv->pwr_state_check_timer), padapter->pnetdev, pwr_state_check_handler, (u8 *)padapter);
+#endif
+
+	#ifdef CONFIG_RESUME_IN_WORKQUEUE
+	_init_workitem(&pwrctrlpriv->resume_work, resume_workitem_callback, NULL);
+	pwrctrlpriv->rtw_workqueue = create_singlethread_workqueue("rtw_workqueue");
+	#endif //CONFIG_RESUME_IN_WORKQUEUE
+
+	#if defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER)
+	pwrctrlpriv->early_suspend.suspend = NULL;
+	rtw_register_early_suspend(pwrctrlpriv);
+	#endif //CONFIG_HAS_EARLYSUSPEND || CONFIG_ANDROID_POWER
+
+
+_func_exit_;
+
+}
+
+
+void	rtw_free_pwrctrl_priv(_adapter *adapter)
+{
+	struct pwrctrl_priv *pwrctrlpriv = &adapter->pwrctrlpriv;
+
+_func_enter_;
+
+	//_rtw_memset((unsigned char *)pwrctrlpriv, 0, sizeof(struct pwrctrl_priv));
+
+
+	#ifdef CONFIG_RESUME_IN_WORKQUEUE
+	if (pwrctrlpriv->rtw_workqueue) { 
+		flush_workqueue(pwrctrlpriv->rtw_workqueue);
+		destroy_workqueue(pwrctrlpriv->rtw_workqueue);
+	}
+	#endif
+
+
+	#if defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER)
+	rtw_unregister_early_suspend(pwrctrlpriv);
+	#endif //CONFIG_HAS_EARLYSUSPEND || CONFIG_ANDROID_POWER
+
+	_free_pwrlock(&pwrctrlpriv->lock);
+
+_func_exit_;
+}
+
+
+/*
+Caller: rtw_xmit_thread
+
+Check if the fw_pwrstate is okay for xmit.
+If not (cpwm is less than P1 state), then the sub-routine
+will raise the cpwm to be greater than or equal to P1. 
+
+Calling Context: Passive
+
+Return Value:
+
+_SUCCESS: rtw_xmit_thread can write fifo/txcmd afterwards.
+_FAIL: rtw_xmit_thread can not do anything.
+*/
+sint rtw_register_tx_alive(_adapter *padapter)
+{
+	uint res = _SUCCESS;
+	
+#ifdef CONFIG_PWRCTRL
+
+	struct pwrctrl_priv *pwrctrl = &padapter->pwrctrlpriv;
+
+_func_enter_;
+
+	_enter_pwrlock(&pwrctrl->lock);
+
+	register_task_alive(pwrctrl, XMIT_ALIVE);
+	RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("rtw_register_tx_alive: cpwm:%d alives:%x\n", pwrctrl->cpwm, pwrctrl->alives));
+
+	if(pwrctrl->cpwm < PS_STATE_S2){
+		rtw_set_rpwm(padapter, PS_STATE_S3);
+		res = _FAIL;
+	}
+
+	_exit_pwrlock(&pwrctrl->lock);
+	
+_func_exit_;
+
+#endif	/* CONFIG_PWRCTRL */
+
+	return res;	
+
+}
+
+/*
+Caller: rtw_cmd_thread
+
+Check if the fw_pwrstate is okay for issuing cmd.
+If not (cpwm should be is less than P2 state), then the sub-routine
+will raise the cpwm to be greater than or equal to P2. 
+
+Calling Context: Passive
+
+Return Value:
+
+_SUCCESS: rtw_cmd_thread can issue cmds to firmware afterwards.
+_FAIL: rtw_cmd_thread can not do anything.
+*/
+sint rtw_register_cmd_alive(_adapter *padapter)
+{
+	uint res = _SUCCESS;
+	
+#ifdef CONFIG_PWRCTRL
+
+	struct pwrctrl_priv *pwrctrl = &padapter->pwrctrlpriv;
+
+_func_enter_;
+
+	_enter_pwrlock(&pwrctrl->lock);
+
+	register_task_alive(pwrctrl, CMD_ALIVE);
+	RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("rtw_register_cmd_alive: cpwm:%d alives:%x\n", pwrctrl->cpwm, pwrctrl->alives));
+
+	if(pwrctrl->cpwm < PS_STATE_S2){
+		rtw_set_rpwm(padapter, PS_STATE_S3);
+		res = _FAIL;
+	}
+
+	_exit_pwrlock(&pwrctrl->lock);
+_func_exit_;
+#endif
+
+	return res;
+}
+
+
+/*
+Caller: rx_isr
+
+Calling Context: Dispatch/ISR
+
+Return Value:
+
+*/
+sint rtw_register_rx_alive(_adapter *padapter)
+{
+
+#ifdef CONFIG_PWRCTRL
+
+	struct pwrctrl_priv *pwrctrl = &padapter->pwrctrlpriv;
+
+_func_enter_;
+
+	_enter_pwrlock(&pwrctrl->lock);
+
+	register_task_alive(pwrctrl, RECV_ALIVE);
+
+	RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("rtw_register_rx_alive: cpwm:%d alives:%x\n", pwrctrl->cpwm, pwrctrl->alives));
+
+	_exit_pwrlock(&pwrctrl->lock);
+
+_func_exit_;
+	
+#endif /*CONFIG_PWRCTRL*/
+
+	return _SUCCESS;
+}
+
+
+/*
+Caller: evt_isr or evt_thread
+
+Calling Context: Dispatch/ISR or Passive
+
+Return Value:
+*/
+sint rtw_register_evt_alive(_adapter *padapter)
+{
+
+#ifdef CONFIG_PWRCTRL
+
+	struct pwrctrl_priv *pwrctrl = &padapter->pwrctrlpriv;
+
+_func_enter_;
+
+	_enter_pwrlock(&pwrctrl->lock);
+
+	register_task_alive(pwrctrl, EVT_ALIVE);
+
+	RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_info_,("rtw_register_evt_alive: cpwm:%d alives:%x\n", pwrctrl->cpwm, pwrctrl->alives));
+
+	_exit_pwrlock(&pwrctrl->lock);
+
+_func_exit_;
+
+#endif /*CONFIG_PWRCTRL*/
+
+	return _SUCCESS;
+}
+
+
+/*
+Caller: ISR
+
+If ISR's txdone,
+No more pkts for TX,
+Then driver shall call this fun. to power down firmware again.
+*/
+
+void rtw_unregister_tx_alive(_adapter *padapter)
+{
+#ifdef CONFIG_PWRCTRL
+
+	struct pwrctrl_priv *pwrctrl = &padapter->pwrctrlpriv;
+
+_func_enter_;
+
+	_enter_pwrlock(&pwrctrl->lock);
+
+	unregister_task_alive(pwrctrl, XMIT_ALIVE);
+
+	if((pwrctrl->cpwm > PS_STATE_S2) && (pwrctrl->pwr_mode > PS_MODE_ACTIVE)){
+		if(pwrctrl->alives == 0){
+			rtw_set_rpwm(padapter, PS_STATE_S0);
+		}
+	}
+
+	RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("rtw_unregister_tx_alive: cpwm:%d alives:%x\n", pwrctrl->cpwm, pwrctrl->alives));
+	
+	_exit_pwrlock(&pwrctrl->lock);
+
+_func_exit_;
+
+#endif /*CONFIG_PWRCTRL*/
+}
+
+/*
+Caller: ISR
+
+If ISR's txdone,
+No more pkts for TX,
+Then driver shall call this fun. to power down firmware again.
+*/
+
+void rtw_unregister_cmd_alive(_adapter *padapter)
+{
+#ifdef CONFIG_PWRCTRL
+
+	struct pwrctrl_priv *pwrctrl = &padapter->pwrctrlpriv;
+
+_func_enter_;
+
+	_enter_pwrlock(&pwrctrl->lock);
+
+	unregister_task_alive(pwrctrl, CMD_ALIVE);
+
+	if((pwrctrl->cpwm > PS_STATE_S2) && (pwrctrl->pwr_mode > PS_MODE_ACTIVE)){
+		if((pwrctrl->alives == 0)&&(check_fwstate(&padapter->mlmepriv, _FW_UNDER_LINKING)!=_TRUE)){
+			rtw_set_rpwm(padapter, PS_STATE_S0);
+		}
+	}
+
+	RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("rtw_unregister_cmd_alive: cpwm:%d alives:%x\n", pwrctrl->cpwm, pwrctrl->alives));
+
+	_exit_pwrlock(&pwrctrl->lock);
+
+_func_exit_;
+
+#endif /*CONFIG_PWRCTRL*/
+}
+
+
+/*
+
+Caller: ISR
+
+*/
+void rtw_unregister_rx_alive(_adapter *padapter)
+{
+#ifdef CONFIG_PWRCTRL
+
+	struct pwrctrl_priv *pwrctrl = &padapter->pwrctrlpriv;
+
+_func_enter_;
+
+	_enter_pwrlock(&pwrctrl->lock);
+
+	unregister_task_alive(pwrctrl, RECV_ALIVE);
+
+	RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("rtw_unregister_rx_alive: cpwm:%d alives:%x\n", pwrctrl->cpwm, pwrctrl->alives));
+	
+	_exit_pwrlock(&pwrctrl->lock);
+
+_func_exit_;
+
+#endif
+}
+
+
+void rtw_unregister_evt_alive(_adapter *padapter)
+{
+#ifdef CONFIG_PWRCTRL
+
+	struct pwrctrl_priv *pwrctrl = &padapter->pwrctrlpriv;
+
+_func_enter_;
+
+	_enter_pwrlock(&pwrctrl->lock);
+
+	unregister_task_alive(pwrctrl, EVT_ALIVE);
+
+	RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("rtw_unregister_evt_alive: cpwm:%d alives:%x\n", pwrctrl->cpwm, pwrctrl->alives));
+	
+	_exit_pwrlock(&pwrctrl->lock);
+
+_func_exit_;
+
+#endif /*CONFIG_PWRCTRL*/
+}
+
+#ifdef CONFIG_RESUME_IN_WORKQUEUE
+#ifdef CONFIG_USB_HCI
+extern int rtw_resume_process(struct usb_interface *pusb_intf);
+#endif
+static void resume_workitem_callback(struct work_struct *work)
+{
+	struct pwrctrl_priv *pwrpriv = container_of(work, struct pwrctrl_priv, resume_work);
+	_adapter *adapter = container_of(pwrpriv, _adapter, pwrctrlpriv);
+
+	DBG_871X("%s\n",__FUNCTION__);
+
+	#ifdef CONFIG_USB_HCI
+	rtw_resume_process(adapter->dvobjpriv.pusbintf);
+	#elif defined(CONFIG_PCI_HCI)
+	#endif
+	
+}
+
+void rtw_resume_in_workqueue(struct pwrctrl_priv *pwrpriv)
+{
+	// accquire system's suspend lock preventing from falliing asleep while resume in workqueue
+	rtw_lock_suspend();
+	
+	#if 1
+	queue_work(pwrpriv->rtw_workqueue, &pwrpriv->resume_work);	
+	#else
+	_set_workitem(&pwrpriv->resume_work);
+	#endif
+}
+#endif //CONFIG_RESUME_IN_WORKQUEUE
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+#ifdef CONFIG_USB_HCI
+extern int rtw_resume_process(struct usb_interface *pusb_intf);
+#endif
+static void rtw_early_suspend(struct early_suspend *h)
+{
+	struct pwrctrl_priv *pwrpriv = container_of(h, struct pwrctrl_priv, early_suspend);
+	DBG_871X("%s\n",__FUNCTION__);
+	
+	//jeff: do nothing but set do_late_resume to false
+	pwrpriv->do_late_resume = _FALSE;
+}
+
+static void rtw_late_resume(struct early_suspend *h)
+{
+	struct pwrctrl_priv *pwrpriv = container_of(h, struct pwrctrl_priv, early_suspend);
+	_adapter *adapter = container_of(pwrpriv, _adapter, pwrctrlpriv);
+
+	DBG_871X("%s\n",__FUNCTION__);
+	if(pwrpriv->do_late_resume) {
+		#ifdef CONFIG_USB_HCI
+		rtw_resume_process(adapter->dvobjpriv.pusbintf);
+		pwrpriv->do_late_resume = _FALSE;
+		#elif defined(CONFIG_PCI_HCI)
+		#endif
+	}
+}
+
+void rtw_register_early_suspend(struct pwrctrl_priv *pwrpriv)
+{
+	DBG_871X("%s\n", __FUNCTION__);
+
+	//jeff: set the early suspend level before blank screen, so we wll do late resume after scree is lit
+	pwrpriv->early_suspend.level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN - 20;
+	pwrpriv->early_suspend.suspend = rtw_early_suspend;
+	pwrpriv->early_suspend.resume = rtw_late_resume;
+	register_early_suspend(&pwrpriv->early_suspend);	
+
+	
+}
+
+void rtw_unregister_early_suspend(struct pwrctrl_priv *pwrpriv)
+{
+	DBG_871X("%s\n", __FUNCTION__);
+
+	pwrpriv->do_late_resume = _FALSE;
+
+	if (pwrpriv->early_suspend.suspend) 
+		unregister_early_suspend(&pwrpriv->early_suspend);
+
+	pwrpriv->early_suspend.suspend = NULL;
+	pwrpriv->early_suspend.resume = NULL;
+}
+#endif //CONFIG_HAS_EARLYSUSPEND
+
+#ifdef CONFIG_ANDROID_POWER
+#ifdef CONFIG_USB_HCI
+extern int rtw_resume_process(struct usb_interface *pusb_intf);
+#endif
+static void rtw_early_suspend(android_early_suspend_t *h)
+{
+	struct pwrctrl_priv *pwrpriv = container_of(h, struct pwrctrl_priv, early_suspend);
+	DBG_871X("%s\n",__FUNCTION__);
+	
+	//jeff: do nothing but set do_late_resume to false
+	pwrpriv->do_late_resume = _FALSE;
+}
+
+static void rtw_late_resume(android_early_suspend_t *h)
+{
+	struct pwrctrl_priv *pwrpriv = container_of(h, struct pwrctrl_priv, early_suspend);
+	_adapter *adapter = container_of(pwrpriv, _adapter, pwrctrlpriv);
+
+	DBG_871X("%s\n",__FUNCTION__);
+	if(pwrpriv->do_late_resume) {
+		#ifdef CONFIG_USB_HCI
+		rtw_resume_process(adapter->dvobjpriv.pusbintf);
+		pwrpriv->do_late_resume = _FALSE;
+		#elif defined(CONFIG_PCI_HCI)
+		#endif
+	}
+}
+
+void rtw_register_early_suspend(struct pwrctrl_priv *pwrpriv)
+{
+	DBG_871X("%s\n", __FUNCTION__);
+
+	//jeff: set the early suspend level before blank screen, so we wll do late resume after scree is lit
+	pwrpriv->early_suspend.level = ANDROID_EARLY_SUSPEND_LEVEL_BLANK_SCREEN - 20;
+	pwrpriv->early_suspend.suspend = rtw_early_suspend;
+	pwrpriv->early_suspend.resume = rtw_late_resume;
+	android_register_early_suspend(&pwrpriv->early_suspend);	
+}
+
+void rtw_unregister_early_suspend(struct pwrctrl_priv *pwrpriv)
+{
+	DBG_871X("%s\n", __FUNCTION__);
+
+	pwrpriv->do_late_resume = _FALSE;
+
+	if (pwrpriv->early_suspend.suspend) 
+		android_unregister_early_suspend(&pwrpriv->early_suspend);
+
+	pwrpriv->early_suspend.suspend = NULL;
+	pwrpriv->early_suspend.resume = NULL;
+}
+#endif //CONFIG_ANDROID_POWER
+
+u8 rtw_interface_ps_func(_adapter *padapter,HAL_INTF_PS_FUNC efunc_id,u8* val)
+{
+	u8 bResult = _TRUE;
+	if(padapter->HalFunc.interface_ps_func)
+	{
+		bResult = padapter->HalFunc.interface_ps_func(padapter,efunc_id,val);
+	}
+	return bResult;
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_recv.c linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_recv.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_recv.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_recv.c	2017-09-23 03:42:49.902675418 +0800
@@ -0,0 +1,4477 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+******************************************************************************/
+#define _RTW_RECV_C_
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <recv_osdep.h>
+#include <mlme_osdep.h>
+#include <ip.h>
+#include <if_ether.h>
+#include <ethernet.h>
+
+#ifdef CONFIG_USB_HCI
+#include <usb_ops.h>
+#endif
+
+#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
+
+#error "Shall be Linux or Windows, but not both!\n"
+
+#endif
+
+#include <wifi.h>
+#include <circ_buf.h>
+
+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
+void rtw_signal_stat_timer_hdl(RTW_TIMER_HDL_ARGS);
+#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
+
+
+void _rtw_init_sta_recv_priv(struct sta_recv_priv *psta_recvpriv)
+{
+
+
+_func_enter_;
+
+	_rtw_memset((u8 *)psta_recvpriv, 0, sizeof (struct sta_recv_priv));
+
+	_rtw_spinlock_init(&psta_recvpriv->lock);
+
+	//for(i=0; i<MAX_RX_NUMBLKS; i++)
+	//	_rtw_init_queue(&psta_recvpriv->blk_strms[i]);
+
+	_rtw_init_queue(&psta_recvpriv->defrag_q);
+
+_func_exit_;
+
+}
+
+sint _rtw_init_recv_priv(struct recv_priv *precvpriv, _adapter *padapter)
+{
+	sint i;
+
+	union recv_frame *precvframe;
+
+	sint	res=_SUCCESS;
+
+_func_enter_;
+
+	// We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc().
+	//_rtw_memset((unsigned char *)precvpriv, 0, sizeof (struct  recv_priv));
+
+	_rtw_spinlock_init(&precvpriv->lock);
+
+	_rtw_init_queue(&precvpriv->free_recv_queue);
+	_rtw_init_queue(&precvpriv->recv_pending_queue);
+
+	precvpriv->adapter = padapter;
+
+	precvpriv->free_recvframe_cnt = NR_RECVFRAME;
+
+	rtw_os_recv_resource_init(precvpriv, padapter);
+
+	precvpriv->pallocated_frame_buf = rtw_zvmalloc(NR_RECVFRAME * sizeof(union recv_frame) + RXFRAME_ALIGN_SZ);
+	
+	if(precvpriv->pallocated_frame_buf==NULL){
+		res= _FAIL;
+		goto exit;
+	}
+	//_rtw_memset(precvpriv->pallocated_frame_buf, 0, NR_RECVFRAME * sizeof(union recv_frame) + RXFRAME_ALIGN_SZ);
+
+	precvpriv->precv_frame_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(precvpriv->pallocated_frame_buf), RXFRAME_ALIGN_SZ);
+	//precvpriv->precv_frame_buf = precvpriv->pallocated_frame_buf + RXFRAME_ALIGN_SZ -
+	//						((SIZE_PTR) (precvpriv->pallocated_frame_buf) &(RXFRAME_ALIGN_SZ-1));
+
+	precvframe = (union recv_frame*) precvpriv->precv_frame_buf;
+
+
+	for(i=0; i < NR_RECVFRAME ; i++)
+	{
+		_rtw_init_listhead(&(precvframe->u.list));
+
+		rtw_list_insert_tail(&(precvframe->u.list), &(precvpriv->free_recv_queue.queue));
+
+		res = rtw_os_recv_resource_alloc(padapter, precvframe);
+
+		precvframe->u.hdr.adapter =padapter;
+		precvframe++;
+
+	}
+
+#ifdef CONFIG_USB_HCI
+
+	precvpriv->rx_pending_cnt=1;
+
+	_rtw_init_sema(&precvpriv->allrxreturnevt, 0);
+
+#endif
+
+	res = padapter->HalFunc.init_recv_priv(padapter);
+
+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
+	#ifdef PLATFORM_LINUX
+	_init_timer(&precvpriv->signal_stat_timer, padapter->pnetdev, RTW_TIMER_HDL_NAME(signal_stat), padapter);
+	#elif defined(PLATFORM_OS_CE) || defined(PLATFORM_WINDOWS)
+	_init_timer(&precvpriv->signal_stat_timer, padapter->hndis_adapter, RTW_TIMER_HDL_NAME(signal_stat), padapter);
+	#endif
+
+	precvpriv->signal_stat_sampling_interval = 1000; //ms
+	//precvpriv->signal_stat_converging_constant = 5000; //ms
+
+	rtw_set_signal_stat_timer(precvpriv);
+#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
+
+exit:
+
+_func_exit_;
+
+	return res;
+
+}
+
+void rtw_mfree_recv_priv_lock(struct recv_priv *precvpriv)
+{
+	_rtw_spinlock_free(&precvpriv->lock);
+#ifdef CONFIG_RECV_THREAD_MODE	
+	_rtw_free_sema(&precvpriv->recv_sema);
+	_rtw_free_sema(&precvpriv->terminate_recvthread_sema);
+#endif
+
+	_rtw_spinlock_free(&precvpriv->free_recv_queue.lock);
+	_rtw_spinlock_free(&precvpriv->recv_pending_queue.lock);
+
+	_rtw_spinlock_free(&precvpriv->free_recv_buf_queue.lock);
+
+#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX
+	_rtw_spinlock_free(&precvpriv->recv_buf_pending_queue.lock);
+#endif	// CONFIG_USE_USB_BUFFER_ALLOC_RX
+}
+
+void _rtw_free_recv_priv (struct recv_priv *precvpriv)
+{
+	_adapter	*padapter = precvpriv->adapter;
+
+_func_enter_;
+
+	rtw_mfree_recv_priv_lock(precvpriv);
+
+	rtw_os_recv_resource_free(precvpriv);
+
+	if(precvpriv->pallocated_frame_buf) {
+		rtw_vmfree(precvpriv->pallocated_frame_buf, NR_RECVFRAME * sizeof(union recv_frame) + RXFRAME_ALIGN_SZ);
+	}
+
+	padapter->HalFunc.free_recv_priv(padapter);
+
+_func_exit_;
+
+}
+
+union recv_frame *rtw_alloc_recvframe (_queue *pfree_recv_queue)
+{
+	_irqL irqL;
+	union recv_frame  *precvframe;
+	_list	*plist, *phead;
+	_adapter *padapter;
+	struct recv_priv *precvpriv;
+_func_enter_;
+
+	_enter_critical_bh(&pfree_recv_queue->lock, &irqL);
+
+	if(_rtw_queue_empty(pfree_recv_queue) == _TRUE)
+	{
+		precvframe = NULL;
+	}
+	else
+	{
+		phead = get_list_head(pfree_recv_queue);
+
+		plist = get_next(phead);
+
+		precvframe = LIST_CONTAINOR(plist, union recv_frame, u);
+
+		rtw_list_delete(&precvframe->u.hdr.list);
+		padapter=precvframe->u.hdr.adapter;
+		if(padapter !=NULL){
+			precvpriv=&padapter->recvpriv;
+			if(pfree_recv_queue == &precvpriv->free_recv_queue)
+				precvpriv->free_recvframe_cnt--;
+		}
+	}
+
+	_exit_critical_bh(&pfree_recv_queue->lock, &irqL);
+
+_func_exit_;
+
+	return precvframe;
+
+}
+
+
+void rtw_init_recvframe(union recv_frame *precvframe, struct recv_priv *precvpriv)
+{
+	struct recv_buf *precvbuf = precvframe->u.hdr.precvbuf;
+
+	/* Perry: This can be removed */
+	_rtw_init_listhead(&precvframe->u.hdr.list);
+
+	precvframe->u.hdr.len=0;
+
+
+}
+
+
+int rtw_free_recvframe(union recv_frame *precvframe, _queue *pfree_recv_queue)
+{
+	_irqL irqL;
+	_adapter *padapter=precvframe->u.hdr.adapter;
+	struct recv_priv *precvpriv = &padapter->recvpriv;
+
+_func_enter_;
+
+
+#ifdef PLATFORM_WINDOWS
+	rtw_os_read_port(padapter, precvframe->u.hdr.precvbuf);
+#endif
+
+#ifdef PLATFORM_LINUX
+
+	if(precvframe->u.hdr.pkt)
+	{
+		dev_kfree_skb_any(precvframe->u.hdr.pkt);//free skb by driver
+		precvframe->u.hdr.pkt = NULL;
+	}
+
+#ifdef CONFIG_SDIO_HCI
+{
+	_irqL irql;
+	struct recv_buf *precvbuf=precvframe->u.hdr.precvbuf;
+	if(precvbuf !=NULL){
+		_enter_critical_bh(&precvbuf->recvbuf_lock, &irql);
+
+		precvbuf->ref_cnt--;
+		if(precvbuf->ref_cnt == 0 ){
+			_enter_critical_bh(&precvpriv->free_recv_buf_queue.lock, &irqL);
+			rtw_list_delete(&(precvbuf->list));
+			rtw_list_insert_tail(&(precvbuf->list), get_list_head(&precvpriv->free_recv_buf_queue));
+			precvpriv->free_recv_buf_queue_cnt++;
+			_exit_critical_bh(&precvpriv->free_recv_buf_queue.lock, &irqL);
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_notice_,("rtw_os_read_port: precvbuf=0x%p enqueue:precvpriv->free_recv_buf_queue_cnt=%d\n",precvbuf,precvpriv->free_recv_buf_queue_cnt));
+		}
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_notice_,("rtw_os_read_port: precvbuf=0x%p enqueue:precvpriv->free_recv_buf_queue_cnt=%d\n",precvbuf,precvpriv->free_recv_buf_queue_cnt));
+		_exit_critical_bh(&precvbuf->recvbuf_lock, &irql);
+	}
+}
+#endif
+#endif
+
+	_enter_critical_bh(&pfree_recv_queue->lock, &irqL);
+
+	rtw_list_delete(&(precvframe->u.hdr.list));
+
+	rtw_list_insert_tail(&(precvframe->u.hdr.list), get_list_head(pfree_recv_queue));
+
+	if(padapter !=NULL){
+		if(pfree_recv_queue == &precvpriv->free_recv_queue)
+				precvpriv->free_recvframe_cnt++;
+	}
+
+      _exit_critical_bh(&pfree_recv_queue->lock, &irqL);
+
+_func_exit_;
+
+	return _SUCCESS;
+
+}
+
+
+union recv_frame *rtw_dequeue_recvframe (_queue *queue)
+{
+	return rtw_alloc_recvframe(queue);
+}
+
+
+sint rtw_enqueue_recvframe(union recv_frame *precvframe, _queue *queue)
+{
+	_irqL irqL;
+	_adapter *padapter=precvframe->u.hdr.adapter;
+	struct recv_priv *precvpriv = &padapter->recvpriv;
+
+_func_enter_;
+
+
+	//_spinlock(&pfree_recv_queue->lock);
+	_enter_critical_bh(&queue->lock, &irqL);
+
+	//_rtw_init_listhead(&(precvframe->u.hdr.list));
+	rtw_list_delete(&(precvframe->u.hdr.list));
+
+
+	rtw_list_insert_tail(&(precvframe->u.hdr.list), get_list_head(queue));
+
+	if (padapter != NULL) {
+		if (queue == &precvpriv->free_recv_queue)
+			precvpriv->free_recvframe_cnt++;
+	}
+
+	//_rtw_spinunlock(&pfree_recv_queue->lock);
+	_exit_critical_bh(&queue->lock, &irqL);
+
+
+_func_exit_;
+
+	return _SUCCESS;
+}
+
+/*
+sint	rtw_enqueue_recvframe(union recv_frame *precvframe, _queue *queue)
+{
+	return rtw_free_recvframe(precvframe, queue);
+}
+*/
+
+
+
+
+/*
+caller : defrag ; recvframe_chk_defrag in recv_thread  (passive)
+pframequeue: defrag_queue : will be accessed in recv_thread  (passive)
+
+using spinlock to protect
+
+*/
+
+void rtw_free_recvframe_queue(_queue *pframequeue,  _queue *pfree_recv_queue)
+{
+	union	recv_frame 	*precvframe;
+	_list	*plist, *phead;
+
+_func_enter_;
+	_rtw_spinlock(&pframequeue->lock);
+
+	phead = get_list_head(pframequeue);
+	plist = get_next(phead);
+
+	while(rtw_end_of_queue_search(phead, plist) == _FALSE)
+	{
+		precvframe = LIST_CONTAINOR(plist, union recv_frame, u);
+
+		plist = get_next(plist);
+
+		//rtw_list_delete(&precvframe->u.hdr.list); // will do this in rtw_free_recvframe()
+
+		rtw_free_recvframe(precvframe, pfree_recv_queue);
+	}
+
+	_rtw_spinunlock(&pframequeue->lock);
+
+_func_exit_;
+
+}
+
+sint rtw_enqueue_recvbuf(struct recv_buf *precvbuf, _queue *queue)
+{
+	_irqL irqL;	
+
+	_enter_critical(&queue->lock, &irqL);
+
+	rtw_list_delete(&precvbuf->list);
+
+	rtw_list_insert_tail(&precvbuf->list, get_list_head(queue));
+	
+	_exit_critical(&queue->lock, &irqL);
+
+
+	return _SUCCESS;
+	
+}
+
+struct recv_buf *rtw_dequeue_recvbuf (_queue *queue)
+{
+	_irqL irqL;
+	struct recv_buf *precvbuf;
+	_list	*plist, *phead;	
+
+	_enter_critical(&queue->lock, &irqL);
+
+	if(_rtw_queue_empty(queue) == _TRUE)
+	{
+		precvbuf = NULL;
+	}
+	else
+	{
+		phead = get_list_head(queue);
+
+		plist = get_next(phead);
+
+		precvbuf = LIST_CONTAINOR(plist, struct recv_buf, list);
+
+		rtw_list_delete(&precvbuf->list);
+		
+	}
+
+	_exit_critical(&queue->lock, &irqL);
+
+
+	return precvbuf;
+
+}
+
+static sint recvframe_chkmic(_adapter *adapter,  union recv_frame *precvframe){
+
+	sint	i,res=_SUCCESS;
+	u32	datalen;
+	u8	miccode[8];
+	u8	bmic_err=_FALSE,brpt_micerror = _TRUE;
+	u8	*pframe, *payload,*pframemic;
+	u8	*mickey,*iv,rxdata_key_idx;
+	struct	sta_info		*stainfo;
+	struct	rx_pkt_attrib	*prxattrib=&precvframe->u.hdr.attrib;
+	struct 	security_priv	*psecuritypriv=&adapter->securitypriv;
+
+	struct mlme_ext_priv	*pmlmeext = &adapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+_func_enter_;
+
+	stainfo=rtw_get_stainfo(&adapter->stapriv ,&prxattrib->ta[0]);
+
+	if(prxattrib->encrypt ==_TKIP_)
+	{
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n recvframe_chkmic:prxattrib->encrypt ==_TKIP_\n"));
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n recvframe_chkmic:da=0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n",
+			prxattrib->ra[0],prxattrib->ra[1],prxattrib->ra[2],prxattrib->ra[3],prxattrib->ra[4],prxattrib->ra[5]));
+
+		//calculate mic code
+		if(stainfo!= NULL)
+		{
+			if(IS_MCAST(prxattrib->ra))
+			{
+				//mickey=&psecuritypriv->dot118021XGrprxmickey.skey[0];
+				//iv = precvframe->u.hdr.rx_data+prxattrib->hdrlen;
+				//rxdata_key_idx =( ((iv[3])>>6)&0x3) ;
+				mickey=&psecuritypriv->dot118021XGrprxmickey[prxattrib->key_index].skey[0];
+				
+				RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n recvframe_chkmic: bcmc key \n"));
+				//DBG_8192C("\n recvframe_chkmic: bcmc key psecuritypriv->dot118021XGrpKeyid(%d),pmlmeinfo->key_index(%d) ,recv key_id(%d)\n",
+				//								psecuritypriv->dot118021XGrpKeyid,pmlmeinfo->key_index,rxdata_key_idx);
+				
+				if(psecuritypriv->binstallGrpkey==_FALSE)
+				{
+					res=_FAIL;
+					RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n recvframe_chkmic:didn't install group key!!!!!!!!!!\n"));
+					DBG_8192C("\n recvframe_chkmic:didn't install group key!!!!!!!!!!\n");
+					goto exit;
+				}
+			}
+			else{
+				mickey=&stainfo->dot11tkiprxmickey.skey[0];
+				RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n recvframe_chkmic: unicast key \n"));
+			}
+
+			datalen=precvframe->u.hdr.len-prxattrib->hdrlen-prxattrib->iv_len-prxattrib->icv_len-8;//icv_len included the mic code
+			pframe=precvframe->u.hdr.rx_data;
+			payload=pframe+prxattrib->hdrlen+prxattrib->iv_len;
+
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n prxattrib->iv_len=%d prxattrib->icv_len=%d\n",prxattrib->iv_len,prxattrib->icv_len));
+
+			//rtw_seccalctkipmic(&stainfo->dot11tkiprxmickey.skey[0],pframe,payload, datalen ,&miccode[0],(unsigned char)prxattrib->priority); //care the length of the data
+
+			rtw_seccalctkipmic(mickey,pframe,payload, datalen ,&miccode[0],(unsigned char)prxattrib->priority); //care the length of the data
+
+			pframemic=payload+datalen;
+
+			bmic_err=_FALSE;
+
+			for(i=0;i<8;i++){
+				if(miccode[i] != *(pframemic+i)){
+					RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvframe_chkmic:miccode[%d](%02x) != *(pframemic+%d)(%02x) ",i,miccode[i],i,*(pframemic+i)));
+					bmic_err=_TRUE;
+				}
+			}
+
+
+			if(bmic_err==_TRUE){
+
+				RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n *(pframemic-8)-*(pframemic-1)=0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n",
+					*(pframemic-8),*(pframemic-7),*(pframemic-6),*(pframemic-5),*(pframemic-4),*(pframemic-3),*(pframemic-2),*(pframemic-1)));
+				RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n *(pframemic-16)-*(pframemic-9)=0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n",
+					*(pframemic-16),*(pframemic-15),*(pframemic-14),*(pframemic-13),*(pframemic-12),*(pframemic-11),*(pframemic-10),*(pframemic-9)));
+
+				{
+					uint i;
+					RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n ======demp packet (len=%d)======\n",precvframe->u.hdr.len));
+					for(i=0;i<precvframe->u.hdr.len;i=i+8){
+						RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x",
+							*(precvframe->u.hdr.rx_data+i),*(precvframe->u.hdr.rx_data+i+1),
+							*(precvframe->u.hdr.rx_data+i+2),*(precvframe->u.hdr.rx_data+i+3),
+							*(precvframe->u.hdr.rx_data+i+4),*(precvframe->u.hdr.rx_data+i+5),
+							*(precvframe->u.hdr.rx_data+i+6),*(precvframe->u.hdr.rx_data+i+7)));
+					}
+					RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n ======demp packet end [len=%d]======\n",precvframe->u.hdr.len));
+					RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n hrdlen=%d, \n",prxattrib->hdrlen));
+				}
+
+				RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("ra=0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x psecuritypriv->binstallGrpkey=%d ",
+					prxattrib->ra[0],prxattrib->ra[1],prxattrib->ra[2],
+					prxattrib->ra[3],prxattrib->ra[4],prxattrib->ra[5],psecuritypriv->binstallGrpkey));
+
+				// double check key_index for some timing issue ,
+				// cannot compare with psecuritypriv->dot118021XGrpKeyid also cause timing issue
+				if((IS_MCAST(prxattrib->ra)==_TRUE)  && (prxattrib->key_index != pmlmeinfo->key_index ))
+					brpt_micerror = _FALSE;
+				
+				if((prxattrib->bdecrypted ==_TRUE)&& (brpt_micerror == _TRUE))
+				{
+					rtw_handle_tkip_mic_err(adapter,(u8)IS_MCAST(prxattrib->ra));
+					RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" mic error :prxattrib->bdecrypted=%d ",prxattrib->bdecrypted));
+					DBG_8192C(" mic error :prxattrib->bdecrypted=%d\n",prxattrib->bdecrypted);
+				}
+				else
+				{
+					RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" mic error :prxattrib->bdecrypted=%d ",prxattrib->bdecrypted));
+					DBG_8192C(" mic error :prxattrib->bdecrypted=%d\n",prxattrib->bdecrypted);
+				}
+
+				res=_FAIL;
+
+			}
+			else{
+				//mic checked ok
+				if((psecuritypriv->bcheck_grpkey ==_FALSE)&&(IS_MCAST(prxattrib->ra)==_TRUE)){
+					psecuritypriv->bcheck_grpkey =_TRUE;
+					RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("psecuritypriv->bcheck_grpkey =_TRUE"));
+				}
+			}
+
+		}
+		else
+		{
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvframe_chkmic: rtw_get_stainfo==NULL!!!\n"));
+		}
+
+		recvframe_pull_tail(precvframe, 8);
+
+	}
+
+exit:
+
+_func_exit_;
+
+	return res;
+
+}
+
+//decrypt and set the ivlen,icvlen of the recv_frame
+static union recv_frame * decryptor(_adapter *padapter,union recv_frame *precv_frame)
+{
+
+	struct rx_pkt_attrib *prxattrib = &precv_frame->u.hdr.attrib;
+	struct security_priv *psecuritypriv=&padapter->securitypriv;
+	union recv_frame *return_packet=precv_frame;
+
+_func_enter_;
+
+	RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("prxstat->decrypted=%x prxattrib->encrypt = 0x%03x\n",prxattrib->bdecrypted,prxattrib->encrypt));
+
+	if(prxattrib->encrypt>0)
+	{
+		u8 *iv = precv_frame->u.hdr.rx_data+prxattrib->hdrlen;
+		prxattrib->key_index = ( ((iv[3])>>6)&0x3) ;
+
+		if(prxattrib->key_index > WEP_KEYS)
+		{
+			DBG_871X("prxattrib->key_index(%d) > WEP_KEYS \n", prxattrib->key_index);
+
+			switch(prxattrib->encrypt){
+				case _WEP40_:
+				case _WEP104_:
+					prxattrib->key_index = psecuritypriv->dot11PrivacyKeyIndex;
+					break;
+				case _TKIP_:			
+				case _AES_:						
+				default:
+					prxattrib->key_index = psecuritypriv->dot118021XGrpKeyid;
+					break;
+			}	
+		}			
+	}
+
+	if((prxattrib->encrypt>0) && ((prxattrib->bdecrypted==0) ||(psecuritypriv->sw_decrypt==_TRUE)))
+	{
+		psecuritypriv->hw_decrypted=_FALSE;
+
+		#ifdef DBG_RX_DECRYPTOR
+		DBG_871X("prxstat->bdecrypted:%d,  prxattrib->encrypt:%d,  Setting psecuritypriv->hw_decrypted = %d\n"
+			, prxattrib->bdecrypted ,prxattrib->encrypt, psecuritypriv->hw_decrypted);
+		#endif
+
+		switch(prxattrib->encrypt){
+		case _WEP40_:
+		case _WEP104_:
+			rtw_wep_decrypt(padapter, (u8 *)precv_frame);
+			break;
+		case _TKIP_:
+			rtw_tkip_decrypt(padapter, (u8 *)precv_frame);
+			break;
+		case _AES_:
+			rtw_aes_decrypt(padapter, (u8 * )precv_frame);
+			break;
+		default:
+				break;
+		}
+	}
+	else if(prxattrib->bdecrypted==1
+		&& prxattrib->encrypt >0
+		&& (psecuritypriv->busetkipkey==1 || prxattrib->encrypt !=_TKIP_ )
+		)
+	{
+#if 0
+		if((prxstat->icv==1)&&(prxattrib->encrypt!=_AES_))
+		{
+			psecuritypriv->hw_decrypted=_FALSE;
+
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("psecuritypriv->hw_decrypted=_FALSE"));
+
+			rtw_free_recvframe(precv_frame, &padapter->recvpriv.free_recv_queue);
+
+			return_packet=NULL;
+
+		}
+		else
+#endif
+		{
+			psecuritypriv->hw_decrypted=_TRUE;
+			#ifdef DBG_RX_DECRYPTOR
+			DBG_871X("prxstat->bdecrypted:%d,  prxattrib->encrypt:%d,  Setting psecuritypriv->hw_decrypted = %d\n"
+			, prxattrib->bdecrypted ,prxattrib->encrypt, psecuritypriv->hw_decrypted);
+			#endif
+
+		}
+	}
+	else {
+		#ifdef DBG_RX_DECRYPTOR
+		DBG_871X("prxstat->bdecrypted:%d,  prxattrib->encrypt:%d,  psecuritypriv->hw_decrypted:%d\n"
+		, prxattrib->bdecrypted ,prxattrib->encrypt, psecuritypriv->hw_decrypted);
+		#endif
+	}
+
+	//recvframe_chkmic(adapter, precv_frame);   //move to recvframme_defrag function
+
+_func_exit_;
+
+	return return_packet;
+
+}
+//###set the security information in the recv_frame
+static union recv_frame * portctrl(_adapter *adapter,union recv_frame * precv_frame)
+{
+	u8   *psta_addr,*ptr;
+	uint  auth_alg;
+	struct recv_frame_hdr *pfhdr;
+	struct sta_info * psta;
+	struct sta_priv *pstapriv ;
+	union recv_frame * prtnframe;
+	u16	ether_type=0;
+	u16  eapol_type = 0x888e;//for Funia BD's WPA issue  
+	struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib;
+
+_func_enter_;
+
+	pstapriv = &adapter->stapriv;
+	ptr = get_recvframe_data(precv_frame);
+	pfhdr = &precv_frame->u.hdr;
+	psta_addr = pfhdr->attrib.ta;
+	psta = rtw_get_stainfo(pstapriv, psta_addr);
+
+	auth_alg = adapter->securitypriv.dot11AuthAlgrthm;
+
+	RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("########portctrl:adapter->securitypriv.dot11AuthAlgrthm= 0x%d\n",adapter->securitypriv.dot11AuthAlgrthm));
+
+	if(auth_alg==2)
+	{
+		if ((psta!=NULL) && (psta->ieee8021x_blocked))
+		{
+			//blocked
+			//only accept EAPOL frame
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("########portctrl:psta->ieee8021x_blocked==1\n"));
+
+			prtnframe=precv_frame;
+
+			//get ether_type
+			ptr=ptr+pfhdr->attrib.hdrlen+pfhdr->attrib.iv_len+LLC_HEADER_SIZE;
+			_rtw_memcpy(&ether_type,ptr, 2);
+			ether_type= ntohs((unsigned short )ether_type);
+
+		        if (ether_type == eapol_type) {
+				prtnframe=precv_frame;
+			}
+			else {
+				//free this frame
+				rtw_free_recvframe(precv_frame, &adapter->recvpriv.free_recv_queue);
+				prtnframe=NULL;
+			}
+		}
+		else
+		{
+			//allowed
+			//check decryption status, and decrypt the frame if needed
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("########portctrl:psta->ieee8021x_blocked==0\n"));
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("portctrl:precv_frame->hdr.attrib.privacy=%x\n",precv_frame->u.hdr.attrib.privacy));
+
+			if(pattrib->bdecrypted==0)
+				RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("portctrl:prxstat->decrypted=%x\n", pattrib->bdecrypted));
+
+			prtnframe=precv_frame;
+			//check is the EAPOL frame or not (Rekey)
+			if(ether_type == eapol_type){
+
+				RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("########portctrl:ether_type == 0x888e\n"));
+				//check Rekey
+
+				prtnframe=precv_frame;
+			}
+			else{
+				RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("########portctrl:ether_type = 0x%.4x\n",ether_type));
+			}
+		}
+	}
+	else
+	{
+		prtnframe=precv_frame;
+	}
+
+_func_exit_;
+
+		return prtnframe;
+
+}
+
+static sint recv_decache(union recv_frame *precv_frame, u8 bretry, struct stainfo_rxcache *prxcache)
+{
+	sint tid = precv_frame->u.hdr.attrib.priority;
+
+	u16 seq_ctrl = ( (precv_frame->u.hdr.attrib.seq_num&0xffff) << 4) |
+		(precv_frame->u.hdr.attrib.frag_num & 0xf);
+
+_func_enter_;
+
+	if(tid>15)
+	{
+		RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("recv_decache, (tid>15)! seq_ctrl=0x%x, tid=0x%x\n", seq_ctrl, tid));
+
+		return _FAIL;
+	}
+
+	if(1)//if(bretry)
+	{
+		if(seq_ctrl == prxcache->tid_rxseq[tid])
+		{
+			RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("recv_decache, seq_ctrl=0x%x, tid=0x%x, tid_rxseq=0x%x\n", seq_ctrl, tid, prxcache->tid_rxseq[tid]));
+
+			return _FAIL;
+		}
+	}
+
+	prxcache->tid_rxseq[tid] = seq_ctrl;
+
+_func_exit_;
+
+	return _SUCCESS;
+
+}
+
+static void process_pwrbit_data(_adapter *padapter, union recv_frame *precv_frame)
+{
+#ifdef CONFIG_AP_MODE
+	unsigned char pwrbit;
+	u8 *ptr = precv_frame->u.hdr.rx_data;
+	struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib;
+	struct sta_priv *pstapriv = &padapter->stapriv;
+	struct sta_info *psta=NULL;
+
+	psta = rtw_get_stainfo(pstapriv, pattrib->src);
+
+	pwrbit = GetPwrMgt(ptr);
+
+	if(psta)
+	{
+		if(pwrbit)
+		{
+			psta->state |= WIFI_SLEEP_STATE;
+			pstapriv->sta_dz_bitmap |= BIT(psta->aid);
+			//DBG_871X("to sleep, sta_dz_bitmap=%x\n", pstapriv->sta_dz_bitmap);
+		}
+		else
+		{
+			if(psta->state & WIFI_SLEEP_STATE)
+			{
+				psta->state ^= WIFI_SLEEP_STATE;
+
+				pstapriv->sta_dz_bitmap &= ~BIT(psta->aid);
+				
+				//DBG_871X("to wakeup, sta_dz_bitmap=%x\n", pstapriv->sta_dz_bitmap);
+				wakeup_sta_to_xmit(padapter, psta);
+
+			}
+		}
+
+	}
+
+#endif
+}
+
+static void process_wmmps_data(_adapter *padapter, union recv_frame *precv_frame)
+{
+#ifdef CONFIG_AP_MODE		
+	struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib;
+	struct sta_priv *pstapriv = &padapter->stapriv;
+	struct sta_info *psta=NULL;
+
+	psta = rtw_get_stainfo(pstapriv, pattrib->src);
+	
+	if(!psta) return;
+
+	if(!psta->qos_option)
+		return;
+
+	if(!(psta->qos_info&0xf))
+		return;
+		
+
+	if(psta->state&WIFI_SLEEP_STATE)
+	{
+		u8 wmmps_ac=0;	
+		
+		switch(pattrib->priority)
+		{
+			case 1:
+			case 2:
+				wmmps_ac = psta->uapsd_bk&BIT(1);
+				break;
+			case 4:
+			case 5:
+				wmmps_ac = psta->uapsd_vi&BIT(1);
+				break;
+			case 6:
+			case 7:
+				wmmps_ac = psta->uapsd_vo&BIT(1);
+				break;
+			case 0:
+			case 3:
+			default:
+				wmmps_ac = psta->uapsd_be&BIT(1);
+				break;	
+		}
+
+		if(wmmps_ac)
+		{
+			if(psta->sleepq_ac_len>0)
+			{
+				//process received triggered frame
+				xmit_delivery_enabled_frames(padapter, psta);
+			}
+			else
+			{
+				//issue one qos null frame with More data bit = 0 and the EOSP bit set (=1)
+				issue_qos_nulldata(padapter, psta->hwaddr, (u16)pattrib->priority);
+			}
+		}
+				
+	}
+
+	
+#endif	
+
+}
+
+#ifdef CONFIG_TDLS
+sint On_TDLS_Setup_Req(_adapter *adapter, union recv_frame *precv_frame)
+{
+	u8 *psa, *pmyid;
+	struct sta_info *ptdls_sta= NULL;
+   	struct sta_priv *pstapriv = &adapter->stapriv;
+	u8 *ptr = precv_frame->u.hdr.rx_data;
+	struct mlme_ext_priv	*pmlmeext = &(adapter->mlmeextpriv);	
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct security_priv *psecuritypriv = &adapter->securitypriv;
+	_irqL irqL;
+	struct rx_pkt_attrib	*prx_pkt_attrib = &precv_frame->u.hdr.attrib;
+	u8 *pdialog , *prsnie, *ppairwise_cipher;
+	u8 i, k, pairwise_count;
+	u8 ccmp_have=0, rsnie_have=0;
+	u16 j;
+	u8 SNonce[32];
+	u32 *timeout_interval;
+	sint parsing_length;	//frame body length, without icv_len
+	PNDIS_802_11_VARIABLE_IEs	pIE;
+	u8 FIXED_IE = 5;
+
+	psa = get_sa(ptr);
+	ptdls_sta = rtw_get_stainfo(pstapriv, psa);
+	
+	pmyid=myid(&(adapter->eeprompriv));
+	ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE+1;
+	parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len
+			-prx_pkt_attrib->hdrlen
+			-prx_pkt_attrib->iv_len
+			-prx_pkt_attrib->icv_len
+			-LLC_HEADER_SIZE
+			-TYPE_LENGTH_FIELD_SIZE
+			-1
+			-FIXED_IE;
+
+	if(ptdls_sta==NULL ||(ptdls_sta->state&TDLS_LINKED_STATE)==TDLS_LINKED_STATE)
+	{
+		if(ptdls_sta==NULL){
+			ptdls_sta = rtw_alloc_stainfo(pstapriv, psa);
+		}else{
+			//If the direct link is already set up
+			//Process as re-setup after tear down		
+			DBG_8192C("re-setup a direct link\n");
+		}
+		
+		if(ptdls_sta) 
+		{
+			//copy dialog token
+			pdialog=ptr+2;
+			//rx_pkt_pattrib->frag_num is used to fill dialog token
+			_rtw_memcpy(&(prx_pkt_attrib->frag_num), pdialog, 1);
+
+			//parsing information element
+			for(j=FIXED_IE; j<parsing_length;){
+	
+				pIE = (PNDIS_802_11_VARIABLE_IEs)(ptr+ j);
+
+				switch (pIE->ElementID)
+				{
+					case _SUPPORTEDRATES_IE_:
+						break;
+					case _COUNTRY_IE_:
+						break;
+					case _EXT_SUPPORTEDRATES_IE_:
+						break;
+					case _SUPPORTED_CH_IE_:
+						break;
+					case _RSN_IE_2_:
+						rsnie_have=1;
+						if(prx_pkt_attrib->encrypt){
+							prsnie=(u8*)pIE;
+							//check whether initiator STA has CCMP pairwise_cipher.
+							ppairwise_cipher=prsnie+10;
+							_rtw_memcpy(&pairwise_count, (u16*)(ppairwise_cipher-2), 1);
+							for(k=0;k<pairwise_count;k++){
+								if(_rtw_memcmp( ppairwise_cipher+4*k, RSN_CIPHER_SUITE_CCMP, 4)==_TRUE)
+									ccmp_have=1;
+							}
+							if(ccmp_have==0){
+								//invalid contents of RSNIE
+								ptdls_sta->stat_code=72;
+							}
+						}
+						break;
+					case _EXT_CAP_IE_:
+						break;
+					case _VENDOR_SPECIFIC_IE_:
+						break;
+					case _FTIE_:
+						if(prx_pkt_attrib->encrypt)
+							_rtw_memcpy(SNonce, (ptr+j+52), 32);
+						break;
+					case _TIMEOUT_ITVL_IE_:
+						if(prx_pkt_attrib->encrypt)
+							timeout_interval = (u32 *)(ptr+j+3);
+						break;
+					case _RIC_Descriptor_IE_:
+						break;
+					case _HT_CAPABILITY_IE_:
+						break;
+					case EID_BSSCoexistence:
+						break;
+					case _LINK_ID_IE_:
+						break;
+					default:
+						break;
+				}
+	
+				j += (pIE->Length + 2);
+				
+			}
+
+			//check status code
+			//if responder STA has/hasn't security on AP, but request hasn't/has RSNIE, it should reject
+			if((rsnie_have && (prx_pkt_attrib->encrypt))||
+			   (rsnie_have==0 && (prx_pkt_attrib->encrypt==0))){
+				ptdls_sta->stat_code=0;
+			}else if(rsnie_have && (prx_pkt_attrib->encrypt==0)){
+				//security disabled
+				ptdls_sta->stat_code=5;
+			}else if(rsnie_have==0 && (prx_pkt_attrib->encrypt)){
+				//request haven't RSNIE
+				ptdls_sta->stat_code=38;
+			}
+			
+			ptdls_sta->state|= TDLS_INITIATOR_STATE;
+			ptdls_sta->aid=*(pdialog);
+			if(prx_pkt_attrib->encrypt){
+				_rtw_memcpy(ptdls_sta->SNonce, SNonce, 32);
+				_rtw_memcpy(&(ptdls_sta->TDLS_PeerKey_Lifetime), timeout_interval, 4);
+			}
+			_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);		
+			pmlmeinfo->tdls_sta_cnt++;
+			_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);	
+		}
+		else
+		{
+			goto _exit_recv_tdls_frame;
+		}
+	}
+	//already receiving TDLS setup request
+	else if(ptdls_sta->state==TDLS_INITIATOR_STATE){
+		DBG_8192C("receive duplicated TDLS setup request frame in handshaking\n");
+		goto _exit_recv_tdls_frame;
+	}
+	//When receiving and sending setup_req to the same link at the same time, STA with higher MAC_addr would be initiator
+	//following is to check out MAC_addr
+	else if(ptdls_sta->state==TDLS_RESPONDER_STATE){
+		DBG_8192C("receive setup_req after sending setUP_req\n");
+		for (i=0;i<6;i++){
+			if(*(pmyid+i)==*(psa+i)){
+			}
+			else if(*(pmyid+i)>*(psa+i)){
+				goto _exit_recv_tdls_frame;
+			}else if(*(pmyid+i)<*(psa+i)){
+				ptdls_sta->state=TDLS_INITIATOR_STATE;
+				ptdls_sta->aid=*(pdialog);
+				break;
+			}
+		}
+	}
+
+	issue_tdls_setup_rsp(adapter, precv_frame);
+
+_exit_recv_tdls_frame:
+	
+	return _FAIL;
+}
+
+
+sint On_TDLS_Setup_Rsp(_adapter *adapter, union recv_frame *precv_frame)
+{
+	struct sta_info *ptdls_sta= NULL;
+   	struct sta_priv *pstapriv = &adapter->stapriv;
+	u8 *ptr = precv_frame->u.hdr.rx_data;
+	_irqL irqL;
+	struct rx_pkt_attrib	*prx_pkt_attrib = &precv_frame->u.hdr.attrib;
+	u8 *psa, *pdialog;
+	u16 stat_code;
+	struct mlme_ext_priv	*pmlmeext = &(adapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	sint parsing_length;	//frame body length, without icv_len
+	PNDIS_802_11_VARIABLE_IEs	pIE;
+	u8 FIXED_IE =7;
+	u8  *pftie, *ptimeout_ie, *plinkid_ie, *prsnie, *pftie_mic, *ppairwise_cipher;
+	u16 pairwise_count, j, k;
+	u8 verify_ccmp=0;
+	
+	psa = get_sa(ptr);
+	ptdls_sta = rtw_get_stainfo(pstapriv, psa);
+
+	ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE+1;
+	parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len
+			-prx_pkt_attrib->hdrlen
+			-prx_pkt_attrib->iv_len
+			-prx_pkt_attrib->icv_len
+			-LLC_HEADER_SIZE
+			-TYPE_LENGTH_FIELD_SIZE
+			-1
+			-FIXED_IE;
+	_rtw_memcpy(&stat_code, ptr+2, 2);
+
+	pdialog=ptr+4;
+	//rx_pkt_pattrib->frag_num is used to fill dialog token
+	_rtw_memcpy(&(prx_pkt_attrib->frag_num), pdialog, 1);
+
+	if(stat_code!=0){
+		_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);	
+		pmlmeinfo->tdls_sta_cnt--;
+		_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
+		rtw_free_stainfo(adapter,  ptdls_sta);
+		if(pmlmeinfo->tdls_sta_cnt==0)
+			pmlmeinfo->tdls_setup_state=UN_TDLS_STATE;
+		return _FAIL;
+	}
+
+	//parsing information element
+	for(j=FIXED_IE; j<parsing_length;){
+
+		pIE = (PNDIS_802_11_VARIABLE_IEs)(ptr+ j);
+
+		switch (pIE->ElementID)
+		{
+			case _SUPPORTEDRATES_IE_:
+				break;
+			case _COUNTRY_IE_:
+				break;
+			case _EXT_SUPPORTEDRATES_IE_:
+				break;
+			case _SUPPORTED_CH_IE_:
+				break;
+			case _RSN_IE_2_:
+				prsnie=(u8*)pIE;
+				//check whether responder STA has CCMP pairwise_cipher.
+				ppairwise_cipher=prsnie+10;
+				_rtw_memcpy(&pairwise_count, (u16*)(ppairwise_cipher-2), 2);
+				for(k=0;k<pairwise_count;k++){
+					if(_rtw_memcmp( ppairwise_cipher+4*k, RSN_CIPHER_SUITE_CCMP, 4)==_TRUE)
+						verify_ccmp=1;
+				}
+			case _EXT_CAP_IE_:
+				break;
+			case _VENDOR_SPECIFIC_IE_:
+				break;
+			case _FTIE_:
+				pftie=(u8*)pIE;
+				_rtw_memcpy(ptdls_sta->ANonce, (ptr+j+20), 32);
+				break;
+			case _TIMEOUT_ITVL_IE_:
+				ptimeout_ie=(u8*)pIE;
+				break;
+			case _RIC_Descriptor_IE_:
+				break;
+			case _HT_CAPABILITY_IE_:
+				break;
+			case EID_BSSCoexistence:
+				break;
+			case _LINK_ID_IE_:
+				plinkid_ie=(u8*)pIE;
+				break;
+			default:
+				break;
+		}
+
+		j += (pIE->Length + 2);
+		
+	}
+
+	if(prx_pkt_attrib->encrypt){
+		if(verify_ccmp==1){
+			wpa_tdls_generate_tpk(adapter, ptdls_sta);
+			ptdls_sta->stat_code=0;
+		}
+		else{
+			ptdls_sta->stat_code=72;	//invalide contents of RSNIE
+		}
+	}else{
+		ptdls_sta->stat_code=0;
+	}
+
+	if(prx_pkt_attrib->encrypt){
+		if(tdls_verify_mic(ptdls_sta->tpk.kck, 2, plinkid_ie, prsnie, ptimeout_ie, pftie)==0){	//0: Invalid, 1: valid
+			_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);	
+			pmlmeinfo->tdls_sta_cnt--;
+			rtw_free_stainfo(adapter,  ptdls_sta);
+			_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
+			if(pmlmeinfo->tdls_sta_cnt==0)
+				pmlmeinfo->tdls_setup_state=UN_TDLS_STATE;
+			return _FAIL;
+		}
+	}
+	DBG_8192C("issue_tdls_setup_cfm\n");
+	issue_tdls_setup_cfm(adapter, precv_frame);
+
+	if((ptdls_sta->state&TDLS_RESPONDER_STATE)==TDLS_RESPONDER_STATE)
+		ptdls_sta->state |= TDLS_LINKED_STATE;
+
+	if(prx_pkt_attrib->encrypt){
+		if(ptdls_sta->cam_entry==0){
+			ptdls_sta->dot118021XPrivacy=_AES_;
+			ptdls_sta->cam_entry=pmlmeinfo->tdls_cam_entry_to_write;
+			if(++pmlmeinfo->tdls_cam_entry_to_write>31)
+				pmlmeinfo->tdls_cam_entry_to_write=6;
+		}
+		rtw_setstakey_cmd(adapter, (u8*)ptdls_sta, _TRUE);
+	}
+	
+	return _FAIL;
+}
+
+sint On_TDLS_Setup_Cfm(_adapter *adapter, union recv_frame *precv_frame)
+{
+	struct sta_info *ptdls_sta= NULL;
+   	struct sta_priv *pstapriv = &adapter->stapriv;
+	u8 *ptr = precv_frame->u.hdr.rx_data;
+	_irqL irqL;
+	struct rx_pkt_attrib	*prx_pkt_attrib = &precv_frame->u.hdr.attrib;
+	struct mlme_ext_priv	*pmlmeext = &(adapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	u8 *psa; 
+	u16 stat_code;
+	sint parsing_length;
+	PNDIS_802_11_VARIABLE_IEs	pIE;
+	u8 FIXED_IE =5;
+	u8  *pftie, *ptimeout_ie, *plinkid_ie, *prsnie, *pftie_mic, *ppairwise_cipher;
+	u16 j, pairwise_count;
+
+	psa = get_sa(ptr);
+	ptdls_sta = rtw_get_stainfo(pstapriv, psa);
+
+	//[+1]: payload type
+	ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE+1;
+	parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len
+			-prx_pkt_attrib->hdrlen
+			-prx_pkt_attrib->iv_len
+			-prx_pkt_attrib->icv_len
+			-LLC_HEADER_SIZE
+			-TYPE_LENGTH_FIELD_SIZE
+			-1
+			-FIXED_IE;
+	_rtw_memcpy(&stat_code, ptr+2, 2);
+
+	if(stat_code!=0){
+		_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);	
+		pmlmeinfo->tdls_sta_cnt--;
+		_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
+		rtw_free_stainfo(adapter,  ptdls_sta);
+		if(pmlmeinfo->tdls_sta_cnt==0)
+			pmlmeinfo->tdls_setup_state=UN_TDLS_STATE;
+		return _FAIL;
+	}
+
+	if(prx_pkt_attrib->encrypt){
+		//parsing information element
+		for(j=FIXED_IE; j<parsing_length;){
+
+			pIE = (PNDIS_802_11_VARIABLE_IEs)(ptr+ j);
+
+			switch (pIE->ElementID)
+			{
+				case _RSN_IE_2_:
+					prsnie=(u8*)pIE;
+					break;
+				case _VENDOR_SPECIFIC_IE_:
+					break;
+	 			case _FTIE_:
+					pftie=(u8*)pIE;
+					break;
+				case _TIMEOUT_ITVL_IE_:
+					ptimeout_ie=(u8*)pIE;
+					break;
+				case _HT_EXTRA_INFO_IE_:
+					break;
+	 			case _LINK_ID_IE_:
+					plinkid_ie=(u8*)pIE;
+					break;
+				default:
+					break;
+			}
+
+			j += (pIE->Length + 2);
+			
+		}
+
+		//verify mic in FTIE MIC field
+		if(tdls_verify_mic(ptdls_sta->tpk.kck, 3, plinkid_ie, prsnie, ptimeout_ie, pftie)==0){	//0: Invalid, 1: Valid
+			_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);	
+			pmlmeinfo->tdls_sta_cnt--;
+			rtw_free_stainfo(adapter,  ptdls_sta);
+			_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
+			if(pmlmeinfo->tdls_sta_cnt==0)
+				pmlmeinfo->tdls_setup_state=UN_TDLS_STATE;
+			return _FAIL;
+		}
+
+	}
+
+	pmlmeinfo->tdls_setup_state=TDLS_LINKED_STATE;
+	if((ptdls_sta->state & TDLS_INITIATOR_STATE)==TDLS_INITIATOR_STATE)
+		ptdls_sta->state|=TDLS_LINKED_STATE;
+
+	ptdls_sta->option=1;	//write RCR DATA BIT
+	_set_workitem(&ptdls_sta->option_workitem);
+
+	//Write cam
+	//TDLS encryption(if needed) will always be CCMP
+	if(prx_pkt_attrib->encrypt){
+		if(ptdls_sta->cam_entry==0){
+			ptdls_sta->dot118021XPrivacy=_AES_;
+			ptdls_sta->cam_entry=pmlmeinfo->tdls_cam_entry_to_write;
+			if(++pmlmeinfo->tdls_cam_entry_to_write>31)
+				pmlmeinfo->tdls_cam_entry_to_write=6;
+		}
+		rtw_setstakey_cmd(adapter, (u8*)ptdls_sta, _TRUE);
+	}
+
+
+	return _FAIL;
+}
+
+sint On_TDLS_Dis_Req(_adapter *adapter, union recv_frame *precv_frame)
+{
+	struct rx_pkt_attrib	*prx_pkt_attrib = &precv_frame->u.hdr.attrib;
+	u8 *ptr = precv_frame->u.hdr.rx_data;
+	u8 *pdialog = NULL;
+
+	ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+8+1;
+	pdialog=ptr+2;
+
+	//check frame contents
+
+	//rx_pkt_pattrib->frag_num is used to fill dialog token
+	_rtw_memcpy(&(prx_pkt_attrib->frag_num), pdialog, 1);
+
+	issue_tdls_dis_rsp(adapter, precv_frame);
+
+	return _FAIL;
+	
+}
+
+sint On_TDLS_Teardown(_adapter *adapter, union recv_frame *precv_frame)
+{
+	u8 *psa;
+	u8 *ptr = precv_frame->u.hdr.rx_data;
+	struct rx_pkt_attrib	*prx_pkt_attrib = &precv_frame->u.hdr.attrib;
+	struct mlme_ext_priv	*pmlmeext = &(adapter->mlmeextpriv);	
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct sta_priv 	*pstapriv = &adapter->stapriv;
+	struct sta_info *ptdls_sta= NULL;
+	_irqL irqL;
+
+	psa = get_sa(ptr);
+
+	ptdls_sta = rtw_get_stainfo(pstapriv, psa);
+	if(ptdls_sta!=NULL){
+
+		if(ptdls_sta->state & TDLS_CH_SWITCH_ON_STATE){
+			ptdls_sta->option =3;
+			_set_workitem(&ptdls_sta->option_workitem);
+		}
+		_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);	
+		pmlmeinfo->tdls_sta_cnt--;
+		_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
+		//ready to clear cam
+		if(ptdls_sta->cam_entry!=0){
+			pmlmeinfo->tdls_cam_entry_to_clear=ptdls_sta->cam_entry;
+			//it will clear cam response to ptdls_sta->cam_entry
+			rtw_setstakey_cmd(adapter, (u8 *)ptdls_sta, _TRUE);
+		}
+		_set_workitem(&pmlmeext->TDLS_restore_workitem);
+		rtw_free_stainfo(adapter,  ptdls_sta);
+	}
+	if(pmlmeinfo->tdls_sta_cnt==0)
+		pmlmeinfo->tdls_setup_state=UN_TDLS_STATE;
+		
+	return _FAIL;
+	
+}
+
+u8 TDLS_check_ch_state(uint state){
+	if(	(state & TDLS_CH_SWITCH_ON_STATE) &&
+		(state & TDLS_AT_OFF_CH_STATE) &&
+		(state & TDLS_PEER_AT_OFF_STATE) ){
+
+		if(state & TDLS_PEER_SLEEP_STATE)
+			return 2;	//U-APSD + ch. switch
+		else
+			return 1;	//ch. switch
+	}else
+		return 0;
+}
+
+//we process buffered data for 1. U-APSD, 2. ch. switch, 3. U-APSD + ch. switch here
+sint On_TDLS_Peer_Traffic_Rsp(_adapter *adapter, union recv_frame *precv_frame)
+{
+	struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct rx_pkt_attrib	*pattrib = & precv_frame->u.hdr.attrib;
+	struct sta_priv *pstapriv = &adapter->stapriv;
+	//get peer sta infomation
+	struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->src);
+	u8 wmmps_ac=0, state=TDLS_check_ch_state(ptdls_sta->state);
+	int i;
+	ptdls_sta->sta_stats.rx_pkts++;
+
+	//receive peer traffic response frame, sleeping STA wakes up
+	ptdls_sta->state &= ~(TDLS_PEER_SLEEP_STATE);
+
+	// if noticed peer STA wakes up by receiving peer traffic response
+	// and we want to do channel swtiching, then we will transmit channel switch request first
+	if(ptdls_sta->state & TDLS_APSD_CHSW_STATE){
+		issue_tdls_ch_switch_req(adapter, pattrib->src);
+		ptdls_sta->state &= ~(TDLS_APSD_CHSW_STATE);
+		return  _FAIL;
+	}
+
+	//check 4-AC queue bit
+	if(ptdls_sta->uapsd_vo || ptdls_sta->uapsd_vi || ptdls_sta->uapsd_be || ptdls_sta->uapsd_bk)
+		wmmps_ac=1;
+
+	//if it's a direct link and have buffered frame
+	if(ptdls_sta->state & TDLS_LINKED_STATE){
+		if(wmmps_ac && state)
+		{
+			_irqL irqL;	 
+			_list	*xmitframe_plist, *xmitframe_phead;
+			struct xmit_frame *pxmitframe=NULL;
+		
+			_enter_critical_bh(&ptdls_sta->sleep_q.lock, &irqL);	
+
+			xmitframe_phead = get_list_head(&ptdls_sta->sleep_q);
+			xmitframe_plist = get_next(xmitframe_phead);
+
+			//transmit buffered frames
+			while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE)
+			{			
+				pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list);
+				xmitframe_plist = get_next(xmitframe_plist);
+				rtw_list_delete(&pxmitframe->list);
+
+				ptdls_sta->sleepq_len--;
+				if(ptdls_sta->sleepq_len>0){
+					pxmitframe->attrib.mdata = 1;
+					pxmitframe->attrib.eosp = 0;
+				}else{
+					pxmitframe->attrib.mdata = 0;
+					pxmitframe->attrib.eosp = 1;
+				}
+				//pxmitframe->attrib.triggered = 1;	//maybe doesn't need in TDLS
+				if(adapter->HalFunc.hal_xmit(adapter, pxmitframe) == _TRUE)
+				{		
+					rtw_os_xmit_complete(adapter, pxmitframe);
+				}
+
+			}
+
+			if(ptdls_sta->sleepq_len==0)
+			{
+				DBG_871X("no buffered packets to xmit\n");
+				//on U-APSD + CH. switch state, when there is no buffered date to xmit,
+				// we should go back to base channel
+				if(state==2){
+					ptdls_sta->option = 3;
+					_set_workitem(&ptdls_sta->option_workitem);
+				}else if(ptdls_sta->state&TDLS_SW_OFF_STATE){
+						ptdls_sta->state &= ~(TDLS_SW_OFF_STATE);
+						pmlmeinfo->tdls_candidate_ch= pmlmeext->cur_channel;
+						issue_tdls_ch_switch_req(adapter, pattrib->src);
+						DBG_8192C("issue tdls ch switch req back to base channel\n");
+				}
+				
+			}
+			else
+			{
+				DBG_871X("error!psta->sleepq_len=%d\n", ptdls_sta->sleepq_len);
+				ptdls_sta->sleepq_len=0;						
+			}
+
+			_exit_critical_bh(&ptdls_sta->sleep_q.lock, &irqL);			
+		
+		}
+
+	}
+
+	return _FAIL;
+}
+
+sint On_TDLS_Ch_Switch_Req(_adapter *adapter, union recv_frame *precv_frame)
+{
+	struct sta_info *ptdls_sta= NULL;
+   	struct sta_priv *pstapriv = &adapter->stapriv;
+	u8 *ptr = precv_frame->u.hdr.rx_data;
+	struct rx_pkt_attrib	*prx_pkt_attrib = &precv_frame->u.hdr.attrib;
+	u8 *psa; 
+	sint parsing_length;
+	PNDIS_802_11_VARIABLE_IEs	pIE;
+	u8 FIXED_IE =3;
+	u16 j;
+	struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
+
+	psa = get_sa(ptr);
+	ptdls_sta = rtw_get_stainfo(pstapriv, psa);
+	
+	//[+1]: payload type
+	ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE+1;
+	parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len
+			-prx_pkt_attrib->hdrlen
+			-prx_pkt_attrib->iv_len
+			-prx_pkt_attrib->icv_len
+			-LLC_HEADER_SIZE
+			-TYPE_LENGTH_FIELD_SIZE
+			-1
+			-FIXED_IE;
+
+	ptdls_sta->off_ch = *(ptr+2);
+	
+	//parsing information element
+	for(j=FIXED_IE; j<parsing_length;){
+
+		pIE = (PNDIS_802_11_VARIABLE_IEs)(ptr+ j);
+
+		switch (pIE->ElementID)
+		{
+			case _COUNTRY_IE_:
+				break;
+			case _CH_SWTICH_ANNOUNCE_:
+				break;
+ 			case _LINK_ID_IE_:
+				break;
+			case _CH_SWITCH_TIMING_:
+				_rtw_memcpy(&ptdls_sta->ch_switch_time, pIE->data, 2);
+				_rtw_memcpy(&ptdls_sta->ch_switch_timeout, pIE->data+2, 2);
+			default:
+				break;
+		}
+
+		j += (pIE->Length + 2);
+		
+	}
+
+	//todo: check status
+	ptdls_sta->stat_code=0;
+	ptdls_sta->state|=TDLS_CH_SWITCH_ON_STATE;
+
+	issue_nulldata(adapter, 1);
+
+	issue_tdls_ch_switch_rsp(adapter, psa);
+
+	DBG_8192C("issue tdls channel switch response\n");
+
+	if((ptdls_sta->state & TDLS_CH_SWITCH_ON_STATE) && ptdls_sta->off_ch==pmlmeext->cur_channel){
+		DBG_8192C("back to base channel\n");
+		ptdls_sta->option=7;
+		_set_workitem(&ptdls_sta->option_workitem);
+		
+	}else{		
+		ptdls_sta->option=6;
+		_set_workitem(&ptdls_sta->option_workitem);
+	}
+	return _FAIL;
+}
+
+sint On_TDLS_Ch_Switch_Rsp(_adapter *adapter, union recv_frame *precv_frame)
+{
+	struct sta_info *ptdls_sta= NULL;
+   	struct sta_priv *pstapriv = &adapter->stapriv;
+	u8 *ptr = precv_frame->u.hdr.rx_data;
+	struct rx_pkt_attrib	*prx_pkt_attrib = &precv_frame->u.hdr.attrib;
+	u8 *psa; 
+	sint parsing_length;
+	PNDIS_802_11_VARIABLE_IEs	pIE;
+	u8 FIXED_IE =4;
+	u16 stat_code, j, switch_time, switch_timeout;
+	struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
+
+	psa = get_sa(ptr);
+	ptdls_sta = rtw_get_stainfo(pstapriv, psa);
+
+	//if channel switch is running and receiving Unsolicited TDLS Channel Switch Response,
+	//it will go back to base channel and terminate this channel switch procedure
+	if(ptdls_sta->state & TDLS_CH_SWITCH_ON_STATE ){
+		if(pmlmeext->cur_channel==ptdls_sta->off_ch){
+			DBG_8192C("back to base channel\n");
+			ptdls_sta->option=7;
+			_set_workitem(&ptdls_sta->option_workitem);
+		}else{
+			DBG_8192C("receive unsolicited channel switch response \n");
+			ptdls_sta->option=3;
+			_set_workitem(&ptdls_sta->option_workitem);
+		}
+		return _FAIL;
+	}
+
+	//avoiding duplicated or unconditional ch. switch. rsp
+	if((ptdls_sta->state & TDLS_CH_SW_INITIATOR_STATE) != TDLS_CH_SW_INITIATOR_STATE)
+		return _FAIL;
+	
+	//[+1]: payload type
+	ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE+1;
+	parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len
+			-prx_pkt_attrib->hdrlen
+			-prx_pkt_attrib->iv_len
+			-prx_pkt_attrib->icv_len
+			-LLC_HEADER_SIZE
+			-TYPE_LENGTH_FIELD_SIZE
+			-1
+			-FIXED_IE;
+
+	_rtw_memcpy(&stat_code, ptr+2, 2);
+
+	if(stat_code!=0){
+		return _FAIL;
+	}
+	
+	//parsing information element
+	for(j=FIXED_IE; j<parsing_length;){
+
+		pIE = (PNDIS_802_11_VARIABLE_IEs)(ptr+ j);
+
+		switch (pIE->ElementID)
+		{
+ 			case _LINK_ID_IE_:
+				break;
+			case _CH_SWITCH_TIMING_:
+				_rtw_memcpy(&switch_time, pIE->data, 2);
+				if(switch_time > ptdls_sta->ch_switch_time)
+					_rtw_memcpy(&ptdls_sta->ch_switch_time, &switch_time, 2);
+
+				_rtw_memcpy(&switch_timeout, pIE->data+2, 2);
+				if(switch_timeout > ptdls_sta->ch_switch_timeout)
+					_rtw_memcpy(&ptdls_sta->ch_switch_timeout, &switch_timeout, 2);
+
+			default:
+				break;
+		}
+
+		j += (pIE->Length + 2);
+		
+	}
+
+	ptdls_sta->state &= ~(TDLS_CH_SW_INITIATOR_STATE);
+	ptdls_sta->state |=TDLS_CH_SWITCH_ON_STATE;
+
+	//goto set_channel_workitem_callback()
+	ptdls_sta->option=6;
+	_set_workitem(&ptdls_sta->option_workitem);
+
+	return _FAIL;	
+}
+
+sint OnTDLS(_adapter *adapter, union recv_frame *precv_frame)
+{
+	struct rx_pkt_attrib	*pattrib = & precv_frame->u.hdr.attrib;
+	sint ret = _SUCCESS;
+	u8 *paction = get_recvframe_data(precv_frame);
+
+	//point to action field, [+8]: snap+ether_type, [+1]: payload_type, [+1]: category field
+	paction+=pattrib->hdrlen + pattrib->iv_len+8+1+1;	
+	
+	switch(*paction){
+		case TDLS_SETUP_REQUEST:
+			DBG_8192C("recv tdls setup request frame\n");
+			ret=On_TDLS_Setup_Req(adapter, precv_frame);
+			break;
+		case TDLS_SETUP_RESPONSE:
+			DBG_8192C("recv tdls setup response frame\n");			
+			ret=On_TDLS_Setup_Rsp(adapter, precv_frame);
+			break;
+		case TDLS_SETUP_CONFIRM:
+			DBG_8192C("recv tdls setup confirm frame\n");
+			ret=On_TDLS_Setup_Cfm(adapter, precv_frame);
+			break;
+		case TDLS_TEARDOWN:
+			DBG_8192C("recv tdls teardown, free sta_info\n");
+			ret=On_TDLS_Teardown(adapter, precv_frame);
+			break;
+		case TDLS_DISCOVERY_REQUEST:
+			DBG_8192C("recv tdls discovery request frame\n");
+			ret=On_TDLS_Dis_Req(adapter, precv_frame);
+			break;
+		case TDLS_PEER_TRAFFIC_RESPONSE:
+			DBG_8192C("recv tdls discovery response frame\n");
+			ret=On_TDLS_Peer_Traffic_Rsp(adapter, precv_frame);
+			break;
+		case TDLS_CHANNEL_SWITCH_REQUEST:
+			DBG_8192C("recv tdls channel switch request frame\n");
+			ret=On_TDLS_Ch_Switch_Req(adapter, precv_frame);
+			break;
+		case TDLS_CHANNEL_SWITCH_RESPONSE:
+			DBG_8192C("recv tdls channel switch response frame\n");
+			ret=On_TDLS_Ch_Switch_Rsp(adapter, precv_frame);
+			break;
+		default:
+			DBG_8192C("receive TDLS frame but not supported\n");
+			ret=_FAIL;
+			break;
+	}
+
+exit:
+	return ret;
+	
+}
+#endif
+
+static sint sta2sta_data_frame(
+	_adapter *adapter,
+	union recv_frame *precv_frame,
+	struct sta_info**psta
+)
+{
+	u8 *ptr = precv_frame->u.hdr.rx_data;
+	sint ret = _SUCCESS;
+	struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib;
+	struct	sta_priv 		*pstapriv = &adapter->stapriv;
+	struct	security_priv	*psecuritypriv = &adapter->securitypriv;
+	struct	mlme_priv	*pmlmepriv = &adapter->mlmepriv;
+	u8 *mybssid  = get_bssid(pmlmepriv);
+	u8 *myhwaddr = myid(&adapter->eeprompriv);
+	u8 * sta_addr = NULL;
+	sint bmcast = IS_MCAST(pattrib->dst);
+
+#ifdef CONFIG_TDLS	
+	struct mlme_ext_priv	*pmlmeext = &(adapter->mlmeextpriv);	
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct sta_info *ptdls_sta=NULL;
+	u8 *psnap_type=ptr+pattrib->hdrlen + pattrib->iv_len+SNAP_SIZE;
+	//frame body located after [+2]: ether-type, [+1]: payload type
+	u8 *pframe_body = psnap_type+2+1;
+#endif
+
+_func_enter_;
+
+	if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) ||
+		(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE))
+	{
+
+		// filter packets that SA is myself or multicast or broadcast
+		if (_rtw_memcmp(myhwaddr, pattrib->src, ETH_ALEN)){
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" SA==myself \n"));
+			ret= _FAIL;
+			goto exit;
+		}
+
+		if( (!_rtw_memcmp(myhwaddr, pattrib->dst, ETH_ALEN))	&& (!bmcast) ){
+			ret= _FAIL;
+			goto exit;
+		}
+
+		if( _rtw_memcmp(pattrib->bssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) ||
+		   _rtw_memcmp(mybssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) ||
+		   (!_rtw_memcmp(pattrib->bssid, mybssid, ETH_ALEN)) ) {
+			ret= _FAIL;
+			goto exit;
+		}
+
+		sta_addr = pattrib->src;
+
+	}
+	else if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
+	{
+#ifdef CONFIG_TDLS
+
+		//direct link data transfer
+		if(pmlmeinfo->tdls_setup_state==TDLS_LINKED_STATE){
+			ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->src);
+			if(ptdls_sta==NULL){
+				ret=_FAIL;
+				goto exit;
+			}else if(((ptdls_sta->state&TDLS_LINKED_STATE)!=TDLS_LINKED_STATE)&&(!_rtw_memcmp(myhwaddr, pattrib->dst, ETH_ALEN))&& (!bmcast)){
+				ret=_FAIL;
+				goto exit;
+			}else if((ptdls_sta->state&TDLS_LINKED_STATE)==TDLS_LINKED_STATE){
+
+				//drop QoS-SubType Data, including QoS NULL, excluding QoS-Data
+				if( (GetFrameSubType(ptr) & WIFI_QOS_DATA_TYPE )== WIFI_QOS_DATA_TYPE)
+				{
+					if(GetFrameSubType(ptr)&(BIT(4)|BIT(5)|BIT(6)))
+					{
+					ret= _FAIL;
+					goto exit;
+					}
+				}
+				// filter packets that SA is myself or multicast or broadcast
+				if (_rtw_memcmp(myhwaddr, pattrib->src, ETH_ALEN)){
+					RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" SA==myself \n"));
+					ret= _FAIL;
+					goto exit;
+				}
+				// da should be for me
+				if((!_rtw_memcmp(myhwaddr, pattrib->dst, ETH_ALEN))&& (!bmcast))
+				{
+					ret= _FAIL;
+					goto exit;
+				}
+				// check BSSID
+				if( _rtw_memcmp(pattrib->bssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) ||
+				     _rtw_memcmp(mybssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) ||
+				     (!_rtw_memcmp(pattrib->bssid, mybssid, ETH_ALEN)) )
+				{
+					ret= _FAIL;
+					goto exit;
+				}
+				// if NULL-frame, check pwrbit
+				if ((GetFrameSubType(ptr)) == WIFI_DATA_NULL)
+				{
+					//NULL-frame with pwrbit=1, buffer_STA should buffer frames for sleep_STA
+					if(GetPwrMgt(ptr)){
+						ptdls_sta->state|=TDLS_PEER_SLEEP_STATE;
+					// it would be triggered when we are off channel and receiving NULL DATA
+					// we can confirm that peer STA is at off channel
+					}else if(ptdls_sta->state&TDLS_CH_SWITCH_ON_STATE){
+						if((ptdls_sta->state & TDLS_PEER_AT_OFF_STATE) != TDLS_PEER_AT_OFF_STATE){
+							issue_nulldata_to_TDLS_peer_STA(adapter, ptdls_sta, 0);
+							ptdls_sta->state |= TDLS_PEER_AT_OFF_STATE;
+							On_TDLS_Peer_Traffic_Rsp(adapter, precv_frame);
+						}
+					}
+					RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,(" NULL frame \n"));
+					ret= _FAIL;
+					goto exit;
+				}
+				//receive some of all TDLS management frames, process it at ON_TDLS
+				if((_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_TDLS, 2))){
+					ret= OnTDLS(adapter, precv_frame);
+					goto exit;
+				}
+				
+			}
+		}		
+		else
+#endif
+		// For Station mode, sa and bssid should always be BSSID, and DA is my mac-address
+		if(!_rtw_memcmp(pattrib->bssid, pattrib->src, ETH_ALEN) )
+		{
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("bssid != TA under STATION_MODE; drop pkt\n"));
+			ret= _FAIL;
+			goto exit;
+		}
+
+		sta_addr = pattrib->bssid;
+
+	}
+	else if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)
+	{
+		if (bmcast)
+		{
+			// For AP mode, if DA == MCAST, then BSSID should be also MCAST
+			if (!IS_MCAST(pattrib->bssid)){
+					ret= _FAIL;
+					goto exit;
+			}
+		}
+		else // not mc-frame
+		{
+			// For AP mode, if DA is non-MCAST, then it must be BSSID, and bssid == BSSID
+			if(!_rtw_memcmp(pattrib->bssid, pattrib->dst, ETH_ALEN)) {
+				ret= _FAIL;
+				goto exit;
+			}
+
+			sta_addr = pattrib->src;
+		}
+
+	}
+	else if(check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE)
+	{
+		_rtw_memcpy(pattrib->dst, GetAddr1Ptr(ptr), ETH_ALEN);
+		_rtw_memcpy(pattrib->src, GetAddr2Ptr(ptr), ETH_ALEN);
+		_rtw_memcpy(pattrib->bssid, GetAddr3Ptr(ptr), ETH_ALEN);
+		_rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN);
+		_rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
+
+		sta_addr = mybssid;
+	}
+	else
+	{
+		ret  = _FAIL;
+	}
+
+
+
+	if(bmcast)
+		*psta = rtw_get_bcmc_stainfo(adapter);
+	else
+		*psta = rtw_get_stainfo(pstapriv, sta_addr); // get ap_info
+
+	if (*psta == NULL) {
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("can't get psta under sta2sta_data_frame ; drop pkt\n"));
+#ifdef CONFIG_MP_INCLUDED
+		if(check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE)
+		adapter->mppriv.rx_pktloss++;
+#endif
+		ret= _FAIL;
+		goto exit;
+	}
+
+exit:
+_func_exit_;
+	return ret;
+
+}
+
+
+static sint ap2sta_data_frame(
+	_adapter *adapter,
+	union recv_frame *precv_frame,
+	struct sta_info**psta )
+{
+	u8 *ptr = precv_frame->u.hdr.rx_data;
+	struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib;
+	sint ret = _SUCCESS;
+	struct	sta_priv 		*pstapriv = &adapter->stapriv;
+	struct	security_priv	*psecuritypriv = &adapter->securitypriv;
+	struct	mlme_priv	*pmlmepriv = &adapter->mlmepriv;
+	u8 *mybssid  = get_bssid(pmlmepriv);
+	u8 *myhwaddr = myid(&adapter->eeprompriv);
+	sint bmcast = IS_MCAST(pattrib->dst);
+
+_func_enter_;
+
+	if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
+		&& (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE 
+			|| check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE	)
+		)
+	{
+
+		// if NULL-frame, drop packet
+		if ((GetFrameSubType(ptr)) == WIFI_DATA_NULL)
+		{
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,(" NULL frame \n"));
+			#ifdef DBG_RX_DROP_FRAME
+			DBG_871X("DBG_RX_DROP_FRAME %s NULL frame\n", __FUNCTION__);
+			#endif
+			ret= _FAIL;
+			goto exit;
+		}
+
+		//drop QoS-SubType Data, including QoS NULL, excluding QoS-Data
+		if( (GetFrameSubType(ptr) & WIFI_QOS_DATA_TYPE )== WIFI_QOS_DATA_TYPE)
+		{
+			if(GetFrameSubType(ptr)&(BIT(4)|BIT(5)|BIT(6)))
+			{
+				#ifdef DBG_RX_DROP_FRAME
+				DBG_871X("DBG_RX_DROP_FRAME %s drop QoS-SubType Data, including QoS NULL, excluding QoS-Data\n", __FUNCTION__);
+				#endif
+				ret= _FAIL;
+				goto exit;
+			}
+
+		}
+
+		// filter packets that SA is myself or multicast or broadcast
+		if (_rtw_memcmp(myhwaddr, pattrib->src, ETH_ALEN)){
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" SA==myself \n"));
+			#ifdef DBG_RX_DROP_FRAME
+			DBG_871X("DBG_RX_DROP_FRAME %s SA=%x:%x:%x:%x:%x:%x, myhwaddr= %x:%x:%x:%x:%x:%x\n", __FUNCTION__,
+				pattrib->src[0], pattrib->src[1], pattrib->src[2],
+				pattrib->src[3], pattrib->src[4], pattrib->src[5],
+				*(myhwaddr), *(myhwaddr+1), *(myhwaddr+2),
+				*(myhwaddr+3), *(myhwaddr+4), *(myhwaddr+5));
+			#endif			
+			ret= _FAIL;
+			goto exit;
+		}
+
+		// da should be for me
+		if((!_rtw_memcmp(myhwaddr, pattrib->dst, ETH_ALEN))&& (!bmcast))
+		{
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,(" ap2sta_data_frame:  compare DA fail; DA= %x:%x:%x:%x:%x:%x \n",
+					pattrib->dst[0],
+					pattrib->dst[1],
+					pattrib->dst[2],
+					pattrib->dst[3],
+					pattrib->dst[4],
+					pattrib->dst[5]));
+			#ifdef DBG_RX_DROP_FRAME
+			DBG_871X("DBG_RX_DROP_FRAME %s compare DA fail; DA= %x:%x:%x:%x:%x:%x \n", __FUNCTION__,
+					pattrib->dst[0],pattrib->dst[1],pattrib->dst[2],
+					pattrib->dst[3],pattrib->dst[4],pattrib->dst[5]);
+			#endif
+
+			ret= _FAIL;
+			goto exit;
+		}
+
+
+		// check BSSID
+		if( _rtw_memcmp(pattrib->bssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) ||
+		     _rtw_memcmp(mybssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) ||
+		     (!_rtw_memcmp(pattrib->bssid, mybssid, ETH_ALEN)) )
+		{
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,(" ap2sta_data_frame:  compare BSSID fail ; BSSID=%x:%x:%x:%x:%x:%x\n",
+				pattrib->bssid[0],
+				pattrib->bssid[1],
+				pattrib->bssid[2],
+				pattrib->bssid[3],
+				pattrib->bssid[4],
+				pattrib->bssid[5]));
+
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("mybssid= %x:%x:%x:%x:%x:%x\n",
+				mybssid[0],
+				mybssid[1],
+				mybssid[2],
+				mybssid[3],
+				mybssid[4],
+				mybssid[5]));
+
+			#ifdef DBG_RX_DROP_FRAME
+			DBG_871X("DBG_RX_DROP_FRAME %s compare BSSID fail ; BSSID=%x:%x:%x:%x:%x:%x, mybssid= %x:%x:%x:%x:%x:%x\n", __FUNCTION__,
+				pattrib->bssid[0], pattrib->bssid[1], pattrib->bssid[2],
+				pattrib->bssid[3], pattrib->bssid[4], pattrib->bssid[5],
+				mybssid[0], mybssid[1], mybssid[2],
+				mybssid[3], mybssid[4], mybssid[5]);
+			#endif
+
+			ret= _FAIL;
+			goto exit;
+		}
+
+		if(bmcast)
+			*psta = rtw_get_bcmc_stainfo(adapter);
+		else
+			*psta = rtw_get_stainfo(pstapriv, pattrib->bssid); // get ap_info
+
+		if (*psta == NULL) {
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("ap2sta: can't get psta under STATION_MODE ; drop pkt\n"));
+			#ifdef DBG_RX_DROP_FRAME
+			DBG_871X("DBG_RX_DROP_FRAME %s can't get psta under STATION_MODE ; drop pkt\n", __FUNCTION__);
+			#endif
+			ret= _FAIL;
+			goto exit;
+		}
+
+	}
+	else if ((check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) &&
+		     (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) )
+	{
+		_rtw_memcpy(pattrib->dst, GetAddr1Ptr(ptr), ETH_ALEN);
+		_rtw_memcpy(pattrib->src, GetAddr2Ptr(ptr), ETH_ALEN);
+		_rtw_memcpy(pattrib->bssid, GetAddr3Ptr(ptr), ETH_ALEN);
+		_rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN);
+		_rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
+
+		//
+		_rtw_memcpy(pattrib->bssid,  mybssid, ETH_ALEN);
+
+
+		*psta = rtw_get_stainfo(pstapriv, pattrib->bssid); // get sta_info
+		if (*psta == NULL) {
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("can't get psta under MP_MODE ; drop pkt\n"));
+			#ifdef DBG_RX_DROP_FRAME
+			DBG_871X("DBG_RX_DROP_FRAME %s can't get psta under WIFI_MP_STATE ; drop pkt\n", __FUNCTION__);
+			#endif
+			ret= _FAIL;
+			goto exit;
+		}
+
+
+	}
+	else
+	{
+		ret = _FAIL;
+		#ifdef DBG_RX_DROP_FRAME
+		DBG_871X("DBG_RX_DROP_FRAME %s fw_state:0x%x\n", __FUNCTION__, get_fwstate(pmlmepriv));
+		#endif
+	}
+
+exit:
+
+_func_exit_;
+
+	return ret;
+
+}
+
+static sint sta2ap_data_frame(
+	_adapter *adapter,
+	union recv_frame *precv_frame,
+	struct sta_info**psta )
+{
+	u8 *ptr = precv_frame->u.hdr.rx_data;
+	struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib;
+	struct	sta_priv 		*pstapriv = &adapter->stapriv;
+	struct	security_priv	*psecuritypriv = &adapter->securitypriv;
+	struct	mlme_priv	*pmlmepriv = &adapter->mlmepriv;
+	unsigned char *mybssid  = get_bssid(pmlmepriv);	
+	sint ret=_SUCCESS;
+
+_func_enter_;
+
+	if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)
+	{
+			//For AP mode, RA=BSSID, TX=STA(SRC_ADDR), A3=DST_ADDR
+			if(!_rtw_memcmp(pattrib->bssid, mybssid, ETH_ALEN))
+			{
+					ret= _FAIL;
+					goto exit;
+				}
+
+			*psta = rtw_get_stainfo(pstapriv, pattrib->src);
+
+			if (*psta == NULL)
+			{
+				RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("can't get psta under AP_MODE; drop pkt\n"));
+				ret= _FAIL;
+				goto exit;
+			}
+
+
+			process_pwrbit_data(adapter, precv_frame);
+			
+
+			// if NULL-frame, drop packet
+			if ((GetFrameSubType(ptr)) == WIFI_DATA_NULL)
+			{
+				RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,(" NULL frame \n"));
+
+				//process_null_data(adapter, precv_frame);
+				//process_pwrbit_data(adapter, precv_frame);
+				
+
+				ret= _FAIL;
+				goto exit;
+			}
+
+			//drop QoS-SubType Data, including QoS NULL, excluding QoS-Data
+			if( (GetFrameSubType(ptr) & WIFI_QOS_DATA_TYPE )== WIFI_QOS_DATA_TYPE)
+			{
+
+				if(GetFrameSubType(ptr)==WIFI_QOS_DATA_NULL)
+				{
+					RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,(" QoS NULL frame \n"));
+
+					//process_null_data(adapter, precv_frame);
+
+					ret= _FAIL;
+					goto exit;
+				}
+			
+				process_wmmps_data(adapter, precv_frame);
+			
+			/*
+				if(GetFrameSubType(ptr)&(BIT(4)|BIT(5)|BIT(6)))
+				{
+					process_null_data(adapter, precv_frame);
+					ret= _FAIL;
+					goto exit;
+				}
+			*/
+			}
+
+	}
+
+exit:
+
+_func_exit_;
+
+	return ret;
+
+}
+
+static sint validate_recv_ctrl_frame(_adapter *padapter, union recv_frame *precv_frame)
+{
+#ifdef CONFIG_AP_MODE
+	struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib;
+	struct sta_priv *pstapriv = &padapter->stapriv;
+	u8 *pframe = precv_frame->u.hdr.rx_data;
+	//uint len = precv_frame->u.hdr.len;
+		
+	//DBG_871X("+validate_recv_ctrl_frame\n");
+
+	if (GetFrameType(pframe) != WIFI_CTRL_TYPE)
+	{		
+		return _FAIL;
+	}
+
+	//receive the frames that ra(a1) is my address
+	if (!_rtw_memcmp(GetAddr1Ptr(pframe), myid(&padapter->eeprompriv), ETH_ALEN))
+	{
+		return _FAIL;
+	}
+
+	//only handle ps-poll
+	if(GetFrameSubType(pframe) == WIFI_PSPOLL)
+	{
+		u16 aid;
+		u8 wmmps_ac=0;	
+		struct sta_info *psta=NULL;
+	
+		aid = GetAid(pframe);
+		psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe));
+		
+		if((psta==NULL) || (psta->aid!=aid))
+		{
+			return _FAIL;
+		}
+
+		//for rx pkt statistics
+		psta->sta_stats.rx_pkts++;
+
+		switch(pattrib->priority)
+		{
+			case 1:
+			case 2:
+				wmmps_ac = psta->uapsd_bk&BIT(0);
+				break;
+			case 4:
+			case 5:
+				wmmps_ac = psta->uapsd_vi&BIT(0);
+				break;
+			case 6:
+			case 7:
+				wmmps_ac = psta->uapsd_vo&BIT(0);
+				break;
+			case 0:
+			case 3:
+			default:
+				wmmps_ac = psta->uapsd_be&BIT(0);
+				break;	
+		}
+
+		if(wmmps_ac)
+			return _FAIL;
+
+		if((psta->state&WIFI_SLEEP_STATE) && (pstapriv->sta_dz_bitmap&BIT(psta->aid)))
+		{
+			_irqL irqL;	 
+			_list	*xmitframe_plist, *xmitframe_phead;
+			struct xmit_frame *pxmitframe=NULL;
+		
+			_enter_critical_bh(&psta->sleep_q.lock, &irqL);	
+
+			xmitframe_phead = get_list_head(&psta->sleep_q);
+			xmitframe_plist = get_next(xmitframe_phead);
+
+			if ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE)
+			{			
+				pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list);
+
+				xmitframe_plist = get_next(xmitframe_plist);
+
+				rtw_list_delete(&pxmitframe->list);
+
+				psta->sleepq_len--;
+
+				if(psta->sleepq_len>0)
+					pxmitframe->attrib.mdata = 1;
+                                else
+					pxmitframe->attrib.mdata = 0;
+
+				pxmitframe->attrib.triggered = 1;
+
+	                        //DBG_871X("handling ps-poll, q_len=%d, tim=%x\n", psta->sleepq_len, pstapriv->tim_bitmap);
+
+				if(padapter->HalFunc.hal_xmit(padapter, pxmitframe) == _TRUE)
+				{		
+					rtw_os_xmit_complete(padapter, pxmitframe);
+				}
+
+				if(psta->sleepq_len==0)
+				{
+					pstapriv->tim_bitmap &= ~BIT(psta->aid);
+
+					//DBG_871X("after handling ps-poll, tim=%x\n", pstapriv->tim_bitmap);
+
+					//upate BCN for TIM IE
+					//update_BCNTIM(padapter);		
+					update_beacon(padapter, _TIM_IE_, NULL, _FALSE);
+				}
+				
+			}
+			else
+			{
+				//DBG_871X("no buffered packets to xmit\n");
+				if(pstapriv->tim_bitmap&BIT(psta->aid))
+				{
+					if(psta->sleepq_len==0)
+					{
+						DBG_871X("no buffered packets to xmit\n");
+					}
+					else
+					{
+						DBG_871X("error!psta->sleepq_len=%d\n", psta->sleepq_len);
+						psta->sleepq_len=0;						
+					}
+				
+					pstapriv->tim_bitmap &= ~BIT(psta->aid);					
+
+					//upate BCN for TIM IE
+					//update_BCNTIM(padapter);
+					update_beacon(padapter, _TIM_IE_, NULL, _FALSE);
+				}
+				
+			}
+	
+			_exit_critical_bh(&psta->sleep_q.lock, &irqL);			
+			
+		}
+		
+	}
+	
+#endif
+
+	return _FAIL;
+
+}
+
+static sint validate_recv_mgnt_frame(_adapter *adapter, union recv_frame *precv_frame)
+{
+	struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
+
+#ifdef CONFIG_TDLS
+	struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
+	struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
+
+	if(pmlmeinfo->tdls_ch_sensing==1 && pmlmeinfo->tdls_cur_channel !=0){
+		pmlmeinfo->tdls_collect_pkt_num[pmlmeinfo->tdls_cur_channel-1]++;
+	}
+#endif
+
+	RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("+validate_recv_mgnt_frame\n"));
+
+#if 0
+	if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)
+	{
+#ifdef CONFIG_NATIVEAP_MLME		
+	        mgt_dispatcher(adapter, precv_frame);
+#else
+		rtw_hostapd_mlme_rx(adapter, precv_frame);
+#endif	
+	}
+	else
+	{
+		mgt_dispatcher(adapter, precv_frame);
+	}
+#endif
+
+#ifdef CONFIG_AP_MODE
+	{
+		//for rx pkt statistics
+		struct sta_info *psta = rtw_get_stainfo(&adapter->stapriv, GetAddr2Ptr(precv_frame->u.hdr.rx_data));
+		if(psta)
+			psta->sta_stats.rx_pkts++;	
+	}
+#endif
+
+	mgt_dispatcher(adapter, precv_frame);
+
+	return _SUCCESS;
+
+}
+
+
+static sint validate_recv_data_frame(_adapter *adapter, union recv_frame *precv_frame)
+{
+	int res;
+	u8 bretry;
+	u8 *psa, *pda, *pbssid;
+	struct sta_info *psta = NULL;
+	u8 *ptr = precv_frame->u.hdr.rx_data;
+	struct rx_pkt_attrib	*pattrib = & precv_frame->u.hdr.attrib;
+	struct sta_priv 	*pstapriv = &adapter->stapriv;
+	struct security_priv	*psecuritypriv = &adapter->securitypriv;	
+	sint ret = _SUCCESS;
+#ifdef CONFIG_TDLS
+	struct sta_info  *ptdls_sta = NULL;
+	struct mlme_ext_priv	*pmlmeext = &(adapter->mlmeextpriv);	
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+#endif
+
+_func_enter_;
+
+	bretry = GetRetry(ptr);
+	pda = get_da(ptr);
+	psa = get_sa(ptr);
+	pbssid = get_hdr_bssid(ptr);
+
+	if(pbssid == NULL){
+		ret= _FAIL;
+		goto exit;
+	}
+
+#ifdef CONFIG_TDLS
+	if(pmlmeinfo->tdls_ch_sensing==1 && pmlmeinfo->tdls_cur_channel !=0){
+		pmlmeinfo->tdls_collect_pkt_num[pmlmeinfo->tdls_cur_channel-1]++;
+	}
+#endif
+
+	_rtw_memcpy(pattrib->dst, pda, ETH_ALEN);
+	_rtw_memcpy(pattrib->src, psa, ETH_ALEN);
+
+	_rtw_memcpy(pattrib->bssid, pbssid, ETH_ALEN);
+
+	switch(pattrib->to_fr_ds)
+	{
+		case 0:
+			_rtw_memcpy(pattrib->ra, pda, ETH_ALEN);
+			_rtw_memcpy(pattrib->ta, psa, ETH_ALEN);
+			res= sta2sta_data_frame(adapter, precv_frame, &psta);
+			break;
+
+		case 1:
+			_rtw_memcpy(pattrib->ra, pda, ETH_ALEN);
+			_rtw_memcpy(pattrib->ta, pbssid, ETH_ALEN);
+			res= ap2sta_data_frame(adapter, precv_frame, &psta);
+			break;
+
+		case 2:
+			_rtw_memcpy(pattrib->ra, pbssid, ETH_ALEN);
+			_rtw_memcpy(pattrib->ta, psa, ETH_ALEN);
+			res= sta2ap_data_frame(adapter, precv_frame, &psta);
+			break;
+
+		case 3:
+			_rtw_memcpy(pattrib->ra, GetAddr1Ptr(ptr), ETH_ALEN);
+			_rtw_memcpy(pattrib->ta, GetAddr2Ptr(ptr), ETH_ALEN);
+			res=_FAIL;
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" case 3\n"));
+			break;
+
+		default:
+			res=_FAIL;
+			break;
+
+	}
+
+	if(res==_FAIL){
+		//RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,(" after to_fr_ds_chk; res = fail \n"));
+		#ifdef DBG_RX_DROP_FRAME
+		DBG_871X("DBG_RX_DROP_FRAME %s case:%d, res:%d\n", __FUNCTION__, pattrib->to_fr_ds, res);
+		#endif
+		ret= res;
+		goto exit;
+	}
+
+
+	if(psta==NULL){
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" after to_fr_ds_chk; psta==NULL \n"));
+		ret= _FAIL;
+		goto exit;
+	}
+	
+	//psta->rssi = prxcmd->rssi;
+	//psta->signal_quality= prxcmd->sq;
+	precv_frame->u.hdr.psta = psta;
+		
+
+	pattrib->amsdu=0;
+	//parsing QC field
+	if(pattrib->qos == 1)
+	{
+		pattrib->priority = GetPriority((ptr + 24));
+		pattrib->ack_policy =GetAckpolicy((ptr + 24));
+		pattrib->amsdu = GetAMsdu((ptr + 24));
+		pattrib->hdrlen = pattrib->to_fr_ds==3 ? 32 : 26;
+
+		if(pattrib->priority!=0 && pattrib->priority!=3)
+		{
+			adapter->recvpriv.bIsAnyNonBEPkts = _TRUE;
+		}
+	}
+	else
+	{
+		pattrib->priority=0;
+		pattrib->hdrlen = pattrib->to_fr_ds==3 ? 30 : 24;
+	}
+
+
+	if(pattrib->order)//HT-CTRL 11n
+	{
+		pattrib->hdrlen += 4;
+	}
+
+#ifdef CONFIG_TDLS
+	//checking reordering per direct link
+	if((pmlmeinfo->tdls_setup_state==TDLS_LINKED_STATE)&&(pattrib->to_fr_ds==0)){
+		ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->src);
+		if(ptdls_sta==NULL){
+			ret= _FAIL;
+			goto exit;
+		}else{
+			precv_frame->u.hdr.preorder_ctrl = &ptdls_sta->recvreorder_ctrl[pattrib->priority];
+
+			// decache, drop duplicate recv packets
+			if(recv_decache(precv_frame, bretry, &ptdls_sta->sta_recvpriv.rxcache) == _FAIL)
+			{
+				RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("decache : drop pkt\n"));
+				ret= _FAIL;
+				goto exit;
+			}
+		}
+		if(ptdls_sta->dot118021XPrivacy==_AES_)
+			pattrib->encrypt=ptdls_sta->dot118021XPrivacy;
+	}else
+#endif
+	{
+		precv_frame->u.hdr.preorder_ctrl = &psta->recvreorder_ctrl[pattrib->priority];
+
+		// decache, drop duplicate recv packets
+		if(recv_decache(precv_frame, bretry, &psta->sta_recvpriv.rxcache) == _FAIL)
+		{
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("decache : drop pkt\n"));
+			ret= _FAIL;
+			goto exit;
+		}
+	}
+
+	if(pattrib->privacy){
+
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("validate_recv_data_frame:pattrib->privacy=%x\n", pattrib->privacy));
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n ^^^^^^^^^^^IS_MCAST(pattrib->ra(0x%02x))=%d^^^^^^^^^^^^^^^6\n", pattrib->ra[0],IS_MCAST(pattrib->ra)));
+
+#ifdef CONFIG_TDLS
+		if(ptdls_sta==NULL)
+#endif
+			GET_ENCRY_ALGO(psecuritypriv, psta, pattrib->encrypt, IS_MCAST(pattrib->ra));
+
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n pattrib->encrypt=%d\n",pattrib->encrypt));
+
+		SET_ICE_IV_LEN(pattrib->iv_len, pattrib->icv_len, pattrib->encrypt);
+	}
+	else
+	{
+		pattrib->encrypt = 0;
+		pattrib->iv_len = pattrib->icv_len = 0;
+	}
+
+exit:
+
+_func_exit_;
+
+	return ret;
+}
+
+static sint validate_recv_frame(_adapter *adapter, union recv_frame *precv_frame)
+{
+	//shall check frame subtype, to / from ds, da, bssid
+
+	//then call check if rx seq/frag. duplicated.
+
+	u8 type;
+	u8 subtype;
+	sint retval = _SUCCESS;
+
+	struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib;
+
+	u8 *ptr = precv_frame->u.hdr.rx_data;
+	u8  ver =(unsigned char) (*ptr)&0x3 ;
+#ifdef CONFIG_FIND_BEST_CHANNEL
+	struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
+#endif
+
+_func_enter_;
+
+
+#ifdef CONFIG_FIND_BEST_CHANNEL
+	if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) {
+		pmlmeext->channel_set[pmlmeext->sitesurvey_res.channel_idx].rx_count++;
+	}
+#endif
+
+#if 0
+DBG_871X("\n");
+{
+	int i;
+	for(i=0; i<64;i=i+8)
+		DBG_871X("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:", *(ptr+i),
+		*(ptr+i+1), *(ptr+i+2) ,*(ptr+i+3) ,*(ptr+i+4),*(ptr+i+5), *(ptr+i+6), *(ptr+i+7));
+
+}
+DBG_871X("\n");
+#endif
+
+	//add version chk
+	if(ver!=0){
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("validate_recv_data_frame fail! (ver!=0)\n"));
+		retval= _FAIL;
+		goto exit;
+	}
+
+	type =  GetFrameType(ptr);
+	subtype = GetFrameSubType(ptr); //bit(7)~bit(2)
+
+	pattrib->to_fr_ds = get_tofr_ds(ptr);
+
+	pattrib->frag_num = GetFragNum(ptr);
+	pattrib->seq_num = GetSequence(ptr);
+
+	pattrib->pw_save = GetPwrMgt(ptr);
+	pattrib->mfrag = GetMFrag(ptr);
+	pattrib->mdata = GetMData(ptr);
+	pattrib->privacy = GetPrivacy(ptr);
+	pattrib->order = GetOrder(ptr);
+#if 0 //for debug
+
+if(pHalData->bDumpRxPkt ==1){
+	int i;
+	DBG_871X("############################# \n");
+	
+	for(i=0; i<64;i=i+8)
+		DBG_871X("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:\n", *(ptr+i),
+		*(ptr+i+1), *(ptr+i+2) ,*(ptr+i+3) ,*(ptr+i+4),*(ptr+i+5), *(ptr+i+6), *(ptr+i+7));
+	DBG_871X("############################# \n");
+}
+else if(pHalData->bDumpRxPkt ==2){
+	if(type== WIFI_MGT_TYPE){
+		int i;
+		DBG_871X("############################# \n");
+
+		for(i=0; i<64;i=i+8)
+			DBG_871X("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:\n", *(ptr+i),
+			*(ptr+i+1), *(ptr+i+2) ,*(ptr+i+3) ,*(ptr+i+4),*(ptr+i+5), *(ptr+i+6), *(ptr+i+7));
+		DBG_871X("############################# \n");
+	}
+}
+else if(pHalData->bDumpRxPkt ==3){
+	if(type== WIFI_DATA_TYPE){
+		int i;
+		DBG_871X("############################# \n");
+		
+		for(i=0; i<64;i=i+8)
+			DBG_871X("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:\n", *(ptr+i),
+			*(ptr+i+1), *(ptr+i+2) ,*(ptr+i+3) ,*(ptr+i+4),*(ptr+i+5), *(ptr+i+6), *(ptr+i+7));
+		DBG_871X("############################# \n");
+	}
+}
+
+#endif
+	switch (type)
+	{
+		case WIFI_MGT_TYPE: //mgnt
+			retval = validate_recv_mgnt_frame(adapter, precv_frame);
+			if (retval == _FAIL)
+			{
+				RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("validate_recv_mgnt_frame fail\n"));
+			}
+			retval = _FAIL; // only data frame return _SUCCESS
+			break;
+		case WIFI_CTRL_TYPE: //ctrl
+			retval = validate_recv_ctrl_frame(adapter, precv_frame);
+			if (retval == _FAIL)
+			{
+				RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("validate_recv_ctrl_frame fail\n"));
+			}
+			retval = _FAIL; // only data frame return _SUCCESS
+			break;
+		case WIFI_DATA_TYPE: //data
+			rtw_led_control(adapter, LED_CTL_RX);
+			pattrib->qos = (subtype & BIT(7))? 1:0;
+			retval = validate_recv_data_frame(adapter, precv_frame);
+			if (retval == _FAIL)
+			{
+				RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("validate_recv_data_frame fail\n"));
+			}
+			break;
+		default:
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("validate_recv_data_frame fail! type=0x%x\n", type));
+			#ifdef DBG_RX_DROP_FRAME
+			DBG_871X("DBG_RX_DROP_FRAME validate_recv_data_frame fail! type=0x%x\n", type);
+			#endif
+			retval = _FAIL;
+			break;
+	}
+
+exit:
+
+_func_exit_;
+
+	return retval;
+}
+
+
+//remove the wlanhdr and add the eth_hdr
+#if 1
+static sint wlanhdr_to_ethhdr ( union recv_frame *precvframe)
+{
+	sint	rmv_len;
+	u16	eth_type, len;
+	u8	bsnaphdr;
+	u8	*psnap_type;
+	struct ieee80211_snap_hdr	*psnap;
+	
+	sint ret=_SUCCESS;
+	_adapter			*adapter =precvframe->u.hdr.adapter;
+	struct mlme_priv	*pmlmepriv = &adapter->mlmepriv;
+
+	u8	*ptr = get_recvframe_data(precvframe) ; // point to frame_ctrl field
+	struct rx_pkt_attrib *pattrib = & precvframe->u.hdr.attrib;
+
+_func_enter_;
+
+	if(pattrib->encrypt){
+		recvframe_pull_tail(precvframe, pattrib->icv_len);	
+	}
+
+	psnap=(struct ieee80211_snap_hdr	*)(ptr+pattrib->hdrlen + pattrib->iv_len);
+	psnap_type=ptr+pattrib->hdrlen + pattrib->iv_len+SNAP_SIZE;
+	/* convert hdr + possible LLC headers into Ethernet header */
+	//eth_type = (psnap_type[0] << 8) | psnap_type[1];
+	if((_rtw_memcmp(psnap, rfc1042_header, SNAP_SIZE) &&
+		(_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_IPX, 2) == _FALSE) && 
+		(_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_APPLETALK_AARP, 2)==_FALSE) )||
+		//eth_type != ETH_P_AARP && eth_type != ETH_P_IPX) ||
+		 _rtw_memcmp(psnap, bridge_tunnel_header, SNAP_SIZE)){
+		/* remove RFC1042 or Bridge-Tunnel encapsulation and replace EtherType */
+		bsnaphdr = _TRUE;
+	}
+	else {
+		/* Leave Ethernet header part of hdr and full payload */
+		bsnaphdr = _FALSE;
+	}
+
+	rmv_len = pattrib->hdrlen + pattrib->iv_len +(bsnaphdr?SNAP_SIZE:0);
+	len = precvframe->u.hdr.len - rmv_len;
+
+	RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n===pattrib->hdrlen: %x,  pattrib->iv_len:%x ===\n\n", pattrib->hdrlen,  pattrib->iv_len));
+
+	if ((check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE))	   	
+	{
+		ptr += rmv_len ;	
+		*ptr = 0x87;
+		*(ptr+1) = 0x12;
+
+		eth_type = 0x8712;
+		// append rx status for mp test packets
+		ptr = recvframe_pull(precvframe, (rmv_len-sizeof(struct ethhdr)+2)-24);
+		_rtw_memcpy(ptr, get_rxmem(precvframe), 24);
+		ptr+=24;
+	}
+	else {
+		ptr = recvframe_pull(precvframe, (rmv_len-sizeof(struct ethhdr)+ (bsnaphdr?2:0)));
+	}
+
+	_rtw_memcpy(ptr, pattrib->dst, ETH_ALEN);
+	_rtw_memcpy(ptr+ETH_ALEN, pattrib->src, ETH_ALEN);
+
+	if(!bsnaphdr) {
+		len = htons(len);
+		_rtw_memcpy(ptr+12, &len, 2);
+	}
+
+_func_exit_;	
+	return ret;
+
+}
+
+#else
+
+sint wlanhdr_to_ethhdr ( union recv_frame *precvframe)
+{
+	sint rmv_len;
+	u16 eth_type;
+	u8	bsnaphdr;
+	u8	*psnap_type;
+	struct ieee80211_snap_hdr	*psnap;
+
+	sint ret=_SUCCESS;
+	_adapter	*adapter =precvframe->u.hdr.adapter;
+	struct	mlme_priv	*pmlmepriv = &adapter->mlmepriv;
+
+	u8* ptr = get_recvframe_data(precvframe) ; // point to frame_ctrl field
+	struct rx_pkt_attrib *pattrib = & precvframe->u.hdr.attrib;
+	struct _vlan *pvlan = NULL;
+
+_func_enter_;
+
+	psnap=(struct ieee80211_snap_hdr	*)(ptr+pattrib->hdrlen + pattrib->iv_len);
+	psnap_type=ptr+pattrib->hdrlen + pattrib->iv_len+SNAP_SIZE;
+	if (psnap->dsap==0xaa && psnap->ssap==0xaa && psnap->ctrl==0x03)
+	{
+		if (_rtw_memcmp(psnap->oui, oui_rfc1042, WLAN_IEEE_OUI_LEN))
+			bsnaphdr=_TRUE;//wlan_pkt_format = WLAN_PKT_FORMAT_SNAP_RFC1042;	
+		else if (_rtw_memcmp(psnap->oui, SNAP_HDR_APPLETALK_DDP, WLAN_IEEE_OUI_LEN) &&
+			_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_APPLETALK_DDP, 2) )
+			bsnaphdr=_TRUE;	//wlan_pkt_format = WLAN_PKT_FORMAT_APPLETALK;
+		else if (_rtw_memcmp( psnap->oui, oui_8021h, WLAN_IEEE_OUI_LEN))
+			bsnaphdr=_TRUE;	//wlan_pkt_format = WLAN_PKT_FORMAT_SNAP_TUNNEL;
+		else {
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("drop pkt due to invalid frame format!\n"));
+			ret= _FAIL;
+			goto exit;
+		}
+
+	} else
+		bsnaphdr=_FALSE;//wlan_pkt_format = WLAN_PKT_FORMAT_OTHERS;
+
+	rmv_len = pattrib->hdrlen + pattrib->iv_len +(bsnaphdr?SNAP_SIZE:0);
+	RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("===pattrib->hdrlen: %x,  pattrib->iv_len:%x ===\n", pattrib->hdrlen,  pattrib->iv_len));
+
+	if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE)
+	{
+		ptr += rmv_len ;
+		*ptr = 0x87;
+		*(ptr+1) = 0x12;
+
+		//back to original pointer
+		ptr -= rmv_len;
+	}
+
+	ptr += rmv_len ;
+
+	_rtw_memcpy(&eth_type, ptr, 2);
+	eth_type= ntohs((unsigned short )eth_type); //pattrib->ether_type
+	ptr +=2;
+
+	if(pattrib->encrypt){
+		recvframe_pull_tail(precvframe, pattrib->icv_len);
+	}
+
+	if(eth_type == 0x8100) //vlan
+	{
+		pvlan = (struct _vlan *) ptr;
+
+		//eth_type = get_vlan_encap_proto(pvlan);
+		//eth_type = pvlan->h_vlan_encapsulated_proto;//?
+		rmv_len += 4;
+		ptr+=4;
+	}
+
+	if(eth_type==0x0800)//ip
+	{
+		//struct iphdr*  piphdr = (struct iphdr*) ptr;
+		//__u8 tos = (unsigned char)(pattrib->priority & 0xff);
+
+		//piphdr->tos = tos;
+
+		//if (piphdr->protocol == 0x06)
+		//{
+		//	RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("@@@===recv tcp len:%d @@@===\n", precvframe->u.hdr.len));
+		//}
+	}
+	else if(eth_type==0x8712)// append rx status for mp test packets
+	{
+		//ptr -= 16;
+		//_rtw_memcpy(ptr, get_rxmem(precvframe), 16);
+	}
+	else
+	{
+#ifdef PLATFORM_OS_XP
+		NDIS_PACKET_8021Q_INFO VlanPriInfo;
+		UINT32 UserPriority = precvframe->u.hdr.attrib.priority;
+		UINT32 VlanID = (pvlan!=NULL ? get_vlan_id(pvlan) : 0 );
+
+		VlanPriInfo.Value =          // Get current value.
+				NDIS_PER_PACKET_INFO_FROM_PACKET(precvframe->u.hdr.pkt, Ieee8021QInfo);
+
+		VlanPriInfo.TagHeader.UserPriority = UserPriority;
+		VlanPriInfo.TagHeader.VlanId =  VlanID ;
+
+		VlanPriInfo.TagHeader.CanonicalFormatId = 0; // Should be zero.
+		VlanPriInfo.TagHeader.Reserved = 0; // Should be zero.
+		NDIS_PER_PACKET_INFO_FROM_PACKET(precvframe->u.hdr.pkt, Ieee8021QInfo) = VlanPriInfo.Value;
+#endif
+	}
+
+	if(eth_type==0x8712)// append rx status for mp test packets
+	{
+		ptr = recvframe_pull(precvframe, (rmv_len-sizeof(struct ethhdr)+2)-24);
+		_rtw_memcpy(ptr, get_rxmem(precvframe), 24);
+		ptr+=24;
+	}
+	else
+		ptr = recvframe_pull(precvframe, (rmv_len-sizeof(struct ethhdr)+2));
+
+	_rtw_memcpy(ptr, pattrib->dst, ETH_ALEN);
+	_rtw_memcpy(ptr+ETH_ALEN, pattrib->src, ETH_ALEN);
+
+	eth_type = htons((unsigned short)eth_type) ;
+	_rtw_memcpy(ptr+12, &eth_type, 2);
+
+exit:
+
+_func_exit_;
+
+	return ret;
+}
+#endif
+
+static void count_rx_stats(_adapter *padapter, union recv_frame *prframe)
+{
+	int	sz;
+	struct sta_info		*psta = NULL;
+	struct stainfo_stats	*pstats = NULL;
+	struct rx_pkt_attrib	*pattrib = & prframe->u.hdr.attrib;
+	struct recv_priv		*precvpriv = &padapter->recvpriv;
+
+	sz = get_recvframe_len(prframe);
+	precvpriv->rx_bytes += sz;
+
+	padapter->mlmepriv.LinkDetectInfo.NumRxOkInPeriod++;
+
+	if( (!MacAddr_isBcst(pattrib->dst)) && (!IS_MCAST(pattrib->dst))){
+		padapter->mlmepriv.LinkDetectInfo.NumRxUnicastOkInPeriod++;
+	}
+
+	psta = prframe->u.hdr.psta;
+
+	if(psta)
+	{
+		pstats = &psta->sta_stats;
+
+		pstats->rx_pkts++;
+		pstats->rx_bytes += sz;
+	}
+
+}
+
+
+//perform defrag
+static union recv_frame * recvframe_defrag(_adapter *adapter,_queue *defrag_q)
+{
+	_list	 *plist, *phead;
+	u8	*data,wlanhdr_offset;
+	u8	curfragnum;
+	struct recv_frame_hdr *pfhdr,*pnfhdr;
+	union recv_frame* prframe, *pnextrframe;
+	_queue	*pfree_recv_queue;
+
+_func_enter_;
+
+	curfragnum=0;
+	pfree_recv_queue=&adapter->recvpriv.free_recv_queue;
+
+	phead = get_list_head(defrag_q);
+	plist = get_next(phead);
+	prframe = LIST_CONTAINOR(plist, union recv_frame, u);
+	pfhdr=&prframe->u.hdr;
+	rtw_list_delete(&(prframe->u.list));
+
+	if(curfragnum!=pfhdr->attrib.frag_num)
+	{
+		//the first fragment number must be 0
+		//free the whole queue
+		rtw_free_recvframe(prframe, pfree_recv_queue);
+		rtw_free_recvframe_queue(defrag_q, pfree_recv_queue);
+
+		return NULL;
+	}
+
+	curfragnum++;
+
+	plist= get_list_head(defrag_q);
+
+	plist = get_next(plist);
+
+	data=get_recvframe_data(prframe);
+
+	while(rtw_end_of_queue_search(phead, plist) == _FALSE)
+	{
+		pnextrframe = LIST_CONTAINOR(plist, union recv_frame , u);
+		pnfhdr=&pnextrframe->u.hdr;
+
+
+		//check the fragment sequence  (2nd ~n fragment frame)
+
+		if(curfragnum!=pnfhdr->attrib.frag_num)
+		{
+			//the fragment number must be increasing  (after decache)
+			//release the defrag_q & prframe
+			rtw_free_recvframe(prframe, pfree_recv_queue);
+			rtw_free_recvframe_queue(defrag_q, pfree_recv_queue);
+			return NULL;
+		}
+
+		curfragnum++;
+
+		//copy the 2nd~n fragment frame's payload to the first fragment
+		//get the 2nd~last fragment frame's payload
+
+		wlanhdr_offset = pnfhdr->attrib.hdrlen + pnfhdr->attrib.iv_len;
+
+		recvframe_pull(pnextrframe, wlanhdr_offset);
+
+		//append  to first fragment frame's tail (if privacy frame, pull the ICV)
+		recvframe_pull_tail(prframe, pfhdr->attrib.icv_len);
+
+		//memcpy
+		_rtw_memcpy(pfhdr->rx_tail, pnfhdr->rx_data, pnfhdr->len);
+
+		recvframe_put(prframe, pnfhdr->len);
+
+		pfhdr->attrib.icv_len=pnfhdr->attrib.icv_len;
+		plist = get_next(plist);
+
+	};
+
+	//free the defrag_q queue and return the prframe
+	rtw_free_recvframe_queue(defrag_q, pfree_recv_queue);
+
+	RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("Performance defrag!!!!!\n"));
+
+_func_exit_;
+
+	return prframe;
+}
+
+
+//check if need to defrag, if needed queue the frame to defrag_q
+static union recv_frame * recvframe_chk_defrag(_adapter *padapter,union recv_frame* precv_frame)
+{
+	u8	ismfrag;
+	u8	fragnum;
+	u8	*psta_addr;
+	struct recv_frame_hdr *pfhdr;
+	struct sta_info * psta;
+	struct	sta_priv *pstapriv ;
+	_list	 *phead;
+	union recv_frame* prtnframe=NULL;
+	_queue *pfree_recv_queue, *pdefrag_q;
+
+_func_enter_;
+
+	pstapriv = &padapter->stapriv;
+
+	pfhdr=&precv_frame->u.hdr;
+
+	pfree_recv_queue=&padapter->recvpriv.free_recv_queue;
+
+	//need to define struct of wlan header frame ctrl
+	ismfrag= pfhdr->attrib.mfrag;
+	fragnum=pfhdr->attrib.frag_num;
+
+	psta_addr=pfhdr->attrib.ta;
+	psta=rtw_get_stainfo(pstapriv, psta_addr);
+	if (psta==NULL)
+		pdefrag_q = NULL;
+	else
+		pdefrag_q=&psta->sta_recvpriv.defrag_q;
+
+	if ((ismfrag==0) && (fragnum==0))
+	{
+		prtnframe = precv_frame;//isn't a fragment frame
+	}
+
+	if (ismfrag==1)
+	{
+		//0~(n-1) fragment frame
+		//enqueue to defraf_g
+		if(pdefrag_q != NULL)
+		{
+			if(fragnum==0)
+			{
+				//the first fragment
+				if(_rtw_queue_empty(pdefrag_q) == _FALSE)
+				{
+					//free current defrag_q
+					rtw_free_recvframe_queue(pdefrag_q, pfree_recv_queue);
+				}
+			}
+
+
+			//Then enqueue the 0~(n-1) fragment into the defrag_q
+
+			//_rtw_spinlock(&pdefrag_q->lock);
+			phead = get_list_head(pdefrag_q);
+			rtw_list_insert_tail(&pfhdr->list, phead);
+			//_rtw_spinunlock(&pdefrag_q->lock);
+
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("Enqueuq: ismfrag = %d, fragnum= %d\n", ismfrag,fragnum));
+
+			prtnframe=NULL;
+
+		}
+		else
+		{
+			//can't find this ta's defrag_queue, so free this recv_frame
+			rtw_free_recvframe(precv_frame, pfree_recv_queue);
+			prtnframe=NULL;
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("Free because pdefrag_q ==NULL: ismfrag = %d, fragnum= %d\n", ismfrag, fragnum));
+		}
+
+	}
+
+	if((ismfrag==0)&&(fragnum!=0))
+	{
+		//the last fragment frame
+		//enqueue the last fragment
+		if(pdefrag_q != NULL)
+		{
+			//_rtw_spinlock(&pdefrag_q->lock);
+			phead = get_list_head(pdefrag_q);
+			rtw_list_insert_tail(&pfhdr->list,phead);
+			//_rtw_spinunlock(&pdefrag_q->lock);
+
+			//call recvframe_defrag to defrag
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("defrag: ismfrag = %d, fragnum= %d\n", ismfrag, fragnum));
+			precv_frame = recvframe_defrag(padapter, pdefrag_q);
+			prtnframe=precv_frame;
+
+		}
+		else
+		{
+			//can't find this ta's defrag_queue, so free this recv_frame
+			rtw_free_recvframe(precv_frame, pfree_recv_queue);
+			prtnframe=NULL;
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("Free because pdefrag_q ==NULL: ismfrag = %d, fragnum= %d\n", ismfrag,fragnum));
+		}
+
+	}
+
+
+	if((prtnframe!=NULL)&&(prtnframe->u.hdr.attrib.privacy))
+	{
+		//after defrag we must check tkip mic code
+		if(recvframe_chkmic(padapter,  prtnframe)==_FAIL)
+		{
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvframe_chkmic(padapter,  prtnframe)==_FAIL\n"));
+			rtw_free_recvframe(prtnframe,pfree_recv_queue);
+			prtnframe=NULL;
+		}
+	}
+
+_func_exit_;
+
+	return prtnframe;
+
+}
+
+
+static int amsdu_to_msdu(_adapter *padapter, union recv_frame *prframe)
+{
+#ifdef PLATFORM_LINUX	//for amsdu TP improvement,Creator: Thomas 
+	int	a_len, padding_len;
+	u16	eth_type, nSubframe_Length;	
+	u8	nr_subframes, i;
+	unsigned char *data_ptr, *pdata;
+	struct rx_pkt_attrib *pattrib;
+	_pkt *sub_skb,*subframes[MAX_SUBFRAME_COUNT];
+	struct recv_priv *precvpriv = &padapter->recvpriv;
+	_queue *pfree_recv_queue = &(precvpriv->free_recv_queue);
+	int	ret = _SUCCESS;
+
+	nr_subframes = 0;
+
+	pattrib = &prframe->u.hdr.attrib;
+
+	recvframe_pull(prframe, prframe->u.hdr.attrib.hdrlen);
+	
+	if(prframe->u.hdr.attrib.iv_len >0)
+	{
+		recvframe_pull(prframe, prframe->u.hdr.attrib.iv_len);
+	}
+
+	a_len = prframe->u.hdr.len;
+
+	pdata = prframe->u.hdr.rx_data;
+
+	while(a_len > ETH_HLEN) {
+		
+		/* Offset 12 denote 2 mac address */
+		//nSubframe_Length = *((u16*)(pdata + 12));
+		//==m==>change the length order
+		//nSubframe_Length = (nSubframe_Length>>8) + (nSubframe_Length<<8);
+		//nSubframe_Length = ntohs(*((u16*)(pdata + 12)));
+		nSubframe_Length = RTW_GET_BE16(pdata + 12);
+
+		//ntohs(nSubframe_Length);
+
+		if( a_len < (ETHERNET_HEADER_SIZE + nSubframe_Length) ) {
+			DBG_8192C("nRemain_Length is %d and nSubframe_Length is : %d\n",a_len,nSubframe_Length);
+			goto exit;
+		}
+
+		/* move the data point to data content */
+		pdata += ETH_HLEN;
+		a_len -= ETH_HLEN;
+
+		/* Allocate new skb for releasing to upper layer */
+#ifdef CONFIG_SKB_COPY
+		sub_skb = dev_alloc_skb(nSubframe_Length + 12);
+		if(sub_skb)
+		{
+			skb_reserve(sub_skb, 12);
+			data_ptr = (u8 *)skb_put(sub_skb, nSubframe_Length);
+			_rtw_memcpy(data_ptr, pdata, nSubframe_Length);
+		}
+		else
+		{
+#endif // CONFIG_SKB_COPY
+			sub_skb = skb_clone(prframe->u.hdr.pkt, GFP_ATOMIC);
+			if(sub_skb)
+			{
+				sub_skb->data = pdata;
+				sub_skb->len = nSubframe_Length;
+				sub_skb->tail = sub_skb->data + nSubframe_Length;
+			}
+			else
+			{
+				DBG_8192C("skb_clone() Fail!!! , nr_subframes = %d\n",nr_subframes);
+				break;
+			}
+		}
+
+		//sub_skb->dev = padapter->pnetdev;
+		subframes[nr_subframes++] = sub_skb;
+		if(nr_subframes >= MAX_SUBFRAME_COUNT) {
+			DBG_8192C("ParseSubframe(): Too many Subframes! Packets dropped!\n");
+			break;
+		}
+
+		pdata += nSubframe_Length;
+		a_len -= nSubframe_Length;
+		if(a_len != 0) {
+			padding_len = 4 - ((nSubframe_Length + ETH_HLEN) & (4-1));
+			if(padding_len == 4) {
+				padding_len = 0;
+			}
+
+			if(a_len < padding_len) {
+				goto exit;
+			}
+			pdata += padding_len;
+			a_len -= padding_len;
+		}
+	}
+
+	for(i=0; i<nr_subframes; i++){
+		sub_skb = subframes[i];
+		/* convert hdr + possible LLC headers into Ethernet header */
+		//eth_type = (sub_skb->data[6] << 8) | sub_skb->data[7];
+		//eth_type = ntohs(*(u16*)&sub_skb->data[6]);
+		eth_type = RTW_GET_BE16(&sub_skb->data[6]);
+		if (sub_skb->len >= 8 &&
+			((_rtw_memcmp(sub_skb->data, rfc1042_header, SNAP_SIZE) &&
+			  eth_type != ETH_P_AARP && eth_type != ETH_P_IPX) ||
+			 _rtw_memcmp(sub_skb->data, bridge_tunnel_header, SNAP_SIZE) )) {
+			/* remove RFC1042 or Bridge-Tunnel encapsulation and replace EtherType */
+			skb_pull(sub_skb, SNAP_SIZE);
+			_rtw_memcpy(skb_push(sub_skb, ETH_ALEN), pattrib->src, ETH_ALEN);
+			_rtw_memcpy(skb_push(sub_skb, ETH_ALEN), pattrib->dst, ETH_ALEN);
+		} else {
+			u16 len;
+			/* Leave Ethernet header part of hdr and full payload */
+			len = htons(sub_skb->len);
+			_rtw_memcpy(skb_push(sub_skb, 2), &len, 2);
+			_rtw_memcpy(skb_push(sub_skb, ETH_ALEN), pattrib->src, ETH_ALEN);
+			_rtw_memcpy(skb_push(sub_skb, ETH_ALEN), pattrib->dst, ETH_ALEN);
+		}
+
+		/* Indicat the packets to upper layer */
+		if (sub_skb) {
+			//memset(sub_skb->cb, 0, sizeof(sub_skb->cb));
+
+#ifdef CONFIG_BR_EXT
+			// Insert NAT2.5 RX here!
+			struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+			void *br_port = NULL;
+
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35))
+			br_port = padapter->pnetdev->br_port;
+#else   // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35))
+			rcu_read_lock();
+			br_port = rcu_dereference(padapter->pnetdev->rx_handler_data);
+			rcu_read_unlock();
+#endif  // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35))
+
+
+			if( br_port && (check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE) )	 	
+			{
+				int nat25_handle_frame(_adapter *priv, struct sk_buff *skb);
+				if (nat25_handle_frame(padapter, sub_skb) == -1) {
+					//priv->ext_stats.rx_data_drops++;
+					//DEBUG_ERR("RX DROP: nat25_handle_frame fail!\n");
+					//return FAIL;
+					
+#if 1
+					// bypass this frame to upper layer!!
+#else
+					dev_kfree_skb_any(sub_skb);
+					continue;
+#endif
+				}							
+			}
+#endif	// CONFIG_BR_EXT
+
+			sub_skb->protocol = eth_type_trans(sub_skb, padapter->pnetdev);
+			sub_skb->dev = padapter->pnetdev;
+
+#ifdef CONFIG_TCP_CSUM_OFFLOAD_RX
+			if ( (pattrib->tcpchk_valid == 1) && (pattrib->tcp_chkrpt == 1) ) {
+				sub_skb->ip_summed = CHECKSUM_UNNECESSARY;
+			} else {
+				sub_skb->ip_summed = CHECKSUM_NONE;
+			}
+#else /* !CONFIG_TCP_CSUM_OFFLOAD_RX */
+			sub_skb->ip_summed = CHECKSUM_NONE;
+#endif
+
+			netif_rx(sub_skb);
+		}
+	}
+
+exit:
+
+	prframe->u.hdr.len=0;
+	rtw_free_recvframe(prframe, pfree_recv_queue);//free this recv_frame
+	
+	return ret;
+#else
+	_irqL irql;
+	unsigned char *ptr, *pdata, *pbuf, *psnap_type;
+	union recv_frame *pnrframe, *pnrframe_new;
+	int a_len, mv_len, padding_len;
+	u16 eth_type, type_len;
+	u8 bsnaphdr;
+	struct ieee80211_snap_hdr	*psnap;
+	struct _vlan *pvlan;
+	struct recv_priv *precvpriv = &padapter->recvpriv;
+	_queue *pfree_recv_queue = &(precvpriv->free_recv_queue);
+	int ret = _SUCCESS;
+#ifdef PLATFORM_WINDOWS
+	struct recv_buf *precvbuf = prframe->u.hdr.precvbuf;
+#endif
+	a_len = prframe->u.hdr.len - prframe->u.hdr.attrib.hdrlen;
+
+	recvframe_pull(prframe, prframe->u.hdr.attrib.hdrlen);
+
+	if(prframe->u.hdr.attrib.iv_len >0)
+	{
+		recvframe_pull(prframe, prframe->u.hdr.attrib.iv_len);
+	}
+
+	pdata = prframe->u.hdr.rx_data;
+
+	prframe->u.hdr.len=0;
+
+	pnrframe = prframe;
+
+
+	do{
+
+		mv_len=0;
+		pnrframe->u.hdr.rx_data = pnrframe->u.hdr.rx_tail = pdata;
+		ptr = pdata;
+
+
+		_rtw_memcpy(pnrframe->u.hdr.attrib.dst, ptr, ETH_ALEN);
+		ptr+=ETH_ALEN;
+		_rtw_memcpy(pnrframe->u.hdr.attrib.src, ptr, ETH_ALEN);
+		ptr+=ETH_ALEN;
+
+		_rtw_memcpy(&type_len, ptr, 2);
+		type_len= ntohs((unsigned short )type_len);
+		ptr +=2;
+		mv_len += ETH_HLEN;
+
+		recvframe_put(pnrframe, type_len+ETH_HLEN);//update tail;
+
+		if(pnrframe->u.hdr.rx_data >= pnrframe->u.hdr.rx_tail || type_len<8)
+		{
+			//panic("pnrframe->u.hdr.rx_data >= pnrframe->u.hdr.rx_tail || type_len<8\n");
+
+			rtw_free_recvframe(pnrframe, pfree_recv_queue);
+
+			goto exit;
+		}
+
+		psnap=(struct ieee80211_snap_hdr *)(ptr);
+		psnap_type=ptr+SNAP_SIZE;
+		if (psnap->dsap==0xaa && psnap->ssap==0xaa && psnap->ctrl==0x03)
+		{
+			if ( _rtw_memcmp(psnap->oui, oui_rfc1042, WLAN_IEEE_OUI_LEN))
+			{
+				bsnaphdr=_TRUE;//wlan_pkt_format = WLAN_PKT_FORMAT_SNAP_RFC1042;
+			}
+			else if (_rtw_memcmp(psnap->oui, SNAP_HDR_APPLETALK_DDP, WLAN_IEEE_OUI_LEN) &&
+					_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_APPLETALK_DDP, 2) )
+			{
+				bsnaphdr=_TRUE;	//wlan_pkt_format = WLAN_PKT_FORMAT_APPLETALK;
+			}
+			else if (_rtw_memcmp( psnap->oui, oui_8021h, WLAN_IEEE_OUI_LEN))
+			{
+				bsnaphdr=_TRUE;	//wlan_pkt_format = WLAN_PKT_FORMAT_SNAP_TUNNEL;
+			}
+			else
+			{
+				RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("drop pkt due to invalid frame format!\n"));
+
+				//KeBugCheckEx(0x87123333, 0xe0, 0x4c, 0x87, 0xdd);
+
+				//panic("0x87123333, 0xe0, 0x4c, 0x87, 0xdd\n");
+
+				rtw_free_recvframe(pnrframe, pfree_recv_queue);
+
+				goto exit;
+			}
+
+		}
+		else
+		{
+			bsnaphdr=_FALSE;//wlan_pkt_format = WLAN_PKT_FORMAT_OTHERS;
+		}
+
+		ptr += (bsnaphdr?SNAP_SIZE:0);
+		_rtw_memcpy(&eth_type, ptr, 2);
+		eth_type= ntohs((unsigned short )eth_type); //pattrib->ether_type
+
+		mv_len+= 2+(bsnaphdr?SNAP_SIZE:0);
+		ptr += 2;//now move to iphdr;
+
+		pvlan = NULL;
+		if(eth_type == 0x8100) //vlan
+		{
+			pvlan = (struct _vlan *)ptr;
+			ptr+=4;
+			mv_len+=4;
+		}
+
+		if(eth_type==0x0800)//ip
+		{
+			struct iphdr*  piphdr = (struct iphdr*)ptr;
+
+
+			if (piphdr->protocol == 0x06)
+			{
+				RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("@@@===recv tcp len:%d @@@===\n", pnrframe->u.hdr.len));
+			}
+		}
+#ifdef PLATFORM_OS_XP
+		else
+		{
+			NDIS_PACKET_8021Q_INFO VlanPriInfo;
+			UINT32 UserPriority = pnrframe->u.hdr.attrib.priority;
+			UINT32 VlanID = (pvlan!=NULL ? get_vlan_id(pvlan) : 0 );
+
+			VlanPriInfo.Value =          // Get current value.
+					NDIS_PER_PACKET_INFO_FROM_PACKET(pnrframe->u.hdr.pkt, Ieee8021QInfo);
+
+			VlanPriInfo.TagHeader.UserPriority = UserPriority;
+			VlanPriInfo.TagHeader.VlanId =  VlanID;
+
+			VlanPriInfo.TagHeader.CanonicalFormatId = 0; // Should be zero.
+			VlanPriInfo.TagHeader.Reserved = 0; // Should be zero.
+			NDIS_PER_PACKET_INFO_FROM_PACKET(pnrframe->u.hdr.pkt, Ieee8021QInfo) = VlanPriInfo.Value;
+
+		}
+#endif
+
+		pbuf = recvframe_pull(pnrframe, (mv_len-sizeof(struct ethhdr)));
+
+		_rtw_memcpy(pbuf, pnrframe->u.hdr.attrib.dst, ETH_ALEN);
+		_rtw_memcpy(pbuf+ETH_ALEN, pnrframe->u.hdr.attrib.src, ETH_ALEN);
+
+		eth_type = htons((unsigned short)eth_type) ;
+		_rtw_memcpy(pbuf+12, &eth_type, 2);
+
+		padding_len = (4) - ((type_len + ETH_HLEN)&(4-1));
+
+		a_len -= (type_len + ETH_HLEN + padding_len) ;
+
+
+#if 0
+
+	if(a_len > ETH_HLEN)
+	{
+		pnrframe_new = rtw_alloc_recvframe(pfree_recv_queue);
+		if(pnrframe_new)
+		{
+			_pkt *pskb_copy;
+			unsigned int copy_len  = pnrframe->u.hdr.len;
+
+			_rtw_init_listhead(&pnrframe_new->u.hdr.list);
+
+	#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html
+			pskb_copy = dev_alloc_skb(copy_len+64);
+	#else
+			pskb_copy = netdev_alloc_skb(padapter->pnetdev, copy_len + 64);
+	#endif
+			if(pskb_copy==NULL)
+			{
+				DBG_8192C("amsdu_to_msdu:can not all(ocate memory for skb copy\n");
+			}
+
+			pnrframe_new->u.hdr.pkt = pskb_copy;
+
+			_rtw_memcpy(pskb_copy->data, pnrframe->u.hdr.rx_data, copy_len);
+
+			pnrframe_new->u.hdr.rx_data = pnrframe->u.hdr.rx_data;
+			pnrframe_new->u.hdr.rx_tail = pnrframe->u.hdr.rx_data + copy_len;
+
+
+			if ((padapter->bDriverStopped ==_FALSE)&&( padapter->bSurpriseRemoved==_FALSE))
+			{
+				rtw_recv_indicatepkt(padapter, pnrframe_new);//indicate this recv_frame
+			}
+			else
+			{
+				rtw_free_recvframe(pnrframe_new, pfree_recv_queue);//free this recv_frame
+			}
+
+		}
+		else
+		{
+			DBG_8192C("amsdu_to_msdu:can not allocate memory for pnrframe_new\n");
+		}
+
+	}
+	else
+	{
+		if ((padapter->bDriverStopped ==_FALSE)&&( padapter->bSurpriseRemoved==_FALSE))
+		{
+			rtw_recv_indicatepkt(padapter, pnrframe);//indicate this recv_frame
+		}
+		else
+		{
+			rtw_free_recvframe(pnrframe, pfree_recv_queue);//free this recv_frame
+		}
+
+		pnrframe = NULL;
+
+	}
+
+#else
+
+		//padding_len = (4) - ((type_len + ETH_HLEN)&(4-1));
+
+		//a_len -= (type_len + ETH_HLEN + padding_len) ;
+
+		pnrframe_new = NULL;
+
+
+		if(a_len > ETH_HLEN)
+		{
+			pnrframe_new = rtw_alloc_recvframe(pfree_recv_queue);
+
+			if(pnrframe_new)
+			{
+
+
+				//pnrframe_new->u.hdr.precvbuf = precvbuf;//precvbuf is assigned before call rtw_init_recvframe()
+				//rtw_init_recvframe(pnrframe_new, precvpriv);
+				{
+						_pkt *pskb = pnrframe->u.hdr.pkt;
+						_rtw_init_listhead(&pnrframe_new->u.hdr.list);
+
+						pnrframe_new->u.hdr.len=0;
+
+#ifdef PLATFORM_LINUX
+						if(pskb)
+						{
+							pnrframe_new->u.hdr.pkt = skb_clone(pskb, GFP_ATOMIC);
+						}
+#endif
+
+				}
+
+				pdata += (type_len + ETH_HLEN + padding_len);
+				pnrframe_new->u.hdr.rx_head = pnrframe_new->u.hdr.rx_data = pnrframe_new->u.hdr.rx_tail = pdata;
+				pnrframe_new->u.hdr.rx_end = pdata + a_len + padding_len;//
+
+#ifdef PLATFORM_WINDOWS
+				pnrframe_new->u.hdr.precvbuf=precvbuf;
+				_enter_critical_bh(&precvbuf->recvbuf_lock, &irql);
+				precvbuf->ref_cnt++;
+				_exit_critical_bh(&precvbuf->recvbuf_lock, &irql);
+#endif
+
+			}
+			else
+			{
+				//panic("pnrframe_new=%x\n", pnrframe_new);
+			}
+		}
+
+
+		if ((padapter->bDriverStopped ==_FALSE)&&( padapter->bSurpriseRemoved==_FALSE) )
+		{
+			rtw_recv_indicatepkt(padapter, pnrframe);//indicate this recv_frame
+		}
+		else
+		{
+			rtw_free_recvframe(pnrframe, pfree_recv_queue);//free this recv_frame
+		}
+
+
+		pnrframe = NULL;
+		if(pnrframe_new)
+		{
+			pnrframe = pnrframe_new;
+		}
+
+
+#endif
+
+	}while(pnrframe);
+
+exit:
+
+	return ret;
+#endif
+}
+
+
+static int check_indicate_seq(struct recv_reorder_ctrl *preorder_ctrl, u16 seq_num)
+{
+	u8	wsize = preorder_ctrl->wsize_b;
+	u16	wend = (preorder_ctrl->indicate_seq + wsize -1) & 0xFFF;//% 4096;
+
+	// Rx Reorder initialize condition.
+	if (preorder_ctrl->indicate_seq == 0xFFFF)
+	{
+		preorder_ctrl->indicate_seq = seq_num;
+		#ifdef DBG_RX_SEQ
+		DBG_871X("DBG_RX_SEQ %s:%d init IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__,
+			preorder_ctrl->indicate_seq, seq_num);
+		#endif
+
+		//DbgPrint("check_indicate_seq, 1st->indicate_seq=%d\n", precvpriv->indicate_seq);
+	}
+
+	//DbgPrint("enter->check_indicate_seq(): IndicateSeq: %d, NewSeq: %d\n", precvpriv->indicate_seq, seq_num);
+
+	// Drop out the packet which SeqNum is smaller than WinStart
+	if( SN_LESS(seq_num, preorder_ctrl->indicate_seq) )
+	{
+		//RT_TRACE(COMP_RX_REORDER, DBG_LOUD, ("CheckRxTsIndicateSeq(): Packet Drop! IndicateSeq: %d, NewSeq: %d\n", pTS->RxIndicateSeq, NewSeqNum));
+		//DbgPrint("CheckRxTsIndicateSeq(): Packet Drop! IndicateSeq: %d, NewSeq: %d\n", precvpriv->indicate_seq, seq_num);
+
+		#ifdef DBG_RX_DROP_FRAME
+		DBG_871X("DBG_RX_DROP_FRAME %s IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__,
+			preorder_ctrl->indicate_seq, seq_num);
+		#endif
+
+
+		return _FALSE;
+	}
+
+	//
+	// Sliding window manipulation. Conditions includes:
+	// 1. Incoming SeqNum is equal to WinStart =>Window shift 1
+	// 2. Incoming SeqNum is larger than the WinEnd => Window shift N
+	//
+	if( SN_EQUAL(seq_num, preorder_ctrl->indicate_seq) )
+	{
+		preorder_ctrl->indicate_seq = (preorder_ctrl->indicate_seq + 1) & 0xFFF;
+		#ifdef DBG_RX_SEQ
+		DBG_871X("DBG_RX_SEQ %s:%d SN_EQUAL IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__,
+			preorder_ctrl->indicate_seq, seq_num);
+		#endif
+	}
+	else if(SN_LESS(wend, seq_num))
+	{
+		//RT_TRACE(COMP_RX_REORDER, DBG_LOUD, ("CheckRxTsIndicateSeq(): Window Shift! IndicateSeq: %d, NewSeq: %d\n", pTS->RxIndicateSeq, NewSeqNum));
+		//DbgPrint("CheckRxTsIndicateSeq(): Window Shift! IndicateSeq: %d, NewSeq: %d\n", precvpriv->indicate_seq, seq_num);
+
+		// boundary situation, when seq_num cross 0xFFF
+		if(seq_num >= (wsize - 1))
+			preorder_ctrl->indicate_seq = seq_num + 1 -wsize;
+		else
+			preorder_ctrl->indicate_seq = 0xFFF - (wsize - (seq_num + 1)) + 1;
+
+		#ifdef DBG_RX_SEQ
+		DBG_871X("DBG_RX_SEQ %s:%d SN_LESS(wend, seq_num) IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__,
+			preorder_ctrl->indicate_seq, seq_num);
+		#endif
+	}
+
+	//DbgPrint("exit->check_indicate_seq(): IndicateSeq: %d, NewSeq: %d\n", precvpriv->indicate_seq, seq_num);
+
+	return _TRUE;
+}
+
+
+static int enqueue_reorder_recvframe(struct recv_reorder_ctrl *preorder_ctrl, union recv_frame *prframe)
+{
+	struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib;
+	_queue *ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue;
+	_list	*phead, *plist;
+	union recv_frame *pnextrframe;
+	struct rx_pkt_attrib *pnextattrib;
+
+	//DbgPrint("+enqueue_reorder_recvframe()\n");
+
+	//_enter_critical_ex(&ppending_recvframe_queue->lock, &irql);
+	//_rtw_spinlock_ex(&ppending_recvframe_queue->lock);
+
+
+	phead = get_list_head(ppending_recvframe_queue);
+	plist = get_next(phead);
+
+	while(rtw_end_of_queue_search(phead, plist) == _FALSE)
+	{
+		pnextrframe = LIST_CONTAINOR(plist, union recv_frame, u);
+		pnextattrib = &pnextrframe->u.hdr.attrib;
+
+		if(SN_LESS(pnextattrib->seq_num, pattrib->seq_num))
+		{
+			plist = get_next(plist);
+		}
+		else if( SN_EQUAL(pnextattrib->seq_num, pattrib->seq_num))
+		{
+			//Duplicate entry is found!! Do not insert current entry.
+			//RT_TRACE(COMP_RX_REORDER, DBG_TRACE, ("InsertRxReorderList(): Duplicate packet is dropped!! IndicateSeq: %d, NewSeq: %d\n", pTS->RxIndicateSeq, SeqNum));
+
+			//_exit_critical_ex(&ppending_recvframe_queue->lock, &irql);
+
+			return _FALSE;
+		}
+		else
+		{
+			break;
+		}
+
+		//DbgPrint("enqueue_reorder_recvframe():while\n");
+
+	}
+
+
+	//_enter_critical_ex(&ppending_recvframe_queue->lock, &irql);
+	//_rtw_spinlock_ex(&ppending_recvframe_queue->lock);
+
+	rtw_list_delete(&(prframe->u.hdr.list));
+
+	rtw_list_insert_tail(&(prframe->u.hdr.list), plist);
+
+	//_rtw_spinunlock_ex(&ppending_recvframe_queue->lock);
+	//_exit_critical_ex(&ppending_recvframe_queue->lock, &irql);
+
+
+	//RT_TRACE(COMP_RX_REORDER, DBG_TRACE, ("InsertRxReorderList(): Pkt insert into buffer!! IndicateSeq: %d, NewSeq: %d\n", pTS->RxIndicateSeq, SeqNum));
+	return _TRUE;
+
+}
+
+
+static int recv_indicatepkts_in_order(_adapter *padapter, struct recv_reorder_ctrl *preorder_ctrl, int bforced)
+{
+	_irqL irql;
+	//u8 bcancelled;
+	_list	*phead, *plist;
+	union recv_frame *prframe;
+	struct rx_pkt_attrib *pattrib;
+	//u8 index = 0;
+	int bPktInBuf = _FALSE;
+	struct recv_priv *precvpriv = &padapter->recvpriv;
+	_queue *ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue;
+
+	//DbgPrint("+recv_indicatepkts_in_order\n");
+
+	//_enter_critical_ex(&ppending_recvframe_queue->lock, &irql);
+	//_rtw_spinlock_ex(&ppending_recvframe_queue->lock);
+
+	phead = 	get_list_head(ppending_recvframe_queue);
+	plist = get_next(phead);
+
+#if 0
+	// Check if there is any other indication thread running.
+	if(pTS->RxIndicateState == RXTS_INDICATE_PROCESSING)
+		return;
+#endif
+
+	// Handling some condition for forced indicate case.
+	if(bforced==_TRUE)
+	{
+		if(rtw_is_list_empty(phead))
+		{
+			// _exit_critical_ex(&ppending_recvframe_queue->lock, &irql);
+			//_rtw_spinunlock_ex(&ppending_recvframe_queue->lock);
+			return _TRUE;
+		}
+	
+		 prframe = LIST_CONTAINOR(plist, union recv_frame, u);
+	        pattrib = &prframe->u.hdr.attrib;	
+		preorder_ctrl->indicate_seq = pattrib->seq_num;		
+		#ifdef DBG_RX_SEQ
+		DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__,
+			preorder_ctrl->indicate_seq, pattrib->seq_num);
+		#endif
+	}
+
+	// Prepare indication list and indication.
+	// Check if there is any packet need indicate.
+	while(!rtw_is_list_empty(phead))
+	{										
+	
+		prframe = LIST_CONTAINOR(plist, union recv_frame, u);
+		pattrib = &prframe->u.hdr.attrib;
+
+		if(!SN_LESS(preorder_ctrl->indicate_seq, pattrib->seq_num))
+		{
+			RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_,
+				 ("recv_indicatepkts_in_order: indicate=%d seq=%d amsdu=%d\n",
+				  preorder_ctrl->indicate_seq, pattrib->seq_num, pattrib->amsdu));
+
+#if 0
+			// This protect buffer from overflow.
+			if(index >= REORDER_WIN_SIZE)
+			{
+				RT_ASSERT(FALSE, ("IndicateRxReorderList(): Buffer overflow!! \n"));
+				bPktInBuf = TRUE;
+				break;
+			}
+#endif
+
+			plist = get_next(plist);
+			rtw_list_delete(&(prframe->u.hdr.list));
+
+			if(SN_EQUAL(preorder_ctrl->indicate_seq, pattrib->seq_num))
+			{
+				preorder_ctrl->indicate_seq = (preorder_ctrl->indicate_seq + 1) & 0xFFF;
+				#ifdef DBG_RX_SEQ
+				DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__,
+					preorder_ctrl->indicate_seq, pattrib->seq_num);
+				#endif
+			}
+
+#if 0
+			index++;
+			if(index==1)
+			{
+				//Cancel previous pending timer.
+				//PlatformCancelTimer(Adapter, &pTS->RxPktPendingTimer);
+				if(bforced!=_TRUE)
+				{
+					//DBG_8192C("_cancel_timer(&preorder_ctrl->reordering_ctrl_timer, &bcancelled);\n");
+					_cancel_timer(&preorder_ctrl->reordering_ctrl_timer, &bcancelled);
+				}
+			}
+#endif
+
+			//Set this as a lock to make sure that only one thread is indicating packet.
+			//pTS->RxIndicateState = RXTS_INDICATE_PROCESSING;
+
+			// Indicate packets
+			//RT_ASSERT((index<=REORDER_WIN_SIZE), ("RxReorderIndicatePacket(): Rx Reorder buffer full!! \n"));
+
+
+			//indicate this recv_frame
+			//DbgPrint("recv_indicatepkts_in_order, indicate_seq=%d, seq_num=%d\n", precvpriv->indicate_seq, pattrib->seq_num);
+			if(!pattrib->amsdu)
+			{
+				//DBG_8192C("recv_indicatepkts_in_order, amsdu!=1, indicate_seq=%d, seq_num=%d\n", preorder_ctrl->indicate_seq, pattrib->seq_num);
+
+				if ((padapter->bDriverStopped == _FALSE) &&
+				    (padapter->bSurpriseRemoved == _FALSE))
+				{				
+					
+					rtw_recv_indicatepkt(padapter, prframe);		//indicate this recv_frame
+					
+				}
+			}
+			else if(pattrib->amsdu==1)
+			{
+				if(amsdu_to_msdu(padapter, prframe)!=_SUCCESS)
+				{
+					rtw_free_recvframe(prframe, &precvpriv->free_recv_queue);
+				}
+			}
+			else
+			{
+				//error condition;
+			}
+
+
+			//Update local variables.
+			bPktInBuf = _FALSE;
+
+		}
+		else
+		{
+			bPktInBuf = _TRUE;
+			break;
+		}
+
+		//DbgPrint("recv_indicatepkts_in_order():while\n");
+
+	}
+
+	//_rtw_spinunlock_ex(&ppending_recvframe_queue->lock);
+	//_exit_critical_ex(&ppending_recvframe_queue->lock, &irql);
+
+/*
+	//Release the indication lock and set to new indication step.
+	if(bPktInBuf)
+	{
+		// Set new pending timer.
+		//pTS->RxIndicateState = RXTS_INDICATE_REORDER;
+		//PlatformSetTimer(Adapter, &pTS->RxPktPendingTimer, pHTInfo->RxReorderPendingTime);
+		//DBG_8192C("_set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME)\n");
+		_set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME);
+	}
+	else
+	{
+		//pTS->RxIndicateState = RXTS_INDICATE_IDLE;
+	}
+*/
+	//_exit_critical_ex(&ppending_recvframe_queue->lock, &irql);
+
+	//return _TRUE;
+	return bPktInBuf;
+
+}
+
+
+static int recv_indicatepkt_reorder(_adapter *padapter, union recv_frame *prframe)
+{
+	_irqL irql;
+	int retval = _SUCCESS;
+	struct recv_priv *precvpriv = &padapter->recvpriv;
+	struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib;
+	struct recv_reorder_ctrl *preorder_ctrl = prframe->u.hdr.preorder_ctrl;
+	_queue *ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue;
+
+	if(!pattrib->amsdu)
+	{
+		//s1.
+		wlanhdr_to_ethhdr(prframe);
+
+		if(pattrib->qos !=1 /*|| pattrib->priority!=0 || IS_MCAST(pattrib->ra)*/)
+		{
+			if ((padapter->bDriverStopped == _FALSE) &&
+			    (padapter->bSurpriseRemoved == _FALSE))
+			{
+				RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("@@@@  recv_indicatepkt_reorder -recv_func recv_indicatepkt\n" ));
+
+				rtw_recv_indicatepkt(padapter, prframe);
+				return _SUCCESS;
+
+			}
+			
+			#ifdef DBG_RX_DROP_FRAME
+			DBG_871X("DBG_RX_DROP_FRAME %s pattrib->qos !=1\n", __FUNCTION__);
+			#endif
+			
+			return _FAIL;
+		
+		}
+
+		if (preorder_ctrl->enable == _FALSE)
+		{
+			//indicate this recv_frame			
+			preorder_ctrl->indicate_seq = pattrib->seq_num;
+			#ifdef DBG_RX_SEQ
+			DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__,
+				preorder_ctrl->indicate_seq, pattrib->seq_num);
+			#endif
+			
+			rtw_recv_indicatepkt(padapter, prframe);		
+			
+			preorder_ctrl->indicate_seq = (preorder_ctrl->indicate_seq + 1)%4096;
+			#ifdef DBG_RX_SEQ
+			DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__,
+				preorder_ctrl->indicate_seq, pattrib->seq_num);
+			#endif
+			
+			return _SUCCESS;	
+		}			
+
+#ifndef CONFIG_RECV_REORDERING_CTRL
+		//indicate this recv_frame
+		rtw_recv_indicatepkt(padapter, prframe);
+		return _SUCCESS;
+#endif
+
+	}
+	else if(pattrib->amsdu==1) //temp filter -> means didn't support A-MSDUs in a A-MPDU
+	{
+		if (preorder_ctrl->enable == _FALSE)
+		{
+			preorder_ctrl->indicate_seq = pattrib->seq_num;
+			#ifdef DBG_RX_SEQ
+			DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__,
+				preorder_ctrl->indicate_seq, pattrib->seq_num);
+			#endif
+
+			retval = amsdu_to_msdu(padapter, prframe);
+
+			preorder_ctrl->indicate_seq = (preorder_ctrl->indicate_seq + 1)%4096;
+			#ifdef DBG_RX_SEQ
+			DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__,
+				preorder_ctrl->indicate_seq, pattrib->seq_num);
+			#endif
+
+			if(retval != _SUCCESS){
+				#ifdef DBG_RX_DROP_FRAME
+				DBG_871X("DBG_RX_DROP_FRAME %s amsdu_to_msdu fail\n", __FUNCTION__);
+				#endif
+			}
+
+			return retval;
+		}
+	}
+	else
+	{
+
+	}
+
+	_enter_critical_bh(&ppending_recvframe_queue->lock, &irql);
+
+	RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_,
+		 ("recv_indicatepkt_reorder: indicate=%d seq=%d\n",
+		  preorder_ctrl->indicate_seq, pattrib->seq_num));
+
+	//s2. check if winstart_b(indicate_seq) needs to been updated
+	if(!check_indicate_seq(preorder_ctrl, pattrib->seq_num))
+	{
+		//pHTInfo->RxReorderDropCounter++;
+		//ReturnRFDList(Adapter, pRfd);
+		//RT_TRACE(COMP_RX_REORDER, DBG_TRACE, ("RxReorderIndicatePacket() ==> Packet Drop!!\n"));
+		//_exit_critical_ex(&ppending_recvframe_queue->lock, &irql);
+		//return _FAIL;
+
+		#ifdef DBG_RX_DROP_FRAME
+		DBG_871X("DBG_RX_DROP_FRAME %s check_indicate_seq fail\n", __FUNCTION__);
+		#endif
+		goto _err_exit;
+	}
+
+
+	//s3. Insert all packet into Reorder Queue to maintain its ordering.
+	if(!enqueue_reorder_recvframe(preorder_ctrl, prframe))
+	{
+		//DbgPrint("recv_indicatepkt_reorder, enqueue_reorder_recvframe fail!\n");
+		//_exit_critical_ex(&ppending_recvframe_queue->lock, &irql);
+		//return _FAIL;
+		#ifdef DBG_RX_DROP_FRAME
+		DBG_871X("DBG_RX_DROP_FRAME %s enqueue_reorder_recvframe fail\n", __FUNCTION__);
+		#endif
+		goto _err_exit;
+	}
+
+
+	//s4.
+	// Indication process.
+	// After Packet dropping and Sliding Window shifting as above, we can now just indicate the packets
+	// with the SeqNum smaller than latest WinStart and buffer other packets.
+	//
+	// For Rx Reorder condition:
+	// 1. All packets with SeqNum smaller than WinStart => Indicate
+	// 2. All packets with SeqNum larger than or equal to WinStart => Buffer it.
+	//
+
+	//recv_indicatepkts_in_order(padapter, preorder_ctrl, _TRUE);
+	if(recv_indicatepkts_in_order(padapter, preorder_ctrl, _FALSE)==_TRUE)
+	{
+		_set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME);
+		_exit_critical_bh(&ppending_recvframe_queue->lock, &irql);
+	}
+	else
+	{
+		_exit_critical_bh(&ppending_recvframe_queue->lock, &irql);
+		_cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer);
+	}
+
+
+	return _SUCCESS;
+
+_err_exit:
+
+        _exit_critical_bh(&ppending_recvframe_queue->lock, &irql);
+
+	return _FAIL;
+}
+
+
+void rtw_reordering_ctrl_timeout_handler(void *pcontext)
+{
+	_irqL irql;
+	struct recv_reorder_ctrl *preorder_ctrl = (struct recv_reorder_ctrl *)pcontext;
+	_adapter *padapter = preorder_ctrl->padapter;
+	_queue *ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue;
+
+
+	if(padapter->bDriverStopped ||padapter->bSurpriseRemoved)
+	{
+		return;
+	}
+
+	//DBG_8192C("+rtw_reordering_ctrl_timeout_handler()=>\n");
+
+	_enter_critical_bh(&ppending_recvframe_queue->lock, &irql);
+
+	if(recv_indicatepkts_in_order(padapter, preorder_ctrl, _TRUE)==_TRUE)
+	{
+		_set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME);		
+	}
+
+	_exit_critical_bh(&ppending_recvframe_queue->lock, &irql);
+
+}
+
+
+static int process_recv_indicatepkts(_adapter *padapter, union recv_frame *prframe)
+{
+	int retval = _SUCCESS;
+	struct recv_priv *precvpriv = &padapter->recvpriv;
+	struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib;
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+
+#ifdef CONFIG_80211N_HT
+
+	struct ht_priv	*phtpriv = &pmlmepriv->htpriv;
+
+	if(phtpriv->ht_option==_TRUE) //B/G/N Mode
+	{
+		//prframe->u.hdr.preorder_ctrl = &precvpriv->recvreorder_ctrl[pattrib->priority];
+
+		if(recv_indicatepkt_reorder(padapter, prframe)!=_SUCCESS)// including perform A-MPDU Rx Ordering Buffer Control
+		{
+			#ifdef DBG_RX_DROP_FRAME
+			DBG_871X("DBG_RX_DROP_FRAME %s recv_indicatepkt_reorder error!\n", __FUNCTION__);
+			#endif
+		
+			if ((padapter->bDriverStopped == _FALSE) &&
+			    (padapter->bSurpriseRemoved == _FALSE))
+			{
+				retval = _FAIL;
+				return retval;
+			}
+		}
+	}
+	else //B/G mode
+#endif
+	{
+		retval=wlanhdr_to_ethhdr (prframe);
+		if(retval != _SUCCESS)
+		{
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("wlanhdr_to_ethhdr: drop pkt \n"));
+			#ifdef DBG_RX_DROP_FRAME
+			DBG_871X("DBG_RX_DROP_FRAME %s wlanhdr_to_ethhdr error!\n", __FUNCTION__);
+			#endif
+			return retval;
+		}
+
+		if ((padapter->bDriverStopped ==_FALSE)&&( padapter->bSurpriseRemoved==_FALSE))
+		{
+			//indicate this recv_frame
+			RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("@@@@ process_recv_indicatepkts- recv_func recv_indicatepkt\n" ));
+			rtw_recv_indicatepkt(padapter, prframe);
+
+
+		}
+		else
+		{
+			RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("@@@@ process_recv_indicatepkts- recv_func free_indicatepkt\n" ));
+
+			RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("recv_func:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved));
+			retval = _FAIL;
+			return retval;
+		}
+
+	}
+
+	return retval;
+
+}
+ 
+
+static int recv_func(_adapter *padapter, void *pcontext)
+{
+	struct rx_pkt_attrib *pattrib;
+	union recv_frame *prframe, *orig_prframe;
+	int retval = _SUCCESS;
+	_queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue;
+	struct recv_priv *precvpriv = &padapter->recvpriv;
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+#ifdef CONFIG_TDLS
+	u8 *psnap_type, *pcategory;
+#endif
+
+	prframe = (union recv_frame *)pcontext;
+	orig_prframe = prframe;
+
+	pattrib = &prframe->u.hdr.attrib;
+
+#ifdef CONFIG_MP_INCLUDED
+	if ((check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE))//&&(padapter->mppriv.check_mp_pkt == 0))
+	{
+		if (pattrib->crc_err == 1)
+			padapter->mppriv.rx_crcerrpktcount++;
+		else
+			padapter->mppriv.rx_pktcount++;
+
+		if (check_fwstate(pmlmepriv, WIFI_MP_LPBK_STATE) == _FALSE) {
+			RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("MP - Not in loopback mode , drop pkt \n"));
+			retval = _FAIL;
+			rtw_free_recvframe(orig_prframe, pfree_recv_queue);//free this recv_frame
+			goto _exit_recv_func;
+		}
+	}
+#endif
+
+	//check the frame crtl field and decache
+	retval = validate_recv_frame(padapter, prframe);
+	if (retval != _SUCCESS)
+	{
+		RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("recv_func: validate_recv_frame fail! drop pkt\n"));
+		rtw_free_recvframe(orig_prframe, pfree_recv_queue);//free this recv_frame
+		goto _exit_recv_func;
+	}
+	// DATA FRAME
+	rtw_led_control(padapter, LED_CTL_RX);
+
+	prframe = decryptor(padapter, prframe);
+	if (prframe == NULL) {
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("decryptor: drop pkt\n"));
+		#ifdef DBG_RX_DROP_FRAME
+		DBG_871X("DBG_RX_DROP_FRAME %s decryptor: drop pkt\n", __FUNCTION__);
+		#endif
+		retval = _FAIL;
+		goto _exit_recv_func;
+	}
+
+#ifdef CONFIG_TDLS
+	//check TDLS frame
+	psnap_type = get_recvframe_data(orig_prframe);
+	psnap_type+=pattrib->hdrlen + pattrib->iv_len+SNAP_SIZE;
+	//[+2]: ether_type, [+1]: payload type
+	pcategory = psnap_type+2+1;
+	if((_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_TDLS, 2))&&((*pcategory==0x0c))){
+		retval = OnTDLS(padapter, prframe);	//all of functions will return _FAIL
+		goto _exit_recv_func;
+	}
+#endif
+
+	prframe = recvframe_chk_defrag(padapter, prframe);
+	if(prframe==NULL)	{
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvframe_chk_defrag: drop pkt\n"));
+		#ifdef DBG_RX_DROP_FRAME
+		DBG_871X("DBG_RX_DROP_FRAME %s recvframe_chk_defrag: drop pkt\n", __FUNCTION__);
+		#endif
+		goto _exit_recv_func;		
+	}
+
+	prframe=portctrl(padapter, prframe);
+	if (prframe == NULL) {
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("portctrl: drop pkt \n"));
+		#ifdef DBG_RX_DROP_FRAME
+		DBG_871X("DBG_RX_DROP_FRAME %s portctrl: drop pkt\n", __FUNCTION__);
+		#endif
+		retval = _FAIL;
+		goto _exit_recv_func;
+	}
+
+	count_rx_stats(padapter, prframe);
+
+#ifdef CONFIG_80211N_HT
+
+	retval = process_recv_indicatepkts(padapter, prframe);
+	if (retval != _SUCCESS)
+	{
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recv_func: process_recv_indicatepkts fail! \n"));
+		#ifdef DBG_RX_DROP_FRAME
+		DBG_871X("DBG_RX_DROP_FRAME %s recv_func: process_recv_indicatepkts fail!\n", __FUNCTION__);
+		#endif
+		rtw_free_recvframe(orig_prframe, pfree_recv_queue);//free this recv_frame
+		goto _exit_recv_func;
+	}
+
+#else
+
+	if (!pattrib->amsdu)
+	{
+		retval = wlanhdr_to_ethhdr (prframe);
+		if (retval != _SUCCESS)
+		{
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("wlanhdr_to_ethhdr: drop pkt \n"));
+			#ifdef DBG_RX_DROP_FRAME
+			DBG_871X("DBG_RX_DROP_FRAME %s wlanhdr_to_ethhdr: drop pkt\n", __FUNCTION__);
+			#endif
+			rtw_free_recvframe(orig_prframe, pfree_recv_queue);//free this recv_frame
+			goto _exit_recv_func;
+		}
+
+		if ((padapter->bDriverStopped == _FALSE) && (padapter->bSurpriseRemoved == _FALSE))
+		{
+			RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("@@@@ recv_func: recv_func rtw_recv_indicatepkt\n" ));
+			//indicate this recv_frame
+			retval = rtw_recv_indicatepkt(padapter, prframe);
+			if (retval != _SUCCESS)
+			{	
+				#ifdef DBG_RX_DROP_FRAME
+				DBG_871X("DBG_RX_DROP_FRAME %s rtw_recv_indicatepkt fail!\n", __FUNCTION__);
+				#endif
+				goto _exit_recv_func;
+			}
+		}
+		else
+		{
+			RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("@@@@  recv_func: rtw_free_recvframe\n" ));
+			RT_TRACE(_module_rtl871x_recv_c_, _drv_debug_, ("recv_func:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved));
+			#ifdef DBG_RX_DROP_FRAME
+			DBG_871X("DBG_RX_DROP_FRAME %s ecv_func:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", __FUNCTION__,
+				padapter->bDriverStopped, padapter->bSurpriseRemoved);
+			#endif
+			retval = _FAIL;
+			rtw_free_recvframe(orig_prframe, pfree_recv_queue); //free this recv_frame
+		}
+
+	}
+	else if(pattrib->amsdu==1)
+	{
+
+		retval = amsdu_to_msdu(padapter, prframe);
+		if(retval != _SUCCESS)
+		{
+			#ifdef DBG_RX_DROP_FRAME
+			DBG_871X("DBG_RX_DROP_FRAME %s amsdu_to_msdu fail\n", __FUNCTION__);
+			#endif
+			rtw_free_recvframe(orig_prframe, pfree_recv_queue);
+			goto _exit_recv_func;
+		}
+	}
+	else
+	{
+		#ifdef DBG_RX_DROP_FRAME
+		DBG_871X("DBG_RX_DROP_FRAME %s what is this condition??\n", __FUNCTION__);
+		#endif
+	}
+#endif
+
+
+_exit_recv_func:
+
+	return retval;
+}
+
+
+s32 rtw_recv_entry(union recv_frame *precvframe)
+{
+	_adapter *padapter;
+	struct recv_priv *precvpriv;
+	//struct	mlme_priv	*pmlmepriv ;
+	//struct dvobj_priv *pdev;
+	//u8 *phead, *pdata, *ptail,*pend;
+
+	//_queue *pfree_recv_queue, *ppending_recv_queue;
+	//u8 blk_mode = _FALSE;
+	s32 ret=_SUCCESS;
+	//struct intf_hdl * pintfhdl;
+
+_func_enter_;
+
+//	RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("+rtw_recv_entry\n"));
+
+	padapter = precvframe->u.hdr.adapter;
+	//pintfhdl = &padapter->iopriv.intf;
+
+	//pdev=&padapter->dvobjpriv;	
+	//pmlmepriv = &padapter->mlmepriv;
+	precvpriv = &padapter->recvpriv;
+	//pfree_recv_queue = &precvpriv->free_recv_queue;
+	//ppending_recv_queue = &precvpriv->recv_pending_queue;
+
+	//phead = precvframe->u.hdr.rx_head;
+	//pdata = precvframe->u.hdr.rx_data;
+	//ptail = precvframe->u.hdr.rx_tail;
+	//pend = precvframe->u.hdr.rx_end;
+
+	//rtw_led_control(padapter, LED_CTL_RX);
+
+#ifdef CONFIG_SDIO_HCI
+	if (precvpriv->free_recvframe_cnt <= 1)
+		goto _recv_entry_drop;
+#endif
+
+#ifdef CONFIG_RECV_THREAD_MODE
+	if (_rtw_queue_empty(ppending_recv_queue) == _TRUE)
+	{
+		//enqueue_recvframe_usb(precvframe, ppending_recv_queue);//enqueue to recv_pending_queue
+	 	rtw_enqueue_recvframe(precvframe, ppending_recv_queue);
+		_rtw_up_sema(&precvpriv->recv_sema);
+	}
+	else
+	{
+		//enqueue_recvframe_usb(precvframe, ppending_recv_queue);//enqueue to recv_pending_queue
+		rtw_enqueue_recvframe(precvframe, ppending_recv_queue);
+	}
+#else
+	if ((ret = recv_func(padapter, precvframe)) == _FAIL)
+	{
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("rtw_recv_entry: recv_func return fail!!!\n"));
+		goto _recv_entry_drop;
+	}
+#endif
+
+	precvpriv->rx_pkts++;
+
+_func_exit_;
+
+	return ret;
+
+_recv_entry_drop:
+
+
+	precvpriv->rx_drop++;
+
+#ifdef CONFIG_MP_INCLUDED
+	padapter->mppriv.rx_pktloss = precvpriv->rx_drop;
+#endif
+
+	//RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("_recv_entry_drop\n"));
+
+_func_exit_;
+
+	return ret;
+}
+
+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
+void rtw_signal_stat_timer_hdl(RTW_TIMER_HDL_ARGS){
+	_adapter *adapter = (_adapter *)FunctionContext;
+	struct recv_priv *recvpriv = &adapter->recvpriv;
+	
+	u32 tmp_s, tmp_q;
+	u8 avg_signal_strength = 0;
+	u8 avg_signal_qual = 0;
+	u32 num_signal_strength = 0;
+	u32 num_signal_qual = 0;
+	u8 _alpha = 3; // this value is based on converging_constant = 5000 and sampling_interval = 1000
+
+	if(adapter->recvpriv.is_signal_dbg) {
+		//update the user specific value, signal_strength_dbg, to signal_strength, rssi
+		adapter->recvpriv.signal_strength= adapter->recvpriv.signal_strength_dbg;
+		adapter->recvpriv.rssi=(s8)translate_percentage_to_dbm((u8)adapter->recvpriv.signal_strength_dbg);
+	} else {
+
+		if(recvpriv->signal_strength_data.update_req == 0) {// update_req is clear, means we got rx
+			avg_signal_strength = recvpriv->signal_strength_data.avg_val;
+			avg_signal_qual = recvpriv->signal_qual_data.avg_val;
+		}
+		
+		if(recvpriv->signal_qual_data.update_req == 0) {// update_req is clear, means we got rx
+			num_signal_strength = recvpriv->signal_strength_data.total_num;
+			num_signal_qual = recvpriv->signal_qual_data.total_num;
+		}
+		
+		// after avg_vals are accquired, we can re-stat the signal values
+		recvpriv->signal_strength_data.update_req = 1;
+		recvpriv->signal_qual_data.update_req = 1;
+
+		//update value of signal_strength, rssi, signal_qual
+		if(check_fwstate(&adapter->mlmepriv, _FW_UNDER_SURVEY) == _FALSE) {
+			tmp_s = (avg_signal_strength+(_alpha-1)*recvpriv->signal_strength);
+			if(tmp_s %_alpha)
+				tmp_s = tmp_s/_alpha + 1;
+			else
+				tmp_s = tmp_s/_alpha;
+			if(tmp_s>100)
+				tmp_s = 100;
+
+			tmp_q = (avg_signal_qual+(_alpha-1)*recvpriv->signal_qual);
+			if(tmp_q %_alpha)
+				tmp_q = tmp_q/_alpha + 1;
+			else
+				tmp_q = tmp_q/_alpha;
+			if(tmp_q>100)
+				tmp_q = 100;
+
+			recvpriv->signal_strength = tmp_s;
+			recvpriv->rssi = (s8)translate_percentage_to_dbm(tmp_s);
+			recvpriv->signal_qual = tmp_q;
+
+			#if defined(DBG_RX_SIGNAL_DISPLAY_PROCESSING) && 1
+			DBG_871X("%s signal_strength:%3u, rssi:%3d, signal_qual:%3u"
+				", num_signal_strength:%u, num_signal_qual:%u"
+				"\n"
+				, __FUNCTION__
+				, recvpriv->signal_strength
+				, recvpriv->rssi
+				, recvpriv->signal_qual
+				, num_signal_strength, num_signal_qual
+			);
+			#endif
+		}
+	}
+	rtw_set_signal_stat_timer(recvpriv);
+	
+}
+#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
+
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_rf.c linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_rf.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_rf.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_rf.c	2017-09-23 03:42:49.902675418 +0800
@@ -0,0 +1,96 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#define _RTW_RF_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <recv_osdep.h>
+#include <xmit_osdep.h>
+
+
+struct ch_freq {
+	u32 channel;
+	u32 frequency;
+};
+
+struct ch_freq ch_freq_map[] = {
+	{1, 2412},{2, 2417},{3, 2422},{4, 2427},{5, 2432},
+	{6, 2437},{7, 2442},{8, 2447},{9, 2452},{10, 2457},
+	{11, 2462},{12, 2467},{13, 2472},{14, 2484},
+	/*  UNII */
+	{36, 5180},{40, 5200},{44, 5220},{48, 5240},{52, 5260},
+	{56, 5280},{60, 5300},{64, 5320},{149, 5745},{153, 5765},
+	{157, 5785},{161, 5805},{165, 5825},{167, 5835},{169, 5845},
+	{171, 5855},{173, 5865},
+	/* HiperLAN2 */
+	{100, 5500},{104, 5520},{108, 5540},{112, 5560},{116, 5580},
+	{120, 5600},{124, 5620},{128, 5640},{132, 5660},{136, 5680},
+	{140, 5700},
+	/* Japan MMAC */
+	{34, 5170},{38, 5190},{42, 5210},{46, 5230},
+	/*  Japan */
+	{184, 4920},{188, 4940},{192, 4960},{196, 4980},
+	{208, 5040},/* Japan, means J08 */
+	{212, 5060},/* Japan, means J12 */
+	{216, 5080},/* Japan, means J16 */
+};
+
+int ch_freq_map_num = (sizeof(ch_freq_map) / sizeof(struct ch_freq));
+
+u32 rtw_ch2freq(u32 channel)
+{
+	u8	i;
+	u32	freq = 0;
+
+	for (i = 0; i < ch_freq_map_num; i++)
+	{
+		if (channel == ch_freq_map[i].channel)
+		{
+			freq = ch_freq_map[i].frequency;
+				break;
+		}
+	}
+	if (i == ch_freq_map_num)
+		freq = 2412;
+
+	return freq;
+}
+
+u32 rtw_freq2ch(u32 freq)
+{
+	u8	i;
+	u32	ch = 0;
+
+	for (i = 0; i < ch_freq_map_num; i++)
+	{
+		if (freq == ch_freq_map[i].frequency)
+		{
+			ch = ch_freq_map[i].channel;
+				break;
+		}
+	}
+	if (i == ch_freq_map_num)
+		ch = 1;
+
+	return ch;
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_security.c linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_security.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_security.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_security.c	2017-09-23 03:42:49.906675407 +0800
@@ -0,0 +1,2811 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#define  _RTW_SECURITY_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <wifi.h>
+#include <osdep_intf.h>
+
+
+//=====WEP related===== 
+
+#define CRC32_POLY 0x04c11db7
+
+struct arc4context
+{
+	u32 x;
+	u32 y;
+	u8 state[256];
+};
+
+
+static void arcfour_init(struct arc4context 	*parc4ctx, u8 * key,u32	key_len)
+{
+	u32	t, u;
+	u32	keyindex;
+	u32	stateindex;
+	u8 * state;
+	u32	counter;
+_func_enter_;
+	state = parc4ctx->state;
+	parc4ctx->x = 0;
+	parc4ctx->y = 0;
+	for (counter = 0; counter < 256; counter++)
+		state[counter] = (u8)counter;
+	keyindex = 0;
+	stateindex = 0;
+	for (counter = 0; counter < 256; counter++)
+	{
+		t = state[counter];
+		stateindex = (stateindex + key[keyindex] + t) & 0xff;
+		u = state[stateindex];
+		state[stateindex] = (u8)t;
+		state[counter] = (u8)u;
+		if (++keyindex >= key_len)
+			keyindex = 0;
+	}
+_func_exit_;	
+}
+static u32 arcfour_byte(	struct arc4context	*parc4ctx)
+{
+	u32 x;
+	u32 y;
+	u32 sx, sy;
+	u8 * state;
+_func_enter_;
+	state = parc4ctx->state;
+	x = (parc4ctx->x + 1) & 0xff;
+	sx = state[x];
+	y = (sx + parc4ctx->y) & 0xff;
+	sy = state[y];
+	parc4ctx->x = x;
+	parc4ctx->y = y;
+	state[y] = (u8)sx;
+	state[x] = (u8)sy;
+_func_exit_;	
+	return state[(sx + sy) & 0xff];
+}
+              
+           
+static void arcfour_encrypt(	struct arc4context	*parc4ctx, 
+	u8 * dest,
+	u8 * src, 
+	u32 len)
+{
+	u32	i;
+_func_enter_;	
+	for (i = 0; i < len; i++)
+		dest[i] = src[i] ^ (unsigned char)arcfour_byte(parc4ctx);
+_func_exit_;		
+}
+
+static sint bcrc32initialized = 0;
+static u32 crc32_table[256];
+
+
+static u8 crc32_reverseBit( u8 data)
+{
+	return( (u8)((data<<7)&0x80) | ((data<<5)&0x40) | ((data<<3)&0x20) | ((data<<1)&0x10) | ((data>>1)&0x08) | ((data>>3)&0x04) | ((data>>5)&0x02) | ((data>>7)&0x01) );
+}
+
+static void crc32_init(void)
+{
+_func_enter_;	
+	if (bcrc32initialized == 1) 
+		goto exit;
+	else{
+		sint i, j;
+		u32 c;
+		u8 *p=(u8 *)&c, *p1;
+		u8 k;
+
+		c = 0x12340000;
+
+		for (i = 0; i < 256; ++i) 
+		{
+			k = crc32_reverseBit((u8)i);
+			for (c = ((u32)k) << 24, j = 8; j > 0; --j){
+				c = c & 0x80000000 ? (c << 1) ^ CRC32_POLY : (c << 1);
+			}
+			p1 = (u8 *)&crc32_table[i];
+
+			p1[0] = crc32_reverseBit(p[3]);
+			p1[1] = crc32_reverseBit(p[2]);
+			p1[2] = crc32_reverseBit(p[1]);
+			p1[3] = crc32_reverseBit(p[0]);
+		}
+		bcrc32initialized= 1;
+	}
+exit:	
+_func_exit_;			
+}
+
+static u32 getcrc32(u8 *buf, sint len)
+{
+	u8 *p;
+	u32  crc;
+_func_enter_;	
+	if (bcrc32initialized == 0) crc32_init();
+
+	crc = 0xffffffff;       /* preload shift register, per CRC-32 spec */
+
+	for (p = buf; len > 0; ++p, --len) 
+	{
+		crc = crc32_table[ (crc ^ *p) & 0xff] ^ (crc >> 8);
+	}
+_func_exit_;				
+	return ~crc;    /* transmit complement, per CRC-32 spec */
+}
+
+
+/*
+	Need to consider the fragment  situation
+*/
+void rtw_wep_encrypt(_adapter *padapter, u8 *pxmitframe)
+{																	// exclude ICV
+	
+	unsigned char	crc[4];
+	struct arc4context	 mycontext;
+
+	sint	curfragnum,length;
+	u32	keylength;
+
+	u8	*pframe, *payload,*iv;    //,*wepkey
+	u8	wepkey[16];
+	struct	pkt_attrib	 *pattrib = &((struct xmit_frame*)pxmitframe)->attrib;
+	struct 	security_priv	*psecuritypriv=&padapter->securitypriv;
+	struct	xmit_priv		*pxmitpriv=&padapter->xmitpriv;
+	
+_func_enter_;	
+
+	
+	if(((struct xmit_frame*)pxmitframe)->buf_addr==NULL)
+		return;
+
+#ifdef CONFIG_USB_TX_AGGREGATION
+	pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_SIZE +
+		 (((struct xmit_frame*)pxmitframe)->pkt_offset * PACKET_OFFSET_SZ);
+#else
+	pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_OFFSET;
+#endif
+	
+	//start to encrypt each fragment
+	if((pattrib->encrypt==_WEP40_)||(pattrib->encrypt==_WEP104_))
+	{
+		keylength=psecuritypriv->dot11DefKeylen[psecuritypriv->dot11PrivacyKeyIndex];
+
+		for(curfragnum=0;curfragnum<pattrib->nr_frags;curfragnum++)
+		{
+			iv=pframe+pattrib->hdrlen;
+			_rtw_memcpy(&wepkey[0], iv, 3);
+			_rtw_memcpy(&wepkey[3], &psecuritypriv->dot11DefKey[psecuritypriv->dot11PrivacyKeyIndex].skey[0],keylength);
+			payload=pframe+pattrib->iv_len+pattrib->hdrlen;
+
+			if((curfragnum+1)==pattrib->nr_frags)
+			{	//the last fragment
+			
+				length=pattrib->last_txcmdsz-pattrib->hdrlen-pattrib->iv_len- pattrib->icv_len;
+			
+				*((unsigned long *)crc)=cpu_to_le32(getcrc32(payload,length));
+
+				arcfour_init(&mycontext, wepkey,3+keylength);
+				arcfour_encrypt(&mycontext, payload, payload, length);
+				arcfour_encrypt(&mycontext, payload+length, crc, 4);
+
+			}
+			else
+			{
+			length=pxmitpriv->frag_len-pattrib->hdrlen-pattrib->iv_len-pattrib->icv_len ;
+				*((unsigned long *)crc)=cpu_to_le32(getcrc32(payload,length));
+				arcfour_init(&mycontext, wepkey,3+keylength);
+				arcfour_encrypt(&mycontext, payload, payload, length);
+				arcfour_encrypt(&mycontext, payload+length, crc, 4);
+	
+			pframe+=pxmitpriv->frag_len;
+			pframe=(u8 *)RND4((SIZE_PTR)(pframe));
+
+			}
+			
+		}		
+						
+	}
+	
+_func_exit_;						
+
+}
+
+void rtw_wep_decrypt(_adapter  *padapter, u8 *precvframe)
+{								
+	// exclude ICV
+	u8	crc[4];
+	struct arc4context	 mycontext;
+	sint 	length;
+	u32	keylength;
+	u8	*pframe, *payload,*iv,wepkey[16];
+	u8	 keyindex;
+	struct	rx_pkt_attrib	 *prxattrib = &(((union recv_frame*)precvframe)->u.hdr.attrib);
+	struct 	security_priv	*psecuritypriv=&padapter->securitypriv;
+
+_func_enter_;	
+
+	pframe=(unsigned char *)((union recv_frame*)precvframe)->u.hdr.rx_data;
+	
+	//start to decrypt recvframe
+	if((prxattrib->encrypt==_WEP40_)||(prxattrib->encrypt==_WEP104_))
+	{
+		iv=pframe+prxattrib->hdrlen;
+		//keyindex=(iv[3]&0x3);
+		keyindex = prxattrib->key_index;
+		keylength=psecuritypriv->dot11DefKeylen[keyindex];
+		_rtw_memcpy(&wepkey[0], iv, 3);
+		//_rtw_memcpy(&wepkey[3], &psecuritypriv->dot11DefKey[psecuritypriv->dot11PrivacyKeyIndex].skey[0],keylength);
+		_rtw_memcpy(&wepkey[3], &psecuritypriv->dot11DefKey[keyindex].skey[0],keylength);
+		length= ((union recv_frame *)precvframe)->u.hdr.len-prxattrib->hdrlen-prxattrib->iv_len;
+
+		payload=pframe+prxattrib->iv_len+prxattrib->hdrlen;
+		
+		//decrypt payload include icv
+		arcfour_init(&mycontext, wepkey,3+keylength);
+		arcfour_encrypt(&mycontext, payload, payload,  length);
+				
+		//calculate icv and compare the icv
+		*((unsigned long *)crc)=le32_to_cpu(getcrc32(payload,length-4));
+		
+		if(crc[3]!=payload[length-1] || crc[2]!=payload[length-2] || crc[1]!=payload[length-3] || crc[0]!=payload[length-4])
+		{
+			RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_wep_decrypt:icv error crc[3](%x)!=payload[length-1](%x) || crc[2](%x)!=payload[length-2](%x) || crc[1](%x)!=payload[length-3](%x) || crc[0](%x)!=payload[length-4](%x)\n",
+						crc[3],payload[length-1],crc[2],payload[length-2],crc[1],payload[length-3],crc[0],payload[length-4]));
+		}	
+						
+	}
+	
+_func_exit_;		
+
+	return;
+	
+}
+
+//3 		=====TKIP related=====
+
+static u32 secmicgetuint32( u8 * p )
+// Convert from Byte[] to Us4Byte32 in a portable way
+{
+	s32 i;
+	u32 res = 0;
+_func_enter_;		
+	for( i=0; i<4; i++ )
+	{
+		res |= ((u32)(*p++)) << (8*i);
+	}
+_func_exit_;		
+	return res;
+}
+
+static void secmicputuint32( u8 * p, u32 val )
+// Convert from Us4Byte32 to Byte[] in a portable way
+{
+	long i;
+_func_enter_;			
+	for( i=0; i<4; i++ )
+	{
+		*p++ = (u8) (val & 0xff);
+		val >>= 8;
+	}
+_func_exit_;		
+}
+
+static void secmicclear(struct mic_data *pmicdata)
+{
+// Reset the state to the empty message.
+_func_enter_;	
+	pmicdata->L = pmicdata->K0;
+	pmicdata->R = pmicdata->K1;
+	pmicdata->nBytesInM = 0;
+	pmicdata->M = 0;
+_func_exit_;	
+}
+
+void rtw_secmicsetkey(struct mic_data *pmicdata, u8 * key )
+{
+	// Set the key
+_func_enter_;		
+	pmicdata->K0 = secmicgetuint32( key );
+	pmicdata->K1 = secmicgetuint32( key + 4 );
+	// and reset the message
+	secmicclear(pmicdata);
+_func_exit_;		
+}
+
+void rtw_secmicappendbyte(struct mic_data *pmicdata, u8 b )
+{
+_func_enter_;	
+	// Append the byte to our word-sized buffer
+	pmicdata->M |= ((unsigned long)b) << (8*pmicdata->nBytesInM);
+	pmicdata->nBytesInM++;
+	// Process the word if it is full.
+	if( pmicdata->nBytesInM >= 4 )
+	{
+		pmicdata->L ^= pmicdata->M;
+		pmicdata->R ^= ROL32( pmicdata->L, 17 );
+		pmicdata->L += pmicdata->R;
+		pmicdata->R ^= ((pmicdata->L & 0xff00ff00) >> 8) | ((pmicdata->L & 0x00ff00ff) << 8);
+		pmicdata->L += pmicdata->R;
+		pmicdata->R ^= ROL32( pmicdata->L, 3 );
+		pmicdata->L += pmicdata->R;
+		pmicdata->R ^= ROR32( pmicdata->L, 2 );
+		pmicdata->L += pmicdata->R;
+		// Clear the buffer
+		pmicdata->M = 0;
+		pmicdata->nBytesInM = 0;
+	}
+_func_exit_;			
+}
+
+void rtw_secmicappend(struct mic_data *pmicdata, u8 * src, u32 nbytes )
+{
+_func_enter_;	
+	// This is simple
+	while( nbytes > 0 )
+	{
+		rtw_secmicappendbyte(pmicdata, *src++ );
+		nbytes--;
+	}
+_func_exit_;			
+}
+
+void rtw_secgetmic(struct mic_data *pmicdata, u8 * dst )
+{
+_func_enter_;	
+	// Append the minimum padding
+	rtw_secmicappendbyte(pmicdata, 0x5a );
+	rtw_secmicappendbyte(pmicdata, 0 );
+	rtw_secmicappendbyte(pmicdata, 0 );
+	rtw_secmicappendbyte(pmicdata, 0 );
+	rtw_secmicappendbyte(pmicdata, 0 );
+	// and then zeroes until the length is a multiple of 4
+	while( pmicdata->nBytesInM != 0 )
+	{
+		rtw_secmicappendbyte(pmicdata, 0 );
+	}
+	// The appendByte function has already computed the result.
+	secmicputuint32( dst, pmicdata->L );
+	secmicputuint32( dst+4, pmicdata->R );
+	// Reset to the empty message.
+	secmicclear(pmicdata);
+_func_exit_;		
+}
+
+
+void rtw_seccalctkipmic(u8 * key,u8 *header,u8 *data,u32 data_len,u8 *mic_code, u8 pri)
+{
+
+	struct mic_data	micdata;
+	u8 priority[4]={0x0,0x0,0x0,0x0};
+_func_enter_;		
+	rtw_secmicsetkey(&micdata, key);
+	priority[0]=pri;
+	
+	/* Michael MIC pseudo header: DA, SA, 3 x 0, Priority */
+	if(header[1]&1){   //ToDS==1
+			rtw_secmicappend(&micdata, &header[16], 6);  //DA
+		if(header[1]&2)  //From Ds==1
+			rtw_secmicappend(&micdata, &header[24], 6);
+		else
+			rtw_secmicappend(&micdata, &header[10], 6);		
+	}	
+	else{	//ToDS==0
+		rtw_secmicappend(&micdata, &header[4], 6);   //DA
+		if(header[1]&2)  //From Ds==1
+			rtw_secmicappend(&micdata, &header[16], 6);
+		else
+			rtw_secmicappend(&micdata, &header[10], 6);
+
+	}
+	rtw_secmicappend(&micdata, &priority[0], 4);
+
+	
+	rtw_secmicappend(&micdata, data, data_len);
+
+	rtw_secgetmic(&micdata,mic_code);
+_func_exit_;	
+}
+
+
+
+
+/* macros for extraction/creation of unsigned char/unsigned short values  */
+#define RotR1(v16)   ((((v16) >> 1) & 0x7FFF) ^ (((v16) & 1) << 15))
+#define   Lo8(v16)   ((u8)( (v16)       & 0x00FF))
+#define   Hi8(v16)   ((u8)(((v16) >> 8) & 0x00FF))
+#define  Lo16(v32)   ((u16)( (v32)       & 0xFFFF))
+#define  Hi16(v32)   ((u16)(((v32) >>16) & 0xFFFF))
+#define  Mk16(hi,lo) ((lo) ^ (((u16)(hi)) << 8))
+
+/* select the Nth 16-bit word of the temporal key unsigned char array TK[]   */
+#define  TK16(N)     Mk16(tk[2*(N)+1],tk[2*(N)])
+
+/* S-box lookup: 16 bits --> 16 bits */
+#define _S_(v16)     (Sbox1[0][Lo8(v16)] ^ Sbox1[1][Hi8(v16)])
+
+/* fixed algorithm "parameters" */
+#define PHASE1_LOOP_CNT   8    /* this needs to be "big enough"     */
+#define TA_SIZE           6    /*  48-bit transmitter address       */
+#define TK_SIZE          16    /* 128-bit temporal key              */
+#define P1K_SIZE         10    /*  80-bit Phase1 key                */
+#define RC4_KEY_SIZE     16    /* 128-bit RC4KEY (104 bits unknown) */
+
+
+/* 2-unsigned char by 2-unsigned char subset of the full AES S-box table */
+static const unsigned short Sbox1[2][256]=       /* Sbox for hash (can be in ROM)     */
+{ {
+   0xC6A5,0xF884,0xEE99,0xF68D,0xFF0D,0xD6BD,0xDEB1,0x9154,
+   0x6050,0x0203,0xCEA9,0x567D,0xE719,0xB562,0x4DE6,0xEC9A,
+   0x8F45,0x1F9D,0x8940,0xFA87,0xEF15,0xB2EB,0x8EC9,0xFB0B,
+   0x41EC,0xB367,0x5FFD,0x45EA,0x23BF,0x53F7,0xE496,0x9B5B,
+   0x75C2,0xE11C,0x3DAE,0x4C6A,0x6C5A,0x7E41,0xF502,0x834F,
+   0x685C,0x51F4,0xD134,0xF908,0xE293,0xAB73,0x6253,0x2A3F,
+   0x080C,0x9552,0x4665,0x9D5E,0x3028,0x37A1,0x0A0F,0x2FB5,
+   0x0E09,0x2436,0x1B9B,0xDF3D,0xCD26,0x4E69,0x7FCD,0xEA9F,
+   0x121B,0x1D9E,0x5874,0x342E,0x362D,0xDCB2,0xB4EE,0x5BFB,
+   0xA4F6,0x764D,0xB761,0x7DCE,0x527B,0xDD3E,0x5E71,0x1397,
+   0xA6F5,0xB968,0x0000,0xC12C,0x4060,0xE31F,0x79C8,0xB6ED,
+   0xD4BE,0x8D46,0x67D9,0x724B,0x94DE,0x98D4,0xB0E8,0x854A,
+   0xBB6B,0xC52A,0x4FE5,0xED16,0x86C5,0x9AD7,0x6655,0x1194,
+   0x8ACF,0xE910,0x0406,0xFE81,0xA0F0,0x7844,0x25BA,0x4BE3,
+   0xA2F3,0x5DFE,0x80C0,0x058A,0x3FAD,0x21BC,0x7048,0xF104,
+   0x63DF,0x77C1,0xAF75,0x4263,0x2030,0xE51A,0xFD0E,0xBF6D,
+   0x814C,0x1814,0x2635,0xC32F,0xBEE1,0x35A2,0x88CC,0x2E39,
+   0x9357,0x55F2,0xFC82,0x7A47,0xC8AC,0xBAE7,0x322B,0xE695,
+   0xC0A0,0x1998,0x9ED1,0xA37F,0x4466,0x547E,0x3BAB,0x0B83,
+   0x8CCA,0xC729,0x6BD3,0x283C,0xA779,0xBCE2,0x161D,0xAD76,
+   0xDB3B,0x6456,0x744E,0x141E,0x92DB,0x0C0A,0x486C,0xB8E4,
+   0x9F5D,0xBD6E,0x43EF,0xC4A6,0x39A8,0x31A4,0xD337,0xF28B,
+   0xD532,0x8B43,0x6E59,0xDAB7,0x018C,0xB164,0x9CD2,0x49E0,
+   0xD8B4,0xACFA,0xF307,0xCF25,0xCAAF,0xF48E,0x47E9,0x1018,
+   0x6FD5,0xF088,0x4A6F,0x5C72,0x3824,0x57F1,0x73C7,0x9751,
+   0xCB23,0xA17C,0xE89C,0x3E21,0x96DD,0x61DC,0x0D86,0x0F85,
+   0xE090,0x7C42,0x71C4,0xCCAA,0x90D8,0x0605,0xF701,0x1C12,
+   0xC2A3,0x6A5F,0xAEF9,0x69D0,0x1791,0x9958,0x3A27,0x27B9,
+   0xD938,0xEB13,0x2BB3,0x2233,0xD2BB,0xA970,0x0789,0x33A7,
+   0x2DB6,0x3C22,0x1592,0xC920,0x8749,0xAAFF,0x5078,0xA57A,
+   0x038F,0x59F8,0x0980,0x1A17,0x65DA,0xD731,0x84C6,0xD0B8,
+   0x82C3,0x29B0,0x5A77,0x1E11,0x7BCB,0xA8FC,0x6DD6,0x2C3A,
+  },
+ 
+
+  {  /* second half of table is unsigned char-reversed version of first! */
+   0xA5C6,0x84F8,0x99EE,0x8DF6,0x0DFF,0xBDD6,0xB1DE,0x5491,
+   0x5060,0x0302,0xA9CE,0x7D56,0x19E7,0x62B5,0xE64D,0x9AEC,
+   0x458F,0x9D1F,0x4089,0x87FA,0x15EF,0xEBB2,0xC98E,0x0BFB,
+   0xEC41,0x67B3,0xFD5F,0xEA45,0xBF23,0xF753,0x96E4,0x5B9B,
+   0xC275,0x1CE1,0xAE3D,0x6A4C,0x5A6C,0x417E,0x02F5,0x4F83,
+   0x5C68,0xF451,0x34D1,0x08F9,0x93E2,0x73AB,0x5362,0x3F2A,
+   0x0C08,0x5295,0x6546,0x5E9D,0x2830,0xA137,0x0F0A,0xB52F,
+   0x090E,0x3624,0x9B1B,0x3DDF,0x26CD,0x694E,0xCD7F,0x9FEA,
+   0x1B12,0x9E1D,0x7458,0x2E34,0x2D36,0xB2DC,0xEEB4,0xFB5B,
+   0xF6A4,0x4D76,0x61B7,0xCE7D,0x7B52,0x3EDD,0x715E,0x9713,
+   0xF5A6,0x68B9,0x0000,0x2CC1,0x6040,0x1FE3,0xC879,0xEDB6,
+   0xBED4,0x468D,0xD967,0x4B72,0xDE94,0xD498,0xE8B0,0x4A85,
+   0x6BBB,0x2AC5,0xE54F,0x16ED,0xC586,0xD79A,0x5566,0x9411,
+   0xCF8A,0x10E9,0x0604,0x81FE,0xF0A0,0x4478,0xBA25,0xE34B,
+   0xF3A2,0xFE5D,0xC080,0x8A05,0xAD3F,0xBC21,0x4870,0x04F1,
+   0xDF63,0xC177,0x75AF,0x6342,0x3020,0x1AE5,0x0EFD,0x6DBF,
+   0x4C81,0x1418,0x3526,0x2FC3,0xE1BE,0xA235,0xCC88,0x392E,
+   0x5793,0xF255,0x82FC,0x477A,0xACC8,0xE7BA,0x2B32,0x95E6,
+   0xA0C0,0x9819,0xD19E,0x7FA3,0x6644,0x7E54,0xAB3B,0x830B,
+   0xCA8C,0x29C7,0xD36B,0x3C28,0x79A7,0xE2BC,0x1D16,0x76AD,
+   0x3BDB,0x5664,0x4E74,0x1E14,0xDB92,0x0A0C,0x6C48,0xE4B8,
+   0x5D9F,0x6EBD,0xEF43,0xA6C4,0xA839,0xA431,0x37D3,0x8BF2,
+   0x32D5,0x438B,0x596E,0xB7DA,0x8C01,0x64B1,0xD29C,0xE049,
+   0xB4D8,0xFAAC,0x07F3,0x25CF,0xAFCA,0x8EF4,0xE947,0x1810,
+   0xD56F,0x88F0,0x6F4A,0x725C,0x2438,0xF157,0xC773,0x5197,
+   0x23CB,0x7CA1,0x9CE8,0x213E,0xDD96,0xDC61,0x860D,0x850F,
+   0x90E0,0x427C,0xC471,0xAACC,0xD890,0x0506,0x01F7,0x121C,
+   0xA3C2,0x5F6A,0xF9AE,0xD069,0x9117,0x5899,0x273A,0xB927,
+   0x38D9,0x13EB,0xB32B,0x3322,0xBBD2,0x70A9,0x8907,0xA733,
+   0xB62D,0x223C,0x9215,0x20C9,0x4987,0xFFAA,0x7850,0x7AA5,
+   0x8F03,0xF859,0x8009,0x171A,0xDA65,0x31D7,0xC684,0xB8D0,
+   0xC382,0xB029,0x775A,0x111E,0xCB7B,0xFCA8,0xD66D,0x3A2C,
+  }
+};
+ 
+ /*
+**********************************************************************
+* Routine: Phase 1 -- generate P1K, given TA, TK, IV32
+*
+* Inputs:
+*     tk[]      = temporal key                         [128 bits]
+*     ta[]      = transmitter's MAC address            [ 48 bits]
+*     iv32      = upper 32 bits of IV                  [ 32 bits]
+* Output:
+*     p1k[]     = Phase 1 key                          [ 80 bits]
+*
+* Note:
+*     This function only needs to be called every 2**16 packets,
+*     although in theory it could be called every packet.
+*
+**********************************************************************
+*/
+static void phase1(u16 *p1k,const u8 *tk,const u8 *ta,u32 iv32)
+{
+	sint  i;
+_func_enter_;
+	/* Initialize the 80 bits of P1K[] from IV32 and TA[0..5]     */
+	p1k[0]      = Lo16(iv32);
+	p1k[1]      = Hi16(iv32);
+	p1k[2]      = Mk16(ta[1],ta[0]); /* use TA[] as little-endian */
+	p1k[3]      = Mk16(ta[3],ta[2]);
+	p1k[4]      = Mk16(ta[5],ta[4]);
+
+	/* Now compute an unbalanced Feistel cipher with 80-bit block */
+	/* size on the 80-bit block P1K[], using the 128-bit key TK[] */
+	for (i=0; i < PHASE1_LOOP_CNT ;i++)
+	{                 /* Each add operation here is mod 2**16 */
+      		p1k[0] += _S_(p1k[4] ^ TK16((i&1)+0));
+		p1k[1] += _S_(p1k[0] ^ TK16((i&1)+2));
+		p1k[2] += _S_(p1k[1] ^ TK16((i&1)+4));
+		p1k[3] += _S_(p1k[2] ^ TK16((i&1)+6));
+		p1k[4] += _S_(p1k[3] ^ TK16((i&1)+0));
+		p1k[4] +=  (unsigned short)i;                    /* avoid "slide attacks" */
+        }
+_func_exit_;
+}
+ 
+
+/*
+**********************************************************************
+* Routine: Phase 2 -- generate RC4KEY, given TK, P1K, IV16
+*
+* Inputs:
+*     tk[]      = Temporal key                         [128 bits]
+*     p1k[]     = Phase 1 output key                   [ 80 bits]
+*     iv16      = low 16 bits of IV counter            [ 16 bits]
+* Output:
+*     rc4key[]  = the key used to encrypt the packet   [128 bits]
+*
+* Note:
+*     The value {TA,IV32,IV16} for Phase1/Phase2 must be unique
+*     across all packets using the same key TK value. Then, for a
+*     given value of TK[], this TKIP48 construction guarantees that
+*     the final RC4KEY value is unique across all packets.
+*
+* Suggested implementation optimization: if PPK[] is "overlaid"
+*     appropriately on RC4KEY[], there is no need for the final
+*     for loop below that copies the PPK[] result into RC4KEY[].
+*
+**********************************************************************
+*/
+static void phase2(u8 *rc4key,const u8 *tk,const u16 *p1k,u16 iv16)
+{
+	sint  i;
+	u16 PPK[6];                          /* temporary key for mixing    */
+_func_enter_;
+	/* Note: all adds in the PPK[] equations below are mod 2**16         */
+	for (i=0;i<5;i++) PPK[i]=p1k[i];      /* first, copy P1K to PPK      */
+		PPK[5]  =  p1k[4] +iv16;             /* next,  add in IV16          */
+
+	/* Bijective non-linear mixing of the 96 bits of PPK[0..5]           */
+	PPK[0] +=    _S_(PPK[5] ^ TK16(0));   /* Mix key in each "round"     */
+	PPK[1] +=    _S_(PPK[0] ^ TK16(1));
+	PPK[2] +=    _S_(PPK[1] ^ TK16(2));
+	PPK[3] +=    _S_(PPK[2] ^ TK16(3));
+	PPK[4] +=    _S_(PPK[3] ^ TK16(4));
+	PPK[5] +=    _S_(PPK[4] ^ TK16(5));   /* Total # S-box lookups == 6  */
+
+	/* Final sweep: bijective, "linear". Rotates kill LSB correlations   */
+	PPK[0] +=  RotR1(PPK[5] ^ TK16(6));
+	PPK[1] +=  RotR1(PPK[0] ^ TK16(7));   /* Use all of TK[] in Phase2   */
+	PPK[2] +=  RotR1(PPK[1]);
+	PPK[3] +=  RotR1(PPK[2]);
+	PPK[4] +=  RotR1(PPK[3]);
+	PPK[5] +=  RotR1(PPK[4]);
+	/* Note: At this point, for a given key TK[0..15], the 96-bit output */
+	/*       value PPK[0..5] is guaranteed to be unique, as a function   */
+	/*       of the 96-bit "input" value   {TA,IV32,IV16}. That is, P1K  */
+	/*       is now a keyed permutation of {TA,IV32,IV16}.               */
+
+	/* Set RC4KEY[0..3], which includes "cleartext" portion of RC4 key   */
+	rc4key[0] = Hi8(iv16);                /* RC4KEY[0..2] is the WEP IV  */
+	rc4key[1] =(Hi8(iv16) | 0x20) & 0x7F; /* Help avoid weak (FMS) keys  */
+	rc4key[2] = Lo8(iv16);
+	rc4key[3] = Lo8((PPK[5] ^ TK16(0)) >> 1);
+	 
+
+	/* Copy 96 bits of PPK[0..5] to RC4KEY[4..15]  (little-endian)       */
+	for (i=0;i<6;i++)
+	{
+		rc4key[4+2*i] = Lo8(PPK[i]);
+		rc4key[5+2*i] = Hi8(PPK[i]);
+	}
+_func_exit_;	
+}
+
+
+//The hlen isn't include the IV
+u32	rtw_tkip_encrypt(_adapter *padapter, u8 *pxmitframe)
+{																	// exclude ICV
+	u16	pnl;
+	u32	pnh;
+	u8	rc4key[16];
+	u8   ttkey[16];
+	u8	crc[4];
+	struct arc4context mycontext;
+	sint 			curfragnum,length;
+	u32	prwskeylen;
+
+	u8	*pframe, *payload,*iv,*prwskey;
+	union pn48 dot11txpn;
+	struct	sta_info		*stainfo;
+	struct	pkt_attrib	 *pattrib = &((struct xmit_frame *)pxmitframe)->attrib;
+	struct 	security_priv	*psecuritypriv=&padapter->securitypriv;
+	struct	xmit_priv		*pxmitpriv=&padapter->xmitpriv;
+	u32	res=_SUCCESS;
+_func_enter_;
+
+	if(((struct xmit_frame*)pxmitframe)->buf_addr==NULL)
+		return _FAIL;
+
+#ifdef CONFIG_USB_TX_AGGREGATION
+	pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_SIZE +
+		 (((struct xmit_frame*)pxmitframe)->pkt_offset * PACKET_OFFSET_SZ);
+#else
+	pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_OFFSET;
+#endif
+
+	//4 start to encrypt each fragment
+	if(pattrib->encrypt==_TKIP_){
+
+		if(pattrib->psta)
+		{
+			stainfo = pattrib->psta;
+		}
+		else
+		{
+			stainfo=rtw_get_stainfo(&padapter->stapriv ,&pattrib->ra[0] );
+		}	
+		
+		if (stainfo!=NULL){
+			RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_tkip_encrypt: stainfo!=NULL!!!\n"));
+
+			if(IS_MCAST(pattrib->ra))
+			{
+				prwskey=psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey;
+			}
+			else
+			{
+				prwskey=&stainfo->dot118021x_UncstKey.skey[0];
+			}
+
+			prwskeylen=16;
+
+			for(curfragnum=0;curfragnum<pattrib->nr_frags;curfragnum++){
+				iv=pframe+pattrib->hdrlen;
+				payload=pframe+pattrib->iv_len+pattrib->hdrlen;
+				
+				GET_TKIP_PN(iv, dot11txpn);
+
+				pnl=(u16)(dot11txpn.val);
+				pnh=(u32)(dot11txpn.val>>16);
+
+				phase1((u16 *)&ttkey[0],prwskey,&pattrib->ta[0],pnh);
+
+				phase2(&rc4key[0],prwskey,(u16 *)&ttkey[0],pnl);	
+
+				if((curfragnum+1)==pattrib->nr_frags){	//4 the last fragment
+					length=pattrib->last_txcmdsz-pattrib->hdrlen-pattrib->iv_len- pattrib->icv_len;
+					RT_TRACE(_module_rtl871x_security_c_,_drv_info_,("pattrib->iv_len =%x, pattrib->icv_len =%x\n", pattrib->iv_len,pattrib->icv_len));
+					*((u32 *)crc)=cpu_to_le32(getcrc32(payload,length));/* modified by Amy*/
+
+					arcfour_init(&mycontext, rc4key,16);
+					arcfour_encrypt(&mycontext, payload, payload, length);
+					arcfour_encrypt(&mycontext, payload+length, crc, 4);
+
+				}
+				else{
+					length=pxmitpriv->frag_len-pattrib->hdrlen-pattrib->iv_len-pattrib->icv_len ;
+					*((u32 *)crc)=cpu_to_le32(getcrc32(payload,length));/* modified by Amy*/
+					arcfour_init(&mycontext,rc4key,16);
+					arcfour_encrypt(&mycontext, payload, payload, length);
+					arcfour_encrypt(&mycontext, payload+length, crc, 4);
+	
+				pframe+=pxmitpriv->frag_len;
+				pframe=(u8 *)RND4((SIZE_PTR)(pframe));
+
+				}
+			}
+
+
+		}
+		else{
+			RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_tkip_encrypt: stainfo==NULL!!!\n"));
+			res=_FAIL;
+		}
+						
+	}
+_func_exit_;	
+	return res;
+				
+}
+
+
+//The hlen isn't include the IV
+u32 rtw_tkip_decrypt(_adapter *padapter, u8 *precvframe)
+{																	// exclude ICV
+	u16 pnl;
+	u32 pnh;
+	u8   rc4key[16];
+	u8   ttkey[16];
+	u8	crc[4];
+	struct arc4context mycontext;
+	sint 			length;
+	u32	prwskeylen;
+
+	u8	*pframe, *payload,*iv,*prwskey;
+	union pn48 dot11txpn;
+	struct	sta_info		*stainfo;
+	struct	rx_pkt_attrib	 *prxattrib = &((union recv_frame *)precvframe)->u.hdr.attrib;
+	struct 	security_priv	*psecuritypriv=&padapter->securitypriv;
+//	struct	recv_priv		*precvpriv=&padapter->recvpriv;
+	u32		res=_SUCCESS;
+
+_func_enter_;
+
+	pframe=(unsigned char *)((union recv_frame*)precvframe)->u.hdr.rx_data;
+	
+	//4 start to decrypt recvframe
+	if(prxattrib->encrypt==_TKIP_){
+
+		stainfo=rtw_get_stainfo(&padapter->stapriv ,&prxattrib->ta[0] );
+		if (stainfo!=NULL){
+
+			if(IS_MCAST(prxattrib->ra))
+			{
+				DBG_871X("rx bc/mc packets, to perform sw rtw_tkip_decrypt\n");
+				//prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey;
+				prwskey = psecuritypriv->dot118021XGrpKey[prxattrib->key_index].skey;
+				prwskeylen=16;
+			}
+			else
+			{
+			        RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_tkip_decrypt: stainfo!=NULL!!!\n"));
+				prwskey=&stainfo->dot118021x_UncstKey.skey[0];
+				prwskeylen=16;
+			}
+			
+			iv=pframe+prxattrib->hdrlen;
+			payload=pframe+prxattrib->iv_len+prxattrib->hdrlen;
+			length= ((union recv_frame *)precvframe)->u.hdr.len-prxattrib->hdrlen-prxattrib->iv_len;
+				
+			GET_TKIP_PN(iv, dot11txpn);
+
+			pnl=(u16)(dot11txpn.val);
+			pnh=(u32)(dot11txpn.val>>16);
+
+			phase1((u16 *)&ttkey[0],prwskey,&prxattrib->ta[0],pnh);
+			phase2(&rc4key[0],prwskey,(unsigned short *)&ttkey[0],pnl);	
+
+			//4 decrypt payload include icv
+					
+			arcfour_init(&mycontext, rc4key,16);
+			arcfour_encrypt(&mycontext, payload, payload, length);
+
+			*((u32 *)crc)=le32_to_cpu(getcrc32(payload,length-4));
+
+			if(crc[3]!=payload[length-1] || crc[2]!=payload[length-2] || crc[1]!=payload[length-3] || crc[0]!=payload[length-4])
+			{
+			    RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_wep_decrypt:icv error crc[3](%x)!=payload[length-1](%x) || crc[2](%x)!=payload[length-2](%x) || crc[1](%x)!=payload[length-3](%x) || crc[0](%x)!=payload[length-4](%x)\n",
+						crc[3],payload[length-1],crc[2],payload[length-2],crc[1],payload[length-3],crc[0],payload[length-4]));
+				res=_FAIL;
+			}
+						
+		
+		}
+		else{
+			RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_tkip_decrypt: stainfo==NULL!!!\n"));
+			res=_FAIL;
+		}
+						
+	}
+_func_exit_;	
+	return res;
+				
+}
+
+
+//3			=====AES related=====
+
+
+
+#define MAX_MSG_SIZE	2048
+/*****************************/
+/******** SBOX Table *********/
+/*****************************/
+
+  static  u8 sbox_table[256] =
+    {
+        0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5,
+        0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76,
+        0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0,
+        0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0,
+        0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc,
+        0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15,
+        0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a,
+        0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75,
+        0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0,
+        0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84,
+        0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b,
+        0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf,
+        0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85,
+        0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8,
+        0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5,
+        0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2,
+        0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17,
+        0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73,
+        0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88,
+        0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb,
+        0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c,
+        0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79,
+        0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9,
+        0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08,
+        0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6,
+        0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a,
+        0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e,
+        0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e,
+        0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94,
+        0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf,
+        0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68,
+        0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16
+    };
+
+/*****************************/
+/**** Function Prototypes ****/
+/*****************************/
+
+static void bitwise_xor(u8 *ina, u8 *inb, u8 *out);
+static void construct_mic_iv(
+                        u8 *mic_header1,
+                        sint qc_exists,
+                        sint a4_exists,
+                        u8 *mpdu,
+                        uint payload_length,
+                        u8 * pn_vector);
+static void construct_mic_header1(
+                        u8 *mic_header1,
+                        sint header_length,
+                        u8 *mpdu);
+static void construct_mic_header2(
+                    u8 *mic_header2,
+                    u8 *mpdu,
+                    sint a4_exists,
+                    sint qc_exists);
+static void construct_ctr_preload(
+                        u8 *ctr_preload,
+                        sint a4_exists,
+                        sint qc_exists,
+                        u8 *mpdu,
+                        u8 *pn_vector,
+                        sint c);
+static void xor_128(u8 *a, u8 *b, u8 *out);
+static void xor_32(u8 *a, u8 *b, u8 *out);
+static u8 sbox(u8 a);
+static void next_key(u8 *key, sint round);
+static void byte_sub(u8 *in, u8 *out);
+static void shift_row(u8 *in, u8 *out);
+static void mix_column(u8 *in, u8 *out);
+static void add_round_key( u8 *shiftrow_in,
+                    u8 *mcol_in,
+                    u8 *block_in,
+                    sint round,
+                    u8 *out);
+static void aes128k128d(u8 *key, u8 *data, u8 *ciphertext);
+
+
+/****************************************/
+/* aes128k128d()                        */
+/* Performs a 128 bit AES encrypt with  */
+/* 128 bit data.                        */
+/****************************************/
+static void xor_128(u8 *a, u8 *b, u8 *out)
+{
+    sint i;
+_func_enter_;	
+    for (i=0;i<16; i++)
+    {
+        out[i] = a[i] ^ b[i];
+    }
+_func_exit_;		
+}
+
+
+static void xor_32(u8 *a, u8 *b, u8 *out)
+{
+    sint i;
+_func_enter_;		
+    for (i=0;i<4; i++)
+    {
+        out[i] = a[i] ^ b[i];
+    }
+_func_exit_;		
+}
+
+
+static u8 sbox(u8 a)
+{
+    return sbox_table[(sint)a];
+}
+
+
+static void next_key(u8 *key, sint round)
+{
+    u8 rcon;
+    u8 sbox_key[4];
+    u8 rcon_table[12] =
+    {
+        0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80,
+        0x1b, 0x36, 0x36, 0x36
+    };
+_func_enter_;		
+    sbox_key[0] = sbox(key[13]);
+    sbox_key[1] = sbox(key[14]);
+    sbox_key[2] = sbox(key[15]);
+    sbox_key[3] = sbox(key[12]);
+
+    rcon = rcon_table[round];
+
+    xor_32(&key[0], sbox_key, &key[0]);
+    key[0] = key[0] ^ rcon;
+
+    xor_32(&key[4], &key[0], &key[4]);
+    xor_32(&key[8], &key[4], &key[8]);
+    xor_32(&key[12], &key[8], &key[12]);
+_func_exit_;		
+}
+
+
+static void byte_sub(u8 *in, u8 *out)
+{
+    sint i;
+_func_enter_;			
+    for (i=0; i< 16; i++)
+    {
+        out[i] = sbox(in[i]);
+    }
+_func_exit_;	
+}
+
+
+static void shift_row(u8 *in, u8 *out)
+{
+_func_enter_;	
+    out[0] =  in[0];
+    out[1] =  in[5];
+    out[2] =  in[10];
+    out[3] =  in[15];
+    out[4] =  in[4];
+    out[5] =  in[9];
+    out[6] =  in[14];
+    out[7] =  in[3];
+    out[8] =  in[8];
+    out[9] =  in[13];
+    out[10] = in[2];
+    out[11] = in[7];
+    out[12] = in[12];
+    out[13] = in[1];
+    out[14] = in[6];
+    out[15] = in[11];
+_func_exit_;		
+}
+
+
+static void mix_column(u8 *in, u8 *out)
+{
+    sint i;
+    u8 add1b[4];
+    u8 add1bf7[4];
+    u8 rotl[4];
+    u8 swap_halfs[4];
+    u8 andf7[4];
+    u8 rotr[4];
+    u8 temp[4];
+    u8 tempb[4];
+_func_enter_;	
+    for (i=0 ; i<4; i++)
+    {
+        if ((in[i] & 0x80)== 0x80)
+            add1b[i] = 0x1b;
+        else
+            add1b[i] = 0x00;
+    }
+
+    swap_halfs[0] = in[2];    /* Swap halfs */
+    swap_halfs[1] = in[3];
+    swap_halfs[2] = in[0];
+    swap_halfs[3] = in[1];
+
+    rotl[0] = in[3];        /* Rotate left 8 bits */
+    rotl[1] = in[0];
+    rotl[2] = in[1];
+    rotl[3] = in[2];
+
+    andf7[0] = in[0] & 0x7f;
+    andf7[1] = in[1] & 0x7f;
+    andf7[2] = in[2] & 0x7f;
+    andf7[3] = in[3] & 0x7f;
+
+    for (i = 3; i>0; i--)    /* logical shift left 1 bit */
+    {
+        andf7[i] = andf7[i] << 1;
+        if ((andf7[i-1] & 0x80) == 0x80)
+        {
+            andf7[i] = (andf7[i] | 0x01);
+        }
+    }
+    andf7[0] = andf7[0] << 1;
+    andf7[0] = andf7[0] & 0xfe;
+
+    xor_32(add1b, andf7, add1bf7);
+
+    xor_32(in, add1bf7, rotr);
+
+    temp[0] = rotr[0];         /* Rotate right 8 bits */
+    rotr[0] = rotr[1];
+    rotr[1] = rotr[2];
+    rotr[2] = rotr[3];
+    rotr[3] = temp[0];
+
+    xor_32(add1bf7, rotr, temp);
+    xor_32(swap_halfs, rotl,tempb);
+    xor_32(temp, tempb, out);
+_func_exit_;		
+}
+
+
+static void aes128k128d(u8 *key, u8 *data, u8 *ciphertext)
+{
+    sint round;
+    sint i;
+    u8 intermediatea[16];
+    u8 intermediateb[16];
+    u8 round_key[16];
+_func_enter_;	
+    for(i=0; i<16; i++) round_key[i] = key[i];
+
+    for (round = 0; round < 11; round++)
+    {
+        if (round == 0)
+        {
+            xor_128(round_key, data, ciphertext);
+            next_key(round_key, round);
+        }
+        else if (round == 10)
+        {
+            byte_sub(ciphertext, intermediatea);
+            shift_row(intermediatea, intermediateb);
+            xor_128(intermediateb, round_key, ciphertext);
+        }
+        else    /* 1 - 9 */
+        {
+            byte_sub(ciphertext, intermediatea);
+            shift_row(intermediatea, intermediateb);
+            mix_column(&intermediateb[0], &intermediatea[0]);
+            mix_column(&intermediateb[4], &intermediatea[4]);
+            mix_column(&intermediateb[8], &intermediatea[8]);
+            mix_column(&intermediateb[12], &intermediatea[12]);
+            xor_128(intermediatea, round_key, ciphertext);
+            next_key(round_key, round);
+        }
+    }
+_func_exit_;	
+}
+
+
+/************************************************/
+/* construct_mic_iv()                           */
+/* Builds the MIC IV from header fields and PN  */
+/************************************************/
+static void construct_mic_iv(
+                        u8 *mic_iv,
+                        sint qc_exists,
+                        sint a4_exists,
+                        u8 *mpdu,
+                        uint payload_length,
+                        u8 *pn_vector
+                        )
+{
+    sint i;
+_func_enter_;	
+    mic_iv[0] = 0x59;
+    if (qc_exists && a4_exists) mic_iv[1] = mpdu[30] & 0x0f;    /* QoS_TC           */
+    if (qc_exists && !a4_exists) mic_iv[1] = mpdu[24] & 0x0f;   /* mute bits 7-4    */
+    if (!qc_exists) mic_iv[1] = 0x00;
+    for (i = 2; i < 8; i++)
+        mic_iv[i] = mpdu[i + 8];                    /* mic_iv[2:7] = A2[0:5] = mpdu[10:15] */
+    #ifdef CONSISTENT_PN_ORDER
+        for (i = 8; i < 14; i++)
+            mic_iv[i] = pn_vector[i - 8];           /* mic_iv[8:13] = PN[0:5] */
+    #else
+        for (i = 8; i < 14; i++)
+            mic_iv[i] = pn_vector[13 - i];          /* mic_iv[8:13] = PN[5:0] */
+    #endif
+    mic_iv[14] = (unsigned char) (payload_length / 256);
+    mic_iv[15] = (unsigned char) (payload_length % 256);
+_func_exit_;		
+}
+
+
+/************************************************/
+/* construct_mic_header1()                      */
+/* Builds the first MIC header block from       */
+/* header fields.                               */
+/************************************************/
+static void construct_mic_header1(
+                        u8 *mic_header1,
+                        sint header_length,
+                        u8 *mpdu
+                        )
+{
+_func_enter_;	
+    mic_header1[0] = (u8)((header_length - 2) / 256);
+    mic_header1[1] = (u8)((header_length - 2) % 256);
+    mic_header1[2] = mpdu[0] & 0xcf;    /* Mute CF poll & CF ack bits */
+    mic_header1[3] = mpdu[1] & 0xc7;    /* Mute retry, more data and pwr mgt bits */
+    mic_header1[4] = mpdu[4];       /* A1 */
+    mic_header1[5] = mpdu[5];
+    mic_header1[6] = mpdu[6];
+    mic_header1[7] = mpdu[7];
+    mic_header1[8] = mpdu[8];
+    mic_header1[9] = mpdu[9];
+    mic_header1[10] = mpdu[10];     /* A2 */
+    mic_header1[11] = mpdu[11];
+    mic_header1[12] = mpdu[12];
+    mic_header1[13] = mpdu[13];
+    mic_header1[14] = mpdu[14];
+    mic_header1[15] = mpdu[15];
+_func_exit_;	
+}
+
+
+/************************************************/
+/* construct_mic_header2()                      */
+/* Builds the last MIC header block from        */
+/* header fields.                               */
+/************************************************/
+static void construct_mic_header2(
+                u8 *mic_header2,
+                u8 *mpdu,
+                sint a4_exists,
+                sint qc_exists
+                )
+{
+    sint i;
+_func_enter_;	
+    for (i = 0; i<16; i++) mic_header2[i]=0x00;
+
+    mic_header2[0] = mpdu[16];    /* A3 */
+    mic_header2[1] = mpdu[17];
+    mic_header2[2] = mpdu[18];
+    mic_header2[3] = mpdu[19];
+    mic_header2[4] = mpdu[20];
+    mic_header2[5] = mpdu[21];
+
+    //mic_header2[6] = mpdu[22] & 0xf0;   /* SC */
+    mic_header2[6] = 0x00;
+    mic_header2[7] = 0x00; /* mpdu[23]; */
+
+
+    if (!qc_exists && a4_exists)
+    {
+        for (i=0;i<6;i++) mic_header2[8+i] = mpdu[24+i];   /* A4 */
+
+    }
+
+    if (qc_exists && !a4_exists)
+    {
+        mic_header2[8] = mpdu[24] & 0x0f; /* mute bits 15 - 4 */
+        mic_header2[9] = mpdu[25] & 0x00;
+    }
+
+    if (qc_exists && a4_exists)
+    {
+        for (i=0;i<6;i++) mic_header2[8+i] = mpdu[24+i];   /* A4 */
+
+        mic_header2[14] = mpdu[30] & 0x0f;
+        mic_header2[15] = mpdu[31] & 0x00;
+    }
+
+_func_exit_;	
+}
+
+
+/************************************************/
+/* construct_mic_header2()                      */
+/* Builds the last MIC header block from        */
+/* header fields.                               */
+/************************************************/
+static void construct_ctr_preload(
+                        u8 *ctr_preload,
+                        sint a4_exists,
+                        sint qc_exists,
+                        u8 *mpdu,
+                        u8 *pn_vector,
+                        sint c
+                        )
+{
+    sint i = 0;
+_func_enter_;		
+    for (i=0; i<16; i++) ctr_preload[i] = 0x00;
+    i = 0;
+
+    ctr_preload[0] = 0x01;                                  /* flag */
+    if (qc_exists && a4_exists) 
+		ctr_preload[1] = mpdu[30] & 0x0f;   /* QoC_Control */
+    if (qc_exists && !a4_exists) 
+		ctr_preload[1] = mpdu[24] & 0x0f;
+
+    for (i = 2; i < 8; i++)
+        ctr_preload[i] = mpdu[i + 8];                       /* ctr_preload[2:7] = A2[0:5] = mpdu[10:15] */
+    #ifdef CONSISTENT_PN_ORDER
+      for (i = 8; i < 14; i++)
+            ctr_preload[i] =    pn_vector[i - 8];           /* ctr_preload[8:13] = PN[0:5] */
+    #else
+      for (i = 8; i < 14; i++)
+            ctr_preload[i] =    pn_vector[13 - i];          /* ctr_preload[8:13] = PN[5:0] */
+    #endif
+    ctr_preload[14] =  (unsigned char) (c / 256); /* Ctr */
+    ctr_preload[15] =  (unsigned char) (c % 256);
+_func_exit_;		
+}
+
+
+/************************************/
+/* bitwise_xor()                    */
+/* A 128 bit, bitwise exclusive or  */
+/************************************/
+static void bitwise_xor(u8 *ina, u8 *inb, u8 *out)
+{
+    sint i;
+_func_enter_;		
+    for (i=0; i<16; i++)
+    {
+        out[i] = ina[i] ^ inb[i];
+    }
+_func_exit_;		
+}
+
+
+static sint aes_cipher(u8 *key, uint	hdrlen,
+			u8 *pframe, uint plen)
+{
+//	/*static*/ unsigned char	message[MAX_MSG_SIZE];
+	uint	qc_exists, a4_exists, i, j, payload_remainder,
+		num_blocks, payload_index;
+
+	u8 pn_vector[6];
+	u8 mic_iv[16];
+	u8 mic_header1[16];
+	u8 mic_header2[16];
+	u8 ctr_preload[16];
+
+	/* Intermediate Buffers */
+	u8 chain_buffer[16];
+	u8 aes_out[16];
+	u8 padded_buffer[16];
+	u8 mic[8];
+//	uint	offset = 0;
+	uint	frtype  = GetFrameType(pframe);
+	uint	frsubtype  = GetFrameSubType(pframe);
+	
+_func_enter_;		
+	frsubtype=frsubtype>>4;
+
+
+	_rtw_memset((void *)mic_iv, 0, 16);
+	_rtw_memset((void *)mic_header1, 0, 16);
+	_rtw_memset((void *)mic_header2, 0, 16);
+	_rtw_memset((void *)ctr_preload, 0, 16);
+	_rtw_memset((void *)chain_buffer, 0, 16);
+	_rtw_memset((void *)aes_out, 0, 16);
+	_rtw_memset((void *)padded_buffer, 0, 16);
+
+	if ((hdrlen == WLAN_HDR_A3_LEN )||(hdrlen ==  WLAN_HDR_A3_QOS_LEN))
+		a4_exists = 0;
+	else
+		a4_exists = 1;
+
+	if (
+		(frtype == WIFI_DATA_CFACK) ||
+		(frtype == WIFI_DATA_CFPOLL)||
+		(frtype == WIFI_DATA_CFACKPOLL))
+		{
+			qc_exists = 1;
+					if(hdrlen !=  WLAN_HDR_A3_QOS_LEN){
+				 
+					hdrlen += 2;
+			}
+		}
+	else if (
+		(frsubtype == 0x08) ||
+		(frsubtype == 0x09)||
+		(frsubtype == 0x0a)||
+		(frsubtype == 0x0b))
+		{
+			if(hdrlen !=  WLAN_HDR_A3_QOS_LEN){
+				 
+					hdrlen += 2;
+			}
+			qc_exists = 1;
+		}
+	else
+		qc_exists = 0;
+
+	pn_vector[0]=pframe[hdrlen];
+	pn_vector[1]=pframe[hdrlen+1];
+	pn_vector[2]=pframe[hdrlen+4];
+	pn_vector[3]=pframe[hdrlen+5];
+	pn_vector[4]=pframe[hdrlen+6];
+	pn_vector[5]=pframe[hdrlen+7];
+	
+	construct_mic_iv(
+                        mic_iv,
+                        qc_exists,
+                        a4_exists,
+                        pframe,	 //message,
+                        plen,
+                        pn_vector
+                        );
+
+    construct_mic_header1(
+                            mic_header1,
+                            hdrlen,
+                            pframe	//message
+                            );
+    construct_mic_header2(
+                            mic_header2,
+                            pframe,	//message,
+                            a4_exists,
+                            qc_exists
+                            );
+
+
+	payload_remainder = plen % 16;
+    num_blocks = plen / 16;
+
+    /* Find start of payload */
+    payload_index = (hdrlen + 8);
+
+    /* Calculate MIC */
+    aes128k128d(key, mic_iv, aes_out);
+    bitwise_xor(aes_out, mic_header1, chain_buffer);
+    aes128k128d(key, chain_buffer, aes_out);
+    bitwise_xor(aes_out, mic_header2, chain_buffer);
+    aes128k128d(key, chain_buffer, aes_out);
+
+	for (i = 0; i < num_blocks; i++)
+    {
+        bitwise_xor(aes_out, &pframe[payload_index], chain_buffer);//bitwise_xor(aes_out, &message[payload_index], chain_buffer);
+
+        payload_index += 16;
+        aes128k128d(key, chain_buffer, aes_out);
+    }
+
+    /* Add on the final payload block if it needs padding */
+    if (payload_remainder > 0)
+    {
+        for (j = 0; j < 16; j++) padded_buffer[j] = 0x00;
+        for (j = 0; j < payload_remainder; j++)
+        {
+            padded_buffer[j] = pframe[payload_index++];//padded_buffer[j] = message[payload_index++];
+        }
+        bitwise_xor(aes_out, padded_buffer, chain_buffer);
+        aes128k128d(key, chain_buffer, aes_out);
+
+    }
+
+    for (j = 0 ; j < 8; j++) mic[j] = aes_out[j];
+
+    /* Insert MIC into payload */
+    for (j = 0; j < 8; j++)
+    	pframe[payload_index+j] = mic[j];	//message[payload_index+j] = mic[j];
+
+	payload_index = hdrlen + 8;
+	for (i=0; i< num_blocks; i++)
+    {
+        construct_ctr_preload(
+                                ctr_preload,
+                                a4_exists,
+                                qc_exists,
+                                pframe,	//message,
+                                pn_vector,
+                                i+1);
+        aes128k128d(key, ctr_preload, aes_out);
+        bitwise_xor(aes_out, &pframe[payload_index], chain_buffer);//bitwise_xor(aes_out, &message[payload_index], chain_buffer);
+        for (j=0; j<16;j++) pframe[payload_index++] = chain_buffer[j];//for (j=0; j<16;j++) message[payload_index++] = chain_buffer[j];
+    }
+
+    if (payload_remainder > 0)          /* If there is a short final block, then pad it,*/
+    {                                   /* encrypt it and copy the unpadded part back   */
+        construct_ctr_preload(
+                                ctr_preload,
+                                a4_exists,
+                                qc_exists,
+                                pframe,	//message,
+                                pn_vector,
+                                num_blocks+1);
+
+        for (j = 0; j < 16; j++) padded_buffer[j] = 0x00;
+        for (j = 0; j < payload_remainder; j++)
+        {
+            padded_buffer[j] = pframe[payload_index+j];//padded_buffer[j] = message[payload_index+j];
+        }
+        aes128k128d(key, ctr_preload, aes_out);
+        bitwise_xor(aes_out, padded_buffer, chain_buffer);
+        for (j=0; j<payload_remainder;j++) pframe[payload_index++] = chain_buffer[j];//for (j=0; j<payload_remainder;j++) message[payload_index++] = chain_buffer[j];
+    }
+
+    /* Encrypt the MIC */
+    construct_ctr_preload(
+                        ctr_preload,
+                        a4_exists,
+                        qc_exists,
+                        pframe,	//message,
+                        pn_vector,
+                        0);
+
+    for (j = 0; j < 16; j++) padded_buffer[j] = 0x00;
+    for (j = 0; j < 8; j++)
+    {
+        padded_buffer[j] = pframe[j+hdrlen+8+plen];//padded_buffer[j] = message[j+hdrlen+8+plen];
+    }
+
+    aes128k128d(key, ctr_preload, aes_out);
+    bitwise_xor(aes_out, padded_buffer, chain_buffer);
+    for (j=0; j<8;j++) pframe[payload_index++] = chain_buffer[j];//for (j=0; j<8;j++) message[payload_index++] = chain_buffer[j];
+_func_exit_;		
+	return _SUCCESS;
+}
+
+
+
+
+u32	rtw_aes_encrypt(_adapter *padapter, u8 *pxmitframe)
+{	// exclude ICV
+
+
+	/*static*/ 
+//	unsigned char	message[MAX_MSG_SIZE];
+
+    	/* Intermediate Buffers */
+	sint 	curfragnum,length;
+	u32	prwskeylen;
+	u8	*pframe,*prwskey;	//, *payload,*iv
+	struct	sta_info		*stainfo;
+	struct	pkt_attrib	 *pattrib = &((struct xmit_frame *)pxmitframe)->attrib;
+	struct 	security_priv	*psecuritypriv=&padapter->securitypriv;
+	struct	xmit_priv		*pxmitpriv=&padapter->xmitpriv;
+
+//	uint	offset = 0;
+	u32 res=_SUCCESS;
+_func_enter_;		
+
+	if(((struct xmit_frame*)pxmitframe)->buf_addr==NULL)
+		return _FAIL;
+
+#ifdef CONFIG_USB_TX_AGGREGATION
+	pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_SIZE +
+		 (((struct xmit_frame*)pxmitframe)->pkt_offset * PACKET_OFFSET_SZ);
+#else
+	pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_OFFSET;
+#endif
+
+	//4 start to encrypt each fragment
+	if((pattrib->encrypt==_AES_)){
+
+		if(pattrib->psta)
+		{
+			stainfo = pattrib->psta;
+		}
+		else
+		{
+			stainfo=rtw_get_stainfo(&padapter->stapriv ,&pattrib->ra[0] );
+		}	
+		
+		if (stainfo!=NULL){
+			RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_aes_encrypt: stainfo!=NULL!!!\n"));
+
+			if(IS_MCAST(pattrib->ra))
+			{
+				prwskey=psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey;
+			}
+			else
+			{
+				prwskey=&stainfo->dot118021x_UncstKey.skey[0];
+			}
+
+			prwskeylen=16;
+	
+			for(curfragnum=0;curfragnum<pattrib->nr_frags;curfragnum++){
+			
+				if((curfragnum+1)==pattrib->nr_frags){	//4 the last fragment
+					length=pattrib->last_txcmdsz-pattrib->hdrlen-pattrib->iv_len- pattrib->icv_len;
+				
+					aes_cipher(prwskey,pattrib->hdrlen,pframe, length);
+				}
+				else{
+					length=pxmitpriv->frag_len-pattrib->hdrlen-pattrib->iv_len-pattrib->icv_len ;
+				
+					aes_cipher(prwskey,pattrib->hdrlen,pframe, length);
+				pframe+=pxmitpriv->frag_len;
+				pframe=(u8*)RND4((SIZE_PTR)(pframe));
+
+				}
+			}
+
+
+		}
+		else{
+			RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_aes_encrypt: stainfo==NULL!!!\n"));
+			res=_FAIL;
+		}
+						
+	}
+
+
+
+_func_exit_;
+		return res;
+}
+
+static sint aes_decipher(u8 *key, uint	hdrlen,
+			u8 *pframe, uint plen)
+{
+	static u8	message[MAX_MSG_SIZE];
+	uint	qc_exists, a4_exists, i, j, payload_remainder,
+			num_blocks, payload_index;
+
+	u8 pn_vector[6];
+	u8 mic_iv[16];
+	u8 mic_header1[16];
+	u8 mic_header2[16];
+	u8 ctr_preload[16];
+
+    /* Intermediate Buffers */
+	u8 chain_buffer[16];
+	u8 aes_out[16];
+	u8 padded_buffer[16];
+	u8 mic[8];
+
+
+//	uint	offset = 0;
+	uint	frtype  = GetFrameType(pframe);
+	uint	frsubtype  = GetFrameSubType(pframe);
+_func_enter_;			
+	frsubtype=frsubtype>>4;
+
+
+	_rtw_memset((void *)mic_iv, 0, 16);
+	_rtw_memset((void *)mic_header1, 0, 16);
+	_rtw_memset((void *)mic_header2, 0, 16);
+	_rtw_memset((void *)ctr_preload, 0, 16);
+	_rtw_memset((void *)chain_buffer, 0, 16);
+	_rtw_memset((void *)aes_out, 0, 16);
+	_rtw_memset((void *)padded_buffer, 0, 16);
+
+	//start to decrypt the payload
+
+	num_blocks = (plen-8) / 16; //(plen including llc, payload_length and mic )
+
+	payload_remainder = (plen-8) % 16;
+
+	pn_vector[0]  = pframe[hdrlen];
+	pn_vector[1]  = pframe[hdrlen+1];
+	pn_vector[2]  = pframe[hdrlen+4];
+	pn_vector[3]  = pframe[hdrlen+5];
+	pn_vector[4]  = pframe[hdrlen+6];
+	pn_vector[5]  = pframe[hdrlen+7];
+
+	if ((hdrlen == WLAN_HDR_A3_LEN )||(hdrlen ==  WLAN_HDR_A3_QOS_LEN))
+		a4_exists = 0;
+	else
+		a4_exists = 1;
+
+	if (
+		(frtype == WIFI_DATA_CFACK) ||
+		(frtype == WIFI_DATA_CFPOLL)||
+		(frtype == WIFI_DATA_CFACKPOLL))
+		{
+			qc_exists = 1;
+					if(hdrlen !=  WLAN_HDR_A3_QOS_LEN){
+				 
+					hdrlen += 2;
+			}
+		}
+	else if (
+		(frsubtype == 0x08) ||
+		(frsubtype == 0x09)||
+		(frsubtype == 0x0a)||
+		(frsubtype == 0x0b))
+		{
+			if(hdrlen !=  WLAN_HDR_A3_QOS_LEN){
+				 
+					hdrlen += 2;
+			}
+			qc_exists = 1;
+		}
+	else
+		qc_exists = 0;
+
+
+	// now, decrypt pframe with hdrlen offset and plen long
+
+	payload_index = hdrlen + 8; // 8 is for extiv
+	
+	for (i=0; i< num_blocks; i++)
+    {
+        construct_ctr_preload(
+                                ctr_preload,
+                                a4_exists,
+                                qc_exists,
+                                pframe,
+                                pn_vector,
+                                i+1
+                            );
+
+        aes128k128d(key, ctr_preload, aes_out);
+        bitwise_xor(aes_out, &pframe[payload_index], chain_buffer);
+
+        for (j=0; j<16;j++) pframe[payload_index++] = chain_buffer[j];
+    }
+
+    if (payload_remainder > 0)          /* If there is a short final block, then pad it,*/
+    {                                   /* encrypt it and copy the unpadded part back   */
+        construct_ctr_preload(
+                                ctr_preload,
+                                a4_exists,
+                                qc_exists,
+                                pframe,
+                                pn_vector,
+                                num_blocks+1
+                            );
+
+        for (j = 0; j < 16; j++) padded_buffer[j] = 0x00;
+        for (j = 0; j < payload_remainder; j++)
+        {
+            padded_buffer[j] = pframe[payload_index+j];
+        }
+        aes128k128d(key, ctr_preload, aes_out);
+        bitwise_xor(aes_out, padded_buffer, chain_buffer);
+        for (j=0; j<payload_remainder;j++) pframe[payload_index++] = chain_buffer[j];
+    }
+
+	//start to calculate the mic	
+
+	_rtw_memcpy((void *)message, pframe, (hdrlen +plen+8)); //8 is for ext iv len
+
+
+	pn_vector[0]=pframe[hdrlen];
+	pn_vector[1]=pframe[hdrlen+1];
+	pn_vector[2]=pframe[hdrlen+4];
+	pn_vector[3]=pframe[hdrlen+5];
+	pn_vector[4]=pframe[hdrlen+6];
+	pn_vector[5]=pframe[hdrlen+7];
+
+
+	
+	construct_mic_iv(
+                        mic_iv,
+                        qc_exists,
+                        a4_exists,
+                        message,
+                        plen-8,
+                        pn_vector
+                        );
+
+    construct_mic_header1(
+                            mic_header1,
+                            hdrlen,
+                            message
+                            );
+    construct_mic_header2(
+                            mic_header2,
+                            message,
+                            a4_exists,
+                            qc_exists
+                            );
+
+
+	payload_remainder = (plen-8) % 16;
+    num_blocks = (plen-8) / 16;
+
+    /* Find start of payload */
+    payload_index = (hdrlen + 8);
+
+    /* Calculate MIC */
+    aes128k128d(key, mic_iv, aes_out);
+    bitwise_xor(aes_out, mic_header1, chain_buffer);
+    aes128k128d(key, chain_buffer, aes_out);
+    bitwise_xor(aes_out, mic_header2, chain_buffer);
+    aes128k128d(key, chain_buffer, aes_out);
+
+	for (i = 0; i < num_blocks; i++)
+    {
+        bitwise_xor(aes_out, &message[payload_index], chain_buffer);
+
+        payload_index += 16;
+        aes128k128d(key, chain_buffer, aes_out);
+    }
+
+    /* Add on the final payload block if it needs padding */
+    if (payload_remainder > 0)
+    {
+        for (j = 0; j < 16; j++) padded_buffer[j] = 0x00;
+        for (j = 0; j < payload_remainder; j++)
+        {
+            padded_buffer[j] = message[payload_index++];
+        }
+        bitwise_xor(aes_out, padded_buffer, chain_buffer);
+        aes128k128d(key, chain_buffer, aes_out);
+
+    }
+
+    for (j = 0 ; j < 8; j++) mic[j] = aes_out[j];
+
+    /* Insert MIC into payload */
+    for (j = 0; j < 8; j++)
+    	message[payload_index+j] = mic[j];
+
+	payload_index = hdrlen + 8;
+	for (i=0; i< num_blocks; i++)
+    {
+        construct_ctr_preload(
+                                ctr_preload,
+                                a4_exists,
+                                qc_exists,
+                                message,
+                                pn_vector,
+                                i+1);
+        aes128k128d(key, ctr_preload, aes_out);
+        bitwise_xor(aes_out, &message[payload_index], chain_buffer);
+        for (j=0; j<16;j++) message[payload_index++] = chain_buffer[j];
+    }
+
+    if (payload_remainder > 0)          /* If there is a short final block, then pad it,*/
+    {                                   /* encrypt it and copy the unpadded part back   */
+        construct_ctr_preload(
+                                ctr_preload,
+                                a4_exists,
+                                qc_exists,
+                                message,
+                                pn_vector,
+                                num_blocks+1);
+
+        for (j = 0; j < 16; j++) padded_buffer[j] = 0x00;
+        for (j = 0; j < payload_remainder; j++)
+        {
+            padded_buffer[j] = message[payload_index+j];
+        }
+        aes128k128d(key, ctr_preload, aes_out);
+        bitwise_xor(aes_out, padded_buffer, chain_buffer);
+        for (j=0; j<payload_remainder;j++) message[payload_index++] = chain_buffer[j];
+    }
+
+    /* Encrypt the MIC */
+    construct_ctr_preload(
+                        ctr_preload,
+                        a4_exists,
+                        qc_exists,
+                        message,
+                        pn_vector,
+                        0);
+
+    for (j = 0; j < 16; j++) padded_buffer[j] = 0x00;
+    for (j = 0; j < 8; j++)
+    {
+        padded_buffer[j] = message[j+hdrlen+8+plen-8];
+    }
+
+    aes128k128d(key, ctr_preload, aes_out);
+    bitwise_xor(aes_out, padded_buffer, chain_buffer);
+    for (j=0; j<8;j++) message[payload_index++] = chain_buffer[j];
+
+	//compare the mic
+	for(i=0;i<8;i++){
+		if(pframe[hdrlen+8+plen-8+i] != message[hdrlen+8+plen-8+i])
+			RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("aes_decipher:mic check error mic[%d]: pframe(%x) != message(%x) \n",
+						i,pframe[hdrlen+8+plen-8+i],message[hdrlen+8+plen-8+i]));
+	}
+_func_exit_;	
+	return _SUCCESS;
+}
+
+u32	rtw_aes_decrypt(_adapter *padapter, u8 *precvframe)
+{	// exclude ICV
+
+
+	/*static*/ 
+//	unsigned char	message[MAX_MSG_SIZE];
+
+
+    	/* Intermediate Buffers */
+
+
+	sint 		length;
+	u32	prwskeylen;
+	u8	*pframe,*prwskey;	//, *payload,*iv
+	struct	sta_info		*stainfo;
+	struct	rx_pkt_attrib	 *prxattrib = &((union recv_frame *)precvframe)->u.hdr.attrib;
+	struct 	security_priv	*psecuritypriv=&padapter->securitypriv;
+//	struct	recv_priv		*precvpriv=&padapter->recvpriv;
+	u32	res=_SUCCESS;
+_func_enter_;	 
+	pframe=(unsigned char *)((union recv_frame*)precvframe)->u.hdr.rx_data;
+	//4 start to encrypt each fragment
+	if((prxattrib->encrypt==_AES_)){
+
+		stainfo=rtw_get_stainfo(&padapter->stapriv ,&prxattrib->ta[0] );
+		if (stainfo!=NULL){
+			RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_aes_decrypt: stainfo!=NULL!!!\n"));
+
+			if(IS_MCAST(prxattrib->ra))
+			{
+				DBG_871X("rx bc/mc packets, to perform sw rtw_aes_decrypt\n");
+				//prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey;
+				prwskey = psecuritypriv->dot118021XGrpKey[prxattrib->key_index].skey;
+				prwskeylen=16;
+			}
+			else
+			{
+				prwskey=&stainfo->dot118021x_UncstKey.skey[0];
+			        prwskeylen=16;
+			}
+	
+			length= ((union recv_frame *)precvframe)->u.hdr.len-prxattrib->hdrlen-prxattrib->iv_len;
+				
+			aes_decipher(prwskey,prxattrib->hdrlen,pframe, length);
+
+
+		}
+		else{
+			RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_aes_encrypt: stainfo==NULL!!!\n"));
+			res=_FAIL;
+		}
+						
+	}
+_func_exit_;		
+	return res;
+}
+
+/* compress 512-bits */
+static int sha256_compress(struct sha256_state *md, unsigned char *buf)
+{
+	u32 S[8], W[64], t0, t1;
+	u32 t;
+	int i;
+
+	/* copy state into S */
+	for (i = 0; i < 8; i++) {
+		S[i] = md->state[i];
+	}
+
+	/* copy the state into 512-bits into W[0..15] */
+	for (i = 0; i < 16; i++)
+		W[i] = WPA_GET_BE32(buf + (4 * i));
+
+	/* fill W[16..63] */
+	for (i = 16; i < 64; i++) {
+		W[i] = Gamma1(W[i - 2]) + W[i - 7] + Gamma0(W[i - 15]) +
+			W[i - 16];
+	}        
+
+	/* Compress */
+#define RND(a,b,c,d,e,f,g,h,i)                          \
+	t0 = h + Sigma1(e) + Ch(e, f, g) + K[i] + W[i];	\
+	t1 = Sigma0(a) + Maj(a, b, c);			\
+	d += t0;					\
+	h  = t0 + t1;
+
+	for (i = 0; i < 64; ++i) {
+		RND(S[0], S[1], S[2], S[3], S[4], S[5], S[6], S[7], i);
+		t = S[7]; S[7] = S[6]; S[6] = S[5]; S[5] = S[4]; 
+		S[4] = S[3]; S[3] = S[2]; S[2] = S[1]; S[1] = S[0]; S[0] = t;
+	}
+
+	/* feedback */
+	for (i = 0; i < 8; i++) {
+		md->state[i] = md->state[i] + S[i];
+	}
+	return 0;
+}
+
+/* Initialize the hash state */
+static void sha256_init(struct sha256_state *md)
+{
+	md->curlen = 0;
+	md->length = 0;
+	md->state[0] = 0x6A09E667UL;
+	md->state[1] = 0xBB67AE85UL;
+	md->state[2] = 0x3C6EF372UL;
+	md->state[3] = 0xA54FF53AUL;
+	md->state[4] = 0x510E527FUL;
+	md->state[5] = 0x9B05688CUL;
+	md->state[6] = 0x1F83D9ABUL;
+	md->state[7] = 0x5BE0CD19UL;
+}
+
+/**
+   Process a block of memory though the hash
+   @param md     The hash state
+   @param in     The data to hash
+   @param inlen  The length of the data (octets)
+   @return CRYPT_OK if successful
+*/
+static int sha256_process(struct sha256_state *md, unsigned char *in,
+			  unsigned long inlen)
+{
+	unsigned long n;
+#define block_size 64
+
+	if (md->curlen > sizeof(md->buf))
+		return -1;
+
+	while (inlen > 0) {
+		if (md->curlen == 0 && inlen >= block_size) {
+			if (sha256_compress(md, (unsigned char *) in) < 0)
+				return -1;
+			md->length += block_size * 8;
+			in += block_size;
+			inlen -= block_size;
+		} else {
+			n = MIN(inlen, (block_size - md->curlen));
+			_rtw_memcpy(md->buf + md->curlen, in, n);
+			md->curlen += n;
+			in += n;
+			inlen -= n;
+			if (md->curlen == block_size) {
+				if (sha256_compress(md, md->buf) < 0)
+					return -1;
+				md->length += 8 * block_size;
+				md->curlen = 0;
+			}
+		}
+	}
+
+	return 0;
+}
+
+
+/**
+   Terminate the hash to get the digest
+   @param md  The hash state
+   @param out [out] The destination of the hash (32 bytes)
+   @return CRYPT_OK if successful
+*/
+static int sha256_done(struct sha256_state *md, unsigned char *out)
+{
+	int i;
+
+	if (md->curlen >= sizeof(md->buf))
+		return -1;
+
+	/* increase the length of the message */
+	md->length += md->curlen * 8;
+
+	/* append the '1' bit */
+	md->buf[md->curlen++] = (unsigned char) 0x80;
+
+	/* if the length is currently above 56 bytes we append zeros
+	 * then compress.  Then we can fall back to padding zeros and length
+	 * encoding like normal.
+	 */
+	if (md->curlen > 56) {
+		while (md->curlen < 64) {
+			md->buf[md->curlen++] = (unsigned char) 0;
+		}
+		sha256_compress(md, md->buf);
+		md->curlen = 0;
+	}
+
+	/* pad upto 56 bytes of zeroes */
+	while (md->curlen < 56) {
+		md->buf[md->curlen++] = (unsigned char) 0;
+	}
+
+	/* store length */
+	WPA_PUT_BE64(md->buf + 56, md->length);
+	sha256_compress(md, md->buf);
+
+	/* copy output */
+	for (i = 0; i < 8; i++)
+		WPA_PUT_BE32(out + (4 * i), md->state[i]);
+
+	return 0;
+}
+
+/**
+ * sha256_vector - SHA256 hash for data vector
+ * @num_elem: Number of elements in the data vector
+ * @addr: Pointers to the data areas
+ * @len: Lengths of the data blocks
+ * @mac: Buffer for the hash
+ * Returns: 0 on success, -1 of failure
+ */
+static int sha256_vector(size_t num_elem, u8 *addr[], size_t *len,
+		  u8 *mac)
+{
+	struct sha256_state ctx;
+	size_t i;
+
+	sha256_init(&ctx);
+	for (i = 0; i < num_elem; i++)
+		if (sha256_process(&ctx, addr[i], len[i]))
+			return -1;
+	if (sha256_done(&ctx, mac))
+		return -1;
+	return 0;
+}
+
+static u8 os_strlen(const char *s)
+{
+	const char *p = s;
+	while (*p)
+		p++;
+	return p - s;
+}
+
+static int os_memcmp(void *s1, void *s2, u8 n)
+{
+	unsigned char *p1 = s1, *p2 = s2;
+
+	if (n == 0)
+		return 0;
+
+	while (*p1 == *p2) {
+		p1++;
+		p2++;
+		n--;
+		if (n == 0)
+			return 0;
+	}
+
+	return *p1 - *p2;
+}
+
+/**
+ * hmac_sha256_vector - HMAC-SHA256 over data vector (RFC 2104)
+ * @key: Key for HMAC operations
+ * @key_len: Length of the key in bytes
+ * @num_elem: Number of elements in the data vector
+ * @addr: Pointers to the data areas
+ * @len: Lengths of the data blocks
+ * @mac: Buffer for the hash (32 bytes)
+ */
+static void hmac_sha256_vector(u8 *key, size_t key_len, size_t num_elem,
+			u8 *addr[], size_t *len, u8 *mac)
+{
+	unsigned char k_pad[64]; /* padding - key XORd with ipad/opad */
+	unsigned char tk[32];
+	u8 *_addr[6];
+	size_t _len[6], i;
+
+	if (num_elem > 5) {
+		/*
+		 * Fixed limit on the number of fragments to avoid having to
+		 * allocate memory (which could fail).
+		 */
+		return;
+	}
+
+        /* if key is longer than 64 bytes reset it to key = SHA256(key) */
+        if (key_len > 64) {
+		sha256_vector(1, &key, &key_len, tk);
+		key = tk;
+		key_len = 32;
+        }
+
+	/* the HMAC_SHA256 transform looks like:
+	 *
+	 * SHA256(K XOR opad, SHA256(K XOR ipad, text))
+	 *
+	 * where K is an n byte key
+	 * ipad is the byte 0x36 repeated 64 times
+	 * opad is the byte 0x5c repeated 64 times
+	 * and text is the data being protected */
+
+	/* start out by storing key in ipad */
+	_rtw_memset(k_pad, 0, sizeof(k_pad));
+	_rtw_memcpy(k_pad, key, key_len);
+	/* XOR key with ipad values */
+	for (i = 0; i < 64; i++)
+		k_pad[i] ^= 0x36;
+
+	/* perform inner SHA256 */
+	_addr[0] = k_pad;
+	_len[0] = 64;
+	for (i = 0; i < num_elem; i++) {
+		_addr[i + 1] = addr[i];
+		_len[i + 1] = len[i];
+	}
+	sha256_vector(1 + num_elem, _addr, _len, mac);
+
+	_rtw_memset(k_pad, 0, sizeof(k_pad));
+	_rtw_memcpy(k_pad, key, key_len);
+	/* XOR key with opad values */
+	for (i = 0; i < 64; i++)
+		k_pad[i] ^= 0x5c;
+
+	/* perform outer SHA256 */
+	_addr[0] = k_pad;
+	_len[0] = 64;
+	_addr[1] = mac;
+	_len[1] = 32;
+	sha256_vector(2, _addr, _len, mac);
+}
+
+/**
+ * sha256_prf - SHA256-based Pseudo-Random Function (IEEE 802.11r, 8.5.1.5.2)
+ * @key: Key for PRF
+ * @key_len: Length of the key in bytes
+ * @label: A unique label for each purpose of the PRF
+ * @data: Extra data to bind into the key
+ * @data_len: Length of the data
+ * @buf: Buffer for the generated pseudo-random key
+ * @buf_len: Number of bytes of key to generate
+ *
+ * This function is used to derive new, cryptographically separate keys from a
+ * given key.
+ */
+static void sha256_prf(u8 *key, size_t key_len, char *label,
+		u8 *data, size_t data_len, u8 *buf, size_t buf_len)
+{
+	u16 counter = 1;
+	size_t pos, plen;
+	u8 hash[SHA256_MAC_LEN];
+	u8 *addr[4];
+	size_t len[4];
+	u8 counter_le[2], length_le[2];
+
+	addr[0] = counter_le;
+	len[0] = 2;
+	addr[1] = (u8 *) label;
+	len[1] = os_strlen(label);
+	addr[2] = data;
+	len[2] = data_len;
+	addr[3] = length_le;
+	len[3] = sizeof(length_le);
+
+	WPA_PUT_LE16(length_le, buf_len * 8);
+	pos = 0;
+	while (pos < buf_len) {
+		plen = buf_len - pos;
+		WPA_PUT_LE16(counter_le, counter);
+		if (plen >= SHA256_MAC_LEN) {
+			hmac_sha256_vector(key, key_len, 4, addr, len,
+					   &buf[pos]);
+			pos += SHA256_MAC_LEN;
+		} else {
+			hmac_sha256_vector(key, key_len, 4, addr, len, hash);
+			_rtw_memcpy(&buf[pos], hash, plen);
+			break;
+		}
+		counter++;
+	}
+}
+
+/* AES tables*/
+const u32 Te0[256] = {
+    0xc66363a5U, 0xf87c7c84U, 0xee777799U, 0xf67b7b8dU,
+    0xfff2f20dU, 0xd66b6bbdU, 0xde6f6fb1U, 0x91c5c554U,
+    0x60303050U, 0x02010103U, 0xce6767a9U, 0x562b2b7dU,
+    0xe7fefe19U, 0xb5d7d762U, 0x4dababe6U, 0xec76769aU,
+    0x8fcaca45U, 0x1f82829dU, 0x89c9c940U, 0xfa7d7d87U,
+    0xeffafa15U, 0xb25959ebU, 0x8e4747c9U, 0xfbf0f00bU,
+    0x41adadecU, 0xb3d4d467U, 0x5fa2a2fdU, 0x45afafeaU,
+    0x239c9cbfU, 0x53a4a4f7U, 0xe4727296U, 0x9bc0c05bU,
+    0x75b7b7c2U, 0xe1fdfd1cU, 0x3d9393aeU, 0x4c26266aU,
+    0x6c36365aU, 0x7e3f3f41U, 0xf5f7f702U, 0x83cccc4fU,
+    0x6834345cU, 0x51a5a5f4U, 0xd1e5e534U, 0xf9f1f108U,
+    0xe2717193U, 0xabd8d873U, 0x62313153U, 0x2a15153fU,
+    0x0804040cU, 0x95c7c752U, 0x46232365U, 0x9dc3c35eU,
+    0x30181828U, 0x379696a1U, 0x0a05050fU, 0x2f9a9ab5U,
+    0x0e070709U, 0x24121236U, 0x1b80809bU, 0xdfe2e23dU,
+    0xcdebeb26U, 0x4e272769U, 0x7fb2b2cdU, 0xea75759fU,
+    0x1209091bU, 0x1d83839eU, 0x582c2c74U, 0x341a1a2eU,
+    0x361b1b2dU, 0xdc6e6eb2U, 0xb45a5aeeU, 0x5ba0a0fbU,
+    0xa45252f6U, 0x763b3b4dU, 0xb7d6d661U, 0x7db3b3ceU,
+    0x5229297bU, 0xdde3e33eU, 0x5e2f2f71U, 0x13848497U,
+    0xa65353f5U, 0xb9d1d168U, 0x00000000U, 0xc1eded2cU,
+    0x40202060U, 0xe3fcfc1fU, 0x79b1b1c8U, 0xb65b5bedU,
+    0xd46a6abeU, 0x8dcbcb46U, 0x67bebed9U, 0x7239394bU,
+    0x944a4adeU, 0x984c4cd4U, 0xb05858e8U, 0x85cfcf4aU,
+    0xbbd0d06bU, 0xc5efef2aU, 0x4faaaae5U, 0xedfbfb16U,
+    0x864343c5U, 0x9a4d4dd7U, 0x66333355U, 0x11858594U,
+    0x8a4545cfU, 0xe9f9f910U, 0x04020206U, 0xfe7f7f81U,
+    0xa05050f0U, 0x783c3c44U, 0x259f9fbaU, 0x4ba8a8e3U,
+    0xa25151f3U, 0x5da3a3feU, 0x804040c0U, 0x058f8f8aU,
+    0x3f9292adU, 0x219d9dbcU, 0x70383848U, 0xf1f5f504U,
+    0x63bcbcdfU, 0x77b6b6c1U, 0xafdada75U, 0x42212163U,
+    0x20101030U, 0xe5ffff1aU, 0xfdf3f30eU, 0xbfd2d26dU,
+    0x81cdcd4cU, 0x180c0c14U, 0x26131335U, 0xc3ecec2fU,
+    0xbe5f5fe1U, 0x359797a2U, 0x884444ccU, 0x2e171739U,
+    0x93c4c457U, 0x55a7a7f2U, 0xfc7e7e82U, 0x7a3d3d47U,
+    0xc86464acU, 0xba5d5de7U, 0x3219192bU, 0xe6737395U,
+    0xc06060a0U, 0x19818198U, 0x9e4f4fd1U, 0xa3dcdc7fU,
+    0x44222266U, 0x542a2a7eU, 0x3b9090abU, 0x0b888883U,
+    0x8c4646caU, 0xc7eeee29U, 0x6bb8b8d3U, 0x2814143cU,
+    0xa7dede79U, 0xbc5e5ee2U, 0x160b0b1dU, 0xaddbdb76U,
+    0xdbe0e03bU, 0x64323256U, 0x743a3a4eU, 0x140a0a1eU,
+    0x924949dbU, 0x0c06060aU, 0x4824246cU, 0xb85c5ce4U,
+    0x9fc2c25dU, 0xbdd3d36eU, 0x43acacefU, 0xc46262a6U,
+    0x399191a8U, 0x319595a4U, 0xd3e4e437U, 0xf279798bU,
+    0xd5e7e732U, 0x8bc8c843U, 0x6e373759U, 0xda6d6db7U,
+    0x018d8d8cU, 0xb1d5d564U, 0x9c4e4ed2U, 0x49a9a9e0U,
+    0xd86c6cb4U, 0xac5656faU, 0xf3f4f407U, 0xcfeaea25U,
+    0xca6565afU, 0xf47a7a8eU, 0x47aeaee9U, 0x10080818U,
+    0x6fbabad5U, 0xf0787888U, 0x4a25256fU, 0x5c2e2e72U,
+    0x381c1c24U, 0x57a6a6f1U, 0x73b4b4c7U, 0x97c6c651U,
+    0xcbe8e823U, 0xa1dddd7cU, 0xe874749cU, 0x3e1f1f21U,
+    0x964b4bddU, 0x61bdbddcU, 0x0d8b8b86U, 0x0f8a8a85U,
+    0xe0707090U, 0x7c3e3e42U, 0x71b5b5c4U, 0xcc6666aaU,
+    0x904848d8U, 0x06030305U, 0xf7f6f601U, 0x1c0e0e12U,
+    0xc26161a3U, 0x6a35355fU, 0xae5757f9U, 0x69b9b9d0U,
+    0x17868691U, 0x99c1c158U, 0x3a1d1d27U, 0x279e9eb9U,
+    0xd9e1e138U, 0xebf8f813U, 0x2b9898b3U, 0x22111133U,
+    0xd26969bbU, 0xa9d9d970U, 0x078e8e89U, 0x339494a7U,
+    0x2d9b9bb6U, 0x3c1e1e22U, 0x15878792U, 0xc9e9e920U,
+    0x87cece49U, 0xaa5555ffU, 0x50282878U, 0xa5dfdf7aU,
+    0x038c8c8fU, 0x59a1a1f8U, 0x09898980U, 0x1a0d0d17U,
+    0x65bfbfdaU, 0xd7e6e631U, 0x844242c6U, 0xd06868b8U,
+    0x824141c3U, 0x299999b0U, 0x5a2d2d77U, 0x1e0f0f11U,
+    0x7bb0b0cbU, 0xa85454fcU, 0x6dbbbbd6U, 0x2c16163aU,
+};
+const u32 Td0[256] = {
+    0x51f4a750U, 0x7e416553U, 0x1a17a4c3U, 0x3a275e96U,
+    0x3bab6bcbU, 0x1f9d45f1U, 0xacfa58abU, 0x4be30393U,
+    0x2030fa55U, 0xad766df6U, 0x88cc7691U, 0xf5024c25U,
+    0x4fe5d7fcU, 0xc52acbd7U, 0x26354480U, 0xb562a38fU,
+    0xdeb15a49U, 0x25ba1b67U, 0x45ea0e98U, 0x5dfec0e1U,
+    0xc32f7502U, 0x814cf012U, 0x8d4697a3U, 0x6bd3f9c6U,
+    0x038f5fe7U, 0x15929c95U, 0xbf6d7aebU, 0x955259daU,
+    0xd4be832dU, 0x587421d3U, 0x49e06929U, 0x8ec9c844U,
+    0x75c2896aU, 0xf48e7978U, 0x99583e6bU, 0x27b971ddU,
+    0xbee14fb6U, 0xf088ad17U, 0xc920ac66U, 0x7dce3ab4U,
+    0x63df4a18U, 0xe51a3182U, 0x97513360U, 0x62537f45U,
+    0xb16477e0U, 0xbb6bae84U, 0xfe81a01cU, 0xf9082b94U,
+    0x70486858U, 0x8f45fd19U, 0x94de6c87U, 0x527bf8b7U,
+    0xab73d323U, 0x724b02e2U, 0xe31f8f57U, 0x6655ab2aU,
+    0xb2eb2807U, 0x2fb5c203U, 0x86c57b9aU, 0xd33708a5U,
+    0x302887f2U, 0x23bfa5b2U, 0x02036abaU, 0xed16825cU,
+    0x8acf1c2bU, 0xa779b492U, 0xf307f2f0U, 0x4e69e2a1U,
+    0x65daf4cdU, 0x0605bed5U, 0xd134621fU, 0xc4a6fe8aU,
+    0x342e539dU, 0xa2f355a0U, 0x058ae132U, 0xa4f6eb75U,
+    0x0b83ec39U, 0x4060efaaU, 0x5e719f06U, 0xbd6e1051U,
+    0x3e218af9U, 0x96dd063dU, 0xdd3e05aeU, 0x4de6bd46U,
+    0x91548db5U, 0x71c45d05U, 0x0406d46fU, 0x605015ffU,
+    0x1998fb24U, 0xd6bde997U, 0x894043ccU, 0x67d99e77U,
+    0xb0e842bdU, 0x07898b88U, 0xe7195b38U, 0x79c8eedbU,
+    0xa17c0a47U, 0x7c420fe9U, 0xf8841ec9U, 0x00000000U,
+    0x09808683U, 0x322bed48U, 0x1e1170acU, 0x6c5a724eU,
+    0xfd0efffbU, 0x0f853856U, 0x3daed51eU, 0x362d3927U,
+    0x0a0fd964U, 0x685ca621U, 0x9b5b54d1U, 0x24362e3aU,
+    0x0c0a67b1U, 0x9357e70fU, 0xb4ee96d2U, 0x1b9b919eU,
+    0x80c0c54fU, 0x61dc20a2U, 0x5a774b69U, 0x1c121a16U,
+    0xe293ba0aU, 0xc0a02ae5U, 0x3c22e043U, 0x121b171dU,
+    0x0e090d0bU, 0xf28bc7adU, 0x2db6a8b9U, 0x141ea9c8U,
+    0x57f11985U, 0xaf75074cU, 0xee99ddbbU, 0xa37f60fdU,
+    0xf701269fU, 0x5c72f5bcU, 0x44663bc5U, 0x5bfb7e34U,
+    0x8b432976U, 0xcb23c6dcU, 0xb6edfc68U, 0xb8e4f163U,
+    0xd731dccaU, 0x42638510U, 0x13972240U, 0x84c61120U,
+    0x854a247dU, 0xd2bb3df8U, 0xaef93211U, 0xc729a16dU,
+    0x1d9e2f4bU, 0xdcb230f3U, 0x0d8652ecU, 0x77c1e3d0U,
+    0x2bb3166cU, 0xa970b999U, 0x119448faU, 0x47e96422U,
+    0xa8fc8cc4U, 0xa0f03f1aU, 0x567d2cd8U, 0x223390efU,
+    0x87494ec7U, 0xd938d1c1U, 0x8ccaa2feU, 0x98d40b36U,
+    0xa6f581cfU, 0xa57ade28U, 0xdab78e26U, 0x3fadbfa4U,
+    0x2c3a9de4U, 0x5078920dU, 0x6a5fcc9bU, 0x547e4662U,
+    0xf68d13c2U, 0x90d8b8e8U, 0x2e39f75eU, 0x82c3aff5U,
+    0x9f5d80beU, 0x69d0937cU, 0x6fd52da9U, 0xcf2512b3U,
+    0xc8ac993bU, 0x10187da7U, 0xe89c636eU, 0xdb3bbb7bU,
+    0xcd267809U, 0x6e5918f4U, 0xec9ab701U, 0x834f9aa8U,
+    0xe6956e65U, 0xaaffe67eU, 0x21bccf08U, 0xef15e8e6U,
+    0xbae79bd9U, 0x4a6f36ceU, 0xea9f09d4U, 0x29b07cd6U,
+    0x31a4b2afU, 0x2a3f2331U, 0xc6a59430U, 0x35a266c0U,
+    0x744ebc37U, 0xfc82caa6U, 0xe090d0b0U, 0x33a7d815U,
+    0xf104984aU, 0x41ecdaf7U, 0x7fcd500eU, 0x1791f62fU,
+    0x764dd68dU, 0x43efb04dU, 0xccaa4d54U, 0xe49604dfU,
+    0x9ed1b5e3U, 0x4c6a881bU, 0xc12c1fb8U, 0x4665517fU,
+    0x9d5eea04U, 0x018c355dU, 0xfa877473U, 0xfb0b412eU,
+    0xb3671d5aU, 0x92dbd252U, 0xe9105633U, 0x6dd64713U,
+    0x9ad7618cU, 0x37a10c7aU, 0x59f8148eU, 0xeb133c89U,
+    0xcea927eeU, 0xb761c935U, 0xe11ce5edU, 0x7a47b13cU,
+    0x9cd2df59U, 0x55f2733fU, 0x1814ce79U, 0x73c737bfU,
+    0x53f7cdeaU, 0x5ffdaa5bU, 0xdf3d6f14U, 0x7844db86U,
+    0xcaaff381U, 0xb968c43eU, 0x3824342cU, 0xc2a3405fU,
+    0x161dc372U, 0xbce2250cU, 0x283c498bU, 0xff0d9541U,
+    0x39a80171U, 0x080cb3deU, 0xd8b4e49cU, 0x6456c190U,
+    0x7bcb8461U, 0xd532b670U, 0x486c5c74U, 0xd0b85742U,
+};
+const u8 Td4s[256] = {
+    0x52U, 0x09U, 0x6aU, 0xd5U, 0x30U, 0x36U, 0xa5U, 0x38U,
+    0xbfU, 0x40U, 0xa3U, 0x9eU, 0x81U, 0xf3U, 0xd7U, 0xfbU,
+    0x7cU, 0xe3U, 0x39U, 0x82U, 0x9bU, 0x2fU, 0xffU, 0x87U,
+    0x34U, 0x8eU, 0x43U, 0x44U, 0xc4U, 0xdeU, 0xe9U, 0xcbU,
+    0x54U, 0x7bU, 0x94U, 0x32U, 0xa6U, 0xc2U, 0x23U, 0x3dU,
+    0xeeU, 0x4cU, 0x95U, 0x0bU, 0x42U, 0xfaU, 0xc3U, 0x4eU,
+    0x08U, 0x2eU, 0xa1U, 0x66U, 0x28U, 0xd9U, 0x24U, 0xb2U,
+    0x76U, 0x5bU, 0xa2U, 0x49U, 0x6dU, 0x8bU, 0xd1U, 0x25U,
+    0x72U, 0xf8U, 0xf6U, 0x64U, 0x86U, 0x68U, 0x98U, 0x16U,
+    0xd4U, 0xa4U, 0x5cU, 0xccU, 0x5dU, 0x65U, 0xb6U, 0x92U,
+    0x6cU, 0x70U, 0x48U, 0x50U, 0xfdU, 0xedU, 0xb9U, 0xdaU,
+    0x5eU, 0x15U, 0x46U, 0x57U, 0xa7U, 0x8dU, 0x9dU, 0x84U,
+    0x90U, 0xd8U, 0xabU, 0x00U, 0x8cU, 0xbcU, 0xd3U, 0x0aU,
+    0xf7U, 0xe4U, 0x58U, 0x05U, 0xb8U, 0xb3U, 0x45U, 0x06U,
+    0xd0U, 0x2cU, 0x1eU, 0x8fU, 0xcaU, 0x3fU, 0x0fU, 0x02U,
+    0xc1U, 0xafU, 0xbdU, 0x03U, 0x01U, 0x13U, 0x8aU, 0x6bU,
+    0x3aU, 0x91U, 0x11U, 0x41U, 0x4fU, 0x67U, 0xdcU, 0xeaU,
+    0x97U, 0xf2U, 0xcfU, 0xceU, 0xf0U, 0xb4U, 0xe6U, 0x73U,
+    0x96U, 0xacU, 0x74U, 0x22U, 0xe7U, 0xadU, 0x35U, 0x85U,
+    0xe2U, 0xf9U, 0x37U, 0xe8U, 0x1cU, 0x75U, 0xdfU, 0x6eU,
+    0x47U, 0xf1U, 0x1aU, 0x71U, 0x1dU, 0x29U, 0xc5U, 0x89U,
+    0x6fU, 0xb7U, 0x62U, 0x0eU, 0xaaU, 0x18U, 0xbeU, 0x1bU,
+    0xfcU, 0x56U, 0x3eU, 0x4bU, 0xc6U, 0xd2U, 0x79U, 0x20U,
+    0x9aU, 0xdbU, 0xc0U, 0xfeU, 0x78U, 0xcdU, 0x5aU, 0xf4U,
+    0x1fU, 0xddU, 0xa8U, 0x33U, 0x88U, 0x07U, 0xc7U, 0x31U,
+    0xb1U, 0x12U, 0x10U, 0x59U, 0x27U, 0x80U, 0xecU, 0x5fU,
+    0x60U, 0x51U, 0x7fU, 0xa9U, 0x19U, 0xb5U, 0x4aU, 0x0dU,
+    0x2dU, 0xe5U, 0x7aU, 0x9fU, 0x93U, 0xc9U, 0x9cU, 0xefU,
+    0xa0U, 0xe0U, 0x3bU, 0x4dU, 0xaeU, 0x2aU, 0xf5U, 0xb0U,
+    0xc8U, 0xebU, 0xbbU, 0x3cU, 0x83U, 0x53U, 0x99U, 0x61U,
+    0x17U, 0x2bU, 0x04U, 0x7eU, 0xbaU, 0x77U, 0xd6U, 0x26U,
+    0xe1U, 0x69U, 0x14U, 0x63U, 0x55U, 0x21U, 0x0cU, 0x7dU,
+};
+const u8 rcons[] = {
+	0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x1B, 0x36
+	/* for 128-bit blocks, Rijndael never uses more than 10 rcon values */
+};
+
+/**
+ * Expand the cipher key into the encryption key schedule.
+ *
+ * @return	the number of rounds for the given cipher key size.
+ */
+static void rijndaelKeySetupEnc(u32 rk[/*44*/], const u8 cipherKey[])
+{
+	int i;
+	u32 temp;
+
+	rk[0] = GETU32(cipherKey     );
+	rk[1] = GETU32(cipherKey +  4);
+	rk[2] = GETU32(cipherKey +  8);
+	rk[3] = GETU32(cipherKey + 12);
+	for (i = 0; i < 10; i++) {
+		temp  = rk[3];
+		rk[4] = rk[0] ^
+			TE421(temp) ^ TE432(temp) ^ TE443(temp) ^ TE414(temp) ^
+			RCON(i);
+		rk[5] = rk[1] ^ rk[4];
+		rk[6] = rk[2] ^ rk[5];
+		rk[7] = rk[3] ^ rk[6];
+		rk += 4;
+	}
+}
+
+static void rijndaelEncrypt(u32 rk[/*44*/], u8 pt[16], u8 ct[16])
+{
+	u32 s0, s1, s2, s3, t0, t1, t2, t3;
+	int Nr = 10;
+#ifndef FULL_UNROLL
+	int r;
+#endif /* ?FULL_UNROLL */
+
+	/*
+	 * map byte array block to cipher state
+	 * and add initial round key:
+	 */
+	s0 = GETU32(pt     ) ^ rk[0];
+	s1 = GETU32(pt +  4) ^ rk[1];
+	s2 = GETU32(pt +  8) ^ rk[2];
+	s3 = GETU32(pt + 12) ^ rk[3];
+
+#define ROUND(i,d,s) \
+d##0 = TE0(s##0) ^ TE1(s##1) ^ TE2(s##2) ^ TE3(s##3) ^ rk[4 * i]; \
+d##1 = TE0(s##1) ^ TE1(s##2) ^ TE2(s##3) ^ TE3(s##0) ^ rk[4 * i + 1]; \
+d##2 = TE0(s##2) ^ TE1(s##3) ^ TE2(s##0) ^ TE3(s##1) ^ rk[4 * i + 2]; \
+d##3 = TE0(s##3) ^ TE1(s##0) ^ TE2(s##1) ^ TE3(s##2) ^ rk[4 * i + 3]
+
+#ifdef FULL_UNROLL
+
+	ROUND(1,t,s);
+	ROUND(2,s,t);
+	ROUND(3,t,s);
+	ROUND(4,s,t);
+	ROUND(5,t,s);
+	ROUND(6,s,t);
+	ROUND(7,t,s);
+	ROUND(8,s,t);
+	ROUND(9,t,s);
+
+	rk += Nr << 2;
+
+#else  /* !FULL_UNROLL */
+
+	/* Nr - 1 full rounds: */
+	r = Nr >> 1;
+	for (;;) {
+		ROUND(1,t,s);
+		rk += 8;
+		if (--r == 0)
+			break;
+		ROUND(0,s,t);
+	}
+
+#endif /* ?FULL_UNROLL */
+
+#undef ROUND
+
+	/*
+	 * apply last round and
+	 * map cipher state to byte array block:
+	 */
+	s0 = TE41(t0) ^ TE42(t1) ^ TE43(t2) ^ TE44(t3) ^ rk[0];
+	PUTU32(ct     , s0);
+	s1 = TE41(t1) ^ TE42(t2) ^ TE43(t3) ^ TE44(t0) ^ rk[1];
+	PUTU32(ct +  4, s1);
+	s2 = TE41(t2) ^ TE42(t3) ^ TE43(t0) ^ TE44(t1) ^ rk[2];
+	PUTU32(ct +  8, s2);
+	s3 = TE41(t3) ^ TE42(t0) ^ TE43(t1) ^ TE44(t2) ^ rk[3];
+	PUTU32(ct + 12, s3);
+}
+
+static void * aes_encrypt_init(u8 *key, size_t len)
+{
+	u32 *rk;
+	if (len != 16)
+		return NULL;
+	rk = (u32*)rtw_malloc(AES_PRIV_SIZE);
+	if (rk == NULL)
+		return NULL;
+	rijndaelKeySetupEnc(rk, key);
+	return rk;
+}
+
+static void aes_128_encrypt(void *ctx, u8 *plain, u8 *crypt)
+{
+	rijndaelEncrypt(ctx, plain, crypt);
+}
+
+
+static void gf_mulx(u8 *pad)
+{
+	int i, carry;
+
+	carry = pad[0] & 0x80;
+	for (i = 0; i < AES_BLOCK_SIZE - 1; i++)
+		pad[i] = (pad[i] << 1) | (pad[i + 1] >> 7);
+	pad[AES_BLOCK_SIZE - 1] <<= 1;
+	if (carry)
+		pad[AES_BLOCK_SIZE - 1] ^= 0x87;
+}
+
+static void aes_encrypt_deinit(void *ctx)
+{
+	_rtw_memset(ctx, 0, AES_PRIV_SIZE);
+	rtw_mfree(ctx, AES_PRIV_SIZE);
+}
+
+
+/**
+ * omac1_aes_128_vector - One-Key CBC MAC (OMAC1) hash with AES-128
+ * @key: 128-bit key for the hash operation
+ * @num_elem: Number of elements in the data vector
+ * @addr: Pointers to the data areas
+ * @len: Lengths of the data blocks
+ * @mac: Buffer for MAC (128 bits, i.e., 16 bytes)
+ * Returns: 0 on success, -1 on failure
+ *
+ * This is a mode for using block cipher (AES in this case) for authentication.
+ * OMAC1 was standardized with the name CMAC by NIST in a Special Publication
+ * (SP) 800-38B.
+ */
+static int omac1_aes_128_vector(u8 *key, size_t num_elem,
+							 u8 *addr[], size_t *len, u8 *mac)
+{
+	void *ctx;
+	u8 cbc[AES_BLOCK_SIZE], pad[AES_BLOCK_SIZE];
+	u8 *pos, *end;
+	size_t i, e, left, total_len;
+
+	ctx = aes_encrypt_init(key, 16);
+	if (ctx == NULL)
+		return -1;
+	_rtw_memset(cbc, 0, AES_BLOCK_SIZE);
+
+	total_len = 0;
+	for (e = 0; e < num_elem; e++)
+		total_len += len[e];
+	left = total_len;
+
+	e = 0;
+	pos = addr[0];
+	end = pos + len[0];
+
+	while (left >= AES_BLOCK_SIZE) {
+		for (i = 0; i < AES_BLOCK_SIZE; i++) {
+			cbc[i] ^= *pos++;
+			if (pos >= end) {
+				e++;
+				pos = addr[e];
+				end = pos + len[e];
+			}
+		}
+		if (left > AES_BLOCK_SIZE)
+			aes_128_encrypt(ctx, cbc, cbc);
+		left -= AES_BLOCK_SIZE;
+	}
+
+	_rtw_memset(pad, 0, AES_BLOCK_SIZE);
+	aes_128_encrypt(ctx, pad, pad);
+	gf_mulx(pad);
+
+	if (left || total_len == 0) {
+		for (i = 0; i < left; i++) {
+			cbc[i] ^= *pos++;
+			if (pos >= end) {
+				e++;
+				pos = addr[e];
+				end = pos + len[e];
+			}
+		}
+		cbc[left] ^= 0x80;
+		gf_mulx(pad);
+	}
+
+	for (i = 0; i < AES_BLOCK_SIZE; i++)
+		pad[i] ^= cbc[i];
+	aes_128_encrypt(ctx, pad, mac);
+	aes_encrypt_deinit(ctx);
+	return 0;
+}
+
+
+/**
+ * omac1_aes_128 - One-Key CBC MAC (OMAC1) hash with AES-128 (aka AES-CMAC)
+ * @key: 128-bit key for the hash operation
+ * @data: Data buffer for which a MAC is determined
+ * @data_len: Length of data buffer in bytes
+ * @mac: Buffer for MAC (128 bits, i.e., 16 bytes)
+ * Returns: 0 on success, -1 on failure
+ *
+ * This is a mode for using block cipher (AES in this case) for authentication.
+ * OMAC1 was standardized with the name CMAC by NIST in a Special Publication
+ * (SP) 800-38B.
+ */
+static int omac1_aes_128(u8 *key, u8 *data, size_t data_len, u8 *mac)
+{
+	return omac1_aes_128_vector(key, 1, &data, &data_len, mac);
+}
+
+#ifdef CONFIG_TDLS
+void wpa_tdls_generate_tpk(_adapter *padapter, struct sta_info *psta)
+{
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	u8 *SNonce = psta->SNonce;
+	u8 *ANonce = psta->ANonce;
+
+	u8 key_input[SHA256_MAC_LEN];
+	u8 *nonce[2];
+	size_t len[2];
+	u8 data[3 * ETH_ALEN];
+
+	/* IEEE Std 802.11z-2010 8.5.9.1:
+	 * TPK-Key-Input = SHA-256(min(SNonce, ANonce) || max(SNonce, ANonce))
+	 */
+	len[0] = 32;
+	len[1] = 32;
+	if (os_memcmp(SNonce, ANonce, 32) < 0) {
+		nonce[0] = SNonce;
+		nonce[1] = ANonce;
+	} else {
+		nonce[0] = ANonce;
+		nonce[1] = SNonce;
+	}
+
+	sha256_vector(2, nonce, len, key_input);
+
+	/*
+	 * TPK-Key-Data = KDF-N_KEY(TPK-Key-Input, "TDLS PMK",
+	 *	min(MAC_I, MAC_R) || max(MAC_I, MAC_R) || BSSID || N_KEY)
+	 * TODO: is N_KEY really included in KDF Context and if so, in which
+	 * presentation format (little endian 16-bit?) is it used? It gets
+	 * added by the KDF anyway..
+	 */
+
+	if (os_memcmp(myid(&(padapter->eeprompriv)), psta->hwaddr, ETH_ALEN) < 0) {
+		_rtw_memcpy(data, myid(&(padapter->eeprompriv)), ETH_ALEN);
+		_rtw_memcpy(data + ETH_ALEN, psta->hwaddr, ETH_ALEN);
+	} else {
+		_rtw_memcpy(data, psta->hwaddr, ETH_ALEN);
+		_rtw_memcpy(data + ETH_ALEN, myid(&(padapter->eeprompriv)), ETH_ALEN);
+	}
+	_rtw_memcpy(data + 2 * ETH_ALEN, get_bssid(pmlmepriv), ETH_ALEN);
+
+	sha256_prf(key_input, SHA256_MAC_LEN, "TDLS PMK", data, sizeof(data), (u8 *) &psta->tpk, sizeof(psta->tpk));	
+
+
+}
+
+/**
+ * wpa_tdls_ftie_mic - Calculate TDLS FTIE MIC
+ * @kck: TPK-KCK
+ * @lnkid: Pointer to the beginning of Link Identifier IE
+ * @rsnie: Pointer to the beginning of RSN IE used for handshake
+ * @timeoutie: Pointer to the beginning of Timeout IE used for handshake
+ * @ftie: Pointer to the beginning of FT IE
+ * @mic: Pointer for writing MIC
+ *
+ * Calculate MIC for TDLS frame.
+ */
+int wpa_tdls_ftie_mic(u8 *kck, u8 trans_seq, 
+							u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie,
+							u8 *mic)
+{
+	u8 *buf, *pos;
+	struct wpa_tdls_ftie *_ftie;
+	struct wpa_tdls_lnkid *_lnkid;
+	int ret;
+	int len = 2 * ETH_ALEN + 1 + 2 + lnkid[1] + 2 + rsnie[1] +
+		2 + timeoutie[1] + 2 + ftie[1];
+	buf = rtw_zmalloc(len);
+	if (!buf) {
+		DBG_8192C("TDLS: No memory for MIC calculation\n");
+		return -1;
+	}
+
+	pos = buf;
+	_lnkid = (struct wpa_tdls_lnkid *) lnkid;
+	/* 1) TDLS initiator STA MAC address */
+	_rtw_memcpy(pos, _lnkid->init_sta, ETH_ALEN);
+	pos += ETH_ALEN;
+	/* 2) TDLS responder STA MAC address */
+	_rtw_memcpy(pos, _lnkid->resp_sta, ETH_ALEN);
+	pos += ETH_ALEN;
+	/* 3) Transaction Sequence number */
+	*pos++ = trans_seq;
+	/* 4) Link Identifier IE */
+	_rtw_memcpy(pos, lnkid, 2 + lnkid[1]);
+	pos += 2 + lnkid[1];
+	/* 5) RSN IE */
+	_rtw_memcpy(pos, rsnie, 2 + rsnie[1]);
+	pos += 2 + rsnie[1];
+	/* 6) Timeout Interval IE */
+	_rtw_memcpy(pos, timeoutie, 2 + timeoutie[1]);
+	pos += 2 + timeoutie[1];
+	/* 7) FTIE, with the MIC field of the FTIE set to 0 */
+	_rtw_memcpy(pos, ftie, 2 + ftie[1]);
+	_ftie = (struct wpa_tdls_ftie *) pos;
+	_rtw_memset(_ftie->mic, 0, TDLS_MIC_LEN);
+	pos += 2 + ftie[1];
+ 
+	ret = omac1_aes_128(kck, buf, pos - buf, mic);
+	rtw_mfree(buf, len);
+	return ret;
+
+}
+
+int tdls_verify_mic(u8 *kck, u8 trans_seq,
+							u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie)
+{
+	u8 *buf, *pos;
+	int len;
+	u8 mic[16];
+	int ret;
+	u8 *rx_ftie, *tmp_ftie;
+
+	if (lnkid == NULL || rsnie == NULL ||
+	    timeoutie == NULL || ftie == NULL){
+		DBG_8192C("pointer fail\n");    
+		return 0;
+	}
+	
+	len = 2 * ETH_ALEN + 1 + 2 + 18 + 2 + *(rsnie+1) + 2 + *(timeoutie+1) + 2 + *(ftie+1);
+
+	buf = rtw_zmalloc(len);
+	if (buf == NULL)
+		return 0;
+
+	pos = buf;
+	/* 1) TDLS initiator STA MAC address */
+	_rtw_memcpy(pos, lnkid + ETH_ALEN + 2, ETH_ALEN);
+	pos += ETH_ALEN;
+	/* 2) TDLS responder STA MAC address */
+	_rtw_memcpy(pos, lnkid + 2 * ETH_ALEN + 2, ETH_ALEN);
+	pos += ETH_ALEN;
+	/* 3) Transaction Sequence number */
+	*pos++ = trans_seq;
+	/* 4) Link Identifier IE */
+	_rtw_memcpy(pos, lnkid, 2 + 18);
+	pos += 2 + 18;
+	/* 5) RSN IE */
+	_rtw_memcpy(pos, rsnie, 2 + *(rsnie+1));
+	pos += 2 + *(rsnie+1);
+	/* 6) Timeout Interval IE */
+	_rtw_memcpy(pos, timeoutie, 2 + *(timeoutie+1));
+	pos += 2 + *(timeoutie+1);
+	/* 7) FTIE, with the MIC field of the FTIE set to 0 */
+	_rtw_memcpy(pos, ftie, 2 + *(ftie+1));
+	pos += 2;
+	tmp_ftie = (u8 *) (pos+2);
+	_rtw_memset(tmp_ftie, 0, 16);
+	pos += *(ftie+1);
+
+	ret = omac1_aes_128(kck, buf, pos - buf, mic);
+	rtw_mfree(buf, len);
+	if (ret)
+		return 0;
+	rx_ftie = ftie+4;
+
+	if (os_memcmp(mic, rx_ftie, 16) == 0) {
+	//Valid MIC
+	DBG_8192C( "[%s] Valid MIC\n", __FUNCTION__);
+		return 1;
+	}
+	//Invalid MIC
+	DBG_8192C( "[%s] Invalid MIC\n", __FUNCTION__);
+	return 0;
+
+}
+#endif
+
+#ifdef PLATFORM_WINDOWS
+void rtw_use_tkipkey_handler (
+	IN	PVOID					SystemSpecific1,
+	IN	PVOID					FunctionContext,
+	IN	PVOID					SystemSpecific2,
+	IN	PVOID					SystemSpecific3
+	)
+#endif
+#ifdef PLATFORM_LINUX
+void rtw_use_tkipkey_handler(void *FunctionContext)
+#endif
+{
+        _adapter *padapter = (_adapter *)FunctionContext;
+
+
+_func_enter_;			
+
+	RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("^^^rtw_use_tkipkey_handler ^^^\n"));
+	
+/*
+	if(padapter->bDriverStopped ||padapter->bSurpriseRemoved){
+			RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("^^^rtw_use_tkipkey_handler (padapter->bDriverStopped %d)(padapter->bSurpriseRemoved %d)^^^\n",padapter->bDriverStopped,padapter->bSurpriseRemoved));
+
+		return;
+	}
+	*/
+	
+	padapter->securitypriv.busetkipkey=_TRUE;
+
+	RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("^^^rtw_use_tkipkey_handler padapter->securitypriv.busetkipkey=%d^^^\n",padapter->securitypriv.busetkipkey));
+
+_func_exit_;	
+
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_sta_mgt.c linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_sta_mgt.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_sta_mgt.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_sta_mgt.c	2017-09-23 03:42:49.906675407 +0800
@@ -0,0 +1,714 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * 
+******************************************************************************/
+#define _RTW_STA_MGT_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <recv_osdep.h>
+#include <xmit_osdep.h>
+#include <mlme_osdep.h>
+
+
+#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
+
+#error "Shall be Linux or Windows, but not both!\n"
+
+#endif
+
+#include <sta_info.h>
+
+
+void _rtw_init_stainfo(struct sta_info *psta)
+{
+
+_func_enter_;
+
+	_rtw_memset((u8 *)psta, 0, sizeof (struct sta_info));
+
+	 _rtw_spinlock_init(&psta->lock);
+	_rtw_init_listhead(&psta->list);
+	_rtw_init_listhead(&psta->hash_list);
+	//_rtw_init_listhead(&psta->asoc_list);
+	//_rtw_init_listhead(&psta->sleep_list);
+	//_rtw_init_listhead(&psta->wakeup_list);	
+
+	_rtw_init_queue(&psta->sleep_q);
+	psta->sleepq_len = 0;
+
+	_rtw_init_sta_xmit_priv(&psta->sta_xmitpriv);
+	_rtw_init_sta_recv_priv(&psta->sta_recvpriv);
+	
+#ifdef CONFIG_AP_MODE
+
+	_rtw_init_listhead(&psta->asoc_list);
+
+	_rtw_init_listhead(&psta->auth_list);
+	
+	psta->expire_to = 0;
+	
+	psta->flags = 0;
+	
+	psta->capability = 0;
+
+
+#ifdef CONFIG_NATIVEAP_MLME
+	psta->nonerp_set = 0;
+	psta->no_short_slot_time_set = 0;
+	psta->no_short_preamble_set = 0;
+	psta->no_ht_gf_set = 0;
+	psta->no_ht_set = 0;
+	psta->ht_20mhz_set = 0;
+#endif	
+
+#ifdef CONFIG_TX_MCAST2UNI
+	psta->under_exist_checking = 0;
+#endif	// CONFIG_TX_MCAST2UNI
+	
+#endif	// CONFIG_AP_MODE	
+	
+_func_exit_;	
+
+}
+
+u32	_rtw_init_sta_priv(struct	sta_priv *pstapriv)
+{
+	struct sta_info *psta;
+	s32 i;
+	
+_func_enter_;	
+
+	pstapriv->pallocated_stainfo_buf = rtw_zvmalloc (sizeof(struct sta_info) * NUM_STA+ 4);
+	
+	if(!pstapriv->pallocated_stainfo_buf)
+		return _FAIL;
+
+	pstapriv->pstainfo_buf = pstapriv->pallocated_stainfo_buf + 4 - 
+		((SIZE_PTR)(pstapriv->pallocated_stainfo_buf ) & 3);
+
+	_rtw_init_queue(&pstapriv->free_sta_queue);
+
+	_rtw_spinlock_init(&pstapriv->sta_hash_lock);
+	
+	//_rtw_init_queue(&pstapriv->asoc_q);
+	pstapriv->asoc_sta_count = 0;
+	_rtw_init_queue(&pstapriv->sleep_q);
+	_rtw_init_queue(&pstapriv->wakeup_q);
+
+	psta = (struct sta_info *)(pstapriv->pstainfo_buf);
+
+		
+	for(i = 0; i < NUM_STA; i++)
+	{
+		_rtw_init_stainfo(psta);
+
+		_rtw_init_listhead(&(pstapriv->sta_hash[i]));
+
+		rtw_list_insert_tail(&psta->list, get_list_head(&pstapriv->free_sta_queue));
+
+		psta++;
+	}
+
+#ifdef CONFIG_AP_MODE
+
+	pstapriv->sta_dz_bitmap = 0;
+	pstapriv->tim_bitmap = 0;
+
+	_rtw_init_listhead(&pstapriv->asoc_list);
+	_rtw_init_listhead(&pstapriv->auth_list);
+
+	_rtw_spinlock_init(&pstapriv->asoc_list_lock);
+	_rtw_spinlock_init(&pstapriv->auth_list_lock);	
+	
+	pstapriv->auth_to = 3; // 3*2 = 6 sec 
+	pstapriv->assoc_to = 3;
+	//pstapriv->expire_to = 900;// 900*2 = 1800 sec = 30 min, expire after no any traffic.
+	pstapriv->expire_to = 30;// 30*2 = 60 sec = 1 min, expire after no any traffic.
+	
+	pstapriv->max_num_sta = NUM_STA;
+	
+#endif
+	
+_func_exit_;		
+
+	return _SUCCESS;
+	
+}
+
+void	_rtw_free_sta_xmit_priv_lock(struct sta_xmit_priv *psta_xmitpriv)
+{
+_func_enter_;
+
+	_rtw_spinlock_free(&psta_xmitpriv->lock);
+
+	_rtw_spinlock_free(&(psta_xmitpriv->be_q.sta_pending.lock));
+	_rtw_spinlock_free(&(psta_xmitpriv->bk_q.sta_pending.lock));
+	_rtw_spinlock_free(&(psta_xmitpriv->vi_q.sta_pending.lock));
+	_rtw_spinlock_free(&(psta_xmitpriv->vo_q.sta_pending.lock));
+_func_exit_;	
+}
+
+static void	_rtw_free_sta_recv_priv_lock(struct sta_recv_priv *psta_recvpriv)
+{
+_func_enter_;	
+
+	_rtw_spinlock_free(&psta_recvpriv->lock);
+
+	_rtw_spinlock_free(&(psta_recvpriv->defrag_q.lock));
+
+_func_exit_;
+
+}
+
+void rtw_mfree_stainfo(struct sta_info *psta)
+{
+_func_enter_;
+
+	if(&psta->lock != NULL)
+		 _rtw_spinlock_free(&psta->lock);
+
+	_rtw_free_sta_xmit_priv_lock(&psta->sta_xmitpriv);
+	_rtw_free_sta_recv_priv_lock(&psta->sta_recvpriv);
+	
+_func_exit_;	
+}
+
+
+// this function is used to free the memory of lock || sema for all stainfos
+void rtw_mfree_all_stainfo(struct sta_priv *pstapriv )
+{
+	_irqL	 irqL;
+	_list	*plist, *phead;
+	struct sta_info *psta = NULL;
+	
+_func_enter_;	
+
+	_enter_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+
+	phead = get_list_head(&pstapriv->free_sta_queue);
+	plist = get_next(phead);
+		
+	while ((rtw_end_of_queue_search(phead, plist)) == _FALSE)
+	{
+		psta = LIST_CONTAINOR(plist, struct sta_info ,list);
+		plist = get_next(plist);
+
+		rtw_mfree_stainfo(psta);
+	}
+	
+	_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+
+_func_exit_;	
+
+}
+
+
+void rtw_mfree_sta_priv_lock(struct	sta_priv *pstapriv)
+{
+	 rtw_mfree_all_stainfo(pstapriv); //be done before free sta_hash_lock
+
+	_rtw_spinlock_free(&pstapriv->free_sta_queue.lock);
+
+	_rtw_spinlock_free(&pstapriv->sta_hash_lock);
+	_rtw_spinlock_free(&pstapriv->wakeup_q.lock);
+	_rtw_spinlock_free(&pstapriv->sleep_q.lock);
+
+#ifdef CONFIG_AP_MODE
+	_rtw_spinlock_free(&pstapriv->asoc_list_lock);
+	_rtw_spinlock_free(&pstapriv->auth_list_lock);	
+#endif
+
+}
+
+u32	_rtw_free_sta_priv(struct	sta_priv *pstapriv)
+{
+_func_enter_;
+	if(pstapriv){
+		rtw_mfree_sta_priv_lock(pstapriv);
+
+		if(pstapriv->pallocated_stainfo_buf) {
+			rtw_vmfree(pstapriv->pallocated_stainfo_buf, sizeof(struct sta_info)*NUM_STA+4);
+		}
+	}
+	
+_func_exit_;
+	return _SUCCESS;
+}
+
+
+//struct	sta_info *rtw_alloc_stainfo(_queue *pfree_sta_queue, unsigned char *hwaddr)
+struct	sta_info *rtw_alloc_stainfo(struct	sta_priv *pstapriv, u8 *hwaddr) 
+{	
+	_irqL irqL, irqL2;
+	uint tmp_aid;
+	s32	index;
+	_list	*phash_list;
+	struct sta_info	*psta;
+	_queue *pfree_sta_queue;
+	struct recv_reorder_ctrl *preorder_ctrl;
+	int i = 0;
+	u16  wRxSeqInitialValue = 0xffff;
+	
+_func_enter_;	
+
+	pfree_sta_queue = &pstapriv->free_sta_queue;
+	
+	_enter_critical_bh(&(pfree_sta_queue->lock), &irqL);
+
+	if (_rtw_queue_empty(pfree_sta_queue) == _TRUE)
+	{
+		_exit_critical_bh(&(pfree_sta_queue->lock), &irqL);
+		psta = NULL;
+	}
+	else
+	{
+		psta = LIST_CONTAINOR(get_next(&pfree_sta_queue->queue), struct sta_info, list);
+		
+		rtw_list_delete(&(psta->list));
+		
+		_exit_critical_bh(&(pfree_sta_queue->lock), &irqL);
+		
+		tmp_aid = psta->aid;	
+	
+		_rtw_init_stainfo(psta);
+
+		_rtw_memcpy(psta->hwaddr, hwaddr, ETH_ALEN);
+
+		index = wifi_mac_hash(hwaddr);
+
+		RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_info_,("rtw_alloc_stainfo: index  = %x", index));
+
+		if(index >= NUM_STA){
+			RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_err_,("ERROR=> rtw_alloc_stainfo: index >= NUM_STA"));
+			psta= NULL;	
+			goto exit;
+		}
+		phash_list = &(pstapriv->sta_hash[index]);
+
+		_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL2);
+
+		rtw_list_insert_tail(&psta->hash_list, phash_list);
+
+		pstapriv->asoc_sta_count ++ ;
+
+		_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2);
+
+// Commented by Albert 2009/08/13
+// For the SMC router, the sequence number of first packet of WPS handshake will be 0.
+// In this case, this packet will be dropped by recv_decache function if we use the 0x00 as the default value for tid_rxseq variable.
+// So, we initialize the tid_rxseq variable as the 0xffff.
+
+		for( i = 0; i < 16; i++ )
+		{
+                     _rtw_memcpy( &psta->sta_recvpriv.rxcache.tid_rxseq[ i ], &wRxSeqInitialValue, 2 );
+		}
+
+		RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_info_,("alloc number_%d stainfo  with hwaddr = %x %x %x %x %x %x  \n", 
+		pstapriv->asoc_sta_count , hwaddr[0], hwaddr[1], hwaddr[2],hwaddr[3],hwaddr[4],hwaddr[5]));
+
+		init_addba_retry_timer(pstapriv->padapter, psta);
+
+#ifdef CONFIG_TDLS
+		psta->padapter = pstapriv->padapter;
+		init_TPK_timer(pstapriv->padapter, psta);
+		_init_workitem(&psta->option_workitem, TDLS_option_workitem_callback, psta);
+		init_ch_switch_timer(pstapriv->padapter, psta);
+		init_base_ch_timer(pstapriv->padapter, psta);
+		_init_workitem(&psta->base_ch_workitem, base_channel_workitem_callback, psta);
+		init_off_ch_timer(pstapriv->padapter, psta);
+		_init_workitem(&psta->off_ch_workitem, off_channel_workitem_callback, psta);
+#endif
+
+		//for A-MPDU Rx reordering buffer control
+		for(i=0; i < 16 ; i++)
+		{
+			preorder_ctrl = &psta->recvreorder_ctrl[i];
+
+			preorder_ctrl->padapter = pstapriv->padapter;
+		
+			preorder_ctrl->enable = _FALSE;
+		
+			preorder_ctrl->indicate_seq = 0xffff;
+			#ifdef DBG_RX_SEQ
+			DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d\n", __FUNCTION__, __LINE__,
+				preorder_ctrl->indicate_seq);
+			#endif
+			preorder_ctrl->wend_b= 0xffff;       
+			//preorder_ctrl->wsize_b = (NR_RECVBUFF-2);
+			preorder_ctrl->wsize_b = 64;//64;
+
+			_rtw_init_queue(&preorder_ctrl->pending_recvframe_queue);
+
+			rtw_init_recv_timer(preorder_ctrl);
+		}
+
+
+		//init for DM
+		psta->rssi_stat.UndecoratedSmoothedPWDB = (-1);
+		psta->rssi_stat.UndecoratedSmoothedCCK = (-1);
+		
+	}
+	
+exit:
+	
+_func_exit_;	
+
+	return psta;
+
+
+}
+
+
+// using pstapriv->sta_hash_lock to protect
+u32	rtw_free_stainfo(_adapter *padapter , struct sta_info *psta)
+{	
+	int i;
+	_irqL irqL0;
+	_queue *pfree_sta_queue;
+	struct recv_reorder_ctrl *preorder_ctrl;
+	struct	sta_xmit_priv	*pstaxmitpriv;
+	struct	xmit_priv	*pxmitpriv= &padapter->xmitpriv;
+	struct	sta_priv *pstapriv = &padapter->stapriv;
+	
+
+_func_enter_;	
+	
+	if (psta == NULL)
+		goto exit;
+
+	pfree_sta_queue = &pstapriv->free_sta_queue;
+
+
+	pstaxmitpriv = &psta->sta_xmitpriv;
+	
+	//rtw_list_delete(&psta->sleep_list);
+	
+	//rtw_list_delete(&psta->wakeup_list);
+	
+	_enter_critical_bh(&pxmitpriv->lock, &irqL0);
+	
+	rtw_free_xmitframe_queue(pxmitpriv, &psta->sleep_q);
+	psta->sleepq_len = 0;
+	
+	//_enter_critical_bh(&(pxmitpriv->vo_pending.lock), &irqL0);
+
+	rtw_free_xmitframe_queue( pxmitpriv, &pstaxmitpriv->vo_q.sta_pending);
+
+	rtw_list_delete(&(pstaxmitpriv->vo_q.tx_pending));
+
+	//_exit_critical_bh(&(pxmitpriv->vo_pending.lock), &irqL0);
+	
+
+	//_enter_critical_bh(&(pxmitpriv->vi_pending.lock), &irqL0);
+
+	rtw_free_xmitframe_queue( pxmitpriv, &pstaxmitpriv->vi_q.sta_pending);
+
+	rtw_list_delete(&(pstaxmitpriv->vi_q.tx_pending));
+
+	//_exit_critical_bh(&(pxmitpriv->vi_pending.lock), &irqL0);
+
+
+	//_enter_critical_bh(&(pxmitpriv->bk_pending.lock), &irqL0);
+
+	rtw_free_xmitframe_queue( pxmitpriv, &pstaxmitpriv->bk_q.sta_pending);
+
+	rtw_list_delete(&(pstaxmitpriv->bk_q.tx_pending));
+
+	//_exit_critical_bh(&(pxmitpriv->bk_pending.lock), &irqL0);
+
+	//_enter_critical_bh(&(pxmitpriv->be_pending.lock), &irqL0);
+
+	rtw_free_xmitframe_queue( pxmitpriv, &pstaxmitpriv->be_q.sta_pending);
+
+	rtw_list_delete(&(pstaxmitpriv->be_q.tx_pending));
+
+	//_exit_critical_bh(&(pxmitpriv->be_pending.lock), &irqL0);
+	
+	_exit_critical_bh(&pxmitpriv->lock, &irqL0);
+	
+	rtw_list_delete(&psta->hash_list);
+	RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_err_,("\n free number_%d stainfo  with hwaddr = 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x  \n",pstapriv->asoc_sta_count , psta->hwaddr[0], psta->hwaddr[1], psta->hwaddr[2],psta->hwaddr[3],psta->hwaddr[4],psta->hwaddr[5]));
+	pstapriv->asoc_sta_count --;
+	
+	
+	// re-init sta_info; 20061114
+	_rtw_init_sta_xmit_priv(&psta->sta_xmitpriv);
+	_rtw_init_sta_recv_priv(&psta->sta_recvpriv);
+
+	_cancel_timer_ex(&psta->addba_retry_timer);
+
+#ifdef CONFIG_TDLS
+	_cancel_timer_ex(&psta->TPK_timer);
+	_cancel_timer_ex(&psta->option_timer);
+	_cancel_timer_ex(&psta->base_ch_timer);
+	_cancel_timer_ex(&psta->off_ch_timer);
+#endif
+
+	//for A-MPDU Rx reordering buffer control, cancel reordering_ctrl_timer
+	for(i=0; i < 16 ; i++)
+	{
+		_irqL irqL;
+		_list	*phead, *plist;
+		union recv_frame *prframe;
+		_queue *ppending_recvframe_queue;
+		_queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue;
+	
+		preorder_ctrl = &psta->recvreorder_ctrl[i];
+		
+		_cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer);		
+
+		
+		ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue;
+
+		_enter_critical_bh(&ppending_recvframe_queue->lock, &irqL);
+
+		phead = 	get_list_head(ppending_recvframe_queue);
+		plist = get_next(phead);
+		
+		while(!rtw_is_list_empty(phead))
+		{	
+			prframe = LIST_CONTAINOR(plist, union recv_frame, u);
+			
+			plist = get_next(plist);
+			
+			rtw_list_delete(&(prframe->u.hdr.list));
+
+			rtw_free_recvframe(prframe, pfree_recv_queue);
+		}
+
+		_exit_critical_bh(&ppending_recvframe_queue->lock, &irqL);
+		
+	}
+
+
+#ifdef CONFIG_AP_MODE
+
+	_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL0);
+	rtw_list_delete(&psta->asoc_list);	
+	_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL0);
+
+	_enter_critical_bh(&pstapriv->auth_list_lock, &irqL0);
+	rtw_list_delete(&psta->auth_list);
+	_exit_critical_bh(&pstapriv->auth_list_lock, &irqL0);
+	
+	psta->expire_to = 0;
+	
+	psta->sleepq_ac_len = 0;
+	psta->qos_info = 0;
+
+	psta->max_sp_len = 0;
+	psta->uapsd_bk = 0;
+	psta->uapsd_be = 0;
+	psta->uapsd_vi = 0;
+	psta->uapsd_vo = 0;
+
+	psta->has_legacy_ac = 0;
+
+#ifdef CONFIG_NATIVEAP_MLME
+	
+	pstapriv->sta_dz_bitmap &=~BIT(psta->aid);
+	pstapriv->tim_bitmap &=~BIT(psta->aid);	
+
+	rtw_indicate_sta_disassoc_event(padapter, psta);
+
+	if (pstapriv->sta_aid[psta->aid - 1] == psta)
+	{
+		pstapriv->sta_aid[psta->aid - 1] = NULL;
+		psta->aid = 0;
+	}	
+
+#endif	// CONFIG_NATIVEAP_MLME	
+
+#ifdef CONFIG_TX_MCAST2UNI
+	psta->under_exist_checking = 0;
+#endif	// CONFIG_TX_MCAST2UNI
+
+#endif	// CONFIG_AP_MODE	
+
+	_enter_critical_bh(&(pfree_sta_queue->lock), &irqL0);
+	rtw_list_insert_tail(&psta->list, get_list_head(pfree_sta_queue));
+	_exit_critical_bh(&(pfree_sta_queue->lock), &irqL0);
+
+exit:	
+	
+_func_exit_;	
+
+	return _SUCCESS;
+	
+}
+
+// free all stainfo which in sta_hash[all]
+void rtw_free_all_stainfo(_adapter *padapter)
+{
+	_irqL	 irqL;
+	_list	*plist, *phead;
+	s32	index;
+	struct sta_info *psta = NULL;
+	struct	sta_priv *pstapriv = &padapter->stapriv;
+	struct sta_info* pbcmc_stainfo =rtw_get_bcmc_stainfo( padapter);
+	
+_func_enter_;	
+
+	if(pstapriv->asoc_sta_count==1)
+		goto exit;
+
+	_enter_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+
+	for(index=0; index< NUM_STA; index++)
+	{
+		phead = &(pstapriv->sta_hash[index]);
+		plist = get_next(phead);
+		
+		while ((rtw_end_of_queue_search(phead, plist)) == _FALSE)
+		{
+			psta = LIST_CONTAINOR(plist, struct sta_info ,hash_list);
+
+			plist = get_next(plist);
+
+			if(pbcmc_stainfo!=psta)					
+				rtw_free_stainfo(padapter , psta);
+			
+		}
+	}
+	
+	_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+	
+exit:	
+	
+_func_exit_;	
+
+}
+
+/* any station allocated can be searched by hash list */
+struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, u8 *hwaddr)
+{
+
+	_irqL	 irqL;
+
+	_list	*plist, *phead;
+
+	struct sta_info *psta = NULL;
+	
+	u32	index;
+
+	u8 *addr;
+
+	u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff};
+
+_func_enter_;
+
+	if(hwaddr==NULL)
+		return NULL;
+		
+	if(IS_MCAST(hwaddr))
+	{
+		addr = bc_addr;
+	}
+	else
+	{
+		addr = hwaddr;
+	}
+
+	index = wifi_mac_hash(addr);
+
+	_enter_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+	
+	phead = &(pstapriv->sta_hash[index]);
+	plist = get_next(phead);
+
+
+	while ((rtw_end_of_queue_search(phead, plist)) == _FALSE)
+	{
+	
+		psta = LIST_CONTAINOR(plist, struct sta_info, hash_list);
+		
+		if ((_rtw_memcmp(psta->hwaddr, addr, ETH_ALEN))== _TRUE) 
+		{ // if found the matched address
+			break;
+		}
+		psta=NULL;
+		plist = get_next(plist);
+	}
+
+	_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+_func_exit_;	
+	return psta;
+	
+}
+
+u32 rtw_init_bcmc_stainfo(_adapter* padapter)
+{
+
+	struct sta_info 	*psta;
+	struct tx_servq	*ptxservq;
+	u32 res=_SUCCESS;
+	NDIS_802_11_MAC_ADDRESS	bcast_addr= {0xff,0xff,0xff,0xff,0xff,0xff};
+	
+	struct	sta_priv *pstapriv = &padapter->stapriv;
+	//_queue	*pstapending = &padapter->xmitpriv.bm_pending; 
+	
+_func_enter_;
+
+	psta = rtw_alloc_stainfo(pstapriv, bcast_addr);
+	
+	if(psta==NULL){
+		res=_FAIL;
+		RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_err_,("rtw_alloc_stainfo fail"));
+		goto exit;
+	}
+
+	// default broadcast & multicast use macid 1
+	psta->mac_id = 1;
+
+	ptxservq= &(psta->sta_xmitpriv.be_q);
+
+/*
+	_enter_critical(&pstapending->lock, &irqL0);
+
+	if (rtw_is_list_empty(&ptxservq->tx_pending))
+		rtw_list_insert_tail(&ptxservq->tx_pending, get_list_head(pstapending));
+
+	_exit_critical(&pstapending->lock, &irqL0);
+*/
+	
+exit:
+_func_exit_;		
+	return _SUCCESS;
+
+}
+
+
+struct sta_info* rtw_get_bcmc_stainfo(_adapter* padapter)
+{
+	struct sta_info 	*psta;
+	struct sta_priv 	*pstapriv = &padapter->stapriv;
+	u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff};
+_func_enter_;
+	 psta = rtw_get_stainfo(pstapriv, bc_addr);
+_func_exit_;		 
+	return psta;
+
+}
+
+u8 rtw_access_ctrl(struct wlan_acl_pool* pacl_list, u8 * mac_addr)
+{
+	return _TRUE;
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_wlan_util.c linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_wlan_util.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_wlan_util.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_wlan_util.c	2017-09-23 03:42:49.906675407 +0800
@@ -0,0 +1,1795 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#define _RTW_WLAN_UTIL_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <wifi.h>
+
+
+unsigned char ARTHEROS_OUI1[] = {0x00, 0x03, 0x7f};
+unsigned char ARTHEROS_OUI2[] = {0x00, 0x13, 0x74};
+
+unsigned char BROADCOM_OUI1[] = {0x00, 0x10, 0x18};
+unsigned char BROADCOM_OUI2[] = {0x00, 0x0a, 0xf7};
+unsigned char BROADCOM_OUI3[] = {0x00, 0x05, 0xb5};
+
+unsigned char CISCO_OUI[] = {0x00, 0x40, 0x96};
+unsigned char MARVELL_OUI[] = {0x00, 0x50, 0x43};
+unsigned char RALINK_OUI[] = {0x00, 0x0c, 0x43};
+unsigned char REALTEK_OUI[] = {0x00, 0xe0, 0x4c};
+unsigned char AIRGOCAP_OUI[] = {0x00, 0x0a, 0xf5};
+
+unsigned char REALTEK_96B_IE[] = {0x00, 0xe0, 0x4c, 0x02, 0x01, 0x20};
+
+extern unsigned char	MCS_rate_2R[16];
+extern unsigned char	MCS_rate_1R[16];
+extern unsigned char WPA_OUI[];
+extern unsigned char WPA_TKIP_CIPHER[4];
+extern unsigned char RSN_TKIP_CIPHER[4];
+
+#define R2T_PHY_DELAY	(0)
+
+//#define WAIT_FOR_BCN_TO_MIN	(3000)
+#define WAIT_FOR_BCN_TO_MIN	(6000)
+#define WAIT_FOR_BCN_TO_MAX	(20000)
+
+
+int cckrates_included(unsigned char *rate, int ratelen)
+{
+	int	i;
+	
+	for(i = 0; i < ratelen; i++)
+	{
+		if  (  (((rate[i]) & 0x7f) == 2)	|| (((rate[i]) & 0x7f) == 4) ||
+			   (((rate[i]) & 0x7f) == 11)  || (((rate[i]) & 0x7f) == 22) )
+		return _TRUE;	
+	}
+
+	return _FALSE;
+
+}
+
+int cckratesonly_included(unsigned char *rate, int ratelen)
+{
+	int	i;
+	
+	for(i = 0; i < ratelen; i++)
+	{
+		if  ( (((rate[i]) & 0x7f) != 2) && (((rate[i]) & 0x7f) != 4) &&
+			   (((rate[i]) & 0x7f) != 11)  && (((rate[i]) & 0x7f) != 22) )
+		return _FALSE;	
+	}
+	
+	return _TRUE;
+}
+
+unsigned char networktype_to_raid(unsigned char network_type)
+{
+	unsigned char raid;
+
+	switch(network_type)
+	{
+		case WIRELESS_11B:
+			raid = 6;
+			break;
+		case WIRELESS_11A:
+		case WIRELESS_11G:
+			raid = 5;
+			break;
+		case WIRELESS_11BG:
+			raid = 4;
+			break;
+		case WIRELESS_11_24N:
+		case WIRELESS_11_5N:
+			raid = 3;
+			break;
+		case WIRELESS_11A_5N:
+		case WIRELESS_11G_24N:
+			raid = 1;
+			break;
+		case WIRELESS_11BG_24N:
+			raid = 0;
+			break;
+		default:
+			raid = 4;
+			break;	
+
+	}
+
+	return raid;
+	
+}
+
+int judge_network_type(_adapter *padapter, unsigned char *rate, int ratelen)
+{
+	int network_type = 0;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	
+
+	if(pmlmeext->cur_channel > 14)
+	{
+		if (pmlmeinfo->HT_enable)
+		{
+			network_type = WIRELESS_11_5N;
+		}
+	
+		network_type |= WIRELESS_11A;
+	}
+	else
+	{
+		if (pmlmeinfo->HT_enable)
+		{
+			network_type = WIRELESS_11_24N;
+		}
+
+		if ((cckratesonly_included(rate, ratelen)) == _TRUE)
+		{
+			network_type |= WIRELESS_11B;
+		}
+		else if((cckrates_included(rate, ratelen)) == _TRUE)
+		{
+			network_type |= WIRELESS_11BG;
+		}
+		else
+		{
+			network_type |= WIRELESS_11G;
+		}
+	}
+		
+	return 	network_type;
+}
+
+unsigned char ratetbl_val_2wifirate(unsigned char rate)
+{
+	unsigned char val = 0;
+
+	switch (rate & 0x7f) 
+	{
+		case 0:
+			val = IEEE80211_CCK_RATE_1MB;
+			break;
+
+		case 1:
+			val = IEEE80211_CCK_RATE_2MB;
+			break;
+
+		case 2:
+			val = IEEE80211_CCK_RATE_5MB;
+			break;
+
+		case 3:
+			val = IEEE80211_CCK_RATE_11MB;
+			break;
+			
+		case 4:
+			val = IEEE80211_OFDM_RATE_6MB;
+			break;
+
+		case 5:
+			val = IEEE80211_OFDM_RATE_9MB;
+			break;
+
+		case 6:
+			val = IEEE80211_OFDM_RATE_12MB;
+			break;
+			
+		case 7:
+			val = IEEE80211_OFDM_RATE_18MB;
+			break;
+
+		case 8:
+			val = IEEE80211_OFDM_RATE_24MB;
+			break;
+			
+		case 9:
+			val = IEEE80211_OFDM_RATE_36MB;
+			break;
+
+		case 10:
+			val = IEEE80211_OFDM_RATE_48MB;
+			break;
+		
+		case 11:
+			val = IEEE80211_OFDM_RATE_54MB;
+			break;
+
+	}
+
+	return val;
+
+}
+
+int is_basicrate(_adapter *padapter, unsigned char rate)
+{
+	int i;
+	unsigned char val;
+	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+	
+	for(i = 0; i < NumRates; i++)
+	{
+		val = pmlmeext->basicrate[i];
+
+		if ((val != 0xff) && (val != 0xfe))
+		{
+			if (rate == ratetbl_val_2wifirate(val))
+			{
+				return _TRUE;
+			}
+		}
+	}
+	
+	return _FALSE;
+}
+
+
+unsigned int ratetbl2rateset(_adapter *padapter, unsigned char *rateset)
+{
+	int i;
+	unsigned char rate;
+	unsigned int	len = 0;
+	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+
+	for (i = 0; i < NumRates; i++)
+	{
+		rate = pmlmeext->datarate[i];
+
+		switch (rate)
+		{
+			case 0xff:
+				return len;
+				
+			case 0xfe:
+				continue;
+				
+			default:
+				rate = ratetbl_val_2wifirate(rate);
+
+				if (is_basicrate(padapter, rate) == _TRUE)
+				{
+					rate |= IEEE80211_BASIC_RATE_MASK;
+				}
+				
+				rateset[len] = rate;
+				len++;
+				break;
+		}
+	}
+	return len;
+}
+
+
+void get_rate_set(_adapter *padapter, unsigned char *pbssrate, int *bssrate_len)
+{
+	unsigned char supportedrates[NumRates];
+
+	_rtw_memset(supportedrates, 0, NumRates);
+	*bssrate_len = ratetbl2rateset(padapter, supportedrates);
+	_rtw_memcpy(pbssrate, supportedrates, *bssrate_len);
+}
+
+void Save_DM_Func_Flag(_adapter *padapter)
+{
+	u8	bSaveFlag = _TRUE;
+
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_DM_FUNC_OP, (u8 *)(&bSaveFlag));
+}
+
+void Restore_DM_Func_Flag(_adapter *padapter)
+{
+	u8	bSaveFlag = _FALSE;
+
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_DM_FUNC_OP, (u8 *)(&bSaveFlag));
+}
+
+void Switch_DM_Func(_adapter *padapter, u8 mode, u8 enable)
+{
+	if(enable == _TRUE)
+	{
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_DM_FUNC_SET, (u8 *)(&mode));
+	}
+	else
+	{
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_DM_FUNC_CLR, (u8 *)(&mode));
+	}
+
+#if 0
+	u8 val8;
+
+	val8 = rtw_read8(padapter, FW_DYNAMIC_FUN_SWITCH);
+
+	if(enable == _TRUE)
+	{
+		rtw_write8(padapter, FW_DYNAMIC_FUN_SWITCH, (val8 | mode));
+	}
+	else
+	{
+		rtw_write8(padapter, FW_DYNAMIC_FUN_SWITCH, (val8 & mode));
+	}
+#endif
+
+}
+
+void Set_NETYPE1_MSR(_adapter *padapter, u8 type)
+{
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MEDIA_STATUS1, (u8 *)(&type));
+}
+
+void Set_NETYPE0_MSR(_adapter *padapter, u8 type)
+{
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MEDIA_STATUS, (u8 *)(&type));
+}
+
+void SelectChannel(_adapter *padapter, unsigned char channel)
+{
+	unsigned int scanMode;
+	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+	
+	scanMode = (pmlmeext->sitesurvey_res.scan_mode == SCAN_ACTIVE)? 1: 0;//todo:
+
+	if(padapter->HalFunc.set_channel_handler)
+		padapter->HalFunc.set_channel_handler(padapter, channel);
+	
+}
+
+void SetBWMode(_adapter *padapter, unsigned short bwmode, unsigned char channel_offset)
+{
+	if(padapter->HalFunc.set_bwmode_handler)
+		padapter->HalFunc.set_bwmode_handler(padapter, (HT_CHANNEL_WIDTH)bwmode, channel_offset);
+}
+
+void set_channel_bwmode(_adapter *padapter, unsigned char channel, unsigned char channel_offset, unsigned short bwmode)
+{
+	if((bwmode == HT_CHANNEL_WIDTH_20)||(channel_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE))
+	{
+		SelectChannel(padapter, channel);
+	}
+	else		
+	{
+		//switch to the proper channel
+		if (channel_offset == HAL_PRIME_CHNL_OFFSET_LOWER)
+		{
+			SelectChannel(padapter, channel + 2);
+		}
+		else
+		{
+			SelectChannel(padapter, channel - 2);
+		}
+	}	
+
+	
+	SetBWMode(padapter, bwmode, channel_offset);
+	
+}
+
+int get_bsstype(unsigned short capability)
+{
+	if (capability & BIT(0))
+	{
+		return WIFI_FW_AP_STATE;
+	}
+	else if (capability & BIT(1))
+	{
+		return WIFI_FW_ADHOC_STATE;
+	}
+	else
+	{
+		return 0;		
+	}
+}
+
+__inline u8 *get_my_bssid(WLAN_BSSID_EX *pnetwork)
+{	
+	return (pnetwork->MacAddress); 
+}
+
+u16 get_beacon_interval(WLAN_BSSID_EX *bss)
+{
+	unsigned short val;
+	_rtw_memcpy((unsigned char *)&val, rtw_get_beacon_interval_from_ie(bss->IEs), 2);
+
+	return le16_to_cpu(val);	
+
+}
+
+int is_client_associated_to_ap(_adapter *padapter)
+{
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	
+	if ((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && ((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE))
+	{
+		return _TRUE;
+	}
+	else
+	{
+		return _FAIL;
+	}
+}
+
+int is_client_associated_to_ibss(_adapter *padapter)
+{
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	
+	if ((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE))
+	{
+		return _TRUE;
+	}
+	else
+	{
+		return _FAIL;
+	}
+}
+
+int is_IBSS_empty(_adapter *padapter)
+{
+	unsigned int i;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	
+	for (i = IBSS_START_MAC_ID; i < NUM_STA; i++)
+	{
+		if (pmlmeinfo->FW_sta_info[i].status == 1)
+		{
+			return _FAIL;
+		}
+	}
+	
+	return _TRUE;
+	
+}
+
+unsigned int decide_wait_for_beacon_timeout(unsigned int bcn_interval)
+{
+	if ((bcn_interval << 2) < WAIT_FOR_BCN_TO_MIN)
+	{
+		return WAIT_FOR_BCN_TO_MIN;
+	} 
+	else if ((bcn_interval << 2) > WAIT_FOR_BCN_TO_MAX)
+	{
+		return WAIT_FOR_BCN_TO_MAX;
+	}	
+	else
+	{
+		return ((bcn_interval << 2));
+	}
+}
+
+void CAM_empty_entry(
+	PADAPTER     	Adapter,	
+	u8 			ucIndex
+)
+{
+	Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_CAM_EMPTY_ENTRY, (u8 *)(&ucIndex));
+}
+
+void invalidate_cam_all(_adapter *padapter)
+{
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_CAM_INVALID_ALL, 0);
+}
+
+void write_cam(_adapter *padapter, u8 entry, u16 ctrl, u8 *mac, u8 *key)
+{
+	unsigned int	i, val, addr, cmd;
+	int j;
+	u32	cam_val[2];
+
+	addr = entry << 3;
+
+	for (j = 5; j >= 0; j--)
+	{	
+		switch (j)
+		{
+			case 0:
+				val = (ctrl | (mac[0] << 16) | (mac[1] << 24) );
+				break;
+				
+			case 1:
+				val = (mac[2] | ( mac[3] << 8) | (mac[4] << 16) | (mac[5] << 24));
+				break;
+			
+			default:
+				i = (j - 2) << 2;
+				val = (key[i] | (key[i+1] << 8) | (key[i+2] << 16) | (key[i+3] << 24));
+				break;
+				
+		}
+
+		cam_val[0] = val;
+		cam_val[1] = addr + (unsigned int)j;
+
+		padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_CAM_WRITE, (u8 *)cam_val);
+		
+		//rtw_write32(padapter, WCAMI, val);
+		
+		//cmd = CAM_POLLINIG | CAM_WRITE | (addr + j);
+		//rtw_write32(padapter, RWCAM, cmd);
+		
+		//DBG_8192C("%s=> cam write: %x, %x\n",__FUNCTION__, cmd, val);
+		
+	}
+
+}
+
+void clear_cam_entry(_adapter *padapter, u8 entry)
+{	
+#if 0
+	u32	addr, val=0;
+	u32	cam_val[2];
+
+	addr = entry << 3;
+	
+
+	cam_val[0] = val;
+	cam_val[1] = addr + (unsigned int)0;
+
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_CAM_WRITE, (u8 *)cam_val);
+
+
+
+	cam_val[0] = val;
+	cam_val[1] = addr + (unsigned int)1;
+
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_CAM_WRITE, (u8 *)cam_val);
+#else
+
+	unsigned char null_sta[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+
+	unsigned char null_key[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,0x00, 0x00, 0x00, 0x00,0x00, 0x00, 0x00, 0x00};
+
+	write_cam(padapter, entry, 0, null_sta, null_key);
+
+#endif
+}
+
+int allocate_fw_sta_entry(_adapter *padapter)
+{
+	unsigned int mac_id;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	
+	for (mac_id = IBSS_START_MAC_ID; mac_id < NUM_STA; mac_id++)
+	{
+		if (pmlmeinfo->FW_sta_info[mac_id].status == 0)
+		{
+			pmlmeinfo->FW_sta_info[mac_id].status = 1;
+			pmlmeinfo->FW_sta_info[mac_id].retry = 0;
+			break;
+		}
+	}
+	
+	return mac_id;
+}
+
+void flush_all_cam_entry(_adapter *padapter)
+{
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+#if 0
+	unsigned char null_sta[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+	unsigned char null_key[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,0x00, 0x00, 0x00, 0x00,0x00, 0x00, 0x00, 0x00};
+
+	for (i = 0; i < NUM_STA; i++)
+	{
+		write_cam(padapter, i, 0, null_sta, null_key);
+	}
+#else
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_CAM_INVALID_ALL, 0);
+#endif
+	_rtw_memset((u8 *)(pmlmeinfo->FW_sta_info), 0, sizeof(pmlmeinfo->FW_sta_info));
+}
+
+int WMM_param_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs	pIE)
+{
+	struct registry_priv	*pregpriv = &padapter->registrypriv;
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);	
+	
+	if(pmlmepriv->qospriv.qos_option==0)
+	{
+		pmlmeinfo->WMM_enable = 0;
+		return _FAIL;
+	}	
+
+	pmlmeinfo->WMM_enable = 1;
+	_rtw_memcpy(&(pmlmeinfo->WMM_param), (pIE->data + 6), sizeof(struct WMM_para_element));
+	return _TRUE;
+
+	/*if (pregpriv->wifi_spec == 1)
+	{
+		if (pmlmeinfo->WMM_enable == 1)
+		{
+			//todo: compare the parameter set count & decide wheher to update or not
+			return _FAIL;
+		}
+		else
+		{
+			pmlmeinfo->WMM_enable = 1;
+			_rtw_rtw_memcpy(&(pmlmeinfo->WMM_param), (pIE->data + 6), sizeof(struct WMM_para_element));
+			return _TRUE;
+		}
+	}
+	else
+	{
+		pmlmeinfo->WMM_enable = 0;
+		return _FAIL;
+	}*/
+	
+}
+
+void WMMOnAssocRsp(_adapter *padapter)
+{
+	u8	ACI, ACM, AIFS, ECWMin, ECWMax, aSifsTime;
+	u8	acm_ctrl;
+	u16	TXOP;
+	u32	acParm, i;
+	struct registry_priv	*pregpriv = &padapter->registrypriv;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	
+	if (pmlmeinfo->WMM_enable == 0)
+		return;
+
+	acm_ctrl = 0;
+
+	if( pmlmeext->cur_wireless_mode == WIRELESS_11B)
+		aSifsTime = 10;
+	else
+		aSifsTime = 16;
+
+	for (i = 0; i < 4; i++)  
+	{
+		ACI = (pmlmeinfo->WMM_param.ac_param[i].ACI_AIFSN >> 5) & 0x03;
+		ACM = (pmlmeinfo->WMM_param.ac_param[i].ACI_AIFSN >> 4) & 0x01;
+
+		//AIFS = AIFSN * slot time + SIFS - r2t phy delay
+		AIFS = (pmlmeinfo->WMM_param.ac_param[i].ACI_AIFSN & 0x0f) * pmlmeinfo->slotTime + aSifsTime;
+		
+		ECWMin = (pmlmeinfo->WMM_param.ac_param[i].CW & 0x0f);
+		ECWMax = (pmlmeinfo->WMM_param.ac_param[i].CW & 0xf0) >> 4;
+		TXOP = le16_to_cpu(pmlmeinfo->WMM_param.ac_param[i].TXOP_limit);
+		
+		acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16);
+
+		switch (ACI)
+		{
+			case 0x0:
+				padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acParm));
+				acm_ctrl |= (ACM? BIT(1):0);
+				break;
+								
+			case 0x1:
+				padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acParm));
+				acm_ctrl |= (ACM? BIT(0):0);
+				break;
+								
+			case 0x2:
+				padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acParm));
+				acm_ctrl |= (ACM? BIT(2):0);
+				break;
+								
+			case 0x3:
+				padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acParm));
+				acm_ctrl |= (ACM? BIT(3):0);
+				break;							
+		}
+		
+		DBG_871X("WMM(%x): %x, %x\n", ACI, ACM, acParm);
+	}
+
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_ACM_CTRL, (u8 *)(&acm_ctrl));
+
+	return;	
+}
+
+static void bwmode_update_check(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
+{
+	unsigned char	 new_bwmode;
+	unsigned char  new_ch_offset;
+	struct HT_info_element	 *pHT_info;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	
+
+	if(!pIE)
+		return;
+
+	pHT_info = (struct HT_info_element *)pIE->data;
+
+	if(pHT_info->infos[0] & BIT(2))
+	{
+		new_bwmode = HT_CHANNEL_WIDTH_40;
+		switch (pHT_info->infos[0] & 0x3)
+		{
+			case 1:
+				new_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER;
+				break;
+			
+			case 3:
+				new_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER;
+				break;
+				
+			default:
+				new_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+				break;
+		}
+	}
+	else
+	{
+		new_bwmode = HT_CHANNEL_WIDTH_20;
+		new_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+	}	
+
+	
+	if((new_bwmode!= pmlmeext->cur_bwmode) || (new_ch_offset!=pmlmeext->cur_ch_offset))
+	{
+		pmlmeinfo->bwmode_updated = _TRUE;
+		
+		pmlmeext->cur_bwmode = new_bwmode;
+		pmlmeext->cur_ch_offset = new_ch_offset;
+	}
+	else
+	{
+		pmlmeinfo->bwmode_updated = _FALSE;
+	}
+		
+
+	if(_TRUE == pmlmeinfo->bwmode_updated)
+	{
+		struct sta_info *psta;
+		WLAN_BSSID_EX 	*cur_network = &(pmlmeinfo->network);
+		struct sta_priv	*pstapriv = &padapter->stapriv;
+	
+		//set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
+
+		
+		//update ap's stainfo
+		psta = rtw_get_stainfo(pstapriv, cur_network->MacAddress);
+		if(psta)
+		{
+			struct ht_priv	*phtpriv_sta = &psta->htpriv;
+			
+			if(phtpriv_sta->ht_option)
+			{				
+				// bwmode				
+				phtpriv_sta->bwmode = pmlmeext->cur_bwmode;
+				phtpriv_sta->ch_offset = pmlmeext->cur_ch_offset;		
+			}
+			else
+			{
+				phtpriv_sta->bwmode = HT_CHANNEL_WIDTH_20;
+				phtpriv_sta->ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+			}
+			
+		}
+
+		//pmlmeinfo->bwmode_updated = _FALSE;//bwmode_updated done, reset it!
+		
+	}	
+
+}
+
+void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
+{
+	unsigned int	i;
+	u8	rf_type;
+	u8	max_AMPDU_len, min_MPDU_spacing;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct mlme_priv 		*pmlmepriv = &padapter->mlmepriv;	
+	struct ht_priv			*phtpriv = &pmlmepriv->htpriv;
+
+	if(pIE==NULL) return;
+	
+	if(phtpriv->ht_option == _FALSE)	return;
+
+	pmlmeinfo->HT_caps_enable = 1;
+	
+	for (i = 0; i < (pIE->Length); i++)
+	{
+		if (i != 2)
+		{
+			//	Commented by Albert 2010/07/12
+			//	Got the endian issue here.
+			pmlmeinfo->HT_caps.HT_cap[i] &= (pIE->data[i]);
+		}
+		else
+		{
+			//modify from  fw by Thomas 2010/11/17
+			if ((pmlmeinfo->HT_caps.HT_cap_element.AMPDU_para & 0x3) > (pIE->data[i] & 0x3))
+			{
+				max_AMPDU_len = (pIE->data[i] & 0x3);
+			}
+			else
+			{
+				max_AMPDU_len = (pmlmeinfo->HT_caps.HT_cap_element.AMPDU_para & 0x3);
+			}
+			
+			if ((pmlmeinfo->HT_caps.HT_cap_element.AMPDU_para & 0x1c) > (pIE->data[i] & 0x1c))
+			{
+				min_MPDU_spacing = (pmlmeinfo->HT_caps.HT_cap_element.AMPDU_para & 0x1c);
+			}
+			else
+			{
+				min_MPDU_spacing = (pIE->data[i] & 0x1c);
+			}
+
+			pmlmeinfo->HT_caps.HT_cap_element.AMPDU_para = max_AMPDU_len | min_MPDU_spacing;
+		}
+	}
+
+	//	Commented by Albert 2010/07/12
+	//	Have to handle the endian issue after copying.
+	//	HT_ext_caps didn't be used yet.	
+	pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info = le16_to_cpu( pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info );
+	pmlmeinfo->HT_caps.HT_cap_element.HT_ext_caps = le16_to_cpu( pmlmeinfo->HT_caps.HT_cap_element.HT_ext_caps );
+
+	padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
+
+	//update the MCS rates
+	for (i = 0; i < 16; i++)
+	{
+		if((rf_type == RF_1T1R) || (rf_type == RF_1T2R))
+		{
+			pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i];
+		}
+		else
+		{
+			pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_2R[i];
+		}
+	        #ifdef RTL8192C_RECONFIG_TO_1T1R
+		{
+			pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i];
+		}
+		#endif
+	}
+	
+	return;
+}
+
+void HT_info_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
+{
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct mlme_priv 		*pmlmepriv = &padapter->mlmepriv;	
+	struct ht_priv			*phtpriv = &pmlmepriv->htpriv;
+
+	if(pIE==NULL) return;
+
+	if(phtpriv->ht_option == _FALSE)	return;
+
+
+	if(pIE->Length > sizeof(struct HT_info_element))
+		return;
+	
+	pmlmeinfo->HT_info_enable = 1;
+	_rtw_memcpy(&(pmlmeinfo->HT_info), pIE->data, pIE->Length);
+	
+	return;
+}
+
+void HTOnAssocRsp(_adapter *padapter)
+{
+	unsigned char		max_AMPDU_len;
+	unsigned char		min_MPDU_spacing;
+	//struct registry_priv	 *pregpriv = &padapter->registrypriv;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	//WLAN_BSSID_EX 		*cur_network = &(pmlmeinfo->network);
+	
+	DBG_871X("%s\n", __FUNCTION__);
+
+	if ((pmlmeinfo->HT_info_enable) && (pmlmeinfo->HT_caps_enable))
+	{
+		pmlmeinfo->HT_enable = 1;
+	}
+	else
+	{
+		pmlmeinfo->HT_enable = 0;
+		//set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
+		return;
+	}
+	
+	//handle A-MPDU parameter field
+	/* 	
+		AMPDU_para [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k
+		AMPDU_para [4:2]:Min MPDU Start Spacing	
+	*/
+	max_AMPDU_len = pmlmeinfo->HT_caps.HT_cap_element.AMPDU_para & 0x03;	
+	
+	min_MPDU_spacing = (pmlmeinfo->HT_caps.HT_cap_element.AMPDU_para & 0x1c) >> 2;	
+
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AMPDU_MIN_SPACE, (u8 *)(&min_MPDU_spacing));
+
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&max_AMPDU_len));
+
+#if 0 //move to rtw_update_ht_cap()
+	if ((pregpriv->cbw40_enable) &&
+		(pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info & BIT(1)) && 
+		(pmlmeinfo->HT_info.infos[0] & BIT(2)))
+	{
+		//switch to the 40M Hz mode accoring to the AP
+		pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_40;
+		switch ((pmlmeinfo->HT_info.infos[0] & 0x3))
+		{
+			case HT_EXTCHNL_OFFSET_UPPER:
+				pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER;
+				break;
+			
+			case HT_EXTCHNL_OFFSET_LOWER:
+				pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER;
+				break;
+				
+			default:
+				pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+				break;
+		}
+		
+		//SelectChannel(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset);
+	}
+#endif
+
+	//set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
+
+#if 0 //move to rtw_update_ht_cap()
+	//
+	// Config SM Power Save setting
+	//
+	pmlmeinfo->SM_PS = (pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info & 0x0C) >> 2;
+	if(pmlmeinfo->SM_PS == WLAN_HT_CAP_SM_PS_STATIC)
+	{
+		/*u8 i;
+		//update the MCS rates
+		for (i = 0; i < 16; i++)
+		{
+			pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i];
+		}*/
+		DBG_8192C("%s(): WLAN_HT_CAP_SM_PS_STATIC\n",__FUNCTION__);
+	}
+
+	//
+	// Config current HT Protection mode.
+	//
+	pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3;
+#endif
+	
+}
+
+void ERP_IE_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
+{
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	if(pIE->Length>1)
+		return;
+	
+	pmlmeinfo->ERP_enable = 1;
+	_rtw_memcpy(&(pmlmeinfo->ERP_IE), pIE->data, pIE->Length);
+}
+
+void VCS_update(_adapter *padapter, struct sta_info *psta)
+{
+	struct registry_priv	 *pregpriv = &padapter->registrypriv;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	switch (pregpriv->vrtl_carrier_sense)/* 0:off 1:on 2:auto */
+	{
+		case 0: //off
+			psta->rtsen = 0;
+			psta->cts2self = 0;
+			break;
+			
+		case 1: //on
+			if (pregpriv->vcs_type == 1) /* 1:RTS/CTS 2:CTS to self */
+			{
+				psta->rtsen = 1;
+				psta->cts2self = 0;
+			}
+			else
+			{
+				psta->rtsen = 0;
+				psta->cts2self = 1;
+			}
+			break;
+			
+		case 2: //auto
+		default:
+			if ((pmlmeinfo->ERP_enable) && (pmlmeinfo->ERP_IE & BIT(1)))
+			{
+				if (pregpriv->vcs_type == 1)
+				{
+					psta->rtsen = 1;
+					psta->cts2self = 0;
+				}
+				else
+				{
+					psta->rtsen = 0;
+					psta->cts2self = 1;
+				}
+			}
+			else
+			{
+				psta->rtsen = 0;
+				psta->cts2self = 0;
+			}	
+			break;
+	}
+}
+
+void update_beacon_info(_adapter *padapter, u8 *pframe, uint pkt_len, struct sta_info *psta)
+{
+	unsigned int i;
+	unsigned int len;
+	PNDIS_802_11_VARIABLE_IEs	pIE;
+		
+	len = pkt_len - (_BEACON_IE_OFFSET_ + WLAN_HDR_A3_LEN);
+
+	for (i = 0; i < len;)
+	{
+		pIE = (PNDIS_802_11_VARIABLE_IEs)(pframe + (_BEACON_IE_OFFSET_ + WLAN_HDR_A3_LEN) + i);
+		
+		switch (pIE->ElementID)
+		{
+#if 0			
+			case _VENDOR_SPECIFIC_IE_:		
+				//todo: to update WMM paramter set while receiving beacon			
+				if (_rtw_memcmp(pIE->data, WMM_PARA_OUI, 6))	//WMM
+				{
+					(WMM_param_handler(padapter, pIE))? WMMOnAssocRsp(padapter): 0;
+				}				
+				break;
+#endif
+
+			case _HT_EXTRA_INFO_IE_:	//HT info				
+				//HT_info_handler(padapter, pIE);
+				bwmode_update_check(padapter, pIE);
+				break;
+
+			case _ERPINFO_IE_:
+				ERP_IE_handler(padapter, pIE);
+				VCS_update(padapter, psta);
+				break;
+				
+			default:
+				break;
+		}
+		
+		i += (pIE->Length + 2);
+	}
+}
+
+#ifdef CONFIG_DFS
+void process_csa_ie(_adapter *padapter, u8 *pframe, uint pkt_len)
+{
+	unsigned int i;
+	unsigned int len;
+	PNDIS_802_11_VARIABLE_IEs	pIE;
+	u8 new_ch_no = 0; 
+		
+	len = pkt_len - (_BEACON_IE_OFFSET_ + WLAN_HDR_A3_LEN);
+
+	for (i = 0; i < len;)
+	{
+		pIE = (PNDIS_802_11_VARIABLE_IEs)(pframe + (_BEACON_IE_OFFSET_ + WLAN_HDR_A3_LEN) + i);
+		
+		switch (pIE->ElementID)
+		{
+			case _CH_SWTICH_ANNOUNCE_:
+				_rtw_memcpy(&new_ch_no, pIE->data+1, 1);
+				rtw_set_csa_cmd(padapter, new_ch_no);
+				break;
+
+			default:
+				break;
+		}
+		
+		i += (pIE->Length + 2);
+	}
+}
+#endif //CONFIG_DFS
+
+unsigned int is_ap_in_tkip(_adapter *padapter)
+{
+	u32 i;
+	PNDIS_802_11_VARIABLE_IEs	pIE;
+	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX 		*cur_network = &(pmlmeinfo->network);
+
+	if (rtw_get_capability((WLAN_BSSID_EX *)cur_network) & WLAN_CAPABILITY_PRIVACY)
+	{
+		for (i = sizeof(NDIS_802_11_FIXED_IEs); i < pmlmeinfo->network.IELength;)
+		{
+			pIE = (PNDIS_802_11_VARIABLE_IEs)(pmlmeinfo->network.IEs + i);
+		
+			switch (pIE->ElementID)
+			{
+				case _VENDOR_SPECIFIC_IE_:
+					if ((_rtw_memcmp(pIE->data, WPA_OUI, 4)) && (_rtw_memcmp((pIE->data + 12), WPA_TKIP_CIPHER, 4))) 
+					{
+						return _TRUE;
+					}
+					break;
+				
+				case _RSN_IE_2_:
+					if (_rtw_memcmp((pIE->data + 8), RSN_TKIP_CIPHER, 4)) 
+					{
+						return _TRUE;
+					}
+					
+				default:
+					break;
+			}
+		
+			i += (pIE->Length + 2);
+		}
+		
+		return _FALSE;
+	}
+	else
+	{
+		return _FALSE;
+	}
+	
+}
+
+int wifirate2_ratetbl_inx(unsigned char rate)
+{
+	int	inx = 0;
+	rate = rate & 0x7f;
+
+	switch (rate) 
+	{
+		case 54*2:
+			inx = 11;
+			break;
+
+		case 48*2:
+			inx = 10;
+			break;
+
+		case 36*2:
+			inx = 9;
+			break;
+
+		case 24*2:
+			inx = 8;
+			break;
+			
+		case 18*2:
+			inx = 7;
+			break;
+
+		case 12*2:
+			inx = 6;
+			break;
+
+		case 9*2:
+			inx = 5;
+			break;
+			
+		case 6*2:
+			inx = 4;
+			break;
+
+		case 11*2:
+			inx = 3;
+			break;
+		case 11:
+			inx = 2;
+			break;
+
+		case 2*2:
+			inx = 1;
+			break;
+		
+		case 1*2:
+			inx = 0;
+			break;
+
+	}
+	return inx;	
+}
+
+unsigned int update_basic_rate(unsigned char *ptn, unsigned int ptn_sz)
+{
+	unsigned int i, num_of_rate;
+	unsigned int mask = 0;
+	
+	num_of_rate = (ptn_sz > NumRates)? NumRates: ptn_sz;
+		
+	for (i = 0; i < num_of_rate; i++)
+	{
+		if ((*(ptn + i)) & 0x80)
+		{
+			mask |= 0x1 << wifirate2_ratetbl_inx(*(ptn + i));
+		}
+	}
+	return mask;
+}
+
+unsigned int update_supported_rate(unsigned char *ptn, unsigned int ptn_sz)
+{
+	unsigned int i, num_of_rate;
+	unsigned int mask = 0;
+	
+	num_of_rate = (ptn_sz > NumRates)? NumRates: ptn_sz;
+		
+	for (i = 0; i < num_of_rate; i++)
+	{
+		mask |= 0x1 << wifirate2_ratetbl_inx(*(ptn + i));
+	}
+
+	return mask;
+}
+
+unsigned int update_MSC_rate(struct HT_caps_element *pHT_caps)
+{
+	unsigned int mask = 0;
+	
+	mask = ((pHT_caps->HT_cap_element.MCS_rate[0] << 12) | (pHT_caps->HT_cap_element.MCS_rate[1] << 20));
+						
+	return mask;
+}
+
+int support_short_GI(_adapter *padapter, struct HT_caps_element *pHT_caps)
+{
+	unsigned char					bit_offset;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	
+	if (!(pmlmeinfo->HT_enable))
+		return _FAIL;
+	
+	if ((pmlmeinfo->assoc_AP_vendor == ralinkAP))
+		return _FAIL;
+		
+	bit_offset = (pmlmeext->cur_bwmode & HT_CHANNEL_WIDTH_40)? 6: 5;
+	
+	if (pHT_caps->HT_cap_element.HT_caps_info & (0x1 << bit_offset))
+	{
+		return _SUCCESS;
+	}
+	else
+	{
+		return _FAIL;
+	}		
+}
+
+unsigned char get_highest_rate_idx(u32 mask)
+{
+	int i;
+	unsigned char rate_idx=0;
+
+	for(i=27; i>=0; i--)
+	{
+		if(mask & BIT(i))
+		{
+			rate_idx = i;
+			break;
+		}
+	}
+
+	return rate_idx;
+}
+
+unsigned char get_highest_mcs_rate(struct HT_caps_element *pHT_caps)
+{
+	int i, mcs_rate;
+	
+	mcs_rate = (pHT_caps->HT_cap_element.MCS_rate[0] | (pHT_caps->HT_cap_element.MCS_rate[1] << 8));
+	
+	for (i = 15; i >= 0; i--)
+	{
+		if (mcs_rate & (0x1 << i))
+		{
+			break;
+		}
+	}
+	
+	return i;
+}
+
+void Update_RA_Entry(_adapter *padapter, u32 mac_id)
+{
+	padapter->HalFunc.UpdateRAMaskHandler(padapter, mac_id);
+}
+
+void enable_rate_adaptive(_adapter *padapter, u32 mac_id)
+{
+	Update_RA_Entry(padapter, mac_id);
+}
+
+void set_sta_rate(_adapter *padapter, struct sta_info *psta)
+{
+	//rate adaptive	
+	enable_rate_adaptive(padapter, psta->mac_id);
+}
+
+unsigned char check_assoc_AP(u8 *pframe, uint len)
+{
+	unsigned int	i;
+	PNDIS_802_11_VARIABLE_IEs	pIE;
+
+	for (i = sizeof(NDIS_802_11_FIXED_IEs); i < len;)
+	{
+		pIE = (PNDIS_802_11_VARIABLE_IEs)(pframe + i);
+		
+		switch (pIE->ElementID)
+		{
+			case _VENDOR_SPECIFIC_IE_:
+				if ((_rtw_memcmp(pIE->data, ARTHEROS_OUI1, 3)) || (_rtw_memcmp(pIE->data, ARTHEROS_OUI2, 3)))
+				{
+					DBG_871X("link to Artheros AP\n");
+					return atherosAP;
+				}
+				else if ((_rtw_memcmp(pIE->data, BROADCOM_OUI1, 3))
+							|| (_rtw_memcmp(pIE->data, BROADCOM_OUI2, 3))
+							|| (_rtw_memcmp(pIE->data, BROADCOM_OUI2, 3)))
+				{
+					DBG_871X("link to Broadcom AP\n");
+					return broadcomAP;
+				}
+				else if (_rtw_memcmp(pIE->data, MARVELL_OUI, 3))
+				{
+					DBG_871X("link to Marvell AP\n");
+					return marvellAP;
+				}
+				else if (_rtw_memcmp(pIE->data, RALINK_OUI, 3))
+				{
+					DBG_871X("link to Ralink AP\n");
+					return ralinkAP;
+				}
+				else if (_rtw_memcmp(pIE->data, CISCO_OUI, 3))
+				{
+					DBG_871X("link to Cisco AP\n");
+					return ciscoAP;
+				}
+				else if (_rtw_memcmp(pIE->data, REALTEK_OUI, 3))
+				{
+					DBG_871X("link to Realtek 96B\n");
+					return realtekAP;
+				}
+				else if (_rtw_memcmp(pIE->data, AIRGOCAP_OUI,3))
+				{
+					DBG_871X("link to Airgo Cap\n");
+					return airgocapAP;
+				}
+				else
+				{
+					break;
+				}
+						
+			default:
+				break;
+		}
+				
+		i += (pIE->Length + 2);
+	}
+	
+	DBG_871X("link to new AP\n");
+	return unknownAP;
+}
+
+void update_IOT_info(_adapter *padapter)
+{
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	
+	switch (pmlmeinfo->assoc_AP_vendor)
+	{
+		case marvellAP:
+			pmlmeinfo->turboMode_cts2self = 1;
+			pmlmeinfo->turboMode_rtsen = 0;
+			break;
+		
+		case ralinkAP:
+			pmlmeinfo->turboMode_cts2self = 0;
+			pmlmeinfo->turboMode_rtsen = 1;
+			//disable high power			
+			Switch_DM_Func(padapter, (~DYNAMIC_FUNC_HP), _FALSE);
+			break;
+		case realtekAP:
+			//rtw_write16(padapter, 0x4cc, 0xffff);
+			//rtw_write16(padapter, 0x546, 0x01c0);
+			//disable high power			
+			Switch_DM_Func(padapter, (~DYNAMIC_FUNC_HP), _FALSE);
+			break;
+		default:
+			pmlmeinfo->turboMode_cts2self = 0;
+			pmlmeinfo->turboMode_rtsen = 1;
+			break;	
+	}
+	
+}
+
+void update_capinfo(PADAPTER Adapter, u16 updateCap)
+{
+	struct mlme_ext_priv	*pmlmeext = &Adapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	BOOLEAN		ShortPreamble;
+
+	// Check preamble mode, 2005.01.06, by rcnjko.
+	// Mark to update preamble value forever, 2008.03.18 by lanhsin
+	//if( pMgntInfo->RegPreambleMode == PREAMBLE_AUTO )
+	{
+			
+		if(updateCap & cShortPreamble)
+		{ // Short Preamble
+			if(pmlmeinfo->preamble_mode != PREAMBLE_SHORT) // PREAMBLE_LONG or PREAMBLE_AUTO
+			{
+				ShortPreamble = _TRUE;
+				pmlmeinfo->preamble_mode = PREAMBLE_SHORT;
+				Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_ACK_PREAMBLE, (u8 *)&ShortPreamble );
+			}
+		}
+		else
+		{ // Long Preamble
+			if(pmlmeinfo->preamble_mode != PREAMBLE_LONG)  // PREAMBLE_SHORT or PREAMBLE_AUTO
+			{
+				ShortPreamble = _FALSE;
+				pmlmeinfo->preamble_mode = PREAMBLE_LONG;
+				Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_ACK_PREAMBLE, (u8 *)&ShortPreamble );
+			}
+		}
+	}
+
+	if ( updateCap & cIBSS ) {
+		//Filen: See 802.11-2007 p.91
+		pmlmeinfo->slotTime = NON_SHORT_SLOT_TIME;
+	}
+	else
+	{
+		//Filen: See 802.11-2007 p.90
+		if( pmlmeext->cur_wireless_mode & (WIRELESS_11G | WIRELESS_11_24N))
+		{
+			if( (updateCap & cShortSlotTime) /* && (!(pMgntInfo->pHTInfo->RT2RT_HT_Mode & RT_HT_CAP_USE_LONG_PREAMBLE)) */)
+			{ // Short Slot Time
+				if(pmlmeinfo->slotTime != SHORT_SLOT_TIME)
+				{
+					pmlmeinfo->slotTime = SHORT_SLOT_TIME;
+				}
+			}
+			else
+			{ // Long Slot Time
+				if(pmlmeinfo->slotTime != NON_SHORT_SLOT_TIME)
+				{
+					pmlmeinfo->slotTime = NON_SHORT_SLOT_TIME;
+				}
+			}
+		}
+		else if( pmlmeext->cur_wireless_mode & (WIRELESS_11A | WIRELESS_11_5N))
+		{
+			pmlmeinfo->slotTime = SHORT_SLOT_TIME;
+		}
+		else
+		{
+			//B Mode
+			pmlmeinfo->slotTime = NON_SHORT_SLOT_TIME;
+		}
+ 	}
+ 
+	Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_SLOT_TIME, &pmlmeinfo->slotTime );
+
+}
+
+void update_wireless_mode(_adapter *padapter)
+{
+	int ratelen, network_type = 0;
+	u16 SIFS_Timer;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX 		*cur_network = &(pmlmeinfo->network);
+	unsigned char			*rate = cur_network->SupportedRates;
+
+	ratelen = rtw_get_rateset_len(cur_network->SupportedRates);
+
+	if ((pmlmeinfo->HT_info_enable) && (pmlmeinfo->HT_caps_enable))
+	{
+		pmlmeinfo->HT_enable = 1;
+	}
+
+	if(pmlmeext->cur_channel > 14)
+	{
+		if (pmlmeinfo->HT_enable)
+		{
+			network_type = WIRELESS_11_5N;
+		}
+
+		network_type |= WIRELESS_11A;
+	}
+	else
+	{
+		if (pmlmeinfo->HT_enable)
+		{
+			network_type = WIRELESS_11_24N;
+		}
+	
+		if ((cckratesonly_included(rate, ratelen)) == _TRUE)
+		{
+			network_type |= WIRELESS_11B;
+		}
+		else if((cckrates_included(rate, ratelen)) == _TRUE)
+		{
+			network_type |= WIRELESS_11BG;
+		}
+		else
+		{
+			network_type |= WIRELESS_11G;
+		}
+	}
+
+	pmlmeext->cur_wireless_mode = network_type & padapter->registrypriv.wireless_mode;
+	if((pmlmeext->cur_wireless_mode==WIRELESS_11G) ||
+		(pmlmeext->cur_wireless_mode==WIRELESS_11BG))//WIRELESS_MODE_G)
+		SIFS_Timer = 0x0a0a;
+	else
+		SIFS_Timer = 0x0e0e;//pHalData->SifsTime;
+	padapter->HalFunc.SetHwRegHandler( padapter, HW_VAR_SIFS,  (u8 *)&SIFS_Timer);
+	
+}
+
+
+void fire_write_MAC_cmd(_adapter *padapter, unsigned int addr, unsigned int value)
+{
+#if 0
+	struct cmd_obj					*ph2c;
+	struct reg_rw_parm			*pwriteMacPara;
+	struct cmd_priv					*pcmdpriv = &(padapter->cmdpriv);
+
+	if ((ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL)
+	{
+		return;
+	}	
+
+	if ((pwriteMacPara = (struct reg_rw_parm*)rtw_malloc(sizeof(struct reg_rw_parm))) == NULL) 
+	{		
+		rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj));
+		return;
+	}
+	
+	pwriteMacPara->rw = 1;
+	pwriteMacPara->addr = addr;
+	pwriteMacPara->value = value;
+	
+	init_h2fwcmd_w_parm_no_rsp(ph2c, pwriteMacPara, GEN_CMD_CODE(_Write_MACREG));
+	rtw_enqueue_cmd(pcmdpriv, ph2c);
+#endif	
+}
+
+u8 bmc_support_rate_ofdm[4] = 
+	{IEEE80211_OFDM_RATE_6MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_OFDM_RATE_12MB|IEEE80211_BASIC_RATE_MASK,
+	IEEE80211_OFDM_RATE_18MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_OFDM_RATE_24MB|IEEE80211_BASIC_RATE_MASK};
+u8 bmc_support_rate_cck[4] =
+	{IEEE80211_CCK_RATE_1MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_2MB|IEEE80211_BASIC_RATE_MASK,
+	IEEE80211_CCK_RATE_5MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_11MB|IEEE80211_BASIC_RATE_MASK};
+
+void update_bmc_sta_support_rate(_adapter *padapter, u32 mac_id)
+{
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	if(pmlmeext->cur_wireless_mode & WIRELESS_11B)
+	{
+		// Only B, B/G, and B/G/N AP could use CCK rate
+		_rtw_memcpy((pmlmeinfo->FW_sta_info[mac_id].SupportedRates), bmc_support_rate_cck, 4);
+	}
+	else
+	{
+		_rtw_memcpy((pmlmeinfo->FW_sta_info[mac_id].SupportedRates), bmc_support_rate_ofdm, 4);
+	}
+}
+
+int update_sta_support_rate(_adapter *padapter, u8* pvar_ie, uint var_ie_len, int cam_idx)
+{
+	unsigned int	ie_len;
+	PNDIS_802_11_VARIABLE_IEs	pIE;
+	int	supportRateNum = 0;
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	
+	pIE = (PNDIS_802_11_VARIABLE_IEs)rtw_get_ie(pvar_ie, _SUPPORTEDRATES_IE_, &ie_len, var_ie_len);
+	if (pIE == NULL)
+	{
+		return _FAIL;
+	}
+	
+	_rtw_memcpy(pmlmeinfo->FW_sta_info[cam_idx].SupportedRates, pIE->data, ie_len);
+	supportRateNum = ie_len;
+				
+	pIE = (PNDIS_802_11_VARIABLE_IEs)rtw_get_ie(pvar_ie, _EXT_SUPPORTEDRATES_IE_, &ie_len, var_ie_len);
+	if (pIE)
+	{
+		_rtw_memcpy((pmlmeinfo->FW_sta_info[cam_idx].SupportedRates + supportRateNum), pIE->data, ie_len);
+	}
+
+	return _SUCCESS;
+	
+}
+
+void process_addba_req(_adapter *padapter, u8 *paddba_req, u8 *addr)
+{
+	struct sta_info *psta;
+	u16 tid, start_seq, param;	
+	struct recv_reorder_ctrl *preorder_ctrl;
+	struct sta_priv *pstapriv = &padapter->stapriv;	
+	struct ADDBA_request	*preq = (struct ADDBA_request*)paddba_req;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	psta = rtw_get_stainfo(pstapriv, addr);
+
+	if(psta)
+	{
+		start_seq = le16_to_cpu(preq->BA_starting_seqctrl) >> 4;
+			
+		param = le16_to_cpu(preq->BA_para_set);
+		tid = (param>>2)&0x0f;
+		
+		preorder_ctrl = &psta->recvreorder_ctrl[tid];
+
+		#ifdef CONFIG_UPDATE_INDICATE_SEQ_WHILE_PROCESS_ADDBA_REQ
+		preorder_ctrl->indicate_seq = start_seq;
+		#ifdef DBG_RX_SEQ
+		DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, start_seq: %d\n", __FUNCTION__, __LINE__,
+			preorder_ctrl->indicate_seq, start_seq);
+		#endif
+		#else
+		preorder_ctrl->indicate_seq = 0xffff;
+		#endif
+		
+		preorder_ctrl->enable =(pmlmeinfo->bAcceptAddbaReq == _TRUE)? _TRUE :_FALSE;
+	}
+
+}
+
+void update_TSF(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len)
+{	
+	u8* pIE;
+	u32 *pbuf;
+		
+	pIE = pframe + sizeof(struct ieee80211_hdr_3addr);
+	pbuf = (u32*)pIE;
+
+	pmlmeext->TSFValue = le32_to_cpu(*(pbuf+1));
+	
+	pmlmeext->TSFValue = pmlmeext->TSFValue << 32;
+
+	pmlmeext->TSFValue |= le32_to_cpu(*pbuf);
+}
+
+void correct_TSF(_adapter *padapter, struct mlme_ext_priv *pmlmeext)
+{
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_CORRECT_TSF, 0);
+}
+
+void beacon_timing_control(_adapter *padapter)
+{
+	padapter->HalFunc.SetBeaconRelatedRegistersHandler(padapter);
+}
+
+#if 0
+unsigned int setup_beacon_frame(_adapter *padapter, unsigned char *beacon_frame)
+{
+	unsigned short				ATIMWindow;
+	unsigned char					*pframe;
+	struct tx_desc 				*ptxdesc;
+	struct ieee80211_hdr 	*pwlanhdr;
+	unsigned short				*fctrl;
+	unsigned int					rate_len, len = 0;
+	struct xmit_priv			*pxmitpriv = &(padapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX 		*cur_network = &(pmlmeinfo->network);
+	u8	bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+	
+	_rtw_memset(beacon_frame, 0, 256);
+	
+	pframe = beacon_frame + TXDESC_SIZE;
+	
+	pwlanhdr = (struct ieee80211_hdr *)pframe;	
+	
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+	
+	_rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN);
+	
+	SetFrameSubType(pframe, WIFI_BEACON);
+	
+	pframe += sizeof(struct ieee80211_hdr_3addr);	
+	len = sizeof(struct ieee80211_hdr_3addr);
+
+	//timestamp will be inserted by hardware
+	pframe += 8;
+	len += 8;
+
+	// beacon interval: 2 bytes
+	_rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); 
+
+	pframe += 2;
+	len += 2;
+
+	// capability info: 2 bytes
+	_rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2);
+
+	pframe += 2;
+	len += 2;
+
+	// SSID
+	pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &len);
+
+	// supported rates...
+	rate_len = rtw_get_rateset_len(cur_network->SupportedRates);
+	pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &len);
+
+	// DS parameter set
+	pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &len);
+
+	// IBSS Parameter Set...
+	//ATIMWindow = cur->Configuration.ATIMWindow;
+	ATIMWindow = 0;
+	pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &len);
+
+	//todo: ERP IE
+	
+	// EXTERNDED SUPPORTED RATE
+	if (rate_len > 8)
+	{
+		pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &len);
+	}
+
+	if ((len + TXDESC_SIZE) > 256)
+	{
+		//DBG_8192C("marc: beacon frame too large\n");
+		return 0;
+	}
+
+	//fill the tx descriptor
+	ptxdesc = (struct tx_desc *)beacon_frame;
+	
+	//offset 0	
+	ptxdesc->txdw0 |= cpu_to_le32(len & 0x0000ffff); 
+	ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00ff0000); //default = 32 bytes for TX Desc
+	
+	//offset 4	
+	ptxdesc->txdw1 |= cpu_to_le32((0x10 << QSEL_SHT) & 0x00001f00);
+	
+	//offset 8		
+	ptxdesc->txdw2 |= cpu_to_le32(BMC);
+	ptxdesc->txdw2 |= cpu_to_le32(BK);
+
+	//offset 16		
+	ptxdesc->txdw4 = 0x80000000;
+	
+	//offset 20
+	ptxdesc->txdw5 = 0x00000000; //1M	
+	
+	return (len + TXDESC_SIZE);
+}
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_xmit.c linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_xmit.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/core/rtw_xmit.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/core/rtw_xmit.c	2017-09-23 03:42:49.910675394 +0800
@@ -0,0 +1,4044 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * 
+******************************************************************************/
+#define _RTW_XMIT_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtw_byteorder.h>
+#include <wifi.h>
+#include <osdep_intf.h>
+#include <circ_buf.h>
+#include <ip.h>
+
+#ifdef CONFIG_TDLS
+#include <rtl8192c_hal.h>
+#endif
+
+#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
+#error "Shall be Linux or Windows, but not both!\n"
+#endif
+
+#ifdef PLATFORM_WINDOWS
+#include <if_ether.h>
+#endif
+
+#ifdef CONFIG_USB_HCI
+#include <usb_ops.h>
+#endif
+
+
+static u8 P802_1H_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0xf8 };
+static u8 RFC1042_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0x00 };
+
+#ifdef CONFIG_TDLS
+extern unsigned char MCS_rate_2R[16];
+extern unsigned char MCS_rate_1R[16];
+#endif
+
+static void _init_txservq(struct tx_servq *ptxservq)
+{
+_func_enter_;
+	_rtw_init_listhead(&ptxservq->tx_pending);
+	_rtw_init_queue(&ptxservq->sta_pending);
+	ptxservq->qcnt = 0;
+_func_exit_;		
+}
+
+
+void	_rtw_init_sta_xmit_priv(struct sta_xmit_priv *psta_xmitpriv)
+{	
+	
+_func_enter_;
+
+	_rtw_memset((unsigned char *)psta_xmitpriv, 0, sizeof (struct sta_xmit_priv));
+
+	_rtw_spinlock_init(&psta_xmitpriv->lock);
+	
+	//for(i = 0 ; i < MAX_NUMBLKS; i++)
+	//	_init_txservq(&(psta_xmitpriv->blk_q[i]));
+
+	_init_txservq(&psta_xmitpriv->be_q);
+	_init_txservq(&psta_xmitpriv->bk_q);
+	_init_txservq(&psta_xmitpriv->vi_q);
+	_init_txservq(&psta_xmitpriv->vo_q);
+	_rtw_init_listhead(&psta_xmitpriv->legacy_dz);
+	_rtw_init_listhead(&psta_xmitpriv->apsd);
+	
+_func_exit_;	
+
+}
+
+s32	_rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, _adapter *padapter)
+{
+	int i;
+	struct xmit_buf *pxmitbuf;
+	struct xmit_frame *pxframe;
+	sint	res=_SUCCESS;   
+
+_func_enter_;   	
+
+	// We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc().
+	//_rtw_memset((unsigned char *)pxmitpriv, 0, sizeof(struct xmit_priv));
+	
+	_rtw_spinlock_init(&pxmitpriv->lock);
+	_rtw_init_sema(&pxmitpriv->xmit_sema, 0);
+	_rtw_init_sema(&pxmitpriv->terminate_xmitthread_sema, 0);
+
+	ATOMIC_SET(&pxmitpriv->HwRdyXmitData, 1);
+
+	/* 
+	Please insert all the queue initializaiton using _rtw_init_queue below
+	*/
+
+	pxmitpriv->adapter = padapter;
+	
+	//for(i = 0 ; i < MAX_NUMBLKS; i++)
+	//	_rtw_init_queue(&pxmitpriv->blk_strms[i]);
+	
+	_rtw_init_queue(&pxmitpriv->be_pending);
+	_rtw_init_queue(&pxmitpriv->bk_pending);
+	_rtw_init_queue(&pxmitpriv->vi_pending);
+	_rtw_init_queue(&pxmitpriv->vo_pending);
+	_rtw_init_queue(&pxmitpriv->bm_pending);
+
+	//_rtw_init_queue(&pxmitpriv->legacy_dz_queue);
+	//_rtw_init_queue(&pxmitpriv->apsd_queue);
+
+	_rtw_init_queue(&pxmitpriv->free_xmit_queue);
+
+
+	/*	
+	Please allocate memory with the sz = (struct xmit_frame) * NR_XMITFRAME, 
+	and initialize free_xmit_frame below.
+	Please also apply  free_txobj to link_up all the xmit_frames...
+	*/
+
+	pxmitpriv->pallocated_frame_buf = rtw_zvmalloc(NR_XMITFRAME * sizeof(struct xmit_frame) + 4);
+	
+	if (pxmitpriv->pallocated_frame_buf  == NULL){
+		pxmitpriv->pxmit_frame_buf =NULL;
+		RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("alloc xmit_frame fail!\n"));	
+		res= _FAIL;
+		goto exit;
+	}
+	pxmitpriv->pxmit_frame_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitpriv->pallocated_frame_buf), 4);
+	//pxmitpriv->pxmit_frame_buf = pxmitpriv->pallocated_frame_buf + 4 -
+	//						((SIZE_PTR) (pxmitpriv->pallocated_frame_buf) &3);
+
+	pxframe = (struct xmit_frame*) pxmitpriv->pxmit_frame_buf;
+
+	for (i = 0; i < NR_XMITFRAME; i++)
+	{
+		_rtw_init_listhead(&(pxframe->list));
+
+		pxframe->padapter = padapter;
+		pxframe->frame_tag = NULL_FRAMETAG;
+
+		pxframe->pkt = NULL;		
+
+		pxframe->buf_addr = NULL;
+		pxframe->pxmitbuf = NULL;
+ 
+		rtw_list_insert_tail(&(pxframe->list), &(pxmitpriv->free_xmit_queue.queue));
+
+		pxframe++;
+	}
+
+	pxmitpriv->free_xmitframe_cnt = NR_XMITFRAME;
+
+	pxmitpriv->frag_len = MAX_FRAG_THRESHOLD;
+
+
+	//init xmit_buf
+	_rtw_init_queue(&pxmitpriv->free_xmitbuf_queue);
+	_rtw_init_queue(&pxmitpriv->pending_xmitbuf_queue);
+
+	pxmitpriv->pallocated_xmitbuf = rtw_zvmalloc(NR_XMITBUFF * sizeof(struct xmit_buf) + 4);
+	
+	if (pxmitpriv->pallocated_xmitbuf  == NULL){
+		RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("alloc xmit_buf fail!\n"));
+		res= _FAIL;
+		goto exit;
+	}
+
+	pxmitpriv->pxmitbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitpriv->pallocated_xmitbuf), 4);
+	//pxmitpriv->pxmitbuf = pxmitpriv->pallocated_xmitbuf + 4 -
+	//						((SIZE_PTR) (pxmitpriv->pallocated_xmitbuf) &3);
+
+	pxmitbuf = (struct xmit_buf*)pxmitpriv->pxmitbuf;
+
+	for (i = 0; i < NR_XMITBUFF; i++)
+	{
+		_rtw_init_listhead(&pxmitbuf->list);
+
+		pxmitbuf->priv_data = NULL;
+		pxmitbuf->padapter = padapter;
+		pxmitbuf->ext_tag = _FALSE;
+
+/*
+		pxmitbuf->pallocated_buf = rtw_zmalloc(MAX_XMITBUF_SZ + XMITBUF_ALIGN_SZ);
+		if (pxmitbuf->pallocated_buf == NULL)
+		{
+			res = _FAIL;
+			goto exit;
+		}
+
+		pxmitbuf->pbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitbuf->pallocated_buf), XMITBUF_ALIGN_SZ);
+		//pxmitbuf->pbuf = pxmitbuf->pallocated_buf + XMITBUF_ALIGN_SZ -((SIZE_PTR) (pxmitbuf->pallocated_buf) &(XMITBUF_ALIGN_SZ-1));
+*/
+
+		if((res=rtw_os_xmit_resource_alloc(padapter, pxmitbuf,(MAX_XMITBUF_SZ + XMITBUF_ALIGN_SZ))) == _FAIL) {
+			res= _FAIL;
+			goto exit;
+		}
+
+		pxmitbuf->flags = XMIT_VO_QUEUE;
+		
+		rtw_list_insert_tail(&pxmitbuf->list, &(pxmitpriv->free_xmitbuf_queue.queue));
+		#ifdef DBG_XMIT_BUF
+		pxmitbuf->no=i;
+		#endif
+
+		pxmitbuf++;
+		
+	}
+
+	pxmitpriv->free_xmitbuf_cnt = NR_XMITBUFF;
+
+	// Init xmit extension buff
+	_rtw_init_queue(&pxmitpriv->free_xmit_extbuf_queue);
+
+	pxmitpriv->pallocated_xmit_extbuf = rtw_zvmalloc(NR_XMIT_EXTBUFF * sizeof(struct xmit_buf) + 4);
+	
+	if (pxmitpriv->pallocated_xmit_extbuf  == NULL){
+		RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("alloc xmit_extbuf fail!\n"));
+		res= _FAIL;
+		goto exit;
+	}
+
+	pxmitpriv->pxmit_extbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitpriv->pallocated_xmit_extbuf), 4);
+
+	pxmitbuf = (struct xmit_buf*)pxmitpriv->pxmit_extbuf;
+
+	for (i = 0; i < NR_XMIT_EXTBUFF; i++)
+	{
+		_rtw_init_listhead(&pxmitbuf->list);
+
+		pxmitbuf->priv_data = NULL;
+		pxmitbuf->padapter = padapter;
+		pxmitbuf->ext_tag = _TRUE;
+
+/*
+		pxmitbuf->pallocated_buf = rtw_zmalloc(MAX_XMIT_EXTBUF_SZ);
+		if (pxmitbuf->pallocated_buf == NULL)
+		{
+			res = _FAIL;
+			goto exit;
+		}
+
+		pxmitbuf->pbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitbuf->pallocated_buf), 4);
+*/		
+
+		if((res=rtw_os_xmit_resource_alloc(padapter, pxmitbuf,MAX_XMIT_EXTBUF_SZ + XMITBUF_ALIGN_SZ)) == _FAIL) {
+			res= _FAIL;
+			goto exit;
+		}
+		
+		rtw_list_insert_tail(&pxmitbuf->list, &(pxmitpriv->free_xmit_extbuf_queue.queue));
+		#ifdef DBG_XMIT_BUF
+		pxmitbuf->no=i;
+		#endif
+		pxmitbuf++;
+		
+	}
+
+	pxmitpriv->free_xmit_extbuf_cnt = NR_XMIT_EXTBUFF;
+
+	rtw_alloc_hwxmits(padapter);
+	rtw_init_hwxmits(pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry);
+
+#ifdef CONFIG_USB_HCI
+	pxmitpriv->txirp_cnt=1;
+
+	_rtw_init_sema(&(pxmitpriv->tx_retevt), 0);
+
+	//per AC pending irp
+	pxmitpriv->beq_cnt = 0;
+	pxmitpriv->bkq_cnt = 0;
+	pxmitpriv->viq_cnt = 0;
+	pxmitpriv->voq_cnt = 0;
+#endif
+
+	if(padapter->HalFunc.init_xmit_priv != NULL)
+		padapter->HalFunc.init_xmit_priv(padapter);
+
+exit:
+
+_func_exit_;	
+
+	return res;
+}
+
+void  rtw_mfree_xmit_priv_lock (struct xmit_priv *pxmitpriv)
+{
+	_rtw_spinlock_free(&pxmitpriv->lock);
+	_rtw_free_sema(&pxmitpriv->xmit_sema);
+	_rtw_free_sema(&pxmitpriv->terminate_xmitthread_sema);
+
+	_rtw_spinlock_free(&pxmitpriv->be_pending.lock);
+	_rtw_spinlock_free(&pxmitpriv->bk_pending.lock);
+	_rtw_spinlock_free(&pxmitpriv->vi_pending.lock);
+	_rtw_spinlock_free(&pxmitpriv->vo_pending.lock);
+	_rtw_spinlock_free(&pxmitpriv->bm_pending.lock);
+
+	//_rtw_spinlock_free(&pxmitpriv->legacy_dz_queue.lock);
+	//_rtw_spinlock_free(&pxmitpriv->apsd_queue.lock);
+
+	_rtw_spinlock_free(&pxmitpriv->free_xmit_queue.lock);
+	_rtw_spinlock_free(&pxmitpriv->free_xmitbuf_queue.lock);
+	_rtw_spinlock_free(&pxmitpriv->pending_xmitbuf_queue.lock);
+}
+
+
+void _rtw_free_xmit_priv (struct xmit_priv *pxmitpriv)
+{
+       int i;
+      _adapter *padapter = pxmitpriv->adapter;
+	struct xmit_frame	*pxmitframe = (struct xmit_frame*) pxmitpriv->pxmit_frame_buf;
+	struct xmit_buf *pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmitbuf;
+
+ _func_enter_;   
+
+	padapter->HalFunc.free_xmit_priv(padapter);
+ 
+	rtw_mfree_xmit_priv_lock(pxmitpriv);
+ 
+ 	if(pxmitpriv->pxmit_frame_buf==NULL)
+		goto out;
+	
+	for(i=0; i<NR_XMITFRAME; i++)
+	{	
+		rtw_os_xmit_complete(padapter, pxmitframe);		
+
+		pxmitframe++;
+	}		
+	
+	for(i=0; i<NR_XMITBUFF; i++)
+	{
+		rtw_os_xmit_resource_free(padapter, pxmitbuf,(MAX_XMITBUF_SZ + XMITBUF_ALIGN_SZ));
+
+		//if(pxmitbuf->pallocated_buf)
+		//	rtw_mfree(pxmitbuf->pallocated_buf, MAX_XMITBUF_SZ + XMITBUF_ALIGN_SZ);
+		
+		pxmitbuf++;
+	}
+
+	if(pxmitpriv->pallocated_frame_buf) {
+		rtw_vmfree(pxmitpriv->pallocated_frame_buf, NR_XMITFRAME * sizeof(struct xmit_frame) + 4);
+	}
+	
+
+	if(pxmitpriv->pallocated_xmitbuf) {
+		rtw_vmfree(pxmitpriv->pallocated_xmitbuf, NR_XMITBUFF * sizeof(struct xmit_buf) + 4);
+	}
+
+	// free xmit extension buff
+	_rtw_spinlock_free(&pxmitpriv->free_xmit_extbuf_queue.lock);
+
+	pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmit_extbuf;
+	for(i=0; i<NR_XMIT_EXTBUFF; i++)
+	{
+		rtw_os_xmit_resource_free(padapter, pxmitbuf,(MAX_XMIT_EXTBUF_SZ + XMITBUF_ALIGN_SZ));
+
+		//if(pxmitbuf->pallocated_buf)
+		//	rtw_mfree(pxmitbuf->pallocated_buf, MAX_XMIT_EXTBUF_SZ);
+		
+		pxmitbuf++;
+	}
+
+	if(pxmitpriv->pallocated_xmit_extbuf) {
+		rtw_vmfree(pxmitpriv->pallocated_xmit_extbuf, NR_XMIT_EXTBUFF * sizeof(struct xmit_buf) + 4);	
+	}
+
+	rtw_free_hwxmits(padapter);
+
+out:	
+
+_func_exit_;		
+
+}
+
+static void update_attrib_vcs_info(_adapter *padapter, struct xmit_frame *pxmitframe)
+{
+	u32	sz;
+	struct pkt_attrib	*pattrib = &pxmitframe->attrib;
+	struct sta_info	*psta = pattrib->psta;
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+
+	if (pattrib->nr_frags != 1)
+	{
+		sz = padapter->xmitpriv.frag_len;
+	}
+	else //no frag
+	{
+		sz = pattrib->last_txcmdsz;
+	}
+
+	// (1) RTS_Threshold is compared to the MPDU, not MSDU.
+	// (2) If there are more than one frag in  this MSDU, only the first frag uses protection frame.
+	//		Other fragments are protected by previous fragment.
+	//		So we only need to check the length of first fragment.
+	if(pmlmeext->cur_wireless_mode < WIRELESS_11_24N  || padapter->registrypriv.wifi_spec)
+	{
+		if(sz > padapter->registrypriv.rts_thresh)
+		{
+			pattrib->vcs_mode = RTS_CTS;
+		}
+		else
+		{
+			if(psta->rtsen)
+				pattrib->vcs_mode = RTS_CTS;
+			else if(psta->cts2self)
+				pattrib->vcs_mode = CTS_TO_SELF;
+			else
+				pattrib->vcs_mode = NONE_VCS;
+		}
+	}
+	else
+	{
+		while (_TRUE)
+		{
+#if 0 //Todo
+			//check IOT action
+			if(pHTInfo->IOTAction & HT_IOT_ACT_FORCED_CTS2SELF)
+			{
+				pattrib->vcs_mode = CTS_TO_SELF;
+				pattrib->rts_rate = MGN_24M;
+				break;
+			}
+			else if(pHTInfo->IOTAction & (HT_IOT_ACT_FORCED_RTS|HT_IOT_ACT_PURE_N_MODE))
+			{
+				pattrib->vcs_mode = RTS_CTS;
+				pattrib->rts_rate = MGN_24M;
+				break;
+			}
+#endif
+
+			//IOT action
+			if((pmlmeinfo->assoc_AP_vendor == atherosAP) && (pattrib->ampdu_en==_TRUE) &&
+				(padapter->securitypriv.dot11PrivacyAlgrthm == _AES_ ))
+			{
+				pattrib->vcs_mode = CTS_TO_SELF;
+				break;
+			}	
+			
+
+			//check ERP protection
+			if(psta->rtsen || psta->cts2self)
+			{
+				if(psta->rtsen)
+					pattrib->vcs_mode = RTS_CTS;
+				else if(psta->cts2self)
+					pattrib->vcs_mode = CTS_TO_SELF;
+
+				break;
+			}
+
+			//check HT op mode
+			if(pattrib->ht_en)
+			{
+				u8 HTOpMode = pmlmeinfo->HT_protection;
+				if((pmlmeext->cur_bwmode && (HTOpMode == 2 || HTOpMode == 3)) ||
+					(!pmlmeext->cur_bwmode && HTOpMode == 3) )
+				{
+					pattrib->vcs_mode = RTS_CTS;
+					break;
+				}
+			}
+
+			//check rts
+			if(sz > padapter->registrypriv.rts_thresh)
+			{
+				pattrib->vcs_mode = RTS_CTS;
+				break;
+			}
+
+			//to do list: check MIMO power save condition.
+
+			//check AMPDU aggregation for TXOP
+			if(pattrib->ampdu_en==_TRUE)
+			{
+				pattrib->vcs_mode = RTS_CTS;
+				break;
+			}
+
+			pattrib->vcs_mode = NONE_VCS;
+			break;
+		}
+	}
+}
+
+static void update_attrib_phy_info(struct pkt_attrib *pattrib, struct sta_info *psta)
+{
+	/*if(psta->rtsen)	
+		pattrib->vcs_mode = RTS_CTS;	
+	else if(psta->cts2self)	
+		pattrib->vcs_mode = CTS_TO_SELF;	
+	else
+		pattrib->vcs_mode = NONE_VCS;*/
+	
+	pattrib->mdata = 0;
+	pattrib->eosp = 0;
+	pattrib->triggered=0;
+	
+	//qos_en, ht_en, init rate, ,bw, ch_offset, sgi
+	pattrib->qos_en = psta->qos_option;
+	pattrib->ht_en = psta->htpriv.ht_option;
+	pattrib->raid = psta->raid;
+	pattrib->bwmode = psta->htpriv.bwmode;
+	pattrib->ch_offset = psta->htpriv.ch_offset;
+	pattrib->sgi= psta->htpriv.sgi;
+	pattrib->ampdu_en = _FALSE;
+
+	//if(pattrib->ht_en && psta->htpriv.ampdu_enable)
+	//{
+	//	if(psta->htpriv.agg_enable_bitmap & BIT(pattrib->priority))
+	//		pattrib->ampdu_en = _TRUE;
+	//}	
+	
+}
+
+static void set_qos(struct pkt_file *ppktfile, struct pkt_attrib *pattrib)
+{
+	struct ethhdr etherhdr;
+	struct iphdr ip_hdr;
+	s32 UserPriority = 0;
+
+
+	_rtw_open_pktfile(ppktfile->pkt, ppktfile);
+	_rtw_pktfile_read(ppktfile, (unsigned char*)&etherhdr, ETH_HLEN);
+
+	// get UserPriority from IP hdr
+	if (pattrib->ether_type == 0x0800) {
+		_rtw_pktfile_read(ppktfile, (u8*)&ip_hdr, sizeof(ip_hdr));
+//		UserPriority = (ntohs(ip_hdr.tos) >> 5) & 0x3;
+		UserPriority = ip_hdr.tos >> 5;
+	} else if (pattrib->ether_type == 0x888e) {
+		// "When priority processing of data frames is supported,
+		// a STA's SME should send EAPOL-Key frames at the highest priority."
+		UserPriority = 7;
+	}
+
+	pattrib->priority = UserPriority;
+	pattrib->hdrlen = WLAN_HDR_A3_QOS_LEN;
+	pattrib->subtype = WIFI_QOS_DATA_TYPE;
+}
+
+static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattrib)
+{
+	uint i;
+	struct pkt_file pktfile;
+	struct sta_info *psta = NULL;
+	struct ethhdr etherhdr;
+
+	sint bmcast;
+	struct sta_priv		*pstapriv = &padapter->stapriv;
+	struct security_priv	*psecuritypriv = &padapter->securitypriv;
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	struct qos_priv		*pqospriv= &pmlmepriv->qospriv;
+	sint res = _SUCCESS;
+
+ _func_enter_;
+
+	_rtw_open_pktfile(pkt, &pktfile);
+	i = _rtw_pktfile_read(&pktfile, (u8*)&etherhdr, ETH_HLEN);
+
+	pattrib->ether_type = ntohs(etherhdr.h_proto);
+
+
+	_rtw_memcpy(pattrib->dst, &etherhdr.h_dest, ETH_ALEN);
+	_rtw_memcpy(pattrib->src, &etherhdr.h_source, ETH_ALEN);
+
+	pattrib->pctrl = 0;
+
+	if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) ||
+		(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) {
+		_rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN);
+		_rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
+	}
+	else if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) {
+		_rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN);
+		_rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
+	}
+	else if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) {
+		_rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN);
+		_rtw_memcpy(pattrib->ta, get_bssid(pmlmepriv), ETH_ALEN);
+	}
+
+	pattrib->pktlen = pktfile.pkt_len;	// rtw_xmitframe_coalesce() overwirte this!
+
+	if (ETH_P_IP == pattrib->ether_type)
+	{
+		// The following is for DHCP and ARP packet, we use cck1M to tx these packets and let LPS awake some time 
+		// to prevent DHCP protocol fail
+		u8 tmp[24];
+		_rtw_pktfile_read(&pktfile, &tmp[0], 24);
+		pattrib->dhcp_pkt = 0;
+		if (pktfile.pkt_len > 282) {//MINIMUM_DHCP_PACKET_SIZE) {
+			if (ETH_P_IP == pattrib->ether_type) {// IP header
+				if (((tmp[21] == 68) && (tmp[23] == 67)) ||
+					((tmp[21] == 67) && (tmp[23] == 68))) {
+					// 68 : UDP BOOTP client
+					// 67 : UDP BOOTP server
+					RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("======================update_attrib: get DHCP Packet \n"));
+					// Use low rate to send DHCP packet.
+					//if(pMgntInfo->IOTAction & HT_IOT_ACT_WA_IOT_Broadcom) 
+					//{
+					//	tcb_desc->DataRate = MgntQuery_TxRateExcludeCCKRates(ieee);//0xc;//ofdm 6m
+					//	tcb_desc->bTxDisableRateFallBack = false;
+					//}
+					//else
+					//	pTcb->DataRate = Adapter->MgntInfo.LowestBasicRate; 
+					//RTPRINT(FDM, WA_IOT, ("DHCP TranslateHeader(), pTcb->DataRate = 0x%x\n", pTcb->DataRate)); 
+					pattrib->dhcp_pkt = 1;
+				}
+			}
+		}
+	}
+
+	#ifdef CONFIG_SET_SCAN_DENY_TIMER
+	if ( (pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1) )
+	{
+		rtw_set_scan_deny(pmlmepriv, 3000);
+	}
+	#endif
+
+#ifdef CONFIG_LPS
+	// If EAPOL , ARP , OR DHCP packet, driver must be in active mode.
+	if ( (pattrib->ether_type == 0x0806) || (pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1) )
+	{
+		rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_SPECIAL_PACKET, 1);
+	}
+#endif
+
+	bmcast = IS_MCAST(pattrib->ra);
+	
+	// get sta_info
+	if (bmcast) {
+		psta = rtw_get_bcmc_stainfo(padapter);
+	} else {
+		psta = rtw_get_stainfo(pstapriv, pattrib->ra);
+		if (psta == NULL)	{ // if we cannot get psta => drrp the pkt
+			RT_TRACE(_module_rtl871x_xmit_c_, _drv_alert_, ("\nupdate_attrib => get sta_info fail, ra:" MAC_FMT"\n", MAC_ARG(pattrib->ra)));
+			#ifdef DBG_TX_DROP_FRAME
+			DBG_871X("DBG_TX_DROP_FRAME %s get sta_info fail, ra:" MAC_FMT"\n", __FUNCTION__, MAC_ARG(pattrib->ra));
+			#endif
+			res =_FAIL;
+			goto exit;
+		}
+		else if((check_fwstate(pmlmepriv, WIFI_AP_STATE)==_TRUE)&&(!(psta->state & _FW_LINKED)))
+		{
+			res =_FAIL;
+			goto exit;
+		}
+	}
+
+	if (psta)
+	{
+		pattrib->mac_id = psta->mac_id;
+		pattrib->psta = psta;
+	}
+	else
+	{
+		// if we cannot get psta => drop the pkt
+		RT_TRACE(_module_rtl871x_xmit_c_, _drv_alert_, ("\nupdate_attrib => get sta_info fail, ra:" MAC_FMT "\n", MAC_ARG(pattrib->ra)));
+		#ifdef DBG_TX_DROP_FRAME
+		DBG_871X("DBG_TX_DROP_FRAME %s get sta_info fail, ra:" MAC_FMT"\n", __FUNCTION__, MAC_ARG(pattrib->ra));
+		#endif
+		res = _FAIL;
+		goto exit;
+	}
+
+	pattrib->ack_policy = 0;
+	// get ether_hdr_len
+	pattrib->pkt_hdrlen = ETH_HLEN;//(pattrib->ether_type == 0x8100) ? (14 + 4 ): 14; //vlan tag
+
+	pattrib->hdrlen = WLAN_HDR_A3_LEN;
+	pattrib->subtype = WIFI_DATA_TYPE;	
+	pattrib->priority = 0;
+	
+	if (check_fwstate(pmlmepriv, WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE))
+	{
+		if(psta->qos_option)
+			set_qos(&pktfile, pattrib);	
+	}
+	else
+	{
+		if(pqospriv->qos_option)
+			set_qos(&pktfile, pattrib);
+	}
+
+	//pattrib->priority = 5; //force to used VI queue, for testing
+
+	if (psta->ieee8021x_blocked == _TRUE)
+	{
+		RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("\n psta->ieee8021x_blocked == _TRUE \n"));
+
+		pattrib->encrypt = 0;
+
+		if((pattrib->ether_type != 0x888e) && (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _FALSE))
+		{
+			RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("\npsta->ieee8021x_blocked == _TRUE,  pattrib->ether_type(%.4x) != 0x888e\n",pattrib->ether_type));
+			#ifdef DBG_TX_DROP_FRAME
+			DBG_871X("DBG_TX_DROP_FRAME %s psta->ieee8021x_blocked == _TRUE,  pattrib->ether_type(%.4x) != 0x888e\n", __FUNCTION__,pattrib->ether_type);
+			#endif
+			res = _FAIL;
+			goto exit;
+		}
+	}
+	else
+	{
+		GET_ENCRY_ALGO(psecuritypriv, psta, pattrib->encrypt, bmcast);
+
+		switch(psecuritypriv->dot11AuthAlgrthm)
+		{
+			case dot11AuthAlgrthm_Open:
+			case dot11AuthAlgrthm_Shared:
+			case dot11AuthAlgrthm_Auto:				
+				pattrib->key_idx = (u8)psecuritypriv->dot11PrivacyKeyIndex;
+				break;
+			case dot11AuthAlgrthm_8021X:
+				if(bmcast)					
+					pattrib->key_idx = (u8)psecuritypriv->dot118021XGrpKeyid;	
+				else
+					pattrib->key_idx = 0;
+				break;
+			default:
+				pattrib->key_idx = 0;
+				break;
+		}
+		
+			
+	}
+
+	switch (pattrib->encrypt)
+	{
+		case _WEP40_:
+		case _WEP104_:
+			pattrib->iv_len = 4;
+			pattrib->icv_len = 4;
+			break;
+
+		case _TKIP_:
+			pattrib->iv_len = 8;
+			pattrib->icv_len = 4;
+			
+			if(padapter->securitypriv.busetkipkey==_FAIL)
+			{
+				RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("\npadapter->securitypriv.busetkipkey(%d)==_FAIL drop packet\n", padapter->securitypriv.busetkipkey));
+				#ifdef DBG_TX_DROP_FRAME
+				DBG_871X("DBG_TX_DROP_FRAME %s padapter->securitypriv.busetkipkey(%d)==_FAIL drop packet\n", __FUNCTION__, padapter->securitypriv.busetkipkey);
+				#endif
+				res =_FAIL;
+				goto exit;
+			}
+					
+			break;			
+		case _AES_:
+			RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("\n pattrib->encrypt=%d  (_AES_)\n",pattrib->encrypt));
+			pattrib->iv_len = 8;
+			pattrib->icv_len = 8;
+			break;
+			
+		default:
+			pattrib->iv_len = 0;
+			pattrib->icv_len = 0;
+			break;
+	}
+
+	RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_,
+		 ("update_attrib: encrypt=%d  securitypriv.sw_encrypt=%d\n",
+		  pattrib->encrypt, padapter->securitypriv.sw_encrypt));
+
+	if (pattrib->encrypt &&
+	    ((padapter->securitypriv.sw_encrypt == _TRUE) || (psecuritypriv->hw_decrypted == _FALSE)))
+	{
+		pattrib->bswenc = _TRUE;
+		RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,
+			 ("update_attrib: encrypt=%d securitypriv.hw_decrypted=%d bswenc=_TRUE\n",
+			  pattrib->encrypt, padapter->securitypriv.sw_encrypt));
+	} else {
+		pattrib->bswenc = _FALSE;
+		RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("update_attrib: bswenc=_FALSE\n"));
+	}
+
+	rtw_set_tx_chksum_offload(pkt, pattrib);
+
+	update_attrib_phy_info(pattrib, psta);
+
+exit:
+
+_func_exit_;
+
+	return res;
+}
+
+static s32 xmitframe_addmic(_adapter *padapter, struct xmit_frame *pxmitframe){
+	sint 			curfragnum,length;
+	u8	*pframe, *payload,mic[8];
+	struct	mic_data		micdata;
+	struct	sta_info		*stainfo;
+	struct	qos_priv   *pqospriv= &(padapter->mlmepriv.qospriv);	
+	struct	pkt_attrib	 *pattrib = &pxmitframe->attrib;
+	struct 	security_priv	*psecuritypriv=&padapter->securitypriv;
+	struct	xmit_priv		*pxmitpriv=&padapter->xmitpriv;
+	u8 priority[4]={0x0,0x0,0x0,0x0};
+	sint bmcst = IS_MCAST(pattrib->ra);
+
+	if(pattrib->psta)
+	{
+		stainfo = pattrib->psta;
+	}
+	else
+	{
+		stainfo=rtw_get_stainfo(&padapter->stapriv ,&pattrib->ra[0]);
+	}	
+
+	
+
+_func_enter_;
+
+	if(pattrib->encrypt ==_TKIP_)//if(psecuritypriv->dot11PrivacyAlgrthm==_TKIP_PRIVACY_) 
+	{
+		//encode mic code
+		if(stainfo!= NULL){
+			u8 null_key[16]={0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0};
+
+#ifdef CONFIG_USB_TX_AGGREGATION
+			pframe = pxmitframe->buf_addr + TXDESC_SIZE + (pxmitframe->pkt_offset * PACKET_OFFSET_SZ);
+#else
+			pframe = pxmitframe->buf_addr + TXDESC_OFFSET;
+#endif
+			
+			if(bmcst)
+			{
+				if(_rtw_memcmp(psecuritypriv->dot118021XGrptxmickey[psecuritypriv->dot118021XGrpKeyid].skey, null_key, 16)==_TRUE){
+					//DbgPrint("\nxmitframe_addmic:stainfo->dot11tkiptxmickey==0\n");
+					//rtw_msleep_os(10);
+					return _FAIL;
+				}				
+				//start to calculate the mic code
+				rtw_secmicsetkey(&micdata, psecuritypriv->dot118021XGrptxmickey[psecuritypriv->dot118021XGrpKeyid].skey);
+			}
+			else
+			{
+				if(_rtw_memcmp(&stainfo->dot11tkiptxmickey.skey[0],null_key, 16)==_TRUE){
+					//DbgPrint("\nxmitframe_addmic:stainfo->dot11tkiptxmickey==0\n");
+					//rtw_msleep_os(10);
+					return _FAIL;
+				}
+				//start to calculate the mic code
+				rtw_secmicsetkey(&micdata, &stainfo->dot11tkiptxmickey.skey[0]);
+			}
+			
+			if(pframe[1]&1){   //ToDS==1
+				rtw_secmicappend(&micdata, &pframe[16], 6);  //DA
+				if(pframe[1]&2)  //From Ds==1
+					rtw_secmicappend(&micdata, &pframe[24], 6);
+				else
+				rtw_secmicappend(&micdata, &pframe[10], 6);		
+			}	
+			else{	//ToDS==0
+				rtw_secmicappend(&micdata, &pframe[4], 6);   //DA
+				if(pframe[1]&2)  //From Ds==1
+					rtw_secmicappend(&micdata, &pframe[16], 6);
+				else
+					rtw_secmicappend(&micdata, &pframe[10], 6);
+
+			}
+
+                    //if(pqospriv->qos_option==1)
+                    if(pattrib->qos_en)
+				priority[0]=(u8)pxmitframe->attrib.priority;
+
+			
+			rtw_secmicappend(&micdata, &priority[0], 4);
+	
+			payload=pframe;
+
+			for(curfragnum=0;curfragnum<pattrib->nr_frags;curfragnum++){
+				payload=(u8 *)RND4((SIZE_PTR)(payload));
+				RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("===curfragnum=%d, pframe= 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x,!!!\n",
+					curfragnum,*payload, *(payload+1),*(payload+2),*(payload+3),*(payload+4),*(payload+5),*(payload+6),*(payload+7)));
+
+				payload=payload+pattrib->hdrlen+pattrib->iv_len;
+				RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("curfragnum=%d pattrib->hdrlen=%d pattrib->iv_len=%d",curfragnum,pattrib->hdrlen,pattrib->iv_len));
+				if((curfragnum+1)==pattrib->nr_frags){
+					length=pattrib->last_txcmdsz-pattrib->hdrlen-pattrib->iv_len-( (pattrib->bswenc) ? pattrib->icv_len : 0);
+					rtw_secmicappend(&micdata, payload,length);
+					payload=payload+length;
+				}
+				else{
+					length=pxmitpriv->frag_len-pattrib->hdrlen-pattrib->iv_len-( (pattrib->bswenc) ? pattrib->icv_len : 0);
+					rtw_secmicappend(&micdata, payload, length);
+					payload=payload+length+pattrib->icv_len;
+					RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("curfragnum=%d length=%d pattrib->icv_len=%d",curfragnum,length,pattrib->icv_len));
+				}
+			}
+			rtw_secgetmic(&micdata,&(mic[0]));
+			RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("xmitframe_addmic: before add mic code!!!\n"));
+			RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("xmitframe_addmic: pattrib->last_txcmdsz=%d!!!\n",pattrib->last_txcmdsz));
+			RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("xmitframe_addmic: mic[0]=0x%.2x ,mic[1]=0x%.2x ,mic[2]=0x%.2x ,mic[3]=0x%.2x \n\
+  mic[4]=0x%.2x ,mic[5]=0x%.2x ,mic[6]=0x%.2x ,mic[7]=0x%.2x !!!!\n",
+				mic[0],mic[1],mic[2],mic[3],mic[4],mic[5],mic[6],mic[7]));
+			//add mic code  and add the mic code length in last_txcmdsz
+
+			_rtw_memcpy(payload, &(mic[0]),8);
+			pattrib->last_txcmdsz+=8;
+			
+			RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("\n ========last pkt========\n"));
+			payload=payload-pattrib->last_txcmdsz+8;
+			for(curfragnum=0;curfragnum<pattrib->last_txcmdsz;curfragnum=curfragnum+8)
+					RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,(" %.2x,  %.2x,  %.2x,  %.2x,  %.2x,  %.2x,  %.2x,  %.2x ",
+					*(payload+curfragnum), *(payload+curfragnum+1), *(payload+curfragnum+2),*(payload+curfragnum+3),
+					*(payload+curfragnum+4),*(payload+curfragnum+5),*(payload+curfragnum+6),*(payload+curfragnum+7)));
+			}
+			else{
+				RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("xmitframe_addmic: rtw_get_stainfo==NULL!!!\n"));
+			}
+	}
+	
+_func_exit_;
+
+	return _SUCCESS;
+}
+
+static s32 xmitframe_swencrypt(_adapter *padapter, struct xmit_frame *pxmitframe){
+
+	struct	pkt_attrib	 *pattrib = &pxmitframe->attrib;
+	//struct 	security_priv	*psecuritypriv=&padapter->securitypriv;
+	
+_func_enter_;
+
+	//if((psecuritypriv->sw_encrypt)||(pattrib->bswenc))	
+	if(pattrib->bswenc)
+	{
+		//DBG_8192C("start xmitframe_swencrypt\n");
+		RT_TRACE(_module_rtl871x_xmit_c_,_drv_alert_,("### xmitframe_swencrypt\n"));
+		switch(pattrib->encrypt){
+		case _WEP40_:
+		case _WEP104_:
+			rtw_wep_encrypt(padapter, (u8 *)pxmitframe);
+			break;
+		case _TKIP_:
+			rtw_tkip_encrypt(padapter, (u8 *)pxmitframe);
+			break;
+		case _AES_:
+			rtw_aes_encrypt(padapter, (u8 * )pxmitframe);
+			break;
+		default:
+				break;
+		}
+
+	} else {
+		RT_TRACE(_module_rtl871x_xmit_c_,_drv_notice_,("### xmitframe_hwencrypt\n"));
+	}
+
+_func_exit_;
+
+	return _SUCCESS;
+}
+
+s32 rtw_make_wlanhdr (_adapter *padapter , u8 *hdr, struct pkt_attrib *pattrib)
+{
+	u16 *qc;
+
+	struct ieee80211_hdr *pwlanhdr = (struct ieee80211_hdr *)hdr;
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+	struct qos_priv *pqospriv = &pmlmepriv->qospriv;
+        u8 qos_option = _FALSE;
+#ifdef CONFIG_TDLS
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct sta_priv 	*pstapriv = &padapter->stapriv;
+	struct sta_info *ptdls_sta=NULL;
+	u8 tdls_seq=0;
+#endif
+
+//#ifdef CONFIG_PWRCTRL
+//	struct pwrctrl_priv *pwrpriv = &(padapter->pwrctrlpriv);
+//#endif
+
+	sint res = _SUCCESS;
+	u16 *fctrl = &pwlanhdr->frame_ctl;
+
+	struct sta_info *psta;
+
+	sint bmcst = IS_MCAST(pattrib->ra);
+
+_func_enter_;
+
+	if (pattrib->psta) {
+		psta = pattrib->psta;
+	} else {
+		if(bmcst) {
+			psta = rtw_get_bcmc_stainfo(padapter);
+		} else {
+			psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra);
+		}
+	}
+
+	_rtw_memset(hdr, 0, WLANHDR_OFFSET);
+
+	SetFrameSubType(fctrl, pattrib->subtype);
+
+	if (pattrib->subtype & WIFI_DATA_TYPE)
+	{
+		if ((check_fwstate(pmlmepriv,  WIFI_STATION_STATE) == _TRUE)) {
+			//to_ds = 1, fr_ds = 0;
+#ifdef CONFIG_TDLS
+			if((pmlmeinfo->tdls_setup_state==TDLS_LINKED_STATE)){
+				ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst);
+				if((ptdls_sta!=NULL)&&((ptdls_sta->state & TDLS_LINKED_STATE)==TDLS_LINKED_STATE)&&(pattrib->ether_type!=0x0806)){
+					//TDLS data transfer, ToDS=0, FrDs=0
+					_rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN);
+					_rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN);
+					_rtw_memcpy(pwlanhdr->addr3, get_bssid(pmlmepriv), ETH_ALEN);
+					tdls_seq=1;
+				}else{
+					// 1.usual data transfer
+					// 2.Arp pkt will relayed by AP
+					SetToDs(fctrl);							
+					_rtw_memcpy(pwlanhdr->addr1, get_bssid(pmlmepriv), ETH_ALEN);
+					_rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN);
+					_rtw_memcpy(pwlanhdr->addr3, pattrib->dst, ETH_ALEN);
+				} 
+			}else
+#endif
+			{
+				//usual data transfer
+				SetToDs(fctrl);							
+				_rtw_memcpy(pwlanhdr->addr1, get_bssid(pmlmepriv), ETH_ALEN);
+				_rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN);
+				_rtw_memcpy(pwlanhdr->addr3, pattrib->dst, ETH_ALEN);
+			} 
+
+			if (pqospriv->qos_option)
+				qos_option = _TRUE;
+
+		}
+		else if ((check_fwstate(pmlmepriv,  WIFI_AP_STATE) == _TRUE) ) {
+			//to_ds = 0, fr_ds = 1;
+			SetFrDs(fctrl);
+			_rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN);
+			_rtw_memcpy(pwlanhdr->addr2, get_bssid(pmlmepriv), ETH_ALEN);
+			_rtw_memcpy(pwlanhdr->addr3, pattrib->src, ETH_ALEN);
+
+			if(psta->qos_option)			
+				qos_option = _TRUE;
+		}
+		else if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) ||
+		(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) {
+			_rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN);
+			_rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN);
+			_rtw_memcpy(pwlanhdr->addr3, get_bssid(pmlmepriv), ETH_ALEN);
+
+			if(psta->qos_option)			
+				qos_option = _TRUE;
+		}
+		else {
+			RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("fw_state:%x is not allowed to xmit frame\n", get_fwstate(pmlmepriv)));
+			res = _FAIL;
+			goto exit;
+		}
+
+/*#ifdef CONFIG_PWRCTRL
+		if (pwrpriv->cpwm >= FW_PWR1 && !(padapter->mlmepriv.sitesurveyctrl.traffic_busy))
+			SetPwrMgt(fctrl);
+#else
+		if ((get_fwstate(pmlmepriv)) & WIFI_SLEEP_STATE)
+			SetPwrMgt(fctrl);
+#endif*/
+
+		if(pattrib->mdata)
+			SetMData(fctrl);
+
+		if (pattrib->encrypt)
+			SetPrivacy(fctrl);
+
+		if (qos_option)
+		{
+			qc = (unsigned short *)(hdr + pattrib->hdrlen - 2);
+
+			if (pattrib->priority)
+				SetPriority(qc, pattrib->priority);
+
+
+			SetEOSP(qc, pattrib->eosp);
+
+			SetAckpolicy(qc, pattrib->ack_policy);
+		}
+
+		//TODO: fill HT Control Field
+
+		//Update Seq Num will be handled by f/w
+		{
+		
+#ifdef CONFIG_TDLS
+			//  1. update seq_num per link by sta_info
+			//  2. rewrite encrypt to _AES_, also rewrite iv_len, icv_len
+			if(tdls_seq==1){
+				ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority]++;
+				ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority] &= 0xFFF;
+
+				pattrib->seqnum = ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority];
+
+				SetSeqNum(hdr, pattrib->seqnum);
+
+				if (pattrib->encrypt){
+					pattrib->encrypt= _AES_;
+					pattrib->iv_len=8;
+					pattrib->icv_len=8;
+				}
+			}else 
+#endif
+			if(psta){
+				psta->sta_xmitpriv.txseq_tid[pattrib->priority]++;
+				psta->sta_xmitpriv.txseq_tid[pattrib->priority] &= 0xFFF;
+
+				pattrib->seqnum = psta->sta_xmitpriv.txseq_tid[pattrib->priority];
+		
+				SetSeqNum(hdr, pattrib->seqnum);
+
+
+				//check if enable ampdu
+				if(pattrib->ht_en && psta->htpriv.ampdu_enable)
+				{
+					if(psta->htpriv.agg_enable_bitmap & BIT(pattrib->priority))
+					pattrib->ampdu_en = _TRUE;
+				}
+
+				//re-check if enable ampdu by BA_starting_seqctrl
+				if(pattrib->ampdu_en == _TRUE)
+				{					
+					u16 tx_seq;
+
+					tx_seq = psta->BA_starting_seqctrl[pattrib->priority & 0x0f];
+		
+					//check BA_starting_seqctrl
+					if(SN_LESS(pattrib->seqnum, tx_seq))
+					{
+						//DBG_871X("tx ampdu seqnum(%d) < tx_seq(%d)\n", pattrib->seqnum, tx_seq);
+						pattrib->ampdu_en = _FALSE;//AGG BK
+					}
+					else if(SN_EQUAL(pattrib->seqnum, tx_seq))
+					{					
+						psta->BA_starting_seqctrl[pattrib->priority & 0x0f] = (tx_seq+1)&0xfff;
+					
+						pattrib->ampdu_en = _TRUE;//AGG EN
+					}
+					else
+					{
+						//DBG_871X("tx ampdu over run\n");
+						psta->BA_starting_seqctrl[pattrib->priority & 0x0f] = (pattrib->seqnum+1)&0xfff;
+						pattrib->ampdu_en = _TRUE;//AGG EN
+					}
+
+				}
+
+			}
+		}
+		
+	}
+	else
+	{
+
+	}
+
+exit:
+
+_func_exit_;
+
+	return res;
+}
+
+s32 rtw_txframes_pending(_adapter *padapter)
+{
+	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
+
+	return ((_rtw_queue_empty(&pxmitpriv->be_pending) == _FALSE) || 
+			 (_rtw_queue_empty(&pxmitpriv->bk_pending) == _FALSE) || 
+			 (_rtw_queue_empty(&pxmitpriv->vi_pending) == _FALSE) ||
+			 (_rtw_queue_empty(&pxmitpriv->vo_pending) == _FALSE));
+}
+
+s32 rtw_txframes_sta_ac_pending(_adapter *padapter, struct pkt_attrib *pattrib)
+{	
+	struct sta_info *psta;
+	struct tx_servq *ptxservq;
+	int priority = pattrib->priority;
+
+	psta = pattrib->psta;
+	
+	switch(priority) 
+	{
+			case 1:
+			case 2:
+				ptxservq = &(psta->sta_xmitpriv.bk_q);				
+				break;
+			case 4:
+			case 5:
+				ptxservq = &(psta->sta_xmitpriv.vi_q);				
+				break;
+			case 6:
+			case 7:
+				ptxservq = &(psta->sta_xmitpriv.vo_q);							
+				break;
+			case 0:
+			case 3:
+			default:
+				ptxservq = &(psta->sta_xmitpriv.be_q);							
+			break;
+	
+	}	
+
+	return ptxservq->qcnt;	
+}
+
+#ifdef CONFIG_TDLS
+void fill_tdls_setup_req_frbody(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe)
+{
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &pmlmeext->mlmext_info;
+	struct pkt_attrib	*pattrib = &pxmitframe->attrib;
+	struct registry_priv	*pregistrypriv = &padapter->registrypriv;
+	struct ieee80211_ht_cap ht_capie;	
+	struct sta_priv *pstapriv=&padapter->stapriv;
+	struct sta_info *ptdls_sta=rtw_get_stainfo(pstapriv, pattrib->dst);
+
+	u8 payload_type = 0x02;
+	unsigned char category = WLAN_CATEGORY_TDLS;
+	unsigned char action = TDLS_SETUP_REQUEST;
+	unsigned char	bssrate[NumRates];
+ 	int	bssrate_len = 0, i = 0 ;
+	u8 more_supportedrates = 0;
+	u8 country[8] = {0};
+	u8 ext_cap_ie[5] = {0x00, 0x00, 0x00, 0x50, 0x20};	//bit(28), bit(30), bit(37)
+	unsigned int ie_len;
+	unsigned char *p;
+	struct registry_priv	 *pregpriv = &padapter->registrypriv;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct mlme_priv 		*pmlmepriv = &padapter->mlmepriv;
+	struct ht_priv			*phtpriv = &pmlmepriv->htpriv;
+	u8 link_id_addr[18] = {0};
+	u8 sup_ch[2]={ 1, 11 };	//First ch. no., no.of ch.
+	//RSNIE
+	u8 RSNIE[20]=
+	{	0x01, 0x00,	//version shall be set to 1
+		0x00, 0x0f, 0xac, 0x07,	//group sipher suite
+		0x01, 0x00,	//pairwise cipher suite count
+		0x00, 0x0f, 0xac, 0x04,	//pairwise cipher suite list; CCMP only
+		0x01, 0x00,	//AKM suite count
+		0x00, 0x0f, 0xac, 0x07,	//TPK Handshake
+		0x00, 0x02,
+		//PMKID shall not be present
+	};
+	u8 wmm_ie[7]={0x00, 0x50, 0xf2, 0x02, 0x00, 0x01, 0x00};	//Qos info all set zero
+	u8 iedata=0;
+	u8 timeout_itvl[5];	//set timeout interval to maximum value
+	u32 time;
+
+	//SNonce	
+	if(pattrib->encrypt){
+		for(i=0;i<8;i++){
+			time=rtw_get_current_time();
+			_rtw_memcpy(&ptdls_sta->SNonce[4*i], (u8 *)&time, 4);
+		}
+	}
+
+	//payload type
+	pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen));
+	//category, action, dialog token
+	pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(pattrib->nr_frags), &(pattrib->pktlen));
+
+	//capability
+	_rtw_memcpy(pframe, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2);
+
+	if(pattrib->encrypt)
+		*pframe =*pframe | BIT(4);
+	pframe += 2;
+	pattrib->pktlen += 2;
+
+	//supported rates
+ 	for (bssrate_len = 0; bssrate_len < NumRates; bssrate_len++) {
+		if (pregistrypriv->dev_network.SupportedRates[bssrate_len]== 0) break;
+		bssrate[bssrate_len] = pregistrypriv->dev_network.SupportedRates[bssrate_len];
+	}
+
+	if (bssrate_len > 8)
+	{
+		pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen));
+		more_supportedrates = 1;
+	}
+	else
+	{
+		pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen));
+	}
+
+	//country(optional)
+	//extended supported rates
+	if(more_supportedrates==1){
+		pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen));
+	}
+
+	//supported channels
+	pframe = rtw_set_ie(pframe, _SUPPORTED_CH_IE_, 2, sup_ch, &(pattrib->pktlen));
+	
+	//RSNIE
+	if(pattrib->encrypt)
+		pframe = rtw_set_ie(pframe, _RSN_IE_2_, 20, RSNIE, &(pattrib->pktlen));
+	
+	//extended capabilities
+	pframe = rtw_set_ie(pframe, _EXT_CAP_IE_ , 5, ext_cap_ie, &(pattrib->pktlen));
+
+	//QoS capability(WMM_IE)
+	pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 7, wmm_ie,  &(pattrib->pktlen));
+
+	//FTIE(optional)
+	if(pattrib->encrypt){
+		_rtw_memset(pframe, 0, 84);	//All fields except SNonce shall be set to 0
+		_rtw_memset(pframe, _FTIE_, 1);	//version
+		_rtw_memset((pframe+1), 82, 1);	//length
+		_rtw_memcpy((pframe+52), ptdls_sta->SNonce, 32);
+		pframe += 84;
+		pattrib->pktlen += 84;
+	//Timeout interval
+	timeout_itvl[0]=0x02;
+	_rtw_memcpy(timeout_itvl+1, (u8 *)(&ptdls_sta->TDLS_PeerKey_Lifetime), 4);
+	pframe = rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, 5, timeout_itvl,  &(pattrib->pktlen));
+
+	}
+
+	//Sup_reg_classes(optional)
+	//HT capabilities
+	_rtw_memset(&ht_capie, 0, sizeof(struct ieee80211_ht_cap));
+
+	ht_capie.cap_info = IEEE80211_HT_CAP_SUP_WIDTH |IEEE80211_HT_CAP_SGI_20 |IEEE80211_HT_CAP_SM_PS |
+						IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_TX_STBC |IEEE80211_HT_CAP_DSSSCCK40;
+
+	{
+		u32 rx_packet_offset, max_recvbuf_sz;
+		padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_RX_PACKET_OFFSET, &rx_packet_offset);
+		padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz);
+		if(max_recvbuf_sz-rx_packet_offset>(8191-256))
+			ht_capie.cap_info = ht_capie.cap_info |IEEE80211_HT_CAP_MAX_AMSDU;
+	}
+	
+	ht_capie.ampdu_params_info = (IEEE80211_HT_CAP_AMPDU_FACTOR&0x03) |
+									(IEEE80211_HT_CAP_AMPDU_DENSITY&0x00) ; 
+
+	switch(pHalData->rf_type)
+	{
+		case RF_1T1R:
+			ht_capie.cap_info |= 0x0100;//RX STBC One spatial stream
+			_rtw_memcpy(ht_capie.supp_mcs_set, MCS_rate_1R, 16);
+			break;
+
+		case RF_2T2R:
+		case RF_1T2R:
+		default:
+			ht_capie.cap_info|= 0x0200;//RX STBC two spatial stream
+			_rtw_memcpy(ht_capie.supp_mcs_set, MCS_rate_2R, 16);
+			break;
+	}
+			
+	pframe = rtw_set_ie(pframe, _HT_CAPABILITY_IE_, 
+						sizeof(struct ieee80211_ht_cap), (unsigned char*)&ht_capie, &(pattrib->pktlen));
+
+	//20/40 BSS coexistence
+	if(pmlmepriv->num_FortyMHzIntolerant>0)
+		iedata |= BIT(2);//20 MHz BSS Width Request
+	pframe = rtw_set_ie(pframe, EID_BSSCoexistence,  1, &iedata, &(pattrib->pktlen));
+	
+	//Link identifier
+	_rtw_memcpy(link_id_addr, pattrib->ra, 6);
+	_rtw_memcpy((link_id_addr+6), pattrib->src, 6);
+	_rtw_memcpy((link_id_addr+12), pattrib->dst, 6);
+	pframe = rtw_set_ie(pframe, _LINK_ID_IE_,  18, link_id_addr, &(pattrib->pktlen));
+	
+}
+
+void fill_tdls_setup_rsp_frbody(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe)
+{
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct pkt_attrib	*pattrib = &pxmitframe->attrib;
+	struct sta_info *ptdls_sta;
+   	struct sta_priv *pstapriv = &padapter->stapriv;
+	struct registry_priv	*pregistrypriv = &padapter->registrypriv;
+	struct ieee80211_ht_cap ht_capie;	
+
+	u8 payload_type = 0x02;	
+	unsigned char category = WLAN_CATEGORY_TDLS;
+	unsigned char action = TDLS_SETUP_RESPONSE;
+	unsigned char	bssrate[NumRates];	
+	int	bssrate_len = 0;
+	u8 more_supportedrates = 0;
+	u8 country[8] = {0};
+	u16 *stat_code = (u16 *)&pattrib->type;
+	u8 *dialog_token = &pattrib->nr_frags;
+	u8 ext_cap_ie[5] = {0x00, 0x00, 0x00, 0x50, 0x20};	//bit(28), bit(30), bit(37)
+	unsigned int ie_len;
+	unsigned char *p;
+	struct registry_priv	 *pregpriv = &padapter->registrypriv;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct mlme_priv 		*pmlmepriv = &padapter->mlmepriv;
+	struct ht_priv			*phtpriv = &pmlmepriv->htpriv;
+	u8 link_id_addr[18] = {0};
+	u8 sup_ch[2]={ 1, 11 };	//First ch. no., no.of ch	
+	u8 wmm_ie[7]={0x00, 0x50, 0xf2, 0x02, 0x00, 0x01, 0x00};	//Qos info all set zero
+	u8 iedata=0;
+	u8 timeout_itvl[5];	//setup response timeout interval will copy from request
+	u8 ANonce[32];	//maybe it can put in ontdls_req
+	u8 k;		//for random ANonce
+	u8 RSNIE[20]=
+	{	0x01, 0x00,	//version shall be set to 1
+		0x00, 0x0f, 0xac, 0x07,	//group sipher suite
+		0x01, 0x00,	//pairwise cipher suite count
+		0x00, 0x0f, 0xac, 0x04,	//pairwise cipher suite list; CCMP only
+		0x01, 0x00,	//AKM suite count
+		0x00, 0x0f, 0xac, 0x07,	//TPK Handshake
+		0x00, 0x02,
+		//PMKID shall not be present
+	};
+	u8  *pftie, *ptimeout_ie, *plinkid_ie, *prsnie, *pftie_mic;
+	u32 time;
+
+	ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst);
+	if(pattrib->encrypt){
+		for(k=0;k<8;k++){
+			time=rtw_get_current_time();
+			_rtw_memcpy(&ptdls_sta->ANonce[4*k], (u8*)&time, 4);
+		}
+	}
+
+	//payload type
+	pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen));	
+	//category, action, status code
+	pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 2, (u8 *)&ptdls_sta->stat_code, &(pattrib->pktlen));
+
+	if(ptdls_sta->stat_code!=0)	//invalid setup request
+		return;
+	
+	//dialog token
+	pframe = rtw_set_fixed_ie(pframe, 1, dialog_token, &(pattrib->pktlen));
+
+	//capability
+	_rtw_memcpy(pframe, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2);
+
+	if(pattrib->encrypt )
+		*pframe =*pframe | BIT(4);
+	pframe += 2;
+	pattrib->pktlen += 2;
+
+	//supported rates
+ 	for (bssrate_len = 0; bssrate_len < NumRates; bssrate_len++) {
+		if (pregistrypriv->dev_network.SupportedRates[bssrate_len]== 0) break;
+		bssrate[bssrate_len] = pregistrypriv->dev_network.SupportedRates[bssrate_len];
+	}
+
+	if (bssrate_len > 8)
+	{
+		pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen));
+		more_supportedrates = 1;
+	}
+	else
+	{
+		pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen));
+	}
+
+	//country(optional)
+	//extended supported rates
+	if(more_supportedrates==1){
+		pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen));
+	}
+
+	//supported channels
+	pframe = rtw_set_ie(pframe, _SUPPORTED_CH_IE_, 2, sup_ch, &(pattrib->pktlen));
+	
+	//RSNIE
+	if(pattrib->encrypt){
+		prsnie = pframe;
+		pframe = rtw_set_ie(pframe, _RSN_IE_2_, 20, RSNIE, &(pattrib->pktlen));
+	}
+
+	//extended capabilities
+	pframe = rtw_set_ie(pframe, _EXT_CAP_IE_ , 5, ext_cap_ie, &(pattrib->pktlen));
+
+	//QoS capability(WMM_IE)
+	pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 7, wmm_ie,  &(pattrib->pktlen));
+
+	//FTIE(optional)
+	if(pattrib->encrypt){
+		wpa_tdls_generate_tpk(padapter, ptdls_sta);
+
+		pftie = pframe;
+		pftie_mic = pframe+4;
+		_rtw_memset(pframe, 0, 84);	//All fields except SNonce shall be set to 0
+		_rtw_memset(pframe, _FTIE_, 1);	//version
+		_rtw_memset((pframe+1), 82, 1);	//length
+		_rtw_memcpy((pframe+20), ptdls_sta->ANonce, 32);
+		_rtw_memcpy((pframe+52), ptdls_sta->SNonce, 32);
+		pframe += 84;
+		pattrib->pktlen += 84;
+
+	//Timeout interval
+		ptimeout_ie = pframe;
+		timeout_itvl[0]=0x02;
+		_rtw_memcpy(timeout_itvl+1, (u8 *)(&ptdls_sta->TDLS_PeerKey_Lifetime), 4);
+		pframe = rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, 5, timeout_itvl,  &(pattrib->pktlen));
+	}
+
+	//Sup_reg_classes(optional)
+	//HT capabilities
+	_rtw_memset(&ht_capie, 0, sizeof(struct ieee80211_ht_cap));
+
+	ht_capie.cap_info = IEEE80211_HT_CAP_SUP_WIDTH |IEEE80211_HT_CAP_SGI_20 |IEEE80211_HT_CAP_SM_PS |
+						IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_TX_STBC |IEEE80211_HT_CAP_DSSSCCK40;
+
+	{
+		u32 rx_packet_offset, max_recvbuf_sz;
+		padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_RX_PACKET_OFFSET, &rx_packet_offset);
+		padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz);
+		if(max_recvbuf_sz-rx_packet_offset>(8191-256))
+			ht_capie.cap_info = ht_capie.cap_info |IEEE80211_HT_CAP_MAX_AMSDU;
+	}
+	
+	ht_capie.ampdu_params_info = (IEEE80211_HT_CAP_AMPDU_FACTOR&0x03) |
+									(IEEE80211_HT_CAP_AMPDU_DENSITY&0x00) ; 
+
+	switch(pHalData->rf_type)
+	{
+		case RF_1T1R:
+			ht_capie.cap_info |= 0x0100;//RX STBC One spatial stream
+			_rtw_memcpy(ht_capie.supp_mcs_set, MCS_rate_1R, 16);
+			break;
+
+		case RF_2T2R:
+		case RF_1T2R:
+		default:
+			ht_capie.cap_info|= 0x0200;//RX STBC two spatial stream
+			_rtw_memcpy(ht_capie.supp_mcs_set, MCS_rate_2R, 16);
+			break;
+	}
+			
+	pframe = rtw_set_ie(pframe, _HT_CAPABILITY_IE_, 
+						sizeof(struct ieee80211_ht_cap), (unsigned char*)&ht_capie, &(pattrib->pktlen));
+
+	//20/40 BSS coexistence
+	if(pmlmepriv->num_FortyMHzIntolerant>0)
+		iedata |= BIT(2);//20 MHz BSS Width Request
+	pframe = rtw_set_ie(pframe, EID_BSSCoexistence,  1, &iedata, &(pattrib->pktlen));
+
+	//Link identifier
+	plinkid_ie = pframe;
+	_rtw_memcpy(link_id_addr, pattrib->ra, 6);
+	_rtw_memcpy((link_id_addr+6), pattrib->dst, 6);
+	_rtw_memcpy((link_id_addr+12), pattrib->src, 6);
+	pframe = rtw_set_ie(pframe, _LINK_ID_IE_,  18, link_id_addr, &(pattrib->pktlen));
+
+	//fill ftie mic
+	if(pattrib->encrypt)
+		wpa_tdls_ftie_mic(ptdls_sta->tpk.kck, 2, plinkid_ie, prsnie, ptimeout_ie, pftie, pftie_mic);
+	
+}
+
+void fill_tdls_setup_cfm_frbody(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe)
+{
+
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct pkt_attrib	*pattrib = &pxmitframe->attrib;
+	struct sta_priv *pstapriv = &padapter->stapriv;
+	struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst);
+
+	u8 payload_type = 0x02;	
+	unsigned char category = WLAN_CATEGORY_TDLS;
+	unsigned char action = TDLS_SETUP_CONFIRM;
+	unsigned char	bssrate[NumRates];	
+	int	bssrate_len = 0;
+	u8 more_supportedrates = 0;
+	u8 country[8] = {0};
+	u8 *dialog_token = &pattrib->nr_frags;
+	u8 ext_cap_ie[5] = {0x00, 0x00, 0x00, 0x50, 0x20};	//bit(28), bit(30), bit(37)
+	unsigned int ie_len;
+	unsigned char *p;
+	u8 timeout_itvl[5];	//set timeout interval to maximum value
+	u8 RSNIE[20]=
+	{	0x01, 0x00,	//version shall be set to 1
+		0x00, 0x0f, 0xac, 0x07,	//group sipher suite
+		0x01, 0x00,	//pairwise cipher suite count
+		0x00, 0x0f, 0xac, 0x04,	//pairwise cipher suite list; CCMP only
+		0x01, 0x00,	//AKM suite count
+		0x00, 0x0f, 0xac, 0x07,	//TPK Handshake
+		0x00, 0x02,
+		//PMKID shall not be present
+	};
+	struct registry_priv	 *pregpriv = &padapter->registrypriv;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct mlme_priv 		*pmlmepriv = &padapter->mlmepriv;
+	struct ht_priv			*phtpriv = &pmlmepriv->htpriv;
+	u8	link_id_addr[18] = {0};
+	u8  *pftie, *ptimeout_ie, *plinkid_ie, *prsnie, *pftie_mic;
+
+	//payload type
+	pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen));
+	//category, action, status code, dialog token
+	pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 2, (u8 *)&ptdls_sta->stat_code, &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, dialog_token, &(pattrib->pktlen));
+
+	if(ptdls_sta->stat_code!=0)	//invalid setup request
+		return;
+	
+	//RSNIE
+	if(pattrib->encrypt){
+		prsnie = pframe;
+		pframe = rtw_set_ie(pframe, _RSN_IE_2_, 20, RSNIE, &(pattrib->pktlen));
+	}
+	
+	//EDCA param set; WMM param ele.
+	if(pattrib->encrypt){
+		//FTIE
+		pftie = pframe;
+		pftie_mic = pframe+4;
+		_rtw_memset(pframe, 0, 84);	//All fields except SNonce shall be set to 0
+		_rtw_memset(pframe, _FTIE_, 1);	//version
+		_rtw_memset((pframe+1), 82, 1);	//length
+		_rtw_memcpy((pframe+20), ptdls_sta->ANonce, 32);
+		_rtw_memcpy((pframe+52), ptdls_sta->SNonce, 32);
+		pframe += 84;
+		pattrib->pktlen += 84;
+
+		//Timeout interval
+		ptimeout_ie = pframe;
+		timeout_itvl[0]=0x02;
+		_rtw_memcpy(timeout_itvl+1, (u8 *)(&ptdls_sta->TDLS_PeerKey_Lifetime), 4);
+		ptdls_sta->TPK_count=0;
+		_set_timer(&ptdls_sta->TPK_timer, ptdls_sta->TDLS_PeerKey_Lifetime/TPK_RESEND_COUNT);
+		pframe = rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, 5, timeout_itvl,  &(pattrib->pktlen));
+	}
+
+	//HT operation; todo
+	//Link identifier
+	plinkid_ie = pframe;
+	_rtw_memcpy(link_id_addr, pattrib->ra, 6);
+	_rtw_memcpy((link_id_addr+6), pattrib->src, 6);
+	_rtw_memcpy((link_id_addr+12), pattrib->dst, 6);
+	pframe = rtw_set_ie(pframe, _LINK_ID_IE_,  18, link_id_addr, &(pattrib->pktlen));
+
+	//fill ftie mic
+	if(pattrib->encrypt)
+		wpa_tdls_ftie_mic(ptdls_sta->tpk.kck, 3, plinkid_ie, prsnie, ptimeout_ie, pftie, pftie_mic);
+
+}
+
+void fill_tdls_teardown_frbody(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe)
+{
+
+	struct pkt_attrib	*pattrib = &pxmitframe->attrib;
+	u8 payload_type = 0x02;
+	unsigned char category = WLAN_CATEGORY_TDLS;
+	unsigned char action = TDLS_TEARDOWN;
+	unsigned char reason = _RSON_TDLS_TEAR_UN_RSN_;
+	u8	link_id_addr[18] = {0};
+	
+	struct sta_info *ptear_sta = NULL;
+	struct sta_priv 	*pstapriv = &padapter->stapriv;
+
+	//payload type
+	pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen));	
+	//category, action, reason code
+	pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(reason), &(pattrib->pktlen));
+
+	//Link identifier
+	ptear_sta = rtw_get_stainfo(pstapriv, pattrib->dst);
+	if((ptear_sta->state & TDLS_INITIATOR_STATE)==TDLS_INITIATOR_STATE){	
+		_rtw_memcpy(link_id_addr, pattrib->ra, 6);
+		_rtw_memcpy((link_id_addr+6), pattrib->src, 6);
+		_rtw_memcpy((link_id_addr+12), pattrib->dst, 6);
+	}else  if((ptear_sta->state & TDLS_RESPONDER_STATE)==TDLS_RESPONDER_STATE){
+		_rtw_memcpy(link_id_addr, pattrib->ra, 6);
+		_rtw_memcpy((link_id_addr+6), pattrib->dst, 6);
+		_rtw_memcpy((link_id_addr+12), pattrib->src, 6);
+	}
+	pframe = rtw_set_ie(pframe, _LINK_ID_IE_,  18, link_id_addr, &(pattrib->pktlen));
+	
+}
+
+void fill_tdls_dis_req_frbody(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe)
+{
+
+	struct pkt_attrib	*pattrib = &pxmitframe->attrib;
+	u8 payload_type = 0x02;
+	unsigned char category = WLAN_CATEGORY_TDLS;
+	unsigned char action = TDLS_DISCOVERY_REQUEST;
+	u8	link_id_addr[18] = {0};
+
+	//payload type
+	pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen));		
+	//category, action, reason code
+	pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(pattrib->nr_frags), &(pattrib->pktlen));
+
+	//Link identifier
+	_rtw_memcpy(link_id_addr, pattrib->ra, 6);
+	_rtw_memcpy((link_id_addr+6), pattrib->src, 6);
+	_rtw_memcpy((link_id_addr+12), pattrib->dst, 6);
+	pframe = rtw_set_ie(pframe, _LINK_ID_IE_,  18, link_id_addr, &(pattrib->pktlen));
+	
+}
+
+void fill_tdls_dis_rsp_frbody(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe)
+{
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &pmlmeext->mlmext_info;
+	struct pkt_attrib	*pattrib = &pxmitframe->attrib;
+	struct registry_priv	*pregistrypriv = &padapter->registrypriv;
+	struct ieee80211_ht_cap ht_capie;
+
+	unsigned char category = WLAN_CATEGORY_PUBLIC;
+	unsigned char action = TDLS_DISCOVERY_RESPONSE;
+	unsigned char	bssrate[NumRates];
+ 	int bssrate_len = 0;
+	u8 more_supportedrates = 0;
+	u8 country[8] = {0};
+	u8 ext_cap_ie[5] = {0x00, 0x00, 0x00, 0x50, 0x20};	//bit(28), bit(30), bit(37)
+	unsigned int ie_len;
+	unsigned char *p;
+	struct registry_priv	 *pregpriv = &padapter->registrypriv;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct mlme_priv 		*pmlmepriv = &padapter->mlmepriv;
+	struct ht_priv			*phtpriv = &pmlmepriv->htpriv;
+	u8 link_id_addr[18] = {0};
+	u8 sup_ch[2]={ 1, 11 };	//First ch. no., no.of ch.
+	//RSNIE
+	u8 RSNIE[20]=
+	{	0x01, 0x00,	//version shall be set to 1
+		0x00, 0x0f, 0xac, 0x07,	//group sipher suite
+		0x01, 0x00,	//pairwise cipher suite count
+		0x00, 0x0f, 0xac, 0x04,	//pairwise cipher suite list; CCMP only
+		0x01, 0x00,	//AKM suite count
+		0x00, 0x0f, 0xac, 0x07,	//TPK Handshake
+		0x00, 0x02,
+		//PMKID shall not be present
+	};
+	u8 wmm_ie[7]={0x00, 0x50, 0xf2, 0x02, 0x00, 0x01, 0x00};	//Qos info all set zero
+	u8 iedata=0;
+	u8 timeout_itvl[5];	//set timeout interval to maximum value
+	u32 timeout_interval= TPK_RESEND_COUNT * 1000;
+	
+	//category, action, dialog token
+	pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(pattrib->nr_frags), &(pattrib->pktlen));
+
+	//capability
+	_rtw_memcpy(pframe, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2);
+
+	if(pattrib->encrypt)
+		*pframe =*pframe | BIT(4);
+	pframe += 2;
+	pattrib->pktlen += 2;
+
+	//supported rates
+ 	for (bssrate_len = 0; bssrate_len < NumRates; bssrate_len++) {
+		if (pregistrypriv->dev_network.SupportedRates[bssrate_len] == 0) break;
+		bssrate[bssrate_len] = pregistrypriv->dev_network.SupportedRates[bssrate_len];
+	}
+
+	if (bssrate_len > 8)
+	{
+		pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen));
+		more_supportedrates = 1;
+	}
+	else
+	{
+		pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen));
+	}
+
+	//extended supported rates
+	if(more_supportedrates==1){
+		pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen));
+	}
+
+	//supported channels
+	pframe = rtw_set_ie(pframe, _SUPPORTED_CH_IE_, 2, sup_ch, &(pattrib->pktlen));
+	
+	//RSNIE
+	if(pattrib->encrypt)
+		pframe = rtw_set_ie(pframe, _RSN_IE_2_, 20, RSNIE, &(pattrib->pktlen));
+	
+	//extended capability
+	pframe = rtw_set_ie(pframe, _EXT_CAP_IE_ , 5, ext_cap_ie, &(pattrib->pktlen));
+
+	//FTIE
+	if(pattrib->encrypt){
+		_rtw_memset(pframe, 0, 84);	//All fields except SNonce shall be set to 0
+		_rtw_memset(pframe, _FTIE_, 1);	//version
+		_rtw_memset((pframe+1), 82, 1);	//length
+		pframe += 84;
+		pattrib->pktlen += 84;
+	//Timeout interval
+	timeout_itvl[0]=0x02;
+	_rtw_memcpy(timeout_itvl+1, &timeout_interval, 4);
+	pframe = rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, 5, timeout_itvl,  &(pattrib->pktlen));
+
+	}
+
+	//Sup_reg_classes(optional)
+	//HT capabilities
+	_rtw_memset(&ht_capie, 0, sizeof(struct ieee80211_ht_cap));
+
+	ht_capie.cap_info = IEEE80211_HT_CAP_SUP_WIDTH |IEEE80211_HT_CAP_SGI_20 |IEEE80211_HT_CAP_SM_PS |
+						IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_TX_STBC |IEEE80211_HT_CAP_DSSSCCK40;
+
+	{
+		u32 rx_packet_offset, max_recvbuf_sz;
+		padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_RX_PACKET_OFFSET, &rx_packet_offset);
+		padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz);
+		if(max_recvbuf_sz-rx_packet_offset>(8191-256))
+			ht_capie.cap_info = ht_capie.cap_info |IEEE80211_HT_CAP_MAX_AMSDU;
+	}
+	
+	ht_capie.ampdu_params_info = (IEEE80211_HT_CAP_AMPDU_FACTOR&0x03) |
+									(IEEE80211_HT_CAP_AMPDU_DENSITY&0x00) ; 
+
+	switch(pHalData->rf_type)
+	{
+		case RF_1T1R:
+			ht_capie.cap_info |= 0x0100;//RX STBC One spatial stream
+			_rtw_memcpy(ht_capie.supp_mcs_set, MCS_rate_1R, 16);
+			break;
+
+		case RF_2T2R:
+		case RF_1T2R:
+		default:
+			ht_capie.cap_info|= 0x0200;//RX STBC two spatial stream
+			_rtw_memcpy(ht_capie.supp_mcs_set, MCS_rate_2R, 16);
+			break;
+	}
+			
+	pframe = rtw_set_ie(pframe, _HT_CAPABILITY_IE_, 
+						sizeof(struct ieee80211_ht_cap), (unsigned char*)&ht_capie, &(pattrib->pktlen));
+
+	//20/40 BSS coexistence
+	if(pmlmepriv->num_FortyMHzIntolerant>0)
+		iedata |= BIT(2);//20 MHz BSS Width Request
+	pframe = rtw_set_ie(pframe, EID_BSSCoexistence, 1, &iedata, &(pattrib->pktlen));
+
+	//Link identifier
+	_rtw_memcpy(link_id_addr, pattrib->ra, 6);
+	_rtw_memcpy((link_id_addr+6), pattrib->dst, 6);
+	_rtw_memcpy((link_id_addr+12), pattrib->src, 6);
+	pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen));
+	
+}
+
+void fill_tdls_peer_traffic_indication(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe)
+{
+
+	struct pkt_attrib	*pattrib = &pxmitframe->attrib;
+	u8 payload_type = 0x02;
+	unsigned char category = WLAN_CATEGORY_TDLS;
+	unsigned char action = TDLS_PEER_TRAFFIC_INDICATION;
+	u8	link_id_addr[18] = {0};
+	u8 AC_queue=0;
+	struct sta_priv 	*pstapriv = &padapter->stapriv;	
+	struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst);
+
+	//payload type
+	pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen));	
+	//category, action, reason code
+	pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(pattrib->nr_frags), &(pattrib->pktlen));
+
+	//Link identifier
+	_rtw_memcpy(link_id_addr, pattrib->ra, 6);
+	_rtw_memcpy((link_id_addr+6), pattrib->src, 6);
+	_rtw_memcpy((link_id_addr+12), pattrib->dst, 6);
+	pframe = rtw_set_ie(pframe, _LINK_ID_IE_,  18, link_id_addr, &(pattrib->pktlen));
+
+	//PTI control
+	//PU buffer status
+	if(ptdls_sta->uapsd_bk&BIT(0))
+		AC_queue=BIT(0);
+	if(ptdls_sta->uapsd_be&BIT(0))
+		AC_queue=BIT(1);
+	if(ptdls_sta->uapsd_vi&BIT(0))
+		AC_queue=BIT(2);
+	if(ptdls_sta->uapsd_vo&BIT(0))
+		AC_queue=BIT(3);
+	pframe = rtw_set_ie(pframe, _PTI_BUFFER_STATUS_, 1, &AC_queue, &(pattrib->pktlen));
+	
+}
+
+void fill_tdls_ch_switch_req(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe)
+{
+
+	struct pkt_attrib	*pattrib = &pxmitframe->attrib;
+	u8 payload_type = 0x02;
+	unsigned char category = WLAN_CATEGORY_TDLS;
+	unsigned char action = TDLS_CHANNEL_SWITCH_REQUEST;
+	u8	link_id_addr[18] = {0};
+	struct sta_priv 	*pstapriv = &padapter->stapriv;	
+	struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst);
+	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
+	u8 ch_switch_timing[4] = {0};
+	u16 switch_time= CH_SWITCH_TIME, switch_timeout=CH_SWITCH_TIMEOUT;	
+
+	//payload type
+	pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen));	
+	//category, action, target_ch
+	pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(pmlmeinfo->tdls_candidate_ch), &(pattrib->pktlen));
+
+	//Link identifier
+	_rtw_memcpy(link_id_addr, pattrib->ra, 6);
+	_rtw_memcpy((link_id_addr+6), pattrib->src, 6);
+	_rtw_memcpy((link_id_addr+12), pattrib->dst, 6);
+	pframe = rtw_set_ie(pframe, _LINK_ID_IE_,  18, link_id_addr, &(pattrib->pktlen));
+
+	//ch switch timing
+	_rtw_memcpy(ch_switch_timing, &switch_time, 2);
+	_rtw_memcpy(ch_switch_timing+2, &switch_timeout, 2);
+	pframe = rtw_set_ie(pframe, _CH_SWITCH_TIMING_,  4, ch_switch_timing, &(pattrib->pktlen));
+
+	//update ch switch attrib to sta_info
+	ptdls_sta->off_ch=pmlmeinfo->tdls_candidate_ch;
+	ptdls_sta->ch_switch_time=switch_time;
+	ptdls_sta->ch_switch_timeout=switch_timeout;
+
+}
+
+void fill_tdls_ch_switch_rsp(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe)
+{
+
+	struct pkt_attrib	*pattrib = &pxmitframe->attrib;
+	u8 payload_type = 0x02;
+	unsigned char category = WLAN_CATEGORY_TDLS;
+	unsigned char action = TDLS_CHANNEL_SWITCH_RESPONSE;
+	u8	link_id_addr[18] = {0};
+	struct sta_priv 	*pstapriv = &padapter->stapriv;	
+	struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst);
+	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
+	u8 ch_switch_timing[4] = {0};
+
+	//payload type
+	pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen));	
+	//category, action, status_code
+	pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen));
+	pframe = rtw_set_fixed_ie(pframe, 2, (u8 *)&ptdls_sta->stat_code, &(pattrib->pktlen));
+
+	//Link identifier
+	_rtw_memcpy(link_id_addr, pattrib->ra, 6);
+	_rtw_memcpy((link_id_addr+6), pattrib->src, 6);
+	_rtw_memcpy((link_id_addr+12), pattrib->dst, 6);
+	pframe = rtw_set_ie(pframe, _LINK_ID_IE_,  18, link_id_addr, &(pattrib->pktlen));
+
+	//ch switch timing
+	_rtw_memcpy(ch_switch_timing, &ptdls_sta->ch_switch_time, 2);
+	_rtw_memcpy(ch_switch_timing+2, &ptdls_sta->ch_switch_timeout, 2);
+	pframe = rtw_set_ie(pframe, _CH_SWITCH_TIMING_,  4, ch_switch_timing, &(pattrib->pktlen));
+
+}
+
+int fill_tdls_frbody(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, u8 action)
+{
+	int res=_SUCCESS;
+
+	switch(action){
+		case TDLS_SETUP_REQUEST:
+			fill_tdls_setup_req_frbody(padapter, pxmitframe, pframe);
+			break;
+		case TDLS_SETUP_RESPONSE:
+			fill_tdls_setup_rsp_frbody(padapter, pxmitframe, pframe);
+			break;
+		case TDLS_SETUP_CONFIRM:
+			fill_tdls_setup_cfm_frbody(padapter, pxmitframe, pframe);
+			break;
+		case TDLS_TEARDOWN:
+			fill_tdls_teardown_frbody(padapter, pxmitframe, pframe);
+			break;
+		case TDLS_DISCOVERY_REQUEST:
+			fill_tdls_dis_req_frbody(padapter, pxmitframe, pframe);
+			break;			
+		case TDLS_PEER_TRAFFIC_INDICATION:
+			fill_tdls_peer_traffic_indication(padapter, pxmitframe, pframe);
+			break;
+		case TDLS_CHANNEL_SWITCH_REQUEST:
+			fill_tdls_ch_switch_req(padapter, pxmitframe, pframe);
+			break;
+		case TDLS_CHANNEL_SWITCH_RESPONSE:
+			fill_tdls_ch_switch_rsp(padapter, pxmitframe, pframe);
+			break;
+		default:
+			res=_FAIL;
+			break;
+	}
+
+	return res;
+}
+
+s32 make_tdls_wlanhdr (_adapter *padapter , u8 *hdr, struct pkt_attrib *pattrib, u8 action)
+{
+	u16 *qc;
+	struct ieee80211_hdr *pwlanhdr = (struct ieee80211_hdr *)hdr;
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+	struct qos_priv *pqospriv = &pmlmepriv->qospriv;
+	struct sta_priv 	*pstapriv = &padapter->stapriv;
+	struct sta_info *psta=NULL, *ptdls_sta=NULL;
+	u8 tdls_seq=0;
+
+	sint res = _SUCCESS;
+	u16 *fctrl = &pwlanhdr->frame_ctl;
+
+_func_enter_;
+
+	_rtw_memset(hdr, 0, WLANHDR_OFFSET);
+
+	SetFrameSubType(fctrl, pattrib->subtype);
+
+	switch(action){
+		case TDLS_SETUP_REQUEST:
+		case TDLS_SETUP_RESPONSE:
+		case TDLS_SETUP_CONFIRM:
+		case TDLS_TEARDOWN:	//directly to peer STA or via AP
+		case TDLS_PEER_TRAFFIC_INDICATION:
+		case TDLS_PEER_PSM_REQUEST:	//directly to peer STA or via AP
+		case TDLS_DISCOVERY_REQUEST:	//unicast: directly to peer sta, Bcast: via AP
+			SetToDs(fctrl);							
+			_rtw_memcpy(pwlanhdr->addr1, get_bssid(pmlmepriv), ETH_ALEN);
+			_rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN);
+			_rtw_memcpy(pwlanhdr->addr3, pattrib->dst, ETH_ALEN);
+			break;
+		case TDLS_CHANNEL_SWITCH_REQUEST:
+		case TDLS_CHANNEL_SWITCH_RESPONSE:
+		case TDLS_PEER_PSM_RESPONSE:
+		case TDLS_PEER_TRAFFIC_RESPONSE:
+			_rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN);
+			_rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN);
+			_rtw_memcpy(pwlanhdr->addr3, get_bssid(pmlmepriv), ETH_ALEN);
+			tdls_seq=1;
+			break;
+	}
+
+	if (pattrib->encrypt)
+		SetPrivacy(fctrl);
+
+	if (pqospriv->qos_option)
+	{
+		qc = (unsigned short *)(hdr + pattrib->hdrlen - 2);
+		if (pattrib->priority)
+			SetPriority(qc, pattrib->priority);
+		SetAckpolicy(qc, pattrib->ack_policy);
+	}
+
+	psta = pattrib->psta;
+ 
+	//  1. update seq_num per link by sta_info
+	//  2. rewrite encrypt to _AES_, also rewrite iv_len, icv_len
+	if(tdls_seq==1){
+		ptdls_sta=rtw_get_stainfo(pstapriv, pattrib->dst);
+		if(ptdls_sta){
+			ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority]++;
+			ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority] &= 0xFFF;
+			pattrib->seqnum = ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority];
+			SetSeqNum(hdr, pattrib->seqnum);
+
+			if (pattrib->encrypt){
+				pattrib->encrypt= _AES_;
+				pattrib->iv_len=8;
+				pattrib->icv_len=8;
+			}
+		}else{
+			res=_FAIL;
+			goto exit;
+		}
+	}else if(psta){
+		psta->sta_xmitpriv.txseq_tid[pattrib->priority]++;
+		psta->sta_xmitpriv.txseq_tid[pattrib->priority] &= 0xFFF;
+		pattrib->seqnum = psta->sta_xmitpriv.txseq_tid[pattrib->priority];
+		SetSeqNum(hdr, pattrib->seqnum);
+	}
+
+
+exit:
+
+_func_exit_;
+
+	return res;
+}
+
+s32 xmit_tdls_coalesce(_adapter * padapter, struct xmit_frame * pxmitframe, u8 action)
+{
+	s32 llc_sz, mem_sz;
+
+	SIZE_PTR addr;
+
+	u8 *pframe, *mem_start;
+
+	struct sta_info		*psta;
+	struct sta_priv		*pstapriv = &padapter->stapriv;
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	struct pkt_attrib	*pattrib = &pxmitframe->attrib;
+	u8 *pbuf_start;
+	s32 bmcst = IS_MCAST(pattrib->ra);
+	s32 res = _SUCCESS;
+	
+_func_enter_;
+
+	if (pattrib->psta) {
+		psta = pattrib->psta;
+	} else {	
+		if(bmcst) {
+			psta = rtw_get_bcmc_stainfo(padapter);
+		} else {
+			psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra);
+	        }
+	}
+
+	if(psta==NULL)
+		return _FAIL;
+
+	if (pxmitframe->buf_addr == NULL)
+		return _FAIL;
+
+	pbuf_start = pxmitframe->buf_addr;
+	mem_start = pbuf_start + TXDESC_OFFSET;
+
+	if (make_tdls_wlanhdr(padapter, mem_start, pattrib, action) == _FAIL) {
+		res = _FAIL;
+		goto exit;
+	}
+
+	pframe = mem_start;
+	pframe += pattrib->hdrlen;
+
+	//adding icv, if necessary...
+	if (pattrib->iv_len)
+	{
+		if (psta != NULL)
+		{
+			switch(pattrib->encrypt)
+			{
+				case _WEP40_:
+				case _WEP104_:
+						WEP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx);	
+					break;
+				case _TKIP_:			
+					if(bmcst)
+						TKIP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx);
+					else
+						TKIP_IV(pattrib->iv, psta->dot11txpn, 0);
+					break;			
+				case _AES_:
+					if(bmcst)
+						AES_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx);
+					else
+						AES_IV(pattrib->iv, psta->dot11txpn, 0);
+					break;
+			}
+		}
+
+		_rtw_memcpy(pframe, pattrib->iv, pattrib->iv_len);
+		pframe += pattrib->iv_len;
+
+	}
+
+	llc_sz = rtw_put_snap(pframe, pattrib->ether_type);
+	pframe += llc_sz;
+
+	//pattrib->pktlen will be counted in fill_tdls_frbody
+	pattrib->pktlen = 0;
+
+	fill_tdls_frbody(padapter, pxmitframe, pframe, action);
+
+	if ((pattrib->icv_len >0 )&& (pattrib->bswenc)) {
+		_rtw_memcpy(pframe, pattrib->icv, pattrib->icv_len); 
+		pframe += pattrib->icv_len;
+	}
+
+	pattrib->nr_frags = 1;
+	pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->iv_len + llc_sz + 
+			((pattrib->bswenc) ? pattrib->icv_len : 0) + pattrib->pktlen;
+	
+	if (xmitframe_addmic(padapter, pxmitframe) == _FAIL)
+	{
+		goto exit;
+	}
+
+	xmitframe_swencrypt(padapter, pxmitframe);
+	
+	update_attrib_vcs_info(padapter, pxmitframe);
+	
+exit:	
+	
+_func_exit_;	
+
+	return res;
+}
+#endif
+
+/*
+
+This sub-routine will perform all the following:
+
+1. remove 802.3 header.
+2. create wlan_header, based on the info in pxmitframe
+3. append sta's iv/ext-iv
+4. append LLC
+5. move frag chunk from pframe to pxmitframe->mem
+6. apply sw-encrypt, if necessary. 
+
+*/
+s32 rtw_xmitframe_coalesce(_adapter *padapter, _pkt *pkt, struct xmit_frame *pxmitframe)
+{
+	struct pkt_file pktfile;
+
+	s32 frg_inx, frg_len, mpdu_len, llc_sz, mem_sz;
+
+	SIZE_PTR addr;
+
+	u8 *pframe, *mem_start;
+
+	struct sta_info		*psta;
+	//struct sta_priv		*pstapriv = &padapter->stapriv;
+	//struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	struct xmit_priv	*pxmitpriv = &padapter->xmitpriv;
+
+	struct pkt_attrib	*pattrib = &pxmitframe->attrib;
+
+	u8 *pbuf_start;
+
+	s32 bmcst = IS_MCAST(pattrib->ra);
+	s32 res = _SUCCESS;
+
+_func_enter_;
+
+	if (pattrib->psta) {
+		psta = pattrib->psta;
+	} else {	
+		psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra);
+	}
+
+	if(psta==NULL)
+		return _FAIL;
+
+	if (pxmitframe->buf_addr == NULL)
+		return _FAIL;
+
+	pbuf_start = pxmitframe->buf_addr;
+
+#ifdef CONFIG_USB_TX_AGGREGATION
+	mem_start = pbuf_start + TXDESC_SIZE + (pxmitframe->pkt_offset * PACKET_OFFSET_SZ);
+#else
+	mem_start = pbuf_start + TXDESC_OFFSET;
+#endif
+
+	if (rtw_make_wlanhdr(padapter, mem_start, pattrib) == _FAIL) {
+		RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("rtw_xmitframe_coalesce: rtw_make_wlanhdr fail; drop pkt\n"));
+		res = _FAIL;
+		goto exit;
+	}
+
+	_rtw_open_pktfile(pkt, &pktfile);
+	_rtw_pktfile_read(&pktfile, NULL, pattrib->pkt_hdrlen);
+
+	pattrib->pktlen = pktfile.pkt_len;
+
+	frg_inx = 0;
+	frg_len = pxmitpriv->frag_len - 4;//2346-4 = 2342
+
+	while (1)
+	{
+		llc_sz = 0;
+
+		mpdu_len = frg_len;
+
+		pframe = mem_start;
+
+		SetMFrag(mem_start);
+
+		pframe += pattrib->hdrlen;
+		mpdu_len -= pattrib->hdrlen;
+
+		//adding icv, if necessary...
+		if (pattrib->iv_len)
+		{
+			//if (check_fwstate(pmlmepriv, WIFI_MP_STATE))
+			//	psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv));
+			//else
+			//	psta = rtw_get_stainfo(pstapriv, pattrib->ra);
+
+			if (psta != NULL)
+			{
+				switch(pattrib->encrypt)
+				{
+					case _WEP40_:
+					case _WEP104_:
+							WEP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx);	
+						break;
+					case _TKIP_:			
+						if(bmcst)
+							TKIP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx);
+						else
+							TKIP_IV(pattrib->iv, psta->dot11txpn, 0);
+						break;			
+					case _AES_:
+						if(bmcst)
+							AES_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx);
+						else
+							AES_IV(pattrib->iv, psta->dot11txpn, 0);
+						break;
+				}
+			}
+
+			_rtw_memcpy(pframe, pattrib->iv, pattrib->iv_len);
+
+			RT_TRACE(_module_rtl871x_xmit_c_, _drv_notice_,
+				 ("rtw_xmitframe_coalesce: keyid=%d pattrib->iv[3]=%.2x pframe=%.2x %.2x %.2x %.2x\n",
+				  padapter->securitypriv.dot11PrivacyKeyIndex, pattrib->iv[3], *pframe, *(pframe+1), *(pframe+2), *(pframe+3)));
+
+			pframe += pattrib->iv_len;
+
+			mpdu_len -= pattrib->iv_len;
+		}
+
+		if (frg_inx == 0) {
+			llc_sz = rtw_put_snap(pframe, pattrib->ether_type);
+			pframe += llc_sz;
+			mpdu_len -= llc_sz;
+		}
+
+		if ((pattrib->icv_len >0) && (pattrib->bswenc)) {
+			mpdu_len -= pattrib->icv_len;
+		}
+
+
+		if (bmcst) {
+			// don't do fragment to broadcat/multicast packets
+			mem_sz = _rtw_pktfile_read(&pktfile, pframe, pattrib->pktlen);
+		} else {
+			mem_sz = _rtw_pktfile_read(&pktfile, pframe, mpdu_len);
+		}
+
+		pframe += mem_sz;
+
+		if ((pattrib->icv_len >0 )&& (pattrib->bswenc)) {
+			_rtw_memcpy(pframe, pattrib->icv, pattrib->icv_len); 
+			pframe += pattrib->icv_len;
+		}
+
+		frg_inx++;
+
+		if (bmcst || (rtw_endofpktfile(&pktfile) == _TRUE))
+		{
+			pattrib->nr_frags = frg_inx;
+
+			pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->iv_len + ((pattrib->nr_frags==1)? llc_sz:0) + 
+					((pattrib->bswenc) ? pattrib->icv_len : 0) + mem_sz;
+			
+			ClearMFrag(mem_start);
+			
+#ifdef CONFIG_SDIO_HCI
+			RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("coalesce: pattrib->last_txcmdsz=%d pxmitframe->pxmitbuf->phead=0x%p  pxmitframe->pxmitbuf->ptail=0x%p pxmitframe->pxmitbuf->len=%d\n", pattrib->last_txcmdsz, pxmitframe->pxmitbuf->phead, pxmitframe->pxmitbuf->ptail, pxmitframe->pxmitbuf->len));
+			pxmitframe->pxmitbuf->ptail = pxmitframe->buf_addr + _RND512(pframe-pxmitframe->buf_addr);
+			pxmitframe->pxmitbuf->len += pxmitframe->pxmitbuf->ptail - pxmitframe->buf_addr;//(pframe-mem_start);
+			RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("coalesce: [2] pattrib->last_txcmdsz=%d pxmitframe->pxmitbuf->ptail=0x%p pxmitframe->pxmitbuf->len=%d\n", pattrib->last_txcmdsz, pxmitframe->pxmitbuf->ptail, pxmitframe->pxmitbuf->len));
+#endif
+
+			break;
+
+		} else {
+		
+#ifdef CONFIG_SDIO_HCI
+			pxmitframe->pxmitbuf->ptail = pxmitframe->buf_addr + _RND512(pframe-pxmitframe->buf_addr);
+			pxmitframe->pxmitbuf->len += pxmitframe->pxmitbuf->ptail - pxmitframe->buf_addr;
+			pframe=pxmitframe->pxmitbuf->ptail;
+#endif
+		}
+
+		addr = (SIZE_PTR)(pframe);
+		
+		mem_start = (unsigned char *)RND4(addr) + TXDESC_OFFSET;
+		_rtw_memcpy(mem_start, pbuf_start + TXDESC_OFFSET, pattrib->hdrlen);		
+	}
+
+	if (xmitframe_addmic(padapter, pxmitframe) == _FAIL)
+	{
+		RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("xmitframe_addmic(padapter, pxmitframe)==_FAIL\n"));
+		res = _FAIL;
+		goto exit;
+	}
+
+#ifdef CONFIG_SDIO_HCI
+	fillin_txdesc(padapter, pxmitframe);
+#endif
+
+	xmitframe_swencrypt(padapter, pxmitframe);
+
+	if(bmcst == _FALSE)
+		update_attrib_vcs_info(padapter, pxmitframe);
+	else
+		pattrib->vcs_mode = NONE_VCS;
+
+exit:	
+	
+_func_exit_;	
+
+	return res;
+}
+
+/* Logical Link Control(LLC) SubNetwork Attachment Point(SNAP) header
+ * IEEE LLC/SNAP header contains 8 octets
+ * First 3 octets comprise the LLC portion
+ * SNAP portion, 5 octets, is divided into two fields:
+ *	Organizationally Unique Identifier(OUI), 3 octets,
+ *	type, defined by that organization, 2 octets.
+ */
+s32 rtw_put_snap(u8 *data, u16 h_proto)
+{
+	struct ieee80211_snap_hdr *snap;
+	u8 *oui;
+
+_func_enter_;
+
+	snap = (struct ieee80211_snap_hdr *)data;
+	snap->dsap = 0xaa;
+	snap->ssap = 0xaa;
+	snap->ctrl = 0x03;
+
+	if (h_proto == 0x8137 || h_proto == 0x80f3)
+		oui = P802_1H_OUI;
+	else
+		oui = RFC1042_OUI;
+	
+	snap->oui[0] = oui[0];
+	snap->oui[1] = oui[1];
+	snap->oui[2] = oui[2];
+
+	*(u16 *)(data + SNAP_SIZE) = htons(h_proto);
+
+_func_exit_;
+
+	return SNAP_SIZE + sizeof(u16);
+}
+
+void rtw_update_protection(_adapter *padapter, u8 *ie, uint ie_len)
+{
+
+	uint	protection;
+	u8	*perp;
+	sint	 erp_len;
+	struct	xmit_priv *pxmitpriv = &padapter->xmitpriv;
+	struct	registry_priv *pregistrypriv = &padapter->registrypriv;
+	
+_func_enter_;
+	
+	switch(pxmitpriv->vcs_setting)
+	{
+		case DISABLE_VCS:
+			pxmitpriv->vcs = NONE_VCS;
+			break;
+	
+		case ENABLE_VCS:
+			break;
+	
+		case AUTO_VCS:
+		default:
+			perp = rtw_get_ie(ie, _ERPINFO_IE_, &erp_len, ie_len);
+			if(perp == NULL)
+			{
+				pxmitpriv->vcs = NONE_VCS;
+			}
+			else
+			{
+				protection = (*(perp + 2)) & BIT(1);
+				if (protection)
+				{
+					if(pregistrypriv->vcs_type == RTS_CTS)
+						pxmitpriv->vcs = RTS_CTS;
+					else
+						pxmitpriv->vcs = CTS_TO_SELF;
+				}
+				else
+					pxmitpriv->vcs = NONE_VCS;
+			}
+
+			break;			
+	
+	}
+
+_func_exit_;
+
+}
+
+void rtw_count_tx_stats(_adapter *padapter, struct xmit_frame *pxmitframe, int sz)
+{
+	struct sta_info *psta = NULL;
+	struct stainfo_stats *pstats = NULL;
+	struct xmit_priv	*pxmitpriv = &padapter->xmitpriv;
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+
+	if((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG)
+	{
+		pxmitpriv->tx_bytes += sz;
+#ifdef CONFIG_USB_TX_AGGREGATION
+		pmlmepriv->LinkDetectInfo.NumTxOkInPeriod += pxmitframe->agg_num;
+#else
+		pmlmepriv->LinkDetectInfo.NumTxOkInPeriod++;
+#endif
+
+		psta = pxmitframe->attrib.psta;
+
+		if(psta)
+		{
+			pstats = &psta->sta_stats;
+#ifdef CONFIG_USB_TX_AGGREGATION
+			pstats->tx_pkts += pxmitframe->agg_num;
+#else
+			pstats->tx_pkts++;
+#endif
+			pstats->tx_bytes += sz;
+		}
+	}
+	
+}
+
+struct xmit_buf *rtw_alloc_xmitbuf_ext(struct xmit_priv *pxmitpriv)
+{
+	_irqL irqL;
+	struct xmit_buf *pxmitbuf =  NULL;
+	_list *plist, *phead;
+	_queue *pfree_queue = &pxmitpriv->free_xmit_extbuf_queue;
+
+_func_enter_;
+
+	_enter_critical(&pfree_queue->lock, &irqL);
+
+	if(_rtw_queue_empty(pfree_queue) == _TRUE) {
+		pxmitbuf = NULL;
+	} else {
+
+		phead = get_list_head(pfree_queue);
+
+		plist = get_next(phead);
+
+		pxmitbuf = LIST_CONTAINOR(plist, struct xmit_buf, list);
+
+		rtw_list_delete(&(pxmitbuf->list));
+	}
+
+	if (pxmitbuf !=  NULL)
+	{
+		pxmitpriv->free_xmit_extbuf_cnt--;
+		#ifdef DBG_XMIT_BUF
+		DBG_871X("DBG_XMIT_BUF ALLOC no=%d,  free_xmit_extbuf_cnt=%d\n",pxmitbuf->no, pxmitpriv->free_xmit_extbuf_cnt);
+		#endif
+		
+	
+		pxmitbuf->priv_data = NULL;
+
+#ifdef CONFIG_SDIO_HCI
+		pxmitbuf->len = 0;
+		pxmitbuf->phead = pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->pbuf;
+		pxmitbuf->pend = pxmitbuf->pbuf + (MAX_XMIT_EXTBUF_SZ-4);
+#endif
+#ifdef CONFIG_PCI_HCI
+		pxmitbuf->len = 0;
+#endif
+	}
+
+	_exit_critical(&pfree_queue->lock, &irqL);
+
+_func_exit_;
+
+	return pxmitbuf;
+}
+
+s32 rtw_free_xmitbuf_ext(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf)
+{
+	_irqL irqL;
+	_queue *pfree_queue = &pxmitpriv->free_xmit_extbuf_queue;
+
+_func_enter_;
+
+	if(pxmitbuf==NULL)
+	{
+		return _FAIL;
+	}
+
+	_enter_critical(&pfree_queue->lock, &irqL);
+
+	rtw_list_delete(&pxmitbuf->list);
+
+	rtw_list_insert_tail(&(pxmitbuf->list), get_list_head(pfree_queue));
+	pxmitpriv->free_xmit_extbuf_cnt++;
+	#ifdef DBG_XMIT_BUF
+	DBG_871X("DBG_XMIT_BUF FREE no=%d, free_xmit_extbuf_cnt=%d\n",pxmitbuf->no ,pxmitpriv->free_xmit_extbuf_cnt);
+	#endif
+
+	_exit_critical(&pfree_queue->lock, &irqL);
+
+_func_exit_;
+
+	return _SUCCESS;
+} 
+
+struct xmit_buf *rtw_alloc_xmitbuf(struct xmit_priv *pxmitpriv)
+{
+	_irqL irqL;
+	struct xmit_buf *pxmitbuf =  NULL;
+	_list *plist, *phead;
+	_queue *pfree_xmitbuf_queue = &pxmitpriv->free_xmitbuf_queue;
+
+_func_enter_;
+
+	//DBG_8192C("+rtw_alloc_xmitbuf\n");
+
+	_enter_critical(&pfree_xmitbuf_queue->lock, &irqL);
+
+	if(_rtw_queue_empty(pfree_xmitbuf_queue) == _TRUE) {
+		pxmitbuf = NULL;
+	} else {
+
+		phead = get_list_head(pfree_xmitbuf_queue);
+
+		plist = get_next(phead);
+
+		pxmitbuf = LIST_CONTAINOR(plist, struct xmit_buf, list);
+
+		rtw_list_delete(&(pxmitbuf->list));
+	}
+
+	if (pxmitbuf !=  NULL)
+	{
+		pxmitpriv->free_xmitbuf_cnt--;
+		#ifdef DBG_XMIT_BUF
+		DBG_871X("DBG_XMIT_BUF ALLOC no=%d,  free_xmitbuf_cnt=%d\n",pxmitbuf->no, pxmitpriv->free_xmitbuf_cnt);
+		#endif
+		//DBG_8192C("alloc, free_xmitbuf_cnt=%d\n", pxmitpriv->free_xmitbuf_cnt);
+
+		pxmitbuf->priv_data = NULL;
+
+#ifdef CONFIG_SDIO_HCI
+		pxmitbuf->len = 0;
+		pxmitbuf->phead = pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->pbuf;
+		pxmitbuf->pend = pxmitbuf->pbuf + MAX_XMITBUF_SZ;
+#endif
+#ifdef CONFIG_PCI_HCI
+		pxmitbuf->len = 0;
+#endif
+	}
+	#ifdef DBG_XMIT_BUF
+	else
+	{
+		DBG_871X("DBG_XMIT_BUF rtw_alloc_xmitbuf return NULL\n");
+	}
+	#endif
+
+	_exit_critical(&pfree_xmitbuf_queue->lock, &irqL);
+
+_func_exit_;
+
+	return pxmitbuf;
+}
+
+s32 rtw_free_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf)
+{
+	_irqL irqL;
+	_queue *pfree_xmitbuf_queue = &pxmitpriv->free_xmitbuf_queue;
+
+_func_enter_;
+
+	//DBG_8192C("+rtw_free_xmitbuf\n");
+
+	if(pxmitbuf==NULL)
+	{
+		return _FAIL;
+	}
+
+	if(pxmitbuf->ext_tag)
+	{
+		rtw_free_xmitbuf_ext(pxmitpriv, pxmitbuf);
+	}
+	else
+	{
+		_enter_critical(&pfree_xmitbuf_queue->lock, &irqL);
+
+		rtw_list_delete(&pxmitbuf->list);	
+
+		rtw_list_insert_tail(&(pxmitbuf->list), get_list_head(pfree_xmitbuf_queue));
+
+		pxmitpriv->free_xmitbuf_cnt++;
+		//DBG_8192C("FREE, free_xmitbuf_cnt=%d\n", pxmitpriv->free_xmitbuf_cnt);
+		#ifdef DBG_XMIT_BUF
+		DBG_871X("DBG_XMIT_BUF FREE no=%d, free_xmitbuf_cnt=%d\n",pxmitbuf->no ,pxmitpriv->free_xmitbuf_cnt);
+		#endif
+		_exit_critical(&pfree_xmitbuf_queue->lock, &irqL);
+	}
+
+_func_exit_;	 
+
+	return _SUCCESS;	
+} 
+
+/*
+Calling context:
+1. OS_TXENTRY
+2. RXENTRY (rx_thread or RX_ISR/RX_CallBack)
+
+If we turn on USE_RXTHREAD, then, no need for critical section.
+Otherwise, we must use _enter/_exit critical to protect free_xmit_queue...
+
+Must be very very cautious...
+
+*/
+
+struct xmit_frame *rtw_alloc_xmitframe(struct xmit_priv *pxmitpriv)//(_queue *pfree_xmit_queue)
+{
+	/*
+		Please remember to use all the osdep_service api,
+		and lock/unlock or _enter/_exit critical to protect 
+		pfree_xmit_queue
+	*/
+
+	_irqL irqL;
+	struct xmit_frame *pxframe = NULL;
+	_list *plist, *phead;
+	_queue *pfree_xmit_queue = &pxmitpriv->free_xmit_queue;
+	_adapter *padapter = pxmitpriv->adapter;
+
+_func_enter_;
+
+	_enter_critical_bh(&pfree_xmit_queue->lock, &irqL);
+
+	if (_rtw_queue_empty(pfree_xmit_queue) == _TRUE) {
+		RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_alloc_xmitframe:%d\n", pxmitpriv->free_xmitframe_cnt));
+		pxframe =  NULL;
+	} else {
+		phead = get_list_head(pfree_xmit_queue);
+
+		plist = get_next(phead);
+
+		pxframe = LIST_CONTAINOR(plist, struct xmit_frame, list);
+
+		rtw_list_delete(&(pxframe->list));
+	}
+
+	if (pxframe !=  NULL)
+	{
+		pxmitpriv->free_xmitframe_cnt--;
+
+		RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("rtw_alloc_xmitframe():free_xmitframe_cnt=%d\n", pxmitpriv->free_xmitframe_cnt));
+
+		pxframe->buf_addr = NULL;
+		pxframe->pxmitbuf = NULL;
+
+		_rtw_memset(&pxframe->attrib, 0, sizeof(struct pkt_attrib));
+		//pxframe->attrib.psta = NULL;
+
+		pxframe->frame_tag = DATA_FRAMETAG;
+
+#ifdef CONFIG_USB_HCI
+		pxframe->pkt = NULL;
+		pxframe->pkt_offset = 1;//default use pkt_offset to fill tx desc
+
+#ifdef CONFIG_USB_TX_AGGREGATION
+		pxframe->agg_num = 1;
+#endif
+
+#endif //#ifdef CONFIG_USB_HCI
+
+#ifdef PLATFORM_LINUX
+		if(pxmitpriv->free_xmitframe_cnt==1)
+		{
+			if (!netif_queue_stopped(padapter->pnetdev))
+				netif_stop_queue(padapter->pnetdev);
+		}
+#endif
+
+	}
+
+	_exit_critical_bh(&pfree_xmit_queue->lock, &irqL);
+
+_func_exit_;
+
+	return pxframe;
+}
+
+s32 rtw_free_xmitframe(struct xmit_priv *pxmitpriv, struct xmit_frame *pxmitframe)
+{	
+	_irqL irqL;
+	_queue *pfree_xmit_queue = &pxmitpriv->free_xmit_queue;		
+	_adapter *padapter = pxmitpriv->adapter;
+	_pkt *pndis_pkt = NULL;
+
+_func_enter_;	
+
+	if (pxmitframe == NULL) {
+		RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("======rtw_free_xmitframe():pxmitframe==NULL!!!!!!!!!!\n"));
+		goto exit;
+	}
+
+	_enter_critical_bh(&pfree_xmit_queue->lock, &irqL);
+
+	rtw_list_delete(&pxmitframe->list);	
+
+	if (pxmitframe->pkt){
+		pndis_pkt = pxmitframe->pkt;
+		pxmitframe->pkt = NULL;
+	}
+
+	rtw_list_insert_tail(&pxmitframe->list, get_list_head(pfree_xmit_queue));
+
+	pxmitpriv->free_xmitframe_cnt++;
+	RT_TRACE(_module_rtl871x_xmit_c_, _drv_debug_, ("rtw_free_xmitframe():free_xmitframe_cnt=%d\n", pxmitpriv->free_xmitframe_cnt));
+
+	_exit_critical_bh(&pfree_xmit_queue->lock, &irqL);
+
+
+	if(pndis_pkt)
+		rtw_os_pkt_complete(padapter, pndis_pkt);
+
+exit:
+
+_func_exit_;
+
+	return _SUCCESS;
+}
+
+s32 rtw_free_xmitframe_ex(struct xmit_priv *pxmitpriv, struct xmit_frame *pxmitframe)
+{	
+			
+_func_enter_;	
+
+	if(pxmitframe==NULL){
+		goto exit;
+	}
+
+	RT_TRACE(_module_rtl871x_xmit_c_, _drv_debug_, ("rtw_free_xmitframe_ex()\n"));
+	
+	rtw_free_xmitframe(pxmitpriv, pxmitframe);	  
+
+exit:
+	
+_func_exit_;	 
+
+	return _SUCCESS;	
+} 
+
+void rtw_free_xmitframe_queue(struct xmit_priv *pxmitpriv, _queue *pframequeue)
+{
+	_irqL irqL;
+	_list	*plist, *phead;
+	struct	xmit_frame 	*pxmitframe;
+
+_func_enter_;	
+
+	_enter_critical_bh(&(pframequeue->lock), &irqL);
+
+	phead = get_list_head(pframequeue);
+	plist = get_next(phead);
+	
+	while (rtw_end_of_queue_search(phead, plist) == _FALSE)
+	{
+			
+		pxmitframe = LIST_CONTAINOR(plist, struct xmit_frame, list);
+
+		plist = get_next(plist); 
+		
+		rtw_free_xmitframe(pxmitpriv,pxmitframe);
+			
+	}
+	_exit_critical_bh(&(pframequeue->lock), &irqL);
+
+_func_exit_;
+}
+
+s32 rtw_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe)
+{
+	if (rtw_xmit_classifier(padapter, pxmitframe) == _FAIL)
+	{
+		RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_,
+			 ("rtw_xmitframe_enqueue: drop xmit pkt for classifier fail\n"));
+//		pxmitframe->pkt = NULL;
+		return _FAIL;
+	}
+
+	return _SUCCESS;
+}
+
+static struct xmit_frame *dequeue_one_xmitframe(struct xmit_priv *pxmitpriv, struct hw_xmit *phwxmit, struct tx_servq *ptxservq, _queue *pframe_queue)
+{
+	_list	*xmitframe_plist, *xmitframe_phead;
+	struct	xmit_frame	*pxmitframe=NULL;
+	_adapter *padapter = pxmitpriv->adapter;
+#ifdef CONFIG_TDLS
+	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
+#endif
+
+	xmitframe_phead = get_list_head(pframe_queue);
+	xmitframe_plist = get_next(xmitframe_phead);
+
+	while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE)
+	{
+		pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list);
+
+		xmitframe_plist = get_next(xmitframe_plist);
+
+/*#ifdef RTK_DMP_PLATFORM
+#ifdef CONFIG_USB_TX_AGGREGATION
+		if((ptxservq->qcnt>0) && (ptxservq->qcnt<=2))
+		{
+			pxmitframe = NULL;
+
+			tasklet_schedule(&pxmitpriv->xmit_tasklet);
+
+			break;
+		}
+#endif
+#endif*/
+		rtw_list_delete(&pxmitframe->list);
+
+		ptxservq->qcnt--;
+
+#ifndef CONFIG_TDLS
+#ifdef CONFIG_AP_MODE
+		if(xmitframe_enqueue_for_sleeping_sta(padapter, pxmitframe)==_FALSE)
+#endif
+		{
+			//rtw_list_insert_tail(&pxmitframe->list, &phwxmit->pending);
+
+			//ptxservq->qcnt--;
+
+			break;
+		}
+//else CONFIG_TDLS, process as TDLS Buffer STA
+#else
+		if((pmlmeinfo->tdls_setup_state&TDLS_LINKED_STATE)!=TDLS_LINKED_STATE)
+			break;
+		if(xmit_tdls_enqueue_for_sleeping_sta(padapter, pxmitframe)==_FALSE)
+			break;
+#endif
+
+
+		pxmitframe = NULL;
+
+	}
+
+	return pxmitframe;
+}
+
+struct xmit_frame* rtw_dequeue_xframe(struct xmit_priv *pxmitpriv, struct hw_xmit *phwxmit_i, sint entry)
+{
+	_irqL irqL0;
+	_list *sta_plist, *sta_phead;
+	struct hw_xmit *phwxmit;
+	struct tx_servq *ptxservq = NULL;
+	_queue *pframe_queue = NULL;
+	struct xmit_frame *pxmitframe = NULL;
+	_adapter *padapter = pxmitpriv->adapter;
+	struct registry_priv	*pregpriv = &padapter->registrypriv;
+	int i, inx[4];
+#ifdef CONFIG_USB_HCI
+//	int j, tmp, acirp_cnt[4];
+#endif
+
+_func_enter_;
+
+	inx[0] = 0; inx[1] = 1; inx[2] = 2; inx[3] = 3;
+
+	if(pregpriv->wifi_spec==1)
+	{
+		int j, tmp, acirp_cnt[4];
+#if 0
+		if(flags<XMIT_QUEUE_ENTRY)
+		{
+			//priority exchange according to the completed xmitbuf flags.
+			inx[flags] = 0;
+			inx[0] = flags;
+		}
+#endif	
+	
+#ifdef CONFIG_USB_HCI
+		//entry indx: 0->vo, 1->vi, 2->be, 3->bk.
+		acirp_cnt[0] = pxmitpriv->voq_cnt;
+		acirp_cnt[1] = pxmitpriv->viq_cnt;
+		acirp_cnt[2] = pxmitpriv->beq_cnt;
+		acirp_cnt[3] = pxmitpriv->bkq_cnt;
+
+		for(i=0; i<4; i++)
+		{
+			for(j=i+1; j<4; j++)
+			{
+				if(acirp_cnt[j]<acirp_cnt[i])
+				{
+					tmp = acirp_cnt[i];
+					acirp_cnt[i] = acirp_cnt[j];
+					acirp_cnt[j] = tmp;
+
+					tmp = inx[i];
+					inx[i] = inx[j];
+					inx[j] = tmp;
+				}
+			}
+		}
+#endif
+	}
+
+	_enter_critical_bh(&pxmitpriv->lock, &irqL0);
+
+	for(i = 0; i < entry; i++) 
+	{
+		phwxmit = phwxmit_i + inx[i];
+
+		//_enter_critical_ex(&phwxmit->sta_queue->lock, &irqL0);
+
+		sta_phead = get_list_head(phwxmit->sta_queue);
+		sta_plist = get_next(sta_phead);
+
+		while ((rtw_end_of_queue_search(sta_phead, sta_plist)) == _FALSE)
+		{
+
+			ptxservq= LIST_CONTAINOR(sta_plist, struct tx_servq, tx_pending);
+
+			pframe_queue = &ptxservq->sta_pending;
+
+			pxmitframe = dequeue_one_xmitframe(pxmitpriv, phwxmit, ptxservq, pframe_queue);
+
+			if(pxmitframe)
+			{
+				phwxmit->accnt--;
+
+				//Remove sta node when there is no pending packets.
+				if(_rtw_queue_empty(pframe_queue)) //must be done after get_next and before break
+					rtw_list_delete(&ptxservq->tx_pending);
+
+				//_exit_critical_ex(&phwxmit->sta_queue->lock, &irqL0);
+
+				goto exit;
+			}
+
+			sta_plist = get_next(sta_plist);
+
+		}
+
+		//_exit_critical_ex(&phwxmit->sta_queue->lock, &irqL0);
+
+	}
+
+exit:
+
+	_exit_critical_bh(&pxmitpriv->lock, &irqL0);
+
+_func_exit_;
+
+	return pxmitframe;
+}
+
+#if 1
+struct tx_servq *rtw_get_sta_pending(_adapter *padapter, struct sta_info *psta, sint up, u8 *ac)
+{
+	struct tx_servq *ptxservq;
+	
+_func_enter_;	
+
+	switch (up) 
+	{
+		case 1:
+		case 2:
+			ptxservq = &(psta->sta_xmitpriv.bk_q);
+			*(ac) = 3;
+			RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : BK \n"));
+			break;
+
+		case 4:
+		case 5:
+			ptxservq = &(psta->sta_xmitpriv.vi_q);
+			*(ac) = 1;
+			RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : VI\n"));
+			break;
+
+		case 6:
+		case 7:
+			ptxservq = &(psta->sta_xmitpriv.vo_q);
+			*(ac) = 0;
+			RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : VO \n"));			
+			break;
+
+		case 0:
+		case 3:
+		default:
+			ptxservq = &(psta->sta_xmitpriv.be_q);
+			*(ac) = 2;
+			RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : BE \n"));				
+		break;
+		
+	}
+
+_func_exit_;
+
+	return ptxservq;			
+}
+#else
+__inline static struct tx_servq *rtw_get_sta_pending
+	(_adapter *padapter, _queue **ppstapending, struct sta_info *psta, sint up)
+{
+	struct tx_servq *ptxservq;
+	struct hw_xmit *phwxmits =  padapter->xmitpriv.hwxmits;
+	
+_func_enter_;	
+
+#ifdef CONFIG_RTL8711
+
+	if(IS_MCAST(psta->hwaddr))
+	{
+		ptxservq = &(psta->sta_xmitpriv.be_q); // we will use be_q to queue bc/mc frames in BCMC_stainfo
+		*ppstapending = &padapter->xmitpriv.bm_pending; 
+	}
+	else
+#endif		
+	{
+		switch (up) 
+		{
+			case 1:
+			case 2:
+				ptxservq = &(psta->sta_xmitpriv.bk_q);
+				*ppstapending = &padapter->xmitpriv.bk_pending;
+				(phwxmits+3)->accnt++;
+				RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : BK \n"));
+				break;
+
+			case 4:
+			case 5:
+				ptxservq = &(psta->sta_xmitpriv.vi_q);
+				*ppstapending = &padapter->xmitpriv.vi_pending;
+				(phwxmits+1)->accnt++;
+				RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : VI\n"));
+				break;
+
+			case 6:
+			case 7:
+				ptxservq = &(psta->sta_xmitpriv.vo_q);
+				*ppstapending = &padapter->xmitpriv.vo_pending;
+				(phwxmits+0)->accnt++;
+				RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : VO \n"));			
+				break;
+
+			case 0:
+			case 3:
+			default:
+				ptxservq = &(psta->sta_xmitpriv.be_q);
+				*ppstapending = &padapter->xmitpriv.be_pending;
+				(phwxmits+2)->accnt++;
+				RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : BE \n"));				
+			break;
+			
+		}
+
+	}
+
+_func_exit_;
+
+	return ptxservq;			
+}
+#endif
+
+/*
+ * Will enqueue pxmitframe to the proper queue,
+ * and indicate it to xx_pending list.....
+ */
+s32 rtw_xmit_classifier(_adapter *padapter, struct xmit_frame *pxmitframe)
+{
+	//_irqL irqL0;
+	u8	ac_index;
+	struct sta_info	*psta;
+	struct tx_servq	*ptxservq;
+	struct pkt_attrib	*pattrib = &pxmitframe->attrib;
+	struct sta_priv	*pstapriv = &padapter->stapriv;
+	struct hw_xmit	*phwxmits =  padapter->xmitpriv.hwxmits;
+	sint res = _SUCCESS;
+
+_func_enter_;
+
+	if (pattrib->psta) {
+		psta = pattrib->psta;		
+	} else {
+		psta = rtw_get_stainfo(pstapriv, pattrib->ra);
+	}
+
+	if (psta == NULL) {
+		res = _FAIL;
+		RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("rtw_xmit_classifier: psta == NULL\n"));
+		goto exit;
+	}
+
+	ptxservq = rtw_get_sta_pending(padapter, psta, pattrib->priority, (u8 *)(&ac_index));
+
+	//_enter_critical(&pstapending->lock, &irqL0);
+
+	if (rtw_is_list_empty(&ptxservq->tx_pending)) {
+		rtw_list_insert_tail(&ptxservq->tx_pending, get_list_head(phwxmits[ac_index].sta_queue));
+	}
+
+	//_enter_critical(&ptxservq->sta_pending.lock, &irqL1);
+
+	rtw_list_insert_tail(&pxmitframe->list, get_list_head(&ptxservq->sta_pending));
+	ptxservq->qcnt++;
+	phwxmits[ac_index].accnt++;
+
+	//_exit_critical(&ptxservq->sta_pending.lock, &irqL1);
+
+	//_exit_critical(&pstapending->lock, &irqL0);
+
+exit:
+
+_func_exit_;
+
+	return res;
+}
+
+void rtw_alloc_hwxmits(_adapter *padapter)
+{
+	struct hw_xmit *hwxmits;
+	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
+
+	pxmitpriv->hwxmit_entry = HWXMIT_ENTRY;
+
+	pxmitpriv->hwxmits = (struct hw_xmit *)rtw_zmalloc(sizeof (struct hw_xmit) * pxmitpriv->hwxmit_entry);	
+	
+	hwxmits = pxmitpriv->hwxmits;
+
+	if(pxmitpriv->hwxmit_entry == 5)
+	{
+		//pxmitpriv->bmc_txqueue.head = 0;
+		//hwxmits[0] .phwtxqueue = &pxmitpriv->bmc_txqueue;
+		hwxmits[0] .sta_queue = &pxmitpriv->bm_pending;
+	
+		//pxmitpriv->vo_txqueue.head = 0;
+		//hwxmits[1] .phwtxqueue = &pxmitpriv->vo_txqueue;
+		hwxmits[1] .sta_queue = &pxmitpriv->vo_pending;
+
+		//pxmitpriv->vi_txqueue.head = 0;
+		//hwxmits[2] .phwtxqueue = &pxmitpriv->vi_txqueue;
+		hwxmits[2] .sta_queue = &pxmitpriv->vi_pending;
+	
+		//pxmitpriv->bk_txqueue.head = 0;
+		//hwxmits[3] .phwtxqueue = &pxmitpriv->bk_txqueue;
+		hwxmits[3] .sta_queue = &pxmitpriv->bk_pending;
+
+      		//pxmitpriv->be_txqueue.head = 0;
+		//hwxmits[4] .phwtxqueue = &pxmitpriv->be_txqueue;
+		hwxmits[4] .sta_queue = &pxmitpriv->be_pending;
+		
+	}	
+	else if(pxmitpriv->hwxmit_entry == 4)
+	{
+
+		//pxmitpriv->vo_txqueue.head = 0;
+		//hwxmits[0] .phwtxqueue = &pxmitpriv->vo_txqueue;
+		hwxmits[0] .sta_queue = &pxmitpriv->vo_pending;
+
+		//pxmitpriv->vi_txqueue.head = 0;
+		//hwxmits[1] .phwtxqueue = &pxmitpriv->vi_txqueue;
+		hwxmits[1] .sta_queue = &pxmitpriv->vi_pending;
+
+		//pxmitpriv->be_txqueue.head = 0;
+		//hwxmits[2] .phwtxqueue = &pxmitpriv->be_txqueue;
+		hwxmits[2] .sta_queue = &pxmitpriv->be_pending;
+	
+		//pxmitpriv->bk_txqueue.head = 0;
+		//hwxmits[3] .phwtxqueue = &pxmitpriv->bk_txqueue;
+		hwxmits[3] .sta_queue = &pxmitpriv->bk_pending;
+	}
+	else
+	{
+		
+
+	}
+	
+
+}
+
+void rtw_free_hwxmits(_adapter *padapter)
+{
+	struct hw_xmit *hwxmits;
+	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
+
+	hwxmits = pxmitpriv->hwxmits;
+	if(hwxmits)
+		rtw_mfree((u8 *)hwxmits, (sizeof (struct hw_xmit) * pxmitpriv->hwxmit_entry));
+}
+
+void rtw_init_hwxmits(struct hw_xmit *phwxmit, sint entry)
+{
+	sint i;
+_func_enter_;	
+	for(i = 0; i < entry; i++, phwxmit++)
+	{
+		//_rtw_spinlock_init(&phwxmit->xmit_lock);
+		//_rtw_init_listhead(&phwxmit->pending);		
+		//phwxmit->txcmdcnt = 0;
+		phwxmit->accnt = 0;
+	}
+_func_exit_;	
+}
+
+
+
+#ifdef CONFIG_BR_EXT
+int rtw_br_client_tx(_adapter *padapter, struct sk_buff **pskb)
+{
+	struct sk_buff *skb = *pskb;
+	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
+	_irqL irqL;
+	//if(check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE)
+	{
+		void dhcp_flag_bcast(_adapter *priv, struct sk_buff *skb);
+		int res, is_vlan_tag=0, i, do_nat25=1;
+		unsigned short vlan_hdr=0;
+		void *br_port = NULL;
+
+		//mac_clone_handle_frame(priv, skb);
+
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35))
+		br_port = padapter->pnetdev->br_port;
+#else   // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35))
+		rcu_read_lock();
+		br_port = rcu_dereference(padapter->pnetdev->rx_handler_data);
+		rcu_read_unlock();
+#endif  // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35))
+		_enter_critical_bh(&padapter->br_ext_lock, &irqL);
+		if (	!(skb->data[0] & 1) &&
+				br_port &&
+				memcmp(skb->data+MACADDRLEN, padapter->br_mac, MACADDRLEN) &&
+				*((unsigned short *)(skb->data+MACADDRLEN*2)) != __constant_htons(ETH_P_8021Q) &&
+				*((unsigned short *)(skb->data+MACADDRLEN*2)) == __constant_htons(ETH_P_IP) &&
+				!memcmp(padapter->scdb_mac, skb->data+MACADDRLEN, MACADDRLEN) && padapter->scdb_entry) {
+			memcpy(skb->data+MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN);
+			padapter->scdb_entry->ageing_timer = jiffies;
+			_exit_critical_bh(&padapter->br_ext_lock, &irqL);
+		}
+		else
+		//if (!priv->pmib->ethBrExtInfo.nat25_disable) 		
+		{
+//			if (priv->dev->br_port &&
+//				 !memcmp(skb->data+MACADDRLEN, priv->br_mac, MACADDRLEN)) {
+#if 1
+			if (*((unsigned short *)(skb->data+MACADDRLEN*2)) == __constant_htons(ETH_P_8021Q)) {
+				is_vlan_tag = 1;
+				vlan_hdr = *((unsigned short *)(skb->data+MACADDRLEN*2+2));
+				for (i=0; i<6; i++)
+					*((unsigned short *)(skb->data+MACADDRLEN*2+2-i*2)) = *((unsigned short *)(skb->data+MACADDRLEN*2-2-i*2));
+				skb_pull(skb, 4);
+			}
+
+			if (!memcmp(skb->data+MACADDRLEN, padapter->br_mac, MACADDRLEN) &&
+				(*((unsigned short *)(skb->data+MACADDRLEN*2)) == __constant_htons(ETH_P_IP)))
+				memcpy(padapter->br_ip, skb->data+WLAN_ETHHDR_LEN+12, 4);
+
+			if (*((unsigned short *)(skb->data+MACADDRLEN*2)) == __constant_htons(ETH_P_IP)) {
+				if (memcmp(padapter->scdb_mac, skb->data+MACADDRLEN, MACADDRLEN)) {
+					void *scdb_findEntry(_adapter *priv, unsigned char *macAddr, unsigned char *ipAddr);
+					
+					if ((padapter->scdb_entry = (struct nat25_network_db_entry *)scdb_findEntry(padapter,
+								skb->data+MACADDRLEN, skb->data+WLAN_ETHHDR_LEN+12)) != NULL) {
+						memcpy(padapter->scdb_mac, skb->data+MACADDRLEN, MACADDRLEN);
+						memcpy(padapter->scdb_ip, skb->data+WLAN_ETHHDR_LEN+12, 4);
+						padapter->scdb_entry->ageing_timer = jiffies;
+						do_nat25 = 0;
+					}
+				}
+				else {
+					if (padapter->scdb_entry) {
+						padapter->scdb_entry->ageing_timer = jiffies;
+						do_nat25 = 0;
+					}
+					else {
+						memset(padapter->scdb_mac, 0, MACADDRLEN);
+						memset(padapter->scdb_ip, 0, 4);
+					}
+				}
+			}
+			_exit_critical_bh(&padapter->br_ext_lock, &irqL);
+#endif // 1
+			if (do_nat25)
+			{
+				int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method);
+				if (nat25_db_handle(padapter, skb, NAT25_CHECK) == 0) {
+					struct sk_buff *newskb;
+
+					if (is_vlan_tag) {
+						skb_push(skb, 4);
+						for (i=0; i<6; i++)
+							*((unsigned short *)(skb->data+i*2)) = *((unsigned short *)(skb->data+4+i*2));
+						*((unsigned short *)(skb->data+MACADDRLEN*2)) = __constant_htons(ETH_P_8021Q);
+						*((unsigned short *)(skb->data+MACADDRLEN*2+2)) = vlan_hdr;
+					}
+
+					newskb = skb_copy(skb, GFP_ATOMIC);
+					if (newskb == NULL) {
+						//priv->ext_stats.tx_drops++;
+						DEBUG_ERR("TX DROP: skb_copy fail!\n");
+						//goto stop_proc;
+						return -1;
+					}
+					dev_kfree_skb_any(skb);
+
+					*pskb = skb = newskb;
+					if (is_vlan_tag) {
+						vlan_hdr = *((unsigned short *)(skb->data+MACADDRLEN*2+2));
+						for (i=0; i<6; i++)
+							*((unsigned short *)(skb->data+MACADDRLEN*2+2-i*2)) = *((unsigned short *)(skb->data+MACADDRLEN*2-2-i*2));
+						skb_pull(skb, 4);
+					}
+				}
+
+				if (skb_is_nonlinear(skb))
+					DEBUG_ERR("%s(): skb_is_nonlinear!!\n", __FUNCTION__);
+					
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18))
+				res = skb_linearize(skb, GFP_ATOMIC);
+#else	// (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18))
+				res = skb_linearize(skb);
+#endif	// (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18))
+				if (res < 0) {				
+						DEBUG_ERR("TX DROP: skb_linearize fail!\n");
+						//goto free_and_stop;
+						return -1;
+				}
+				
+				res = nat25_db_handle(padapter, skb, NAT25_INSERT);
+				if (res < 0) {
+					if (res == -2) {
+						//priv->ext_stats.tx_drops++;
+						DEBUG_ERR("TX DROP: nat25_db_handle fail!\n");
+						//goto free_and_stop;
+						return -1;
+
+					}
+					// we just print warning message and let it go
+					DEBUG_WARN("%s()-%d: nat25_db_handle INSERT Warning!\n", __FUNCTION__, __LINE__);
+					//return -1; // return -1 will cause system crash on 2011/08/30!
+					return 0;
+				}
+			}
+
+			memcpy(skb->data+MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN);
+
+			dhcp_flag_bcast(padapter, skb);
+
+			if (is_vlan_tag) {
+				skb_push(skb, 4);
+				for (i=0; i<6; i++)
+					*((unsigned short *)(skb->data+i*2)) = *((unsigned short *)(skb->data+4+i*2));
+				*((unsigned short *)(skb->data+MACADDRLEN*2)) = __constant_htons(ETH_P_8021Q);
+				*((unsigned short *)(skb->data+MACADDRLEN*2+2)) = vlan_hdr;
+			}
+		}
+#if 0		
+		else{
+			if (*((unsigned short *)(skb->data+MACADDRLEN*2)) == __constant_htons(ETH_P_8021Q)) {
+				is_vlan_tag = 1;
+			}
+				
+			if(is_vlan_tag){
+				if(ICMPV6_MCAST_MAC(skb->data) && ICMPV6_PROTO1A_VALN(skb->data)){
+                                        memcpy(skb->data+MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN);
+				}
+			}else
+			{
+				if(ICMPV6_MCAST_MAC(skb->data) && ICMPV6_PROTO1A(skb->data)){
+                                        memcpy(skb->data+MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN);
+				}
+			}	
+		}
+#endif	// 0
+
+		// check if SA is equal to our MAC
+		if (memcmp(skb->data+MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN)) {
+			//priv->ext_stats.tx_drops++;
+			DEBUG_ERR("TX DROP: untransformed frame SA:%02X%02X%02X%02X%02X%02X!\n",
+				skb->data[6],skb->data[7],skb->data[8],skb->data[9],skb->data[10],skb->data[11]);
+			//goto free_and_stop;
+			return -1;
+		}
+	}
+	return 0;
+}
+#endif	// CONFIG_BR_EXT
+
+/*
+ * The main transmit(tx) entry
+ *
+ * Return
+ *	1	enqueue
+ *	0	success, hardware will handle this xmit frame(packet)
+ *	<0	fail
+ */
+s32 rtw_xmit(_adapter *padapter, _pkt **ppkt)
+{
+	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
+	struct xmit_frame *pxmitframe = NULL;
+#ifdef CONFIG_BR_EXT
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	void *br_port = NULL;
+#endif	// CONFIG_BR_EXT
+
+	s32 res;
+
+
+	pxmitframe = rtw_alloc_xmitframe(pxmitpriv);
+	if (pxmitframe == NULL) {
+		RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("rtw_xmit: no more pxmitframe\n"));
+		#ifdef DBG_TX_DROP_FRAME
+		DBG_871X("DBG_TX_DROP_FRAME %s no more pxmitframe\n", __FUNCTION__);
+		#endif
+		return -1;
+	}
+
+#ifdef CONFIG_BR_EXT
+
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35))
+	br_port = padapter->pnetdev->br_port;
+#else   // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35))
+	rcu_read_lock();
+	br_port = rcu_dereference(padapter->pnetdev->rx_handler_data);
+	rcu_read_unlock();
+#endif  // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35))
+
+	if( br_port && check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE)
+	{
+		res = rtw_br_client_tx(padapter, ppkt);
+		if (res == -1)
+			return -1;
+	}	
+
+#endif	// CONFIG_BR_EXT
+
+	res = update_attrib(padapter, *ppkt, &pxmitframe->attrib);
+	if (res == _FAIL) {
+		RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("rtw_xmit: update attrib fail\n"));
+		#ifdef DBG_TX_DROP_FRAME
+		DBG_871X("DBG_TX_DROP_FRAME %s update attrib fail\n", __FUNCTION__);
+		#endif
+		rtw_free_xmitframe(pxmitpriv, pxmitframe);
+		return -1;
+	}
+	pxmitframe->pkt = *ppkt;
+
+	rtw_led_control(padapter, LED_CTL_TX);
+
+	if (padapter->HalFunc.hal_xmit(padapter, pxmitframe) == _FALSE)
+		return 1;
+
+	return 0;
+}
+
+#ifdef CONFIG_TDLS
+void process_enqueue_frame(_adapter *padapter, struct xmit_frame *pxmitframe, struct sta_info *psta)
+{
+	_irqL irqL;
+	struct sta_info *ptdls_sta=NULL;
+	struct sta_priv *pstapriv = &padapter->stapriv;
+	struct pkt_attrib *pattrib = &pxmitframe->attrib;
+	ptdls_sta=rtw_get_stainfo(pstapriv, pattrib->dst);
+
+	//enqueue frame for TDLS sleeping STA
+	rtw_list_delete(&pxmitframe->list);
+	_enter_critical_bh(&ptdls_sta->sleep_q.lock, &irqL);	
+	rtw_list_insert_tail(&pxmitframe->list, get_list_head(&ptdls_sta->sleep_q));
+	ptdls_sta->sleepq_len++;
+
+	//indicate 4-AC queue bit in TDLS peer traffic indication
+	switch(pattrib->priority)
+	{
+		case 1:
+		case 2:
+			ptdls_sta->uapsd_bk = ptdls_sta->uapsd_bk | BIT(0);
+			break;
+		case 4:
+		case 5:
+			ptdls_sta->uapsd_vi = ptdls_sta->uapsd_vi | BIT(0);
+			break;
+		case 6:
+		case 7:
+			ptdls_sta->uapsd_vo = ptdls_sta->uapsd_vo | BIT(0);
+			break;
+		case 0:
+		case 3:
+		default:
+			ptdls_sta->uapsd_be = ptdls_sta->uapsd_be | BIT(0);
+			break;
+	}
+
+	ptdls_sta->sleepq_ac_len++;
+
+	_exit_critical_bh(&ptdls_sta->sleep_q.lock, &irqL);			
+
+}
+
+sint xmit_tdls_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe)
+{
+	sint ret=_FALSE;
+
+	_irqL irqL;
+	struct sta_info *ptdls_sta=NULL;
+	struct sta_priv *pstapriv = &padapter->stapriv;
+	struct pkt_attrib *pattrib = &pxmitframe->attrib;
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	int i;
+	
+	ptdls_sta=rtw_get_stainfo(pstapriv, pattrib->dst);
+	if(ptdls_sta==NULL){
+		if(pHalData->CurrentChannel != pmlmeext->cur_channel){
+			DBG_8192C("pHalData: %02x, pmlmeext: %02x ", pHalData->CurrentChannel, pmlmeext->cur_channel);
+			for(i=0; i<6; i++){
+				DBG_8192C("%02x ", *(pattrib->dst+i));
+			}
+			DBG_8192C("\n");
+			ret = 2;	//enqueue data that want to transmit via AP
+		}
+
+		return ret;
+	}else if(ptdls_sta->state&TDLS_LINKED_STATE){
+		if(ptdls_sta->state&TDLS_PEER_SLEEP_STATE)
+		{
+			process_enqueue_frame(padapter, pxmitframe, ptdls_sta);
+			//when sleepq_len ==1? or >=1? transmit PTI
+			if(ptdls_sta->sleepq_len==1)
+			{
+				//transmit TDLS PTI via AP
+				ptdls_sta->option=2;
+				_set_workitem(&ptdls_sta->option_workitem);
+			}
+			ret = _TRUE;
+		}
+		else if(ptdls_sta->state & TDLS_CH_SWITCH_ON_STATE){
+			if(!((ptdls_sta->state & TDLS_AT_OFF_CH_STATE) && (ptdls_sta->state & TDLS_PEER_AT_OFF_STATE))){
+				process_enqueue_frame(padapter, pxmitframe, ptdls_sta);
+				ret = _TRUE;
+			}
+		}
+
+	}
+	return ret;
+	
+}
+#endif
+
+#ifdef CONFIG_AP_MODE
+
+sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe)
+{
+	_irqL irqL;
+	sint ret=_FALSE;
+	struct sta_info *psta=NULL;
+	struct sta_priv *pstapriv = &padapter->stapriv;
+	struct pkt_attrib *pattrib = &pxmitframe->attrib;
+	sint bmcst = IS_MCAST(pattrib->ra);
+
+	if(pattrib->psta)
+	{
+		psta = pattrib->psta;
+	}
+	else
+	{
+		psta=rtw_get_stainfo(pstapriv, pattrib->ra);
+	}
+
+	if(psta==NULL)
+		return ret;
+
+	if(pattrib->triggered==1)
+	{
+		//DBG_871X("directly xmit pspoll_triggered packet\n");
+
+		//pattrib->triggered=0;
+
+		if(bmcst)
+			pattrib->qsel = 0x11;//HIQ
+		
+
+		return ret;
+	}
+
+
+	if(bmcst)
+	{
+		if(pstapriv->sta_dz_bitmap)//if anyone sta is in ps mode
+		{
+			//pattrib->qsel = 0x11;//HIQ
+			
+			rtw_list_delete(&pxmitframe->list);
+			
+			_enter_critical_bh(&psta->sleep_q.lock, &irqL);	
+			
+			rtw_list_insert_tail(&pxmitframe->list, get_list_head(&psta->sleep_q));
+			
+			psta->sleepq_len++;
+
+			pstapriv->tim_bitmap |= BIT(0);//
+			
+			//DBG_871X("enqueue, sq_len=%d, tim=%x\n", psta->sleepq_len, pstapriv->tim_bitmap);
+
+			update_beacon(padapter, _TIM_IE_, NULL, _FALSE);//tx bc/mc packets after upate bcn
+			
+			_exit_critical_bh(&psta->sleep_q.lock, &irqL);				
+			
+			ret = _TRUE;			
+			
+		}
+		
+		return ret;
+		
+	}
+	
+
+	if(psta->state&WIFI_SLEEP_STATE)
+	{
+		u8 wmmps_ac=0;
+	
+		if(pstapriv->sta_dz_bitmap&BIT(psta->aid))	
+		{			
+			rtw_list_delete(&pxmitframe->list);
+		
+			_enter_critical_bh(&psta->sleep_q.lock, &irqL);	
+			
+			rtw_list_insert_tail(&pxmitframe->list, get_list_head(&psta->sleep_q));
+			
+			psta->sleepq_len++;
+
+			switch(pattrib->priority)
+			{
+				case 1:
+				case 2:
+					wmmps_ac = psta->uapsd_bk&BIT(0);
+					break;
+				case 4:
+				case 5:
+					wmmps_ac = psta->uapsd_vi&BIT(0);
+					break;
+				case 6:
+				case 7:
+					wmmps_ac = psta->uapsd_vo&BIT(0);
+					break;
+				case 0:
+				case 3:
+				default:
+					wmmps_ac = psta->uapsd_be&BIT(0);
+					break;
+			}
+
+			if(wmmps_ac)
+				psta->sleepq_ac_len++;
+
+			if(((psta->has_legacy_ac) && (!wmmps_ac)) ||((!psta->has_legacy_ac)&&(wmmps_ac)))
+			{
+				pstapriv->tim_bitmap |= BIT(psta->aid);
+
+				//DBG_871X("enqueue, sq_len=%d, tim=%x\n", psta->sleepq_len, pstapriv->tim_bitmap);
+
+				if(psta->sleepq_len==1)
+				{
+					//DBG_871X("sleepq_len==1, update BCNTIM\n");
+					//upate BCN for TIM IE
+					update_beacon(padapter, _TIM_IE_, NULL, _FALSE);
+				}
+			}
+
+			_exit_critical_bh(&psta->sleep_q.lock, &irqL);			
+
+			//if(psta->sleepq_len > (NR_XMITFRAME>>3))
+			//{
+			//	wakeup_sta_to_xmit(padapter, psta);
+			//}	
+
+			ret = _TRUE;
+
+		}
+
+	}
+
+	return ret;
+	
+}
+
+void wakeup_sta_to_xmit(_adapter *padapter, struct sta_info *psta)
+{	 
+	_irqL irqL;	 
+	u8 update_mask=0, wmmps_ac=0;
+	struct sta_info *psta_bmc;
+	_list	*xmitframe_plist, *xmitframe_phead;
+	struct xmit_frame *pxmitframe=NULL;
+	struct sta_priv *pstapriv = &padapter->stapriv;
+
+	_enter_critical_bh(&psta->sleep_q.lock, &irqL);	
+
+	xmitframe_phead = get_list_head(&psta->sleep_q);
+	xmitframe_plist = get_next(xmitframe_phead);
+
+	while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE)
+	{			
+		pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list);
+
+		xmitframe_plist = get_next(xmitframe_plist);            
+
+		rtw_list_delete(&pxmitframe->list);
+
+		switch(pxmitframe->attrib.priority)
+		{
+			case 1:
+			case 2:
+				wmmps_ac = psta->uapsd_bk&BIT(1);
+				break;
+			case 4:
+			case 5:
+				wmmps_ac = psta->uapsd_vi&BIT(1);
+				break;
+			case 6:
+			case 7:
+				wmmps_ac = psta->uapsd_vo&BIT(1);
+				break;
+			case 0:
+			case 3:
+			default:
+				wmmps_ac = psta->uapsd_be&BIT(1);
+				break;	
+		}
+
+		psta->sleepq_len--;
+		if(psta->sleepq_len>0)
+			pxmitframe->attrib.mdata = 1;
+		else
+			pxmitframe->attrib.mdata = 0;
+
+		if(wmmps_ac)
+		{
+			psta->sleepq_ac_len--;
+			if(psta->sleepq_ac_len>0)
+			{
+				pxmitframe->attrib.mdata = 1;
+				pxmitframe->attrib.eosp = 0;
+			}
+			else
+			{
+				pxmitframe->attrib.mdata = 0;
+				pxmitframe->attrib.eosp = 1;
+			}
+		}
+		
+		pxmitframe->attrib.triggered = 1;
+
+		if(padapter->HalFunc.hal_xmit(padapter, pxmitframe) == _TRUE)
+		{		
+			rtw_os_xmit_complete(padapter, pxmitframe);
+		}		
+
+		if(psta->sleepq_len==0)
+		{
+			pstapriv->tim_bitmap &= ~BIT(psta->aid);
+
+			//DBG_871X("wakeup to xmit, qlen==0, update_BCNTIM, tim=%x\n", pstapriv->tim_bitmap);
+			//upate BCN for TIM IE
+			//update_BCNTIM(padapter);
+			update_mask = BIT(0);
+		}
+		
+	}	
+	
+	_exit_critical_bh(&psta->sleep_q.lock, &irqL);	
+
+
+	//for BC/MC Frames
+	psta_bmc = rtw_get_bcmc_stainfo(padapter);
+	if(!psta_bmc)
+		return;
+
+	if(pstapriv->sta_dz_bitmap==0x0)//no any sta in ps mode
+	{
+		_enter_critical_bh(&psta_bmc->sleep_q.lock, &irqL);	
+
+		xmitframe_phead = get_list_head(&psta_bmc->sleep_q);
+		xmitframe_plist = get_next(xmitframe_phead);
+
+		while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE)
+		{			
+			pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list);
+
+			xmitframe_plist = get_next(xmitframe_plist);
+
+			rtw_list_delete(&pxmitframe->list);
+
+			psta_bmc->sleepq_len--;
+			if(psta_bmc->sleepq_len>0)
+				pxmitframe->attrib.mdata = 1;
+			else
+				pxmitframe->attrib.mdata = 0;
+			
+
+			pxmitframe->attrib.triggered = 1;
+
+			if(padapter->HalFunc.hal_xmit(padapter, pxmitframe) == _TRUE)
+			{		
+				rtw_os_xmit_complete(padapter, pxmitframe);
+			}
+
+			if(psta_bmc->sleepq_len==0)
+			{
+				pstapriv->tim_bitmap &= ~BIT(0);
+
+				//DBG_871X("wakeup to xmit, qlen==0, update_BCNTIM, tim=%x\n", pstapriv->tim_bitmap);
+				//upate BCN for TIM IE
+				//update_BCNTIM(padapter);
+				update_mask |= BIT(1);
+			}
+		
+		}	
+	
+		_exit_critical_bh(&psta_bmc->sleep_q.lock, &irqL);	
+
+	}	
+
+	
+	if(update_mask)
+	{
+		//update_BCNTIM(padapter);
+		update_beacon(padapter, _TIM_IE_, NULL, _FALSE);
+	}	
+	
+}
+
+void xmit_delivery_enabled_frames(_adapter *padapter, struct sta_info *psta)
+{
+	_irqL irqL;
+	u8 wmmps_ac=0;
+	_list	*xmitframe_plist, *xmitframe_phead;
+	struct xmit_frame *pxmitframe=NULL;
+	struct sta_priv *pstapriv = &padapter->stapriv;
+
+	_enter_critical_bh(&psta->sleep_q.lock, &irqL);	
+
+	xmitframe_phead = get_list_head(&psta->sleep_q);
+	xmitframe_plist = get_next(xmitframe_phead);
+
+	while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE)
+	{			
+		pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list);
+
+		xmitframe_plist = get_next(xmitframe_plist);
+
+		switch(pxmitframe->attrib.priority)
+		{
+			case 1:
+			case 2:
+				wmmps_ac = psta->uapsd_bk&BIT(1);
+				break;
+			case 4:
+			case 5:
+				wmmps_ac = psta->uapsd_vi&BIT(1);
+				break;
+			case 6:
+			case 7:
+				wmmps_ac = psta->uapsd_vo&BIT(1);
+				break;
+			case 0:
+			case 3:
+			default:
+				wmmps_ac = psta->uapsd_be&BIT(1);
+				break;	
+		}
+		
+		if(!wmmps_ac)
+			continue;
+
+		rtw_list_delete(&pxmitframe->list);
+
+		psta->sleepq_len--;
+		psta->sleepq_ac_len--;
+
+		if(psta->sleepq_ac_len>0)
+		{
+			pxmitframe->attrib.mdata = 1;
+			pxmitframe->attrib.eosp = 0;
+		}
+		else
+		{
+			pxmitframe->attrib.mdata = 0;
+			pxmitframe->attrib.eosp = 1;
+		}
+
+		pxmitframe->attrib.triggered = 1;
+
+		if(padapter->HalFunc.hal_xmit(padapter, pxmitframe) == _TRUE)
+		{		
+			rtw_os_xmit_complete(padapter, pxmitframe);
+		}
+
+		if((psta->sleepq_ac_len==0) && (!psta->has_legacy_ac) && (wmmps_ac))
+		{
+			pstapriv->tim_bitmap &= ~BIT(psta->aid);
+
+			//DBG_871X("wakeup to xmit, qlen==0, update_BCNTIM, tim=%x\n", pstapriv->tim_bitmap);
+			//upate BCN for TIM IE
+			//update_BCNTIM(padapter);
+			update_beacon(padapter, _TIM_IE_, NULL, _FALSE);
+			//update_mask = BIT(0);
+		}
+	
+	}	
+	
+	_exit_critical_bh(&psta->sleep_q.lock, &irqL);	
+
+}
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/hal_init.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/hal_init.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/hal_init.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/hal_init.c	2017-09-23 03:42:49.910675394 +0800
@@ -0,0 +1,120 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+#define _HAL_INIT_C_
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtw_byteorder.h>
+
+#include <hal_init.h>
+
+#ifdef CONFIG_SDIO_HCI
+	#include <sdio_hal.h>
+#elif defined(CONFIG_USB_HCI)
+	#include <usb_hal.h>
+#endif
+
+void intf_chip_configure(_adapter *padapter)
+{
+	if(padapter->HalFunc.intf_chip_configure)
+		padapter->HalFunc.intf_chip_configure(padapter);
+}
+
+void intf_read_chip_info(_adapter *padapter)
+{
+	if(padapter->HalFunc.read_adapter_info)
+		padapter->HalFunc.read_adapter_info(padapter);
+}
+
+void intf_read_chip_version(_adapter *padapter)
+{
+	if(padapter->HalFunc.read_chip_version)
+		padapter->HalFunc.read_chip_version(padapter);
+}
+
+void	rtw_dm_init(_adapter *padapter)
+{
+	if(padapter->HalFunc.dm_init)
+		padapter->HalFunc.dm_init(padapter);
+}
+
+void	rtw_sw_led_init(_adapter *padapter)
+{
+	if(padapter->HalFunc.InitSwLeds)
+		padapter->HalFunc.InitSwLeds(padapter);
+}
+
+void rtw_sw_led_deinit(_adapter *padapter)
+{
+	if(padapter->HalFunc.DeInitSwLeds)
+		padapter->HalFunc.DeInitSwLeds(padapter);
+}
+
+uint	 rtw_hal_init(_adapter *padapter) 
+{
+	uint	status = _SUCCESS;
+	
+	padapter->hw_init_completed=_FALSE;
+
+	status = padapter->HalFunc.hal_init(padapter);
+
+	if(status == _SUCCESS){
+		padapter->hw_init_completed = _TRUE;
+	}
+	else{
+	 	padapter->hw_init_completed = _FALSE;
+		RT_TRACE(_module_hal_init_c_,_drv_err_,("rtw_hal_init: hal__init fail\n"));
+	}
+
+	RT_TRACE(_module_hal_init_c_,_drv_err_,("-rtl871x_hal_init:status=0x%x\n",status));
+
+	return status;
+
+}	
+
+uint	 rtw_hal_deinit(_adapter *padapter)
+{
+	uint	status = _SUCCESS;
+	
+_func_enter_;
+
+	status = padapter->HalFunc.hal_deinit(padapter);
+
+	if(status == _SUCCESS){
+		padapter->hw_init_completed = _FALSE;
+	}
+	else
+	{
+		RT_TRACE(_module_hal_init_c_,_drv_err_,("\n rtw_hal_deinit: hal_init fail\n"));
+	}
+	
+_func_exit_;
+	
+	return status;
+	
+}
+#ifdef DBG_CONFIG_ERROR_DETECT
+void	rtw_sreset_init(_adapter *padapter)
+{
+	if(padapter->HalFunc.sreset_init_value)
+		padapter->HalFunc.sreset_init_value(padapter); 
+}
+#endif	
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_cmd.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_cmd.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_cmd.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_cmd.c	2017-09-23 03:42:49.910675394 +0800
@@ -0,0 +1,1226 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#define _RTL8192C_CMD_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <recv_osdep.h>
+#include <cmd_osdep.h>
+#include <mlme_osdep.h>
+#include <rtw_byteorder.h>
+#include <circ_buf.h>
+#include <rtw_ioctl_set.h>
+
+#include <rtl8192c_hal.h>
+
+
+#if 0
+static BOOLEAN
+CheckWriteMSG(
+	IN	PADAPTER		Adapter,
+	IN	u8		BoxNum
+)
+{
+	u8	valHMETFR;
+	BOOLEAN	Result = _FALSE;
+	
+	valHMETFR = rtw_read8(Adapter, REG_HMETFR);
+
+	//DbgPrint("CheckWriteH2C(): Reg[0x%2x] = %x\n",REG_HMETFR, valHMETFR);
+
+	if(((valHMETFR>>BoxNum)&BIT0) == 1)
+		Result = _TRUE;
+	
+	return Result;
+
+}
+
+static BOOLEAN CheckFwReadLastMSG(
+	IN	PADAPTER		Adapter,
+	IN	u8		BoxNum
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8	valHMETFR, valMCUTST_1;
+	BOOLEAN	 Result = _FALSE;
+	
+	valHMETFR = rtw_read8(Adapter, REG_HMETFR);
+	valMCUTST_1 = rtw_read8(Adapter, (REG_MCUTST_1+BoxNum));
+
+	//DbgPrint("REG[%x] = %x, REG[%x] = %x\n", 
+	//	REG_HMETFR, valHMETFR, REG_MCUTST_1+BoxNum, valMCUTST_1 );
+
+	// Do not seperate to 91C and 88C, we use the same setting. Suggested by SD4 Filen. 2009.12.03.
+	if(IS_NORMAL_CHIP(pHalData->VersionID))
+	{
+		if(((valHMETFR>>BoxNum)&BIT0) == 0)
+			Result = _TRUE;
+	}
+	else
+	{
+		if((((valHMETFR>>BoxNum)&BIT0) == 0) && (valMCUTST_1 == 0))
+		{
+			Result = _TRUE;
+		}
+	}
+	
+	return Result;
+}
+#endif
+
+
+#define RTL92C_MAX_H2C_BOX_NUMS	4
+#define RTL92C_MAX_CMD_LEN	5
+#define MESSAGE_BOX_SIZE		4
+#define EX_MESSAGE_BOX_SIZE	2
+
+static u8 _is_fw_read_cmd_down(_adapter* padapter, u8 isvern, u8 msgbox_num)
+{
+	u8	read_down = _FALSE;
+	int 	retry_cnts = 100;
+	
+	u8 valid;
+
+//	DBG_8192C(" _is_fw_read_cmd_down ,isnormal_chip(%x),reg_1cc(%x),msg_box(%d)...\n",isvern,rtw_read8(padapter,REG_HMETFR),msgbox_num);
+	
+	do{
+		valid = rtw_read8(padapter,REG_HMETFR) & BIT(msgbox_num);	
+		if(isvern){
+			if(0 == valid ){
+				read_down = _TRUE;
+			}			
+		}
+		else{
+			if((0 == valid) && (0 == rtw_read8(padapter, REG_MCUTST_1+msgbox_num))){
+				read_down = _TRUE;	
+			}
+		}
+	}while( (!read_down) && (retry_cnts--));
+
+	return read_down;
+	
+}
+
+
+/*****************************************
+* H2C Msg format :
+*| 31 - 8		|7		| 6 - 0	|	
+*| h2c_msg 	|Ext_bit	|CMD_ID	|
+*
+******************************************/
+int rtl8192c_FillH2CCmd(_adapter* padapter, u8 ElementID, u32 CmdLen, u8* pCmdBuffer)
+{
+#if 1
+	u8	bcmd_down = _FALSE;
+	int 	retry_cnts = 100;
+	u8	h2c_box_num;
+	u32	msgbox_addr;
+	u32  msgbox_ex_addr;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	u8	isnchip =IS_NORMAL_CHIP(pHalData->VersionID);
+	u32	h2c_cmd = 0;
+	u16	h2c_cmd_ex = 0;
+	int ret = _FAIL;
+
+	_func_enter_;	
+
+	if(!pCmdBuffer){
+		goto exit;
+	}
+	if(CmdLen > RTL92C_MAX_CMD_LEN){
+		goto exit;
+	}
+	//pay attention to if  race condition happened in  H2C cmd setting.
+	do{
+		h2c_box_num = pHalData->LastHMEBoxNum;
+
+		if(!_is_fw_read_cmd_down(padapter, isnchip, h2c_box_num)){
+			DBG_8192C(" fw read cmd failed...\n");
+			goto exit;
+		}
+
+		if(CmdLen<=3)
+		{
+			_rtw_memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer, CmdLen );
+		}
+		else{
+			_rtw_memcpy((u8*)(&h2c_cmd_ex), pCmdBuffer, EX_MESSAGE_BOX_SIZE);
+			_rtw_memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer+2,( CmdLen-EX_MESSAGE_BOX_SIZE));
+			*(u8*)(&h2c_cmd) |= BIT(7);
+		}
+
+		*(u8*)(&h2c_cmd) |= ElementID;
+
+		if(h2c_cmd & BIT(7)){
+			msgbox_ex_addr = REG_HMEBOX_EXT_0 + (h2c_box_num *EX_MESSAGE_BOX_SIZE);
+			h2c_cmd_ex = cpu_to_le16( h2c_cmd_ex );
+			rtw_write16(padapter, msgbox_ex_addr, h2c_cmd_ex);
+		}
+		msgbox_addr =REG_HMEBOX_0 + (h2c_box_num *MESSAGE_BOX_SIZE);
+		h2c_cmd = cpu_to_le32( h2c_cmd );
+		rtw_write32(padapter,msgbox_addr, h2c_cmd);
+
+		if(!isnchip){//for Test chip
+			if(! (rtw_read8(padapter, REG_HMETFR) & BIT(h2c_box_num))){
+				DBG_8192C("Chip test  - check fw write failed, write again..\n");
+				continue;
+			}
+			// Fill H2C protection register.
+			rtw_write8(padapter,REG_MCUTST_1+h2c_box_num, 0xFF);
+		}
+		bcmd_down = _TRUE;
+
+	//	DBG_8192C("MSG_BOX:%d,CmdLen(%d), reg:0x%x =>h2c_cmd:0x%x, reg:0x%x =>h2c_cmd_ex:0x%x ..\n"
+	//	 	,pHalData->LastHMEBoxNum ,CmdLen,msgbox_addr,h2c_cmd,msgbox_ex_addr,h2c_cmd_ex);
+
+		 pHalData->LastHMEBoxNum = (h2c_box_num+1) % RTL92C_MAX_H2C_BOX_NUMS ;
+
+	}while((!bcmd_down) && (retry_cnts--));
+/*
+	if(bcmd_down)
+		DBG_8192C("H2C Cmd exe down. \n"	);	
+	else
+		DBG_8192C("H2C Cmd exe failed. \n"	);
+*/
+	ret = _SUCCESS;
+	_func_exit_;
+
+#else
+	u8	BoxNum;
+	u16	BOXReg, BOXExtReg;
+	u8	BoxContent[4], BoxExtContent[2];
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	u8 	BufIndex=0;
+	u8	bWriteSucess = _FALSE;
+	u8	IsFwRead = _FALSE;
+	u8	WaitH2cLimmit = 100;
+
+	u32	h2c_cmd = 0;
+	u16	h2c_cmd_ex = 0;
+
+_func_enter_;	
+
+	//DBG_8192C("FillH2CCmd : ElementID=%d \n",ElementID);
+
+	while(!bWriteSucess)
+	{
+		// 2. Find the last BOX number which has been writen.
+		BoxNum = pHalData->LastHMEBoxNum;
+		switch(BoxNum)
+		{
+			case 0:
+				BOXReg = REG_HMEBOX_0;
+				BOXExtReg = REG_HMEBOX_EXT_0;
+				break;
+			case 1:
+				BOXReg = REG_HMEBOX_1;
+				BOXExtReg = REG_HMEBOX_EXT_1;
+				break;
+			case 2:
+				BOXReg = REG_HMEBOX_2;
+				BOXExtReg = REG_HMEBOX_EXT_2;
+				break;
+			case 3:
+				BOXReg = REG_HMEBOX_3;
+				BOXExtReg = REG_HMEBOX_EXT_3;
+				break;
+			default:
+				break;
+		}
+
+		// 3. Check if the box content is empty.
+		IsFwRead = CheckFwReadLastMSG(padapter, BoxNum);
+		while(!IsFwRead)
+		{
+			//wait until Fw read
+			WaitH2cLimmit--;
+			if(WaitH2cLimmit == 0)
+			{
+				DBG_8192C("FillH2CCmd92C(): Wating too long for FW read clear HMEBox(%d)!!!\n", BoxNum);
+				break;
+			}
+			rtw_msleep_os(10); //us
+			IsFwRead = CheckFwReadLastMSG(padapter, BoxNum);
+			//U1btmp = PlatformEFIORead1Byte(Adapter, 0x1BF);
+			//RT_TRACE(COMP_CMD, DBG_LOUD, ("FillH2CCmd92C(): Wating for FW read clear HMEBox(%d)!!! 0x1BF = %2x\n", BoxNum, U1btmp));
+		}
+
+		// If Fw has not read the last H2C cmd, break and give up this H2C.
+		if(!IsFwRead)
+		{
+			DBG_8192C("FillH2CCmd92C():  Write H2C register BOX[%d] fail!!!!! Fw do not read. \n", BoxNum);
+			break;
+		}
+
+		// 4. Fill the H2C cmd into box		
+		_rtw_memset(BoxContent, 0, sizeof(BoxContent));
+		_rtw_memset(BoxExtContent, 0, sizeof(BoxExtContent));
+		
+		BoxContent[0] = ElementID; // Fill element ID
+
+		//DBG_8192C("FillH2CCmd92C():Write ElementID BOXReg(%4x) = %2x \n", BOXReg, ElementID);
+
+		switch(CmdLen)
+		{
+			case 1:
+				{
+					BoxContent[0] &= ~(BIT7);
+					_rtw_memcpy((u8*)(BoxContent)+1, pCmdBuffer+BufIndex, 1);
+					rtw_write32(padapter, BOXReg, *((u32*)BoxContent));
+					h2c_cmd =  *((u32*)BoxContent);
+					break;
+				}
+			case 2:
+				{	
+					BoxContent[0] &= ~(BIT7);
+					_rtw_memcpy((u8*)(BoxContent)+1, pCmdBuffer+BufIndex, 2);
+					rtw_write32(padapter, BOXReg, *((u32*)BoxContent));
+					h2c_cmd =  *((u32*)BoxContent);
+					break;
+				}
+			case 3:
+				{
+					BoxContent[0] &= ~(BIT7);
+					_rtw_memcpy((u8*)(BoxContent)+1, pCmdBuffer+BufIndex, 3);
+					rtw_write32(padapter, BOXReg, *((u32*)BoxContent));
+					h2c_cmd =  *((u32*)BoxContent);
+					break;
+				}
+			case 4:
+				{
+					BoxContent[0] |= (BIT7);
+					_rtw_memcpy((u8*)(BoxExtContent), pCmdBuffer+BufIndex, 2);
+					_rtw_memcpy((u8*)(BoxContent)+1, pCmdBuffer+BufIndex+2, 2);
+					rtw_write16(padapter, BOXExtReg, *((u16*)BoxExtContent));
+					rtw_write32(padapter, BOXReg, *((u32*)BoxContent));
+					h2c_cmd =  *((u32*)BoxContent);
+					h2c_cmd_ex = *((u32*)BoxExtContent);
+					break;
+				}
+			case 5:
+				{
+					BoxContent[0] |= (BIT7);
+					_rtw_memcpy((u8*)(BoxExtContent), pCmdBuffer+BufIndex, 2);
+					_rtw_memcpy((u8*)(BoxContent)+1, pCmdBuffer+BufIndex+2, 3);
+					rtw_write16(padapter, BOXExtReg, *((u16*)BoxExtContent));
+					rtw_write32(padapter, BOXReg, *((u32*)BoxContent));
+					h2c_cmd =  *((u32*)BoxContent);
+					h2c_cmd_ex = *((u32*)BoxExtContent);
+					break;
+				}
+			default:
+					break;
+					
+		}
+			
+
+		DBG_8192C("MSG_BOX:%d,CmdLen(%d), reg:0x%x =>h2c_cmd:0x%x, reg:0x%x =>h2c_cmd_ex:0x%x ..\n"
+		 	,pHalData->LastHMEBoxNum ,CmdLen,BOXReg,h2c_cmd,BOXExtReg,h2c_cmd_ex);
+
+		//DBG_8192C("FillH2CCmd(): BoxExtContent=0x%x\n", *(u16*)BoxExtContent);		
+		//DBG_8192C("FillH2CCmd(): BoxContent=0x%x\n", *(u32*)BoxContent);
+			
+		if(IS_NORMAL_CHIP(pHalData->VersionID))
+		{
+			// 5. Normal chip does not need to check if the H2C cmd has be written successfully.
+			bWriteSucess = _TRUE;
+		}
+		else
+		{	
+			// 5. Check if the H2C cmd has be written successfully.
+			bWriteSucess = CheckWriteMSG(padapter, BoxNum);
+			if(!bWriteSucess) //If not then write again.
+				continue;
+			
+			//6. Fill H2C protection register.
+
+			rtw_write8(padapter, REG_MCUTST_1+BoxNum, 0xFF);
+			//RT_TRACE(COMP_CMD, DBG_LOUD, ("FillH2CCmd92C():Write Reg(%4x) = 0xFF \n", REG_MCUTST_1+BoxNum));
+		}
+
+		// Record the next BoxNum
+		pHalData->LastHMEBoxNum = BoxNum+1;
+		if(pHalData->LastHMEBoxNum == 4) // loop to 0
+			pHalData->LastHMEBoxNum = 0;
+		
+		//DBG_8192C("FillH2CCmd92C():pHalData->LastHMEBoxNum  = %d\n", pHalData->LastHMEBoxNum);
+		
+	}
+
+_func_exit_;
+
+#endif
+
+#ifdef CONFIG_CONCURRENT_MODE
+	_exit_critical_mutex(padapter->ph2c_fwcmd_mutex, NULL);	
+#endif
+exit:
+	return ret;
+
+}
+
+u8 rtl8192c_h2c_msg_hdl(_adapter *padapter, unsigned char *pbuf)
+{	
+	u8 ElementID, CmdLen;
+	u8 *pCmdBuffer;
+	struct cmd_msg_parm  *pcmdmsg;
+	
+	if(!pbuf)
+		return H2C_PARAMETERS_ERROR;
+
+	pcmdmsg = (struct cmd_msg_parm*)pbuf;
+	ElementID = pcmdmsg->eid;
+	CmdLen = pcmdmsg->sz;
+	pCmdBuffer = pcmdmsg->buf;
+
+	rtl8192c_FillH2CCmd(padapter, ElementID, CmdLen, pCmdBuffer);
+
+	return H2C_SUCCESS;
+}
+
+#if defined(CONFIG_AUTOSUSPEND) && defined(SUPPORT_HW_RFOFF_DETECTED)
+u8 rtl8192c_set_FwSelectSuspend_cmd(_adapter *padapter ,u8 bfwpoll, u16 period)
+{
+	u8	res=_SUCCESS;
+	struct H2C_SS_RFOFF_PARAM param;
+	DBG_8192C("==>%s bfwpoll(%x)\n",__FUNCTION__,bfwpoll);
+	param.gpio_period = period;//Polling GPIO_11 period time
+	param.ROFOn = (_TRUE == bfwpoll)?1:0;
+	rtl8192c_FillH2CCmd(padapter, SELECTIVE_SUSPEND_ROF_CMD, sizeof(param), (u8*)(&param));		
+	return res;
+}
+#endif //CONFIG_AUTOSUSPEND && SUPPORT_HW_RFOFF_DETECTED
+
+u8 rtl8192c_set_rssi_cmd(_adapter*padapter, u8 *param)
+{	
+	u8	res=_SUCCESS;
+
+_func_enter_;
+
+	*((u32*) param ) = cpu_to_le32( *((u32*) param ) );
+
+	rtl8192c_FillH2CCmd(padapter, RSSI_SETTING_EID, 3, param);
+
+_func_exit_;
+
+	return res;
+}
+
+u8 rtl8192c_set_raid_cmd(_adapter*padapter, u32 mask, u8 arg)
+{	
+	u8	buf[5];
+	u8	res=_SUCCESS;
+	
+_func_enter_;	
+	
+	_rtw_memset(buf, 0, 5);
+	mask = cpu_to_le32( mask );
+	_rtw_memcpy(buf, &mask, 4);
+	buf[4]  = arg;
+
+	rtl8192c_FillH2CCmd(padapter, MACID_CONFIG_EID, 5, buf);
+	
+_func_exit_;
+
+	return res;
+
+}
+
+//bitmap[0:27] = tx_rate_bitmap
+//bitmap[28:31]= Rate Adaptive id
+//arg[0:4] = macid
+//arg[5] = Short GI
+void rtl8192c_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg)
+{	
+	
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+		
+	if(pHalData->fw_ractrl == _TRUE)
+	{
+		rtl8192c_set_raid_cmd(pAdapter, bitmap, arg);
+	}
+	else
+	{
+		u8 macid, init_rate, shortGIrate=_FALSE;
+
+		init_rate = get_highest_rate_idx(bitmap&0x0fffffff)&0x3f;
+		
+		macid = arg&0x1f;
+		
+		shortGIrate = (arg&BIT(5)) ? _TRUE:_FALSE;
+		
+		if (shortGIrate==_TRUE)
+			init_rate |= BIT(6);
+
+		rtw_write8(pAdapter, (REG_INIDATA_RATE_SEL+macid), (u8)init_rate);		
+	}
+
+}
+
+void rtl8192c_set_FwPwrMode_cmd(_adapter*padapter, u8 Mode)
+{
+	SETPWRMODE_PARM H2CSetPwrMode;
+	struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
+	
+_func_enter_;
+
+	DBG_871X("%s(): Mode = %d, SmartPS = %d\n", __FUNCTION__,Mode,pwrpriv->smart_ps);
+
+	H2CSetPwrMode.Mode = Mode;
+
+	H2CSetPwrMode.SmartPS = pwrpriv->smart_ps;
+
+	H2CSetPwrMode.BcnPassTime = 1;//pPSC->RegMaxLPSAwakeIntvl;
+
+	rtl8192c_FillH2CCmd(padapter, SET_PWRMODE_EID, sizeof(H2CSetPwrMode), (u8 *)&H2CSetPwrMode);
+	
+_func_exit_;
+}
+
+void ConstructBeacon(_adapter *padapter, u8 *pframe, u32 *pLength)
+{
+	struct ieee80211_hdr	*pwlanhdr;
+	u16					*fctrl;
+	u32					rate_len, pktlen;
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX 		*cur_network = &(pmlmeinfo->network);
+	u8	bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+
+
+	//DBG_871X("%s\n", __FUNCTION__);
+
+	pwlanhdr = (struct ieee80211_hdr *)pframe;	
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+	
+	_rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/);
+	//pmlmeext->mgnt_seq++;
+	SetFrameSubType(pframe, WIFI_BEACON);
+	
+	pframe += sizeof(struct ieee80211_hdr_3addr);	
+	pktlen = sizeof (struct ieee80211_hdr_3addr);
+	
+	//timestamp will be inserted by hardware
+	pframe += 8;
+	pktlen += 8;
+
+	// beacon interval: 2 bytes
+	_rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); 
+
+	pframe += 2;
+	pktlen += 2;
+
+	// capability info: 2 bytes
+	_rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2);
+
+	pframe += 2;
+	pktlen += 2;
+
+	if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)
+	{
+		//DBG_871X("ie len=%d\n", cur_network->IELength);
+		pktlen += cur_network->IELength - sizeof(NDIS_802_11_FIXED_IEs);
+		_rtw_memcpy(pframe, cur_network->IEs+sizeof(NDIS_802_11_FIXED_IEs), pktlen);
+		
+		goto _ConstructBeacon;
+	}
+
+	//below for ad-hoc mode
+
+	// SSID
+	pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pktlen);
+
+	// supported rates...
+	rate_len = rtw_get_rateset_len(cur_network->SupportedRates);
+	pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &pktlen);
+
+	// DS parameter set
+	pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pktlen);
+
+	if( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)
+	{
+		u32 ATIMWindow;
+		// IBSS Parameter Set...
+		//ATIMWindow = cur->Configuration.ATIMWindow;
+		ATIMWindow = 0;
+		pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pktlen);
+	}	
+
+
+	//todo: ERP IE
+	
+	
+	// EXTERNDED SUPPORTED RATE
+	if (rate_len > 8)
+	{
+		pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pktlen);
+	}
+
+
+	//todo:HT for adhoc
+
+_ConstructBeacon:
+
+	if ((pktlen + TXDESC_SIZE) > 512)
+	{
+		DBG_871X("beacon frame too large\n");
+		return;
+	}
+
+	*pLength = pktlen;
+
+	//DBG_871X("%s bcn_sz=%d\n", __FUNCTION__, pktlen);
+
+}
+
+void ConstructPSPoll(_adapter *padapter, u8 *pframe, u32 *pLength)
+{
+	struct ieee80211_hdr	*pwlanhdr;
+	u16					*fctrl;
+	u32					pktlen;
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	//DBG_871X("%s\n", __FUNCTION__);
+
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	// Frame control.
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+	SetPwrMgt(fctrl);
+	SetFrameSubType(pframe, WIFI_PSPOLL);
+
+	// AID.
+	SetDuration(pframe, (pmlmeinfo->aid | 0xc000));
+
+	// BSSID.
+	_rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+
+	// TA.
+	_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+
+	*pLength = 16;
+}
+
+void ConstructNullFunctionData(_adapter *padapter, u8 *pframe, u32 *pLength, u8 *StaAddr, BOOLEAN bForcePowerSave)
+{
+	struct ieee80211_hdr	*pwlanhdr;
+	u16					*fctrl;
+	u32					pktlen;
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	struct wlan_network	*cur_network = &pmlmepriv->cur_network;
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	//DBG_871X("%s:%d\n", __FUNCTION__, bForcePowerSave);
+
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+	if (bForcePowerSave)
+	{
+		SetPwrMgt(fctrl);
+	}
+
+	switch(cur_network->network.InfrastructureMode)
+	{			
+		case Ndis802_11Infrastructure:
+			SetToDs(fctrl);
+			_rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+			_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+			_rtw_memcpy(pwlanhdr->addr3, StaAddr, ETH_ALEN);
+			break;
+		case Ndis802_11APMode:
+			SetFrDs(fctrl);
+			_rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
+			_rtw_memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+			_rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN);
+			break;
+		case Ndis802_11IBSS:
+		default:
+			_rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
+			_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+			_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+			break;
+	}
+
+	SetSeqNum(pwlanhdr, 0);
+
+	SetFrameSubType(pframe, WIFI_DATA_NULL);
+
+	pframe += sizeof(struct ieee80211_hdr_3addr);
+	pktlen = sizeof(struct ieee80211_hdr_3addr);
+
+	*pLength = pktlen;
+}
+
+void ConstructProbeRsp(_adapter *padapter, u8 *pframe, u32 *pLength, u8 *StaAddr, BOOLEAN bHideSSID)
+{
+	struct ieee80211_hdr	*pwlanhdr;
+	u16					*fctrl;	
+	u8					*mac, *bssid;
+	u32					pktlen;
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX 		*cur_network = &(pmlmeinfo->network);
+	
+	
+	//DBG_871X("%s\n", __FUNCTION__);
+	
+	pwlanhdr = (struct ieee80211_hdr *)pframe;	
+	
+	mac = myid(&(padapter->eeprompriv));
+	bssid = cur_network->MacAddress;
+	
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+	_rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, bssid, ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, 0);
+	SetFrameSubType(fctrl, WIFI_PROBERSP);
+	
+	pktlen = sizeof(struct ieee80211_hdr_3addr);
+	pframe += pktlen;
+
+	if(cur_network->IELength>MAX_IE_SZ)
+		return;
+
+	_rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength);
+	pframe += cur_network->IELength;
+	pktlen += cur_network->IELength;
+	
+	*pLength = pktlen;
+}
+
+//
+// Description: In normal chip, we should send some packet to Hw which will be used by Fw
+//			in FW LPS mode. The function is to fill the Tx descriptor of this packets, then 
+//			Fw can tell Hw to send these packet derectly.
+// Added by tynli. 2009.10.15.
+//
+static VOID
+FillFakeTxDescriptor92C(
+	IN PADAPTER		Adapter,
+	IN u8*			pDesc,
+	IN u32			BufferLen,
+	IN BOOLEAN		IsPsPoll
+)
+{
+	struct tx_desc	*ptxdesc = (struct tx_desc *)pDesc;
+
+	// Clear all status
+	_rtw_memset(pDesc, 0, 32);
+
+	//offset 0
+	ptxdesc->txdw0 |= cpu_to_le32( OWN | FSG | LSG); //own, bFirstSeg, bLastSeg;
+
+	ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<<OFFSET_SHT)&0x00ff0000); //32 bytes for TX Desc
+
+	ptxdesc->txdw0 |= cpu_to_le32(BufferLen&0x0000ffff); // Buffer size + command header
+
+	//offset 4
+	ptxdesc->txdw1 |= cpu_to_le32((QSLT_MGNT<<QSEL_SHT)&0x00001f00); // Fixed queue of Mgnt queue
+
+	//Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw.
+	if(IsPsPoll)
+	{
+		ptxdesc->txdw1 |= cpu_to_le32(NAVUSEHDR);
+	}
+	else
+	{
+		ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number
+		ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29.
+	}
+
+	//offset 16
+	ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+
+#ifdef CONFIG_USB_HCI
+	// USB interface drop packet if the checksum of descriptor isn't correct.
+	// Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.).
+	rtl8192cu_cal_txdesc_chksum(ptxdesc);
+#endif
+	
+	//RT_PRINT_DATA(COMP_CMD, DBG_TRACE, "TxFillCmdDesc8192C(): H2C Tx Cmd Content ----->\n", pDesc, TX_DESC_SIZE);
+}
+
+// To check if reserved page content is destroyed by beacon beacuse beacon is too large.
+// 2010.06.23. Added by tynli.
+VOID
+CheckFwRsvdPageContent(
+	IN	PADAPTER		Adapter
+)
+{
+	HAL_DATA_TYPE*	pHalData = GET_HAL_DATA(Adapter);
+	u32	MaxBcnPageNum;	
+	
+ 	if(pHalData->FwRsvdPageStartOffset != 0)
+ 	{
+ 		/*MaxBcnPageNum = PageNum_128(pMgntInfo->MaxBeaconSize);
+		RT_ASSERT((MaxBcnPageNum <= pHalData->FwRsvdPageStartOffset), 
+			("CheckFwRsvdPageContent(): The reserved page content has been"\
+			"destroyed by beacon!!! MaxBcnPageNum(%d) FwRsvdPageStartOffset(%d)\n!",
+			MaxBcnPageNum, pHalData->FwRsvdPageStartOffset));*/
+ 	}
+}
+
+//
+// Description: Fill the reserved packets that FW will use to RSVD page. 
+//			Now we just send 4 types packet to rsvd page.
+//			(1)Beacon, (2)Ps-poll, (3)Null data, (4)ProbeRsp.
+//	Input: 
+//	    bDLFinished - FALSE: At the first time we will send all the packets as a large packet to Hw,
+//				 		so we need to set the packet length to total lengh.
+//			      TRUE: At the second time, we should send the first packet (default:beacon)
+//						to Hw again and set the lengh in descriptor to the real beacon lengh.
+// 2009.10.15 by tynli.
+static void SetFwRsvdPagePkt(PADAPTER Adapter, BOOLEAN bDLFinished)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);	
+	struct xmit_frame	*pmgntframe;
+	struct pkt_attrib	*pattrib;
+	struct xmit_priv	*pxmitpriv = &(Adapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(Adapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	u32	BeaconLength, ProbeRspLength, PSPollLength, NullFunctionDataLength;
+	u8	*ReservedPagePacket;
+	u8	PageNum=0, U1bTmp, TxDescLen=0, TxDescOffset=0;
+	u16	BufIndex=0;
+	u32	TotalPacketLen;
+	RSVDPAGE_LOC	RsvdPageLoc;
+	BOOLEAN	bDLOK = _FALSE;
+
+	DBG_871X("%s\n", __FUNCTION__);
+
+	ReservedPagePacket = (u8*)rtw_malloc(1000);
+	if(ReservedPagePacket == NULL){
+		DBG_871X("%s(): alloc ReservedPagePacket fail !!!\n", __FUNCTION__);
+		return;
+	}
+
+	_rtw_memset(ReservedPagePacket, 0, 1000);
+
+	TxDescLen = 32;//TX_DESC_SIZE;
+
+#ifdef CONFIG_USB_HCI
+	BufIndex = TXDESC_OFFSET;
+	TxDescOffset = TxDescLen+8; //Shift index for 8 bytes because the dummy bytes in the first descipstor.
+#else
+	BufIndex = 0;
+	TxDescOffset = 0;
+#endif
+
+	//(1) beacon
+	ConstructBeacon(Adapter,&ReservedPagePacket[BufIndex],&BeaconLength);
+
+	//DBG_8192C("SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: BCN\n", &ReservedPagePacket[BufIndex], (BeaconLength+BufIndex));
+
+//--------------------------------------------------------------------
+
+	// When we count the first page size, we need to reserve description size for the RSVD 
+	// packet, it will be filled in front of the packet in TXPKTBUF.
+	U1bTmp = (u8)PageNum_128(BeaconLength+TxDescLen);
+	PageNum += U1bTmp;
+	// To reserved 2 pages for beacon buffer. 2010.06.24.
+	if(PageNum == 1)
+		PageNum+=1;
+	pHalData->FwRsvdPageStartOffset = PageNum;
+
+	BufIndex = (PageNum*128) + TxDescOffset;
+		
+	//(2) ps-poll
+	ConstructPSPoll(Adapter, &ReservedPagePacket[BufIndex],&PSPollLength);
+	
+	FillFakeTxDescriptor92C(Adapter, &ReservedPagePacket[BufIndex-TxDescLen], PSPollLength, _TRUE);
+
+	//DBG_8192C("SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: PS-POLL\n", &ReservedPagePacket[BufIndex-TxDescLen], (PSPollLength+TxDescLen));
+
+	RsvdPageLoc.LocPsPoll = PageNum;
+
+//------------------------------------------------------------------
+			
+	U1bTmp = (u8)PageNum_128(PSPollLength+TxDescLen);
+	PageNum += U1bTmp;
+
+	BufIndex = (PageNum*128) + TxDescOffset;
+
+	//(3) null data
+	ConstructNullFunctionData(
+		Adapter, 
+		&ReservedPagePacket[BufIndex],
+		&NullFunctionDataLength,
+		get_my_bssid(&(pmlmeinfo->network)),
+		_FALSE);
+	
+	FillFakeTxDescriptor92C(Adapter, &ReservedPagePacket[BufIndex-TxDescLen], NullFunctionDataLength, _FALSE);
+
+	RsvdPageLoc.LocNullData = PageNum;
+	
+	//DBG_8192C("SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: NULL DATA \n", &ReservedPagePacket[BufIndex-TxDescLen], (NullFunctionDataLength+TxDescLen));
+//------------------------------------------------------------------
+
+	U1bTmp = (u8)PageNum_128(NullFunctionDataLength+TxDescLen);
+	PageNum += U1bTmp;
+
+	BufIndex = (PageNum*128) + TxDescOffset;
+	
+	//(4) probe response
+	ConstructProbeRsp(
+		Adapter, 
+		&ReservedPagePacket[BufIndex],
+		&ProbeRspLength,
+		get_my_bssid(&(pmlmeinfo->network)),
+		_FALSE);
+	
+	FillFakeTxDescriptor92C(Adapter, &ReservedPagePacket[BufIndex-TxDescLen], ProbeRspLength, _FALSE);
+
+	RsvdPageLoc.LocProbeRsp = PageNum;
+
+	//DBG_8192C("SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: PROBE RSP \n", &ReservedPagePacket[BufIndex-TxDescLen], (ProbeRspLength-TxDescLen));
+
+//------------------------------------------------------------------
+
+	U1bTmp = (u8)PageNum_128(ProbeRspLength+TxDescLen);
+
+	PageNum += U1bTmp;
+
+	TotalPacketLen = (PageNum*128);
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(Adapter, pattrib);
+	pattrib->qsel = 0x10;
+	pattrib->pktlen = pattrib->last_txcmdsz = TotalPacketLen - TxDescLen;
+	_rtw_memcpy(pmgntframe->buf_addr, ReservedPagePacket, TotalPacketLen);
+
+	Adapter->HalFunc.mgnt_xmit(Adapter, pmgntframe);
+
+	bDLOK = _TRUE;
+
+	if(bDLOK)
+	{
+		DBG_871X("Set RSVD page location to Fw.\n");
+		rtl8192c_FillH2CCmd(Adapter, RSVD_PAGE_EID, sizeof(RsvdPageLoc), (u8 *)&RsvdPageLoc);
+	}
+
+	rtw_mfree(ReservedPagePacket,1000);
+
+}
+
+void rtl8192c_set_FwJoinBssReport_cmd(_adapter* padapter, u8 mstatus)
+{
+	JOINBSSRPT_PARM	JoinBssRptParm;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	
+_func_enter_;
+
+	DBG_871X("%s mstatus(%x)\n", __FUNCTION__,mstatus);
+
+	if(mstatus == 1)
+	{
+		// We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C.
+		// Suggested by filen. Added by tynli.
+		rtw_write16(padapter, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid));
+		// Do not set TSF again here or vWiFi beacon DMA INT will not work.
+		//correct_TSF(padapter, pmlmeext);
+		// Hw sequende enable by dedault. 2010.06.23. by tynli.
+		//rtw_write16(padapter, REG_NQOS_SEQ, ((pmlmeext->mgnt_seq+100)&0xFFF));
+		//rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF);
+
+		if(IS_NORMAL_CHIP(pHalData->VersionID))
+		{
+			BOOLEAN bRecover = _FALSE;
+
+			//set REG_CR bit 8
+			//U1bTmp = rtw_read8(padapter, REG_CR+1);
+			rtw_write8(padapter,  REG_CR+1, 0x03);
+
+			// Disable Hw protection for a time which revserd for Hw sending beacon.
+			// Fix download reserved page packet fail that access collision with the protection time.
+			// 2010.05.11. Added by tynli.
+			//SetBcnCtrlReg(padapter, 0, BIT3);
+			//SetBcnCtrlReg(padapter, BIT4, 0);
+			rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(3)));
+			rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4));
+
+			// Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.
+			if(pHalData->RegFwHwTxQCtrl&BIT6)
+				bRecover = _TRUE;
+
+			// To tell Hw the packet is not a real beacon frame.
+			//U1bTmp = rtw_read8(padapter, REG_FWHW_TXQ_CTRL+2);
+			rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl&(~BIT6)));
+			pHalData->RegFwHwTxQCtrl &= (~BIT6);
+			SetFwRsvdPagePkt(padapter, 0);
+
+			// 2010.05.11. Added by tynli.
+			//SetBcnCtrlReg(padapter, BIT3, 0);
+			//SetBcnCtrlReg(padapter, 0, BIT4);
+			rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(3));
+			rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(4)));
+
+			// To make sure that if there exists an adapter which would like to send beacon.
+			// If exists, the origianl value of 0x422[6] will be 1, we should check this to
+			// prevent from setting 0x422[6] to 0 after download reserved page, or it will cause 
+			// the beacon cannot be sent by HW.
+			// 2010.06.23. Added by tynli.
+			if(bRecover)
+			{
+				rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl|BIT6));
+				pHalData->RegFwHwTxQCtrl |= BIT6;
+			}
+
+			// Clear CR[8] or beacon packet will not be send to TxBuf anymore.
+			rtw_write8(padapter, REG_CR+1, 0x02);
+		}
+	}
+
+	JoinBssRptParm.OpMode = mstatus;
+
+	rtl8192c_FillH2CCmd(padapter, JOINBSS_RPT_EID, sizeof(JoinBssRptParm), (u8 *)&JoinBssRptParm);
+	
+_func_exit_;
+}
+
+#ifdef CONFIG_P2P
+void rtl8192c_set_p2p_ctw_period_cmd(_adapter* padapter, u8 ctwindow)
+{
+	struct P2P_PS_CTWPeriod_t p2p_ps_ctw;
+
+	p2p_ps_ctw.CTWPeriod = ctwindow;
+
+	rtl8192c_FillH2CCmd(padapter, P2P_PS_CTW_CMD_EID, 1, (u8 *)(&p2p_ps_ctw));
+	
+}
+
+void rtl8192c_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);	
+	struct pwrctrl_priv		*pwrpriv = &padapter->pwrctrlpriv;
+	struct wifidirect_info	*pwdinfo = &( padapter->wdinfo );
+	struct P2P_PS_Offload_t	*p2p_ps_offload = &pHalData->p2p_ps_offload;
+	u8	i;
+	u16	ctwindow;
+	u32	start_time, tsf_low;
+
+_func_enter_;
+
+	switch(p2p_ps_state)
+	{
+		case P2P_PS_DISABLE:
+			DBG_8192C("P2P_PS_DISABLE \n");
+			_rtw_memset(p2p_ps_offload, 0 ,1);
+			break;
+		case P2P_PS_ENABLE:
+			DBG_8192C("P2P_PS_ENABLE \n");
+			// update CTWindow value.
+			if( pwdinfo->ctwindow > 0 )
+			{
+				p2p_ps_offload->CTWindow_En = 1;
+				ctwindow = pwdinfo->ctwindow;
+				if(IS_HARDWARE_TYPE_8723(padapter))
+				{
+					//rtw_write16(padapter, REG_ATIMWND, ctwindow);
+				}
+				else
+				{
+					rtl8192c_set_p2p_ctw_period_cmd(padapter, ctwindow);
+				}
+			}
+
+			// hw only support 2 set of NoA
+			for( i=0 ; i<pwdinfo->noa_num ; i++)
+			{
+				// To control the register setting for which NOA
+				rtw_write8(padapter, 0x5CF, (i << 4));
+				if(i == 0)
+					p2p_ps_offload->NoA0_En = 1;
+				else
+					p2p_ps_offload->NoA1_En = 1;
+
+				// config P2P NoA Descriptor Register
+				rtw_write32(padapter, 0x5E0, pwdinfo->noa_duration[i]);
+
+				rtw_write32(padapter, 0x5E4, pwdinfo->noa_interval[i]);
+
+				//Get Current TSF value
+				tsf_low = rtw_read32(padapter, REG_TSFTR);
+
+				start_time = pwdinfo->noa_start_time[i];
+				if(pwdinfo->noa_count[i] != 1)
+				{
+					while( start_time <= (tsf_low+(50*1024) ) )
+					{
+						start_time += pwdinfo->noa_interval[i];
+						if(pwdinfo->noa_count[i] != 255)
+							pwdinfo->noa_count[i]--;
+					}
+				}
+				//DBG_8192C("%s(): start_time = %x\n",__FUNCTION__,start_time);
+				rtw_write32(padapter, 0x5E8, start_time);
+
+				rtw_write8(padapter, 0x5EC, pwdinfo->noa_count[i]);
+			}
+
+			if( (pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0) )
+			{
+				// rst p2p circuit
+				rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(4));
+
+				p2p_ps_offload->Offload_En = 1;
+
+				if(pwdinfo->role == P2P_ROLE_GO)
+				{
+					p2p_ps_offload->role= 1;
+					p2p_ps_offload->AllStaSleep = 0;
+				}
+				else
+				{
+					p2p_ps_offload->role= 0;
+				}
+
+				p2p_ps_offload->discovery = 0;
+			}
+			break;
+		case P2P_PS_SCAN:
+			DBG_8192C("P2P_PS_SCAN \n");
+			p2p_ps_offload->discovery = 1;
+			break;
+		case P2P_PS_SCAN_DONE:
+			DBG_8192C("P2P_PS_SCAN_DONE \n");
+			p2p_ps_offload->discovery = 0;
+			pwdinfo->p2p_ps = P2P_PS_ENABLE;
+			break;
+		default:
+			break;
+	}
+
+	rtl8192c_FillH2CCmd(padapter, P2P_PS_OFFLOAD_EID, 1, (u8 *)p2p_ps_offload);
+
+_func_exit_;
+
+}
+#endif //CONFIG_P2P
+
+#ifdef CONFIG_IOL
+#include <rtw_iol.h>
+int rtl8192c_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms)
+{
+	IO_OFFLOAD_LOC	IoOffloadLoc;
+	u32 start_time = rtw_get_current_time();
+	u32 passing_time_ms;
+	u8 polling_ret;
+	int ret = _FAIL;
+
+	if (rtw_IOL_append_END_cmd(xmit_frame) != _SUCCESS)
+		goto exit;
+	
+	//adapter->HalFunc.mgnt_xmit(adapter, xmit_frame);
+	rtw_dump_xframe_sync(adapter, xmit_frame);
+
+	IoOffloadLoc.LocCmd = 0;
+	if(_SUCCESS != rtl8192c_FillH2CCmd(adapter, H2C_92C_IO_OFFLOAD, sizeof(IO_OFFLOAD_LOC), (u8 *)&IoOffloadLoc))
+		goto exit;
+
+	//polling if the IO offloading is done
+	while( (passing_time_ms=rtw_get_passing_time_ms(start_time)) <= max_wating_ms) {
+		#if 0 //C2H
+		if(0xff == rtw_read8(adapter, REG_C2HEVT_CLEAR))
+			break;
+		#else// 0x1c3
+		if(0x00 != (polling_ret=rtw_read8(adapter, 0x1c3)))
+			break;
+		#endif
+		rtw_msleep_os(5);
+	}
+	#if 0 //debug
+	DBG_871X("IOL %s, polling_ret:0x%02x, 0x1c0=0x%08x, 0x1c4=0x%08x, 0x1cc=0x%08x, 0x1e8=0x%08x, 0x130=0x%08x, 0x134=0x%08x\n"
+			, polling_ret==0xff?"success":"error"
+			, polling_ret
+			, rtw_read32(adapter, 0x1c0)
+			, rtw_read32(adapter, 0x1c4)
+			, rtw_read32(adapter, 0x1cc)
+			, rtw_read32(adapter, 0x1e8)
+			, rtw_read32(adapter, 0x130)
+			, rtw_read32(adapter, 0x134)
+	);
+	rtw_write32(adapter, 0x1c0, 0x0);
+	#endif
+
+	if(polling_ret == 0xff)
+		ret =_SUCCESS;
+	else {
+		DBG_871X("IOL %s, polling_ret:0x%02x\n"
+			//", 0x1c0=0x%08x, 0x1c4=0x%08x, 0x1cc=0x%08x, 0x1e8=0x%08x, 0x130=0x%08x, 0x134=0x%08x\n"
+			, polling_ret==0xff?"success":"error"
+			, polling_ret
+			//, rtw_read32(adapter, 0x1c0)
+			//, rtw_read32(adapter, 0x1c4)
+			//, rtw_read32(adapter, 0x1cc)
+			//, rtw_read32(adapter, 0x1e8)
+			//, rtw_read32(adapter, 0x130)
+			//, rtw_read32(adapter, 0x134)
+		);
+		#if 0 //debug
+		rtw_write16(adapter, 0x1c4, 0x0000); 
+		rtw_msleep_os(10);
+		DBG_871X("after reset, 0x1c4=0x%08x\n", rtw_read32(adapter, 0x1c4));
+		#endif
+
+	}
+
+	{
+		#if 0 //C2H
+		u32 c2h_evt;
+		int i;
+		c2h_evt = rtw_read32(adapter, REG_C2HEVT_MSG_NORMAL);
+		DBG_871X("%s io-offloading complete, in %ums: 0x%08x\n", __FUNCTION__, passing_time_ms, c2h_evt);
+		rtw_write8(adapter, REG_C2HEVT_CLEAR, 0x0);
+		#else// 0x1c3
+		//DBG_871X("%s IOF complete in %ums\n", __FUNCTION__, passing_time_ms);
+		rtw_write8(adapter, 0x1c3, 0x0);
+		#endif
+	}
+
+exit:
+	return ret;
+
+}
+#endif //CONFIG_IOL
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_dm.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_dm.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_dm.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_dm.c	2017-09-23 03:42:49.914675382 +0800
@@ -0,0 +1,4695 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * 
+******************************************************************************/
+//============================================================
+// Description:
+//
+// This file is for 92CE/92CU dynamic mechanism only
+//
+//
+//============================================================
+
+//============================================================
+// include files
+//============================================================
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtw_byteorder.h>
+
+#include <rtl8192c_hal.h>
+
+//============================================================
+// Global var
+//============================================================
+static u32 EDCAParam[maxAP][3] =
+{          // UL			DL
+	{0x5ea322, 0x00a630, 0x00a44f}, //atheros AP
+	{0x5ea32b, 0x5ea42b, 0x5e4322}, //broadcom AP
+	{0x3ea430, 0x00a630, 0x3ea44f}, //cisco AP
+	{0x5ea44f, 0x00a44f, 0x5ea42b}, //marvell AP
+	{0x5ea422, 0x00a44f, 0x00a44f}, //ralink AP
+	//{0x5ea44f, 0x5ea44f, 0x5ea44f}, //realtek AP
+	{0xa44f, 0x5ea44f, 0x5e431c}, //realtek AP
+	{0x5ea42b, 0xa630, 0x5e431c}, //airgocap AP
+	{0x5ea42b, 0x5ea42b, 0x5ea42b}, //unknown AP
+//	{0x5e4322, 0x00a44f, 0x5ea44f}, //unknown AP
+};
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	dm_DIGInit()
+ *
+ * Overview:	Set DIG scheme init value.
+ *
+ * Input:		NONE
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *
+ *---------------------------------------------------------------------------*/
+static void	dm_DIGInit(
+	IN	PADAPTER	pAdapter
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	DIG_T	*pDigTable = &pdmpriv->DM_DigTable;
+	
+
+	pDigTable->Dig_Enable_Flag = _TRUE;
+	pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX;
+	
+	pDigTable->CurIGValue = 0x20;
+	pDigTable->PreIGValue = 0x0;
+
+	pDigTable->CurSTAConnectState = pDigTable->PreSTAConnectState = DIG_STA_DISCONNECT;
+	pDigTable->CurMultiSTAConnectState = DIG_MultiSTA_DISCONNECT;
+
+	pDigTable->RssiLowThresh 	= DM_DIG_THRESH_LOW;
+	pDigTable->RssiHighThresh 	= DM_DIG_THRESH_HIGH;
+
+	pDigTable->FALowThresh	= DM_FALSEALARM_THRESH_LOW;
+	pDigTable->FAHighThresh	= DM_FALSEALARM_THRESH_HIGH;
+
+	
+	pDigTable->rx_gain_range_max = DM_DIG_MAX;
+	pDigTable->rx_gain_range_min = DM_DIG_MIN;
+
+	pDigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT;
+	pDigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX;
+	pDigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN;
+
+	pDigTable->PreCCKPDState = CCK_PD_STAGE_MAX;
+	pDigTable->CurCCKPDState = CCK_PD_STAGE_LowRssi;
+
+	pDigTable->ForbiddenIGI = DM_DIG_MIN;
+	pDigTable->LargeFAHit = 0;
+	pDigTable->Recover_cnt = 0;
+	pdmpriv->DIG_Dynamic_MIN  = 0x25; //for FUNAI_TV
+}
+
+
+static u8 dm_initial_gain_MinPWDB(
+	IN	PADAPTER	pAdapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	DIG_T			*pDigTable = &pdmpriv->DM_DigTable;
+	int	Rssi_val_min = 0;
+	
+	if((pDigTable->CurMultiSTAConnectState == DIG_MultiSTA_CONNECT) &&
+		(pDigTable->CurSTAConnectState == DIG_STA_CONNECT) )
+	{
+		if(pdmpriv->EntryMinUndecoratedSmoothedPWDB != 0)
+			Rssi_val_min  =  (pdmpriv->EntryMinUndecoratedSmoothedPWDB > pdmpriv->UndecoratedSmoothedPWDB)?
+					pdmpriv->UndecoratedSmoothedPWDB:pdmpriv->EntryMinUndecoratedSmoothedPWDB;		
+		else
+			Rssi_val_min = pdmpriv->UndecoratedSmoothedPWDB;
+	}
+	else if(pDigTable->CurSTAConnectState == DIG_STA_CONNECT || 
+			pDigTable->CurSTAConnectState == DIG_STA_BEFORE_CONNECT) 
+		Rssi_val_min = pdmpriv->UndecoratedSmoothedPWDB;
+	else if(pDigTable->CurMultiSTAConnectState == DIG_MultiSTA_CONNECT)
+		Rssi_val_min = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
+
+	//printk("%s CurMultiSTAConnectState(0x%02x) UndecoratedSmoothedPWDB(%d),EntryMinUndecoratedSmoothedPWDB(%d)\n"
+	//,__FUNCTION__,pDigTable->CurSTAConnectState,
+	//pdmpriv->UndecoratedSmoothedPWDB,pdmpriv->EntryMinUndecoratedSmoothedPWDB);
+
+	return (u8)Rssi_val_min;
+}
+
+
+static VOID 
+dm_FalseAlarmCounterStatistics(
+	IN	PADAPTER	Adapter
+	)
+{
+	u32 ret_value;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt);
+	
+	ret_value = PHY_QueryBBReg(Adapter, rOFDM_PHYCounter1, bMaskDWord);
+       FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16);	
+
+       ret_value = PHY_QueryBBReg(Adapter, rOFDM_PHYCounter2, bMaskDWord);
+	FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff);
+	FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16);
+	ret_value = PHY_QueryBBReg(Adapter, rOFDM_PHYCounter3, bMaskDWord);
+	FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff);
+	ret_value = PHY_QueryBBReg(Adapter, rOFDM0_FrameSync, bMaskDWord);
+	FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff);
+	FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16);
+
+	FalseAlmCnt->Cnt_Ofdm_fail = 	FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal +
+								FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail+
+								FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail;
+
+	
+	//hold cck counter
+	PHY_SetBBReg(Adapter, rCCK0_FalseAlarmReport, BIT(14), 1);
+	
+	ret_value = PHY_QueryBBReg(Adapter, rCCK0_FACounterLower, bMaskByte0);
+	FalseAlmCnt->Cnt_Cck_fail = ret_value;
+
+	ret_value = PHY_QueryBBReg(Adapter, rCCK0_FACounterUpper, bMaskByte3);
+	FalseAlmCnt->Cnt_Cck_fail +=  (ret_value& 0xff)<<8;
+	
+	FalseAlmCnt->Cnt_all = (	FalseAlmCnt->Cnt_Parity_Fail +
+						FalseAlmCnt->Cnt_Rate_Illegal +
+						FalseAlmCnt->Cnt_Crc8_fail +
+						FalseAlmCnt->Cnt_Mcs_fail +
+						FalseAlmCnt->Cnt_Cck_fail);	
+	Adapter->recvpriv.FalseAlmCnt_all = FalseAlmCnt->Cnt_all;
+	//reset false alarm counter registers
+	PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0x08000000, 1);
+	PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0x08000000, 0);
+	//reset cck counter
+	PHY_SetBBReg(Adapter, rCCK0_FalseAlarmReport, 0x0000c000, 0);
+	//enable cck counter
+	PHY_SetBBReg(Adapter, rCCK0_FalseAlarmReport, 0x0000c000, 2);
+
+	//RT_TRACE(	COMP_DIG, DBG_LOUD, ("Cnt_Parity_Fail = %ld, Cnt_Rate_Illegal = %ld, Cnt_Crc8_fail = %ld, Cnt_Mcs_fail = %ld\n", 
+	//			FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal, FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail) );
+	//RT_TRACE(	COMP_DIG, DBG_LOUD, ("Cnt_Ofdm_fail = %ld, Cnt_Cck_fail = %ld, Cnt_all = %ld\n", 
+	//			FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_Cck_fail, FalseAlmCnt->Cnt_all) );
+	//RT_TRACE(	COMP_DIG, DBG_LOUD, ("Cnt_Ofdm_fail = %ld, Cnt_Cck_fail = %ld, Cnt_all = %ld\n", 
+	//			FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_Cck_fail, FalseAlmCnt->Cnt_all) );
+}
+
+
+static VOID
+DM_Write_DIG(
+	IN	PADAPTER	pAdapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	DIG_T	*pDigTable = &pdmpriv->DM_DigTable;
+	
+	//RT_TRACE(	COMP_DIG, DBG_LOUD, ("CurIGValue = 0x%lx, PreIGValue = 0x%lx, BackoffVal = %d\n", 
+	//			DM_DigTable.CurIGValue, DM_DigTable.PreIGValue, DM_DigTable.BackoffVal));
+
+	if (pDigTable->Dig_Enable_Flag == _FALSE)
+	{
+		//RT_TRACE(	COMP_DIG, DBG_LOUD, ("DIG is disabled\n"));
+		pDigTable->PreIGValue = 0x17;
+		return;
+	}
+
+	if(pDigTable->PreIGValue != pDigTable->CurIGValue)
+	{
+		// Set initial gain.
+		//PHY_SetBBReg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, pDigTable->CurIGValue);
+		//PHY_SetBBReg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, pDigTable->CurIGValue);
+		//printk("%s DIG(0x%02x)\n",__FUNCTION__,pDigTable->CurIGValue);
+		PHY_SetBBReg(pAdapter, rOFDM0_XAAGCCore1, 0x7f, pDigTable->CurIGValue);
+		PHY_SetBBReg(pAdapter, rOFDM0_XBAGCCore1, 0x7f, pDigTable->CurIGValue);
+		pDigTable->PreIGValue = pDigTable->CurIGValue;
+	}
+}
+
+
+static VOID 
+dm_CtrlInitGainByFA(
+	IN	PADAPTER	pAdapter
+)	
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	DIG_T	*pDigTable = &pdmpriv->DM_DigTable;
+	PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt);
+
+	u8	value_IGI = pDigTable->CurIGValue;
+	
+	if(FalseAlmCnt->Cnt_all < DM_DIG_FA_TH0)	
+		value_IGI --;
+	else if(FalseAlmCnt->Cnt_all < DM_DIG_FA_TH1)	
+		value_IGI += 0;
+	else if(FalseAlmCnt->Cnt_all < DM_DIG_FA_TH2)	
+		value_IGI ++;
+	else if(FalseAlmCnt->Cnt_all >= DM_DIG_FA_TH2)	
+		value_IGI +=2;
+	
+	if(value_IGI > DM_DIG_FA_UPPER)			
+		value_IGI = DM_DIG_FA_UPPER;
+	if(value_IGI < DM_DIG_FA_LOWER)		
+		value_IGI = DM_DIG_FA_LOWER;
+
+	if(FalseAlmCnt->Cnt_all > 10000)
+		value_IGI = DM_DIG_FA_UPPER;
+	
+	pDigTable->CurIGValue = value_IGI;
+	
+	DM_Write_DIG(pAdapter);
+	
+}
+
+#ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV
+VOID dm_CtrlInitGainByRssi( IN PADAPTER pAdapter) 
+{ 
+
+	u32 isBT;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	DIG_T	*pDigTable = &pdmpriv->DM_DigTable;
+	PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt);	
+
+	 //modify DIG upper bound
+	if((pDigTable->Rssi_val_min + 20) > DM_DIG_MAX )
+		pDigTable->rx_gain_range_max = DM_DIG_MAX;
+ 	else
+  		pDigTable->rx_gain_range_max = pDigTable->Rssi_val_min + 20;
+
+	//modify DIG lower bound	
+	if((FalseAlmCnt->Cnt_all > 500)&&(pdmpriv->DIG_Dynamic_MIN < 0x25))
+  		pdmpriv->DIG_Dynamic_MIN++;
+ 	if((FalseAlmCnt->Cnt_all < 500)&&(pdmpriv->DIG_Dynamic_MIN > DM_DIG_MIN))
+  		pdmpriv->DIG_Dynamic_MIN--;
+	if((pDigTable->Rssi_val_min < 8) && (pdmpriv->DIG_Dynamic_MIN > DM_DIG_MIN))
+		pdmpriv->DIG_Dynamic_MIN--;
+	
+ 	//modify DIG lower bound, deal with abnorally large false alarm
+ 	if(FalseAlmCnt->Cnt_all > 10000)
+ 	{
+ 		//RT_TRACE(COMP_DIG, DBG_LOUD, ("dm_DIG(): Abnornally false alarm case. \n"));
+  		pDigTable->LargeFAHit++;
+ 		 if(pDigTable->ForbiddenIGI < pDigTable->CurIGValue)
+  		{
+   			pDigTable->ForbiddenIGI = pDigTable->CurIGValue;
+	  		pDigTable->LargeFAHit = 1;
+	  	}
+	  	if(pDigTable->LargeFAHit >= 3)
+	  	{
+			if((pDigTable->ForbiddenIGI+1) >pDigTable->rx_gain_range_max)
+		    		pDigTable->rx_gain_range_min = pDigTable->rx_gain_range_max;
+		   	else
+		    		pDigTable->rx_gain_range_min = (pDigTable->ForbiddenIGI + 1);
+		   	pDigTable->Recover_cnt = 3600; //3600=2hr
+		  }
+	 }
+	 else
+	 {
+	  //Recovery mechanism for IGI lower bound
+	  	if(pDigTable->Recover_cnt != 0){
+	   		pDigTable->Recover_cnt --;
+	  	}
+	  	else
+	 	{
+			if(pDigTable->LargeFAHit == 0 )
+	   		{
+	   			if((pDigTable->ForbiddenIGI -1) < pdmpriv->DIG_Dynamic_MIN) //DM_DIG_MIN)
+			    	{
+			     		pDigTable->ForbiddenIGI = pdmpriv->DIG_Dynamic_MIN; //DM_DIG_MIN;
+			     		pDigTable->rx_gain_range_min = pdmpriv->DIG_Dynamic_MIN; //DM_DIG_MIN;
+			    	}
+			    	else
+			    	{
+			     		pDigTable->ForbiddenIGI --;
+			     		pDigTable->rx_gain_range_min = (pDigTable->ForbiddenIGI + 1);
+			    	}
+	   		}
+	   		else if(pDigTable->LargeFAHit == 3 )
+	   		{
+	    			pDigTable->LargeFAHit = 0;
+	   		}
+	  	}
+	 }
+ #ifdef CONFIG_USB_HCI
+	if(FalseAlmCnt->Cnt_all < 250)
+	{
+#endif
+		//DBG_8192C("===> dm_CtrlInitGainByRssi, Enter DIG by SS mode\n");
+		
+		isBT = rtw_read8(pAdapter, 0x4fd) & 0x01;
+
+		if(!isBT){
+
+			if(FalseAlmCnt->Cnt_all > pDigTable->FAHighThresh)
+			{
+				if((pDigTable->BackoffVal -2) < pDigTable->BackoffVal_range_min)
+					pDigTable->BackoffVal = pDigTable->BackoffVal_range_min;
+				else
+					pDigTable->BackoffVal -= 2; 
+			}	
+			else if(FalseAlmCnt->Cnt_all < pDigTable->FALowThresh)
+			{
+				if((pDigTable->BackoffVal+2) > pDigTable->BackoffVal_range_max)
+					pDigTable->BackoffVal = pDigTable->BackoffVal_range_max;
+				else
+					pDigTable->BackoffVal +=2;
+			}	
+		}
+		else
+			pDigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT;
+
+		pDigTable->CurIGValue = pDigTable->Rssi_val_min+10-pDigTable->BackoffVal;	
+
+		//DBG_8192C("Rssi_val_min = %x BackoffVal %x\n",pDigTable->Rssi_val_min, pDigTable->BackoffVal);
+#ifdef CONFIG_USB_HCI
+	}
+	else
+	{		
+		//DBG_8192C("===> dm_CtrlInitGainByRssi, Enter DIG by FA mode\n");
+		//DBG_8192C("RSSI = 0x%x", pDigTable->Rssi_val_min);
+
+		//Adjust initial gain by false alarm		
+		if(FalseAlmCnt->Cnt_all > 1000)
+			pDigTable->CurIGValue = pDigTable ->PreIGValue+2;
+		else if (FalseAlmCnt->Cnt_all > 750)
+			pDigTable->CurIGValue = pDigTable->PreIGValue+1;
+		else if(FalseAlmCnt->Cnt_all < 500)
+			pDigTable->CurIGValue = pDigTable->PreIGValue-1;	
+	}
+#endif
+
+	//Check initial gain by upper/lower bound
+	if(pDigTable->CurIGValue >pDigTable->rx_gain_range_max)
+		pDigTable->CurIGValue = pDigTable->rx_gain_range_max;
+
+	if(pDigTable->CurIGValue < pDigTable->rx_gain_range_min)
+		pDigTable->CurIGValue = pDigTable->rx_gain_range_min;
+
+	//printk("%s => rx_gain_range_max(0x%02x) rx_gain_range_min(0x%02x)\n",__FUNCTION__,
+	//	pDigTable->rx_gain_range_max,pDigTable->rx_gain_range_min);
+	//printk("%s CurIGValue(0x%02x)  <====\n",__FUNCTION__,pDigTable->CurIGValue );		
+
+	DM_Write_DIG(pAdapter);
+
+}
+#else
+static VOID dm_CtrlInitGainByRssi(IN	PADAPTER	pAdapter)	
+{
+	u32 isBT;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	DIG_T	*pDigTable = &pdmpriv->DM_DigTable;
+	PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt);
+
+	//modify DIG upper bound
+	if((pDigTable->Rssi_val_min + 20) > DM_DIG_MAX )
+		pDigTable->rx_gain_range_max = DM_DIG_MAX;
+	else
+		pDigTable->rx_gain_range_max = pDigTable->Rssi_val_min + 20;
+	//printk("%s Rssi_val_min(0x%02x),rx_gain_range_max(0x%02x)\n",__FUNCTION__,pDigTable->Rssi_val_min,pDigTable->rx_gain_range_max);
+
+	//modify DIG lower bound, deal with abnorally large false alarm
+	if(FalseAlmCnt->Cnt_all > 10000)
+	{
+		//RT_TRACE(COMP_DIG, DBG_LOUD, ("dm_DIG(): Abnornally false alarm case. \n"));
+
+		pDigTable->LargeFAHit++;
+		if(pDigTable->ForbiddenIGI < pDigTable->CurIGValue)
+		{
+			pDigTable->ForbiddenIGI = pDigTable->CurIGValue;
+			pDigTable->LargeFAHit = 1;
+		}
+
+		if(pDigTable->LargeFAHit >= 3)
+		{
+			if((pDigTable->ForbiddenIGI+1) > pDigTable->rx_gain_range_max)
+				pDigTable->rx_gain_range_min = pDigTable->rx_gain_range_max;
+			else
+				pDigTable->rx_gain_range_min = (pDigTable->ForbiddenIGI + 1);
+			pDigTable->Recover_cnt = 3600; //3600=2hr
+		}
+	}
+	else
+	{
+		//Recovery mechanism for IGI lower bound
+		if(pDigTable->Recover_cnt != 0)
+			pDigTable->Recover_cnt --;
+		else
+		{
+			if(pDigTable->LargeFAHit == 0 )
+			{
+				if((pDigTable->ForbiddenIGI -1) < DM_DIG_MIN)
+				{
+					pDigTable->ForbiddenIGI = DM_DIG_MIN;
+					pDigTable->rx_gain_range_min = DM_DIG_MIN;
+				}
+				else
+				{
+					pDigTable->ForbiddenIGI --;
+					pDigTable->rx_gain_range_min = (pDigTable->ForbiddenIGI + 1);
+				}
+			}
+			else if(pDigTable->LargeFAHit == 3 )
+			{
+				pDigTable->LargeFAHit = 0;
+			}
+		}
+	}
+
+	//RT_TRACE(COMP_DIG, DBG_LOUD, ("DM_DigTable.ForbiddenIGI = 0x%x, DM_DigTable.LargeFAHit = 0x%x\n",pDigTable->ForbiddenIGI, pDigTable->LargeFAHit));
+	//RT_TRACE(COMP_DIG, DBG_LOUD, ("DM_DigTable.rx_gain_range_max = 0x%x, DM_DigTable.rx_gain_range_min = 0x%x\n",pDigTable->rx_gain_range_max, pDigTable->rx_gain_range_min));
+
+#ifdef CONFIG_USB_HCI
+	if(FalseAlmCnt->Cnt_all < 250)
+	{
+#endif
+		//DBG_8192C("===> dm_CtrlInitGainByRssi, Enter DIG by SS mode\n");
+		
+		isBT = rtw_read8(pAdapter, 0x4fd) & 0x01;
+
+		if(!isBT){
+
+			if(FalseAlmCnt->Cnt_all > pDigTable->FAHighThresh)
+			{
+				if((pDigTable->BackoffVal -2) < pDigTable->BackoffVal_range_min)
+					pDigTable->BackoffVal = pDigTable->BackoffVal_range_min;
+				else
+					pDigTable->BackoffVal -= 2; 
+			}	
+			else if(FalseAlmCnt->Cnt_all < pDigTable->FALowThresh)
+			{
+				if((pDigTable->BackoffVal+2) > pDigTable->BackoffVal_range_max)
+					pDigTable->BackoffVal = pDigTable->BackoffVal_range_max;
+				else
+					pDigTable->BackoffVal +=2;
+			}	
+		}
+		else
+			pDigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT;
+
+		pDigTable->CurIGValue = pDigTable->Rssi_val_min+10-pDigTable->BackoffVal;	
+
+		//DBG_8192C("Rssi_val_min = %x BackoffVal %x\n",pDigTable->Rssi_val_min, pDigTable->BackoffVal);
+#ifdef CONFIG_USB_HCI
+	}
+	else
+	{		
+		//DBG_8192C("===> dm_CtrlInitGainByRssi, Enter DIG by FA mode\n");
+		//DBG_8192C("RSSI = 0x%x", pDigTable->Rssi_val_min);
+
+		//Adjust initial gain by false alarm		
+		if(FalseAlmCnt->Cnt_all > 1000)
+			pDigTable->CurIGValue = pDigTable ->PreIGValue+2;
+		else if (FalseAlmCnt->Cnt_all > 750)
+			pDigTable->CurIGValue = pDigTable->PreIGValue+1;
+		else if(FalseAlmCnt->Cnt_all < 500)
+			pDigTable->CurIGValue = pDigTable->PreIGValue-1;	
+	}
+#endif
+
+	//Check initial gain by upper/lower bound
+	if(pDigTable->CurIGValue >pDigTable->rx_gain_range_max)
+		pDigTable->CurIGValue = pDigTable->rx_gain_range_max;
+
+	if(pDigTable->CurIGValue < pDigTable->rx_gain_range_min)
+		pDigTable->CurIGValue = pDigTable->rx_gain_range_min;
+
+	//printk("%s => rx_gain_range_max(0x%02x) rx_gain_range_min(0x%02x)\n",__FUNCTION__,
+	//	pDigTable->rx_gain_range_max,pDigTable->rx_gain_range_min);
+	//printk("%s CurIGValue(0x%02x)  <====\n",__FUNCTION__,pDigTable->CurIGValue );		
+
+	DM_Write_DIG(pAdapter);
+
+}
+#endif
+
+static VOID
+dm_initial_gain_Multi_STA(
+	IN	PADAPTER	pAdapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	struct mlme_priv	*pmlmepriv = &(pAdapter->mlmepriv);
+	DIG_T			*pDigTable = &pdmpriv->DM_DigTable;
+	int				rssi_strength =  pdmpriv->EntryMinUndecoratedSmoothedPWDB;	
+	BOOLEAN			bMulti_STA = _FALSE;
+
+	//ADHOC and AP Mode
+	if(check_fwstate(pmlmepriv, WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE)
+	{
+		bMulti_STA = _TRUE;
+	}
+
+
+	if((bMulti_STA == _FALSE) 
+		|| (pDigTable->CurSTAConnectState == DIG_STA_DISCONNECT))	 
+	{
+		pdmpriv->binitialized = _FALSE;
+		pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX;
+		return;
+	}	
+	else if(pdmpriv->binitialized == _FALSE)
+	{
+		pdmpriv->binitialized = _TRUE;
+		pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_0;
+		pDigTable->CurIGValue = 0x20;
+		DM_Write_DIG(pAdapter);
+	}
+
+	// Initial gain control by ap mode 
+	if(pDigTable->CurMultiSTAConnectState == DIG_MultiSTA_CONNECT)
+	{
+		if (	(rssi_strength < pDigTable->RssiLowThresh) 	&& 
+			(pDigTable->Dig_Ext_Port_Stage != DIG_EXT_PORT_STAGE_1))
+		{					
+			// Set to dig value to 0x20 for Luke's opinion after disable dig
+			if(pDigTable->Dig_Ext_Port_Stage == DIG_EXT_PORT_STAGE_2)
+			{
+				pDigTable->CurIGValue = 0x20;
+				DM_Write_DIG(pAdapter);				
+			}	
+			pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_1;	
+		}	
+		else if (rssi_strength > pDigTable->RssiHighThresh)
+		{
+			pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_2;
+			dm_CtrlInitGainByFA(pAdapter);
+		} 
+	}	
+	else if(pDigTable->Dig_Ext_Port_Stage != DIG_EXT_PORT_STAGE_0)
+	{
+		pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_0;
+		pDigTable->CurIGValue = 0x20;
+		DM_Write_DIG(pAdapter);
+	}
+
+	//RT_TRACE(	COMP_DIG, DBG_LOUD, ("CurMultiSTAConnectState = %x Dig_Ext_Port_Stage %x\n", 
+	//			DM_DigTable.CurMultiSTAConnectState, DM_DigTable.Dig_Ext_Port_Stage));
+}
+
+
+static VOID 
+dm_initial_gain_STA(
+	IN	PADAPTER	pAdapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	DIG_T	*pDigTable = &pdmpriv->DM_DigTable;
+	
+	//RT_TRACE(	COMP_DIG, DBG_LOUD, ("PreSTAConnectState = %x, CurSTAConnectState = %x\n", 
+	//			DM_DigTable.PreSTAConnectState, DM_DigTable.CurSTAConnectState));
+
+
+	if(pDigTable->PreSTAConnectState == pDigTable->CurSTAConnectState||
+	   pDigTable->CurSTAConnectState == DIG_STA_BEFORE_CONNECT ||
+	   pDigTable->CurSTAConnectState == DIG_STA_CONNECT)
+	{
+		// beforeconnect -> beforeconnect or  connect -> connect
+		// (dis)connect -> beforeconnect
+		// disconnect -> connecct or beforeconnect -> connect
+		if(pDigTable->CurSTAConnectState != DIG_STA_DISCONNECT)
+		{
+			pDigTable->Rssi_val_min = dm_initial_gain_MinPWDB(pAdapter);
+			dm_CtrlInitGainByRssi(pAdapter);
+		}	
+	}
+	else	
+	{		
+		// connect -> disconnect or beforeconnect -> disconnect
+		pDigTable->Rssi_val_min = 0;
+		pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX;
+		pDigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT;
+		pDigTable->CurIGValue = 0x20;
+		pDigTable->PreIGValue = 0;	
+		DM_Write_DIG(pAdapter);
+	}
+
+}
+
+
+static void dm_CCK_PacketDetectionThresh(
+	IN	PADAPTER	pAdapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt);
+	DIG_T	*pDigTable = &pdmpriv->DM_DigTable;
+
+	if(pDigTable->CurSTAConnectState == DIG_STA_CONNECT)
+	{
+		pDigTable->Rssi_val_min = dm_initial_gain_MinPWDB(pAdapter);
+		if(pDigTable->PreCCKPDState == CCK_PD_STAGE_LowRssi)
+		{
+			if(pDigTable->Rssi_val_min <= 25)
+				pDigTable->CurCCKPDState = CCK_PD_STAGE_LowRssi;
+			else
+				pDigTable->CurCCKPDState = CCK_PD_STAGE_HighRssi;
+		}
+		else{
+			if(pDigTable->Rssi_val_min <= 20)
+				pDigTable->CurCCKPDState = CCK_PD_STAGE_LowRssi;
+			else
+				pDigTable->CurCCKPDState = CCK_PD_STAGE_HighRssi;
+		}
+	}
+	else
+		pDigTable->CurCCKPDState=CCK_PD_STAGE_MAX;
+	
+	if(pDigTable->PreCCKPDState != pDigTable->CurCCKPDState)
+	{
+		if((pDigTable->CurCCKPDState == CCK_PD_STAGE_LowRssi)||
+			(pDigTable->CurCCKPDState == CCK_PD_STAGE_MAX))
+		{
+			PHY_SetBBReg(pAdapter, rCCK0_CCA, bMaskByte2, 0x83);
+				
+			//PHY_SetBBReg(pAdapter, rCCK0_System, bMaskByte1, 0x40);
+			//if(IS_92C_SERIAL(pHalData->VersionID))
+				//PHY_SetBBReg(pAdapter, rCCK0_FalseAlarmReport , bMaskByte2, 0xd7);
+		}
+		else
+		{
+			PHY_SetBBReg(pAdapter, rCCK0_CCA, bMaskByte2, 0xcd);
+			//PHY_SetBBReg(pAdapter,rCCK0_System, bMaskByte1, 0x47);
+			//if(IS_92C_SERIAL(pHalData->VersionID))
+				//PHY_SetBBReg(pAdapter, rCCK0_FalseAlarmReport , bMaskByte2, 0xd3);
+		}
+
+		pDigTable->PreCCKPDState = pDigTable->CurCCKPDState;
+	}
+	
+	//RT_TRACE(	COMP_DIG, DBG_LOUD, ("CCKPDStage=%x\n",pDigTable->CurCCKPDState));
+	//RT_TRACE(	COMP_DIG, DBG_LOUD, ("is92C=%x\n",IS_92C_SERIAL(pHalData->VersionID)));
+	
+}
+
+
+static	void
+dm_CtrlInitGainByTwoPort(
+	IN	PADAPTER	pAdapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	struct mlme_priv	*pmlmepriv = &(pAdapter->mlmepriv);
+	DIG_T	*pDigTable = &pdmpriv->DM_DigTable;
+
+	if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE)
+		return;
+
+	// Decide the current status and if modify initial gain or not
+	if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE)
+	{
+		pDigTable->CurSTAConnectState = DIG_STA_BEFORE_CONNECT;
+	}
+	else if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) 
+	{
+		pDigTable->CurSTAConnectState = DIG_STA_CONNECT;
+	}	
+	else
+	{
+		pDigTable->CurSTAConnectState = DIG_STA_DISCONNECT;
+	}
+	
+
+	pDigTable->CurMultiSTAConnectState = DIG_MultiSTA_DISCONNECT;
+	if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE)
+	{
+		if((is_IBSS_empty(pAdapter)==_FAIL) && (pAdapter->stapriv.asoc_sta_count > 2))
+			pDigTable->CurMultiSTAConnectState = DIG_MultiSTA_CONNECT;
+	}
+	
+	if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)
+	{
+		if(pAdapter->stapriv.asoc_sta_count > 2)
+			pDigTable->CurMultiSTAConnectState = DIG_MultiSTA_CONNECT;					
+	}
+
+
+	dm_initial_gain_STA(pAdapter);
+	dm_initial_gain_Multi_STA(pAdapter);
+	dm_CCK_PacketDetectionThresh(pAdapter);
+
+	pDigTable->PreSTAConnectState = pDigTable->CurSTAConnectState;
+	
+}
+
+
+static void dm_DIG(
+	IN	PADAPTER	pAdapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	DIG_T	*pDigTable = &pdmpriv->DM_DigTable;
+	
+	//RTPRINT(FDM, DM_Monitor, ("dm_DIG() ==>\n"));
+	
+	if(pdmpriv->bDMInitialGainEnable == _FALSE)
+		return;
+	
+	//if(pDigTable->Dig_Enable_Flag == _FALSE)
+	//	return;
+	
+	if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_DIG))
+		return;
+	
+	//RTPRINT(FDM, DM_Monitor, ("dm_DIG() progress \n"));
+
+	dm_CtrlInitGainByTwoPort(pAdapter);
+	
+	//RTPRINT(FDM, DM_Monitor, ("dm_DIG() <==\n"));
+}
+
+static void dm_SavePowerIndex(IN	PADAPTER	Adapter)
+{
+	u8			index;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u32			Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
+	
+	for(index = 0; index< 6; index++)
+		pdmpriv->PowerIndex_backup[index] = rtw_read8(Adapter, Power_Index_REG[index]);
+}
+
+static void dm_RestorePowerIndex(IN	PADAPTER	Adapter)
+{
+	u8			index;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u32			Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
+	
+	for(index = 0; index< 6; index++)
+		rtw_write8(Adapter, Power_Index_REG[index], pdmpriv->PowerIndex_backup[index]);
+}
+
+static void dm_WritePowerIndex(
+		IN	PADAPTER	Adapter, 
+		IN 	u8		Value)
+{
+	u8			index;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u32			Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
+	
+	for(index = 0; index< 6; index++)
+		rtw_write8(Adapter, Power_Index_REG[index], Value);
+}
+
+static void dm_InitDynamicTxPower(IN	PADAPTER	Adapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+#ifdef CONFIG_USB_HCI
+	if(pHalData->BoardType == BOARD_USB_High_PA)
+	{
+		dm_SavePowerIndex(Adapter);
+		pdmpriv->bDynamicTxPowerEnable = _TRUE;
+	}		
+	else	
+#else
+		pdmpriv->bDynamicTxPowerEnable = _FALSE;
+#endif
+
+	pdmpriv->LastDTPLvl = TxHighPwrLevel_Normal;
+	pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
+}
+
+
+static void dm_DynamicTxPower(IN	PADAPTER	Adapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	struct mlme_priv	*pmlmepriv = &(Adapter->mlmepriv);
+	struct mlme_ext_priv	*pmlmeext = &Adapter->mlmeextpriv;
+	int	UndecoratedSmoothedPWDB;
+
+	if(!pdmpriv->bDynamicTxPowerEnable)
+		return;
+
+	// If dynamic high power is disabled.
+	if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_HP) )
+	{
+		pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
+		return;
+	}
+
+	// STA not connected and AP not connected
+	if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) &&	
+		(pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0))
+	{
+		//RT_TRACE(COMP_HIPWR, DBG_LOUD, ("Not connected to any \n"));
+		pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
+
+		//the LastDTPlvl should reset when disconnect, 
+		//otherwise the tx power level wouldn't change when disconnect and connect again.
+		// Maddest 20091220.
+		pdmpriv->LastDTPLvl=TxHighPwrLevel_Normal;
+		return;
+	}
+	
+	if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)	// Default port
+	{
+		//todo: AP Mode
+		if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) ||
+		       (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE))
+		{
+			UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
+			//RT_TRACE(COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
+		}
+		else
+		{
+			UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB;
+			//RT_TRACE(COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
+		}
+	}
+	else // associated entry pwdb
+	{	
+		UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
+		//RT_TRACE(COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
+	}
+		
+	if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2)
+	{
+		pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2;
+		//RT_TRACE(COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n"));
+	}
+	else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) &&
+		(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) )
+	{
+		pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1;
+		//RT_TRACE(COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n"));
+	}
+	else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5))
+	{
+		pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
+		//RT_TRACE(COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n"));
+	}
+
+	if( (pdmpriv->DynamicTxHighPowerLvl != pdmpriv->LastDTPLvl) )
+	{
+		PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel);
+		if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) // HP1 -> Normal  or HP2 -> Normal
+			dm_RestorePowerIndex(Adapter);
+		else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
+			dm_WritePowerIndex(Adapter, 0x14);
+		else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
+			dm_WritePowerIndex(Adapter, 0x10);
+	}
+	pdmpriv->LastDTPLvl = pdmpriv->DynamicTxHighPowerLvl;
+	
+}
+
+
+static VOID
+DM_ChangeDynamicInitGainThresh(
+	IN	PADAPTER	pAdapter,
+	IN	u32		DM_Type,
+	IN	u32		DM_Value)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	DIG_T	*pDigTable = &pdmpriv->DM_DigTable;
+
+	if (DM_Type == DIG_TYPE_THRESH_HIGH)
+	{
+		pDigTable->RssiHighThresh = DM_Value;		
+	}
+	else if (DM_Type == DIG_TYPE_THRESH_LOW)
+	{
+		pDigTable->RssiLowThresh = DM_Value;
+	}
+	else if (DM_Type == DIG_TYPE_ENABLE)
+	{
+		pDigTable->Dig_Enable_Flag = _TRUE;
+	}	
+	else if (DM_Type == DIG_TYPE_DISABLE)
+	{
+		pDigTable->Dig_Enable_Flag = _FALSE;
+	}	
+	else if (DM_Type == DIG_TYPE_BACKOFF)
+	{
+		if(DM_Value > 30)
+			DM_Value = 30;
+		pDigTable->BackoffVal = (u8)DM_Value;
+	}
+	else if(DM_Type == DIG_TYPE_RX_GAIN_MIN)
+	{
+		if(DM_Value == 0)
+			DM_Value = 0x1;
+		pDigTable->rx_gain_range_min = (u8)DM_Value;
+	}
+	else if(DM_Type == DIG_TYPE_RX_GAIN_MAX)
+	{
+		if(DM_Value > 0x50)
+			DM_Value = 0x50;
+		pDigTable->rx_gain_range_max = (u8)DM_Value;
+	}
+}	/* DM_ChangeDynamicInitGainThresh */
+
+
+static VOID PWDB_Monitor(
+	IN	PADAPTER	Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	int	i;
+	int	tmpEntryMaxPWDB=0, tmpEntryMinPWDB=0xff;
+	u8 	sta_cnt=0;
+	u32 PWDB_rssi[NUM_STA]={0};//[0~15]:MACID, [16~31]:PWDB_rssi
+
+	if(check_fwstate(&Adapter->mlmepriv, _FW_LINKED) != _TRUE)
+		return;
+
+
+	if(check_fwstate(&Adapter->mlmepriv, WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE)
+	{
+		_irqL irqL;
+		_list	*plist, *phead;
+		struct sta_info *psta;
+		struct sta_priv *pstapriv = &Adapter->stapriv;
+		u8 bcast_addr[ETH_ALEN]= {0xff,0xff,0xff,0xff,0xff,0xff};
+	
+		_enter_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+
+		for(i=0; i< NUM_STA; i++)
+		{
+			phead = &(pstapriv->sta_hash[i]);
+			plist = get_next(phead);
+		
+			while ((rtw_end_of_queue_search(phead, plist)) == _FALSE)
+			{
+				psta = LIST_CONTAINOR(plist, struct sta_info, hash_list);
+
+				plist = get_next(plist);
+
+				if(_rtw_memcmp(psta	->hwaddr, bcast_addr, ETH_ALEN) || 
+					_rtw_memcmp(psta->hwaddr, myid(&Adapter->eeprompriv), ETH_ALEN))
+					continue;
+
+				if(psta->state & WIFI_ASOC_STATE)
+				{
+					
+					if(psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB)
+						tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
+
+					if(psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB)
+						tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
+
+					PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16));
+				}
+			
+			}
+
+		}
+	
+		_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+
+
+		
+		if(pHalData->fw_ractrl == _TRUE)
+		{
+			// Report every sta's RSSI to FW
+			for(i=0; i< sta_cnt; i++)
+			{
+				rtl8192c_set_rssi_cmd(Adapter, (u8*)&PWDB_rssi[i]);
+			}
+		}
+
+	}
+
+
+
+	if(tmpEntryMaxPWDB != 0)	// If associated entry is found
+	{
+		pdmpriv->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB;		
+	}
+	else
+	{
+		pdmpriv->EntryMaxUndecoratedSmoothedPWDB = 0;
+	}
+	
+	if(tmpEntryMinPWDB != 0xff) // If associated entry is found
+	{
+		pdmpriv->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB;		
+	}
+	else
+	{
+		pdmpriv->EntryMinUndecoratedSmoothedPWDB = 0;
+	}
+
+
+	if(check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE) == _TRUE)
+	{
+	
+		if(pHalData->fw_ractrl == _TRUE)
+		{
+			u32 param = (u32)(pdmpriv->UndecoratedSmoothedPWDB<<16);
+		
+			param |= 0;//macid=0 for sta mode;
+			
+			rtl8192c_set_rssi_cmd(Adapter, (u8*)&param);
+		}
+	}
+
+}
+
+
+static void
+DM_InitEdcaTurbo(
+	IN	PADAPTER	Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	pHalData->bCurrentTurboEDCA = _FALSE;
+	Adapter->recvpriv.bIsAnyNonBEPkts = _FALSE;
+
+}
+
+
+static void
+dm_CheckEdcaTurbo(
+	IN	PADAPTER	Adapter
+	)
+{
+	u32 	trafficIndex;
+	u32	edca_param;
+	u64	cur_tx_bytes = 0;
+	u64	cur_rx_bytes = 0;
+	u8	bbtchange = _FALSE;
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv		*pdmpriv = &pHalData->dmpriv;
+	struct xmit_priv		*pxmitpriv = &(Adapter->xmitpriv);
+	struct recv_priv		*precvpriv = &(Adapter->recvpriv);
+	struct registry_priv	*pregpriv = &Adapter->registrypriv;
+	struct mlme_ext_priv	*pmlmeext = &(Adapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+#ifdef CONFIG_BT_COEXIST
+	struct btcoexist_priv	*pbtpriv = &(pHalData->bt_coexist);	
+#endif
+
+
+	if ((pregpriv->wifi_spec == 1) || (pmlmeinfo->HT_enable == 0))
+	{
+		goto dm_CheckEdcaTurbo_EXIT;
+	}
+
+	if (pmlmeinfo->assoc_AP_vendor >= maxAP)
+	{
+		goto dm_CheckEdcaTurbo_EXIT;
+	}
+
+#ifdef CONFIG_BT_COEXIST
+	if(pbtpriv->BT_Coexist)
+	{
+		if( (pbtpriv->BT_EDCA[UP_LINK]!=0) ||  (pbtpriv->BT_EDCA[DOWN_LINK]!=0))
+		{
+			bbtchange = _TRUE;		
+		}
+	}
+#endif
+
+	// Check if the status needs to be changed.
+	if((bbtchange) || (!precvpriv->bIsAnyNonBEPkts) )
+	{
+		cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes;
+		cur_rx_bytes = precvpriv->rx_bytes - precvpriv->last_rx_bytes;
+
+		//traffic, TX or RX
+		if((pmlmeinfo->assoc_AP_vendor == ralinkAP)||(pmlmeinfo->assoc_AP_vendor == atherosAP))
+		{
+			if (cur_tx_bytes > (cur_rx_bytes << 2))
+			{ // Uplink TP is present.
+				trafficIndex = UP_LINK; 
+			}
+			else
+			{ // Balance TP is present.
+				trafficIndex = DOWN_LINK;
+			}
+		}
+		else
+		{
+			if (cur_rx_bytes > (cur_tx_bytes << 2))
+			{ // Downlink TP is present.
+				trafficIndex = DOWN_LINK;
+			}
+			else
+			{ // Balance TP is present.
+				trafficIndex = UP_LINK;
+			}
+		}
+
+		if ((pdmpriv->prv_traffic_idx != trafficIndex) || (!pHalData->bCurrentTurboEDCA))
+		{
+#ifdef CONFIG_BT_COEXIST
+			if(_TRUE == bbtchange)
+			{
+				edca_param = pbtpriv->BT_EDCA[trafficIndex];
+			}
+			else
+#endif
+			{
+#if 0
+				//adjust EDCA parameter for BE queue
+				edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex];
+#else
+
+				if((pmlmeinfo->assoc_AP_vendor == ciscoAP) && (pmlmeext->cur_wireless_mode & WIRELESS_11_24N))
+				{
+					edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex];
+				}
+				else
+				{
+					edca_param = EDCAParam[unknownAP][trafficIndex];
+				}
+#endif
+			}
+
+#ifdef CONFIG_PCI_HCI
+			if(IS_92C_SERIAL(pHalData->VersionID))
+			{
+				edca_param = 0x60a42b;
+			}
+			else
+			{
+				edca_param = 0x6ea42b;
+			}
+#endif
+			rtw_write32(Adapter, REG_EDCA_BE_PARAM, edca_param);
+
+			pdmpriv->prv_traffic_idx = trafficIndex;
+		}
+		
+		pHalData->bCurrentTurboEDCA = _TRUE;
+	}
+	else
+	{
+		//
+		// Turn Off EDCA turbo here.
+		// Restore original EDCA according to the declaration of AP.
+		//
+		 if(pHalData->bCurrentTurboEDCA)
+		{
+			rtw_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE);
+			pHalData->bCurrentTurboEDCA = _FALSE;
+		}
+	}
+
+dm_CheckEdcaTurbo_EXIT:
+	// Set variables for next time.
+	precvpriv->bIsAnyNonBEPkts = _FALSE;
+	pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes;
+	precvpriv->last_rx_bytes = precvpriv->rx_bytes;
+
+}
+
+#define		DPK_DELTA_MAPPING_NUM	13
+#define		index_mapping_HP_NUM	15
+//091212 chiyokolin
+static	VOID
+dm_TXPowerTrackingCallback_ThermalMeter_92C(
+            IN PADAPTER	Adapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u8			ThermalValue = 0, delta, delta_LCK, delta_IQK, delta_HP, TimeOut = 100, ThermalValue_HP_count = 0;
+	u32			ThermalValue_HP = 0;
+	s8			delta_DPK;
+	int 			ele_A, ele_D, TempCCk, X, value32;
+	int			Y, ele_C;
+	s8			OFDM_index[2], CCK_index = 0, OFDM_index_old[2], CCK_index_old = 0, delta_APK;
+	int			i = 0, CCKSwingNeedUpdate = 0;
+	BOOLEAN		is2T = IS_92C_SERIAL(pHalData->VersionID);
+#if 0	
+//#ifdef CONFIG_MP_INCLUDED
+	PMPT_CONTEXT	pMptCtx = &(Adapter->MptCtx);	
+	pu1Byte			TxPwrLevel = pMptCtx->TxPwrLevel;
+#endif
+
+	u8			OFDM_min_index = 6, rf; //OFDM BB Swing should be less than +3.0dB, which is required by Arthur
+	u32			DPK_delta_mapping[2][DPK_DELTA_MAPPING_NUM] = {
+					{0x1c, 0x1c, 0x1d, 0x1d, 0x1e, 
+					 0x1f, 0x00, 0x00, 0x01, 0x01,
+					 0x02, 0x02, 0x03},
+					{0x1c, 0x1d, 0x1e, 0x1e, 0x1e,
+					 0x1f, 0x00, 0x00, 0x01, 0x02,
+					 0x02, 0x03, 0x03}};
+
+	s8			index_mapping_HP[index_mapping_HP_NUM] = {
+					0,	1,	3,	4,	6,	
+					7,	9,	10,	12,	13,	
+					15,	16,	18,	19,	21
+					};
+
+	s8			index_HP;
+
+	pdmpriv->TXPowerTrackingCallbackCnt++;	//cosa add for debug
+	pdmpriv->bTXPowerTrackingInit = _TRUE;
+
+	if(pHalData->CurrentChannel == 14 && !pdmpriv->bCCKinCH14)
+		pdmpriv->bCCKinCH14 = _TRUE;
+	else if(pHalData->CurrentChannel != 14 && pdmpriv->bCCKinCH14)
+		pdmpriv->bCCKinCH14 = _FALSE;
+
+	//DBG_8192C("===>dm_TXPowerTrackingCallback_ThermalMeter_92C\n");
+
+	ThermalValue = (u8)PHY_QueryRFReg(Adapter, RF90_PATH_A, RF_T_METER, 0x1f);	// 0x24: RF Reg[4:0]	
+
+	//DBG_8192C("\n\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n",ThermalValue,pdmpriv->ThermalValue,  pHalData->EEPROMThermalMeter);
+
+	rtl8192c_PHY_APCalibrate(Adapter, (ThermalValue - pHalData->EEPROMThermalMeter));
+	rtl8192c_PHY_DigitalPredistortion(Adapter);
+
+	if(is2T)
+		rf = 2;
+	else
+		rf = 1;
+	
+	if(ThermalValue)
+	{
+//		if(!pHalData->ThermalValue)
+		{
+			//Query OFDM path A default setting 		
+			ele_D = PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord)&bMaskOFDM_D;
+			for(i=0; i<OFDM_TABLE_SIZE; i++)	//find the index
+			{
+				if(ele_D == (OFDMSwingTable[i]&bMaskOFDM_D))
+				{
+					OFDM_index_old[0] = (u8)i;
+					//DBG_8192C("Initial pathA ele_D reg0x%x = 0x%x, OFDM_index=0x%x\n", rOFDM0_XATxIQImbalance, ele_D, OFDM_index_old[0]);
+					break;
+				}
+			}
+
+			//Query OFDM path B default setting 
+			if(is2T)
+			{
+				ele_D = PHY_QueryBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord)&bMaskOFDM_D;
+				for(i=0; i<OFDM_TABLE_SIZE; i++)	//find the index
+				{
+					if(ele_D == (OFDMSwingTable[i]&bMaskOFDM_D))
+					{
+						OFDM_index_old[1] = (u8)i;
+						//DBG_8192C("Initial pathB ele_D reg0x%x = 0x%x, OFDM_index=0x%x\n",rOFDM0_XBTxIQImbalance, ele_D, OFDM_index_old[1]);
+						break;
+					}
+				}
+			}
+
+			//Query CCK default setting From 0xa24
+			TempCCk = PHY_QueryBBReg(Adapter, rCCK0_TxFilter2, bMaskDWord)&bMaskCCK;
+			for(i=0 ; i<CCK_TABLE_SIZE ; i++)
+			{
+				if(pdmpriv->bCCKinCH14)
+				{
+					if(_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch14[i][2], 4)==_TRUE)
+					{
+						CCK_index_old =(u8)i;
+						//DBG_8192C("Initial reg0x%x = 0x%x, CCK_index=0x%x, ch 14 %d\n", rCCK0_TxFilter2, TempCCk, CCK_index_old, pdmpriv->bCCKinCH14);
+						break;
+					}
+				}
+				else
+				{
+					if(_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch1_Ch13[i][2], 4)==_TRUE)
+					{
+						CCK_index_old =(u8)i;
+						//DBG_8192C("Initial reg0x%x = 0x%x, CCK_index=0x%x, ch14 %d\n", rCCK0_TxFilter2, TempCCk, CCK_index_old, pdmpriv->bCCKinCH14);
+						break;
+					}			
+				}
+			}	
+
+			if(!pdmpriv->ThermalValue)
+			{
+				pdmpriv->ThermalValue = pHalData->EEPROMThermalMeter;
+				pdmpriv->ThermalValue_LCK = ThermalValue;
+				pdmpriv->ThermalValue_IQK = ThermalValue;
+				pdmpriv->ThermalValue_DPK = pHalData->EEPROMThermalMeter;
+
+#ifdef CONFIG_USB_HCI
+				for(i = 0; i < rf; i++)
+					pdmpriv->OFDM_index_HP[i] = pdmpriv->OFDM_index[i] = OFDM_index_old[i];
+				pdmpriv->CCK_index_HP = pdmpriv->CCK_index = CCK_index_old;
+#else
+				for(i = 0; i < rf; i++)
+					pdmpriv->OFDM_index[i] = OFDM_index_old[i];
+				pdmpriv->CCK_index = CCK_index_old;
+#endif
+			}
+
+#ifdef CONFIG_USB_HCI
+			if(pHalData->BoardType == BOARD_USB_High_PA)
+			{
+				pdmpriv->ThermalValue_HP[pdmpriv->ThermalValue_HP_index] = ThermalValue;
+				pdmpriv->ThermalValue_HP_index++;
+				if(pdmpriv->ThermalValue_HP_index == HP_THERMAL_NUM)
+					pdmpriv->ThermalValue_HP_index = 0;
+
+				for(i = 0; i < HP_THERMAL_NUM; i++)
+				{
+					if(pdmpriv->ThermalValue_HP[i])
+					{
+						ThermalValue_HP += pdmpriv->ThermalValue_HP[i];
+						ThermalValue_HP_count++;
+					}			
+				}
+		
+				if(ThermalValue_HP_count)
+					ThermalValue = (u8)(ThermalValue_HP / ThermalValue_HP_count);
+			}
+#endif
+		}
+
+		delta = (ThermalValue > pdmpriv->ThermalValue)?(ThermalValue - pdmpriv->ThermalValue):(pdmpriv->ThermalValue - ThermalValue);
+#ifdef CONFIG_USB_HCI
+		if(pHalData->BoardType == BOARD_USB_High_PA)
+		{
+			if(pdmpriv->bDoneTxpower)
+				delta_HP = (ThermalValue > pdmpriv->ThermalValue)?(ThermalValue - pdmpriv->ThermalValue):(pdmpriv->ThermalValue - ThermalValue);
+			else
+				delta_HP = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue);						
+		}
+		else
+#endif	
+		{
+			delta_HP = 0;			
+		}
+		delta_LCK = (ThermalValue > pdmpriv->ThermalValue_LCK)?(ThermalValue - pdmpriv->ThermalValue_LCK):(pdmpriv->ThermalValue_LCK - ThermalValue);
+		delta_IQK = (ThermalValue > pdmpriv->ThermalValue_IQK)?(ThermalValue - pdmpriv->ThermalValue_IQK):(pdmpriv->ThermalValue_IQK - ThermalValue);
+		delta_DPK = pdmpriv->ThermalValue_DPK - ThermalValue;
+
+		//DBG_8192C("Readback Thermal Meter = 0x%lx pre thermal meter 0x%lx EEPROMthermalmeter 0x%lx delta 0x%lx delta_LCK 0x%lx delta_IQK 0x%lx\n", ThermalValue, pHalData->ThermalValue, pHalData->EEPROMThermalMeter, delta, delta_LCK, delta_IQK);
+
+		if(delta_LCK > 1)
+		{
+			pdmpriv->ThermalValue_LCK = ThermalValue;
+			rtl8192c_PHY_LCCalibrate(Adapter);
+		}
+		
+		if((delta > 0 || delta_HP > 0) && pdmpriv->TxPowerTrackControl)
+		{
+#ifdef CONFIG_USB_HCI
+			if(pHalData->BoardType == BOARD_USB_High_PA)
+			{
+				pdmpriv->bDoneTxpower = _TRUE;
+				delta_HP = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue);						
+				
+				if(delta_HP > index_mapping_HP_NUM-1)					
+					index_HP = index_mapping_HP[index_mapping_HP_NUM-1];
+				else
+					index_HP = index_mapping_HP[delta_HP];
+				
+				if(ThermalValue > pHalData->EEPROMThermalMeter)	//set larger Tx power
+				{
+					for(i = 0; i < rf; i++)
+					 	OFDM_index[i] = pdmpriv->OFDM_index_HP[i] - index_HP;
+					CCK_index = pdmpriv->CCK_index_HP -index_HP;						
+				}
+				else
+				{
+					for(i = 0; i < rf; i++)
+						OFDM_index[i] = pdmpriv->OFDM_index_HP[i] + index_HP;
+					CCK_index = pdmpriv->CCK_index_HP + index_HP;						
+				}	
+				
+				delta_HP = (ThermalValue > pdmpriv->ThermalValue)?(ThermalValue - pdmpriv->ThermalValue):(pdmpriv->ThermalValue - ThermalValue);
+				
+			}
+			else
+#endif
+			{
+				if(ThermalValue > pdmpriv->ThermalValue)
+				{ 
+					for(i = 0; i < rf; i++)
+					 	pdmpriv->OFDM_index[i] -= delta;
+					
+					pdmpriv->CCK_index -= delta;
+				}
+				else
+				{
+					for(i = 0; i < rf; i++)			
+						pdmpriv->OFDM_index[i] += delta;
+					
+					pdmpriv->CCK_index += delta;
+				}
+			}
+
+	/*		
+			if(is2T)
+			{
+				DBG_8192C("temp OFDM_A_index=0x%x, OFDM_B_index=0x%x, CCK_index=0x%x\n", 
+					pdmpriv->OFDM_index[0], pdmpriv->OFDM_index[1], pdmpriv->CCK_index);			
+			}
+			else
+			{
+				//DBG_8192C("temp OFDM_A_index=0x%x, CCK_index=0x%x\n",pdmpriv->OFDM_index[0], pdmpriv->CCK_index);			
+			}
+	*/
+
+			//no adjust
+#ifdef CONFIG_USB_HCI
+			if(pHalData->BoardType != BOARD_USB_High_PA)
+#endif
+			{
+				if(ThermalValue > pHalData->EEPROMThermalMeter)
+				{
+					for(i = 0; i < rf; i++)			
+						OFDM_index[i] = pdmpriv->OFDM_index[i]+1;
+					CCK_index = pdmpriv->CCK_index+1;			
+				}
+				else
+				{
+					for(i = 0; i < rf; i++)			
+						OFDM_index[i] = pdmpriv->OFDM_index[i];
+					CCK_index = pdmpriv->CCK_index;						
+				}
+#if 0
+//#ifdef CONFIG_MP_INCLUDED
+				for(i = 0; i < rf; i++)
+				{
+					if(TxPwrLevel[i] >=0 && TxPwrLevel[i] <=26)
+					{
+						if(ThermalValue > pHalData->EEPROMThermalMeter)
+						{
+							if (delta < 5)
+								OFDM_index[i] -= 1;					
+							else 
+								OFDM_index[i] -= 2;					
+						}
+						else if(delta > 5 && ThermalValue < pHalData->EEPROMThermalMeter)
+						{
+							OFDM_index[i] += 1;
+						}
+					}
+					else if (TxPwrLevel[i] >= 27 && TxPwrLevel[i] <= 32 && ThermalValue > pHalData->EEPROMThermalMeter)
+					{
+						if (delta < 5)
+							OFDM_index[i] -= 1;					
+						else 
+							OFDM_index[i] -= 2;								
+					}
+					else if (TxPwrLevel[i] >= 32 && TxPwrLevel[i] <= 38 && ThermalValue > pHalData->EEPROMThermalMeter && delta > 5)
+					{
+						OFDM_index[i] -= 1;								
+					}
+				}
+
+				{
+					if(TxPwrLevel[i] >=0 && TxPwrLevel[i] <=26)
+					{
+						if(ThermalValue > pHalData->EEPROMThermalMeter)
+						{
+							if (delta < 5)
+								CCK_index -= 1; 				
+							else 
+								CCK_index -= 2; 				
+						}
+						else if(delta > 5 && ThermalValue < pHalData->EEPROMThermalMeter)
+						{
+							CCK_index += 1;
+						}
+					}
+					else if (TxPwrLevel[i] >= 27 && TxPwrLevel[i] <= 32 && ThermalValue > pHalData->EEPROMThermalMeter)
+					{
+						if (delta < 5)
+							CCK_index -= 1; 				
+						else 
+							CCK_index -= 2; 							
+					}
+					else if (TxPwrLevel[i] >= 32 && TxPwrLevel[i] <= 38 && ThermalValue > pHalData->EEPROMThermalMeter && delta > 5)
+					{
+						CCK_index -= 1; 							
+					}
+				}
+#endif
+			}
+
+			for(i = 0; i < rf; i++)
+			{
+				if(OFDM_index[i] > OFDM_TABLE_SIZE-1)
+					OFDM_index[i] = OFDM_TABLE_SIZE-1;
+				else if (OFDM_index[i] < OFDM_min_index)
+					OFDM_index[i] = OFDM_min_index;
+			}
+						
+			if(CCK_index > CCK_TABLE_SIZE-1)
+				CCK_index = CCK_TABLE_SIZE-1;
+			else if (CCK_index < 0)
+				CCK_index = 0;		
+
+	/*		
+			if(is2T)
+			{
+				DBG_8192C("new OFDM_A_index=0x%x, OFDM_B_index=0x%x, CCK_index=0x%x\n", OFDM_index[0], OFDM_index[1], CCK_index);
+			}
+			else
+			{
+				//DBG_8192C("new OFDM_A_index=0x%x, CCK_index=0x%x\n",	OFDM_index[0], CCK_index);			
+			}
+	*/
+			
+		}
+
+		if(pdmpriv->TxPowerTrackControl && (delta != 0 || delta_HP != 0))
+		{
+			//Adujst OFDM Ant_A according to IQK result
+			ele_D = (OFDMSwingTable[(u8)OFDM_index[0]] & 0xFFC00000)>>22;
+			X = pdmpriv->RegE94;
+			Y = pdmpriv->RegE9C;		
+
+			if(X != 0)
+			{
+				if ((X & 0x00000200) != 0)
+					X = X | 0xFFFFFC00;
+				ele_A = ((X * ele_D)>>8)&0x000003FF;
+					
+				//new element C = element D x Y
+				if ((Y & 0x00000200) != 0)
+					Y = Y | 0xFFFFFC00;
+				ele_C = ((Y * ele_D)>>8)&0x000003FF;
+				
+				//wirte new elements A, C, D to regC80 and regC94, element B is always 0
+				value32 = (ele_D<<22)|((ele_C&0x3F)<<16)|ele_A;
+				PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, value32);
+				
+				value32 = (ele_C&0x000003C0)>>6;
+				PHY_SetBBReg(Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, value32);
+
+				value32 = ((X * ele_D)>>7)&0x01;
+				PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT31, value32);
+
+				value32 = ((Y * ele_D)>>7)&0x01;
+				PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT29, value32);
+
+			}
+			else
+			{
+				PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable[(u8)OFDM_index[0]]);				
+				PHY_SetBBReg(Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00);
+				PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT31|BIT29, 0x00);
+			}
+
+			//RTPRINT(FINIT, INIT_IQK, ("TxPwrTracking path A: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x\n", X, Y, ele_A, ele_C, ele_D));		
+
+			//Adjust CCK according to IQK result
+			if(!pdmpriv->bCCKinCH14){
+				rtw_write8(Adapter, 0xa22, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][0]);
+				rtw_write8(Adapter, 0xa23, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][1]);
+				rtw_write8(Adapter, 0xa24, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][2]);
+				rtw_write8(Adapter, 0xa25, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][3]);
+				rtw_write8(Adapter, 0xa26, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][4]);
+				rtw_write8(Adapter, 0xa27, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][5]);
+				rtw_write8(Adapter, 0xa28, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][6]);
+				rtw_write8(Adapter, 0xa29, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][7]);
+			}
+			else{
+				rtw_write8(Adapter, 0xa22, CCKSwingTable_Ch14[(u8)CCK_index][0]);
+				rtw_write8(Adapter, 0xa23, CCKSwingTable_Ch14[(u8)CCK_index][1]);
+				rtw_write8(Adapter, 0xa24, CCKSwingTable_Ch14[(u8)CCK_index][2]);
+				rtw_write8(Adapter, 0xa25, CCKSwingTable_Ch14[(u8)CCK_index][3]);
+				rtw_write8(Adapter, 0xa26, CCKSwingTable_Ch14[(u8)CCK_index][4]);
+				rtw_write8(Adapter, 0xa27, CCKSwingTable_Ch14[(u8)CCK_index][5]);
+				rtw_write8(Adapter, 0xa28, CCKSwingTable_Ch14[(u8)CCK_index][6]);
+				rtw_write8(Adapter, 0xa29, CCKSwingTable_Ch14[(u8)CCK_index][7]);	
+			}		
+
+			if(is2T)
+			{						
+				ele_D = (OFDMSwingTable[(u8)OFDM_index[1]] & 0xFFC00000)>>22;
+				
+				//new element A = element D x X
+				X = pdmpriv->RegEB4;
+				Y = pdmpriv->RegEBC;
+				
+				if(X != 0){
+					if ((X & 0x00000200) != 0)	//consider minus
+						X = X | 0xFFFFFC00;
+					ele_A = ((X * ele_D)>>8)&0x000003FF;
+					
+					//new element C = element D x Y
+					if ((Y & 0x00000200) != 0)
+						Y = Y | 0xFFFFFC00;
+					ele_C = ((Y * ele_D)>>8)&0x00003FF;
+					
+					//wirte new elements A, C, D to regC88 and regC9C, element B is always 0
+					value32=(ele_D<<22)|((ele_C&0x3F)<<16) |ele_A;
+					PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, value32);
+
+					value32 = (ele_C&0x000003C0)>>6;
+					PHY_SetBBReg(Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, value32);	
+
+					value32 = ((X * ele_D)>>7)&0x01;
+					PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT27, value32);
+
+					value32 = ((Y * ele_D)>>7)&0x01;
+					PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT25, value32);
+
+				}
+				else{
+					PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable[(u8)OFDM_index[1]]);										
+					PHY_SetBBReg(Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00);
+					PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT27|BIT25, 0x00);
+				}
+
+				//DBG_8192C("TxPwrTracking path B: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x\n", X, Y, ele_A, ele_C, ele_D);
+			}
+
+			/*
+			DBG_8192C("TxPwrTracking 0xc80 = 0x%x, 0xc94 = 0x%x RF 0x24 = 0x%x\n", \
+					PHY_QueryBBReg(Adapter, 0xc80, bMaskDWord),\
+					PHY_QueryBBReg(Adapter, 0xc94, bMaskDWord), \
+					PHY_QueryRFReg(Adapter, RF90_PATH_A, 0x24, bMaskDWord));
+			*/
+		}
+
+#if MP_DRIVER == 1
+		if(delta_IQK > 1)
+#else
+		if(delta_IQK > 3)
+#endif
+		{
+			pdmpriv->ThermalValue_IQK = ThermalValue;
+			rtl8192c_PHY_IQCalibrate(Adapter,_FALSE);
+		}
+
+		if(delta_DPK != 0)
+		{
+			delta_DPK = ThermalValue - pHalData->EEPROMThermalMeter;
+
+			//if(pdmpriv->bDPPathAOK || pdmpriv->bDPPathBOK)
+			//	DBG_8192C("TxPwrTracking delata_DPK = %d\n", delta_DPK);
+			
+			if(pdmpriv->bDPPathAOK)
+				PHY_SetBBReg(Adapter, 0xb68, 0x7c00, DPK_delta_mapping[0][((delta_DPK+13)/2)]);					
+			if(pdmpriv->bDPPathBOK)
+				PHY_SetBBReg(Adapter, 0xb6c, 0x7c00, DPK_delta_mapping[1][((delta_DPK+13)/2)]);							
+			pdmpriv->ThermalValue_DPK = ThermalValue;			
+		}
+
+		//update thermal meter value
+		if(pdmpriv->TxPowerTrackControl)
+			pdmpriv->ThermalValue = ThermalValue;
+
+	}
+
+	//DBG_8192C("<===dm_TXPowerTrackingCallback_ThermalMeter_92C\n");
+	
+	pdmpriv->TXPowercount = 0;
+
+}
+
+
+static	VOID
+dm_InitializeTXPowerTracking_ThermalMeter(
+	IN	PADAPTER		Adapter)
+{	
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+	//pMgntInfo->bTXPowerTracking = _TRUE;
+	pdmpriv->TXPowercount = 0;
+	pdmpriv->bTXPowerTrackingInit = _FALSE;
+	pdmpriv->ThermalValue = 0;
+	
+#if	(MP_DRIVER != 1)	//for mp driver, turn off txpwrtracking as default
+	pdmpriv->TxPowerTrackControl = _TRUE;
+#endif
+	
+	MSG_8192C("pdmpriv->TxPowerTrackControl = %d\n", pdmpriv->TxPowerTrackControl);
+}
+
+
+static VOID
+DM_InitializeTXPowerTracking(
+	IN	PADAPTER		Adapter)
+{
+	dm_InitializeTXPowerTracking_ThermalMeter(Adapter);	
+}	
+
+//
+//	Description:
+//		- Dispatch TxPower Tracking direct call ONLY for 92s.
+//		- We shall NOT schedule Workitem within PASSIVE LEVEL, which will cause system resource
+//		   leakage under some platform.
+//
+//	Assumption:
+//		PASSIVE_LEVEL when this routine is called.
+//
+//	Added by Roger, 2009.06.18.
+//
+static VOID
+DM_TXPowerTracking92CDirectCall(
+            IN	PADAPTER		Adapter)
+{	
+	dm_TXPowerTrackingCallback_ThermalMeter_92C(Adapter);
+}
+
+static VOID
+dm_CheckTXPowerTracking_ThermalMeter(
+	IN	PADAPTER		Adapter)
+{	
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	//u1Byte					TxPowerCheckCnt = 5;	//10 sec
+
+	//if(!pMgntInfo->bTXPowerTracking /*|| (!pdmpriv->TxPowerTrackControl && pdmpriv->bAPKdone)*/)
+	if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_SS))
+	{
+		return;
+	}
+
+	if(!pdmpriv->TM_Trigger)		//at least delay 1 sec
+	{
+		//pHalData->TxPowerCheckCnt++;	//cosa add for debug
+		PHY_SetRFReg(Adapter, RF90_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60);
+		//DBG_8192C("Trigger 92C Thermal Meter!!\n");
+		
+		pdmpriv->TM_Trigger = 1;
+		return;
+		
+	}
+	else
+	{
+		//DBG_8192C("Schedule TxPowerTracking direct call!!\n");
+		DM_TXPowerTracking92CDirectCall(Adapter); //Using direct call is instead, added by Roger, 2009.06.18.
+		pdmpriv->TM_Trigger = 0;
+	}
+
+}
+
+
+VOID
+rtl8192c_dm_CheckTXPowerTracking(
+	IN	PADAPTER		Adapter)
+{
+	dm_CheckTXPowerTracking_ThermalMeter(Adapter);
+}
+
+#ifdef CONFIG_BT_COEXIST
+static BOOLEAN BT_BTStateChange(PADAPTER Adapter)
+{
+	PHAL_DATA_TYPE		pHalData = GET_HAL_DATA(Adapter);
+	struct btcoexist_priv	*pbtpriv = &(pHalData->bt_coexist);
+	struct registry_priv	*registry_par = &Adapter->registrypriv;
+	
+	struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
+	
+	u32 		Polling, Ratio_Tx, Ratio_PRI;
+	u32 			BT_Tx, BT_PRI;
+	u8			BT_State;
+	static u8		ServiceTypeCnt = 0;
+	u8			CurServiceType;
+	static u8		LastServiceType = BT_Idle;
+
+	if(check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE)	
+		return _FALSE;
+	
+	BT_State = rtw_read8(Adapter, 0x4fd);
+/*
+	temp = PlatformEFIORead4Byte(Adapter, 0x488);
+	BT_Tx = (u2Byte)(((temp<<8)&0xff00)+((temp>>8)&0xff));
+	BT_PRI = (u2Byte)(((temp>>8)&0xff00)+((temp>>24)&0xff));
+
+	temp = PlatformEFIORead4Byte(Adapter, 0x48c);
+	Polling = ((temp<<8)&0xff000000) + ((temp>>8)&0x00ff0000) + 
+			((temp<<8)&0x0000ff00) + ((temp>>8)&0x000000ff);
+	
+*/
+	BT_Tx = rtw_read32(Adapter, 0x488);
+	
+	DBG_8192C("Ratio 0x488  =%x\n", BT_Tx);
+	BT_Tx =BT_Tx & 0x00ffffff;
+	//RTPRINT(FBT, BT_TRACE, ("Ratio BT_Tx  =%x\n", BT_Tx));
+
+	BT_PRI = rtw_read32(Adapter, 0x48c);
+	
+	DBG_8192C("Ratio 0x48c  =%x\n", BT_PRI);
+	BT_PRI =BT_PRI & 0x00ffffff;
+	//RTPRINT(FBT, BT_TRACE, ("Ratio BT_PRI  =%x\n", BT_PRI));
+
+
+	Polling = rtw_read32(Adapter, 0x490);
+	//RTPRINT(FBT, BT_TRACE, ("Ratio 0x490  =%x\n", Polling));
+
+
+	if(BT_Tx==0xffffffff && BT_PRI==0xffffffff && Polling==0xffffffff && BT_State==0xff)
+		return _FALSE;
+
+	BT_State &= BIT0;
+
+	if(BT_State != pbtpriv->BT_CUR_State)
+	{
+		pbtpriv->BT_CUR_State = BT_State;
+	
+		if(registry_par->bt_sco == 3)
+		{
+			ServiceTypeCnt = 0;
+		
+			pbtpriv->BT_Service = BT_Idle;
+
+			DBG_8192C("BT_%s\n", BT_State?"ON":"OFF");
+
+			BT_State = BT_State | 
+					((pbtpriv->BT_Ant_isolation==1)?0:BIT1) |BIT2;
+
+			rtw_write8(Adapter, 0x4fd, BT_State);
+			DBG_8192C("BT set 0x4fd to %x\n", BT_State);
+		}
+		
+		return _TRUE;
+	}
+	DBG_8192C("bRegBT_Sco =  %d\n",registry_par->bt_sco);
+
+	Ratio_Tx = BT_Tx*1000/Polling;
+	Ratio_PRI = BT_PRI*1000/Polling;
+
+	pbtpriv->Ratio_Tx=Ratio_Tx;
+	pbtpriv->Ratio_PRI=Ratio_PRI;
+	
+	DBG_8192C("Ratio_Tx=%d\n", Ratio_Tx);
+	DBG_8192C("Ratio_PRI=%d\n", Ratio_PRI);
+
+	
+	if(BT_State && registry_par->bt_sco==3)
+	{
+		DBG_8192C("bt_sco  ==3 Follow Counter\n");
+//		if(BT_Tx==0xffff && BT_PRI==0xffff && Polling==0xffffffff)
+//		{
+//			ServiceTypeCnt = 0;
+//			return FALSE;
+//		}
+//		else
+		{
+		/*
+			Ratio_Tx = BT_Tx*1000/Polling;
+			Ratio_PRI = BT_PRI*1000/Polling;
+
+			pHalData->bt_coexist.Ratio_Tx=Ratio_Tx;
+			pHalData->bt_coexist.Ratio_PRI=Ratio_PRI;
+			
+			RTPRINT(FBT, BT_TRACE, ("Ratio_Tx=%d\n", Ratio_Tx));
+			RTPRINT(FBT, BT_TRACE, ("Ratio_PRI=%d\n", Ratio_PRI));
+
+		*/	
+			if((Ratio_Tx < 30)  && (Ratio_PRI < 30)) 
+			  	CurServiceType = BT_Idle;
+			else if((Ratio_PRI > 110) && (Ratio_PRI < 250))
+				CurServiceType = BT_SCO;
+			else if((Ratio_Tx >= 200)&&(Ratio_PRI >= 200))
+				CurServiceType = BT_Busy;
+			else if((Ratio_Tx >=350) && (Ratio_Tx < 500))
+				CurServiceType = BT_OtherBusy;
+			else if(Ratio_Tx >=500)
+				CurServiceType = BT_PAN;
+			else
+				CurServiceType=BT_OtherAction;
+		}
+
+/*		if(pHalData->bt_coexist.bStopCount)
+		{
+			ServiceTypeCnt=0;
+			pHalData->bt_coexist.bStopCount=FALSE;
+		}
+*/
+//		if(CurServiceType == BT_OtherBusy)
+		{
+			ServiceTypeCnt=2;
+			LastServiceType=CurServiceType;
+		}
+#if 0
+		else if(CurServiceType == LastServiceType)
+		{
+			if(ServiceTypeCnt<3)
+				ServiceTypeCnt++;
+		}
+		else
+		{
+			ServiceTypeCnt = 0;
+			LastServiceType = CurServiceType;
+		}
+#endif
+
+		if(ServiceTypeCnt==2)
+		{
+			pbtpriv->BT_Service = LastServiceType;
+			BT_State = BT_State | 
+					((pbtpriv->BT_Ant_isolation==1)?0:BIT1) |
+					//((pbtpriv->BT_Service==BT_SCO)?0:BIT2);
+					((pbtpriv->BT_Service!=BT_Idle)?0:BIT2);
+
+			//if(pbtpriv->BT_Service==BT_Busy)
+			//	BT_State&= ~(BIT2);
+
+			if(pbtpriv->BT_Service==BT_SCO)
+			{
+				DBG_8192C("BT TYPE Set to  ==> BT_SCO\n");
+			}
+			else if(pbtpriv->BT_Service==BT_Idle)
+			{
+				DBG_8192C("BT TYPE Set to  ==> BT_Idle\n");
+			}
+			else if(pbtpriv->BT_Service==BT_OtherAction)
+			{
+				DBG_8192C("BT TYPE Set to  ==> BT_OtherAction\n");
+			}
+			else if(pbtpriv->BT_Service==BT_Busy)
+			{
+				DBG_8192C("BT TYPE Set to  ==> BT_Busy\n");
+			}
+			else if(pbtpriv->BT_Service==BT_PAN)
+			{
+				DBG_8192C("BT TYPE Set to  ==> BT_PAN\n");
+			}
+			else
+			{
+				DBG_8192C("BT TYPE Set to ==> BT_OtherBusy\n");
+			}
+				
+			//Add interrupt migration when bt is not in idel state (no traffic).
+			//suggestion by Victor.
+			if(pbtpriv->BT_Service!=BT_Idle)//EDCA_VI_PARAM modify
+			{
+			
+				rtw_write16(Adapter, 0x504, 0x0ccc);
+				rtw_write8(Adapter, 0x506, 0x54);
+				rtw_write8(Adapter, 0x507, 0x54);
+			
+			}
+			else
+			{
+				rtw_write8(Adapter, 0x506, 0x00);
+				rtw_write8(Adapter, 0x507, 0x00);			
+			}
+				
+			rtw_write8(Adapter, 0x4fd, BT_State);
+			DBG_8192C("BT_SCO set 0x4fd to %x\n", BT_State);
+			return _TRUE;
+		}
+	}
+
+	return _FALSE;
+
+}
+
+static BOOLEAN
+BT_WifiConnectChange(
+	IN	PADAPTER	Adapter
+	)
+{
+	struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
+//	PMGNT_INFO		pMgntInfo = &Adapter->MgntInfo;
+	static BOOLEAN	bMediaConnect = _FALSE;
+
+	//if(!pMgntInfo->bMediaConnect || MgntRoamingInProgress(pMgntInfo))
+	if(check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE)	
+	{
+		bMediaConnect = _FALSE;
+	}
+	else
+	{
+		if(!bMediaConnect)
+		{
+			bMediaConnect = _TRUE;
+			return _TRUE;
+		}
+		bMediaConnect = _TRUE;
+	}
+
+	return _FALSE;
+}
+
+#define BT_RSSI_STATE_NORMAL_POWER	BIT0
+#define BT_RSSI_STATE_AMDPU_OFF		BIT1
+#define BT_RSSI_STATE_SPECIAL_LOW	BIT2
+#define BT_RSSI_STATE_BG_EDCA_LOW	BIT3
+
+static s32 GET_UNDECORATED_AVERAGE_RSSI(PADAPTER	Adapter)	
+{
+	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
+	struct mlme_priv	*pmlmepriv = &(Adapter->mlmepriv);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	s32 	average_rssi;
+	
+	if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE|WIFI_AP_STATE))
+	{	
+		average_rssi = 	pdmpriv->EntryMinUndecoratedSmoothedPWDB;	
+	}
+	else
+	{
+		average_rssi = 	pdmpriv->UndecoratedSmoothedPWDB;
+	}
+	return average_rssi;
+}
+
+static u8 BT_RssiStateChange(
+	IN	PADAPTER	Adapter
+	)
+{
+	PHAL_DATA_TYPE		pHalData = GET_HAL_DATA(Adapter);
+	struct mlme_priv		*pmlmepriv = &(Adapter->mlmepriv);
+	struct btcoexist_priv	*pbtpriv = &(pHalData->bt_coexist);
+	struct dm_priv		*pdmpriv = &pHalData->dmpriv;
+	//PMGNT_INFO		pMgntInfo = &Adapter->MgntInfo;
+	s32			UndecoratedSmoothedPWDB;
+	u8			CurrBtRssiState = 0x00;
+
+
+
+
+	//if(pMgntInfo->bMediaConnect)	// Default port
+	if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)	
+	{
+		UndecoratedSmoothedPWDB = GET_UNDECORATED_AVERAGE_RSSI(Adapter);
+	}
+	else // associated entry pwdb
+	{
+		if(pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)
+			UndecoratedSmoothedPWDB = 100;	// No any RSSI information. Assume to be MAX.
+		else
+			UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
+	}
+
+	// Check RSSI to determine HighPower/NormalPower state for BT coexistence.
+	if(UndecoratedSmoothedPWDB >= 67)
+		CurrBtRssiState &= (~BT_RSSI_STATE_NORMAL_POWER);
+	else if(UndecoratedSmoothedPWDB < 62)
+		CurrBtRssiState |= BT_RSSI_STATE_NORMAL_POWER;
+
+	// Check RSSI to determine AMPDU setting for BT coexistence.
+	if(UndecoratedSmoothedPWDB >= 40)
+		CurrBtRssiState &= (~BT_RSSI_STATE_AMDPU_OFF);
+	else if(UndecoratedSmoothedPWDB <= 32)
+		CurrBtRssiState |= BT_RSSI_STATE_AMDPU_OFF;
+
+	// Marked RSSI state. It will be used to determine BT coexistence setting later.
+	if(UndecoratedSmoothedPWDB < 35)
+		CurrBtRssiState |=  BT_RSSI_STATE_SPECIAL_LOW;
+	else
+		CurrBtRssiState &= (~BT_RSSI_STATE_SPECIAL_LOW);
+
+	// Check BT state related to BT_Idle in B/G mode.
+	if(UndecoratedSmoothedPWDB < 15)
+		CurrBtRssiState |=  BT_RSSI_STATE_BG_EDCA_LOW;
+	else
+		CurrBtRssiState &= (~BT_RSSI_STATE_BG_EDCA_LOW);
+	
+	if(CurrBtRssiState != pbtpriv->BtRssiState)
+	{
+		pbtpriv->BtRssiState = CurrBtRssiState;
+		return _TRUE;
+	}
+	else
+	{
+		return _FALSE;
+	}
+}
+
+static void dm_BTCoexist(PADAPTER Adapter )
+{
+	HAL_DATA_TYPE			*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv			*pdmpriv = &pHalData->dmpriv;
+	struct mlme_priv	 		*pmlmepriv = &(Adapter->mlmepriv);
+	struct mlme_ext_info		*pmlmeinfo = &Adapter->mlmeextpriv.mlmext_info;
+	struct mlme_ext_priv		*pmlmeext = &Adapter->mlmeextpriv;
+
+	struct btcoexist_priv		*pbtpriv = &(pHalData->bt_coexist);
+	//PMGNT_INFO				pMgntInfo = &Adapter->MgntInfo;
+	//PRT_HIGH_THROUGHPUT		pHTInfo = GET_HT_INFO(pMgntInfo);
+	
+	//PRX_TS_RECORD	pRxTs = NULL;
+	u8			BT_gpio_mux;
+
+	BOOLEAN		bWifiConnectChange, bBtStateChange,bRssiStateChange;
+
+	if(pbtpriv->bCOBT == _FALSE)		return;
+
+	if(!( pdmpriv->DMFlag & DYNAMIC_FUNC_BT)) return;
+	
+	if( (pbtpriv->BT_Coexist) &&(pbtpriv->BT_CoexistType == BT_CSR_BC4) && (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _FALSE)	)
+	{
+		bWifiConnectChange = BT_WifiConnectChange(Adapter);
+		bBtStateChange	= BT_BTStateChange(Adapter);
+		bRssiStateChange 	= BT_RssiStateChange(Adapter);
+		
+		DBG_8192C("bWifiConnectChange %d, bBtStateChange  %d,bRssiStateChange  %d\n",
+			bWifiConnectChange,bBtStateChange,bRssiStateChange);
+
+		// add by hpfan for debug message
+		BT_gpio_mux = rtw_read8(Adapter, REG_GPIO_MUXCFG);
+		DBG_8192C("BTCoexit Reg_0x40 (%2x)\n", BT_gpio_mux);
+
+		if( bWifiConnectChange ||bBtStateChange  ||bRssiStateChange )
+		{
+			if(pbtpriv->BT_CUR_State)
+			{
+				
+				// Do not allow receiving A-MPDU aggregation.
+				if(pbtpriv->BT_Ampdu)// 0:Disable BT control A-MPDU, 1:Enable BT control A-MPDU.
+				{
+			
+					if(pmlmeinfo->assoc_AP_vendor == ciscoAP)	
+					{
+						if(pbtpriv->BT_Service!=BT_Idle)
+						{
+							if(pmlmeinfo->bAcceptAddbaReq)
+							{
+								DBG_8192C("BT_Disallow AMPDU \n");	
+								pmlmeinfo->bAcceptAddbaReq = _FALSE;
+								send_delba(Adapter,0, get_my_bssid(&(pmlmeinfo->network)));
+							}
+						}
+						else
+						{
+							if(!pmlmeinfo->bAcceptAddbaReq)
+							{
+								DBG_8192C("BT_Allow AMPDU  RSSI >=40\n");	
+								pmlmeinfo->bAcceptAddbaReq = _TRUE;
+							}
+						}
+					}
+					else
+					{
+						if(!pmlmeinfo->bAcceptAddbaReq)
+						{
+							DBG_8192C("BT_Allow AMPDU BT Idle\n");	
+							pmlmeinfo->bAcceptAddbaReq = _TRUE;
+						}
+					}
+				}
+				
+#if 0
+				else if((pHalData->bt_coexist.BT_Service==BT_SCO) || (pHalData->bt_coexist.BT_Service==BT_Busy))
+				{				
+					if(pHalData->bt_coexist.BtRssiState & BT_RSSI_STATE_AMDPU_OFF)
+					{
+						if(pMgntInfo->bBT_Ampdu && pHTInfo->bAcceptAddbaReq)
+						{
+							RTPRINT(FBT, BT_TRACE, ("BT_Disallow AMPDU RSSI <=32\n"));	
+							pHTInfo->bAcceptAddbaReq = FALSE;
+							if(GetTs(Adapter, (PTS_COMMON_INFO*)(&pRxTs), pMgntInfo->Bssid, 0, RX_DIR, FALSE))
+								TsInitDelBA(Adapter, (PTS_COMMON_INFO)pRxTs, RX_DIR);
+						}
+					}
+					else
+					{
+						if(pMgntInfo->bBT_Ampdu && !pHTInfo->bAcceptAddbaReq)
+						{
+							RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU  RSSI >=40\n"));	
+							pHTInfo->bAcceptAddbaReq = TRUE;
+						}
+					}
+				}
+				else
+				{
+					if(pMgntInfo->bBT_Ampdu && !pHTInfo->bAcceptAddbaReq)
+					{
+						RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU BT not in SCO or BUSY\n"));	
+						pHTInfo->bAcceptAddbaReq = TRUE;
+					}
+				}
+#endif
+
+				if(pbtpriv->BT_Ant_isolation)
+				{			
+					DBG_8192C("BT_IsolationLow\n");
+
+// 20100427 Joseph: Do not adjust Rate adaptive for BT coexist suggested by SD3.
+#if 0
+					RTPRINT(FBT, BT_TRACE, ("BT_Update Rate table\n"));
+					if(pMgntInfo->bUseRAMask)
+					{
+						// 20100407 Joseph: Fix rate adaptive modification for BT coexist.
+						// This fix is not complete yet. It shall also consider VWifi and Adhoc case,
+						// which connect with multiple STAs.
+						Adapter->HalFunc.UpdateHalRAMaskHandler(
+												Adapter,
+												FALSE,
+												0,
+												NULL,
+												NULL,
+												pMgntInfo->RateAdaptive.RATRState,
+												RAMask_Normal);
+					}
+					else
+					{
+						Adapter->HalFunc.UpdateHalRATRTableHandler(
+									Adapter, 
+									&pMgntInfo->dot11OperationalRateSet,
+									pMgntInfo->dot11HTOperationalRateSet,NULL);
+					}
+#endif
+
+					// 20100415 Joseph: Modify BT coexist mechanism suggested by Yaying.
+					// Now we only enable HW BT coexist when BT in "Busy" state.
+					if(1)//pMgntInfo->LinkDetectInfo.NumRecvDataInPeriod >= 20)
+					{
+						if((pmlmeinfo->assoc_AP_vendor == ciscoAP)	&&
+							pbtpriv->BT_Service==BT_OtherAction)
+						{
+							DBG_8192C("BT_Turn ON Coexist\n");
+							rtw_write8(Adapter, REG_GPIO_MUXCFG, 0xa0);	
+						}
+						else
+						{
+							if((pbtpriv->BT_Service==BT_Busy) &&
+								(pbtpriv->BtRssiState & BT_RSSI_STATE_NORMAL_POWER))
+							{
+								DBG_8192C("BT_Turn ON Coexist\n");
+								rtw_write8(Adapter, REG_GPIO_MUXCFG, 0xa0);
+							}
+							else if((pbtpriv->BT_Service==BT_OtherAction) &&
+									(pbtpriv->BtRssiState & BT_RSSI_STATE_SPECIAL_LOW))
+							{
+								DBG_8192C("BT_Turn ON Coexist\n");
+								rtw_write8(Adapter, REG_GPIO_MUXCFG, 0xa0);	
+							}
+							else if(pbtpriv->BT_Service==BT_PAN)
+							{
+								DBG_8192C("BT_Turn ON Coexist\n");
+								rtw_write8(Adapter, REG_GPIO_MUXCFG, 0x00);	
+							}
+							else
+							{
+								DBG_8192C("BT_Turn OFF Coexist\n");
+								rtw_write8(Adapter, REG_GPIO_MUXCFG, 0x00);
+							}
+						}
+					}
+					else
+					{
+						DBG_8192C("BT: There is no Wifi traffic!! Turn off Coexist\n");
+						rtw_write8(Adapter, REG_GPIO_MUXCFG, 0x00);
+					}
+
+					if(1)//pMgntInfo->LinkDetectInfo.NumRecvDataInPeriod >= 20)
+					{
+						if(pbtpriv->BT_Service==BT_PAN)
+						{
+							DBG_8192C("BT_Turn ON Coexist(Reg0x44 = 0x10100)\n");
+							rtw_write32(Adapter, REG_GPIO_PIN_CTRL, 0x10100);	
+						}
+						else
+						{
+							DBG_8192C("BT_Turn OFF Coexist(Reg0x44 = 0x0)\n");
+							rtw_write32(Adapter, REG_GPIO_PIN_CTRL, 0x0);	
+						}
+					}
+					else
+					{
+						DBG_8192C("BT: There is no Wifi traffic!! Turn off Coexist(Reg0x44 = 0x0)\n");
+						rtw_write32(Adapter, REG_GPIO_PIN_CTRL, 0x0);	
+					}
+
+					// 20100430 Joseph: Integrate the BT coexistence EDCA tuning here.
+					if(pbtpriv->BtRssiState & BT_RSSI_STATE_NORMAL_POWER)
+					{
+						if(pbtpriv->BT_Service==BT_OtherBusy)
+						{
+							//pbtpriv->BtEdcaUL = 0x5ea72b;
+							//pbtpriv->BtEdcaDL = 0x5ea72b;
+							pbtpriv->BT_EDCA[UP_LINK] = 0x5ea72b;
+							pbtpriv->BT_EDCA[DOWN_LINK] = 0x5ea72b;							
+							
+							DBG_8192C("BT in BT_OtherBusy state Tx (%d) >350 parameter(0x%x) = 0x%x\n", pbtpriv->Ratio_Tx ,REG_EDCA_BE_PARAM, 0x5ea72b);
+						}
+						else if(pbtpriv->BT_Service==BT_Busy)
+						{
+							//pbtpriv->BtEdcaUL = 0x5eb82f;
+							//pbtpriv->BtEdcaDL = 0x5eb82f;
+
+							pbtpriv->BT_EDCA[UP_LINK] = 0x5eb82f;
+							pbtpriv->BT_EDCA[DOWN_LINK] = 0x5eb82f;							
+							
+							DBG_8192C("BT in BT_Busy state parameter(0x%x) = 0x%x\n", REG_EDCA_BE_PARAM, 0x5eb82f);		
+						}
+						else if(pbtpriv->BT_Service==BT_SCO)
+						{
+							if(pbtpriv->Ratio_Tx>160)
+							{
+								//pbtpriv->BtEdcaUL = 0x5ea72f;
+								//pbtpriv->BtEdcaDL = 0x5ea72f;
+								pbtpriv->BT_EDCA[UP_LINK] = 0x5ea72f;
+								pbtpriv->BT_EDCA[DOWN_LINK] = 0x5ea72f;							
+								DBG_8192C("BT in BT_SCO state Tx (%d) >160 parameter(0x%x) = 0x%x\n",pbtpriv->Ratio_Tx, REG_EDCA_BE_PARAM, 0x5ea72f);
+							}
+							else
+							{
+								//pbtpriv->BtEdcaUL = 0x5ea32b;
+								//pbtpriv->BtEdcaDL = 0x5ea42b;
+
+								pbtpriv->BT_EDCA[UP_LINK] = 0x5ea32b;
+								pbtpriv->BT_EDCA[DOWN_LINK] = 0x5ea42b;						
+								
+								DBG_8192C("BT in BT_SCO state Tx (%d) <160 parameter(0x%x) = 0x%x\n", pbtpriv->Ratio_Tx,REG_EDCA_BE_PARAM, 0x5ea32f);
+							}									
+						}
+						else
+						{
+							// BT coexistence mechanism does not control EDCA parameter.
+							//pbtpriv->BtEdcaUL = 0;
+							//pbtpriv->BtEdcaDL = 0;
+
+							pbtpriv->BT_EDCA[UP_LINK] = 0;
+							pbtpriv->BT_EDCA[DOWN_LINK] = 0;							
+							DBG_8192C("BT in  State  %d  and parameter(0x%x) use original setting.\n",pbtpriv->BT_Service, REG_EDCA_BE_PARAM);
+						}
+
+						if((pbtpriv->BT_Service!=BT_Idle) &&
+							(pmlmeext->cur_wireless_mode  == WIRELESS_MODE_G) &&
+							(pbtpriv->BtRssiState & BT_RSSI_STATE_BG_EDCA_LOW))
+						{
+							//pbtpriv->BtEdcaUL = 0x5eb82b;
+							//pbtpriv->BtEdcaDL = 0x5eb82b;
+
+							pbtpriv->BT_EDCA[UP_LINK] = 0x5eb82b;
+							pbtpriv->BT_EDCA[DOWN_LINK] = 0x5eb82b;							
+							
+							DBG_8192C("BT set parameter(0x%x) = 0x%x\n", REG_EDCA_BE_PARAM, 0x5eb82b);		
+						}
+					}
+					else
+					{
+						// BT coexistence mechanism does not control EDCA parameter.
+						//pbtpriv->BtEdcaUL = 0;
+						//pbtpriv->BtEdcaDL = 0;
+
+						pbtpriv->BT_EDCA[UP_LINK] = 0;
+						pbtpriv->BT_EDCA[DOWN_LINK] = 0;					
+					}
+
+					// 20100415 Joseph: Set RF register 0x1E and 0x1F for BT coexist suggested by Yaying.
+					if(pbtpriv->BT_Service!=BT_Idle)
+					{
+						DBG_8192C("BT Set RfReg0x1E[7:4] = 0x%x \n", 0xf);
+						PHY_SetRFReg(Adapter, PathA, 0x1e, 0xf0, 0xf);
+						//RTPRINT(FBT, BT_TRACE, ("BT Set RfReg0x1E[7:4] = 0x%x \n", 0xf));
+						//PHY_SetRFReg(Adapter, PathA, 0x1f, 0xf0, 0xf);
+					}
+					else
+					{
+						DBG_8192C("BT Set RfReg0x1E[7:4] = 0x%x \n",pbtpriv->BtRfRegOrigin1E);
+						PHY_SetRFReg(Adapter, PathA, 0x1e, 0xf0, pbtpriv->BtRfRegOrigin1E);
+						//RTPRINT(FBT, BT_TRACE, ("BT Set RfReg0x1F[7:4] = 0x%x \n", pHalData->bt_coexist.BtRfRegOrigin1F));
+						//PHY_SetRFReg(Adapter, PathA, 0x1f, 0xf0, pHalData->bt_coexist.BtRfRegOrigin1F);
+					}	
+				}
+				else
+				{
+					DBG_8192C("BT_IsolationHigh\n");
+					// Do nothing.
+				}			
+			}
+			else
+			{
+			
+				if(pbtpriv->BT_Ampdu && !pmlmeinfo->bAcceptAddbaReq)
+				{
+					DBG_8192C("BT_Allow AMPDU bt is off\n");	
+					pmlmeinfo->bAcceptAddbaReq = _TRUE;
+				}
+			
+				DBG_8192C("BT_Turn OFF Coexist bt is off \n");
+				rtw_write8(Adapter, REG_GPIO_MUXCFG, 0x00);
+
+				DBG_8192C("BT Set RfReg0x1E[7:4] = 0x%x \n", pbtpriv->BtRfRegOrigin1E);
+				PHY_SetRFReg(Adapter, PathA, 0x1e, 0xf0, pbtpriv->BtRfRegOrigin1E);
+				//RTPRINT(FBT, BT_TRACE, ("BT Set RfReg0x1F[7:4] = 0x%x \n", pHalData->bt_coexist.BtRfRegOrigin1F));
+				//PHY_SetRFReg(Adapter, PathA, 0x1f, 0xf0, pHalData->bt_coexist.BtRfRegOrigin1F);
+
+				// BT coexistence mechanism does not control EDCA parameter since BT is disabled.
+				//pbtpriv->BtEdcaUL = 0;
+				//pbtpriv->BtEdcaDL = 0;
+				pbtpriv->BT_EDCA[UP_LINK] = 0;
+				pbtpriv->BT_EDCA[DOWN_LINK] = 0;				
+				
+
+// 20100427 Joseph: Do not adjust Rate adaptive for BT coexist suggested by SD3.
+#if 0
+				RTPRINT(FBT, BT_TRACE, ("BT_Update Rate table\n"));
+				if(pMgntInfo->bUseRAMask)
+				{
+					// 20100407 Joseph: Fix rate adaptive modification for BT coexist.
+					// This fix is not complete yet. It shall also consider VWifi and Adhoc case,
+					// which connect with multiple STAs.
+					Adapter->HalFunc.UpdateHalRAMaskHandler(
+											Adapter,
+											FALSE,
+											0,
+											NULL,
+											NULL,
+											pMgntInfo->RateAdaptive.RATRState,
+											RAMask_Normal);
+				}
+				else
+				{
+					Adapter->HalFunc.UpdateHalRATRTableHandler(
+								Adapter, 
+								&pMgntInfo->dot11OperationalRateSet,
+								pMgntInfo->dot11HTOperationalRateSet,NULL);
+				}
+#endif
+			}
+		}
+	}
+}
+
+static void dm_InitBtCoexistDM(	PADAPTER	Adapter)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	struct btcoexist_priv	*pbtpriv = &(pHalData->bt_coexist);
+
+	if( !pbtpriv->BT_Coexist ) return;
+	
+	pbtpriv->BtRfRegOrigin1E = (u8)PHY_QueryRFReg(Adapter, PathA, 0x1e, 0xf0);
+	pbtpriv->BtRfRegOrigin1F = (u8)PHY_QueryRFReg(Adapter, PathA, 0x1f, 0xf0);
+}
+
+void rtl8192c_set_dm_bt_coexist(_adapter *padapter, u8 bStart)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct btcoexist_priv	*pbtpriv = &(pHalData->bt_coexist);
+	
+	pbtpriv->bCOBT = bStart;
+	send_delba(padapter,0, get_my_bssid(&(pmlmeinfo->network)));
+	send_delba(padapter,1, get_my_bssid(&(pmlmeinfo->network)));
+	
+}
+
+void rtl8192c_issue_delete_ba(_adapter *padapter, u8 dir)
+{
+	struct mlme_ext_info		*pmlmeinfo = &padapter->mlmeextpriv.mlmext_info;
+	DBG_8192C("issue_delete_ba : %s...\n",(dir==0)?"RX_DIR":"TX_DIR");
+	send_delba(padapter,dir, get_my_bssid(&(pmlmeinfo->network)));
+}
+
+#endif
+
+#if 0//def CONFIG_PCI_HCI
+
+BOOLEAN
+BT_BTStateChange(
+	IN	PADAPTER	Adapter
+	)
+{
+	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
+	PMGNT_INFO		pMgntInfo = &Adapter->MgntInfo;
+	
+	u4Byte 			temp, Polling, Ratio_Tx, Ratio_PRI;
+	u4Byte 			BT_Tx, BT_PRI;
+	u1Byte			BT_State;
+	static u1Byte		ServiceTypeCnt = 0;
+	u1Byte			CurServiceType;
+	static u1Byte		LastServiceType = BT_Idle;
+
+	if(!pMgntInfo->bMediaConnect)
+		return FALSE;
+	
+	BT_State = PlatformEFIORead1Byte(Adapter, 0x4fd);
+/*
+	temp = PlatformEFIORead4Byte(Adapter, 0x488);
+	BT_Tx = (u2Byte)(((temp<<8)&0xff00)+((temp>>8)&0xff));
+	BT_PRI = (u2Byte)(((temp>>8)&0xff00)+((temp>>24)&0xff));
+
+	temp = PlatformEFIORead4Byte(Adapter, 0x48c);
+	Polling = ((temp<<8)&0xff000000) + ((temp>>8)&0x00ff0000) + 
+			((temp<<8)&0x0000ff00) + ((temp>>8)&0x000000ff);
+	
+*/
+	BT_Tx = PlatformEFIORead4Byte(Adapter, 0x488);
+	
+	RTPRINT(FBT, BT_TRACE, ("Ratio 0x488  =%x\n", BT_Tx));
+	BT_Tx =BT_Tx & 0x00ffffff;
+	//RTPRINT(FBT, BT_TRACE, ("Ratio BT_Tx  =%x\n", BT_Tx));
+
+	BT_PRI = PlatformEFIORead4Byte(Adapter, 0x48c);
+	
+	RTPRINT(FBT, BT_TRACE, ("Ratio Ratio 0x48c  =%x\n", BT_PRI));
+	BT_PRI =BT_PRI & 0x00ffffff;
+	//RTPRINT(FBT, BT_TRACE, ("Ratio BT_PRI  =%x\n", BT_PRI));
+
+
+	Polling = PlatformEFIORead4Byte(Adapter, 0x490);
+	//RTPRINT(FBT, BT_TRACE, ("Ratio 0x490  =%x\n", Polling));
+
+
+	if(BT_Tx==0xffffffff && BT_PRI==0xffffffff && Polling==0xffffffffff && BT_State==0xff)
+		return FALSE;
+
+	BT_State &= BIT0;
+
+	if(BT_State != pHalData->bt_coexist.BT_CUR_State)
+	{
+		pHalData->bt_coexist.BT_CUR_State = BT_State;
+	
+		if(pMgntInfo->bRegBT_Sco == 3)
+		{
+			ServiceTypeCnt = 0;
+		
+			pHalData->bt_coexist.BT_Service = BT_Idle;
+
+			RTPRINT(FBT, BT_TRACE, ("BT_%s\n", BT_State?"ON":"OFF"));
+
+			BT_State = BT_State | 
+					((pHalData->bt_coexist.BT_Ant_isolation==1)?0:BIT1) |BIT2;
+
+			PlatformEFIOWrite1Byte(Adapter, 0x4fd, BT_State);
+			RTPRINT(FBT, BT_TRACE, ("BT set 0x4fd to %x\n", BT_State));
+		}
+		
+		return TRUE;
+	}
+	RTPRINT(FBT, BT_TRACE, ("bRegBT_Sco   %d\n", pMgntInfo->bRegBT_Sco));
+
+	Ratio_Tx = BT_Tx*1000/Polling;
+	Ratio_PRI = BT_PRI*1000/Polling;
+
+	pHalData->bt_coexist.Ratio_Tx=Ratio_Tx;
+	pHalData->bt_coexist.Ratio_PRI=Ratio_PRI;
+	
+	RTPRINT(FBT, BT_TRACE, ("Ratio_Tx=%d\n", Ratio_Tx));
+	RTPRINT(FBT, BT_TRACE, ("Ratio_PRI=%d\n", Ratio_PRI));
+
+	
+	if(BT_State && pMgntInfo->bRegBT_Sco==3)
+	{
+		RTPRINT(FBT, BT_TRACE, ("bRegBT_Sco  ==3 Follow Counter\n"));
+//		if(BT_Tx==0xffff && BT_PRI==0xffff && Polling==0xffffffff)
+//		{
+//			ServiceTypeCnt = 0;
+//			return FALSE;
+//		}
+//		else
+		{
+		/*
+			Ratio_Tx = BT_Tx*1000/Polling;
+			Ratio_PRI = BT_PRI*1000/Polling;
+
+			pHalData->bt_coexist.Ratio_Tx=Ratio_Tx;
+			pHalData->bt_coexist.Ratio_PRI=Ratio_PRI;
+			
+			RTPRINT(FBT, BT_TRACE, ("Ratio_Tx=%d\n", Ratio_Tx));
+			RTPRINT(FBT, BT_TRACE, ("Ratio_PRI=%d\n", Ratio_PRI));
+
+		*/	
+			if((Ratio_Tx <= 50)  && (Ratio_PRI <= 50)) 
+			  	CurServiceType = BT_Idle;
+			else if((Ratio_PRI > 150) && (Ratio_PRI < 200))
+				CurServiceType = BT_SCO;
+			else if((Ratio_Tx >= 200)&&(Ratio_PRI >= 200))
+				CurServiceType = BT_Busy;
+			else if(Ratio_Tx >= 350)
+				CurServiceType = BT_OtherBusy;
+			else
+				CurServiceType=BT_OtherAction;
+
+		}
+/*		if(pHalData->bt_coexist.bStopCount)
+		{
+			ServiceTypeCnt=0;
+			pHalData->bt_coexist.bStopCount=FALSE;
+		}
+*/
+		if(CurServiceType == BT_OtherBusy)
+		{
+			ServiceTypeCnt=2;
+			LastServiceType=CurServiceType;
+		}
+		else if(CurServiceType == LastServiceType)
+		{
+			if(ServiceTypeCnt<3)
+				ServiceTypeCnt++;
+		}
+		else
+		{
+			ServiceTypeCnt = 0;
+			LastServiceType = CurServiceType;
+		}
+
+		if(ServiceTypeCnt==2)
+		{
+			pHalData->bt_coexist.BT_Service = LastServiceType;
+			BT_State = BT_State | 
+					((pHalData->bt_coexist.BT_Ant_isolation==1)?0:BIT1) |
+					((pHalData->bt_coexist.BT_Service==BT_SCO)?0:BIT2);
+
+			if(pHalData->bt_coexist.BT_Service==BT_Busy)
+				BT_State&= ~(BIT2);
+
+			if(pHalData->bt_coexist.BT_Service==BT_SCO)
+			{
+				RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to  ==> BT_SCO\n"));
+			}
+			else if(pHalData->bt_coexist.BT_Service==BT_Idle)
+			{
+				RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to  ==> BT_Idle\n"));
+			}
+			else if(pHalData->bt_coexist.BT_Service==BT_OtherAction)
+			{
+				RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to  ==> BT_OtherAction\n"));
+			}
+			else if(pHalData->bt_coexist.BT_Service==BT_Busy)
+			{
+				RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to  ==> BT_Busy\n"));
+			}
+			else
+			{
+				RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to ==> BT_OtherBusy\n"));
+			}
+				
+			//Add interrupt migration when bt is not in idel state (no traffic).
+			//suggestion by Victor.
+			if(pHalData->bt_coexist.BT_Service!=BT_Idle)
+			{
+			
+				PlatformEFIOWrite2Byte(Adapter, 0x504, 0x0ccc);
+				PlatformEFIOWrite1Byte(Adapter, 0x506, 0x54);
+				PlatformEFIOWrite1Byte(Adapter, 0x507, 0x54);
+			
+			}
+			else
+			{
+				PlatformEFIOWrite1Byte(Adapter, 0x506, 0x00);
+				PlatformEFIOWrite1Byte(Adapter, 0x507, 0x00);			
+			}
+				
+			PlatformEFIOWrite1Byte(Adapter, 0x4fd, BT_State);
+			RTPRINT(FBT, BT_TRACE, ("BT_SCO set 0x4fd to %x\n", BT_State));
+			return TRUE;
+		}
+	}
+
+	return FALSE;
+
+}
+
+BOOLEAN
+BT_WifiConnectChange(
+	IN	PADAPTER	Adapter
+	)
+{
+	PMGNT_INFO		pMgntInfo = &Adapter->MgntInfo;
+	static BOOLEAN	bMediaConnect = FALSE;
+
+	if(!pMgntInfo->bMediaConnect || MgntRoamingInProgress(pMgntInfo))
+	{
+		bMediaConnect = FALSE;
+	}
+	else
+	{
+		if(!bMediaConnect)
+		{
+			bMediaConnect = TRUE;
+			return TRUE;
+		}
+		bMediaConnect = TRUE;
+	}
+
+	return FALSE;
+}
+
+BOOLEAN
+BT_RSSIChangeWithAMPDU(
+	IN	PADAPTER	Adapter
+	)
+{
+	PMGNT_INFO		pMgntInfo = &Adapter->MgntInfo;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	if(!Adapter->pNdisCommon->bRegBT_Ampdu || !Adapter->pNdisCommon->bRegAcceptAddbaReq)
+		return FALSE;
+
+	RTPRINT(FBT, BT_TRACE, ("RSSI is %d\n",pHalData->UndecoratedSmoothedPWDB));
+	
+	if((pHalData->UndecoratedSmoothedPWDB<=32) && pMgntInfo->pHTInfo->bAcceptAddbaReq)
+	{
+		RTPRINT(FBT, BT_TRACE, ("BT_Disallow AMPDU RSSI <=32  Need change\n"));				
+		return TRUE;
+
+	}
+	else if((pHalData->UndecoratedSmoothedPWDB>=40) && !pMgntInfo->pHTInfo->bAcceptAddbaReq )
+	{
+		RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU RSSI >=40, Need change\n"));
+		return TRUE;
+	}
+	else 
+		return FALSE;
+
+}
+
+
+VOID
+dm_BTCoexist(
+	IN	PADAPTER	Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	PMGNT_INFO		pMgntInfo = &Adapter->MgntInfo;
+	static u1Byte		LastTxPowerLvl = 0xff;
+	PRX_TS_RECORD	pRxTs = NULL;
+
+	BOOLEAN			bWifiConnectChange, bBtStateChange,bRSSIChangeWithAMPDU;
+
+	if( (pHalData->bt_coexist.BluetoothCoexist) &&
+		(pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4) && 
+		(!ACTING_AS_AP(Adapter))	)
+	{
+		bWifiConnectChange = BT_WifiConnectChange(Adapter);
+		bBtStateChange = BT_BTStateChange(Adapter);
+		bRSSIChangeWithAMPDU = BT_RSSIChangeWithAMPDU(Adapter);
+		RTPRINT(FBT, BT_TRACE, ("bWifiConnectChange %d, bBtStateChange  %d,LastTxPowerLvl  %x,  DynamicTxHighPowerLvl  %x\n",
+			bWifiConnectChange,bBtStateChange,LastTxPowerLvl,pHalData->DynamicTxHighPowerLvl));
+		if( bWifiConnectChange ||bBtStateChange  ||
+			(LastTxPowerLvl != pHalData->DynamicTxHighPowerLvl)	||bRSSIChangeWithAMPDU)
+		{
+			LastTxPowerLvl = pHalData->DynamicTxHighPowerLvl;
+
+			if(pHalData->bt_coexist.BT_CUR_State)
+			{
+				// Do not allow receiving A-MPDU aggregation.
+				if((pHalData->bt_coexist.BT_Service==BT_SCO) || (pHalData->bt_coexist.BT_Service==BT_Busy))
+				{
+					if(pHalData->UndecoratedSmoothedPWDB<=32)
+					{
+						if(Adapter->pNdisCommon->bRegBT_Ampdu && Adapter->pNdisCommon->bRegAcceptAddbaReq)
+						{
+							RTPRINT(FBT, BT_TRACE, ("BT_Disallow AMPDU RSSI <=32\n"));	
+							pMgntInfo->pHTInfo->bAcceptAddbaReq = FALSE;
+							if(GetTs(Adapter, (PTS_COMMON_INFO*)(&pRxTs), pMgntInfo->Bssid, 0, RX_DIR, FALSE))
+								TsInitDelBA(Adapter, (PTS_COMMON_INFO)pRxTs, RX_DIR);
+						}
+					}
+					else if(pHalData->UndecoratedSmoothedPWDB>=40)
+					{
+						if(Adapter->pNdisCommon->bRegBT_Ampdu && Adapter->pNdisCommon->bRegAcceptAddbaReq)
+						{
+							RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU  RSSI >=40\n"));	
+							pMgntInfo->pHTInfo->bAcceptAddbaReq = TRUE;
+						}
+					}
+				}
+				else
+				{
+					if(Adapter->pNdisCommon->bRegBT_Ampdu && Adapter->pNdisCommon->bRegAcceptAddbaReq)
+					{
+						RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU BT not in SCO or BUSY\n"));	
+						pMgntInfo->pHTInfo->bAcceptAddbaReq = TRUE;
+					}
+				}
+
+				if(pHalData->bt_coexist.BT_Ant_isolation)
+				{			
+					RTPRINT(FBT, BT_TRACE, ("BT_IsolationLow\n"));
+					RTPRINT(FBT, BT_TRACE, ("BT_Update Rate table\n"));
+					Adapter->HalFunc.UpdateHalRATRTableHandler(
+								Adapter, 
+								&pMgntInfo->dot11OperationalRateSet,
+								pMgntInfo->dot11HTOperationalRateSet,NULL);
+					
+					if(pHalData->bt_coexist.BT_Service==BT_SCO)
+					{
+
+						RTPRINT(FBT, BT_TRACE, ("BT_Turn OFF Coexist with SCO \n"));
+						PlatformEFIOWrite1Byte(Adapter, REG_GPIO_MUXCFG, 0x14);					
+					}
+					else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal)
+					{
+						RTPRINT(FBT, BT_TRACE, ("BT_Turn ON Coexist\n"));
+						PlatformEFIOWrite1Byte(Adapter, REG_GPIO_MUXCFG, 0xb4);
+					}
+					else
+					{
+						RTPRINT(FBT, BT_TRACE, ("BT_Turn OFF Coexist\n"));
+						PlatformEFIOWrite1Byte(Adapter, REG_GPIO_MUXCFG, 0x14);
+					}
+				}
+				else
+				{
+					RTPRINT(FBT, BT_TRACE, ("BT_IsolationHigh\n"));
+					// Do nothing.
+				}
+			}
+			else
+			{
+				if(Adapter->pNdisCommon->bRegBT_Ampdu && Adapter->pNdisCommon->bRegAcceptAddbaReq)
+				{
+					RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU bt is off\n"));	
+					pMgntInfo->pHTInfo->bAcceptAddbaReq = TRUE;
+				}
+
+				RTPRINT(FBT, BT_TRACE, ("BT_Turn OFF Coexist bt is off \n"));
+				PlatformEFIOWrite1Byte(Adapter, REG_GPIO_MUXCFG, 0x14);
+
+				RTPRINT(FBT, BT_TRACE, ("BT_Update Rate table\n"));
+				Adapter->HalFunc.UpdateHalRATRTableHandler(
+							Adapter, 
+							&pMgntInfo->dot11OperationalRateSet,
+							pMgntInfo->dot11HTOperationalRateSet,NULL);
+			}
+		}
+	}
+}
+#endif
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	dm_CheckRfCtrlGPIO()
+ *
+ * Overview:	Copy 8187B template for 9xseries.
+ *
+ * Input:		NONE
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	01/10/2008	MHC		Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+static VOID
+dm_CheckRfCtrlGPIO(
+	IN	PADAPTER	Adapter
+	)
+{
+#if 0
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+#if defined (CONFIG_USB_HCI) || defined (CONFIG_SDIO_HCI)
+	#ifdef CONFIG_USB_HCI
+		// 2010/08/12 MH Add for CU selective suspend.
+		PRT_USB_DEVICE		pDevice = GET_RT_USB_DEVICE(Adapter);
+	#else
+		PRT_SDIO_DEVICE	pDevice = GET_RT_SDIO_DEVICE(Adapter);
+	#endif
+#endif
+
+	if(!Adapter->MgntInfo.PowerSaveControl.bGpioRfSw)
+		return;
+
+	RTPRINT(FPWR, PWRHW, ("dm_CheckRfCtrlGPIO \n"));
+
+#if defined (CONFIG_USB_HCI) || defined (CONFIG_SDIO_HCI)
+	// Walk around for DTM test, we will not enable HW - radio on/off because r/w
+	// page 1 register before Lextra bus is enabled cause system fails when resuming
+	// from S4. 20080218, Emily
+	if(Adapter->bInHctTest)
+		return;
+
+//#if ((HAL_CODE_BASE == RTL8192_S) )
+	//Adapter->HalFunc.GPIOChangeRFHandler(Adapter, GPIORF_POLLING);
+//#else
+	// 2010/07/27 MH Only Minicard and support selective suspend, we can not turn off all MAC power to 
+	// stop 8051. For dongle and minicard, we both support selective suspend mode.
+	//if(pDevice->RegUsbSS && Adapter->HalFunc.GetInterfaceSelectionHandler(Adapter) == INTF_SEL2_MINICARD)
+
+	//
+	// 2010/08/12 MH We support severl power consumption combination as below.
+	//
+	// Power consumption combination  
+	//	SS Enable: (LPS disable + IPS + SW/HW radio off)
+	//	1. Dongle + PDN  (support HW radio off)
+	//	2. Dongle + Normal  (No HW radio off)
+	//	3. MiniCard + PDN (support HW radio off)
+	//	4. MiniCard + Normal (support HW radio off)
+	//
+	//	SS Disable: (LPS + IPS + SW/HW radio off)
+	//	1. Dongle + PDN  (support HW radio off)
+	//	2. Dongle + Normal  (No HW radio off)
+	//	3. MiniCard + PDN (support HW radio off)
+	//	4. MiniCard + Normal (support HW radio off)
+	//
+	//	For Power down module detection. We need to read power register no matter
+	//	dongle or minicard, we will add the item is the detection method.
+	//
+	//
+	//vivi add du case
+	if ((IS_HARDWARE_TYPE_8192CU(Adapter)||IS_HARDWARE_TYPE_8192DU(Adapter))
+		&& pDevice->RegUsbSS)
+	{
+		RT_TRACE(COMP_RF, DBG_LOUD, ("USB SS Enabled\n"));
+		if (SUPPORT_HW_RADIO_DETECT(Adapter))
+		{	// Support HW radio detection
+			RT_TRACE(COMP_RF, DBG_LOUD, ("USB Card Type 2/3/4 support GPIO Detect\n"));
+			GpioDetectTimerStart(Adapter);
+		}
+		else
+		{	// Dongle does not support HW radio detection.?? In the fufure??
+			RT_TRACE(COMP_RF, DBG_LOUD, ("USB DONGLE Non-GPIO-Detect\n"));				
+		}			
+	}
+	else if (IS_HARDWARE_TYPE_8192CU(Adapter) ||
+		IS_HARDWARE_TYPE_8723U(Adapter)||
+		IS_HARDWARE_TYPE_8192DU(Adapter) ||
+		IS_HARDWARE_TYPE_8723S(Adapter))
+	{	// Not support Selective suspend 
+		RT_TRACE(COMP_RF, DBG_LOUD, ("USB SS Disable\n"));
+		if (SUPPORT_HW_RADIO_DETECT(Adapter))
+		{
+			RT_TRACE(COMP_RF, DBG_LOUD, ("USB Card Type 2/3/4 support GPIO Detect\n"));
+			PlatformScheduleWorkItem( &(pHalData->GPIOChangeRFWorkItem) );
+		}
+		else
+		{
+			RT_TRACE(COMP_RF, DBG_LOUD, ("USB DONGLE Non-GPIO-Detect\n"));
+		}
+	}
+	else
+	{	// CE only support noemal HW radio detection now. Support timers GPIO detection in SE/CU.		
+		PlatformScheduleWorkItem( &(pHalData->GPIOChangeRFWorkItem) );
+	}
+//#endif
+#else if defined CONFIG_PCI_HCI
+	if(Adapter->bInHctTest)
+		return;
+
+	// CE only support noemal HW radio detection now. We support timers GPIO detection in SE.		
+	PlatformScheduleWorkItem( &(pHalData->GPIOChangeRFWorkItem) );
+#endif
+#endif
+}	/* dm_CheckRfCtrlGPIO */
+
+static VOID
+dm_InitRateAdaptiveMask(
+	IN	PADAPTER	Adapter	
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	PRATE_ADAPTIVE	pRA = (PRATE_ADAPTIVE)&pdmpriv->RateAdaptive;
+	
+	pRA->RATRState = DM_RATR_STA_INIT;
+	pRA->PreRATRState = DM_RATR_STA_INIT;
+
+	if (pdmpriv->DM_Type == DM_Type_ByDriver)
+		pdmpriv->bUseRAMask = _TRUE;
+	else
+		pdmpriv->bUseRAMask = _FALSE;	
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:	dm_RefreshRateAdaptiveMask()
+ *
+ * Overview:	Update rate table mask according to rssi
+ *
+ * Input:		NONE
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	05/27/2009	hpfan	Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+static VOID
+dm_RefreshRateAdaptiveMask(	IN	PADAPTER	pAdapter)
+{
+#if 0
+	PADAPTER 				pTargetAdapter;
+	HAL_DATA_TYPE			*pHalData = GET_HAL_DATA(pAdapter);
+	PMGNT_INFO				pMgntInfo = &(ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, TRUE)->MgntInfo);
+	PRATE_ADAPTIVE			pRA = (PRATE_ADAPTIVE)&pMgntInfo->RateAdaptive;
+	u4Byte					LowRSSIThreshForRA = 0, HighRSSIThreshForRA = 0;
+
+	if(pAdapter->bDriverStopped)
+	{
+		RT_TRACE(COMP_RATR, DBG_TRACE, ("<---- dm_RefreshRateAdaptiveMask(): driver is going to unload\n"));
+		return;
+	}
+
+	if(!pMgntInfo->bUseRAMask)
+	{
+		RT_TRACE(COMP_RATR, DBG_LOUD, ("<---- dm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n"));
+		return;
+	}
+
+	// if default port is connected, update RA table for default port (infrastructure mode only)
+	if(pAdapter->MgntInfo.mAssoc && (!ACTING_AS_AP(pAdapter)))
+	{
+		
+		// decide rastate according to rssi
+		switch (pRA->PreRATRState)
+		{
+			case DM_RATR_STA_HIGH:
+				HighRSSIThreshForRA = 50;
+				LowRSSIThreshForRA = 20;
+				break;
+			
+			case DM_RATR_STA_MIDDLE:
+				HighRSSIThreshForRA = 55;
+				LowRSSIThreshForRA = 20;
+				break;
+			
+			case DM_RATR_STA_LOW:
+				HighRSSIThreshForRA = 50;
+				LowRSSIThreshForRA = 25;
+				break;
+
+			default:
+				HighRSSIThreshForRA = 50;
+				LowRSSIThreshForRA = 20;
+				break;
+		}
+
+		if(pHalData->UndecoratedSmoothedPWDB > (s4Byte)HighRSSIThreshForRA)
+			pRA->RATRState = DM_RATR_STA_HIGH;
+		else if(pHalData->UndecoratedSmoothedPWDB > (s4Byte)LowRSSIThreshForRA)
+			pRA->RATRState = DM_RATR_STA_MIDDLE;
+		else
+			pRA->RATRState = DM_RATR_STA_LOW;
+
+		if(pRA->PreRATRState != pRA->RATRState)
+		{
+			RT_PRINT_ADDR(COMP_RATR, DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid);
+			RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI = %d\n", pHalData->UndecoratedSmoothedPWDB));
+			RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI_LEVEL = %d\n", pRA->RATRState));
+			RT_TRACE(COMP_RATR, DBG_LOUD, ("PreState = %d, CurState = %d\n", pRA->PreRATRState, pRA->RATRState));
+			pAdapter->HalFunc.UpdateHalRAMaskHandler(
+									pAdapter,
+									FALSE,
+									0,
+									NULL,
+									NULL,
+									pRA->RATRState);
+			pRA->PreRATRState = pRA->RATRState;
+		}
+	}
+
+	//
+	// The following part configure AP/VWifi/IBSS rate adaptive mask.
+	//
+	if(ACTING_AS_AP(pAdapter) || ACTING_AS_IBSS(pAdapter))
+	{
+		pTargetAdapter = pAdapter;
+	}
+	else
+	{
+		pTargetAdapter = ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, FALSE);
+		if(!ACTING_AS_AP(pTargetAdapter))
+			pTargetAdapter = NULL;
+	}
+
+	// if extension port (softap) is started, updaet RA table for more than one clients associate
+	if(pTargetAdapter != NULL)
+	{
+		int	i;
+		PRT_WLAN_STA	pEntry;
+		PRATE_ADAPTIVE     pEntryRA;
+
+		for(i = 0; i < ASSOCIATE_ENTRY_NUM; i++)
+		{
+			if(	pTargetAdapter->MgntInfo.AsocEntry[i].bUsed && pTargetAdapter->MgntInfo.AsocEntry[i].bAssociated)
+			{
+				pEntry = pTargetAdapter->MgntInfo.AsocEntry+i;
+				pEntryRA = &pEntry->RateAdaptive;
+
+				switch (pEntryRA->PreRATRState)
+				{
+					case DM_RATR_STA_HIGH:
+					{
+						HighRSSIThreshForRA = 50;
+						LowRSSIThreshForRA = 20;
+					}
+					break;
+					
+					case DM_RATR_STA_MIDDLE:
+					{
+						HighRSSIThreshForRA = 55;
+						LowRSSIThreshForRA = 20;
+					}
+					break;
+					
+					case DM_RATR_STA_LOW:
+					{
+						HighRSSIThreshForRA = 50;
+						LowRSSIThreshForRA = 25;
+					}
+					break;
+
+					default:
+					{
+						HighRSSIThreshForRA = 50;
+						LowRSSIThreshForRA = 20;
+					}
+				}
+
+				if(pEntry->rssi_stat.UndecoratedSmoothedPWDB > (s4Byte)HighRSSIThreshForRA)
+					pEntryRA->RATRState = DM_RATR_STA_HIGH;
+				else if(pEntry->rssi_stat.UndecoratedSmoothedPWDB > (s4Byte)LowRSSIThreshForRA)
+					pEntryRA->RATRState = DM_RATR_STA_MIDDLE;
+				else
+					pEntryRA->RATRState = DM_RATR_STA_LOW;
+
+				if(pEntryRA->PreRATRState != pEntryRA->RATRState)
+				{
+					RT_PRINT_ADDR(COMP_RATR, DBG_LOUD, ("AsocEntry addr : "), pEntry->MacAddr);
+					RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI = %d\n", pEntry->rssi_stat.UndecoratedSmoothedPWDB));
+					RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI_LEVEL = %d\n", pEntryRA->RATRState));
+					RT_TRACE(COMP_RATR, DBG_LOUD, ("PreState = %d, CurState = %d\n", pEntryRA->PreRATRState, pEntryRA->RATRState));
+					pAdapter->HalFunc.UpdateHalRAMaskHandler(
+											pTargetAdapter,
+											FALSE,
+											pEntry->AID+1,
+											pEntry->MacAddr,
+											pEntry,
+											pEntryRA->RATRState);
+					pEntryRA->PreRATRState = pEntryRA->RATRState;
+				}
+
+			}
+		}
+	}
+#endif	
+}
+
+static VOID
+dm_CheckProtection(
+	IN	PADAPTER	Adapter
+	)
+{
+#if 0
+	PMGNT_INFO		pMgntInfo = &(Adapter->MgntInfo);
+	u1Byte			CurRate, RateThreshold;
+
+	if(pMgntInfo->pHTInfo->bCurBW40MHz)
+		RateThreshold = MGN_MCS1;
+	else
+		RateThreshold = MGN_MCS3;
+
+	if(Adapter->TxStats.CurrentInitTxRate <= RateThreshold)
+	{
+		pMgntInfo->bDmDisableProtect = TRUE;
+		DbgPrint("Forced disable protect: %x\n", Adapter->TxStats.CurrentInitTxRate);
+	}
+	else
+	{
+		pMgntInfo->bDmDisableProtect = FALSE;
+		DbgPrint("Enable protect: %x\n", Adapter->TxStats.CurrentInitTxRate);
+	}
+#endif
+}
+
+static VOID
+dm_CheckStatistics(
+	IN	PADAPTER	Adapter
+	)
+{
+#if 0
+	if(!Adapter->MgntInfo.bMediaConnect)
+		return;
+
+	//2008.12.10 tynli Add for getting Current_Tx_Rate_Reg flexibly.
+	Adapter->HalFunc.GetHwRegHandler( Adapter, HW_VAR_INIT_TX_RATE, (pu1Byte)(&Adapter->TxStats.CurrentInitTxRate) );
+
+	// Calculate current Tx Rate(Successful transmited!!)
+
+	// Calculate current Rx Rate(Successful received!!)
+	
+	//for tx tx retry count
+	Adapter->HalFunc.GetHwRegHandler( Adapter, HW_VAR_RETRY_COUNT, (pu1Byte)(&Adapter->TxStats.NumTxRetryCount) );
+#endif	
+}
+
+static void dm_CheckPbcGPIO(_adapter *padapter)
+{	
+	u8	tmp1byte;
+	u8	bPbcPressed = _FALSE;
+
+	if(!padapter->registrypriv.hw_wps_pbc)
+		return;
+
+#ifdef CONFIG_USB_HCI
+	tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
+	tmp1byte |= (HAL_8192C_HW_GPIO_WPS_BIT);
+	rtw_write8(padapter, GPIO_IO_SEL, tmp1byte);	//enable GPIO[2] as output mode
+
+	tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT);
+	rtw_write8(padapter,  GPIO_IN, tmp1byte);		//reset the floating voltage level
+
+	tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
+	tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT);
+	rtw_write8(padapter, GPIO_IO_SEL, tmp1byte);	//enable GPIO[2] as input mode
+
+	tmp1byte =rtw_read8(padapter, GPIO_IN);
+	
+	if (tmp1byte == 0xff)
+		return ;
+
+	if (tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT)
+	{
+		bPbcPressed = _TRUE;
+	}
+#else
+	tmp1byte = rtw_read8(padapter, GPIO_IN);
+	//RT_TRACE(COMP_IO, DBG_TRACE, ("dm_CheckPbcGPIO - %x\n", tmp1byte));
+
+	if (tmp1byte == 0xff || padapter->init_adpt_in_progress)
+		return ;
+
+	if((tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT)==0)
+	{
+		bPbcPressed = _TRUE;
+	}
+#endif
+
+	if( _TRUE == bPbcPressed)
+	{
+		// Here we only set bPbcPressed to true
+		// After trigger PBC, the variable will be set to false		
+		DBG_8192C("CheckPbcGPIO - PBC is pressed\n");
+                
+#ifdef RTK_DMP_PLATFORM
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12))
+		kobject_uevent(&padapter->pnetdev->dev.kobj, KOBJ_NET_PBC);
+#else
+		kobject_hotplug(&padapter->pnetdev->class_dev.kobj, KOBJ_NET_PBC);
+#endif
+#else
+
+		if ( padapter->pid[0] == 0 )
+		{	//	0 is the default value and it means the application monitors the HW PBC doesn't privde its pid to driver.
+			return;
+		}
+
+#ifdef PLATFORM_LINUX
+		rtw_signal_process(padapter->pid[0], SIGUSR1);
+#endif
+#endif
+	}
+}
+
+#ifdef CONFIG_PCI_HCI
+//
+//	Description:
+//		Perform interrupt migration dynamically to reduce CPU utilization.
+//
+//	Assumption:
+//		1. Do not enable migration under WIFI test.
+//
+//	Created by Roger, 2010.03.05.
+//
+VOID
+dm_InterruptMigration(
+	IN	PADAPTER	Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct mlme_priv	*pmlmepriv = &(Adapter->mlmepriv);
+	BOOLEAN			bCurrentIntMt, bCurrentACIntDisable;
+	BOOLEAN			IntMtToSet = _FALSE; 
+	BOOLEAN			ACIntToSet = _FALSE;
+	
+	
+	// Retrieve current interrupt migration and Tx four ACs IMR settings first.
+	bCurrentIntMt = pHalData->bInterruptMigration;
+	bCurrentACIntDisable = pHalData->bDisableTxInt;
+
+	//
+	// <Roger_Notes> Currently we use busy traffic for reference instead of RxIntOK counts to prevent non-linear Rx statistics 
+	// when interrupt migration is set before. 2010.03.05.
+	// 
+	if(!Adapter->registrypriv.wifi_spec && 
+		(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) &&
+		pmlmepriv->LinkDetectInfo.bHigherBusyTraffic)
+	{			
+		IntMtToSet = _TRUE;
+
+		// To check whether we should disable Tx interrupt or not.
+		if(pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic )
+			ACIntToSet = _TRUE;				
+	}		
+	
+	//Update current settings.
+	if( bCurrentIntMt != IntMtToSet ){
+		DBG_8192C("%s(): Update interrrupt migration(%d)\n",__FUNCTION__,IntMtToSet);
+		if(IntMtToSet)
+		{
+			//
+			// <Roger_Notes> Set interrrupt migration timer and corresponging Tx/Rx counter. 
+			// timer 25ns*0xfa0=100us for 0xf packets.
+			// 2010.03.05.
+			//
+			rtw_write32(Adapter, REG_INT_MIG, 0xff000fa0);// 0x306:Rx, 0x307:Tx
+			pHalData->bInterruptMigration = IntMtToSet;
+		}
+		else
+		{
+			// Reset all interrupt migration settings.
+			rtw_write32(Adapter, REG_INT_MIG, 0);
+			pHalData->bInterruptMigration = IntMtToSet;
+		}
+	}
+
+	/*if( bCurrentACIntDisable != ACIntToSet ){
+		DBG_8192C("%s(): Update AC interrrupt(%d)\n",__FUNCTION__,ACIntToSet);
+		if(ACIntToSet) // Disable four ACs interrupts.
+		{
+			//
+			// <Roger_Notes> Disable VO, VI, BE and BK four AC interrupts to gain more efficient CPU utilization.
+			// When extremely highly Rx OK occurs, we will disable Tx interrupts.
+			// 2010.03.05.
+			//
+			UpdateInterruptMask8192CE( Adapter, 0, RT_AC_INT_MASKS );
+			pHalData->bDisableTxInt = ACIntToSet;
+		}
+		else// Enable four ACs interrupts.
+		{
+			UpdateInterruptMask8192CE( Adapter, RT_AC_INT_MASKS, 0 );
+			pHalData->bDisableTxInt = ACIntToSet;
+		}
+	}*/
+	
+}
+
+#endif
+
+//
+// Initialize GPIO setting registers
+//
+static void
+dm_InitGPIOSetting(
+	IN	PADAPTER	Adapter
+	)
+{
+	PHAL_DATA_TYPE		pHalData = GET_HAL_DATA(Adapter);
+	
+	u8	tmp1byte;
+	
+	tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG);
+	tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT);
+	
+#ifdef CONFIG_BT_COEXIST
+	// UMB-B cut bug. We need to support the modification.
+	if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID) && 
+		pHalData->bt_coexist.BT_Coexist)
+	{
+		tmp1byte |= (BIT5);	
+	}
+#endif	
+	rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte);
+
+}
+
+static void update_EDCA_param(_adapter *padapter)
+{
+	u32 	trafficIndex;
+	u32	edca_param;
+	u64	cur_tx_bytes = 0;
+	u64	cur_rx_bytes = 0;
+	PHAL_DATA_TYPE		pHalData = GET_HAL_DATA(padapter);
+	struct dm_priv		*pdmpriv = &pHalData->dmpriv;
+	struct xmit_priv		*pxmitpriv = &(padapter->xmitpriv);
+	struct recv_priv		*precvpriv = &(padapter->recvpriv);
+	struct registry_priv	*pregpriv = &padapter->registrypriv;
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	
+#ifdef CONFIG_BT_COEXIST
+	struct btcoexist_priv	*pbtpriv = &(pHalData->bt_coexist);	
+	u8	bbtchange = _FALSE;
+#endif
+	
+
+	//DBG_871X("%s\n", __FUNCTION__);
+
+	//associated AP
+	if ((pregpriv->wifi_spec == 1) || (pmlmeinfo->HT_enable == 0))
+	{
+		return;
+	}
+	
+	if (pmlmeinfo->assoc_AP_vendor >= maxAP)
+	{
+		return;
+	}
+
+	cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes;
+	cur_rx_bytes = precvpriv->rx_bytes - precvpriv->last_rx_bytes;
+
+	//traffic, TX or RX
+	if((pmlmeinfo->assoc_AP_vendor == ralinkAP)||(pmlmeinfo->assoc_AP_vendor == atherosAP))
+	{
+		if (cur_tx_bytes > (cur_rx_bytes << 2))
+		{ // Uplink TP is present.
+			trafficIndex = UP_LINK; 
+		}
+		else
+		{ // Balance TP is present.
+			trafficIndex = DOWN_LINK;
+		}
+	}
+	else
+	{
+		if (cur_rx_bytes > (cur_tx_bytes << 2))
+		{ // Downlink TP is present.
+			trafficIndex = DOWN_LINK;
+		}
+		else
+		{ // Balance TP is present.
+			trafficIndex = UP_LINK;
+		}
+	}
+
+#ifdef CONFIG_BT_COEXIST
+	if(pbtpriv->BT_Coexist)
+	{
+		if( (pbtpriv->BT_EDCA[UP_LINK]!=0) ||  (pbtpriv->BT_EDCA[DOWN_LINK]!=0))
+		{
+			bbtchange = _TRUE;
+		}
+	}
+#endif
+
+	if (pdmpriv->prv_traffic_idx != trafficIndex)
+	{
+#if 0
+#ifdef CONFIG_BT_COEXIST
+		if(_TRUE == bbtchange)		
+			rtw_write32(padapter, REG_EDCA_BE_PARAM, pbtpriv->BT_EDCA[trafficIndex]);		
+		else
+#endif
+		//adjust EDCA parameter for BE queue
+		//fire_write_MAC_cmd(padapter, EDCA_BE_PARAM, EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]);
+		rtw_write32(padapter, REG_EDCA_BE_PARAM, EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]);
+
+#else
+		if((pmlmeinfo->assoc_AP_vendor == ciscoAP) && (pmlmeext->cur_wireless_mode & WIRELESS_11_24N))
+		{
+			edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex];
+		}
+		else if((pmlmeinfo->assoc_AP_vendor == airgocapAP) &&
+			((pmlmeext->cur_wireless_mode == WIRELESS_11G) ||(pmlmeext->cur_wireless_mode == WIRELESS_11BG)))
+		{
+			edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex];
+		}
+		else
+		{
+			edca_param = EDCAParam[unknownAP][trafficIndex];
+		}
+
+#ifdef CONFIG_BT_COEXIST
+		if(_TRUE == bbtchange)		
+			edca_param = pbtpriv->BT_EDCA[trafficIndex];
+#endif
+
+		rtw_write32(padapter, REG_EDCA_BE_PARAM, edca_param);
+#endif
+		pdmpriv->prv_traffic_idx = trafficIndex;
+	}
+	
+//exit_update_EDCA_param:	
+
+	pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes;
+	precvpriv->last_rx_bytes = precvpriv->rx_bytes;
+
+	return;
+}
+
+static void dm_InitDynamicBBPowerSaving(
+	IN	PADAPTER	Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	PS_T	*pPSTable = &pdmpriv->DM_PSTable;
+
+	pPSTable->PreCCAState = CCA_MAX;
+	pPSTable->CurCCAState = CCA_MAX;
+	pPSTable->PreRFState = RF_MAX;
+	pPSTable->CurRFState = RF_MAX;
+	pPSTable->Rssi_val_min = 0;
+}
+
+static void dm_1R_CCA(
+	IN	PADAPTER	pAdapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	PS_T	*pPSTable = &pdmpriv->DM_PSTable;
+
+	if(pPSTable->Rssi_val_min != 0)
+	{
+		if(pPSTable->PreCCAState == CCA_2R)
+		{
+			if(pPSTable->Rssi_val_min >= 35)
+				pPSTable->CurCCAState = CCA_1R;
+			else
+				pPSTable->CurCCAState = CCA_2R;
+		}
+		else{
+			if(pPSTable->Rssi_val_min <= 30)
+				pPSTable->CurCCAState = CCA_2R;
+			else
+				pPSTable->CurCCAState = CCA_1R;
+		}
+	}
+	else
+		pPSTable->CurCCAState=CCA_MAX;
+
+	if(pPSTable->PreCCAState != pPSTable->CurCCAState)
+	{
+		if(pPSTable->CurCCAState == CCA_1R)
+		{
+			if(pHalData->rf_type == RF_2T2R)
+			{
+				PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable  , bMaskByte0, 0x13);
+				PHY_SetBBReg(pAdapter, 0xe70, bMaskByte3, 0x20);
+			}
+			else
+			{
+				PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable  , bMaskByte0, 0x23);
+				PHY_SetBBReg(pAdapter, 0xe70, 0x7fc00000, 0x10c); // Set RegE70[30:22] = 9b'100001100
+			}
+		}
+		else
+		{
+			PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x33);
+			PHY_SetBBReg(pAdapter,0xe70, bMaskByte3, 0x63);
+		}
+		pPSTable->PreCCAState = pPSTable->CurCCAState;
+	}
+	//DBG_8192C("dm_1R_CCA(): CCAStage=%x\n", pPSTable->CurCCAState);
+}
+
+void
+rtl8192c_dm_RF_Saving(
+	IN	PADAPTER	pAdapter,
+	IN	u8	bForceInNormal 
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	PS_T	*pPSTable = &pdmpriv->DM_PSTable;
+
+	if(pdmpriv->initialize == 0){
+		pdmpriv->rf_saving_Reg874 = (PHY_QueryBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord)&0x1CC000)>>14;
+		pdmpriv->rf_saving_RegC70 = (PHY_QueryBBReg(pAdapter, rOFDM0_AGCParameter1, bMaskDWord)&BIT3)>>3;
+		pdmpriv->rf_saving_Reg85C = (PHY_QueryBBReg(pAdapter, rFPGA0_XCD_SwitchControl, bMaskDWord)&0xFF000000)>>24;
+		pdmpriv->rf_saving_RegA74 = (PHY_QueryBBReg(pAdapter, 0xa74, bMaskDWord)&0xF000)>>12;
+		//Reg818 = PHY_QueryBBReg(pAdapter, 0x818, bMaskDWord);
+		pdmpriv->initialize = 1;
+	}
+
+	if(!bForceInNormal)
+	{
+		if(pPSTable->Rssi_val_min != 0)
+		{
+			 
+			if(pPSTable->PreRFState == RF_Normal)
+			{
+			#ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV
+				if(pPSTable->Rssi_val_min >= 50)
+			#else
+				if(pPSTable->Rssi_val_min >= 30)
+			#endif
+					pPSTable->CurRFState = RF_Save;
+				else
+					pPSTable->CurRFState = RF_Normal;
+			}
+			else{
+			#ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV
+				if(pPSTable->Rssi_val_min <= 45)
+			#else
+				if(pPSTable->Rssi_val_min <= 25)
+			#endif
+					pPSTable->CurRFState = RF_Normal;
+				else
+					pPSTable->CurRFState = RF_Save;
+			}
+		}
+		else
+			pPSTable->CurRFState=RF_MAX;
+	}
+	else
+	{
+		pPSTable->CurRFState = RF_Normal;
+	}
+	
+	if(pPSTable->PreRFState != pPSTable->CurRFState)
+	{
+		if(pPSTable->CurRFState == RF_Save)
+		{
+			PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW  , 0x1C0000, 0x2); //Reg874[20:18]=3'b010
+			PHY_SetBBReg(pAdapter, rOFDM0_AGCParameter1, BIT3, 0); //RegC70[3]=1'b0
+			PHY_SetBBReg(pAdapter, rFPGA0_XCD_SwitchControl, 0xFF000000, 0x63); //Reg85C[31:24]=0x63
+			PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, 0xC000, 0x2); //Reg874[15:14]=2'b10
+			PHY_SetBBReg(pAdapter, 0xa74, 0xF000, 0x3); //RegA75[7:4]=0x3
+			PHY_SetBBReg(pAdapter, 0x818, BIT28, 0x0); //Reg818[28]=1'b0
+			PHY_SetBBReg(pAdapter, 0x818, BIT28, 0x1); //Reg818[28]=1'b1
+			DBG_8192C("%s(): RF_Save\n", __FUNCTION__);
+		}
+		else
+		{
+			PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW  , 0x1CC000, pdmpriv->rf_saving_Reg874);
+			PHY_SetBBReg(pAdapter, rOFDM0_AGCParameter1, BIT3, pdmpriv->rf_saving_RegC70);
+			PHY_SetBBReg(pAdapter, rFPGA0_XCD_SwitchControl, 0xFF000000, pdmpriv->rf_saving_Reg85C);
+			PHY_SetBBReg(pAdapter, 0xa74, 0xF000, pdmpriv->rf_saving_RegA74);
+			PHY_SetBBReg(pAdapter, 0x818, BIT28, 0x0);
+			DBG_8192C("%s(): RF_Normal\n", __FUNCTION__);
+		}
+		pPSTable->PreRFState = pPSTable->CurRFState;
+	}
+}
+
+static void
+dm_DynamicBBPowerSaving(
+IN	PADAPTER	pAdapter
+	)
+{	
+
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct mlme_priv	*pmlmepriv = &pAdapter->mlmepriv;
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	PS_T	*pPSTable = &pdmpriv->DM_PSTable;
+
+	//1 1.Determine the minimum RSSI 
+	if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) &&	
+		(pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0))
+	{
+		pPSTable->Rssi_val_min = 0;
+		//RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("Not connected to any \n"));
+	}
+	if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)	// Default port
+	{
+		//if(ACTING_AS_AP(pAdapter) || pMgntInfo->mIbss)
+		 if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) ||
+			       (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE))	//todo: AP Mode
+		{
+			pPSTable->Rssi_val_min = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
+			//RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("AP Client PWDB = 0x%lx \n", pPSTable->Rssi_val_min));
+		}
+		else
+		{
+			pPSTable->Rssi_val_min = pdmpriv->UndecoratedSmoothedPWDB;
+			//RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("STA Default Port PWDB = 0x%lx \n", pPSTable->Rssi_val_min));
+		}
+	}
+	else // associated entry pwdb
+	{	
+		pPSTable->Rssi_val_min = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
+		//RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("AP Ext Port PWDB = 0x%lx \n", pPSTable->Rssi_val_min));
+	}
+	
+	//1 2.Power Saving for 92C
+	if(IS_92C_SERIAL(pHalData->VersionID))
+	{
+		//dm_1R_CCA(pAdapter);
+	}
+	
+	// 20100628 Joseph: Turn off BB power save for 88CE because it makesthroughput unstable.
+	// 20100831 Joseph: Turn ON BB power save again after modifying AGC delay from 900ns to 600ns. 
+	//1 3.Power Saving for 88C
+	else
+	{
+		rtl8192c_dm_RF_Saving(pAdapter, _FALSE);
+	}
+}
+
+
+#ifdef CONFIG_ANTENNA_DIVERSITY
+// Add new function to reset the state of antenna diversity before link.
+//
+void SwAntDivResetBeforeLink8192C(IN PADAPTER Adapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	SWAT_T *pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table;
+	
+	pDM_SWAT_Table->SWAS_NoLink_State = 0;
+}
+
+// Compare RSSI for deciding antenna
+void	SwAntDivCompare8192C(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	if((0 != pHalData->AntDivCfg) && (!IS_92C_SERIAL(pHalData->VersionID)) )
+	{
+		//DBG_8192C("update_network=> orgRSSI(%d)(%d),newRSSI(%d)(%d)\n",dst->Rssi,query_rx_pwr_percentage(dst->Rssi),
+		//	src->Rssi,query_rx_pwr_percentage(src->Rssi));
+		//select optimum_antenna for before linked =>For antenna diversity
+		if(dst->Rssi >=  src->Rssi )//keep org parameter
+		{
+			src->Rssi = dst->Rssi;
+			src->PhyInfo.Optimum_antenna = dst->PhyInfo.Optimum_antenna;						
+		}
+	}
+}
+
+// Add new function to reset the state of antenna diversity before link.
+u8 SwAntDivBeforeLink8192C(IN PADAPTER Adapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	SWAT_T			*pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table;
+	struct mlme_priv	*pmlmepriv = &(Adapter->mlmepriv);
+	
+	// Condition that does not need to use antenna diversity.
+	if(IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0))
+	{
+		//DBG_8192C("SwAntDivBeforeLink8192C(): No AntDiv Mechanism.\n");
+		return _FALSE;
+	}
+
+	if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)	
+	{
+		pDM_SWAT_Table->SWAS_NoLink_State = 0;
+		return _FALSE;
+	}
+	// Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF.
+/*	
+	if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect)
+	{
+	
+	
+		RT_TRACE(COMP_SWAS, DBG_LOUD, 
+				("SwAntDivCheckBeforeLink8192C(): RFChangeInProgress(%x), eRFPowerState(%x)\n", 
+				pMgntInfo->RFChangeInProgress,
+				pHalData->eRFPowerState));
+	
+		pDM_SWAT_Table->SWAS_NoLink_State = 0;
+		
+		return FALSE;
+	}
+*/	
+	
+	if(pDM_SWAT_Table->SWAS_NoLink_State == 0){
+		//switch channel
+		pDM_SWAT_Table->SWAS_NoLink_State = 1;
+		pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==Antenna_A)?Antenna_B:Antenna_A;
+
+		//PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, pDM_SWAT_Table->CurAntenna);
+		rtw_antenna_select_cmd(Adapter, pDM_SWAT_Table->CurAntenna, _FALSE);
+		//DBG_8192C("%s change antenna to ANT_( %s ).....\n",__FUNCTION__, (pDM_SWAT_Table->CurAntenna==Antenna_A)?"A":"B");
+		return _TRUE;
+	}
+	else
+	{
+		pDM_SWAT_Table->SWAS_NoLink_State = 0;
+		return _FALSE;
+	}
+		
+
+
+}
+#endif
+#ifdef CONFIG_SW_ANTENNA_DIVERSITY
+//
+// 20100514 Luke/Joseph:
+// Add new function to reset antenna diversity state after link.
+//
+void
+SwAntDivRestAfterLink8192C(
+	IN	PADAPTER	Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	SWAT_T			*pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table;
+
+	if(IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0))	
+		return;
+
+	//DBG_8192C("======>   SwAntDivRestAfterLink <========== \n");
+	pHalData->RSSI_cnt_A= 0;
+	pHalData->RSSI_cnt_B= 0;
+	pHalData->RSSI_test = _FALSE;
+	
+	pDM_SWAT_Table->try_flag = 0xff;
+	pDM_SWAT_Table->RSSI_Trying = 0;	
+	pDM_SWAT_Table->SelectAntennaMap=0xAA;
+	pDM_SWAT_Table->CurAntenna = pHalData->CurAntenna;
+	pDM_SWAT_Table->PreAntenna = pHalData->CurAntenna;
+		
+	pdmpriv->lastTxOkCnt=0;
+	pdmpriv->lastRxOkCnt=0;
+
+	pdmpriv->TXByteCnt_A=0;
+	pdmpriv->TXByteCnt_B=0;
+	pdmpriv->RXByteCnt_A=0;
+	pdmpriv->RXByteCnt_B=0;
+	pdmpriv->DoubleComfirm=0;	
+	pdmpriv->TrafficLoad = TRAFFIC_LOW;
+	
+}
+
+
+//
+// 20100514 Luke/Joseph:
+// Add new function for antenna diversity after link.
+// This is the main function of antenna diversity after link.
+// This function is called in HalDmWatchDog() and dm_SW_AntennaSwitchCallback().
+// HalDmWatchDog() calls this function with SWAW_STEP_PEAK to initialize the antenna test.
+// In SWAW_STEP_PEAK, another antenna and a 500ms timer will be set for testing.
+// After 500ms, dm_SW_AntennaSwitchCallback() calls this function to compare the signal just
+// listened on the air with the RSSI of original antenna.
+// It chooses the antenna with better RSSI.
+// There is also a aged policy for error trying. Each error trying will cost more 5 seconds waiting 
+// penalty to get next try.
+//
+static VOID
+dm_SW_AntennaSwitch(
+	PADAPTER	Adapter,
+	u8			Step
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	SWAT_T	*pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table;
+	s32			curRSSI=100, RSSI_A, RSSI_B;
+	u64			curTxOkCnt, curRxOkCnt;
+	u64			CurByteCnt = 0, PreByteCnt = 0;	
+	u8		nextAntenna = 0;
+	u8			Score_A=0, Score_B=0;
+	u8			i;
+
+	// Condition that does not need to use antenna diversity.
+	if(IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0))
+	{
+		//RT_TRACE(COMP_SWAS, DBG_LOUD, ("dm_SW_AntennaSwitch(): No AntDiv Mechanism.\n"));
+		return;
+	}
+	// If dynamic ant_div is disabled.
+	if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_ANT_DIV) )
+	{	
+		return;
+	}
+	
+	if (check_fwstate(&Adapter->mlmepriv, _FW_LINKED)	==_FALSE)
+		return;
+#if 0 //to do
+	// Radio off: Status reset to default and return.
+	if(pHalData->eRFPowerState==eRfOff)
+	{
+		SwAntDivRestAfterLink(Adapter);
+		return;
+	}
+#endif
+	//DBG_8192C("\n............................ %s.........................\n",__FUNCTION__);
+	// Handling step mismatch condition.
+	// Peak step is not finished at last time. Recover the variable and check again.
+	if( Step != pDM_SWAT_Table->try_flag	)
+	{
+		SwAntDivRestAfterLink8192C(Adapter);
+	}
+
+
+	if(pDM_SWAT_Table->try_flag == 0xff)
+	{
+#if 0
+		// Select RSSI checking target
+		if(pMgntInfo->mAssoc && !ACTING_AS_AP(Adapter))
+		{
+			// Target: Infrastructure mode AP.
+			pHalData->RSSI_target = NULL;
+			RT_TRACE(COMP_SWAS, DBG_LOUD, ("dm_SW_AntennaSwitch(): RSSI_target is DEF AP!\n"));
+		}
+		else
+		{
+			u8			index = 0;
+			PRT_WLAN_STA	pEntry = NULL;
+			PADAPTER		pTargetAdapter = NULL;
+		
+			if(	pMgntInfo->mIbss || ACTING_AS_AP(Adapter) )
+			{
+				// Target: AP/IBSS peer.
+				pTargetAdapter = Adapter;
+			}
+			else if(ACTING_AS_AP(ADJUST_TO_ADAPTIVE_ADAPTER(Adapter, FALSE)))
+			{
+				// Target: VWIFI peer.
+				pTargetAdapter = ADJUST_TO_ADAPTIVE_ADAPTER(Adapter, FALSE);
+			}
+
+			if(pTargetAdapter != NULL)
+			{
+				for(index=0; index<ASSOCIATE_ENTRY_NUM; index++)
+				{
+					pEntry = AsocEntry_EnumStation(pTargetAdapter, index);
+					if(pEntry != NULL)
+					{
+						if(pEntry->bAssociated)
+							break;			
+					}
+				}
+			}
+
+			if(pEntry == NULL)
+			{
+				SwAntDivRestAfterLink(Adapter);
+				RT_TRACE(COMP_SWAS, DBG_LOUD, ("dm_SW_AntennaSwitch(): No Link.\n"));
+				return;
+			}
+			else
+			{
+				pHalData->RSSI_target = pEntry;
+				RT_TRACE(COMP_SWAS, DBG_LOUD, ("dm_SW_AntennaSwitch(): RSSI_target is PEER STA\n"));
+			}
+		}
+			
+			
+#endif
+		
+		pHalData->RSSI_cnt_A= 0;
+		pHalData->RSSI_cnt_B= 0;
+		pDM_SWAT_Table->try_flag = 0;
+	//	DBG_8192C("dm_SW_AntennaSwitch(): Set try_flag to 0 prepare for peak!\n");
+		return;
+	}
+	else
+	{
+		curTxOkCnt = Adapter->xmitpriv.tx_bytes - pdmpriv->lastTxOkCnt;
+		curRxOkCnt = Adapter->recvpriv.rx_bytes - pdmpriv->lastRxOkCnt;
+
+		pdmpriv->lastTxOkCnt = Adapter->xmitpriv.tx_bytes ;
+		pdmpriv->lastRxOkCnt = Adapter->recvpriv.rx_bytes ;
+
+		if(pDM_SWAT_Table->try_flag == 1)
+		{
+			if(pDM_SWAT_Table->CurAntenna == Antenna_A)
+		{
+				pdmpriv->TXByteCnt_A += curTxOkCnt;
+				pdmpriv->RXByteCnt_A += curRxOkCnt;
+				//DBG_8192C("#####  TXByteCnt_A(%lld) , RXByteCnt_A(%lld) ####\n",pdmpriv->TXByteCnt_A,pdmpriv->RXByteCnt_A);
+			}
+			else
+			{
+				pdmpriv->TXByteCnt_B += curTxOkCnt;
+				pdmpriv->RXByteCnt_B += curRxOkCnt;
+				//DBG_8192C("#####  TXByteCnt_B(%lld) , RXByteCnt_B(%lld) ####\n",pdmpriv->TXByteCnt_B,pdmpriv->RXByteCnt_B);
+			}
+		
+			nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A;
+			pDM_SWAT_Table->RSSI_Trying--;
+			//DBG_8192C("RSSI_Trying = %d\n",pDM_SWAT_Table->RSSI_Trying);
+			
+			if(pDM_SWAT_Table->RSSI_Trying == 0)
+			{
+				CurByteCnt = (pDM_SWAT_Table->CurAntenna == Antenna_A)? (pdmpriv->TXByteCnt_A+pdmpriv->RXByteCnt_A) : (pdmpriv->TXByteCnt_B+pdmpriv->RXByteCnt_B);
+				PreByteCnt = (pDM_SWAT_Table->CurAntenna == Antenna_A)? (pdmpriv->TXByteCnt_B+pdmpriv->RXByteCnt_B) : (pdmpriv->TXByteCnt_A+pdmpriv->RXByteCnt_A);
+
+				//DBG_8192C("CurByteCnt = %lld\n", CurByteCnt);
+				//DBG_8192C("PreByteCnt = %lld\n",PreByteCnt);		
+				
+				if(pdmpriv->TrafficLoad == TRAFFIC_HIGH)
+				{
+					PreByteCnt = PreByteCnt*9;	//normalize:Cur=90ms:Pre=10ms					
+				}
+				else if(pdmpriv->TrafficLoad == TRAFFIC_LOW)
+				{					
+					//CurByteCnt = CurByteCnt/2;
+					CurByteCnt = CurByteCnt>>1;//normalize:100ms:50ms					
+				}
+
+
+				//DBG_8192C("After DIV=>CurByteCnt = %lld\n", CurByteCnt);
+				//DBG_8192C("PreByteCnt = %lld\n",PreByteCnt);		
+
+				if(pHalData->RSSI_cnt_A > 0)
+					RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; 
+				else
+					RSSI_A = 0;
+				if(pHalData->RSSI_cnt_B > 0)
+					RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; 
+				else
+					RSSI_B = 0;
+				
+				curRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_A : RSSI_B;
+				pDM_SWAT_Table->PreRSSI =  (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_B : RSSI_A;
+				//DBG_8192C("Luke:PreRSSI = %d, CurRSSI = %d\n",pDM_SWAT_Table->PreRSSI, curRSSI);
+				//DBG_8192C("SWAS: preAntenna= %s, curAntenna= %s \n", 
+				//(pDM_SWAT_Table->PreAntenna == Antenna_A?"A":"B"), (pDM_SWAT_Table->CurAntenna == Antenna_A?"A":"B"));
+				//DBG_8192C("Luke:RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n",
+					//RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B);
+			}
+
+			}
+			else
+			{
+		
+			if(pHalData->RSSI_cnt_A > 0)
+				RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; 
+			else
+				RSSI_A = 0;
+			if(pHalData->RSSI_cnt_B > 0)
+				RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; 
+			else
+				RSSI_B = 0;
+			curRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_A : RSSI_B;
+			pDM_SWAT_Table->PreRSSI =  (pDM_SWAT_Table->PreAntenna == Antenna_A)? RSSI_A : RSSI_B;
+			//DBG_8192C("Ekul:PreRSSI = %d, CurRSSI = %d\n", pDM_SWAT_Table->PreRSSI, curRSSI);
+			//DBG_8192C("SWAS: preAntenna= %s, curAntenna= %s \n", 
+			//(pDM_SWAT_Table->PreAntenna == Antenna_A?"A":"B"), (pDM_SWAT_Table->CurAntenna == Antenna_A?"A":"B"));
+
+			//DBG_8192C("Ekul:RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n",
+			//	RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B);
+			//RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curTxOkCnt = %d\n", curTxOkCnt));
+			//RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curRxOkCnt = %d\n", curRxOkCnt));
+			}
+
+		//1 Trying State
+		if((pDM_SWAT_Table->try_flag == 1)&&(pDM_SWAT_Table->RSSI_Trying == 0))
+		{
+
+			if(pDM_SWAT_Table->TestMode == TP_MODE)
+			{
+				//DBG_8192C("SWAS: TestMode = TP_MODE\n");
+				//DBG_8192C("TRY:CurByteCnt = %lld\n", CurByteCnt);
+				//DBG_8192C("TRY:PreByteCnt = %lld\n",PreByteCnt);		
+				if(CurByteCnt < PreByteCnt)
+				{
+					if(pDM_SWAT_Table->CurAntenna == Antenna_A)
+						pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1;
+					else
+						pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1;
+				}
+				else
+				{
+					if(pDM_SWAT_Table->CurAntenna == Antenna_A)
+						pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1;
+					else
+						pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1;
+				}
+				for (i= 0; i<8; i++)
+				{
+					if(((pDM_SWAT_Table->SelectAntennaMap>>i)&BIT0) == 1)
+						Score_A++;
+					else
+						Score_B++;
+				}
+				//DBG_8192C("SelectAntennaMap=%x\n ",pDM_SWAT_Table->SelectAntennaMap);
+				//DBG_8192C("Score_A=%d, Score_B=%d\n", Score_A, Score_B);
+				
+				if(pDM_SWAT_Table->CurAntenna == Antenna_A)
+				{
+					nextAntenna = (Score_A > Score_B)?Antenna_A:Antenna_B;
+				}
+				else
+				{
+					nextAntenna = (Score_B > Score_A)?Antenna_B:Antenna_A;
+				}
+				//RT_TRACE(COMP_SWAS, DBG_LOUD, ("nextAntenna=%s\n",(nextAntenna==Antenna_A)?"A":"B"));
+				//RT_TRACE(COMP_SWAS, DBG_LOUD, ("preAntenna= %s, curAntenna= %s \n", 
+					//(DM_SWAT_Table.PreAntenna == Antenna_A?"A":"B"), (DM_SWAT_Table.CurAntenna == Antenna_A?"A":"B")));
+
+				if(nextAntenna != pDM_SWAT_Table->CurAntenna)
+				{
+					//DBG_8192C("SWAS: Switch back to another antenna\n");
+				}
+				else
+				{
+					//DBG_8192C("SWAS: current anntena is good\n");
+				}	
+			}
+
+			if(pDM_SWAT_Table->TestMode == RSSI_MODE)
+			{	
+				//DBG_8192C("SWAS: TestMode = RSSI_MODE\n");
+				pDM_SWAT_Table->SelectAntennaMap=0xAA;
+				if(curRSSI < pDM_SWAT_Table->PreRSSI) //Current antenna is worse than previous antenna
+				{
+					//DBG_8192C("SWAS: Switch back to another antenna\n");
+					nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A;
+				}
+				else // current anntena is good
+				{
+					nextAntenna = pDM_SWAT_Table->CurAntenna;
+					//DBG_8192C("SWAS: current anntena is good\n");
+				}
+				}
+				pDM_SWAT_Table->try_flag = 0;
+				pHalData->RSSI_test = _FALSE;
+				pHalData->RSSI_sum_A = 0;
+				pHalData->RSSI_cnt_A = 0;
+				pHalData->RSSI_sum_B = 0;
+				pHalData->RSSI_cnt_B = 0;
+				pdmpriv->TXByteCnt_A = 0;
+				pdmpriv->TXByteCnt_B = 0;
+				pdmpriv->RXByteCnt_A = 0;
+				pdmpriv->RXByteCnt_B = 0;
+			
+			}
+
+		//1 Normal State
+		else if(pDM_SWAT_Table->try_flag == 0)
+			{
+			if(pdmpriv->TrafficLoad == TRAFFIC_HIGH)
+				{
+				if(((curTxOkCnt+curRxOkCnt)>>1) > 1875000)
+					pdmpriv->TrafficLoad = TRAFFIC_HIGH;
+				else
+					pdmpriv->TrafficLoad = TRAFFIC_LOW;
+			}
+			else if(pdmpriv->TrafficLoad == TRAFFIC_LOW)
+				{
+				if(((curTxOkCnt+curRxOkCnt)>>1) > 1875000)
+					pdmpriv->TrafficLoad = TRAFFIC_HIGH;
+				else
+					pdmpriv->TrafficLoad = TRAFFIC_LOW;
+			}
+			if(pdmpriv->TrafficLoad == TRAFFIC_HIGH)
+				pDM_SWAT_Table->bTriggerAntennaSwitch = 0;
+			//DBG_8192C("Normal:TrafficLoad = %lld\n", curTxOkCnt+curRxOkCnt);
+
+			//Prepare To Try Antenna		
+					nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A;
+					pDM_SWAT_Table->try_flag = 1;
+					pHalData->RSSI_test = _TRUE;
+			if((curRxOkCnt+curTxOkCnt) > 1000)
+			{
+				pDM_SWAT_Table->RSSI_Trying = 4;
+				pDM_SWAT_Table->TestMode = TP_MODE;
+				}
+				else
+				{
+				pDM_SWAT_Table->RSSI_Trying = 2;
+				pDM_SWAT_Table->TestMode = RSSI_MODE;
+
+			}
+			//DBG_8192C("SWAS: Normal State -> Begin Trying! TestMode=%s\n",(pDM_SWAT_Table->TestMode == TP_MODE)?"TP":"RSSI");
+			
+			
+			pHalData->RSSI_sum_A = 0;
+			pHalData->RSSI_cnt_A = 0;
+			pHalData->RSSI_sum_B = 0;
+			pHalData->RSSI_cnt_B = 0;
+		}
+	}
+
+	//1 4.Change TRX antenna
+	if(nextAntenna != pDM_SWAT_Table->CurAntenna)
+	{
+		//DBG_8192C("@@@@@@@@ SWAS: Change TX Antenna!\n ");		
+		rtw_antenna_select_cmd(Adapter, nextAntenna, 1);
+	}
+
+	//1 5.Reset Statistics
+	pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna;
+	pDM_SWAT_Table->CurAntenna = nextAntenna;
+	pDM_SWAT_Table->PreRSSI = curRSSI;
+
+
+	//1 6.Set next timer
+
+	if(pDM_SWAT_Table->RSSI_Trying == 0)
+		return;
+
+	if(pDM_SWAT_Table->RSSI_Trying%2 == 0)
+	{
+		if(pDM_SWAT_Table->TestMode == TP_MODE)
+		{
+			if(pdmpriv->TrafficLoad == TRAFFIC_HIGH)
+			{
+				_set_timer(&pdmpriv->SwAntennaSwitchTimer,10 ); //ms
+				//DBG_8192C("dm_SW_AntennaSwitch(): Test another antenna for 10 ms\n");
+			}
+			else if(pdmpriv->TrafficLoad == TRAFFIC_LOW)
+			{
+				_set_timer(&pdmpriv->SwAntennaSwitchTimer, 50 ); //ms
+				//DBG_8192C("dm_SW_AntennaSwitch(): Test another antenna for 50 ms\n");
+			}
+	}
+	else
+	{
+			_set_timer(&pdmpriv->SwAntennaSwitchTimer, 500 ); //ms
+			//DBG_8192C("dm_SW_AntennaSwitch(): Test another antenna for 500 ms\n");
+		}
+	}
+	else
+	{
+		if(pDM_SWAT_Table->TestMode == TP_MODE)
+		{
+			if(pdmpriv->TrafficLoad == TRAFFIC_HIGH)			
+				_set_timer(&pdmpriv->SwAntennaSwitchTimer,90 ); //ms			
+			else if(pdmpriv->TrafficLoad == TRAFFIC_LOW)
+				_set_timer(&pdmpriv->SwAntennaSwitchTimer,100 ); //ms
+		}
+		else
+		{
+			_set_timer(&pdmpriv->SwAntennaSwitchTimer,500 ); //ms
+			//DBG_8192C("dm_SW_AntennaSwitch(): Test another antenna for 500 ms\n");
+		}
+	}
+
+//	RT_TRACE(COMP_SWAS, DBG_LOUD, ("SWAS: -----The End-----\n "));
+
+}
+
+//
+// 20100514 Luke/Joseph:
+// Callback function for 500ms antenna test trying.
+//
+static void dm_SW_AntennaSwitchCallback(void *FunctionContext)
+{
+	_adapter *padapter = (_adapter *)FunctionContext;
+
+	if(padapter->net_closed == _TRUE)
+			return;
+	// Only 
+	dm_SW_AntennaSwitch(padapter, SWAW_STEP_DETERMINE);
+}
+
+
+//
+// 20100722
+// This function is used to gather the RSSI information for antenna testing.
+// It selects the RSSI of the peer STA that we want to know.
+//
+void SwAntDivRSSICheck8192C(_adapter *padapter ,u32 RxPWDBAll)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);	
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+	SWAT_T	*pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table;
+
+	if(IS_92C_SERIAL(pHalData->VersionID) ||pHalData->AntDivCfg==0)
+		return;
+	
+	if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)		
+	{			
+		if(pDM_SWAT_Table->CurAntenna == Antenna_A)
+		{			
+			pHalData->RSSI_sum_A += RxPWDBAll;
+			pHalData->RSSI_cnt_A++;
+		}
+		else
+		{
+			pHalData->RSSI_sum_B+= RxPWDBAll;
+			pHalData->RSSI_cnt_B++;
+		
+		}
+		//DBG_8192C("%s Ant_(%s),RSSI_sum(%d),RSSI_cnt(%d)\n",__FUNCTION__,(2==pHalData->CurAntenna)?"A":"B",pHalData->RSSI_sum,pHalData->RSSI_cnt);
+	}
+	
+}
+
+
+
+static VOID
+dm_SW_AntennaSwitchInit(
+	IN	PADAPTER	Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	SWAT_T	*pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table;
+
+	pHalData->RSSI_sum_A = 0;	
+	pHalData->RSSI_sum_B = 0;
+	pHalData->RSSI_cnt_A = 0;
+	pHalData->RSSI_cnt_B = 0;
+
+	pDM_SWAT_Table->CurAntenna = pHalData->CurAntenna;
+	pDM_SWAT_Table->PreAntenna = pHalData->CurAntenna;
+	pDM_SWAT_Table->try_flag = 0xff;
+	pDM_SWAT_Table->PreRSSI = 0;
+	pDM_SWAT_Table->bTriggerAntennaSwitch = 0;	
+	pDM_SWAT_Table->SelectAntennaMap=0xAA;
+	
+	// Move the timer initialization to InitializeVariables function.
+	//PlatformInitializeTimer(Adapter, &pMgntInfo->SwAntennaSwitchTimer, (RT_TIMER_CALL_BACK)dm_SW_AntennaSwitchCallback, NULL, "SwAntennaSwitchTimer");	
+}
+
+#endif
+
+//#define	RSSI_CCK	0
+//#define	RSSI_OFDM	1
+static void dm_RSSIMonitorInit(
+	IN	PADAPTER	Adapter
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	pdmpriv->OFDM_Pkt_Cnt = 0;
+	pdmpriv->RSSI_Select = RSSI_DEFAULT;
+}
+
+static void dm_RSSIMonitorCheck(
+	IN	PADAPTER	Adapter
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
+
+	if(check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE)
+		return;
+		
+	if(check_fwstate(pmlmepriv, WIFI_AP_STATE |WIFI_ADHOC_STATE) == _TRUE )
+	{
+		if(Adapter->stapriv.asoc_sta_count < 2)
+			return;			
+	}		
+	
+	if(pdmpriv->OFDM_Pkt_Cnt == 0)
+		pdmpriv->RSSI_Select = RSSI_CCK;
+	else
+		pdmpriv->RSSI_Select = RSSI_OFDM;
+
+	pdmpriv->OFDM_Pkt_Cnt = 0;	
+	//DBG_8192C("RSSI_Select=%s OFDM_Pkt_Cnt(%d)\n",
+		//(pdmpriv->RSSI_Select == RSSI_OFDM)?"RSSI_OFDM":"RSSI_CCK",
+		//pdmpriv->OFDM_Pkt_Cnt);
+}
+
+//============================================================
+// functions
+//============================================================
+void rtl8192c_init_dm_priv(IN PADAPTER Adapter)
+{
+	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+	_rtw_memset(pdmpriv, 0, sizeof(struct dm_priv));
+
+#ifdef CONFIG_SW_ANTENNA_DIVERSITY
+	_init_timer(&(pdmpriv->SwAntennaSwitchTimer),  Adapter->pnetdev , dm_SW_AntennaSwitchCallback, Adapter);
+#endif
+}
+
+void rtl8192c_deinit_dm_priv(IN PADAPTER Adapter)
+{
+	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+#ifdef CONFIG_SW_ANTENNA_DIVERSITY
+	_cancel_timer_ex(&pdmpriv->SwAntennaSwitchTimer);
+#endif
+}
+#ifdef CONFIG_HW_ANTENNA_DIVERSITY
+void dm_InitHybridAntDiv(IN PADAPTER Adapter)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+
+	if(IS_92C_SERIAL(pHalData->VersionID) ||pHalData->AntDivCfg==0)
+		return;
+	
+	//Set OFDM HW RX Antenna Diversity
+	PHY_SetBBReg(Adapter,0xc50, BIT7, 1); //Enable Hardware antenna switch
+	PHY_SetBBReg(Adapter,0x870, BIT9|BIT8, 0); //Enable hardware control of "ANT_SEL" & "ANT_SELB"
+	PHY_SetBBReg(Adapter,0xCA4, BIT11, 0); //Switch to another antenna by checking pwdb threshold
+	PHY_SetBBReg(Adapter,0xCA4, 0x7FF, 0x080); //Pwdb threshold=8dB
+	PHY_SetBBReg(Adapter,0xC54, BIT23, 1); //Decide final antenna by comparing 2 antennas' pwdb
+	PHY_SetBBReg(Adapter,0x874, BIT23, 0); //No update ANTSEL during GNT_BT=1
+	PHY_SetBBReg(Adapter,0x80C, BIT21, 1); //TX atenna selection from tx_info
+	//Set CCK HW RX Antenna Diversity
+	PHY_SetBBReg(Adapter,0xA00, BIT15, 1);//Enable antenna diversity
+	PHY_SetBBReg(Adapter,0xA0C, BIT4, 0); //Antenna diversity decision period = 32 sample
+	PHY_SetBBReg(Adapter,0xA0C, 0xf, 0xf); //Threshold for antenna diversity. Check another antenna power if input power < ANT_lim*4
+	PHY_SetBBReg(Adapter,0xA10, BIT13, 1); //polarity ana_A=1 and ana_B=0
+	PHY_SetBBReg(Adapter,0xA14, 0x1f, 0x8); //default antenna power = inpwr*(0.5 + r_ant_step/16)
+	
+	pHalData->CCK_Ant1_Cnt = 0;
+	pHalData->CCK_Ant2_Cnt = 0;
+	pHalData->OFDM_Ant1_Cnt = 0;
+	pHalData->OFDM_Ant2_Cnt = 0;
+}
+
+
+#define 	RxDefaultAnt1		0x65a9
+#define	RxDefaultAnt2		0x569a
+
+void dm_SelectRXDefault(IN	PADAPTER	Adapter)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	
+	if(IS_92C_SERIAL(pHalData->VersionID) ||pHalData->AntDivCfg==0)
+		return;
+	
+	//DbgPrint(" Ant1_Cnt=%d, Ant2_Cnt=%d\n", pHalData->Ant1_Cnt, pHalData->Ant2_Cnt);
+	//DBG_8192C(" CCK_Ant1_Cnt = %d,  CCK_Ant2_Cnt = %d\n", pHalData->CCK_Ant1_Cnt, pHalData->CCK_Ant2_Cnt);
+	//DBG_8192C(" OFDM_Ant1_Cnt = %d,  OFDM_Ant2_Cnt = %d\n", pHalData->OFDM_Ant1_Cnt, pHalData->OFDM_Ant2_Cnt);
+	if((pHalData->OFDM_Ant1_Cnt == 0) && (pHalData->OFDM_Ant2_Cnt == 0)) 
+	{
+		if((pHalData->CCK_Ant1_Cnt + pHalData->CCK_Ant2_Cnt) >=10 )
+		{
+			if(pHalData->CCK_Ant1_Cnt > (5*pHalData->CCK_Ant2_Cnt))
+			{
+				DBG_8192C(" RX Default = Ant1\n");
+				PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt1);
+			}
+			else if(pHalData->CCK_Ant2_Cnt > (5*pHalData->CCK_Ant1_Cnt))
+			{
+				DBG_8192C(" RX Default = Ant2\n");
+				PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt2);
+			}
+			else if(pHalData->CCK_Ant1_Cnt > pHalData->CCK_Ant2_Cnt)
+			{
+				DBG_8192C(" RX Default = Ant2\n");
+				PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt2);
+			}
+			else
+			{
+				DBG_8192C(" RX Default = Ant1\n");
+				PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt1);
+			}
+			pHalData->CCK_Ant1_Cnt = 0;
+			pHalData->CCK_Ant2_Cnt = 0;
+			pHalData->OFDM_Ant1_Cnt = 0;
+			pHalData->OFDM_Ant2_Cnt = 0;
+		}
+	}
+	else
+	{
+		if(pHalData->OFDM_Ant1_Cnt > pHalData->OFDM_Ant2_Cnt)
+		{
+			DBG_8192C(" RX Default = Ant1\n");
+			PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt1);
+		}
+		else
+		{
+			DBG_8192C(" RX Default = Ant2\n");
+			PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt2);
+		}
+		pHalData->CCK_Ant1_Cnt = 0;
+		pHalData->CCK_Ant2_Cnt = 0;
+		pHalData->OFDM_Ant1_Cnt = 0;
+		pHalData->OFDM_Ant2_Cnt = 0;
+	}
+
+
+}
+
+#endif
+
+void
+rtl8192c_InitHalDm(
+	IN	PADAPTER	Adapter
+	)
+{
+	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u8	i;
+
+#ifdef CONFIG_USB_HCI
+	dm_InitGPIOSetting(Adapter);
+#endif
+
+	pdmpriv->DM_Type = DM_Type_ByDriver;	
+	pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE;
+	pdmpriv->UndecoratedSmoothedPWDB = (-1);
+	pdmpriv->UndecoratedSmoothedCCK = (-1);
+	
+	
+	//.1 DIG INIT
+	pdmpriv->bDMInitialGainEnable = _TRUE;
+	pdmpriv->DMFlag |= DYNAMIC_FUNC_DIG;
+	dm_DIGInit(Adapter);
+
+	//.2 DynamicTxPower INIT
+	pdmpriv->DMFlag |= DYNAMIC_FUNC_HP;
+	dm_InitDynamicTxPower(Adapter);
+
+	//.3
+	DM_InitEdcaTurbo(Adapter);
+
+	//.4 RateAdaptive INIT
+	dm_InitRateAdaptiveMask(Adapter);
+
+	//.5 Tx Power Tracking Init.
+	pdmpriv->DMFlag |= DYNAMIC_FUNC_SS;
+	DM_InitializeTXPowerTracking(Adapter);
+
+#ifdef CONFIG_BT_COEXIST
+	pdmpriv->DMFlag |= DYNAMIC_FUNC_BT;
+	dm_InitBtCoexistDM(Adapter);
+#endif
+
+	dm_InitDynamicBBPowerSaving(Adapter);
+
+#ifdef CONFIG_SW_ANTENNA_DIVERSITY
+	pdmpriv->DMFlag |= DYNAMIC_FUNC_ANT_DIV;
+	dm_SW_AntennaSwitchInit(Adapter);
+#endif
+
+#ifdef CONFIG_HW_ANTENNA_DIVERSITY
+	pdmpriv->DMFlag |= DYNAMIC_FUNC_ANT_DIV;
+	dm_InitHybridAntDiv(Adapter);
+#endif
+
+	dm_RSSIMonitorInit(Adapter);
+
+	pdmpriv->DMFlag_tmp = pdmpriv->DMFlag;
+
+	// Save REG_INIDATA_RATE_SEL value for TXDESC.
+	for(i = 0 ; i<32 ; i++)
+	{
+		pdmpriv->INIDATA_RATE[i] = rtw_read8(Adapter, REG_INIDATA_RATE_SEL+i) & 0x3f;
+	}
+}
+
+VOID
+rtl8192c_HalDmWatchDog(
+	IN	PADAPTER	Adapter
+	)
+{
+	BOOLEAN		bFwCurrentInPSMode = _FALSE;
+	BOOLEAN		bFwPSAwake = _TRUE;
+	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+
+#ifdef CONFIG_LPS
+	bFwCurrentInPSMode = Adapter->pwrctrlpriv.bFwCurrentInPSMode;
+	Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake));
+#endif
+
+#ifdef CONFIG_P2P
+	// Fw is under p2p powersaving mode, driver should stop dynamic mechanism.
+	// modifed by thomas. 2011.06.11.
+	if(Adapter->wdinfo.p2p_ps_enable)
+		bFwPSAwake = _FALSE;
+#endif //CONFIG_P2P
+
+	// Stop dynamic mechanism when:
+	// 1. RF is OFF. (No need to do DM.)
+	// 2. Fw is under power saving mode for FwLPS. (Prevent from SW/FW I/O racing.)
+	// 3. IPS workitem is scheduled. (Prevent from IPS sequence to be swapped with DM.
+	//     Sometimes DM execution time is longer than 100ms such that the assertion
+	//     in MgntActSet_RF_State() called by InactivePsWorkItem will be triggered by 
+	//     wating to long for RFChangeInProgress.)
+	// 4. RFChangeInProgress is TRUE. (Prevent from broken by IPS/HW/SW Rf off.)
+	// Noted by tynli. 2010.06.01.
+	//if(rfState == eRfOn)
+	if( (Adapter->hw_init_completed == _TRUE) 
+		&& ((!bFwCurrentInPSMode) && bFwPSAwake))
+	{
+		//
+		// Calculate Tx/Rx statistics.
+		//
+		dm_CheckStatistics(Adapter);
+
+		//
+		// For PWDB monitor and record some value for later use.
+		//
+		PWDB_Monitor(Adapter);
+
+		//
+		// Dynamic Initial Gain mechanism.
+		//
+
+		dm_RSSIMonitorCheck(Adapter);
+
+		dm_FalseAlarmCounterStatistics(Adapter);
+		dm_DIG(Adapter);
+
+		//
+		//Dynamic BB Power Saving Mechanism
+		//
+		dm_DynamicBBPowerSaving(Adapter);
+
+		//
+		// Dynamic Tx Power mechanism.
+		//
+		dm_DynamicTxPower(Adapter);
+
+		//
+		// Tx Power Tracking.
+		//
+		rtl8192c_dm_CheckTXPowerTracking(Adapter);
+
+		//
+		// Rate Adaptive by Rx Signal Strength mechanism.
+		//
+		dm_RefreshRateAdaptiveMask(Adapter);
+
+#ifdef CONFIG_BT_COEXIST
+		//BT-Coexist
+		dm_BTCoexist(Adapter);
+#endif
+
+		// EDCA turbo
+		//update the EDCA paramter according to the Tx/RX mode
+		//update_EDCA_param(Adapter);
+		dm_CheckEdcaTurbo(Adapter);
+
+		//
+		// Dynamically switch RTS/CTS protection.
+		//
+		//dm_CheckProtection(Adapter);
+
+#ifdef CONFIG_SW_ANTENNA_DIVERSITY
+		//
+		// Software Antenna diversity
+		//
+		dm_SW_AntennaSwitch(Adapter, SWAW_STEP_PEAK);
+#endif
+
+#ifdef CONFIG_HW_ANTENNA_DIVERSITY
+		//Hybrid Antenna Diversity
+		dm_SelectRXDefault(Adapter);
+#endif
+
+#ifdef CONFIG_PCI_HCI
+		// 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput.
+		// Tx Migration settings.
+		//dm_InterruptMigration(Adapter);
+
+		//if(Adapter->HalFunc.TxCheckStuckHandler(Adapter))
+		//	PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem));
+#endif
+
+		// Read REG_INIDATA_RATE_SEL value for TXDESC.
+		if(check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE) == _TRUE)
+		{
+			pdmpriv->INIDATA_RATE[0] = rtw_read8(Adapter, REG_INIDATA_RATE_SEL) & 0x3f;
+		}
+		else
+		{
+			u8	i;
+			for(i=1 ; i < (Adapter->stapriv.asoc_sta_count + 1); i++)
+			{
+				pdmpriv->INIDATA_RATE[i] = rtw_read8(Adapter, (REG_INIDATA_RATE_SEL+i)) & 0x3f;
+			}
+		}
+	}
+
+	// Check GPIO to determine current RF on/off and Pbc status.
+	// Check Hardware Radio ON/OFF or not	
+	//if(Adapter->MgntInfo.PowerSaveControl.bGpioRfSw)
+	//{
+		//RTPRINT(FPWR, PWRHW, ("dm_CheckRfCtrlGPIO \n"));
+	//	dm_CheckRfCtrlGPIO(Adapter);
+	//}
+
+#ifdef CONFIG_PCI_HCI
+	if(pHalData->bGpioHwWpsPbc)
+#endif
+	{
+		dm_CheckPbcGPIO(Adapter);				// Add by hpfan 2008-03-11
+	}
+
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_hal_init.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_hal_init.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_hal_init.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_hal_init.c	2017-09-23 03:42:49.918675370 +0800
@@ -0,0 +1,3547 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ *******************************************************************************/
+
+#define _RTL8192C_HAL_INIT_C_
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtw_byteorder.h>
+#include <rtw_efuse.h>
+
+#include <rtl8192c_hal.h>
+
+#ifdef CONFIG_USB_HCI
+#include <usb_hal.h>
+#endif
+
+#ifdef CONFIG_PCI_HCI
+#include <pci_hal.h>
+#endif
+
+static BOOLEAN
+hal_EfusePgPacketWrite2ByteHeader(
+	IN	PADAPTER		pAdapter,
+	IN	u8				efuseType,
+	IN	u16				*pAddr,
+	IN	PPGPKT_STRUCT	pTargetPkt,
+	IN	BOOLEAN			bPseudoTest);
+static BOOLEAN
+hal_EfusePgPacketWrite1ByteHeader(
+	IN	PADAPTER		pAdapter, 
+	IN	u8				efuseType,
+	IN	u16				*pAddr,
+	IN	PPGPKT_STRUCT	pTargetPkt,
+	IN	BOOLEAN			bPseudoTest);
+static BOOLEAN
+hal_EfusePgPacketWriteData(
+	IN	PADAPTER		pAdapter, 
+	IN	u8				efuseType,
+	IN	u16				*pAddr,
+	IN	PPGPKT_STRUCT	pTargetPkt,
+	IN	BOOLEAN			bPseudoTest);
+static BOOLEAN 
+hal_EfusePgPacketWrite_BT(
+	IN	PADAPTER		pAdapter, 
+	IN	u8				offset,
+	IN	u8				word_en,
+	IN	u8				*pData,
+	IN	BOOLEAN			bPseudoTest);
+
+static VOID
+_FWDownloadEnable(
+	IN	PADAPTER		Adapter,
+	IN	BOOLEAN			enable
+	)
+{
+	u8	tmp;
+
+	if(enable)
+	{
+		#ifdef DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE
+		{
+			u8 val;
+			if( (val=rtw_read8(Adapter, REG_MCUFWDL)))
+				DBG_871X("DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE %s:%d REG_MCUFWDL:0x%02x\n", __FUNCTION__, __LINE__, val);
+		}
+		#endif
+	
+		// 8051 enable
+		tmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1);
+		rtw_write8(Adapter, REG_SYS_FUNC_EN+1, tmp|0x04);
+
+		// MCU firmware download enable.
+		tmp = rtw_read8(Adapter, REG_MCUFWDL);
+		rtw_write8(Adapter, REG_MCUFWDL, tmp|0x01);
+
+		// 8051 reset
+		tmp = rtw_read8(Adapter, REG_MCUFWDL+2);
+		rtw_write8(Adapter, REG_MCUFWDL+2, tmp&0xf7);
+	}
+	else
+	{
+		// MCU firmware download enable.
+		tmp = rtw_read8(Adapter, REG_MCUFWDL);
+		rtw_write8(Adapter, REG_MCUFWDL, tmp&0xfe);
+
+		// Reserved for fw extension.
+		rtw_write8(Adapter, REG_MCUFWDL+1, 0x00);
+	}
+}
+
+
+#define MAX_REG_BOLCK_SIZE	196
+#define MIN_REG_BOLCK_SIZE	8
+
+static int
+_BlockWrite(
+	IN		PADAPTER		Adapter,
+	IN		PVOID		buffer,
+	IN		u32			size
+	)
+{
+	int ret = _SUCCESS;
+
+#ifdef CONFIG_PCI_HCI
+	u32			blockSize	= sizeof(u32);	// Use 4-byte write to download FW
+	u8			*bufferPtr	= (u8 *)buffer;
+	u32			*pu4BytePtr	= (u32 *)buffer;
+	u32			i, offset, blockCount, remainSize;
+
+	blockCount = size / blockSize;
+	remainSize = size % blockSize;
+
+	for(i = 0 ; i < blockCount ; i++){
+		offset = i * blockSize;
+		rtw_write32(Adapter, (FW_8192C_START_ADDRESS + offset), *(pu4BytePtr + i));
+	}
+
+	if(remainSize){
+		offset = blockCount * blockSize;
+		bufferPtr += offset;
+		
+		for(i = 0 ; i < remainSize ; i++){
+			rtw_write8(Adapter, (FW_8192C_START_ADDRESS + offset + i), *(bufferPtr + i));
+		}
+	}
+#else
+  
+#ifdef SUPPORTED_BLOCK_IO
+	u32			blockSize	= MAX_REG_BOLCK_SIZE;	// Use 196-byte write to download FW	
+	u32			blockSize2  	= MIN_REG_BOLCK_SIZE;	
+#else
+	u32			blockSize	= sizeof(u32);	// Use 4-byte write to download FW
+	u32*		pu4BytePtr	= (u32*)buffer;
+	u32			blockSize2  	= sizeof(u8);
+#endif
+	u8*			bufferPtr	= (u8*)buffer;
+	u32			i, offset = 0, offset2, blockCount, remainSize, remainSize2;
+
+	blockCount = size / blockSize;
+	remainSize = size % blockSize;
+
+	for(i = 0 ; i < blockCount ; i++){
+		offset = i * blockSize;
+		#ifdef SUPPORTED_BLOCK_IO
+		ret = rtw_writeN(Adapter, (FW_8192C_START_ADDRESS + offset), blockSize, (bufferPtr + offset));
+		#else
+		ret = rtw_write32(Adapter, (FW_8192C_START_ADDRESS + offset), le32_to_cpu(*(pu4BytePtr + i)));
+		#endif
+
+		if(ret == _FAIL)
+			goto exit;
+	}
+
+	if(remainSize){
+		#if defined(SUPPORTED_BLOCK_IO) && defined(DBG_BLOCK_WRITE_ISSUE) //Can this be enabled?
+		offset = blockCount * blockSize;
+		ret = rtw_writeN(Adapter, (FW_8192C_START_ADDRESS + offset), remainSize, (bufferPtr + offset));
+		goto exit;
+		#endif
+		offset2 = blockCount * blockSize;		
+		blockCount = remainSize / blockSize2;
+		remainSize2 = remainSize % blockSize2;
+
+		for(i = 0 ; i < blockCount ; i++){
+			offset = offset2 + i * blockSize2;
+			#ifdef SUPPORTED_BLOCK_IO
+			ret = rtw_writeN(Adapter, (FW_8192C_START_ADDRESS + offset), blockSize2, (bufferPtr + offset));
+			#else
+			ret = rtw_write8(Adapter, (FW_8192C_START_ADDRESS + offset ), *(bufferPtr + offset));
+			#endif
+
+			if(ret == _FAIL)
+				goto exit;
+		}		
+
+		if(remainSize2)
+		{
+			offset += blockSize2;
+			bufferPtr += offset;
+			
+			for(i = 0 ; i < remainSize2 ; i++){
+				ret = rtw_write8(Adapter, (FW_8192C_START_ADDRESS + offset + i), *(bufferPtr + i));
+
+				if(ret == _FAIL)
+					goto exit;
+			}
+		}
+	}
+#endif
+
+exit:
+	return ret;
+}
+
+static int
+_PageWrite(
+	IN		PADAPTER	Adapter,
+	IN		u32			page,
+	IN		PVOID		buffer,
+	IN		u32			size
+	)
+{
+	u8 value8;
+	u8 u8Page = (u8) (page & 0x07) ;
+
+	value8 = (rtw_read8(Adapter, REG_MCUFWDL+2)& 0xF8 ) | u8Page ;
+	rtw_write8(Adapter, REG_MCUFWDL+2,value8);
+	return _BlockWrite(Adapter,buffer,size);
+}
+
+static VOID
+_FillDummy(
+	u8*		pFwBuf,
+	u32*	pFwLen
+	)
+{
+	u32	FwLen = *pFwLen;
+	u8	remain = (u8)(FwLen%4);
+	remain = (remain==0)?0:(4-remain);
+
+	while(remain>0)
+	{
+		pFwBuf[FwLen] = 0;
+		FwLen++;
+		remain--;
+	}
+
+	*pFwLen = FwLen;
+}
+
+static int
+_WriteFW(
+	IN		PADAPTER		Adapter,
+	IN		PVOID			buffer,
+	IN		u32			size
+	)
+{
+	// Since we need dynamic decide method of dwonload fw, so we call this function to get chip version.
+	// We can remove _ReadChipVersion from ReadAdapterInfo8192C later.
+
+	int ret = _SUCCESS;
+	BOOLEAN			isNormalChip;	
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);	
+	
+	isNormalChip = IS_NORMAL_CHIP(pHalData->VersionID);
+
+	if(isNormalChip){
+		u32 	pageNums,remainSize ;
+		u32 	page,offset;
+		u8*	bufferPtr = (u8*)buffer;
+
+#ifdef CONFIG_PCI_HCI
+		// 20100120 Joseph: Add for 88CE normal chip. 
+		// Fill in zero to make firmware image to dword alignment.
+		_FillDummy(bufferPtr, &size);
+#endif
+
+		pageNums = size / MAX_PAGE_SIZE ;		
+		//RT_ASSERT((pageNums <= 4), ("Page numbers should not greater then 4 \n"));			
+		remainSize = size % MAX_PAGE_SIZE;		
+		
+		for(page = 0; page < pageNums;  page++){
+			offset = page *MAX_PAGE_SIZE;
+			ret = _PageWrite(Adapter,page, (bufferPtr+offset),MAX_PAGE_SIZE);			
+			
+			if(ret == _FAIL)
+				goto exit;
+		}
+		if(remainSize){
+			offset = pageNums *MAX_PAGE_SIZE;
+			page = pageNums;
+			ret = _PageWrite(Adapter,page, (bufferPtr+offset),remainSize);
+
+			if(ret == _FAIL)
+				goto exit;
+		}	
+		//RT_TRACE(COMP_INIT, DBG_LOUD, ("_WriteFW Done- for Normal chip.\n"));
+	}
+	else	{
+		ret = _BlockWrite(Adapter,buffer,size);
+
+		if(ret == _FAIL)
+			goto exit;
+		//RT_TRACE(COMP_INIT, DBG_LOUD, ("_WriteFW Done- for Test chip.\n"));
+	}
+
+exit:
+	return ret;
+}
+
+static int _FWFreeToGo(
+	IN		PADAPTER		Adapter
+	)
+{
+	u32			counter = 0;
+	u32			value32;
+	u32	restarted = _FALSE;
+	
+	// polling CheckSum report
+	do{
+		value32 = rtw_read32(Adapter, REG_MCUFWDL);
+	}while((counter ++ < POLLING_READY_TIMEOUT_COUNT) && (!(value32 & FWDL_ChkSum_rpt)));	
+
+	if(counter >= POLLING_READY_TIMEOUT_COUNT){	
+		DBG_8192C("chksum report faill ! REG_MCUFWDL:0x%08x\n",value32);
+		return _FAIL;
+	} else {
+		//DBG_8192C("chksum report success ! REG_MCUFWDL:0x%08x, counter:%u\n",value32, counter);
+	}
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Checksum report OK ! REG_MCUFWDL:0x%08x .\n",value32));
+
+
+	value32 = rtw_read32(Adapter, REG_MCUFWDL);
+	value32 |= MCUFWDL_RDY;
+	value32 &= ~WINTINI_RDY;
+	rtw_write32(Adapter, REG_MCUFWDL, value32);
+	
+
+POLLING_FW_READY:	
+	// polling for FW ready
+	counter = 0;
+	do
+	{
+		if(rtw_read32(Adapter, REG_MCUFWDL) & WINTINI_RDY){
+			//RT_TRACE(COMP_INIT, DBG_SERIOUS, ("Polling FW ready success!! REG_MCUFWDL:0x%08x .\n",PlatformIORead4Byte(Adapter, REG_MCUFWDL)) );
+			return _SUCCESS;
+		}
+		rtw_udelay_os(5);
+	}while(counter++ < POLLING_READY_TIMEOUT_COUNT);
+
+	DBG_8192C("Polling FW ready fail!! REG_MCUFWDL:0x%08x .\n", rtw_read32(Adapter, REG_MCUFWDL));
+
+	if(restarted == _FALSE) {
+		u8 tmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1);
+		DBG_8192C("Reset 51 write8 REG_SYS_FUNC_EN:0x%04x\n", tmp & ~BIT2);
+		rtw_write8(Adapter, REG_SYS_FUNC_EN+1, tmp & ~BIT2);
+		DBG_8192C("Reset 51 write8 REG_SYS_FUNC_EN:0x%04x\n", tmp|BIT2);
+		rtw_write8(Adapter, REG_SYS_FUNC_EN+1, tmp|BIT2);
+		restarted = _TRUE;
+		goto POLLING_FW_READY;
+	}
+		
+	
+	return _FAIL;
+	
+}
+
+
+VOID
+rtl8192c_FirmwareSelfReset(
+	IN		PADAPTER		Adapter
+)
+{
+	u8	u1bTmp;
+	u8	Delay = 100;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+		
+	if((pHalData->FirmwareVersion > 0x21) ||
+		(pHalData->FirmwareVersion == 0x21 &&
+		pHalData->FirmwareSubVersion >= 0x01)) // after 88C Fw v33.1
+	{
+		//0x1cf=0x20. Inform 8051 to reset. 2009.12.25. tynli_test
+		rtw_write8(Adapter, REG_HMETFR+3, 0x20);
+	
+		u1bTmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1);
+		while(u1bTmp&BIT2)
+		{
+			Delay--;
+			if(Delay == 0)
+				break;
+			rtw_udelay_os(50);
+			u1bTmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1);
+		}
+
+		if((u1bTmp&BIT2) && (Delay == 0))
+		{
+			DBG_8192C("FirmwareDownload92C():fw reset by itself Fail!!!!!! 0x03 = %x\n", u1bTmp);
+			//RT_ASSERT(FALSE, ("PowerOffAdapter8192CE(): 0x03 = %x\n", u1bTmp));
+			#ifdef DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE
+			{
+				u8 val;
+				if( (val=rtw_read8(Adapter, REG_MCUFWDL)))
+					DBG_871X("DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE %s:%d REG_MCUFWDL:0x%02x\n", __FUNCTION__, __LINE__, val);
+			}
+			#endif
+			rtw_write8(Adapter,REG_SYS_FUNC_EN+1,(rtw_read8(Adapter, REG_SYS_FUNC_EN+1)&~BIT2));
+		}
+
+		DBG_8192C("%s =====> 8051 reset success (%d) .\n", __FUNCTION__ ,Delay);
+	}
+}
+
+#ifdef CONFIG_FILE_FWIMG
+extern char *rtw_fw_file_path;
+u8	FwBuffer8192C[FW_8192C_SIZE];
+#endif //CONFIG_FILE_FWIMG
+//
+//	Description:
+//		Download 8192C firmware code.
+//
+//
+int FirmwareDownload92C(
+	IN	PADAPTER			Adapter
+)
+{	
+	int	rtStatus = _SUCCESS;	
+	u8 writeFW_retry = 0;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	s8 			R92CFwImageFileName_TSMC[] ={RTL8192C_FW_TSMC_IMG};
+	s8 			R92CFwImageFileName_UMC[] ={RTL8192C_FW_UMC_IMG};
+	s8 			R92CFwImageFileName_UMC_B[] ={RTL8192C_FW_UMC_B_IMG};
+	//s8 			R8723FwImageFileName_UMC[] ={RTL8723_FW_UMC_IMG};
+	u8*			FwImage = NULL;
+	u32			FwImageLen = 0;
+	char*		pFwImageFileName;	
+	u8*			pucMappedFile = NULL;
+	//vivi, merge 92c and 92s into one driver, 20090817
+	//vivi modify this temply, consider it later!!!!!!!!
+	//PRT_FIRMWARE	pFirmware = GET_FIRMWARE_819X(Adapter);	
+	//PRT_FIRMWARE_92C	pFirmware = GET_FIRMWARE_8192C(Adapter);
+	PRT_FIRMWARE_92C	pFirmware = NULL;
+	PRT_8192C_FIRMWARE_HDR		pFwHdr = NULL;
+	u8		*pFirmwareBuf;
+	u32		FirmwareLen;
+
+	pFirmware = (PRT_FIRMWARE_92C)rtw_zvmalloc(sizeof(RT_FIRMWARE_92C));
+	
+	if(!pFirmware)
+	{
+		rtStatus = _FAIL;
+		goto Exit;
+	}
+
+	if(IS_NORMAL_CHIP(pHalData->VersionID))
+	{
+		if(IS_VENDOR_UMC_A_CUT(pHalData->VersionID) && !IS_92C_SERIAL(pHalData->VersionID))
+		{
+			pFwImageFileName = R92CFwImageFileName_UMC;
+			FwImage = Rtl819XFwUMCACutImageArray;
+			FwImageLen = UMCACutImgArrayLength;
+			DBG_8192C(" ===> FirmwareDownload91C() fw:Rtl819XFwImageArray_UMC\n");
+		}
+		else if(IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID))
+		{
+			// The ROM code of UMC B-cut Fw is the same as TSMC. by tynli. 2011.01.14.
+			pFwImageFileName = R92CFwImageFileName_UMC_B;
+			FwImage = Rtl819XFwUMCBCutImageArray;
+			FwImageLen = UMCBCutImgArrayLength;
+			DBG_8192C(" ===> FirmwareDownload91C() fw:Rtl819XFwImageArray_UMC_B\n");
+		}
+		else
+		{
+			pFwImageFileName = R92CFwImageFileName_TSMC;
+			FwImage = Rtl819XFwTSMCImageArray;
+			FwImageLen = TSMCImgArrayLength;
+			DBG_8192C(" ===> FirmwareDownload91C() fw:Rtl819XFwImageArray_TSMC\n");
+		}
+	}
+	else
+	{
+	#if 0
+		pFwImageFileName = TestChipFwFile;
+		FwImage = Rtl8192CTestFwImg;
+		FwImageLen = Rtl8192CTestFwImgLen;
+		RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> FirmwareDownload91C() fw:Rtl8192CTestFwImg\n"));
+	#endif
+	}
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> FirmwareDownload91C() fw:%s\n", pFwImageFileName));
+
+	#ifdef CONFIG_FILE_FWIMG
+	if(rtw_is_file_readable(rtw_fw_file_path) == _TRUE)
+	{
+		DBG_871X("%s accquire FW from file:%s\n", __FUNCTION__, rtw_fw_file_path);
+		pFirmware->eFWSource = FW_SOURCE_IMG_FILE; // We should decided by Reg.
+	}
+	else
+	#endif //CONFIG_FILE_FWIMG
+	{
+		DBG_871X("%s accquire FW from embedded image\n", __FUNCTION__);
+		pFirmware->eFWSource = FW_SOURCE_HEADER_FILE;
+	}
+
+
+	switch(pFirmware->eFWSource)
+	{
+		case FW_SOURCE_IMG_FILE:
+			
+			#ifdef CONFIG_FILE_FWIMG
+			rtStatus = rtw_retrive_from_file(rtw_fw_file_path, FwBuffer8192C, FW_8192C_SIZE);
+			pFirmware->ulFwLength = rtStatus>=0?rtStatus:0;
+			pFirmware->szFwBuffer = FwBuffer8192C;
+			#endif //CONFIG_FILE_FWIMG
+
+			if(pFirmware->ulFwLength <= 0)
+			{
+				rtStatus = _FAIL;
+				goto Exit;
+			}
+			break;
+		case FW_SOURCE_HEADER_FILE:
+			if(FwImageLen > FW_8192C_SIZE){
+				rtStatus = _FAIL;
+				//RT_TRACE(COMP_INIT, DBG_SERIOUS, ("Firmware size exceed 0x%X. Check it.\n", FW_8192C_SIZE) );
+				DBG_871X("Firmware size exceed 0x%X. Check it.\n", FW_8192C_SIZE);
+				goto Exit;
+			}
+
+			pFirmware->szFwBuffer = FwImage;
+			pFirmware->ulFwLength = FwImageLen;
+			break;
+	}
+
+	#ifdef DBG_FW_STORE_FILE_PATH //used to store firmware to file...
+	if(pFirmware->ulFwLength > 0)
+	{
+		rtw_store_to_file(DBG_FW_STORE_FILE_PATH, pFirmware->szFwBuffer, pFirmware->ulFwLength);
+	}
+	#endif
+
+	pFirmwareBuf = pFirmware->szFwBuffer;
+	FirmwareLen = pFirmware->ulFwLength;
+
+	// To Check Fw header. Added by tynli. 2009.12.04.
+	pFwHdr = (PRT_8192C_FIRMWARE_HDR)pFirmware->szFwBuffer;
+
+	pHalData->FirmwareVersion =  le16_to_cpu(pFwHdr->Version); 
+	pHalData->FirmwareSubVersion = le16_to_cpu(pFwHdr->Subversion); 
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, (" FirmwareVersion(%#x), Signature(%#x)\n", 
+	//	Adapter->MgntInfo.FirmwareVersion, pFwHdr->Signature));
+
+	DBG_8192C("fw_ver=v%d, fw_subver=%d, sig=0x%x\n", 
+		pHalData->FirmwareVersion, pHalData->FirmwareSubVersion, le16_to_cpu(pFwHdr->Signature)&0xFFF0);
+
+	if(IS_FW_HEADER_EXIST(pFwHdr))
+	{
+		//RT_TRACE(COMP_INIT, DBG_LOUD,("Shift 32 bytes for FW header!!\n"));
+		pFirmwareBuf = pFirmwareBuf + 32;
+		FirmwareLen = FirmwareLen -32;
+	}
+		
+	// Suggested by Filen. If 8051 is running in RAM code, driver should inform Fw to reset by itself,
+	// or it will cause download Fw fail. 2010.02.01. by tynli.
+	if(rtw_read8(Adapter, REG_MCUFWDL)&BIT7) //8051 RAM code
+	{	
+		rtl8192c_FirmwareSelfReset(Adapter);
+		rtw_write8(Adapter, REG_MCUFWDL, 0x00);		
+	}
+
+		
+	_FWDownloadEnable(Adapter, _TRUE);
+	while(1) {
+		u8 tmp8;
+		tmp8 = rtw_read8(Adapter, REG_MCUFWDL);
+		
+		//reset the FWDL chksum
+		rtw_write8(Adapter, REG_MCUFWDL, tmp8|FWDL_ChkSum_rpt);
+		
+		//tmp8 = rtw_read8(Adapter, REG_MCUFWDL);
+		//DBG_8192C("Before _WriteFW, REG_MCUFWDL:0x%02x, writeFW_retry:%u\n", tmp8, writeFW_retry);
+		
+		rtStatus = _WriteFW(Adapter, pFirmwareBuf, FirmwareLen);
+		
+		//tmp8 = rtw_read8(Adapter, REG_MCUFWDL);
+		//DBG_8192C("After _WriteFW, REG_MCUFWDL:0x%02x, rtStatus:%d\n", tmp8, rtStatus);
+
+		if(rtStatus == _SUCCESS || ++writeFW_retry>3)
+			break;
+	} 
+	_FWDownloadEnable(Adapter, _FALSE);
+	if(_SUCCESS != rtStatus){
+		DBG_8192C("DL Firmware failed!\n");
+		goto Exit;
+	}
+
+	rtStatus = _FWFreeToGo(Adapter);
+	if(_SUCCESS != rtStatus){
+		DBG_8192C("DL Firmware failed!\n");
+		goto Exit;
+	}	
+	//RT_TRACE(COMP_INIT, DBG_LOUD, (" Firmware is ready to run!\n"));
+
+Exit:
+
+	if(pFirmware) {
+		rtw_vmfree((u8*)pFirmware, sizeof(RT_FIRMWARE_92C));
+	}
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, (" <=== FirmwareDownload91C()\n"));
+	return rtStatus;
+
+}
+
+VOID
+InitializeFirmwareVars92C(
+	IN	PADAPTER		Adapter
+)
+{
+	HAL_DATA_TYPE		*pHalData	= GET_HAL_DATA(Adapter);
+
+	// Init Fw LPS related.
+	Adapter->pwrctrlpriv.bFwCurrentInPSMode = _FALSE;
+
+	//Init H2C counter. by tynli. 2009.12.09.
+	pHalData->LastHMEBoxNum = 0;
+}
+
+#ifdef CONFIG_BT_COEXIST
+static void _update_bt_param(_adapter *padapter)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
+	struct btcoexist_priv	*pbtpriv = &(pHalData->bt_coexist);
+	struct registry_priv	*registry_par = &padapter->registrypriv;
+
+	if(2 != registry_par->bt_iso)
+		pbtpriv->BT_Ant_isolation = registry_par->bt_iso;// 0:Low, 1:High, 2:From Efuse
+
+	if(registry_par->bt_sco == 1) // 0:Idle, 1:None-SCO, 2:SCO, 3:From Counter, 4.Busy, 5.OtherBusy
+		pbtpriv->BT_Service = BT_OtherAction;
+	else if(registry_par->bt_sco==2)
+		pbtpriv->BT_Service = BT_SCO;
+	else if(registry_par->bt_sco==4)
+		pbtpriv->BT_Service = BT_Busy;
+	else if(registry_par->bt_sco==5)
+		pbtpriv->BT_Service = BT_OtherBusy;		
+	else
+		pbtpriv->BT_Service = BT_Idle;
+
+	pbtpriv->BT_Ampdu = registry_par->bt_ampdu;
+	pbtpriv->bCOBT = _TRUE;
+#if 1
+	DBG_8192C("BT Coexistance = %s\n", (pbtpriv->BT_Coexist==_TRUE)?"enable":"disable");
+	if(pbtpriv->BT_Coexist)
+	{
+		if(pbtpriv->BT_Ant_Num == Ant_x2)
+		{
+			DBG_8192C("BlueTooth BT_Ant_Num = Antx2\n");
+		}
+		else if(pbtpriv->BT_Ant_Num == Ant_x1)
+		{
+			DBG_8192C("BlueTooth BT_Ant_Num = Antx1\n");
+		}
+		switch(pbtpriv->BT_CoexistType)
+		{
+			case BT_2Wire:
+				DBG_8192C("BlueTooth BT_CoexistType = BT_2Wire\n");
+				break;
+			case BT_ISSC_3Wire:
+				DBG_8192C("BlueTooth BT_CoexistType = BT_ISSC_3Wire\n");
+				break;
+			case BT_Accel:
+				DBG_8192C("BlueTooth BT_CoexistType = BT_Accel\n");
+				break;
+			case BT_CSR_BC4:
+				DBG_8192C("BlueTooth BT_CoexistType = BT_CSR_BC4\n");
+				break;
+			case BT_RTL8756:
+				DBG_8192C("BlueTooth BT_CoexistType = BT_RTL8756\n");
+				break;
+			default:
+				DBG_8192C("BlueTooth BT_CoexistType = Unknown\n");
+				break;
+		}
+		DBG_8192C("BlueTooth BT_Ant_isolation = %d\n", pbtpriv->BT_Ant_isolation);
+
+
+		switch(pbtpriv->BT_Service)
+		{
+			case BT_OtherAction:
+				DBG_8192C("BlueTooth BT_Service = BT_OtherAction\n");
+				break;
+			case BT_SCO:
+				DBG_8192C("BlueTooth BT_Service = BT_SCO\n");
+				break;
+			case BT_Busy:
+				DBG_8192C("BlueTooth BT_Service = BT_Busy\n");
+				break;
+			case BT_OtherBusy:
+				DBG_8192C("BlueTooth BT_Service = BT_OtherBusy\n");
+				break;			
+			default:
+				DBG_8192C("BlueTooth BT_Service = BT_Idle\n");
+				break;
+		}
+
+		DBG_8192C("BT_RadioSharedType = 0x%x\n", pbtpriv->BT_RadioSharedType);
+	}
+#endif
+
+}
+
+
+#define GET_BT_COEXIST(priv) (&priv->bt_coexist)
+
+void rtl8192c_ReadBluetoothCoexistInfo(
+	IN	PADAPTER	Adapter,	
+	IN	u8*		PROMContent,
+	IN	BOOLEAN		AutoloadFail
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	BOOLEAN			isNormal = IS_NORMAL_CHIP(pHalData->VersionID);
+	struct btcoexist_priv	*pbtpriv = &(pHalData->bt_coexist);
+	u8	rf_opt4;
+
+	if(AutoloadFail){
+		pbtpriv->BT_Coexist = _FALSE;
+		pbtpriv->BT_CoexistType= BT_2Wire;
+		pbtpriv->BT_Ant_Num = Ant_x2;
+		pbtpriv->BT_Ant_isolation= 0;
+		pbtpriv->BT_RadioSharedType = BT_Radio_Shared;		
+		return;
+	}
+
+	if(isNormal)
+	{
+		pbtpriv->BT_Coexist = (((PROMContent[EEPROM_RF_OPT1]&BOARD_TYPE_NORMAL_MASK)>>5) == BOARD_USB_COMBO)?_TRUE:_FALSE;	// bit [7:5]
+		rf_opt4 = PROMContent[EEPROM_RF_OPT4];
+		pbtpriv->BT_CoexistType 		= ((rf_opt4&0xe)>>1);			// bit [3:1]
+		pbtpriv->BT_Ant_Num 		= (rf_opt4&0x1);				// bit [0]
+		pbtpriv->BT_Ant_isolation 	= ((rf_opt4&0x10)>>4);			// bit [4]
+		pbtpriv->BT_RadioSharedType 	= ((rf_opt4&0x20)>>5);			// bit [5]
+	}
+	else
+	{
+		pbtpriv->BT_Coexist = (PROMContent[EEPROM_RF_OPT4] >> 4) ? _TRUE : _FALSE;	
+	}
+	_update_bt_param(Adapter);
+
+}
+#endif
+
+VERSION_8192C
+rtl8192c_ReadChipVersion(
+	IN	PADAPTER	Adapter
+	)
+{
+	u32			value32;
+	//VERSION_8192C	version;
+	u32			ChipVersion=0;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	value32 = rtw_read32(Adapter, REG_SYS_CFG);
+
+	if (value32 & TRP_VAUX_EN)
+	{
+#if 0
+		// Test chip.
+		if(IS_HARDWARE_TYPE_8723(Adapter)) {
+			ChipVersion |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0);
+			ChipVersion |= ((value32 & BT_FUNC) ? CHIP_8723: 0); // RTL8723 with BT function.			
+		}
+		else	 {
+		version = (value32 & TYPE_ID) ?VERSION_TEST_CHIP_92C :VERSION_TEST_CHIP_88C;		
+	}
+#else
+		// tynli_test. 2011.01.10.
+		if(IS_HARDWARE_TYPE_8192C(Adapter))
+		{
+			ChipVersion = (value32 & TYPE_ID) ? VERSION_TEST_CHIP_92C : VERSION_TEST_CHIP_88C;						
+		}
+		else
+		{
+			ChipVersion |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0);
+			ChipVersion |= ((value32 & BT_FUNC) ? CHIP_8723: 0); // RTL8723 with BT function.			
+		}
+#endif
+	}
+	else
+	{
+#if 0
+		// Normal mass production chip.
+		ChipVersion = NORMAL_CHIP;
+#if !RTL8723_FPGA_TRUE_PHY_VERIFICATION
+		ChipVersion |= ((value32 & TYPE_ID) ? CHIP_92C : 0);
+#endif
+		ChipVersion |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0);
+		ChipVersion |= ((value32 & BT_FUNC) ? CHIP_8723: 0); // RTL8723 with BT function.
+		if(IS_8723_SERIES(ChipVersion))
+		{
+			if(IS_VENDOR_UMC(ChipVersion))
+				ChipVersion |= ((value32 & CHIP_VER_RTL_MASK) ? CHIP_VENDOR_UMC_B_CUT : 0);
+		}
+		else
+		{
+			// Mark out by tynli. UMC B-cut IC will not set the SYS_CFG[19] to UMC
+			// because we do not want the custmor to know. 2011.01.11.
+			//if(IS_VENDOR_UMC(ChipVersion))
+			{
+				// To check the value of B-cut. by tynli. 2011.01.11.
+				u1bTmp = (u1Byte)((value32 & CHIP_VER_RTL_MASK)>>12);
+				if(u1bTmp == 1)
+				{	// B-cut
+					ChipVersion |= CHIP_VENDOR_UMC_B_CUT;
+				}
+			}
+		}
+#else
+		// Normal mass production chip.
+		ChipVersion = NORMAL_CHIP;
+//#if !RTL8723_FPGA_TRUE_PHY_VERIFICATION
+		ChipVersion |= ((value32 & TYPE_ID) ? RF_TYPE_2T2R : 0); //92c
+//#endif
+		ChipVersion |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0);
+		ChipVersion |= ((value32 & BT_FUNC) ? CHIP_8723: 0); // RTL8723 with BT function.
+		if(IS_HARDWARE_TYPE_8192C(Adapter))
+		{
+			// 88/92C UMC B-cut IC will not set the SYS_CFG[19] to UMC
+			// because we do not want the custmor to know. by tynli. 2011.01.17.
+			//MSG_8192C("mask result = 0x%x is_UMC %d chipversion 0x%x\n", (value32 & CHIP_VER_RTL_MASK), IS_CHIP_VENDOR_UMC(ChipVersion), ChipVersion);
+			if((!IS_CHIP_VENDOR_UMC(ChipVersion) )&& (value32 & CHIP_VER_RTL_MASK))
+			{
+				//MSG_8192C("chip mask result = 0x%x\n", ((value32 & CHIP_VER_RTL_MASK) | CHIP_VENDOR_UMC));
+				ChipVersion |= ((value32 & CHIP_VER_RTL_MASK) | CHIP_VENDOR_UMC); // IC version (CUT)
+				//MSG_8192C("chip version = 0x%x\n", ChipVersion);
+			}
+		}
+		else
+		{
+			if(IS_CHIP_VENDOR_UMC(ChipVersion))
+				ChipVersion |= ((value32 & CHIP_VER_RTL_MASK)); // IC version (CUT)
+		}
+
+		if(IS_92C_SERIAL(ChipVersion))
+		{
+			value32 = rtw_read32(Adapter, REG_HPON_FSM);
+			ChipVersion |= ((CHIP_BONDING_IDENTIFIER(value32) == CHIP_BONDING_92C_1T2R) ? RF_TYPE_1T2R : 0);			
+		}
+		else if(IS_8723_SERIES(ChipVersion))
+		{
+			//RT_ASSERT(IS_HARDWARE_TYPE_8723(Adapter), ("Incorrect chip version!!\n"));
+			value32 = rtw_read32(Adapter, REG_GPIO_OUTSTS);
+			ChipVersion |= ((value32 & RF_RL_ID)>>20);	 //ROM code version.	
+		}
+#endif
+
+	}
+
+	//version = (VERSION_8192C)ChipVersion;
+
+	// For multi-function consideration. Added by Roger, 2010.10.06.
+	if(IS_8723_SERIES(ChipVersion))
+	{
+		pHalData->MultiFunc = RT_MULTI_FUNC_NONE;
+		value32 = rtw_read32(Adapter, REG_MULTI_FUNC_CTRL);
+		pHalData->MultiFunc =(RT_MULTI_FUNC) (pHalData->MultiFunc| ((value32 & WL_FUNC_EN) ?  RT_MULTI_FUNC_WIFI : 0) );
+		pHalData->MultiFunc =(RT_MULTI_FUNC) (pHalData->MultiFunc| ((value32 & BT_FUNC_EN) ?  RT_MULTI_FUNC_BT : 0) );
+		pHalData->MultiFunc =(RT_MULTI_FUNC) (pHalData->MultiFunc| ((value32 & GPS_FUNC_EN) ?  RT_MULTI_FUNC_GPS : 0) );
+		pHalData->PolarityCtl = ((value32 & WL_HWPDN_SL) ?  RT_POLARITY_HIGH_ACT : RT_POLARITY_LOW_ACT);
+		//MSG_8192C("ReadChipVersion(): MultiFunc(%x), PolarityCtl(%x) \n", pHalData->MultiFunc, pHalData->PolarityCtl);
+
+		//For regulator mode. by tynli. 2011.01.14
+		pHalData->RegulatorMode = ((value32 & TRP_BT_EN) ? RT_LDO_REGULATOR : RT_SWITCHING_REGULATOR);
+		//MSG_8192C("ReadChipVersion(): RegulatorMode(%x) \n", pHalData->RegulatorMode);
+	}
+
+//#if DBG
+#if 1
+	switch(ChipVersion)
+	{
+		case VERSION_NORMAL_TSMC_CHIP_92C_1T2R:
+			MSG_8192C("Chip Version ID: VERSION_NORMAL_TSMC_CHIP_92C_1T2R.\n");
+			break;
+		case VERSION_NORMAL_TSMC_CHIP_92C:
+			MSG_8192C("Chip Version ID: VERSION_NORMAL_TSMC_CHIP_92C.\n");
+			break;
+		case VERSION_NORMAL_TSMC_CHIP_88C:
+			MSG_8192C("Chip Version ID: VERSION_NORMAL_TSMC_CHIP_88C.\n");
+			break;
+		case VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT:
+			MSG_8192C("Chip Version ID: VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT.\n");
+			break;
+		case VERSION_NORMAL_UMC_CHIP_92C_A_CUT:
+			MSG_8192C("Chip Version ID: VERSION_NORMAL_UMC_CHIP_92C_A_CUT.\n");
+			break;
+		case VERSION_NORMAL_UMC_CHIP_88C_A_CUT:
+			MSG_8192C("Chip Version ID: VERSION_NORMAL_UMC_CHIP_88C_A_CUT.\n");
+			break;			
+		case VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT:
+			MSG_8192C("Chip Version ID: VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT.\n");
+			break;
+		case VERSION_NORMAL_UMC_CHIP_92C_B_CUT:
+			MSG_8192C("Chip Version ID: VERSION_NORMAL_UMC_CHIP_92C_B_CUT.\n");
+			break;
+		case VERSION_NORMAL_UMC_CHIP_88C_B_CUT:
+			MSG_8192C("Chip Version ID: VERSION_NORMAL_UMC_CHIP_88C_B_CUT.\n");
+			break;
+		case VERSION_TEST_CHIP_92C:
+			MSG_8192C("Chip Version ID: VERSION_TEST_CHIP_92C.\n");
+			break;
+		case VERSION_TEST_CHIP_88C:
+			MSG_8192C("Chip Version ID: VERSION_TEST_CHIP_88C.\n");
+			break;
+		case VERSION_TEST_UMC_CHIP_8723:
+			MSG_8192C("Chip Version ID: VERSION_TEST_UMC_CHIP_8723.\n");
+			break;
+		case VERSION_NORMAL_UMC_CHIP_8723_1T1R_A_CUT:
+			MSG_8192C("Chip Version ID: VERSION_NORMA_UMC_CHIP_8723_1T1R_A_CUT.\n");
+			break;
+		case VERSION_NORMAL_UMC_CHIP_8723_1T1R_B_CUT:
+			MSG_8192C("Chip Version ID: VERSION_NORMA_UMC_CHIP_8723_1T1R_B_CUT.\n");
+			break;			
+		default:
+			MSG_8192C("Chip Version ID: ???????????????.\n");
+			break;
+	}
+#endif
+
+	pHalData->VersionID = ChipVersion;
+
+	if(IS_1T2R(ChipVersion))
+		pHalData->rf_type = RF_1T2R;
+	else if(IS_2T2R(ChipVersion))
+		pHalData->rf_type = RF_2T2R;
+	else if(IS_8723_SERIES(ChipVersion))
+		pHalData->rf_type = RF_1T1R;
+	else
+		pHalData->rf_type = RF_1T1R;
+
+	MSG_8192C("RF_Type is %x!!\n", pHalData->rf_type);
+
+	return ChipVersion;
+}
+
+
+RT_CHANNEL_DOMAIN
+_HalMapChannelPlan8192C(
+	IN	PADAPTER	Adapter,
+	IN	u8		HalChannelPlan
+	)
+{
+	RT_CHANNEL_DOMAIN	rtChannelDomain;
+
+	switch(HalChannelPlan)
+	{
+#if 0 /* Not using EEPROM_CHANNEL_PLAN directly */
+		case EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN:
+			rtChannelDomain = RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN;
+			break;
+		case EEPROM_CHANNEL_PLAN_WORLD_WIDE_13:
+			rtChannelDomain = RT_CHANNEL_DOMAIN_WORLD_WIDE_13;
+			break;			
+#endif /* Not using EEPROM_CHANNEL_PLAN directly */
+		default:
+			if(HalChannelPlan == 0xFF)
+				rtChannelDomain = RT_CHANNEL_DOMAIN_WORLD_WIDE_13;
+			else
+				rtChannelDomain = (RT_CHANNEL_DOMAIN)HalChannelPlan;
+			break;
+	}
+	
+	return 	rtChannelDomain;
+
+}
+
+u8 GetEEPROMSize8192C(PADAPTER Adapter)
+{
+	u8	size = 0;
+	u32	curRCR;
+
+	curRCR = rtw_read16(Adapter, REG_9346CR);
+	size = (curRCR & BOOT_FROM_EEPROM) ? 6 : 4; // 6: EEPROM used is 93C46, 4: boot from E-Fuse.
+	
+	MSG_8192C("EEPROM type is %s\n", size==4 ? "E-FUSE" : "93C46");
+	
+	return size;
+}
+
+void rtl8192c_HalSetBrateCfg(
+	IN PADAPTER		Adapter,
+	IN u8			*mBratesOS,
+	OUT u16			*pBrateCfg
+)
+{
+	u8	is_brate;
+	u8	i;
+	u8	brate;
+
+	for(i=0;i<NDIS_802_11_LENGTH_RATES_EX;i++)
+	{
+		is_brate = mBratesOS[i] & IEEE80211_BASIC_RATE_MASK;
+		brate = mBratesOS[i] & 0x7f;
+		if( is_brate )
+		{
+			switch(brate)
+			{
+				case IEEE80211_CCK_RATE_1MB:	*pBrateCfg |= RATE_1M;	break;
+				case IEEE80211_CCK_RATE_2MB:	*pBrateCfg |= RATE_2M;	break;
+				case IEEE80211_CCK_RATE_5MB:	*pBrateCfg |= RATE_5_5M;break;
+				case IEEE80211_CCK_RATE_11MB:	*pBrateCfg |= RATE_11M;	break;
+				case IEEE80211_OFDM_RATE_6MB:	*pBrateCfg |= RATE_6M;	break;
+				case IEEE80211_OFDM_RATE_9MB:	*pBrateCfg |= RATE_9M;	break;
+				case IEEE80211_OFDM_RATE_12MB:	*pBrateCfg |= RATE_12M;	break;
+				case IEEE80211_OFDM_RATE_18MB:	*pBrateCfg |= RATE_18M;	break;
+				case IEEE80211_OFDM_RATE_24MB:	*pBrateCfg |= RATE_24M;	break;
+				case IEEE80211_OFDM_RATE_36MB:	*pBrateCfg |= RATE_36M;	break;
+				case IEEE80211_OFDM_RATE_48MB:	*pBrateCfg |= RATE_48M;	break;
+				case IEEE80211_OFDM_RATE_54MB:	*pBrateCfg |= RATE_54M;	break;			
+			}
+		}
+
+	}
+}
+
+void rtl8192c_free_hal_data(_adapter * padapter)
+{
+_func_enter_;
+
+	DBG_8192C("=====> rtl8192c_free_hal_data =====\n");
+
+	if(padapter->HalData)
+		rtw_mfree(padapter->HalData, sizeof(HAL_DATA_TYPE));
+	DBG_8192C("<===== rtl8192c_free_hal_data =====\n");
+
+_func_exit_;
+}
+
+//===========================================================
+//				Efuse related code
+//===========================================================
+enum{
+		VOLTAGE_V25						= 0x03,
+		LDOE25_SHIFT						= 28 ,
+	};
+
+static VOID
+hal_EfusePowerSwitch_RTL8192C(
+	IN	PADAPTER	pAdapter,
+	IN	u8		bWrite,
+	IN	u8		PwrState)
+{
+	u8	tempval;
+	u16	tmpV16;
+
+	if (PwrState == _TRUE)
+	{
+		// 1.2V Power: From VDDON with Power Cut(0x0000h[15]), defualt valid
+		tmpV16 = rtw_read16(pAdapter,REG_SYS_ISO_CTRL);
+		if( ! (tmpV16 & PWC_EV12V ) ){
+			tmpV16 |= PWC_EV12V ;
+			rtw_write16(pAdapter,REG_SYS_ISO_CTRL,tmpV16);
+		}
+		// Reset: 0x0000h[28], default valid
+		tmpV16 =  rtw_read16(pAdapter,REG_SYS_FUNC_EN);
+		if( !(tmpV16 & FEN_ELDR) ){
+			tmpV16 |= FEN_ELDR ;
+			rtw_write16(pAdapter,REG_SYS_FUNC_EN,tmpV16);
+		}
+
+		// Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock from ANA, default valid
+		tmpV16 = rtw_read16(pAdapter,REG_SYS_CLKR);
+		if( (!(tmpV16 & LOADER_CLK_EN) )  ||(!(tmpV16 & ANA8M) ) ){
+			tmpV16 |= (LOADER_CLK_EN |ANA8M ) ;
+			rtw_write16(pAdapter,REG_SYS_CLKR,tmpV16);
+		}
+
+		if(bWrite == _TRUE)
+		{
+			// Enable LDO 2.5V before read/write action
+			tempval = rtw_read8(pAdapter, EFUSE_TEST+3);
+			tempval &= 0x0F;
+			tempval |= (VOLTAGE_V25 << 4);
+			rtw_write8(pAdapter, EFUSE_TEST+3, (tempval | 0x80));
+		}
+	}
+	else
+	{
+		if(bWrite == _TRUE){
+			// Disable LDO 2.5V after read/write action
+			tempval = rtw_read8(pAdapter, EFUSE_TEST+3);
+			rtw_write8(pAdapter, EFUSE_TEST+3, (tempval & 0x7F));
+		}
+	}
+}
+
+static VOID
+hal_EfusePowerSwitch_RTL8723(
+	IN	PADAPTER	pAdapter,
+	IN	u8		bWrite,
+	IN	u8		PwrState)
+{
+	u8	tempval;
+	u16	tmpV16;
+
+	if (PwrState == _TRUE)
+	{
+		rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_ON);	
+
+		// 1.2V Power: From VDDON with Power Cut(0x0000h[15]), defualt valid
+		tmpV16 = rtw_read16(pAdapter,REG_SYS_ISO_CTRL);
+		if( ! (tmpV16 & PWC_EV12V ) ){
+			tmpV16 |= PWC_EV12V ;
+			 rtw_write16(pAdapter,REG_SYS_ISO_CTRL,tmpV16);
+		}
+		// Reset: 0x0000h[28], default valid
+		tmpV16 =  rtw_read16(pAdapter,REG_SYS_FUNC_EN);
+		if( !(tmpV16 & FEN_ELDR) ){
+			tmpV16 |= FEN_ELDR ;
+			rtw_write16(pAdapter,REG_SYS_FUNC_EN,tmpV16);
+		}
+
+		// Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock from ANA, default valid
+		tmpV16 = rtw_read16(pAdapter,REG_SYS_CLKR);
+		if( (!(tmpV16 & LOADER_CLK_EN) )  ||(!(tmpV16 & ANA8M) ) ){
+			tmpV16 |= (LOADER_CLK_EN |ANA8M ) ;
+			rtw_write16(pAdapter,REG_SYS_CLKR,tmpV16);
+		}
+
+		if(bWrite == _TRUE)
+		{
+			// Enable LDO 2.5V before read/write action
+			tempval = rtw_read8(pAdapter, EFUSE_TEST+3);
+			tempval &= 0x0F;
+			tempval |= (VOLTAGE_V25 << 4);
+			rtw_write8(pAdapter, EFUSE_TEST+3, (tempval | 0x80));
+		}
+	}
+	else
+	{
+		rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_OFF);
+
+		if(bWrite == _TRUE){
+			// Disable LDO 2.5V after read/write action
+			tempval = rtw_read8(pAdapter, EFUSE_TEST+3);
+			rtw_write8(pAdapter, EFUSE_TEST+3, (tempval & 0x7F));
+		}
+	}	
+}
+
+static VOID
+rtl8192c_EfusePowerSwitch(
+	IN	PADAPTER	pAdapter,
+	IN	u8		bWrite,
+	IN	u8		PwrState)
+{
+	if(IS_HARDWARE_TYPE_8192C(pAdapter))
+	{
+		hal_EfusePowerSwitch_RTL8192C(pAdapter, bWrite, PwrState);
+	}
+	else if(IS_HARDWARE_TYPE_8723(pAdapter))
+	{
+		hal_EfusePowerSwitch_RTL8723(pAdapter, bWrite, PwrState);
+	}	
+}
+
+static VOID
+ReadEFuse_RTL8192C(
+	PADAPTER	Adapter,
+	u16		 _offset,
+	u16 		_size_byte,
+	u8      	*pbuf,
+	IN	BOOLEAN		bPseudoTest
+	)
+{
+	u8	efuseTbl[EFUSE_MAP_LEN];
+	u8	rtemp8[1];
+	u16 	eFuse_Addr = 0;
+	u8  	offset, wren;
+	u16	i, j;
+	u16	eFuseWord[EFUSE_MAX_SECTION][EFUSE_MAX_WORD_UNIT];
+	u16	efuse_utilized = 0;
+	u8	efuse_usage = 0;
+
+	//
+	// Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10.
+	//
+	if((_offset + _size_byte)>EFUSE_MAP_LEN)
+	{// total E-Fuse table is 128bytes
+		//DBG_8192C("ReadEFuse_RTL8192C(): Invalid offset(%#x) with read bytes(%#x)!!\n",_offset, _size_byte);
+		return;
+	}
+
+	// 0. Refresh efuse init map as all oxFF.
+	for (i = 0; i < EFUSE_MAX_SECTION; i++)
+		for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++)
+			eFuseWord[i][j] = 0xFFFF;
+
+
+	//
+	// 1. Read the first byte to check if efuse is empty!!!
+	// 
+	//
+	ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);	
+	if(*rtemp8 != 0xFF)
+	{
+		efuse_utilized++;
+		//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d\n", eFuse_Addr));
+		eFuse_Addr++;
+	}
+
+	//
+	// 2. Read real efuse content. Filter PG header and every section data.
+	//
+	while((*rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN))
+	{
+		// Check PG header for section num.
+		offset = ((*rtemp8 >> 4) & 0x0f);
+
+		if(offset < EFUSE_MAX_SECTION)
+		{
+			// Get word enable value from PG header
+			wren = (*rtemp8 & 0x0f);
+			//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Offset-%d Worden=%x\n", offset, wren));
+
+			for(i=0; i<EFUSE_MAX_WORD_UNIT; i++)
+			{
+				// Check word enable condition in the section				
+				if(!(wren & 0x01))
+				{
+					//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d\n", eFuse_Addr));
+					ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);	eFuse_Addr++;
+					efuse_utilized++;
+					eFuseWord[offset][i] = (*rtemp8 & 0xff);
+					
+
+					if(eFuse_Addr >= EFUSE_REAL_CONTENT_LEN) 
+						break;
+
+					//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d\n", eFuse_Addr));
+					ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);	eFuse_Addr++;
+					efuse_utilized++;
+					eFuseWord[offset][i] |= (((u16)*rtemp8 << 8) & 0xff00);
+
+					if(eFuse_Addr >= EFUSE_REAL_CONTENT_LEN) 
+						break;
+				}
+				
+				wren >>= 1;
+				
+			}
+		}
+
+		//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d\n", eFuse_Addr));
+		// Read next PG header
+		ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);	
+		if(*rtemp8 != 0xFF && (eFuse_Addr < 512))
+		{
+			efuse_utilized++;
+			eFuse_Addr++;
+		}
+	}
+
+	//
+	// 3. Collect 16 sections and 4 word unit into Efuse map.
+	//
+	for(i=0; i<EFUSE_MAX_SECTION; i++)
+	{
+		for(j=0; j<EFUSE_MAX_WORD_UNIT; j++)
+		{
+			efuseTbl[(i*8)+(j*2)]=(eFuseWord[i][j] & 0xff);
+			efuseTbl[(i*8)+((j*2)+1)]=((eFuseWord[i][j] >> 8) & 0xff);
+		}
+	}
+
+	//
+	// 4. Copy from Efuse map to output pointer memory!!!
+	//
+	for(i=0; i<_size_byte; i++)
+	{		
+		pbuf[i] = efuseTbl[_offset+i];
+	}
+
+	//
+	// 5. Calculate Efuse utilization.
+	//
+	efuse_usage = (u8)((efuse_utilized*100)/EFUSE_REAL_CONTENT_LEN);
+	Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_utilized);
+	//Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_EFUSE_USAGE, (pu1Byte)&efuse_usage);
+}
+
+static VOID
+ReadEFuse_RTL8723(
+	PADAPTER	Adapter,
+	u16		 _offset,
+	u16 		_size_byte,
+	u8      	*pbuf,
+	IN	BOOLEAN		bPseudoTest
+	)
+{
+	u8	efuseTbl[EFUSE_MAP_LEN_8723];
+	u16	eFuse_Addr = 0;
+	u8	offset = 0, wden = 0;
+	u16	i, j;
+	u16	eFuseWord[EFUSE_MAX_SECTION_8723][EFUSE_MAX_WORD_UNIT];
+	u16	efuse_utilized = 0;
+	u8	efuse_usage = 0;
+	u8	offset_2_0=0;
+	u8	efuseHeader=0, efuseExtHdr=0, efuseData=0;
+	//
+	// Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10.
+	//
+	if((_offset + _size_byte)>EFUSE_MAP_LEN_8723)
+	{
+		//RT_TRACE(COMP_EFUSE, DBG_LOUD, ("ReadEFuse_RTL8723(): Invalid offset(%#x) with read bytes(%#x)!!\n",_offset, _size_byte));
+		return;
+	}
+
+	// 0. Refresh efuse init map as all oxFF.
+	for (i = 0; i < EFUSE_MAX_SECTION_8723; i++)
+		for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++)
+			eFuseWord[i][j] = 0xFFFF;
+
+	//
+	// 1. Read the first byte to check if efuse is empty!!!
+	// 
+	//
+	ReadEFuseByte(Adapter, eFuse_Addr++, &efuseHeader, bPseudoTest);
+	
+	if(efuseHeader != 0xFF)
+	{
+		efuse_utilized++;
+	}
+	else
+	{
+		//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("EFUSE is empty\n"));
+		return;
+	}
+
+
+	//
+	// 2. Read real efuse content. Filter PG header and every section data.
+	//
+	while((efuseHeader != 0xFF) && AVAILABLE_EFUSE_ADDR(eFuse_Addr))
+	{
+		//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse[%d]=%x\n", eFuse_Addr-1, efuseHeader));
+	
+		// Check PG header for section num.
+		if(EXT_HEADER(efuseHeader))		//extended header
+		{
+			offset_2_0 = GET_HDR_OFFSET_2_0(efuseHeader);
+			//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header offset_2_0=%x\n", offset_2_0));
+
+			ReadEFuseByte(Adapter, eFuse_Addr++, &efuseExtHdr, bPseudoTest);
+
+			//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse[%d]=%x\n", eFuse_Addr-1, efuseExtHdr));
+
+			if(efuseExtHdr != 0xff)
+			{
+				efuse_utilized++;
+				if(ALL_WORDS_DISABLED(efuseExtHdr))
+				{
+					ReadEFuseByte(Adapter, eFuse_Addr++, &efuseHeader, bPseudoTest);
+					if(efuseHeader != 0xff)
+					{
+						efuse_utilized++;
+					}
+					continue;
+				}
+				else
+				{
+					offset = ((efuseExtHdr & 0xF0) >> 1) | offset_2_0;
+					wden = (efuseExtHdr & 0x0F);
+				}
+			}
+			else
+			{
+				//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Error condition, extended = 0xff\n"));
+				// We should handle this condition.
+			}
+		}
+		else
+		{
+			offset = ((efuseHeader >> 4) & 0x0f);
+			wden = (efuseHeader & 0x0f);
+		}
+
+		if(offset < EFUSE_MAX_SECTION_8723)
+		{
+			// Get word enable value from PG header
+			//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Offset-%d Worden=%x\n", offset, wden));
+
+			for(i=0; i<EFUSE_MAX_WORD_UNIT; i++)
+			{
+				// Check word enable condition in the section				
+				if(!(wden & (0x01<<i)))
+				{
+					ReadEFuseByte(Adapter, eFuse_Addr++, &efuseData, bPseudoTest);
+					//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse[%d]=%x\n", eFuse_Addr-1, efuseData));
+					efuse_utilized++;
+					eFuseWord[offset][i] = (efuseData & 0xff);
+
+					if(!AVAILABLE_EFUSE_ADDR(eFuse_Addr))
+						break;
+
+					ReadEFuseByte(Adapter, eFuse_Addr++, &efuseData, bPseudoTest);
+					//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse[%d]=%x\n", eFuse_Addr-1, efuseData));
+					efuse_utilized++;
+					eFuseWord[offset][i] |= (((u16)efuseData << 8) & 0xff00);
+
+					if(!AVAILABLE_EFUSE_ADDR(eFuse_Addr)) 
+						break;
+				}
+			}
+		}
+
+		// Read next PG header
+		ReadEFuseByte(Adapter, eFuse_Addr++, &efuseHeader, bPseudoTest);
+
+		if(efuseHeader != 0xFF)
+		{
+			efuse_utilized++;
+		}
+	}
+
+	//
+	// 3. Collect 16 sections and 4 word unit into Efuse map.
+	//
+	for(i=0; i<EFUSE_MAX_SECTION_8723; i++)
+	{
+		for(j=0; j<EFUSE_MAX_WORD_UNIT; j++)
+		{
+			efuseTbl[(i*8)+(j*2)]=(eFuseWord[i][j] & 0xff);
+			efuseTbl[(i*8)+((j*2)+1)]=((eFuseWord[i][j] >> 8) & 0xff);
+		}
+	}
+
+	//
+	// 4. Copy from Efuse map to output pointer memory!!!
+	//
+	for(i=0; i<_size_byte; i++)
+	{		
+		pbuf[i] = efuseTbl[_offset+i];
+	}
+
+	//
+	// 5. Calculate Efuse utilization.
+	//
+	efuse_usage = (u8)((efuse_utilized*100)/EFUSE_REAL_CONTENT_LEN);
+	Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_utilized);
+	//Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_EFUSE_USAGE, (pu1Byte)&efuse_usage);
+}
+
+static BOOLEAN
+Hal_EfuseSwitchToBank(
+	IN		PADAPTER	pAdapter,
+	IN		u8			bank,
+	IN		BOOLEAN		bPseudoTest
+	)
+{
+	BOOLEAN		bRet = _FALSE;
+	u32		value32=0;
+
+	//RTPRINT(FEEPROM, EFUSE_PG, ("Efuse switch bank to %d\n", bank));
+	if(bPseudoTest)
+	{
+		fakeEfuseBank = bank;
+		bRet = _TRUE;
+	}
+	else
+	{
+		if(IS_HARDWARE_TYPE_8723(pAdapter) && 
+			INCLUDE_MULTI_FUNC_BT(pAdapter))
+		{		
+			value32 = rtw_read32(pAdapter, EFUSE_TEST);
+			bRet = _TRUE;
+			switch(bank)
+			{
+			case 0:
+				value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0);
+				break;
+			case 1:
+				value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_0);
+				break;
+			case 2:
+				value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_1);
+				break;
+			case 3:
+				value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_2);
+				break;
+			default:
+				value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0);
+				bRet = _FALSE;
+				break;
+			}
+			rtw_write32(pAdapter, EFUSE_TEST, value32);
+		}
+		else
+			bRet = _TRUE;
+	}
+	return bRet;
+}
+
+static VOID
+ReadEFuse_BT(
+	PADAPTER	Adapter,
+	u16		 _offset,
+	u16 		_size_byte,
+	u8      	*pbuf,
+	IN	BOOLEAN	bPseudoTest
+	)
+{
+	u8  	*efuseTbl;
+	u16 	eFuse_Addr = 0;
+	u8  	offset = 0, wden = 0;
+	u16	i, j;
+	u16 	**eFuseWord;
+	u16	efuse_utilized = 0;
+	u8	efuse_usage = 0;
+	u8	offset_2_0=0;
+	u8	efuseHeader=0, efuseExtHdr=0, efuseData=0;
+	u8	bank=0;
+	BOOLEAN	bCheckNextBank=_FALSE;
+
+	efuseTbl = rtw_malloc(EFUSE_BT_MAP_LEN);
+	if(efuseTbl == NULL){
+		DBG_8192C("efuseTbl malloc fail !\n");
+		return;
+	}
+
+	eFuseWord = (u16 **)rtw_zmalloc(sizeof(u16 *)*EFUSE_BT_MAX_SECTION);
+	if(eFuseWord == NULL){
+		DBG_8192C("eFuseWord malloc fail !\n");
+		return;
+	}
+	else{
+		for(i=0;i<EFUSE_BT_MAX_SECTION;i++){
+			eFuseWord[i]= (u16 *)rtw_zmalloc(sizeof(u16)*EFUSE_MAX_WORD_UNIT);
+			if(eFuseWord[i]==NULL){
+				DBG_8192C("eFuseWord[] malloc fail !\n");
+				return;
+			}
+		}
+	}
+
+	//
+	// Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10.
+	//
+	if((_offset + _size_byte)>EFUSE_BT_MAP_LEN)
+	{
+		//RT_TRACE(COMP_EFUSE, DBG_LOUD, ("ReadEFuse_BT(): Invalid offset(%#x) with read bytes(%#x)!!\n",_offset, _size_byte));
+		return;
+	}
+
+	// 0. Refresh efuse init map as all oxFF.
+	for (i = 0; i < EFUSE_BT_MAX_SECTION; i++)
+		for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++)
+			eFuseWord[i][j] = 0xFFFF;
+
+	for(bank=1; bank<EFUSE_MAX_BANK; bank++)
+	{
+		if(!Hal_EfuseSwitchToBank(Adapter, bank, bPseudoTest))
+		{
+			//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Hal_EfuseSwitchToBank() Fail!!\n"));
+			return;
+		}
+		eFuse_Addr = 0;
+		//
+		// 1. Read the first byte to check if efuse is empty!!!
+		// 
+		ReadEFuseByte(Adapter, eFuse_Addr++, &efuseHeader, bPseudoTest);
+		
+		if(efuseHeader != 0xFF)
+		{
+			efuse_utilized++;
+		}
+		else
+		{
+			//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("EFUSE is empty\n"));
+			return;
+		}
+		//
+		// 2. Read real efuse content. Filter PG header and every section data.
+		//
+		while((efuseHeader != 0xFF) && AVAILABLE_EFUSE_ADDR(eFuse_Addr))
+		{
+			//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse[%d]=0x%02x (header)\n", (((bank-1)*EFUSE_REAL_CONTENT_LEN)+eFuse_Addr-1), efuseHeader));
+		
+			// Check PG header for section num.
+			if(EXT_HEADER(efuseHeader))		//extended header
+			{
+				offset_2_0 = GET_HDR_OFFSET_2_0(efuseHeader);
+				//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header offset_2_0=%x\n", offset_2_0));
+
+				ReadEFuseByte(Adapter, eFuse_Addr++, &efuseExtHdr, bPseudoTest);
+
+				//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse[%d]=0x%02x (ext header)\n", (((bank-1)*EFUSE_REAL_CONTENT_LEN)+eFuse_Addr-1), efuseExtHdr));
+
+				if(efuseExtHdr != 0xff)
+				{
+					efuse_utilized++;
+					if(ALL_WORDS_DISABLED(efuseExtHdr))
+					{
+						ReadEFuseByte(Adapter, eFuse_Addr++, &efuseHeader, bPseudoTest);
+						if(efuseHeader != 0xff)
+						{
+							efuse_utilized++;
+						}
+						continue;
+					}
+					else
+					{
+						offset = ((efuseExtHdr & 0xF0) >> 1) | offset_2_0;
+						wden = (efuseExtHdr & 0x0F);
+					}
+				}
+				else
+				{
+					//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Error condition, extended = 0xff\n"));
+					// We should handle this condition.
+				}
+			}
+			else
+			{
+				offset = ((efuseHeader >> 4) & 0x0f);
+				wden = (efuseHeader & 0x0f);
+			}
+
+			if(offset < EFUSE_BT_MAX_SECTION)
+			{
+				// Get word enable value from PG header
+				//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Offset-%d Worden=%x\n", offset, wden));
+
+				for(i=0; i<EFUSE_MAX_WORD_UNIT; i++)
+				{
+					// Check word enable condition in the section				
+					if(!(wden & (0x01<<i)))
+					{
+						ReadEFuseByte(Adapter, eFuse_Addr++, &efuseData, bPseudoTest);
+						//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse[%d]=0x%02x\n", (((bank-1)*EFUSE_REAL_CONTENT_LEN)+eFuse_Addr-1), efuseData));
+						efuse_utilized++;
+						eFuseWord[offset][i] = (efuseData & 0xff);
+
+						if(!AVAILABLE_EFUSE_ADDR(eFuse_Addr))
+							break;
+
+						ReadEFuseByte(Adapter, eFuse_Addr++, &efuseData, bPseudoTest);
+						//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse[%d]=0x%02x\n", (((bank-1)*EFUSE_REAL_CONTENT_LEN)+eFuse_Addr-1), efuseData));
+						efuse_utilized++;
+						eFuseWord[offset][i] |= (((u16)efuseData << 8) & 0xff00);
+
+						if(!AVAILABLE_EFUSE_ADDR(eFuse_Addr)) 
+							break;
+					}
+				}
+			}
+
+			// Read next PG header
+			ReadEFuseByte(Adapter, eFuse_Addr++, &efuseHeader, bPseudoTest);
+
+			if(efuseHeader != 0xFF)
+			{
+				efuse_utilized++;
+			}
+			else
+			{
+				if((eFuse_Addr + EFUSE_PROTECT_BYTES_BANK) >= EFUSE_REAL_CONTENT_LEN)
+					bCheckNextBank = _TRUE;
+				else
+					bCheckNextBank = _FALSE;
+			}
+		}
+		if(!bCheckNextBank)
+		{
+			//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Stop to check next bank\n"));
+			break;
+		}
+	}
+
+	// switch bank back to bank 0 for later BT and wifi use.
+	Hal_EfuseSwitchToBank(Adapter, 0, bPseudoTest);
+		
+	//
+	// 3. Collect 16 sections and 4 word unit into Efuse map.
+	//
+	for(i=0; i<EFUSE_BT_MAX_SECTION; i++)
+	{
+		for(j=0; j<EFUSE_MAX_WORD_UNIT; j++)
+		{
+			efuseTbl[(i*8)+(j*2)]=(eFuseWord[i][j] & 0xff);
+			efuseTbl[(i*8)+((j*2)+1)]=((eFuseWord[i][j] >> 8) & 0xff);
+		}
+	}
+
+	//
+	// 4. Copy from Efuse map to output pointer memory!!!
+	//
+	for(i=0; i<_size_byte; i++)
+	{		
+		pbuf[i] = efuseTbl[_offset+i];
+	}
+	
+	//
+	// 5. Calculate Efuse utilization.
+	//
+	efuse_usage = (u8)((efuse_utilized*100)/EFUSE_BT_REAL_CONTENT_LEN);
+	if(bPseudoTest)
+	{
+		fakeBTEfuseUsedBytes =  (EFUSE_REAL_CONTENT_LEN*(bank-1))+eFuse_Addr-1;
+	}
+	else
+	{
+		BTEfuseUsedBytes =  (EFUSE_REAL_CONTENT_LEN*(bank-1))+eFuse_Addr-1;
+	}
+
+	for(i=0;i<EFUSE_BT_MAX_SECTION;i++)
+		rtw_mfree((u8 *)eFuseWord[i], sizeof(u16)*EFUSE_MAX_WORD_UNIT);
+	rtw_mfree((u8 *)eFuseWord, sizeof(u16 *)*EFUSE_BT_MAX_SECTION);
+	rtw_mfree(efuseTbl, EFUSE_BT_MAP_LEN);
+}
+
+
+static VOID
+ReadEFuseByIC(
+	PADAPTER	Adapter,
+	u8		efuseType,
+	u16		 _offset,
+	u16 		_size_byte,
+	u8      	*pbuf,
+	IN BOOLEAN	bPseudoTest
+	)
+{
+	if(efuseType == EFUSE_WIFI)
+	{
+		if(IS_HARDWARE_TYPE_8192C(Adapter))
+		{
+			ReadEFuse_RTL8192C(Adapter, _offset, _size_byte, pbuf, bPseudoTest);
+		}
+		else if(IS_HARDWARE_TYPE_8723(Adapter))
+		{
+			ReadEFuse_RTL8723(Adapter, _offset, _size_byte, pbuf, bPseudoTest);
+		}
+	}
+	else
+		ReadEFuse_BT(Adapter, _offset, _size_byte, pbuf, bPseudoTest);
+}
+
+static VOID
+ReadEFuse_Pseudo(
+	PADAPTER	Adapter,
+	u8		efuseType,
+	u16		 _offset,
+	u16 		_size_byte,
+	u8      	*pbuf,
+	IN BOOLEAN	bPseudoTest
+	)
+{
+	if(efuseType == EFUSE_WIFI)
+		ReadEFuse_RTL8723(Adapter, _offset, _size_byte, pbuf, bPseudoTest);
+	else
+		ReadEFuse_BT(Adapter, _offset, _size_byte, pbuf, bPseudoTest);
+}
+
+static VOID
+rtl8192c_ReadEFuse(
+	PADAPTER	Adapter,
+	u8		efuseType,
+	u16		_offset,
+	u16 		_size_byte,
+	u8      	*pbuf,
+	IN	BOOLEAN	bPseudoTest
+	)
+{
+	if(bPseudoTest)
+	{
+		ReadEFuse_Pseudo(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest);
+	}
+	else
+	{
+		ReadEFuseByIC(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest);
+	}
+}
+
+static VOID
+Hal_EFUSEGetEfuseDefinition(
+	IN		PADAPTER	pAdapter,
+	IN		u8		efuseType,
+	IN		u8		type,
+	OUT		PVOID		*pOut
+	)
+{
+	switch(type)
+	{
+		case TYPE_EFUSE_MAX_SECTION:
+			{
+				u8	*pMax_section;
+				pMax_section = (u8 *)pOut;
+
+				if(efuseType == EFUSE_WIFI)
+				{
+					if(IS_HARDWARE_TYPE_8192C(pAdapter))
+					{
+						*pMax_section = EFUSE_MAX_SECTION;
+					}
+					else if(IS_HARDWARE_TYPE_8723(pAdapter))
+					{
+						*pMax_section = EFUSE_MAX_SECTION_8723;
+					}
+				}
+				else
+					*pMax_section = EFUSE_BT_MAX_SECTION;
+			}
+			break;
+		case TYPE_EFUSE_REAL_CONTENT_LEN:
+			{
+				u16 *pu2Tmp;
+				pu2Tmp = (u16 *)pOut;
+				if(efuseType == EFUSE_WIFI)
+					*pu2Tmp = EFUSE_REAL_CONTENT_LEN;
+				else
+					*pu2Tmp = EFUSE_BT_REAL_CONTENT_LEN;
+			}
+			break;
+		case TYPE_AVAILABLE_EFUSE_BYTES_BANK:
+			{
+				u16	*pu2Tmp;
+				pu2Tmp = (u16 *)pOut;
+				if(efuseType == EFUSE_WIFI)
+					*pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN-EFUSE_OOB_PROTECT_BYTES);
+				else
+					*pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN-EFUSE_PROTECT_BYTES_BANK);
+			}
+			break;
+		case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL:
+			{
+				u16 *pu2Tmp;
+				pu2Tmp = (u16 *)pOut;
+				if(efuseType == EFUSE_WIFI)
+					*pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN-EFUSE_OOB_PROTECT_BYTES);
+				else
+					*pu2Tmp = (u16)(EFUSE_BT_REAL_CONTENT_LEN-(EFUSE_PROTECT_BYTES_BANK*3));
+			}
+			break;
+		case TYPE_EFUSE_MAP_LEN:
+			{
+				u16 *pu2Tmp;
+				pu2Tmp = (u16 *)pOut;
+
+				if(efuseType == EFUSE_WIFI)
+				{
+					if(IS_HARDWARE_TYPE_8192C(pAdapter))
+					{
+						*pu2Tmp = (u16)EFUSE_MAP_LEN;
+					}
+					else if(IS_HARDWARE_TYPE_8723(pAdapter))
+					{
+						*pu2Tmp = (u16)EFUSE_MAP_LEN_8723;
+					}
+				}
+				else
+					*pu2Tmp = (u16)EFUSE_BT_MAP_LEN;
+			}
+			break;
+		case TYPE_EFUSE_PROTECT_BYTES_BANK:
+			{
+				u8 *pu1Tmp;
+				pu1Tmp = (u8 *)pOut;
+				if(efuseType == EFUSE_WIFI)
+					*pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES);
+				else
+					*pu1Tmp = (u8)(EFUSE_PROTECT_BYTES_BANK);
+			}
+			break;
+		default:
+			{
+				u8 *pu1Tmp;
+				pu1Tmp = (u8 *)pOut;
+				*pu1Tmp = 0;
+			}
+			break;
+	}
+}
+
+static VOID
+Hal_EFUSEGetEfuseDefinition_Pseudo(
+	IN		PADAPTER	pAdapter,
+	IN		u8		efuseType,
+	IN		u8		type,
+	OUT		PVOID		*pOut
+	)
+{
+	switch(type)
+	{
+		case TYPE_EFUSE_MAX_SECTION:
+			{
+				u8	*pMax_section;
+				pMax_section = (u8 *)pOut;
+				if(efuseType == EFUSE_WIFI)
+					*pMax_section = EFUSE_MAX_SECTION_8723;
+				else
+					*pMax_section = EFUSE_BT_MAX_SECTION;
+			}
+			break;
+		case TYPE_EFUSE_REAL_CONTENT_LEN:
+			{
+				u16 *pu2Tmp;
+				pu2Tmp = (u16 *)pOut;
+				if(efuseType == EFUSE_WIFI)
+					*pu2Tmp = EFUSE_REAL_CONTENT_LEN;
+				else
+					*pu2Tmp = EFUSE_BT_REAL_CONTENT_LEN;
+			}
+			break;
+		case TYPE_AVAILABLE_EFUSE_BYTES_BANK:
+			{
+				u16 *pu2Tmp;
+				pu2Tmp = (u16 *)pOut;
+				if(efuseType == EFUSE_WIFI)
+					*pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN-EFUSE_OOB_PROTECT_BYTES);
+				else
+					*pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN-EFUSE_PROTECT_BYTES_BANK);
+			}
+			break;
+		case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL:
+			{
+				u16 *pu2Tmp;
+				pu2Tmp = (u16 *)pOut;
+				if(efuseType == EFUSE_WIFI)
+					*pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN-EFUSE_OOB_PROTECT_BYTES);
+				else
+					*pu2Tmp = (u16)(EFUSE_BT_REAL_CONTENT_LEN-(EFUSE_PROTECT_BYTES_BANK*3));
+			}
+			break;
+		case TYPE_EFUSE_MAP_LEN:
+			{
+				u16 *pu2Tmp;
+				pu2Tmp = (u16 *)pOut;
+				if(efuseType == EFUSE_WIFI)
+					*pu2Tmp = (u16)EFUSE_MAP_LEN_8723;
+				else
+					*pu2Tmp = (u16)EFUSE_BT_MAP_LEN;
+			}
+			break;
+		case TYPE_EFUSE_PROTECT_BYTES_BANK:
+			{
+				u8 *pu1Tmp;
+				pu1Tmp = (u8 *)pOut;
+				if(efuseType == EFUSE_WIFI)
+					*pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES);
+				else
+					*pu1Tmp = (u8)(EFUSE_PROTECT_BYTES_BANK);
+			}
+			break;
+		default:
+			{
+				u8 *pu1Tmp;
+				pu1Tmp = (u8 *)pOut;
+				*pu1Tmp = 0;
+			}
+			break;
+	}
+}
+
+static VOID
+rtl8192c_EFUSE_GetEfuseDefinition(
+	IN		PADAPTER	pAdapter,
+	IN		u8		efuseType,
+	IN		u8		type,
+	OUT		PVOID		*pOut,
+	IN		BOOLEAN		bPseudoTest
+	)
+{
+	if(bPseudoTest)
+	{
+		Hal_EFUSEGetEfuseDefinition_Pseudo(pAdapter, efuseType, type, pOut);
+	}
+	else
+	{
+		Hal_EFUSEGetEfuseDefinition(pAdapter, efuseType, type, pOut);
+	}
+}
+
+static u8
+Hal_EfuseWordEnableDataWrite(	IN	PADAPTER	pAdapter,
+							IN	u16		efuse_addr,
+							IN	u8		word_en, 
+							IN	u8		*data,
+							IN	BOOLEAN		bPseudoTest)
+{		
+	u16	tmpaddr = 0;
+	u16	start_addr = efuse_addr;
+	u8	badworden = 0x0F;
+	u8	tmpdata[8]; 
+	
+	_rtw_memset((PVOID)tmpdata, 0xff, PGPKT_DATA_SIZE);
+	//RT_TRACE(COMP_EFUSE, DBG_LOUD, ("word_en = %x efuse_addr=%x\n", word_en, efuse_addr));
+
+	if(!(word_en&BIT0))
+	{
+		tmpaddr = start_addr;
+		efuse_OneByteWrite(pAdapter,start_addr++, data[0], bPseudoTest);
+		efuse_OneByteWrite(pAdapter,start_addr++, data[1], bPseudoTest);
+
+		efuse_OneByteRead(pAdapter,tmpaddr, &tmpdata[0], bPseudoTest);
+		efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[1], bPseudoTest);
+		if((data[0]!=tmpdata[0])||(data[1]!=tmpdata[1])){
+			badworden &= (~BIT0);
+		}
+	}
+	if(!(word_en&BIT1))
+	{
+		tmpaddr = start_addr;
+		efuse_OneByteWrite(pAdapter,start_addr++, data[2], bPseudoTest);
+		efuse_OneByteWrite(pAdapter,start_addr++, data[3], bPseudoTest);
+				
+		efuse_OneByteRead(pAdapter,tmpaddr    , &tmpdata[2], bPseudoTest);
+		efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[3], bPseudoTest);
+		if((data[2]!=tmpdata[2])||(data[3]!=tmpdata[3])){
+			badworden &=( ~BIT1);
+		}
+	}
+	if(!(word_en&BIT2))
+	{
+		tmpaddr = start_addr;
+		efuse_OneByteWrite(pAdapter,start_addr++, data[4], bPseudoTest);
+		efuse_OneByteWrite(pAdapter,start_addr++, data[5], bPseudoTest);
+
+		efuse_OneByteRead(pAdapter,tmpaddr, &tmpdata[4], bPseudoTest);							
+		efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[5], bPseudoTest);
+		if((data[4]!=tmpdata[4])||(data[5]!=tmpdata[5])){
+			badworden &=( ~BIT2);
+		}
+	}
+	if(!(word_en&BIT3))
+	{
+		tmpaddr = start_addr;
+		efuse_OneByteWrite(pAdapter,start_addr++, data[6], bPseudoTest);
+		efuse_OneByteWrite(pAdapter,start_addr++, data[7], bPseudoTest);
+
+		efuse_OneByteRead(pAdapter,tmpaddr, &tmpdata[6], bPseudoTest);
+		efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[7], bPseudoTest);
+		if((data[6]!=tmpdata[6])||(data[7]!=tmpdata[7])){
+			badworden &=( ~BIT3);
+		}
+	}
+	return badworden;
+}
+
+static u8
+Hal_EfuseWordEnableDataWrite_Pseudo(	IN	PADAPTER	pAdapter,
+							IN	u16		efuse_addr,
+							IN	u8		word_en, 
+							IN	u8		*data,
+							IN	BOOLEAN		bPseudoTest)
+{
+	u8	ret=0;
+	
+	ret = Hal_EfuseWordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest);
+
+	return ret;
+}
+
+static u8
+rtl8192c_Efuse_WordEnableDataWrite(	IN	PADAPTER	pAdapter,
+							IN	u16		efuse_addr,
+							IN	u8		word_en, 
+							IN	u8		*data,
+							IN	BOOLEAN		bPseudoTest)
+{
+	u8	ret=0;
+
+	if(bPseudoTest)
+	{
+		ret = Hal_EfuseWordEnableDataWrite_Pseudo(pAdapter, efuse_addr, word_en, data, bPseudoTest);
+	}
+	else
+	{
+		ret = Hal_EfuseWordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest);
+	}
+	
+	return ret;
+}
+
+
+static u16
+hal_EfuseGetCurrentSize_8192C(IN	PADAPTER	pAdapter,
+	IN		BOOLEAN		bPseudoTest)
+{
+	int bContinual = _TRUE;
+
+	u16	efuse_addr = 0;
+	u8	hoffset=0,hworden=0;	
+	u8	efuse_data,word_cnts=0;
+		
+	while (	bContinual && 
+			efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest) && 
+			(efuse_addr  < EFUSE_REAL_CONTENT_LEN) )
+	{			
+		if(efuse_data!=0xFF)
+		{					
+			hoffset = (efuse_data>>4) & 0x0F;
+			hworden =  efuse_data & 0x0F;									
+			word_cnts = Efuse_CalculateWordCnts(hworden);
+			//read next header							
+			efuse_addr = efuse_addr + (word_cnts*2)+1;						
+		}
+		else
+		{
+			bContinual = _FALSE ;			
+		}
+	}
+
+	return efuse_addr;	
+}
+
+static u16
+Hal_EfuseGetCurrentSize_BT(IN	PADAPTER	pAdapter,
+		IN		BOOLEAN			bPseudoTest)
+{
+	int	bContinual = _TRUE;
+	u16	efuse_addr = 0;
+	u8	hoffset=0,hworden=0;	
+	u8	efuse_data,word_cnts=0;
+	u8	bank=0, startBank=0;
+	u16	retU2=0;
+	u32	total_efuse_used=0;
+
+	if(bPseudoTest)
+	{
+		efuse_addr = (u16)((fakeBTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN));
+		startBank = (u8)(1+(fakeBTEfuseUsedBytes/EFUSE_REAL_CONTENT_LEN));
+	}
+	else
+	{
+		efuse_addr = (u16)((BTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN));
+		startBank = (u8)(1+(BTEfuseUsedBytes/EFUSE_REAL_CONTENT_LEN));
+	}
+
+	if((startBank < 1) || (startBank >= EFUSE_MAX_BANK))
+		DBG_8192C("Error, bank error, bank=%d\n", bank);
+
+	//RTPRINT(FEEPROM, EFUSE_PG, ("Hal_EfuseGetCurrentSize_BT(), start bank=%d, start_efuse_addr = %d\n", startBank, efuse_addr));
+	
+	for(bank=startBank; bank<EFUSE_MAX_BANK; bank++)
+	{
+		if(!Hal_EfuseSwitchToBank(pAdapter, bank, bPseudoTest))
+			break;
+		else
+		{
+			bContinual = _TRUE;
+			if(bank != startBank)	// only when bank is switched we have to reset the efuse_addr.
+				efuse_addr = 0;
+		}
+		
+		while (	bContinual && 
+				efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest) && 
+				AVAILABLE_EFUSE_ADDR(efuse_addr))
+		{			
+			if(efuse_data!=0xFF)
+			{
+				if((efuse_data&0x1F) == 0x0F)		//extended header
+				{
+					hoffset = efuse_data;
+					efuse_addr++;
+					efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest);
+					if((efuse_data & 0x0F) == 0x0F)
+					{
+						efuse_addr++;
+						continue;
+					}
+					else
+					{
+						hoffset = ((hoffset & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
+						hworden = efuse_data & 0x0F;
+					}
+				}		
+				else
+				{
+					hoffset = (efuse_data>>4) & 0x0F;
+					hworden =  efuse_data & 0x0F;									
+				}
+				word_cnts = Efuse_CalculateWordCnts(hworden);
+				//read next header							
+				efuse_addr = efuse_addr + (word_cnts*2)+1;						
+			}
+			else
+			{
+				bContinual = _FALSE ;
+			}
+		}
+
+		// Check if we need to check next bank efuse
+		if(efuse_addr < (EFUSE_REAL_CONTENT_LEN-EFUSE_PROTECT_BYTES_BANK))
+		{
+			break;// don't need to check next bank.
+		}
+	}
+
+	retU2 = ((bank-1)*EFUSE_REAL_CONTENT_LEN)+efuse_addr;
+	if(bPseudoTest)
+	{
+		fakeBTEfuseUsedBytes = retU2;
+		//RTPRINT(FEEPROM, EFUSE_PG, ("Hal_EfuseGetCurrentSize_BT(), return %d\n", fakeBTEfuseUsedBytes));
+	}
+	else
+	{
+		BTEfuseUsedBytes = retU2;
+		//RTPRINT(FEEPROM, EFUSE_PG, ("Hal_EfuseGetCurrentSize_BT(), return %d\n", BTEfuseUsedBytes));
+	}
+
+	return retU2;
+}	
+
+
+static u16
+hal_EfuseGetCurrentSize_8723(IN	PADAPTER	pAdapter,
+		IN		BOOLEAN			bPseudoTest)
+{
+	int	bContinual = _TRUE;
+
+	u16	efuse_addr = 0;
+	u8	hoffset=0,hworden=0;	
+	u8	efuse_data,word_cnts=0;
+
+	if(bPseudoTest)
+	{
+		efuse_addr = (u16)(fakeEfuseUsedBytes);
+	}
+	else
+	{
+		pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr);
+	}
+	//RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723(), start_efuse_addr = %d\n", efuse_addr));
+	
+	while (	bContinual && 
+			efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest) && 
+			AVAILABLE_EFUSE_ADDR(efuse_addr))
+	{			
+		if(efuse_data!=0xFF)
+		{					
+			if((efuse_data&0x1F) == 0x0F)		//extended header
+			{
+				hoffset = efuse_data;
+				efuse_addr++;
+				efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest);
+				if((efuse_data & 0x0F) == 0x0F)
+				{
+					efuse_addr++;
+					continue;
+				}
+				else
+				{
+					hoffset = ((hoffset & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
+					hworden = efuse_data & 0x0F;
+				}
+			}		
+			else
+			{
+				hoffset = (efuse_data>>4) & 0x0F;
+				hworden =  efuse_data & 0x0F;									
+			}
+			word_cnts = Efuse_CalculateWordCnts(hworden);
+			//read next header							
+			efuse_addr = efuse_addr + (word_cnts*2)+1;						
+		}
+		else
+		{
+			bContinual = _FALSE ;			
+		}
+	}
+
+	if(bPseudoTest)
+	{
+		fakeEfuseUsedBytes = efuse_addr;
+		//RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723(), return %d\n", fakeEfuseUsedBytes));
+	}
+	else
+	{
+		pAdapter->HalFunc.SetHwRegHandler(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr);
+		//RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723(), return %d\n", efuse_addr));
+	}
+	
+	return efuse_addr;	
+}	
+
+static u16
+Hal_EfuseGetCurrentSize_Pseudo(IN	PADAPTER	pAdapter,
+		IN		BOOLEAN			bPseudoTest)
+{
+	u16	ret=0;
+	
+	ret = hal_EfuseGetCurrentSize_8723(pAdapter, bPseudoTest);
+
+	return ret;
+}
+
+static u16
+rtl8192c_EfuseGetCurrentSize(
+	IN	PADAPTER	pAdapter,
+	IN	u8			efuseType,
+	IN	BOOLEAN		bPseudoTest)
+{
+	u16	ret=0;
+
+	if(efuseType == EFUSE_WIFI)
+	{
+		if(bPseudoTest)
+		{
+			ret = Hal_EfuseGetCurrentSize_Pseudo(pAdapter, bPseudoTest);
+		}
+		else
+		{
+			if(IS_HARDWARE_TYPE_8192C(pAdapter))
+			{
+				ret = hal_EfuseGetCurrentSize_8192C(pAdapter, bPseudoTest);
+			}
+			else if(IS_HARDWARE_TYPE_8723(pAdapter))
+			{
+				ret = hal_EfuseGetCurrentSize_8723(pAdapter, bPseudoTest);
+			}
+		}
+	}
+	else
+	{
+		ret = Hal_EfuseGetCurrentSize_BT(pAdapter, bPseudoTest);
+	}
+
+	return ret;
+}
+
+static int
+hal_EfusePgPacketRead_8192C(	IN	PADAPTER	pAdapter,
+					IN	u8			offset,
+					IN	u8			*data,
+					IN	BOOLEAN			bPseudoTest)
+{	
+	u8	ReadState = PG_STATE_HEADER;	
+	
+	int	bContinual = _TRUE;
+	int	bDataEmpty = _TRUE ;	
+
+	u8	efuse_data,word_cnts=0;
+	u16	efuse_addr = 0;
+	u8	hoffset=0,hworden=0;	
+	u8	tmpidx=0;
+	u8	tmpdata[8];
+	
+	if(data==NULL)	return _FALSE;
+	if(offset>15)		return _FALSE;	
+	
+
+	_rtw_memset((PVOID)data, 0xff, sizeof(u8)*PGPKT_DATA_SIZE);
+	_rtw_memset((PVOID)tmpdata, 0xff, sizeof(u8)*PGPKT_DATA_SIZE);
+	
+	//
+	// <Roger_TODO> Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP.
+	// Skip dummy parts to prevent unexpected data read from Efuse.
+	// By pass right now. 2009.02.19.
+	//
+	while(bContinual && (efuse_addr  < EFUSE_REAL_CONTENT_LEN) )
+	{			
+		//-------  Header Read -------------
+		if(ReadState & PG_STATE_HEADER)
+		{
+			if(efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest)&&(efuse_data!=0xFF)){				
+				hoffset = (efuse_data>>4) & 0x0F;
+				hworden =  efuse_data & 0x0F;									
+				word_cnts = Efuse_CalculateWordCnts(hworden);
+				bDataEmpty = _TRUE ;
+
+				if(hoffset==offset){
+					for(tmpidx = 0;tmpidx< word_cnts*2 ;tmpidx++){
+						if(efuse_OneByteRead(pAdapter, efuse_addr+1+tmpidx ,&efuse_data, bPseudoTest) ){
+							tmpdata[tmpidx] = efuse_data;
+							if(efuse_data!=0xff){						
+								bDataEmpty = _FALSE;
+							}
+						}					
+					}
+					if(bDataEmpty==_FALSE){
+						ReadState = PG_STATE_DATA;							
+					}else{//read next header							
+						efuse_addr = efuse_addr + (word_cnts*2)+1;
+						ReadState = PG_STATE_HEADER; 
+					}
+				}
+				else{//read next header	
+					efuse_addr = efuse_addr + (word_cnts*2)+1;
+					ReadState = PG_STATE_HEADER; 
+				}
+				
+			}
+			else{
+				bContinual = _FALSE ;
+			}
+		}		
+		//-------  Data section Read -------------
+		else if(ReadState & PG_STATE_DATA)
+		{
+			efuse_WordEnableDataRead(hworden,tmpdata,data);
+			efuse_addr = efuse_addr + (word_cnts*2)+1;
+			ReadState = PG_STATE_HEADER; 
+		}
+		
+	}
+		
+	if(	(data[0]==0xff) &&(data[1]==0xff) && (data[2]==0xff)  && (data[3]==0xff) &&
+		(data[4]==0xff) &&(data[5]==0xff) && (data[6]==0xff)  && (data[7]==0xff))
+		return _FALSE;
+	else
+		return _TRUE;
+
+}
+
+static int
+hal_EfusePgPacketRead_8723(	IN	PADAPTER	pAdapter,
+					IN	u8			offset,
+					IN	u8			*data,
+					IN	BOOLEAN			bPseudoTest)
+{	
+	u8	ReadState = PG_STATE_HEADER;	
+	
+	int	bContinual = _TRUE;
+	int	bDataEmpty = _TRUE ;	
+
+	u8	efuse_data,word_cnts=0;
+	u16	efuse_addr = 0;
+	u8	hoffset=0,hworden=0;	
+	u8	tmpidx=0;
+	u8	tmpdata[8];
+	u8	max_section=0;
+	u8	tmp_header = 0;
+
+	EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAX_SECTION, (PVOID)&max_section, bPseudoTest);
+	
+	if(data==NULL)
+		return _FALSE;
+	if(offset>max_section)
+		return _FALSE;
+
+	_rtw_memset((PVOID)data, 0xff, sizeof(u8)*PGPKT_DATA_SIZE);
+	_rtw_memset((PVOID)tmpdata, 0xff, sizeof(u8)*PGPKT_DATA_SIZE);
+	
+	
+	//
+	// <Roger_TODO> Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP.
+	// Skip dummy parts to prevent unexpected data read from Efuse.
+	// By pass right now. 2009.02.19.
+	//
+	while(bContinual && AVAILABLE_EFUSE_ADDR(efuse_addr) )
+	{			
+		//-------  Header Read -------------
+		if(ReadState & PG_STATE_HEADER)
+		{
+			if(efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest)&&(efuse_data!=0xFF))			
+			{
+				if(EXT_HEADER(efuse_data))
+				{
+					tmp_header = efuse_data;
+					efuse_addr++;
+					efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest);
+					if(!ALL_WORDS_DISABLED(efuse_data))
+					{
+						hoffset = ((tmp_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
+						hworden = efuse_data & 0x0F;						
+					}
+					else
+					{
+						DBG_8192C("Error, All words disabled\n");
+						efuse_addr++;
+						continue;
+					}
+				}
+				else	
+				{
+					hoffset = (efuse_data>>4) & 0x0F;
+					hworden =  efuse_data & 0x0F;									
+				}
+				word_cnts = Efuse_CalculateWordCnts(hworden);
+				bDataEmpty = _TRUE ;
+
+				if(hoffset==offset)
+				{
+					for(tmpidx = 0;tmpidx< word_cnts*2 ;tmpidx++)
+					{
+						if(efuse_OneByteRead(pAdapter, efuse_addr+1+tmpidx ,&efuse_data, bPseudoTest) )
+						{
+							tmpdata[tmpidx] = efuse_data;
+							if(efuse_data!=0xff)
+							{						
+								bDataEmpty = _FALSE;
+							}
+						}					
+					}
+					if(bDataEmpty==_FALSE){
+						ReadState = PG_STATE_DATA;							
+					}else{//read next header							
+						efuse_addr = efuse_addr + (word_cnts*2)+1;
+						ReadState = PG_STATE_HEADER; 
+					}
+				}
+				else{//read next header	
+					efuse_addr = efuse_addr + (word_cnts*2)+1;
+					ReadState = PG_STATE_HEADER; 
+				}
+				
+			}
+			else{
+				bContinual = _FALSE ;
+			}
+		}		
+		//-------  Data section Read -------------
+		else if(ReadState & PG_STATE_DATA)
+		{
+			efuse_WordEnableDataRead(hworden,tmpdata,data);
+			efuse_addr = efuse_addr + (word_cnts*2)+1;
+			ReadState = PG_STATE_HEADER; 
+		}
+		
+	}			
+	
+	if(	(data[0]==0xff) &&(data[1]==0xff) && (data[2]==0xff)  && (data[3]==0xff) &&
+		(data[4]==0xff) &&(data[5]==0xff) && (data[6]==0xff)  && (data[7]==0xff))
+		return _FALSE;
+	else
+		return _TRUE;
+
+}
+
+static int
+Hal_EfusePgPacketRead(	IN	PADAPTER	pAdapter,
+					IN	u8			offset,
+					IN	u8			*data,
+					IN	BOOLEAN			bPseudoTest)
+{
+	int	ret=0;
+
+	if(IS_HARDWARE_TYPE_8192C(pAdapter))
+	{
+		ret = hal_EfusePgPacketRead_8192C(pAdapter, offset, data, bPseudoTest);
+	}
+	else if(IS_HARDWARE_TYPE_8723(pAdapter))
+	{
+		ret = hal_EfusePgPacketRead_8723(pAdapter, offset, data, bPseudoTest);
+	}
+
+	return ret;
+}
+
+static int
+Hal_EfusePgPacketRead_Pseudo(	IN	PADAPTER	pAdapter,
+					IN	u8			offset,
+					IN	u8			*data,
+					IN	BOOLEAN		bPseudoTest)
+{
+	int	ret=0;
+	
+	ret = hal_EfusePgPacketRead_8723(pAdapter, offset, data, bPseudoTest);
+
+	return ret;
+}
+
+static int
+rtl8192c_Efuse_PgPacketRead(	IN	PADAPTER	pAdapter,
+					IN	u8			offset,
+					IN	u8			*data,
+					IN	BOOLEAN		bPseudoTest)
+{
+	int	ret=0;
+
+	if(bPseudoTest)
+	{
+		ret = Hal_EfusePgPacketRead_Pseudo(pAdapter, offset, data, bPseudoTest);
+	}
+	else
+	{
+		ret = Hal_EfusePgPacketRead(pAdapter, offset, data, bPseudoTest);
+	}
+
+	return ret;
+}
+
+static BOOLEAN
+hal_EfuseFixHeaderProcess(
+	IN		PADAPTER			pAdapter,
+	IN		u8					efuseType,
+	IN		PPGPKT_STRUCT		pFixPkt,
+	IN		u16					*pAddr,
+	IN		BOOLEAN				bPseudoTest
+)
+{
+	u8	originaldata[8], badworden=0;
+	u16	efuse_addr=*pAddr;
+	u32	PgWriteSuccess=0;
+	
+	_rtw_memset((PVOID)originaldata, 0xff, 8);
+					
+	if(Efuse_PgPacketRead(pAdapter, pFixPkt->offset, originaldata, bPseudoTest))
+	{	//check if data exist
+		badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr+1, pFixPkt->word_en, originaldata, bPseudoTest);
+
+		if(badworden != 0xf)	// write fail
+		{
+			if(efuseType == EFUSE_WIFI)
+				PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pFixPkt->offset, badworden, originaldata, bPseudoTest);
+			else
+				PgWriteSuccess = hal_EfusePgPacketWrite_BT(pAdapter, pFixPkt->offset, badworden, originaldata, bPseudoTest);
+			if(!PgWriteSuccess)
+				return _FALSE;
+			else
+				efuse_addr = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest);
+		}
+		else
+		{
+			efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) +1;
+		}
+	}
+	else
+	{
+		efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) +1;
+	}
+	*pAddr = efuse_addr;
+	return _TRUE;
+}
+
+static BOOLEAN
+hal_EfusePgPacketWrite2ByteHeader(
+	IN			PADAPTER		pAdapter,
+	IN			u8				efuseType,
+	IN			u16				*pAddr,
+	IN			PPGPKT_STRUCT	pTargetPkt,
+	IN			BOOLEAN			bPseudoTest)
+{
+	BOOLEAN		bRet=_FALSE, bContinual=_TRUE;
+	u16	efuse_addr=*pAddr, efuse_max_available_len=0;
+	u8	pg_header=0, tmp_header=0, pg_header_temp=0;
+	u8	repeatcnt=0;
+
+	//RTPRINT(FEEPROM, EFUSE_PG, ("Wirte 2byte header\n"));
+	EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (PVOID)&efuse_max_available_len, bPseudoTest);
+
+	while(efuse_addr < efuse_max_available_len)
+	{
+		pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F;
+		//RTPRINT(FEEPROM, EFUSE_PG, ("pg_header = 0x%x\n", pg_header));
+		efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
+		efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
+
+		while(tmp_header == 0xFF)
+		{
+			if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
+			{
+				//RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for pg_header!!\n"));
+				return _FALSE;
+			}
+
+			efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
+			efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
+		}
+		
+		//to write ext_header
+		if(tmp_header == pg_header)
+		{
+			efuse_addr++;
+			pg_header_temp = pg_header;
+			pg_header = ((pTargetPkt->offset & 0x78) << 1) | pTargetPkt->word_en;
+
+			efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
+			efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
+
+			while(tmp_header == 0xFF)
+			{											
+				if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
+				{
+					//RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for ext_header!!\n"));
+					return _FALSE;
+				}							
+
+				efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
+				efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
+			}
+
+			if((tmp_header & 0x0F) == 0x0F)	//word_en PG fail
+			{
+				if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
+				{
+					//RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for word_en!!\n"));
+					return _FALSE;
+				}
+				else
+				{
+					efuse_addr++;
+					continue;
+				}
+			}
+			else if(pg_header != tmp_header)	//offset PG fail						
+			{
+				PGPKT_STRUCT	fixPkt;
+				//RTPRINT(FEEPROM, EFUSE_PG, ("Error condition for offset PG fail, need to cover the existed data\n"));
+				fixPkt.offset = ((pg_header_temp & 0xE0) >> 5) | ((tmp_header & 0xF0) >> 1);
+				fixPkt.word_en = tmp_header & 0x0F;					
+				fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en);
+				if(!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest))
+					return _FALSE;
+			}
+			else
+			{
+				bRet = _TRUE;
+				break;
+			}
+		}
+		else if ((tmp_header & 0x1F) == 0x0F)		//wrong extended header
+		{
+			efuse_addr+=2;
+			continue;						
+		}
+	}
+
+	*pAddr = efuse_addr;
+	return bRet;
+}
+
+static BOOLEAN
+hal_EfusePgPacketWrite1ByteHeader(
+	IN			PADAPTER		pAdapter, 
+	IN			u8				efuseType,
+	IN			u16				*pAddr,
+	IN			PPGPKT_STRUCT	pTargetPkt,
+	IN			BOOLEAN			bPseudoTest)
+{
+	BOOLEAN		bRet=_FALSE;
+	u8	pg_header=0, tmp_header=0;
+	u16	efuse_addr=*pAddr;
+	u8	repeatcnt=0;
+
+	//RTPRINT(FEEPROM, EFUSE_PG, ("Wirte 1byte header\n"));
+	pg_header = ((pTargetPkt->offset << 4) & 0xf0) |pTargetPkt->word_en;
+	
+	efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
+	efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
+
+	while(tmp_header == 0xFF)
+	{
+		if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
+		{
+			return _FALSE;
+		}
+		efuse_OneByteWrite(pAdapter,efuse_addr, pg_header, bPseudoTest);
+		efuse_OneByteRead(pAdapter,efuse_addr, &tmp_header, bPseudoTest);
+	}
+	
+	if(pg_header == tmp_header)
+	{
+		bRet = _TRUE;
+	}
+	else
+	{
+		PGPKT_STRUCT	fixPkt;
+		//RTPRINT(FEEPROM, EFUSE_PG, ("Error condition for fixed PG packet, need to cover the existed data\n"));
+		fixPkt.offset = (tmp_header>>4) & 0x0F;
+		fixPkt.word_en = tmp_header & 0x0F;					
+		fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en);
+		if(!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest))
+			return _FALSE;
+	}
+	
+	*pAddr = efuse_addr;
+	return bRet;
+}
+
+static BOOLEAN
+hal_EfusePgPacketWriteData(
+	IN			PADAPTER		pAdapter, 
+	IN			u8				efuseType,
+	IN			u16				*pAddr,
+	IN			PPGPKT_STRUCT	pTargetPkt,
+	IN			BOOLEAN			bPseudoTest)
+{
+	BOOLEAN	bRet=_FALSE;
+	u16	efuse_addr=*pAddr;
+	u8	badworden=0;
+	u32	PgWriteSuccess=0;
+
+	badworden = 0x0f;
+	badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr+1, pTargetPkt->word_en, pTargetPkt->data, bPseudoTest);
+	if(badworden == 0x0F)
+	{
+		// write ok
+		//RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgPacketWriteData ok!!\n"));
+		return _TRUE;
+	}
+	else
+	{
+		//RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgPacketWriteData Fail!!\n"));
+		//reorganize other pg packet
+		if(efuseType == EFUSE_WIFI)
+			PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest);
+		else
+			PgWriteSuccess = hal_EfusePgPacketWrite_BT(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest);
+		if(!PgWriteSuccess)
+			return _FALSE;
+		else
+			return _TRUE;
+	}
+
+	return bRet;
+}
+
+static BOOLEAN
+hal_EfusePgPacketWriteHeader(
+	IN			PADAPTER		pAdapter, 
+	IN			u8				efuseType,
+	IN			u16				*pAddr,
+	IN			PPGPKT_STRUCT	pTargetPkt,
+	IN			BOOLEAN			bPseudoTest)
+{
+	BOOLEAN		bRet=_FALSE;
+
+	if(pTargetPkt->offset >= EFUSE_MAX_SECTION_BASE)
+	{
+		bRet = hal_EfusePgPacketWrite2ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest);
+	}
+	else
+	{
+		bRet = hal_EfusePgPacketWrite1ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest);
+	}
+
+	return bRet;
+}
+
+static BOOLEAN
+hal_EfusePgCheckAvailableAddr(
+	IN	PADAPTER	pAdapter,
+	IN	u8			efuseType,
+	IN	BOOLEAN		bPseudoTest
+	)
+{
+	u16	efuse_max_available_len=0;
+	
+	EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&efuse_max_available_len, bPseudoTest);
+	//RTPRINT(FEEPROM, EFUSE_PG, ("efuse_max_available_len = %d\n", efuse_max_available_len));
+
+	if(Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest) >= efuse_max_available_len)
+	{
+		//RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgCheckAvailableAddr error!!\n"));
+		return _FALSE;
+	}
+	return _TRUE;
+}
+
+static VOID
+hal_EfuseConstructPGPkt(
+					IN	u8 				offset,
+					IN	u8				word_en,
+					IN	u8				*pData,
+					IN	PPGPKT_STRUCT	pTargetPkt
+
+)
+{
+	_rtw_memset((PVOID)pTargetPkt->data, 0xFF, sizeof(u8)*8);
+	pTargetPkt->offset = offset;
+	pTargetPkt->word_en= word_en;
+	efuse_WordEnableDataRead(word_en, pData, pTargetPkt->data);
+	pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en);
+
+	//RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseConstructPGPkt(), targetPkt, offset=%d, word_en=0x%x, word_cnts=%d\n", pTargetPkt->offset, pTargetPkt->word_en, pTargetPkt->word_cnts));
+}
+
+static BOOLEAN
+hal_EfuseCheckIfDatafollowed(
+	IN		PADAPTER		pAdapter,
+	IN		u8				word_cnts,
+	IN		u16				startAddr,
+	IN		BOOLEAN			bPseudoTest
+	)
+{
+	BOOLEAN		bRet=_FALSE;
+	u8	i, efuse_data;
+	
+	for(i=0; i<(word_cnts*2) ; i++)
+	{
+		if(efuse_OneByteRead(pAdapter, (startAddr+i) ,&efuse_data, bPseudoTest)&&(efuse_data != 0xFF))
+			bRet = _TRUE;
+	}
+
+	return bRet;
+}
+
+static BOOLEAN
+wordEnMatched(
+	IN	PPGPKT_STRUCT	pTargetPkt,
+	IN	PPGPKT_STRUCT	pCurPkt,
+	IN	u8				*pWden
+)
+{
+	u8	match_word_en = 0x0F;	// default all words are disabled
+	u8	i;
+
+	// check if the same words are enabled both target and current PG packet
+	if( ((pTargetPkt->word_en & BIT0) == 0) &&
+		((pCurPkt->word_en & BIT0) == 0) )
+	{
+		match_word_en &= ~BIT0;				// enable word 0
+	}
+	if( ((pTargetPkt->word_en & BIT1) == 0) &&
+		((pCurPkt->word_en & BIT1) == 0) )
+	{
+		match_word_en &= ~BIT1;				// enable word 1
+	}
+	if( ((pTargetPkt->word_en & BIT2) == 0) &&
+		((pCurPkt->word_en & BIT2) == 0) )
+	{
+		match_word_en &= ~BIT2;				// enable word 2
+	}
+	if( ((pTargetPkt->word_en & BIT3) == 0) &&
+		((pCurPkt->word_en & BIT3) == 0) )
+	{
+		match_word_en &= ~BIT3;				// enable word 3
+	}
+
+	*pWden = match_word_en;
+
+	if(match_word_en != 0xf)
+		return _TRUE;
+	else
+		return _FALSE;
+}
+
+static BOOLEAN
+hal_EfusePartialWriteCheck(
+					IN	PADAPTER		pAdapter,
+					IN	u8				efuseType,
+					IN	u16				*pAddr,
+					IN	PPGPKT_STRUCT	pTargetPkt,
+					IN	BOOLEAN			bPseudoTest
+					)
+{
+	BOOLEAN		bRet=_FALSE;
+	u8	i, efuse_data=0, cur_header=0;
+	u8	new_wden=0, matched_wden=0, badworden=0;
+	u16	startAddr=0, efuse_max_available_len=0, efuse_max=0;
+	PGPKT_STRUCT	curPkt;
+
+	EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (PVOID)&efuse_max_available_len, bPseudoTest);
+	EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&efuse_max, bPseudoTest);
+
+	if(efuseType == EFUSE_WIFI)
+	{
+		if(bPseudoTest)
+		{
+			startAddr = (u16)(fakeEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN);
+		}
+		else
+		{
+			pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&startAddr);
+			startAddr%=EFUSE_REAL_CONTENT_LEN;
+		}
+	}
+	else
+	{
+		if(bPseudoTest)
+		{
+			startAddr = (u16)(fakeBTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN);
+		}
+		else
+		{
+			startAddr = (u16)(BTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN);
+		}
+	}
+	//RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePartialWriteCheck(), startAddr=%d\n", startAddr));
+
+	while(1)
+	{
+		if(startAddr >= efuse_max_available_len) 
+		{
+			bRet = _FALSE;
+			break;
+		}
+		
+		if(efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest) && (efuse_data!=0xFF))
+		{
+			if(EXT_HEADER(efuse_data))
+			{
+				cur_header = efuse_data;
+				startAddr++;
+				efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest);
+				if(ALL_WORDS_DISABLED(efuse_data))
+				{
+					//RTPRINT(FEEPROM, EFUSE_PG, ("Error condition, all words disabled"));
+					bRet = _FALSE;
+					break;
+				}
+				else
+				{
+					curPkt.offset = ((cur_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
+					curPkt.word_en = efuse_data & 0x0F;
+				}
+			}
+			else
+			{
+				cur_header  =  efuse_data;					
+				curPkt.offset = (cur_header>>4) & 0x0F;
+				curPkt.word_en = cur_header & 0x0F;
+			}
+
+			curPkt.word_cnts = Efuse_CalculateWordCnts(curPkt.word_en);
+			// if same header is found but no data followed
+			// write some part of data followed by the header.
+			if( (curPkt.offset == pTargetPkt->offset) && 
+				(!hal_EfuseCheckIfDatafollowed(pAdapter, curPkt.word_cnts, startAddr+1, bPseudoTest)) &&
+				wordEnMatched(pTargetPkt, &curPkt, &matched_wden) )
+			{
+				//RTPRINT(FEEPROM, EFUSE_PG, ("Need to partial write data by the previous wrote header\n"));
+				// Here to write partial data
+				badworden = Efuse_WordEnableDataWrite(pAdapter, startAddr+1, matched_wden, pTargetPkt->data, bPseudoTest);
+				if(badworden != 0x0F)
+				{
+					u32	PgWriteSuccess=0;
+					// if write fail on some words, write these bad words again
+					if(efuseType == EFUSE_WIFI)
+						PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest);
+					else
+						PgWriteSuccess = hal_EfusePgPacketWrite_BT(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest);
+
+					if(!PgWriteSuccess)
+					{
+						bRet = _FALSE;	// write fail, return
+						break;
+					}					
+				}
+				// partial write ok, update the target packet for later use		
+				for(i=0; i<4; i++)
+				{
+					if((matched_wden & (0x1<<i)) == 0)	// this word has been written
+					{
+						pTargetPkt->word_en |= (0x1<<i);	// disable the word
+					}
+				}
+				pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en);
+			}
+			// read from next header
+			startAddr = startAddr + (curPkt.word_cnts*2) +1;	
+		}
+		else
+		{
+			// not used header, 0xff
+			*pAddr = startAddr;
+			//RTPRINT(FEEPROM, EFUSE_PG, ("Started from unused header offset=%d\n", startAddr));
+			bRet = _TRUE;
+			break;
+		}
+	}	
+	return bRet;
+}
+
+static BOOLEAN 
+hal_EfusePgPacketWrite_BT(
+					IN	PADAPTER	pAdapter, 
+					IN	u8 			offset,
+					IN	u8			word_en,
+					IN	u8			*pData,
+					IN	BOOLEAN		bPseudoTest
+					)
+{
+	PGPKT_STRUCT 	targetPkt;
+	u16	startAddr=0;
+	u8	efuseType=EFUSE_BT;
+	
+	if(!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest))
+		return _FALSE;
+
+	hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt);
+
+	if(!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
+		return _FALSE;
+
+	if(!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
+		return _FALSE;
+
+	if(!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
+		return _FALSE;
+
+	return _TRUE;
+}
+
+static BOOLEAN 
+hal_EfusePgPacketWrite_8723(
+					IN	PADAPTER		pAdapter, 
+					IN	u8 			offset,
+					IN	u8			word_en,
+					IN	u8			*pData,
+					IN	BOOLEAN		bPseudoTest
+					)
+{
+	PGPKT_STRUCT 	targetPkt;
+	u16			startAddr=0;
+	u8			efuseType=EFUSE_WIFI;
+	
+	if(!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest))
+		return _FALSE;
+
+	hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt);
+
+	if(!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
+		return _FALSE;
+
+	if(!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
+		return _FALSE;
+
+	if(!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
+		return _FALSE;
+
+	return _TRUE;
+}
+
+static int
+hal_EfusePgPacketWrite_8192C(IN	PADAPTER	pAdapter, 
+					IN	u8 			offset,
+					IN	u8			word_en,
+					IN	u8			*data,
+					IN	BOOLEAN		bPseudoTest)
+{
+	u8	WriteState = PG_STATE_HEADER;		
+
+	int	bContinual = _TRUE,bDataEmpty=_TRUE, bResult = _TRUE;
+	u16	efuse_addr = 0;
+	u8	efuse_data;
+
+	u8	pg_header = 0;
+
+	u8	tmp_word_cnts=0,target_word_cnts=0;
+	u8	tmp_header,match_word_en,tmp_word_en;
+
+	PGPKT_STRUCT target_pkt;	
+	PGPKT_STRUCT tmp_pkt;
+	
+	u8	originaldata[sizeof(u8)*8];
+	u8	tmpindex = 0,badworden = 0x0F;
+
+	static int	repeat_times = 0;
+	u8	efuseType=EFUSE_WIFI;
+
+	//
+	// <Roger_Notes> Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP.
+	// So we have to prevent unexpected data string connection, which will cause
+	// incorrect data auto-load from HW. The total size is equal or smaller than 498bytes
+	// (i.e., offset 0~497, and dummy 1bytes) expected after CP test.
+	// 2009.02.19.
+	//
+	if( Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest) >= (EFUSE_REAL_CONTENT_LEN-EFUSE_OOB_PROTECT_BYTES))
+	{
+		//RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgPacketWrite_8192C(), over size\n"));
+		return _FALSE;
+	}
+
+	// Init the 8 bytes content as 0xff
+	target_pkt.offset = offset;
+	target_pkt.word_en= word_en;
+
+	_rtw_memset((PVOID)target_pkt.data, 0xFF, sizeof(u8)*8);
+	
+	efuse_WordEnableDataRead(word_en,data,target_pkt.data);
+	target_word_cnts = Efuse_CalculateWordCnts(target_pkt.word_en);
+
+	//efuse_reg_ctrl(pAdapter,_TRUE);//power on
+	//RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE Power ON\n"));
+
+	//
+	// <Roger_Notes> Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP.
+	// So we have to prevent unexpected data string connection, which will cause
+	// incorrect data auto-load from HW. Dummy 1bytes is additional.
+	// 2009.02.19.
+	//
+	while( bContinual && (efuse_addr  < (EFUSE_REAL_CONTENT_LEN-EFUSE_OOB_PROTECT_BYTES)) )
+	{
+		
+		if(WriteState==PG_STATE_HEADER)
+		{	
+			bDataEmpty=_TRUE;
+			badworden = 0x0F;		
+			//************  so *******************
+			//RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE PG_STATE_HEADER\n"));
+			if (	efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest) &&
+				(efuse_data!=0xFF))
+			{ 	
+				tmp_header  =  efuse_data;
+				
+				tmp_pkt.offset 	= (tmp_header>>4) & 0x0F;
+				tmp_pkt.word_en 	= tmp_header & 0x0F;					
+				tmp_word_cnts =  Efuse_CalculateWordCnts(tmp_pkt.word_en);
+
+				//************  so-1 *******************
+				if(tmp_pkt.offset  != target_pkt.offset)
+				{
+					efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet
+					#if (EFUSE_ERROE_HANDLE == 1)
+					WriteState = PG_STATE_HEADER;
+					#endif
+				}
+				else
+				{	
+					//************  so-2 *******************
+					for(tmpindex=0 ; tmpindex<(tmp_word_cnts*2) ; tmpindex++)
+					{
+						if(efuse_OneByteRead(pAdapter, (efuse_addr+1+tmpindex) ,&efuse_data, bPseudoTest)&&(efuse_data != 0xFF)){
+							bDataEmpty = _FALSE;	
+						}
+					}	
+					//************  so-2-1 *******************
+					if(bDataEmpty == _FALSE)
+					{						
+						efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet										
+						#if (EFUSE_ERROE_HANDLE == 1)
+						WriteState=PG_STATE_HEADER;
+						#endif
+					}
+					else
+					{//************  so-2-2 *******************
+						match_word_en = 0x0F;
+						if(   !( (target_pkt.word_en&BIT0)|(tmp_pkt.word_en&BIT0)  ))
+						{
+							 match_word_en &= (~BIT0);
+						}	
+						if(   !( (target_pkt.word_en&BIT1)|(tmp_pkt.word_en&BIT1)  ))
+						{
+							 match_word_en &= (~BIT1);
+						}
+						if(   !( (target_pkt.word_en&BIT2)|(tmp_pkt.word_en&BIT2)  ))
+						{
+							 match_word_en &= (~BIT2);
+						}
+						if(   !( (target_pkt.word_en&BIT3)|(tmp_pkt.word_en&BIT3)  ))
+						{
+							 match_word_en &= (~BIT3);
+						}					
+												
+						//************  so-2-2-A *******************
+						if((match_word_en&0x0F)!=0x0F)
+						{							
+							badworden = Efuse_WordEnableDataWrite(pAdapter,efuse_addr+1, tmp_pkt.word_en ,target_pkt.data, bPseudoTest);
+							
+							//************  so-2-2-A-1 *******************
+							//############################
+							if(0x0F != (badworden&0x0F))
+							{														
+								u8	reorg_offset = offset;
+								u8	reorg_worden=badworden;								
+								Efuse_PgPacketWrite(pAdapter,reorg_offset,reorg_worden,originaldata, bPseudoTest);
+							}	
+							//############################						
+
+							tmp_word_en = 0x0F;	
+							if(  (target_pkt.word_en&BIT0)^(match_word_en&BIT0)  )
+							{
+								tmp_word_en &= (~BIT0);
+							}
+							if(   (target_pkt.word_en&BIT1)^(match_word_en&BIT1) )
+							{
+								tmp_word_en &=  (~BIT1);
+							}
+							if(   (target_pkt.word_en&BIT2)^(match_word_en&BIT2) )
+							{
+								tmp_word_en &= (~BIT2);
+							}						
+							if(   (target_pkt.word_en&BIT3)^(match_word_en&BIT3) )
+							{
+								tmp_word_en &=(~BIT3);
+							}							
+						
+							//************  so-2-2-A-2 *******************	
+							if((tmp_word_en&0x0F)!=0x0F){
+								//reorganize other pg packet						
+								//efuse_addr = efuse_addr + (2*tmp_word_cnts) +1;//next pg packet addr							
+								efuse_addr = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest);
+								//===========================
+								target_pkt.offset = offset;
+								target_pkt.word_en= tmp_word_en;					
+								//===========================
+							}else{								
+								bContinual = _FALSE;
+							}
+							#if (EFUSE_ERROE_HANDLE == 1)
+							WriteState=PG_STATE_HEADER;
+							repeat_times++;
+							if(repeat_times>EFUSE_REPEAT_THRESHOLD_){
+								bContinual = _FALSE;
+								bResult = _FALSE;
+							}
+							#endif
+						}
+						else{//************  so-2-2-B *******************
+							//reorganize other pg packet						
+							efuse_addr = efuse_addr + (2*tmp_word_cnts) +1;//next pg packet addr							
+							//===========================
+							target_pkt.offset = offset;
+							target_pkt.word_en= target_pkt.word_en;					
+							//===========================			
+							#if (EFUSE_ERROE_HANDLE == 1)
+							WriteState=PG_STATE_HEADER;
+							#endif
+						}		
+					}				
+				}				
+				//RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE PG_STATE_HEADER-1\n"));
+			}
+			else		//************  s1: header == oxff  *******************
+			{
+				pg_header = ((target_pkt.offset << 4)&0xf0) |target_pkt.word_en;
+
+				efuse_OneByteWrite(pAdapter,efuse_addr, pg_header, bPseudoTest);
+				efuse_OneByteRead(pAdapter,efuse_addr, &tmp_header, bPseudoTest);
+		
+				if(tmp_header == pg_header)
+				{ //************  s1-1*******************								
+					WriteState = PG_STATE_DATA;						
+				}				
+				#if (EFUSE_ERROE_HANDLE == 1)
+				else if(tmp_header == 0xFF){//************  s1-3: if Write or read func doesn't work *******************		
+					//efuse_addr doesn't change
+					WriteState = PG_STATE_HEADER;					
+					repeat_times++;
+					if(repeat_times>EFUSE_REPEAT_THRESHOLD_){
+						bContinual = _FALSE;
+						bResult = _FALSE;
+					}
+				}
+				#endif
+				else
+				{//************  s1-2 : fixed the header procedure *******************							
+					tmp_pkt.offset = (tmp_header>>4) & 0x0F;
+					tmp_pkt.word_en=  tmp_header & 0x0F;					
+					tmp_word_cnts =  Efuse_CalculateWordCnts(tmp_pkt.word_en);
+																											
+					//************  s1-2-A :cover the exist data *******************
+					//memset(originaldata,0xff,sizeof(UINT8)*8);
+					_rtw_memset((PVOID)originaldata, 0xff, sizeof(u8)*8);
+					
+					if(Efuse_PgPacketRead( pAdapter, tmp_pkt.offset,originaldata, bPseudoTest))
+					{	//check if data exist 					
+						//efuse_reg_ctrl(pAdapter,_TRUE);//power on
+						badworden = Efuse_WordEnableDataWrite(pAdapter,efuse_addr+1,tmp_pkt.word_en,originaldata, bPseudoTest);	
+						//############################
+						if(0x0F != (badworden&0x0F))
+						{														
+							u8	reorg_offset = tmp_pkt.offset;
+							u8	reorg_worden=badworden;								
+							Efuse_PgPacketWrite(pAdapter,reorg_offset,reorg_worden,originaldata, bPseudoTest);
+							efuse_addr = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest);	 
+						}
+						//############################
+						else{
+							efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet							
+						}
+					}
+					 //************  s1-2-B: wrong address*******************
+					else
+					{
+						efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet
+					}
+
+					#if (EFUSE_ERROE_HANDLE == 1)
+					WriteState=PG_STATE_HEADER;	
+					repeat_times++;
+					if(repeat_times>EFUSE_REPEAT_THRESHOLD_){
+						bContinual = _FALSE;
+						bResult = _FALSE;
+					}
+					#endif
+					
+					//RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE PG_STATE_HEADER-2\n"));
+				}
+
+			}
+
+		}
+		//write data state
+		else if(WriteState==PG_STATE_DATA) 
+		{	//************  s1-1  *******************
+			//RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE PG_STATE_DATA\n"));
+			badworden = 0x0f;
+			badworden = Efuse_WordEnableDataWrite(pAdapter,efuse_addr+1,target_pkt.word_en,target_pkt.data, bPseudoTest);	
+			if((badworden&0x0F)==0x0F)
+			{ //************  s1-1-A *******************
+				bContinual = _FALSE;
+			}
+			else
+			{//reorganize other pg packet //************  s1-1-B *******************
+				efuse_addr = efuse_addr + (2*target_word_cnts) +1;//next pg packet addr
+										
+				//===========================
+				target_pkt.offset = offset;
+				target_pkt.word_en= badworden;		
+				target_word_cnts =  Efuse_CalculateWordCnts(target_pkt.word_en); 
+				//===========================			
+				#if (EFUSE_ERROE_HANDLE == 1)
+				WriteState=PG_STATE_HEADER;	
+				repeat_times++;
+				if(repeat_times>EFUSE_REPEAT_THRESHOLD_){
+					bContinual = _FALSE;
+					bResult = _FALSE;
+				}
+				#endif
+				//RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE PG_STATE_HEADER-3\n"));
+			}
+		}
+	}
+
+	if(efuse_addr  >= (EFUSE_REAL_CONTENT_LEN-EFUSE_OOB_PROTECT_BYTES))
+	{
+		//RT_TRACE(COMP_EFUSE, DBG_LOUD, ("hal_EfusePgPacketWrite_8192C(): efuse_addr(%#x) Out of size!!\n", efuse_addr));
+	}
+	//efuse_reg_ctrl(pAdapter,_FALSE);//power off
+	
+	return _TRUE;
+}
+
+static int 
+Hal_EfusePgPacketWrite_Pseudo(IN	PADAPTER	pAdapter, 
+					IN	u8 			offset,
+					IN	u8			word_en,
+					IN	u8			*data,
+					IN	BOOLEAN		bPseudoTest)
+{
+	int ret;
+	
+	ret = hal_EfusePgPacketWrite_8723(pAdapter, offset, word_en, data, bPseudoTest);
+
+	return ret;
+}
+
+static int
+Hal_EfusePgPacketWrite(IN	PADAPTER	pAdapter, 
+					IN	u8 			offset,
+					IN	u8			word_en,
+					IN	u8			*data,
+					IN	BOOLEAN		bPseudoTest)
+{
+	int	ret=0;
+
+	if(IS_HARDWARE_TYPE_8192C(pAdapter))
+	{
+		ret = hal_EfusePgPacketWrite_8192C(pAdapter, offset, word_en, data, bPseudoTest);
+	}
+	else if(IS_HARDWARE_TYPE_8723(pAdapter))
+	{
+		ret = hal_EfusePgPacketWrite_8723(pAdapter, offset, word_en, data, bPseudoTest);
+	}
+
+	return ret;
+}
+
+static int 
+rtl8192c_Efuse_PgPacketWrite(IN	PADAPTER	pAdapter, 
+					IN	u8 			offset,
+					IN	u8			word_en,
+					IN	u8			*data,
+					IN	BOOLEAN		bPseudoTest)
+{
+	int	ret;
+
+	if(bPseudoTest)
+	{
+		ret = Hal_EfusePgPacketWrite_Pseudo(pAdapter, offset, word_en, data, bPseudoTest);
+	}
+	else
+	{
+		ret = Hal_EfusePgPacketWrite(pAdapter, offset, word_en, data, bPseudoTest);
+	}
+	return ret;
+}
+
+VOID
+rtl8192c_EfuseParseIDCode(
+	IN	PADAPTER	pAdapter,
+	IN	u8			*hwinfo
+	)
+{
+	EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter);
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	u16			i,EEPROMId;
+	
+	// Checl 0x8129 again for making sure autoload status!!
+	EEPROMId = *((u16 *)&hwinfo[0]);
+	if( le16_to_cpu(EEPROMId) != RTL_EEPROM_ID)
+	{
+		DBG_8192C("EEPROM ID(%#x) is invalid!!\n", EEPROMId);
+		pEEPROM->bautoload_fail_flag = _TRUE;
+	}
+	else
+	{
+		pEEPROM->bautoload_fail_flag = _FALSE;
+	}
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("EEPROM ID = 0x%4x\n", EEPROMId));
+}
+
+void rtl8192c_read_chip_version(PADAPTER	pAdapter)
+{
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(pAdapter);
+	pHalData->VersionID = rtl8192c_ReadChipVersion(pAdapter);
+}
+	
+void rtl8192c_set_hal_ops(struct hal_ops *pHalFunc)
+{
+	pHalFunc->free_hal_data = &rtl8192c_free_hal_data;
+
+	pHalFunc->dm_init = &rtl8192c_init_dm_priv;
+	pHalFunc->dm_deinit = &rtl8192c_deinit_dm_priv;
+	pHalFunc->read_chip_version = &rtl8192c_read_chip_version;
+
+	pHalFunc->set_bwmode_handler = &PHY_SetBWMode8192C;
+	pHalFunc->set_channel_handler = &PHY_SwChnl8192C;
+
+	pHalFunc->hal_dm_watchdog = &rtl8192c_HalDmWatchDog;
+
+	pHalFunc->Add_RateATid = &rtl8192c_Add_RateATid;
+
+#ifdef CONFIG_ANTENNA_DIVERSITY
+	pHalFunc->SwAntDivBeforeLinkHandler = &SwAntDivBeforeLink8192C;
+	pHalFunc->SwAntDivCompareHandler = &SwAntDivCompare8192C;
+#endif
+
+	pHalFunc->read_bbreg = &rtl8192c_PHY_QueryBBReg;
+	pHalFunc->write_bbreg = &rtl8192c_PHY_SetBBReg;
+	pHalFunc->read_rfreg = &rtl8192c_PHY_QueryRFReg;
+	pHalFunc->write_rfreg = &rtl8192c_PHY_SetRFReg;	
+	
+	//Efuse related function
+	pHalFunc->EfusePowerSwitch = &rtl8192c_EfusePowerSwitch;
+	pHalFunc->ReadEFuse = &rtl8192c_ReadEFuse;
+	pHalFunc->EFUSEGetEfuseDefinition = &rtl8192c_EFUSE_GetEfuseDefinition;
+	pHalFunc->EfuseGetCurrentSize = &rtl8192c_EfuseGetCurrentSize;
+	pHalFunc->Efuse_PgPacketRead = &rtl8192c_Efuse_PgPacketRead;
+	pHalFunc->Efuse_PgPacketWrite = &rtl8192c_Efuse_PgPacketWrite;
+	pHalFunc->Efuse_WordEnableDataWrite = &rtl8192c_Efuse_WordEnableDataWrite;
+
+#ifdef DBG_CONFIG_ERROR_DETECT
+	pHalFunc->sreset_init_value = &rtl8192c_sreset_init_value;
+	pHalFunc->sreset_reset_value = &rtl8192c_sreset_reset_value;	
+	pHalFunc->silentreset = &rtl8192c_silentreset_for_specific_platform;
+	pHalFunc->sreset_xmit_status_check = &rtl8192c_sreset_xmit_status_check;
+	pHalFunc->sreset_linked_status_check  = &rtl8192c_sreset_linked_status_check;
+	pHalFunc->sreset_get_wifi_status  = &rtl8192c_sreset_get_wifi_status;
+#endif
+
+#ifdef CONFIG_IOL
+	pHalFunc->IOL_exec_cmds_sync = &rtl8192c_IOL_exec_cmds_sync;
+#endif
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_mp.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_mp.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_mp.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_mp.c	2017-09-23 03:42:49.918675370 +0800
@@ -0,0 +1,1230 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _RTL8192C_MP_C_
+#ifdef CONFIG_MP_INCLUDED
+
+#include <drv_types.h>
+#include <rtw_mp.h>
+
+#ifdef CONFIG_RTL8192C
+#include <rtl8192c_hal.h>
+#endif
+
+
+
+s32 Hal_SetPowerTracking(PADAPTER padapter, u8 enable)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+
+	if (!netif_running(padapter->pnetdev)) {
+		RT_TRACE(_module_mp_, _drv_warning_, ("SetPowerTracking! Fail: interface not opened!\n"));
+		return _FAIL;
+	}
+
+	if (check_fwstate(&padapter->mlmepriv, WIFI_MP_STATE) == _FALSE) {
+		RT_TRACE(_module_mp_, _drv_warning_, ("SetPowerTracking! Fail: not in MP mode!\n"));
+		return _FAIL;
+	}
+
+	if (enable)
+		pdmpriv->TxPowerTrackControl = _TRUE;
+	else
+		pdmpriv->TxPowerTrackControl = _FALSE;
+
+	return _SUCCESS;
+}
+
+void Hal_GetPowerTracking(PADAPTER padapter, u8 *enable)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+
+	*enable = pdmpriv->TxPowerTrackControl;
+}
+
+static void Hal_disable_dm(PADAPTER padapter)
+{
+	u8 v8;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+
+	//3 1. disable firmware dynamic mechanism
+	// disable Power Training, Rate Adaptive
+	v8 = rtw_read8(padapter, REG_BCN_CTRL);
+	v8 &= ~EN_BCN_FUNCTION;
+	rtw_write8(padapter, REG_BCN_CTRL, v8);
+
+	//3 2. disable driver dynamic mechanism
+	// disable Dynamic Initial Gain
+	// disable High Power
+	// disable Power Tracking
+	Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE);
+
+	// enable APK, LCK and IQK but disable power tracking
+	pdmpriv->TxPowerTrackControl = _FALSE;
+	Switch_DM_Func(padapter, DYNAMIC_FUNC_SS, _TRUE);
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:	mpt_SwitchRfSetting
+ *
+ * Overview:	Change RF Setting when we siwthc channel/rate/BW for MP.
+ *
+ * Input:       IN	PADAPTER				pAdapter
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 01/08/2009	MHC		Suggestion from SD3 Willis for 92S series.
+ * 01/09/2009	MHC		Add CCK modification for 40MHZ. Suggestion from SD3.
+ *
+ *---------------------------------------------------------------------------*/
+void Hal_mpt_SwitchRfSetting(PADAPTER pAdapter)
+{
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
+	struct mp_priv *pmp = &pAdapter->mppriv;
+	u8 ChannelToSw = pmp->channel, eRFPath = RF90_PATH_A;
+	u8 ulRateIdx = pmp->rateidx;
+	u8 ulbandwidth = pmp->bandwidth;
+	PMPT_CONTEXT	pMptCtx = &(pAdapter->mppriv.MptCtx);
+    BOOLEAN             bInteralPA = _FALSE;
+    u32				value = 0;
+
+#ifdef CONFIG_USB_HCI
+	if (IS_92C_SERIAL(pHalData->VersionID))
+	{
+		//92CE-VAU (92cu mCard)
+		if( BOARD_MINICARD == pHalData->BoardType)
+		{
+			if (ulRateIdx < MPT_RATE_6M)					// CCK rate
+			{
+				write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400);
+			}
+			else 											//OFDM~MCS rate
+			{
+				write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F000);
+			}
+		}
+		else	//92CU dongle
+		{
+			if (ulRateIdx < MPT_RATE_6M)	// CCK rate
+			{
+				write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400);
+			}
+			else if (ChannelToSw & BIT0)	// OFDM rate, odd number channel
+			{
+				write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F200);
+			}
+			else if (ChannelToSw == 4)	// OFDM rate, even number channel
+			{
+				write_rfreg(pAdapter, 0, RF_SYN_G2, 0x28200);
+				write_rfreg(pAdapter, 0, RF_SYN_G6, 0xe0004);
+				write_rfreg(pAdapter, 0, RF_SYN_G7, 0x709);
+				rtw_msleep_os(1);
+				write_rfreg(pAdapter, 0, RF_SYN_G7, 0x4B333);
+			}
+			else if(ChannelToSw == 10)	// OFDM rate, even number channel
+			{
+				write_rfreg(pAdapter, 0, RF_SYN_G2, 0x28000);
+				write_rfreg(pAdapter, 0, RF_SYN_G6, 0xe000A);
+				write_rfreg(pAdapter, 0, RF_SYN_G7, 0x709);
+				rtw_msleep_os(1);
+				write_rfreg(pAdapter, 0, RF_SYN_G7, 0x7B333);
+			}
+			else if(ChannelToSw == 12)	// OFDM rate, even number channel
+			{
+				write_rfreg(pAdapter, 0, RF_SYN_G2, 0x28200);
+				write_rfreg(pAdapter, 0, RF_SYN_G6, 0xe000C);
+				write_rfreg(pAdapter, 0, RF_SYN_G7, 0x50B);
+				rtw_msleep_os(1);
+				write_rfreg(pAdapter, 0, RF_SYN_G7, 0x4B333);
+			}
+			else
+			{
+				write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F200);
+			}
+		}
+	}
+	else	//88cu
+	{
+
+		//mcard interface
+
+		if( BOARD_MINICARD == pHalData->BoardType)
+		{
+			if (ulRateIdx < MPT_RATE_6M)	// CCK rate
+			{
+				write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400);
+			}
+			else 	//OFDM~MCS rate
+			{
+				write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F200);
+			}
+
+			if(ChannelToSw == 6 || ChannelToSw == 8)
+			{
+				write_bbreg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, 0x22);
+				write_bbreg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, 0x22);
+				write_bbreg(pAdapter, rOFDM0_RxDetector1, bMaskByte0, 0x4F);
+			}
+			else
+			{
+				write_bbreg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, 0x20);
+				write_bbreg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, 0x20);
+				write_bbreg(pAdapter, rOFDM0_RxDetector1, bMaskByte0, pMptCtx->backup0xc30);
+			}
+		}
+		else
+		{
+			if (ulRateIdx < MPT_RATE_6M)	// CCK rate
+			{
+				write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400);
+			}
+			else if (ChannelToSw & BIT0)	// OFDM rate, odd number channel
+			{
+				write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F200);
+			}
+			else
+			{
+				write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F000);
+			}
+		}
+	}
+
+#else	//PCI_INTERFACE
+
+	if (ulRateIdx < MPT_RATE_6M)	// CCK rate
+	{
+		write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400);
+	}
+	else	//OFDM~MCS rate
+	{
+		write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F000);
+	}
+	//88CE
+	if(!IS_92C_SERIAL(pHalData->VersionID))
+	{
+		if(ChannelToSw == 6 || ChannelToSw == 8)
+		{
+			write_bbreg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, 0x22);
+			write_bbreg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, 0x22);
+			write_bbreg(pAdapter, rOFDM0_RxDetector1, bMaskByte0, 0x4F);
+		}
+		else
+		{
+			write_bbreg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, pMptCtx->backup0xc50);
+			write_bbreg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, pMptCtx->backup0xc58);
+			write_bbreg(pAdapter, rOFDM0_RxDetector1, bMaskByte0, pMptCtx->backup0xc30);
+		}
+	 }
+
+#endif //CONFIG_USB_HCI
+
+
+}
+/*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/
+
+/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/
+void Hal_MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14)
+{
+	u32		TempVal = 0, TempVal2 = 0, TempVal3 = 0;
+	u32		CurrCCKSwingVal = 0, CCKSwingIndex = 12;
+	u8		i;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+
+	// get current cck swing value and check 0xa22 & 0xa23 later to match the table.
+	CurrCCKSwingVal = read_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord);
+
+	if (!bInCH14)
+	{
+		// Readback the current bb cck swing value and compare with the table to
+		// get the current swing index
+		for (i = 0; i < CCK_TABLE_SIZE; i++)
+		{
+			if (((CurrCCKSwingVal&0xff) == (u32)CCKSwingTable_Ch1_Ch13[i][0]) &&
+				(((CurrCCKSwingVal&0xff00)>>8) == (u32)CCKSwingTable_Ch1_Ch13[i][1]))
+			{
+				CCKSwingIndex = i;
+//				RT_TRACE(COMP_INIT, DBG_LOUD,("Ch1~13, Current reg0x%x = 0x%lx, CCKSwingIndex=0x%x\n",
+//					(rCCK0_TxFilter1+2), CurrCCKSwingVal, CCKSwingIndex));
+				break;
+			}
+		}
+
+		//Write 0xa22 0xa23
+		TempVal = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][0] +
+				(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][1]<<8) ;
+
+
+		//Write 0xa24 ~ 0xa27
+		TempVal2 = 0;
+		TempVal2 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][2] +
+				(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][3]<<8) +
+				(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][4]<<16 )+
+				(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][5]<<24);
+
+		//Write 0xa28  0xa29
+		TempVal3 = 0;
+		TempVal3 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][6] +
+				(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][7]<<8) ;
+	}
+	else
+	{
+		for (i = 0; i < CCK_TABLE_SIZE; i++)
+		{
+			if (((CurrCCKSwingVal&0xff) == (u32)CCKSwingTable_Ch14[i][0]) &&
+				(((CurrCCKSwingVal&0xff00)>>8) == (u32)CCKSwingTable_Ch14[i][1]))
+			{
+				CCKSwingIndex = i;
+//				RT_TRACE(COMP_INIT, DBG_LOUD,("Ch14, Current reg0x%x = 0x%lx, CCKSwingIndex=0x%x\n",
+//					(rCCK0_TxFilter1+2), CurrCCKSwingVal, CCKSwingIndex));
+				break;
+			}
+		}
+
+		//Write 0xa22 0xa23
+		TempVal = CCKSwingTable_Ch14[CCKSwingIndex][0] +
+				(CCKSwingTable_Ch14[CCKSwingIndex][1]<<8) ;
+
+		//Write 0xa24 ~ 0xa27
+		TempVal2 = 0;
+		TempVal2 = CCKSwingTable_Ch14[CCKSwingIndex][2] +
+				(CCKSwingTable_Ch14[CCKSwingIndex][3]<<8) +
+				(CCKSwingTable_Ch14[CCKSwingIndex][4]<<16 )+
+				(CCKSwingTable_Ch14[CCKSwingIndex][5]<<24);
+
+		//Write 0xa28  0xa29
+		TempVal3 = 0;
+		TempVal3 = CCKSwingTable_Ch14[CCKSwingIndex][6] +
+				(CCKSwingTable_Ch14[CCKSwingIndex][7]<<8) ;
+	}
+
+	write_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord, TempVal);
+	write_bbreg(Adapter, rCCK0_TxFilter2, bMaskDWord, TempVal2);
+	write_bbreg(Adapter, rCCK0_DebugPort, bMaskLWord, TempVal3);
+}
+
+void Hal_MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven)
+{
+	s32		TempCCk;
+	u8		CCK_index, CCK_index_old;
+	u8		Action = 0;	//0: no action, 1: even->odd, 2:odd->even
+	u8		TimeOut = 100;
+	s32		i = 0;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	PMPT_CONTEXT	pMptCtx = &pAdapter->mppriv.MptCtx;
+
+
+	if (!IS_92C_SERIAL(pHalData->VersionID) || !IS_NORMAL_CHIP(pHalData->VersionID))
+		return;
+#if 0
+	while(PlatformAtomicExchange(&Adapter->IntrCCKRefCount, TRUE) == TRUE)
+	{
+		PlatformSleepUs(100);
+		TimeOut--;
+		if(TimeOut <= 0)
+		{
+			RTPRINT(FINIT, INIT_TxPower,
+			 ("!!!MPT_CCKTxPowerAdjustbyIndex Wait for check CCK gain index too long!!!\n" ));
+			break;
+		}
+	}
+#endif
+	if (beven && !pMptCtx->bMptIndexEven)	//odd->even
+	{
+		Action = 2;
+		pMptCtx->bMptIndexEven = _TRUE;
+	}
+	else if (!beven && pMptCtx->bMptIndexEven)	//even->odd
+	{
+		Action = 1;
+		pMptCtx->bMptIndexEven = _FALSE;
+	}
+
+	if (Action != 0)
+	{
+		//Query CCK default setting From 0xa24
+		TempCCk = read_bbreg(pAdapter, rCCK0_TxFilter2, bMaskDWord) & bMaskCCK;
+		for (i = 0; i < CCK_TABLE_SIZE; i++)
+		{
+			if (pHalData->dmpriv.bCCKinCH14)
+			{
+				if (_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch14[i][2], 4) == _TRUE)
+				{
+					CCK_index_old = (u8) i;
+//					RTPRINT(FINIT, INIT_TxPower,("MPT_CCKTxPowerAdjustbyIndex: Initial reg0x%x = 0x%lx, CCK_index=0x%x, ch 14 %d\n",
+//						rCCK0_TxFilter2, TempCCk, CCK_index_old, pHalData->bCCKinCH14));
+					break;
+				}
+			}
+			else
+			{
+				if (_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch1_Ch13[i][2], 4) == _TRUE)
+				{
+					CCK_index_old = (u8) i;
+//					RTPRINT(FINIT, INIT_TxPower,("MPT_CCKTxPowerAdjustbyIndex: Initial reg0x%x = 0x%lx, CCK_index=0x%x, ch14 %d\n",
+//						rCCK0_TxFilter2, TempCCk, CCK_index_old, pHalData->bCCKinCH14));
+					break;
+				}
+			}
+		}
+
+		if (Action == 1)
+			CCK_index = CCK_index_old - 1;
+		else
+			CCK_index = CCK_index_old + 1;
+
+//		RTPRINT(FINIT, INIT_TxPower,("MPT_CCKTxPowerAdjustbyIndex: new CCK_index=0x%x\n",
+//			 CCK_index));
+
+		//Adjust CCK according to gain index
+		if (!pHalData->dmpriv.bCCKinCH14) {
+			rtw_write8(pAdapter, 0xa22, CCKSwingTable_Ch1_Ch13[CCK_index][0]);
+			rtw_write8(pAdapter, 0xa23, CCKSwingTable_Ch1_Ch13[CCK_index][1]);
+			rtw_write8(pAdapter, 0xa24, CCKSwingTable_Ch1_Ch13[CCK_index][2]);
+			rtw_write8(pAdapter, 0xa25, CCKSwingTable_Ch1_Ch13[CCK_index][3]);
+			rtw_write8(pAdapter, 0xa26, CCKSwingTable_Ch1_Ch13[CCK_index][4]);
+			rtw_write8(pAdapter, 0xa27, CCKSwingTable_Ch1_Ch13[CCK_index][5]);
+			rtw_write8(pAdapter, 0xa28, CCKSwingTable_Ch1_Ch13[CCK_index][6]);
+			rtw_write8(pAdapter, 0xa29, CCKSwingTable_Ch1_Ch13[CCK_index][7]);
+		} else {
+			rtw_write8(pAdapter, 0xa22, CCKSwingTable_Ch14[CCK_index][0]);
+			rtw_write8(pAdapter, 0xa23, CCKSwingTable_Ch14[CCK_index][1]);
+			rtw_write8(pAdapter, 0xa24, CCKSwingTable_Ch14[CCK_index][2]);
+			rtw_write8(pAdapter, 0xa25, CCKSwingTable_Ch14[CCK_index][3]);
+			rtw_write8(pAdapter, 0xa26, CCKSwingTable_Ch14[CCK_index][4]);
+			rtw_write8(pAdapter, 0xa27, CCKSwingTable_Ch14[CCK_index][5]);
+			rtw_write8(pAdapter, 0xa28, CCKSwingTable_Ch14[CCK_index][6]);
+			rtw_write8(pAdapter, 0xa29, CCKSwingTable_Ch14[CCK_index][7]);
+		}
+	}
+#if 0
+	RTPRINT(FINIT, INIT_TxPower,
+	("MPT_CCKTxPowerAdjustbyIndex 0xa20=%x\n", PlatformEFIORead4Byte(Adapter, 0xa20)));
+
+	PlatformAtomicExchange(&Adapter->IntrCCKRefCount, FALSE);
+#endif
+}
+/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/
+
+/*
+ * SetChannel
+ * Description
+ *	Use H2C command to change channel,
+ *	not only modify rf register, but also other setting need to be done.
+ */
+void Hal_SetChannel(PADAPTER pAdapter)
+{
+#if 0
+	struct mp_priv *pmp = &pAdapter->mppriv;
+
+//	SelectChannel(pAdapter, pmp->channel);
+	set_channel_bwmode(pAdapter, pmp->channel, pmp->channel_offset, pmp->bandwidth);
+#else
+	u8 		eRFPath;
+
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct mp_priv	*pmp = &pAdapter->mppriv;
+	u8		channel = pmp->channel;
+	u8		bandwidth = pmp->bandwidth;
+	u8		rate = pmp->rateidx;
+
+
+	// set RF channel register
+	for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++)
+	{
+      if(IS_HARDWARE_TYPE_8192D(pAdapter))
+			_write_rfreg(pAdapter, (RF90_RADIO_PATH_E)eRFPath, rRfChannel, 0xFF, channel);
+		else
+		_write_rfreg(pAdapter, eRFPath, rRfChannel, 0x3FF, channel);
+	}
+	Hal_mpt_SwitchRfSetting(pAdapter);
+
+	SelectChannel(pAdapter, channel);
+
+	if (pHalData->CurrentChannel == 14 && !pHalData->dmpriv.bCCKinCH14) {
+		pHalData->dmpriv.bCCKinCH14 = _TRUE;
+		Hal_MPT_CCKTxPowerAdjust(pAdapter, pHalData->dmpriv.bCCKinCH14);
+	}
+	else if (pHalData->CurrentChannel != 14 && pHalData->dmpriv.bCCKinCH14) {
+		pHalData->dmpriv.bCCKinCH14 = _FALSE;
+		Hal_MPT_CCKTxPowerAdjust(pAdapter, pHalData->dmpriv.bCCKinCH14);
+	}
+#if 0
+//#ifdef CONFIG_USB_HCI
+	// Georgia add 2009-11-17, suggested by Edlu , for 8188CU ,46 PIN
+	if (!IS_92C_SERIAL(pHalData->VersionID) && !IS_NORMAL_CHIP(pHalData->VersionID)) {
+		mpt_AdjustRFRegByRateByChan92CU(pAdapter, rate, pHalData->CurrentChannel, bandwidth);
+	}
+#endif
+
+#endif
+}
+
+/*
+ * Notice
+ *	Switch bandwitdth may change center frequency(channel)
+ */
+void Hal_SetBandwidth(PADAPTER pAdapter)
+{
+	struct mp_priv *pmp = &pAdapter->mppriv;
+
+
+	SetBWMode(pAdapter, pmp->bandwidth, pmp->prime_channel_offset);
+	Hal_mpt_SwitchRfSetting(pAdapter);
+}
+
+void Hal_SetCCKTxPower(PADAPTER pAdapter, u8 *TxPower)
+{
+	u32 tmpval = 0;
+
+
+	// rf-A cck tx power
+	write_bbreg(pAdapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, TxPower[RF_PATH_A]);
+	tmpval = (TxPower[RF_PATH_A]<<16) | (TxPower[RF_PATH_A]<<8) | TxPower[RF_PATH_A];
+	write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval);
+
+	// rf-B cck tx power
+	write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, TxPower[RF_PATH_B]);
+	tmpval = (TxPower[RF_PATH_B]<<16) | (TxPower[RF_PATH_B]<<8) | TxPower[RF_PATH_B];
+	write_bbreg(pAdapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval);
+
+	RT_TRACE(_module_mp_, _drv_notice_,
+		 ("-SetCCKTxPower: A[0x%02x] B[0x%02x]\n",
+		  TxPower[RF_PATH_A], TxPower[RF_PATH_B]));
+}
+
+void Hal_SetOFDMTxPower(PADAPTER pAdapter, u8 *TxPower)
+{
+	u32 TxAGC = 0;
+	u8 tmpval = 0;
+	PMPT_CONTEXT	pMptCtx = &pAdapter->mppriv.MptCtx;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+
+
+	// HT Tx-rf(A)
+	tmpval = TxPower[RF_PATH_A];
+	TxAGC = (tmpval<<24) | (tmpval<<16) | (tmpval<<8) | tmpval;
+
+	write_bbreg(pAdapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC);
+
+	if (pHalData->dmpriv.bAPKdone && !IS_NORMAL_CHIP(pHalData->VersionID))
+	{
+		if (tmpval > pMptCtx->APK_bound[RF_PATH_A])
+			write_rfreg(pAdapter, RF_PATH_A, 0xe, pHalData->dmpriv.APKoutput[0][0]);
+		else
+			write_rfreg(pAdapter, RF_PATH_A, 0xe, pHalData->dmpriv.APKoutput[0][1]);
+	}
+
+	// HT Tx-rf(B)
+	tmpval = TxPower[RF_PATH_B];
+	TxAGC = (tmpval<<24) | (tmpval<<16) | (tmpval<<8) | tmpval;
+
+	write_bbreg(pAdapter, rTxAGC_B_Rate18_06, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_B_Rate54_24, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_B_Mcs03_Mcs00, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_B_Mcs07_Mcs04, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_B_Mcs11_Mcs08, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_B_Mcs15_Mcs12, bMaskDWord, TxAGC);
+
+	if (pHalData->dmpriv.bAPKdone && !IS_NORMAL_CHIP(pHalData->VersionID))
+	{
+		if (tmpval > pMptCtx->APK_bound[RF_PATH_B])
+			write_rfreg(pAdapter, RF_PATH_B, 0xe, pHalData->dmpriv.APKoutput[1][0]);
+		else
+			write_rfreg(pAdapter, RF_PATH_B, 0xe, pHalData->dmpriv.APKoutput[1][1]);
+	}
+
+	RT_TRACE(_module_mp_, _drv_notice_,
+		 ("-SetOFDMTxPower: A[0x%02x] B[0x%02x]\n",
+		  TxPower[RF_PATH_A], TxPower[RF_PATH_B]));
+}
+
+void Hal_SetAntennaPathPower(PADAPTER pAdapter)
+{
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
+	u8 TxPowerLevel[MAX_RF_PATH_NUMS];
+	u8 rfPath;
+
+	TxPowerLevel[RF_PATH_A] = pAdapter->mppriv.txpoweridx;
+	TxPowerLevel[RF_PATH_B] = pAdapter->mppriv.txpoweridx_b;
+
+	switch (pAdapter->mppriv.antenna_tx)
+	{
+		case ANTENNA_A:
+		default:
+			rfPath = RF_PATH_A;
+			break;
+		case ANTENNA_B:
+			rfPath = RF_PATH_B;
+			break;
+		case ANTENNA_C:
+			rfPath = RF_PATH_C;
+			break;
+	}
+
+	switch (pHalData->rf_chip)
+	{
+		case RF_8225:
+		case RF_8256:
+		case RF_6052:
+			Hal_SetCCKTxPower(pAdapter, TxPowerLevel);
+			if (pAdapter->mppriv.rateidx < MPT_RATE_6M)	// CCK rate
+				Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter, TxPowerLevel[rfPath]%2 == 0);
+			Hal_SetOFDMTxPower(pAdapter, TxPowerLevel);
+			break;
+
+		default:
+			break;
+	}
+}
+
+void Hal_SetTxPower(PADAPTER pAdapter)
+{
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
+	u8 TxPower = pAdapter->mppriv.txpoweridx;
+	u8 TxPowerLevel[MAX_RF_PATH_NUMS];
+	u8 rf, rfPath;
+
+	for (rf = 0; rf < MAX_RF_PATH_NUMS; rf++) {
+		TxPowerLevel[rf] = TxPower;
+	}
+
+	switch (pAdapter->mppriv.antenna_tx)
+	{
+		case ANTENNA_A:
+		default:
+			rfPath = RF_PATH_A;
+			break;
+		case ANTENNA_B:
+			rfPath = RF_PATH_B;
+			break;
+		case ANTENNA_C:
+			rfPath = RF_PATH_C;
+			break;
+	}
+
+	switch (pHalData->rf_chip)
+	{
+		// 2008/09/12 MH Test only !! We enable the TX power tracking for MP!!!!!
+		// We should call normal driver API later!!
+		case RF_8225:
+		case RF_8256:
+		case RF_6052:
+			Hal_SetCCKTxPower(pAdapter, TxPowerLevel);
+			if (pAdapter->mppriv.rateidx < MPT_RATE_6M)	// CCK rate
+				Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter, TxPowerLevel[rfPath]%2 == 0);
+			Hal_SetOFDMTxPower(pAdapter, TxPowerLevel);
+			break;
+
+		default:
+			break;
+	}
+
+//	SetCCKTxPower(pAdapter, TxPower);
+//	SetOFDMTxPower(pAdapter, TxPower);
+}
+
+void Hal_SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset)
+{
+	u32 TxAGCOffset_B, TxAGCOffset_C, TxAGCOffset_D,tmpAGC;
+
+	TxAGCOffset_B = (ulTxAGCOffset&0x000000ff);
+	TxAGCOffset_C = ((ulTxAGCOffset&0x0000ff00)>>8);
+	TxAGCOffset_D = ((ulTxAGCOffset&0x00ff0000)>>16);
+
+	tmpAGC = (TxAGCOffset_D<<8 | TxAGCOffset_C<<4 | TxAGCOffset_B);
+	write_bbreg(pAdapter, rFPGA0_TxGainStage,
+			(bXBTxAGC|bXCTxAGC|bXDTxAGC), tmpAGC);
+}
+
+void Hal_SetDataRate(PADAPTER pAdapter)
+{
+	Hal_mpt_SwitchRfSetting(pAdapter);
+}
+
+#if  !defined (CONFIG_RTL8192C)  &&  !defined (CONFIG_RTL8192D)
+/*------------------------------Define structure----------------------------*/
+typedef struct _R_ANTENNA_SELECT_OFDM {
+	u32	r_tx_antenna:4;
+	u32	r_ant_l:4;
+	u32	r_ant_non_ht:4;
+	u32	r_ant_ht1:4;
+	u32	r_ant_ht2:4;
+	u32	r_ant_ht_s1:4;
+	u32	r_ant_non_ht_s1:4;
+	u32	OFDM_TXSC:2;
+	u32	Reserved:2;
+}R_ANTENNA_SELECT_OFDM;
+
+typedef struct _R_ANTENNA_SELECT_CCK {
+	u8	r_cckrx_enable_2:2;
+	u8	r_cckrx_enable:2;
+	u8	r_ccktx_enable:4;
+}R_ANTENNA_SELECT_CCK;
+#endif
+
+void Hal_SetAntenna(PADAPTER pAdapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+
+	R_ANTENNA_SELECT_OFDM *p_ofdm_tx;	/* OFDM Tx register */
+	R_ANTENNA_SELECT_CCK *p_cck_txrx;
+
+	u8	r_rx_antenna_ofdm = 0, r_ant_select_cck_val = 0;
+	u8	chgTx = 0, chgRx = 0;
+	u32	r_ant_sel_cck_val = 0, r_ant_select_ofdm_val = 0, r_ofdm_tx_en_val = 0;
+
+
+	p_ofdm_tx = (R_ANTENNA_SELECT_OFDM *)&r_ant_select_ofdm_val;
+	p_cck_txrx = (R_ANTENNA_SELECT_CCK *)&r_ant_select_cck_val;
+
+	p_ofdm_tx->r_ant_ht1	= 0x1;
+	p_ofdm_tx->r_ant_ht2	= 0x2;	// Second TX RF path is A
+	p_ofdm_tx->r_ant_non_ht = 0x3;	// 0x1+0x2=0x3
+
+	switch (pAdapter->mppriv.antenna_tx)
+	{
+		case ANTENNA_A:
+			p_ofdm_tx->r_tx_antenna		= 0x1;
+			r_ofdm_tx_en_val		= 0x1;
+			p_ofdm_tx->r_ant_l 		= 0x1;
+			p_ofdm_tx->r_ant_ht_s1 		= 0x1;
+			p_ofdm_tx->r_ant_non_ht_s1 	= 0x1;
+			p_cck_txrx->r_ccktx_enable	= 0x8;
+			chgTx = 1;
+
+			// From SD3 Willis suggestion !!! Set RF A=TX and B as standby
+//			if (IS_HARDWARE_TYPE_8192S(pAdapter))
+			{
+			write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2);
+			write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 1);
+			r_ofdm_tx_en_val		= 0x3;
+
+			// Power save
+			//cosa r_ant_select_ofdm_val = 0x11111111;
+
+			// We need to close RFB by SW control
+			if (pHalData->rf_type == RF_2T2R)
+			{
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 1);
+				PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 0);
+			}
+			}
+			break;
+
+		case ANTENNA_B:
+			p_ofdm_tx->r_tx_antenna		= 0x2;
+			r_ofdm_tx_en_val		= 0x2;
+			p_ofdm_tx->r_ant_l 		= 0x2;
+			p_ofdm_tx->r_ant_ht_s1 		= 0x2;
+			p_ofdm_tx->r_ant_non_ht_s1 	= 0x2;
+			p_cck_txrx->r_ccktx_enable	= 0x4;
+			chgTx = 1;
+
+			// From SD3 Willis suggestion !!! Set RF A as standby
+			//if (IS_HARDWARE_TYPE_8192S(pAdapter))
+			{
+			PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 1);
+			PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2);
+//			r_ofdm_tx_en_val		= 0x3;
+
+			// Power save
+			//cosa r_ant_select_ofdm_val = 0x22222222;
+
+			// 2008/10/31 MH From SD3 Willi's suggestion. We must read RF 1T table.
+			// 2009/01/08 MH From Sd3 Willis. We need to close RFA by SW control
+			if (pHalData->rf_type == RF_2T2R || pHalData->rf_type == RF_1T2R)
+			{
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 1);
+				PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0);
+//				PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 0);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1);
+			}
+			}
+		break;
+
+		case ANTENNA_AB:	// For 8192S
+			p_ofdm_tx->r_tx_antenna		= 0x3;
+			r_ofdm_tx_en_val		= 0x3;
+			p_ofdm_tx->r_ant_l 		= 0x3;
+			p_ofdm_tx->r_ant_ht_s1 		= 0x3;
+			p_ofdm_tx->r_ant_non_ht_s1 	= 0x3;
+			p_cck_txrx->r_ccktx_enable	= 0xC;
+			chgTx = 1;
+
+			// From SD3 Willis suggestion !!! Set RF B as standby
+			//if (IS_HARDWARE_TYPE_8192S(pAdapter))
+			{
+			PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2);
+			PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2);
+
+			// Disable Power save
+			//cosa r_ant_select_ofdm_val = 0x3321333;
+#if 0
+			// 2008/10/31 MH From SD3 Willi's suggestion. We must read RFA 2T table.
+			if ((pHalData->VersionID == VERSION_8192S_ACUT)) // For RTL8192SU A-Cut only, by Roger, 2008.11.07.
+			{
+				mpt_RFConfigFromPreParaArrary(pAdapter, 1, RF90_PATH_A);
+			}
+#endif
+			// 2009/01/08 MH From Sd3 Willis. We need to enable RFA/B by SW control
+			if (pHalData->rf_type == RF_2T2R)
+			{
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0);
+//				PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1);
+			}
+			}
+			break;
+
+		default:
+			break;
+	}
+
+	//
+	// r_rx_antenna_ofdm, bit0=A, bit1=B, bit2=C, bit3=D
+	// r_cckrx_enable : CCK default, 0=A, 1=B, 2=C, 3=D
+	// r_cckrx_enable_2 : CCK option, 0=A, 1=B, 2=C, 3=D
+	//
+	switch (pAdapter->mppriv.antenna_rx)
+	{
+		case ANTENNA_A:
+			r_rx_antenna_ofdm 		= 0x1;	// A
+			p_cck_txrx->r_cckrx_enable 	= 0x0;	// default: A
+			p_cck_txrx->r_cckrx_enable_2	= 0x0;	// option: A
+			chgRx = 1;
+			break;
+
+		case ANTENNA_B:
+			r_rx_antenna_ofdm 		= 0x2;	// B
+			p_cck_txrx->r_cckrx_enable 	= 0x1;	// default: B
+			p_cck_txrx->r_cckrx_enable_2	= 0x1;	// option: B
+			chgRx = 1;
+			break;
+
+		case ANTENNA_AB:
+			r_rx_antenna_ofdm 		= 0x3;	// AB
+			p_cck_txrx->r_cckrx_enable 	= 0x0;	// default:A
+			p_cck_txrx->r_cckrx_enable_2	= 0x1;	// option:B
+			chgRx = 1;
+			break;
+
+		default:
+			break;
+	}
+
+	if (chgTx && chgRx)
+	{
+		switch(pHalData->rf_chip)
+		{
+			case RF_8225:
+			case RF_8256:
+			case RF_6052:
+				//r_ant_sel_cck_val = r_ant_select_cck_val;
+				PHY_SetBBReg(pAdapter, rFPGA1_TxInfo, 0x7fffffff, r_ant_select_ofdm_val);	//OFDM Tx
+				PHY_SetBBReg(pAdapter, rFPGA0_TxInfo, 0x0000000f, r_ofdm_tx_en_val);		//OFDM Tx
+				PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm);	//OFDM Rx
+				PHY_SetBBReg(pAdapter, rOFDM1_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm);	//OFDM Rx
+				PHY_SetBBReg(pAdapter, rCCK0_AFESetting, bMaskByte3, r_ant_select_cck_val);//r_ant_sel_cck_val);		//CCK TxRx
+
+				break;
+
+			default:
+				break;
+		}
+	}
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("-SwitchAntenna: finished\n"));
+}
+
+s32 Hal_SetThermalMeter(PADAPTER pAdapter, u8 target_ther)
+{
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
+
+
+	if (!netif_running(pAdapter->pnetdev)) {
+		RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter! Fail: interface not opened!\n"));
+		return _FAIL;
+	}
+
+	if (check_fwstate(&pAdapter->mlmepriv, WIFI_MP_STATE) == _FALSE) {
+		RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter: Fail! not in MP mode!\n"));
+		return _FAIL;
+	}
+
+	target_ther &= 0xff;
+	if (target_ther < 0x07)
+		target_ther = 0x07;
+	else if (target_ther > 0x1d)
+		target_ther = 0x1d;
+
+	pHalData->EEPROMThermalMeter = target_ther;
+
+	return _SUCCESS;
+}
+
+void Hal_TriggerRFThermalMeter(PADAPTER pAdapter)
+{
+  
+	write_rfreg(pAdapter, RF_PATH_A, RF_T_METER, 0x60);	// 0x24: RF Reg[6:5]
+
+//	RT_TRACE(_module_mp_,_drv_alert_, ("TriggerRFThermalMeter() finished.\n" ));
+}
+
+u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter)
+{
+	u32 ThermalValue = 0;
+
+	ThermalValue = _read_rfreg(pAdapter, RF_PATH_A, RF_T_METER, 0x1F);	// 0x24: RF Reg[4:0]
+//	RT_TRACE(_module_mp_, _drv_alert_, ("ThermalValue = 0x%x\n", ThermalValue));
+	return (u8)ThermalValue;
+}
+
+void Hal_GetThermalMeter(PADAPTER pAdapter, u8 *value)
+{
+#if 0
+	fw_cmd(pAdapter, IOCMD_GET_THERMAL_METER);
+	rtw_msleep_os(1000);
+	fw_cmd_data(pAdapter, value, 1);
+	*value &= 0xFF;
+#else
+
+	Hal_TriggerRFThermalMeter(pAdapter);
+	rtw_msleep_os(1000);
+	*value = Hal_ReadRFThermalMeter(pAdapter);
+#endif
+}
+
+void Hal_SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart)
+{
+    HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
+	pAdapter->mppriv.MptCtx.bSingleCarrier = bStart;
+	if (bStart)// Start Single Carrier.
+	{
+		RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleCarrierTx: test start\n"));
+		// 1. if OFDM block on?
+		if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn))
+			write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);//set OFDM block on
+
+		{
+		// 2. set CCK test mode off, set to CCK normal mode
+		write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, bDisable);
+		// 3. turn on scramble setting
+		write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable);
+         }
+		// 4. Turn On Single Carrier Tx and turn off the other test modes.
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bEnable);
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+#ifdef CONFIG_RTL8192C
+		// 5. Disable TX power saving at STF & LLTF
+		write_bbreg(pAdapter, rOFDM1_LSTF, BIT22, 1);
+#endif
+	}
+	else// Stop Single Carrier.
+	{
+		RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleCarrierTx: test stop\n"));
+
+		// Turn off all test modes.
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+#ifdef CONFIG_RTL8192C
+		// Cancel disable TX power saving at STF&LLTF
+		write_bbreg(pAdapter, rOFDM1_LSTF, BIT22, 0);
+#endif
+		//Delay 10 ms //delay_ms(10);
+		rtw_msleep_os(10);
+
+		//BB Reset
+		write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
+		write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
+	}
+}
+
+
+void Hal_SetSingleToneTx(PADAPTER pAdapter, u8 bStart)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	BOOLEAN		is92C = IS_92C_SERIAL(pHalData->VersionID);
+
+	u8 rfPath;
+
+	switch (pAdapter->mppriv.antenna_tx)
+	{
+		case ANTENNA_A:
+		default:
+			rfPath = RF_PATH_A;
+			break;
+		case ANTENNA_B:
+			rfPath = RF_PATH_B;
+			break;
+		case ANTENNA_C:
+			rfPath = RF_PATH_C;
+			break;
+	}
+
+	pAdapter->mppriv.MptCtx.bSingleTone = bStart;
+	if (bStart)// Start Single Tone.
+	{
+		RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleToneTx: test start\n"));
+		write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x0);
+		write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x0);
+
+		if (is92C)
+       		 {
+			_write_rfreg(pAdapter, RF_PATH_A, 0x21, BIT19, 0x01);
+			rtw_usleep_os(100);
+			if (rfPath == RF_PATH_A)
+				write_rfreg(pAdapter, RF_PATH_B, 0x00, 0x10000); // PAD all on.
+			else if (rfPath == RF_PATH_B)
+				write_rfreg(pAdapter, RF_PATH_A, 0x00, 0x10000); // PAD all on.
+		} else {
+			write_rfreg(pAdapter, rfPath, 0x21, 0xd4000);
+			rtw_usleep_os(100);
+		}
+		
+		write_rfreg(pAdapter, rfPath, 0x00, 0x2001f); // PAD all on.
+		rtw_usleep_os(100);
+	}
+	else// Stop Single Tone.
+	{
+		RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleToneTx: test stop\n"));
+		write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x1);
+		write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x1);
+
+		if (is92C) {
+			_write_rfreg(pAdapter, RF_PATH_A, 0x21, BIT19, 0x00);
+			rtw_usleep_os(100);
+			write_rfreg(pAdapter, RF_PATH_A, 0x00, 0x32d75); // PAD all on.
+			write_rfreg(pAdapter, RF_PATH_B, 0x00, 0x32d75); // PAD all on.
+			rtw_usleep_os(100);
+		} else {
+			write_rfreg(pAdapter, rfPath, 0x21, 0x54000);
+			rtw_usleep_os(100);
+
+			write_rfreg(pAdapter, rfPath, 0x00, 0x30000); // PAD all on.
+			rtw_usleep_os(100);
+		}
+	}
+	
+}
+
+
+void Hal_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart)
+{
+	pAdapter->mppriv.MptCtx.bCarrierSuppression = bStart;
+	if (bStart) // Start Carrier Suppression.
+	{
+		RT_TRACE(_module_mp_,_drv_alert_, ("SetCarrierSuppressionTx: test start\n"));
+		//if(pMgntInfo->dot11CurrentWirelessMode == WIRELESS_MODE_B)
+		if (pAdapter->mppriv.rateidx <= MPT_RATE_11M)
+		  {
+			// 1. if CCK block on?
+			if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn))
+				write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);//set CCK block on
+
+			//Turn Off All Test Mode
+			write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
+			write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
+			write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+
+			write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2);    //transmit mode
+			write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x0);  //turn off scramble setting
+
+			//Set CCK Tx Test Rate
+			//PHY_SetBBReg(pAdapter, rCCK0_System, bCCKTxRate, pMgntInfo->ForcedDataRate);
+			write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, 0x0);    //Set FTxRate to 1Mbps
+		}
+	}
+	else// Stop Carrier Suppression.
+	{
+		RT_TRACE(_module_mp_,_drv_alert_, ("SetCarrierSuppressionTx: test stop\n"));
+		//if(pMgntInfo->dot11CurrentWirelessMode == WIRELESS_MODE_B)
+		if (pAdapter->mppriv.rateidx <= MPT_RATE_11M ) {
+			write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0);    //normal mode
+			write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x1);  //turn on scramble setting
+
+			//BB Reset
+			write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
+			write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
+		}
+	}
+	//DbgPrint("\n MPT_ProSetCarrierSupp() is finished. \n");
+}
+
+void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart)
+{
+	u32 cckrate;
+
+	if (bStart)
+	{
+		RT_TRACE(_module_mp_, _drv_alert_,
+			 ("SetCCKContinuousTx: test start\n"));
+
+		// 1. if CCK block on?
+		if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn))
+			write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);//set CCK block on
+
+		//Turn Off All Test Mode
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+		//Set CCK Tx Test Rate
+		#if 0
+		switch(pAdapter->mppriv.rateidx)
+		{
+			case 2:
+				cckrate = 0;
+				break;
+			case 4:
+				cckrate = 1;
+				break;
+			case 11:
+				cckrate = 2;
+				break;
+			case 22:
+				cckrate = 3;
+				break;
+			default:
+				cckrate = 0;
+				break;
+		}
+		#else
+		cckrate  = pAdapter->mppriv.rateidx;
+		#endif
+		write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, cckrate);
+		write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2);	//transmit mode
+		write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable);	//turn on scramble setting
+
+#ifdef CONFIG_RTL8192C
+		// Patch for CCK 11M waveform
+		if (cckrate == MPT_RATE_1M)
+			write_bbreg(pAdapter, 0xA71, BIT(6), bDisable);
+		else
+			write_bbreg(pAdapter, 0xA71, BIT(6), bEnable);
+#endif
+
+	}
+	else {
+		RT_TRACE(_module_mp_, _drv_info_,
+			 ("SetCCKContinuousTx: test stop\n"));
+
+		write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0);	//normal mode
+		write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable);	//turn on scramble setting
+
+		//BB Reset
+		write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
+		write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
+	}
+
+	pAdapter->mppriv.MptCtx.bCckContTx = bStart;
+	pAdapter->mppriv.MptCtx.bOfdmContTx = _FALSE;
+}/* mpt_StartCckContTx */
+
+void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart)
+{
+    HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+
+	if (bStart) {
+		RT_TRACE(_module_mp_, _drv_info_, ("SetOFDMContinuousTx: test start\n"));
+		// 1. if OFDM block on?
+		if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn))
+			write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);//set OFDM block on
+        {
+
+		// 2. set CCK test mode off, set to CCK normal mode
+		write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, bDisable);
+
+		// 3. turn on scramble setting
+		write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable);
+        }
+		// 4. Turn On Continue Tx and turn off the other test modes.
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bEnable);
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+	} else {
+		RT_TRACE(_module_mp_,_drv_info_, ("SetOFDMContinuousTx: test stop\n"));
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+		//Delay 10 ms
+		rtw_msleep_os(10);
+		//BB Reset
+		write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
+		write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
+	}
+
+	pAdapter->mppriv.MptCtx.bCckContTx = _FALSE;
+	pAdapter->mppriv.MptCtx.bOfdmContTx = bStart;
+}/* mpt_StartOfdmContTx */
+
+void Hal_SetContinuousTx(PADAPTER pAdapter, u8 bStart)
+{
+#if 0
+	// ADC turn off [bit24-21] adc port0 ~ port1
+	if (bStart) {
+		write_bbreg(pAdapter, rRx_Wait_CCCA, read_bbreg(pAdapter, rRx_Wait_CCCA) & 0xFE1FFFFF);
+		rtw_usleep_os(100);
+	}
+#endif
+	RT_TRACE(_module_mp_, _drv_info_,
+		 ("SetContinuousTx: rate:%d\n", pAdapter->mppriv.rateidx));
+
+	pAdapter->mppriv.MptCtx.bStartContTx = bStart;
+	if (pAdapter->mppriv.rateidx <= MPT_RATE_11M)
+	{
+		Hal_SetCCKContinuousTx(pAdapter, bStart);
+	}
+	else if ((pAdapter->mppriv.rateidx >= MPT_RATE_6M) &&
+		 (pAdapter->mppriv.rateidx <= MPT_RATE_MCS15))
+	{
+		Hal_SetOFDMContinuousTx(pAdapter, bStart);
+	}
+#if 0
+	// ADC turn on [bit24-21] adc port0 ~ port1
+	if (!bStart) {
+		write_bbreg(pAdapter, rRx_Wait_CCCA, read_bbreg(pAdapter, rRx_Wait_CCCA) | 0x01E00000);
+	}
+#endif
+}
+
+#endif // CONFIG_MP_INCLUDE
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_phycfg.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_phycfg.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_phycfg.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_phycfg.c	2017-09-23 03:42:49.926675346 +0800
@@ -0,0 +1,5564 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+/******************************************************************************
+
+ Module:	rtl8192c_phycfg.c	
+
+ Note:		Merge 92SE/SU PHY config as below
+			1. BB register R/W API
+ 			2. RF register R/W API
+ 			3. Initial BB/RF/MAC config by reading BB/MAC/RF txt.
+ 			3. Power setting API
+ 			4. Channel switch API
+ 			5. Initial gain switch API.
+ 			6. Other BB/MAC/RF API.
+ 			
+ Function:	PHY: Extern function, phy: local function
+ 		 
+ Export:	PHY_FunctionName
+
+ Abbrev:	NONE
+
+ History:
+	Data		Who		Remark	
+	08/08/2008  MHC    	1. Port from 9x series phycfg.c
+						2. Reorganize code arch and ad description.
+						3. Collect similar function.
+						4. Seperate extern/local API.
+	08/12/2008	MHC		We must merge or move USB PHY relative function later.
+	10/07/2008	MHC		Add IQ calibration for PHY.(Only 1T2R mode now!!!)
+	11/06/2008	MHC		Add TX Power index PG file to config in 0xExx register
+						area to map with EEPROM/EFUSE tx pwr index.
+	
+******************************************************************************/
+#define _HAL_8192C_PHYCFG_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtw_byteorder.h>
+
+#ifdef CONFIG_IOL
+#include <rtw_iol.h>
+#endif
+
+#include <rtl8192c_hal.h>
+
+
+/*---------------------------Define Local Constant---------------------------*/
+/* Channel switch:The size of command tables for switch channel*/
+#define MAX_PRECMD_CNT 16
+#define MAX_RFDEPENDCMD_CNT 16
+#define MAX_POSTCMD_CNT 16
+
+#define MAX_DOZE_WAITING_TIMES_9x 64
+
+/*---------------------------Define Local Constant---------------------------*/
+
+
+/*------------------------Define global variable-----------------------------*/
+
+/*------------------------Define local variable------------------------------*/
+
+
+/*--------------------Define export function prototype-----------------------*/
+// Please refer to header file
+/*--------------------Define export function prototype-----------------------*/
+
+/*----------------------------Function Body----------------------------------*/
+//
+// 1. BB register R/W API
+//
+
+/**
+* Function:	phy_CalculateBitShift
+*
+* OverView:	Get shifted position of the BitMask
+*
+* Input:
+*			u4Byte		BitMask,	
+*
+* Output:	none
+* Return:		u4Byte		Return the shift bit bit position of the mask
+*/
+static	u32
+phy_CalculateBitShift(
+	u32 BitMask
+	)
+{
+	u32 i;
+
+	for(i=0; i<=31; i++)
+	{
+		if ( ((BitMask>>i) &  0x1 ) == 1)
+			break;
+	}
+
+	return (i);
+}
+
+
+/**
+* Function:	PHY_QueryBBReg
+*
+* OverView:	Read "sepcific bits" from BB register
+*
+* Input:
+*			PADAPTER		Adapter,
+*			u4Byte			RegAddr,		//The target address to be readback
+*			u4Byte			BitMask		//The target bit position in the target address
+*										//to be readback	
+* Output:	None
+* Return:		u4Byte			Data			//The readback register value
+* Note:		This function is equal to "GetRegSetting" in PHY programming guide
+*/
+u32
+rtl8192c_PHY_QueryBBReg(
+	IN	PADAPTER	Adapter,
+	IN	u32		RegAddr,
+	IN	u32		BitMask
+	)
+{	
+  	u32	ReturnValue = 0, OriginalValue, BitShift;
+	u16	BBWaitCounter = 0;
+
+#if (DISABLE_BB_RF == 1)
+	return 0;
+#endif
+
+	//RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx)\n", RegAddr, BitMask));
+
+	OriginalValue = rtw_read32(Adapter, RegAddr);
+	BitShift = phy_CalculateBitShift(BitMask);
+	ReturnValue = (OriginalValue & BitMask) >> BitShift;
+
+	//RTPRINT(FPHY, PHY_BBR, ("BBR MASK=0x%lx Addr[0x%lx]=0x%lx\n", BitMask, RegAddr, OriginalValue));
+	//RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx), OriginalValue(%#lx)\n", RegAddr, BitMask, OriginalValue));
+
+	return (ReturnValue);
+
+}
+
+
+/**
+* Function:	PHY_SetBBReg
+*
+* OverView:	Write "Specific bits" to BB register (page 8~) 
+*
+* Input:
+*			PADAPTER		Adapter,
+*			u4Byte			RegAddr,		//The target address to be modified
+*			u4Byte			BitMask		//The target bit position in the target address
+*										//to be modified	
+*			u4Byte			Data			//The new register value in the target bit position
+*										//of the target address			
+*
+* Output:	None
+* Return:		None
+* Note:		This function is equal to "PutRegSetting" in PHY programming guide
+*/
+
+VOID
+rtl8192c_PHY_SetBBReg(
+	IN	PADAPTER	Adapter,
+	IN	u32		RegAddr,
+	IN	u32		BitMask,
+	IN	u32		Data
+	)
+{
+	HAL_DATA_TYPE	*pHalData		= GET_HAL_DATA(Adapter);
+	//u16			BBWaitCounter	= 0;
+	u32			OriginalValue, BitShift;
+
+#if (DISABLE_BB_RF == 1)
+	return;
+#endif
+
+	//RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data));
+
+	if(BitMask!= bMaskDWord){//if not "double word" write
+		OriginalValue = rtw_read32(Adapter, RegAddr);
+		BitShift = phy_CalculateBitShift(BitMask);
+		Data = ((OriginalValue & (~BitMask)) | (Data << BitShift));
+	}
+
+	rtw_write32(Adapter, RegAddr, Data);
+
+	//RTPRINT(FPHY, PHY_BBW, ("BBW MASK=0x%lx Addr[0x%lx]=0x%lx\n", BitMask, RegAddr, Data));
+	//RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data));
+	
+}
+
+
+//
+// 2. RF register R/W API
+//
+
+/*-----------------------------------------------------------------------------
+ * Function:	phy_FwRFSerialRead()
+ *
+ * Overview:	We support firmware to execute RF-R/W.
+ *
+ * Input:		NONE
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	01/21/2008	MHC		Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+static	u32
+phy_FwRFSerialRead(
+	IN	PADAPTER			Adapter,
+	IN	RF90_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset	)
+{
+	u32		retValue = 0;		
+	//RT_ASSERT(FALSE,("deprecate!\n"));
+	return	(retValue);
+
+}	/* phy_FwRFSerialRead */
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	phy_FwRFSerialWrite()
+ *
+ * Overview:	We support firmware to execute RF-R/W.
+ *
+ * Input:		NONE
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	01/21/2008	MHC		Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+static	VOID
+phy_FwRFSerialWrite(
+	IN	PADAPTER			Adapter,
+	IN	RF90_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset,
+	IN	u32				Data	)
+{
+	//RT_ASSERT(FALSE,("deprecate!\n"));
+}
+
+
+/**
+* Function:	phy_RFSerialRead
+*
+* OverView:	Read regster from RF chips 
+*
+* Input:
+*			PADAPTER		Adapter,
+*			RF90_RADIO_PATH_E	eRFPath,	//Radio path of A/B/C/D
+*			u4Byte			Offset,		//The target address to be read			
+*
+* Output:	None
+* Return:		u4Byte			reback value
+* Note:		Threre are three types of serial operations: 
+*			1. Software serial write
+*			2. Hardware LSSI-Low Speed Serial Interface 
+*			3. Hardware HSSI-High speed
+*			serial write. Driver need to implement (1) and (2).
+*			This function is equal to the combination of RF_ReadReg() and  RFLSSIRead()
+*/
+static	u32
+phy_RFSerialRead(
+	IN	PADAPTER			Adapter,
+	IN	RF90_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset
+	)
+{
+	u32						retValue = 0;
+	HAL_DATA_TYPE				*pHalData = GET_HAL_DATA(Adapter);
+	BB_REGISTER_DEFINITION_T	*pPhyReg = &pHalData->PHYRegDef[eRFPath];
+	u32						NewOffset;
+	u32 						tmplong,tmplong2;
+	u8					RfPiEnable=0;
+#if 0
+	if(pHalData->RFChipID == RF_8225 && Offset > 0x24) //36 valid regs
+		return	retValue;
+	if(pHalData->RFChipID == RF_8256 && Offset > 0x2D) //45 valid regs
+		return	retValue;
+#endif
+	//
+	// Make sure RF register offset is correct 
+	//
+	Offset &= 0x3f;
+
+	//
+	// Switch page for 8256 RF IC
+	//
+	NewOffset = Offset;
+
+	// 2009/06/17 MH We can not execute IO for power save or other accident mode.
+	//if(RT_CANNOT_IO(Adapter))
+	//{
+	//	RTPRINT(FPHY, PHY_RFR, ("phy_RFSerialRead return all one\n"));
+	//	return	0xFFFFFFFF;
+	//}
+
+	// For 92S LSSI Read RFLSSIRead
+	// For RF A/B write 0x824/82c(does not work in the future) 
+	// We must use 0x824 for RF A and B to execute read trigger
+	tmplong = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord);
+	if(eRFPath == RF90_PATH_A)
+		tmplong2 = tmplong;
+	else
+		tmplong2 = PHY_QueryBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord);
+
+	tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset<<23) | bLSSIReadEdge;	//T65 RF
+	
+	PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong&(~bLSSIReadEdge));	
+	rtw_udelay_os(10);// PlatformStallExecution(10);
+	
+	PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord, tmplong2);	
+	rtw_udelay_os(100);//PlatformStallExecution(100);
+	
+	PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong|bLSSIReadEdge);	
+	rtw_udelay_os(10);//PlatformStallExecution(10);
+
+	if(eRFPath == RF90_PATH_A)
+		RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1, BIT8);
+	else if(eRFPath == RF90_PATH_B)
+		RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1, BIT8);
+	
+	if(RfPiEnable)
+	{	// Read from BBreg8b8, 12 bits for 8190, 20bits for T65 RF
+		retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi, bLSSIReadBackData);
+		//DBG_8192C("Readback from RF-PI : 0x%x\n", retValue);
+	}
+	else
+	{	//Read from BBreg8a0, 12 bits for 8190, 20 bits for T65 RF
+		retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack, bLSSIReadBackData);
+		//DBG_8192C("Readback from RF-SI : 0x%x\n", retValue);
+	}
+	//DBG_8192C("RFR-%d Addr[0x%x]=0x%x\n", eRFPath, pPhyReg->rfLSSIReadBack, retValue);
+	
+	return retValue;	
+		
+}
+
+
+
+/**
+* Function:	phy_RFSerialWrite
+*
+* OverView:	Write data to RF register (page 8~) 
+*
+* Input:
+*			PADAPTER		Adapter,
+*			RF90_RADIO_PATH_E	eRFPath,	//Radio path of A/B/C/D
+*			u4Byte			Offset,		//The target address to be read			
+*			u4Byte			Data			//The new register Data in the target bit position
+*										//of the target to be read			
+*
+* Output:	None
+* Return:		None
+* Note:		Threre are three types of serial operations: 
+*			1. Software serial write
+*			2. Hardware LSSI-Low Speed Serial Interface 
+*			3. Hardware HSSI-High speed
+*			serial write. Driver need to implement (1) and (2).
+*			This function is equal to the combination of RF_ReadReg() and  RFLSSIRead()
+ *
+ * Note: 		  For RF8256 only
+ *			 The total count of RTL8256(Zebra4) register is around 36 bit it only employs 
+ *			 4-bit RF address. RTL8256 uses "register mode control bit" (Reg00[12], Reg00[10]) 
+ *			 to access register address bigger than 0xf. See "Appendix-4 in PHY Configuration
+ *			 programming guide" for more details. 
+ *			 Thus, we define a sub-finction for RTL8526 register address conversion
+ *		       ===========================================================
+ *			 Register Mode		RegCTL[1]		RegCTL[0]		Note
+ *								(Reg00[12])		(Reg00[10])
+ *		       ===========================================================
+ *			 Reg_Mode0				0				x			Reg 0 ~15(0x0 ~ 0xf)
+ *		       ------------------------------------------------------------------
+ *			 Reg_Mode1				1				0			Reg 16 ~30(0x1 ~ 0xf)
+ *		       ------------------------------------------------------------------
+ *			 Reg_Mode2				1				1			Reg 31 ~ 45(0x1 ~ 0xf)
+ *		       ------------------------------------------------------------------
+ *
+ *	2008/09/02	MH	Add 92S RF definition
+ *	
+ *
+ *
+*/
+static	VOID
+phy_RFSerialWrite(
+	IN	PADAPTER			Adapter,
+	IN	RF90_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset,
+	IN	u32				Data
+	)
+{
+	u32						DataAndAddr = 0;
+	HAL_DATA_TYPE				*pHalData = GET_HAL_DATA(Adapter);
+	BB_REGISTER_DEFINITION_T	*pPhyReg = &pHalData->PHYRegDef[eRFPath];
+	u32						NewOffset;
+	
+#if 0
+	//<Roger_TODO> We should check valid regs for RF_6052 case.
+	if(pHalData->RFChipID == RF_8225 && Offset > 0x24) //36 valid regs
+		return;
+	if(pHalData->RFChipID == RF_8256 && Offset > 0x2D) //45 valid regs
+		return;
+#endif
+
+	// 2009/06/17 MH We can not execute IO for power save or other accident mode.
+	//if(RT_CANNOT_IO(Adapter))
+	//{
+	//	RTPRINT(FPHY, PHY_RFW, ("phy_RFSerialWrite stop\n"));
+	//	return;
+	//}
+
+	Offset &= 0x3f;
+
+	//
+	// Shadow Update
+	//
+	//PHY_RFShadowWrite(Adapter, eRFPath, Offset, Data);
+
+	//
+	// Switch page for 8256 RF IC
+	//
+	NewOffset = Offset;
+
+	//
+	// Put write addr in [5:0]  and write data in [31:16]
+	//
+	//DataAndAddr = (Data<<16) | (NewOffset&0x3f);
+	DataAndAddr = ((NewOffset<<20) | (Data&0x000fffff)) & 0x0fffffff;	// T65 RF
+
+	//
+	// Write Operation
+	//
+	PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
+	//RTPRINT(FPHY, PHY_RFW, ("RFW-%d Addr[0x%lx]=0x%lx\n", eRFPath, pPhyReg->rf3wireOffset, DataAndAddr));
+
+}
+
+
+/**
+* Function:	PHY_QueryRFReg
+*
+* OverView:	Query "Specific bits" to RF register (page 8~) 
+*
+* Input:
+*			PADAPTER		Adapter,
+*			RF90_RADIO_PATH_E	eRFPath,	//Radio path of A/B/C/D
+*			u4Byte			RegAddr,		//The target address to be read
+*			u4Byte			BitMask		//The target bit position in the target address
+*										//to be read	
+*
+* Output:	None
+* Return:		u4Byte			Readback value
+* Note:		This function is equal to "GetRFRegSetting" in PHY programming guide
+*/
+u32
+rtl8192c_PHY_QueryRFReg(
+	IN	PADAPTER			Adapter,
+	IN	RF90_RADIO_PATH_E	eRFPath,
+	IN	u32				RegAddr,
+	IN	u32				BitMask
+	)
+{
+	u32 Original_Value, Readback_Value, BitShift;	
+	//HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	//u8	RFWaitCounter = 0;
+	//_irqL	irqL;
+
+#if (DISABLE_BB_RF == 1)
+	return 0;
+#endif
+	
+	//RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryRFReg(): RegAddr(%#lx), eRFPath(%#x), BitMask(%#lx)\n", RegAddr, eRFPath,BitMask));
+	
+#ifdef CONFIG_USB_HCI
+	//PlatformAcquireMutex(&pHalData->mxRFOperate);
+#else
+	//_enter_critical(&pHalData->rf_lock, &irqL);
+#endif
+
+	
+	Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr);
+	
+	BitShift =  phy_CalculateBitShift(BitMask);
+	Readback_Value = (Original_Value & BitMask) >> BitShift;	
+
+#ifdef CONFIG_USB_HCI
+	//PlatformReleaseMutex(&pHalData->mxRFOperate);
+#else
+	//_exit_critical(&pHalData->rf_lock, &irqL);
+#endif
+
+
+	//RTPRINT(FPHY, PHY_RFR, ("RFR-%d MASK=0x%lx Addr[0x%lx]=0x%lx\n", eRFPath, BitMask, RegAddr, Original_Value));//BitMask(%#lx),BitMask,
+	//RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_QueryRFReg(): RegAddr(%#lx), eRFPath(%#x),  Original_Value(%#lx)\n", 
+	//				RegAddr, eRFPath, Original_Value));
+	
+	return (Readback_Value);
+}
+
+/**
+* Function:	PHY_SetRFReg
+*
+* OverView:	Write "Specific bits" to RF register (page 8~) 
+*
+* Input:
+*			PADAPTER		Adapter,
+*			RF90_RADIO_PATH_E	eRFPath,	//Radio path of A/B/C/D
+*			u4Byte			RegAddr,		//The target address to be modified
+*			u4Byte			BitMask		//The target bit position in the target address
+*										//to be modified	
+*			u4Byte			Data			//The new register Data in the target bit position
+*										//of the target address			
+*
+* Output:	None
+* Return:		None
+* Note:		This function is equal to "PutRFRegSetting" in PHY programming guide
+*/
+VOID
+rtl8192c_PHY_SetRFReg(
+	IN	PADAPTER			Adapter,
+	IN	RF90_RADIO_PATH_E	eRFPath,
+	IN	u32				RegAddr,
+	IN	u32				BitMask,
+	IN	u32				Data
+	)
+{
+
+	//HAL_DATA_TYPE	*pHalData		= GET_HAL_DATA(Adapter);
+	//u1Byte			RFWaitCounter	= 0;
+	u32		Original_Value, BitShift;
+	//_irqL	irqL;
+
+#if (DISABLE_BB_RF == 1)
+	return;
+#endif
+	
+	//RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", 
+	//	RegAddr, BitMask, Data, eRFPath));
+	//RTPRINT(FINIT, INIT_RF, ("PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", 
+	//	RegAddr, BitMask, Data, eRFPath));
+
+
+#ifdef CONFIG_USB_HCI
+	//PlatformAcquireMutex(&pHalData->mxRFOperate);
+#else
+	//_enter_critical(&pHalData->rf_lock, &irqL);
+#endif
+
+	
+	// RF data is 12 bits only
+	if (BitMask != bRFRegOffsetMask) 
+	{
+		Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr);
+		BitShift =  phy_CalculateBitShift(BitMask);
+		Data = ((Original_Value & (~BitMask)) | (Data<< BitShift));
+	}
+		
+	phy_RFSerialWrite(Adapter, eRFPath, RegAddr, Data);
+	
+
+
+#ifdef CONFIG_USB_HCI
+	//PlatformReleaseMutex(&pHalData->mxRFOperate);
+#else
+	//_exit_critical(&pHalData->rf_lock, &irqL);
+#endif
+	
+	//PHY_QueryRFReg(Adapter,eRFPath,RegAddr,BitMask);
+	//RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", 
+	//		RegAddr, BitMask, Data, eRFPath));
+
+}
+
+
+//
+// 3. Initial MAC/BB/RF config by reading MAC/BB/RF txt.
+//
+
+/*-----------------------------------------------------------------------------
+ * Function:    phy_ConfigMACWithParaFile()
+ *
+ * Overview:    This function read BB parameters from general file format, and do register
+ *			  Read/Write 
+ *
+ * Input:      	PADAPTER		Adapter
+ *			ps1Byte 			pFileName			
+ *
+ * Output:      NONE
+ *
+ * Return:      RT_STATUS_SUCCESS: configuration file exist
+ *			
+ * Note: 		The format of MACPHY_REG.txt is different from PHY and RF. 
+ *			[Register][Mask][Value]
+ *---------------------------------------------------------------------------*/
+static	int
+phy_ConfigMACWithParaFile(
+	IN	PADAPTER		Adapter,
+	IN	u8* 			pFileName
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	
+	int		rtStatus = _SUCCESS;
+
+	return rtStatus;
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:    phy_ConfigMACWithHeaderFile()
+ *
+ * Overview:    This function read BB parameters from Header file we gen, and do register
+ *			  Read/Write 
+ *
+ * Input:      	PADAPTER		Adapter
+ *			ps1Byte 			pFileName			
+ *
+ * Output:      NONE
+ *
+ * Return:      RT_STATUS_SUCCESS: configuration file exist
+ *			
+ * Note: 		The format of MACPHY_REG.txt is different from PHY and RF. 
+ *			[Register][Mask][Value]
+ *---------------------------------------------------------------------------*/
+static	int
+phy_ConfigMACWithHeaderFile(
+	IN	PADAPTER		Adapter
+)
+{
+	u32					i = 0;
+	u32					ArrayLength = 0;
+	u32*				ptrArray;	
+	//HAL_DATA_TYPE			*pHalData = GET_HAL_DATA(Adapter);
+
+	//2008.11.06 Modified by tynli.
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Read Rtl819XMACPHY_Array\n"));
+	ArrayLength = MAC_2T_ArrayLength;
+	ptrArray = Rtl819XMAC_Array;
+
+#ifdef CONFIG_IOL_MAC
+	{
+		struct xmit_frame	*xmit_frame;
+		if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL)
+			return _FAIL;
+
+		for(i = 0 ;i < ArrayLength;i=i+2){ // Add by tynli for 2 column
+			rtw_IOL_append_WB_cmd(xmit_frame, ptrArray[i], (u8)ptrArray[i+1]);
+		}
+
+		return rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000);
+	}
+#else
+	for(i = 0 ;i < ArrayLength;i=i+2){ // Add by tynli for 2 column
+		rtw_write8(Adapter, ptrArray[i], (u8)ptrArray[i+1]);
+	}
+#endif
+	
+	return _SUCCESS;
+	
+}
+
+
+/*-----------------------------------------------------------------------------
+ * Function:    PHY_MACConfig8192C
+ *
+ * Overview:	Condig MAC by header file or parameter file.
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ *  When		Who		Remark
+ *  08/12/2008	MHC		Create Version 0.
+ *
+ *---------------------------------------------------------------------------*/
+int
+PHY_MACConfig8192C(
+	IN	PADAPTER	Adapter
+	)
+{
+	int		rtStatus = _SUCCESS;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	s8			*pszMACRegFile;
+	s8			sz88CMACRegFile[] = RTL8188C_PHY_MACREG;
+	s8			sz92CMACRegFile[] = RTL8192C_PHY_MACREG;
+	BOOLEAN		isNormal = IS_NORMAL_CHIP(pHalData->VersionID);
+	BOOLEAN		is92C = IS_92C_SERIAL(pHalData->VersionID);
+
+	if(isNormal)
+	{
+		if(is92C)
+			pszMACRegFile = sz92CMACRegFile;
+		else
+			pszMACRegFile = sz88CMACRegFile;
+	}
+	else
+	{
+		//pszMACRegFile = TestMacRegFile;
+	}
+
+	//
+	// Config MAC
+	//
+#ifdef CONFIG_EMBEDDED_FWIMG
+	rtStatus = phy_ConfigMACWithHeaderFile(Adapter);
+#else
+	
+	// Not make sure EEPROM, add later
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Read MACREG.txt\n"));
+	rtStatus = phy_ConfigMACWithParaFile(Adapter, pszMACRegFile);
+#endif
+
+#ifdef CONFIG_PCI_HCI
+	//this switching setting cause some 8192cu hw have redownload fw fail issue
+	//improve 2-stream TX EVM by Jenyu
+	if(isNormal && is92C)
+		rtw_write8(Adapter, REG_SPS0_CTRL+3,0x71);
+#endif
+
+
+	// 2010.07.13 AMPDU aggregation number 9
+	//rtw_write16(Adapter, REG_MAX_AGGR_NUM, MAX_AGGR_NUM);
+	rtw_write8(Adapter, REG_MAX_AGGR_NUM, 0x0A); //By tynli. 2010.11.18.
+#ifdef CONFIG_USB_HCI
+	if(is92C && (BOARD_USB_DONGLE == pHalData->BoardType))
+		rtw_write8(Adapter, 0x40,0x04);	
+#endif		
+
+	return rtStatus;
+
+}
+
+
+/**
+* Function:	phy_InitBBRFRegisterDefinition
+*
+* OverView:	Initialize Register definition offset for Radio Path A/B/C/D
+*
+* Input:
+*			PADAPTER		Adapter,
+*
+* Output:	None
+* Return:		None
+* Note:		The initialization value is constant and it should never be changes
+*/
+static	VOID
+phy_InitBBRFRegisterDefinition(
+	IN	PADAPTER		Adapter
+)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);	
+
+	// RF Interface Sowrtware Control
+	pHalData->PHYRegDef[RF90_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 LSBs if read 32-bit from 0x870
+	pHalData->PHYRegDef[RF90_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 MSBs if read 32-bit from 0x870 (16-bit for 0x872)
+	pHalData->PHYRegDef[RF90_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW;// 16 LSBs if read 32-bit from 0x874
+	pHalData->PHYRegDef[RF90_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW;// 16 MSBs if read 32-bit from 0x874 (16-bit for 0x876)
+
+	// RF Interface Readback Value
+	pHalData->PHYRegDef[RF90_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB; // 16 LSBs if read 32-bit from 0x8E0	
+	pHalData->PHYRegDef[RF90_PATH_B].rfintfi = rFPGA0_XAB_RFInterfaceRB;// 16 MSBs if read 32-bit from 0x8E0 (16-bit for 0x8E2)
+	pHalData->PHYRegDef[RF90_PATH_C].rfintfi = rFPGA0_XCD_RFInterfaceRB;// 16 LSBs if read 32-bit from 0x8E4
+	pHalData->PHYRegDef[RF90_PATH_D].rfintfi = rFPGA0_XCD_RFInterfaceRB;// 16 MSBs if read 32-bit from 0x8E4 (16-bit for 0x8E6)
+
+	// RF Interface Output (and Enable)
+	pHalData->PHYRegDef[RF90_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x860
+	pHalData->PHYRegDef[RF90_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x864
+
+	// RF Interface (Output and)  Enable
+	pHalData->PHYRegDef[RF90_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862)
+	pHalData->PHYRegDef[RF90_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x864 (16-bit for 0x866)
+
+	//Addr of LSSI. Wirte RF register by driver
+	pHalData->PHYRegDef[RF90_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; //LSSI Parameter
+	pHalData->PHYRegDef[RF90_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter;
+
+	// RF parameter
+	pHalData->PHYRegDef[RF90_PATH_A].rfLSSI_Select = rFPGA0_XAB_RFParameter;  //BB Band Select
+	pHalData->PHYRegDef[RF90_PATH_B].rfLSSI_Select = rFPGA0_XAB_RFParameter;
+	pHalData->PHYRegDef[RF90_PATH_C].rfLSSI_Select = rFPGA0_XCD_RFParameter;
+	pHalData->PHYRegDef[RF90_PATH_D].rfLSSI_Select = rFPGA0_XCD_RFParameter;
+
+	// Tx AGC Gain Stage (same for all path. Should we remove this?)
+	pHalData->PHYRegDef[RF90_PATH_A].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage
+	pHalData->PHYRegDef[RF90_PATH_B].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage
+	pHalData->PHYRegDef[RF90_PATH_C].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage
+	pHalData->PHYRegDef[RF90_PATH_D].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage
+
+	// Tranceiver A~D HSSI Parameter-1
+	pHalData->PHYRegDef[RF90_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1;  //wire control parameter1
+	pHalData->PHYRegDef[RF90_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1;  //wire control parameter1
+
+	// Tranceiver A~D HSSI Parameter-2
+	pHalData->PHYRegDef[RF90_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2;  //wire control parameter2
+	pHalData->PHYRegDef[RF90_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2;  //wire control parameter2
+
+	// RF switch Control
+	pHalData->PHYRegDef[RF90_PATH_A].rfSwitchControl = rFPGA0_XAB_SwitchControl; //TR/Ant switch control
+	pHalData->PHYRegDef[RF90_PATH_B].rfSwitchControl = rFPGA0_XAB_SwitchControl;
+	pHalData->PHYRegDef[RF90_PATH_C].rfSwitchControl = rFPGA0_XCD_SwitchControl;
+	pHalData->PHYRegDef[RF90_PATH_D].rfSwitchControl = rFPGA0_XCD_SwitchControl;
+
+	// AGC control 1 
+	pHalData->PHYRegDef[RF90_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1;
+	pHalData->PHYRegDef[RF90_PATH_B].rfAGCControl1 = rOFDM0_XBAGCCore1;
+	pHalData->PHYRegDef[RF90_PATH_C].rfAGCControl1 = rOFDM0_XCAGCCore1;
+	pHalData->PHYRegDef[RF90_PATH_D].rfAGCControl1 = rOFDM0_XDAGCCore1;
+
+	// AGC control 2 
+	pHalData->PHYRegDef[RF90_PATH_A].rfAGCControl2 = rOFDM0_XAAGCCore2;
+	pHalData->PHYRegDef[RF90_PATH_B].rfAGCControl2 = rOFDM0_XBAGCCore2;
+	pHalData->PHYRegDef[RF90_PATH_C].rfAGCControl2 = rOFDM0_XCAGCCore2;
+	pHalData->PHYRegDef[RF90_PATH_D].rfAGCControl2 = rOFDM0_XDAGCCore2;
+
+	// RX AFE control 1 
+	pHalData->PHYRegDef[RF90_PATH_A].rfRxIQImbalance = rOFDM0_XARxIQImbalance;
+	pHalData->PHYRegDef[RF90_PATH_B].rfRxIQImbalance = rOFDM0_XBRxIQImbalance;
+	pHalData->PHYRegDef[RF90_PATH_C].rfRxIQImbalance = rOFDM0_XCRxIQImbalance;
+	pHalData->PHYRegDef[RF90_PATH_D].rfRxIQImbalance = rOFDM0_XDRxIQImbalance;	
+
+	// RX AFE control 1  
+	pHalData->PHYRegDef[RF90_PATH_A].rfRxAFE = rOFDM0_XARxAFE;
+	pHalData->PHYRegDef[RF90_PATH_B].rfRxAFE = rOFDM0_XBRxAFE;
+	pHalData->PHYRegDef[RF90_PATH_C].rfRxAFE = rOFDM0_XCRxAFE;
+	pHalData->PHYRegDef[RF90_PATH_D].rfRxAFE = rOFDM0_XDRxAFE;	
+
+	// Tx AFE control 1 
+	pHalData->PHYRegDef[RF90_PATH_A].rfTxIQImbalance = rOFDM0_XATxIQImbalance;
+	pHalData->PHYRegDef[RF90_PATH_B].rfTxIQImbalance = rOFDM0_XBTxIQImbalance;
+	pHalData->PHYRegDef[RF90_PATH_C].rfTxIQImbalance = rOFDM0_XCTxIQImbalance;
+	pHalData->PHYRegDef[RF90_PATH_D].rfTxIQImbalance = rOFDM0_XDTxIQImbalance;	
+
+	// Tx AFE control 2 
+	pHalData->PHYRegDef[RF90_PATH_A].rfTxAFE = rOFDM0_XATxAFE;
+	pHalData->PHYRegDef[RF90_PATH_B].rfTxAFE = rOFDM0_XBTxAFE;
+	pHalData->PHYRegDef[RF90_PATH_C].rfTxAFE = rOFDM0_XCTxAFE;
+	pHalData->PHYRegDef[RF90_PATH_D].rfTxAFE = rOFDM0_XDTxAFE;	
+
+	// Tranceiver LSSI Readback SI mode 
+	pHalData->PHYRegDef[RF90_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack;
+	pHalData->PHYRegDef[RF90_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack;
+	pHalData->PHYRegDef[RF90_PATH_C].rfLSSIReadBack = rFPGA0_XC_LSSIReadBack;
+	pHalData->PHYRegDef[RF90_PATH_D].rfLSSIReadBack = rFPGA0_XD_LSSIReadBack;	
+
+	// Tranceiver LSSI Readback PI mode 
+	pHalData->PHYRegDef[RF90_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback;
+	pHalData->PHYRegDef[RF90_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback;
+	//pHalData->PHYRegDef[RF90_PATH_C].rfLSSIReadBackPi = rFPGA0_XC_LSSIReadBack;
+	//pHalData->PHYRegDef[RF90_PATH_D].rfLSSIReadBackPi = rFPGA0_XD_LSSIReadBack;	
+
+}
+
+
+/*-----------------------------------------------------------------------------
+ * Function:    phy_ConfigBBWithParaFile()
+ *
+ * Overview:    This function read BB parameters from general file format, and do register
+ *			  Read/Write 
+ *
+ * Input:      	PADAPTER		Adapter
+ *			ps1Byte 			pFileName			
+ *
+ * Output:      NONE
+ *
+ * Return:      RT_STATUS_SUCCESS: configuration file exist
+ *	2008/11/06	MH	For 92S we do not support silent reset now. Disable 
+ *					parameter file compare!!!!!!??
+ *			
+ *---------------------------------------------------------------------------*/
+static	int
+phy_ConfigBBWithParaFile(
+	IN	PADAPTER		Adapter,
+	IN	u8* 			pFileName
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	
+	int		rtStatus = _SUCCESS;
+
+	return rtStatus;	
+}
+
+
+
+//****************************************
+// The following is for High Power PA
+//****************************************
+VOID
+phy_ConfigBBExternalPA(
+	IN	PADAPTER			Adapter
+)
+{
+#ifdef CONFIG_USB_HCI
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u16 i=0;
+	u32 temp=0;
+
+	if(!pHalData->ExternalPA)
+	{
+		return;
+	}
+
+	// 2010/10/19 MH According to Jenyu/EEChou 's opinion, we need not to execute the 
+	// same code as SU. It is already updated in PHY_REG_1T_HP.txt.
+#if 0
+	PHY_SetBBReg(Adapter, 0xee8, BIT28, 1);
+	temp = PHY_QueryBBReg(Adapter, 0x860, bMaskDWord);
+	temp |= (BIT26|BIT21|BIT10|BIT5);
+	PHY_SetBBReg(Adapter, 0x860, bMaskDWord, temp);
+	PHY_SetBBReg(Adapter, 0x870, BIT10, 0);
+	PHY_SetBBReg(Adapter, 0xc80, bMaskDWord, 0x20000080);
+	PHY_SetBBReg(Adapter, 0xc88, bMaskDWord, 0x40000100);
+#endif
+
+#endif
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:    phy_ConfigBBWithHeaderFile()
+ *
+ * Overview:    This function read BB parameters from general file format, and do register
+ *			  Read/Write 
+ *
+ * Input:      	PADAPTER		Adapter
+ *			u1Byte 			ConfigType     0 => PHY_CONFIG
+ *										 1 =>AGC_TAB
+ *
+ * Output:      NONE
+ *
+ * Return:      RT_STATUS_SUCCESS: configuration file exist
+ *			
+ *---------------------------------------------------------------------------*/
+static	int
+phy_ConfigBBWithHeaderFile(
+	IN	PADAPTER		Adapter,
+	IN	u8 			ConfigType
+)
+{
+	int i;
+	u32*	Rtl819XPHY_REGArray_Table;
+	u32*	Rtl819XAGCTAB_Array_Table;
+	u16	PHY_REGArrayLen, AGCTAB_ArrayLen;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	int ret = _SUCCESS;
+
+	//
+	// 2009.11.24. Modified by tynli.
+	//
+	if(IS_92C_SERIAL(pHalData->VersionID))
+	{
+		if(IS_NORMAL_CHIP(pHalData->VersionID))
+		{
+			AGCTAB_ArrayLen = AGCTAB_2TArrayLength;
+			Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_2TArray;
+			PHY_REGArrayLen = PHY_REG_2TArrayLength;
+			Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_2TArray;
+#ifdef CONFIG_USB_HCI
+			if(pHalData->BoardType == BOARD_MINICARD )
+			{
+				PHY_REGArrayLen = PHY_REG_2T_mCardArrayLength;
+				Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_2T_mCardArray;			
+			}
+#endif
+		}
+		else
+		{
+			DBG_8192C(" ===> phy_ConfigBBWithHeaderFile(): do not support test chip\n");
+			ret = _FAIL;
+			goto exit;
+		}
+	}
+	else
+	{
+		if(IS_NORMAL_CHIP(pHalData->VersionID))
+		{
+			AGCTAB_ArrayLen = AGCTAB_1TArrayLength;
+			Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_1TArray;
+			PHY_REGArrayLen = PHY_REG_1TArrayLength;
+			Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1TArray;
+#ifdef CONFIG_USB_HCI
+			if(pHalData->BoardType == BOARD_MINICARD )
+			{
+				PHY_REGArrayLen = PHY_REG_1T_mCardArrayLength;
+				Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1T_mCardArray;			
+			}
+			else if(pHalData->BoardType == BOARD_USB_High_PA)
+			{
+				AGCTAB_ArrayLen = AGCTAB_1T_HPArrayLength;
+				Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_1T_HPArray;
+				PHY_REGArrayLen = PHY_REG_1T_HPArrayLength;
+				Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1T_HPArray;			
+			}
+#endif
+		}
+		else
+		{
+			DBG_8192C(" ===> phy_ConfigBBWithHeaderFile(): do not support test chip\n");
+			ret = _FAIL;
+			goto exit;
+		}
+	}
+
+	if(ConfigType == BaseBand_Config_PHY_REG)
+	{
+		#ifdef CONFIG_IOL_BB_PHY_REG
+		{
+			struct xmit_frame	*xmit_frame;
+			u32 tmp_value;
+
+			if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) {
+				ret = _FAIL;
+				goto exit;
+			}
+
+			for(i=0;i<PHY_REGArrayLen;i=i+2)
+			{
+				tmp_value=Rtl819XPHY_REGArray_Table[i+1];
+				
+				if (Rtl819XPHY_REGArray_Table[i] == 0xfe)
+					rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 50);
+				else if (Rtl819XPHY_REGArray_Table[i] == 0xfd)
+					rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 5);
+				else if (Rtl819XPHY_REGArray_Table[i] == 0xfc)
+					rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 1);
+				else if (Rtl819XPHY_REGArray_Table[i] == 0xfb)
+					rtw_IOL_append_DELAY_US_cmd(xmit_frame, 50);
+				else if (Rtl819XPHY_REGArray_Table[i] == 0xfa)
+					rtw_IOL_append_DELAY_US_cmd(xmit_frame, 5);
+				else if (Rtl819XPHY_REGArray_Table[i] == 0xf9)
+					rtw_IOL_append_DELAY_US_cmd(xmit_frame, 1);
+
+				rtw_IOL_append_WD_cmd(xmit_frame, Rtl819XPHY_REGArray_Table[i], tmp_value);	
+				//RT_TRACE(COMP_INIT, DBG_TRACE, ("The Rtl819XPHY_REGArray_Table[0] is %lx Rtl819XPHY_REGArray[1] is %lx \n",Rtl819XPHY_REGArray_Table[i], Rtl819XPHY_REGArray_Table[i+1]));
+			}
+		
+			ret = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000);
+		}
+		#else
+		for(i=0;i<PHY_REGArrayLen;i=i+2)
+		{
+			if (Rtl819XPHY_REGArray_Table[i] == 0xfe){
+				#ifdef CONFIG_LONG_DELAY_ISSUE
+				rtw_msleep_os(50);
+				#else
+				rtw_mdelay_os(50);
+				#endif
+			}
+			else if (Rtl819XPHY_REGArray_Table[i] == 0xfd)
+				rtw_mdelay_os(5);
+			else if (Rtl819XPHY_REGArray_Table[i] == 0xfc)
+				rtw_mdelay_os(1);
+			else if (Rtl819XPHY_REGArray_Table[i] == 0xfb)
+				rtw_udelay_os(50);
+			else if (Rtl819XPHY_REGArray_Table[i] == 0xfa)
+				rtw_udelay_os(5);
+			else if (Rtl819XPHY_REGArray_Table[i] == 0xf9)
+				rtw_udelay_os(1);
+
+			PHY_SetBBReg(Adapter, Rtl819XPHY_REGArray_Table[i], bMaskDWord, Rtl819XPHY_REGArray_Table[i+1]);
+
+			// Add 1us delay between BB/RF register setting.
			rtw_udelay_os(1);
+
+			//RT_TRACE(COMP_INIT, DBG_TRACE, ("The Rtl819XPHY_REGArray_Table[0] is %lx Rtl819XPHY_REGArray[1] is %lx \n",Rtl819XPHY_REGArray_Table[i], Rtl819XPHY_REGArray_Table[i+1]));
+		}
+		#endif
+		// for External PA
+		phy_ConfigBBExternalPA(Adapter);
+	}
+	else if(ConfigType == BaseBand_Config_AGC_TAB)
+	{
+		#ifdef CONFIG_IOL_BB_AGC_TAB
+		{
+			struct xmit_frame	*xmit_frame;
+
+			if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) {
+				ret = _FAIL;
+				goto exit;
+			}
+
+			for(i=0;i<AGCTAB_ArrayLen;i=i+2)
+			{
+				rtw_IOL_append_WD_cmd(xmit_frame, Rtl819XAGCTAB_Array_Table[i], Rtl819XAGCTAB_Array_Table[i+1]);							
+				//RT_TRACE(COMP_INIT, DBG_TRACE, ("The Rtl819XAGCTAB_Array_Table[0] is %lx Rtl819XPHY_REGArray[1] is %lx \n",Rtl819XAGCTAB_Array_Table[i], Rtl819XAGCTAB_Array_Table[i+1]));
+			}
+		
+			ret = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000);
+		}
+		#else
+		for(i=0;i<AGCTAB_ArrayLen;i=i+2)
+		{
+			PHY_SetBBReg(Adapter, Rtl819XAGCTAB_Array_Table[i], bMaskDWord, Rtl819XAGCTAB_Array_Table[i+1]);		
+
+			// Add 1us delay between BB/RF register setting.
+			rtw_udelay_os(1);
+			
+			//RT_TRACE(COMP_INIT, DBG_TRACE, ("The Rtl819XAGCTAB_Array_Table[0] is %lx Rtl819XPHY_REGArray[1] is %lx \n",Rtl819XAGCTAB_Array_Table[i], Rtl819XAGCTAB_Array_Table[i+1]));
+		}
+		#endif
+	}
+
+exit:
+	return ret;
+	
+}
+
+
+VOID
+storePwrIndexDiffRateOffset(
+	IN	PADAPTER	Adapter,
+	IN	u32		RegAddr,
+	IN	u32		BitMask,
+	IN	u32		Data
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	
+	if(RegAddr == rTxAGC_A_Rate18_06)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][0] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0]));
+	}
+	if(RegAddr == rTxAGC_A_Rate54_24)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][1] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][1] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][1]));
+	}
+	if(RegAddr == rTxAGC_A_CCK1_Mcs32)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][6] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][6] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][6]));
+	}
+	if(RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0xffffff00)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][7] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][7] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][7]));
+	}	
+	if(RegAddr == rTxAGC_A_Mcs03_Mcs00)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][2] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][2] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][2]));
+	}
+	if(RegAddr == rTxAGC_A_Mcs07_Mcs04)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][3] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][3] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][3]));
+	}
+	if(RegAddr == rTxAGC_A_Mcs11_Mcs08)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][4] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4]));
+	}
+	if(RegAddr == rTxAGC_A_Mcs15_Mcs12)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][5] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5]));
+	}
+	if(RegAddr == rTxAGC_B_Rate18_06)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][8] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8]));
+	}
+	if(RegAddr == rTxAGC_B_Rate54_24)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][9] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][9] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][9]));
+	}
+	if(RegAddr == rTxAGC_B_CCK1_55_Mcs32)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][14] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][14] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][14]));
+	}
+	if(RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0x000000ff)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][15] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][15] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][15]));
+	}	
+	if(RegAddr == rTxAGC_B_Mcs03_Mcs00)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][10] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][10] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][10]));
+	}
+	if(RegAddr == rTxAGC_B_Mcs07_Mcs04)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][11] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11]));
+	}
+	if(RegAddr == rTxAGC_B_Mcs11_Mcs08)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][12] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12]));
+	}
+	if(RegAddr == rTxAGC_B_Mcs15_Mcs12)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][13] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13]));
+		pHalData->pwrGroupCnt++;
+	}
+}
+/*-----------------------------------------------------------------------------
+ * Function:	phy_ConfigBBWithPgParaFile
+ *
+ * Overview:	
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/06/2008 	MHC		Create Version 0.
+ * 2009/07/29	tynli		(porting from 92SE branch)2009/03/11 Add copy parameter file to buffer for silent reset
+ *---------------------------------------------------------------------------*/
+static	int
+phy_ConfigBBWithPgParaFile(
+	IN	PADAPTER		Adapter,
+	IN	u8* 			pFileName)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	
+	int		rtStatus = _SUCCESS;
+
+
+	return rtStatus;
+	
+}	/* phy_ConfigBBWithPgParaFile */
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	phy_ConfigBBWithPgHeaderFile
+ *
+ * Overview:	Config PHY_REG_PG array 
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/06/2008 	MHC		Add later!!!!!!.. Please modify for new files!!!!
+ * 11/10/2008	tynli		Modify to mew files.
+ *---------------------------------------------------------------------------*/
+static	int
+phy_ConfigBBWithPgHeaderFile(
+	IN	PADAPTER		Adapter,
+	IN	u8 			ConfigType)
+{
+	int i;
+	u32*	Rtl819XPHY_REGArray_Table_PG;
+	u16	PHY_REGArrayPGLen;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	// Default: pHalData->RF_Type = RF_2T2R.
+	if(IS_NORMAL_CHIP(pHalData->VersionID))
+	{
+		PHY_REGArrayPGLen = PHY_REG_Array_PGLength;
+		Rtl819XPHY_REGArray_Table_PG = Rtl819XPHY_REG_Array_PG;
+
+#ifdef CONFIG_USB_HCI
+// 2010/10/19 Chiyoko According to Alex/Willson opinion, VAU/dongle can share the same PHY_REG_PG.txt
+/*
+		if(pHalData->BoardType == BOARD_MINICARD )
+		{
+			PHY_REGArrayPGLen = PHY_REG_Array_PG_mCardLength;
+			Rtl819XPHY_REGArray_Table_PG = Rtl819XPHY_REG_Array_PG_mCard;
+		}
+		else */if(pHalData->BoardType ==BOARD_USB_High_PA )
+		{
+			PHY_REGArrayPGLen = PHY_REG_Array_PG_HPLength;
+			Rtl819XPHY_REGArray_Table_PG = Rtl819XPHY_REG_Array_PG_HP;
+		}
+#endif
+	}
+	else
+	{
+		DBG_8192C(" ===> phy_ConfigBBWithPgHeaderFile(): do not support test chip\n");
+		return _FAIL;
+	}
+
+	if(ConfigType == BaseBand_Config_PHY_REG)
+	{
+		for(i=0;i<PHY_REGArrayPGLen;i=i+3)
+		{
+			#if 0 //without IO, no delay is neeeded...
+			if (Rtl819XPHY_REGArray_Table_PG[i] == 0xfe){
+				#ifdef CONFIG_LONG_DELAY_ISSUE
+				rtw_msleep_os(50);
+				#else
+				rtw_mdelay_os(50);
+				#endif
+			}
+			else if (Rtl819XPHY_REGArray_Table_PG[i] == 0xfd)
+				rtw_mdelay_os(5);
+			else if (Rtl819XPHY_REGArray_Table_PG[i] == 0xfc)
+				rtw_mdelay_os(1);
+			else if (Rtl819XPHY_REGArray_Table_PG[i] == 0xfb)
+				rtw_udelay_os(50);
+			else if (Rtl819XPHY_REGArray_Table_PG[i] == 0xfa)
+				rtw_udelay_os(5);
+			else if (Rtl819XPHY_REGArray_Table_PG[i] == 0xf9)
+				rtw_udelay_os(1);
+			//PHY_SetBBReg(Adapter, Rtl819XPHY_REGArray_Table_PG[i], Rtl819XPHY_REGArray_Table_PG[i+1], Rtl819XPHY_REGArray_Table_PG[i+2]);		
+			#endif
+			
+			storePwrIndexDiffRateOffset(Adapter, Rtl819XPHY_REGArray_Table_PG[i], 
+				Rtl819XPHY_REGArray_Table_PG[i+1], 
+				Rtl819XPHY_REGArray_Table_PG[i+2]);
+			//RT_TRACE(COMP_SEND, DBG_TRACE, ("The Rtl819XPHY_REGArray_Table_PG[0] is %lx Rtl819XPHY_REGArray_Table_PG[1] is %lx \n",Rtl819XPHY_REGArray_Table_PG[i], Rtl819XPHY_REGArray_Table_PG[i+1]));
+		}
+	}
+	else
+	{
+
+		//RT_TRACE(COMP_SEND, DBG_LOUD, ("phy_ConfigBBWithPgHeaderFile(): ConfigType != BaseBand_Config_PHY_REG\n"));
+	}
+	
+	return _SUCCESS;
+	
+}	/* phy_ConfigBBWithPgHeaderFile */
+
+#if (MP_DRIVER == 1)
+
+/*-----------------------------------------------------------------------------
+ * Function:    phy_ConfigBBWithMpParaFile()
+ *
+ * Overview:    This function read BB parameters from general file format, and do register
+ *			  Read/Write 
+ *
+ * Input:      	PADAPTER		Adapter
+ *			ps1Byte 			pFileName			
+ *
+ * Output:      NONE
+ *
+ * Return:      RT_STATUS_SUCCESS: configuration file exist
+ *	2008/11/06	MH	For 92S we do not support silent reset now. Disable 
+ *					parameter file compare!!!!!!??
+ *			
+ *---------------------------------------------------------------------------*/
+static	int
+phy_ConfigBBWithMpParaFile(
+	IN	PADAPTER		Adapter,
+	IN	u8* 			pFileName
+)
+{
+#if 1
+	int		rtStatus = _SUCCESS;
+#else
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	s4Byte			nLinesRead, ithLine;
+	RT_STATUS		rtStatus = RT_STATUS_SUCCESS;
+	ps1Byte 		szLine;
+	u4Byte			u4bRegOffset, u4bRegMask, u4bRegValue;
+	u4Byte			u4bMove;
+	
+	if(ADAPTER_TEST_STATUS_FLAG(Adapter, ADAPTER_STATUS_FIRST_INIT))
+	{
+		rtStatus = PlatformReadFile(
+					Adapter, 
+					pFileName,
+					(pu1Byte)(pHalData->BufOfLines),
+					MAX_LINES_HWCONFIG_TXT,
+					MAX_BYTES_LINE_HWCONFIG_TXT,
+					&nLinesRead
+					);
+		if(rtStatus == RT_STATUS_SUCCESS)
+		{
+			PlatformMoveMemory(pHalData->BufOfLines6, pHalData->BufOfLines, nLinesRead*MAX_BYTES_LINE_HWCONFIG_TXT);
+			pHalData->nLinesRead6 = nLinesRead;
+		}
+		else
+		{
+			// Temporarily skip PHY_REG_MP.txt if file does not exist.
+			pHalData->nLinesRead6 = 0;
+			RT_TRACE(COMP_INIT, DBG_LOUD, ("No matched file \r\n"));
+			return RT_STATUS_SUCCESS;
+		}
+	}
+	else
+	{
+		PlatformMoveMemory(pHalData->BufOfLines, pHalData->BufOfLines6, MAX_LINES_HWCONFIG_TXT*MAX_BYTES_LINE_HWCONFIG_TXT);
+		nLinesRead = pHalData->nLinesRead6;
+		rtStatus = RT_STATUS_SUCCESS;
+	}
+
+
+	if(rtStatus == RT_STATUS_SUCCESS)
+	{
+		RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_ConfigBBWithMpParaFile(): read %s ok\n", pFileName));
+
+		for(ithLine = 0; ithLine < nLinesRead; ithLine++)
+		{
+			szLine = pHalData->BufOfLines[ithLine];
+
+			if(!IsCommentString(szLine))
+			{
+				// Get 1st hex value as register offset.
+				if(GetHexValueFromString(szLine, &u4bRegOffset, &u4bMove))
+				{
+					if(u4bRegOffset == 0xff)
+					{ // Ending.
+						break;
+					}
+					else if (u4bRegOffset == 0xfe)
+						delay_ms(50);
+					else if (u4bRegOffset == 0xfd)
+						delay_ms(5);
+					else if (u4bRegOffset == 0xfc)
+						delay_ms(1);
+					else if (u4bRegOffset == 0xfb)
+						PlatformStallExecution(50);
+					else if (u4bRegOffset == 0xfa)
+						PlatformStallExecution(5);
+					else if (u4bRegOffset == 0xf9)
+						PlatformStallExecution(1);
+					
+					// Get 2nd hex value as register value.
+					szLine += u4bMove;
+					if(GetHexValueFromString(szLine, &u4bRegValue, &u4bMove))
+					{
+						RT_TRACE(COMP_FPGA, DBG_TRACE, ("[ADDR]%03lX=%08lX\n", u4bRegOffset, u4bRegValue));
+						PHY_SetBBReg(Adapter, u4bRegOffset, bMaskDWord, u4bRegValue);
+
+						// Add 1us delay between BB/RF register setting.
+						PlatformStallExecution(1);
+					}
+				}
+			}
+		}
+	}
+	else
+	{
+		RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_ConfigBBWithMpParaFile(): Failed%s\n", pFileName));
+	}
+#endif
+
+	return rtStatus;
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:	phy_ConfigBBWithMpHeaderFile
+ *
+ * Overview:	Config PHY_REG_MP array 
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 02/04/2010	chiyokolin		Modify to new files.
+ *---------------------------------------------------------------------------*/
+static int
+phy_ConfigBBWithMpHeaderFile(
+	IN	PADAPTER		Adapter,
+	IN	u1Byte 			ConfigType)
+{
+	int i;
+	u32*	Rtl8192CPHY_REGArray_Table_MP;
+	u16	PHY_REGArrayMPLen;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	PHY_REGArrayMPLen = PHY_REG_Array_MPLength;
+	Rtl8192CPHY_REGArray_Table_MP = Rtl819XPHY_REG_Array_MP;
+
+	if(ConfigType == BaseBand_Config_PHY_REG)
+	{
+		for(i=0;i<PHY_REGArrayMPLen;i=i+2)
+		{
+			if (Rtl8192CPHY_REGArray_Table_MP[i] == 0xfe) {
+				#ifdef CONFIG_LONG_DELAY_ISSUE
+				rtw_msleep_os(50);
+				#else
+				rtw_mdelay_os(50);
+				#endif
+			}
+			else if (Rtl8192CPHY_REGArray_Table_MP[i] == 0xfd)
+				rtw_mdelay_os(5);
+			else if (Rtl8192CPHY_REGArray_Table_MP[i] == 0xfc)
+				rtw_mdelay_os(1);
+			else if (Rtl8192CPHY_REGArray_Table_MP[i] == 0xfb) {
+				#ifdef CONFIG_LONG_DELAY_ISSUE
+				rtw_msleep_os(50);
+				#else
+				rtw_mdelay_os(50);
+				#endif
+			}
+			else if (Rtl8192CPHY_REGArray_Table_MP[i] == 0xfa)
+				rtw_mdelay_os(5);
+			else if (Rtl8192CPHY_REGArray_Table_MP[i] == 0xf9)
+				rtw_mdelay_os(1);
+			PHY_SetBBReg(Adapter, Rtl8192CPHY_REGArray_Table_MP[i], bMaskDWord, Rtl8192CPHY_REGArray_Table_MP[i+1]);		
+
+			// Add 1us delay between BB/RF register setting.
+			rtw_mdelay_os(1);
+
+//			RT_TRACE(COMP_INIT, DBG_TRACE, ("The Rtl8192CPHY_REGArray_Table_MP[%d] is %lx Rtl8192CPHY_REGArray_Table_MP[%d] is %lx \n", i, i+1, Rtl8192CPHY_REGArray_Table_MP[i], Rtl8192CPHY_REGArray_Table_MP[i+1]));
+		}
+	}
+	else
+	{
+//		RT_TRACE(COMP_SEND, DBG_LOUD, ("phy_ConfigBBWithMpHeaderFile(): ConfigType != BaseBand_Config_PHY_REG\n"));
+	}
+
+	return _SUCCESS;
+}	/* phy_ConfigBBWithMpHeaderFile */
+
+#endif	// #if (MP_DRIVER == 1)
+
+static VOID
+phy_BB8192C_Config_1T(
+	IN PADAPTER Adapter
+	)
+{
+#if 0
+	//for path - A
+	PHY_SetBBReg(Adapter, rFPGA0_TxInfo, 0x3, 0x1);
+	PHY_SetBBReg(Adapter, rFPGA1_TxInfo, 0x0303, 0x0101);
+	PHY_SetBBReg(Adapter, 0xe74, 0x0c000000, 0x1);
+	PHY_SetBBReg(Adapter, 0xe78, 0x0c000000, 0x1);
+	PHY_SetBBReg(Adapter, 0xe7c, 0x0c000000, 0x1);
+	PHY_SetBBReg(Adapter, 0xe80, 0x0c000000, 0x1);
+	PHY_SetBBReg(Adapter, 0xe88, 0x0c000000, 0x1);
+#endif
+	//for path - B
+	PHY_SetBBReg(Adapter, rFPGA0_TxInfo, 0x3, 0x2);
+	PHY_SetBBReg(Adapter, rFPGA1_TxInfo, 0x300033, 0x200022);
+
+	// 20100519 Joseph: Add for 1T2R config. Suggested by Kevin, Jenyu and Yunan.
+	PHY_SetBBReg(Adapter, rCCK0_AFESetting, bMaskByte3, 0x45);
+	PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x23);
+	PHY_SetBBReg(Adapter, rOFDM0_AGCParameter1, 0x30, 0x1);	// B path first AGC
+	
+	PHY_SetBBReg(Adapter, 0xe74, 0x0c000000, 0x2);
+	PHY_SetBBReg(Adapter, 0xe78, 0x0c000000, 0x2);
+	PHY_SetBBReg(Adapter, 0xe7c, 0x0c000000, 0x2);
+	PHY_SetBBReg(Adapter, 0xe80, 0x0c000000, 0x2);
+	PHY_SetBBReg(Adapter, 0xe88, 0x0c000000, 0x2);
+
+	
+}
+
+// Joseph test: new initialize order!!
+// Test only!! This part need to be re-organized.
+// Now it is just for 8256.
+static	int
+phy_BB8190_Config_HardCode(
+	IN	PADAPTER	Adapter
+	)
+{
+	//RT_ASSERT(FALSE, ("This function is not implement yet!! \n"));
+	return _SUCCESS;
+}
+
+static	int
+phy_BB8192C_Config_ParaFile(
+	IN	PADAPTER	Adapter
+	)
+{
+	EEPROM_EFUSE_PRIV	*pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter);
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	int			rtStatus = _SUCCESS;
+
+	u8				szBBRegPgFile[] = RTL819X_PHY_REG_PG;
+	
+	u8				sz88CBBRegFile[] = RTL8188C_PHY_REG;	
+	u8				sz88CAGCTableFile[] = RTL8188C_AGC_TAB;
+
+	u8				sz92CBBRegFile[] = RTL8192C_PHY_REG;	
+	u8				sz92CAGCTableFile[] = RTL8192C_AGC_TAB;
+	
+	u8				*pszBBRegFile, *pszAGCTableFile, *pszBBRegMpFile;
+	
+	//RT_TRACE(COMP_INIT, DBG_TRACE, ("==>phy_BB8192S_Config_ParaFile\n"));
+
+	if(IS_92C_SERIAL(pHalData->VersionID)){
+		pszBBRegFile=(u8*)&sz92CBBRegFile ;
+		pszAGCTableFile =(u8*)&sz92CAGCTableFile;
+	}
+	else{
+		pszBBRegFile=(u8*)&sz88CBBRegFile ;
+		pszAGCTableFile =(u8*)&sz88CAGCTableFile;
+	}
+
+	//
+	// 1. Read PHY_REG.TXT BB INIT!!
+	// We will seperate as 88C / 92C according to chip version
+	//
+#ifdef CONFIG_EMBEDDED_FWIMG
+	rtStatus = phy_ConfigBBWithHeaderFile(Adapter, BaseBand_Config_PHY_REG);	
+#else	
+	// No matter what kind of CHIP we always read PHY_REG.txt. We must copy different 
+	// type of parameter files to phy_reg.txt at first.	
+	rtStatus = phy_ConfigBBWithParaFile(Adapter,pszBBRegFile);
+#endif
+
+	if(rtStatus != _SUCCESS){
+		//RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():Write BB Reg Fail!!"));
+		goto phy_BB8190_Config_ParaFile_Fail;
+	}
+
+#if MP_DRIVER == 1
+	//
+	// 1.1 Read PHY_REG_MP.TXT BB INIT!!
+	// We will seperate as 88C / 92C according to chip version
+	//
+#ifdef CONFIG_EMBEDDED_FWIMG
+	rtStatus = phy_ConfigBBWithMpHeaderFile(Adapter, BaseBand_Config_PHY_REG);	
+#else	
+	// No matter what kind of CHIP we always read PHY_REG.txt. We must copy different 
+	// type of parameter files to phy_reg.txt at first.	
+	rtStatus = phy_ConfigBBWithMpParaFile(Adapter, pszBBRegMpFile);
+#endif
+
+	if(rtStatus != _SUCCESS){
+//		RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():Write BB Reg MP Fail!!"));
+		goto phy_BB8190_Config_ParaFile_Fail;
+	}	
+#endif	// #if (MP_DRIVER == 1)
+
+	//
+	// 20100318 Joseph: Config 2T2R to 1T2R if necessary.
+	//
+	if(pHalData->rf_type == RF_1T2R)
+	{
+		phy_BB8192C_Config_1T(Adapter);
+		DBG_8192C("phy_BB8192C_Config_ParaFile():Config to 1T!!\n");
+	}
+
+	//
+	// 2. If EEPROM or EFUSE autoload OK, We must config by PHY_REG_PG.txt
+	//
+	if (pEEPROM->bautoload_fail_flag == _FALSE)
+	{
+		pHalData->pwrGroupCnt = 0;
+
+#ifdef CONFIG_EMBEDDED_FWIMG
+		rtStatus = phy_ConfigBBWithPgHeaderFile(Adapter, BaseBand_Config_PHY_REG);
+#else
+		rtStatus = phy_ConfigBBWithPgParaFile(Adapter, (u8*)&szBBRegPgFile);
+#endif
+	}
+	
+	if(rtStatus != _SUCCESS){
+		//RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():BB_PG Reg Fail!!"));
+		goto phy_BB8190_Config_ParaFile_Fail;
+	}
+
+	//
+	// 3. BB AGC table Initialization
+	//
+#ifdef CONFIG_EMBEDDED_FWIMG
+	rtStatus = phy_ConfigBBWithHeaderFile(Adapter, BaseBand_Config_AGC_TAB);
+#else
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_BB8192S_Config_ParaFile AGC_TAB.txt\n"));
+	rtStatus = phy_ConfigBBWithParaFile(Adapter, pszAGCTableFile);
+#endif
+
+	if(rtStatus != _SUCCESS){
+		//RT_TRACE(COMP_FPGA, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():AGC Table Fail\n"));
+		goto phy_BB8190_Config_ParaFile_Fail;
+	}
+
+	// Check if the CCK HighPower is turned ON.
+	// This is used to calculate PWDB.
+	pHalData->bCckHighPower = (BOOLEAN)(PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, 0x200));
+	
+phy_BB8190_Config_ParaFile_Fail:
+
+	return rtStatus;
+}
+
+
+int
+PHY_BBConfig8192C(
+	IN	PADAPTER	Adapter
+	)
+{
+	int	rtStatus = _SUCCESS;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u32	RegVal;
+	u8	TmpU1B=0;
+	u8	value8;
+
+	phy_InitBBRFRegisterDefinition(Adapter);
+
+	if(IS_HARDWARE_TYPE_8723(Adapter))
+	{
+		// Suggested by Scott. tynli_test. 2010.12.30.
+		//1. 0x28[1] = 1
+		TmpU1B = rtw_read8(Adapter, REG_AFE_PLL_CTRL);
+		rtw_udelay_os(2);
+		rtw_write8(Adapter, REG_AFE_PLL_CTRL, (TmpU1B|BIT1));
+		rtw_udelay_os(2);
+		
+		//2. 0x29[7:0] = 0xFF
+		rtw_write8(Adapter, REG_AFE_PLL_CTRL+1, 0xff);
+		rtw_udelay_os(2);
+		
+		//3. 0x02[1:0] = 2b'11
+		TmpU1B = rtw_read8(Adapter, REG_SYS_FUNC_EN);
+		rtw_write8(Adapter, REG_SYS_FUNC_EN, (TmpU1B|FEN_BB_GLB_RSTn|FEN_BBRSTB));
+		
+		//4. 0x25[6] = 0
+		TmpU1B = rtw_read8(Adapter, REG_AFE_XTAL_CTRL+1);
+		rtw_write8(Adapter, REG_AFE_XTAL_CTRL+1, (TmpU1B&(~BIT6)));
+		
+		//5. 0x24[20] = 0 	//Advised by SD3 Alex Wang. 2011.02.09.
+		TmpU1B = rtw_read8(Adapter, REG_AFE_XTAL_CTRL+2);
+		rtw_write8(Adapter, REG_AFE_XTAL_CTRL+2, (TmpU1B&(~BIT4)));
+		
+		//6. 0x1f[7:0] = 0x07
+		rtw_write8(Adapter, REG_RF_CTRL, 0x07);
+	}
+	else
+	{
+		// Enable BB and RF
+		RegVal = rtw_read16(Adapter, REG_SYS_FUNC_EN);
+		rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal|BIT13|BIT0|BIT1));
+
+		// 20090923 Joseph: Advised by Steven and Jenyu. Power sequence before init RF.
+		rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x83);
+		rtw_write8(Adapter, REG_AFE_PLL_CTRL+1, 0xdb);
+
+		rtw_write8(Adapter, REG_RF_CTRL, RF_EN|RF_RSTB|RF_SDMRSTB);
+
+#ifdef CONFIG_USB_HCI
+		rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_USBA | FEN_USBD | FEN_BB_GLB_RSTn | FEN_BBRSTB);
+#else
+		rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_PPLL|FEN_PCIEA|FEN_DIO_PCIE|FEN_BB_GLB_RSTn|FEN_BBRSTB);
+#endif
+
+		// 2009/10/21 by SD1 Jong. Modified by tynli. Not in Documented in V8.1. 
+		if(!IS_NORMAL_CHIP(pHalData->VersionID))
+		{
+#ifdef CONFIG_USB_HCI
+			rtw_write8(Adapter, REG_LDOHCI12_CTRL, 0x1f);
+#else
+			rtw_write8(Adapter, REG_LDOHCI12_CTRL, 0x1b); 
+#endif
+		}
+		else
+		{
+#ifdef CONFIG_USB_HCI
+			//To Fix MAC loopback mode fail. Suggested by SD4 Johnny. 2010.03.23.
+			rtw_write8(Adapter, REG_LDOHCI12_CTRL, 0x0f);	
+			rtw_write8(Adapter, 0x15, 0xe9);
+#endif
+		}
+
+		rtw_write8(Adapter, REG_AFE_XTAL_CTRL+1, 0x80);
+
+#ifdef CONFIG_PCI_HCI
+		// Force use left antenna by default for 88C.
+	//	if(!IS_92C_SERIAL(pHalData->VersionID) || IS_92C_1T2R(pHalData->VersionID))
+		if(Adapter->ledpriv.LedStrategy != SW_LED_MODE10)
+		{
+			RegVal = rtw_read32(Adapter, REG_LEDCFG0);
+			rtw_write32(Adapter, REG_LEDCFG0, RegVal|BIT23);
+		}
+#endif
+	}
+
+	//
+	// Config BB and AGC
+	//
+	rtStatus = phy_BB8192C_Config_ParaFile(Adapter);
+#if 0	
+	switch(Adapter->MgntInfo.bRegHwParaFile)
+	{
+		case 0:
+			phy_BB8190_Config_HardCode(Adapter);
+			break;
+
+		case 1:
+			rtStatus = phy_BB8192C_Config_ParaFile(Adapter);
+			break;
+
+		case 2:
+			// Partial Modify. 
+			phy_BB8190_Config_HardCode(Adapter);
+			phy_BB8192C_Config_ParaFile(Adapter);
+			break;
+
+		default:
+			phy_BB8190_Config_HardCode(Adapter);
+			break;
+	}
+#endif	
+#ifdef CONFIG_USB_HCI
+	if(IS_HARDWARE_TYPE_8192CU(Adapter)&&IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)
+		&&(pHalData->BoardType == BOARD_USB_High_PA))
+			rtw_write8(Adapter, 0xc72, 0x50);		
+#endif
+
+	// <tynli_note> For fix 8723 WL_TRSW bug. Suggested by Scott. 2011.01.24.
+	if(IS_HARDWARE_TYPE_8723(Adapter))
+	{
+		if(!IS_NORMAL_CHIP(pHalData->VersionID))
+		{
+			// 1. 0x40[2] = 1	
+			value8 = rtw_read8(Adapter, REG_GPIO_MUXCFG);
+			rtw_write8(Adapter, REG_GPIO_MUXCFG, (value8|BIT2));
+
+			// 2. 0x804[14] = 0 // BB disable TRSW control, enable SW control
+			PHY_SetBBReg(Adapter, rFPGA0_TxInfo, BIT14, 0x0);
+			
+			// 3. 0x870[6:5] = 2'b11
+			PHY_SetBBReg(Adapter, rFPGA0_XAB_RFInterfaceSW, (BIT5|BIT6), 0x3);
+			
+			// 4. 0x860[6:5] = 2'b00 // BB SW control TRSW pin output level 
+			PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, (BIT5|BIT6), 0x0);
+		}
+	}
+#if 0
+	// Check BB/RF confiuration setting.
+	// We only need to configure RF which is turned on.
+	PathMap = (u1Byte)(PHY_QueryBBReg(Adapter, rFPGA0_TxInfo, 0xf) |
+				PHY_QueryBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf));
+	pHalData->RF_PathMap = PathMap;
+	for(index = 0; index<4; index++)
+	{
+		if((PathMap>>index)&0x1)
+			rf_num++;
+	}
+
+	if((GET_RF_TYPE(Adapter) ==RF_1T1R && rf_num!=1) ||
+		(GET_RF_TYPE(Adapter)==RF_1T2R && rf_num!=2) ||
+		(GET_RF_TYPE(Adapter)==RF_2T2R && rf_num!=2) ||
+		(GET_RF_TYPE(Adapter)==RF_2T2R_GREEN && rf_num!=2) ||
+		(GET_RF_TYPE(Adapter)==RF_2T4R && rf_num!=4))
+	{
+		RT_TRACE(
+			COMP_INIT, 
+			DBG_LOUD, 
+			("PHY_BBConfig8192C: RF_Type(%x) does not match RF_Num(%x)!!\n", pHalData->RF_Type, rf_num));
+	}
+#endif
+
+	return rtStatus;
+}
+
+
+int
+PHY_RFConfig8192C(
+	IN	PADAPTER	Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	int		rtStatus = _SUCCESS;
+
+	//
+	// RF config
+	//
+	rtStatus = PHY_RF6052_Config8192C(Adapter);
+#if 0	
+	switch(pHalData->rf_chip)
+	{
+		case RF_6052:
+			rtStatus = PHY_RF6052_Config(Adapter);
+			break;
+		case RF_8225:
+			rtStatus = PHY_RF8225_Config(Adapter);
+			break;
+		case RF_8256:			
+			rtStatus = PHY_RF8256_Config(Adapter);
+			break;
+		case RF_8258:
+			break;
+		case RF_PSEUDO_11N:
+			rtStatus = PHY_RF8225_Config(Adapter);
+			break;
+		default: //for MacOs Warning: "RF_TYPE_MIN" not handled in switch
+			break;
+	}
+#endif
+	return rtStatus;
+}
+
+
+/*-----------------------------------------------------------------------------
+ * Function:    PHY_ConfigRFWithParaFile()
+ *
+ * Overview:    This function read RF parameters from general file format, and do RF 3-wire
+ *
+ * Input:      	PADAPTER			Adapter
+ *			ps1Byte 				pFileName			
+ *			RF90_RADIO_PATH_E	eRFPath
+ *
+ * Output:      NONE
+ *
+ * Return:      RT_STATUS_SUCCESS: configuration file exist
+ *			
+ * Note:		Delay may be required for RF configuration
+ *---------------------------------------------------------------------------*/
+int
+rtl8192c_PHY_ConfigRFWithParaFile(
+	IN	PADAPTER			Adapter,
+	IN	u8* 				pFileName,
+	RF90_RADIO_PATH_E		eRFPath
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	
+	int	rtStatus = _SUCCESS;
+
+
+	return rtStatus;
+	
+}
+
+//****************************************
+// The following is for High Power PA
+//****************************************
+#define HighPowerRadioAArrayLen 22
+//This is for High power PA
+u32 Rtl8192S_HighPower_RadioA_Array[HighPowerRadioAArrayLen] = {
+0x013,0x00029ea4,
+0x013,0x00025e74,
+0x013,0x00020ea4,
+0x013,0x0001ced0,
+0x013,0x00019f40,
+0x013,0x00014e70,
+0x013,0x000106a0,
+0x013,0x0000c670,
+0x013,0x000082a0,
+0x013,0x00004270,
+0x013,0x00000240,
+};
+
+int
+PHY_ConfigRFExternalPA(
+	IN	PADAPTER			Adapter,
+	RF90_RADIO_PATH_E		eRFPath
+)
+{
+	int	rtStatus = _SUCCESS;
+#ifdef CONFIG_USB_HCI
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u16 i=0;
+
+	if(!pHalData->ExternalPA)
+	{
+		return rtStatus;
+	}
+	
+	// 2010/10/19 MH According to Jenyu/EEChou 's opinion, we need not to execute the 
+	// same code as SU. It is already updated in radio_a_1T_HP.txt.
+#if 0	
+	//add for SU High Power PA
+	for(i = 0;i<HighPowerRadioAArrayLen; i=i+2)
+	{
+		RT_TRACE(COMP_INIT, DBG_LOUD, ("External PA, write RF 0x%lx=0x%lx\n", Rtl8192S_HighPower_RadioA_Array[i], Rtl8192S_HighPower_RadioA_Array[i+1]));
+		PHY_SetRFReg(Adapter, eRFPath, Rtl8192S_HighPower_RadioA_Array[i], bRFRegOffsetMask, Rtl8192S_HighPower_RadioA_Array[i+1]);
+	}
+#endif
+
+#endif
+	return rtStatus;
+}
+//****************************************
+/*-----------------------------------------------------------------------------
+ * Function:    PHY_ConfigRFWithHeaderFile()
+ *
+ * Overview:    This function read RF parameters from general file format, and do RF 3-wire
+ *
+ * Input:      	PADAPTER			Adapter
+ *			ps1Byte 				pFileName			
+ *			RF90_RADIO_PATH_E	eRFPath
+ *
+ * Output:      NONE
+ *
+ * Return:      RT_STATUS_SUCCESS: configuration file exist
+ *			
+ * Note:		Delay may be required for RF configuration
+ *---------------------------------------------------------------------------*/
+int
+rtl8192c_PHY_ConfigRFWithHeaderFile(
+	IN	PADAPTER			Adapter,
+	RF90_RADIO_PATH_E		eRFPath
+)
+{
+
+	int			i;
+	int			rtStatus = _SUCCESS;
+	u32*		Rtl819XRadioA_Array_Table;
+	u32*		Rtl819XRadioB_Array_Table;
+	u16		RadioA_ArrayLen,RadioB_ArrayLen;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	
+	//
+	// 2009.11.24. Modified by tynli.
+	//
+	if(IS_92C_SERIAL(pHalData->VersionID))
+	{
+		if(IS_NORMAL_CHIP(pHalData->VersionID))
+		{
+			RadioA_ArrayLen = RadioA_2TArrayLength;
+			Rtl819XRadioA_Array_Table = Rtl819XRadioA_2TArray;
+			RadioB_ArrayLen = RadioB_2TArrayLength;
+			Rtl819XRadioB_Array_Table = Rtl819XRadioB_2TArray;
+		}
+		else
+		{
+			rtStatus = _FAIL;
+			goto exit;
+		}
+	}
+	else
+	{
+		if(IS_NORMAL_CHIP(pHalData->VersionID))
+		{
+			RadioA_ArrayLen = RadioA_1TArrayLength;
+			Rtl819XRadioA_Array_Table = Rtl819XRadioA_1TArray;
+			RadioB_ArrayLen = RadioB_1TArrayLength;	
+			Rtl819XRadioB_Array_Table = Rtl819XRadioB_1TArray;
+#ifdef CONFIG_USB_HCI
+			if( BOARD_MINICARD == pHalData->BoardType )
+			{
+				RadioA_ArrayLen = RadioA_1T_mCardArrayLength;
+				Rtl819XRadioA_Array_Table = Rtl819XRadioA_1T_mCardArray;
+				RadioB_ArrayLen = RadioB_1T_mCardArrayLength;	
+				Rtl819XRadioB_Array_Table = Rtl819XRadioB_1T_mCardArray;			
+			}
+			else if( BOARD_USB_High_PA == pHalData->BoardType )
+			{
+				RadioA_ArrayLen = RadioA_1T_HPArrayLength;
+				Rtl819XRadioA_Array_Table = Rtl819XRadioA_1T_HPArray;
+			}
+#endif
+		}
+		else
+		{
+			rtStatus = _FAIL;
+			goto exit;
+		}
+	}
+
+	switch(eRFPath){
+		case RF90_PATH_A:
+			#ifdef CONFIG_IOL_RF_RF90_PATH_A
+			{
+				struct xmit_frame	*xmit_frame;
+				if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) {
+					rtStatus = _FAIL;
+					goto exit;
+				}
+				
+				for(i = 0;i<RadioA_ArrayLen; i=i+2)
+				{
+					if(Rtl819XRadioA_Array_Table[i] == 0xfe)
+						rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 50);
+					else if (Rtl819XRadioA_Array_Table[i] == 0xfd)
+						rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 5);
+					else if (Rtl819XRadioA_Array_Table[i] == 0xfc)
+						rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 1);
+					else if (Rtl819XRadioA_Array_Table[i] == 0xfb)
+						rtw_IOL_append_DELAY_US_cmd(xmit_frame, 50);
+					else if (Rtl819XRadioA_Array_Table[i] == 0xfa)
+						rtw_IOL_append_DELAY_US_cmd(xmit_frame, 5);
+					else if (Rtl819XRadioA_Array_Table[i] == 0xf9)
+						rtw_IOL_append_DELAY_US_cmd(xmit_frame, 1);
+					else
+					{
+						BB_REGISTER_DEFINITION_T	*pPhyReg = &pHalData->PHYRegDef[eRFPath];
+						u32	NewOffset = 0;
+						u32	DataAndAddr = 0;
+						
+						NewOffset = Rtl819XRadioA_Array_Table[i] & 0x3f;
+						DataAndAddr = ((NewOffset<<20) | (Rtl819XRadioA_Array_Table[i+1]&0x000fffff)) & 0x0fffffff;	// T65 RF
+						rtw_IOL_append_WD_cmd(xmit_frame, pPhyReg->rf3wireOffset, DataAndAddr);
+					}
+				}	
+				rtStatus = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000);
+			}
+			#else
+			for(i = 0;i<RadioA_ArrayLen; i=i+2)
+			{
+				if(Rtl819XRadioA_Array_Table[i] == 0xfe) {
+					#ifdef CONFIG_LONG_DELAY_ISSUE
+					rtw_msleep_os(50);
+					#else
+					rtw_mdelay_os(50);
+					#endif
+				}
+				else if (Rtl819XRadioA_Array_Table[i] == 0xfd)
+					rtw_mdelay_os(5);
+				else if (Rtl819XRadioA_Array_Table[i] == 0xfc)
+					rtw_mdelay_os(1);
+				else if (Rtl819XRadioA_Array_Table[i] == 0xfb)
+					rtw_udelay_os(50);
+				else if (Rtl819XRadioA_Array_Table[i] == 0xfa)
+					rtw_udelay_os(5);
+				else if (Rtl819XRadioA_Array_Table[i] == 0xf9)
+					rtw_udelay_os(1);
+				else
+				{
+					PHY_SetRFReg(Adapter, eRFPath, Rtl819XRadioA_Array_Table[i], bRFRegOffsetMask, Rtl819XRadioA_Array_Table[i+1]);
+					// Add 1us delay between BB/RF register setting.
+					rtw_udelay_os(1);
+				}
+			}	
+			#endif
+			//Add for High Power PA
+			PHY_ConfigRFExternalPA(Adapter, eRFPath);
+			break;
+		case RF90_PATH_B:
+			#ifdef CONFIG_IOL_RF_RF90_PATH_B
+			{
+				struct xmit_frame	*xmit_frame;
+				if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) {
+					rtStatus = _FAIL;
+					goto exit;
+				}
+			
+				for(i = 0;i<RadioB_ArrayLen; i=i+2)
+				{
+					if(Rtl819XRadioB_Array_Table[i] == 0xfe)
+						rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 50);
+					else if (Rtl819XRadioB_Array_Table[i] == 0xfd)
+						rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 5);
+					else if (Rtl819XRadioB_Array_Table[i] == 0xfc)
+						rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 1);
+					else if (Rtl819XRadioB_Array_Table[i] == 0xfb)
+						rtw_IOL_append_DELAY_US_cmd(xmit_frame, 50);
+					else if (Rtl819XRadioB_Array_Table[i] == 0xfa)
+						rtw_IOL_append_DELAY_US_cmd(xmit_frame, 5);
+					else if (Rtl819XRadioB_Array_Table[i] == 0xf9)
+						rtw_IOL_append_DELAY_US_cmd(xmit_frame, 1);
+					else
+					{
+						BB_REGISTER_DEFINITION_T	*pPhyReg = &pHalData->PHYRegDef[eRFPath];
+						u32	NewOffset = 0;
+						u32	DataAndAddr = 0;
+						
+						NewOffset = Rtl819XRadioB_Array_Table[i] & 0x3f;
+						DataAndAddr = ((NewOffset<<20) | (Rtl819XRadioB_Array_Table[i+1]&0x000fffff)) & 0x0fffffff;	// T65 RF
+						rtw_IOL_append_WD_cmd(xmit_frame, pPhyReg->rf3wireOffset, DataAndAddr);
+					}
+				}	
+				rtStatus = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000);
+			}
+			#else
+			for(i = 0;i<RadioB_ArrayLen; i=i+2)
+			{
+				if(Rtl819XRadioB_Array_Table[i] == 0xfe)
+				{ // Deay specific ms. Only RF configuration require delay.												
+#if 0//#ifdef CONFIG_USB_HCI
+					#ifdef CONFIG_LONG_DELAY_ISSUE
+					rtw_msleep_os(1000);
+					#else
+					rtw_mdelay_os(1000);
+					#endif
+#else
+					#ifdef CONFIG_LONG_DELAY_ISSUE
+					rtw_msleep_os(50);
+					#else
+					rtw_mdelay_os(50);
+					#endif
+#endif
+				}
+				else if (Rtl819XRadioB_Array_Table[i] == 0xfd)
+					rtw_mdelay_os(5);
+				else if (Rtl819XRadioB_Array_Table[i] == 0xfc)
+					rtw_mdelay_os(1);
+				else if (Rtl819XRadioB_Array_Table[i] == 0xfb)
+					rtw_udelay_os(50);
+				else if (Rtl819XRadioB_Array_Table[i] == 0xfa)
+					rtw_udelay_os(5);
+				else if (Rtl819XRadioB_Array_Table[i] == 0xf9)
+					rtw_udelay_os(1);
+				else
+				{
+					PHY_SetRFReg(Adapter, eRFPath, Rtl819XRadioB_Array_Table[i], bRFRegOffsetMask, Rtl819XRadioB_Array_Table[i+1]);
+					// Add 1us delay between BB/RF register setting.
+					rtw_udelay_os(1);
+				}	
+			}
+			#endif
+			break;
+		case RF90_PATH_C:
+			break;
+		case RF90_PATH_D:
+			break;
+	}
+
+exit:	
+	return rtStatus;
+
+}
+
+
+/*-----------------------------------------------------------------------------
+ * Function:    PHY_CheckBBAndRFOK()
+ *
+ * Overview:    This function is write register and then readback to make sure whether
+ *			  BB[PHY0, PHY1], RF[Patha, path b, path c, path d] is Ok
+ *
+ * Input:      	PADAPTER			Adapter
+ *			HW90_BLOCK_E		CheckBlock
+ *			RF90_RADIO_PATH_E	eRFPath		// it is used only when CheckBlock is HW90_BLOCK_RF
+ *
+ * Output:      NONE
+ *
+ * Return:      RT_STATUS_SUCCESS: PHY is OK
+ *			
+ * Note:		This function may be removed in the ASIC
+ *---------------------------------------------------------------------------*/
+int
+PHY_CheckBBAndRFOK(
+	IN	PADAPTER			Adapter,
+	IN	HW90_BLOCK_E		CheckBlock,
+	IN	RF90_RADIO_PATH_E	eRFPath
+	)
+{
+	int			rtStatus = _SUCCESS;
+
+	u32				i, CheckTimes = 4,ulRegRead = 0;
+
+	u32				WriteAddr[4];
+	u32				WriteData[] = {0xfffff027, 0xaa55a02f, 0x00000027, 0x55aa502f};
+
+	// Initialize register address offset to be checked
+	WriteAddr[HW90_BLOCK_MAC] = 0x100;
+	WriteAddr[HW90_BLOCK_PHY0] = 0x900;
+	WriteAddr[HW90_BLOCK_PHY1] = 0x800;
+	WriteAddr[HW90_BLOCK_RF] = 0x3;
+	
+	for(i=0 ; i < CheckTimes ; i++)
+	{
+
+		//
+		// Write Data to register and readback
+		//
+		switch(CheckBlock)
+		{
+		case HW90_BLOCK_MAC:
+			//RT_ASSERT(FALSE, ("PHY_CheckBBRFOK(): Never Write 0x100 here!"));
+			//RT_TRACE(COMP_INIT, DBG_LOUD, ("PHY_CheckBBRFOK(): Never Write 0x100 here!\n"));
+			break;
+			
+		case HW90_BLOCK_PHY0:
+		case HW90_BLOCK_PHY1:
+			rtw_write32(Adapter, WriteAddr[CheckBlock], WriteData[i]);
+			ulRegRead = rtw_read32(Adapter, WriteAddr[CheckBlock]);
+			break;
+
+		case HW90_BLOCK_RF:
+			// When initialization, we want the delay function(delay_ms(), delay_us() 
+			// ==> actually we call PlatformStallExecution()) to do NdisStallExecution()
+			// [busy wait] instead of NdisMSleep(). So we acquire RT_INITIAL_SPINLOCK 
+			// to run at Dispatch level to achive it.	
+			//cosa PlatformAcquireSpinLock(Adapter, RT_INITIAL_SPINLOCK);
+			WriteData[i] &= 0xfff;
+			PHY_SetRFReg(Adapter, eRFPath, WriteAddr[HW90_BLOCK_RF], bRFRegOffsetMask, WriteData[i]);
+			// TODO: we should not delay for such a long time. Ask SD3
+			rtw_mdelay_os(10);
+			ulRegRead = PHY_QueryRFReg(Adapter, eRFPath, WriteAddr[HW90_BLOCK_RF], bMaskDWord);				
+			rtw_mdelay_os(10);
+			//cosa PlatformReleaseSpinLock(Adapter, RT_INITIAL_SPINLOCK);
+			break;
+			
+		default:
+			rtStatus = _FAIL;
+			break;
+		}
+
+
+		//
+		// Check whether readback data is correct
+		//
+		if(ulRegRead != WriteData[i])
+		{
+			//RT_TRACE(COMP_FPGA, DBG_LOUD, ("ulRegRead: %lx, WriteData: %lx \n", ulRegRead, WriteData[i]));
+			rtStatus = _FAIL;			
+			break;
+		}
+	}
+
+	return rtStatus;
+}
+
+
+VOID
+rtl8192c_PHY_GetHWRegOriginalValue(
+	IN	PADAPTER		Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	
+	// read rx initial gain
+	pHalData->DefaultInitialGain[0] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XAAGCCore1, bMaskByte0);
+	pHalData->DefaultInitialGain[1] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XBAGCCore1, bMaskByte0);
+	pHalData->DefaultInitialGain[2] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XCAGCCore1, bMaskByte0);
+	pHalData->DefaultInitialGain[3] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XDAGCCore1, bMaskByte0);
+	//RT_TRACE(COMP_INIT, DBG_LOUD,
+	//("Default initial gain (c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x) \n", 
+	//pHalData->DefaultInitialGain[0], pHalData->DefaultInitialGain[1], 
+	//pHalData->DefaultInitialGain[2], pHalData->DefaultInitialGain[3]));
+
+	// read framesync
+	pHalData->framesync = (u8)PHY_QueryBBReg(Adapter, rOFDM0_RxDetector3, bMaskByte0);	 
+	pHalData->framesyncC34 = PHY_QueryBBReg(Adapter, rOFDM0_RxDetector2, bMaskDWord);
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Default framesync (0x%x) = 0x%x \n", 
+	//	rOFDM0_RxDetector3, pHalData->framesync));
+}
+
+
+//
+//	Description:
+//		Map dBm into Tx power index according to 
+//		current HW model, for example, RF and PA, and
+//		current wireless mode.
+//	By Bruce, 2008-01-29.
+//
+static	u8
+phy_DbmToTxPwrIdx(
+	IN	PADAPTER		Adapter,
+	IN	WIRELESS_MODE	WirelessMode,
+	IN	int			PowerInDbm
+	)
+{
+	u8				TxPwrIdx = 0;
+	int				Offset = 0;
+	
+
+	//
+	// Tested by MP, we found that CCK Index 0 equals to 8dbm, OFDM legacy equals to 
+	// 3dbm, and OFDM HT equals to 0dbm repectively.
+	// Note:
+	//	The mapping may be different by different NICs. Do not use this formula for what needs accurate result.  
+	// By Bruce, 2008-01-29.
+	// 
+	switch(WirelessMode)
+	{
+	case WIRELESS_MODE_B:
+		Offset = -7;
+		break;
+
+	case WIRELESS_MODE_G:
+	case WIRELESS_MODE_N_24G:
+		Offset = -8;
+		break;
+	default:
+		Offset = -8;
+		break;
+	}
+
+	if((PowerInDbm - Offset) > 0)
+	{
+		TxPwrIdx = (u8)((PowerInDbm - Offset) * 2);
+	}
+	else
+	{
+		TxPwrIdx = 0;
+	}
+
+	// Tx Power Index is too large.
+	if(TxPwrIdx > MAX_TXPWR_IDX_NMODE_92S)
+		TxPwrIdx = MAX_TXPWR_IDX_NMODE_92S;
+
+	return TxPwrIdx;
+}
+
+//
+//	Description:
+//		Map Tx power index into dBm according to 
+//		current HW model, for example, RF and PA, and
+//		current wireless mode.
+//	By Bruce, 2008-01-29.
+//
+int
+phy_TxPwrIdxToDbm(
+	IN	PADAPTER		Adapter,
+	IN	WIRELESS_MODE	WirelessMode,
+	IN	u8			TxPwrIdx
+	)
+{
+	int				Offset = 0;
+	int				PwrOutDbm = 0;
+	
+	//
+	// Tested by MP, we found that CCK Index 0 equals to -7dbm, OFDM legacy equals to -8dbm.
+	// Note:
+	//	The mapping may be different by different NICs. Do not use this formula for what needs accurate result.  
+	// By Bruce, 2008-01-29.
+	// 
+	switch(WirelessMode)
+	{
+	case WIRELESS_MODE_B:
+		Offset = -7;
+		break;
+
+	case WIRELESS_MODE_G:
+	case WIRELESS_MODE_N_24G:
+		Offset = -8;
+	default:
+		Offset = -8;	
+		break;
+	}
+
+	PwrOutDbm = TxPwrIdx / 2 + Offset; // Discard the decimal part.
+
+	return PwrOutDbm;
+}
+
+
+/*-----------------------------------------------------------------------------
+ * Function:    GetTxPowerLevel8190()
+ *
+ * Overview:    This function is export to "common" moudule
+ *
+ * Input:       PADAPTER		Adapter
+ *			psByte			Power Level
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ *---------------------------------------------------------------------------*/
+VOID
+PHY_GetTxPowerLevel8192C(
+	IN	PADAPTER		Adapter,
+	OUT u32*    		powerlevel
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8			TxPwrLevel = 0;
+	int			TxPwrDbm;
+	
+	//
+	// Because the Tx power indexes are different, we report the maximum of them to 
+	// meet the CCX TPC request. By Bruce, 2008-01-31.
+	//
+
+	// CCK
+	TxPwrLevel = pHalData->CurrentCckTxPwrIdx;
+	TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_B, TxPwrLevel);
+
+	// Legacy OFDM
+	TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx + pHalData->LegacyHTTxPowerDiff;
+
+	// Compare with Legacy OFDM Tx power.
+	if(phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel) > TxPwrDbm)
+		TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel);
+
+	// HT OFDM
+	TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx;
+	
+	// Compare with HT OFDM Tx power.
+	if(phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel) > TxPwrDbm)
+		TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel);
+
+	*powerlevel = TxPwrDbm;
+}
+
+
+static void getTxPowerIndex(
+	IN	PADAPTER		Adapter,
+	IN	u8			channel,
+	IN OUT u8*		cckPowerLevel,
+	IN OUT u8*		ofdmPowerLevel
+	)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	u8				index = (channel -1);
+	// 1. CCK
+	cckPowerLevel[RF90_PATH_A] = pHalData->TxPwrLevelCck[RF90_PATH_A][index];	//RF-A
+	cckPowerLevel[RF90_PATH_B] = pHalData->TxPwrLevelCck[RF90_PATH_B][index];	//RF-B
+
+	// 2. OFDM for 1S or 2S
+	if (GET_RF_TYPE(Adapter) == RF_1T2R || GET_RF_TYPE(Adapter) == RF_1T1R)
+	{
+		// Read HT 40 OFDM TX power
+		ofdmPowerLevel[RF90_PATH_A] = pHalData->TxPwrLevelHT40_1S[RF90_PATH_A][index];
+		ofdmPowerLevel[RF90_PATH_B] = pHalData->TxPwrLevelHT40_1S[RF90_PATH_B][index];
+	}
+	else if (GET_RF_TYPE(Adapter) == RF_2T2R)
+	{
+		// Read HT 40 OFDM TX power
+		ofdmPowerLevel[RF90_PATH_A] = pHalData->TxPwrLevelHT40_2S[RF90_PATH_A][index];
+		ofdmPowerLevel[RF90_PATH_B] = pHalData->TxPwrLevelHT40_2S[RF90_PATH_B][index];
+	}
+	//RTPRINT(FPHY, PHY_TXPWR, ("Channel-%d, set tx power index !!\n", channel));
+}
+
+static void ccxPowerIndexCheck(
+	IN	PADAPTER		Adapter,
+	IN	u8			channel,
+	IN OUT u8*		cckPowerLevel,
+	IN OUT u8*		ofdmPowerLevel
+	)
+{
+#if 0
+	PMGNT_INFO			pMgntInfo = &(Adapter->MgntInfo);
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	PRT_CCX_INFO		pCcxInfo = GET_CCX_INFO(pMgntInfo);
+
+	//
+	// CCX 2 S31, AP control of client transmit power:
+	// 1. We shall not exceed Cell Power Limit as possible as we can.
+	// 2. Tolerance is +/- 5dB.
+	// 3. 802.11h Power Contraint takes higher precedence over CCX Cell Power Limit.
+	// 
+	// TODO: 
+	// 1. 802.11h power contraint 
+	//
+	// 071011, by rcnjko.
+	//
+	if(	pMgntInfo->OpMode == RT_OP_MODE_INFRASTRUCTURE && 
+		pMgntInfo->mAssoc &&
+		pCcxInfo->bUpdateCcxPwr &&
+		pCcxInfo->bWithCcxCellPwr &&
+		channel == pMgntInfo->dot11CurrentChannelNumber)
+	{
+		u1Byte	CckCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_B, pCcxInfo->CcxCellPwr);
+		u1Byte	LegacyOfdmCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_G, pCcxInfo->CcxCellPwr);
+		u1Byte	OfdmCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_N_24G, pCcxInfo->CcxCellPwr);
+
+		RT_TRACE(COMP_TXAGC, DBG_LOUD, 
+		("CCX Cell Limit: %d dbm => CCK Tx power index : %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n", 
+		pCcxInfo->CcxCellPwr, CckCellPwrIdx, LegacyOfdmCellPwrIdx, OfdmCellPwrIdx));
+		RT_TRACE(COMP_TXAGC, DBG_LOUD, 
+		("EEPROM channel(%d) => CCK Tx power index: %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n",
+		channel, cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0])); 
+
+		// CCK
+		if(cckPowerLevel[0] > CckCellPwrIdx)
+			cckPowerLevel[0] = CckCellPwrIdx;
+		// Legacy OFDM, HT OFDM
+		if(ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff > LegacyOfdmCellPwrIdx)
+		{
+			if((OfdmCellPwrIdx - pHalData->LegacyHTTxPowerDiff) > 0)
+			{
+				ofdmPowerLevel[0] = OfdmCellPwrIdx - pHalData->LegacyHTTxPowerDiff;
+			}
+			else
+			{
+				ofdmPowerLevel[0] = 0;
+			}
+		}
+
+		RT_TRACE(COMP_TXAGC, DBG_LOUD, 
+		("Altered CCK Tx power index : %d, Legacy OFDM Tx power index: %d, OFDM Tx power index: %d\n", 
+		cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0]));
+	}
+
+	pHalData->CurrentCckTxPwrIdx = cckPowerLevel[0];
+	pHalData->CurrentOfdm24GTxPwrIdx = ofdmPowerLevel[0];
+
+	RT_TRACE(COMP_TXAGC, DBG_LOUD, 
+		("PHY_SetTxPowerLevel8192S(): CCK Tx power index : %d, Legacy OFDM Tx power index: %d, OFDM Tx power index: %d\n", 
+		cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0]));
+#endif	
+}
+/*-----------------------------------------------------------------------------
+ * Function:    SetTxPowerLevel8190()
+ *
+ * Overview:    This function is export to "HalCommon" moudule
+ *			We must consider RF path later!!!!!!!
+ *
+ * Input:       PADAPTER		Adapter
+ *			u1Byte		channel
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *	2008/11/04	MHC		We remove EEPROM_93C56.
+ *						We need to move CCX relative code to independet file.
+ *	2009/01/21	MHC		Support new EEPROM format from SD3 requirement.
+ *
+ *---------------------------------------------------------------------------*/
+VOID
+PHY_SetTxPowerLevel8192C(
+	IN	PADAPTER		Adapter,
+	IN	u8			channel
+	)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	u8	cckPowerLevel[2], ofdmPowerLevel[2];	// [0]:RF-A, [1]:RF-B
+
+#if(MP_DRIVER == 1)
+	return;
+#endif
+
+	if(pHalData->bTXPowerDataReadFromEEPORM == _FALSE)
+		return;
+
+	getTxPowerIndex(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0]);
+	//RTPRINT(FPHY, PHY_TXPWR, ("Channel-%d, cckPowerLevel (A / B) = 0x%x / 0x%x,   ofdmPowerLevel (A / B) = 0x%x / 0x%x\n", 
+	//	channel, cckPowerLevel[0], cckPowerLevel[1], ofdmPowerLevel[0], ofdmPowerLevel[1]));
+
+	ccxPowerIndexCheck(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0]);
+
+	rtl8192c_PHY_RF6052SetCckTxPower(Adapter, &cckPowerLevel[0]);
+	rtl8192c_PHY_RF6052SetOFDMTxPower(Adapter, &ofdmPowerLevel[0], channel);
+
+#if 0
+	switch(pHalData->rf_chip)
+	{
+		case RF_8225:
+			PHY_SetRF8225CckTxPower(Adapter, cckPowerLevel[0]);
+			PHY_SetRF8225OfdmTxPower(Adapter, ofdmPowerLevel[0]);
+		break;
+
+		case RF_8256:
+			PHY_SetRF8256CCKTxPower(Adapter, cckPowerLevel[0]);
+			PHY_SetRF8256OFDMTxPower(Adapter, ofdmPowerLevel[0]);
+			break;
+
+		case RF_6052:
+			PHY_RF6052SetCckTxPower(Adapter, &cckPowerLevel[0]);
+			PHY_RF6052SetOFDMTxPower(Adapter, &ofdmPowerLevel[0], channel);
+			break;
+
+		case RF_8258:
+			break;
+	}
+#endif
+
+}
+
+
+//
+//	Description:
+//		Update transmit power level of all channel supported.
+//
+//	TODO: 
+//		A mode.
+//	By Bruce, 2008-02-04.
+//
+BOOLEAN
+PHY_UpdateTxPowerDbm8192C(
+	IN	PADAPTER	Adapter,
+	IN	int		powerInDbm
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8				idx;
+	u8			rf_path;
+
+	// TODO: A mode Tx power.
+	u8	CckTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_B, powerInDbm);
+	u8	OfdmTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_N_24G, powerInDbm);
+
+	if(OfdmTxPwrIdx - pHalData->LegacyHTTxPowerDiff > 0)
+		OfdmTxPwrIdx -= pHalData->LegacyHTTxPowerDiff;
+	else
+		OfdmTxPwrIdx = 0;
+
+	//RT_TRACE(COMP_TXAGC, DBG_LOUD, ("PHY_UpdateTxPowerDbm8192S(): %ld dBm , CckTxPwrIdx = %d, OfdmTxPwrIdx = %d\n", powerInDbm, CckTxPwrIdx, OfdmTxPwrIdx));
+
+	for(idx = 0; idx < 14; idx++)
+	{
+		for (rf_path = 0; rf_path < 2; rf_path++)
+		{
+			pHalData->TxPwrLevelCck[rf_path][idx] = CckTxPwrIdx;
+			pHalData->TxPwrLevelHT40_1S[rf_path][idx] = 
+			pHalData->TxPwrLevelHT40_2S[rf_path][idx] = OfdmTxPwrIdx;
+		}
+	}
+
+	//Adapter->HalFunc.SetTxPowerLevelHandler(Adapter, pHalData->CurrentChannel);//gtest:todo
+
+	return _TRUE;	
+}
+
+
+/*
+	Description:
+		When beacon interval is changed, the values of the 
+		hw registers should be modified.
+	By tynli, 2008.10.24.
+
+*/
+
+
+void	
+rtl8192c_PHY_SetBeaconHwReg(	
+	IN	PADAPTER		Adapter,
+	IN	u16			BeaconInterval	
+	)
+{
+
+}
+
+
+VOID 
+PHY_ScanOperationBackup8192C(
+	IN	PADAPTER	Adapter,
+	IN	u8		Operation
+	)
+{
+#if 0
+	IO_TYPE	IoType;
+	
+	if(!Adapter->bDriverStopped)
+	{
+		switch(Operation)
+		{
+			case SCAN_OPT_BACKUP:
+				IoType = IO_CMD_PAUSE_DM_BY_SCAN;
+				Adapter->HalFunc.SetHwRegHandler(Adapter,HW_VAR_IO_CMD,  (pu1Byte)&IoType);
+
+				break;
+
+			case SCAN_OPT_RESTORE:
+				IoType = IO_CMD_RESUME_DM_BY_SCAN;
+				Adapter->HalFunc.SetHwRegHandler(Adapter,HW_VAR_IO_CMD,  (pu1Byte)&IoType);
+				break;
+
+			default:
+				RT_TRACE(COMP_SCAN, DBG_LOUD, ("Unknown Scan Backup Operation. \n"));
+				break;
+		}
+	}
+#endif	
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:    PHY_SetBWModeCallback8192C()
+ *
+ * Overview:    Timer callback function for SetSetBWMode
+ *
+ * Input:       	PRT_TIMER		pTimer
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Note:		(1) We do not take j mode into consideration now
+ *			(2) Will two workitem of "switch channel" and "switch channel bandwidth" run
+ *			     concurrently?
+ *---------------------------------------------------------------------------*/
+static VOID
+_PHY_SetBWMode92C(
+	IN	PADAPTER	Adapter
+)
+{
+//	PADAPTER			Adapter = (PADAPTER)pTimer->Adapter;
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	u8				regBwOpMode;
+	u8				regRRSR_RSC;
+
+	//return;
+
+	// Added it for 20/40 mhz switch time evaluation by guangan 070531
+	//u4Byte				NowL, NowH;
+	//u8Byte				BeginTime, EndTime; 
+
+	/*RT_TRACE(COMP_SCAN, DBG_LOUD, ("==>PHY_SetBWModeCallback8192C()  Switch to %s bandwidth\n", \
+					pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz"))*/
+
+	if(pHalData->rf_chip == RF_PSEUDO_11N)
+	{
+		//pHalData->SetBWModeInProgress= _FALSE;
+		return;
+	}
+
+	// There is no 40MHz mode in RF_8225.
+	if(pHalData->rf_chip==RF_8225)
+		return;
+
+	if(Adapter->bDriverStopped)
+		return;
+
+	// Added it for 20/40 mhz switch time evaluation by guangan 070531
+	//NowL = PlatformEFIORead4Byte(Adapter, TSFR);
+	//NowH = PlatformEFIORead4Byte(Adapter, TSFR+4);
+	//BeginTime = ((u8Byte)NowH << 32) + NowL;
+		
+	//3//
+	//3//<1>Set MAC register
+	//3//
+	//Adapter->HalFunc.SetBWModeHandler();
+	
+	regBwOpMode = rtw_read8(Adapter, REG_BWOPMODE);
+	regRRSR_RSC = rtw_read8(Adapter, REG_RRSR+2);
+	//regBwOpMode = Adapter->HalFunc.GetHwRegHandler(Adapter,HW_VAR_BWMODE,(pu1Byte)&regBwOpMode);
+	
+	switch(pHalData->CurrentChannelBW)
+	{
+		case HT_CHANNEL_WIDTH_20:
+			regBwOpMode |= BW_OPMODE_20MHZ;
+			   // 2007/02/07 Mark by Emily becasue we have not verify whether this register works
+			rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode);
+			break;
+			   
+		case HT_CHANNEL_WIDTH_40:
+			regBwOpMode &= ~BW_OPMODE_20MHZ;
+				// 2007/02/07 Mark by Emily becasue we have not verify whether this register works
+			rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode);
+
+			regRRSR_RSC = (regRRSR_RSC&0x90) |(pHalData->nCur40MhzPrimeSC<<5);
+			rtw_write8(Adapter, REG_RRSR+2, regRRSR_RSC);
+			break;
+
+		default:
+			/*RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetBWModeCallback8192C():
+						unknown Bandwidth: %#X\n",pHalData->CurrentChannelBW));*/
+			break;
+	}
+	
+	//3//
+	//3//<2>Set PHY related register
+	//3//
+	switch(pHalData->CurrentChannelBW)
+	{
+		/* 20 MHz channel*/
+		case HT_CHANNEL_WIDTH_20:
+			PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0);
+			PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0);
+			PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 1);
+			
+			break;
+
+
+		/* 40 MHz channel*/
+		case HT_CHANNEL_WIDTH_40:
+			PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1);
+			PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x1);
+			
+			// Set Control channel to upper or lower. These settings are required only for 40MHz
+			PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC>>1));
+			PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC);
+			PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 0);
+
+			PHY_SetBBReg(Adapter, 0x818, (BIT26|BIT27), (pHalData->nCur40MhzPrimeSC==HAL_PRIME_CHNL_OFFSET_LOWER)?2:1);
+			
+			break;
+
+
+			
+		default:
+			/*RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetBWModeCallback8192C(): unknown Bandwidth: %#X\n"\
+						,pHalData->CurrentChannelBW));*/
+			break;
+			
+	}
+	//Skip over setting of J-mode in BB register here. Default value is "None J mode". Emily 20070315
+
+	// Added it for 20/40 mhz switch time evaluation by guangan 070531
+	//NowL = PlatformEFIORead4Byte(Adapter, TSFR);
+	//NowH = PlatformEFIORead4Byte(Adapter, TSFR+4);
+	//EndTime = ((u8Byte)NowH << 32) + NowL;
+	//RT_TRACE(COMP_SCAN, DBG_LOUD, ("SetBWModeCallback8190Pci: time of SetBWMode = %I64d us!\n", (EndTime - BeginTime)));
+
+	//3<3>Set RF related register
+	switch(pHalData->rf_chip)
+	{
+		case RF_8225:		
+			//PHY_SetRF8225Bandwidth(Adapter, pHalData->CurrentChannelBW);
+			break;	
+			
+		case RF_8256:
+			// Please implement this function in Hal8190PciPhy8256.c
+			//PHY_SetRF8256Bandwidth(Adapter, pHalData->CurrentChannelBW);
+			break;
+			
+		case RF_8258:
+			// Please implement this function in Hal8190PciPhy8258.c
+			// PHY_SetRF8258Bandwidth();
+			break;
+
+		case RF_PSEUDO_11N:
+			// Do Nothing
+			break;
+			
+		case RF_6052:
+			rtl8192c_PHY_RF6052SetBandwidth(Adapter, pHalData->CurrentChannelBW);
+			break;	
+			
+		default:
+			//RT_ASSERT(FALSE, ("Unknown RFChipID: %d\n", pHalData->RFChipID));
+			break;
+	}
+
+	//pHalData->SetBWModeInProgress= FALSE;
+
+	//RT_TRACE(COMP_SCAN, DBG_LOUD, ("<==PHY_SetBWModeCallback8192C() \n" ));
+}
+
+
+ /*-----------------------------------------------------------------------------
+ * Function:   SetBWMode8190Pci()
+ *
+ * Overview:  This function is export to "HalCommon" moudule
+ *
+ * Input:       	PADAPTER			Adapter
+ *			HT_CHANNEL_WIDTH	Bandwidth	//20M or 40M
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Note:		We do not take j mode into consideration now
+ *---------------------------------------------------------------------------*/
+VOID
+PHY_SetBWMode8192C(
+	IN	PADAPTER					Adapter,
+	IN	HT_CHANNEL_WIDTH	Bandwidth,	// 20M or 40M
+	IN	unsigned char	Offset		// Upper, Lower, or Don't care
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	HT_CHANNEL_WIDTH 	tmpBW= pHalData->CurrentChannelBW;
+	// Modified it for 20/40 mhz switch by guangan 070531
+	//PMGNT_INFO	pMgntInfo=&Adapter->MgntInfo;
+
+	//return;
+	
+	//if(pHalData->SwChnlInProgress)
+//	if(pMgntInfo->bScanInProgress)
+//	{
+//		RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() %s Exit because bScanInProgress!\n", 
+//					Bandwidth == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz"));
+//		return;
+//	}
+
+//	if(pHalData->SetBWModeInProgress)
+//	{
+//		// Modified it for 20/40 mhz switch by guangan 070531
+//		RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() %s cancel last timer because SetBWModeInProgress!\n", 
+//					Bandwidth == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz"));
+//		PlatformCancelTimer(Adapter, &pHalData->SetBWModeTimer);
+//		//return;
+//	}
+
+	//if(pHalData->SetBWModeInProgress)
+	//	return;
+
+	//pHalData->SetBWModeInProgress= TRUE;
+	
+	pHalData->CurrentChannelBW = Bandwidth;
+
+#if 0
+	if(Offset==HT_EXTCHNL_OFFSET_LOWER)
+		pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER;
+	else if(Offset==HT_EXTCHNL_OFFSET_UPPER)
+		pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER;
+	else
+		pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+#else
+	pHalData->nCur40MhzPrimeSC = Offset;
+#endif
+
+	if((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved))
+	{
+#ifdef USE_WORKITEM	
+		//PlatformScheduleWorkItem(&(pHalData->SetBWModeWorkItem));
+#else
+	#if 0
+		//PlatformSetTimer(Adapter, &(pHalData->SetBWModeTimer), 0);
+	#else
+		_PHY_SetBWMode92C(Adapter);
+	#endif
+#endif		
+	}
+	else
+	{
+		//RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() SetBWModeInProgress FALSE driver sleep or unload\n"));	
+		//pHalData->SetBWModeInProgress= FALSE;	
+		pHalData->CurrentChannelBW = tmpBW;
+	}
+	
+}
+
+
+static void _PHY_SwChnl8192C(PADAPTER Adapter, u8 channel)
+{
+	u8 eRFPath;
+	u32 param1, param2;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	//s1. pre common command - CmdID_SetTxPowerLevel
+	PHY_SetTxPowerLevel8192C(Adapter, channel);
+
+	//s2. RF dependent command - CmdID_RF_WriteReg, param1=RF_CHNLBW, param2=channel
+	param1 = RF_CHNLBW;
+	param2 = channel;
+	for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
+	{
+		pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | param2);
+		PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]);
+	}
+	
+	
+	//s3. post common command - CmdID_End, None
+
+}
+
+VOID
+PHY_SwChnl8192C(	// Call after initialization
+	IN	PADAPTER	Adapter,
+	IN	u8		channel
+	)
+{
+	//PADAPTER Adapter =  ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, _TRUE);
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8	tmpchannel = pHalData->CurrentChannel;
+	BOOLEAN  bResult = _TRUE;
+
+	if(pHalData->rf_chip == RF_PSEUDO_11N)
+	{
+		//pHalData->SwChnlInProgress=FALSE;
+		return; 								//return immediately if it is peudo-phy	
+	}
+	
+	//if(pHalData->SwChnlInProgress)
+	//	return;
+
+	//if(pHalData->SetBWModeInProgress)
+	//	return;
+
+	//--------------------------------------------
+	switch(pHalData->CurrentWirelessMode)
+	{
+		case WIRELESS_MODE_A:
+		case WIRELESS_MODE_N_5G:
+			//RT_ASSERT((channel>14), ("WIRELESS_MODE_A but channel<=14"));		
+			break;
+		
+		case WIRELESS_MODE_B:
+			//RT_ASSERT((channel<=14), ("WIRELESS_MODE_B but channel>14"));
+			break;
+		
+		case WIRELESS_MODE_G:
+		case WIRELESS_MODE_N_24G:
+			//RT_ASSERT((channel<=14), ("WIRELESS_MODE_G but channel>14"));
+			break;
+
+		default:
+			//RT_ASSERT(FALSE, ("Invalid WirelessMode(%#x)!!\n", pHalData->CurrentWirelessMode));
+			break;
+	}
+	//--------------------------------------------
+	
+	//pHalData->SwChnlInProgress = TRUE;
+	if(channel == 0)
+		channel = 1;
+	
+	pHalData->CurrentChannel=channel;
+
+	//pHalData->SwChnlStage=0;
+	//pHalData->SwChnlStep=0;
+
+	if((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved))
+	{
+#ifdef USE_WORKITEM	
+		//bResult = PlatformScheduleWorkItem(&(pHalData->SwChnlWorkItem));
+#else
+		#if 0		
+		//PlatformSetTimer(Adapter, &(pHalData->SwChnlTimer), 0);
+		#else
+		_PHY_SwChnl8192C(Adapter, channel);
+		#endif
+#endif
+		if(bResult)
+		{
+			//RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress TRUE schdule workitem done\n"));
+		}
+		else
+		{
+			//RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress FALSE schdule workitem error\n"));		
+			//if(IS_HARDWARE_TYPE_8192SU(Adapter))
+			//{
+			//	pHalData->SwChnlInProgress = FALSE; 	
+				pHalData->CurrentChannel = tmpchannel;			
+			//}
+		}
+
+	}
+	else
+	{
+		//RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress FALSE driver sleep or unload\n"));	
+		//if(IS_HARDWARE_TYPE_8192SU(Adapter))
+		//{
+		//	pHalData->SwChnlInProgress = FALSE;		
+			pHalData->CurrentChannel = tmpchannel;
+		//}
+	}
+}
+
+
+static	BOOLEAN
+phy_SwChnlStepByStep(
+	IN	PADAPTER	Adapter,
+	IN	u8		channel,
+	IN	u8		*stage,
+	IN	u8		*step,
+	OUT u32		*delay
+	)
+{
+#if 0
+	HAL_DATA_TYPE			*pHalData = GET_HAL_DATA(Adapter);
+	PCHANNEL_ACCESS_SETTING	pChnlAccessSetting;
+	SwChnlCmd				PreCommonCmd[MAX_PRECMD_CNT];
+	u4Byte					PreCommonCmdCnt;
+	SwChnlCmd				PostCommonCmd[MAX_POSTCMD_CNT];
+	u4Byte					PostCommonCmdCnt;
+	SwChnlCmd				RfDependCmd[MAX_RFDEPENDCMD_CNT];
+	u4Byte					RfDependCmdCnt;
+	SwChnlCmd				*CurrentCmd;	
+	u1Byte					eRFPath;	
+	u4Byte					RfTXPowerCtrl;
+	BOOLEAN					bAdjRfTXPowerCtrl = _FALSE;
+	
+	
+	RT_ASSERT((Adapter != NULL), ("Adapter should not be NULL\n"));
+#if(MP_DRIVER != 1)
+	RT_ASSERT(IsLegalChannel(Adapter, channel), ("illegal channel: %d\n", channel));
+#endif
+	RT_ASSERT((pHalData != NULL), ("pHalData should not be NULL\n"));
+	
+	pChnlAccessSetting = &Adapter->MgntInfo.Info8185.ChannelAccessSetting;
+	RT_ASSERT((pChnlAccessSetting != NULL), ("pChnlAccessSetting should not be NULL\n"));
+	
+	//for(eRFPath = RF90_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
+	//for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
+	//{
+		// <1> Fill up pre common command.
+	PreCommonCmdCnt = 0;
+	phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++, MAX_PRECMD_CNT, 
+				CmdID_SetTxPowerLevel, 0, 0, 0);
+	phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++, MAX_PRECMD_CNT, 
+				CmdID_End, 0, 0, 0);
+	
+		// <2> Fill up post common command.
+	PostCommonCmdCnt = 0;
+
+	phy_SetSwChnlCmdArray(PostCommonCmd, PostCommonCmdCnt++, MAX_POSTCMD_CNT, 
+				CmdID_End, 0, 0, 0);
+	
+		// <3> Fill up RF dependent command.
+	RfDependCmdCnt = 0;
+	switch( pHalData->RFChipID )
+	{
+		case RF_8225:		
+		RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel));
+		// 2008/09/04 MH Change channel. 
+		if(channel==14) channel++;
+		phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, 
+			CmdID_RF_WriteReg, rZebra1_Channel, (0x10+channel-1), 10);
+		phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, 
+		CmdID_End, 0, 0, 0);
+		break;	
+		
+	case RF_8256:
+		// TEST!! This is not the table for 8256!!
+		RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel));
+		phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, 
+			CmdID_RF_WriteReg, rRfChannel, channel, 10);
+		phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, 
+		CmdID_End, 0, 0, 0);
+		break;
+		
+	case RF_6052:
+		RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel));
+		phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, 
+			CmdID_RF_WriteReg, RF_CHNLBW, channel, 10);		
+		phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, 
+		CmdID_End, 0, 0, 0);		
+		
+		break;
+
+	case RF_8258:
+		break;
+
+	// For FPGA two MAC verification
+	case RF_PSEUDO_11N:
+		return TRUE;
+	default:
+		RT_ASSERT(FALSE, ("Unknown RFChipID: %d\n", pHalData->RFChipID));
+		return FALSE;
+		break;
+	}
+
+	
+	do{
+		switch(*stage)
+		{
+		case 0:
+			CurrentCmd=&PreCommonCmd[*step];
+			break;
+		case 1:
+			CurrentCmd=&RfDependCmd[*step];
+			break;
+		case 2:
+			CurrentCmd=&PostCommonCmd[*step];
+			break;
+		}
+		
+		if(CurrentCmd->CmdID==CmdID_End)
+		{
+			if((*stage)==2)
+			{
+				return TRUE;
+			}
+			else
+			{
+				(*stage)++;
+				(*step)=0;
+				continue;
+			}
+		}
+		
+		switch(CurrentCmd->CmdID)
+		{
+		case CmdID_SetTxPowerLevel:
+			PHY_SetTxPowerLevel8192C(Adapter,channel);
+			break;
+		case CmdID_WritePortUlong:
+			PlatformEFIOWrite4Byte(Adapter, CurrentCmd->Para1, CurrentCmd->Para2);
+			break;
+		case CmdID_WritePortUshort:
+			PlatformEFIOWrite2Byte(Adapter, CurrentCmd->Para1, (u2Byte)CurrentCmd->Para2);
+			break;
+		case CmdID_WritePortUchar:
+			PlatformEFIOWrite1Byte(Adapter, CurrentCmd->Para1, (u1Byte)CurrentCmd->Para2);
+			break;
+		case CmdID_RF_WriteReg:	// Only modify channel for the register now !!!!!
+			for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
+			{
+#if 1
+				pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | CurrentCmd->Para2);
+				PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]);
+#else
+				PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bRFRegOffsetMask, (CurrentCmd->Para2));
+#endif
+			}
+			break;
+		}
+		
+		break;
+	}while(TRUE);
+	//cosa }/*for(Number of RF paths)*/
+
+	(*delay)=CurrentCmd->msDelay;
+	(*step)++;
+	return FALSE;
+#endif	
+	return _TRUE;
+}
+
+
+static	BOOLEAN
+phy_SetSwChnlCmdArray(
+	SwChnlCmd*		CmdTable,
+	u32			CmdTableIdx,
+	u32			CmdTableSz,
+	SwChnlCmdID		CmdID,
+	u32			Para1,
+	u32			Para2,
+	u32			msDelay
+	)
+{
+	SwChnlCmd* pCmd;
+
+	if(CmdTable == NULL)
+	{
+		//RT_ASSERT(FALSE, ("phy_SetSwChnlCmdArray(): CmdTable cannot be NULL.\n"));
+		return _FALSE;
+	}
+	if(CmdTableIdx >= CmdTableSz)
+	{
+		//RT_ASSERT(FALSE, 
+		//		("phy_SetSwChnlCmdArray(): Access invalid index, please check size of the table, CmdTableIdx:%ld, CmdTableSz:%ld\n",
+		//		CmdTableIdx, CmdTableSz));
+		return _FALSE;
+	}
+
+	pCmd = CmdTable + CmdTableIdx;
+	pCmd->CmdID = CmdID;
+	pCmd->Para1 = Para1;
+	pCmd->Para2 = Para2;
+	pCmd->msDelay = msDelay;
+
+	return _TRUE;
+}
+
+
+static	void
+phy_FinishSwChnlNow(	// We should not call this function directly
+		IN	PADAPTER	Adapter,
+		IN	u8		channel
+		)
+{
+#if 0
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u32			delay;
+  
+	while(!phy_SwChnlStepByStep(Adapter,channel,&pHalData->SwChnlStage,&pHalData->SwChnlStep,&delay))
+	{
+		if(delay>0)
+			rtw_mdelay_os(delay);
+	}
+#endif	
+}
+
+
+
+//
+// Description:
+//	Switch channel synchronously. Called by SwChnlByDelayHandler.
+//
+// Implemented by Bruce, 2008-02-14.
+// The following procedure is operted according to SwChanlCallback8190Pci().
+// However, this procedure is performed synchronously  which should be running under
+// passive level.
+// 
+VOID
+PHY_SwChnlPhy8192C(	// Only called during initialize
+	IN	PADAPTER	Adapter,
+	IN	u8		channel
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	//RT_TRACE(COMP_SCAN | COMP_RM, DBG_LOUD, ("==>PHY_SwChnlPhy8192S(), switch from channel %d to channel %d.\n", pHalData->CurrentChannel, channel));
+
+	// Cannot IO.
+	//if(RT_CANNOT_IO(Adapter))
+	//	return;
+
+	// Channel Switching is in progress.
+	//if(pHalData->SwChnlInProgress)
+	//	return;
+	
+	//return immediately if it is peudo-phy
+	if(pHalData->rf_chip == RF_PSEUDO_11N)
+	{
+		//pHalData->SwChnlInProgress=FALSE;
+		return;
+	}
+	
+	//pHalData->SwChnlInProgress = TRUE;
+	if( channel == 0)
+		channel = 1;
+	
+	pHalData->CurrentChannel=channel;
+	
+	//pHalData->SwChnlStage = 0;
+	//pHalData->SwChnlStep = 0;
+	
+	phy_FinishSwChnlNow(Adapter,channel);
+	
+	//pHalData->SwChnlInProgress = FALSE;
+}
+
+
+//
+//	Description:
+//		Configure H/W functionality to enable/disable Monitor mode.
+//		Note, because we possibly need to configure BB and RF in this function, 
+//		so caller should in PASSIVE_LEVEL. 080118, by rcnjko.
+//
+VOID
+PHY_SetMonitorMode8192C(
+	IN	PADAPTER			pAdapter,
+	IN	BOOLEAN				bEnableMonitorMode
+	)
+{
+#if 0
+	HAL_DATA_TYPE		*pHalData	= GET_HAL_DATA(pAdapter);
+	BOOLEAN				bFilterOutNonAssociatedBSSID = FALSE;
+
+	//2 Note: we may need to stop antenna diversity.
+	if(bEnableMonitorMode)
+	{
+		bFilterOutNonAssociatedBSSID = FALSE;
+		RT_TRACE(COMP_RM, DBG_LOUD, ("PHY_SetMonitorMode8192S(): enable monitor mode\n"));
+
+		pHalData->bInMonitorMode = TRUE;
+		pAdapter->HalFunc.AllowAllDestAddrHandler(pAdapter, TRUE, TRUE);
+		pAdapter->HalFunc.SetHwRegHandler(pAdapter, HW_VAR_CHECK_BSSID, (pu1Byte)&bFilterOutNonAssociatedBSSID);
+	}
+	else
+	{
+		bFilterOutNonAssociatedBSSID = TRUE;
+		RT_TRACE(COMP_RM, DBG_LOUD, ("PHY_SetMonitorMode8192S(): disable monitor mode\n"));
+
+		pAdapter->HalFunc.AllowAllDestAddrHandler(pAdapter, FALSE, TRUE);
+		pHalData->bInMonitorMode = FALSE;
+		pAdapter->HalFunc.SetHwRegHandler(pAdapter, HW_VAR_CHECK_BSSID, (pu1Byte)&bFilterOutNonAssociatedBSSID);
+	}
+#endif	
+}
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	PHYCheckIsLegalRfPath8190Pci()
+ *
+ * Overview:	Check different RF type to execute legal judgement. If RF Path is illegal
+ *			We will return false.
+ *
+ * Input:		NONE
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	11/15/2007	MHC		Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+BOOLEAN	
+PHY_CheckIsLegalRfPath8192C(	
+	IN	PADAPTER	pAdapter,
+	IN	u32	eRFPath)
+{
+//	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	BOOLEAN				rtValue = _TRUE;
+
+	// NOt check RF Path now.!
+#if 0	
+	if (pHalData->RF_Type == RF_1T2R && eRFPath != RF90_PATH_A)
+	{		
+		rtValue = FALSE;
+	}
+	if (pHalData->RF_Type == RF_1T2R && eRFPath != RF90_PATH_A)
+	{
+
+	}
+#endif
+	return	rtValue;
+
+}	/* PHY_CheckIsLegalRfPath8192C */
+
+//-------------------------------------------------------------------------
+//
+//	IQK
+//
+//-------------------------------------------------------------------------
+#define MAX_TOLERANCE		5
+#define IQK_DELAY_TIME		1 	//ms
+
+static u8			//bit0 = 1 => Tx OK, bit1 = 1 => Rx OK
+_PHY_PathA_IQK(
+	IN	PADAPTER	pAdapter,
+	IN	BOOLEAN		configPathB
+	)
+{
+	u32 regEAC, regE94, regE9C, regEA4;
+	u8 result = 0x00;
+
+	//RTPRINT(FINIT, INIT_IQK, ("Path A IQK!\n"));
+
+	//path-A IQK setting
+	//RTPRINT(FINIT, INIT_IQK, ("Path-A IQK setting!\n"));
+	PHY_SetBBReg(pAdapter, 0xe30, bMaskDWord, 0x10008c1f);
+	PHY_SetBBReg(pAdapter, 0xe34, bMaskDWord, 0x10008c1f);
+	PHY_SetBBReg(pAdapter, 0xe38, bMaskDWord, 0x82140102);
+
+	PHY_SetBBReg(pAdapter, 0xe3c, bMaskDWord, configPathB ? 0x28160202 : 0x28160502);
+
+#if 1
+	//path-B IQK setting
+	if(configPathB)
+	{
+		PHY_SetBBReg(pAdapter, 0xe50, bMaskDWord, 0x10008c22);
+		PHY_SetBBReg(pAdapter, 0xe54, bMaskDWord, 0x10008c22);
+		PHY_SetBBReg(pAdapter, 0xe58, bMaskDWord, 0x82140102);
+		PHY_SetBBReg(pAdapter, 0xe5c, bMaskDWord, 0x28160202);
+	}
+#endif
+	//LO calibration setting
+	//RTPRINT(FINIT, INIT_IQK, ("LO calibration setting!\n"));
+	PHY_SetBBReg(pAdapter, 0xe4c, bMaskDWord, 0x001028d1);
+
+	//One shot, path A LOK & IQK
+	//RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n"));
+	PHY_SetBBReg(pAdapter, 0xe48, bMaskDWord, 0xf9000000);
+	PHY_SetBBReg(pAdapter, 0xe48, bMaskDWord, 0xf8000000);
+	
+	// delay x ms
+	//RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME));
+	rtw_udelay_os(IQK_DELAY_TIME*1000);//PlatformStallExecution(IQK_DELAY_TIME*1000);
+
+	// Check failed
+	regEAC = PHY_QueryBBReg(pAdapter, 0xeac, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC));
+	regE94 = PHY_QueryBBReg(pAdapter, 0xe94, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xe94 = 0x%x\n", regE94));
+	regE9C= PHY_QueryBBReg(pAdapter, 0xe9c, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xe9c = 0x%x\n", regE9C));
+	regEA4= PHY_QueryBBReg(pAdapter, 0xea4, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xea4 = 0x%x\n", regEA4));
+
+        if(!(regEAC & BIT28) &&		
+		(((regE94 & 0x03FF0000)>>16) != 0x142) &&
+		(((regE9C & 0x03FF0000)>>16) != 0x42) )
+		result |= 0x01;
+	else							//if Tx not OK, ignore Rx
+		return result;
+
+	if(!(regEAC & BIT27) &&		//if Tx is OK, check whether Rx is OK
+		(((regEA4 & 0x03FF0000)>>16) != 0x132) &&
+		(((regEAC & 0x03FF0000)>>16) != 0x36))
+		result |= 0x02;
+	else
+		DBG_8192C("Path A Rx IQK fail!!\n");
+	
+	return result;
+
+
+}
+
+static u8				//bit0 = 1 => Tx OK, bit1 = 1 => Rx OK
+_PHY_PathB_IQK(
+	IN	PADAPTER	pAdapter
+	)
+{
+	u32 regEAC, regEB4, regEBC, regEC4, regECC;
+	u8	result = 0x00;
+	//RTPRINT(FINIT, INIT_IQK, ("Path B IQK!\n"));
+#if 0
+	//path-B IQK setting
+	RTPRINT(FINIT, INIT_IQK, ("Path-B IQK setting!\n"));
+	PHY_SetBBReg(pAdapter, 0xe50, bMaskDWord, 0x10008c22);
+	PHY_SetBBReg(pAdapter, 0xe54, bMaskDWord, 0x10008c22);
+	PHY_SetBBReg(pAdapter, 0xe58, bMaskDWord, 0x82140102);
+	PHY_SetBBReg(pAdapter, 0xe5c, bMaskDWord, 0x28160202);
+
+	//LO calibration setting
+	RTPRINT(FINIT, INIT_IQK, ("LO calibration setting!\n"));
+	PHY_SetBBReg(pAdapter, 0xe4c, bMaskDWord, 0x001028d1);
+#endif
+	//One shot, path B LOK & IQK
+	//RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n"));
+	PHY_SetBBReg(pAdapter, 0xe60, bMaskDWord, 0x00000002);
+	PHY_SetBBReg(pAdapter, 0xe60, bMaskDWord, 0x00000000);
+
+	// delay x ms
+	//RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path B LOK & IQK.\n", IQK_DELAY_TIME));
+	rtw_udelay_os(IQK_DELAY_TIME*1000);//PlatformStallExecution(IQK_DELAY_TIME*1000);
+
+	// Check failed
+	regEAC = PHY_QueryBBReg(pAdapter, 0xeac, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC));
+	regEB4 = PHY_QueryBBReg(pAdapter, 0xeb4, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xeb4 = 0x%x\n", regEB4));
+	regEBC= PHY_QueryBBReg(pAdapter, 0xebc, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xebc = 0x%x\n", regEBC));
+	regEC4= PHY_QueryBBReg(pAdapter, 0xec4, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xec4 = 0x%x\n", regEC4));
+	regECC= PHY_QueryBBReg(pAdapter, 0xecc, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xecc = 0x%x\n", regECC));
+
+	if(!(regEAC & BIT31) &&
+		(((regEB4 & 0x03FF0000)>>16) != 0x142) &&
+		(((regEBC & 0x03FF0000)>>16) != 0x42))
+		result |= 0x01;
+	else
+		return result;
+
+	if(!(regEAC & BIT30) &&
+		(((regEC4 & 0x03FF0000)>>16) != 0x132) &&
+		(((regECC & 0x03FF0000)>>16) != 0x36))
+		result |= 0x02;
+	else
+		DBG_8192C("Path B Rx IQK fail!!\n");
+	
+
+	return result;
+
+}
+
+static VOID
+_PHY_PathAFillIQKMatrix(
+	IN	PADAPTER	pAdapter,
+	IN  BOOLEAN    	bIQKOK,
+	IN	int		result[][8],
+	IN	u8		final_candidate,
+	IN  BOOLEAN		bTxOnly
+	)
+{
+	u32	Oldval_0, X, TX0_A, reg;
+	int	Y, TX0_C;
+	
+	DBG_8192C("Path A IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed");
+
+	if(final_candidate == 0xFF)
+		return;
+	else if(bIQKOK)
+	{
+		Oldval_0 = (PHY_QueryBBReg(pAdapter, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF;
+
+		X = result[final_candidate][0];
+		if ((X & 0x00000200) != 0)
+			X = X | 0xFFFFFC00;				
+		TX0_A = (X * Oldval_0) >> 8;
+		//RTPRINT(FINIT, INIT_IQK, ("X = 0x%lx, TX0_A = 0x%lx, Oldval_0 0x%lx\n", X, TX0_A, Oldval_0));
+		PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A);
+		PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(31), ((X* Oldval_0>>7) & 0x1));
+
+		Y = result[final_candidate][1];
+		if ((Y & 0x00000200) != 0)
+			Y = Y | 0xFFFFFC00;		
+		TX0_C = (Y * Oldval_0) >> 8;
+		//RTPRINT(FINIT, INIT_IQK, ("Y = 0x%lx, TX = 0x%lx\n", Y, TX0_C));
+		PHY_SetBBReg(pAdapter, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6));
+		PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F));
+		PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(29), ((Y* Oldval_0>>7) & 0x1));
+
+	        if(bTxOnly)
+		{
+			DBG_8192C("_PHY_PathAFillIQKMatrix only Tx OK\n");
+			return;
+		}
+
+		reg = result[final_candidate][2];
+		PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0x3FF, reg);
+	
+		reg = result[final_candidate][3] & 0x3F;
+		PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0xFC00, reg);
+
+		reg = (result[final_candidate][3] >> 6) & 0xF;
+		PHY_SetBBReg(pAdapter, 0xca0, 0xF0000000, reg);
+	}
+}
+
+static VOID
+_PHY_PathBFillIQKMatrix(
+	IN	PADAPTER	pAdapter,
+	IN  BOOLEAN   	bIQKOK,
+	IN	int		result[][8],
+	IN	u8		final_candidate,
+	IN	BOOLEAN		bTxOnly			//do Tx only
+	)
+{
+	u32	Oldval_1, X, TX1_A, reg;
+	int	Y, TX1_C;
+	
+	DBG_8192C("Path B IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed");
+
+	if(final_candidate == 0xFF)
+		return;
+	else if(bIQKOK)
+	{
+		Oldval_1 = (PHY_QueryBBReg(pAdapter, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF;
+
+		X = result[final_candidate][4];
+		if ((X & 0x00000200) != 0)
+			X = X | 0xFFFFFC00;		
+		TX1_A = (X * Oldval_1) >> 8;
+		//RTPRINT(FINIT, INIT_IQK, ("X = 0x%lx, TX1_A = 0x%lx\n", X, TX1_A));
+		PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A);
+		PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(27), ((X* Oldval_1>>7) & 0x1));
+
+		Y = result[final_candidate][5];
+		if ((Y & 0x00000200) != 0)
+			Y = Y | 0xFFFFFC00;		
+		TX1_C = (Y * Oldval_1) >> 8;
+		//RTPRINT(FINIT, INIT_IQK, ("Y = 0x%lx, TX1_C = 0x%lx\n", Y, TX1_C));
+		PHY_SetBBReg(pAdapter, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6));
+		PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F));
+		PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(25), ((Y* Oldval_1>>7) & 0x1));
+
+		if(bTxOnly)
+			return;
+
+		reg = result[final_candidate][6];
+		PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0x3FF, reg);
+	
+		reg = result[final_candidate][7] & 0x3F;
+		PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0xFC00, reg);
+
+		reg = (result[final_candidate][7] >> 6) & 0xF;
+		PHY_SetBBReg(pAdapter, rOFDM0_AGCRSSITable, 0x0000F000, reg);
+	}
+}
+
+static VOID
+_PHY_SaveADDARegisters(
+	IN	PADAPTER	pAdapter,
+	IN	u32*		ADDAReg,
+	IN	u32*		ADDABackup,
+	IN	u32			RegisterNum
+	)
+{
+	u32	i;
+	
+	//RTPRINT(FINIT, INIT_IQK, ("Save ADDA parameters.\n"));
+	for( i = 0 ; i < RegisterNum ; i++){
+		ADDABackup[i] = PHY_QueryBBReg(pAdapter, ADDAReg[i], bMaskDWord);
+	}
+}
+
+static VOID
+_PHY_SaveMACRegisters(
+	IN	PADAPTER	pAdapter,
+	IN	u32*		MACReg,
+	IN	u32*		MACBackup
+	)
+{
+	u32	i;
+	
+	//RTPRINT(FINIT, INIT_IQK, ("Save MAC parameters.\n"));
+	for( i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){
+		MACBackup[i] =rtw_read8(pAdapter, MACReg[i]);		
+	}
+	MACBackup[i] = rtw_read32(pAdapter, MACReg[i]);		
+
+}
+
+static VOID
+_PHY_ReloadADDARegisters(
+	IN	PADAPTER	pAdapter,
+	IN	u32*		ADDAReg,
+	IN	u32*		ADDABackup,
+	IN	u32			RegiesterNum
+	)
+{
+	u32	i;
+
+	//RTPRINT(FINIT, INIT_IQK, ("Reload ADDA power saving parameters !\n"));
+	for(i = 0 ; i < RegiesterNum ; i++){
+		PHY_SetBBReg(pAdapter, ADDAReg[i], bMaskDWord, ADDABackup[i]);
+	}
+}
+
+static VOID
+_PHY_ReloadMACRegisters(
+	IN	PADAPTER	pAdapter,
+	IN	u32*		MACReg,
+	IN	u32*		MACBackup
+	)
+{
+	u32	i;
+
+	//RTPRINT(FINIT, INIT_IQK, ("Reload MAC parameters !\n"));
+	for(i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){
+		rtw_write8(pAdapter, MACReg[i], (u8)MACBackup[i]);
+	}
+	rtw_write32(pAdapter, MACReg[i], MACBackup[i]);	
+}
+
+static VOID
+_PHY_PathADDAOn(
+	IN	PADAPTER	pAdapter,
+	IN	u32*		ADDAReg,
+	IN	BOOLEAN		isPathAOn,
+	IN	BOOLEAN		is2T
+	)
+{
+	u32	pathOn;
+	u32	i;
+
+	//RTPRINT(FINIT, INIT_IQK, ("ADDA ON.\n"));
+
+	pathOn = isPathAOn ? 0x04db25a4 : 0x0b1b25a4;
+	if(_FALSE == is2T){
+		pathOn = 0x0bdb25a0;
+		PHY_SetBBReg(pAdapter, ADDAReg[0], bMaskDWord, 0x0b1b25a0);
+	}
+	else{
+		PHY_SetBBReg(pAdapter, ADDAReg[0], bMaskDWord, pathOn);
+	}
+	
+	for( i = 1 ; i < IQK_ADDA_REG_NUM ; i++){
+		PHY_SetBBReg(pAdapter, ADDAReg[i], bMaskDWord, pathOn);
+	}
+	
+}
+
+static VOID
+_PHY_MACSettingCalibration(
+	IN	PADAPTER	pAdapter,
+	IN	u32*		MACReg,
+	IN	u32*		MACBackup	
+	)
+{
+	u32	i = 0;
+
+	//RTPRINT(FINIT, INIT_IQK, ("MAC settings for Calibration.\n"));
+
+	rtw_write8(pAdapter, MACReg[i], 0x3F);
+
+	for(i = 1 ; i < (IQK_MAC_REG_NUM - 1); i++){
+		rtw_write8(pAdapter, MACReg[i], (u8)(MACBackup[i]&(~BIT3)));
+	}
+	rtw_write8(pAdapter, MACReg[i], (u8)(MACBackup[i]&(~BIT5)));	
+
+}
+
+static VOID
+_PHY_PathAStandBy(
+	IN	PADAPTER	pAdapter
+	)
+{
+	//RTPRINT(FINIT, INIT_IQK, ("Path-A standby mode!\n"));
+
+	PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x0);
+	PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x00010000);
+	PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x80800000);
+}
+
+static VOID
+_PHY_PIModeSwitch(
+	IN	PADAPTER	pAdapter,
+	IN	BOOLEAN		PIMode
+	)
+{
+	u32	mode;
+
+	//RTPRINT(FINIT, INIT_IQK, ("BB Switch to %s mode!\n", (PIMode ? "PI" : "SI")));
+
+	mode = PIMode ? 0x01000100 : 0x01000000;
+	PHY_SetBBReg(pAdapter, 0x820, bMaskDWord, mode);
+	PHY_SetBBReg(pAdapter, 0x828, bMaskDWord, mode);
+}
+
+/*
+return _FALSE => do IQK again
+*/
+static BOOLEAN							
+_PHY_SimularityCompare(
+	IN	PADAPTER	pAdapter,
+	IN	int 		result[][8],
+	IN	u8		 c1,
+	IN	u8		 c2
+	)
+{
+	u32		i, j, diff, SimularityBitMap, bound = 0;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);	
+	u8		final_candidate[2] = {0xFF, 0xFF};	//for path A and path B
+	BOOLEAN		bResult = _TRUE, is2T = IS_92C_SERIAL( pHalData->VersionID);
+	
+	if(is2T)
+		bound = 8;
+	else
+		bound = 4;
+
+	SimularityBitMap = 0;
+	
+	for( i = 0; i < bound; i++ )
+	{
+		diff = (result[c1][i] > result[c2][i]) ? (result[c1][i] - result[c2][i]) : (result[c2][i] - result[c1][i]);
+		if (diff > MAX_TOLERANCE)
+		{
+			if((i == 2 || i == 6) && !SimularityBitMap)
+			{
+				if(result[c1][i]+result[c1][i+1] == 0)
+					final_candidate[(i/4)] = c2;
+				else if (result[c2][i]+result[c2][i+1] == 0)
+					final_candidate[(i/4)] = c1;
+				else
+					SimularityBitMap = SimularityBitMap|(1<<i);					
+			}
+			else
+				SimularityBitMap = SimularityBitMap|(1<<i);
+		}
+	}
+	
+	if ( SimularityBitMap == 0)
+	{
+		for( i = 0; i < (bound/4); i++ )
+		{
+			if(final_candidate[i] != 0xFF)
+			{
+				for( j = i*4; j < (i+1)*4-2; j++)
+					result[3][j] = result[final_candidate[i]][j];
+				bResult = _FALSE;
+			}
+		}
+		return bResult;
+	}
+	else if (!(SimularityBitMap & 0x0F))			//path A OK
+	{
+		for(i = 0; i < 4; i++)
+			result[3][i] = result[c1][i];
+		return _FALSE;
+	}
+	else if (!(SimularityBitMap & 0xF0) && is2T)	//path B OK
+	{
+		for(i = 4; i < 8; i++)
+			result[3][i] = result[c1][i];
+		return _FALSE;
+	}	
+	else		
+		return _FALSE;
+	
+}
+
+static VOID	
+_PHY_IQCalibrate(
+	IN	PADAPTER	pAdapter,
+	IN	int 		result[][8],
+	IN	u8		t,
+	IN	BOOLEAN		is2T
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u32			i;
+	u8			PathAOK, PathBOK;
+	u32			ADDA_REG[IQK_ADDA_REG_NUM] = {	0x85c, 0xe6c, 0xe70, 0xe74,
+													0xe78, 0xe7c, 0xe80, 0xe84,
+													0xe88, 0xe8c, 0xed0, 0xed4,
+													0xed8, 0xedc, 0xee0, 0xeec };
+
+	u32			IQK_MAC_REG[IQK_MAC_REG_NUM] = {0x522, 0x550,	0x551,0x040};
+
+	u32			IQK_BB_REG[IQK_BB_REG_NUM] = {
+						0xc04, 	0xc08,	0x874,	0xb68,	0xb6c,
+						0x870,	0x860,	0x864,	0x800	
+						};
+
+#if MP_DRIVER
+	const u32	retryCount = 9;
+#else
+	const u32	retryCount = 2;
+#endif
+
+	// Note: IQ calibration must be performed after loading 
+	// 		PHY_REG.txt , and radio_a, radio_b.txt	
+	
+	u32 bbvalue;
+	BOOLEAN			isNormal = IS_NORMAL_CHIP(pHalData->VersionID);
+
+	if(t==0)
+	{
+	 	bbvalue = PHY_QueryBBReg(pAdapter, 0x800, bMaskDWord);
+		//RTPRINT(FINIT, INIT_IQK, ("PHY_IQCalibrate()==>0x%08lx\n",bbvalue));
+
+		//RTPRINT(FINIT, INIT_IQK, ("IQ Calibration for %s\n", (is2T ? "2T2R" : "1T1R")));
+	
+	 	// Save ADDA parameters, turn Path A ADDA on
+	 	_PHY_SaveADDARegisters(pAdapter, ADDA_REG, pdmpriv->ADDA_backup,IQK_ADDA_REG_NUM);
+		_PHY_SaveMACRegisters(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup);
+		_PHY_SaveADDARegisters(pAdapter, IQK_BB_REG, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM);
+	}
+ 	_PHY_PathADDAOn(pAdapter, ADDA_REG, _TRUE, is2T);
+
+	if(t==0)
+	{
+		pdmpriv->bRfPiEnable = (u8)PHY_QueryBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, BIT(8));
+	}
+
+	if(!pdmpriv->bRfPiEnable){
+		// Switch BB to PI mode to do IQ Calibration.
+		_PHY_PIModeSwitch(pAdapter, _TRUE);
+	}
+
+	PHY_SetBBReg(pAdapter, 0x800, BIT24, 0x00);
+	PHY_SetBBReg(pAdapter, 0xc04, bMaskDWord, 0x03a05600);
+	PHY_SetBBReg(pAdapter, 0xc08, bMaskDWord, 0x000800e4);
+	PHY_SetBBReg(pAdapter, 0x874, bMaskDWord, 0x22204000);
+	PHY_SetBBReg(pAdapter, 0x870, BIT10, 0x01);
+	PHY_SetBBReg(pAdapter, 0x870, BIT26, 0x01);
+	PHY_SetBBReg(pAdapter, 0x860, BIT10, 0x00);
+	PHY_SetBBReg(pAdapter, 0x864, BIT10, 0x00);
+
+	if(is2T)
+	{
+		PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x00010000);
+		PHY_SetBBReg(pAdapter, 0x844, bMaskDWord, 0x00010000);
+	}
+	
+	//MAC settings
+	_PHY_MACSettingCalibration(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup);
+
+	//Page B init
+	if(isNormal)
+		PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x00080000);		
+	else
+		PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x0f600000);
+	
+	if(is2T)
+	{
+		if(isNormal)	
+			PHY_SetBBReg(pAdapter, 0xb6c, bMaskDWord, 0x00080000);
+		else
+			PHY_SetBBReg(pAdapter, 0xb6c, bMaskDWord, 0x0f600000);
+	}
+	
+	// IQ calibration setting
+	//RTPRINT(FINIT, INIT_IQK, ("IQK setting!\n"));		
+	PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x80800000);
+	PHY_SetBBReg(pAdapter, 0xe40, bMaskDWord, 0x01007c00);
+	PHY_SetBBReg(pAdapter, 0xe44, bMaskDWord, 0x01004800);
+
+	for(i = 0 ; i < retryCount ; i++){
+		PathAOK = _PHY_PathA_IQK(pAdapter, is2T);
+		if(PathAOK == 0x03){
+				DBG_8192C("Path A IQK Success!!\n");
+				result[t][0] = (PHY_QueryBBReg(pAdapter, 0xe94, bMaskDWord)&0x3FF0000)>>16;
+				result[t][1] = (PHY_QueryBBReg(pAdapter, 0xe9c, bMaskDWord)&0x3FF0000)>>16;
+				result[t][2] = (PHY_QueryBBReg(pAdapter, 0xea4, bMaskDWord)&0x3FF0000)>>16;
+				result[t][3] = (PHY_QueryBBReg(pAdapter, 0xeac, bMaskDWord)&0x3FF0000)>>16;
+			break;
+		}
+		else if (i == (retryCount-1) && PathAOK == 0x01)	//Tx IQK OK
+		{
+			DBG_8192C("Path A IQK Only  Tx Success!!\n");
+			
+			result[t][0] = (PHY_QueryBBReg(pAdapter, 0xe94, bMaskDWord)&0x3FF0000)>>16;
+			result[t][1] = (PHY_QueryBBReg(pAdapter, 0xe9c, bMaskDWord)&0x3FF0000)>>16;			
+		}
+	}
+
+	if(0x00 == PathAOK){		
+		DBG_8192C("Path A IQK failed!!\n");
+	}
+
+	if(is2T){
+		_PHY_PathAStandBy(pAdapter);
+
+		// Turn Path B ADDA on
+		_PHY_PathADDAOn(pAdapter, ADDA_REG, _FALSE, is2T);
+
+		for(i = 0 ; i < retryCount ; i++){
+			PathBOK = _PHY_PathB_IQK(pAdapter);
+			if(PathBOK == 0x03){
+				DBG_8192C("Path B IQK Success!!\n");
+				result[t][4] = (PHY_QueryBBReg(pAdapter, 0xeb4, bMaskDWord)&0x3FF0000)>>16;
+				result[t][5] = (PHY_QueryBBReg(pAdapter, 0xebc, bMaskDWord)&0x3FF0000)>>16;
+				result[t][6] = (PHY_QueryBBReg(pAdapter, 0xec4, bMaskDWord)&0x3FF0000)>>16;
+				result[t][7] = (PHY_QueryBBReg(pAdapter, 0xecc, bMaskDWord)&0x3FF0000)>>16;
+				break;
+			}
+			else if (i == (retryCount - 1) && PathBOK == 0x01)	//Tx IQK OK
+			{
+				DBG_8192C("Path B Only Tx IQK Success!!\n");
+				result[t][4] = (PHY_QueryBBReg(pAdapter, 0xeb4, bMaskDWord)&0x3FF0000)>>16;
+				result[t][5] = (PHY_QueryBBReg(pAdapter, 0xebc, bMaskDWord)&0x3FF0000)>>16;				
+			}
+		}
+
+		if(0x00 == PathBOK){		
+			DBG_8192C("Path B IQK failed!!\n");
+		}
+	}
+
+	//Back to BB mode, load original value
+	//RTPRINT(FINIT, INIT_IQK, ("IQK:Back to BB mode, load original value!\n"));
+	PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0);
+
+	if(t!=0)
+	{
+		if(!pdmpriv->bRfPiEnable){
+			// Switch back BB to SI mode after finish IQ Calibration.
+			_PHY_PIModeSwitch(pAdapter, _FALSE);
+		}
+
+		// Reload ADDA power saving parameters
+	 	_PHY_ReloadADDARegisters(pAdapter, ADDA_REG, pdmpriv->ADDA_backup, IQK_ADDA_REG_NUM);
+
+		// Reload MAC parameters
+		_PHY_ReloadMACRegisters(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup);
+
+	 	// Reload BB parameters
+	 	_PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM);
+
+		// Restore RX initial gain
+		PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x00032ed3);
+		if(is2T){
+			PHY_SetBBReg(pAdapter, 0x844, bMaskDWord, 0x00032ed3);
+		}
+
+		//load 0xe30 IQC default value
+		PHY_SetBBReg(pAdapter, 0xe30, bMaskDWord, 0x01008c00);		
+		PHY_SetBBReg(pAdapter, 0xe34, bMaskDWord, 0x01008c00);
+
+	}
+	//RTPRINT(FINIT, INIT_IQK, ("_PHY_IQCalibrate() <==\n"));
+
+}
+
+
+static VOID	
+_PHY_LCCalibrate(
+	IN	PADAPTER	pAdapter,
+	IN	BOOLEAN		is2T
+	)
+{
+	u8	tmpReg;
+	u32 	RF_Amode = 0, RF_Bmode = 0, LC_Cal;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	BOOLEAN	isNormal = IS_NORMAL_CHIP(pHalData->VersionID);
+
+	//Check continuous TX and Packet TX
+	tmpReg = rtw_read8(pAdapter, 0xd03);
+
+	if((tmpReg&0x70) != 0)			//Deal with contisuous TX case
+		rtw_write8(pAdapter, 0xd03, tmpReg&0x8F);	//disable all continuous TX
+	else 							// Deal with Packet TX case
+		rtw_write8(pAdapter, REG_TXPAUSE, 0xFF);			// block all queues
+
+	if((tmpReg&0x70) != 0)
+	{
+		//1. Read original RF mode
+		//Path-A
+		RF_Amode = PHY_QueryRFReg(pAdapter, RF90_PATH_A, 0x00, bMask12Bits);
+
+		//Path-B
+		if(is2T)
+			RF_Bmode = PHY_QueryRFReg(pAdapter, RF90_PATH_B, 0x00, bMask12Bits);	
+
+		//2. Set RF mode = standby mode
+		//Path-A
+		PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x00, bMask12Bits, (RF_Amode&0x8FFFF)|0x10000);
+
+		//Path-B
+		if(is2T)
+			PHY_SetRFReg(pAdapter, RF90_PATH_B, 0x00, bMask12Bits, (RF_Bmode&0x8FFFF)|0x10000);			
+	}
+	
+	//3. Read RF reg18
+	LC_Cal = PHY_QueryRFReg(pAdapter, RF90_PATH_A, 0x18, bMask12Bits);
+	
+	//4. Set LC calibration begin
+	PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x18, bMask12Bits, LC_Cal|0x08000);
+
+	if(isNormal) {
+		#ifdef CONFIG_LONG_DELAY_ISSUE
+		rtw_msleep_os(100);	
+		#else
+		rtw_mdelay_os(100);		
+		#endif
+	}
+	else
+		rtw_mdelay_os(3);
+
+	//Restore original situation
+	if((tmpReg&0x70) != 0)	//Deal with contisuous TX case 
+	{  
+		//Path-A
+		rtw_write8(pAdapter, 0xd03, tmpReg);
+		PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x00, bMask12Bits, RF_Amode);
+		
+		//Path-B
+		if(is2T)
+			PHY_SetRFReg(pAdapter, RF90_PATH_B, 0x00, bMask12Bits, RF_Bmode);
+	}
+	else // Deal with Packet TX case
+	{
+		rtw_write8(pAdapter, REG_TXPAUSE, 0x00);	
+	}
+	
+}
+
+
+//Analog Pre-distortion calibration
+#define		APK_BB_REG_NUM	8
+#define		APK_CURVE_REG_NUM 4
+#define		PATH_NUM		2
+
+static VOID	
+_PHY_APCalibrate(
+	IN	PADAPTER	pAdapter,
+	IN	char 		delta,
+	IN	BOOLEAN		is2T
+	)
+{
+#if 1//(PLATFORM == PLATFORM_WINDOWS)//???
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+	u32 			regD[PATH_NUM];
+	u32			tmpReg, index, offset, path, i, pathbound = PATH_NUM, apkbound;
+			
+	u32			BB_backup[APK_BB_REG_NUM];
+	u32			BB_REG[APK_BB_REG_NUM] = {	
+						0x904, 0xc04, 0x800, 0xc08, 0x874,
+						0x870, 0x860, 0x864	};
+	u32			BB_AP_MODE[APK_BB_REG_NUM] = {	
+						0x00000020, 0x00a05430, 0x02040000, 
+						0x000800e4, 0x00204000 };
+	u32			BB_normal_AP_MODE[APK_BB_REG_NUM] = {	
+						0x00000020, 0x00a05430, 0x02040000, 
+						0x000800e4, 0x22204000 };						
+
+	u32			AFE_backup[IQK_ADDA_REG_NUM];
+	u32			AFE_REG[IQK_ADDA_REG_NUM] = {	
+						0x85c, 0xe6c, 0xe70, 0xe74, 0xe78, 
+						0xe7c, 0xe80, 0xe84, 0xe88, 0xe8c, 
+						0xed0, 0xed4, 0xed8, 0xedc, 0xee0,
+						0xeec};
+
+	u32			MAC_backup[IQK_MAC_REG_NUM];
+	u32			MAC_REG[IQK_MAC_REG_NUM] = {
+						0x522, 0x550, 0x551, 0x040};
+
+	u32			APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = {
+					{0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c},
+					{0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e}
+					};	
+
+	u32			APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = {
+					{0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c},	//path settings equal to path b settings
+					{0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c}
+					};
+	
+	u32			APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = {
+					{0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d},
+					{0x5201a, 0x52019, 0x52016, 0x52033, 0x52050}
+					};
+
+	u32			APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = {
+					{0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a},	//path settings equal to path b settings
+					{0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}
+					};
+	
+	u32			APK_RF_value_A[PATH_NUM][APK_BB_REG_NUM] = {
+					{0x1adb0, 0x1adb0, 0x1ada0, 0x1ad90, 0x1ad80},		
+					{0x00fb0, 0x00fb0, 0x00fa0, 0x00f90, 0x00f80}						
+					};
+
+	u32			AFE_on_off[PATH_NUM] = {
+					0x04db25a4, 0x0b1b25a4};	//path A on path B off / path A off path B on
+
+	u32			APK_offset[PATH_NUM] = {
+					0xb68, 0xb6c};
+
+	u32			APK_normal_offset[PATH_NUM] = {
+					0xb28, 0xb98};
+					
+	u32			APK_value[PATH_NUM] = {
+					0x92fc0000, 0x12fc0000};					
+
+	u32			APK_normal_value[PATH_NUM] = {
+					0x92680000, 0x12680000};					
+
+	char			APK_delta_mapping[APK_BB_REG_NUM][13] = {
+					{-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
+					{-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},											
+					{-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
+					{-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6},
+					{-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0}
+					};
+	
+	u32			APK_normal_setting_value_1[13] = {
+					0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28,
+					0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3,
+					0x12680000, 0x00880000, 0x00880000
+					};
+
+	u32			APK_normal_setting_value_2[16] = {
+					0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3,
+					0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025,
+					0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008,
+					0x00050006
+					};
+	
+	u32			APK_result[PATH_NUM][APK_BB_REG_NUM];	//val_1_1a, val_1_2a, val_2a, val_3a, val_4a
+	u32			AP_curve[PATH_NUM][APK_CURVE_REG_NUM];
+
+	int			BB_offset, delta_V, delta_offset;
+
+	BOOLEAN			isNormal = IS_NORMAL_CHIP(pHalData->VersionID);
+
+#if (MP_DRIVER == 1)
+	PMPT_CONTEXT	pMptCtx = &pAdapter->mppriv.MptCtx;
+
+	pMptCtx->APK_bound[0] = 45;
+	pMptCtx->APK_bound[1] = 52;		
+#endif
+
+	//RTPRINT(FINIT, INIT_IQK, ("==>PHY_APCalibrate() delta %d\n", delta));
+	
+	//RTPRINT(FINIT, INIT_IQK, ("AP Calibration for %s %s\n", (is2T ? "2T2R" : "1T1R"), (isNormal ? "Normal chip" : "Test chip")));
+
+	if(!is2T)
+		pathbound = 1;
+
+	//2 FOR NORMAL CHIP SETTINGS
+	if(isNormal)
+	{
+// Temporarily do not allow normal driver to do the following settings because these offset
+// and value will cause RF internal PA to be unpredictably disabled by HW, such that RF Tx signal
+// will disappear after disable/enable card many times on 88CU. RF SD and DD have not find the
+// root cause, so we remove these actions temporarily. Added by tynli and SD3 Allen. 2010.05.31.
+#if (MP_DRIVER != 1)
+		return;
+#endif
+	
+		//settings adjust for normal chip
+		for(index = 0; index < PATH_NUM; index ++)
+		{
+ 			APK_offset[index] = APK_normal_offset[index];
+			APK_value[index] = APK_normal_value[index];
+			AFE_on_off[index] = 0x6fdb25a4;
+		}
+
+		for(index = 0; index < APK_BB_REG_NUM; index ++)
+		{
+			for(path = 0; path < pathbound; path++)
+			{
+				APK_RF_init_value[path][index] = APK_normal_RF_init_value[path][index];
+				APK_RF_value_0[path][index] = APK_normal_RF_value_0[path][index];
+			}
+			BB_AP_MODE[index] = BB_normal_AP_MODE[index];
+		}
+
+		apkbound = 6;
+	}
+	else
+	{
+		PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x0fe00000);
+		if(is2T)
+			PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x0fe00000);
+		apkbound = 12;
+	}
+	
+	//save BB default value	
+	for(index = 0; index < APK_BB_REG_NUM ; index++)
+	{
+		if(index == 0 && isNormal)		//skip 
+			continue;				
+		BB_backup[index] = PHY_QueryBBReg(pAdapter, BB_REG[index], bMaskDWord);
+	}
+
+	//save MAC default value													
+	_PHY_SaveMACRegisters(pAdapter, MAC_REG, MAC_backup);
+
+	//save AFE default value
+	_PHY_SaveADDARegisters(pAdapter, AFE_REG, AFE_backup,16);
+
+	for(path = 0; path < pathbound; path++)
+	{
+		//save old AP curve													
+		if(isNormal)
+		{
+			if(path == RF90_PATH_A)
+			{
+				//path A APK
+				//load APK setting
+				//path-A		
+				offset = 0xb00;
+				for(index = 0; index < 11; index ++)			
+				{
+					PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]);
+					//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); 	
+					
+					offset += 0x04;
+				}
+				
+				PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x12680000);
+				
+				offset = 0xb68;
+				for(; index < 13; index ++) 		
+				{
+					PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]);
+					//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); 	
+					
+					offset += 0x04;
+				}	
+				
+				//page-B1
+				PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x40000000);
+				
+				//path A
+				offset = 0xb00;
+				for(index = 0; index < 16; index++)
+				{
+					PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]);		
+					//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); 	
+					
+					offset += 0x04;
+				}				
+				PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000);							
+			}
+			else if(path == RF90_PATH_B)
+			{
+				//path B APK
+				//load APK setting
+				//path-B		
+				offset = 0xb70;
+				for(index = 0; index < 10; index ++)			
+				{
+					PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]);
+					//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); 	
+					
+					offset += 0x04;
+				}
+				PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x12680000);
+				
+				PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x12680000);
+				
+				offset = 0xb68;
+				index = 11;
+				for(; index < 13; index ++) //offset 0xb68, 0xb6c		
+				{
+					PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]);
+					//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); 	
+					
+					offset += 0x04;
+				}	
+				
+				//page-B1
+				PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x40000000);
+				
+				//path B
+				offset = 0xb60;
+				for(index = 0; index < 16; index++)
+				{
+					PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]);		
+					//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); 	
+					
+					offset += 0x04;
+				}				
+				PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000);							
+			}
+		
+#if 0		
+			tmpReg = PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x3, bMaskDWord);
+			AP_curve[path][0] = tmpReg & 0x1F;				//[4:0]
+
+			tmpReg = PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x4, bMaskDWord);			
+			AP_curve[path][1] = (tmpReg & 0xF8000) >> 15; 	//[19:15]						
+			AP_curve[path][2] = (tmpReg & 0x7C00) >> 10;	//[14:10]
+			AP_curve[path][3] = (tmpReg & 0x3E0) >> 5;		//[9:5]			
+#endif			
+		}
+		else
+		{
+			tmpReg = PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xe, bMaskDWord);
+		
+			AP_curve[path][0] = (tmpReg & 0xF8000) >> 15; 	//[19:15]			
+			AP_curve[path][1] = (tmpReg & 0x7C00) >> 10;	//[14:10]
+			AP_curve[path][2] = (tmpReg & 0x3E0) >> 5;		//[9:5]
+			AP_curve[path][3] = tmpReg & 0x1F;				//[4:0]
+		}
+		
+		//save RF default value
+		regD[path] = PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xd, bMaskDWord);
+		
+		//Path A AFE all on, path B AFE All off or vise versa
+		for(index = 0; index < IQK_ADDA_REG_NUM ; index++)
+			PHY_SetBBReg(pAdapter, AFE_REG[index], bMaskDWord, AFE_on_off[path]);
+		//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xe70 %x\n", PHY_QueryBBReg(pAdapter, 0xe70, bMaskDWord)));		
+
+		//BB to AP mode
+		if(path == 0)
+		{
+			for(index = 0; index < APK_BB_REG_NUM ; index++)
+			{
+				if(index == 0 && isNormal)		//skip 
+					continue;
+				else if (index < 5)
+					PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_AP_MODE[index]);
+				else if (BB_REG[index] == 0x870)
+					PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]|BIT10|BIT26);
+				else
+					PHY_SetBBReg(pAdapter, BB_REG[index], BIT10, 0x0);
+			}
+			PHY_SetBBReg(pAdapter, 0xe30, bMaskDWord, 0x01008c00);
+			PHY_SetBBReg(pAdapter, 0xe34, bMaskDWord, 0x01008c00);
+		}
+		else		//path B
+		{
+			PHY_SetBBReg(pAdapter, 0xe50, bMaskDWord, 0x01008c00);
+			PHY_SetBBReg(pAdapter, 0xe54, bMaskDWord, 0x01008c00);
+		}
+
+		//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x800 %x\n", PHY_QueryBBReg(pAdapter, 0x800, bMaskDWord)));				
+
+		//MAC settings
+		_PHY_MACSettingCalibration(pAdapter, MAC_REG, MAC_backup);
+
+		if(path == RF90_PATH_A)	//Path B to standby mode
+		{
+			PHY_SetRFReg(pAdapter, RF90_PATH_B, 0x0, bMaskDWord, 0x10000);			
+		}
+		else			//Path A to standby mode
+		{
+			PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x00, bMaskDWord, 0x10000);			
+			PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x10, bMaskDWord, 0x1000f);			
+			PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x11, bMaskDWord, 0x20103);						
+		}
+
+		delta_offset = ((delta+14)/2);
+		if(delta_offset < 0)
+			delta_offset = 0;
+		else if (delta_offset > 12)
+			delta_offset = 12;
+			
+		//AP calibration
+		for(index = 0; index < APK_BB_REG_NUM; index++)
+		{
+			if(index != 1 && isNormal)		//only DO PA11+PAD01001, AP RF setting
+				continue;
+					
+			tmpReg = APK_RF_init_value[path][index];
+#if 1			
+			if(!pdmpriv->bAPKThermalMeterIgnore)
+			{
+				BB_offset = (tmpReg & 0xF0000) >> 16;
+
+				if(!(tmpReg & BIT15)) //sign bit 0
+				{
+					BB_offset = -BB_offset;
+				}
+
+				delta_V = APK_delta_mapping[index][delta_offset];
+				
+				BB_offset += delta_V;
+
+				//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() APK num %d delta_V %d delta_offset %d\n", index, delta_V, delta_offset));		
+				
+				if(BB_offset < 0)
+				{
+					tmpReg = tmpReg & (~BIT15);
+					BB_offset = -BB_offset;
+				}
+				else
+				{
+					tmpReg = tmpReg | BIT15;
+				}
+				tmpReg = (tmpReg & 0xFFF0FFFF) | (BB_offset << 16);
+			}
+#endif
+			PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xc, bMaskDWord, 0x8992e);
+			//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xc %x\n", PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xc, bMaskDWord)));
+			PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x0, bMaskDWord, APK_RF_value_0[path][index]);
+			//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x0 %x\n", PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x0, bMaskDWord)));		
+			PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xd, bMaskDWord, tmpReg);
+			//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xd %x\n", PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xd, bMaskDWord)));					
+			if(!isNormal)
+			{
+				PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xa, bMaskDWord, APK_RF_value_A[path][index]);
+				//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xa %x\n", PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xa, bMaskDWord)));					
+			}
+			
+			// PA11+PAD01111, one shot	
+			i = 0;
+			do
+			{
+				PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x80000000);
+				{
+					PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[0]);		
+					//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord)));
+					rtw_mdelay_os(3);				
+					PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[1]);
+					//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord)));
+					if(isNormal) {
+						#ifdef CONFIG_LONG_DELAY_ISSUE
+						rtw_msleep_os(20);
+						#else
+					    rtw_mdelay_os(20);
+						#endif
+					}
+					else
+					    rtw_mdelay_os(3);
+				}
+				PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000);
+				
+				if(!isNormal)
+				{
+					tmpReg = PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xb, bMaskDWord);
+					tmpReg = (tmpReg & 0x3E00) >> 9;
+				}
+				else
+				{
+					if(path == RF90_PATH_A)
+						tmpReg = PHY_QueryBBReg(pAdapter, 0xbd8, 0x03E00000);
+					else
+						tmpReg = PHY_QueryBBReg(pAdapter, 0xbd8, 0xF8000000);
+				}
+				//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xbd8[25:21] %x\n", tmpReg));
+
+				i++;
+			}
+			while(tmpReg > apkbound && i < 4);
+
+			APK_result[path][index] = tmpReg;
+		}
+	}
+
+	//reload MAC default value	
+	_PHY_ReloadMACRegisters(pAdapter, MAC_REG, MAC_backup);
+
+	//reload BB default value	
+	for(index = 0; index < APK_BB_REG_NUM ; index++)
+	{
+		if(index == 0 && isNormal)		//skip 
+			continue;
+		PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]);
+	}
+
+	//reload AFE default value
+	_PHY_ReloadADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM);
+
+	//reload RF path default value
+	for(path = 0; path < pathbound; path++)
+	{
+		PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xd, bMaskDWord, regD[path]);
+		if(path == RF90_PATH_B)
+		{
+			PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x10, bMaskDWord, 0x1000f);			
+			PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x11, bMaskDWord, 0x20101);						
+		}
+#if 1
+		if(!isNormal)
+		{
+			for(index = 0; index < APK_BB_REG_NUM ; index++)
+			{
+				if(APK_result[path][index] > 12)
+					APK_result[path][index] = AP_curve[path][index-1];
+				//RTPRINT(FINIT, INIT_IQK, ("apk result %d 0x%x \t", index, APK_result[path][index]));
+			}
+		}
+		else
+		{		//note no index == 0
+			if (APK_result[path][1] > 6)
+				APK_result[path][1] = 6;
+			//RTPRINT(FINIT, INIT_IQK, ("apk path %d result %d 0x%x \t", path, 1, APK_result[path][1]));			
+
+#if 0			
+			if(APK_result[path][2] < 2)
+				APK_result[path][2] = 2;
+			else if (APK_result[path][2] > 6)
+				APK_result[path][2] = 6;			
+		RTPRINT(FINIT, INIT_IQK, ("apk result %d 0x%x \t", 2, APK_result[path][2]));			
+
+			if(APK_result[path][3] < 2)
+				APK_result[path][3] = 2;
+			else if (APK_result[path][3] > 6)
+				APK_result[path][3] = 6;			
+		RTPRINT(FINIT, INIT_IQK, ("apk result %d 0x%x \t", 3, APK_result[path][3]));			
+
+			if(APK_result[path][4] < 5)
+				APK_result[path][4] = 5;
+			else if (APK_result[path][4] > 9)
+				APK_result[path][4] = 9;			
+		RTPRINT(FINIT, INIT_IQK, ("apk result %d 0x%x \t", 4, APK_result[path][4]));			
+#endif			
+		
+		}
+#endif
+	}
+
+	//RTPRINT(FINIT, INIT_IQK, ("\n"));
+	
+
+	for(path = 0; path < pathbound; path++)
+	{
+		if(isNormal)
+		{
+			PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x3, bMaskDWord, 
+			((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (APK_result[path][1] << 5) | APK_result[path][1]));
+			if(path == RF90_PATH_A)
+				PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x4, bMaskDWord, 
+				((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x00 << 5) | 0x05));
+			else
+				PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x4, bMaskDWord, 
+				((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05));
+			PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xe, bMaskDWord, 
+			((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08));
+		}
+		else
+		{
+			for(index = 0; index < 2; index++)
+				pdmpriv->APKoutput[path][index] = ((APK_result[path][index] << 15) | (APK_result[path][2] << 10) | (APK_result[path][3] << 5) | APK_result[path][4]);
+
+#if (MP_DRIVER == 1)
+			if(pMptCtx->TxPwrLevel[path] > pMptCtx->APK_bound[path])	
+			{
+				PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xe, bMaskDWord, 
+				pdmpriv->APKoutput[path][0]);
+			}
+			else
+			{
+				PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xe, bMaskDWord, 
+				pdmpriv->APKoutput[path][1]);		
+			}
+#else
+			PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xe, bMaskDWord, 
+			pdmpriv->APKoutput[path][0]);
+#endif
+		}
+	}
+
+	pdmpriv->bAPKdone = _TRUE;
+
+	//RTPRINT(FINIT, INIT_IQK, ("<==PHY_APCalibrate()\n"));
+#endif		
+}
+
+
+#define		DP_BB_REG_NUM		7
+#define		DP_RF_REG_NUM		1
+#define		DP_RETRY_LIMIT		10
+#define		DP_PATH_NUM		2
+#define		DP_DPK_NUM			3
+#define		DP_DPK_VALUE_NUM	2
+
+//digital predistortion
+static VOID
+_PHY_DigitalPredistortion(
+	IN	PADAPTER	pAdapter,
+	IN	BOOLEAN		is2T
+	)
+{
+#if 1//(PLATFORM == PLATFORM_WINDOWS)
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+	u32			tmpReg, tmpReg2, index, offset, path, i, pathbound = PATH_NUM;					
+	u32			AFE_backup[IQK_ADDA_REG_NUM];
+	u32			AFE_REG[IQK_ADDA_REG_NUM] = {	
+						0x85c, 0xe6c, 0xe70, 0xe74, 0xe78, 
+						0xe7c, 0xe80, 0xe84, 0xe88, 0xe8c, 
+						0xed0, 0xed4, 0xed8, 0xedc, 0xee0,
+						0xeec};
+
+	u32			BB_backup[DP_BB_REG_NUM];	
+	u32			BB_REG[DP_BB_REG_NUM] = {
+						0xc04, 0x800, 0xc08, 0x874,
+						0x870, 0x860, 0x864};						
+	u32			BB_settings[DP_BB_REG_NUM] = {
+						0x00a05430, 0x02040000, 0x000800e4, 0x22208000, 
+						0x0, 0x0, 0x0};	
+
+	u32			RF_backup[DP_PATH_NUM][DP_RF_REG_NUM];
+	u32			RF_REG[DP_RF_REG_NUM] = {
+						0x0d};
+
+	u32			MAC_backup[IQK_MAC_REG_NUM];
+	u32			MAC_REG[IQK_MAC_REG_NUM] = {
+						0x522, 0x550, 0x551, 0x040};
+
+	u32			Tx_AGC[DP_DPK_NUM][DP_DPK_VALUE_NUM] = {
+						{0x1e1e1e1e, 0x03901e1e},
+						{0x18181818, 0x03901818},
+						{0x0e0e0e0e, 0x03900e0e}
+					};
+						
+//	u32			RF_PATHA_backup[DP_RF_REG_NUM];						
+//	u32			RF_REG_PATHA[DP_RF_REG_NUM] = {
+//						0x00, 0x10, 0x11};						
+
+	u32			Reg800, Reg874, Regc04, Regc08, Reg040;
+
+	u32			AFE_on_off[PATH_NUM] = {
+					0x04db25a4, 0x0b1b25a4};	//path A on path B off / path A off path B on
+
+	u32			RetryCount = 0;
+
+	BOOLEAN			isNormal = IS_NORMAL_CHIP(pHalData->VersionID);
+
+	//DBG_8192C("==>_PHY_DigitalPredistortion()\n");
+	
+	//DBG_8192C("_PHY_DigitalPredistortion for %s %s\n", (is2T ? "2T2R" : "1T1R"), (isNormal ? "Normal chip" : "Test chip"));
+
+	if(!isNormal)
+		return;
+
+	//save BB default value
+	for(index=0; index<DP_BB_REG_NUM; index++)
+		BB_backup[index] = PHY_QueryBBReg(pAdapter, BB_REG[index], bMaskDWord);
+
+	//save MAC default value
+	_PHY_SaveMACRegisters(pAdapter, BB_REG, MAC_backup);
+
+	//save RF default value
+	for(path=0; path<DP_PATH_NUM; path++)
+	{
+		for(index=0; index<DP_RF_REG_NUM; index++)
+			RF_backup[path][index] = PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, RF_REG[index], bMaskDWord);	
+	}	
+	
+	//save AFE default value
+	_PHY_SaveADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM);
+	
+	//Path A/B AFE all on
+	for(index = 0; index < IQK_ADDA_REG_NUM ; index++)
+		PHY_SetBBReg(pAdapter, AFE_REG[index], bMaskDWord, 0x6fdb25a4);
+
+	//BB register setting
+	for(index = 0; index < DP_BB_REG_NUM; index++)
+	{
+		if(index < 4)
+			PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_settings[index]);
+		else if (index == 4)
+			PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]|BIT10|BIT26);			
+		else
+			PHY_SetBBReg(pAdapter, BB_REG[index], BIT10, 0x00);			
+	}
+
+	//MAC register setting
+	_PHY_MACSettingCalibration(pAdapter, MAC_REG, MAC_backup);
+
+	//PAGE-E IQC setting	
+	PHY_SetBBReg(pAdapter, 0xe30, bMaskDWord, 0x01008c00); 		
+	PHY_SetBBReg(pAdapter, 0xe34, bMaskDWord, 0x01008c00);	
+	PHY_SetBBReg(pAdapter, 0xe50, bMaskDWord, 0x01008c00);	
+	PHY_SetBBReg(pAdapter, 0xe54, bMaskDWord, 0x01008c00);	
+	
+	//path_A DPK
+	//Path B to standby mode
+	PHY_SetRFReg(pAdapter, RF90_PATH_B, RF_AC, bMaskDWord, 0x10000);
+
+	// PA gain = 11 & PAD1 => tx_agc 1f ~11
+	// PA gain = 11 & PAD2 => tx_agc 10~0e
+	// PA gain = 01 => tx_agc 0b~0d
+	// PA gain = 00 => tx_agc 0a~00
+	PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x40000000);	
+	PHY_SetBBReg(pAdapter, 0xbc0, bMaskDWord, 0x0005361f);		
+	PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000);	
+
+	//do inner loopback DPK 3 times 
+	for(i = 0; i < 3; i++)
+	{
+		//PA gain = 11 & PAD2 => tx_agc = 0x0f/0x0c/0x07
+		for(index = 0; index < 3; index++)
+			PHY_SetBBReg(pAdapter, 0xe00+index*4, bMaskDWord, Tx_AGC[i][0]);			
+		PHY_SetBBReg(pAdapter, 0xe00+index*4, bMaskDWord, Tx_AGC[i][1]);			
+		for(index = 0; index < 4; index++)
+			PHY_SetBBReg(pAdapter, 0xe10+index*4, bMaskDWord, Tx_AGC[i][0]);			
+	
+		// PAGE_B for Path-A inner loopback DPK setting
+		PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x02097098);
+		PHY_SetBBReg(pAdapter, 0xb04, bMaskDWord, 0xf76d9f84);
+		PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x0004ab87);
+		PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x00880000);		
+		
+		//----send one shot signal----//
+		// Path A
+		PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x80047788);
+		rtw_mdelay_os(1);
+		PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x00047788);
+		#ifdef CONFIG_LONG_DELAY_ISSUE
+		rtw_msleep_os(50);
+		#else
+		rtw_mdelay_os(50);
+		#endif
+	}
+
+	//PA gain = 11 => tx_agc = 1a
+	for(index = 0; index < 3; index++)		
+		PHY_SetBBReg(pAdapter, 0xe00+index*4, bMaskDWord, 0x34343434);	
+	PHY_SetBBReg(pAdapter, 0xe08+index*4, bMaskDWord, 0x03903434);	
+	for(index = 0; index < 4; index++)		
+		PHY_SetBBReg(pAdapter, 0xe10+index*4, bMaskDWord, 0x34343434);	
+
+	//====================================
+	// PAGE_B for Path-A DPK setting
+	//====================================
+	// open inner loopback @ b00[19]:10 od 0xb00 0x01097018
+	PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x02017098);
+	PHY_SetBBReg(pAdapter, 0xb04, bMaskDWord, 0xf76d9f84);
+	PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x0004ab87);
+	PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x00880000);		
+
+	//rf_lpbk_setup
+	//1.rf 00:5205a, rf 0d:0e52c
+	PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x0c, bMaskDWord, 0x8992b);
+	PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x0d, bMaskDWord, 0x0e52c); 	
+	PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x00, bMaskDWord, 0x5205a );		
+
+	//----send one shot signal----//
+	// Path A
+	PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x800477c0);
+	rtw_mdelay_os(1);
+	PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x000477c0);
+	#ifdef CONFIG_LONG_DELAY_ISSUE
+	rtw_msleep_os(50);
+	#else
+	rtw_mdelay_os(50);
+	#endif
+
+	while(RetryCount < DP_RETRY_LIMIT && !pdmpriv->bDPPathAOK)
+	{
+		//----read back measurement results----//
+		PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x0c297018);
+		tmpReg = PHY_QueryBBReg(pAdapter, 0xbe0, bMaskDWord);
+		rtw_mdelay_os(10);
+		PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x0c29701f);
+		tmpReg2 = PHY_QueryBBReg(pAdapter, 0xbe8, bMaskDWord);
+		rtw_mdelay_os(10);
+
+		tmpReg = (tmpReg & bMaskHWord) >> 16;
+		tmpReg2 = (tmpReg2 & bMaskHWord) >> 16;		
+		if(tmpReg < 0xf0 || tmpReg > 0x105 || tmpReg2 > 0xff )
+		{
+			PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x02017098);
+		
+			PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x80000000);
+			PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000);
+			rtw_mdelay_os(1);
+			PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x800477c0);
+			rtw_mdelay_os(1);			
+			PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x000477c0);			
+			#ifdef CONFIG_LONG_DELAY_ISSUE
+			rtw_msleep_os(50);
+			#else
+			rtw_mdelay_os(50);			
+			#endif
+			RetryCount++;			
+			DBG_8192C("path A DPK RetryCount %d 0xbe0[31:16] %x 0xbe8[31:16] %x\n", RetryCount, tmpReg, tmpReg2);
+		}
+		else
+		{
+			DBG_8192C("path A DPK Sucess\n");
+			pdmpriv->bDPPathAOK = _TRUE;
+			break;
+		}		
+	}
+	RetryCount = 0;
+	
+	//DPP path A
+	if(pdmpriv->bDPPathAOK)
+	{	
+		// DP settings
+		PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x01017098);
+		PHY_SetBBReg(pAdapter, 0xb04, bMaskDWord, 0x776d9f84);
+		PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x0004ab87);
+		PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x00880000);
+		PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x40000000);
+
+		for(i=0xb00; i<=0xb3c; i+=4)
+		{
+			PHY_SetBBReg(pAdapter, i, bMaskDWord, 0x40004000);	
+			//DBG_8192C("path A ofsset = 0x%x\n", i);
+		}
+		
+		//pwsf
+		PHY_SetBBReg(pAdapter, 0xb40, bMaskDWord, 0x40404040);	
+		PHY_SetBBReg(pAdapter, 0xb44, bMaskDWord, 0x28324040);			
+		PHY_SetBBReg(pAdapter, 0xb48, bMaskDWord, 0x10141920);					
+
+		for(i=0xb4c; i<=0xb5c; i+=4)
+		{
+			PHY_SetBBReg(pAdapter, i, bMaskDWord, 0x0c0c0c0c);	
+		}		
+
+		//TX_AGC boundary
+		PHY_SetBBReg(pAdapter, 0xbc0, bMaskDWord, 0x0005361f);	
+		PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000);					
+	}
+	else
+	{
+		PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x00000000);	
+		PHY_SetBBReg(pAdapter, 0xb04, bMaskDWord, 0x00000000);			
+	}
+
+	//DPK path B
+	if(is2T)
+	{
+		//Path A to standby mode
+		PHY_SetRFReg(pAdapter, RF90_PATH_A, RF_AC, bMaskDWord, 0x10000);
+		
+		// LUTs => tx_agc
+		// PA gain = 11 & PAD1, => tx_agc 1f ~11
+		// PA gain = 11 & PAD2, => tx_agc 10 ~0e
+		// PA gain = 01 => tx_agc 0b ~0d
+		// PA gain = 00 => tx_agc 0a ~00
+		PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x40000000);	
+		PHY_SetBBReg(pAdapter, 0xbc4, bMaskDWord, 0x0005361f);		
+		PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000);	
+
+		//do inner loopback DPK 3 times 
+		for(i = 0; i < 3; i++)
+		{
+			//PA gain = 11 & PAD2 => tx_agc = 0x0f/0x0c/0x07
+			for(index = 0; index < 4; index++)
+				PHY_SetBBReg(pAdapter, 0x830+index*4, bMaskDWord, Tx_AGC[i][0]);			
+			for(index = 0; index < 2; index++)
+				PHY_SetBBReg(pAdapter, 0x848+index*4, bMaskDWord, Tx_AGC[i][0]);			
+			for(index = 0; index < 2; index++)
+				PHY_SetBBReg(pAdapter, 0x868+index*4, bMaskDWord, Tx_AGC[i][0]);			
+		
+			// PAGE_B for Path-A inner loopback DPK setting
+			PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x02097098);
+			PHY_SetBBReg(pAdapter, 0xb74, bMaskDWord, 0xf76d9f84);
+			PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x0004ab87);
+			PHY_SetBBReg(pAdapter, 0xb6c, bMaskDWord, 0x00880000);		
+			
+			//----send one shot signal----//
+			// Path B
+			PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x80047788);
+			rtw_mdelay_os(1);
+			PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x00047788);
+			#ifdef CONFIG_LONG_DELAY_ISSUE
+			rtw_msleep_os(50);
+			#else
+			rtw_mdelay_os(50);
+			#endif
+		}
+
+		// PA gain = 11 => tx_agc = 1a	
+		for(index = 0; index < 4; index++)
+			PHY_SetBBReg(pAdapter, 0x830+index*4, bMaskDWord, 0x34343434);	
+		for(index = 0; index < 2; index++)
+			PHY_SetBBReg(pAdapter, 0x848+index*4, bMaskDWord, 0x34343434);	
+		for(index = 0; index < 2; index++)
+			PHY_SetBBReg(pAdapter, 0x868+index*4, bMaskDWord, 0x34343434);	
+
+		// PAGE_B for Path-B DPK setting
+		PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x02017098);		
+		PHY_SetBBReg(pAdapter, 0xb74, bMaskDWord, 0xf76d9f84);		
+		PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x0004ab87);		
+		PHY_SetBBReg(pAdapter, 0xb6c, bMaskDWord, 0x00880000);		
+
+		// RF lpbk switches on
+		PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x0101000f);		
+		PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x01120103);		
+
+		//Path-B RF lpbk
+		PHY_SetRFReg(pAdapter, RF90_PATH_B, 0x0c, bMaskDWord, 0x8992b);
+		PHY_SetRFReg(pAdapter, RF90_PATH_B, 0x0d, bMaskDWord, 0x0e52c);
+		PHY_SetRFReg(pAdapter, RF90_PATH_B, RF_AC, bMaskDWord, 0x5205a); 
+
+		//----send one shot signal----//
+		PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x800477c0);		
+		rtw_mdelay_os(1);	
+		PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x000477c0);		
+		#ifdef CONFIG_LONG_DELAY_ISSUE
+		rtw_msleep_os(50);
+		#else
+		rtw_mdelay_os(50);
+		#endif
+		
+		while(RetryCount < DP_RETRY_LIMIT && !pdmpriv->bDPPathBOK)
+		{
+			//----read back measurement results----//
+			PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x0c297018);
+			tmpReg = PHY_QueryBBReg(pAdapter, 0xbf0, bMaskDWord);
+			PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x0c29701f);
+			tmpReg2 = PHY_QueryBBReg(pAdapter, 0xbf8, bMaskDWord);
+
+			tmpReg = (tmpReg & bMaskHWord) >> 16;
+			tmpReg2 = (tmpReg2 & bMaskHWord) >> 16;
+
+			if(tmpReg < 0xf0 || tmpReg > 0x105 || tmpReg2 > 0xff)
+			{
+				PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x02017098);
+
+				PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x80000000);
+				PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000);
+				rtw_mdelay_os(1);
+				PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x800477c0);
+				rtw_mdelay_os(1);
+				PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x000477c0);
+				#ifdef CONFIG_LONG_DELAY_ISSUE
+				rtw_msleep_os(50);
+				#else
+				rtw_mdelay_os(50);
+				#endif
+				RetryCount++;
+				DBG_8192C("path B DPK RetryCount %d 0xbf0[31:16] %x, 0xbf8[31:16] %x\n", RetryCount , tmpReg, tmpReg2);
+			}
+			else
+			{
+				DBG_8192C("path B DPK Success\n");
+				pdmpriv->bDPPathBOK = _TRUE;
+				break;
+			}
+		}
+
+		//DPP path B
+		if(pdmpriv->bDPPathBOK)
+		{
+			// DP setting
+			// LUT by SRAM
+			PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x01017098);
+			PHY_SetBBReg(pAdapter, 0xb74, bMaskDWord, 0x776d9f84);
+			PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x0004ab87);
+			PHY_SetBBReg(pAdapter, 0xb6c, bMaskDWord, 0x00880000);
+
+			PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x40000000);
+			for(i=0xb60; i<=0xb9c; i+=4)
+			{
+				PHY_SetBBReg(pAdapter, i, bMaskDWord, 0x40004000);
+				//DBG_8192C("path B ofsset = 0x%x\n", i);
+			}
+
+			// PWSF
+			PHY_SetBBReg(pAdapter, 0xba0, bMaskDWord, 0x40404040);
+			PHY_SetBBReg(pAdapter, 0xba4, bMaskDWord, 0x28324050);
+			PHY_SetBBReg(pAdapter, 0xba8, bMaskDWord, 0x0c141920);
+
+			for(i=0xbac; i<=0xbbc; i+=4)
+			{
+				PHY_SetBBReg(pAdapter, i, bMaskDWord, 0x0c0c0c0c);
+			}		
+			
+			// tx_agc boundary
+			PHY_SetBBReg(pAdapter, 0xbc4, bMaskDWord, 0x0005361f);
+			PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000);
+
+		}
+		else
+		{
+			PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x00000000);
+			PHY_SetBBReg(pAdapter, 0xb74, bMaskDWord, 0x00000000);
+		}
+	}
+
+	//reload BB default value
+	for(index=0; index<DP_BB_REG_NUM; index++)
+		PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]);
+	
+	//reload RF default value
+	for(path = 0; path<DP_PATH_NUM; path++)
+	{
+		for( i = 0 ; i < DP_RF_REG_NUM ; i++){
+			PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, RF_REG[i], bMaskDWord, RF_backup[path][i]);
+		}
+	}
+	PHY_SetRFReg(pAdapter, RF90_PATH_A, RF_MODE1, bMaskDWord, 0x1000f);	//standby mode
+	PHY_SetRFReg(pAdapter, RF90_PATH_A, RF_MODE2, bMaskDWord, 0x20101);		//RF lpbk switches off
+
+	//reload AFE default value
+	_PHY_ReloadADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM);
+
+	//reload MAC default value
+	_PHY_ReloadMACRegisters(pAdapter, MAC_REG, MAC_backup);
+
+//	for( i = 0 ; i < DP_RF_REG_NUM ; i++){
+//		PHY_SetRFReg(pAdapter, RF90_PATH_A, RF_REG_PATHA[i], bMaskDWord, RF_PATHA_backup[i]);
+//	}
+
+	pdmpriv->bDPdone = _TRUE;
+	//DBG_8192C("<==_PHY_DigitalPredistortion()\n");
+#endif		
+}
+
+
+static VOID _PHY_SetRFPathSwitch(
+	IN	PADAPTER	pAdapter,
+	IN	BOOLEAN		bMain,
+	IN	BOOLEAN		is2T
+	)
+{
+	u8	u1bTmp;
+
+	if(!pAdapter->hw_init_completed)
+	{
+		u1bTmp = rtw_read8(pAdapter, REG_LEDCFG2) | BIT7;
+		rtw_write8(pAdapter, REG_LEDCFG2, u1bTmp);
+		//PHY_SetBBReg(pAdapter, REG_LEDCFG0, BIT23, 0x01);
+		PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01);
+	}
+
+	if(is2T)
+	{
+		if(bMain)
+			PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x1);	//92C_Path_A			
+		else
+			PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x2);	//BT							
+	}
+	else
+	{
+	
+		if(bMain)
+			PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x2);	//Main
+		else
+			PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x1);	//Aux		
+	}
+
+}
+
+//return value TRUE => Main; FALSE => Aux
+
+static BOOLEAN _PHY_QueryRFPathSwitch(
+	IN	PADAPTER	pAdapter,
+	IN	BOOLEAN		is2T
+	)
+{
+//	if(is2T)
+//		return _TRUE;
+	
+	if(!pAdapter->hw_init_completed)
+	{
+		PHY_SetBBReg(pAdapter, REG_LEDCFG0, BIT23, 0x01);
+		PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01);
+	}
+
+	if(is2T)
+	{
+		if(PHY_QueryBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6) == 0x01)
+			return _TRUE;
+		else
+			return _FALSE;
+	}
+	else
+	{
+		if(PHY_QueryBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300) == 0x02)
+			return _TRUE;
+		else
+			return _FALSE;
+	}
+}
+
+
+static VOID
+_PHY_DumpRFReg(IN	PADAPTER	pAdapter)
+{
+	u32 rfRegValue,rfRegOffset;
+
+	//RTPRINT(FINIT, INIT_RF, ("PHY_DumpRFReg()====>\n"));
+	
+	for(rfRegOffset = 0x00;rfRegOffset<=0x30;rfRegOffset++){		
+		rfRegValue = PHY_QueryRFReg(pAdapter,RF90_PATH_A, rfRegOffset, bMaskDWord);
+		//RTPRINT(FINIT, INIT_RF, (" 0x%02x = 0x%08x\n",rfRegOffset,rfRegValue));
+	}
+	//RTPRINT(FINIT, INIT_RF, ("<===== PHY_DumpRFReg()\n"));
+}
+
+
+VOID
+rtl8192c_PHY_IQCalibrate(
+	IN	PADAPTER	pAdapter,
+	IN	BOOLEAN 	bReCovery
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u32			IQK_BB_REG[9] = {
+					rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance, rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable,
+					rOFDM0_XATxIQImbalance, rOFDM0_XBTxIQImbalance, rOFDM0_XCTxAFE, rOFDM0_XDTxAFE, rOFDM0_RxIQExtAnta};
+	int			result[4][8];	//last is final result
+	u8			i, final_candidate;
+	BOOLEAN		bPathAOK, bPathBOK;
+	int			RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0;
+	BOOLEAN		is12simular, is13simular, is23simular;	
+
+
+#if (MP_DRIVER == 1)
+	//ignore IQK when continuous Tx
+	if (pAdapter->mppriv.MptCtx.bStartContTx == _TRUE)
+		return;
+	if (pAdapter->mppriv.MptCtx.bCarrierSuppression == _TRUE)
+		return;
+	if (pAdapter->mppriv.MptCtx.bSingleCarrier == _TRUE)
+		return;
+	if (pAdapter->mppriv.MptCtx.bSingleTone == _TRUE)
+		return;
+#endif
+
+#if DISABLE_BB_RF
+	return;
+#endif
+
+	if(bReCovery)
+	{
+		_PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG, pdmpriv->IQK_BB_backup_recover, 9);
+		return;
+	}
+	DBG_8192C("IQK:Start!!!\n");
+
+	for(i = 0; i < 8; i++)
+	{
+		result[0][i] = 0;
+		result[1][i] = 0;
+		result[2][i] = 0;
+		result[3][i] = 0;
+	}
+	final_candidate = 0xff;
+	bPathAOK = _FALSE;
+	bPathBOK = _FALSE;
+	is12simular = _FALSE;
+	is23simular = _FALSE;
+	is13simular = _FALSE;
+
+	for (i=0; i<3; i++)
+	{
+	 	if(IS_92C_SERIAL( pHalData->VersionID)){
+			 _PHY_IQCalibrate(pAdapter, result, i, _TRUE);
+	 		//_PHY_DumpRFReg(pAdapter);
+	 	}
+	 	else{
+	 		// For 88C 1T1R
+	 		_PHY_IQCalibrate(pAdapter, result, i, _FALSE);
+ 		}
+		
+		if(i == 1)
+		{
+			is12simular = _PHY_SimularityCompare(pAdapter, result, 0, 1);
+			if(is12simular)
+			{
+				final_candidate = 0;
+				break;
+			}
+		}
+		
+		if(i == 2)
+		{
+			is13simular = _PHY_SimularityCompare(pAdapter, result, 0, 2);
+			if(is13simular)
+			{
+				final_candidate = 0;			
+				break;
+			}
+			
+			is23simular = _PHY_SimularityCompare(pAdapter, result, 1, 2);
+			if(is23simular)
+				final_candidate = 1;
+			else
+			{
+				for(i = 0; i < 8; i++)
+					RegTmp += result[3][i];
+
+				if(RegTmp != 0)
+					final_candidate = 3;			
+				else
+					final_candidate = 0xFF;
+			}
+		}
+	}
+
+        for (i=0; i<4; i++)
+	{
+		RegE94 = result[i][0];
+		RegE9C = result[i][1];
+		RegEA4 = result[i][2];
+		RegEAC = result[i][3];
+		RegEB4 = result[i][4];
+		RegEBC = result[i][5];
+		RegEC4 = result[i][6];
+		RegECC = result[i][7];
+		//RTPRINT(FINIT, INIT_IQK, ("IQK: RegE94=%lx RegE9C=%lx RegEA4=%lx RegEAC=%lx RegEB4=%lx RegEBC=%lx RegEC4=%lx RegECC=%lx\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC));
+	}
+
+	if(final_candidate != 0xff)
+	{
+		pdmpriv->RegE94 = RegE94 = result[final_candidate][0];
+		pdmpriv->RegE9C = RegE9C = result[final_candidate][1];
+		RegEA4 = result[final_candidate][2];
+		RegEAC = result[final_candidate][3];
+		pdmpriv->RegEB4 = RegEB4 = result[final_candidate][4];
+		pdmpriv->RegEBC = RegEBC = result[final_candidate][5];
+		RegEC4 = result[final_candidate][6];
+		RegECC = result[final_candidate][7];
+		DBG_8192C("IQK: final_candidate is %x\n", final_candidate);
+		DBG_8192C("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC);
+		bPathAOK = bPathBOK = _TRUE;
+	}
+	else
+	{
+
+		#if 0
+		DBG_871X("%s do _PHY_ReloadADDARegisters\n");
+		_PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG, pdmpriv->IQK_BB_backup_recover, 9);
+		return;
+		#else
+		pdmpriv->RegE94 = pdmpriv->RegEB4 = 0x100;	//X default value
+		pdmpriv->RegE9C = pdmpriv->RegEBC = 0x0;		//Y default value
+		#endif
+	}
+	
+	if((RegE94 != 0)/*&&(RegEA4 != 0)*/)
+		_PHY_PathAFillIQKMatrix(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0));
+	
+	if(IS_92C_SERIAL( pHalData->VersionID)){
+		if((RegEB4 != 0)/*&&(RegEC4 != 0)*/)
+		_PHY_PathBFillIQKMatrix(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0));
+	}
+
+	_PHY_SaveADDARegisters(pAdapter, IQK_BB_REG, pdmpriv->IQK_BB_backup_recover, 9);
+
+}
+
+
+VOID
+rtl8192c_PHY_LCCalibrate(
+	IN	PADAPTER	pAdapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+
+
+#if (MP_DRIVER == 1)
+	// ignore LCK when continuous Tx
+	if (pAdapter->mppriv.MptCtx.bStartContTx == _TRUE)
+		return;
+	if (pAdapter->mppriv.MptCtx.bCarrierSuppression == _TRUE)
+		return;
+	if (pAdapter->mppriv.MptCtx.bSingleCarrier == _TRUE)
+		return;
+	if (pAdapter->mppriv.MptCtx.bSingleTone == _TRUE)
+		return;
+#endif
+
+#if DISABLE_BB_RF
+	return;
+#endif
+
+	if(IS_92C_SERIAL( pHalData->VersionID)){
+		_PHY_LCCalibrate(pAdapter, _TRUE);
+	}
+	else{
+		// For 88C 1T1R
+		_PHY_LCCalibrate(pAdapter, _FALSE);
+	}
+}
+
+VOID
+rtl8192c_PHY_APCalibrate(
+	IN	PADAPTER	pAdapter,
+	IN	char 		delta	
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+#if DISABLE_BB_RF
+	return;
+#endif
+
+	if(pdmpriv->bAPKdone)
+		return;
+
+//	if(IS_NORMAL_CHIP(pHalData->VersionID))
+//		return;
+
+	if(IS_92C_SERIAL( pHalData->VersionID)){
+		_PHY_APCalibrate(pAdapter, delta, _TRUE);
+	}
+	else{
+		// For 88C 1T1R
+		_PHY_APCalibrate(pAdapter, delta, _FALSE);
+	}
+}
+
+VOID
+rtl8192c_PHY_DigitalPredistortion(
+	IN	PADAPTER	pAdapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+#if DISABLE_BB_RF
+	return;
+#endif
+
+	return;
+
+	if(pdmpriv->bDPdone)
+		return;
+
+	if(IS_92C_SERIAL( pHalData->VersionID)){
+		_PHY_DigitalPredistortion(pAdapter, _TRUE);
+	}
+	else{
+		// For 88C 1T1R
+		_PHY_DigitalPredistortion(pAdapter, _FALSE);
+	}
+}
+
+VOID rtl8192c_PHY_SetRFPathSwitch(
+	IN	PADAPTER	pAdapter,
+	IN	BOOLEAN		bMain
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+
+#if DISABLE_BB_RF
+	return;
+#endif
+
+	if(IS_92C_SERIAL( pHalData->VersionID)){
+		_PHY_SetRFPathSwitch(pAdapter, bMain, _TRUE);
+	}
+	else{
+		// For 88C 1T1R
+		_PHY_SetRFPathSwitch(pAdapter, bMain, _FALSE);
+	}
+}
+
+//
+// Move from phycfg.c to gen.c to be code independent later
+// 
+//-------------------------Move to other DIR later----------------------------*/
+#ifdef CONFIG_USB_HCI
+
+//
+//	Description:
+// 		To dump all Tx FIFO LLT related link-list table.
+//		Added by Roger, 2009.03.10.
+//
+VOID
+DumpBBDbgPort_92CU(
+	IN	PADAPTER			Adapter
+	)
+{
+
+	//RT_TRACE(COMP_SEND, DBG_WARNING, ("\n>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>\n"));
+	//RT_TRACE(COMP_SEND, DBG_WARNING, ("BaseBand Debug Ports:\n"));
+	
+	PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0000);
+	//RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord)));
+	
+	PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0803);
+	//RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord)));
+	
+	PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0a06);
+	//RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord)));
+
+	PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0007);
+	//RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord)));
+
+	PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0100);
+	PHY_SetBBReg(Adapter, 0x0a28, 0x00ff0000, 0x000f0000);	
+	//RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord)));
+
+	PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0100);
+	PHY_SetBBReg(Adapter, 0x0a28, 0x00ff0000, 0x00150000);	
+	//RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord)));
+
+	//RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0x800, PHY_QueryBBReg(Adapter, 0x0800, bMaskDWord)));
+	//RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0x900, PHY_QueryBBReg(Adapter, 0x0900, bMaskDWord)));
+	//RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa00, PHY_QueryBBReg(Adapter, 0x0a00, bMaskDWord)));
+	//RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa54, PHY_QueryBBReg(Adapter, 0x0a54, bMaskDWord)));
+	//RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa58, PHY_QueryBBReg(Adapter, 0x0a58, bMaskDWord)));
+
+}
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_rf6052.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_rf6052.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_rf6052.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_rf6052.c	2017-09-23 03:42:49.926675346 +0800
@@ -0,0 +1,1047 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+/******************************************************************************
+ * 
+ * 
+ * Module:	rtl8192c_rf6052.c	( Source C File)
+ * 
+ * Note:	Provide RF 6052 series relative API.	 
+ *
+ * Function:	
+ * 		 
+ * Export:	
+ * 
+ * Abbrev:	
+ * 
+ * History:
+ * Data			Who		Remark
+ * 
+ * 09/25/2008	MHC		Create initial version.
+ * 11/05/2008 	MHC		Add API for tw power setting.
+ * 
+ * 	
+******************************************************************************/
+
+#define _RTL8192C_RF6052_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtw_byteorder.h>
+
+#include <rtl8192c_hal.h>
+
+/*---------------------------Define Local Constant---------------------------*/
+// Define local structure for debug!!!!!
+typedef struct RF_Shadow_Compare_Map {
+	// Shadow register value
+	u32		Value;
+	// Compare or not flag
+	u8		Compare;
+	// Record If it had ever modified unpredicted
+	u8		ErrorOrNot;
+	// Recorver Flag
+	u8		Recorver;
+	//
+	u8		Driver_Write;
+}RF_SHADOW_T;
+/*---------------------------Define Local Constant---------------------------*/
+
+
+/*------------------------Define global variable-----------------------------*/
+/*------------------------Define global variable-----------------------------*/
+
+
+/*------------------------Define local variable------------------------------*/
+// 2008/11/20 MH For Debug only, RF
+//static	RF_SHADOW_T	RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG] = {0};
+static	RF_SHADOW_T	RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG];
+/*------------------------Define local variable------------------------------*/
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	RF_ChangeTxPath
+ *
+ * Overview:	For RL6052, we must change some RF settign for 1T or 2T.
+ *
+ * Input:		u2Byte DataRate		// 0x80-8f, 0x90-9f
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 09/25/2008 	MHC		Create Version 0.
+ *						Firmwaer support the utility later.
+ *
+ *---------------------------------------------------------------------------*/
+void rtl8192c_RF_ChangeTxPath(	IN	PADAPTER	Adapter, 
+										IN	u16		DataRate)
+{
+// We do not support gain table change inACUT now !!!! Delete later !!!
+#if 0//(RTL92SE_FPGA_VERIFY == 0)
+	static	u1Byte	RF_Path_Type = 2;	// 1 = 1T 2= 2T			
+	static	u4Byte	tx_gain_tbl1[6] 
+			= {0x17f50, 0x11f40, 0x0cf30, 0x08720, 0x04310, 0x00100};
+	static	u4Byte	tx_gain_tbl2[6] 
+			= {0x15ea0, 0x10e90, 0x0c680, 0x08250, 0x04040, 0x00030};
+	u1Byte	i;
+	
+	if (RF_Path_Type == 2 && (DataRate&0xF) <= 0x7)
+	{
+		// Set TX SYNC power G2G3 loop filter
+		PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, 
+					RF_TXPA_G2, bRFRegOffsetMask, 0x0f000);
+		PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, 
+					RF_TXPA_G3, bRFRegOffsetMask, 0xeacf1);
+
+		// Change TX AGC gain table
+		for (i = 0; i < 6; i++)					
+			PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, 
+						RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl1[i]);
+
+		// Set PA to high value
+		PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, 
+					RF_TXPA_G2, bRFRegOffsetMask, 0x01e39);
+	}
+	else if (RF_Path_Type == 1 && (DataRate&0xF) >= 0x8)
+	{
+		// Set TX SYNC power G2G3 loop filter
+		PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, 
+					RF_TXPA_G2, bRFRegOffsetMask, 0x04440);
+		PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, 
+					RF_TXPA_G3, bRFRegOffsetMask, 0xea4f1);
+
+		// Change TX AGC gain table
+		for (i = 0; i < 6; i++)
+			PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, 
+						RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl2[i]);
+
+		// Set PA low gain
+		PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, 
+					RF_TXPA_G2, bRFRegOffsetMask, 0x01e19);
+	}
+#endif	
+	
+}	/* RF_ChangeTxPath */
+
+
+/*-----------------------------------------------------------------------------
+ * Function:    PHY_RF6052SetBandwidth()
+ *
+ * Overview:    This function is called by SetBWModeCallback8190Pci() only
+ *
+ * Input:       PADAPTER				Adapter
+ *			WIRELESS_BANDWIDTH_E	Bandwidth	//20M or 40M
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Note:		For RF type 0222D
+ *---------------------------------------------------------------------------*/
+VOID
+rtl8192c_PHY_RF6052SetBandwidth(
+	IN	PADAPTER				Adapter,
+	IN	HT_CHANNEL_WIDTH		Bandwidth)	//20M or 40M
+{	
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	
+	switch(Bandwidth)
+	{
+		case HT_CHANNEL_WIDTH_20:
+			pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | 0x0400);
+			PHY_SetRFReg(Adapter, RF90_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
+			break;
+				
+		case HT_CHANNEL_WIDTH_40:
+			pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff));
+			PHY_SetRFReg(Adapter, RF90_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);			
+			break;
+				
+		default:
+			//RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetRF8225Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth ));
+			break;			
+	}
+	
+}
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	PHY_RF6052SetCckTxPower
+ *
+ * Overview:	
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/05/2008 	MHC		Simulate 8192series..
+ *
+ *---------------------------------------------------------------------------*/
+
+VOID
+rtl8192c_PHY_RF6052SetCckTxPower(
+	IN	PADAPTER		Adapter,
+	IN	u8*			pPowerlevel)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	struct mlme_priv	*pmlmepriv = &Adapter->mlmepriv;
+	struct dm_priv		*pdmpriv = &pHalData->dmpriv;
+	struct mlme_ext_priv 		*pmlmeext = &Adapter->mlmeextpriv;
+	//PMGNT_INFO		pMgntInfo=&Adapter->MgntInfo;	
+	u32			TxAGC[2]={0, 0}, tmpval=0;
+	BOOLEAN		TurboScanOff = _FALSE;
+	u8			idx1, idx2;
+	u8*			ptr;
+
+	// 2010/10/18 MH Accorsing to SD3 eechou's suggestion, we need to disable turbo scan for RU.	
+	// Otherwise, external PA will be broken if power index > 0x20.
+#ifdef CONFIG_USB_HCI
+	if (pHalData->EEPROMRegulatory != 0 || pHalData->ExternalPA)
+#else
+	if (pHalData->EEPROMRegulatory != 0)
+#endif
+	{
+		//DbgPrint("TurboScanOff=1 EEPROMRegulatory=%d ExternalPA=%d\n", pHalData->EEPROMRegulatory, pHalData->ExternalPA);
+		TurboScanOff = _TRUE;
+	}
+
+	if(pmlmeext->sitesurvey_res.state == SCAN_PROCESS)
+	{
+		TxAGC[RF90_PATH_A] = 0x3f3f3f3f;
+		TxAGC[RF90_PATH_B] = 0x3f3f3f3f;
+
+		TurboScanOff = _TRUE;//disable turbo scan
+		
+		if(TurboScanOff)
+		{
+			for(idx1=RF90_PATH_A; idx1<=RF90_PATH_B; idx1++)
+			{
+				TxAGC[idx1] = 
+					pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) |
+					(pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24);
+#ifdef CONFIG_USB_HCI
+				// 2010/10/18 MH For external PA module. We need to limit power index to be less than 0x20.
+				if (TxAGC[idx1] > 0x20 && pHalData->ExternalPA)
+					TxAGC[idx1] = 0x20;
+#endif
+			}
+		}
+	}
+	else
+	{
+// 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism.
+// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism.
+// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder.
+		if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
+		{	
+			TxAGC[RF90_PATH_A] = 0x10101010;
+			TxAGC[RF90_PATH_B] = 0x10101010;
+		}
+		else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
+		{	
+			TxAGC[RF90_PATH_A] = 0x00000000;
+			TxAGC[RF90_PATH_B] = 0x00000000;
+		}
+		else
+		{
+			for(idx1=RF90_PATH_A; idx1<=RF90_PATH_B; idx1++)
+			{
+				TxAGC[idx1] = 
+					pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) |
+					(pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24);
+			}
+
+			if(pHalData->EEPROMRegulatory==0)
+			{
+				tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][6]) + 
+						(pHalData->MCSTxPowerLevelOriginalOffset[0][7]<<8);
+				TxAGC[RF90_PATH_A] += tmpval;
+				
+				tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][14]) + 
+						(pHalData->MCSTxPowerLevelOriginalOffset[0][15]<<24);
+				TxAGC[RF90_PATH_B] += tmpval;
+			}
+		}
+	}
+
+	for(idx1=RF90_PATH_A; idx1<=RF90_PATH_B; idx1++)
+	{
+		ptr = (u8*)(&(TxAGC[idx1]));
+		for(idx2=0; idx2<4; idx2++)
+		{
+			if(*ptr > RF6052_MAX_TX_PWR)
+				*ptr = RF6052_MAX_TX_PWR;
+			ptr++;
+		}
+	}
+
+	// rf-A cck tx power
+	tmpval = TxAGC[RF90_PATH_A]&0xff;
+	PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval);
+	//RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 1M (rf-A) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_A_CCK1_Mcs32));
+	tmpval = TxAGC[RF90_PATH_A]>>8;
+	PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval);
+	//RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 2~11M (rf-A) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_B_CCK11_A_CCK2_11));
+
+	// rf-B cck tx power
+	tmpval = TxAGC[RF90_PATH_B]>>24;
+	PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, tmpval);
+	//RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 11M (rf-B) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_B_CCK11_A_CCK2_11));
+	tmpval = TxAGC[RF90_PATH_B]&0x00ffffff;
+	PHY_SetBBReg(Adapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval);
+	//RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 1~5.5M (rf-B) = 0x%x (reg 0x%x)\n", 
+	//	tmpval, rTxAGC_B_CCK1_55_Mcs32));
+	
+}	/* PHY_RF6052SetCckTxPower */
+
+//
+// powerbase0 for OFDM rates
+// powerbase1 for HT MCS rates
+//
+static void getPowerBase(
+	IN	PADAPTER	Adapter,
+	IN	u8*		pPowerLevel,
+	IN	u8		Channel,
+	IN OUT u32*	OfdmBase,
+	IN OUT u32*	MCSBase
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u32			powerBase0, powerBase1;
+	u8			Legacy_pwrdiff=0, HT20_pwrdiff=0;
+	u8			i, powerlevel[2];
+
+	for(i=0; i<2; i++)
+	{
+		powerlevel[i] = pPowerLevel[i];
+		Legacy_pwrdiff = pHalData->TxPwrLegacyHtDiff[i][Channel-1];			
+		powerBase0 = powerlevel[i] + Legacy_pwrdiff; 
+
+		powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0;
+		*(OfdmBase+i) = powerBase0;
+		//RTPRINT(FPHY, PHY_TXPWR, (" [OFDM power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(OfdmBase+i)));
+	}
+
+	for(i=0; i<2; i++)
+	{
+		//Check HT20 to HT40 diff
+		if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
+		{
+			HT20_pwrdiff = pHalData->TxPwrHt20Diff[i][Channel-1];
+			powerlevel[i] += HT20_pwrdiff;
+		}
+		powerBase1 = powerlevel[i];
+		powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1;
+		*(MCSBase+i) = powerBase1;
+		//RTPRINT(FPHY, PHY_TXPWR, (" [MCS power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(MCSBase+i)));
+	}
+}
+
+static void getTxPowerWriteValByRegulatory(
+	IN		PADAPTER	Adapter,
+	IN		u8		Channel,
+	IN		u8		index,
+	IN		u32*		powerBase0,
+	IN		u32*		powerBase1,
+	OUT		u32*		pOutWriteVal
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u8	i, chnlGroup, pwr_diff_limit[4];
+	u32 	writeVal, customer_limit, rf;
+	
+	//
+	// Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate
+	//
+	for(rf=0; rf<2; rf++)
+	{
+		switch(pHalData->EEPROMRegulatory)
+		{
+			case 0:	// Realtek better performance
+					// increase power diff defined by Realtek for large power
+				chnlGroup = 0;
+				//RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", 
+				//	chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]));
+				writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + 
+					((index<2)?powerBase0[rf]:powerBase1[rf]);
+				//RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal));
+				break;
+			case 1:	// Realtek regulatory
+					// increase power diff defined by Realtek for regulatory
+				{
+					if(pHalData->pwrGroupCnt == 1)
+						chnlGroup = 0;
+					if(pHalData->pwrGroupCnt >= 3)
+					{
+						if(Channel <= 3)
+							chnlGroup = 0;
+						else if(Channel >= 4 && Channel <= 9)
+							chnlGroup = 1;
+						else if(Channel > 9)
+							chnlGroup = 2;
+
+						if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
+							chnlGroup++;
+						else
+							chnlGroup+=4;
+					}
+					//RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", 
+					//chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]));
+					writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + 
+							((index<2)?powerBase0[rf]:powerBase1[rf]);
+					//RTPRINT(FPHY, PHY_TXPWR, ("Realtek regulatory, 20MHz, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal));
+				}
+				break;
+			case 2:	// Better regulatory
+					// don't increase any power diff
+				writeVal = ((index<2)?powerBase0[rf]:powerBase1[rf]);
+				//RTPRINT(FPHY, PHY_TXPWR, ("Better regulatory, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal));
+				break;
+			case 3:	// Customer defined power diff.
+					// increase power diff defined by customer.
+				chnlGroup = 0;
+				//RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", 
+				//	chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]));
+
+				if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40)
+				{
+					//RTPRINT(FPHY, PHY_TXPWR, ("customer's limit, 40MHz rf(%c) = 0x%x\n", 
+					//	((rf==0)?'A':'B'), pHalData->PwrGroupHT40[rf][Channel-1]));
+				}
+				else
+				{
+					//RTPRINT(FPHY, PHY_TXPWR, ("customer's limit, 20MHz rf(%c) = 0x%x\n", 
+					//	((rf==0)?'A':'B'), pHalData->PwrGroupHT20[rf][Channel-1]));
+				}
+				for (i=0; i<4; i++)
+				{
+					pwr_diff_limit[i] = (u8)((pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]&(0x7f<<(i*8)))>>(i*8));
+					if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40)
+					{
+						if(pwr_diff_limit[i] > pHalData->PwrGroupHT40[rf][Channel-1])
+							pwr_diff_limit[i] = pHalData->PwrGroupHT40[rf][Channel-1];
+					}
+					else
+					{
+						if(pwr_diff_limit[i] > pHalData->PwrGroupHT20[rf][Channel-1])
+							pwr_diff_limit[i] = pHalData->PwrGroupHT20[rf][Channel-1];
+					}
+				}
+				customer_limit = (pwr_diff_limit[3]<<24) | (pwr_diff_limit[2]<<16) |
+								(pwr_diff_limit[1]<<8) | (pwr_diff_limit[0]);
+				//RTPRINT(FPHY, PHY_TXPWR, ("Customer's limit rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), customer_limit));
+
+				writeVal = customer_limit + ((index<2)?powerBase0[rf]:powerBase1[rf]);
+				//RTPRINT(FPHY, PHY_TXPWR, ("Customer, writeVal rf(%c)= 0x%x\n", ((rf==0)?'A':'B'), writeVal));
+				break;
+			default:
+				chnlGroup = 0;
+				writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + 
+						((index<2)?powerBase0[rf]:powerBase1[rf]);
+				//RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal));
+				break;
+		}
+
+// 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism.
+// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism.
+// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder.
+
+		if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
+			writeVal = 0x14141414;
+		else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
+			writeVal = 0x00000000;
+
+
+		// 20100628 Joseph: High power mode for BT-Coexist mechanism.
+		// This mechanism is only applied when Driver-Highpower-Mechanism is OFF.
+		if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT1)
+		{
+			//RTPRINT(FBT, BT_TRACE, ("Tx Power (-6)\n"));
+			writeVal = writeVal - 0x06060606;
+		}
+		else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT2)
+		{
+			//RTPRINT(FBT, BT_TRACE, ("Tx Power (-0)\n"));
+			writeVal = writeVal;
+		}
+		*(pOutWriteVal+rf) = writeVal;
+	}
+}
+
+static void writeOFDMPowerReg(
+	IN		PADAPTER	Adapter,
+	IN		u8		index,
+	IN 		u32*		pValue
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u16 RegOffset_A[6] = {	rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24, 
+							rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04, 
+							rTxAGC_A_Mcs11_Mcs08, rTxAGC_A_Mcs15_Mcs12};
+	u16 RegOffset_B[6] = {	rTxAGC_B_Rate18_06, rTxAGC_B_Rate54_24, 
+							rTxAGC_B_Mcs03_Mcs00, rTxAGC_B_Mcs07_Mcs04,
+							rTxAGC_B_Mcs11_Mcs08, rTxAGC_B_Mcs15_Mcs12};
+	u8 i, rf, pwr_val[4];
+	u32 writeVal;
+	u16 RegOffset;
+
+	for(rf=0; rf<2; rf++)
+	{
+		writeVal = pValue[rf];
+		for(i=0; i<4; i++)
+		{
+			pwr_val[i] = (u8)((writeVal & (0x7f<<(i*8)))>>(i*8));
+			if (pwr_val[i]  > RF6052_MAX_TX_PWR)
+				pwr_val[i]  = RF6052_MAX_TX_PWR;
+		}
+		writeVal = (pwr_val[3]<<24) | (pwr_val[2]<<16) |(pwr_val[1]<<8) |pwr_val[0];
+
+		if(rf == 0)
+			RegOffset = RegOffset_A[index];
+		else
+			RegOffset = RegOffset_B[index];
+		
+		PHY_SetBBReg(Adapter, RegOffset, bMaskDWord, writeVal);
+		//RTPRINT(FPHY, PHY_TXPWR, ("Set 0x%x = %08x\n", RegOffset, writeVal));
+
+		// 201005115 Joseph: Set Tx Power diff for Tx power training mechanism.
+		if(((pHalData->rf_type == RF_2T2R) && 
+				(RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs15_Mcs12))||
+		     ((pHalData->rf_type != RF_2T2R) && 
+				(RegOffset == rTxAGC_A_Mcs07_Mcs04 || RegOffset == rTxAGC_B_Mcs07_Mcs04))	)
+		{
+			writeVal = pwr_val[3];
+			if(RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_A_Mcs07_Mcs04)
+				RegOffset = 0xc90;
+			if(RegOffset == rTxAGC_B_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs07_Mcs04)
+				RegOffset = 0xc98;
+			for(i=0; i<3; i++)
+			{
+				if(i!=2)
+					writeVal = (writeVal>8)?(writeVal-8):0;
+				else
+					writeVal = (writeVal>6)?(writeVal-6):0;
+				rtw_write8(Adapter, (u32)(RegOffset+i), (u8)writeVal);
+			}
+		}
+	}
+}
+/*-----------------------------------------------------------------------------
+ * Function:	PHY_RF6052SetOFDMTxPower
+ *
+ * Overview:	For legacy and HY OFDM, we must read EEPROM TX power index for 
+ *			different channel and read original value in TX power register area from
+ *			0xe00. We increase offset and original value to be correct tx pwr.
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/05/2008 	MHC		Simulate 8192 series method.
+ * 01/06/2009	MHC		1. Prevent Path B tx power overflow or underflow dure to
+ *						A/B pwr difference or legacy/HT pwr diff.
+ *						2. We concern with path B legacy/HT OFDM difference.
+ * 01/22/2009	MHC		Support new EPRO format from SD3.
+ *
+ *---------------------------------------------------------------------------*/
+VOID 
+rtl8192c_PHY_RF6052SetOFDMTxPower(
+	IN	PADAPTER	Adapter,
+	IN	u8*		pPowerLevel,
+	IN	u8		Channel)
+{
+	//HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u32 writeVal[2], powerBase0[2], powerBase1[2];
+	u8 index = 0;
+
+	getPowerBase(Adapter, pPowerLevel, Channel, &powerBase0[0], &powerBase1[0]);
+
+	for(index=0; index<6; index++)
+	{
+		getTxPowerWriteValByRegulatory(Adapter, Channel, index, 
+			&powerBase0[0], &powerBase1[0], &writeVal[0]);
+
+		writeOFDMPowerReg(Adapter, index, &writeVal[0]);
+	}
+	
+}
+
+
+static VOID
+phy_RF6052_Config_HardCode(
+	IN	PADAPTER		Adapter
+	)
+{
+	
+	// Set Default Bandwidth to 20M
+	//Adapter->HalFunc	.SetBWModeHandler(Adapter, HT_CHANNEL_WIDTH_20);
+
+	// TODO: Set Default Channel to channel one for RTL8225
+	
+}
+
+static int
+phy_RF6052_Config_ParaFile(
+	IN	PADAPTER		Adapter
+	)
+{
+	u32					u4RegValue;
+	u8					eRFPath;		
+	BB_REGISTER_DEFINITION_T	*pPhyReg;	
+
+	int					rtStatus = _SUCCESS;
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	static char			sz88CRadioAFile[] = RTL8188C_PHY_RADIO_A;	
+	static char			sz88CRadioBFile[] = RTL8188C_PHY_RADIO_B;
+#ifdef CONFIG_USB_HCI
+	static char			sz88CRadioAFile_mCard[] = RTL8188C_PHY_RADIO_A_mCard;	
+	static char			sz88CRadioBFile_mCard[] = RTL8188C_PHY_RADIO_B_mCard;
+	static char			sz88CRadioAFile_HP[] = RTL8188C_PHY_RADIO_A_HP;	
+#endif
+	static char			sz92CRadioAFile[] = RTL8192C_PHY_RADIO_A;	
+	static char			sz92CRadioBFile[] = RTL8192C_PHY_RADIO_B;
+	static char			sz8723RadioAFile[] = RTL8723_PHY_RADIO_A;	
+	static char			sz8723RadioBFile[] = RTL8723_PHY_RADIO_B;
+	char					*pszRadioAFile, *pszRadioBFile;	
+
+
+	if(IS_HARDWARE_TYPE_8192C(Adapter))
+	{
+		if(IS_92C_SERIAL( pHalData->VersionID))// 88c's IPA  is different from 92c's
+		{
+			if(IS_NORMAL_CHIP(pHalData->VersionID))
+			{
+				pszRadioAFile = sz92CRadioAFile;
+				pszRadioBFile = sz92CRadioBFile;
+			}
+			else
+			{
+				rtStatus = _FAIL;
+				return rtStatus;
+			}
+		}
+		else
+		{
+			if(IS_NORMAL_CHIP(pHalData->VersionID))
+			{
+				pszRadioAFile = sz88CRadioAFile;
+				pszRadioBFile = sz88CRadioBFile;
+#ifdef CONFIG_USB_HCI
+				if( BOARD_MINICARD == pHalData->BoardType)
+				{
+					pszRadioAFile = sz88CRadioAFile_mCard;
+					pszRadioBFile = sz88CRadioBFile_mCard;
+				}
+				else if( BOARD_USB_High_PA == pHalData->BoardType)
+				{
+					pszRadioAFile = sz88CRadioAFile_HP;
+				}
+#endif	
+			}
+			else
+			{
+				rtStatus = _FAIL;
+				return rtStatus;
+			}
+		}
+	}
+	else if(IS_HARDWARE_TYPE_8723(Adapter))
+	{
+		pszRadioAFile = sz8723RadioAFile;
+		pszRadioBFile = sz8723RadioBFile;	
+	}
+
+	//3//-----------------------------------------------------------------
+	//3// <2> Initialize RF
+	//3//-----------------------------------------------------------------
+	//for(eRFPath = RF90_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
+	for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
+	{
+
+		pPhyReg = &pHalData->PHYRegDef[eRFPath];
+		
+		/*----Store original RFENV control type----*/		
+		switch(eRFPath)
+		{
+		case RF90_PATH_A:
+		case RF90_PATH_C:
+			u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV);
+			break;
+		case RF90_PATH_B :
+		case RF90_PATH_D:
+			u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16);
+			break;
+		}
+
+		/*----Set RF_ENV enable----*/		
+		PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1);
+		rtw_udelay_os(1);//PlatformStallExecution(1);
+		
+		/*----Set RF_ENV output high----*/
+		PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
+		rtw_udelay_os(1);//PlatformStallExecution(1);
+
+		/* Set bit number of Address and Data for RF register */
+		PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); 	// Set 1 to 4 bits for 8255
+		rtw_udelay_os(1);//PlatformStallExecution(1);
+
+		PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0);	// Set 0 to 12  bits for 8255
+		rtw_udelay_os(1);//PlatformStallExecution(1);
+
+		/*----Initialize RF fom connfiguration file----*/
+		switch(eRFPath)
+		{
+		case RF90_PATH_A:
+#ifdef CONFIG_EMBEDDED_FWIMG
+			rtStatus= rtl8192c_PHY_ConfigRFWithHeaderFile(Adapter,(RF90_RADIO_PATH_E)eRFPath);
+#else
+			rtStatus = rtl8192c_PHY_ConfigRFWithParaFile(Adapter, pszRadioAFile, (RF90_RADIO_PATH_E)eRFPath);
+#endif
+			break;
+		case RF90_PATH_B:
+#ifdef CONFIG_EMBEDDED_FWIMG
+			rtStatus = rtl8192c_PHY_ConfigRFWithHeaderFile(Adapter,(RF90_RADIO_PATH_E)eRFPath);
+#else			
+			rtStatus = rtl8192c_PHY_ConfigRFWithParaFile(Adapter, pszRadioBFile, (RF90_RADIO_PATH_E)eRFPath);
+#endif
+			break;
+		case RF90_PATH_C:
+			break;
+		case RF90_PATH_D:
+			break;
+		}
+
+		/*----Restore RFENV control type----*/;
+		switch(eRFPath)
+		{
+		case RF90_PATH_A:
+		case RF90_PATH_C:
+			PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
+			break;
+		case RF90_PATH_B :
+		case RF90_PATH_D:
+			PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue);
+			break;
+		}
+
+		if(rtStatus != _SUCCESS){
+			//RT_TRACE(COMP_FPGA, DBG_LOUD, ("phy_RF6052_Config_ParaFile():Radio[%d] Fail!!", eRFPath));
+			goto phy_RF6052_Config_ParaFile_Fail;
+		}
+
+	}
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("<---phy_RF6052_Config_ParaFile()\n"));
+	return rtStatus;
+	
+phy_RF6052_Config_ParaFile_Fail:	
+	return rtStatus;
+}
+
+
+int
+PHY_RF6052_Config8192C(
+	IN	PADAPTER		Adapter)
+{
+	HAL_DATA_TYPE				*pHalData = GET_HAL_DATA(Adapter);
+	int					rtStatus = _SUCCESS;	
+	
+	//
+	// Initialize general global value
+	//
+	// TODO: Extend RF_PATH_C and RF_PATH_D in the future
+	if(pHalData->rf_type == RF_1T1R)
+		pHalData->NumTotalRFPath = 1;
+	else
+		pHalData->NumTotalRFPath = 2;
+
+	//
+	// Config BB and RF
+	//
+	rtStatus = phy_RF6052_Config_ParaFile(Adapter);
+#if 0	
+	switch( Adapter->MgntInfo.bRegHwParaFile )
+	{
+		case 0:
+			phy_RF6052_Config_HardCode(Adapter);
+			break;
+
+		case 1:
+			rtStatus = phy_RF6052_Config_ParaFile(Adapter);
+			break;
+
+		case 2:
+			// Partial Modify. 
+			phy_RF6052_Config_HardCode(Adapter);
+			phy_RF6052_Config_ParaFile(Adapter);
+			break;
+
+		default:
+			phy_RF6052_Config_HardCode(Adapter);
+			break;
+	}
+#endif	
+	return rtStatus;
+		
+}
+
+
+//
+// ==> RF shadow Operation API Code Section!!!
+//
+/*-----------------------------------------------------------------------------
+ * Function:	PHY_RFShadowRead
+ *				PHY_RFShadowWrite
+ *				PHY_RFShadowCompare
+ *				PHY_RFShadowRecorver
+ *				PHY_RFShadowCompareAll
+ *				PHY_RFShadowRecorverAll
+ *				PHY_RFShadowCompareFlagSet
+ *				PHY_RFShadowRecorverFlagSet
+ *
+ * Overview:	When we set RF register, we must write shadow at first.
+ *			When we are running, we must compare shadow abd locate error addr.
+ *			Decide to recorver or not.
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/20/2008 	MHC		Create Version 0.
+ *
+ *---------------------------------------------------------------------------*/
+u32
+PHY_RFShadowRead(
+	IN	PADAPTER			Adapter,
+	IN	RF90_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset)
+{
+	return	RF_Shadow[eRFPath][Offset].Value;
+	
+}	/* PHY_RFShadowRead */
+
+
+VOID
+PHY_RFShadowWrite(
+	IN	PADAPTER			Adapter,
+	IN	RF90_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset,
+	IN	u32				Data)
+{
+	RF_Shadow[eRFPath][Offset].Value = (Data & bRFRegOffsetMask);
+	RF_Shadow[eRFPath][Offset].Driver_Write = _TRUE;
+	
+}	/* PHY_RFShadowWrite */
+
+
+BOOLEAN
+PHY_RFShadowCompare(
+	IN	PADAPTER			Adapter,
+	IN	RF90_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset)
+{
+	u32	reg;
+	// Check if we need to check the register
+	if (RF_Shadow[eRFPath][Offset].Compare == _TRUE)
+	{
+		reg = PHY_QueryRFReg(Adapter, eRFPath, Offset, bRFRegOffsetMask);
+		// Compare shadow and real rf register for 20bits!!
+		if (RF_Shadow[eRFPath][Offset].Value != reg)
+		{
+			// Locate error position.
+			RF_Shadow[eRFPath][Offset].ErrorOrNot = _TRUE;
+			//RT_TRACE(COMP_INIT, DBG_LOUD, 
+			//("PHY_RFShadowCompare RF-%d Addr%02lx Err = %05lx\n", 
+			//eRFPath, Offset, reg));
+		}
+		return RF_Shadow[eRFPath][Offset].ErrorOrNot ;
+	}
+	return _FALSE;
+}	/* PHY_RFShadowCompare */
+
+
+VOID
+PHY_RFShadowRecorver(
+	IN	PADAPTER			Adapter,
+	IN	RF90_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset)
+{
+	// Check if the address is error
+	if (RF_Shadow[eRFPath][Offset].ErrorOrNot == _TRUE)
+	{
+		// Check if we need to recorver the register.
+		if (RF_Shadow[eRFPath][Offset].Recorver == _TRUE)
+		{
+			PHY_SetRFReg(Adapter, eRFPath, Offset, bRFRegOffsetMask, 
+							RF_Shadow[eRFPath][Offset].Value);
+			//RT_TRACE(COMP_INIT, DBG_LOUD, 
+			//("PHY_RFShadowRecorver RF-%d Addr%02lx=%05lx", 
+			//eRFPath, Offset, RF_Shadow[eRFPath][Offset].Value));
+		}
+	}
+	
+}	/* PHY_RFShadowRecorver */
+
+
+VOID
+PHY_RFShadowCompareAll(
+	IN	PADAPTER			Adapter)
+{
+	u32		eRFPath;
+	u32		Offset;
+
+	for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
+	{
+		for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
+		{
+			PHY_RFShadowCompare(Adapter, (RF90_RADIO_PATH_E)eRFPath, Offset);
+		}
+	}
+	
+}	/* PHY_RFShadowCompareAll */
+
+
+VOID
+PHY_RFShadowRecorverAll(
+	IN	PADAPTER			Adapter)
+{
+	u32		eRFPath;
+	u32		Offset;
+
+	for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
+	{
+		for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
+		{
+			PHY_RFShadowRecorver(Adapter, (RF90_RADIO_PATH_E)eRFPath, Offset);
+		}
+	}
+	
+}	/* PHY_RFShadowRecorverAll */
+
+
+VOID
+PHY_RFShadowCompareFlagSet(
+	IN	PADAPTER			Adapter,
+	IN	RF90_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset,
+	IN	u8				Type)
+{
+	// Set True or False!!!
+	RF_Shadow[eRFPath][Offset].Compare = Type;
+		
+}	/* PHY_RFShadowCompareFlagSet */
+
+
+VOID
+PHY_RFShadowRecorverFlagSet(
+	IN	PADAPTER			Adapter,
+	IN	RF90_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset,
+	IN	u8				Type)
+{
+	// Set True or False!!!
+	RF_Shadow[eRFPath][Offset].Recorver= Type;
+		
+}	/* PHY_RFShadowRecorverFlagSet */
+
+
+VOID
+PHY_RFShadowCompareFlagSetAll(
+	IN	PADAPTER			Adapter)
+{
+	u32		eRFPath;
+	u32		Offset;
+
+	for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
+	{
+		for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
+		{
+			// 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!!
+			if (Offset != 0x26 && Offset != 0x27)
+				PHY_RFShadowCompareFlagSet(Adapter, (RF90_RADIO_PATH_E)eRFPath, Offset, _FALSE);
+			else
+				PHY_RFShadowCompareFlagSet(Adapter, (RF90_RADIO_PATH_E)eRFPath, Offset, _TRUE);
+		}
+	}
+		
+}	/* PHY_RFShadowCompareFlagSetAll */
+
+
+VOID
+PHY_RFShadowRecorverFlagSetAll(
+	IN	PADAPTER			Adapter)
+{
+	u32		eRFPath;
+	u32		Offset;
+
+	for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
+	{
+		for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
+		{
+			// 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!!
+			if (Offset != 0x26 && Offset != 0x27)
+				PHY_RFShadowRecorverFlagSet(Adapter, (RF90_RADIO_PATH_E)eRFPath, Offset, _FALSE);
+			else
+				PHY_RFShadowRecorverFlagSet(Adapter, (RF90_RADIO_PATH_E)eRFPath, Offset, _TRUE);
+		}
+	}
+		
+}	/* PHY_RFShadowCompareFlagSetAll */
+
+VOID
+PHY_RFShadowRefresh(
+	IN	PADAPTER			Adapter)
+{
+	u32		eRFPath;
+	u32		Offset;
+
+	for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
+	{
+		for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
+		{
+			RF_Shadow[eRFPath][Offset].Value = 0;
+			RF_Shadow[eRFPath][Offset].Compare = _FALSE;
+			RF_Shadow[eRFPath][Offset].Recorver  = _FALSE;
+			RF_Shadow[eRFPath][Offset].ErrorOrNot = _FALSE;
+			RF_Shadow[eRFPath][Offset].Driver_Write = _FALSE;
+		}
+	}
+	
+}	/* PHY_RFShadowRead */
+
+/* End of HalRf6052.c */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_rxdesc.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_rxdesc.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_rxdesc.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_rxdesc.c	2017-09-23 03:42:49.926675346 +0800
@@ -0,0 +1,765 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+******************************************************************************/
+#define _RTL8192C_REDESC_C_
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtl8192c_hal.h>
+
+static u8 evm_db2percentage(s8 value)
+{
+	//
+	// -33dB~0dB to 0%~99%
+	//
+	s8 ret_val;
+
+	ret_val = value;
+	//ret_val /= 2;
+
+	RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("EVMdbToPercentage92S Value=%d / %x \n", ret_val, ret_val));
+
+	if(ret_val >= 0)
+		ret_val = 0;
+	if(ret_val <= -33)
+		ret_val = -33;
+
+	ret_val = 0 - ret_val;
+	ret_val*=3;
+
+	if(ret_val == 99)
+		ret_val = 100;
+
+	return(ret_val);
+}
+
+
+static s32 signal_scale_mapping(_adapter *padapter, s32 cur_sig )
+{
+	s32 ret_sig;
+
+#ifdef CONFIG_USB_HCI
+	if(cur_sig >= 51 && cur_sig <= 100)
+	{
+		ret_sig = 100;
+	}
+	else if(cur_sig >= 41 && cur_sig <= 50)
+	{
+		ret_sig = 80 + ((cur_sig - 40)*2);
+	}
+	else if(cur_sig >= 31 && cur_sig <= 40)
+	{
+		ret_sig = 66 + (cur_sig - 30);
+	}
+	else if(cur_sig >= 21 && cur_sig <= 30)
+	{
+		ret_sig = 54 + (cur_sig - 20);
+	}
+	else if(cur_sig >= 10 && cur_sig <= 20)
+	{
+		ret_sig = 42 + (((cur_sig - 10) * 2) / 3);
+	}
+	else if(cur_sig >= 5 && cur_sig <= 9)
+	{
+		ret_sig = 22 + (((cur_sig - 5) * 3) / 2);
+	}
+	else if(cur_sig >= 1 && cur_sig <= 4)
+	{
+		ret_sig = 6 + (((cur_sig - 1) * 3) / 2);
+	}
+	else
+	{
+		ret_sig = cur_sig;
+	}
+#else
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+
+	if(pHalData->CustomerID == RT_CID_819x_Lenovo)
+	{
+		// Step 1. Scale mapping.
+		// 20100611 Joseph: Re-tunning RSSI presentation for Lenovo.
+		// 20100426 Joseph: Modify Signal strength mapping.
+		// This modification makes the RSSI indication similar to Intel solution.
+		// 20100414 Joseph: Tunning RSSI for Lenovo according to RTL8191SE.
+		if(cur_sig >= 54 && cur_sig <= 100)
+		{
+			ret_sig = 100;
+		}
+		else if(cur_sig>=42 && cur_sig <= 53 )
+		{
+			ret_sig = 95;
+		}
+		else if(cur_sig>=36 && cur_sig <= 41 )
+		{
+			ret_sig = 74 + ((cur_sig - 36) *20)/6;
+		}
+		else if(cur_sig>=33 && cur_sig <= 35 )
+		{
+			ret_sig = 65 + ((cur_sig - 33) *8)/2;
+		}
+		else if(cur_sig>=18 && cur_sig <= 32 )
+		{
+			ret_sig = 62 + ((cur_sig - 18) *2)/15;
+		}
+		else if(cur_sig>=15 && cur_sig <= 17 )
+		{
+			ret_sig = 33 + ((cur_sig - 15) *28)/2;
+		}
+		else if(cur_sig>=10 && cur_sig <= 14 )
+		{
+			ret_sig = 39;
+		}
+		else if(cur_sig>=8 && cur_sig <= 9 )
+		{
+			ret_sig = 33;
+		}
+		else if(cur_sig <= 8 )
+		{
+			ret_sig = 19;
+		}
+	}
+	else
+	{
+		// Step 1. Scale mapping.
+		if(cur_sig >= 61 && cur_sig <= 100)
+		{
+			ret_sig = 90 + ((cur_sig - 60) / 4);
+		}
+		else if(cur_sig >= 41 && cur_sig <= 60)
+		{
+			ret_sig = 78 + ((cur_sig - 40) / 2);
+		}
+		else if(cur_sig >= 31 && cur_sig <= 40)
+		{
+			ret_sig = 66 + (cur_sig - 30);
+		}
+		else if(cur_sig >= 21 && cur_sig <= 30)
+		{
+			ret_sig = 54 + (cur_sig - 20);
+		}
+		else if(cur_sig >= 5 && cur_sig <= 20)
+		{
+			ret_sig = 42 + (((cur_sig - 5) * 2) / 3);
+		}
+		else if(cur_sig == 4)
+		{
+			ret_sig = 36;
+		}
+		else if(cur_sig == 3)
+		{
+			ret_sig = 27;
+		}
+		else if(cur_sig == 2)
+		{
+			ret_sig = 18;
+		}
+		else if(cur_sig == 1)
+		{
+			ret_sig = 9;
+		}
+		else
+		{
+			ret_sig = cur_sig;
+		}
+	}
+#endif
+
+	return ret_sig;
+}
+
+
+static s32  translate2dbm(u8 signal_strength_idx)
+{
+	s32	signal_power; // in dBm.
+
+
+	// Translate to dBm (x=0.5y-95).
+	signal_power = (s32)((signal_strength_idx + 1) >> 1);
+	signal_power -= 95;
+
+	return signal_power;
+}
+
+void rtl8192c_query_rx_phy_status(union recv_frame *prframe, struct phy_stat *pphy_stat)
+{
+	PHY_STS_OFDM_8192CD_T	*pOfdm_buf;
+	PHY_STS_CCK_8192CD_T	*pCck_buf;
+	u8	i, max_spatial_stream, evm;
+	s8	rx_pwr[4], rx_pwr_all = 0;
+	u8	pwdb_all;
+	u32	rssi,total_rssi=0;
+	u8 	bcck_rate=0, rf_rx_num = 0, cck_highpwr = 0;
+	_adapter				*padapter = prframe->u.hdr.adapter;
+	struct rx_pkt_attrib	*pattrib = &prframe->u.hdr.attrib;
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
+	struct dm_priv		*pdmpriv = &pHalData->dmpriv;
+	u8	tmp_rxsnr;
+	s8	rx_snrX;
+
+#ifdef CONFIG_HW_ANTENNA_DIVERSITY
+	PHY_RX_DRIVER_INFO_8192CD *pDrvInfo = ((PHY_RX_DRIVER_INFO_8192CD *)pphy_stat);
+	u8 	bant1_sel = (pDrvInfo->ANTSEL == 1)?_TRUE:_FALSE;	
+#endif
+
+	// Record it for next packet processing
+	bcck_rate=(pattrib->mcs_rate<=3? 1:0);
+
+	if(bcck_rate) //CCK
+	{
+		u8 report;
+#ifdef CONFIG_HW_ANTENNA_DIVERSITY		
+		if(bant1_sel == _TRUE)
+			pHalData->CCK_Ant1_Cnt++;
+		else
+			pHalData->CCK_Ant2_Cnt++;
+#endif		
+
+		// CCK Driver info Structure is not the same as OFDM packet.
+		pCck_buf = (PHY_STS_CCK_8192CD_T *)pphy_stat;
+		//Adapter->RxStats.NumQryPhyStatusCCK++;
+
+		//
+		// (1)Hardware does not provide RSSI for CCK
+		// (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
+		//
+
+		if(padapter->pwrctrlpriv.rf_pwrstate == rf_on)
+			cck_highpwr = (u8)pHalData->bCckHighPower;
+		else
+			cck_highpwr = _FALSE;
+
+		if(!cck_highpwr)
+		{
+			report = pCck_buf->cck_agc_rpt&0xc0;
+			report = report>>6;
+			switch(report)
+			{
+				// 03312009 modified by cosa
+				// Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion
+				// Note: different RF with the different RNA gain.
+				case 0x3:
+					rx_pwr_all = (-46) - (pCck_buf->cck_agc_rpt & 0x3e);
+					break;
+				case 0x2:
+					rx_pwr_all = (-26) - (pCck_buf->cck_agc_rpt & 0x3e);
+					break;
+				case 0x1:
+					rx_pwr_all = (-12) - (pCck_buf->cck_agc_rpt & 0x3e);
+					break;
+				case 0x0:
+					rx_pwr_all = (16) - (pCck_buf->cck_agc_rpt & 0x3e);
+					break;
+			}
+		}
+		else
+		{
+			report = pCck_buf->cck_agc_rpt & 0x60;
+			report = report>>5;
+			switch(report)
+			{
+				case 0x3:
+					rx_pwr_all = (-46) - ((pCck_buf->cck_agc_rpt & 0x1f)<<1) ;
+					break;
+				case 0x2:
+					rx_pwr_all = (-26)- ((pCck_buf->cck_agc_rpt & 0x1f)<<1);
+					break;
+				case 0x1:
+					rx_pwr_all = (-12) - ((pCck_buf->cck_agc_rpt & 0x1f)<<1) ;
+					break;
+				case 0x0:
+					rx_pwr_all = (16) - ((pCck_buf->cck_agc_rpt & 0x1f)<<1) ;
+					break;
+			}
+		}
+
+		pwdb_all= query_rx_pwr_percentage(rx_pwr_all);
+		if(pHalData->CustomerID == RT_CID_819x_Lenovo)
+		{
+			// CCK gain is smaller than OFDM/MCS gain,
+			// so we add gain diff by experiences, the val is 6
+			pwdb_all+=6;
+			if(pwdb_all > 100)
+				pwdb_all = 100;
+			// modify the offset to make the same gain index with OFDM.
+			if(pwdb_all > 34 && pwdb_all <= 42)
+				pwdb_all -= 2;
+			else if(pwdb_all > 26 && pwdb_all <= 34)
+				pwdb_all -= 6;
+			else if(pwdb_all > 14 && pwdb_all <= 26)
+				pwdb_all -= 8;
+			else if(pwdb_all > 4 && pwdb_all <= 14)
+				pwdb_all -= 4;
+		}
+
+		pattrib->RxPWDBAll = pwdb_all;	//for DIG/rate adaptive
+		pattrib->RecvSignalPower = rx_pwr_all;	//dBM
+		padapter->recvpriv.rxpwdb = rx_pwr_all;
+		//
+		// (3) Get Signal Quality (EVM)
+		//
+		//if(bPacketMatchBSSID)
+		{
+			u8	sq;
+
+			if(pHalData->CustomerID == RT_CID_819x_Lenovo)
+			{
+				// mapping to 5 bars for vista signal strength
+				// signal quality in driver will be displayed to signal strength
+				// in vista.
+				if(pwdb_all >= 50)
+					sq = 100;
+				else if(pwdb_all >= 35 && pwdb_all < 50)
+					sq = 80;
+				else if(pwdb_all >= 22 && pwdb_all < 35)
+					sq = 60;
+				else if(pwdb_all >= 18 && pwdb_all < 22)
+					sq = 40;
+				else
+					sq = 20;
+			}
+			else
+			{
+				if(pwdb_all> 40)
+				{
+					sq = 100;
+				}
+				else
+				{
+					sq = pCck_buf->SQ_rpt;
+
+					if(pCck_buf->SQ_rpt > 64)
+						sq = 0;
+					else if (pCck_buf->SQ_rpt < 20)
+						sq= 100;
+					else
+						sq = ((64-sq) * 100) / 44;
+
+				}
+			}
+
+			pattrib->signal_qual=sq;
+			pattrib->rx_mimo_signal_qual[0]=sq;
+			pattrib->rx_mimo_signal_qual[1]=(-1);
+		}
+
+	}
+	else //OFDM/HT
+	{
+#ifdef CONFIG_HW_ANTENNA_DIVERSITY	
+		if(bant1_sel == _TRUE)
+			pHalData->OFDM_Ant1_Cnt++;
+		else
+			pHalData->OFDM_Ant2_Cnt++;
+#endif
+		pdmpriv->OFDM_Pkt_Cnt++;
+
+		pOfdm_buf = (PHY_STS_OFDM_8192CD_T *)pphy_stat;
+	
+		//
+		// (1)Get RSSI per-path
+		//
+		for(i=0; i<pHalData->NumTotalRFPath; i++)
+		{
+			// 2008/01/30 MH we will judge RF RX path now.
+			if (pHalData->bRFPathRxEnable[i])
+				rf_rx_num++;
+			//else
+				//continue;
+
+			rx_pwr[i] =  ((pOfdm_buf->trsw_gain_X[i]&0x3F)*2) - 110;
+			padapter->recvpriv.RxRssi[i] = rx_pwr[i];
+			/* Translate DBM to percentage. */
+			rssi=query_rx_pwr_percentage(rx_pwr[i]);
+			total_rssi += rssi;
+
+			RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], rssi));
+
+			//Get Rx snr value in DB
+			tmp_rxsnr =	pOfdm_buf->rxsnr_X[i];
+			rx_snrX = (s8)(tmp_rxsnr);
+			rx_snrX >>= 1;
+			padapter->recvpriv.RxSNRdB[i] =  (int)rx_snrX;
+
+			/* Record Signal Strength for next packet */
+			//if(bPacketMatchBSSID)
+			{
+				//pRfd->Status.RxMIMOSignalStrength[i] =(u1Byte) RSSI;
+
+				//The following is for lenovo signal strength in vista
+				if(pHalData->CustomerID == RT_CID_819x_Lenovo)
+				{
+					u8	sq;
+
+					if(i == 0)
+					{
+						// mapping to 5 bars for vista signal strength
+						// signal quality in driver will be displayed to signal strength
+						// in vista.
+						if(rssi >= 50)
+							sq = 100;
+						else if(rssi >= 35 && rssi < 50)
+							sq = 80;
+						else if(rssi >= 22 && rssi < 35)
+							sq = 60;
+						else if(rssi >= 18 && rssi < 22)
+							sq = 40;
+						else
+							sq = 20;
+						//DbgPrint("ofdm/mcs RSSI=%d\n", RSSI);
+						//pRfd->Status.SignalQuality = SQ;
+						//DbgPrint("ofdm/mcs SQ = %d\n", pRfd->Status.SignalQuality);
+					}
+				}
+			}
+		}
+
+
+		//
+		// (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive),average
+		//
+		rx_pwr_all = (((pOfdm_buf->pwdb_all ) >> 1 )& 0x7f) -110;//for OFDM Average RSSI
+		pwdb_all = query_rx_pwr_percentage(rx_pwr_all);
+
+		RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("PWDB_ALL=%d\n",	pwdb_all));
+
+		pattrib->RxPWDBAll = pwdb_all;	//for DIG/rate adaptive
+		pattrib->RecvSignalPower = rx_pwr_all;//dBM
+		padapter->recvpriv.rxpwdb = rx_pwr_all;
+		//
+		// (3)EVM of HT rate
+		//
+		if(pHalData->CustomerID != RT_CID_819x_Lenovo)
+		{
+			if(pattrib->rxht &&  pattrib->mcs_rate >=20 && pattrib->mcs_rate<=27)
+				max_spatial_stream = 2; //both spatial stream make sense
+			else
+				max_spatial_stream = 1; //only spatial stream 1 makes sense
+
+			for(i=0; i<max_spatial_stream; i++)
+			{
+				// Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
+				// fill most significant bit to "zero" when doing shifting operation which may change a negative
+				// value to positive one, then the dbm value (which is supposed to be negative)  is not correct anymore.
+				evm = evm_db2percentage( (pOfdm_buf->rxevm_X[i]/*/ 2*/));//dbm
+
+				RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("RXRATE=%x RXEVM=%x EVM=%s%d\n",
+					pattrib->mcs_rate, pOfdm_buf->rxevm_X[i], "%",evm));
+
+				//if(bPacketMatchBSSID)
+				{
+					if(i==0) // Fill value in RFD, Get the first spatial stream only
+					{
+						pattrib->signal_qual = (u8)(evm & 0xff);
+					}
+					pattrib->rx_mimo_signal_qual[i] = (u8)(evm & 0xff);
+				}
+			}
+
+		}
+
+		//
+		// 4. Record rx statistics for debug
+		//
+
+	}
+
+
+	//UI BSS List signal strength(in percentage), make it good looking, from 0~100.
+	//It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
+	if(bcck_rate)
+	{
+		pattrib->signal_strength=(u8)signal_scale_mapping(padapter, pwdb_all);
+	}
+	else
+	{
+		if (rf_rx_num != 0)
+		{
+			pattrib->signal_strength= (u8)(signal_scale_mapping(padapter, total_rssi/=rf_rx_num));
+		}
+	}
+	//DBG_8192C("%s,rx_pwr_all(%d),RxPWDBAll(%d)\n",__FUNCTION__,rx_pwr_all,pattrib->RxPWDBAll);
+
+}
+
+
+static void process_rssi(_adapter *padapter,union recv_frame *prframe)
+{
+	u32	last_rssi, tmp_val;
+	struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib;
+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
+	struct signal_stat * signal_stat = &padapter->recvpriv.signal_strength_data;
+#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
+
+	//DBG_8192C("process_rssi=> pattrib->rssil(%d) signal_strength(%d)\n ",pattrib->RecvSignalPower,pattrib->signal_strength);
+	//if(pRfd->Status.bPacketToSelf || pRfd->Status.bPacketBeacon)
+	{
+	
+	#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
+		if(signal_stat->update_req) {
+			signal_stat->total_num = 0;
+			signal_stat->total_val = 0;
+			signal_stat->update_req = 0;
+		}
+
+		signal_stat->total_num++;
+		signal_stat->total_val  += pattrib->signal_strength;
+		signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num;		
+	#else //CONFIG_NEW_SIGNAL_STAT_PROCESS
+	
+		//Adapter->RxStats.RssiCalculateCnt++;	//For antenna Test
+		if(padapter->recvpriv.signal_strength_data.total_num++ >= PHY_RSSI_SLID_WIN_MAX)
+		{
+			padapter->recvpriv.signal_strength_data.total_num = PHY_RSSI_SLID_WIN_MAX;
+			last_rssi = padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index];
+			padapter->recvpriv.signal_strength_data.total_val -= last_rssi;
+		}
+		padapter->recvpriv.signal_strength_data.total_val  +=pattrib->signal_strength;
+
+		padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index++] = pattrib->signal_strength;
+		if(padapter->recvpriv.signal_strength_data.index >= PHY_RSSI_SLID_WIN_MAX)
+			padapter->recvpriv.signal_strength_data.index = 0;
+
+
+		tmp_val = padapter->recvpriv.signal_strength_data.total_val/padapter->recvpriv.signal_strength_data.total_num;
+		
+		if(padapter->recvpriv.is_signal_dbg) {
+			padapter->recvpriv.signal_strength= padapter->recvpriv.signal_strength_dbg;
+			padapter->recvpriv.rssi=(s8)translate2dbm((u8)padapter->recvpriv.signal_strength_dbg);
+		} else {
+			padapter->recvpriv.signal_strength= tmp_val;
+			padapter->recvpriv.rssi=(s8)translate2dbm((u8)tmp_val);
+		}
+
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("UI RSSI = %d, ui_rssi.TotalVal = %d, ui_rssi.TotalNum = %d\n", tmp_val, padapter->recvpriv.signal_strength_data.total_val,padapter->recvpriv.signal_strength_data.total_num));
+	#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
+	}
+
+}// Process_UI_RSSI_8192C
+
+
+static void process_PWDB(_adapter *padapter, union recv_frame *prframe)
+{
+	int	UndecoratedSmoothedPWDB;
+	int	UndecoratedSmoothedCCK;
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
+	struct dm_priv		*pdmpriv = &pHalData->dmpriv;
+	struct rx_pkt_attrib	*pattrib= &prframe->u.hdr.attrib;
+	struct sta_info		*psta = prframe->u.hdr.psta;
+	u8 isCCKrate=(pattrib->mcs_rate<=3? 1:0);
+
+
+	if(psta)
+	{
+		UndecoratedSmoothedPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
+		UndecoratedSmoothedCCK = psta->rssi_stat.UndecoratedSmoothedCCK;
+	}
+	else
+	{
+		UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB;
+		UndecoratedSmoothedCCK = pdmpriv->UndecoratedSmoothedCCK;
+	}
+
+	//if(pRfd->Status.bPacketToSelf || pRfd->Status.bPacketBeacon)
+
+	if(!isCCKrate)
+	{
+		// Process OFDM RSSI
+		if(UndecoratedSmoothedPWDB < 0) // initialize
+		{
+			UndecoratedSmoothedPWDB = pattrib->RxPWDBAll;
+		}
+
+		if(pattrib->RxPWDBAll > (u32)UndecoratedSmoothedPWDB)
+		{
+			UndecoratedSmoothedPWDB =
+					( ((UndecoratedSmoothedPWDB)*(Rx_Smooth_Factor-1)) +
+					(pattrib->RxPWDBAll)) /(Rx_Smooth_Factor);
+
+			UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB + 1;
+		}
+		else
+		{
+			UndecoratedSmoothedPWDB =
+					( ((UndecoratedSmoothedPWDB)*(Rx_Smooth_Factor-1)) +
+					(pattrib->RxPWDBAll)) /(Rx_Smooth_Factor);
+		}
+	}
+	else
+	{
+		// Process CCK RSSI
+		if(UndecoratedSmoothedCCK < 0) // initialize
+		{
+			UndecoratedSmoothedCCK = pattrib->RxPWDBAll;
+		}
+
+		if(pattrib->RxPWDBAll > (u32)UndecoratedSmoothedCCK)
+		{
+			UndecoratedSmoothedCCK =
+					( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) +
+					(pattrib->RxPWDBAll)) /(Rx_Smooth_Factor);
+
+			UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1;
+		}
+		else
+		{
+			UndecoratedSmoothedCCK =
+					( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) +
+					(pattrib->RxPWDBAll)) /(Rx_Smooth_Factor);
+		}
+	}
+	
+	
+	if(psta)
+	{
+		//psta->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;//todo:
+		pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
+
+		if(pdmpriv->RSSI_Select == RSSI_OFDM){
+			psta->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
+		}
+		else if(pdmpriv->RSSI_Select == RSSI_CCK){
+			psta->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedCCK;
+		}
+		else{
+			if(UndecoratedSmoothedPWDB <0 ) 
+				pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedCCK;
+			else
+				pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
+		}
+		psta->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK;
+	}
+	else
+	{
+		//pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
+
+		if(pdmpriv->RSSI_Select == RSSI_OFDM){
+			pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
+		}
+		else if(pdmpriv->RSSI_Select == RSSI_CCK){
+			pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedCCK;
+		}
+		else	{
+			if(UndecoratedSmoothedPWDB <0 ) 
+				pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedCCK;
+			else
+				pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
+			
+		}
+		pdmpriv->UndecoratedSmoothedCCK = UndecoratedSmoothedCCK;
+	}
+
+	//UpdateRxSignalStatistics8192C(padapter, prframe);
+
+}
+
+
+static void process_link_qual(_adapter *padapter,union recv_frame *prframe)
+{
+	u32	last_evm=0, tmpVal;
+ 	struct rx_pkt_attrib *pattrib;
+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
+	struct signal_stat * signal_stat;
+#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
+
+	if(prframe == NULL || padapter==NULL){
+		return;
+	}
+
+	pattrib = &prframe->u.hdr.attrib;
+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
+	signal_stat = &padapter->recvpriv.signal_qual_data;
+#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
+
+	//DBG_8192C("process_link_qual=> pattrib->signal_qual(%d)\n ",pattrib->signal_qual);
+
+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
+	if(signal_stat->update_req) {
+		signal_stat->total_num = 0;
+		signal_stat->total_val = 0;
+		signal_stat->update_req = 0;
+	}
+
+	signal_stat->total_num++;
+	signal_stat->total_val  += pattrib->signal_qual;
+	signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num;
+	
+#else //CONFIG_NEW_SIGNAL_STAT_PROCESS
+	if(pattrib->signal_qual != 0)
+	{
+			//
+			// 1. Record the general EVM to the sliding window.
+			//
+			if(padapter->recvpriv.signal_qual_data.total_num++ >= PHY_LINKQUALITY_SLID_WIN_MAX)
+			{
+				padapter->recvpriv.signal_qual_data.total_num = PHY_LINKQUALITY_SLID_WIN_MAX;
+				last_evm = padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index];
+				padapter->recvpriv.signal_qual_data.total_val -= last_evm;
+			}
+			padapter->recvpriv.signal_qual_data.total_val += pattrib->signal_qual;
+
+			padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index++] = pattrib->signal_qual;
+			if(padapter->recvpriv.signal_qual_data.index >= PHY_LINKQUALITY_SLID_WIN_MAX)
+				padapter->recvpriv.signal_qual_data.index = 0;
+
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("Total SQ=%d  pattrib->signal_qual= %d\n", padapter->recvpriv.signal_qual_data.total_val, pattrib->signal_qual));
+
+			// <1> Showed on UI for user, in percentage.
+			tmpVal = padapter->recvpriv.signal_qual_data.total_val/padapter->recvpriv.signal_qual_data.total_num;
+			padapter->recvpriv.signal_qual=(u8)tmpVal;
+
+	}
+	else
+	{
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" pattrib->signal_qual =%d\n", pattrib->signal_qual));
+	}
+#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
+
+}// Process_UiLinkQuality8192S
+
+
+//void rtl8192c_process_phy_info(_adapter *padapter, union recv_frame *prframe)
+void rtl8192c_process_phy_info(_adapter *padapter, void *prframe)
+{
+	union recv_frame *precvframe = (union recv_frame *)prframe;
+
+#ifdef CONFIG_SW_ANTENNA_DIVERSITY
+	// If we switch to the antenna for testing, the signal strength 
+	// of the packets in this time shall not be counted into total receiving power. 
+	// This prevents error counting Rx signal strength and affecting other dynamic mechanism.
+
+	// Select the packets to do RSSI checking for antenna switching.
+	SwAntDivRSSICheck8192C(padapter, precvframe->u.hdr.attrib.RxPWDBAll);
+
+	if(GET_HAL_DATA(padapter)->RSSI_test == _TRUE)
+		return;
+#endif
+	//
+	// Check RSSI
+	//
+	process_rssi(padapter, precvframe);
+	//
+	// Check PWDB.
+	//
+	process_PWDB(padapter, precvframe); 
+	//
+	// Check EVM
+	//
+	process_link_qual(padapter,  precvframe);
+
+}
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_sreset.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_sreset.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_sreset.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/rtl8192c_sreset.c	2017-09-23 03:42:49.926675346 +0800
@@ -0,0 +1,293 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#include <rtl8192c_sreset.h>
+#include <rtl8192c_hal.h>
+#ifdef DBG_CONFIG_ERROR_DETECT
+extern void rtw_cancel_all_timer(_adapter *padapter);
+
+void rtl8192c_sreset_init_value(_adapter *padapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);	
+	struct sreset_priv *psrtpriv = &pHalData->srestpriv;
+	
+	_rtw_mutex_init(&psrtpriv->silentreset_mutex );
+	psrtpriv->silent_reset_inprogress = _FALSE;
+	psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
+	psrtpriv->last_tx_time =0;
+	psrtpriv->last_tx_complete_time =0;	
+}
+void rtl8192c_sreset_reset_value(_adapter *padapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);	
+	struct sreset_priv *psrtpriv = &pHalData->srestpriv;	
+	psrtpriv->silent_reset_inprogress = _FALSE;
+	psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
+	psrtpriv->last_tx_time =0;
+	psrtpriv->last_tx_complete_time =0;
+}
+	
+static void _restore_security_setting(_adapter *padapter)
+{
+	u8 EntryId = 0;
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;	
+	struct sta_priv * pstapriv = &padapter->stapriv;
+	struct sta_info *psta;
+	struct security_priv* psecuritypriv=&(padapter->securitypriv);	
+	struct mlme_ext_info	*pmlmeinfo = &padapter->mlmeextpriv.mlmext_info;
+
+	(pmlmeinfo->auth_algo == dot11AuthAlgrthm_8021X)
+		? rtw_write8(padapter, REG_SECCFG, 0xcc)
+		: rtw_write8(padapter, REG_SECCFG, 0xcf);
+	
+	if (	( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP40_ ) ||
+		( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP104_ ))		
+	{
+
+		for(EntryId=0; EntryId<4; EntryId++)
+		{
+			if(EntryId == psecuritypriv->dot11PrivacyKeyIndex)
+				rtw_set_key(padapter,&padapter->securitypriv, EntryId, 1);
+			else
+				rtw_set_key(padapter,&padapter->securitypriv, EntryId, 0);
+		}	
+
+	}
+	else if((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) ||
+		(padapter->securitypriv.dot11PrivacyAlgrthm == _AES_))
+	{
+		psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv));				
+		if (psta == NULL) {
+			//DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n"));
+		}
+		else
+		{			
+			//pairwise key
+			rtw_setstakey_cmd(padapter, (unsigned char *)psta, _TRUE);
+			//group key			
+			rtw_set_key(padapter,&padapter->securitypriv,padapter->securitypriv.dot118021XGrpKeyid, 0);
+		}
+	}
+	
+}
+
+static void _restore_network_status(_adapter *padapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX	*pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network));
+	unsigned short	caps;
+	u8	join_type;
+#if 1
+
+	//=======================================================
+	// reset related register of Beacon control 
+	
+	//set MSR to nolink		
+	Set_NETYPE0_MSR(padapter, _HW_STATE_NOLINK_);		
+	// reject all data frame
+	rtw_write16(padapter, REG_RXFLTMAP2,0x00);		
+	//reset TSF
+	rtw_write8(padapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1)));
+
+	//disable update TSF
+	if(IS_NORMAL_CHIP(pHalData->VersionID))
+		rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4));		
+	else	
+		rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4)|BIT(5));					
+
+	//=======================================================
+	rtw_joinbss_reset(padapter);
+	set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
+	//pmlmeinfo->assoc_AP_vendor = maxAP;
+	
+	if (padapter->registrypriv.wifi_spec) {
+		// for WiFi test, follow WMM test plan spec
+		rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002F431C);
+		rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005E541C);
+		rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x0000A525);
+		rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A549);
+	
+                // for WiFi test, mixed mode with intel STA under bg mode throughput issue
+	        if (padapter->mlmepriv.htpriv.ht_option == 0)
+		     rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x00004320);
+
+	} else {
+		rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002F3217);
+		rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005E4317);
+		rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x00105320);
+		rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A444);
+	}
+	
+	//disable dynamic functions, such as high power, DIG
+	//Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE);	
+#endif
+
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress);
+	join_type = 0;
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
+
+	Set_NETYPE0_MSR(padapter, (pmlmeinfo->state & 0x3));
+
+	mlmeext_joinbss_event_callback(padapter, 1);
+	//restore Sequence No.
+	rtw_write8(padapter,0x4dc,padapter->xmitpriv.nqos_ssn);	
+}
+void rtl8192c_silentreset_for_specific_platform(_adapter *padapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);	
+	struct sreset_priv *psrtpriv = &pHalData->srestpriv;
+	
+	struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;		
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	struct xmit_priv	*pxmitpriv = &padapter->xmitpriv;	
+	_irqL irqL;
+
+#ifdef DBG_CONFIG_ERROR_RESET
+
+	DBG_871X("%s\n", __FUNCTION__);
+
+	psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
+
+	if (!netif_queue_stopped(padapter->pnetdev))
+		netif_stop_queue(padapter->pnetdev);
+		
+	rtw_cancel_all_timer(padapter);	
+	tasklet_kill(&pxmitpriv->xmit_tasklet);	
+
+	_enter_critical_mutex(&psrtpriv->silentreset_mutex, &irqL);
+	psrtpriv->silent_reset_inprogress = _TRUE;
+	pwrpriv->change_rfpwrstate = rf_off;	
+#ifdef CONFIG_IPS
+	ips_enter(padapter);								
+	ips_leave(padapter);
+#endif
+	if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
+	{
+		_restore_network_status(padapter);
+		_restore_security_setting(padapter);	
+	}
+	
+	_clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY | _FW_UNDER_LINKING);
+	
+	psrtpriv->silent_reset_inprogress = _FALSE;
+	_exit_critical_mutex(&psrtpriv->silentreset_mutex, &irqL);
+		
+	tasklet_hi_schedule(&pxmitpriv->xmit_tasklet);
+	_set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000);	
+				
+	if (netif_queue_stopped(padapter->pnetdev))
+		netif_wake_queue(padapter->pnetdev);
+#endif
+}
+
+void rtl8192c_sreset_xmit_status_check(_adapter *padapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);	
+	struct sreset_priv *psrtpriv = &pHalData->srestpriv;	
+	
+	unsigned long current_time;
+	struct xmit_priv	*pxmitpriv = &padapter->xmitpriv;
+	unsigned int diff_time;
+	u32 txdma_status;
+	if( (txdma_status=rtw_read32(padapter, REG_TXDMA_STATUS)) !=0x00){
+		DBG_871X("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status);
+		rtl8192c_silentreset_for_specific_platform(padapter);						
+	}
+	
+	//total xmit irp = 4
+	//DBG_8192C("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__FUNCTION__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt);
+	//if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1)
+	current_time = rtw_get_current_time();
+	if(0==pxmitpriv->free_xmitbuf_cnt)
+	{
+		diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_time);
+			
+		if(diff_time > 2000){
+			if(psrtpriv->last_tx_complete_time==0){
+				psrtpriv->last_tx_complete_time = current_time;
+			}
+			else{
+				diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_complete_time);
+				if(diff_time > 4000){
+					//padapter->Wifi_Error_Status = WIFI_TX_HANG;
+					DBG_8192C("%s tx hang\n", __FUNCTION__);
+					rtl8192c_silentreset_for_specific_platform(padapter);	
+				}
+			}
+		}	
+	}	
+}
+void rtl8192c_sreset_linked_status_check(_adapter *padapter)
+{
+	u32 regc50,regc58,reg824,reg800;
+	regc50 = rtw_read32(padapter,0xc50);
+	regc58 = rtw_read32(padapter,0xc58);
+	reg824 = rtw_read32(padapter,0x824);
+	reg800 = rtw_read32(padapter,0x800);	
+	if(	((regc50&0xFFFFFF00)!= 0x69543400)||
+		((regc58&0xFFFFFF00)!= 0x69543400)||
+		(((reg824&0xFFFFFF00)!= 0x00390000)&&(((reg824&0xFFFFFF00)!= 0x80390000)))||
+		( ((reg800&0xFFFFFF00)!= 0x03040000)&&((reg800&0xFFFFFF00)!= 0x83040000)))
+	{
+		DBG_8192C("%s regc50:0x%08x, regc58:0x%08x, reg824:0x%08x, reg800:0x%08x,\n", __FUNCTION__,
+			regc50, regc58, reg824, reg800);
+		rtl8192c_silentreset_for_specific_platform(padapter);	
+	}
+}
+
+#ifdef DBG_CONFIG_ERROR_DETECT
+u8 rtl8192c_sreset_get_wifi_status(_adapter *padapter)	
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);	
+	struct sreset_priv *psrtpriv = &pHalData->srestpriv;	
+	
+	u8 status = WIFI_STATUS_SUCCESS;
+	u32 val32 = 0;
+	_irqL irqL;	
+	if(psrtpriv->silent_reset_inprogress == _TRUE)
+        {
+		return status;
+	}
+	val32 =rtw_read32(padapter,REG_TXDMA_STATUS);
+	if(val32==0xeaeaeaea){
+		psrtpriv->Wifi_Error_Status = WIFI_IF_NOT_EXIST;
+	}
+	else if(val32!=0){
+		DBG_8192C("txdmastatu(%x)\n",val32);
+		psrtpriv->Wifi_Error_Status = WIFI_MAC_TXDMA_ERROR;
+	}	
+
+	if(WIFI_STATUS_SUCCESS !=psrtpriv->Wifi_Error_Status)
+	{
+		DBG_8192C("==>%s error_status(0x%x) \n",__FUNCTION__,psrtpriv->Wifi_Error_Status);
+		status = (psrtpriv->Wifi_Error_Status &( ~(USB_READ_PORT_FAIL|USB_WRITE_PORT_FAIL)));
+	}
+	DBG_8192C("==> %s wifi_status(0x%x)\n",__FUNCTION__,status);
+
+	//status restore 
+	psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
+
+	return status;
+}
+#endif
+
+#endif
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/Hal8192CUHWImg.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/Hal8192CUHWImg.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/Hal8192CUHWImg.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/Hal8192CUHWImg.c	2017-09-23 03:42:49.942675297 +0800
@@ -0,0 +1,9714 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+/*Created on  2011/ 6/15,  5:45*/
+
+#include <basic_types.h>
+#include "Hal8192CUHWImg.h"
+
+#ifdef CONFIG_BT_COEXISTENCE
+// =================== v79 TSMC COMMON 2011-10-06 =======================
+u8 Rtl8192CUFwTSMCImgArray[TSMCImgArrayLength] = {
+0xc1,0x88,0x02,0x00,0x4f,0x00,0x00,0x00,0x0a,0x06,0x18,0x02,0x58,0x3f,0x00,0x00,
+0x61,0x80,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x02,0x43,0xba,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x02,0x5a,0x45,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x02,0x5f,0xfb,0x00,0x00,0x00,0x00,0x00,0xa1,0xdf,0x00,0x00,0x00,
+0x05,0x04,0x03,0x02,0x00,0x03,0x06,0x05,0x04,0x03,0x00,0x04,0x06,0x05,0x04,0x02,
+0x00,0x04,0x08,0x07,0x06,0x04,0x00,0x06,0x0a,0x09,0x08,0x06,0x00,0x08,0x0a,0x09,
+0x08,0x04,0x00,0x08,0x0a,0x09,0x08,0x02,0x00,0x08,0x0a,0x09,0x08,0x00,0x00,0x08,
+0x12,0x11,0x10,0x08,0x00,0x10,0x1a,0x19,0x18,0x10,0x00,0x18,0x22,0x21,0x20,0x18,
+0x00,0x20,0x22,0x21,0x20,0x10,0x00,0x20,0x22,0x21,0x20,0x08,0x00,0x20,0x22,0x21,
+0x1c,0x08,0x00,0x20,0x22,0x21,0x14,0x08,0x00,0x20,0x22,0x20,0x18,0x08,0x00,0x20,
+0x31,0x30,0x20,0x10,0x00,0x30,0x31,0x30,0x18,0x00,0x00,0x30,0x31,0x2f,0x10,0x10,
+0x00,0x30,0x31,0x2c,0x10,0x10,0x00,0x30,0x31,0x28,0x10,0x00,0x00,0x30,0x31,0x20,
+0x10,0x00,0x00,0x30,0x31,0x10,0x10,0x00,0x00,0x30,0x04,0x04,0x04,0x05,0x04,0x04,
+0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04,
+0x05,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x05,0x05,0x05,0x05,0x06,0x07,0x0a,0x0b,
+0x0d,0x10,0x04,0x05,0x05,0x06,0x06,0x09,0x0c,0x11,0x08,0x08,0x09,0x09,0x0a,0x0c,
+0x10,0x11,0x04,0x04,0x04,0x05,0x04,0x04,0x05,0x07,0x07,0x07,0x08,0x0a,0x04,0x04,
+0x04,0x04,0x06,0x0a,0x0b,0x0d,0x05,0x05,0x07,0x07,0x08,0x0b,0x0d,0x0f,0x04,0x04,
+0x04,0x05,0x07,0x07,0x09,0x09,0x0c,0x0e,0x10,0x12,0x04,0x04,0x05,0x05,0x06,0x0a,
+0x11,0x13,0x09,0x09,0x09,0x09,0x0c,0x0e,0x11,0x13,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x24,0x26,0x2a,0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a,0x00,0x00,
+0x00,0x1f,0x23,0x28,0x2a,0x2c,0x00,0x04,0x00,0x04,0x00,0x08,0x00,0x10,0x00,0x18,
+0x00,0x24,0x00,0x30,0x00,0x48,0x00,0x60,0x00,0x90,0x00,0xc0,0x00,0xd8,0x00,0x50,
+0x00,0x78,0x00,0xa0,0x00,0xc8,0x01,0x40,0x01,0x90,0x01,0xe0,0x02,0x30,0x01,0x2c,
+0x01,0x40,0x01,0xe0,0x02,0xd0,0x03,0xe8,0x04,0xb0,0x06,0x40,0x07,0xd0,0x00,0x02,
+0x00,0x02,0x00,0x04,0x00,0x08,0x00,0x0c,0x00,0x12,0x00,0x18,0x00,0x24,0x00,0x30,
+0x00,0x48,0x00,0x60,0x00,0x6c,0x00,0x28,0x00,0x3c,0x00,0x50,0x00,0x64,0x00,0xa0,
+0x00,0xc8,0x00,0xf0,0x01,0x18,0x00,0x64,0x00,0xa0,0x00,0xf0,0x01,0x68,0x01,0xf4,
+0x02,0x58,0x03,0x20,0x03,0xe8,0x02,0x02,0x02,0x02,0x02,0x02,0x03,0x03,0x04,0x04,
+0x05,0x07,0x04,0x04,0x07,0x0a,0x0a,0x0c,0x0c,0x12,0x05,0x07,0x07,0x08,0x0b,0x12,
+0x24,0x3c,0x01,0x01,0x01,0x01,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x01,0x02,
+0x03,0x04,0x05,0x06,0x07,0x08,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x20,0x1e,
+0x1c,0x18,0x10,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0xbb,0x01,0x0c,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0x22,0x50,
+0x06,0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,0x25,0x82,0xf8,0xe2,0x22,
+0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe4,0x93,0x22,0xbb,0x01,0x06,
+0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8,
+0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22,
+0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2,
+0x22,0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0,0xc5,0xf0,0xf8,0xe5,0x82,0x15,0x82,0x70,
+0x02,0x15,0x83,0xe0,0x38,0xf0,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a,0x83,0xe0,0xf5,
+0xf0,0xa3,0xe0,0x22,0x50,0x06,0x87,0xf0,0x09,0xe7,0x19,0x22,0xbb,0xfe,0x07,0xe3,
+0xf5,0xf0,0x09,0xe3,0x19,0x22,0x89,0x82,0x8a,0x83,0xe4,0x93,0xf5,0xf0,0x74,0x01,
+0x93,0x22,0xbb,0x01,0x10,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,
+0xf5,0xf0,0xa3,0xe0,0x22,0x50,0x09,0xe9,0x25,0x82,0xf8,0x86,0xf0,0x08,0xe6,0x22,
+0xbb,0xfe,0x0a,0xe9,0x25,0x82,0xf8,0xe2,0xf5,0xf0,0x08,0xe2,0x22,0xe5,0x83,0x2a,
+0xf5,0x83,0xe9,0x93,0xf5,0xf0,0xa3,0xe9,0x93,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a,
+0x83,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x06,0xf7,0x09,0xa7,0xf0,0x19,0x22,0xbb,
+0xfe,0x06,0xf3,0xe5,0xf0,0x09,0xf3,0x19,0x22,0xf8,0xbb,0x01,0x11,0xe5,0x82,0x29,
+0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x09,
+0xe9,0x25,0x82,0xc8,0xf6,0x08,0xa6,0xf0,0x22,0xbb,0xfe,0x09,0xe9,0x25,0x82,0xc8,
+0xf2,0xe5,0xf0,0x08,0xf2,0x22,0xef,0x4b,0xff,0xee,0x4a,0xfe,0xed,0x49,0xfd,0xec,
+0x48,0xfc,0x22,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0xa4,
+0x25,0x82,0xf5,0x82,0xe5,0xf0,0x35,0x83,0xf5,0x83,0x22,0xe0,0xfb,0xa3,0xe0,0xfa,
+0xa3,0xe0,0xf9,0x22,0xf8,0xe0,0xfb,0xa3,0xa3,0xe0,0xf9,0x25,0xf0,0xf0,0xe5,0x82,
+0x15,0x82,0x70,0x02,0x15,0x83,0xe0,0xfa,0x38,0xf0,0x22,0xeb,0xf0,0xa3,0xea,0xf0,
+0xa3,0xe9,0xf0,0x22,0xd0,0x83,0xd0,0x82,0xf8,0xe4,0x93,0x70,0x12,0x74,0x01,0x93,
+0x70,0x0d,0xa3,0xa3,0x93,0xf8,0x74,0x01,0x93,0xf5,0x82,0x88,0x83,0xe4,0x73,0x74,
+0x02,0x93,0x68,0x60,0xef,0xa3,0xa3,0xa3,0x80,0xdf,0x02,0x43,0xf8,0x02,0x50,0xa9,
+0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0x40,0x03,0xf6,0x80,0x01,0xf2,0x08,0xdf,0xf4,
+0x80,0x29,0xe4,0x93,0xa3,0xf8,0x54,0x07,0x24,0x0c,0xc8,0xc3,0x33,0xc4,0x54,0x0f,
+0x44,0x20,0xc8,0x83,0x40,0x04,0xf4,0x56,0x80,0x01,0x46,0xf6,0xdf,0xe4,0x80,0x0b,
+0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,0x90,0x44,0x3d,0xe4,0x7e,0x01,0x93,0x60,
+0xbc,0xa3,0xff,0x54,0x3f,0x30,0xe5,0x09,0x54,0x1f,0xfe,0xe4,0x93,0xa3,0x60,0x01,
+0x0e,0xcf,0x54,0xc0,0x25,0xe0,0x60,0xa8,0x40,0xb8,0xe4,0x93,0xa3,0xfa,0xe4,0x93,
+0xa3,0xf8,0xe4,0x93,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xf0,0xa3,0xc8,
+0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xdf,0xe9,0xde,0xe7,0x80,0xbe,0x41,0x9e,0x66,
+0x00,0x41,0x9e,0xae,0x00,0x41,0x9e,0x4d,0x80,0x41,0x9e,0x4e,0x80,0x41,0x9e,0xb0,
+0x00,0x00,0xf0,0x90,0x9e,0x57,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x54,
+0x7e,0x01,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x88,0xeb,0xf0,0xa3,0xe0,
+0xfb,0xa3,0xe0,0xf5,0x44,0xe4,0xf5,0x45,0x12,0x35,0xab,0xd0,0xd0,0x92,0xaf,0x22,
+0x90,0x01,0x5f,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x08,0xf0,0xe4,0x90,0x9e,0x89,0xf0,
+0x90,0x9e,0x55,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91,
+0x62,0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,0x90,0x9e,0x5c,
+0x14,0xf0,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0xc3,0x94,0x0c,0x50,0x02,0xf1,0x16,0x22,
+0x8f,0x82,0x8e,0x83,0xa3,0xa3,0xa3,0xe4,0xf0,0x22,0xe4,0xf5,0x22,0x7f,0x60,0x7e,
+0x01,0x80,0xed,0x90,0x9e,0x60,0xe0,0xff,0x7d,0x01,0xe1,0x1a,0xb1,0xb1,0xbf,0x01,
+0x0f,0x90,0x9e,0x68,0xe0,0xff,0xe4,0xfd,0xf1,0xfe,0x90,0x04,0x1f,0x74,0x20,0xf0,
+0x22,0x90,0x01,0xca,0xe5,0x25,0xf0,0xef,0x60,0x03,0x12,0x4f,0x2a,0x22,0x22,0x22,
+0x22,0x22,0x00,0x02,0x60,0x8d,0x02,0x60,0x94,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,
+0x8b,0x1b,0x8a,0x1c,0x89,0x1d,0x90,0x9e,0x8b,0x71,0x8b,0xab,0x1e,0xaa,0x1f,0xa9,
+0x20,0x90,0x9e,0x8e,0x71,0x8b,0xaf,0x21,0x15,0x21,0xef,0x60,0x1b,0x90,0x9e,0x8e,
+0xe4,0x75,0xf0,0x01,0x71,0x74,0x12,0x29,0xd9,0xff,0x90,0x9e,0x8b,0xe4,0x75,0xf0,
+0x01,0x71,0x74,0xef,0x51,0x4d,0x80,0xde,0xab,0x1b,0xaa,0x1c,0xa9,0x1d,0xd0,0xd0,
+0x92,0xaf,0x22,0x90,0x06,0xa9,0xe0,0xf5,0x50,0x54,0xc0,0x70,0x0d,0x90,0x9e,0x63,
+0xe0,0x54,0xfe,0xf0,0xe0,0x54,0xfd,0xf0,0x91,0xd3,0xe5,0x50,0x30,0xe6,0x17,0x90,
+0x9e,0x63,0xe0,0x44,0x01,0xf0,0x90,0x9e,0x61,0xe0,0x64,0x02,0x60,0x04,0x91,0xdc,
+0x80,0x0b,0x91,0x80,0x80,0x07,0x90,0x9e,0x63,0xe0,0x54,0xfe,0xf0,0xe5,0x50,0x90,
+0x9e,0x63,0x30,0xe7,0x17,0xe0,0x44,0x02,0xf0,0xe4,0x90,0x9e,0x89,0x91,0x52,0x90,
+0x01,0x57,0x74,0x05,0xf0,0x90,0x9e,0x62,0x74,0x01,0xf0,0x22,0xe0,0x54,0xfd,0xf0,
+0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x04,0x1d,0xe0,0x60,0x1a,0x90,0x05,
+0x22,0xe0,0x54,0x90,0x60,0x07,0x90,0x01,0xc6,0xe0,0x44,0x40,0xf0,0x90,0x01,0xc7,
+0xe0,0x30,0xe1,0xe4,0x7f,0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0xc0,
+0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,
+0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74,
+0xdf,0xf0,0x74,0x45,0xa3,0xf0,0x53,0x91,0xdf,0x90,0x01,0x3c,0xe0,0x55,0x30,0xf5,
+0x34,0xa3,0xe0,0x55,0x31,0xf5,0x35,0xa3,0xe0,0x55,0x32,0xf5,0x36,0xa3,0xe0,0x55,
+0x33,0xf5,0x37,0xe5,0x34,0x30,0xe0,0x06,0x90,0x01,0x3c,0x74,0x01,0xf0,0xe5,0x34,
+0x30,0xe1,0x08,0x90,0x01,0x3c,0x74,0x02,0xf0,0xf1,0xbc,0xe5,0x34,0x30,0xe2,0x38,
+0x90,0x01,0x3c,0x74,0x04,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe0,0x24,0x90,0x9e,0x89,
+0xe4,0xf0,0x90,0x9e,0x55,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x58,0x7e,
+0x01,0x91,0x62,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x80,
+0x07,0x90,0x9e,0x5d,0xe4,0xf0,0x91,0xd3,0xe5,0x34,0x30,0xe3,0x38,0x90,0x01,0x3c,
+0x74,0x08,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe1,0x24,0x90,0x9e,0x89,0xe4,0xf0,0x90,
+0x9e,0x55,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91,0x62,
+0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,0x80,0x07,0x90,0x9e,
+0x5c,0xe4,0xf0,0x91,0xd3,0xe5,0x34,0x30,0xe4,0x09,0x90,0x01,0x3c,0x74,0x10,0xf0,
+0x12,0x4d,0xe2,0xe5,0x34,0x30,0xe5,0x09,0x90,0x01,0x3c,0x74,0x20,0xf0,0x12,0x4e,
+0x25,0xe5,0x35,0x30,0xe0,0x1a,0x90,0x01,0x3d,0x74,0x01,0xf0,0x90,0x01,0x2f,0xe0,
+0x44,0x7f,0xf0,0x90,0x00,0x83,0xe0,0x90,0x9e,0x60,0xf0,0x12,0x64,0xa1,0x91,0xd3,
+0x74,0xdf,0x04,0x90,0x01,0xc4,0xf0,0x74,0x45,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,
+0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,
+0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x7d,0x01,0x7f,0x0c,0x8f,0x71,0x8d,0x72,0xe5,0x71,
+0x54,0x0f,0xff,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0x6f,0x60,0x72,0xe5,0x71,0x30,0xe2,
+0x2b,0x90,0x9e,0x5e,0xe0,0x20,0xe2,0x05,0x7f,0x01,0x12,0x63,0x92,0x90,0x9e,0x5e,
+0xe0,0x30,0xe3,0x07,0xe5,0x71,0x20,0xe3,0x02,0x80,0x54,0x90,0x9e,0x5e,0xe0,0x20,
+0xe3,0x4c,0xe5,0x71,0x30,0xe3,0x47,0xaf,0x72,0x02,0x63,0x2e,0x90,0x9e,0x5e,0xe0,
+0x54,0x0f,0xff,0xbf,0x0c,0x0d,0xe5,0x71,0x20,0xe3,0x08,0x12,0x5e,0xf1,0xef,0x60,
+0x2d,0xf1,0x9f,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0xff,0xbf,0x04,0x0e,0xe5,0x71,0x20,
+0xe2,0x09,0x12,0x62,0x50,0xef,0x60,0x16,0x12,0x48,0xaa,0x90,0x9e,0x5e,0xe0,0x54,
+0x0f,0xff,0xbf,0x02,0x09,0x12,0x62,0xbb,0xef,0x60,0x03,0x12,0x64,0x87,0x22,0x90,
+0x06,0x04,0xe0,0x44,0x40,0xf0,0xe5,0x73,0xb4,0x01,0x05,0x7f,0x01,0x12,0x63,0x4d,
+0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x04,0xf0,0x22,0x90,0x9e,0x62,0xe0,
+0x60,0x0e,0xe4,0xf0,0xa3,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0x07,0x70,0x2b,0x80,0x27,
+0x90,0x9e,0x51,0xe0,0x04,0xf0,0x90,0x9e,0x63,0xe0,0x54,0xef,0xf0,0x90,0x9e,0x56,
+0xe0,0xff,0x90,0x9e,0x51,0xe0,0xd3,0x9f,0x40,0x0d,0xe5,0x73,0xb4,0x01,0x0a,0xa3,
+0xe0,0x70,0x06,0xe0,0x04,0xf0,0x22,0x91,0xd3,0x22,0xe0,0xff,0x7d,0x01,0x90,0x9e,
+0x9c,0xef,0xf0,0xa3,0xed,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xe5,0x74,0x60,0x04,0xe4,
+0xff,0x11,0x8f,0x90,0x9e,0x9c,0xe0,0x30,0xe0,0x09,0x90,0x9e,0x9e,0xe4,0xf0,0xa3,
+0x74,0x80,0xf0,0x90,0x9e,0x9c,0xe0,0xff,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x90,0x04,
+0x25,0xef,0xf0,0x90,0x9e,0x9d,0xe0,0x60,0x1f,0xa3,0xa3,0xe0,0xff,0x24,0x0f,0xf5,
+0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x74,0x10,0x2f,0xf5,0x82,0xe4,
+0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x90,0x9e,0x9e,0xa3,0xe0,0xff,0xfd,0x24,
+0x08,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe4,0xf0,0x74,0x09,0x2d,0xf5,0x82,0xe4,
+0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,
+0xf5,0x83,0xe0,0x54,0xf7,0xf0,0x90,0x9e,0x9e,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0xef,
+0x60,0x0b,0x90,0x9e,0x77,0xe0,0xb4,0x01,0x10,0xe4,0xff,0x80,0x09,0x90,0x9e,0x77,
+0xe0,0xb4,0x01,0x05,0x7f,0x01,0x12,0x77,0x66,0x22,0x90,0x01,0x37,0x74,0x02,0xf0,
+0x90,0x05,0x22,0x74,0xff,0xf0,0x12,0x77,0x1c,0xef,0x70,0x06,0x90,0x01,0xc8,0x74,
+0xfd,0xf0,0x7d,0x02,0x7f,0x03,0x12,0x36,0xe6,0xe5,0x74,0x60,0x04,0x7f,0x01,0x11,
+0x8f,0x11,0xdf,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x02,0xf0,0x22,0x7f,
+0x78,0x7e,0x08,0x12,0x27,0xde,0x90,0x9d,0xff,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,
+0x12,0x27,0xde,0x90,0x9e,0x03,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,0x27,0xde,
+0x90,0x9e,0x07,0x12,0x2a,0x7f,0x90,0x9e,0x77,0xe0,0x90,0x9d,0xff,0xb4,0x01,0x0d,
+0x12,0x43,0x53,0xef,0x54,0xc7,0xff,0xed,0x54,0xc7,0xfd,0x80,0x07,0x12,0x43,0x53,
+0xef,0x54,0xc7,0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x08,0x12,
+0x2f,0xd9,0x90,0x9e,0x03,0x12,0x43,0x53,0xef,0x54,0x0f,0xff,0xec,0x90,0x80,0x85,
+0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x9e,0x07,0x12,0x43,0x53,
+0xef,0x44,0x02,0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,
+0x2f,0xd9,0x7f,0x70,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9e,0x0b,0x12,0x2a,0x7f,0x90,
+0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa0,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,
+0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe4,0xfd,0xff,0x12,0x34,0x81,
+0x90,0x9e,0x77,0xe0,0xb4,0x01,0x11,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x00,0x00,
+0x00,0xe4,0xfd,0x7f,0x01,0x12,0x34,0x81,0x90,0x00,0x11,0xe0,0x54,0xf6,0xf0,0x80,
+0x08,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,
+0x7f,0x10,0xdf,0xfe,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,
+0x90,0x9e,0xad,0xed,0xf0,0x90,0x9e,0xac,0xef,0xf0,0xd3,0x94,0x07,0x50,0x63,0xe0,
+0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,
+0x47,0xe0,0x5f,0xf0,0x31,0xb9,0x90,0x9e,0xac,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,
+0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x46,0xe0,0x4f,0xf0,0x31,0xb9,0x90,
+0x9e,0xad,0xe0,0x60,0x16,0x90,0x9e,0xac,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,
+0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x45,0x80,0x66,0x90,0x9e,0xac,0xe0,0xff,
+0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x45,
+0x80,0x6b,0x90,0x9e,0xac,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,
+0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0x31,0xb1,0x90,0x9e,0xac,0xe0,0xff,
+0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x43,0xe0,
+0x4f,0xf0,0x31,0xb9,0x90,0x9e,0xad,0xe0,0x60,0x1b,0x90,0x9e,0xac,0xe0,0xff,0x74,
+0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,
+0x42,0xe0,0x4f,0x80,0x1a,0x90,0x9e,0xac,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,
+0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x42,0xe0,0x5f,0xf0,
+0x31,0xb9,0xd0,0xd0,0x92,0xaf,0x22,0xf0,0x90,0x00,0x45,0xe0,0x54,0xfe,0xfd,0x7f,
+0x45,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x8f,0x82,0x75,0x83,0x00,0xed,0xf0,0x31,
+0xb9,0xd0,0xd0,0x92,0xaf,0x22,0xef,0x14,0x60,0x30,0x14,0x60,0x66,0x24,0x02,0x60,
+0x02,0x61,0x7d,0x90,0x9e,0x1a,0x74,0x02,0xf0,0x90,0x00,0x48,0xe0,0x44,0x0c,0xfd,
+0x7f,0x48,0x51,0xc1,0x90,0x00,0x47,0xe0,0x44,0x08,0xfd,0x7f,0x47,0x51,0xc1,0x90,
+0x00,0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45,0x80,0x71,0xe4,0x90,0x9e,0x1a,0xf0,0x90,
+0x9e,0x16,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,
+0x2f,0xd9,0x90,0x00,0x45,0xe0,0x44,0xef,0xfd,0x7f,0x45,0x51,0xc1,0x90,0x00,0x45,
+0xe0,0x54,0xef,0xfd,0x7f,0x45,0x51,0xc1,0x90,0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f,
+0x46,0x80,0x38,0x90,0x9e,0x1a,0x74,0x01,0xf0,0x90,0x9e,0x20,0x12,0x43,0x53,0x90,
+0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x00,0x45,0xe0,
+0x44,0x20,0xfd,0x7f,0x45,0x51,0xc1,0x90,0x00,0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45,
+0x51,0xc1,0x90,0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f,0x46,0x51,0xc1,0x22,0x90,0x00,
+0x02,0x12,0x42,0x20,0x90,0x9e,0x1c,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0x25,0xe0,
+0x25,0xe0,0x90,0x9e,0x1b,0xf0,0x12,0x29,0xd9,0x25,0xe0,0x25,0xe0,0x90,0x9e,0x1f,
+0xf0,0x90,0x05,0x60,0xe0,0x90,0x9e,0x2a,0xf0,0x90,0x05,0x61,0xe0,0x90,0x9e,0x2b,
+0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x2c,0xf0,0x90,0x05,0x63,0xe0,0x90,0x9e,0x2d,
+0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x90,0x9e,0x1b,0xe0,0xff,
+0xd1,0xd8,0x90,0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x90,0x9e,0x1c,0xe0,0x70,0x02,
+0x81,0x84,0x90,0x9e,0x1b,0xe0,0x70,0x02,0x81,0x84,0x90,0x9e,0x1f,0xe0,0x70,0x02,
+0x81,0x84,0xa2,0xaf,0xe4,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x90,0x9e,0x2e,0x74,
+0x01,0xf0,0x90,0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x51,0xb8,0x90,0x00,0x46,0xe0,
+0x44,0x01,0xfd,0x7f,0x46,0x51,0xc1,0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x20,
+0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,
+0x80,0x06,0x90,0x05,0x22,0x74,0x7f,0xf0,0x90,0x00,0x45,0xe0,0x54,0xef,0xfd,0x7f,
+0x45,0x51,0xc1,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x9e,0x2a,0xe0,0x90,0x05,
+0x84,0xf0,0x90,0x9e,0x2b,0xe0,0x90,0x05,0x85,0xf0,0x90,0x9e,0x2c,0xe0,0x90,0x05,
+0x86,0xf0,0x90,0x9e,0x2d,0xe0,0x90,0x05,0x87,0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x9e,
+0x3f,0xf0,0xc2,0xaf,0x90,0x01,0x3c,0xe0,0x44,0x20,0xf0,0x7d,0x20,0xe4,0xff,0x12,
+0x37,0x00,0x80,0x2b,0x90,0x9e,0x1c,0xe0,0x70,0x2d,0x90,0x9e,0x2e,0x51,0xb7,0x90,
+0x00,0x46,0xe0,0x54,0xfe,0xfd,0x7f,0x46,0x51,0xc1,0x90,0x05,0x22,0xe4,0xf0,0xa2,
+0xaf,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x7d,0x20,0xe4,0xff,0x12,0x36,0x92,0x90,
+0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x22,0x8b,0x59,0x8a,0x5a,0x89,0x5b,0x90,0x00,
+0x02,0x12,0x42,0x20,0x90,0x9e,0x1d,0xf0,0xe0,0x30,0xe0,0x4b,0x90,0x9e,0x14,0x74,
+0x01,0xf0,0x7f,0x80,0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0x16,0x12,0x2a,0x7f,0xab,
+0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xe4,0xfc,0xfd,0xfe,
+0x78,0x1a,0x12,0x2a,0x6c,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,0x07,0x90,0x9e,0x16,
+0x12,0x43,0x53,0xec,0x54,0x03,0xfc,0x12,0x43,0x46,0x90,0x9e,0x20,0x12,0x2a,0x7f,
+0x90,0x05,0x22,0xe4,0xf0,0x80,0x2d,0xe4,0x90,0x9e,0x14,0xf0,0x7f,0x80,0x7e,0x08,
+0x12,0x27,0xde,0xec,0x54,0x03,0xfc,0xec,0x44,0xc0,0xfc,0x90,0x9e,0x16,0x12,0x2a,
+0x7f,0x90,0x9e,0x16,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,
+0x08,0x12,0x2f,0xd9,0x90,0x9e,0x1d,0xe0,0x30,0xe1,0x19,0x7d,0x0c,0x7f,0x47,0x51,
+0xc1,0x90,0x00,0x48,0xe0,0x44,0x0c,0xfd,0x7f,0x48,0x51,0xc1,0x90,0x00,0x46,0xe0,
+0x44,0x10,0x80,0x1c,0x90,0x00,0x47,0xe0,0x54,0xf3,0xfd,0x7f,0x47,0x51,0xc1,0x90,
+0x00,0x48,0xe0,0x54,0xf3,0xfd,0x7f,0x48,0x51,0xc1,0x90,0x00,0x46,0xe0,0x54,0xef,
+0xfd,0x7f,0x46,0x51,0xc1,0xe4,0x90,0x9e,0x1a,0xf0,0x22,0x90,0x01,0x3c,0x74,0xff,
+0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x01,0x34,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,
+0x7f,0x54,0x51,0xc1,0x7d,0xff,0x7f,0x55,0x51,0xc1,0x7d,0xff,0x7f,0x56,0x51,0xc1,
+0x7d,0xff,0x7f,0x57,0x41,0xc1,0x90,0x01,0x30,0xe4,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,
+0xf0,0x90,0x01,0x38,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,0x50,0x51,0xc1,
+0xe4,0xfd,0x7f,0x51,0x51,0xc1,0xe4,0xfd,0x7f,0x52,0x51,0xc1,0xe4,0xfd,0x7f,0x53,
+0x41,0xc1,0xe5,0x22,0x64,0x01,0x70,0x3c,0xf1,0xbe,0xbf,0x01,0x05,0x7f,0x01,0x12,
+0x44,0xf1,0x90,0x00,0x46,0xe0,0x44,0x04,0xfd,0x7f,0x46,0x51,0xc1,0x90,0x00,0x44,
+0xe0,0x54,0xfb,0xfd,0x7f,0x44,0x51,0xc1,0x90,0x00,0x46,0xe0,0x54,0xfb,0xfd,0x7f,
+0x46,0x51,0xc1,0x7f,0x02,0xf1,0xea,0x8f,0x26,0x90,0x01,0xc9,0xe5,0x26,0xf0,0xb4,
+0x01,0x02,0xf1,0x2a,0x22,0x90,0x9e,0x1c,0xe0,0x64,0x01,0x60,0x02,0xc1,0xd7,0x90,
+0x00,0x46,0xe0,0x44,0x01,0xfd,0x7f,0x46,0x51,0xc1,0x90,0x9e,0x2e,0xe0,0x70,0x31,
+0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x20,0x12,0x43,0x53,0x90,0x80,0x85,0x12,
+0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x80,0x06,0x90,0x05,0x22,0x74,0x7f,
+0xf0,0x90,0x9e,0x1b,0xe0,0xff,0xd1,0xd8,0x90,0x9e,0x2e,0x74,0x01,0x51,0xb7,0x80,
+0x3f,0x90,0x9e,0x2e,0xe0,0x64,0x01,0x70,0x37,0x90,0x9e,0x1f,0xe0,0xff,0xd1,0xd8,
+0xe4,0x90,0x9e,0x2e,0xf0,0x90,0x00,0x45,0xe0,0x44,0x01,0xfd,0x7f,0x45,0x51,0xc1,
+0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x16,0x12,0x43,0x53,0x90,0x80,0x85,0x12,
+0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x80,0x05,0x90,0x05,0x22,0xe4,0xf0,
+0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x9e,0x2a,0xe0,0x90,0x05,0x84,0xf0,0x90,
+0x9e,0x2b,0xe0,0x90,0x05,0x85,0xf0,0x90,0x9e,0x2c,0xe0,0x90,0x05,0x86,0xf0,0x90,
+0x9e,0x2d,0xe0,0x90,0x05,0x87,0xf0,0x22,0x90,0x05,0x60,0xe0,0x90,0x9e,0x2a,0xf0,
+0x90,0x05,0x61,0xe0,0x90,0x9e,0x2b,0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x2c,0xf0,
+0x90,0x05,0x63,0xe0,0x90,0x9e,0x2d,0xf0,0xc3,0x74,0xff,0x9f,0xfe,0x90,0x9e,0x2b,
+0xe0,0xd3,0x9e,0x40,0x1e,0xe0,0x2f,0xf0,0xa3,0xe0,0xb4,0xff,0x0f,0xe4,0xf0,0xa3,
+0xe0,0xb4,0xff,0x03,0xe4,0xf0,0x22,0x90,0x9e,0x2d,0x80,0x03,0x90,0x9e,0x2c,0xe0,
+0x04,0xf0,0x22,0x90,0x9e,0x2b,0xe0,0x2f,0xf0,0x22,0x90,0x00,0x49,0xe0,0x90,0x9e,
+0xb1,0xf0,0xe0,0x54,0x0f,0xf0,0x44,0xf0,0xfd,0x7f,0x49,0x51,0xc1,0x90,0x9e,0xb1,
+0xe0,0x44,0xb0,0xfd,0x7f,0x49,0x41,0xc1,0x8e,0x59,0x8f,0x5a,0x8b,0x5b,0x8a,0x5c,
+0x89,0x5d,0xe4,0x90,0x9e,0x34,0xf0,0xef,0x90,0x00,0x31,0xf0,0x31,0xb9,0xe5,0x59,
+0x54,0x03,0xff,0x90,0x00,0x32,0xe0,0x54,0xfc,0x4f,0xf0,0x31,0xb9,0x90,0x00,0x33,
+0xe0,0x54,0x7f,0xf0,0x31,0xb9,0x90,0x00,0x33,0xe0,0x20,0xe7,0x0e,0x90,0x9e,0x34,
+0xe0,0xc3,0x94,0x64,0x50,0x05,0xe0,0x04,0xf0,0x80,0xeb,0x90,0x9e,0x34,0xe0,0xc3,
+0x94,0x64,0x50,0x10,0x90,0x00,0x30,0xe0,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x12,0x42,
+0x4d,0x7f,0x01,0x22,0x7f,0x00,0x22,0x12,0x45,0xb1,0xbf,0x01,0x10,0x90,0x02,0x09,
+0xe0,0xff,0x7d,0x01,0x12,0x47,0xfe,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x7f,0x0b,
+0xf1,0xea,0xef,0x65,0x25,0x60,0x10,0xe5,0x25,0xb4,0x01,0x05,0xe4,0xf5,0x25,0x80,
+0x03,0x75,0x25,0x01,0x7f,0x01,0x22,0x7f,0x00,0x22,0xe4,0x90,0x9e,0x74,0xf0,0x90,
+0x00,0x80,0xe0,0x44,0x80,0xfd,0x7f,0x80,0x41,0xc1,0xd3,0x10,0xaf,0x01,0xc3,0xc0,
+0xd0,0x90,0x9e,0xb2,0xef,0xf0,0xd3,0x94,0x07,0x50,0x47,0xe0,0xff,0x74,0x01,0xa8,
+0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0xe0,0x5f,0xf0,
+0x12,0x49,0xb9,0x90,0x9e,0xb2,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8,0x05,0x08,0x80,
+0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x44,0xe0,0xfb,0xe4,0xfe,
+0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13,0xd8,0xf8,0xff,
+0x80,0x44,0x90,0x9e,0xb2,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,
+0x80,0x02,0xc3,0x33,0xd8,0xfc,0x12,0x49,0xb1,0x90,0x9e,0xb2,0xe0,0xfd,0x74,0x01,
+0x7e,0x00,0xa8,0x05,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,
+0x00,0x42,0xe0,0xfb,0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,
+0x13,0xce,0x13,0xd8,0xf8,0xff,0xd0,0xd0,0x92,0xaf,0x22,0x75,0x28,0x33,0xe4,0xf5,
+0x29,0x75,0x2a,0x03,0xf5,0x2b,0x90,0x01,0x30,0xe5,0x28,0xf0,0xa3,0xe5,0x29,0xf0,
+0xa3,0xe5,0x2a,0xf0,0xa3,0xe5,0x2b,0xf0,0x22,0xe4,0x90,0x9e,0x31,0xf0,0xa3,0xf0,
+0x75,0x8e,0x02,0x12,0x4f,0xda,0x12,0x5f,0xa9,0x12,0x5f,0xbc,0xe4,0xf5,0x12,0x12,
+0x6f,0xa1,0x12,0x77,0x5d,0x12,0x60,0x9b,0x12,0x32,0x3d,0x12,0x77,0x18,0x11,0x8b,
+0x90,0x00,0xf3,0xe0,0x30,0xe2,0x0d,0x90,0x05,0x41,0x74,0x10,0xf0,0x90,0x05,0x5a,
+0xf0,0xa3,0xe4,0xf0,0x12,0x5f,0xf4,0x12,0x5f,0x91,0x12,0x44,0xfe,0x12,0x7d,0x1d,
+0x90,0x9e,0x33,0xe5,0xd9,0xf0,0x12,0x4d,0x8b,0xc2,0xaf,0x90,0x00,0x80,0xe0,0x44,
+0x40,0xf0,0x12,0x49,0xb9,0x75,0xe8,0x03,0x43,0xa8,0x85,0xd2,0xaf,0x90,0x01,0xbe,
+0xe0,0x04,0xf0,0x90,0x01,0xc0,0xe0,0x04,0xf0,0x90,0x9e,0x31,0xe0,0x64,0x01,0xf0,
+0x24,0xa9,0x90,0x01,0xc4,0xf0,0x74,0x50,0xa3,0xf0,0xe5,0x12,0x30,0xe4,0x09,0xc2,
+0xaf,0x53,0x12,0xef,0xd2,0xaf,0x31,0x8e,0xe5,0x12,0x30,0xe6,0x17,0xc2,0xaf,0x53,
+0x12,0xbf,0xd2,0xaf,0x12,0x69,0x51,0x90,0x9e,0x1e,0xe0,0xff,0x60,0x03,0xb4,0x01,
+0x03,0x12,0x7d,0x7b,0x90,0x9e,0x1e,0xe0,0x70,0x03,0x12,0x7e,0x7e,0x31,0x61,0x80,
+0xb8,0x90,0x06,0x34,0xe0,0x60,0x26,0x14,0x70,0x1b,0x7b,0x01,0x7a,0x06,0x79,0x35,
+0x7f,0xf9,0x7e,0x01,0x12,0x4f,0x48,0xbf,0x01,0x09,0x90,0x06,0x35,0xe0,0x54,0x0f,
+0xf0,0x80,0x05,0x80,0x00,0x02,0x77,0x0a,0xe4,0x90,0x06,0x34,0xf0,0x22,0x90,0x01,
+0xcc,0xe0,0x54,0x0f,0x90,0x9e,0x34,0xf0,0x90,0x9e,0x34,0xe0,0xfd,0x70,0x02,0x41,
+0xcf,0x90,0x9e,0xae,0xe0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,
+0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xef,0x5d,0x70,0x02,0x41,0xc8,0x90,0x9e,0xae,
+0xe0,0x75,0xf0,0x04,0x90,0x01,0xd0,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x35,0xf0,0x75,
+0x1e,0x01,0x75,0x1f,0x9e,0x75,0x20,0x35,0x75,0x21,0x01,0x7b,0x01,0x7a,0x9e,0x79,
+0x36,0x12,0x45,0x09,0x90,0x9e,0x36,0xe0,0xff,0xc4,0x13,0x13,0x13,0x54,0x01,0x90,
+0x9e,0xae,0x30,0xe0,0x59,0xe0,0x75,0xf0,0x02,0x90,0x00,0x88,0x12,0x43,0x5f,0xe0,
+0x90,0x9e,0x37,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x02,0x90,0x00,0x89,0x12,0x43,
+0x5f,0xe0,0x90,0x9e,0x38,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd1,
+0x12,0x43,0x5f,0xe0,0x90,0x9e,0x39,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90,
+0x01,0xd2,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x3a,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,
+0x04,0x90,0x01,0xd3,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x3b,0xf0,0x80,0x33,0xe0,0x75,
+0xf0,0x04,0x90,0x01,0xd1,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x37,0xf0,0x90,0x9e,0xae,
+0xe0,0x75,0xf0,0x04,0x90,0x01,0xd2,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x38,0xf0,0x90,
+0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x39,
+0xf0,0xef,0x54,0x7f,0xff,0x7b,0x01,0x7a,0x9e,0x79,0x37,0x51,0xd0,0x90,0x9e,0x34,
+0xe0,0xff,0x90,0x9e,0xae,0xe0,0xfe,0x74,0x01,0xa8,0x06,0x08,0x80,0x02,0xc3,0x33,
+0xd8,0xfc,0xf4,0x5f,0x90,0x9e,0x34,0xf0,0x90,0x9e,0xae,0xe0,0xff,0x74,0x01,0xa8,
+0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0x90,0x01,0xcc,0xf0,0x90,0x9e,0xae,0xe0,
+0x04,0xf0,0xe0,0x54,0x03,0xf0,0x21,0x98,0x90,0x01,0xc6,0xe0,0x44,0x02,0xf0,0x22,
+0x90,0x9e,0x3c,0x12,0x43,0x8b,0xef,0x12,0x43,0x94,0x53,0x0b,0x01,0x53,0x14,0x02,
+0x53,0x2f,0x03,0x53,0x38,0x05,0x53,0x41,0x06,0x53,0x8f,0x07,0x53,0x49,0x09,0x53,
+0x52,0x0c,0x53,0x5b,0x0d,0x53,0x64,0x0e,0x53,0x6d,0x1b,0x53,0x76,0x1c,0x53,0x7f,
+0x2c,0x53,0x1d,0x2d,0x53,0x26,0x2e,0x00,0x00,0x53,0x88,0x90,0x9e,0x3c,0x12,0x43,
+0x6b,0x02,0x61,0x9d,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x71,0xc4,0x90,0x9e,0x3c,
+0x12,0x43,0x6b,0x02,0x71,0xca,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x72,0x12,0x90,
+0x9e,0x3c,0x12,0x43,0x6b,0x02,0x72,0x40,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x71,
+0x74,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x80,0x47,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,
+0x72,0x88,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x4b,0x7e,0x90,0x9e,0x3c,0x12,0x43,
+0x6b,0x02,0x7c,0xea,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x4c,0xb8,0x90,0x9e,0x3c,
+0x12,0x43,0x6b,0x02,0x71,0xbc,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x71,0xa3,0x90,
+0x9e,0x3c,0x12,0x43,0x6b,0x02,0x75,0xea,0x90,0x01,0xc6,0xe0,0x44,0x01,0xf0,0x22,
+0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x1f,0xfe,0xef,0x54,0x20,0xc4,0x13,0x54,
+0x07,0xfd,0xaf,0x06,0x90,0x9e,0x3f,0xef,0xf0,0xa3,0xed,0xf0,0xa3,0x12,0x43,0x8b,
+0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54,0xf0,0xc4,0x54,
+0x0f,0x90,0x9e,0x44,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0x54,0x40,0xc4,0x13,0x13,
+0x54,0x03,0x90,0x9e,0x45,0xf0,0x90,0x9e,0x3f,0xe0,0xff,0x75,0xf0,0x09,0x90,0x96,
+0x46,0x12,0x43,0x5f,0xad,0x82,0xac,0x83,0x90,0x9e,0x46,0xec,0xf0,0xa3,0xed,0xf0,
+0xef,0x75,0xf0,0x09,0xa4,0x24,0x44,0xf9,0x74,0x96,0x35,0xf0,0xfa,0x7b,0x01,0xa3,
+0x12,0x43,0x8b,0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54,
+0x0f,0xff,0x90,0x9e,0x48,0x12,0x43,0x6b,0xef,0x12,0x42,0x4d,0x90,0x9e,0x41,0x12,
+0x43,0x6b,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x90,0x9e,0x48,0x12,0x43,0x6b,0x90,
+0x00,0x01,0xef,0x12,0x42,0x5f,0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,
+0x42,0x20,0xff,0x90,0x9e,0x46,0xe0,0xfc,0xa3,0xe0,0xfd,0xf5,0x82,0x8c,0x83,0xef,
+0xf0,0x12,0x29,0xd9,0x8d,0x82,0x8c,0x83,0xa3,0xf0,0x90,0x9e,0x44,0xe0,0xfe,0x90,
+0x9e,0x3f,0xe0,0xff,0x24,0x82,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0x90,
+0x9e,0x40,0xe0,0xfe,0x75,0xf0,0x09,0xef,0x90,0x96,0x4a,0x12,0x43,0x5f,0xee,0xf0,
+0x75,0xf0,0x09,0xef,0x90,0x96,0x4b,0x12,0x43,0x5f,0x74,0x01,0xf0,0x90,0x9e,0x45,
+0xe0,0xfe,0x75,0xf0,0x09,0xef,0x90,0x96,0x4c,0x12,0x43,0x5f,0xee,0xf0,0x8f,0x59,
+0xef,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xaf,0x82,0xf5,0x5b,0x8f,0x5c,
+0xe5,0x59,0x75,0xf0,0x02,0xa4,0x24,0x02,0xf9,0x74,0x95,0x35,0xf0,0x75,0x5d,0x01,
+0xf5,0x5e,0x89,0x5f,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x46,0x12,0x43,0x5f,0xaf,
+0x82,0x85,0x83,0x60,0x8f,0x61,0xe5,0x59,0x75,0xf0,0x09,0xa4,0x24,0x44,0xf9,0x74,
+0x96,0x35,0xf0,0x75,0x62,0x01,0xf5,0x63,0x89,0x64,0x74,0x82,0x25,0x59,0xf5,0x82,
+0xe4,0x34,0x95,0xf5,0x83,0xe0,0x12,0x43,0x94,0x55,0x1e,0x00,0x55,0x33,0x01,0x55,
+0x48,0x02,0x55,0x5d,0x03,0x55,0x86,0x04,0x55,0x9b,0x05,0x55,0xb0,0x06,0x55,0xd6,
+0x0c,0x56,0x03,0x0d,0x56,0x30,0x0e,0x56,0x5d,0x0f,0x00,0x00,0x56,0x91,0xe5,0x59,
+0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74,
+0x15,0x80,0x3c,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,
+0x74,0xf0,0xf0,0xa3,0x74,0x10,0x80,0x27,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,
+0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74,0x05,0x80,0x12,0xe5,0x59,0x25,
+0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0xe4,0xf0,
+0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0f,0xf0,
+0xa3,0x74,0x8f,0xf0,0xc1,0x91,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,
+0x9b,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf5,0x80,0x27,0xe5,0x59,0x25,0xe0,0x24,
+0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf0,0x80,0x12,
+0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe4,0xf0,0xa3,
+0x74,0x0d,0xf0,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,
+0xe4,0xf0,0xa3,0xf0,0xc1,0x91,0x90,0x04,0x47,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,
+0x12,0x42,0x4d,0x90,0x04,0x46,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,
+0x12,0x42,0x5f,0x90,0x04,0x45,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,
+0x44,0xc1,0x88,0x90,0x04,0x4b,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,0x4d,
+0x90,0x04,0x4a,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,0x5f,
+0x90,0x04,0x49,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x48,0x80,0x58,
+0x90,0x04,0x4f,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,0x4d,0x90,0x04,0x4e,
+0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x4d,
+0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x4c,0x80,0x2b,0x90,0x04,0x53,
+0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,0x4d,0x90,0x04,0x52,0xe0,0xab,0x5d,
+0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x51,0xe0,0x85,0x5c,
+0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x50,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xa3,
+0xf0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0xc0,0x03,0xc0,0x02,0xc0,0x01,0x12,0x29,0xd9,
+0xff,0xab,0x62,0xaa,0x63,0xa9,0x64,0x12,0x29,0xd9,0x5f,0xd0,0x01,0xd0,0x02,0xd0,
+0x03,0x12,0x42,0x4d,0xab,0x5d,0xe5,0x5f,0x24,0x01,0xf9,0xe4,0x35,0x5e,0xfa,0xc0,
+0x03,0xc0,0x02,0xc0,0x01,0x12,0x29,0xd9,0xff,0xab,0x62,0xaa,0x63,0xa9,0x64,0x90,
+0x00,0x01,0x12,0x42,0x20,0x5f,0xd0,0x01,0xd0,0x02,0xd0,0x03,0x12,0x42,0x4d,0x85,
+0x5c,0x82,0x85,0x5b,0x83,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x61,0x82,0x85,0x60,
+0x83,0xe0,0xfe,0xef,0x5e,0xd0,0x82,0xd0,0x83,0xf0,0x85,0x5c,0x82,0x85,0x5b,0x83,
+0xa3,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x61,0x82,0x85,0x60,0x83,0xa3,0xe0,0xfe,
+0xef,0x5e,0xd0,0x82,0xd0,0x83,0xf0,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,
+0x34,0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b,0x75,0x5a,0x0b,0x74,0x01,
+0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,
+0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,
+0xe0,0x5f,0x4e,0x60,0x06,0xe5,0x5a,0x24,0x10,0x80,0x5d,0x15,0x5a,0xe5,0x5a,0xc3,
+0x94,0x00,0x50,0xca,0x80,0x56,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,
+0x9b,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3d,0x75,0x5a,0x0f,0x74,0x01,0x7e,
+0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x59,
+0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0,
+0x5f,0x4e,0x60,0x08,0x90,0x9e,0x4b,0xe5,0x5a,0xf0,0x80,0x10,0x15,0x5a,0xe5,0x5a,
+0xc3,0x94,0x00,0x50,0xc8,0x80,0x05,0xe4,0x90,0x9e,0x4b,0xf0,0xe5,0x59,0x25,0xe0,
+0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b,
+0xe4,0xf5,0x5a,0x74,0x01,0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,
+0xce,0xd8,0xf9,0xff,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,
+0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x08,0x90,0x9e,0x4c,0xe5,0x5a,0xf0,
+0x80,0x5b,0x05,0x5a,0xe5,0x5a,0xb4,0x10,0xca,0x80,0x52,0xe5,0x59,0x25,0xe0,0x24,
+0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x39,0xe4,
+0xf5,0x5a,0x74,0x01,0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,
+0xd8,0xf9,0xff,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,
+0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x06,0xe5,0x5a,0x24,0x10,0x80,0x0a,0x05,
+0x5a,0xe5,0x5a,0xb4,0x0c,0xcc,0x80,0x05,0xe4,0x90,0x9e,0x4c,0xf0,0x90,0x9e,0x4b,
+0xe0,0xff,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x48,0x12,0x43,0x5f,0xef,0xf0,0x90,
+0x9e,0x4c,0xe0,0xfe,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x49,0x12,0x43,0x5f,0xee,
+0xf0,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0xd3,0x9f,0x40,
+0x05,0x90,0x9e,0x4b,0x11,0xe0,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5,
+0x83,0xe0,0xff,0x90,0x9e,0x4c,0xe0,0xfe,0xef,0xc3,0x9e,0x50,0x02,0x11,0xe0,0x90,
+0x9e,0x4b,0xe0,0xff,0xd3,0x94,0x13,0x40,0x07,0x90,0x96,0x43,0x74,0x03,0xf0,0x22,
+0xef,0xd3,0x94,0x0b,0x40,0x07,0x90,0x96,0x43,0x74,0x02,0xf0,0x22,0xef,0xd3,0x94,
+0x03,0x40,0x07,0x90,0x96,0x43,0x74,0x01,0xf0,0x22,0xe4,0x90,0x96,0x43,0xf0,0x22,
+0xe0,0xfd,0x74,0x26,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xed,0xf0,0xaf,
+0x59,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xef,0xc3,0x94,0x20,0x50,0x0e,0x74,0x84,
+0x2f,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xed,0xf0,0x80,0x29,0x74,0xa6,0x2f,0xf5,
+0x82,0xe4,0x34,0x9c,0xf5,0x83,0xed,0xf0,0x90,0x9e,0x78,0xef,0xf0,0x24,0xa6,0xf5,
+0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x90,0x9e,0x79,0xf0,0x7b,0x01,0x7a,0x9e,0x79,
+0x78,0x7d,0x02,0x31,0x3a,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,
+0xd0,0x90,0x9e,0x97,0x12,0x43,0x8b,0x90,0x9e,0x9a,0xe0,0x54,0xf0,0x44,0x06,0xff,
+0xf0,0xed,0x54,0x0f,0xc4,0x54,0xf0,0xfe,0xef,0x54,0x0f,0x4e,0xf0,0x90,0x9e,0x97,
+0x12,0x43,0x6b,0x90,0x9e,0x94,0x12,0x43,0x8b,0x7b,0x01,0x7a,0x9e,0x79,0x9a,0xd1,
+0x14,0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x50,0x8d,0x51,0xe5,0x51,0x54,0x1f,0xf5,0x56,
+0x74,0x01,0x2f,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xf5,0x54,0x90,0x04,0xfd,
+0xe0,0xb4,0x01,0x05,0x75,0x57,0x03,0x80,0x03,0x75,0x57,0x01,0xeb,0xc3,0x95,0x57,
+0x40,0x04,0xaf,0x50,0x80,0x33,0xe5,0x54,0x25,0x53,0xf5,0x55,0xe5,0x56,0x90,0x41,
+0xd6,0x93,0xff,0xe5,0x55,0xd3,0x9f,0x74,0x01,0x40,0x11,0x25,0x50,0xf5,0x82,0xe4,
+0x34,0x94,0xf5,0x83,0xe4,0xf0,0xad,0x51,0xaf,0x50,0x01,0xf1,0x25,0x50,0xf5,0x82,
+0xe4,0x34,0x94,0xf5,0x83,0xe5,0x55,0xf0,0x22,0xad,0x07,0x75,0xf0,0x09,0xed,0x90,
+0x96,0x48,0x12,0x43,0x5f,0xe0,0xff,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,
+0x83,0xe0,0x54,0x1f,0xf5,0x58,0xd3,0x9f,0x40,0x02,0x8f,0x58,0xe5,0x58,0x25,0xe0,
+0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,
+0xe5,0x58,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,
+0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,
+0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xaf,0x05,0xad,0x58,
+0x11,0xf1,0xaf,0x58,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,
+0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,
+0xc0,0x07,0x90,0x01,0xc4,0x74,0x45,0xf0,0x74,0x5a,0xa3,0xf0,0x90,0x01,0x34,0xe0,
+0x55,0x28,0xf5,0x2c,0x90,0x01,0x36,0xe0,0x55,0x2a,0xf5,0x2e,0xa3,0xe0,0x55,0x2b,
+0xf5,0x2f,0xe5,0x2c,0x20,0xe0,0x02,0x61,0xe1,0x90,0x01,0x34,0x74,0x01,0xf0,0x85,
+0xd1,0x08,0x85,0xd2,0x09,0x85,0xd3,0x0a,0x85,0xd4,0x0b,0x85,0xd5,0x0c,0x85,0xd6,
+0x0d,0x85,0xd7,0x0e,0x85,0xd9,0x0f,0xe5,0x0f,0x54,0x40,0xc3,0x13,0xff,0xe5,0x0e,
+0x54,0x20,0x6f,0x70,0x02,0x61,0x93,0xe5,0x0f,0x30,0xe5,0x02,0x61,0x93,0xe5,0x0d,
+0x54,0x3f,0xf5,0x4d,0xe5,0x08,0x54,0x3f,0xf5,0x4e,0xe5,0x0c,0x54,0x1f,0xff,0xe5,
+0x4d,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0x8f,0xf0,0x12,
+0x42,0x81,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4,
+0x34,0x93,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x4e,0xd3,0x94,0x04,0x40,
+0x03,0x75,0x4e,0x04,0x75,0xf0,0x0a,0xe5,0x4d,0x90,0x90,0x00,0x12,0x43,0x5f,0x75,
+0xf0,0x02,0xe5,0x4e,0x12,0x43,0x5f,0xe0,0xfe,0xa3,0xe0,0xff,0xe5,0x0e,0x54,0x1f,
+0x2f,0xff,0xe4,0x3e,0xfe,0x75,0xf0,0x0a,0xe5,0x4d,0x90,0x90,0x00,0x12,0x43,0x5f,
+0x75,0xf0,0x02,0xe5,0x4e,0x12,0x43,0x5f,0xee,0xf0,0xa3,0xef,0xf0,0xe5,0x0f,0x20,
+0xe6,0x23,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,
+0x34,0x98,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0a,0x30,0xe7,0x34,0xaf,
+0x4d,0x31,0xd9,0x80,0x2e,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0x44,
+0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0a,0x30,
+0xe7,0x11,0xe5,0x0a,0x54,0x7f,0xfd,0xe5,0x0e,0x54,0x1f,0xf5,0x53,0xab,0x4e,0xaf,
+0x4d,0x31,0x76,0xe5,0x74,0x14,0x24,0xfd,0x50,0x02,0x80,0x45,0x90,0x9e,0x61,0xe0,
+0x60,0x37,0x90,0x01,0x5b,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x04,0xf0,0xd1,0x05,0xef,
+0x64,0x01,0x70,0x2d,0x90,0x9e,0x55,0xe0,0xf5,0x44,0x75,0x45,0x00,0xe4,0xfb,0xfd,
+0x7f,0x58,0x7e,0x01,0x12,0x35,0xab,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92,
+0x74,0x01,0xf0,0x90,0x9e,0x5d,0xf0,0x80,0x08,0xd1,0x05,0xbf,0x01,0x03,0x12,0x44,
+0xd3,0xe5,0x2c,0x30,0xe1,0x20,0x90,0x01,0x34,0x74,0x02,0xf0,0x85,0xd1,0x13,0x85,
+0xd2,0x14,0x85,0xd3,0x15,0x85,0xd4,0x16,0x85,0xd5,0x17,0x85,0xd6,0x18,0x85,0xd7,
+0x19,0x85,0xd9,0x1a,0xd1,0x9c,0xe5,0x2c,0x30,0xe3,0x06,0x90,0x01,0x34,0x74,0x08,
+0xf0,0xe5,0x2c,0x30,0xe4,0x09,0x90,0x01,0x34,0x74,0x10,0xf0,0x43,0x12,0x10,0xe5,
+0x2c,0x30,0xe5,0x26,0x90,0x01,0xcf,0xe0,0x30,0xe5,0x1f,0xe0,0x54,0xdf,0xf0,0x90,
+0x01,0x34,0x74,0x20,0xf0,0x75,0xa8,0x00,0x75,0xe8,0x00,0x12,0x4d,0xb6,0x90,0x00,
+0x03,0xe0,0x54,0xfb,0xf0,0x12,0x49,0xb9,0x80,0xfe,0xe5,0x2c,0x30,0xe6,0x06,0x90,
+0x01,0x34,0x74,0x40,0xf0,0xe5,0x2e,0x30,0xe1,0x3c,0x90,0x01,0x36,0x74,0x02,0xf0,
+0x43,0x12,0x40,0x90,0x01,0x02,0xe0,0x54,0x03,0x64,0x01,0x70,0x29,0x90,0x01,0x37,
+0xe0,0x30,0xe0,0x0a,0x74,0x01,0xf0,0x90,0x9e,0x66,0xe4,0xf0,0x80,0x18,0x90,0x9e,
+0x66,0xe0,0x04,0xf0,0xe0,0xc3,0x94,0x0a,0x40,0x0c,0xe4,0xf0,0x90,0x04,0x19,0xe0,
+0x30,0xe0,0x03,0x12,0x4f,0xa7,0xe5,0x2e,0x30,0xe0,0x12,0x90,0x9e,0x76,0x74,0x01,
+0xf0,0x90,0x01,0x36,0xf0,0x12,0x64,0xfe,0x90,0x9e,0x76,0xe4,0xf0,0xe5,0x2e,0x30,
+0xe2,0x78,0x90,0x01,0x36,0x74,0x04,0xf0,0x90,0x01,0xbd,0xe0,0x04,0xf0,0xe5,0x73,
+0x64,0x01,0x70,0x66,0xe5,0x74,0x60,0x62,0xe5,0x74,0x64,0x02,0x60,0x06,0xe5,0x74,
+0x64,0x05,0x70,0x27,0x90,0x06,0xab,0xe0,0x90,0x9e,0x50,0xf0,0x90,0x06,0xaa,0xe0,
+0x90,0x9e,0x5f,0xf0,0x90,0x9e,0x50,0xe0,0x70,0x07,0x90,0x9e,0x5f,0xe0,0xff,0x80,
+0x05,0x90,0x9e,0x50,0xe0,0xff,0x90,0x9e,0x50,0xef,0xf0,0x90,0x9e,0x52,0xe0,0x60,
+0x03,0xe0,0x14,0xf0,0x90,0x9e,0x51,0xe4,0xf0,0x90,0x01,0x57,0xf0,0x90,0x01,0x3c,
+0x74,0x02,0xf0,0x90,0x9e,0x63,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0xef,0xf0,0xe5,0x74,
+0x14,0x24,0xfd,0x50,0x02,0x80,0x03,0x12,0x45,0x53,0xe5,0x2e,0x30,0xe3,0x28,0x90,
+0x01,0x36,0x74,0x08,0xf0,0xe5,0x73,0x64,0x01,0x70,0x1c,0xe5,0x74,0x60,0x18,0x90,
+0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x9e,0x89,0xe4,0x12,0x44,
+0x52,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x2e,0x30,0xe4,0x2f,0x90,0x01,0x36,0x74,
+0x10,0xf0,0xe5,0x73,0x64,0x01,0x70,0x23,0xe5,0x74,0x60,0x1f,0x90,0x01,0x57,0xe4,
+0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x9e,0x62,0xe4,0xf0,0x90,0x9e,0x63,0xe0,
+0x54,0xfd,0xf0,0xe0,0x54,0x07,0x70,0x03,0x12,0x44,0xd3,0xe5,0x2e,0x30,0xe5,0x1f,
+0x90,0x01,0x36,0x74,0x20,0xf0,0xe5,0x73,0xb4,0x01,0x14,0xe5,0x74,0x60,0x10,0x90,
+0x9e,0x61,0xe0,0x64,0x02,0x60,0x05,0x12,0x44,0xdc,0x80,0x03,0x12,0x44,0x80,0xe5,
+0x2e,0x30,0xe6,0x1e,0x90,0x01,0x36,0x74,0x40,0xf0,0xe5,0x73,0xb4,0x01,0x13,0xe5,
+0x74,0x60,0x0f,0x90,0x9e,0x63,0xe0,0x54,0xfe,0xf0,0xe0,0x54,0x07,0x70,0x03,0x12,
+0x44,0xd3,0xe5,0x2f,0x30,0xe1,0x08,0x90,0x01,0x37,0x74,0x02,0xf0,0xd1,0xbd,0x74,
+0x45,0x04,0x90,0x01,0xc4,0xf0,0x74,0x5a,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,
+0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,
+0xd0,0xf0,0xd0,0xe0,0x32,0x90,0x04,0x1b,0xe0,0x54,0x7f,0x64,0x7f,0x7f,0x01,0x60,
+0x02,0x7f,0x00,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x91,0x12,0x43,
+0x8b,0x90,0x9e,0x75,0xe0,0x64,0x02,0x60,0x6e,0x90,0x9e,0x75,0xe0,0x64,0x01,0x70,
+0x66,0x90,0x9e,0xb0,0xe0,0xff,0x04,0xf0,0x90,0x9e,0x91,0x12,0x43,0x6b,0x90,0x00,
+0x01,0xef,0x12,0x42,0x5f,0x7f,0xaf,0x7e,0x01,0xf1,0x3b,0xef,0x60,0x49,0x90,0x9e,
+0x91,0x12,0x43,0x6b,0x8b,0x1e,0x8a,0x1f,0x89,0x20,0x75,0x21,0x02,0x7b,0x01,0x7a,
+0x01,0x79,0xa0,0x12,0x45,0x09,0x90,0x9e,0x94,0x12,0x43,0x6b,0x8b,0x1e,0x8a,0x1f,
+0x89,0x20,0x90,0x9e,0x91,0x12,0x43,0x6b,0x12,0x29,0xd9,0xff,0xc4,0x54,0x0f,0xf5,
+0x21,0x7b,0x01,0x7a,0x01,0x79,0xa2,0x12,0x45,0x09,0x90,0x01,0xaf,0x74,0xff,0xf0,
+0x90,0x01,0xcb,0xe0,0x64,0x80,0xf0,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x9e,0x2f,0xe0,
+0x54,0xf0,0x44,0x03,0xf0,0x54,0x0f,0x44,0x80,0xf0,0x7b,0x00,0x7a,0x00,0x79,0x13,
+0x90,0x9e,0x94,0x12,0x43,0x8b,0x0b,0x7a,0x9e,0x79,0x2f,0xc1,0x14,0x7d,0x02,0x7f,
+0x03,0x12,0x36,0x75,0xe5,0x74,0x14,0x24,0xfd,0x50,0x02,0x80,0x23,0x90,0x9e,0x61,
+0xe0,0x60,0x06,0x7d,0x01,0x7f,0x0c,0x80,0x0f,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0xc3,
+0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0x1a,0xe4,0xff,0x12,0x48,0x8f,
+0x22,0xd1,0x05,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x32,
+0x90,0x9e,0x5d,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x24,0x90,0x9e,
+0x5c,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x16,0x90,0x9e,0x60,0xe0,
+0x54,0x0f,0xd3,0x94,0x04,0x40,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x03,0x7f,
+0x01,0x22,0x90,0x01,0xb8,0x74,0x08,0xf0,0x7f,0x00,0x22,0xd3,0x10,0xaf,0x01,0xc3,
+0xc0,0xd0,0x90,0x9e,0xa0,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0x90,
+0x9e,0xa0,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x2d,0xc3,0x90,0x9e,
+0xa3,0xe0,0x94,0xe8,0x90,0x9e,0xa2,0xe0,0x94,0x03,0x40,0x0b,0x90,0x01,0xc6,0xe0,
+0x44,0x10,0xf0,0x7f,0x00,0x80,0x15,0x90,0x9e,0xa2,0xe4,0x75,0xf0,0x01,0x12,0x42,
+0x81,0x7f,0x0a,0x7e,0x00,0x12,0x37,0x54,0x80,0xc5,0x7f,0x01,0xd0,0xd0,0x92,0xaf,
+0x22,0x75,0x30,0x1f,0x75,0x31,0x01,0xe4,0xf5,0x32,0x90,0x01,0x38,0xe5,0x30,0xf0,
+0xa3,0xe5,0x31,0xf0,0xa3,0xe5,0x32,0xf0,0x22,0x90,0x00,0x02,0xe0,0x54,0xe0,0x90,
+0x9e,0x75,0x60,0x04,0x74,0x01,0xf0,0x22,0x74,0x02,0xf0,0x22,0x90,0x00,0xf3,0xe0,
+0x30,0xe3,0x08,0x90,0x9e,0x77,0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x9e,0x77,0xf0,
+0x90,0x9e,0x77,0xe0,0xb4,0x01,0x12,0x90,0x00,0xf2,0xe0,0x30,0xe7,0x0b,0x90,0x9e,
+0x64,0x74,0xfd,0xf0,0xa3,0x74,0x33,0xf0,0x22,0x90,0x9e,0x64,0x74,0xfd,0xf0,0xa3,
+0x74,0x2f,0xf0,0x22,0x90,0x01,0x64,0x74,0xa0,0xf0,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,
+0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,
+0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74,0xfb,0xf0,0x74,0x5f,
+0xa3,0xf0,0x53,0x91,0xef,0x90,0x00,0x51,0xe0,0xff,0x90,0x00,0x55,0xe0,0x5f,0xf5,
+0x3d,0xe5,0x3d,0x30,0xe6,0x18,0x74,0x40,0xf0,0x90,0x9e,0x1d,0xe0,0x54,0x03,0xff,
+0xbf,0x03,0x0b,0x90,0x9e,0x1a,0xe0,0x60,0x05,0x7f,0x01,0x12,0x4a,0xd6,0xe5,0x3d,
+0x30,0xe7,0x15,0x90,0x00,0x55,0x74,0x80,0xf0,0x90,0x9e,0x1d,0xe0,0x54,0x03,0xff,
+0xbf,0x03,0x05,0x7f,0x02,0x12,0x4a,0xd6,0x90,0x01,0xc4,0x74,0xfb,0xf0,0x74,0x5f,
+0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,
+0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x8f,0x6b,0x8c,
+0x6c,0x8d,0x6d,0x22,0x8f,0x6e,0x8c,0x6f,0x8d,0x70,0x22,0xe4,0xf5,0x73,0x90,0x9e,
+0x63,0xf0,0xf5,0x74,0x90,0x9e,0x60,0x74,0x0c,0xf0,0x90,0x9e,0x5e,0xf0,0xe4,0x90,
+0x9e,0x61,0xf0,0x90,0x9e,0x5d,0xf0,0x90,0x9e,0x5c,0xf0,0x90,0x9e,0x5f,0x04,0xf0,
+0x90,0x9e,0x50,0xf0,0xe4,0x90,0x9e,0x62,0xf0,0x90,0x9e,0x52,0xf0,0x90,0x9e,0x5a,
+0x74,0x07,0xf0,0xe4,0x90,0x9e,0x51,0xf0,0x90,0x9e,0x58,0xf0,0xa3,0x74,0x02,0xf0,
+0x90,0x9e,0x56,0x14,0xf0,0xa3,0x74,0x03,0xf0,0x90,0x9e,0x55,0x74,0x14,0xf0,0x90,
+0x9e,0x5b,0x74,0x05,0xf0,0xe4,0x90,0x9e,0x54,0xf0,0x90,0x9e,0x4f,0xf0,0x90,0x9e,
+0x76,0xf0,0x22,0xe4,0x90,0x9e,0x62,0xf0,0x90,0x9e,0x51,0xf0,0x90,0x9e,0x63,0xf0,
+0x22,0x8b,0x59,0x8a,0x5a,0x89,0x5b,0x31,0x03,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x12,
+0x29,0xd9,0xf5,0x74,0x14,0x60,0x0e,0x14,0x60,0x1e,0x14,0x60,0x2f,0x24,0x03,0x70,
+0x40,0x7f,0x01,0x80,0x3a,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00,0x02,0x12,0x42,
+0x20,0xfd,0xe4,0xff,0x31,0x72,0x80,0x27,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00,
+0x02,0x12,0x42,0x20,0xfd,0x7f,0x01,0x31,0x72,0x1f,0x80,0x13,0xab,0x59,0xaa,0x5a,
+0xa9,0x5b,0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0x7f,0x02,0x31,0x72,0xe4,0xff,0x31,
+0xc6,0x22,0xef,0x24,0xfe,0x60,0x0b,0x04,0x70,0x22,0x90,0x9e,0x5f,0x74,0x01,0xf0,
+0x80,0x16,0xed,0x70,0x0a,0x90,0x9e,0x5b,0xe0,0x90,0x9e,0x5f,0xf0,0x80,0x05,0x90,
+0x9e,0x5f,0xed,0xf0,0x90,0x9e,0x5f,0xe0,0x90,0x9e,0x50,0xf0,0x22,0xd3,0x10,0xaf,
+0x01,0xc3,0xc0,0xd0,0x90,0x00,0x01,0x12,0x42,0x20,0x90,0x9e,0x61,0xf0,0x90,0x00,
+0x03,0x12,0x42,0x20,0x90,0x9e,0x4f,0xf0,0x12,0x29,0xd9,0x65,0x74,0x60,0x02,0x31,
+0x11,0xd0,0xd0,0x92,0xaf,0x22,0xef,0x64,0x01,0x70,0x30,0x7d,0x7c,0x7f,0x02,0x12,
+0x36,0x75,0x7d,0x02,0x7f,0x03,0x12,0x36,0x75,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,
+0x3c,0x74,0x02,0xf0,0x12,0x47,0x16,0xe4,0xff,0x12,0x48,0x8f,0x90,0x06,0x04,0xe0,
+0x54,0x7f,0xf0,0x90,0x06,0x0a,0xe0,0x54,0xf8,0xf0,0x22,0x90,0x01,0x36,0x74,0x7c,
+0xf0,0xa3,0x74,0x02,0xf0,0x7d,0x7c,0xff,0x12,0x36,0xe6,0x7d,0x02,0x7f,0x03,0x12,
+0x36,0xe6,0x90,0x06,0x04,0xe0,0x44,0x80,0xf0,0x90,0x06,0x0a,0xe0,0x44,0x07,0xf0,
+0x90,0x9e,0x58,0xe0,0xa3,0xe0,0x90,0x05,0x58,0xf0,0xe5,0x73,0x30,0xe0,0x1b,0x90,
+0x9e,0x52,0xe0,0x70,0x1a,0xe0,0x04,0xf0,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0xc3,0x94,
+0x04,0x50,0x0c,0x7d,0x01,0x7f,0x04,0x02,0x47,0x1a,0xe4,0x90,0x9e,0x52,0xf0,0x22,
+0x12,0x5e,0x05,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x52,
+0x90,0x9e,0x63,0xe0,0x54,0x03,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x42,
+0x90,0x9e,0x60,0xe0,0x54,0x0f,0xd3,0x94,0x02,0x40,0x08,0x90,0x01,0xb9,0x74,0x04,
+0xf0,0x80,0x2f,0x90,0x9e,0x63,0xe0,0x30,0xe2,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,
+0x80,0x20,0x90,0x9e,0x63,0xe0,0x30,0xe4,0x08,0x90,0x01,0xb9,0x74,0x10,0xf0,0x80,
+0x11,0x90,0x9e,0x52,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x20,0xf0,0x80,0x03,0x7f,
+0x01,0x22,0x90,0x01,0xb8,0x74,0x04,0xf0,0x7f,0x00,0x22,0xe5,0x12,0x60,0x08,0x90,
+0x01,0xb9,0x74,0x01,0xf0,0x80,0x5e,0x90,0x9e,0x60,0xe0,0x54,0x0f,0xd3,0x94,0x01,
+0x40,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x4b,0x90,0x02,0x87,0xe0,0x60,0x08,
+0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x3d,0x90,0x9e,0x75,0xe0,0xb4,0x02,0x10,0x90,
+0x9e,0x64,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x17,0x80,0x26,0x90,
+0x9e,0x75,0xe0,0xb4,0x01,0x0e,0x90,0x01,0xaf,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,
+0x08,0xf0,0x80,0x11,0x90,0x9e,0x54,0xe0,0x70,0x08,0x90,0x01,0xb9,0x74,0x10,0xf0,
+0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74,0x02,0xf0,0x7f,0x00,0x22,0x90,0x06,
+0x04,0xe0,0x54,0xbf,0xf0,0xef,0x60,0x09,0xe5,0x73,0xb4,0x01,0x04,0xe4,0xff,0x71,
+0x4d,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x0c,0xf0,0x22,0x8f,0x76,0x90,
+0x9e,0x5e,0xe0,0x90,0x01,0xc1,0xf0,0xa3,0xe5,0x12,0xf0,0x12,0x45,0xb1,0xef,0x64,
+0x01,0x70,0x2e,0x90,0x9e,0x69,0x12,0x47,0xfa,0xe5,0x76,0x60,0x10,0x74,0x21,0x2f,
+0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x80,0x0e,0x74,0x21,0x2f,
+0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0,0x90,0x04,0x1f,0x74,0x20,
+0xf0,0x22,0x90,0x9e,0xaf,0xef,0xf0,0x71,0xb0,0x90,0x9e,0xaf,0xe0,0x60,0x05,0x90,
+0x05,0x22,0xe4,0xf0,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x04,0xf0,0x22,
+0x90,0x00,0x11,0xe0,0x44,0x09,0xf0,0x12,0x49,0xb9,0x90,0x9d,0xff,0x12,0x43,0x53,
+0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9e,0x03,
+0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,
+0x90,0x9e,0x07,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,
+0x12,0x2f,0xd9,0x90,0x9e,0x0b,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,
+0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x03,0x2d,0x95,
+0xe4,0xfd,0xff,0x12,0x34,0x81,0x90,0x9e,0x77,0xe0,0xb4,0x01,0x11,0x90,0x80,0x59,
+0x12,0x2a,0x8b,0x00,0x03,0x2d,0x95,0xe4,0xfd,0x7f,0x01,0x12,0x34,0x81,0x22,0x8f,
+0x27,0xe4,0x90,0x9e,0xa8,0xf0,0xa3,0xf0,0x90,0x01,0x09,0xe0,0x7f,0x00,0x30,0xe7,
+0x02,0x7f,0x01,0xef,0x65,0x27,0x60,0x3e,0xc3,0x90,0x9e,0xa9,0xe0,0x94,0x88,0x90,
+0x9e,0xa8,0xe0,0x94,0x13,0x40,0x08,0x90,0x01,0xc6,0xe0,0x44,0x80,0xf0,0x22,0x90,
+0x9e,0xa8,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x7f,0x14,0x7e,0x00,0x12,0x37,0x54,
+0xd3,0x90,0x9e,0xa9,0xe0,0x94,0x32,0x90,0x9e,0xa8,0xe0,0x94,0x00,0x40,0xb9,0x90,
+0x01,0xc7,0xe0,0x30,0xe0,0xb2,0x22,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,
+0x01,0xf0,0x12,0x44,0xff,0x12,0x45,0x00,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x02,0xf0,
+0x22,0x90,0x9e,0x60,0xe0,0x30,0xe6,0x1c,0xe0,0x54,0x0f,0xff,0x90,0x9e,0x4e,0xe0,
+0xfe,0x4f,0x90,0x01,0x2f,0xf0,0xee,0x64,0x80,0x90,0x9e,0x4e,0xf0,0x90,0x9e,0x60,
+0xe0,0x54,0xbf,0xf0,0x22,0x8f,0x75,0x12,0x45,0xb1,0xef,0x64,0x01,0x70,0x2e,0x90,
+0x9e,0x6a,0x12,0x47,0xfa,0xe5,0x75,0x60,0x10,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,
+0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x80,0x0e,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,
+0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0xe4,0x90,
+0x9e,0x2f,0xf0,0xe5,0x74,0x60,0x6a,0xe5,0x73,0x64,0x01,0x70,0x64,0xe5,0x74,0x14,
+0x60,0x29,0x24,0xfd,0x60,0x25,0x24,0x02,0x24,0xfb,0x50,0x02,0x80,0x23,0x90,0x9e,
+0x50,0xe0,0x14,0xf0,0xe0,0x60,0x04,0xa3,0xe0,0x60,0x16,0x90,0x9e,0x50,0xe0,0x70,
+0x0a,0x90,0x9e,0x5f,0xe0,0x90,0x9e,0x50,0xf0,0x80,0x00,0x90,0x9e,0x2f,0x74,0x01,
+0xf0,0x90,0x9e,0x2f,0xe0,0x60,0x2a,0x90,0x9e,0x63,0xe0,0x44,0x10,0xf0,0xe4,0x90,
+0x9e,0x89,0xf0,0x90,0x9e,0x5a,0x12,0x44,0x56,0x90,0x01,0x57,0x74,0x05,0xf0,0x90,
+0x9e,0x5e,0xe0,0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,
+0x1a,0x22,0xef,0xc3,0x94,0x20,0x50,0x39,0xef,0x30,0xe0,0x17,0xed,0xc4,0x54,0xf0,
+0xfd,0xef,0xc3,0x13,0xfe,0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,
+0x0f,0x80,0x10,0xef,0xc3,0x13,0xfe,0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,
+0xe0,0x54,0xf0,0xf0,0x74,0xa4,0x2e,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x4d,
+0xf0,0x22,0xad,0x07,0xed,0xc3,0x94,0x20,0x50,0x0d,0x74,0x84,0x2d,0xf5,0x82,0xe4,
+0x34,0x04,0xf5,0x83,0xe0,0x80,0x0b,0x74,0xa6,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,
+0x83,0xe0,0x54,0x7f,0xf5,0x64,0xe5,0x64,0x54,0x1f,0xfc,0x75,0xf0,0x09,0xed,0x90,
+0x96,0x48,0x12,0x43,0x5f,0xe0,0xff,0x90,0x9e,0x3e,0xf0,0xed,0x25,0xe0,0x24,0x02,
+0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x3f,0xcb,0xf0,
+0xa3,0xeb,0xf0,0xed,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,
+0xfb,0xa3,0xe0,0x90,0x9e,0x41,0xcb,0xf0,0xa3,0xeb,0xf0,0xec,0x25,0xe0,0x24,0x66,
+0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfa,0x74,0x01,0x93,0xfb,0xed,0x25,
+0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xea,0xf0,0xa3,0xeb,0xf0,0xec,
+0xc3,0x9f,0x40,0x02,0xc1,0xc9,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,
+0xec,0xf0,0x04,0xfb,0x90,0x9e,0x3e,0xe0,0xff,0xeb,0xd3,0x9f,0x40,0x02,0xc1,0xfa,
+0xeb,0xc3,0x94,0x10,0x40,0x21,0xeb,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,
+0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,0x3f,0xe0,0x5e,
+0xfe,0xa3,0xe0,0x5f,0x4e,0x70,0x23,0xeb,0xc3,0x94,0x10,0x50,0x39,0x74,0x01,0x7e,
+0x00,0xa8,0x03,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,
+0x41,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x1c,0xeb,0x64,0x13,0x60,0x08,0xeb,
+0x64,0x12,0x60,0x03,0xbb,0x11,0x09,0x90,0x9e,0x3f,0xe0,0x30,0xe0,0x02,0x7b,0x18,
+0xac,0x03,0x8c,0x64,0x80,0x34,0x0b,0x80,0x8b,0x90,0x9e,0x3e,0xe0,0xfb,0x6c,0x70,
+0x69,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xec,0xf0,0x75,0xf0,0x09,
+0xed,0x90,0x96,0x4a,0x12,0x43,0x5f,0xe0,0xb4,0x01,0x0c,0xe5,0x64,0x20,0xe6,0x07,
+0xec,0x44,0x40,0xf5,0x64,0x80,0x03,0xaf,0x64,0x22,0xec,0x25,0xe0,0x24,0x9e,0xf5,
+0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xec,0x25,0xe0,
+0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,
+0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,
+0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0x80,0x5b,0xec,0xd3,0x9b,0x40,0x56,0x90,
+0x9e,0x3e,0xe0,0xff,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xef,0xf0,
+0xac,0x07,0x8f,0x64,0xec,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,
+0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xec,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,
+0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,
+0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,
+0xef,0xf0,0xaf,0x64,0x22,0x74,0x01,0x2d,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,
+0xf0,0xaf,0x05,0xe5,0x64,0x44,0x80,0xfd,0x12,0x58,0xf1,0xe5,0x64,0x44,0x80,0xff,
+0x22,0xac,0x07,0xec,0xc3,0x94,0x20,0x50,0x0d,0x74,0x84,0x2c,0xf5,0x82,0xe4,0x34,
+0x04,0xf5,0x83,0xe0,0x80,0x0b,0x74,0xa6,0x2c,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,
+0xe0,0x54,0x7f,0xf5,0x64,0xe5,0x64,0x54,0x1f,0xff,0x90,0x9e,0x40,0xf0,0x75,0xf0,
+0x09,0xec,0x90,0x96,0x49,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x42,0xf0,0x75,0xf0,0x09,
+0xec,0x90,0x96,0x48,0x12,0x43,0x5f,0xe0,0xfe,0x90,0x9e,0x43,0xf0,0xec,0x25,0xe0,
+0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x44,
+0xcb,0xf0,0xa3,0xeb,0xf0,0xec,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,
+0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x46,0xcb,0xf0,0xa3,0xeb,0xf0,0xef,0xd3,0x9e,
+0x40,0x0a,0x90,0x9e,0x43,0xe0,0x90,0x9e,0x40,0xf0,0xf5,0x64,0xed,0x70,0x02,0x21,
+0x07,0x90,0x9e,0x41,0xed,0xf0,0xe5,0x64,0x30,0xe6,0x0a,0x90,0x9e,0x40,0xe0,0xf5,
+0x64,0xa3,0xe0,0x14,0xf0,0x90,0x9e,0x41,0xe0,0x70,0x02,0x21,0x07,0x90,0x9e,0x40,
+0xe0,0xff,0xd3,0x94,0x00,0x50,0x02,0x21,0x07,0xe4,0x90,0x9e,0x3f,0xf0,0xef,0x14,
+0x90,0x9e,0x3e,0xf0,0x90,0x9e,0x42,0xe0,0xfd,0x90,0x9e,0x3e,0xe0,0xff,0xd3,0x9d,
+0x40,0x6b,0xef,0x94,0x10,0x40,0x21,0xef,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8,
+0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,0x46,0xe0,
+0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x70,0x27,0x90,0x9e,0x3e,0xe0,0xff,0xc3,0x94,0x10,
+0x50,0x33,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,
+0xd8,0xf9,0xff,0x90,0x9e,0x44,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x16,0x90,
+0x9e,0x3e,0xe0,0xf5,0x64,0xa3,0xe0,0x04,0xf0,0x90,0x9e,0x41,0xe0,0xff,0x90,0x9e,
+0x3f,0xe0,0x6f,0x60,0x08,0x90,0x9e,0x3e,0xe0,0x14,0xf0,0x80,0x87,0x90,0x9e,0x41,
+0xe0,0xff,0x90,0x9e,0x3f,0xe0,0xc3,0x9f,0x50,0x0d,0x90,0x9e,0x3e,0xe0,0xb5,0x05,
+0x06,0x90,0x9e,0x42,0xe0,0xf5,0x64,0xe5,0x64,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,
+0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xe5,0x64,0x25,0xe0,0x24,
+0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,
+0xc3,0x13,0xfe,0xef,0x13,0xff,0xec,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,
+0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xaf,0x04,0xad,0x64,0x12,0x58,0xf1,0xaf,0x64,
+0x22,0xe4,0xf5,0x59,0xe5,0x59,0xb4,0x20,0x14,0x90,0x9a,0xc5,0xe0,0x04,0xf0,0x90,
+0x95,0x01,0xe0,0xff,0x90,0x9a,0xc5,0xe0,0xb5,0x07,0x02,0xe4,0xf0,0x75,0xf0,0x09,
+0xe5,0x59,0x90,0x96,0x4b,0x12,0x43,0x5f,0xe0,0x64,0x01,0x60,0x02,0xe1,0x95,0xe5,
+0x59,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,
+0xd3,0x94,0x00,0xee,0x94,0x00,0x50,0x02,0xe1,0x95,0xe5,0x59,0x94,0x20,0x40,0x08,
+0x90,0x9a,0xc5,0xe0,0x60,0x02,0xe1,0xa0,0xe5,0x59,0x75,0xf0,0x0a,0xa4,0x24,0x00,
+0xf9,0x74,0x90,0x35,0xf0,0x75,0x5e,0x01,0xf5,0x5f,0x89,0x60,0xe5,0x59,0x25,0xe0,
+0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90,0x9e,0x38,
+0xcf,0xf0,0xa3,0xef,0xf0,0xe5,0x59,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x98,
+0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90,0x9e,0x3a,0xcf,0xf0,0xa3,0xef,0xf0,0xe5,0x59,
+0xc3,0x94,0x20,0x50,0x14,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,
+0xe0,0x54,0x3f,0x90,0x9e,0x34,0xf0,0x80,0x12,0x74,0xa6,0x25,0x59,0xf5,0x82,0xe4,
+0x34,0x9c,0xf5,0x83,0xe0,0x54,0x3f,0x90,0x9e,0x34,0xf0,0x90,0x9e,0x34,0xe0,0xfe,
+0x54,0x1f,0xa3,0xf0,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x48,0x12,0x43,0x5f,0xe0,
+0x90,0x9e,0x3d,0xf0,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,
+0xc3,0x94,0x05,0x40,0x02,0x81,0x6e,0x90,0x9e,0x3d,0xe0,0xff,0x90,0x9e,0x35,0xe0,
+0x9f,0x40,0x13,0x90,0x9e,0x3d,0xe0,0x90,0x9e,0x35,0xf0,0xee,0x54,0x40,0xfe,0x90,
+0x9e,0x34,0xf0,0xef,0x4e,0xf0,0x90,0x04,0xfd,0xe0,0x64,0x01,0x70,0x29,0x90,0x9e,
+0x35,0xe0,0xff,0x90,0x41,0x4a,0x93,0xfe,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,
+0x9a,0xf5,0x83,0xe0,0xc3,0x9e,0x40,0x06,0xef,0x90,0x40,0xda,0x80,0x30,0x90,0x9e,
+0x35,0xe0,0x90,0x40,0xf6,0x80,0x27,0x90,0x9e,0x35,0xe0,0xff,0x90,0x41,0x4a,0x93,
+0xfe,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xc3,0x9e,0x40,
+0x06,0xef,0x90,0x41,0x12,0x80,0x07,0x90,0x9e,0x35,0xe0,0x90,0x41,0x2e,0x93,0x90,
+0x9e,0x3c,0xf0,0x90,0x9e,0x3c,0xe0,0x75,0xf0,0x06,0xa4,0x24,0x50,0xf9,0x74,0x40,
+0x35,0xf0,0x75,0x5b,0xff,0xf5,0x5c,0x89,0x5d,0x90,0x9e,0x34,0xe0,0x90,0x41,0xf2,
+0x93,0xff,0xd3,0x90,0x9e,0x3b,0xe0,0x9f,0x90,0x9e,0x3a,0xe0,0x94,0x00,0x40,0x09,
+0xe4,0xfd,0xaf,0x59,0x12,0x67,0xb1,0xe1,0x2c,0xe5,0x59,0x25,0xe0,0x24,0xc2,0xf5,
+0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xf5,0x61,0xa3,0xe0,0xf5,0x62,0xab,0x5b,0xaa,
+0x5c,0xa9,0x5d,0x12,0x29,0xd9,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x12,
+0x42,0x97,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,
+0xf5,0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x7e,
+0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x02,0x12,0x42,0xc2,0xfd,0xac,0xf0,
+0x12,0x29,0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,0xaa,
+0x5c,0xa9,0x5d,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f,
+0xa9,0x60,0x90,0x00,0x04,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,
+0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,
+0x03,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x06,
+0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,
+0x61,0xf5,0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x04,0x12,0x42,0x20,0xff,
+0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x08,0x12,0x42,0xc2,0xfd,0xac,
+0xf0,0x12,0x29,0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,
+0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x05,0x12,0x42,0x20,0xff,0x7e,0x00,0x90,0x9e,0x38,
+0xe0,0xfc,0xa3,0xe0,0xfd,0x12,0x29,0xf2,0xd3,0xe5,0x62,0x9f,0xe5,0x61,0x9e,0x40,
+0x0c,0xe5,0x62,0x9f,0xf5,0x62,0xe5,0x61,0x9e,0xf5,0x61,0x80,0x05,0xe4,0xf5,0x61,
+0xf5,0x62,0xe5,0x59,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe5,
+0x61,0xf0,0xa3,0xe5,0x62,0xf0,0x90,0x9e,0x34,0xe0,0x25,0xe0,0x24,0x66,0xf5,0x82,
+0xe4,0x34,0x41,0xf5,0x83,0xc3,0x74,0x01,0x93,0x95,0x62,0xe4,0x93,0x95,0x61,0x50,
+0x07,0xaf,0x59,0x12,0x65,0xb2,0xe1,0x00,0x90,0x9e,0x34,0xe0,0x25,0xe0,0x24,0x9e,
+0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xd3,0x74,0x01,0x93,0x95,0x62,0xe4,0x93,0x95,
+0x61,0x50,0x02,0xe1,0x00,0x7d,0x01,0xaf,0x59,0x12,0x67,0xb1,0xe1,0x00,0x74,0xe6,
+0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xfc,0x64,0x05,0x60,0x02,0xc1,
+0x09,0x90,0x96,0x43,0xe0,0xff,0xb4,0x03,0x0b,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x19,
+0x40,0x3d,0x80,0x2e,0xef,0xb4,0x02,0x0b,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x11,0x40,
+0x2e,0x80,0x1f,0x90,0x96,0x43,0xe0,0xff,0xb4,0x01,0x0b,0x90,0x9e,0x35,0xe0,0xc3,
+0x94,0x0a,0x40,0x1b,0x80,0x0c,0xef,0x70,0x11,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x03,
+0x40,0x0d,0x90,0x9a,0x84,0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x9a,0x84,0xf0,0x74,
+0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe0,0xf5,0x63,0x74,0x44,0x25,
+0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xff,0xc3,0x94,0x30,0x50,0x02,0xa1,
+0xb6,0x90,0x9a,0x84,0xe0,0x64,0x01,0x60,0x02,0xa1,0xb6,0x74,0x85,0x25,0x59,0xf5,
+0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0x64,0x0a,0x60,0x51,0xef,0x24,0x05,0xff,0xe4,
+0x33,0xfe,0x74,0x41,0x25,0x59,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xfd,0xd3,
+0x9f,0xee,0x64,0x80,0xf8,0x74,0x80,0x98,0x50,0x32,0xed,0x24,0x05,0xff,0xe4,0x33,
+0xfe,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xd3,0x9f,0xee,
+0x64,0x80,0xf8,0x74,0x80,0x98,0x50,0x14,0x74,0x26,0x25,0x59,0xf5,0x82,0xe4,0x34,
+0x9d,0xf5,0x83,0xe0,0xff,0x90,0x9e,0x35,0xe0,0x6f,0x60,0x3d,0x74,0x44,0x25,0x59,
+0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xff,0xd3,0x94,0x42,0x40,0x05,0x75,0x63,
+0x05,0x80,0x0e,0xef,0xd3,0x94,0x39,0x40,0x05,0x75,0x63,0x03,0x80,0x03,0x75,0x63,
+0x01,0x74,0x41,0x25,0x59,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xef,0xf0,0x74,0x85,
+0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0x80,0x29,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,
+0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x74,0x85,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,
+0x83,0xe0,0x04,0xf0,0x80,0x10,0xe4,0xf5,0x63,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,
+0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x90,0x9e,0x35,0xe0,0xff,0x74,0x26,0x25,0x59,0xf5,
+0x82,0xe4,0x34,0x9d,0xf5,0x83,0xef,0xf0,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,
+0x98,0xf5,0x83,0xe5,0x63,0xf0,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x4c,0x12,0x43,
+0x5f,0xe0,0xb4,0x01,0x10,0xe4,0xf5,0x63,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,
+0x9c,0xf5,0x83,0xe4,0xf0,0xad,0x63,0xc1,0xfb,0xec,0x64,0x06,0x60,0x02,0xe1,0x00,
+0xf5,0x61,0xf5,0x62,0x90,0x42,0x13,0x93,0xff,0x7e,0x00,0x90,0x9e,0x38,0xe0,0xfc,
+0xa3,0xe0,0xfd,0x12,0x29,0xf2,0x90,0x9e,0x36,0xee,0xf0,0xa3,0xef,0xf0,0x74,0x84,
+0x25,0x59,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe0,0xf5,0x63,0xe4,0xf5,0x5a,0xab,
+0x5e,0xaa,0x5f,0xa9,0x60,0x75,0xf0,0x02,0xe5,0x5a,0xa4,0xf5,0x82,0x85,0xf0,0x83,
+0x12,0x42,0xc2,0xfd,0xac,0xf0,0xe5,0x5a,0x90,0x42,0x0e,0x93,0xff,0x7e,0x00,0x12,
+0x29,0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xc3,0x90,0x9e,0x37,
+0xe0,0x95,0x62,0x90,0x9e,0x36,0xe0,0x95,0x61,0x40,0x07,0x05,0x5a,0xe5,0x5a,0xb4,
+0x05,0xbd,0xe5,0x5a,0xc3,0x13,0xf5,0x5a,0xe5,0x63,0xb4,0x01,0x06,0xe5,0x5a,0x70,
+0x46,0x80,0x13,0xe5,0x63,0xb4,0x03,0x15,0xe5,0x5a,0x70,0x05,0x75,0x63,0x03,0x80,
+0x39,0xe5,0x5a,0xb4,0x01,0x05,0x75,0x63,0x01,0x80,0x2f,0x80,0x2a,0xe5,0x63,0xb4,
+0x05,0x28,0xe5,0x5a,0x70,0x05,0x75,0x63,0x05,0x80,0x0d,0xe5,0x5a,0xb4,0x01,0x05,
+0x75,0x63,0x03,0x80,0x03,0x75,0x63,0x01,0xd3,0x90,0x9e,0x3b,0xe0,0x94,0x03,0x90,
+0x9e,0x3a,0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x63,0xd3,0x90,0x9e,0x3b,0xe0,0x94,
+0x03,0x90,0x9e,0x3a,0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x63,0x74,0x84,0x25,0x59,
+0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe5,0x63,0xf0,0xfd,0xaf,0x59,0x12,0x65,0x72,
+0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xd3,0x94,0x05,0x74,
+0xe6,0x50,0x0e,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x04,0xf0,0x80,
+0x0b,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0xab,0x5e,0xaa,0x5f,
+0xa9,0x60,0xe4,0xf5,0xf0,0x12,0x42,0xfa,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,
+0x02,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x04,0xe4,0xf5,0xf0,0x12,0x43,0x19,
+0x90,0x00,0x06,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x08,0xe4,0xf5,0xf0,0x12,
+0x43,0x19,0xe5,0x59,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4,
+0xf0,0xa3,0xf0,0xe5,0x59,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,
+0xe4,0xf0,0xa3,0xf0,0xe5,0x59,0x25,0xe0,0x24,0x44,0xf5,0x82,0xe4,0x34,0x99,0xf5,
+0x83,0xe4,0xf0,0xa3,0xf0,0x05,0x59,0xe5,0x59,0xc3,0x94,0x40,0x50,0x02,0x21,0x54,
+0x22,0x90,0x04,0x44,0x74,0x11,0xf0,0xa3,0x74,0xf0,0xf0,0xa3,0x74,0x0f,0xf0,0xa3,
+0xe4,0xf0,0xfd,0x74,0xa4,0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe4,0xf0,0x0d,
+0xbd,0x10,0xf0,0xe4,0x90,0x9a,0xc5,0xf0,0x90,0x95,0x01,0x04,0xf0,0xe4,0xfd,0x75,
+0xf0,0x0a,0xed,0x90,0x90,0x00,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,
+0xed,0x90,0x90,0x02,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,
+0x90,0x04,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x06,
+0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x08,0x12,0x43,
+0x5f,0xe4,0xf0,0xa3,0xf0,0x74,0x26,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0x74,
+0x13,0xf0,0x74,0x85,0x2d,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe4,0xf0,0x74,0x84,
+0x2d,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0xf0,0xed,0x25,0xe0,0x24,0x80,0xf5,
+0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc4,0xf5,
+0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc4,0xf5,
+0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0x44,0xf5,
+0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc6,0xf5,
+0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0x46,0xf5,
+0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x74,0x86,0x2d,0xf5,0x82,0xe4,
+0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x74,0x46,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,
+0xe4,0xf0,0x74,0xe6,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x90,0x41,
+0xc4,0x93,0xfe,0x74,0x01,0x93,0xff,0x90,0x41,0x8c,0x74,0x01,0x93,0x2f,0xff,0xe4,
+0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,
+0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x4b,
+0x12,0x43,0x5f,0x74,0x01,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x4a,0x12,0x43,0x5f,
+0x74,0x01,0xf0,0x74,0x82,0x2d,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0c,0xf0,
+0x75,0xf0,0x09,0xed,0x90,0x96,0x46,0x12,0x43,0x5f,0x74,0xff,0xf0,0xa3,0xf0,0x75,
+0xf0,0x09,0xed,0x90,0x96,0x44,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0x74,0x0f,0xf0,0x75,
+0xf0,0x09,0xed,0x90,0x96,0x48,0x12,0x43,0x5f,0x74,0x13,0xf0,0x75,0xf0,0x09,0xed,
+0x90,0x96,0x49,0x12,0x43,0x5f,0xe4,0xf0,0xed,0xc3,0x94,0x20,0x50,0x0f,0x74,0x84,
+0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0x74,0x13,0xf0,0x80,0x0d,0x74,0xa6,0x2d,
+0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0x74,0x13,0xf0,0x0d,0xed,0x64,0x40,0x60,0x03,
+0x02,0x6f,0xcf,0x22,0x12,0x29,0xd9,0xf5,0x59,0xc3,0x94,0x40,0x50,0x15,0x90,0x00,
+0x02,0x12,0x42,0x20,0xff,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,
+0xef,0xf0,0x22,0xe5,0x59,0xb4,0x40,0x0a,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x96,
+0x42,0xf0,0x22,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x3f,0xfe,0xef,0x54,0x80,
+0xc4,0x13,0x13,0x13,0x54,0x01,0xfd,0xaf,0x06,0x02,0x53,0xa4,0x12,0x29,0xd9,0x90,
+0x95,0x01,0xf0,0x22,0x12,0x29,0xd9,0xf5,0x73,0x22,0x90,0x00,0x02,0x12,0x42,0x20,
+0xff,0x30,0xe0,0x25,0x12,0x29,0xd9,0x90,0x9e,0x56,0xf0,0x90,0x00,0x01,0x12,0x42,
+0x20,0x90,0x9e,0x57,0xf0,0xef,0xc3,0x13,0x54,0x7f,0x90,0x9e,0x55,0xf0,0x90,0x00,
+0x03,0x12,0x42,0x20,0x90,0x9e,0x5b,0xf0,0x22,0x90,0x9e,0x56,0x74,0x01,0xf0,0x90,
+0x9e,0x57,0x74,0x03,0xf0,0x90,0x9e,0x55,0x74,0x14,0xf0,0x90,0x9e,0x5b,0x74,0x05,
+0xf0,0x22,0x12,0x29,0xd9,0x30,0xe0,0x18,0xc3,0x13,0x54,0x7f,0x90,0x9e,0x5a,0xf0,
+0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x90,0x9e,0x58,0xe4,0xf0,0xa3,0xef,0xf0,0x22,
+0x90,0x9e,0x5a,0x74,0x07,0xf0,0x90,0x9e,0x58,0xe4,0xf0,0xa3,0x74,0x02,0xf0,0x22,
+0x90,0x02,0x09,0xe0,0xfd,0x12,0x29,0xd9,0xfe,0xaf,0x05,0xed,0x2e,0x90,0x9e,0x67,
+0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x9e,0x68,0xf0,0x90,0x00,
+0x02,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x9e,0x69,0xf0,0x90,0x00,0x03,0x12,0x42,
+0x20,0xff,0xed,0x2f,0x90,0x9e,0x6a,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0xae,
+0x05,0xed,0x2f,0x90,0x9e,0x6b,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,
+0x9e,0x3f,0x12,0x43,0x8b,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,
+0xc2,0xfa,0xe5,0xf0,0x24,0x00,0xff,0xe4,0x3a,0xfe,0x90,0x9e,0x3f,0x12,0x43,0x6b,
+0x90,0x00,0x01,0xee,0x8f,0xf0,0x12,0x43,0x19,0x12,0x29,0xd9,0xff,0x60,0x2c,0xb5,
+0x22,0x16,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,0x65,0x24,
+0x70,0x04,0xe5,0x23,0x65,0xf0,0x60,0x23,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,
+0x01,0x12,0x42,0xc2,0xff,0xae,0xf0,0x71,0x00,0x80,0x10,0x90,0x9e,0x3f,0x12,0x43,
+0x6b,0x12,0x29,0xd9,0x65,0x22,0x60,0x03,0x12,0x44,0xca,0xd0,0xd0,0x92,0xaf,0x22,
+0x90,0x9e,0x42,0xee,0xf0,0xa3,0xef,0xf0,0x75,0x22,0x01,0x8e,0x23,0xf5,0x24,0xe4,
+0xfd,0x7f,0x0b,0x71,0x44,0xe4,0xfd,0x7f,0x02,0x71,0x44,0x12,0x4f,0xbe,0xe4,0xff,
+0x12,0x44,0xf1,0xe4,0xf5,0x26,0x90,0x01,0xc9,0xe5,0x26,0xf0,0x90,0x9e,0x42,0xe0,
+0xfc,0xa3,0xe0,0xfd,0xec,0xfb,0x8d,0x44,0xe4,0xf5,0x45,0x7d,0x01,0x7f,0x60,0x7e,
+0x01,0x02,0x35,0xab,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x45,0xed,0xf0,
+0x90,0x9e,0x44,0xef,0xf0,0xd3,0x94,0x07,0x50,0x4f,0xa3,0xe0,0x70,0x1a,0x90,0x9e,
+0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,
+0x90,0x00,0x47,0xe0,0x5f,0xf0,0x80,0x17,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,
+0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x47,0xe0,0x4f,0xf0,0x12,
+0x49,0xb9,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,
+0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0x80,0x5a,0x90,0x9e,0x44,0xe0,0x24,0xf8,0xf0,
+0xa3,0xe0,0x70,0x1d,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,
+0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x80,
+0x1a,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,
+0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,0x43,0xe0,0x4f,0xf0,0x12,0x49,0xb9,0x90,0x9e,
+0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,
+0x90,0x00,0x43,0xe0,0x5f,0xf0,0x12,0x49,0xb9,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,
+0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x6d,0xe0,0x90,0x9e,0x40,0xf0,0x90,0x9e,0x6e,
+0xe0,0xf5,0x64,0xa3,0xe0,0xf5,0x65,0xe4,0xf5,0x61,0x74,0x70,0x25,0x61,0xf5,0x82,
+0xe4,0x34,0x9e,0xf5,0x83,0xe0,0xff,0x74,0x66,0x25,0x61,0xf8,0xa6,0x07,0x05,0x61,
+0xe5,0x61,0xb4,0x04,0xe5,0x90,0x9e,0x40,0xe0,0x12,0x43,0x94,0x74,0x6b,0x00,0x75,
+0x93,0x01,0x74,0x71,0x02,0x74,0x71,0x03,0x74,0x71,0x04,0x75,0x93,0x05,0x75,0x63,
+0x80,0x75,0x79,0x81,0x75,0x93,0x82,0x00,0x00,0x75,0x8f,0xaf,0x69,0xb1,0x9a,0xa1,
+0x93,0x90,0x9e,0x40,0xe0,0xff,0xb4,0x02,0x08,0x90,0x9e,0x3f,0x74,0x01,0xf0,0x80,
+0x0f,0xef,0x90,0x9e,0x3f,0xb4,0x03,0x05,0x74,0x02,0xf0,0x80,0x03,0x74,0x04,0xf0,
+0xc3,0xe5,0x64,0x94,0x08,0x50,0x49,0xe4,0xf5,0x61,0x90,0x9e,0x3f,0xe0,0xff,0xe5,
+0x61,0xc3,0x9f,0x40,0x02,0xa1,0x93,0xc3,0xe5,0x64,0x94,0x01,0x50,0x14,0xe5,0x61,
+0x25,0x65,0xff,0xc3,0x74,0x03,0x95,0x61,0x24,0x66,0xf8,0xe6,0xfd,0x12,0x4a,0xc1,
+0x80,0x1a,0xc3,0x74,0x03,0x95,0x61,0x24,0x66,0xf8,0xe6,0xff,0xe5,0x61,0x7c,0x00,
+0x25,0x65,0xfd,0xec,0x35,0x64,0x8d,0x82,0xf5,0x83,0xef,0xf0,0x05,0x61,0x80,0xba,
+0xc3,0xe5,0x64,0x94,0x10,0x40,0x02,0xa1,0x93,0x90,0x9e,0x40,0xe0,0x64,0x04,0x60,
+0x02,0xa1,0x93,0xaf,0x67,0xfc,0xfd,0xfe,0x78,0x10,0x12,0x2a,0x6c,0xc0,0x04,0xc0,
+0x05,0xc0,0x06,0xc0,0x07,0xaf,0x66,0xe4,0xfc,0xfd,0xfe,0x78,0x18,0x12,0x2a,0x6c,
+0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0x12,0x43,0x46,0xc0,0x04,0xc0,0x05,0xc0,
+0x06,0xc0,0x07,0xaf,0x68,0xe4,0xfc,0xfd,0xfe,0x78,0x08,0x12,0x2a,0x6c,0xd0,0x03,
+0xd0,0x02,0xd0,0x01,0xd0,0x00,0x12,0x43,0x46,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,
+0x07,0xaf,0x69,0xe4,0xfc,0xfd,0xfe,0x12,0x43,0x46,0xa3,0x12,0x2a,0x7f,0x90,0x9e,
+0x41,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0xaf,0x65,0xae,0x64,0x12,0x2f,
+0xd9,0x80,0x30,0xe5,0x68,0x7f,0x00,0xfe,0xef,0x25,0x69,0xf5,0x63,0xe4,0x3e,0xf5,
+0x62,0xaf,0x63,0xfe,0x12,0x37,0x54,0x80,0x1a,0xe5,0x68,0x7f,0x00,0xfe,0xef,0x25,
+0x69,0xf5,0x63,0xe4,0x3e,0xf5,0x62,0xaf,0x63,0xfe,0x12,0x36,0xcb,0x80,0x04,0x7f,
+0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x6a,0xe4,0x90,0x9e,0x45,
+0xf0,0xe5,0x6a,0x14,0xfe,0x90,0x9e,0x45,0xe0,0xff,0xc3,0x9e,0x50,0x0e,0xef,0x04,
+0xfd,0x12,0x34,0xb7,0x90,0x9e,0x45,0xe0,0x04,0xf0,0x80,0xe5,0xe5,0x6a,0x14,0xff,
+0x7d,0xff,0x12,0x34,0xb7,0x90,0x9e,0x45,0xe5,0x6a,0xf0,0x90,0x9e,0x45,0xe0,0xc3,
+0x94,0xff,0x50,0x0f,0xe0,0xff,0x04,0xfd,0x12,0x34,0xb7,0x90,0x9e,0x45,0xe0,0x04,
+0xf0,0x80,0xe8,0xad,0x6a,0x7f,0xff,0x02,0x34,0xb7,0xd3,0x10,0xaf,0x01,0xc3,0xc0,
+0xd0,0xe4,0xf5,0x5b,0x75,0x5c,0x04,0xf5,0x5d,0xf5,0x5f,0xf5,0x60,0x90,0x02,0x09,
+0xe0,0xff,0x12,0x29,0xd9,0xfe,0xef,0x2e,0xf5,0x5e,0x30,0xe0,0x08,0x75,0x59,0x00,
+0x75,0x5a,0x80,0x80,0x05,0xe4,0xf5,0x59,0xf5,0x5a,0xe5,0x5e,0xc3,0x13,0x90,0xfd,
+0x10,0xf0,0x74,0x20,0x25,0x5b,0xf5,0x5b,0xad,0x5a,0xe5,0x5b,0x2d,0xff,0x24,0x01,
+0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x90,0x9e,0x6d,0xf0,0x74,0x02,0x2f,0xf5,
+0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0xfe,0xe5,0x5b,0x2d,0x24,0x03,0xf5,0x82,0xe4,
+0x34,0xfc,0xf5,0x83,0xe0,0x24,0x00,0xff,0xe4,0x3e,0x90,0x9e,0x6e,0xf0,0xa3,0xef,
+0xf0,0x7f,0x04,0xe5,0x5b,0x25,0x5a,0x2f,0x24,0x00,0xf5,0x82,0xe4,0x34,0xfc,0xf5,
+0x83,0xe0,0xfe,0x74,0x6c,0x2f,0xf5,0x82,0xe4,0x34,0x9e,0xf5,0x83,0xee,0xf0,0x0f,
+0xbf,0x08,0xe0,0x91,0x0e,0xef,0x70,0x3f,0x90,0x01,0xc3,0xe0,0x60,0x25,0xc3,0xe5,
+0x60,0x94,0xe8,0xe5,0x5f,0x94,0x03,0x40,0x09,0x90,0x01,0xc6,0xe0,0x44,0x10,0xf0,
+0x80,0x63,0x05,0x60,0xe5,0x60,0x70,0x02,0x05,0x5f,0x7f,0x0a,0x7e,0x00,0x12,0x37,
+0x54,0x80,0xd5,0x90,0x01,0xc6,0xe0,0x90,0x01,0xc3,0x30,0xe2,0x05,0x74,0xfe,0xf0,
+0x80,0x43,0x74,0xff,0xf0,0x80,0x3e,0xe5,0x5b,0xb4,0x78,0x23,0xe4,0xf5,0x5b,0x05,
+0x5e,0xe5,0x5a,0x64,0x80,0x45,0x59,0x70,0x06,0xf5,0x59,0xf5,0x5a,0x80,0x06,0x75,
+0x59,0x00,0x75,0x5a,0x80,0xe5,0x5e,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x80,0x06,0x74,
+0x08,0x25,0x5b,0xf5,0x5b,0xe5,0x5d,0x15,0x5d,0x70,0x02,0x15,0x5c,0xe5,0x5d,0x45,
+0x5c,0x60,0x02,0xc1,0x28,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x06,0x34,0x74,0xff,0xf0,
+0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x22,0xe4,0xf5,0x25,0x22,0xe4,0x90,0x9e,0xaa,
+0xf0,0xa3,0xf0,0x90,0x05,0xf8,0xe0,0x70,0x0f,0xa3,0xe0,0x70,0x0b,0xa3,0xe0,0x70,
+0x07,0xa3,0xe0,0x70,0x03,0x7f,0x01,0x22,0xd3,0x90,0x9e,0xab,0xe0,0x94,0xe8,0x90,
+0x9e,0xaa,0xe0,0x94,0x03,0x40,0x03,0x7f,0x00,0x22,0x7f,0x32,0x7e,0x00,0x12,0x37,
+0x54,0x90,0x9e,0xaa,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x80,0xc6,0x90,0x9e,0x77,
+0xe0,0x90,0x9e,0x0f,0xf0,0x22,0xef,0x70,0x03,0x02,0x79,0x1e,0x90,0x9e,0x0f,0xe0,
+0x60,0x03,0x02,0x7c,0xe9,0x90,0x9d,0xfb,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,
+0x7f,0x7f,0x8c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9d,0xa7,0x12,0x43,0x53,0x90,0x80,
+0x85,0x12,0x2a,0x7f,0x7f,0x44,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9d,0xab,0x12,0x43,
+0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x5c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9d,
+0xaf,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x6c,0x7e,0x0e,0x12,0x2f,
+0xd9,0x90,0x9d,0xb3,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x70,0x7e,
+0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xb7,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,
+0x7f,0x74,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xbb,0x12,0x43,0x53,0x90,0x80,0x85,
+0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xbf,0x12,0x43,0x53,
+0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x7c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xc3,
+0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x0e,0x12,0x2f,0xd9,
+0x90,0x9d,0xc7,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x84,0x7e,0x0e,
+0x12,0x2f,0xd9,0x90,0x9d,0xcb,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,
+0x88,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xcf,0x12,0x43,0x53,0x90,0x80,0x85,0x12,
+0x2a,0x7f,0x7f,0x8c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xd3,0x12,0x43,0x53,0x90,
+0x80,0x85,0x12,0x2a,0x7f,0x7f,0xd0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xd7,0x12,
+0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xd4,0x7e,0x0e,0x12,0x2f,0xd9,0x90,
+0x9d,0xdb,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xd8,0x7e,0x0e,0x12,
+0x2f,0xd9,0x90,0x9d,0xdf,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xdc,
+0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xe3,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,
+0x7f,0x7f,0xe0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xe7,0x12,0x43,0x53,0x90,0x80,
+0x85,0x12,0x2a,0x7f,0x7f,0xec,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xeb,0x12,0x43,
+0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x9d,
+0xef,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x2f,
+0xd9,0x90,0x9d,0xf3,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,
+0x09,0x12,0x2f,0xd9,0x90,0x9d,0xf7,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,
+0x7f,0x04,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9e,0x0f,0x74,0x01,0xf0,0x22,0x90,0x9e,
+0x0f,0xe0,0x64,0x01,0x60,0x02,0x81,0xe9,0x7f,0x8c,0x7e,0x08,0x12,0x27,0xde,0x90,
+0x9d,0xfb,0x12,0x2a,0x7f,0x7f,0x44,0x7e,0x08,0x12,0x27,0xde,0x90,0x9d,0xa7,0x12,
+0x2a,0x7f,0x7f,0x5c,0x7e,0x08,0x12,0x27,0xde,0x90,0x9d,0xab,0x12,0x2a,0x7f,0x7f,
+0x6c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xaf,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,
+0x12,0x27,0xde,0x90,0x9d,0xb3,0x12,0x2a,0x7f,0x7f,0x74,0x7e,0x0e,0x12,0x27,0xde,
+0x90,0x9d,0xb7,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xbb,
+0x12,0x2a,0x7f,0x7f,0x7c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xbf,0x12,0x2a,0x7f,
+0x7f,0x80,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xc3,0x12,0x2a,0x7f,0x7f,0x84,0x7e,
+0x0e,0x12,0x27,0xde,0x90,0x9d,0xc7,0x12,0x2a,0x7f,0x7f,0x88,0x7e,0x0e,0x12,0x27,
+0xde,0x90,0x9d,0xcb,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,
+0xcf,0x12,0x2a,0x7f,0x7f,0xd0,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xd3,0x12,0x2a,
+0x7f,0x7f,0xd4,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xd7,0x12,0x2a,0x7f,0x7f,0xd8,
+0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xdb,0x12,0x2a,0x7f,0x7f,0xdc,0x7e,0x0e,0x12,
+0x27,0xde,0x90,0x9d,0xdf,0x12,0x2a,0x7f,0x7f,0xe0,0x7e,0x0e,0x12,0x27,0xde,0x90,
+0x9d,0xe3,0x12,0x2a,0x7f,0x7f,0xec,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xe7,0x12,
+0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,0x9d,0xeb,0x12,0x2a,0x7f,0x7f,
+0x04,0x7e,0x0d,0x12,0x27,0xde,0x90,0x9d,0xef,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,
+0x12,0x27,0xde,0x90,0x9d,0xf3,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08,0x12,0x27,0xde,
+0x90,0x9d,0xf7,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0xa4,
+0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0xed,0x44,0xc0,0xfd,0xec,0x90,0x9e,
+0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,
+0x7f,0x8c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x01,0x00,
+0x00,0x7f,0x44,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0xdb,
+0x25,0xa4,0x7f,0x5c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,
+0xdb,0x25,0xa4,0x7f,0x6c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,
+0x20,0xdb,0x25,0xa4,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,
+0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x74,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,
+0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x78,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,
+0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x7c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,
+0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x80,0x7e,0x0e,0x12,0x2f,0xd9,0x90,
+0x80,0x85,0x12,0x2a,0x8b,0x63,0xdb,0x25,0xa4,0x7f,0x84,0x7e,0x0e,0x12,0x2f,0xd9,
+0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x88,0x7e,0x0e,0x12,0x2f,
+0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0x8c,0x7e,0x0e,0x12,
+0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd0,0x7e,0x0e,
+0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd4,0x7e,
+0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd8,
+0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa4,0x7f,
+0xdc,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa4,
+0x7f,0xe0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x24,0xdb,0x25,
+0xa4,0x7f,0xec,0x7e,0x0e,0x12,0x2f,0xd9,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,
+0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0xe4,0xff,0xec,0x90,0x9e,
+0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x44,0x11,0xff,0xec,0x90,
+0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,
+0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x7f,0x04,0x7e,0x0d,0x12,0x27,0xde,0x90,
+0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x54,0xf0,0xff,0xec,
+0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x44,0x01,0xff,
+0xec,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x85,
+0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x2f,0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27,
+0xde,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0xe4,0xff,0xec,
+0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x44,0x11,0xff,
+0xec,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x85,
+0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f,0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27,
+0xde,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0xed,0x54,0x0f,
+0xfd,0xec,0x54,0xf0,0xfc,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,
+0x53,0xed,0x44,0x10,0xfd,0xec,0x44,0x01,0xfc,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,
+0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,
+0x2f,0xd9,0x7f,0x04,0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,
+0x9e,0xa4,0x12,0x43,0x53,0xef,0x54,0xf0,0xff,0xec,0x90,0x9e,0xa4,0x12,0x2a,0x7f,
+0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x44,0x01,0xff,0xec,0x90,0x9e,0xa4,0x12,0x2a,
+0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,
+0x08,0x12,0x2f,0xd9,0xe4,0x90,0x9e,0x0f,0xf0,0x22,0x90,0x00,0x02,0x12,0x42,0x20,
+0x90,0x9e,0x1e,0xf0,0xe0,0x60,0x04,0xe0,0xf4,0x70,0x21,0xa2,0xaf,0xe4,0x33,0xf5,
+0x59,0xc2,0xaf,0x90,0x00,0x47,0xe0,0x54,0xfb,0xfd,0x7f,0x47,0x12,0x4a,0xc1,0x7d,
+0x40,0x7f,0x01,0x12,0x36,0xaf,0xe5,0x59,0x24,0xff,0x92,0xaf,0x22,0xe4,0xfd,0x7f,
+0x45,0x12,0x4a,0xc1,0x90,0x04,0xfd,0xe4,0xf0,0xa3,0xf0,0x90,0x9e,0x1e,0xf0,0x90,
+0x9e,0x24,0xf0,0x90,0x9e,0x27,0xf0,0x90,0x9e,0x25,0xf0,0x90,0x9e,0x28,0xf0,0x90,
+0x9e,0x26,0xf0,0x90,0x9e,0x29,0xf0,0x90,0x9e,0x10,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,
+0xf0,0xa3,0xf0,0x90,0x9e,0x15,0xf0,0x90,0x9e,0x1a,0xf0,0x90,0x9e,0x1c,0xf0,0x90,
+0x9e,0x2e,0xf0,0x90,0x9e,0x1f,0xf0,0x90,0x9e,0x1b,0xf0,0x90,0x9e,0x14,0xf0,0x90,
+0x00,0x51,0xe0,0x44,0xc0,0xfd,0x7f,0x51,0x02,0x4a,0xc1,0x90,0x9e,0x15,0xe0,0xc3,
+0x94,0x14,0x50,0x05,0xe0,0x04,0xf0,0xc1,0x33,0x90,0x9e,0x15,0xe0,0x64,0x14,0x60,
+0x02,0xc1,0x33,0x90,0x9e,0x24,0xe0,0x70,0x25,0x90,0x9e,0x27,0xe0,0x70,0x1f,0x90,
+0x9e,0x25,0xe0,0x70,0x19,0x90,0x9e,0x28,0xe0,0x70,0x13,0x90,0x9e,0x26,0xe0,0x70,
+0x0d,0x90,0x9e,0x29,0xe0,0x70,0x07,0x90,0x04,0xfd,0xe0,0x54,0xfe,0xf0,0x90,0x9e,
+0x24,0xe0,0x90,0x04,0x44,0xf0,0x90,0x9e,0x25,0xe0,0x90,0x04,0x45,0xf0,0x90,0x9e,
+0x26,0xe0,0x90,0x04,0x46,0xf0,0xa3,0xe4,0xf0,0x90,0x9e,0x27,0xe0,0x90,0x04,0x48,
+0xf0,0x90,0x9e,0x28,0xe0,0x90,0x04,0x49,0xf0,0x90,0x9e,0x29,0xe0,0x90,0x04,0x4a,
+0xf0,0xa3,0xe4,0xf0,0x90,0x9e,0x10,0xe0,0x90,0x04,0x4c,0xf0,0x90,0x9e,0x11,0xe0,
+0x90,0x04,0x4d,0xf0,0x90,0x9e,0x12,0xe0,0x90,0x04,0x4e,0xf0,0x90,0x9e,0x13,0xe0,
+0x90,0x04,0x4f,0xf0,0xe4,0x90,0x9e,0x15,0xf0,0x90,0x9e,0x10,0x04,0xf0,0xe4,0xa3,
+0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x9e,0x24,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,
+0xf0,0xa3,0xf0,0x90,0x05,0x60,0xe0,0x90,0x9e,0x34,0xf0,0x90,0x05,0x61,0xe0,0x90,
+0x9e,0x35,0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x36,0xf0,0x90,0x05,0x63,0xe0,0x90,
+0x9e,0x37,0xf0,0x90,0x9e,0x2d,0xe0,0xff,0x90,0x9e,0x37,0xe0,0xfe,0xd3,0x9f,0x50,
+0x0b,0x90,0x9e,0x2d,0xe0,0xc3,0x9e,0xd3,0x94,0x01,0x40,0x11,0x90,0x9e,0x1b,0xe0,
+0xb4,0x01,0x02,0x80,0x03,0x90,0x9e,0x1f,0xe0,0xff,0x12,0x4e,0xd8,0x22,0x90,0x9e,
+0x2e,0xe0,0x64,0x01,0x60,0x08,0x90,0x9e,0x1c,0xe0,0x60,0x02,0xe1,0x55,0x90,0x9e,
+0x10,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x3b,0x90,0x9e,0x11,0xe0,
+0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x28,0x90,0x9e,0x12,0xe0,0xc3,
+0x94,0xff,0x50,0x0a,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x11,0xf0,0x80,0x15,0x90,0x9e,
+0x13,0xe0,0xc3,0x94,0xff,0x50,0x10,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x12,0xf0,0x90,
+0x9e,0x11,0xf0,0x90,0x9e,0x10,0xf0,0x90,0x00,0x44,0xe0,0x54,0x0c,0x60,0x76,0xe0,
+0x30,0xe2,0x32,0x90,0x9e,0x24,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,
+0x24,0x90,0x9e,0x25,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,
+0x90,0x9e,0x26,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x25,
+0xf0,0x90,0x9e,0x24,0xf0,0x90,0x00,0x44,0xe0,0x30,0xe3,0x32,0x90,0x9e,0x27,0xe0,
+0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,0x9e,0x28,0xe0,0xc3,0x94,
+0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,0x9e,0x29,0xe0,0xc3,0x94,0xff,
+0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x28,0xf0,0x90,0x9e,0x27,0xf0,0x90,0x04,
+0xfd,0xe0,0x44,0x01,0xf0,0x22,0x3a,0x01,};
+
+// =================== v79 UMC A Cut COMMON 2011-10-06 =====================
+u8 Rtl8192CUFwUMCACutImgArray[UMCACutImgArrayLength] = {
+0xc1,0x88,0x02,0x00,0x4f,0x00,0x00,0x00,0x0a,0x06,0x18,0x09,0x58,0x3f,0x01,0x00,
+0x61,0x80,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x02,0x43,0xba,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x02,0x5a,0x45,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x02,0x5f,0xfb,0x00,0x00,0x00,0x00,0x00,0xa1,0xdf,0x00,0x00,0x00,
+0x05,0x04,0x03,0x02,0x00,0x03,0x06,0x05,0x04,0x03,0x00,0x04,0x06,0x05,0x04,0x02,
+0x00,0x04,0x08,0x07,0x06,0x04,0x00,0x06,0x0a,0x09,0x08,0x06,0x00,0x08,0x0a,0x09,
+0x08,0x04,0x00,0x08,0x0a,0x09,0x08,0x02,0x00,0x08,0x0a,0x09,0x08,0x00,0x00,0x08,
+0x12,0x11,0x10,0x08,0x00,0x10,0x1a,0x19,0x18,0x10,0x00,0x18,0x22,0x21,0x20,0x18,
+0x00,0x20,0x22,0x21,0x20,0x10,0x00,0x20,0x22,0x21,0x20,0x08,0x00,0x20,0x22,0x21,
+0x1c,0x08,0x00,0x20,0x22,0x21,0x14,0x08,0x00,0x20,0x22,0x20,0x18,0x08,0x00,0x20,
+0x31,0x30,0x20,0x10,0x00,0x30,0x31,0x30,0x18,0x00,0x00,0x30,0x31,0x2f,0x10,0x10,
+0x00,0x30,0x31,0x2c,0x10,0x10,0x00,0x30,0x31,0x28,0x10,0x00,0x00,0x30,0x31,0x20,
+0x10,0x00,0x00,0x30,0x31,0x10,0x10,0x00,0x00,0x30,0x04,0x04,0x04,0x05,0x04,0x04,
+0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04,
+0x05,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x05,0x05,0x05,0x05,0x06,0x07,0x0a,0x0b,
+0x0d,0x10,0x04,0x05,0x05,0x06,0x06,0x09,0x0c,0x11,0x08,0x08,0x09,0x09,0x0a,0x0c,
+0x10,0x11,0x04,0x04,0x04,0x05,0x04,0x04,0x05,0x07,0x07,0x07,0x08,0x0a,0x04,0x04,
+0x04,0x04,0x06,0x0a,0x0b,0x0d,0x05,0x05,0x07,0x07,0x08,0x0b,0x0d,0x0f,0x04,0x04,
+0x04,0x05,0x07,0x07,0x09,0x09,0x0c,0x0e,0x10,0x12,0x04,0x04,0x05,0x05,0x06,0x0a,
+0x11,0x13,0x09,0x09,0x09,0x09,0x0c,0x0e,0x11,0x13,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x24,0x26,0x2a,0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a,0x00,0x00,
+0x00,0x1f,0x23,0x28,0x2a,0x2c,0x00,0x04,0x00,0x04,0x00,0x08,0x00,0x10,0x00,0x18,
+0x00,0x24,0x00,0x30,0x00,0x48,0x00,0x60,0x00,0x90,0x00,0xc0,0x00,0xd8,0x00,0x50,
+0x00,0x78,0x00,0xa0,0x00,0xc8,0x01,0x40,0x01,0x90,0x01,0xe0,0x02,0x30,0x01,0x2c,
+0x01,0x40,0x01,0xe0,0x02,0xd0,0x03,0xe8,0x04,0xb0,0x06,0x40,0x07,0xd0,0x00,0x02,
+0x00,0x02,0x00,0x04,0x00,0x08,0x00,0x0c,0x00,0x12,0x00,0x18,0x00,0x24,0x00,0x30,
+0x00,0x48,0x00,0x60,0x00,0x6c,0x00,0x28,0x00,0x3c,0x00,0x50,0x00,0x64,0x00,0xa0,
+0x00,0xc8,0x00,0xf0,0x01,0x18,0x00,0x64,0x00,0xa0,0x00,0xf0,0x01,0x68,0x01,0xf4,
+0x02,0x58,0x03,0x20,0x03,0xe8,0x02,0x02,0x02,0x02,0x02,0x02,0x03,0x03,0x04,0x04,
+0x05,0x07,0x04,0x04,0x07,0x0a,0x0a,0x0c,0x0c,0x12,0x05,0x07,0x07,0x08,0x0b,0x12,
+0x24,0x3c,0x01,0x01,0x01,0x01,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x01,0x02,
+0x03,0x04,0x05,0x06,0x07,0x08,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x20,0x1e,
+0x1c,0x18,0x10,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0xbb,0x01,0x0c,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0x22,0x50,
+0x06,0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,0x25,0x82,0xf8,0xe2,0x22,
+0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe4,0x93,0x22,0xbb,0x01,0x06,
+0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8,
+0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22,
+0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2,
+0x22,0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0,0xc5,0xf0,0xf8,0xe5,0x82,0x15,0x82,0x70,
+0x02,0x15,0x83,0xe0,0x38,0xf0,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a,0x83,0xe0,0xf5,
+0xf0,0xa3,0xe0,0x22,0x50,0x06,0x87,0xf0,0x09,0xe7,0x19,0x22,0xbb,0xfe,0x07,0xe3,
+0xf5,0xf0,0x09,0xe3,0x19,0x22,0x89,0x82,0x8a,0x83,0xe4,0x93,0xf5,0xf0,0x74,0x01,
+0x93,0x22,0xbb,0x01,0x10,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,
+0xf5,0xf0,0xa3,0xe0,0x22,0x50,0x09,0xe9,0x25,0x82,0xf8,0x86,0xf0,0x08,0xe6,0x22,
+0xbb,0xfe,0x0a,0xe9,0x25,0x82,0xf8,0xe2,0xf5,0xf0,0x08,0xe2,0x22,0xe5,0x83,0x2a,
+0xf5,0x83,0xe9,0x93,0xf5,0xf0,0xa3,0xe9,0x93,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a,
+0x83,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x06,0xf7,0x09,0xa7,0xf0,0x19,0x22,0xbb,
+0xfe,0x06,0xf3,0xe5,0xf0,0x09,0xf3,0x19,0x22,0xf8,0xbb,0x01,0x11,0xe5,0x82,0x29,
+0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x09,
+0xe9,0x25,0x82,0xc8,0xf6,0x08,0xa6,0xf0,0x22,0xbb,0xfe,0x09,0xe9,0x25,0x82,0xc8,
+0xf2,0xe5,0xf0,0x08,0xf2,0x22,0xef,0x4b,0xff,0xee,0x4a,0xfe,0xed,0x49,0xfd,0xec,
+0x48,0xfc,0x22,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0xa4,
+0x25,0x82,0xf5,0x82,0xe5,0xf0,0x35,0x83,0xf5,0x83,0x22,0xe0,0xfb,0xa3,0xe0,0xfa,
+0xa3,0xe0,0xf9,0x22,0xf8,0xe0,0xfb,0xa3,0xa3,0xe0,0xf9,0x25,0xf0,0xf0,0xe5,0x82,
+0x15,0x82,0x70,0x02,0x15,0x83,0xe0,0xfa,0x38,0xf0,0x22,0xeb,0xf0,0xa3,0xea,0xf0,
+0xa3,0xe9,0xf0,0x22,0xd0,0x83,0xd0,0x82,0xf8,0xe4,0x93,0x70,0x12,0x74,0x01,0x93,
+0x70,0x0d,0xa3,0xa3,0x93,0xf8,0x74,0x01,0x93,0xf5,0x82,0x88,0x83,0xe4,0x73,0x74,
+0x02,0x93,0x68,0x60,0xef,0xa3,0xa3,0xa3,0x80,0xdf,0x02,0x43,0xf8,0x02,0x50,0xa9,
+0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0x40,0x03,0xf6,0x80,0x01,0xf2,0x08,0xdf,0xf4,
+0x80,0x29,0xe4,0x93,0xa3,0xf8,0x54,0x07,0x24,0x0c,0xc8,0xc3,0x33,0xc4,0x54,0x0f,
+0x44,0x20,0xc8,0x83,0x40,0x04,0xf4,0x56,0x80,0x01,0x46,0xf6,0xdf,0xe4,0x80,0x0b,
+0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,0x90,0x44,0x3d,0xe4,0x7e,0x01,0x93,0x60,
+0xbc,0xa3,0xff,0x54,0x3f,0x30,0xe5,0x09,0x54,0x1f,0xfe,0xe4,0x93,0xa3,0x60,0x01,
+0x0e,0xcf,0x54,0xc0,0x25,0xe0,0x60,0xa8,0x40,0xb8,0xe4,0x93,0xa3,0xfa,0xe4,0x93,
+0xa3,0xf8,0xe4,0x93,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xf0,0xa3,0xc8,
+0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xdf,0xe9,0xde,0xe7,0x80,0xbe,0x41,0x9e,0x66,
+0x00,0x41,0x9e,0xae,0x00,0x41,0x9e,0x4d,0x80,0x41,0x9e,0x4e,0x80,0x41,0x9e,0xb0,
+0x00,0x00,0xf0,0x90,0x9e,0x57,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x54,
+0x7e,0x01,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x88,0xeb,0xf0,0xa3,0xe0,
+0xfb,0xa3,0xe0,0xf5,0x44,0xe4,0xf5,0x45,0x12,0x30,0x62,0xd0,0xd0,0x92,0xaf,0x22,
+0x90,0x01,0x5f,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x08,0xf0,0xe4,0x90,0x9e,0x89,0xf0,
+0x90,0x9e,0x55,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91,
+0x62,0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,0x90,0x9e,0x5c,
+0x14,0xf0,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0xc3,0x94,0x0c,0x50,0x02,0xf1,0x16,0x22,
+0x8f,0x82,0x8e,0x83,0xa3,0xa3,0xa3,0xe4,0xf0,0x22,0xe4,0xf5,0x22,0x7f,0x60,0x7e,
+0x01,0x80,0xed,0x90,0x9e,0x60,0xe0,0xff,0x7d,0x01,0xe1,0x1a,0xb1,0xb1,0xbf,0x01,
+0x0f,0x90,0x9e,0x68,0xe0,0xff,0xe4,0xfd,0xf1,0xfe,0x90,0x04,0x1f,0x74,0x20,0xf0,
+0x22,0x90,0x01,0xca,0xe5,0x25,0xf0,0xef,0x60,0x03,0x12,0x4f,0x2a,0x22,0x22,0x22,
+0x22,0x22,0x00,0x02,0x60,0x8d,0x02,0x60,0x94,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,
+0x8b,0x1b,0x8a,0x1c,0x89,0x1d,0x90,0x9e,0x8b,0x71,0x8b,0xab,0x1e,0xaa,0x1f,0xa9,
+0x20,0x90,0x9e,0x8e,0x71,0x8b,0xaf,0x21,0x15,0x21,0xef,0x60,0x1b,0x90,0x9e,0x8e,
+0xe4,0x75,0xf0,0x01,0x71,0x74,0x12,0x24,0x62,0xff,0x90,0x9e,0x8b,0xe4,0x75,0xf0,
+0x01,0x71,0x74,0xef,0x51,0x4d,0x80,0xde,0xab,0x1b,0xaa,0x1c,0xa9,0x1d,0xd0,0xd0,
+0x92,0xaf,0x22,0x90,0x06,0xa9,0xe0,0xf5,0x50,0x54,0xc0,0x70,0x0d,0x90,0x9e,0x63,
+0xe0,0x54,0xfe,0xf0,0xe0,0x54,0xfd,0xf0,0x91,0xd3,0xe5,0x50,0x30,0xe6,0x17,0x90,
+0x9e,0x63,0xe0,0x44,0x01,0xf0,0x90,0x9e,0x61,0xe0,0x64,0x02,0x60,0x04,0x91,0xdc,
+0x80,0x0b,0x91,0x80,0x80,0x07,0x90,0x9e,0x63,0xe0,0x54,0xfe,0xf0,0xe5,0x50,0x90,
+0x9e,0x63,0x30,0xe7,0x17,0xe0,0x44,0x02,0xf0,0xe4,0x90,0x9e,0x89,0x91,0x52,0x90,
+0x01,0x57,0x74,0x05,0xf0,0x90,0x9e,0x62,0x74,0x01,0xf0,0x22,0xe0,0x54,0xfd,0xf0,
+0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x04,0x1d,0xe0,0x60,0x1a,0x90,0x05,
+0x22,0xe0,0x54,0x90,0x60,0x07,0x90,0x01,0xc6,0xe0,0x44,0x40,0xf0,0x90,0x01,0xc7,
+0xe0,0x30,0xe1,0xe4,0x7f,0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0xc0,
+0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,
+0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74,
+0xdf,0xf0,0x74,0x45,0xa3,0xf0,0x53,0x91,0xdf,0x90,0x01,0x3c,0xe0,0x55,0x30,0xf5,
+0x34,0xa3,0xe0,0x55,0x31,0xf5,0x35,0xa3,0xe0,0x55,0x32,0xf5,0x36,0xa3,0xe0,0x55,
+0x33,0xf5,0x37,0xe5,0x34,0x30,0xe0,0x06,0x90,0x01,0x3c,0x74,0x01,0xf0,0xe5,0x34,
+0x30,0xe1,0x08,0x90,0x01,0x3c,0x74,0x02,0xf0,0xf1,0xbc,0xe5,0x34,0x30,0xe2,0x38,
+0x90,0x01,0x3c,0x74,0x04,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe0,0x24,0x90,0x9e,0x89,
+0xe4,0xf0,0x90,0x9e,0x55,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x58,0x7e,
+0x01,0x91,0x62,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x80,
+0x07,0x90,0x9e,0x5d,0xe4,0xf0,0x91,0xd3,0xe5,0x34,0x30,0xe3,0x38,0x90,0x01,0x3c,
+0x74,0x08,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe1,0x24,0x90,0x9e,0x89,0xe4,0xf0,0x90,
+0x9e,0x55,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91,0x62,
+0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,0x80,0x07,0x90,0x9e,
+0x5c,0xe4,0xf0,0x91,0xd3,0xe5,0x34,0x30,0xe4,0x09,0x90,0x01,0x3c,0x74,0x10,0xf0,
+0x12,0x4d,0xe2,0xe5,0x34,0x30,0xe5,0x09,0x90,0x01,0x3c,0x74,0x20,0xf0,0x12,0x4e,
+0x25,0xe5,0x35,0x30,0xe0,0x1a,0x90,0x01,0x3d,0x74,0x01,0xf0,0x90,0x01,0x2f,0xe0,
+0x44,0x7f,0xf0,0x90,0x00,0x83,0xe0,0x90,0x9e,0x60,0xf0,0x12,0x64,0xa1,0x91,0xd3,
+0x74,0xdf,0x04,0x90,0x01,0xc4,0xf0,0x74,0x45,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,
+0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,
+0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x7d,0x01,0x7f,0x0c,0x8f,0x71,0x8d,0x72,0xe5,0x71,
+0x54,0x0f,0xff,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0x6f,0x60,0x72,0xe5,0x71,0x30,0xe2,
+0x2b,0x90,0x9e,0x5e,0xe0,0x20,0xe2,0x05,0x7f,0x01,0x12,0x63,0x92,0x90,0x9e,0x5e,
+0xe0,0x30,0xe3,0x07,0xe5,0x71,0x20,0xe3,0x02,0x80,0x54,0x90,0x9e,0x5e,0xe0,0x20,
+0xe3,0x4c,0xe5,0x71,0x30,0xe3,0x47,0xaf,0x72,0x02,0x63,0x2e,0x90,0x9e,0x5e,0xe0,
+0x54,0x0f,0xff,0xbf,0x0c,0x0d,0xe5,0x71,0x20,0xe3,0x08,0x12,0x5e,0xf1,0xef,0x60,
+0x2d,0xf1,0x9f,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0xff,0xbf,0x04,0x0e,0xe5,0x71,0x20,
+0xe2,0x09,0x12,0x62,0x50,0xef,0x60,0x16,0x12,0x48,0xaa,0x90,0x9e,0x5e,0xe0,0x54,
+0x0f,0xff,0xbf,0x02,0x09,0x12,0x62,0xbb,0xef,0x60,0x03,0x12,0x64,0x87,0x22,0x90,
+0x06,0x04,0xe0,0x44,0x40,0xf0,0xe5,0x73,0xb4,0x01,0x05,0x7f,0x01,0x12,0x63,0x4d,
+0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x04,0xf0,0x22,0x90,0x9e,0x62,0xe0,
+0x60,0x0e,0xe4,0xf0,0xa3,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0x07,0x70,0x2b,0x80,0x27,
+0x90,0x9e,0x51,0xe0,0x04,0xf0,0x90,0x9e,0x63,0xe0,0x54,0xef,0xf0,0x90,0x9e,0x56,
+0xe0,0xff,0x90,0x9e,0x51,0xe0,0xd3,0x9f,0x40,0x0d,0xe5,0x73,0xb4,0x01,0x0a,0xa3,
+0xe0,0x70,0x06,0xe0,0x04,0xf0,0x22,0x91,0xd3,0x22,0xe0,0xff,0x7d,0x01,0x90,0x9e,
+0x9c,0xef,0xf0,0xa3,0xed,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xe5,0x74,0x60,0x04,0xe4,
+0xff,0x11,0x8f,0x90,0x9e,0x9c,0xe0,0x30,0xe0,0x09,0x90,0x9e,0x9e,0xe4,0xf0,0xa3,
+0x74,0x80,0xf0,0x90,0x9e,0x9c,0xe0,0xff,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x90,0x04,
+0x25,0xef,0xf0,0x90,0x9e,0x9d,0xe0,0x60,0x1f,0xa3,0xa3,0xe0,0xff,0x24,0x0f,0xf5,
+0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x74,0x10,0x2f,0xf5,0x82,0xe4,
+0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x90,0x9e,0x9e,0xa3,0xe0,0xff,0xfd,0x24,
+0x08,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe4,0xf0,0x74,0x09,0x2d,0xf5,0x82,0xe4,
+0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,
+0xf5,0x83,0xe0,0x54,0xf7,0xf0,0x90,0x9e,0x9e,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0xef,
+0x60,0x0b,0x90,0x9e,0x77,0xe0,0xb4,0x01,0x10,0xe4,0xff,0x80,0x09,0x90,0x9e,0x77,
+0xe0,0xb4,0x01,0x05,0x7f,0x01,0x12,0x77,0x66,0x22,0x90,0x01,0x37,0x74,0x02,0xf0,
+0x90,0x05,0x22,0x74,0xff,0xf0,0x12,0x77,0x1c,0xef,0x70,0x06,0x90,0x01,0xc8,0x74,
+0xfd,0xf0,0x7d,0x02,0x7f,0x03,0x12,0x31,0x9d,0xe5,0x74,0x60,0x04,0x7f,0x01,0x11,
+0x8f,0x11,0xdf,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x02,0xf0,0x22,0x7f,
+0x78,0x7e,0x08,0x12,0x22,0x65,0x90,0x9d,0xff,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0c,
+0x12,0x22,0x65,0x90,0x9e,0x03,0x12,0x25,0x08,0x7f,0x00,0x7e,0x08,0x12,0x22,0x65,
+0x90,0x9e,0x07,0x12,0x25,0x08,0x90,0x9e,0x77,0xe0,0x90,0x9d,0xff,0xb4,0x01,0x0d,
+0x12,0x43,0x53,0xef,0x54,0xc7,0xff,0xed,0x54,0xc7,0xfd,0x80,0x07,0x12,0x43,0x53,
+0xef,0x54,0xc7,0xff,0xec,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x78,0x7e,0x08,0x12,
+0x2b,0x08,0x90,0x9e,0x03,0x12,0x43,0x53,0xef,0x54,0x0f,0xff,0xec,0x90,0x80,0x96,
+0x12,0x25,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x08,0x90,0x9e,0x07,0x12,0x43,0x53,
+0xef,0x44,0x02,0xff,0xec,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x00,0x7e,0x08,0x12,
+0x2b,0x08,0x7f,0x70,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9e,0x0b,0x12,0x25,0x08,0x90,
+0x80,0x96,0x12,0x25,0x14,0x00,0x1b,0x25,0xa0,0x7f,0x70,0x7e,0x0e,0x12,0x2b,0x08,
+0x90,0x80,0x68,0x12,0x25,0x14,0x00,0x00,0x00,0x00,0xe4,0xfd,0xff,0x12,0x30,0x2c,
+0x90,0x9e,0x77,0xe0,0xb4,0x01,0x11,0x90,0x80,0x68,0x12,0x25,0x14,0x00,0x00,0x00,
+0x00,0xe4,0xfd,0x7f,0x01,0x12,0x30,0x2c,0x90,0x00,0x11,0xe0,0x54,0xf6,0xf0,0x80,
+0x08,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,
+0x7f,0x10,0xdf,0xfe,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,
+0x90,0x9e,0xad,0xed,0xf0,0x90,0x9e,0xac,0xef,0xf0,0xd3,0x94,0x07,0x50,0x63,0xe0,
+0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,
+0x47,0xe0,0x5f,0xf0,0x31,0xb9,0x90,0x9e,0xac,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,
+0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x46,0xe0,0x4f,0xf0,0x31,0xb9,0x90,
+0x9e,0xad,0xe0,0x60,0x16,0x90,0x9e,0xac,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,
+0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x45,0x80,0x66,0x90,0x9e,0xac,0xe0,0xff,
+0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x45,
+0x80,0x6b,0x90,0x9e,0xac,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,
+0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0x31,0xb1,0x90,0x9e,0xac,0xe0,0xff,
+0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x43,0xe0,
+0x4f,0xf0,0x31,0xb9,0x90,0x9e,0xad,0xe0,0x60,0x1b,0x90,0x9e,0xac,0xe0,0xff,0x74,
+0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,
+0x42,0xe0,0x4f,0x80,0x1a,0x90,0x9e,0xac,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,
+0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x42,0xe0,0x5f,0xf0,
+0x31,0xb9,0xd0,0xd0,0x92,0xaf,0x22,0xf0,0x90,0x00,0x45,0xe0,0x54,0xfe,0xfd,0x7f,
+0x45,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x8f,0x82,0x75,0x83,0x00,0xed,0xf0,0x31,
+0xb9,0xd0,0xd0,0x92,0xaf,0x22,0xef,0x14,0x60,0x30,0x14,0x60,0x66,0x24,0x02,0x60,
+0x02,0x61,0x7d,0x90,0x9e,0x1a,0x74,0x02,0xf0,0x90,0x00,0x48,0xe0,0x44,0x0c,0xfd,
+0x7f,0x48,0x51,0xc1,0x90,0x00,0x47,0xe0,0x44,0x08,0xfd,0x7f,0x47,0x51,0xc1,0x90,
+0x00,0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45,0x80,0x71,0xe4,0x90,0x9e,0x1a,0xf0,0x90,
+0x9e,0x16,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x08,0x12,
+0x2b,0x08,0x90,0x00,0x45,0xe0,0x44,0xef,0xfd,0x7f,0x45,0x51,0xc1,0x90,0x00,0x45,
+0xe0,0x54,0xef,0xfd,0x7f,0x45,0x51,0xc1,0x90,0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f,
+0x46,0x80,0x38,0x90,0x9e,0x1a,0x74,0x01,0xf0,0x90,0x9e,0x20,0x12,0x43,0x53,0x90,
+0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x08,0x12,0x2b,0x08,0x90,0x00,0x45,0xe0,
+0x44,0x20,0xfd,0x7f,0x45,0x51,0xc1,0x90,0x00,0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45,
+0x51,0xc1,0x90,0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f,0x46,0x51,0xc1,0x22,0x90,0x00,
+0x02,0x12,0x42,0x20,0x90,0x9e,0x1c,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0x25,0xe0,
+0x25,0xe0,0x90,0x9e,0x1b,0xf0,0x12,0x24,0x62,0x25,0xe0,0x25,0xe0,0x90,0x9e,0x1f,
+0xf0,0x90,0x05,0x60,0xe0,0x90,0x9e,0x2a,0xf0,0x90,0x05,0x61,0xe0,0x90,0x9e,0x2b,
+0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x2c,0xf0,0x90,0x05,0x63,0xe0,0x90,0x9e,0x2d,
+0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x90,0x9e,0x1b,0xe0,0xff,
+0xd1,0xd8,0x90,0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x90,0x9e,0x1c,0xe0,0x70,0x02,
+0x81,0x84,0x90,0x9e,0x1b,0xe0,0x70,0x02,0x81,0x84,0x90,0x9e,0x1f,0xe0,0x70,0x02,
+0x81,0x84,0xa2,0xaf,0xe4,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x90,0x9e,0x2e,0x74,
+0x01,0xf0,0x90,0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x51,0xb8,0x90,0x00,0x46,0xe0,
+0x44,0x01,0xfd,0x7f,0x46,0x51,0xc1,0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x20,
+0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x08,0x12,0x2b,0x08,
+0x80,0x06,0x90,0x05,0x22,0x74,0x7f,0xf0,0x90,0x00,0x45,0xe0,0x54,0xef,0xfd,0x7f,
+0x45,0x51,0xc1,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x9e,0x2a,0xe0,0x90,0x05,
+0x84,0xf0,0x90,0x9e,0x2b,0xe0,0x90,0x05,0x85,0xf0,0x90,0x9e,0x2c,0xe0,0x90,0x05,
+0x86,0xf0,0x90,0x9e,0x2d,0xe0,0x90,0x05,0x87,0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x9e,
+0x3f,0xf0,0xc2,0xaf,0x90,0x01,0x3c,0xe0,0x44,0x20,0xf0,0x7d,0x20,0xe4,0xff,0x12,
+0x31,0xb7,0x80,0x2b,0x90,0x9e,0x1c,0xe0,0x70,0x2d,0x90,0x9e,0x2e,0x51,0xb7,0x90,
+0x00,0x46,0xe0,0x54,0xfe,0xfd,0x7f,0x46,0x51,0xc1,0x90,0x05,0x22,0xe4,0xf0,0xa2,
+0xaf,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x7d,0x20,0xe4,0xff,0x12,0x31,0x49,0x90,
+0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x22,0x8b,0x59,0x8a,0x5a,0x89,0x5b,0x90,0x00,
+0x02,0x12,0x42,0x20,0x90,0x9e,0x1d,0xf0,0xe0,0x30,0xe0,0x4b,0x90,0x9e,0x14,0x74,
+0x01,0xf0,0x7f,0x80,0x7e,0x08,0x12,0x22,0x65,0x90,0x9e,0x16,0x12,0x25,0x08,0xab,
+0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xe4,0xfc,0xfd,0xfe,
+0x78,0x1a,0x12,0x24,0xf5,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,0x07,0x90,0x9e,0x16,
+0x12,0x43,0x53,0xec,0x54,0x03,0xfc,0x12,0x43,0x46,0x90,0x9e,0x20,0x12,0x25,0x08,
+0x90,0x05,0x22,0xe4,0xf0,0x80,0x2d,0xe4,0x90,0x9e,0x14,0xf0,0x7f,0x80,0x7e,0x08,
+0x12,0x22,0x65,0xec,0x54,0x03,0xfc,0xec,0x44,0xc0,0xfc,0x90,0x9e,0x16,0x12,0x25,
+0x08,0x90,0x9e,0x16,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,
+0x08,0x12,0x2b,0x08,0x90,0x9e,0x1d,0xe0,0x30,0xe1,0x19,0x7d,0x0c,0x7f,0x47,0x51,
+0xc1,0x90,0x00,0x48,0xe0,0x44,0x0c,0xfd,0x7f,0x48,0x51,0xc1,0x90,0x00,0x46,0xe0,
+0x44,0x10,0x80,0x1c,0x90,0x00,0x47,0xe0,0x54,0xf3,0xfd,0x7f,0x47,0x51,0xc1,0x90,
+0x00,0x48,0xe0,0x54,0xf3,0xfd,0x7f,0x48,0x51,0xc1,0x90,0x00,0x46,0xe0,0x54,0xef,
+0xfd,0x7f,0x46,0x51,0xc1,0xe4,0x90,0x9e,0x1a,0xf0,0x22,0x90,0x01,0x3c,0x74,0xff,
+0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x01,0x34,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,
+0x7f,0x54,0x51,0xc1,0x7d,0xff,0x7f,0x55,0x51,0xc1,0x7d,0xff,0x7f,0x56,0x51,0xc1,
+0x7d,0xff,0x7f,0x57,0x41,0xc1,0x90,0x01,0x30,0xe4,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,
+0xf0,0x90,0x01,0x38,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,0x50,0x51,0xc1,
+0xe4,0xfd,0x7f,0x51,0x51,0xc1,0xe4,0xfd,0x7f,0x52,0x51,0xc1,0xe4,0xfd,0x7f,0x53,
+0x41,0xc1,0xe5,0x22,0x64,0x01,0x70,0x3c,0xf1,0xbe,0xbf,0x01,0x05,0x7f,0x01,0x12,
+0x44,0xf1,0x90,0x00,0x46,0xe0,0x44,0x04,0xfd,0x7f,0x46,0x51,0xc1,0x90,0x00,0x44,
+0xe0,0x54,0xfb,0xfd,0x7f,0x44,0x51,0xc1,0x90,0x00,0x46,0xe0,0x54,0xfb,0xfd,0x7f,
+0x46,0x51,0xc1,0x7f,0x02,0xf1,0xea,0x8f,0x26,0x90,0x01,0xc9,0xe5,0x26,0xf0,0xb4,
+0x01,0x02,0xf1,0x2a,0x22,0x90,0x9e,0x1c,0xe0,0x64,0x01,0x60,0x02,0xc1,0xd7,0x90,
+0x00,0x46,0xe0,0x44,0x01,0xfd,0x7f,0x46,0x51,0xc1,0x90,0x9e,0x2e,0xe0,0x70,0x31,
+0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x20,0x12,0x43,0x53,0x90,0x80,0x96,0x12,
+0x25,0x08,0x7f,0x80,0x7e,0x08,0x12,0x2b,0x08,0x80,0x06,0x90,0x05,0x22,0x74,0x7f,
+0xf0,0x90,0x9e,0x1b,0xe0,0xff,0xd1,0xd8,0x90,0x9e,0x2e,0x74,0x01,0x51,0xb7,0x80,
+0x3f,0x90,0x9e,0x2e,0xe0,0x64,0x01,0x70,0x37,0x90,0x9e,0x1f,0xe0,0xff,0xd1,0xd8,
+0xe4,0x90,0x9e,0x2e,0xf0,0x90,0x00,0x45,0xe0,0x44,0x01,0xfd,0x7f,0x45,0x51,0xc1,
+0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x16,0x12,0x43,0x53,0x90,0x80,0x96,0x12,
+0x25,0x08,0x7f,0x80,0x7e,0x08,0x12,0x2b,0x08,0x80,0x05,0x90,0x05,0x22,0xe4,0xf0,
+0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x9e,0x2a,0xe0,0x90,0x05,0x84,0xf0,0x90,
+0x9e,0x2b,0xe0,0x90,0x05,0x85,0xf0,0x90,0x9e,0x2c,0xe0,0x90,0x05,0x86,0xf0,0x90,
+0x9e,0x2d,0xe0,0x90,0x05,0x87,0xf0,0x22,0x90,0x05,0x60,0xe0,0x90,0x9e,0x2a,0xf0,
+0x90,0x05,0x61,0xe0,0x90,0x9e,0x2b,0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x2c,0xf0,
+0x90,0x05,0x63,0xe0,0x90,0x9e,0x2d,0xf0,0xc3,0x74,0xff,0x9f,0xfe,0x90,0x9e,0x2b,
+0xe0,0xd3,0x9e,0x40,0x1e,0xe0,0x2f,0xf0,0xa3,0xe0,0xb4,0xff,0x0f,0xe4,0xf0,0xa3,
+0xe0,0xb4,0xff,0x03,0xe4,0xf0,0x22,0x90,0x9e,0x2d,0x80,0x03,0x90,0x9e,0x2c,0xe0,
+0x04,0xf0,0x22,0x90,0x9e,0x2b,0xe0,0x2f,0xf0,0x22,0x90,0x00,0x49,0xe0,0x90,0x9e,
+0xb1,0xf0,0xe0,0x54,0x0f,0xf0,0x44,0xf0,0xfd,0x7f,0x49,0x51,0xc1,0x90,0x9e,0xb1,
+0xe0,0x44,0xb0,0xfd,0x7f,0x49,0x41,0xc1,0x8e,0x59,0x8f,0x5a,0x8b,0x5b,0x8a,0x5c,
+0x89,0x5d,0xe4,0x90,0x9e,0x34,0xf0,0xef,0x90,0x00,0x31,0xf0,0x31,0xb9,0xe5,0x59,
+0x54,0x03,0xff,0x90,0x00,0x32,0xe0,0x54,0xfc,0x4f,0xf0,0x31,0xb9,0x90,0x00,0x33,
+0xe0,0x54,0x7f,0xf0,0x31,0xb9,0x90,0x00,0x33,0xe0,0x20,0xe7,0x0e,0x90,0x9e,0x34,
+0xe0,0xc3,0x94,0x64,0x50,0x05,0xe0,0x04,0xf0,0x80,0xeb,0x90,0x9e,0x34,0xe0,0xc3,
+0x94,0x64,0x50,0x10,0x90,0x00,0x30,0xe0,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x12,0x42,
+0x4d,0x7f,0x01,0x22,0x7f,0x00,0x22,0x12,0x45,0xb1,0xbf,0x01,0x10,0x90,0x02,0x09,
+0xe0,0xff,0x7d,0x01,0x12,0x47,0xfe,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x7f,0x0b,
+0xf1,0xea,0xef,0x65,0x25,0x60,0x10,0xe5,0x25,0xb4,0x01,0x05,0xe4,0xf5,0x25,0x80,
+0x03,0x75,0x25,0x01,0x7f,0x01,0x22,0x7f,0x00,0x22,0xe4,0x90,0x9e,0x74,0xf0,0x90,
+0x00,0x80,0xe0,0x44,0x80,0xfd,0x7f,0x80,0x41,0xc1,0xd3,0x10,0xaf,0x01,0xc3,0xc0,
+0xd0,0x90,0x9e,0xb2,0xef,0xf0,0xd3,0x94,0x07,0x50,0x47,0xe0,0xff,0x74,0x01,0xa8,
+0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0xe0,0x5f,0xf0,
+0x12,0x49,0xb9,0x90,0x9e,0xb2,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8,0x05,0x08,0x80,
+0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x44,0xe0,0xfb,0xe4,0xfe,
+0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13,0xd8,0xf8,0xff,
+0x80,0x44,0x90,0x9e,0xb2,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,
+0x80,0x02,0xc3,0x33,0xd8,0xfc,0x12,0x49,0xb1,0x90,0x9e,0xb2,0xe0,0xfd,0x74,0x01,
+0x7e,0x00,0xa8,0x05,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,
+0x00,0x42,0xe0,0xfb,0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,
+0x13,0xce,0x13,0xd8,0xf8,0xff,0xd0,0xd0,0x92,0xaf,0x22,0x75,0x28,0x33,0xe4,0xf5,
+0x29,0x75,0x2a,0x03,0xf5,0x2b,0x90,0x01,0x30,0xe5,0x28,0xf0,0xa3,0xe5,0x29,0xf0,
+0xa3,0xe5,0x2a,0xf0,0xa3,0xe5,0x2b,0xf0,0x22,0xe4,0x90,0x9e,0x31,0xf0,0xa3,0xf0,
+0x75,0x8e,0x02,0x12,0x4f,0xda,0x12,0x5f,0xa9,0x12,0x5f,0xbc,0xe4,0xf5,0x12,0x12,
+0x6f,0xa1,0x12,0x77,0x5d,0x12,0x60,0x9b,0x12,0x2e,0x01,0x12,0x77,0x18,0x11,0x8b,
+0x90,0x00,0xf3,0xe0,0x30,0xe2,0x0d,0x90,0x05,0x41,0x74,0x10,0xf0,0x90,0x05,0x5a,
+0xf0,0xa3,0xe4,0xf0,0x12,0x5f,0xf4,0x12,0x5f,0x91,0x12,0x44,0xfe,0x12,0x7d,0x1d,
+0x90,0x9e,0x33,0xe5,0xd9,0xf0,0x12,0x4d,0x8b,0xc2,0xaf,0x90,0x00,0x80,0xe0,0x44,
+0x40,0xf0,0x12,0x49,0xb9,0x75,0xe8,0x03,0x43,0xa8,0x85,0xd2,0xaf,0x90,0x01,0xbe,
+0xe0,0x04,0xf0,0x90,0x01,0xc0,0xe0,0x04,0xf0,0x90,0x9e,0x31,0xe0,0x64,0x01,0xf0,
+0x24,0xa9,0x90,0x01,0xc4,0xf0,0x74,0x50,0xa3,0xf0,0xe5,0x12,0x30,0xe4,0x09,0xc2,
+0xaf,0x53,0x12,0xef,0xd2,0xaf,0x31,0x8e,0xe5,0x12,0x30,0xe6,0x17,0xc2,0xaf,0x53,
+0x12,0xbf,0xd2,0xaf,0x12,0x69,0x51,0x90,0x9e,0x1e,0xe0,0xff,0x60,0x03,0xb4,0x01,
+0x03,0x12,0x7d,0x7b,0x90,0x9e,0x1e,0xe0,0x70,0x03,0x12,0x7e,0x7e,0x31,0x61,0x80,
+0xb8,0x90,0x06,0x34,0xe0,0x60,0x26,0x14,0x70,0x1b,0x7b,0x01,0x7a,0x06,0x79,0x35,
+0x7f,0xf9,0x7e,0x01,0x12,0x4f,0x48,0xbf,0x01,0x09,0x90,0x06,0x35,0xe0,0x54,0x0f,
+0xf0,0x80,0x05,0x80,0x00,0x02,0x77,0x0a,0xe4,0x90,0x06,0x34,0xf0,0x22,0x90,0x01,
+0xcc,0xe0,0x54,0x0f,0x90,0x9e,0x34,0xf0,0x90,0x9e,0x34,0xe0,0xfd,0x70,0x02,0x41,
+0xcf,0x90,0x9e,0xae,0xe0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,
+0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xef,0x5d,0x70,0x02,0x41,0xc8,0x90,0x9e,0xae,
+0xe0,0x75,0xf0,0x04,0x90,0x01,0xd0,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x35,0xf0,0x75,
+0x1e,0x01,0x75,0x1f,0x9e,0x75,0x20,0x35,0x75,0x21,0x01,0x7b,0x01,0x7a,0x9e,0x79,
+0x36,0x12,0x45,0x09,0x90,0x9e,0x36,0xe0,0xff,0xc4,0x13,0x13,0x13,0x54,0x01,0x90,
+0x9e,0xae,0x30,0xe0,0x59,0xe0,0x75,0xf0,0x02,0x90,0x00,0x88,0x12,0x43,0x5f,0xe0,
+0x90,0x9e,0x37,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x02,0x90,0x00,0x89,0x12,0x43,
+0x5f,0xe0,0x90,0x9e,0x38,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd1,
+0x12,0x43,0x5f,0xe0,0x90,0x9e,0x39,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90,
+0x01,0xd2,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x3a,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,
+0x04,0x90,0x01,0xd3,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x3b,0xf0,0x80,0x33,0xe0,0x75,
+0xf0,0x04,0x90,0x01,0xd1,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x37,0xf0,0x90,0x9e,0xae,
+0xe0,0x75,0xf0,0x04,0x90,0x01,0xd2,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x38,0xf0,0x90,
+0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x39,
+0xf0,0xef,0x54,0x7f,0xff,0x7b,0x01,0x7a,0x9e,0x79,0x37,0x51,0xd0,0x90,0x9e,0x34,
+0xe0,0xff,0x90,0x9e,0xae,0xe0,0xfe,0x74,0x01,0xa8,0x06,0x08,0x80,0x02,0xc3,0x33,
+0xd8,0xfc,0xf4,0x5f,0x90,0x9e,0x34,0xf0,0x90,0x9e,0xae,0xe0,0xff,0x74,0x01,0xa8,
+0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0x90,0x01,0xcc,0xf0,0x90,0x9e,0xae,0xe0,
+0x04,0xf0,0xe0,0x54,0x03,0xf0,0x21,0x98,0x90,0x01,0xc6,0xe0,0x44,0x02,0xf0,0x22,
+0x90,0x9e,0x3c,0x12,0x43,0x8b,0xef,0x12,0x43,0x94,0x53,0x0b,0x01,0x53,0x14,0x02,
+0x53,0x2f,0x03,0x53,0x38,0x05,0x53,0x41,0x06,0x53,0x8f,0x07,0x53,0x49,0x09,0x53,
+0x52,0x0c,0x53,0x5b,0x0d,0x53,0x64,0x0e,0x53,0x6d,0x1b,0x53,0x76,0x1c,0x53,0x7f,
+0x2c,0x53,0x1d,0x2d,0x53,0x26,0x2e,0x00,0x00,0x53,0x88,0x90,0x9e,0x3c,0x12,0x43,
+0x6b,0x02,0x61,0x9d,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x71,0xc4,0x90,0x9e,0x3c,
+0x12,0x43,0x6b,0x02,0x71,0xca,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x72,0x12,0x90,
+0x9e,0x3c,0x12,0x43,0x6b,0x02,0x72,0x40,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x71,
+0x74,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x80,0x47,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,
+0x72,0x88,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x4b,0x7e,0x90,0x9e,0x3c,0x12,0x43,
+0x6b,0x02,0x7c,0xea,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x4c,0xb8,0x90,0x9e,0x3c,
+0x12,0x43,0x6b,0x02,0x71,0xbc,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x71,0xa3,0x90,
+0x9e,0x3c,0x12,0x43,0x6b,0x02,0x75,0xea,0x90,0x01,0xc6,0xe0,0x44,0x01,0xf0,0x22,
+0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x1f,0xfe,0xef,0x54,0x20,0xc4,0x13,0x54,
+0x07,0xfd,0xaf,0x06,0x90,0x9e,0x3f,0xef,0xf0,0xa3,0xed,0xf0,0xa3,0x12,0x43,0x8b,
+0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54,0xf0,0xc4,0x54,
+0x0f,0x90,0x9e,0x44,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0x54,0x40,0xc4,0x13,0x13,
+0x54,0x03,0x90,0x9e,0x45,0xf0,0x90,0x9e,0x3f,0xe0,0xff,0x75,0xf0,0x09,0x90,0x96,
+0x46,0x12,0x43,0x5f,0xad,0x82,0xac,0x83,0x90,0x9e,0x46,0xec,0xf0,0xa3,0xed,0xf0,
+0xef,0x75,0xf0,0x09,0xa4,0x24,0x44,0xf9,0x74,0x96,0x35,0xf0,0xfa,0x7b,0x01,0xa3,
+0x12,0x43,0x8b,0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54,
+0x0f,0xff,0x90,0x9e,0x48,0x12,0x43,0x6b,0xef,0x12,0x42,0x4d,0x90,0x9e,0x41,0x12,
+0x43,0x6b,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x90,0x9e,0x48,0x12,0x43,0x6b,0x90,
+0x00,0x01,0xef,0x12,0x42,0x5f,0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,
+0x42,0x20,0xff,0x90,0x9e,0x46,0xe0,0xfc,0xa3,0xe0,0xfd,0xf5,0x82,0x8c,0x83,0xef,
+0xf0,0x12,0x24,0x62,0x8d,0x82,0x8c,0x83,0xa3,0xf0,0x90,0x9e,0x44,0xe0,0xfe,0x90,
+0x9e,0x3f,0xe0,0xff,0x24,0x82,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0x90,
+0x9e,0x40,0xe0,0xfe,0x75,0xf0,0x09,0xef,0x90,0x96,0x4a,0x12,0x43,0x5f,0xee,0xf0,
+0x75,0xf0,0x09,0xef,0x90,0x96,0x4b,0x12,0x43,0x5f,0x74,0x01,0xf0,0x90,0x9e,0x45,
+0xe0,0xfe,0x75,0xf0,0x09,0xef,0x90,0x96,0x4c,0x12,0x43,0x5f,0xee,0xf0,0x8f,0x59,
+0xef,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xaf,0x82,0xf5,0x5b,0x8f,0x5c,
+0xe5,0x59,0x75,0xf0,0x02,0xa4,0x24,0x02,0xf9,0x74,0x95,0x35,0xf0,0x75,0x5d,0x01,
+0xf5,0x5e,0x89,0x5f,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x46,0x12,0x43,0x5f,0xaf,
+0x82,0x85,0x83,0x60,0x8f,0x61,0xe5,0x59,0x75,0xf0,0x09,0xa4,0x24,0x44,0xf9,0x74,
+0x96,0x35,0xf0,0x75,0x62,0x01,0xf5,0x63,0x89,0x64,0x74,0x82,0x25,0x59,0xf5,0x82,
+0xe4,0x34,0x95,0xf5,0x83,0xe0,0x12,0x43,0x94,0x55,0x1e,0x00,0x55,0x33,0x01,0x55,
+0x48,0x02,0x55,0x5d,0x03,0x55,0x86,0x04,0x55,0x9b,0x05,0x55,0xb0,0x06,0x55,0xd6,
+0x0c,0x56,0x03,0x0d,0x56,0x30,0x0e,0x56,0x5d,0x0f,0x00,0x00,0x56,0x91,0xe5,0x59,
+0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74,
+0x15,0x80,0x3c,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,
+0x74,0xf0,0xf0,0xa3,0x74,0x10,0x80,0x27,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,
+0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74,0x05,0x80,0x12,0xe5,0x59,0x25,
+0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0xe4,0xf0,
+0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0f,0xf0,
+0xa3,0x74,0x8f,0xf0,0xc1,0x91,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,
+0x9b,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf5,0x80,0x27,0xe5,0x59,0x25,0xe0,0x24,
+0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf0,0x80,0x12,
+0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe4,0xf0,0xa3,
+0x74,0x0d,0xf0,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,
+0xe4,0xf0,0xa3,0xf0,0xc1,0x91,0x90,0x04,0x47,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,
+0x12,0x42,0x4d,0x90,0x04,0x46,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,
+0x12,0x42,0x5f,0x90,0x04,0x45,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,
+0x44,0xc1,0x88,0x90,0x04,0x4b,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,0x4d,
+0x90,0x04,0x4a,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,0x5f,
+0x90,0x04,0x49,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x48,0x80,0x58,
+0x90,0x04,0x4f,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,0x4d,0x90,0x04,0x4e,
+0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x4d,
+0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x4c,0x80,0x2b,0x90,0x04,0x53,
+0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,0x4d,0x90,0x04,0x52,0xe0,0xab,0x5d,
+0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x51,0xe0,0x85,0x5c,
+0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x50,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xa3,
+0xf0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0xc0,0x03,0xc0,0x02,0xc0,0x01,0x12,0x24,0x62,
+0xff,0xab,0x62,0xaa,0x63,0xa9,0x64,0x12,0x24,0x62,0x5f,0xd0,0x01,0xd0,0x02,0xd0,
+0x03,0x12,0x42,0x4d,0xab,0x5d,0xe5,0x5f,0x24,0x01,0xf9,0xe4,0x35,0x5e,0xfa,0xc0,
+0x03,0xc0,0x02,0xc0,0x01,0x12,0x24,0x62,0xff,0xab,0x62,0xaa,0x63,0xa9,0x64,0x90,
+0x00,0x01,0x12,0x42,0x20,0x5f,0xd0,0x01,0xd0,0x02,0xd0,0x03,0x12,0x42,0x4d,0x85,
+0x5c,0x82,0x85,0x5b,0x83,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x61,0x82,0x85,0x60,
+0x83,0xe0,0xfe,0xef,0x5e,0xd0,0x82,0xd0,0x83,0xf0,0x85,0x5c,0x82,0x85,0x5b,0x83,
+0xa3,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x61,0x82,0x85,0x60,0x83,0xa3,0xe0,0xfe,
+0xef,0x5e,0xd0,0x82,0xd0,0x83,0xf0,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,
+0x34,0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b,0x75,0x5a,0x0b,0x74,0x01,
+0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,
+0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,
+0xe0,0x5f,0x4e,0x60,0x06,0xe5,0x5a,0x24,0x10,0x80,0x5d,0x15,0x5a,0xe5,0x5a,0xc3,
+0x94,0x00,0x50,0xca,0x80,0x56,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,
+0x9b,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3d,0x75,0x5a,0x0f,0x74,0x01,0x7e,
+0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x59,
+0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0,
+0x5f,0x4e,0x60,0x08,0x90,0x9e,0x4b,0xe5,0x5a,0xf0,0x80,0x10,0x15,0x5a,0xe5,0x5a,
+0xc3,0x94,0x00,0x50,0xc8,0x80,0x05,0xe4,0x90,0x9e,0x4b,0xf0,0xe5,0x59,0x25,0xe0,
+0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b,
+0xe4,0xf5,0x5a,0x74,0x01,0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,
+0xce,0xd8,0xf9,0xff,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,
+0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x08,0x90,0x9e,0x4c,0xe5,0x5a,0xf0,
+0x80,0x5b,0x05,0x5a,0xe5,0x5a,0xb4,0x10,0xca,0x80,0x52,0xe5,0x59,0x25,0xe0,0x24,
+0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x39,0xe4,
+0xf5,0x5a,0x74,0x01,0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,
+0xd8,0xf9,0xff,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,
+0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x06,0xe5,0x5a,0x24,0x10,0x80,0x0a,0x05,
+0x5a,0xe5,0x5a,0xb4,0x0c,0xcc,0x80,0x05,0xe4,0x90,0x9e,0x4c,0xf0,0x90,0x9e,0x4b,
+0xe0,0xff,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x48,0x12,0x43,0x5f,0xef,0xf0,0x90,
+0x9e,0x4c,0xe0,0xfe,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x49,0x12,0x43,0x5f,0xee,
+0xf0,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0xd3,0x9f,0x40,
+0x05,0x90,0x9e,0x4b,0x11,0xe0,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5,
+0x83,0xe0,0xff,0x90,0x9e,0x4c,0xe0,0xfe,0xef,0xc3,0x9e,0x50,0x02,0x11,0xe0,0x90,
+0x9e,0x4b,0xe0,0xff,0xd3,0x94,0x13,0x40,0x07,0x90,0x96,0x43,0x74,0x03,0xf0,0x22,
+0xef,0xd3,0x94,0x0b,0x40,0x07,0x90,0x96,0x43,0x74,0x02,0xf0,0x22,0xef,0xd3,0x94,
+0x03,0x40,0x07,0x90,0x96,0x43,0x74,0x01,0xf0,0x22,0xe4,0x90,0x96,0x43,0xf0,0x22,
+0xe0,0xfd,0x74,0x26,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xed,0xf0,0xaf,
+0x59,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xef,0xc3,0x94,0x20,0x50,0x0e,0x74,0x84,
+0x2f,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xed,0xf0,0x80,0x29,0x74,0xa6,0x2f,0xf5,
+0x82,0xe4,0x34,0x9c,0xf5,0x83,0xed,0xf0,0x90,0x9e,0x78,0xef,0xf0,0x24,0xa6,0xf5,
+0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x90,0x9e,0x79,0xf0,0x7b,0x01,0x7a,0x9e,0x79,
+0x78,0x7d,0x02,0x31,0x3a,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,
+0xd0,0x90,0x9e,0x97,0x12,0x43,0x8b,0x90,0x9e,0x9a,0xe0,0x54,0xf0,0x44,0x06,0xff,
+0xf0,0xed,0x54,0x0f,0xc4,0x54,0xf0,0xfe,0xef,0x54,0x0f,0x4e,0xf0,0x90,0x9e,0x97,
+0x12,0x43,0x6b,0x90,0x9e,0x94,0x12,0x43,0x8b,0x7b,0x01,0x7a,0x9e,0x79,0x9a,0xd1,
+0x14,0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x50,0x8d,0x51,0xe5,0x51,0x54,0x1f,0xf5,0x56,
+0x74,0x01,0x2f,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xf5,0x54,0x90,0x04,0xfd,
+0xe0,0xb4,0x01,0x05,0x75,0x57,0x03,0x80,0x03,0x75,0x57,0x01,0xeb,0xc3,0x95,0x57,
+0x40,0x04,0xaf,0x50,0x80,0x33,0xe5,0x54,0x25,0x53,0xf5,0x55,0xe5,0x56,0x90,0x41,
+0xd6,0x93,0xff,0xe5,0x55,0xd3,0x9f,0x74,0x01,0x40,0x11,0x25,0x50,0xf5,0x82,0xe4,
+0x34,0x94,0xf5,0x83,0xe4,0xf0,0xad,0x51,0xaf,0x50,0x01,0xf1,0x25,0x50,0xf5,0x82,
+0xe4,0x34,0x94,0xf5,0x83,0xe5,0x55,0xf0,0x22,0xad,0x07,0x75,0xf0,0x09,0xed,0x90,
+0x96,0x48,0x12,0x43,0x5f,0xe0,0xff,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,
+0x83,0xe0,0x54,0x1f,0xf5,0x58,0xd3,0x9f,0x40,0x02,0x8f,0x58,0xe5,0x58,0x25,0xe0,
+0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,
+0xe5,0x58,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,
+0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,
+0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xaf,0x05,0xad,0x58,
+0x11,0xf1,0xaf,0x58,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,
+0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,
+0xc0,0x07,0x90,0x01,0xc4,0x74,0x45,0xf0,0x74,0x5a,0xa3,0xf0,0x90,0x01,0x34,0xe0,
+0x55,0x28,0xf5,0x2c,0x90,0x01,0x36,0xe0,0x55,0x2a,0xf5,0x2e,0xa3,0xe0,0x55,0x2b,
+0xf5,0x2f,0xe5,0x2c,0x20,0xe0,0x02,0x61,0xe1,0x90,0x01,0x34,0x74,0x01,0xf0,0x85,
+0xd1,0x08,0x85,0xd2,0x09,0x85,0xd3,0x0a,0x85,0xd4,0x0b,0x85,0xd5,0x0c,0x85,0xd6,
+0x0d,0x85,0xd7,0x0e,0x85,0xd9,0x0f,0xe5,0x0f,0x54,0x40,0xc3,0x13,0xff,0xe5,0x0e,
+0x54,0x20,0x6f,0x70,0x02,0x61,0x93,0xe5,0x0f,0x30,0xe5,0x02,0x61,0x93,0xe5,0x0d,
+0x54,0x3f,0xf5,0x4d,0xe5,0x08,0x54,0x3f,0xf5,0x4e,0xe5,0x0c,0x54,0x1f,0xff,0xe5,
+0x4d,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0x8f,0xf0,0x12,
+0x42,0x81,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4,
+0x34,0x93,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x4e,0xd3,0x94,0x04,0x40,
+0x03,0x75,0x4e,0x04,0x75,0xf0,0x0a,0xe5,0x4d,0x90,0x90,0x00,0x12,0x43,0x5f,0x75,
+0xf0,0x02,0xe5,0x4e,0x12,0x43,0x5f,0xe0,0xfe,0xa3,0xe0,0xff,0xe5,0x0e,0x54,0x1f,
+0x2f,0xff,0xe4,0x3e,0xfe,0x75,0xf0,0x0a,0xe5,0x4d,0x90,0x90,0x00,0x12,0x43,0x5f,
+0x75,0xf0,0x02,0xe5,0x4e,0x12,0x43,0x5f,0xee,0xf0,0xa3,0xef,0xf0,0xe5,0x0f,0x20,
+0xe6,0x23,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,
+0x34,0x98,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0a,0x30,0xe7,0x34,0xaf,
+0x4d,0x31,0xd9,0x80,0x2e,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0x44,
+0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0a,0x30,
+0xe7,0x11,0xe5,0x0a,0x54,0x7f,0xfd,0xe5,0x0e,0x54,0x1f,0xf5,0x53,0xab,0x4e,0xaf,
+0x4d,0x31,0x76,0xe5,0x74,0x14,0x24,0xfd,0x50,0x02,0x80,0x45,0x90,0x9e,0x61,0xe0,
+0x60,0x37,0x90,0x01,0x5b,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x04,0xf0,0xd1,0x05,0xef,
+0x64,0x01,0x70,0x2d,0x90,0x9e,0x55,0xe0,0xf5,0x44,0x75,0x45,0x00,0xe4,0xfb,0xfd,
+0x7f,0x58,0x7e,0x01,0x12,0x30,0x62,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92,
+0x74,0x01,0xf0,0x90,0x9e,0x5d,0xf0,0x80,0x08,0xd1,0x05,0xbf,0x01,0x03,0x12,0x44,
+0xd3,0xe5,0x2c,0x30,0xe1,0x20,0x90,0x01,0x34,0x74,0x02,0xf0,0x85,0xd1,0x13,0x85,
+0xd2,0x14,0x85,0xd3,0x15,0x85,0xd4,0x16,0x85,0xd5,0x17,0x85,0xd6,0x18,0x85,0xd7,
+0x19,0x85,0xd9,0x1a,0xd1,0x9c,0xe5,0x2c,0x30,0xe3,0x06,0x90,0x01,0x34,0x74,0x08,
+0xf0,0xe5,0x2c,0x30,0xe4,0x09,0x90,0x01,0x34,0x74,0x10,0xf0,0x43,0x12,0x10,0xe5,
+0x2c,0x30,0xe5,0x26,0x90,0x01,0xcf,0xe0,0x30,0xe5,0x1f,0xe0,0x54,0xdf,0xf0,0x90,
+0x01,0x34,0x74,0x20,0xf0,0x75,0xa8,0x00,0x75,0xe8,0x00,0x12,0x4d,0xb6,0x90,0x00,
+0x03,0xe0,0x54,0xfb,0xf0,0x12,0x49,0xb9,0x80,0xfe,0xe5,0x2c,0x30,0xe6,0x06,0x90,
+0x01,0x34,0x74,0x40,0xf0,0xe5,0x2e,0x30,0xe1,0x3c,0x90,0x01,0x36,0x74,0x02,0xf0,
+0x43,0x12,0x40,0x90,0x01,0x02,0xe0,0x54,0x03,0x64,0x01,0x70,0x29,0x90,0x01,0x37,
+0xe0,0x30,0xe0,0x0a,0x74,0x01,0xf0,0x90,0x9e,0x66,0xe4,0xf0,0x80,0x18,0x90,0x9e,
+0x66,0xe0,0x04,0xf0,0xe0,0xc3,0x94,0x0a,0x40,0x0c,0xe4,0xf0,0x90,0x04,0x19,0xe0,
+0x30,0xe0,0x03,0x12,0x4f,0xa7,0xe5,0x2e,0x30,0xe0,0x12,0x90,0x9e,0x76,0x74,0x01,
+0xf0,0x90,0x01,0x36,0xf0,0x12,0x64,0xfe,0x90,0x9e,0x76,0xe4,0xf0,0xe5,0x2e,0x30,
+0xe2,0x78,0x90,0x01,0x36,0x74,0x04,0xf0,0x90,0x01,0xbd,0xe0,0x04,0xf0,0xe5,0x73,
+0x64,0x01,0x70,0x66,0xe5,0x74,0x60,0x62,0xe5,0x74,0x64,0x02,0x60,0x06,0xe5,0x74,
+0x64,0x05,0x70,0x27,0x90,0x06,0xab,0xe0,0x90,0x9e,0x50,0xf0,0x90,0x06,0xaa,0xe0,
+0x90,0x9e,0x5f,0xf0,0x90,0x9e,0x50,0xe0,0x70,0x07,0x90,0x9e,0x5f,0xe0,0xff,0x80,
+0x05,0x90,0x9e,0x50,0xe0,0xff,0x90,0x9e,0x50,0xef,0xf0,0x90,0x9e,0x52,0xe0,0x60,
+0x03,0xe0,0x14,0xf0,0x90,0x9e,0x51,0xe4,0xf0,0x90,0x01,0x57,0xf0,0x90,0x01,0x3c,
+0x74,0x02,0xf0,0x90,0x9e,0x63,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0xef,0xf0,0xe5,0x74,
+0x14,0x24,0xfd,0x50,0x02,0x80,0x03,0x12,0x45,0x53,0xe5,0x2e,0x30,0xe3,0x28,0x90,
+0x01,0x36,0x74,0x08,0xf0,0xe5,0x73,0x64,0x01,0x70,0x1c,0xe5,0x74,0x60,0x18,0x90,
+0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x9e,0x89,0xe4,0x12,0x44,
+0x52,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x2e,0x30,0xe4,0x2f,0x90,0x01,0x36,0x74,
+0x10,0xf0,0xe5,0x73,0x64,0x01,0x70,0x23,0xe5,0x74,0x60,0x1f,0x90,0x01,0x57,0xe4,
+0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x9e,0x62,0xe4,0xf0,0x90,0x9e,0x63,0xe0,
+0x54,0xfd,0xf0,0xe0,0x54,0x07,0x70,0x03,0x12,0x44,0xd3,0xe5,0x2e,0x30,0xe5,0x1f,
+0x90,0x01,0x36,0x74,0x20,0xf0,0xe5,0x73,0xb4,0x01,0x14,0xe5,0x74,0x60,0x10,0x90,
+0x9e,0x61,0xe0,0x64,0x02,0x60,0x05,0x12,0x44,0xdc,0x80,0x03,0x12,0x44,0x80,0xe5,
+0x2e,0x30,0xe6,0x1e,0x90,0x01,0x36,0x74,0x40,0xf0,0xe5,0x73,0xb4,0x01,0x13,0xe5,
+0x74,0x60,0x0f,0x90,0x9e,0x63,0xe0,0x54,0xfe,0xf0,0xe0,0x54,0x07,0x70,0x03,0x12,
+0x44,0xd3,0xe5,0x2f,0x30,0xe1,0x08,0x90,0x01,0x37,0x74,0x02,0xf0,0xd1,0xbd,0x74,
+0x45,0x04,0x90,0x01,0xc4,0xf0,0x74,0x5a,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,
+0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,
+0xd0,0xf0,0xd0,0xe0,0x32,0x90,0x04,0x1b,0xe0,0x54,0x7f,0x64,0x7f,0x7f,0x01,0x60,
+0x02,0x7f,0x00,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x91,0x12,0x43,
+0x8b,0x90,0x9e,0x75,0xe0,0x64,0x02,0x60,0x6e,0x90,0x9e,0x75,0xe0,0x64,0x01,0x70,
+0x66,0x90,0x9e,0xb0,0xe0,0xff,0x04,0xf0,0x90,0x9e,0x91,0x12,0x43,0x6b,0x90,0x00,
+0x01,0xef,0x12,0x42,0x5f,0x7f,0xaf,0x7e,0x01,0xf1,0x3b,0xef,0x60,0x49,0x90,0x9e,
+0x91,0x12,0x43,0x6b,0x8b,0x1e,0x8a,0x1f,0x89,0x20,0x75,0x21,0x02,0x7b,0x01,0x7a,
+0x01,0x79,0xa0,0x12,0x45,0x09,0x90,0x9e,0x94,0x12,0x43,0x6b,0x8b,0x1e,0x8a,0x1f,
+0x89,0x20,0x90,0x9e,0x91,0x12,0x43,0x6b,0x12,0x24,0x62,0xff,0xc4,0x54,0x0f,0xf5,
+0x21,0x7b,0x01,0x7a,0x01,0x79,0xa2,0x12,0x45,0x09,0x90,0x01,0xaf,0x74,0xff,0xf0,
+0x90,0x01,0xcb,0xe0,0x64,0x80,0xf0,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x9e,0x2f,0xe0,
+0x54,0xf0,0x44,0x03,0xf0,0x54,0x0f,0x44,0x80,0xf0,0x7b,0x00,0x7a,0x00,0x79,0x13,
+0x90,0x9e,0x94,0x12,0x43,0x8b,0x0b,0x7a,0x9e,0x79,0x2f,0xc1,0x14,0x7d,0x02,0x7f,
+0x03,0x12,0x31,0x2c,0xe5,0x74,0x14,0x24,0xfd,0x50,0x02,0x80,0x23,0x90,0x9e,0x61,
+0xe0,0x60,0x06,0x7d,0x01,0x7f,0x0c,0x80,0x0f,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0xc3,
+0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0x1a,0xe4,0xff,0x12,0x48,0x8f,
+0x22,0xd1,0x05,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x32,
+0x90,0x9e,0x5d,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x24,0x90,0x9e,
+0x5c,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x16,0x90,0x9e,0x60,0xe0,
+0x54,0x0f,0xd3,0x94,0x04,0x40,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x03,0x7f,
+0x01,0x22,0x90,0x01,0xb8,0x74,0x08,0xf0,0x7f,0x00,0x22,0xd3,0x10,0xaf,0x01,0xc3,
+0xc0,0xd0,0x90,0x9e,0xa0,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0x90,
+0x9e,0xa0,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x2d,0xc3,0x90,0x9e,
+0xa3,0xe0,0x94,0xe8,0x90,0x9e,0xa2,0xe0,0x94,0x03,0x40,0x0b,0x90,0x01,0xc6,0xe0,
+0x44,0x10,0xf0,0x7f,0x00,0x80,0x15,0x90,0x9e,0xa2,0xe4,0x75,0xf0,0x01,0x12,0x42,
+0x81,0x7f,0x0a,0x7e,0x00,0x12,0x32,0x15,0x80,0xc5,0x7f,0x01,0xd0,0xd0,0x92,0xaf,
+0x22,0x75,0x30,0x1f,0x75,0x31,0x01,0xe4,0xf5,0x32,0x90,0x01,0x38,0xe5,0x30,0xf0,
+0xa3,0xe5,0x31,0xf0,0xa3,0xe5,0x32,0xf0,0x22,0x90,0x00,0x02,0xe0,0x54,0xe0,0x90,
+0x9e,0x75,0x60,0x04,0x74,0x01,0xf0,0x22,0x74,0x02,0xf0,0x22,0x90,0x00,0xf3,0xe0,
+0x30,0xe3,0x08,0x90,0x9e,0x77,0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x9e,0x77,0xf0,
+0x90,0x9e,0x77,0xe0,0xb4,0x01,0x12,0x90,0x00,0xf2,0xe0,0x30,0xe7,0x0b,0x90,0x9e,
+0x64,0x74,0xfd,0xf0,0xa3,0x74,0x33,0xf0,0x22,0x90,0x9e,0x64,0x74,0xfd,0xf0,0xa3,
+0x74,0x2f,0xf0,0x22,0x90,0x01,0x64,0x74,0xa0,0xf0,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,
+0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,
+0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74,0xfb,0xf0,0x74,0x5f,
+0xa3,0xf0,0x53,0x91,0xef,0x90,0x00,0x51,0xe0,0xff,0x90,0x00,0x55,0xe0,0x5f,0xf5,
+0x3d,0xe5,0x3d,0x30,0xe6,0x18,0x74,0x40,0xf0,0x90,0x9e,0x1d,0xe0,0x54,0x03,0xff,
+0xbf,0x03,0x0b,0x90,0x9e,0x1a,0xe0,0x60,0x05,0x7f,0x01,0x12,0x4a,0xd6,0xe5,0x3d,
+0x30,0xe7,0x15,0x90,0x00,0x55,0x74,0x80,0xf0,0x90,0x9e,0x1d,0xe0,0x54,0x03,0xff,
+0xbf,0x03,0x05,0x7f,0x02,0x12,0x4a,0xd6,0x90,0x01,0xc4,0x74,0xfb,0xf0,0x74,0x5f,
+0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,
+0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x8f,0x6b,0x8c,
+0x6c,0x8d,0x6d,0x22,0x8f,0x6e,0x8c,0x6f,0x8d,0x70,0x22,0xe4,0xf5,0x73,0x90,0x9e,
+0x63,0xf0,0xf5,0x74,0x90,0x9e,0x60,0x74,0x0c,0xf0,0x90,0x9e,0x5e,0xf0,0xe4,0x90,
+0x9e,0x61,0xf0,0x90,0x9e,0x5d,0xf0,0x90,0x9e,0x5c,0xf0,0x90,0x9e,0x5f,0x04,0xf0,
+0x90,0x9e,0x50,0xf0,0xe4,0x90,0x9e,0x62,0xf0,0x90,0x9e,0x52,0xf0,0x90,0x9e,0x5a,
+0x74,0x07,0xf0,0xe4,0x90,0x9e,0x51,0xf0,0x90,0x9e,0x58,0xf0,0xa3,0x74,0x02,0xf0,
+0x90,0x9e,0x56,0x14,0xf0,0xa3,0x74,0x03,0xf0,0x90,0x9e,0x55,0x74,0x14,0xf0,0x90,
+0x9e,0x5b,0x74,0x05,0xf0,0xe4,0x90,0x9e,0x54,0xf0,0x90,0x9e,0x4f,0xf0,0x90,0x9e,
+0x76,0xf0,0x22,0xe4,0x90,0x9e,0x62,0xf0,0x90,0x9e,0x51,0xf0,0x90,0x9e,0x63,0xf0,
+0x22,0x8b,0x59,0x8a,0x5a,0x89,0x5b,0x31,0x03,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x12,
+0x24,0x62,0xf5,0x74,0x14,0x60,0x0e,0x14,0x60,0x1e,0x14,0x60,0x2f,0x24,0x03,0x70,
+0x40,0x7f,0x01,0x80,0x3a,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00,0x02,0x12,0x42,
+0x20,0xfd,0xe4,0xff,0x31,0x72,0x80,0x27,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00,
+0x02,0x12,0x42,0x20,0xfd,0x7f,0x01,0x31,0x72,0x1f,0x80,0x13,0xab,0x59,0xaa,0x5a,
+0xa9,0x5b,0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0x7f,0x02,0x31,0x72,0xe4,0xff,0x31,
+0xc6,0x22,0xef,0x24,0xfe,0x60,0x0b,0x04,0x70,0x22,0x90,0x9e,0x5f,0x74,0x01,0xf0,
+0x80,0x16,0xed,0x70,0x0a,0x90,0x9e,0x5b,0xe0,0x90,0x9e,0x5f,0xf0,0x80,0x05,0x90,
+0x9e,0x5f,0xed,0xf0,0x90,0x9e,0x5f,0xe0,0x90,0x9e,0x50,0xf0,0x22,0xd3,0x10,0xaf,
+0x01,0xc3,0xc0,0xd0,0x90,0x00,0x01,0x12,0x42,0x20,0x90,0x9e,0x61,0xf0,0x90,0x00,
+0x03,0x12,0x42,0x20,0x90,0x9e,0x4f,0xf0,0x12,0x24,0x62,0x65,0x74,0x60,0x02,0x31,
+0x11,0xd0,0xd0,0x92,0xaf,0x22,0xef,0x64,0x01,0x70,0x30,0x7d,0x7c,0x7f,0x02,0x12,
+0x31,0x2c,0x7d,0x02,0x7f,0x03,0x12,0x31,0x2c,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,
+0x3c,0x74,0x02,0xf0,0x12,0x47,0x16,0xe4,0xff,0x12,0x48,0x8f,0x90,0x06,0x04,0xe0,
+0x54,0x7f,0xf0,0x90,0x06,0x0a,0xe0,0x54,0xf8,0xf0,0x22,0x90,0x01,0x36,0x74,0x7c,
+0xf0,0xa3,0x74,0x02,0xf0,0x7d,0x7c,0xff,0x12,0x31,0x9d,0x7d,0x02,0x7f,0x03,0x12,
+0x31,0x9d,0x90,0x06,0x04,0xe0,0x44,0x80,0xf0,0x90,0x06,0x0a,0xe0,0x44,0x07,0xf0,
+0x90,0x9e,0x58,0xe0,0xa3,0xe0,0x90,0x05,0x58,0xf0,0xe5,0x73,0x30,0xe0,0x1b,0x90,
+0x9e,0x52,0xe0,0x70,0x1a,0xe0,0x04,0xf0,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0xc3,0x94,
+0x04,0x50,0x0c,0x7d,0x01,0x7f,0x04,0x02,0x47,0x1a,0xe4,0x90,0x9e,0x52,0xf0,0x22,
+0x12,0x5e,0x05,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x52,
+0x90,0x9e,0x63,0xe0,0x54,0x03,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x42,
+0x90,0x9e,0x60,0xe0,0x54,0x0f,0xd3,0x94,0x02,0x40,0x08,0x90,0x01,0xb9,0x74,0x04,
+0xf0,0x80,0x2f,0x90,0x9e,0x63,0xe0,0x30,0xe2,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,
+0x80,0x20,0x90,0x9e,0x63,0xe0,0x30,0xe4,0x08,0x90,0x01,0xb9,0x74,0x10,0xf0,0x80,
+0x11,0x90,0x9e,0x52,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x20,0xf0,0x80,0x03,0x7f,
+0x01,0x22,0x90,0x01,0xb8,0x74,0x04,0xf0,0x7f,0x00,0x22,0xe5,0x12,0x60,0x08,0x90,
+0x01,0xb9,0x74,0x01,0xf0,0x80,0x5e,0x90,0x9e,0x60,0xe0,0x54,0x0f,0xd3,0x94,0x01,
+0x40,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x4b,0x90,0x02,0x87,0xe0,0x60,0x08,
+0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x3d,0x90,0x9e,0x75,0xe0,0xb4,0x02,0x10,0x90,
+0x9e,0x64,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x17,0x80,0x26,0x90,
+0x9e,0x75,0xe0,0xb4,0x01,0x0e,0x90,0x01,0xaf,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,
+0x08,0xf0,0x80,0x11,0x90,0x9e,0x54,0xe0,0x70,0x08,0x90,0x01,0xb9,0x74,0x10,0xf0,
+0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74,0x02,0xf0,0x7f,0x00,0x22,0x90,0x06,
+0x04,0xe0,0x54,0xbf,0xf0,0xef,0x60,0x09,0xe5,0x73,0xb4,0x01,0x04,0xe4,0xff,0x71,
+0x4d,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x0c,0xf0,0x22,0x8f,0x76,0x90,
+0x9e,0x5e,0xe0,0x90,0x01,0xc1,0xf0,0xa3,0xe5,0x12,0xf0,0x12,0x45,0xb1,0xef,0x64,
+0x01,0x70,0x2e,0x90,0x9e,0x69,0x12,0x47,0xfa,0xe5,0x76,0x60,0x10,0x74,0x21,0x2f,
+0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x80,0x0e,0x74,0x21,0x2f,
+0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0,0x90,0x04,0x1f,0x74,0x20,
+0xf0,0x22,0x90,0x9e,0xaf,0xef,0xf0,0x71,0xb0,0x90,0x9e,0xaf,0xe0,0x60,0x05,0x90,
+0x05,0x22,0xe4,0xf0,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x04,0xf0,0x22,
+0x90,0x00,0x11,0xe0,0x44,0x09,0xf0,0x12,0x49,0xb9,0x90,0x9d,0xff,0x12,0x43,0x53,
+0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x78,0x7e,0x08,0x12,0x2b,0x08,0x90,0x9e,0x03,
+0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x08,
+0x90,0x9e,0x07,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x00,0x7e,0x08,
+0x12,0x2b,0x08,0x90,0x9e,0x0b,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,
+0x70,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x68,0x12,0x25,0x14,0x00,0x03,0x2d,0x95,
+0xe4,0xfd,0xff,0x12,0x30,0x2c,0x90,0x9e,0x77,0xe0,0xb4,0x01,0x11,0x90,0x80,0x68,
+0x12,0x25,0x14,0x00,0x03,0x2d,0x95,0xe4,0xfd,0x7f,0x01,0x12,0x30,0x2c,0x22,0x8f,
+0x27,0xe4,0x90,0x9e,0xa8,0xf0,0xa3,0xf0,0x90,0x01,0x09,0xe0,0x7f,0x00,0x30,0xe7,
+0x02,0x7f,0x01,0xef,0x65,0x27,0x60,0x3e,0xc3,0x90,0x9e,0xa9,0xe0,0x94,0x88,0x90,
+0x9e,0xa8,0xe0,0x94,0x13,0x40,0x08,0x90,0x01,0xc6,0xe0,0x44,0x80,0xf0,0x22,0x90,
+0x9e,0xa8,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x7f,0x14,0x7e,0x00,0x12,0x32,0x15,
+0xd3,0x90,0x9e,0xa9,0xe0,0x94,0x32,0x90,0x9e,0xa8,0xe0,0x94,0x00,0x40,0xb9,0x90,
+0x01,0xc7,0xe0,0x30,0xe0,0xb2,0x22,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,
+0x01,0xf0,0x12,0x44,0xff,0x12,0x45,0x00,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x02,0xf0,
+0x22,0x90,0x9e,0x60,0xe0,0x30,0xe6,0x1c,0xe0,0x54,0x0f,0xff,0x90,0x9e,0x4e,0xe0,
+0xfe,0x4f,0x90,0x01,0x2f,0xf0,0xee,0x64,0x80,0x90,0x9e,0x4e,0xf0,0x90,0x9e,0x60,
+0xe0,0x54,0xbf,0xf0,0x22,0x8f,0x75,0x12,0x45,0xb1,0xef,0x64,0x01,0x70,0x2e,0x90,
+0x9e,0x6a,0x12,0x47,0xfa,0xe5,0x75,0x60,0x10,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,
+0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x80,0x0e,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,
+0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0xe4,0x90,
+0x9e,0x2f,0xf0,0xe5,0x74,0x60,0x6a,0xe5,0x73,0x64,0x01,0x70,0x64,0xe5,0x74,0x14,
+0x60,0x29,0x24,0xfd,0x60,0x25,0x24,0x02,0x24,0xfb,0x50,0x02,0x80,0x23,0x90,0x9e,
+0x50,0xe0,0x14,0xf0,0xe0,0x60,0x04,0xa3,0xe0,0x60,0x16,0x90,0x9e,0x50,0xe0,0x70,
+0x0a,0x90,0x9e,0x5f,0xe0,0x90,0x9e,0x50,0xf0,0x80,0x00,0x90,0x9e,0x2f,0x74,0x01,
+0xf0,0x90,0x9e,0x2f,0xe0,0x60,0x2a,0x90,0x9e,0x63,0xe0,0x44,0x10,0xf0,0xe4,0x90,
+0x9e,0x89,0xf0,0x90,0x9e,0x5a,0x12,0x44,0x56,0x90,0x01,0x57,0x74,0x05,0xf0,0x90,
+0x9e,0x5e,0xe0,0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,
+0x1a,0x22,0xef,0xc3,0x94,0x20,0x50,0x39,0xef,0x30,0xe0,0x17,0xed,0xc4,0x54,0xf0,
+0xfd,0xef,0xc3,0x13,0xfe,0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,
+0x0f,0x80,0x10,0xef,0xc3,0x13,0xfe,0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,
+0xe0,0x54,0xf0,0xf0,0x74,0xa4,0x2e,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x4d,
+0xf0,0x22,0xad,0x07,0xed,0xc3,0x94,0x20,0x50,0x0d,0x74,0x84,0x2d,0xf5,0x82,0xe4,
+0x34,0x04,0xf5,0x83,0xe0,0x80,0x0b,0x74,0xa6,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,
+0x83,0xe0,0x54,0x7f,0xf5,0x64,0xe5,0x64,0x54,0x1f,0xfc,0x75,0xf0,0x09,0xed,0x90,
+0x96,0x48,0x12,0x43,0x5f,0xe0,0xff,0x90,0x9e,0x3e,0xf0,0xed,0x25,0xe0,0x24,0x02,
+0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x3f,0xcb,0xf0,
+0xa3,0xeb,0xf0,0xed,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,
+0xfb,0xa3,0xe0,0x90,0x9e,0x41,0xcb,0xf0,0xa3,0xeb,0xf0,0xec,0x25,0xe0,0x24,0x66,
+0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfa,0x74,0x01,0x93,0xfb,0xed,0x25,
+0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xea,0xf0,0xa3,0xeb,0xf0,0xec,
+0xc3,0x9f,0x40,0x02,0xc1,0xc9,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,
+0xec,0xf0,0x04,0xfb,0x90,0x9e,0x3e,0xe0,0xff,0xeb,0xd3,0x9f,0x40,0x02,0xc1,0xfa,
+0xeb,0xc3,0x94,0x10,0x40,0x21,0xeb,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,
+0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,0x3f,0xe0,0x5e,
+0xfe,0xa3,0xe0,0x5f,0x4e,0x70,0x23,0xeb,0xc3,0x94,0x10,0x50,0x39,0x74,0x01,0x7e,
+0x00,0xa8,0x03,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,
+0x41,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x1c,0xeb,0x64,0x13,0x60,0x08,0xeb,
+0x64,0x12,0x60,0x03,0xbb,0x11,0x09,0x90,0x9e,0x3f,0xe0,0x30,0xe0,0x02,0x7b,0x18,
+0xac,0x03,0x8c,0x64,0x80,0x34,0x0b,0x80,0x8b,0x90,0x9e,0x3e,0xe0,0xfb,0x6c,0x70,
+0x69,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xec,0xf0,0x75,0xf0,0x09,
+0xed,0x90,0x96,0x4a,0x12,0x43,0x5f,0xe0,0xb4,0x01,0x0c,0xe5,0x64,0x20,0xe6,0x07,
+0xec,0x44,0x40,0xf5,0x64,0x80,0x03,0xaf,0x64,0x22,0xec,0x25,0xe0,0x24,0x9e,0xf5,
+0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xec,0x25,0xe0,
+0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,
+0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,
+0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0x80,0x5b,0xec,0xd3,0x9b,0x40,0x56,0x90,
+0x9e,0x3e,0xe0,0xff,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xef,0xf0,
+0xac,0x07,0x8f,0x64,0xec,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,
+0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xec,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,
+0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,
+0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,
+0xef,0xf0,0xaf,0x64,0x22,0x74,0x01,0x2d,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,
+0xf0,0xaf,0x05,0xe5,0x64,0x44,0x80,0xfd,0x12,0x58,0xf1,0xe5,0x64,0x44,0x80,0xff,
+0x22,0xac,0x07,0xec,0xc3,0x94,0x20,0x50,0x0d,0x74,0x84,0x2c,0xf5,0x82,0xe4,0x34,
+0x04,0xf5,0x83,0xe0,0x80,0x0b,0x74,0xa6,0x2c,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,
+0xe0,0x54,0x7f,0xf5,0x64,0xe5,0x64,0x54,0x1f,0xff,0x90,0x9e,0x40,0xf0,0x75,0xf0,
+0x09,0xec,0x90,0x96,0x49,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x42,0xf0,0x75,0xf0,0x09,
+0xec,0x90,0x96,0x48,0x12,0x43,0x5f,0xe0,0xfe,0x90,0x9e,0x43,0xf0,0xec,0x25,0xe0,
+0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x44,
+0xcb,0xf0,0xa3,0xeb,0xf0,0xec,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,
+0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x46,0xcb,0xf0,0xa3,0xeb,0xf0,0xef,0xd3,0x9e,
+0x40,0x0a,0x90,0x9e,0x43,0xe0,0x90,0x9e,0x40,0xf0,0xf5,0x64,0xed,0x70,0x02,0x21,
+0x07,0x90,0x9e,0x41,0xed,0xf0,0xe5,0x64,0x30,0xe6,0x0a,0x90,0x9e,0x40,0xe0,0xf5,
+0x64,0xa3,0xe0,0x14,0xf0,0x90,0x9e,0x41,0xe0,0x70,0x02,0x21,0x07,0x90,0x9e,0x40,
+0xe0,0xff,0xd3,0x94,0x00,0x50,0x02,0x21,0x07,0xe4,0x90,0x9e,0x3f,0xf0,0xef,0x14,
+0x90,0x9e,0x3e,0xf0,0x90,0x9e,0x42,0xe0,0xfd,0x90,0x9e,0x3e,0xe0,0xff,0xd3,0x9d,
+0x40,0x6b,0xef,0x94,0x10,0x40,0x21,0xef,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8,
+0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,0x46,0xe0,
+0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x70,0x27,0x90,0x9e,0x3e,0xe0,0xff,0xc3,0x94,0x10,
+0x50,0x33,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,
+0xd8,0xf9,0xff,0x90,0x9e,0x44,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x16,0x90,
+0x9e,0x3e,0xe0,0xf5,0x64,0xa3,0xe0,0x04,0xf0,0x90,0x9e,0x41,0xe0,0xff,0x90,0x9e,
+0x3f,0xe0,0x6f,0x60,0x08,0x90,0x9e,0x3e,0xe0,0x14,0xf0,0x80,0x87,0x90,0x9e,0x41,
+0xe0,0xff,0x90,0x9e,0x3f,0xe0,0xc3,0x9f,0x50,0x0d,0x90,0x9e,0x3e,0xe0,0xb5,0x05,
+0x06,0x90,0x9e,0x42,0xe0,0xf5,0x64,0xe5,0x64,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,
+0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xe5,0x64,0x25,0xe0,0x24,
+0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,
+0xc3,0x13,0xfe,0xef,0x13,0xff,0xec,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,
+0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xaf,0x04,0xad,0x64,0x12,0x58,0xf1,0xaf,0x64,
+0x22,0xe4,0xf5,0x59,0xe5,0x59,0xb4,0x20,0x14,0x90,0x9a,0xc5,0xe0,0x04,0xf0,0x90,
+0x95,0x01,0xe0,0xff,0x90,0x9a,0xc5,0xe0,0xb5,0x07,0x02,0xe4,0xf0,0x75,0xf0,0x09,
+0xe5,0x59,0x90,0x96,0x4b,0x12,0x43,0x5f,0xe0,0x64,0x01,0x60,0x02,0xe1,0x95,0xe5,
+0x59,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,
+0xd3,0x94,0x00,0xee,0x94,0x00,0x50,0x02,0xe1,0x95,0xe5,0x59,0x94,0x20,0x40,0x08,
+0x90,0x9a,0xc5,0xe0,0x60,0x02,0xe1,0xa0,0xe5,0x59,0x75,0xf0,0x0a,0xa4,0x24,0x00,
+0xf9,0x74,0x90,0x35,0xf0,0x75,0x5e,0x01,0xf5,0x5f,0x89,0x60,0xe5,0x59,0x25,0xe0,
+0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90,0x9e,0x38,
+0xcf,0xf0,0xa3,0xef,0xf0,0xe5,0x59,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x98,
+0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90,0x9e,0x3a,0xcf,0xf0,0xa3,0xef,0xf0,0xe5,0x59,
+0xc3,0x94,0x20,0x50,0x14,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,
+0xe0,0x54,0x3f,0x90,0x9e,0x34,0xf0,0x80,0x12,0x74,0xa6,0x25,0x59,0xf5,0x82,0xe4,
+0x34,0x9c,0xf5,0x83,0xe0,0x54,0x3f,0x90,0x9e,0x34,0xf0,0x90,0x9e,0x34,0xe0,0xfe,
+0x54,0x1f,0xa3,0xf0,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x48,0x12,0x43,0x5f,0xe0,
+0x90,0x9e,0x3d,0xf0,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,
+0xc3,0x94,0x05,0x40,0x02,0x81,0x6e,0x90,0x9e,0x3d,0xe0,0xff,0x90,0x9e,0x35,0xe0,
+0x9f,0x40,0x13,0x90,0x9e,0x3d,0xe0,0x90,0x9e,0x35,0xf0,0xee,0x54,0x40,0xfe,0x90,
+0x9e,0x34,0xf0,0xef,0x4e,0xf0,0x90,0x04,0xfd,0xe0,0x64,0x01,0x70,0x29,0x90,0x9e,
+0x35,0xe0,0xff,0x90,0x41,0x4a,0x93,0xfe,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,
+0x9a,0xf5,0x83,0xe0,0xc3,0x9e,0x40,0x06,0xef,0x90,0x40,0xda,0x80,0x30,0x90,0x9e,
+0x35,0xe0,0x90,0x40,0xf6,0x80,0x27,0x90,0x9e,0x35,0xe0,0xff,0x90,0x41,0x4a,0x93,
+0xfe,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xc3,0x9e,0x40,
+0x06,0xef,0x90,0x41,0x12,0x80,0x07,0x90,0x9e,0x35,0xe0,0x90,0x41,0x2e,0x93,0x90,
+0x9e,0x3c,0xf0,0x90,0x9e,0x3c,0xe0,0x75,0xf0,0x06,0xa4,0x24,0x50,0xf9,0x74,0x40,
+0x35,0xf0,0x75,0x5b,0xff,0xf5,0x5c,0x89,0x5d,0x90,0x9e,0x34,0xe0,0x90,0x41,0xf2,
+0x93,0xff,0xd3,0x90,0x9e,0x3b,0xe0,0x9f,0x90,0x9e,0x3a,0xe0,0x94,0x00,0x40,0x09,
+0xe4,0xfd,0xaf,0x59,0x12,0x67,0xb1,0xe1,0x2c,0xe5,0x59,0x25,0xe0,0x24,0xc2,0xf5,
+0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xf5,0x61,0xa3,0xe0,0xf5,0x62,0xab,0x5b,0xaa,
+0x5c,0xa9,0x5d,0x12,0x24,0x62,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x12,
+0x42,0x97,0xfd,0xac,0xf0,0x12,0x24,0x7b,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,
+0xf5,0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x7e,
+0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x02,0x12,0x42,0xc2,0xfd,0xac,0xf0,
+0x12,0x24,0x7b,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,0xaa,
+0x5c,0xa9,0x5d,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f,
+0xa9,0x60,0x90,0x00,0x04,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x24,0x7b,0xef,0x25,
+0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,
+0x03,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x06,
+0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x24,0x7b,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,
+0x61,0xf5,0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x04,0x12,0x42,0x20,0xff,
+0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x08,0x12,0x42,0xc2,0xfd,0xac,
+0xf0,0x12,0x24,0x7b,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,
+0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x05,0x12,0x42,0x20,0xff,0x7e,0x00,0x90,0x9e,0x38,
+0xe0,0xfc,0xa3,0xe0,0xfd,0x12,0x24,0x7b,0xd3,0xe5,0x62,0x9f,0xe5,0x61,0x9e,0x40,
+0x0c,0xe5,0x62,0x9f,0xf5,0x62,0xe5,0x61,0x9e,0xf5,0x61,0x80,0x05,0xe4,0xf5,0x61,
+0xf5,0x62,0xe5,0x59,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe5,
+0x61,0xf0,0xa3,0xe5,0x62,0xf0,0x90,0x9e,0x34,0xe0,0x25,0xe0,0x24,0x66,0xf5,0x82,
+0xe4,0x34,0x41,0xf5,0x83,0xc3,0x74,0x01,0x93,0x95,0x62,0xe4,0x93,0x95,0x61,0x50,
+0x07,0xaf,0x59,0x12,0x65,0xb2,0xe1,0x00,0x90,0x9e,0x34,0xe0,0x25,0xe0,0x24,0x9e,
+0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xd3,0x74,0x01,0x93,0x95,0x62,0xe4,0x93,0x95,
+0x61,0x50,0x02,0xe1,0x00,0x7d,0x01,0xaf,0x59,0x12,0x67,0xb1,0xe1,0x00,0x74,0xe6,
+0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xfc,0x64,0x05,0x60,0x02,0xc1,
+0x09,0x90,0x96,0x43,0xe0,0xff,0xb4,0x03,0x0b,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x19,
+0x40,0x3d,0x80,0x2e,0xef,0xb4,0x02,0x0b,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x11,0x40,
+0x2e,0x80,0x1f,0x90,0x96,0x43,0xe0,0xff,0xb4,0x01,0x0b,0x90,0x9e,0x35,0xe0,0xc3,
+0x94,0x0a,0x40,0x1b,0x80,0x0c,0xef,0x70,0x11,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x03,
+0x40,0x0d,0x90,0x9a,0x84,0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x9a,0x84,0xf0,0x74,
+0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe0,0xf5,0x63,0x74,0x44,0x25,
+0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xff,0xc3,0x94,0x30,0x50,0x02,0xa1,
+0xb6,0x90,0x9a,0x84,0xe0,0x64,0x01,0x60,0x02,0xa1,0xb6,0x74,0x85,0x25,0x59,0xf5,
+0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0x64,0x0a,0x60,0x51,0xef,0x24,0x05,0xff,0xe4,
+0x33,0xfe,0x74,0x41,0x25,0x59,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xfd,0xd3,
+0x9f,0xee,0x64,0x80,0xf8,0x74,0x80,0x98,0x50,0x32,0xed,0x24,0x05,0xff,0xe4,0x33,
+0xfe,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xd3,0x9f,0xee,
+0x64,0x80,0xf8,0x74,0x80,0x98,0x50,0x14,0x74,0x26,0x25,0x59,0xf5,0x82,0xe4,0x34,
+0x9d,0xf5,0x83,0xe0,0xff,0x90,0x9e,0x35,0xe0,0x6f,0x60,0x3d,0x74,0x44,0x25,0x59,
+0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xff,0xd3,0x94,0x42,0x40,0x05,0x75,0x63,
+0x05,0x80,0x0e,0xef,0xd3,0x94,0x39,0x40,0x05,0x75,0x63,0x03,0x80,0x03,0x75,0x63,
+0x01,0x74,0x41,0x25,0x59,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xef,0xf0,0x74,0x85,
+0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0x80,0x29,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,
+0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x74,0x85,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,
+0x83,0xe0,0x04,0xf0,0x80,0x10,0xe4,0xf5,0x63,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,
+0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x90,0x9e,0x35,0xe0,0xff,0x74,0x26,0x25,0x59,0xf5,
+0x82,0xe4,0x34,0x9d,0xf5,0x83,0xef,0xf0,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,
+0x98,0xf5,0x83,0xe5,0x63,0xf0,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x4c,0x12,0x43,
+0x5f,0xe0,0xb4,0x01,0x10,0xe4,0xf5,0x63,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,
+0x9c,0xf5,0x83,0xe4,0xf0,0xad,0x63,0xc1,0xfb,0xec,0x64,0x06,0x60,0x02,0xe1,0x00,
+0xf5,0x61,0xf5,0x62,0x90,0x42,0x13,0x93,0xff,0x7e,0x00,0x90,0x9e,0x38,0xe0,0xfc,
+0xa3,0xe0,0xfd,0x12,0x24,0x7b,0x90,0x9e,0x36,0xee,0xf0,0xa3,0xef,0xf0,0x74,0x84,
+0x25,0x59,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe0,0xf5,0x63,0xe4,0xf5,0x5a,0xab,
+0x5e,0xaa,0x5f,0xa9,0x60,0x75,0xf0,0x02,0xe5,0x5a,0xa4,0xf5,0x82,0x85,0xf0,0x83,
+0x12,0x42,0xc2,0xfd,0xac,0xf0,0xe5,0x5a,0x90,0x42,0x0e,0x93,0xff,0x7e,0x00,0x12,
+0x24,0x7b,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xc3,0x90,0x9e,0x37,
+0xe0,0x95,0x62,0x90,0x9e,0x36,0xe0,0x95,0x61,0x40,0x07,0x05,0x5a,0xe5,0x5a,0xb4,
+0x05,0xbd,0xe5,0x5a,0xc3,0x13,0xf5,0x5a,0xe5,0x63,0xb4,0x01,0x06,0xe5,0x5a,0x70,
+0x46,0x80,0x13,0xe5,0x63,0xb4,0x03,0x15,0xe5,0x5a,0x70,0x05,0x75,0x63,0x03,0x80,
+0x39,0xe5,0x5a,0xb4,0x01,0x05,0x75,0x63,0x01,0x80,0x2f,0x80,0x2a,0xe5,0x63,0xb4,
+0x05,0x28,0xe5,0x5a,0x70,0x05,0x75,0x63,0x05,0x80,0x0d,0xe5,0x5a,0xb4,0x01,0x05,
+0x75,0x63,0x03,0x80,0x03,0x75,0x63,0x01,0xd3,0x90,0x9e,0x3b,0xe0,0x94,0x03,0x90,
+0x9e,0x3a,0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x63,0xd3,0x90,0x9e,0x3b,0xe0,0x94,
+0x03,0x90,0x9e,0x3a,0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x63,0x74,0x84,0x25,0x59,
+0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe5,0x63,0xf0,0xfd,0xaf,0x59,0x12,0x65,0x72,
+0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xd3,0x94,0x05,0x74,
+0xe6,0x50,0x0e,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x04,0xf0,0x80,
+0x0b,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0xab,0x5e,0xaa,0x5f,
+0xa9,0x60,0xe4,0xf5,0xf0,0x12,0x42,0xfa,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,
+0x02,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x04,0xe4,0xf5,0xf0,0x12,0x43,0x19,
+0x90,0x00,0x06,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x08,0xe4,0xf5,0xf0,0x12,
+0x43,0x19,0xe5,0x59,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4,
+0xf0,0xa3,0xf0,0xe5,0x59,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,
+0xe4,0xf0,0xa3,0xf0,0xe5,0x59,0x25,0xe0,0x24,0x44,0xf5,0x82,0xe4,0x34,0x99,0xf5,
+0x83,0xe4,0xf0,0xa3,0xf0,0x05,0x59,0xe5,0x59,0xc3,0x94,0x40,0x50,0x02,0x21,0x54,
+0x22,0x90,0x04,0x44,0x74,0x11,0xf0,0xa3,0x74,0xf0,0xf0,0xa3,0x74,0x0f,0xf0,0xa3,
+0xe4,0xf0,0xfd,0x74,0xa4,0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe4,0xf0,0x0d,
+0xbd,0x10,0xf0,0xe4,0x90,0x9a,0xc5,0xf0,0x90,0x95,0x01,0x04,0xf0,0xe4,0xfd,0x75,
+0xf0,0x0a,0xed,0x90,0x90,0x00,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,
+0xed,0x90,0x90,0x02,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,
+0x90,0x04,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x06,
+0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x08,0x12,0x43,
+0x5f,0xe4,0xf0,0xa3,0xf0,0x74,0x26,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0x74,
+0x13,0xf0,0x74,0x85,0x2d,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe4,0xf0,0x74,0x84,
+0x2d,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0xf0,0xed,0x25,0xe0,0x24,0x80,0xf5,
+0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc4,0xf5,
+0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc4,0xf5,
+0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0x44,0xf5,
+0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc6,0xf5,
+0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0x46,0xf5,
+0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x74,0x86,0x2d,0xf5,0x82,0xe4,
+0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x74,0x46,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,
+0xe4,0xf0,0x74,0xe6,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x90,0x41,
+0xc4,0x93,0xfe,0x74,0x01,0x93,0xff,0x90,0x41,0x8c,0x74,0x01,0x93,0x2f,0xff,0xe4,
+0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,
+0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x4b,
+0x12,0x43,0x5f,0x74,0x01,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x4a,0x12,0x43,0x5f,
+0x74,0x01,0xf0,0x74,0x82,0x2d,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0c,0xf0,
+0x75,0xf0,0x09,0xed,0x90,0x96,0x46,0x12,0x43,0x5f,0x74,0xff,0xf0,0xa3,0xf0,0x75,
+0xf0,0x09,0xed,0x90,0x96,0x44,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0x74,0x0f,0xf0,0x75,
+0xf0,0x09,0xed,0x90,0x96,0x48,0x12,0x43,0x5f,0x74,0x13,0xf0,0x75,0xf0,0x09,0xed,
+0x90,0x96,0x49,0x12,0x43,0x5f,0xe4,0xf0,0xed,0xc3,0x94,0x20,0x50,0x0f,0x74,0x84,
+0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0x74,0x13,0xf0,0x80,0x0d,0x74,0xa6,0x2d,
+0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0x74,0x13,0xf0,0x0d,0xed,0x64,0x40,0x60,0x03,
+0x02,0x6f,0xcf,0x22,0x12,0x24,0x62,0xf5,0x59,0xc3,0x94,0x40,0x50,0x15,0x90,0x00,
+0x02,0x12,0x42,0x20,0xff,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,
+0xef,0xf0,0x22,0xe5,0x59,0xb4,0x40,0x0a,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x96,
+0x42,0xf0,0x22,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x3f,0xfe,0xef,0x54,0x80,
+0xc4,0x13,0x13,0x13,0x54,0x01,0xfd,0xaf,0x06,0x02,0x53,0xa4,0x12,0x24,0x62,0x90,
+0x95,0x01,0xf0,0x22,0x12,0x24,0x62,0xf5,0x73,0x22,0x90,0x00,0x02,0x12,0x42,0x20,
+0xff,0x30,0xe0,0x25,0x12,0x24,0x62,0x90,0x9e,0x56,0xf0,0x90,0x00,0x01,0x12,0x42,
+0x20,0x90,0x9e,0x57,0xf0,0xef,0xc3,0x13,0x54,0x7f,0x90,0x9e,0x55,0xf0,0x90,0x00,
+0x03,0x12,0x42,0x20,0x90,0x9e,0x5b,0xf0,0x22,0x90,0x9e,0x56,0x74,0x01,0xf0,0x90,
+0x9e,0x57,0x74,0x03,0xf0,0x90,0x9e,0x55,0x74,0x14,0xf0,0x90,0x9e,0x5b,0x74,0x05,
+0xf0,0x22,0x12,0x24,0x62,0x30,0xe0,0x18,0xc3,0x13,0x54,0x7f,0x90,0x9e,0x5a,0xf0,
+0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x90,0x9e,0x58,0xe4,0xf0,0xa3,0xef,0xf0,0x22,
+0x90,0x9e,0x5a,0x74,0x07,0xf0,0x90,0x9e,0x58,0xe4,0xf0,0xa3,0x74,0x02,0xf0,0x22,
+0x90,0x02,0x09,0xe0,0xfd,0x12,0x24,0x62,0xfe,0xaf,0x05,0xed,0x2e,0x90,0x9e,0x67,
+0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x9e,0x68,0xf0,0x90,0x00,
+0x02,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x9e,0x69,0xf0,0x90,0x00,0x03,0x12,0x42,
+0x20,0xff,0xed,0x2f,0x90,0x9e,0x6a,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0xae,
+0x05,0xed,0x2f,0x90,0x9e,0x6b,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,
+0x9e,0x3f,0x12,0x43,0x8b,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,
+0xc2,0xfa,0xe5,0xf0,0x24,0x00,0xff,0xe4,0x3a,0xfe,0x90,0x9e,0x3f,0x12,0x43,0x6b,
+0x90,0x00,0x01,0xee,0x8f,0xf0,0x12,0x43,0x19,0x12,0x24,0x62,0xff,0x60,0x2c,0xb5,
+0x22,0x16,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,0x65,0x24,
+0x70,0x04,0xe5,0x23,0x65,0xf0,0x60,0x23,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,
+0x01,0x12,0x42,0xc2,0xff,0xae,0xf0,0x71,0x00,0x80,0x10,0x90,0x9e,0x3f,0x12,0x43,
+0x6b,0x12,0x24,0x62,0x65,0x22,0x60,0x03,0x12,0x44,0xca,0xd0,0xd0,0x92,0xaf,0x22,
+0x90,0x9e,0x42,0xee,0xf0,0xa3,0xef,0xf0,0x75,0x22,0x01,0x8e,0x23,0xf5,0x24,0xe4,
+0xfd,0x7f,0x0b,0x71,0x44,0xe4,0xfd,0x7f,0x02,0x71,0x44,0x12,0x4f,0xbe,0xe4,0xff,
+0x12,0x44,0xf1,0xe4,0xf5,0x26,0x90,0x01,0xc9,0xe5,0x26,0xf0,0x90,0x9e,0x42,0xe0,
+0xfc,0xa3,0xe0,0xfd,0xec,0xfb,0x8d,0x44,0xe4,0xf5,0x45,0x7d,0x01,0x7f,0x60,0x7e,
+0x01,0x02,0x30,0x62,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x45,0xed,0xf0,
+0x90,0x9e,0x44,0xef,0xf0,0xd3,0x94,0x07,0x50,0x4f,0xa3,0xe0,0x70,0x1a,0x90,0x9e,
+0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,
+0x90,0x00,0x47,0xe0,0x5f,0xf0,0x80,0x17,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,
+0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x47,0xe0,0x4f,0xf0,0x12,
+0x49,0xb9,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,
+0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0x80,0x5a,0x90,0x9e,0x44,0xe0,0x24,0xf8,0xf0,
+0xa3,0xe0,0x70,0x1d,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,
+0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x80,
+0x1a,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,
+0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,0x43,0xe0,0x4f,0xf0,0x12,0x49,0xb9,0x90,0x9e,
+0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,
+0x90,0x00,0x43,0xe0,0x5f,0xf0,0x12,0x49,0xb9,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,
+0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x6d,0xe0,0x90,0x9e,0x40,0xf0,0x90,0x9e,0x6e,
+0xe0,0xf5,0x64,0xa3,0xe0,0xf5,0x65,0xe4,0xf5,0x61,0x74,0x70,0x25,0x61,0xf5,0x82,
+0xe4,0x34,0x9e,0xf5,0x83,0xe0,0xff,0x74,0x66,0x25,0x61,0xf8,0xa6,0x07,0x05,0x61,
+0xe5,0x61,0xb4,0x04,0xe5,0x90,0x9e,0x40,0xe0,0x12,0x43,0x94,0x74,0x6b,0x00,0x75,
+0x93,0x01,0x74,0x71,0x02,0x74,0x71,0x03,0x74,0x71,0x04,0x75,0x93,0x05,0x75,0x63,
+0x80,0x75,0x79,0x81,0x75,0x93,0x82,0x00,0x00,0x75,0x8f,0xaf,0x69,0xb1,0x9a,0xa1,
+0x93,0x90,0x9e,0x40,0xe0,0xff,0xb4,0x02,0x08,0x90,0x9e,0x3f,0x74,0x01,0xf0,0x80,
+0x0f,0xef,0x90,0x9e,0x3f,0xb4,0x03,0x05,0x74,0x02,0xf0,0x80,0x03,0x74,0x04,0xf0,
+0xc3,0xe5,0x64,0x94,0x08,0x50,0x49,0xe4,0xf5,0x61,0x90,0x9e,0x3f,0xe0,0xff,0xe5,
+0x61,0xc3,0x9f,0x40,0x02,0xa1,0x93,0xc3,0xe5,0x64,0x94,0x01,0x50,0x14,0xe5,0x61,
+0x25,0x65,0xff,0xc3,0x74,0x03,0x95,0x61,0x24,0x66,0xf8,0xe6,0xfd,0x12,0x4a,0xc1,
+0x80,0x1a,0xc3,0x74,0x03,0x95,0x61,0x24,0x66,0xf8,0xe6,0xff,0xe5,0x61,0x7c,0x00,
+0x25,0x65,0xfd,0xec,0x35,0x64,0x8d,0x82,0xf5,0x83,0xef,0xf0,0x05,0x61,0x80,0xba,
+0xc3,0xe5,0x64,0x94,0x10,0x40,0x02,0xa1,0x93,0x90,0x9e,0x40,0xe0,0x64,0x04,0x60,
+0x02,0xa1,0x93,0xaf,0x67,0xfc,0xfd,0xfe,0x78,0x10,0x12,0x24,0xf5,0xc0,0x04,0xc0,
+0x05,0xc0,0x06,0xc0,0x07,0xaf,0x66,0xe4,0xfc,0xfd,0xfe,0x78,0x18,0x12,0x24,0xf5,
+0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0x12,0x43,0x46,0xc0,0x04,0xc0,0x05,0xc0,
+0x06,0xc0,0x07,0xaf,0x68,0xe4,0xfc,0xfd,0xfe,0x78,0x08,0x12,0x24,0xf5,0xd0,0x03,
+0xd0,0x02,0xd0,0x01,0xd0,0x00,0x12,0x43,0x46,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,
+0x07,0xaf,0x69,0xe4,0xfc,0xfd,0xfe,0x12,0x43,0x46,0xa3,0x12,0x25,0x08,0x90,0x9e,
+0x41,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0xaf,0x65,0xae,0x64,0x12,0x2b,
+0x08,0x80,0x30,0xe5,0x68,0x7f,0x00,0xfe,0xef,0x25,0x69,0xf5,0x63,0xe4,0x3e,0xf5,
+0x62,0xaf,0x63,0xfe,0x12,0x32,0x15,0x80,0x1a,0xe5,0x68,0x7f,0x00,0xfe,0xef,0x25,
+0x69,0xf5,0x63,0xe4,0x3e,0xf5,0x62,0xaf,0x63,0xfe,0x12,0x31,0x82,0x80,0x04,0x7f,
+0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x6a,0xe4,0x90,0x9e,0x45,
+0xf0,0xe5,0x6a,0x14,0xfe,0x90,0x9e,0x45,0xe0,0xff,0xc3,0x9e,0x50,0x0e,0xef,0x04,
+0xfd,0x12,0x2d,0x4d,0x90,0x9e,0x45,0xe0,0x04,0xf0,0x80,0xe5,0xe5,0x6a,0x14,0xff,
+0x7d,0xff,0x12,0x2d,0x4d,0x90,0x9e,0x45,0xe5,0x6a,0xf0,0x90,0x9e,0x45,0xe0,0xc3,
+0x94,0xff,0x50,0x0f,0xe0,0xff,0x04,0xfd,0x12,0x2d,0x4d,0x90,0x9e,0x45,0xe0,0x04,
+0xf0,0x80,0xe8,0xad,0x6a,0x7f,0xff,0x02,0x2d,0x4d,0xd3,0x10,0xaf,0x01,0xc3,0xc0,
+0xd0,0xe4,0xf5,0x5b,0x75,0x5c,0x04,0xf5,0x5d,0xf5,0x5f,0xf5,0x60,0x90,0x02,0x09,
+0xe0,0xff,0x12,0x24,0x62,0xfe,0xef,0x2e,0xf5,0x5e,0x30,0xe0,0x08,0x75,0x59,0x00,
+0x75,0x5a,0x80,0x80,0x05,0xe4,0xf5,0x59,0xf5,0x5a,0xe5,0x5e,0xc3,0x13,0x90,0xfd,
+0x10,0xf0,0x74,0x20,0x25,0x5b,0xf5,0x5b,0xad,0x5a,0xe5,0x5b,0x2d,0xff,0x24,0x01,
+0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x90,0x9e,0x6d,0xf0,0x74,0x02,0x2f,0xf5,
+0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0xfe,0xe5,0x5b,0x2d,0x24,0x03,0xf5,0x82,0xe4,
+0x34,0xfc,0xf5,0x83,0xe0,0x24,0x00,0xff,0xe4,0x3e,0x90,0x9e,0x6e,0xf0,0xa3,0xef,
+0xf0,0x7f,0x04,0xe5,0x5b,0x25,0x5a,0x2f,0x24,0x00,0xf5,0x82,0xe4,0x34,0xfc,0xf5,
+0x83,0xe0,0xfe,0x74,0x6c,0x2f,0xf5,0x82,0xe4,0x34,0x9e,0xf5,0x83,0xee,0xf0,0x0f,
+0xbf,0x08,0xe0,0x91,0x0e,0xef,0x70,0x3f,0x90,0x01,0xc3,0xe0,0x60,0x25,0xc3,0xe5,
+0x60,0x94,0xe8,0xe5,0x5f,0x94,0x03,0x40,0x09,0x90,0x01,0xc6,0xe0,0x44,0x10,0xf0,
+0x80,0x63,0x05,0x60,0xe5,0x60,0x70,0x02,0x05,0x5f,0x7f,0x0a,0x7e,0x00,0x12,0x32,
+0x15,0x80,0xd5,0x90,0x01,0xc6,0xe0,0x90,0x01,0xc3,0x30,0xe2,0x05,0x74,0xfe,0xf0,
+0x80,0x43,0x74,0xff,0xf0,0x80,0x3e,0xe5,0x5b,0xb4,0x78,0x23,0xe4,0xf5,0x5b,0x05,
+0x5e,0xe5,0x5a,0x64,0x80,0x45,0x59,0x70,0x06,0xf5,0x59,0xf5,0x5a,0x80,0x06,0x75,
+0x59,0x00,0x75,0x5a,0x80,0xe5,0x5e,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x80,0x06,0x74,
+0x08,0x25,0x5b,0xf5,0x5b,0xe5,0x5d,0x15,0x5d,0x70,0x02,0x15,0x5c,0xe5,0x5d,0x45,
+0x5c,0x60,0x02,0xc1,0x28,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x06,0x34,0x74,0xff,0xf0,
+0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x22,0xe4,0xf5,0x25,0x22,0xe4,0x90,0x9e,0xaa,
+0xf0,0xa3,0xf0,0x90,0x05,0xf8,0xe0,0x70,0x0f,0xa3,0xe0,0x70,0x0b,0xa3,0xe0,0x70,
+0x07,0xa3,0xe0,0x70,0x03,0x7f,0x01,0x22,0xd3,0x90,0x9e,0xab,0xe0,0x94,0xe8,0x90,
+0x9e,0xaa,0xe0,0x94,0x03,0x40,0x03,0x7f,0x00,0x22,0x7f,0x32,0x7e,0x00,0x12,0x32,
+0x15,0x90,0x9e,0xaa,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x80,0xc6,0x90,0x9e,0x77,
+0xe0,0x90,0x9e,0x0f,0xf0,0x22,0xef,0x70,0x03,0x02,0x79,0x1e,0x90,0x9e,0x0f,0xe0,
+0x60,0x03,0x02,0x7c,0xe9,0x90,0x9d,0xfb,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,
+0x08,0x7f,0x8c,0x7e,0x08,0x12,0x2b,0x08,0x90,0x9d,0xa7,0x12,0x43,0x53,0x90,0x80,
+0x96,0x12,0x25,0x08,0x7f,0x44,0x7e,0x08,0x12,0x2b,0x08,0x90,0x9d,0xab,0x12,0x43,
+0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x5c,0x7e,0x08,0x12,0x2b,0x08,0x90,0x9d,
+0xaf,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x6c,0x7e,0x0e,0x12,0x2b,
+0x08,0x90,0x9d,0xb3,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x70,0x7e,
+0x0e,0x12,0x2b,0x08,0x90,0x9d,0xb7,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,
+0x7f,0x74,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xbb,0x12,0x43,0x53,0x90,0x80,0x96,
+0x12,0x25,0x08,0x7f,0x78,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xbf,0x12,0x43,0x53,
+0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x7c,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xc3,
+0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x0e,0x12,0x2b,0x08,
+0x90,0x9d,0xc7,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x84,0x7e,0x0e,
+0x12,0x2b,0x08,0x90,0x9d,0xcb,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,
+0x88,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xcf,0x12,0x43,0x53,0x90,0x80,0x96,0x12,
+0x25,0x08,0x7f,0x8c,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xd3,0x12,0x43,0x53,0x90,
+0x80,0x96,0x12,0x25,0x08,0x7f,0xd0,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xd7,0x12,
+0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0xd4,0x7e,0x0e,0x12,0x2b,0x08,0x90,
+0x9d,0xdb,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0xd8,0x7e,0x0e,0x12,
+0x2b,0x08,0x90,0x9d,0xdf,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0xdc,
+0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xe3,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,
+0x08,0x7f,0xe0,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xe7,0x12,0x43,0x53,0x90,0x80,
+0x96,0x12,0x25,0x08,0x7f,0xec,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xeb,0x12,0x43,
+0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x08,0x90,0x9d,
+0xef,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0d,0x12,0x2b,
+0x08,0x90,0x9d,0xf3,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x0c,0x7e,
+0x09,0x12,0x2b,0x08,0x90,0x9d,0xf7,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,
+0x7f,0x04,0x7e,0x08,0x12,0x2b,0x08,0x90,0x9e,0x0f,0x74,0x01,0xf0,0x22,0x90,0x9e,
+0x0f,0xe0,0x64,0x01,0x60,0x02,0x81,0xe9,0x7f,0x8c,0x7e,0x08,0x12,0x22,0x65,0x90,
+0x9d,0xfb,0x12,0x25,0x08,0x7f,0x44,0x7e,0x08,0x12,0x22,0x65,0x90,0x9d,0xa7,0x12,
+0x25,0x08,0x7f,0x5c,0x7e,0x08,0x12,0x22,0x65,0x90,0x9d,0xab,0x12,0x25,0x08,0x7f,
+0x6c,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xaf,0x12,0x25,0x08,0x7f,0x70,0x7e,0x0e,
+0x12,0x22,0x65,0x90,0x9d,0xb3,0x12,0x25,0x08,0x7f,0x74,0x7e,0x0e,0x12,0x22,0x65,
+0x90,0x9d,0xb7,0x12,0x25,0x08,0x7f,0x78,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xbb,
+0x12,0x25,0x08,0x7f,0x7c,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xbf,0x12,0x25,0x08,
+0x7f,0x80,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xc3,0x12,0x25,0x08,0x7f,0x84,0x7e,
+0x0e,0x12,0x22,0x65,0x90,0x9d,0xc7,0x12,0x25,0x08,0x7f,0x88,0x7e,0x0e,0x12,0x22,
+0x65,0x90,0x9d,0xcb,0x12,0x25,0x08,0x7f,0x8c,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,
+0xcf,0x12,0x25,0x08,0x7f,0xd0,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xd3,0x12,0x25,
+0x08,0x7f,0xd4,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xd7,0x12,0x25,0x08,0x7f,0xd8,
+0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xdb,0x12,0x25,0x08,0x7f,0xdc,0x7e,0x0e,0x12,
+0x22,0x65,0x90,0x9d,0xdf,0x12,0x25,0x08,0x7f,0xe0,0x7e,0x0e,0x12,0x22,0x65,0x90,
+0x9d,0xe3,0x12,0x25,0x08,0x7f,0xec,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xe7,0x12,
+0x25,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x22,0x65,0x90,0x9d,0xeb,0x12,0x25,0x08,0x7f,
+0x04,0x7e,0x0d,0x12,0x22,0x65,0x90,0x9d,0xef,0x12,0x25,0x08,0x7f,0x0c,0x7e,0x09,
+0x12,0x22,0x65,0x90,0x9d,0xf3,0x12,0x25,0x08,0x7f,0x04,0x7e,0x08,0x12,0x22,0x65,
+0x90,0x9d,0xf7,0x12,0x25,0x08,0x7f,0x8c,0x7e,0x08,0x12,0x22,0x65,0x90,0x9e,0xa4,
+0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0xed,0x44,0xc0,0xfd,0xec,0x90,0x9e,
+0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,
+0x7f,0x8c,0x7e,0x08,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x00,0x01,0x00,
+0x00,0x7f,0x44,0x7e,0x08,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x00,0xdb,
+0x25,0xa4,0x7f,0x5c,0x7e,0x08,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,
+0xdb,0x25,0xa4,0x7f,0x6c,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,
+0x20,0xdb,0x25,0xa4,0x7f,0x70,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,
+0x14,0x04,0x1b,0x25,0xa4,0x7f,0x74,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,
+0x25,0x14,0x04,0x1b,0x25,0xa4,0x7f,0x78,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,
+0x12,0x25,0x14,0x04,0x1b,0x25,0xa4,0x7f,0x7c,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,
+0x96,0x12,0x25,0x14,0x04,0x1b,0x25,0xa4,0x7f,0x80,0x7e,0x0e,0x12,0x2b,0x08,0x90,
+0x80,0x96,0x12,0x25,0x14,0x63,0xdb,0x25,0xa4,0x7f,0x84,0x7e,0x0e,0x12,0x2b,0x08,
+0x90,0x80,0x96,0x12,0x25,0x14,0x04,0x1b,0x25,0xa4,0x7f,0x88,0x7e,0x0e,0x12,0x2b,
+0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25,0xa4,0x7f,0x8c,0x7e,0x0e,0x12,
+0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25,0xa4,0x7f,0xd0,0x7e,0x0e,
+0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25,0xa4,0x7f,0xd4,0x7e,
+0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25,0xa4,0x7f,0xd8,
+0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x00,0x1b,0x25,0xa4,0x7f,
+0xdc,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x00,0x1b,0x25,0xa4,
+0x7f,0xe0,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x24,0xdb,0x25,
+0xa4,0x7f,0xec,0x7e,0x0e,0x12,0x2b,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x22,0x65,0x90,
+0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0xe4,0xff,0xec,0x90,0x9e,
+0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x44,0x11,0xff,0xec,0x90,
+0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,
+0x08,0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x08,0x7f,0x04,0x7e,0x0d,0x12,0x22,0x65,0x90,
+0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x54,0xf0,0xff,0xec,
+0x90,0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x44,0x01,0xff,
+0xec,0x90,0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x96,
+0x12,0x25,0x08,0x7f,0x04,0x7e,0x0d,0x12,0x2b,0x08,0x7f,0x0c,0x7e,0x09,0x12,0x22,
+0x65,0x90,0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0xe4,0xff,0xec,
+0x90,0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x44,0x11,0xff,
+0xec,0x90,0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x96,
+0x12,0x25,0x08,0x7f,0x0c,0x7e,0x09,0x12,0x2b,0x08,0x7f,0x0c,0x7e,0x09,0x12,0x22,
+0x65,0x90,0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0xed,0x54,0x0f,
+0xfd,0xec,0x54,0xf0,0xfc,0x90,0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,
+0x53,0xed,0x44,0x10,0xfd,0xec,0x44,0x01,0xfc,0x90,0x9e,0xa4,0x12,0x25,0x08,0x90,
+0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x0c,0x7e,0x09,0x12,
+0x2b,0x08,0x7f,0x04,0x7e,0x08,0x12,0x22,0x65,0x90,0x9e,0xa4,0x12,0x25,0x08,0x90,
+0x9e,0xa4,0x12,0x43,0x53,0xef,0x54,0xf0,0xff,0xec,0x90,0x9e,0xa4,0x12,0x25,0x08,
+0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x44,0x01,0xff,0xec,0x90,0x9e,0xa4,0x12,0x25,
+0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,
+0x08,0x12,0x2b,0x08,0xe4,0x90,0x9e,0x0f,0xf0,0x22,0x90,0x00,0x02,0x12,0x42,0x20,
+0x90,0x9e,0x1e,0xf0,0xe0,0x60,0x04,0xe0,0xf4,0x70,0x21,0xa2,0xaf,0xe4,0x33,0xf5,
+0x59,0xc2,0xaf,0x90,0x00,0x47,0xe0,0x54,0xfb,0xfd,0x7f,0x47,0x12,0x4a,0xc1,0x7d,
+0x40,0x7f,0x01,0x12,0x31,0x66,0xe5,0x59,0x24,0xff,0x92,0xaf,0x22,0xe4,0xfd,0x7f,
+0x45,0x12,0x4a,0xc1,0x90,0x04,0xfd,0xe4,0xf0,0xa3,0xf0,0x90,0x9e,0x1e,0xf0,0x90,
+0x9e,0x24,0xf0,0x90,0x9e,0x27,0xf0,0x90,0x9e,0x25,0xf0,0x90,0x9e,0x28,0xf0,0x90,
+0x9e,0x26,0xf0,0x90,0x9e,0x29,0xf0,0x90,0x9e,0x10,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,
+0xf0,0xa3,0xf0,0x90,0x9e,0x15,0xf0,0x90,0x9e,0x1a,0xf0,0x90,0x9e,0x1c,0xf0,0x90,
+0x9e,0x2e,0xf0,0x90,0x9e,0x1f,0xf0,0x90,0x9e,0x1b,0xf0,0x90,0x9e,0x14,0xf0,0x90,
+0x00,0x51,0xe0,0x44,0xc0,0xfd,0x7f,0x51,0x02,0x4a,0xc1,0x90,0x9e,0x15,0xe0,0xc3,
+0x94,0x14,0x50,0x05,0xe0,0x04,0xf0,0xc1,0x33,0x90,0x9e,0x15,0xe0,0x64,0x14,0x60,
+0x02,0xc1,0x33,0x90,0x9e,0x24,0xe0,0x70,0x25,0x90,0x9e,0x27,0xe0,0x70,0x1f,0x90,
+0x9e,0x25,0xe0,0x70,0x19,0x90,0x9e,0x28,0xe0,0x70,0x13,0x90,0x9e,0x26,0xe0,0x70,
+0x0d,0x90,0x9e,0x29,0xe0,0x70,0x07,0x90,0x04,0xfd,0xe0,0x54,0xfe,0xf0,0x90,0x9e,
+0x24,0xe0,0x90,0x04,0x44,0xf0,0x90,0x9e,0x25,0xe0,0x90,0x04,0x45,0xf0,0x90,0x9e,
+0x26,0xe0,0x90,0x04,0x46,0xf0,0xa3,0xe4,0xf0,0x90,0x9e,0x27,0xe0,0x90,0x04,0x48,
+0xf0,0x90,0x9e,0x28,0xe0,0x90,0x04,0x49,0xf0,0x90,0x9e,0x29,0xe0,0x90,0x04,0x4a,
+0xf0,0xa3,0xe4,0xf0,0x90,0x9e,0x10,0xe0,0x90,0x04,0x4c,0xf0,0x90,0x9e,0x11,0xe0,
+0x90,0x04,0x4d,0xf0,0x90,0x9e,0x12,0xe0,0x90,0x04,0x4e,0xf0,0x90,0x9e,0x13,0xe0,
+0x90,0x04,0x4f,0xf0,0xe4,0x90,0x9e,0x15,0xf0,0x90,0x9e,0x10,0x04,0xf0,0xe4,0xa3,
+0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x9e,0x24,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,
+0xf0,0xa3,0xf0,0x90,0x05,0x60,0xe0,0x90,0x9e,0x34,0xf0,0x90,0x05,0x61,0xe0,0x90,
+0x9e,0x35,0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x36,0xf0,0x90,0x05,0x63,0xe0,0x90,
+0x9e,0x37,0xf0,0x90,0x9e,0x2d,0xe0,0xff,0x90,0x9e,0x37,0xe0,0xfe,0xd3,0x9f,0x50,
+0x0b,0x90,0x9e,0x2d,0xe0,0xc3,0x9e,0xd3,0x94,0x01,0x40,0x11,0x90,0x9e,0x1b,0xe0,
+0xb4,0x01,0x02,0x80,0x03,0x90,0x9e,0x1f,0xe0,0xff,0x12,0x4e,0xd8,0x22,0x90,0x9e,
+0x2e,0xe0,0x64,0x01,0x60,0x08,0x90,0x9e,0x1c,0xe0,0x60,0x02,0xe1,0x55,0x90,0x9e,
+0x10,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x3b,0x90,0x9e,0x11,0xe0,
+0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x28,0x90,0x9e,0x12,0xe0,0xc3,
+0x94,0xff,0x50,0x0a,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x11,0xf0,0x80,0x15,0x90,0x9e,
+0x13,0xe0,0xc3,0x94,0xff,0x50,0x10,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x12,0xf0,0x90,
+0x9e,0x11,0xf0,0x90,0x9e,0x10,0xf0,0x90,0x00,0x44,0xe0,0x54,0x0c,0x60,0x76,0xe0,
+0x30,0xe2,0x32,0x90,0x9e,0x24,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,
+0x24,0x90,0x9e,0x25,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,
+0x90,0x9e,0x26,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x25,
+0xf0,0x90,0x9e,0x24,0xf0,0x90,0x00,0x44,0xe0,0x30,0xe3,0x32,0x90,0x9e,0x27,0xe0,
+0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,0x9e,0x28,0xe0,0xc3,0x94,
+0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,0x9e,0x29,0xe0,0xc3,0x94,0xff,
+0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x28,0xf0,0x90,0x9e,0x27,0xf0,0x90,0x04,
+0xfd,0xe0,0x44,0x01,0xf0,0x22,0xf5,0x67,};
+
+// =================== v79 UMC B Cut COMMON 2011-10-06 =====================
+u8 Rtl8192CUFwUMCBCutImgArray[UMCBCutImgArrayLength] = {
+0xc2,0x88,0x02,0x00,0x4f,0x00,0x00,0x00,0x0a,0x06,0x18,0x11,0x5e,0x3f,0x01,0x00,
+0x61,0x80,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x02,0x43,0xba,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x02,0x49,0x13,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x02,0x5f,0x7b,0x00,0x00,0x00,0x00,0x00,0xa1,0xdf,0x00,0x00,0x00,
+0x05,0x04,0x03,0x02,0x00,0x03,0x06,0x05,0x04,0x03,0x00,0x04,0x06,0x05,0x04,0x02,
+0x00,0x04,0x08,0x07,0x06,0x04,0x00,0x06,0x0a,0x09,0x08,0x06,0x00,0x08,0x0a,0x09,
+0x08,0x04,0x00,0x08,0x0a,0x09,0x08,0x02,0x00,0x08,0x0a,0x09,0x08,0x00,0x00,0x08,
+0x12,0x11,0x10,0x08,0x00,0x10,0x1a,0x19,0x18,0x10,0x00,0x18,0x22,0x21,0x20,0x18,
+0x00,0x20,0x22,0x21,0x20,0x10,0x00,0x20,0x22,0x21,0x20,0x08,0x00,0x20,0x22,0x21,
+0x1c,0x08,0x00,0x20,0x22,0x21,0x14,0x08,0x00,0x20,0x22,0x20,0x18,0x08,0x00,0x20,
+0x31,0x30,0x20,0x10,0x00,0x30,0x31,0x30,0x18,0x00,0x00,0x30,0x31,0x2f,0x10,0x10,
+0x00,0x30,0x31,0x2c,0x10,0x10,0x00,0x30,0x31,0x28,0x10,0x00,0x00,0x30,0x31,0x20,
+0x10,0x00,0x00,0x30,0x31,0x10,0x10,0x00,0x00,0x30,0x04,0x04,0x04,0x05,0x04,0x04,
+0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04,
+0x05,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x05,0x05,0x05,0x05,0x06,0x07,0x0a,0x0b,
+0x0d,0x10,0x04,0x05,0x05,0x06,0x06,0x09,0x0c,0x11,0x08,0x08,0x09,0x09,0x0a,0x0c,
+0x10,0x11,0x04,0x04,0x04,0x05,0x04,0x04,0x05,0x07,0x07,0x07,0x08,0x0a,0x04,0x04,
+0x04,0x04,0x06,0x0a,0x0b,0x0d,0x05,0x05,0x07,0x07,0x08,0x0b,0x0d,0x0f,0x04,0x04,
+0x04,0x05,0x07,0x07,0x09,0x09,0x0c,0x0e,0x10,0x12,0x04,0x04,0x05,0x05,0x06,0x0a,
+0x11,0x13,0x09,0x09,0x09,0x09,0x0c,0x0e,0x11,0x13,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x24,0x26,0x2a,0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a,0x00,0x00,
+0x00,0x1f,0x23,0x28,0x2a,0x2c,0x00,0x04,0x00,0x04,0x00,0x08,0x00,0x10,0x00,0x18,
+0x00,0x24,0x00,0x30,0x00,0x48,0x00,0x60,0x00,0x90,0x00,0xc0,0x00,0xd8,0x00,0x50,
+0x00,0x78,0x00,0xa0,0x00,0xc8,0x01,0x40,0x01,0x90,0x01,0xe0,0x02,0x30,0x01,0x2c,
+0x01,0x40,0x01,0xe0,0x02,0xd0,0x03,0xe8,0x04,0xb0,0x06,0x40,0x07,0xd0,0x00,0x02,
+0x00,0x02,0x00,0x04,0x00,0x08,0x00,0x0c,0x00,0x12,0x00,0x18,0x00,0x24,0x00,0x30,
+0x00,0x48,0x00,0x60,0x00,0x6c,0x00,0x28,0x00,0x3c,0x00,0x50,0x00,0x64,0x00,0xa0,
+0x00,0xc8,0x00,0xf0,0x01,0x18,0x00,0x64,0x00,0xa0,0x00,0xf0,0x01,0x68,0x01,0xf4,
+0x02,0x58,0x03,0x20,0x03,0xe8,0x02,0x02,0x02,0x02,0x02,0x02,0x03,0x03,0x04,0x04,
+0x05,0x07,0x04,0x04,0x07,0x0a,0x0a,0x0c,0x0c,0x12,0x05,0x07,0x07,0x08,0x0b,0x12,
+0x24,0x3c,0x01,0x01,0x01,0x01,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x01,0x02,
+0x03,0x04,0x05,0x06,0x07,0x08,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x20,0x1e,
+0x1c,0x18,0x10,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0xbb,0x01,0x0c,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0x22,0x50,
+0x06,0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,0x25,0x82,0xf8,0xe2,0x22,
+0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe4,0x93,0x22,0xbb,0x01,0x06,
+0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8,
+0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22,
+0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2,
+0x22,0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0,0xc5,0xf0,0xf8,0xe5,0x82,0x15,0x82,0x70,
+0x02,0x15,0x83,0xe0,0x38,0xf0,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a,0x83,0xe0,0xf5,
+0xf0,0xa3,0xe0,0x22,0x50,0x06,0x87,0xf0,0x09,0xe7,0x19,0x22,0xbb,0xfe,0x07,0xe3,
+0xf5,0xf0,0x09,0xe3,0x19,0x22,0x89,0x82,0x8a,0x83,0xe4,0x93,0xf5,0xf0,0x74,0x01,
+0x93,0x22,0xbb,0x01,0x10,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,
+0xf5,0xf0,0xa3,0xe0,0x22,0x50,0x09,0xe9,0x25,0x82,0xf8,0x86,0xf0,0x08,0xe6,0x22,
+0xbb,0xfe,0x0a,0xe9,0x25,0x82,0xf8,0xe2,0xf5,0xf0,0x08,0xe2,0x22,0xe5,0x83,0x2a,
+0xf5,0x83,0xe9,0x93,0xf5,0xf0,0xa3,0xe9,0x93,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a,
+0x83,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x06,0xf7,0x09,0xa7,0xf0,0x19,0x22,0xbb,
+0xfe,0x06,0xf3,0xe5,0xf0,0x09,0xf3,0x19,0x22,0xf8,0xbb,0x01,0x11,0xe5,0x82,0x29,
+0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x09,
+0xe9,0x25,0x82,0xc8,0xf6,0x08,0xa6,0xf0,0x22,0xbb,0xfe,0x09,0xe9,0x25,0x82,0xc8,
+0xf2,0xe5,0xf0,0x08,0xf2,0x22,0xef,0x4b,0xff,0xee,0x4a,0xfe,0xed,0x49,0xfd,0xec,
+0x48,0xfc,0x22,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0xa4,
+0x25,0x82,0xf5,0x82,0xe5,0xf0,0x35,0x83,0xf5,0x83,0x22,0xe0,0xfb,0xa3,0xe0,0xfa,
+0xa3,0xe0,0xf9,0x22,0xf8,0xe0,0xfb,0xa3,0xa3,0xe0,0xf9,0x25,0xf0,0xf0,0xe5,0x82,
+0x15,0x82,0x70,0x02,0x15,0x83,0xe0,0xfa,0x38,0xf0,0x22,0xeb,0xf0,0xa3,0xea,0xf0,
+0xa3,0xe9,0xf0,0x22,0xd0,0x83,0xd0,0x82,0xf8,0xe4,0x93,0x70,0x12,0x74,0x01,0x93,
+0x70,0x0d,0xa3,0xa3,0x93,0xf8,0x74,0x01,0x93,0xf5,0x82,0x88,0x83,0xe4,0x73,0x74,
+0x02,0x93,0x68,0x60,0xef,0xa3,0xa3,0xa3,0x80,0xdf,0x02,0x43,0xf8,0x02,0x50,0x31,
+0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0x40,0x03,0xf6,0x80,0x01,0xf2,0x08,0xdf,0xf4,
+0x80,0x29,0xe4,0x93,0xa3,0xf8,0x54,0x07,0x24,0x0c,0xc8,0xc3,0x33,0xc4,0x54,0x0f,
+0x44,0x20,0xc8,0x83,0x40,0x04,0xf4,0x56,0x80,0x01,0x46,0xf6,0xdf,0xe4,0x80,0x0b,
+0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,0x90,0x44,0x3d,0xe4,0x7e,0x01,0x93,0x60,
+0xbc,0xa3,0xff,0x54,0x3f,0x30,0xe5,0x09,0x54,0x1f,0xfe,0xe4,0x93,0xa3,0x60,0x01,
+0x0e,0xcf,0x54,0xc0,0x25,0xe0,0x60,0xa8,0x40,0xb8,0xe4,0x93,0xa3,0xfa,0xe4,0x93,
+0xa3,0xf8,0xe4,0x93,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xf0,0xa3,0xc8,
+0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xdf,0xe9,0xde,0xe7,0x80,0xbe,0x41,0x9e,0x66,
+0x00,0x41,0x9e,0xae,0x00,0x41,0x9e,0x4d,0x80,0x41,0x9e,0x4e,0x80,0x41,0x9e,0xb0,
+0x00,0x00,0xf0,0x90,0x9e,0x57,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x54,
+0x7e,0x01,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x88,0xeb,0xf0,0xa3,0xe0,
+0xfb,0xa3,0xe0,0xf5,0x44,0xe4,0xf5,0x45,0x12,0x35,0xab,0xd0,0xd0,0x92,0xaf,0x22,
+0x90,0x01,0x5f,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x08,0xf0,0xe4,0x90,0x9e,0x89,0xf0,
+0x90,0x9e,0x55,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91,
+0x62,0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,0x90,0x9e,0x5c,
+0x14,0xf0,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0xc3,0x94,0x0c,0x50,0x02,0xf1,0x16,0x22,
+0x8f,0x82,0x8e,0x83,0xa3,0xa3,0xa3,0xe4,0xf0,0x22,0xe4,0xf5,0x22,0x7f,0x60,0x7e,
+0x01,0x80,0xed,0x90,0x9e,0x60,0xe0,0xff,0x7d,0x01,0xe1,0x1a,0xb1,0xb1,0xbf,0x01,
+0x0f,0x90,0x9e,0x68,0xe0,0xff,0xe4,0xfd,0xf1,0xfe,0x90,0x04,0x1f,0x74,0x20,0xf0,
+0x22,0x90,0x04,0x1b,0xe0,0x54,0x7f,0x64,0x7f,0x7f,0x01,0x60,0x02,0x7f,0x00,0x22,
+0x22,0x22,0x22,0x02,0x60,0x0d,0x02,0x60,0x14,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,
+0x8b,0x1b,0x8a,0x1c,0x89,0x1d,0x90,0x9e,0x8b,0x71,0x8b,0xab,0x1e,0xaa,0x1f,0xa9,
+0x20,0x90,0x9e,0x8e,0x71,0x8b,0xaf,0x21,0x15,0x21,0xef,0x60,0x1b,0x90,0x9e,0x8e,
+0xe4,0x75,0xf0,0x01,0x71,0x74,0x12,0x29,0xd9,0xff,0x90,0x9e,0x8b,0xe4,0x75,0xf0,
+0x01,0x71,0x74,0xef,0x51,0x4d,0x80,0xde,0xab,0x1b,0xaa,0x1c,0xa9,0x1d,0xd0,0xd0,
+0x92,0xaf,0x22,0x90,0x06,0xa9,0xe0,0xf5,0x50,0x54,0xc0,0x70,0x0d,0x90,0x9e,0x63,
+0xe0,0x54,0xfe,0xf0,0xe0,0x54,0xfd,0xf0,0x91,0xd3,0xe5,0x50,0x30,0xe6,0x17,0x90,
+0x9e,0x63,0xe0,0x44,0x01,0xf0,0x90,0x9e,0x61,0xe0,0x64,0x02,0x60,0x04,0x91,0xdc,
+0x80,0x0b,0x91,0x80,0x80,0x07,0x90,0x9e,0x63,0xe0,0x54,0xfe,0xf0,0xe5,0x50,0x90,
+0x9e,0x63,0x30,0xe7,0x17,0xe0,0x44,0x02,0xf0,0xe4,0x90,0x9e,0x89,0x91,0x52,0x90,
+0x01,0x57,0x74,0x05,0xf0,0x90,0x9e,0x62,0x74,0x01,0xf0,0x22,0xe0,0x54,0xfd,0xf0,
+0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x04,0x1d,0xe0,0x60,0x1a,0x90,0x05,
+0x22,0xe0,0x54,0x90,0x60,0x07,0x90,0x01,0xc6,0xe0,0x44,0x40,0xf0,0x90,0x01,0xc7,
+0xe0,0x30,0xe1,0xe4,0x7f,0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0xc0,
+0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,
+0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74,
+0xdf,0xf0,0x74,0x45,0xa3,0xf0,0x53,0x91,0xdf,0x90,0x01,0x3c,0xe0,0x55,0x30,0xf5,
+0x34,0xa3,0xe0,0x55,0x31,0xf5,0x35,0xa3,0xe0,0x55,0x32,0xf5,0x36,0xa3,0xe0,0x55,
+0x33,0xf5,0x37,0xe5,0x34,0x30,0xe0,0x06,0x90,0x01,0x3c,0x74,0x01,0xf0,0xe5,0x34,
+0x30,0xe1,0x08,0x90,0x01,0x3c,0x74,0x02,0xf0,0xf1,0xbc,0xe5,0x34,0x30,0xe2,0x38,
+0x90,0x01,0x3c,0x74,0x04,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe0,0x24,0x90,0x9e,0x89,
+0xe4,0xf0,0x90,0x9e,0x55,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x58,0x7e,
+0x01,0x91,0x62,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x80,
+0x07,0x90,0x9e,0x5d,0xe4,0xf0,0x91,0xd3,0xe5,0x34,0x30,0xe3,0x38,0x90,0x01,0x3c,
+0x74,0x08,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe1,0x24,0x90,0x9e,0x89,0xe4,0xf0,0x90,
+0x9e,0x55,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91,0x62,
+0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,0x80,0x07,0x90,0x9e,
+0x5c,0xe4,0xf0,0x91,0xd3,0xe5,0x34,0x30,0xe4,0x09,0x90,0x01,0x3c,0x74,0x10,0xf0,
+0x12,0x71,0xa3,0xe5,0x34,0x30,0xe5,0x09,0x90,0x01,0x3c,0x74,0x20,0xf0,0x12,0x52,
+0x69,0xe5,0x35,0x30,0xe0,0x1a,0x90,0x01,0x3d,0x74,0x01,0xf0,0x90,0x01,0x2f,0xe0,
+0x44,0x7f,0xf0,0x90,0x00,0x83,0xe0,0x90,0x9e,0x60,0xf0,0x12,0x63,0xac,0x91,0xd3,
+0x74,0xdf,0x04,0x90,0x01,0xc4,0xf0,0x74,0x45,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,
+0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,
+0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x7d,0x01,0x7f,0x0c,0x8f,0x71,0x8d,0x72,0xe5,0x71,
+0x54,0x0f,0xff,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0x6f,0x60,0x72,0xe5,0x71,0x30,0xe2,
+0x2b,0x90,0x9e,0x5e,0xe0,0x20,0xe2,0x05,0x7f,0x01,0x12,0x62,0xa7,0x90,0x9e,0x5e,
+0xe0,0x30,0xe3,0x07,0xe5,0x71,0x20,0xe3,0x02,0x80,0x54,0x90,0x9e,0x5e,0xe0,0x20,
+0xe3,0x4c,0xe5,0x71,0x30,0xe3,0x47,0xaf,0x72,0x02,0x62,0x43,0x90,0x9e,0x5e,0xe0,
+0x54,0x0f,0xff,0xbf,0x0c,0x0d,0xe5,0x71,0x20,0xe3,0x08,0x12,0x4c,0xd5,0xef,0x60,
+0x2d,0xf1,0x9f,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0xff,0xbf,0x04,0x0e,0xe5,0x71,0x20,
+0xe2,0x09,0x12,0x5e,0x8f,0xef,0x60,0x16,0x12,0x48,0xaa,0x90,0x9e,0x5e,0xe0,0x54,
+0x0f,0xff,0xbf,0x02,0x09,0x12,0x61,0xd0,0xef,0x60,0x03,0x12,0x63,0x92,0x22,0x90,
+0x06,0x04,0xe0,0x44,0x40,0xf0,0xe5,0x73,0xb4,0x01,0x05,0x7f,0x01,0x12,0x62,0x62,
+0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x04,0xf0,0x22,0x90,0x9e,0x62,0xe0,
+0x60,0x0e,0xe4,0xf0,0xa3,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0x07,0x70,0x2b,0x80,0x27,
+0x90,0x9e,0x51,0xe0,0x04,0xf0,0x90,0x9e,0x63,0xe0,0x54,0xef,0xf0,0x90,0x9e,0x56,
+0xe0,0xff,0x90,0x9e,0x51,0xe0,0xd3,0x9f,0x40,0x0d,0xe5,0x73,0xb4,0x01,0x0a,0xa3,
+0xe0,0x70,0x06,0xe0,0x04,0xf0,0x22,0x91,0xd3,0x22,0xe0,0xff,0x7d,0x01,0x90,0x9e,
+0x9c,0xef,0xf0,0xa3,0xed,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xe5,0x74,0x60,0x04,0xe4,
+0xff,0x11,0x8f,0x90,0x9e,0x9c,0xe0,0x30,0xe0,0x09,0x90,0x9e,0x9e,0xe4,0xf0,0xa3,
+0x74,0x80,0xf0,0x90,0x9e,0x9c,0xe0,0xff,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x90,0x04,
+0x25,0xef,0xf0,0x90,0x9e,0x9d,0xe0,0x60,0x1f,0xa3,0xa3,0xe0,0xff,0x24,0x0f,0xf5,
+0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x74,0x10,0x2f,0xf5,0x82,0xe4,
+0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x90,0x9e,0x9e,0xa3,0xe0,0xff,0xfd,0x24,
+0x08,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe4,0xf0,0x74,0x09,0x2d,0xf5,0x82,0xe4,
+0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,
+0xf5,0x83,0xe0,0x54,0xf7,0xf0,0x90,0x9e,0x9e,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0xef,
+0x60,0x0b,0x90,0x9e,0x77,0xe0,0xb4,0x01,0x10,0xe4,0xff,0x80,0x09,0x90,0x9e,0x77,
+0xe0,0xb4,0x01,0x05,0x7f,0x01,0x12,0x77,0x2e,0x22,0x90,0x01,0x37,0x74,0x02,0xf0,
+0x90,0x05,0x22,0x74,0xff,0xf0,0x12,0x76,0x1a,0xef,0x70,0x06,0x90,0x01,0xc8,0x74,
+0xfd,0xf0,0x7d,0x02,0x7f,0x03,0x12,0x36,0xe6,0xe5,0x74,0x60,0x04,0x7f,0x01,0x11,
+0x8f,0x12,0x76,0x5b,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x02,0xf0,0x22,
+0x7d,0x02,0x7f,0x03,0x12,0x36,0x75,0xe5,0x74,0x14,0x24,0xfd,0x50,0x02,0x80,0x22,
+0x90,0x9e,0x61,0xe0,0x60,0x06,0x7d,0x01,0x7f,0x0c,0x80,0x0f,0x90,0x9e,0x5e,0xe0,
+0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0x1a,0xe4,0xff,
+0x11,0x8f,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,
+0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,
+0x90,0x01,0xc4,0x74,0x13,0xf0,0x74,0x49,0xa3,0xf0,0x90,0x01,0x34,0xe0,0x55,0x28,
+0xf5,0x2c,0x90,0x01,0x36,0xe0,0x55,0x2a,0xf5,0x2e,0xa3,0xe0,0x55,0x2b,0xf5,0x2f,
+0xe5,0x2c,0x20,0xe0,0x02,0x41,0xb3,0x90,0x01,0x34,0x74,0x01,0xf0,0x85,0xd1,0x08,
+0x85,0xd2,0x09,0x85,0xd3,0x0a,0x85,0xd4,0x0b,0x85,0xd5,0x0c,0x85,0xd6,0x0d,0x85,
+0xd7,0x0e,0x85,0xd9,0x0f,0xe5,0x0f,0x54,0x40,0xc3,0x13,0xff,0xe5,0x0e,0x54,0x20,
+0x6f,0x70,0x02,0x41,0x63,0xe5,0x0f,0x30,0xe5,0x02,0x41,0x63,0xe5,0x0d,0x54,0x3f,
+0xf5,0x4d,0xe5,0x08,0x54,0x3f,0xf5,0x4e,0xe5,0x0c,0x54,0x1f,0xff,0xe5,0x4d,0x25,
+0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,
+0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,
+0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x4e,0xd3,0x94,0x04,0x40,0x03,0x75,
+0x4e,0x04,0x75,0xf0,0x0a,0xe5,0x4d,0x90,0x90,0x00,0x12,0x43,0x5f,0x75,0xf0,0x02,
+0xe5,0x4e,0x12,0x43,0x5f,0xe0,0xfe,0xa3,0xe0,0xff,0xe5,0x0e,0x54,0x1f,0x2f,0xff,
+0xe4,0x3e,0xfe,0x75,0xf0,0x0a,0xe5,0x4d,0x90,0x90,0x00,0x12,0x43,0x5f,0x75,0xf0,
+0x02,0xe5,0x4e,0x12,0x43,0x5f,0xee,0xf0,0xa3,0xef,0xf0,0xe5,0x0f,0x20,0xe6,0x24,
+0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x98,
+0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0a,0x30,0xe7,0x36,0xaf,0x4d,0x12,
+0x5b,0x6d,0x80,0x2f,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0x44,0xf5,
+0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0a,0x30,0xe7,
+0x12,0xe5,0x0a,0x54,0x7f,0xfd,0xe5,0x0e,0x54,0x1f,0xf5,0x53,0xab,0x4e,0xaf,0x4d,
+0x12,0x5b,0x0a,0xe5,0x74,0x14,0x24,0xfd,0x50,0x02,0x80,0x47,0x90,0x9e,0x61,0xe0,
+0x60,0x38,0x90,0x01,0x5b,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x04,0xf0,0x12,0x44,0xf1,
+0xef,0x64,0x01,0x70,0x2e,0x90,0x9e,0x55,0xe0,0xf5,0x44,0x75,0x45,0x00,0xe4,0xfb,
+0xfd,0x7f,0x58,0x7e,0x01,0x12,0x35,0xab,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,
+0x92,0x74,0x01,0xf0,0x90,0x9e,0x5d,0xf0,0x80,0x09,0x12,0x44,0xf1,0xbf,0x01,0x03,
+0x12,0x44,0xd3,0xe5,0x2c,0x30,0xe1,0x21,0x90,0x01,0x34,0x74,0x02,0xf0,0x85,0xd1,
+0x13,0x85,0xd2,0x14,0x85,0xd3,0x15,0x85,0xd4,0x16,0x85,0xd5,0x17,0x85,0xd6,0x18,
+0x85,0xd7,0x19,0x85,0xd9,0x1a,0x12,0x5c,0x61,0xe5,0x2c,0x30,0xe3,0x06,0x90,0x01,
+0x34,0x74,0x08,0xf0,0xe5,0x2c,0x30,0xe4,0x09,0x90,0x01,0x34,0x74,0x10,0xf0,0x43,
+0x12,0x10,0xe5,0x2c,0x30,0xe5,0x24,0x90,0x01,0xcf,0xe0,0x30,0xe5,0x1d,0xe0,0x54,
+0xdf,0xf0,0x90,0x01,0x34,0x74,0x20,0xf0,0x75,0xa8,0x00,0x75,0xe8,0x00,0xd1,0xed,
+0x90,0x00,0x03,0xe0,0x54,0xfb,0xf0,0xb1,0x28,0x80,0xfe,0xe5,0x2c,0x30,0xe6,0x06,
+0x90,0x01,0x34,0x74,0x40,0xf0,0xe5,0x2e,0x30,0xe1,0x3b,0x90,0x01,0x36,0x74,0x02,
+0xf0,0x43,0x12,0x40,0x90,0x01,0x02,0xe0,0x54,0x03,0x64,0x01,0x70,0x28,0x90,0x01,
+0x37,0xe0,0x30,0xe0,0x0a,0x74,0x01,0xf0,0x90,0x9e,0x66,0xe4,0xf0,0x80,0x17,0x90,
+0x9e,0x66,0xe0,0x04,0xf0,0xe0,0xc3,0x94,0x0a,0x40,0x0b,0xe4,0xf0,0x90,0x04,0x19,
+0xe0,0x30,0xe0,0x02,0xf1,0xfc,0xe5,0x2e,0x30,0xe0,0x12,0x90,0x9e,0x76,0x74,0x01,
+0xf0,0x90,0x01,0x36,0xf0,0x12,0x64,0x09,0x90,0x9e,0x76,0xe4,0xf0,0xe5,0x2e,0x30,
+0xe2,0x78,0x90,0x01,0x36,0x74,0x04,0xf0,0x90,0x01,0xbd,0xe0,0x04,0xf0,0xe5,0x73,
+0x64,0x01,0x70,0x66,0xe5,0x74,0x60,0x62,0xe5,0x74,0x64,0x02,0x60,0x06,0xe5,0x74,
+0x64,0x05,0x70,0x27,0x90,0x06,0xab,0xe0,0x90,0x9e,0x50,0xf0,0x90,0x06,0xaa,0xe0,
+0x90,0x9e,0x5f,0xf0,0x90,0x9e,0x50,0xe0,0x70,0x07,0x90,0x9e,0x5f,0xe0,0xff,0x80,
+0x05,0x90,0x9e,0x50,0xe0,0xff,0x90,0x9e,0x50,0xef,0xf0,0x90,0x9e,0x52,0xe0,0x60,
+0x03,0xe0,0x14,0xf0,0x90,0x9e,0x51,0xe4,0xf0,0x90,0x01,0x57,0xf0,0x90,0x01,0x3c,
+0x74,0x02,0xf0,0x90,0x9e,0x63,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0xef,0xf0,0xe5,0x74,
+0x14,0x24,0xfd,0x50,0x02,0x80,0x03,0x12,0x45,0x53,0xe5,0x2e,0x30,0xe3,0x28,0x90,
+0x01,0x36,0x74,0x08,0xf0,0xe5,0x73,0x64,0x01,0x70,0x1c,0xe5,0x74,0x60,0x18,0x90,
+0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x9e,0x89,0xe4,0x12,0x44,
+0x52,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x2e,0x30,0xe4,0x2f,0x90,0x01,0x36,0x74,
+0x10,0xf0,0xe5,0x73,0x64,0x01,0x70,0x23,0xe5,0x74,0x60,0x1f,0x90,0x01,0x57,0xe4,
+0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x9e,0x62,0xe4,0xf0,0x90,0x9e,0x63,0xe0,
+0x54,0xfd,0xf0,0xe0,0x54,0x07,0x70,0x03,0x12,0x44,0xd3,0xe5,0x2e,0x30,0xe5,0x1f,
+0x90,0x01,0x36,0x74,0x20,0xf0,0xe5,0x73,0xb4,0x01,0x14,0xe5,0x74,0x60,0x10,0x90,
+0x9e,0x61,0xe0,0x64,0x02,0x60,0x05,0x12,0x44,0xdc,0x80,0x03,0x12,0x44,0x80,0xe5,
+0x2e,0x30,0xe6,0x1e,0x90,0x01,0x36,0x74,0x40,0xf0,0xe5,0x73,0xb4,0x01,0x13,0xe5,
+0x74,0x60,0x0f,0x90,0x9e,0x63,0xe0,0x54,0xfe,0xf0,0xe0,0x54,0x07,0x70,0x03,0x12,
+0x44,0xd3,0xe5,0x2f,0x30,0xe1,0x08,0x90,0x01,0x37,0x74,0x02,0xf0,0x11,0xe0,0x74,
+0x13,0x04,0x90,0x01,0xc4,0xf0,0x74,0x49,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,
+0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,
+0xd0,0xf0,0xd0,0xe0,0x32,0x12,0x44,0xf1,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,
+0x74,0x01,0xf0,0x80,0x32,0x90,0x9e,0x5d,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,
+0xf0,0x80,0x24,0x90,0x9e,0x5c,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,
+0x16,0x90,0x9e,0x60,0xe0,0x54,0x0f,0xd3,0x94,0x04,0x40,0x08,0x90,0x01,0xb9,0x74,
+0x08,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74,0x08,0xf0,0x7f,0x00,0x22,
+0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x7f,
+0x10,0xdf,0xfe,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,
+0x9e,0xad,0xed,0xf0,0x90,0x9e,0xac,0xef,0xf0,0xd3,0x94,0x07,0x50,0x63,0xe0,0xff,
+0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,
+0xe0,0x5f,0xf0,0xb1,0x28,0x90,0x9e,0xac,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,
+0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x46,0xe0,0x4f,0xf0,0xb1,0x28,0x90,0x9e,
+0xad,0xe0,0x60,0x16,0x90,0x9e,0xac,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,
+0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x45,0x80,0x66,0x90,0x9e,0xac,0xe0,0xff,0x74,
+0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x45,0x80,
+0x6b,0x90,0x9e,0xac,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,
+0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xb1,0x20,0x90,0x9e,0xac,0xe0,0xff,0x74,
+0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x43,0xe0,0x4f,
+0xf0,0xb1,0x28,0x90,0x9e,0xad,0xe0,0x60,0x1b,0x90,0x9e,0xac,0xe0,0xff,0x74,0x01,
+0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,0x42,
+0xe0,0x4f,0x80,0x1a,0x90,0x9e,0xac,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,
+0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x42,0xe0,0x5f,0xf0,0xb1,
+0x28,0xd0,0xd0,0x92,0xaf,0x22,0xf0,0x90,0x00,0x45,0xe0,0x54,0xfe,0xfd,0x7f,0x45,
+0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x8f,0x82,0x75,0x83,0x00,0xed,0xf0,0xb1,0x28,
+0xd0,0xd0,0x92,0xaf,0x22,0xef,0x14,0x60,0x30,0x14,0x60,0x66,0x24,0x02,0x60,0x02,
+0xc1,0xec,0x90,0x9e,0x1a,0x74,0x02,0xf0,0x90,0x00,0x48,0xe0,0x44,0x0c,0xfd,0x7f,
+0x48,0xd1,0x30,0x90,0x00,0x47,0xe0,0x44,0x08,0xfd,0x7f,0x47,0xd1,0x30,0x90,0x00,
+0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45,0x80,0x71,0xe4,0x90,0x9e,0x1a,0xf0,0x90,0x9e,
+0x16,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,
+0xd9,0x90,0x00,0x45,0xe0,0x44,0xef,0xfd,0x7f,0x45,0xd1,0x30,0x90,0x00,0x45,0xe0,
+0x54,0xef,0xfd,0x7f,0x45,0xd1,0x30,0x90,0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f,0x46,
+0x80,0x38,0x90,0x9e,0x1a,0x74,0x01,0xf0,0x90,0x9e,0x20,0x12,0x43,0x53,0x90,0x80,
+0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x00,0x45,0xe0,0x44,
+0x20,0xfd,0x7f,0x45,0xd1,0x30,0x90,0x00,0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45,0xd1,
+0x30,0x90,0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f,0x46,0xd1,0x30,0x22,0x90,0x01,0x30,
+0xe4,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x01,0x38,0xf0,0xa3,0xf0,0xa3,0xf0,
+0xa3,0xf0,0xfd,0x7f,0x50,0xd1,0x30,0xe4,0xfd,0x7f,0x51,0xd1,0x30,0xe4,0xfd,0x7f,
+0x52,0xd1,0x30,0xe4,0xfd,0x7f,0x53,0xc1,0x30,0x8b,0x59,0x8a,0x5a,0x89,0x5b,0x90,
+0x00,0x02,0x12,0x42,0x20,0x90,0x9e,0x1d,0xf0,0xe0,0x30,0xe0,0x4b,0x90,0x9e,0x14,
+0x74,0x01,0xf0,0x7f,0x80,0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0x16,0x12,0x2a,0x7f,
+0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xe4,0xfc,0xfd,
+0xfe,0x78,0x1a,0x12,0x2a,0x6c,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,0x07,0x90,0x9e,
+0x16,0x12,0x43,0x53,0xec,0x54,0x03,0xfc,0x12,0x43,0x46,0x90,0x9e,0x20,0x12,0x2a,
+0x7f,0x90,0x05,0x22,0xe4,0xf0,0x80,0x2d,0xe4,0x90,0x9e,0x14,0xf0,0x7f,0x80,0x7e,
+0x08,0x12,0x27,0xde,0xec,0x54,0x03,0xfc,0xec,0x44,0xc0,0xfc,0x90,0x9e,0x16,0x12,
+0x2a,0x7f,0x90,0x9e,0x16,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,
+0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9e,0x1d,0xe0,0x30,0xe1,0x19,0x7d,0x0c,0x7f,0x47,
+0xd1,0x30,0x90,0x00,0x48,0xe0,0x44,0x0c,0xfd,0x7f,0x48,0xd1,0x30,0x90,0x00,0x46,
+0xe0,0x44,0x10,0x80,0x1c,0x90,0x00,0x47,0xe0,0x54,0xf3,0xfd,0x7f,0x47,0xd1,0x30,
+0x90,0x00,0x48,0xe0,0x54,0xf3,0xfd,0x7f,0x48,0xd1,0x30,0x90,0x00,0x46,0xe0,0x54,
+0xef,0xfd,0x7f,0x46,0xd1,0x30,0xe4,0x90,0x9e,0x1a,0xf0,0x22,0xe4,0x90,0x9e,0x74,
+0xf0,0x90,0x00,0x80,0xe0,0x44,0x80,0xfd,0x7f,0x80,0xc1,0x30,0x12,0x45,0xb1,0xbf,
+0x01,0x10,0x90,0x02,0x09,0xe0,0xff,0x7d,0x01,0x12,0x47,0xfe,0x90,0x04,0x1f,0x74,
+0x20,0xf0,0x22,0x75,0x28,0x33,0xe4,0xf5,0x29,0x75,0x2a,0x03,0xf5,0x2b,0x90,0x01,
+0x30,0xe5,0x28,0xf0,0xa3,0xe5,0x29,0xf0,0xa3,0xe5,0x2a,0xf0,0xa3,0xe5,0x2b,0xf0,
+0x22,0xe4,0x90,0x9e,0x31,0xf0,0xa3,0xf0,0x75,0x8e,0x02,0x12,0x4f,0xec,0x12,0x5f,
+0x29,0x12,0x5f,0x3c,0xe4,0xf5,0x12,0x12,0x6d,0x11,0x12,0x77,0x25,0x12,0x60,0x1b,
+0x12,0x32,0x3d,0x12,0x76,0x16,0x11,0x13,0x90,0x00,0xf3,0xe0,0x30,0xe2,0x0d,0x90,
+0x05,0x41,0x74,0x10,0xf0,0x90,0x05,0x5a,0xf0,0xa3,0xe4,0xf0,0x12,0x5f,0x74,0x12,
+0x5e,0x77,0x12,0x45,0x00,0x12,0x7c,0xe5,0x90,0x9e,0x33,0xe5,0xd9,0xf0,0x12,0x5e,
+0xfa,0xc2,0xaf,0x90,0x00,0x80,0xe0,0x44,0x40,0xf0,0x12,0x4d,0x28,0x75,0xe8,0x03,
+0x43,0xa8,0x85,0xd2,0xaf,0x90,0x01,0xbe,0xe0,0x04,0xf0,0x90,0x01,0xc0,0xe0,0x04,
+0xf0,0x90,0x9e,0x31,0xe0,0x64,0x01,0xf0,0x24,0x31,0x90,0x01,0xc4,0xf0,0x74,0x50,
+0xa3,0xf0,0xe5,0x12,0x30,0xe4,0x09,0xc2,0xaf,0x53,0x12,0xef,0xd2,0xaf,0x71,0x1f,
+0xe5,0x12,0x30,0xe6,0x16,0xc2,0xaf,0x53,0x12,0xbf,0xd2,0xaf,0x12,0x66,0xbc,0x90,
+0x9e,0x1e,0xe0,0xff,0x60,0x03,0xb4,0x01,0x02,0x31,0x15,0x90,0x9e,0x1e,0xe0,0x70,
+0x03,0x12,0x7d,0x43,0x11,0xe8,0x80,0xb9,0x90,0x06,0x34,0xe0,0x60,0x26,0x14,0x70,
+0x1b,0x7b,0x01,0x7a,0x06,0x79,0x35,0x7f,0xf9,0x7e,0x01,0x12,0x75,0xb4,0xbf,0x01,
+0x09,0x90,0x06,0x35,0xe0,0x54,0x0f,0xf0,0x80,0x05,0x80,0x00,0x02,0x75,0xa5,0xe4,
+0x90,0x06,0x34,0xf0,0x22,0x90,0x9e,0x15,0xe0,0xc3,0x94,0x14,0x50,0x05,0xe0,0x04,
+0xf0,0x21,0xcd,0x90,0x9e,0x15,0xe0,0x64,0x14,0x60,0x02,0x21,0xcd,0x90,0x9e,0x24,
+0xe0,0x70,0x25,0x90,0x9e,0x27,0xe0,0x70,0x1f,0x90,0x9e,0x25,0xe0,0x70,0x19,0x90,
+0x9e,0x28,0xe0,0x70,0x13,0x90,0x9e,0x26,0xe0,0x70,0x0d,0x90,0x9e,0x29,0xe0,0x70,
+0x07,0x90,0x04,0xfd,0xe0,0x54,0xfe,0xf0,0x90,0x9e,0x24,0xe0,0x90,0x04,0x44,0xf0,
+0x90,0x9e,0x25,0xe0,0x90,0x04,0x45,0xf0,0x90,0x9e,0x26,0xe0,0x90,0x04,0x46,0xf0,
+0xa3,0xe4,0xf0,0x90,0x9e,0x27,0xe0,0x90,0x04,0x48,0xf0,0x90,0x9e,0x28,0xe0,0x90,
+0x04,0x49,0xf0,0x90,0x9e,0x29,0xe0,0x90,0x04,0x4a,0xf0,0xa3,0xe4,0xf0,0x90,0x9e,
+0x10,0xe0,0x90,0x04,0x4c,0xf0,0x90,0x9e,0x11,0xe0,0x90,0x04,0x4d,0xf0,0x90,0x9e,
+0x12,0xe0,0x90,0x04,0x4e,0xf0,0x90,0x9e,0x13,0xe0,0x90,0x04,0x4f,0xf0,0xe4,0x90,
+0x9e,0x15,0xf0,0x90,0x9e,0x10,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,
+0x9e,0x24,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x05,0x60,
+0xe0,0x90,0x9e,0x34,0xf0,0x90,0x05,0x61,0xe0,0x90,0x9e,0x35,0xf0,0x90,0x05,0x62,
+0xe0,0x90,0x9e,0x36,0xf0,0x90,0x05,0x63,0xe0,0x90,0x9e,0x37,0xf0,0x90,0x9e,0x2d,
+0xe0,0xff,0x90,0x9e,0x37,0xe0,0xfe,0xd3,0x9f,0x50,0x0b,0x90,0x9e,0x2d,0xe0,0xc3,
+0x9e,0xd3,0x94,0x01,0x40,0x10,0x90,0x9e,0x1b,0xe0,0xb4,0x01,0x02,0x80,0x03,0x90,
+0x9e,0x1f,0xe0,0xff,0x51,0x17,0x22,0x90,0x05,0x60,0xe0,0x90,0x9e,0x2a,0xf0,0x90,
+0x05,0x61,0xe0,0x90,0x9e,0x2b,0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x2c,0xf0,0x90,
+0x05,0x63,0xe0,0x90,0x9e,0x2d,0xf0,0xc3,0x74,0xff,0x9f,0xfe,0x90,0x9e,0x2b,0xe0,
+0xd3,0x9e,0x40,0x1e,0xe0,0x2f,0xf0,0xa3,0xe0,0xb4,0xff,0x0f,0xe4,0xf0,0xa3,0xe0,
+0xb4,0xff,0x03,0xe4,0xf0,0x22,0x90,0x9e,0x2d,0x80,0x03,0x90,0x9e,0x2c,0xe0,0x04,
+0xf0,0x22,0x90,0x9e,0x2b,0xe0,0x2f,0xf0,0x22,0x90,0x9e,0x1c,0xe0,0x64,0x01,0x60,
+0x02,0x61,0x1e,0x90,0x00,0x46,0xe0,0x44,0x01,0xfd,0x7f,0x46,0x12,0x4e,0x30,0x90,
+0x9e,0x2e,0xe0,0x70,0x32,0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x20,0x12,0x43,
+0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x80,0x06,
+0x90,0x05,0x22,0x74,0x7f,0xf0,0x90,0x9e,0x1b,0xe0,0xff,0x51,0x17,0x90,0x9e,0x2e,
+0x74,0x01,0x12,0x4e,0x26,0x80,0x40,0x90,0x9e,0x2e,0xe0,0x64,0x01,0x70,0x38,0x90,
+0x9e,0x1f,0xe0,0xff,0x51,0x17,0xe4,0x90,0x9e,0x2e,0xf0,0x90,0x00,0x45,0xe0,0x44,
+0x01,0xfd,0x7f,0x45,0x12,0x4e,0x30,0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x16,
+0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,
+0x80,0x05,0x90,0x05,0x22,0xe4,0xf0,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x9e,
+0x2a,0xe0,0x90,0x05,0x84,0xf0,0x90,0x9e,0x2b,0xe0,0x90,0x05,0x85,0xf0,0x90,0x9e,
+0x2c,0xe0,0x90,0x05,0x86,0xf0,0x90,0x9e,0x2d,0xe0,0x90,0x05,0x87,0xf0,0x22,0x90,
+0x01,0xcc,0xe0,0x54,0x0f,0x90,0x9e,0x34,0xf0,0x90,0x9e,0x34,0xe0,0xfd,0x70,0x02,
+0x81,0x60,0x90,0x9e,0xae,0xe0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,
+0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xef,0x5d,0x70,0x02,0x81,0x59,0x90,0x9e,
+0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd0,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x35,0xf0,
+0x75,0x1e,0x01,0x75,0x1f,0x9e,0x75,0x20,0x35,0x75,0x21,0x01,0x7b,0x01,0x7a,0x9e,
+0x79,0x36,0x12,0x45,0x09,0x90,0x9e,0x36,0xe0,0xff,0xc4,0x13,0x13,0x13,0x54,0x01,
+0x90,0x9e,0xae,0x30,0xe0,0x59,0xe0,0x75,0xf0,0x02,0x90,0x00,0x88,0x12,0x43,0x5f,
+0xe0,0x90,0x9e,0x37,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x02,0x90,0x00,0x89,0x12,
+0x43,0x5f,0xe0,0x90,0x9e,0x38,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,
+0xd1,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x39,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x04,
+0x90,0x01,0xd2,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x3a,0xf0,0x90,0x9e,0xae,0xe0,0x75,
+0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x3b,0xf0,0x80,0x33,0xe0,
+0x75,0xf0,0x04,0x90,0x01,0xd1,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x37,0xf0,0x90,0x9e,
+0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd2,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x38,0xf0,
+0x90,0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x5f,0xe0,0x90,0x9e,
+0x39,0xf0,0xef,0x54,0x7f,0xff,0x7b,0x01,0x7a,0x9e,0x79,0x37,0x91,0x61,0x90,0x9e,
+0x34,0xe0,0xff,0x90,0x9e,0xae,0xe0,0xfe,0x74,0x01,0xa8,0x06,0x08,0x80,0x02,0xc3,
+0x33,0xd8,0xfc,0xf4,0x5f,0x90,0x9e,0x34,0xf0,0x90,0x9e,0xae,0xe0,0xff,0x74,0x01,
+0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0x90,0x01,0xcc,0xf0,0x90,0x9e,0xae,
+0xe0,0x04,0xf0,0xe0,0x54,0x03,0xf0,0x61,0x29,0x90,0x01,0xc6,0xe0,0x44,0x02,0xf0,
+0x22,0x90,0x9e,0x3c,0x12,0x43,0x8b,0xef,0x12,0x43,0x94,0x54,0x9c,0x01,0x54,0xa5,
+0x02,0x54,0xc0,0x03,0x54,0xc9,0x05,0x54,0xd2,0x06,0x55,0x20,0x07,0x54,0xda,0x09,
+0x54,0xe3,0x0c,0x54,0xec,0x0d,0x54,0xf5,0x0e,0x54,0xfe,0x1b,0x55,0x07,0x1c,0x55,
+0x10,0x2c,0x54,0xae,0x2d,0x54,0xb7,0x2e,0x00,0x00,0x55,0x19,0x90,0x9e,0x3c,0x12,
+0x43,0x6b,0x02,0x61,0x1d,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x6f,0x33,0x90,0x9e,
+0x3c,0x12,0x43,0x6b,0x02,0x6f,0x39,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x6f,0x81,
+0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x6f,0xaf,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,
+0x6e,0xe3,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x80,0x47,0x90,0x9e,0x3c,0x12,0x43,0x6b,
+0x02,0x6f,0xf7,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x7e,0x1b,0x90,0x9e,0x3c,0x12,
+0x43,0x6b,0x02,0x7c,0xb2,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x4f,0x19,0x90,0x9e,
+0x3c,0x12,0x43,0x6b,0x02,0x6f,0x2b,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x6f,0x12,
+0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x74,0x85,0x90,0x01,0xc6,0xe0,0x44,0x01,0xf0,
+0x22,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x1f,0xfe,0xef,0x54,0x20,0xc4,0x13,
+0x54,0x07,0xfd,0xaf,0x06,0x90,0x9e,0x3f,0xef,0xf0,0xa3,0xed,0xf0,0xa3,0x12,0x43,
+0x8b,0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54,0xf0,0xc4,
+0x54,0x0f,0x90,0x9e,0x44,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0x54,0x40,0xc4,0x13,
+0x13,0x54,0x03,0x90,0x9e,0x45,0xf0,0x90,0x9e,0x3f,0xe0,0xff,0x75,0xf0,0x09,0x90,
+0x96,0x46,0x12,0x43,0x5f,0xad,0x82,0xac,0x83,0x90,0x9e,0x46,0xec,0xf0,0xa3,0xed,
+0xf0,0xef,0x75,0xf0,0x09,0xa4,0x24,0x44,0xf9,0x74,0x96,0x35,0xf0,0xfa,0x7b,0x01,
+0xa3,0x12,0x43,0x8b,0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,
+0x54,0x0f,0xff,0x90,0x9e,0x48,0x12,0x43,0x6b,0xef,0x12,0x42,0x4d,0x90,0x9e,0x41,
+0x12,0x43,0x6b,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x90,0x9e,0x48,0x12,0x43,0x6b,
+0x90,0x00,0x01,0xef,0x12,0x42,0x5f,0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x01,
+0x12,0x42,0x20,0xff,0x90,0x9e,0x46,0xe0,0xfc,0xa3,0xe0,0xfd,0xf5,0x82,0x8c,0x83,
+0xef,0xf0,0x12,0x29,0xd9,0x8d,0x82,0x8c,0x83,0xa3,0xf0,0x90,0x9e,0x44,0xe0,0xfe,
+0x90,0x9e,0x3f,0xe0,0xff,0x24,0x82,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,
+0x90,0x9e,0x40,0xe0,0xfe,0x75,0xf0,0x09,0xef,0x90,0x96,0x4a,0x12,0x43,0x5f,0xee,
+0xf0,0x75,0xf0,0x09,0xef,0x90,0x96,0x4b,0x12,0x43,0x5f,0x74,0x01,0xf0,0x90,0x9e,
+0x45,0xe0,0xfe,0x75,0xf0,0x09,0xef,0x90,0x96,0x4c,0x12,0x43,0x5f,0xee,0xf0,0x8f,
+0x59,0xef,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xaf,0x82,0xf5,0x5b,0x8f,
+0x5c,0xe5,0x59,0x75,0xf0,0x02,0xa4,0x24,0x02,0xf9,0x74,0x95,0x35,0xf0,0x75,0x5d,
+0x01,0xf5,0x5e,0x89,0x5f,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x46,0x12,0x43,0x5f,
+0xaf,0x82,0x85,0x83,0x60,0x8f,0x61,0xe5,0x59,0x75,0xf0,0x09,0xa4,0x24,0x44,0xf9,
+0x74,0x96,0x35,0xf0,0x75,0x62,0x01,0xf5,0x63,0x89,0x64,0x74,0x82,0x25,0x59,0xf5,
+0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0x12,0x43,0x94,0x56,0xaf,0x00,0x56,0xc4,0x01,
+0x56,0xd9,0x02,0x56,0xee,0x03,0x57,0x18,0x04,0x57,0x2d,0x05,0x57,0x42,0x06,0x57,
+0x69,0x0c,0x57,0x97,0x0d,0x57,0xc4,0x0e,0x57,0xf1,0x0f,0x00,0x00,0x58,0x25,0xe5,
+0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,
+0x74,0x15,0x80,0x3c,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,
+0x83,0x74,0xf0,0xf0,0xa3,0x74,0x10,0x80,0x27,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,
+0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74,0x05,0x80,0x12,0xe5,0x59,
+0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0xe4,
+0xf0,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0f,
+0xf0,0xa3,0x74,0x8f,0xf0,0x02,0x58,0x25,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,
+0xe4,0x34,0x9b,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf5,0x80,0x27,0xe5,0x59,0x25,
+0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf0,
+0x80,0x12,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe4,
+0xf0,0xa3,0x74,0x0d,0xf0,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,
+0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x02,0x58,0x25,0x90,0x04,0x47,0xe0,0xab,0x5d,0xaa,
+0x5e,0xa9,0x5f,0x12,0x42,0x4d,0x90,0x04,0x46,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,
+0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x45,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,
+0xf0,0x90,0x04,0x44,0x02,0x58,0x1c,0x90,0x04,0x4b,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,
+0x5f,0x12,0x42,0x4d,0x90,0x04,0x4a,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,
+0x01,0x12,0x42,0x5f,0x90,0x04,0x49,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,
+0x04,0x48,0x80,0x58,0x90,0x04,0x4f,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,
+0x4d,0x90,0x04,0x4e,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,
+0x5f,0x90,0x04,0x4d,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x4c,0x80,
+0x2b,0x90,0x04,0x53,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,0x4d,0x90,0x04,
+0x52,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,
+0x51,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x50,0xe0,0x85,0x5c,0x82,
+0x85,0x5b,0x83,0xa3,0xf0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0xc0,0x03,0xc0,0x02,0xc0,
+0x01,0x12,0x29,0xd9,0xff,0xab,0x62,0xaa,0x63,0xa9,0x64,0x12,0x29,0xd9,0x5f,0xd0,
+0x01,0xd0,0x02,0xd0,0x03,0x12,0x42,0x4d,0xab,0x5d,0xe5,0x5f,0x24,0x01,0xf9,0xe4,
+0x35,0x5e,0xfa,0xc0,0x03,0xc0,0x02,0xc0,0x01,0x12,0x29,0xd9,0xff,0xab,0x62,0xaa,
+0x63,0xa9,0x64,0x90,0x00,0x01,0x12,0x42,0x20,0x5f,0xd0,0x01,0xd0,0x02,0xd0,0x03,
+0x12,0x42,0x4d,0x85,0x5c,0x82,0x85,0x5b,0x83,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,
+0x61,0x82,0x85,0x60,0x83,0xe0,0xfe,0xef,0x5e,0xd0,0x82,0xd0,0x83,0xf0,0x85,0x5c,
+0x82,0x85,0x5b,0x83,0xa3,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x61,0x82,0x85,0x60,
+0x83,0xa3,0xe0,0xfe,0xef,0x5e,0xd0,0x82,0xd0,0x83,0xf0,0xe5,0x59,0x25,0xe0,0x24,
+0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b,0x75,
+0x5a,0x0b,0x74,0x01,0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,
+0xd8,0xf9,0xff,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,
+0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x06,0xe5,0x5a,0x24,0x10,0x80,0x5d,0x15,
+0x5a,0xe5,0x5a,0xc3,0x94,0x00,0x50,0xca,0x80,0x56,0xe5,0x59,0x25,0xe0,0x24,0xc6,
+0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3d,0x75,0x5a,
+0x0f,0x74,0x01,0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,
+0xf9,0xff,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,
+0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x08,0x90,0x9e,0x4b,0xe5,0x5a,0xf0,0x80,0x10,
+0x15,0x5a,0xe5,0x5a,0xc3,0x94,0x00,0x50,0xc8,0x80,0x05,0xe4,0x90,0x9e,0x4b,0xf0,
+0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfe,0xa3,
+0xe0,0x4e,0x60,0x3b,0xe4,0xf5,0x5a,0x74,0x01,0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,
+0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,
+0xe4,0x34,0x9b,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x08,0x90,0x9e,
+0x4c,0xe5,0x5a,0xf0,0x80,0x5b,0x05,0x5a,0xe5,0x5a,0xb4,0x10,0xca,0x80,0x52,0xe5,
+0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,
+0x4e,0x60,0x39,0xe4,0xf5,0x5a,0x74,0x01,0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,
+0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,
+0x34,0x95,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x06,0xe5,0x5a,0x24,
+0x10,0x80,0x0a,0x05,0x5a,0xe5,0x5a,0xb4,0x0c,0xcc,0x80,0x05,0xe4,0x90,0x9e,0x4c,
+0xf0,0x90,0x9e,0x4b,0xe0,0xff,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x48,0x12,0x43,
+0x5f,0xef,0xf0,0x90,0x9e,0x4c,0xe0,0xfe,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x49,
+0x12,0x43,0x5f,0xee,0xf0,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,
+0xe0,0xd3,0x9f,0x40,0x05,0x90,0x9e,0x4b,0x51,0x74,0x74,0x84,0x25,0x59,0xf5,0x82,
+0xe4,0x34,0x04,0xf5,0x83,0xe0,0xff,0x90,0x9e,0x4c,0xe0,0xfe,0xef,0xc3,0x9e,0x50,
+0x02,0x51,0x74,0x90,0x9e,0x4b,0xe0,0xff,0xd3,0x94,0x13,0x40,0x07,0x90,0x96,0x43,
+0x74,0x03,0xf0,0x22,0xef,0xd3,0x94,0x0b,0x40,0x07,0x90,0x96,0x43,0x74,0x02,0xf0,
+0x22,0xef,0xd3,0x94,0x03,0x40,0x07,0x90,0x96,0x43,0x74,0x01,0xf0,0x22,0xe4,0x90,
+0x96,0x43,0xf0,0x22,0xe0,0xfd,0x74,0x26,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9d,0xf5,
+0x83,0xed,0xf0,0xaf,0x59,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xef,0xc3,0x94,0x20,
+0x50,0x0e,0x74,0x84,0x2f,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xed,0xf0,0x80,0x29,
+0x74,0xa6,0x2f,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xed,0xf0,0x90,0x9e,0x78,0xef,
+0xf0,0x24,0xa6,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x90,0x9e,0x79,0xf0,0x7b,
+0x01,0x7a,0x9e,0x79,0x78,0x7d,0x02,0x51,0xce,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,
+0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x97,0x12,0x43,0x8b,0x90,0x9e,0x9a,0xe0,0x54,
+0xf0,0x44,0x06,0xff,0xf0,0xed,0x54,0x0f,0xc4,0x54,0xf0,0xfe,0xef,0x54,0x0f,0x4e,
+0xf0,0x90,0x9e,0x97,0x12,0x43,0x6b,0x90,0x9e,0x94,0x12,0x43,0x8b,0x7b,0x01,0x7a,
+0x9e,0x79,0x9a,0x71,0xd9,0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x50,0x8d,0x51,0xe5,0x51,
+0x54,0x1f,0xf5,0x56,0x74,0x01,0x2f,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xf5,
+0x54,0x90,0x04,0xfd,0xe0,0xb4,0x01,0x05,0x75,0x57,0x03,0x80,0x03,0x75,0x57,0x01,
+0xeb,0xc3,0x95,0x57,0x40,0x04,0xaf,0x50,0x80,0x33,0xe5,0x54,0x25,0x53,0xf5,0x55,
+0xe5,0x56,0x90,0x41,0xd6,0x93,0xff,0xe5,0x55,0xd3,0x9f,0x74,0x01,0x40,0x11,0x25,
+0x50,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xad,0x51,0xaf,0x50,0x41,0x85,
+0x25,0x50,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe5,0x55,0xf0,0x22,0xad,0x07,0x75,
+0xf0,0x09,0xed,0x90,0x96,0x48,0x12,0x43,0x5f,0xe0,0xff,0x74,0x67,0x2d,0xf5,0x82,
+0xe4,0x34,0x9d,0xf5,0x83,0xe0,0x54,0x1f,0xf5,0x58,0xd3,0x9f,0x40,0x02,0x8f,0x58,
+0xe5,0x58,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,
+0x74,0x01,0x93,0xff,0xe5,0x58,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,
+0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,
+0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,
+0xaf,0x05,0xad,0x58,0x51,0x85,0xaf,0x58,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,
+0x90,0x9e,0x91,0x12,0x43,0x8b,0x90,0x9e,0x75,0xe0,0x64,0x02,0x60,0x6e,0x90,0x9e,
+0x75,0xe0,0x64,0x01,0x70,0x66,0x90,0x9e,0xb0,0xe0,0xff,0x04,0xf0,0x90,0x9e,0x91,
+0x12,0x43,0x6b,0x90,0x00,0x01,0xef,0x12,0x42,0x5f,0x7f,0xaf,0x7e,0x01,0x91,0x82,
+0xef,0x60,0x49,0x90,0x9e,0x91,0x12,0x43,0x6b,0x8b,0x1e,0x8a,0x1f,0x89,0x20,0x75,
+0x21,0x02,0x7b,0x01,0x7a,0x01,0x79,0xa0,0x12,0x45,0x09,0x90,0x9e,0x94,0x12,0x43,
+0x6b,0x8b,0x1e,0x8a,0x1f,0x89,0x20,0x90,0x9e,0x91,0x12,0x43,0x6b,0x12,0x29,0xd9,
+0xff,0xc4,0x54,0x0f,0xf5,0x21,0x7b,0x01,0x7a,0x01,0x79,0xa2,0x12,0x45,0x09,0x90,
+0x01,0xaf,0x74,0xff,0xf0,0x90,0x01,0xcb,0xe0,0x64,0x80,0xf0,0xd0,0xd0,0x92,0xaf,
+0x22,0x90,0x9e,0x2f,0xe0,0x54,0xf0,0x44,0x03,0xf0,0x54,0x0f,0x44,0x80,0xf0,0x7b,
+0x00,0x7a,0x00,0x79,0x13,0x90,0x9e,0x94,0x12,0x43,0x8b,0x0b,0x7a,0x9e,0x79,0x2f,
+0x61,0xd9,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0xa0,0xee,0xf0,0xa3,0xef,
+0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0x90,0x9e,0xa0,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,
+0x83,0xe0,0x60,0x2d,0xc3,0x90,0x9e,0xa3,0xe0,0x94,0xe8,0x90,0x9e,0xa2,0xe0,0x94,
+0x03,0x40,0x0b,0x90,0x01,0xc6,0xe0,0x44,0x10,0xf0,0x7f,0x00,0x80,0x15,0x90,0x9e,
+0xa2,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x7f,0x0a,0x7e,0x00,0x12,0x37,0x54,0x80,
+0xc5,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0xac,0x07,0xec,0xc3,0x94,0x20,0x50,0x0d,
+0x74,0x84,0x2c,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x80,0x0b,0x74,0xa6,0x2c,
+0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x54,0x7f,0xf5,0x64,0xe5,0x64,0x54,0x1f,
+0xff,0x90,0x9e,0x40,0xf0,0x75,0xf0,0x09,0xec,0x90,0x96,0x49,0x12,0x43,0x5f,0xe0,
+0x90,0x9e,0x42,0xf0,0x75,0xf0,0x09,0xec,0x90,0x96,0x48,0x12,0x43,0x5f,0xe0,0xfe,
+0x90,0x9e,0x43,0xf0,0xec,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,
+0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x44,0xcb,0xf0,0xa3,0xeb,0xf0,0xec,0x25,0xe0,0x24,
+0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x46,0xcb,
+0xf0,0xa3,0xeb,0xf0,0xef,0xd3,0x9e,0x40,0x0a,0x90,0x9e,0x43,0xe0,0x90,0x9e,0x40,
+0xf0,0xf5,0x64,0xed,0x70,0x02,0xc1,0x2e,0x90,0x9e,0x41,0xed,0xf0,0xe5,0x64,0x30,
+0xe6,0x0a,0x90,0x9e,0x40,0xe0,0xf5,0x64,0xa3,0xe0,0x14,0xf0,0x90,0x9e,0x41,0xe0,
+0x70,0x02,0xc1,0x2e,0x90,0x9e,0x40,0xe0,0xff,0xd3,0x94,0x00,0x50,0x02,0xc1,0x2e,
+0xe4,0x90,0x9e,0x3f,0xf0,0xef,0x14,0x90,0x9e,0x3e,0xf0,0x90,0x9e,0x42,0xe0,0xfd,
+0x90,0x9e,0x3e,0xe0,0xff,0xd3,0x9d,0x40,0x6b,0xef,0x94,0x10,0x40,0x21,0xef,0x24,
+0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,
+0xd8,0xf9,0xff,0x90,0x9e,0x46,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x70,0x27,0x90,
+0x9e,0x3e,0xe0,0xff,0xc3,0x94,0x10,0x50,0x33,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,
+0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,0x44,0xe0,0x5e,0xfe,
+0xa3,0xe0,0x5f,0x4e,0x60,0x16,0x90,0x9e,0x3e,0xe0,0xf5,0x64,0xa3,0xe0,0x04,0xf0,
+0x90,0x9e,0x41,0xe0,0xff,0x90,0x9e,0x3f,0xe0,0x6f,0x60,0x08,0x90,0x9e,0x3e,0xe0,
+0x14,0xf0,0x80,0x87,0x90,0x9e,0x41,0xe0,0xff,0x90,0x9e,0x3f,0xe0,0xc3,0x9f,0x50,
+0x0d,0x90,0x9e,0x3e,0xe0,0xb5,0x05,0x06,0x90,0x9e,0x42,0xe0,0xf5,0x64,0xe5,0x64,
+0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,
+0x93,0xff,0xe5,0x64,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,
+0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xec,0x25,0xe0,
+0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xaf,0x04,
+0xad,0x64,0x51,0x85,0xaf,0x64,0x22,0x75,0x30,0x1f,0x75,0x31,0x01,0xe4,0xf5,0x32,
+0x90,0x01,0x38,0xe5,0x30,0xf0,0xa3,0xe5,0x31,0xf0,0xa3,0xe5,0x32,0xf0,0x22,0x12,
+0x44,0xf1,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x52,0x90,
+0x9e,0x63,0xe0,0x54,0x03,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x42,0x90,
+0x9e,0x60,0xe0,0x54,0x0f,0xd3,0x94,0x02,0x40,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,
+0x80,0x2f,0x90,0x9e,0x63,0xe0,0x30,0xe2,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,
+0x20,0x90,0x9e,0x63,0xe0,0x30,0xe4,0x08,0x90,0x01,0xb9,0x74,0x10,0xf0,0x80,0x11,
+0x90,0x9e,0x52,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x20,0xf0,0x80,0x03,0x7f,0x01,
+0x22,0x90,0x01,0xb8,0x74,0x04,0xf0,0x7f,0x00,0x22,0x90,0x01,0x3c,0x74,0xff,0xf0,
+0xa3,0xf0,0xa3,0xf0,0x90,0x01,0x34,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,
+0x54,0x12,0x4e,0x30,0x7d,0xff,0x7f,0x55,0x12,0x4e,0x30,0x7d,0xff,0x7f,0x56,0x12,
+0x4e,0x30,0x7d,0xff,0x7f,0x57,0x02,0x4e,0x30,0x90,0x00,0x02,0xe0,0x54,0xe0,0x90,
+0x9e,0x75,0x60,0x04,0x74,0x01,0xf0,0x22,0x74,0x02,0xf0,0x22,0x90,0x00,0xf3,0xe0,
+0x30,0xe3,0x08,0x90,0x9e,0x77,0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x9e,0x77,0xf0,
+0x90,0x9e,0x77,0xe0,0xb4,0x01,0x12,0x90,0x00,0xf2,0xe0,0x30,0xe7,0x0b,0x90,0x9e,
+0x64,0x74,0xfd,0xf0,0xa3,0x74,0x33,0xf0,0x22,0x90,0x9e,0x64,0x74,0xfd,0xf0,0xa3,
+0x74,0x2f,0xf0,0x22,0x90,0x01,0x64,0x74,0xa0,0xf0,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,
+0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,
+0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74,0x7b,0xf0,0x74,0x5f,
+0xa3,0xf0,0x53,0x91,0xef,0x90,0x00,0x51,0xe0,0xff,0x90,0x00,0x55,0xe0,0x5f,0xf5,
+0x3d,0xe5,0x3d,0x30,0xe6,0x18,0x74,0x40,0xf0,0x90,0x9e,0x1d,0xe0,0x54,0x03,0xff,
+0xbf,0x03,0x0b,0x90,0x9e,0x1a,0xe0,0x60,0x05,0x7f,0x01,0x12,0x4e,0x45,0xe5,0x3d,
+0x30,0xe7,0x15,0x90,0x00,0x55,0x74,0x80,0xf0,0x90,0x9e,0x1d,0xe0,0x54,0x03,0xff,
+0xbf,0x03,0x05,0x7f,0x02,0x12,0x4e,0x45,0x90,0x01,0xc4,0x74,0x7b,0xf0,0x74,0x5f,
+0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,
+0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x8f,0x6b,0x8c,
+0x6c,0x8d,0x6d,0x22,0x8f,0x6e,0x8c,0x6f,0x8d,0x70,0x22,0xe4,0xf5,0x73,0x90,0x9e,
+0x63,0xf0,0xf5,0x74,0x90,0x9e,0x60,0x74,0x0c,0xf0,0x90,0x9e,0x5e,0xf0,0xe4,0x90,
+0x9e,0x61,0xf0,0x90,0x9e,0x5d,0xf0,0x90,0x9e,0x5c,0xf0,0x90,0x9e,0x5f,0x04,0xf0,
+0x90,0x9e,0x50,0xf0,0xe4,0x90,0x9e,0x62,0xf0,0x90,0x9e,0x52,0xf0,0x90,0x9e,0x5a,
+0x74,0x07,0xf0,0xe4,0x90,0x9e,0x51,0xf0,0x90,0x9e,0x58,0xf0,0xa3,0x74,0x02,0xf0,
+0x90,0x9e,0x56,0x14,0xf0,0xa3,0x74,0x03,0xf0,0x90,0x9e,0x55,0x74,0x14,0xf0,0x90,
+0x9e,0x5b,0x74,0x05,0xf0,0xe4,0x90,0x9e,0x54,0xf0,0x90,0x9e,0x4f,0xf0,0x90,0x9e,
+0x76,0xf0,0x22,0xe4,0x90,0x9e,0x62,0xf0,0x90,0x9e,0x51,0xf0,0x90,0x9e,0x63,0xf0,
+0x22,0x8b,0x59,0x8a,0x5a,0x89,0x5b,0x11,0x83,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x12,
+0x29,0xd9,0xf5,0x74,0x14,0x60,0x0e,0x14,0x60,0x1e,0x14,0x60,0x2f,0x24,0x03,0x70,
+0x40,0x7f,0x01,0x80,0x3a,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00,0x02,0x12,0x42,
+0x20,0xfd,0xe4,0xff,0x11,0xf2,0x80,0x27,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00,
+0x02,0x12,0x42,0x20,0xfd,0x7f,0x01,0x11,0xf2,0x1f,0x80,0x13,0xab,0x59,0xaa,0x5a,
+0xa9,0x5b,0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0x7f,0x02,0x11,0xf2,0xe4,0xff,0x31,
+0x46,0x22,0xef,0x24,0xfe,0x60,0x0b,0x04,0x70,0x22,0x90,0x9e,0x5f,0x74,0x01,0xf0,
+0x80,0x16,0xed,0x70,0x0a,0x90,0x9e,0x5b,0xe0,0x90,0x9e,0x5f,0xf0,0x80,0x05,0x90,
+0x9e,0x5f,0xed,0xf0,0x90,0x9e,0x5f,0xe0,0x90,0x9e,0x50,0xf0,0x22,0xd3,0x10,0xaf,
+0x01,0xc3,0xc0,0xd0,0x90,0x00,0x01,0x12,0x42,0x20,0x90,0x9e,0x61,0xf0,0x90,0x00,
+0x03,0x12,0x42,0x20,0x90,0x9e,0x4f,0xf0,0x12,0x29,0xd9,0x65,0x74,0x60,0x02,0x11,
+0x91,0xd0,0xd0,0x92,0xaf,0x22,0xef,0x64,0x01,0x70,0x30,0x7d,0x7c,0x7f,0x02,0x12,
+0x36,0x75,0x7d,0x02,0x7f,0x03,0x12,0x36,0x75,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,
+0x3c,0x74,0x02,0xf0,0x12,0x47,0x16,0xe4,0xff,0x12,0x48,0x8f,0x90,0x06,0x04,0xe0,
+0x54,0x7f,0xf0,0x90,0x06,0x0a,0xe0,0x54,0xf8,0xf0,0x22,0x90,0x01,0x36,0x74,0x7c,
+0xf0,0xa3,0x74,0x02,0xf0,0x7d,0x7c,0xff,0x12,0x36,0xe6,0x7d,0x02,0x7f,0x03,0x12,
+0x36,0xe6,0x90,0x06,0x04,0xe0,0x44,0x80,0xf0,0x90,0x06,0x0a,0xe0,0x44,0x07,0xf0,
+0x90,0x9e,0x58,0xe0,0xa3,0xe0,0x90,0x05,0x58,0xf0,0xe5,0x73,0x30,0xe0,0x1b,0x90,
+0x9e,0x52,0xe0,0x70,0x1a,0xe0,0x04,0xf0,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0xc3,0x94,
+0x04,0x50,0x0c,0x7d,0x01,0x7f,0x04,0x02,0x47,0x1a,0xe4,0x90,0x9e,0x52,0xf0,0x22,
+0xe5,0x12,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x5e,0x90,0x9e,0x60,0xe0,
+0x54,0x0f,0xd3,0x94,0x01,0x40,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x4b,0x90,
+0x02,0x87,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x3d,0x90,0x9e,0x75,
+0xe0,0xb4,0x02,0x10,0x90,0x9e,0x64,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,
+0x60,0x17,0x80,0x26,0x90,0x9e,0x75,0xe0,0xb4,0x01,0x0e,0x90,0x01,0xaf,0xe0,0x60,
+0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x11,0x90,0x9e,0x54,0xe0,0x70,0x08,0x90,
+0x01,0xb9,0x74,0x10,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74,0x02,0xf0,
+0x7f,0x00,0x22,0x90,0x06,0x04,0xe0,0x54,0xbf,0xf0,0xef,0x60,0x09,0xe5,0x73,0xb4,
+0x01,0x04,0xe4,0xff,0x51,0x62,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x0c,
+0xf0,0x22,0x8f,0x76,0x90,0x9e,0x5e,0xe0,0x90,0x01,0xc1,0xf0,0xa3,0xe5,0x12,0xf0,
+0x12,0x45,0xb1,0xef,0x64,0x01,0x70,0x2e,0x90,0x9e,0x69,0x12,0x47,0xfa,0xe5,0x76,
+0x60,0x10,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,
+0x80,0x0e,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0,
+0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x90,0x9e,0xaf,0xef,0xf0,0x51,0xc5,0x90,0x9e,
+0xaf,0xe0,0x60,0x05,0x90,0x05,0x22,0xe4,0xf0,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,
+0xe0,0x44,0x04,0xf0,0x22,0x90,0x9d,0xff,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,
+0x7f,0x7f,0x78,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9e,0x03,0x12,0x43,0x53,0x90,0x80,
+0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x9e,0x07,0x12,0x43,
+0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9e,
+0x0b,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12,0x2f,
+0xd9,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x03,0x2d,0x95,0xe4,0xfd,0xff,0x12,0x34,
+0x81,0x90,0x9e,0x77,0xe0,0xb4,0x01,0x11,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x03,
+0x2d,0x95,0xe4,0xfd,0x7f,0x01,0x12,0x34,0x81,0x22,0x8f,0x27,0xe4,0x90,0x9e,0xa8,
+0xf0,0xa3,0xf0,0x90,0x01,0x09,0xe0,0x7f,0x00,0x30,0xe7,0x02,0x7f,0x01,0xef,0x65,
+0x27,0x60,0x3e,0xc3,0x90,0x9e,0xa9,0xe0,0x94,0x88,0x90,0x9e,0xa8,0xe0,0x94,0x13,
+0x40,0x08,0x90,0x01,0xc6,0xe0,0x44,0x80,0xf0,0x22,0x90,0x9e,0xa8,0xe4,0x75,0xf0,
+0x01,0x12,0x42,0x81,0x7f,0x14,0x7e,0x00,0x12,0x37,0x54,0xd3,0x90,0x9e,0xa9,0xe0,
+0x94,0x32,0x90,0x9e,0xa8,0xe0,0x94,0x00,0x40,0xb9,0x90,0x01,0xc7,0xe0,0x30,0xe0,
+0xb2,0x22,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x01,0xf0,0x12,0x45,0x01,
+0x12,0x45,0x02,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x02,0xf0,0x22,0x90,0x9e,0x60,0xe0,
+0x30,0xe6,0x1c,0xe0,0x54,0x0f,0xff,0x90,0x9e,0x4e,0xe0,0xfe,0x4f,0x90,0x01,0x2f,
+0xf0,0xee,0x64,0x80,0x90,0x9e,0x4e,0xf0,0x90,0x9e,0x60,0xe0,0x54,0xbf,0xf0,0x22,
+0x8f,0x75,0x12,0x45,0xb1,0xef,0x64,0x01,0x70,0x2e,0x90,0x9e,0x6a,0x12,0x47,0xfa,
+0xe5,0x75,0x60,0x10,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,
+0x10,0xf0,0x80,0x0e,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,
+0xef,0xf0,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0xe4,0x90,0x9e,0x2f,0xf0,0xe5,0x74,
+0x60,0x6a,0xe5,0x73,0x64,0x01,0x70,0x64,0xe5,0x74,0x14,0x60,0x29,0x24,0xfd,0x60,
+0x25,0x24,0x02,0x24,0xfb,0x50,0x02,0x80,0x23,0x90,0x9e,0x50,0xe0,0x14,0xf0,0xe0,
+0x60,0x04,0xa3,0xe0,0x60,0x16,0x90,0x9e,0x50,0xe0,0x70,0x0a,0x90,0x9e,0x5f,0xe0,
+0x90,0x9e,0x50,0xf0,0x80,0x00,0x90,0x9e,0x2f,0x74,0x01,0xf0,0x90,0x9e,0x2f,0xe0,
+0x60,0x2a,0x90,0x9e,0x63,0xe0,0x44,0x10,0xf0,0xe4,0x90,0x9e,0x89,0xf0,0x90,0x9e,
+0x5a,0x12,0x44,0x56,0x90,0x01,0x57,0x74,0x05,0xf0,0x90,0x9e,0x5e,0xe0,0x54,0x0f,
+0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0x1a,0x22,0xef,0xc3,0x94,
+0x20,0x50,0x39,0xef,0x30,0xe0,0x17,0xed,0xc4,0x54,0xf0,0xfd,0xef,0xc3,0x13,0xfe,
+0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,0x0f,0x80,0x10,0xef,0xc3,
+0x13,0xfe,0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,
+0xa4,0x2e,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x4d,0xf0,0x22,0xad,0x07,0xed,
+0xc3,0x94,0x20,0x50,0x0d,0x74,0x84,0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,
+0x80,0x0b,0x74,0xa6,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x54,0x7f,0xf5,
+0x64,0xe5,0x64,0x54,0x1f,0xfc,0x75,0xf0,0x09,0xed,0x90,0x96,0x48,0x12,0x43,0x5f,
+0xe0,0xff,0x90,0x9e,0x3e,0xf0,0xed,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,
+0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x3f,0xcb,0xf0,0xa3,0xeb,0xf0,0xed,0x25,
+0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,
+0x41,0xcb,0xf0,0xa3,0xeb,0xf0,0xec,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,
+0xf5,0x83,0xe4,0x93,0xfa,0x74,0x01,0x93,0xfb,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,
+0xe4,0x34,0x95,0xf5,0x83,0xea,0xf0,0xa3,0xeb,0xf0,0xec,0xc3,0x9f,0x40,0x02,0xa1,
+0xd4,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xec,0xf0,0x04,0xfb,0x90,
+0x9e,0x3e,0xe0,0xff,0xeb,0xd3,0x9f,0x40,0x02,0xc1,0x05,0xeb,0xc3,0x94,0x10,0x40,
+0x21,0xeb,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,
+0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,0x3f,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,
+0x70,0x23,0xeb,0xc3,0x94,0x10,0x50,0x39,0x74,0x01,0x7e,0x00,0xa8,0x03,0x08,0x80,
+0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,0x41,0xe0,0x5e,0xfe,0xa3,
+0xe0,0x5f,0x4e,0x60,0x1c,0xeb,0x64,0x13,0x60,0x08,0xeb,0x64,0x12,0x60,0x03,0xbb,
+0x11,0x09,0x90,0x9e,0x3f,0xe0,0x30,0xe0,0x02,0x7b,0x18,0xac,0x03,0x8c,0x64,0x80,
+0x34,0x0b,0x80,0x8b,0x90,0x9e,0x3e,0xe0,0xfb,0x6c,0x70,0x69,0x74,0x67,0x2d,0xf5,
+0x82,0xe4,0x34,0x9d,0xf5,0x83,0xec,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x4a,0x12,
+0x43,0x5f,0xe0,0xb4,0x01,0x0c,0xe5,0x64,0x20,0xe6,0x07,0xec,0x44,0x40,0xf5,0x64,
+0x80,0x03,0xaf,0x64,0x22,0xec,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,
+0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xec,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,
+0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,
+0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,
+0xa3,0xef,0xf0,0x80,0x5b,0xec,0xd3,0x9b,0x40,0x56,0x90,0x9e,0x3e,0xe0,0xff,0x74,
+0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xef,0xf0,0xac,0x07,0x8f,0x64,0xec,
+0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,
+0x93,0xff,0xec,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,
+0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,
+0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xaf,0x64,0x22,
+0x74,0x01,0x2d,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xaf,0x05,0xe5,0x64,
+0x44,0x80,0xfd,0x12,0x5a,0x85,0xe5,0x64,0x44,0x80,0xff,0x22,0xe4,0xf5,0x59,0xe5,
+0x59,0xb4,0x20,0x14,0x90,0x9a,0xc5,0xe0,0x04,0xf0,0x90,0x95,0x01,0xe0,0xff,0x90,
+0x9a,0xc5,0xe0,0xb5,0x07,0x02,0xe4,0xf0,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x4b,
+0x12,0x43,0x5f,0xe0,0x64,0x01,0x60,0x03,0x02,0x6d,0x04,0xe5,0x59,0x25,0xe0,0x24,
+0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0xd3,0x94,0x00,0xee,
+0x94,0x00,0x50,0x03,0x02,0x6d,0x04,0xe5,0x59,0x94,0x20,0x40,0x09,0x90,0x9a,0xc5,
+0xe0,0x60,0x03,0x02,0x6d,0x10,0xe5,0x59,0x75,0xf0,0x0a,0xa4,0x24,0x00,0xf9,0x74,
+0x90,0x35,0xf0,0x75,0x5e,0x01,0xf5,0x5f,0x89,0x60,0xe5,0x59,0x25,0xe0,0x24,0x80,
+0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90,0x9e,0x38,0xcf,0xf0,
+0xa3,0xef,0xf0,0xe5,0x59,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,
+0xe0,0xff,0xa3,0xe0,0x90,0x9e,0x3a,0xcf,0xf0,0xa3,0xef,0xf0,0xe5,0x59,0xc3,0x94,
+0x20,0x50,0x14,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,
+0x3f,0x90,0x9e,0x34,0xf0,0x80,0x12,0x74,0xa6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,
+0xf5,0x83,0xe0,0x54,0x3f,0x90,0x9e,0x34,0xf0,0x90,0x9e,0x34,0xe0,0xfe,0x54,0x1f,
+0xa3,0xf0,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x48,0x12,0x43,0x5f,0xe0,0x90,0x9e,
+0x3d,0xf0,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xc3,0x94,
+0x05,0x40,0x03,0x02,0x69,0xdd,0x90,0x9e,0x3d,0xe0,0xff,0x90,0x9e,0x35,0xe0,0x9f,
+0x40,0x13,0x90,0x9e,0x3d,0xe0,0x90,0x9e,0x35,0xf0,0xee,0x54,0x40,0xfe,0x90,0x9e,
+0x34,0xf0,0xef,0x4e,0xf0,0x90,0x04,0xfd,0xe0,0x64,0x01,0x70,0x29,0x90,0x9e,0x35,
+0xe0,0xff,0x90,0x41,0x4a,0x93,0xfe,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,
+0xf5,0x83,0xe0,0xc3,0x9e,0x40,0x06,0xef,0x90,0x40,0xda,0x80,0x30,0x90,0x9e,0x35,
+0xe0,0x90,0x40,0xf6,0x80,0x27,0x90,0x9e,0x35,0xe0,0xff,0x90,0x41,0x4a,0x93,0xfe,
+0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xc3,0x9e,0x40,0x06,
+0xef,0x90,0x41,0x12,0x80,0x07,0x90,0x9e,0x35,0xe0,0x90,0x41,0x2e,0x93,0x90,0x9e,
+0x3c,0xf0,0x90,0x9e,0x3c,0xe0,0x75,0xf0,0x06,0xa4,0x24,0x50,0xf9,0x74,0x40,0x35,
+0xf0,0x75,0x5b,0xff,0xf5,0x5c,0x89,0x5d,0x90,0x9e,0x34,0xe0,0x90,0x41,0xf2,0x93,
+0xff,0xd3,0x90,0x9e,0x3b,0xe0,0x9f,0x90,0x9e,0x3a,0xe0,0x94,0x00,0x40,0x09,0xe4,
+0xfd,0xaf,0x59,0x12,0x5c,0xd8,0x81,0x9b,0xe5,0x59,0x25,0xe0,0x24,0xc2,0xf5,0x82,
+0xe4,0x34,0x95,0xf5,0x83,0xe0,0xf5,0x61,0xa3,0xe0,0xf5,0x62,0xab,0x5b,0xaa,0x5c,
+0xa9,0x5d,0x12,0x29,0xd9,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x12,0x42,
+0x97,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,
+0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x7e,0x00,
+0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x02,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,
+0x29,0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,0xaa,0x5c,
+0xa9,0x5d,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,
+0x60,0x90,0x00,0x04,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,0x62,
+0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x03,
+0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x06,0x12,
+0x42,0xc2,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,
+0xf5,0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x7e,
+0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x08,0x12,0x42,0xc2,0xfd,0xac,0xf0,
+0x12,0x29,0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,0xaa,
+0x5c,0xa9,0x5d,0x90,0x00,0x05,0x12,0x42,0x20,0xff,0x7e,0x00,0x90,0x9e,0x38,0xe0,
+0xfc,0xa3,0xe0,0xfd,0x12,0x29,0xf2,0xd3,0xe5,0x62,0x9f,0xe5,0x61,0x9e,0x40,0x0c,
+0xe5,0x62,0x9f,0xf5,0x62,0xe5,0x61,0x9e,0xf5,0x61,0x80,0x05,0xe4,0xf5,0x61,0xf5,
+0x62,0xe5,0x59,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe5,0x61,
+0xf0,0xa3,0xe5,0x62,0xf0,0x90,0x9e,0x34,0xe0,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,
+0x34,0x41,0xf5,0x83,0xc3,0x74,0x01,0x93,0x95,0x62,0xe4,0x93,0x95,0x61,0x50,0x07,
+0xaf,0x59,0x12,0x64,0xbd,0x81,0x6f,0x90,0x9e,0x34,0xe0,0x25,0xe0,0x24,0x9e,0xf5,
+0x82,0xe4,0x34,0x41,0xf5,0x83,0xd3,0x74,0x01,0x93,0x95,0x62,0xe4,0x93,0x95,0x61,
+0x50,0x02,0x81,0x6f,0x7d,0x01,0xaf,0x59,0x12,0x5c,0xd8,0x81,0x6f,0x74,0xe6,0x25,
+0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xfc,0x64,0x05,0x60,0x02,0x61,0x78,
+0x90,0x96,0x43,0xe0,0xff,0xb4,0x03,0x0b,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x19,0x40,
+0x3d,0x80,0x2e,0xef,0xb4,0x02,0x0b,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x11,0x40,0x2e,
+0x80,0x1f,0x90,0x96,0x43,0xe0,0xff,0xb4,0x01,0x0b,0x90,0x9e,0x35,0xe0,0xc3,0x94,
+0x0a,0x40,0x1b,0x80,0x0c,0xef,0x70,0x11,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x03,0x40,
+0x0d,0x90,0x9a,0x84,0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x9a,0x84,0xf0,0x74,0x84,
+0x25,0x59,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe0,0xf5,0x63,0x74,0x44,0x25,0x59,
+0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xff,0xc3,0x94,0x30,0x50,0x02,0x61,0x25,
+0x90,0x9a,0x84,0xe0,0x64,0x01,0x60,0x02,0x61,0x25,0x74,0x85,0x25,0x59,0xf5,0x82,
+0xe4,0x34,0x9a,0xf5,0x83,0xe0,0x64,0x0a,0x60,0x51,0xef,0x24,0x05,0xff,0xe4,0x33,
+0xfe,0x74,0x41,0x25,0x59,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xfd,0xd3,0x9f,
+0xee,0x64,0x80,0xf8,0x74,0x80,0x98,0x50,0x32,0xed,0x24,0x05,0xff,0xe4,0x33,0xfe,
+0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xd3,0x9f,0xee,0x64,
+0x80,0xf8,0x74,0x80,0x98,0x50,0x14,0x74,0x26,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9d,
+0xf5,0x83,0xe0,0xff,0x90,0x9e,0x35,0xe0,0x6f,0x60,0x3d,0x74,0x44,0x25,0x59,0xf5,
+0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xff,0xd3,0x94,0x42,0x40,0x05,0x75,0x63,0x05,
+0x80,0x0e,0xef,0xd3,0x94,0x39,0x40,0x05,0x75,0x63,0x03,0x80,0x03,0x75,0x63,0x01,
+0x74,0x41,0x25,0x59,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xef,0xf0,0x74,0x85,0x25,
+0x59,0xf5,0x82,0xe4,0x34,0x9a,0x80,0x29,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,
+0x9c,0xf5,0x83,0xe4,0xf0,0x74,0x85,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,
+0xe0,0x04,0xf0,0x80,0x10,0xe4,0xf5,0x63,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,
+0x9c,0xf5,0x83,0xe4,0xf0,0x90,0x9e,0x35,0xe0,0xff,0x74,0x26,0x25,0x59,0xf5,0x82,
+0xe4,0x34,0x9d,0xf5,0x83,0xef,0xf0,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x98,
+0xf5,0x83,0xe5,0x63,0xf0,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x4c,0x12,0x43,0x5f,
+0xe0,0xb4,0x01,0x10,0xe4,0xf5,0x63,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,
+0xf5,0x83,0xe4,0xf0,0xad,0x63,0x81,0x6a,0xec,0x64,0x06,0x60,0x02,0x81,0x6f,0xf5,
+0x61,0xf5,0x62,0x90,0x42,0x13,0x93,0xff,0x7e,0x00,0x90,0x9e,0x38,0xe0,0xfc,0xa3,
+0xe0,0xfd,0x12,0x29,0xf2,0x90,0x9e,0x36,0xee,0xf0,0xa3,0xef,0xf0,0x74,0x84,0x25,
+0x59,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe0,0xf5,0x63,0xe4,0xf5,0x5a,0xab,0x5e,
+0xaa,0x5f,0xa9,0x60,0x75,0xf0,0x02,0xe5,0x5a,0xa4,0xf5,0x82,0x85,0xf0,0x83,0x12,
+0x42,0xc2,0xfd,0xac,0xf0,0xe5,0x5a,0x90,0x42,0x0e,0x93,0xff,0x7e,0x00,0x12,0x29,
+0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xc3,0x90,0x9e,0x37,0xe0,
+0x95,0x62,0x90,0x9e,0x36,0xe0,0x95,0x61,0x40,0x07,0x05,0x5a,0xe5,0x5a,0xb4,0x05,
+0xbd,0xe5,0x5a,0xc3,0x13,0xf5,0x5a,0xe5,0x63,0xb4,0x01,0x06,0xe5,0x5a,0x70,0x46,
+0x80,0x13,0xe5,0x63,0xb4,0x03,0x15,0xe5,0x5a,0x70,0x05,0x75,0x63,0x03,0x80,0x39,
+0xe5,0x5a,0xb4,0x01,0x05,0x75,0x63,0x01,0x80,0x2f,0x80,0x2a,0xe5,0x63,0xb4,0x05,
+0x28,0xe5,0x5a,0x70,0x05,0x75,0x63,0x05,0x80,0x0d,0xe5,0x5a,0xb4,0x01,0x05,0x75,
+0x63,0x03,0x80,0x03,0x75,0x63,0x01,0xd3,0x90,0x9e,0x3b,0xe0,0x94,0x03,0x90,0x9e,
+0x3a,0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x63,0xd3,0x90,0x9e,0x3b,0xe0,0x94,0x03,
+0x90,0x9e,0x3a,0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x63,0x74,0x84,0x25,0x59,0xf5,
+0x82,0xe4,0x34,0x98,0xf5,0x83,0xe5,0x63,0xf0,0xfd,0xaf,0x59,0x12,0x64,0x7d,0x74,
+0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xd3,0x94,0x05,0x74,0xe6,
+0x50,0x0e,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x04,0xf0,0x80,0x0b,
+0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0xab,0x5e,0xaa,0x5f,0xa9,
+0x60,0xe4,0xf5,0xf0,0x12,0x42,0xfa,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x02,
+0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x04,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,
+0x00,0x06,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x08,0xe4,0xf5,0xf0,0x12,0x43,
+0x19,0xe5,0x59,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4,0xf0,
+0xa3,0xf0,0xe5,0x59,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,
+0xf0,0xa3,0xf0,0xe5,0x59,0x25,0xe0,0x24,0x44,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,
+0xe4,0xf0,0xa3,0xf0,0x05,0x59,0xe5,0x59,0xc3,0x94,0x40,0x50,0x03,0x02,0x66,0xbf,
+0x22,0x90,0x04,0x44,0x74,0x11,0xf0,0xa3,0x74,0xf0,0xf0,0xa3,0x74,0x0f,0xf0,0xa3,
+0xe4,0xf0,0xfd,0x74,0xa4,0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe4,0xf0,0x0d,
+0xbd,0x10,0xf0,0xe4,0x90,0x9a,0xc5,0xf0,0x90,0x95,0x01,0x04,0xf0,0xe4,0xfd,0x75,
+0xf0,0x0a,0xed,0x90,0x90,0x00,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,
+0xed,0x90,0x90,0x02,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,
+0x90,0x04,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x06,
+0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x08,0x12,0x43,
+0x5f,0xe4,0xf0,0xa3,0xf0,0x74,0x26,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0x74,
+0x13,0xf0,0x74,0x85,0x2d,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe4,0xf0,0x74,0x84,
+0x2d,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0xf0,0xed,0x25,0xe0,0x24,0x80,0xf5,
+0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc4,0xf5,
+0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc4,0xf5,
+0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0x44,0xf5,
+0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc6,0xf5,
+0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0x46,0xf5,
+0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x74,0x86,0x2d,0xf5,0x82,0xe4,
+0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x74,0x46,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,
+0xe4,0xf0,0x74,0xe6,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x90,0x41,
+0xc4,0x93,0xfe,0x74,0x01,0x93,0xff,0x90,0x41,0x8c,0x74,0x01,0x93,0x2f,0xff,0xe4,
+0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,
+0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x4b,
+0x12,0x43,0x5f,0x74,0x01,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x4a,0x12,0x43,0x5f,
+0x74,0x01,0xf0,0x74,0x82,0x2d,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0c,0xf0,
+0x75,0xf0,0x09,0xed,0x90,0x96,0x46,0x12,0x43,0x5f,0x74,0xff,0xf0,0xa3,0xf0,0x75,
+0xf0,0x09,0xed,0x90,0x96,0x44,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0x74,0x0f,0xf0,0x75,
+0xf0,0x09,0xed,0x90,0x96,0x48,0x12,0x43,0x5f,0x74,0x13,0xf0,0x75,0xf0,0x09,0xed,
+0x90,0x96,0x49,0x12,0x43,0x5f,0xe4,0xf0,0xed,0xc3,0x94,0x20,0x50,0x0f,0x74,0x84,
+0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0x74,0x13,0xf0,0x80,0x0d,0x74,0xa6,0x2d,
+0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0x74,0x13,0xf0,0x0d,0xed,0x64,0x40,0x60,0x02,
+0xa1,0x3f,0x22,0x12,0x29,0xd9,0xf5,0x59,0xc3,0x94,0x40,0x50,0x15,0x90,0x00,0x02,
+0x12,0x42,0x20,0xff,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xef,
+0xf0,0x22,0xe5,0x59,0xb4,0x40,0x0a,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x96,0x42,
+0xf0,0x22,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x3f,0xfe,0xef,0x54,0x80,0xc4,
+0x13,0x13,0x13,0x54,0x01,0xfd,0xaf,0x06,0x02,0x55,0x35,0x12,0x29,0xd9,0x90,0x95,
+0x01,0xf0,0x22,0x12,0x29,0xd9,0xf5,0x73,0x22,0x90,0x00,0x02,0x12,0x42,0x20,0xff,
+0x30,0xe0,0x25,0x12,0x29,0xd9,0x90,0x9e,0x56,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,
+0x90,0x9e,0x57,0xf0,0xef,0xc3,0x13,0x54,0x7f,0x90,0x9e,0x55,0xf0,0x90,0x00,0x03,
+0x12,0x42,0x20,0x90,0x9e,0x5b,0xf0,0x22,0x90,0x9e,0x56,0x74,0x01,0xf0,0x90,0x9e,
+0x57,0x74,0x03,0xf0,0x90,0x9e,0x55,0x74,0x14,0xf0,0x90,0x9e,0x5b,0x74,0x05,0xf0,
+0x22,0x12,0x29,0xd9,0x30,0xe0,0x18,0xc3,0x13,0x54,0x7f,0x90,0x9e,0x5a,0xf0,0x90,
+0x00,0x01,0x12,0x42,0x20,0xff,0x90,0x9e,0x58,0xe4,0xf0,0xa3,0xef,0xf0,0x22,0x90,
+0x9e,0x5a,0x74,0x07,0xf0,0x90,0x9e,0x58,0xe4,0xf0,0xa3,0x74,0x02,0xf0,0x22,0x90,
+0x02,0x09,0xe0,0xfd,0x12,0x29,0xd9,0xfe,0xaf,0x05,0xed,0x2e,0x90,0x9e,0x67,0xf0,
+0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x9e,0x68,0xf0,0x90,0x00,0x02,
+0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x9e,0x69,0xf0,0x90,0x00,0x03,0x12,0x42,0x20,
+0xff,0xed,0x2f,0x90,0x9e,0x6a,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0xae,0x05,
+0xed,0x2f,0x90,0x9e,0x6b,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,
+0x3f,0x12,0x43,0x8b,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,
+0xfa,0xe5,0xf0,0x24,0x00,0xff,0xe4,0x3a,0xfe,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,
+0x00,0x01,0xee,0x8f,0xf0,0x12,0x43,0x19,0x12,0x29,0xd9,0xff,0x60,0x2c,0xb5,0x22,
+0x16,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,0x65,0x24,0x70,
+0x04,0xe5,0x23,0x65,0xf0,0x60,0x23,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,0x01,
+0x12,0x42,0xc2,0xff,0xae,0xf0,0x11,0x6f,0x80,0x10,0x90,0x9e,0x3f,0x12,0x43,0x6b,
+0x12,0x29,0xd9,0x65,0x22,0x60,0x03,0x12,0x44,0xca,0xd0,0xd0,0x92,0xaf,0x22,0x90,
+0x9e,0x42,0xee,0xf0,0xa3,0xef,0xf0,0x75,0x22,0x01,0x8e,0x23,0xf5,0x24,0xe4,0xfd,
+0x7f,0x0b,0x11,0xb1,0xe4,0xfd,0x7f,0x02,0x11,0xb1,0x31,0x87,0xe4,0xff,0x31,0x7b,
+0xe4,0xf5,0x26,0x90,0x01,0xc9,0xe5,0x26,0xf0,0x90,0x9e,0x42,0xe0,0xfc,0xa3,0xe0,
+0xfd,0xec,0xfb,0x8d,0x44,0xe4,0xf5,0x45,0x7d,0x01,0x7f,0x60,0x7e,0x01,0x02,0x35,
+0xab,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x45,0xed,0xf0,0x90,0x9e,0x44,
+0xef,0xf0,0xd3,0x94,0x07,0x50,0x4f,0xa3,0xe0,0x70,0x1a,0x90,0x9e,0x44,0xe0,0xff,
+0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,
+0xe0,0x5f,0xf0,0x80,0x17,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,
+0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x47,0xe0,0x4f,0xf0,0x12,0x4d,0x28,0x90,
+0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,
+0xff,0x90,0x00,0x46,0x80,0x5a,0x90,0x9e,0x44,0xe0,0x24,0xf8,0xf0,0xa3,0xe0,0x70,
+0x1d,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,
+0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x80,0x1a,0x90,0x9e,
+0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,
+0xf0,0xff,0x90,0x00,0x43,0xe0,0x4f,0xf0,0x12,0x4d,0x28,0x90,0x9e,0x44,0xe0,0xff,
+0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x43,
+0xe0,0x5f,0xf0,0x12,0x4d,0x28,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x01,0xca,0xe5,0x25,
+0xf0,0xef,0x60,0x02,0x31,0xe8,0x22,0x7f,0x0b,0x51,0x08,0xef,0x65,0x25,0x60,0x10,
+0xe5,0x25,0xb4,0x01,0x05,0xe4,0xf5,0x25,0x80,0x03,0x75,0x25,0x01,0x7f,0x01,0x22,
+0x7f,0x00,0x22,0xe5,0x22,0x64,0x01,0x70,0x3e,0x31,0x87,0xbf,0x01,0x04,0x7f,0x01,
+0x31,0x7b,0x90,0x00,0x46,0xe0,0x44,0x04,0xfd,0x7f,0x46,0x12,0x4e,0x30,0x90,0x00,
+0x44,0xe0,0x54,0xfb,0xfd,0x7f,0x44,0x12,0x4e,0x30,0x90,0x00,0x46,0xe0,0x54,0xfb,
+0xfd,0x7f,0x46,0x12,0x4e,0x30,0x7f,0x02,0x51,0x08,0x8f,0x26,0x90,0x01,0xc9,0xe5,
+0x26,0xf0,0xb4,0x01,0x02,0x31,0xe8,0x22,0x90,0x00,0x49,0xe0,0x90,0x9e,0xb1,0xf0,
+0xe0,0x54,0x0f,0xf0,0x44,0xf0,0xfd,0x7f,0x49,0x12,0x4e,0x30,0x90,0x9e,0xb1,0xe0,
+0x44,0xb0,0xfd,0x7f,0x49,0x02,0x4e,0x30,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,
+0x9e,0xb2,0xef,0xf0,0xd3,0x94,0x07,0x50,0x47,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,
+0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0xe0,0x5f,0xf0,0x12,0x4d,
+0x28,0x90,0x9e,0xb2,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8,0x05,0x08,0x80,0x05,0xc3,
+0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x44,0xe0,0xfb,0xe4,0xfe,0xef,0x5b,
+0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13,0xd8,0xf8,0xff,0x80,0x44,
+0x90,0x9e,0xb2,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,
+0xc3,0x33,0xd8,0xfc,0x12,0x4d,0x20,0x90,0x9e,0xb2,0xe0,0xfd,0x74,0x01,0x7e,0x00,
+0xa8,0x05,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x42,
+0xe0,0xfb,0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,
+0x13,0xd8,0xf8,0xff,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,
+0x90,0x9e,0x6d,0xe0,0x90,0x9e,0x40,0xf0,0x90,0x9e,0x6e,0xe0,0xf5,0x64,0xa3,0xe0,
+0xf5,0x65,0xe4,0xf5,0x61,0x74,0x70,0x25,0x61,0xf5,0x82,0xe4,0x34,0x9e,0xf5,0x83,
+0xe0,0xff,0x74,0x66,0x25,0x61,0xf8,0xa6,0x07,0x05,0x61,0xe5,0x61,0xb4,0x04,0xe5,
+0x90,0x9e,0x40,0xe0,0x12,0x43,0x94,0x73,0x06,0x00,0x74,0x2e,0x01,0x73,0x0c,0x02,
+0x73,0x0c,0x03,0x73,0x0c,0x04,0x74,0x2e,0x05,0x73,0xfe,0x80,0x74,0x14,0x81,0x74,
+0x2e,0x82,0x00,0x00,0x74,0x2a,0xaf,0x69,0x91,0x35,0x81,0x2e,0x90,0x9e,0x40,0xe0,
+0xff,0xb4,0x02,0x08,0x90,0x9e,0x3f,0x74,0x01,0xf0,0x80,0x0f,0xef,0x90,0x9e,0x3f,
+0xb4,0x03,0x05,0x74,0x02,0xf0,0x80,0x03,0x74,0x04,0xf0,0xc3,0xe5,0x64,0x94,0x08,
+0x50,0x49,0xe4,0xf5,0x61,0x90,0x9e,0x3f,0xe0,0xff,0xe5,0x61,0xc3,0x9f,0x40,0x02,
+0x81,0x2e,0xc3,0xe5,0x64,0x94,0x01,0x50,0x14,0xe5,0x61,0x25,0x65,0xff,0xc3,0x74,
+0x03,0x95,0x61,0x24,0x66,0xf8,0xe6,0xfd,0x12,0x4e,0x30,0x80,0x1a,0xc3,0x74,0x03,
+0x95,0x61,0x24,0x66,0xf8,0xe6,0xff,0xe5,0x61,0x7c,0x00,0x25,0x65,0xfd,0xec,0x35,
+0x64,0x8d,0x82,0xf5,0x83,0xef,0xf0,0x05,0x61,0x80,0xba,0xc3,0xe5,0x64,0x94,0x10,
+0x40,0x02,0x81,0x2e,0x90,0x9e,0x40,0xe0,0x64,0x04,0x60,0x02,0x81,0x2e,0xaf,0x67,
+0xfc,0xfd,0xfe,0x78,0x10,0x12,0x2a,0x6c,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,
+0xaf,0x66,0xe4,0xfc,0xfd,0xfe,0x78,0x18,0x12,0x2a,0x6c,0xd0,0x03,0xd0,0x02,0xd0,
+0x01,0xd0,0x00,0x12,0x43,0x46,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0xaf,0x68,
+0xe4,0xfc,0xfd,0xfe,0x78,0x08,0x12,0x2a,0x6c,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,
+0x00,0x12,0x43,0x46,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,0x07,0xaf,0x69,0xe4,0xfc,
+0xfd,0xfe,0x12,0x43,0x46,0xa3,0x12,0x2a,0x7f,0x90,0x9e,0x41,0x12,0x43,0x53,0x90,
+0x80,0x85,0x12,0x2a,0x7f,0xaf,0x65,0xae,0x64,0x12,0x2f,0xd9,0x80,0x30,0xe5,0x68,
+0x7f,0x00,0xfe,0xef,0x25,0x69,0xf5,0x63,0xe4,0x3e,0xf5,0x62,0xaf,0x63,0xfe,0x12,
+0x37,0x54,0x80,0x1a,0xe5,0x68,0x7f,0x00,0xfe,0xef,0x25,0x69,0xf5,0x63,0xe4,0x3e,
+0xf5,0x62,0xaf,0x63,0xfe,0x12,0x36,0xcb,0x80,0x04,0x7f,0x00,0x80,0x02,0x7f,0x01,
+0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x6a,0xe4,0x90,0x9e,0x45,0xf0,0xe5,0x6a,0x14,0xfe,
+0x90,0x9e,0x45,0xe0,0xff,0xc3,0x9e,0x50,0x0e,0xef,0x04,0xfd,0x12,0x34,0xb7,0x90,
+0x9e,0x45,0xe0,0x04,0xf0,0x80,0xe5,0xe5,0x6a,0x14,0xff,0x7d,0xff,0x12,0x34,0xb7,
+0x90,0x9e,0x45,0xe5,0x6a,0xf0,0x90,0x9e,0x45,0xe0,0xc3,0x94,0xff,0x50,0x0f,0xe0,
+0xff,0x04,0xfd,0x12,0x34,0xb7,0x90,0x9e,0x45,0xe0,0x04,0xf0,0x80,0xe8,0xad,0x6a,
+0x7f,0xff,0x02,0x34,0xb7,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xe4,0xf5,0x5b,0x75,
+0x5c,0x04,0xf5,0x5d,0xf5,0x5f,0xf5,0x60,0x90,0x02,0x09,0xe0,0xff,0x12,0x29,0xd9,
+0xfe,0xef,0x2e,0xf5,0x5e,0x30,0xe0,0x08,0x75,0x59,0x00,0x75,0x5a,0x80,0x80,0x05,
+0xe4,0xf5,0x59,0xf5,0x5a,0xe5,0x5e,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x74,0x20,0x25,
+0x5b,0xf5,0x5b,0xad,0x5a,0xe5,0x5b,0x2d,0xff,0x24,0x01,0xf5,0x82,0xe4,0x34,0xfc,
+0xf5,0x83,0xe0,0x90,0x9e,0x6d,0xf0,0x74,0x02,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,
+0x83,0xe0,0xfe,0xe5,0x5b,0x2d,0x24,0x03,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,
+0x24,0x00,0xff,0xe4,0x3e,0x90,0x9e,0x6e,0xf0,0xa3,0xef,0xf0,0x7f,0x04,0xe5,0x5b,
+0x25,0x5a,0x2f,0x24,0x00,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0xfe,0x74,0x6c,
+0x2f,0xf5,0x82,0xe4,0x34,0x9e,0xf5,0x83,0xee,0xf0,0x0f,0xbf,0x08,0xe0,0x51,0xa9,
+0xef,0x70,0x3f,0x90,0x01,0xc3,0xe0,0x60,0x25,0xc3,0xe5,0x60,0x94,0xe8,0xe5,0x5f,
+0x94,0x03,0x40,0x09,0x90,0x01,0xc6,0xe0,0x44,0x10,0xf0,0x80,0x63,0x05,0x60,0xe5,
+0x60,0x70,0x02,0x05,0x5f,0x7f,0x0a,0x7e,0x00,0x12,0x37,0x54,0x80,0xd5,0x90,0x01,
+0xc6,0xe0,0x90,0x01,0xc3,0x30,0xe2,0x05,0x74,0xfe,0xf0,0x80,0x43,0x74,0xff,0xf0,
+0x80,0x3e,0xe5,0x5b,0xb4,0x78,0x23,0xe4,0xf5,0x5b,0x05,0x5e,0xe5,0x5a,0x64,0x80,
+0x45,0x59,0x70,0x06,0xf5,0x59,0xf5,0x5a,0x80,0x06,0x75,0x59,0x00,0x75,0x5a,0x80,
+0xe5,0x5e,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x80,0x06,0x74,0x08,0x25,0x5b,0xf5,0x5b,
+0xe5,0x5d,0x15,0x5d,0x70,0x02,0x15,0x5c,0xe5,0x5d,0x45,0x5c,0x60,0x02,0x81,0xc3,
+0xd0,0xd0,0x92,0xaf,0x22,0x90,0x06,0x34,0x74,0xff,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,
+0xa3,0xf0,0x22,0x22,0x8e,0x59,0x8f,0x5a,0x8b,0x5b,0x8a,0x5c,0x89,0x5d,0xe4,0x90,
+0x9e,0x34,0xf0,0xef,0x90,0x00,0x31,0xf0,0x12,0x4d,0x28,0xe5,0x59,0x54,0x03,0xff,
+0x90,0x00,0x32,0xe0,0x54,0xfc,0x4f,0xf0,0x12,0x4d,0x28,0x90,0x00,0x33,0xe0,0x54,
+0x7f,0xf0,0x12,0x4d,0x28,0x90,0x00,0x33,0xe0,0x20,0xe7,0x0e,0x90,0x9e,0x34,0xe0,
+0xc3,0x94,0x64,0x50,0x05,0xe0,0x04,0xf0,0x80,0xeb,0x90,0x9e,0x34,0xe0,0xc3,0x94,
+0x64,0x50,0x10,0x90,0x00,0x30,0xe0,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x12,0x42,0x4d,
+0x7f,0x01,0x22,0x7f,0x00,0x22,0xe4,0xf5,0x25,0x22,0xe4,0x90,0x9e,0xaa,0xf0,0xa3,
+0xf0,0x90,0x05,0xf8,0xe0,0x70,0x0f,0xa3,0xe0,0x70,0x0b,0xa3,0xe0,0x70,0x07,0xa3,
+0xe0,0x70,0x03,0x7f,0x01,0x22,0xd3,0x90,0x9e,0xab,0xe0,0x94,0xe8,0x90,0x9e,0xaa,
+0xe0,0x94,0x03,0x40,0x03,0x7f,0x00,0x22,0x7f,0x32,0x7e,0x00,0x12,0x37,0x54,0x90,
+0x9e,0xaa,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x80,0xc6,0x7f,0x78,0x7e,0x08,0x12,
+0x27,0xde,0x90,0x9d,0xff,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,
+0x9e,0x03,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0x07,0x12,
+0x2a,0x7f,0x90,0x9e,0x77,0xe0,0x90,0x9d,0xff,0xb4,0x01,0x0d,0x12,0x43,0x53,0xef,
+0x54,0xc7,0xff,0xed,0x54,0xc7,0xfd,0x80,0x07,0x12,0x43,0x53,0xef,0x54,0xc7,0xff,
+0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9e,
+0x03,0x12,0x43,0x53,0xef,0x54,0x0f,0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,
+0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x9e,0x07,0x12,0x43,0x53,0xef,0x44,0x02,0xff,
+0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,0x2f,0xd9,0x7f,0x70,
+0x7e,0x0e,0x12,0x27,0xde,0x90,0x9e,0x0b,0x12,0x2a,0x7f,0x90,0x80,0x85,0x12,0x2a,
+0x8b,0x00,0x1b,0x25,0xa0,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x59,0x12,
+0x2a,0x8b,0x00,0x00,0x00,0x00,0xe4,0xfd,0xff,0x12,0x34,0x81,0x90,0x9e,0x77,0xe0,
+0xb4,0x01,0x11,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe4,0xfd,0x7f,
+0x01,0x12,0x34,0x81,0x22,0x90,0x9e,0x77,0xe0,0x90,0x9e,0x0f,0xf0,0x22,0xef,0x70,
+0x03,0x02,0x78,0xe6,0x90,0x9e,0x0f,0xe0,0x60,0x03,0x02,0x7c,0xb1,0x90,0x9d,0xfb,
+0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x08,0x12,0x2f,0xd9,
+0x90,0x9d,0xa7,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x44,0x7e,0x08,
+0x12,0x2f,0xd9,0x90,0x9d,0xab,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,
+0x5c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9d,0xaf,0x12,0x43,0x53,0x90,0x80,0x85,0x12,
+0x2a,0x7f,0x7f,0x6c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xb3,0x12,0x43,0x53,0x90,
+0x80,0x85,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xb7,0x12,
+0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x74,0x7e,0x0e,0x12,0x2f,0xd9,0x90,
+0x9d,0xbb,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x0e,0x12,
+0x2f,0xd9,0x90,0x9d,0xbf,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x7c,
+0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xc3,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,
+0x7f,0x7f,0x80,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xc7,0x12,0x43,0x53,0x90,0x80,
+0x85,0x12,0x2a,0x7f,0x7f,0x84,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xcb,0x12,0x43,
+0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x88,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,
+0xcf,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x0e,0x12,0x2f,
+0xd9,0x90,0x9d,0xd3,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xd0,0x7e,
+0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xd7,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,
+0x7f,0xd4,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xdb,0x12,0x43,0x53,0x90,0x80,0x85,
+0x12,0x2a,0x7f,0x7f,0xd8,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xdf,0x12,0x43,0x53,
+0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xdc,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xe3,
+0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xe0,0x7e,0x0e,0x12,0x2f,0xd9,
+0x90,0x9d,0xe7,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xec,0x7e,0x0e,
+0x12,0x2f,0xd9,0x90,0x9d,0xeb,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,
+0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x9d,0xef,0x12,0x43,0x53,0x90,0x80,0x85,0x12,
+0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x2f,0xd9,0x90,0x9d,0xf3,0x12,0x43,0x53,0x90,
+0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f,0xd9,0x90,0x9d,0xf7,0x12,
+0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08,0x12,0x2f,0xd9,0x90,
+0x9e,0x0f,0x74,0x01,0xf0,0x22,0x90,0x9e,0x0f,0xe0,0x64,0x01,0x60,0x02,0x81,0xb1,
+0x7f,0x8c,0x7e,0x08,0x12,0x27,0xde,0x90,0x9d,0xfb,0x12,0x2a,0x7f,0x7f,0x44,0x7e,
+0x08,0x12,0x27,0xde,0x90,0x9d,0xa7,0x12,0x2a,0x7f,0x7f,0x5c,0x7e,0x08,0x12,0x27,
+0xde,0x90,0x9d,0xab,0x12,0x2a,0x7f,0x7f,0x6c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,
+0xaf,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xb3,0x12,0x2a,
+0x7f,0x7f,0x74,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xb7,0x12,0x2a,0x7f,0x7f,0x78,
+0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xbb,0x12,0x2a,0x7f,0x7f,0x7c,0x7e,0x0e,0x12,
+0x27,0xde,0x90,0x9d,0xbf,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x0e,0x12,0x27,0xde,0x90,
+0x9d,0xc3,0x12,0x2a,0x7f,0x7f,0x84,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xc7,0x12,
+0x2a,0x7f,0x7f,0x88,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xcb,0x12,0x2a,0x7f,0x7f,
+0x8c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xcf,0x12,0x2a,0x7f,0x7f,0xd0,0x7e,0x0e,
+0x12,0x27,0xde,0x90,0x9d,0xd3,0x12,0x2a,0x7f,0x7f,0xd4,0x7e,0x0e,0x12,0x27,0xde,
+0x90,0x9d,0xd7,0x12,0x2a,0x7f,0x7f,0xd8,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xdb,
+0x12,0x2a,0x7f,0x7f,0xdc,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xdf,0x12,0x2a,0x7f,
+0x7f,0xe0,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xe3,0x12,0x2a,0x7f,0x7f,0xec,0x7e,
+0x0e,0x12,0x27,0xde,0x90,0x9d,0xe7,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x27,
+0xde,0x90,0x9d,0xeb,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x27,0xde,0x90,0x9d,
+0xef,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde,0x90,0x9d,0xf3,0x12,0x2a,
+0x7f,0x7f,0x04,0x7e,0x08,0x12,0x27,0xde,0x90,0x9d,0xf7,0x12,0x2a,0x7f,0x7f,0x8c,
+0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,
+0x53,0xed,0x44,0xc0,0xfd,0xec,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,
+0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x08,0x12,0x2f,0xd9,0x90,
+0x80,0x85,0x12,0x2a,0x8b,0x00,0x01,0x00,0x00,0x7f,0x44,0x7e,0x08,0x12,0x2f,0xd9,
+0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0xdb,0x25,0xa4,0x7f,0x5c,0x7e,0x08,0x12,0x2f,
+0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0x6c,0x7e,0x0e,0x12,
+0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0x70,0x7e,0x0e,
+0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x74,0x7e,
+0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x78,
+0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,
+0x7c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,
+0x7f,0x80,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x63,0xdb,0x25,
+0xa4,0x7f,0x84,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,
+0x25,0xa4,0x7f,0x88,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,
+0xdb,0x25,0xa4,0x7f,0x8c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,
+0x20,0xdb,0x25,0xa4,0x7f,0xd0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,
+0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd4,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,
+0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd8,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,
+0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa4,0x7f,0xdc,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,
+0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa4,0x7f,0xe0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,
+0x80,0x85,0x12,0x2a,0x8b,0x24,0xdb,0x25,0xa4,0x7f,0xec,0x7e,0x0e,0x12,0x2f,0xd9,
+0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,
+0x12,0x43,0x53,0xe4,0xff,0xec,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,
+0x43,0x53,0xef,0x44,0x11,0xff,0xec,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,
+0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,
+0x7f,0x04,0x7e,0x0d,0x12,0x27,0xde,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,
+0x12,0x43,0x53,0xef,0x54,0xf0,0xff,0xec,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,
+0xa4,0x12,0x43,0x53,0xef,0x44,0x01,0xff,0xec,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,
+0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,
+0x2f,0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,
+0x9e,0xa4,0x12,0x43,0x53,0xe4,0xff,0xec,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,
+0xa4,0x12,0x43,0x53,0xef,0x44,0x11,0xff,0xec,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,
+0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,
+0x2f,0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,
+0x9e,0xa4,0x12,0x43,0x53,0xed,0x54,0x0f,0xfd,0xec,0x54,0xf0,0xfc,0x90,0x9e,0xa4,
+0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0xed,0x44,0x10,0xfd,0xec,0x44,0x01,
+0xfc,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x85,
+0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f,0xd9,0x7f,0x04,0x7e,0x08,0x12,0x27,
+0xde,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x54,0xf0,
+0xff,0xec,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x44,
+0x01,0xff,0xec,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,
+0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08,0x12,0x2f,0xd9,0xe4,0x90,0x9e,0x0f,
+0xf0,0x22,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x9e,0x1e,0xf0,0xe0,0x60,0x04,0xe0,
+0xf4,0x70,0x21,0xa2,0xaf,0xe4,0x33,0xf5,0x59,0xc2,0xaf,0x90,0x00,0x47,0xe0,0x54,
+0xfb,0xfd,0x7f,0x47,0x12,0x4e,0x30,0x7d,0x40,0x7f,0x01,0x12,0x36,0xaf,0xe5,0x59,
+0x24,0xff,0x92,0xaf,0x22,0xe4,0xfd,0x7f,0x45,0x12,0x4e,0x30,0x90,0x04,0xfd,0xe4,
+0xf0,0xa3,0xf0,0x90,0x9e,0x1e,0xf0,0x90,0x9e,0x24,0xf0,0x90,0x9e,0x27,0xf0,0x90,
+0x9e,0x25,0xf0,0x90,0x9e,0x28,0xf0,0x90,0x9e,0x26,0xf0,0x90,0x9e,0x29,0xf0,0x90,
+0x9e,0x10,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x9e,0x15,0xf0,0x90,
+0x9e,0x1a,0xf0,0x90,0x9e,0x1c,0xf0,0x90,0x9e,0x2e,0xf0,0x90,0x9e,0x1f,0xf0,0x90,
+0x9e,0x1b,0xf0,0x90,0x9e,0x14,0xf0,0x90,0x00,0x51,0xe0,0x44,0xc0,0xfd,0x7f,0x51,
+0x02,0x4e,0x30,0x90,0x9e,0x2e,0xe0,0x64,0x01,0x60,0x08,0x90,0x9e,0x1c,0xe0,0x60,
+0x02,0xc1,0x1a,0x90,0x9e,0x10,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,
+0x3b,0x90,0x9e,0x11,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x28,
+0x90,0x9e,0x12,0xe0,0xc3,0x94,0xff,0x50,0x0a,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x11,
+0xf0,0x80,0x15,0x90,0x9e,0x13,0xe0,0xc3,0x94,0xff,0x50,0x10,0xe0,0x04,0xf0,0xe4,
+0x90,0x9e,0x12,0xf0,0x90,0x9e,0x11,0xf0,0x90,0x9e,0x10,0xf0,0x90,0x00,0x44,0xe0,
+0x54,0x0c,0x60,0x76,0xe0,0x30,0xe2,0x32,0x90,0x9e,0x24,0xe0,0xc3,0x94,0xff,0x50,
+0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,0x9e,0x25,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,
+0x04,0xf0,0xe4,0x80,0x11,0x90,0x9e,0x26,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,
+0xf0,0xe4,0x90,0x9e,0x25,0xf0,0x90,0x9e,0x24,0xf0,0x90,0x00,0x44,0xe0,0x30,0xe3,
+0x32,0x90,0x9e,0x27,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,
+0x9e,0x28,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,0x9e,
+0x29,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x28,0xf0,0x90,
+0x9e,0x27,0xf0,0x90,0x04,0xfd,0xe0,0x44,0x01,0xf0,0x22,0x90,0x00,0x02,0x12,0x42,
+0x20,0x90,0x9e,0x1c,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0x25,0xe0,0x25,0xe0,0x90,
+0x9e,0x1b,0xf0,0x12,0x29,0xd9,0x25,0xe0,0x25,0xe0,0x90,0x9e,0x1f,0xf0,0x90,0x05,
+0x60,0xe0,0x90,0x9e,0x2a,0xf0,0x90,0x05,0x61,0xe0,0x90,0x9e,0x2b,0xf0,0x90,0x05,
+0x62,0xe0,0x90,0x9e,0x2c,0xf0,0x90,0x05,0x63,0xe0,0x90,0x9e,0x2d,0xf0,0xa2,0xaf,
+0xe4,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x90,0x9e,0x1b,0xe0,0xff,0x12,0x52,0x17,
+0x90,0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x90,0x9e,0x1c,0xe0,0x70,0x02,0xe1,0x25,
+0x90,0x9e,0x1b,0xe0,0x70,0x02,0xe1,0x25,0x90,0x9e,0x1f,0xe0,0x70,0x02,0xe1,0x25,
+0xa2,0xaf,0xe4,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x90,0x9e,0x2e,0x74,0x01,0xf0,
+0x90,0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x12,0x4e,0x27,0x90,0x00,0x46,0xe0,0x44,
+0x01,0xfd,0x7f,0x46,0x12,0x4e,0x30,0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x20,
+0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,
+0x80,0x06,0x90,0x05,0x22,0x74,0x7f,0xf0,0x90,0x00,0x45,0xe0,0x54,0xef,0xfd,0x7f,
+0x45,0x12,0x4e,0x30,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x9e,0x2a,0xe0,0x90,
+0x05,0x84,0xf0,0x90,0x9e,0x2b,0xe0,0x90,0x05,0x85,0xf0,0x90,0x9e,0x2c,0xe0,0x90,
+0x05,0x86,0xf0,0x90,0x9e,0x2d,0xe0,0x90,0x05,0x87,0xf0,0xa2,0xaf,0xe4,0x33,0x90,
+0x9e,0x3f,0xf0,0xc2,0xaf,0x90,0x01,0x3c,0xe0,0x44,0x20,0xf0,0x7d,0x20,0xe4,0xff,
+0x12,0x37,0x00,0x80,0x2d,0x90,0x9e,0x1c,0xe0,0x70,0x2f,0x90,0x9e,0x2e,0x12,0x4e,
+0x26,0x90,0x00,0x46,0xe0,0x54,0xfe,0xfd,0x7f,0x46,0x12,0x4e,0x30,0x90,0x05,0x22,
+0xe4,0xf0,0xa2,0xaf,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x7d,0x20,0xe4,0xff,0x12,
+0x36,0x92,0x90,0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x22,0x00,0x0e,0x56,};
+#else
+// =================== v79 TSMC P2PPS 2011-10-06 =======================
+u8 Rtl8192CUFwTSMCImgArray[TSMCImgArrayLength] = {
+0xc1,0x88,0x02,0x05,0x4f,0x00,0x00,0x00,0x0a,0x06,0x18,0x01,0xf4,0x3f,0x00,0x00,
+0x61,0x80,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x02,0x43,0xba,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x02,0x51,0x30,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x02,0x64,0xfb,0x00,0x00,0x00,0x00,0x00,0xa1,0x53,0x00,0x00,0x00,
+0x05,0x04,0x03,0x02,0x00,0x03,0x06,0x05,0x04,0x03,0x00,0x04,0x06,0x05,0x04,0x02,
+0x00,0x04,0x08,0x07,0x06,0x04,0x00,0x06,0x0a,0x09,0x08,0x06,0x00,0x08,0x0a,0x09,
+0x08,0x04,0x00,0x08,0x0a,0x09,0x08,0x02,0x00,0x08,0x0a,0x09,0x08,0x00,0x00,0x08,
+0x12,0x11,0x10,0x08,0x00,0x10,0x1a,0x19,0x18,0x10,0x00,0x18,0x22,0x21,0x20,0x18,
+0x00,0x20,0x22,0x21,0x20,0x10,0x00,0x20,0x22,0x21,0x20,0x08,0x00,0x20,0x22,0x21,
+0x1c,0x08,0x00,0x20,0x22,0x21,0x14,0x08,0x00,0x20,0x22,0x20,0x18,0x08,0x00,0x20,
+0x31,0x30,0x20,0x10,0x00,0x30,0x31,0x30,0x18,0x00,0x00,0x30,0x31,0x2f,0x10,0x10,
+0x00,0x30,0x31,0x2c,0x10,0x10,0x00,0x30,0x31,0x28,0x10,0x00,0x00,0x30,0x31,0x20,
+0x10,0x00,0x00,0x30,0x31,0x10,0x10,0x00,0x00,0x30,0x04,0x04,0x04,0x05,0x04,0x04,
+0x05,0x07,0x07,0x07,0x08,0x0a,0x04,0x04,0x04,0x04,0x06,0x0a,0x0b,0x0d,0x05,0x05,
+0x07,0x07,0x08,0x0b,0x0d,0x0f,0x04,0x04,0x04,0x05,0x07,0x07,0x09,0x09,0x0c,0x0e,
+0x10,0x12,0x04,0x04,0x05,0x05,0x06,0x0a,0x11,0x13,0x09,0x09,0x09,0x09,0x0c,0x0e,
+0x11,0x13,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x24,0x26,0x2a,0x18,0x1a,
+0x1d,0x1f,0x21,0x27,0x29,0x2a,0x00,0x00,0x00,0x1f,0x23,0x28,0x2a,0x2c,0x00,0x04,
+0x00,0x04,0x00,0x08,0x00,0x10,0x00,0x18,0x00,0x24,0x00,0x30,0x00,0x48,0x00,0x60,
+0x00,0x90,0x00,0xc0,0x00,0xd8,0x00,0x50,0x00,0x78,0x00,0xa0,0x00,0xc8,0x01,0x40,
+0x01,0x90,0x01,0xe0,0x02,0x30,0x01,0x2c,0x01,0x40,0x01,0xe0,0x02,0xd0,0x03,0xe8,
+0x04,0xb0,0x06,0x40,0x07,0xd0,0x00,0x02,0x00,0x02,0x00,0x04,0x00,0x08,0x00,0x0c,
+0x00,0x12,0x00,0x18,0x00,0x24,0x00,0x30,0x00,0x48,0x00,0x60,0x00,0x6c,0x00,0x28,
+0x00,0x3c,0x00,0x50,0x00,0x64,0x00,0xa0,0x00,0xc8,0x00,0xf0,0x01,0x18,0x00,0x64,
+0x00,0xa0,0x00,0xf0,0x01,0x68,0x01,0xf4,0x02,0x58,0x03,0x20,0x03,0xe8,0x02,0x02,
+0x02,0x02,0x02,0x02,0x03,0x03,0x04,0x04,0x05,0x07,0x04,0x04,0x07,0x0a,0x0a,0x0c,
+0x0c,0x12,0x05,0x07,0x07,0x08,0x0b,0x12,0x24,0x3c,0x01,0x01,0x01,0x01,0x01,0x02,
+0x03,0x04,0x05,0x06,0x07,0x08,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x05,0x06,
+0x07,0x08,0x09,0x0a,0x0b,0x0c,0x20,0x1e,0x1c,0x18,0x10,0x18,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0xbb,0x01,0x0c,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0x22,0x50,
+0x06,0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,0x25,0x82,0xf8,0xe2,0x22,
+0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe4,0x93,0x22,0xbb,0x01,0x06,
+0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8,
+0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22,
+0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2,
+0x22,0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0,0xc5,0xf0,0xf8,0xe5,0x82,0x15,0x82,0x70,
+0x02,0x15,0x83,0xe0,0x38,0xf0,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a,0x83,0xe0,0xf5,
+0xf0,0xa3,0xe0,0x22,0x50,0x06,0x87,0xf0,0x09,0xe7,0x19,0x22,0xbb,0xfe,0x07,0xe3,
+0xf5,0xf0,0x09,0xe3,0x19,0x22,0x89,0x82,0x8a,0x83,0xe4,0x93,0xf5,0xf0,0x74,0x01,
+0x93,0x22,0xbb,0x01,0x10,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,
+0xf5,0xf0,0xa3,0xe0,0x22,0x50,0x09,0xe9,0x25,0x82,0xf8,0x86,0xf0,0x08,0xe6,0x22,
+0xbb,0xfe,0x0a,0xe9,0x25,0x82,0xf8,0xe2,0xf5,0xf0,0x08,0xe2,0x22,0xe5,0x83,0x2a,
+0xf5,0x83,0xe9,0x93,0xf5,0xf0,0xa3,0xe9,0x93,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a,
+0x83,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x06,0xf7,0x09,0xa7,0xf0,0x19,0x22,0xbb,
+0xfe,0x06,0xf3,0xe5,0xf0,0x09,0xf3,0x19,0x22,0xf8,0xbb,0x01,0x11,0xe5,0x82,0x29,
+0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x09,
+0xe9,0x25,0x82,0xc8,0xf6,0x08,0xa6,0xf0,0x22,0xbb,0xfe,0x09,0xe9,0x25,0x82,0xc8,
+0xf2,0xe5,0xf0,0x08,0xf2,0x22,0xef,0x4b,0xff,0xee,0x4a,0xfe,0xed,0x49,0xfd,0xec,
+0x48,0xfc,0x22,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0xa4,
+0x25,0x82,0xf5,0x82,0xe5,0xf0,0x35,0x83,0xf5,0x83,0x22,0xe0,0xfb,0xa3,0xe0,0xfa,
+0xa3,0xe0,0xf9,0x22,0xf8,0xe0,0xfb,0xa3,0xa3,0xe0,0xf9,0x25,0xf0,0xf0,0xe5,0x82,
+0x15,0x82,0x70,0x02,0x15,0x83,0xe0,0xfa,0x38,0xf0,0x22,0xeb,0xf0,0xa3,0xea,0xf0,
+0xa3,0xe9,0xf0,0x22,0xd0,0x83,0xd0,0x82,0xf8,0xe4,0x93,0x70,0x12,0x74,0x01,0x93,
+0x70,0x0d,0xa3,0xa3,0x93,0xf8,0x74,0x01,0x93,0xf5,0x82,0x88,0x83,0xe4,0x73,0x74,
+0x02,0x93,0x68,0x60,0xef,0xa3,0xa3,0xa3,0x80,0xdf,0x02,0x43,0xf8,0x02,0x58,0x80,
+0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0x40,0x03,0xf6,0x80,0x01,0xf2,0x08,0xdf,0xf4,
+0x80,0x29,0xe4,0x93,0xa3,0xf8,0x54,0x07,0x24,0x0c,0xc8,0xc3,0x33,0xc4,0x54,0x0f,
+0x44,0x20,0xc8,0x83,0x40,0x04,0xf4,0x56,0x80,0x01,0x46,0xf6,0xdf,0xe4,0x80,0x0b,
+0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,0x90,0x44,0x3d,0xe4,0x7e,0x01,0x93,0x60,
+0xbc,0xa3,0xff,0x54,0x3f,0x30,0xe5,0x09,0x54,0x1f,0xfe,0xe4,0x93,0xa3,0x60,0x01,
+0x0e,0xcf,0x54,0xc0,0x25,0xe0,0x60,0xa8,0x40,0xb8,0xe4,0x93,0xa3,0xfa,0xe4,0x93,
+0xa3,0xf8,0xe4,0x93,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xf0,0xa3,0xc8,
+0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xdf,0xe9,0xde,0xe7,0x80,0xbe,0x41,0x97,0x24,
+0x00,0x41,0x97,0x67,0x00,0x41,0x97,0x0b,0x80,0x41,0x97,0x0c,0x80,0x41,0x97,0x69,
+0x00,0x00,0xf0,0x90,0x97,0x15,0xe0,0x90,0x97,0x48,0xf0,0xe4,0xfb,0xfd,0x7f,0x54,
+0x7e,0x01,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x97,0x46,0xeb,0xf0,0xa3,0xe0,
+0xfb,0xa3,0xe0,0xf5,0x44,0xe4,0xf5,0x45,0x12,0x35,0xab,0xd0,0xd0,0x92,0xaf,0x22,
+0xe4,0x90,0x97,0x47,0xf0,0x90,0x05,0x58,0xe0,0xff,0x90,0x97,0x42,0xe0,0x2f,0x24,
+0xfe,0x90,0x97,0x48,0xf0,0xe4,0xfb,0xfd,0x7f,0x50,0x7e,0x01,0x91,0x62,0x90,0x01,
+0x53,0x74,0x05,0xf0,0x22,0x90,0x01,0x5f,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x08,0xf0,
+0xe4,0x90,0x97,0x47,0xf0,0x90,0x97,0x13,0xe0,0x90,0x97,0x48,0xf0,0xe4,0xfb,0xfd,
+0x7f,0x5c,0x7e,0x01,0x91,0x62,0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,
+0x02,0xf0,0x90,0x97,0x1a,0x14,0xf0,0x90,0x97,0x1c,0xe0,0x54,0x0f,0xc3,0x94,0x0c,
+0x50,0x10,0x7d,0x01,0x7f,0x0c,0xf1,0xab,0x90,0x97,0x36,0xe0,0x30,0xe0,0x03,0x12,
+0x55,0xce,0x22,0x8f,0x82,0x8e,0x83,0xa3,0xa3,0xa3,0xe4,0xf0,0x22,0x02,0x4d,0xab,
+0x22,0x22,0x22,0x02,0x65,0x46,0x02,0x65,0x4d,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,
+0x8b,0x1b,0x8a,0x1c,0x89,0x1d,0x90,0x97,0x49,0x71,0x8b,0xab,0x1e,0xaa,0x1f,0xa9,
+0x20,0x90,0x97,0x4c,0x71,0x8b,0xaf,0x21,0x15,0x21,0xef,0x60,0x1b,0x90,0x97,0x4c,
+0xe4,0x75,0xf0,0x01,0x71,0x74,0x12,0x29,0xd9,0xff,0x90,0x97,0x49,0xe4,0x75,0xf0,
+0x01,0x71,0x74,0xef,0x51,0x4d,0x80,0xde,0xab,0x1b,0xaa,0x1c,0xa9,0x1d,0xd0,0xd0,
+0x92,0xaf,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,
+0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,
+0x90,0x01,0xc4,0x74,0x53,0xf0,0x74,0x45,0xa3,0xf0,0x53,0x91,0xdf,0x90,0x01,0x3c,
+0xe0,0x55,0x30,0xf5,0x34,0xa3,0xe0,0x55,0x31,0xf5,0x35,0xa3,0xe0,0x55,0x32,0xf5,
+0x36,0xa3,0xe0,0x55,0x33,0xf5,0x37,0xe5,0x34,0x30,0xe0,0x55,0x90,0x01,0x3c,0x74,
+0x01,0xf0,0x90,0x97,0x3c,0xe0,0x30,0xe0,0x21,0x13,0x13,0x54,0x3f,0x30,0xe0,0x1a,
+0x90,0x97,0x3e,0xe4,0xf0,0x90,0x97,0x3d,0xe0,0x64,0x03,0x60,0x0d,0x7f,0x01,0x12,
+0x4c,0x21,0xef,0x70,0x05,0x7f,0x02,0x12,0x4c,0x97,0x90,0x97,0x36,0xe0,0xff,0x30,
+0xe0,0x1f,0x13,0x13,0x54,0x3f,0x30,0xe0,0x18,0x90,0x97,0x38,0xe4,0xf0,0x90,0x97,
+0x37,0xe0,0x64,0x06,0x60,0x0b,0xe4,0xff,0x12,0x4c,0x21,0xef,0x70,0x03,0x12,0x4d,
+0x79,0xe5,0x34,0x30,0xe1,0x09,0x90,0x01,0x3c,0x74,0x02,0xf0,0x12,0x68,0x59,0xe5,
+0x34,0x30,0xe2,0x38,0x90,0x01,0x3c,0x74,0x04,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe0,
+0x24,0x90,0x97,0x47,0xe4,0xf0,0x90,0x97,0x13,0xe0,0x90,0x97,0x48,0xf0,0xe4,0xfb,
+0xfd,0x7f,0x58,0x7e,0x01,0x91,0x62,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92,
+0x74,0x01,0xf0,0x80,0x07,0x90,0x97,0x1b,0xe4,0xf0,0xf1,0x98,0xe5,0x34,0x30,0xe3,
+0x38,0x90,0x01,0x3c,0x74,0x08,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe1,0x24,0x90,0x97,
+0x47,0xe4,0xf0,0x90,0x97,0x13,0xe0,0x90,0x97,0x48,0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,
+0x7e,0x01,0x91,0x62,0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,
+0x80,0x07,0x90,0x97,0x1a,0xe4,0xf0,0xf1,0x98,0xe5,0x34,0x30,0xe4,0x09,0x90,0x01,
+0x3c,0x74,0x10,0xf0,0x12,0x73,0xdc,0xe5,0x35,0x30,0xe0,0x1a,0x90,0x01,0x3d,0x74,
+0x01,0xf0,0x90,0x01,0x2f,0xe0,0x44,0x7f,0xf0,0x90,0x00,0x83,0xe0,0x90,0x97,0x1e,
+0xf0,0x12,0x67,0x55,0xf1,0x98,0xe5,0x36,0x30,0xe1,0x48,0x90,0x01,0x3e,0x74,0x02,
+0xf0,0x90,0x97,0x3c,0xe0,0x30,0xe0,0x1b,0x90,0x97,0x40,0x74,0x01,0xf0,0x90,0x97,
+0x3d,0xe0,0x64,0x03,0x60,0x0d,0x7f,0x01,0x12,0x4c,0x21,0xef,0x70,0x05,0x7f,0x02,
+0x12,0x4c,0x97,0x90,0x97,0x36,0xe0,0x30,0xe0,0x19,0x90,0x97,0x3a,0x74,0x01,0xf0,
+0x90,0x97,0x37,0xe0,0x64,0x06,0x60,0x0b,0xe4,0xff,0x12,0x4c,0x21,0xef,0x70,0x03,
+0x12,0x4d,0x79,0xe5,0x36,0x30,0xe0,0x7a,0x90,0x01,0x3e,0x74,0x01,0xf0,0x90,0x97,
+0x3c,0xe0,0x30,0xe0,0x1a,0x90,0x97,0x40,0xe4,0xf0,0x90,0x97,0x3d,0xe0,0x64,0x03,
+0x60,0x0d,0x7f,0x01,0x12,0x4c,0x21,0xef,0x60,0x05,0x7f,0x01,0x12,0x4c,0x97,0x90,
+0x97,0x36,0xe0,0x30,0xe0,0x4c,0x90,0x97,0x3a,0xe4,0xf0,0xff,0x12,0x4c,0x21,0xef,
+0x60,0x40,0x12,0x57,0x5d,0x90,0x97,0x37,0xe0,0xff,0x64,0x06,0x60,0x34,0xef,0xb4,
+0x04,0x02,0x80,0x07,0x90,0x97,0x37,0xe0,0xb4,0x05,0x04,0xe4,0xff,0x80,0x14,0x90,
+0x97,0x37,0xe0,0xb4,0x03,0x04,0x7f,0x01,0x80,0x09,0x90,0x97,0x37,0xe0,0xb4,0x02,
+0x05,0x7f,0x01,0x12,0x48,0x6f,0x90,0x97,0x1e,0xe0,0xff,0x7d,0x01,0xf1,0xab,0x12,
+0x55,0xce,0x74,0x53,0x04,0x90,0x01,0xc4,0xf0,0x74,0x45,0xa3,0xf0,0xd0,0x07,0xd0,
+0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,
+0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x90,0x97,0x36,0xe0,0x90,0x97,0x1e,0x30,
+0xe0,0x05,0xe0,0xff,0x02,0x79,0xf6,0xe0,0xff,0x7d,0x01,0x8f,0x6e,0x8d,0x6f,0xe5,
+0x6e,0x54,0x0f,0xff,0x90,0x97,0x1c,0xe0,0x54,0x0f,0x6f,0x60,0x71,0xe5,0x6e,0x30,
+0xe2,0x2b,0x90,0x97,0x1c,0xe0,0x20,0xe2,0x05,0x7f,0x01,0x12,0x66,0xde,0x90,0x97,
+0x1c,0xe0,0x30,0xe3,0x07,0xe5,0x6e,0x20,0xe3,0x02,0x80,0x6d,0x90,0x97,0x1c,0xe0,
+0x20,0xe3,0x4b,0xe5,0x6e,0x30,0xe3,0x46,0xaf,0x6f,0x02,0x66,0x7a,0x90,0x97,0x1c,
+0xe0,0x54,0x0f,0xff,0xbf,0x0c,0x0d,0xe5,0x6e,0x20,0xe3,0x08,0x12,0x65,0xbc,0xef,
+0x60,0x2c,0x11,0x49,0x90,0x97,0x1c,0xe0,0x54,0x0f,0xff,0xbf,0x04,0x0e,0xe5,0x6e,
+0x20,0xe2,0x09,0x12,0x57,0xf8,0xef,0x60,0x15,0x12,0x50,0xcd,0x90,0x97,0x1c,0xe0,
+0x54,0x0f,0xff,0xbf,0x02,0x08,0x12,0x66,0x07,0xef,0x60,0x02,0x11,0x2f,0x22,0x90,
+0x97,0x1c,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x01,0xf0,0x12,0x45,0x00,0x12,0x45,0x02,
+0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x02,0xf0,0x22,0x90,0x06,0x04,0xe0,0x44,0x40,0xf0,
+0xe5,0x70,0xb4,0x01,0x05,0x7f,0x01,0x12,0x66,0x99,0x90,0x97,0x1c,0xe0,0x54,0xf0,
+0xf0,0xe0,0x44,0x04,0xf0,0x22,0x11,0x49,0x90,0x97,0x37,0x74,0x01,0xf0,0x22,0x90,
+0x97,0x37,0xe0,0xfe,0x6f,0x70,0x02,0x21,0x69,0xef,0x12,0x43,0x94,0x48,0x96,0x00,
+0x48,0xc0,0x01,0x48,0xf2,0x02,0x48,0xfd,0x03,0x49,0x20,0x04,0x49,0x42,0x05,0x49,
+0x4b,0x06,0x00,0x00,0x49,0x69,0xee,0xb4,0x04,0x04,0x7f,0x01,0x21,0x83,0x90,0x97,
+0x37,0xe0,0xff,0xb4,0x05,0x03,0x02,0x79,0xec,0xef,0xb4,0x06,0x06,0x7f,0x01,0x31,
+0x74,0x80,0x0b,0x90,0x97,0x37,0xe0,0xb4,0x03,0x04,0x7f,0x01,0x31,0x6a,0xa1,0x6e,
+0x90,0x97,0x37,0xe0,0xb4,0x04,0x04,0x7f,0x01,0x31,0x83,0x90,0x97,0x37,0xe0,0x70,
+0x02,0x80,0x93,0x90,0x97,0x37,0xe0,0xfe,0xb4,0x06,0x04,0x7f,0x01,0x21,0x74,0xee,
+0xb4,0x03,0x04,0x7f,0x01,0x21,0x6a,0x90,0x97,0x37,0xe0,0x64,0x02,0x70,0x7a,0x02,
+0x79,0xe1,0x90,0x97,0x37,0xe0,0x64,0x01,0x70,0x6f,0x02,0x79,0xc7,0x90,0x97,0x37,
+0xe0,0xb4,0x04,0x04,0x7f,0x01,0x31,0x83,0x90,0x97,0x37,0xe0,0x70,0x04,0x11,0x66,
+0x80,0x0b,0x90,0x97,0x37,0xe0,0xb4,0x06,0x04,0xe4,0xff,0x31,0x74,0x02,0x57,0xe1,
+0x90,0x97,0x37,0xe0,0xfe,0xb4,0x06,0x06,0xe4,0xff,0x31,0x74,0x80,0x08,0xee,0xb4,
+0x03,0x04,0x7f,0x01,0x31,0x6a,0x90,0x97,0x37,0xe0,0xb4,0x01,0x02,0xb1,0x6e,0x02,
+0x79,0x9a,0x90,0x97,0x37,0xe0,0x70,0x21,0x02,0x79,0xba,0x90,0x97,0x37,0xe0,0xff,
+0x64,0x04,0x60,0x15,0xef,0x70,0x04,0x11,0x66,0x80,0x0b,0x90,0x97,0x37,0xe0,0xb4,
+0x03,0x04,0xe4,0xff,0x31,0x6a,0x12,0x79,0xd4,0x22,0x12,0x66,0xde,0x90,0x97,0x37,
+0x74,0x01,0xf0,0x22,0xef,0x60,0x05,0x90,0x05,0x22,0xe4,0xf0,0x90,0x97,0x37,0x74,
+0x01,0xf0,0x22,0x90,0x97,0x6c,0xef,0xf0,0xb1,0xc1,0x90,0x97,0x6c,0xe0,0x60,0x05,
+0x90,0x05,0x22,0xe4,0xf0,0xe4,0x90,0x97,0x37,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,
+0xc0,0xd0,0x90,0x96,0xfd,0x12,0x43,0x8b,0xe4,0x90,0x97,0x00,0xf0,0x12,0x29,0xd9,
+0xc3,0x13,0x20,0xe0,0x02,0x41,0xe4,0x90,0x96,0xfd,0x12,0x43,0x6b,0x12,0x29,0xd9,
+0xff,0x54,0x02,0xfe,0x90,0x97,0x3c,0xe0,0x54,0xfd,0x4e,0xfe,0xf0,0xef,0x54,0x01,
+0xff,0xee,0x54,0xfe,0x4f,0xff,0xf0,0x12,0x29,0xd9,0xfe,0x54,0x08,0xfd,0xef,0x54,
+0xf7,0x4d,0xff,0x90,0x97,0x3c,0xf0,0xee,0x54,0x10,0xfe,0xef,0x54,0xef,0x4e,0xff,
+0xf0,0x12,0x29,0xd9,0xfe,0x54,0x20,0xfd,0xef,0x54,0xdf,0x4d,0xff,0x90,0x97,0x3c,
+0xf0,0xee,0x54,0x40,0xfe,0xef,0x54,0xbf,0x4e,0xf0,0x20,0xe0,0x02,0x41,0xd4,0x90,
+0x97,0x00,0x74,0x21,0xf0,0x90,0x96,0xfd,0x12,0x43,0x6b,0x12,0x29,0xd9,0xff,0x13,
+0x13,0x54,0x01,0xfe,0x90,0x97,0x3c,0xe0,0xfd,0x13,0x13,0x54,0x01,0x6e,0x60,0x2a,
+0xef,0x54,0x04,0xff,0xed,0x54,0xfb,0x4f,0xf0,0xe0,0x13,0x13,0x54,0x3f,0x30,0xe0,
+0x0e,0x90,0x01,0x34,0x74,0x40,0xf0,0xfd,0xe4,0xff,0x12,0x36,0xe6,0x80,0x0b,0xe4,
+0x90,0x97,0x3e,0xf0,0x7d,0x40,0xff,0x12,0x36,0x75,0x90,0x97,0x3c,0xe0,0xfd,0x13,
+0x13,0x13,0x54,0x1f,0x30,0xe0,0x07,0x90,0x97,0x00,0xe0,0x44,0x12,0xf0,0xed,0xc4,
+0x54,0x0f,0x30,0xe0,0x07,0x90,0x97,0x00,0xe0,0x44,0x14,0xf0,0x90,0x97,0x3c,0xe0,
+0xc4,0x13,0x54,0x07,0x30,0xe0,0x07,0x90,0x97,0x00,0xe0,0x44,0x80,0xf0,0x90,0x97,
+0x3c,0xe0,0xc4,0x13,0x13,0x54,0x03,0x20,0xe0,0x07,0x90,0x97,0x00,0xe0,0x44,0x40,
+0xf0,0x90,0x97,0x00,0xe0,0x90,0x05,0x27,0xf0,0x90,0x97,0x3d,0xe0,0x70,0x04,0x7f,
+0x01,0x91,0x97,0x90,0x97,0x3c,0xe0,0xc4,0x13,0x13,0x54,0x03,0x30,0xe0,0x04,0x7f,
+0x03,0x80,0x0d,0x7f,0x01,0x91,0x21,0xef,0x60,0x04,0x7f,0x01,0x80,0x02,0x7f,0x02,
+0x91,0x97,0x81,0x1c,0x90,0x97,0x00,0x74,0x01,0xf0,0x90,0x05,0x27,0xf0,0xe4,0xff,
+0x91,0x97,0x81,0x19,0x90,0x96,0xfd,0x12,0x43,0x6b,0x12,0x29,0xd9,0xff,0x54,0x02,
+0xfe,0x90,0x97,0x36,0xe0,0x54,0xfd,0x4e,0xfe,0xf0,0xef,0x54,0x01,0xff,0xee,0x54,
+0xfe,0x4f,0xff,0xf0,0x12,0x29,0xd9,0xfe,0x54,0x08,0xfd,0xef,0x54,0xf7,0x4d,0xff,
+0x90,0x97,0x36,0xf0,0xee,0x54,0x10,0xfe,0xef,0x54,0xef,0x4e,0xff,0xf0,0x12,0x29,
+0xd9,0xfe,0x54,0x40,0xfd,0xef,0x54,0xbf,0x4d,0x90,0x97,0x36,0xf0,0x20,0xe0,0x02,
+0x61,0xec,0x90,0x97,0x00,0x74,0x31,0xf0,0xee,0x13,0x13,0x54,0x01,0xff,0x90,0x97,
+0x36,0xe0,0xfe,0x13,0x13,0x54,0x01,0x6f,0x60,0x27,0x90,0x96,0xfd,0x12,0x43,0x6b,
+0x12,0x29,0xd9,0x54,0x04,0xff,0xee,0x54,0xfb,0x4f,0x90,0x97,0x36,0xf0,0xe0,0x13,
+0x13,0x54,0x3f,0x20,0xe0,0x0b,0xe4,0x90,0x97,0x38,0xf0,0x7d,0x40,0xff,0x12,0x36,
+0x75,0x90,0x97,0x36,0xe0,0xfd,0x13,0x13,0x13,0x54,0x1f,0x30,0xe0,0x07,0x90,0x97,
+0x00,0xe0,0x44,0x02,0xf0,0xed,0xc4,0x54,0x0f,0x30,0xe0,0x07,0x90,0x97,0x00,0xe0,
+0x44,0x04,0xf0,0x90,0x97,0x00,0xe0,0x54,0x06,0x60,0x0c,0x90,0x01,0x3e,0x74,0x03,
+0xf0,0xfd,0x7f,0x02,0x12,0x37,0x00,0x90,0x97,0x00,0xe0,0x90,0x05,0x27,0xf0,0x90,
+0x97,0x36,0xe0,0xff,0xc4,0x13,0x13,0x54,0x03,0x30,0xe0,0x0c,0xa3,0xe0,0x64,0x06,
+0x60,0x5a,0x7f,0x06,0x11,0x6f,0x80,0x54,0x90,0x97,0x37,0xe0,0x64,0x06,0x70,0x17,
+0x7f,0x01,0x11,0x6f,0xe4,0xff,0x91,0x21,0xef,0x60,0x08,0x90,0x97,0x1e,0x12,0x47,
+0xa7,0x80,0x04,0xb1,0x79,0x80,0x35,0x12,0x55,0xce,0x80,0x30,0x90,0x97,0x00,0x74,
+0x01,0xf0,0x90,0x05,0x27,0xf0,0x7d,0x03,0x7f,0x02,0x12,0x36,0x92,0x90,0x97,0x37,
+0xe0,0xb4,0x06,0x04,0x7f,0x01,0x80,0x09,0x90,0x97,0x37,0xe0,0xb4,0x04,0x04,0xe4,
+0xff,0x11,0x6f,0x12,0x55,0xc0,0x12,0x47,0x98,0x12,0x77,0xfe,0xd0,0xd0,0x92,0xaf,
+0x22,0xef,0x64,0x01,0x70,0x3d,0x90,0x97,0x3f,0xe0,0x60,0x03,0x7f,0x00,0x22,0x90,
+0x97,0x34,0xe0,0x60,0x03,0x7f,0x01,0x22,0x90,0x97,0x3e,0xe0,0x60,0x03,0x7f,0x01,
+0x22,0x90,0x97,0x3c,0xe0,0xff,0x13,0x13,0x54,0x3f,0x30,0xe0,0x0b,0xef,0xc4,0x13,
+0x54,0x07,0x30,0xe0,0x03,0x7f,0x00,0x22,0x90,0x97,0x40,0xe0,0x7f,0x01,0x60,0x36,
+0x7f,0x00,0x22,0x90,0x97,0x39,0xe0,0x60,0x03,0x7f,0x00,0x22,0x90,0x97,0x34,0xe0,
+0x60,0x03,0x7f,0x01,0x22,0x90,0x97,0x38,0xe0,0x60,0x03,0x7f,0x01,0x22,0x90,0x97,
+0x36,0xe0,0x13,0x13,0x54,0x3f,0x30,0xe0,0x03,0x7f,0x00,0x22,0x90,0x97,0x3a,0xe0,
+0x7f,0x01,0x60,0x02,0x7f,0x00,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x97,
+0x3d,0xe0,0x90,0x97,0x6b,0xf0,0x6f,0x70,0x02,0xa1,0x69,0xef,0x14,0x60,0x3d,0x14,
+0x60,0x62,0x14,0x70,0x02,0xa1,0x43,0x24,0x03,0x60,0x02,0xa1,0x69,0x90,0x97,0x6b,
+0xe0,0xb4,0x03,0x04,0xf1,0xd1,0xa1,0x69,0x90,0x97,0x6b,0xe0,0xb4,0x02,0x04,0xf1,
+0xbe,0xa1,0x69,0x90,0x97,0x6b,0xe0,0xb4,0x04,0x04,0xf1,0xd5,0xa1,0x69,0x90,0x97,
+0x6b,0xe0,0x64,0x01,0x60,0x02,0xa1,0x69,0xf1,0xc0,0x80,0x7d,0x90,0x97,0x6b,0xe0,
+0xff,0xb4,0x03,0x04,0xf1,0xd9,0x80,0x71,0xef,0xb4,0x02,0x04,0xf1,0xb1,0x80,0x69,
+0x90,0x97,0x6b,0xe0,0xff,0xb4,0x04,0x04,0xf1,0xe4,0x80,0x5d,0xef,0x70,0x5a,0x12,
+0x78,0x46,0x80,0x55,0x90,0x97,0x6b,0xe0,0xb4,0x03,0x05,0x12,0x79,0x88,0x80,0x49,
+0x90,0x97,0x6b,0xe0,0xb4,0x01,0x05,0x12,0x78,0x2e,0x80,0x3d,0x90,0x97,0x6b,0xe0,
+0xb4,0x04,0x05,0x12,0x79,0x91,0x80,0x31,0x90,0x97,0x6b,0xe0,0x70,0x2b,0x12,0x78,
+0x42,0x80,0x26,0x90,0x97,0x6b,0xe0,0xff,0xb4,0x01,0x04,0xb1,0xab,0x80,0x1a,0xef,
+0xb4,0x02,0x04,0xb1,0xbd,0x80,0x12,0x90,0x97,0x6b,0xe0,0xff,0xb4,0x04,0x05,0x12,
+0x44,0xfd,0x80,0x05,0xef,0x70,0x02,0xb1,0xb8,0xd0,0xd0,0x92,0xaf,0x22,0x7f,0x01,
+0x12,0x66,0x7a,0xe4,0x90,0x97,0x37,0xf0,0x22,0x90,0x97,0x10,0xe0,0x60,0x16,0x90,
+0x97,0x37,0xe0,0x70,0x04,0x7f,0x05,0x80,0x1f,0x90,0x97,0x37,0xe0,0x64,0x01,0x70,
+0x19,0x7f,0x02,0x80,0x13,0x90,0x97,0x37,0xe0,0xb4,0x01,0x04,0x7f,0x03,0x80,0x08,
+0x90,0x97,0x37,0xe0,0x70,0x04,0x7f,0x04,0x11,0x6f,0x22,0x90,0x05,0x22,0x74,0x6f,
+0xf0,0x90,0x97,0x3d,0x74,0x03,0xf0,0x22,0x12,0x78,0x46,0x80,0xee,0xb1,0xc1,0x80,
+0xea,0x90,0x00,0x11,0xe0,0x44,0x09,0xf0,0xd1,0x47,0x90,0x96,0xdd,0x12,0x43,0x53,
+0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x96,0xe1,
+0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,
+0x90,0x96,0xe5,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,
+0x12,0x2f,0xd9,0x90,0x96,0xe9,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,
+0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x03,0x2d,0x95,
+0xe4,0xfd,0xff,0x12,0x34,0x81,0x90,0x97,0x35,0xe0,0xb4,0x01,0x11,0x90,0x80,0x59,
+0x12,0x2a,0x8b,0x00,0x03,0x2d,0x95,0xe4,0xfd,0x7f,0x01,0x12,0x34,0x81,0x22,0xf4,
+0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x7f,0x10,
+0xdf,0xfe,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x97,
+0x66,0xed,0xf0,0x90,0x97,0x65,0xef,0xf0,0xd3,0x94,0x07,0x50,0x63,0xe0,0xff,0x74,
+0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0,
+0x5f,0xf0,0xd1,0x47,0x90,0x97,0x65,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,
+0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x46,0xe0,0x4f,0xf0,0xd1,0x47,0x90,0x97,0x66,
+0xe0,0x60,0x16,0x90,0x97,0x65,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,
+0x33,0xd8,0xfc,0xff,0x90,0x00,0x45,0x80,0x66,0x90,0x97,0x65,0xe0,0xff,0x74,0x01,
+0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x45,0x80,0x6b,
+0x90,0x97,0x65,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,
+0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xd1,0x3f,0x90,0x97,0x65,0xe0,0xff,0x74,0x01,
+0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x43,0xe0,0x4f,0xf0,
+0xd1,0x47,0x90,0x97,0x66,0xe0,0x60,0x1b,0x90,0x97,0x65,0xe0,0xff,0x74,0x01,0xa8,
+0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,0x42,0xe0,
+0x4f,0x80,0x1a,0x90,0x97,0x65,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,
+0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x42,0xe0,0x5f,0xf0,0xd1,0x47,
+0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x8f,0x82,0x75,0x83,
+0x00,0xed,0xf0,0xd1,0x47,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x01,0x3c,0x74,0xff,0xf0,
+0xa3,0xf0,0xa3,0xf0,0x90,0x01,0x34,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,
+0x54,0xf1,0x45,0x7d,0xff,0x7f,0x55,0xf1,0x45,0x7d,0xff,0x7f,0x56,0xf1,0x45,0x7d,
+0xff,0x7f,0x57,0x80,0xc0,0x90,0x01,0x30,0xe4,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,
+0x90,0x01,0x38,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,0x50,0xf1,0x45,0xe4,
+0xfd,0x7f,0x51,0xf1,0x45,0xe4,0xfd,0x7f,0x52,0xf1,0x45,0xe4,0xfd,0x7f,0x53,0x80,
+0x94,0xb1,0xc1,0x90,0x05,0x22,0xe4,0xf0,0x90,0x97,0x3d,0x04,0xf0,0x22,0xf1,0xb1,
+0x7d,0x03,0x7f,0x02,0x12,0x36,0x92,0x90,0x05,0x27,0xe4,0xf0,0x90,0x97,0x3d,0xf0,
+0x22,0xf1,0xd9,0x80,0xeb,0xf1,0xe4,0x80,0xe7,0x90,0x05,0x22,0xe4,0xf0,0x90,0x97,
+0x3d,0x04,0xf0,0x22,0x90,0x05,0x22,0xe4,0xf0,0x90,0x97,0x3d,0x04,0xf0,0x22,0xd3,
+0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x04,0x1d,0xe0,0x60,0x1a,0x90,0x05,0x22,0xe0,
+0x54,0x90,0x60,0x07,0x90,0x01,0xc6,0xe0,0x44,0x40,0xf0,0x90,0x01,0xc7,0xe0,0x30,
+0xe1,0xe4,0x7f,0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0xe0,0xff,0x7d,
+0x01,0x90,0x97,0x55,0xef,0xf0,0xa3,0xed,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xe5,0x71,
+0x60,0x04,0xe4,0xff,0x11,0xb2,0x90,0x97,0x55,0xe0,0x30,0xe0,0x09,0x90,0x97,0x57,
+0xe4,0xf0,0xa3,0x74,0x80,0xf0,0x90,0x97,0x55,0xe0,0xff,0xc3,0x13,0x90,0xfd,0x10,
+0xf0,0x90,0x04,0x25,0xef,0xf0,0x90,0x97,0x56,0xe0,0x60,0x1f,0xa3,0xa3,0xe0,0xff,
+0x24,0x0f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x74,0x10,0x2f,
+0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x90,0x97,0x57,0xa3,0xe0,
+0xff,0xfd,0x24,0x08,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe4,0xf0,0x74,0x09,0x2d,
+0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0x21,0x2f,0xf5,0x82,
+0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf7,0xf0,0x90,0x97,0x57,0xe0,0xfe,0xa3,0xe0,
+0xff,0x22,0xef,0x60,0x0b,0x90,0x97,0x35,0xe0,0xb4,0x01,0x10,0xe4,0xff,0x80,0x09,
+0x90,0x97,0x35,0xe0,0xb4,0x01,0x05,0x7f,0x01,0x12,0x7a,0x6f,0x22,0x90,0x01,0x37,
+0x74,0x02,0xf0,0x12,0x78,0x68,0xef,0x70,0x06,0x90,0x01,0xc8,0x74,0xfd,0xf0,0x7d,
+0x02,0x7f,0x03,0x12,0x36,0xe6,0xe5,0x71,0x60,0x04,0x7f,0x01,0x11,0xb2,0x12,0x78,
+0xb5,0x90,0x97,0x1c,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x02,0xf0,0x22,0x7d,0x02,0x7f,
+0x03,0x12,0x36,0x75,0xe5,0x71,0x14,0x24,0xfd,0x50,0x02,0x80,0x22,0x90,0x97,0x1f,
+0xe0,0x60,0x06,0x7d,0x01,0x7f,0x0c,0x80,0x0f,0x90,0x97,0x1c,0xe0,0x54,0x0f,0xc3,
+0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0xab,0xe4,0xff,0x11,0xb2,0x22,
+0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,
+0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,
+0x74,0x30,0xf0,0x74,0x51,0xa3,0xf0,0x90,0x01,0x34,0xe0,0x55,0x28,0xf5,0x2c,0x90,
+0x01,0x36,0xe0,0x55,0x2a,0xf5,0x2e,0xa3,0xe0,0x55,0x2b,0xf5,0x2f,0xe5,0x2c,0x20,
+0xe0,0x02,0x41,0xce,0x90,0x01,0x34,0x74,0x01,0xf0,0x85,0xd1,0x08,0x85,0xd2,0x09,
+0x85,0xd3,0x0a,0x85,0xd4,0x0b,0x85,0xd5,0x0c,0x85,0xd6,0x0d,0x85,0xd7,0x0e,0x85,
+0xd9,0x0f,0xe5,0x0f,0x54,0x40,0xc3,0x13,0xff,0xe5,0x0e,0x54,0x20,0x6f,0x70,0x02,
+0x41,0x80,0xe5,0x0f,0x30,0xe5,0x02,0x41,0x80,0xe5,0x0d,0x54,0x1f,0xf5,0x4d,0xe5,
+0x08,0x54,0x3f,0xf5,0x4e,0xe5,0x0c,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0xe3,
+0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0e,0x54,
+0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0xc0,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xe4,
+0x8f,0xf0,0x12,0x42,0x81,0xe5,0x4e,0xd3,0x94,0x04,0x40,0x03,0x75,0x4e,0x04,0x75,
+0xf0,0x0a,0xe5,0x4d,0x90,0x90,0x00,0x12,0x43,0x5f,0x75,0xf0,0x02,0xe5,0x4e,0x12,
+0x43,0x5f,0xe0,0xfe,0xa3,0xe0,0xff,0xe5,0x0e,0x54,0x1f,0x2f,0xff,0xe4,0x3e,0xfe,
+0x75,0xf0,0x0a,0xe5,0x4d,0x90,0x90,0x00,0x12,0x43,0x5f,0x75,0xf0,0x02,0xe5,0x4e,
+0x12,0x43,0x5f,0xee,0xf0,0xa3,0xef,0xf0,0xe5,0x0f,0x20,0xe6,0x24,0xe5,0x0e,0x54,
+0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0x63,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,
+0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0a,0x30,0xe7,0x36,0xaf,0x4d,0x12,0x60,0xbb,0x80,
+0x2f,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0xa3,0xf5,0x82,0xe4,0x34,
+0x94,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0a,0x30,0xe7,0x12,0xe5,0x0a,
+0x54,0x7f,0xfd,0xe5,0x0e,0x54,0x1f,0xf5,0x53,0xab,0x4e,0xaf,0x4d,0x12,0x60,0x77,
+0xe5,0x71,0x14,0x24,0xfd,0x50,0x02,0x80,0x45,0x90,0x97,0x1f,0xe0,0x60,0x37,0x90,
+0x01,0x5b,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x04,0xf0,0xb1,0xb1,0xef,0x64,0x01,0x70,
+0x2d,0x90,0x97,0x13,0xe0,0xf5,0x44,0x75,0x45,0x00,0xe4,0xfb,0xfd,0x7f,0x58,0x7e,
+0x01,0x12,0x35,0xab,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,
+0x90,0x97,0x1b,0xf0,0x80,0x08,0xb1,0xb1,0xbf,0x01,0x03,0x12,0x47,0x98,0xe5,0x2c,
+0x30,0xe1,0x06,0x90,0x01,0x34,0x74,0x02,0xf0,0xe5,0x2c,0x30,0xe3,0x06,0x90,0x01,
+0x34,0x74,0x08,0xf0,0xe5,0x2c,0x30,0xe4,0x09,0x90,0x01,0x34,0x74,0x10,0xf0,0x43,
+0x12,0x10,0xe5,0x2c,0x30,0xe5,0x26,0x90,0x01,0xcf,0xe0,0x30,0xe5,0x1f,0xe0,0x54,
+0xdf,0xf0,0x90,0x01,0x34,0x74,0x20,0xf0,0x75,0xa8,0x00,0x75,0xe8,0x00,0x12,0x4f,
+0x85,0x90,0x00,0x03,0xe0,0x54,0xfb,0xf0,0x12,0x4e,0x47,0x80,0xfe,0xe5,0x2c,0x30,
+0xe6,0x06,0x90,0x01,0x34,0x74,0x40,0xf0,0xe5,0x2e,0x30,0xe1,0x5f,0x90,0x01,0x36,
+0x74,0x02,0xf0,0x43,0x12,0x40,0x90,0x01,0x02,0xe0,0x54,0x03,0x64,0x01,0x70,0x28,
+0x90,0x01,0x37,0xe0,0x30,0xe0,0x0a,0x74,0x01,0xf0,0x90,0x97,0x24,0xe4,0xf0,0x80,
+0x17,0x90,0x97,0x24,0xe0,0x04,0xf0,0xe0,0xc3,0x94,0x0a,0x40,0x0b,0xe4,0xf0,0x90,
+0x04,0x19,0xe0,0x30,0xe0,0x02,0xf1,0x31,0x90,0x97,0x41,0xe0,0xb4,0x01,0x09,0x90,
+0x05,0x22,0xe4,0xf0,0x90,0x97,0x41,0xf0,0x90,0x97,0x36,0xe0,0x30,0xe0,0x0d,0xe4,
+0xff,0x12,0x4c,0x21,0xef,0x60,0x05,0x90,0x05,0x22,0xe4,0xf0,0xe5,0x2e,0x20,0xe0,
+0x02,0x81,0x2f,0x90,0x97,0x34,0x74,0x01,0xf0,0x90,0x01,0x36,0xf0,0x90,0x97,0x3c,
+0xe0,0x30,0xe0,0x30,0x90,0x97,0x41,0x74,0x01,0xf0,0x90,0x97,0x3c,0xe0,0xff,0x13,
+0x13,0x54,0x3f,0x30,0xe0,0x1e,0x90,0x97,0x3e,0x74,0x01,0xf0,0x12,0x44,0x80,0x90,
+0x97,0x3d,0xe0,0x64,0x03,0x60,0x0d,0x7f,0x01,0x12,0x4c,0x21,0xef,0x60,0x05,0x7f,
+0x04,0x12,0x4c,0x97,0x90,0x97,0x36,0xe0,0xff,0x30,0xe0,0x4b,0x13,0x13,0x54,0x3f,
+0x30,0xe0,0x44,0x90,0x97,0x38,0x74,0x01,0xf0,0x12,0x44,0x80,0xe4,0xff,0x12,0x4c,
+0x21,0xef,0x60,0x33,0xf1,0x5d,0x90,0x97,0x37,0xe0,0xff,0x64,0x06,0x60,0x28,0xef,
+0xb4,0x04,0x07,0xe4,0xff,0x12,0x48,0x6f,0x80,0x11,0x90,0x97,0x37,0xe0,0xb4,0x03,
+0x16,0xf1,0xf8,0xef,0x70,0x05,0x7f,0x01,0x12,0x48,0x6f,0x90,0x97,0x1e,0xe0,0xff,
+0x7d,0x01,0x12,0x47,0xab,0xb1,0xce,0x12,0x67,0xb2,0x90,0x97,0x34,0xe4,0xf0,0xe5,
+0x2e,0x20,0xe2,0x02,0x81,0xba,0x90,0x01,0x36,0x74,0x04,0xf0,0x90,0x01,0xbd,0xe0,
+0x04,0xf0,0x90,0x97,0x36,0xe0,0x30,0xe0,0x06,0xa3,0xe0,0x64,0x06,0x60,0x6b,0xe5,
+0x70,0x64,0x01,0x70,0x65,0xe5,0x71,0x60,0x61,0xe5,0x71,0x64,0x02,0x60,0x06,0xe5,
+0x71,0x64,0x05,0x70,0x27,0x90,0x06,0xab,0xe0,0x90,0x97,0x0e,0xf0,0x90,0x06,0xaa,
+0xe0,0x90,0x97,0x1d,0xf0,0x90,0x97,0x0e,0xe0,0x70,0x07,0x90,0x97,0x1d,0xe0,0xff,
+0x80,0x05,0x90,0x97,0x0e,0xe0,0xff,0x90,0x97,0x0e,0xef,0xf0,0x90,0x97,0x10,0xe0,
+0x60,0x03,0xe0,0x14,0xf0,0x90,0x97,0x0f,0xe4,0xf0,0x90,0x01,0x57,0xf0,0x90,0x01,
+0x3c,0x74,0x02,0xf0,0x90,0x97,0x21,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0xef,0xf0,0xe5,
+0x71,0x14,0x24,0xfd,0x50,0x02,0x80,0x02,0xf1,0x80,0xe5,0x2e,0x30,0xe3,0x28,0x90,
+0x01,0x36,0x74,0x08,0xf0,0xe5,0x70,0x64,0x01,0x70,0x1c,0xe5,0x71,0x60,0x18,0x90,
+0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x97,0x47,0xe4,0x12,0x44,
+0x52,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x2e,0x30,0xe4,0x2f,0x90,0x01,0x36,0x74,
+0x10,0xf0,0xe5,0x70,0x64,0x01,0x70,0x23,0xe5,0x71,0x60,0x1f,0x90,0x01,0x57,0xe4,
+0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x97,0x20,0xe4,0xf0,0x90,0x97,0x21,0xe0,
+0x54,0xfd,0xf0,0xe0,0x54,0x07,0x70,0x03,0x12,0x47,0x98,0xe5,0x2e,0x30,0xe5,0x1e,
+0x90,0x01,0x36,0x74,0x20,0xf0,0xe5,0x70,0xb4,0x01,0x13,0xe5,0x71,0x60,0x0f,0x90,
+0x97,0x1f,0xe0,0x64,0x02,0x60,0x04,0xf1,0x47,0x80,0x03,0x12,0x44,0xa5,0xe5,0x2e,
+0x30,0xe6,0x1e,0x90,0x01,0x36,0x74,0x40,0xf0,0xe5,0x70,0xb4,0x01,0x13,0xe5,0x71,
+0x60,0x0f,0x90,0x97,0x21,0xe0,0x54,0xfe,0xf0,0xe0,0x54,0x07,0x70,0x03,0x12,0x47,
+0x98,0xe5,0x2f,0x30,0xe1,0x25,0x90,0x01,0x37,0x74,0x02,0xf0,0x90,0x97,0x36,0xe0,
+0x30,0xe0,0x16,0xe4,0xff,0x12,0x4c,0x21,0xef,0x60,0x06,0x11,0xfd,0xb1,0xce,0x80,
+0x0a,0x90,0x97,0x3b,0x74,0x01,0xf0,0x80,0x02,0x11,0xfd,0x74,0x30,0x04,0x90,0x01,
+0xc4,0xf0,0x74,0x51,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,
+0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,
+0x32,0x90,0x04,0x1b,0xe0,0x54,0x7f,0x64,0x7f,0x7f,0x01,0x60,0x02,0x7f,0x00,0x22,
+0x90,0x97,0x3b,0xe0,0xb4,0x01,0x06,0xe4,0xf0,0x11,0xfd,0xb1,0xce,0x22,0x90,0x97,
+0x37,0xe0,0x64,0x06,0x60,0x2f,0x90,0x97,0x1c,0xe0,0x54,0x0f,0x14,0x60,0x1f,0x14,
+0x60,0x15,0x24,0xfe,0x60,0x0a,0x24,0xf8,0x70,0x1b,0xe4,0x90,0x97,0x37,0xf0,0x22,
+0x90,0x97,0x37,0x74,0x01,0xf0,0x22,0x90,0x97,0x37,0x74,0x03,0xf0,0x22,0x90,0x01,
+0xc6,0xe0,0x44,0x08,0xf0,0x22,0xef,0x64,0x01,0x70,0x3c,0x7d,0x7c,0x7f,0x02,0x12,
+0x36,0x75,0x7d,0x02,0x7f,0x03,0x12,0x36,0x75,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,
+0x3c,0x74,0x02,0xf0,0x7d,0x01,0x7f,0x0c,0x12,0x47,0xab,0x90,0x97,0x36,0xe0,0x30,
+0xe0,0x02,0xb1,0xce,0xe4,0xff,0x11,0xb2,0x90,0x06,0x04,0xe0,0x54,0x7f,0xf0,0x90,
+0x06,0x0a,0xe0,0x54,0xf8,0xf0,0x22,0x90,0x01,0x36,0x74,0x7c,0xf0,0xa3,0x74,0x02,
+0xf0,0x7d,0x7c,0xff,0x12,0x36,0xe6,0x7d,0x02,0x7f,0x03,0x12,0x36,0xe6,0x90,0x06,
+0x04,0xe0,0x44,0x80,0xf0,0x90,0x06,0x0a,0xe0,0x44,0x07,0xf0,0x90,0x97,0x16,0xe0,
+0xa3,0xe0,0x90,0x05,0x58,0xf0,0xe5,0x70,0x30,0xe0,0x24,0x90,0x97,0x10,0xe0,0x70,
+0x23,0xe0,0x04,0xf0,0x90,0x97,0x1c,0xe0,0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,
+0x01,0x7f,0x04,0x12,0x47,0xab,0x90,0x97,0x36,0xe0,0x30,0xe0,0x07,0xa1,0xce,0xe4,
+0x90,0x97,0x10,0xf0,0x22,0x8b,0x56,0x8a,0x57,0x89,0x58,0xf1,0xea,0xab,0x56,0xaa,
+0x57,0xa9,0x58,0x12,0x29,0xd9,0xf5,0x71,0x14,0x60,0x0e,0x14,0x60,0x1e,0x14,0x60,
+0x2f,0x24,0x03,0x70,0x40,0x7f,0x01,0x80,0x3a,0xab,0x56,0xaa,0x57,0xa9,0x58,0x90,
+0x00,0x02,0x12,0x42,0x20,0xfd,0xe4,0xff,0xf1,0x06,0x80,0x27,0xab,0x56,0xaa,0x57,
+0xa9,0x58,0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0x7f,0x01,0xf1,0x06,0x1f,0x80,0x13,
+0xab,0x56,0xaa,0x57,0xa9,0x58,0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0x7f,0x02,0xf1,
+0x06,0xe4,0xff,0xd1,0x06,0x22,0xef,0x24,0xfe,0x60,0x0b,0x04,0x70,0x22,0x90,0x97,
+0x1d,0x74,0x01,0xf0,0x80,0x16,0xed,0x70,0x0a,0x90,0x97,0x19,0xe0,0x90,0x97,0x1d,
+0xf0,0x80,0x05,0x90,0x97,0x1d,0xed,0xf0,0x90,0x97,0x1d,0xe0,0x90,0x97,0x0e,0xf0,
+0x22,0x12,0x4f,0xef,0xbf,0x01,0x0f,0x90,0x02,0x09,0xe0,0xff,0x7d,0x01,0x11,0x21,
+0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x12,0x4f,0xef,0xbf,0x01,0x0f,0x90,0x97,0x26,
+0xe0,0xff,0xe4,0xfd,0x11,0x21,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x90,0x97,0x36,
+0xe0,0xff,0xc4,0x13,0x13,0x54,0x03,0x30,0xe0,0x0b,0xa3,0xe0,0x64,0x06,0x60,0x05,
+0x7f,0x06,0x12,0x48,0x6f,0x90,0x97,0x37,0xe0,0x64,0x06,0x60,0x02,0xb1,0xc0,0x22,
+0x90,0x06,0xa9,0xe0,0xf5,0x50,0x54,0xc0,0x70,0x0e,0x90,0x97,0x21,0xe0,0x54,0xfe,
+0xf0,0xe0,0x54,0xfd,0xf0,0x12,0x47,0x98,0xe5,0x50,0x30,0xe6,0x18,0x90,0x97,0x21,
+0xe0,0x44,0x01,0xf0,0x90,0x97,0x1f,0xe0,0x64,0x02,0x60,0x04,0xf1,0x47,0x80,0x0c,
+0x12,0x44,0xa5,0x80,0x07,0x90,0x97,0x21,0xe0,0x54,0xfe,0xf0,0xe5,0x50,0x90,0x97,
+0x21,0x30,0xe7,0x18,0xe0,0x44,0x02,0xf0,0xe4,0x90,0x97,0x47,0x12,0x44,0x52,0x90,
+0x01,0x57,0x74,0x05,0xf0,0x90,0x97,0x20,0x74,0x01,0xf0,0x22,0xe0,0x54,0xfd,0xf0,
+0x22,0x11,0xcd,0x90,0x97,0x37,0x74,0x03,0xf0,0x22,0xe4,0x90,0x97,0x20,0xf0,0x90,
+0x97,0x0f,0xf0,0x90,0x97,0x21,0xf0,0x22,0xb1,0xb1,0xef,0x64,0x01,0x60,0x08,0x90,
+0x01,0xb9,0x74,0x01,0xf0,0x80,0x52,0x90,0x97,0x21,0xe0,0x54,0x03,0x60,0x08,0x90,
+0x01,0xb9,0x74,0x02,0xf0,0x80,0x42,0x90,0x97,0x1e,0xe0,0x54,0x0f,0xd3,0x94,0x02,
+0x40,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x2f,0x90,0x97,0x21,0xe0,0x30,0xe2,
+0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x20,0x90,0x97,0x21,0xe0,0x30,0xe4,0x08,
+0x90,0x01,0xb9,0x74,0x10,0xf0,0x80,0x11,0x90,0x97,0x10,0xe0,0x60,0x08,0x90,0x01,
+0xb9,0x74,0x20,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74,0x04,0xf0,0x7f,
+0x00,0x22,0x75,0x28,0x33,0xe4,0xf5,0x29,0x75,0x2a,0x03,0xf5,0x2b,0x90,0x01,0x30,
+0xe5,0x28,0xf0,0xa3,0xe5,0x29,0xf0,0xa3,0xe5,0x2a,0xf0,0xa3,0xe5,0x2b,0xf0,0x22,
+0xe4,0x90,0x96,0xef,0xf0,0xa3,0xf0,0x75,0x8e,0x02,0x12,0x77,0xe9,0x12,0x64,0xa9,
+0x12,0x64,0xbc,0xe4,0xf5,0x12,0x12,0x6e,0xaf,0x12,0x7a,0x66,0x12,0x65,0x54,0x12,
+0x32,0x3d,0x12,0x77,0xfe,0x12,0x77,0xfa,0x11,0x62,0x90,0x00,0xf3,0xe0,0x30,0xe2,
+0x0d,0x90,0x05,0x41,0x74,0x10,0xf0,0x90,0x05,0x5a,0xf0,0xa3,0xe4,0xf0,0x12,0x64,
+0xf4,0x12,0x64,0x91,0x12,0x45,0x01,0x90,0x96,0xf1,0xe5,0xd9,0xf0,0x12,0x4f,0x5a,
+0xc2,0xaf,0x90,0x00,0x80,0xe0,0x44,0x40,0xf0,0x12,0x4e,0x47,0x75,0xe8,0x03,0x43,
+0xa8,0x85,0xd2,0xaf,0x90,0x01,0xbe,0xe0,0x04,0xf0,0x90,0x01,0xc0,0xe0,0x04,0xf0,
+0x90,0x96,0xef,0xe0,0x64,0x01,0xf0,0x24,0x80,0x90,0x01,0xc4,0xf0,0x74,0x58,0xa3,
+0xf0,0xe5,0x12,0x30,0xe4,0x09,0xc2,0xaf,0x53,0x12,0xef,0xd2,0xaf,0x31,0x20,0xe5,
+0x12,0x30,0xe6,0xdc,0xc2,0xaf,0x53,0x12,0xbf,0xd2,0xaf,0x12,0x68,0xd8,0x80,0xd0,
+0x90,0x01,0xcc,0xe0,0x54,0x0f,0x90,0x96,0xf2,0xf0,0x90,0x96,0xf2,0xe0,0xfd,0x70,
+0x02,0x41,0x61,0x90,0x97,0x67,0xe0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,
+0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xef,0x5d,0x70,0x02,0x41,0x5a,0x90,
+0x97,0x67,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd0,0x12,0x43,0x5f,0xe0,0x90,0x96,0xf3,
+0xf0,0x75,0x1e,0x01,0x75,0x1f,0x96,0x75,0x20,0xf3,0x75,0x21,0x01,0x7b,0x01,0x7a,
+0x96,0x79,0xf4,0x12,0x45,0x09,0x90,0x96,0xf4,0xe0,0xff,0xc4,0x13,0x13,0x13,0x54,
+0x01,0x90,0x97,0x67,0x30,0xe0,0x59,0xe0,0x75,0xf0,0x02,0x90,0x00,0x88,0x12,0x43,
+0x5f,0xe0,0x90,0x96,0xf5,0xf0,0x90,0x97,0x67,0xe0,0x75,0xf0,0x02,0x90,0x00,0x89,
+0x12,0x43,0x5f,0xe0,0x90,0x96,0xf6,0xf0,0x90,0x97,0x67,0xe0,0x75,0xf0,0x04,0x90,
+0x01,0xd1,0x12,0x43,0x5f,0xe0,0x90,0x96,0xf7,0xf0,0x90,0x97,0x67,0xe0,0x75,0xf0,
+0x04,0x90,0x01,0xd2,0x12,0x43,0x5f,0xe0,0x90,0x96,0xf8,0xf0,0x90,0x97,0x67,0xe0,
+0x75,0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x5f,0xe0,0x90,0x96,0xf9,0xf0,0x80,0x33,
+0xe0,0x75,0xf0,0x04,0x90,0x01,0xd1,0x12,0x43,0x5f,0xe0,0x90,0x96,0xf5,0xf0,0x90,
+0x97,0x67,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd2,0x12,0x43,0x5f,0xe0,0x90,0x96,0xf6,
+0xf0,0x90,0x97,0x67,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x5f,0xe0,0x90,
+0x96,0xf7,0xf0,0xef,0x54,0x7f,0xff,0x7b,0x01,0x7a,0x96,0x79,0xf5,0x51,0x62,0x90,
+0x96,0xf2,0xe0,0xff,0x90,0x97,0x67,0xe0,0xfe,0x74,0x01,0xa8,0x06,0x08,0x80,0x02,
+0xc3,0x33,0xd8,0xfc,0xf4,0x5f,0x90,0x96,0xf2,0xf0,0x90,0x97,0x67,0xe0,0xff,0x74,
+0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0x90,0x01,0xcc,0xf0,0x90,0x97,
+0x67,0xe0,0x04,0xf0,0xe0,0x54,0x03,0xf0,0x21,0x2a,0x90,0x01,0xc6,0xe0,0x44,0x02,
+0xf0,0x22,0x90,0x96,0xfa,0x12,0x43,0x8b,0xef,0x12,0x43,0x94,0x5a,0x94,0x01,0x5a,
+0x9d,0x02,0x5a,0xb8,0x03,0x5a,0xc1,0x05,0x5a,0xca,0x06,0x5a,0xfd,0x07,0x5a,0xd2,
+0x08,0x5a,0xdb,0x09,0x5a,0xe4,0x20,0x5a,0xed,0x2c,0x5a,0xa6,0x2d,0x5a,0xaf,0x2e,
+0x00,0x00,0x5a,0xf6,0x90,0x96,0xfa,0x12,0x43,0x6b,0x02,0x71,0x3b,0x90,0x96,0xfa,
+0x12,0x43,0x6b,0x02,0x71,0x65,0x90,0x96,0xfa,0x12,0x43,0x6b,0x02,0x71,0x6b,0x90,
+0x96,0xfa,0x12,0x43,0x6b,0x02,0x71,0xb3,0x90,0x96,0xfa,0x12,0x43,0x6b,0x02,0x71,
+0xe1,0x90,0x96,0xfa,0x12,0x43,0x6b,0x02,0x70,0x2e,0x90,0x96,0xfa,0x12,0x43,0x6b,
+0x80,0x2c,0x90,0x96,0xfa,0x12,0x43,0x6b,0x02,0x49,0x9b,0x90,0x96,0xfa,0x12,0x43,
+0x6b,0x02,0x72,0x31,0x90,0x96,0xfa,0x12,0x43,0x6b,0x02,0x72,0x29,0x90,0x96,0xfa,
+0x12,0x43,0x6b,0x02,0x76,0xc8,0x90,0x01,0xc6,0xe0,0x44,0x01,0xf0,0x22,0x90,0x00,
+0x04,0x12,0x42,0x20,0xff,0x54,0x1f,0xfe,0xef,0x54,0x20,0xc4,0x13,0x54,0x07,0xfd,
+0xaf,0x06,0x90,0x96,0xfd,0xef,0xf0,0xa3,0xed,0xf0,0xa3,0x12,0x43,0x8b,0x90,0x96,
+0xff,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54,0xf0,0xc4,0x54,0x0f,0x90,
+0x97,0x02,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0x54,0x40,0xc4,0x13,0x13,0x54,0x03,
+0x90,0x97,0x03,0xf0,0x90,0x96,0xfd,0xe0,0xff,0x75,0xf0,0x09,0x90,0x93,0x25,0x12,
+0x43,0x5f,0xad,0x82,0xac,0x83,0x90,0x97,0x04,0xec,0xf0,0xa3,0xed,0xf0,0xef,0x75,
+0xf0,0x09,0xa4,0x24,0x23,0xf9,0x74,0x93,0x35,0xf0,0xfa,0x7b,0x01,0xa3,0x12,0x43,
+0x8b,0x90,0x96,0xff,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54,0x0f,0xff,
+0x90,0x97,0x06,0x12,0x43,0x6b,0xef,0x12,0x42,0x4d,0x90,0x96,0xff,0x12,0x43,0x6b,
+0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x90,0x97,0x06,0x12,0x43,0x6b,0x90,0x00,0x01,
+0xef,0x12,0x42,0x5f,0x90,0x96,0xff,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0x20,
+0xff,0x90,0x97,0x04,0xe0,0xfc,0xa3,0xe0,0xfd,0xf5,0x82,0x8c,0x83,0xef,0xf0,0x12,
+0x29,0xd9,0x8d,0x82,0x8c,0x83,0xa3,0xf0,0x90,0x97,0x02,0xe0,0xfe,0x90,0x96,0xfd,
+0xe0,0xff,0x24,0xc1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xee,0xf0,0x90,0x96,0xfe,
+0xe0,0xfe,0x75,0xf0,0x09,0xef,0x90,0x93,0x29,0x12,0x43,0x5f,0xee,0xf0,0x75,0xf0,
+0x09,0xef,0x90,0x93,0x2a,0x12,0x43,0x5f,0x74,0x01,0xf0,0x90,0x97,0x03,0xe0,0xfe,
+0x75,0xf0,0x09,0xef,0x90,0x93,0x2b,0x12,0x43,0x5f,0xee,0xf0,0x8f,0x56,0xef,0x25,
+0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xaf,0x82,0xf5,0x58,0x8f,0x59,0xe5,0x56,
+0x75,0xf0,0x02,0xa4,0x24,0x81,0xf9,0x74,0x92,0x35,0xf0,0x75,0x5a,0x01,0xf5,0x5b,
+0x89,0x5c,0x75,0xf0,0x09,0xe5,0x56,0x90,0x93,0x25,0x12,0x43,0x5f,0xaf,0x82,0x85,
+0x83,0x5d,0x8f,0x5e,0xe5,0x56,0x75,0xf0,0x09,0xa4,0x24,0x23,0xf9,0x74,0x93,0x35,
+0xf0,0x75,0x5f,0x01,0xf5,0x60,0x89,0x61,0x74,0xc1,0x25,0x56,0xf5,0x82,0xe4,0x34,
+0x92,0xf5,0x83,0xe0,0x12,0x43,0x94,0x5c,0x8c,0x00,0x5c,0xa1,0x01,0x5c,0xb6,0x02,
+0x5c,0xcb,0x03,0x5c,0xf4,0x04,0x5d,0x09,0x05,0x5d,0x1e,0x06,0x5d,0x44,0x0c,0x5d,
+0x71,0x0d,0x5d,0x9e,0x0e,0x5d,0xcb,0x0f,0x00,0x00,0x5d,0xff,0xe5,0x56,0x25,0xe0,
+0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74,0x15,0x80,
+0x3c,0xe5,0x56,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0xf0,
+0xf0,0xa3,0x74,0x10,0x80,0x27,0xe5,0x56,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,
+0x95,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74,0x05,0x80,0x12,0xe5,0x56,0x25,0xe0,0x24,
+0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0xe4,0xf0,0xe5,0x56,
+0x25,0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,
+0x8f,0xf0,0xa1,0xff,0xe5,0x56,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,
+0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf5,0x80,0x27,0xe5,0x56,0x25,0xe0,0x24,0xe4,0xf5,
+0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf0,0x80,0x12,0xe5,0x56,
+0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe4,0xf0,0xa3,0x74,0x0d,
+0xf0,0xe5,0x56,0x25,0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe4,0xf0,
+0xa3,0xf0,0xa1,0xff,0x90,0x04,0x47,0xe0,0xab,0x5a,0xaa,0x5b,0xa9,0x5c,0x12,0x42,
+0x4d,0x90,0x04,0x46,0xe0,0xab,0x5a,0xaa,0x5b,0xa9,0x5c,0x90,0x00,0x01,0x12,0x42,
+0x5f,0x90,0x04,0x45,0xe0,0x85,0x59,0x82,0x85,0x58,0x83,0xf0,0x90,0x04,0x44,0xa1,
+0xf6,0x90,0x04,0x4b,0xe0,0xab,0x5a,0xaa,0x5b,0xa9,0x5c,0x12,0x42,0x4d,0x90,0x04,
+0x4a,0xe0,0xab,0x5a,0xaa,0x5b,0xa9,0x5c,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,
+0x49,0xe0,0x85,0x59,0x82,0x85,0x58,0x83,0xf0,0x90,0x04,0x48,0x80,0x58,0x90,0x04,
+0x4f,0xe0,0xab,0x5a,0xaa,0x5b,0xa9,0x5c,0x12,0x42,0x4d,0x90,0x04,0x4e,0xe0,0xab,
+0x5a,0xaa,0x5b,0xa9,0x5c,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x4d,0xe0,0x85,
+0x59,0x82,0x85,0x58,0x83,0xf0,0x90,0x04,0x4c,0x80,0x2b,0x90,0x04,0x53,0xe0,0xab,
+0x5a,0xaa,0x5b,0xa9,0x5c,0x12,0x42,0x4d,0x90,0x04,0x52,0xe0,0xab,0x5a,0xaa,0x5b,
+0xa9,0x5c,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x51,0xe0,0x85,0x59,0x82,0x85,
+0x58,0x83,0xf0,0x90,0x04,0x50,0xe0,0x85,0x59,0x82,0x85,0x58,0x83,0xa3,0xf0,0xab,
+0x5a,0xaa,0x5b,0xa9,0x5c,0xc0,0x03,0xc0,0x02,0xc0,0x01,0x12,0x29,0xd9,0xff,0xab,
+0x5f,0xaa,0x60,0xa9,0x61,0x12,0x29,0xd9,0x5f,0xd0,0x01,0xd0,0x02,0xd0,0x03,0x12,
+0x42,0x4d,0xab,0x5a,0xe5,0x5c,0x24,0x01,0xf9,0xe4,0x35,0x5b,0xfa,0xc0,0x03,0xc0,
+0x02,0xc0,0x01,0x12,0x29,0xd9,0xff,0xab,0x5f,0xaa,0x60,0xa9,0x61,0x90,0x00,0x01,
+0x12,0x42,0x20,0x5f,0xd0,0x01,0xd0,0x02,0xd0,0x03,0x12,0x42,0x4d,0x85,0x59,0x82,
+0x85,0x58,0x83,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x5e,0x82,0x85,0x5d,0x83,0xe0,
+0xfe,0xef,0x5e,0xd0,0x82,0xd0,0x83,0xf0,0x85,0x59,0x82,0x85,0x58,0x83,0xa3,0xc0,
+0x83,0xc0,0x82,0xe0,0xff,0x85,0x5e,0x82,0x85,0x5d,0x83,0xa3,0xe0,0xfe,0xef,0x5e,
+0xd0,0x82,0xd0,0x83,0xf0,0xe5,0x56,0x25,0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,
+0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b,0x75,0x57,0x0b,0x74,0x01,0x7e,0x00,
+0xa8,0x57,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x56,0x25,
+0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,
+0x4e,0x60,0x06,0xe5,0x57,0x24,0x10,0x80,0x5d,0x15,0x57,0xe5,0x57,0xc3,0x94,0x00,
+0x50,0xca,0x80,0x56,0xe5,0x56,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,
+0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3d,0x75,0x57,0x0f,0x74,0x01,0x7e,0x00,0xa8,
+0x57,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x56,0x25,0xe0,
+0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,
+0x60,0x08,0x90,0x97,0x09,0xe5,0x57,0xf0,0x80,0x10,0x15,0x57,0xe5,0x57,0xc3,0x94,
+0x00,0x50,0xc8,0x80,0x05,0xe4,0x90,0x97,0x09,0xf0,0xe5,0x56,0x25,0xe0,0x24,0xe4,
+0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b,0xe4,0xf5,
+0x57,0x74,0x01,0x7e,0x00,0xa8,0x57,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,
+0xf9,0xff,0xe5,0x56,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,
+0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x08,0x90,0x97,0x0a,0xe5,0x57,0xf0,0x80,0x5b,
+0x05,0x57,0xe5,0x57,0xb4,0x10,0xca,0x80,0x52,0xe5,0x56,0x25,0xe0,0x24,0x81,0xf5,
+0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x39,0xe4,0xf5,0x57,
+0x74,0x01,0x7e,0x00,0xa8,0x57,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,
+0xff,0xe5,0x56,0x25,0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0x5e,
+0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x06,0xe5,0x57,0x24,0x10,0x80,0x0a,0x05,0x57,0xe5,
+0x57,0xb4,0x0c,0xcc,0x80,0x05,0xe4,0x90,0x97,0x0a,0xf0,0x90,0x97,0x09,0xe0,0xff,
+0x75,0xf0,0x09,0xe5,0x56,0x90,0x93,0x27,0x12,0x43,0x5f,0xef,0xf0,0x90,0x97,0x0a,
+0xe0,0xfe,0x75,0xf0,0x09,0xe5,0x56,0x90,0x93,0x28,0x12,0x43,0x5f,0xee,0xf0,0x74,
+0x84,0x25,0x56,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0xd3,0x9f,0x40,0x05,0x90,
+0x97,0x09,0x11,0x4e,0x74,0x84,0x25,0x56,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,
+0xff,0x90,0x97,0x0a,0xe0,0xfe,0xef,0xc3,0x9e,0x50,0x02,0x11,0x4e,0x90,0x97,0x09,
+0xe0,0xff,0xd3,0x94,0x13,0x40,0x07,0x90,0x93,0x22,0x74,0x03,0xf0,0x22,0xef,0xd3,
+0x94,0x0b,0x40,0x07,0x90,0x93,0x22,0x74,0x02,0xf0,0x22,0xef,0xd3,0x94,0x03,0x40,
+0x07,0x90,0x93,0x22,0x74,0x01,0xf0,0x22,0xe4,0x90,0x93,0x22,0xf0,0x22,0xe0,0xfd,
+0x74,0x44,0x25,0x56,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xed,0xf0,0xaf,0x56,0xd3,
+0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x74,0x84,0x2f,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,
+0xed,0xf0,0xd0,0xd0,0x92,0xaf,0x22,0xed,0x54,0x1f,0xf5,0x55,0x74,0x01,0x2f,0xf5,
+0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0xf5,0x54,0xeb,0xc3,0x94,0x01,0x40,0x02,0x80,
+0x2a,0xe5,0x54,0x25,0x53,0xfe,0xe5,0x55,0x90,0x41,0x9e,0x93,0xfc,0xee,0xd3,0x9c,
+0x74,0x01,0x40,0x0c,0x2f,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe4,0xf0,0x80,0xaf,
+0x2f,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xee,0xf0,0x22,0xac,0x07,0x75,0xf0,0x09,
+0xec,0x90,0x93,0x27,0x12,0x43,0x5f,0xe0,0xff,0x74,0x65,0x2c,0xf5,0x82,0xe4,0x34,
+0x96,0xf5,0x83,0xe0,0x54,0x1f,0xfb,0xd3,0x9f,0x40,0x02,0xab,0x07,0xeb,0x25,0xe0,
+0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,
+0xeb,0x25,0xe0,0x24,0x2e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,
+0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xec,0x25,0xe0,0x24,0xe1,0xf5,
+0x82,0xe4,0x34,0x92,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xaf,0x04,0xad,0x03,0x11,
+0x5f,0xaf,0x03,0x22,0xaa,0x07,0xaf,0x05,0x74,0x84,0x2a,0xf5,0x82,0xe4,0x34,0x04,
+0xf5,0x83,0xe0,0x54,0x7f,0xfb,0x54,0x1f,0xf9,0x90,0x96,0xfe,0xf0,0x75,0xf0,0x09,
+0xea,0x90,0x93,0x28,0x12,0x43,0x5f,0xe0,0x90,0x97,0x00,0xf0,0x75,0xf0,0x09,0xea,
+0x90,0x93,0x27,0x12,0x43,0x5f,0xe0,0xfe,0x90,0x97,0x01,0xf0,0xea,0x25,0xe0,0x24,
+0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfd,0xa3,0xe0,0x90,0x97,0x02,0xcd,
+0xf0,0xa3,0xed,0xf0,0xea,0x25,0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,
+0xe0,0xfd,0xa3,0xe0,0x90,0x97,0x04,0xcd,0xf0,0xa3,0xed,0xf0,0xe9,0xd3,0x9e,0x40,
+0x09,0x90,0x97,0x01,0xe0,0x90,0x96,0xfe,0xf0,0xfb,0xef,0x70,0x02,0x41,0x61,0x90,
+0x96,0xff,0xef,0xf0,0xeb,0x30,0xe6,0x09,0x90,0x96,0xfe,0xe0,0xfb,0xa3,0xe0,0x14,
+0xf0,0x90,0x96,0xff,0xe0,0x70,0x02,0x41,0x61,0x90,0x96,0xfe,0xe0,0xff,0xd3,0x94,
+0x00,0x50,0x02,0x41,0x61,0xe4,0x90,0x96,0xfd,0xf0,0xef,0x14,0x90,0x96,0xfc,0xf0,
+0x90,0x97,0x00,0xe0,0xf9,0x90,0x96,0xfc,0xe0,0xff,0xd3,0x99,0x40,0x6a,0xef,0x94,
+0x10,0x40,0x21,0xef,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,
+0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x97,0x04,0xe0,0x5e,0xfe,0xa3,0xe0,
+0x5f,0x4e,0x70,0x27,0x90,0x96,0xfc,0xe0,0xff,0xc3,0x94,0x10,0x50,0x32,0x74,0x01,
+0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,
+0x97,0x02,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x15,0x90,0x96,0xfc,0xe0,0xfb,
+0xa3,0xe0,0x04,0xf0,0x90,0x96,0xff,0xe0,0xff,0x90,0x96,0xfd,0xe0,0x6f,0x60,0x08,
+0x90,0x96,0xfc,0xe0,0x14,0xf0,0x80,0x88,0x90,0x96,0xff,0xe0,0xff,0x90,0x96,0xfd,
+0xe0,0xc3,0x9f,0x50,0x0c,0x90,0x96,0xfc,0xe0,0xb5,0x01,0x05,0x90,0x97,0x00,0xe0,
+0xfb,0xeb,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,
+0x74,0x01,0x93,0xff,0xeb,0x25,0xe0,0x24,0x2e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,
+0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xea,0x25,
+0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xaf,
+0x02,0xad,0x03,0x11,0x5f,0xaf,0x03,0x22,0xad,0x07,0x74,0x84,0x2d,0xf5,0x82,0xe4,
+0x34,0x04,0xf5,0x83,0xe0,0x54,0x7f,0xf5,0x61,0x54,0x1f,0xfc,0x75,0xf0,0x09,0xed,
+0x90,0x93,0x27,0x12,0x43,0x5f,0xe0,0xff,0x90,0x96,0xfc,0xf0,0xed,0x25,0xe0,0x24,
+0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x96,0xfd,0xcb,
+0xf0,0xa3,0xeb,0xf0,0xed,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,
+0xe0,0xfb,0xa3,0xe0,0x90,0x96,0xff,0xcb,0xf0,0xa3,0xeb,0xf0,0xec,0x25,0xe0,0x24,
+0x2e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfa,0x74,0x01,0x93,0xfb,0xed,
+0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xea,0xf0,0xa3,0xeb,0xf0,
+0xec,0xc3,0x9f,0x40,0x02,0x61,0xaa,0x74,0x65,0x2d,0xf5,0x82,0xe4,0x34,0x96,0xf5,
+0x83,0xec,0xf0,0x04,0xfb,0x90,0x96,0xfc,0xe0,0xff,0xeb,0xd3,0x9f,0x40,0x02,0x61,
+0xdb,0xeb,0xc3,0x94,0x10,0x40,0x21,0xeb,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8,
+0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x96,0xfd,0xe0,
+0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x70,0x23,0xeb,0xc3,0x94,0x10,0x50,0x39,0x74,0x01,
+0x7e,0x00,0xa8,0x03,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,
+0x96,0xff,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x1c,0xeb,0x64,0x13,0x60,0x08,
+0xeb,0x64,0x12,0x60,0x03,0xbb,0x11,0x09,0x90,0x96,0xfd,0xe0,0x30,0xe0,0x02,0x7b,
+0x18,0xac,0x03,0x8c,0x61,0x80,0x34,0x0b,0x80,0x8b,0x90,0x96,0xfc,0xe0,0xfb,0x6c,
+0x70,0x69,0x74,0x65,0x2d,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xec,0xf0,0x75,0xf0,
+0x09,0xed,0x90,0x93,0x29,0x12,0x43,0x5f,0xe0,0xb4,0x01,0x0c,0xe5,0x61,0x20,0xe6,
+0x07,0xec,0x44,0x40,0xf5,0x61,0x80,0x03,0xaf,0x61,0x22,0xec,0x25,0xe0,0x24,0x66,
+0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xec,0x25,
+0xe0,0x24,0x2e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,
+0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,
+0x34,0x92,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0x80,0x5b,0xec,0xd3,0x9b,0x40,0x56,
+0x90,0x96,0xfc,0xe0,0xff,0x74,0x65,0x2d,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xef,
+0xf0,0xac,0x07,0x8f,0x61,0xec,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,
+0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xec,0x25,0xe0,0x24,0x2e,0xf5,0x82,0xe4,
+0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,
+0x13,0xff,0xed,0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xee,0xf0,
+0xa3,0xef,0xf0,0xaf,0x61,0x22,0x74,0x01,0x2d,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,
+0xe4,0xf0,0xaf,0x05,0xe5,0x61,0x44,0x80,0xfd,0x11,0x5f,0xe5,0x61,0x44,0x80,0xff,
+0x22,0x75,0x30,0x1f,0x75,0x31,0x01,0xe4,0xf5,0x32,0x90,0x01,0x38,0xe5,0x30,0xf0,
+0xa3,0xe5,0x31,0xf0,0xa3,0xe5,0x32,0xf0,0x22,0x90,0x00,0x02,0xe0,0x54,0xe0,0x90,
+0x97,0x33,0x60,0x04,0x74,0x01,0xf0,0x22,0x74,0x02,0xf0,0x22,0x90,0x00,0xf3,0xe0,
+0x30,0xe3,0x08,0x90,0x97,0x35,0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x97,0x35,0xf0,
+0x90,0x97,0x35,0xe0,0xb4,0x01,0x12,0x90,0x00,0xf2,0xe0,0x30,0xe7,0x0b,0x90,0x97,
+0x22,0x74,0xfd,0xf0,0xa3,0x74,0x33,0xf0,0x22,0x90,0x97,0x22,0x74,0xfd,0xf0,0xa3,
+0x74,0x2f,0xf0,0x22,0x90,0x01,0x64,0x74,0xa0,0xf0,0x22,0xc0,0xe0,0xc0,0x83,0xc0,
+0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x7d,0xfb,0x90,0x01,
+0xc4,0xed,0xf0,0x74,0x64,0xff,0xa3,0xf0,0x53,0x91,0xef,0x90,0x00,0x51,0xe0,0xfe,
+0x90,0x00,0x55,0xe0,0x5e,0xf5,0x3d,0xe5,0x3d,0x30,0xe6,0x03,0x74,0x40,0xf0,0x90,
+0x01,0xc4,0xed,0xf0,0xa3,0xef,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0xd0,0xd0,
+0x82,0xd0,0x83,0xd0,0xe0,0x32,0x8f,0x68,0x8c,0x69,0x8d,0x6a,0x22,0x8f,0x6b,0x8c,
+0x6c,0x8d,0x6d,0x22,0xe4,0xf5,0x70,0x90,0x97,0x21,0xf0,0xf5,0x71,0x90,0x97,0x1e,
+0x74,0x0c,0xf0,0x90,0x97,0x1c,0xf0,0xe4,0x90,0x97,0x1f,0xf0,0x90,0x97,0x1b,0xf0,
+0x90,0x97,0x1a,0xf0,0x90,0x97,0x1d,0x04,0xf0,0x90,0x97,0x0e,0xf0,0xe4,0x90,0x97,
+0x20,0xf0,0x90,0x97,0x10,0xf0,0x90,0x97,0x18,0x74,0x07,0xf0,0xe4,0x90,0x97,0x0f,
+0xf0,0x90,0x97,0x16,0xf0,0xa3,0x74,0x02,0xf0,0x90,0x97,0x14,0x14,0xf0,0xa3,0x74,
+0x03,0xf0,0x90,0x97,0x13,0x74,0x14,0xf0,0x90,0x97,0x19,0x74,0x05,0xf0,0xe4,0x90,
+0x97,0x12,0xf0,0x90,0x97,0x0d,0xf0,0x90,0x97,0x34,0xf0,0x22,0x12,0x55,0xb1,0xef,
+0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x32,0x90,0x97,0x1b,0xe0,
+0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x24,0x90,0x97,0x1a,0xe0,0x60,0x08,
+0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x16,0x90,0x97,0x1e,0xe0,0x54,0x0f,0xd3,0x94,
+0x04,0x40,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01,
+0xb8,0x74,0x08,0xf0,0x7f,0x00,0x22,0xe5,0x12,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,
+0xf0,0x80,0x5e,0x90,0x97,0x1e,0xe0,0x54,0x0f,0xd3,0x94,0x01,0x40,0x08,0x90,0x01,
+0xb9,0x74,0x02,0xf0,0x80,0x4b,0x90,0x02,0x87,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,
+0x04,0xf0,0x80,0x3d,0x90,0x97,0x33,0xe0,0xb4,0x02,0x10,0x90,0x97,0x22,0xe0,0xfe,
+0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x17,0x80,0x26,0x90,0x97,0x33,0xe0,0xb4,
+0x01,0x0e,0x90,0x01,0xaf,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x11,
+0x90,0x97,0x12,0xe0,0x70,0x08,0x90,0x01,0xb9,0x74,0x10,0xf0,0x80,0x03,0x7f,0x01,
+0x22,0x90,0x01,0xb8,0x74,0x02,0xf0,0x7f,0x00,0x22,0x90,0x06,0x04,0xe0,0x54,0xbf,
+0xf0,0xef,0x60,0x09,0xe5,0x70,0xb4,0x01,0x04,0xe4,0xff,0xd1,0x99,0x90,0x97,0x1c,
+0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x0c,0xf0,0x22,0x8f,0x73,0x90,0x97,0x1c,0xe0,0x90,
+0x01,0xc1,0xf0,0xa3,0xe5,0x12,0xf0,0x12,0x4f,0xef,0xef,0x64,0x01,0x70,0x2e,0x90,
+0x97,0x27,0x12,0x50,0x1d,0xe5,0x73,0x60,0x10,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,
+0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x80,0x0e,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,
+0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x90,0x97,
+0x68,0xef,0xf0,0x12,0x4d,0xc1,0x90,0x97,0x68,0xe0,0x60,0x05,0x90,0x05,0x22,0xe4,
+0xf0,0x90,0x97,0x1c,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x04,0xf0,0x22,0x8f,0x27,0xe4,
+0x90,0x97,0x61,0xf0,0xa3,0xf0,0x90,0x01,0x09,0xe0,0x7f,0x00,0x30,0xe7,0x02,0x7f,
+0x01,0xef,0x65,0x27,0x60,0x3e,0xc3,0x90,0x97,0x62,0xe0,0x94,0x88,0x90,0x97,0x61,
+0xe0,0x94,0x13,0x40,0x08,0x90,0x01,0xc6,0xe0,0x44,0x80,0xf0,0x22,0x90,0x97,0x61,
+0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x7f,0x14,0x7e,0x00,0x12,0x37,0x54,0xd3,0x90,
+0x97,0x62,0xe0,0x94,0x32,0x90,0x97,0x61,0xe0,0x94,0x00,0x40,0xb9,0x90,0x01,0xc7,
+0xe0,0x30,0xe0,0xb2,0x22,0x90,0x97,0x1e,0xe0,0x30,0xe6,0x1c,0xe0,0x54,0x0f,0xff,
+0x90,0x97,0x0c,0xe0,0xfe,0x4f,0x90,0x01,0x2f,0xf0,0xee,0x64,0x80,0x90,0x97,0x0c,
+0xf0,0x90,0x97,0x1e,0xe0,0x54,0xbf,0xf0,0x22,0x8f,0x72,0x12,0x4f,0xef,0xef,0x64,
+0x01,0x70,0x2e,0x90,0x97,0x28,0x12,0x50,0x1d,0xe5,0x72,0x60,0x10,0x74,0x21,0x2f,
+0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x80,0x0e,0x74,0x21,0x2f,
+0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0,0x90,0x04,0x1f,0x74,0x20,
+0xf0,0x22,0xe4,0x90,0x96,0xee,0xf0,0xe5,0x71,0x70,0x03,0x02,0x68,0x58,0xe5,0x70,
+0x64,0x01,0x60,0x03,0x02,0x68,0x58,0xe5,0x71,0x14,0x60,0x29,0x24,0xfd,0x60,0x25,
+0x24,0x02,0x24,0xfb,0x50,0x02,0x80,0x23,0x90,0x97,0x0e,0xe0,0x14,0xf0,0xe0,0x60,
+0x04,0xa3,0xe0,0x60,0x16,0x90,0x97,0x0e,0xe0,0x70,0x0a,0x90,0x97,0x1d,0xe0,0x90,
+0x97,0x0e,0xf0,0x80,0x00,0x90,0x96,0xee,0x74,0x01,0xf0,0x90,0x97,0x36,0xe0,0x30,
+0xe0,0x16,0xa3,0xe0,0xb4,0x06,0x05,0xe4,0x90,0x96,0xee,0xf0,0xe4,0xff,0x12,0x4c,
+0x21,0xef,0x70,0x04,0x90,0x96,0xee,0xf0,0x90,0x96,0xee,0xe0,0x60,0x3a,0x90,0x97,
+0x21,0xe0,0x44,0x10,0xf0,0xe4,0x90,0x97,0x47,0xf0,0x90,0x97,0x18,0x12,0x44,0x56,
+0x90,0x01,0x57,0x74,0x05,0xf0,0x90,0x97,0x1c,0xe0,0x54,0x0f,0xc3,0x94,0x04,0x50,
+0x17,0x7d,0x01,0x7f,0x04,0x12,0x47,0xab,0x90,0x97,0x36,0xe0,0x30,0xe0,0x09,0x12,
+0x55,0xce,0x90,0x05,0x22,0x74,0xff,0xf0,0x22,0x90,0x97,0x20,0xe0,0x60,0x0e,0xe4,
+0xf0,0xa3,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0x07,0x70,0x2c,0x80,0x27,0x90,0x97,0x0f,
+0xe0,0x04,0xf0,0x90,0x97,0x21,0xe0,0x54,0xef,0xf0,0x90,0x97,0x14,0xe0,0xff,0x90,
+0x97,0x0f,0xe0,0xd3,0x9f,0x40,0x0d,0xe5,0x70,0xb4,0x01,0x0b,0xa3,0xe0,0x70,0x07,
+0xe0,0x04,0xf0,0x22,0x12,0x47,0x98,0x22,0xef,0xc3,0x94,0x20,0x50,0x39,0xef,0x30,
+0xe0,0x17,0xed,0xc4,0x54,0xf0,0xfd,0xef,0xc3,0x13,0xfe,0x24,0xa4,0xf5,0x82,0xe4,
+0x34,0x04,0xf5,0x83,0xe0,0x54,0x0f,0x80,0x10,0xef,0xc3,0x13,0xfe,0x24,0xa4,0xf5,
+0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0xa4,0x2e,0xf5,0x82,0xe4,
+0x34,0x04,0xf5,0x83,0xe0,0x4d,0xf0,0x22,0xe4,0xf5,0x56,0x75,0xf0,0x09,0xe5,0x56,
+0x90,0x93,0x2a,0x12,0x43,0x5f,0xe0,0x64,0x01,0x60,0x02,0xc1,0xa3,0xe5,0x56,0x25,
+0xe0,0x24,0xc0,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0xd3,0x94,
+0x00,0xee,0x94,0x00,0x50,0x02,0xc1,0xa3,0xe5,0x56,0x75,0xf0,0x0a,0xa4,0x24,0x00,
+0xf9,0x74,0x90,0x35,0xf0,0x75,0x5b,0x01,0xf5,0x5c,0x89,0x5d,0xe5,0x56,0x25,0xe0,
+0x24,0xc0,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90,0x96,0xf6,
+0xcf,0xf0,0xa3,0xef,0xf0,0xe5,0x56,0x25,0xe0,0x24,0x63,0xf5,0x82,0xe4,0x34,0x94,
+0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90,0x96,0xf8,0xcf,0xf0,0xa3,0xef,0xf0,0x74,0x84,
+0x25,0x56,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,0x3f,0x90,0x96,0xf2,0xf0,
+0xe0,0xfe,0x54,0x1f,0xa3,0xf0,0x75,0xf0,0x09,0xe5,0x56,0x90,0x93,0x27,0x12,0x43,
+0x5f,0xe0,0x90,0x96,0xfb,0xf0,0x74,0x24,0x25,0x56,0xf5,0x82,0xe4,0x34,0x96,0xf5,
+0x83,0xe0,0xc3,0x94,0x05,0x40,0x02,0x61,0x7d,0x90,0x96,0xfb,0xe0,0xff,0x90,0x96,
+0xf3,0xe0,0x9f,0x40,0x13,0x90,0x96,0xfb,0xe0,0x90,0x96,0xf3,0xf0,0xee,0x54,0x40,
+0xfe,0x90,0x96,0xf2,0xf0,0xef,0x4e,0xf0,0x90,0x96,0xf3,0xe0,0xff,0x90,0x41,0x12,
+0x93,0xfe,0x74,0x23,0x25,0x56,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xc3,0x9e,
+0x40,0x06,0xef,0x90,0x40,0xda,0x80,0x07,0x90,0x96,0xf3,0xe0,0x90,0x40,0xf6,0x93,
+0x90,0x96,0xfa,0xf0,0x90,0x96,0xfa,0xe0,0x75,0xf0,0x06,0xa4,0x24,0x50,0xf9,0x74,
+0x40,0x35,0xf0,0x75,0x58,0xff,0xf5,0x59,0x89,0x5a,0x90,0x96,0xf2,0xe0,0x90,0x41,
+0xba,0x93,0xff,0xd3,0x90,0x96,0xf9,0xe0,0x9f,0x90,0x96,0xf8,0xe0,0x94,0x00,0x40,
+0x09,0xe4,0xfd,0xaf,0x56,0x12,0x61,0x24,0xc1,0x3a,0xe5,0x56,0x25,0xe0,0x24,0xe1,
+0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0xf5,0x5e,0xa3,0xe0,0xf5,0x5f,0xab,0x58,
+0xaa,0x59,0xa9,0x5a,0x12,0x29,0xd9,0xff,0x7e,0x00,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,
+0x12,0x42,0x97,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,0x5f,0xf5,0x5f,0xee,0x35,
+0x5e,0xf5,0x5e,0xab,0x58,0xaa,0x59,0xa9,0x5a,0x90,0x00,0x01,0x12,0x42,0x20,0xff,
+0x7e,0x00,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x02,0x12,0x42,0xc2,0xfd,0xac,
+0xf0,0x12,0x29,0xf2,0xef,0x25,0x5f,0xf5,0x5f,0xee,0x35,0x5e,0xf5,0x5e,0xab,0x58,
+0xaa,0x59,0xa9,0x5a,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x5b,0xaa,
+0x5c,0xa9,0x5d,0x90,0x00,0x04,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,
+0x25,0x5f,0xf5,0x5f,0xee,0x35,0x5e,0xf5,0x5e,0xab,0x58,0xaa,0x59,0xa9,0x5a,0x90,
+0x00,0x03,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,
+0x06,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,0x5f,0xf5,0x5f,0xee,
+0x35,0x5e,0xf5,0x5e,0xab,0x58,0xaa,0x59,0xa9,0x5a,0x90,0x00,0x04,0x12,0x42,0x20,
+0xff,0x7e,0x00,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x08,0x12,0x42,0xc2,0xfd,
+0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,0x5f,0xf5,0x5f,0xee,0x35,0x5e,0xf5,0x5e,0xab,
+0x58,0xaa,0x59,0xa9,0x5a,0x90,0x00,0x05,0x12,0x42,0x20,0xff,0x7e,0x00,0x90,0x96,
+0xf6,0xe0,0xfc,0xa3,0xe0,0xfd,0x12,0x29,0xf2,0xd3,0xe5,0x5f,0x9f,0xe5,0x5e,0x9e,
+0x40,0x0c,0xe5,0x5f,0x9f,0xf5,0x5f,0xe5,0x5e,0x9e,0xf5,0x5e,0x80,0x05,0xe4,0xf5,
+0x5e,0xf5,0x5f,0xe5,0x56,0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,
+0xe5,0x5e,0xf0,0xa3,0xe5,0x5f,0xf0,0x90,0x96,0xf2,0xe0,0xf9,0x25,0xe0,0x24,0x2e,
+0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xc3,0x74,0x01,0x93,0x95,0x5f,0xe4,0x93,0x95,
+0x5e,0x50,0x07,0xaf,0x56,0x12,0x62,0xa8,0xc1,0x0e,0xe9,0x25,0xe0,0x24,0x66,0xf5,
+0x82,0xe4,0x34,0x41,0xf5,0x83,0xd3,0x74,0x01,0x93,0x95,0x5f,0xe4,0x93,0x95,0x5e,
+0x50,0x02,0xc1,0x0e,0x7d,0x01,0xaf,0x56,0x12,0x61,0x24,0xc1,0x0e,0x74,0x24,0x25,
+0x56,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe0,0xfc,0x64,0x05,0x60,0x02,0xa1,0x18,
+0x90,0x93,0x22,0xe0,0xff,0xb4,0x03,0x0b,0x90,0x96,0xf3,0xe0,0xc3,0x94,0x19,0x40,
+0x3d,0x80,0x2e,0xef,0xb4,0x02,0x0b,0x90,0x96,0xf3,0xe0,0xc3,0x94,0x11,0x40,0x2e,
+0x80,0x1f,0x90,0x93,0x22,0xe0,0xff,0xb4,0x01,0x0b,0x90,0x96,0xf3,0xe0,0xc3,0x94,
+0x0a,0x40,0x1b,0x80,0x0c,0xef,0x70,0x11,0x90,0x96,0xf3,0xe0,0xc3,0x94,0x03,0x40,
+0x0d,0x90,0x95,0x43,0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x95,0x43,0xf0,0x74,0x43,
+0x25,0x56,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xf5,0x60,0x74,0x23,0x25,0x56,
+0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xff,0xc3,0x94,0x30,0x50,0x02,0x81,0xc5,
+0x90,0x95,0x43,0xe0,0x64,0x01,0x60,0x02,0x81,0xc5,0x74,0x44,0x25,0x56,0xf5,0x82,
+0xe4,0x34,0x95,0xf5,0x83,0xe0,0x64,0x0a,0x60,0x51,0xef,0x24,0x05,0xff,0xe4,0x33,
+0xfe,0x74,0x21,0x25,0x56,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0xfd,0xd3,0x9f,
+0xee,0x64,0x80,0xf8,0x74,0x80,0x98,0x50,0x32,0xed,0x24,0x05,0xff,0xe4,0x33,0xfe,
+0x74,0x23,0x25,0x56,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xd3,0x9f,0xee,0x64,
+0x80,0xf8,0x74,0x80,0x98,0x50,0x14,0x74,0x44,0x25,0x56,0xf5,0x82,0xe4,0x34,0x96,
+0xf5,0x83,0xe0,0xff,0x90,0x96,0xf3,0xe0,0x6f,0x60,0x3d,0x74,0x23,0x25,0x56,0xf5,
+0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xff,0xd3,0x94,0x42,0x40,0x05,0x75,0x60,0x05,
+0x80,0x0e,0xef,0xd3,0x94,0x39,0x40,0x05,0x75,0x60,0x03,0x80,0x03,0x75,0x60,0x01,
+0x74,0x21,0x25,0x56,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xef,0xf0,0x74,0x44,0x25,
+0x56,0xf5,0x82,0xe4,0x34,0x95,0x80,0x29,0x74,0x24,0x25,0x56,0xf5,0x82,0xe4,0x34,
+0x96,0xf5,0x83,0xe4,0xf0,0x74,0x44,0x25,0x56,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,
+0xe0,0x04,0xf0,0x80,0x10,0xe4,0xf5,0x60,0x74,0x24,0x25,0x56,0xf5,0x82,0xe4,0x34,
+0x96,0xf5,0x83,0xe4,0xf0,0x90,0x96,0xf3,0xe0,0xff,0x74,0x44,0x25,0x56,0xf5,0x82,
+0xe4,0x34,0x96,0xf5,0x83,0xef,0xf0,0x74,0x43,0x25,0x56,0xf5,0x82,0xe4,0x34,0x94,
+0xf5,0x83,0xe5,0x60,0xf0,0x75,0xf0,0x09,0xe5,0x56,0x90,0x93,0x2b,0x12,0x43,0x5f,
+0xe0,0xb4,0x01,0x10,0xe4,0xf5,0x60,0x74,0x24,0x25,0x56,0xf5,0x82,0xe4,0x34,0x96,
+0xf5,0x83,0xe4,0xf0,0xad,0x60,0xc1,0x0a,0xec,0x64,0x06,0x60,0x02,0xc1,0x0e,0xf5,
+0x5e,0xf5,0x5f,0x90,0x41,0xdb,0x93,0xff,0x7e,0x00,0x90,0x96,0xf6,0xe0,0xfc,0xa3,
+0xe0,0xfd,0x12,0x29,0xf2,0x90,0x96,0xf4,0xee,0xf0,0xa3,0xef,0xf0,0x74,0x43,0x25,
+0x56,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xf5,0x60,0xe4,0xf5,0x57,0xab,0x5b,
+0xaa,0x5c,0xa9,0x5d,0x75,0xf0,0x02,0xe5,0x57,0xa4,0xf5,0x82,0x85,0xf0,0x83,0x12,
+0x42,0xc2,0xfd,0xac,0xf0,0xe5,0x57,0x90,0x41,0xd6,0x93,0xff,0x7e,0x00,0x12,0x29,
+0xf2,0xef,0x25,0x5f,0xf5,0x5f,0xee,0x35,0x5e,0xf5,0x5e,0xc3,0x90,0x96,0xf5,0xe0,
+0x95,0x5f,0x90,0x96,0xf4,0xe0,0x95,0x5e,0x40,0x07,0x05,0x57,0xe5,0x57,0xb4,0x05,
+0xbd,0xe5,0x57,0xc3,0x13,0xf5,0x57,0xe5,0x60,0xb4,0x01,0x06,0xe5,0x57,0x70,0x46,
+0x80,0x13,0xe5,0x60,0xb4,0x03,0x15,0xe5,0x57,0x70,0x05,0x75,0x60,0x03,0x80,0x39,
+0xe5,0x57,0xb4,0x01,0x05,0x75,0x60,0x01,0x80,0x2f,0x80,0x2a,0xe5,0x60,0xb4,0x05,
+0x28,0xe5,0x57,0x70,0x05,0x75,0x60,0x05,0x80,0x0d,0xe5,0x57,0xb4,0x01,0x05,0x75,
+0x60,0x03,0x80,0x03,0x75,0x60,0x01,0xd3,0x90,0x96,0xf9,0xe0,0x94,0x03,0x90,0x96,
+0xf8,0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x60,0xd3,0x90,0x96,0xf9,0xe0,0x94,0x03,
+0x90,0x96,0xf8,0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x60,0x74,0x43,0x25,0x56,0xf5,
+0x82,0xe4,0x34,0x94,0xf5,0x83,0xe5,0x60,0xf0,0xfd,0xaf,0x56,0x11,0x98,0x74,0x24,
+0x25,0x56,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe0,0xd3,0x94,0x05,0x74,0x24,0x50,
+0x0e,0x25,0x56,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe0,0x04,0xf0,0x80,0x0b,0x25,
+0x56,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe4,0xf0,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,
+0xe4,0xf5,0xf0,0x12,0x42,0xfa,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x02,0xe4,
+0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x04,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,
+0x06,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x08,0xe4,0xf5,0xf0,0x12,0x43,0x19,
+0xe5,0x56,0x25,0xe0,0x24,0xc0,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xe4,0xf0,0xa3,
+0xf0,0xe5,0x56,0x25,0xe0,0x24,0x63,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,
+0xa3,0xf0,0xe5,0x56,0x25,0xe0,0x24,0xa3,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,
+0xf0,0xa3,0xf0,0x05,0x56,0xe5,0x56,0xc3,0x94,0x20,0x50,0x02,0x01,0xdb,0x22,0xe4,
+0xfd,0x74,0xa4,0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe4,0xf0,0x0d,0xbd,0x10,
+0xf0,0xe4,0xfd,0x75,0xf0,0x0a,0xed,0x90,0x90,0x00,0x12,0x43,0x5f,0xe4,0xf0,0xa3,
+0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x02,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,
+0xf0,0x0a,0xed,0x90,0x90,0x04,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,
+0xed,0x90,0x90,0x06,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,
+0x90,0x08,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x74,0x44,0x2d,0xf5,0x82,0xe4,0x34,
+0x96,0xf5,0x83,0x74,0x13,0xf0,0x74,0x44,0x2d,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,
+0xe4,0xf0,0x74,0x43,0x2d,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xed,0x25,
+0xe0,0x24,0xc0,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,
+0xe0,0x24,0x63,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,
+0xe0,0x24,0xe3,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,
+0xe0,0x24,0xa3,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,
+0xe0,0x24,0x64,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,
+0xe0,0x24,0xa4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x74,0x24,
+0x2d,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe4,0xf0,0x90,0x41,0x8c,0x93,0xfe,0x74,
+0x01,0x93,0xff,0x90,0x41,0x54,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,
+0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,
+0xee,0xf0,0xa3,0xef,0xf0,0x75,0xf0,0x09,0xed,0x90,0x93,0x29,0x12,0x43,0x5f,0x74,
+0x01,0xf0,0x74,0xc1,0x2d,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0x74,0x0c,0xf0,0x75,
+0xf0,0x09,0xed,0x90,0x93,0x25,0x12,0x43,0x5f,0x74,0xff,0xf0,0xa3,0xf0,0x75,0xf0,
+0x09,0xed,0x90,0x93,0x23,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0x74,0x0f,0xf0,0x75,0xf0,
+0x09,0xed,0x90,0x93,0x27,0x12,0x43,0x5f,0x74,0x13,0xf0,0x75,0xf0,0x09,0xed,0x90,
+0x93,0x28,0x12,0x43,0x5f,0xe4,0xf0,0x74,0x84,0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,
+0x83,0x74,0x13,0xf0,0x0d,0xed,0x64,0x20,0x60,0x03,0x02,0x6e,0xc3,0x22,0x12,0x29,
+0xd9,0xf5,0x56,0xc3,0x94,0x20,0x50,0x15,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x74,
+0x23,0x25,0x56,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xef,0xf0,0x22,0xe5,0x56,0xb4,
+0x20,0x0a,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x93,0x21,0xf0,0x22,0xd3,0x10,0xaf,
+0x01,0xc3,0xc0,0xd0,0x90,0x97,0x59,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xa3,0xf0,0xa3,
+0xf0,0x90,0x97,0x59,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x2d,0xc3,
+0x90,0x97,0x5c,0xe0,0x94,0xe8,0x90,0x97,0x5b,0xe0,0x94,0x03,0x40,0x0b,0x90,0x01,
+0xc6,0xe0,0x44,0x10,0xf0,0x7f,0x00,0x80,0x15,0x90,0x97,0x5b,0xe4,0x75,0xf0,0x01,
+0x12,0x42,0x81,0x7f,0x0a,0x7e,0x00,0x12,0x37,0x54,0x80,0xc5,0x7f,0x01,0xd0,0xd0,
+0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x97,0x4f,0x12,0x43,0x8b,
+0x90,0x97,0x33,0xe0,0x64,0x02,0x60,0x6e,0x90,0x97,0x33,0xe0,0x64,0x01,0x70,0x66,
+0x90,0x97,0x69,0xe0,0xff,0x04,0xf0,0x90,0x97,0x4f,0x12,0x43,0x6b,0x90,0x00,0x01,
+0xef,0x12,0x42,0x5f,0x7f,0xaf,0x7e,0x01,0x11,0x5d,0xef,0x60,0x49,0x90,0x97,0x4f,
+0x12,0x43,0x6b,0x8b,0x1e,0x8a,0x1f,0x89,0x20,0x75,0x21,0x02,0x7b,0x01,0x7a,0x01,
+0x79,0xa0,0x12,0x45,0x09,0x90,0x97,0x52,0x12,0x43,0x6b,0x8b,0x1e,0x8a,0x1f,0x89,
+0x20,0x90,0x97,0x4f,0x12,0x43,0x6b,0x12,0x29,0xd9,0xff,0xc4,0x54,0x0f,0xf5,0x21,
+0x7b,0x01,0x7a,0x01,0x79,0xa2,0x12,0x45,0x09,0x90,0x01,0xaf,0x74,0xff,0xf0,0x90,
+0x01,0xcb,0xe0,0x64,0x80,0xf0,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,
+0xc0,0xd0,0x90,0x00,0x01,0x12,0x42,0x20,0x90,0x97,0x1f,0xf0,0x90,0x00,0x03,0x12,
+0x42,0x20,0x90,0x97,0x0d,0xf0,0x12,0x29,0xd9,0x65,0x71,0x60,0x03,0x12,0x56,0xa5,
+0xd0,0xd0,0x92,0xaf,0x22,0x12,0x29,0xd9,0xf5,0x70,0x22,0x90,0x00,0x02,0x12,0x42,
+0x20,0xff,0x30,0xe0,0x25,0x12,0x29,0xd9,0x90,0x97,0x14,0xf0,0x90,0x00,0x01,0x12,
+0x42,0x20,0x90,0x97,0x15,0xf0,0xef,0xc3,0x13,0x54,0x7f,0x90,0x97,0x13,0xf0,0x90,
+0x00,0x03,0x12,0x42,0x20,0x90,0x97,0x19,0xf0,0x22,0x90,0x97,0x14,0x74,0x01,0xf0,
+0x90,0x97,0x15,0x74,0x03,0xf0,0x90,0x97,0x13,0x74,0x14,0xf0,0x90,0x97,0x19,0x74,
+0x05,0xf0,0x22,0x12,0x29,0xd9,0x30,0xe0,0x18,0xc3,0x13,0x54,0x7f,0x90,0x97,0x18,
+0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x90,0x97,0x16,0xe4,0xf0,0xa3,0xef,0xf0,
+0x22,0x90,0x97,0x18,0x74,0x07,0xf0,0x90,0x97,0x16,0xe4,0xf0,0xa3,0x74,0x02,0xf0,
+0x22,0x90,0x02,0x09,0xe0,0xfd,0x12,0x29,0xd9,0xfe,0xaf,0x05,0xed,0x2e,0x90,0x97,
+0x25,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x97,0x26,0xf0,0x90,
+0x00,0x02,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x97,0x27,0xf0,0x90,0x00,0x03,0x12,
+0x42,0x20,0xff,0xed,0x2f,0x90,0x97,0x28,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff,
+0xae,0x05,0xed,0x2f,0x90,0x97,0x29,0xf0,0x22,0x12,0x29,0xd9,0x90,0x97,0x42,0xf0,
+0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x96,0xfd,0x12,0x43,0x8b,0x90,0x96,
+0xfd,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,0xfa,0xe5,0xf0,0x24,0x00,0xff,
+0xe4,0x3a,0xfe,0x90,0x96,0xfd,0x12,0x43,0x6b,0x90,0x00,0x01,0xee,0x8f,0xf0,0x12,
+0x43,0x19,0x12,0x29,0xd9,0xff,0x60,0x2c,0xb5,0x22,0x16,0x90,0x96,0xfd,0x12,0x43,
+0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,0x65,0x24,0x70,0x04,0xe5,0x23,0x65,0xf0,0x60,
+0x22,0x90,0x96,0xfd,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,0xff,0xae,0xf0,
+0x51,0xa8,0x80,0x0f,0x90,0x96,0xfd,0x12,0x43,0x6b,0x12,0x29,0xd9,0x65,0x22,0x60,
+0x02,0x91,0xe2,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x97,0x00,0xee,0xf0,0xa3,0xef,0xf0,
+0x75,0x22,0x01,0x8e,0x23,0xf5,0x24,0xe4,0xfd,0x7f,0x0b,0x51,0xea,0xe4,0xfd,0x7f,
+0x02,0x51,0xea,0x71,0xc0,0xe4,0xff,0x71,0xb4,0xe4,0xf5,0x26,0x90,0x01,0xc9,0xe5,
+0x26,0xf0,0x90,0x97,0x00,0xe0,0xfc,0xa3,0xe0,0xfd,0xec,0xfb,0x8d,0x44,0xe4,0xf5,
+0x45,0x7d,0x01,0x7f,0x60,0x7e,0x01,0x02,0x35,0xab,0xd3,0x10,0xaf,0x01,0xc3,0xc0,
+0xd0,0x90,0x97,0x03,0xed,0xf0,0x90,0x97,0x02,0xef,0xf0,0xd3,0x94,0x07,0x50,0x4f,
+0xa3,0xe0,0x70,0x1a,0x90,0x97,0x02,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,
+0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0,0x5f,0xf0,0x80,0x17,0x90,0x97,
+0x02,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,
+0x00,0x47,0xe0,0x4f,0xf0,0x12,0x4e,0x47,0x90,0x97,0x02,0xe0,0xff,0x74,0x01,0xa8,
+0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0x80,0x5a,0x90,
+0x97,0x02,0xe0,0x24,0xf8,0xf0,0xa3,0xe0,0x70,0x1d,0x90,0x97,0x02,0xe0,0xff,0x74,
+0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,
+0x00,0x43,0xe0,0x5f,0xf0,0x80,0x1a,0x90,0x97,0x02,0xe0,0xff,0x74,0x01,0xa8,0x07,
+0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,0x43,0xe0,0x4f,
+0xf0,0x12,0x4e,0x47,0x90,0x97,0x02,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,
+0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x12,0x4e,0x47,0xd0,
+0xd0,0x92,0xaf,0x22,0x90,0x01,0xca,0xe5,0x25,0xf0,0xef,0x60,0x02,0x91,0x21,0x22,
+0x7f,0x0b,0x91,0x41,0xef,0x65,0x25,0x60,0x10,0xe5,0x25,0xb4,0x01,0x05,0xe4,0xf5,
+0x25,0x80,0x03,0x75,0x25,0x01,0x7f,0x01,0x22,0x7f,0x00,0x22,0xe5,0x22,0x64,0x01,
+0x70,0x3e,0x71,0xc0,0xbf,0x01,0x04,0x7f,0x01,0x71,0xb4,0x90,0x00,0x46,0xe0,0x44,
+0x04,0xfd,0x7f,0x46,0x12,0x4f,0x45,0x90,0x00,0x44,0xe0,0x54,0xfb,0xfd,0x7f,0x44,
+0x12,0x4f,0x45,0x90,0x00,0x46,0xe0,0x54,0xfb,0xfd,0x7f,0x46,0x12,0x4f,0x45,0x7f,
+0x02,0x91,0x41,0x8f,0x26,0x90,0x01,0xc9,0xe5,0x26,0xf0,0xb4,0x01,0x02,0x91,0x21,
+0x22,0x90,0x00,0x49,0xe0,0x90,0x97,0x6a,0xf0,0xe0,0x54,0x0f,0xf0,0x44,0xf0,0xfd,
+0x7f,0x49,0x12,0x4f,0x45,0x90,0x97,0x6a,0xe0,0x44,0xb0,0xfd,0x7f,0x49,0x02,0x4f,
+0x45,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x97,0x6d,0xef,0xf0,0xd3,0x94,0x07,
+0x50,0x47,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,
+0xff,0x90,0x00,0x46,0xe0,0x5f,0xf0,0x12,0x4e,0x47,0x90,0x97,0x6d,0xe0,0xfd,0x74,
+0x01,0x7e,0x00,0xa8,0x05,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,
+0x90,0x00,0x44,0xe0,0xfb,0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,
+0xe7,0x13,0xce,0x13,0xd8,0xf8,0xff,0x80,0x44,0x90,0x97,0x6d,0xe0,0x24,0xf8,0xf0,
+0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0x12,0x4e,0x3f,
+0x90,0x97,0x6d,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8,0x05,0x08,0x80,0x05,0xc3,0x33,
+0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x42,0xe0,0xfb,0xe4,0xfe,0xef,0x5b,0xa8,
+0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13,0xd8,0xf8,0xff,0xd0,0xd0,0x92,
+0xaf,0x22,0xe4,0xf5,0x22,0x7f,0x60,0x7e,0x01,0x02,0x44,0xf3,0xd3,0x10,0xaf,0x01,
+0xc3,0xc0,0xd0,0x90,0x97,0x2b,0xe0,0x90,0x96,0xfe,0xf0,0x90,0x97,0x2c,0xe0,0xf5,
+0x61,0xa3,0xe0,0xf5,0x62,0xe4,0xf5,0x5e,0x74,0x2e,0x25,0x5e,0xf5,0x82,0xe4,0x34,
+0x97,0xf5,0x83,0xe0,0xff,0x74,0x63,0x25,0x5e,0xf8,0xa6,0x07,0x05,0x5e,0xe5,0x5e,
+0xb4,0x04,0xe5,0x90,0x96,0xfe,0xe0,0x12,0x43,0x94,0x75,0x49,0x00,0x76,0x71,0x01,
+0x75,0x4f,0x02,0x75,0x4f,0x03,0x75,0x4f,0x04,0x76,0x71,0x05,0x76,0x41,0x80,0x76,
+0x57,0x81,0x76,0x71,0x82,0x00,0x00,0x76,0x6d,0xaf,0x66,0xd1,0x78,0xc1,0x71,0x90,
+0x96,0xfe,0xe0,0xff,0xb4,0x02,0x08,0x90,0x96,0xfd,0x74,0x01,0xf0,0x80,0x0f,0xef,
+0x90,0x96,0xfd,0xb4,0x03,0x05,0x74,0x02,0xf0,0x80,0x03,0x74,0x04,0xf0,0xc3,0xe5,
+0x61,0x94,0x08,0x50,0x49,0xe4,0xf5,0x5e,0x90,0x96,0xfd,0xe0,0xff,0xe5,0x5e,0xc3,
+0x9f,0x40,0x02,0xc1,0x71,0xc3,0xe5,0x61,0x94,0x01,0x50,0x14,0xe5,0x5e,0x25,0x62,
+0xff,0xc3,0x74,0x03,0x95,0x5e,0x24,0x63,0xf8,0xe6,0xfd,0x12,0x4f,0x45,0x80,0x1a,
+0xc3,0x74,0x03,0x95,0x5e,0x24,0x63,0xf8,0xe6,0xff,0xe5,0x5e,0x7c,0x00,0x25,0x62,
+0xfd,0xec,0x35,0x61,0x8d,0x82,0xf5,0x83,0xef,0xf0,0x05,0x5e,0x80,0xba,0xc3,0xe5,
+0x61,0x94,0x10,0x40,0x02,0xc1,0x71,0x90,0x96,0xfe,0xe0,0x64,0x04,0x60,0x02,0xc1,
+0x71,0xaf,0x64,0xfc,0xfd,0xfe,0x78,0x10,0x12,0x2a,0x6c,0xc0,0x04,0xc0,0x05,0xc0,
+0x06,0xc0,0x07,0xaf,0x63,0xe4,0xfc,0xfd,0xfe,0x78,0x18,0x12,0x2a,0x6c,0xd0,0x03,
+0xd0,0x02,0xd0,0x01,0xd0,0x00,0x12,0x43,0x46,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,
+0x07,0xaf,0x65,0xe4,0xfc,0xfd,0xfe,0x78,0x08,0x12,0x2a,0x6c,0xd0,0x03,0xd0,0x02,
+0xd0,0x01,0xd0,0x00,0x12,0x43,0x46,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,0x07,0xaf,
+0x66,0xe4,0xfc,0xfd,0xfe,0x12,0x43,0x46,0xa3,0x12,0x2a,0x7f,0x90,0x96,0xff,0x12,
+0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0xaf,0x62,0xae,0x61,0x12,0x2f,0xd9,0x80,
+0x30,0xe5,0x65,0x7f,0x00,0xfe,0xef,0x25,0x66,0xf5,0x60,0xe4,0x3e,0xf5,0x5f,0xaf,
+0x60,0xfe,0x12,0x37,0x54,0x80,0x1a,0xe5,0x65,0x7f,0x00,0xfe,0xef,0x25,0x66,0xf5,
+0x60,0xe4,0x3e,0xf5,0x5f,0xaf,0x60,0xfe,0x12,0x36,0xcb,0x80,0x04,0x7f,0x00,0x80,
+0x02,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x67,0xe4,0x90,0x97,0x03,0xf0,0xe5,
+0x67,0x14,0xfe,0x90,0x97,0x03,0xe0,0xff,0xc3,0x9e,0x50,0x0e,0xef,0x04,0xfd,0x12,
+0x34,0xb7,0x90,0x97,0x03,0xe0,0x04,0xf0,0x80,0xe5,0xe5,0x67,0x14,0xff,0x7d,0xff,
+0x12,0x34,0xb7,0x90,0x97,0x03,0xe5,0x67,0xf0,0x90,0x97,0x03,0xe0,0xc3,0x94,0xff,
+0x50,0x0f,0xe0,0xff,0x04,0xfd,0x12,0x34,0xb7,0x90,0x97,0x03,0xe0,0x04,0xf0,0x80,
+0xe8,0xad,0x67,0x7f,0xff,0x02,0x34,0xb7,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xe4,
+0xf5,0x58,0x75,0x59,0x04,0xf5,0x5a,0xf5,0x5c,0xf5,0x5d,0x90,0x02,0x09,0xe0,0xff,
+0x12,0x29,0xd9,0xfe,0xef,0x2e,0xf5,0x5b,0x30,0xe0,0x08,0x75,0x56,0x00,0x75,0x57,
+0x80,0x80,0x05,0xe4,0xf5,0x56,0xf5,0x57,0xe5,0x5b,0xc3,0x13,0x90,0xfd,0x10,0xf0,
+0x74,0x20,0x25,0x58,0xf5,0x58,0xad,0x57,0xe5,0x58,0x2d,0xff,0x24,0x01,0xf5,0x82,
+0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x90,0x97,0x2b,0xf0,0x74,0x02,0x2f,0xf5,0x82,0xe4,
+0x34,0xfc,0xf5,0x83,0xe0,0xfe,0xe5,0x58,0x2d,0x24,0x03,0xf5,0x82,0xe4,0x34,0xfc,
+0xf5,0x83,0xe0,0x24,0x00,0xff,0xe4,0x3e,0x90,0x97,0x2c,0xf0,0xa3,0xef,0xf0,0x7f,
+0x04,0xe5,0x58,0x25,0x57,0x2f,0x24,0x00,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,
+0xfe,0x74,0x2a,0x2f,0xf5,0x82,0xe4,0x34,0x97,0xf5,0x83,0xee,0xf0,0x0f,0xbf,0x08,
+0xe0,0x91,0xec,0xef,0x70,0x3f,0x90,0x01,0xc3,0xe0,0x60,0x25,0xc3,0xe5,0x5d,0x94,
+0xe8,0xe5,0x5c,0x94,0x03,0x40,0x09,0x90,0x01,0xc6,0xe0,0x44,0x10,0xf0,0x80,0x63,
+0x05,0x5d,0xe5,0x5d,0x70,0x02,0x05,0x5c,0x7f,0x0a,0x7e,0x00,0x12,0x37,0x54,0x80,
+0xd5,0x90,0x01,0xc6,0xe0,0x90,0x01,0xc3,0x30,0xe2,0x05,0x74,0xfe,0xf0,0x80,0x43,
+0x74,0xff,0xf0,0x80,0x3e,0xe5,0x58,0xb4,0x78,0x23,0xe4,0xf5,0x58,0x05,0x5b,0xe5,
+0x57,0x64,0x80,0x45,0x56,0x70,0x06,0xf5,0x56,0xf5,0x57,0x80,0x06,0x75,0x56,0x00,
+0x75,0x57,0x80,0xe5,0x5b,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x80,0x06,0x74,0x08,0x25,
+0x58,0xf5,0x58,0xe5,0x5a,0x15,0x5a,0x70,0x02,0x15,0x59,0xe5,0x5a,0x45,0x59,0x60,
+0x02,0xe1,0x06,0xd0,0xd0,0x92,0xaf,0x22,0x22,0xe4,0x90,0x97,0x32,0xf0,0x90,0x00,
+0x80,0xe0,0x44,0x80,0xfd,0x7f,0x80,0x02,0x4f,0x45,0xe4,0xf5,0x25,0x22,0xe4,0x90,
+0x97,0x42,0xf0,0x90,0x97,0x3c,0xe0,0x54,0xfe,0xf0,0x54,0xfb,0xf0,0xe4,0xa3,0xf0,
+0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x97,0x36,0xe0,0x54,0xfe,0xf0,0x54,
+0xfb,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x22,0x11,0x68,
+0xef,0x70,0x06,0x90,0x01,0xc8,0x74,0xfd,0xf0,0x11,0xb5,0x90,0x97,0x3d,0x74,0x02,
+0xf0,0x22,0x11,0x46,0x80,0xe8,0x90,0x01,0x3e,0x74,0x03,0xf0,0xfd,0x7f,0x02,0x12,
+0x37,0x00,0x90,0x97,0x3d,0x74,0x01,0xf0,0x22,0x11,0x46,0x90,0x05,0x22,0x74,0xff,
+0xf0,0x90,0x97,0x3d,0x74,0x04,0xf0,0x22,0x90,0x05,0x22,0x74,0xff,0xf0,0xe4,0x90,
+0x97,0x63,0xf0,0xa3,0xf0,0x90,0x05,0xf8,0xe0,0x70,0x0f,0xa3,0xe0,0x70,0x0b,0xa3,
+0xe0,0x70,0x07,0xa3,0xe0,0x70,0x03,0x7f,0x01,0x22,0xd3,0x90,0x97,0x64,0xe0,0x94,
+0xe8,0x90,0x97,0x63,0xe0,0x94,0x03,0x40,0x03,0x7f,0x00,0x22,0x7f,0x32,0x7e,0x00,
+0x12,0x37,0x54,0x90,0x97,0x63,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x80,0xc6,0x90,
+0x05,0x22,0x74,0xff,0xf0,0x7f,0x78,0x7e,0x08,0x12,0x27,0xde,0x90,0x96,0xdd,0x12,
+0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,0x96,0xe1,0x12,0x2a,0x7f,0x7f,
+0x00,0x7e,0x08,0x12,0x27,0xde,0x90,0x96,0xe5,0x12,0x2a,0x7f,0x90,0x97,0x35,0xe0,
+0x90,0x96,0xdd,0xb4,0x01,0x0d,0x12,0x43,0x53,0xef,0x54,0xc7,0xff,0xed,0x54,0xc7,
+0xfd,0x80,0x07,0x12,0x43,0x53,0xef,0x54,0xc7,0xff,0xec,0x90,0x80,0x85,0x12,0x2a,
+0x7f,0x7f,0x78,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x96,0xe1,0x12,0x43,0x53,0xef,0x54,
+0x0f,0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,
+0x90,0x96,0xe5,0x12,0x43,0x53,0xef,0x44,0x02,0xff,0xec,0x90,0x80,0x85,0x12,0x2a,
+0x7f,0x7f,0x00,0x7e,0x08,0x12,0x2f,0xd9,0x7f,0x70,0x7e,0x0e,0x12,0x27,0xde,0x90,
+0x96,0xe9,0x12,0x2a,0x7f,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa0,0x7f,
+0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,
+0xe4,0xfd,0xff,0x12,0x34,0x81,0x90,0x97,0x35,0xe0,0xb4,0x01,0x11,0x90,0x80,0x59,
+0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe4,0xfd,0x7f,0x01,0x12,0x34,0x81,0x90,0x00,
+0x11,0xe0,0x54,0xf6,0xf0,0x02,0x4e,0x47,0x11,0xaf,0x90,0x97,0x3d,0x74,0x02,0xf0,
+0x22,0x11,0xb5,0x90,0x97,0x3d,0x74,0x02,0xf0,0x22,0x11,0xaf,0x90,0x97,0x37,0x74,
+0x04,0xf0,0x22,0x90,0x05,0x22,0x74,0xff,0xf0,0x90,0x97,0x3d,0x74,0x04,0xf0,0x22,
+0x12,0x4d,0xc1,0x90,0x97,0x3d,0x74,0x04,0xf0,0x22,0x90,0x05,0x22,0x74,0xff,0xf0,
+0x90,0x97,0x37,0x74,0x05,0xf0,0x22,0x90,0x05,0x22,0x74,0xff,0xf0,0x90,0x97,0x37,
+0x74,0x02,0xf0,0x22,0x90,0x05,0x22,0x74,0x6f,0xf0,0x90,0x97,0x37,0x74,0x06,0xf0,
+0x22,0x90,0x05,0x22,0xe4,0xf0,0x90,0x97,0x37,0x04,0xf0,0x22,0x90,0x05,0x22,0xe4,
+0xf0,0x90,0x97,0x37,0xf0,0x22,0xae,0x07,0xe4,0xff,0x12,0x4c,0x21,0xef,0x60,0x19,
+0x90,0x97,0x36,0xe0,0xc4,0x13,0x13,0x54,0x03,0x20,0xe0,0x0d,0xaf,0x06,0x7d,0x01,
+0x12,0x47,0xab,0x12,0x55,0xce,0x7f,0x01,0x22,0x7f,0x00,0x22,0x90,0x01,0x57,0xe0,
+0x60,0x43,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x97,0x20,
+0xe0,0x60,0x0a,0xe4,0xf0,0x90,0x97,0x21,0xe0,0x54,0xfd,0xf0,0x22,0x90,0x97,0x0f,
+0xe0,0x04,0xf0,0x90,0x97,0x21,0xe0,0x54,0xef,0xf0,0x90,0x97,0x14,0xe0,0xff,0x90,
+0x97,0x0f,0xe0,0xd3,0x9f,0x40,0x0e,0xe5,0x70,0xb4,0x01,0x09,0x90,0x97,0x10,0xe0,
+0x70,0x03,0xe0,0x04,0xf0,0x22,0x90,0x97,0x35,0xe0,0x90,0x96,0xed,0xf0,0x22,0xef,
+0x70,0x02,0x81,0x25,0x90,0x96,0xed,0xe0,0x60,0x02,0xe1,0xf0,0x90,0x96,0xd9,0x12,
+0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x08,0x12,0x2f,0xd9,0x90,
+0x96,0x85,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x44,0x7e,0x08,0x12,
+0x2f,0xd9,0x90,0x96,0x89,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x5c,
+0x7e,0x08,0x12,0x2f,0xd9,0x90,0x96,0x8d,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,
+0x7f,0x7f,0x6c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x96,0x91,0x12,0x43,0x53,0x90,0x80,
+0x85,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x96,0x95,0x12,0x43,
+0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x74,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x96,
+0x99,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x0e,0x12,0x2f,
+0xd9,0x90,0x96,0x9d,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x7c,0x7e,
+0x0e,0x12,0x2f,0xd9,0x90,0x96,0xa1,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,
+0x7f,0x80,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x96,0xa5,0x12,0x43,0x53,0x90,0x80,0x85,
+0x12,0x2a,0x7f,0x7f,0x84,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x96,0xa9,0x12,0x43,0x53,
+0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x88,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x96,0xad,
+0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x0e,0x12,0x2f,0xd9,
+0x90,0x96,0xb1,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xd0,0x7e,0x0e,
+0x12,0x2f,0xd9,0x90,0x96,0xb5,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,
+0xd4,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x96,0xb9,0x12,0x43,0x53,0x90,0x80,0x85,0x12,
+0x2a,0x7f,0x7f,0xd8,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x96,0xbd,0x12,0x43,0x53,0x90,
+0x80,0x85,0x12,0x2a,0x7f,0x7f,0xdc,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x96,0xc1,0x12,
+0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xe0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,
+0x96,0xc5,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xec,0x7e,0x0e,0x12,
+0x2f,0xd9,0x90,0x96,0xc9,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,
+0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x96,0xcd,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,
+0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x2f,0xd9,0x90,0x96,0xd1,0x12,0x43,0x53,0x90,0x80,
+0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f,0xd9,0x90,0x96,0xd5,0x12,0x43,
+0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x96,
+0xed,0x74,0x01,0xf0,0x22,0x90,0x96,0xed,0xe0,0x64,0x01,0x60,0x02,0xe1,0xf0,0x7f,
+0x8c,0x7e,0x08,0x12,0x27,0xde,0x90,0x96,0xd9,0x12,0x2a,0x7f,0x7f,0x44,0x7e,0x08,
+0x12,0x27,0xde,0x90,0x96,0x85,0x12,0x2a,0x7f,0x7f,0x5c,0x7e,0x08,0x12,0x27,0xde,
+0x90,0x96,0x89,0x12,0x2a,0x7f,0x7f,0x6c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x96,0x8d,
+0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12,0x27,0xde,0x90,0x96,0x91,0x12,0x2a,0x7f,
+0x7f,0x74,0x7e,0x0e,0x12,0x27,0xde,0x90,0x96,0x95,0x12,0x2a,0x7f,0x7f,0x78,0x7e,
+0x0e,0x12,0x27,0xde,0x90,0x96,0x99,0x12,0x2a,0x7f,0x7f,0x7c,0x7e,0x0e,0x12,0x27,
+0xde,0x90,0x96,0x9d,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x0e,0x12,0x27,0xde,0x90,0x96,
+0xa1,0x12,0x2a,0x7f,0x7f,0x84,0x7e,0x0e,0x12,0x27,0xde,0x90,0x96,0xa5,0x12,0x2a,
+0x7f,0x7f,0x88,0x7e,0x0e,0x12,0x27,0xde,0x90,0x96,0xa9,0x12,0x2a,0x7f,0x7f,0x8c,
+0x7e,0x0e,0x12,0x27,0xde,0x90,0x96,0xad,0x12,0x2a,0x7f,0x7f,0xd0,0x7e,0x0e,0x12,
+0x27,0xde,0x90,0x96,0xb1,0x12,0x2a,0x7f,0x7f,0xd4,0x7e,0x0e,0x12,0x27,0xde,0x90,
+0x96,0xb5,0x12,0x2a,0x7f,0x7f,0xd8,0x7e,0x0e,0x12,0x27,0xde,0x90,0x96,0xb9,0x12,
+0x2a,0x7f,0x7f,0xdc,0x7e,0x0e,0x12,0x27,0xde,0x90,0x96,0xbd,0x12,0x2a,0x7f,0x7f,
+0xe0,0x7e,0x0e,0x12,0x27,0xde,0x90,0x96,0xc1,0x12,0x2a,0x7f,0x7f,0xec,0x7e,0x0e,
+0x12,0x27,0xde,0x90,0x96,0xc5,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,
+0x90,0x96,0xc9,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x27,0xde,0x90,0x96,0xcd,
+0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde,0x90,0x96,0xd1,0x12,0x2a,0x7f,
+0x7f,0x04,0x7e,0x08,0x12,0x27,0xde,0x90,0x96,0xd5,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,
+0x08,0x12,0x27,0xde,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,0x12,0x43,0x53,
+0xed,0x44,0xc0,0xfd,0xec,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,0x12,0x43,
+0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,
+0x85,0x12,0x2a,0x8b,0x00,0x01,0x00,0x00,0x7f,0x44,0x7e,0x08,0x12,0x2f,0xd9,0x90,
+0x80,0x85,0x12,0x2a,0x8b,0x00,0xdb,0x25,0xa4,0x7f,0x5c,0x7e,0x08,0x12,0x2f,0xd9,
+0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0x6c,0x7e,0x0e,0x12,0x2f,
+0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0x70,0x7e,0x0e,0x12,
+0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x74,0x7e,0x0e,
+0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x78,0x7e,
+0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x7c,
+0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,
+0x80,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x63,0xdb,0x25,0xa4,
+0x7f,0x84,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,
+0xa4,0x7f,0x88,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,
+0x25,0xa4,0x7f,0x8c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,
+0xdb,0x25,0xa4,0x7f,0xd0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,
+0x20,0xdb,0x25,0xa4,0x7f,0xd4,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,
+0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd8,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,
+0x2a,0x8b,0x00,0x1b,0x25,0xa4,0x7f,0xdc,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,
+0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa4,0x7f,0xe0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,
+0x85,0x12,0x2a,0x8b,0x24,0xdb,0x25,0xa4,0x7f,0xec,0x7e,0x0e,0x12,0x2f,0xd9,0x7f,
+0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,0x12,
+0x43,0x53,0xe4,0xff,0xec,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,0x12,0x43,
+0x53,0xef,0x44,0x11,0xff,0xec,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,0x12,
+0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x7f,
+0x04,0x7e,0x0d,0x12,0x27,0xde,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,0x12,
+0x43,0x53,0xef,0x54,0xf0,0xff,0xec,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,
+0x12,0x43,0x53,0xef,0x44,0x01,0xff,0xec,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,
+0x5d,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x2f,
+0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,
+0x5d,0x12,0x43,0x53,0xe4,0xff,0xec,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,
+0x12,0x43,0x53,0xef,0x44,0x11,0xff,0xec,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,
+0x5d,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f,
+0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,
+0x5d,0x12,0x43,0x53,0xed,0x54,0x0f,0xfd,0xec,0x54,0xf0,0xfc,0x90,0x97,0x5d,0x12,
+0x2a,0x7f,0x90,0x97,0x5d,0x12,0x43,0x53,0xed,0x44,0x10,0xfd,0xec,0x44,0x01,0xfc,
+0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,0x12,0x43,0x53,0x90,0x80,0x85,0x12,
+0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f,0xd9,0x7f,0x04,0x7e,0x08,0x12,0x27,0xde,
+0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,0x12,0x43,0x53,0xef,0x54,0xf0,0xff,
+0xec,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,0x12,0x43,0x53,0xef,0x44,0x01,
+0xff,0xec,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,0x12,0x43,0x53,0x90,0x80,
+0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08,0x12,0x2f,0xd9,0xe4,0x90,0x96,0xed,0xf0,
+0x22,0x00,0xa7,0x4c,};
+
+// =================== v79 UMC A Cut P2PPS 2011-10-06 =====================
+u8 Rtl8192CUFwUMCACutImgArray[UMCACutImgArrayLength] = {
+0xc1,0x88,0x02,0x05,0x4f,0x00,0x00,0x00,0x0a,0x06,0x18,0x09,0xf4,0x3f,0x01,0x00,
+0x61,0x80,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x02,0x43,0xba,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x02,0x51,0x30,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x02,0x64,0xfb,0x00,0x00,0x00,0x00,0x00,0xa1,0x53,0x00,0x00,0x00,
+0x05,0x04,0x03,0x02,0x00,0x03,0x06,0x05,0x04,0x03,0x00,0x04,0x06,0x05,0x04,0x02,
+0x00,0x04,0x08,0x07,0x06,0x04,0x00,0x06,0x0a,0x09,0x08,0x06,0x00,0x08,0x0a,0x09,
+0x08,0x04,0x00,0x08,0x0a,0x09,0x08,0x02,0x00,0x08,0x0a,0x09,0x08,0x00,0x00,0x08,
+0x12,0x11,0x10,0x08,0x00,0x10,0x1a,0x19,0x18,0x10,0x00,0x18,0x22,0x21,0x20,0x18,
+0x00,0x20,0x22,0x21,0x20,0x10,0x00,0x20,0x22,0x21,0x20,0x08,0x00,0x20,0x22,0x21,
+0x1c,0x08,0x00,0x20,0x22,0x21,0x14,0x08,0x00,0x20,0x22,0x20,0x18,0x08,0x00,0x20,
+0x31,0x30,0x20,0x10,0x00,0x30,0x31,0x30,0x18,0x00,0x00,0x30,0x31,0x2f,0x10,0x10,
+0x00,0x30,0x31,0x2c,0x10,0x10,0x00,0x30,0x31,0x28,0x10,0x00,0x00,0x30,0x31,0x20,
+0x10,0x00,0x00,0x30,0x31,0x10,0x10,0x00,0x00,0x30,0x04,0x04,0x04,0x05,0x04,0x04,
+0x05,0x07,0x07,0x07,0x08,0x0a,0x04,0x04,0x04,0x04,0x06,0x0a,0x0b,0x0d,0x05,0x05,
+0x07,0x07,0x08,0x0b,0x0d,0x0f,0x04,0x04,0x04,0x05,0x07,0x07,0x09,0x09,0x0c,0x0e,
+0x10,0x12,0x04,0x04,0x05,0x05,0x06,0x0a,0x11,0x13,0x09,0x09,0x09,0x09,0x0c,0x0e,
+0x11,0x13,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x24,0x26,0x2a,0x18,0x1a,
+0x1d,0x1f,0x21,0x27,0x29,0x2a,0x00,0x00,0x00,0x1f,0x23,0x28,0x2a,0x2c,0x00,0x04,
+0x00,0x04,0x00,0x08,0x00,0x10,0x00,0x18,0x00,0x24,0x00,0x30,0x00,0x48,0x00,0x60,
+0x00,0x90,0x00,0xc0,0x00,0xd8,0x00,0x50,0x00,0x78,0x00,0xa0,0x00,0xc8,0x01,0x40,
+0x01,0x90,0x01,0xe0,0x02,0x30,0x01,0x2c,0x01,0x40,0x01,0xe0,0x02,0xd0,0x03,0xe8,
+0x04,0xb0,0x06,0x40,0x07,0xd0,0x00,0x02,0x00,0x02,0x00,0x04,0x00,0x08,0x00,0x0c,
+0x00,0x12,0x00,0x18,0x00,0x24,0x00,0x30,0x00,0x48,0x00,0x60,0x00,0x6c,0x00,0x28,
+0x00,0x3c,0x00,0x50,0x00,0x64,0x00,0xa0,0x00,0xc8,0x00,0xf0,0x01,0x18,0x00,0x64,
+0x00,0xa0,0x00,0xf0,0x01,0x68,0x01,0xf4,0x02,0x58,0x03,0x20,0x03,0xe8,0x02,0x02,
+0x02,0x02,0x02,0x02,0x03,0x03,0x04,0x04,0x05,0x07,0x04,0x04,0x07,0x0a,0x0a,0x0c,
+0x0c,0x12,0x05,0x07,0x07,0x08,0x0b,0x12,0x24,0x3c,0x01,0x01,0x01,0x01,0x01,0x02,
+0x03,0x04,0x05,0x06,0x07,0x08,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x05,0x06,
+0x07,0x08,0x09,0x0a,0x0b,0x0c,0x20,0x1e,0x1c,0x18,0x10,0x18,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0xbb,0x01,0x0c,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0x22,0x50,
+0x06,0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,0x25,0x82,0xf8,0xe2,0x22,
+0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe4,0x93,0x22,0xbb,0x01,0x06,
+0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8,
+0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22,
+0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2,
+0x22,0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0,0xc5,0xf0,0xf8,0xe5,0x82,0x15,0x82,0x70,
+0x02,0x15,0x83,0xe0,0x38,0xf0,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a,0x83,0xe0,0xf5,
+0xf0,0xa3,0xe0,0x22,0x50,0x06,0x87,0xf0,0x09,0xe7,0x19,0x22,0xbb,0xfe,0x07,0xe3,
+0xf5,0xf0,0x09,0xe3,0x19,0x22,0x89,0x82,0x8a,0x83,0xe4,0x93,0xf5,0xf0,0x74,0x01,
+0x93,0x22,0xbb,0x01,0x10,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,
+0xf5,0xf0,0xa3,0xe0,0x22,0x50,0x09,0xe9,0x25,0x82,0xf8,0x86,0xf0,0x08,0xe6,0x22,
+0xbb,0xfe,0x0a,0xe9,0x25,0x82,0xf8,0xe2,0xf5,0xf0,0x08,0xe2,0x22,0xe5,0x83,0x2a,
+0xf5,0x83,0xe9,0x93,0xf5,0xf0,0xa3,0xe9,0x93,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a,
+0x83,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x06,0xf7,0x09,0xa7,0xf0,0x19,0x22,0xbb,
+0xfe,0x06,0xf3,0xe5,0xf0,0x09,0xf3,0x19,0x22,0xf8,0xbb,0x01,0x11,0xe5,0x82,0x29,
+0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x09,
+0xe9,0x25,0x82,0xc8,0xf6,0x08,0xa6,0xf0,0x22,0xbb,0xfe,0x09,0xe9,0x25,0x82,0xc8,
+0xf2,0xe5,0xf0,0x08,0xf2,0x22,0xef,0x4b,0xff,0xee,0x4a,0xfe,0xed,0x49,0xfd,0xec,
+0x48,0xfc,0x22,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0xa4,
+0x25,0x82,0xf5,0x82,0xe5,0xf0,0x35,0x83,0xf5,0x83,0x22,0xe0,0xfb,0xa3,0xe0,0xfa,
+0xa3,0xe0,0xf9,0x22,0xf8,0xe0,0xfb,0xa3,0xa3,0xe0,0xf9,0x25,0xf0,0xf0,0xe5,0x82,
+0x15,0x82,0x70,0x02,0x15,0x83,0xe0,0xfa,0x38,0xf0,0x22,0xeb,0xf0,0xa3,0xea,0xf0,
+0xa3,0xe9,0xf0,0x22,0xd0,0x83,0xd0,0x82,0xf8,0xe4,0x93,0x70,0x12,0x74,0x01,0x93,
+0x70,0x0d,0xa3,0xa3,0x93,0xf8,0x74,0x01,0x93,0xf5,0x82,0x88,0x83,0xe4,0x73,0x74,
+0x02,0x93,0x68,0x60,0xef,0xa3,0xa3,0xa3,0x80,0xdf,0x02,0x43,0xf8,0x02,0x58,0x80,
+0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0x40,0x03,0xf6,0x80,0x01,0xf2,0x08,0xdf,0xf4,
+0x80,0x29,0xe4,0x93,0xa3,0xf8,0x54,0x07,0x24,0x0c,0xc8,0xc3,0x33,0xc4,0x54,0x0f,
+0x44,0x20,0xc8,0x83,0x40,0x04,0xf4,0x56,0x80,0x01,0x46,0xf6,0xdf,0xe4,0x80,0x0b,
+0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,0x90,0x44,0x3d,0xe4,0x7e,0x01,0x93,0x60,
+0xbc,0xa3,0xff,0x54,0x3f,0x30,0xe5,0x09,0x54,0x1f,0xfe,0xe4,0x93,0xa3,0x60,0x01,
+0x0e,0xcf,0x54,0xc0,0x25,0xe0,0x60,0xa8,0x40,0xb8,0xe4,0x93,0xa3,0xfa,0xe4,0x93,
+0xa3,0xf8,0xe4,0x93,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xf0,0xa3,0xc8,
+0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xdf,0xe9,0xde,0xe7,0x80,0xbe,0x41,0x97,0x24,
+0x00,0x41,0x97,0x67,0x00,0x41,0x97,0x0b,0x80,0x41,0x97,0x0c,0x80,0x41,0x97,0x69,
+0x00,0x00,0xf0,0x90,0x97,0x15,0xe0,0x90,0x97,0x48,0xf0,0xe4,0xfb,0xfd,0x7f,0x54,
+0x7e,0x01,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x97,0x46,0xeb,0xf0,0xa3,0xe0,
+0xfb,0xa3,0xe0,0xf5,0x44,0xe4,0xf5,0x45,0x12,0x30,0x62,0xd0,0xd0,0x92,0xaf,0x22,
+0xe4,0x90,0x97,0x47,0xf0,0x90,0x05,0x58,0xe0,0xff,0x90,0x97,0x42,0xe0,0x2f,0x24,
+0xfe,0x90,0x97,0x48,0xf0,0xe4,0xfb,0xfd,0x7f,0x50,0x7e,0x01,0x91,0x62,0x90,0x01,
+0x53,0x74,0x05,0xf0,0x22,0x90,0x01,0x5f,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x08,0xf0,
+0xe4,0x90,0x97,0x47,0xf0,0x90,0x97,0x13,0xe0,0x90,0x97,0x48,0xf0,0xe4,0xfb,0xfd,
+0x7f,0x5c,0x7e,0x01,0x91,0x62,0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,
+0x02,0xf0,0x90,0x97,0x1a,0x14,0xf0,0x90,0x97,0x1c,0xe0,0x54,0x0f,0xc3,0x94,0x0c,
+0x50,0x10,0x7d,0x01,0x7f,0x0c,0xf1,0xab,0x90,0x97,0x36,0xe0,0x30,0xe0,0x03,0x12,
+0x55,0xce,0x22,0x8f,0x82,0x8e,0x83,0xa3,0xa3,0xa3,0xe4,0xf0,0x22,0x02,0x4d,0xab,
+0x22,0x22,0x22,0x02,0x65,0x46,0x02,0x65,0x4d,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,
+0x8b,0x1b,0x8a,0x1c,0x89,0x1d,0x90,0x97,0x49,0x71,0x8b,0xab,0x1e,0xaa,0x1f,0xa9,
+0x20,0x90,0x97,0x4c,0x71,0x8b,0xaf,0x21,0x15,0x21,0xef,0x60,0x1b,0x90,0x97,0x4c,
+0xe4,0x75,0xf0,0x01,0x71,0x74,0x12,0x24,0x62,0xff,0x90,0x97,0x49,0xe4,0x75,0xf0,
+0x01,0x71,0x74,0xef,0x51,0x4d,0x80,0xde,0xab,0x1b,0xaa,0x1c,0xa9,0x1d,0xd0,0xd0,
+0x92,0xaf,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,
+0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,
+0x90,0x01,0xc4,0x74,0x53,0xf0,0x74,0x45,0xa3,0xf0,0x53,0x91,0xdf,0x90,0x01,0x3c,
+0xe0,0x55,0x30,0xf5,0x34,0xa3,0xe0,0x55,0x31,0xf5,0x35,0xa3,0xe0,0x55,0x32,0xf5,
+0x36,0xa3,0xe0,0x55,0x33,0xf5,0x37,0xe5,0x34,0x30,0xe0,0x55,0x90,0x01,0x3c,0x74,
+0x01,0xf0,0x90,0x97,0x3c,0xe0,0x30,0xe0,0x21,0x13,0x13,0x54,0x3f,0x30,0xe0,0x1a,
+0x90,0x97,0x3e,0xe4,0xf0,0x90,0x97,0x3d,0xe0,0x64,0x03,0x60,0x0d,0x7f,0x01,0x12,
+0x4c,0x21,0xef,0x70,0x05,0x7f,0x02,0x12,0x4c,0x97,0x90,0x97,0x36,0xe0,0xff,0x30,
+0xe0,0x1f,0x13,0x13,0x54,0x3f,0x30,0xe0,0x18,0x90,0x97,0x38,0xe4,0xf0,0x90,0x97,
+0x37,0xe0,0x64,0x06,0x60,0x0b,0xe4,0xff,0x12,0x4c,0x21,0xef,0x70,0x03,0x12,0x4d,
+0x79,0xe5,0x34,0x30,0xe1,0x09,0x90,0x01,0x3c,0x74,0x02,0xf0,0x12,0x68,0x59,0xe5,
+0x34,0x30,0xe2,0x38,0x90,0x01,0x3c,0x74,0x04,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe0,
+0x24,0x90,0x97,0x47,0xe4,0xf0,0x90,0x97,0x13,0xe0,0x90,0x97,0x48,0xf0,0xe4,0xfb,
+0xfd,0x7f,0x58,0x7e,0x01,0x91,0x62,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92,
+0x74,0x01,0xf0,0x80,0x07,0x90,0x97,0x1b,0xe4,0xf0,0xf1,0x98,0xe5,0x34,0x30,0xe3,
+0x38,0x90,0x01,0x3c,0x74,0x08,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe1,0x24,0x90,0x97,
+0x47,0xe4,0xf0,0x90,0x97,0x13,0xe0,0x90,0x97,0x48,0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,
+0x7e,0x01,0x91,0x62,0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,
+0x80,0x07,0x90,0x97,0x1a,0xe4,0xf0,0xf1,0x98,0xe5,0x34,0x30,0xe4,0x09,0x90,0x01,
+0x3c,0x74,0x10,0xf0,0x12,0x73,0xdc,0xe5,0x35,0x30,0xe0,0x1a,0x90,0x01,0x3d,0x74,
+0x01,0xf0,0x90,0x01,0x2f,0xe0,0x44,0x7f,0xf0,0x90,0x00,0x83,0xe0,0x90,0x97,0x1e,
+0xf0,0x12,0x67,0x55,0xf1,0x98,0xe5,0x36,0x30,0xe1,0x48,0x90,0x01,0x3e,0x74,0x02,
+0xf0,0x90,0x97,0x3c,0xe0,0x30,0xe0,0x1b,0x90,0x97,0x40,0x74,0x01,0xf0,0x90,0x97,
+0x3d,0xe0,0x64,0x03,0x60,0x0d,0x7f,0x01,0x12,0x4c,0x21,0xef,0x70,0x05,0x7f,0x02,
+0x12,0x4c,0x97,0x90,0x97,0x36,0xe0,0x30,0xe0,0x19,0x90,0x97,0x3a,0x74,0x01,0xf0,
+0x90,0x97,0x37,0xe0,0x64,0x06,0x60,0x0b,0xe4,0xff,0x12,0x4c,0x21,0xef,0x70,0x03,
+0x12,0x4d,0x79,0xe5,0x36,0x30,0xe0,0x7a,0x90,0x01,0x3e,0x74,0x01,0xf0,0x90,0x97,
+0x3c,0xe0,0x30,0xe0,0x1a,0x90,0x97,0x40,0xe4,0xf0,0x90,0x97,0x3d,0xe0,0x64,0x03,
+0x60,0x0d,0x7f,0x01,0x12,0x4c,0x21,0xef,0x60,0x05,0x7f,0x01,0x12,0x4c,0x97,0x90,
+0x97,0x36,0xe0,0x30,0xe0,0x4c,0x90,0x97,0x3a,0xe4,0xf0,0xff,0x12,0x4c,0x21,0xef,
+0x60,0x40,0x12,0x57,0x5d,0x90,0x97,0x37,0xe0,0xff,0x64,0x06,0x60,0x34,0xef,0xb4,
+0x04,0x02,0x80,0x07,0x90,0x97,0x37,0xe0,0xb4,0x05,0x04,0xe4,0xff,0x80,0x14,0x90,
+0x97,0x37,0xe0,0xb4,0x03,0x04,0x7f,0x01,0x80,0x09,0x90,0x97,0x37,0xe0,0xb4,0x02,
+0x05,0x7f,0x01,0x12,0x48,0x6f,0x90,0x97,0x1e,0xe0,0xff,0x7d,0x01,0xf1,0xab,0x12,
+0x55,0xce,0x74,0x53,0x04,0x90,0x01,0xc4,0xf0,0x74,0x45,0xa3,0xf0,0xd0,0x07,0xd0,
+0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,
+0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x90,0x97,0x36,0xe0,0x90,0x97,0x1e,0x30,
+0xe0,0x05,0xe0,0xff,0x02,0x79,0xf6,0xe0,0xff,0x7d,0x01,0x8f,0x6e,0x8d,0x6f,0xe5,
+0x6e,0x54,0x0f,0xff,0x90,0x97,0x1c,0xe0,0x54,0x0f,0x6f,0x60,0x71,0xe5,0x6e,0x30,
+0xe2,0x2b,0x90,0x97,0x1c,0xe0,0x20,0xe2,0x05,0x7f,0x01,0x12,0x66,0xde,0x90,0x97,
+0x1c,0xe0,0x30,0xe3,0x07,0xe5,0x6e,0x20,0xe3,0x02,0x80,0x6d,0x90,0x97,0x1c,0xe0,
+0x20,0xe3,0x4b,0xe5,0x6e,0x30,0xe3,0x46,0xaf,0x6f,0x02,0x66,0x7a,0x90,0x97,0x1c,
+0xe0,0x54,0x0f,0xff,0xbf,0x0c,0x0d,0xe5,0x6e,0x20,0xe3,0x08,0x12,0x65,0xbc,0xef,
+0x60,0x2c,0x11,0x49,0x90,0x97,0x1c,0xe0,0x54,0x0f,0xff,0xbf,0x04,0x0e,0xe5,0x6e,
+0x20,0xe2,0x09,0x12,0x57,0xf8,0xef,0x60,0x15,0x12,0x50,0xcd,0x90,0x97,0x1c,0xe0,
+0x54,0x0f,0xff,0xbf,0x02,0x08,0x12,0x66,0x07,0xef,0x60,0x02,0x11,0x2f,0x22,0x90,
+0x97,0x1c,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x01,0xf0,0x12,0x45,0x00,0x12,0x45,0x02,
+0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x02,0xf0,0x22,0x90,0x06,0x04,0xe0,0x44,0x40,0xf0,
+0xe5,0x70,0xb4,0x01,0x05,0x7f,0x01,0x12,0x66,0x99,0x90,0x97,0x1c,0xe0,0x54,0xf0,
+0xf0,0xe0,0x44,0x04,0xf0,0x22,0x11,0x49,0x90,0x97,0x37,0x74,0x01,0xf0,0x22,0x90,
+0x97,0x37,0xe0,0xfe,0x6f,0x70,0x02,0x21,0x69,0xef,0x12,0x43,0x94,0x48,0x96,0x00,
+0x48,0xc0,0x01,0x48,0xf2,0x02,0x48,0xfd,0x03,0x49,0x20,0x04,0x49,0x42,0x05,0x49,
+0x4b,0x06,0x00,0x00,0x49,0x69,0xee,0xb4,0x04,0x04,0x7f,0x01,0x21,0x83,0x90,0x97,
+0x37,0xe0,0xff,0xb4,0x05,0x03,0x02,0x79,0xec,0xef,0xb4,0x06,0x06,0x7f,0x01,0x31,
+0x74,0x80,0x0b,0x90,0x97,0x37,0xe0,0xb4,0x03,0x04,0x7f,0x01,0x31,0x6a,0xa1,0x6e,
+0x90,0x97,0x37,0xe0,0xb4,0x04,0x04,0x7f,0x01,0x31,0x83,0x90,0x97,0x37,0xe0,0x70,
+0x02,0x80,0x93,0x90,0x97,0x37,0xe0,0xfe,0xb4,0x06,0x04,0x7f,0x01,0x21,0x74,0xee,
+0xb4,0x03,0x04,0x7f,0x01,0x21,0x6a,0x90,0x97,0x37,0xe0,0x64,0x02,0x70,0x7a,0x02,
+0x79,0xe1,0x90,0x97,0x37,0xe0,0x64,0x01,0x70,0x6f,0x02,0x79,0xc7,0x90,0x97,0x37,
+0xe0,0xb4,0x04,0x04,0x7f,0x01,0x31,0x83,0x90,0x97,0x37,0xe0,0x70,0x04,0x11,0x66,
+0x80,0x0b,0x90,0x97,0x37,0xe0,0xb4,0x06,0x04,0xe4,0xff,0x31,0x74,0x02,0x57,0xe1,
+0x90,0x97,0x37,0xe0,0xfe,0xb4,0x06,0x06,0xe4,0xff,0x31,0x74,0x80,0x08,0xee,0xb4,
+0x03,0x04,0x7f,0x01,0x31,0x6a,0x90,0x97,0x37,0xe0,0xb4,0x01,0x02,0xb1,0x6e,0x02,
+0x79,0x9a,0x90,0x97,0x37,0xe0,0x70,0x21,0x02,0x79,0xba,0x90,0x97,0x37,0xe0,0xff,
+0x64,0x04,0x60,0x15,0xef,0x70,0x04,0x11,0x66,0x80,0x0b,0x90,0x97,0x37,0xe0,0xb4,
+0x03,0x04,0xe4,0xff,0x31,0x6a,0x12,0x79,0xd4,0x22,0x12,0x66,0xde,0x90,0x97,0x37,
+0x74,0x01,0xf0,0x22,0xef,0x60,0x05,0x90,0x05,0x22,0xe4,0xf0,0x90,0x97,0x37,0x74,
+0x01,0xf0,0x22,0x90,0x97,0x6c,0xef,0xf0,0xb1,0xc1,0x90,0x97,0x6c,0xe0,0x60,0x05,
+0x90,0x05,0x22,0xe4,0xf0,0xe4,0x90,0x97,0x37,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,
+0xc0,0xd0,0x90,0x96,0xfd,0x12,0x43,0x8b,0xe4,0x90,0x97,0x00,0xf0,0x12,0x24,0x62,
+0xc3,0x13,0x20,0xe0,0x02,0x41,0xe4,0x90,0x96,0xfd,0x12,0x43,0x6b,0x12,0x24,0x62,
+0xff,0x54,0x02,0xfe,0x90,0x97,0x3c,0xe0,0x54,0xfd,0x4e,0xfe,0xf0,0xef,0x54,0x01,
+0xff,0xee,0x54,0xfe,0x4f,0xff,0xf0,0x12,0x24,0x62,0xfe,0x54,0x08,0xfd,0xef,0x54,
+0xf7,0x4d,0xff,0x90,0x97,0x3c,0xf0,0xee,0x54,0x10,0xfe,0xef,0x54,0xef,0x4e,0xff,
+0xf0,0x12,0x24,0x62,0xfe,0x54,0x20,0xfd,0xef,0x54,0xdf,0x4d,0xff,0x90,0x97,0x3c,
+0xf0,0xee,0x54,0x40,0xfe,0xef,0x54,0xbf,0x4e,0xf0,0x20,0xe0,0x02,0x41,0xd4,0x90,
+0x97,0x00,0x74,0x21,0xf0,0x90,0x96,0xfd,0x12,0x43,0x6b,0x12,0x24,0x62,0xff,0x13,
+0x13,0x54,0x01,0xfe,0x90,0x97,0x3c,0xe0,0xfd,0x13,0x13,0x54,0x01,0x6e,0x60,0x2a,
+0xef,0x54,0x04,0xff,0xed,0x54,0xfb,0x4f,0xf0,0xe0,0x13,0x13,0x54,0x3f,0x30,0xe0,
+0x0e,0x90,0x01,0x34,0x74,0x40,0xf0,0xfd,0xe4,0xff,0x12,0x31,0x9d,0x80,0x0b,0xe4,
+0x90,0x97,0x3e,0xf0,0x7d,0x40,0xff,0x12,0x31,0x2c,0x90,0x97,0x3c,0xe0,0xfd,0x13,
+0x13,0x13,0x54,0x1f,0x30,0xe0,0x07,0x90,0x97,0x00,0xe0,0x44,0x12,0xf0,0xed,0xc4,
+0x54,0x0f,0x30,0xe0,0x07,0x90,0x97,0x00,0xe0,0x44,0x14,0xf0,0x90,0x97,0x3c,0xe0,
+0xc4,0x13,0x54,0x07,0x30,0xe0,0x07,0x90,0x97,0x00,0xe0,0x44,0x80,0xf0,0x90,0x97,
+0x3c,0xe0,0xc4,0x13,0x13,0x54,0x03,0x20,0xe0,0x07,0x90,0x97,0x00,0xe0,0x44,0x40,
+0xf0,0x90,0x97,0x00,0xe0,0x90,0x05,0x27,0xf0,0x90,0x97,0x3d,0xe0,0x70,0x04,0x7f,
+0x01,0x91,0x97,0x90,0x97,0x3c,0xe0,0xc4,0x13,0x13,0x54,0x03,0x30,0xe0,0x04,0x7f,
+0x03,0x80,0x0d,0x7f,0x01,0x91,0x21,0xef,0x60,0x04,0x7f,0x01,0x80,0x02,0x7f,0x02,
+0x91,0x97,0x81,0x1c,0x90,0x97,0x00,0x74,0x01,0xf0,0x90,0x05,0x27,0xf0,0xe4,0xff,
+0x91,0x97,0x81,0x19,0x90,0x96,0xfd,0x12,0x43,0x6b,0x12,0x24,0x62,0xff,0x54,0x02,
+0xfe,0x90,0x97,0x36,0xe0,0x54,0xfd,0x4e,0xfe,0xf0,0xef,0x54,0x01,0xff,0xee,0x54,
+0xfe,0x4f,0xff,0xf0,0x12,0x24,0x62,0xfe,0x54,0x08,0xfd,0xef,0x54,0xf7,0x4d,0xff,
+0x90,0x97,0x36,0xf0,0xee,0x54,0x10,0xfe,0xef,0x54,0xef,0x4e,0xff,0xf0,0x12,0x24,
+0x62,0xfe,0x54,0x40,0xfd,0xef,0x54,0xbf,0x4d,0x90,0x97,0x36,0xf0,0x20,0xe0,0x02,
+0x61,0xec,0x90,0x97,0x00,0x74,0x31,0xf0,0xee,0x13,0x13,0x54,0x01,0xff,0x90,0x97,
+0x36,0xe0,0xfe,0x13,0x13,0x54,0x01,0x6f,0x60,0x27,0x90,0x96,0xfd,0x12,0x43,0x6b,
+0x12,0x24,0x62,0x54,0x04,0xff,0xee,0x54,0xfb,0x4f,0x90,0x97,0x36,0xf0,0xe0,0x13,
+0x13,0x54,0x3f,0x20,0xe0,0x0b,0xe4,0x90,0x97,0x38,0xf0,0x7d,0x40,0xff,0x12,0x31,
+0x2c,0x90,0x97,0x36,0xe0,0xfd,0x13,0x13,0x13,0x54,0x1f,0x30,0xe0,0x07,0x90,0x97,
+0x00,0xe0,0x44,0x02,0xf0,0xed,0xc4,0x54,0x0f,0x30,0xe0,0x07,0x90,0x97,0x00,0xe0,
+0x44,0x04,0xf0,0x90,0x97,0x00,0xe0,0x54,0x06,0x60,0x0c,0x90,0x01,0x3e,0x74,0x03,
+0xf0,0xfd,0x7f,0x02,0x12,0x31,0xb7,0x90,0x97,0x00,0xe0,0x90,0x05,0x27,0xf0,0x90,
+0x97,0x36,0xe0,0xff,0xc4,0x13,0x13,0x54,0x03,0x30,0xe0,0x0c,0xa3,0xe0,0x64,0x06,
+0x60,0x5a,0x7f,0x06,0x11,0x6f,0x80,0x54,0x90,0x97,0x37,0xe0,0x64,0x06,0x70,0x17,
+0x7f,0x01,0x11,0x6f,0xe4,0xff,0x91,0x21,0xef,0x60,0x08,0x90,0x97,0x1e,0x12,0x47,
+0xa7,0x80,0x04,0xb1,0x79,0x80,0x35,0x12,0x55,0xce,0x80,0x30,0x90,0x97,0x00,0x74,
+0x01,0xf0,0x90,0x05,0x27,0xf0,0x7d,0x03,0x7f,0x02,0x12,0x31,0x49,0x90,0x97,0x37,
+0xe0,0xb4,0x06,0x04,0x7f,0x01,0x80,0x09,0x90,0x97,0x37,0xe0,0xb4,0x04,0x04,0xe4,
+0xff,0x11,0x6f,0x12,0x55,0xc0,0x12,0x47,0x98,0x12,0x77,0xfe,0xd0,0xd0,0x92,0xaf,
+0x22,0xef,0x64,0x01,0x70,0x3d,0x90,0x97,0x3f,0xe0,0x60,0x03,0x7f,0x00,0x22,0x90,
+0x97,0x34,0xe0,0x60,0x03,0x7f,0x01,0x22,0x90,0x97,0x3e,0xe0,0x60,0x03,0x7f,0x01,
+0x22,0x90,0x97,0x3c,0xe0,0xff,0x13,0x13,0x54,0x3f,0x30,0xe0,0x0b,0xef,0xc4,0x13,
+0x54,0x07,0x30,0xe0,0x03,0x7f,0x00,0x22,0x90,0x97,0x40,0xe0,0x7f,0x01,0x60,0x36,
+0x7f,0x00,0x22,0x90,0x97,0x39,0xe0,0x60,0x03,0x7f,0x00,0x22,0x90,0x97,0x34,0xe0,
+0x60,0x03,0x7f,0x01,0x22,0x90,0x97,0x38,0xe0,0x60,0x03,0x7f,0x01,0x22,0x90,0x97,
+0x36,0xe0,0x13,0x13,0x54,0x3f,0x30,0xe0,0x03,0x7f,0x00,0x22,0x90,0x97,0x3a,0xe0,
+0x7f,0x01,0x60,0x02,0x7f,0x00,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x97,
+0x3d,0xe0,0x90,0x97,0x6b,0xf0,0x6f,0x70,0x02,0xa1,0x69,0xef,0x14,0x60,0x3d,0x14,
+0x60,0x62,0x14,0x70,0x02,0xa1,0x43,0x24,0x03,0x60,0x02,0xa1,0x69,0x90,0x97,0x6b,
+0xe0,0xb4,0x03,0x04,0xf1,0xd1,0xa1,0x69,0x90,0x97,0x6b,0xe0,0xb4,0x02,0x04,0xf1,
+0xbe,0xa1,0x69,0x90,0x97,0x6b,0xe0,0xb4,0x04,0x04,0xf1,0xd5,0xa1,0x69,0x90,0x97,
+0x6b,0xe0,0x64,0x01,0x60,0x02,0xa1,0x69,0xf1,0xc0,0x80,0x7d,0x90,0x97,0x6b,0xe0,
+0xff,0xb4,0x03,0x04,0xf1,0xd9,0x80,0x71,0xef,0xb4,0x02,0x04,0xf1,0xb1,0x80,0x69,
+0x90,0x97,0x6b,0xe0,0xff,0xb4,0x04,0x04,0xf1,0xe4,0x80,0x5d,0xef,0x70,0x5a,0x12,
+0x78,0x46,0x80,0x55,0x90,0x97,0x6b,0xe0,0xb4,0x03,0x05,0x12,0x79,0x88,0x80,0x49,
+0x90,0x97,0x6b,0xe0,0xb4,0x01,0x05,0x12,0x78,0x2e,0x80,0x3d,0x90,0x97,0x6b,0xe0,
+0xb4,0x04,0x05,0x12,0x79,0x91,0x80,0x31,0x90,0x97,0x6b,0xe0,0x70,0x2b,0x12,0x78,
+0x42,0x80,0x26,0x90,0x97,0x6b,0xe0,0xff,0xb4,0x01,0x04,0xb1,0xab,0x80,0x1a,0xef,
+0xb4,0x02,0x04,0xb1,0xbd,0x80,0x12,0x90,0x97,0x6b,0xe0,0xff,0xb4,0x04,0x05,0x12,
+0x44,0xfd,0x80,0x05,0xef,0x70,0x02,0xb1,0xb8,0xd0,0xd0,0x92,0xaf,0x22,0x7f,0x01,
+0x12,0x66,0x7a,0xe4,0x90,0x97,0x37,0xf0,0x22,0x90,0x97,0x10,0xe0,0x60,0x16,0x90,
+0x97,0x37,0xe0,0x70,0x04,0x7f,0x05,0x80,0x1f,0x90,0x97,0x37,0xe0,0x64,0x01,0x70,
+0x19,0x7f,0x02,0x80,0x13,0x90,0x97,0x37,0xe0,0xb4,0x01,0x04,0x7f,0x03,0x80,0x08,
+0x90,0x97,0x37,0xe0,0x70,0x04,0x7f,0x04,0x11,0x6f,0x22,0x90,0x05,0x22,0x74,0x6f,
+0xf0,0x90,0x97,0x3d,0x74,0x03,0xf0,0x22,0x12,0x78,0x46,0x80,0xee,0xb1,0xc1,0x80,
+0xea,0x90,0x00,0x11,0xe0,0x44,0x09,0xf0,0xd1,0x47,0x90,0x96,0xdd,0x12,0x43,0x53,
+0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x78,0x7e,0x08,0x12,0x2b,0x08,0x90,0x96,0xe1,
+0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x08,
+0x90,0x96,0xe5,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x00,0x7e,0x08,
+0x12,0x2b,0x08,0x90,0x96,0xe9,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,
+0x70,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x68,0x12,0x25,0x14,0x00,0x03,0x2d,0x95,
+0xe4,0xfd,0xff,0x12,0x30,0x2c,0x90,0x97,0x35,0xe0,0xb4,0x01,0x11,0x90,0x80,0x68,
+0x12,0x25,0x14,0x00,0x03,0x2d,0x95,0xe4,0xfd,0x7f,0x01,0x12,0x30,0x2c,0x22,0xf4,
+0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x7f,0x10,
+0xdf,0xfe,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x97,
+0x66,0xed,0xf0,0x90,0x97,0x65,0xef,0xf0,0xd3,0x94,0x07,0x50,0x63,0xe0,0xff,0x74,
+0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0,
+0x5f,0xf0,0xd1,0x47,0x90,0x97,0x65,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,
+0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x46,0xe0,0x4f,0xf0,0xd1,0x47,0x90,0x97,0x66,
+0xe0,0x60,0x16,0x90,0x97,0x65,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,
+0x33,0xd8,0xfc,0xff,0x90,0x00,0x45,0x80,0x66,0x90,0x97,0x65,0xe0,0xff,0x74,0x01,
+0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x45,0x80,0x6b,
+0x90,0x97,0x65,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,
+0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xd1,0x3f,0x90,0x97,0x65,0xe0,0xff,0x74,0x01,
+0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x43,0xe0,0x4f,0xf0,
+0xd1,0x47,0x90,0x97,0x66,0xe0,0x60,0x1b,0x90,0x97,0x65,0xe0,0xff,0x74,0x01,0xa8,
+0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,0x42,0xe0,
+0x4f,0x80,0x1a,0x90,0x97,0x65,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,
+0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x42,0xe0,0x5f,0xf0,0xd1,0x47,
+0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x8f,0x82,0x75,0x83,
+0x00,0xed,0xf0,0xd1,0x47,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x01,0x3c,0x74,0xff,0xf0,
+0xa3,0xf0,0xa3,0xf0,0x90,0x01,0x34,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,
+0x54,0xf1,0x45,0x7d,0xff,0x7f,0x55,0xf1,0x45,0x7d,0xff,0x7f,0x56,0xf1,0x45,0x7d,
+0xff,0x7f,0x57,0x80,0xc0,0x90,0x01,0x30,0xe4,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,
+0x90,0x01,0x38,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,0x50,0xf1,0x45,0xe4,
+0xfd,0x7f,0x51,0xf1,0x45,0xe4,0xfd,0x7f,0x52,0xf1,0x45,0xe4,0xfd,0x7f,0x53,0x80,
+0x94,0xb1,0xc1,0x90,0x05,0x22,0xe4,0xf0,0x90,0x97,0x3d,0x04,0xf0,0x22,0xf1,0xb1,
+0x7d,0x03,0x7f,0x02,0x12,0x31,0x49,0x90,0x05,0x27,0xe4,0xf0,0x90,0x97,0x3d,0xf0,
+0x22,0xf1,0xd9,0x80,0xeb,0xf1,0xe4,0x80,0xe7,0x90,0x05,0x22,0xe4,0xf0,0x90,0x97,
+0x3d,0x04,0xf0,0x22,0x90,0x05,0x22,0xe4,0xf0,0x90,0x97,0x3d,0x04,0xf0,0x22,0xd3,
+0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x04,0x1d,0xe0,0x60,0x1a,0x90,0x05,0x22,0xe0,
+0x54,0x90,0x60,0x07,0x90,0x01,0xc6,0xe0,0x44,0x40,0xf0,0x90,0x01,0xc7,0xe0,0x30,
+0xe1,0xe4,0x7f,0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0xe0,0xff,0x7d,
+0x01,0x90,0x97,0x55,0xef,0xf0,0xa3,0xed,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xe5,0x71,
+0x60,0x04,0xe4,0xff,0x11,0xb2,0x90,0x97,0x55,0xe0,0x30,0xe0,0x09,0x90,0x97,0x57,
+0xe4,0xf0,0xa3,0x74,0x80,0xf0,0x90,0x97,0x55,0xe0,0xff,0xc3,0x13,0x90,0xfd,0x10,
+0xf0,0x90,0x04,0x25,0xef,0xf0,0x90,0x97,0x56,0xe0,0x60,0x1f,0xa3,0xa3,0xe0,0xff,
+0x24,0x0f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x74,0x10,0x2f,
+0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x90,0x97,0x57,0xa3,0xe0,
+0xff,0xfd,0x24,0x08,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe4,0xf0,0x74,0x09,0x2d,
+0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0x21,0x2f,0xf5,0x82,
+0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf7,0xf0,0x90,0x97,0x57,0xe0,0xfe,0xa3,0xe0,
+0xff,0x22,0xef,0x60,0x0b,0x90,0x97,0x35,0xe0,0xb4,0x01,0x10,0xe4,0xff,0x80,0x09,
+0x90,0x97,0x35,0xe0,0xb4,0x01,0x05,0x7f,0x01,0x12,0x7a,0x6f,0x22,0x90,0x01,0x37,
+0x74,0x02,0xf0,0x12,0x78,0x68,0xef,0x70,0x06,0x90,0x01,0xc8,0x74,0xfd,0xf0,0x7d,
+0x02,0x7f,0x03,0x12,0x31,0x9d,0xe5,0x71,0x60,0x04,0x7f,0x01,0x11,0xb2,0x12,0x78,
+0xb5,0x90,0x97,0x1c,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x02,0xf0,0x22,0x7d,0x02,0x7f,
+0x03,0x12,0x31,0x2c,0xe5,0x71,0x14,0x24,0xfd,0x50,0x02,0x80,0x22,0x90,0x97,0x1f,
+0xe0,0x60,0x06,0x7d,0x01,0x7f,0x0c,0x80,0x0f,0x90,0x97,0x1c,0xe0,0x54,0x0f,0xc3,
+0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0xab,0xe4,0xff,0x11,0xb2,0x22,
+0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,
+0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,
+0x74,0x30,0xf0,0x74,0x51,0xa3,0xf0,0x90,0x01,0x34,0xe0,0x55,0x28,0xf5,0x2c,0x90,
+0x01,0x36,0xe0,0x55,0x2a,0xf5,0x2e,0xa3,0xe0,0x55,0x2b,0xf5,0x2f,0xe5,0x2c,0x20,
+0xe0,0x02,0x41,0xce,0x90,0x01,0x34,0x74,0x01,0xf0,0x85,0xd1,0x08,0x85,0xd2,0x09,
+0x85,0xd3,0x0a,0x85,0xd4,0x0b,0x85,0xd5,0x0c,0x85,0xd6,0x0d,0x85,0xd7,0x0e,0x85,
+0xd9,0x0f,0xe5,0x0f,0x54,0x40,0xc3,0x13,0xff,0xe5,0x0e,0x54,0x20,0x6f,0x70,0x02,
+0x41,0x80,0xe5,0x0f,0x30,0xe5,0x02,0x41,0x80,0xe5,0x0d,0x54,0x1f,0xf5,0x4d,0xe5,
+0x08,0x54,0x3f,0xf5,0x4e,0xe5,0x0c,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0xe3,
+0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0e,0x54,
+0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0xc0,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xe4,
+0x8f,0xf0,0x12,0x42,0x81,0xe5,0x4e,0xd3,0x94,0x04,0x40,0x03,0x75,0x4e,0x04,0x75,
+0xf0,0x0a,0xe5,0x4d,0x90,0x90,0x00,0x12,0x43,0x5f,0x75,0xf0,0x02,0xe5,0x4e,0x12,
+0x43,0x5f,0xe0,0xfe,0xa3,0xe0,0xff,0xe5,0x0e,0x54,0x1f,0x2f,0xff,0xe4,0x3e,0xfe,
+0x75,0xf0,0x0a,0xe5,0x4d,0x90,0x90,0x00,0x12,0x43,0x5f,0x75,0xf0,0x02,0xe5,0x4e,
+0x12,0x43,0x5f,0xee,0xf0,0xa3,0xef,0xf0,0xe5,0x0f,0x20,0xe6,0x24,0xe5,0x0e,0x54,
+0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0x63,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,
+0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0a,0x30,0xe7,0x36,0xaf,0x4d,0x12,0x60,0xbb,0x80,
+0x2f,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0xa3,0xf5,0x82,0xe4,0x34,
+0x94,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0a,0x30,0xe7,0x12,0xe5,0x0a,
+0x54,0x7f,0xfd,0xe5,0x0e,0x54,0x1f,0xf5,0x53,0xab,0x4e,0xaf,0x4d,0x12,0x60,0x77,
+0xe5,0x71,0x14,0x24,0xfd,0x50,0x02,0x80,0x45,0x90,0x97,0x1f,0xe0,0x60,0x37,0x90,
+0x01,0x5b,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x04,0xf0,0xb1,0xb1,0xef,0x64,0x01,0x70,
+0x2d,0x90,0x97,0x13,0xe0,0xf5,0x44,0x75,0x45,0x00,0xe4,0xfb,0xfd,0x7f,0x58,0x7e,
+0x01,0x12,0x30,0x62,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,
+0x90,0x97,0x1b,0xf0,0x80,0x08,0xb1,0xb1,0xbf,0x01,0x03,0x12,0x47,0x98,0xe5,0x2c,
+0x30,0xe1,0x06,0x90,0x01,0x34,0x74,0x02,0xf0,0xe5,0x2c,0x30,0xe3,0x06,0x90,0x01,
+0x34,0x74,0x08,0xf0,0xe5,0x2c,0x30,0xe4,0x09,0x90,0x01,0x34,0x74,0x10,0xf0,0x43,
+0x12,0x10,0xe5,0x2c,0x30,0xe5,0x26,0x90,0x01,0xcf,0xe0,0x30,0xe5,0x1f,0xe0,0x54,
+0xdf,0xf0,0x90,0x01,0x34,0x74,0x20,0xf0,0x75,0xa8,0x00,0x75,0xe8,0x00,0x12,0x4f,
+0x85,0x90,0x00,0x03,0xe0,0x54,0xfb,0xf0,0x12,0x4e,0x47,0x80,0xfe,0xe5,0x2c,0x30,
+0xe6,0x06,0x90,0x01,0x34,0x74,0x40,0xf0,0xe5,0x2e,0x30,0xe1,0x5f,0x90,0x01,0x36,
+0x74,0x02,0xf0,0x43,0x12,0x40,0x90,0x01,0x02,0xe0,0x54,0x03,0x64,0x01,0x70,0x28,
+0x90,0x01,0x37,0xe0,0x30,0xe0,0x0a,0x74,0x01,0xf0,0x90,0x97,0x24,0xe4,0xf0,0x80,
+0x17,0x90,0x97,0x24,0xe0,0x04,0xf0,0xe0,0xc3,0x94,0x0a,0x40,0x0b,0xe4,0xf0,0x90,
+0x04,0x19,0xe0,0x30,0xe0,0x02,0xf1,0x31,0x90,0x97,0x41,0xe0,0xb4,0x01,0x09,0x90,
+0x05,0x22,0xe4,0xf0,0x90,0x97,0x41,0xf0,0x90,0x97,0x36,0xe0,0x30,0xe0,0x0d,0xe4,
+0xff,0x12,0x4c,0x21,0xef,0x60,0x05,0x90,0x05,0x22,0xe4,0xf0,0xe5,0x2e,0x20,0xe0,
+0x02,0x81,0x2f,0x90,0x97,0x34,0x74,0x01,0xf0,0x90,0x01,0x36,0xf0,0x90,0x97,0x3c,
+0xe0,0x30,0xe0,0x30,0x90,0x97,0x41,0x74,0x01,0xf0,0x90,0x97,0x3c,0xe0,0xff,0x13,
+0x13,0x54,0x3f,0x30,0xe0,0x1e,0x90,0x97,0x3e,0x74,0x01,0xf0,0x12,0x44,0x80,0x90,
+0x97,0x3d,0xe0,0x64,0x03,0x60,0x0d,0x7f,0x01,0x12,0x4c,0x21,0xef,0x60,0x05,0x7f,
+0x04,0x12,0x4c,0x97,0x90,0x97,0x36,0xe0,0xff,0x30,0xe0,0x4b,0x13,0x13,0x54,0x3f,
+0x30,0xe0,0x44,0x90,0x97,0x38,0x74,0x01,0xf0,0x12,0x44,0x80,0xe4,0xff,0x12,0x4c,
+0x21,0xef,0x60,0x33,0xf1,0x5d,0x90,0x97,0x37,0xe0,0xff,0x64,0x06,0x60,0x28,0xef,
+0xb4,0x04,0x07,0xe4,0xff,0x12,0x48,0x6f,0x80,0x11,0x90,0x97,0x37,0xe0,0xb4,0x03,
+0x16,0xf1,0xf8,0xef,0x70,0x05,0x7f,0x01,0x12,0x48,0x6f,0x90,0x97,0x1e,0xe0,0xff,
+0x7d,0x01,0x12,0x47,0xab,0xb1,0xce,0x12,0x67,0xb2,0x90,0x97,0x34,0xe4,0xf0,0xe5,
+0x2e,0x20,0xe2,0x02,0x81,0xba,0x90,0x01,0x36,0x74,0x04,0xf0,0x90,0x01,0xbd,0xe0,
+0x04,0xf0,0x90,0x97,0x36,0xe0,0x30,0xe0,0x06,0xa3,0xe0,0x64,0x06,0x60,0x6b,0xe5,
+0x70,0x64,0x01,0x70,0x65,0xe5,0x71,0x60,0x61,0xe5,0x71,0x64,0x02,0x60,0x06,0xe5,
+0x71,0x64,0x05,0x70,0x27,0x90,0x06,0xab,0xe0,0x90,0x97,0x0e,0xf0,0x90,0x06,0xaa,
+0xe0,0x90,0x97,0x1d,0xf0,0x90,0x97,0x0e,0xe0,0x70,0x07,0x90,0x97,0x1d,0xe0,0xff,
+0x80,0x05,0x90,0x97,0x0e,0xe0,0xff,0x90,0x97,0x0e,0xef,0xf0,0x90,0x97,0x10,0xe0,
+0x60,0x03,0xe0,0x14,0xf0,0x90,0x97,0x0f,0xe4,0xf0,0x90,0x01,0x57,0xf0,0x90,0x01,
+0x3c,0x74,0x02,0xf0,0x90,0x97,0x21,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0xef,0xf0,0xe5,
+0x71,0x14,0x24,0xfd,0x50,0x02,0x80,0x02,0xf1,0x80,0xe5,0x2e,0x30,0xe3,0x28,0x90,
+0x01,0x36,0x74,0x08,0xf0,0xe5,0x70,0x64,0x01,0x70,0x1c,0xe5,0x71,0x60,0x18,0x90,
+0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x97,0x47,0xe4,0x12,0x44,
+0x52,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x2e,0x30,0xe4,0x2f,0x90,0x01,0x36,0x74,
+0x10,0xf0,0xe5,0x70,0x64,0x01,0x70,0x23,0xe5,0x71,0x60,0x1f,0x90,0x01,0x57,0xe4,
+0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x97,0x20,0xe4,0xf0,0x90,0x97,0x21,0xe0,
+0x54,0xfd,0xf0,0xe0,0x54,0x07,0x70,0x03,0x12,0x47,0x98,0xe5,0x2e,0x30,0xe5,0x1e,
+0x90,0x01,0x36,0x74,0x20,0xf0,0xe5,0x70,0xb4,0x01,0x13,0xe5,0x71,0x60,0x0f,0x90,
+0x97,0x1f,0xe0,0x64,0x02,0x60,0x04,0xf1,0x47,0x80,0x03,0x12,0x44,0xa5,0xe5,0x2e,
+0x30,0xe6,0x1e,0x90,0x01,0x36,0x74,0x40,0xf0,0xe5,0x70,0xb4,0x01,0x13,0xe5,0x71,
+0x60,0x0f,0x90,0x97,0x21,0xe0,0x54,0xfe,0xf0,0xe0,0x54,0x07,0x70,0x03,0x12,0x47,
+0x98,0xe5,0x2f,0x30,0xe1,0x25,0x90,0x01,0x37,0x74,0x02,0xf0,0x90,0x97,0x36,0xe0,
+0x30,0xe0,0x16,0xe4,0xff,0x12,0x4c,0x21,0xef,0x60,0x06,0x11,0xfd,0xb1,0xce,0x80,
+0x0a,0x90,0x97,0x3b,0x74,0x01,0xf0,0x80,0x02,0x11,0xfd,0x74,0x30,0x04,0x90,0x01,
+0xc4,0xf0,0x74,0x51,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,
+0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,
+0x32,0x90,0x04,0x1b,0xe0,0x54,0x7f,0x64,0x7f,0x7f,0x01,0x60,0x02,0x7f,0x00,0x22,
+0x90,0x97,0x3b,0xe0,0xb4,0x01,0x06,0xe4,0xf0,0x11,0xfd,0xb1,0xce,0x22,0x90,0x97,
+0x37,0xe0,0x64,0x06,0x60,0x2f,0x90,0x97,0x1c,0xe0,0x54,0x0f,0x14,0x60,0x1f,0x14,
+0x60,0x15,0x24,0xfe,0x60,0x0a,0x24,0xf8,0x70,0x1b,0xe4,0x90,0x97,0x37,0xf0,0x22,
+0x90,0x97,0x37,0x74,0x01,0xf0,0x22,0x90,0x97,0x37,0x74,0x03,0xf0,0x22,0x90,0x01,
+0xc6,0xe0,0x44,0x08,0xf0,0x22,0xef,0x64,0x01,0x70,0x3c,0x7d,0x7c,0x7f,0x02,0x12,
+0x31,0x2c,0x7d,0x02,0x7f,0x03,0x12,0x31,0x2c,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,
+0x3c,0x74,0x02,0xf0,0x7d,0x01,0x7f,0x0c,0x12,0x47,0xab,0x90,0x97,0x36,0xe0,0x30,
+0xe0,0x02,0xb1,0xce,0xe4,0xff,0x11,0xb2,0x90,0x06,0x04,0xe0,0x54,0x7f,0xf0,0x90,
+0x06,0x0a,0xe0,0x54,0xf8,0xf0,0x22,0x90,0x01,0x36,0x74,0x7c,0xf0,0xa3,0x74,0x02,
+0xf0,0x7d,0x7c,0xff,0x12,0x31,0x9d,0x7d,0x02,0x7f,0x03,0x12,0x31,0x9d,0x90,0x06,
+0x04,0xe0,0x44,0x80,0xf0,0x90,0x06,0x0a,0xe0,0x44,0x07,0xf0,0x90,0x97,0x16,0xe0,
+0xa3,0xe0,0x90,0x05,0x58,0xf0,0xe5,0x70,0x30,0xe0,0x24,0x90,0x97,0x10,0xe0,0x70,
+0x23,0xe0,0x04,0xf0,0x90,0x97,0x1c,0xe0,0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,
+0x01,0x7f,0x04,0x12,0x47,0xab,0x90,0x97,0x36,0xe0,0x30,0xe0,0x07,0xa1,0xce,0xe4,
+0x90,0x97,0x10,0xf0,0x22,0x8b,0x56,0x8a,0x57,0x89,0x58,0xf1,0xea,0xab,0x56,0xaa,
+0x57,0xa9,0x58,0x12,0x24,0x62,0xf5,0x71,0x14,0x60,0x0e,0x14,0x60,0x1e,0x14,0x60,
+0x2f,0x24,0x03,0x70,0x40,0x7f,0x01,0x80,0x3a,0xab,0x56,0xaa,0x57,0xa9,0x58,0x90,
+0x00,0x02,0x12,0x42,0x20,0xfd,0xe4,0xff,0xf1,0x06,0x80,0x27,0xab,0x56,0xaa,0x57,
+0xa9,0x58,0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0x7f,0x01,0xf1,0x06,0x1f,0x80,0x13,
+0xab,0x56,0xaa,0x57,0xa9,0x58,0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0x7f,0x02,0xf1,
+0x06,0xe4,0xff,0xd1,0x06,0x22,0xef,0x24,0xfe,0x60,0x0b,0x04,0x70,0x22,0x90,0x97,
+0x1d,0x74,0x01,0xf0,0x80,0x16,0xed,0x70,0x0a,0x90,0x97,0x19,0xe0,0x90,0x97,0x1d,
+0xf0,0x80,0x05,0x90,0x97,0x1d,0xed,0xf0,0x90,0x97,0x1d,0xe0,0x90,0x97,0x0e,0xf0,
+0x22,0x12,0x4f,0xef,0xbf,0x01,0x0f,0x90,0x02,0x09,0xe0,0xff,0x7d,0x01,0x11,0x21,
+0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x12,0x4f,0xef,0xbf,0x01,0x0f,0x90,0x97,0x26,
+0xe0,0xff,0xe4,0xfd,0x11,0x21,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x90,0x97,0x36,
+0xe0,0xff,0xc4,0x13,0x13,0x54,0x03,0x30,0xe0,0x0b,0xa3,0xe0,0x64,0x06,0x60,0x05,
+0x7f,0x06,0x12,0x48,0x6f,0x90,0x97,0x37,0xe0,0x64,0x06,0x60,0x02,0xb1,0xc0,0x22,
+0x90,0x06,0xa9,0xe0,0xf5,0x50,0x54,0xc0,0x70,0x0e,0x90,0x97,0x21,0xe0,0x54,0xfe,
+0xf0,0xe0,0x54,0xfd,0xf0,0x12,0x47,0x98,0xe5,0x50,0x30,0xe6,0x18,0x90,0x97,0x21,
+0xe0,0x44,0x01,0xf0,0x90,0x97,0x1f,0xe0,0x64,0x02,0x60,0x04,0xf1,0x47,0x80,0x0c,
+0x12,0x44,0xa5,0x80,0x07,0x90,0x97,0x21,0xe0,0x54,0xfe,0xf0,0xe5,0x50,0x90,0x97,
+0x21,0x30,0xe7,0x18,0xe0,0x44,0x02,0xf0,0xe4,0x90,0x97,0x47,0x12,0x44,0x52,0x90,
+0x01,0x57,0x74,0x05,0xf0,0x90,0x97,0x20,0x74,0x01,0xf0,0x22,0xe0,0x54,0xfd,0xf0,
+0x22,0x11,0xcd,0x90,0x97,0x37,0x74,0x03,0xf0,0x22,0xe4,0x90,0x97,0x20,0xf0,0x90,
+0x97,0x0f,0xf0,0x90,0x97,0x21,0xf0,0x22,0xb1,0xb1,0xef,0x64,0x01,0x60,0x08,0x90,
+0x01,0xb9,0x74,0x01,0xf0,0x80,0x52,0x90,0x97,0x21,0xe0,0x54,0x03,0x60,0x08,0x90,
+0x01,0xb9,0x74,0x02,0xf0,0x80,0x42,0x90,0x97,0x1e,0xe0,0x54,0x0f,0xd3,0x94,0x02,
+0x40,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x2f,0x90,0x97,0x21,0xe0,0x30,0xe2,
+0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x20,0x90,0x97,0x21,0xe0,0x30,0xe4,0x08,
+0x90,0x01,0xb9,0x74,0x10,0xf0,0x80,0x11,0x90,0x97,0x10,0xe0,0x60,0x08,0x90,0x01,
+0xb9,0x74,0x20,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74,0x04,0xf0,0x7f,
+0x00,0x22,0x75,0x28,0x33,0xe4,0xf5,0x29,0x75,0x2a,0x03,0xf5,0x2b,0x90,0x01,0x30,
+0xe5,0x28,0xf0,0xa3,0xe5,0x29,0xf0,0xa3,0xe5,0x2a,0xf0,0xa3,0xe5,0x2b,0xf0,0x22,
+0xe4,0x90,0x96,0xef,0xf0,0xa3,0xf0,0x75,0x8e,0x02,0x12,0x77,0xe9,0x12,0x64,0xa9,
+0x12,0x64,0xbc,0xe4,0xf5,0x12,0x12,0x6e,0xaf,0x12,0x7a,0x66,0x12,0x65,0x54,0x12,
+0x2e,0x01,0x12,0x77,0xfe,0x12,0x77,0xfa,0x11,0x62,0x90,0x00,0xf3,0xe0,0x30,0xe2,
+0x0d,0x90,0x05,0x41,0x74,0x10,0xf0,0x90,0x05,0x5a,0xf0,0xa3,0xe4,0xf0,0x12,0x64,
+0xf4,0x12,0x64,0x91,0x12,0x45,0x01,0x90,0x96,0xf1,0xe5,0xd9,0xf0,0x12,0x4f,0x5a,
+0xc2,0xaf,0x90,0x00,0x80,0xe0,0x44,0x40,0xf0,0x12,0x4e,0x47,0x75,0xe8,0x03,0x43,
+0xa8,0x85,0xd2,0xaf,0x90,0x01,0xbe,0xe0,0x04,0xf0,0x90,0x01,0xc0,0xe0,0x04,0xf0,
+0x90,0x96,0xef,0xe0,0x64,0x01,0xf0,0x24,0x80,0x90,0x01,0xc4,0xf0,0x74,0x58,0xa3,
+0xf0,0xe5,0x12,0x30,0xe4,0x09,0xc2,0xaf,0x53,0x12,0xef,0xd2,0xaf,0x31,0x20,0xe5,
+0x12,0x30,0xe6,0xdc,0xc2,0xaf,0x53,0x12,0xbf,0xd2,0xaf,0x12,0x68,0xd8,0x80,0xd0,
+0x90,0x01,0xcc,0xe0,0x54,0x0f,0x90,0x96,0xf2,0xf0,0x90,0x96,0xf2,0xe0,0xfd,0x70,
+0x02,0x41,0x61,0x90,0x97,0x67,0xe0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,
+0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xef,0x5d,0x70,0x02,0x41,0x5a,0x90,
+0x97,0x67,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd0,0x12,0x43,0x5f,0xe0,0x90,0x96,0xf3,
+0xf0,0x75,0x1e,0x01,0x75,0x1f,0x96,0x75,0x20,0xf3,0x75,0x21,0x01,0x7b,0x01,0x7a,
+0x96,0x79,0xf4,0x12,0x45,0x09,0x90,0x96,0xf4,0xe0,0xff,0xc4,0x13,0x13,0x13,0x54,
+0x01,0x90,0x97,0x67,0x30,0xe0,0x59,0xe0,0x75,0xf0,0x02,0x90,0x00,0x88,0x12,0x43,
+0x5f,0xe0,0x90,0x96,0xf5,0xf0,0x90,0x97,0x67,0xe0,0x75,0xf0,0x02,0x90,0x00,0x89,
+0x12,0x43,0x5f,0xe0,0x90,0x96,0xf6,0xf0,0x90,0x97,0x67,0xe0,0x75,0xf0,0x04,0x90,
+0x01,0xd1,0x12,0x43,0x5f,0xe0,0x90,0x96,0xf7,0xf0,0x90,0x97,0x67,0xe0,0x75,0xf0,
+0x04,0x90,0x01,0xd2,0x12,0x43,0x5f,0xe0,0x90,0x96,0xf8,0xf0,0x90,0x97,0x67,0xe0,
+0x75,0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x5f,0xe0,0x90,0x96,0xf9,0xf0,0x80,0x33,
+0xe0,0x75,0xf0,0x04,0x90,0x01,0xd1,0x12,0x43,0x5f,0xe0,0x90,0x96,0xf5,0xf0,0x90,
+0x97,0x67,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd2,0x12,0x43,0x5f,0xe0,0x90,0x96,0xf6,
+0xf0,0x90,0x97,0x67,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x5f,0xe0,0x90,
+0x96,0xf7,0xf0,0xef,0x54,0x7f,0xff,0x7b,0x01,0x7a,0x96,0x79,0xf5,0x51,0x62,0x90,
+0x96,0xf2,0xe0,0xff,0x90,0x97,0x67,0xe0,0xfe,0x74,0x01,0xa8,0x06,0x08,0x80,0x02,
+0xc3,0x33,0xd8,0xfc,0xf4,0x5f,0x90,0x96,0xf2,0xf0,0x90,0x97,0x67,0xe0,0xff,0x74,
+0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0x90,0x01,0xcc,0xf0,0x90,0x97,
+0x67,0xe0,0x04,0xf0,0xe0,0x54,0x03,0xf0,0x21,0x2a,0x90,0x01,0xc6,0xe0,0x44,0x02,
+0xf0,0x22,0x90,0x96,0xfa,0x12,0x43,0x8b,0xef,0x12,0x43,0x94,0x5a,0x94,0x01,0x5a,
+0x9d,0x02,0x5a,0xb8,0x03,0x5a,0xc1,0x05,0x5a,0xca,0x06,0x5a,0xfd,0x07,0x5a,0xd2,
+0x08,0x5a,0xdb,0x09,0x5a,0xe4,0x20,0x5a,0xed,0x2c,0x5a,0xa6,0x2d,0x5a,0xaf,0x2e,
+0x00,0x00,0x5a,0xf6,0x90,0x96,0xfa,0x12,0x43,0x6b,0x02,0x71,0x3b,0x90,0x96,0xfa,
+0x12,0x43,0x6b,0x02,0x71,0x65,0x90,0x96,0xfa,0x12,0x43,0x6b,0x02,0x71,0x6b,0x90,
+0x96,0xfa,0x12,0x43,0x6b,0x02,0x71,0xb3,0x90,0x96,0xfa,0x12,0x43,0x6b,0x02,0x71,
+0xe1,0x90,0x96,0xfa,0x12,0x43,0x6b,0x02,0x70,0x2e,0x90,0x96,0xfa,0x12,0x43,0x6b,
+0x80,0x2c,0x90,0x96,0xfa,0x12,0x43,0x6b,0x02,0x49,0x9b,0x90,0x96,0xfa,0x12,0x43,
+0x6b,0x02,0x72,0x31,0x90,0x96,0xfa,0x12,0x43,0x6b,0x02,0x72,0x29,0x90,0x96,0xfa,
+0x12,0x43,0x6b,0x02,0x76,0xc8,0x90,0x01,0xc6,0xe0,0x44,0x01,0xf0,0x22,0x90,0x00,
+0x04,0x12,0x42,0x20,0xff,0x54,0x1f,0xfe,0xef,0x54,0x20,0xc4,0x13,0x54,0x07,0xfd,
+0xaf,0x06,0x90,0x96,0xfd,0xef,0xf0,0xa3,0xed,0xf0,0xa3,0x12,0x43,0x8b,0x90,0x96,
+0xff,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54,0xf0,0xc4,0x54,0x0f,0x90,
+0x97,0x02,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0x54,0x40,0xc4,0x13,0x13,0x54,0x03,
+0x90,0x97,0x03,0xf0,0x90,0x96,0xfd,0xe0,0xff,0x75,0xf0,0x09,0x90,0x93,0x25,0x12,
+0x43,0x5f,0xad,0x82,0xac,0x83,0x90,0x97,0x04,0xec,0xf0,0xa3,0xed,0xf0,0xef,0x75,
+0xf0,0x09,0xa4,0x24,0x23,0xf9,0x74,0x93,0x35,0xf0,0xfa,0x7b,0x01,0xa3,0x12,0x43,
+0x8b,0x90,0x96,0xff,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54,0x0f,0xff,
+0x90,0x97,0x06,0x12,0x43,0x6b,0xef,0x12,0x42,0x4d,0x90,0x96,0xff,0x12,0x43,0x6b,
+0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x90,0x97,0x06,0x12,0x43,0x6b,0x90,0x00,0x01,
+0xef,0x12,0x42,0x5f,0x90,0x96,0xff,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0x20,
+0xff,0x90,0x97,0x04,0xe0,0xfc,0xa3,0xe0,0xfd,0xf5,0x82,0x8c,0x83,0xef,0xf0,0x12,
+0x24,0x62,0x8d,0x82,0x8c,0x83,0xa3,0xf0,0x90,0x97,0x02,0xe0,0xfe,0x90,0x96,0xfd,
+0xe0,0xff,0x24,0xc1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xee,0xf0,0x90,0x96,0xfe,
+0xe0,0xfe,0x75,0xf0,0x09,0xef,0x90,0x93,0x29,0x12,0x43,0x5f,0xee,0xf0,0x75,0xf0,
+0x09,0xef,0x90,0x93,0x2a,0x12,0x43,0x5f,0x74,0x01,0xf0,0x90,0x97,0x03,0xe0,0xfe,
+0x75,0xf0,0x09,0xef,0x90,0x93,0x2b,0x12,0x43,0x5f,0xee,0xf0,0x8f,0x56,0xef,0x25,
+0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xaf,0x82,0xf5,0x58,0x8f,0x59,0xe5,0x56,
+0x75,0xf0,0x02,0xa4,0x24,0x81,0xf9,0x74,0x92,0x35,0xf0,0x75,0x5a,0x01,0xf5,0x5b,
+0x89,0x5c,0x75,0xf0,0x09,0xe5,0x56,0x90,0x93,0x25,0x12,0x43,0x5f,0xaf,0x82,0x85,
+0x83,0x5d,0x8f,0x5e,0xe5,0x56,0x75,0xf0,0x09,0xa4,0x24,0x23,0xf9,0x74,0x93,0x35,
+0xf0,0x75,0x5f,0x01,0xf5,0x60,0x89,0x61,0x74,0xc1,0x25,0x56,0xf5,0x82,0xe4,0x34,
+0x92,0xf5,0x83,0xe0,0x12,0x43,0x94,0x5c,0x8c,0x00,0x5c,0xa1,0x01,0x5c,0xb6,0x02,
+0x5c,0xcb,0x03,0x5c,0xf4,0x04,0x5d,0x09,0x05,0x5d,0x1e,0x06,0x5d,0x44,0x0c,0x5d,
+0x71,0x0d,0x5d,0x9e,0x0e,0x5d,0xcb,0x0f,0x00,0x00,0x5d,0xff,0xe5,0x56,0x25,0xe0,
+0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74,0x15,0x80,
+0x3c,0xe5,0x56,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0xf0,
+0xf0,0xa3,0x74,0x10,0x80,0x27,0xe5,0x56,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,
+0x95,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74,0x05,0x80,0x12,0xe5,0x56,0x25,0xe0,0x24,
+0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0xe4,0xf0,0xe5,0x56,
+0x25,0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,
+0x8f,0xf0,0xa1,0xff,0xe5,0x56,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,
+0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf5,0x80,0x27,0xe5,0x56,0x25,0xe0,0x24,0xe4,0xf5,
+0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf0,0x80,0x12,0xe5,0x56,
+0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe4,0xf0,0xa3,0x74,0x0d,
+0xf0,0xe5,0x56,0x25,0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe4,0xf0,
+0xa3,0xf0,0xa1,0xff,0x90,0x04,0x47,0xe0,0xab,0x5a,0xaa,0x5b,0xa9,0x5c,0x12,0x42,
+0x4d,0x90,0x04,0x46,0xe0,0xab,0x5a,0xaa,0x5b,0xa9,0x5c,0x90,0x00,0x01,0x12,0x42,
+0x5f,0x90,0x04,0x45,0xe0,0x85,0x59,0x82,0x85,0x58,0x83,0xf0,0x90,0x04,0x44,0xa1,
+0xf6,0x90,0x04,0x4b,0xe0,0xab,0x5a,0xaa,0x5b,0xa9,0x5c,0x12,0x42,0x4d,0x90,0x04,
+0x4a,0xe0,0xab,0x5a,0xaa,0x5b,0xa9,0x5c,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,
+0x49,0xe0,0x85,0x59,0x82,0x85,0x58,0x83,0xf0,0x90,0x04,0x48,0x80,0x58,0x90,0x04,
+0x4f,0xe0,0xab,0x5a,0xaa,0x5b,0xa9,0x5c,0x12,0x42,0x4d,0x90,0x04,0x4e,0xe0,0xab,
+0x5a,0xaa,0x5b,0xa9,0x5c,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x4d,0xe0,0x85,
+0x59,0x82,0x85,0x58,0x83,0xf0,0x90,0x04,0x4c,0x80,0x2b,0x90,0x04,0x53,0xe0,0xab,
+0x5a,0xaa,0x5b,0xa9,0x5c,0x12,0x42,0x4d,0x90,0x04,0x52,0xe0,0xab,0x5a,0xaa,0x5b,
+0xa9,0x5c,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x51,0xe0,0x85,0x59,0x82,0x85,
+0x58,0x83,0xf0,0x90,0x04,0x50,0xe0,0x85,0x59,0x82,0x85,0x58,0x83,0xa3,0xf0,0xab,
+0x5a,0xaa,0x5b,0xa9,0x5c,0xc0,0x03,0xc0,0x02,0xc0,0x01,0x12,0x24,0x62,0xff,0xab,
+0x5f,0xaa,0x60,0xa9,0x61,0x12,0x24,0x62,0x5f,0xd0,0x01,0xd0,0x02,0xd0,0x03,0x12,
+0x42,0x4d,0xab,0x5a,0xe5,0x5c,0x24,0x01,0xf9,0xe4,0x35,0x5b,0xfa,0xc0,0x03,0xc0,
+0x02,0xc0,0x01,0x12,0x24,0x62,0xff,0xab,0x5f,0xaa,0x60,0xa9,0x61,0x90,0x00,0x01,
+0x12,0x42,0x20,0x5f,0xd0,0x01,0xd0,0x02,0xd0,0x03,0x12,0x42,0x4d,0x85,0x59,0x82,
+0x85,0x58,0x83,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x5e,0x82,0x85,0x5d,0x83,0xe0,
+0xfe,0xef,0x5e,0xd0,0x82,0xd0,0x83,0xf0,0x85,0x59,0x82,0x85,0x58,0x83,0xa3,0xc0,
+0x83,0xc0,0x82,0xe0,0xff,0x85,0x5e,0x82,0x85,0x5d,0x83,0xa3,0xe0,0xfe,0xef,0x5e,
+0xd0,0x82,0xd0,0x83,0xf0,0xe5,0x56,0x25,0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,
+0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b,0x75,0x57,0x0b,0x74,0x01,0x7e,0x00,
+0xa8,0x57,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x56,0x25,
+0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,
+0x4e,0x60,0x06,0xe5,0x57,0x24,0x10,0x80,0x5d,0x15,0x57,0xe5,0x57,0xc3,0x94,0x00,
+0x50,0xca,0x80,0x56,0xe5,0x56,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,
+0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3d,0x75,0x57,0x0f,0x74,0x01,0x7e,0x00,0xa8,
+0x57,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x56,0x25,0xe0,
+0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,
+0x60,0x08,0x90,0x97,0x09,0xe5,0x57,0xf0,0x80,0x10,0x15,0x57,0xe5,0x57,0xc3,0x94,
+0x00,0x50,0xc8,0x80,0x05,0xe4,0x90,0x97,0x09,0xf0,0xe5,0x56,0x25,0xe0,0x24,0xe4,
+0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b,0xe4,0xf5,
+0x57,0x74,0x01,0x7e,0x00,0xa8,0x57,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,
+0xf9,0xff,0xe5,0x56,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,
+0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x08,0x90,0x97,0x0a,0xe5,0x57,0xf0,0x80,0x5b,
+0x05,0x57,0xe5,0x57,0xb4,0x10,0xca,0x80,0x52,0xe5,0x56,0x25,0xe0,0x24,0x81,0xf5,
+0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x39,0xe4,0xf5,0x57,
+0x74,0x01,0x7e,0x00,0xa8,0x57,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,
+0xff,0xe5,0x56,0x25,0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0x5e,
+0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x06,0xe5,0x57,0x24,0x10,0x80,0x0a,0x05,0x57,0xe5,
+0x57,0xb4,0x0c,0xcc,0x80,0x05,0xe4,0x90,0x97,0x0a,0xf0,0x90,0x97,0x09,0xe0,0xff,
+0x75,0xf0,0x09,0xe5,0x56,0x90,0x93,0x27,0x12,0x43,0x5f,0xef,0xf0,0x90,0x97,0x0a,
+0xe0,0xfe,0x75,0xf0,0x09,0xe5,0x56,0x90,0x93,0x28,0x12,0x43,0x5f,0xee,0xf0,0x74,
+0x84,0x25,0x56,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0xd3,0x9f,0x40,0x05,0x90,
+0x97,0x09,0x11,0x4e,0x74,0x84,0x25,0x56,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,
+0xff,0x90,0x97,0x0a,0xe0,0xfe,0xef,0xc3,0x9e,0x50,0x02,0x11,0x4e,0x90,0x97,0x09,
+0xe0,0xff,0xd3,0x94,0x13,0x40,0x07,0x90,0x93,0x22,0x74,0x03,0xf0,0x22,0xef,0xd3,
+0x94,0x0b,0x40,0x07,0x90,0x93,0x22,0x74,0x02,0xf0,0x22,0xef,0xd3,0x94,0x03,0x40,
+0x07,0x90,0x93,0x22,0x74,0x01,0xf0,0x22,0xe4,0x90,0x93,0x22,0xf0,0x22,0xe0,0xfd,
+0x74,0x44,0x25,0x56,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xed,0xf0,0xaf,0x56,0xd3,
+0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x74,0x84,0x2f,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,
+0xed,0xf0,0xd0,0xd0,0x92,0xaf,0x22,0xed,0x54,0x1f,0xf5,0x55,0x74,0x01,0x2f,0xf5,
+0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0xf5,0x54,0xeb,0xc3,0x94,0x01,0x40,0x02,0x80,
+0x2a,0xe5,0x54,0x25,0x53,0xfe,0xe5,0x55,0x90,0x41,0x9e,0x93,0xfc,0xee,0xd3,0x9c,
+0x74,0x01,0x40,0x0c,0x2f,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe4,0xf0,0x80,0xaf,
+0x2f,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xee,0xf0,0x22,0xac,0x07,0x75,0xf0,0x09,
+0xec,0x90,0x93,0x27,0x12,0x43,0x5f,0xe0,0xff,0x74,0x65,0x2c,0xf5,0x82,0xe4,0x34,
+0x96,0xf5,0x83,0xe0,0x54,0x1f,0xfb,0xd3,0x9f,0x40,0x02,0xab,0x07,0xeb,0x25,0xe0,
+0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,
+0xeb,0x25,0xe0,0x24,0x2e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,
+0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xec,0x25,0xe0,0x24,0xe1,0xf5,
+0x82,0xe4,0x34,0x92,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xaf,0x04,0xad,0x03,0x11,
+0x5f,0xaf,0x03,0x22,0xaa,0x07,0xaf,0x05,0x74,0x84,0x2a,0xf5,0x82,0xe4,0x34,0x04,
+0xf5,0x83,0xe0,0x54,0x7f,0xfb,0x54,0x1f,0xf9,0x90,0x96,0xfe,0xf0,0x75,0xf0,0x09,
+0xea,0x90,0x93,0x28,0x12,0x43,0x5f,0xe0,0x90,0x97,0x00,0xf0,0x75,0xf0,0x09,0xea,
+0x90,0x93,0x27,0x12,0x43,0x5f,0xe0,0xfe,0x90,0x97,0x01,0xf0,0xea,0x25,0xe0,0x24,
+0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfd,0xa3,0xe0,0x90,0x97,0x02,0xcd,
+0xf0,0xa3,0xed,0xf0,0xea,0x25,0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,
+0xe0,0xfd,0xa3,0xe0,0x90,0x97,0x04,0xcd,0xf0,0xa3,0xed,0xf0,0xe9,0xd3,0x9e,0x40,
+0x09,0x90,0x97,0x01,0xe0,0x90,0x96,0xfe,0xf0,0xfb,0xef,0x70,0x02,0x41,0x61,0x90,
+0x96,0xff,0xef,0xf0,0xeb,0x30,0xe6,0x09,0x90,0x96,0xfe,0xe0,0xfb,0xa3,0xe0,0x14,
+0xf0,0x90,0x96,0xff,0xe0,0x70,0x02,0x41,0x61,0x90,0x96,0xfe,0xe0,0xff,0xd3,0x94,
+0x00,0x50,0x02,0x41,0x61,0xe4,0x90,0x96,0xfd,0xf0,0xef,0x14,0x90,0x96,0xfc,0xf0,
+0x90,0x97,0x00,0xe0,0xf9,0x90,0x96,0xfc,0xe0,0xff,0xd3,0x99,0x40,0x6a,0xef,0x94,
+0x10,0x40,0x21,0xef,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,
+0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x97,0x04,0xe0,0x5e,0xfe,0xa3,0xe0,
+0x5f,0x4e,0x70,0x27,0x90,0x96,0xfc,0xe0,0xff,0xc3,0x94,0x10,0x50,0x32,0x74,0x01,
+0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,
+0x97,0x02,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x15,0x90,0x96,0xfc,0xe0,0xfb,
+0xa3,0xe0,0x04,0xf0,0x90,0x96,0xff,0xe0,0xff,0x90,0x96,0xfd,0xe0,0x6f,0x60,0x08,
+0x90,0x96,0xfc,0xe0,0x14,0xf0,0x80,0x88,0x90,0x96,0xff,0xe0,0xff,0x90,0x96,0xfd,
+0xe0,0xc3,0x9f,0x50,0x0c,0x90,0x96,0xfc,0xe0,0xb5,0x01,0x05,0x90,0x97,0x00,0xe0,
+0xfb,0xeb,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,
+0x74,0x01,0x93,0xff,0xeb,0x25,0xe0,0x24,0x2e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,
+0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xea,0x25,
+0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xaf,
+0x02,0xad,0x03,0x11,0x5f,0xaf,0x03,0x22,0xad,0x07,0x74,0x84,0x2d,0xf5,0x82,0xe4,
+0x34,0x04,0xf5,0x83,0xe0,0x54,0x7f,0xf5,0x61,0x54,0x1f,0xfc,0x75,0xf0,0x09,0xed,
+0x90,0x93,0x27,0x12,0x43,0x5f,0xe0,0xff,0x90,0x96,0xfc,0xf0,0xed,0x25,0xe0,0x24,
+0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x96,0xfd,0xcb,
+0xf0,0xa3,0xeb,0xf0,0xed,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,
+0xe0,0xfb,0xa3,0xe0,0x90,0x96,0xff,0xcb,0xf0,0xa3,0xeb,0xf0,0xec,0x25,0xe0,0x24,
+0x2e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfa,0x74,0x01,0x93,0xfb,0xed,
+0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xea,0xf0,0xa3,0xeb,0xf0,
+0xec,0xc3,0x9f,0x40,0x02,0x61,0xaa,0x74,0x65,0x2d,0xf5,0x82,0xe4,0x34,0x96,0xf5,
+0x83,0xec,0xf0,0x04,0xfb,0x90,0x96,0xfc,0xe0,0xff,0xeb,0xd3,0x9f,0x40,0x02,0x61,
+0xdb,0xeb,0xc3,0x94,0x10,0x40,0x21,0xeb,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8,
+0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x96,0xfd,0xe0,
+0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x70,0x23,0xeb,0xc3,0x94,0x10,0x50,0x39,0x74,0x01,
+0x7e,0x00,0xa8,0x03,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,
+0x96,0xff,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x1c,0xeb,0x64,0x13,0x60,0x08,
+0xeb,0x64,0x12,0x60,0x03,0xbb,0x11,0x09,0x90,0x96,0xfd,0xe0,0x30,0xe0,0x02,0x7b,
+0x18,0xac,0x03,0x8c,0x61,0x80,0x34,0x0b,0x80,0x8b,0x90,0x96,0xfc,0xe0,0xfb,0x6c,
+0x70,0x69,0x74,0x65,0x2d,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xec,0xf0,0x75,0xf0,
+0x09,0xed,0x90,0x93,0x29,0x12,0x43,0x5f,0xe0,0xb4,0x01,0x0c,0xe5,0x61,0x20,0xe6,
+0x07,0xec,0x44,0x40,0xf5,0x61,0x80,0x03,0xaf,0x61,0x22,0xec,0x25,0xe0,0x24,0x66,
+0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xec,0x25,
+0xe0,0x24,0x2e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,
+0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,
+0x34,0x92,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0x80,0x5b,0xec,0xd3,0x9b,0x40,0x56,
+0x90,0x96,0xfc,0xe0,0xff,0x74,0x65,0x2d,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xef,
+0xf0,0xac,0x07,0x8f,0x61,0xec,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,
+0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xec,0x25,0xe0,0x24,0x2e,0xf5,0x82,0xe4,
+0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,
+0x13,0xff,0xed,0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xee,0xf0,
+0xa3,0xef,0xf0,0xaf,0x61,0x22,0x74,0x01,0x2d,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,
+0xe4,0xf0,0xaf,0x05,0xe5,0x61,0x44,0x80,0xfd,0x11,0x5f,0xe5,0x61,0x44,0x80,0xff,
+0x22,0x75,0x30,0x1f,0x75,0x31,0x01,0xe4,0xf5,0x32,0x90,0x01,0x38,0xe5,0x30,0xf0,
+0xa3,0xe5,0x31,0xf0,0xa3,0xe5,0x32,0xf0,0x22,0x90,0x00,0x02,0xe0,0x54,0xe0,0x90,
+0x97,0x33,0x60,0x04,0x74,0x01,0xf0,0x22,0x74,0x02,0xf0,0x22,0x90,0x00,0xf3,0xe0,
+0x30,0xe3,0x08,0x90,0x97,0x35,0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x97,0x35,0xf0,
+0x90,0x97,0x35,0xe0,0xb4,0x01,0x12,0x90,0x00,0xf2,0xe0,0x30,0xe7,0x0b,0x90,0x97,
+0x22,0x74,0xfd,0xf0,0xa3,0x74,0x33,0xf0,0x22,0x90,0x97,0x22,0x74,0xfd,0xf0,0xa3,
+0x74,0x2f,0xf0,0x22,0x90,0x01,0x64,0x74,0xa0,0xf0,0x22,0xc0,0xe0,0xc0,0x83,0xc0,
+0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x7d,0xfb,0x90,0x01,
+0xc4,0xed,0xf0,0x74,0x64,0xff,0xa3,0xf0,0x53,0x91,0xef,0x90,0x00,0x51,0xe0,0xfe,
+0x90,0x00,0x55,0xe0,0x5e,0xf5,0x3d,0xe5,0x3d,0x30,0xe6,0x03,0x74,0x40,0xf0,0x90,
+0x01,0xc4,0xed,0xf0,0xa3,0xef,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0xd0,0xd0,
+0x82,0xd0,0x83,0xd0,0xe0,0x32,0x8f,0x68,0x8c,0x69,0x8d,0x6a,0x22,0x8f,0x6b,0x8c,
+0x6c,0x8d,0x6d,0x22,0xe4,0xf5,0x70,0x90,0x97,0x21,0xf0,0xf5,0x71,0x90,0x97,0x1e,
+0x74,0x0c,0xf0,0x90,0x97,0x1c,0xf0,0xe4,0x90,0x97,0x1f,0xf0,0x90,0x97,0x1b,0xf0,
+0x90,0x97,0x1a,0xf0,0x90,0x97,0x1d,0x04,0xf0,0x90,0x97,0x0e,0xf0,0xe4,0x90,0x97,
+0x20,0xf0,0x90,0x97,0x10,0xf0,0x90,0x97,0x18,0x74,0x07,0xf0,0xe4,0x90,0x97,0x0f,
+0xf0,0x90,0x97,0x16,0xf0,0xa3,0x74,0x02,0xf0,0x90,0x97,0x14,0x14,0xf0,0xa3,0x74,
+0x03,0xf0,0x90,0x97,0x13,0x74,0x14,0xf0,0x90,0x97,0x19,0x74,0x05,0xf0,0xe4,0x90,
+0x97,0x12,0xf0,0x90,0x97,0x0d,0xf0,0x90,0x97,0x34,0xf0,0x22,0x12,0x55,0xb1,0xef,
+0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x32,0x90,0x97,0x1b,0xe0,
+0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x24,0x90,0x97,0x1a,0xe0,0x60,0x08,
+0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x16,0x90,0x97,0x1e,0xe0,0x54,0x0f,0xd3,0x94,
+0x04,0x40,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01,
+0xb8,0x74,0x08,0xf0,0x7f,0x00,0x22,0xe5,0x12,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,
+0xf0,0x80,0x5e,0x90,0x97,0x1e,0xe0,0x54,0x0f,0xd3,0x94,0x01,0x40,0x08,0x90,0x01,
+0xb9,0x74,0x02,0xf0,0x80,0x4b,0x90,0x02,0x87,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,
+0x04,0xf0,0x80,0x3d,0x90,0x97,0x33,0xe0,0xb4,0x02,0x10,0x90,0x97,0x22,0xe0,0xfe,
+0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x17,0x80,0x26,0x90,0x97,0x33,0xe0,0xb4,
+0x01,0x0e,0x90,0x01,0xaf,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x11,
+0x90,0x97,0x12,0xe0,0x70,0x08,0x90,0x01,0xb9,0x74,0x10,0xf0,0x80,0x03,0x7f,0x01,
+0x22,0x90,0x01,0xb8,0x74,0x02,0xf0,0x7f,0x00,0x22,0x90,0x06,0x04,0xe0,0x54,0xbf,
+0xf0,0xef,0x60,0x09,0xe5,0x70,0xb4,0x01,0x04,0xe4,0xff,0xd1,0x99,0x90,0x97,0x1c,
+0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x0c,0xf0,0x22,0x8f,0x73,0x90,0x97,0x1c,0xe0,0x90,
+0x01,0xc1,0xf0,0xa3,0xe5,0x12,0xf0,0x12,0x4f,0xef,0xef,0x64,0x01,0x70,0x2e,0x90,
+0x97,0x27,0x12,0x50,0x1d,0xe5,0x73,0x60,0x10,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,
+0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x80,0x0e,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,
+0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x90,0x97,
+0x68,0xef,0xf0,0x12,0x4d,0xc1,0x90,0x97,0x68,0xe0,0x60,0x05,0x90,0x05,0x22,0xe4,
+0xf0,0x90,0x97,0x1c,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x04,0xf0,0x22,0x8f,0x27,0xe4,
+0x90,0x97,0x61,0xf0,0xa3,0xf0,0x90,0x01,0x09,0xe0,0x7f,0x00,0x30,0xe7,0x02,0x7f,
+0x01,0xef,0x65,0x27,0x60,0x3e,0xc3,0x90,0x97,0x62,0xe0,0x94,0x88,0x90,0x97,0x61,
+0xe0,0x94,0x13,0x40,0x08,0x90,0x01,0xc6,0xe0,0x44,0x80,0xf0,0x22,0x90,0x97,0x61,
+0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x7f,0x14,0x7e,0x00,0x12,0x32,0x15,0xd3,0x90,
+0x97,0x62,0xe0,0x94,0x32,0x90,0x97,0x61,0xe0,0x94,0x00,0x40,0xb9,0x90,0x01,0xc7,
+0xe0,0x30,0xe0,0xb2,0x22,0x90,0x97,0x1e,0xe0,0x30,0xe6,0x1c,0xe0,0x54,0x0f,0xff,
+0x90,0x97,0x0c,0xe0,0xfe,0x4f,0x90,0x01,0x2f,0xf0,0xee,0x64,0x80,0x90,0x97,0x0c,
+0xf0,0x90,0x97,0x1e,0xe0,0x54,0xbf,0xf0,0x22,0x8f,0x72,0x12,0x4f,0xef,0xef,0x64,
+0x01,0x70,0x2e,0x90,0x97,0x28,0x12,0x50,0x1d,0xe5,0x72,0x60,0x10,0x74,0x21,0x2f,
+0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x80,0x0e,0x74,0x21,0x2f,
+0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0,0x90,0x04,0x1f,0x74,0x20,
+0xf0,0x22,0xe4,0x90,0x96,0xee,0xf0,0xe5,0x71,0x70,0x03,0x02,0x68,0x58,0xe5,0x70,
+0x64,0x01,0x60,0x03,0x02,0x68,0x58,0xe5,0x71,0x14,0x60,0x29,0x24,0xfd,0x60,0x25,
+0x24,0x02,0x24,0xfb,0x50,0x02,0x80,0x23,0x90,0x97,0x0e,0xe0,0x14,0xf0,0xe0,0x60,
+0x04,0xa3,0xe0,0x60,0x16,0x90,0x97,0x0e,0xe0,0x70,0x0a,0x90,0x97,0x1d,0xe0,0x90,
+0x97,0x0e,0xf0,0x80,0x00,0x90,0x96,0xee,0x74,0x01,0xf0,0x90,0x97,0x36,0xe0,0x30,
+0xe0,0x16,0xa3,0xe0,0xb4,0x06,0x05,0xe4,0x90,0x96,0xee,0xf0,0xe4,0xff,0x12,0x4c,
+0x21,0xef,0x70,0x04,0x90,0x96,0xee,0xf0,0x90,0x96,0xee,0xe0,0x60,0x3a,0x90,0x97,
+0x21,0xe0,0x44,0x10,0xf0,0xe4,0x90,0x97,0x47,0xf0,0x90,0x97,0x18,0x12,0x44,0x56,
+0x90,0x01,0x57,0x74,0x05,0xf0,0x90,0x97,0x1c,0xe0,0x54,0x0f,0xc3,0x94,0x04,0x50,
+0x17,0x7d,0x01,0x7f,0x04,0x12,0x47,0xab,0x90,0x97,0x36,0xe0,0x30,0xe0,0x09,0x12,
+0x55,0xce,0x90,0x05,0x22,0x74,0xff,0xf0,0x22,0x90,0x97,0x20,0xe0,0x60,0x0e,0xe4,
+0xf0,0xa3,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0x07,0x70,0x2c,0x80,0x27,0x90,0x97,0x0f,
+0xe0,0x04,0xf0,0x90,0x97,0x21,0xe0,0x54,0xef,0xf0,0x90,0x97,0x14,0xe0,0xff,0x90,
+0x97,0x0f,0xe0,0xd3,0x9f,0x40,0x0d,0xe5,0x70,0xb4,0x01,0x0b,0xa3,0xe0,0x70,0x07,
+0xe0,0x04,0xf0,0x22,0x12,0x47,0x98,0x22,0xef,0xc3,0x94,0x20,0x50,0x39,0xef,0x30,
+0xe0,0x17,0xed,0xc4,0x54,0xf0,0xfd,0xef,0xc3,0x13,0xfe,0x24,0xa4,0xf5,0x82,0xe4,
+0x34,0x04,0xf5,0x83,0xe0,0x54,0x0f,0x80,0x10,0xef,0xc3,0x13,0xfe,0x24,0xa4,0xf5,
+0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0xa4,0x2e,0xf5,0x82,0xe4,
+0x34,0x04,0xf5,0x83,0xe0,0x4d,0xf0,0x22,0xe4,0xf5,0x56,0x75,0xf0,0x09,0xe5,0x56,
+0x90,0x93,0x2a,0x12,0x43,0x5f,0xe0,0x64,0x01,0x60,0x02,0xc1,0xa3,0xe5,0x56,0x25,
+0xe0,0x24,0xc0,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0xd3,0x94,
+0x00,0xee,0x94,0x00,0x50,0x02,0xc1,0xa3,0xe5,0x56,0x75,0xf0,0x0a,0xa4,0x24,0x00,
+0xf9,0x74,0x90,0x35,0xf0,0x75,0x5b,0x01,0xf5,0x5c,0x89,0x5d,0xe5,0x56,0x25,0xe0,
+0x24,0xc0,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90,0x96,0xf6,
+0xcf,0xf0,0xa3,0xef,0xf0,0xe5,0x56,0x25,0xe0,0x24,0x63,0xf5,0x82,0xe4,0x34,0x94,
+0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90,0x96,0xf8,0xcf,0xf0,0xa3,0xef,0xf0,0x74,0x84,
+0x25,0x56,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,0x3f,0x90,0x96,0xf2,0xf0,
+0xe0,0xfe,0x54,0x1f,0xa3,0xf0,0x75,0xf0,0x09,0xe5,0x56,0x90,0x93,0x27,0x12,0x43,
+0x5f,0xe0,0x90,0x96,0xfb,0xf0,0x74,0x24,0x25,0x56,0xf5,0x82,0xe4,0x34,0x96,0xf5,
+0x83,0xe0,0xc3,0x94,0x05,0x40,0x02,0x61,0x7d,0x90,0x96,0xfb,0xe0,0xff,0x90,0x96,
+0xf3,0xe0,0x9f,0x40,0x13,0x90,0x96,0xfb,0xe0,0x90,0x96,0xf3,0xf0,0xee,0x54,0x40,
+0xfe,0x90,0x96,0xf2,0xf0,0xef,0x4e,0xf0,0x90,0x96,0xf3,0xe0,0xff,0x90,0x41,0x12,
+0x93,0xfe,0x74,0x23,0x25,0x56,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xc3,0x9e,
+0x40,0x06,0xef,0x90,0x40,0xda,0x80,0x07,0x90,0x96,0xf3,0xe0,0x90,0x40,0xf6,0x93,
+0x90,0x96,0xfa,0xf0,0x90,0x96,0xfa,0xe0,0x75,0xf0,0x06,0xa4,0x24,0x50,0xf9,0x74,
+0x40,0x35,0xf0,0x75,0x58,0xff,0xf5,0x59,0x89,0x5a,0x90,0x96,0xf2,0xe0,0x90,0x41,
+0xba,0x93,0xff,0xd3,0x90,0x96,0xf9,0xe0,0x9f,0x90,0x96,0xf8,0xe0,0x94,0x00,0x40,
+0x09,0xe4,0xfd,0xaf,0x56,0x12,0x61,0x24,0xc1,0x3a,0xe5,0x56,0x25,0xe0,0x24,0xe1,
+0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0xf5,0x5e,0xa3,0xe0,0xf5,0x5f,0xab,0x58,
+0xaa,0x59,0xa9,0x5a,0x12,0x24,0x62,0xff,0x7e,0x00,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,
+0x12,0x42,0x97,0xfd,0xac,0xf0,0x12,0x24,0x7b,0xef,0x25,0x5f,0xf5,0x5f,0xee,0x35,
+0x5e,0xf5,0x5e,0xab,0x58,0xaa,0x59,0xa9,0x5a,0x90,0x00,0x01,0x12,0x42,0x20,0xff,
+0x7e,0x00,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x02,0x12,0x42,0xc2,0xfd,0xac,
+0xf0,0x12,0x24,0x7b,0xef,0x25,0x5f,0xf5,0x5f,0xee,0x35,0x5e,0xf5,0x5e,0xab,0x58,
+0xaa,0x59,0xa9,0x5a,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x5b,0xaa,
+0x5c,0xa9,0x5d,0x90,0x00,0x04,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x24,0x7b,0xef,
+0x25,0x5f,0xf5,0x5f,0xee,0x35,0x5e,0xf5,0x5e,0xab,0x58,0xaa,0x59,0xa9,0x5a,0x90,
+0x00,0x03,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,
+0x06,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x24,0x7b,0xef,0x25,0x5f,0xf5,0x5f,0xee,
+0x35,0x5e,0xf5,0x5e,0xab,0x58,0xaa,0x59,0xa9,0x5a,0x90,0x00,0x04,0x12,0x42,0x20,
+0xff,0x7e,0x00,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x08,0x12,0x42,0xc2,0xfd,
+0xac,0xf0,0x12,0x24,0x7b,0xef,0x25,0x5f,0xf5,0x5f,0xee,0x35,0x5e,0xf5,0x5e,0xab,
+0x58,0xaa,0x59,0xa9,0x5a,0x90,0x00,0x05,0x12,0x42,0x20,0xff,0x7e,0x00,0x90,0x96,
+0xf6,0xe0,0xfc,0xa3,0xe0,0xfd,0x12,0x24,0x7b,0xd3,0xe5,0x5f,0x9f,0xe5,0x5e,0x9e,
+0x40,0x0c,0xe5,0x5f,0x9f,0xf5,0x5f,0xe5,0x5e,0x9e,0xf5,0x5e,0x80,0x05,0xe4,0xf5,
+0x5e,0xf5,0x5f,0xe5,0x56,0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,
+0xe5,0x5e,0xf0,0xa3,0xe5,0x5f,0xf0,0x90,0x96,0xf2,0xe0,0xf9,0x25,0xe0,0x24,0x2e,
+0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xc3,0x74,0x01,0x93,0x95,0x5f,0xe4,0x93,0x95,
+0x5e,0x50,0x07,0xaf,0x56,0x12,0x62,0xa8,0xc1,0x0e,0xe9,0x25,0xe0,0x24,0x66,0xf5,
+0x82,0xe4,0x34,0x41,0xf5,0x83,0xd3,0x74,0x01,0x93,0x95,0x5f,0xe4,0x93,0x95,0x5e,
+0x50,0x02,0xc1,0x0e,0x7d,0x01,0xaf,0x56,0x12,0x61,0x24,0xc1,0x0e,0x74,0x24,0x25,
+0x56,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe0,0xfc,0x64,0x05,0x60,0x02,0xa1,0x18,
+0x90,0x93,0x22,0xe0,0xff,0xb4,0x03,0x0b,0x90,0x96,0xf3,0xe0,0xc3,0x94,0x19,0x40,
+0x3d,0x80,0x2e,0xef,0xb4,0x02,0x0b,0x90,0x96,0xf3,0xe0,0xc3,0x94,0x11,0x40,0x2e,
+0x80,0x1f,0x90,0x93,0x22,0xe0,0xff,0xb4,0x01,0x0b,0x90,0x96,0xf3,0xe0,0xc3,0x94,
+0x0a,0x40,0x1b,0x80,0x0c,0xef,0x70,0x11,0x90,0x96,0xf3,0xe0,0xc3,0x94,0x03,0x40,
+0x0d,0x90,0x95,0x43,0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x95,0x43,0xf0,0x74,0x43,
+0x25,0x56,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xf5,0x60,0x74,0x23,0x25,0x56,
+0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xff,0xc3,0x94,0x30,0x50,0x02,0x81,0xc5,
+0x90,0x95,0x43,0xe0,0x64,0x01,0x60,0x02,0x81,0xc5,0x74,0x44,0x25,0x56,0xf5,0x82,
+0xe4,0x34,0x95,0xf5,0x83,0xe0,0x64,0x0a,0x60,0x51,0xef,0x24,0x05,0xff,0xe4,0x33,
+0xfe,0x74,0x21,0x25,0x56,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0xfd,0xd3,0x9f,
+0xee,0x64,0x80,0xf8,0x74,0x80,0x98,0x50,0x32,0xed,0x24,0x05,0xff,0xe4,0x33,0xfe,
+0x74,0x23,0x25,0x56,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xd3,0x9f,0xee,0x64,
+0x80,0xf8,0x74,0x80,0x98,0x50,0x14,0x74,0x44,0x25,0x56,0xf5,0x82,0xe4,0x34,0x96,
+0xf5,0x83,0xe0,0xff,0x90,0x96,0xf3,0xe0,0x6f,0x60,0x3d,0x74,0x23,0x25,0x56,0xf5,
+0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xff,0xd3,0x94,0x42,0x40,0x05,0x75,0x60,0x05,
+0x80,0x0e,0xef,0xd3,0x94,0x39,0x40,0x05,0x75,0x60,0x03,0x80,0x03,0x75,0x60,0x01,
+0x74,0x21,0x25,0x56,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xef,0xf0,0x74,0x44,0x25,
+0x56,0xf5,0x82,0xe4,0x34,0x95,0x80,0x29,0x74,0x24,0x25,0x56,0xf5,0x82,0xe4,0x34,
+0x96,0xf5,0x83,0xe4,0xf0,0x74,0x44,0x25,0x56,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,
+0xe0,0x04,0xf0,0x80,0x10,0xe4,0xf5,0x60,0x74,0x24,0x25,0x56,0xf5,0x82,0xe4,0x34,
+0x96,0xf5,0x83,0xe4,0xf0,0x90,0x96,0xf3,0xe0,0xff,0x74,0x44,0x25,0x56,0xf5,0x82,
+0xe4,0x34,0x96,0xf5,0x83,0xef,0xf0,0x74,0x43,0x25,0x56,0xf5,0x82,0xe4,0x34,0x94,
+0xf5,0x83,0xe5,0x60,0xf0,0x75,0xf0,0x09,0xe5,0x56,0x90,0x93,0x2b,0x12,0x43,0x5f,
+0xe0,0xb4,0x01,0x10,0xe4,0xf5,0x60,0x74,0x24,0x25,0x56,0xf5,0x82,0xe4,0x34,0x96,
+0xf5,0x83,0xe4,0xf0,0xad,0x60,0xc1,0x0a,0xec,0x64,0x06,0x60,0x02,0xc1,0x0e,0xf5,
+0x5e,0xf5,0x5f,0x90,0x41,0xdb,0x93,0xff,0x7e,0x00,0x90,0x96,0xf6,0xe0,0xfc,0xa3,
+0xe0,0xfd,0x12,0x24,0x7b,0x90,0x96,0xf4,0xee,0xf0,0xa3,0xef,0xf0,0x74,0x43,0x25,
+0x56,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xf5,0x60,0xe4,0xf5,0x57,0xab,0x5b,
+0xaa,0x5c,0xa9,0x5d,0x75,0xf0,0x02,0xe5,0x57,0xa4,0xf5,0x82,0x85,0xf0,0x83,0x12,
+0x42,0xc2,0xfd,0xac,0xf0,0xe5,0x57,0x90,0x41,0xd6,0x93,0xff,0x7e,0x00,0x12,0x24,
+0x7b,0xef,0x25,0x5f,0xf5,0x5f,0xee,0x35,0x5e,0xf5,0x5e,0xc3,0x90,0x96,0xf5,0xe0,
+0x95,0x5f,0x90,0x96,0xf4,0xe0,0x95,0x5e,0x40,0x07,0x05,0x57,0xe5,0x57,0xb4,0x05,
+0xbd,0xe5,0x57,0xc3,0x13,0xf5,0x57,0xe5,0x60,0xb4,0x01,0x06,0xe5,0x57,0x70,0x46,
+0x80,0x13,0xe5,0x60,0xb4,0x03,0x15,0xe5,0x57,0x70,0x05,0x75,0x60,0x03,0x80,0x39,
+0xe5,0x57,0xb4,0x01,0x05,0x75,0x60,0x01,0x80,0x2f,0x80,0x2a,0xe5,0x60,0xb4,0x05,
+0x28,0xe5,0x57,0x70,0x05,0x75,0x60,0x05,0x80,0x0d,0xe5,0x57,0xb4,0x01,0x05,0x75,
+0x60,0x03,0x80,0x03,0x75,0x60,0x01,0xd3,0x90,0x96,0xf9,0xe0,0x94,0x03,0x90,0x96,
+0xf8,0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x60,0xd3,0x90,0x96,0xf9,0xe0,0x94,0x03,
+0x90,0x96,0xf8,0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x60,0x74,0x43,0x25,0x56,0xf5,
+0x82,0xe4,0x34,0x94,0xf5,0x83,0xe5,0x60,0xf0,0xfd,0xaf,0x56,0x11,0x98,0x74,0x24,
+0x25,0x56,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe0,0xd3,0x94,0x05,0x74,0x24,0x50,
+0x0e,0x25,0x56,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe0,0x04,0xf0,0x80,0x0b,0x25,
+0x56,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe4,0xf0,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,
+0xe4,0xf5,0xf0,0x12,0x42,0xfa,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x02,0xe4,
+0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x04,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,
+0x06,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x08,0xe4,0xf5,0xf0,0x12,0x43,0x19,
+0xe5,0x56,0x25,0xe0,0x24,0xc0,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xe4,0xf0,0xa3,
+0xf0,0xe5,0x56,0x25,0xe0,0x24,0x63,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,
+0xa3,0xf0,0xe5,0x56,0x25,0xe0,0x24,0xa3,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,
+0xf0,0xa3,0xf0,0x05,0x56,0xe5,0x56,0xc3,0x94,0x20,0x50,0x02,0x01,0xdb,0x22,0xe4,
+0xfd,0x74,0xa4,0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe4,0xf0,0x0d,0xbd,0x10,
+0xf0,0xe4,0xfd,0x75,0xf0,0x0a,0xed,0x90,0x90,0x00,0x12,0x43,0x5f,0xe4,0xf0,0xa3,
+0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x02,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,
+0xf0,0x0a,0xed,0x90,0x90,0x04,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,
+0xed,0x90,0x90,0x06,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,
+0x90,0x08,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x74,0x44,0x2d,0xf5,0x82,0xe4,0x34,
+0x96,0xf5,0x83,0x74,0x13,0xf0,0x74,0x44,0x2d,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,
+0xe4,0xf0,0x74,0x43,0x2d,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xed,0x25,
+0xe0,0x24,0xc0,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,
+0xe0,0x24,0x63,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,
+0xe0,0x24,0xe3,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,
+0xe0,0x24,0xa3,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,
+0xe0,0x24,0x64,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,
+0xe0,0x24,0xa4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x74,0x24,
+0x2d,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe4,0xf0,0x90,0x41,0x8c,0x93,0xfe,0x74,
+0x01,0x93,0xff,0x90,0x41,0x54,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,
+0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,
+0xee,0xf0,0xa3,0xef,0xf0,0x75,0xf0,0x09,0xed,0x90,0x93,0x29,0x12,0x43,0x5f,0x74,
+0x01,0xf0,0x74,0xc1,0x2d,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0x74,0x0c,0xf0,0x75,
+0xf0,0x09,0xed,0x90,0x93,0x25,0x12,0x43,0x5f,0x74,0xff,0xf0,0xa3,0xf0,0x75,0xf0,
+0x09,0xed,0x90,0x93,0x23,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0x74,0x0f,0xf0,0x75,0xf0,
+0x09,0xed,0x90,0x93,0x27,0x12,0x43,0x5f,0x74,0x13,0xf0,0x75,0xf0,0x09,0xed,0x90,
+0x93,0x28,0x12,0x43,0x5f,0xe4,0xf0,0x74,0x84,0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,
+0x83,0x74,0x13,0xf0,0x0d,0xed,0x64,0x20,0x60,0x03,0x02,0x6e,0xc3,0x22,0x12,0x24,
+0x62,0xf5,0x56,0xc3,0x94,0x20,0x50,0x15,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x74,
+0x23,0x25,0x56,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xef,0xf0,0x22,0xe5,0x56,0xb4,
+0x20,0x0a,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x93,0x21,0xf0,0x22,0xd3,0x10,0xaf,
+0x01,0xc3,0xc0,0xd0,0x90,0x97,0x59,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xa3,0xf0,0xa3,
+0xf0,0x90,0x97,0x59,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x2d,0xc3,
+0x90,0x97,0x5c,0xe0,0x94,0xe8,0x90,0x97,0x5b,0xe0,0x94,0x03,0x40,0x0b,0x90,0x01,
+0xc6,0xe0,0x44,0x10,0xf0,0x7f,0x00,0x80,0x15,0x90,0x97,0x5b,0xe4,0x75,0xf0,0x01,
+0x12,0x42,0x81,0x7f,0x0a,0x7e,0x00,0x12,0x32,0x15,0x80,0xc5,0x7f,0x01,0xd0,0xd0,
+0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x97,0x4f,0x12,0x43,0x8b,
+0x90,0x97,0x33,0xe0,0x64,0x02,0x60,0x6e,0x90,0x97,0x33,0xe0,0x64,0x01,0x70,0x66,
+0x90,0x97,0x69,0xe0,0xff,0x04,0xf0,0x90,0x97,0x4f,0x12,0x43,0x6b,0x90,0x00,0x01,
+0xef,0x12,0x42,0x5f,0x7f,0xaf,0x7e,0x01,0x11,0x5d,0xef,0x60,0x49,0x90,0x97,0x4f,
+0x12,0x43,0x6b,0x8b,0x1e,0x8a,0x1f,0x89,0x20,0x75,0x21,0x02,0x7b,0x01,0x7a,0x01,
+0x79,0xa0,0x12,0x45,0x09,0x90,0x97,0x52,0x12,0x43,0x6b,0x8b,0x1e,0x8a,0x1f,0x89,
+0x20,0x90,0x97,0x4f,0x12,0x43,0x6b,0x12,0x24,0x62,0xff,0xc4,0x54,0x0f,0xf5,0x21,
+0x7b,0x01,0x7a,0x01,0x79,0xa2,0x12,0x45,0x09,0x90,0x01,0xaf,0x74,0xff,0xf0,0x90,
+0x01,0xcb,0xe0,0x64,0x80,0xf0,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,
+0xc0,0xd0,0x90,0x00,0x01,0x12,0x42,0x20,0x90,0x97,0x1f,0xf0,0x90,0x00,0x03,0x12,
+0x42,0x20,0x90,0x97,0x0d,0xf0,0x12,0x24,0x62,0x65,0x71,0x60,0x03,0x12,0x56,0xa5,
+0xd0,0xd0,0x92,0xaf,0x22,0x12,0x24,0x62,0xf5,0x70,0x22,0x90,0x00,0x02,0x12,0x42,
+0x20,0xff,0x30,0xe0,0x25,0x12,0x24,0x62,0x90,0x97,0x14,0xf0,0x90,0x00,0x01,0x12,
+0x42,0x20,0x90,0x97,0x15,0xf0,0xef,0xc3,0x13,0x54,0x7f,0x90,0x97,0x13,0xf0,0x90,
+0x00,0x03,0x12,0x42,0x20,0x90,0x97,0x19,0xf0,0x22,0x90,0x97,0x14,0x74,0x01,0xf0,
+0x90,0x97,0x15,0x74,0x03,0xf0,0x90,0x97,0x13,0x74,0x14,0xf0,0x90,0x97,0x19,0x74,
+0x05,0xf0,0x22,0x12,0x24,0x62,0x30,0xe0,0x18,0xc3,0x13,0x54,0x7f,0x90,0x97,0x18,
+0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x90,0x97,0x16,0xe4,0xf0,0xa3,0xef,0xf0,
+0x22,0x90,0x97,0x18,0x74,0x07,0xf0,0x90,0x97,0x16,0xe4,0xf0,0xa3,0x74,0x02,0xf0,
+0x22,0x90,0x02,0x09,0xe0,0xfd,0x12,0x24,0x62,0xfe,0xaf,0x05,0xed,0x2e,0x90,0x97,
+0x25,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x97,0x26,0xf0,0x90,
+0x00,0x02,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x97,0x27,0xf0,0x90,0x00,0x03,0x12,
+0x42,0x20,0xff,0xed,0x2f,0x90,0x97,0x28,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff,
+0xae,0x05,0xed,0x2f,0x90,0x97,0x29,0xf0,0x22,0x12,0x24,0x62,0x90,0x97,0x42,0xf0,
+0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x96,0xfd,0x12,0x43,0x8b,0x90,0x96,
+0xfd,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,0xfa,0xe5,0xf0,0x24,0x00,0xff,
+0xe4,0x3a,0xfe,0x90,0x96,0xfd,0x12,0x43,0x6b,0x90,0x00,0x01,0xee,0x8f,0xf0,0x12,
+0x43,0x19,0x12,0x24,0x62,0xff,0x60,0x2c,0xb5,0x22,0x16,0x90,0x96,0xfd,0x12,0x43,
+0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,0x65,0x24,0x70,0x04,0xe5,0x23,0x65,0xf0,0x60,
+0x22,0x90,0x96,0xfd,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,0xff,0xae,0xf0,
+0x51,0xa8,0x80,0x0f,0x90,0x96,0xfd,0x12,0x43,0x6b,0x12,0x24,0x62,0x65,0x22,0x60,
+0x02,0x91,0xe2,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x97,0x00,0xee,0xf0,0xa3,0xef,0xf0,
+0x75,0x22,0x01,0x8e,0x23,0xf5,0x24,0xe4,0xfd,0x7f,0x0b,0x51,0xea,0xe4,0xfd,0x7f,
+0x02,0x51,0xea,0x71,0xc0,0xe4,0xff,0x71,0xb4,0xe4,0xf5,0x26,0x90,0x01,0xc9,0xe5,
+0x26,0xf0,0x90,0x97,0x00,0xe0,0xfc,0xa3,0xe0,0xfd,0xec,0xfb,0x8d,0x44,0xe4,0xf5,
+0x45,0x7d,0x01,0x7f,0x60,0x7e,0x01,0x02,0x30,0x62,0xd3,0x10,0xaf,0x01,0xc3,0xc0,
+0xd0,0x90,0x97,0x03,0xed,0xf0,0x90,0x97,0x02,0xef,0xf0,0xd3,0x94,0x07,0x50,0x4f,
+0xa3,0xe0,0x70,0x1a,0x90,0x97,0x02,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,
+0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0,0x5f,0xf0,0x80,0x17,0x90,0x97,
+0x02,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,
+0x00,0x47,0xe0,0x4f,0xf0,0x12,0x4e,0x47,0x90,0x97,0x02,0xe0,0xff,0x74,0x01,0xa8,
+0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0x80,0x5a,0x90,
+0x97,0x02,0xe0,0x24,0xf8,0xf0,0xa3,0xe0,0x70,0x1d,0x90,0x97,0x02,0xe0,0xff,0x74,
+0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,
+0x00,0x43,0xe0,0x5f,0xf0,0x80,0x1a,0x90,0x97,0x02,0xe0,0xff,0x74,0x01,0xa8,0x07,
+0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,0x43,0xe0,0x4f,
+0xf0,0x12,0x4e,0x47,0x90,0x97,0x02,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,
+0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x12,0x4e,0x47,0xd0,
+0xd0,0x92,0xaf,0x22,0x90,0x01,0xca,0xe5,0x25,0xf0,0xef,0x60,0x02,0x91,0x21,0x22,
+0x7f,0x0b,0x91,0x41,0xef,0x65,0x25,0x60,0x10,0xe5,0x25,0xb4,0x01,0x05,0xe4,0xf5,
+0x25,0x80,0x03,0x75,0x25,0x01,0x7f,0x01,0x22,0x7f,0x00,0x22,0xe5,0x22,0x64,0x01,
+0x70,0x3e,0x71,0xc0,0xbf,0x01,0x04,0x7f,0x01,0x71,0xb4,0x90,0x00,0x46,0xe0,0x44,
+0x04,0xfd,0x7f,0x46,0x12,0x4f,0x45,0x90,0x00,0x44,0xe0,0x54,0xfb,0xfd,0x7f,0x44,
+0x12,0x4f,0x45,0x90,0x00,0x46,0xe0,0x54,0xfb,0xfd,0x7f,0x46,0x12,0x4f,0x45,0x7f,
+0x02,0x91,0x41,0x8f,0x26,0x90,0x01,0xc9,0xe5,0x26,0xf0,0xb4,0x01,0x02,0x91,0x21,
+0x22,0x90,0x00,0x49,0xe0,0x90,0x97,0x6a,0xf0,0xe0,0x54,0x0f,0xf0,0x44,0xf0,0xfd,
+0x7f,0x49,0x12,0x4f,0x45,0x90,0x97,0x6a,0xe0,0x44,0xb0,0xfd,0x7f,0x49,0x02,0x4f,
+0x45,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x97,0x6d,0xef,0xf0,0xd3,0x94,0x07,
+0x50,0x47,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,
+0xff,0x90,0x00,0x46,0xe0,0x5f,0xf0,0x12,0x4e,0x47,0x90,0x97,0x6d,0xe0,0xfd,0x74,
+0x01,0x7e,0x00,0xa8,0x05,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,
+0x90,0x00,0x44,0xe0,0xfb,0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,
+0xe7,0x13,0xce,0x13,0xd8,0xf8,0xff,0x80,0x44,0x90,0x97,0x6d,0xe0,0x24,0xf8,0xf0,
+0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0x12,0x4e,0x3f,
+0x90,0x97,0x6d,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8,0x05,0x08,0x80,0x05,0xc3,0x33,
+0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x42,0xe0,0xfb,0xe4,0xfe,0xef,0x5b,0xa8,
+0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13,0xd8,0xf8,0xff,0xd0,0xd0,0x92,
+0xaf,0x22,0xe4,0xf5,0x22,0x7f,0x60,0x7e,0x01,0x02,0x44,0xf3,0xd3,0x10,0xaf,0x01,
+0xc3,0xc0,0xd0,0x90,0x97,0x2b,0xe0,0x90,0x96,0xfe,0xf0,0x90,0x97,0x2c,0xe0,0xf5,
+0x61,0xa3,0xe0,0xf5,0x62,0xe4,0xf5,0x5e,0x74,0x2e,0x25,0x5e,0xf5,0x82,0xe4,0x34,
+0x97,0xf5,0x83,0xe0,0xff,0x74,0x63,0x25,0x5e,0xf8,0xa6,0x07,0x05,0x5e,0xe5,0x5e,
+0xb4,0x04,0xe5,0x90,0x96,0xfe,0xe0,0x12,0x43,0x94,0x75,0x49,0x00,0x76,0x71,0x01,
+0x75,0x4f,0x02,0x75,0x4f,0x03,0x75,0x4f,0x04,0x76,0x71,0x05,0x76,0x41,0x80,0x76,
+0x57,0x81,0x76,0x71,0x82,0x00,0x00,0x76,0x6d,0xaf,0x66,0xd1,0x78,0xc1,0x71,0x90,
+0x96,0xfe,0xe0,0xff,0xb4,0x02,0x08,0x90,0x96,0xfd,0x74,0x01,0xf0,0x80,0x0f,0xef,
+0x90,0x96,0xfd,0xb4,0x03,0x05,0x74,0x02,0xf0,0x80,0x03,0x74,0x04,0xf0,0xc3,0xe5,
+0x61,0x94,0x08,0x50,0x49,0xe4,0xf5,0x5e,0x90,0x96,0xfd,0xe0,0xff,0xe5,0x5e,0xc3,
+0x9f,0x40,0x02,0xc1,0x71,0xc3,0xe5,0x61,0x94,0x01,0x50,0x14,0xe5,0x5e,0x25,0x62,
+0xff,0xc3,0x74,0x03,0x95,0x5e,0x24,0x63,0xf8,0xe6,0xfd,0x12,0x4f,0x45,0x80,0x1a,
+0xc3,0x74,0x03,0x95,0x5e,0x24,0x63,0xf8,0xe6,0xff,0xe5,0x5e,0x7c,0x00,0x25,0x62,
+0xfd,0xec,0x35,0x61,0x8d,0x82,0xf5,0x83,0xef,0xf0,0x05,0x5e,0x80,0xba,0xc3,0xe5,
+0x61,0x94,0x10,0x40,0x02,0xc1,0x71,0x90,0x96,0xfe,0xe0,0x64,0x04,0x60,0x02,0xc1,
+0x71,0xaf,0x64,0xfc,0xfd,0xfe,0x78,0x10,0x12,0x24,0xf5,0xc0,0x04,0xc0,0x05,0xc0,
+0x06,0xc0,0x07,0xaf,0x63,0xe4,0xfc,0xfd,0xfe,0x78,0x18,0x12,0x24,0xf5,0xd0,0x03,
+0xd0,0x02,0xd0,0x01,0xd0,0x00,0x12,0x43,0x46,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,
+0x07,0xaf,0x65,0xe4,0xfc,0xfd,0xfe,0x78,0x08,0x12,0x24,0xf5,0xd0,0x03,0xd0,0x02,
+0xd0,0x01,0xd0,0x00,0x12,0x43,0x46,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,0x07,0xaf,
+0x66,0xe4,0xfc,0xfd,0xfe,0x12,0x43,0x46,0xa3,0x12,0x25,0x08,0x90,0x96,0xff,0x12,
+0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0xaf,0x62,0xae,0x61,0x12,0x2b,0x08,0x80,
+0x30,0xe5,0x65,0x7f,0x00,0xfe,0xef,0x25,0x66,0xf5,0x60,0xe4,0x3e,0xf5,0x5f,0xaf,
+0x60,0xfe,0x12,0x32,0x15,0x80,0x1a,0xe5,0x65,0x7f,0x00,0xfe,0xef,0x25,0x66,0xf5,
+0x60,0xe4,0x3e,0xf5,0x5f,0xaf,0x60,0xfe,0x12,0x31,0x82,0x80,0x04,0x7f,0x00,0x80,
+0x02,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x67,0xe4,0x90,0x97,0x03,0xf0,0xe5,
+0x67,0x14,0xfe,0x90,0x97,0x03,0xe0,0xff,0xc3,0x9e,0x50,0x0e,0xef,0x04,0xfd,0x12,
+0x2d,0x4d,0x90,0x97,0x03,0xe0,0x04,0xf0,0x80,0xe5,0xe5,0x67,0x14,0xff,0x7d,0xff,
+0x12,0x2d,0x4d,0x90,0x97,0x03,0xe5,0x67,0xf0,0x90,0x97,0x03,0xe0,0xc3,0x94,0xff,
+0x50,0x0f,0xe0,0xff,0x04,0xfd,0x12,0x2d,0x4d,0x90,0x97,0x03,0xe0,0x04,0xf0,0x80,
+0xe8,0xad,0x67,0x7f,0xff,0x02,0x2d,0x4d,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xe4,
+0xf5,0x58,0x75,0x59,0x04,0xf5,0x5a,0xf5,0x5c,0xf5,0x5d,0x90,0x02,0x09,0xe0,0xff,
+0x12,0x24,0x62,0xfe,0xef,0x2e,0xf5,0x5b,0x30,0xe0,0x08,0x75,0x56,0x00,0x75,0x57,
+0x80,0x80,0x05,0xe4,0xf5,0x56,0xf5,0x57,0xe5,0x5b,0xc3,0x13,0x90,0xfd,0x10,0xf0,
+0x74,0x20,0x25,0x58,0xf5,0x58,0xad,0x57,0xe5,0x58,0x2d,0xff,0x24,0x01,0xf5,0x82,
+0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x90,0x97,0x2b,0xf0,0x74,0x02,0x2f,0xf5,0x82,0xe4,
+0x34,0xfc,0xf5,0x83,0xe0,0xfe,0xe5,0x58,0x2d,0x24,0x03,0xf5,0x82,0xe4,0x34,0xfc,
+0xf5,0x83,0xe0,0x24,0x00,0xff,0xe4,0x3e,0x90,0x97,0x2c,0xf0,0xa3,0xef,0xf0,0x7f,
+0x04,0xe5,0x58,0x25,0x57,0x2f,0x24,0x00,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,
+0xfe,0x74,0x2a,0x2f,0xf5,0x82,0xe4,0x34,0x97,0xf5,0x83,0xee,0xf0,0x0f,0xbf,0x08,
+0xe0,0x91,0xec,0xef,0x70,0x3f,0x90,0x01,0xc3,0xe0,0x60,0x25,0xc3,0xe5,0x5d,0x94,
+0xe8,0xe5,0x5c,0x94,0x03,0x40,0x09,0x90,0x01,0xc6,0xe0,0x44,0x10,0xf0,0x80,0x63,
+0x05,0x5d,0xe5,0x5d,0x70,0x02,0x05,0x5c,0x7f,0x0a,0x7e,0x00,0x12,0x32,0x15,0x80,
+0xd5,0x90,0x01,0xc6,0xe0,0x90,0x01,0xc3,0x30,0xe2,0x05,0x74,0xfe,0xf0,0x80,0x43,
+0x74,0xff,0xf0,0x80,0x3e,0xe5,0x58,0xb4,0x78,0x23,0xe4,0xf5,0x58,0x05,0x5b,0xe5,
+0x57,0x64,0x80,0x45,0x56,0x70,0x06,0xf5,0x56,0xf5,0x57,0x80,0x06,0x75,0x56,0x00,
+0x75,0x57,0x80,0xe5,0x5b,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x80,0x06,0x74,0x08,0x25,
+0x58,0xf5,0x58,0xe5,0x5a,0x15,0x5a,0x70,0x02,0x15,0x59,0xe5,0x5a,0x45,0x59,0x60,
+0x02,0xe1,0x06,0xd0,0xd0,0x92,0xaf,0x22,0x22,0xe4,0x90,0x97,0x32,0xf0,0x90,0x00,
+0x80,0xe0,0x44,0x80,0xfd,0x7f,0x80,0x02,0x4f,0x45,0xe4,0xf5,0x25,0x22,0xe4,0x90,
+0x97,0x42,0xf0,0x90,0x97,0x3c,0xe0,0x54,0xfe,0xf0,0x54,0xfb,0xf0,0xe4,0xa3,0xf0,
+0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x97,0x36,0xe0,0x54,0xfe,0xf0,0x54,
+0xfb,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x22,0x11,0x68,
+0xef,0x70,0x06,0x90,0x01,0xc8,0x74,0xfd,0xf0,0x11,0xb5,0x90,0x97,0x3d,0x74,0x02,
+0xf0,0x22,0x11,0x46,0x80,0xe8,0x90,0x01,0x3e,0x74,0x03,0xf0,0xfd,0x7f,0x02,0x12,
+0x31,0xb7,0x90,0x97,0x3d,0x74,0x01,0xf0,0x22,0x11,0x46,0x90,0x05,0x22,0x74,0xff,
+0xf0,0x90,0x97,0x3d,0x74,0x04,0xf0,0x22,0x90,0x05,0x22,0x74,0xff,0xf0,0xe4,0x90,
+0x97,0x63,0xf0,0xa3,0xf0,0x90,0x05,0xf8,0xe0,0x70,0x0f,0xa3,0xe0,0x70,0x0b,0xa3,
+0xe0,0x70,0x07,0xa3,0xe0,0x70,0x03,0x7f,0x01,0x22,0xd3,0x90,0x97,0x64,0xe0,0x94,
+0xe8,0x90,0x97,0x63,0xe0,0x94,0x03,0x40,0x03,0x7f,0x00,0x22,0x7f,0x32,0x7e,0x00,
+0x12,0x32,0x15,0x90,0x97,0x63,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x80,0xc6,0x90,
+0x05,0x22,0x74,0xff,0xf0,0x7f,0x78,0x7e,0x08,0x12,0x22,0x65,0x90,0x96,0xdd,0x12,
+0x25,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x22,0x65,0x90,0x96,0xe1,0x12,0x25,0x08,0x7f,
+0x00,0x7e,0x08,0x12,0x22,0x65,0x90,0x96,0xe5,0x12,0x25,0x08,0x90,0x97,0x35,0xe0,
+0x90,0x96,0xdd,0xb4,0x01,0x0d,0x12,0x43,0x53,0xef,0x54,0xc7,0xff,0xed,0x54,0xc7,
+0xfd,0x80,0x07,0x12,0x43,0x53,0xef,0x54,0xc7,0xff,0xec,0x90,0x80,0x96,0x12,0x25,
+0x08,0x7f,0x78,0x7e,0x08,0x12,0x2b,0x08,0x90,0x96,0xe1,0x12,0x43,0x53,0xef,0x54,
+0x0f,0xff,0xec,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x08,
+0x90,0x96,0xe5,0x12,0x43,0x53,0xef,0x44,0x02,0xff,0xec,0x90,0x80,0x96,0x12,0x25,
+0x08,0x7f,0x00,0x7e,0x08,0x12,0x2b,0x08,0x7f,0x70,0x7e,0x0e,0x12,0x22,0x65,0x90,
+0x96,0xe9,0x12,0x25,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x00,0x1b,0x25,0xa0,0x7f,
+0x70,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x68,0x12,0x25,0x14,0x00,0x00,0x00,0x00,
+0xe4,0xfd,0xff,0x12,0x30,0x2c,0x90,0x97,0x35,0xe0,0xb4,0x01,0x11,0x90,0x80,0x68,
+0x12,0x25,0x14,0x00,0x00,0x00,0x00,0xe4,0xfd,0x7f,0x01,0x12,0x30,0x2c,0x90,0x00,
+0x11,0xe0,0x54,0xf6,0xf0,0x02,0x4e,0x47,0x11,0xaf,0x90,0x97,0x3d,0x74,0x02,0xf0,
+0x22,0x11,0xb5,0x90,0x97,0x3d,0x74,0x02,0xf0,0x22,0x11,0xaf,0x90,0x97,0x37,0x74,
+0x04,0xf0,0x22,0x90,0x05,0x22,0x74,0xff,0xf0,0x90,0x97,0x3d,0x74,0x04,0xf0,0x22,
+0x12,0x4d,0xc1,0x90,0x97,0x3d,0x74,0x04,0xf0,0x22,0x90,0x05,0x22,0x74,0xff,0xf0,
+0x90,0x97,0x37,0x74,0x05,0xf0,0x22,0x90,0x05,0x22,0x74,0xff,0xf0,0x90,0x97,0x37,
+0x74,0x02,0xf0,0x22,0x90,0x05,0x22,0x74,0x6f,0xf0,0x90,0x97,0x37,0x74,0x06,0xf0,
+0x22,0x90,0x05,0x22,0xe4,0xf0,0x90,0x97,0x37,0x04,0xf0,0x22,0x90,0x05,0x22,0xe4,
+0xf0,0x90,0x97,0x37,0xf0,0x22,0xae,0x07,0xe4,0xff,0x12,0x4c,0x21,0xef,0x60,0x19,
+0x90,0x97,0x36,0xe0,0xc4,0x13,0x13,0x54,0x03,0x20,0xe0,0x0d,0xaf,0x06,0x7d,0x01,
+0x12,0x47,0xab,0x12,0x55,0xce,0x7f,0x01,0x22,0x7f,0x00,0x22,0x90,0x01,0x57,0xe0,
+0x60,0x43,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x97,0x20,
+0xe0,0x60,0x0a,0xe4,0xf0,0x90,0x97,0x21,0xe0,0x54,0xfd,0xf0,0x22,0x90,0x97,0x0f,
+0xe0,0x04,0xf0,0x90,0x97,0x21,0xe0,0x54,0xef,0xf0,0x90,0x97,0x14,0xe0,0xff,0x90,
+0x97,0x0f,0xe0,0xd3,0x9f,0x40,0x0e,0xe5,0x70,0xb4,0x01,0x09,0x90,0x97,0x10,0xe0,
+0x70,0x03,0xe0,0x04,0xf0,0x22,0x90,0x97,0x35,0xe0,0x90,0x96,0xed,0xf0,0x22,0xef,
+0x70,0x02,0x81,0x25,0x90,0x96,0xed,0xe0,0x60,0x02,0xe1,0xf0,0x90,0x96,0xd9,0x12,
+0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x8c,0x7e,0x08,0x12,0x2b,0x08,0x90,
+0x96,0x85,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x44,0x7e,0x08,0x12,
+0x2b,0x08,0x90,0x96,0x89,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x5c,
+0x7e,0x08,0x12,0x2b,0x08,0x90,0x96,0x8d,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,
+0x08,0x7f,0x6c,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x96,0x91,0x12,0x43,0x53,0x90,0x80,
+0x96,0x12,0x25,0x08,0x7f,0x70,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x96,0x95,0x12,0x43,
+0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x74,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x96,
+0x99,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x78,0x7e,0x0e,0x12,0x2b,
+0x08,0x90,0x96,0x9d,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x7c,0x7e,
+0x0e,0x12,0x2b,0x08,0x90,0x96,0xa1,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,
+0x7f,0x80,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x96,0xa5,0x12,0x43,0x53,0x90,0x80,0x96,
+0x12,0x25,0x08,0x7f,0x84,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x96,0xa9,0x12,0x43,0x53,
+0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x88,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x96,0xad,
+0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x8c,0x7e,0x0e,0x12,0x2b,0x08,
+0x90,0x96,0xb1,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0xd0,0x7e,0x0e,
+0x12,0x2b,0x08,0x90,0x96,0xb5,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,
+0xd4,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x96,0xb9,0x12,0x43,0x53,0x90,0x80,0x96,0x12,
+0x25,0x08,0x7f,0xd8,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x96,0xbd,0x12,0x43,0x53,0x90,
+0x80,0x96,0x12,0x25,0x08,0x7f,0xdc,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x96,0xc1,0x12,
+0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0xe0,0x7e,0x0e,0x12,0x2b,0x08,0x90,
+0x96,0xc5,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0xec,0x7e,0x0e,0x12,
+0x2b,0x08,0x90,0x96,0xc9,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,
+0x7e,0x0c,0x12,0x2b,0x08,0x90,0x96,0xcd,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,
+0x08,0x7f,0x04,0x7e,0x0d,0x12,0x2b,0x08,0x90,0x96,0xd1,0x12,0x43,0x53,0x90,0x80,
+0x96,0x12,0x25,0x08,0x7f,0x0c,0x7e,0x09,0x12,0x2b,0x08,0x90,0x96,0xd5,0x12,0x43,
+0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x08,0x12,0x2b,0x08,0x90,0x96,
+0xed,0x74,0x01,0xf0,0x22,0x90,0x96,0xed,0xe0,0x64,0x01,0x60,0x02,0xe1,0xf0,0x7f,
+0x8c,0x7e,0x08,0x12,0x22,0x65,0x90,0x96,0xd9,0x12,0x25,0x08,0x7f,0x44,0x7e,0x08,
+0x12,0x22,0x65,0x90,0x96,0x85,0x12,0x25,0x08,0x7f,0x5c,0x7e,0x08,0x12,0x22,0x65,
+0x90,0x96,0x89,0x12,0x25,0x08,0x7f,0x6c,0x7e,0x0e,0x12,0x22,0x65,0x90,0x96,0x8d,
+0x12,0x25,0x08,0x7f,0x70,0x7e,0x0e,0x12,0x22,0x65,0x90,0x96,0x91,0x12,0x25,0x08,
+0x7f,0x74,0x7e,0x0e,0x12,0x22,0x65,0x90,0x96,0x95,0x12,0x25,0x08,0x7f,0x78,0x7e,
+0x0e,0x12,0x22,0x65,0x90,0x96,0x99,0x12,0x25,0x08,0x7f,0x7c,0x7e,0x0e,0x12,0x22,
+0x65,0x90,0x96,0x9d,0x12,0x25,0x08,0x7f,0x80,0x7e,0x0e,0x12,0x22,0x65,0x90,0x96,
+0xa1,0x12,0x25,0x08,0x7f,0x84,0x7e,0x0e,0x12,0x22,0x65,0x90,0x96,0xa5,0x12,0x25,
+0x08,0x7f,0x88,0x7e,0x0e,0x12,0x22,0x65,0x90,0x96,0xa9,0x12,0x25,0x08,0x7f,0x8c,
+0x7e,0x0e,0x12,0x22,0x65,0x90,0x96,0xad,0x12,0x25,0x08,0x7f,0xd0,0x7e,0x0e,0x12,
+0x22,0x65,0x90,0x96,0xb1,0x12,0x25,0x08,0x7f,0xd4,0x7e,0x0e,0x12,0x22,0x65,0x90,
+0x96,0xb5,0x12,0x25,0x08,0x7f,0xd8,0x7e,0x0e,0x12,0x22,0x65,0x90,0x96,0xb9,0x12,
+0x25,0x08,0x7f,0xdc,0x7e,0x0e,0x12,0x22,0x65,0x90,0x96,0xbd,0x12,0x25,0x08,0x7f,
+0xe0,0x7e,0x0e,0x12,0x22,0x65,0x90,0x96,0xc1,0x12,0x25,0x08,0x7f,0xec,0x7e,0x0e,
+0x12,0x22,0x65,0x90,0x96,0xc5,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x22,0x65,
+0x90,0x96,0xc9,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0d,0x12,0x22,0x65,0x90,0x96,0xcd,
+0x12,0x25,0x08,0x7f,0x0c,0x7e,0x09,0x12,0x22,0x65,0x90,0x96,0xd1,0x12,0x25,0x08,
+0x7f,0x04,0x7e,0x08,0x12,0x22,0x65,0x90,0x96,0xd5,0x12,0x25,0x08,0x7f,0x8c,0x7e,
+0x08,0x12,0x22,0x65,0x90,0x97,0x5d,0x12,0x25,0x08,0x90,0x97,0x5d,0x12,0x43,0x53,
+0xed,0x44,0xc0,0xfd,0xec,0x90,0x97,0x5d,0x12,0x25,0x08,0x90,0x97,0x5d,0x12,0x43,
+0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x8c,0x7e,0x08,0x12,0x2b,0x08,0x90,0x80,
+0x96,0x12,0x25,0x14,0x00,0x01,0x00,0x00,0x7f,0x44,0x7e,0x08,0x12,0x2b,0x08,0x90,
+0x80,0x96,0x12,0x25,0x14,0x00,0xdb,0x25,0xa4,0x7f,0x5c,0x7e,0x08,0x12,0x2b,0x08,
+0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25,0xa4,0x7f,0x6c,0x7e,0x0e,0x12,0x2b,
+0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25,0xa4,0x7f,0x70,0x7e,0x0e,0x12,
+0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x04,0x1b,0x25,0xa4,0x7f,0x74,0x7e,0x0e,
+0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x04,0x1b,0x25,0xa4,0x7f,0x78,0x7e,
+0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x04,0x1b,0x25,0xa4,0x7f,0x7c,
+0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x04,0x1b,0x25,0xa4,0x7f,
+0x80,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x63,0xdb,0x25,0xa4,
+0x7f,0x84,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x04,0x1b,0x25,
+0xa4,0x7f,0x88,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,
+0x25,0xa4,0x7f,0x8c,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,
+0xdb,0x25,0xa4,0x7f,0xd0,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,
+0x20,0xdb,0x25,0xa4,0x7f,0xd4,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,
+0x14,0x20,0xdb,0x25,0xa4,0x7f,0xd8,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,
+0x25,0x14,0x00,0x1b,0x25,0xa4,0x7f,0xdc,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,
+0x12,0x25,0x14,0x00,0x1b,0x25,0xa4,0x7f,0xe0,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,
+0x96,0x12,0x25,0x14,0x24,0xdb,0x25,0xa4,0x7f,0xec,0x7e,0x0e,0x12,0x2b,0x08,0x7f,
+0x04,0x7e,0x0c,0x12,0x22,0x65,0x90,0x97,0x5d,0x12,0x25,0x08,0x90,0x97,0x5d,0x12,
+0x43,0x53,0xe4,0xff,0xec,0x90,0x97,0x5d,0x12,0x25,0x08,0x90,0x97,0x5d,0x12,0x43,
+0x53,0xef,0x44,0x11,0xff,0xec,0x90,0x97,0x5d,0x12,0x25,0x08,0x90,0x97,0x5d,0x12,
+0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x08,0x7f,
+0x04,0x7e,0x0d,0x12,0x22,0x65,0x90,0x97,0x5d,0x12,0x25,0x08,0x90,0x97,0x5d,0x12,
+0x43,0x53,0xef,0x54,0xf0,0xff,0xec,0x90,0x97,0x5d,0x12,0x25,0x08,0x90,0x97,0x5d,
+0x12,0x43,0x53,0xef,0x44,0x01,0xff,0xec,0x90,0x97,0x5d,0x12,0x25,0x08,0x90,0x97,
+0x5d,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0d,0x12,0x2b,
+0x08,0x7f,0x0c,0x7e,0x09,0x12,0x22,0x65,0x90,0x97,0x5d,0x12,0x25,0x08,0x90,0x97,
+0x5d,0x12,0x43,0x53,0xe4,0xff,0xec,0x90,0x97,0x5d,0x12,0x25,0x08,0x90,0x97,0x5d,
+0x12,0x43,0x53,0xef,0x44,0x11,0xff,0xec,0x90,0x97,0x5d,0x12,0x25,0x08,0x90,0x97,
+0x5d,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x0c,0x7e,0x09,0x12,0x2b,
+0x08,0x7f,0x0c,0x7e,0x09,0x12,0x22,0x65,0x90,0x97,0x5d,0x12,0x25,0x08,0x90,0x97,
+0x5d,0x12,0x43,0x53,0xed,0x54,0x0f,0xfd,0xec,0x54,0xf0,0xfc,0x90,0x97,0x5d,0x12,
+0x25,0x08,0x90,0x97,0x5d,0x12,0x43,0x53,0xed,0x44,0x10,0xfd,0xec,0x44,0x01,0xfc,
+0x90,0x97,0x5d,0x12,0x25,0x08,0x90,0x97,0x5d,0x12,0x43,0x53,0x90,0x80,0x96,0x12,
+0x25,0x08,0x7f,0x0c,0x7e,0x09,0x12,0x2b,0x08,0x7f,0x04,0x7e,0x08,0x12,0x22,0x65,
+0x90,0x97,0x5d,0x12,0x25,0x08,0x90,0x97,0x5d,0x12,0x43,0x53,0xef,0x54,0xf0,0xff,
+0xec,0x90,0x97,0x5d,0x12,0x25,0x08,0x90,0x97,0x5d,0x12,0x43,0x53,0xef,0x44,0x01,
+0xff,0xec,0x90,0x97,0x5d,0x12,0x25,0x08,0x90,0x97,0x5d,0x12,0x43,0x53,0x90,0x80,
+0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x08,0x12,0x2b,0x08,0xe4,0x90,0x96,0xed,0xf0,
+0x22,0x00,0x0e,0x7c,};
+
+// =================== v79 UMC B Cut P2PPS 2011-10-06 =====================
+u8 Rtl8192CUFwUMCBCutImgArray[UMCBCutImgArrayLength] = {
+0xc2,0x88,0x02,0x05,0x4f,0x00,0x00,0x00,0x0a,0x06,0x18,0x10,0xe2,0x3f,0x01,0x00,
+0x61,0x80,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x02,0x43,0xba,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x02,0x50,0xe5,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x02,0x64,0xef,0x00,0x00,0x00,0x00,0x00,0xa1,0x53,0x00,0x00,0x00,
+0x05,0x04,0x03,0x02,0x00,0x03,0x06,0x05,0x04,0x03,0x00,0x04,0x06,0x05,0x04,0x02,
+0x00,0x04,0x08,0x07,0x06,0x04,0x00,0x06,0x0a,0x09,0x08,0x06,0x00,0x08,0x0a,0x09,
+0x08,0x04,0x00,0x08,0x0a,0x09,0x08,0x02,0x00,0x08,0x0a,0x09,0x08,0x00,0x00,0x08,
+0x12,0x11,0x10,0x08,0x00,0x10,0x1a,0x19,0x18,0x10,0x00,0x18,0x22,0x21,0x20,0x18,
+0x00,0x20,0x22,0x21,0x20,0x10,0x00,0x20,0x22,0x21,0x20,0x08,0x00,0x20,0x22,0x21,
+0x1c,0x08,0x00,0x20,0x22,0x21,0x14,0x08,0x00,0x20,0x22,0x20,0x18,0x08,0x00,0x20,
+0x31,0x30,0x20,0x10,0x00,0x30,0x31,0x30,0x18,0x00,0x00,0x30,0x31,0x2f,0x10,0x10,
+0x00,0x30,0x31,0x2c,0x10,0x10,0x00,0x30,0x31,0x28,0x10,0x00,0x00,0x30,0x31,0x20,
+0x10,0x00,0x00,0x30,0x31,0x10,0x10,0x00,0x00,0x30,0x04,0x04,0x04,0x05,0x04,0x04,
+0x05,0x07,0x07,0x07,0x08,0x0a,0x04,0x04,0x04,0x04,0x06,0x0a,0x0b,0x0d,0x05,0x05,
+0x07,0x07,0x08,0x0b,0x0d,0x0f,0x04,0x04,0x04,0x05,0x07,0x07,0x09,0x09,0x0c,0x0e,
+0x10,0x12,0x04,0x04,0x05,0x05,0x06,0x0a,0x11,0x13,0x09,0x09,0x09,0x09,0x0c,0x0e,
+0x11,0x13,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x24,0x26,0x2a,0x18,0x1a,
+0x1d,0x1f,0x21,0x27,0x29,0x2a,0x00,0x00,0x00,0x1f,0x23,0x28,0x2a,0x2c,0x00,0x04,
+0x00,0x04,0x00,0x08,0x00,0x10,0x00,0x18,0x00,0x24,0x00,0x30,0x00,0x48,0x00,0x60,
+0x00,0x90,0x00,0xc0,0x00,0xd8,0x00,0x50,0x00,0x78,0x00,0xa0,0x00,0xc8,0x01,0x40,
+0x01,0x90,0x01,0xe0,0x02,0x30,0x01,0x2c,0x01,0x40,0x01,0xe0,0x02,0xd0,0x03,0xe8,
+0x04,0xb0,0x06,0x40,0x07,0xd0,0x00,0x02,0x00,0x02,0x00,0x04,0x00,0x08,0x00,0x0c,
+0x00,0x12,0x00,0x18,0x00,0x24,0x00,0x30,0x00,0x48,0x00,0x60,0x00,0x6c,0x00,0x28,
+0x00,0x3c,0x00,0x50,0x00,0x64,0x00,0xa0,0x00,0xc8,0x00,0xf0,0x01,0x18,0x00,0x64,
+0x00,0xa0,0x00,0xf0,0x01,0x68,0x01,0xf4,0x02,0x58,0x03,0x20,0x03,0xe8,0x02,0x02,
+0x02,0x02,0x02,0x02,0x03,0x03,0x04,0x04,0x05,0x07,0x04,0x04,0x07,0x0a,0x0a,0x0c,
+0x0c,0x12,0x05,0x07,0x07,0x08,0x0b,0x12,0x24,0x3c,0x01,0x01,0x01,0x01,0x01,0x02,
+0x03,0x04,0x05,0x06,0x07,0x08,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x05,0x06,
+0x07,0x08,0x09,0x0a,0x0b,0x0c,0x20,0x1e,0x1c,0x18,0x10,0x18,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0xbb,0x01,0x0c,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0x22,0x50,
+0x06,0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,0x25,0x82,0xf8,0xe2,0x22,
+0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe4,0x93,0x22,0xbb,0x01,0x06,
+0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8,
+0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22,
+0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2,
+0x22,0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0,0xc5,0xf0,0xf8,0xe5,0x82,0x15,0x82,0x70,
+0x02,0x15,0x83,0xe0,0x38,0xf0,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a,0x83,0xe0,0xf5,
+0xf0,0xa3,0xe0,0x22,0x50,0x06,0x87,0xf0,0x09,0xe7,0x19,0x22,0xbb,0xfe,0x07,0xe3,
+0xf5,0xf0,0x09,0xe3,0x19,0x22,0x89,0x82,0x8a,0x83,0xe4,0x93,0xf5,0xf0,0x74,0x01,
+0x93,0x22,0xbb,0x01,0x10,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,
+0xf5,0xf0,0xa3,0xe0,0x22,0x50,0x09,0xe9,0x25,0x82,0xf8,0x86,0xf0,0x08,0xe6,0x22,
+0xbb,0xfe,0x0a,0xe9,0x25,0x82,0xf8,0xe2,0xf5,0xf0,0x08,0xe2,0x22,0xe5,0x83,0x2a,
+0xf5,0x83,0xe9,0x93,0xf5,0xf0,0xa3,0xe9,0x93,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a,
+0x83,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x06,0xf7,0x09,0xa7,0xf0,0x19,0x22,0xbb,
+0xfe,0x06,0xf3,0xe5,0xf0,0x09,0xf3,0x19,0x22,0xf8,0xbb,0x01,0x11,0xe5,0x82,0x29,
+0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x09,
+0xe9,0x25,0x82,0xc8,0xf6,0x08,0xa6,0xf0,0x22,0xbb,0xfe,0x09,0xe9,0x25,0x82,0xc8,
+0xf2,0xe5,0xf0,0x08,0xf2,0x22,0xef,0x4b,0xff,0xee,0x4a,0xfe,0xed,0x49,0xfd,0xec,
+0x48,0xfc,0x22,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0xa4,
+0x25,0x82,0xf5,0x82,0xe5,0xf0,0x35,0x83,0xf5,0x83,0x22,0xe0,0xfb,0xa3,0xe0,0xfa,
+0xa3,0xe0,0xf9,0x22,0xf8,0xe0,0xfb,0xa3,0xa3,0xe0,0xf9,0x25,0xf0,0xf0,0xe5,0x82,
+0x15,0x82,0x70,0x02,0x15,0x83,0xe0,0xfa,0x38,0xf0,0x22,0xeb,0xf0,0xa3,0xea,0xf0,
+0xa3,0xe9,0xf0,0x22,0xd0,0x83,0xd0,0x82,0xf8,0xe4,0x93,0x70,0x12,0x74,0x01,0x93,
+0x70,0x0d,0xa3,0xa3,0x93,0xf8,0x74,0x01,0x93,0xf5,0x82,0x88,0x83,0xe4,0x73,0x74,
+0x02,0x93,0x68,0x60,0xef,0xa3,0xa3,0xa3,0x80,0xdf,0x02,0x43,0xf8,0x02,0x58,0x73,
+0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0x40,0x03,0xf6,0x80,0x01,0xf2,0x08,0xdf,0xf4,
+0x80,0x29,0xe4,0x93,0xa3,0xf8,0x54,0x07,0x24,0x0c,0xc8,0xc3,0x33,0xc4,0x54,0x0f,
+0x44,0x20,0xc8,0x83,0x40,0x04,0xf4,0x56,0x80,0x01,0x46,0xf6,0xdf,0xe4,0x80,0x0b,
+0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,0x90,0x44,0x3d,0xe4,0x7e,0x01,0x93,0x60,
+0xbc,0xa3,0xff,0x54,0x3f,0x30,0xe5,0x09,0x54,0x1f,0xfe,0xe4,0x93,0xa3,0x60,0x01,
+0x0e,0xcf,0x54,0xc0,0x25,0xe0,0x60,0xa8,0x40,0xb8,0xe4,0x93,0xa3,0xfa,0xe4,0x93,
+0xa3,0xf8,0xe4,0x93,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xf0,0xa3,0xc8,
+0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xdf,0xe9,0xde,0xe7,0x80,0xbe,0x41,0x97,0x24,
+0x00,0x41,0x97,0x67,0x00,0x41,0x97,0x0b,0x80,0x41,0x97,0x0c,0x80,0x41,0x97,0x69,
+0x00,0x00,0xf0,0x90,0x97,0x15,0xe0,0x90,0x97,0x48,0xf0,0xe4,0xfb,0xfd,0x7f,0x54,
+0x7e,0x01,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x97,0x46,0xeb,0xf0,0xa3,0xe0,
+0xfb,0xa3,0xe0,0xf5,0x44,0xe4,0xf5,0x45,0x12,0x35,0xab,0xd0,0xd0,0x92,0xaf,0x22,
+0xe4,0x90,0x97,0x47,0xf0,0x90,0x05,0x58,0xe0,0xff,0x90,0x97,0x42,0xe0,0x2f,0x24,
+0xfe,0x90,0x97,0x48,0xf0,0xe4,0xfb,0xfd,0x7f,0x50,0x7e,0x01,0x91,0x62,0x90,0x01,
+0x53,0x74,0x05,0xf0,0x22,0x90,0x01,0x5f,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x08,0xf0,
+0xe4,0x90,0x97,0x47,0xf0,0x90,0x97,0x13,0xe0,0x90,0x97,0x48,0xf0,0xe4,0xfb,0xfd,
+0x7f,0x5c,0x7e,0x01,0x91,0x62,0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,
+0x02,0xf0,0x90,0x97,0x1a,0x14,0xf0,0x90,0x97,0x1c,0xe0,0x54,0x0f,0xc3,0x94,0x0c,
+0x50,0x10,0x7d,0x01,0x7f,0x0c,0xf1,0xab,0x90,0x97,0x36,0xe0,0x30,0xe0,0x03,0x12,
+0x66,0xea,0x22,0x8f,0x82,0x8e,0x83,0xa3,0xa3,0xa3,0xe4,0xf0,0x22,0x02,0x4d,0xa0,
+0x22,0x22,0x22,0x02,0x65,0x3a,0x02,0x65,0x41,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,
+0x8b,0x1b,0x8a,0x1c,0x89,0x1d,0x90,0x97,0x49,0x71,0x8b,0xab,0x1e,0xaa,0x1f,0xa9,
+0x20,0x90,0x97,0x4c,0x71,0x8b,0xaf,0x21,0x15,0x21,0xef,0x60,0x1b,0x90,0x97,0x4c,
+0xe4,0x75,0xf0,0x01,0x71,0x74,0x12,0x29,0xd9,0xff,0x90,0x97,0x49,0xe4,0x75,0xf0,
+0x01,0x71,0x74,0xef,0x51,0x4d,0x80,0xde,0xab,0x1b,0xaa,0x1c,0xa9,0x1d,0xd0,0xd0,
+0x92,0xaf,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,
+0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,
+0x90,0x01,0xc4,0x74,0x53,0xf0,0x74,0x45,0xa3,0xf0,0x53,0x91,0xdf,0x90,0x01,0x3c,
+0xe0,0x55,0x30,0xf5,0x34,0xa3,0xe0,0x55,0x31,0xf5,0x35,0xa3,0xe0,0x55,0x32,0xf5,
+0x36,0xa3,0xe0,0x55,0x33,0xf5,0x37,0xe5,0x34,0x30,0xe0,0x55,0x90,0x01,0x3c,0x74,
+0x01,0xf0,0x90,0x97,0x3c,0xe0,0x30,0xe0,0x21,0x13,0x13,0x54,0x3f,0x30,0xe0,0x1a,
+0x90,0x97,0x3e,0xe4,0xf0,0x90,0x97,0x3d,0xe0,0x64,0x03,0x60,0x0d,0x7f,0x01,0x12,
+0x4c,0x1d,0xef,0x70,0x05,0x7f,0x02,0x12,0x4c,0x93,0x90,0x97,0x36,0xe0,0xff,0x30,
+0xe0,0x1f,0x13,0x13,0x54,0x3f,0x30,0xe0,0x18,0x90,0x97,0x38,0xe4,0xf0,0x90,0x97,
+0x37,0xe0,0x64,0x06,0x60,0x0b,0xe4,0xff,0x12,0x4c,0x1d,0xef,0x70,0x03,0x12,0x4d,
+0x6e,0xe5,0x34,0x30,0xe1,0x09,0x90,0x01,0x3c,0x74,0x02,0xf0,0x12,0x6a,0x4e,0xe5,
+0x34,0x30,0xe2,0x38,0x90,0x01,0x3c,0x74,0x04,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe0,
+0x24,0x90,0x97,0x47,0xe4,0xf0,0x90,0x97,0x13,0xe0,0x90,0x97,0x48,0xf0,0xe4,0xfb,
+0xfd,0x7f,0x58,0x7e,0x01,0x91,0x62,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92,
+0x74,0x01,0xf0,0x80,0x07,0x90,0x97,0x1b,0xe4,0xf0,0xf1,0x98,0xe5,0x34,0x30,0xe3,
+0x38,0x90,0x01,0x3c,0x74,0x08,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe1,0x24,0x90,0x97,
+0x47,0xe4,0xf0,0x90,0x97,0x13,0xe0,0x90,0x97,0x48,0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,
+0x7e,0x01,0x91,0x62,0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,
+0x80,0x07,0x90,0x97,0x1a,0xe4,0xf0,0xf1,0x98,0xe5,0x34,0x30,0xe4,0x09,0x90,0x01,
+0x3c,0x74,0x10,0xf0,0x12,0x74,0xe8,0xe5,0x35,0x30,0xe0,0x1a,0x90,0x01,0x3d,0x74,
+0x01,0xf0,0x90,0x01,0x2f,0xe0,0x44,0x7f,0xf0,0x90,0x00,0x83,0xe0,0x90,0x97,0x1e,
+0xf0,0x12,0x68,0xea,0xf1,0x98,0xe5,0x36,0x30,0xe1,0x48,0x90,0x01,0x3e,0x74,0x02,
+0xf0,0x90,0x97,0x3c,0xe0,0x30,0xe0,0x1b,0x90,0x97,0x40,0x74,0x01,0xf0,0x90,0x97,
+0x3d,0xe0,0x64,0x03,0x60,0x0d,0x7f,0x01,0x12,0x4c,0x1d,0xef,0x70,0x05,0x7f,0x02,
+0x12,0x4c,0x93,0x90,0x97,0x36,0xe0,0x30,0xe0,0x19,0x90,0x97,0x3a,0x74,0x01,0xf0,
+0x90,0x97,0x37,0xe0,0x64,0x06,0x60,0x0b,0xe4,0xff,0x12,0x4c,0x1d,0xef,0x70,0x03,
+0x12,0x4d,0x6e,0xe5,0x36,0x30,0xe0,0x7a,0x90,0x01,0x3e,0x74,0x01,0xf0,0x90,0x97,
+0x3c,0xe0,0x30,0xe0,0x1a,0x90,0x97,0x40,0xe4,0xf0,0x90,0x97,0x3d,0xe0,0x64,0x03,
+0x60,0x0d,0x7f,0x01,0x12,0x4c,0x1d,0xef,0x60,0x05,0x7f,0x01,0x12,0x4c,0x93,0x90,
+0x97,0x36,0xe0,0x30,0xe0,0x4c,0x90,0x97,0x3a,0xe4,0xf0,0xff,0x12,0x4c,0x1d,0xef,
+0x60,0x40,0x12,0x79,0xa0,0x90,0x97,0x37,0xe0,0xff,0x64,0x06,0x60,0x34,0xef,0xb4,
+0x04,0x02,0x80,0x07,0x90,0x97,0x37,0xe0,0xb4,0x05,0x04,0xe4,0xff,0x80,0x14,0x90,
+0x97,0x37,0xe0,0xb4,0x03,0x04,0x7f,0x01,0x80,0x09,0x90,0x97,0x37,0xe0,0xb4,0x02,
+0x05,0x7f,0x01,0x12,0x48,0x6e,0x90,0x97,0x1e,0xe0,0xff,0x7d,0x01,0xf1,0xab,0x12,
+0x66,0xea,0x74,0x53,0x04,0x90,0x01,0xc4,0xf0,0x74,0x45,0xa3,0xf0,0xd0,0x07,0xd0,
+0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,
+0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x90,0x97,0x36,0xe0,0x90,0x97,0x1e,0x30,
+0xe0,0x05,0xe0,0xff,0x02,0x67,0x22,0xe0,0xff,0x7d,0x01,0x8f,0x6e,0x8d,0x6f,0xe5,
+0x6e,0x54,0x0f,0xff,0x90,0x97,0x1c,0xe0,0x54,0x0f,0x6f,0x60,0x70,0xe5,0x6e,0x30,
+0xe2,0x2b,0x90,0x97,0x1c,0xe0,0x20,0xe2,0x05,0x7f,0x01,0x12,0x4f,0xb6,0x90,0x97,
+0x1c,0xe0,0x30,0xe3,0x07,0xe5,0x6e,0x20,0xe3,0x02,0x80,0x6c,0x90,0x97,0x1c,0xe0,
+0x20,0xe3,0x4a,0xe5,0x6e,0x30,0xe3,0x45,0xaf,0x6f,0x02,0x68,0x2e,0x90,0x97,0x1c,
+0xe0,0x54,0x0f,0xff,0xbf,0x0c,0x0d,0xe5,0x6e,0x20,0xe3,0x08,0x12,0x67,0x70,0xef,
+0x60,0x2b,0x11,0x48,0x90,0x97,0x1c,0xe0,0x54,0x0f,0xff,0xbf,0x04,0x0d,0xe5,0x6e,
+0x20,0xe2,0x08,0x12,0x57,0xeb,0xef,0x60,0x14,0xf1,0x5e,0x90,0x97,0x1c,0xe0,0x54,
+0x0f,0xff,0xbf,0x02,0x08,0x12,0x67,0xbb,0xef,0x60,0x02,0x11,0x2e,0x22,0x90,0x97,
+0x1c,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x01,0xf0,0x12,0x45,0x00,0x12,0x45,0x02,0xe0,
+0x54,0xf0,0xf0,0xe0,0x44,0x02,0xf0,0x22,0x90,0x06,0x04,0xe0,0x44,0x40,0xf0,0xe5,
+0x70,0xb4,0x01,0x05,0x7f,0x01,0x12,0x68,0x4d,0x90,0x97,0x1c,0xe0,0x54,0xf0,0xf0,
+0xe0,0x44,0x04,0xf0,0x22,0x11,0x48,0x90,0x97,0x37,0x74,0x01,0xf0,0x22,0x90,0x97,
+0x37,0xe0,0xfe,0x6f,0x70,0x02,0x21,0x66,0xef,0x12,0x43,0x94,0x48,0x95,0x00,0x48,
+0xbf,0x01,0x48,0xf1,0x02,0x48,0xfc,0x03,0x49,0x1e,0x04,0x49,0x3f,0x05,0x49,0x48,
+0x06,0x00,0x00,0x49,0x66,0xee,0xb4,0x04,0x04,0x7f,0x01,0x21,0x7f,0x90,0x97,0x37,
+0xe0,0xff,0xb4,0x05,0x03,0x02,0x79,0x96,0xef,0xb4,0x06,0x06,0x7f,0x01,0x31,0x70,
+0x80,0x0b,0x90,0x97,0x37,0xe0,0xb4,0x03,0x04,0x7f,0x01,0x31,0x67,0xa1,0x63,0x90,
+0x97,0x37,0xe0,0xb4,0x04,0x04,0x7f,0x01,0x31,0x7f,0x90,0x97,0x37,0xe0,0x70,0x02,
+0x80,0x93,0x90,0x97,0x37,0xe0,0xfe,0xb4,0x06,0x04,0x7f,0x01,0x21,0x70,0xee,0xb4,
+0x03,0x04,0x7f,0x01,0x21,0x67,0x90,0x97,0x37,0xe0,0x64,0x02,0x70,0x78,0x02,0x79,
+0x8b,0x90,0x97,0x37,0xe0,0x64,0x01,0x70,0x6d,0x02,0x79,0x71,0x90,0x97,0x37,0xe0,
+0xb4,0x04,0x04,0x7f,0x01,0x31,0x7f,0x90,0x97,0x37,0xe0,0x70,0x04,0x11,0x65,0x80,
+0x0b,0x90,0x97,0x37,0xe0,0xb4,0x06,0x04,0xe4,0xff,0x31,0x70,0xe1,0x97,0x90,0x97,
+0x37,0xe0,0xfe,0xb4,0x06,0x06,0xe4,0xff,0x31,0x70,0x80,0x08,0xee,0xb4,0x03,0x04,
+0x7f,0x01,0x31,0x67,0x90,0x97,0x37,0xe0,0xb4,0x01,0x02,0xb1,0x63,0xe1,0x8e,0x90,
+0x97,0x37,0xe0,0x70,0x21,0x02,0x79,0x64,0x90,0x97,0x37,0xe0,0xff,0x64,0x04,0x60,
+0x15,0xef,0x70,0x04,0x11,0x65,0x80,0x0b,0x90,0x97,0x37,0xe0,0xb4,0x03,0x04,0xe4,
+0xff,0x31,0x67,0x12,0x79,0x7e,0x22,0xf1,0xb6,0x90,0x97,0x37,0x74,0x01,0xf0,0x22,
+0xef,0x60,0x05,0x90,0x05,0x22,0xe4,0xf0,0x90,0x97,0x37,0x74,0x01,0xf0,0x22,0x90,
+0x97,0x6c,0xef,0xf0,0xd1,0x07,0x90,0x97,0x6c,0xe0,0x60,0x05,0x90,0x05,0x22,0xe4,
+0xf0,0xe4,0x90,0x97,0x37,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x96,
+0xfd,0x12,0x43,0x8b,0xe4,0x90,0x97,0x00,0xf0,0x12,0x29,0xd9,0xc3,0x13,0x20,0xe0,
+0x02,0x41,0xe0,0x90,0x96,0xfd,0x12,0x43,0x6b,0x12,0x29,0xd9,0xff,0x54,0x02,0xfe,
+0x90,0x97,0x3c,0xe0,0x54,0xfd,0x4e,0xfe,0xf0,0xef,0x54,0x01,0xff,0xee,0x54,0xfe,
+0x4f,0xff,0xf0,0x12,0x29,0xd9,0xfe,0x54,0x08,0xfd,0xef,0x54,0xf7,0x4d,0xff,0x90,
+0x97,0x3c,0xf0,0xee,0x54,0x10,0xfe,0xef,0x54,0xef,0x4e,0xff,0xf0,0x12,0x29,0xd9,
+0xfe,0x54,0x20,0xfd,0xef,0x54,0xdf,0x4d,0xff,0x90,0x97,0x3c,0xf0,0xee,0x54,0x40,
+0xfe,0xef,0x54,0xbf,0x4e,0xf0,0x20,0xe0,0x02,0x41,0xd0,0x90,0x97,0x00,0x74,0x21,
+0xf0,0x90,0x96,0xfd,0x12,0x43,0x6b,0x12,0x29,0xd9,0xff,0x13,0x13,0x54,0x01,0xfe,
+0x90,0x97,0x3c,0xe0,0xfd,0x13,0x13,0x54,0x01,0x6e,0x60,0x2a,0xef,0x54,0x04,0xff,
+0xed,0x54,0xfb,0x4f,0xf0,0xe0,0x13,0x13,0x54,0x3f,0x30,0xe0,0x0e,0x90,0x01,0x34,
+0x74,0x40,0xf0,0xfd,0xe4,0xff,0x12,0x36,0xe6,0x80,0x0b,0xe4,0x90,0x97,0x3e,0xf0,
+0x7d,0x40,0xff,0x12,0x36,0x75,0x90,0x97,0x3c,0xe0,0xfd,0x13,0x13,0x13,0x54,0x1f,
+0x30,0xe0,0x07,0x90,0x97,0x00,0xe0,0x44,0x12,0xf0,0xed,0xc4,0x54,0x0f,0x30,0xe0,
+0x07,0x90,0x97,0x00,0xe0,0x44,0x14,0xf0,0x90,0x97,0x3c,0xe0,0xc4,0x13,0x54,0x07,
+0x30,0xe0,0x07,0x90,0x97,0x00,0xe0,0x44,0x80,0xf0,0x90,0x97,0x3c,0xe0,0xc4,0x13,
+0x13,0x54,0x03,0x20,0xe0,0x07,0x90,0x97,0x00,0xe0,0x44,0x40,0xf0,0x90,0x97,0x00,
+0xe0,0x90,0x05,0x27,0xf0,0x90,0x97,0x3d,0xe0,0x70,0x04,0x7f,0x01,0x91,0x93,0x90,
+0x97,0x3c,0xe0,0xc4,0x13,0x13,0x54,0x03,0x30,0xe0,0x04,0x7f,0x03,0x80,0x0d,0x7f,
+0x01,0x91,0x1d,0xef,0x60,0x04,0x7f,0x01,0x80,0x02,0x7f,0x02,0x91,0x93,0x81,0x18,
+0x90,0x97,0x00,0x74,0x01,0xf0,0x90,0x05,0x27,0xf0,0xe4,0xff,0x91,0x93,0x81,0x15,
+0x90,0x96,0xfd,0x12,0x43,0x6b,0x12,0x29,0xd9,0xff,0x54,0x02,0xfe,0x90,0x97,0x36,
+0xe0,0x54,0xfd,0x4e,0xfe,0xf0,0xef,0x54,0x01,0xff,0xee,0x54,0xfe,0x4f,0xff,0xf0,
+0x12,0x29,0xd9,0xfe,0x54,0x08,0xfd,0xef,0x54,0xf7,0x4d,0xff,0x90,0x97,0x36,0xf0,
+0xee,0x54,0x10,0xfe,0xef,0x54,0xef,0x4e,0xff,0xf0,0x12,0x29,0xd9,0xfe,0x54,0x40,
+0xfd,0xef,0x54,0xbf,0x4d,0x90,0x97,0x36,0xf0,0x20,0xe0,0x02,0x61,0xe8,0x90,0x97,
+0x00,0x74,0x31,0xf0,0xee,0x13,0x13,0x54,0x01,0xff,0x90,0x97,0x36,0xe0,0xfe,0x13,
+0x13,0x54,0x01,0x6f,0x60,0x27,0x90,0x96,0xfd,0x12,0x43,0x6b,0x12,0x29,0xd9,0x54,
+0x04,0xff,0xee,0x54,0xfb,0x4f,0x90,0x97,0x36,0xf0,0xe0,0x13,0x13,0x54,0x3f,0x20,
+0xe0,0x0b,0xe4,0x90,0x97,0x38,0xf0,0x7d,0x40,0xff,0x12,0x36,0x75,0x90,0x97,0x36,
+0xe0,0xfd,0x13,0x13,0x13,0x54,0x1f,0x30,0xe0,0x07,0x90,0x97,0x00,0xe0,0x44,0x02,
+0xf0,0xed,0xc4,0x54,0x0f,0x30,0xe0,0x07,0x90,0x97,0x00,0xe0,0x44,0x04,0xf0,0x90,
+0x97,0x00,0xe0,0x54,0x06,0x60,0x0c,0x90,0x01,0x3e,0x74,0x03,0xf0,0xfd,0x7f,0x02,
+0x12,0x37,0x00,0x90,0x97,0x00,0xe0,0x90,0x05,0x27,0xf0,0x90,0x97,0x36,0xe0,0xff,
+0xc4,0x13,0x13,0x54,0x03,0x30,0xe0,0x0c,0xa3,0xe0,0x64,0x06,0x60,0x5a,0x7f,0x06,
+0x11,0x6e,0x80,0x54,0x90,0x97,0x37,0xe0,0x64,0x06,0x70,0x17,0x7f,0x01,0x11,0x6e,
+0xe4,0xff,0x91,0x1d,0xef,0x60,0x08,0x90,0x97,0x1e,0x12,0x47,0xa7,0x80,0x04,0xb1,
+0x6e,0x80,0x35,0x12,0x66,0xea,0x80,0x30,0x90,0x97,0x00,0x74,0x01,0xf0,0x90,0x05,
+0x27,0xf0,0x7d,0x03,0x7f,0x02,0x12,0x36,0x92,0x90,0x97,0x37,0xe0,0xb4,0x06,0x04,
+0x7f,0x01,0x80,0x09,0x90,0x97,0x37,0xe0,0xb4,0x04,0x04,0xe4,0xff,0x11,0x6e,0x12,
+0x57,0xdc,0x12,0x47,0x98,0x12,0x79,0x0b,0xd0,0xd0,0x92,0xaf,0x22,0xef,0x64,0x01,
+0x70,0x3d,0x90,0x97,0x3f,0xe0,0x60,0x03,0x7f,0x00,0x22,0x90,0x97,0x34,0xe0,0x60,
+0x03,0x7f,0x01,0x22,0x90,0x97,0x3e,0xe0,0x60,0x03,0x7f,0x01,0x22,0x90,0x97,0x3c,
+0xe0,0xff,0x13,0x13,0x54,0x3f,0x30,0xe0,0x0b,0xef,0xc4,0x13,0x54,0x07,0x30,0xe0,
+0x03,0x7f,0x00,0x22,0x90,0x97,0x40,0xe0,0x7f,0x01,0x60,0x36,0x7f,0x00,0x22,0x90,
+0x97,0x39,0xe0,0x60,0x03,0x7f,0x00,0x22,0x90,0x97,0x34,0xe0,0x60,0x03,0x7f,0x01,
+0x22,0x90,0x97,0x38,0xe0,0x60,0x03,0x7f,0x01,0x22,0x90,0x97,0x36,0xe0,0x13,0x13,
+0x54,0x3f,0x30,0xe0,0x03,0x7f,0x00,0x22,0x90,0x97,0x3a,0xe0,0x7f,0x01,0x60,0x02,
+0x7f,0x00,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x97,0x3d,0xe0,0x90,0x97,
+0x6b,0xf0,0x6f,0x70,0x02,0xa1,0x5e,0xef,0x14,0x60,0x3b,0x14,0x60,0x5f,0x14,0x70,
+0x02,0xa1,0x38,0x24,0x03,0x60,0x02,0xa1,0x5e,0x90,0x97,0x6b,0xe0,0xb4,0x03,0x04,
+0xb1,0xdf,0xa1,0x5e,0x90,0x97,0x6b,0xe0,0xb4,0x02,0x04,0xb1,0xf2,0xa1,0x5e,0x90,
+0x97,0x6b,0xe0,0xb4,0x04,0x04,0xb1,0xf6,0xa1,0x5e,0x90,0x97,0x6b,0xe0,0x64,0x01,
+0x70,0x7c,0xb1,0xe1,0x80,0x78,0x90,0x97,0x6b,0xe0,0xff,0xb4,0x03,0x04,0xf1,0xa0,
+0x80,0x6c,0xef,0xb4,0x02,0x04,0xb1,0xfa,0x80,0x64,0x90,0x97,0x6b,0xe0,0xff,0xb4,
+0x04,0x04,0xf1,0xab,0x80,0x58,0xef,0x70,0x55,0xb1,0xcc,0x80,0x51,0x90,0x97,0x6b,
+0xe0,0xb4,0x03,0x04,0xd1,0x7c,0x80,0x46,0x90,0x97,0x6b,0xe0,0xb4,0x01,0x04,0xb1,
+0xb7,0x80,0x3b,0x90,0x97,0x6b,0xe0,0xb4,0x04,0x04,0xd1,0x85,0x80,0x30,0x90,0x97,
+0x6b,0xe0,0x70,0x2a,0xb1,0xb5,0x80,0x26,0x90,0x97,0x6b,0xe0,0xff,0xb4,0x01,0x04,
+0xb1,0xa0,0x80,0x1a,0xef,0xb4,0x02,0x04,0xb1,0xb1,0x80,0x12,0x90,0x97,0x6b,0xe0,
+0xff,0xb4,0x04,0x05,0x12,0x44,0xfd,0x80,0x05,0xef,0x70,0x02,0xb1,0xad,0xd0,0xd0,
+0x92,0xaf,0x22,0x7f,0x01,0x12,0x68,0x2e,0xe4,0x90,0x97,0x37,0xf0,0x22,0x90,0x97,
+0x10,0xe0,0x60,0x16,0x90,0x97,0x37,0xe0,0x70,0x04,0x7f,0x05,0x80,0x1f,0x90,0x97,
+0x37,0xe0,0x64,0x01,0x70,0x19,0x7f,0x02,0x80,0x13,0x90,0x97,0x37,0xe0,0xb4,0x01,
+0x04,0x7f,0x03,0x80,0x08,0x90,0x97,0x37,0xe0,0x70,0x04,0x7f,0x04,0x11,0x6e,0x22,
+0x90,0x05,0x22,0x74,0x6f,0xf0,0x90,0x97,0x3d,0x74,0x03,0xf0,0x22,0xb1,0xcc,0x80,
+0xef,0xd1,0x07,0x80,0xeb,0xb1,0xcc,0x12,0x7a,0x0e,0xef,0x70,0x06,0x90,0x01,0xc8,
+0x74,0xfd,0xf0,0xd1,0x94,0x90,0x97,0x3d,0x74,0x02,0xf0,0x22,0x90,0x01,0x3e,0x74,
+0x03,0xf0,0xfd,0x7f,0x02,0x12,0x37,0x00,0x90,0x97,0x3d,0x74,0x01,0xf0,0x22,0xf1,
+0xa0,0x7d,0x03,0x7f,0x02,0x12,0x36,0x92,0x90,0x05,0x27,0xe4,0xf0,0x90,0x97,0x3d,
+0xf0,0x22,0xb1,0xfa,0x80,0xeb,0xf1,0xab,0x80,0xe7,0xd1,0x07,0x90,0x05,0x22,0xe4,
+0xf0,0x90,0x97,0x3d,0x04,0xf0,0x22,0x90,0x96,0xdd,0x12,0x43,0x53,0x90,0x80,0x85,
+0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x96,0xe1,0x12,0x43,0x53,
+0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x96,0xe5,
+0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,0x2f,0xd9,
+0x90,0x96,0xe9,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,
+0x12,0x2f,0xd9,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x03,0x2d,0x95,0xe4,0xfd,0xff,
+0x12,0x34,0x81,0x90,0x97,0x35,0xe0,0xb4,0x01,0x11,0x90,0x80,0x59,0x12,0x2a,0x8b,
+0x00,0x03,0x2d,0x95,0xe4,0xfd,0x7f,0x01,0x12,0x34,0x81,0x22,0xd1,0x8e,0x90,0x97,
+0x3d,0x74,0x02,0xf0,0x22,0xd1,0x94,0x90,0x97,0x3d,0x74,0x02,0xf0,0x22,0x90,0x05,
+0x22,0x74,0xff,0xf0,0x7f,0x78,0x7e,0x08,0x12,0x27,0xde,0x90,0x96,0xdd,0x12,0x2a,
+0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,0x96,0xe1,0x12,0x2a,0x7f,0x7f,0x00,
+0x7e,0x08,0x12,0x27,0xde,0x90,0x96,0xe5,0x12,0x2a,0x7f,0x90,0x97,0x35,0xe0,0x90,
+0x96,0xdd,0xb4,0x01,0x0d,0x12,0x43,0x53,0xef,0x54,0xc7,0xff,0xed,0x54,0xc7,0xfd,
+0x80,0x07,0x12,0x43,0x53,0xef,0x54,0xc7,0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,
+0x7f,0x78,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x96,0xe1,0x12,0x43,0x53,0xef,0x54,0x0f,
+0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,
+0x96,0xe5,0x12,0x43,0x53,0xef,0x44,0x02,0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,
+0x7f,0x00,0x7e,0x08,0x12,0x2f,0xd9,0x7f,0x70,0x7e,0x0e,0x12,0x27,0xde,0x90,0x96,
+0xe9,0x12,0x2a,0x7f,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa0,0x7f,0x70,
+0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe4,
+0xfd,0xff,0x12,0x34,0x81,0x90,0x97,0x35,0xe0,0xb4,0x01,0x11,0x90,0x80,0x59,0x12,
+0x2a,0x8b,0x00,0x00,0x00,0x00,0xe4,0xfd,0x7f,0x01,0x12,0x34,0x81,0x22,0x90,0x01,
+0x37,0x74,0x02,0xf0,0x12,0x7a,0x0e,0xef,0x70,0x06,0x90,0x01,0xc8,0x74,0xfd,0xf0,
+0x7d,0x02,0x7f,0x03,0x12,0x36,0xe6,0xe5,0x71,0x60,0x05,0x7f,0x01,0x12,0x50,0x97,
+0xd1,0x94,0x90,0x97,0x1c,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x02,0xf0,0x22,0xd1,0x8e,
+0x90,0x97,0x37,0x74,0x04,0xf0,0x22,0xf1,0x5e,0x90,0x97,0x37,0x74,0x03,0xf0,0x22,
+0x90,0x05,0x22,0xe4,0xf0,0x90,0x97,0x3d,0x04,0xf0,0x22,0x90,0x05,0x22,0xe4,0xf0,
+0x90,0x97,0x3d,0x04,0xf0,0x22,0x90,0x97,0x68,0xef,0xf0,0xd1,0x07,0x90,0x97,0x68,
+0xe0,0x60,0x05,0x90,0x05,0x22,0xe4,0xf0,0x90,0x97,0x1c,0xe0,0x54,0xf0,0xf0,0xe0,
+0x44,0x04,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x04,0x1d,0xe0,0x60,
+0x1a,0x90,0x05,0x22,0xe0,0x54,0x90,0x60,0x07,0x90,0x01,0xc6,0xe0,0x44,0x40,0xf0,
+0x90,0x01,0xc7,0xe0,0x30,0xe1,0xe4,0x7f,0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0,0x92,
+0xaf,0x22,0xe0,0xff,0x7d,0x01,0x90,0x97,0x55,0xef,0xf0,0xa3,0xed,0xf0,0xe4,0xa3,
+0xf0,0xa3,0xf0,0xe5,0x71,0x60,0x04,0xe4,0xff,0x11,0x97,0x90,0x97,0x55,0xe0,0x30,
+0xe0,0x09,0x90,0x97,0x57,0xe4,0xf0,0xa3,0x74,0x80,0xf0,0x90,0x97,0x55,0xe0,0xff,
+0xc3,0x13,0x90,0xfd,0x10,0xf0,0x90,0x04,0x25,0xef,0xf0,0x90,0x97,0x56,0xe0,0x60,
+0x1f,0xa3,0xa3,0xe0,0xff,0x24,0x0f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,
+0x80,0xf0,0x74,0x10,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,
+0x90,0x97,0x57,0xa3,0xe0,0xff,0xfd,0x24,0x08,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,
+0xe4,0xf0,0x74,0x09,0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf0,0xf0,
+0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf7,0xf0,0x90,0x97,
+0x57,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0xef,0x60,0x0b,0x90,0x97,0x35,0xe0,0xb4,0x01,
+0x10,0xe4,0xff,0x80,0x09,0x90,0x97,0x35,0xe0,0xb4,0x01,0x05,0x7f,0x01,0x12,0x7a,
+0x5e,0x22,0x7d,0x02,0x7f,0x03,0x12,0x36,0x75,0xe5,0x71,0x14,0x24,0xfd,0x50,0x02,
+0x80,0x22,0x90,0x97,0x1f,0xe0,0x60,0x06,0x7d,0x01,0x7f,0x0c,0x80,0x0f,0x90,0x97,
+0x1c,0xe0,0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0xab,
+0xe4,0xff,0x11,0x97,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,
+0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,
+0xc0,0x07,0x90,0x01,0xc4,0x74,0xe5,0xf0,0x74,0x50,0xa3,0xf0,0x90,0x01,0x34,0xe0,
+0x55,0x28,0xf5,0x2c,0x90,0x01,0x36,0xe0,0x55,0x2a,0xf5,0x2e,0xa3,0xe0,0x55,0x2b,
+0xf5,0x2f,0xe5,0x2c,0x20,0xe0,0x02,0x41,0x83,0x90,0x01,0x34,0x74,0x01,0xf0,0x85,
+0xd1,0x08,0x85,0xd2,0x09,0x85,0xd3,0x0a,0x85,0xd4,0x0b,0x85,0xd5,0x0c,0x85,0xd6,
+0x0d,0x85,0xd7,0x0e,0x85,0xd9,0x0f,0xe5,0x0f,0x54,0x40,0xc3,0x13,0xff,0xe5,0x0e,
+0x54,0x20,0x6f,0x70,0x02,0x41,0x35,0xe5,0x0f,0x30,0xe5,0x02,0x41,0x35,0xe5,0x0d,
+0x54,0x1f,0xf5,0x4d,0xe5,0x08,0x54,0x3f,0xf5,0x4e,0xe5,0x0c,0x54,0x1f,0xff,0xe5,
+0x4d,0x25,0xe0,0x24,0xe3,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0x8f,0xf0,0x12,
+0x42,0x81,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0xc0,0xf5,0x82,0xe4,
+0x34,0x91,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x4e,0xd3,0x94,0x04,0x40,
+0x03,0x75,0x4e,0x04,0x75,0xf0,0x0a,0xe5,0x4d,0x90,0x90,0x00,0x12,0x43,0x5f,0x75,
+0xf0,0x02,0xe5,0x4e,0x12,0x43,0x5f,0xe0,0xfe,0xa3,0xe0,0xff,0xe5,0x0e,0x54,0x1f,
+0x2f,0xff,0xe4,0x3e,0xfe,0x75,0xf0,0x0a,0xe5,0x4d,0x90,0x90,0x00,0x12,0x43,0x5f,
+0x75,0xf0,0x02,0xe5,0x4e,0x12,0x43,0x5f,0xee,0xf0,0xa3,0xef,0xf0,0xe5,0x0f,0x20,
+0xe6,0x24,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0x63,0xf5,0x82,0xe4,
+0x34,0x94,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0a,0x30,0xe7,0x36,0xaf,
+0x4d,0x12,0x60,0xaf,0x80,0x2f,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,
+0xa3,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0a,
+0x30,0xe7,0x12,0xe5,0x0a,0x54,0x7f,0xfd,0xe5,0x0e,0x54,0x1f,0xf5,0x53,0xab,0x4e,
+0xaf,0x4d,0x12,0x60,0x6b,0xe5,0x71,0x14,0x24,0xfd,0x50,0x02,0x80,0x45,0x90,0x97,
+0x1f,0xe0,0x60,0x37,0x90,0x01,0x5b,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x04,0xf0,0xb1,
+0x68,0xef,0x64,0x01,0x70,0x2d,0x90,0x97,0x13,0xe0,0xf5,0x44,0x75,0x45,0x00,0xe4,
+0xfb,0xfd,0x7f,0x58,0x7e,0x01,0x12,0x35,0xab,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,
+0x06,0x92,0x74,0x01,0xf0,0x90,0x97,0x1b,0xf0,0x80,0x08,0xb1,0x68,0xbf,0x01,0x03,
+0x12,0x47,0x98,0xe5,0x2c,0x30,0xe1,0x06,0x90,0x01,0x34,0x74,0x02,0xf0,0xe5,0x2c,
+0x30,0xe3,0x06,0x90,0x01,0x34,0x74,0x08,0xf0,0xe5,0x2c,0x30,0xe4,0x09,0x90,0x01,
+0x34,0x74,0x10,0xf0,0x43,0x12,0x10,0xe5,0x2c,0x30,0xe5,0x24,0x90,0x01,0xcf,0xe0,
+0x30,0xe5,0x1d,0xe0,0x54,0xdf,0xf0,0x90,0x01,0x34,0x74,0x20,0xf0,0x75,0xa8,0x00,
+0x75,0xe8,0x00,0xf1,0x59,0x90,0x00,0x03,0xe0,0x54,0xfb,0xf0,0xb1,0x7f,0x80,0xfe,
+0xe5,0x2c,0x30,0xe6,0x06,0x90,0x01,0x34,0x74,0x40,0xf0,0xe5,0x2e,0x30,0xe1,0x5f,
+0x90,0x01,0x36,0x74,0x02,0xf0,0x43,0x12,0x40,0x90,0x01,0x02,0xe0,0x54,0x03,0x64,
+0x01,0x70,0x28,0x90,0x01,0x37,0xe0,0x30,0xe0,0x0a,0x74,0x01,0xf0,0x90,0x97,0x24,
+0xe4,0xf0,0x80,0x17,0x90,0x97,0x24,0xe0,0x04,0xf0,0xe0,0xc3,0x94,0x0a,0x40,0x0b,
+0xe4,0xf0,0x90,0x04,0x19,0xe0,0x30,0xe0,0x02,0xf1,0xb0,0x90,0x97,0x41,0xe0,0xb4,
+0x01,0x09,0x90,0x05,0x22,0xe4,0xf0,0x90,0x97,0x41,0xf0,0x90,0x97,0x36,0xe0,0x30,
+0xe0,0x0d,0xe4,0xff,0x12,0x4c,0x1d,0xef,0x60,0x05,0x90,0x05,0x22,0xe4,0xf0,0xe5,
+0x2e,0x20,0xe0,0x02,0x61,0xe4,0x90,0x97,0x34,0x74,0x01,0xf0,0x90,0x01,0x36,0xf0,
+0x90,0x97,0x3c,0xe0,0x30,0xe0,0x30,0x90,0x97,0x41,0x74,0x01,0xf0,0x90,0x97,0x3c,
+0xe0,0xff,0x13,0x13,0x54,0x3f,0x30,0xe0,0x1e,0x90,0x97,0x3e,0x74,0x01,0xf0,0x12,
+0x44,0x80,0x90,0x97,0x3d,0xe0,0x64,0x03,0x60,0x0d,0x7f,0x01,0x12,0x4c,0x1d,0xef,
+0x60,0x05,0x7f,0x04,0x12,0x4c,0x93,0x90,0x97,0x36,0xe0,0xff,0x30,0xe0,0x4d,0x13,
+0x13,0x54,0x3f,0x30,0xe0,0x46,0x90,0x97,0x38,0x74,0x01,0xf0,0x12,0x44,0x80,0xe4,
+0xff,0x12,0x4c,0x1d,0xef,0x60,0x35,0x12,0x79,0xa0,0x90,0x97,0x37,0xe0,0xff,0x64,
+0x06,0x60,0x29,0xef,0xb4,0x04,0x07,0xe4,0xff,0x12,0x48,0x6e,0x80,0x11,0x90,0x97,
+0x37,0xe0,0xb4,0x03,0x17,0xf1,0xeb,0xef,0x70,0x05,0x7f,0x01,0x12,0x48,0x6e,0x90,
+0x97,0x1e,0xe0,0xff,0x7d,0x01,0x12,0x47,0xab,0x12,0x66,0xea,0x12,0x69,0xa9,0x90,
+0x97,0x34,0xe4,0xf0,0xe5,0x2e,0x20,0xe2,0x02,0x81,0x70,0x90,0x01,0x36,0x74,0x04,
+0xf0,0x90,0x01,0xbd,0xe0,0x04,0xf0,0x90,0x97,0x36,0xe0,0x30,0xe0,0x06,0xa3,0xe0,
+0x64,0x06,0x60,0x6c,0xe5,0x70,0x64,0x01,0x70,0x66,0xe5,0x71,0x60,0x62,0xe5,0x71,
+0x64,0x02,0x60,0x06,0xe5,0x71,0x64,0x05,0x70,0x27,0x90,0x06,0xab,0xe0,0x90,0x97,
+0x0e,0xf0,0x90,0x06,0xaa,0xe0,0x90,0x97,0x1d,0xf0,0x90,0x97,0x0e,0xe0,0x70,0x07,
+0x90,0x97,0x1d,0xe0,0xff,0x80,0x05,0x90,0x97,0x0e,0xe0,0xff,0x90,0x97,0x0e,0xef,
+0xf0,0x90,0x97,0x10,0xe0,0x60,0x03,0xe0,0x14,0xf0,0x90,0x97,0x0f,0xe4,0xf0,0x90,
+0x01,0x57,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x97,0x21,0xe0,0x54,0xfd,0xf0,
+0xe0,0x54,0xef,0xf0,0xe5,0x71,0x14,0x24,0xfd,0x50,0x02,0x80,0x03,0x12,0x69,0x47,
+0xe5,0x2e,0x30,0xe3,0x28,0x90,0x01,0x36,0x74,0x08,0xf0,0xe5,0x70,0x64,0x01,0x70,
+0x1c,0xe5,0x71,0x60,0x18,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,
+0x90,0x97,0x47,0xe4,0x12,0x44,0x52,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x2e,0x30,
+0xe4,0x2f,0x90,0x01,0x36,0x74,0x10,0xf0,0xe5,0x70,0x64,0x01,0x70,0x23,0xe5,0x71,
+0x60,0x1f,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x97,0x20,
+0xe4,0xf0,0x90,0x97,0x21,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0x07,0x70,0x03,0x12,0x47,
+0x98,0xe5,0x2e,0x30,0xe5,0x1e,0x90,0x01,0x36,0x74,0x20,0xf0,0xe5,0x70,0xb4,0x01,
+0x13,0xe5,0x71,0x60,0x0f,0x90,0x97,0x1f,0xe0,0x64,0x02,0x60,0x04,0xf1,0xc6,0x80,
+0x03,0x12,0x44,0xa5,0xe5,0x2e,0x30,0xe6,0x1e,0x90,0x01,0x36,0x74,0x40,0xf0,0xe5,
+0x70,0xb4,0x01,0x13,0xe5,0x71,0x60,0x0f,0x90,0x97,0x21,0xe0,0x54,0xfe,0xf0,0xe0,
+0x54,0x07,0x70,0x03,0x12,0x47,0x98,0xe5,0x2f,0x30,0xe1,0x26,0x90,0x01,0x37,0x74,
+0x02,0xf0,0x90,0x97,0x36,0xe0,0x30,0xe0,0x17,0xe4,0xff,0x12,0x4c,0x1d,0xef,0x60,
+0x07,0x11,0xb2,0x12,0x66,0xea,0x80,0x0a,0x90,0x97,0x3b,0x74,0x01,0xf0,0x80,0x02,
+0x11,0xb2,0x74,0xe5,0x04,0x90,0x01,0xc4,0xf0,0x74,0x50,0xa3,0xf0,0xd0,0x07,0xd0,
+0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,
+0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x90,0x04,0x1b,0xe0,0x54,0x7f,0x64,0x7f,
+0x7f,0x01,0x60,0x02,0x7f,0x00,0x22,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0xd3,
+0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x7f,0x10,0xdf,0xfe,0xd0,0xd0,0x92,0xaf,0x22,0xd3,
+0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x97,0x66,0xed,0xf0,0x90,0x97,0x65,0xef,0xf0,
+0xd3,0x94,0x07,0x50,0x63,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,
+0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0,0x5f,0xf0,0xb1,0x7f,0x90,0x97,0x65,0xe0,
+0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x46,
+0xe0,0x4f,0xf0,0xb1,0x7f,0x90,0x97,0x66,0xe0,0x60,0x16,0x90,0x97,0x65,0xe0,0xff,
+0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x45,0x80,
+0x66,0x90,0x97,0x65,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,
+0xfc,0xf4,0xff,0x90,0x00,0x45,0x80,0x6b,0x90,0x97,0x65,0xe0,0x24,0xf8,0xf0,0xe0,
+0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xb1,
+0x77,0x90,0x97,0x65,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,
+0xfc,0xff,0x90,0x00,0x43,0xe0,0x4f,0xf0,0xb1,0x7f,0x90,0x97,0x66,0xe0,0x60,0x1b,
+0x90,0x97,0x65,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,
+0xc4,0x54,0xf0,0xff,0x90,0x00,0x42,0xe0,0x4f,0x80,0x1a,0x90,0x97,0x65,0xe0,0xff,
+0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,
+0x90,0x00,0x42,0xe0,0x5f,0xf0,0xb1,0x7f,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,
+0x01,0xc3,0xc0,0xd0,0x90,0x97,0x03,0xed,0xf0,0x90,0x97,0x02,0xef,0xf0,0xd3,0x94,
+0x07,0x50,0x4e,0xa3,0xe0,0x70,0x1a,0x90,0x97,0x02,0xe0,0xff,0x74,0x01,0xa8,0x07,
+0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0,0x5f,0xf0,0x80,
+0x17,0x90,0x97,0x02,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,
+0xfc,0xff,0x90,0x00,0x47,0xe0,0x4f,0xf0,0xb1,0x7f,0x90,0x97,0x02,0xe0,0xff,0x74,
+0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0x80,
+0x59,0x90,0x97,0x02,0xe0,0x24,0xf8,0xf0,0xa3,0xe0,0x70,0x1d,0x90,0x97,0x02,0xe0,
+0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,
+0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x80,0x1a,0x90,0x97,0x02,0xe0,0xff,0x74,0x01,
+0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,0x43,
+0xe0,0x4f,0xf0,0xb1,0x7f,0x90,0x97,0x02,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,
+0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0xb1,0x7f,0xd0,
+0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x8f,0x82,0x75,0x83,0x00,
+0xed,0xf0,0xb1,0x7f,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x01,0x30,0xe4,0xf0,0xa3,0xf0,
+0xa3,0xf0,0xa3,0xf0,0x90,0x01,0x38,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,
+0x50,0xf1,0x44,0xe4,0xfd,0x7f,0x51,0xf1,0x44,0xe4,0xfd,0x7f,0x52,0xf1,0x44,0xe4,
+0xfd,0x7f,0x53,0x80,0xbf,0x90,0x01,0x3c,0x74,0xff,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,
+0x01,0x34,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,0x54,0xf1,0x44,0x7d,0xff,
+0x7f,0x55,0xf1,0x44,0x7d,0xff,0x7f,0x56,0xf1,0x44,0x7d,0xff,0x7f,0x57,0x80,0x94,
+0x12,0x4f,0xd4,0xbf,0x01,0x0f,0x90,0x02,0x09,0xe0,0xff,0x7d,0x01,0x11,0x06,0x90,
+0x04,0x1f,0x74,0x20,0xf0,0x22,0x12,0x4f,0xd4,0xbf,0x01,0x0f,0x90,0x97,0x26,0xe0,
+0xff,0xe4,0xfd,0x11,0x06,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x90,0x97,0x3b,0xe0,
+0xb4,0x01,0x07,0xe4,0xf0,0x11,0xb2,0x12,0x66,0xea,0x22,0xb1,0x68,0xef,0x64,0x01,
+0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x52,0x90,0x97,0x21,0xe0,0x54,0x03,
+0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x42,0x90,0x97,0x1e,0xe0,0x54,0x0f,
+0xd3,0x94,0x02,0x40,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x2f,0x90,0x97,0x21,
+0xe0,0x30,0xe2,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x20,0x90,0x97,0x21,0xe0,
+0x30,0xe4,0x08,0x90,0x01,0xb9,0x74,0x10,0xf0,0x80,0x11,0x90,0x97,0x10,0xe0,0x60,
+0x08,0x90,0x01,0xb9,0x74,0x20,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74,
+0x04,0xf0,0x7f,0x00,0x22,0x75,0x28,0x33,0xe4,0xf5,0x29,0x75,0x2a,0x03,0xf5,0x2b,
+0x90,0x01,0x30,0xe5,0x28,0xf0,0xa3,0xe5,0x29,0xf0,0xa3,0xe5,0x2a,0xf0,0xa3,0xe5,
+0x2b,0xf0,0x22,0xe4,0x90,0x96,0xef,0xf0,0xa3,0xf0,0x75,0x8e,0x02,0x12,0x78,0xf6,
+0x12,0x64,0x9d,0x12,0x64,0xb0,0xe4,0xf5,0x12,0x12,0x70,0xae,0x12,0x7a,0x55,0x12,
+0x65,0x48,0x12,0x32,0x3d,0x12,0x79,0x0b,0x12,0x79,0x07,0x11,0x55,0x90,0x00,0xf3,
+0xe0,0x30,0xe2,0x0d,0x90,0x05,0x41,0x74,0x10,0xf0,0x90,0x05,0x5a,0xf0,0xa3,0xe4,
+0xf0,0x12,0x64,0xe8,0x12,0x64,0x85,0x12,0x45,0x01,0x90,0x96,0xf1,0xe5,0xd9,0xf0,
+0x12,0x57,0x85,0xc2,0xaf,0x90,0x00,0x80,0xe0,0x44,0x40,0xf0,0x12,0x55,0x7f,0x75,
+0xe8,0x03,0x43,0xa8,0x85,0xd2,0xaf,0x90,0x01,0xbe,0xe0,0x04,0xf0,0x90,0x01,0xc0,
+0xe0,0x04,0xf0,0x90,0x96,0xef,0xe0,0x64,0x01,0xf0,0x24,0x73,0x90,0x01,0xc4,0xf0,
+0x74,0x58,0xa3,0xf0,0xe5,0x12,0x30,0xe4,0x09,0xc2,0xaf,0x53,0x12,0xef,0xd2,0xaf,
+0x31,0x13,0xe5,0x12,0x30,0xe6,0xdc,0xc2,0xaf,0x53,0x12,0xbf,0xd2,0xaf,0x12,0x6a,
+0xcd,0x80,0xd0,0x90,0x01,0xcc,0xe0,0x54,0x0f,0x90,0x96,0xf2,0xf0,0x90,0x96,0xf2,
+0xe0,0xfd,0x70,0x02,0x41,0x54,0x90,0x97,0x67,0xe0,0xff,0x74,0x01,0x7e,0x00,0xa8,
+0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xef,0x5d,0x70,0x02,
+0x41,0x4d,0x90,0x97,0x67,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd0,0x12,0x43,0x5f,0xe0,
+0x90,0x96,0xf3,0xf0,0x75,0x1e,0x01,0x75,0x1f,0x96,0x75,0x20,0xf3,0x75,0x21,0x01,
+0x7b,0x01,0x7a,0x96,0x79,0xf4,0x12,0x45,0x09,0x90,0x96,0xf4,0xe0,0xff,0xc4,0x13,
+0x13,0x13,0x54,0x01,0x90,0x97,0x67,0x30,0xe0,0x59,0xe0,0x75,0xf0,0x02,0x90,0x00,
+0x88,0x12,0x43,0x5f,0xe0,0x90,0x96,0xf5,0xf0,0x90,0x97,0x67,0xe0,0x75,0xf0,0x02,
+0x90,0x00,0x89,0x12,0x43,0x5f,0xe0,0x90,0x96,0xf6,0xf0,0x90,0x97,0x67,0xe0,0x75,
+0xf0,0x04,0x90,0x01,0xd1,0x12,0x43,0x5f,0xe0,0x90,0x96,0xf7,0xf0,0x90,0x97,0x67,
+0xe0,0x75,0xf0,0x04,0x90,0x01,0xd2,0x12,0x43,0x5f,0xe0,0x90,0x96,0xf8,0xf0,0x90,
+0x97,0x67,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x5f,0xe0,0x90,0x96,0xf9,
+0xf0,0x80,0x33,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd1,0x12,0x43,0x5f,0xe0,0x90,0x96,
+0xf5,0xf0,0x90,0x97,0x67,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd2,0x12,0x43,0x5f,0xe0,
+0x90,0x96,0xf6,0xf0,0x90,0x97,0x67,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,
+0x5f,0xe0,0x90,0x96,0xf7,0xf0,0xef,0x54,0x7f,0xff,0x7b,0x01,0x7a,0x96,0x79,0xf5,
+0x51,0x55,0x90,0x96,0xf2,0xe0,0xff,0x90,0x97,0x67,0xe0,0xfe,0x74,0x01,0xa8,0x06,
+0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0x5f,0x90,0x96,0xf2,0xf0,0x90,0x97,0x67,
+0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0x90,0x01,0xcc,
+0xf0,0x90,0x97,0x67,0xe0,0x04,0xf0,0xe0,0x54,0x03,0xf0,0x21,0x1d,0x90,0x01,0xc6,
+0xe0,0x44,0x02,0xf0,0x22,0x90,0x96,0xfa,0x12,0x43,0x8b,0xef,0x12,0x43,0x94,0x5a,
+0x87,0x01,0x5a,0x90,0x02,0x5a,0xab,0x03,0x5a,0xb4,0x05,0x5a,0xbd,0x06,0x5a,0xf0,
+0x07,0x5a,0xc5,0x08,0x5a,0xce,0x09,0x5a,0xd7,0x20,0x5a,0xe0,0x2c,0x5a,0x99,0x2d,
+0x5a,0xa2,0x2e,0x00,0x00,0x5a,0xe9,0x90,0x96,0xfa,0x12,0x43,0x6b,0x02,0x67,0x47,
+0x90,0x96,0xfa,0x12,0x43,0x6b,0x02,0x73,0x39,0x90,0x96,0xfa,0x12,0x43,0x6b,0x02,
+0x73,0x3f,0x90,0x96,0xfa,0x12,0x43,0x6b,0x02,0x73,0x87,0x90,0x96,0xfa,0x12,0x43,
+0x6b,0x02,0x73,0xb5,0x90,0x96,0xfa,0x12,0x43,0x6b,0x02,0x72,0x2c,0x90,0x96,0xfa,
+0x12,0x43,0x6b,0x80,0x2c,0x90,0x96,0xfa,0x12,0x43,0x6b,0x02,0x49,0x97,0x90,0x96,
+0xfa,0x12,0x43,0x6b,0x02,0x74,0x05,0x90,0x96,0xfa,0x12,0x43,0x6b,0x02,0x73,0xfd,
+0x90,0x96,0xfa,0x12,0x43,0x6b,0x02,0x77,0xd4,0x90,0x01,0xc6,0xe0,0x44,0x01,0xf0,
+0x22,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x1f,0xfe,0xef,0x54,0x20,0xc4,0x13,
+0x54,0x07,0xfd,0xaf,0x06,0x90,0x96,0xfd,0xef,0xf0,0xa3,0xed,0xf0,0xa3,0x12,0x43,
+0x8b,0x90,0x96,0xff,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54,0xf0,0xc4,
+0x54,0x0f,0x90,0x97,0x02,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0x54,0x40,0xc4,0x13,
+0x13,0x54,0x03,0x90,0x97,0x03,0xf0,0x90,0x96,0xfd,0xe0,0xff,0x75,0xf0,0x09,0x90,
+0x93,0x25,0x12,0x43,0x5f,0xad,0x82,0xac,0x83,0x90,0x97,0x04,0xec,0xf0,0xa3,0xed,
+0xf0,0xef,0x75,0xf0,0x09,0xa4,0x24,0x23,0xf9,0x74,0x93,0x35,0xf0,0xfa,0x7b,0x01,
+0xa3,0x12,0x43,0x8b,0x90,0x96,0xff,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,
+0x54,0x0f,0xff,0x90,0x97,0x06,0x12,0x43,0x6b,0xef,0x12,0x42,0x4d,0x90,0x96,0xff,
+0x12,0x43,0x6b,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x90,0x97,0x06,0x12,0x43,0x6b,
+0x90,0x00,0x01,0xef,0x12,0x42,0x5f,0x90,0x96,0xff,0x12,0x43,0x6b,0x90,0x00,0x01,
+0x12,0x42,0x20,0xff,0x90,0x97,0x04,0xe0,0xfc,0xa3,0xe0,0xfd,0xf5,0x82,0x8c,0x83,
+0xef,0xf0,0x12,0x29,0xd9,0x8d,0x82,0x8c,0x83,0xa3,0xf0,0x90,0x97,0x02,0xe0,0xfe,
+0x90,0x96,0xfd,0xe0,0xff,0x24,0xc1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xee,0xf0,
+0x90,0x96,0xfe,0xe0,0xfe,0x75,0xf0,0x09,0xef,0x90,0x93,0x29,0x12,0x43,0x5f,0xee,
+0xf0,0x75,0xf0,0x09,0xef,0x90,0x93,0x2a,0x12,0x43,0x5f,0x74,0x01,0xf0,0x90,0x97,
+0x03,0xe0,0xfe,0x75,0xf0,0x09,0xef,0x90,0x93,0x2b,0x12,0x43,0x5f,0xee,0xf0,0x8f,
+0x56,0xef,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xaf,0x82,0xf5,0x58,0x8f,
+0x59,0xe5,0x56,0x75,0xf0,0x02,0xa4,0x24,0x81,0xf9,0x74,0x92,0x35,0xf0,0x75,0x5a,
+0x01,0xf5,0x5b,0x89,0x5c,0x75,0xf0,0x09,0xe5,0x56,0x90,0x93,0x25,0x12,0x43,0x5f,
+0xaf,0x82,0x85,0x83,0x5d,0x8f,0x5e,0xe5,0x56,0x75,0xf0,0x09,0xa4,0x24,0x23,0xf9,
+0x74,0x93,0x35,0xf0,0x75,0x5f,0x01,0xf5,0x60,0x89,0x61,0x74,0xc1,0x25,0x56,0xf5,
+0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0x12,0x43,0x94,0x5c,0x7f,0x00,0x5c,0x94,0x01,
+0x5c,0xa9,0x02,0x5c,0xbe,0x03,0x5c,0xe7,0x04,0x5c,0xfc,0x05,0x5d,0x11,0x06,0x5d,
+0x37,0x0c,0x5d,0x64,0x0d,0x5d,0x91,0x0e,0x5d,0xbe,0x0f,0x00,0x00,0x5d,0xf2,0xe5,
+0x56,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0xf0,0xf0,0xa3,
+0x74,0x15,0x80,0x3c,0xe5,0x56,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,
+0x83,0x74,0xf0,0xf0,0xa3,0x74,0x10,0x80,0x27,0xe5,0x56,0x25,0xe0,0x24,0xe4,0xf5,
+0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74,0x05,0x80,0x12,0xe5,0x56,
+0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0xe4,
+0xf0,0xe5,0x56,0x25,0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0x74,0x0f,
+0xf0,0xa3,0x74,0x8f,0xf0,0xa1,0xf2,0xe5,0x56,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,
+0x34,0x95,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf5,0x80,0x27,0xe5,0x56,0x25,0xe0,
+0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf0,0x80,
+0x12,0xe5,0x56,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe4,0xf0,
+0xa3,0x74,0x0d,0xf0,0xe5,0x56,0x25,0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,
+0x83,0xe4,0xf0,0xa3,0xf0,0xa1,0xf2,0x90,0x04,0x47,0xe0,0xab,0x5a,0xaa,0x5b,0xa9,
+0x5c,0x12,0x42,0x4d,0x90,0x04,0x46,0xe0,0xab,0x5a,0xaa,0x5b,0xa9,0x5c,0x90,0x00,
+0x01,0x12,0x42,0x5f,0x90,0x04,0x45,0xe0,0x85,0x59,0x82,0x85,0x58,0x83,0xf0,0x90,
+0x04,0x44,0xa1,0xe9,0x90,0x04,0x4b,0xe0,0xab,0x5a,0xaa,0x5b,0xa9,0x5c,0x12,0x42,
+0x4d,0x90,0x04,0x4a,0xe0,0xab,0x5a,0xaa,0x5b,0xa9,0x5c,0x90,0x00,0x01,0x12,0x42,
+0x5f,0x90,0x04,0x49,0xe0,0x85,0x59,0x82,0x85,0x58,0x83,0xf0,0x90,0x04,0x48,0x80,
+0x58,0x90,0x04,0x4f,0xe0,0xab,0x5a,0xaa,0x5b,0xa9,0x5c,0x12,0x42,0x4d,0x90,0x04,
+0x4e,0xe0,0xab,0x5a,0xaa,0x5b,0xa9,0x5c,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,
+0x4d,0xe0,0x85,0x59,0x82,0x85,0x58,0x83,0xf0,0x90,0x04,0x4c,0x80,0x2b,0x90,0x04,
+0x53,0xe0,0xab,0x5a,0xaa,0x5b,0xa9,0x5c,0x12,0x42,0x4d,0x90,0x04,0x52,0xe0,0xab,
+0x5a,0xaa,0x5b,0xa9,0x5c,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x51,0xe0,0x85,
+0x59,0x82,0x85,0x58,0x83,0xf0,0x90,0x04,0x50,0xe0,0x85,0x59,0x82,0x85,0x58,0x83,
+0xa3,0xf0,0xab,0x5a,0xaa,0x5b,0xa9,0x5c,0xc0,0x03,0xc0,0x02,0xc0,0x01,0x12,0x29,
+0xd9,0xff,0xab,0x5f,0xaa,0x60,0xa9,0x61,0x12,0x29,0xd9,0x5f,0xd0,0x01,0xd0,0x02,
+0xd0,0x03,0x12,0x42,0x4d,0xab,0x5a,0xe5,0x5c,0x24,0x01,0xf9,0xe4,0x35,0x5b,0xfa,
+0xc0,0x03,0xc0,0x02,0xc0,0x01,0x12,0x29,0xd9,0xff,0xab,0x5f,0xaa,0x60,0xa9,0x61,
+0x90,0x00,0x01,0x12,0x42,0x20,0x5f,0xd0,0x01,0xd0,0x02,0xd0,0x03,0x12,0x42,0x4d,
+0x85,0x59,0x82,0x85,0x58,0x83,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x5e,0x82,0x85,
+0x5d,0x83,0xe0,0xfe,0xef,0x5e,0xd0,0x82,0xd0,0x83,0xf0,0x85,0x59,0x82,0x85,0x58,
+0x83,0xa3,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x5e,0x82,0x85,0x5d,0x83,0xa3,0xe0,
+0xfe,0xef,0x5e,0xd0,0x82,0xd0,0x83,0xf0,0xe5,0x56,0x25,0xe0,0x24,0x81,0xf5,0x82,
+0xe4,0x34,0x92,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b,0x75,0x57,0x0b,0x74,
+0x01,0x7e,0x00,0xa8,0x57,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,
+0xe5,0x56,0x25,0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0x5e,0xfe,
+0xa3,0xe0,0x5f,0x4e,0x60,0x06,0xe5,0x57,0x24,0x10,0x80,0x5d,0x15,0x57,0xe5,0x57,
+0xc3,0x94,0x00,0x50,0xca,0x80,0x56,0xe5,0x56,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,
+0x34,0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3d,0x75,0x57,0x0f,0x74,0x01,
+0x7e,0x00,0xa8,0x57,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,
+0x56,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,
+0xe0,0x5f,0x4e,0x60,0x08,0x90,0x97,0x09,0xe5,0x57,0xf0,0x80,0x10,0x15,0x57,0xe5,
+0x57,0xc3,0x94,0x00,0x50,0xc8,0x80,0x05,0xe4,0x90,0x97,0x09,0xf0,0xe5,0x56,0x25,
+0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,
+0x3b,0xe4,0xf5,0x57,0x74,0x01,0x7e,0x00,0xa8,0x57,0x08,0x80,0x05,0xc3,0x33,0xce,
+0x33,0xce,0xd8,0xf9,0xff,0xe5,0x56,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,
+0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x08,0x90,0x97,0x0a,0xe5,0x57,
+0xf0,0x80,0x5b,0x05,0x57,0xe5,0x57,0xb4,0x10,0xca,0x80,0x52,0xe5,0x56,0x25,0xe0,
+0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x39,
+0xe4,0xf5,0x57,0x74,0x01,0x7e,0x00,0xa8,0x57,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,
+0xce,0xd8,0xf9,0xff,0xe5,0x56,0x25,0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,
+0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x06,0xe5,0x57,0x24,0x10,0x80,0x0a,
+0x05,0x57,0xe5,0x57,0xb4,0x0c,0xcc,0x80,0x05,0xe4,0x90,0x97,0x0a,0xf0,0x90,0x97,
+0x09,0xe0,0xff,0x75,0xf0,0x09,0xe5,0x56,0x90,0x93,0x27,0x12,0x43,0x5f,0xef,0xf0,
+0x90,0x97,0x0a,0xe0,0xfe,0x75,0xf0,0x09,0xe5,0x56,0x90,0x93,0x28,0x12,0x43,0x5f,
+0xee,0xf0,0x74,0x84,0x25,0x56,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0xd3,0x9f,
+0x40,0x06,0x90,0x97,0x09,0x12,0x60,0x42,0x74,0x84,0x25,0x56,0xf5,0x82,0xe4,0x34,
+0x04,0xf5,0x83,0xe0,0xff,0x90,0x97,0x0a,0xe0,0xfe,0xef,0xc3,0x9e,0x50,0x02,0x11,
+0x42,0x90,0x97,0x09,0xe0,0xff,0xd3,0x94,0x13,0x40,0x07,0x90,0x93,0x22,0x74,0x03,
+0xf0,0x22,0xef,0xd3,0x94,0x0b,0x40,0x07,0x90,0x93,0x22,0x74,0x02,0xf0,0x22,0xef,
+0xd3,0x94,0x03,0x40,0x07,0x90,0x93,0x22,0x74,0x01,0xf0,0x22,0xe4,0x90,0x93,0x22,
+0xf0,0x22,0xe0,0xfd,0x74,0x44,0x25,0x56,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xed,
+0xf0,0xaf,0x56,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x74,0x84,0x2f,0xf5,0x82,0xe4,
+0x34,0x04,0xf5,0x83,0xed,0xf0,0xd0,0xd0,0x92,0xaf,0x22,0xed,0x54,0x1f,0xf5,0x55,
+0x74,0x01,0x2f,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0xf5,0x54,0xeb,0xc3,0x94,
+0x01,0x40,0x02,0x80,0x2a,0xe5,0x54,0x25,0x53,0xfe,0xe5,0x55,0x90,0x41,0x9e,0x93,
+0xfc,0xee,0xd3,0x9c,0x74,0x01,0x40,0x0c,0x2f,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,
+0xe4,0xf0,0x80,0xaf,0x2f,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xee,0xf0,0x22,0xac,
+0x07,0x75,0xf0,0x09,0xec,0x90,0x93,0x27,0x12,0x43,0x5f,0xe0,0xff,0x74,0x65,0x2c,
+0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe0,0x54,0x1f,0xfb,0xd3,0x9f,0x40,0x02,0xab,
+0x07,0xeb,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,
+0x74,0x01,0x93,0xff,0xeb,0x25,0xe0,0x24,0x2e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,
+0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xec,0x25,
+0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xaf,
+0x04,0xad,0x03,0x11,0x53,0xaf,0x03,0x22,0xaa,0x07,0xaf,0x05,0x74,0x84,0x2a,0xf5,
+0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,0x7f,0xfb,0x54,0x1f,0xf9,0x90,0x96,0xfe,
+0xf0,0x75,0xf0,0x09,0xea,0x90,0x93,0x28,0x12,0x43,0x5f,0xe0,0x90,0x97,0x00,0xf0,
+0x75,0xf0,0x09,0xea,0x90,0x93,0x27,0x12,0x43,0x5f,0xe0,0xfe,0x90,0x97,0x01,0xf0,
+0xea,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfd,0xa3,0xe0,
+0x90,0x97,0x02,0xcd,0xf0,0xa3,0xed,0xf0,0xea,0x25,0xe0,0x24,0x81,0xf5,0x82,0xe4,
+0x34,0x92,0xf5,0x83,0xe0,0xfd,0xa3,0xe0,0x90,0x97,0x04,0xcd,0xf0,0xa3,0xed,0xf0,
+0xe9,0xd3,0x9e,0x40,0x09,0x90,0x97,0x01,0xe0,0x90,0x96,0xfe,0xf0,0xfb,0xef,0x70,
+0x02,0x41,0x55,0x90,0x96,0xff,0xef,0xf0,0xeb,0x30,0xe6,0x09,0x90,0x96,0xfe,0xe0,
+0xfb,0xa3,0xe0,0x14,0xf0,0x90,0x96,0xff,0xe0,0x70,0x02,0x41,0x55,0x90,0x96,0xfe,
+0xe0,0xff,0xd3,0x94,0x00,0x50,0x02,0x41,0x55,0xe4,0x90,0x96,0xfd,0xf0,0xef,0x14,
+0x90,0x96,0xfc,0xf0,0x90,0x97,0x00,0xe0,0xf9,0x90,0x96,0xfc,0xe0,0xff,0xd3,0x99,
+0x40,0x6a,0xef,0x94,0x10,0x40,0x21,0xef,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8,
+0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x97,0x04,0xe0,
+0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x70,0x27,0x90,0x96,0xfc,0xe0,0xff,0xc3,0x94,0x10,
+0x50,0x32,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,
+0xd8,0xf9,0xff,0x90,0x97,0x02,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x15,0x90,
+0x96,0xfc,0xe0,0xfb,0xa3,0xe0,0x04,0xf0,0x90,0x96,0xff,0xe0,0xff,0x90,0x96,0xfd,
+0xe0,0x6f,0x60,0x08,0x90,0x96,0xfc,0xe0,0x14,0xf0,0x80,0x88,0x90,0x96,0xff,0xe0,
+0xff,0x90,0x96,0xfd,0xe0,0xc3,0x9f,0x50,0x0c,0x90,0x96,0xfc,0xe0,0xb5,0x01,0x05,
+0x90,0x97,0x00,0xe0,0xfb,0xeb,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,
+0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xeb,0x25,0xe0,0x24,0x2e,0xf5,0x82,0xe4,
+0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,
+0x13,0xff,0xea,0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xee,0xf0,
+0xa3,0xef,0xf0,0xaf,0x02,0xad,0x03,0x11,0x53,0xaf,0x03,0x22,0xad,0x07,0x74,0x84,
+0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,0x7f,0xf5,0x61,0x54,0x1f,0xfc,
+0x75,0xf0,0x09,0xed,0x90,0x93,0x27,0x12,0x43,0x5f,0xe0,0xff,0x90,0x96,0xfc,0xf0,
+0xed,0x25,0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,
+0x90,0x96,0xfd,0xcb,0xf0,0xa3,0xeb,0xf0,0xed,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,
+0x34,0x95,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x96,0xff,0xcb,0xf0,0xa3,0xeb,0xf0,
+0xec,0x25,0xe0,0x24,0x2e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfa,0x74,
+0x01,0x93,0xfb,0xed,0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xea,
+0xf0,0xa3,0xeb,0xf0,0xec,0xc3,0x9f,0x40,0x02,0x61,0x9e,0x74,0x65,0x2d,0xf5,0x82,
+0xe4,0x34,0x96,0xf5,0x83,0xec,0xf0,0x04,0xfb,0x90,0x96,0xfc,0xe0,0xff,0xeb,0xd3,
+0x9f,0x40,0x02,0x61,0xcf,0xeb,0xc3,0x94,0x10,0x40,0x21,0xeb,0x24,0xf0,0xff,0x74,
+0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,
+0x90,0x96,0xfd,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x70,0x23,0xeb,0xc3,0x94,0x10,
+0x50,0x39,0x74,0x01,0x7e,0x00,0xa8,0x03,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,
+0xd8,0xf9,0xff,0x90,0x96,0xff,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x1c,0xeb,
+0x64,0x13,0x60,0x08,0xeb,0x64,0x12,0x60,0x03,0xbb,0x11,0x09,0x90,0x96,0xfd,0xe0,
+0x30,0xe0,0x02,0x7b,0x18,0xac,0x03,0x8c,0x61,0x80,0x34,0x0b,0x80,0x8b,0x90,0x96,
+0xfc,0xe0,0xfb,0x6c,0x70,0x69,0x74,0x65,0x2d,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,
+0xec,0xf0,0x75,0xf0,0x09,0xed,0x90,0x93,0x29,0x12,0x43,0x5f,0xe0,0xb4,0x01,0x0c,
+0xe5,0x61,0x20,0xe6,0x07,0xec,0x44,0x40,0xf5,0x61,0x80,0x03,0xaf,0x61,0x22,0xec,
+0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,
+0x93,0xff,0xec,0x25,0xe0,0x24,0x2e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,
+0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,
+0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0x80,0x5b,0xec,
+0xd3,0x9b,0x40,0x56,0x90,0x96,0xfc,0xe0,0xff,0x74,0x65,0x2d,0xf5,0x82,0xe4,0x34,
+0x96,0xf5,0x83,0xef,0xf0,0xac,0x07,0x8f,0x61,0xec,0x25,0xe0,0x24,0x66,0xf5,0x82,
+0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xec,0x25,0xe0,0x24,
+0x2e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,
+0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,0x92,
+0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xaf,0x61,0x22,0x74,0x01,0x2d,0xf5,0x82,0xe4,
+0x34,0x92,0xf5,0x83,0xe4,0xf0,0xaf,0x05,0xe5,0x61,0x44,0x80,0xfd,0x11,0x53,0xe5,
+0x61,0x44,0x80,0xff,0x22,0x75,0x30,0x1f,0x75,0x31,0x01,0xe4,0xf5,0x32,0x90,0x01,
+0x38,0xe5,0x30,0xf0,0xa3,0xe5,0x31,0xf0,0xa3,0xe5,0x32,0xf0,0x22,0x90,0x00,0x02,
+0xe0,0x54,0xe0,0x90,0x97,0x33,0x60,0x04,0x74,0x01,0xf0,0x22,0x74,0x02,0xf0,0x22,
+0x90,0x00,0xf3,0xe0,0x30,0xe3,0x08,0x90,0x97,0x35,0x74,0x01,0xf0,0x80,0x05,0xe4,
+0x90,0x97,0x35,0xf0,0x90,0x97,0x35,0xe0,0xb4,0x01,0x12,0x90,0x00,0xf2,0xe0,0x30,
+0xe7,0x0b,0x90,0x97,0x22,0x74,0xfd,0xf0,0xa3,0x74,0x33,0xf0,0x22,0x90,0x97,0x22,
+0x74,0xfd,0xf0,0xa3,0x74,0x2f,0xf0,0x22,0x90,0x01,0x64,0x74,0xa0,0xf0,0x22,0xc0,
+0xe0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x05,0xc0,0x06,0xc0,0x07,
+0x7d,0xef,0x90,0x01,0xc4,0xed,0xf0,0x74,0x64,0xff,0xa3,0xf0,0x53,0x91,0xef,0x90,
+0x00,0x51,0xe0,0xfe,0x90,0x00,0x55,0xe0,0x5e,0xf5,0x3d,0xe5,0x3d,0x30,0xe6,0x03,
+0x74,0x40,0xf0,0x90,0x01,0xc4,0xed,0xf0,0xa3,0xef,0xf0,0xd0,0x07,0xd0,0x06,0xd0,
+0x05,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xe0,0x32,0x8f,0x68,0x8c,0x69,0x8d,0x6a,
+0x22,0x8f,0x6b,0x8c,0x6c,0x8d,0x6d,0x22,0xe4,0xf5,0x70,0x90,0x97,0x21,0xf0,0xf5,
+0x71,0x90,0x97,0x1e,0x74,0x0c,0xf0,0x90,0x97,0x1c,0xf0,0xe4,0x90,0x97,0x1f,0xf0,
+0x90,0x97,0x1b,0xf0,0x90,0x97,0x1a,0xf0,0x90,0x97,0x1d,0x04,0xf0,0x90,0x97,0x0e,
+0xf0,0xe4,0x90,0x97,0x20,0xf0,0x90,0x97,0x10,0xf0,0x90,0x97,0x18,0x74,0x07,0xf0,
+0xe4,0x90,0x97,0x0f,0xf0,0x90,0x97,0x16,0xf0,0xa3,0x74,0x02,0xf0,0x90,0x97,0x14,
+0x14,0xf0,0xa3,0x74,0x03,0xf0,0x90,0x97,0x13,0x74,0x14,0xf0,0x90,0x97,0x19,0x74,
+0x05,0xf0,0xe4,0x90,0x97,0x12,0xf0,0x90,0x97,0x0d,0xf0,0x90,0x97,0x34,0xf0,0x22,
+0xe4,0x90,0x97,0x20,0xf0,0x90,0x97,0x0f,0xf0,0x90,0x97,0x21,0xf0,0x22,0x8b,0x56,
+0x8a,0x57,0x89,0x58,0xb1,0xb0,0xab,0x56,0xaa,0x57,0xa9,0x58,0x12,0x29,0xd9,0xf5,
+0x71,0x14,0x60,0x0e,0x14,0x60,0x1e,0x14,0x60,0x2f,0x24,0x03,0x70,0x40,0x7f,0x01,
+0x80,0x3a,0xab,0x56,0xaa,0x57,0xa9,0x58,0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0xe4,
+0xff,0xd1,0x1f,0x80,0x27,0xab,0x56,0xaa,0x57,0xa9,0x58,0x90,0x00,0x02,0x12,0x42,
+0x20,0xfd,0x7f,0x01,0xd1,0x1f,0x1f,0x80,0x13,0xab,0x56,0xaa,0x57,0xa9,0x58,0x90,
+0x00,0x02,0x12,0x42,0x20,0xfd,0x7f,0x02,0xd1,0x1f,0xe4,0xff,0xd1,0x4a,0x22,0xef,
+0x24,0xfe,0x60,0x0b,0x04,0x70,0x22,0x90,0x97,0x1d,0x74,0x01,0xf0,0x80,0x16,0xed,
+0x70,0x0a,0x90,0x97,0x19,0xe0,0x90,0x97,0x1d,0xf0,0x80,0x05,0x90,0x97,0x1d,0xed,
+0xf0,0x90,0x97,0x1d,0xe0,0x90,0x97,0x0e,0xf0,0x22,0xef,0x64,0x01,0x70,0x3d,0x7d,
+0x7c,0x7f,0x02,0x12,0x36,0x75,0x7d,0x02,0x7f,0x03,0x12,0x36,0x75,0x90,0x01,0x57,
+0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x7d,0x01,0x7f,0x0c,0x12,0x47,0xab,0x90,
+0x97,0x36,0xe0,0x30,0xe0,0x02,0xd1,0xea,0xe4,0xff,0x12,0x50,0x97,0x90,0x06,0x04,
+0xe0,0x54,0x7f,0xf0,0x90,0x06,0x0a,0xe0,0x54,0xf8,0xf0,0x22,0x90,0x01,0x36,0x74,
+0x7c,0xf0,0xa3,0x74,0x02,0xf0,0x7d,0x7c,0xff,0x12,0x36,0xe6,0x7d,0x02,0x7f,0x03,
+0x12,0x36,0xe6,0x90,0x06,0x04,0xe0,0x44,0x80,0xf0,0x90,0x06,0x0a,0xe0,0x44,0x07,
+0xf0,0x90,0x97,0x16,0xe0,0xa3,0xe0,0x90,0x05,0x58,0xf0,0xe5,0x70,0x30,0xe0,0x24,
+0x90,0x97,0x10,0xe0,0x70,0x23,0xe0,0x04,0xf0,0x90,0x97,0x1c,0xe0,0x54,0x0f,0xc3,
+0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0xab,0x90,0x97,0x36,0xe0,0x30,
+0xe0,0x07,0x80,0x06,0xe4,0x90,0x97,0x10,0xf0,0x22,0x90,0x97,0x37,0xe0,0x64,0x06,
+0x60,0x2f,0x90,0x97,0x1c,0xe0,0x54,0x0f,0x14,0x60,0x1f,0x14,0x60,0x15,0x24,0xfe,
+0x60,0x0a,0x24,0xf8,0x70,0x1b,0xe4,0x90,0x97,0x37,0xf0,0x22,0x90,0x97,0x37,0x74,
+0x01,0xf0,0x22,0x90,0x97,0x37,0x74,0x03,0xf0,0x22,0x90,0x01,0xc6,0xe0,0x44,0x08,
+0xf0,0x22,0xae,0x07,0xe4,0xff,0x12,0x4c,0x1d,0xef,0x60,0x18,0x90,0x97,0x36,0xe0,
+0xc4,0x13,0x13,0x54,0x03,0x20,0xe0,0x0c,0xaf,0x06,0x7d,0x01,0x12,0x47,0xab,0xd1,
+0xea,0x7f,0x01,0x22,0x7f,0x00,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x00,
+0x01,0x12,0x42,0x20,0x90,0x97,0x1f,0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0x90,0x97,
+0x0d,0xf0,0x12,0x29,0xd9,0x65,0x71,0x60,0x02,0xb1,0xbe,0xd0,0xd0,0x92,0xaf,0x22,
+0x12,0x55,0x68,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x32,
+0x90,0x97,0x1b,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x24,0x90,0x97,
+0x1a,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x16,0x90,0x97,0x1e,0xe0,
+0x54,0x0f,0xd3,0x94,0x04,0x40,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x03,0x7f,
+0x01,0x22,0x90,0x01,0xb8,0x74,0x08,0xf0,0x7f,0x00,0x22,0xe5,0x12,0x60,0x08,0x90,
+0x01,0xb9,0x74,0x01,0xf0,0x80,0x5e,0x90,0x97,0x1e,0xe0,0x54,0x0f,0xd3,0x94,0x01,
+0x40,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x4b,0x90,0x02,0x87,0xe0,0x60,0x08,
+0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x3d,0x90,0x97,0x33,0xe0,0xb4,0x02,0x10,0x90,
+0x97,0x22,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x17,0x80,0x26,0x90,
+0x97,0x33,0xe0,0xb4,0x01,0x0e,0x90,0x01,0xaf,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,
+0x08,0xf0,0x80,0x11,0x90,0x97,0x12,0xe0,0x70,0x08,0x90,0x01,0xb9,0x74,0x10,0xf0,
+0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74,0x02,0xf0,0x7f,0x00,0x22,0x90,0x06,
+0x04,0xe0,0x54,0xbf,0xf0,0xef,0x60,0x09,0xe5,0x70,0xb4,0x01,0x04,0xe4,0xff,0x11,
+0x4d,0x90,0x97,0x1c,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x0c,0xf0,0x22,0x8f,0x73,0x90,
+0x97,0x1c,0xe0,0x90,0x01,0xc1,0xf0,0xa3,0xe5,0x12,0xf0,0x12,0x4f,0xd4,0xef,0x64,
+0x01,0x70,0x2e,0x90,0x97,0x27,0x12,0x50,0x02,0xe5,0x73,0x60,0x10,0x74,0x21,0x2f,
+0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x80,0x0e,0x74,0x21,0x2f,
+0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0,0x90,0x04,0x1f,0x74,0x20,
+0xf0,0x22,0x8f,0x27,0xe4,0x90,0x97,0x61,0xf0,0xa3,0xf0,0x90,0x01,0x09,0xe0,0x7f,
+0x00,0x30,0xe7,0x02,0x7f,0x01,0xef,0x65,0x27,0x60,0x3e,0xc3,0x90,0x97,0x62,0xe0,
+0x94,0x88,0x90,0x97,0x61,0xe0,0x94,0x13,0x40,0x08,0x90,0x01,0xc6,0xe0,0x44,0x80,
+0xf0,0x22,0x90,0x97,0x61,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x7f,0x14,0x7e,0x00,
+0x12,0x37,0x54,0xd3,0x90,0x97,0x62,0xe0,0x94,0x32,0x90,0x97,0x61,0xe0,0x94,0x00,
+0x40,0xb9,0x90,0x01,0xc7,0xe0,0x30,0xe0,0xb2,0x22,0x90,0x97,0x1e,0xe0,0x30,0xe6,
+0x1c,0xe0,0x54,0x0f,0xff,0x90,0x97,0x0c,0xe0,0xfe,0x4f,0x90,0x01,0x2f,0xf0,0xee,
+0x64,0x80,0x90,0x97,0x0c,0xf0,0x90,0x97,0x1e,0xe0,0x54,0xbf,0xf0,0x22,0x8f,0x72,
+0x12,0x4f,0xd4,0xef,0x64,0x01,0x70,0x2e,0x90,0x97,0x28,0x12,0x50,0x02,0xe5,0x72,
+0x60,0x10,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,
+0x80,0x0e,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0,
+0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x90,0x06,0xa9,0xe0,0xf5,0x50,0x54,0xc0,0x70,
+0x0e,0x90,0x97,0x21,0xe0,0x54,0xfe,0xf0,0xe0,0x54,0xfd,0xf0,0x12,0x47,0x98,0xe5,
+0x50,0x30,0xe6,0x19,0x90,0x97,0x21,0xe0,0x44,0x01,0xf0,0x90,0x97,0x1f,0xe0,0x64,
+0x02,0x60,0x05,0x12,0x57,0xc6,0x80,0x0c,0x12,0x44,0xa5,0x80,0x07,0x90,0x97,0x21,
+0xe0,0x54,0xfe,0xf0,0xe5,0x50,0x90,0x97,0x21,0x30,0xe7,0x18,0xe0,0x44,0x02,0xf0,
+0xe4,0x90,0x97,0x47,0x12,0x44,0x52,0x90,0x01,0x57,0x74,0x05,0xf0,0x90,0x97,0x20,
+0x74,0x01,0xf0,0x22,0xe0,0x54,0xfd,0xf0,0x22,0xe4,0x90,0x96,0xee,0xf0,0xe5,0x71,
+0x70,0x02,0x41,0x4d,0xe5,0x70,0x64,0x01,0x60,0x02,0x41,0x4d,0xe5,0x71,0x14,0x60,
+0x29,0x24,0xfd,0x60,0x25,0x24,0x02,0x24,0xfb,0x50,0x02,0x80,0x23,0x90,0x97,0x0e,
+0xe0,0x14,0xf0,0xe0,0x60,0x04,0xa3,0xe0,0x60,0x16,0x90,0x97,0x0e,0xe0,0x70,0x0a,
+0x90,0x97,0x1d,0xe0,0x90,0x97,0x0e,0xf0,0x80,0x00,0x90,0x96,0xee,0x74,0x01,0xf0,
+0x90,0x97,0x36,0xe0,0x30,0xe0,0x16,0xa3,0xe0,0xb4,0x06,0x05,0xe4,0x90,0x96,0xee,
+0xf0,0xe4,0xff,0x12,0x4c,0x1d,0xef,0x70,0x04,0x90,0x96,0xee,0xf0,0x90,0x96,0xee,
+0xe0,0x60,0x3a,0x90,0x97,0x21,0xe0,0x44,0x10,0xf0,0xe4,0x90,0x97,0x47,0xf0,0x90,
+0x97,0x18,0x12,0x44,0x56,0x90,0x01,0x57,0x74,0x05,0xf0,0x90,0x97,0x1c,0xe0,0x54,
+0x0f,0xc3,0x94,0x04,0x50,0x17,0x7d,0x01,0x7f,0x04,0x12,0x47,0xab,0x90,0x97,0x36,
+0xe0,0x30,0xe0,0x09,0x12,0x66,0xea,0x90,0x05,0x22,0x74,0xff,0xf0,0x22,0x90,0x97,
+0x20,0xe0,0x60,0x0e,0xe4,0xf0,0xa3,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0x07,0x70,0x2c,
+0x80,0x27,0x90,0x97,0x0f,0xe0,0x04,0xf0,0x90,0x97,0x21,0xe0,0x54,0xef,0xf0,0x90,
+0x97,0x14,0xe0,0xff,0x90,0x97,0x0f,0xe0,0xd3,0x9f,0x40,0x0d,0xe5,0x70,0xb4,0x01,
+0x0b,0xa3,0xe0,0x70,0x07,0xe0,0x04,0xf0,0x22,0x12,0x47,0x98,0x22,0xef,0xc3,0x94,
+0x20,0x50,0x39,0xef,0x30,0xe0,0x17,0xed,0xc4,0x54,0xf0,0xfd,0xef,0xc3,0x13,0xfe,
+0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,0x0f,0x80,0x10,0xef,0xc3,
+0x13,0xfe,0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,
+0xa4,0x2e,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x4d,0xf0,0x22,0xe4,0xf5,0x56,
+0x75,0xf0,0x09,0xe5,0x56,0x90,0x93,0x2a,0x12,0x43,0x5f,0xe0,0x64,0x01,0x60,0x03,
+0x02,0x70,0xa1,0xe5,0x56,0x25,0xe0,0x24,0xc0,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,
+0xe0,0xfe,0xa3,0xe0,0xd3,0x94,0x00,0xee,0x94,0x00,0x50,0x03,0x02,0x70,0xa1,0xe5,
+0x56,0x75,0xf0,0x0a,0xa4,0x24,0x00,0xf9,0x74,0x90,0x35,0xf0,0x75,0x5b,0x01,0xf5,
+0x5c,0x89,0x5d,0xe5,0x56,0x25,0xe0,0x24,0xc0,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,
+0xe0,0xff,0xa3,0xe0,0x90,0x96,0xf6,0xcf,0xf0,0xa3,0xef,0xf0,0xe5,0x56,0x25,0xe0,
+0x24,0x63,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90,0x96,0xf8,
+0xcf,0xf0,0xa3,0xef,0xf0,0x74,0x84,0x25,0x56,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,
+0xe0,0x54,0x3f,0x90,0x96,0xf2,0xf0,0xe0,0xfe,0x54,0x1f,0xa3,0xf0,0x75,0xf0,0x09,
+0xe5,0x56,0x90,0x93,0x27,0x12,0x43,0x5f,0xe0,0x90,0x96,0xfb,0xf0,0x74,0x24,0x25,
+0x56,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe0,0xc3,0x94,0x05,0x40,0x02,0xa1,0x78,
+0x90,0x96,0xfb,0xe0,0xff,0x90,0x96,0xf3,0xe0,0x9f,0x40,0x13,0x90,0x96,0xfb,0xe0,
+0x90,0x96,0xf3,0xf0,0xee,0x54,0x40,0xfe,0x90,0x96,0xf2,0xf0,0xef,0x4e,0xf0,0x90,
+0x96,0xf3,0xe0,0xff,0x90,0x41,0x12,0x93,0xfe,0x74,0x23,0x25,0x56,0xf5,0x82,0xe4,
+0x34,0x95,0xf5,0x83,0xe0,0xc3,0x9e,0x40,0x06,0xef,0x90,0x40,0xda,0x80,0x07,0x90,
+0x96,0xf3,0xe0,0x90,0x40,0xf6,0x93,0x90,0x96,0xfa,0xf0,0x90,0x96,0xfa,0xe0,0x75,
+0xf0,0x06,0xa4,0x24,0x50,0xf9,0x74,0x40,0x35,0xf0,0x75,0x58,0xff,0xf5,0x59,0x89,
+0x5a,0x90,0x96,0xf2,0xe0,0x90,0x41,0xba,0x93,0xff,0xd3,0x90,0x96,0xf9,0xe0,0x9f,
+0x90,0x96,0xf8,0xe0,0x94,0x00,0x40,0x0a,0xe4,0xfd,0xaf,0x56,0x12,0x61,0x18,0x02,
+0x70,0x38,0xe5,0x56,0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,
+0xf5,0x5e,0xa3,0xe0,0xf5,0x5f,0xab,0x58,0xaa,0x59,0xa9,0x5a,0x12,0x29,0xd9,0xff,
+0x7e,0x00,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x12,0x42,0x97,0xfd,0xac,0xf0,0x12,0x29,
+0xf2,0xef,0x25,0x5f,0xf5,0x5f,0xee,0x35,0x5e,0xf5,0x5e,0xab,0x58,0xaa,0x59,0xa9,
+0x5a,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,
+0x90,0x00,0x02,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,0x5f,0xf5,
+0x5f,0xee,0x35,0x5e,0xf5,0x5e,0xab,0x58,0xaa,0x59,0xa9,0x5a,0x90,0x00,0x02,0x12,
+0x42,0x20,0xff,0x7e,0x00,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x04,0x12,0x42,
+0xc2,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,0x5f,0xf5,0x5f,0xee,0x35,0x5e,0xf5,
+0x5e,0xab,0x58,0xaa,0x59,0xa9,0x5a,0x90,0x00,0x03,0x12,0x42,0x20,0xff,0x7e,0x00,
+0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x06,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,
+0x29,0xf2,0xef,0x25,0x5f,0xf5,0x5f,0xee,0x35,0x5e,0xf5,0x5e,0xab,0x58,0xaa,0x59,
+0xa9,0x5a,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x5b,0xaa,0x5c,0xa9,
+0x5d,0x90,0x00,0x08,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,0x5f,
+0xf5,0x5f,0xee,0x35,0x5e,0xf5,0x5e,0xab,0x58,0xaa,0x59,0xa9,0x5a,0x90,0x00,0x05,
+0x12,0x42,0x20,0xff,0x7e,0x00,0x90,0x96,0xf6,0xe0,0xfc,0xa3,0xe0,0xfd,0x12,0x29,
+0xf2,0xd3,0xe5,0x5f,0x9f,0xe5,0x5e,0x9e,0x40,0x0c,0xe5,0x5f,0x9f,0xf5,0x5f,0xe5,
+0x5e,0x9e,0xf5,0x5e,0x80,0x05,0xe4,0xf5,0x5e,0xf5,0x5f,0xe5,0x56,0x25,0xe0,0x24,
+0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe5,0x5e,0xf0,0xa3,0xe5,0x5f,0xf0,0x90,
+0x96,0xf2,0xe0,0xf9,0x25,0xe0,0x24,0x2e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xc3,
+0x74,0x01,0x93,0x95,0x5f,0xe4,0x93,0x95,0x5e,0x50,0x08,0xaf,0x56,0x12,0x62,0x9c,
+0x02,0x70,0x0c,0xe9,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xd3,
+0x74,0x01,0x93,0x95,0x5f,0xe4,0x93,0x95,0x5e,0x50,0x03,0x02,0x70,0x0c,0x7d,0x01,
+0xaf,0x56,0x12,0x61,0x18,0x02,0x70,0x0c,0x74,0x24,0x25,0x56,0xf5,0x82,0xe4,0x34,
+0x96,0xf5,0x83,0xe0,0xfc,0x64,0x05,0x60,0x02,0xe1,0x14,0x90,0x93,0x22,0xe0,0xff,
+0xb4,0x03,0x0b,0x90,0x96,0xf3,0xe0,0xc3,0x94,0x19,0x40,0x3d,0x80,0x2e,0xef,0xb4,
+0x02,0x0b,0x90,0x96,0xf3,0xe0,0xc3,0x94,0x11,0x40,0x2e,0x80,0x1f,0x90,0x93,0x22,
+0xe0,0xff,0xb4,0x01,0x0b,0x90,0x96,0xf3,0xe0,0xc3,0x94,0x0a,0x40,0x1b,0x80,0x0c,
+0xef,0x70,0x11,0x90,0x96,0xf3,0xe0,0xc3,0x94,0x03,0x40,0x0d,0x90,0x95,0x43,0x74,
+0x01,0xf0,0x80,0x05,0xe4,0x90,0x95,0x43,0xf0,0x74,0x43,0x25,0x56,0xf5,0x82,0xe4,
+0x34,0x94,0xf5,0x83,0xe0,0xf5,0x60,0x74,0x23,0x25,0x56,0xf5,0x82,0xe4,0x34,0x95,
+0xf5,0x83,0xe0,0xff,0xc3,0x94,0x30,0x50,0x02,0xc1,0xc0,0x90,0x95,0x43,0xe0,0x64,
+0x01,0x60,0x02,0xc1,0xc0,0x74,0x44,0x25,0x56,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,
+0xe0,0x64,0x0a,0x60,0x51,0xef,0x24,0x05,0xff,0xe4,0x33,0xfe,0x74,0x21,0x25,0x56,
+0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0xfd,0xd3,0x9f,0xee,0x64,0x80,0xf8,0x74,
+0x80,0x98,0x50,0x32,0xed,0x24,0x05,0xff,0xe4,0x33,0xfe,0x74,0x23,0x25,0x56,0xf5,
+0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xd3,0x9f,0xee,0x64,0x80,0xf8,0x74,0x80,0x98,
+0x50,0x14,0x74,0x44,0x25,0x56,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe0,0xff,0x90,
+0x96,0xf3,0xe0,0x6f,0x60,0x3d,0x74,0x23,0x25,0x56,0xf5,0x82,0xe4,0x34,0x95,0xf5,
+0x83,0xe0,0xff,0xd3,0x94,0x42,0x40,0x05,0x75,0x60,0x05,0x80,0x0e,0xef,0xd3,0x94,
+0x39,0x40,0x05,0x75,0x60,0x03,0x80,0x03,0x75,0x60,0x01,0x74,0x21,0x25,0x56,0xf5,
+0x82,0xe4,0x34,0x92,0xf5,0x83,0xef,0xf0,0x74,0x44,0x25,0x56,0xf5,0x82,0xe4,0x34,
+0x95,0x80,0x29,0x74,0x24,0x25,0x56,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe4,0xf0,
+0x74,0x44,0x25,0x56,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0x04,0xf0,0x80,0x10,
+0xe4,0xf5,0x60,0x74,0x24,0x25,0x56,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe4,0xf0,
+0x90,0x96,0xf3,0xe0,0xff,0x74,0x44,0x25,0x56,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,
+0xef,0xf0,0x74,0x43,0x25,0x56,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe5,0x60,0xf0,
+0x75,0xf0,0x09,0xe5,0x56,0x90,0x93,0x2b,0x12,0x43,0x5f,0xe0,0xb4,0x01,0x10,0xe4,
+0xf5,0x60,0x74,0x24,0x25,0x56,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe4,0xf0,0xad,
+0x60,0x02,0x70,0x07,0xec,0x64,0x06,0x60,0x03,0x02,0x70,0x0c,0xf5,0x5e,0xf5,0x5f,
+0x90,0x41,0xdb,0x93,0xff,0x7e,0x00,0x90,0x96,0xf6,0xe0,0xfc,0xa3,0xe0,0xfd,0x12,
+0x29,0xf2,0x90,0x96,0xf4,0xee,0xf0,0xa3,0xef,0xf0,0x74,0x43,0x25,0x56,0xf5,0x82,
+0xe4,0x34,0x94,0xf5,0x83,0xe0,0xf5,0x60,0xe4,0xf5,0x57,0xab,0x5b,0xaa,0x5c,0xa9,
+0x5d,0x75,0xf0,0x02,0xe5,0x57,0xa4,0xf5,0x82,0x85,0xf0,0x83,0x12,0x42,0xc2,0xfd,
+0xac,0xf0,0xe5,0x57,0x90,0x41,0xd6,0x93,0xff,0x7e,0x00,0x12,0x29,0xf2,0xef,0x25,
+0x5f,0xf5,0x5f,0xee,0x35,0x5e,0xf5,0x5e,0xc3,0x90,0x96,0xf5,0xe0,0x95,0x5f,0x90,
+0x96,0xf4,0xe0,0x95,0x5e,0x40,0x07,0x05,0x57,0xe5,0x57,0xb4,0x05,0xbd,0xe5,0x57,
+0xc3,0x13,0xf5,0x57,0xe5,0x60,0xb4,0x01,0x06,0xe5,0x57,0x70,0x46,0x80,0x13,0xe5,
+0x60,0xb4,0x03,0x15,0xe5,0x57,0x70,0x05,0x75,0x60,0x03,0x80,0x39,0xe5,0x57,0xb4,
+0x01,0x05,0x75,0x60,0x01,0x80,0x2f,0x80,0x2a,0xe5,0x60,0xb4,0x05,0x28,0xe5,0x57,
+0x70,0x05,0x75,0x60,0x05,0x80,0x0d,0xe5,0x57,0xb4,0x01,0x05,0x75,0x60,0x03,0x80,
+0x03,0x75,0x60,0x01,0xd3,0x90,0x96,0xf9,0xe0,0x94,0x03,0x90,0x96,0xf8,0xe0,0x94,
+0x00,0x40,0x03,0xe4,0xf5,0x60,0xd3,0x90,0x96,0xf9,0xe0,0x94,0x03,0x90,0x96,0xf8,
+0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x60,0x74,0x43,0x25,0x56,0xf5,0x82,0xe4,0x34,
+0x94,0xf5,0x83,0xe5,0x60,0xf0,0xfd,0xaf,0x56,0x12,0x6a,0x8d,0x74,0x24,0x25,0x56,
+0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe0,0xd3,0x94,0x05,0x74,0x24,0x50,0x0e,0x25,
+0x56,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe0,0x04,0xf0,0x80,0x0b,0x25,0x56,0xf5,
+0x82,0xe4,0x34,0x96,0xf5,0x83,0xe4,0xf0,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0xe4,0xf5,
+0xf0,0x12,0x42,0xfa,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x02,0xe4,0xf5,0xf0,
+0x12,0x43,0x19,0x90,0x00,0x04,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x06,0xe4,
+0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x08,0xe4,0xf5,0xf0,0x12,0x43,0x19,0xe5,0x56,
+0x25,0xe0,0x24,0xc0,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xe5,
+0x56,0x25,0xe0,0x24,0x63,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,
+0xe5,0x56,0x25,0xe0,0x24,0xa3,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xa3,
+0xf0,0x05,0x56,0xe5,0x56,0xc3,0x94,0x20,0x50,0x03,0x02,0x6a,0xd0,0x22,0xe4,0xfd,
+0x74,0xa4,0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe4,0xf0,0x0d,0xbd,0x10,0xf0,
+0xe4,0xfd,0x75,0xf0,0x0a,0xed,0x90,0x90,0x00,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,
+0x75,0xf0,0x0a,0xed,0x90,0x90,0x02,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,
+0x0a,0xed,0x90,0x90,0x04,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,
+0x90,0x90,0x06,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,
+0x08,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x74,0x44,0x2d,0xf5,0x82,0xe4,0x34,0x96,
+0xf5,0x83,0x74,0x13,0xf0,0x74,0x44,0x2d,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe4,
+0xf0,0x74,0x43,0x2d,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xed,0x25,0xe0,
+0x24,0xc0,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,
+0x24,0x63,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,
+0x24,0xe3,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,
+0x24,0xa3,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,
+0x24,0x64,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,
+0x24,0xa4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x74,0x24,0x2d,
+0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe4,0xf0,0x90,0x41,0x8c,0x93,0xfe,0x74,0x01,
+0x93,0xff,0x90,0x41,0x54,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,
+0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xee,
+0xf0,0xa3,0xef,0xf0,0x75,0xf0,0x09,0xed,0x90,0x93,0x29,0x12,0x43,0x5f,0x74,0x01,
+0xf0,0x74,0xc1,0x2d,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0x74,0x0c,0xf0,0x75,0xf0,
+0x09,0xed,0x90,0x93,0x25,0x12,0x43,0x5f,0x74,0xff,0xf0,0xa3,0xf0,0x75,0xf0,0x09,
+0xed,0x90,0x93,0x23,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0x74,0x0f,0xf0,0x75,0xf0,0x09,
+0xed,0x90,0x93,0x27,0x12,0x43,0x5f,0x74,0x13,0xf0,0x75,0xf0,0x09,0xed,0x90,0x93,
+0x28,0x12,0x43,0x5f,0xe4,0xf0,0x74,0x84,0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,
+0x74,0x13,0xf0,0x0d,0xed,0x64,0x20,0x60,0x02,0x01,0xc2,0x22,0x12,0x29,0xd9,0xf5,
+0x56,0xc3,0x94,0x20,0x50,0x15,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x74,0x23,0x25,
+0x56,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xef,0xf0,0x22,0xe5,0x56,0xb4,0x20,0x0a,
+0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x93,0x21,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,
+0xc0,0xd0,0x90,0x97,0x59,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0x90,
+0x97,0x59,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x2d,0xc3,0x90,0x97,
+0x5c,0xe0,0x94,0xe8,0x90,0x97,0x5b,0xe0,0x94,0x03,0x40,0x0b,0x90,0x01,0xc6,0xe0,
+0x44,0x10,0xf0,0x7f,0x00,0x80,0x15,0x90,0x97,0x5b,0xe4,0x75,0xf0,0x01,0x12,0x42,
+0x81,0x7f,0x0a,0x7e,0x00,0x12,0x37,0x54,0x80,0xc5,0x7f,0x01,0xd0,0xd0,0x92,0xaf,
+0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x97,0x4f,0x12,0x43,0x8b,0x90,0x97,
+0x33,0xe0,0x64,0x02,0x60,0x6e,0x90,0x97,0x33,0xe0,0x64,0x01,0x70,0x66,0x90,0x97,
+0x69,0xe0,0xff,0x04,0xf0,0x90,0x97,0x4f,0x12,0x43,0x6b,0x90,0x00,0x01,0xef,0x12,
+0x42,0x5f,0x7f,0xaf,0x7e,0x01,0x51,0x5b,0xef,0x60,0x49,0x90,0x97,0x4f,0x12,0x43,
+0x6b,0x8b,0x1e,0x8a,0x1f,0x89,0x20,0x75,0x21,0x02,0x7b,0x01,0x7a,0x01,0x79,0xa0,
+0x12,0x45,0x09,0x90,0x97,0x52,0x12,0x43,0x6b,0x8b,0x1e,0x8a,0x1f,0x89,0x20,0x90,
+0x97,0x4f,0x12,0x43,0x6b,0x12,0x29,0xd9,0xff,0xc4,0x54,0x0f,0xf5,0x21,0x7b,0x01,
+0x7a,0x01,0x79,0xa2,0x12,0x45,0x09,0x90,0x01,0xaf,0x74,0xff,0xf0,0x90,0x01,0xcb,
+0xe0,0x64,0x80,0xf0,0xd0,0xd0,0x92,0xaf,0x22,0x12,0x29,0xd9,0xf5,0x70,0x22,0x90,
+0x00,0x02,0x12,0x42,0x20,0xff,0x30,0xe0,0x25,0x12,0x29,0xd9,0x90,0x97,0x14,0xf0,
+0x90,0x00,0x01,0x12,0x42,0x20,0x90,0x97,0x15,0xf0,0xef,0xc3,0x13,0x54,0x7f,0x90,
+0x97,0x13,0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0x90,0x97,0x19,0xf0,0x22,0x90,0x97,
+0x14,0x74,0x01,0xf0,0x90,0x97,0x15,0x74,0x03,0xf0,0x90,0x97,0x13,0x74,0x14,0xf0,
+0x90,0x97,0x19,0x74,0x05,0xf0,0x22,0x12,0x29,0xd9,0x30,0xe0,0x18,0xc3,0x13,0x54,
+0x7f,0x90,0x97,0x18,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x90,0x97,0x16,0xe4,
+0xf0,0xa3,0xef,0xf0,0x22,0x90,0x97,0x18,0x74,0x07,0xf0,0x90,0x97,0x16,0xe4,0xf0,
+0xa3,0x74,0x02,0xf0,0x22,0x90,0x02,0x09,0xe0,0xfd,0x12,0x29,0xd9,0xfe,0xaf,0x05,
+0xed,0x2e,0x90,0x97,0x25,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,
+0x97,0x26,0xf0,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x97,0x27,0xf0,
+0x90,0x00,0x03,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x97,0x28,0xf0,0x90,0x00,0x04,
+0x12,0x42,0x20,0xff,0xae,0x05,0xed,0x2f,0x90,0x97,0x29,0xf0,0x22,0x12,0x29,0xd9,
+0x90,0x97,0x42,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x96,0xfd,0x12,
+0x43,0x8b,0x90,0x96,0xfd,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,0xfa,0xe5,
+0xf0,0x24,0x00,0xff,0xe4,0x3a,0xfe,0x90,0x96,0xfd,0x12,0x43,0x6b,0x90,0x00,0x01,
+0xee,0x8f,0xf0,0x12,0x43,0x19,0x12,0x29,0xd9,0xff,0x60,0x2c,0xb5,0x22,0x16,0x90,
+0x96,0xfd,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,0x65,0x24,0x70,0x04,0xe5,
+0x23,0x65,0xf0,0x60,0x22,0x90,0x96,0xfd,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,
+0xc2,0xff,0xae,0xf0,0x91,0x7c,0x80,0x0f,0x90,0x96,0xfd,0x12,0x43,0x6b,0x12,0x29,
+0xd9,0x65,0x22,0x60,0x02,0xb1,0xee,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x97,0x00,0xee,
+0xf0,0xa3,0xef,0xf0,0x75,0x22,0x01,0x8e,0x23,0xf5,0x24,0xe4,0xfd,0x7f,0x0b,0x12,
+0x56,0x7d,0xe4,0xfd,0x7f,0x02,0x12,0x56,0x7d,0x91,0xcc,0xe4,0xff,0x91,0xc0,0xe4,
+0xf5,0x26,0x90,0x01,0xc9,0xe5,0x26,0xf0,0x90,0x97,0x00,0xe0,0xfc,0xa3,0xe0,0xfd,
+0xec,0xfb,0x8d,0x44,0xe4,0xf5,0x45,0x7d,0x01,0x7f,0x60,0x7e,0x01,0x02,0x35,0xab,
+0x90,0x01,0xca,0xe5,0x25,0xf0,0xef,0x60,0x02,0xb1,0x2d,0x22,0x7f,0x0b,0xb1,0x4d,
+0xef,0x65,0x25,0x60,0x10,0xe5,0x25,0xb4,0x01,0x05,0xe4,0xf5,0x25,0x80,0x03,0x75,
+0x25,0x01,0x7f,0x01,0x22,0x7f,0x00,0x22,0xe5,0x22,0x64,0x01,0x70,0x3e,0x91,0xcc,
+0xbf,0x01,0x04,0x7f,0x01,0x91,0xc0,0x90,0x00,0x46,0xe0,0x44,0x04,0xfd,0x7f,0x46,
+0x12,0x57,0x44,0x90,0x00,0x44,0xe0,0x54,0xfb,0xfd,0x7f,0x44,0x12,0x57,0x44,0x90,
+0x00,0x46,0xe0,0x54,0xfb,0xfd,0x7f,0x46,0x12,0x57,0x44,0x7f,0x02,0xb1,0x4d,0x8f,
+0x26,0x90,0x01,0xc9,0xe5,0x26,0xf0,0xb4,0x01,0x02,0xb1,0x2d,0x22,0x90,0x00,0x49,
+0xe0,0x90,0x97,0x6a,0xf0,0xe0,0x54,0x0f,0xf0,0x44,0xf0,0xfd,0x7f,0x49,0x12,0x57,
+0x44,0x90,0x97,0x6a,0xe0,0x44,0xb0,0xfd,0x7f,0x49,0x02,0x57,0x44,0xd3,0x10,0xaf,
+0x01,0xc3,0xc0,0xd0,0x90,0x97,0x6d,0xef,0xf0,0xd3,0x94,0x07,0x50,0x47,0xe0,0xff,
+0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,
+0xe0,0x5f,0xf0,0x12,0x55,0x7f,0x90,0x97,0x6d,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8,
+0x05,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x44,0xe0,
+0xfb,0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13,
+0xd8,0xf8,0xff,0x80,0x44,0x90,0x97,0x6d,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,
+0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0x12,0x55,0x77,0x90,0x97,0x6d,0xe0,
+0xfd,0x74,0x01,0x7e,0x00,0xa8,0x05,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,
+0xf9,0xff,0x90,0x00,0x42,0xe0,0xfb,0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,
+0xce,0xa2,0xe7,0x13,0xce,0x13,0xd8,0xf8,0xff,0xd0,0xd0,0x92,0xaf,0x22,0xe4,0xf5,
+0x22,0x7f,0x60,0x7e,0x01,0x02,0x44,0xf3,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,
+0x97,0x2b,0xe0,0x90,0x96,0xfe,0xf0,0x90,0x97,0x2c,0xe0,0xf5,0x61,0xa3,0xe0,0xf5,
+0x62,0xe4,0xf5,0x5e,0x74,0x2e,0x25,0x5e,0xf5,0x82,0xe4,0x34,0x97,0xf5,0x83,0xe0,
+0xff,0x74,0x63,0x25,0x5e,0xf8,0xa6,0x07,0x05,0x5e,0xe5,0x5e,0xb4,0x04,0xe5,0x90,
+0x96,0xfe,0xe0,0x12,0x43,0x94,0x76,0x55,0x00,0x77,0x7d,0x01,0x76,0x5b,0x02,0x76,
+0x5b,0x03,0x76,0x5b,0x04,0x77,0x7d,0x05,0x77,0x4d,0x80,0x77,0x63,0x81,0x77,0x7d,
+0x82,0x00,0x00,0x77,0x79,0xaf,0x66,0xf1,0x84,0xe1,0x7d,0x90,0x96,0xfe,0xe0,0xff,
+0xb4,0x02,0x08,0x90,0x96,0xfd,0x74,0x01,0xf0,0x80,0x0f,0xef,0x90,0x96,0xfd,0xb4,
+0x03,0x05,0x74,0x02,0xf0,0x80,0x03,0x74,0x04,0xf0,0xc3,0xe5,0x61,0x94,0x08,0x50,
+0x49,0xe4,0xf5,0x5e,0x90,0x96,0xfd,0xe0,0xff,0xe5,0x5e,0xc3,0x9f,0x40,0x02,0xe1,
+0x7d,0xc3,0xe5,0x61,0x94,0x01,0x50,0x14,0xe5,0x5e,0x25,0x62,0xff,0xc3,0x74,0x03,
+0x95,0x5e,0x24,0x63,0xf8,0xe6,0xfd,0x12,0x57,0x44,0x80,0x1a,0xc3,0x74,0x03,0x95,
+0x5e,0x24,0x63,0xf8,0xe6,0xff,0xe5,0x5e,0x7c,0x00,0x25,0x62,0xfd,0xec,0x35,0x61,
+0x8d,0x82,0xf5,0x83,0xef,0xf0,0x05,0x5e,0x80,0xba,0xc3,0xe5,0x61,0x94,0x10,0x40,
+0x02,0xe1,0x7d,0x90,0x96,0xfe,0xe0,0x64,0x04,0x60,0x02,0xe1,0x7d,0xaf,0x64,0xfc,
+0xfd,0xfe,0x78,0x10,0x12,0x2a,0x6c,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0xaf,
+0x63,0xe4,0xfc,0xfd,0xfe,0x78,0x18,0x12,0x2a,0x6c,0xd0,0x03,0xd0,0x02,0xd0,0x01,
+0xd0,0x00,0x12,0x43,0x46,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0xaf,0x65,0xe4,
+0xfc,0xfd,0xfe,0x78,0x08,0x12,0x2a,0x6c,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,
+0x12,0x43,0x46,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,0x07,0xaf,0x66,0xe4,0xfc,0xfd,
+0xfe,0x12,0x43,0x46,0xa3,0x12,0x2a,0x7f,0x90,0x96,0xff,0x12,0x43,0x53,0x90,0x80,
+0x85,0x12,0x2a,0x7f,0xaf,0x62,0xae,0x61,0x12,0x2f,0xd9,0x80,0x30,0xe5,0x65,0x7f,
+0x00,0xfe,0xef,0x25,0x66,0xf5,0x60,0xe4,0x3e,0xf5,0x5f,0xaf,0x60,0xfe,0x12,0x37,
+0x54,0x80,0x1a,0xe5,0x65,0x7f,0x00,0xfe,0xef,0x25,0x66,0xf5,0x60,0xe4,0x3e,0xf5,
+0x5f,0xaf,0x60,0xfe,0x12,0x36,0xcb,0x80,0x04,0x7f,0x00,0x80,0x02,0x7f,0x01,0xd0,
+0xd0,0x92,0xaf,0x22,0x8f,0x67,0xe4,0x90,0x97,0x03,0xf0,0xe5,0x67,0x14,0xfe,0x90,
+0x97,0x03,0xe0,0xff,0xc3,0x9e,0x50,0x0e,0xef,0x04,0xfd,0x12,0x34,0xb7,0x90,0x97,
+0x03,0xe0,0x04,0xf0,0x80,0xe5,0xe5,0x67,0x14,0xff,0x7d,0xff,0x12,0x34,0xb7,0x90,
+0x97,0x03,0xe5,0x67,0xf0,0x90,0x97,0x03,0xe0,0xc3,0x94,0xff,0x50,0x0f,0xe0,0xff,
+0x04,0xfd,0x12,0x34,0xb7,0x90,0x97,0x03,0xe0,0x04,0xf0,0x80,0xe8,0xad,0x67,0x7f,
+0xff,0x02,0x34,0xb7,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xe4,0xf5,0x58,0x75,0x59,
+0x04,0xf5,0x5a,0xf5,0x5c,0xf5,0x5d,0x90,0x02,0x09,0xe0,0xff,0x12,0x29,0xd9,0xfe,
+0xef,0x2e,0xf5,0x5b,0x30,0xe0,0x08,0x75,0x56,0x00,0x75,0x57,0x80,0x80,0x05,0xe4,
+0xf5,0x56,0xf5,0x57,0xe5,0x5b,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x74,0x20,0x25,0x58,
+0xf5,0x58,0xad,0x57,0xe5,0x58,0x2d,0xff,0x24,0x01,0xf5,0x82,0xe4,0x34,0xfc,0xf5,
+0x83,0xe0,0x90,0x97,0x2b,0xf0,0x74,0x02,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,
+0xe0,0xfe,0xe5,0x58,0x2d,0x24,0x03,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x24,
+0x00,0xff,0xe4,0x3e,0x90,0x97,0x2c,0xf0,0xa3,0xef,0xf0,0x7f,0x04,0xe5,0x58,0x25,
+0x57,0x2f,0x24,0x00,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0xfe,0x74,0x2a,0x2f,
+0xf5,0x82,0xe4,0x34,0x97,0xf5,0x83,0xee,0xf0,0x0f,0xbf,0x08,0xe0,0x12,0x75,0xf8,
+0xef,0x70,0x3f,0x90,0x01,0xc3,0xe0,0x60,0x25,0xc3,0xe5,0x5d,0x94,0xe8,0xe5,0x5c,
+0x94,0x03,0x40,0x09,0x90,0x01,0xc6,0xe0,0x44,0x10,0xf0,0x80,0x63,0x05,0x5d,0xe5,
+0x5d,0x70,0x02,0x05,0x5c,0x7f,0x0a,0x7e,0x00,0x12,0x37,0x54,0x80,0xd5,0x90,0x01,
+0xc6,0xe0,0x90,0x01,0xc3,0x30,0xe2,0x05,0x74,0xfe,0xf0,0x80,0x43,0x74,0xff,0xf0,
+0x80,0x3e,0xe5,0x58,0xb4,0x78,0x23,0xe4,0xf5,0x58,0x05,0x5b,0xe5,0x57,0x64,0x80,
+0x45,0x56,0x70,0x06,0xf5,0x56,0xf5,0x57,0x80,0x06,0x75,0x56,0x00,0x75,0x57,0x80,
+0xe5,0x5b,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x80,0x06,0x74,0x08,0x25,0x58,0xf5,0x58,
+0xe5,0x5a,0x15,0x5a,0x70,0x02,0x15,0x59,0xe5,0x5a,0x45,0x59,0x60,0x02,0x01,0x12,
+0xd0,0xd0,0x92,0xaf,0x22,0x22,0xe4,0x90,0x97,0x32,0xf0,0x90,0x00,0x80,0xe0,0x44,
+0x80,0xfd,0x7f,0x80,0x02,0x57,0x44,0xe4,0xf5,0x25,0x22,0xe4,0x90,0x97,0x42,0xf0,
+0x90,0x97,0x3c,0xe0,0x54,0xfe,0xf0,0x54,0xfb,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,
+0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x97,0x36,0xe0,0x54,0xfe,0xf0,0x54,0xfb,0xf0,0xe4,
+0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x22,0x90,0x05,0x22,0x74,0xff,
+0xf0,0x90,0x97,0x3d,0x74,0x04,0xf0,0x22,0x12,0x4d,0xcc,0x80,0xee,0x90,0x05,0x22,
+0x74,0xff,0xf0,0x90,0x97,0x3d,0x74,0x04,0xf0,0x22,0x12,0x4e,0x07,0x90,0x97,0x3d,
+0x74,0x04,0xf0,0x22,0x90,0x05,0x22,0x74,0xff,0xf0,0x90,0x97,0x37,0x74,0x05,0xf0,
+0x22,0x90,0x05,0x22,0x74,0xff,0xf0,0x90,0x97,0x37,0x74,0x02,0xf0,0x22,0x90,0x05,
+0x22,0x74,0x6f,0xf0,0x90,0x97,0x37,0x74,0x06,0xf0,0x22,0x90,0x05,0x22,0xe4,0xf0,
+0x90,0x97,0x37,0x04,0xf0,0x22,0x90,0x05,0x22,0xe4,0xf0,0x90,0x97,0x37,0xf0,0x22,
+0x90,0x97,0x36,0xe0,0xff,0xc4,0x13,0x13,0x54,0x03,0x30,0xe0,0x0b,0xa3,0xe0,0x64,
+0x06,0x60,0x05,0x7f,0x06,0x12,0x48,0x6e,0x90,0x97,0x37,0xe0,0x64,0x06,0x60,0x03,
+0x12,0x57,0xdc,0x22,0x90,0x01,0x57,0xe0,0x60,0x43,0x90,0x01,0x57,0xe4,0xf0,0x90,
+0x01,0x3c,0x74,0x02,0xf0,0x90,0x97,0x20,0xe0,0x60,0x0a,0xe4,0xf0,0x90,0x97,0x21,
+0xe0,0x54,0xfd,0xf0,0x22,0x90,0x97,0x0f,0xe0,0x04,0xf0,0x90,0x97,0x21,0xe0,0x54,
+0xef,0xf0,0x90,0x97,0x14,0xe0,0xff,0x90,0x97,0x0f,0xe0,0xd3,0x9f,0x40,0x0e,0xe5,
+0x70,0xb4,0x01,0x09,0x90,0x97,0x10,0xe0,0x70,0x03,0xe0,0x04,0xf0,0x22,0x90,0x05,
+0x22,0x74,0xff,0xf0,0xe4,0x90,0x97,0x63,0xf0,0xa3,0xf0,0x90,0x05,0xf8,0xe0,0x70,
+0x0f,0xa3,0xe0,0x70,0x0b,0xa3,0xe0,0x70,0x07,0xa3,0xe0,0x70,0x03,0x7f,0x01,0x22,
+0xd3,0x90,0x97,0x64,0xe0,0x94,0xe8,0x90,0x97,0x63,0xe0,0x94,0x03,0x40,0x03,0x7f,
+0x00,0x22,0x7f,0x32,0x7e,0x00,0x12,0x37,0x54,0x90,0x97,0x63,0xe4,0x75,0xf0,0x01,
+0x12,0x42,0x81,0x80,0xc6,0x90,0x97,0x35,0xe0,0x90,0x96,0xed,0xf0,0x22,0xef,0x70,
+0x02,0x81,0x14,0x90,0x96,0xed,0xe0,0x60,0x02,0xe1,0xdf,0x90,0x96,0xd9,0x12,0x43,
+0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x96,
+0x85,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x44,0x7e,0x08,0x12,0x2f,
+0xd9,0x90,0x96,0x89,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x5c,0x7e,
+0x08,0x12,0x2f,0xd9,0x90,0x96,0x8d,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,
+0x7f,0x6c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x96,0x91,0x12,0x43,0x53,0x90,0x80,0x85,
+0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x96,0x95,0x12,0x43,0x53,
+0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x74,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x96,0x99,
+0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x0e,0x12,0x2f,0xd9,
+0x90,0x96,0x9d,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x7c,0x7e,0x0e,
+0x12,0x2f,0xd9,0x90,0x96,0xa1,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,
+0x80,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x96,0xa5,0x12,0x43,0x53,0x90,0x80,0x85,0x12,
+0x2a,0x7f,0x7f,0x84,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x96,0xa9,0x12,0x43,0x53,0x90,
+0x80,0x85,0x12,0x2a,0x7f,0x7f,0x88,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x96,0xad,0x12,
+0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,
+0x96,0xb1,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xd0,0x7e,0x0e,0x12,
+0x2f,0xd9,0x90,0x96,0xb5,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xd4,
+0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x96,0xb9,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,
+0x7f,0x7f,0xd8,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x96,0xbd,0x12,0x43,0x53,0x90,0x80,
+0x85,0x12,0x2a,0x7f,0x7f,0xdc,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x96,0xc1,0x12,0x43,
+0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xe0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x96,
+0xc5,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xec,0x7e,0x0e,0x12,0x2f,
+0xd9,0x90,0x96,0xc9,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,
+0x0c,0x12,0x2f,0xd9,0x90,0x96,0xcd,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,
+0x7f,0x04,0x7e,0x0d,0x12,0x2f,0xd9,0x90,0x96,0xd1,0x12,0x43,0x53,0x90,0x80,0x85,
+0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f,0xd9,0x90,0x96,0xd5,0x12,0x43,0x53,
+0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x96,0xed,
+0x74,0x01,0xf0,0x22,0x90,0x96,0xed,0xe0,0x64,0x01,0x60,0x02,0xe1,0xdf,0x7f,0x8c,
+0x7e,0x08,0x12,0x27,0xde,0x90,0x96,0xd9,0x12,0x2a,0x7f,0x7f,0x44,0x7e,0x08,0x12,
+0x27,0xde,0x90,0x96,0x85,0x12,0x2a,0x7f,0x7f,0x5c,0x7e,0x08,0x12,0x27,0xde,0x90,
+0x96,0x89,0x12,0x2a,0x7f,0x7f,0x6c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x96,0x8d,0x12,
+0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12,0x27,0xde,0x90,0x96,0x91,0x12,0x2a,0x7f,0x7f,
+0x74,0x7e,0x0e,0x12,0x27,0xde,0x90,0x96,0x95,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x0e,
+0x12,0x27,0xde,0x90,0x96,0x99,0x12,0x2a,0x7f,0x7f,0x7c,0x7e,0x0e,0x12,0x27,0xde,
+0x90,0x96,0x9d,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x0e,0x12,0x27,0xde,0x90,0x96,0xa1,
+0x12,0x2a,0x7f,0x7f,0x84,0x7e,0x0e,0x12,0x27,0xde,0x90,0x96,0xa5,0x12,0x2a,0x7f,
+0x7f,0x88,0x7e,0x0e,0x12,0x27,0xde,0x90,0x96,0xa9,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,
+0x0e,0x12,0x27,0xde,0x90,0x96,0xad,0x12,0x2a,0x7f,0x7f,0xd0,0x7e,0x0e,0x12,0x27,
+0xde,0x90,0x96,0xb1,0x12,0x2a,0x7f,0x7f,0xd4,0x7e,0x0e,0x12,0x27,0xde,0x90,0x96,
+0xb5,0x12,0x2a,0x7f,0x7f,0xd8,0x7e,0x0e,0x12,0x27,0xde,0x90,0x96,0xb9,0x12,0x2a,
+0x7f,0x7f,0xdc,0x7e,0x0e,0x12,0x27,0xde,0x90,0x96,0xbd,0x12,0x2a,0x7f,0x7f,0xe0,
+0x7e,0x0e,0x12,0x27,0xde,0x90,0x96,0xc1,0x12,0x2a,0x7f,0x7f,0xec,0x7e,0x0e,0x12,
+0x27,0xde,0x90,0x96,0xc5,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,
+0x96,0xc9,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x27,0xde,0x90,0x96,0xcd,0x12,
+0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde,0x90,0x96,0xd1,0x12,0x2a,0x7f,0x7f,
+0x04,0x7e,0x08,0x12,0x27,0xde,0x90,0x96,0xd5,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x08,
+0x12,0x27,0xde,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,0x12,0x43,0x53,0xed,
+0x44,0xc0,0xfd,0xec,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,0x12,0x43,0x53,
+0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,
+0x12,0x2a,0x8b,0x00,0x01,0x00,0x00,0x7f,0x44,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,
+0x85,0x12,0x2a,0x8b,0x00,0xdb,0x25,0xa4,0x7f,0x5c,0x7e,0x08,0x12,0x2f,0xd9,0x90,
+0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0x6c,0x7e,0x0e,0x12,0x2f,0xd9,
+0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0x70,0x7e,0x0e,0x12,0x2f,
+0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x74,0x7e,0x0e,0x12,
+0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x78,0x7e,0x0e,
+0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x7c,0x7e,
+0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x80,
+0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x63,0xdb,0x25,0xa4,0x7f,
+0x84,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,
+0x7f,0x88,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,
+0xa4,0x7f,0x8c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,
+0x25,0xa4,0x7f,0xd0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,
+0xdb,0x25,0xa4,0x7f,0xd4,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,
+0x20,0xdb,0x25,0xa4,0x7f,0xd8,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,
+0x8b,0x00,0x1b,0x25,0xa4,0x7f,0xdc,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,
+0x2a,0x8b,0x00,0x1b,0x25,0xa4,0x7f,0xe0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,
+0x12,0x2a,0x8b,0x24,0xdb,0x25,0xa4,0x7f,0xec,0x7e,0x0e,0x12,0x2f,0xd9,0x7f,0x04,
+0x7e,0x0c,0x12,0x27,0xde,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,0x12,0x43,
+0x53,0xe4,0xff,0xec,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,0x12,0x43,0x53,
+0xef,0x44,0x11,0xff,0xec,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,0x12,0x43,
+0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x7f,0x04,
+0x7e,0x0d,0x12,0x27,0xde,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,0x12,0x43,
+0x53,0xef,0x54,0xf0,0xff,0xec,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,0x12,
+0x43,0x53,0xef,0x44,0x01,0xff,0xec,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,
+0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x2f,0xd9,
+0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,
+0x12,0x43,0x53,0xe4,0xff,0xec,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,0x12,
+0x43,0x53,0xef,0x44,0x11,0xff,0xec,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,
+0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f,0xd9,
+0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,
+0x12,0x43,0x53,0xed,0x54,0x0f,0xfd,0xec,0x54,0xf0,0xfc,0x90,0x97,0x5d,0x12,0x2a,
+0x7f,0x90,0x97,0x5d,0x12,0x43,0x53,0xed,0x44,0x10,0xfd,0xec,0x44,0x01,0xfc,0x90,
+0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,
+0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f,0xd9,0x7f,0x04,0x7e,0x08,0x12,0x27,0xde,0x90,
+0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,0x12,0x43,0x53,0xef,0x54,0xf0,0xff,0xec,
+0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,0x12,0x43,0x53,0xef,0x44,0x01,0xff,
+0xec,0x90,0x97,0x5d,0x12,0x2a,0x7f,0x90,0x97,0x5d,0x12,0x43,0x53,0x90,0x80,0x85,
+0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08,0x12,0x2f,0xd9,0xe4,0x90,0x96,0xed,0xf0,0x22,
+0x58,0x30,};
+
+#endif
+
+// ===================8723=========================================
+u8 Rtl8192CUFwUMC8723ImgArray[UMC8723ImgArrayLength] = {
+0xc1,0x88,0x02,0x00,0x39,0x00,0x01,0x00,0x09,0x09,0x16,0x47,0x80,0x3f,0x00,0x00,
+0x29,0x29,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x02,0x74,0xc9,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x02,0x59,0xd0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x02,0x73,0xab,0x00,0x00,0x00,0x00,0x00,0x02,0x67,0xfe,0x00,0x00,
+0x05,0x04,0x03,0x02,0x00,0x03,0x06,0x05,0x04,0x03,0x00,0x04,0x06,0x05,0x04,0x02,
+0x00,0x04,0x08,0x07,0x06,0x04,0x00,0x06,0x0a,0x09,0x08,0x06,0x00,0x08,0x0a,0x09,
+0x08,0x04,0x00,0x08,0x0a,0x09,0x08,0x02,0x00,0x08,0x0a,0x09,0x08,0x00,0x00,0x08,
+0x12,0x11,0x10,0x08,0x00,0x10,0x1a,0x19,0x18,0x10,0x00,0x18,0x22,0x21,0x20,0x18,
+0x00,0x20,0x22,0x21,0x20,0x10,0x00,0x20,0x22,0x21,0x20,0x08,0x00,0x20,0x22,0x21,
+0x1c,0x08,0x00,0x20,0x22,0x21,0x14,0x08,0x00,0x20,0x22,0x20,0x18,0x08,0x00,0x20,
+0x31,0x30,0x20,0x10,0x00,0x30,0x31,0x30,0x18,0x00,0x00,0x30,0x31,0x2f,0x10,0x10,
+0x00,0x30,0x31,0x2c,0x10,0x10,0x00,0x30,0x31,0x28,0x10,0x00,0x00,0x30,0x31,0x20,
+0x10,0x00,0x00,0x30,0x31,0x10,0x10,0x00,0x00,0x30,0x05,0x05,0x05,0x05,0x05,0x05,
+0x05,0x07,0x07,0x07,0x08,0x0a,0x05,0x05,0x05,0x07,0x07,0x0a,0x0d,0x0e,0x05,0x05,
+0x07,0x07,0x08,0x0c,0x14,0x14,0x05,0x05,0x05,0x05,0x09,0x09,0x09,0x09,0x0c,0x0e,
+0x13,0x13,0x09,0x09,0x0a,0x0b,0x0d,0x11,0x13,0x13,0x09,0x09,0x09,0x09,0x0c,0x14,
+0x15,0x15,0x05,0x05,0x05,0x05,0x05,0x05,0x05,0x06,0x06,0x06,0x06,0x06,0x05,0x05,
+0x05,0x06,0x06,0x06,0x06,0x06,0x05,0x05,0x06,0x06,0x06,0x06,0x06,0x06,0x05,0x05,
+0x05,0x05,0x09,0x09,0x09,0x09,0x0b,0x0d,0x10,0x12,0x05,0x09,0x0a,0x0c,0x0d,0x0e,
+0x10,0x12,0x09,0x09,0x0e,0x0e,0x10,0x10,0x12,0x12,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x24,0x26,0x2a,0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a,0x00,0x00,
+0x00,0x1f,0x23,0x28,0x2a,0x2c,0x00,0x04,0x00,0x04,0x00,0x08,0x00,0x10,0x00,0x18,
+0x00,0x24,0x00,0x30,0x00,0x48,0x00,0x60,0x00,0x90,0x00,0xc0,0x00,0xd8,0x00,0x50,
+0x00,0x78,0x00,0xa0,0x00,0xc8,0x01,0x40,0x01,0x90,0x01,0xe0,0x02,0x30,0x01,0x2c,
+0x01,0x40,0x01,0xe0,0x02,0xd0,0x03,0xe8,0x04,0xb0,0x06,0x40,0x07,0xd0,0x00,0x02,
+0x00,0x02,0x00,0x04,0x00,0x08,0x00,0x0c,0x00,0x12,0x00,0x18,0x00,0x24,0x00,0x30,
+0x00,0x48,0x00,0x60,0x00,0x6c,0x00,0x28,0x00,0x3c,0x00,0x50,0x00,0x64,0x00,0xa0,
+0x00,0xc8,0x00,0xf0,0x01,0x18,0x00,0x64,0x00,0xa0,0x00,0xf0,0x01,0x68,0x01,0xf4,
+0x02,0x58,0x03,0x20,0x03,0xe8,0x00,0x00,0x00,0x00,0x01,0x02,0x03,0x04,0x05,0x06,
+0x07,0x08,0x01,0x02,0x03,0x04,0x08,0x0f,0x23,0x3c,0x05,0x06,0x07,0x0f,0x19,0x32,
+0x4b,0x64,0x01,0x01,0x01,0x01,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x01,0x02,
+0x03,0x04,0x05,0x06,0x07,0x08,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x22,0x1f,
+0x1e,0x18,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x8f,0x17,0x74,0x42,0x90,0x01,0xc4,0xf0,0xa3,0x74,0x20,0xf0,0x74,0x84,0x25,0x17,
+0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,0x7f,0x90,0x97,0x54,0xf0,0xe0,0xfb,
+0x54,0x1f,0xff,0xa3,0xf0,0xe5,0x17,0x75,0xf0,0x08,0xa4,0x24,0x67,0xf5,0x82,0xe4,
+0x34,0x93,0xf5,0x83,0xe0,0xfe,0x90,0x97,0x57,0xf0,0xe5,0x17,0x25,0xe0,0x24,0x81,
+0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0xfd,0xa3,0xe0,0x90,0x97,0x58,0xcd,0xf0,
+0xa3,0xed,0xf0,0xe5,0x17,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,
+0xe0,0xfd,0xa3,0xe0,0x90,0x97,0x5a,0xcd,0xf0,0xa3,0xed,0xf0,0xef,0xc3,0x9e,0x40,
+0x03,0x02,0x43,0x56,0x90,0x01,0xc5,0x74,0x20,0xf0,0x90,0x97,0x55,0xe0,0xff,0x74,
+0xa5,0x25,0x17,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xef,0xf0,0xef,0x04,0x90,0x97,
+0x56,0xf0,0x90,0x97,0x57,0xe0,0xff,0x90,0x97,0x56,0xe0,0xfe,0xd3,0x9f,0x40,0x03,
+0x02,0x43,0xa0,0xee,0xc3,0x94,0x10,0x40,0x21,0xee,0x24,0xf0,0xff,0x74,0x01,0x7e,
+0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x97,
+0x58,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x70,0x27,0x90,0x97,0x56,0xe0,0xff,0xc3,
+0x94,0x10,0x50,0x59,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,
+0x33,0xce,0xd8,0xf9,0xff,0x90,0x97,0x5a,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,
+0x3c,0x90,0x97,0x56,0xe0,0xb4,0x11,0x0d,0x90,0x97,0x59,0xe0,0x30,0xe7,0x06,0x90,
+0x97,0x56,0x74,0x17,0xf0,0x90,0x97,0x56,0xe0,0xff,0x64,0x13,0x60,0x04,0xef,0xb4,
+0x12,0x0d,0x90,0x97,0x58,0xe0,0x30,0xe0,0x06,0x90,0x97,0x56,0x74,0x18,0xf0,0x90,
+0x97,0x56,0xe0,0x90,0x97,0x55,0xf0,0x90,0x97,0x54,0xf0,0x80,0x53,0x90,0x97,0x56,
+0xe0,0x04,0xf0,0x02,0x42,0xb2,0x90,0x97,0x57,0xe0,0xf9,0x90,0x97,0x55,0xe0,0xff,
+0x69,0x60,0x03,0x02,0x43,0xe8,0x90,0x01,0xc5,0x74,0x40,0xf0,0x74,0xa5,0x25,0x17,
+0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xef,0xf0,0xe5,0x17,0x75,0xf0,0x08,0xa4,0x24,
+0x69,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xb4,0x01,0x14,0xeb,0x30,0xe6,0x06,
+0x90,0x97,0x54,0xe0,0xff,0x22,0x90,0x97,0x55,0xe0,0x44,0x40,0x90,0x97,0x54,0xf0,
+0x90,0x97,0x55,0xe0,0xff,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,
+0xe4,0x93,0xfc,0x74,0x01,0x93,0xfd,0xef,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,
+0x41,0xf5,0x83,0x74,0x01,0x93,0x2d,0xff,0xe4,0x93,0x3c,0xc3,0x13,0xfe,0xef,0x13,
+0xff,0xe4,0xfc,0xfd,0xe5,0x17,0x25,0xe0,0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,
+0x92,0xf5,0x83,0x12,0x1d,0xa9,0x80,0x71,0x90,0x97,0x55,0xe0,0xd3,0x99,0x40,0x69,
+0x90,0x01,0xc5,0x74,0x60,0xf0,0x90,0x97,0x57,0xe0,0xff,0x74,0xa5,0x25,0x17,0xf5,
+0x82,0xe4,0x34,0x96,0xf5,0x83,0xef,0xf0,0x90,0x97,0x55,0xef,0xf0,0x90,0x97,0x54,
+0xf0,0xfb,0xa3,0xe0,0xff,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,
+0xe4,0x93,0xfc,0x74,0x01,0x93,0xfd,0xef,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,
+0x41,0xf5,0x83,0x74,0x01,0x93,0x2d,0xff,0xe4,0x93,0x3c,0xc3,0x13,0xfe,0xef,0x13,
+0xff,0xe4,0xfc,0xfd,0xe5,0x17,0x25,0xe0,0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,
+0x92,0xf5,0x83,0x12,0x1d,0xa9,0xaf,0x03,0x22,0x74,0x01,0x25,0x17,0xf5,0x82,0xe4,
+0x34,0x92,0xf5,0x83,0xe4,0xf0,0x90,0x97,0x54,0xe0,0x44,0x80,0xff,0x74,0x84,0x25,
+0x17,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xef,0xf0,0x22,0xef,0x14,0x60,0x20,0x14,
+0x60,0x4b,0x24,0x02,0x70,0x78,0x90,0x97,0x69,0x74,0x02,0xf0,0x90,0x00,0x48,0xe0,
+0x44,0x0c,0xf0,0x90,0x00,0x47,0xe0,0x44,0x08,0xf0,0x90,0x00,0x45,0x80,0x5b,0xe4,
+0x90,0x97,0x69,0xf0,0x90,0x97,0x65,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,
+0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x80,0x7e,0x08,0x12,0x33,0xd8,0x90,
+0x00,0x45,0xe0,0x44,0xef,0xf0,0xe0,0x54,0xef,0xf0,0xa3,0x80,0x2d,0x90,0x97,0x69,
+0x74,0x01,0xf0,0x90,0x97,0x6f,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,
+0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x80,0x7e,0x08,0x12,0x33,0xd8,0x90,0x00,
+0x45,0xe0,0x44,0x20,0xf0,0xe0,0x44,0x10,0xf0,0xa3,0xe0,0x44,0x10,0xf0,0x22,0xe4,
+0xf5,0x61,0x22,0x02,0x7f,0x69,0x02,0x7f,0x70,0x74,0x45,0x90,0x01,0xc4,0xf0,0xa3,
+0x74,0x09,0xf0,0xe4,0x90,0x97,0x3a,0xf0,0x90,0x97,0x3a,0xe0,0xff,0xc3,0x94,0x20,
+0x40,0x03,0x02,0x4e,0x3a,0xef,0x75,0xf0,0x08,0xa4,0x24,0x6a,0xf5,0x82,0xe4,0x34,
+0x93,0xf5,0x83,0xe0,0x64,0x01,0x60,0x03,0x02,0x4e,0x31,0x90,0x97,0x3a,0xe0,0x25,
+0xe0,0x24,0xc0,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xe0,0xfc,0xa3,0xe0,0xd3,0x94,
+0x00,0xec,0x94,0x00,0x50,0x03,0x02,0x4e,0x31,0xef,0x75,0xf0,0x0a,0xa4,0x24,0x00,
+0xf9,0x74,0x90,0x35,0xf0,0xfa,0x7b,0x01,0x8b,0x13,0xf5,0x14,0x89,0x15,0x90,0x97,
+0x3a,0xe0,0x25,0xe0,0x24,0xc0,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xe0,0xfd,0xa3,
+0xe0,0x90,0x97,0x46,0xcd,0xf0,0xa3,0xed,0xf0,0xef,0x25,0xe0,0x24,0x63,0xf5,0x82,
+0xe4,0x34,0x94,0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90,0x97,0x48,0xcf,0xf0,0xa3,0xef,
+0xf0,0x90,0x00,0x02,0x12,0x66,0x20,0xff,0xae,0xf0,0x12,0x65,0xf5,0x2f,0xff,0xe5,
+0xf0,0x3e,0x90,0x97,0x4f,0xf0,0xa3,0xef,0xf0,0x90,0x00,0x06,0x12,0x66,0x20,0xff,
+0xae,0xf0,0x90,0x00,0x04,0x12,0x66,0x20,0x2f,0xff,0xe5,0xf0,0x3e,0x90,0x97,0x4d,
+0xf0,0xa3,0xef,0xf0,0x90,0x00,0x08,0x12,0x66,0x20,0xff,0x90,0x97,0x4b,0xe5,0xf0,
+0xf0,0xa3,0xef,0xf0,0x90,0x97,0x3a,0xe0,0xfe,0x24,0x84,0xf5,0x82,0xe4,0x34,0x04,
+0xf5,0x83,0xe0,0x54,0x3f,0x90,0x97,0x3c,0xf0,0xe0,0xfd,0x54,0x1f,0xa3,0xf0,0xee,
+0x75,0xf0,0x08,0xa4,0x24,0x67,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0x90,0x97,
+0x51,0xf0,0x90,0x97,0x3a,0xe0,0xfb,0x24,0x64,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,
+0xe0,0xc3,0x94,0x05,0x40,0x03,0x02,0x49,0xc2,0x90,0x97,0x51,0xe0,0xfe,0x90,0x97,
+0x3d,0xe0,0x9e,0x40,0x13,0x90,0x97,0x51,0xe0,0x90,0x97,0x3d,0xf0,0xed,0x54,0x40,
+0xfd,0x90,0x97,0x3c,0xf0,0xee,0x4d,0xf0,0x90,0x04,0xfd,0xe0,0x64,0x01,0x70,0x28,
+0x90,0x97,0x3d,0xe0,0xff,0x90,0x41,0x4a,0x93,0xfe,0x74,0x23,0x2b,0xf5,0x82,0xe4,
+0x34,0x95,0xf5,0x83,0xe0,0xc3,0x9e,0x40,0x06,0xef,0x90,0x41,0x12,0x80,0x32,0x90,
+0x97,0x3d,0xe0,0x90,0x41,0x2e,0x80,0x29,0x90,0x97,0x3d,0xe0,0xff,0x90,0x41,0x4a,
+0x93,0xfe,0x90,0x97,0x3a,0xe0,0x24,0x23,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,
+0xc3,0x9e,0x40,0x06,0xef,0x90,0x40,0xda,0x80,0x07,0x90,0x97,0x3d,0xe0,0x90,0x40,
+0xf6,0x93,0x90,0x97,0x4a,0xf0,0x90,0x97,0x4a,0xe0,0x75,0xf0,0x06,0xa4,0x24,0x50,
+0xf9,0x74,0x40,0x35,0xf0,0x75,0x10,0xff,0xf5,0x11,0x89,0x12,0x90,0x97,0x3c,0xe0,
+0x90,0x41,0xf2,0x93,0xff,0xd3,0x90,0x97,0x49,0xe0,0x9f,0x90,0x97,0x48,0xe0,0x94,
+0x00,0x40,0x0d,0x90,0x97,0x3a,0xe0,0xff,0xe4,0xfd,0x12,0x5f,0x6d,0x02,0x4d,0xc7,
+0x90,0x97,0x3a,0xe0,0x25,0xe0,0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5,
+0x83,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x97,0x3e,0x12,
+0x1d,0xa9,0x90,0x97,0x3e,0xe0,0xf8,0xa3,0xe0,0xf9,0xa3,0xe0,0xfa,0xa3,0xe0,0xfb,
+0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xab,0x10,0xaa,0x11,0xa9,0x12,0x12,0x1c,
+0xd6,0xff,0x7e,0x00,0xab,0x13,0xaa,0x14,0xa9,0x15,0x12,0x65,0xf5,0xfd,0xac,0xf0,
+0x12,0x1d,0x1c,0xe4,0xfc,0xfd,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xeb,0x2f,
+0xff,0xea,0x3e,0xfe,0xed,0x39,0xfd,0xec,0x38,0xfc,0x90,0x97,0x3e,0x12,0x1d,0xa9,
+0x90,0x97,0x3e,0xe0,0xf8,0xa3,0xe0,0xf9,0xa3,0xe0,0xfa,0xa3,0xe0,0xfb,0xc0,0x00,
+0xc0,0x01,0xc0,0x02,0xc0,0x03,0xab,0x10,0xaa,0x11,0xa9,0x12,0x90,0x00,0x01,0x12,
+0x1c,0xef,0xff,0x7e,0x00,0xab,0x13,0xaa,0x14,0xa9,0x15,0x90,0x00,0x02,0x12,0x66,
+0x20,0xfd,0xac,0xf0,0x12,0x1d,0x1c,0xe4,0xfc,0xfd,0xd0,0x03,0xd0,0x02,0xd0,0x01,
+0xd0,0x00,0xeb,0x2f,0xff,0xea,0x3e,0xfe,0xed,0x39,0xfd,0xec,0x38,0xfc,0x90,0x97,
+0x3e,0x12,0x1d,0xa9,0x90,0x97,0x3e,0xe0,0xf8,0xa3,0xe0,0xf9,0xa3,0xe0,0xfa,0xa3,
+0xe0,0xfb,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xab,0x10,0xaa,0x11,0xa9,0x12,
+0x90,0x00,0x02,0x12,0x1c,0xef,0xff,0x7e,0x00,0xab,0x13,0xaa,0x14,0xa9,0x15,0x90,
+0x00,0x04,0x12,0x66,0x20,0xfd,0xac,0xf0,0x12,0x1d,0x1c,0xe4,0xfc,0xfd,0xd0,0x03,
+0xd0,0x02,0xd0,0x01,0xd0,0x00,0xeb,0x2f,0xff,0xea,0x3e,0xfe,0xed,0x39,0xfd,0xec,
+0x38,0xfc,0x90,0x97,0x3e,0x12,0x1d,0xa9,0x90,0x97,0x3e,0xe0,0xf8,0xa3,0xe0,0xf9,
+0xa3,0xe0,0xfa,0xa3,0xe0,0xfb,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xab,0x10,
+0xaa,0x11,0xa9,0x12,0x90,0x00,0x03,0x12,0x1c,0xef,0xff,0x7e,0x00,0xab,0x13,0xaa,
+0x14,0xa9,0x15,0x90,0x00,0x06,0x12,0x66,0x20,0xfd,0xac,0xf0,0x12,0x1d,0x1c,0xe4,
+0xfc,0xfd,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xeb,0x2f,0xff,0xea,0x3e,0xfe,
+0xed,0x39,0xfd,0xec,0x38,0xfc,0x90,0x97,0x3e,0x12,0x1d,0xa9,0x90,0x97,0x3e,0xe0,
+0xf8,0xa3,0xe0,0xf9,0xa3,0xe0,0xfa,0xa3,0xe0,0xfb,0xc0,0x00,0xc0,0x01,0xc0,0x02,
+0xc0,0x03,0xab,0x10,0xaa,0x11,0xa9,0x12,0x90,0x00,0x04,0x12,0x1c,0xef,0xff,0x7e,
+0x00,0xab,0x13,0xaa,0x14,0xa9,0x15,0x90,0x00,0x08,0x12,0x66,0x20,0xfd,0xac,0xf0,
+0x12,0x1d,0x1c,0xe4,0xfc,0xfd,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xeb,0x2f,
+0xff,0xea,0x3e,0xfe,0xed,0x39,0xfd,0xec,0x38,0xfc,0x90,0x97,0x3e,0x12,0x1d,0xa9,
+0xab,0x10,0xaa,0x11,0xa9,0x12,0x90,0x00,0x05,0x12,0x1c,0xef,0xff,0x7e,0x00,0x90,
+0x97,0x46,0xe0,0xfc,0xa3,0xe0,0xfd,0x12,0x1d,0x1c,0xe4,0xfc,0xfd,0x90,0x97,0x3e,
+0xe0,0xf8,0xa3,0xe0,0xf9,0xa3,0xe0,0xfa,0xa3,0xe0,0xfb,0xd3,0x12,0x66,0xa4,0x90,
+0x97,0x3e,0x40,0x50,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0xc0,
+0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0xab,0x10,0xaa,0x11,0xa9,0x12,0x90,0x00,0x05,
+0x12,0x1c,0xef,0xff,0x7e,0x00,0x90,0x97,0x46,0xe0,0xfc,0xa3,0xe0,0xfd,0x12,0x1d,
+0x1c,0xab,0x07,0xaa,0x06,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xc3,0xef,0x9b,
+0xff,0xee,0x9a,0xfe,0xed,0x94,0x00,0xfd,0xec,0x94,0x00,0xfc,0x90,0x97,0x3e,0x12,
+0x1d,0xa9,0x80,0x07,0x12,0x1d,0xb5,0x00,0x00,0x00,0x00,0x90,0x97,0x3e,0xe0,0xfc,
+0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x97,0x3a,0xe0,0x25,0xe0,0x25,
+0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0x12,0x1d,0xa9,0x90,0x97,0x3c,
+0xe0,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,
+0x01,0x93,0xff,0xe4,0xfc,0xfd,0x90,0x97,0x3e,0xe0,0xf8,0xa3,0xe0,0xf9,0xa3,0xe0,
+0xfa,0xa3,0xe0,0xfb,0xd3,0x12,0x66,0xa4,0x40,0x0b,0x90,0x97,0x3a,0xe0,0xff,0x12,
+0x42,0x20,0x02,0x4d,0x3e,0x90,0x97,0x3c,0xe0,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,
+0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xe4,0xfc,0xfd,0x90,0x97,
+0x3e,0xe0,0xf8,0xa3,0xe0,0xf9,0xa3,0xe0,0xfa,0xa3,0xe0,0xfb,0xc3,0x12,0x66,0xa4,
+0x40,0x03,0x02,0x4d,0x3e,0x90,0x97,0x3a,0xe0,0xff,0x7d,0x01,0x12,0x5f,0x6d,0x02,
+0x4d,0x3e,0x90,0x97,0x3a,0xe0,0xff,0x24,0x64,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,
+0xe0,0x64,0x05,0x60,0x03,0x02,0x4b,0x8e,0x90,0x04,0xb3,0xe0,0x64,0x01,0x70,0x03,
+0x02,0x4b,0x8e,0x90,0x93,0x62,0xe0,0xfe,0xb4,0x03,0x0b,0x90,0x97,0x3d,0xe0,0xc3,
+0x94,0x19,0x40,0x3d,0x80,0x2e,0xee,0xb4,0x02,0x0b,0x90,0x97,0x3d,0xe0,0xc3,0x94,
+0x11,0x40,0x2e,0x80,0x1f,0x90,0x93,0x62,0xe0,0xfe,0xb4,0x01,0x0b,0x90,0x97,0x3d,
+0xe0,0xc3,0x94,0x0a,0x40,0x1b,0x80,0x0c,0xee,0x70,0x11,0x90,0x97,0x3d,0xe0,0xc3,
+0x94,0x03,0x40,0x0d,0x90,0x95,0x43,0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x95,0x43,
+0xf0,0x74,0x23,0x2f,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xff,0xc3,0x94,0x30,
+0x50,0x03,0x02,0x4b,0x2d,0x90,0x95,0x43,0xe0,0x64,0x01,0x60,0x03,0x02,0x4b,0x2d,
+0x90,0x97,0x3a,0xe0,0x24,0x44,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0x64,0x0a,
+0x60,0x56,0x90,0x97,0x3a,0xe0,0xfe,0xef,0x24,0x05,0xfd,0xe4,0x33,0xfc,0x74,0x21,
+0x2e,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0xff,0xd3,0x9d,0xec,0x64,0x80,0xf8,
+0x74,0x80,0x98,0x50,0x33,0xef,0x24,0x05,0xfd,0xe4,0x33,0xfc,0x74,0x23,0x2e,0xf5,
+0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xd3,0x9d,0xec,0x64,0x80,0xf8,0x74,0x80,0x98,
+0x50,0x16,0x90,0x97,0x3a,0xe0,0x24,0x84,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe0,
+0xff,0x90,0x97,0x3d,0xe0,0x6f,0x60,0x56,0x90,0x97,0x3a,0xe0,0x24,0x23,0xf5,0x82,
+0xe4,0x34,0x95,0xf5,0x83,0xe0,0xff,0xd3,0x94,0x46,0x40,0x08,0x90,0x97,0x52,0x74,
+0x05,0xf0,0x80,0x11,0xef,0xd3,0x94,0x3c,0x90,0x97,0x52,0x40,0x05,0x74,0x03,0xf0,
+0x80,0x03,0x74,0x01,0xf0,0x90,0x97,0x3a,0xe0,0xff,0x24,0x23,0xf5,0x82,0xe4,0x34,
+0x95,0xf5,0x83,0xe0,0xfe,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xee,
+0xf0,0x90,0x97,0x3a,0xe0,0x24,0x44,0xf5,0x82,0xe4,0x34,0x95,0x80,0x2f,0x90,0x97,
+0x3a,0xe0,0xff,0x24,0x64,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe4,0xf0,0x74,0x44,
+0x2f,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0x04,0xf0,0x80,0x14,0xe4,0x90,0x97,
+0x52,0xf0,0x90,0x97,0x3a,0xe0,0x24,0x64,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe4,
+0xf0,0x90,0x97,0x3d,0xe0,0xff,0x90,0x97,0x3a,0xe0,0xfe,0x24,0x84,0xf5,0x82,0xe4,
+0x34,0x96,0xf5,0x83,0xef,0xf0,0xee,0x30,0xe0,0x1e,0x90,0x97,0x52,0xe0,0xc4,0x54,
+0xf0,0xf0,0x90,0x97,0x3a,0xe0,0xc3,0x13,0xff,0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04,
+0xf5,0x83,0xe0,0x54,0x0f,0x02,0x4d,0x21,0x90,0x97,0x3a,0xe0,0xc3,0x13,0xff,0x24,
+0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,0xf0,0x02,0x4d,0x21,0x90,0x97,
+0x3a,0xe0,0x24,0x64,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe0,0x64,0x06,0x60,0x03,
+0x02,0x4d,0x3e,0x90,0x04,0xb3,0xe0,0x64,0x01,0x70,0x03,0x02,0x4d,0x3e,0x90,0x97,
+0x3e,0x12,0x1d,0xb5,0x00,0x00,0x00,0x00,0x90,0x42,0x13,0xe4,0x93,0xff,0x7e,0x00,
+0x90,0x97,0x46,0xe0,0xfc,0xa3,0xe0,0xfd,0x12,0x1d,0x1c,0xe4,0xfc,0xfd,0x90,0x97,
+0x42,0x12,0x1d,0xa9,0xe4,0x90,0x97,0x3b,0xf0,0x90,0x97,0x3e,0xe0,0xf8,0xa3,0xe0,
+0xf9,0xa3,0xe0,0xfa,0xa3,0xe0,0xfb,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xab,
+0x13,0xaa,0x14,0xa9,0x15,0x90,0x97,0x3b,0xe0,0xff,0x75,0xf0,0x02,0xa4,0xf5,0x82,
+0x85,0xf0,0x83,0x12,0x66,0x20,0xfd,0xac,0xf0,0xef,0x90,0x42,0x0e,0x93,0xff,0x7e,
+0x00,0x12,0x1d,0x1c,0xe4,0xfc,0xfd,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xeb,
+0x2f,0xff,0xea,0x3e,0xfe,0xed,0x39,0xfd,0xec,0x38,0xfc,0x90,0x97,0x3e,0x12,0x1d,
+0xa9,0x90,0x97,0x42,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,
+0x97,0x3e,0xe0,0xf8,0xa3,0xe0,0xf9,0xa3,0xe0,0xfa,0xa3,0xe0,0xfb,0xd3,0x12,0x66,
+0xa4,0x50,0x0e,0x90,0x97,0x3b,0xe0,0x04,0xf0,0xe0,0x64,0x05,0x60,0x03,0x02,0x4b,
+0xd9,0x90,0x97,0x3b,0xe0,0xc3,0x13,0xf0,0x90,0x97,0x52,0xe0,0xff,0xb4,0x01,0x0d,
+0x90,0x97,0x3b,0xe0,0x70,0x5d,0x90,0x97,0x52,0x04,0xf0,0x80,0x5b,0xef,0xb4,0x03,
+0x1d,0x90,0x97,0x3b,0xe0,0xff,0x70,0x08,0x90,0x97,0x52,0x74,0x03,0xf0,0x80,0x48,
+0xef,0xb4,0x01,0x08,0x90,0x97,0x52,0x74,0x01,0xf0,0x80,0x3c,0x80,0x35,0x90,0x97,
+0x52,0xe0,0x64,0x05,0x70,0x32,0x90,0x97,0x3b,0xe0,0xff,0x70,0x08,0x90,0x97,0x52,
+0x74,0x05,0xf0,0x80,0x0f,0xef,0x90,0x97,0x52,0xb4,0x01,0x05,0x74,0x03,0xf0,0x80,
+0x03,0x74,0x01,0xf0,0xd3,0x90,0x97,0x49,0xe0,0x94,0x03,0x90,0x97,0x48,0xe0,0x94,
+0x00,0x40,0x05,0xe4,0x90,0x97,0x52,0xf0,0xd3,0x90,0x97,0x49,0xe0,0x94,0x03,0x90,
+0x97,0x48,0xe0,0x94,0x00,0x40,0x05,0xe4,0x90,0x97,0x52,0xf0,0x90,0x97,0x3a,0xe0,
+0xff,0x30,0xe0,0x1a,0x90,0x97,0x52,0xe0,0xc4,0x54,0xf0,0xf0,0xef,0xc3,0x13,0xff,
+0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,0x0f,0x80,0x13,0x90,0x97,
+0x3a,0xe0,0xc3,0x13,0xff,0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,
+0xf0,0xf0,0x74,0xa4,0x2f,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xc0,0x83,0xc0,0x82,
+0xe0,0xff,0x90,0x97,0x52,0xe0,0xfe,0xef,0x4e,0xd0,0x82,0xd0,0x83,0xf0,0x90,0x97,
+0x3a,0xe0,0xff,0x24,0x64,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe0,0xd3,0x94,0x05,
+0x50,0x0f,0x74,0x64,0x2f,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe0,0x04,0xf0,0x80,
+0x0f,0x90,0x97,0x3a,0xe0,0x24,0x64,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe4,0xf0,
+0x90,0x97,0x3a,0xe0,0xff,0x24,0x84,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,
+0x1f,0xc3,0x94,0x09,0x50,0x05,0x90,0x92,0x00,0x80,0x11,0x74,0x84,0x2f,0xf5,0x82,
+0xe4,0x34,0x04,0xf5,0x83,0xe0,0x90,0x92,0x00,0x20,0xe2,0x05,0x74,0x08,0xf0,0x80,
+0x03,0x74,0x04,0xf0,0x90,0x97,0x3a,0xe0,0x60,0x0d,0x90,0x96,0xa4,0xe0,0xff,0x90,
+0x92,0x00,0xe0,0xc3,0x9f,0x50,0x08,0x90,0x92,0x00,0xe0,0x90,0x96,0xa4,0xf0,0x90,
+0x96,0xa4,0xe0,0x90,0x04,0x80,0xf0,0xab,0x13,0xaa,0x14,0xa9,0x15,0xe4,0xf5,0xf0,
+0x12,0x66,0x58,0xab,0x13,0xaa,0x14,0xa9,0x15,0x90,0x00,0x02,0xe4,0xf5,0xf0,0x12,
+0x66,0x77,0x90,0x00,0x04,0xe4,0xf5,0xf0,0x12,0x66,0x77,0x90,0x00,0x06,0xe4,0xf5,
+0xf0,0x12,0x66,0x77,0x90,0x00,0x08,0xe4,0xf5,0xf0,0x12,0x66,0x77,0x90,0x97,0x3a,
+0xe0,0xff,0x25,0xe0,0x24,0xc0,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xe4,0xf0,0xa3,
+0xf0,0xef,0x25,0xe0,0x24,0x63,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xa3,
+0xf0,0xef,0x25,0xe0,0x24,0xa3,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xa3,
+0xf0,0x90,0x97,0x3a,0xe0,0x04,0xf0,0x02,0x45,0x18,0x22,0xef,0x70,0x03,0x02,0x50,
+0xa3,0x90,0x97,0x2d,0xe0,0x60,0x03,0x02,0x54,0xe5,0x90,0x97,0x19,0xe0,0xfc,0xa3,
+0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x8c,
+0x7e,0x08,0x12,0x33,0xd8,0x90,0x96,0xc5,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,
+0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x44,0x7e,0x08,0x12,0x33,0xd8,
+0x90,0x96,0xc9,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,
+0x56,0x12,0x1d,0xa9,0x7f,0x5c,0x7e,0x08,0x12,0x33,0xd8,0x90,0x96,0xcd,0xe0,0xfc,
+0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,
+0x6c,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x96,0xd1,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,
+0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x70,0x7e,0x0e,0x12,0x33,
+0xd8,0x90,0x96,0xd5,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,
+0x81,0x56,0x12,0x1d,0xa9,0x7f,0x74,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x96,0xd9,0xe0,
+0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,
+0x7f,0x78,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x96,0xdd,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,
+0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x7c,0x7e,0x0e,0x12,
+0x33,0xd8,0x90,0x96,0xe1,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,
+0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x80,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x96,0xe5,
+0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,
+0xa9,0x7f,0x84,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x96,0xe9,0xe0,0xfc,0xa3,0xe0,0xfd,
+0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x88,0x7e,0x0e,
+0x12,0x33,0xd8,0x90,0x96,0xed,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,
+0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x8c,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x96,
+0xf1,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,
+0x1d,0xa9,0x7f,0xd0,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x96,0xf5,0xe0,0xfc,0xa3,0xe0,
+0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0xd4,0x7e,
+0x0e,0x12,0x33,0xd8,0x90,0x96,0xf9,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,
+0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0xd8,0x7e,0x0e,0x12,0x33,0xd8,0x90,
+0x96,0xfd,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,
+0x12,0x1d,0xa9,0x7f,0xdc,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x97,0x01,0xe0,0xfc,0xa3,
+0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0xe0,
+0x7e,0x0e,0x12,0x33,0xd8,0x90,0x97,0x05,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,
+0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0xec,0x7e,0x0e,0x12,0x33,0xd8,
+0x90,0x97,0x09,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,
+0x56,0x12,0x1d,0xa9,0x7f,0x04,0x7e,0x0c,0x12,0x33,0xd8,0x90,0x97,0x0d,0xe0,0xfc,
+0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,
+0x04,0x7e,0x0d,0x12,0x33,0xd8,0x90,0x97,0x11,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,
+0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x0c,0x7e,0x09,0x12,0x33,
+0xd8,0x90,0x97,0x15,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,
+0x81,0x56,0x12,0x1d,0xa9,0x7f,0x04,0x7e,0x08,0x12,0x33,0xd8,0x90,0x97,0x2d,0x74,
+0x01,0xf0,0x22,0x90,0x97,0x2d,0xe0,0x64,0x01,0x60,0x03,0x02,0x54,0xe5,0x7f,0x8c,
+0x7e,0x08,0x12,0x2b,0x13,0x90,0x97,0x19,0x12,0x1d,0xa9,0x7f,0x44,0x7e,0x08,0x12,
+0x2b,0x13,0x90,0x96,0xc5,0x12,0x1d,0xa9,0x7f,0x5c,0x7e,0x08,0x12,0x2b,0x13,0x90,
+0x96,0xc9,0x12,0x1d,0xa9,0x7f,0x6c,0x7e,0x0e,0x12,0x2b,0x13,0x90,0x96,0xcd,0x12,
+0x1d,0xa9,0x7f,0x70,0x7e,0x0e,0x12,0x2b,0x13,0x90,0x96,0xd1,0x12,0x1d,0xa9,0x7f,
+0x74,0x7e,0x0e,0x12,0x2b,0x13,0x90,0x96,0xd5,0x12,0x1d,0xa9,0x7f,0x78,0x7e,0x0e,
+0x12,0x2b,0x13,0x90,0x96,0xd9,0x12,0x1d,0xa9,0x7f,0x7c,0x7e,0x0e,0x12,0x2b,0x13,
+0x90,0x96,0xdd,0x12,0x1d,0xa9,0x7f,0x80,0x7e,0x0e,0x12,0x2b,0x13,0x90,0x96,0xe1,
+0x12,0x1d,0xa9,0x7f,0x84,0x7e,0x0e,0x12,0x2b,0x13,0x90,0x96,0xe5,0x12,0x1d,0xa9,
+0x7f,0x88,0x7e,0x0e,0x12,0x2b,0x13,0x90,0x96,0xe9,0x12,0x1d,0xa9,0x7f,0x8c,0x7e,
+0x0e,0x12,0x2b,0x13,0x90,0x96,0xed,0x12,0x1d,0xa9,0x7f,0xd0,0x7e,0x0e,0x12,0x2b,
+0x13,0x90,0x96,0xf1,0x12,0x1d,0xa9,0x7f,0xd4,0x7e,0x0e,0x12,0x2b,0x13,0x90,0x96,
+0xf5,0x12,0x1d,0xa9,0x7f,0xd8,0x7e,0x0e,0x12,0x2b,0x13,0x90,0x96,0xf9,0x12,0x1d,
+0xa9,0x7f,0xdc,0x7e,0x0e,0x12,0x2b,0x13,0x90,0x96,0xfd,0x12,0x1d,0xa9,0x7f,0xe0,
+0x7e,0x0e,0x12,0x2b,0x13,0x90,0x97,0x01,0x12,0x1d,0xa9,0x7f,0xec,0x7e,0x0e,0x12,
+0x2b,0x13,0x90,0x97,0x05,0x12,0x1d,0xa9,0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x13,0x90,
+0x97,0x09,0x12,0x1d,0xa9,0x7f,0x04,0x7e,0x0d,0x12,0x2b,0x13,0x90,0x97,0x0d,0x12,
+0x1d,0xa9,0x7f,0x0c,0x7e,0x09,0x12,0x2b,0x13,0x90,0x97,0x11,0x12,0x1d,0xa9,0x7f,
+0x04,0x7e,0x08,0x12,0x2b,0x13,0x90,0x97,0x15,0x12,0x1d,0xa9,0x7f,0x8c,0x7e,0x08,
+0x12,0x2b,0x13,0x90,0x97,0xa3,0x12,0x1d,0xa9,0x90,0x97,0xa3,0xe0,0xfc,0xa3,0xe0,
+0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0xed,0x44,0xc0,0xfd,0xec,0x90,0x97,0xa3,0x12,
+0x1d,0xa9,0x90,0x97,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,
+0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x8c,0x7e,0x08,0x12,0x33,0xd8,0x90,0x81,0x56,
+0x12,0x1d,0xb5,0x00,0x01,0x00,0x00,0x7f,0x44,0x7e,0x08,0x12,0x33,0xd8,0x90,0x81,
+0x56,0x12,0x1d,0xb5,0x00,0xdb,0x25,0xa4,0x7f,0x5c,0x7e,0x08,0x12,0x33,0xd8,0x90,
+0x81,0x56,0x12,0x1d,0xb5,0x20,0xdb,0x25,0xa4,0x7f,0x6c,0x7e,0x0e,0x12,0x33,0xd8,
+0x90,0x81,0x56,0x12,0x1d,0xb5,0x20,0xdb,0x25,0xa4,0x7f,0x70,0x7e,0x0e,0x12,0x33,
+0xd8,0x90,0x81,0x56,0x12,0x1d,0xb5,0x04,0x1b,0x25,0xa4,0x7f,0x74,0x7e,0x0e,0x12,
+0x33,0xd8,0x90,0x81,0x56,0x12,0x1d,0xb5,0x04,0x1b,0x25,0xa4,0x7f,0x78,0x7e,0x0e,
+0x12,0x33,0xd8,0x90,0x81,0x56,0x12,0x1d,0xb5,0x04,0x1b,0x25,0xa4,0x7f,0x7c,0x7e,
+0x0e,0x12,0x33,0xd8,0x90,0x81,0x56,0x12,0x1d,0xb5,0x04,0x1b,0x25,0xa4,0x7f,0x80,
+0x7e,0x0e,0x12,0x33,0xd8,0x90,0x81,0x56,0x12,0x1d,0xb5,0x63,0xdb,0x25,0xa4,0x7f,
+0x84,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x81,0x56,0x12,0x1d,0xb5,0x04,0x1b,0x25,0xa4,
+0x7f,0x88,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x81,0x56,0x12,0x1d,0xb5,0x20,0xdb,0x25,
+0xa4,0x7f,0x8c,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x81,0x56,0x12,0x1d,0xb5,0x20,0xdb,
+0x25,0xa4,0x7f,0xd0,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x81,0x56,0x12,0x1d,0xb5,0x20,
+0xdb,0x25,0xa4,0x7f,0xd4,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x81,0x56,0x12,0x1d,0xb5,
+0x20,0xdb,0x25,0xa4,0x7f,0xd8,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x81,0x56,0x12,0x1d,
+0xb5,0x00,0x1b,0x25,0xa4,0x7f,0xdc,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x81,0x56,0x12,
+0x1d,0xb5,0x00,0x1b,0x25,0xa4,0x7f,0xe0,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x81,0x56,
+0x12,0x1d,0xb5,0x24,0xdb,0x25,0xa4,0x7f,0xec,0x7e,0x0e,0x12,0x33,0xd8,0x7f,0x04,
+0x7e,0x0c,0x12,0x2b,0x13,0x90,0x97,0xa3,0x12,0x1d,0xa9,0x90,0x97,0xa3,0xe0,0xfc,
+0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xe4,0xff,0xec,0x90,0x97,0xa3,0x12,0x1d,0xa9,0x90,
+0x97,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0x44,0x11,0xff,0xec,
+0x90,0x97,0xa3,0x12,0x1d,0xa9,0x90,0x97,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,
+0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x04,0x7e,0x0c,0x12,0x33,
+0xd8,0x7f,0x04,0x7e,0x0d,0x12,0x2b,0x13,0x90,0x97,0xa3,0x12,0x1d,0xa9,0x90,0x97,
+0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0x54,0xf0,0xff,0xec,0x90,
+0x97,0xa3,0x12,0x1d,0xa9,0x90,0x97,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,
+0xa3,0xe0,0x44,0x01,0xff,0xec,0x90,0x97,0xa3,0x12,0x1d,0xa9,0x90,0x97,0xa3,0xe0,
+0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,
+0x7f,0x04,0x7e,0x0d,0x12,0x33,0xd8,0x7f,0x0c,0x7e,0x09,0x12,0x2b,0x13,0x90,0x97,
+0xa3,0x12,0x1d,0xa9,0x90,0x97,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xe4,
+0xff,0xec,0x90,0x97,0xa3,0x12,0x1d,0xa9,0x90,0x97,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,
+0xa3,0xe0,0xfe,0xa3,0xe0,0x44,0x11,0xff,0xec,0x90,0x97,0xa3,0x12,0x1d,0xa9,0x90,
+0x97,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,
+0x12,0x1d,0xa9,0x7f,0x0c,0x7e,0x09,0x12,0x33,0xd8,0x7f,0x0c,0x7e,0x09,0x12,0x2b,
+0x13,0x90,0x97,0xa3,0x12,0x1d,0xa9,0x90,0x97,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,
+0xe0,0xfe,0xa3,0xe0,0xff,0xed,0x54,0x0f,0xfd,0xec,0x54,0xf0,0xfc,0x90,0x97,0xa3,
+0x12,0x1d,0xa9,0x90,0x97,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,
+0xff,0xed,0x44,0x10,0xfd,0xec,0x44,0x01,0xfc,0x90,0x97,0xa3,0x12,0x1d,0xa9,0x90,
+0x97,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,
+0x12,0x1d,0xa9,0x7f,0x0c,0x7e,0x09,0x12,0x33,0xd8,0x7f,0x04,0x7e,0x08,0x12,0x2b,
+0x13,0x90,0x97,0xa3,0x12,0x1d,0xa9,0x90,0x97,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,
+0xe0,0xfe,0xa3,0xe0,0x54,0xf0,0xff,0xec,0x90,0x97,0xa3,0x12,0x1d,0xa9,0x90,0x97,
+0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0x44,0x01,0xff,0xec,0x90,
+0x97,0xa3,0x12,0x1d,0xa9,0x90,0x97,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,
+0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x04,0x7e,0x08,0x12,0x33,0xd8,
+0xe4,0x90,0x97,0x2d,0xf0,0x22,0x8f,0x10,0xef,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,
+0x34,0x95,0xaf,0x82,0xf5,0x11,0x8f,0x12,0xe5,0x10,0x75,0xf0,0x02,0xa4,0x24,0x81,
+0xf9,0x74,0x92,0x35,0xf0,0x75,0x13,0x01,0xf5,0x14,0x89,0x15,0xe5,0x10,0x75,0xf0,
+0x08,0xa4,0x24,0x65,0xf5,0x82,0xe4,0x34,0x93,0xaf,0x82,0xf5,0x16,0x8f,0x17,0xe5,
+0x10,0x75,0xf0,0x08,0xa4,0x24,0x63,0xf9,0x74,0x93,0x35,0xf0,0x75,0x18,0x01,0xf5,
+0x19,0x89,0x1a,0x74,0xc1,0x25,0x10,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0x12,
+0x66,0xc1,0x55,0x67,0x00,0x55,0x7c,0x01,0x55,0x91,0x02,0x55,0xa6,0x03,0x55,0xd0,
+0x04,0x55,0xe5,0x05,0x55,0xfa,0x06,0x56,0x21,0x0c,0x56,0x4f,0x0d,0x56,0x7c,0x0e,
+0x56,0xa9,0x0f,0x00,0x00,0x56,0xdd,0xe5,0x10,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,
+0x34,0x95,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74,0x15,0x80,0x3c,0xe5,0x10,0x25,0xe0,
+0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74,0x10,0x80,
+0x27,0xe5,0x10,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0xf0,
+0xf0,0xa3,0x74,0x05,0x80,0x12,0xe5,0x10,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,
+0x95,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0xe4,0xf0,0xe5,0x10,0x25,0xe0,0x24,0x81,0xf5,
+0x82,0xe4,0x34,0x92,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0x8f,0xf0,0x02,0x56,0xdd,
+0xe5,0x10,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0f,0xf0,
+0xa3,0x74,0xf5,0x80,0x27,0xe5,0x10,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,
+0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf0,0x80,0x12,0xe5,0x10,0x25,0xe0,0x24,0xe4,
+0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe4,0xf0,0xa3,0x74,0x0d,0xf0,0xe5,0x10,0x25,
+0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x02,0x56,
+0xdd,0x90,0x04,0x47,0xe0,0xab,0x13,0xaa,0x14,0xa9,0x15,0x12,0x65,0x95,0x90,0x04,
+0x46,0xe0,0xab,0x13,0xaa,0x14,0xa9,0x15,0x90,0x00,0x01,0x12,0x65,0xa7,0x90,0x04,
+0x45,0xe0,0x85,0x12,0x82,0x85,0x11,0x83,0xf0,0x90,0x04,0x44,0x02,0x56,0xd4,0x90,
+0x04,0x4b,0xe0,0xab,0x13,0xaa,0x14,0xa9,0x15,0x12,0x65,0x95,0x90,0x04,0x4a,0xe0,
+0xab,0x13,0xaa,0x14,0xa9,0x15,0x90,0x00,0x01,0x12,0x65,0xa7,0x90,0x04,0x49,0xe0,
+0x85,0x12,0x82,0x85,0x11,0x83,0xf0,0x90,0x04,0x48,0x80,0x58,0x90,0x04,0x4f,0xe0,
+0xab,0x13,0xaa,0x14,0xa9,0x15,0x12,0x65,0x95,0x90,0x04,0x4e,0xe0,0xab,0x13,0xaa,
+0x14,0xa9,0x15,0x90,0x00,0x01,0x12,0x65,0xa7,0x90,0x04,0x4d,0xe0,0x85,0x12,0x82,
+0x85,0x11,0x83,0xf0,0x90,0x04,0x4c,0x80,0x2b,0x90,0x04,0x53,0xe0,0xab,0x13,0xaa,
+0x14,0xa9,0x15,0x12,0x65,0x95,0x90,0x04,0x52,0xe0,0xab,0x13,0xaa,0x14,0xa9,0x15,
+0x90,0x00,0x01,0x12,0x65,0xa7,0x90,0x04,0x51,0xe0,0x85,0x12,0x82,0x85,0x11,0x83,
+0xf0,0x90,0x04,0x50,0xe0,0x85,0x12,0x82,0x85,0x11,0x83,0xa3,0xf0,0xab,0x13,0xaa,
+0x14,0xa9,0x15,0xc0,0x03,0xc0,0x02,0xc0,0x01,0x12,0x1c,0xd6,0xff,0xab,0x18,0xaa,
+0x19,0xa9,0x1a,0x12,0x1c,0xd6,0x5f,0xd0,0x01,0xd0,0x02,0xd0,0x03,0x12,0x65,0x95,
+0xab,0x13,0xe5,0x15,0x24,0x01,0xf9,0xe4,0x35,0x14,0xfa,0xc0,0x03,0xc0,0x02,0xc0,
+0x01,0x12,0x1c,0xd6,0xff,0xab,0x18,0xaa,0x19,0xa9,0x1a,0x90,0x00,0x01,0x12,0x1c,
+0xef,0x5f,0xd0,0x01,0xd0,0x02,0xd0,0x03,0x12,0x65,0x95,0x85,0x12,0x82,0x85,0x11,
+0x83,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x17,0x82,0x85,0x16,0x83,0xe0,0xfe,0xef,
+0x5e,0xd0,0x82,0xd0,0x83,0xf0,0x85,0x12,0x82,0x85,0x11,0x83,0xa3,0xc0,0x83,0xc0,
+0x82,0xe0,0xff,0x85,0x17,0x82,0x85,0x16,0x83,0xa3,0xe0,0xfe,0xef,0x5e,0xd0,0x82,
+0xd0,0x83,0xf0,0xe5,0x10,0x25,0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,
+0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x4c,0x90,0x97,0x51,0x74,0x0b,0xf0,0x90,0x97,0x51,
+0xe0,0xff,0xc3,0x94,0x00,0x50,0x03,0x02,0x58,0x23,0x74,0x01,0x7e,0x00,0xa8,0x07,
+0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x10,0x25,0xe0,0x24,
+0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,
+0x0a,0x90,0x97,0x51,0xe0,0x24,0x10,0xa3,0xf0,0x80,0x68,0x90,0x97,0x51,0xe0,0x14,
+0xf0,0x80,0xba,0xe5,0x10,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,
+0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x47,0x90,0x97,0x51,0x74,0x0f,0xf0,0x90,0x97,0x51,
+0xe0,0xff,0xc3,0x94,0x00,0x40,0x3c,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,
+0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x10,0x25,0xe0,0x24,0xe4,0xf5,0x82,
+0xe4,0x34,0x95,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x08,0x90,0x97,
+0x51,0xe0,0xa3,0xf0,0x80,0x0d,0x90,0x97,0x51,0xe0,0x14,0xf0,0x80,0xbf,0xe4,0x90,
+0x97,0x52,0xf0,0xe5,0x10,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,
+0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x47,0xe4,0x90,0x97,0x51,0xf0,0x90,0x97,0x51,0xe0,
+0xff,0xc3,0x94,0x10,0x40,0x03,0x02,0x58,0xdd,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,
+0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x10,0x25,0xe0,0x24,0xe4,
+0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x06,
+0x90,0x97,0x51,0xe0,0x80,0x63,0x90,0x97,0x51,0xe0,0x04,0xf0,0x80,0xbe,0xe5,0x10,
+0x25,0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,
+0x60,0x46,0xe4,0x90,0x97,0x51,0xf0,0x90,0x97,0x51,0xe0,0xff,0xc3,0x94,0x0c,0x50,
+0x3c,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,
+0xf9,0xff,0xe5,0x10,0x25,0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,
+0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x08,0x90,0x97,0x51,0xe0,0x24,0x10,0x80,0x09,
+0x90,0x97,0x51,0xe0,0x04,0xf0,0x80,0xbf,0xe4,0x90,0x97,0x53,0xf0,0x90,0x97,0x52,
+0xe0,0xff,0xe5,0x10,0x75,0xf0,0x08,0xa4,0x24,0x67,0xf5,0x82,0xe4,0x34,0x93,0xf5,
+0x83,0xef,0xf0,0x90,0x97,0x53,0xe0,0xfe,0xe5,0x10,0x75,0xf0,0x08,0xa4,0x24,0x68,
+0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xee,0xf0,0x74,0x84,0x25,0x10,0xf5,0x82,0xe4,
+0x34,0x04,0xf5,0x83,0xe0,0xd3,0x9f,0x40,0x1f,0x90,0x97,0x52,0xe0,0xff,0x74,0x84,
+0x25,0x10,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xef,0xf0,0x74,0x84,0x25,0x10,0xf5,
+0x82,0xe4,0x34,0x04,0xf5,0x83,0xef,0xf0,0x90,0x97,0x52,0xe0,0xff,0xd3,0x94,0x13,
+0x40,0x08,0x90,0x93,0x62,0x74,0x03,0xf0,0x80,0x21,0xef,0xd3,0x94,0x0b,0x40,0x08,
+0x90,0x93,0x62,0x74,0x02,0xf0,0x80,0x13,0xef,0xd3,0x94,0x03,0x40,0x08,0x90,0x93,
+0x62,0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x93,0x62,0xf0,0x90,0x93,0x62,0xe0,0x90,
+0x04,0xb1,0xf0,0xe5,0x10,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,
+0xe0,0xff,0xa3,0xe0,0x90,0x04,0x9c,0xcf,0xf0,0xa3,0xef,0xf0,0xe5,0x10,0x25,0xe0,
+0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90,0x04,0x9e,
+0xcf,0xf0,0xa3,0xef,0xf0,0xe5,0x10,0x75,0xf0,0x08,0xa4,0x24,0x69,0xf5,0x82,0xe4,
+0x34,0x93,0xf5,0x83,0xe0,0xc4,0x33,0x54,0xe0,0x45,0x10,0x90,0x04,0xa0,0xf0,0x74,
+0xc1,0x25,0x10,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0x90,0x04,0xa1,0xf0,0x22,
+0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,
+0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,
+0x74,0xd0,0xf0,0x74,0x59,0xa3,0xf0,0x90,0x01,0x37,0xe0,0x55,0x2b,0xf5,0x2f,0x90,
+0x01,0x34,0xe0,0x55,0x28,0xf5,0x2c,0x90,0x01,0x36,0xe0,0x55,0x2a,0xf5,0x2e,0xe5,
+0x2c,0x20,0xe0,0x03,0x02,0x5b,0x82,0x90,0x01,0x34,0x74,0x01,0xf0,0x85,0xd1,0x4d,
+0x85,0xd2,0x4e,0x85,0xd3,0x4f,0x85,0xd4,0x50,0x85,0xd5,0x51,0x85,0xd6,0x52,0x85,
+0xd7,0x53,0x85,0xd9,0x54,0xe5,0x54,0x54,0x40,0xc3,0x13,0xff,0xe5,0x53,0x54,0x20,
+0x6f,0x70,0x03,0x02,0x5b,0x2f,0xe5,0x54,0x30,0xe5,0x03,0x02,0x5b,0x2f,0xe5,0x52,
+0x54,0x1f,0xf5,0x08,0xe5,0x4d,0x54,0x3f,0xf5,0x09,0xe5,0x51,0x54,0x1f,0xff,0xe5,
+0x08,0x25,0xe0,0x24,0xe3,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0x8f,0xf0,0x12,
+0x65,0xc9,0xe5,0x53,0x54,0x1f,0xff,0xe5,0x08,0x25,0xe0,0x24,0xc0,0xf5,0x82,0xe4,
+0x34,0x91,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x65,0xc9,0xe5,0x09,0xd3,0x94,0x04,0x40,
+0x03,0x75,0x09,0x04,0x75,0xf0,0x0a,0xe5,0x08,0xa4,0x24,0x00,0xf5,0x82,0xe5,0xf0,
+0x34,0x90,0xf5,0x83,0x75,0xf0,0x02,0xe5,0x09,0x12,0x66,0xb5,0xe0,0xfe,0xa3,0xe0,
+0xff,0xe5,0x53,0x54,0x1f,0x2f,0xff,0xe4,0x3e,0xfe,0x75,0xf0,0x0a,0xe5,0x08,0xa4,
+0x24,0x00,0xf5,0x82,0xe5,0xf0,0x34,0x90,0xf5,0x83,0x75,0xf0,0x02,0xe5,0x09,0x12,
+0x66,0xb5,0xee,0xf0,0xa3,0xef,0xf0,0xe5,0x54,0x20,0xe6,0x24,0xe5,0x53,0x54,0x1f,
+0xff,0xe5,0x08,0x25,0xe0,0x24,0x63,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0x8f,
+0xf0,0x12,0x65,0xc9,0xe5,0x4f,0x30,0xe7,0x36,0xaf,0x08,0x12,0x75,0x4c,0x80,0x2f,
+0xe5,0x53,0x54,0x1f,0xff,0xe5,0x08,0x25,0xe0,0x24,0xa3,0xf5,0x82,0xe4,0x34,0x94,
+0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x65,0xc9,0xe5,0x4f,0x30,0xe7,0x12,0xe5,0x4f,0x54,
+0x7f,0xfd,0xe5,0x53,0x54,0x1f,0xf5,0x0d,0xab,0x09,0xaf,0x08,0x12,0x76,0x52,0xe5,
+0x65,0x60,0x4f,0x90,0x97,0x8d,0xe0,0x60,0x35,0x90,0x01,0x5b,0xe4,0xf0,0x90,0x01,
+0x3c,0x74,0x04,0xf0,0x90,0x04,0x1b,0xe0,0x54,0x7f,0x64,0x7f,0x70,0x34,0x75,0x48,
+0x14,0xf5,0x49,0xfb,0xfd,0x7f,0x58,0x7e,0x01,0x12,0x38,0xec,0x90,0x01,0x5b,0x74,
+0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x90,0x97,0x87,0xf0,0x80,0x14,0x90,0x04,
+0x1b,0xe0,0x54,0x7f,0xff,0xbf,0x7f,0x0a,0x90,0x97,0x8b,0xe0,0xff,0x7d,0x01,0x12,
+0x6e,0xda,0xe5,0x2c,0x30,0xe1,0x21,0x90,0x01,0x34,0x74,0x02,0xf0,0x85,0xd1,0x56,
+0x85,0xd2,0x57,0x85,0xd3,0x58,0x85,0xd4,0x59,0x85,0xd5,0x5a,0x85,0xd6,0x5b,0x85,
+0xd7,0x5c,0x85,0xd9,0x5d,0x12,0x7d,0xc4,0xe5,0x2c,0x30,0xe3,0x06,0x90,0x01,0x34,
+0x74,0x08,0xf0,0xe5,0x2c,0x30,0xe4,0x09,0x90,0x01,0x34,0x74,0x10,0xf0,0x43,0x55,
+0x10,0xe5,0x2c,0x30,0xe5,0x21,0x90,0x01,0xcf,0xe0,0x30,0xe5,0x1a,0xe0,0x54,0xdf,
+0xf0,0x90,0x01,0x34,0x74,0x20,0xf0,0x90,0x00,0x03,0xe0,0x54,0xfb,0xf0,0x7f,0x10,
+0x7e,0x00,0x12,0x3a,0xa8,0x80,0xfe,0xe5,0x2c,0x30,0xe6,0x06,0x90,0x01,0x34,0x74,
+0x40,0xf0,0xe5,0x2e,0x30,0xe1,0x09,0x90,0x01,0x36,0x74,0x02,0xf0,0x43,0x55,0x40,
+0xe5,0x2e,0x30,0xe0,0x09,0x90,0x01,0x36,0x74,0x01,0xf0,0x12,0x76,0xd3,0xe5,0x2e,
+0x30,0xe2,0x63,0x90,0x01,0x36,0x74,0x04,0xf0,0xe5,0x64,0x64,0x01,0x70,0x57,0xe5,
+0x65,0x60,0x53,0xe5,0x65,0x64,0x02,0x70,0x27,0x90,0x06,0xab,0xe0,0x90,0x97,0x7f,
+0xf0,0x90,0x06,0xaa,0xe0,0x90,0x97,0x8a,0xf0,0x90,0x97,0x7f,0xe0,0x70,0x07,0x90,
+0x97,0x8a,0xe0,0xff,0x80,0x05,0x90,0x97,0x7f,0xe0,0xff,0x90,0x97,0x7f,0xef,0xf0,
+0x90,0x97,0x81,0xe0,0x60,0x03,0xe0,0x14,0xf0,0x90,0x97,0x80,0xe4,0xf0,0x90,0x01,
+0x57,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x97,0x8f,0xe0,0x54,0xfd,0xf0,0xe0,
+0x54,0xef,0xf0,0x12,0x77,0x49,0xe5,0x2e,0x30,0xe3,0x31,0x90,0x01,0x36,0x74,0x08,
+0xf0,0xe5,0x64,0x64,0x01,0x70,0x25,0xe5,0x65,0x60,0x21,0x90,0x01,0x57,0xe4,0xf0,
+0x90,0x01,0x3c,0x74,0x02,0xf0,0x75,0x48,0x03,0x75,0x49,0x00,0xe4,0xfb,0xfd,0x7f,
+0x54,0x7e,0x01,0x12,0x38,0xec,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x2e,0x30,0xe4,
+0x3a,0x90,0x01,0x36,0x74,0x10,0xf0,0xe5,0x64,0x64,0x01,0x70,0x2e,0xe5,0x65,0x60,
+0x2a,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x97,0x8e,0xe4,
+0xf0,0x90,0x97,0x8f,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0x03,0x70,0x0e,0x90,0x97,0x89,
+0xf0,0x90,0x97,0x8b,0xe0,0xff,0x7d,0x01,0x12,0x6e,0xda,0xe5,0x2e,0x30,0xe5,0x12,
+0x90,0x01,0x36,0x74,0x20,0xf0,0xe5,0x64,0xb4,0x01,0x07,0xe5,0x65,0x60,0x03,0x12,
+0x7e,0x7e,0xe5,0x2e,0x30,0xe6,0x2a,0x90,0x01,0x36,0x74,0x40,0xf0,0xe5,0x64,0x64,
+0x01,0x70,0x1e,0xe5,0x65,0x60,0x1a,0x90,0x97,0x8f,0xe0,0x54,0xfe,0xf0,0xe0,0x54,
+0x03,0x70,0x0e,0x90,0x97,0x89,0xf0,0x90,0x97,0x8b,0xe0,0xff,0x7d,0x01,0x12,0x6e,
+0xda,0xe5,0x2f,0x30,0xe1,0x09,0x90,0x01,0x37,0x74,0x02,0xf0,0x12,0x7c,0xe8,0x74,
+0xd0,0x04,0x90,0x01,0xc4,0xf0,0x74,0x59,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,
+0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,
+0xd0,0xf0,0xd0,0xe0,0x32,0x74,0x5d,0x90,0x01,0xc4,0xf0,0xa3,0x74,0x65,0xf0,0x90,
+0x04,0x44,0x74,0x11,0xf0,0xa3,0x74,0xf0,0xf0,0xa3,0x74,0x0f,0xf0,0xa3,0xe4,0xf0,
+0x90,0x97,0x3a,0xf0,0x90,0x97,0x3a,0xe0,0xff,0xc3,0x94,0x10,0x50,0x14,0x74,0xa4,
+0x2f,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe4,0xf0,0x90,0x97,0x3a,0xe0,0x04,0xf0,
+0x80,0xe2,0xe4,0x90,0x97,0x3a,0xf0,0x90,0x97,0x3a,0xe0,0xfb,0xc3,0x94,0x20,0x40,
+0x03,0x02,0x5f,0x6c,0xe0,0xff,0x75,0xf0,0x0a,0xa4,0x24,0x00,0xf5,0x82,0xe5,0xf0,
+0x34,0x90,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xef,0xa4,0x24,0x02,0xf5,
+0x82,0xe5,0xf0,0x34,0x90,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xef,0xa4,
+0x24,0x04,0xf5,0x82,0xe5,0xf0,0x34,0x90,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,
+0x0a,0xef,0xa4,0x24,0x06,0xf5,0x82,0xe5,0xf0,0x34,0x90,0xf5,0x83,0xe4,0xf0,0xa3,
+0xf0,0x75,0xf0,0x0a,0xef,0xa4,0x24,0x08,0xf5,0x82,0xe5,0xf0,0x34,0x90,0xf5,0x83,
+0xe4,0xf0,0xa3,0xf0,0x74,0x84,0x2f,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0x74,0x13,
+0xf0,0x74,0x44,0x2f,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe4,0xf0,0xef,0x25,0xe0,
+0x24,0xc0,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xef,0x25,0xe0,
+0x24,0x63,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xef,0x25,0xe0,
+0x24,0xe3,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xef,0x25,0xe0,
+0x24,0xa3,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xef,0x25,0xe0,
+0x24,0x64,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xef,0x25,0xe0,
+0x24,0xa4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x74,0x44,0x2f,
+0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe4,0xf0,0x74,0x24,0x2f,0xf5,0x82,0xe4,0x34,
+0x96,0xf5,0x83,0xe4,0xf0,0x74,0x64,0x2f,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe4,
+0xf0,0x90,0x41,0xc4,0x93,0xfe,0x74,0x01,0x93,0xff,0x90,0x41,0x8c,0x74,0x01,0x93,
+0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xe4,0xfc,0xfd,0xeb,0x25,
+0xe0,0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0x12,0x1d,0xa9,0xeb,
+0x75,0xf0,0x08,0xa4,0x24,0x6a,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0x74,0x01,0xf0,
+0xeb,0x75,0xf0,0x08,0xa4,0x24,0x69,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0x74,0x01,
+0xf0,0x74,0xc1,0x2b,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0x74,0x0c,0xf0,0xeb,0x75,
+0xf0,0x08,0xa4,0x24,0x65,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0x74,0xff,0xf0,0xa3,
+0xf0,0xeb,0x75,0xf0,0x08,0xa4,0x24,0x63,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4,
+0xf0,0xa3,0x74,0x0f,0xf0,0xeb,0x75,0xf0,0x08,0xa4,0x24,0x67,0xf5,0x82,0xe4,0x34,
+0x93,0xf5,0x83,0x74,0x13,0xf0,0xeb,0x75,0xf0,0x08,0xa4,0x24,0x68,0xf5,0x82,0xe4,
+0x34,0x93,0xf5,0x83,0xe4,0xf0,0x74,0x84,0x2b,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,
+0x74,0x13,0xf0,0x90,0x97,0x3a,0xe0,0x04,0xf0,0x02,0x5d,0xa7,0x22,0x8f,0x17,0x74,
+0x5f,0x90,0x01,0xc4,0xf0,0xa3,0x74,0x6d,0xf0,0x74,0x84,0x25,0x17,0xf5,0x82,0xe4,
+0x34,0x04,0xf5,0x83,0xe0,0x54,0x7f,0x90,0x97,0x54,0xf0,0xe0,0x54,0x1f,0xff,0x90,
+0x97,0x57,0xf0,0xe5,0x17,0x75,0xf0,0x08,0xa4,0x24,0x68,0xf5,0x82,0xe4,0x34,0x93,
+0xf5,0x83,0xe0,0x90,0x97,0x59,0xf0,0xe5,0x17,0x75,0xf0,0x08,0xa4,0x24,0x67,0xf5,
+0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xfe,0x90,0x97,0x5a,0xf0,0xe5,0x17,0x25,0xe0,
+0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x97,0x5b,
+0xcb,0xf0,0xa3,0xeb,0xf0,0xe5,0x17,0x25,0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,
+0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x97,0x5d,0xcb,0xf0,0xa3,0xeb,0xf0,0xef,0xd3,
+0x9e,0x40,0x0c,0x90,0x97,0x5a,0xe0,0x90,0x97,0x57,0xf0,0x90,0x97,0x54,0xf0,0xed,
+0x70,0x03,0x02,0x60,0xd9,0x90,0x97,0x58,0xed,0xf0,0x90,0x97,0x54,0xe0,0x30,0xe6,
+0x0e,0x90,0x97,0x57,0xe0,0x90,0x97,0x54,0xf0,0x90,0x97,0x58,0xe0,0x14,0xf0,0x90,
+0x97,0x58,0xe0,0x70,0x03,0x02,0x60,0xd9,0x90,0x97,0x57,0xe0,0xff,0xd3,0x94,0x00,
+0x50,0x03,0x02,0x60,0xd9,0xe4,0x90,0x97,0x56,0xf0,0xef,0x14,0x90,0x97,0x55,0xf0,
+0x90,0x97,0x59,0xe0,0xfd,0x90,0x97,0x55,0xe0,0xff,0xd3,0x9d,0x40,0x6f,0xef,0x94,
+0x10,0x40,0x21,0xef,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,
+0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x97,0x5d,0xe0,0x5e,0xfe,0xa3,0xe0,
+0x5f,0x4e,0x70,0x27,0x90,0x97,0x55,0xe0,0xff,0xc3,0x94,0x10,0x50,0x37,0x74,0x01,
+0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,
+0x97,0x5b,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x1a,0x90,0x97,0x55,0xe0,0x90,
+0x97,0x54,0xf0,0x90,0x97,0x56,0xe0,0x04,0xf0,0x90,0x97,0x58,0xe0,0xff,0x90,0x97,
+0x56,0xe0,0x6f,0x60,0x08,0x90,0x97,0x55,0xe0,0x14,0xf0,0x80,0x83,0x90,0x97,0x58,
+0xe0,0xff,0x90,0x97,0x56,0xe0,0xc3,0x9f,0x50,0x0f,0x90,0x97,0x55,0xe0,0xb5,0x05,
+0x08,0x90,0x97,0x59,0xe0,0x90,0x97,0x54,0xf0,0x90,0x97,0x54,0xe0,0xff,0x25,0xe0,
+0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfc,0x74,0x01,0x93,0xfd,
+0xef,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2d,
+0xff,0xe4,0x93,0x3c,0xc3,0x13,0xfe,0xef,0x13,0xff,0xe4,0xfc,0xfd,0xe5,0x17,0x25,
+0xe0,0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0x12,0x1d,0xa9,0x90,
+0x97,0x54,0xe0,0xff,0x74,0x84,0x25,0x17,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xef,
+0xf0,0x22,0x90,0x01,0xc4,0x74,0x32,0xf0,0x74,0x61,0xa3,0xf0,0x90,0x01,0xcc,0xe0,
+0x54,0x0f,0x90,0x97,0x3a,0xf0,0x90,0x97,0x3a,0xe0,0xfd,0x70,0x03,0x02,0x62,0xd2,
+0x90,0x97,0xb1,0xe0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,
+0xce,0x33,0xce,0xd8,0xf9,0xff,0xef,0x5d,0x70,0x03,0x02,0x62,0xb3,0x90,0x97,0xb1,
+0xe0,0x75,0xf0,0x04,0xa4,0x24,0xd0,0xf5,0x82,0xe5,0xf0,0x34,0x01,0xf5,0x83,0xe0,
+0x90,0x97,0x3b,0xf0,0xa2,0xaf,0xe4,0x33,0xa3,0xf0,0xc2,0xaf,0x75,0x24,0x01,0x75,
+0x25,0x97,0x75,0x26,0x3b,0x75,0x27,0x01,0x7b,0x01,0x7a,0x97,0x79,0x3d,0x12,0x79,
+0x27,0x90,0x97,0x3c,0xe0,0x24,0xff,0x92,0xaf,0xa3,0xe0,0xff,0xc4,0x13,0x13,0x13,
+0x54,0x01,0x90,0x97,0xb1,0x30,0xe0,0x70,0xe0,0x75,0xf0,0x02,0xa4,0x24,0x88,0xf5,
+0x82,0xe4,0x35,0xf0,0xf5,0x83,0xe0,0x90,0x97,0x3e,0xf0,0x90,0x97,0xb1,0xe0,0x75,
+0xf0,0x02,0xa4,0x24,0x89,0xf5,0x82,0xe4,0x35,0xf0,0xf5,0x83,0xe0,0x90,0x97,0x3f,
+0xf0,0x90,0x97,0xb1,0xe0,0x75,0xf0,0x04,0xa4,0x24,0xd1,0xf5,0x82,0xe5,0xf0,0x34,
+0x01,0xf5,0x83,0xe0,0x90,0x97,0x40,0xf0,0x90,0x97,0xb1,0xe0,0x75,0xf0,0x04,0xa4,
+0x24,0xd2,0xf5,0x82,0xe5,0xf0,0x34,0x01,0xf5,0x83,0xe0,0x90,0x97,0x41,0xf0,0x90,
+0x97,0xb1,0xe0,0x75,0xf0,0x04,0xa4,0x24,0xd3,0xf5,0x82,0xe5,0xf0,0x34,0x01,0xf5,
+0x83,0xe0,0x90,0x97,0x42,0xf0,0x80,0x42,0xe0,0x75,0xf0,0x04,0xa4,0x24,0xd1,0xf5,
+0x82,0xe5,0xf0,0x34,0x01,0xf5,0x83,0xe0,0x90,0x97,0x3e,0xf0,0x90,0x97,0xb1,0xe0,
+0x75,0xf0,0x04,0xa4,0x24,0xd2,0xf5,0x82,0xe5,0xf0,0x34,0x01,0xf5,0x83,0xe0,0x90,
+0x97,0x3f,0xf0,0x90,0x97,0xb1,0xe0,0x75,0xf0,0x04,0xa4,0x24,0xd3,0xf5,0x82,0xe5,
+0xf0,0x34,0x01,0xf5,0x83,0xe0,0x90,0x97,0x40,0xf0,0xef,0x54,0x7f,0xff,0x7b,0x01,
+0x7a,0x97,0x79,0x3e,0x12,0x6e,0x02,0x90,0x97,0x3a,0xe0,0xff,0x90,0x97,0xb1,0xe0,
+0xfe,0x74,0x01,0xa8,0x06,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0x5f,0x90,0x97,
+0x3a,0xf0,0x90,0x97,0xb1,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,
+0xd8,0xfc,0x90,0x01,0xcc,0xf0,0x90,0x97,0xb1,0xe0,0x04,0xf0,0xe0,0x54,0x03,0xf0,
+0x02,0x61,0x46,0xc2,0xaf,0x74,0x32,0x04,0x90,0x01,0xc4,0xf0,0x74,0x61,0xa3,0xf0,
+0x90,0x97,0x3a,0xe0,0x90,0x01,0xc6,0xf0,0x90,0x97,0xb1,0xe0,0x90,0x01,0xc7,0xf0,
+0x80,0xfe,0x22,0xe4,0x90,0x97,0x37,0xf0,0xa3,0xf0,0x12,0x7a,0x6c,0x90,0x00,0x02,
+0xe0,0x54,0xe0,0x90,0x97,0x96,0x60,0x05,0x74,0x01,0xf0,0x80,0x03,0x74,0x02,0xf0,
+0x90,0x00,0xf3,0xe0,0x30,0xe3,0x08,0x90,0x97,0x97,0x74,0x01,0xf0,0x80,0x05,0xe4,
+0x90,0x97,0x97,0xf0,0x90,0x97,0x97,0xe0,0xb4,0x01,0x13,0x90,0x00,0xf2,0xe0,0x30,
+0xe7,0x0c,0x90,0x97,0x90,0x74,0xfd,0xf0,0xa3,0x74,0x33,0xf0,0x80,0x0a,0x90,0x97,
+0x90,0x74,0xfd,0xf0,0xa3,0x74,0x2f,0xf0,0xe4,0xf5,0x55,0x12,0x5d,0x65,0x12,0x7f,
+0x60,0x12,0x79,0xce,0x12,0x36,0xd1,0x12,0x44,0xff,0x75,0x28,0x33,0xe4,0xf5,0x29,
+0x75,0x2a,0x02,0xf5,0x2b,0x90,0x01,0x30,0xe5,0x28,0xf0,0xa3,0xe5,0x29,0xf0,0xa3,
+0xe5,0x2a,0xf0,0xa3,0xe5,0x2b,0xf0,0x90,0x00,0xf3,0xe0,0x30,0xe2,0x0d,0x90,0x05,
+0x41,0x74,0x10,0xf0,0x90,0x05,0x5a,0xf0,0xa3,0xe4,0xf0,0x90,0x01,0x64,0x74,0xa0,
+0xf0,0x75,0x48,0xff,0xe4,0xf5,0x49,0xfb,0x7d,0x01,0x7f,0x50,0x7e,0x01,0x12,0x38,
+0xec,0x75,0x30,0x1f,0x75,0x31,0x01,0xe4,0xf5,0x32,0x90,0x01,0x38,0xe5,0x30,0xf0,
+0xa3,0xe5,0x31,0xf0,0xa3,0xe5,0x32,0xf0,0x12,0x78,0xd0,0x90,0x97,0x39,0xe5,0xd9,
+0xf0,0x90,0x01,0x3c,0x74,0xff,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x01,0x34,0xf0,0xa3,
+0xf0,0xa3,0xf0,0xa3,0xf0,0xc2,0xaf,0x90,0x00,0x80,0xe0,0x44,0x40,0xf0,0x7f,0x10,
+0x7e,0x00,0x12,0x3a,0xa8,0x75,0xe8,0x03,0x43,0xa8,0x85,0xd2,0xaf,0x90,0x01,0xc0,
+0xe4,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x01,0xc6,0xf0,0xa3,0xf0,0x90,0x97,
+0x37,0xe0,0x64,0x01,0xf0,0x24,0xd3,0x90,0x01,0xc4,0xf0,0x74,0x62,0xa3,0xf0,0xe5,
+0x55,0x30,0xe6,0x17,0xc2,0xaf,0x53,0x55,0xbf,0xd2,0xaf,0x12,0x45,0x09,0x90,0x97,
+0x6d,0xe0,0xff,0x60,0x03,0xb4,0x01,0x03,0x12,0x6a,0x1f,0xe5,0x55,0x30,0xe7,0x07,
+0xc2,0xaf,0x53,0x55,0x7f,0xd2,0xaf,0xe5,0x55,0x30,0xe4,0x0a,0xc2,0xaf,0x53,0x55,
+0xef,0xd2,0xaf,0x12,0x61,0x32,0x90,0x97,0x6d,0xe0,0x70,0x03,0x12,0x6d,0x29,0x12,
+0x7d,0x45,0x80,0xaa,0x90,0x00,0x02,0x12,0x1c,0xef,0x90,0x97,0x6b,0xf0,0x90,0x00,
+0x01,0x12,0x1c,0xef,0x25,0xe0,0x25,0xe0,0x90,0x97,0x6a,0xf0,0x12,0x1c,0xd6,0x25,
+0xe0,0x25,0xe0,0x90,0x97,0x6e,0xf0,0x90,0x97,0x6b,0xe0,0x90,0x04,0x98,0xf0,0x90,
+0x97,0x6a,0xe0,0x13,0x13,0x54,0x3f,0x90,0x04,0x99,0xf0,0x90,0x97,0x6e,0xe0,0x13,
+0x13,0x54,0x3f,0x90,0x04,0x9a,0xf0,0x90,0x05,0x60,0xe0,0x90,0x97,0x79,0xf0,0x90,
+0x05,0x61,0xe0,0x90,0x97,0x7a,0xf0,0x90,0x05,0x62,0xe0,0x90,0x97,0x7b,0xf0,0x90,
+0x05,0x63,0xe0,0x90,0x97,0x7c,0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x97,0x49,0xf0,0xc2,
+0xaf,0x90,0x97,0x6a,0xe0,0xff,0x12,0x79,0x7c,0x90,0x97,0x49,0xe0,0x24,0xff,0x92,
+0xaf,0x90,0x97,0x6b,0xe0,0x70,0x03,0x02,0x65,0x61,0x90,0x97,0x6a,0xe0,0x70,0x03,
+0x02,0x65,0x61,0x90,0x97,0x6e,0xe0,0x70,0x03,0x02,0x65,0x61,0xa2,0xaf,0xe4,0x33,
+0x90,0x97,0x49,0xf0,0xc2,0xaf,0x90,0x97,0x7d,0x74,0x01,0xf0,0x90,0x97,0x49,0xe0,
+0x24,0xff,0x92,0xaf,0x90,0x00,0x45,0xe0,0x54,0xfe,0xf0,0xa3,0xe0,0x44,0x01,0xf0,
+0x90,0x97,0x63,0xe0,0x60,0x1d,0x90,0x97,0x6f,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,
+0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x80,0x7e,0x08,0x12,0x33,
+0xd8,0x80,0x06,0x90,0x05,0x22,0x74,0x7f,0xf0,0x90,0x00,0x45,0xe0,0x54,0xef,0xf0,
+0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x97,0x79,0xe0,0x90,0x05,0x84,0xf0,0x90,
+0x97,0x7a,0xe0,0x90,0x05,0x85,0xf0,0x90,0x97,0x7b,0xe0,0x90,0x05,0x86,0xf0,0x90,
+0x97,0x7c,0xe0,0x90,0x05,0x87,0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x97,0x49,0xf0,0xc2,
+0xaf,0x90,0x01,0x3c,0xe0,0x44,0x20,0xf0,0x7d,0x20,0xe4,0xff,0x12,0x3a,0x49,0x80,
+0x2b,0x90,0x97,0x6b,0xe0,0x70,0x2d,0x90,0x97,0x7d,0xf0,0x90,0x00,0x45,0xe0,0x54,
+0xfe,0xf0,0xa3,0xe0,0x54,0xfe,0xf0,0x90,0x05,0x22,0xe4,0xf0,0xa2,0xaf,0x33,0x90,
+0x97,0x49,0xf0,0xc2,0xaf,0x7d,0x20,0xe4,0xff,0x12,0x39,0xdb,0x90,0x97,0x49,0xe0,
+0x24,0xff,0x92,0xaf,0x22,0xbb,0x01,0x06,0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,
+0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8,0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,
+0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22,0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,
+0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2,0x22,0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0,
+0xc5,0xf0,0xf8,0xe5,0x82,0x15,0x82,0x70,0x02,0x15,0x83,0xe0,0x38,0xf0,0x22,0xa3,
+0xf8,0xe0,0xc5,0xf0,0x25,0xf0,0xf0,0xe5,0x82,0x15,0x82,0x70,0x02,0x15,0x83,0xe0,
+0xc8,0x38,0xf0,0xe8,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a,0x83,0xe0,0xf5,0xf0,0xa3,
+0xe0,0x22,0x50,0x06,0x87,0xf0,0x09,0xe7,0x19,0x22,0xbb,0xfe,0x07,0xe3,0xf5,0xf0,
+0x09,0xe3,0x19,0x22,0x89,0x82,0x8a,0x83,0xe4,0x93,0xf5,0xf0,0x74,0x01,0x93,0x22,
+0xbb,0x01,0x10,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0xf5,0xf0,
+0xa3,0xe0,0x22,0x50,0x09,0xe9,0x25,0x82,0xf8,0x86,0xf0,0x08,0xe6,0x22,0xbb,0xfe,
+0x0a,0xe9,0x25,0x82,0xf8,0xe2,0xf5,0xf0,0x08,0xe2,0x22,0xe5,0x83,0x2a,0xf5,0x83,
+0xe9,0x93,0xf5,0xf0,0xa3,0xe9,0x93,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a,0x83,0xf0,
+0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x06,0xf7,0x09,0xa7,0xf0,0x19,0x22,0xbb,0xfe,0x06,
+0xf3,0xe5,0xf0,0x09,0xf3,0x19,0x22,0xf8,0xbb,0x01,0x11,0xe5,0x82,0x29,0xf5,0x82,
+0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x09,0xe9,0x25,
+0x82,0xc8,0xf6,0x08,0xa6,0xf0,0x22,0xbb,0xfe,0x09,0xe9,0x25,0x82,0xc8,0xf2,0xe5,
+0xf0,0x08,0xf2,0x22,0xeb,0x9f,0xf5,0xf0,0xea,0x9e,0x42,0xf0,0xe9,0x9d,0x42,0xf0,
+0xe8,0x9c,0x45,0xf0,0x22,0xa4,0x25,0x82,0xf5,0x82,0xe5,0xf0,0x35,0x83,0xf5,0x83,
+0x22,0xd0,0x83,0xd0,0x82,0xf8,0xe4,0x93,0x70,0x12,0x74,0x01,0x93,0x70,0x0d,0xa3,
+0xa3,0x93,0xf8,0x74,0x01,0x93,0xf5,0x82,0x88,0x83,0xe4,0x73,0x74,0x02,0x93,0x68,
+0x60,0xef,0xa3,0xa3,0xa3,0x80,0xdf,0x90,0x97,0x46,0xeb,0xf0,0xa3,0xea,0xf0,0xa3,
+0xe9,0xf0,0x90,0x97,0x46,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x90,0x00,0x04,
+0x12,0x1c,0xef,0xff,0x54,0x1f,0x90,0x97,0x49,0xf0,0x90,0x00,0x03,0x12,0x1c,0xef,
+0x54,0xf0,0xc4,0x54,0x0f,0x90,0x97,0x4a,0xf0,0xef,0x54,0x20,0xc4,0x13,0x54,0x07,
+0xa3,0xf0,0x90,0x97,0x49,0xe0,0xff,0x75,0xf0,0x08,0xa4,0x24,0x65,0xf5,0x82,0xe4,
+0x34,0x93,0xad,0x82,0x90,0x97,0x4c,0xf0,0xa3,0xed,0xf0,0xef,0x75,0xf0,0x08,0xa4,
+0x24,0x63,0xf9,0x74,0x93,0x35,0xf0,0xfa,0xa3,0x74,0x01,0xf0,0xa3,0xea,0xf0,0xa3,
+0xe9,0xf0,0x90,0x97,0x46,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x90,0x00,0x03,0x12,0x1c,
+0xef,0x54,0x0f,0xff,0x90,0x97,0x4e,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0xef,
+0x12,0x65,0x95,0x90,0x97,0x46,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x90,0x00,
+0x02,0x12,0x1c,0xef,0xff,0x90,0x97,0x4e,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,
+0x90,0x00,0x01,0xef,0x12,0x65,0xa7,0x90,0x97,0x46,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,
+0xe0,0xf9,0x90,0x00,0x01,0x12,0x1c,0xef,0xff,0x90,0x97,0x4c,0xe0,0xfc,0xa3,0xe0,
+0xfd,0xf5,0x82,0x8c,0x83,0xef,0xf0,0x12,0x1c,0xd6,0x8d,0x82,0x8c,0x83,0xa3,0xf0,
+0x90,0x97,0x4a,0xe0,0xfe,0x90,0x97,0x49,0xe0,0xff,0x24,0xc1,0xf5,0x82,0xe4,0x34,
+0x92,0xf5,0x83,0xee,0xf0,0x90,0x97,0x4b,0xe0,0xfe,0xef,0x75,0xf0,0x08,0xa4,0x24,
+0x69,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xee,0xf0,0xef,0x75,0xf0,0x08,0xa4,0x24,
+0x6a,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0x74,0x01,0xf0,0x02,0x54,0xe6,0xc0,0xe0,
+0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,
+0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74,0xfe,
+0xf0,0x74,0x67,0xa3,0xf0,0x53,0x91,0xdf,0x90,0x01,0x3c,0xe0,0x55,0x30,0xf5,0x34,
+0xa3,0xe0,0x55,0x31,0xf5,0x35,0xa3,0xe0,0x55,0x32,0xf5,0x36,0xe5,0x34,0x30,0xe0,
+0x0f,0x90,0x01,0x3c,0x74,0x01,0xf0,0x90,0x01,0x53,0x74,0x07,0xf0,0x43,0x55,0x80,
+0xe5,0x34,0x30,0xe1,0x09,0x90,0x01,0x3c,0x74,0x02,0xf0,0x12,0x7b,0x00,0xe5,0x34,
+0x30,0xe2,0x3a,0x90,0x01,0x3c,0x74,0x04,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe0,0x1e,
+0x75,0x48,0x14,0x75,0x49,0x00,0xe4,0xfb,0xfd,0x7f,0x58,0x7e,0x01,0x12,0x38,0xec,
+0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x80,0x0f,0x90,0x97,
+0x87,0xe4,0xf0,0x90,0x97,0x8b,0xe0,0xff,0x7d,0x01,0x12,0x6e,0xda,0xe5,0x34,0x30,
+0xe3,0x06,0x90,0x01,0x3c,0x74,0x08,0xf0,0xe5,0x34,0x30,0xe4,0x09,0x90,0x01,0x3c,
+0x74,0x10,0xf0,0x12,0x7e,0xdf,0xe5,0x34,0x30,0xe5,0x09,0x90,0x01,0x3c,0x74,0x20,
+0xf0,0x12,0x6f,0xa2,0xe5,0x35,0x30,0xe0,0x15,0x90,0x01,0x3d,0x74,0x01,0xf0,0x90,
+0x00,0x83,0xe0,0x90,0x97,0x8b,0xf0,0xe0,0xff,0x7d,0x01,0x12,0x6e,0xda,0xe5,0x36,
+0x30,0xe3,0x06,0x90,0x01,0x3e,0x74,0x08,0xf0,0x74,0xfe,0x04,0x90,0x01,0xc4,0xf0,
+0x74,0x67,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,
+0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x8b,
+0x10,0x8a,0x11,0x89,0x12,0x90,0x00,0x02,0x12,0x1c,0xef,0x90,0x97,0x6c,0xf0,0xe0,
+0x90,0x04,0x94,0xf0,0x90,0x00,0x01,0x12,0x1c,0xef,0x90,0x04,0x95,0xf0,0x90,0x97,
+0x6c,0xe0,0x30,0xe0,0x74,0x90,0x97,0x63,0x74,0x01,0xf0,0x7f,0x80,0x7e,0x08,0x12,
+0x2b,0x13,0x90,0x97,0x65,0x12,0x1d,0xa9,0xab,0x10,0xaa,0x11,0xa9,0x12,0x90,0x00,
+0x01,0x12,0x1c,0xef,0xff,0xe4,0xfc,0xfd,0xfe,0x78,0x1a,0x12,0x1d,0x96,0xa8,0x04,
+0xa9,0x05,0xaa,0x06,0xab,0x07,0x90,0x97,0x65,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,
+0xfe,0xa3,0xe0,0xff,0xec,0x54,0x03,0xfc,0xeb,0x4f,0xff,0xea,0x4e,0xfe,0xe9,0x4d,
+0xfd,0xe8,0x4c,0xfc,0x90,0x97,0x6f,0x12,0x1d,0xa9,0x90,0x05,0x22,0xe4,0xf0,0x90,
+0x97,0x6f,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x78,0x18,0x12,
+0x1d,0x83,0x90,0x04,0x96,0xef,0xf0,0x80,0x45,0xe4,0x90,0x97,0x63,0xf0,0x7f,0x80,
+0x7e,0x08,0x12,0x2b,0x13,0x90,0x97,0x65,0x12,0x1d,0xa9,0x90,0x97,0x65,0xe0,0xfc,
+0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0xec,0x44,0xc0,0xfc,0x90,0x97,0x65,
+0x12,0x1d,0xa9,0x90,0x97,0x65,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,
+0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x80,0x7e,0x08,0x12,0x33,0xd8,0x90,0x97,
+0x6c,0xe0,0x90,0x00,0x47,0x30,0xe1,0x11,0x74,0x0c,0xf0,0xa3,0xe0,0x44,0x0c,0xf0,
+0x90,0x00,0x46,0xe0,0x44,0x10,0xf0,0x80,0x10,0xe0,0x54,0xf3,0xf0,0xa3,0xe0,0x54,
+0xf3,0xf0,0x90,0x00,0x46,0xe0,0x54,0xef,0xf0,0xe4,0x90,0x97,0x69,0xf0,0x22,0x90,
+0x97,0x64,0xe0,0xc3,0x94,0x14,0x50,0x06,0xe0,0x04,0xf0,0x02,0x6a,0xd9,0x90,0x97,
+0x64,0xe0,0x64,0x14,0x60,0x03,0x02,0x6a,0xd9,0x90,0x97,0x73,0xe0,0x70,0x25,0x90,
+0x97,0x76,0xe0,0x70,0x1f,0x90,0x97,0x74,0xe0,0x70,0x19,0x90,0x97,0x77,0xe0,0x70,
+0x13,0x90,0x97,0x75,0xe0,0x70,0x0d,0x90,0x97,0x78,0xe0,0x70,0x07,0x90,0x04,0xfd,
+0xe0,0x54,0xfe,0xf0,0x90,0x97,0x73,0xe0,0x90,0x04,0x88,0xf0,0x90,0x97,0x74,0xe0,
+0x90,0x04,0x89,0xf0,0x90,0x97,0x75,0xe0,0x90,0x04,0x8a,0xf0,0xa3,0xe4,0xf0,0x90,
+0x97,0x76,0xe0,0x90,0x04,0x8c,0xf0,0x90,0x97,0x77,0xe0,0x90,0x04,0x8d,0xf0,0x90,
+0x97,0x78,0xe0,0x90,0x04,0x8e,0xf0,0xa3,0xe4,0xf0,0x90,0x97,0x5f,0xe0,0x90,0x04,
+0x90,0xf0,0x90,0x97,0x60,0xe0,0x90,0x04,0x91,0xf0,0x90,0x97,0x61,0xe0,0x90,0x04,
+0x92,0xf0,0x90,0x97,0x62,0xe0,0x90,0x04,0x93,0xf0,0xe4,0x90,0x97,0x64,0xf0,0x90,
+0x97,0x5f,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x97,0x73,0xf0,0xa3,
+0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x97,0x64,0xe0,0x90,0x04,0x97,
+0xf0,0x90,0x05,0x60,0xe0,0x90,0x97,0x3a,0xf0,0x90,0x05,0x61,0xe0,0x90,0x97,0x3b,
+0xf0,0x90,0x05,0x62,0xe0,0x90,0x97,0x3c,0xf0,0x90,0x05,0x63,0xe0,0x90,0x97,0x3d,
+0xf0,0x90,0x97,0x7c,0xe0,0xff,0x90,0x97,0x3d,0xe0,0xfe,0xd3,0x9f,0x50,0x0b,0x90,
+0x97,0x7c,0xe0,0xc3,0x9e,0xd3,0x94,0x01,0x40,0x11,0x90,0x97,0x6a,0xe0,0xb4,0x01,
+0x02,0x80,0x03,0x90,0x97,0x6e,0xe0,0xff,0x12,0x79,0x7c,0x22,0x90,0x97,0xb0,0xed,
+0xf0,0x90,0x97,0xaf,0xef,0xf0,0xd3,0x94,0x07,0x50,0x6d,0xe0,0xff,0x74,0x01,0xa8,
+0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0,0x5f,0xf0,
+0x7f,0x10,0x7e,0x00,0x12,0x3a,0xa8,0x90,0x97,0xaf,0xe0,0xff,0x74,0x01,0xa8,0x07,
+0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x46,0xe0,0x4f,0xf0,0x7f,0x10,
+0x7e,0x00,0x12,0x3a,0xa8,0x90,0x97,0xb0,0xe0,0x60,0x16,0x90,0x97,0xaf,0xe0,0xff,
+0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x45,0x80,
+0x78,0x90,0x97,0xaf,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,
+0xfc,0xf4,0xff,0x90,0x00,0x45,0x80,0x7d,0x90,0x97,0xaf,0xe0,0x24,0xf8,0xf0,0xe0,
+0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,
+0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x7f,0x10,0x7e,0x00,0x12,0x3a,0xa8,0x90,0x97,
+0xaf,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,
+0x00,0x43,0xe0,0x4f,0xf0,0x7f,0x10,0x7e,0x00,0x12,0x3a,0xa8,0x90,0x97,0xb0,0xe0,
+0x60,0x1b,0x90,0x97,0xaf,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,
+0xd8,0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,0x42,0xe0,0x4f,0x80,0x1a,0x90,0x97,0xaf,
+0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,
+0xf4,0xff,0x90,0x00,0x42,0xe0,0x5f,0xf0,0x7f,0x10,0x7e,0x00,0x12,0x3a,0xa8,0x22,
+0x90,0x01,0xc4,0x74,0x30,0xf0,0x74,0x6c,0xa3,0xf0,0x7f,0x78,0x7e,0x08,0x12,0x2b,
+0x13,0x90,0x97,0x1d,0x12,0x1d,0xa9,0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x13,0x90,0x97,
+0x21,0x12,0x1d,0xa9,0x7f,0x00,0x7e,0x08,0x12,0x2b,0x13,0x90,0x97,0x25,0x12,0x1d,
+0xa9,0x90,0x97,0x97,0xe0,0x90,0x97,0x1d,0xb4,0x01,0x13,0xe0,0xfc,0xa3,0xe0,0xfd,
+0xa3,0xe0,0xfe,0xa3,0xe0,0x54,0xc7,0xff,0xed,0x54,0xc7,0xfd,0x80,0x0d,0xe0,0xfc,
+0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0x54,0xc7,0xff,0xec,0x90,0x81,0x56,0x12,
+0x1d,0xa9,0x7f,0x78,0x7e,0x08,0x12,0x33,0xd8,0x90,0x97,0x21,0xe0,0xfc,0xa3,0xe0,
+0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0x54,0x0f,0xff,0xec,0x90,0x81,0x56,0x12,0x1d,0xa9,
+0x7f,0x04,0x7e,0x0c,0x12,0x33,0xd8,0x90,0x97,0x25,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,
+0xe0,0xfe,0xa3,0xe0,0x44,0x02,0xff,0xec,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x00,
+0x7e,0x08,0x12,0x33,0xd8,0x7f,0x70,0x7e,0x0e,0x12,0x2b,0x13,0x90,0x97,0x29,0x12,
+0x1d,0xa9,0x90,0x81,0x56,0x12,0x1d,0xb5,0x00,0x1b,0x25,0xa0,0x7f,0x70,0x7e,0x0e,
+0x12,0x33,0xd8,0x90,0x81,0x24,0x12,0x1d,0xb5,0x00,0x00,0x00,0x00,0xe4,0xfd,0xff,
+0x12,0x38,0xb6,0x90,0x97,0x97,0xe0,0xb4,0x01,0x11,0x90,0x81,0x24,0x12,0x1d,0xb5,
+0x00,0x00,0x00,0x00,0xe4,0xfd,0x7f,0x01,0x12,0x38,0xb6,0x90,0x00,0x11,0xe0,0x54,
+0xf6,0xf0,0x7f,0x10,0x7e,0x00,0x02,0x3a,0xa8,0x90,0x97,0x7d,0xe0,0x64,0x01,0x60,
+0x09,0x90,0x97,0x6b,0xe0,0x60,0x03,0x02,0x6e,0x01,0x90,0x97,0x5f,0xe0,0xc3,0x94,
+0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x3b,0x90,0x97,0x60,0xe0,0xc3,0x94,0xff,0x50,
+0x06,0xe0,0x04,0xf0,0xe4,0x80,0x28,0x90,0x97,0x61,0xe0,0xc3,0x94,0xff,0x50,0x0a,
+0xe0,0x04,0xf0,0xe4,0x90,0x97,0x60,0xf0,0x80,0x15,0x90,0x97,0x62,0xe0,0xc3,0x94,
+0xff,0x50,0x10,0xe0,0x04,0xf0,0xe4,0x90,0x97,0x61,0xf0,0x90,0x97,0x60,0xf0,0x90,
+0x97,0x5f,0xf0,0x90,0x00,0x44,0xe0,0x54,0x0c,0x60,0x76,0xe0,0x30,0xe2,0x32,0x90,
+0x97,0x73,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,0x97,0x74,
+0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,0x97,0x75,0xe0,
+0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x97,0x74,0xf0,0x90,0x97,0x73,
+0xf0,0x90,0x00,0x44,0xe0,0x30,0xe3,0x32,0x90,0x97,0x76,0xe0,0xc3,0x94,0xff,0x50,
+0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,0x97,0x77,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,
+0x04,0xf0,0xe4,0x80,0x11,0x90,0x97,0x78,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,
+0xf0,0xe4,0x90,0x97,0x77,0xf0,0x90,0x97,0x76,0xf0,0x90,0x04,0xfd,0xe0,0x44,0x01,
+0xf0,0x22,0x90,0x97,0x43,0xeb,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,0xf0,0xad,0x07,0x90,
+0x01,0xc4,0x74,0x02,0xf0,0x74,0x6e,0xa3,0xf0,0xed,0x12,0x66,0xc1,0x6e,0x3f,0x01,
+0x6e,0x4d,0x02,0x6e,0x5b,0x03,0x6e,0x69,0x05,0x6e,0x77,0x06,0x6e,0x85,0x07,0x6e,
+0x93,0x09,0x6e,0xa1,0x0c,0x6e,0xaf,0x0d,0x6e,0xbd,0x0e,0x00,0x00,0x6e,0xcb,0x90,
+0x97,0x43,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x02,0x7d,0x9d,0x90,0x97,0x43,
+0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x02,0x7f,0x77,0x90,0x97,0x43,0xe0,0xfb,
+0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x02,0x7d,0x17,0x90,0x97,0x43,0xe0,0xfb,0xa3,0xe0,
+0xfa,0xa3,0xe0,0xf9,0x02,0x7c,0x0b,0x90,0x97,0x43,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,
+0xe0,0xf9,0x02,0x66,0xe7,0x90,0x97,0x43,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,
+0x02,0x7f,0x28,0x90,0x97,0x43,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x02,0x73,
+0x14,0x90,0x97,0x43,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x02,0x64,0x34,0x90,
+0x97,0x43,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x02,0x7c,0x7e,0x90,0x97,0x43,
+0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x02,0x69,0x0f,0xc2,0xaf,0x74,0x02,0x04,
+0x90,0x01,0xc4,0xf0,0x74,0x6e,0xa3,0xf0,0x80,0xfe,0x8f,0x62,0x8d,0x63,0x90,0x01,
+0xc4,0x74,0xda,0xf0,0x74,0x6e,0xa3,0xf0,0xe5,0x62,0x54,0x0f,0xff,0x90,0x97,0x88,
+0xe0,0x54,0x0f,0x6f,0x60,0x78,0xe5,0x62,0x30,0xe2,0x30,0x90,0x97,0x88,0xe0,0x20,
+0xe2,0x05,0x7f,0x01,0x12,0x7e,0x08,0x90,0x97,0x88,0xe0,0x30,0xe3,0x0a,0xe5,0x62,
+0x20,0xe3,0x05,0x12,0x7e,0x27,0x80,0x56,0x90,0x97,0x88,0xe0,0x20,0xe3,0x4f,0xe5,
+0x62,0x30,0xe3,0x4a,0xaf,0x63,0x12,0x7d,0xe8,0x80,0x43,0x90,0x97,0x88,0xe0,0x54,
+0x0f,0xff,0xbf,0x0c,0x0e,0xe5,0x62,0x20,0xe3,0x09,0x12,0x7d,0x72,0xef,0x60,0x2e,
+0x12,0x7e,0x27,0x90,0x97,0x88,0xe0,0x54,0x0f,0xff,0xbf,0x04,0x0e,0xe5,0x62,0x20,
+0xe2,0x09,0x12,0x7b,0x8a,0xef,0x60,0x16,0x12,0x7c,0x47,0x90,0x97,0x88,0xe0,0x54,
+0x0f,0xff,0xbf,0x02,0x09,0x12,0x7a,0xb8,0xef,0x60,0x03,0x12,0x7e,0x44,0x90,0x97,
+0x88,0xe0,0x54,0x0f,0xff,0x90,0x97,0x8b,0xe0,0x54,0x0f,0x6f,0x70,0x23,0xe0,0x30,
+0xe6,0x1f,0x90,0x97,0x88,0xe0,0x54,0x0f,0xff,0x90,0x97,0x7e,0xe0,0xfe,0x4f,0x90,
+0x01,0x2f,0xf0,0xee,0x64,0x80,0x90,0x97,0x7e,0xf0,0x90,0x97,0x8b,0xe0,0x54,0xbf,
+0xf0,0x22,0x90,0x97,0x6b,0xe0,0x64,0x01,0x60,0x03,0x02,0x70,0x65,0x90,0x00,0x46,
+0xe0,0x44,0x01,0xf0,0x90,0x97,0x7d,0xe0,0x70,0x40,0x90,0x97,0x63,0xe0,0x60,0x1d,
+0x90,0x97,0x6f,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,
+0x56,0x12,0x1d,0xa9,0x7f,0x80,0x7e,0x08,0x12,0x33,0xd8,0x80,0x06,0x90,0x05,0x22,
+0x74,0x7f,0xf0,0x90,0x97,0x6a,0xe0,0xff,0x12,0x79,0x7c,0x90,0x97,0x7d,0x74,0x01,
+0xf0,0x90,0x00,0x45,0xe0,0x54,0xfe,0xf0,0x80,0x44,0x90,0x97,0x7d,0xe0,0x64,0x01,
+0x70,0x3c,0x90,0x97,0x6e,0xe0,0xff,0x12,0x79,0x7c,0xe4,0x90,0x97,0x7d,0xf0,0x90,
+0x00,0x45,0xe0,0x44,0x01,0xf0,0x90,0x97,0x63,0xe0,0x60,0x1d,0x90,0x97,0x65,0xe0,
+0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,
+0x7f,0x80,0x7e,0x08,0x12,0x33,0xd8,0x80,0x05,0x90,0x05,0x22,0xe4,0xf0,0x90,0x05,
+0x87,0xe0,0x64,0x80,0xf0,0x90,0x97,0x79,0xe0,0x90,0x05,0x84,0xf0,0x90,0x97,0x7a,
+0xe0,0x90,0x05,0x85,0xf0,0x90,0x97,0x7b,0xe0,0x90,0x05,0x86,0xf0,0x90,0x97,0x7c,
+0xe0,0x90,0x05,0x87,0xf0,0x22,0x90,0x97,0x30,0xeb,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,
+0xf0,0x90,0x97,0x96,0xe0,0x64,0x02,0x70,0x03,0x02,0x71,0x1b,0x90,0x01,0xaf,0xe0,
+0x60,0x09,0x90,0x01,0xc7,0xe0,0x04,0xf0,0xf0,0x80,0xf1,0x90,0x97,0xb3,0xe0,0xff,
+0x04,0xf0,0x90,0x97,0x30,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x90,0x00,0x01,
+0xef,0x12,0x65,0xa7,0xa2,0xaf,0xe4,0x33,0x90,0x97,0x36,0xf0,0xc2,0xaf,0x90,0x97,
+0x30,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0x8b,0x24,0x8a,0x25,0xf5,0x26,0x75,0x27,
+0x02,0x7b,0x01,0x7a,0x01,0x79,0xa0,0x12,0x79,0x27,0x90,0x97,0x36,0xe0,0x24,0xff,
+0x92,0xaf,0xa2,0xaf,0xe4,0x33,0xf0,0xc2,0xaf,0x90,0x97,0x33,0xe0,0xfb,0xa3,0xe0,
+0xfa,0xa3,0xe0,0x8b,0x24,0x8a,0x25,0xf5,0x26,0x90,0x97,0x30,0xe0,0xfb,0xa3,0xe0,
+0xfa,0xa3,0xe0,0xf9,0x12,0x1c,0xd6,0xff,0xc4,0x54,0x0f,0xf5,0x27,0x7b,0x01,0x7a,
+0x01,0x79,0xa2,0x12,0x79,0x27,0x90,0x97,0x36,0xe0,0x24,0xff,0x92,0xaf,0x90,0x01,
+0xaf,0x74,0xff,0xf0,0x90,0x01,0xcb,0xe0,0x64,0x80,0xf0,0x22,0x90,0x01,0xc4,0x74,
+0x1c,0xf0,0x74,0x71,0xa3,0xf0,0x90,0x00,0x11,0xe0,0x44,0x09,0xf0,0x7f,0x10,0x7e,
+0x00,0x12,0x3a,0xa8,0x90,0x97,0x1d,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,
+0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x78,0x7e,0x08,0x12,0x33,0xd8,0x90,
+0x97,0x21,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,
+0x12,0x1d,0xa9,0x7f,0x04,0x7e,0x0c,0x12,0x33,0xd8,0x90,0x97,0x25,0xe0,0xfc,0xa3,
+0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x00,
+0x7e,0x08,0x12,0x33,0xd8,0x90,0x97,0x29,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,
+0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x70,0x7e,0x0e,0x12,0x33,0xd8,
+0x90,0x81,0x24,0x12,0x1d,0xb5,0x00,0x03,0x2d,0x95,0xe4,0xfd,0xff,0x12,0x38,0xb6,
+0x90,0x97,0x97,0xe0,0xb4,0x01,0x11,0x90,0x81,0x24,0x12,0x1d,0xb5,0x00,0x03,0x2d,
+0x95,0xe4,0xfd,0x7f,0x01,0x12,0x38,0xb6,0x22,0x90,0x97,0x9e,0xef,0xf0,0xa3,0xed,
+0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xe5,0x65,0x60,0x05,0xe4,0xff,0x12,0x7e,0x99,0x90,
+0x97,0x9e,0xe0,0x30,0xe0,0x09,0x90,0x97,0xa0,0xe4,0xf0,0xa3,0x74,0x80,0xf0,0x90,
+0x04,0x1d,0xe0,0x60,0x1d,0x90,0x05,0x22,0xe0,0x90,0x97,0xa2,0xf0,0xe0,0xff,0x54,
+0x90,0x60,0xec,0x90,0x01,0xc8,0x74,0xfc,0xf0,0xef,0x54,0x6f,0x90,0x05,0x22,0xf0,
+0x80,0xdd,0x90,0x97,0x9e,0xe0,0xff,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x90,0x04,0x25,
+0xef,0xf0,0x90,0x97,0x9f,0xe0,0x60,0x10,0xa3,0xa3,0xe0,0x24,0x10,0xf5,0x82,0xe4,
+0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x90,0x97,0xa0,0xa3,0xe0,0xff,0xfd,0x24,
+0x08,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe4,0xf0,0x74,0x09,0x2d,0xf5,0x82,0xe4,
+0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,
+0xf5,0x83,0xe0,0x54,0xf7,0xf0,0x90,0x97,0xa0,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0x90,
+0x97,0xb5,0xef,0xf0,0xd3,0x94,0x07,0x50,0x4a,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,
+0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0xe0,0x5f,0xf0,0x7f,0x10,
+0x7e,0x00,0x12,0x3a,0xa8,0x90,0x97,0xb5,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8,0x05,
+0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x44,0xe0,0xfb,
+0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13,0xd8,
+0xf8,0xff,0x22,0x90,0x97,0xb5,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,
+0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x7f,
+0x10,0x7e,0x00,0x12,0x3a,0xa8,0x90,0x97,0xb5,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8,
+0x05,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x42,0xe0,
+0xfb,0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13,
+0xd8,0xf8,0xff,0x22,0x90,0x97,0x46,0xeb,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,0xf0,0xa2,
+0xaf,0xe4,0x33,0xa3,0xf0,0xc2,0xaf,0x90,0x97,0x46,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,
+0xe0,0xf9,0x90,0x00,0x01,0x12,0x66,0x20,0xfa,0xe5,0xf0,0x24,0x00,0xff,0xe4,0x3a,
+0xfe,0x90,0x97,0x46,0xa3,0xe0,0xfa,0x90,0x00,0x01,0xee,0x8f,0xf0,0x12,0x66,0x77,
+0x12,0x1c,0xd6,0xff,0x60,0x37,0xb5,0x5e,0x1b,0x90,0x97,0x46,0xe0,0xfb,0xa3,0xe0,
+0xfa,0xa3,0xe0,0xf9,0x90,0x00,0x01,0x12,0x66,0x20,0x65,0x60,0x70,0x04,0xe5,0x5f,
+0x65,0xf0,0x60,0x2e,0x90,0x97,0x46,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x90,
+0x00,0x01,0x12,0x66,0x20,0xff,0xae,0xf0,0x12,0x7c,0xb4,0x80,0x15,0x90,0x97,0x46,
+0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x12,0x1c,0xd6,0x65,0x5e,0x60,0x03,0x12,
+0x7f,0x56,0x90,0x97,0x49,0xe0,0x24,0xff,0x92,0xaf,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,
+0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,
+0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74,0xab,0xf0,0x74,0x73,
+0xa3,0xf0,0x53,0x91,0xef,0x90,0x00,0x51,0xe0,0xff,0x90,0x00,0x55,0xe0,0x5f,0xf5,
+0x3d,0xe5,0x3d,0x30,0xe6,0x18,0x74,0x40,0xf0,0x90,0x97,0x6c,0xe0,0x54,0x03,0xff,
+0xbf,0x03,0x0b,0x90,0x97,0x69,0xe0,0x60,0x05,0x7f,0x01,0x12,0x44,0x7b,0xe5,0x3d,
+0x30,0xe7,0x15,0x90,0x00,0x55,0x74,0x80,0xf0,0x90,0x97,0x6c,0xe0,0x54,0x03,0xff,
+0xbf,0x03,0x05,0x7f,0x02,0x12,0x44,0x7b,0x90,0x01,0xc4,0x74,0xab,0xf0,0x74,0x73,
+0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,
+0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0xef,0x60,0x34,
+0x7d,0x7d,0x7f,0x02,0x12,0x39,0xbe,0x7d,0x02,0x7f,0x03,0x12,0x39,0xbe,0x90,0x01,
+0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x7d,0x01,0x7f,0x0c,0x12,0x6e,0xda,
+0xe4,0xff,0x12,0x7e,0x99,0x90,0x06,0x04,0xe0,0x54,0x7f,0xf0,0x90,0x06,0x0a,0xe0,
+0x54,0xf8,0xf0,0x22,0x90,0x01,0x36,0x74,0x7d,0xf0,0xa3,0x74,0x02,0xf0,0x7d,0x7d,
+0xff,0x12,0x3a,0x2f,0x7d,0x02,0x7f,0x03,0x12,0x3a,0x2f,0x90,0x06,0x04,0xe0,0x44,
+0x80,0xf0,0x90,0x06,0x0a,0xe0,0x44,0x07,0xf0,0x90,0x97,0x83,0xe0,0xa3,0xe0,0x90,
+0x05,0x58,0xf0,0xe5,0x64,0x30,0xe0,0x1b,0x90,0x97,0x81,0xe0,0x70,0x1a,0xe0,0x04,
+0xf0,0x90,0x97,0x88,0xe0,0x54,0x0f,0xc3,0x94,0x04,0x50,0x0c,0x7d,0x01,0x7f,0x04,
+0x02,0x6e,0xda,0xe4,0x90,0x97,0x81,0xf0,0x22,0x02,0x75,0x07,0x02,0x62,0xd3,0xe4,
+0x93,0xa3,0xf8,0xe4,0x93,0xa3,0x40,0x03,0xf6,0x80,0x01,0xf2,0x08,0xdf,0xf4,0x80,
+0x29,0xe4,0x93,0xa3,0xf8,0x54,0x07,0x24,0x0c,0xc8,0xc3,0x33,0xc4,0x54,0x0f,0x44,
+0x20,0xc8,0x83,0x40,0x04,0xf4,0x56,0x80,0x01,0x46,0xf6,0xdf,0xe4,0x80,0x0b,0x01,
+0x02,0x04,0x08,0x10,0x20,0x40,0x80,0x90,0x7f,0x0e,0xe4,0x7e,0x01,0x93,0x60,0xbc,
+0xa3,0xff,0x54,0x3f,0x30,0xe5,0x09,0x54,0x1f,0xfe,0xe4,0x93,0xa3,0x60,0x01,0x0e,
+0xcf,0x54,0xc0,0x25,0xe0,0x60,0xa8,0x40,0xb8,0xe4,0x93,0xa3,0xfa,0xe4,0x93,0xa3,
+0xf8,0xe4,0x93,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xf0,0xa3,0xc8,0xc5,
+0x82,0xc8,0xca,0xc5,0x83,0xca,0xdf,0xe9,0xde,0xe7,0x80,0xbe,0x8f,0x0f,0x74,0x75,
+0x90,0x01,0xc4,0xf0,0xa3,0x74,0x4c,0xf0,0xe5,0x0f,0x75,0xf0,0x08,0xa4,0x24,0x67,
+0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xff,0x74,0xa5,0x25,0x0f,0xf5,0x82,0xe4,
+0x34,0x96,0xf5,0x83,0xe0,0x54,0x1f,0xfb,0xd3,0x9f,0x40,0x02,0xab,0x07,0xeb,0x25,
+0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,
+0xff,0xeb,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,
+0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xe4,0xfc,0xfd,0xe5,0x0f,
+0x25,0xe0,0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0x12,0x1d,0xa9,
+0x74,0x84,0x25,0x0f,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xeb,0xf0,0xff,0x22,0x90,
+0x97,0x4c,0xef,0xf0,0xd3,0x94,0x07,0x50,0x33,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,
+0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0,0x5f,0xf0,0x7f,0x10,
+0x7e,0x00,0x12,0x3a,0xa8,0x90,0x97,0x4c,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,
+0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0x80,0x3b,0x90,0x97,0x4c,0xe0,
+0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,
+0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x7f,0x10,0x7e,0x00,0x12,
+0x3a,0xa8,0x90,0x97,0x4c,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,
+0xd8,0xfc,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x7f,0x10,0x7e,0x00,0x12,0x3a,
+0xa8,0x22,0x8f,0x0a,0x8d,0x0b,0xad,0x03,0x74,0x76,0x90,0x01,0xc4,0xf0,0xa3,0x74,
+0x52,0xf0,0xe5,0x0b,0x54,0x1f,0xf9,0x74,0x01,0x25,0x0a,0xf5,0x82,0xe4,0x34,0x92,
+0xf5,0x83,0xe0,0xff,0x90,0x04,0xfd,0xe0,0xb4,0x01,0x05,0x75,0x0e,0x03,0x80,0x03,
+0x75,0x0e,0x01,0xed,0xd3,0x95,0x0e,0x40,0x05,0xaf,0x0a,0x02,0x75,0x4c,0x90,0x01,
+0xc5,0x74,0x20,0xf0,0xe5,0x0d,0x2f,0xff,0xe9,0x90,0x41,0xd6,0x93,0xfe,0xef,0xd3,
+0x9e,0x40,0x22,0x90,0x01,0xc5,0x74,0x40,0xf0,0x74,0x01,0x25,0x0a,0xf5,0x82,0xe4,
+0x34,0x92,0xf5,0x83,0xe4,0xf0,0x74,0x84,0x25,0x0a,0xf5,0x82,0xe4,0x34,0x04,0xf5,
+0x83,0xe5,0x0b,0xf0,0x22,0x74,0x01,0x25,0x0a,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,
+0xef,0xf0,0x22,0xe4,0x90,0x97,0x2e,0xf0,0xe5,0x65,0x60,0x6c,0xe5,0x64,0x64,0x01,
+0x70,0x66,0xe5,0x65,0x64,0x02,0x60,0x06,0xe5,0x65,0x64,0x03,0x70,0x1d,0x90,0x97,
+0x7f,0xe0,0x14,0xf0,0xe0,0x60,0x04,0xa3,0xe0,0x60,0x16,0x90,0x97,0x7f,0xe0,0x70,
+0x0a,0x90,0x97,0x8a,0xe0,0x90,0x97,0x7f,0xf0,0x80,0x00,0x90,0x97,0x2e,0x74,0x01,
+0xf0,0x90,0x97,0x2e,0xe0,0x60,0x31,0x90,0x97,0x8f,0xe0,0x44,0x10,0xf0,0x90,0x97,
+0x85,0xe0,0xf5,0x48,0xe4,0xf5,0x49,0xfb,0xfd,0x7f,0x54,0x7e,0x01,0x12,0x38,0xec,
+0x90,0x01,0x57,0x74,0x05,0xf0,0x90,0x97,0x88,0xe0,0x54,0x0f,0xc3,0x94,0x04,0x50,
+0x07,0x7d,0x01,0x7f,0x04,0x12,0x6e,0xda,0x22,0x90,0x06,0xa9,0xe0,0xf5,0x0a,0x54,
+0xc0,0x70,0x0e,0x90,0x97,0x89,0xf0,0x90,0x97,0x8b,0xe0,0xff,0x7d,0x01,0x02,0x6e,
+0xda,0xe5,0x0a,0x30,0xe6,0x12,0x90,0x97,0x89,0x74,0x01,0xf0,0x90,0x97,0x8f,0xe0,
+0x44,0x01,0xf0,0x12,0x7e,0x7e,0x80,0x07,0x90,0x97,0x8f,0xe0,0x54,0xfe,0xf0,0xe5,
+0x0a,0x30,0xe7,0x29,0x90,0x97,0x89,0x74,0x01,0xf0,0x90,0x97,0x8f,0xe0,0x44,0x02,
+0xf0,0x75,0x48,0x03,0xe4,0xf5,0x49,0xfb,0xfd,0x7f,0x54,0x7e,0x01,0x12,0x38,0xec,
+0x90,0x01,0x57,0x74,0x05,0xf0,0x90,0x97,0x8e,0x74,0x01,0xf0,0x22,0x90,0x97,0x8f,
+0xe0,0x54,0xfd,0xf0,0x22,0x90,0x00,0x2b,0xe0,0x44,0x01,0xf0,0x7f,0xe8,0x7e,0x03,
+0x12,0x3a,0xa8,0x90,0x00,0x08,0xe0,0x44,0x10,0xf0,0x7f,0x10,0x7e,0x00,0x12,0x3a,
+0xa8,0x90,0x00,0x09,0xe0,0x54,0xf7,0xf0,0x7f,0x10,0x7e,0x00,0x12,0x3a,0xa8,0x90,
+0x00,0x28,0xe0,0x54,0xfe,0xf0,0x7f,0x10,0x7e,0x00,0x12,0x3a,0xa8,0x90,0x00,0x20,
+0xe0,0x54,0xfe,0xf0,0x7f,0x10,0x7e,0x00,0x12,0x3a,0xa8,0x90,0x00,0x25,0xe0,0x44,
+0x40,0xf0,0x7f,0x10,0x7e,0x00,0x12,0x3a,0xa8,0x90,0x00,0x09,0xe0,0x54,0xef,0xf0,
+0x7f,0x10,0x7e,0x00,0x02,0x3a,0xa8,0x8b,0x10,0x8a,0x11,0x89,0x12,0x12,0x7e,0xcd,
+0xab,0x10,0xaa,0x11,0xa9,0x12,0x12,0x1c,0xd6,0xf5,0x65,0x14,0x60,0x0e,0x14,0x60,
+0x0f,0x14,0x60,0x1a,0x24,0x03,0x70,0x3c,0x7f,0x01,0x80,0x35,0xe4,0xff,0x80,0x31,
+0x90,0x97,0x8a,0x74,0x01,0xf0,0x90,0x97,0x7f,0xf0,0xe4,0xff,0x80,0x23,0xab,0x10,
+0xaa,0x11,0xa9,0x12,0x90,0x00,0x02,0x12,0x1c,0xef,0xff,0x90,0x97,0x8a,0x70,0x05,
+0x74,0x05,0xf0,0x80,0x02,0xef,0xf0,0x90,0x97,0x8a,0xe0,0x90,0x97,0x7f,0xf0,0xe4,
+0xff,0x12,0x74,0x3d,0x22,0x90,0x00,0x25,0xe0,0x54,0xbf,0xf0,0x7f,0x10,0x7e,0x00,
+0x12,0x3a,0xa8,0x90,0x00,0x20,0xe0,0x44,0x01,0xf0,0x7f,0x10,0x7e,0x00,0x12,0x3a,
+0xa8,0x90,0x00,0x28,0xe0,0x44,0x01,0xf0,0x7f,0x10,0x7e,0x00,0x12,0x3a,0xa8,0x90,
+0x00,0xf0,0xe0,0x30,0xe1,0xf9,0x90,0x00,0x09,0xe0,0x44,0x08,0xf0,0x7f,0x10,0x7e,
+0x00,0x12,0x3a,0xa8,0x90,0x00,0x08,0xe0,0x54,0xef,0xf0,0x7f,0x10,0x7e,0x00,0x12,
+0x3a,0xa8,0x90,0x00,0x2b,0xe0,0x54,0xfe,0xf0,0x7f,0xe8,0x7e,0x03,0x02,0x3a,0xa8,
+0x90,0x00,0x45,0xe4,0xf0,0x90,0x04,0xfd,0xf0,0xa3,0xf0,0x90,0x97,0x6d,0xf0,0x90,
+0x97,0x73,0xf0,0x90,0x97,0x76,0xf0,0x90,0x97,0x74,0xf0,0x90,0x97,0x77,0xf0,0x90,
+0x97,0x75,0xf0,0x90,0x97,0x78,0xf0,0x90,0x97,0x5f,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,
+0xf0,0xa3,0xf0,0x90,0x97,0x64,0xf0,0x90,0x97,0x69,0xf0,0x90,0x97,0x6b,0xf0,0x90,
+0x97,0x7d,0xf0,0x90,0x97,0x6e,0xf0,0x90,0x97,0x6a,0xf0,0x90,0x97,0x63,0xf0,0x90,
+0x00,0x51,0xe0,0x44,0xc0,0xf0,0x22,0x8b,0x21,0x8a,0x22,0x89,0x23,0x90,0x97,0x98,
+0xeb,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,0xf0,0xa3,0xe5,0x24,0xf0,0xa3,0xe5,0x25,0xf0,
+0xa3,0xe5,0x26,0xf0,0xaf,0x27,0x15,0x27,0xef,0x60,0x2a,0x90,0x97,0x9b,0xe0,0xfb,
+0xa3,0xe4,0x75,0xf0,0x01,0x12,0x65,0xdf,0xa9,0xf0,0xfa,0x12,0x1c,0xd6,0xff,0x90,
+0x97,0x98,0xe0,0xfb,0xa3,0xe4,0x75,0xf0,0x01,0x12,0x65,0xdf,0xa9,0xf0,0xfa,0xef,
+0x12,0x65,0x95,0x80,0xcf,0xab,0x21,0xaa,0x22,0xa9,0x23,0x22,0x90,0x05,0x60,0xe0,
+0x90,0x97,0x79,0xf0,0x90,0x05,0x61,0xe0,0x90,0x97,0x7a,0xf0,0x90,0x05,0x62,0xe0,
+0x90,0x97,0x7b,0xf0,0x90,0x05,0x63,0xe0,0x90,0x97,0x7c,0xf0,0xc3,0x74,0xff,0x9f,
+0xfe,0x90,0x97,0x7a,0xe0,0xd3,0x9e,0x40,0x1e,0xe0,0x2f,0xf0,0xa3,0xe0,0xb4,0xff,
+0x0f,0xe4,0xf0,0xa3,0xe0,0xb4,0xff,0x03,0xe4,0xf0,0x22,0x90,0x97,0x7c,0x80,0x03,
+0x90,0x97,0x7b,0xe0,0x04,0xf0,0x22,0x90,0x97,0x7a,0xe0,0x2f,0xf0,0x22,0xe4,0xf5,
+0x64,0x90,0x97,0x8f,0xf0,0xf5,0x65,0x90,0x97,0x8b,0x74,0x0c,0xf0,0x90,0x97,0x88,
+0xf0,0xe4,0x90,0x97,0x8d,0xf0,0x90,0x97,0x87,0xf0,0x90,0x97,0x86,0xf0,0x90,0x97,
+0x8a,0x04,0xf0,0x90,0x97,0x7f,0xf0,0xe4,0x90,0x97,0x8e,0xf0,0x90,0x97,0x89,0xf0,
+0x90,0x97,0x81,0xf0,0x90,0x97,0x85,0x74,0x07,0xf0,0xe4,0x90,0x97,0x80,0xf0,0x90,
+0x97,0x83,0xf0,0xa3,0x74,0x02,0xf0,0xe4,0x90,0x97,0x8c,0xf0,0x22,0xe4,0x90,0x97,
+0xad,0xf0,0xa3,0xf0,0x90,0x01,0xc4,0x74,0x1d,0xf0,0x74,0x7a,0xa3,0xf0,0x90,0x05,
+0xf8,0xe0,0x70,0x0f,0xa3,0xe0,0x70,0x0b,0xa3,0xe0,0x70,0x07,0xa3,0xe0,0x70,0x03,
+0x7f,0x01,0x22,0xd3,0x90,0x97,0xae,0xe0,0x94,0xe8,0x90,0x97,0xad,0xe0,0x94,0x03,
+0x40,0x03,0x7f,0x00,0x22,0x7f,0x32,0x7e,0x00,0x12,0x3a,0xa8,0x90,0x97,0xae,0xe0,
+0x04,0xf0,0x70,0xca,0x90,0x97,0xad,0xe0,0x04,0xf0,0x80,0xc2,0xe4,0x90,0x97,0x95,
+0xf0,0xa2,0xaf,0x33,0x90,0x97,0x3b,0xf0,0x90,0x00,0x80,0xe0,0x20,0xe1,0x1a,0x12,
+0x3a,0xbe,0x12,0x3a,0xbe,0x90,0x97,0x3a,0xe0,0x64,0x01,0xf0,0xe0,0x24,0x6c,0x90,
+0x01,0xc4,0xf0,0x74,0x7a,0xa3,0xf0,0x80,0xdf,0x90,0x06,0x30,0x74,0x01,0xf0,0xc2,
+0xaf,0x90,0x00,0x80,0xe0,0x44,0x80,0xf0,0x7f,0x10,0x7e,0x00,0x12,0x3a,0xa8,0x90,
+0x97,0x3b,0xe0,0x24,0xff,0x92,0xaf,0x22,0x90,0x01,0xc4,0x74,0xb8,0xf0,0x74,0x7a,
+0xa3,0xf0,0xe5,0x55,0x70,0x37,0x90,0x97,0x8b,0xe0,0x54,0x0f,0xd3,0x94,0x01,0x50,
+0x2c,0x90,0x02,0x87,0xe0,0x70,0x26,0x90,0x97,0x96,0xe0,0xb4,0x02,0x10,0x90,0x97,
+0x90,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x08,0x80,0x0f,0x90,0x01,
+0xaf,0xe0,0x70,0x09,0x90,0x97,0x8c,0xe0,0x60,0x03,0x7f,0x01,0x22,0x7f,0x00,0x22,
+0x90,0x97,0x8e,0xe0,0x60,0x12,0xe4,0xf0,0xa3,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0x03,
+0x70,0x33,0x90,0x97,0x89,0xf0,0x80,0x23,0x90,0x97,0x80,0xe0,0x04,0xf0,0x90,0x97,
+0x8f,0xe0,0x54,0xef,0xf0,0x90,0x97,0x80,0xe0,0xd3,0x94,0x01,0x40,0x0d,0xe5,0x64,
+0xb4,0x01,0x12,0xa3,0xe0,0x70,0x0e,0xe0,0x04,0xf0,0x22,0x90,0x97,0x8b,0xe0,0xff,
+0x7d,0x01,0x12,0x6e,0xda,0x22,0xe4,0x90,0x97,0x3a,0xf0,0xef,0x90,0x00,0x31,0xf0,
+0xee,0x54,0x03,0xff,0xa3,0xe0,0x54,0xfc,0x4f,0xf0,0xa3,0xe0,0x54,0x7f,0xf0,0x90,
+0x00,0x30,0xe0,0x20,0xe7,0x0e,0x90,0x97,0x3a,0xe0,0xc3,0x94,0x64,0x50,0x05,0xe0,
+0x04,0xf0,0x80,0xeb,0x90,0x97,0x3a,0xe0,0xc3,0x94,0x64,0x50,0x0a,0x90,0x00,0x30,
+0xe0,0x12,0x65,0x95,0x7f,0x01,0x22,0x7f,0x00,0x22,0x90,0x01,0xc4,0x74,0x8a,0xf0,
+0x74,0x7b,0xa3,0xf0,0x90,0x04,0x1b,0xe0,0x54,0x7f,0x64,0x7f,0x70,0x2b,0x90,0x97,
+0x89,0xe0,0x64,0x01,0x60,0x23,0x90,0x97,0x8b,0xe0,0x54,0x0f,0xd3,0x94,0x02,0x50,
+0x18,0x90,0x97,0x8f,0xe0,0x20,0xe4,0x11,0x90,0x97,0x87,0xe0,0x64,0x01,0x60,0x09,
+0x90,0x97,0x81,0xe0,0x70,0x03,0x7f,0x01,0x22,0x7f,0x00,0x22,0x8f,0x66,0x90,0x01,
+0xc4,0x74,0xcc,0xf0,0x74,0x7b,0xa3,0xf0,0x90,0x97,0x94,0xe0,0xff,0x7d,0x01,0x12,
+0x71,0xc9,0xe5,0x66,0x60,0x10,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,
+0xe0,0x44,0x10,0xf0,0x80,0x0e,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,
+0xe0,0x54,0xef,0xf0,0x90,0x04,0x1f,0x74,0x01,0xf0,0x22,0x12,0x1c,0xd6,0xff,0xc3,
+0x94,0x20,0x50,0x15,0x90,0x00,0x02,0x12,0x1c,0xef,0xfe,0x74,0x23,0x2f,0xf5,0x82,
+0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0x80,0x0e,0xef,0xb4,0x20,0x0a,0x90,0x00,0x02,
+0x12,0x1c,0xef,0x90,0x93,0x61,0xf0,0x74,0x23,0x2f,0xf5,0x82,0xe4,0x34,0x95,0xf5,
+0x83,0xe0,0x90,0x04,0xb2,0xf0,0x22,0x90,0x01,0x37,0x74,0x02,0xf0,0x90,0x05,0x22,
+0x74,0xff,0xf0,0x12,0x7a,0x1d,0xef,0x70,0x06,0x90,0x01,0xc8,0x74,0xfd,0xf0,0x7d,
+0x02,0x7f,0x03,0x12,0x3a,0x2f,0xe5,0x65,0x60,0x05,0x7f,0x01,0x12,0x7e,0x99,0x12,
+0x6c,0x30,0x90,0x97,0x88,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x02,0xf0,0x22,0x90,0x00,
+0x02,0x12,0x1c,0xef,0x90,0x97,0x6d,0xf0,0xe0,0x90,0x04,0x9b,0xf0,0x90,0x97,0x6d,
+0xe0,0x60,0x04,0xe0,0xb4,0xff,0x1c,0xa2,0xaf,0xe4,0x33,0xf5,0x10,0xc2,0xaf,0x90,
+0x00,0x47,0xe0,0x54,0xfb,0xf0,0x7d,0x40,0x7f,0x01,0x12,0x39,0xf8,0xe5,0x10,0x24,
+0xff,0x92,0xaf,0x22,0x90,0x97,0x4a,0xee,0xf0,0xa3,0xef,0xf0,0x75,0x5e,0x01,0x8e,
+0x5f,0xf5,0x60,0x7f,0x0b,0x12,0x75,0xcf,0x12,0x7e,0x61,0xe4,0xff,0x12,0x7f,0x1b,
+0x90,0x97,0x4a,0xe0,0xfc,0xa3,0xe0,0xfd,0xec,0xfb,0x8d,0x48,0xe4,0xf5,0x49,0x7d,
+0x01,0x7f,0x60,0x7e,0x01,0x02,0x38,0xec,0x7d,0x02,0x7f,0x03,0x12,0x39,0xbe,0xe5,
+0x65,0x60,0x23,0x90,0x97,0x8d,0xe0,0x60,0x06,0x7d,0x01,0x7f,0x0c,0x80,0x0f,0x90,
+0x97,0x88,0xe0,0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x6e,
+0xda,0xe4,0xff,0x12,0x7e,0x99,0x22,0x90,0x02,0x09,0xe0,0xfd,0x12,0x1c,0xd6,0xfe,
+0xaf,0x05,0xed,0x2e,0x90,0x97,0x92,0xf0,0x90,0x00,0x01,0x12,0x1c,0xef,0xff,0xed,
+0x2f,0x90,0x97,0x93,0xf0,0x90,0x00,0x02,0x12,0x1c,0xef,0xff,0xae,0x05,0xed,0x2f,
+0x90,0x97,0x94,0xf0,0x22,0x90,0x06,0x34,0xe0,0x60,0x26,0x14,0x70,0x1b,0x7b,0x01,
+0x7a,0x06,0x79,0x35,0x7f,0xf9,0x7e,0x01,0x12,0x7b,0x46,0xbf,0x01,0x09,0x90,0x06,
+0x35,0xe0,0x54,0x0f,0xf0,0x80,0x05,0x80,0x00,0x02,0x7f,0x00,0xe4,0x90,0x06,0x34,
+0xf0,0x22,0x90,0x01,0xc4,0x74,0x72,0xf0,0x74,0x7d,0xa3,0xf0,0x90,0x04,0x1b,0xe0,
+0x54,0x7f,0xff,0xbf,0x7f,0x14,0x90,0x97,0x87,0xe0,0x70,0x0e,0x90,0x97,0x8b,0xe0,
+0x54,0x0f,0xd3,0x94,0x04,0x50,0x03,0x7f,0x01,0x22,0x7f,0x00,0x22,0x90,0x00,0x01,
+0x12,0x1c,0xef,0x90,0x97,0x8d,0xf0,0x12,0x1c,0xd6,0x65,0x65,0x60,0x15,0xa2,0xaf,
+0xe4,0x33,0x90,0x97,0x46,0xf0,0xc2,0xaf,0x12,0x78,0x17,0x90,0x97,0x46,0xe0,0x24,
+0xff,0x92,0xaf,0x22,0x90,0x97,0x2e,0xe0,0x54,0xf0,0x44,0x03,0xf0,0x54,0x0f,0x44,
+0x80,0xf0,0x90,0x97,0x33,0xe4,0xf0,0xa3,0x74,0x00,0xf0,0xa3,0x74,0x56,0xf0,0x7b,
+0x01,0x7a,0x97,0x79,0x2e,0x02,0x70,0x66,0x90,0x06,0x04,0xe0,0x54,0xbf,0xf0,0xef,
+0x60,0x0a,0xe5,0x64,0xb4,0x01,0x05,0xe4,0xff,0x12,0x7b,0xcc,0x90,0x97,0x88,0xe0,
+0x54,0xf0,0xf0,0xe0,0x44,0x0c,0xf0,0x22,0x90,0x97,0xb2,0xef,0xf0,0x12,0x71,0x1c,
+0x90,0x97,0xb2,0xe0,0x60,0x05,0x90,0x05,0x22,0xe4,0xf0,0x90,0x97,0x88,0xe0,0x54,
+0xf0,0xf0,0xe0,0x44,0x04,0xf0,0x22,0x90,0x06,0x04,0xe0,0x44,0x40,0xf0,0xe5,0x64,
+0xb4,0x01,0x05,0x7f,0x01,0x12,0x7b,0xcc,0x90,0x97,0x88,0xe0,0x54,0xf0,0xf0,0xe0,
+0x44,0x04,0xf0,0x22,0x90,0x97,0x88,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x01,0xf0,0x12,
+0x77,0xb5,0x12,0x78,0x75,0x90,0x97,0x88,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x02,0xf0,
+0x22,0x7f,0x0b,0x12,0x72,0x6f,0xef,0x65,0x61,0x60,0x10,0xe5,0x61,0xb4,0x01,0x05,
+0xe4,0xf5,0x61,0x80,0x03,0x75,0x61,0x01,0x7f,0x01,0x22,0x7f,0x00,0x22,0x90,0x01,
+0xc4,0x74,0x7e,0xf0,0x74,0x7e,0xa3,0xf0,0x90,0x97,0x93,0xe0,0xff,0xe4,0xfd,0x12,
+0x71,0xc9,0x90,0x04,0x1f,0x74,0x01,0xf0,0x22,0xef,0x60,0x0b,0x90,0x97,0x97,0xe0,
+0xb4,0x01,0x10,0xe4,0xff,0x80,0x09,0x90,0x97,0x97,0xe0,0xb4,0x01,0x05,0x7f,0x01,
+0x12,0x4e,0x3b,0x22,0x90,0x00,0x49,0xe0,0x90,0x97,0xb4,0xf0,0xe0,0x54,0x0f,0xf0,
+0xe0,0xff,0x44,0xf0,0x90,0x00,0x49,0xf0,0xef,0x44,0xb0,0xf0,0x22,0xe4,0x90,0x97,
+0x8e,0xf0,0x90,0x97,0x80,0xf0,0x90,0x97,0x89,0xf0,0x90,0x97,0x8f,0xf0,0x22,0xe5,
+0x5e,0xb4,0x01,0x0b,0x12,0x7e,0x61,0xbf,0x01,0x05,0x7f,0x01,0x12,0x7f,0x1b,0x22,
+0x90,0x09,0x28,0xef,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x22,
+0x90,0x06,0x34,0x74,0xff,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x22,0x41,0x97,
+0xb1,0x00,0x41,0x97,0x7e,0x80,0x41,0x97,0xb3,0x00,0x00,0x90,0x01,0xca,0xe5,0x61,
+0xf0,0xef,0x60,0x03,0x12,0x7e,0xb4,0x22,0x90,0x97,0x46,0xeb,0xf0,0xa3,0xea,0xf0,
+0xa3,0xe9,0xf0,0x22,0x90,0x97,0xa7,0xeb,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,0xf0,0x22,
+0x90,0x97,0xaa,0xeb,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,0xf0,0x22,0x8f,0x82,0x8e,0x83,
+0xa3,0xa3,0xa3,0xe4,0xf0,0x22,0xe4,0xf5,0x5e,0x7f,0x60,0x7e,0x01,0x02,0x7f,0x4c,
+0x90,0x97,0x97,0xe0,0x90,0x97,0x2d,0xf0,0x22,0x8f,0x1b,0x8c,0x1c,0x8d,0x1d,0x22,
+0x8f,0x1e,0x8c,0x1f,0x8d,0x20,0x22,0x12,0x1c,0xd6,0xf5,0x64,0x22,0x22,0x52,0x09,
+};
+
+u32 Rtl8192CUPHY_REG_2TArray[PHY_REG_2TArrayLength] = {
+0x024,0x0011800f,
+0x028,0x00ffdb83,
+0x800,0x80040002,
+0x804,0x00000003,
+0x808,0x0000fc00,
+0x80c,0x0000000a,
+0x810,0x10005388,
+0x814,0x020c3d10,
+0x818,0x02200385,
+0x81c,0x00000000,
+0x820,0x01000100,
+0x824,0x00390004,
+0x828,0x01000100,
+0x82c,0x00390004,
+0x830,0x27272727,
+0x834,0x27272727,
+0x838,0x27272727,
+0x83c,0x27272727,
+0x840,0x00010000,
+0x844,0x00010000,
+0x848,0x27272727,
+0x84c,0x27272727,
+0x850,0x00000000,
+0x854,0x00000000,
+0x858,0x569a569a,
+0x85c,0x0c1b25a4,
+0x860,0x66e60230,
+0x864,0x061f0130,
+0x868,0x27272727,
+0x86c,0x2b2b2b27,
+0x870,0x07000700,
+0x874,0x22184000,
+0x878,0x08080808,
+0x87c,0x00000000,
+0x880,0xc0083070,
+0x884,0x000004d5,
+0x888,0x00000000,
+0x88c,0xcc0000c0,
+0x890,0x00000800,
+0x894,0xfffffffe,
+0x898,0x40302010,
+0x89c,0x00706050,
+0x900,0x00000000,
+0x904,0x00000023,
+0x908,0x00000000,
+0x90c,0x81121313,
+0xa00,0x00d047c8,
+0xa04,0x80ff000c,
+0xa08,0x8c838300,
+0xa0c,0x2e68120f,
+0xa10,0x9500bb78,
+0xa14,0x11144028,
+0xa18,0x00881117,
+0xa1c,0x89140f00,
+0xa20,0x1a1b0000,
+0xa24,0x090e1317,
+0xa28,0x00000204,
+0xa2c,0x00d30000,
+0xa70,0x101fbf00,
+0xa74,0x00000007,
+0xc00,0x48071d40,
+0xc04,0x03a05633,
+0xc08,0x000000e4,
+0xc0c,0x6c6c6c6c,
+0xc10,0x08800000,
+0xc14,0x40000100,
+0xc18,0x08800000,
+0xc1c,0x40000100,
+0xc20,0x00000000,
+0xc24,0x00000000,
+0xc28,0x00000000,
+0xc2c,0x00000000,
+0xc30,0x69e9ac44,
+0xc34,0x469652cf,
+0xc38,0x49795994,
+0xc3c,0x0a97971c,
+0xc40,0x1f7c403f,
+0xc44,0x000100b7,
+0xc48,0xec020107,
+0xc4c,0x007f037f,
+0xc50,0x6954341e,
+0xc54,0x43bc0094,
+0xc58,0x6954341e,
+0xc5c,0x433c0094,
+0xc60,0x00000000,
+0xc64,0x5116848b,
+0xc68,0x47c00bff,
+0xc6c,0x00000036,
+0xc70,0x2c7f000d,
+0xc74,0x0186115b,
+0xc78,0x0000001f,
+0xc7c,0x00b99612,
+0xc80,0x40000100,
+0xc84,0x20f60000,
+0xc88,0x40000100,
+0xc8c,0x20200000,
+0xc90,0x00121820,
+0xc94,0x00000000,
+0xc98,0x00121820,
+0xc9c,0x00007f7f,
+0xca0,0x00000000,
+0xca4,0x00000080,
+0xca8,0x00000000,
+0xcac,0x00000000,
+0xcb0,0x00000000,
+0xcb4,0x00000000,
+0xcb8,0x00000000,
+0xcbc,0x28000000,
+0xcc0,0x00000000,
+0xcc4,0x00000000,
+0xcc8,0x00000000,
+0xccc,0x00000000,
+0xcd0,0x00000000,
+0xcd4,0x00000000,
+0xcd8,0x64b22427,
+0xcdc,0x00766932,
+0xce0,0x00222222,
+0xce4,0x00000000,
+0xce8,0x37644302,
+0xcec,0x2f97d40c,
+0xd00,0x00080740,
+0xd04,0x00020403,
+0xd08,0x0000907f,
+0xd0c,0x20010201,
+0xd10,0xa0633333,
+0xd14,0x3333bc43,
+0xd18,0x7a8f5b6b,
+0xd2c,0xcc979975,
+0xd30,0x00000000,
+0xd34,0x80608000,
+0xd38,0x00000000,
+0xd3c,0x00027293,
+0xd40,0x00000000,
+0xd44,0x00000000,
+0xd48,0x00000000,
+0xd4c,0x00000000,
+0xd50,0x6437140a,
+0xd54,0x00000000,
+0xd58,0x00000000,
+0xd5c,0x30032064,
+0xd60,0x4653de68,
+0xd64,0x04518a3c,
+0xd68,0x00002101,
+0xd6c,0x2a201c16,
+0xd70,0x1812362e,
+0xd74,0x322c2220,
+0xd78,0x000e3c24,
+0xe00,0x2a2a2a2a,
+0xe04,0x2a2a2a2a,
+0xe08,0x03902a2a,
+0xe10,0x2a2a2a2a,
+0xe14,0x2a2a2a2a,
+0xe18,0x2a2a2a2a,
+0xe1c,0x2a2a2a2a,
+0xe28,0x00000000,
+0xe30,0x1000dc1f,
+0xe34,0x10008c1f,
+0xe38,0x02140102,
+0xe3c,0x681604c2,
+0xe40,0x01007c00,
+0xe44,0x01004800,
+0xe48,0xfb000000,
+0xe4c,0x000028d1,
+0xe50,0x1000dc1f,
+0xe54,0x10008c1f,
+0xe58,0x02140102,
+0xe5c,0x28160d05,
+0xe60,0x00000010,
+0xe68,0x001b25a4,
+0xe6c,0x63db25a4,
+0xe70,0x63db25a4,
+0xe74,0x0c1b25a4,
+0xe78,0x0c1b25a4,
+0xe7c,0x0c1b25a4,
+0xe80,0x0c1b25a4,
+0xe84,0x63db25a4,
+0xe88,0x0c1b25a4,
+0xe8c,0x63db25a4,
+0xed0,0x63db25a4,
+0xed4,0x63db25a4,
+0xed8,0x63db25a4,
+0xedc,0x001b25a4,
+0xee0,0x001b25a4,
+0xeec,0x6fdb25a4,
+0xf14,0x00000003,
+0xf4c,0x00000000,
+0xf00,0x00000300,
+};
+
+u32 Rtl8192CUPHY_REG_1TArray[PHY_REG_1TArrayLength] = {
+0x024,0x0011800f,
+0x028,0x00ffdb83,
+0x800,0x80040000,
+0x804,0x00000001,
+0x808,0x0000fc00,
+0x80c,0x0000000a,
+0x810,0x10005388,
+0x814,0x020c3d10,
+0x818,0x02200385,
+0x81c,0x00000000,
+0x820,0x01000100,
+0x824,0x00390004,
+0x828,0x00000000,
+0x82c,0x00000000,
+0x830,0x00000000,
+0x834,0x00000000,
+0x838,0x00000000,
+0x83c,0x00000000,
+0x840,0x00010000,
+0x844,0x00000000,
+0x848,0x00000000,
+0x84c,0x00000000,
+0x850,0x00000000,
+0x854,0x00000000,
+0x858,0x569a569a,
+0x85c,0x001b25a4,
+0x860,0x66e60230,
+0x864,0x061f0130,
+0x868,0x00000000,
+0x86c,0x32323200,
+0x870,0x07000700,
+0x874,0x22004000,
+0x878,0x00000808,
+0x87c,0x00000000,
+0x880,0xc0083070,
+0x884,0x000004d5,
+0x888,0x00000000,
+0x88c,0xccc000c0,
+0x890,0x00000800,
+0x894,0xfffffffe,
+0x898,0x40302010,
+0x89c,0x00706050,
+0x900,0x00000000,
+0x904,0x00000023,
+0x908,0x00000000,
+0x90c,0x81121111,
+0xa00,0x00d047c8,
+0xa04,0x80ff000c,
+0xa08,0x8c838300,
+0xa0c,0x2e68120f,
+0xa10,0x9500bb78,
+0xa14,0x11144028,
+0xa18,0x00881117,
+0xa1c,0x89140f00,
+0xa20,0x1a1b0000,
+0xa24,0x090e1317,
+0xa28,0x00000204,
+0xa2c,0x00d30000,
+0xa70,0x101fbf00,
+0xa74,0x00000007,
+0xc00,0x48071d40,
+0xc04,0x03a05611,
+0xc08,0x000000e4,
+0xc0c,0x6c6c6c6c,
+0xc10,0x08800000,
+0xc14,0x40000100,
+0xc18,0x08800000,
+0xc1c,0x40000100,
+0xc20,0x00000000,
+0xc24,0x00000000,
+0xc28,0x00000000,
+0xc2c,0x00000000,
+0xc30,0x69e9ac44,
+0xc34,0x469652cf,
+0xc38,0x49795994,
+0xc3c,0x0a97971c,
+0xc40,0x1f7c403f,
+0xc44,0x000100b7,
+0xc48,0xec020107,
+0xc4c,0x007f037f,
+0xc50,0x6954341e,
+0xc54,0x43bc0094,
+0xc58,0x6954341e,
+0xc5c,0x433c0094,
+0xc60,0x00000000,
+0xc64,0x5116848b,
+0xc68,0x47c00bff,
+0xc6c,0x00000036,
+0xc70,0x2c7f000d,
+0xc74,0x018610db,
+0xc78,0x0000001f,
+0xc7c,0x00b91612,
+0xc80,0x40000100,
+0xc84,0x20f60000,
+0xc88,0x40000100,
+0xc8c,0x20200000,
+0xc90,0x00121820,
+0xc94,0x00000000,
+0xc98,0x00121820,
+0xc9c,0x00007f7f,
+0xca0,0x00000000,
+0xca4,0x00000080,
+0xca8,0x00000000,
+0xcac,0x00000000,
+0xcb0,0x00000000,
+0xcb4,0x00000000,
+0xcb8,0x00000000,
+0xcbc,0x28000000,
+0xcc0,0x00000000,
+0xcc4,0x00000000,
+0xcc8,0x00000000,
+0xccc,0x00000000,
+0xcd0,0x00000000,
+0xcd4,0x00000000,
+0xcd8,0x64b22427,
+0xcdc,0x00766932,
+0xce0,0x00222222,
+0xce4,0x00000000,
+0xce8,0x37644302,
+0xcec,0x2f97d40c,
+0xd00,0x00080740,
+0xd04,0x00020401,
+0xd08,0x0000907f,
+0xd0c,0x20010201,
+0xd10,0xa0633333,
+0xd14,0x3333bc43,
+0xd18,0x7a8f5b6b,
+0xd2c,0xcc979975,
+0xd30,0x00000000,
+0xd34,0x80608000,
+0xd38,0x00000000,
+0xd3c,0x00027293,
+0xd40,0x00000000,
+0xd44,0x00000000,
+0xd48,0x00000000,
+0xd4c,0x00000000,
+0xd50,0x6437140a,
+0xd54,0x00000000,
+0xd58,0x00000000,
+0xd5c,0x30032064,
+0xd60,0x4653de68,
+0xd64,0x04518a3c,
+0xd68,0x00002101,
+0xd6c,0x2a201c16,
+0xd70,0x1812362e,
+0xd74,0x322c2220,
+0xd78,0x000e3c24,
+0xe00,0x2a2a2a2a,
+0xe04,0x2a2a2a2a,
+0xe08,0x03902a2a,
+0xe10,0x2a2a2a2a,
+0xe14,0x2a2a2a2a,
+0xe18,0x2a2a2a2a,
+0xe1c,0x2a2a2a2a,
+0xe28,0x00000000,
+0xe30,0x1000dc1f,
+0xe34,0x10008c1f,
+0xe38,0x02140102,
+0xe3c,0x681604c2,
+0xe40,0x01007c00,
+0xe44,0x01004800,
+0xe48,0xfb000000,
+0xe4c,0x000028d1,
+0xe50,0x1000dc1f,
+0xe54,0x10008c1f,
+0xe58,0x02140102,
+0xe5c,0x28160d05,
+0xe60,0x00000008,
+0xe68,0x001b25a4,
+0xe6c,0x631b25a0,
+0xe70,0x631b25a0,
+0xe74,0x081b25a0,
+0xe78,0x081b25a0,
+0xe7c,0x081b25a0,
+0xe80,0x081b25a0,
+0xe84,0x631b25a0,
+0xe88,0x081b25a0,
+0xe8c,0x631b25a0,
+0xed0,0x631b25a0,
+0xed4,0x631b25a0,
+0xed8,0x631b25a0,
+0xedc,0x001b25a0,
+0xee0,0x001b25a0,
+0xeec,0x6b1b25a0,
+0xf14,0x00000003,
+0xf4c,0x00000000,
+0xf00,0x00000300,
+};
+
+u32 Rtl8192CUPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength] = {
+0x0, };
+
+u32 Rtl8192CUPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength] = {
+0x0, };
+
+u32 Rtl8192CUPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength] = {
+0x0, };
+
+u32 Rtl8192CUPHY_REG_Array_PG[PHY_REG_Array_PGLength] = {
+0xe00,0xffffffff,0x07090c0c,
+0xe04,0xffffffff,0x01020405,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x0b0c0c0e,
+0xe14,0xffffffff,0x01030506,
+0xe18,0xffffffff,0x0b0c0d0e,
+0xe1c,0xffffffff,0x01030509,
+0x830,0xffffffff,0x07090c0c,
+0x834,0xffffffff,0x01020405,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x0b0c0d0e,
+0x848,0xffffffff,0x01030509,
+0x84c,0xffffffff,0x0b0c0d0e,
+0x868,0xffffffff,0x01030509,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x04040404,
+0xe04,0xffffffff,0x00020204,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x06060606,
+0xe14,0xffffffff,0x00020406,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x04040404,
+0x834,0xffffffff,0x00020204,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x06060606,
+0x848,0xffffffff,0x00020406,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x04040404,
+0xe04,0xffffffff,0x00020204,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x04040404,
+0x834,0xffffffff,0x00020204,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+};
+
+u32  Rtl8192CUPHY_REG_Array_PG_mCard[PHY_REG_Array_PG_mCardLength] = {
+0xe00,0xffffffff,0x0a0c0c0c,
+0xe04,0xffffffff,0x02040608,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x0a0c0d0e,
+0xe14,0xffffffff,0x02040608,
+0xe18,0xffffffff,0x0a0c0d0e,
+0xe1c,0xffffffff,0x02040608,
+0x830,0xffffffff,0x0a0c0c0c,
+0x834,0xffffffff,0x02040608,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x0a0c0d0e,
+0x848,0xffffffff,0x02040608,
+0x84c,0xffffffff,0x0a0c0d0e,
+0x868,0xffffffff,0x02040608,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x04040404,
+0xe04,0xffffffff,0x00020204,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x06060606,
+0xe14,0xffffffff,0x00020406,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x04040404,
+0x834,0xffffffff,0x00020204,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x06060606,
+0x848,0xffffffff,0x00020406,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x04040404,
+0xe04,0xffffffff,0x00020204,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x04040404,
+0x834,0xffffffff,0x00020204,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+};
+
+u32 Rtl8192CUPHY_REG_Array_MP[PHY_REG_Array_MPLength] = {
+0xc30,0x69e9ac4a,
+0xc3c,0x0a979718,
+};
+
+u32 Rtl8192CUPHY_REG_1T_HPArray[PHY_REG_1T_HPArrayLength] = {
+0x024,0x0011800f,
+0x028,0x00ffdb83,
+0x040,0x000c0004,
+0x800,0x80040000,
+0x804,0x00000001,
+0x808,0x0000fc00,
+0x80c,0x0000000a,
+0x810,0x10005388,
+0x814,0x020c3d10,
+0x818,0x02200385,
+0x81c,0x00000000,
+0x820,0x01000100,
+0x824,0x00390204,
+0x828,0x00000000,
+0x82c,0x00000000,
+0x830,0x00000000,
+0x834,0x00000000,
+0x838,0x00000000,
+0x83c,0x00000000,
+0x840,0x00010000,
+0x844,0x00000000,
+0x848,0x00000000,
+0x84c,0x00000000,
+0x850,0x00000000,
+0x854,0x00000000,
+0x858,0x569a569a,
+0x85c,0x001b25a4,
+0x860,0x66e60230,
+0x864,0x061f0130,
+0x868,0x00000000,
+0x86c,0x20202000,
+0x870,0x03000300,
+0x874,0x22004000,
+0x878,0x00000808,
+0x87c,0x00ffc3f1,
+0x880,0xc0083070,
+0x884,0x000004d5,
+0x888,0x00000000,
+0x88c,0xccc000c0,
+0x890,0x00000800,
+0x894,0xfffffffe,
+0x898,0x40302010,
+0x89c,0x00706050,
+0x900,0x00000000,
+0x904,0x00000023,
+0x908,0x00000000,
+0x90c,0x81121111,
+0xa00,0x00d047c8,
+0xa04,0x80ff000c,
+0xa08,0x8c838300,
+0xa0c,0x2e68120f,
+0xa10,0x9500bb78,
+0xa14,0x11144028,
+0xa18,0x00881117,
+0xa1c,0x89140f00,
+0xa20,0x15160000,
+0xa24,0x070b0f12,
+0xa28,0x00000104,
+0xa2c,0x00d30000,
+0xa70,0x101fbf00,
+0xa74,0x00000007,
+0xc00,0x48071d40,
+0xc04,0x03a05611,
+0xc08,0x000000e4,
+0xc0c,0x6c6c6c6c,
+0xc10,0x08800000,
+0xc14,0x40000100,
+0xc18,0x08800000,
+0xc1c,0x40000100,
+0xc20,0x00000000,
+0xc24,0x00000000,
+0xc28,0x00000000,
+0xc2c,0x00000000,
+0xc30,0x69e9ac44,
+0xc34,0x469652cf,
+0xc38,0x49795994,
+0xc3c,0x0a97971c,
+0xc40,0x1f7c403f,
+0xc44,0x000100b7,
+0xc48,0xec020107,
+0xc4c,0x007f037f,
+0xc50,0x6954342e,
+0xc54,0x43bc0094,
+0xc58,0x6954342f,
+0xc5c,0x433c0094,
+0xc60,0x00000000,
+0xc64,0x5116848b,
+0xc68,0x47c00bff,
+0xc6c,0x00000036,
+0xc70,0x2c46000d,
+0xc74,0x018610db,
+0xc78,0x0000001f,
+0xc7c,0x00b91612,
+0xc80,0x24000090,
+0xc84,0x20f60000,
+0xc88,0x24000090,
+0xc8c,0x20200000,
+0xc90,0x00121820,
+0xc94,0x00000000,
+0xc98,0x00121820,
+0xc9c,0x00007f7f,
+0xca0,0x00000000,
+0xca4,0x00000080,
+0xca8,0x00000000,
+0xcac,0x00000000,
+0xcb0,0x00000000,
+0xcb4,0x00000000,
+0xcb8,0x00000000,
+0xcbc,0x28000000,
+0xcc0,0x00000000,
+0xcc4,0x00000000,
+0xcc8,0x00000000,
+0xccc,0x00000000,
+0xcd0,0x00000000,
+0xcd4,0x00000000,
+0xcd8,0x64b22427,
+0xcdc,0x00766932,
+0xce0,0x00222222,
+0xce4,0x00000000,
+0xce8,0x37644302,
+0xcec,0x2f97d40c,
+0xd00,0x00080740,
+0xd04,0x00020401,
+0xd08,0x0000907f,
+0xd0c,0x20010201,
+0xd10,0xa0633333,
+0xd14,0x3333bc43,
+0xd18,0x7a8f5b6b,
+0xd2c,0xcc979975,
+0xd30,0x00000000,
+0xd34,0x80608000,
+0xd38,0x00000000,
+0xd3c,0x00027293,
+0xd40,0x00000000,
+0xd44,0x00000000,
+0xd48,0x00000000,
+0xd4c,0x00000000,
+0xd50,0x6437140a,
+0xd54,0x00000000,
+0xd58,0x00000000,
+0xd5c,0x30032064,
+0xd60,0x4653de68,
+0xd64,0x04518a3c,
+0xd68,0x00002101,
+0xd6c,0x2a201c16,
+0xd70,0x1812362e,
+0xd74,0x322c2220,
+0xd78,0x000e3c24,
+0xe00,0x24242424,
+0xe04,0x24242424,
+0xe08,0x03902024,
+0xe10,0x24242424,
+0xe14,0x24242424,
+0xe18,0x24242424,
+0xe1c,0x24242424,
+0xe28,0x00000000,
+0xe30,0x1000dc1f,
+0xe34,0x10008c1f,
+0xe38,0x02140102,
+0xe3c,0x681604c2,
+0xe40,0x01007c00,
+0xe44,0x01004800,
+0xe48,0xfb000000,
+0xe4c,0x000028d1,
+0xe50,0x1000dc1f,
+0xe54,0x10008c1f,
+0xe58,0x02140102,
+0xe5c,0x28160d05,
+0xe60,0x00000008,
+0xe68,0x001b25a4,
+0xe6c,0x631b25a0,
+0xe70,0x631b25a0,
+0xe74,0x081b25a0,
+0xe78,0x081b25a0,
+0xe7c,0x081b25a0,
+0xe80,0x081b25a0,
+0xe84,0x631b25a0,
+0xe88,0x081b25a0,
+0xe8c,0x631b25a0,
+0xed0,0x631b25a0,
+0xed4,0x631b25a0,
+0xed8,0x631b25a0,
+0xedc,0x001b25a0,
+0xee0,0x001b25a0,
+0xeec,0x6b1b25a0,
+0xee8,0x31555448,
+0xf14,0x00000003,
+0xf4c,0x00000000,
+0xf00,0x00000300,
+};
+
+u32 Rtl8192CUPHY_REG_1T_mCardArray[PHY_REG_1T_mCardArrayLength] = {
+0x024,0x0011800d,
+0x028,0x00ffdb83,
+0x800,0x80040000,
+0x804,0x00000001,
+0x808,0x0000fc00,
+0x80c,0x0000000a,
+0x810,0x10005388,
+0x814,0x020c3d10,
+0x818,0x02200385,
+0x81c,0x00000000,
+0x820,0x01000100,
+0x824,0x00390004,
+0x828,0x00000000,
+0x82c,0x00000000,
+0x830,0x00000000,
+0x834,0x00000000,
+0x838,0x00000000,
+0x83c,0x00000000,
+0x840,0x00010000,
+0x844,0x00000000,
+0x848,0x00000000,
+0x84c,0x00000000,
+0x850,0x00000000,
+0x854,0x00000000,
+0x858,0x569a569a,
+0x85c,0x001b25a4,
+0x860,0x66e60230,
+0x864,0x061f0130,
+0x868,0x00000000,
+0x86c,0x32323200,
+0x870,0x07000700,
+0x874,0x22004000,
+0x878,0x00000808,
+0x87c,0x00000000,
+0x880,0xc0083070,
+0x884,0x000004d5,
+0x888,0x00000000,
+0x88c,0xccc000c0,
+0x890,0x00000800,
+0x894,0xfffffffe,
+0x898,0x40302010,
+0x89c,0x00706050,
+0x900,0x00000000,
+0x904,0x00000023,
+0x908,0x00000000,
+0x90c,0x81121111,
+0xa00,0x00d047c8,
+0xa04,0x80ff000c,
+0xa08,0x8c838300,
+0xa0c,0x2e68120f,
+0xa10,0x9500bb78,
+0xa14,0x11144028,
+0xa18,0x00881117,
+0xa1c,0x89140f00,
+0xa20,0x1a1b0000,
+0xa24,0x090e1317,
+0xa28,0x00000204,
+0xa2c,0x00d30000,
+0xa70,0x101fbf00,
+0xa74,0x00000007,
+0xc00,0x48071d40,
+0xc04,0x03a05611,
+0xc08,0x000000e4,
+0xc0c,0x6c6c6c6c,
+0xc10,0x08800000,
+0xc14,0x40000100,
+0xc18,0x08800000,
+0xc1c,0x40000100,
+0xc20,0x00000000,
+0xc24,0x00000000,
+0xc28,0x00000000,
+0xc2c,0x00000000,
+0xc30,0x69e9ac44,
+0xc34,0x469652cf,
+0xc38,0x49795994,
+0xc3c,0x0a97971c,
+0xc40,0x1f7c403f,
+0xc44,0x000100b7,
+0xc48,0xec020107,
+0xc4c,0x007f037f,
+0xc50,0x6954341e,
+0xc54,0x43bc0094,
+0xc58,0x6954341e,
+0xc5c,0x433c0094,
+0xc60,0x00000000,
+0xc64,0x5116848b,
+0xc68,0x47c00bff,
+0xc6c,0x00000036,
+0xc70,0x2c7f000d,
+0xc74,0x018610db,
+0xc78,0x0000001f,
+0xc7c,0x00b91612,
+0xc80,0x40000100,
+0xc84,0x20f60000,
+0xc88,0x40000100,
+0xc8c,0x20200000,
+0xc90,0x00121820,
+0xc94,0x00000000,
+0xc98,0x00121820,
+0xc9c,0x00007f7f,
+0xca0,0x00000000,
+0xca4,0x00000080,
+0xca8,0x00000000,
+0xcac,0x00000000,
+0xcb0,0x00000000,
+0xcb4,0x00000000,
+0xcb8,0x00000000,
+0xcbc,0x28000000,
+0xcc0,0x00000000,
+0xcc4,0x00000000,
+0xcc8,0x00000000,
+0xccc,0x00000000,
+0xcd0,0x00000000,
+0xcd4,0x00000000,
+0xcd8,0x64b22427,
+0xcdc,0x00766932,
+0xce0,0x00222222,
+0xce4,0x00000000,
+0xce8,0x37644302,
+0xcec,0x2f97d40c,
+0xd00,0x00080740,
+0xd04,0x00020401,
+0xd08,0x0000907f,
+0xd0c,0x20010201,
+0xd10,0xa0633333,
+0xd14,0x3333bc43,
+0xd18,0x7a8f5b6b,
+0xd2c,0xcc979975,
+0xd30,0x00000000,
+0xd34,0x80608000,
+0xd38,0x00000000,
+0xd3c,0x00027293,
+0xd40,0x00000000,
+0xd44,0x00000000,
+0xd48,0x00000000,
+0xd4c,0x00000000,
+0xd50,0x6437140a,
+0xd54,0x00000000,
+0xd58,0x00000000,
+0xd5c,0x30032064,
+0xd60,0x4653de68,
+0xd64,0x04518a3c,
+0xd68,0x00002101,
+0xd6c,0x2a201c16,
+0xd70,0x1812362e,
+0xd74,0x322c2220,
+0xd78,0x000e3c24,
+0xe00,0x2a2a2a2a,
+0xe04,0x2a2a2a2a,
+0xe08,0x03902a2a,
+0xe10,0x2a2a2a2a,
+0xe14,0x2a2a2a2a,
+0xe18,0x2a2a2a2a,
+0xe1c,0x2a2a2a2a,
+0xe28,0x00000000,
+0xe30,0x1000dc1f,
+0xe34,0x10008c1f,
+0xe38,0x02140102,
+0xe3c,0x681604c2,
+0xe40,0x01007c00,
+0xe44,0x01004800,
+0xe48,0xfb000000,
+0xe4c,0x000028d1,
+0xe50,0x1000dc1f,
+0xe54,0x10008c1f,
+0xe58,0x02140102,
+0xe5c,0x28160d05,
+0xe60,0x00000008,
+0xe68,0x001b25a4,
+0xe6c,0x631b25a0,
+0xe70,0x631b25a0,
+0xe74,0x081b25a0,
+0xe78,0x081b25a0,
+0xe7c,0x081b25a0,
+0xe80,0x081b25a0,
+0xe84,0x631b25a0,
+0xe88,0x081b25a0,
+0xe8c,0x631b25a0,
+0xed0,0x631b25a0,
+0xed4,0x631b25a0,
+0xed8,0x631b25a0,
+0xedc,0x001b25a0,
+0xee0,0x001b25a0,
+0xeec,0x6b1b25a0,
+0xf14,0x00000003,
+0xf4c,0x00000000,
+0xf00,0x00000300,
+};
+
+u32 Rtl8192CUPHY_REG_2T_mCardArray[PHY_REG_2T_mCardArrayLength] = {
+0x024,0x0011800d,
+0x028,0x00ffdb83,
+0x800,0x80040002,
+0x804,0x00000003,
+0x808,0x0000fc00,
+0x80c,0x0000000a,
+0x810,0x10005388,
+0x814,0x020c3d10,
+0x818,0x02200385,
+0x81c,0x00000000,
+0x820,0x01000100,
+0x824,0x00390004,
+0x828,0x01000100,
+0x82c,0x00390004,
+0x830,0x27272727,
+0x834,0x27272727,
+0x838,0x27272727,
+0x83c,0x27272727,
+0x840,0x00010000,
+0x844,0x00010000,
+0x848,0x27272727,
+0x84c,0x27272727,
+0x850,0x00000000,
+0x854,0x00000000,
+0x858,0x569a569a,
+0x85c,0x0c1b25a4,
+0x860,0x66e60230,
+0x864,0x061f0130,
+0x868,0x27272727,
+0x86c,0x2b2b2b27,
+0x870,0x07000700,
+0x874,0x22184000,
+0x878,0x08080808,
+0x87c,0x00000000,
+0x880,0xc0083070,
+0x884,0x000004d5,
+0x888,0x00000000,
+0x88c,0xcc0000c0,
+0x890,0x00000800,
+0x894,0xfffffffe,
+0x898,0x40302010,
+0x89c,0x00706050,
+0x900,0x00000000,
+0x904,0x00000023,
+0x908,0x00000000,
+0x90c,0x81121313,
+0xa00,0x00d047c8,
+0xa04,0x80ff000c,
+0xa08,0x8c838300,
+0xa0c,0x2e68120f,
+0xa10,0x9500bb78,
+0xa14,0x11144028,
+0xa18,0x00881117,
+0xa1c,0x89140f00,
+0xa20,0x1a1b0000,
+0xa24,0x090e1317,
+0xa28,0x00000204,
+0xa2c,0x00d30000,
+0xa70,0x101fbf00,
+0xa74,0x00000007,
+0xc00,0x48071d40,
+0xc04,0x03a05633,
+0xc08,0x000000e4,
+0xc0c,0x6c6c6c6c,
+0xc10,0x08800000,
+0xc14,0x40000100,
+0xc18,0x08800000,
+0xc1c,0x40000100,
+0xc20,0x00000000,
+0xc24,0x00000000,
+0xc28,0x00000000,
+0xc2c,0x00000000,
+0xc30,0x69e9ac44,
+0xc34,0x469652cf,
+0xc38,0x49795994,
+0xc3c,0x0a97971c,
+0xc40,0x1f7c403f,
+0xc44,0x000100b7,
+0xc48,0xec020107,
+0xc4c,0x007f037f,
+0xc50,0x6954341e,
+0xc54,0x43bc0094,
+0xc58,0x6954341e,
+0xc5c,0x433c0094,
+0xc60,0x00000000,
+0xc64,0x5116848b,
+0xc68,0x47c00bff,
+0xc6c,0x00000036,
+0xc70,0x2c7f000d,
+0xc74,0x018610db,
+0xc78,0x0000001f,
+0xc7c,0x00b91612,
+0xc80,0x40000100,
+0xc84,0x20f60000,
+0xc88,0x40000100,
+0xc8c,0x20200000,
+0xc90,0x00121820,
+0xc94,0x00000000,
+0xc98,0x00121820,
+0xc9c,0x00007f7f,
+0xca0,0x00000000,
+0xca4,0x00000080,
+0xca8,0x00000000,
+0xcac,0x00000000,
+0xcb0,0x00000000,
+0xcb4,0x00000000,
+0xcb8,0x00000000,
+0xcbc,0x28000000,
+0xcc0,0x00000000,
+0xcc4,0x00000000,
+0xcc8,0x00000000,
+0xccc,0x00000000,
+0xcd0,0x00000000,
+0xcd4,0x00000000,
+0xcd8,0x64b22427,
+0xcdc,0x00766932,
+0xce0,0x00222222,
+0xce4,0x00000000,
+0xce8,0x37644302,
+0xcec,0x2f97d40c,
+0xd00,0x00080740,
+0xd04,0x00020403,
+0xd08,0x0000907f,
+0xd0c,0x20010201,
+0xd10,0xa0633333,
+0xd14,0x3333bc43,
+0xd18,0x7a8f5b6b,
+0xd2c,0xcc979975,
+0xd30,0x00000000,
+0xd34,0x80608000,
+0xd38,0x00000000,
+0xd3c,0x00027293,
+0xd40,0x00000000,
+0xd44,0x00000000,
+0xd48,0x00000000,
+0xd4c,0x00000000,
+0xd50,0x6437140a,
+0xd54,0x00000000,
+0xd58,0x00000000,
+0xd5c,0x30032064,
+0xd60,0x4653de68,
+0xd64,0x04518a3c,
+0xd68,0x00002101,
+0xd6c,0x2a201c16,
+0xd70,0x1812362e,
+0xd74,0x322c2220,
+0xd78,0x000e3c24,
+0xe00,0x2a2a2a2a,
+0xe04,0x2a2a2a2a,
+0xe08,0x03902a2a,
+0xe10,0x2a2a2a2a,
+0xe14,0x2a2a2a2a,
+0xe18,0x2a2a2a2a,
+0xe1c,0x2a2a2a2a,
+0xe28,0x00000000,
+0xe30,0x1000dc1f,
+0xe34,0x10008c1f,
+0xe38,0x02140102,
+0xe3c,0x681604c2,
+0xe40,0x01007c00,
+0xe44,0x01004800,
+0xe48,0xfb000000,
+0xe4c,0x000028d1,
+0xe50,0x1000dc1f,
+0xe54,0x10008c1f,
+0xe58,0x02140102,
+0xe5c,0x28160d05,
+0xe60,0x00000010,
+0xe68,0x001b25a4,
+0xe6c,0x63db25a4,
+0xe70,0x63db25a4,
+0xe74,0x0c1b25a4,
+0xe78,0x0c1b25a4,
+0xe7c,0x0c1b25a4,
+0xe80,0x0c1b25a4,
+0xe84,0x63db25a4,
+0xe88,0x0c1b25a4,
+0xe8c,0x63db25a4,
+0xed0,0x63db25a4,
+0xed4,0x63db25a4,
+0xed8,0x63db25a4,
+0xedc,0x001b25a4,
+0xee0,0x001b25a4,
+0xeec,0x6fdb25a4,
+0xf14,0x00000003,
+0xf4c,0x00000000,
+0xf00,0x00000300,
+};
+
+u32 Rtl8192CUPHY_REG_Array_PG_HP[PHY_REG_Array_PG_HPLength] = {
+0xe00,0xffffffff,0x06080808,
+0xe04,0xffffffff,0x00040406,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x04060608,
+0xe14,0xffffffff,0x00020204,
+0xe18,0xffffffff,0x04060608,
+0xe1c,0xffffffff,0x00020204,
+0x830,0xffffffff,0x06080808,
+0x834,0xffffffff,0x00040406,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x04060608,
+0x848,0xffffffff,0x00020204,
+0x84c,0xffffffff,0x04060608,
+0x868,0xffffffff,0x00020204,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+};
+
+u32 Rtl8192CURadioA_2TArray[RadioA_2TArrayLength] = {
+0x000,0x00030159,
+0x001,0x00031284,
+0x002,0x00098000,
+0x003,0x00018c63,
+0x004,0x000210e7,
+0x009,0x0002044f,
+0x00a,0x0001adb1,
+0x00b,0x00054867,
+0x00c,0x0008992e,
+0x00d,0x0000e52c,
+0x00e,0x00039ce7,
+0x00f,0x00000451,
+0x019,0x00000000,
+0x01a,0x00010255,
+0x01b,0x00060a00,
+0x01c,0x000fc378,
+0x01d,0x000a1250,
+0x01e,0x0004445f,
+0x01f,0x00080001,
+0x020,0x0000b614,
+0x021,0x0006c000,
+0x022,0x00000000,
+0x023,0x00001558,
+0x024,0x00000060,
+0x025,0x00000483,
+0x026,0x0004f000,
+0x027,0x000ec7d9,
+0x028,0x000577c0,
+0x029,0x00004783,
+0x02a,0x00000001,
+0x02b,0x00021334,
+0x02a,0x00000000,
+0x02b,0x00000054,
+0x02a,0x00000001,
+0x02b,0x00000808,
+0x02b,0x00053333,
+0x02c,0x0000000c,
+0x02a,0x00000002,
+0x02b,0x00000808,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000003,
+0x02b,0x00000808,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000004,
+0x02b,0x00000808,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000005,
+0x02b,0x00000808,
+0x02b,0x00073333,
+0x02c,0x0000000d,
+0x02a,0x00000006,
+0x02b,0x00000709,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000007,
+0x02b,0x00000709,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000008,
+0x02b,0x0000060a,
+0x02b,0x0004b333,
+0x02c,0x0000000d,
+0x02a,0x00000009,
+0x02b,0x0000060a,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000a,
+0x02b,0x0000060a,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x0000000b,
+0x02b,0x0000060a,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x0000000c,
+0x02b,0x0000060a,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x0000000d,
+0x02b,0x0000060a,
+0x02b,0x00073333,
+0x02c,0x0000000d,
+0x02a,0x0000000e,
+0x02b,0x0000050b,
+0x02b,0x00066666,
+0x02c,0x0000001a,
+0x02a,0x000e0000,
+0x010,0x0004000f,
+0x011,0x000e31fc,
+0x010,0x0006000f,
+0x011,0x000ff9f8,
+0x010,0x0002000f,
+0x011,0x000203f9,
+0x010,0x0003000f,
+0x011,0x000ff500,
+0x010,0x00000000,
+0x011,0x00000000,
+0x010,0x0008000f,
+0x011,0x0003f100,
+0x010,0x0009000f,
+0x011,0x00023100,
+0x012,0x00032000,
+0x012,0x00071000,
+0x012,0x000b0000,
+0x012,0x000fc000,
+0x013,0x000287b3,
+0x013,0x000244b7,
+0x013,0x000204ab,
+0x013,0x0001c49f,
+0x013,0x00018493,
+0x013,0x0001429b,
+0x013,0x00010299,
+0x013,0x0000c29c,
+0x013,0x000081a0,
+0x013,0x000040ac,
+0x013,0x00000020,
+0x014,0x0001944c,
+0x014,0x00059444,
+0x014,0x0009944c,
+0x014,0x000d9444,
+0x015,0x0000f424,
+0x015,0x0004f424,
+0x015,0x0008f424,
+0x015,0x000cf424,
+0x016,0x000e0330,
+0x016,0x000a0330,
+0x016,0x00060330,
+0x016,0x00020330,
+0x000,0x00010159,
+0x018,0x0000f401,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x01f,0x00080003,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x01e,0x00044457,
+0x01f,0x00080000,
+0x000,0x00030159,
+};
+
+u32 Rtl8192CURadioB_2TArray[RadioB_2TArrayLength] = {
+0x000,0x00030159,
+0x001,0x00031284,
+0x002,0x00098000,
+0x003,0x00018c63,
+0x004,0x000210e7,
+0x009,0x0002044f,
+0x00a,0x0001adb1,
+0x00b,0x00054867,
+0x00c,0x0008992e,
+0x00d,0x0000e52c,
+0x00e,0x00039ce7,
+0x00f,0x00000451,
+0x012,0x00032000,
+0x012,0x00071000,
+0x012,0x000b0000,
+0x012,0x000fc000,
+0x013,0x000287af,
+0x013,0x000244b7,
+0x013,0x000204ab,
+0x013,0x0001c49f,
+0x013,0x00018493,
+0x013,0x00014297,
+0x013,0x00010295,
+0x013,0x0000c298,
+0x013,0x0000819c,
+0x013,0x000040a8,
+0x013,0x0000001c,
+0x014,0x0001944c,
+0x014,0x00059444,
+0x014,0x0009944c,
+0x014,0x000d9444,
+0x015,0x0000f424,
+0x015,0x0004f424,
+0x015,0x0008f424,
+0x015,0x000cf424,
+0x016,0x000e0330,
+0x016,0x000a0330,
+0x016,0x00060330,
+0x016,0x00020330,
+};
+
+u32 Rtl8192CURadioA_1TArray[RadioA_1TArrayLength] = {
+0x000,0x00030159,
+0x001,0x00031284,
+0x002,0x00098000,
+0x003,0x00018c63,
+0x004,0x000210e7,
+0x009,0x0002044f,
+0x00a,0x0001adb1,
+0x00b,0x00054867,
+0x00c,0x0008992e,
+0x00d,0x0000e52c,
+0x00e,0x00039ce7,
+0x00f,0x00000451,
+0x019,0x00000000,
+0x01a,0x00010255,
+0x01b,0x00060a00,
+0x01c,0x000fc378,
+0x01d,0x000a1250,
+0x01e,0x0004445f,
+0x01f,0x00080001,
+0x020,0x0000b614,
+0x021,0x0006c000,
+0x022,0x00000000,
+0x023,0x00001558,
+0x024,0x00000060,
+0x025,0x00000483,
+0x026,0x0004f000,
+0x027,0x000ec7d9,
+0x028,0x000577c0,
+0x029,0x00004783,
+0x02a,0x00000001,
+0x02b,0x00021334,
+0x02a,0x00000000,
+0x02b,0x00000054,
+0x02a,0x00000001,
+0x02b,0x00000808,
+0x02b,0x00053333,
+0x02c,0x0000000c,
+0x02a,0x00000002,
+0x02b,0x00000808,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000003,
+0x02b,0x00000808,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000004,
+0x02b,0x00000808,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000005,
+0x02b,0x00000808,
+0x02b,0x00073333,
+0x02c,0x0000000d,
+0x02a,0x00000006,
+0x02b,0x00000709,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000007,
+0x02b,0x00000709,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000008,
+0x02b,0x0000060a,
+0x02b,0x0004b333,
+0x02c,0x0000000d,
+0x02a,0x00000009,
+0x02b,0x0000060a,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000a,
+0x02b,0x0000060a,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x0000000b,
+0x02b,0x0000060a,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x0000000c,
+0x02b,0x0000060a,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x0000000d,
+0x02b,0x0000060a,
+0x02b,0x00073333,
+0x02c,0x0000000d,
+0x02a,0x0000000e,
+0x02b,0x0000050b,
+0x02b,0x00066666,
+0x02c,0x0000001a,
+0x02a,0x000e0000,
+0x010,0x0004000f,
+0x011,0x000e31fc,
+0x010,0x0006000f,
+0x011,0x000ff9f8,
+0x010,0x0002000f,
+0x011,0x000203f9,
+0x010,0x0003000f,
+0x011,0x000ff500,
+0x010,0x00000000,
+0x011,0x00000000,
+0x010,0x0008000f,
+0x011,0x0003f100,
+0x010,0x0009000f,
+0x011,0x00023100,
+0x012,0x00032000,
+0x012,0x00071000,
+0x012,0x000b0000,
+0x012,0x000fc000,
+0x013,0x000287b3,
+0x013,0x000244b7,
+0x013,0x000204ab,
+0x013,0x0001c49f,
+0x013,0x00018493,
+0x013,0x0001429b,
+0x013,0x00010299,
+0x013,0x0000c29c,
+0x013,0x000081a0,
+0x013,0x000040ac,
+0x013,0x00000020,
+0x014,0x0001944c,
+0x014,0x00059444,
+0x014,0x0009944c,
+0x014,0x000d9444,
+0x015,0x0000f405,
+0x015,0x0004f405,
+0x015,0x0008f405,
+0x015,0x000cf405,
+0x016,0x000e0330,
+0x016,0x000a0330,
+0x016,0x00060330,
+0x016,0x00020330,
+0x000,0x00010159,
+0x018,0x0000f401,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x01f,0x00080003,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x01e,0x00044457,
+0x01f,0x00080000,
+0x000,0x00030159,
+};
+
+u32 Rtl8192CURadioB_1TArray[RadioB_1TArrayLength] = {
+0x0, };
+
+
+u32 Rtl8192CURadioA_1T_mCardArray[RadioA_1T_mCardArrayLength] = {
+0x000,0x00030159,
+0x001,0x00031284,
+0x002,0x00098000,
+0x003,0x00018c63,
+0x004,0x000210e7,
+0x009,0x0002044f,
+0x00a,0x0001adb1,
+0x00b,0x00054867,
+0x00c,0x0008992e,
+0x00d,0x0000e52c,
+0x00e,0x00039ce7,
+0x00f,0x00000451,
+0x019,0x00000000,
+0x01a,0x00010255,
+0x01b,0x00060a00,
+0x01c,0x000fc378,
+0x01d,0x000a1250,
+0x01e,0x0004445f,
+0x01f,0x00080001,
+0x020,0x0000b614,
+0x021,0x0006c000,
+0x022,0x00000000,
+0x023,0x00001558,
+0x024,0x00000060,
+0x025,0x00000483,
+0x026,0x0004f200,
+0x027,0x000ec7d9,
+0x028,0x000577c0,
+0x029,0x00004783,
+0x02a,0x00000001,
+0x02b,0x00021334,
+0x02a,0x00000000,
+0x02b,0x00000054,
+0x02a,0x00000001,
+0x02b,0x00000808,
+0x02b,0x00053333,
+0x02c,0x0000000c,
+0x02a,0x00000002,
+0x02b,0x00000808,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000003,
+0x02b,0x00000808,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000004,
+0x02b,0x00000808,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000005,
+0x02b,0x00000808,
+0x02b,0x00073333,
+0x02c,0x0000000d,
+0x02a,0x00000006,
+0x02b,0x00000709,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000007,
+0x02b,0x00000709,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000008,
+0x02b,0x0000060a,
+0x02b,0x0004b333,
+0x02c,0x0000000d,
+0x02a,0x00000009,
+0x02b,0x0000060a,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000a,
+0x02b,0x0000060a,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x0000000b,
+0x02b,0x0000060a,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x0000000c,
+0x02b,0x0000060a,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x0000000d,
+0x02b,0x0000060a,
+0x02b,0x00073333,
+0x02c,0x0000000d,
+0x02a,0x0000000e,
+0x02b,0x0000050b,
+0x02b,0x00066666,
+0x02c,0x0000001a,
+0x02a,0x000e0000,
+0x010,0x0004000f,
+0x011,0x000e31fc,
+0x010,0x0006000f,
+0x011,0x000ff9f8,
+0x010,0x0002000f,
+0x011,0x000203f9,
+0x010,0x0003000f,
+0x011,0x000ff500,
+0x010,0x00000000,
+0x011,0x00000000,
+0x010,0x0008000f,
+0x011,0x0003f100,
+0x010,0x0009000f,
+0x011,0x00023100,
+0x012,0x00032000,
+0x012,0x00071000,
+0x012,0x000b0000,
+0x012,0x000fc000,
+0x013,0x000287b3,
+0x013,0x000244b7,
+0x013,0x000204ab,
+0x013,0x0001c49f,
+0x013,0x00018493,
+0x013,0x0001429b,
+0x013,0x00010299,
+0x013,0x0000c29c,
+0x013,0x000081a0,
+0x013,0x000040ac,
+0x013,0x00000020,
+0x014,0x0001944c,
+0x014,0x00059444,
+0x014,0x0009944c,
+0x014,0x000d9444,
+0x015,0x0000f424,
+0x015,0x0004f424,
+0x015,0x0008f424,
+0x015,0x000cf424,
+0x016,0x000e0330,
+0x016,0x000a0330,
+0x016,0x00060330,
+0x016,0x00020330,
+0x000,0x00010159,
+0x018,0x0000f401,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x01f,0x00080003,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x01e,0x00044457,
+0x01f,0x00080000,
+0x000,0x00030159,
+};
+
+u32 Rtl8192CURadioB_1T_mCardArray[RadioB_1T_mCardArrayLength] = {
+0x0, };
+
+u32 Rtl8192CURadioA_1T_HPArray[RadioA_1T_HPArrayLength] = {
+0x000,0x00030159,
+0x001,0x00031284,
+0x002,0x00098000,
+0x003,0x00018c63,
+0x004,0x000210e7,
+0x009,0x0002044f,
+0x00a,0x0001adb0,
+0x00b,0x00054867,
+0x00c,0x0008992e,
+0x00d,0x0000e529,
+0x00e,0x00039ce7,
+0x00f,0x00000451,
+0x019,0x00000000,
+0x01a,0x00000255,
+0x01b,0x00060a00,
+0x01c,0x000fc378,
+0x01d,0x000a1250,
+0x01e,0x0004445f,
+0x01f,0x00080001,
+0x020,0x0000b614,
+0x021,0x0006c000,
+0x022,0x0000083c,
+0x023,0x00001558,
+0x024,0x00000060,
+0x025,0x00000483,
+0x026,0x0004f000,
+0x027,0x000ec7d9,
+0x028,0x000977c0,
+0x029,0x00004783,
+0x02a,0x00000001,
+0x02b,0x00021334,
+0x02a,0x00000000,
+0x02b,0x00000054,
+0x02a,0x00000001,
+0x02b,0x00000808,
+0x02b,0x00053333,
+0x02c,0x0000000c,
+0x02a,0x00000002,
+0x02b,0x00000808,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000003,
+0x02b,0x00000808,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000004,
+0x02b,0x00000808,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000005,
+0x02b,0x00000808,
+0x02b,0x00073333,
+0x02c,0x0000000d,
+0x02a,0x00000006,
+0x02b,0x00000709,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000007,
+0x02b,0x00000709,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000008,
+0x02b,0x0000060a,
+0x02b,0x0004b333,
+0x02c,0x0000000d,
+0x02a,0x00000009,
+0x02b,0x0000060a,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000a,
+0x02b,0x0000060a,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x0000000b,
+0x02b,0x0000060a,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x0000000c,
+0x02b,0x0000060a,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x0000000d,
+0x02b,0x0000060a,
+0x02b,0x00073333,
+0x02c,0x0000000d,
+0x02a,0x0000000e,
+0x02b,0x0000050b,
+0x02b,0x00066666,
+0x02c,0x0000001a,
+0x02a,0x000e0000,
+0x010,0x0004000f,
+0x011,0x000e31fc,
+0x010,0x0006000f,
+0x011,0x000ff9f8,
+0x010,0x0002000f,
+0x011,0x000203f9,
+0x010,0x0003000f,
+0x011,0x000ff500,
+0x010,0x00000000,
+0x011,0x00000000,
+0x010,0x0008000f,
+0x011,0x0003f100,
+0x010,0x0009000f,
+0x011,0x00023100,
+0x012,0x000d8000,
+0x012,0x00090000,
+0x012,0x00051000,
+0x012,0x00012000,
+0x013,0x00028fb4,
+0x013,0x00024fa8,
+0x013,0x000207a4,
+0x013,0x0001c798,
+0x013,0x000183a4,
+0x013,0x00014398,
+0x013,0x000101a4,
+0x013,0x0000c198,
+0x013,0x000080a4,
+0x013,0x00004098,
+0x013,0x00000000,
+0x014,0x0001944c,
+0x014,0x00059444,
+0x014,0x0009944c,
+0x014,0x000d9444,
+0x015,0x0000f405,
+0x015,0x0004f405,
+0x015,0x0008f405,
+0x015,0x000cf405,
+0x016,0x000e0330,
+0x016,0x000a0330,
+0x016,0x00060330,
+0x016,0x00020330,
+0x000,0x00010159,
+0x018,0x0000f401,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x01f,0x00080003,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x01e,0x00044457,
+0x01f,0x00080000,
+0x000,0x00030159,
+};
+
+u32 Rtl8192CURadioB_GM_Array[RadioB_GM_ArrayLength] = {
+0x0, };
+
+// MAC reg V13 - 2010-12-07
+u32 Rtl8192CUMAC_2T_Array[MAC_2T_ArrayLength] = {
+0x420,0x00000080,
+0x423,0x00000000,
+0x430,0x00000000,
+0x431,0x00000000,
+0x432,0x00000000,
+0x433,0x00000001,
+0x434,0x00000004,
+0x435,0x00000005,
+0x436,0x00000006,
+0x437,0x00000007,
+0x438,0x00000000,
+0x439,0x00000000,
+0x43a,0x00000000,
+0x43b,0x00000001,
+0x43c,0x00000004,
+0x43d,0x00000005,
+0x43e,0x00000006,
+0x43f,0x00000007,
+0x440,0x0000005d,
+0x441,0x00000001,
+0x442,0x00000000,
+0x444,0x00000015,
+0x445,0x000000f0,
+0x446,0x0000000f,
+0x447,0x00000000,
+0x458,0x00000041,
+0x459,0x000000a8,
+0x45a,0x00000072,
+0x45b,0x000000b9,
+0x460,0x00000066,
+0x461,0x00000066,
+0x462,0x00000008,
+0x463,0x00000003,
+0x4c8,0x000000ff,
+0x4c9,0x00000008,
+0x4cc,0x000000ff,
+0x4cd,0x000000ff,
+0x4ce,0x00000001,
+0x500,0x00000026,
+0x501,0x000000a2,
+0x502,0x0000002f,
+0x503,0x00000000,
+0x504,0x00000028,
+0x505,0x000000a3,
+0x506,0x0000005e,
+0x507,0x00000000,
+0x508,0x0000002b,
+0x509,0x000000a4,
+0x50a,0x0000005e,
+0x50b,0x00000000,
+0x50c,0x0000004f,
+0x50d,0x000000a4,
+0x50e,0x00000000,
+0x50f,0x00000000,
+0x512,0x0000001c,
+0x514,0x0000000a,
+0x515,0x00000010,
+0x516,0x0000000a,
+0x517,0x00000010,
+0x51a,0x00000016,
+0x524,0x0000000f,
+0x525,0x0000004f,
+0x546,0x00000040,
+0x547,0x00000000,
+0x550,0x00000010,
+0x551,0x00000010,
+0x559,0x00000002,
+0x55a,0x00000002,
+0x55d,0x000000ff,
+0x605,0x00000030,
+0x608,0x0000000e,
+0x609,0x0000002a,
+0x652,0x00000020,
+0x63c,0x0000000a,
+0x63d,0x0000000e,
+0x63e,0x0000000a,
+0x63f,0x0000000e,
+0x66e,0x00000005,
+0x700,0x00000021,
+0x701,0x00000043,
+0x702,0x00000065,
+0x703,0x00000087,
+0x708,0x00000021,
+0x709,0x00000043,
+0x70a,0x00000065,
+0x70b,0x00000087,
+};
+
+u32 Rtl8192CUMACPHY_Array_PG[MACPHY_Array_PGLength] = {
+0x0, };
+
+u32 Rtl8192CUAGCTAB_2TArray[AGCTAB_2TArrayLength] = {
+0xc78,0x7b000001,
+0xc78,0x7b010001,
+0xc78,0x7b020001,
+0xc78,0x7b030001,
+0xc78,0x7b040001,
+0xc78,0x7b050001,
+0xc78,0x7a060001,
+0xc78,0x79070001,
+0xc78,0x78080001,
+0xc78,0x77090001,
+0xc78,0x760a0001,
+0xc78,0x750b0001,
+0xc78,0x740c0001,
+0xc78,0x730d0001,
+0xc78,0x720e0001,
+0xc78,0x710f0001,
+0xc78,0x70100001,
+0xc78,0x6f110001,
+0xc78,0x6e120001,
+0xc78,0x6d130001,
+0xc78,0x6c140001,
+0xc78,0x6b150001,
+0xc78,0x6a160001,
+0xc78,0x69170001,
+0xc78,0x68180001,
+0xc78,0x67190001,
+0xc78,0x661a0001,
+0xc78,0x651b0001,
+0xc78,0x641c0001,
+0xc78,0x631d0001,
+0xc78,0x621e0001,
+0xc78,0x611f0001,
+0xc78,0x60200001,
+0xc78,0x49210001,
+0xc78,0x48220001,
+0xc78,0x47230001,
+0xc78,0x46240001,
+0xc78,0x45250001,
+0xc78,0x44260001,
+0xc78,0x43270001,
+0xc78,0x42280001,
+0xc78,0x41290001,
+0xc78,0x402a0001,
+0xc78,0x262b0001,
+0xc78,0x252c0001,
+0xc78,0x242d0001,
+0xc78,0x232e0001,
+0xc78,0x222f0001,
+0xc78,0x21300001,
+0xc78,0x20310001,
+0xc78,0x06320001,
+0xc78,0x05330001,
+0xc78,0x04340001,
+0xc78,0x03350001,
+0xc78,0x02360001,
+0xc78,0x01370001,
+0xc78,0x00380001,
+0xc78,0x00390001,
+0xc78,0x003a0001,
+0xc78,0x003b0001,
+0xc78,0x003c0001,
+0xc78,0x003d0001,
+0xc78,0x003e0001,
+0xc78,0x003f0001,
+0xc78,0x7b400001,
+0xc78,0x7b410001,
+0xc78,0x7b420001,
+0xc78,0x7b430001,
+0xc78,0x7b440001,
+0xc78,0x7b450001,
+0xc78,0x7a460001,
+0xc78,0x79470001,
+0xc78,0x78480001,
+0xc78,0x77490001,
+0xc78,0x764a0001,
+0xc78,0x754b0001,
+0xc78,0x744c0001,
+0xc78,0x734d0001,
+0xc78,0x724e0001,
+0xc78,0x714f0001,
+0xc78,0x70500001,
+0xc78,0x6f510001,
+0xc78,0x6e520001,
+0xc78,0x6d530001,
+0xc78,0x6c540001,
+0xc78,0x6b550001,
+0xc78,0x6a560001,
+0xc78,0x69570001,
+0xc78,0x68580001,
+0xc78,0x67590001,
+0xc78,0x665a0001,
+0xc78,0x655b0001,
+0xc78,0x645c0001,
+0xc78,0x635d0001,
+0xc78,0x625e0001,
+0xc78,0x615f0001,
+0xc78,0x60600001,
+0xc78,0x49610001,
+0xc78,0x48620001,
+0xc78,0x47630001,
+0xc78,0x46640001,
+0xc78,0x45650001,
+0xc78,0x44660001,
+0xc78,0x43670001,
+0xc78,0x42680001,
+0xc78,0x41690001,
+0xc78,0x406a0001,
+0xc78,0x266b0001,
+0xc78,0x256c0001,
+0xc78,0x246d0001,
+0xc78,0x236e0001,
+0xc78,0x226f0001,
+0xc78,0x21700001,
+0xc78,0x20710001,
+0xc78,0x06720001,
+0xc78,0x05730001,
+0xc78,0x04740001,
+0xc78,0x03750001,
+0xc78,0x02760001,
+0xc78,0x01770001,
+0xc78,0x00780001,
+0xc78,0x00790001,
+0xc78,0x007a0001,
+0xc78,0x007b0001,
+0xc78,0x007c0001,
+0xc78,0x007d0001,
+0xc78,0x007e0001,
+0xc78,0x007f0001,
+0xc78,0x3800001e,
+0xc78,0x3801001e,
+0xc78,0x3802001e,
+0xc78,0x3803001e,
+0xc78,0x3804001e,
+0xc78,0x3805001e,
+0xc78,0x3806001e,
+0xc78,0x3807001e,
+0xc78,0x3808001e,
+0xc78,0x3c09001e,
+0xc78,0x3e0a001e,
+0xc78,0x400b001e,
+0xc78,0x440c001e,
+0xc78,0x480d001e,
+0xc78,0x4c0e001e,
+0xc78,0x500f001e,
+0xc78,0x5210001e,
+0xc78,0x5611001e,
+0xc78,0x5a12001e,
+0xc78,0x5e13001e,
+0xc78,0x6014001e,
+0xc78,0x6015001e,
+0xc78,0x6016001e,
+0xc78,0x6217001e,
+0xc78,0x6218001e,
+0xc78,0x6219001e,
+0xc78,0x621a001e,
+0xc78,0x621b001e,
+0xc78,0x621c001e,
+0xc78,0x621d001e,
+0xc78,0x621e001e,
+0xc78,0x621f001e,
+};
+
+u32 Rtl8192CUAGCTAB_1TArray[AGCTAB_1TArrayLength] = {
+0xc78,0x7b000001,
+0xc78,0x7b010001,
+0xc78,0x7b020001,
+0xc78,0x7b030001,
+0xc78,0x7b040001,
+0xc78,0x7b050001,
+0xc78,0x7a060001,
+0xc78,0x79070001,
+0xc78,0x78080001,
+0xc78,0x77090001,
+0xc78,0x760a0001,
+0xc78,0x750b0001,
+0xc78,0x740c0001,
+0xc78,0x730d0001,
+0xc78,0x720e0001,
+0xc78,0x710f0001,
+0xc78,0x70100001,
+0xc78,0x6f110001,
+0xc78,0x6e120001,
+0xc78,0x6d130001,
+0xc78,0x6c140001,
+0xc78,0x6b150001,
+0xc78,0x6a160001,
+0xc78,0x69170001,
+0xc78,0x68180001,
+0xc78,0x67190001,
+0xc78,0x661a0001,
+0xc78,0x651b0001,
+0xc78,0x641c0001,
+0xc78,0x631d0001,
+0xc78,0x621e0001,
+0xc78,0x611f0001,
+0xc78,0x60200001,
+0xc78,0x49210001,
+0xc78,0x48220001,
+0xc78,0x47230001,
+0xc78,0x46240001,
+0xc78,0x45250001,
+0xc78,0x44260001,
+0xc78,0x43270001,
+0xc78,0x42280001,
+0xc78,0x41290001,
+0xc78,0x402a0001,
+0xc78,0x262b0001,
+0xc78,0x252c0001,
+0xc78,0x242d0001,
+0xc78,0x232e0001,
+0xc78,0x222f0001,
+0xc78,0x21300001,
+0xc78,0x20310001,
+0xc78,0x06320001,
+0xc78,0x05330001,
+0xc78,0x04340001,
+0xc78,0x03350001,
+0xc78,0x02360001,
+0xc78,0x01370001,
+0xc78,0x00380001,
+0xc78,0x00390001,
+0xc78,0x003a0001,
+0xc78,0x003b0001,
+0xc78,0x003c0001,
+0xc78,0x003d0001,
+0xc78,0x003e0001,
+0xc78,0x003f0001,
+0xc78,0x7b400001,
+0xc78,0x7b410001,
+0xc78,0x7b420001,
+0xc78,0x7b430001,
+0xc78,0x7b440001,
+0xc78,0x7b450001,
+0xc78,0x7a460001,
+0xc78,0x79470001,
+0xc78,0x78480001,
+0xc78,0x77490001,
+0xc78,0x764a0001,
+0xc78,0x754b0001,
+0xc78,0x744c0001,
+0xc78,0x734d0001,
+0xc78,0x724e0001,
+0xc78,0x714f0001,
+0xc78,0x70500001,
+0xc78,0x6f510001,
+0xc78,0x6e520001,
+0xc78,0x6d530001,
+0xc78,0x6c540001,
+0xc78,0x6b550001,
+0xc78,0x6a560001,
+0xc78,0x69570001,
+0xc78,0x68580001,
+0xc78,0x67590001,
+0xc78,0x665a0001,
+0xc78,0x655b0001,
+0xc78,0x645c0001,
+0xc78,0x635d0001,
+0xc78,0x625e0001,
+0xc78,0x615f0001,
+0xc78,0x60600001,
+0xc78,0x49610001,
+0xc78,0x48620001,
+0xc78,0x47630001,
+0xc78,0x46640001,
+0xc78,0x45650001,
+0xc78,0x44660001,
+0xc78,0x43670001,
+0xc78,0x42680001,
+0xc78,0x41690001,
+0xc78,0x406a0001,
+0xc78,0x266b0001,
+0xc78,0x256c0001,
+0xc78,0x246d0001,
+0xc78,0x236e0001,
+0xc78,0x226f0001,
+0xc78,0x21700001,
+0xc78,0x20710001,
+0xc78,0x06720001,
+0xc78,0x05730001,
+0xc78,0x04740001,
+0xc78,0x03750001,
+0xc78,0x02760001,
+0xc78,0x01770001,
+0xc78,0x00780001,
+0xc78,0x00790001,
+0xc78,0x007a0001,
+0xc78,0x007b0001,
+0xc78,0x007c0001,
+0xc78,0x007d0001,
+0xc78,0x007e0001,
+0xc78,0x007f0001,
+0xc78,0x3800001e,
+0xc78,0x3801001e,
+0xc78,0x3802001e,
+0xc78,0x3803001e,
+0xc78,0x3804001e,
+0xc78,0x3805001e,
+0xc78,0x3806001e,
+0xc78,0x3807001e,
+0xc78,0x3808001e,
+0xc78,0x3c09001e,
+0xc78,0x3e0a001e,
+0xc78,0x400b001e,
+0xc78,0x440c001e,
+0xc78,0x480d001e,
+0xc78,0x4c0e001e,
+0xc78,0x500f001e,
+0xc78,0x5210001e,
+0xc78,0x5611001e,
+0xc78,0x5a12001e,
+0xc78,0x5e13001e,
+0xc78,0x6014001e,
+0xc78,0x6015001e,
+0xc78,0x6016001e,
+0xc78,0x6217001e,
+0xc78,0x6218001e,
+0xc78,0x6219001e,
+0xc78,0x621a001e,
+0xc78,0x621b001e,
+0xc78,0x621c001e,
+0xc78,0x621d001e,
+0xc78,0x621e001e,
+0xc78,0x621f001e,
+};
+
+u32 Rtl8192CUAGCTAB_1T_HPArray[AGCTAB_1T_HPArrayLength] = {
+0xc78,0x7b000001,
+0xc78,0x7b010001,
+0xc78,0x7b020001,
+0xc78,0x7b030001,
+0xc78,0x7b040001,
+0xc78,0x7b050001,
+0xc78,0x7b060001,
+0xc78,0x7b070001,
+0xc78,0x7b080001,
+0xc78,0x7a090001,
+0xc78,0x790a0001,
+0xc78,0x780b0001,
+0xc78,0x770c0001,
+0xc78,0x760d0001,
+0xc78,0x750e0001,
+0xc78,0x740f0001,
+0xc78,0x73100001,
+0xc78,0x72110001,
+0xc78,0x71120001,
+0xc78,0x70130001,
+0xc78,0x6f140001,
+0xc78,0x6e150001,
+0xc78,0x6d160001,
+0xc78,0x6c170001,
+0xc78,0x6b180001,
+0xc78,0x6a190001,
+0xc78,0x691a0001,
+0xc78,0x681b0001,
+0xc78,0x671c0001,
+0xc78,0x661d0001,
+0xc78,0x651e0001,
+0xc78,0x641f0001,
+0xc78,0x63200001,
+0xc78,0x62210001,
+0xc78,0x61220001,
+0xc78,0x60230001,
+0xc78,0x46240001,
+0xc78,0x45250001,
+0xc78,0x44260001,
+0xc78,0x43270001,
+0xc78,0x42280001,
+0xc78,0x41290001,
+0xc78,0x402a0001,
+0xc78,0x262b0001,
+0xc78,0x252c0001,
+0xc78,0x242d0001,
+0xc78,0x232e0001,
+0xc78,0x222f0001,
+0xc78,0x21300001,
+0xc78,0x20310001,
+0xc78,0x06320001,
+0xc78,0x05330001,
+0xc78,0x04340001,
+0xc78,0x03350001,
+0xc78,0x02360001,
+0xc78,0x01370001,
+0xc78,0x00380001,
+0xc78,0x00390001,
+0xc78,0x003a0001,
+0xc78,0x003b0001,
+0xc78,0x003c0001,
+0xc78,0x003d0001,
+0xc78,0x003e0001,
+0xc78,0x003f0001,
+0xc78,0x7b400001,
+0xc78,0x7b410001,
+0xc78,0x7b420001,
+0xc78,0x7b430001,
+0xc78,0x7b440001,
+0xc78,0x7b450001,
+0xc78,0x7b460001,
+0xc78,0x7b470001,
+0xc78,0x7b480001,
+0xc78,0x7a490001,
+0xc78,0x794a0001,
+0xc78,0x784b0001,
+0xc78,0x774c0001,
+0xc78,0x764d0001,
+0xc78,0x754e0001,
+0xc78,0x744f0001,
+0xc78,0x73500001,
+0xc78,0x72510001,
+0xc78,0x71520001,
+0xc78,0x70530001,
+0xc78,0x6f540001,
+0xc78,0x6e550001,
+0xc78,0x6d560001,
+0xc78,0x6c570001,
+0xc78,0x6b580001,
+0xc78,0x6a590001,
+0xc78,0x695a0001,
+0xc78,0x685b0001,
+0xc78,0x675c0001,
+0xc78,0x665d0001,
+0xc78,0x655e0001,
+0xc78,0x645f0001,
+0xc78,0x63600001,
+0xc78,0x62610001,
+0xc78,0x61620001,
+0xc78,0x60630001,
+0xc78,0x46640001,
+0xc78,0x45650001,
+0xc78,0x44660001,
+0xc78,0x43670001,
+0xc78,0x42680001,
+0xc78,0x41690001,
+0xc78,0x406a0001,
+0xc78,0x266b0001,
+0xc78,0x256c0001,
+0xc78,0x246d0001,
+0xc78,0x236e0001,
+0xc78,0x226f0001,
+0xc78,0x21700001,
+0xc78,0x20710001,
+0xc78,0x06720001,
+0xc78,0x05730001,
+0xc78,0x04740001,
+0xc78,0x03750001,
+0xc78,0x02760001,
+0xc78,0x01770001,
+0xc78,0x00780001,
+0xc78,0x00790001,
+0xc78,0x007a0001,
+0xc78,0x007b0001,
+0xc78,0x007c0001,
+0xc78,0x007d0001,
+0xc78,0x007e0001,
+0xc78,0x007f0001,
+0xc78,0x3800001e,
+0xc78,0x3801001e,
+0xc78,0x3802001e,
+0xc78,0x3803001e,
+0xc78,0x3804001e,
+0xc78,0x3805001e,
+0xc78,0x3806001e,
+0xc78,0x3807001e,
+0xc78,0x3808001e,
+0xc78,0x3c09001e,
+0xc78,0x3e0a001e,
+0xc78,0x400b001e,
+0xc78,0x440c001e,
+0xc78,0x480d001e,
+0xc78,0x4c0e001e,
+0xc78,0x500f001e,
+0xc78,0x5210001e,
+0xc78,0x5611001e,
+0xc78,0x5a12001e,
+0xc78,0x5e13001e,
+0xc78,0x6014001e,
+0xc78,0x6015001e,
+0xc78,0x6016001e,
+0xc78,0x6217001e,
+0xc78,0x6218001e,
+0xc78,0x6219001e,
+0xc78,0x621a001e,
+0xc78,0x621b001e,
+0xc78,0x621c001e,
+0xc78,0x621d001e,
+0xc78,0x621e001e,
+0xc78,0x621f001e,
+};
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/rtl8192cu_led.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/rtl8192cu_led.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/rtl8192cu_led.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/rtl8192cu_led.c	2017-09-23 03:42:49.946675284 +0800
@@ -0,0 +1,2677 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+
+#include "drv_types.h"
+#include "rtl8192c_hal.h"
+
+//================================================================================
+//	Constant.
+//================================================================================
+
+//
+// Default LED behavior.
+//
+#define LED_BLINK_NORMAL_INTERVAL	100
+#define LED_BLINK_SLOWLY_INTERVAL	200
+#define LED_BLINK_LONG_INTERVAL	400
+
+#define LED_BLINK_NO_LINK_INTERVAL_ALPHA		1000
+#define LED_BLINK_LINK_INTERVAL_ALPHA			500		//500
+#define LED_BLINK_SCAN_INTERVAL_ALPHA		180 	//150
+#define LED_BLINK_FASTER_INTERVAL_ALPHA		50
+#define LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA	5000
+
+//================================================================================
+// LED object.
+//================================================================================
+
+
+//================================================================================
+//	Prototype of protected function.
+//================================================================================
+
+
+static void
+BlinkTimerCallback(
+	unsigned long data
+	);
+
+static void
+BlinkWorkItemCallback(
+	struct work_struct *work
+	);
+
+//================================================================================
+// LED_819xUsb routines. 
+//================================================================================
+
+//
+//	Description:
+//		Initialize an LED_871x object.
+//
+static void
+InitLed871x(
+	_adapter			*padapter,
+	PLED_871x		pLed,
+	LED_PIN_871x	LedPin
+	)
+{
+	pLed->padapter = padapter;
+
+	pLed->LedPin = LedPin;
+
+	pLed->CurrLedState = LED_OFF;
+	pLed->bLedOn = _FALSE;
+
+	pLed->bLedBlinkInProgress = _FALSE;
+	pLed->BlinkTimes = 0;
+	pLed->BlinkingLedState = LED_UNKNOWN;
+
+	_init_timer(&(pLed->BlinkTimer), padapter->pnetdev, BlinkTimerCallback, pLed);
+
+	_init_workitem(&(pLed->BlinkWorkItem), BlinkWorkItemCallback, pLed);
+}
+
+
+//
+//	Description:
+//		DeInitialize an LED_871x object.
+//
+static void
+DeInitLed871x(
+	PLED_871x			pLed
+	)
+{
+	_cancel_timer_ex(&(pLed->BlinkTimer));
+
+	// We should reset bLedBlinkInProgress if we cancel the LedControlTimer, 2005.03.10, by rcnjko.
+	pLed->bLedBlinkInProgress = _FALSE;
+}
+
+//
+//	Description:
+//		Reset blinking status of LED_871x object.
+//
+static void
+ResetLedStatus(PLED_871x	pLed) {
+	pLed->CurrLedState = LED_OFF; // Current LED state.
+	pLed->bLedOn = _FALSE; // true if LED is ON, false if LED is OFF.
+	
+	pLed->bLedBlinkInProgress = _FALSE; // true if it is blinking, false o.w..
+	pLed->bLedNoLinkBlinkInProgress = _FALSE;
+	pLed->bLedLinkBlinkInProgress = _FALSE;
+	pLed->bLedStartToLinkBlinkInProgress = _FALSE;
+	pLed->bLedScanBlinkInProgress = _FALSE;
+	pLed->bLedWPSBlinkInProgress = _FALSE;
+	pLed->BlinkTimes = 0; // Number of times to toggle led state for blinking.
+	pLed->BlinkingLedState = LED_OFF; // Next state for blinking, either LED_ON or LED_OFF are.
+}
+
+//
+//	Description:
+//		Turn on LED according to LedPin specified.
+//
+static void
+SwLedOn(
+	_adapter			*padapter, 
+	PLED_871x		pLed
+)
+{
+	u8	LedCfg;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+
+	if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE))
+	{
+		return;
+	}
+
+	if( 	(BOARD_MINICARD == pHalData->BoardType )||
+		(BOARD_USB_SOLO == pHalData->BoardType)||
+		(BOARD_USB_COMBO == pHalData->BoardType))
+	{
+		LedCfg = rtw_read8(padapter, REG_LEDCFG2);
+		switch(pLed->LedPin)
+		{	
+			case LED_PIN_GPIO0:
+				break;
+
+			case LED_PIN_LED0:
+				rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0xf0)|BIT5|BIT6); // SW control led0 on.
+				break;
+
+			case LED_PIN_LED1:
+				rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0x0f)|BIT5); // SW control led1 on.
+				break;
+
+			default:
+				break;
+	
+		}
+	}
+	else
+	{	
+		switch(pLed->LedPin)
+		{
+			case LED_PIN_GPIO0:
+				break;
+
+			case LED_PIN_LED0:
+#ifdef CONFIG_SW_ANTENNA_DIVERSITY
+				if(pHalData->AntDivCfg)
+				{
+					LedCfg = rtw_read8(padapter, REG_LEDCFG2);
+					rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0xe0)|BIT7|BIT6|BIT5); // SW control led0 on.
+					//RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOn LED0 0x%x\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG2)));
+				}
+				else
+#endif
+				{
+					LedCfg = rtw_read8(padapter, REG_LEDCFG0);
+					rtw_write8(padapter,REG_LEDCFG0, LedCfg&0x70); // SW control led0 on.
+					//RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOn LED0 0x%lx\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG0)));
+				}
+				break;
+
+			case LED_PIN_LED1:
+				LedCfg = rtw_read8(padapter,(REG_LEDCFG1));
+				rtw_write8(padapter,(REG_LEDCFG1), LedCfg&0x70); // SW control led1 on.
+				//RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOn LED1 0x%lx\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG0)));
+			
+				break;
+
+			default:
+				break;
+		}
+	}
+	pLed->bLedOn = _TRUE;
+	
+}
+
+
+//
+//	Description:
+//		Turn off LED according to LedPin specified.
+//
+static void
+SwLedOff(
+	_adapter			*padapter, 
+	PLED_871x		pLed
+)
+{
+	u8	LedCfg;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+
+	if((padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE))	
+	{
+		goto exit;
+	}
+
+	if( 	(BOARD_MINICARD == pHalData->BoardType )||
+		(BOARD_USB_SOLO == pHalData->BoardType)||
+		(BOARD_USB_COMBO == pHalData->BoardType))
+	{
+		LedCfg = rtw_read8(padapter, REG_LEDCFG2);//0x4E
+
+		switch(pLed->LedPin)
+		{
+
+			case LED_PIN_GPIO0:
+				break;
+
+			case LED_PIN_LED0:
+				if(BOARD_USB_COMBO == pHalData->BoardType)
+				{
+					LedCfg &= 0x90; // Set to software control.				
+					rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3));				
+					LedCfg = rtw_read8(padapter, REG_MAC_PINMUX_CFG);
+					LedCfg &= 0xFE;
+					rtw_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg);									
+				}
+				else
+				{
+					LedCfg &= 0xf0; // Set to software control.
+					if(pHalData->bLedOpenDrain == _TRUE) // Open-drain arrangement for controlling the LED
+						rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT1|BIT5|BIT6));
+					else
+						rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT5|BIT6));
+				}
+				break;
+
+			case LED_PIN_LED1:
+				LedCfg &= 0x0f; // Set to software control.
+				rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3));
+				break;
+
+			default:
+				break;
+		}
+	}
+	else
+	{
+		switch(pLed->LedPin)
+		{
+			case LED_PIN_GPIO0:
+				break;
+
+			case LED_PIN_LED0:
+#ifdef CONFIG_SW_ANTENNA_DIVERSITY
+				if(pHalData->AntDivCfg)
+				{
+					LedCfg = rtw_read8(padapter, REG_LEDCFG2);
+					LedCfg &= 0xe0; // Set to software control. 			
+					rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT7|BIT6|BIT5));
+					//RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOff LED0 0x%x\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG2)));
+				}
+				else
+#endif
+				{
+					LedCfg = rtw_read8(padapter, REG_LEDCFG0);
+					LedCfg &= 0x70; // Set to software control. 			
+					rtw_write8(padapter, REG_LEDCFG0, (LedCfg|BIT3));
+					//RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOff LED0 0x%lx\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG0)));
+				}
+				break;
+
+			case LED_PIN_LED1:
+				LedCfg = rtw_read8(padapter, (REG_LEDCFG1));
+				LedCfg &= 0x70; // Set to software control.
+				rtw_write8(padapter,  (REG_LEDCFG1), (LedCfg|BIT3));
+				//RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOff LED1 0x%lx\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG0)));
+				break;
+
+			default:
+				break;
+		}
+	}
+
+exit:
+	pLed->bLedOn = _FALSE;
+	
+}
+
+//================================================================================
+// Interface to manipulate LED objects.
+//================================================================================
+
+
+//
+//	Description:
+//		Implementation of LED blinking behavior.
+//		It toggle off LED and schedule corresponding timer if necessary.
+//
+static void
+SwLedBlink(
+	PLED_871x			pLed
+	)
+{
+	_adapter			*padapter = pLed->padapter;
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	u8				bStopBlinking = _FALSE;
+
+	// Change LED according to BlinkingLedState specified.
+	if( pLed->BlinkingLedState == LED_ON ) 
+	{
+		SwLedOn(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes));
+	}
+	else 
+	{
+		SwLedOff(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,( "Blinktimes (%d): turn off\n", pLed->BlinkTimes));
+	}
+
+	// Determine if we shall change LED state again.
+	pLed->BlinkTimes--;
+	switch(pLed->CurrLedState)
+	{
+
+	case LED_BLINK_NORMAL: 
+		if(pLed->BlinkTimes == 0)
+		{
+			bStopBlinking = _TRUE;
+		}
+		break;
+		
+	case LED_BLINK_StartToBlink:
+		if( check_fwstate(pmlmepriv, _FW_LINKED) && check_fwstate(pmlmepriv, WIFI_STATION_STATE) )
+		{
+			bStopBlinking = _TRUE;
+		}
+		if( check_fwstate(pmlmepriv, _FW_LINKED) &&
+			(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) )
+		{
+			bStopBlinking = _TRUE;
+		}
+		else if(pLed->BlinkTimes == 0)
+		{
+			bStopBlinking = _TRUE;
+		}
+		break;
+
+	case LED_BLINK_WPS:
+		if( pLed->BlinkTimes == 0 )
+		{
+			bStopBlinking = _TRUE;
+		}
+		break;
+
+
+	default:
+		bStopBlinking = _TRUE;
+		break;
+			
+	}
+	
+	if(bStopBlinking)
+	{
+		//if( padapter->pwrctrlpriv.cpwm >= PS_STATE_S2)
+		if(0)
+		{
+			SwLedOff(padapter, pLed);
+		}
+		else if( (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && (pLed->bLedOn == _FALSE))
+		{
+			SwLedOn(padapter, pLed);
+		}
+		else if( (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) &&  pLed->bLedOn == _TRUE)
+		{
+			SwLedOff(padapter, pLed);
+		}
+
+		pLed->BlinkTimes = 0;
+		pLed->bLedBlinkInProgress = _FALSE;
+	}
+	else
+	{
+		// Assign LED state to toggle.
+		if( pLed->BlinkingLedState == LED_ON ) 
+			pLed->BlinkingLedState = LED_OFF;
+		else 
+			pLed->BlinkingLedState = LED_ON;
+
+		// Schedule a timer to toggle LED state. 
+		switch( pLed->CurrLedState )
+		{
+		case LED_BLINK_NORMAL:
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+			break;
+		
+		case LED_BLINK_SLOWLY:
+		case LED_BLINK_StartToBlink:
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
+			break;
+
+		case LED_BLINK_WPS:
+			{
+				if( pLed->BlinkingLedState == LED_ON )
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL);
+				else
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL);
+			}
+			break;
+
+		default:
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
+			break;
+		}
+	}
+}
+
+
+static void
+SwLedBlink1(
+	PLED_871x			pLed
+	)
+{
+	_adapter				*padapter = pLed->padapter;
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
+	struct led_priv		*ledpriv = &(padapter->ledpriv);
+	struct mlme_priv		*pmlmepriv = &(padapter->mlmepriv);
+	PLED_871x 			pLed1 = &(ledpriv->SwLed1);	
+	u8					bStopBlinking = _FALSE;
+
+	if(pHalData->EEPROMCustomerID == RT_CID_819x_CAMEO)
+		pLed = &(ledpriv->SwLed1);	
+
+	// Change LED according to BlinkingLedState specified.
+	if( pLed->BlinkingLedState == LED_ON ) 
+	{
+		SwLedOn(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,( "Blinktimes (%d): turn on\n", pLed->BlinkTimes));
+	}
+	else 
+	{
+		SwLedOff(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes));
+	}
+
+
+	if(pHalData->EEPROMCustomerID == RT_CID_DEFAULT)
+	{
+		if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
+		{
+			if(!pLed1->bSWLedCtrl)
+			{
+				SwLedOn(padapter, pLed1); 	
+				pLed1->bSWLedCtrl = _TRUE;
+			}
+			else if(!pLed1->bLedOn)	
+				SwLedOn(padapter, pLed1);
+			RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (): turn on pLed1\n"));
+		}
+		else 
+		{
+			if(!pLed1->bSWLedCtrl)
+			{
+				SwLedOff(padapter, pLed1);
+				pLed1->bSWLedCtrl = _TRUE;
+			}
+			else if(pLed1->bLedOn)
+				SwLedOff(padapter, pLed1);
+			RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (): turn off pLed1\n"));		
+		}
+	}
+
+
+	if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+	{
+		SwLedOff(padapter, pLed);
+		ResetLedStatus(pLed);
+		return;
+	}
+				
+
+	switch(pLed->CurrLedState)
+	{
+		case LED_BLINK_SLOWLY:			
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = LED_OFF; 
+			else
+				pLed->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+			break;
+
+		case LED_BLINK_NORMAL:
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = LED_OFF; 
+			else
+				pLed->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+			break;
+			
+		case LED_SCAN_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			
+			if(bStopBlinking)
+			{
+				if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
+				{
+					pLed->bLedLinkBlinkInProgress = _TRUE;
+					pLed->CurrLedState = LED_BLINK_NORMAL;
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));
+					
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE)
+				{
+					pLed->bLedNoLinkBlinkInProgress = _TRUE;
+					pLed->CurrLedState = LED_BLINK_SLOWLY;
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}
+			else
+			{
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF;
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			}
+			break;
+
+		case LED_TXRX_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			if(bStopBlinking)
+			{
+				if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
+				{
+					pLed->bLedLinkBlinkInProgress = _TRUE;
+					pLed->CurrLedState = LED_BLINK_NORMAL;
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF;
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE)
+				{
+					pLed->bLedNoLinkBlinkInProgress = _TRUE;
+					pLed->CurrLedState = LED_BLINK_SLOWLY;
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				pLed->BlinkTimes = 0;
+				pLed->bLedBlinkInProgress = _FALSE;	
+			}
+			else
+			{
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+			}
+			break;
+
+		case LED_BLINK_WPS:
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = LED_OFF; 
+			else
+				pLed->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			break;
+
+		case LED_BLINK_WPS_STOP:	//WPS success
+			if(pLed->BlinkingLedState == LED_ON)
+				bStopBlinking = _FALSE;
+			else
+				bStopBlinking = _TRUE;				
+
+			if(bStopBlinking)
+			{
+				pLed->bLedLinkBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_BLINK_NORMAL;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+				RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));
+					
+				pLed->bLedWPSBlinkInProgress = _FALSE;	
+			}
+			else
+			{
+				pLed->BlinkingLedState = LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA);
+			}
+			break;
+					
+		default:
+			break;
+	}
+
+}
+
+static void
+SwLedBlink2(
+	PLED_871x			pLed
+	)
+{
+	_adapter				*padapter = pLed->padapter;
+	struct mlme_priv		*pmlmepriv = &(padapter->mlmepriv);
+	u8					bStopBlinking = _FALSE;
+
+	// Change LED according to BlinkingLedState specified.
+	if( pLed->BlinkingLedState == LED_ON) 
+	{
+		SwLedOn(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes));
+	}
+	else 
+	{
+		SwLedOff(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes));
+	}
+
+	switch(pLed->CurrLedState)
+	{	
+		case LED_SCAN_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
+				{
+					pLed->CurrLedState = LED_ON;
+					pLed->BlinkingLedState = LED_ON; 
+					SwLedOn(padapter, pLed);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop scan blink CurrLedState %d\n", pLed->CurrLedState));
+					
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE)
+				{
+					pLed->CurrLedState = LED_OFF;
+					pLed->BlinkingLedState = LED_OFF; 
+					SwLedOff(padapter, pLed);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop scan blink CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}
+			else
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else
+				{
+					 if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+				}
+			}
+			break;
+
+		case LED_TXRX_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
+				{
+					pLed->CurrLedState = LED_ON;
+					pLed->BlinkingLedState = LED_ON; 
+					SwLedOn(padapter, pLed);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop CurrLedState %d\n", pLed->CurrLedState));
+					
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE)
+				{
+					pLed->CurrLedState = LED_OFF;
+					pLed->BlinkingLedState = LED_OFF; 
+					SwLedOff(padapter, pLed);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				pLed->bLedBlinkInProgress = _FALSE;
+			}
+			else
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else
+				{
+					 if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+				}
+			}
+			break;
+					
+		default:
+			break;
+	}
+
+}
+
+static void
+SwLedBlink3(
+	PLED_871x			pLed
+	)
+{
+	_adapter			*padapter = pLed->padapter;
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	u8				bStopBlinking = _FALSE;
+
+	// Change LED according to BlinkingLedState specified.
+	if( pLed->BlinkingLedState == LED_ON ) 
+	{
+		SwLedOn(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes));
+	}
+	else 
+	{
+		if(pLed->CurrLedState != LED_BLINK_WPS_STOP)
+			SwLedOff(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes));
+	}	
+
+	switch(pLed->CurrLedState)
+	{			
+		case LED_SCAN_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
+				{
+					pLed->CurrLedState = LED_ON;
+					pLed->BlinkingLedState = LED_ON;				
+					if( !pLed->bLedOn )
+						SwLedOn(padapter, pLed);
+
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE)
+				{
+					pLed->CurrLedState = LED_OFF;
+					pLed->BlinkingLedState = LED_OFF;									
+					if( pLed->bLedOn )
+						SwLedOff(padapter, pLed);
+
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}
+			else
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else
+				{
+				 	if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+				}
+			}
+			break;
+
+		case LED_TXRX_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
+				{
+					pLed->CurrLedState = LED_ON;
+					pLed->BlinkingLedState = LED_ON;
+				
+					if( !pLed->bLedOn )
+						SwLedOn(padapter, pLed);
+
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE)
+				{
+					pLed->CurrLedState = LED_OFF;
+					pLed->BlinkingLedState = LED_OFF;					
+				
+					if( pLed->bLedOn )
+						SwLedOff(padapter, pLed);
+
+
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				pLed->bLedBlinkInProgress = _FALSE;	
+			}
+			else
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else
+				{
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+				}
+			}
+			break;
+
+		case LED_BLINK_WPS:
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = LED_OFF; 
+			else
+				pLed->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			break;
+
+		case LED_BLINK_WPS_STOP:	//WPS success
+			if(pLed->BlinkingLedState == LED_ON)
+			{
+				pLed->BlinkingLedState = LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA);
+				bStopBlinking = _FALSE;
+			}
+			else
+			{
+				bStopBlinking = _TRUE;				
+			}
+			
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else 
+				{
+					pLed->CurrLedState = LED_ON;
+					pLed->BlinkingLedState = LED_ON; 
+					SwLedOn(padapter, pLed);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				pLed->bLedWPSBlinkInProgress = _FALSE;	
+			}		
+			break;
+			
+					
+		default:
+			break;
+	}
+
+}
+
+
+static void
+SwLedBlink4(
+	PLED_871x			pLed
+	)
+{
+	_adapter			*padapter = pLed->padapter;
+	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	PLED_871x 		pLed1 = &(ledpriv->SwLed1);	
+	u8				bStopBlinking = _FALSE;
+
+	// Change LED according to BlinkingLedState specified.
+	if( pLed->BlinkingLedState == LED_ON ) 
+	{
+		SwLedOn(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes));
+	}
+	else 
+	{
+		SwLedOff(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes));
+	}	
+
+	if(!pLed1->bLedWPSBlinkInProgress && pLed1->BlinkingLedState == LED_UNKNOWN)
+	{
+		pLed1->BlinkingLedState = LED_OFF;
+		pLed1->CurrLedState = LED_OFF;
+		SwLedOff(padapter, pLed1);
+	}	
+
+	switch(pLed->CurrLedState)
+	{
+		case LED_BLINK_SLOWLY:			
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = LED_OFF; 
+			else
+				pLed->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+			break;
+
+		case LED_BLINK_StartToBlink:
+			if( pLed->bLedOn )
+			{
+				pLed->BlinkingLedState = LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
+			}
+			else
+			{
+				pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+			}
+			break;			
+			
+		case LED_SCAN_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _FALSE;
+			}
+			
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS)
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else 
+				{
+					pLed->bLedNoLinkBlinkInProgress = _FALSE;
+					pLed->CurrLedState = LED_BLINK_SLOWLY;
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+				}
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}
+			else
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS)
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else
+				{
+					 if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+				}
+			}
+			break;
+
+		case LED_TXRX_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS)
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else 
+				{
+					pLed->bLedNoLinkBlinkInProgress = _TRUE;
+					pLed->CurrLedState = LED_BLINK_SLOWLY;
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+				}
+				pLed->bLedBlinkInProgress = _FALSE;	
+			}
+			else
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS)
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else
+				{
+					 if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+				}
+			}
+			break;
+
+		case LED_BLINK_WPS:
+			if( pLed->bLedOn )
+			{
+				pLed->BlinkingLedState = LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
+			}
+			else
+			{
+				pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+			}
+			break;
+
+		case LED_BLINK_WPS_STOP:	//WPS authentication fail
+			if( pLed->bLedOn )			
+				pLed->BlinkingLedState = LED_OFF; 			
+			else			
+				pLed->BlinkingLedState = LED_ON;
+
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+			break;
+
+		case LED_BLINK_WPS_STOP_OVERLAP:	//WPS session overlap		
+			pLed->BlinkTimes--;
+			if(pLed->BlinkTimes == 0)
+			{
+				if(pLed->bLedOn)
+				{
+					pLed->BlinkTimes = 1;							
+				}
+				else
+				{
+					bStopBlinking = _TRUE;
+				}
+			}
+
+			if(bStopBlinking)
+			{				
+				pLed->BlinkTimes = 10;			
+				pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+			}
+			else
+			{
+				if( pLed->bLedOn )			
+					pLed->BlinkingLedState = LED_OFF;			
+				else			
+					pLed->BlinkingLedState = LED_ON;
+
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+			}
+			break;
+
+					
+		default:
+			break;
+	}
+
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink4 CurrLedState %d\n", pLed->CurrLedState));
+
+
+}
+
+static void
+SwLedBlink5(
+	PLED_871x			pLed
+	)
+{
+	_adapter			*padapter = pLed->padapter;
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	u8				bStopBlinking = _FALSE;
+
+	// Change LED according to BlinkingLedState specified.
+	if( pLed->BlinkingLedState == LED_ON ) 
+	{
+		SwLedOn(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes));
+	}
+	else 
+	{
+		SwLedOff(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes));
+	}
+
+	switch(pLed->CurrLedState)
+	{
+		case LED_SCAN_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS)
+				{
+					pLed->CurrLedState = LED_OFF;
+					pLed->BlinkingLedState = LED_OFF; 									
+					if(pLed->bLedOn)				
+						SwLedOff(padapter, pLed);
+				}
+				else 
+				{		pLed->CurrLedState = LED_ON;
+						pLed->BlinkingLedState = LED_ON;					
+						if(!pLed->bLedOn)
+							_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+				}
+
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}
+			else
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS)
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else
+				{
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+				}
+			}
+			break;
+
+	
+		case LED_TXRX_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS)
+				{
+					pLed->CurrLedState = LED_OFF;
+					pLed->BlinkingLedState = LED_OFF; 									
+					if(pLed->bLedOn)
+						SwLedOff(padapter, pLed);
+				}
+				else
+				{
+					pLed->CurrLedState = LED_ON;
+					pLed->BlinkingLedState = LED_ON; 					
+					if(!pLed->bLedOn)
+						_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+				}
+
+				pLed->bLedBlinkInProgress = _FALSE;	
+			}
+			else
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS)
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else
+				{
+					 if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+				}
+			}
+			break;
+					
+		default:
+			break;
+	}
+
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink5 CurrLedState %d\n", pLed->CurrLedState));
+
+
+}
+
+static void
+SwLedBlink6(
+	PLED_871x			pLed
+	)
+{
+	_adapter			*padapter = pLed->padapter;
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	u8				bStopBlinking = _FALSE;
+
+	// Change LED according to BlinkingLedState specified.
+	if( pLed->BlinkingLedState == LED_ON ) 
+	{
+		SwLedOn(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes));
+	}
+	else 
+	{
+		SwLedOff(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes));
+	}
+
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("<==== blink6\n"));
+}
+
+
+//
+//	Description:
+//		Callback function of LED BlinkTimer, 
+//		it just schedules to corresponding BlinkWorkItem.
+//
+static void
+BlinkTimerCallback(
+	unsigned long data
+	)
+{
+	PLED_871x	 pLed = (PLED_871x)data;
+	_adapter		*padapter = pLed->padapter;
+
+	//DBG_871X("%s\n", __FUNCTION__);
+
+	if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE))	
+	{
+		//DBG_871X("%s bSurpriseRemoved:%d, bDriverStopped:%d\n", __FUNCTION__, padapter->bSurpriseRemoved, padapter->bDriverStopped);
+		return;
+	}
+
+#ifdef CONFIG_LED_HANDLED_BY_CMD_THREAD
+	rtw_led_blink_cmd(padapter, pLed);
+#else
+	_set_workitem(&(pLed->BlinkWorkItem));
+#endif
+}
+
+//
+//	Description:
+//		Handler function of LED Blinking.
+//		We dispatch acture LED blink action according to LedStrategy.
+//
+void BlinkHandler(PLED_871x	 pLed)
+{
+	struct led_priv	*ledpriv = &(pLed->padapter->ledpriv);
+	_adapter		*padapter = pLed->padapter;
+
+	//DBG_871X("%s (%s:%d)\n",__FUNCTION__, current->comm, current->pid);
+
+	if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE))	
+	{
+		//DBG_871X("%s bSurpriseRemoved:%d, bDriverStopped:%d\n", __FUNCTION__, padapter->bSurpriseRemoved, padapter->bDriverStopped);
+		return;
+	}
+
+	switch(ledpriv->LedStrategy)
+	{
+		case SW_LED_MODE0:
+			SwLedBlink(pLed);
+			break;
+		
+		case SW_LED_MODE1:
+			SwLedBlink1(pLed);
+			break;
+		
+		case SW_LED_MODE2:
+			SwLedBlink2(pLed);
+			break;
+			
+		case SW_LED_MODE3:
+			SwLedBlink3(pLed);
+			break;
+
+		case SW_LED_MODE4:
+			SwLedBlink4(pLed);
+			break;			
+
+		case SW_LED_MODE5:
+			SwLedBlink5(pLed);
+			break;
+
+		case SW_LED_MODE6:
+			SwLedBlink6(pLed);
+			break;
+
+		default:
+			//RT_TRACE(COMP_LED, DBG_LOUD, ("BlinkWorkItemCallback 0x%x \n", pHalData->LedStrategy));
+			//SwLedBlink(pLed);
+			break;
+	}
+}
+
+//
+//	Description:
+//		Callback function of LED BlinkWorkItem.
+//		We dispatch acture LED blink action according to LedStrategy.
+//
+static void BlinkWorkItemCallback(struct work_struct *work)
+{
+	PLED_871x	 pLed = container_of(work, LED_871x, BlinkWorkItem);
+	BlinkHandler(pLed);
+}
+
+
+
+//================================================================================
+// Default LED behavior.
+//================================================================================
+
+//
+//	Description:	
+//		Implement each led action for SW_LED_MODE0.
+//		This is default strategy.
+//
+static void
+SwLedControlMode0(
+	_adapter		*padapter,
+	LED_CTL_MODE		LedAction
+)
+{
+	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	PLED_871x	pLed = &(ledpriv->SwLed1);
+
+	// Decide led state
+	switch(LedAction)
+	{
+	case LED_CTL_TX:
+	case LED_CTL_RX:
+		if( pLed->bLedBlinkInProgress == _FALSE )
+		{
+			pLed->bLedBlinkInProgress = _TRUE;
+
+			pLed->CurrLedState = LED_BLINK_NORMAL;
+			pLed->BlinkTimes = 2;
+
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = LED_OFF; 
+			else
+				pLed->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+		}
+		break;
+
+	case LED_CTL_START_TO_LINK:
+		if( pLed->bLedBlinkInProgress == _FALSE )
+		{
+			pLed->bLedBlinkInProgress = _TRUE;
+
+			pLed->CurrLedState = LED_BLINK_StartToBlink;
+			pLed->BlinkTimes = 24;
+
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = LED_OFF; 
+			else
+				pLed->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
+		}
+		else
+		{
+			pLed->CurrLedState = LED_BLINK_StartToBlink;
+		}	
+		break;
+		
+	case LED_CTL_LINK:
+		pLed->CurrLedState = LED_ON;
+		if( pLed->bLedBlinkInProgress == _FALSE )
+		{
+			SwLedOn(padapter, pLed);
+		}
+		break;
+
+	case LED_CTL_NO_LINK:
+		pLed->CurrLedState = LED_OFF;
+		if( pLed->bLedBlinkInProgress == _FALSE )
+		{
+			SwLedOff(padapter, pLed);
+		}
+		break;
+	
+	case LED_CTL_POWER_OFF:
+		pLed->CurrLedState = LED_OFF;
+		if(pLed->bLedBlinkInProgress)
+		{
+			_cancel_timer_ex(&(pLed->BlinkTimer));
+			pLed->bLedBlinkInProgress = _FALSE;
+		}
+		SwLedOff(padapter, pLed);
+		break;
+
+	case LED_CTL_START_WPS:
+		if( pLed->bLedBlinkInProgress == _FALSE || pLed->CurrLedState == LED_ON)
+		{
+			pLed->bLedBlinkInProgress = _TRUE;
+
+			pLed->CurrLedState = LED_BLINK_WPS;
+			pLed->BlinkTimes = 20;
+
+			if( pLed->bLedOn )
+			{
+				pLed->BlinkingLedState = LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL);
+			}
+			else
+			{
+				pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL);
+			}
+		}
+		break;
+
+	case LED_CTL_STOP_WPS:
+		if(pLed->bLedBlinkInProgress)
+		{
+			pLed->CurrLedState = LED_OFF;
+			_cancel_timer_ex(&(pLed->BlinkTimer));
+			pLed->bLedBlinkInProgress = _FALSE;
+		}
+		break;
+		
+
+	default:
+		break;
+	}
+	
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState));
+	
+}
+
+ //ALPHA, added by chiyoko, 20090106
+static void
+SwLedControlMode1(
+	_adapter		*padapter,
+	LED_CTL_MODE		LedAction
+)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
+	struct led_priv		*ledpriv = &(padapter->ledpriv);
+	PLED_871x			pLed = &(ledpriv->SwLed0);
+	struct mlme_priv		*pmlmepriv = &(padapter->mlmepriv);
+
+	if(pHalData->EEPROMCustomerID == RT_CID_819x_CAMEO)
+		pLed = &(ledpriv->SwLed1);
+	
+	switch(LedAction)
+	{		
+		case LED_CTL_POWER_ON:
+		case LED_CTL_START_TO_LINK:	
+		case LED_CTL_NO_LINK:
+			if( pLed->bLedNoLinkBlinkInProgress == _FALSE )
+			{
+				if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
+				{
+					return;
+				}
+				if( pLed->bLedLinkBlinkInProgress == _TRUE )
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedLinkBlinkInProgress = _FALSE;
+				}
+	 			if(pLed->bLedBlinkInProgress ==_TRUE)
+				{	
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+	 			}
+				
+				pLed->bLedNoLinkBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_BLINK_SLOWLY;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+			}
+			break;		
+
+		case LED_CTL_LINK:
+			if( pLed->bLedLinkBlinkInProgress == _FALSE )
+			{
+				if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
+				{
+					return;
+				}
+				if(pLed->bLedNoLinkBlinkInProgress == _TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedNoLinkBlinkInProgress = _FALSE;
+				}
+				if(pLed->bLedBlinkInProgress ==_TRUE)
+				{	
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+	 			}
+				pLed->bLedLinkBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_BLINK_NORMAL;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+			}
+			break;
+
+		case LED_CTL_SITE_SURVEY:
+			 if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE))
+			 	;
+			 else if(pLed->bLedScanBlinkInProgress ==_FALSE)
+			 {
+			 	if(IS_LED_WPS_BLINKING(pLed))
+					return;
+				
+	  			if(pLed->bLedNoLinkBlinkInProgress == _TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedNoLinkBlinkInProgress = _FALSE;
+				}
+				if( pLed->bLedLinkBlinkInProgress == _TRUE )
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					 pLed->bLedLinkBlinkInProgress = _FALSE;
+				}
+	 			if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				pLed->bLedScanBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_SCAN_BLINK;
+				pLed->BlinkTimes = 24;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			 }
+			break;
+		
+		case LED_CTL_TX:
+		case LED_CTL_RX:
+			if(pLed->bLedBlinkInProgress ==_FALSE)
+			{
+				if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
+				{
+					return;
+				}
+				if(pLed->bLedNoLinkBlinkInProgress == _TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedNoLinkBlinkInProgress = _FALSE;
+				}
+				if( pLed->bLedLinkBlinkInProgress == _TRUE )
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedLinkBlinkInProgress = _FALSE;
+				}
+				pLed->bLedBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_TXRX_BLINK;
+				pLed->BlinkTimes = 2;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+			}
+			break;
+
+		case LED_CTL_START_WPS: //wait until xinpin finish
+		case LED_CTL_START_WPS_BOTTON:
+			 if(pLed->bLedWPSBlinkInProgress ==_FALSE)
+			 {
+				if(pLed->bLedNoLinkBlinkInProgress == _TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedNoLinkBlinkInProgress = _FALSE;
+				}
+				if( pLed->bLedLinkBlinkInProgress == _TRUE )
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					 pLed->bLedLinkBlinkInProgress = _FALSE;
+				}
+				if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				if(pLed->bLedScanBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedScanBlinkInProgress = _FALSE;
+				}				
+				pLed->bLedWPSBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_BLINK_WPS;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			 }
+			break;
+
+		
+		case LED_CTL_STOP_WPS:
+			if(pLed->bLedNoLinkBlinkInProgress == _TRUE)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedNoLinkBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedLinkBlinkInProgress == _TRUE )
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				 pLed->bLedLinkBlinkInProgress = _FALSE;
+			}
+			if(pLed->bLedBlinkInProgress ==_TRUE)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = _FALSE;
+			}
+			if(pLed->bLedScanBlinkInProgress ==_TRUE)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}			
+			if(pLed->bLedWPSBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+			}
+			else
+			{
+				pLed->bLedWPSBlinkInProgress = _TRUE;
+			}
+			
+			pLed->CurrLedState = LED_BLINK_WPS_STOP;
+			if(pLed->bLedOn)
+			{
+				pLed->BlinkingLedState = LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA);
+			}
+			else
+			{
+				pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), 0);
+			}					
+			break;		
+
+		case LED_CTL_STOP_WPS_FAIL:			
+			if(pLed->bLedWPSBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;				
+			}			
+
+			pLed->bLedNoLinkBlinkInProgress = _TRUE;
+			pLed->CurrLedState = LED_BLINK_SLOWLY;
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = LED_OFF;
+			else
+				pLed->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+			break;				
+
+		case LED_CTL_POWER_OFF:
+			pLed->CurrLedState = LED_OFF;
+			pLed->BlinkingLedState = LED_OFF; 
+			if( pLed->bLedNoLinkBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedNoLinkBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedLinkBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedLinkBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedWPSBlinkInProgress )
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedScanBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}			
+
+			SwLedOff(padapter, pLed);
+			break;
+			
+		default:
+			break;
+
+	}
+
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState));
+}
+
+ //Arcadyan/Sitecom , added by chiyoko, 20090216
+static void
+SwLedControlMode2(
+	_adapter				*padapter,
+	LED_CTL_MODE		LedAction
+)
+{
+	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	PLED_871x 		pLed = &(ledpriv->SwLed0);
+	
+	switch(LedAction)
+	{		
+		case LED_CTL_SITE_SURVEY:
+			 if(pmlmepriv->LinkDetectInfo.bBusyTraffic)
+			 	;		 
+			 else if(pLed->bLedScanBlinkInProgress ==_FALSE)
+			 {
+			 	if(IS_LED_WPS_BLINKING(pLed))
+					return;
+			 
+	 			if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				pLed->bLedScanBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_SCAN_BLINK;
+				pLed->BlinkTimes = 24;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			 }
+			break;
+		
+		case LED_CTL_TX:
+		case LED_CTL_RX:
+	 		if((pLed->bLedBlinkInProgress ==_FALSE) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE))
+	  		{
+	  		  	if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
+				{
+					return;
+				}
+
+				pLed->bLedBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_TXRX_BLINK;
+				pLed->BlinkTimes = 2;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+			}
+			break;
+
+		case LED_CTL_LINK:
+			pLed->CurrLedState = LED_ON;
+			pLed->BlinkingLedState = LED_ON;
+			if( pLed->bLedBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedScanBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}			
+
+			_set_timer(&(pLed->BlinkTimer), 0);
+			break;			
+
+		case LED_CTL_START_WPS: //wait until xinpin finish
+		case LED_CTL_START_WPS_BOTTON:		
+			if(pLed->bLedWPSBlinkInProgress ==_FALSE)
+			{
+				if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				if(pLed->bLedScanBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedScanBlinkInProgress = _FALSE;
+				}				
+				pLed->bLedWPSBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_ON;
+				pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), 0);
+			 }			
+			break;
+			
+		case LED_CTL_STOP_WPS:
+			pLed->bLedWPSBlinkInProgress = _FALSE;
+			if(padapter->pwrctrlpriv.rf_pwrstate != rf_on)
+			{
+				SwLedOff(padapter, pLed);
+			}
+			else
+			{
+				pLed->CurrLedState = LED_ON;
+				pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), 0);
+				RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));
+			}
+			break;
+			
+		case LED_CTL_STOP_WPS_FAIL:			
+			pLed->bLedWPSBlinkInProgress = _FALSE;			
+			if(padapter->pwrctrlpriv.rf_pwrstate != rf_on)
+			{
+				SwLedOff(padapter, pLed);
+			}
+			else 
+			{
+				pLed->CurrLedState = LED_OFF;
+				pLed->BlinkingLedState = LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), 0);
+				RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); 				
+			}	
+			break;				
+
+		case LED_CTL_START_TO_LINK: 
+		case LED_CTL_NO_LINK:
+			if(!IS_LED_BLINKING(pLed))
+			{
+				pLed->CurrLedState = LED_OFF;
+				pLed->BlinkingLedState = LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), 0);
+			}
+			break;
+			
+		case LED_CTL_POWER_OFF:
+			pLed->CurrLedState = LED_OFF;
+			pLed->BlinkingLedState = LED_OFF;
+			if( pLed->bLedBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedScanBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}			
+			if( pLed->bLedWPSBlinkInProgress )
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;
+			}
+
+			_set_timer(&(pLed->BlinkTimer), 0);
+			break;
+			
+		default:
+			break;
+
+	}
+
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));
+}
+
+  //COREGA, added by chiyoko, 20090316
+ static void
+ SwLedControlMode3(
+	_adapter				*padapter,
+	LED_CTL_MODE		LedAction
+)
+{
+	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	PLED_871x		pLed = &(ledpriv->SwLed0);
+	
+	switch(LedAction)
+	{		
+		case LED_CTL_SITE_SURVEY:
+			if(pmlmepriv->LinkDetectInfo.bBusyTraffic)
+				;		 
+			else if(pLed->bLedScanBlinkInProgress ==_FALSE)
+			{
+				if(IS_LED_WPS_BLINKING(pLed))
+					return;
+
+				if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				pLed->bLedScanBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_SCAN_BLINK;
+				pLed->BlinkTimes = 24;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			}
+			break;
+		
+		case LED_CTL_TX:
+		case LED_CTL_RX:
+	 		if((pLed->bLedBlinkInProgress ==_FALSE) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE))
+	  		{
+	  		  	if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
+				{
+					return;
+				}
+
+				pLed->bLedBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_TXRX_BLINK;
+				pLed->BlinkTimes = 2;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+			}
+			break;
+
+		case LED_CTL_LINK:
+			if(IS_LED_WPS_BLINKING(pLed))
+				return;
+			
+			pLed->CurrLedState = LED_ON;
+			pLed->BlinkingLedState = LED_ON;
+			if( pLed->bLedBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedScanBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}			
+
+			_set_timer(&(pLed->BlinkTimer), 0);
+			break;			
+
+		case LED_CTL_START_WPS: //wait until xinpin finish
+		case LED_CTL_START_WPS_BOTTON:		
+			if(pLed->bLedWPSBlinkInProgress ==_FALSE)
+			{
+				if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				if(pLed->bLedScanBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedScanBlinkInProgress = _FALSE;
+				}				
+				pLed->bLedWPSBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_BLINK_WPS;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			}			
+			break;
+			
+		case LED_CTL_STOP_WPS:			
+			if(pLed->bLedWPSBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;				
+			}						
+			else
+			{
+				pLed->bLedWPSBlinkInProgress = _TRUE;
+			}
+				
+			pLed->CurrLedState = LED_BLINK_WPS_STOP;
+			if(pLed->bLedOn)
+			{
+				pLed->BlinkingLedState = LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA);
+			}
+			else
+			{
+				pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), 0);
+			}					
+
+			break;
+			
+		case LED_CTL_STOP_WPS_FAIL:			
+			if(pLed->bLedWPSBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;				
+			}			
+
+			pLed->CurrLedState = LED_OFF;
+			pLed->BlinkingLedState = LED_OFF;
+			_set_timer(&(pLed->BlinkTimer), 0);
+			break;				
+
+		case LED_CTL_START_TO_LINK: 
+		case LED_CTL_NO_LINK:
+			if(!IS_LED_BLINKING(pLed))
+			{
+				pLed->CurrLedState = LED_OFF;
+				pLed->BlinkingLedState = LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), 0);
+			}
+			break;
+			
+		case LED_CTL_POWER_OFF:
+			pLed->CurrLedState = LED_OFF;
+			pLed->BlinkingLedState = LED_OFF;
+			if( pLed->bLedBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedScanBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}			
+			if( pLed->bLedWPSBlinkInProgress )
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;
+			}
+
+			_set_timer(&(pLed->BlinkTimer), 0);
+			break;
+			
+		default:
+			break;
+
+	}
+
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));
+}
+
+
+ //Edimax-Belkin, added by chiyoko, 20090413
+static void
+SwLedControlMode4(
+	_adapter				*padapter,
+	LED_CTL_MODE		LedAction
+)
+{
+	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	PLED_871x		pLed = &(ledpriv->SwLed0);
+	PLED_871x		pLed1 = &(ledpriv->SwLed1);
+	
+	switch(LedAction)
+	{		
+		case LED_CTL_START_TO_LINK:	
+			if(pLed1->bLedWPSBlinkInProgress)
+			{
+				pLed1->bLedWPSBlinkInProgress = _FALSE;
+				_cancel_timer_ex(&(pLed1->BlinkTimer));
+		
+				pLed1->BlinkingLedState = LED_OFF;
+				pLed1->CurrLedState = LED_OFF;
+
+				if(pLed1->bLedOn)
+					_set_timer(&(pLed->BlinkTimer), 0);
+			}
+				
+			if( pLed->bLedStartToLinkBlinkInProgress == _FALSE )
+			{
+				if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
+				{
+					return;
+				}
+	 			if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+	 			}
+	 			if(pLed->bLedNoLinkBlinkInProgress ==_TRUE)
+				{	
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedNoLinkBlinkInProgress = _FALSE;
+	 			}				
+				
+				pLed->bLedStartToLinkBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_BLINK_StartToBlink;
+				if( pLed->bLedOn )
+				{
+					pLed->BlinkingLedState = LED_OFF;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
+				}
+				else
+				{
+					pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+				}
+			}
+			break;		
+
+		case LED_CTL_LINK:			
+		case LED_CTL_NO_LINK:
+			//LED1 settings
+			if(LedAction == LED_CTL_LINK)
+			{
+				if(pLed1->bLedWPSBlinkInProgress)
+				{
+					pLed1->bLedWPSBlinkInProgress = _FALSE;
+					_cancel_timer_ex(&(pLed1->BlinkTimer));
+			
+					pLed1->BlinkingLedState = LED_OFF;
+					pLed1->CurrLedState = LED_OFF;
+
+					if(pLed1->bLedOn)
+						_set_timer(&(pLed->BlinkTimer), 0);
+				}				
+			}
+			
+			if( pLed->bLedNoLinkBlinkInProgress == _FALSE )
+			{
+				if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
+				{
+					return;
+				}
+	 			if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+	 			}
+				
+				pLed->bLedNoLinkBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_BLINK_SLOWLY;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+			}
+			break;		
+
+		case LED_CTL_SITE_SURVEY:
+			if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE))
+				;		 
+			else if(pLed->bLedScanBlinkInProgress ==_FALSE)
+			{
+				if(IS_LED_WPS_BLINKING(pLed))
+					return;
+
+				if(pLed->bLedNoLinkBlinkInProgress == _TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedNoLinkBlinkInProgress = _FALSE;
+				}
+				if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				pLed->bLedScanBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_SCAN_BLINK;
+				pLed->BlinkTimes = 24;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			}
+			break;
+		
+		case LED_CTL_TX:
+		case LED_CTL_RX:
+	 		if(pLed->bLedBlinkInProgress ==_FALSE)
+	  		{
+	  		  	if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
+				{
+					return;
+				}
+	  		  	if(pLed->bLedNoLinkBlinkInProgress == _TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedNoLinkBlinkInProgress = _FALSE;
+				}
+				pLed->bLedBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_TXRX_BLINK;
+				pLed->BlinkTimes = 2;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+			}
+			break;
+
+		case LED_CTL_START_WPS: //wait until xinpin finish
+		case LED_CTL_START_WPS_BOTTON:
+			if(pLed1->bLedWPSBlinkInProgress)
+			{
+				pLed1->bLedWPSBlinkInProgress = _FALSE;
+				_cancel_timer_ex(&(pLed1->BlinkTimer));
+			
+				pLed1->BlinkingLedState = LED_OFF;
+				pLed1->CurrLedState = LED_OFF;
+
+				if(pLed1->bLedOn)
+					_set_timer(&(pLed->BlinkTimer), 0);
+			}
+				
+			if(pLed->bLedWPSBlinkInProgress ==_FALSE)
+			{
+				if(pLed->bLedNoLinkBlinkInProgress == _TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedNoLinkBlinkInProgress = _FALSE;
+				}
+				if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				if(pLed->bLedScanBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedScanBlinkInProgress = _FALSE;
+				}				
+				pLed->bLedWPSBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_BLINK_WPS;
+				if( pLed->bLedOn )
+				{
+					pLed->BlinkingLedState = LED_OFF;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
+				}
+				else
+				{
+					pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+				}
+			}
+			break;
+		
+		case LED_CTL_STOP_WPS:	//WPS connect success		
+			if(pLed->bLedWPSBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;								
+			}
+
+			pLed->bLedNoLinkBlinkInProgress = _TRUE;
+			pLed->CurrLedState = LED_BLINK_SLOWLY;
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = LED_OFF; 
+			else
+				pLed->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+
+			break;		
+
+		case LED_CTL_STOP_WPS_FAIL:		//WPS authentication fail			
+			if(pLed->bLedWPSBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;				
+			}			
+
+			pLed->bLedNoLinkBlinkInProgress = _TRUE;
+			pLed->CurrLedState = LED_BLINK_SLOWLY;
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = LED_OFF; 
+			else
+				pLed->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+
+			//LED1 settings
+			if(pLed1->bLedWPSBlinkInProgress)
+				_cancel_timer_ex(&(pLed1->BlinkTimer));
+			else	
+				pLed1->bLedWPSBlinkInProgress = _TRUE;				
+
+			pLed1->CurrLedState = LED_BLINK_WPS_STOP;
+			if( pLed1->bLedOn )
+				pLed1->BlinkingLedState = LED_OFF; 
+			else
+				pLed1->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+
+			break;				
+
+		case LED_CTL_STOP_WPS_FAIL_OVERLAP:	//WPS session overlap		
+			if(pLed->bLedWPSBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;								
+			}
+			
+			pLed->bLedNoLinkBlinkInProgress = _TRUE;
+			pLed->CurrLedState = LED_BLINK_SLOWLY;
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = LED_OFF; 
+			else
+				pLed->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+
+			//LED1 settings
+			if(pLed1->bLedWPSBlinkInProgress)
+				_cancel_timer_ex(&(pLed1->BlinkTimer));
+			else	
+				pLed1->bLedWPSBlinkInProgress = _TRUE;				
+
+			pLed1->CurrLedState = LED_BLINK_WPS_STOP_OVERLAP;
+			pLed1->BlinkTimes = 10;
+			if( pLed1->bLedOn )
+				pLed1->BlinkingLedState = LED_OFF; 
+			else
+				pLed1->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+			
+			break;
+
+		case LED_CTL_POWER_OFF:
+			pLed->CurrLedState = LED_OFF;
+			pLed->BlinkingLedState = LED_OFF; 
+			
+			if( pLed->bLedNoLinkBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedNoLinkBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedLinkBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedLinkBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedWPSBlinkInProgress )
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedScanBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}	
+			if( pLed->bLedStartToLinkBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedStartToLinkBlinkInProgress = _FALSE;
+			}			
+
+			if( pLed1->bLedWPSBlinkInProgress )
+			{
+				_cancel_timer_ex(&(pLed1->BlinkTimer));
+				pLed1->bLedWPSBlinkInProgress = _FALSE;
+			}
+
+			pLed1->BlinkingLedState = LED_UNKNOWN;				
+			SwLedOff(padapter, pLed);
+			SwLedOff(padapter, pLed1);			
+			break;
+			
+		default:
+			break;
+
+	}
+
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState));
+}
+
+
+
+ //Sercomm-Belkin, added by chiyoko, 20090415
+static void
+SwLedControlMode5(
+	_adapter				*padapter,
+	LED_CTL_MODE		LedAction
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	PLED_871x		pLed = &(ledpriv->SwLed0);
+
+	if(pHalData->EEPROMCustomerID == RT_CID_819x_CAMEO)
+		pLed = &(ledpriv->SwLed1);
+	
+	switch(LedAction)
+	{		
+		case LED_CTL_POWER_ON:
+		case LED_CTL_NO_LINK:
+		case LED_CTL_LINK: 	//solid blue
+			pLed->CurrLedState = LED_ON;
+			pLed->BlinkingLedState = LED_ON; 
+
+			_set_timer(&(pLed->BlinkTimer), 0);
+			break;
+
+		case LED_CTL_SITE_SURVEY:
+			if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE))
+				;		 
+			else if(pLed->bLedScanBlinkInProgress ==_FALSE)
+			{				
+				if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				pLed->bLedScanBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_SCAN_BLINK;
+				pLed->BlinkTimes = 24;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			}
+			break;
+		
+		case LED_CTL_TX:
+		case LED_CTL_RX:
+	 		if(pLed->bLedBlinkInProgress ==_FALSE)
+	  		{
+	  		  	if(pLed->CurrLedState == LED_SCAN_BLINK)
+				{
+					return;
+				}			
+				pLed->bLedBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_TXRX_BLINK;
+				pLed->BlinkTimes = 2;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+			}
+			break;				
+
+		case LED_CTL_POWER_OFF:
+			pLed->CurrLedState = LED_OFF;
+			pLed->BlinkingLedState = LED_OFF; 
+
+			if( pLed->bLedBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = _FALSE;
+			}			
+				
+			SwLedOff(padapter, pLed);
+			break;
+			
+		default:
+			break;
+
+	}
+
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState));
+}
+
+ //WNC-Corega, added by chiyoko, 20090902
+static void
+SwLedControlMode6(
+	_adapter				*padapter,
+	LED_CTL_MODE		LedAction
+)
+{
+	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	PLED_871x pLed0 = &(ledpriv->SwLed0);
+	
+	switch(LedAction)
+	{
+		case LED_CTL_POWER_ON:
+		case LED_CTL_LINK:
+		case LED_CTL_NO_LINK:
+			_cancel_timer_ex(&(pLed0->BlinkTimer));
+			pLed0->CurrLedState = LED_ON;
+			pLed0->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed0->BlinkTimer), 0);
+			break;
+
+		case LED_CTL_POWER_OFF:
+			SwLedOff(padapter, pLed0);
+			break;
+
+		default:
+			break;
+	}
+
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("ledcontrol 6 Led %d\n", pLed->CurrLedState));
+}
+
+
+//
+//	Description:	
+//		Dispatch LED action according to pHalData->LedStrategy. 
+//
+static void
+LedControl871x(
+	_adapter				*padapter,
+	LED_CTL_MODE		LedAction
+	)
+{
+	struct led_priv	*ledpriv = &(padapter->ledpriv);
+
+       if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE) 
+	   	||(padapter->hw_init_completed == _FALSE) )	
+       {
+             return;
+       }
+
+
+	if( ledpriv->bRegUseLed == _FALSE)
+		return;
+
+	//if (!priv->up)
+	//	return;
+
+	//if(priv->bInHctTest)
+	//	return;
+
+	if( (padapter->pwrctrlpriv.rf_pwrstate != rf_on &&
+		padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) &&
+		(LedAction == LED_CTL_TX || LedAction == LED_CTL_RX || 
+		 LedAction == LED_CTL_SITE_SURVEY || 
+		 LedAction == LED_CTL_LINK || 
+		 LedAction == LED_CTL_NO_LINK ||
+		 LedAction == LED_CTL_POWER_ON) )
+	{
+		return;
+	}
+	
+	switch(ledpriv->LedStrategy)
+	{
+		case SW_LED_MODE0:
+			//SwLedControlMode0(padapter, LedAction);
+			break;
+
+		case SW_LED_MODE1:
+			SwLedControlMode1(padapter, LedAction);
+			break;
+		case SW_LED_MODE2:
+			SwLedControlMode2(padapter, LedAction);
+                	break;
+
+		case SW_LED_MODE3:
+			SwLedControlMode3(padapter, LedAction);
+			break;	
+
+		case SW_LED_MODE4:
+			SwLedControlMode4(padapter, LedAction);
+			break;			
+
+		case SW_LED_MODE5:
+			SwLedControlMode5(padapter, LedAction);
+			break;
+
+		case SW_LED_MODE6:
+			SwLedControlMode6(padapter, LedAction);
+			break;
+
+		default:
+			break;
+	}
+	
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("LedStrategy:%d, LedAction %d\n", ledpriv->LedStrategy,LedAction));
+}
+
+//
+//	Description:
+//		Initialize all LED_871x objects.
+//
+void
+rtl8192cu_InitSwLeds(
+	_adapter	*padapter
+	)
+{
+	struct led_priv *pledpriv = &(padapter->ledpriv);
+
+	pledpriv->LedControlHandler = LedControl871x;
+
+	InitLed871x(padapter, &(pledpriv->SwLed0), LED_PIN_LED0);
+
+	InitLed871x(padapter,&(pledpriv->SwLed1), LED_PIN_LED1);
+}
+
+
+//
+//	Description:
+//		DeInitialize all LED_819xUsb objects.
+//
+void
+rtl8192cu_DeInitSwLeds(
+	_adapter	*padapter
+	)
+{
+	struct led_priv	*ledpriv = &(padapter->ledpriv);
+
+	DeInitLed871x( &(ledpriv->SwLed0) );
+	DeInitLed871x( &(ledpriv->SwLed1) );
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/rtl8192cu_recv.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/rtl8192cu_recv.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/rtl8192cu_recv.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/rtl8192cu_recv.c	2017-09-23 03:42:49.946675284 +0800
@@ -0,0 +1,380 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#define _RTL8192CU_RECV_C_
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <recv_osdep.h>
+#include <mlme_osdep.h>
+#include <ip.h>
+#include <if_ether.h>
+#include <ethernet.h>
+
+#include <usb_ops.h>
+
+#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
+
+#error "Shall be Linux or Windows, but not both!\n"
+
+#endif
+
+#include <wifi.h>
+#include <circ_buf.h>
+
+#include <rtl8192c_hal.h>
+
+
+void rtl8192cu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf)
+{
+
+	precvbuf->transfer_len = 0;
+
+	precvbuf->len = 0;
+
+	precvbuf->ref_cnt = 0;
+
+	if(precvbuf->pbuf)
+	{
+		precvbuf->pdata = precvbuf->phead = precvbuf->ptail = precvbuf->pbuf;
+		precvbuf->pend = precvbuf->pdata + MAX_RECVBUF_SZ;
+	}
+
+}
+
+int	rtl8192cu_init_recv_priv(_adapter *padapter)
+{
+	struct recv_priv	*precvpriv = &padapter->recvpriv;
+	int	i, res = _SUCCESS;
+	struct recv_buf *precvbuf;
+
+#ifdef CONFIG_RECV_THREAD_MODE	
+	_rtw_init_sema(&precvpriv->recv_sema, 0);//will be removed
+	_rtw_init_sema(&precvpriv->terminate_recvthread_sema, 0);//will be removed
+#endif
+
+#ifdef PLATFORM_LINUX
+	tasklet_init(&precvpriv->recv_tasklet,
+	     (void(*)(unsigned long))rtl8192cu_recv_tasklet,
+	     (unsigned long)padapter);
+#endif
+
+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
+#ifdef PLATFORM_LINUX
+	precvpriv->int_in_urb = usb_alloc_urb(0, GFP_KERNEL);
+	if(precvpriv->int_in_urb == NULL){
+		DBG_8192C("alloc_urb for interrupt in endpoint fail !!!!\n");
+	}
+#endif
+	precvpriv->int_in_buf = rtw_zmalloc(sizeof(INTERRUPT_MSG_FORMAT_EX));
+	if(precvpriv->int_in_buf == NULL){
+		DBG_8192C("alloc_mem for interrupt in endpoint fail !!!!\n");
+	}
+#endif
+
+	//init recv_buf
+	_rtw_init_queue(&precvpriv->free_recv_buf_queue);
+
+#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX
+	_rtw_init_queue(&precvpriv->recv_buf_pending_queue);
+#endif	// CONFIG_USE_USB_BUFFER_ALLOC_RX
+
+	precvpriv->pallocated_recv_buf = rtw_zmalloc(NR_RECVBUFF *sizeof(struct recv_buf) + 4);
+	if(precvpriv->pallocated_recv_buf==NULL){
+		res= _FAIL;
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("alloc recv_buf fail!\n"));
+		goto exit;
+	}
+	_rtw_memset(precvpriv->pallocated_recv_buf, 0, NR_RECVBUFF *sizeof(struct recv_buf) + 4);
+
+	precvpriv->precv_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(precvpriv->pallocated_recv_buf), 4);
+	//precvpriv->precv_buf = precvpriv->pallocated_recv_buf + 4 -
+	//						((uint) (precvpriv->pallocated_recv_buf) &(4-1));
+
+
+	precvbuf = (struct recv_buf*)precvpriv->precv_buf;
+
+	for(i=0; i < NR_RECVBUFF ; i++)
+	{
+		_rtw_init_listhead(&precvbuf->list);
+
+		_rtw_spinlock_init(&precvbuf->recvbuf_lock);
+
+		precvbuf->alloc_sz = MAX_RECVBUF_SZ;
+
+		res = rtw_os_recvbuf_resource_alloc(padapter, precvbuf);
+		if(res==_FAIL)
+			break;
+
+		precvbuf->ref_cnt = 0;
+		precvbuf->adapter =padapter;
+
+
+		//rtw_list_insert_tail(&precvbuf->list, &(precvpriv->free_recv_buf_queue.queue));
+
+		precvbuf++;
+
+	}
+
+	precvpriv->free_recv_buf_queue_cnt = NR_RECVBUFF;
+
+#ifdef PLATFORM_LINUX
+
+	skb_queue_head_init(&precvpriv->rx_skb_queue);
+
+#ifdef CONFIG_PREALLOC_RECV_SKB
+	{
+		int i;
+		SIZE_PTR tmpaddr=0;
+		SIZE_PTR alignment=0;
+		struct sk_buff *pskb=NULL;
+
+		skb_queue_head_init(&precvpriv->free_recv_skb_queue);
+
+		for(i=0; i<NR_PREALLOC_RECV_SKB; i++)
+		{
+
+	#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html
+			pskb = dev_alloc_skb(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
+	#else
+			pskb = netdev_alloc_skb(padapter->pnetdev, MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
+	#endif
+
+			if(pskb)
+			{
+				pskb->dev = padapter->pnetdev;
+
+				tmpaddr = (SIZE_PTR)pskb->data;
+				alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1);
+				skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment));
+
+				skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb);
+			}
+
+			pskb=NULL;
+
+		}
+	}
+#endif
+
+#endif
+
+exit:
+
+	return res;
+
+}
+
+void rtl8192cu_free_recv_priv (_adapter *padapter)
+{
+	int	i;
+	struct recv_buf	*precvbuf;
+	struct recv_priv	*precvpriv = &padapter->recvpriv;
+
+	precvbuf = (struct recv_buf *)precvpriv->precv_buf;
+
+	for(i=0; i < NR_RECVBUFF ; i++)
+	{
+		rtw_os_recvbuf_resource_free(padapter, precvbuf);
+		precvbuf++;
+	}
+
+	if(precvpriv->pallocated_recv_buf)
+		rtw_mfree(precvpriv->pallocated_recv_buf, NR_RECVBUFF *sizeof(struct recv_buf) + 4);
+
+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
+#ifdef PLATFORM_LINUX
+	if(precvpriv->int_in_urb)
+	{
+		usb_free_urb(precvpriv->int_in_urb);
+	}
+#endif
+	if(precvpriv->int_in_buf)
+		rtw_mfree(precvpriv->int_in_buf, sizeof(INTERRUPT_MSG_FORMAT_EX));
+#endif
+
+#ifdef PLATFORM_LINUX
+
+	if (skb_queue_len(&precvpriv->rx_skb_queue)) {
+		DBG_8192C(KERN_WARNING "rx_skb_queue not empty\n");
+	}
+
+	skb_queue_purge(&precvpriv->rx_skb_queue);
+
+#ifdef CONFIG_PREALLOC_RECV_SKB
+
+	if (skb_queue_len(&precvpriv->free_recv_skb_queue)) {
+		DBG_8192C(KERN_WARNING "free_recv_skb_queue not empty, %d\n", skb_queue_len(&precvpriv->free_recv_skb_queue));
+	}
+
+	skb_queue_purge(&precvpriv->free_recv_skb_queue);
+
+#endif
+
+#endif
+
+}
+
+void rtl8192cu_update_recvframe_attrib_from_recvstat(union recv_frame *precvframe, struct recv_stat *prxstat)
+{
+	u8	physt, qos, shift, icverr, htc, crcerr;
+	u16	drvinfo_sz=0;
+	struct phy_stat		*pphy_info;
+	struct rx_pkt_attrib	*pattrib = &precvframe->u.hdr.attrib;
+	_adapter				*padapter = precvframe->u.hdr.adapter;
+	u8	bPacketMatchBSSID =_FALSE;
+	u8	bPacketToSelf = _FALSE;
+	u8	bPacketBeacon = _FALSE;
+
+
+	//Offset 0
+	drvinfo_sz = (le32_to_cpu(prxstat->rxdw0)&0x000f0000)>>16;
+	drvinfo_sz = drvinfo_sz<<3;
+
+	pattrib->bdecrypted = ((le32_to_cpu(prxstat->rxdw0) & BIT(27)) >> 27)? 0:1;
+
+	physt = ((le32_to_cpu(prxstat->rxdw0) & BIT(26)) >> 26)? 1:0;
+
+	shift = (le32_to_cpu(prxstat->rxdw0)&0x03000000)>>24;
+
+	qos = ((le32_to_cpu(prxstat->rxdw0) & BIT(23)) >> 23)? 1:0;
+
+	icverr = ((le32_to_cpu(prxstat->rxdw0) & BIT(15)) >> 15)? 1:0;
+
+	pattrib->crc_err = crcerr = ((le32_to_cpu(prxstat->rxdw0) & BIT(14)) >> 14 )? 1:0;
+
+
+	//Offset 4
+
+	//Offset 8
+
+	//Offset 12
+#ifdef CONFIG_TCP_CSUM_OFFLOAD_RX
+	if ( le32_to_cpu(prxstat->rxdw3) & BIT(13)) {
+		pattrib->tcpchk_valid = 1; // valid
+		if ( le32_to_cpu(prxstat->rxdw3) & BIT(11) ) {
+			pattrib->tcp_chkrpt = 1; // correct
+			//DBG_8192C("tcp csum ok\n");
+		} else
+			pattrib->tcp_chkrpt = 0; // incorrect
+
+		if ( le32_to_cpu(prxstat->rxdw3) & BIT(12) )
+			pattrib->ip_chkrpt = 1; // correct
+		else
+			pattrib->ip_chkrpt = 0; // incorrect
+
+	} else {
+		pattrib->tcpchk_valid = 0; // invalid
+	}
+
+#endif
+
+	pattrib->mcs_rate=(u8)((le32_to_cpu(prxstat->rxdw3))&0x3f);
+	pattrib->rxht=(u8)((le32_to_cpu(prxstat->rxdw3) >>6)&0x1);
+
+	htc = (u8)((le32_to_cpu(prxstat->rxdw3) >>10)&0x1);
+
+	//Offset 16
+	//Offset 20
+
+
+#if 0 //dump rxdesc for debug
+	DBG_8192C("drvinfo_sz=%d\n", drvinfo_sz);
+	DBG_8192C("physt=%d\n", physt);
+	DBG_8192C("shift=%d\n", shift);
+	DBG_8192C("qos=%d\n", qos);
+	DBG_8192C("icverr=%d\n", icverr);
+	DBG_8192C("htc=%d\n", htc);
+	DBG_8192C("bdecrypted=%d\n", pattrib->bdecrypted);
+	DBG_8192C("mcs_rate=%d\n", pattrib->mcs_rate);
+	DBG_8192C("rxht=%d\n", pattrib->rxht);
+#endif
+
+	//phy_info
+	if(drvinfo_sz && physt)
+	{
+		bPacketMatchBSSID = ((!IsFrameTypeCtrl(precvframe->u.hdr.rx_data)) && !icverr && !crcerr &&
+			_rtw_memcmp(get_hdr_bssid(precvframe->u.hdr.rx_data), get_bssid(&padapter->mlmepriv), ETH_ALEN));
+			
+		bPacketToSelf = bPacketMatchBSSID &&  (_rtw_memcmp(get_da(precvframe->u.hdr.rx_data), myid(&padapter->eeprompriv), ETH_ALEN));
+
+		bPacketBeacon = (GetFrameSubType(precvframe->u.hdr.rx_data) ==  WIFI_BEACON);
+	
+
+		pphy_info = (struct phy_stat *)(prxstat+1);
+
+		//DBG_8192C("pphy_info, of0=0x%08x\n", *pphy_info);
+		//DBG_8192C("pphy_info, of1=0x%08x\n", *(pphy_info+1));
+		//DBG_8192C("pphy_info, of2=0x%08x\n", *(pphy_info+2));
+		//DBG_8192C("pphy_info, of3=0x%08x\n", *(pphy_info+3));
+		//DBG_8192C("pphy_info, of4=0x%08x\n", *(pphy_info+4));
+		//DBG_8192C("pphy_info, of5=0x%08x\n", *(pphy_info+5));
+		//DBG_8192C("pphy_info, of6=0x%08x\n", *(pphy_info+6));
+		//DBG_8192C("pphy_info, of7=0x%08x\n", *(pphy_info+7));
+
+		rtl8192c_query_rx_phy_status(precvframe, pphy_info);
+
+		precvframe->u.hdr.psta = NULL;
+		if(bPacketMatchBSSID && check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE)
+		{
+			u8 *sa;
+			struct sta_info *psta=NULL;
+			struct sta_priv *pstapriv = &padapter->stapriv;
+			
+			sa = get_sa(precvframe->u.hdr.rx_data);
+
+			psta = rtw_get_stainfo(pstapriv, sa);
+			if(psta)
+			{
+				precvframe->u.hdr.psta = psta;
+				rtl8192c_process_phy_info(padapter, precvframe);
+			}
+		}
+		else if( bPacketToSelf || (bPacketBeacon && bPacketMatchBSSID) )
+		{
+			if(check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE)
+			{
+				u8 *sa;
+				struct sta_info *psta=NULL;
+				struct sta_priv *pstapriv = &padapter->stapriv;
+			
+				sa = get_sa(precvframe->u.hdr.rx_data);
+	
+				psta = rtw_get_stainfo(pstapriv, sa);
+				if(psta)
+				{
+					precvframe->u.hdr.psta = psta;
+				}				
+			}
+					
+			rtl8192c_process_phy_info(padapter, precvframe);
+		}
+
+#if 0 //dump phy_status for debug
+
+		DBG_8192C("signal_qual=%d\n", pattrib->signal_qual);
+		DBG_8192C("signal_strength=%d\n", pattrib->signal_strength);
+#endif
+
+	}
+
+
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/rtl8192cu_xmit.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/rtl8192cu_xmit.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/rtl8192cu_xmit.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/rtl8192cu_xmit.c	2017-09-23 03:42:49.946675284 +0800
@@ -0,0 +1,1348 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#define _RTL8192C_XMIT_C_
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtw_byteorder.h>
+#include <wifi.h>
+#include <osdep_intf.h>
+#include <circ_buf.h>
+#include <usb_ops.h>
+#include <rtl8192c_hal.h>
+
+#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
+#error "Shall be Linux or Windows, but not both!\n"
+#endif
+
+
+s32	rtl8192cu_init_xmit_priv(_adapter *padapter)
+{
+	struct xmit_priv	*pxmitpriv = &padapter->xmitpriv;
+
+#ifdef PLATFORM_LINUX
+	tasklet_init(&pxmitpriv->xmit_tasklet,
+	     (void(*)(unsigned long))rtl8192cu_xmit_tasklet,
+	     (unsigned long)padapter);
+#endif
+	return _SUCCESS;
+}
+
+void	rtl8192cu_free_xmit_priv(_adapter *padapter)
+{
+}
+
+u32 rtw_get_ff_hwaddr(struct xmit_frame	*pxmitframe)
+{
+	u32 addr;
+	struct pkt_attrib *pattrib = &pxmitframe->attrib;	
+	
+	switch(pattrib->qsel)
+	{
+		case 0:
+		case 3:
+			addr = BE_QUEUE_INX;
+		 	break;
+		case 1:
+		case 2:
+			addr = BK_QUEUE_INX;
+			break;				
+		case 4:
+		case 5:
+			addr = VI_QUEUE_INX;
+			break;		
+		case 6:
+		case 7:
+			addr = VO_QUEUE_INX;
+			break;
+		case 0x10:
+			addr = BCN_QUEUE_INX;
+			break;
+		case 0x11://BC/MC in PS (HIQ)
+			addr = HIGH_QUEUE_INX;
+			break;
+		case 0x12:
+			addr = MGT_QUEUE_INX;
+			break;
+		default:
+			addr = BE_QUEUE_INX;
+			break;		
+			
+	}
+
+	return addr;
+
+}
+
+static void do_queue_select(_adapter	*padapter, struct pkt_attrib *pattrib)
+{
+	u8 qsel;
+		
+	qsel = pattrib->priority;
+	RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("### do_queue_select priority=%d ,qsel = %d\n",pattrib->priority ,qsel));
+	pattrib->qsel = qsel;
+}
+
+int urb_zero_packet_chk(_adapter *padapter, int sz)
+{
+	int blnSetTxDescOffset;
+	struct dvobj_priv	*pdvobj = (struct dvobj_priv*)&padapter->dvobjpriv;	
+
+	if ( pdvobj->ishighspeed )
+	{
+		if ( ( (sz + TXDESC_SIZE) % 512 ) == 0 ) {
+			blnSetTxDescOffset = 1;
+		} else {
+			blnSetTxDescOffset = 0;
+		}
+	}
+	else
+	{
+		if ( ( (sz + TXDESC_SIZE) % 64 ) == 0 ) 	{
+			blnSetTxDescOffset = 1;
+		} else {
+			blnSetTxDescOffset = 0;
+		}
+	}
+	
+	return blnSetTxDescOffset;
+	
+}
+
+void rtl8192cu_cal_txdesc_chksum(struct tx_desc	*ptxdesc)
+{
+		u16	*usPtr = (u16*)ptxdesc;
+		u32 count = 16;		// (32 bytes / 2 bytes per XOR) => 16 times
+		u32 index;
+		u16 checksum = 0;
+
+		//Clear first
+		ptxdesc->txdw7 &= cpu_to_le32(0xffff0000);
+	
+		for(index = 0 ; index < count ; index++){
+			checksum = checksum ^ le16_to_cpu(*(usPtr + index));
+		}
+
+		ptxdesc->txdw7 |= cpu_to_le32(0x0000ffff&checksum);	
+
+}
+
+void fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc)
+{
+	if ((pattrib->encrypt > 0) && !pattrib->bswenc)
+	{
+		switch (pattrib->encrypt)
+		{	
+			//SEC_TYPE
+			case _WEP40_:
+			case _WEP104_:
+					ptxdesc->txdw1 |= cpu_to_le32((0x01<<22)&0x00c00000);
+					break;				
+			case _TKIP_:
+			case _TKIP_WTMIC_:	
+					//ptxdesc->txdw1 |= cpu_to_le32((0x02<<22)&0x00c00000);
+					ptxdesc->txdw1 |= cpu_to_le32((0x01<<22)&0x00c00000);
+					break;
+			case _AES_:
+					ptxdesc->txdw1 |= cpu_to_le32((0x03<<22)&0x00c00000);
+					break;
+			case _NO_PRIVACY_:
+			default:
+					break;
+		
+		}
+		
+	}
+
+}
+
+void fill_txdesc_vcs(struct pkt_attrib *pattrib, u32 *pdw)
+{
+	//DBG_8192C("cvs_mode=%d\n", pattrib->vcs_mode);	
+
+	switch(pattrib->vcs_mode)
+	{
+		case RTS_CTS:
+			*pdw |= cpu_to_le32(BIT(12));
+			break;
+		case CTS_TO_SELF:
+			*pdw |= cpu_to_le32(BIT(11));
+			break;
+		case NONE_VCS:
+		default:
+			break;		
+	}
+
+	if(pattrib->vcs_mode)
+	{
+		*pdw |= cpu_to_le32(BIT(13));//ENABLE HW RTS
+	}
+
+}
+
+void fill_txdesc_phy(struct pkt_attrib *pattrib, u32 *pdw)
+{
+	//DBG_8192C("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset);
+
+	if(pattrib->ht_en)
+	{
+		*pdw |= (pattrib->bwmode&HT_CHANNEL_WIDTH_40)?	cpu_to_le32(BIT(25)):0;
+
+		if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER)
+			*pdw |= cpu_to_le32((0x01<<20)&0x003f0000);
+		else if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER)
+			*pdw |= cpu_to_le32((0x02<<20)&0x003f0000);
+		else if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE)
+			*pdw |= 0;
+		else
+			*pdw |= cpu_to_le32((0x03<<20)&0x003f0000);
+	}
+}
+
+#ifdef CONFIG_USB_TX_AGGREGATION
+static void _update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, int sz)
+{
+	uint	qsel;
+	_adapter			*padapter = pxmitframe->padapter;
+	struct ht_priv		*phtpriv = &padapter->mlmepriv.htpriv;
+	struct mlme_ext_info	*pmlmeinfo = &padapter->mlmeextpriv.mlmext_info;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	struct pkt_attrib	*pattrib = &pxmitframe->attrib;
+	sint bmcst = IS_MCAST(pattrib->ra);
+	struct tx_desc	*ptxdesc = (struct tx_desc*)pmem;
+
+
+	_rtw_memset(ptxdesc, 0, sizeof(struct tx_desc));
+	
+	//4 offset 0
+	ptxdesc->txdw0 |= cpu_to_le32(sz & 0x0000ffff);
+	ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
+	ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00ff0000);//32 bytes for TX Desc
+	
+	if (bmcst) ptxdesc->txdw0 |= cpu_to_le32(BIT(24));
+
+	RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_,
+		 ("update_txdesc: offset0=0x%08x\n", ptxdesc->txdw0));
+
+	//4 offset 4
+	// pkt_offset, unit:8 bytes padding
+	if (pxmitframe->pkt_offset > 0)
+		ptxdesc->txdw1 |= cpu_to_le32((pxmitframe->pkt_offset << 26) & 0x7c000000);
+
+#ifdef CONFIG_USB_TX_AGGREGATION
+	if (pxmitframe->agg_num > 1)
+		ptxdesc->txdw5 |= cpu_to_le32((pxmitframe->agg_num << 24) & 0xff000000);
+#endif
+
+	if (pxmitframe->frame_tag == DATA_FRAMETAG)
+	{
+		//4 offset 4
+		ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x1f);
+
+		qsel = (uint)(pattrib->qsel & 0x0000001f);
+		ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
+
+		ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid << 16) & 0x000f0000);
+
+		fill_txdesc_sectype(pattrib, ptxdesc);
+
+		if(pattrib->ampdu_en==_TRUE)
+			ptxdesc->txdw1 |= cpu_to_le32(BIT(5));//AGG EN
+		else
+			ptxdesc->txdw1 |= cpu_to_le32(BIT(6));//AGG BK
+
+
+		//4 offset 8
+
+
+		//4 offset 12
+		ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum << 16) & 0xffff0000);
+
+
+		//4 offset 16 , offset 20
+		if (pattrib->qos_en)
+			ptxdesc->txdw4 |= cpu_to_le32(BIT(6));//QoS
+
+		if ((pattrib->ether_type != 0x888e) &&
+		    (pattrib->ether_type != 0x0806) &&
+		    (pattrib->dhcp_pkt != 1))
+		{
+			//Non EAP & ARP & DHCP type data packet
+
+			fill_txdesc_vcs(pattrib, &ptxdesc->txdw4);
+			fill_txdesc_phy(pattrib, &ptxdesc->txdw4);
+
+			ptxdesc->txdw4 |= cpu_to_le32(0x00000008);//RTS Rate=24M
+			ptxdesc->txdw5 |= cpu_to_le32(0x0001ff00);
+			//ptxdesc->txdw5 |= cpu_to_le32(0x0000000b);//DataRate - 54M
+
+			//use REG_INIDATA_RATE_SEL value
+			ptxdesc->txdw5 |= cpu_to_le32(pdmpriv->INIDATA_RATE[pattrib->mac_id]);
+
+			if (0)//for driver dbg
+			{
+				ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+
+				if (pattrib->ht_en)
+					ptxdesc->txdw5 |= cpu_to_le32(BIT(6));//SGI
+
+				ptxdesc->txdw5 |= cpu_to_le32(0x00000013);//init rate - mcs7
+			}
+		}
+		else
+		{
+			// EAP data packet and ARP packet.
+			// Use the 1M data rate to send the EAP/ARP packet.
+			// This will maybe make the handshake smooth.
+
+			ptxdesc->txdw1 |= cpu_to_le32(BIT(6));//AGG BK
+		   	ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+		}
+
+
+		//4 offset 24
+#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
+		if (pattrib->hw_tcp_csum == 1) {
+			// ptxdesc->txdw6 = 0; // clear TCP_CHECKSUM and IP_CHECKSUM. It's zero already!!
+			u8 ip_hdr_offset = 32 + pattrib->hdrlen + pattrib->iv_len + 8;
+			ptxdesc->txdw7 = (1 << 31) | (ip_hdr_offset << 16);
+			DBG_8192C("ptxdesc->txdw7 = %08x\n", ptxdesc->txdw7);
+		}
+#endif
+	}
+	else if(pxmitframe->frame_tag == MGNT_FRAMETAG)
+	{
+		//DBG_8192C("pxmitframe->frame_tag == MGNT_FRAMETAG\n");	
+
+		//4 offset 4
+		ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x1f);
+
+		qsel = (uint)(pattrib->qsel&0x0000001f);
+		ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
+
+		ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid<< 16) & 0x000f0000);
+
+		//fill_txdesc_sectype(pattrib, ptxdesc);
+
+
+		//4 offset 8
+
+
+		//4 offset 12
+		ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0xffff0000);
+
+
+		//4 offset 16
+		ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+
+
+		//4 offset 20
+	}
+	else if(pxmitframe->frame_tag == TXAGG_FRAMETAG)
+	{
+		DBG_8192C("pxmitframe->frame_tag == TXAGG_FRAMETAG\n");
+	}
+	else
+	{
+		DBG_8192C("pxmitframe->frame_tag = %d\n", pxmitframe->frame_tag);
+
+		//4 offset 4
+		ptxdesc->txdw1 |= cpu_to_le32((4)&0x1f);//CAM_ID(MAC_ID)
+
+		ptxdesc->txdw1 |= cpu_to_le32((6<< 16) & 0x000f0000);//raid
+
+
+		//4 offset 8
+
+
+		//4 offset 12
+		ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum << 16) & 0xffff0000);
+
+
+		//4 offset 16
+		ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+
+
+		//4 offset 20
+	}
+
+	// 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS.
+	// (1) The sequence number of each non-Qos frame / broadcast / multicast /
+	// mgnt frame should be controled by Hw because Fw will also send null data
+	// which we cannot control when Fw LPS enable.
+	// --> default enable non-Qos data sequense number. 2010.06.23. by tynli.
+	// (2) Enable HW SEQ control for beacon packet, because we use Hw beacon.
+	// (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets.
+	// 2010.06.23. Added by tynli.
+	if(!pattrib->qos_en)
+	{		
+		ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number
+		ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29.
+	}
+
+	rtl8192cu_cal_txdesc_chksum(ptxdesc);
+}
+#endif
+
+static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz)
+{
+	int	pull=0;
+	uint	qsel;
+	_adapter			*padapter = pxmitframe->padapter;
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;		
+	struct pkt_attrib	*pattrib = &pxmitframe->attrib;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	struct tx_desc	*ptxdesc = (struct tx_desc *)pmem;
+	struct ht_priv		*phtpriv = &pmlmepriv->htpriv;
+	struct mlme_ext_info	*pmlmeinfo = &padapter->mlmeextpriv.mlmext_info;
+	sint	bmcst = IS_MCAST(pattrib->ra);
+#ifdef CONFIG_P2P
+	struct wifidirect_info*	pwdinfo = &padapter->wdinfo;
+#endif //CONFIG_P2P
+
+#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX
+	if(urb_zero_packet_chk(padapter, sz)==0)
+	{
+		ptxdesc = (struct tx_desc *)(pmem+PACKET_OFFSET_SZ);
+		pull = 1;
+	}
+#endif	// CONFIG_USE_USB_BUFFER_ALLOC_TX
+
+	_rtw_memset(ptxdesc, 0, sizeof(struct tx_desc));
+
+	if((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG)
+	{
+		//DBG_8192C("pxmitframe->frame_tag == DATA_FRAMETAG\n");			
+
+		//offset 4
+		ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x1f);
+
+		qsel = (uint)(pattrib->qsel & 0x0000001f);
+		ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
+
+		ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid<< 16) & 0x000f0000);
+
+		fill_txdesc_sectype(pattrib, ptxdesc);
+
+
+		if(pattrib->ampdu_en==_TRUE)
+			ptxdesc->txdw1 |= cpu_to_le32(BIT(5));//AGG EN
+		else
+			ptxdesc->txdw1 |= cpu_to_le32(BIT(6));//AGG BK
+		
+		//offset 8
+		
+
+		//offset 12
+		ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0xffff0000);
+
+
+		//offset 16 , offset 20
+		if (pattrib->qos_en)
+			ptxdesc->txdw4 |= cpu_to_le32(BIT(6));//QoS
+
+		if ((pattrib->ether_type != 0x888e) && (pattrib->ether_type != 0x0806) && (pattrib->dhcp_pkt != 1))
+		{
+              	//Non EAP & ARP & DHCP type data packet
+              	
+			fill_txdesc_vcs(pattrib, &ptxdesc->txdw4);
+			fill_txdesc_phy(pattrib, &ptxdesc->txdw4);
+
+			ptxdesc->txdw4 |= cpu_to_le32(0x00000008);//RTS Rate=24M
+			ptxdesc->txdw5 |= cpu_to_le32(0x0001ff00);//
+			//ptxdesc->txdw5 |= cpu_to_le32(0x0000000b);//DataRate - 54M
+
+			//use REG_INIDATA_RATE_SEL value
+			ptxdesc->txdw5 |= cpu_to_le32(pdmpriv->INIDATA_RATE[pattrib->mac_id]);
+
+              	if(0)//for driver dbg
+			{
+				ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+				
+				if(pattrib->ht_en)
+					ptxdesc->txdw5 |= cpu_to_le32(BIT(6));//SGI
+
+				ptxdesc->txdw5 |= cpu_to_le32(0x00000013);//init rate - mcs7
+			}
+
+		}
+		else
+		{
+			// EAP data packet and ARP packet.
+			// Use the 1M data rate to send the EAP/ARP packet.
+			// This will maybe make the handshake smooth.
+
+			ptxdesc->txdw1 |= cpu_to_le32(BIT(6));//AGG BK
+			
+		   	ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+
+#ifdef CONFIG_P2P
+			//	Added by Albert 2011/03/22
+			//	In the P2P mode, the driver should not support the b mode.
+			//	So, the Tx packet shouldn't use the CCK rate
+			if ( pwdinfo->p2p_state != P2P_STATE_NONE )
+			{
+				ptxdesc->txdw5 |= cpu_to_le32( 0x04 );	//	Use the 6M data rate.
+			}
+#endif //CONFIG_P2P		
+
+		}
+		
+		//offset 24
+
+#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
+		if ( pattrib->hw_tcp_csum == 1 ) {
+			// ptxdesc->txdw6 = 0; // clear TCP_CHECKSUM and IP_CHECKSUM. It's zero already!!
+			u8 ip_hdr_offset = 32 + pattrib->hdrlen + pattrib->iv_len + 8;
+			ptxdesc->txdw7 = (1 << 31) | (ip_hdr_offset << 16);
+			DBG_8192C("ptxdesc->txdw7 = %08x\n", ptxdesc->txdw7);
+		}
+#endif
+	}
+	else if((pxmitframe->frame_tag&0x0f)== MGNT_FRAMETAG)
+	{
+		//DBG_8192C("pxmitframe->frame_tag == MGNT_FRAMETAG\n");	
+		
+		//offset 4		
+		ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x1f);
+		
+		qsel = (uint)(pattrib->qsel&0x0000001f);
+		ptxdesc->txdw1 |= cpu_to_le32((qsel<<QSEL_SHT)&0x00001f00);
+
+		ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid<< 16) & 0x000f0000);
+		
+		//fill_txdesc_sectype(pattrib, ptxdesc);
+		
+		//offset 8		
+
+		//offset 12
+		ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0xffff0000);
+		
+		//offset 16
+		ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+		
+		//offset 20
+		ptxdesc->txdw5 |= cpu_to_le32(BIT(17));//retry limit enable
+		ptxdesc->txdw5 |= cpu_to_le32(0x00180000);//retry limit = 6
+#ifdef CONFIG_P2P
+		//	Added by Albert 2011/03/17
+		//	In the P2P mode, the driver should not support the b mode.
+		//	So, the Tx packet shouldn't use the CCK rate
+		if ( pwdinfo->p2p_state != P2P_STATE_NONE )
+		{
+			ptxdesc->txdw5 |= cpu_to_le32( 0x04 );	//	Use the 6M data rate.
+		}
+#endif //CONFIG_P2P
+		
+	}
+	else if((pxmitframe->frame_tag&0x0f) == TXAGG_FRAMETAG)
+	{
+		DBG_8192C("pxmitframe->frame_tag == TXAGG_FRAMETAG\n");
+	}
+#ifdef CONFIG_MP_INCLUDED
+	else if((pxmitframe->frame_tag&0x0f) == MP_FRAMETAG)
+	{
+		fill_txdesc_for_mp(padapter, ptxdesc);
+	}
+#endif
+	else
+	{
+		DBG_8192C("pxmitframe->frame_tag = %d\n", pxmitframe->frame_tag);
+		
+		//offset 4	
+		ptxdesc->txdw1 |= cpu_to_le32((4)&0x1f);//CAM_ID(MAC_ID)
+		
+		ptxdesc->txdw1 |= cpu_to_le32((6<< 16) & 0x000f0000);//raid
+		
+		//offset 8		
+
+		//offset 12
+		ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0xffff0000);
+		
+		//offset 16
+		ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+		
+		//offset 20
+	}
+
+	// 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS.
+	// (1) The sequence number of each non-Qos frame / broadcast / multicast /
+	// mgnt frame should be controled by Hw because Fw will also send null data
+	// which we cannot control when Fw LPS enable.
+	// --> default enable non-Qos data sequense number. 2010.06.23. by tynli.
+	// (2) Enable HW SEQ control for beacon packet, because we use Hw beacon.
+	// (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets.
+	// 2010.06.23. Added by tynli.
+	if(!pattrib->qos_en)
+	{		
+		ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number
+		ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29.
+	}
+
+	//offset 0
+	ptxdesc->txdw0 |= cpu_to_le32(sz&0x0000ffff);
+	ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
+	ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<<OFFSET_SHT)&0x00ff0000);//32 bytes for TX Desc
+
+	if(bmcst)	
+	{
+		ptxdesc->txdw0 |= cpu_to_le32(BIT(24));
+	}	
+
+	RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("offset0-txdesc=0x%x\n", ptxdesc->txdw0));
+
+	//offset 4
+	if(!pull) ptxdesc->txdw1 |= cpu_to_le32((0x01<<26)&0xff000000);//pkt_offset, unit:8 bytes padding
+
+	rtl8192cu_cal_txdesc_chksum(ptxdesc);
+		
+	return pull;
+		
+}
+
+static void _rtw_dump_xframe(_adapter *padapter, struct xmit_frame *pxmitframe, u8 sync)
+{
+	int t, sz, w_sz, pull=0;
+	u8 *mem_addr;
+	u32 ff_hwaddr;
+	struct xmit_buf *pxmitbuf = pxmitframe->pxmitbuf;
+	struct pkt_attrib *pattrib = &pxmitframe->attrib;
+	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
+	struct security_priv *psecuritypriv = &padapter->securitypriv;
+
+	if ((pxmitframe->frame_tag == DATA_FRAMETAG) &&
+	    (pxmitframe->attrib.ether_type != 0x0806) &&
+	    (pxmitframe->attrib.ether_type != 0x888e) &&
+	    (pxmitframe->attrib.dhcp_pkt != 1))
+	{
+		rtw_issue_addbareq_cmd(padapter, pxmitframe);
+	}
+	
+	mem_addr = pxmitframe->buf_addr;
+
+       RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_dump_xframe()\n"));
+	
+	for (t = 0; t < pattrib->nr_frags; t++)
+	{
+		if (t != (pattrib->nr_frags - 1))
+		{
+			RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("pattrib->nr_frags=%d\n", pattrib->nr_frags));
+
+			sz = pxmitpriv->frag_len;
+			sz = sz - 4 - (psecuritypriv->sw_encrypt ? 0 : pattrib->icv_len);					
+		}
+		else //no frag
+		{
+			sz = pattrib->last_txcmdsz;
+		}
+
+		pull = update_txdesc(pxmitframe, mem_addr, sz);
+		
+		if(pull)
+		{
+			mem_addr += PACKET_OFFSET_SZ; //pull txdesc head
+			
+			//pxmitbuf ->pbuf = mem_addr;			
+			pxmitframe->buf_addr = mem_addr;
+
+			w_sz = sz + TXDESC_SIZE;
+		}
+		else
+		{
+			w_sz = sz + TXDESC_SIZE + PACKET_OFFSET_SZ;
+		}	
+
+		ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe);
+		
+		if(sync == _TRUE)
+			rtw_write_port_sync(padapter, ff_hwaddr, w_sz, (unsigned char*)pxmitbuf);
+		else
+			rtw_write_port(padapter, ff_hwaddr, w_sz, (unsigned char*)pxmitbuf);
+
+		rtw_count_tx_stats(padapter, pxmitframe, sz);
+
+
+		RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_write_port, w_sz=%d\n", w_sz));
+		//DBG_8192C("rtw_write_port, w_sz=%d, sz=%d, txdesc_sz=%d, tid=%d\n", w_sz, sz, w_sz-sz, pattrib->priority);      
+
+		mem_addr += w_sz;
+
+		mem_addr = (u8 *)RND4(((SIZE_PTR)(mem_addr)));
+
+	}
+	
+	rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
+	
+}
+
+inline void rtw_dump_xframe(_adapter *padapter, struct xmit_frame *pxmitframe)
+{
+	_rtw_dump_xframe(padapter, pxmitframe, _FALSE);
+}
+
+inline void rtw_dump_xframe_sync(_adapter *padapter, struct xmit_frame *pxmitframe)
+{
+	_rtw_dump_xframe(padapter, pxmitframe, _TRUE);
+}
+
+#ifdef CONFIG_USB_TX_AGGREGATION
+static u32 xmitframe_need_length(struct xmit_frame *pxmitframe)
+{
+	struct pkt_attrib *pattrib = &pxmitframe->attrib;
+
+	u32	len = 0;
+
+	// no consider fragement
+	len = pattrib->hdrlen + pattrib->iv_len +
+		SNAP_SIZE + sizeof(u16) +
+		pattrib->pktlen +
+		((pattrib->bswenc) ? pattrib->icv_len : 0);
+
+	if(pattrib->encrypt ==_TKIP_)
+		len += 8;
+
+	return len;
+}
+
+#define IDEA_CONDITION 1	// check all packets before enqueue
+s32 rtl8192cu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct xmit_frame *pxmitframe = NULL;
+	struct xmit_frame *pfirstframe = NULL;
+
+	// aggregate variable
+//	struct hw_xmit *phwxmit;
+	struct sta_info *psta = NULL;
+	struct tx_servq *ptxservq = NULL;
+
+	_irqL irqL;
+	_list *xmitframe_plist = NULL, *xmitframe_phead = NULL;
+
+	u32	pbuf;	// next pkt address
+	u32	pbuf_tail;	// last pkt tail
+	u32	len;	// packet length, except TXDESC_SIZE and PKT_OFFSET
+
+	u32	bulkSize = pHalData->UsbBulkOutSize;
+	u8	descCount;
+	u32	bulkPtr;
+
+	// dump frame variable
+	u32 ff_hwaddr;
+
+#ifndef IDEA_CONDITION
+	int res = _SUCCESS;
+#endif
+
+	RT_TRACE(_module_rtl8192c_xmit_c_, _drv_info_, ("+xmitframe_complete\n"));
+
+
+	// check xmitbuffer is ok
+	if (pxmitbuf == NULL) {
+		pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
+		if (pxmitbuf == NULL) return _FALSE;
+	}
+
+
+	//3 1. pick up first frame
+	do {
+		rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
+			
+		pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry);
+		if (pxmitframe == NULL) {
+			// no more xmit frame, release xmit buffer
+			rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
+			return _FALSE;
+		}
+
+
+#ifndef IDEA_CONDITION
+		if (pxmitframe->frame_tag != DATA_FRAMETAG) {
+			RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_,
+				 ("xmitframe_complete: frame tag(%d) is not DATA_FRAMETAG(%d)!\n",
+				  pxmitframe->frame_tag, DATA_FRAMETAG));
+//			rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
+			continue;
+		}
+
+		// TID 0~15
+		if ((pxmitframe->attrib.priority < 0) ||
+		    (pxmitframe->attrib.priority > 15)) {
+			RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_,
+				 ("xmitframe_complete: TID(%d) should be 0~15!\n",
+				  pxmitframe->attrib.priority));
+//			rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
+			continue;
+		}
+#endif
+
+		pxmitframe->pxmitbuf = pxmitbuf;
+		pxmitframe->buf_addr = pxmitbuf->pbuf;
+		pxmitbuf->priv_data = pxmitframe;
+
+		//pxmitframe->agg_num = 1; // alloc xmitframe should assign to 1.
+		pxmitframe->pkt_offset = 1; // first frame of aggregation, reserve offset
+
+#ifdef IDEA_CONDITION
+		rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
+#else
+		res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
+		if (res == _FALSE) {
+//			rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
+			continue;
+		}
+#endif
+
+		// always return ndis_packet after rtw_xmitframe_coalesce
+		rtw_os_xmit_complete(padapter, pxmitframe);
+
+		break;
+	} while (1);
+
+	//3 2. aggregate same priority and same DA(AP or STA) frames
+	pfirstframe = pxmitframe;
+	len = xmitframe_need_length(pfirstframe) + TXDESC_OFFSET;
+	pbuf_tail = len;
+	pbuf = _RND8(pbuf_tail);
+
+	// check pkt amount in one bluk
+	descCount = 0;
+	bulkPtr = bulkSize;
+	if (pbuf < bulkPtr)
+		descCount++;
+	else {
+		descCount = 0;
+		bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize; // round to next bulkSize
+	}
+
+	// dequeue same priority packet from station tx queue
+	psta = pfirstframe->attrib.psta;
+	switch (pfirstframe->attrib.priority) {
+		case 1:
+		case 2:
+			ptxservq = &(psta->sta_xmitpriv.bk_q);
+//			phwxmit = pxmitpriv->hwxmits + 3;
+			break;
+
+		case 4:
+		case 5:
+			ptxservq = &(psta->sta_xmitpriv.vi_q);
+//			phwxmit = pxmitpriv->hwxmits + 1;
+			break;
+
+		case 6:
+		case 7:
+			ptxservq = &(psta->sta_xmitpriv.vo_q);
+//			phwxmit = pxmitpriv->hwxmits;
+			break;
+
+		case 0:
+		case 3:
+		default:
+			ptxservq = &(psta->sta_xmitpriv.be_q);
+//			phwxmit = pxmitpriv->hwxmits + 2;
+			break;
+	}
+
+	_enter_critical_bh(&pxmitpriv->lock, &irqL);
+
+	xmitframe_phead = get_list_head(&ptxservq->sta_pending);
+	xmitframe_plist = get_next(xmitframe_phead);
+	while (rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist) == _FALSE)
+	{
+		pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list);
+		xmitframe_plist = get_next(xmitframe_plist);
+
+#ifdef CONFIG_AP_MODE
+		if(xmitframe_enqueue_for_sleeping_sta(padapter, pxmitframe)==_TRUE)
+		{
+			//rtw_list_delete(&pxmitframe->list);
+			
+			ptxservq->qcnt--;
+			
+			continue;
+		}
+#endif		
+
+		len = xmitframe_need_length(pxmitframe) + TXDESC_SIZE; // no offset
+		if (pbuf + len > MAX_XMITBUF_SZ) break;
+
+		rtw_list_delete(&pxmitframe->list);
+		ptxservq->qcnt--;
+
+#ifndef IDEA_CONDITION
+		// suppose only data frames would be in queue
+		if (pxmitframe->frame_tag != DATA_FRAMETAG) {
+			RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_,
+				 ("xmitframe_complete: frame tag(%d) is not DATA_FRAMETAG(%d)!\n",
+				  pxmitframe->frame_tag, DATA_FRAMETAG));
+			rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
+			continue;
+		}
+
+		// TID 0~15
+		if ((pxmitframe->attrib.priority < 0) ||
+		    (pxmitframe->attrib.priority > 15)) {
+			RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_,
+				 ("xmitframe_complete: TID(%d) should be 0~15!\n",
+				  pxmitframe->attrib.priority));
+			rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
+			continue;
+		}
+#endif
+
+//		pxmitframe->pxmitbuf = pxmitbuf;
+		pxmitframe->buf_addr = pxmitbuf->pbuf + pbuf;
+
+		pxmitframe->agg_num = 0; // not first frame of aggregation
+		pxmitframe->pkt_offset = 0; // not first frame of aggregation, no need to reserve offset
+
+#ifdef IDEA_CONDITION
+		rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
+#else
+		res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
+		if (res == _FALSE) {
+			rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
+			continue;
+		}
+#endif
+
+		// always return ndis_packet after rtw_xmitframe_coalesce
+		rtw_os_xmit_complete(padapter, pxmitframe);
+
+		// (len - TXDESC_SIZE) == pxmitframe->attrib.last_txcmdsz
+		_update_txdesc(pxmitframe, pxmitframe->buf_addr, pxmitframe->attrib.last_txcmdsz);
+
+		// don't need xmitframe any more
+		rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
+
+		// handle pointer and stop condition
+		pbuf_tail = pbuf + len;
+		pbuf = _RND8(pbuf_tail);
+
+		pfirstframe->agg_num++;
+		if (MAX_TX_AGG_PACKET_NUMBER == pfirstframe->agg_num)
+			break;
+
+		if (pbuf < bulkPtr) {
+			descCount++;
+			if (descCount == pHalData->UsbTxAggDescNum)
+				break;
+		} else {
+			descCount = 0;
+			bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize;
+		}
+	}
+	if (_rtw_queue_empty(&ptxservq->sta_pending) == _TRUE)
+		rtw_list_delete(&ptxservq->tx_pending);
+
+	_exit_critical_bh(&pxmitpriv->lock, &irqL);
+
+	if ((pfirstframe->attrib.ether_type != 0x0806) &&
+	    (pfirstframe->attrib.ether_type != 0x888e) &&
+	    (pfirstframe->attrib.dhcp_pkt != 1))
+	{
+		rtw_issue_addbareq_cmd(padapter, pfirstframe);
+	}
+
+#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX
+	//3 3. update first frame txdesc
+	if ((pbuf_tail % bulkSize) == 0) {
+		// remove pkt_offset
+		pbuf_tail -= PACKET_OFFSET_SZ;
+		pfirstframe->buf_addr += PACKET_OFFSET_SZ;
+		pfirstframe->pkt_offset = 0;
+	}
+#endif	// CONFIG_USE_USB_BUFFER_ALLOC_TX
+	_update_txdesc(pfirstframe, pfirstframe->buf_addr, pfirstframe->attrib.last_txcmdsz);
+
+	//3 4. write xmit buffer to USB FIFO
+	ff_hwaddr = rtw_get_ff_hwaddr(pfirstframe);
+
+	// xmit address == ((xmit_frame*)pxmitbuf->priv_data)->buf_addr
+	rtw_write_port(padapter, ff_hwaddr, pbuf_tail, (u8*)pxmitbuf);
+
+
+	//3 5. update statisitc
+	pbuf_tail -= (pfirstframe->agg_num * TXDESC_SIZE);
+	if (pfirstframe->pkt_offset == 1) pbuf_tail -= PACKET_OFFSET_SZ;
+	
+	rtw_count_tx_stats(padapter, pfirstframe, pbuf_tail);
+
+	rtw_free_xmitframe_ex(pxmitpriv, pfirstframe);
+
+	return _TRUE;
+}
+
+#else
+
+s32 rtl8192cu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf)
+{		
+
+	struct hw_xmit *phwxmits;
+	sint hwentry;
+	struct xmit_frame *pxmitframe=NULL;	
+	int res=_SUCCESS, xcnt = 0;
+
+	phwxmits = pxmitpriv->hwxmits;
+	hwentry = pxmitpriv->hwxmit_entry;
+
+	RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("xmitframe_complete()\n"));
+
+	if(pxmitbuf==NULL)
+	{
+		pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);		
+		if(!pxmitbuf)
+		{
+			return _FALSE;
+		}			
+	}	
+
+
+	do
+	{		
+		pxmitframe =  rtw_dequeue_xframe(pxmitpriv, phwxmits, hwentry);
+		
+		if(pxmitframe)
+		{
+			pxmitframe->pxmitbuf = pxmitbuf;				
+
+			pxmitframe->buf_addr = pxmitbuf->pbuf;
+
+			pxmitbuf->priv_data = pxmitframe;	
+
+			if((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG)
+			{	
+				if(pxmitframe->attrib.priority<=15)//TID0~15
+				{
+					res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
+				}	
+							
+				rtw_os_xmit_complete(padapter, pxmitframe);//always return ndis_packet after rtw_xmitframe_coalesce 			
+			}	
+
+				
+			RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("xmitframe_complete(): rtw_dump_xframe\n"));
+
+			
+			if(res == _SUCCESS)
+			{
+				rtw_dump_xframe(padapter, pxmitframe);		 
+			}
+			else
+			{
+				rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
+				rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);	
+			}
+	 			 		
+			xcnt++;
+			
+		}
+		else
+		{			
+			rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
+			return _FALSE;
+		}
+
+		break;
+		
+	}while(0/*xcnt < (NR_XMITFRAME >> 3)*/);
+
+	return _TRUE;
+	
+}
+#endif
+
+
+
+static s32 xmitframe_direct(_adapter *padapter, struct xmit_frame *pxmitframe)
+{
+	s32 res = _SUCCESS;
+
+
+	res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
+	if (res == _SUCCESS) {
+		rtw_dump_xframe(padapter, pxmitframe);
+	}
+
+	return res;
+}
+
+/*
+ * Return
+ *	_TRUE	dump packet directly
+ *	_FALSE	enqueue packet
+ */
+static s32 pre_xmitframe(_adapter *padapter, struct xmit_frame *pxmitframe)
+{
+        _irqL irqL;
+	s32 res;
+	struct xmit_buf *pxmitbuf = NULL;
+	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
+	struct pkt_attrib *pattrib = &pxmitframe->attrib;
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+#ifdef CONFIG_TDLS	
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+#endif
+
+	do_queue_select(padapter, pattrib);
+	
+	_enter_critical_bh(&pxmitpriv->lock, &irqL);
+
+#ifndef CONFIG_TDLS
+#ifdef CONFIG_AP_MODE
+	if(xmitframe_enqueue_for_sleeping_sta(padapter, pxmitframe) == _TRUE)
+	{
+		struct sta_info *psta;
+		struct sta_priv *pstapriv = &padapter->stapriv;
+
+	
+		_exit_critical_bh(&pxmitpriv->lock, &irqL);
+
+		if(pattrib->psta)
+		{
+			psta = pattrib->psta;
+		}
+		else
+		{
+			psta=rtw_get_stainfo(pstapriv, pattrib->ra);
+		}
+
+		if(psta)
+		{
+			if(psta->sleepq_len > (NR_XMITFRAME>>3))
+			{
+				wakeup_sta_to_xmit(padapter, psta);
+			}	
+		}	
+
+		return _FALSE;
+	}
+#endif
+//else CONFIG_TDLS, process as TDLS Buffer STA
+#else
+	if(pmlmeinfo->tdls_setup_state&TDLS_LINKED_STATE ){	//&& pattrib->ether_type!=0x0806)
+		res = xmit_tdls_enqueue_for_sleeping_sta(padapter, pxmitframe);
+		if(res==_TRUE){
+			_exit_critical_bh(&pxmitpriv->lock, &irqL);
+			return _FALSE;
+		}else if(res==2){
+			goto enqueue;
+		}
+	}
+#endif
+
+	if (rtw_txframes_sta_ac_pending(padapter, pattrib) > 0)
+		goto enqueue;
+
+	if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE)
+		goto enqueue;
+
+
+	pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
+	if (pxmitbuf == NULL)
+		goto enqueue;
+
+	_exit_critical_bh(&pxmitpriv->lock, &irqL);
+
+	pxmitframe->pxmitbuf = pxmitbuf;
+	pxmitframe->buf_addr = pxmitbuf->pbuf;
+	pxmitbuf->priv_data = pxmitframe;
+
+	if (xmitframe_direct(padapter, pxmitframe) != _SUCCESS) {
+		rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
+		rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
+	}
+
+	return _TRUE;
+
+enqueue:
+	res = rtw_xmitframe_enqueue(padapter, pxmitframe);
+	_exit_critical_bh(&pxmitpriv->lock, &irqL);
+
+	if (res != _SUCCESS) {
+		RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("pre_xmitframe: enqueue xmitframe fail\n"));
+		rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
+
+		// Trick, make the statistics correct
+		pxmitpriv->tx_pkts--;
+		pxmitpriv->tx_drop++;
+		return _TRUE;
+	}
+
+	return _FALSE;
+}
+
+void rtl8192cu_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe)
+{
+	rtw_dump_xframe(padapter, pmgntframe);
+}
+
+/*
+ * Return
+ *	_TRUE	dump packet directly ok
+ *	_FALSE	temporary can't transmit packets to hardware
+ */
+s32 rtl8192cu_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe)
+{
+	return pre_xmitframe(padapter, pxmitframe);
+}
+
+#ifdef  CONFIG_HOSTAPD_MLME
+
+static void rtl8192cu_hostap_mgnt_xmit_cb(struct urb *urb)
+{	
+#ifdef PLATFORM_LINUX
+	struct sk_buff *skb = (struct sk_buff *)urb->context;
+
+	//DBG_8192C("%s\n", __FUNCTION__);
+
+	dev_kfree_skb_any(skb);
+#endif	
+}
+
+s32 rtl8192cu_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt)
+{
+#ifdef PLATFORM_LINUX
+	u16 fc;
+	int rc, len, pipe;	
+	unsigned int bmcst, tid, qsel;
+	struct sk_buff *skb, *pxmit_skb;
+	struct urb *urb;
+	unsigned char *pxmitbuf;
+	struct tx_desc *ptxdesc;
+	struct ieee80211_hdr *tx_hdr;
+	struct hostapd_priv *phostapdpriv = padapter->phostapdpriv;	
+	struct net_device *pnetdev = padapter->pnetdev;
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
+	struct dvobj_priv *pdvobj = &padapter->dvobjpriv;	
+
+	
+	//DBG_8192C("%s\n", __FUNCTION__);
+
+	skb = pkt;
+	
+	len = skb->len;
+	tx_hdr = (struct ieee80211_hdr *)(skb->data);
+	fc = le16_to_cpu(tx_hdr->frame_ctl);
+	bmcst = IS_MCAST(tx_hdr->addr1);
+
+	if ((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_MGMT)
+		goto _exit;
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html
+	pxmit_skb = dev_alloc_skb(len + TXDESC_SIZE);			
+#else			
+	pxmit_skb = netdev_alloc_skb(pnetdev, len + TXDESC_SIZE);
+#endif		
+
+	if(!pxmit_skb)
+		goto _exit;
+
+	pxmitbuf = pxmit_skb->data;
+
+	urb = usb_alloc_urb(0, GFP_ATOMIC);
+	if (!urb) {
+		goto _exit;
+	}
+
+	// ----- fill tx desc -----	
+	ptxdesc = (struct tx_desc *)pxmitbuf;	
+	_rtw_memset(ptxdesc, 0, sizeof(*ptxdesc));
+		
+	//offset 0	
+	ptxdesc->txdw0 |= cpu_to_le32(len&0x0000ffff); 
+	ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<<OFFSET_SHT)&0x00ff0000);//default = 32 bytes for TX Desc
+	ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
+
+	if(bmcst)	
+	{
+		ptxdesc->txdw0 |= cpu_to_le32(BIT(24));
+	}	
+
+	//offset 4	
+	ptxdesc->txdw1 |= cpu_to_le32(0x00);//MAC_ID
+
+	ptxdesc->txdw1 |= cpu_to_le32((0x12<<QSEL_SHT)&0x00001f00);
+
+	ptxdesc->txdw1 |= cpu_to_le32((0x06<< 16) & 0x000f0000);//b mode
+
+	//offset 8			
+
+	//offset 12		
+	ptxdesc->txdw3 |= cpu_to_le32((le16_to_cpu(tx_hdr->seq_ctl)<<16)&0xffff0000);
+
+	//offset 16		
+	ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+		
+	//offset 20
+
+
+	//HW append seq
+	ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number
+	ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29.
+	
+
+	rtl8192cu_cal_txdesc_chksum(ptxdesc);
+	// ----- end of fill tx desc -----
+
+	//
+	skb_put(pxmit_skb, len + TXDESC_SIZE);
+	pxmitbuf = pxmitbuf + TXDESC_SIZE;
+	_rtw_memcpy(pxmitbuf, skb->data, len);
+
+	//DBG_8192C("mgnt_xmit, len=%x\n", pxmit_skb->len);
+
+
+	// ----- prepare urb for submit -----
+	
+	//translate DMA FIFO addr to pipehandle
+	//pipe = ffaddr2pipehdl(pdvobj, MGT_QUEUE_INX);
+	pipe = usb_sndbulkpipe(pdvobj->pusbdev, pHalData->Queue2EPNum[(u8)MGT_QUEUE_INX]&0x0f);
+	
+	usb_fill_bulk_urb(urb, pdvobj->pusbdev, pipe,
+			  pxmit_skb->data, pxmit_skb->len, rtl8192cu_hostap_mgnt_xmit_cb, pxmit_skb);
+	
+	urb->transfer_flags |= URB_ZERO_PACKET;
+	usb_anchor_urb(urb, &phostapdpriv->anchored);
+	rc = usb_submit_urb(urb, GFP_ATOMIC);
+	if (rc < 0) {
+		usb_unanchor_urb(urb);
+		kfree_skb(skb);
+	}
+	usb_free_urb(urb);
+
+	
+_exit:	
+	
+	dev_kfree_skb_any(skb);
+
+#endif
+
+	return 0;
+
+}
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/usb_halinit.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/usb_halinit.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/usb_halinit.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/usb_halinit.c	2017-09-23 03:42:49.950675272 +0800
@@ -0,0 +1,5642 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+******************************************************************************/
+#define _HCI_HAL_INIT_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtw_efuse.h>
+
+#include <rtl8192c_hal.h>
+#include <rtl8192c_led.h>
+
+#ifdef DBG_CONFIG_ERROR_DETECT
+#include "rtl8192c_sreset.h"
+#endif
+
+#ifdef CONFIG_IOL
+#include <rtw_iol.h>
+#endif
+
+#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
+
+#error "Shall be Linux or Windows, but not both!\n"
+
+#endif
+
+#ifndef CONFIG_USB_HCI
+
+#error "CONFIG_USB_HCI shall be on!\n"
+
+#endif
+
+#include <usb_ops.h>
+#include <usb_hal.h>
+#include <usb_osintf.h>
+
+#if DISABLE_BB_RF
+	#define		HAL_MAC_ENABLE	0
+	#define		HAL_BB_ENABLE		0
+	#define		HAL_RF_ENABLE		0
+#else
+	#define		HAL_MAC_ENABLE	1
+	#define		HAL_BB_ENABLE		1
+	#define		HAL_RF_ENABLE		1
+#endif
+
+//endpoint number 1,2,3,4,5
+// bult in : 1
+// bult out: 2 (High)
+// bult out: 3 (Normal) for 3 out_ep, (Low) for 2 out_ep
+// interrupt in: 4
+// bult out: 5 (Low) for 3 out_ep
+
+
+static VOID
+_OneOutEpMapping(
+	IN	HAL_DATA_TYPE	*pHalData
+	)
+{
+	//only endpoint number 0x02
+
+	pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[0];//VO
+	pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[0];//VI
+	pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[0];//BE
+	pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[0];//BK
+	
+	pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//BCN
+	pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT
+	pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//HIGH
+	pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//TXCMD
+}
+
+
+static VOID
+_TwoOutEpMapping(
+	IN	BOOLEAN			IsTestChip,
+	IN	HAL_DATA_TYPE	*pHalData,
+	IN	BOOLEAN	 		bWIFICfg
+	)
+{
+
+/*
+#define VO_QUEUE_INX		0
+#define VI_QUEUE_INX		1
+#define BE_QUEUE_INX		2
+#define BK_QUEUE_INX		3
+#define BCN_QUEUE_INX	4
+#define MGT_QUEUE_INX	5
+#define HIGH_QUEUE_INX	6
+#define TXCMD_QUEUE_INX	7
+*/
+
+	if(IsTestChip && bWIFICfg){ // test chip && wmm
+	
+		
+		//	BK, 	BE, 	VI, 	VO, 	BCN,	CMD,MGT,HIGH,HCCA 
+		//{  1, 	0, 	1, 	0, 	0, 	0, 	0, 	0, 		0	};			
+		//0:H(end_number=0x02), 1:L (end_number=0x03)
+
+		pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[0];//VO
+		pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[1];//VI
+		pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[0];//BE
+		pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[1];//BK
+		
+		pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//BCN
+		pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT
+		pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//HIGH
+		pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//TXCMD
+	}
+	else if(!IsTestChip && bWIFICfg){ // Normal chip && wmm
+		
+		//	BK, 	BE, 	VI, 	VO, 	BCN,	CMD,MGT,HIGH,HCCA 
+		//{  0, 	1, 	0, 	1, 	0, 	0, 	0, 	0, 		0	};
+		//0:H(end_number=0x02), 1:L (end_number=0x03)
+
+		pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[1];//VO
+		pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[0];//VI
+		pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[1];//BE
+		pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[0];//BK
+		
+		pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//BCN
+		pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT
+		pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//HIGH
+		pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//TXCMD
+	}
+	else{//typical setting
+		
+		//BK, 	BE, 	VI, 	VO, 	BCN,	CMD,MGT,HIGH,HCCA 
+		//{  1, 	1, 	0, 	0, 	0, 	0, 	0, 	0, 		0	};			
+		//0:H(end_number=0x02), 1:L (end_number=0x03)
+
+		pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[0];//VO
+		pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[0];//VI
+		pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[1];//BE
+		pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[1];//BK
+		
+		pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//BCN
+		pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT
+		pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//HIGH
+		pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//TXCMD
+	}
+	
+}
+
+
+static VOID _ThreeOutEpMapping(
+	IN	HAL_DATA_TYPE	*pHalData,
+	IN	BOOLEAN	 		bWIFICfg
+	)
+{
+	if(bWIFICfg){//for WMM
+
+		//	BK, 	BE, 	VI, 	VO, 	BCN,	CMD,MGT,HIGH,HCCA 
+		//{  1, 	2, 	1, 	0, 	0, 	0, 	0, 	0, 		0	};
+		//0:H(end_number=0x02), 1:N(end_number=0x03), 2:L (end_number=0x05)
+
+		pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[0];//VO
+		pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[1];//VI
+		pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[2];//BE
+		pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[1];//BK
+		
+		pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//BCN
+		pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT
+		pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//HIGH
+		pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//TXCMD
+	}
+	else{//typical setting
+
+		//	BK, 	BE, 	VI, 	VO, 	BCN,	CMD,MGT,HIGH,HCCA 
+		//{  2, 	2, 	1, 	0, 	0, 	0, 	0, 	0, 		0	};			
+		//0:H(end_number=0x02), 1:N(end_number=0x03), 2:L (end_number=0x05)
+		pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[0];//VO
+		pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[1];//VI
+		pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[2];//BE
+		pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[2];//BK
+		
+		pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//BCN
+		pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT
+		pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//HIGH
+		pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//TXCMD
+	}
+
+}
+
+static BOOLEAN
+_MappingOutEP(
+	IN	PADAPTER	pAdapter,
+	IN	u8		NumOutPipe,
+	IN	BOOLEAN		IsTestChip
+	)
+{		
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct registry_priv *pregistrypriv = &pAdapter->registrypriv;
+
+	BOOLEAN	 bWIFICfg = (pregistrypriv->wifi_spec) ?_TRUE:_FALSE;
+	
+	BOOLEAN result = _TRUE;
+
+	switch(NumOutPipe)
+	{
+		case 2:
+			_TwoOutEpMapping(IsTestChip, pHalData, bWIFICfg);
+			break;
+		case 3:
+			// Test chip doesn't support three out EPs.
+			if(IsTestChip){
+				return _FALSE;
+			}			
+			_ThreeOutEpMapping(pHalData, bWIFICfg);
+			break;
+		case 1:
+			_OneOutEpMapping(pHalData);
+			break;
+		default:
+			result = _FALSE;
+			break;
+	}
+
+	return result;
+	
+}
+
+static VOID
+_ConfigTestChipOutEP(
+	IN	PADAPTER	pAdapter,
+	IN	u8		NumOutPipe
+	)
+{
+	u8			value8,txqsele;
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(pAdapter);
+
+	pHalData->OutEpQueueSel = 0;
+	pHalData->OutEpNumber	= 0;
+
+	value8 = rtw_read8(pAdapter, REG_TEST_SIE_OPTIONAL);
+	value8 = (value8 & USB_TEST_EP_MASK) >> USB_TEST_EP_SHIFT;
+	
+	switch(value8)
+	{
+		case 0:		// 2 bulk OUT, 1 bulk IN
+		case 3:		
+			pHalData->OutEpQueueSel = TX_SELE_HQ | TX_SELE_LQ;
+			pHalData->OutEpNumber	= 2;
+			//RT_TRACE(COMP_INIT,  DBG_LOUD, ("EP Config: 2 bulk OUT, 1 bulk IN\n"));
+			break;
+		case 1:		// 1 bulk IN/OUT => map all endpoint to Low queue
+		case 2:		// 1 bulk IN, 1 bulk OUT => map all endpoint to High queue
+			txqsele = rtw_read8(pAdapter, REG_TEST_USB_TXQS);
+			if(txqsele & 0x0F){//map all endpoint to High queue
+				pHalData->OutEpQueueSel  = TX_SELE_HQ;
+			}
+			else if(txqsele&0xF0){//map all endpoint to Low queue
+				pHalData->OutEpQueueSel  =  TX_SELE_LQ;
+			}
+			pHalData->OutEpNumber	= 1;
+			//RT_TRACE(COMP_INIT,  DBG_LOUD, ("%s\n", ((1 == value8) ? "1 bulk IN/OUT" : "1 bulk IN, 1 bulk OUT")));
+			break;
+		default:
+			break;
+	}
+
+	// TODO: Error recovery for this case
+	//RT_ASSERT((NumOutPipe == pHalData->OutEpNumber), ("Out EP number isn't match! %d(Descriptor) != %d (SIE reg)\n", (u4Byte)NumOutPipe, (u4Byte)pHalData->OutEpNumber));
+
+}
+
+
+
+static VOID
+_ConfigNormalChipOutEP(
+	IN	PADAPTER	pAdapter,
+	IN	u8		NumOutPipe
+	)
+{
+	u8			value8;
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(pAdapter);
+
+	pHalData->OutEpQueueSel = 0;
+	pHalData->OutEpNumber	= 0;
+		
+	// Normal and High queue
+	value8 = rtw_read8(pAdapter, (REG_NORMAL_SIE_EP + 1));
+	
+	if(value8 & USB_NORMAL_SIE_EP_MASK){
+		pHalData->OutEpQueueSel |= TX_SELE_HQ;
+		pHalData->OutEpNumber++;
+	}
+	
+	if((value8 >> USB_NORMAL_SIE_EP_SHIFT) & USB_NORMAL_SIE_EP_MASK){
+		pHalData->OutEpQueueSel |= TX_SELE_NQ;
+		pHalData->OutEpNumber++;
+	}
+	
+	// Low queue
+	value8 = rtw_read8(pAdapter, (REG_NORMAL_SIE_EP + 2));
+	if(value8 & USB_NORMAL_SIE_EP_MASK){
+		pHalData->OutEpQueueSel |= TX_SELE_LQ;
+		pHalData->OutEpNumber++;
+	}
+
+	// TODO: Error recovery for this case
+	//RT_ASSERT((NumOutPipe == pHalData->OutEpNumber), ("Out EP number isn't match! %d(Descriptor) != %d (SIE reg)\n", (u4Byte)NumOutPipe, (u4Byte)pHalData->OutEpNumber));
+
+}
+
+static BOOLEAN HalUsbSetQueuePipeMapping8192CUsb(
+	IN	PADAPTER	pAdapter,
+	IN	u8		NumInPipe,
+	IN	u8		NumOutPipe
+	)
+{
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(pAdapter);
+	BOOLEAN			result		= _FALSE;
+	BOOLEAN			isNormalChip;
+
+	//may be update UPHY Parameter == georgia 
+	
+
+	// ReadAdapterInfo8192C also call _ReadChipVersion too.
+	// Since we need dynamic config EP mapping, so we call this function to get chip version.
+	// We can remove _ReadChipVersion from ReadAdapterInfo8192C later.
+	//pHalData->VersionID = rtl8192c_ReadChipVersion(pAdapter);
+
+	isNormalChip = IS_NORMAL_CHIP(pHalData->VersionID);
+
+	if(isNormalChip){
+		_ConfigNormalChipOutEP(pAdapter, NumOutPipe);
+	}
+	else{
+		_ConfigTestChipOutEP(pAdapter, NumOutPipe);
+	}
+
+	// Normal chip with one IN and one OUT doesn't have interrupt IN EP.
+	if(isNormalChip && (1 == pHalData->OutEpNumber)){
+		if(1 != NumInPipe){
+			return result;
+		}
+	}
+
+	// All config other than above support one Bulk IN and one Interrupt IN.
+	//if(2 != NumInPipe){
+	//	return result;
+	//}
+
+	result = _MappingOutEP(pAdapter, NumOutPipe, !isNormalChip);
+	
+	return result;
+
+}
+
+void rtl8192cu_interface_configure(_adapter *padapter)
+{
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(padapter);
+	struct dvobj_priv	*pdvobjpriv = &padapter->dvobjpriv;
+
+	if (pdvobjpriv->ishighspeed == _TRUE)
+	{
+		pHalData->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;//512 bytes
+	}
+	else
+	{
+		pHalData->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;//64 bytes
+	}
+
+	pHalData->interfaceIndex = pdvobjpriv->InterfaceNumber;
+	pHalData->RtBulkInPipe = pdvobjpriv->ep_num[0];
+	pHalData->RtBulkOutPipe[0] = pdvobjpriv->ep_num[1];
+	pHalData->RtBulkOutPipe[1] = pdvobjpriv->ep_num[2];
+	pHalData->RtIntInPipe = pdvobjpriv->ep_num[3];
+	pHalData->RtBulkOutPipe[2] = pdvobjpriv->ep_num[4];
+
+#ifdef CONFIG_USB_TX_AGGREGATION
+	pHalData->UsbTxAggMode		= 1;
+	pHalData->UsbTxAggDescNum	= 0x6;	// only 4 bits
+#endif
+
+#ifdef CONFIG_USB_RX_AGGREGATION
+	pHalData->UsbRxAggMode		= USB_RX_AGG_DMA;// USB_RX_AGG_DMA;
+	pHalData->UsbRxAggBlockCount	= 8; //unit : 512b
+	pHalData->UsbRxAggBlockTimeout	= 0x6;
+	pHalData->UsbRxAggPageCount	= 48; //uint :128 b //0x0A;	// 10 = MAX_RX_DMA_BUFFER_SIZE/2/pHalData->UsbBulkOutSize
+	pHalData->UsbRxAggPageTimeout	= 0x4; //6, absolute time = 34ms/(2^6)
+#endif
+
+	HalUsbSetQueuePipeMapping8192CUsb(padapter,
+				pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes);
+
+}
+
+static u8 _InitPowerOn(_adapter *padapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	u8	ret = _SUCCESS;
+	u16	value16=0;
+	u8	value8 = 0;
+	u32  value32 = 0;
+
+	// polling autoload done.
+	u32	pollingCount = 0;
+
+	do
+	{
+		if(rtw_read8(padapter, REG_APS_FSMCO) & PFM_ALDN){
+			//RT_TRACE(COMP_INIT,DBG_LOUD,("Autoload Done!\n"));
+			break;
+		}
+
+		if(pollingCount++ > POLLING_READY_TIMEOUT_COUNT){
+			//RT_TRACE(COMP_INIT,DBG_SERIOUS,("Failed to polling REG_APS_FSMCO[PFM_ALDN] done!\n"));
+			return _FAIL;
+		}
+				
+	}while(_TRUE);
+
+
+//	For hardware power on sequence.
+
+	//0.	RSV_CTRL 0x1C[7:0] = 0x00			// unlock ISO/CLK/Power control register
+	rtw_write8(padapter, REG_RSV_CTRL, 0x0);	
+	// Power on when re-enter from IPS/Radio off/card disable
+	rtw_write8(padapter, REG_SPS0_CTRL, 0x2b);//enable SPS into PWM mode
+/*
+	value16 = PlatformIORead2Byte(Adapter, REG_AFE_XTAL_CTRL);//enable AFE clock
+	value16 &=  (~XTAL_GATE_AFE);
+	PlatformIOWrite2Byte(Adapter,REG_AFE_XTAL_CTRL, value16 );		
+*/
+	
+	rtw_udelay_os(100);//PlatformSleepUs(150);//this is not necessary when initially power on
+
+	value8 = rtw_read8(padapter, REG_LDOV12D_CTRL);	
+	if(0== (value8 & LDV12_EN) ){
+		value8 |= LDV12_EN;
+		rtw_write8(padapter, REG_LDOV12D_CTRL, value8);	
+		//RT_TRACE(COMP_INIT, DBG_LOUD, (" power-on :REG_LDOV12D_CTRL Reg0x21:0x%02x.\n",value8));
+		rtw_udelay_os(100);//PlatformSleepUs(100);//this is not necessary when initially power on
+		value8 = rtw_read8(padapter, REG_SYS_ISO_CTRL);
+		value8 &= ~ISO_MD2PP;
+		rtw_write8(padapter, REG_SYS_ISO_CTRL, value8);			
+	}	
+	
+	// auto enable WLAN
+	pollingCount = 0;
+	value16 = rtw_read16(padapter, REG_APS_FSMCO);
+	value16 |= APFM_ONMAC;
+	rtw_write16(padapter, REG_APS_FSMCO, value16);
+
+	do
+	{
+		if(0 == (rtw_read16(padapter, REG_APS_FSMCO) & APFM_ONMAC)){
+			//RT_TRACE(COMP_INIT,DBG_LOUD,("MAC auto ON okay!\n"));
+			break;
+		}
+
+		if(pollingCount++ > POLLING_READY_TIMEOUT_COUNT){
+			//RT_TRACE(COMP_INIT,DBG_SERIOUS,("Failed to polling REG_APS_FSMCO[APFM_ONMAC] done!\n"));
+			return _FAIL;
+		}
+				
+	}while(_TRUE);
+
+	//Enable Radio ,GPIO ,and LED function
+	rtw_write16(padapter,REG_APS_FSMCO,0x0812);
+
+#ifdef CONFIG_AUTOSUSPEND
+	//for usb Combo card ,BT
+	if((BOARD_USB_COMBO == pHalData->BoardType)&&(padapter->registrypriv.usbss_enable))
+	{
+		value32 =  rtw_read32(padapter, REG_APS_FSMCO);
+		value32 |= (SOP_ABG|SOP_AMB|XOP_BTCK);
+		rtw_write32(padapter, REG_APS_FSMCO, value32);		
+	}
+#endif	
+
+	// release RF digital isolation
+	value16 = rtw_read16(padapter, REG_SYS_ISO_CTRL);
+	value16 &= ~ISO_DIOR;
+	rtw_write16(padapter, REG_SYS_ISO_CTRL, value16);
+
+	// Enable MAC DMA/WMAC/SCHEDULE/SEC block
+	value16 = rtw_read16(padapter, REG_CR);
+	value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN
+				| PROTOCOL_EN | SCHEDULE_EN | MACTXEN | MACRXEN | ENSEC);
+	rtw_write16(padapter, REG_CR, value16);
+	
+	//tynli_test for suspend mode.
+	{
+		rtw_write8(padapter,  0xfe10, 0x19);
+	}
+
+	// 2010/11/22 MH For slim combo debug mode check.
+	if (pHalData->BoardType == BOARD_USB_COMBO)
+	{
+		if (pHalData->SlimComboDbg == _TRUE)
+		{
+			DBG_8192C("SlimComboDbg == TRUE\n");
+
+			// 1. SIC?Test Mode ¤¤, Debug Ports ·|¦Û°Ê Enable, ©Ò¥H Driver ¤W¨Ó«á, 
+			//	­nÃö±¼½Ð³]©w 0x 00[7] -> "1", ±N¥¦ Disable.   effect if not: power consumption increase
+			rtw_write8(padapter, REG_SYS_ISO_CTRL, rtw_read8(padapter, REG_SYS_ISO_CTRL)|BIT7);
+
+			// 2. SIC?Test Mode ¤¤, GPIO-8?·| report Power State ©Ò¥H Driver ¤W¨Ó«á, ½Ð³]©w? 0x04[6] -> "1" ±N¥¦ Disable
+			// effect if not: GPIO-8 could not be GPIO or LED function
+			rtw_write8(padapter, REG_APS_FSMCO, rtw_read8(padapter, REG_APS_FSMCO)|BIT6);
+
+			// 3. SIC Test Mode ¤¤, EESK, EECS ·| report?Host Clock status, ©Ò¥H Driver ¤W¨Ó«á, ½Ð³]©w? 0x40[4] -> "1" ±N¥¦¤Á¦¨ EEPROM ¨Ï¥Î Pin (autoload still from Efuse)
+			//  effect if not:power consumption increase
+			value8 = rtw_read8(padapter, REG_GPIO_MUXCFG)|BIT4 ;
+		#ifdef CONFIG_BT_COEXIST	
+			// 2011/01/26 MH UMB-B cut bug. We need to support the modification.
+			if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID) &&
+				pHalData->bt_coexist.BT_Coexist)
+			{
+				value8 |= (BIT5);	
+			}
+		#endif
+			rtw_write8(padapter, REG_GPIO_MUXCFG,value8 );
+			
+			
+			// 4. SIC Test Mode ¤¤,?SIC Debug ports ·|¦Û°Ê Enable , ©Ò¥H Driver ¤W¨Ó«á°¨¤W, ½Ð³]©w? 0x40[15:11] -> ¡§0x00¡¨, ±N¥¦Disable
+			//  4.1Two Steps setting for safety: 0x40[15,13,12, 11] -> "0", then ?0x40[14] -> "0"
+			// effect if not: Host could not transfer packets, and GPIO-3,2 will occupied by SIC then Co-exist could not work.
+			rtw_write16(padapter, REG_GPIO_MUXCFG, (rtw_read16(padapter, REG_GPIO_MUXCFG)&0x07FF)|BIT14);
+			rtw_write16(padapter, REG_GPIO_MUXCFG, rtw_read16(padapter, REG_GPIO_MUXCFG)&0x07FF);
+		}
+	}
+
+
+	// 2011/02/18 To Fix RU LNA  power leakage problem. We need to execute below below in
+	// Adapter init and halt sequence. Accordingto EEchou's opinion, we can enable the ability for all
+	// IC. According to Johnny's opinion, only RU will meet the condition.
+	if (IS_HARDWARE_TYPE_8192C(padapter) && (pHalData->BoardType == BOARD_USB_High_PA))
+		rtw_write32(padapter, rFPGA0_XCD_RFParameter, rtw_read32(padapter, rFPGA0_XCD_RFParameter)&(~BIT1));
+	return ret;
+
+}
+
+
+static void _dbg_dump_macreg(_adapter *padapter)
+{
+	u32 offset = 0;
+	u32 val32 = 0;
+	u32 index =0 ;
+	for(index=0;index<64;index++)
+	{
+		offset = index*4;
+		val32 = rtw_read32(padapter,offset);
+		DBG_8192C("offset : 0x%02x ,val:0x%08x\n",offset,val32);
+	}
+}
+
+
+static void _InitPABias(_adapter *padapter)
+{
+	HAL_DATA_TYPE		*pHalData	= GET_HAL_DATA(padapter);
+	u8			pa_setting;
+	BOOLEAN		isNormal = IS_NORMAL_CHIP(pHalData->VersionID);
+	BOOLEAN		is92C = IS_92C_SERIAL(pHalData->VersionID);
+	
+	//FIXED PA current issue
+	//efuse_one_byte_read(padapter, 0x1FA, &pa_setting);
+	pa_setting = EFUSE_Read1Byte(padapter, 0x1FA);
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("_InitPABias 0x1FA 0x%x \n",pa_setting));
+
+	if(!(pa_setting & BIT0))
+	{
+		PHY_SetRFReg(padapter, RF90_PATH_A, 0x15, 0x0FFFFF, 0x0F406);
+		PHY_SetRFReg(padapter, RF90_PATH_A, 0x15, 0x0FFFFF, 0x4F406);		
+		PHY_SetRFReg(padapter, RF90_PATH_A, 0x15, 0x0FFFFF, 0x8F406);		
+		PHY_SetRFReg(padapter, RF90_PATH_A, 0x15, 0x0FFFFF, 0xCF406);		
+		//RT_TRACE(COMP_INIT, DBG_LOUD, ("PA BIAS path A\n"));
+	}	
+
+	if(!(pa_setting & BIT1) && isNormal && is92C)
+	{
+		PHY_SetRFReg(padapter,RF90_PATH_B, 0x15, 0x0FFFFF, 0x0F406);
+		PHY_SetRFReg(padapter,RF90_PATH_B, 0x15, 0x0FFFFF, 0x4F406);		
+		PHY_SetRFReg(padapter,RF90_PATH_B, 0x15, 0x0FFFFF, 0x8F406);		
+		PHY_SetRFReg(padapter,RF90_PATH_B, 0x15, 0x0FFFFF, 0xCF406);
+		//RT_TRACE(COMP_INIT, DBG_LOUD, ("PA BIAS path B\n"));	
+	}
+
+	if(!(pa_setting & BIT4))
+	{
+		pa_setting = rtw_read8(padapter, 0x16);
+		pa_setting &= 0x0F;
+		rtw_write8(padapter, 0x16, pa_setting | 0x90);		
+	}
+}
+#ifdef CONFIG_BT_COEXIST
+static void _InitBTCoexist(_adapter *padapter)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
+	struct btcoexist_priv	*pbtpriv = &(pHalData->bt_coexist);
+	u8 u1Tmp;
+
+	if(pbtpriv->BT_Coexist && pbtpriv->BT_CoexistType == BT_CSR_BC4)
+	{
+
+#if MP_DRIVER != 1
+		if(pbtpriv->BT_Ant_isolation)
+		{
+			rtw_write8( padapter,REG_GPIO_MUXCFG, 0xa0);
+			DBG_8192C("BT write 0x%x = 0x%x\n", REG_GPIO_MUXCFG, 0xa0);
+		}
+#endif		
+
+		u1Tmp = rtw_read8(padapter, 0x4fd) & BIT0;
+		u1Tmp = u1Tmp | 
+				((pbtpriv->BT_Ant_isolation==1)?0:BIT1) | 
+				((pbtpriv->BT_Service==BT_SCO)?0:BIT2);
+		rtw_write8( padapter, 0x4fd, u1Tmp);
+		DBG_8192C("BT write 0x%x = 0x%x for non-isolation\n", 0x4fd, u1Tmp);
+		
+		
+		rtw_write32(padapter, REG_BT_COEX_TABLE+4, 0xaaaa9aaa);
+		DBG_8192C("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE+4, 0xaaaa9aaa);
+		
+		rtw_write32(padapter, REG_BT_COEX_TABLE+8, 0xffbd0040);
+		DBG_8192C("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE+8, 0xffbd0040);
+
+		rtw_write32(padapter,  REG_BT_COEX_TABLE+0xc, 0x40000010);
+		DBG_8192C("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE+0xc, 0x40000010);
+
+		//Config to 1T1R
+		u1Tmp =  rtw_read8(padapter,rOFDM0_TRxPathEnable);
+		u1Tmp &= ~(BIT1);
+		rtw_write8( padapter, rOFDM0_TRxPathEnable, u1Tmp);
+		DBG_8192C("BT write 0xC04 = 0x%x\n", u1Tmp);
+			
+		u1Tmp = rtw_read8(padapter, rOFDM1_TRxPathEnable);
+		u1Tmp &= ~(BIT1);
+		rtw_write8( padapter, rOFDM1_TRxPathEnable, u1Tmp);
+		DBG_8192C("BT write 0xD04 = 0x%x\n", u1Tmp);
+
+	}
+}
+#endif
+
+//-------------------------------------------------------------------------
+//
+// LLT R/W/Init function
+//
+//-------------------------------------------------------------------------
+static u8 _LLTWrite(
+	IN  PADAPTER	Adapter,
+	IN	u32		address,
+	IN	u32		data
+	)
+{
+	u8	status = _SUCCESS;
+	int 		count = 0;
+	u32 		value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
+
+	rtw_write32(Adapter, REG_LLT_INIT, value);
+	
+	//polling
+	do{
+		
+		value = rtw_read32(Adapter, REG_LLT_INIT);
+		if(_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)){
+			break;
+		}
+		
+		if(count > POLLING_LLT_THRESHOLD){
+			//RT_TRACE(COMP_INIT,DBG_SERIOUS,("Failed to polling write LLT done at address %d!\n", address));
+			status = _FAIL;
+			break;
+		}
+	}while(count++);
+
+	return status;
+	
+}
+
+
+static u8 _LLTRead(
+	IN  PADAPTER	Adapter,
+	IN	u32		address
+	)
+{
+	int		count = 0;
+	u32		value = _LLT_INIT_ADDR(address) | _LLT_OP(_LLT_READ_ACCESS);
+
+	rtw_write32(Adapter, REG_LLT_INIT, value);
+
+	//polling and get value
+	do{
+		
+		value = rtw_read32(Adapter, REG_LLT_INIT);
+		if(_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)){
+			return (u8)value;
+		}
+		
+		if(count > POLLING_LLT_THRESHOLD){
+			//RT_TRACE(COMP_INIT,DBG_SERIOUS,("Failed to polling read LLT done at address %d!\n", address));
+			break;
+		}
+	}while(count++);
+
+	return 0xFF;
+
+}
+
+
+static u8 InitLLTTable(
+	IN  PADAPTER	Adapter,
+	IN	u32		boundary
+	)
+{
+	u8	status = _SUCCESS;
+	u32		i;
+
+#ifdef CONFIG_IOL_LLT
+	{
+		struct xmit_frame	*xmit_frame;
+		if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL)
+			return _FAIL;
+
+		rtw_IOL_append_LLT_cmd(xmit_frame, boundary);
+		status = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000);
+	}
+#else
+	for(i = 0 ; i < (boundary - 1) ; i++){
+		status = _LLTWrite(Adapter, i , i + 1);
+		if(_SUCCESS != status){
+			return status;
+		}
+	}
+
+	// end of list
+	status = _LLTWrite(Adapter, (boundary - 1), 0xFF); 
+	if(_SUCCESS != status){
+		return status;
+	}
+
+	// Make the other pages as ring buffer
+	// This ring buffer is used as beacon buffer if we config this MAC as two MAC transfer.
+	// Otherwise used as local loopback buffer. 
+	for(i = boundary ; i < LAST_ENTRY_OF_TX_PKT_BUFFER ; i++){
+		status = _LLTWrite(Adapter, i, (i + 1)); 
+		if(_SUCCESS != status){
+			return status;
+		}
+	}
+	
+	// Let last entry point to the start entry of ring buffer
+	status = _LLTWrite(Adapter, LAST_ENTRY_OF_TX_PKT_BUFFER, boundary);
+	if(_SUCCESS != status){
+		return status;
+	}
+#endif
+
+	return status;
+	
+}
+
+
+//---------------------------------------------------------------
+//
+//	MAC init functions
+//
+//---------------------------------------------------------------
+static VOID
+_SetMacID(
+	IN  PADAPTER Adapter, u8* MacID
+	)
+{
+	u32 i;
+	for(i=0 ; i< MAC_ADDR_LEN ; i++){
+		rtw_write32(Adapter, REG_MACID+i, MacID[i]);
+	}
+}
+
+static VOID
+_SetBSSID(
+	IN  PADAPTER Adapter, u8* BSSID
+	)
+{
+	u32 i;
+	for(i=0 ; i< MAC_ADDR_LEN ; i++){
+		rtw_write32(Adapter, REG_BSSID+i, BSSID[i]);
+	}
+}
+
+
+// Shall USB interface init this?
+static VOID
+_InitInterrupt(
+	IN  PADAPTER Adapter
+	)
+{
+	u32	value32;
+
+	// HISR - turn all on
+	value32 = 0xFFFFFFFF;
+	rtw_write32(Adapter, REG_HISR, value32);
+
+	// HIMR - turn all on
+	rtw_write32(Adapter, REG_HIMR, value32);
+}
+
+
+static VOID
+_InitQueueReservedPage(
+	IN  PADAPTER Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(Adapter);
+	struct registry_priv *pregistrypriv = &Adapter->registrypriv;
+	BOOLEAN			isNormalChip = IS_NORMAL_CHIP(pHalData->VersionID);
+	
+	u32			outEPNum	= (u32)pHalData->OutEpNumber;
+	u32			numHQ		= 0;
+	u32			numLQ		= 0;
+	u32			numNQ		= 0;
+	u32			numPubQ;
+	u32			value32;
+	u8			value8;
+	BOOLEAN		bWiFiConfig	= pregistrypriv->wifi_spec;
+	//u32			txQPageNum, txQPageUnit,txQRemainPage;
+
+#if 0
+	if(!pregistrypriv->wifi_spec){		
+		numPubQ = (isNormalChip) ? NORMAL_PAGE_NUM_PUBQ : TEST_PAGE_NUM_PUBQ;
+		//RT_ASSERT((numPubQ < TX_TOTAL_PAGE_NUMBER), ("Public queue page number is great than total tx page number.\n"));
+		txQPageNum = TX_TOTAL_PAGE_NUMBER - numPubQ;
+
+		//RT_ASSERT((0 == txQPageNum%txQPageNum), ("Total tx page number is not dividable!\n"));
+		
+		txQPageUnit = txQPageNum/outEPNum;
+		txQRemainPage = txQPageNum % outEPNum;
+
+		if(pHalData->OutEpQueueSel & TX_SELE_HQ){
+			numHQ = txQPageUnit;
+		}
+		if(pHalData->OutEpQueueSel & TX_SELE_LQ){
+			numLQ = txQPageUnit;
+		}
+		// HIGH priority queue always present in the configuration of 2 or 3 out-ep 
+		// so ,remainder pages have assigned to High queue
+		if((outEPNum>1) && (txQRemainPage)){			
+			numHQ += txQRemainPage;
+		}
+
+		// NOTE: This step shall be proceed before writting REG_RQPN.
+		if(isNormalChip){
+			if(pHalData->OutEpQueueSel & TX_SELE_NQ){
+				numNQ = txQPageUnit;
+			}
+			value8 = (u8)_NPQ(numNQ);
+			rtw_write8(Adapter, REG_RQPN_NPQ, value8);
+		}
+		//RT_ASSERT(((numHQ + numLQ + numNQ + numPubQ) < TX_PAGE_BOUNDARY), ("Total tx page number is greater than tx boundary!\n"));
+	}
+	else
+#endif
+	{ //for WMM 
+		//RT_ASSERT((outEPNum>=2), ("for WMM ,number of out-ep must more than or equal to 2!\n"));
+
+		numPubQ = (isNormalChip) 	? ((bWiFiConfig)?WMM_NORMAL_PAGE_NUM_PUBQ:NORMAL_PAGE_NUM_PUBQ)
+								:WMM_TEST_PAGE_NUM_PUBQ;		
+
+		if(pHalData->OutEpQueueSel & TX_SELE_HQ){
+			numHQ = (isNormalChip)?((bWiFiConfig)?WMM_NORMAL_PAGE_NUM_HPQ:NORMAL_PAGE_NUM_HPQ)
+								:WMM_TEST_PAGE_NUM_HPQ;
+		}
+
+		if(pHalData->OutEpQueueSel & TX_SELE_LQ){
+			numLQ = (isNormalChip)?((bWiFiConfig)?WMM_NORMAL_PAGE_NUM_LPQ:NORMAL_PAGE_NUM_LPQ)
+								:WMM_TEST_PAGE_NUM_LPQ;
+		}
+		// NOTE: This step shall be proceed before writting REG_RQPN.
+		if(isNormalChip){			
+			if(pHalData->OutEpQueueSel & TX_SELE_NQ){
+				numNQ = (bWiFiConfig)?WMM_NORMAL_PAGE_NUM_NPQ:NORMAL_PAGE_NUM_NPQ;
+			}
+			value8 = (u8)_NPQ(numNQ);
+			rtw_write8(Adapter, REG_RQPN_NPQ, value8);
+		}
+	}
+
+	// TX DMA
+	value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN;	
+	rtw_write32(Adapter, REG_RQPN, value32);	
+}
+
+static void _InitID(IN  PADAPTER Adapter)
+{
+	int i;	 
+	EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter);
+	
+	for(i=0; i<6; i++)
+	{
+		rtw_write8(Adapter, (REG_MACID+i), pEEPROM->mac_addr[i]);		 	
+	}
+
+/*
+	NicIFSetMacAddress(Adapter, Adapter->PermanentAddress);
+	//Ziv test
+#if 1
+	{
+		u1Byte sMacAddr[6] = {0};
+		u4Byte i;
+		
+		for(i = 0 ; i < MAC_ADDR_LEN ; i++){
+			sMacAddr[i] = PlatformIORead1Byte(Adapter, (REG_MACID + i));
+		}
+		RT_PRINT_ADDR(COMP_INIT|COMP_EFUSE, DBG_LOUD, "Read back MAC Addr: ", sMacAddr);
+	}
+#endif
+
+#if 0
+	u4Byte nMAR 	= 0xFFFFFFFF;
+	u8 m_MacID[] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06};
+	u8 m_BSSID[] = {0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f};
+	int i;
+	
+	_SetMacID(Adapter, Adapter->PermanentAddress);
+	_SetBSSID(Adapter, m_BSSID);
+
+	//set MAR
+	PlatformIOWrite4Byte(Adapter, REG_MAR, nMAR);
+	PlatformIOWrite4Byte(Adapter, REG_MAR+4, nMAR);
+#endif
+*/
+}
+
+
+static VOID
+_InitTxBufferBoundary(
+	IN  PADAPTER Adapter
+	)
+{	
+	struct registry_priv *pregistrypriv = &Adapter->registrypriv;
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(Adapter);
+
+	u8	txpktbuf_bndy; 
+
+	if(!pregistrypriv->wifi_spec){
+		txpktbuf_bndy = TX_PAGE_BOUNDARY;
+	}
+	else{//for WMM
+		txpktbuf_bndy = ( IS_NORMAL_CHIP( pHalData->VersionID))?WMM_NORMAL_TX_PAGE_BOUNDARY
+															:WMM_TEST_TX_PAGE_BOUNDARY;
+	}
+
+	rtw_write8(Adapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy);
+	rtw_write8(Adapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy);
+	rtw_write8(Adapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy);
+	rtw_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy);	
+#if 1
+	rtw_write8(Adapter, REG_TDECTRL+1, txpktbuf_bndy);
+#else
+	txdmactrl = PlatformIORead2Byte(Adapter, REG_TDECTRL);
+	txdmactrl &= ~BCN_HEAD_MASK;
+	txdmactrl |= BCN_HEAD(txpktbuf_bndy);
+	PlatformIOWrite2Byte(Adapter, REG_TDECTRL, txdmactrl);
+#endif
+}
+
+static VOID
+_InitPageBoundary(
+	IN  PADAPTER Adapter
+	)
+{
+	// RX Page Boundary
+	//srand(static_cast<unsigned int>(time(NULL)) );
+	u16 rxff_bndy = 0x27FF;//(rand() % 1) ? 0x27FF : 0x23FF;
+
+	rtw_write16(Adapter, (REG_TRXFF_BNDY + 2), rxff_bndy);
+
+	// TODO: ?? shall we set tx boundary?
+}
+
+
+static VOID
+_InitNormalChipRegPriority(
+	IN	PADAPTER	Adapter,
+	IN	u16		beQ,
+	IN	u16		bkQ,
+	IN	u16		viQ,
+	IN	u16		voQ,
+	IN	u16		mgtQ,
+	IN	u16		hiQ
+	)
+{
+	u16 value16		= (rtw_read16(Adapter, REG_TRXDMA_CTRL) & 0x7);
+
+	value16 |=	_TXDMA_BEQ_MAP(beQ) 	| _TXDMA_BKQ_MAP(bkQ) |
+				_TXDMA_VIQ_MAP(viQ) 	| _TXDMA_VOQ_MAP(voQ) |
+				_TXDMA_MGQ_MAP(mgtQ)| _TXDMA_HIQ_MAP(hiQ);
+	
+	rtw_write16(Adapter, REG_TRXDMA_CTRL, value16);
+}
+
+static VOID
+_InitNormalChipOneOutEpPriority(
+	IN	PADAPTER Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(Adapter);
+
+	u16	value = 0;
+	switch(pHalData->OutEpQueueSel)
+	{
+		case TX_SELE_HQ:
+			value = QUEUE_HIGH;
+			break;
+		case TX_SELE_LQ:
+			value = QUEUE_LOW;
+			break;
+		case TX_SELE_NQ:
+			value = QUEUE_NORMAL;
+			break;
+		default:
+			//RT_ASSERT(FALSE,("Shall not reach here!\n"));
+			break;
+	}
+	
+	_InitNormalChipRegPriority(Adapter,
+								value,
+								value,
+								value,
+								value,
+								value,
+								value
+								);
+
+}
+
+static VOID
+_InitNormalChipTwoOutEpPriority(
+	IN	PADAPTER Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(Adapter);
+	struct registry_priv *pregistrypriv = &Adapter->registrypriv;
+	u16			beQ,bkQ,viQ,voQ,mgtQ,hiQ;
+	
+
+	u16	valueHi = 0;
+	u16	valueLow = 0;
+	
+	switch(pHalData->OutEpQueueSel)
+	{
+		case (TX_SELE_HQ | TX_SELE_LQ):
+			valueHi = QUEUE_HIGH;
+			valueLow = QUEUE_LOW;
+			break;
+		case (TX_SELE_NQ | TX_SELE_LQ):
+			valueHi = QUEUE_NORMAL;
+			valueLow = QUEUE_LOW;
+			break;
+		case (TX_SELE_HQ | TX_SELE_NQ):
+			valueHi = QUEUE_HIGH;
+			valueLow = QUEUE_NORMAL;
+			break;
+		default:
+			//RT_ASSERT(FALSE,("Shall not reach here!\n"));
+			break;
+	}
+
+	if(!pregistrypriv->wifi_spec ){
+		beQ		= valueLow;
+		bkQ		= valueLow;
+		viQ		= valueHi;
+		voQ		= valueHi;
+		mgtQ	= valueHi; 
+		hiQ		= valueHi;								
+	}
+	else{//for WMM ,CONFIG_OUT_EP_WIFI_MODE
+		beQ		= valueLow;
+		bkQ		= valueHi;		
+		viQ		= valueHi;
+		voQ		= valueLow;
+		mgtQ	= valueHi;
+		hiQ		= valueHi;							
+	}
+	
+	_InitNormalChipRegPriority(Adapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ);
+
+}
+
+static VOID
+_InitNormalChipThreeOutEpPriority(
+	IN	PADAPTER Adapter
+	)
+{
+	struct registry_priv *pregistrypriv = &Adapter->registrypriv;
+	u16			beQ,bkQ,viQ,voQ,mgtQ,hiQ;
+
+	if(!pregistrypriv->wifi_spec ){// typical setting
+		beQ		= QUEUE_LOW;
+		bkQ 		= QUEUE_LOW;
+		viQ 		= QUEUE_NORMAL;
+		voQ 		= QUEUE_HIGH;
+		mgtQ 	= QUEUE_HIGH;
+		hiQ 		= QUEUE_HIGH;			
+	}
+	else{// for WMM
+		beQ		= QUEUE_LOW;
+		bkQ 		= QUEUE_NORMAL;
+		viQ 		= QUEUE_NORMAL;
+		voQ 		= QUEUE_HIGH;
+		mgtQ 	= QUEUE_HIGH;
+		hiQ 		= QUEUE_HIGH;			
+	}
+	_InitNormalChipRegPriority(Adapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ);
+}
+
+static VOID
+_InitNormalChipQueuePriority(
+	IN	PADAPTER Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(Adapter);
+
+	switch(pHalData->OutEpNumber)
+	{
+		case 1:
+			_InitNormalChipOneOutEpPriority(Adapter);
+			break;
+		case 2:
+			_InitNormalChipTwoOutEpPriority(Adapter);
+			break;
+		case 3:
+			_InitNormalChipThreeOutEpPriority(Adapter);
+			break;
+		default:
+			//RT_ASSERT(FALSE,("Shall not reach here!\n"));
+			break;
+	}
+
+
+}
+
+static VOID
+_InitTestChipQueuePriority(
+	IN	PADAPTER Adapter
+	)
+{
+	u8	hq_sele ;
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(Adapter);
+	struct registry_priv *pregistrypriv = &Adapter->registrypriv;
+	
+	switch(pHalData->OutEpNumber)
+	{
+		case 2:	// (TX_SELE_HQ|TX_SELE_LQ)
+			if(!pregistrypriv->wifi_spec)//typical setting			
+				hq_sele =  HQSEL_VOQ | HQSEL_VIQ | HQSEL_MGTQ | HQSEL_HIQ ;
+			else	//for WMM
+				hq_sele = HQSEL_VOQ | HQSEL_BEQ | HQSEL_MGTQ | HQSEL_HIQ ;
+			break;
+		case 1:
+			if(TX_SELE_LQ == pHalData->OutEpQueueSel ){//map all endpoint to Low queue
+				 hq_sele = 0;
+			}
+			else if(TX_SELE_HQ == pHalData->OutEpQueueSel){//map all endpoint to High queue
+				hq_sele =  HQSEL_VOQ | HQSEL_VIQ | HQSEL_BEQ | HQSEL_BKQ | HQSEL_MGTQ | HQSEL_HIQ ;
+			}		
+			break;
+		default:
+			//RT_ASSERT(FALSE,("Shall not reach here!\n"));
+			break;
+	}
+	rtw_write8(Adapter, (REG_TRXDMA_CTRL+1), hq_sele);
+}
+
+
+static VOID
+_InitQueuePriority(
+	IN  PADAPTER Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(Adapter);
+
+	if(IS_NORMAL_CHIP( pHalData->VersionID)){
+		_InitNormalChipQueuePriority(Adapter);
+	}
+	else{
+		_InitTestChipQueuePriority(Adapter);
+	}
+}
+
+static VOID
+_InitHardwareDropIncorrectBulkOut(
+	IN  PADAPTER Adapter
+	)
+{
+	u32	value32 = rtw_read32(Adapter, REG_TXDMA_OFFSET_CHK);
+	value32 |= DROP_DATA_EN;
+	rtw_write32(Adapter, REG_TXDMA_OFFSET_CHK, value32);
+}
+
+static VOID
+_InitNetworkType(
+	IN  PADAPTER Adapter
+	)
+{
+	u32	value32;
+
+	value32 = rtw_read32(Adapter, REG_CR);
+
+	// TODO: use the other function to set network type
+#if RTL8191C_FPGA_NETWORKTYPE_ADHOC
+	value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AD_HOC);
+#else
+	value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP);
+#endif
+	rtw_write32(Adapter, REG_CR, value32);
+//	RASSERT(pIoBase->rtw_read8(REG_CR + 2) == 0x2);
+}
+
+static VOID
+_InitTransferPageSize(
+	IN  PADAPTER Adapter
+	)
+{
+	// Tx page size is always 128.
+	
+	u8	value8;
+	value8 = _PSRX(PBP_128) | _PSTX(PBP_128);
+	rtw_write8(Adapter, REG_PBP, value8);
+}
+
+static VOID
+_InitDriverInfoSize(
+	IN  PADAPTER	Adapter,
+	IN	u8		drvInfoSize
+	)
+{
+	rtw_write8(Adapter,REG_RX_DRVINFO_SZ, drvInfoSize);
+}
+
+static VOID
+_InitWMACSetting(
+	IN  PADAPTER Adapter
+	)
+{
+	//u4Byte			value32;
+	//u16			value16;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	//pHalData->ReceiveConfig = AAP | APM | AM | AB | APP_ICV | ADF | AMF | APP_FCS | HTC_LOC_CTRL | APP_MIC | APP_PHYSTS;
+	pHalData->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AB |RCR_CBSSID_DATA| RCR_CBSSID_BCN| RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYSTS;
+#if (0 == RTL8192C_RX_PACKET_NO_INCLUDE_CRC)
+	pHalData->ReceiveConfig |= ACRC32;
+#endif
+
+	// some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile()
+	rtw_write32(Adapter, REG_RCR, pHalData->ReceiveConfig);
+
+	// Accept all multicast address
+	rtw_write32(Adapter, REG_MAR, 0xFFFFFFFF);
+	rtw_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF);
+
+
+	// Accept all data frames
+	//value16 = 0xFFFF;
+	//rtw_write16(Adapter, REG_RXFLTMAP2, value16);
+
+	// 2010.09.08 hpfan
+	// Since ADF is removed from RCR, ps-poll will not be indicate to driver,
+	// RxFilterMap should mask ps-poll to gurantee AP mode can rx ps-poll.
+	//value16 = 0x400;
+	//rtw_write16(Adapter, REG_RXFLTMAP1, value16);
+
+	// Accept all management frames
+	//value16 = 0xFFFF;
+	//rtw_write16(Adapter, REG_RXFLTMAP0, value16);
+
+	//enable RX_SHIFT bits
+	//rtw_write8(Adapter, REG_TRXDMA_CTRL, rtw_read8(Adapter, REG_TRXDMA_CTRL)|BIT(1));	
+
+}
+
+static VOID
+_InitAdaptiveCtrl(
+	IN  PADAPTER Adapter
+	)
+{
+	u16	value16;
+	u32	value32;
+
+	// Response Rate Set
+	value32 = rtw_read32(Adapter, REG_RRSR);
+	value32 &= ~RATE_BITMAP_ALL;
+	value32 |= RATE_RRSR_CCK_ONLY_1M;
+	rtw_write32(Adapter, REG_RRSR, value32);
+
+	// CF-END Threshold
+	//m_spIoBase->rtw_write8(REG_CFEND_TH, 0x1);
+
+	// SIFS (used in NAV)
+	value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
+	rtw_write16(Adapter, REG_SPEC_SIFS, value16);
+
+	// Retry Limit
+	value16 = _LRL(0x30) | _SRL(0x30);
+	rtw_write16(Adapter, REG_RL, value16);
+	
+}
+
+static VOID
+_InitRateFallback(
+	IN  PADAPTER Adapter
+	)
+{
+	// Set Data Auto Rate Fallback Retry Count register.
+	rtw_write32(Adapter, REG_DARFRC, 0x00000000);
+	rtw_write32(Adapter, REG_DARFRC+4, 0x10080404);
+	rtw_write32(Adapter, REG_RARFRC, 0x04030201);
+	rtw_write32(Adapter, REG_RARFRC+4, 0x08070605);
+
+}
+
+
+static VOID
+_InitEDCA(
+	IN  PADAPTER Adapter
+	)
+{
+	// Set Spec SIFS (used in NAV)
+	rtw_write16(Adapter,REG_SPEC_SIFS, 0x100a);
+	rtw_write16(Adapter,REG_MAC_SPEC_SIFS, 0x100a);
+
+	// Set SIFS for CCK
+	rtw_write16(Adapter,REG_SIFS_CTX, 0x100a);	
+
+	// Set SIFS for OFDM
+	rtw_write16(Adapter,REG_SIFS_TRX, 0x100a);
+
+	// TXOP
+	rtw_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B);
+	rtw_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F);
+	rtw_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324);
+	rtw_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226);
+}
+
+
+static VOID
+_InitBeaconMaxError(
+	IN  PADAPTER	Adapter,
+	IN	BOOLEAN		InfraMode
+	)
+{
+#ifdef RTL8192CU_ADHOC_WORKAROUND_SETTING
+	rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF);	
+#else
+	//rtw_write8(Adapter, REG_BCN_MAX_ERR, (InfraMode ? 0xFF : 0x10));	
+#endif
+}
+
+
+#ifdef CONFIG_LED
+static void _InitHWLed(PADAPTER Adapter)
+{
+	struct led_priv *pledpriv = &(Adapter->ledpriv);
+	
+	if( pledpriv->LedStrategy != HW_LED)
+		return;
+	
+// HW led control
+// to do .... 
+//must consider cases of antenna diversity/ commbo card/solo card/mini card
+
+}
+#endif //CONFIG_LED
+
+static VOID
+_InitRDGSetting(
+	IN	PADAPTER Adapter
+	)
+{
+	rtw_write8(Adapter,REG_RD_CTRL,0xFF);
+	rtw_write16(Adapter, REG_RD_NAV_NXT, 0x200);
+	rtw_write8(Adapter,REG_RD_RESP_PKT_TH,0x05);
+}
+
+static VOID
+_InitRxSetting(
+	IN	PADAPTER Adapter
+	)
+{
+	rtw_write32(Adapter, REG_MACID, 0x87654321);
+	rtw_write32(Adapter, 0x0700, 0x87654321);
+}
+
+static VOID
+_InitRetryFunction(
+	IN  PADAPTER Adapter
+	)
+{
+	u8	value8;
+	
+	value8 = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL);
+	value8 |= EN_AMPDU_RTY_NEW;
+	rtw_write8(Adapter, REG_FWHW_TXQ_CTRL, value8);
+
+	// Set ACK timeout
+	rtw_write8(Adapter, REG_ACKTO, 0x40);
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:	usb_AggSettingTxUpdate()
+ *
+ * Overview:	Seperate TX/RX parameters update independent for TP detection and 
+ *			dynamic TX/RX aggreagtion parameters update.
+ *
+ * Input:			PADAPTER
+ *
+ * Output/Return:	NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	12/10/2010	MHC		Seperate to smaller function.
+ *
+ *---------------------------------------------------------------------------*/
+static VOID
+usb_AggSettingTxUpdate(
+	IN	PADAPTER			Adapter
+	)
+{
+#ifdef CONFIG_USB_TX_AGGREGATION
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	//PMGNT_INFO		pMgntInfo = &(Adapter->MgntInfo);	
+	u32			value32;
+
+	if(Adapter->registrypriv.wifi_spec)
+		pHalData->UsbTxAggMode = _FALSE;
+
+	if(pHalData->UsbTxAggMode){
+		value32 = rtw_read32(Adapter, REG_TDECTRL);
+		value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT);
+		value32 |= ((pHalData->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT);
+		
+		rtw_write32(Adapter, REG_TDECTRL, value32);
+	}
+	
+#endif
+}	// usb_AggSettingTxUpdate
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	usb_AggSettingRxUpdate()
+ *
+ * Overview:	Seperate TX/RX parameters update independent for TP detection and 
+ *			dynamic TX/RX aggreagtion parameters update.
+ *
+ * Input:			PADAPTER
+ *
+ * Output/Return:	NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	12/10/2010	MHC		Seperate to smaller function.
+ *
+ *---------------------------------------------------------------------------*/
+static VOID
+usb_AggSettingRxUpdate(
+	IN	PADAPTER			Adapter
+	)
+{
+#ifdef CONFIG_USB_RX_AGGREGATION
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	//PMGNT_INFO		pMgntInfo = &(Adapter->MgntInfo);
+	u8			valueDMA;
+	u8			valueUSB;
+
+	valueDMA = rtw_read8(Adapter, REG_TRXDMA_CTRL);
+	valueUSB = rtw_read8(Adapter, REG_USB_SPECIAL_OPTION);
+
+	switch(pHalData->UsbRxAggMode)
+	{
+		case USB_RX_AGG_DMA:
+			valueDMA |= RXDMA_AGG_EN;
+			valueUSB &= ~USB_AGG_EN;
+			break;
+		case USB_RX_AGG_USB:
+			valueDMA &= ~RXDMA_AGG_EN;
+			valueUSB |= USB_AGG_EN;
+			break;
+		case USB_RX_AGG_MIX:
+			valueDMA |= RXDMA_AGG_EN;
+			valueUSB |= USB_AGG_EN;
+			break;
+		case USB_RX_AGG_DISABLE:
+		default:
+			valueDMA &= ~RXDMA_AGG_EN;
+			valueUSB &= ~USB_AGG_EN;
+			break;
+	}
+
+	rtw_write8(Adapter, REG_TRXDMA_CTRL, valueDMA);
+	rtw_write8(Adapter, REG_USB_SPECIAL_OPTION, valueUSB);
+
+	switch(pHalData->UsbRxAggMode)
+	{
+		case USB_RX_AGG_DMA:
+			rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, pHalData->UsbRxAggPageCount);
+			rtw_write8(Adapter, REG_USB_DMA_AGG_TO, pHalData->UsbRxAggPageTimeout);
+			break;
+		case USB_RX_AGG_USB:
+			rtw_write8(Adapter, REG_USB_AGG_TH, pHalData->UsbRxAggBlockCount);
+			rtw_write8(Adapter, REG_USB_AGG_TO, pHalData->UsbRxAggBlockTimeout);
+			break;
+		case USB_RX_AGG_MIX:
+			rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, pHalData->UsbRxAggPageCount);
+			rtw_write8(Adapter, REG_USB_DMA_AGG_TO, pHalData->UsbRxAggPageTimeout);
+			rtw_write8(Adapter, REG_USB_AGG_TH, pHalData->UsbRxAggBlockCount);
+			rtw_write8(Adapter, REG_USB_AGG_TO, pHalData->UsbRxAggBlockTimeout);
+			break;
+		case USB_RX_AGG_DISABLE:
+		default:
+			// TODO: 
+			break;
+	}
+
+	switch(PBP_128)
+	{
+		case PBP_128:
+			pHalData->HwRxPageSize = 128;
+			break;
+		case PBP_64:
+			pHalData->HwRxPageSize = 64;
+			break;
+		case PBP_256:
+			pHalData->HwRxPageSize = 256;
+			break;
+		case PBP_512:
+			pHalData->HwRxPageSize = 512;
+			break;
+		case PBP_1024:
+			pHalData->HwRxPageSize = 1024;
+			break;
+		default:
+			//RT_ASSERT(FALSE, ("RX_PAGE_SIZE_REG_VALUE definition is incorrect!\n"));
+			break;
+	}
+#endif
+}	// usb_AggSettingRxUpdate
+
+static VOID
+InitUsbAggregationSetting(
+	IN  PADAPTER Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	// Tx aggregation setting
+	usb_AggSettingTxUpdate(Adapter);
+
+	// Rx aggregation setting
+	usb_AggSettingRxUpdate(Adapter);
+
+	// 201/12/10 MH Add for USB agg mode dynamic switch.
+	pHalData->UsbRxHighSpeedMode = _FALSE;
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:	USB_AggModeSwitch()
+ *
+ * Overview:	When RX traffic is more than 40M, we need to adjust some parameters to increase
+ *			RX speed by increasing batch indication size. This will decrease TCP ACK speed, we
+ *			need to monitor the influence of FTP/network share.
+ *			For TX mode, we are still ubder investigation.
+ *
+ * Input:		PADAPTER
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	12/10/2010	MHC		Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+VOID
+USB_AggModeSwitch(
+	IN	PADAPTER			Adapter
+	)
+{
+#if 0
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct mlme_priv	*pmlmepriv = &(Adapter->mlmepriv);
+
+	//pHalData->UsbRxHighSpeedMode = FALSE;
+	// How to measure the RX speed? We assume that when traffic is more than 
+	if (pMgntInfo->bRegAggDMEnable == _FALSE)
+	{
+		return;	// Inf not support.
+	}
+	
+	
+	if (pmlmepriv->LinkDetectInfo.bHigherBusyTraffic == _TRUE && 
+		pHalData->UsbRxHighSpeedMode == _FALSE)
+	{
+		pHalData->UsbRxHighSpeedMode = _TRUE;
+		DBG_8192C("UsbAggModeSwitchCheck to HIGH\n");
+	}
+	else if (pmlmepriv->LinkDetectInfo.bHigherBusyTraffic == _FALSE && 
+		pHalData->UsbRxHighSpeedMode == _TRUE)
+	{
+		pHalData->UsbRxHighSpeedMode = _FALSE;
+		DBG_8192C("UsbAggModeSwitchCheck to LOW\n");
+	}
+	else
+	{
+		return; 
+	}
+	
+	// 2010/12/10 MH Add for USB Aggregation judgement we need to 
+	//if( pMgntInfo->LinkDetectInfo.NumRxOkInPeriod > 4000 ||
+		//			pMgntInfo->LinkDetectInfo.NumTxOkInPeriod > 4000 )
+
+#ifdef CONFIG_USB_TX_AGGREGATION
+	//usb_AggSettingTxUpdate(Adapter);
+#endif
+		
+#ifdef CONFIG_USB_RX_AGGREGATION
+	if (pHalData->UsbRxHighSpeedMode == _TRUE)	
+	{
+		// 2010/12/10 MH The parameter is tested by SD1 engineer and SD3 channel emulator.
+		// USB mode
+		pHalData->UsbRxAggBlockCount		= 40;
+		pHalData->UsbRxAggBlockTimeout	= 5;
+		// Mix mode
+		pHalData->UsbRxAggPageCount		= 72;
+		pHalData->UsbRxAggPageTimeout	= 6;		
+	}
+	else
+	{
+		// USB mode
+		pHalData->UsbRxAggBlockCount		= pMgntInfo->RegUsbRxAggBlockCount;
+		pHalData->UsbRxAggBlockTimeout	= pMgntInfo->RegUsbRxAggBlockTimeout;	
+		// Mix mode
+		pHalData->UsbRxAggPageCount		= pMgntInfo->RegUsbRxAggPageCount;
+		pHalData->UsbRxAggPageTimeout	= pMgntInfo->RegUsbRxAggPageTimeout;	
+	}	
+#endif
+#endif
+}	// USB_AggModeSwitch
+
+static VOID
+_InitOperationMode(
+	IN	PADAPTER			Adapter
+	)
+{
+#if 0//gtest
+	PHAL_DATA_8192CUSB	pHalData = GetHalData8192CUsb(Adapter);
+	u1Byte				regBwOpMode = 0;
+	u4Byte				regRATR = 0, regRRSR = 0;
+
+
+	//1 This part need to modified according to the rate set we filtered!!
+	//
+	// Set RRSR, RATR, and REG_BWOPMODE registers
+	//
+	switch(Adapter->RegWirelessMode)
+	{
+		case WIRELESS_MODE_B:
+			regBwOpMode = BW_OPMODE_20MHZ;
+			regRATR = RATE_ALL_CCK;
+			regRRSR = RATE_ALL_CCK;
+			break;
+		case WIRELESS_MODE_A:
+			ASSERT(FALSE);
+#if 0
+			regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
+			regRATR = RATE_ALL_OFDM_AG;
+			regRRSR = RATE_ALL_OFDM_AG;
+#endif
+			break;
+		case WIRELESS_MODE_G:
+			regBwOpMode = BW_OPMODE_20MHZ;
+			regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+			regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+			break;
+		case WIRELESS_MODE_AUTO:
+			if (Adapter->bInHctTest)
+			{
+			    regBwOpMode = BW_OPMODE_20MHZ;
+			    regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+			    regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+			}
+			else
+			{
+			    regBwOpMode = BW_OPMODE_20MHZ;
+			    regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
+			    regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+			}
+			break;
+		case WIRELESS_MODE_N_24G:
+			// It support CCK rate by default.
+			// CCK rate will be filtered out only when associated AP does not support it.
+			regBwOpMode = BW_OPMODE_20MHZ;
+				regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
+				regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+			break;
+		case WIRELESS_MODE_N_5G:
+			ASSERT(FALSE);
+#if 0
+			regBwOpMode = BW_OPMODE_5G;
+			regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
+			regRRSR = RATE_ALL_OFDM_AG;
+#endif
+			break;
+	}
+
+	// Ziv ????????
+	//PlatformEFIOWrite4Byte(Adapter, REG_INIRTS_RATE_SEL, regRRSR);
+	PlatformEFIOWrite1Byte(Adapter, REG_BWOPMODE, regBwOpMode);
+
+	// For Min Spacing configuration.
+	switch(pHalData->RF_Type)
+	{
+		case RF_1T2R:
+		case RF_1T1R:
+			RT_TRACE(COMP_INIT, DBG_LOUD, ("Initializeadapter: RF_Type%s\n", (pHalData->RF_Type==RF_1T1R? "(1T1R)":"(1T2R)")));
+			Adapter->MgntInfo.MinSpaceCfg = (MAX_MSS_DENSITY_1T<<3);						
+			break;
+		case RF_2T2R:
+		case RF_2T2R_GREEN:
+			RT_TRACE(COMP_INIT, DBG_LOUD, ("Initializeadapter:RF_Type(2T2R)\n"));
+			Adapter->MgntInfo.MinSpaceCfg = (MAX_MSS_DENSITY_2T<<3);			
+			break;
+	}
+	
+	PlatformEFIOWrite1Byte(Adapter, REG_AMPDU_MIN_SPACE, Adapter->MgntInfo.MinSpaceCfg);
+#endif
+}
+
+
+ static VOID
+_InitBeaconParameters(
+	IN  PADAPTER Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	rtw_write16(Adapter, REG_BCN_CTRL, 0x1010);
+
+	// TODO: Remove these magic number
+	rtw_write16(Adapter, REG_TBTT_PROHIBIT,0x6404);// ms
+	rtw_write8(Adapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);// 5ms
+	rtw_write8(Adapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME); // 2ms
+
+	// Suggested by designer timchen. Change beacon AIFS to the largest number
+	// beacause test chip does not contension before sending beacon. by tynli. 2009.11.03
+	if(IS_NORMAL_CHIP( pHalData->VersionID)){
+		rtw_write16(Adapter, REG_BCNTCFG, 0x660F);
+	}
+	else{		
+		rtw_write16(Adapter, REG_BCNTCFG, 0x66FF);
+	}
+
+}
+
+static VOID
+_InitRFType(
+	IN	PADAPTER Adapter
+	)
+{
+	struct registry_priv	 *pregpriv = &Adapter->registrypriv;
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(Adapter);
+	BOOLEAN			is92CU		= IS_92C_SERIAL(pHalData->VersionID);
+
+#if	DISABLE_BB_RF
+	pHalData->rf_chip	= RF_PSEUDO_11N;
+	return;
+#endif
+
+	pHalData->rf_chip	= RF_6052;
+
+	if(_FALSE == is92CU){
+		pHalData->rf_type = RF_1T1R;
+		DBG_8192C("Set RF Chip ID to RF_6052 and RF type to 1T1R.\n");
+		return;
+	}
+
+	// TODO: Consider that EEPROM set 92CU to 1T1R later.
+	// Force to overwrite setting according to chip version. Ignore EEPROM setting.
+	//pHalData->RF_Type = is92CU ? RF_2T2R : RF_1T1R;
+	MSG_8192C("Set RF Chip ID to RF_6052 and RF type to %d.\n", pHalData->rf_type);
+
+}
+
+static VOID _InitAdhocWorkaroundParams(IN PADAPTER Adapter)
+{
+#if RTL8192CU_ADHOC_WORKAROUND_SETTING
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);	
+	pHalData->RegBcnCtrlVal = rtw_read8(Adapter, REG_BCN_CTRL);
+	pHalData->RegTxPause = rtw_read8(Adapter, REG_TXPAUSE); 
+	pHalData->RegFwHwTxQCtrl = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL+2);
+	pHalData->RegReg542 = rtw_read8(Adapter, REG_TBTT_PROHIBIT+2);
+#endif	
+}
+
+static VOID
+_BeaconFunctionEnable(
+	IN	PADAPTER		Adapter,
+	IN	BOOLEAN			Enable,
+	IN	BOOLEAN			Linked
+	)
+{
+#if 0
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8			value8 = 0;
+
+	//value8 = Enable ? (EN_BCN_FUNCTION | EN_TXBCN_RPT) : EN_BCN_FUNCTION;
+
+	if(_FALSE == Linked){		
+		if(IS_NORMAL_CHIP( pHalData->VersionID)){
+			value8 |= DIS_TSF_UDT0_NORMAL_CHIP;
+		}
+		else{
+			value8 |= DIS_TSF_UDT0_TEST_CHIP;
+		}
+	}
+
+	rtw_write8(Adapter, REG_BCN_CTRL, value8);
+#else
+	rtw_write8(Adapter, REG_BCN_CTRL, (BIT4 | BIT3 | BIT1));
+	//SetBcnCtrlReg(Adapter, (BIT4 | BIT3 | BIT1), 0x00);
+	//RT_TRACE(COMP_BEACON, DBG_LOUD, ("_BeaconFunctionEnable 0x550 0x%x\n", PlatformEFIORead1Byte(Adapter, 0x550)));			
+
+	rtw_write8(Adapter, REG_RD_CTRL+1, 0x6F);	
+#endif
+}
+
+
+// Set CCK and OFDM Block "ON"
+static VOID _BBTurnOnBlock(
+	IN	PADAPTER		Adapter
+	)
+{
+#if (DISABLE_BB_RF)
+	return;
+#endif
+
+	PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1);
+	PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1);
+}
+
+static VOID _RfPowerSave(
+	IN	PADAPTER		Adapter
+	)
+{
+#if 0
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(Adapter);
+	PMGNT_INFO		pMgntInfo	= &(Adapter->MgntInfo);
+	u1Byte			eRFPath;
+
+#if (DISABLE_BB_RF)
+	return;
+#endif
+
+	if(pMgntInfo->RegRfOff == TRUE){ // User disable RF via registry.
+		RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): Turn off RF for RegRfOff.\n"));
+		MgntActSet_RF_State(Adapter, eRfOff, RF_CHANGE_BY_SW);
+		// Those action will be discard in MgntActSet_RF_State because off the same state
+		for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
+			PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0);
+	}
+	else if(pMgntInfo->RfOffReason > RF_CHANGE_BY_PS){ // H/W or S/W RF OFF before sleep.
+		RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): Turn off RF for RfOffReason(%ld).\n", pMgntInfo->RfOffReason));
+		MgntActSet_RF_State(Adapter, eRfOff, pMgntInfo->RfOffReason);
+	}
+	else{
+		pHalData->eRFPowerState = eRfOn;
+		pMgntInfo->RfOffReason = 0; 
+		if(Adapter->bInSetPower || Adapter->bResetInProgress)
+			PlatformUsbEnableInPipes(Adapter);
+		RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): RF is on.\n"));
+	}
+#endif
+}
+
+enum {
+	Antenna_Lfet = 1,
+	Antenna_Right = 2,	
+};
+
+static VOID
+_InitAntenna_Selection(IN	PADAPTER Adapter)
+{
+
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(Adapter);
+
+	if(pHalData->AntDivCfg==0)
+		return;
+	DBG_8192C("==>  %s ....\n",__FUNCTION__);
+	
+	if((RF_1T1R == pHalData->rf_type))
+	{	
+		rtw_write32(Adapter, REG_LEDCFG0, rtw_read32(Adapter, REG_LEDCFG0)|BIT23);	
+		PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT13, 0x01);
+		
+		if(PHY_QueryBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A)
+			pHalData->CurAntenna = Antenna_A;
+		else
+			pHalData->CurAntenna = Antenna_B;
+		DBG_8192C("%s,Cur_ant:(%x)%s\n",__FUNCTION__,pHalData->CurAntenna,(pHalData->CurAntenna == Antenna_A)?"Antenna_A":"Antenna_B");
+			
+}
+
+
+}
+//
+// 2010/08/09 MH Add for power down check.
+//
+static BOOLEAN
+HalDetectPwrDownMode(
+	IN PADAPTER				Adapter
+	)
+{
+	u8	tmpvalue;
+	HAL_DATA_TYPE		*pHalData	= GET_HAL_DATA(Adapter);
+	struct pwrctrl_priv		*pwrctrlpriv = &Adapter->pwrctrlpriv;
+	
+	EFUSE_ShadowRead(Adapter, 1, EEPROM_RF_OPT3, (u32 *)&tmpvalue);
+
+	// 2010/08/25 MH INF priority > PDN Efuse value.
+	if(tmpvalue & BIT4 && pwrctrlpriv->reg_pdnmode)
+	{
+		pHalData->pwrdown = _TRUE;
+	}
+	else
+	{
+		pHalData->pwrdown = _FALSE;
+	}
+
+	DBG_8192C("HalDetectPwrDownMode(): PDN=%d\n", pHalData->pwrdown);
+	return pHalData->pwrdown;
+		
+}	// HalDetectPwrDownMode
+
+
+//
+// 2010/08/26 MH Add for selective suspend mode check.
+// If Efuse 0x0e bit1 is not enabled, we can not support selective suspend for Minicard and
+// slim card.
+//
+static VOID
+HalDetectSelectiveSuspendMode(
+	IN PADAPTER				Adapter
+	)
+{
+	u8	tmpvalue;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dvobj_priv	*pdvobjpriv = &Adapter->dvobjpriv;
+
+	// If support HW radio detect, we need to enable WOL ability, otherwise, we 
+	// can not use FW to notify host the power state switch.
+	
+	EFUSE_ShadowRead(Adapter, 1, EEPROM_USB_OPTIONAL1, (u32 *)&tmpvalue);
+
+	DBG_8192C("HalDetectSelectiveSuspendMode(): SS ");
+	if(tmpvalue & BIT1)
+	{
+		DBG_8192C("Enable\n");
+	}
+	else
+	{
+		DBG_8192C("Disable\n");
+		pdvobjpriv->RegUsbSS = _FALSE;
+	}
+
+	// 2010/09/01 MH According to Dongle Selective Suspend INF. We can switch SS mode.
+	if (pdvobjpriv->RegUsbSS && !SUPPORT_HW_RADIO_DETECT(pHalData))
+	{
+		//PMGNT_INFO				pMgntInfo = &(Adapter->MgntInfo);
+
+		//if (!pMgntInfo->bRegDongleSS)	
+		//{
+		//	RT_TRACE(COMP_INIT, DBG_LOUD, ("Dongle disable SS\n"));
+			pdvobjpriv->RegUsbSS = _FALSE;
+		//}
+	}
+}	// HalDetectSelectiveSuspendMode
+/*-----------------------------------------------------------------------------
+ * Function:	HwSuspendModeEnable92Cu()
+ *
+ * Overview:	HW suspend mode switch.
+ *
+ * Input:		NONE
+ *
+ * Output:	NONE
+ *
+ * Return:	NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	08/23/2010	MHC		HW suspend mode switch test..
+ *---------------------------------------------------------------------------*/
+static VOID 
+HwSuspendModeEnable92Cu(
+	IN	PADAPTER	pAdapter,
+	IN	u8			Type
+	)
+{
+	//PRT_USB_DEVICE 		pDevice = GET_RT_USB_DEVICE(pAdapter);
+	u16	reg = rtw_read16(pAdapter, REG_GPIO_MUXCFG);	
+
+	//if (!pDevice->RegUsbSS)
+	{
+		return;
+	}
+
+	//
+	// 2010/08/23 MH According to Alfred's suggestion, we need to to prevent HW
+	// to enter suspend mode automatically. Otherwise, it will shut down major power 
+	// domain and 8051 will stop. When we try to enter selective suspend mode, we
+	// need to prevent HW to enter D2 mode aumotmatically. Another way, Host will
+	// issue a S10 signal to power domain. Then it will cleat SIC setting(from Yngli).
+	// We need to enable HW suspend mode when enter S3/S4 or disable. We need 
+	// to disable HW suspend mode for IPS/radio_off.
+	//
+	//RT_TRACE(COMP_RF, DBG_LOUD, ("HwSuspendModeEnable92Cu = %d\n", Type));
+	if (Type == _FALSE)
+	{
+		reg |= BIT14;
+		//RT_TRACE(COMP_RF, DBG_LOUD, ("REG_GPIO_MUXCFG = %x\n", reg));
+		rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg);
+		reg |= BIT12;
+		//RT_TRACE(COMP_RF, DBG_LOUD, ("REG_GPIO_MUXCFG = %x\n", reg));
+		rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg);
+	}
+	else
+	{
+		reg &= (~BIT12);
+		rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg);
+		reg &= (~BIT14);
+		rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg);
+	}
+	
+}	// HwSuspendModeEnable92Cu
+rt_rf_power_state RfOnOffDetect(IN	PADAPTER pAdapter )
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(pAdapter);
+	u8	val8;
+	rt_rf_power_state rfpowerstate = rf_off;
+
+	if(pAdapter->pwrctrlpriv.bHWPowerdown)
+	{
+		val8 = rtw_read8(pAdapter, REG_HSISR);
+		DBG_8192C("pwrdown, 0x5c(BIT7)=%02x\n", val8);
+		rfpowerstate = (val8 & BIT7) ? rf_off: rf_on;				
+	}
+	else // rf on/off
+	{
+		rtw_write8(	pAdapter, REG_MAC_PINMUX_CFG,rtw_read8(pAdapter, REG_MAC_PINMUX_CFG)&~(BIT3));
+		val8 = rtw_read8(pAdapter, REG_GPIO_IO_SEL);
+		DBG_8192C("GPIO_IN=%02x\n", val8);
+		rfpowerstate = (val8 & BIT3) ? rf_on : rf_off;	
+	}
+	return rfpowerstate;
+}	// HalDetectPwrDownMode
+
+void _ps_open_RF(_adapter *padapter);
+
+
+u32 rtl8192cu_hal_init(PADAPTER Adapter)
+{
+	u8	val8 = 0;
+	u32	boundary, status = _SUCCESS;
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	struct pwrctrl_priv		*pwrctrlpriv = &Adapter->pwrctrlpriv;
+	struct registry_priv	*pregistrypriv = &Adapter->registrypriv;
+	u8	isNormal = IS_NORMAL_CHIP(pHalData->VersionID);
+	u8	is92C = IS_92C_SERIAL(pHalData->VersionID);
+	rt_rf_power_state		eRfPowerStateToSet;
+#ifdef CONFIG_BT_COEXIST
+	struct btcoexist_priv	*pbtpriv = &(pHalData->bt_coexist);
+#endif
+
+	u32 init_start_time = rtw_get_current_time();
+
+
+#ifdef DBG_HAL_INIT_PROFILING
+
+	enum HAL_INIT_STAGES {
+		HAL_INIT_STAGES_BEGIN = 0,
+		HAL_INIT_STAGES_INIT_PW_ON,
+		HAL_INIT_STAGES_MISC01,
+		HAL_INIT_STAGES_DOWNLOAD_FW,
+		HAL_INIT_STAGES_INIT_LLTT,
+		HAL_INIT_STAGES_MAC,
+		HAL_INIT_STAGES_MISC02,
+		HAL_INIT_STAGES_BB,
+		HAL_INIT_STAGES_RF,
+		HAL_INIT_STAGES_TURN_ON_BLOCK,
+		HAL_INIT_STAGES_INIT_SECURITY,
+		HAL_INIT_STAGES_MISC11,
+		//HAL_INIT_STAGES_RF_PS,
+		HAL_INIT_STAGES_IQK,
+		HAL_INIT_STAGES_PW_TRACK,
+		HAL_INIT_STAGES_LCK,
+		HAL_INIT_STAGES_MISC21,
+		HAL_INIT_STAGES_INIT_PABIAS,
+		HAL_INIT_STAGES_BT_COEXIST,
+		//HAL_INIT_STAGES_ANTENNA_SEL,
+		HAL_INIT_STAGES_INIT_HAL_DM,
+		HAL_INIT_STAGES_MISC31,
+		HAL_INIT_STAGES_END,
+		HAL_INIT_STAGES_NUM
+	};
+
+	char * hal_init_stages_str[] = {
+		"HAL_INIT_STAGES_BEGIN",
+		"HAL_INIT_STAGES_INIT_PW_ON",
+		"HAL_INIT_STAGES_MISC01",
+		"HAL_INIT_STAGES_DOWNLOAD_FW",
+		"HAL_INIT_STAGES_INIT_LLTT",
+		"HAL_INIT_STAGES_MAC",
+		"HAL_INIT_STAGES_MISC02",
+		"HAL_INIT_STAGES_BB",
+		"HAL_INIT_STAGES_RF",
+		"HAL_INIT_STAGES_TURN_ON_BLOCK",
+		"HAL_INIT_STAGES_INIT_SECURITY",
+		"HAL_INIT_STAGES_MISC11",
+		//"HAL_INIT_STAGES_RF_PS",
+		"HAL_INIT_STAGES_IQK",
+		"HAL_INIT_STAGES_PW_TRACK",
+		"HAL_INIT_STAGES_LCK",
+		"HAL_INIT_STAGES_MISC21",
+		"HAL_INIT_STAGES_INIT_PABIAS",
+		"HAL_INIT_STAGES_BT_COEXIST",
+		//"HAL_INIT_STAGES_ANTENNA_SEL",
+		"HAL_INIT_STAGES_INIT_HAL_DM",
+		"HAL_INIT_STAGES_MISC31",
+		"HAL_INIT_STAGES_END",
+	};
+
+	int hal_init_profiling_i;
+	u32 hal_init_stages_timestamp[HAL_INIT_STAGES_NUM]; //used to record the time of each stage's starting point
+
+	for(hal_init_profiling_i=0;hal_init_profiling_i<HAL_INIT_STAGES_NUM;hal_init_profiling_i++)
+		hal_init_stages_timestamp[hal_init_profiling_i]=0;
+
+	#define HAL_INIT_PROFILE_TAG(stage) hal_init_stages_timestamp[(stage)]=rtw_get_current_time();
+#else
+	#define HAL_INIT_PROFILE_TAG(stage) do {} while(0)
+#endif //DBG_HAL_INIT_PROFILING
+
+
+
+_func_enter_;
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BEGIN);
+	if(Adapter->pwrctrlpriv.bkeepfwalive)
+	{
+		_ps_open_RF(Adapter);
+
+		if(pHalData->bIQKInitialized ){
+			rtl8192c_PHY_IQCalibrate(Adapter,_TRUE);
+		}
+		else{
+			rtl8192c_PHY_IQCalibrate(Adapter,_FALSE);
+			pHalData->bIQKInitialized = _TRUE;
+		}
+		rtl8192c_dm_CheckTXPowerTracking(Adapter);
+		rtl8192c_PHY_LCCalibrate(Adapter);
+
+		goto exit;
+	}
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON);
+	status = _InitPowerOn(Adapter);
+	if(status == _FAIL){
+		RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init power on!\n"));
+		goto exit;
+	}
+
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01);
+	_InitQueueReservedPage(Adapter);
+	_InitTxBufferBoundary(Adapter);		
+	_InitQueuePriority(Adapter);
+	_InitPageBoundary(Adapter);	
+	_InitTransferPageSize(Adapter);
+
+
+#if ENABLE_USB_DROP_INCORRECT_OUT
+	_InitHardwareDropIncorrectBulkOut(Adapter);
+#endif
+
+	if(pHalData->bRDGEnable){
+		_InitRDGSetting(Adapter);
+	}
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW);
+#if (1 == MP_DRIVER)
+	_InitRxSetting(Adapter);
+	// Don't Download Firmware
+	Adapter->bFWReady = _FALSE;
+#elif RTL8192CU_FW_DOWNLOAD_ENABLE
+	status = FirmwareDownload92C(Adapter);
+	if(status != _SUCCESS)
+	{
+		Adapter->bFWReady = _FALSE;
+		pHalData->fw_ractrl = _FALSE;
+		DBG_8192C("fw download fail!\n");
+		goto exit;
+	}	
+	else
+	{
+		Adapter->bFWReady = _TRUE;
+		pHalData->fw_ractrl = _TRUE;
+		DBG_8192C("fw download ok!\n");	
+	}
+#endif
+
+	InitializeFirmwareVars92C(Adapter);
+
+	if(pwrctrlpriv->reg_rfoff == _TRUE){
+		pwrctrlpriv->rf_pwrstate = rf_off;
+	}
+
+	// 2010/08/09 MH We need to check if we need to turnon or off RF after detecting
+	// HW GPIO pin. Before PHY_RFConfig8192C.
+	//HalDetectPwrDownMode(Adapter);
+	// 2010/08/26 MH If Efuse does not support sective suspend then disable the function.
+	//HalDetectSelectiveSuspendMode(Adapter);
+	
+
+	// Set RF type for BB/RF configuration	
+	_InitRFType(Adapter);//->_ReadRFType()
+
+	// Save target channel
+	// <Roger_Notes> Current Channel will be updated again later.
+	pHalData->CurrentChannel = 6;//default set to 6
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT);
+	if(!pregistrypriv->wifi_spec){
+		boundary = TX_PAGE_BOUNDARY;
+	}
+	else{// for WMM
+		boundary = (IS_NORMAL_CHIP(pHalData->VersionID))	?WMM_NORMAL_TX_PAGE_BOUNDARY
+													:WMM_TEST_TX_PAGE_BOUNDARY;
+	}															
+	status =  InitLLTTable(Adapter, boundary);
+	if(status == _FAIL){
+		RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init LLT table\n"));
+		goto exit;
+	}
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MAC);
+#if (HAL_MAC_ENABLE == 1)
+	status = PHY_MACConfig8192C(Adapter);
+	if(status == _FAIL)
+	{
+		goto exit;
+	}
+#endif
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02);
+	// Get Rx PHY status in order to report RSSI and others.
+	_InitDriverInfoSize(Adapter, DRVINFO_SZ);
+
+	_InitInterrupt(Adapter);
+	_InitID(Adapter);//set mac_address
+	_InitNetworkType(Adapter);//set msr	
+	_InitWMACSetting(Adapter);
+	_InitAdaptiveCtrl(Adapter);
+	_InitEDCA(Adapter);
+	_InitRateFallback(Adapter);
+	_InitRetryFunction(Adapter);
+	InitUsbAggregationSetting(Adapter);
+	_InitOperationMode(Adapter);//todo
+	_InitBeaconParameters(Adapter);
+	_InitBeaconMaxError(Adapter, _TRUE);
+
+#if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_TX_MCAST2UNI)
+
+#ifdef CONFIG_CHECK_AC_LIFETIME
+	// Enable lifetime check for the four ACs
+	rtw_write8(Adapter, REG_LIFETIME_EN, 0x0F);
+#endif	// CONFIG_CHECK_AC_LIFETIME
+
+#ifdef CONFIG_TX_MCAST2UNI
+	rtw_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400);	// unit: 256us. 256ms
+	rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400);	// unit: 256us. 256ms
+#else	// CONFIG_TX_MCAST2UNI
+	rtw_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x3000);	// unit: 256us. 3s
+	rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x3000);	// unit: 256us. 3s
+#endif	// CONFIG_TX_MCAST2UNI
+#endif	// CONFIG_CONCURRENT_MODE || CONFIG_TX_MCAST2UNI
+	
+
+#ifdef CONFIG_LED
+	_InitHWLed(Adapter);
+#endif //CONFIG_LED
+
+	//
+	//d. Initialize BB related configurations.
+	//
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BB);
+#if (HAL_BB_ENABLE == 1)
+	status = PHY_BBConfig8192C(Adapter);
+	if(status == _FAIL)
+	{
+		goto exit;
+	}
+#endif
+
+	// 92CU use 3-wire to r/w RF
+	//pHalData->Rf_Mode = RF_OP_By_SW_3wire;
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_RF);
+#if (HAL_RF_ENABLE == 1)
+	status = PHY_RFConfig8192C(Adapter);	
+	if(status == _FAIL)
+	{
+		goto exit;
+	}
+
+	if(IS_VENDOR_UMC_A_CUT(pHalData->VersionID) && !IS_92C_SERIAL(pHalData->VersionID))
+	{
+		PHY_SetRFReg(Adapter, RF90_PATH_A, RF_RX_G1, bMaskDWord, 0x30255);
+		PHY_SetRFReg(Adapter, RF90_PATH_A, RF_RX_G2, bMaskDWord, 0x50a00);		
+	}
+#endif
+
+	//
+	// Joseph Note: Keep RfRegChnlVal for later use.
+	//
+	pHalData->RfRegChnlVal[0] = PHY_QueryRFReg(Adapter, (RF90_RADIO_PATH_E)0, RF_CHNLBW, bRFRegOffsetMask);
+	pHalData->RfRegChnlVal[1] = PHY_QueryRFReg(Adapter, (RF90_RADIO_PATH_E)1, RF_CHNLBW, bRFRegOffsetMask);
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK);
+	_BBTurnOnBlock(Adapter);
+	//NicIFSetMacAddress(padapter, padapter->PermanentAddress);
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY);
+	invalidate_cam_all(Adapter);
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11);
+	// 2010/12/17 MH We need to set TX power according to EFUSE content at first.
+	PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel);
+
+// Move by Neo for USB SS to below setp	
+//_RfPowerSave(Adapter);
+
+	if (!IS_92C_SERIAL( pHalData->VersionID) && (pHalData->AntDivCfg!=0))
+	{ //for 88CU ,1T1R
+		_InitAntenna_Selection(Adapter);
+	}
+
+
+	// 
+	// Disable BAR, suggested by Scott
+	// 2010.04.09 add by hpfan
+	//
+	rtw_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff);
+
+	// HW SEQ CTRL
+	//set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM.
+	rtw_write8(Adapter,REG_HWSEQ_CTRL, 0xFF); 
+
+	if(pregistrypriv->wifi_spec)
+		rtw_write16(Adapter,REG_FAST_EDCA_CTRL ,0);
+
+	//Nav limit , suggest by scott
+	rtw_write8(Adapter, 0x652, 0x0);
+
+#if (MP_DRIVER == 1)
+	Adapter->mppriv.channel = pHalData->CurrentChannel;
+	MPT_InitializeAdapter(Adapter, Adapter->mppriv.channel);
+#else
+	//
+	// 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status
+	// and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not 
+	// call init_adapter. May cause some problem??
+	//
+	// Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed 
+	// in MgntActSet_RF_State() after wake up, because the value of pHalData->eRFPowerState 
+	// is the same as eRfOff, we should change it to eRfOn after we config RF parameters.
+	// Added by tynli. 2010.03.30.
+	pwrctrlpriv->rf_pwrstate = rf_on;
+
+#if 0  //to do
+	RT_CLEAR_PS_LEVEL(pwrctrlpriv, RT_RF_OFF_LEVL_HALT_NIC);
+#if 1 //Todo
+	// 20100326 Joseph: Copy from GPIOChangeRFWorkItemCallBack() function to check HW radio on/off.
+	// 20100329 Joseph: Revise and integrate the HW/SW radio off code in initialization.
+
+	eRfPowerStateToSet = (rt_rf_power_state) RfOnOffDetect(Adapter);
+	pwrctrlpriv->rfoff_reason |= eRfPowerStateToSet==rf_on ? RF_CHANGE_BY_INIT : RF_CHANGE_BY_HW;
+	pwrctrlpriv->rfoff_reason |= (pwrctrlpriv->reg_rfoff) ? RF_CHANGE_BY_SW : 0;
+
+	if(pwrctrlpriv->rfoff_reason&RF_CHANGE_BY_HW)
+		pwrctrlpriv->b_hw_radio_off = _TRUE;
+
+	DBG_8192C("eRfPowerStateToSet=%d\n", eRfPowerStateToSet);
+	
+	if(pwrctrlpriv->reg_rfoff == _TRUE)
+	{	// User disable RF via registry.
+		DBG_8192C("InitializeAdapter8192CU(): Turn off RF for RegRfOff.\n");
+		//MgntActSet_RF_State(Adapter, rf_off, RF_CHANGE_BY_SW, _TRUE);
+		
+		// Those action will be discard in MgntActSet_RF_State because off the same state
+		//for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
+			//PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0);
+	}
+	else if(pwrctrlpriv->rfoff_reason > RF_CHANGE_BY_PS)
+	{	// H/W or S/W RF OFF before sleep.
+		DBG_8192C(" Turn off RF for RfOffReason(%x) ----------\n", pwrctrlpriv->rfoff_reason);
+		//pwrctrlpriv->rfoff_reason = RF_CHANGE_BY_INIT;
+		pwrctrlpriv->rf_pwrstate = rf_on;
+		//MgntActSet_RF_State(Adapter, rf_off, pwrctrlpriv->rfoff_reason, _TRUE);
+	}
+	else
+	{
+		// Perform GPIO polling to find out current RF state. added by Roger, 2010.04.09.
+		if(pHalData->BoardType == BOARD_MINICARD /*&& (Adapter->MgntInfo.PowerSaveControl.bGpioRfSw)*/)
+		{
+			DBG_8192C("InitializeAdapter8192CU(): RF=%d \n", eRfPowerStateToSet);
+			if (eRfPowerStateToSet == rf_off)
+			{				
+				//MgntActSet_RF_State(Adapter, rf_off, RF_CHANGE_BY_HW, _TRUE);
+				pwrctrlpriv->b_hw_radio_off = _TRUE;	
+			}
+			else
+			{
+				pwrctrlpriv->rf_pwrstate = rf_off;
+				pwrctrlpriv->rfoff_reason = RF_CHANGE_BY_INIT; 
+				pwrctrlpriv->b_hw_radio_off = _FALSE;					
+				//MgntActSet_RF_State(Adapter, rf_on, pwrctrlpriv->rfoff_reason, _TRUE);
+			}
+		}	
+		else
+		{
+			pwrctrlpriv->rf_pwrstate = rf_off;
+			pwrctrlpriv->rfoff_reason = RF_CHANGE_BY_INIT; 			
+			//MgntActSet_RF_State(Adapter, rf_on, pwrctrlpriv->rfoff_reason, _TRUE);
+		}
+	
+		pwrctrlpriv->rfoff_reason = 0; 
+		pwrctrlpriv->b_hw_radio_off = _FALSE;
+		pwrctrlpriv->rf_pwrstate = rf_on;
+		rtw_led_control(Adapter, LED_CTL_POWER_ON);		
+
+	}
+
+	// 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c.
+	// Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1.
+	if(pHalData->pwrdown && eRfPowerStateToSet == rf_off)
+	{
+		// Enable register area 0x0-0xc.
+		rtw_write8(Adapter, REG_RSV_CTRL, 0x0);
+
+		//
+		// <Roger_Notes> We should configure HW PDn source for WiFi ONLY, and then
+		// our HW will be set in power-down mode if PDn source from all  functions are configured.
+		// 2010.10.06.
+		//
+		//if(IS_HARDWARE_TYPE_8723U(Adapter))
+		//{			
+		//	u1bTmp = rtw_read8(Adapter, REG_MULTI_FUNC_CTRL);
+		//	rtw_write8(Adapter, REG_MULTI_FUNC_CTRL, (u1bTmp|WL_HWPDN_EN));
+		//}
+		//else
+		//{
+			rtw_write16(Adapter, REG_APS_FSMCO, 0x8812);
+		//}
+	}
+	//DrvIFIndicateCurrentPhyStatus(Adapter); // 2010/08/17 MH Disable to prevent BSOD.
+#endif
+#endif
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK);
+	// 2010/08/26 MH Merge from 8192CE.
+	if(pwrctrlpriv->rf_pwrstate == rf_on)
+	{
+		if(pHalData->bIQKInitialized ){
+			rtl8192c_PHY_IQCalibrate(Adapter,_TRUE);
+		}
+		else
+		{
+			rtl8192c_PHY_IQCalibrate(Adapter,_FALSE);
+			pHalData->bIQKInitialized = _TRUE;
+		}
+		
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK);
+		rtl8192c_dm_CheckTXPowerTracking(Adapter);
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK);
+		rtl8192c_PHY_LCCalibrate(Adapter);
+	}
+#endif /* #if (MP_DRIVER == 1) */
+
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC21);
+#if RTL8192CU_ADHOC_WORKAROUND_SETTING
+	_InitAdhocWorkaroundParams(Adapter);
+#endif
+
+
+#ifdef USB_INTERFERENCE_ISSUE
+ //fixed USB interface interference issue
+	rtw_write8(Adapter, 0xfe40, 0xe0);
+	rtw_write8(Adapter, 0xfe41, 0x8d);
+	rtw_write8(Adapter, 0xfe42, 0x80);
+	rtw_write32(Adapter,0x20c,0xfd0320);
+#if 1
+	//2011/01/07 ,suggest by Johnny,for solved the problem that too many protocol error on USB bus
+	if(!IS_VENDOR_UMC_A_CUT(pHalData->VersionID) )//&& !IS_92C_SERIAL(pHalData->VersionID))// TSMC , 8188
+	{		
+	    	// 0xE6=0x94
+	    	rtw_write8(Adapter, 0xFE40, 0xE6);
+		rtw_write8(Adapter, 0xFE41, 0x94);
+		rtw_write8(Adapter, 0xFE42, 0x80); 
+
+		// 0xE0=0x19
+		rtw_write8(Adapter, 0xFE40, 0xE0);
+		rtw_write8(Adapter, 0xFE41, 0x19);
+		rtw_write8(Adapter, 0xFE42, 0x80);
+
+		// 0xE5=0x91
+		rtw_write8(Adapter, 0xFE40, 0xE5);
+		rtw_write8(Adapter, 0xFE41, 0x91);
+		rtw_write8(Adapter, 0xFE42, 0x80); 
+
+		// 0xE2=0x81
+		rtw_write8(Adapter, 0xFE40, 0xE2);
+		rtw_write8(Adapter, 0xFE41, 0x81);
+		rtw_write8(Adapter, 0xFE42, 0x80);    
+	
+	}
+
+#endif
+#endif //USB_INTERFERENCE_ISSUE
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS);
+	_InitPABias(Adapter);
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BT_COEXIST);
+#ifdef CONFIG_BT_COEXIST
+	_InitBTCoexist(Adapter);
+#endif
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM);
+	rtl8192c_InitHalDm(Adapter);
+
+	// 2010/08/23 MH According to Alfred's suggestion, we need to to prevent HW enter
+	// suspend mode automatically.
+	//HwSuspendModeEnable92Cu(Adapter, _FALSE);
+
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC31);
+	rtw_write8(Adapter, 0x15, 0xe9);//suggest by Johnny for lower temperature
+	//_dbg_dump_macreg(padapter);
+
+	//misc
+	{
+		int i;		
+		u8 mac_addr[6];
+		for(i=0; i<6; i++)
+		{			
+			mac_addr[i] = rtw_read8(Adapter, REG_MACID+i);		
+		}
+		
+		DBG_8192C("MAC Address from REG_MACID = "MAC_FMT"\n", MAC_ARG(mac_addr));
+	}
+
+exit:
+HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END);
+
+	DBG_871X("%s in %dms\n", __FUNCTION__, rtw_get_passing_time_ms(init_start_time));
+
+	#ifdef DBG_HAL_INIT_PROFILING
+	hal_init_stages_timestamp[HAL_INIT_STAGES_END]=rtw_get_current_time();
+
+	for(hal_init_profiling_i=0;hal_init_profiling_i<HAL_INIT_STAGES_NUM-1;hal_init_profiling_i++) {
+		DBG_871X("DBG_HAL_INIT_PROFILING: %35s, %u, %5u, %5u\n"
+			, hal_init_stages_str[hal_init_profiling_i]
+			, hal_init_stages_timestamp[hal_init_profiling_i]
+			, (hal_init_stages_timestamp[hal_init_profiling_i+1]-hal_init_stages_timestamp[hal_init_profiling_i])
+			, rtw_get_time_interval_ms(hal_init_stages_timestamp[hal_init_profiling_i], hal_init_stages_timestamp[hal_init_profiling_i+1])
+		);
+	}	
+	#endif
+
+
+_func_exit_;
+
+	return status;
+}
+
+
+#define SYNC_SD7_20110802_phy_SsPwrSwitch92CU
+#ifdef SYNC_SD7_20110802_phy_SsPwrSwitch92CU
+#define PlatformEFIOWrite1Byte	rtw_write8
+#define PlatformEFIOWrite2Byte	rtw_write16
+#define PlatformEFIORead1Byte	rtw_read8
+#define delay_ms		rtw_mdelay_os
+#define u1Byte u8
+
+VOID
+phy_SsPwrSwitch92CU(
+	IN	PADAPTER			Adapter,
+	IN	rt_rf_power_state	eRFPowerState,
+	IN	int bRegSSPwrLvl
+	)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	u1Byte				value8;
+	
+	switch( eRFPowerState )
+	{
+		case rf_on:								
+			if (bRegSSPwrLvl == 1)
+			{
+				// 1. Enable MAC Clock. Can not be enabled now.
+				//WriteXBYTE(REG_SYS_CLKR+1, ReadXBYTE(REG_SYS_CLKR+1) | BIT(3));
+				
+				// 2. Force PWM, Enable SPS18_LDO_Marco_Block
+				PlatformEFIOWrite1Byte(Adapter, REG_SPS0_CTRL, 
+				PlatformEFIORead1Byte(Adapter, REG_SPS0_CTRL) | (BIT0|BIT3));
+
+				// 3. restore BB, AFE control register.
+				//RF
+				if (pHalData->rf_type ==  RF_2T2R)
+					PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x380038, 1);							
+				else								
+					PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x38, 1);							
+				PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf0, 1);
+				PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT1, 0);
+
+				//AFE
+				//DbgPrint("0x0e70 = %x\n", Adapter->PS_BBRegBackup[PSBBREG_AFE0]);
+				//PHY_SetBBReg(Adapter, 0x0e70, bMaskDWord ,Adapter->PS_BBRegBackup[PSBBREG_AFE0] );
+				//PHY_SetBBReg(Adapter, 0x0e70, bMaskDWord ,0x631B25A0 );				
+				if (pHalData->rf_type ==  RF_2T2R)
+					PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x63DB25A0 );
+				else if (pHalData->rf_type ==  RF_1T1R)
+					PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x631B25A0 );
+
+				// 4. issue 3-wire command that RF set to Rx idle mode. This is used to re-write the RX idle mode.
+				// We can only prvide a usual value instead and then HW will modify the value by itself.
+				PHY_SetRFReg(Adapter,RF90_PATH_A, 0, bRFRegOffsetMask,0x32D95);
+				if (pHalData->rf_type ==  RF_2T2R)
+				{
+					PHY_SetRFReg(Adapter,RF90_PATH_B, 0, bRFRegOffsetMask,0x32D95);
+				}
+			}	
+			else		// Level 2 or others.
+			{
+				//h.	AFE_PLL_CTRL 0x28[7:0] = 0x80			//disable AFE PLL
+				PlatformEFIOWrite1Byte(Adapter, REG_AFE_PLL_CTRL, 0x81);
+				
+				// i.	AFE_XTAL_CTRL 0x24[15:0] = 0x880F		//gated AFE DIG_CLOCK
+				PlatformEFIOWrite2Byte(Adapter, REG_AFE_XTAL_CTRL, 0x800F);
+				delay_ms(1);
+				
+				// 1. Enable MAC Clock. Can not be enabled now.
+				//WriteXBYTE(REG_SYS_CLKR+1, ReadXBYTE(REG_SYS_CLKR+1) | BIT(3));
+				
+				// 2. Force PWM, Enable SPS18_LDO_Marco_Block
+				PlatformEFIOWrite1Byte(Adapter, REG_SPS0_CTRL, 
+				PlatformEFIORead1Byte(Adapter, REG_SPS0_CTRL) | (BIT0|BIT3));
+
+				// 3. restore BB, AFE control register.
+				//RF
+				if (pHalData->rf_type ==  RF_2T2R)
+					PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x380038, 1);							
+				else								
+					PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x38, 1);							
+				PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf0, 1);
+				PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT1, 0);
+
+				//AFE
+				if (pHalData->rf_type ==  RF_2T2R)
+					PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x63DB25A0 );
+				else if (pHalData->rf_type ==  RF_1T1R)
+					PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x631B25A0 );
+
+				// 4. issue 3-wire command that RF set to Rx idle mode. This is used to re-write the RX idle mode.
+				// We can only prvide a usual value instead and then HW will modify the value by itself.
+				PHY_SetRFReg(Adapter,RF90_PATH_A, 0, bRFRegOffsetMask,0x32D95);
+				if (pHalData->rf_type ==  RF_2T2R)
+				{
+					PHY_SetRFReg(Adapter,RF90_PATH_B, 0, bRFRegOffsetMask,0x32D95);
+				}
+
+				// 5. gated MAC Clock
+				//WriteXBYTE(REG_SYS_CLKR+1, ReadXBYTE(REG_SYS_CLKR+1) & ~(BIT(3)));
+				//PlatformEFIOWrite1Byte(Adapter, REG_SYS_CLKR+1, PlatformEFIORead1Byte(Adapter, REG_SYS_CLKR+1)|(BIT3));
+
+				{
+					//u1Byte 			eRFPath = RF90_PATH_A,value8 = 0, retry = 0;
+					u1Byte		bytetmp;
+					//PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, 0x0, bMaskByte0, 0x0);
+					// 2010/08/12 MH Add for B path under SS test. 
+					//if (pHalData->RF_Type ==  RF_2T2R)
+						//PHY_SetRFReg(Adapter, RF90_PATH_B, 0x0, bMaskByte0, 0x0);
+
+					bytetmp = PlatformEFIORead1Byte(Adapter, REG_APSD_CTRL);
+					PlatformEFIOWrite1Byte(Adapter, REG_APSD_CTRL, bytetmp & ~BIT6);
+				
+					delay_ms(10);
+
+					// Set BB reset at first
+					PlatformEFIOWrite1Byte(Adapter, REG_SYS_FUNC_EN, 0x17 );//0x16		
+
+					// Enable TX
+					PlatformEFIOWrite1Byte(Adapter, REG_TXPAUSE, 0x0);
+				}
+				//Adapter->HalFunc.InitializeAdapterHandler(Adapter, Adapter->MgntInfo.dot11CurrentChannelNumber);
+				//CardSelectiveSuspendLeave(Adapter);
+			}
+
+			break;
+	   
+		case rf_sleep:
+		case rf_off:
+				value8 = PlatformEFIORead1Byte(Adapter, REG_SPS0_CTRL) ;
+				if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID))
+					value8 &= ~(BIT0);
+				else
+					value8 &= ~(BIT0|BIT3);
+				if (bRegSSPwrLvl == 1)
+				{
+					RT_TRACE(COMP_POWER, DBG_LOUD, ("SS LVL1\n"));
+					// Disable RF and BB only for SelectSuspend.
+					
+					// 1. Set BB/RF to shutdown.
+					//	(1) Reg878[5:3]= 0 	// RF rx_code for preamble power saving
+					//	(2)Reg878[21:19]= 0	//Turn off RF-B
+					//	(3) RegC04[7:4]= 0 	// turn off all paths for packet detection
+					//	(4) Reg800[1] = 1 		// enable preamble power saving
+					Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF0] = PHY_QueryBBReg(Adapter, rFPGA0_XAB_RFParameter, bMaskDWord);
+					Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF1] = PHY_QueryBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskDWord);
+					Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF2] = PHY_QueryBBReg(Adapter, rFPGA0_RFMOD, bMaskDWord);
+					if (pHalData->rf_type ==  RF_2T2R)
+					{
+						PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x380038, 0);							
+					}
+					else if (pHalData->rf_type ==  RF_1T1R)
+					{
+						PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x38, 0);							
+					}
+					PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf0, 0);						
+					PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT1,1);
+					
+					// 2 .AFE control register to power down. bit[30:22]
+					Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_AFE0] = PHY_QueryBBReg(Adapter, rRx_Wait_CCA, bMaskDWord);	
+					if (pHalData->rf_type ==  RF_2T2R)
+						PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x00DB25A0);
+					else if (pHalData->rf_type ==  RF_1T1R)
+						PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x001B25A0);
+					
+					// 3. issue 3-wire command that RF set to power down.
+					PHY_SetRFReg(Adapter,RF90_PATH_A, 0, bRFRegOffsetMask,0);
+					if (pHalData->rf_type ==  RF_2T2R)
+					{
+						PHY_SetRFReg(Adapter,RF90_PATH_B, 0, bRFRegOffsetMask,0);
+					}
+
+					// 4. Force PFM , disable SPS18_LDO_Marco_Block					
+					PlatformEFIOWrite1Byte(Adapter, REG_SPS0_CTRL, value8);
+
+					// 5. gated MAC Clock
+					//WriteXBYTE(REG_SYS_CLKR+1, ReadXBYTE(REG_SYS_CLKR+1) & ~(BIT(3)));
+				}
+				else	// Level 2 or others.
+				{
+					RT_TRACE(COMP_POWER, DBG_LOUD, ("SS LVL2\n"));
+					{
+						u1Byte 			eRFPath = RF90_PATH_A,value8 = 0;
+						PlatformEFIOWrite1Byte(Adapter, REG_TXPAUSE, 0xFF);
+						PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, 0x0, bMaskByte0, 0x0);
+						// 2010/08/12 MH Add for B path under SS test. 
+						//if (pHalData->RF_Type ==  RF_2T2R)
+							//PHY_SetRFReg(Adapter, RF90_PATH_B, 0x0, bMaskByte0, 0x0);
+
+						value8 |= APSDOFF;
+						PlatformEFIOWrite1Byte(Adapter, REG_APSD_CTRL, value8);//0x40
+
+						// After switch APSD, we need to delay for stability
+						delay_ms(10);
+
+						// Set BB reset at first
+						value8 = 0 ; 
+						value8 |=( FEN_USBD | FEN_USBA | FEN_BB_GLB_RSTn);
+						PlatformEFIOWrite1Byte(Adapter, REG_SYS_FUNC_EN,value8 );//0x16			
+					}
+
+					// Disable RF and BB only for SelectSuspend.
+
+					// 1. Set BB/RF to shutdown.
+					//	(1) Reg878[5:3]= 0 	// RF rx_code for preamble power saving
+					//	(2)Reg878[21:19]= 0	//Turn off RF-B
+					//	(3) RegC04[7:4]= 0 	// turn off all paths for packet detection
+					//	(4) Reg800[1] = 1 		// enable preamble power saving
+					Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF0] = PHY_QueryBBReg(Adapter, rFPGA0_XAB_RFParameter, bMaskDWord);
+					Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF1] = PHY_QueryBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskDWord);
+					Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF2] = PHY_QueryBBReg(Adapter, rFPGA0_RFMOD, bMaskDWord);
+					if (pHalData->rf_type ==  RF_2T2R)
+					{
+						PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x380038, 0);							
+					}
+					else if (pHalData->rf_type ==  RF_1T1R)
+					{
+						PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x38, 0);							
+					}
+					PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf0, 0);						
+					PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT1,1);
+					
+					// 2 .AFE control register to power down. bit[30:22]
+					Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_AFE0] = PHY_QueryBBReg(Adapter, rRx_Wait_CCA, bMaskDWord);	
+					if (pHalData->rf_type ==  RF_2T2R)
+						PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x00DB25A0);
+					else if (pHalData->rf_type ==  RF_1T1R)
+						PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x001B25A0);
+					
+					// 3. issue 3-wire command that RF set to power down.
+					PHY_SetRFReg(Adapter,RF90_PATH_A, 0, bRFRegOffsetMask,0);
+					if (pHalData->rf_type ==  RF_2T2R)
+					{
+						PHY_SetRFReg(Adapter,RF90_PATH_B, 0, bRFRegOffsetMask,0);
+					}
+
+					// 4. Force PFM , disable SPS18_LDO_Marco_Block
+					PlatformEFIOWrite1Byte(Adapter, REG_SPS0_CTRL, value8);
+
+					// 2010/10/13 MH/Isaachsu exchange sequence.
+					//h.	AFE_PLL_CTRL 0x28[7:0] = 0x80			//disable AFE PLL
+					PlatformEFIOWrite1Byte(Adapter, REG_AFE_PLL_CTRL, 0x80);
+					delay_ms(1);
+
+					// i.	AFE_XTAL_CTRL 0x24[15:0] = 0x880F		//gated AFE DIG_CLOCK
+					PlatformEFIOWrite2Byte(Adapter, REG_AFE_XTAL_CTRL, 0xA80F);
+
+					// 5. gated MAC Clock
+					//WriteXBYTE(REG_SYS_CLKR+1, ReadXBYTE(REG_SYS_CLKR+1) & ~(BIT(3)));
+					//PlatformEFIOWrite1Byte(Adapter, REG_SYS_CLKR+1, PlatformEFIORead1Byte(Adapter, REG_SYS_CLKR+1)& ~(BIT3))
+					
+					//CardSelectiveSuspendEnter(Adapter);
+				}
+
+			break;
+
+		default:
+			break;
+	} 
+	
+}	// phy_PowerSwitch92CU
+
+void _ps_open_RF(_adapter *padapter) {
+	//here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified
+	phy_SsPwrSwitch92CU(padapter, rf_on, 1);
+}
+
+void _ps_close_RF(_adapter *padapter){
+	//here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified
+	phy_SsPwrSwitch92CU(padapter, rf_off, 1);
+}
+#endif //SYNC_SD7_20110802_phy_SsPwrSwitch92CU
+
+
+
+static VOID 
+_DisableGPIO(
+	IN	PADAPTER	Adapter
+	)
+{
+/***************************************
+j. GPIO_PIN_CTRL 0x44[31:0]=0x000		// 
+k. Value = GPIO_PIN_CTRL[7:0]
+l.  GPIO_PIN_CTRL 0x44[31:0] = 0x00FF0000 | (value <<8); //write external PIN level
+m. GPIO_MUXCFG 0x42 [15:0] = 0x0780
+n. LEDCFG 0x4C[15:0] = 0x8080
+***************************************/
+	u8	value8;
+	u16	value16;
+	u32	value32;
+
+	//1. Disable GPIO[7:0]
+	rtw_write16(Adapter, REG_GPIO_PIN_CTRL+2, 0x0000);
+    	value32 = rtw_read32(Adapter, REG_GPIO_PIN_CTRL) & 0xFFFF00FF;  
+	value8 = (u8) (value32&0x000000FF);
+	value32 |= ((value8<<8) | 0x00FF0000);
+	rtw_write32(Adapter, REG_GPIO_PIN_CTRL, value32);
+	      
+	//2. Disable GPIO[10:8]          
+	rtw_write8(Adapter, REG_GPIO_MUXCFG+3, 0x00);
+	    value16 = rtw_read16(Adapter, REG_GPIO_MUXCFG+2) & 0xFF0F;  
+	value8 = (u8) (value16&0x000F);
+	value16 |= ((value8<<4) | 0x0780);
+	rtw_write16(Adapter, REG_GPIO_MUXCFG+2, value16);
+
+	//3. Disable LED0 & 1
+	rtw_write16(Adapter, REG_LEDCFG0, 0x8080);
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Disable GPIO and LED.\n"));
+ 
+} //end of _DisableGPIO()
+
+static VOID
+_ResetFWDownloadRegister(
+	IN PADAPTER			Adapter
+	)
+{
+	u32	value32;
+
+	value32 = rtw_read32(Adapter, REG_MCUFWDL);
+	value32 &= ~(MCUFWDL_EN | MCUFWDL_RDY);
+	rtw_write32(Adapter, REG_MCUFWDL, value32);
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Reset FW download register.\n"));
+}
+
+
+static int
+_DisableRF_AFE(
+	IN PADAPTER			Adapter
+	)
+{
+	int		rtStatus = _SUCCESS;
+	u32			pollingCount = 0;
+	u8			value8;
+	
+	//disable RF/ AFE AD/DA
+	value8 = APSDOFF;
+	rtw_write8(Adapter, REG_APSD_CTRL, value8);
+
+
+#if (RTL8192CU_ASIC_VERIFICATION)
+
+	do
+	{
+		if(rtw_read8(Adapter, REG_APSD_CTRL) & APSDOFF_STATUS){
+			//RT_TRACE(COMP_INIT, DBG_LOUD, ("Disable RF, AFE, AD, DA Done!\n"));
+			break;
+		}
+
+		if(pollingCount++ > POLLING_READY_TIMEOUT_COUNT){
+			//RT_TRACE(COMP_INIT, DBG_SERIOUS, ("Failed to polling APSDOFF_STATUS done!\n"));
+			return _FAIL;
+		}
+				
+	}while(_TRUE);
+	
+#endif
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Disable RF, AFE,AD, DA.\n"));
+	return rtStatus;
+
+}
+
+static VOID
+_ResetBB(
+	IN PADAPTER			Adapter
+	)
+{
+	u16	value16;
+
+	//reset BB
+	value16 = rtw_read16(Adapter, REG_SYS_FUNC_EN);
+	value16 &= ~(FEN_BBRSTB | FEN_BB_GLB_RSTn);
+	rtw_write16(Adapter, REG_SYS_FUNC_EN, value16);
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Reset BB.\n"));
+}
+
+static VOID
+_ResetMCU(
+	IN PADAPTER			Adapter
+	)
+{
+	u16	value16;
+	
+	// reset MCU
+	value16 = rtw_read16(Adapter, REG_SYS_FUNC_EN);
+	value16 &= ~FEN_CPUEN;
+	rtw_write16(Adapter, REG_SYS_FUNC_EN, value16);
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Reset MCU.\n"));
+}
+
+static VOID
+_DisableMAC_AFE_PLL(
+	IN PADAPTER			Adapter
+	)
+{
+	u32	value32;
+	
+	//disable MAC/ AFE PLL
+	value32 = rtw_read32(Adapter, REG_APS_FSMCO);
+	value32 |= APDM_MAC;
+	rtw_write32(Adapter, REG_APS_FSMCO, value32);
+	
+	value32 |= APFM_OFF;
+	rtw_write32(Adapter, REG_APS_FSMCO, value32);
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Disable MAC, AFE PLL.\n"));
+}
+
+static VOID
+_AutoPowerDownToHostOff(
+	IN	PADAPTER		Adapter
+	)
+{
+	u32			value32;
+	rtw_write8(Adapter, REG_SPS0_CTRL, 0x22);
+
+	value32 = rtw_read32(Adapter, REG_APS_FSMCO);	
+	
+	value32 |= APDM_HOST;//card disable
+	rtw_write32(Adapter, REG_APS_FSMCO, value32);
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Auto Power Down to Host-off state.\n"));
+
+	// set USB suspend
+	value32 = rtw_read32(Adapter, REG_APS_FSMCO);
+	value32 &= ~AFSM_PCIE;
+	rtw_write32(Adapter, REG_APS_FSMCO, value32);
+
+}
+
+static VOID
+_SetUsbSuspend(
+	IN PADAPTER			Adapter
+	)
+{
+	u32			value32;
+
+	value32 = rtw_read32(Adapter, REG_APS_FSMCO);
+	
+	// set USB suspend
+	value32 |= AFSM_HSUS;
+	rtw_write32(Adapter, REG_APS_FSMCO, value32);
+
+	//RT_ASSERT(0 == (rtw_read32(Adapter, REG_APS_FSMCO) & BIT(12)),(""));
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Set USB suspend.\n"));
+	
+}
+
+static VOID
+_DisableRFAFEAndResetBB(
+	IN PADAPTER			Adapter
+	)
+{
+/**************************************
+a.	TXPAUSE 0x522[7:0] = 0xFF             //Pause MAC TX queue
+b.	RF path 0 offset 0x00 = 0x00            // disable RF
+c. 	APSD_CTRL 0x600[7:0] = 0x40
+d.	SYS_FUNC_EN 0x02[7:0] = 0x16		//reset BB state machine
+e.	SYS_FUNC_EN 0x02[7:0] = 0x14		//reset BB state machine
+***************************************/
+	u8 eRFPath = 0,value8 = 0;
+	rtw_write8(Adapter, REG_TXPAUSE, 0xFF);
+	PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, 0x0, bMaskByte0, 0x0);
+
+	value8 |= APSDOFF;
+	rtw_write8(Adapter, REG_APSD_CTRL, value8);//0x40
+	
+	value8 = 0 ; 
+	value8 |=( FEN_USBD | FEN_USBA | FEN_BB_GLB_RSTn);
+	rtw_write8(Adapter, REG_SYS_FUNC_EN,value8 );//0x16		
+	
+	value8 &=( ~FEN_BB_GLB_RSTn );
+	rtw_write8(Adapter, REG_SYS_FUNC_EN, value8); //0x14		
+	
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("======> RF off and reset BB.\n"));
+}
+
+static VOID
+_ResetDigitalProcedure1(
+	IN 	PADAPTER			Adapter,
+	IN	BOOLEAN				bWithoutHWSM	
+	)
+{
+
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
+
+	if(pHalData->FirmwareVersion <=  0x20){
+		#if 0
+		/*****************************
+		f.	SYS_FUNC_EN 0x03[7:0]=0x54		// reset MAC register, DCORE
+		g.	MCUFWDL 0x80[7:0]=0				// reset MCU ready status
+		******************************/
+		u4Byte	value32 = 0;
+		PlatformIOWrite1Byte(Adapter, REG_SYS_FUNC_EN+1, 0x54);
+		PlatformIOWrite1Byte(Adapter, REG_MCUFWDL, 0);	
+		#else
+		/*****************************
+		f.	MCUFWDL 0x80[7:0]=0				// reset MCU ready status
+		g.	SYS_FUNC_EN 0x02[10]= 0			// reset MCU register, (8051 reset)
+		h.	SYS_FUNC_EN 0x02[15-12]= 5		// reset MAC register, DCORE
+		i.     SYS_FUNC_EN 0x02[10]= 1			// enable MCU register, (8051 enable)
+		******************************/
+			u16 valu16 = 0;
+			rtw_write8(Adapter, REG_MCUFWDL, 0);
+
+			valu16 = rtw_read16(Adapter, REG_SYS_FUNC_EN);	
+			rtw_write16(Adapter, REG_SYS_FUNC_EN, (valu16 & (~FEN_CPUEN)));//reset MCU ,8051
+
+			valu16 = rtw_read16(Adapter, REG_SYS_FUNC_EN)&0x0FFF;	
+			rtw_write16(Adapter, REG_SYS_FUNC_EN, (valu16 |(FEN_HWPDN|FEN_ELDR)));//reset MAC
+			
+			#ifdef DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE
+			{
+				u8 val;
+				if( (val=rtw_read8(Adapter, REG_MCUFWDL)))
+					DBG_871X("DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE %s:%d REG_MCUFWDL:0x%02x\n", __FUNCTION__, __LINE__, val);
+			}
+			#endif
+
+			
+			valu16 = rtw_read16(Adapter, REG_SYS_FUNC_EN);	
+			rtw_write16(Adapter, REG_SYS_FUNC_EN, (valu16 | FEN_CPUEN));//enable MCU ,8051	
+
+		
+		#endif
+	}
+	else{
+		u8 retry_cnts = 0;	
+		
+		if(rtw_read8(Adapter, REG_MCUFWDL) & BIT1)
+		{ //IF fw in RAM code, do reset 
+
+			rtw_write8(Adapter, REG_MCUFWDL, 0);
+			if(Adapter->bFWReady){
+				// 2010/08/25 MH Accordign to RD alfred's suggestion, we need to disable other
+				// HRCV INT to influence 8051 reset.
+				rtw_write8(Adapter, REG_FWIMR, 0x20);
+				
+				rtw_write8(Adapter, REG_HMETFR+3, 0x20);//8051 reset by self
+
+				while( (retry_cnts++ <100) && (FEN_CPUEN &rtw_read16(Adapter, REG_SYS_FUNC_EN)))
+				{					
+					rtw_udelay_os(50);//PlatformStallExecution(50);//us
+				}
+
+				if(retry_cnts >= 100){
+					DBG_8192C("%s #####=> 8051 reset failed!.........................\n", __FUNCTION__);
+					// if 8051 reset fail we trigger GPIO 0 for LA
+					//PlatformEFIOWrite4Byte(	Adapter, 
+					//						REG_GPIO_PIN_CTRL, 
+					//						0x00010100);
+					// 2010/08/31 MH According to Filen's info, if 8051 reset fail, reset MAC directly.
+					rtw_write8(Adapter, REG_SYS_FUNC_EN+1, 0x50);	//Reset MAC and Enable 8051
+					rtw_mdelay_os(10);
+				}
+				else {
+					//DBG_871X("%s =====> 8051 reset success (%d) .\n", __FUNCTION__, retry_cnts);
+				}
+			}
+			else {
+				DBG_871X("%s =====> 8051 in RAM but !Adapter->bFWReady\n", __FUNCTION__);	
+			}
+		}
+		else{
+			//DBG_871X("%s =====> 8051 in ROM.\n", __FUNCTION__);
+		}	
+		
+		#ifdef DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE
+		{
+			u8 val;
+			if( (val=rtw_read8(Adapter, REG_MCUFWDL)))
+				DBG_871X("DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE %s:%d REG_MCUFWDL:0x%02x\n", __FUNCTION__, __LINE__, val);
+		}
+		#endif
+		
+		rtw_write8(Adapter, REG_SYS_FUNC_EN+1, 0x54);	//Reset MAC and Enable 8051
+	}
+
+	// Clear rpwm value for initial toggle bit trigger.
+	rtw_write8(Adapter, REG_USB_HRPWM, 0x00);
+
+	if(bWithoutHWSM){
+	/*****************************
+		Without HW auto state machine
+	g.	SYS_CLKR 0x08[15:0] = 0x30A3			//disable MAC clock
+	h.	AFE_PLL_CTRL 0x28[7:0] = 0x80			//disable AFE PLL
+	i.	AFE_XTAL_CTRL 0x24[15:0] = 0x880F		//gated AFE DIG_CLOCK
+	j.	SYS_ISO_CTRL 0x00[7:0] = 0xF9			// isolated digital to PON
+	******************************/	
+		//rtw_write16(Adapter, REG_SYS_CLKR, 0x30A3);
+		rtw_write16(Adapter, REG_SYS_CLKR, 0x70A3);//modify to 0x70A3 by Scott.
+		rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x80);		
+		rtw_write16(Adapter, REG_AFE_XTAL_CTRL, 0x880F);
+		rtw_write8(Adapter, REG_SYS_ISO_CTRL, 0xF9);		
+	}
+	else
+	{		
+		// Disable all RF/BB power 
+		rtw_write8(Adapter, REG_RF_CTRL, 0x00);
+	}
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Reset Digital.\n"));
+
+}
+
+static VOID
+_ResetDigitalProcedure2(
+	IN 	PADAPTER			Adapter
+)
+{
+/*****************************
+k.	SYS_FUNC_EN 0x03[7:0] = 0x44			// disable ELDR runction
+l.	SYS_CLKR 0x08[15:0] = 0x3083			// disable ELDR clock
+m.	SYS_ISO_CTRL 0x01[7:0] = 0x83			// isolated ELDR to PON
+******************************/
+	//rtw_write8(Adapter, REG_SYS_FUNC_EN+1, 0x44);//marked by Scott.
+	//rtw_write16(Adapter, REG_SYS_CLKR, 0x3083);
+	//rtw_write8(Adapter, REG_SYS_ISO_CTRL+1, 0x83);
+
+ 	rtw_write16(Adapter, REG_SYS_CLKR, 0x70a3); //modify to 0x70a3 by Scott.
+ 	rtw_write8(Adapter, REG_SYS_ISO_CTRL+1, 0x82); //modify to 0x82 by Scott.
+}
+
+static VOID
+_DisableAnalog(
+	IN PADAPTER			Adapter,
+	IN BOOLEAN			bWithoutHWSM	
+	)
+{
+	u16 value16 = 0;
+	u8 value8=0;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	
+	if(bWithoutHWSM){
+	/*****************************
+	n.	LDOA15_CTRL 0x20[7:0] = 0x04		// disable A15 power
+	o.	LDOV12D_CTRL 0x21[7:0] = 0x54		// disable digital core power
+	r.	When driver call disable, the ASIC will turn off remaining clock automatically 
+	******************************/
+	
+		rtw_write8(Adapter, REG_LDOA15_CTRL, 0x04);
+		//PlatformIOWrite1Byte(Adapter, REG_LDOV12D_CTRL, 0x54);		
+		
+		value8 = rtw_read8(Adapter, REG_LDOV12D_CTRL);		
+		value8 &= (~LDV12_EN);
+		rtw_write8(Adapter, REG_LDOV12D_CTRL, value8);	
+		//RT_TRACE(COMP_INIT, DBG_LOUD, (" REG_LDOV12D_CTRL Reg0x21:0x%02x.\n",value8));
+	}
+	
+/*****************************
+h.	SPS0_CTRL 0x11[7:0] = 0x23			//enter PFM mode
+i.	APS_FSMCO 0x04[15:0] = 0x4802		// set USB suspend 
+******************************/	
+
+
+	value8 = 0x23;
+	if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID))
+		value8 |= BIT3;
+
+	rtw_write8(Adapter, REG_SPS0_CTRL, value8);
+
+
+	if(bWithoutHWSM)
+	{			
+		//value16 |= (APDM_HOST | /*AFSM_HSUS |*/PFM_ALDN);
+		// 2010/08/31 According to Filen description, we need to use HW to shut down 8051 automatically.
+		// Becasue suspend operatione need the asistance of 8051 to wait for 3ms.
+		value16 |= (APDM_HOST | AFSM_HSUS |PFM_ALDN);
+	}
+	else
+	{			
+		value16 |= (APDM_HOST | AFSM_HSUS |PFM_ALDN);
+	}
+
+	rtw_write16(Adapter, REG_APS_FSMCO,value16 );//0x4802 
+
+	rtw_write8(Adapter, REG_RSV_CTRL, 0x0e);
+
+ #if 0
+ 	//tynli_test for suspend mode.
+	if(!bWithoutHWSM){
+ 		rtw_write8(Adapter, 0xfe10, 0x19);
+	} 
+#endif
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Disable Analog Reg0x04:0x%04x.\n",value16));
+}
+
+static int	
+CardDisableHWSM( // HW Auto state machine
+	IN	PADAPTER		Adapter,
+	IN	BOOLEAN			resetMCU
+	)
+{
+	int		rtStatus = _SUCCESS;
+	if(Adapter->bSurpriseRemoved){
+		return rtStatus;
+	}
+#if 1
+	//==== RF Off Sequence ====
+	_DisableRFAFEAndResetBB(Adapter);
+
+	//  ==== Reset digital sequence   ======
+	_ResetDigitalProcedure1(Adapter, _FALSE);
+	
+	//  ==== Pull GPIO PIN to balance level and LED control ======
+	_DisableGPIO(Adapter);
+
+	//  ==== Disable analog sequence ===
+	_DisableAnalog(Adapter, _FALSE);
+
+	RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("======> Card disable finished.\n"));
+#else
+	_DisableGPIO(Adapter);
+	
+	//reset FW download register
+	_ResetFWDownloadRegister(Adapter);
+
+
+	//disable RF/ AFE AD/DA
+	rtStatus = _DisableRF_AFE(Adapter);
+	if(RT_STATUS_SUCCESS != rtStatus){
+		RT_TRACE(COMP_INIT, DBG_SERIOUS, ("_DisableRF_AFE failed!\n"));
+		goto Exit;
+	}
+	_ResetBB(Adapter);
+
+	if(resetMCU){
+		_ResetMCU(Adapter);
+	}
+
+	_AutoPowerDownToHostOff(Adapter);
+	//_DisableMAC_AFE_PLL(Adapter);
+	
+	_SetUsbSuspend(Adapter);
+Exit:
+#endif
+	return rtStatus;
+	
+}
+
+static int	
+CardDisableWithoutHWSM( // without HW Auto state machine
+	IN	PADAPTER		Adapter	
+	)
+{
+	int		rtStatus = _SUCCESS;
+
+	if(Adapter->bSurpriseRemoved){
+		return rtStatus;
+	}
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Card Disable Without HWSM .\n"));
+	//==== RF Off Sequence ====
+	_DisableRFAFEAndResetBB(Adapter);
+
+	//  ==== Reset digital sequence   ======
+	_ResetDigitalProcedure1(Adapter, _TRUE);
+
+	//  ==== Pull GPIO PIN to balance level and LED control ======
+	_DisableGPIO(Adapter);
+
+	//  ==== Reset digital sequence   ======
+	_ResetDigitalProcedure2(Adapter);
+
+	//  ==== Disable analog sequence ===
+	_DisableAnalog(Adapter, _TRUE);
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("<====== Card Disable Without HWSM .\n"));
+	return rtStatus;
+}
+
+static void rtl8192cu_hw_power_down(_adapter *padapter)
+{
+	// 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c.
+	// Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1.
+		
+	// Enable register area 0x0-0xc.
+	rtw_write8(padapter,REG_RSV_CTRL, 0x0);			
+	rtw_write16(padapter, REG_APS_FSMCO, 0x8812);
+}
+
+u32 rtl8192cu_hal_deinit(PADAPTER Adapter)
+ {
+
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+   	DBG_8192C("==> %s \n",__FUNCTION__);
+	// 2011/02/18 To Fix RU LNA  power leakage problem. We need to execute below below in
+	// Adapter init and halt sequence. Accordingto EEchou's opinion, we can enable the ability for all
+	// IC. Accord to johnny's opinion, only RU need the support.
+	if (IS_HARDWARE_TYPE_8192C(Adapter)  && (pHalData->BoardType == BOARD_USB_High_PA))
+		rtw_write32(Adapter, rFPGA0_XCD_RFParameter, rtw_read32(Adapter, rFPGA0_XCD_RFParameter)|BIT1);
+
+ #ifdef SUPPORT_HW_RFOFF_DETECTED
+ 	DBG_8192C("bkeepfwalive(%x)\n",Adapter->pwrctrlpriv.bkeepfwalive);
+ 	if(Adapter->pwrctrlpriv.bkeepfwalive)
+ 	{
+		_ps_close_RF(Adapter);		
+		if((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown))		
+			rtl8192cu_hw_power_down(Adapter);
+ 	}
+	else
+#endif
+	{
+		if( Adapter->bCardDisableWOHSM == _FALSE)
+		{
+			DBG_8192C("card disble HWSM...........\n");
+			CardDisableHWSM(Adapter, _FALSE);
+		}
+		else
+		{
+			DBG_8192C("card disble without HWSM...........\n");
+			CardDisableWithoutHWSM(Adapter); // without HW Auto state machine		
+
+			if((Adapter->pwrctrlpriv.bHWPwrPindetect ) && (Adapter->pwrctrlpriv.bHWPowerdown))		
+				rtl8192cu_hw_power_down(Adapter);
+		}
+	}
+	
+	return _SUCCESS;
+ }
+
+
+unsigned int rtl8192cu_inirp_init(PADAPTER Adapter)
+{	
+	u8 i;	
+	struct recv_buf *precvbuf;
+	uint	status;
+	struct dvobj_priv *pdev=&Adapter->dvobjpriv;
+	struct intf_hdl * pintfhdl=&Adapter->iopriv.intf;
+	struct recv_priv *precvpriv = &(Adapter->recvpriv);
+	u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
+	u32 (*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr);
+#endif
+
+_func_enter_;
+
+	_read_port = pintfhdl->io_ops._read_port;
+
+	status = _SUCCESS;
+
+	RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("===> usb_inirp_init \n"));	
+		
+	precvpriv->ff_hwaddr = RECV_BULK_IN_ADDR;
+
+	//issue Rx irp to receive data	
+	precvbuf = (struct recv_buf *)precvpriv->precv_buf;	
+	for(i=0; i<NR_RECVBUFF; i++)
+	{
+		if(_read_port(pintfhdl, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf) == _FALSE )
+		{
+			RT_TRACE(_module_hci_hal_init_c_,_drv_err_,("usb_rx_init: usb_read_port error \n"));
+			status = _FAIL;
+			goto exit;
+		}
+		
+		precvbuf++;		
+		precvpriv->free_recv_buf_queue_cnt--;
+	}
+
+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
+	_read_interrupt = pintfhdl->io_ops._read_interrupt;
+	if(_read_interrupt(pintfhdl, RECV_INT_IN_ADDR) == _FALSE )
+	{
+		RT_TRACE(_module_hci_hal_init_c_,_drv_err_,("usb_rx_init: usb_read_interrupt error \n"));
+		status = _FAIL;
+	}
+#endif
+
+exit:
+	
+	RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("<=== usb_inirp_init \n"));
+
+_func_exit_;
+
+	return status;
+
+}
+
+unsigned int rtl8192cu_inirp_deinit(PADAPTER Adapter)
+{	
+	RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("\n ===> usb_rx_deinit \n"));
+	
+	rtw_read_port_cancel(Adapter);
+
+	RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("\n <=== usb_rx_deinit \n"));
+
+	return _SUCCESS;
+}
+
+//-------------------------------------------------------------------------
+//
+//	Channel Plan
+//
+//-------------------------------------------------------------------------
+
+static VOID
+ReadChannelPlan(
+	IN	PADAPTER 		Adapter,
+	IN	u8*			PROMContent,
+	IN	BOOLEAN			AutoLoadFail
+	)
+{
+
+#define EEPROM_TEST_CHANNEL_PLAN	 (0x7D)
+#define EEPROM_NORMAL_CHANNEL_PLAN (0x75)
+
+	struct mlme_priv	*pmlmepriv = &(Adapter->mlmepriv);
+	struct registry_priv *pregistrypriv = &Adapter->registrypriv;
+	u8			channelPlan;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	if(AutoLoadFail){
+		channelPlan = CHPL_FCC;
+	}
+	else{
+		if(IS_NORMAL_CHIP(pHalData->VersionID))
+		 	channelPlan = PROMContent[EEPROM_NORMAL_CHANNEL_PLAN];
+		else
+			channelPlan = PROMContent[EEPROM_TEST_CHANNEL_PLAN];
+	}
+
+	if((pregistrypriv->channel_plan>= RT_CHANNEL_DOMAIN_MAX) || (channelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK))
+	{
+		pmlmepriv->ChannelPlan = _HalMapChannelPlan8192C(Adapter, (channelPlan & (~(EEPROM_CHANNEL_PLAN_BY_HW_MASK))));
+		//pMgntInfo->bChnlPlanFromHW = (channelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK) ? _TRUE : _FALSE; // User cannot change  channel plan.
+	}
+	else
+	{
+		pmlmepriv->ChannelPlan = (RT_CHANNEL_DOMAIN)pregistrypriv->channel_plan;
+	}
+
+#if 0 //todo:
+	switch(pMgntInfo->ChannelPlan)
+	{
+		case RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN:
+		{
+			PRT_DOT11D_INFO	pDot11dInfo = GET_DOT11D_INFO(pMgntInfo);
+	
+			pDot11dInfo->bEnabled = _TRUE;
+		}
+		//RT_TRACE(COMP_INIT, DBG_LOUD, ("Enable dot11d when RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN!\n"));
+		break;
+	}
+#endif
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("RegChannelPlan(%d) EEPROMChannelPlan(%ld)", pMgntInfo->RegChannelPlan, (u4Byte)channelPlan));
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("ChannelPlan = %d\n" , pMgntInfo->ChannelPlan));
+
+	MSG_8192C("RT_ChannelPlan: 0x%02x\n", pmlmepriv->ChannelPlan);
+
+}
+
+
+//-------------------------------------------------------------------------
+//
+//	EEPROM Power index mapping
+//
+//-------------------------------------------------------------------------
+
+ static VOID
+_ReadPowerValueFromPROM(
+	IN	PTxPowerInfo	pwrInfo,
+	IN	u8*			PROMContent,
+	IN	BOOLEAN			AutoLoadFail
+	)
+{
+	u32 rfPath, eeAddr, group;
+
+	_rtw_memset(pwrInfo, 0, sizeof(TxPowerInfo));
+
+	if(AutoLoadFail){		
+		for(group = 0 ; group < CHANNEL_GROUP_MAX ; group++){
+			for(rfPath = 0 ; rfPath < RF90_PATH_MAX ; rfPath++){
+				pwrInfo->CCKIndex[rfPath][group]		= EEPROM_Default_TxPowerLevel;	
+				pwrInfo->HT40_1SIndex[rfPath][group]	= EEPROM_Default_TxPowerLevel;
+				pwrInfo->HT40_2SIndexDiff[rfPath][group]= EEPROM_Default_HT40_2SDiff;
+				pwrInfo->HT20IndexDiff[rfPath][group]	= EEPROM_Default_HT20_Diff;
+				pwrInfo->OFDMIndexDiff[rfPath][group]	= EEPROM_Default_LegacyHTTxPowerDiff;
+				pwrInfo->HT40MaxOffset[rfPath][group]	= EEPROM_Default_HT40_PwrMaxOffset;		
+				pwrInfo->HT20MaxOffset[rfPath][group]	= EEPROM_Default_HT20_PwrMaxOffset;
+			}
+		}
+
+		pwrInfo->TSSI_A = EEPROM_Default_TSSI;
+		pwrInfo->TSSI_B = EEPROM_Default_TSSI;
+		
+		return;
+	}
+	
+	for(rfPath = 0 ; rfPath < RF90_PATH_MAX ; rfPath++){
+		for(group = 0 ; group < CHANNEL_GROUP_MAX ; group++){
+			eeAddr = EEPROM_CCK_TX_PWR_INX + (rfPath * 3) + group;
+			pwrInfo->CCKIndex[rfPath][group] = PROMContent[eeAddr];
+
+			eeAddr = EEPROM_HT40_1S_TX_PWR_INX + (rfPath * 3) + group;
+			pwrInfo->HT40_1SIndex[rfPath][group] = PROMContent[eeAddr];
+		}
+	}
+
+	for(group = 0 ; group < CHANNEL_GROUP_MAX ; group++){
+		for(rfPath = 0 ; rfPath < RF90_PATH_MAX ; rfPath++){
+			pwrInfo->HT40_2SIndexDiff[rfPath][group] = 
+			(PROMContent[EEPROM_HT40_2S_TX_PWR_INX_DIFF + group] >> (rfPath * 4)) & 0xF;
+
+#if 1
+			pwrInfo->HT20IndexDiff[rfPath][group] =
+			(PROMContent[EEPROM_HT20_TX_PWR_INX_DIFF + group] >> (rfPath * 4)) & 0xF;
+			if(pwrInfo->HT20IndexDiff[rfPath][group] & BIT3)	//4bit sign number to 8 bit sign number
+				pwrInfo->HT20IndexDiff[rfPath][group] |= 0xF0;
+#else
+			pwrInfo->HT20IndexDiff[rfPath][group] =
+			(PROMContent[EEPROM_HT20_TX_PWR_INX_DIFF + group] >> (rfPath * 4)) & 0xF;
+#endif
+
+			pwrInfo->OFDMIndexDiff[rfPath][group] =
+			(PROMContent[EEPROM_OFDM_TX_PWR_INX_DIFF+ group] >> (rfPath * 4)) & 0xF;
+
+			pwrInfo->HT40MaxOffset[rfPath][group] =
+			(PROMContent[EEPROM_HT40_MAX_PWR_OFFSET+ group] >> (rfPath * 4)) & 0xF;
+
+			pwrInfo->HT20MaxOffset[rfPath][group] =
+			(PROMContent[EEPROM_HT20_MAX_PWR_OFFSET+ group] >> (rfPath * 4)) & 0xF;
+		}
+	}
+
+	pwrInfo->TSSI_A = PROMContent[EEPROM_TSSI_A];
+	pwrInfo->TSSI_B = PROMContent[EEPROM_TSSI_B];
+
+}
+
+
+static u32
+_GetChannelGroup(
+	IN	u32	channel
+	)
+{
+	//RT_ASSERT((channel < 14), ("Channel %d no is supported!\n"));
+
+	if(channel < 3){ 	// Channel 1~3
+		return 0;
+	}
+	else if(channel < 9){ // Channel 4~9
+		return 1;
+	}
+
+	return 2;				// Channel 10~14	
+}
+
+
+static VOID
+ReadTxPowerInfo(
+	IN	PADAPTER 		Adapter,
+	IN	u8*			PROMContent,
+	IN	BOOLEAN			AutoLoadFail
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	TxPowerInfo		pwrInfo;
+	u32			rfPath, ch, group;
+	u8			pwr, diff;
+
+	_ReadPowerValueFromPROM(&pwrInfo, PROMContent, AutoLoadFail);
+
+	if(!AutoLoadFail)
+		pHalData->bTXPowerDataReadFromEEPORM = _TRUE;
+
+	for(rfPath = 0 ; rfPath < RF90_PATH_MAX ; rfPath++){
+		for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){
+			group = _GetChannelGroup(ch);
+
+			pHalData->TxPwrLevelCck[rfPath][ch]		= pwrInfo.CCKIndex[rfPath][group];
+			pHalData->TxPwrLevelHT40_1S[rfPath][ch]	= pwrInfo.HT40_1SIndex[rfPath][group];
+
+			pHalData->TxPwrHt20Diff[rfPath][ch]		= pwrInfo.HT20IndexDiff[rfPath][group];
+			pHalData->TxPwrLegacyHtDiff[rfPath][ch]	= pwrInfo.OFDMIndexDiff[rfPath][group];
+			pHalData->PwrGroupHT20[rfPath][ch]		= pwrInfo.HT20MaxOffset[rfPath][group];
+			pHalData->PwrGroupHT40[rfPath][ch]		= pwrInfo.HT40MaxOffset[rfPath][group];
+
+			pwr		= pwrInfo.HT40_1SIndex[rfPath][group];
+			diff	= pwrInfo.HT40_2SIndexDiff[rfPath][group];
+
+			pHalData->TxPwrLevelHT40_2S[rfPath][ch]  = (pwr > diff) ? (pwr - diff) : 0;
+		}
+	}
+
+#if DBG
+
+	for(rfPath = 0 ; rfPath < RF90_PATH_MAX ; rfPath++){
+		for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){
+			RTPRINT(FINIT, INIT_TxPower, 
+				("RF(%d)-Ch(%d) [CCK / HT40_1S / HT40_2S] = [0x%x / 0x%x / 0x%x]\n", 
+				rfPath, ch, pHalData->TxPwrLevelCck[rfPath][ch], 
+				pHalData->TxPwrLevelHT40_1S[rfPath][ch], 
+				pHalData->TxPwrLevelHT40_2S[rfPath][ch]));
+
+		}
+	}
+
+	for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){
+		RTPRINT(FINIT, INIT_TxPower, ("RF-A Ht20 to HT40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrHt20Diff[RF90_PATH_A][ch]));
+	}
+
+	for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){
+		RTPRINT(FINIT, INIT_TxPower, ("RF-A Legacy to Ht40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrLegacyHtDiff[RF90_PATH_A][ch]));
+	}
+	
+	for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){
+		RTPRINT(FINIT, INIT_TxPower, ("RF-B Ht20 to HT40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrHt20Diff[RF90_PATH_B][ch]));
+	}
+	
+	for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){
+		RTPRINT(FINIT, INIT_TxPower, ("RF-B Legacy to HT40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrLegacyHtDiff[RF90_PATH_B][ch]));
+	}
+	
+#endif
+	// 2010/10/19 MH Add Regulator recognize for CU.
+	if(!AutoLoadFail)
+	{
+		pHalData->EEPROMRegulatory = (PROMContent[RF_OPTION1]&0x7);	//bit0~2
+	}
+	else
+	{
+		pHalData->EEPROMRegulatory = 0;
+	}
+	DBG_8192C("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory);
+
+}
+
+
+//-------------------------------------------------------------------
+//
+//	EEPROM/EFUSE Content Parsing
+//
+//-------------------------------------------------------------------
+static void
+_ReadIDs(
+	IN	PADAPTER	Adapter,
+	IN	u8*		PROMContent,
+	IN	BOOLEAN		AutoloadFail
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	if(_FALSE == AutoloadFail){
+		// VID, PID 
+		pHalData->EEPROMVID = le16_to_cpu( *(u16 *)&PROMContent[EEPROM_VID]);
+		pHalData->EEPROMPID = le16_to_cpu( *(u16 *)&PROMContent[EEPROM_PID]);
+		
+		// Customer ID, 0x00 and 0xff are reserved for Realtek. 		
+		pHalData->EEPROMCustomerID = *(u8 *)&PROMContent[EEPROM_CUSTOMER_ID];
+		pHalData->EEPROMSubCustomerID = *(u8 *)&PROMContent[EEPROM_SUBCUSTOMER_ID];
+
+	}
+	else{
+		pHalData->EEPROMVID	 = EEPROM_Default_VID;
+		pHalData->EEPROMPID	 = EEPROM_Default_PID;
+
+		// Customer ID, 0x00 and 0xff are reserved for Realtek. 		
+		pHalData->EEPROMCustomerID	= EEPROM_Default_CustomerID;
+		pHalData->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID;
+
+	}
+
+	// For customized behavior.
+	if((pHalData->EEPROMVID == 0x103C) && (pHalData->EEPROMVID == 0x1629))// HP Lite-On for RTL8188CUS Slim Combo.
+		pHalData->CustomerID = RT_CID_819x_HP;
+
+	//	Decide CustomerID according to VID/DID or EEPROM
+	switch(pHalData->EEPROMCustomerID)
+	{
+		case EEPROM_CID_DEFAULT:
+			if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3308))
+				pHalData->CustomerID = RT_CID_DLINK;
+			else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3309))
+				pHalData->CustomerID = RT_CID_DLINK;
+			else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x330a))
+				pHalData->CustomerID = RT_CID_DLINK;
+			break;
+		case EEPROM_CID_WHQL:
+/*			
+			Adapter->bInHctTest = TRUE;
+
+			pMgntInfo->bSupportTurboMode = FALSE;
+			pMgntInfo->bAutoTurboBy8186 = FALSE;
+
+			pMgntInfo->PowerSaveControl.bInactivePs = FALSE;
+			pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE;
+			pMgntInfo->PowerSaveControl.bLeisurePs = FALSE;
+				
+			pMgntInfo->keepAliveLevel = 0;
+
+			Adapter->bUnloadDriverwhenS3S4 = FALSE;
+*/				
+			break;
+		default:
+			pHalData->CustomerID = RT_CID_DEFAULT;
+			break;
+			
+	}
+
+	MSG_8192C("EEPROMVID = 0x%04x\n", pHalData->EEPROMVID);
+	MSG_8192C("EEPROMPID = 0x%04x\n", pHalData->EEPROMPID);
+	MSG_8192C("EEPROMCustomerID : 0x%02x\n", pHalData->EEPROMCustomerID);
+	MSG_8192C("EEPROMSubCustomerID: 0x%02x\n", pHalData->EEPROMSubCustomerID);
+
+	MSG_8192C("RT_CustomerID: 0x%02x\n", pHalData->CustomerID);
+
+}
+
+
+static VOID
+_ReadMACAddress(
+	IN	PADAPTER	Adapter,	
+	IN	u8*		PROMContent,
+	IN	BOOLEAN		AutoloadFail
+	)
+{
+	EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter);
+
+	if(_FALSE == AutoloadFail){
+		//Read Permanent MAC address and set value to hardware
+		_rtw_memcpy(pEEPROM->mac_addr, &PROMContent[EEPROM_MAC_ADDR], ETH_ALEN);		
+	}
+	else{
+		//Random assigh MAC address
+		u8 sMacAddr[MAC_ADDR_LEN] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00};
+		//sMacAddr[5] = (u8)GetRandomNumber(1, 254);		
+		_rtw_memcpy(pEEPROM->mac_addr, sMacAddr, ETH_ALEN);	
+	}
+	DBG_8192C("%s MAC Address from EFUSE = "MAC_FMT"\n",__FUNCTION__, MAC_ARG(pEEPROM->mac_addr));
+	//NicIFSetMacAddress(Adapter, Adapter->PermanentAddress);
+	//RT_PRINT_ADDR(COMP_INIT|COMP_EFUSE, DBG_LOUD, "MAC Addr: %s", Adapter->PermanentAddress);
+
+}
+
+static VOID
+_ReadBoardType(
+	IN	PADAPTER	Adapter,	
+	IN	u8*		PROMContent,
+	IN	BOOLEAN		AutoloadFail
+	)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	BOOLEAN		isNormal = IS_NORMAL_CHIP(pHalData->VersionID);
+	u32			value32;
+	u8			boardType = BOARD_USB_DONGLE;
+#if 0
+	if(isNormal)
+	{
+		value32 = rtw_read32(Adapter, REG_HPON_FSM);
+
+		DBG_8192C("first value 0x%x BoardType after 0x%x \n", CHIP_BONDING_IDENTIFIER(value32), pHalData->BoardType);
+		
+		if(!IS_92C_SERIAL(pHalData->VersionID))
+		{
+			if(CHIP_BONDING_IDENTIFIER(value32) == CHIP_BONDING_88C_USB_MCARD)
+			{
+				pHalData->BoardType = BOARD_MINICARD;
+				DBG_8192C("value 0x%x BoardType after 0x%x \n", CHIP_BONDING_IDENTIFIER(value32), pHalData->BoardType);
+			}
+			else if(CHIP_BONDING_IDENTIFIER(value32) == CHIP_BONDING_88C_USB_HP)
+			{
+				pHalData->BoardType = BOARD_USB_High_PA;
+				DBG_8192C("value 0x%x BoardType after 0x%x \n", CHIP_BONDING_IDENTIFIER(value32), pHalData->BoardType);
+			}
+		}
+	}
+#endif
+
+	if(AutoloadFail){
+		if(IS_8723_SERIES(pHalData->VersionID))
+			pHalData->rf_type = RF_1T1R;
+		else
+		        pHalData->rf_type = RF_2T2R;
+
+		pHalData->BluetoothCoexist = _FALSE;
+		pHalData->BoardType = boardType;
+		return;
+	}
+
+	if(isNormal) 
+	{
+		boardType = PROMContent[EEPROM_NORMAL_BoardType];
+		boardType &= BOARD_TYPE_NORMAL_MASK;//bit[7:5]
+		boardType >>= 5;
+	}
+	else
+	{
+		boardType = PROMContent[EEPROM_RF_OPT4];
+		boardType &= BOARD_TYPE_TEST_MASK;		
+	}
+
+	pHalData->BoardType = boardType;
+	MSG_8192C("_ReadBoardType(%x)\n",pHalData->BoardType);
+
+	if (boardType == BOARD_USB_High_PA)
+		pHalData->ExternalPA = 1;
+}
+
+
+static VOID
+_ReadLEDSetting(
+	IN	PADAPTER	Adapter,	
+	IN	u8*		PROMContent,
+	IN	BOOLEAN		AutoloadFail
+	)
+{
+	struct led_priv *pledpriv = &(Adapter->ledpriv);
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+#ifdef CONFIG_SW_LED
+	pledpriv->bRegUseLed = _TRUE;
+
+	//
+	// Led mode
+	//
+	switch(pHalData->CustomerID)
+	{
+		case RT_CID_DEFAULT:
+			pledpriv->LedStrategy = SW_LED_MODE1;
+			pledpriv->bRegUseLed = _TRUE;
+			break;
+
+		case RT_CID_819x_HP:
+			pledpriv->LedStrategy = SW_LED_MODE6;
+			break;
+
+		default:
+			pledpriv->LedStrategy = SW_LED_MODE1;
+			break;
+	}
+
+	if( BOARD_MINICARD == pHalData->BoardType )
+	{
+		pledpriv->LedStrategy = SW_LED_MODE6;
+	}
+	pHalData->bLedOpenDrain = _TRUE;// Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16.
+#else // HW LED
+	pledpriv->LedStrategy = HW_LED;
+#endif //CONFIG_SW_LED
+}
+
+static VOID
+_ReadThermalMeter(
+	IN	PADAPTER	Adapter,	
+	IN	u8* 	PROMContent,
+	IN	BOOLEAN 	AutoloadFail
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u8	tempval;
+
+	//
+	// ThermalMeter from EEPROM
+	//
+	if(!AutoloadFail)	
+		tempval = PROMContent[EEPROM_THERMAL_METER];
+	else
+		tempval = EEPROM_Default_ThermalMeter;
+	
+	pHalData->EEPROMThermalMeter = (tempval&0x1f);	//[4:0]
+
+	if(pHalData->EEPROMThermalMeter == 0x1f || AutoloadFail)
+		pdmpriv->bAPKThermalMeterIgnore = _TRUE;
+
+#if 0
+	if(pHalData->EEPROMThermalMeter < 0x06 || pHalData->EEPROMThermalMeter > 0x1c)
+		pHalData->EEPROMThermalMeter = 0x12;
+#endif
+
+	pdmpriv->ThermalMeter[0] = pHalData->EEPROMThermalMeter;
+	
+	//RTPRINT(FINIT, INIT_TxPower, ("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter));
+	
+}
+
+static VOID
+_ReadRFSetting(
+	IN	PADAPTER	Adapter,	
+	IN	u8* 	PROMContent,
+	IN	BOOLEAN 	AutoloadFail
+	)
+{
+}
+
+static void
+_ReadPROMVersion(
+	IN	PADAPTER	Adapter,	
+	IN	u8* 	PROMContent,
+	IN	BOOLEAN 	AutoloadFail
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	if(AutoloadFail){
+		pHalData->EEPROMVersion = EEPROM_Default_Version;		
+	}
+	else{
+		pHalData->EEPROMVersion = *(u8 *)&PROMContent[EEPROM_VERSION];
+	}
+}
+
+static VOID
+readAntennaDiversity(
+	IN	PADAPTER	pAdapter,
+	IN	u8			*hwinfo,
+	IN	BOOLEAN		AutoLoadFail
+	)
+{
+
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct registry_priv	*registry_par = &pAdapter->registrypriv;
+
+	if(!AutoLoadFail)
+	{
+		// Antenna Diversity setting. 
+		if(registry_par->antdiv_cfg == 2) // 2: From Efuse
+			pHalData->AntDivCfg = (hwinfo[EEPROM_RF_OPT1]&0x18)>>3;
+		else
+			pHalData->AntDivCfg = registry_par->antdiv_cfg ;  // 0:OFF , 1:ON,
+
+		DBG_8192C("### AntDivCfg(%x)\n",pHalData->AntDivCfg);	
+
+		//if(pHalData->EEPROMBluetoothCoexist!=0 && pHalData->EEPROMBluetoothAntNum==Ant_x1)
+		//	pHalData->AntDivCfg = 0;
+	}
+	else
+	{
+		pHalData->AntDivCfg = 0;
+	}
+
+}
+
+static VOID
+hal_InitPGData(
+	IN	PADAPTER	pAdapter,
+	IN	OUT	u8		*PROMContent
+	)
+{
+	EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter);
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	u32	i;
+	u16	value16;
+
+	if(_FALSE == pEEPROM->bautoload_fail_flag)
+	{ // autoload OK.
+		if (_TRUE == pEEPROM->EepromOrEfuse)
+		{
+			// Read all Content from EEPROM or EFUSE.
+			for(i = 0; i < HWSET_MAX_SIZE; i += 2)
+			{
+				//value16 = EF2Byte(ReadEEprom(pAdapter, (u2Byte) (i>>1)));
+				//*((u16 *)(&PROMContent[i])) = value16; 				
+			}
+		}
+		else
+		{
+			// Read EFUSE real map to shadow.
+			EFUSE_ShadowMapUpdate(pAdapter, EFUSE_WIFI, _FALSE);
+			_rtw_memcpy((void*)PROMContent, (void*)pEEPROM->efuse_eeprom_data, HWSET_MAX_SIZE);
+		}
+	}
+	else
+	{//autoload fail
+		//RT_TRACE(COMP_INIT, DBG_LOUD, ("AutoLoad Fail reported from CR9346!!\n")); 
+		pEEPROM->bautoload_fail_flag = _TRUE;
+		//update to default value 0xFF
+		if (_FALSE == pEEPROM->EepromOrEfuse)		
+		EFUSE_ShadowMapUpdate(pAdapter, EFUSE_WIFI, _FALSE);	
+	}
+}
+// Read HW power down mode selection 
+static void _ReadPSSetting(IN PADAPTER Adapter,IN u8*PROMContent,IN u8	AutoloadFail)
+{
+	if(AutoloadFail){
+		Adapter->pwrctrlpriv.bHWPowerdown = _FALSE;
+		Adapter->pwrctrlpriv.bSupportRemoteWakeup = _FALSE;
+	}
+	else	{
+		//if(SUPPORT_HW_RADIO_DETECT(Adapter))
+			Adapter->pwrctrlpriv.bHWPwrPindetect = Adapter->registrypriv.hwpwrp_detect;
+		//else
+			//Adapter->pwrctrlpriv.bHWPwrPindetect = _FALSE;//dongle not support new
+			
+			
+		//hw power down mode selection , 0:rf-off / 1:power down
+
+		if(Adapter->registrypriv.hwpdn_mode==2)
+			Adapter->pwrctrlpriv.bHWPowerdown = (PROMContent[EEPROM_RF_OPT3] & BIT4);
+		else
+			Adapter->pwrctrlpriv.bHWPowerdown = Adapter->registrypriv.hwpdn_mode;
+				
+		// decide hw if support remote wakeup function
+		// if hw supported, 8051 (SIE) will generate WeakUP signal( D+/D- toggle) when autoresume
+		Adapter->pwrctrlpriv.bSupportRemoteWakeup = (PROMContent[EEPROM_TEST_USB_OPT] & BIT1)?_TRUE :_FALSE;
+
+		//if(SUPPORT_HW_RADIO_DETECT(Adapter))	
+			//Adapter->registrypriv.usbss_enable = Adapter->pwrctrlpriv.bSupportRemoteWakeup ;
+		
+		DBG_8192C("%s...bHWPwrPindetect(%x)-bHWPowerdown(%x) ,bSupportRemoteWakeup(%x)\n",__FUNCTION__,
+		Adapter->pwrctrlpriv.bHWPwrPindetect,Adapter->pwrctrlpriv.bHWPowerdown ,Adapter->pwrctrlpriv.bSupportRemoteWakeup);
+
+		DBG_8192C("### PS params=>  power_mgnt(%x),usbss_enable(%x) ###\n",Adapter->registrypriv.power_mgnt,Adapter->registrypriv.usbss_enable);
+		
+	}
+	
+}
+
+static VOID
+readAdapterInfo_8192CU(
+	IN	PADAPTER	Adapter
+	)
+{
+	EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter);
+	PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
+	u8	PROMContent[HWSET_MAX_SIZE]={0};
+
+	hal_InitPGData(Adapter, PROMContent);
+	rtl8192c_EfuseParseIDCode(Adapter, PROMContent);
+	
+	_ReadPROMVersion(Adapter, PROMContent, pEEPROM->bautoload_fail_flag);
+	_ReadIDs(Adapter, PROMContent, pEEPROM->bautoload_fail_flag);
+	_ReadMACAddress(Adapter, PROMContent, pEEPROM->bautoload_fail_flag);	
+	ReadTxPowerInfo(Adapter, PROMContent, pEEPROM->bautoload_fail_flag);
+	_ReadBoardType(Adapter, PROMContent, pEEPROM->bautoload_fail_flag);
+
+#ifdef CONFIG_BT_COEXIST
+	//
+	// Read Bluetooth co-exist and initialize
+	//
+	rtl8192c_ReadBluetoothCoexistInfo(Adapter, PROMContent, pEEPROM->bautoload_fail_flag);
+#endif
+	
+	ReadChannelPlan(Adapter, PROMContent, pEEPROM->bautoload_fail_flag);
+	_ReadThermalMeter(Adapter, PROMContent, pEEPROM->bautoload_fail_flag);
+	_ReadLEDSetting(Adapter, PROMContent, pEEPROM->bautoload_fail_flag);	
+	_ReadRFSetting(Adapter, PROMContent, pEEPROM->bautoload_fail_flag);
+	_ReadPSSetting(Adapter, PROMContent, pEEPROM->bautoload_fail_flag);
+	readAntennaDiversity(Adapter, PROMContent, pEEPROM->bautoload_fail_flag);
+
+	//hal_CustomizedBehavior_8723U(Adapter);
+
+	Adapter->bDongle = (PROMContent[EEPROM_EASY_REPLACEMENT] == 1)? 0: 1;
+	DBG_8192C("%s(): REPLACEMENT = %x\n",__FUNCTION__,Adapter->bDongle);
+}
+
+static void _ReadPROMContent(
+	IN PADAPTER 		Adapter
+	)
+{	
+	EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter);
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8			PROMContent[HWSET_MAX_SIZE]={0};
+	u8			eeValue;
+	u32			i;
+	u16			value16;
+
+	eeValue = rtw_read8(Adapter, REG_9346CR);
+	// To check system boot selection.
+	pEEPROM->EepromOrEfuse		= (eeValue & BOOT_FROM_EEPROM) ? _TRUE : _FALSE;
+	pEEPROM->bautoload_fail_flag	= (eeValue & EEPROM_EN) ? _FALSE : _TRUE;
+
+
+	DBG_8192C("Boot from %s, Autoload %s !\n", (pEEPROM->EepromOrEfuse ? "EEPROM" : "EFUSE"),
+				(pEEPROM->bautoload_fail_flag ? "Fail" : "OK") );
+
+	//pHalData->EEType = IS_BOOT_FROM_EEPROM(Adapter) ? EEPROM_93C46 : EEPROM_BOOT_EFUSE;
+
+	//if(IS_HARDWARE_TYPE_8723(Adapter))
+	//	readAdapterInfo_8723U(Adapter);
+	//else
+		readAdapterInfo_8192CU(Adapter);
+}
+
+
+static VOID
+_InitOtherVariable(
+	IN PADAPTER 		Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);	
+
+
+	//if(Adapter->bInHctTest){
+	//	pMgntInfo->PowerSaveControl.bInactivePs = FALSE;
+	//	pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE;
+	//	pMgntInfo->PowerSaveControl.bLeisurePs = FALSE;
+	//	pMgntInfo->keepAliveLevel = 0;
+	//}
+
+	// 2009/06/10 MH For 92S 1*1=1R/ 1*2&2*2 use 2R. We default set 1*1 use radio A
+	// So if you want to use radio B. Please modify RF path enable bit for correct signal
+	// strength calculate.
+	if (pHalData->rf_type == RF_1T1R){
+		pHalData->bRFPathRxEnable[0] = _TRUE;
+	}
+	else{
+		pHalData->bRFPathRxEnable[0] = pHalData->bRFPathRxEnable[1] = _TRUE;
+	}
+
+}
+
+static VOID
+_ReadRFType(
+	IN	PADAPTER	Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+#if DISABLE_BB_RF
+	pHalData->rf_chip = RF_PSEUDO_11N;
+#else
+	pHalData->rf_chip = RF_6052;
+#endif
+}
+
+void _ReadSilmComboMode(PADAPTER Adapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	pHalData->SlimComboDbg = _FALSE;	// Default is not debug mode.
+
+	// 2010/11/22 MH We need to enter debug mode for TSMA and UMC A cut
+	if ((Adapter->chip_type == RTL8188C_8192C) && 
+		(pHalData->BoardType == BOARD_USB_COMBO))
+	{			
+		switch (pHalData->VersionID)
+		{
+			case	VERSION_NORMAL_TSMC_CHIP_88C:
+			case	VERSION_NORMAL_TSMC_CHIP_92C:
+			case	VERSION_NORMAL_TSMC_CHIP_92C_1T2R:
+			case	VERSION_NORMAL_UMC_CHIP_88C_A_CUT:
+			case	VERSION_NORMAL_UMC_CHIP_92C_A_CUT:
+			case	VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT:
+				if ((rtw_read8(Adapter, REG_SYS_CFG+3) &0xF0) == 0x20)
+					pHalData->SlimComboDbg = _TRUE;
+				
+				break;
+
+			case	VERSION_NORMAL_UMC_CHIP_88C_B_CUT:
+			case	VERSION_NORMAL_UMC_CHIP_92C_B_CUT:
+			case	VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT:
+				// 2011/02/15 MH UNC-B cut ECO fail, we need to support slim combo debug mode.
+				if ((rtw_read8(Adapter, REG_SYS_CFG+3) &0xF0) == 0x20)
+					pHalData->SlimComboDbg = _TRUE;
+				break;
+				
+			default:
+				break;
+		}		
+		
+	}
+	
+}
+static int _ReadAdapterInfo8192CU(PADAPTER	Adapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u32 start=rtw_get_current_time();
+	
+	MSG_8192C("====> ReadAdapterInfo8192C\n");
+
+	//Efuse_InitSomeVar(Adapter);
+
+	//if(IS_HARDWARE_TYPE_8723(Adapter))
+	//	_EfuseCellSel(Adapter);
+
+	_ReadRFType(Adapter);//rf_chip -> _InitRFType()
+	_ReadPROMContent(Adapter);
+
+	// 2010/10/25 MH THe function must be called after borad_type & IC-Version recognize.
+	_ReadSilmComboMode(Adapter);
+
+	_InitOtherVariable(Adapter);
+
+	//MSG_8192C("%s()(done), rf_chip=0x%x, rf_type=0x%x\n",  __FUNCTION__, pHalData->rf_chip, pHalData->rf_type);
+
+	MSG_8192C("<==== ReadAdapterInfo8192C in %d ms\n", rtw_get_passing_time_ms(start));
+
+	return _SUCCESS;
+}
+
+
+static void ReadAdapterInfo8192CU(PADAPTER Adapter)
+{
+	// Read EEPROM size before call any EEPROM function
+	//Adapter->EepromAddressSize=Adapter->HalFunc.GetEEPROMSizeHandler(Adapter);
+	Adapter->EepromAddressSize = GetEEPROMSize8192C(Adapter);
+	
+	_ReadAdapterInfo8192CU(Adapter);
+}
+
+
+#define GPIO_DEBUG_PORT_NUM 0
+static void rtl8192cu_trigger_gpio_0(_adapter *padapter)
+{
+
+	u32 gpioctrl;
+	DBG_8192C("==> trigger_gpio_0...\n");
+	rtw_write16_async(padapter,REG_GPIO_PIN_CTRL,0);
+	rtw_write8_async(padapter,REG_GPIO_PIN_CTRL+2,0xFF);
+	gpioctrl = (BIT(GPIO_DEBUG_PORT_NUM)<<24 )|(BIT(GPIO_DEBUG_PORT_NUM)<<16);
+	rtw_write32_async(padapter,REG_GPIO_PIN_CTRL,gpioctrl);
+	gpioctrl |= (BIT(GPIO_DEBUG_PORT_NUM)<<8);
+	rtw_write32_async(padapter,REG_GPIO_PIN_CTRL,gpioctrl);
+	DBG_8192C("<=== trigger_gpio_0...\n");
+
+}
+
+static void ResumeTxBeacon(_adapter *padapter)
+{
+	HAL_DATA_TYPE*	pHalData = GET_HAL_DATA(padapter);	
+
+	// 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value
+	// which should be read from register to a global variable.
+
+	 if(IS_NORMAL_CHIP(pHalData->VersionID))
+	 {
+		rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl) | BIT6);
+		pHalData->RegFwHwTxQCtrl |= BIT6;
+		rtw_write8(padapter, REG_TBTT_PROHIBIT+1, 0xff);
+		pHalData->RegReg542 |= BIT0;
+		rtw_write8(padapter, REG_TBTT_PROHIBIT+2, pHalData->RegReg542);
+	 }
+	 else
+	 {
+		pHalData->RegTxPause = rtw_read8(padapter, REG_TXPAUSE);
+		rtw_write8(padapter, REG_TXPAUSE, pHalData->RegTxPause & (~BIT6));
+	 }
+	 
+}
+
+static void StopTxBeacon(_adapter *padapter)
+{
+	HAL_DATA_TYPE*	pHalData = GET_HAL_DATA(padapter);
+
+	// 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value
+	// which should be read from register to a global variable.
+
+ 	if(IS_NORMAL_CHIP(pHalData->VersionID))
+	 {
+		rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl) & (~BIT6));
+		pHalData->RegFwHwTxQCtrl &= (~BIT6);
+		rtw_write8(padapter, REG_TBTT_PROHIBIT+1, 0x64);
+		pHalData->RegReg542 &= ~(BIT0);
+		rtw_write8(padapter, REG_TBTT_PROHIBIT+2, pHalData->RegReg542);
+	 }
+	 else
+	 {
+		pHalData->RegTxPause = rtw_read8(padapter, REG_TXPAUSE);
+		rtw_write8(padapter, REG_TXPAUSE, pHalData->RegTxPause | BIT6);
+	 }
+
+	 //todo: CheckFwRsvdPageContent(Adapter);  // 2010.06.23. Added by tynli.
+
+}
+
+
+void SetHwReg8192CU(PADAPTER Adapter, u8 variable, u8* val)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+_func_enter_;
+
+	switch(variable)
+	{
+		case HW_VAR_MEDIA_STATUS:
+			{
+				u8 val8;
+
+				val8 = rtw_read8(Adapter, MSR)&0x0c;
+				val8 |= *((u8 *)val);
+				rtw_write8(Adapter, MSR, val8);
+			}
+			break;
+		case HW_VAR_MEDIA_STATUS1:
+			{
+				u8 val8;
+				
+				val8 = rtw_read8(Adapter, MSR)&0x03;
+				val8 |= *((u8 *)val) <<2;
+				rtw_write8(Adapter, MSR, val8);
+			}
+			break;
+		case HW_VAR_SET_OPMODE:
+			{
+				u8	val8;
+				u8	mode = *((u8 *)val);
+
+				if((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_))
+				{
+					StopTxBeacon(Adapter);
+					rtw_write8(Adapter,REG_BCN_CTRL, 0x18);
+				}
+				else if((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/)
+				{					
+					ResumeTxBeacon(Adapter);
+					rtw_write8(Adapter,REG_BCN_CTRL, 0x1a);					
+				}
+				else if(mode == _HW_STATE_AP_)
+				{
+					ResumeTxBeacon(Adapter);
+					
+					rtw_write8(Adapter, REG_BCN_CTRL, 0x12);
+
+					
+					//Set RCR
+					//rtw_write32(padapter, REG_RCR, 0x70002a8e);//CBSSID_DATA must set to 0
+					rtw_write32(Adapter, REG_RCR, 0x7000228e);//CBSSID_DATA must set to 0
+					//enable to rx data frame				
+					rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
+					//enable to rx ps-poll
+					rtw_write16(Adapter, REG_RXFLTMAP1, 0x0400);
+
+					//Beacon Control related register for first time 
+					rtw_write8(Adapter, REG_BCNDMATIM, 0x02); // 2ms		
+					rtw_write8(Adapter, REG_DRVERLYINT, 0x05);// 5ms
+					//rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF);
+					rtw_write8(Adapter, REG_ATIMWND, 0x0a); // 10ms
+					rtw_write16(Adapter, REG_BCNTCFG, 0x00);
+					rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0x6404);		
+	
+					//reset TSF		
+					rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0));
+
+					//enable TSF Function for if1
+					rtw_write8(Adapter, REG_BCN_CTRL, (EN_BCN_FUNCTION | EN_TXBCN_RPT));
+			
+					//enable update TSF for if1
+					if(IS_NORMAL_CHIP(pHalData->VersionID))
+					{			
+						rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));			
+					}
+					else
+					{
+						rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~(BIT(4)|BIT(5))));
+					}
+					
+				}
+
+				val8 = rtw_read8(Adapter, MSR)&0x0c;
+				val8 |= mode;
+				rtw_write8(Adapter, MSR, val8);
+			}
+			break;
+		case HW_VAR_BSSID:
+			{
+				u8	idx = 0;
+				for(idx = 0 ; idx < 6; idx++)
+				{
+					rtw_write8(Adapter, (REG_BSSID+idx), val[idx]);
+				}
+			}
+			break;
+		case HW_VAR_BASIC_RATE:
+			{
+				u16			BrateCfg = 0;
+				u8			RateIndex = 0;
+				
+				// 2007.01.16, by Emily
+				// Select RRSR (in Legacy-OFDM and CCK)
+				// For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate.
+				// We do not use other rates.
+				rtl8192c_HalSetBrateCfg( Adapter, val, &BrateCfg );
+
+				//2011.03.30 add by Luke Lee
+				//CCK 2M ACK should be disabled for some BCM and Atheros AP IOT
+				//because CCK 2M has poor TXEVM
+				//CCK 5.5M & 11M ACK should be enabled for better performance
+
+				pHalData->BasicRateSet = BrateCfg = (BrateCfg |0xd) & 0x15d;		
+
+				BrateCfg |= 0x01; // default enable 1M ACK rate
+
+				DBG_8192C("HW_VAR_BASIC_RATE: BrateCfg(%#x)\n", BrateCfg);
+				
+				// Set RRSR rate table.
+				rtw_write8(Adapter, REG_RRSR, BrateCfg&0xff);
+				rtw_write8(Adapter, REG_RRSR+1, (BrateCfg>>8)&0xff);
+
+				// Set RTS initial rate
+				while(BrateCfg > 0x1)
+				{
+					BrateCfg = (BrateCfg>> 1);
+					RateIndex++;
+				}
+				// Ziv - Check
+				rtw_write8(Adapter, REG_INIRTS_RATE_SEL, RateIndex);
+			}
+			break;
+		case HW_VAR_TXPAUSE:
+			rtw_write8(Adapter, REG_TXPAUSE, *((u8 *)val));	
+			break;
+		case HW_VAR_BCN_FUNC:
+			if(*((u8 *)val))
+			{
+				rtw_write8(Adapter, REG_BCN_CTRL, (EN_BCN_FUNCTION | EN_TXBCN_RPT));
+			}
+			else
+			{
+				rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~(EN_BCN_FUNCTION | EN_TXBCN_RPT)));
+			}
+			break;
+		case HW_VAR_CORRECT_TSF:
+			{
+				u64	tsf;
+				struct mlme_ext_priv	*pmlmeext = &Adapter->mlmeextpriv;
+				struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+				//tsf = pmlmeext->TSFValue - ((u32)pmlmeext->TSFValue % (pmlmeinfo->bcn_interval*1024)) -1024; //us
+				tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) -1024; //us
+
+				if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
+				{				
+					//pHalData->RegTxPause |= STOP_BCNQ;BIT(6)
+					//rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)|BIT(6)));
+					StopTxBeacon(Adapter);
+				}
+
+				//disable related TSF function
+				rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(3)));
+							
+				rtw_write32(Adapter, REG_TSFTR, tsf);
+				rtw_write32(Adapter, REG_TSFTR+4, tsf>>32);
+
+				//enable related TSF function
+				rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(3));
+				
+							
+				if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
+				{
+					//pHalData->RegTxPause  &= (~STOP_BCNQ);
+					//rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)&(~BIT(6))));
+					ResumeTxBeacon(Adapter);
+				}
+			}
+			break;
+		case HW_VAR_CHECK_BSSID:
+			if(*((u8 *)val))
+			{
+				if(IS_NORMAL_CHIP(pHalData->VersionID))
+				{
+					rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
+				}
+				else
+				{
+					rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA);
+				}
+			}
+			else
+			{
+				u32	val32;
+
+				val32 = rtw_read32(Adapter, REG_RCR);
+
+				if(IS_NORMAL_CHIP(pHalData->VersionID))
+				{
+					val32 &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);
+				}
+				else
+				{
+					val32 &= 0xfffff7bf;
+				}
+
+				rtw_write32(Adapter, REG_RCR, val32);
+			}
+			break;
+		case HW_VAR_MLME_DISCONNECT:
+			{
+				//Set RCR to not to receive data frame when NO LINK state
+				//rtw_write32(Adapter, REG_RCR, rtw_read32(padapter, REG_RCR) & ~RCR_ADF);
+				//reject all data frames
+				rtw_write16(Adapter, REG_RXFLTMAP2,0x00);
+
+				//reset TSF
+				rtw_write8(Adapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1)));
+
+				//disable update TSF
+				if(IS_NORMAL_CHIP(pHalData->VersionID))
+				{
+					rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4));	
+				}
+				else
+				{
+					rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)|BIT(5));
+				}
+			}
+			break;
+		case HW_VAR_MLME_SITESURVEY:
+			if(*((u8 *)val))//under sitesurvey
+			{
+				if(IS_NORMAL_CHIP(pHalData->VersionID))
+				{
+					//config RCR to receive different BSSID & not to receive data frame
+					//pHalData->ReceiveConfig &= (~(RCR_CBSSID_DATA | RCR_CBSSID_BCN));			
+					u32 v = rtw_read32(Adapter, REG_RCR);
+					v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN );//| RCR_ADF
+					rtw_write32(Adapter, REG_RCR, v);
+					//reject all data frame
+					rtw_write16(Adapter, REG_RXFLTMAP2,0x00);
+
+					//disable update TSF
+					rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4));
+				}	
+				else
+				{
+					//config RCR to receive different BSSID & not to receive data frame			
+					rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR) & 0xfffff7bf);
+
+
+					//disable update TSF
+					rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)|BIT(5));
+				}
+			}
+			else//sitesurvey done
+			{
+				struct mlme_ext_priv	*pmlmeext = &Adapter->mlmeextpriv;
+				struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+				if ((is_client_associated_to_ap(Adapter) == _TRUE) ||
+					((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) )
+				{
+					//enable to rx data frame
+					//rtw_write32(Adapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF);
+					rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF);
+
+					//enable update TSF
+					if(IS_NORMAL_CHIP(pHalData->VersionID))
+					{
+						rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
+					}
+					else
+					{
+						rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~(BIT(4)|BIT(5))));
+					}
+				}
+				else if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)
+				{
+					rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_ADF);
+					
+					//enable update TSF
+					if(IS_NORMAL_CHIP(pHalData->VersionID))			
+						rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));			
+					else			
+						rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~(BIT(4)|BIT(5))));	
+				}
+
+
+				if(IS_NORMAL_CHIP(pHalData->VersionID))
+				{
+					if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)
+						rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN);
+					else			
+						rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
+				}
+				else
+				{
+					rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA);
+				}
+			}
+			break;
+		case HW_VAR_MLME_JOIN:
+			{
+				u8	RetryLimit = 0x30;
+				u8	type = *((u8 *)val);
+				struct mlme_priv	*pmlmepriv = &Adapter->mlmepriv;
+
+				if(type == 0) // prepare to join
+				{
+					//enable to rx data frame.Accept all data frame
+					//rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF);
+					rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF);
+
+					if(IS_NORMAL_CHIP(pHalData->VersionID))
+					{
+						rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
+					}
+					else
+					{
+						rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA);
+					}
+
+					if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
+					{
+						RetryLimit = (pHalData->CustomerID == RT_CID_CCX) ? 7 : 48;
+					}
+					else // Ad-hoc Mode
+					{
+						RetryLimit = 0x7;
+					}
+				}
+				else if(type == 1) //joinbss_event call back when join res < 0
+				{
+					//if(IS_NORMAL_CHIP(pHalData->VersionID))
+					//{
+						//config RCR to receive different BSSID & not to receive data frame during linking				
+					//	u32 v = rtw_read32(Adapter, REG_RCR);
+					//	v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN );//| RCR_ADF
+					//	rtw_write32(Adapter, REG_RCR, v);
+					//}	
+					//else
+					//{
+						//config RCR to receive different BSSID & not to receive data frame during linking	
+					//	rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR) & 0xfffff7bf);
+					//}
+
+					rtw_write16(Adapter, REG_RXFLTMAP2,0x00);
+				}
+				else if(type == 2) //sta add event call back
+				{
+					if(IS_NORMAL_CHIP(pHalData->VersionID))
+					{
+						//enable update TSF
+						rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
+					}
+					else
+					{
+						//enable update TSF
+						rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~(BIT(4)|BIT(5))));
+					}
+
+					if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE))
+					{
+						//fixed beacon issue for 8191su...........
+						rtw_write8(Adapter,0x542 ,0x02);
+						RetryLimit = 0x7;
+					}
+				}
+
+				rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT);
+			}
+			break;
+		case HW_VAR_BEACON_INTERVAL:
+			rtw_write16(Adapter, REG_BCN_INTERVAL, *((u16 *)val));
+			break;
+		case HW_VAR_SLOT_TIME:
+			{
+				u8	u1bAIFS, aSifsTime;
+				struct mlme_ext_priv	*pmlmeext = &Adapter->mlmeextpriv;
+				struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+				
+				rtw_write8(Adapter, REG_SLOT, val[0]);
+
+				if(pmlmeinfo->WMM_enable == 0)
+				{
+					if( pmlmeext->cur_wireless_mode == WIRELESS_11B)
+						aSifsTime = 10;
+					else
+						aSifsTime = 16;
+					
+					u1bAIFS = aSifsTime + (2 * pmlmeinfo->slotTime);
+					
+					// <Roger_EXP> Temporary removed, 2008.06.20.
+					rtw_write8(Adapter, REG_EDCA_VO_PARAM, u1bAIFS);
+					rtw_write8(Adapter, REG_EDCA_VI_PARAM, u1bAIFS);
+					rtw_write8(Adapter, REG_EDCA_BE_PARAM, u1bAIFS);
+					rtw_write8(Adapter, REG_EDCA_BK_PARAM, u1bAIFS);
+				}
+			}
+			break;
+		case HW_VAR_SIFS:
+			{
+				// SIFS for OFDM Data ACK
+				rtw_write8(Adapter, REG_SIFS_CTX+1, val[0]);
+				// SIFS for OFDM consecutive tx like CTS data!
+				rtw_write8(Adapter, REG_SIFS_TRX+1, val[1]);
+				
+				rtw_write8(Adapter,REG_SPEC_SIFS+1, val[0]);
+				rtw_write8(Adapter,REG_MAC_SPEC_SIFS+1, val[0]);
+
+				// 20100719 Joseph: Revise SIFS setting due to Hardware register definition change.
+				rtw_write8(Adapter, REG_R2T_SIFS+1, val[0]);
+				rtw_write8(Adapter, REG_T2T_SIFS+1, val[0]);
+			}
+			break;
+		case HW_VAR_ACK_PREAMBLE:
+			{
+				u8	regTmp;
+				u8	bShortPreamble = *( (PBOOLEAN)val );
+				// Joseph marked out for Netgear 3500 TKIP channel 7 issue.(Temporarily)
+				//regTmp = (pHalData->nCur40MhzPrimeSC)<<5;
+				regTmp = 0;
+				if(bShortPreamble)
+					regTmp |= 0x80;
+
+				rtw_write8(Adapter, REG_RRSR+2, regTmp);
+			}
+			break;
+		case HW_VAR_SEC_CFG:
+			rtw_write8(Adapter, REG_SECCFG, *((u8 *)val));
+			break;
+		case HW_VAR_DM_FLAG:
+			pdmpriv->DMFlag = *((u8 *)val);
+			break;
+		case HW_VAR_DM_FUNC_OP:
+			if(val[0])
+			{// save dm flag
+				pdmpriv->DMFlag_tmp = pdmpriv->DMFlag;
+			}
+			else
+			{// restore dm flag
+				pdmpriv->DMFlag = pdmpriv->DMFlag_tmp;
+			}
+			break;
+		case HW_VAR_DM_FUNC_SET:
+			pdmpriv->DMFlag |= *((u8 *)val);
+			break;
+		case HW_VAR_DM_FUNC_CLR:
+			pdmpriv->DMFlag &= *((u8 *)val);
+			break;
+		case HW_VAR_CAM_EMPTY_ENTRY:
+			{
+				u8	ucIndex = *((u8 *)val);
+				u8	i;
+				u32	ulCommand=0;
+				u32	ulContent=0;
+				u32	ulEncAlgo=CAM_AES;
+
+				for(i=0;i<CAM_CONTENT_COUNT;i++)
+				{
+					// filled id in CAM config 2 byte
+					if( i == 0)
+					{
+						ulContent |=(ucIndex & 0x03) | ((u16)(ulEncAlgo)<<2);
+						//ulContent |= CAM_VALID;
+					}
+					else
+					{
+						ulContent = 0;
+					}
+					// polling bit, and No Write enable, and address
+					ulCommand= CAM_CONTENT_COUNT*ucIndex+i;
+					ulCommand= ulCommand | CAM_POLLINIG|CAM_WRITE;
+					// write content 0 is equall to mark invalid
+					rtw_write32(Adapter, WCAMI, ulContent);  //delay_ms(40);
+					//RT_TRACE(COMP_SEC, DBG_LOUD, ("CAM_empty_entry(): WRITE A4: %lx \n",ulContent));
+					rtw_write32(Adapter, RWCAM, ulCommand);  //delay_ms(40);
+					//RT_TRACE(COMP_SEC, DBG_LOUD, ("CAM_empty_entry(): WRITE A0: %lx \n",ulCommand));
+				}
+			}
+			break;
+		case HW_VAR_CAM_INVALID_ALL:
+			rtw_write32(Adapter, RWCAM, BIT(31)|BIT(30));
+			break;
+		case HW_VAR_CAM_WRITE:
+			{
+				u32	cmd;
+				u32	*cam_val = (u32 *)val;
+				rtw_write32(Adapter, WCAMI, cam_val[0]);
+				
+				cmd = CAM_POLLINIG | CAM_WRITE | cam_val[1];
+				rtw_write32(Adapter, RWCAM, cmd);
+			}
+			break;
+		case HW_VAR_AC_PARAM_VO:
+			rtw_write32(Adapter, REG_EDCA_VO_PARAM, ((u32 *)(val))[0]);
+			break;
+		case HW_VAR_AC_PARAM_VI:
+			rtw_write32(Adapter, REG_EDCA_VI_PARAM, ((u32 *)(val))[0]);
+			break;
+		case HW_VAR_AC_PARAM_BE:
+			pHalData->AcParam_BE = ((u32 *)(val))[0];
+			rtw_write32(Adapter, REG_EDCA_BE_PARAM, ((u32 *)(val))[0]);
+			break;
+		case HW_VAR_AC_PARAM_BK:
+			rtw_write32(Adapter, REG_EDCA_BK_PARAM, ((u32 *)(val))[0]);
+			break;
+		case HW_VAR_ACM_CTRL:
+			{
+				u8	acm_ctrl = *((u8 *)val);
+				u8	AcmCtrl = rtw_read8( Adapter, REG_ACMHWCTRL);
+
+				if(acm_ctrl > 1)
+					AcmCtrl = AcmCtrl | 0x1;
+
+				if(acm_ctrl & BIT(3))
+					AcmCtrl |= AcmHw_VoqEn;
+				else
+					AcmCtrl &= (~AcmHw_VoqEn);
+
+				if(acm_ctrl & BIT(2))
+					AcmCtrl |= AcmHw_ViqEn;
+				else
+					AcmCtrl &= (~AcmHw_ViqEn);
+
+				if(acm_ctrl & BIT(1))
+					AcmCtrl |= AcmHw_BeqEn;
+				else
+					AcmCtrl &= (~AcmHw_BeqEn);
+
+				DBG_871X("[HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl );
+				rtw_write8(Adapter, REG_ACMHWCTRL, AcmCtrl );
+			}
+			break;
+		case HW_VAR_AMPDU_MIN_SPACE:
+			{
+				u8	MinSpacingToSet;
+				u8	SecMinSpace;
+
+				MinSpacingToSet = *((u8 *)val);
+				if(MinSpacingToSet <= 7)
+				{
+					switch(Adapter->securitypriv.dot11PrivacyAlgrthm)
+					{
+						case _NO_PRIVACY_:
+						case _AES_:
+							SecMinSpace = 0;
+							break;
+
+						case _WEP40_:
+						case _WEP104_:
+						case _TKIP_:
+						case _TKIP_WTMIC_:
+							SecMinSpace = 6;
+							break;
+						default:
+							SecMinSpace = 7;
+							break;
+					}
+
+					if(MinSpacingToSet < SecMinSpace){
+						MinSpacingToSet = SecMinSpace;
+					}
+
+					//RT_TRACE(COMP_MLME, DBG_LOUD, ("Set HW_VAR_AMPDU_MIN_SPACE: %#x\n", Adapter->MgntInfo.MinSpaceCfg));
+					rtw_write8(Adapter, REG_AMPDU_MIN_SPACE, (rtw_read8(Adapter, REG_AMPDU_MIN_SPACE) & 0xf8) | MinSpacingToSet);
+				}
+			}
+			break;
+		case HW_VAR_AMPDU_FACTOR:
+			{
+				u8	RegToSet_Normal[4]={0x41,0xa8,0x72, 0xb9};
+				u8	RegToSet_BT[4]={0x31,0x74,0x42, 0x97};
+				u8	FactorToSet;
+				u8	*pRegToSet;
+				u8	index = 0;
+
+#ifdef CONFIG_BT_COEXIST
+				if(	(pHalData->bt_coexist.BT_Coexist) &&
+					(pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4) )
+					pRegToSet = RegToSet_BT; // 0x97427431;
+				else
+#endif
+					pRegToSet = RegToSet_Normal; // 0xb972a841;
+
+				FactorToSet = *((u8 *)val);
+				if(FactorToSet <= 3)
+				{
+					FactorToSet = (1<<(FactorToSet + 2));
+					if(FactorToSet>0xf)
+						FactorToSet = 0xf;
+
+					for(index=0; index<4; index++)
+					{
+						if((pRegToSet[index] & 0xf0) > (FactorToSet<<4))
+							pRegToSet[index] = (pRegToSet[index] & 0x0f) | (FactorToSet<<4);
+					
+						if((pRegToSet[index] & 0x0f) > FactorToSet)
+							pRegToSet[index] = (pRegToSet[index] & 0xf0) | (FactorToSet);
+						
+						rtw_write8(Adapter, (REG_AGGLEN_LMT+index), pRegToSet[index]);
+					}
+
+					//RT_TRACE(COMP_MLME, DBG_LOUD, ("Set HW_VAR_AMPDU_FACTOR: %#x\n", FactorToSet));
+				}
+			}
+			break;
+		case HW_VAR_RXDMA_AGG_PG_TH:
+			#ifdef CONFIG_USB_RX_AGGREGATION
+			{
+				u8	threshold = *((u8 *)val);
+				if( threshold == 0)
+				{
+				
+					threshold = pHalData->UsbRxAggPageCount;
+				}
+				rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold);
+			}
+			#endif
+			break;
+		case HW_VAR_SET_RPWM:
+			rtw_write8(Adapter, REG_USB_HRPWM, *((u8 *)val));
+			break;
+		case HW_VAR_H2C_FW_PWRMODE:
+			{
+				u8	psmode = (*(u8 *)val);
+			
+				// Forece leave RF low power mode for 1T1R to prevent conficting setting in Fw power
+				// saving sequence. 2010.06.07. Added by tynli. Suggested by SD3 yschang.
+				if( (psmode != PS_MODE_ACTIVE) && (!IS_92C_SERIAL(pHalData->VersionID)))
+				{
+					rtl8192c_dm_RF_Saving(Adapter, _TRUE);
+				}
+				rtl8192c_set_FwPwrMode_cmd(Adapter, psmode);
+			}
+			break;
+		case HW_VAR_H2C_FW_JOINBSSRPT:
+			{
+				u8	mstatus = (*(u8 *)val);
+				rtl8192c_set_FwJoinBssReport_cmd(Adapter, mstatus);
+			}
+			break;
+#ifdef CONFIG_P2P
+		case HW_VAR_H2C_FW_P2P_PS_OFFLOAD:
+			{
+				u8	p2p_ps_state = (*(u8 *)val);
+				rtl8192c_set_p2p_ps_offload_cmd(Adapter, p2p_ps_state);
+			}
+			break;
+#endif //CONFIG_P2P
+		case HW_VAR_INITIAL_GAIN:
+			{
+				DIG_T	*pDigTable = &pdmpriv->DM_DigTable;					
+				u32 		rx_gain = ((u32 *)(val))[0];
+				
+				if(rx_gain == 0xff){//restore rx gain
+					pDigTable->CurIGValue = pDigTable->BackupIGValue;
+					rtw_write8(Adapter,rOFDM0_XAAGCCore1, pDigTable->CurIGValue);
+					rtw_write8(Adapter,rOFDM0_XBAGCCore1, pDigTable->CurIGValue);
+				}
+				else{
+					pDigTable->BackupIGValue = pDigTable->CurIGValue;					
+					PHY_SetBBReg(Adapter, rOFDM0_XAAGCCore1, 0x7f,rx_gain );
+					PHY_SetBBReg(Adapter, rOFDM0_XBAGCCore1, 0x7f,rx_gain);
+					pDigTable->CurIGValue = rx_gain;
+				}
+			}
+			break;
+		case HW_VAR_TRIGGER_GPIO_0:
+			rtl8192cu_trigger_gpio_0(Adapter);
+			break;
+#ifdef CONFIG_BT_COEXIST
+		case HW_VAR_BT_SET_COEXIST:
+			{
+				u8	bStart = (*(u8 *)val);
+				rtl8192c_set_dm_bt_coexist(Adapter, bStart);
+			}
+			break;
+		case HW_VAR_BT_ISSUE_DELBA:
+			{
+				u8	dir = (*(u8 *)val);
+				rtl8192c_issue_delete_ba(Adapter, dir);
+			}
+			break;
+#endif
+#ifdef CONFIG_SW_ANTENNA_DIVERSITY
+
+		case HW_VAR_ANTENNA_DIVERSITY_LINK:
+			SwAntDivRestAfterLink8192C(Adapter);
+			break;
+		case HW_VAR_ANTENNA_DIVERSITY_SELECT:
+			{
+				u8	Optimum_antenna = (*(u8 *)val);
+				//switch antenna to Optimum_antenna
+		//		DBG_8192C("==> HW_VAR_ANTENNA_DIVERSITY_SELECT , Ant_(%s)\n",(Optimum_antenna==2)?"A":"B");
+				if(pHalData->CurAntenna !=  Optimum_antenna)		
+				{
+					PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, Optimum_antenna);
+					pHalData->CurAntenna = Optimum_antenna ;
+					//DBG_8192C("==> HW_VAR_ANTENNA_DIVERSITY_SELECT , Ant_(%s)\n",(Optimum_antenna==2)?"A":"B");
+				}
+			}
+			break;
+#endif
+		case HW_VAR_EFUSE_BYTES: // To set EFUE total used bytes, added by Roger, 2008.12.22.
+			pHalData->EfuseUsedBytes = *((u16 *)val);			
+			break;
+		case HW_VAR_FIFO_CLEARN_UP:
+			{
+				#define RW_RELEASE_EN		BIT18
+				#define RXDMA_IDLE			BIT17
+				
+				struct pwrctrl_priv *pwrpriv = &Adapter->pwrctrlpriv;
+				u8 trycnt = 100;	
+				
+				//pause tx
+				rtw_write8(Adapter,REG_TXPAUSE,0xff);
+			
+				//keep sn
+				Adapter->xmitpriv.nqos_ssn = rtw_read16(Adapter,REG_NQOS_SEQ);
+
+				if(pwrpriv->bkeepfwalive != _TRUE)
+				{
+					//RX DMA stop
+					rtw_write32(Adapter,REG_RXPKT_NUM,(rtw_read32(Adapter,REG_RXPKT_NUM)|RW_RELEASE_EN));
+					do{
+						if(!(rtw_read32(Adapter,REG_RXPKT_NUM)&RXDMA_IDLE))
+							break;
+					}while(trycnt--);
+					if(trycnt ==0)
+						DBG_8192C("Stop RX DMA failed...... \n");
+
+					//RQPN Load 0
+					rtw_write16(Adapter,REG_RQPN_NPQ,0x0);
+					rtw_write32(Adapter,REG_RQPN,0x80000000);
+					rtw_mdelay_os(10);
+				}
+			}
+			break;
+		default:
+			break;
+	}
+
+_func_exit_;
+}
+
+void GetHwReg8192CU(PADAPTER Adapter, u8 variable, u8* val)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+_func_enter_;
+
+	switch(variable)
+	{
+		case HW_VAR_BASIC_RATE:
+			*((u16 *)(val)) = pHalData->BasicRateSet;
+		case HW_VAR_TXPAUSE:
+			val[0] = rtw_read8(Adapter, REG_TXPAUSE);
+			break;
+		case HW_VAR_TX_BCN_DONE:
+			{
+				u32 xmitbcnDown;
+				xmitbcnDown= rtw_read32(Adapter, REG_TDECTRL);
+				if(xmitbcnDown & BCN_VALID  ){
+					rtw_write32(Adapter,REG_TDECTRL, xmitbcnDown | BCN_VALID  ); // write 1 to clear, Clear by sw
+					val[0] = _TRUE;
+				}
+			}
+			break;
+		case HW_VAR_DM_FLAG:
+			val[0] = pHalData->dmpriv.DMFlag;
+			break;
+		case HW_VAR_RF_TYPE:
+			val[0] = pHalData->rf_type;
+			break;
+		case HW_VAR_FWLPS_RF_ON:
+			{
+				//When we halt NIC, we should check if FW LPS is leave.
+				u32	valRCR;
+				
+				if(Adapter->pwrctrlpriv.rf_pwrstate == rf_off)
+				{
+					// If it is in HW/SW Radio OFF or IPS state, we do not check Fw LPS Leave,
+					// because Fw is unload.
+					val[0] = _TRUE;
+				}
+				else
+				{
+					valRCR = rtw_read32(Adapter, REG_RCR);
+					valRCR &= 0x00070000;
+					if(valRCR)
+						val[0] = _FALSE;
+					else
+						val[0] = _TRUE;
+				}
+			}
+			break;
+#ifdef CONFIG_ANTENNA_DIVERSITY
+		case HW_VAR_CURRENT_ANTENNA:
+			val[0] = pHalData->CurAntenna;
+			break;
+#endif
+		case HW_VAR_EFUSE_BYTES: // To get EFUE total used bytes, added by Roger, 2008.12.22.
+			*((u16 *)(val)) = pHalData->EfuseUsedBytes;	
+			break;
+		default:
+			break;
+	}
+
+_func_exit_;
+}
+
+//
+//	Description: 
+//		Query setting of specified variable.
+//
+u8
+GetHalDefVar8192CUsb(
+	IN	PADAPTER				Adapter,
+	IN	HAL_DEF_VARIABLE		eVariable,
+	IN	PVOID					pValue
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8			bResult = _TRUE;
+
+	switch(eVariable)
+	{
+		case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
+			*((int *)pValue) = pHalData->dmpriv.UndecoratedSmoothedPWDB;
+			break;
+		case HAL_DEF_IS_SUPPORT_ANT_DIV:
+			#ifdef CONFIG_ANTENNA_DIVERSITY
+			*((u8 *)pValue) = (IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0))?_FALSE:_TRUE;
+			#endif
+			break;			
+		case HAL_DEF_CURRENT_ANTENNA:
+			#ifdef CONFIG_ANTENNA_DIVERSITY
+			*(( u8*)pValue) = pHalData->CurAntenna;			
+			#endif
+			break;
+		case HAL_DEF_DRVINFO_SZ:
+			*(( u32*)pValue) = DRVINFO_SZ;
+			break;
+		case HAL_DEF_MAX_RECVBUF_SZ:
+			*(( u32*)pValue) = MAX_RECVBUF_SZ;
+			break;
+		case HAL_DEF_RX_PACKET_OFFSET:
+			*(( u32*)pValue) = RXDESC_SIZE + DRVINFO_SZ;
+			break;
+		case HAL_DEF_DBG_DUMP_RXPKT:
+			*(( u8*)pValue) = pHalData->bDumpRxPkt;
+			break;
+		case HAL_DEF_DBG_DM_FUNC:
+			*(( u8*)pValue) = pHalData->dmpriv.DMFlag;
+			break;	
+		default:
+			//RT_TRACE(COMP_INIT, DBG_WARNING, ("GetHalDefVar8192CUsb(): Unkown variable: %d!\n", eVariable));
+			bResult = _FALSE;
+			break;
+	}
+
+	return bResult;
+}
+
+
+
+
+//
+//	Description:
+//		Change default setting of specified variable.
+//
+u8
+SetHalDefVar8192CUsb(
+	IN	PADAPTER				Adapter,
+	IN	HAL_DEF_VARIABLE		eVariable,
+	IN	PVOID					pValue
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8			bResult = _TRUE;
+
+	switch(eVariable)
+	{
+		case HAL_DEF_DBG_DUMP_RXPKT:
+			pHalData->bDumpRxPkt = *(( u8*)pValue);
+			break;
+		case HAL_DEF_DBG_DM_FUNC:
+			{
+				u8 dm_func = *(( u8*)pValue);
+				struct dm_priv	*pdmpriv = &pHalData->dmpriv;	
+				
+				if(dm_func == 0){ //disable all dynamic func
+					pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE;
+					DBG_8192C("==> Disable all dynamic function...\n");
+				}
+				else if(dm_func == 1){//disable DIG
+					pdmpriv->DMFlag &= (~DYNAMIC_FUNC_DIG);
+					DBG_8192C("==> Disable DIG...\n");
+				}
+				else if(dm_func == 2){//disable High power
+					pdmpriv->DMFlag &= (~DYNAMIC_FUNC_HP);
+				}
+				else if(dm_func == 3){//disable tx power tracking
+					pdmpriv->DMFlag &= (~DYNAMIC_FUNC_SS);
+					DBG_8192C("==> Disable tx power tracking...\n");
+				}
+				else if(dm_func == 4){//disable BT coexistence
+					pdmpriv->DMFlag &= (~DYNAMIC_FUNC_BT);
+				}
+				else if(dm_func == 5){//disable antenna diversity
+					pdmpriv->DMFlag &= (~DYNAMIC_FUNC_ANT_DIV);
+				}				
+				else if(dm_func == 6){//turn on all dynamic func
+					if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_DIG))
+					{
+						struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+						DIG_T	*pDigTable = &pdmpriv->DM_DigTable;
+						pDigTable->PreIGValue = rtw_read8(Adapter,0xc50);	
+					}
+						
+					pdmpriv->DMFlag |= (DYNAMIC_FUNC_DIG|DYNAMIC_FUNC_HP|DYNAMIC_FUNC_SS|
+						DYNAMIC_FUNC_BT|DYNAMIC_FUNC_ANT_DIV) ;
+					DBG_8192C("==> Turn on all dynamic function...\n");
+				}			
+			}
+			break;
+		default:
+			//RT_TRACE(COMP_INIT, DBG_TRACE, ("SetHalDefVar819xUsb(): Unkown variable: %d!\n", eVariable));
+			bResult = _FALSE;
+			break;
+	}
+
+	return bResult;
+}
+
+u32  _update_92cu_basic_rate(_adapter *padapter, unsigned int mask)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
+#ifdef CONFIG_BT_COEXIST
+	struct btcoexist_priv	*pbtpriv = &(pHalData->bt_coexist);
+#endif
+	unsigned int BrateCfg = 0;
+
+#ifdef CONFIG_BT_COEXIST
+	if(	(pbtpriv->BT_Coexist) &&	(pbtpriv->BT_CoexistType == BT_CSR_BC4)	)
+	{
+		BrateCfg = mask  & 0x151;
+		//DBG_8192C("BT temp disable cck 2/5.5/11M, (0x%x = 0x%x)\n", REG_RRSR, BrateCfg & 0x151);
+	}
+	else
+#endif
+	{
+		if(pHalData->VersionID != VERSION_TEST_CHIP_88C)
+			BrateCfg = mask  & 0x15F;
+		else	//for 88CU 46PING setting, Disable CCK 2M, 5.5M, Others must tuning
+			BrateCfg = mask  & 0x159;
+	}
+
+	BrateCfg |= 0x01; // default enable 1M ACK rate					
+
+	return BrateCfg;
+}
+
+void _update_response_rate(_adapter *padapter,unsigned int mask)
+{
+	u8	RateIndex = 0;
+	// Set RRSR rate table.
+	rtw_write8(padapter, REG_RRSR, mask&0xff);
+	rtw_write8(padapter,REG_RRSR+1, (mask>>8)&0xff);
+
+	// Set RTS initial rate
+	while(mask > 0x1)
+	{
+		mask = (mask>> 1);
+		RateIndex++;
+	}
+	rtw_write8(padapter, REG_INIRTS_RATE_SEL, RateIndex);
+}
+
+void UpdateHalRAMask8192CUsb(PADAPTER padapter, u32 mac_id)
+{
+	//volatile unsigned int result;
+	u8	init_rate=0;
+	u8	networkType, raid;	
+	u32	mask;
+	u8	shortGIrate = _FALSE;
+	int	supportRateNum = 0;
+	struct sta_info	*psta;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX 		*cur_network = &(pmlmeinfo->network);
+#ifdef CONFIG_BT_COEXIST
+	struct btcoexist_priv	*pbtpriv = &(pHalData->bt_coexist);
+#endif
+
+	if (mac_id >= NUM_STA) //CAM_SIZE
+	{
+		return;
+	}
+
+	psta = pmlmeinfo->FW_sta_info[mac_id].psta;
+	if(psta == NULL)
+	{
+		return;
+	}
+
+	switch (mac_id)
+	{
+		case 0:// for infra mode
+			supportRateNum = rtw_get_rateset_len(cur_network->SupportedRates);
+			networkType = judge_network_type(padapter, cur_network->SupportedRates, supportRateNum) & 0xf;
+			//pmlmeext->cur_wireless_mode = networkType;
+			raid = networktype_to_raid(networkType);
+						
+			mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
+			mask |= (pmlmeinfo->HT_enable)? update_MSC_rate(&(pmlmeinfo->HT_caps)): 0;
+			mask |= ((raid<<28)&0xf0000000);
+			
+			if (support_short_GI(padapter, &(pmlmeinfo->HT_caps)))
+			{
+				shortGIrate = _TRUE;
+			}
+			
+			break;
+
+		case 1://for broadcast/multicast
+			supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
+			if(pmlmeext->cur_wireless_mode & WIRELESS_11B)
+				networkType = WIRELESS_11B;
+			else
+				networkType = WIRELESS_11G;
+			raid = networktype_to_raid(networkType);
+
+			mask = update_basic_rate(cur_network->SupportedRates, supportRateNum);
+			mask |= ((raid<<28)&0xf0000000);
+
+			break;
+
+		default: //for each sta in IBSS
+			supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
+			networkType = judge_network_type(padapter, pmlmeinfo->FW_sta_info[mac_id].SupportedRates, supportRateNum) & 0xf;
+			//pmlmeext->cur_wireless_mode = networkType;
+			raid = networktype_to_raid(networkType);
+			
+			mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
+			mask |= ((raid<<28)&0xf0000000);
+
+			//todo: support HT in IBSS
+			
+			break;
+	}
+	
+#ifdef CONFIG_BT_COEXIST
+	if( (pbtpriv->BT_Coexist) &&
+		(pbtpriv->BT_CoexistType == BT_CSR_BC4) &&
+		(pbtpriv->BT_CUR_State) &&
+		(pbtpriv->BT_Ant_isolation) &&
+		((pbtpriv->BT_Service==BT_SCO)||
+		(pbtpriv->BT_Service==BT_Busy)) )
+		mask &= 0xffffcfc0;
+	else		
+#endif
+		mask &=0xffffffff;
+	
+	
+	init_rate = get_highest_rate_idx(mask)&0x3f;
+	
+	if(pHalData->fw_ractrl == _TRUE)
+	{
+		u8 arg = 0;
+
+		//arg = (cam_idx-4)&0x1f;//MACID
+		arg = mac_id&0x1f;//MACID
+		
+		arg |= BIT(7);
+		
+		if (shortGIrate==_TRUE)
+			arg |= BIT(5);
+
+		DBG_871X("update raid entry, mask=0x%x, arg=0x%x\n", mask, arg);
+
+		rtl8192c_set_raid_cmd(padapter, mask, arg);	
+		
+	}
+	else
+	{
+		if (shortGIrate==_TRUE)
+			init_rate |= BIT(6);
+
+		rtw_write8(padapter, (REG_INIDATA_RATE_SEL+mac_id), init_rate);		
+	}
+
+
+	//set ra_id
+	psta->raid = raid;
+	psta->init_rate = init_rate;
+
+	//set correct initial date rate for each mac_id
+	pdmpriv->INIDATA_RATE[mac_id] = init_rate;
+}
+
+void SetBeaconRelatedRegisters8192CUsb(PADAPTER padapter)
+{
+	u32	value32;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	//reset TSF, enable update TSF, correcting TSF On Beacon 
+	
+	//REG_BCN_INTERVAL
+	//REG_BCNDMATIM
+	//REG_ATIMWND
+	//REG_TBTT_PROHIBIT
+	//REG_DRVERLYINT
+	//REG_BCN_MAX_ERR	
+	//REG_BCNTCFG //(0x510)
+	//REG_DUAL_TSF_RST
+	//REG_BCN_CTRL //(0x550) 
+
+	//BCN interval
+	rtw_write16(padapter, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval);
+	rtw_write8(padapter, REG_ATIMWND, 0x02);// 2ms
+
+	_InitBeaconParameters(padapter);
+
+	rtw_write8(padapter, REG_SLOT, 0x09);
+
+	value32 =rtw_read32(padapter, REG_TCR); 
+	value32 &= ~TSFRST;
+	rtw_write32(padapter,  REG_TCR, value32); 
+
+	value32 |= TSFRST;
+	rtw_write32(padapter, REG_TCR, value32); 
+
+	// NOTE: Fix test chip's bug (about contention windows's randomness)
+	rtw_write8(padapter,  REG_RXTSF_OFFSET_CCK, 0x50);
+	rtw_write8(padapter, REG_RXTSF_OFFSET_OFDM, 0x50);
+
+	_BeaconFunctionEnable(padapter, _TRUE, _TRUE);
+
+	ResumeTxBeacon(padapter);
+
+	//rtw_write8(padapter, 0x422, rtw_read8(padapter, 0x422)|BIT(6));
+	
+	//rtw_write8(padapter, 0x541, 0xff);
+
+	//rtw_write8(padapter, 0x542, rtw_read8(padapter, 0x541)|BIT(0));
+
+	rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(1));
+
+}
+
+static void rtl8192cu_init_default_value(_adapter * padapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv;
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u8	i;
+
+	//init default value
+	pHalData->fw_ractrl = _FALSE;	
+	pHalData->bIQKInitialized = _FALSE;
+	if(!pwrctrlpriv->bkeepfwalive)
+		pHalData->LastHMEBoxNum = 0;
+	
+	pHalData->bIQKInitialized = _FALSE;
+	//init dm default value
+	pdmpriv->TM_Trigger = 0;
+	pdmpriv->binitialized = _FALSE;
+	pdmpriv->prv_traffic_idx = 3;
+	pdmpriv->initialize = 0;
+
+	pdmpriv->ThermalValue_HP_index = 0;
+	for(i = 0; i < HP_THERMAL_NUM; i++)
+		pdmpriv->ThermalValue_HP[i] = 0;
+}
+static u8 rtl8192cu_ps_func(PADAPTER Adapter,HAL_INTF_PS_FUNC efunc_id, u8 *val)
+{	
+	u8 bResult = _TRUE;
+	switch(efunc_id){
+
+		#if defined(CONFIG_AUTOSUSPEND) && defined(SUPPORT_HW_RFOFF_DETECTED)
+		case HAL_USB_SELECT_SUSPEND:
+			{				
+				u8 bfwpoll = *(( u8*)val);
+				rtl8192c_set_FwSelectSuspend_cmd(Adapter,bfwpoll ,500);//note fw to support hw power down ping detect
+			}		
+			break;
+		#endif //CONFIG_AUTOSUSPEND && SUPPORT_HW_RFOFF_DETECTED
+
+		default:
+			break;
+	}
+	return bResult;
+}
+void rtl8192cu_set_hal_ops(_adapter * padapter)
+{
+	struct hal_ops	*pHalFunc = &padapter->HalFunc;
+
+_func_enter_;
+
+	padapter->HalData = rtw_zmalloc(sizeof(HAL_DATA_TYPE));
+	if(padapter->HalData == NULL){
+		DBG_8192C("cant not alloc memory for HAL DATA \n");
+	}
+	//_rtw_memset(padapter->HalData, 0, sizeof(HAL_DATA_TYPE));
+
+	pHalFunc->hal_init = &rtl8192cu_hal_init;
+	pHalFunc->hal_deinit = &rtl8192cu_hal_deinit;
+
+	//pHalFunc->free_hal_data = &rtl8192c_free_hal_data;
+
+	pHalFunc->inirp_init = &rtl8192cu_inirp_init;
+	pHalFunc->inirp_deinit = &rtl8192cu_inirp_deinit;
+
+	pHalFunc->init_xmit_priv = &rtl8192cu_init_xmit_priv;
+	pHalFunc->free_xmit_priv = &rtl8192cu_free_xmit_priv;
+
+	pHalFunc->init_recv_priv = &rtl8192cu_init_recv_priv;
+	pHalFunc->free_recv_priv = &rtl8192cu_free_recv_priv;
+#ifdef CONFIG_SW_LED
+	pHalFunc->InitSwLeds = &rtl8192cu_InitSwLeds;
+	pHalFunc->DeInitSwLeds = &rtl8192cu_DeInitSwLeds;
+#else //case of hw led or no led
+	pHalFunc->InitSwLeds = NULL;
+	pHalFunc->DeInitSwLeds = NULL;
+#endif//CONFIG_SW_LED
+
+	//pHalFunc->dm_init = &rtl8192c_init_dm_priv;
+	//pHalFunc->dm_deinit = &rtl8192c_deinit_dm_priv;
+
+	pHalFunc->init_default_value = &rtl8192cu_init_default_value;
+	pHalFunc->intf_chip_configure = &rtl8192cu_interface_configure;
+	pHalFunc->read_adapter_info = &ReadAdapterInfo8192CU;
+
+	//pHalFunc->set_bwmode_handler = &PHY_SetBWMode8192C;
+	//pHalFunc->set_channel_handler = &PHY_SwChnl8192C;
+
+	//pHalFunc->hal_dm_watchdog = &rtl8192c_HalDmWatchDog;
+
+	pHalFunc->SetHwRegHandler = &SetHwReg8192CU;
+	pHalFunc->GetHwRegHandler = &GetHwReg8192CU;
+  	pHalFunc->GetHalDefVarHandler = &GetHalDefVar8192CUsb;
+ 	pHalFunc->SetHalDefVarHandler = &SetHalDefVar8192CUsb;
+
+	pHalFunc->UpdateRAMaskHandler = &UpdateHalRAMask8192CUsb;
+	pHalFunc->SetBeaconRelatedRegistersHandler = &SetBeaconRelatedRegisters8192CUsb;
+
+	//pHalFunc->Add_RateATid = &rtl8192c_Add_RateATid;
+
+//#ifdef CONFIG_SW_ANTENNA_DIVERSITY
+	//pHalFunc->SwAntDivBeforeLinkHandler = &SwAntDivBeforeLink8192C;
+	//pHalFunc->SwAntDivCompareHandler = &SwAntDivCompare8192C;
+//#endif
+
+	pHalFunc->hal_xmit = &rtl8192cu_hal_xmit;
+	pHalFunc->mgnt_xmit = &rtl8192cu_mgnt_xmit;
+	
+	//pHalFunc->read_bbreg = &rtl8192c_PHY_QueryBBReg;
+	//pHalFunc->write_bbreg = &rtl8192c_PHY_SetBBReg;
+	//pHalFunc->read_rfreg = &rtl8192c_PHY_QueryRFReg;
+	//pHalFunc->write_rfreg = &rtl8192c_PHY_SetRFReg;
+
+#ifdef CONFIG_HOSTAPD_MLME
+	pHalFunc->hostap_mgnt_xmit_entry = &rtl8192cu_hostap_mgnt_xmit_entry;
+#endif
+	pHalFunc->interface_ps_func = &rtl8192cu_ps_func;
+	
+	rtl8192c_set_hal_ops(pHalFunc);
+_func_exit_;
+
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/usb_ops_ce.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/usb_ops_ce.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/usb_ops_ce.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/usb_ops_ce.c	2017-09-23 03:42:49.954675260 +0800
@@ -0,0 +1,1208 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#define _HCI_OPS_OS_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <osdep_intf.h>
+
+#ifndef PLATFORM_OS_CE
+    #error "PLATFORM_OS_CE shall be set \n"
+#endif
+
+#ifndef CONFIG_USB_HCI
+	#error "CONFIG_USB_HCI shall be on!\n"
+#endif
+
+#include <usb_ops.h>
+#include <recv_osdep.h>
+
+#include <circ_buf.h>
+
+
+struct zero_bulkout_context
+{
+	void *pbuf;
+	void *purb;
+	void *pirp;
+	void *padapter;
+};
+
+
+
+#define PUSB_ERROR LPDWORD
+#define USBD_HALTED(Status) ((ULONG)(Status) >> 30 == 3)
+
+
+USB_PIPE ffaddr2pipehdl(struct dvobj_priv *pNdisCEDvice, u32 addr);
+
+
+static NTSTATUS usb_async_interrupt_in_complete( LPVOID Context );
+static NTSTATUS usb_async_interrupt_out_complete( LPVOID Context );
+
+DWORD usb_write_port_complete( LPVOID Context );
+DWORD usb_read_port_complete( LPVOID Context );
+
+void usb_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
+{
+_func_enter_;
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__));
+_func_exit_;
+}
+
+
+
+BOOL
+CloseTransferHandle(
+    LPCUSB_FUNCS   pUsbFuncs,
+    USB_TRANSFER   hTransfer
+    )
+{
+    BOOL bRc = TRUE;
+
+    // This assert may fail on suprise remove,
+    // but should pass during normal I/O.
+    // ASSERT( pUsbFuncs->lpIsTransferComplete(hTransfer) ); 
+
+    // CloseTransfer aborts any pending transfers
+    if ( !pUsbFuncs->lpCloseTransfer(hTransfer) ) {
+     
+	RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("*** CloseTransfer ERROR:%d ***\n", GetLastError()));	
+        bRc = FALSE;
+    }
+
+    return bRc;
+}
+
+
+BOOL
+GetTransferStatus(
+    LPCUSB_FUNCS   pUsbFuncs,
+    USB_TRANSFER   hTransfer,
+    LPDWORD        pBytesTransferred , // OPTIONAL returns number of bytes transferred
+    PUSB_ERROR     pUsbError  	 // returns USB error code
+    )
+{
+
+    BOOL bRc = TRUE;
+
+    if ( pUsbFuncs->lpGetTransferStatus(hTransfer, pBytesTransferred, pUsbError) ) {
+        if ( USB_NO_ERROR != *pUsbError ) {
+		RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("*** CloseTransfer ERROR:%d ***\n", GetLastError()));		
+            RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("GetTransferStatus (BytesTransferred:%d, UsbError:0x%x)\n", pBytesTransferred?*pBytesTransferred:-1, pUsbError?*pUsbError:-1 )); 
+        }
+    } else {
+        RT_TRACE( _module_hci_ops_os_c_, _drv_err_,("*** GetTransferStatus ERROR:%d ***\n", GetLastError())); 
+        *pUsbError = USB_CANCELED_ERROR;
+        bRc = FALSE;
+    }
+
+    return bRc;
+}
+
+
+// The driver should never read RxCmd register. We have to set
+// RCR CMDHAT0 (bit6) to append Rx status before the Rx frame.
+//
+// |<--------  pBulkUrb->TransferBufferLength  ------------>|
+// +------------------+-------------------+------------+
+//  | Rx status (16 bytes)  | Rx frame .....             | CRC(4 bytes) |
+// +------------------+-------------------+------------+
+// ^
+// ^pRfd->Buffer.VirtualAddress
+//
+/*! \brief USB RX IRP Complete Routine.
+	@param Context pointer of RT_RFD
+*/
+u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
+{
+    struct intf_priv	*pintfpriv		= pintfhdl->pintfpriv;
+    struct dvobj_priv	*pdvobj_priv	= (struct dvobj_priv*)pintfpriv->intf_dev;
+    _adapter			*adapter		= (_adapter *)pdvobj_priv->padapter;
+
+	struct recv_priv	*precvpriv	= &adapter->recvpriv;
+
+	struct recv_buf		*precvbuf	= (struct recv_buf *)rmem;
+	DWORD dwErr = ERROR_SUCCESS ;
+	DWORD dwBytesTransferred = 0 ;
+	USB_TRANSFER hTransfer = NULL;
+	USB_PIPE	hPipe;
+	LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs;
+
+_func_enter_;
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_read_port(%u)\n", __LINE__));
+
+#if (CONFIG_PWRCTRL == 1)
+    if (adapter->pwrctrlpriv.pnp_bstop_trx)
+	{
+        return _FALSE;
+    }
+#endif
+
+	if(adapter->bDriverStopped || adapter->bSurpriseRemoved) 
+	{
+		RT_TRACE(_module_hci_ops_os_c_, _drv_info_,("usb_read_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved)!!!\n"));
+		return _FALSE;
+	}
+
+	if(precvbuf !=NULL)
+	{
+
+		// get a recv buffer
+		rtl8192cu_init_recvbuf(adapter, precvbuf);
+	
+
+
+		_rtw_spinlock(&precvpriv->lock);
+		precvpriv->rx_pending_cnt++;
+		precvbuf->irp_pending = _TRUE;
+		_rtw_spinunlock(&precvpriv->lock);
+
+
+		//translate DMA FIFO addr to pipehandle
+		hPipe = ffaddr2pipehdl(pdvobj_priv, addr);
+		
+
+		RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_read_port(%u)\n", __LINE__));
+
+		precvbuf->usb_transfer_read_port = (*usb_funcs_vp->lpIssueBulkTransfer)(
+			hPipe,
+			usb_read_port_complete,
+			precvbuf,
+			USB_IN_TRANSFER|USB_SHORT_TRANSFER_OK,
+			MAX_RECVBUF_SZ,
+			precvbuf->pbuf,
+			0);
+
+
+		if(precvbuf->usb_transfer_read_port)
+		{
+			
+		//	  GetTransferStatus(usb_funcs_vp, hTransfer, &dwBytesTransferred,&UsbRc);
+
+		//	  CloseTransferHandle(usb_funcs_vp, hTransfer);
+
+		}
+		else
+		{
+
+			dwErr = GetLastError();
+			//RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_read_port ERROR : %d\n", dwErr));		 
+
+		}
+
+//	 	if (  USB_NO_ERROR != UsbRc && ERROR_SUCCESS == dwErr) {
+//	        dwErr = ERROR_GEN_FAILURE;
+//	    }
+
+
+		if ( ERROR_SUCCESS != dwErr ) {
+
+			SetLastError(dwErr);
+			RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_read_port ERROR : %d\n", dwErr));	
+		}
+	
+		RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("-usb_read_port(%u)\n", __LINE__));
+
+	}
+	else // if(precvbuf !=NULL)
+	{
+		
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:precv_frame ==NULL\n"));
+	}
+
+	return _TRUE;
+
+}
+
+DWORD usb_read_port_complete( PVOID context )
+{
+	struct recv_buf 	*precvbuf	= (struct recv_buf *)context;
+	_adapter			*adapter	= (_adapter *)precvbuf->adapter;
+	struct recv_priv	*precvpriv	= &adapter->recvpriv;
+
+
+	struct intf_hdl		*pintfhdl = &adapter->pio_queue->intf;
+    struct intf_priv	*pintfpriv    = pintfhdl->pintfpriv;
+    struct dvobj_priv	*pdvobj_priv  = (struct dvobj_priv*)pintfpriv->intf_dev;
+
+
+	LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs;
+
+    DWORD dwBytesTransferred    = 0;
+    DWORD dwErr                 = USB_CANCELED_ERROR;
+
+	uint isevt, *pbuf;
+	int fComplete =_FALSE;
+
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_read_port_complete(%u)\n", __LINE__));
+
+_func_enter_;
+
+
+	_rtw_spinlock_ex(&precvpriv->lock);
+	precvbuf->irp_pending=_FALSE;
+	precvpriv->rx_pending_cnt --;
+	_rtw_spinunlock_ex(&precvpriv->lock);	
+
+
+#if 1
+		
+	(*usb_funcs_vp->lpGetTransferStatus)(precvbuf->usb_transfer_read_port, &dwBytesTransferred, &dwErr);
+	fComplete = (*usb_funcs_vp->lpIsTransferComplete)(precvbuf->usb_transfer_read_port);
+	if(fComplete!=_TRUE)
+	{
+		RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete CloseTransfer before complete\n"));
+	}
+	(*usb_funcs_vp->lpCloseTransfer)(precvbuf->usb_transfer_read_port);
+	
+	
+#endif
+
+
+	if(USB_NO_ERROR != dwErr)
+		RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete Fail :%d\n",dwErr));
+	
+	{
+
+		if ( dwBytesTransferred > MAX_RECVBUF_SZ || dwBytesTransferred < RXDESC_SIZE )
+		{
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,
+				("\n usb_read_port_complete: (pbulkurb->TransferBufferLength > MAX_RECVBUF_SZ) || (pbulkurb->TransferBufferLength < RXDESC_SIZE): %d\n",dwBytesTransferred));
+			rtw_read_port(adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
+
+    	    //usb_read_port(pintfhdl, 0, 0, (unsigned char *)precvframe);
+    	}
+		else
+		{
+			precvbuf->transfer_len = dwBytesTransferred;
+
+			pbuf = (uint*)precvbuf->pbuf;
+
+			if((isevt = *(pbuf+1)&0x1ff) == 0x1ff)
+			{
+				RT_TRACE(_module_hci_ops_os_c_,_drv_info_,
+					("\n usb_read_port_complete: get a event\n"));
+				rxcmd_event_hdl(adapter, pbuf);//rx c2h events
+
+				rtw_read_port(adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
+			}
+			else
+			{
+				if(recvbuf2recvframe(adapter, precvbuf)==_FAIL)//rx packets
+				{
+					//precvbuf->reuse = _TRUE;		
+					rtw_read_port(adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
+				}
+			}
+	    }
+	}
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("-usb_read_port_complete(%u)\n", __LINE__));
+
+_func_exit_;
+	return ERROR_SUCCESS;
+//	return STATUS_MORE_PROCESSING_REQUIRED;
+}
+
+void usb_read_port_cancel(_adapter *padapter){
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_read_port_cancel(%u)\n",__FUNCTION__, __LINE__));
+}
+
+DWORD usb_write_mem_complete( LPVOID Context )
+{
+	int fComplete =_FALSE;
+	DWORD	dwBytes 	= 0;
+	DWORD	dwErr		= USB_CANCELED_ERROR;
+
+	_irqL irqL;
+	_list	*head;
+	_list *plist;
+	struct io_req	*pio_req;	
+	struct io_queue *pio_q = (struct io_queue *) Context;
+	struct intf_hdl *pintf = &(pio_q->intf);	
+	struct intf_priv *pintfpriv = pintf->pintfpriv;	
+	_adapter *padapter = (_adapter *)pintf->adapter;
+	NTSTATUS status = STATUS_SUCCESS;
+    struct xmit_priv * pxmitpriv	= &padapter->xmitpriv;
+
+	struct dvobj_priv * pdvobj_priv	= (struct dvobj_priv*)pintfpriv->intf_dev;
+
+    USB_HANDLE		usbHandle		= pdvobj_priv->usb_extension._hDevice;
+    LPCUSB_FUNCS	usb_funcs_vp	= pdvobj_priv->usb_extension._lpUsbFuncs;
+
+	// get the head from the processing io_queue
+	head = &(pio_q->processing);
+	
+_func_enter_;
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("+usb_write_mem_complete %p\n", Context));
+
+#if 1
+	_enter_critical_bh(&(pio_q->lock), &irqL);
+	
+
+	//free irp in processing list...	
+	while(rtw_is_list_empty(head) != _TRUE)
+	{
+		plist = get_next(head);	
+		rtw_list_delete(plist);
+		pio_req = LIST_CONTAINOR(plist, struct io_req, list);
+		_rtw_up_sema(&pio_req->sema);
+	}
+
+	_exit_critical_bh(&(pio_q->lock), &irqL);
+#endif
+
+
+#if 1
+		
+	(*usb_funcs_vp->lpGetTransferStatus)(pio_req->usb_transfer_write_mem , &dwBytes, &dwErr);
+	fComplete = (*usb_funcs_vp->lpIsTransferComplete)(pio_req->usb_transfer_write_mem);
+	if(fComplete!=_TRUE)
+	{
+		RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_write_mem_complete CloseTransfer before complete\n"));
+	}
+	(*usb_funcs_vp->lpCloseTransfer)(pio_req->usb_transfer_write_mem );
+	
+#endif
+	
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("-usb_write_mem_complete\n"));
+
+_func_exit_;
+
+
+	return STATUS_MORE_PROCESSING_REQUIRED;
+
+}
+
+
+void usb_write_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem)
+{
+
+	NTSTATUS NtStatus = STATUS_SUCCESS;
+    USB_PIPE	hPipe;
+	_irqL	irqL;
+
+	int 	fComplete	= _FALSE;
+	DWORD	dwBytes 	= 0;
+	DWORD	dwErr		= USB_CANCELED_ERROR;
+
+
+	struct io_req 		*pio_req;
+
+	_adapter 			*adapter 	= (_adapter *)pintfhdl->adapter;
+	struct intf_priv 	*pintfpriv	= pintfhdl->pintfpriv;
+	struct dvobj_priv   * pdvobj_priv   = (struct dvobj_priv*)pintfpriv->intf_dev;
+
+	 
+    struct xmit_priv	*pxmitpriv	= &adapter->xmitpriv;
+	struct io_queue 	*pio_queue 	= (struct io_queue *)adapter->pio_queue; 
+
+	LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs;
+
+
+_func_enter_;
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_write_mem(%u) pintfhdl %p wmem %p\n", __LINE__, pintfhdl, wmem));
+
+	// fetch a io_request from the io_queue
+	pio_req = alloc_ioreq(pio_queue);
+		
+	if ((pio_req == NULL)||(adapter->bSurpriseRemoved))
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("async_irp_write32 : pio_req =0x%x adapter->bSurpriseRemoved=0x%x",pio_req,adapter->bSurpriseRemoved ));
+		goto exit;
+	}	
+
+	_enter_critical_bh(&(pio_queue->lock), &irqL);
+
+
+	// insert the io_request into processing io_queue
+	rtw_list_insert_tail(&(pio_req->list),&(pio_queue->processing));
+	
+	
+	if((adapter->bDriverStopped) || (adapter->bSurpriseRemoved) ||(adapter->pwrctrlpriv.pnp_bstop_trx)) 
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\npadapter->pwrctrlpriv.pnp_bstop_trx==_TRUE\n"));
+		goto exit;
+	}
+	
+	//translate DMA FIFO addr to pipehandle
+	hPipe = ffaddr2pipehdl(pdvobj_priv, addr);	
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_,("usb_write_mem(%u)\n",__LINE__));
+
+	pio_req->usb_transfer_write_mem = (*usb_funcs_vp->lpIssueBulkTransfer)(
+		hPipe,
+		usb_write_mem_complete, 
+		pio_queue,
+		USB_OUT_TRANSFER,
+		cnt,
+		wmem,
+		0);
+
+#if 0
+
+	(*usb_funcs_vp->lpGetTransferStatus)(pio_req->usb_transfer_write_mem , &dwBytes, &dwErr);
+
+	while( fComplete != _TRUE)
+	{
+		fComplete = (*usb_funcs_vp->lpIsTransferComplete)(pio_req->usb_transfer_write_mem);
+		if(fComplete==_TRUE)
+		{
+			(*usb_funcs_vp->lpCloseTransfer)(pio_req->usb_transfer_write_mem );
+			RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_write_mem finished\n"));
+			break;
+		}
+		else
+		{
+			RT_TRACE( _module_hci_ops_os_c_, _drv_err_, 
+				("usb_write_mem not yet finished %X\n", 
+				pio_req->usb_transfer_write_mem));
+			rtw_msleep_os(10);
+		}
+		
+	}
+
+#endif
+
+
+//	_rtw_down_sema(&pio_req->sema);	
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("-usb_write_mem(%X)\n",pio_req->usb_transfer_write_mem));
+
+	_exit_critical_bh(&(pio_queue->lock), &irqL);
+
+	_rtw_down_sema(&pio_req->sema); 
+	free_ioreq(pio_req, pio_queue);
+
+exit:
+_func_exit_;
+	return;
+}
+
+u32 usb_write_cnt=0;
+u32 usb_complete_cnt=0;
+
+USB_PIPE ffaddr2pipehdl(struct dvobj_priv *pNdisCEDvice, u32 addr)
+{
+	USB_PIPE	PipeHandle = NULL;
+	_adapter	*padapter = pNdisCEDvice->padapter;
+
+	
+	if(pNdisCEDvice->nr_endpoint == 11)
+	{		
+		switch(addr)
+		{	    
+	     		case RTL8712_DMA_BEQ:
+		 		PipeHandle= padapter->halpriv.pipehdls_r8712[3] ; 
+				break;
+	     		case RTL8712_DMA_BKQ:
+			 	PipeHandle=  padapter->halpriv.pipehdls_r8712[4]; 
+				break;
+	     		case RTL8712_DMA_VIQ:
+		 		PipeHandle=  padapter->halpriv.pipehdls_r8712[2]; 
+				break;
+	    		case RTL8712_DMA_VOQ:
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[1]; 
+				break;					
+                     case RTL8712_DMA_BCNQ:	
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[6]; 
+				break;	 	
+			case RTL8712_DMA_BMCQ:	//HI Queue
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[7]; 
+				break;	
+			case RTL8712_DMA_MGTQ:				
+		 		PipeHandle=  padapter->halpriv.pipehdls_r8712[8]; 
+				break;
+                     case RTL8712_DMA_RX0FF:
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[0]; 
+				break;	 	
+			case RTL8712_DMA_C2HCMD:		 	
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[5]; 
+				break;
+			case RTL8712_DMA_H2CCMD:
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[9]; 
+				break;	
+				
+		}
+
+	}
+	else if(pNdisCEDvice->nr_endpoint == 6)
+	{
+		switch(addr)
+		{	    
+			case RTL8712_DMA_BEQ:
+		 		PipeHandle=  padapter->halpriv.pipehdls_r8712[3]; 
+				break;
+	     	case RTL8712_DMA_BKQ:
+			 	PipeHandle=  padapter->halpriv.pipehdls_r8712[4]; 
+				break;
+	     	case RTL8712_DMA_VIQ:
+		 		PipeHandle=  padapter->halpriv.pipehdls_r8712[2]; 
+				break;
+	    	case RTL8712_DMA_VOQ:                   		
+		 		PipeHandle=  padapter->halpriv.pipehdls_r8712[1]; 
+				break;
+			case RTL8712_DMA_RX0FF:
+			case RTL8712_DMA_C2HCMD:		 	
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[0]; 
+				break;
+			case RTL8712_DMA_H2CCMD:
+			case RTL8712_DMA_BCNQ:					
+			case RTL8712_DMA_BMCQ:	
+			case RTL8712_DMA_MGTQ:			
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[5]; 
+				break;	
+				
+		}
+
+	}
+	else if(pNdisCEDvice->nr_endpoint == 4)
+	{
+		switch(addr)
+		{	    
+	     	case RTL8712_DMA_BEQ:
+		 	case RTL8712_DMA_BKQ:
+			 	PipeHandle=  padapter->halpriv.pipehdls_r8712[2]; 
+				break;
+     		case RTL8712_DMA_VIQ:
+		 	case RTL8712_DMA_VOQ:					
+		 		PipeHandle=  padapter->halpriv.pipehdls_r8712[1]; 
+				break;
+			case RTL8712_DMA_RX0FF:
+			case RTL8712_DMA_C2HCMD:		 	
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[0]; 
+				break;
+			case RTL8712_DMA_H2CCMD:	
+			case RTL8712_DMA_BCNQ:					
+			case RTL8712_DMA_BMCQ:	
+			case RTL8712_DMA_MGTQ:				
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[3]; 
+				break;	
+		}
+	
+	}
+	else
+	{
+	   RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("ffaddr2pipehdl():nr_endpoint=%d error!\n", pNdisCEDvice->nr_endpoint));	   
+	}
+		
+	return PipeHandle;
+
+}
+
+DWORD usb_bulkout_zero_complete( LPVOID pZeroContext )
+{
+	struct zero_bulkout_context *pcontext = (struct zero_bulkout_context *)pZeroContext;
+	_adapter * padapter = pcontext->padapter;
+    struct dvobj_priv *	pdvobj_priv = (struct dvobj_priv *)&padapter->dvobjpriv;
+	LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs;
+	struct xmit_priv  * pxmitpriv	= &padapter->xmitpriv;
+
+	int 	fComplete			=_FALSE;
+	DWORD	dwBytesTransferred	= 0;
+	DWORD	dwErr				= USB_CANCELED_ERROR;
+
+_func_enter_;
+
+#if 1
+				
+	(*usb_funcs_vp->lpGetTransferStatus)(pxmitpriv->usb_transfer_write_port, &dwBytesTransferred, &dwErr);
+	fComplete = (*usb_funcs_vp->lpIsTransferComplete)(pxmitpriv->usb_transfer_write_port);
+	if(fComplete!=_TRUE)
+	{
+		RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_bulkout_zero_complete CloseTransfer before complete\n"));
+	}
+	(*usb_funcs_vp->lpCloseTransfer)(pxmitpriv->usb_transfer_write_port);
+	
+#endif
+
+	if(pcontext)
+	{
+		if(pcontext->pbuf)
+		{			
+			rtw_mfree(pcontext->pbuf, sizeof(int));	
+		}	
+
+		rtw_mfree((u8*)pcontext, sizeof(struct zero_bulkout_context));	
+	}	
+
+_func_exit_;
+
+	return ERROR_SUCCESS;
+	
+
+}
+
+u32 usb_bulkout_zero(struct intf_hdl *pintfhdl, u32 addr)
+{	
+	struct zero_bulkout_context *pcontext;
+	unsigned char *pbuf;
+	u8 len = 0 ;
+	_adapter *padapter = (_adapter *)pintfhdl->adapter;
+	struct dvobj_priv	*pdvobj = (struct dvobj_priv *)&padapter->dvobjpriv;	
+	struct xmit_priv	* pxmitpriv     = &padapter->xmitpriv;
+     
+
+	LPCUSB_FUNCS usb_funcs_vp = pdvobj->usb_extension._lpUsbFuncs;
+
+	USB_PIPE	hPipe;
+
+_func_enter_;
+
+	if((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx))
+	{		
+		return _FAIL;
+	}
+
+
+	pcontext = (struct zero_bulkout_context *)rtw_zmalloc(sizeof(struct zero_bulkout_context));
+
+	pbuf = (unsigned char *)rtw_zmalloc(sizeof(int));	
+
+	len = 0;
+	
+	pcontext->pbuf = pbuf;
+	pcontext->purb = NULL;
+	pcontext->pirp = NULL;
+	pcontext->padapter = padapter;
+                    
+
+//translate DMA FIFO addr to pipehandle
+	hPipe = ffaddr2pipehdl(pdvobj, addr);
+
+
+
+
+	pxmitpriv->usb_transfer_write_port = (*usb_funcs_vp->lpIssueBulkTransfer)(
+						        hPipe, usb_bulkout_zero_complete, 
+						        pcontext, USB_OUT_TRANSFER,
+					    	    len, pbuf, 0);
+
+	
+_func_exit_;
+	
+	return _SUCCESS;
+
+}
+
+u32 usb_write_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem)
+{
+
+    u32	i, bwritezero = _FALSE;
+	u32	ac_tag = addr;
+
+    u8*	ptr;
+
+	struct intf_priv    * pintfpriv     = pintfhdl->pintfpriv;
+	struct dvobj_priv   * pdvobj_priv   = (struct dvobj_priv*)pintfpriv->intf_dev;
+	_adapter            * padapter      = pdvobj_priv->padapter;
+
+    struct xmit_priv	* pxmitpriv     = &padapter->xmitpriv;
+    struct xmit_frame   * pxmitframe    = (struct xmit_frame *)wmem;
+
+	LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs;
+
+    USB_PIPE	hPipe;
+
+	u32			bResult = _FALSE;
+
+_func_enter_;
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("+usb_write_port\n"));
+
+#if (CONFIG_PWRCTRL == 1)
+    if(padapter->pwrctrlpriv.pnp_bstop_trx==_TRUE){
+       	RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("\npadapter->pwrctrlpriv.pnp_bstop_trx==_TRUE\n"));
+
+    }
+#endif
+
+	if((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx))
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n"));
+		bResult = _FALSE;
+		goto exit;
+	}
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_write_port(%u)\n", __LINE__));
+
+	for(i=0; i<8; i++)
+	{
+		if(pxmitframe->bpending[i] == _FALSE)
+		{
+			_rtw_spinlock(&pxmitpriv->lock);	
+			pxmitpriv->txirp_cnt++;
+			pxmitframe->bpending[i]  = _TRUE;
+			_rtw_spinunlock(&pxmitpriv->lock);
+			
+			pxmitframe->sz[i] = cnt;
+			pxmitframe->ac_tag[i] = ac_tag;
+
+			break;
+		}
+	}	
+
+
+	//TODO:
+	if (pdvobj_priv->ishighspeed)
+	{
+		if(cnt> 0 && cnt%512 == 0)
+		{
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("ishighspeed, cnt=%d\n", cnt));
+		//	cnt=cnt+1;
+			bwritezero = _TRUE;
+
+		}	
+	}
+	else
+	{
+		if(cnt > 0 && cnt%64 == 0)
+		{
+			RT_TRACE(_module_hci_ops_os_c_,_drv_info_,("cnt=%d\n", cnt));
+		//	cnt=cnt+1;
+			bwritezero = _TRUE;
+
+		}	
+	}
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_write_port: pipe handle convert\n"));
+
+	//translate DMA FIFO addr to pipehandle
+	hPipe = ffaddr2pipehdl(pdvobj_priv, addr);
+
+
+#if 0
+	// for tx fifo, the maximum payload number is 8,
+	// we workaround this issue here by separate whole fifo into 8 segments.
+	if (cnt <= 500)
+		cnt = 500;
+#endif
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_,
+		("usb_write_port(%u): pxmitframe %X  pxmitframe->padapter %X\n",__LINE__, pxmitframe, pxmitframe->padapter));
+
+	pxmitpriv->usb_transfer_write_port = (*usb_funcs_vp->lpIssueBulkTransfer)(
+						        hPipe, usb_write_port_complete, 
+						        pxmitframe, USB_OUT_TRANSFER,
+					    	    cnt, pxmitframe->mem_addr, 0);
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__));
+
+	ptr=(u8 *)&pxmitframe->mem;
+
+#if 0
+	if (pdvobj_priv->ishighspeed)
+	{
+		ptr=ptr+512;
+	}
+	else
+	{
+		ptr=ptr+64;
+
+	}
+#endif
+	if(bwritezero == _TRUE)
+	{
+		usb_bulkout_zero(pintfhdl, addr);
+	}
+
+//	if (!pxmitframe->usb_transfer_xmit)
+//	    padapter->bSurpriseRemoved=_TRUE;
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__));
+	bResult = _SUCCESS;
+
+exit:
+_func_exit_;
+	return bResult;
+}
+
+DWORD usb_write_port_complete( LPVOID Context )
+{
+
+//    u8 *ptr;
+
+    struct xmit_frame *	pxmitframe  = (struct xmit_frame *) Context;
+    _adapter          * padapter    = pxmitframe->padapter;
+    struct dvobj_priv *	pdvobj_priv = (struct dvobj_priv *)&padapter->dvobjpriv;
+	struct xmit_priv  * pxmitpriv   = &padapter->xmitpriv;
+	struct xmit_buf *pxmitbuf = pxmitframe->pxmitbuf;
+	LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs;
+
+	int		fComplete			=_FALSE;
+	DWORD	dwBytesTransferred	= 0;
+	DWORD	dwErr				= USB_CANCELED_ERROR;
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u), pxmitframe %X\n",__FUNCTION__, __LINE__, Context));
+
+_func_enter_;
+
+	RT_TRACE(_module_hci_ops_os_c_,_drv_info_,("+usb_write_port_complete\n"));
+
+	_rtw_spinlock_ex(&pxmitpriv->lock);	
+	pxmitpriv->txirp_cnt--;
+	_rtw_spinunlock_ex(&pxmitpriv->lock);
+
+	if(pxmitpriv->txirp_cnt==0){
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete: txirp_cnt== 0, set allrxreturnevt!\n"));		
+		_rtw_up_sema(&(pxmitpriv->tx_retevt));
+	}
+
+
+	//not to consider tx fragment
+	rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);		
+
+
+#if 1
+			
+	(*usb_funcs_vp->lpGetTransferStatus)(pxmitpriv->usb_transfer_write_port, &dwBytesTransferred, &dwErr);
+	fComplete = (*usb_funcs_vp->lpIsTransferComplete)(pxmitpriv->usb_transfer_write_port);
+	if(fComplete!=_TRUE)
+	{
+		RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_write_port_complete CloseTransfer before complete\n"));
+	}
+	(*usb_funcs_vp->lpCloseTransfer)(pxmitpriv->usb_transfer_write_port);
+
+#else
+
+	if((*usb_funcs_vp->lpIsTransferComplete)(pxmitpriv->usb_transfer_write_port))
+	{
+		(*usb_funcs_vp->lpCloseTransfer)(pxmitpriv->usb_transfer_write_port);
+	}
+
+#endif
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, 
+		("%s(%u): pxmitpriv %X pxmitpriv->free_xmitframe_cnt %X pxmitframe->padapter %X pxmitframe->padapter %X\n", 
+		__LINE__, pxmitpriv, pxmitpriv->free_xmitframe_cnt, pxmitframe->padapter));
+
+    rtl8192cu_xmitframe_complete(padapter, pxmitpriv, pxmitbuf);
+
+_func_exit_;
+
+    return STATUS_SUCCESS;
+}
+
+DWORD usb_write_scsi_complete(LPVOID pTxContext) 
+{
+#ifndef PLATFORM_OS_CE
+	struct SCSI_BUFFER_ENTRY *psb_entry = (struct SCSI_BUFFER_ENTRY *)pTxContext;
+	_adapter 				 *padapter 	= psb_entry->padapter;
+	struct SCSI_BUFFER 		 *psb 		= padapter->pscsi_buf;
+	struct xmit_priv 		 *pxmitpriv = &(padapter->xmitpriv);
+    struct dvobj_priv 		*pdvobj_priv = (struct dvobj_priv *)&padapter->dvobjpriv;
+	LPCUSB_FUNCS 		  	 lpUsbFuncs = pdvobj_priv->pUsbExtension->_lpUsbFuncs;
+
+	int 	fComplete			=_FALSE;
+	DWORD	dwBytesTransferred	= 0;
+	DWORD	dwErr				= USB_CANCELED_ERROR;
+
+_func_enter_;
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u): circ_space = %d\n",__FUNCTION__, __LINE__, CIRC_SPACE( psb->head,psb->tail,  SCSI_BUFFER_NUMBER)));
+
+#if 1
+				
+	(*lpUsbFuncs->lpGetTransferStatus)(psb_entry->usb_transfer_scsi_txcmd, &dwBytesTransferred, &dwErr);
+	fComplete = (*lpUsbFuncs->lpIsTransferComplete)(psb_entry->usb_transfer_scsi_txcmd);
+	if(fComplete!=_TRUE)
+	{
+		RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_write_scsi_complete CloseTransfer before complete\n"));
+	}
+	(*lpUsbFuncs->lpCloseTransfer)(psb_entry->usb_transfer_scsi_txcmd);
+	
+#else
+
+	if((*lpUsbFuncs->lpIsTransferComplete)(psb_entry->usb_transfer_scsi_txcmd))
+		(*lpUsbFuncs->lpCloseTransfer)(psb_entry->usb_transfer_scsi_txcmd);
+#endif
+
+	memset(psb_entry->entry_memory, 0, 8);
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__));
+	if((psb->tail+1)==SCSI_BUFFER_NUMBER)
+		psb->tail=0;
+	else 
+		psb->tail++;
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__));
+	if(CIRC_CNT(psb->head,psb->tail,SCSI_BUFFER_NUMBER)==0){
+		RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("write_txcmd_scsififo_callback: up_sema\n"));
+		_rtw_up_sema(&pxmitpriv->xmit_sema);
+	}
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__));
+	if(padapter->bSurpriseRemoved) {
+		return STATUS_MORE_PROCESSING_REQUIRED;
+	}
+
+_func_exit_;
+#endif
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__));
+	return STATUS_MORE_PROCESSING_REQUIRED;
+}
+
+uint usb_write_scsi(struct intf_hdl *pintfhdl, u32 cnt, u8 *wmem)
+{
+
+#ifndef PLATFORM_OS_CE
+
+	_adapter 		  *padapter = (_adapter *)pintfhdl->adapter;
+	struct dvobj_priv *pdev 	= (struct dvobj_priv*)&padapter->dvobjpriv;
+
+	struct SCSI_BUFFER       *psb      =padapter->pscsi_buf;
+	struct SCSI_BUFFER_ENTRY *psb_entry=LIST_CONTAINOR(wmem,struct SCSI_BUFFER_ENTRY,entry_memory);
+
+_func_enter_;
+	if(padapter->bSurpriseRemoved||padapter->bDriverStopped)
+		return 0;
+	
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__));
+	psb_entry->usb_transfer_scsi_txcmd=pdev->pUsbExtension->_lpUsbFuncs->lpIssueBulkTransfer(
+			pdev->scsi_out_pipehandle,
+			usb_write_scsi_complete,
+			psb_entry,
+			USB_OUT_TRANSFER,
+			cnt,
+			wmem,
+			0);
+	
+_func_exit_;
+#endif
+
+   return _SUCCESS;  
+}
+
+
+/*
+ */
+uint usb_init_intf_priv(struct intf_priv *pintfpriv)
+{
+	// get the dvobj_priv object
+	struct dvobj_priv * pNdisCEDvice = (struct dvobj_priv *) pintfpriv->intf_dev;
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__));
+	// set init intf_priv init status as _IOREADY
+	pintfpriv->intf_status = _IOREADY;
+
+	//  determine the max io size by dvobj_priv.ishighspeed
+	if(pNdisCEDvice->ishighspeed)
+		pintfpriv->max_iosz =  128;
+	else
+		pintfpriv->max_iosz =  64;
+
+	//  read/write size set as 0
+	pintfpriv->io_wsz = 0;
+	pintfpriv->io_rsz = 0;
+
+	//  init io_rwmem buffer
+	pintfpriv->allocated_io_rwmem = rtw_zmalloc(pintfpriv->max_iosz +4);
+	if (pintfpriv->allocated_io_rwmem == NULL)
+	{
+		rtw_mfree((u8 *)(pintfpriv->allocated_io_rwmem), pintfpriv->max_iosz +4);
+		return _FAIL;
+	}
+	else
+	{
+		// word align the io_rwmem
+		pintfpriv->io_rwmem = pintfpriv->allocated_io_rwmem + 4 - ( (u32)(pintfpriv->allocated_io_rwmem) & 3);
+	}
+
+#ifndef PLATFORM_OS_CE
+
+	//  init io_r_mem buffer
+	pintfpriv->allocated_io_r_mem = rtw_zmalloc(pintfpriv->max_iosz +4);
+	if (pintfpriv->allocated_io_r_mem == NULL)
+	{
+		rtw_mfree((u8 *)(pintfpriv->allocated_io_r_mem), pintfpriv->max_iosz +4);
+		return _FAIL;
+	}
+	else
+	{
+		// word align the io_rwmem
+		pintfpriv->io_r_mem = pintfpriv->allocated_io_r_mem + 4 - ( (u32)(pintfpriv->allocated_io_r_mem) & 3);
+	}
+#endif
+
+	return _SUCCESS;
+}
+
+void usb_unload_intf_priv(struct intf_priv *pintfpriv)
+{
+#ifndef PLATFORM_OS_CE
+
+	rtw_mfree((u8 *)(pintfpriv->allocated_io_rwmem), pintfpriv->max_iosz+4);
+	rtw_mfree((u8 *)(pintfpriv->allocated_io_r_mem), pintfpriv->max_iosz+4);
+#endif
+
+	RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__));
+}
+
+
+
+void usb_write_port_cancel(_adapter *padapter)
+{
+
+	sint i,j;
+	struct dvobj_priv   *pdev = &padapter->dvobjpriv;
+	struct xmit_priv *pxmitpriv=&padapter->xmitpriv;
+	struct xmit_frame *pxmitframe;
+
+	_rtw_spinlock(&pxmitpriv->lock);
+	pxmitpriv->txirp_cnt--; //decrease 1 for Initialize ++
+	_rtw_spinunlock(&pxmitpriv->lock);
+	
+	if (pxmitpriv->txirp_cnt) 
+	{
+		// Canceling Pending Recv Irp
+		pxmitframe= (struct xmit_frame *)pxmitpriv->pxmit_frame_buf;
+		
+		for( i = 0; i < NR_XMITFRAME; i++ )
+		{
+			for(j=0;j<8;j++)
+			{
+				if (pxmitframe->bpending[j]==_TRUE)
+				{			
+
+					RT_TRACE(_module_hci_ops_os_c_,_drv_err_,(" usb_write_port_cancel() :IoCancelIrp\n"));
+
+				}
+			}
+			
+			pxmitframe++;
+		}
+
+		_rtw_down_sema(&(pxmitpriv->tx_retevt));
+		
+	}
+
+}
+
+DWORD usbctrl_vendorreq_complete(LPVOID lpvNotifyParameter)
+{
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv*)lpvNotifyParameter;
+
+	RT_TRACE(_module_hci_ops_os_c_,_drv_debug_,("+usbctrl_vendorreq_complete\n"));
+	
+    return STATUS_SUCCESS;
+}
+
+
+int usbctrl_vendorreq(struct intf_priv *pintfpriv, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype)
+{
+	u8			ret=_TRUE;
+//	NTSTATUS	ntstatus;
+//	int 		fComplete;
+//	LPCUSB_DEVICE		lpDeviceInfo;
+
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv  *)pintfpriv->intf_dev;   
+
+    USB_TRANSFER        usbTrans;
+    USB_DEVICE_REQUEST  usb_device_req;
+    USB_HANDLE      usbHandle   = pdvobjpriv->usb_extension._hDevice;
+    LPCUSB_FUNCS    usbFuncs    = pdvobjpriv->usb_extension._lpUsbFuncs;
+
+	u32	transfer_flags = 0;
+
+	_func_enter_;
+
+    memset( &usb_device_req, 0, sizeof( USB_DEVICE_REQUEST ) );
+
+    if( 0x01 == requesttype )
+	{
+        usb_device_req.bmRequestType = USB_REQUEST_DEVICE_TO_HOST | USB_REQUEST_VENDOR | USB_REQUEST_FOR_DEVICE;
+    }
+	else
+    {
+        usb_device_req.bmRequestType = USB_REQUEST_HOST_TO_DEVICE | USB_REQUEST_VENDOR | USB_REQUEST_FOR_DEVICE;
+    }
+
+	usb_device_req.bRequest 		= request;
+	usb_device_req.wValue 			= value;
+	usb_device_req.wIndex 	    	= index;
+	usb_device_req.wLength 	    	= len;    
+
+	if (requesttype == 0x01)
+	{
+		transfer_flags = USB_IN_TRANSFER;//read_in
+	}
+	else
+	{
+		transfer_flags= USB_OUT_TRANSFER;//write_out
+	}
+
+	RT_TRACE(_module_hci_ops_os_c_,_drv_debug_,("+usbctrl_vendorreq\n",__FUNCTION__,__LINE__));
+
+#if 0
+	// Remember to add callback for sync
+	usbTrans = (*usbFuncs->lpIssueVendorTransfer)(usbHandle, 
+							usbctrl_vendorreq_complete, pdvobjpriv, 
+							transfer_flags, &usb_device_req, pdata, 0);
+#else
+	// Remember to add callback for sync
+	usbTrans = (*usbFuncs->lpIssueVendorTransfer)(usbHandle, 
+							NULL, 0, 
+							transfer_flags, &usb_device_req, pdata, 0);
+#endif
+
+//	rtw_usleep_os(10);
+
+	if ( usbTrans )
+	{
+		DWORD	dwBytes 	= 0;
+		DWORD	dwErr		= USB_CANCELED_ERROR;
+		int 	fComplete;
+
+		(*usbFuncs->lpGetTransferStatus)(usbTrans, &dwBytes, &dwErr);
+
+		fComplete = (*usbFuncs->lpIsTransferComplete)(usbTrans);
+
+		if (fComplete== _TRUE)
+		{
+			(*usbFuncs->lpCloseTransfer)(usbTrans);
+			RT_TRACE(_module_hci_ops_os_c_,_drv_debug_,("usbctrl_vendorreq lpCloseTransfer\n"));
+		}
+
+		if ( dwErr != USB_NO_ERROR || fComplete != _TRUE)
+		{
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usbctrl_vendorreq lpCloseTransfer without complete\n"));
+			ret = _FALSE;
+			goto exit;
+		}
+	}
+	else
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usbctrl_vendorreq without usbTrans\n"));
+		ret = _FALSE;
+		goto exit;
+
+	}
+
+exit:
+	RT_TRACE(_module_hci_ops_os_c_,_drv_debug_,("-usbctrl_vendorreq\n"));
+_func_exit_;
+	
+	return ret;	
+
+}
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/usb_ops_linux.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/usb_ops_linux.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/usb_ops_linux.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/usb_ops_linux.c	2017-09-23 03:42:49.954675260 +0800
@@ -0,0 +1,2043 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#define _HCI_OPS_OS_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <osdep_intf.h>
+#include <usb_ops.h>
+#include <circ_buf.h>
+#include <recv_osdep.h>
+#include <rtl8192c_hal.h>
+
+#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
+
+#error "Shall be Linux or Windows, but not both!\n"
+
+#endif
+
+struct zero_bulkout_context{
+	void *pbuf;
+	void *purb;
+	void *pirp;
+	void *padapter;
+};
+
+#define REALTEK_USB_VENQT_MAX_BUF_SIZE	254
+
+#define RTW_USB_CONTROL_MSG_TIMEOUT_TEST	10	//ms
+#define RTW_USB_CONTROL_MSG_TIMEOUT	500		//ms
+//#define RTW_USB_CONTROL_MSG_TIMEOUT	5000	//ms
+
+#if defined(CONFIG_VENDOR_REQ_RETRY) && defined(CONFIG_USB_VENDOR_REQ_MUTEX)
+//vendor req retry should be in the situation when each vendor req is atomically submitted from others
+#define MAX_USBCTRL_VENDORREQ_TIMES 10
+#else
+#define MAX_USBCTRL_VENDORREQ_TIMES 1
+#endif
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)) || (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18))
+#define _usbctrl_vendorreq_async_callback(urb, regs)	_usbctrl_vendorreq_async_callback(urb)
+#define usb_bulkout_zero_complete(purb, regs)	usb_bulkout_zero_complete(purb)
+#define usb_write_mem_complete(purb, regs)	usb_write_mem_complete(purb)
+#define usb_write_port_complete(purb, regs)	usb_write_port_complete(purb)
+#define usb_read_port_complete(purb, regs)	usb_read_port_complete(purb)
+#define usb_read_interrupt_complete(purb, regs)	usb_read_interrupt_complete(purb)
+#endif
+
+static int usbctrl_vendorreq(struct dvobj_priv  *pdvobjpriv, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype)
+{
+	_adapter		*padapter = pdvobjpriv->padapter ; 
+	struct usb_device *udev=pdvobjpriv->pusbdev;
+
+	unsigned int pipe;
+	int status = 0;
+	u32 tmp_buflen=0;
+	u8 reqtype;
+	u8 *pIo_buf;
+	int vendorreq_times = 0;
+
+	#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE
+	u8 *tmp_buf;
+	#else // use stack memory
+	u8 tmp_buf[MAX_USB_IO_CTL_SIZE];
+	#endif
+
+	//DBG_871X("%s %s:%d\n",__FUNCTION__, current->comm, current->pid);
+
+	if((padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx)){
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usbctrl_vendorreq:(padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n"));
+		status = -EPERM; 
+		goto exit;
+	}	
+
+	if(len>MAX_VENDOR_REQ_CMD_SIZE){
+		DBG_8192C( "[%s] Buffer len error ,vendor request failed\n", __FUNCTION__ );
+		status = -EINVAL;
+		goto exit;
+	}	
+
+	#ifdef CONFIG_USB_VENDOR_REQ_MUTEX
+	_enter_critical_mutex(&pdvobjpriv->usb_vendor_req_mutex, NULL);
+	#endif
+	
+	
+	// Acquire IO memory for vendorreq
+#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC
+	pIo_buf = pdvobjpriv->usb_vendor_req_buf;
+#else
+	#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE
+	tmp_buf = rtw_malloc( (u32) len + ALIGNMENT_UNIT);
+	tmp_buflen =  (u32)len + ALIGNMENT_UNIT;
+	#else // use stack memory
+	tmp_buflen = MAX_USB_IO_CTL_SIZE;
+	#endif
+
+	// Added by Albert 2010/02/09
+	// For mstar platform, mstar suggests the address for USB IO should be 16 bytes alignment.
+	// Trying to fix it here.
+	pIo_buf = (tmp_buf==NULL)?NULL:tmp_buf + ALIGNMENT_UNIT -((SIZE_PTR)(tmp_buf) & 0x0f );	
+#endif
+
+	if ( pIo_buf== NULL) {
+		DBG_8192C( "[%s] pIo_buf == NULL \n", __FUNCTION__ );
+		status = -ENOMEM;
+		goto release_mutex;
+	}
+	
+	while(++vendorreq_times<= MAX_USBCTRL_VENDORREQ_TIMES)
+	{
+		_rtw_memset(pIo_buf, 0, len);
+		
+		if (requesttype == 0x01)
+		{
+			pipe = usb_rcvctrlpipe(udev, 0);//read_in
+			reqtype =  REALTEK_USB_VENQT_READ;		
+		} 
+		else 
+		{
+			pipe = usb_sndctrlpipe(udev, 0);//write_out
+			reqtype =  REALTEK_USB_VENQT_WRITE;		
+			_rtw_memcpy( pIo_buf, pdata, len);
+		}		
+	
+		#if 0
+		//timeout test for firmware downloading
+		status = rtw_usb_control_msg(udev, pipe, request, reqtype, value, index, pIo_buf, len
+			, ((value >= FW_8192C_START_ADDRESS && value <= FW_8192C_END_ADDRESS) ||value!=0x1000) ?RTW_USB_CONTROL_MSG_TIMEOUT : RTW_USB_CONTROL_MSG_TIMEOUT_TEST
+		);
+		#else
+		status = rtw_usb_control_msg(udev, pipe, request, reqtype, value, index, pIo_buf, len, RTW_USB_CONTROL_MSG_TIMEOUT);
+		#endif
+	
+		if ( status == len)   // Success this control transfer.
+		{
+			rtw_reset_continual_urb_error(&padapter->dvobjpriv);
+			if ( requesttype == 0x01 )
+			{   // For Control read transfer, we have to copy the read data from pIo_buf to pdata.
+				_rtw_memcpy( pdata, pIo_buf,  len );
+			}
+		}
+		else { // error cases
+			DBG_8192C("reg 0x%x, usb %s %u fail, status:%d value=0x%x, vendorreq_times:%d\n"
+				, value,(requesttype == 0x01)?"read":"write" , len, status, *(u32*)pdata, vendorreq_times);
+			
+			if (status < 0) {
+				if(status == (-ESHUTDOWN)	|| status == -ENODEV	)
+				{			
+					padapter->bSurpriseRemoved = _TRUE;
+				} else {
+					#ifdef DBG_CONFIG_ERROR_DETECT
+					{
+						HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+						pHalData->srestpriv.Wifi_Error_Status = USB_VEN_REQ_CMD_FAIL;
+					}
+					#endif
+				}
+			}
+			else // status != len && status >= 0
+			{
+				if(status > 0) {
+					if ( requesttype == 0x01 )
+					{   // For Control read transfer, we have to copy the read data from pIo_buf to pdata.
+						_rtw_memcpy( pdata, pIo_buf,  len );
+					}
+				}
+			}
+
+			if(rtw_inc_and_chk_continual_urb_error(&padapter->dvobjpriv) == _TRUE ){
+				padapter->bSurpriseRemoved = _TRUE;
+				break;
+			}
+	
+		}
+	
+		// firmware download is checksumed, don't retry
+		if( (value >= FW_8192C_START_ADDRESS && value <= FW_8192C_END_ADDRESS) || status == len )
+			break;
+	
+	}
+	
+	// release IO memory used by vendorreq
+	#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE
+	rtw_mfree(tmp_buf, tmp_buflen);
+	#endif
+
+release_mutex:
+	#ifdef CONFIG_USB_VENDOR_REQ_MUTEX
+	_exit_critical_mutex(&pdvobjpriv->usb_vendor_req_mutex, NULL);
+	#endif
+exit:
+	return status;
+
+}
+
+static u8 usb_read8(struct intf_hdl *pintfhdl, u32 addr)
+{
+	u8 request;
+	u8 requesttype;
+	u16 wvalue;
+	u16 index;
+	u16 len;
+	u32 data=0;	
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv  *)pintfhdl->pintf_dev;   
+	
+	_func_enter_;
+
+	request = 0x05;
+	requesttype = 0x01;//read_in
+	index = 0;//n/a
+
+	wvalue = (u16)(addr&0x0000ffff);
+	len = 1;	
+	
+	usbctrl_vendorreq(pdvobjpriv, request, wvalue, index, &data, len, requesttype);
+
+	_func_exit_;
+
+	return (u8)(le32_to_cpu(data)&0x0ff);
+		
+}
+
+static u16 usb_read16(struct intf_hdl *pintfhdl, u32 addr)
+{       
+	u8 request;
+	u8 requesttype;
+	u16 wvalue;
+	u16 index;
+	u16 len;
+	u32 data=0;
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv  *)pintfhdl->pintf_dev;   
+	
+	_func_enter_;
+
+	request = 0x05;
+	requesttype = 0x01;//read_in
+	index = 0;//n/a
+
+	wvalue = (u16)(addr&0x0000ffff);
+	len = 2;	
+	
+	usbctrl_vendorreq(pdvobjpriv, request, wvalue, index, &data, len, requesttype);
+
+	_func_exit_;
+
+	return (u16)(le32_to_cpu(data)&0xffff);
+	
+}
+
+static u32 usb_read32(struct intf_hdl *pintfhdl, u32 addr)
+{
+	u8 request;
+	u8 requesttype;
+	u16 wvalue;
+	u16 index;
+	u16 len;
+	u32 data=0;
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv  *)pintfhdl->pintf_dev;  
+	
+	_func_enter_;
+
+	request = 0x05;
+	requesttype = 0x01;//read_in
+	index = 0;//n/a
+
+	wvalue = (u16)(addr&0x0000ffff);
+	len = 4;	
+	
+	usbctrl_vendorreq(pdvobjpriv, request, wvalue, index, &data, len, requesttype);
+
+	_func_exit_;
+
+	return le32_to_cpu(data);
+	
+}
+
+static int usb_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val)
+{
+	u8 request;
+	u8 requesttype;
+	u16 wvalue;
+	u16 index;
+	u16 len;
+	u32 data;
+	int ret;
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv  *)pintfhdl->pintf_dev;   
+	
+	_func_enter_;
+
+	request = 0x05;
+	requesttype = 0x00;//write_out
+	index = 0;//n/a
+
+	wvalue = (u16)(addr&0x0000ffff);
+	len = 1;
+	
+	data = val;
+	data = cpu_to_le32(data&0x000000ff);
+	
+	 ret = usbctrl_vendorreq(pdvobjpriv, request, wvalue, index, &data, len, requesttype);
+	
+	_func_exit_;
+	
+	return ret;
+	
+}
+
+static int usb_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val)
+{	
+	u8 request;
+	u8 requesttype;
+	u16 wvalue;
+	u16 index;
+	u16 len;
+	u32 data;
+	int ret;
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv  *)pintfhdl->pintf_dev;   
+	
+	_func_enter_;
+
+	request = 0x05;
+	requesttype = 0x00;//write_out
+	index = 0;//n/a
+
+	wvalue = (u16)(addr&0x0000ffff);
+	len = 2;
+	
+	data = val;
+	data = cpu_to_le32(data&0x0000ffff);
+	
+	ret = usbctrl_vendorreq(pdvobjpriv, request, wvalue, index, &data, len, requesttype);
+	
+	_func_exit_;
+	
+	return ret;
+	
+}
+
+static int usb_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val)
+{
+	u8 request;
+	u8 requesttype;
+	u16 wvalue;
+	u16 index;
+	u16 len;
+	u32 data;
+	int ret;
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv  *)pintfhdl->pintf_dev;   
+	
+	_func_enter_;
+
+	request = 0x05;
+	requesttype = 0x00;//write_out
+	index = 0;//n/a
+
+	wvalue = (u16)(addr&0x0000ffff);
+	len = 4;
+	data = cpu_to_le32(val);	
+	
+
+	ret =usbctrl_vendorreq(pdvobjpriv, request, wvalue, index, &data, len, requesttype);
+	
+	_func_exit_;
+	
+	return ret;
+	
+}
+#define VENDOR_CMD_MAX_DATA_LEN	254
+static int usb_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata)
+{
+	u8 request;
+	u8 requesttype;
+	u16 wvalue;
+	u16 index;
+	u16 len;
+	u8 buf[VENDOR_CMD_MAX_DATA_LEN]={0};
+	int ret;
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv  *)pintfhdl->pintf_dev;  
+	
+	_func_enter_;
+
+	request = 0x05;
+	requesttype = 0x00;//write_out
+	index = 0;//n/a
+
+	wvalue = (u16)(addr&0x0000ffff);
+	len = length;
+	 _rtw_memcpy(buf, pdata, len );
+	
+	ret = usbctrl_vendorreq(pdvobjpriv, request, wvalue, index, buf, len, requesttype);
+	
+	_func_exit_;
+	
+	return ret;
+	
+}
+
+#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ
+static void _usbctrl_vendorreq_async_callback(struct urb *urb, struct pt_regs *regs)
+{
+	if(urb){
+		if(urb->context){
+			kfree(urb->context);
+		}
+		usb_free_urb(urb);
+	}
+}
+
+static int _usbctrl_vendorreq_async_write(struct usb_device *udev, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype)
+{
+
+	int rc;
+	unsigned int pipe;	
+	u8 reqtype;
+	struct usb_ctrlrequest *dr;
+	struct urb *urb;
+	struct rtl819x_async_write_data {
+		u8 data[REALTEK_USB_VENQT_MAX_BUF_SIZE];
+		struct usb_ctrlrequest dr;
+	} *buf;	
+				
+	if (requesttype == VENDOR_READ){
+		pipe = usb_rcvctrlpipe(udev, 0);//read_in
+		reqtype =  REALTEK_USB_VENQT_READ;		
+	} 
+	else {
+		pipe = usb_sndctrlpipe(udev, 0);//write_out
+		reqtype =  REALTEK_USB_VENQT_WRITE;		
+	}		
+	
+	//buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
+	buf = (struct rtl819x_async_write_data *)rtw_zmalloc(sizeof(*buf));
+	if (!buf) {
+		rc = -ENOMEM;
+		goto exit;
+	}
+
+	urb = usb_alloc_urb(0, GFP_ATOMIC);
+	if (!urb) {
+		rtw_mfree((u8*)buf,sizeof(*buf));
+		rc = -ENOMEM;
+		goto exit;
+	}
+
+	dr = &buf->dr;
+
+	dr->bRequestType = reqtype;
+	dr->bRequest = request;
+	dr->wValue = cpu_to_le16(value);
+	dr->wIndex = cpu_to_le16(index);
+	dr->wLength = cpu_to_le16(len);
+
+	_rtw_memcpy(buf, pdata, len);
+
+	usb_fill_control_urb(urb, udev, pipe,
+			     (unsigned char *)dr, buf, len,
+			     _usbctrl_vendorreq_async_callback, buf);
+
+	rc = usb_submit_urb(urb, GFP_ATOMIC);
+	if (rc < 0) {
+		rtw_mfree((u8*)buf,sizeof(*buf));
+		usb_free_urb(urb);
+	}
+	
+exit:
+	return rc;
+
+}
+
+static int usb_write_async(struct usb_device *udev, u32 addr, u32 val, u16 len)
+{
+	u8 request;
+	u8 requesttype;
+	u16 wvalue;
+	u16 index;
+	u32 data;
+	int ret;
+	
+	requesttype = VENDOR_WRITE;//write_out	
+	request = REALTEK_USB_VENQT_CMD_REQ;
+	index = REALTEK_USB_VENQT_CMD_IDX;//n/a
+
+	wvalue = (u16)(addr&0x0000ffff);
+	data = val & (0xffffffff >> ((4 - len) * 8));
+	data = cpu_to_le32(data);
+	
+	ret = _usbctrl_vendorreq_async_write(udev, request, wvalue, index, &data, len, requesttype);
+
+	return ret;
+}
+static int usb_async_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val)
+{	
+	u32 data;
+	int ret;
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv  *)pintfhdl->pintf_dev;   
+	struct usb_device *udev=pdvobjpriv->pusbdev;
+
+	_func_enter_;
+	data = cpu_to_le32(val & 0xFF);	
+	ret = usb_write_async(udev, addr, val, 1);
+	_func_exit_;	
+
+	return ret;
+}
+
+static int usb_async_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val)
+{	
+	u32 data;
+	int ret;
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv  *)pintfhdl->pintf_dev;   
+	struct usb_device *udev=pdvobjpriv->pusbdev;
+
+	_func_enter_;
+	data = cpu_to_le32(val & 0xFFFF);	
+	ret = usb_write_async(udev, addr, val, 2);
+	_func_exit_;	
+
+	return ret;
+}
+static int usb_async_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val)
+{	
+	u32 data;
+	int ret;
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv  *)pintfhdl->pintf_dev;   
+	struct usb_device *udev=pdvobjpriv->pusbdev;
+
+	_func_enter_;
+	data = cpu_to_le32(val);	
+	ret = usb_write_async(udev, addr, val, 4);
+	_func_exit_;	
+
+	return ret;
+}
+#endif
+
+static unsigned int ffaddr2pipehdl(struct dvobj_priv *pdvobj, u32 addr)
+{
+	unsigned int pipe=0;
+	int ep_num=0;
+	_adapter *padapter = pdvobj->padapter;
+	struct usb_device *pusbd = pdvobj->pusbdev;	
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
+
+	if(addr == RECV_BULK_IN_ADDR)
+	{	
+		pipe=usb_rcvbulkpipe(pusbd, 0x01);
+
+		return pipe;
+	}
+
+	if(addr == RECV_INT_IN_ADDR)
+	{	
+		pipe=usb_rcvbulkpipe(pusbd, 0x04);
+
+		return pipe;
+	}
+
+	if(addr < HW_QUEUE_ENTRY) 
+	{
+		ep_num = (pHalData->Queue2EPNum[(u8)addr] & 0x0f);
+		
+		pipe = usb_sndbulkpipe(pusbd, ep_num);
+
+		return pipe;
+	}
+
+	return pipe;
+
+}
+
+static void usb_bulkout_zero_complete(struct urb *purb, struct pt_regs *regs)
+{	
+	struct zero_bulkout_context *pcontext = (struct zero_bulkout_context *)purb->context;
+
+	//DBG_8192C("+usb_bulkout_zero_complete\n");
+	
+	if(pcontext)
+	{
+		if(pcontext->pbuf)
+		{			
+			rtw_mfree(pcontext->pbuf, sizeof(int));	
+		}	
+
+		if(pcontext->purb && (pcontext->purb==purb))
+		{
+			usb_free_urb(pcontext->purb);
+		}
+
+	
+		rtw_mfree((u8*)pcontext, sizeof(struct zero_bulkout_context));	
+	}	
+	
+
+}
+
+static u32 usb_bulkout_zero(struct intf_hdl *pintfhdl, u32 addr)
+{	
+	int pipe, status, len;
+	u32 ret;
+	unsigned char *pbuf;
+	struct zero_bulkout_context *pcontext;
+	PURB	purb = NULL;	
+	_adapter *padapter = (_adapter *)pintfhdl->padapter;
+	struct dvobj_priv *pdvobj = (struct dvobj_priv *)&padapter->dvobjpriv;	
+	struct usb_device *pusbd = pdvobj->pusbdev;
+
+	//DBG_8192C("+usb_bulkout_zero\n");
+	
+		
+	if((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx))
+	{		
+		return _FAIL;
+	}
+	
+
+	pcontext = (struct zero_bulkout_context *)rtw_zmalloc(sizeof(struct zero_bulkout_context));
+
+	pbuf = (unsigned char *)rtw_zmalloc(sizeof(int));	
+    	purb = usb_alloc_urb(0, GFP_ATOMIC);
+      	
+	len = 0;
+	pcontext->pbuf = pbuf;
+	pcontext->purb = purb;
+	pcontext->pirp = NULL;
+	pcontext->padapter = padapter;
+
+	
+	//translate DMA FIFO addr to pipehandle
+	//pipe = ffaddr2pipehdl(pdvobj, addr);	
+
+	usb_fill_bulk_urb(purb, pusbd, pipe, 
+       				pbuf,
+              			len,
+              			usb_bulkout_zero_complete,
+              			pcontext);//context is pcontext
+
+	status = usb_submit_urb(purb, GFP_ATOMIC);
+
+	if (!status)
+	{		
+		ret= _SUCCESS;
+	}
+	else
+	{
+		ret= _FAIL;
+	}
+	
+	
+	return _SUCCESS;
+
+}
+
+static void usb_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
+{
+	
+}
+
+static void usb_write_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem)
+{
+	
+}
+
+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
+static void usb_read_interrupt_complete(struct urb *purb, struct pt_regs *regs)
+{
+	int	err;
+	_adapter		*padapter = (_adapter	 *)purb->context;
+
+	if(purb->status==0)//SUCCESS
+	{
+		if (purb->actual_length > sizeof(INTERRUPT_MSG_FORMAT_EX))
+		{
+			DBG_8192C("usb_read_interrupt_complete: purb->actual_length > sizeof(INTERRUPT_MSG_FORMAT_EX) \n");
+		}
+
+		err = usb_submit_urb(purb, GFP_ATOMIC);
+		if((err) && (err != (-EPERM)))
+		{
+			DBG_8192C("cannot submit interrupt in-token(err = 0x%08x),urb_status = %d\n",err, purb->status);
+		}
+	}
+	else
+	{
+		DBG_8192C("###=> usb_read_interrupt_complete => urb status(%d)\n", purb->status);
+
+		switch(purb->status) {
+			case -EINVAL:
+			case -EPIPE:			
+			case -ENODEV:
+			case -ESHUTDOWN:
+				//padapter->bSurpriseRemoved=_TRUE;
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n"));
+			case -ENOENT:
+				padapter->bDriverStopped=_TRUE;			
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n"));
+				break;
+			case -EPROTO:
+				break;
+			case -EINPROGRESS:
+				DBG_8192C("ERROR: URB IS IN PROGRESS!/n");
+				break;
+			default:
+				break;				
+		}
+	}	
+
+}
+
+static u32 usb_read_interrupt(struct intf_hdl *pintfhdl, u32 addr)
+{
+	int	err;
+	unsigned int pipe;
+	u32	ret = _SUCCESS;
+	struct dvobj_priv	*pdvobj = (struct dvobj_priv *)pintfhdl->pintf_dev;
+	_adapter			*adapter = (_adapter *)pdvobj->padapter;
+	struct recv_priv	*precvpriv = &adapter->recvpriv;
+	struct usb_device	*pusbd = pdvobj->pusbdev;
+
+_func_enter_;
+
+	//translate DMA FIFO addr to pipehandle
+	pipe = ffaddr2pipehdl(pdvobj, addr);
+
+	usb_fill_int_urb(precvpriv->int_in_urb, pusbd, pipe, 
+					precvpriv->int_in_buf,
+            				sizeof(INTERRUPT_MSG_FORMAT_EX),
+            				usb_read_interrupt_complete,
+            				adapter,
+            				1);
+
+	err = usb_submit_urb(precvpriv->int_in_urb, GFP_ATOMIC);
+	if((err) && (err != (-EPERM)))
+	{
+		DBG_8192C("cannot submit interrupt in-token(err = 0x%08x),urb_status = %d\n",err, precvpriv->int_in_urb->status);
+		ret = _FAIL;
+	}
+
+_func_exit_;
+
+	return ret;
+}
+#endif
+
+#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX
+static int recvbuf2recvframe(_adapter *padapter, struct recv_buf *precvbuf)
+{
+	u8	*pbuf;
+	u8	frag, mf, shift_sz = 0;
+	u16	pkt_cnt, drvinfo_sz;
+	u32	pkt_len, pkt_offset, skb_len, alloc_sz;
+	s32	transfer_len;
+	struct recv_stat	*prxstat;
+	_pkt	*pkt_copy = NULL;	
+	union recv_frame	*precvframe = NULL; 
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
+	struct recv_priv	*precvpriv = &padapter->recvpriv;
+	_queue			*pfree_recv_queue = &precvpriv->free_recv_queue;
+
+
+	transfer_len = (s32)precvbuf->transfer_len;	
+	pbuf = precvbuf->pbuf;
+
+	prxstat = (struct recv_stat *)pbuf;	
+	pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff;
+	
+#if 0 //temp remove when disable usb rx aggregation
+	if((pkt_cnt > 10) || (pkt_cnt < 1) || (transfer_len<RXDESC_SIZE) ||(pkt_len<=0))
+	{		
+		return _FAIL;
+	}
+#endif
+	
+	do{		
+		RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
+			 ("recvbuf2recvframe: rxdesc=offsset 0:0x%08x, 4:0x%08x, 8:0x%08x, C:0x%08x\n",
+			  prxstat->rxdw0, prxstat->rxdw1, prxstat->rxdw2, prxstat->rxdw4));
+
+		prxstat = (struct recv_stat *)pbuf;	   
+		pkt_len =  le32_to_cpu(prxstat->rxdw0)&0x00003fff;	
+		
+
+		mf = (le32_to_cpu(prxstat->rxdw1) >> 27) & 0x1;//more fragment bit
+		frag = (le32_to_cpu(prxstat->rxdw2) >> 12) & 0xf;//fragmentation number
+
+		drvinfo_sz = (le32_to_cpu(prxstat->rxdw0) & 0x000f0000) >> 16;
+		drvinfo_sz = drvinfo_sz << 3;//uint (2^3) = 8 bytes; REG_RX_DRVINFO_SZ
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe: DRV_INFO_SIZE=%d\n", drvinfo_sz));
+
+		pkt_offset = pkt_len + drvinfo_sz + RXDESC_SIZE;
+
+		if((pkt_len<=0) || (pkt_offset>transfer_len))
+		{	
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe: pkt_len<=0\n"));
+			goto _exit_recvbuf2recvframe;
+		}		
+
+		//	Modified by Albert 20101213
+		//	For 8 bytes IP header alignment.
+		if ( ( le32_to_cpu( prxstat->rxdw0 ) >> 23 ) & 0x01 )	//	Qos data, wireless lan header length is 26
+		{
+			shift_sz = 6;
+		}
+		else
+		{
+			shift_sz = 0;
+		}
+
+		precvframe = rtw_alloc_recvframe(pfree_recv_queue);
+		if(precvframe==NULL)
+		{
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: precvframe==NULL\n"));
+			goto _exit_recvbuf2recvframe;
+		}
+
+		_rtw_init_listhead(&precvframe->u.hdr.list);	
+		precvframe->u.hdr.precvbuf = NULL;	//can't access the precvbuf for new arch.
+		precvframe->u.hdr.len=0;
+
+		//skb_len = pkt_offset;
+		skb_len = pkt_len;
+
+		// for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet.
+		// modify alloc_sz for recvive crc error packet by thomas 2011-06-02
+		if((mf ==1)&&(frag == 0)){
+			//alloc_sz = 1664;	//1664 is 128 alignment.
+			if(skb_len <= 1650)
+				alloc_sz = 1664;
+			else
+				alloc_sz = skb_len + 14;
+		}
+		else {
+			alloc_sz = skb_len;
+			//	6 is for IP header 8 bytes alignment in QoS packet case.
+			//	8 is for skb->data 4 bytes alignment.
+			alloc_sz += 14;
+		}
+	
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html
+		pkt_copy = dev_alloc_skb(alloc_sz);
+#else			
+		pkt_copy = netdev_alloc_skb(padapter->pnetdev, alloc_sz);
+#endif		
+		if(pkt_copy)
+		{
+			pkt_copy->dev = padapter->pnetdev;
+			precvframe->u.hdr.pkt = pkt_copy;
+			skb_reserve( pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data ) & 7 ));//force pkt_copy->data at 8-byte alignment address
+			skb_reserve( pkt_copy, shift_sz );//force ip_hdr at 8-byte alignment address according to shift_sz.
+			_rtw_memcpy(pkt_copy->data, (pbuf + drvinfo_sz + RXDESC_SIZE), skb_len);
+			precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pkt_copy->data;
+			precvframe->u.hdr.rx_end = pkt_copy->data + alloc_sz;
+		}
+		else
+		{
+			DBG_8192C("recvbuf2recvframe:can not allocate memory for skb copy\n");				
+			//precvframe->u.hdr.pkt = skb_clone(pskb, GFP_ATOMIC);	
+			//precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pbuf;
+			//precvframe->u.hdr.rx_end = pbuf + (pkt_offset>1612?pkt_offset:1612);
+
+			precvframe->u.hdr.pkt = NULL;
+			rtw_free_recvframe(precvframe, pfree_recv_queue);
+
+			goto _exit_recvbuf2recvframe;
+		}
+
+		recvframe_put(precvframe, skb_len);
+		//recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE);	
+
+#ifdef CONFIG_USB_RX_AGGREGATION
+		switch(pHalData->UsbRxAggMode)
+		{
+			case USB_RX_AGG_DMA:
+			case USB_RX_AGG_MIX:
+				pkt_offset = (u16)_RND128(pkt_offset);
+				break;
+				case USB_RX_AGG_USB:
+				pkt_offset = (u16)_RND4(pkt_offset);
+				break;
+			case USB_RX_AGG_DISABLE:			
+			default:				
+				break;
+		}
+#endif
+
+		//because the endian issue, driver avoid reference to the rxstat after calling update_recvframe_attrib_from_recvstat();
+		rtl8192cu_update_recvframe_attrib_from_recvstat(precvframe, prxstat);		
+
+		if(rtw_recv_entry(precvframe) != _SUCCESS)
+		{
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n"));
+		}
+
+		pkt_cnt--;
+		transfer_len -= pkt_offset;
+		pbuf += pkt_offset;	
+		precvframe = NULL;
+		pkt_copy = NULL;
+
+		if(transfer_len>0 && pkt_cnt==0)
+			pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff;
+
+	}while((transfer_len>0) && (pkt_cnt>0));
+
+_exit_recvbuf2recvframe:
+
+	return _SUCCESS;	
+}
+
+void rtl8192cu_recv_tasklet(void *priv)
+{	
+	struct recv_buf *precvbuf = NULL;
+	_adapter	*padapter = (_adapter*)priv;
+	struct recv_priv	*precvpriv = &padapter->recvpriv;
+
+	while (NULL != (precvbuf = rtw_dequeue_recvbuf(&precvpriv->recv_buf_pending_queue)))
+	{
+		if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE))
+		{
+			DBG_8192C("recv_tasklet => bDriverStopped or bSurpriseRemoved \n");
+			
+			break;
+		}
+		
+
+		recvbuf2recvframe(padapter, precvbuf);
+
+		rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
+	}	
+	
+}
+
+static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
+{	
+	struct recv_buf	*precvbuf = (struct recv_buf *)purb->context;	
+	_adapter 			*padapter =(_adapter *)precvbuf->adapter;
+	struct recv_priv	*precvpriv = &padapter->recvpriv;
+
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete!!!\n"));
+	
+	precvpriv->rx_pending_cnt --;
+		
+	if(padapter->bSurpriseRemoved || padapter->bDriverStopped||padapter->bReadPortCancel)
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", padapter->bDriverStopped, padapter->bSurpriseRemoved));		
+
+		goto exit;
+	}
+
+	if(purb->status==0)//SUCCESS
+	{
+		if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE))
+		{
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: (purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)\n"));
+
+			rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
+		}
+		else 
+		{			
+			rtw_reset_continual_urb_error(&padapter->dvobjpriv);
+			
+			precvbuf->transfer_len = purb->actual_length;	
+
+			//rtw_enqueue_rx_transfer_buffer(precvpriv, rx_transfer_buf);			
+			rtw_enqueue_recvbuf(precvbuf, &precvpriv->recv_buf_pending_queue);
+
+			tasklet_schedule(&precvpriv->recv_tasklet);			
+		}		
+	}
+	else
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete : purb->status(%d) != 0 \n", purb->status));
+	
+		DBG_8192C("###=> usb_read_port_complete => urb status(%d)\n", purb->status);
+
+		if(rtw_inc_and_chk_continual_urb_error(&padapter->dvobjpriv) == _TRUE ){
+			padapter->bSurpriseRemoved = _TRUE;
+		}
+
+		switch(purb->status) {
+			case -EINVAL:
+			case -EPIPE:			
+			case -ENODEV:
+			case -ESHUTDOWN:
+				//padapter->bSurpriseRemoved=_TRUE;
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n"));
+			case -ENOENT:
+				padapter->bDriverStopped=_TRUE;			
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n"));
+				break;
+			case -EPROTO:
+				#ifdef DBG_CONFIG_ERROR_DETECT	
+				{	
+					HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+					pHalData->srestpriv.Wifi_Error_Status = USB_READ_PORT_FAIL;			
+				}
+				#endif
+				rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);			
+				break;
+			case -EINPROGRESS:
+				DBG_8192C("ERROR: URB IS IN PROGRESS!/n");
+				break;
+			default:
+				break;				
+		}
+		
+	}	
+
+exit:	
+	
+_func_exit_;
+	
+}
+
+static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
+{		
+	int err;
+	unsigned int pipe;
+	u32 ret = _SUCCESS;
+	PURB purb = NULL;	
+	struct recv_buf	*precvbuf = (struct recv_buf *)rmem;
+	struct dvobj_priv	*pdvobj = (struct dvobj_priv *)pintfhdl->pintf_dev;
+	_adapter		*adapter = (_adapter *)pdvobj->padapter;
+	struct recv_priv	*precvpriv = &adapter->recvpriv;
+	struct usb_device	*pusbd = pdvobj->pusbdev;
+
+_func_enter_;
+	
+	if(adapter->bDriverStopped || adapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n"));
+		return _FAIL;
+	}
+
+	if(precvbuf !=NULL)
+	{	
+		rtl8192cu_init_recvbuf(adapter, precvbuf);
+
+		if(precvbuf->pbuf)
+		{			
+			precvpriv->rx_pending_cnt++;
+		
+			purb = precvbuf->purb;		
+
+			//translate DMA FIFO addr to pipehandle
+			pipe = ffaddr2pipehdl(pdvobj, addr);	
+
+			usb_fill_bulk_urb(purb, pusbd, pipe, 
+						precvbuf->pbuf,
+                				MAX_RECVBUF_SZ,
+                				usb_read_port_complete,
+                				precvbuf);//context is precvbuf
+
+			purb->transfer_dma = precvbuf->dma_transfer_addr;
+			purb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;								
+
+			err = usb_submit_urb(purb, GFP_ATOMIC);	
+			if((err) && (err != (-EPERM)))
+			{
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("cannot submit rx in-token(err=0x%.8x), URB_STATUS =0x%.8x", err, purb->status));
+				DBG_8192C("cannot submit rx in-token(err = 0x%08x),urb_status = %d\n",err,purb->status);
+				ret = _FAIL;
+			}
+			
+		}
+			
+	}
+	else
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:precvbuf ==NULL\n"));
+		ret = _FAIL;
+	}
+
+_func_exit_;
+
+	return ret;
+}
+#else	// CONFIG_USE_USB_BUFFER_ALLOC_RX
+static int recvbuf2recvframe(_adapter *padapter, _pkt *pskb)
+{
+	u8	*pbuf;
+	u8	frag, mf, shift_sz = 0;
+	u16	pkt_cnt, drvinfo_sz;
+	u32	pkt_len, pkt_offset, skb_len, alloc_sz;
+	s32	transfer_len;
+	struct recv_stat	*prxstat;
+	_pkt				*pkt_copy = NULL;
+	union recv_frame	*precvframe = NULL;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct recv_priv	*precvpriv = &padapter->recvpriv;
+	_queue			*pfree_recv_queue = &precvpriv->free_recv_queue;
+
+
+	transfer_len = (s32)pskb->len;	
+	pbuf = pskb->data;
+
+	prxstat = (struct recv_stat *)pbuf;	
+	pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff;
+	
+#if 0 //temp remove when disable usb rx aggregation
+	if((pkt_cnt > 10) || (pkt_cnt < 1) || (transfer_len<RXDESC_SIZE) ||(pkt_len<=0))
+	{		
+		return _FAIL;
+	}
+#endif
+
+	do{		
+		RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
+			 ("recvbuf2recvframe: rxdesc=offsset 0:0x%08x, 4:0x%08x, 8:0x%08x, C:0x%08x\n",
+			  prxstat->rxdw0, prxstat->rxdw1, prxstat->rxdw2, prxstat->rxdw4));
+
+		prxstat = (struct recv_stat *)pbuf;	   
+		pkt_len =  le32_to_cpu(prxstat->rxdw0)&0x00003fff;	
+
+		mf = (le32_to_cpu(prxstat->rxdw1) >> 27) & 0x1;//more fragment bit
+		frag = (le32_to_cpu(prxstat->rxdw2) >> 12) & 0xf;//fragmentation number
+
+		drvinfo_sz = (le32_to_cpu(prxstat->rxdw0) & 0x000f0000) >> 16;
+		drvinfo_sz = drvinfo_sz << 3;//uint (2^3) = 8 bytes; REG_RX_DRVINFO_SZ
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe: DRV_INFO_SIZE=%d\n", drvinfo_sz));
+
+		pkt_offset = pkt_len + drvinfo_sz + RXDESC_SIZE;
+
+		if((pkt_len<=0) || (pkt_offset>transfer_len))
+		{	
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe: pkt_len<=0\n"));
+			goto _exit_recvbuf2recvframe;
+		}		
+
+		//	Modified by Albert 20101213
+		//	For 8 bytes IP header alignment.
+		if ( ( le32_to_cpu( prxstat->rxdw0 ) >> 23 ) & 0x01 )	//	Qos data, wireless lan header length is 26
+		{
+			shift_sz = 6;
+		}
+		else
+		{
+			shift_sz = 0;
+		}
+
+		precvframe = rtw_alloc_recvframe(pfree_recv_queue);
+		if(precvframe==NULL)
+		{
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: precvframe==NULL\n"));
+			goto _exit_recvbuf2recvframe;
+		}
+
+		_rtw_init_listhead(&precvframe->u.hdr.list);	
+		precvframe->u.hdr.precvbuf = NULL;	//can't access the precvbuf for new arch.
+		precvframe->u.hdr.len=0;
+
+		//skb_len = pkt_offset;
+		skb_len = pkt_len;
+
+		// for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet.
+		// modify alloc_sz for recvive crc error packet by thomas 2011-06-02
+		if((mf ==1)&&(frag == 0)){
+			//alloc_sz = 1664;	//1664 is 128 alignment.
+			if(skb_len <= 1650)
+				alloc_sz = 1664;
+			else
+				alloc_sz = skb_len + 14;
+		}
+		else {
+			alloc_sz = skb_len;
+			//	6 is for IP header 8 bytes alignment in QoS packet case.
+			//	8 is for skb->data 4 bytes alignment.
+			alloc_sz += 14;
+		}
+	
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html
+		pkt_copy = dev_alloc_skb(alloc_sz);
+#else			
+		pkt_copy = netdev_alloc_skb(padapter->pnetdev, alloc_sz);
+#endif		
+		if(pkt_copy)
+		{
+			pkt_copy->dev = padapter->pnetdev;
+			precvframe->u.hdr.pkt = pkt_copy;
+			skb_reserve( pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data ) & 7 ));//force pkt_copy->data at 8-byte alignment address
+			skb_reserve( pkt_copy, shift_sz );//force ip_hdr at 8-byte alignment address according to shift_sz.
+			_rtw_memcpy(pkt_copy->data, (pbuf + drvinfo_sz + RXDESC_SIZE), skb_len);
+			precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pkt_copy->data;
+			precvframe->u.hdr.rx_end = pkt_copy->data + alloc_sz;
+		}
+		else
+		{
+			precvframe->u.hdr.pkt = skb_clone(pskb, GFP_ATOMIC);
+			if(pkt_copy)
+			{
+				precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pbuf;
+				precvframe->u.hdr.rx_end = pbuf + alloc_sz;
+			}
+			else
+			{
+				DBG_8192C("recvbuf2recvframe: skb_clone fail\n");
+				goto _exit_recvbuf2recvframe;
+			}
+		}
+
+		recvframe_put(precvframe, skb_len);
+		//recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE);	
+
+#ifdef CONFIG_USB_RX_AGGREGATION
+		switch(pHalData->UsbRxAggMode)
+		{
+			case USB_RX_AGG_DMA:
+			case USB_RX_AGG_MIX:
+				pkt_offset = (u16)_RND128(pkt_offset);
+				break;
+				case USB_RX_AGG_USB:
+				pkt_offset = (u16)_RND4(pkt_offset);
+				break;
+			case USB_RX_AGG_DISABLE:			
+			default:				
+				break;
+		}
+#endif
+
+		//because the endian issue, driver avoid reference to the rxstat after calling update_recvframe_attrib_from_recvstat();
+		rtl8192cu_update_recvframe_attrib_from_recvstat(precvframe, prxstat);		
+
+		if(rtw_recv_entry(precvframe) != _SUCCESS)
+		{
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n"));
+		}
+
+		pkt_cnt--;
+		transfer_len -= pkt_offset;
+		pbuf += pkt_offset;	
+		precvframe = NULL;
+		pkt_copy = NULL;
+
+		if(transfer_len>0 && pkt_cnt==0)
+			pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff;
+
+	}while((transfer_len>0) && (pkt_cnt>0));
+
+_exit_recvbuf2recvframe:
+
+	return _SUCCESS;	
+}
+
+void rtl8192cu_recv_tasklet(void *priv)
+{
+	_pkt			*pskb;
+	_adapter		*padapter = (_adapter*)priv;
+	struct recv_priv	*precvpriv = &padapter->recvpriv;
+	
+	while (NULL != (pskb = skb_dequeue(&precvpriv->rx_skb_queue)))
+	{
+		if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE))
+		{
+			DBG_8192C("recv_tasklet => bDriverStopped or bSurpriseRemoved \n");
+			dev_kfree_skb_any(pskb);
+			break;
+		}
+	
+		recvbuf2recvframe(padapter, pskb);
+
+#ifdef CONFIG_PREALLOC_RECV_SKB
+
+#ifdef NET_SKBUFF_DATA_USES_OFFSET			
+		skb_reset_tail_pointer(pskb);
+#else
+		pskb->tail = pskb->data;
+#endif
+		pskb->len = 0;
+		
+		skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb);
+		
+#else
+		dev_kfree_skb_any(pskb);
+#endif
+				
+	}
+	
+}
+
+
+static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
+{
+	_irqL irqL;
+	uint isevt, *pbuf;
+	struct recv_buf	*precvbuf = (struct recv_buf *)purb->context;	
+	_adapter 			*padapter =(_adapter *)precvbuf->adapter;
+	struct recv_priv	*precvpriv = &padapter->recvpriv;	
+	
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete!!!\n"));
+	
+	//_enter_critical(&precvpriv->lock, &irqL);
+	//precvbuf->irp_pending=_FALSE;
+	//precvpriv->rx_pending_cnt --;
+	//_exit_critical(&precvpriv->lock, &irqL);
+		
+	precvpriv->rx_pending_cnt --;
+		
+	//if(precvpriv->rx_pending_cnt== 0)
+	//{		
+	//	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: rx_pending_cnt== 0, set allrxreturnevt!\n"));
+	//	_rtw_up_sema(&precvpriv->allrxreturnevt);	
+	//}
+
+	if(padapter->bSurpriseRemoved || padapter->bDriverStopped||padapter->bReadPortCancel)
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", padapter->bDriverStopped, padapter->bSurpriseRemoved));		
+		
+	#ifdef CONFIG_PREALLOC_RECV_SKB
+		precvbuf->reuse = _TRUE;
+	#else
+		if(precvbuf->pskb){
+			DBG_8192C("==> free skb(%p)\n",precvbuf->pskb);
+			dev_kfree_skb_any(precvbuf->pskb);				
+		}	
+	#endif
+	
+		goto exit;
+	}
+
+	if(purb->status==0)//SUCCESS
+	{
+		if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE))
+		{
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: (purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)\n"));
+			precvbuf->reuse = _TRUE;
+			rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
+		}
+		else 
+		{	
+			rtw_reset_continual_urb_error(&padapter->dvobjpriv);
+			
+			precvbuf->transfer_len = purb->actual_length;			
+			skb_put(precvbuf->pskb, purb->actual_length);	
+			skb_queue_tail(&precvpriv->rx_skb_queue, precvbuf->pskb);
+
+			if (skb_queue_len(&precvpriv->rx_skb_queue)<=1)
+				tasklet_schedule(&precvpriv->recv_tasklet);
+
+			precvbuf->pskb = NULL;
+			precvbuf->reuse = _FALSE;
+			rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);			
+		}		
+	}
+	else
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete : purb->status(%d) != 0 \n", purb->status));
+	
+		DBG_8192C("###=> usb_read_port_complete => urb status(%d)\n", purb->status);
+
+		if(rtw_inc_and_chk_continual_urb_error(&padapter->dvobjpriv) == _TRUE ){
+			padapter->bSurpriseRemoved = _TRUE;
+		}
+
+		switch(purb->status) {
+			case -EINVAL:
+			case -EPIPE:			
+			case -ENODEV:
+			case -ESHUTDOWN:
+				//padapter->bSurpriseRemoved=_TRUE;
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n"));
+			case -ENOENT:
+				padapter->bDriverStopped=_TRUE;			
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n"));
+				break;
+			case -EPROTO:
+				#ifdef DBG_CONFIG_ERROR_DETECT	
+				{	
+					HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+					pHalData->srestpriv.Wifi_Error_Status = USB_READ_PORT_FAIL;			
+				}
+				#endif
+				precvbuf->reuse = _TRUE;
+				rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);			
+				break;
+			case -EINPROGRESS:
+				DBG_8192C("ERROR: URB IS IN PROGRESS!/n");
+				break;
+			default:
+				break;				
+		}
+		
+	}	
+
+exit:	
+	
+_func_exit_;
+	
+}
+
+static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
+{	
+	_irqL irqL;
+	int err;
+	unsigned int pipe;
+	SIZE_PTR tmpaddr=0;
+	SIZE_PTR alignment=0;
+	u32 ret = _SUCCESS;
+	PURB purb = NULL;
+	struct recv_buf	*precvbuf = (struct recv_buf *)rmem;
+	struct dvobj_priv	*pdvobj = (struct dvobj_priv *)pintfhdl->pintf_dev;
+	_adapter		*adapter = (_adapter *)pdvobj->padapter;
+	struct recv_priv	*precvpriv = &adapter->recvpriv;
+	struct usb_device	*pusbd = pdvobj->pusbdev;
+	
+
+_func_enter_;
+	
+	if(adapter->bDriverStopped || adapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n"));
+		return _FAIL;
+	}
+
+#ifdef CONFIG_PREALLOC_RECV_SKB
+	if((precvbuf->reuse == _FALSE) || (precvbuf->pskb == NULL))
+	{
+		if (NULL != (precvbuf->pskb = skb_dequeue(&precvpriv->free_recv_skb_queue)))
+		{
+			precvbuf->reuse = _TRUE;
+		}
+	}
+#endif
+	
+
+	if(precvbuf !=NULL)
+	{	
+		rtl8192cu_init_recvbuf(adapter, precvbuf);		
+
+		//re-assign for linux based on skb
+		if((precvbuf->reuse == _FALSE) || (precvbuf->pskb == NULL))
+		{
+			//precvbuf->pskb = alloc_skb(MAX_RECVBUF_SZ, GFP_ATOMIC);//don't use this after v2.6.25
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html
+			precvbuf->pskb = dev_alloc_skb(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
+#else			
+			precvbuf->pskb = netdev_alloc_skb(adapter->pnetdev, MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
+#endif			
+			if(precvbuf->pskb == NULL)		
+			{
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("init_recvbuf(): alloc_skb fail!\n"));
+				return _FAIL;
+			}	
+
+			tmpaddr = (SIZE_PTR)precvbuf->pskb->data;
+	        	alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1);
+			skb_reserve(precvbuf->pskb, (RECVBUFF_ALIGN_SZ - alignment));
+
+			precvbuf->phead = precvbuf->pskb->head;
+		   	precvbuf->pdata = precvbuf->pskb->data;
+
+#ifdef NET_SKBUFF_DATA_USES_OFFSET
+			precvbuf->ptail = precvbuf->pskb->head + precvbuf->pskb->tail;		
+			precvbuf->pend = precvbuf->ptail + (MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
+#else
+			precvbuf->ptail = precvbuf->pskb->tail;
+			precvbuf->pend = precvbuf->pskb->end;
+#endif
+			precvbuf->pbuf = precvbuf->pskb->data;
+		}	
+		else//reuse skb
+		{
+			precvbuf->phead = precvbuf->pskb->head;
+			precvbuf->pdata = precvbuf->pskb->data;
+
+#ifdef NET_SKBUFF_DATA_USES_OFFSET
+			precvbuf->ptail = precvbuf->pskb->head + precvbuf->pskb->tail;
+			precvbuf->pend = precvbuf->ptail + (MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
+#else
+			precvbuf->ptail = precvbuf->pskb->tail;
+			precvbuf->pend = precvbuf->pskb->end;
+#endif
+       		precvbuf->pbuf = precvbuf->pskb->data;
+
+			precvbuf->reuse = _FALSE;
+		}
+
+		//_enter_critical(&precvpriv->lock, &irqL);
+		//precvpriv->rx_pending_cnt++;
+		//precvbuf->irp_pending = _TRUE;
+		//_exit_critical(&precvpriv->lock, &irqL);
+
+		precvpriv->rx_pending_cnt++;
+
+		purb = precvbuf->purb;
+
+		//translate DMA FIFO addr to pipehandle
+		pipe = ffaddr2pipehdl(pdvobj, addr);
+
+		usb_fill_bulk_urb(purb, pusbd, pipe, 
+						precvbuf->pbuf,
+                				MAX_RECVBUF_SZ,
+                				usb_read_port_complete,
+                				precvbuf);//context is precvbuf
+
+		err = usb_submit_urb(purb, GFP_ATOMIC);
+		if((err) && (err != (-EPERM)))
+		{
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("cannot submit rx in-token(err=0x%.8x), URB_STATUS =0x%.8x", err, purb->status));
+			DBG_8192C("cannot submit rx in-token(err = 0x%08x),urb_status = %d\n",err,purb->status);
+			ret = _FAIL;
+		}
+	}
+	else
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:precvbuf ==NULL\n"));
+		ret = _FAIL;
+	}
+
+_func_exit_;
+
+	return ret;
+}
+#endif	// CONFIG_USE_USB_BUFFER_ALLOC_RX
+
+static void usb_read_port_cancel(struct intf_hdl *pintfhdl)
+{
+	int i;	
+	struct recv_buf *precvbuf;	
+	_adapter	*padapter = pintfhdl->padapter;
+	precvbuf = (struct recv_buf *)padapter->recvpriv.precv_buf;	
+
+	DBG_8192C("usb_read_port_cancel \n");
+
+	padapter->bReadPortCancel = _TRUE;
+
+	for(i=0; i < NR_RECVBUFF ; i++)	
+	{
+		precvbuf->reuse = _TRUE;	
+		if(precvbuf->purb)	
+		{
+			//DBG_8192C("usb_read_port_cancel : usb_kill_urb \n");
+			usb_kill_urb(precvbuf->purb);
+		}		
+
+		precvbuf++;
+	}
+
+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
+	usb_kill_urb(padapter->recvpriv.int_in_urb);
+#endif
+}
+
+void rtl8192cu_xmit_tasklet(void *priv)
+{	
+	int ret = _FALSE;
+	_adapter *padapter = (_adapter*)priv;
+	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
+
+	if(check_fwstate(&padapter->mlmepriv, _FW_UNDER_SURVEY) == _TRUE)
+		return;
+
+	while(1)
+	{
+		if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE) || (padapter->bWritePortCancel == _TRUE))
+		{
+			DBG_8192C("xmit_tasklet => bDriverStopped or bSurpriseRemoved or bWritePortCancel\n");
+			break;
+		}
+
+		ret = rtl8192cu_xmitframe_complete(padapter, pxmitpriv, NULL);
+
+		if(ret==_FALSE)
+			break;
+		
+	}
+	
+}
+
+static void usb_write_port_complete(struct urb *purb, struct pt_regs *regs)
+{
+	_irqL irqL;
+	int i;
+	struct xmit_buf *pxmitbuf = (struct xmit_buf *)purb->context;
+	//struct xmit_frame *pxmitframe = (struct xmit_frame *)pxmitbuf->priv_data;
+	//_adapter			*padapter = pxmitframe->padapter;
+	_adapter	*padapter = pxmitbuf->padapter;
+       struct xmit_priv	*pxmitpriv = &padapter->xmitpriv;		
+	//struct pkt_attrib *pattrib = &pxmitframe->attrib;
+	   
+_func_enter_;
+
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("+usb_write_port_complete\n"));
+
+
+	switch(pxmitbuf->flags)
+	{
+		case XMIT_VO_QUEUE:
+			pxmitpriv->voq_cnt--;			
+			break;
+		case XMIT_VI_QUEUE:
+			pxmitpriv->viq_cnt--;		
+			break;
+		case XMIT_BE_QUEUE:
+			pxmitpriv->beq_cnt--;			
+			break;
+		case XMIT_BK_QUEUE:
+			pxmitpriv->bkq_cnt--;			
+			break;
+		case HIGH_QUEUE_INX:
+#ifdef CONFIG_AP_MODE			
+			rtw_chk_hi_queue_cmd(padapter);
+#endif
+			break;
+		default:			
+			break;
+	}
+		
+
+/*
+	_enter_critical(&pxmitpriv->lock, &irqL);
+
+	pxmitpriv->txirp_cnt--;
+	
+	switch(pattrib->priority) 
+	{
+		case 1:				
+		case 2:
+			pxmitpriv->bkq_cnt--;
+			//DBG_8192C("pxmitpriv->bkq_cnt=%d\n", pxmitpriv->bkq_cnt);
+			break;
+		case 4:
+		case 5:
+			pxmitpriv->viq_cnt--;
+			//DBG_8192C("pxmitpriv->viq_cnt=%d\n", pxmitpriv->viq_cnt);
+			break;
+		case 6:
+		case 7:
+			pxmitpriv->voq_cnt--;
+			//DBG_8192C("pxmitpriv->voq_cnt=%d\n", pxmitpriv->voq_cnt);
+			break;
+		case 0:
+		case 3:			
+		default:
+			pxmitpriv->beq_cnt--;
+			//DBG_8192C("pxmitpriv->beq_cnt=%d\n", pxmitpriv->beq_cnt);
+			break;
+			
+	}	
+	
+	_exit_critical(&pxmitpriv->lock, &irqL);
+	
+	
+	if(pxmitpriv->txirp_cnt==0)
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete: txirp_cnt== 0, set allrxreturnevt!\n"));		
+		_rtw_up_sema(&(pxmitpriv->tx_retevt));
+	}
+*/
+        //rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
+	
+	if(padapter->bSurpriseRemoved || padapter->bDriverStopped ||padapter->bWritePortCancel)
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved));
+		goto check_completion;
+	}
+
+
+	if(purb->status==0)
+	{
+	
+	}
+	else
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete : purb->status(%d) != 0 \n", purb->status));
+		DBG_8192C("###=> urb_write_port_complete status(%d)\n",purb->status);
+		if((purb->status==-EPIPE)||(purb->status==-EPROTO))
+		{
+			//usb_clear_halt(pusbdev, purb->pipe);	
+			//msleep(10);
+	             #ifdef DBG_CONFIG_ERROR_DETECT
+			{	
+				HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+				pHalData->srestpriv.Wifi_Error_Status = USB_WRITE_PORT_FAIL;			
+	             }
+			#endif
+		}		
+		else if(purb->status == -EINPROGRESS)
+		{
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete: EINPROGESS\n"));
+		}
+		else if(purb->status == (-ESHUTDOWN))
+		{
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete: ESHUTDOWN\n"));
+						
+			padapter->bDriverStopped=_TRUE;
+			
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete:bDriverStopped=TRUE\n"));
+
+			goto check_completion;
+		}
+		else
+		{					
+			padapter->bSurpriseRemoved=_TRUE;
+			DBG_8192C("bSurpriseRemoved=TRUE\n");
+			//rtl8192cu_trigger_gpio_0(padapter);
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete:bSurpriseRemoved=TRUE\n"));
+
+			goto check_completion;
+		}
+
+		
+
+	}
+
+	#ifdef DBG_CONFIG_ERROR_DETECT
+	{	
+		HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+		pHalData->srestpriv.last_tx_complete_time = rtw_get_current_time();		
+	}
+	#endif
+
+check_completion:
+	if(pxmitbuf->isSync) {
+		pxmitbuf->status = purb->status;
+		complete(&pxmitbuf->done);
+	}
+
+	rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
+
+	//if(rtw_txframes_pending(padapter))	
+	{
+		tasklet_hi_schedule(&pxmitpriv->xmit_tasklet);
+	}
+	
+
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("-usb_write_port_complete\n"));
+_func_exit_;	
+
+}
+
+static u32 usb_write_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem, int timeout_ms)
+{    
+	_irqL irqL;
+	unsigned int pipe;
+	int status;
+	u32 ret, bwritezero = _FALSE;
+	PURB	purb = NULL;
+	_adapter *padapter = (_adapter *)pintfhdl->padapter;
+	struct dvobj_priv	*pdvobj = (struct dvobj_priv   *)&padapter->dvobjpriv;	
+	struct xmit_priv	*pxmitpriv = &padapter->xmitpriv;
+	struct xmit_buf *pxmitbuf = (struct xmit_buf *)wmem;
+	struct xmit_frame *pxmitframe = (struct xmit_frame *)pxmitbuf->priv_data;
+	struct usb_device *pusbd = pdvobj->pusbdev;
+	struct pkt_attrib *pattrib = &pxmitframe->attrib;
+	
+_func_enter_;	
+	
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("+usb_write_port\n"));
+	
+	if((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx))
+	{
+		#ifdef DBG_TX
+		DBG_871X(" DBG_TX %s:%d bDriverStopped%d, bSurpriseRemoved:%d, pnp_bstop_trx:%d\n",__FUNCTION__, __LINE__
+		,padapter->bDriverStopped, padapter->bSurpriseRemoved, padapter->pwrctrlpriv.pnp_bstop_trx );
+		#endif
+		
+		rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
+		
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n"));
+		return _FAIL;
+	}
+	
+	_enter_critical(&pxmitpriv->lock, &irqL);
+
+	switch(addr)
+	{
+		case VO_QUEUE_INX:
+			pxmitpriv->voq_cnt++;
+			pxmitbuf->flags = XMIT_VO_QUEUE;
+			break;
+		case VI_QUEUE_INX:
+			pxmitpriv->viq_cnt++;
+			pxmitbuf->flags = XMIT_VI_QUEUE;
+			break;
+		case BE_QUEUE_INX:
+			pxmitpriv->beq_cnt++;
+			pxmitbuf->flags = XMIT_BE_QUEUE;
+			break;
+		case BK_QUEUE_INX:
+			pxmitpriv->bkq_cnt++;
+			pxmitbuf->flags = XMIT_BK_QUEUE;
+			break;
+		case HIGH_QUEUE_INX:
+			pxmitbuf->flags = HIGH_QUEUE_INX;
+			break;
+		default:
+			pxmitbuf->flags = XMIT_VO_QUEUE;
+			break;
+	}
+		
+	_exit_critical(&pxmitpriv->lock, &irqL);
+		
+/*
+	_enter_critical(&pxmitpriv->lock, &irqL);
+
+	//total irp 
+	pxmitpriv->txirp_cnt++;
+	
+	//per ac irp
+	switch(pattrib->priority) 
+	{
+		case 1:				
+		case 2:				
+			pxmitpriv->bkq_cnt++;
+			break;
+		case 4:
+		case 5:
+			pxmitpriv->viq_cnt++;
+			break;
+		case 6:
+		case 7:
+			pxmitpriv->voq_cnt++;
+			break;
+		case 0:
+		case 3:			
+		default:
+			pxmitpriv->beq_cnt++;
+			break;		
+	}
+
+
+	_exit_critical(&pxmitpriv->lock, &irqL);
+*/
+
+	purb	= pxmitbuf->pxmit_urb[0];
+
+#if 0
+	if(pdvobj->ishighspeed)
+	{
+		if(cnt> 0 && cnt%512 == 0)
+		{
+			//DBG_8192C("ishighspeed, cnt=%d\n", cnt);
+			bwritezero = _TRUE;			
+		}	
+	}
+	else
+	{
+		if(cnt > 0 && cnt%64 == 0)
+		{
+			//DBG_8192C("cnt=%d\n", cnt);
+			bwritezero = _TRUE;			
+		}	
+	}
+#endif
+
+	//translate DMA FIFO addr to pipehandle
+	pipe = ffaddr2pipehdl(pdvobj, addr);	
+
+#ifdef CONFIG_REDUCE_USB_TX_INT	
+	if ( pxmitpriv->free_xmitbuf_cnt%NR_XMITBUFF == 0 
+		|| pxmitbuf->ext_tag )
+	{
+		purb->transfer_flags  &=  (~URB_NO_INTERRUPT);
+	} else {
+		purb->transfer_flags  |=  URB_NO_INTERRUPT;
+		//DBG_8192C("URB_NO_INTERRUPT ");
+	}
+#endif
+
+
+	usb_fill_bulk_urb(purb, pusbd, pipe, 
+       				pxmitframe->buf_addr, //= pxmitbuf->pbuf
+              			cnt,
+              			usb_write_port_complete,
+              			pxmitbuf);//context is pxmitbuf
+              			
+#ifdef CONFIG_USE_USB_BUFFER_ALLOC_TX
+	purb->transfer_dma = pxmitbuf->dma_transfer_addr;
+	purb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
+	purb->transfer_flags |= URB_ZERO_PACKET;
+#endif	// CONFIG_USE_USB_BUFFER_ALLOC_TX
+              			
+#if 0
+	if (bwritezero)
+        {
+            purb->transfer_flags |= URB_ZERO_PACKET;           
+        }			
+#endif
+
+	status = usb_submit_urb(purb, GFP_ATOMIC);
+
+	if (!status)
+	{		
+		ret= _SUCCESS;
+		#ifdef DBG_CONFIG_ERROR_DETECT	
+		{	
+			HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+			pHalData->srestpriv.last_tx_time = rtw_get_current_time();		
+		}
+		#endif
+	}
+	else
+	{
+		DBG_8192C("usb_write_port, status=%d\n", status);
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port(): usb_submit_urb, status=%x\n", status));
+		ret= _FAIL;
+	}
+	
+//   Commented by Albert 2009/10/13
+//   We add the URB_ZERO_PACKET flag to urb so that the host will send the zero packet automatically.
+/*	
+	if(bwritezero == _TRUE)
+	{
+		usb_bulkout_zero(pintfhdl, addr);
+	}
+*/
+
+	// synchronous write handling
+	if(timeout_ms >= 0) {
+		unsigned long expire = timeout_ms ? msecs_to_jiffies(timeout_ms) : MAX_SCHEDULE_TIMEOUT;
+		int status;
+		init_completion(&pxmitbuf->done);
+		pxmitbuf->isSync = _TRUE;
+		pxmitbuf->status = 0;
+
+		if (!wait_for_completion_timeout(&pxmitbuf->done, expire)) {
+			usb_kill_urb(purb);
+			status = (pxmitbuf->status == -ENOENT ? -ETIMEDOUT : pxmitbuf->status);
+		} else
+			status = pxmitbuf->status;
+
+		if (!status) {
+			ret= _SUCCESS;
+		} else {
+			DBG_8192C("usb_write_port sync, status=%d\n", status);
+			ret = _FAIL;
+		}		
+	}
+
+
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("-usb_write_port\n"));
+
+_func_exit_;
+	
+	return ret;
+
+}
+
+static inline u32 usb_write_port_async(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem)
+{
+	return usb_write_port(pintfhdl, addr, cnt, wmem, -1);
+}
+
+static inline int usb_write_port_sync(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem)
+{
+	return usb_write_port(pintfhdl, addr, cnt, wmem, RTW_USB_CONTROL_MSG_TIMEOUT);
+}
+
+static void usb_write_port_cancel(struct intf_hdl *pintfhdl)
+{
+	int i, j;
+	_adapter	*padapter = pintfhdl->padapter;
+	struct xmit_buf *pxmitbuf = (struct xmit_buf *)padapter->xmitpriv.pxmitbuf;
+
+	DBG_8192C("usb_write_port_cancel \n");
+	
+	padapter->bWritePortCancel = _TRUE;	
+	
+	for(i=0; i<NR_XMITBUFF; i++)
+	{
+		for(j=0; j<8; j++)
+		{
+		        if(pxmitbuf->pxmit_urb[j])
+		        {
+		                usb_kill_urb(pxmitbuf->pxmit_urb[j]);
+		        }
+		}
+		
+		pxmitbuf++;
+	}
+	pxmitbuf = (struct xmit_buf*)padapter->xmitpriv.pxmit_extbuf;
+
+	for (i = 0; i < NR_XMIT_EXTBUFF; i++)
+	{	
+		for(j=0; j<8; j++)
+		{
+		        if(pxmitbuf->pxmit_urb[j])
+		        {
+		                usb_kill_urb(pxmitbuf->pxmit_urb[j]);
+		        }
+		}
+		
+		pxmitbuf++;
+	}
+
+}
+
+void rtl8192cu_set_intf_ops(struct _io_ops	*pops)
+{
+	_func_enter_;
+	
+	_rtw_memset((u8 *)pops, 0, sizeof(struct _io_ops));	
+
+	pops->_read8 = &usb_read8;
+	pops->_read16 = &usb_read16;
+	pops->_read32 = &usb_read32;
+	pops->_read_mem = &usb_read_mem;
+	pops->_read_port = &usb_read_port;	
+	
+	pops->_write8 = &usb_write8;
+	pops->_write16 = &usb_write16;
+	pops->_write32 = &usb_write32;
+	pops->_writeN = &usb_writeN;
+	
+#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ	
+	pops->_write8_async= &usb_async_write8;
+	pops->_write16_async = &usb_async_write16;
+	pops->_write32_async = &usb_async_write32;
+#endif	
+	pops->_write_mem = &usb_write_mem;
+	pops->_write_port = &usb_write_port_async;
+	pops->_write_port_sync = &usb_write_port_sync;
+
+	pops->_read_port_cancel = &usb_read_port_cancel;
+	pops->_write_port_cancel = &usb_write_port_cancel;
+
+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
+	pops->_read_interrupt = &usb_read_interrupt;
+#endif
+
+	_func_exit_;
+
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/usb_ops_xp.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/usb_ops_xp.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/usb_ops_xp.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192c/usb/usb_ops_xp.c	2017-09-23 03:42:49.954675260 +0800
@@ -0,0 +1,1266 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#define _HCI_OPS_OS_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <osdep_intf.h>
+#include <circ_buf.h>
+
+#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
+	#error "Shall be Linux or Windows, but not both!\n"
+#endif
+
+#ifndef CONFIG_USB_HCI
+	#error "CONFIG_USB_HCI shall be on!\n"
+#endif
+
+
+#include <usb.h>
+#include <usbdlib.h>
+#include <usbioctl.h>
+
+#include <usb_ops.h>
+#include <recv_osdep.h>
+
+#include <usb_osintf.h>
+
+
+struct zero_bulkout_context
+{
+	void *pbuf;
+	void *purb;
+	void *pirp;
+	void *padapter;
+};
+
+#define usb_write_cmd usb_write_mem 
+#define usb_read_cmd usb_read_mem
+#define usb_write_cmd_complete usb_write_mem_complete
+//#define usb_read_cmd_complete usb_read_mem_complete
+
+
+
+uint usb_init_intf_priv(struct intf_priv *pintfpriv)
+{
+	        
+	PURB	piorw_urb;
+	u8		NextDeviceStackSize;
+	struct dvobj_priv   *pdev = (struct dvobj_priv   *)pintfpriv->intf_dev;
+	_adapter * padapter=pdev->padapter;
+
+_func_enter_;
+	
+	RT_TRACE(_module_hci_ops_os_c_,_drv_info_,("\n +usb_init_intf_priv\n"));
+
+	pintfpriv->intf_status = _IOREADY;
+
+       if(pdev->ishighspeed) pintfpriv->max_iosz =  128;
+	else pintfpriv->max_iosz =  64;	
+
+
+	_init_timer(&pintfpriv->io_timer, padapter->hndis_adapter, io_irp_timeout_handler, pintfpriv);
+
+	
+	RT_TRACE(_module_hci_ops_os_c_,_drv_info_,("usb_init_intf_priv:pintfpriv->max_iosz:%d\n",pintfpriv->max_iosz));
+
+	pintfpriv->io_wsz = 0;
+	pintfpriv->io_rsz = 0;	
+	
+ 	pintfpriv->allocated_io_rwmem = rtw_zmalloc(pintfpriv->max_iosz +4); 
+	
+   	if (pintfpriv->allocated_io_rwmem == NULL){
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_init_intf_priv:pintfpriv->allocated_io_rwmem == NULL\n"));
+    		goto usb_init_intf_priv_fail;
+   	}
+
+	pintfpriv->io_rwmem = pintfpriv->allocated_io_rwmem +  4 \
+					-( (u32)(pintfpriv->allocated_io_rwmem) & 3);
+	
+
+     
+     NextDeviceStackSize = (u8)pdev->nextdevstacksz;//pintfpriv->pUsbDevObj->StackSize + 1; 
+
+      piorw_urb = (PURB)ExAllocatePool(NonPagedPool, sizeof(URB) ); 
+      if(piorw_urb == NULL) 
+	  goto usb_init_intf_priv_fail;
+	  
+      pintfpriv->piorw_urb = piorw_urb;
+
+      pintfpriv->piorw_irp = IoAllocateIrp(NextDeviceStackSize , FALSE);	 
+    
+
+      pintfpriv->io_irp_cnt=1;
+      pintfpriv->bio_irp_pending=_FALSE;
+	 
+     _rtw_init_sema(&(pintfpriv->io_retevt), 0);//NdisInitializeEvent(&pintfpriv->io_irp_return_evt);
+
+_func_exit_;
+	return _SUCCESS;
+
+usb_init_intf_priv_fail:
+
+	if (pintfpriv->allocated_io_rwmem)
+		rtw_mfree((u8 *)(pintfpriv->allocated_io_rwmem), pintfpriv->max_iosz +4);
+	
+	if(piorw_urb)
+		ExFreePool(piorw_urb);	
+
+	RT_TRACE(_module_hci_ops_os_c_,_drv_info_,("\n -usb_init_intf_priv(usb_init_intf_priv_fail)\n"));
+
+_func_exit_;	
+	return _FAIL;
+		
+}
+
+void usb_unload_intf_priv(struct intf_priv *pintfpriv)
+{
+
+_func_enter_;
+	
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n+usb_unload_intf_priv\n"));
+	
+	rtw_mfree((u8 *)(pintfpriv->allocated_io_rwmem), pintfpriv->max_iosz+4);
+	
+#ifdef PLATFORM_WINDOWS
+	if(pintfpriv->piorw_urb)
+		ExFreePool(pintfpriv->piorw_urb);	
+
+	if(pintfpriv->piorw_irp)
+		IoFreeIrp(pintfpriv->piorw_irp);
+#endif		
+
+
+#ifdef PLATFORM_LINUX
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\npintfpriv->io_irp_cnt=%d\n",pintfpriv->io_irp_cnt));
+	pintfpriv->io_irp_cnt--;
+	if(pintfpriv->io_irp_cnt){
+		if(pintfpriv->bio_irp_pending==_TRUE){
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\nkill iorw_urb\n"));
+		usb_kill_urb(pintfpriv->piorw_urb);
+		}
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n wait io_retevt\n"));
+		_rtw_down_sema(&(pintfpriv->io_retevt));
+	}
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n cancel io_urb ok\n"));
+#endif
+
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n-usb_unload_intf_priv\n"));
+
+_func_exit_;
+	
+}
+
+void *ffaddr2pipehdl(struct dvobj_priv *pNdisCEDvice, u32 addr)
+{
+	HANDLE PipeHandle = NULL;
+	_adapter	*padapter = pNdisCEDvice->padapter;
+
+	
+	if(pNdisCEDvice->nr_endpoint == 11)
+	{		
+		switch(addr)
+		{	    
+	     		case RTL8712_DMA_BEQ:
+		 		PipeHandle= padapter->halpriv.pipehdls_r8712[3] ; 
+				break;
+	     		case RTL8712_DMA_BKQ:
+			 	PipeHandle=  padapter->halpriv.pipehdls_r8712[4]; 
+				break;
+	     		case RTL8712_DMA_VIQ:
+		 		PipeHandle=  padapter->halpriv.pipehdls_r8712[2]; 
+				break;
+	    		case RTL8712_DMA_VOQ:
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[1]; 
+				break;					
+                     case RTL8712_DMA_BCNQ:	
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[6]; 
+				break;	 	
+			case RTL8712_DMA_BMCQ:	//HI Queue
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[7]; 
+				break;	
+			case RTL8712_DMA_MGTQ:				
+		 		PipeHandle=  padapter->halpriv.pipehdls_r8712[8]; 
+				break;
+                     case RTL8712_DMA_RX0FF:
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[0]; 
+				break;	 	
+			case RTL8712_DMA_C2HCMD:		 	
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[5]; 
+				break;
+			case RTL8712_DMA_H2CCMD:
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[9]; 
+				break;	
+				
+		}
+
+	}
+	else if(pNdisCEDvice->nr_endpoint == 6)
+	{
+		switch(addr)
+		{	    
+	     		case RTL8712_DMA_BEQ:
+		 		PipeHandle=  padapter->halpriv.pipehdls_r8712[3]; 
+				break;
+	     		case RTL8712_DMA_BKQ:
+			 	PipeHandle=  padapter->halpriv.pipehdls_r8712[4]; 
+				break;
+	     		case RTL8712_DMA_VIQ:
+		 		PipeHandle=  padapter->halpriv.pipehdls_r8712[2]; 
+				break;
+	    		case RTL8712_DMA_VOQ:                   		
+		 		PipeHandle=  padapter->halpriv.pipehdls_r8712[1]; 
+				break;
+                     case RTL8712_DMA_RX0FF:
+			case RTL8712_DMA_C2HCMD:		 	
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[0]; 
+				break;
+			case RTL8712_DMA_H2CCMD:
+			case RTL8712_DMA_BCNQ:					
+			case RTL8712_DMA_BMCQ:	
+			case RTL8712_DMA_MGTQ:			
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[5]; 
+				break;	
+				
+		}
+
+	}
+	else if(pNdisCEDvice->nr_endpoint == 4)
+	{
+		switch(addr)
+		{		
+	     		case RTL8712_DMA_BEQ:
+		 	//case RTL8712_DMA_BKQ:
+			 	PipeHandle=  padapter->halpriv.pipehdls_r8712[2]; 
+				break;
+	     		//case RTL8712_DMA_VIQ:
+		 	case RTL8712_DMA_VOQ:					
+		 		PipeHandle=  padapter->halpriv.pipehdls_r8712[1]; 
+				break;
+			case RTL8712_DMA_RX0FF:
+			case RTL8712_DMA_C2HCMD:		 	
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[0]; 
+				break;
+			case RTL8712_DMA_H2CCMD:	
+			case RTL8712_DMA_BCNQ:					
+			case RTL8712_DMA_BMCQ:	
+			case RTL8712_DMA_MGTQ:				
+				PipeHandle=  padapter->halpriv.pipehdls_r8712[3]; 
+				break;	
+		}
+	
+	}
+	else
+	{
+	   RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("ffaddr2pipehdl():nr_endpoint=%d error!\n", pNdisCEDvice->nr_endpoint));	   
+	}
+		
+	return PipeHandle;
+
+}
+
+
+NTSTATUS usb_bulkout_zero_complete(
+	PDEVICE_OBJECT	pUsbDevObj, 
+	PIRP		pIrp, void*	pZeroContext)
+{	
+	struct zero_bulkout_context *pcontext = (struct zero_bulkout_context *)pZeroContext;
+			   
+_func_enter_;
+
+	if(pcontext)
+	{
+		if(pcontext->pbuf)
+		{
+			ExFreePool(pcontext->pbuf);	  
+		}	
+
+		if(pcontext->purb)
+		{
+			ExFreePool(pcontext->purb);	
+		}
+
+		if(pcontext->pirp && (pIrp ==pcontext->pirp))
+		{			
+			IoFreeIrp(pIrp);
+		}
+
+		ExFreePool(pcontext);	
+	}	
+
+_func_exit_;
+
+	return STATUS_MORE_PROCESSING_REQUIRED;
+	
+
+}
+
+u32 usb_bulkout_zero(struct intf_hdl *pintfhdl, u32 addr)
+{	
+	struct zero_bulkout_context *pcontext;
+	unsigned char *pbuf;
+	char NextDeviceStackSize, len;
+	PIO_STACK_LOCATION	nextStack;
+	USBD_STATUS		usbdstatus;
+	HANDLE				PipeHandle;	
+	PIRP					pirp = NULL;
+	PURB				purb = NULL;	
+	NDIS_STATUS			ndisStatus = NDIS_STATUS_SUCCESS;
+	_adapter *padapter = (_adapter *)pintfhdl->adapter;
+	struct dvobj_priv	*pdvobj = (struct dvobj_priv *)&padapter->dvobjpriv;	
+
+
+_func_enter_;
+
+	if((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx))
+	{		
+		return _FAIL;
+	}
+
+	len = 0;
+	NextDeviceStackSize = (char)pdvobj->nextdevstacksz;
+
+	pcontext = (struct zero_bulkout_context *)ExAllocatePool(NonPagedPool, sizeof(struct zero_bulkout_context));
+	pbuf = (unsigned char *)ExAllocatePool(NonPagedPool, sizeof(int));	
+    	purb = (PURB)ExAllocatePool(NonPagedPool, sizeof(URB));
+      	pirp = IoAllocateIrp(NextDeviceStackSize, FALSE);
+
+	pcontext->pbuf = pbuf;
+	pcontext->purb = purb;
+	pcontext->pirp = pirp;
+	pcontext->padapter = padapter;
+                    
+	//translate DMA FIFO addr to pipehandle
+	PipeHandle = ffaddr2pipehdl(pdvobj, addr);	
+
+
+	// Build our URB for USBD
+	UsbBuildInterruptOrBulkTransferRequest(
+				purb,
+				sizeof(struct _URB_BULK_OR_INTERRUPT_TRANSFER),
+				PipeHandle,
+				pbuf, 
+				NULL, 
+				len, 
+				0, 
+				NULL);
+	
+	//
+	// call the calss driver to perform the operation
+	// pass the URB to the USB driver stack
+	//
+	nextStack = IoGetNextIrpStackLocation(pirp);
+	nextStack->MajorFunction = IRP_MJ_INTERNAL_DEVICE_CONTROL;
+	nextStack->Parameters.Others.Argument1 = purb;
+	nextStack->Parameters.DeviceIoControl.IoControlCode = IOCTL_INTERNAL_USB_SUBMIT_URB;
+
+	//Set Completion Routine
+	IoSetCompletionRoutine(pirp,					// irp to use
+				               usb_bulkout_zero_complete,	// callback routine
+				               pcontext,				// context 
+				               TRUE,					// call on success
+				               TRUE,					// call on error
+				               TRUE);					// call on cancel
+
+	
+	// Call IoCallDriver to send the irp to the usb bus driver
+	//
+	ndisStatus = IoCallDriver(pdvobj->pnextdevobj, pirp);
+	usbdstatus = URB_STATUS(purb);
+
+	if( USBD_HALTED(usbdstatus) )
+	{		
+		padapter->bDriverStopped=_TRUE;
+		padapter->bSurpriseRemoved=_TRUE;
+	}
+
+	//
+	// The usb bus driver should always return STATUS_PENDING when bulk out irp async
+	//
+	if ( ndisStatus != STATUS_PENDING )
+	{		
+		return _FAIL;
+	} 	
+	
+_func_exit_;
+	
+	return _SUCCESS;
+
+}
+
+void usb_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
+{
+	_func_enter_;
+	
+
+	
+	_func_exit_;
+}
+
+NTSTATUS usb_write_mem_complete(PDEVICE_OBJECT	pUsbDevObj, PIRP piowrite_irp, PVOID pusb_cnxt)
+{
+		
+	_irqL irqL;
+	_list	*head, *plist;
+	struct io_req	*pio_req;	
+	struct io_queue *pio_q = (struct io_queue *) pusb_cnxt;
+	struct intf_hdl *pintf = &(pio_q->intf);	
+	struct intf_priv *pintfpriv = pintf->pintfpriv;	
+	_adapter *padapter = (_adapter *)pintf->adapter;
+	NTSTATUS status = STATUS_SUCCESS;
+
+	head = &(pio_q->processing);
+	
+	_func_enter_;
+	
+	_enter_critical_bh(&(pio_q->lock), &irqL);
+	
+	pintfpriv->io_irp_cnt--;
+	if(pintfpriv->io_irp_cnt ==0){		
+		_rtw_up_sema(&(pintfpriv->io_retevt));
+	}	
+	
+	pintfpriv->bio_irp_pending=_FALSE;
+	
+	switch(piowrite_irp->IoStatus.Status)
+	{		
+		case STATUS_SUCCESS:
+			break;
+			
+		default:
+			padapter->bSurpriseRemoved=_TRUE;
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usbAsynIntOutComplete:pioread_irp->IoStatus.Status !=STATUS_SUCCESS\n"));
+			break;
+	}				
+
+	//free irp in processing list...	
+	while(rtw_is_list_empty(head) != _TRUE)
+	{
+		plist = get_next(head);	
+		rtw_list_delete(plist);
+		pio_req = LIST_CONTAINOR(plist, struct io_req, list);
+		_rtw_up_sema(&pio_req->sema);
+	}	
+						
+	_exit_critical_bh(&(pio_q->lock), &irqL);
+
+	_func_exit_;
+	
+	return STATUS_MORE_PROCESSING_REQUIRED;
+
+}
+
+void usb_write_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem)
+{
+	u32 bwritezero;
+	_irqL	irqL;
+	USBD_STATUS			usbdstatus;		
+	PIO_STACK_LOCATION		nextStack;
+	HANDLE				PipeHandle;	
+	struct io_req *pio_req;
+	
+	_adapter *adapter = (_adapter *)pintfhdl->adapter;
+	struct intf_priv *pintfpriv = pintfhdl->pintfpriv;
+	struct dvobj_priv   *pdev = (struct dvobj_priv   *)pintfpriv->intf_dev;      
+	PURB	piorw_urb = pintfpriv->piorw_urb;
+	PIRP		piorw_irp  = pintfpriv->piorw_irp; 	
+	struct io_queue	*pio_queue = (struct io_queue *)adapter->pio_queue;	
+	NTSTATUS NtStatus = STATUS_SUCCESS;	
+	
+	_func_enter_;	
+
+	pio_req = alloc_ioreq(pio_queue);
+	
+	if ((pio_req == NULL)||(adapter->bSurpriseRemoved)){
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("async_irp_write32 : pio_req =0x%x adapter->bSurpriseRemoved=0x%x",pio_req,adapter->bSurpriseRemoved ));
+		goto exit;
+	}	
+	
+	_enter_critical_bh(&(pio_queue->lock), &irqL);
+	
+	rtw_list_insert_tail(&(pio_req->list),&(pio_queue->processing));
+
+
+#ifdef NDIS51_MINIPORT
+	IoReuseIrp(piorw_irp, STATUS_SUCCESS);
+#else
+	piorw_irp->Cancel = _FALSE;
+#endif
+
+	if((adapter->bDriverStopped) || (adapter->bSurpriseRemoved) ||(adapter->pwrctrlpriv.pnp_bstop_trx))	
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\npadapter->pwrctrlpriv.pnp_bstop_trx==_TRUE\n"));
+		_func_exit_;
+		return;
+	}
+
+	//translate DMA FIFO addr to pipehandle
+	PipeHandle = ffaddr2pipehdl(pdev, addr);	
+
+	
+	pintfpriv->io_irp_cnt++;
+	pintfpriv->bio_irp_pending=_TRUE;	
+	// Build our URB for USBD
+	UsbBuildInterruptOrBulkTransferRequest(
+				piorw_urb,
+				sizeof(struct _URB_BULK_OR_INTERRUPT_TRANSFER),
+				PipeHandle,
+				(PVOID)wmem,
+				NULL, 
+				cnt, 
+				0, 
+				NULL);  
+
+	//
+	// call the calss driver to perform the operation
+	// pass the URB to the USB driver stack
+	//
+	nextStack = IoGetNextIrpStackLocation(piorw_irp);
+	nextStack->MajorFunction = IRP_MJ_INTERNAL_DEVICE_CONTROL;
+	nextStack->Parameters.Others.Argument1 = (PURB)piorw_urb;
+	nextStack->Parameters.DeviceIoControl.IoControlCode = IOCTL_INTERNAL_USB_SUBMIT_URB;
+
+	IoSetCompletionRoutine(
+				piorw_irp,				// irp to use				
+				usb_write_mem_complete,		// routine to call when irp is done
+				pio_queue,				// context to pass routine
+				TRUE,					// call on success
+				TRUE,					// call on error
+				TRUE);					// call on cancel
+	
+	// 
+	// Call IoCallDriver to send the irp to the usb port
+	//
+	NtStatus	= IoCallDriver(pdev->pnextdevobj, piorw_irp);
+	usbdstatus = URB_STATUS(piorw_urb);
+
+	//
+	// The USB driver should always return STATUS_PENDING when
+	// it receives a write irp
+	//
+	if ((NtStatus != STATUS_PENDING) || USBD_HALTED(usbdstatus) ) {
+
+		if( USBD_HALTED(usbdstatus) ) {
+
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_mem():USBD_HALTED(usbdstatus)=%X!\n",USBD_HALTED(usbdstatus)) );
+		}
+		_func_exit_;
+		return;//STATUS_UNSUCCESSFUL;
+	}
+
+	_exit_critical_bh(&(pio_queue->lock), &irqL);
+	
+	_rtw_down_sema(&pio_req->sema);	
+	free_ioreq(pio_req, pio_queue);
+	
+
+	bwritezero = _FALSE;
+       if (pdev->ishighspeed)
+	{
+		if(cnt> 0 && cnt%512 == 0)
+			bwritezero = _TRUE;
+			
+	}
+	else
+	{
+		if(cnt > 0 && cnt%64 == 0)
+			bwritezero = _TRUE;		
+	}
+
+	
+	if(bwritezero == _TRUE)
+	{
+		usb_bulkout_zero(pintfhdl, addr);
+	}
+	
+exit:
+	
+	_func_exit_;
+	
+}
+
+NTSTATUS usb_read_port_complete(PDEVICE_OBJECT pUsbDevObj, PIRP pIrp, PVOID context)
+{	
+	uint isevt, *pbuf;
+	struct _URB_BULK_OR_INTERRUPT_TRANSFER	*pbulkurb;
+	USBD_STATUS		usbdstatus;	
+	struct recv_buf		*precvbuf = (struct recv_buf *)context;	
+	_adapter 				*adapter =(_adapter *)precvbuf->adapter;
+	struct recv_priv		*precvpriv = &adapter->recvpriv;
+	struct dvobj_priv   	*dev = (struct dvobj_priv   *)&adapter->dvobjpriv;
+	PURB				purb = precvbuf->purb;
+	struct intf_hdl 		*pintfhdl = &adapter->pio_queue->intf;
+	
+	//RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete!!!\n"));
+
+	usbdstatus = URB_STATUS(purb);
+	
+	_rtw_spinlock_ex(&precvpriv->lock);
+	precvbuf->irp_pending=_FALSE;
+	precvpriv->rx_pending_cnt --;
+	_rtw_spinunlock_ex(&precvpriv->lock);	
+	
+	if(precvpriv->rx_pending_cnt== 0) {		
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: rx_pending_cnt== 0, set allrxreturnevt!\n"));
+		_rtw_up_sema(&precvpriv->allrxreturnevt);	
+	}
+
+
+	if( pIrp->Cancel == _TRUE ) {
+		
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: One IRP has been cancelled succesfully\n"));
+		return STATUS_MORE_PROCESSING_REQUIRED;
+	}
+	if(adapter->bSurpriseRemoved) {
+
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)", adapter->bDriverStopped, adapter->bSurpriseRemoved));
+		return STATUS_MORE_PROCESSING_REQUIRED;
+	}
+
+	switch(pIrp->IoStatus.Status) 
+	{
+		case STATUS_SUCCESS:
+			
+			pbulkurb = &(precvbuf->purb)->UrbBulkOrInterruptTransfer;
+			if((pbulkurb->TransferBufferLength >(MAX_RECVBUF_SZ)) || (pbulkurb->TransferBufferLength < RXDESC_SIZE) ) 
+			{								
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_read_port_complete: (pbulkurb->TransferBufferLength > MAX_RECVBUF_SZ) || (pbulkurb->TransferBufferLength < RXDESC_SIZE)\n"));
+				rtw_read_port(adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
+			}
+			else 
+			{	
+			       precvbuf->transfer_len = pbulkurb->TransferBufferLength;
+
+				pbuf = (uint*)precvbuf->pbuf;
+
+				if((isevt = *(pbuf+1)&0x1ff) == 0x1ff)
+				{								
+					rxcmd_event_hdl(adapter, pbuf);//rx c2h events
+					
+					rtw_read_port(adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
+				}
+				else
+				{
+					if(recvbuf2recvframe(adapter, precvbuf)==_FAIL)//rx packets
+					{
+						//precvbuf->reuse = _TRUE;		
+						rtw_read_port(adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
+					}
+				}
+				
+			}
+	
+			break;
+			
+		default:
+			
+			if( !USBD_HALTED(usbdstatus) )
+			{				
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_read_port_complete():USBD_HALTED(usbdstatus)=%x  (need to handle ) \n",USBD_HALTED(usbdstatus)));				
+			
+			}
+			else 
+			{				
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_read_port_complete(): USBD_HALTED(usbdstatus)=%x \n\n", USBD_HALTED(usbdstatus)) );
+				adapter->bDriverStopped = _TRUE;
+				adapter->bSurpriseRemoved = _TRUE;
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete(): USBD_HALTED(usbdstatus)=%x \n\n", USBD_HALTED(usbdstatus))) ;
+			}
+
+		      break;
+			  
+	}
+
+	return STATUS_MORE_PROCESSING_REQUIRED;
+	
+}
+
+u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
+{
+	u8 					*pdata;
+	u16					size;
+	PURB				purb;
+	PIRP					pirp;
+	PIO_STACK_LOCATION	nextStack;
+	NTSTATUS			ntstatus;
+	USBD_STATUS		usbdstatus;
+	HANDLE				PipeHandle;	
+	struct recv_buf		*precvbuf = (struct recv_buf *)rmem;
+	struct intf_priv		*pintfpriv = pintfhdl->pintfpriv;
+	struct dvobj_priv		*pdev = (struct dvobj_priv   *)pintfpriv->intf_dev;
+	_adapter				*adapter = (_adapter *)pdev->padapter;
+	struct recv_priv		*precvpriv = &adapter->recvpriv;
+	u32					bResult = _FALSE;
+
+_func_enter_;
+	
+	if(adapter->bDriverStopped || adapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx) {
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n"));
+		return bResult;
+	}
+
+	if(precvbuf !=NULL)
+	{
+
+		rtl8192cu_init_recvbuf(adapter, precvbuf);
+	
+		_rtw_spinlock(&precvpriv->lock);
+		precvpriv->rx_pending_cnt++;
+		precvbuf->irp_pending = _TRUE;
+		_rtw_spinunlock(&precvpriv->lock);
+
+	       pdata = (u8*)precvbuf->pbuf;
+
+		size	 = sizeof( struct _URB_BULK_OR_INTERRUPT_TRANSFER );
+		purb = precvbuf->purb;	
+
+		//translate DMA FIFO addr to pipehandle
+		PipeHandle = ffaddr2pipehdl(pdev, addr);	
+		 
+		UsbBuildInterruptOrBulkTransferRequest(
+			purb,
+			(USHORT)size,
+			PipeHandle,
+			pdata,
+			NULL, 
+			MAX_RECVBUF_SZ,
+			USBD_TRANSFER_DIRECTION_IN | USBD_SHORT_TRANSFER_OK, 
+			NULL
+			);
+
+		pirp = precvbuf->pirp;
+
+#if NDIS51_MINIPORT
+		IoReuseIrp(pirp, STATUS_SUCCESS);
+#else
+		pirp->Cancel = _FALSE;
+#endif
+
+		// call the class driver to perform the operation
+		// and pass the URB to the USB driver stack
+		nextStack = IoGetNextIrpStackLocation(pirp);
+		nextStack->Parameters.Others.Argument1 = purb;
+		nextStack->Parameters.DeviceIoControl.IoControlCode = IOCTL_INTERNAL_USB_SUBMIT_URB;
+		nextStack->MajorFunction = IRP_MJ_INTERNAL_DEVICE_CONTROL;
+
+		IoSetCompletionRoutine(
+			pirp,					// irp to use
+			usb_read_port_complete,	// routine to call when irp is done
+			precvbuf,					// context to pass routine 
+			TRUE,					// call on success
+			TRUE,					// call on error
+			TRUE);					// call on cancel
+
+		//
+		// The IoCallDriver routine  
+		// sends an IRP to the driver associated with a specified device object.
+		//
+		ntstatus = IoCallDriver(pdev->pnextdevobj, pirp);
+		usbdstatus = URB_STATUS(purb);
+
+		if( USBD_HALTED(usbdstatus) ) {
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_read_port(): USBD_HALTED(usbdstatus=0x%.8x)=%.8x  \n\n", usbdstatus, USBD_HALTED(usbdstatus)));
+			pdev->padapter->bDriverStopped=_TRUE;
+			pdev->padapter->bSurpriseRemoved=_TRUE;
+		}
+
+		if( ntstatus == STATUS_PENDING )
+		{ 
+			bResult = _TRUE;// The IRP is pended in USBD as we expected.
+		}
+		else {
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port(): IoCallDriver failed!!! IRP STATUS: %X\n", ntstatus));
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port(): IoCallDriver failed!!! USB STATUS: %X\n", usbdstatus));
+		}
+
+	}
+	else{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:precv_frame ==NULL\n"));
+	}
+
+_func_exit_;
+	
+	return bResult;
+	
+}
+
+void usb_read_port_cancel(_adapter *padapter)
+{	
+	struct recv_buf  *precvbuf;
+	sint i;
+	struct dvobj_priv   *pdev = &padapter->dvobjpriv;
+	struct recv_priv *precvpriv=&padapter->recvpriv;	
+		
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n ==>usb_read_port_cancel\n"));
+
+	_rtw_spinlock(&precvpriv->lock);
+	precvpriv->rx_pending_cnt--; //decrease 1 for Initialize ++ 
+	_rtw_spinunlock(&precvpriv->lock);
+
+	if (precvpriv->rx_pending_cnt)
+	{
+		// Canceling Pending Recv Irp
+		precvbuf = (struct recv_buf  *)precvpriv->precv_buf;
+		
+		for( i = 0; i < NR_RECVBUFF; i++ )
+		{
+			if (precvbuf->irp_pending == _TRUE)
+			{	
+				IoCancelIrp(precvbuf->pirp);
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_cancel() :IoCancelIrp\n"));
+			}
+			
+			precvbuf++;
+		}
+		
+		_rtw_down_sema(&precvpriv->allrxreturnevt);
+		
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_cancel:down sema\n"));
+
+	}
+	
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("<==usb_read_port_cancel\n"));
+	
+}
+
+NTSTATUS usb_write_port_complete(
+	PDEVICE_OBJECT	pUsbDevObj,
+	PIRP				pIrp,
+	PVOID			pTxContext
+) 
+{	
+	u32	i, bIrpSuccess, sz;
+	NTSTATUS	status = STATUS_SUCCESS;
+	u8 *ptr;
+	struct xmit_frame	*pxmitframe = (struct xmit_frame *) pTxContext;
+        struct xmit_buf *pxmitbuf = pxmitframe->pxmitbuf;
+	_adapter			*padapter = pxmitframe->padapter;
+	struct dvobj_priv	*pdev =	(struct dvobj_priv *)&padapter->dvobjpriv;	
+	struct io_queue	*pio_queue = (struct io_queue *)padapter->pio_queue;
+	struct intf_hdl	*pintfhdl = &(pio_queue->intf);
+       struct xmit_priv	*pxmitpriv = &padapter->xmitpriv;		
+	   
+_func_enter_;
+
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("+usb_write_port_complete\n"));
+
+	_rtw_spinlock_ex(&pxmitpriv->lock);	
+	pxmitpriv->txirp_cnt--;
+	_rtw_spinunlock_ex(&pxmitpriv->lock);
+	
+	if(pxmitpriv->txirp_cnt==0){
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete: txirp_cnt== 0, set allrxreturnevt!\n"));		
+		_rtw_up_sema(&(pxmitpriv->tx_retevt));
+	}
+	
+	status = pIrp->IoStatus.Status;
+
+	if( status == STATUS_SUCCESS ) 
+		bIrpSuccess = _TRUE;	
+	else	
+		bIrpSuccess = _FALSE;
+	
+	if( pIrp->Cancel == _TRUE )
+	{		
+	    if(pxmitframe !=NULL)
+	    {	       
+	    		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_write_port_complete:pIrp->Cancel == _TRUE,(pxmitframe !=NULL\n"));
+			rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);			
+	    }
+		  	 
+	     return STATUS_MORE_PROCESSING_REQUIRED;
+	}
+
+	if(padapter->bSurpriseRemoved)
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved));
+		return STATUS_MORE_PROCESSING_REQUIRED;
+	}
+
+
+	//
+	// Send 0-byte here if necessary.
+	//
+	// <Note> 
+	// 1. We MUST keep at most one IRP pending in each endpoint, otherwise USB host controler driver will hang.
+	// Besides, even 0-byte IRP shall be count into #IRP sent down, so, we send 0-byte here instead of TxFillDescriptor8187().
+	// 2. If we don't count 0-byte IRP into an #IRP sent down, Tx will stuck when we download files via BT and 
+	// play online video on XP SP1 EHCU.
+	// 2005.12.26, by rcnjko.
+	//
+
+	
+	for(i=0; i< 8; i++)
+	{
+            if(pIrp == pxmitframe->pxmit_irp[i])
+            {
+		    pxmitframe->bpending[i] = _FALSE;//
+		    //ac_tag = pxmitframe->ac_tag[i];
+                  sz = pxmitframe->sz[i];
+		    break;		  
+            }
+	}
+
+#if 0	
+	pxmitframe->fragcnt--;
+	if(pxmitframe->fragcnt == 0)// if((pxmitframe->fragcnt == 0) && (pxmitframe->irpcnt == 8)){
+	{
+		//RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_write_port_complete:pxmitframe->fragcnt == 0\n"));
+		rtw_free_xmitframe(pxmitpriv,pxmitframe);	          
+      	}
+#else	
+
+	//not to consider tx fragment
+	rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);		
+
+#endif	
+
+	rtl8192cu_xmitframe_complete(padapter, pxmitpriv, pxmitbuf);
+
+_func_exit_;
+
+	return STATUS_MORE_PROCESSING_REQUIRED;
+
+}
+
+u32 usb_write_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem)
+{
+       u32 i, bwritezero;      	
+	u8 *ptr;
+	PIO_STACK_LOCATION	nextStack;
+	USBD_STATUS		usbdstatus;
+	HANDLE				PipeHandle;	
+	PIRP					pirp = NULL;
+	PURB				purb = NULL;	
+	NDIS_STATUS			ndisStatus = NDIS_STATUS_SUCCESS;
+	_adapter *padapter = (_adapter *)pintfhdl->adapter;
+	struct dvobj_priv	*pNdisCEDvice = (struct dvobj_priv   *)&padapter->dvobjpriv;	
+	struct xmit_priv	*pxmitpriv = &padapter->xmitpriv;
+	struct xmit_frame *pxmitframe = (struct xmit_frame *)wmem;
+
+_func_enter_;
+
+	if((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx))
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n"));
+		return _FAIL;
+	}
+	
+
+	for(i=0; i<8; i++)
+       {
+		if(pxmitframe->bpending[i] == _FALSE)
+		{
+			_rtw_spinlock(&pxmitpriv->lock);	
+			pxmitpriv->txirp_cnt++;
+			pxmitframe->bpending[i]  = _TRUE;
+			_rtw_spinunlock(&pxmitpriv->lock);
+			
+			pxmitframe->sz[i] = cnt;
+			purb	= pxmitframe->pxmit_urb[i];
+			pirp	= pxmitframe->pxmit_irp[i];
+			
+			//pxmitframe->ac_tag[i] = ac_tag;
+			
+			break;	 
+		}
+       }	
+
+	bwritezero = _FALSE;
+       if (pNdisCEDvice->ishighspeed)
+	{
+		if(cnt> 0 && cnt%512 == 0)
+		{
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("ishighspeed, cnt=%d\n", cnt));
+			//cnt=cnt+1;
+			bwritezero = _TRUE;
+		}	
+	}
+	else
+	{
+		if(cnt > 0 && cnt%64 == 0)
+		{
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("cnt=%d\n", cnt));
+			//cnt=cnt+1;
+			bwritezero = _TRUE;
+		}	
+	}
+	
+
+#ifdef NDIS51_MINIPORT
+	IoReuseIrp(pirp, STATUS_SUCCESS);
+#else
+	pirp->Cancel = _FALSE;
+#endif
+
+
+	//translate DMA FIFO addr to pipehandle
+	PipeHandle = ffaddr2pipehdl(pNdisCEDvice, addr);	
+
+
+	// Build our URB for USBD
+	UsbBuildInterruptOrBulkTransferRequest(
+				purb,
+				sizeof(struct _URB_BULK_OR_INTERRUPT_TRANSFER),
+				PipeHandle,
+				pxmitframe->mem_addr, 
+				NULL, 
+				cnt, 
+				0, 
+				NULL);
+	
+	//
+	// call the calss driver to perform the operation
+	// pass the URB to the USB driver stack
+	//
+	nextStack = IoGetNextIrpStackLocation(pirp);
+	nextStack->MajorFunction = IRP_MJ_INTERNAL_DEVICE_CONTROL;
+	nextStack->Parameters.Others.Argument1 = purb;
+	nextStack->Parameters.DeviceIoControl.IoControlCode = IOCTL_INTERNAL_USB_SUBMIT_URB;
+
+	//Set Completion Routine
+	IoSetCompletionRoutine(pirp,					// irp to use
+				               usb_write_port_complete,	// callback routine
+				               pxmitframe,				// context 
+				               TRUE,					// call on success
+				               TRUE,					// call on error
+				               TRUE);					// call on cancel
+
+	
+	// Call IoCallDriver to send the irp to the usb bus driver
+	//
+	ndisStatus = IoCallDriver(pNdisCEDvice->pnextdevobj, pirp);
+	usbdstatus = URB_STATUS(purb);
+
+	if( USBD_HALTED(usbdstatus) )
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_write_port(): USBD_HALTED(usbdstatus)=%x set bDriverStopped TRUE!\n\n",USBD_HALTED(usbdstatus)) );
+		padapter->bDriverStopped=_TRUE;
+		padapter->bSurpriseRemoved=_TRUE;
+	}
+
+	//
+	// The usb bus driver should always return STATUS_PENDING when bulk out irp async
+	//
+	if ( ndisStatus != STATUS_PENDING )
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_write_port(): ndisStatus(%x) != STATUS_PENDING!\n\n", ndisStatus));
+		
+		_func_exit_;
+		
+		return _FAIL;
+	} 	
+	
+	if(bwritezero == _TRUE)
+	{
+		usb_bulkout_zero(pintfhdl, addr);
+	}
+
+	
+_func_exit_;
+	
+	return _SUCCESS;
+
+}
+
+
+void usb_write_port_cancel(_adapter *padapter)
+{
+
+	sint i,j;
+	struct dvobj_priv   *pdev = &padapter->dvobjpriv;
+	struct xmit_priv *pxmitpriv=&padapter->xmitpriv;
+	struct xmit_frame *pxmitframe;
+
+	_rtw_spinlock(&pxmitpriv->lock);
+	pxmitpriv->txirp_cnt--; //decrease 1 for Initialize ++
+	_rtw_spinunlock(&pxmitpriv->lock);
+	
+	if (pxmitpriv->txirp_cnt) 
+	{
+		// Canceling Pending Recv Irp
+		pxmitframe= (struct xmit_frame *)pxmitpriv->pxmit_frame_buf;
+		
+		for( i = 0; i < NR_XMITFRAME; i++ )
+		{
+			for(j=0;j<8;j++)
+			{
+				if (pxmitframe->bpending[j]==_TRUE)
+				{			
+					IoCancelIrp(pxmitframe->pxmit_irp[j]);		
+					RT_TRACE(_module_hci_ops_os_c_,_drv_err_,(" usb_write_port_cancel() :IoCancelIrp\n"));
+
+				}
+			}
+			
+			pxmitframe++;
+		}
+
+		_rtw_down_sema(&(pxmitpriv->tx_retevt));
+		
+	}
+
+}
+
+
+/*! \brief Wrap the pUrb to an IRP and send this IRP to Bus Driver. Then wait for this IRP completion.
+	The Caller shall be at Passive Level.
+*/
+NTSTATUS  sync_callusbd(struct dvobj_priv *pdvobjpriv, PURB purb)
+{
+
+	KEVENT					kevent;
+	PIRP						irp;
+	IO_STATUS_BLOCK		iostatusblock;
+	PIO_STACK_LOCATION		nextstack;
+	USBD_STATUS			usbdstatus;
+	LARGE_INTEGER			waittime;
+	NTSTATUS ntstatus = STATUS_SUCCESS;
+	_adapter *padapter = pdvobjpriv->padapter;
+	
+
+	_func_enter_;
+
+//	if(padapter->bDriverStopped) {
+//		goto exit;
+//	}
+	
+	KeInitializeEvent(&kevent, NotificationEvent, _FALSE);
+	irp = IoBuildDeviceIoControlRequest(
+			IOCTL_INTERNAL_USB_SUBMIT_URB,
+			pdvobjpriv->pphysdevobj,//CEdevice->pUsbDevObj, 
+			NULL, 
+			0, 
+			NULL, 
+			0, 
+			_TRUE, 
+			&kevent, 
+			&iostatusblock);
+
+	if(irp == NULL) {
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("SyncCallUSBD: memory alloc for irp failed\n"));
+		ntstatus=STATUS_INSUFFICIENT_RESOURCES;
+		goto exit;
+	}
+	
+	nextstack = IoGetNextIrpStackLocation(irp);
+	if(nextstack == NULL)	
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("IoGetNextIrpStackLocation fail\n"));
+
+	nextstack->Parameters.Others.Argument1 = purb;
+	
+	// Issue an IRP for Sync IO.
+	ntstatus = IoCallDriver(pdvobjpriv->pphysdevobj, irp);
+	usbdstatus = URB_STATUS(purb);
+
+	if(ntstatus == STATUS_PENDING)
+	{		
+		// Method 1
+		waittime.QuadPart = -10000 * 50000;
+		ntstatus = KeWaitForSingleObject(&kevent, Executive, KernelMode, _FALSE, &waittime); //8150 code
+		
+		// Method 2
+		//ntStatus = KeWaitForSingleObject(&Kevent, Executive, KernelMode, FALSE, NULL); //DDK sample
+		
+		usbdstatus = URB_STATUS(purb);
+
+		if(ntstatus == STATUS_TIMEOUT) 
+		{			
+			//usbdevice->nIoStuckCnt++;
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("SyncCallUSBD: TIMEOUT....5000ms\n"));
+
+			// Method 2
+			IoCancelIrp(irp);
+			ntstatus = KeWaitForSingleObject(&kevent, Executive, KernelMode, _FALSE, NULL); //DDK sample
+			usbdstatus = URB_STATUS(purb);
+
+			usbdstatus = USBD_STATUS_SUCCESS;
+		}
+		
+	}
+	
+exit:	
+	
+	_func_exit_;
+	
+	return ntstatus;
+	
+}
+int usbctrl_vendorreq(struct intf_priv *pintfpriv, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype)
+{
+	PURB			purb;
+	u8				ret;
+	unsigned long		transferflags;
+	NTSTATUS		ntstatus;
+
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv  *)pintfpriv->intf_dev;   
+	
+	_func_enter_;
+
+	ret=_TRUE;
+	purb = (PURB)ExAllocatePool(NonPagedPool, sizeof(struct _URB_CONTROL_VENDOR_OR_CLASS_REQUEST) );
+	if(purb == NULL) {
+		
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usbctrl_vendorreq(): Failed to allocate urb !!!\n"));
+		ret =_FALSE;
+		goto exit;
+	}
+
+	if (requesttype == 0x01) {
+		transferflags = USBD_TRANSFER_DIRECTION_IN;//read_in
+	} else {
+		transferflags= 0;//write_out
+	}
+
+	UsbBuildVendorRequest(
+			purb, 		//Pointer to an URB that is to be formatted as a vendor or class request. 
+			URB_FUNCTION_VENDOR_DEVICE,	//Indicates the URB is a vendor-defined request for a USB device. 
+			sizeof(struct _URB_CONTROL_VENDOR_OR_CLASS_REQUEST),  //Specifies the length, in bytes, of the URB. 
+			transferflags, 	//TransferFlags 
+			0,			//ReservedBits 
+			request, 	//Request 
+			value, 		//Value 
+			index,		//Index
+			pdata,		//TransferBuffer 
+			NULL,		//TransferBufferMDL 
+			len,			//TransferBufferLength 
+			NULL		//Link 
+	);
+
+	ntstatus = sync_callusbd(pdvobjpriv, purb);
+	if(!NT_SUCCESS(ntstatus))
+	{
+		ExFreePool(purb);
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,(" usbctrl_vendorreq() : SOMETHING WRONG\n") );
+		ret = _FALSE;
+		goto exit;
+	}
+
+	ExFreePool(purb);
+
+exit:	
+	_func_exit_;
+	
+	return ret;	
+
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_cmd.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_cmd.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_cmd.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_cmd.c	2017-09-23 03:42:49.958675248 +0800
@@ -0,0 +1,1024 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _RTL8192D_CMD_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <recv_osdep.h>
+#include <cmd_osdep.h>
+#include <mlme_osdep.h>
+#include <rtw_byteorder.h>
+#include <circ_buf.h>
+#include <rtw_ioctl_set.h>
+
+#include <rtl8192d_hal.h>
+
+#ifndef PLATFORM_FREEBSD
+static BOOLEAN
+CheckWriteH2C(
+	IN	PADAPTER		Adapter,
+	IN	u8		BoxNum
+)
+{
+	u8	valHMETFR;
+	BOOLEAN	Result = _FALSE;
+	
+	valHMETFR = rtw_read8(Adapter, REG_HMETFR);
+
+	//DbgPrint("CheckWriteH2C(): Reg[0x%2x] = %x\n",REG_HMETFR, valHMETFR);
+
+	if(((valHMETFR>>BoxNum)&BIT0) == 1)
+		Result = _TRUE;
+	
+	return Result;
+
+}
+#endif //PLATFORM_FREEBSD
+
+static BOOLEAN
+CheckFwReadLastH2C(
+	IN	PADAPTER		Adapter,
+	IN	u8		BoxNum
+)
+{
+	u8	valHMETFR;
+	BOOLEAN	 Result = _FALSE;
+	
+	valHMETFR = rtw_read8(Adapter, REG_HMETFR);
+	//RT_TRACE(COMP_INIT,DBG_LOUD,("REG[%x] = %x\n", 	REG_HMETFR, valHMETFR));
+
+	// Do not seperate to 91C and 88C, we use the same setting. Suggested by SD4 Filen. 2009.12.03.
+	if(((valHMETFR>>BoxNum)&BIT0) == 0)
+		Result = _TRUE;
+
+	return Result;
+}
+
+
+//
+// Description: 
+//	Fill H2C command
+//	BOX_0-4 Format: 
+//	bit [31-8]	|     7		|  [6-0]
+//	     RSVD	|  CMD_EXT	|  CMD_ID
+//
+//	BOX Extension 0-4 format:
+//	bit 15-0: RSVD	
+//
+
+/*****************************************
+* H2C Msg format :
+*| 31 - 8		|7		| 6 - 0	|	
+*| h2c_msg 	|Ext_bit	|CMD_ID	|
+*
+******************************************/
+static void _FillH2CCmd92D(_adapter* padapter, u8 ElementID, u32 CmdLen, u8* pCmdBuffer)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	u8	BoxNum;
+	u16	BOXReg=0, BOXExtReg=0;
+	u8	BoxContent[4], BoxExtContent[2];
+	u8 	BufIndex=0;
+	u8	U1btmp; //Read 0x1bf
+	u8	bWriteSucess = _FALSE;
+	u8	IsFwRead = _FALSE;
+	u8	WaitH2cLimmit = 100;
+	u8	WaitWriteH2cLimmit = 100;
+	u8	idx=0;
+
+_func_enter_;	
+#ifdef CONFIG_CONCURRENT_MODE
+
+	if(padapter->adapter_type > PRIMARY_ADAPTER)
+	{
+		padapter = padapter->pbuddy_adapter;
+	}
+	
+	pHalData = GET_HAL_DATA(padapter);
+	//isnchip = IS_NORMAL_CHIP(pHalData->VersionID);
+	_enter_critical_mutex(padapter->ph2c_fwcmd_mutex, NULL);
+#endif //CONFIG_CONCURRENT_MODE
+	//DBG_8192C("FillH2CCmd : ElementID=%d \n",ElementID);
+
+	while(!bWriteSucess)
+	{
+		WaitWriteH2cLimmit--;
+		if(WaitWriteH2cLimmit == 0)
+		{	
+			DBG_8192C("FillH2CCmd92C():Write H2C fail because no trigger for FW INT!!!!!!!!\n");
+			break;
+		}
+	
+		// 2. Find the last BOX number which has been writen.
+		BoxNum = pHalData->LastHMEBoxNum;
+		switch(BoxNum)
+		{
+			case 0:
+				BOXReg = REG_HMEBOX_0;
+				BOXExtReg = REG_HMEBOX_EXT_0;
+				break;
+			case 1:
+				BOXReg = REG_HMEBOX_1;
+				BOXExtReg = REG_HMEBOX_EXT_1;
+				break;
+			case 2:
+				BOXReg = REG_HMEBOX_2;
+				BOXExtReg = REG_HMEBOX_EXT_2;
+				break;
+			case 3:
+				BOXReg = REG_HMEBOX_3;
+				BOXExtReg = REG_HMEBOX_EXT_3;
+				break;
+			default:
+				break;
+		}
+
+		// 3. Check if the box content is empty.
+		IsFwRead = CheckFwReadLastH2C(padapter, BoxNum);
+		while(!IsFwRead)
+		{
+			//wait until Fw read
+			WaitH2cLimmit--;
+			if(WaitH2cLimmit == 0)
+			{
+				DBG_8192C("FillH2CCmd92C(): Wating too long for FW read clear HMEBox(%d)!!!\n", BoxNum);
+				break;
+			}
+			rtw_udelay_os(10); //us
+			IsFwRead = CheckFwReadLastH2C(padapter, BoxNum);
+			U1btmp = rtw_read8(padapter, 0x1BF);
+			//DBG_8192C("FillH2CCmd92C(): Wating for FW read clear HMEBox(%d)!!! 0x1BF = %2x\n", BoxNum, U1btmp);
+		}
+
+		// If Fw has not read the last H2C cmd, break and give up this H2C.
+		if(!IsFwRead)
+		{
+			DBG_8192C("FillH2CCmd92C():  Write H2C register BOX[%d] fail!!!!! Fw do not read. \n", BoxNum);
+			break;
+		}
+
+		// 4. Fill the H2C cmd into box		
+		_rtw_memset(BoxContent, 0, sizeof(BoxContent));
+		_rtw_memset(BoxExtContent, 0, sizeof(BoxExtContent));
+		
+		BoxContent[0] = ElementID; // Fill element ID
+
+		//DBG_8192C("FillH2CCmd92C():Write ElementID BOXReg(%4x) = %2x \n", BOXReg, ElementID);
+
+		switch(CmdLen)
+		{
+			case 1:
+			{
+				BoxContent[0] &= ~(BIT7);
+				_rtw_memcpy((u8 *)(BoxContent)+1, pCmdBuffer+BufIndex, 1);
+				//PlatformEFIOWrite4Byte(Adapter, BOXReg, *((pu4Byte)BoxContent));
+				//For Endian Free.
+				for(idx= 0; idx < 4; idx++)
+				{
+					rtw_write8(padapter, BOXReg+idx, BoxContent[idx]);
+				}
+				break;
+			}
+			case 2:
+			{	
+				BoxContent[0] &= ~(BIT7);
+				_rtw_memcpy((u8 *)(BoxContent)+1, pCmdBuffer+BufIndex, 2);
+				//PlatformEFIOWrite4Byte(Adapter, BOXReg, *((pu4Byte)BoxContent));
+				for(idx=0; idx < 4; idx++)
+				{
+					rtw_write8(padapter, BOXReg+idx, BoxContent[idx]);
+				}
+				break;
+			}
+			case 3:
+			{
+				BoxContent[0] &= ~(BIT7);
+				_rtw_memcpy((u8 *)(BoxContent)+1, pCmdBuffer+BufIndex, 3);
+				//PlatformEFIOWrite4Byte(Adapter, BOXReg, *((pu4Byte)BoxContent));
+				for(idx = 0; idx < 4 ; idx++)
+				{
+					rtw_write8(padapter, BOXReg+idx, BoxContent[idx]);
+				}
+				break;
+			}
+			case 4:
+			{
+				BoxContent[0] |= (BIT7);
+				_rtw_memcpy((u8 *)(BoxExtContent), pCmdBuffer+BufIndex, 2);
+				_rtw_memcpy((u8 *)(BoxContent)+1, pCmdBuffer+BufIndex+2, 2);
+				//PlatformEFIOWrite2Byte(Adapter, BOXExtReg, *((pu2Byte)BoxExtContent));
+				//PlatformEFIOWrite4Byte(Adapter, BOXReg, *((pu4Byte)BoxContent));
+				for(idx = 0 ; idx < 2 ; idx ++)
+				{
+					rtw_write8(padapter, BOXExtReg+idx, BoxExtContent[idx]);
+				}		
+				for(idx = 0 ; idx < 4 ; idx ++)
+				{
+					rtw_write8(padapter, BOXReg+idx, BoxContent[idx]);
+				}
+				break;
+			}
+			case 5:
+			{
+				BoxContent[0] |= (BIT7);
+				_rtw_memcpy((u8 *)(BoxExtContent), pCmdBuffer+BufIndex, 2);
+				_rtw_memcpy((u8 *)(BoxContent)+1, pCmdBuffer+BufIndex+2, 3);
+				//PlatformEFIOWrite2Byte(Adapter, BOXExtReg, *((pu2Byte)BoxExtContent));
+				//PlatformEFIOWrite4Byte(Adapter, BOXReg, *((pu4Byte)BoxContent));
+				for(idx = 0 ; idx < 2 ; idx ++)
+				{
+					rtw_write8(padapter, BOXExtReg+idx, BoxExtContent[idx]);
+				}
+				for(idx = 0 ; idx < 4 ; idx ++)
+				{
+					rtw_write8(padapter, BOXReg+idx, BoxContent[idx]);
+				}
+				break;
+			}
+			default:
+				break;
+		}
+			
+		//DBG_8192C("FillH2CCmd(): BoxExtContent=0x%x\n", *(u16*)BoxExtContent);		
+		//DBG_8192C("FillH2CCmd(): BoxContent=0x%x\n", *(u32*)BoxContent);
+			
+		// 5. Normal chip does not need to check if the H2C cmd has be written successfully.
+		// 92D test chip does not need to check,
+		bWriteSucess = _TRUE;
+
+		// Record the next BoxNum
+		pHalData->LastHMEBoxNum = BoxNum+1;
+		if(pHalData->LastHMEBoxNum == 4) // loop to 0
+			pHalData->LastHMEBoxNum = 0;
+		
+		//DBG_8192C("FillH2CCmd92C():pHalData->LastHMEBoxNum  = %d\n", pHalData->LastHMEBoxNum);
+		
+	}
+
+_func_exit_;
+#ifdef CONFIG_CONCURRENT_MODE
+	_exit_critical_mutex(padapter->ph2c_fwcmd_mutex, NULL);	
+#endif //CONFIG_CONCURRENT_MODE
+}
+
+VOID
+FillH2CCmd92D(	
+	IN	PADAPTER	Adapter,
+	IN	u8 	ElementID,
+	IN	u32 	CmdLen,
+	IN	u8*	pCmdBuffer
+)
+{
+	u32	tmpCmdBuf[2];	
+
+	//Adapter = ADJUST_TO_ADAPTIVE_ADAPTER(Adapter, TRUE);
+
+	if(Adapter->bFWReady == _FALSE)
+	{
+		DBG_8192C("FillH2CCmd92D(): return H2C cmd because of Fw download fail!!!\n");
+		return;
+	}
+
+	_rtw_memset(tmpCmdBuf, 0, 8);
+	_rtw_memcpy(tmpCmdBuf, pCmdBuffer, CmdLen);
+
+	_FillH2CCmd92D(Adapter, ElementID, CmdLen, (u8 *)&tmpCmdBuf);
+
+	return;
+}
+
+u8 rtl8192d_h2c_msg_hdl(_adapter *padapter, unsigned char *pbuf);
+u8 rtl8192d_h2c_msg_hdl(_adapter *padapter, unsigned char *pbuf)
+{	
+	u8 ElementID, CmdLen;
+	u8 *pCmdBuffer;
+	struct cmd_msg_parm  *pcmdmsg;
+	
+	if(!pbuf)
+		return H2C_PARAMETERS_ERROR;
+
+	pcmdmsg = (struct cmd_msg_parm*)pbuf;
+	ElementID = pcmdmsg->eid;
+	CmdLen = pcmdmsg->sz;
+	pCmdBuffer = pcmdmsg->buf;
+
+	FillH2CCmd92D(padapter, ElementID, CmdLen, pCmdBuffer);
+
+	return H2C_SUCCESS;
+}
+
+
+u8 rtl8192d_set_raid_cmd(_adapter*padapter, u32 mask, u8 arg)
+{	
+	u8	buf[5];
+	u8	res=_SUCCESS;
+	
+_func_enter_;	
+	
+	_rtw_memset(buf, 0, 5);
+	mask = cpu_to_le32( mask );
+	_rtw_memcpy(buf, &mask, 4);
+	buf[4]  = arg;
+
+	FillH2CCmd92D(padapter, H2C_RA_MASK, 5, buf);
+	
+_func_exit_;
+
+	return res;
+
+}
+
+//bitmap[0:27] = tx_rate_bitmap
+//bitmap[28:31]= Rate Adaptive id
+//arg[0:4] = macid
+//arg[5] = Short GI
+void rtl8192d_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg)
+{	
+	
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+		
+	if(pHalData->fw_ractrl == _TRUE)
+	{
+		rtl8192d_set_raid_cmd(pAdapter, bitmap, arg);
+	}
+	else
+	{
+		u8 macid, init_rate, shortGIrate=_FALSE;
+
+		init_rate = get_highest_rate_idx(bitmap&0x0fffffff)&0x3f;
+		
+		macid = arg&0x1f;
+		
+		shortGIrate = (arg&BIT(5)) ? _TRUE:_FALSE;
+		
+		if (shortGIrate==_TRUE)
+			init_rate |= BIT(6);
+
+		rtw_write8(pAdapter, (REG_INIDATA_RATE_SEL+macid), (u8)init_rate);		
+	}
+
+}
+
+
+void rtl8192d_set_FwPwrMode_cmd(_adapter*padapter, u8 Mode)
+{
+	struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
+	u8	u1H2CSetPwrMode[3]={0};
+	u8	beacon_interval = 1;
+	
+_func_enter_;
+
+	DBG_871X("%s(): Mode = %d, SmartPS = %d\n", __FUNCTION__,Mode,pwrpriv->smart_ps);
+
+	SET_H2CCMD_PWRMODE_PARM_MODE(u1H2CSetPwrMode, Mode);
+	SET_H2CCMD_PWRMODE_PARM_SMART_PS(u1H2CSetPwrMode, pwrpriv->smart_ps);
+	SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(u1H2CSetPwrMode, beacon_interval);
+
+	FillH2CCmd92D(padapter, H2C_SETPWRMODE, 3, u1H2CSetPwrMode);
+
+_func_exit_;
+}
+
+void ConstructBeacon(_adapter *padapter, u8 *pframe, u32 *pLength);
+void ConstructBeacon(_adapter *padapter, u8 *pframe, u32 *pLength)
+{
+	struct ieee80211_hdr	*pwlanhdr;
+	u16					*fctrl;
+	u32					rate_len, pktlen;
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX 		*cur_network = &(pmlmeinfo->network);
+	u8	bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+
+
+	//DBG_871X("%s\n", __FUNCTION__);
+
+	pwlanhdr = (struct ieee80211_hdr *)pframe;	
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+	
+	_rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/);
+
+	SetFrameSubType(pframe, WIFI_BEACON);
+	
+	pframe += sizeof(struct ieee80211_hdr_3addr);	
+	pktlen = sizeof (struct ieee80211_hdr_3addr);
+	
+	//timestamp will be inserted by hardware
+	pframe += 8;
+	pktlen += 8;
+
+	// beacon interval: 2 bytes
+	_rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); 
+
+	pframe += 2;
+	pktlen += 2;
+
+	// capability info: 2 bytes
+	_rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2);
+
+	pframe += 2;
+	pktlen += 2;
+
+
+	if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)
+	{
+		DBG_871X("ie len=%u\n", cur_network->IELength);
+		pktlen += cur_network->IELength - sizeof(NDIS_802_11_FIXED_IEs);
+		_rtw_memcpy(pframe, cur_network->IEs+sizeof(NDIS_802_11_FIXED_IEs), pktlen);
+		
+		goto _ConstructBeacon;
+	}
+
+	//below for ad-hoc mode
+
+	// SSID
+	pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pktlen);
+
+	// supported rates...
+	rate_len = rtw_get_rateset_len(cur_network->SupportedRates);
+	pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &pktlen);
+
+	// DS parameter set
+	pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pktlen);
+
+	if( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)
+	{
+		u32 ATIMWindow;
+		// IBSS Parameter Set...
+		//ATIMWindow = cur->Configuration.ATIMWindow;
+		ATIMWindow = 0;
+		pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pktlen);
+	}	
+
+
+	//todo: ERP IE
+	
+	
+	// EXTERNDED SUPPORTED RATE
+	if (rate_len > 8)
+	{
+		pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pktlen);
+	}
+
+
+	//todo:HT for adhoc
+
+_ConstructBeacon:
+
+	if ((pktlen + TXDESC_SIZE) > 512)
+	{
+		DBG_871X("beacon frame too large\n");
+		return;
+	}
+
+	*pLength = pktlen;
+
+	//DBG_871X("%s bcn_sz=%u\n", __FUNCTION__, pktlen);
+
+}
+
+void ConstructPSPoll(_adapter *padapter, u8 *pframe, u32 *pLength);
+void ConstructPSPoll(_adapter *padapter, u8 *pframe, u32 *pLength)
+{
+	struct ieee80211_hdr	*pwlanhdr;
+	u16					*fctrl;
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	//DBG_871X("%s\n", __FUNCTION__);
+
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	// Frame control.
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+	SetPwrMgt(fctrl);
+	SetFrameSubType(pframe, WIFI_PSPOLL);
+
+	// AID.
+	SetDuration(pframe, (pmlmeinfo->aid| 0xc000));
+
+	// BSSID.
+	_rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+
+	// TA.
+	_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+
+	*pLength = 16;
+}
+
+void ConstructNullFunctionData(_adapter *padapter, u8 *pframe, u32 *pLength, u8 *StaAddr, BOOLEAN bForcePowerSave);
+void ConstructNullFunctionData(_adapter *padapter, u8 *pframe, u32 *pLength, u8 *StaAddr, BOOLEAN bForcePowerSave)
+{
+	struct ieee80211_hdr	*pwlanhdr;
+	u16					*fctrl;
+	u32					pktlen;
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	struct wlan_network	*cur_network = &pmlmepriv->cur_network;
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	//DBG_871X("%s:%d\n", __FUNCTION__, bForcePowerSave);
+
+	pwlanhdr = (struct ieee80211_hdr *)pframe;
+
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+	if (bForcePowerSave)
+	{
+		SetPwrMgt(fctrl);
+	}
+
+	switch(cur_network->network.InfrastructureMode)
+	{			
+		case Ndis802_11Infrastructure:
+			SetToDs(fctrl);
+			_rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+			_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+			_rtw_memcpy(pwlanhdr->addr3, StaAddr, ETH_ALEN);
+			break;
+		case Ndis802_11APMode:
+			SetFrDs(fctrl);
+			_rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
+			_rtw_memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+			_rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN);
+			break;
+		case Ndis802_11IBSS:
+		default:
+			_rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
+			_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
+			_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+			break;
+	}
+
+	SetSeqNum(pwlanhdr, 0);
+
+	SetFrameSubType(pframe, WIFI_DATA_NULL);
+
+	pframe += sizeof(struct ieee80211_hdr_3addr);
+	pktlen = sizeof(struct ieee80211_hdr_3addr);
+
+	*pLength = pktlen;
+}
+
+void ConstructProbeRsp(_adapter *padapter, u8 *pframe, u32 *pLength, u8 *StaAddr, BOOLEAN bHideSSID);
+void ConstructProbeRsp(_adapter *padapter, u8 *pframe, u32 *pLength, u8 *StaAddr, BOOLEAN bHideSSID)
+{
+	struct ieee80211_hdr	*pwlanhdr;
+	u16					*fctrl;	
+	u8					*mac, *bssid;
+	u32					pktlen;
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX 		*cur_network = &(pmlmeinfo->network);
+	
+	
+	//DBG_871X("%s\n", __FUNCTION__);
+	
+	pwlanhdr = (struct ieee80211_hdr *)pframe;	
+	
+	mac = myid(&(padapter->eeprompriv));
+	bssid = cur_network->MacAddress;
+	
+	fctrl = &(pwlanhdr->frame_ctl);
+	*(fctrl) = 0;
+	_rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3, bssid, ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, 0);
+	SetFrameSubType(fctrl, WIFI_PROBERSP);
+	
+	pktlen = sizeof(struct ieee80211_hdr_3addr);
+	pframe += pktlen;
+
+	if(cur_network->IELength>MAX_IE_SZ)
+		return;
+
+	_rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength);
+	pframe += cur_network->IELength;
+	pktlen += cur_network->IELength;
+	
+	*pLength = pktlen;
+}
+
+//
+// Description: In normal chip, we should send some packet to Hw which will be used by Fw
+//			in FW LPS mode. The function is to fill the Tx descriptor of this packets, then 
+//			Fw can tell Hw to send these packet derectly.
+// Added by tynli. 2009.10.15.
+//
+static VOID
+FillFakeTxDescriptor92D(
+	IN PADAPTER		Adapter,
+	IN u8*			pDesc,
+	IN u32			BufferLen,
+	IN BOOLEAN		IsPsPoll
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct tx_desc	*ptxdesc = (struct tx_desc *)pDesc;
+
+	// Clear all status
+	_rtw_memset(pDesc, 0, 32);
+
+	//offset 0
+	ptxdesc->txdw0 |= cpu_to_le32( OWN | FSG | LSG); //own, bFirstSeg, bLastSeg;
+
+	ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<<OFFSET_SHT)&0x00ff0000); //32 bytes for TX Desc
+
+	ptxdesc->txdw0 |= cpu_to_le32(BufferLen&0x0000ffff); // Buffer size + command header
+
+	//offset 4
+	ptxdesc->txdw1 |= cpu_to_le32((QSLT_MGNT<<QSEL_SHT)&0x00001f00); // Fixed queue of Mgnt queue
+
+	//Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw.
+	if(IsPsPoll)
+	{
+		ptxdesc->txdw1 |= cpu_to_le32(NAVUSEHDR);
+	}
+	else
+	{
+		ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number
+		ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29.
+	}
+
+	//offset 16
+	ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+
+	if(pHalData->CurrentBandType92D == BAND_ON_5G)
+		ptxdesc->txdw5 |= cpu_to_le32(BIT(2));// use OFDM 6Mbps
+
+#ifdef CONFIG_USB_HCI
+	// USB interface drop packet if the checksum of descriptor isn't correct.
+	// Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.).
+	rtl8192du_cal_txdesc_chksum(ptxdesc);
+#endif
+
+	RT_PRINT_DATA(_module_rtl8712_cmd_c_, _drv_info_, "FillFakeTxDescriptor92D(): H2C Tx Desc Content ----->\n", pDesc, TXDESC_SIZE);
+}
+
+
+//
+// Description: Fill the reserved packets that FW will use to RSVD page. 
+//			Now we just send 4 types packet to rsvd page.
+//			(1)Beacon, (2)Ps-poll, (3)Null data, (4)ProbeRsp.
+//	Input: 
+//	    bDLFinished - FALSE: At the first time we will send all the packets as a large packet to Hw,
+//				 		so we need to set the packet length to total lengh.
+//			      TRUE: At the second time, we should send the first packet (default:beacon)
+//						to Hw again and set the lengh in descriptor to the real beacon lengh.
+// 2009.10.15 by tynli.
+void SetFwRsvdPagePkt(PADAPTER Adapter, BOOLEAN bDLFinished);
+void SetFwRsvdPagePkt(PADAPTER Adapter, BOOLEAN bDLFinished)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct xmit_frame	*pmgntframe;
+	struct pkt_attrib	*pattrib;
+	struct xmit_priv	*pxmitpriv = &(Adapter->xmitpriv);
+	struct mlme_ext_priv	*pmlmeext = &(Adapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	u32	BeaconLength, ProbeRspLength, PSPollLength, NullFunctionDataLength;
+	u8	*ReservedPagePacket;
+	u8	PageNum=0, U1bTmp, TxDescLen=0, TxDescOffset=0;
+	u16	BufIndex=0;
+	u32	TotalPacketLen;
+	u8	u1RsvdPageLoc[3]={0};
+	BOOLEAN	bDLOK = _FALSE;
+
+	DBG_871X("%s\n", __FUNCTION__);
+
+	ReservedPagePacket = (u8*)rtw_malloc(1000);
+	if(ReservedPagePacket == NULL){
+		DBG_871X("%s(): alloc ReservedPagePacket fail !!!\n", __FUNCTION__);
+		return;
+	}
+	
+	_rtw_memset(ReservedPagePacket, 0, 1000);
+
+	TxDescLen = 32;//TX_DESC_SIZE;
+
+#ifdef CONFIG_USB_HCI
+	BufIndex = TXDESC_OFFSET;
+	TxDescOffset = TxDescLen+8; //Shift index for 8 bytes because the dummy bytes in the first descipstor.
+#else
+	BufIndex = 0;
+	TxDescOffset = 0;
+#endif
+
+	//(1) beacon
+	ConstructBeacon(Adapter,&ReservedPagePacket[BufIndex],&BeaconLength);
+
+	RT_PRINT_DATA(_module_rtl8712_cmd_c_, _drv_info_, 
+		"SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: BCN\n", 
+		&ReservedPagePacket[BufIndex], (BeaconLength+BufIndex));
+
+//--------------------------------------------------------------------
+
+	// When we count the first page size, we need to reserve description size for the RSVD 
+	// packet, it will be filled in front of the packet in TXPKTBUF.
+	U1bTmp = (u8)PageNum_128(BeaconLength+TxDescLen);
+	PageNum += U1bTmp;
+	// To reserved 2 pages for beacon buffer. 2010.06.24.
+	if(PageNum == 1)
+		PageNum+=1;
+	pHalData->FwRsvdPageStartOffset = PageNum;
+
+	BufIndex = (PageNum*128) + TxDescOffset;
+		
+	//(2) ps-poll
+	ConstructPSPoll(Adapter, &ReservedPagePacket[BufIndex],&PSPollLength);
+	
+	FillFakeTxDescriptor92D(Adapter, &ReservedPagePacket[BufIndex-TxDescLen], PSPollLength, _TRUE);
+
+	RT_PRINT_DATA(_module_rtl8712_cmd_c_, _drv_info_, 
+		"SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: PS-POLL\n", 
+		&ReservedPagePacket[BufIndex-TxDescLen], (PSPollLength+TxDescLen));
+
+	SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(u1RsvdPageLoc, PageNum );
+
+//------------------------------------------------------------------
+			
+	U1bTmp = (u8)PageNum_128(PSPollLength+TxDescLen);
+	PageNum += U1bTmp;
+
+	BufIndex = (PageNum*128) + TxDescOffset;
+
+	//(3) null data
+	ConstructNullFunctionData(
+		Adapter, 
+		&ReservedPagePacket[BufIndex],
+		&NullFunctionDataLength,
+		get_my_bssid(&(pmlmeinfo->network)),
+		_FALSE);
+	
+	FillFakeTxDescriptor92D(Adapter, &ReservedPagePacket[BufIndex-TxDescLen], NullFunctionDataLength, _FALSE);
+
+	SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(u1RsvdPageLoc, PageNum);
+
+	RT_PRINT_DATA(_module_rtl8712_cmd_c_, _drv_info_, 
+		"SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: NULL DATA \n", 
+		&ReservedPagePacket[BufIndex-TxDescLen], (NullFunctionDataLength+TxDescLen));
+//------------------------------------------------------------------
+
+	U1bTmp = (u8)PageNum_128(NullFunctionDataLength+TxDescLen);
+	PageNum += U1bTmp;
+	
+	BufIndex = (PageNum*128) + TxDescOffset;
+	
+	//(4) probe response
+	ConstructProbeRsp(
+		Adapter, 
+		&ReservedPagePacket[BufIndex],
+		&ProbeRspLength,
+		get_my_bssid(&(pmlmeinfo->network)),
+		_FALSE);
+	
+	FillFakeTxDescriptor92D(Adapter, &ReservedPagePacket[BufIndex-TxDescLen], ProbeRspLength, _FALSE);
+
+	SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(u1RsvdPageLoc, PageNum);
+
+	RT_PRINT_DATA(_module_rtl8712_cmd_c_, _drv_info_, 
+		"SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: PROBE RSP \n", 
+		&ReservedPagePacket[BufIndex-TxDescLen], (ProbeRspLength-TxDescLen));
+
+//------------------------------------------------------------------
+
+	U1bTmp = (u8)PageNum_128(ProbeRspLength+TxDescLen);
+
+	PageNum += U1bTmp;
+
+	TotalPacketLen = (PageNum*128);
+
+	if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
+	{
+		return;
+	}
+
+	//update attribute
+	pattrib = &pmgntframe->attrib;
+	update_mgntframe_attrib(Adapter, pattrib);
+	pattrib->qsel = 0x10;
+	pattrib->pktlen = pattrib->last_txcmdsz = TotalPacketLen - TxDescLen;
+	_rtw_memcpy(pmgntframe->buf_addr, ReservedPagePacket, TotalPacketLen);
+
+	Adapter->HalFunc.mgnt_xmit(Adapter, pmgntframe);
+
+	bDLOK = _TRUE;
+
+	if(bDLOK)
+	{
+		DBG_871X("Set RSVD page location to Fw.\n");
+		FillH2CCmd92D(Adapter, H2C_RSVDPAGE, sizeof(u1RsvdPageLoc), u1RsvdPageLoc);
+		//FillH2CCmd92D(Adapter, H2C_RSVDPAGE, sizeof(RsvdPageLoc), (u8 *)&RsvdPageLoc);
+	}
+
+	rtw_mfree(ReservedPagePacket,1000);
+}
+
+void rtl8192d_set_FwJoinBssReport_cmd(_adapter* padapter, u8 mstatus)
+{
+	u8	u1JoinBssRptParm[1]={0};
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	BOOLEAN	bRecover = _FALSE;
+	
+_func_enter_;
+
+	DBG_871X("%s\n", __FUNCTION__);
+
+	if(mstatus == 1)
+	{
+		// We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C.
+		// Suggested by filen. Added by tynli.
+		rtw_write16(padapter, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid));
+		// Do not set TSF again here or vWiFi beacon DMA INT will not work.
+		//Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_CORRECT_TSF, (pu1Byte)(&bTypeIbss));
+		// Hw sequende enable by dedault. 2010.06.23. by tynli.
+
+		//set REG_CR bit 8
+		pHalData->RegCR_1 |= BIT0;
+		rtw_write8(padapter,  REG_CR+1, pHalData->RegCR_1);
+
+		// Disable Hw protection for a time which revserd for Hw sending beacon.
+		// Fix download reserved page packet fail that access collision with the protection time.
+		// 2010.05.11. Added by tynli.
+		//SetBcnCtrlReg(Adapter, 0, BIT3);
+		//SetBcnCtrlReg(Adapter, BIT4, 0);
+		rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(3)));
+		rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4));
+
+		// Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.
+		if(pHalData->RegFwHwTxQCtrl&BIT6)
+			bRecover = _TRUE;
+		rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl&(~BIT6)));
+		pHalData->RegFwHwTxQCtrl &= (~BIT6);
+		SetFwRsvdPagePkt(padapter, 0);
+				
+		// 2010.05.11. Added by tynli.
+		//SetBcnCtrlReg(Adapter, BIT3, 0);
+		//SetBcnCtrlReg(Adapter, 0, BIT4);
+		rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(3));
+		rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(4)));
+
+		// To make sure that if there exists an adapter which would like to send beacon.
+		// If exists, the origianl value of 0x422[6] will be 1, we should check this to
+		// prevent from setting 0x422[6] to 0 after download reserved page, or it will cause 
+		// the beacon cannot be sent by HW.
+		// 2010.06.23. Added by tynli.
+		if(bRecover)
+		{
+			rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl|BIT6));
+			pHalData->RegFwHwTxQCtrl |= BIT6;
+		}
+
+		// Clear CR[8] or beacon packet will not be send to TxBuf anymore.
+		pHalData->RegCR_1 &= (~BIT0);
+		rtw_write8(padapter,  REG_CR+1, pHalData->RegCR_1);
+	}
+
+	SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(u1JoinBssRptParm, mstatus);
+	
+	FillH2CCmd92D(padapter, H2C_JOINBSSRPT, 1, u1JoinBssRptParm);
+
+_func_exit_;
+}
+
+#ifdef CONFIG_P2P
+void rtl8192d_set_p2p_ctw_period_cmd(_adapter* padapter, u8 ctwindow)
+{
+	u8	CTWPeriod = ctwindow;
+
+	FillH2CCmd92D(padapter, H2C_P2P_PS_CTW_CMD, 1, (u8 *)(&CTWPeriod));
+	
+}
+
+void rtl8192d_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);	
+	struct pwrctrl_priv		*pwrpriv = &padapter->pwrctrlpriv;
+	struct wifidirect_info	*pwdinfo = &( padapter->wdinfo );
+	struct P2P_PS_Offload_t	*p2p_ps_offload = &pHalData->p2p_ps_offload;
+	u8	i;
+	u16	ctwindow;
+	u32	start_time, tsf_low;
+
+_func_enter_;
+
+	switch(p2p_ps_state)
+	{
+		case P2P_PS_DISABLE:
+			DBG_8192C("P2P_PS_DISABLE \n");
+			_rtw_memset(p2p_ps_offload, 0 ,1);
+			break;
+		case P2P_PS_ENABLE:
+			DBG_8192C("P2P_PS_ENABLE \n");
+			// update CTWindow value.
+			if( pwdinfo->ctwindow > 0 )
+			{
+				p2p_ps_offload->CTWindow_En = 1;
+				ctwindow = pwdinfo->ctwindow;
+				rtl8192d_set_p2p_ctw_period_cmd(padapter, ctwindow);
+				//rtw_write16(padapter, REG_ATIMWND, ctwindow);
+			}
+
+			// hw only support 2 set of NoA
+			for( i=0 ; i<pwdinfo->noa_num ; i++)
+			{
+				// To control the register setting for which NOA
+				rtw_write8(padapter, 0x5CF, (i << 4));
+				if(i == 0)
+					p2p_ps_offload->NoA0_En = 1;
+				else
+					p2p_ps_offload->NoA1_En = 1;
+
+				// config P2P NoA Descriptor Register
+				rtw_write32(padapter, 0x5E0, pwdinfo->noa_duration[i]);
+
+				rtw_write32(padapter, 0x5E4, pwdinfo->noa_interval[i]);
+
+				//Get Current TSF value
+				tsf_low = rtw_read32(padapter, REG_TSFTR);
+
+				start_time = pwdinfo->noa_start_time[i];
+				if(pwdinfo->noa_count[i] != 1)
+				{
+					while( start_time <= (tsf_low+(50*1024) ) )
+					{
+						start_time += pwdinfo->noa_interval[i];
+						if(pwdinfo->noa_count[i] != 255)
+							pwdinfo->noa_count[i]--;
+					}
+				}
+				//DBG_8192C("%s(): start_time = %x\n",__FUNCTION__,start_time);
+				rtw_write32(padapter, 0x5E8, start_time);
+
+				rtw_write8(padapter, 0x5EC, pwdinfo->noa_count[i]);
+			}
+
+			if( (pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0) )
+			{
+				// rst p2p circuit
+				rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(4));
+
+				p2p_ps_offload->Offload_En = 1;
+
+				if(pwdinfo->role == P2P_ROLE_GO)
+				{
+					p2p_ps_offload->role= 1;
+					p2p_ps_offload->AllStaSleep = 0;
+				}
+				else
+				{
+					p2p_ps_offload->role= 0;
+				}
+
+				p2p_ps_offload->discovery = 0;
+			}
+			break;
+		case P2P_PS_SCAN:
+			DBG_8192C("P2P_PS_SCAN \n");
+			p2p_ps_offload->discovery = 1;
+			break;
+		case P2P_PS_SCAN_DONE:
+			DBG_8192C("P2P_PS_SCAN_DONE \n");
+			p2p_ps_offload->discovery = 0;
+			pwdinfo->p2p_ps = P2P_PS_ENABLE;
+			break;
+		default:
+			break;
+	}
+
+	FillH2CCmd92D(padapter, H2C_P2P_PS_OFFLOAD, 1, (u8 *)p2p_ps_offload);
+
+_func_exit_;
+
+}
+#endif //CONFIG_P2P
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_dm.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_dm.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_dm.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_dm.c	2017-09-23 03:42:49.958675248 +0800
@@ -0,0 +1,3032 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+//============================================================
+// Description:
+//
+// This file is for 92CE/92CU dynamic mechanism only
+//
+//
+//============================================================
+
+//============================================================
+// include files
+//============================================================
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtw_byteorder.h>
+
+#include <hal_init.h>
+
+#include <rtl8192d_hal.h>
+//avoid to warn in FreeBSD
+u32 EDCAParam[maxAP][3] =
+{          // UL			DL
+	{0x5ea322, 0x00a630, 0x00a44f}, //atheros AP
+	{0x5ea32b, 0x5ea42b, 0x5e4322}, //broadcom AP
+	{0x3ea430, 0x00a630, 0x3ea44f}, //cisco AP
+	{0x5ea44f, 0x00a44f, 0x5ea42b}, //marvell AP
+	{0x5ea422, 0x00a44f, 0x00a44f}, //ralink AP
+	//{0x5ea44f, 0x5ea44f, 0x5ea44f}, //realtek AP
+	{0xa44f, 0x5ea44f, 0x5e431c}, //realtek AP
+	{0x5ea42b, 0xa630, 0x5e431c}, //airgocap AP
+	{0x5ea42b, 0x5ea42b, 0x5ea42b}, //unknown AP
+//	{0x5e4322, 0x00a44f, 0x5ea44f}, //unknown AP
+};
+
+ u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D] = {
+	0x7f8001fe, // 0, +6.0dB
+	0x788001e2, // 1, +5.5dB
+	0x71c001c7, // 2, +5.0dB
+	0x6b8001ae, // 3, +4.5dB
+	0x65400195, // 4, +4.0dB
+	0x5fc0017f, // 5, +3.5dB
+	0x5a400169, // 6, +3.0dB
+	0x55400155, // 7, +2.5dB
+	0x50800142, // 8, +2.0dB
+	0x4c000130, // 9, +1.5dB
+	0x47c0011f, // 10, +1.0dB
+	0x43c0010f, // 11, +0.5dB
+	0x40000100, // 12, +0dB
+	0x3c8000f2, // 13, -0.5dB
+	0x390000e4, // 14, -1.0dB
+	0x35c000d7, // 15, -1.5dB
+	0x32c000cb, // 16, -2.0dB
+	0x300000c0, // 17, -2.5dB
+	0x2d4000b5, // 18, -3.0dB
+	0x2ac000ab, // 19, -3.5dB
+	0x288000a2, // 20, -4.0dB
+	0x26000098, // 21, -4.5dB
+	0x24000090, // 22, -5.0dB
+	0x22000088, // 23, -5.5dB
+	0x20000080, // 24, -6.0dB
+	0x1e400079, // 25, -6.5dB
+	0x1c800072, // 26, -7.0dB
+	0x1b00006c, // 27. -7.5dB
+	0x19800066, // 28, -8.0dB
+	0x18000060, // 29, -8.5dB
+	0x16c0005b, // 30, -9.0dB
+	0x15800056, // 31, -9.5dB
+	0x14400051, // 32, -10.0dB
+	0x1300004c, // 33, -10.5dB
+	0x12000048, // 34, -11.0dB
+	0x11000044, // 35, -11.5dB
+	0x10000040, // 36, -12.0dB
+	0x0f00003c,// 37, -12.5dB
+	0x0e400039,// 38, -13.0dB    
+	0x0d800036,// 39, -13.5dB
+	0x0cc00033,// 40, -14.0dB
+	0x0c000030,// 41, -14.5dB
+	0x0b40002d,// 42, -15.0dB	
+};
+
+
+u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = {
+	{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},	// 0, +0dB
+	{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},	// 1, -0.5dB
+	{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},	// 2, -1.0dB
+	{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},	// 3, -1.5dB
+	{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},	// 4, -2.0dB 
+	{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},	// 5, -2.5dB
+	{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},	// 6, -3.0dB
+	{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},	// 7, -3.5dB
+	{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},	// 8, -4.0dB 
+	{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},	// 9, -4.5dB
+	{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},	// 10, -5.0dB 
+	{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},	// 11, -5.5dB
+	{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},	// 12, -6.0dB 
+	{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},	// 13, -6.5dB
+	{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},	// 14, -7.0dB 
+	{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},	// 15, -7.5dB
+	{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},	// 16, -8.0dB 
+	{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},	// 17, -8.5dB
+	{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},	// 18, -9.0dB 
+	{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},	// 19, -9.5dB
+	{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},	// 20, -10.0dB
+	{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},	// 21, -10.5dB
+	{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01},	// 22, -11.0dB
+	{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01},	// 23, -11.5dB
+	{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01},	// 24, -12.0dB
+	{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01},	// 25, -12.5dB
+	{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01},	// 26, -13.0dB
+	{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01},	// 27, -13.5dB
+	{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01},	// 28, -14.0dB
+	{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01},	// 29, -14.5dB
+	{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01},	// 30, -15.0dB
+	{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01},	// 31, -15.5dB
+	{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}	// 32, -16.0dB
+};
+
+u8 CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]= {
+	{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},	// 0, +0dB	
+	{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},	// 1, -0.5dB 
+	{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},	// 2, -1.0dB  
+	{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00},	// 3, -1.5dB
+	{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},	// 4, -2.0dB  
+	{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00},	// 5, -2.5dB
+	{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},	// 6, -3.0dB  
+	{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},	// 7, -3.5dB  
+	{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},	// 8, -4.0dB  
+	{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},	// 9, -4.5dB
+	{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},	// 10, -5.0dB  
+	{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},	// 11, -5.5dB
+	{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},	// 12, -6.0dB  
+	{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},	// 13, -6.5dB 
+	{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},	// 14, -7.0dB  
+	{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},	// 15, -7.5dB
+	{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},	// 16, -8.0dB  
+	{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},	// 17, -8.5dB
+	{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},	// 18, -9.0dB  
+	{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},	// 19, -9.5dB
+	{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},	// 20, -10.0dB
+	{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},	// 21, -10.5dB
+	{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00},	// 22, -11.0dB
+	{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},	// 23, -11.5dB
+	{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},	// 24, -12.0dB
+	{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00},	// 25, -12.5dB
+	{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},	// 26, -13.0dB
+	{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},	// 27, -13.5dB
+	{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},	// 28, -14.0dB
+	{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},	// 29, -14.5dB
+	{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},	// 30, -15.0dB
+	{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},	// 31, -15.5dB
+	{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}	// 32, -16.0dB
+};	
+
+extern atomic_t GlobalMutexForGlobalAdapterList;
+
+/*-----------------------------------------------------------------------------
+ * Function:	dm_DIGInit()
+ *
+ * Overview:	Set DIG scheme init value.
+ *
+ * Input:		NONE
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *
+ *---------------------------------------------------------------------------*/
+static void dm_DIGInit(
+	IN	PADAPTER	pAdapter
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	pDIG_T	pDM_DigTable = &pdmpriv->DM_DigTable;
+	
+
+	pDM_DigTable->Dig_Enable_Flag = _TRUE;
+	pDM_DigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX;
+	
+	pDM_DigTable->CurIGValue = 0x20;
+	pDM_DigTable->PreIGValue = 0x0;
+
+	pDM_DigTable->CurSTAConnectState = pDM_DigTable->PreSTAConnectState = DIG_STA_DISCONNECT;
+	pDM_DigTable->CurMultiSTAConnectState = DIG_MultiSTA_DISCONNECT;
+
+	pDM_DigTable->RssiLowThresh 	= DM_DIG_THRESH_LOW;
+	pDM_DigTable->RssiHighThresh 	= DM_DIG_THRESH_HIGH;
+
+	pDM_DigTable->FALowThresh	= DM_FALSEALARM_THRESH_LOW;
+	pDM_DigTable->FAHighThresh	= DM_FALSEALARM_THRESH_HIGH;
+
+	
+	pDM_DigTable->rx_gain_range_max = DM_DIG_MAX;
+	pDM_DigTable->rx_gain_range_min = DM_DIG_MIN;
+
+	pDM_DigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT;
+	pDM_DigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX;
+	pDM_DigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN;
+
+	pDM_DigTable->PreCCKPDState = CCK_PD_STAGE_MAX;
+	pDM_DigTable->CurCCKPDState = CCK_PD_STAGE_LowRssi;
+	pDM_DigTable->ForbiddenIGI = DM_DIG_MIN;
+
+	pDM_DigTable->LargeFAHit = 0;
+	pDM_DigTable->Recover_cnt = 0;
+}
+
+#ifdef CONFIG_DUALMAC_CONCURRENT
+static BOOLEAN
+dm_DualMacGetParameterFromBuddyAdapter(
+		PADAPTER	Adapter
+)
+{
+	PADAPTER	BuddyAdapter = Adapter->pbuddy_adapter;
+	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
+	struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
+	struct mlme_priv *pbuddy_mlmepriv = &(BuddyAdapter->mlmepriv);
+
+	if(pHalData->MacPhyMode92D != DUALMAC_SINGLEPHY)
+		return _FALSE;
+	
+	if(BuddyAdapter == NULL)
+		return _FALSE;
+
+	if(pHalData->bSlaveOfDMSP)
+		return _FALSE;
+
+//sherry sync with 92C_92D, 20110701
+	if((check_fwstate(pbuddy_mlmepriv, _FW_LINKED)) && (!check_fwstate(pmlmepriv, _FW_LINKED))
+		&& (!check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) ))
+		return _TRUE;
+	else
+		return _FALSE;
+}
+#endif
+
+static VOID 
+odm_FalseAlarmCounterStatistics_ForSlaveOfDMSP(
+	IN	PADAPTER	Adapter
+)
+{
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	PADAPTER	BuddyAdapter = Adapter->pbuddy_adapter;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt);
+	struct dm_priv	*Buddydmpriv;
+	PFALSE_ALARM_STATISTICS	FlaseAlmCntBuddyAdapter;
+
+	if(BuddyAdapter == NULL)
+		return;
+
+	if (Adapter->DualMacConcurrent == _FALSE)
+		return;
+
+	Buddydmpriv = &GET_HAL_DATA(BuddyAdapter)->dmpriv;
+	FlaseAlmCntBuddyAdapter = &(Buddydmpriv->FalseAlmCnt);
+	
+	FalseAlmCnt->Cnt_Fast_Fsync =FlaseAlmCntBuddyAdapter->Cnt_Fast_Fsync;
+	FalseAlmCnt->Cnt_SB_Search_fail =FlaseAlmCntBuddyAdapter->Cnt_SB_Search_fail;		
+    	FalseAlmCnt->Cnt_Parity_Fail = FlaseAlmCntBuddyAdapter->Cnt_Parity_Fail;	
+	FalseAlmCnt->Cnt_Rate_Illegal = FlaseAlmCntBuddyAdapter->Cnt_Rate_Illegal;
+	FalseAlmCnt->Cnt_Crc8_fail = FlaseAlmCntBuddyAdapter->Cnt_Crc8_fail;
+	FalseAlmCnt->Cnt_Mcs_fail = FlaseAlmCntBuddyAdapter->Cnt_Mcs_fail;
+
+	FalseAlmCnt->Cnt_Ofdm_fail = 	FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal +
+								FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail +
+								FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail;
+
+	
+	//hold cck counter
+	FalseAlmCnt->Cnt_Cck_fail = FlaseAlmCntBuddyAdapter->Cnt_Cck_fail;
+
+	FalseAlmCnt->Cnt_all = (	FalseAlmCnt->Cnt_Fast_Fsync + 
+						FalseAlmCnt->Cnt_SB_Search_fail +
+						FalseAlmCnt->Cnt_Parity_Fail +
+						FalseAlmCnt->Cnt_Rate_Illegal +
+						FalseAlmCnt->Cnt_Crc8_fail +
+						FalseAlmCnt->Cnt_Mcs_fail +
+						FalseAlmCnt->Cnt_Cck_fail);	
+
+/*
+	RT_TRACE(	COMP_DIG, DBG_LOUD, ("Cnt_Fast_Fsync = %d, Cnt_SB_Search_fail = %d\n", 
+				FalseAlmCnt->Cnt_Fast_Fsync , FalseAlmCnt->Cnt_SB_Search_fail) );	
+	RT_TRACE(	COMP_DIG, DBG_LOUD, ("Cnt_Parity_Fail = %d, Cnt_Rate_Illegal = %d, Cnt_Crc8_fail = %d, Cnt_Mcs_fail = %d\n", 
+				FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal, FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail) );	
+	RT_TRACE(	COMP_DIG, DBG_LOUD, ("Cnt_Ofdm_fail = %d, Cnt_Cck_fail = %d, Cnt_all = %d\n", 
+				FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_Cck_fail, FalseAlmCnt->Cnt_all) );		
+*/
+#endif
+}
+
+static VOID 
+odm_FalseAlarmCounterStatistics(
+	IN	PADAPTER	Adapter
+	)
+{
+	u32	ret_value;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct mlme_priv	*pmlmepriv = &(Adapter->mlmepriv);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt);
+	u8	BBReset;
+
+	//hold ofdm counter
+	PHY_SetBBReg(Adapter, rOFDM0_LSTF, BIT31, 1); //hold page C counter
+	PHY_SetBBReg(Adapter, rOFDM1_LSTF, BIT31, 1); //hold page D counter
+	
+	ret_value = PHY_QueryBBReg(Adapter, rOFDM0_FrameSync, bMaskDWord);
+	FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff);
+	FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16);		
+	ret_value = PHY_QueryBBReg(Adapter, rOFDM_PHYCounter1, bMaskDWord);
+	FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16);	
+	ret_value = PHY_QueryBBReg(Adapter, rOFDM_PHYCounter2, bMaskDWord);
+	FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff);
+	FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16);
+	ret_value = PHY_QueryBBReg(Adapter, rOFDM_PHYCounter3, bMaskDWord);
+	FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff);
+
+	FalseAlmCnt->Cnt_Ofdm_fail = 	FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal +
+								FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail +
+								FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail;
+
+	if(pHalData->CurrentBandType92D != BAND_ON_5G)
+	{
+		//hold cck counter
+		//AcquireCCKAndRWPageAControl(Adapter);
+		//PHY_SetBBReg(Adapter, rCCK0_FalseAlarmReport, BIT14, 1);
+
+		ret_value = PHY_QueryBBReg(Adapter, rCCK0_FACounterLower, bMaskByte0);
+		FalseAlmCnt->Cnt_Cck_fail = ret_value;
+
+		ret_value = PHY_QueryBBReg(Adapter, rCCK0_FACounterUpper, bMaskByte3);
+		FalseAlmCnt->Cnt_Cck_fail +=  (ret_value& 0xff)<<8;
+		//ReleaseCCKAndRWPageAControl(Adapter);
+	}
+	else
+	{
+		FalseAlmCnt->Cnt_Cck_fail = 0;
+	}
+
+#if 1	
+	FalseAlmCnt->Cnt_all = (	FalseAlmCnt->Cnt_Fast_Fsync + 
+						FalseAlmCnt->Cnt_SB_Search_fail +
+						FalseAlmCnt->Cnt_Parity_Fail +
+						FalseAlmCnt->Cnt_Rate_Illegal +
+						FalseAlmCnt->Cnt_Crc8_fail +
+						FalseAlmCnt->Cnt_Mcs_fail +
+						FalseAlmCnt->Cnt_Cck_fail);
+	Adapter->recvpriv.FalseAlmCnt_all = FalseAlmCnt->Cnt_all;
+#endif
+#if 0 //Just for debug
+	if(pDM_DigTable->CurIGValue < 0x25)
+		FalseAlmCnt->Cnt_all = 12000;
+	else if(pDM_DigTable->CurIGValue < 0x2A)
+		FalseAlmCnt->Cnt_all = 20;
+	else if(pDM_DigTable->CurIGValue < 0x2D)
+		FalseAlmCnt->Cnt_all = 0;
+#endif
+
+	//reset false alarm counter registers
+	PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0x08000000, 1);
+	PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0x08000000, 0);
+	//update ofdm counter
+	PHY_SetBBReg(Adapter, rOFDM0_LSTF, BIT31, 0); //update page C counter
+	PHY_SetBBReg(Adapter, rOFDM1_LSTF, BIT31, 0); //update page D counter
+	if(pHalData->CurrentBandType92D != BAND_ON_5G)
+	{
+		//reset cck counter
+		//AcquireCCKAndRWPageAControl(Adapter);
+		//RT_TRACE(COMP_INIT,DBG_LOUD,("Acquiere mutex in dm_falsealarmcount 111 \n"));
+		PHY_SetBBReg(Adapter, rCCK0_FalseAlarmReport, 0x0000c000, 0);
+		//enable cck counter
+		PHY_SetBBReg(Adapter, rCCK0_FalseAlarmReport, 0x0000c000, 2);
+		//ReleaseCCKAndRWPageAControl(Adapter);
+		//RT_TRACE(COMP_INIT,DBG_LOUD,("Release mutex in dm_falsealarmcount 111 \n"));
+	}
+
+	//BB Reset
+	if(IS_HARDWARE_TYPE_8192D(Adapter))
+	{
+		if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY)
+		{
+			if((pHalData->CurrentBandType92D == BAND_ON_2_4G) && pHalData->bMasterOfDMSP && (check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE))
+			{
+				BBReset = rtw_read8(Adapter, 0x02);
+				rtw_write8(Adapter, 0x02, BBReset&(~BIT0));
+				rtw_write8(Adapter, 0x02, BBReset|BIT0);
+			}
+		}
+		else
+		{
+			if((pHalData->CurrentBandType92D == BAND_ON_2_4G) && (check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE))
+			{
+				BBReset = rtw_read8(Adapter, 0x02);
+				rtw_write8(Adapter, 0x02, BBReset&(~BIT0));
+				rtw_write8(Adapter, 0x02, BBReset|BIT0);
+			}
+		}
+	}
+	else if(check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE)
+	{
+		BBReset = rtw_read8(Adapter, 0x02);
+		rtw_write8(Adapter, 0x02, BBReset&(~BIT0));
+		rtw_write8(Adapter, 0x02, BBReset|BIT0);
+	}
+}
+
+static VOID
+odm_FindMinimumRSSI_Dmsp(
+	IN	PADAPTER	pAdapter
+)
+{
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	s32	Rssi_val_min_back_for_mac0;
+	BOOLEAN		bGetValueFromBuddyAdapter = dm_DualMacGetParameterFromBuddyAdapter(pAdapter);
+	BOOLEAN		bRestoreRssi = _FALSE;
+	PADAPTER	BuddyAdapter = pAdapter->pbuddy_adapter;
+	struct dm_priv	*Buddydmpriv;
+
+	if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY)
+	{
+		if(BuddyAdapter!= NULL)
+		{
+			Buddydmpriv = &GET_HAL_DATA(BuddyAdapter)->dmpriv;
+			if(pHalData->bSlaveOfDMSP)
+			{
+				//DBG_871X("bSlavecase of dmsp\n");
+				Buddydmpriv->RssiValMinForAnotherMacOfDMSP = pdmpriv->MinUndecoratedPWDBForDM;
+			}
+			else
+			{
+				if(bGetValueFromBuddyAdapter)
+				{
+					//DBG_871X("get new RSSI\n");
+					bRestoreRssi = _TRUE;
+					Rssi_val_min_back_for_mac0 = pdmpriv->MinUndecoratedPWDBForDM;
+					pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->RssiValMinForAnotherMacOfDMSP;
+				}
+			}
+		}
+		
+	}
+
+	if(bRestoreRssi)
+	{
+		bRestoreRssi = _FALSE;
+		pdmpriv->MinUndecoratedPWDBForDM = Rssi_val_min_back_for_mac0;
+	}
+#endif
+}
+
+static void
+odm_FindMinimumRSSI_92D(
+IN	PADAPTER	pAdapter
+	)
+{	
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	struct mlme_priv	*pmlmepriv = &pAdapter->mlmepriv;
+
+	//1 1.Determine the minimum RSSI 
+	if((check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE) &&
+		(pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0))
+	{
+		pdmpriv->MinUndecoratedPWDBForDM = 0;
+		//RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("Not connected to any \n"));
+	}
+	if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)	// Default port
+	{
+		if((check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ||
+			(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) ||
+			(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE))
+		{
+			pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
+			//RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("AP Client PWDB = 0x%x \n", pHalData->MinUndecoratedPWDBForDM));
+		}
+		else
+		{
+			pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->UndecoratedSmoothedPWDB;
+			//RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", pHalData->MinUndecoratedPWDBForDM));
+		}
+	}
+	else // associated entry pwdb
+	{	
+		pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
+		//RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("AP Ext Port or disconnet PWDB = 0x%x \n", pHalData->MinUndecoratedPWDBForDM));
+	}
+
+	odm_FindMinimumRSSI_Dmsp(pAdapter);
+
+	//RT_TRACE(COMP_DIG, DBG_LOUD, ("MinUndecoratedPWDBForDM =%d\n",pHalData->MinUndecoratedPWDBForDM));
+}
+
+static u8
+odm_initial_gain_MinPWDB(
+	IN	PADAPTER	pAdapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	s32	Rssi_val_min = 0;
+#if 0
+	pDIG_T	pDM_DigTable = &pdmpriv->DM_DigTable;
+
+	if(	(pDM_DigTable->CurMultiSTAConnectState == DIG_MultiSTA_CONNECT) &&
+		(pDM_DigTable->CurSTAConnectState == DIG_STA_CONNECT) )
+	{
+		if(pHalData->EntryMinUndecoratedSmoothedPWDB != 0)
+			Rssi_val_min  =  (pdmpriv->EntryMinUndecoratedSmoothedPWDB > pdmpriv->UndecoratedSmoothedPWDB)?
+					pdmpriv->UndecoratedSmoothedPWDB:pdmpriv->EntryMinUndecoratedSmoothedPWDB;		
+		else
+			Rssi_val_min = pdmpriv->UndecoratedSmoothedPWDB;
+	}
+	else if(	pDM_DigTable->CurSTAConnectState == DIG_STA_CONNECT || 
+			pDM_DigTable->CurSTAConnectState == DIG_STA_BEFORE_CONNECT) 
+		Rssi_val_min = pdmpriv->UndecoratedSmoothedPWDB;
+	else if(pDM_DigTable->CurMultiSTAConnectState == DIG_MultiSTA_CONNECT)
+		Rssi_val_min = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
+#endif
+	if(pdmpriv->EntryMinUndecoratedSmoothedPWDB != 0)
+		Rssi_val_min  =  (pdmpriv->EntryMinUndecoratedSmoothedPWDB > pdmpriv->UndecoratedSmoothedPWDB)?
+					pdmpriv->UndecoratedSmoothedPWDB:pdmpriv->EntryMinUndecoratedSmoothedPWDB;
+	else
+		Rssi_val_min = pdmpriv->UndecoratedSmoothedPWDB;
+
+	return (u8)Rssi_val_min;
+}
+
+static VOID
+DM_Write_DIG_DMSP(
+	IN	PADAPTER	pAdapter
+	)
+{
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	pDIG_T		pDM_DigTable = &pdmpriv->DM_DigTable;
+	PADAPTER	BuddyAdapter = pAdapter->pbuddy_adapter;
+	BOOLEAN		bGetValueFromOtherMac = dm_DualMacGetParameterFromBuddyAdapter(pAdapter);
+	struct dm_priv	*Buddydmpriv;
+
+	//DBG_871X(("CurIGValue = 0x%x, PreIGValue = 0x%x\n", pDM_DigTable->CurIGValue, pDM_DigTable->PreIGValue);
+	
+	if(BuddyAdapter == NULL)
+	{	
+		//DBG_871X("DM_Write_DIG_DMSP(): not find buddyAdapter\n");
+		if(pHalData->bMasterOfDMSP)
+		{
+			PHY_SetBBReg(pAdapter, rOFDM0_XAAGCCore1, 0x7f, pDM_DigTable->CurIGValue);
+			PHY_SetBBReg(pAdapter, rOFDM0_XBAGCCore1, 0x7f, pDM_DigTable->CurIGValue);
+			pDM_DigTable->PreIGValue = pDM_DigTable->CurIGValue;
+		}
+		else
+		{
+			pDM_DigTable->PreIGValue = pDM_DigTable->CurIGValue;
+		}
+		return;
+	}
+
+	//DBG_871X("bGetValueFromOtherMac %d \n",bGetValueFromOtherMac);
+	if(bGetValueFromOtherMac)
+	{
+		//DBG_871X("DM_Write_DIG_DMSP(): mac 0 set mac 1 value \n");
+		if(pdmpriv->bWriteDigForAnotherMacOfDMSP)
+		{
+			pdmpriv->bWriteDigForAnotherMacOfDMSP = _FALSE;
+			PHY_SetBBReg(pAdapter, rOFDM0_XAAGCCore1, 0x7f, pdmpriv->CurDigValueForAnotherMacOfDMSP);
+			PHY_SetBBReg(pAdapter, rOFDM0_XBAGCCore1, 0x7f, pdmpriv->CurDigValueForAnotherMacOfDMSP);
+		}
+	}
+
+	Buddydmpriv = &GET_HAL_DATA(BuddyAdapter)->dmpriv;
+
+	if(pDM_DigTable->PreIGValue != pDM_DigTable->CurIGValue)
+	{
+		// Set initial gain.
+		// 20100211 Joseph: Set only BIT0~BIT6 for DIG. BIT7 is the function switch of Antenna diversity.
+		// Just not to modified it for SD3 testing.
+		//PHY_SetBBReg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, pDM_DigTable->CurIGValue);
+		//PHY_SetBBReg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, pDM_DigTable->CurIGValue);
+		 if(pHalData->bSlaveOfDMSP)
+		 {
+		 	//DBG_871X("DM_Write_DIG_DMSP(): slave case \n");
+		 	Buddydmpriv->bWriteDigForAnotherMacOfDMSP = _TRUE;
+			Buddydmpriv->CurDigValueForAnotherMacOfDMSP =  pDM_DigTable->CurIGValue; 
+		 }
+		else
+		{
+			//DBG_871X("DM_Write_DIG_DMSP(): master case \n");
+			if(!bGetValueFromOtherMac)
+			{
+				//DBG_871X("DM_Write_DIG_DMSP(): mac 0 set mac 0 value \n");
+				PHY_SetBBReg(pAdapter, rOFDM0_XAAGCCore1, 0x7f, pDM_DigTable->CurIGValue);
+				PHY_SetBBReg(pAdapter, rOFDM0_XBAGCCore1, 0x7f, pDM_DigTable->CurIGValue);
+			}
+		}
+		pDM_DigTable->PreIGValue = pDM_DigTable->CurIGValue;
+	}
+#endif
+}
+
+static VOID
+DM_Write_DIG(
+	IN	PADAPTER	pAdapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	pDIG_T	pDM_DigTable = &pdmpriv->DM_DigTable;
+
+	//RT_TRACE(	COMP_DIG, DBG_LOUD, ("CurIGValue = 0x%x, PreIGValue = 0x%x, BackoffVal = %d\n", 
+	//			pDM_DigTable->CurIGValue, pDM_DigTable->PreIGValue, pDM_DigTable->BackoffVal));
+	//DBG_871X("CurIGValue = 0x%x, PreIGValue = 0x%x\n", pDM_DigTable->CurIGValue, pDM_DigTable->PreIGValue);
+	
+	if (pDM_DigTable->Dig_Enable_Flag == _FALSE)
+	{
+		//DBG_871X("DIG is disabled\n");
+		//pDM_DigTable->PreIGValue = 0x17;
+		return;
+	}
+	
+	if(pDM_DigTable->PreIGValue != pDM_DigTable->CurIGValue)
+	{
+		// Set initial gain.
+		// 20100211 Joseph: Set only BIT0~BIT6 for DIG. BIT7 is the function switch of Antenna diversity.
+		// Just not to modified it for SD3 testing.
+		//PHY_SetBBReg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, DM_DigTable.CurIGValue);
+		//PHY_SetBBReg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, DM_DigTable.CurIGValue);
+		PHY_SetBBReg(pAdapter, rOFDM0_XAAGCCore1, 0x7f, pDM_DigTable->CurIGValue);
+		PHY_SetBBReg(pAdapter, rOFDM0_XBAGCCore1, 0x7f, pDM_DigTable->CurIGValue);
+		if(pDM_DigTable->CurIGValue != 0x17)
+			pDM_DigTable->PreIGValue = pDM_DigTable->CurIGValue;
+	}
+}
+
+static void odm_DIG(
+	IN	PADAPTER	pAdapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct mlme_priv	*pmlmepriv = &(pAdapter->mlmepriv);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	struct registry_priv	 *pregistrypriv = &pAdapter->registrypriv;
+	PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt);
+	pDIG_T	pDM_DigTable = &pdmpriv->DM_DigTable;
+	static u8	DIG_Dynamic_MIN_0 = 0x25;
+	static u8	DIG_Dynamic_MIN_1 = 0x25;
+	u8	DIG_Dynamic_MIN;
+	static BOOLEAN	bMediaConnect_0 = _FALSE;
+	static BOOLEAN	bMediaConnect_1 = _FALSE;
+	BOOLEAN		FirstConnect;
+	u8	TxRate = rtw_read8(pAdapter, REG_INIDATA_RATE_SEL);
+
+	//RT_TRACE(COMP_DIG, DBG_LOUD, ("odm_DIG() ==>\n"));
+	
+	if(IS_HARDWARE_TYPE_8192D(pAdapter))
+	{
+		if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY)
+		{
+			if(pHalData->bMasterOfDMSP)
+			{
+				DIG_Dynamic_MIN = DIG_Dynamic_MIN_0;
+				FirstConnect = (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) && (bMediaConnect_0 == _FALSE);
+				//DBG_871X("bMediaConnect_0=%d,  pMgntInfo->bMediaConnect=%d\n", bMediaConnect_0, check_fwstate(pmlmepriv, _FW_LINKED));
+			}
+			else
+			{
+				DIG_Dynamic_MIN = DIG_Dynamic_MIN_1;
+				FirstConnect = (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) && (bMediaConnect_1 == _FALSE);
+				//DBG_871X("bMediaConnect_1=%d,  pMgntInfo->bMediaConnect=%d\n", bMediaConnect_1, check_fwstate(pmlmepriv, _FW_LINKED));
+			}
+			//DBG_871X("pHalData->CurrentBandType92D = %s\n",(pHalData->CurrentBandType92D==BAND_ON_2_4G)?"2.4G":"5G");
+		}
+		else
+		{
+			if(pHalData->CurrentBandType92D==BAND_ON_5G)
+			{
+				DIG_Dynamic_MIN = DIG_Dynamic_MIN_0;
+				FirstConnect = (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) && (bMediaConnect_0 == _FALSE);
+				//DBG_871X("bMediaConnect_5G=%d,  pMgntInfo->bMediaConnect=%d\n", bMediaConnect_0, check_fwstate(pmlmepriv, _FW_LINKED));
+			}
+			else
+			{
+				DIG_Dynamic_MIN = DIG_Dynamic_MIN_1;
+				FirstConnect = (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) && (bMediaConnect_1 == _FALSE);
+				//DBG_871X("bMediaConnect_2.4G=%d,  pMgntInfo->bMediaConnect=%d\n", bMediaConnect_1, check_fwstate(pmlmepriv, _FW_LINKED));
+			}
+		}
+	}
+	else
+	{	
+		DIG_Dynamic_MIN = DIG_Dynamic_MIN_0;
+		FirstConnect = (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) && (bMediaConnect_0 == _FALSE);
+		//DBG_871X("bMediaConnect=%d,  pMgntInfo->bMediaConnect=%d\n", bMediaConnect_0, check_fwstate(pmlmepriv, _FW_LINKED));
+	}
+
+	//DBG_871X("Cnt_Parity_Fail = %d, Cnt_Rate_Illegal = %d, Cnt_Crc8_fail = %d, Cnt_Mcs_fail = %d\n", 
+	//			FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal, FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail);
+	//DBG_871X("Cnt_Fast_Fsync = %d, Cnt_SB_Search_fail = %d\n", 
+	//			FalseAlmCnt->Cnt_Fast_Fsync, FalseAlmCnt->Cnt_SB_Search_fail);
+	//DBG_871X("Cnt_Ofdm_fail = %d, Cnt_Cck_fail = %d, Cnt_all = %d\n", 
+	//			FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_Cck_fail, FalseAlmCnt->Cnt_all);
+	//DBG_871X("RSSI_A=%d, RSSI_B=%d, RSSI_Ave=%d, RSSI_CCK=%d\n",
+	//	pAdapter->RxStats.RxRSSIPercentage[0], pAdapter->RxStats.RxRSSIPercentage[1], pdmpriv->UndecoratedSmoothedPWDB,pdmpriv->UndecoratedSmoothedCCK);
+	//DBG_871X("RX Rate =  0x%x, TX Rate = 0x%x \n", pHalData->RxRate, TxRate);
+
+	
+	if(pdmpriv->bDMInitialGainEnable == _FALSE)
+		return;
+	
+	//if (pDM_DigTable->Dig_Enable_Flag == FALSE)
+		//return;
+	if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_DIG))
+		return;
+	if (pAdapter->mlmeextpriv.sitesurvey_res.state == SCAN_PROCESS)
+		return;
+
+	//RTPRINT(FDM, DM_Monitor, ("odm_DIG() progress \n"));
+
+	//odm_CtrlInitGainByTwoPort(pAdapter);
+	//RTPRINT(FDM, DM_Monitor, ("odm_DIG() <==\n"));
+	
+	//1 Boundary Decision
+	if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
+	{
+		//2 Get minimum RSSI value among associated devices
+		pDM_DigTable->Rssi_val_min = odm_initial_gain_MinPWDB(pAdapter);
+		//DBG_871X("pDM_DigTable->Rssi_val_min = 0x%x\n", pDM_DigTable->Rssi_val_min);
+
+		//2 Modify DIG upper bound
+		if((pDM_DigTable->Rssi_val_min + 20) > DM_DIG_MAX )
+			pDM_DigTable->rx_gain_range_max = DM_DIG_MAX;
+		else
+			pDM_DigTable->rx_gain_range_max = pDM_DigTable->Rssi_val_min + 20;
+		//2 Modify DIG lower bound
+		if((FalseAlmCnt->Cnt_all > 500)&&(DIG_Dynamic_MIN < 0x25))
+			DIG_Dynamic_MIN++;
+		if((FalseAlmCnt->Cnt_all < 500)&&(DIG_Dynamic_MIN > DM_DIG_MIN))
+			DIG_Dynamic_MIN--;
+		if((pDM_DigTable->Rssi_val_min < 8) && (DIG_Dynamic_MIN > DM_DIG_MIN))
+			DIG_Dynamic_MIN--;
+	}
+	else
+	{
+		pDM_DigTable->rx_gain_range_max = DM_DIG_MAX;
+		DIG_Dynamic_MIN = DM_DIG_MIN;
+	}
+	
+	//1 Modify DIG lower bound, deal with abnorally large false alarm
+	if(FalseAlmCnt->Cnt_all > 10000)
+	{
+		//DBG_871X("dm_DIG(): Abnornally false alarm case. \n");
+
+		pDM_DigTable->LargeFAHit++;
+		if(pDM_DigTable->ForbiddenIGI < pDM_DigTable->CurIGValue)
+		{
+			pDM_DigTable->ForbiddenIGI = pDM_DigTable->CurIGValue;
+			pDM_DigTable->LargeFAHit = 1;
+		}
+
+		if(pDM_DigTable->LargeFAHit >= 3)
+		{
+			if((pDM_DigTable->ForbiddenIGI+1) >pDM_DigTable->rx_gain_range_max)
+				pDM_DigTable->rx_gain_range_min = pDM_DigTable->rx_gain_range_max;
+			else
+				pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1);
+			pDM_DigTable->Recover_cnt = 3600; //3600=2hr
+		}
+
+	}
+	else
+	{
+		//Recovery mechanism for IGI lower bound
+		if(pDM_DigTable->Recover_cnt != 0)
+			pDM_DigTable->Recover_cnt --;
+		else
+		{
+			if(pDM_DigTable->LargeFAHit == 0 )
+			{
+				if((pDM_DigTable->ForbiddenIGI -1) < DIG_Dynamic_MIN) //DM_DIG_MIN)
+				{
+					pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN; //DM_DIG_MIN;
+					pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN; //DM_DIG_MIN;
+				}
+				else
+				{
+					pDM_DigTable->ForbiddenIGI --;
+					pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1);
+				}
+			}
+			else if(pDM_DigTable->LargeFAHit == 3 )
+			{
+				pDM_DigTable->LargeFAHit = 0;
+			}
+		}
+	}
+	
+	//DBG_871X("DM_DigTable.ForbiddenIGI = 0x%x, DM_DigTable.LargeFAHit = 0x%x\n",
+	//	pDM_DigTable->ForbiddenIGI, pDM_DigTable->LargeFAHit);
+	//DBG_871X("DM_DigTable.rx_gain_range_max = 0x%x, DM_DigTable.rx_gain_range_min = 0x%x\n",
+	//	pDM_DigTable->rx_gain_range_max, pDM_DigTable->rx_gain_range_min);
+
+	//1 Adjust initial gain by false alarm
+	if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
+	{
+		if(FirstConnect)
+		{
+			pDM_DigTable->CurIGValue = pDM_DigTable->Rssi_val_min;
+			//DBG_871X("DIG: First Connect\n");
+		}
+		else
+		{
+			if(IS_HARDWARE_TYPE_8192D(pAdapter))
+			{
+				if(FalseAlmCnt->Cnt_all > DM_DIG_FA_TH2_92D)
+					pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2;
+				else if (FalseAlmCnt->Cnt_all > DM_DIG_FA_TH1_92D)
+					pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1;
+				else if(FalseAlmCnt->Cnt_all < DM_DIG_FA_TH0_92D)
+					pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1;	
+			}
+			else
+			{
+				if(FalseAlmCnt->Cnt_all > DM_DIG_FA_TH2)
+					pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2;
+				else if (FalseAlmCnt->Cnt_all > DM_DIG_FA_TH1)
+					pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1;
+				else if(FalseAlmCnt->Cnt_all < DM_DIG_FA_TH0)
+					pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1;	
+			}
+		}
+	}	
+	else
+	{
+		pDM_DigTable->CurIGValue = pDM_DigTable->rx_gain_range_min;
+	}
+	//1 Check initial gain by upper/lower bound
+	if(pDM_DigTable->CurIGValue > pDM_DigTable->rx_gain_range_max)
+		pDM_DigTable->CurIGValue = pDM_DigTable->rx_gain_range_max;
+	if(pDM_DigTable->CurIGValue < pDM_DigTable->rx_gain_range_min)
+		pDM_DigTable->CurIGValue = pDM_DigTable->rx_gain_range_min;
+
+
+	if(IS_HARDWARE_TYPE_8192D(pAdapter))
+	{
+		//sherry  delete DualMacSmartConncurrent 20110517
+		if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY)
+		{
+			DM_Write_DIG_DMSP(pAdapter);
+			if(pHalData->bMasterOfDMSP)
+			{
+				bMediaConnect_0 = check_fwstate(pmlmepriv, _FW_LINKED);
+				DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN;
+			}
+			else
+			{
+				bMediaConnect_1 = check_fwstate(pmlmepriv, _FW_LINKED);
+				DIG_Dynamic_MIN_1 = DIG_Dynamic_MIN;
+			}
+		}
+		else
+		{
+			DM_Write_DIG(pAdapter);
+			if(pHalData->CurrentBandType92D==BAND_ON_5G)
+			{
+				bMediaConnect_0 = check_fwstate(pmlmepriv, _FW_LINKED);
+				DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN;
+			}
+			else
+			{
+				bMediaConnect_1 = check_fwstate(pmlmepriv, _FW_LINKED);
+				DIG_Dynamic_MIN_1 = DIG_Dynamic_MIN;
+			}
+		}
+	}
+	else
+	{
+		DM_Write_DIG(pAdapter);
+		bMediaConnect_0 = check_fwstate(pmlmepriv, _FW_LINKED);
+		DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN;
+	}
+
+	if((pregistrypriv->lowrate_two_xmit) && IS_HARDWARE_TYPE_8192D(pAdapter) &&
+		(pHalData->MacPhyMode92D != DUALMAC_DUALPHY) )	
+	{
+		//for Use 2 path Tx to transmit MCS0~7 and legacy mode
+		if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
+		{
+			if(pDM_DigTable->Rssi_val_min  <= 30)   //low rate 2T2R settings
+			{
+				//Reg90C=0x83321333 (OFDM 2T)
+  				//RegA07=0xc1            (CCK 2T2R)
+ 				//RegA11=0x9b            (no switch polarity of two antenna)
+ 				//RegA20=0x10            (extend CS ratio as X1.125)
+  				//RegA2E=0xdf             (MRC on)
+  				//RegA2F=0x10            (CDD 90ns for path-B)
+  				//RegA75=0x01            (antenna selection enable)
+  				
+				rtw_write32(pAdapter, 0x90C, 0x83321333);
+				rtw_write8(pAdapter, 0xA07, 0xc1);
+				rtw_write8(pAdapter, 0xA11, 0x9b);
+				rtw_write8(pAdapter, 0xA20, 0x10);
+				rtw_write8(pAdapter, 0xA2E, 0xdf);
+				rtw_write8(pAdapter, 0xA2F, 0x10);
+				rtw_write8(pAdapter, 0xA75, 0x01);				
+  				
+			}
+			else if(pDM_DigTable->Rssi_val_min  >= 35)  //low rate 1T1R Settings
+			{
+  				//Reg90C=0x81121313 
+  				//RegA07=0x80                   
+  				//RegA11=0xbb            
+  				//RegA20=0x00            
+  				//RegA2E=0xd3   
+  				//RegA2F=0x00          
+  				//RegA75=0x00
+  				
+  				rtw_write32(pAdapter, 0x90C, 0x81121313);
+				rtw_write8(pAdapter, 0xA07, 0x80);
+				rtw_write8(pAdapter, 0xA11, 0xbb);
+				rtw_write8(pAdapter, 0xA20, 0x00);
+				rtw_write8(pAdapter, 0xA2E, 0xd3);
+				rtw_write8(pAdapter, 0xA2F, 0x00);
+				rtw_write8(pAdapter, 0xA75, 0x00);
+			}
+			
+		}
+		
+	}	
+	
+
+	//RT_TRACE(COMP_DIG, DBG_LOUD, ("odm_DIG() <==\n"));
+	
+}
+
+static u8
+dm_initial_gain_MinPWDB(
+	IN	PADAPTER	pAdapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	s32	Rssi_val_min = 0;
+	pDIG_T		pDM_DigTable = &pdmpriv->DM_DigTable;
+
+	
+	if(	(pDM_DigTable->CurMultiSTAConnectState == DIG_MultiSTA_CONNECT) &&
+		(pDM_DigTable->CurSTAConnectState == DIG_STA_CONNECT) )
+	{
+		if(pdmpriv->EntryMinUndecoratedSmoothedPWDB != 0)
+			Rssi_val_min  =  (pdmpriv->EntryMinUndecoratedSmoothedPWDB > pdmpriv->UndecoratedSmoothedPWDB)?
+					pdmpriv->UndecoratedSmoothedPWDB:pdmpriv->EntryMinUndecoratedSmoothedPWDB;		
+		else
+			Rssi_val_min = pdmpriv->UndecoratedSmoothedPWDB;
+	}
+	else if(	pDM_DigTable->CurSTAConnectState == DIG_STA_CONNECT || 
+			pDM_DigTable->CurSTAConnectState == DIG_STA_BEFORE_CONNECT) 
+		Rssi_val_min = pdmpriv->UndecoratedSmoothedPWDB;
+	else if(pDM_DigTable->CurMultiSTAConnectState == DIG_MultiSTA_CONNECT)
+		Rssi_val_min = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
+
+	return (u8)Rssi_val_min;
+}
+
+static void dm_CCK_PacketDetectionThresh_DMSP(
+	IN	PADAPTER	pAdapter)
+{
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	pDIG_T		pDM_DigTable = &pdmpriv->DM_DigTable;
+	PADAPTER	BuddyAdapter = pAdapter->pbuddy_adapter;
+	BOOLEAN		bGetValueFromBuddyAdapter = dm_DualMacGetParameterFromBuddyAdapter(pAdapter);
+	struct dm_priv	*Buddydmpriv;
+
+
+	//if (pAdapter->DualMacSmartConcurrent == _FALSE)
+	//	return;
+
+	if(pDM_DigTable->CurSTAConnectState == DIG_STA_CONNECT)
+	{
+		pDM_DigTable->Rssi_val_min = dm_initial_gain_MinPWDB(pAdapter);
+		if(pDM_DigTable->PreCCKPDState == CCK_PD_STAGE_LowRssi)
+		{
+			if(pDM_DigTable->Rssi_val_min <= 25)
+				pDM_DigTable->CurCCKPDState = CCK_PD_STAGE_LowRssi;
+			else
+				pDM_DigTable->CurCCKPDState = CCK_PD_STAGE_HighRssi;
+		}
+		else{
+			if(pDM_DigTable->Rssi_val_min <= 20)
+				pDM_DigTable->CurCCKPDState = CCK_PD_STAGE_LowRssi;
+			else
+				pDM_DigTable->CurCCKPDState = CCK_PD_STAGE_HighRssi;
+		}
+	}
+	else
+		pDM_DigTable->CurCCKPDState=CCK_PD_STAGE_MAX;
+
+	if(bGetValueFromBuddyAdapter)
+	{
+		DBG_871X("dm_CCK_PacketDetectionThresh_DMSP(): mac 1 connect,mac 0 disconnect case  \n");
+		if(pdmpriv->bChangeCCKPDStateForAnotherMacOfDMSP)
+		{
+			DBG_871X("dm_CCK_PacketDetectionThresh_DMSP(): mac 0 set for mac1 \n");
+			if(pdmpriv->CurCCKPDStateForAnotherMacOfDMSP == CCK_PD_STAGE_LowRssi)
+			{
+				//AcquireCCKAndRWPageAControl(pAdapter);
+				//RT_TRACE(COMP_INIT,DBG_LOUD,("Acquiere mutex in dm_cck_packetdetection \n"));
+				PHY_SetBBReg(pAdapter, rCCK0_CCA, bMaskByte2, 0x83);
+				//RT_TRACE(COMP_INIT,DBG_LOUD,("Release mutex in dm_cck_packetdetection \n"));
+				//ReleaseCCKAndRWPageAControl(pAdapter);
+				//PHY_SetBBReg(pAdapter, rCCK0_System, bMaskByte1, 0x40);
+				//if(IS_92C_SERIAL(pHalData->VersionID) || IS_92D_SINGLEPHY(pHalData->VersionID))
+					//PHY_SetBBReg(pAdapter, rCCK0_FalseAlarmReport , bMaskByte2, 0xd7);
+			}
+			else
+			{
+				//AcquireCCKAndRWPageAControl(pAdapter);
+				//RT_TRACE(COMP_INIT,DBG_LOUD,("Acquiere mutex in dm_cck_packetdetection \n"));
+				PHY_SetBBReg(pAdapter, rCCK0_CCA, bMaskByte2, 0xcd);
+				//ReleaseCCKAndRWPageAControl(pAdapter);
+				//RT_TRACE(COMP_INIT,DBG_LOUD,("Release mutex in dm_cck_packetdetection \n"));
+
+				//PHY_SetBBReg(pAdapter,rCCK0_System, bMaskByte1, 0x47);
+				//if(IS_92C_SERIAL(pHalData->VersionID) || IS_92D_SINGLEPHY(pHalData->VersionID))
+					//PHY_SetBBReg(pAdapter, rCCK0_FalseAlarmReport , bMaskByte2, 0xd3);
+			}
+			pdmpriv->bChangeCCKPDStateForAnotherMacOfDMSP = _FALSE;
+		}
+	}
+	
+	if(pDM_DigTable->PreCCKPDState != pDM_DigTable->CurCCKPDState)
+	{
+		if(BuddyAdapter == NULL)
+		{
+			DBG_871X("dm_CCK_PacketDetectionThresh_DMSP(): BuddyAdapter == NULL case \n");
+			if(pHalData->bSlaveOfDMSP)
+			{
+				pDM_DigTable->PreCCKPDState = pDM_DigTable->CurCCKPDState;
+			}
+			else
+			{	
+				if(pDM_DigTable->CurCCKPDState == CCK_PD_STAGE_LowRssi)
+				{
+					//AcquireCCKAndRWPageAControl(pAdapter);
+					//RT_TRACE(COMP_INIT,DBG_LOUD,("Acquiere mutex in dm_cck_packetdetection \n"));
+					PHY_SetBBReg(pAdapter, rCCK0_CCA, bMaskByte2, 0x83);
+					//RT_TRACE(COMP_INIT,DBG_LOUD,("Release mutex in dm_cck_packetdetection \n"));
+					//ReleaseCCKAndRWPageAControl(pAdapter);
+					//PHY_SetBBReg(pAdapter, rCCK0_System, bMaskByte1, 0x40);
+					//if(IS_92C_SERIAL(pHalData->VersionID) || IS_92D_SINGLEPHY(pHalData->VersionID))
+						//PHY_SetBBReg(pAdapter, rCCK0_FalseAlarmReport , bMaskByte2, 0xd7);
+				}
+				else
+				{
+					//AcquireCCKAndRWPageAControl(pAdapter);
+					//RT_TRACE(COMP_INIT,DBG_LOUD,("Acquiere mutex in dm_cck_packetdetection \n"));
+					PHY_SetBBReg(pAdapter, rCCK0_CCA, bMaskByte2, 0xcd);
+					///ReleaseCCKAndRWPageAControl(pAdapter);
+					//RT_TRACE(COMP_INIT,DBG_LOUD,("Release mutex in dm_cck_packetdetection \n"));
+
+					//PHY_SetBBReg(pAdapter,rCCK0_System, bMaskByte1, 0x47);
+					//if(IS_92C_SERIAL(pHalData->VersionID) || IS_92D_SINGLEPHY(pHalData->VersionID))
+						//PHY_SetBBReg(pAdapter, rCCK0_FalseAlarmReport , bMaskByte2, 0xd3);
+				}
+				pDM_DigTable->PreCCKPDState = pDM_DigTable->CurCCKPDState;
+			}
+			return;
+		}
+	
+		if(pHalData->bSlaveOfDMSP)
+		{
+			Buddydmpriv = &GET_HAL_DATA(BuddyAdapter)->dmpriv;
+			DBG_871X("dm_CCK_PacketDetectionThresh_DMSP(): bslave case \n");
+			Buddydmpriv->bChangeCCKPDStateForAnotherMacOfDMSP = _TRUE;
+			Buddydmpriv->CurCCKPDStateForAnotherMacOfDMSP = pDM_DigTable->CurCCKPDState;
+		}
+		else
+		{
+			if(!bGetValueFromBuddyAdapter)
+			{
+				DBG_871X("dm_CCK_PacketDetectionThresh_DMSP(): mac 0 set for mac0 \n");
+				if(pDM_DigTable->CurCCKPDState == CCK_PD_STAGE_LowRssi)
+				{
+					//AcquireCCKAndRWPageAControl(pAdapter);
+					//RT_TRACE(COMP_INIT,DBG_LOUD,("Acquiere mutex in dm_cck_packetdetection \n"));
+					PHY_SetBBReg(pAdapter, rCCK0_CCA, bMaskByte2, 0x83);
+					//RT_TRACE(COMP_INIT,DBG_LOUD,("Release mutex in dm_cck_packetdetection \n"));
+					//ReleaseCCKAndRWPageAControl(pAdapter);
+					//PHY_SetBBReg(pAdapter, rCCK0_System, bMaskByte1, 0x40);
+					//if(IS_92C_SERIAL(pHalData->VersionID) || IS_92D_SINGLEPHY(pHalData->VersionID))
+						//PHY_SetBBReg(pAdapter, rCCK0_FalseAlarmReport , bMaskByte2, 0xd7);
+				}
+				else
+				{
+					//AcquireCCKAndRWPageAControl(pAdapter);
+					//RT_TRACE(COMP_INIT,DBG_LOUD,("Acquiere mutex in dm_cck_packetdetection \n"));
+					PHY_SetBBReg(pAdapter, rCCK0_CCA, bMaskByte2, 0xcd);
+					//ReleaseCCKAndRWPageAControl(pAdapter);
+					//RT_TRACE(COMP_INIT,DBG_LOUD,("Release mutex in dm_cck_packetdetection \n"));
+
+					//PHY_SetBBReg(pAdapter,rCCK0_System, bMaskByte1, 0x47);
+					//if(IS_92C_SERIAL(pHalData->VersionID) || IS_92D_SINGLEPHY(pHalData->VersionID))
+						//PHY_SetBBReg(pAdapter, rCCK0_FalseAlarmReport , bMaskByte2, 0xd3);
+				}
+			}
+		}
+		pDM_DigTable->PreCCKPDState = pDM_DigTable->CurCCKPDState;
+	}
+	//DBG_871X("CCKPDStage=%x\n",pDM_DigTable->CurCCKPDState);
+	//DBG_871X("is92C=%x\n",IS_92C_SERIAL(pHalData->VersionID));
+	//DBG_871X("is92d single phy =%x\n",IS_92D_SINGLEPHY(pHalData->VersionID));
+#endif
+}
+
+static void dm_CCK_PacketDetectionThresh(
+	IN	PADAPTER	pAdapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	pDIG_T		pDM_DigTable = &pdmpriv->DM_DigTable;
+
+	if(pDM_DigTable->CurSTAConnectState == DIG_STA_CONNECT)
+	{
+		if(pDM_DigTable->PreCCKPDState == CCK_PD_STAGE_LowRssi)
+		{
+			if(pdmpriv->MinUndecoratedPWDBForDM <= 25)
+				pDM_DigTable->CurCCKPDState = CCK_PD_STAGE_LowRssi;
+			else
+				pDM_DigTable->CurCCKPDState = CCK_PD_STAGE_HighRssi;
+		}
+		else{
+			if(pdmpriv->MinUndecoratedPWDBForDM <= 20)
+				pDM_DigTable->CurCCKPDState = CCK_PD_STAGE_LowRssi;
+			else
+				pDM_DigTable->CurCCKPDState = CCK_PD_STAGE_HighRssi;
+		}
+	}
+	else
+		pDM_DigTable->CurCCKPDState=CCK_PD_STAGE_LowRssi;
+	
+	if(pDM_DigTable->PreCCKPDState != pDM_DigTable->CurCCKPDState)
+	{
+		if(pDM_DigTable->CurCCKPDState == CCK_PD_STAGE_LowRssi)
+		{
+			//AcquireCCKAndRWPageAControl(pAdapter);
+			//RT_TRACE(COMP_INIT,DBG_LOUD,("Acquiere mutex in dm_cck_packetdetection \n"));
+			PHY_SetBBReg(pAdapter, rCCK0_CCA, bMaskByte2, 0x83);
+			//RT_TRACE(COMP_INIT,DBG_LOUD,("Release mutex in dm_cck_packetdetection \n"));
+			//ReleaseCCKAndRWPageAControl(pAdapter);
+			//PHY_SetBBReg(pAdapter, rCCK0_System, bMaskByte1, 0x40);
+			//if(IS_92C_SERIAL(pHalData->VersionID) || IS_92D_SINGLEPHY(pHalData->VersionID))
+				//PHY_SetBBReg(pAdapter, rCCK0_FalseAlarmReport , bMaskByte2, 0xd7);
+		}
+		else
+		{
+			//AcquireCCKAndRWPageAControl(pAdapter);
+			//RT_TRACE(COMP_INIT,DBG_LOUD,("Acquiere mutex in dm_cck_packetdetection \n"));
+			PHY_SetBBReg(pAdapter, rCCK0_CCA, bMaskByte2, 0xcd);
+			//ReleaseCCKAndRWPageAControl(pAdapter);
+			//RT_TRACE(COMP_INIT,DBG_LOUD,("Release mutex in dm_cck_packetdetection \n"));
+
+			//PHY_SetBBReg(pAdapter,rCCK0_System, bMaskByte1, 0x47);
+			//if(IS_92C_SERIAL(pHalData->VersionID) || IS_92D_SINGLEPHY(pHalData->VersionID))
+				//PHY_SetBBReg(pAdapter, rCCK0_FalseAlarmReport , bMaskByte2, 0xd3);
+		}
+		pDM_DigTable->PreCCKPDState = pDM_DigTable->CurCCKPDState;	
+	}
+	
+	//RT_TRACE(	COMP_DIG, DBG_LOUD, ("CurSTAConnectState=%s\n",(pDigTable->CurSTAConnectState == DIG_STA_CONNECT?"DIG_STA_CONNECT ":"DIG_STA_DISCONNECT")));
+	//RT_TRACE(	COMP_DIG, DBG_LOUD, ("CCKPDStage=%s\n",(pDigTable->CurCCKPDState==CCK_PD_STAGE_LowRssi?"Low RSSI ":"High RSSI ")));
+	//RT_TRACE(	COMP_DIG, DBG_LOUD, ("is92d single phy =%x\n",IS_92D_SINGLEPHY(pHalData->VersionID)));
+}
+
+static void dm_1R_CCA(
+	IN	PADAPTER	pAdapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	pPS_T pDM_PSTable = &pdmpriv->DM_PSTable;
+
+#ifdef CONFIG_USB_HCI // Add by Gary for 92DU 1RCCA 5G->Enable, 2G->Disable 20110624
+      if(pHalData->CurrentBandType92D == BAND_ON_5G)
+      {
+#endif
+              //RT_TRACE(COMP_BB_POWERSAVING,DBG_LOUD,("=Gary=: 92D 5G 1RCCA on\n"));
+		if(pdmpriv->MinUndecoratedPWDBForDM != 0)
+		{
+			if(pDM_PSTable->PreCCAState == CCA_2R || pDM_PSTable->PreCCAState == CCA_MAX)
+			{
+				if(pdmpriv->MinUndecoratedPWDBForDM >= 35)
+					pDM_PSTable->CurCCAState = CCA_1R;
+				else
+					pDM_PSTable->CurCCAState = CCA_2R;
+				
+			}
+			else{
+				if(pdmpriv->MinUndecoratedPWDBForDM <= 30)
+					pDM_PSTable->CurCCAState = CCA_2R;
+				else
+					pDM_PSTable->CurCCAState = CCA_1R;
+			}
+		}
+		else	//disconnect
+		{
+			pDM_PSTable->CurCCAState=CCA_MAX;
+		}
+		
+		if(pDM_PSTable->PreCCAState != pDM_PSTable->CurCCAState)
+		{
+			if(pDM_PSTable->CurCCAState == CCA_1R)
+			{
+				if(pHalData->rf_type == RF_2T2R)
+				{
+					PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable  , bMaskByte0, 0x13);
+					//PHY_SetBBReg(pAdapter, 0xe70, bMaskByte3, 0x20);
+				}
+				else
+				{
+					PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable  , bMaskByte0, 0x23);
+					//PHY_SetBBReg(pAdapter, 0xe70, 0x7fc00000, 0x10c); // Set RegE70[30:22] = 9b'100001100
+				}
+			}
+			else if (pDM_PSTable->CurCCAState == CCA_2R || pDM_PSTable->CurCCAState == CCA_MAX)		
+			{
+				PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable  , bMaskByte0, 0x33);
+				//PHY_SetBBReg(pAdapter,0xe70, bMaskByte3, 0x63);
+			}
+			pDM_PSTable->PreCCAState = pDM_PSTable->CurCCAState;
+		}
+		//RT_TRACE(	COMP_BB_POWERSAVING|COMP_INIT, DBG_LOUD, ("CCAStage = %d\n",pDM_PSTable->CurCCAState));
+#ifdef CONFIG_USB_HCI
+	}  
+	//else  // pHalData->CurrentBandType92D == BAND_ON_2_4G  92DU 2.4G 1RCCA Disable
+	//	RT_TRACE(COMP_BB_POWERSAVING,DBG_LOUD,("=Gary=: 92D 2G 1RCCA off\n"));
+#endif
+}
+
+static void dm_InitDynamicTxPower(IN	PADAPTER	Adapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+	//pdmpriv->bDynamicTxPowerEnable = _TRUE;
+	pdmpriv->bDynamicTxPowerEnable = _FALSE;
+
+	pdmpriv->LastDTPLvl = TxHighPwrLevel_Normal;
+	pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
+}
+
+static void odm_DynamicTxPower_92D(IN	PADAPTER	Adapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct mlme_priv	*pmlmepriv = &(Adapter->mlmepriv);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	int	UndecoratedSmoothedPWDB;
+
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	PADAPTER	BuddyAdapter = Adapter->pbuddy_adapter;
+	struct dm_priv	*pbuddy_dmpriv = NULL;
+	BOOLEAN		bGetValueFromBuddyAdapter = dm_DualMacGetParameterFromBuddyAdapter(Adapter);
+	u8		HighPowerLvlBackForMac0 = TxHighPwrLevel_Level1;
+#endif
+
+	// If dynamic high power is disabled.
+	if( (pdmpriv->bDynamicTxPowerEnable != _TRUE) ||
+		(!(pdmpriv->DMFlag & DYNAMIC_FUNC_HP)) )
+	{
+		pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
+		return;
+	}
+
+	// STA not connected and AP not connected
+	if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) &&	
+		(pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0))
+	{
+		//RT_TRACE(COMP_HIPWR, DBG_LOUD, ("Not connected to any \n"));
+		pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
+
+		//the LastDTPlvl should reset when disconnect, 
+		//otherwise the tx power level wouldn't change when disconnect and connect again.
+		// Maddest 20091220.
+		pdmpriv->LastDTPLvl=TxHighPwrLevel_Normal;
+		return;
+	}
+	
+	if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)	// Default port
+	{
+		//todo: AP Mode
+		if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) ||
+		       (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE))
+		{
+			UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
+			//RT_TRACE(COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
+		}
+		else
+		{
+			UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB;
+			//RT_TRACE(COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
+		}
+	}
+	else // associated entry pwdb
+	{	
+		UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
+		//RT_TRACE(COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
+	}
+
+	if(pHalData->CurrentBandType92D == BAND_ON_5G){
+		if(UndecoratedSmoothedPWDB >= 0x33)
+		{
+			pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2;
+			//RT_TRACE(COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n"));
+		}
+		else if((UndecoratedSmoothedPWDB <0x33) &&
+			(UndecoratedSmoothedPWDB >= 0x2b) )
+		{
+			pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1;
+			//RT_TRACE(COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n"));
+		}
+		else if(UndecoratedSmoothedPWDB < 0x2b)
+		{
+			pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
+			//RT_TRACE(COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Normal\n"));
+		}
+	}
+	else
+	{
+		if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2)
+		{
+			pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2;
+			//RT_TRACE(COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n"));
+		}
+		else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) &&
+			(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) )
+		{
+			pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1;
+			//RT_TRACE(COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n"));
+		}
+		else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5))
+		{
+			pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
+			//RT_TRACE(COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n"));
+		}
+	}
+
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	if(bGetValueFromBuddyAdapter)
+	{
+		DBG_871X("dm_DynamicTxPower() mac 0 for mac 1 \n");
+		if(pdmpriv->bChangeTxHighPowerLvlForAnotherMacOfDMSP)
+		{
+			DBG_871X("dm_DynamicTxPower() change value \n");
+			HighPowerLvlBackForMac0 = pdmpriv->DynamicTxHighPowerLvl;
+			pdmpriv->DynamicTxHighPowerLvl = pdmpriv->CurTxHighLvlForAnotherMacOfDMSP;
+			PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel);
+			pdmpriv->DynamicTxHighPowerLvl = HighPowerLvlBackForMac0;
+			pdmpriv->bChangeTxHighPowerLvlForAnotherMacOfDMSP = _FALSE;
+		}						
+	}
+#endif
+
+	if( (pdmpriv->DynamicTxHighPowerLvl != pdmpriv->LastDTPLvl) )
+	{
+		//RT_TRACE(COMP_HIPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192D() Channel = %d \n" , pHalData->CurrentChannel));
+#ifdef CONFIG_DUALMAC_CONCURRENT
+		if(Adapter->DualMacConcurrent == _TRUE)
+		{
+			if(BuddyAdapter == NULL)
+			{
+				DBG_871X("dm_DynamicTxPower() BuddyAdapter == NULL case \n");
+				if(!pHalData->bSlaveOfDMSP)
+				{
+					PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel);
+				}
+			}
+			else
+			{
+				if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY)
+				{
+					DBG_871X("dm_DynamicTxPower() BuddyAdapter DMSP \n");
+					if(pHalData->bSlaveOfDMSP)
+					{
+						DBG_871X("dm_DynamicTxPower() bslave case  \n");
+						pbuddy_dmpriv = &GET_HAL_DATA(BuddyAdapter)->dmpriv;
+						pbuddy_dmpriv->bChangeTxHighPowerLvlForAnotherMacOfDMSP = _TRUE;
+						pbuddy_dmpriv->CurTxHighLvlForAnotherMacOfDMSP = pdmpriv->DynamicTxHighPowerLvl;
+					}
+					else
+					{
+						DBG_871X("dm_DynamicTxPower() master case  \n");
+						if(!bGetValueFromBuddyAdapter)
+						{
+							DBG_871X("dm_DynamicTxPower() mac 0 for mac 0 \n");
+							PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel);
+						}
+					}
+				}
+				else
+				{
+					DBG_871X("dm_DynamicTxPower() BuddyAdapter DMDP\n");
+					PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel);
+				}
+			}
+		}
+		else
+#endif
+		{
+			PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel);
+		}
+	}
+	pdmpriv->LastDTPLvl = pdmpriv->DynamicTxHighPowerLvl;
+	
+}
+
+
+static VOID PWDB_Monitor(
+	IN	PADAPTER	Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	int	i;
+	int	tmpEntryMaxPWDB=0, tmpEntryMinPWDB=0xff;
+	u8 	sta_cnt=0;
+	u32	PWDB_rssi[NUM_STA]={0};//[0~15]:MACID, [16~31]:PWDB_rssi
+
+
+	if(check_fwstate(&Adapter->mlmepriv, WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE)
+	{
+		_irqL irqL;
+		_list	*plist, *phead;
+		struct sta_info *psta;
+		struct sta_priv *pstapriv = &Adapter->stapriv;
+		u8 bcast_addr[ETH_ALEN]= {0xff,0xff,0xff,0xff,0xff,0xff};
+	
+		_enter_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+
+		for(i=0; i< NUM_STA; i++)
+		{
+			phead = &(pstapriv->sta_hash[i]);
+			plist = get_next(phead);
+		
+			while ((rtw_end_of_queue_search(phead, plist)) == _FALSE)
+			{
+				psta = LIST_CONTAINOR(plist, struct sta_info, hash_list);
+
+				plist = get_next(plist);
+
+				if(_rtw_memcmp(psta	->hwaddr, bcast_addr, ETH_ALEN) || 
+					_rtw_memcmp(psta->hwaddr, myid(&Adapter->eeprompriv), ETH_ALEN))
+					continue;
+
+				if(psta->state & WIFI_ASOC_STATE)
+				{
+					
+					if(psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB)
+						tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
+
+					if(psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB)
+						tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
+
+					PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) | ((Adapter->stapriv.asoc_sta_count+1) << 8));
+				}
+			}
+		}
+	
+		_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+
+		if(pHalData->fw_ractrl == _TRUE)
+		{
+			// Report every sta's RSSI to FW
+			for(i=0; i< sta_cnt; i++)
+			{
+				FillH2CCmd92D(Adapter, H2C_RSSI_REPORT, 3, (u8 *)(&PWDB_rssi[i]));
+			}
+		}
+	}
+
+
+	if(tmpEntryMaxPWDB != 0)	// If associated entry is found
+	{
+		pdmpriv->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB;		
+	}
+	else
+	{
+		pdmpriv->EntryMaxUndecoratedSmoothedPWDB = 0;
+	}
+	
+	if(tmpEntryMinPWDB != 0xff) // If associated entry is found
+	{
+		pdmpriv->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB;		
+	}
+	else
+	{
+		pdmpriv->EntryMinUndecoratedSmoothedPWDB = 0;
+	}
+
+	if(check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE) == _TRUE)
+	{
+		// Indicate Rx signal strength to FW.
+		if(pHalData->fw_ractrl == _TRUE)
+		{
+			u32	temp = 0;
+			//DBG_8192C("RxSS: %lx =%ld\n", pdmpriv->UndecoratedSmoothedPWDB, pdmpriv->UndecoratedSmoothedPWDB);
+			temp = pdmpriv->UndecoratedSmoothedPWDB;
+			temp = temp << 16;
+			//temp = temp | 0x800000;
+
+			// fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1
+			temp = temp | ((Adapter->stapriv.asoc_sta_count+1) << 8);
+
+			FillH2CCmd92D(Adapter, H2C_RSSI_REPORT, 3, (u8 *)(&temp));
+		}
+		else
+		{
+			rtw_write8(Adapter, 0x4fe, (u8)pdmpriv->UndecoratedSmoothedPWDB);
+			//DBG_8192C("0x4fe write %x %d\n", pdmpriv->UndecoratedSmoothedPWDB, pdmpriv->UndecoratedSmoothedPWDB);
+		}
+	}
+}
+
+static void
+DM_InitEdcaTurbo(
+	IN	PADAPTER	Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	pHalData->bCurrentTurboEDCA = _FALSE;
+	Adapter->recvpriv.bIsAnyNonBEPkts = _FALSE;
+}	// DM_InitEdcaTurbo
+
+static void
+dm_CheckEdcaTurbo(
+	IN	PADAPTER	Adapter
+	)
+{
+	u32 	trafficIndex;
+	u32	edca_param;
+	u64	cur_tx_bytes = 0;
+	u64	cur_rx_bytes = 0;
+	u32	EDCA_BE[2] = {0x5ea42b, 0x5ea42b};
+	u8	bbtchange = _FALSE;
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv		*pdmpriv = &pHalData->dmpriv;
+	struct xmit_priv		*pxmitpriv = &(Adapter->xmitpriv);
+	struct recv_priv		*precvpriv = &(Adapter->recvpriv);
+	struct registry_priv	*pregpriv = &Adapter->registrypriv;
+	struct mlme_ext_priv	*pmlmeext = &(Adapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	if(IS_92D_SINGLEPHY(pHalData->VersionID))
+	{
+		EDCA_BE[UP_LINK] = 0x5ea42b;
+		EDCA_BE[DOWN_LINK] = 0x5ea42b;
+	}
+	else
+	{
+		EDCA_BE[UP_LINK] = 0x6ea42b;
+		EDCA_BE[DOWN_LINK] = 0x6ea42b;
+	}
+
+	if ((pregpriv->wifi_spec == 1) || (pmlmeext->cur_wireless_mode == WIRELESS_11B))
+	{
+		goto dm_CheckEdcaTurbo_EXIT;
+	}
+
+	if (pmlmeinfo->assoc_AP_vendor >= maxAP)
+	{
+		goto dm_CheckEdcaTurbo_EXIT;
+	}
+
+	// Check if the status needs to be changed.
+	if((bbtchange) || (!precvpriv->bIsAnyNonBEPkts) )
+	{
+		cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes;
+		cur_rx_bytes = precvpriv->rx_bytes - precvpriv->last_rx_bytes;
+
+		//traffic, TX or RX
+		if((pmlmeinfo->assoc_AP_vendor == ralinkAP)||(pmlmeinfo->assoc_AP_vendor == atherosAP))
+		{
+			if (cur_tx_bytes > (cur_rx_bytes << 2))
+			{ // Uplink TP is present.
+				trafficIndex = UP_LINK; 
+			}
+			else
+			{ // Balance TP is present.
+				trafficIndex = DOWN_LINK;
+			}
+		}
+		else
+		{
+			if (cur_rx_bytes > (cur_tx_bytes << 2))
+			{ // Downlink TP is present.
+				trafficIndex = DOWN_LINK;
+			}
+			else
+			{ // Balance TP is present.
+				trafficIndex = UP_LINK;
+			}
+		}
+
+		if ((pdmpriv->prv_traffic_idx != trafficIndex) || (!pHalData->bCurrentTurboEDCA))
+		{
+			{
+				if((pmlmeinfo->assoc_AP_vendor == ciscoAP) && (pmlmeext->cur_wireless_mode & (WIRELESS_11_24N)))
+				{
+					edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex];
+				}
+				else if((pmlmeinfo->assoc_AP_vendor == airgocapAP) &&
+					((pmlmeext->cur_wireless_mode == WIRELESS_11G) ||(pmlmeext->cur_wireless_mode == WIRELESS_11BG)))
+				{
+					if(trafficIndex == DOWN_LINK)
+						edca_param = 0xa630;
+					else
+						edca_param = EDCA_BE[trafficIndex];
+				}
+				else if( (pmlmeinfo->assoc_AP_vendor == atherosAP) && 
+					(pmlmeext->cur_wireless_mode&WIRELESS_11_5N) )
+				{
+					if(trafficIndex == DOWN_LINK)
+						edca_param = 0xa42b;
+					else
+						edca_param = EDCA_BE[trafficIndex];
+				}
+				else
+				{
+					edca_param = EDCA_BE[trafficIndex];
+				}
+			}
+
+			rtw_write32(Adapter, REG_EDCA_BE_PARAM, edca_param);
+
+			pdmpriv->prv_traffic_idx = trafficIndex;
+		}
+		
+		pHalData->bCurrentTurboEDCA = _TRUE;
+	}
+	else
+	{
+		//
+		// Turn Off EDCA turbo here.
+		// Restore original EDCA according to the declaration of AP.
+		//
+		 if(pHalData->bCurrentTurboEDCA)
+		{
+			rtw_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE);
+			pHalData->bCurrentTurboEDCA = _FALSE;
+		}
+	}
+
+dm_CheckEdcaTurbo_EXIT:
+	// Set variables for next time.
+	precvpriv->bIsAnyNonBEPkts = _FALSE;
+	pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes;
+	precvpriv->last_rx_bytes = precvpriv->rx_bytes;
+
+}	// dm_CheckEdcaTurbo
+
+static void dm_InitDynamicBBPowerSaving(
+	IN	PADAPTER	Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	pPS_T pDM_PSTable = &pdmpriv->DM_PSTable;
+	
+	pDM_PSTable->PreCCAState = CCA_MAX;
+	pDM_PSTable->CurCCAState = CCA_MAX;
+	pDM_PSTable->PreRFState = RF_MAX;
+	pDM_PSTable->CurRFState = RF_MAX;
+}
+
+static void
+dm_DynamicBBPowerSaving(
+IN	PADAPTER	pAdapter
+	)
+{	
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	//struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	//s32			Rssi_val_min_back_for_mac0;
+	//BOOLEAN		bGetValueFromBuddyAdapter = dm_DualMacGetParameterFromBuddyAdapter(pAdapter);
+	//BOOLEAN		bRestoreRssi = _FALSE;
+	//PADAPTER	BuddyAdapter = pAdapter->pbuddy_adapter;
+#endif
+
+	
+	//1 Power Saving for 92C
+	if(IS_92D_SINGLEPHY(pHalData->VersionID))
+	{
+#ifdef CONFIG_DUALMAC_CONCURRENT
+		if(!pHalData->bSlaveOfDMSP)
+#endif
+			dm_1R_CCA(pAdapter);
+	}
+
+#if 0
+	if(bRestoreRssi)
+	{
+		bRestoreRssi = _FALSE;
+		pdmpriv->MinUndecoratedPWDBForDM = Rssi_val_min_back_for_mac0;
+	}
+#endif
+
+// 20100628 Joseph: Turn off BB power save for 88CE because it makesthroughput unstable.
+#if 0
+	//1 3.Power Saving for 88C
+	if(!IS_92C_SERIAL(pHalData->VersionID))
+	{
+		dm_RF_Saving(pAdapter, FALSE);
+	}
+#endif
+}
+
+static 	VOID
+dm_RXGainTrackingCallback_ThermalMeter_92D(
+	IN PADAPTER 	Adapter)
+{
+	u8			index_mapping[Rx_index_mapping_NUM] = {
+						0x0f,	0x0f,	0x0f,	0x0f,	0x0b,
+						0x0a,	0x09,	0x08,	0x07,	0x06,
+						0x05,	0x04,	0x04,	0x03,	0x02
+					};
+
+	u8			eRFPath;
+	u32			u4tmp;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+	u4tmp = (index_mapping[(pHalData->EEPROMThermalMeter - pdmpriv->ThermalValue_RxGain)]) << 12;
+
+	//DBG_8192C("===>dm_RXGainTrackingCallback_ThermalMeter_92D interface %d  Rx Gain %x\n", pHalData->interfaceIndex, u4tmp);
+	
+	for(eRFPath = RF_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++){
+		PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, RF_RXRF_A3, bRFRegOffsetMask, (pdmpriv->RegRF3C[eRFPath]&(~(0xF000)))|u4tmp);
+	}
+
+};	
+
+//091212 chiyokolin
+static	VOID
+dm_TXPowerTrackingCallback_ThermalMeter_92D(
+            IN PADAPTER	Adapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u8		ThermalValue = 0, delta, delta_LCK, delta_IQK, delta_RxGain, index, offset;
+	u8		ThermalValue_AVG_count = 0;
+	u32		ThermalValue_AVG = 0;
+	s32		ele_A, ele_D, TempCCk, X, value32;
+	s32		Y, ele_C;
+	s8		OFDM_index[2], CCK_index=0, OFDM_index_old[2], CCK_index_old=0;
+	int	    	i = 0;
+	BOOLEAN		is2T = IS_92D_SINGLEPHY(pHalData->VersionID);
+	BOOLEAN		bInteralPA = _FALSE;
+	//PMPT_CONTEXT	pMptCtx = &(Adapter->MptCtx);	
+	//u8*			TxPwrLevel = pMptCtx->TxPwrLevel;
+	u8			OFDM_min_index = 6, OFDM_min_index_internalPA = 3, rf; //OFDM BB Swing should be less than +3.0dB, which is required by Arthur
+	u8			Indexforchannel = rtl8192d_GetRightChnlPlaceforIQK(pHalData->CurrentChannel);
+	u8			index_mapping[5][index_mapping_NUM] = {	
+					{0,	1,	3,	6,	8,	9,				//5G, path A/MAC 0, decrease power 
+					11,	13,	14,	16,	17,	18, 18},	
+					{0,	2,	4,	5,	7,	10,				//5G, path A/MAC 0, increase power 
+					12,	14,	16,	18,	18,	18,	18},					
+					{0,	2,	3,	6,	8,	9,				//5G, path B/MAC 1, decrease power
+					11,	13,	14,	16,	17,	18,	18},		
+					{0,	2,	4,	5,	7,	10,				//5G, path B/MAC 1, increase power
+					13,	16,	16,	18,	18,	18,	18},					
+					{0,	1,	2,	3,	4,	5,				//2.4G, for decreas power
+					6,	7,	7,	8,	9,	10,	10},												
+					};
+
+	u8			index_mapping_internalPA[8][index_mapping_NUM] = { 
+					{0, 	1,	2,	4,	6,	7,				//5G, path A/MAC 0, ch36-64, decrease power 
+					9, 	11, 	12, 	14, 	15, 	16, 	16},	
+					{0, 	2,	4,	5,	7,	10, 				//5G, path A/MAC 0, ch36-64, increase power 
+					12, 	14, 	16, 	18, 	18, 	18, 	18},					
+					{0, 	1,	2,	3,	5,	6,				//5G, path A/MAC 0, ch100-165, decrease power 
+					8,	10, 	11, 	13, 	14, 	15, 	15},	
+					{0, 	2,	4,	5,	7,	10, 				//5G, path A/MAC 0, ch100-165, increase power 
+					12, 	14, 	16, 	18, 	18, 	18, 	18},						
+					{0, 	1,	2,	4,	6,	7,				//5G, path B/MAC 1, ch36-64, decrease power
+					9,	11, 	12, 	14, 	15, 	16, 	16},		
+					{0, 	2,	4,	5,	7,	10, 				//5G, path B/MAC 1, ch36-64, increase power
+					13, 	16, 	16, 	18, 	18, 	18, 	18},					
+					{0, 	1,	2,	3,	5,	6,				//5G, path B/MAC 1, ch100-165, decrease power
+					8,	9,	10, 	12, 	13, 	14, 	14},		
+					{0, 	2,	4,	5,	7,	10, 				//5G, path B/MAC 1, ch100-165, increase power
+					13, 	16, 	16, 	18, 	18, 	18, 	18},																						
+				};
+
+//#if MP_DRIVER != 1
+//	return;
+//#endif
+
+	pdmpriv->TXPowerTrackingCallbackCnt++;	//cosa add for debug
+	pdmpriv->bTXPowerTrackingInit = _TRUE;
+
+	if(pHalData->CurrentChannel == 14 && !pdmpriv->bCCKinCH14)
+		pdmpriv->bCCKinCH14 = _TRUE;
+	else if(pHalData->CurrentChannel != 14 && pdmpriv->bCCKinCH14)
+		pdmpriv->bCCKinCH14 = _FALSE;
+
+	//RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("===>dm_TXPowerTrackingCallback_ThermalMeter_92D interface %d txpowercontrol %d\n", pHalData->interfaceIndex, pdmpriv->TxPowerTrackControl));
+
+	ThermalValue = (u8)PHY_QueryRFReg(Adapter, RF_PATH_A, RF_T_METER, 0xf800);	//0x42: RF Reg[15:11] 92D
+
+	//RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Readback Thermal Meter = 0x%lx pre thermal meter 0x%lx EEPROMthermalmeter 0x%lx\n", ThermalValue, pHalData->ThermalValue, pHalData->EEPROMThermalMeter));
+
+	rtl8192d_PHY_APCalibrate(Adapter, (ThermalValue - pHalData->EEPROMThermalMeter));//notes:EEPROMThermalMeter is a fixed value from efuse/eeprom
+
+//	if(!pHalData->TxPowerTrackControl)
+//		return;
+
+	if(is2T)
+		rf = 2;
+	else
+		rf = 1;
+
+	if(ThermalValue)
+	{
+//		if(!pHalData->ThermalValue)
+		{
+			//Query OFDM path A default setting 		
+			ele_D = PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord)&bMaskOFDM_D;
+			for(i=0; i<OFDM_TABLE_SIZE_92D; i++)	//find the index
+			{
+				if(ele_D == (OFDMSwingTable[i]&bMaskOFDM_D))
+				{
+					OFDM_index_old[0] = (u8)i;
+					//RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Initial pathA ele_D reg0x%x = 0x%lx, OFDM_index=0x%x\n", 
+					//	rOFDM0_XATxIQImbalance, ele_D, OFDM_index_old[0]));
+					break;
+				}
+			}
+
+			//Query OFDM path B default setting 
+			if(is2T)
+			{
+				ele_D = PHY_QueryBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord)&bMaskOFDM_D;
+				for(i=0; i<OFDM_TABLE_SIZE_92D; i++)	//find the index
+				{
+					if(ele_D == (OFDMSwingTable[i]&bMaskOFDM_D))
+					{
+						OFDM_index_old[1] = (u8)i;
+						//RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Initial pathB ele_D reg0x%x = 0x%lx, OFDM_index=0x%x\n", 
+						//	rOFDM0_XBTxIQImbalance, ele_D, OFDM_index_old[1]));
+						break;
+					}
+				}
+			}
+
+			if(pHalData->CurrentBandType92D == BAND_ON_2_4G)
+			{
+				//Query CCK default setting From 0xa24
+				TempCCk = pdmpriv->RegA24;
+
+				for(i=0 ; i<CCK_TABLE_SIZE ; i++)
+				{
+					if(pdmpriv->bCCKinCH14)
+					{
+						if(_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch14[i][2], 4)==_TRUE)
+						{
+							CCK_index_old =(u8)i;
+							//RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Initial reg0x%x = 0x%lx, CCK_index=0x%x, ch 14 %d\n", 
+							//	rCCK0_TxFilter2, TempCCk, CCK_index_old, pdmpriv->bCCKinCH14));
+							break;
+						}
+					}
+					else
+					{
+						if(_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch1_Ch13[i][2], 4)==_TRUE)
+						{
+							CCK_index_old =(u8)i;
+							//RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Initial reg0x%x = 0x%lx, CCK_index=0x%x, ch14 %d\n", 
+							//	rCCK0_TxFilter2, TempCCk, CCK_index_old, pdmpriv->bCCKinCH14));
+							break;
+						}			
+					}
+				}
+			}
+			else
+			{
+				TempCCk = 0x090e1317;
+				CCK_index_old = 12;
+			}
+
+			if(!pdmpriv->ThermalValue)
+			{
+				pdmpriv->ThermalValue = pHalData->EEPROMThermalMeter;
+				pdmpriv->ThermalValue_LCK = ThermalValue;
+				pdmpriv->ThermalValue_IQK = ThermalValue;
+				pdmpriv->ThermalValue_RxGain = pHalData->EEPROMThermalMeter;
+
+				for(i = 0; i < rf; i++)
+					pdmpriv->OFDM_index[i] = OFDM_index_old[i];
+				pdmpriv->CCK_index = CCK_index_old;
+			}
+
+			if(pdmpriv->bReloadtxpowerindex)
+			{
+				DBG_871X("reload ofdm index for band switch\n");
+			}
+
+			//calculate average thermal meter
+			{
+				pdmpriv->ThermalValue_AVG[pdmpriv->ThermalValue_AVG_index] = ThermalValue;
+				pdmpriv->ThermalValue_AVG_index++;
+				if(pdmpriv->ThermalValue_AVG_index == AVG_THERMAL_NUM)
+					pdmpriv->ThermalValue_AVG_index = 0;
+
+				for(i = 0; i < AVG_THERMAL_NUM; i++)
+				{
+					if(pdmpriv->ThermalValue_AVG[i])
+					{
+						ThermalValue_AVG += pdmpriv->ThermalValue_AVG[i];
+						ThermalValue_AVG_count++;
+					}
+				}
+
+				if(ThermalValue_AVG_count)
+					ThermalValue = (u8)(ThermalValue_AVG / ThermalValue_AVG_count);
+			}
+		}
+
+		if(pdmpriv->bReloadtxpowerindex)
+		{
+			delta = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue);				
+			pdmpriv->bReloadtxpowerindex = _FALSE;	
+			pdmpriv->bDoneTxpower = _FALSE;
+		}
+		else if(pdmpriv->bDoneTxpower)
+		{
+			delta = (ThermalValue > pdmpriv->ThermalValue)?(ThermalValue - pdmpriv->ThermalValue):(pdmpriv->ThermalValue - ThermalValue);
+		}
+		else
+		{
+			delta = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue);		
+		}
+		delta_LCK = (ThermalValue > pdmpriv->ThermalValue_LCK)?(ThermalValue - pdmpriv->ThermalValue_LCK):(pdmpriv->ThermalValue_LCK - ThermalValue);
+		delta_IQK = (ThermalValue > pdmpriv->ThermalValue_IQK)?(ThermalValue - pdmpriv->ThermalValue_IQK):(pdmpriv->ThermalValue_IQK - ThermalValue);
+		delta_RxGain = (ThermalValue > pdmpriv->ThermalValue_RxGain)?(ThermalValue - pdmpriv->ThermalValue_RxGain):(pdmpriv->ThermalValue_RxGain - ThermalValue);
+
+		//RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("interface %d Readback Thermal Meter = 0x%lx pre thermal meter 0x%lx EEPROMthermalmeter 0x%lx delta 0x%lx delta_LCK 0x%lx delta_IQK 0x%lx delta_RxGain 0x%lx\n",  pHalData->interfaceIndex, ThermalValue, pdmpriv->ThermalValue, pHalData->EEPROMThermalMeter, delta, delta_LCK, delta_IQK, delta_RxGain));
+		//RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("interface %d pre thermal meter LCK 0x%lx pre thermal meter IQK 0x%lx delta_LCK_bound 0x%lx delta_IQK_bound 0x%lx\n",  pHalData->interfaceIndex, pdmpriv->ThermalValue_LCK, pdmpriv->ThermalValue_IQK, pdmpriv->Delta_LCK, pdmpriv->Delta_IQK));
+
+		if((delta_LCK > pdmpriv->Delta_LCK) && (pdmpriv->Delta_LCK != 0))
+		{
+			pdmpriv->ThermalValue_LCK = ThermalValue;
+			rtl8192d_PHY_LCCalibrate(Adapter);
+		}
+		
+		if(delta > 0 && pdmpriv->TxPowerTrackControl)
+		{
+			pdmpriv->bDoneTxpower = _TRUE;
+			delta = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue);
+
+			//calculate new OFDM / CCK offset	
+			{
+				if(pHalData->CurrentBandType92D == BAND_ON_2_4G)
+				{
+					offset = 4;
+				
+					if(delta > index_mapping_NUM-1)					
+						index = index_mapping[offset][index_mapping_NUM-1];
+					else
+						index = index_mapping[offset][delta];
+				
+					if(ThermalValue > pHalData->EEPROMThermalMeter)
+					{ 
+						for(i = 0; i < rf; i++)
+						 	OFDM_index[i] = pdmpriv->OFDM_index[i] -delta;
+						CCK_index = pdmpriv->CCK_index -delta;
+					}
+					else
+					{
+						for(i = 0; i < rf; i++)			
+							OFDM_index[i] = pdmpriv->OFDM_index[i] + index;
+						CCK_index = pdmpriv->CCK_index + index;
+					}
+				}
+				else if(pHalData->CurrentBandType92D == BAND_ON_5G)
+				{
+					for(i = 0; i < rf; i++)
+					{
+						if(pHalData->MacPhyMode92D == DUALMAC_DUALPHY &&
+							pHalData->interfaceIndex == 1)		//MAC 1 5G
+							bInteralPA = pHalData->InternalPA5G[1];
+						else
+							bInteralPA = pHalData->InternalPA5G[i];
+
+						if(bInteralPA)
+						{
+							if(pHalData->interfaceIndex == 1 || i == rf)
+								offset = 4;
+							else
+								offset = 0;
+
+							if(pHalData->CurrentChannel >= 100 && pHalData->CurrentChannel <= 165)
+								offset += 2;													
+						}
+						else
+						{
+							if(pHalData->interfaceIndex == 1 || i == rf)
+								offset = 2;
+							else
+								offset = 0;
+						}
+
+						if(ThermalValue > pHalData->EEPROMThermalMeter)	//set larger Tx power
+							offset++;		
+
+						if(bInteralPA)
+						{
+							if(delta > index_mapping_NUM-1)					
+								index = index_mapping_internalPA[offset][index_mapping_NUM-1];
+							else
+								index = index_mapping_internalPA[offset][delta];						
+						}
+						else
+						{						
+							if(delta > index_mapping_NUM-1)					
+								index = index_mapping[offset][index_mapping_NUM-1];
+							else
+								index = index_mapping[offset][delta];
+						}
+						
+						if(ThermalValue > pHalData->EEPROMThermalMeter)	//set larger Tx power
+						{
+							if(bInteralPA && ThermalValue > 0x12)
+							{
+								OFDM_index[i] = pdmpriv->OFDM_index[i] -((delta/2)*3+(delta%2));
+							}
+							else	
+							{
+								OFDM_index[i] = pdmpriv->OFDM_index[i] -index;
+							}
+						}
+						else
+						{				
+							OFDM_index[i] = pdmpriv->OFDM_index[i] + index;
+						}
+					}
+				}
+				
+				//if(is2T)
+				//{
+					//RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("temp OFDM_A_index=0x%x, OFDM_B_index=0x%x, CCK_index=0x%x\n", 
+					//	pdmpriv->OFDM_index[0], pdmpriv->OFDM_index[1], pdmpriv->CCK_index));			
+				//}
+				//else
+				//{
+					//RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("temp OFDM_A_index=0x%x, CCK_index=0x%x\n", 
+					//	pdmpriv->OFDM_index[0], pdmpriv->CCK_index));			
+				//}
+				
+				for(i = 0; i < rf; i++)
+				{
+					if(OFDM_index[i] > OFDM_TABLE_SIZE_92D-1)
+					{
+						OFDM_index[i] = OFDM_TABLE_SIZE_92D-1;
+					}
+					else if(bInteralPA || pHalData->CurrentBandType92D == BAND_ON_2_4G)
+					{
+						if (OFDM_index[i] < OFDM_min_index_internalPA)
+							OFDM_index[i] = OFDM_min_index_internalPA;
+					}
+					else if (OFDM_index[i] < OFDM_min_index)
+					{
+						OFDM_index[i] = OFDM_min_index;
+					}
+				}
+
+				if(pHalData->CurrentBandType92D == BAND_ON_2_4G)
+				{
+					if(CCK_index > CCK_TABLE_SIZE-1)
+						CCK_index = CCK_TABLE_SIZE-1;
+					else if (CCK_index < 0)
+						CCK_index = 0;
+				}
+
+				//if(is2T)
+				//{
+					//RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("new OFDM_A_index=0x%x, OFDM_B_index=0x%x, CCK_index=0x%x\n", 
+					//	OFDM_index[0], OFDM_index[1], CCK_index));
+				//}
+				//else
+				//{
+					//RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("new OFDM_A_index=0x%x, CCK_index=0x%x\n", 
+					//	OFDM_index[0], CCK_index));	
+				//}
+			}
+
+			//Config by SwingTable
+			if(pdmpriv->TxPowerTrackControl && !pHalData->bNOPG)
+			{
+				pdmpriv->bDoneTxpower = _TRUE;
+			
+				//Adujst OFDM Ant_A according to IQK result
+				ele_D = (OFDMSwingTable[(u8)OFDM_index[0]] & 0xFFC00000)>>22;
+				//X = pdmpriv->RegE94;
+				//Y = pdmpriv->RegE9C;
+				X = pHalData->IQKMatrixRegSetting[Indexforchannel].Value[0][0];
+				Y = pHalData->IQKMatrixRegSetting[Indexforchannel].Value[0][1];
+
+				if(X != 0 && pHalData->CurrentBandType92D == BAND_ON_2_4G)
+				{
+					if ((X & 0x00000200) != 0)
+						X = X | 0xFFFFFC00;
+					ele_A = ((X * ele_D)>>8)&0x000003FF;
+						
+					//new element C = element D x Y
+					if ((Y & 0x00000200) != 0)
+						Y = Y | 0xFFFFFC00;
+					ele_C = ((Y * ele_D)>>8)&0x000003FF;
+					
+					//wirte new elements A, C, D to regC80 and regC94, element B is always 0
+					value32 = (ele_D<<22)|((ele_C&0x3F)<<16)|ele_A;
+					PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, value32);
+
+					value32 = (ele_C&0x000003C0)>>6;
+					PHY_SetBBReg(Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, value32);
+
+					value32 = ((X * ele_D)>>7)&0x01;
+					PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT24, value32);
+					
+				}
+				else
+				{
+					PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable[OFDM_index[0]]);
+					PHY_SetBBReg(Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00);
+					PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT24, 0x00);
+				}
+
+				//RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("TxPwrTracking for interface %d path A: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x 0xe94 = 0x%x 0xe9c = 0x%x\n", Adapter->interfaceIndex, X, Y, ele_A, ele_C, ele_D, X, Y));
+				
+				if(pHalData->CurrentBandType92D == BAND_ON_2_4G)
+				{
+					//Adjust CCK according to IQK result
+					if(!pdmpriv->bCCKinCH14){
+						rtw_write8(Adapter, 0xa22, CCKSwingTable_Ch1_Ch13[CCK_index][0]);
+						rtw_write8(Adapter, 0xa23, CCKSwingTable_Ch1_Ch13[CCK_index][1]);
+						rtw_write8(Adapter, 0xa24, CCKSwingTable_Ch1_Ch13[CCK_index][2]);
+						rtw_write8(Adapter, 0xa25, CCKSwingTable_Ch1_Ch13[CCK_index][3]);
+						rtw_write8(Adapter, 0xa26, CCKSwingTable_Ch1_Ch13[CCK_index][4]);
+						rtw_write8(Adapter, 0xa27, CCKSwingTable_Ch1_Ch13[CCK_index][5]);
+						rtw_write8(Adapter, 0xa28, CCKSwingTable_Ch1_Ch13[CCK_index][6]);
+						rtw_write8(Adapter, 0xa29, CCKSwingTable_Ch1_Ch13[CCK_index][7]);		
+					}
+					else{
+						rtw_write8(Adapter, 0xa22, CCKSwingTable_Ch14[CCK_index][0]);
+						rtw_write8(Adapter, 0xa23, CCKSwingTable_Ch14[CCK_index][1]);
+						rtw_write8(Adapter, 0xa24, CCKSwingTable_Ch14[CCK_index][2]);
+						rtw_write8(Adapter, 0xa25, CCKSwingTable_Ch14[CCK_index][3]);
+						rtw_write8(Adapter, 0xa26, CCKSwingTable_Ch14[CCK_index][4]);
+						rtw_write8(Adapter, 0xa27, CCKSwingTable_Ch14[CCK_index][5]);
+						rtw_write8(Adapter, 0xa28, CCKSwingTable_Ch14[CCK_index][6]);
+						rtw_write8(Adapter, 0xa29, CCKSwingTable_Ch14[CCK_index][7]);	
+					}		
+				}
+				
+				if(is2T)
+				{						
+					ele_D = (OFDMSwingTable[(u8)OFDM_index[1]] & 0xFFC00000)>>22;
+					
+					//new element A = element D x X
+					//X = pdmpriv->RegEB4;
+					//Y = pdmpriv->RegEBC;
+					X = pHalData->IQKMatrixRegSetting[Indexforchannel].Value[0][4];
+					Y = pHalData->IQKMatrixRegSetting[Indexforchannel].Value[0][5];
+
+					if(X != 0 && pHalData->CurrentBandType92D == BAND_ON_2_4G)
+					{
+						if ((X & 0x00000200) != 0)	//consider minus
+							X = X | 0xFFFFFC00;
+						ele_A = ((X * ele_D)>>8)&0x000003FF;
+						
+						//new element C = element D x Y
+						if ((Y & 0x00000200) != 0)
+							Y = Y | 0xFFFFFC00;
+						ele_C = ((Y * ele_D)>>8)&0x00003FF;
+						
+						//wirte new elements A, C, D to regC88 and regC9C, element B is always 0
+						value32=(ele_D<<22)|((ele_C&0x3F)<<16) |ele_A;
+						PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, value32);
+
+						value32 = (ele_C&0x000003C0)>>6;
+						PHY_SetBBReg(Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, value32);	
+						
+						value32 = ((X * ele_D)>>7)&0x01;
+						PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT28, value32);
+
+					}
+					else
+					{
+						PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable[OFDM_index[1]]);
+						PHY_SetBBReg(Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00);
+						PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT28, 0x00);	
+					}
+
+					//RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("TxPwrTracking path B: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x 0xeb4 = 0x%x 0xebc = 0x%x\n", X, Y, ele_A, ele_C, ele_D, X, Y));
+				}
+
+				//RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("TxPwrTracking 0xc80 = 0x%x, 0xc94 = 0x%x RF 0x24 = 0x%x\n", PHY_QueryBBReg(Adapter, 0xc80, bMaskDWord), PHY_QueryBBReg(Adapter, 0xc94, bMaskDWord), PHY_QueryRFReg(Adapter, RF_PATH_A, 0x24, bRFRegOffsetMask)));
+			}
+		}
+
+		if((delta_IQK > pdmpriv->Delta_IQK) && (pdmpriv->Delta_IQK != 0))
+		{
+			rtl8192d_PHY_ResetIQKResult(Adapter);
+			pdmpriv->ThermalValue_IQK = ThermalValue;
+			rtl8192d_PHY_IQCalibrate(Adapter);
+		}
+
+		if(delta_RxGain > 0 && pHalData->CurrentBandType92D == BAND_ON_5G 
+			&& ThermalValue <= pHalData->EEPROMThermalMeter)
+		{
+			pdmpriv->ThermalValue_RxGain = ThermalValue;		
+			dm_RXGainTrackingCallback_ThermalMeter_92D(Adapter);
+		}
+
+		//update thermal meter value
+		if(pdmpriv->TxPowerTrackControl)
+		{
+			pdmpriv->ThermalValue = ThermalValue;
+		}
+	
+	}
+
+	//RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("<===dm_TXPowerTrackingCallback_ThermalMeter_92D\n"));
+	
+	pdmpriv->TXPowercount = 0;
+
+}
+
+
+static	VOID
+dm_InitializeTXPowerTracking_ThermalMeter(
+	IN	PADAPTER		Adapter)
+{	
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+	//if(IS_HARDWARE_TYPE_8192C(pHalData))
+	{
+		pdmpriv->bTXPowerTracking = _TRUE;
+		pdmpriv->TXPowercount = 0;
+		pdmpriv->bTXPowerTrackingInit = _FALSE;
+#if	(MP_DRIVER != 1)		//for mp driver, turn off txpwrtracking as default
+		pdmpriv->TxPowerTrackControl = _TRUE;
+#endif
+	}
+	MSG_8192C("pdmpriv->TxPowerTrackControl = %d\n", pdmpriv->TxPowerTrackControl);
+}
+
+
+static VOID
+DM_InitializeTXPowerTracking(
+	IN	PADAPTER		Adapter)
+{
+	//HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	//if(IS_HARDWARE_TYPE_8192C(pHalData))
+	{
+		dm_InitializeTXPowerTracking_ThermalMeter(Adapter);
+	}
+}	
+
+//
+//	Description:
+//		- Dispatch TxPower Tracking direct call ONLY for 92s.
+//		- We shall NOT schedule Workitem within PASSIVE LEVEL, which will cause system resource
+//		   leakage under some platform.
+//
+//	Assumption:
+//		PASSIVE_LEVEL when this routine is called.
+//
+//	Added by Roger, 2009.06.18.
+//
+static VOID
+DM_TXPowerTracking92CDirectCall(
+            IN	PADAPTER		Adapter)
+{	
+	dm_TXPowerTrackingCallback_ThermalMeter_92D(Adapter);
+}
+
+static VOID
+dm_CheckTXPowerTracking_ThermalMeter(
+	IN	PADAPTER		Adapter)
+{	
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	//u1Byte					TxPowerCheckCnt = 5;	//10 sec
+
+	if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_SS))
+	{
+		return;
+	}
+
+	if(!pdmpriv->bTXPowerTracking /*|| (!pHalData->TxPowerTrackControl && pHalData->bAPKdone)*/)
+	{
+		return;
+	}
+
+	if(!pdmpriv->TM_Trigger)		//at least delay 1 sec
+	{
+		//pHalData->TxPowerCheckCnt++;	//cosa add for debug
+
+		PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER, BIT17 | BIT16, 0x03);
+		//RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Trigger 92C Thermal Meter!!\n"));
+		pdmpriv->TM_Trigger = 1;
+		return;
+	}
+	else
+	{
+		//RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Schedule TxPowerTracking direct call!!\n"));		
+		DM_TXPowerTracking92CDirectCall(Adapter); //Using direct call is instead, added by Roger, 2009.06.18.
+		pdmpriv->TM_Trigger = 0;
+	}
+
+}
+
+
+VOID
+rtl8192d_dm_CheckTXPowerTracking(
+	IN	PADAPTER		Adapter)
+{
+	//RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("dm_CheckTXPowerTracking!!\n"));
+
+#if DISABLE_BB_RF
+	return;
+#endif
+	dm_CheckTXPowerTracking_ThermalMeter(Adapter);
+}
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	dm_CheckRfCtrlGPIO()
+ *
+ * Overview:	Copy 8187B template for 9xseries.
+ *
+ * Input:		NONE
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	01/10/2008	MHC		Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+#ifndef PLATFORM_FREEBSD
+static VOID
+dm_CheckRfCtrlGPIO(
+	IN	PADAPTER	Adapter
+	)
+{
+
+}	/* dm_CheckRfCtrlGPIO */
+#endif //PLATFORM_FREEBSD
+
+/*-----------------------------------------------------------------------------
+ * Function:	dm_CheckPbcGPIO()
+ *
+ * Overview:	Check if PBC button is pressed.
+ *
+ * Input:		NONE
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	03/11/2008	hpfan	Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+static void	dm_CheckPbcGPIO(IN PADAPTER padapter)
+{
+	u8	tmp1byte;
+	u8	bPbcPressed = _FALSE;
+
+	if(!padapter->registrypriv.hw_wps_pbc)
+		return;
+
+#ifdef CONFIG_USB_HCI
+	tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
+	tmp1byte |= (HAL_8192C_HW_GPIO_WPS_BIT);
+	rtw_write8(padapter, GPIO_IO_SEL, tmp1byte);	//enable GPIO[2] as output mode
+
+	tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT);
+	rtw_write8(padapter,  GPIO_IN, tmp1byte);		//reset the floating voltage level
+
+	tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
+	tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT);
+	rtw_write8(padapter, GPIO_IO_SEL, tmp1byte);	//enable GPIO[2] as input mode
+
+	tmp1byte =rtw_read8(padapter, GPIO_IN);
+	
+	if (tmp1byte == 0xff)
+		return ;
+
+	if (tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT)
+	{
+		bPbcPressed = _TRUE;
+	}
+#else
+	tmp1byte = rtw_read8(padapter, GPIO_IN);
+	//RT_TRACE(COMP_IO, DBG_TRACE, ("dm_CheckPbcGPIO - %x\n", tmp1byte));
+
+	if (tmp1byte == 0xff || padapter->init_adpt_in_progress)
+		return ;
+
+	if((tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT)==0)
+	{
+		bPbcPressed = _TRUE;
+	}
+#endif
+
+	if( _TRUE == bPbcPressed)
+	{
+		// Here we only set bPbcPressed to true
+		// After trigger PBC, the variable will be set to false		
+		DBG_8192C("CheckPbcGPIO - PBC is pressed\n");
+                
+#ifdef RTK_DMP_PLATFORM
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12))
+		kobject_uevent(&padapter->pnetdev->dev.kobj, KOBJ_NET_PBC);
+#else
+		kobject_hotplug(&padapter->pnetdev->class_dev.kobj, KOBJ_NET_PBC);
+#endif
+#else
+
+		if ( padapter->pid[0] == 0 )
+		{	//	0 is the default value and it means the application monitors the HW PBC doesn't privde its pid to driver.
+			return;
+		}
+
+#ifdef PLATFORM_LINUX
+		rtw_signal_process(padapter->pid[0], SIGUSR1);
+#endif
+#endif
+	}
+}
+
+static VOID
+dm_InitRateAdaptiveMask(
+	IN	PADAPTER	Adapter	
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	PRATE_ADAPTIVE	pRA = (PRATE_ADAPTIVE)&pdmpriv->RateAdaptive;
+	
+	pRA->RATRState = DM_RATR_STA_INIT;
+	pRA->PreRATRState = DM_RATR_STA_INIT;
+
+	if (pdmpriv->DM_Type == DM_Type_ByDriver)
+		pdmpriv->bUseRAMask = _TRUE;
+	else
+		pdmpriv->bUseRAMask = _FALSE;	
+}
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	dm_RefreshRateAdaptiveMask()
+ *
+ * Overview:	Update rate table mask according to rssi
+ *
+ * Input:		NONE
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	05/27/2009	hpfan	Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+static VOID
+dm_RefreshRateAdaptiveMask(	IN	PADAPTER	pAdapter)
+{
+#if 0
+	PADAPTER 				pTargetAdapter;
+	HAL_DATA_TYPE			*pHalData = GET_HAL_DATA(pAdapter);
+	PMGNT_INFO				pMgntInfo = &(ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, TRUE)->MgntInfo);
+	PRATE_ADAPTIVE			pRA = (PRATE_ADAPTIVE)&pMgntInfo->RateAdaptive;
+	u4Byte					LowRSSIThreshForRA = 0, HighRSSIThreshForRA = 0;
+
+	if(pAdapter->bDriverStopped)
+	{
+		RT_TRACE(COMP_RATR, DBG_TRACE, ("<---- dm_RefreshRateAdaptiveMask(): driver is going to unload\n"));
+		return;
+	}
+
+	if(!pMgntInfo->bUseRAMask)
+	{
+		RT_TRACE(COMP_RATR, DBG_LOUD, ("<---- dm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n"));
+		return;
+	}
+
+	// if default port is connected, update RA table for default port (infrastructure mode only)
+	if(pAdapter->MgntInfo.mAssoc && (!ACTING_AS_AP(pAdapter)))
+	{
+		
+		// decide rastate according to rssi
+		switch (pRA->PreRATRState)
+		{
+			case DM_RATR_STA_HIGH:
+				HighRSSIThreshForRA = 50;
+				LowRSSIThreshForRA = 20;
+				break;
+			
+			case DM_RATR_STA_MIDDLE:
+				HighRSSIThreshForRA = 55;
+				LowRSSIThreshForRA = 20;
+				break;
+			
+			case DM_RATR_STA_LOW:
+				HighRSSIThreshForRA = 50;
+				LowRSSIThreshForRA = 25;
+				break;
+
+			default:
+				HighRSSIThreshForRA = 50;
+				LowRSSIThreshForRA = 20;
+				break;
+		}
+
+		if(pHalData->UndecoratedSmoothedPWDB > (s4Byte)HighRSSIThreshForRA)
+			pRA->RATRState = DM_RATR_STA_HIGH;
+		else if(pHalData->UndecoratedSmoothedPWDB > (s4Byte)LowRSSIThreshForRA)
+			pRA->RATRState = DM_RATR_STA_MIDDLE;
+		else
+			pRA->RATRState = DM_RATR_STA_LOW;
+
+		if(pRA->PreRATRState != pRA->RATRState)
+		{
+			RT_PRINT_ADDR(COMP_RATR, DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid);
+			RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI = %ld\n", pHalData->UndecoratedSmoothedPWDB));
+			RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI_LEVEL = %d\n", pRA->RATRState));
+			RT_TRACE(COMP_RATR, DBG_LOUD, ("PreState = %d, CurState = %d\n", pRA->PreRATRState, pRA->RATRState));
+			pAdapter->HalFunc.UpdateHalRAMaskHandler(
+									pAdapter,
+									FALSE,
+									0,
+									NULL,
+									NULL,
+									pRA->RATRState);
+			pRA->PreRATRState = pRA->RATRState;
+		}
+	}
+
+	//
+	// The following part configure AP/VWifi/IBSS rate adaptive mask.
+	//
+	if(ACTING_AS_AP(pAdapter) || ACTING_AS_IBSS(pAdapter))
+	{
+		pTargetAdapter = pAdapter;
+	}
+	else
+	{
+		pTargetAdapter = ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, FALSE);
+		if(!ACTING_AS_AP(pTargetAdapter))
+			pTargetAdapter = NULL;
+	}
+
+	// if extension port (softap) is started, updaet RA table for more than one clients associate
+	if(pTargetAdapter != NULL)
+	{
+		int	i;
+		PRT_WLAN_STA	pEntry;
+		PRATE_ADAPTIVE     pEntryRA;
+
+		for(i = 0; i < ASSOCIATE_ENTRY_NUM; i++)
+		{
+			if(	pTargetAdapter->MgntInfo.AsocEntry[i].bUsed && pTargetAdapter->MgntInfo.AsocEntry[i].bAssociated)
+			{
+				pEntry = pTargetAdapter->MgntInfo.AsocEntry+i;
+				pEntryRA = &pEntry->RateAdaptive;
+
+				switch (pEntryRA->PreRATRState)
+				{
+					case DM_RATR_STA_HIGH:
+					{
+						HighRSSIThreshForRA = 50;
+						LowRSSIThreshForRA = 20;
+					}
+					break;
+					
+					case DM_RATR_STA_MIDDLE:
+					{
+						HighRSSIThreshForRA = 55;
+						LowRSSIThreshForRA = 20;
+					}
+					break;
+					
+					case DM_RATR_STA_LOW:
+					{
+						HighRSSIThreshForRA = 50;
+						LowRSSIThreshForRA = 25;
+					}
+					break;
+
+					default:
+					{
+						HighRSSIThreshForRA = 50;
+						LowRSSIThreshForRA = 20;
+					}
+				}
+
+				if(pEntry->rssi_stat.UndecoratedSmoothedPWDB > (s4Byte)HighRSSIThreshForRA)
+					pEntryRA->RATRState = DM_RATR_STA_HIGH;
+				else if(pEntry->rssi_stat.UndecoratedSmoothedPWDB > (s4Byte)LowRSSIThreshForRA)
+					pEntryRA->RATRState = DM_RATR_STA_MIDDLE;
+				else
+					pEntryRA->RATRState = DM_RATR_STA_LOW;
+
+				if(pEntryRA->PreRATRState != pEntryRA->RATRState)
+				{
+					RT_PRINT_ADDR(COMP_RATR, DBG_LOUD, ("AsocEntry addr : "), pEntry->MacAddr);
+					RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI = %ld\n", pEntry->rssi_stat.UndecoratedSmoothedPWDB));
+					RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI_LEVEL = %d\n", pEntryRA->RATRState));
+					RT_TRACE(COMP_RATR, DBG_LOUD, ("PreState = %d, CurState = %d\n", pEntryRA->PreRATRState, pEntryRA->RATRState));
+					pAdapter->HalFunc.UpdateHalRAMaskHandler(
+											pTargetAdapter,
+											FALSE,
+											pEntry->AID+1,
+											pEntry->MacAddr,
+											pEntry,
+											pEntryRA->RATRState);
+					pEntryRA->PreRATRState = pEntryRA->RATRState;
+				}
+
+			}
+		}
+	}
+#endif	
+}
+#ifndef PLATFORM_FREEBSD
+static VOID
+dm_CheckProtection(
+	IN	PADAPTER	Adapter
+	)
+{
+#if 0
+	PMGNT_INFO		pMgntInfo = &(Adapter->MgntInfo);
+	u1Byte			CurRate, RateThreshold;
+
+	if(pMgntInfo->pHTInfo->bCurBW40MHz)
+		RateThreshold = MGN_MCS1;
+	else
+		RateThreshold = MGN_MCS3;
+
+	if(Adapter->TxStats.CurrentInitTxRate <= RateThreshold)
+	{
+		pMgntInfo->bDmDisableProtect = TRUE;
+		DbgPrint("Forced disable protect: %x\n", Adapter->TxStats.CurrentInitTxRate);
+	}
+	else
+	{
+		pMgntInfo->bDmDisableProtect = FALSE;
+		DbgPrint("Enable protect: %x\n", Adapter->TxStats.CurrentInitTxRate);
+	}
+#endif
+}
+#endif //PLATFORM_FREEBSD
+
+static VOID
+dm_CheckStatistics(
+	IN	PADAPTER	Adapter
+	)
+{
+#if 0
+	if(!Adapter->MgntInfo.bMediaConnect)
+		return;
+
+	//2008.12.10 tynli Add for getting Current_Tx_Rate_Reg flexibly.
+	Adapter->HalFunc.GetHwRegHandler( Adapter, HW_VAR_INIT_TX_RATE, (pu1Byte)(&Adapter->TxStats.CurrentInitTxRate) );
+
+	// Calculate current Tx Rate(Successful transmited!!)
+
+	// Calculate current Rx Rate(Successful received!!)
+	
+	//for tx tx retry count
+	Adapter->HalFunc.GetHwRegHandler( Adapter, HW_VAR_RETRY_COUNT, (pu1Byte)(&Adapter->TxStats.NumTxRetryCount) );
+#endif	
+}
+
+//
+// Initialize GPIO setting registers
+//
+static void
+dm_InitGPIOSetting(
+	IN	PADAPTER	Adapter
+	)
+{
+	u8	tmp1byte;
+	
+	tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG);
+	tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT);
+	rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte);
+
+}
+
+//============================================================
+// functions
+//============================================================
+void rtl8192d_init_dm_priv(IN PADAPTER Adapter)
+{
+	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+	_rtw_memset(pdmpriv, 0, sizeof(struct dm_priv));
+
+}
+
+void rtl8192d_deinit_dm_priv(IN PADAPTER Adapter)
+{
+	//PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
+	//struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+}
+
+void
+rtl8192d_InitHalDm(
+	IN	PADAPTER	Adapter
+	)
+{
+	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u8	i;
+
+	pdmpriv->DM_Type = DM_Type_ByDriver;	
+	pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE;
+	pdmpriv->UndecoratedSmoothedPWDB = (-1);
+	//pdmpriv->UndecoratedSmoothedCCK = (-1);
+	
+	//.1 DIG INIT
+	pdmpriv->bDMInitialGainEnable = _TRUE;
+	pdmpriv->DMFlag |= DYNAMIC_FUNC_DIG;
+	dm_DIGInit(Adapter);
+
+	//.2 DynamicTxPower INIT
+	pdmpriv->DMFlag |= DYNAMIC_FUNC_HP;
+	dm_InitDynamicTxPower(Adapter);
+
+	//.3
+	DM_InitEdcaTurbo(Adapter);//moved to  linked_status_chk()
+
+	//.4 RateAdaptive INIT
+	dm_InitRateAdaptiveMask(Adapter);
+
+	//.5 Tx Power Tracking Init.
+	pdmpriv->DMFlag |= DYNAMIC_FUNC_SS;
+	DM_InitializeTXPowerTracking(Adapter);
+
+	dm_InitDynamicBBPowerSaving(Adapter);
+
+	dm_InitGPIOSetting(Adapter);
+	
+	pdmpriv->DMFlag_tmp = pdmpriv->DMFlag;
+
+	// Save REG_INIDATA_RATE_SEL value for TXDESC.
+	for(i = 0 ; i<32 ; i++)
+	{
+		pdmpriv->INIDATA_RATE[i] = rtw_read8(Adapter, REG_INIDATA_RATE_SEL+i) & 0x3f;
+	}
+}
+
+VOID
+rtl8192d_HalDmWatchDog(
+	IN	PADAPTER	Adapter
+	)
+{
+	BOOLEAN		bFwCurrentInPSMode = _FALSE;
+	BOOLEAN		bFwPSAwake = _TRUE;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+#ifdef CONFIG_CONCURRENT_MODE
+	PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter;
+#endif //CONFIG_CONCURRENT_MODE
+
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	if((pHalData->bInModeSwitchProcess))
+	{
+		DBG_871X("HalDmWatchDog(): During dual mac mode switch or slave mac \n");
+		return;
+	}
+#endif
+
+#ifdef CONFIG_LPS
+	bFwCurrentInPSMode = Adapter->pwrctrlpriv.bFwCurrentInPSMode;
+	Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake));
+#endif
+
+#ifdef CONFIG_P2P
+	// Fw is under p2p powersaving mode, driver should stop dynamic mechanism.
+	// modifed by thomas. 2011.06.11.
+	if(Adapter->wdinfo.p2p_ps_enable)
+		bFwPSAwake = _FALSE;
+#endif //CONFIG_P2P
+
+	// Stop dynamic mechanism when:
+	// 1. RF is OFF. (No need to do DM.)
+	// 2. Fw is under power saving mode for FwLPS. (Prevent from SW/FW I/O racing.)
+	// 3. IPS workitem is scheduled. (Prevent from IPS sequence to be swapped with DM.
+	//     Sometimes DM execution time is longer than 100ms such that the assertion
+	//     in MgntActSet_RF_State() called by InactivePsWorkItem will be triggered by 
+	//     wating to long for RFChangeInProgress.)
+	// 4. RFChangeInProgress is TRUE. (Prevent from broken by IPS/HW/SW Rf off.)
+	// Noted by tynli. 2010.06.01.
+	//if(rfState == eRfOn)
+	if( (Adapter->hw_init_completed == _TRUE) 
+		&& ((!bFwCurrentInPSMode) && bFwPSAwake))
+	{
+#ifdef CONFIG_CONCURRENT_MODE
+		if(check_fwstate(&Adapter->mlmepriv, WIFI_AP_STATE) &&
+				check_fwstate(&pbuddy_adapter->mlmepriv, _FW_LINKED))
+		{			
+			if(Adapter->iface_type == IFACE_PORT1)
+			{
+				//reset TSF
+				rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1));
+				//BCN1 TSF will sync to BCN0 TSF with offset(0x518) if if1_sta linked
+				rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(3));
+			}	
+			else if(Adapter->iface_type == IFACE_PORT0)
+			{
+				//reset TSF
+				rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0));
+				//BCN0 TSF will sync to BCN1 TSF with offset(0x518) if if2_sta linked
+				rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(2));
+			}	
+			else
+				DBG_871X("Error Condition\n");
+		}	
+#endif //CONFIG_CONCURRENT_MODE
+		//
+		// Calculate Tx/Rx statistics.
+		//
+		dm_CheckStatistics(Adapter);
+
+		//
+		// For PWDB monitor and record some value for later use.
+		//
+		PWDB_Monitor(Adapter);
+//#ifdef CONFIG_CONCURRENT_MODE
+#if 0
+
+		if(Adapter->adapter_type > PRIMARY_ADAPTER)
+			goto _record_initrate;
+
+		//	FindMinimumRSSI()		
+		{				
+			PHAL_DATA_TYPE	pbuddy_HalData = GET_HAL_DATA(pbuddy_adapter);
+			struct dm_priv *pbuddy_dmpriv = &pbuddy_HalData->dmpriv;
+		
+			if((pdmpriv->EntryMinUndecoratedSmoothedPWDB != 0) &&
+				(pbuddy_dmpriv->EntryMinUndecoratedSmoothedPWDB != 0))
+			{
+			
+				if(pdmpriv->EntryMinUndecoratedSmoothedPWDB > pbuddy_dmpriv->EntryMinUndecoratedSmoothedPWDB)
+					pdmpriv->EntryMinUndecoratedSmoothedPWDB = pbuddy_dmpriv->EntryMinUndecoratedSmoothedPWDB;
+			}
+			else                         
+			{
+				if(pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)
+					pdmpriv->EntryMinUndecoratedSmoothedPWDB = pbuddy_dmpriv->EntryMinUndecoratedSmoothedPWDB;
+			}
+ 
+			if((pdmpriv->UndecoratedSmoothedPWDB != (-1)) &&
+				(pbuddy_dmpriv->UndecoratedSmoothedPWDB != (-1)))
+			{
+
+				if(pdmpriv->UndecoratedSmoothedPWDB > pbuddy_dmpriv->UndecoratedSmoothedPWDB)
+					pdmpriv->UndecoratedSmoothedPWDB = pbuddy_dmpriv->UndecoratedSmoothedPWDB;
+			}
+			else                         
+			{
+				if(pdmpriv->UndecoratedSmoothedPWDB == (-1))
+					pdmpriv->UndecoratedSmoothedPWDB = pbuddy_dmpriv->UndecoratedSmoothedPWDB;                               
+			}                      
+		}
+#endif
+		//
+		// Dynamic Initial Gain mechanism.
+		//
+//sherry delete flag 20110517		
+#ifdef CONFIG_PCI_HCI
+//		ACQUIRE_GLOBAL_SPINLOCK(&GlobalSpinlockForGlobalAdapterList);
+#else
+		ACQUIRE_GLOBAL_MUTEX(GlobalMutexForGlobalAdapterList);
+#endif
+		if(pHalData->bSlaveOfDMSP)
+		{
+			odm_FalseAlarmCounterStatistics_ForSlaveOfDMSP(Adapter);
+		}
+		else
+		{
+			odm_FalseAlarmCounterStatistics(Adapter);
+		}
+#ifdef CONFIG_PCI_HCI
+//		RELEASE_GLOBAL_SPINLOCK(&GlobalSpinlockForGlobalAdapterList);
+#else
+		RELEASE_GLOBAL_MUTEX(GlobalMutexForGlobalAdapterList);
+#endif
+		//odm_RSSIMonitorCheck(Adapter);
+		odm_FindMinimumRSSI_92D(Adapter);
+		odm_DIG(Adapter);
+		if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY)
+		{
+			if(pHalData->CurrentBandType92D != BAND_ON_5G)
+				dm_CCK_PacketDetectionThresh_DMSP(Adapter);
+		}
+		else
+		{
+			if(pHalData->CurrentBandType92D != BAND_ON_5G)
+				dm_CCK_PacketDetectionThresh(Adapter);
+		}
+
+//#ifdef CONFIG_PCI_HCI
+//		odm_DynamicEarlyMode(Adapter);
+//#endif
+
+		//
+		// Dynamic Tx Power mechanism.
+		//
+		odm_DynamicTxPower_92D(Adapter);
+
+		//
+		// Tx Power Tracking.
+		//
+		//TX power tracking will make 92de DMDP MAC0's throughput bad.
+#ifdef CONFIG_DUALMAC_CONCURRENT
+		if(!pHalData->bSlaveOfDMSP || Adapter->DualMacConcurrent == _FALSE)
+#endif
+			rtl8192d_dm_CheckTXPowerTracking(Adapter);
+
+		//
+		// Rate Adaptive by Rx Signal Strength mechanism.
+		//
+		dm_RefreshRateAdaptiveMask(Adapter);
+
+//#ifdef CONFIG_PCI_HCI
+		//BT-Coexist
+//		dm_BTCoexist(Adapter);
+//#endif
+
+#ifdef CONFIG_PCI_HCI
+		// Tx Migration settings.
+		//migration, 92d just for normal chip, vivi, 20100708
+		//if(IS_NORMAL_CHIP(pHalData->VersionID))
+			//dm_InterruptMigration(Adapter);
+
+#endif
+
+		// EDCA turbo
+		//update the EDCA paramter according to the Tx/RX mode
+		//update_EDCA_param(Adapter);
+		dm_CheckEdcaTurbo(Adapter);
+
+		//
+		// Dynamically switch RTS/CTS protection.
+		//
+		//dm_CheckProtection(Adapter);
+
+		//
+		//Dynamic BB Power Saving Mechanism
+		//vivi, 20101014, to pass DTM item: softap_excludeunencrypted_ext.htm 
+		//temporarily disable it advised for performance test by yn,2010-11-03.
+		//if(!Adapter->bInHctTest)
+			dm_DynamicBBPowerSaving(Adapter);
+
+_record_initrate:
+
+		// Read REG_INIDATA_RATE_SEL value for TXDESC.
+		if(check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE) == _TRUE)
+		{
+			pdmpriv->INIDATA_RATE[0] = rtw_read8(Adapter, REG_INIDATA_RATE_SEL) & 0x3f;
+		}
+		else
+		{
+			u8	i;
+			for(i=1 ; i < (Adapter->stapriv.asoc_sta_count + 1); i++)
+			{
+				pdmpriv->INIDATA_RATE[i] = rtw_read8(Adapter, (REG_INIDATA_RATE_SEL+i)) & 0x3f;
+			}
+		}
+	}
+	// Check GPIO to determine current RF on/off and Pbc status.
+	// Not enable for 92CU now!!!
+	// Check Hardware Radio ON/OFF or not	
+	//if(Adapter->MgntInfo.PowerSaveControl.bGpioRfSw)
+	//{
+		//RTPRINT(FPWR, PWRHW, ("dm_CheckRfCtrlGPIO \n"));
+	//	dm_CheckRfCtrlGPIO(Adapter);
+	//}
+	
+	dm_CheckPbcGPIO(Adapter);				// Add by hpfan 2008-03-11
+
+	//RTPRINT(FDM, DM_Monitor, ("HalDmWatchDog() <==\n"));
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_hal_init.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_hal_init.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_hal_init.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_hal_init.c	2017-09-23 03:42:49.962675235 +0800
@@ -0,0 +1,2380 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+#define _RTL8192D_HAL_INIT_C_
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtw_byteorder.h>
+#include <rtw_efuse.h>
+
+#include <hal_init.h>
+
+#ifdef CONFIG_USB_HCI
+#include <usb_hal.h>
+#endif
+
+#include <rtl8192d_hal.h>
+
+atomic_t GlobalMutexForGlobalAdapterList = ATOMIC_INIT(0);
+atomic_t GlobalMutexForMac0_2G_Mac1_5G = ATOMIC_INIT(0);
+atomic_t GlobalMutexForPowerAndEfuse = ATOMIC_INIT(0);
+atomic_t GlobalMutexForPowerOnAndPowerOff = ATOMIC_INIT(0);
+atomic_t GlobalMutexForFwDownload = ATOMIC_INIT(0);
+#ifdef CONFIG_DUALMAC_CONCURRENT
+atomic_t GlobalCounterForMutex = ATOMIC_INIT(0);
+BOOLEAN GlobalFirstConfigurationForNormalChip = _TRUE;
+#endif
+
+
+static BOOLEAN
+_IsFWDownloaded(
+	IN	PADAPTER			Adapter
+	)
+{
+	return ((rtw_read32(Adapter, REG_MCUFWDL) & MCUFWDL_RDY) ? _TRUE : _FALSE);
+}
+
+static VOID
+_FWDownloadEnable(
+	IN	PADAPTER		Adapter,
+	IN	BOOLEAN			enable
+	)
+{
+#ifdef CONFIG_USB_HCI
+	u32	value32 = rtw_read32(Adapter, REG_MCUFWDL);
+
+	if(enable){
+		value32 |= MCUFWDL_EN;
+	}
+	else{
+		value32 &= ~MCUFWDL_EN;
+	}
+
+	rtw_write32(Adapter, REG_MCUFWDL, value32);
+
+#else
+	u8	tmp;
+
+	if(enable)
+	{
+		#ifdef DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE
+		{
+			u8 val;
+			if( (val=rtw_read8(Adapter, REG_MCUFWDL)))
+				DBG_871X("DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE %s:%d REG_MCUFWDL:0x%02x\n", __FUNCTION__, __LINE__, val);
+		}
+		#endif
+		// 8051 enable
+		tmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1);
+		rtw_write8(Adapter, REG_SYS_FUNC_EN+1, tmp|0x04);
+
+		// MCU firmware download enable.
+		tmp = rtw_read8(Adapter, REG_MCUFWDL);
+		rtw_write8(Adapter, REG_MCUFWDL, tmp|0x01);
+
+		// 8051 reset
+		tmp = rtw_read8(Adapter, REG_MCUFWDL+2);
+		rtw_write8(Adapter, REG_MCUFWDL+2, tmp&0xf7);
+	}
+	else
+	{
+		// MCU firmware download enable.
+		tmp = rtw_read8(Adapter, REG_MCUFWDL);
+		rtw_write8(Adapter, REG_MCUFWDL, tmp&0xfe);
+
+		// Reserved for fw extension.   0x81[7] is used for mac0 status ,so don't write this reg here		 
+		//rtw_write8(Adapter, REG_MCUFWDL+1, 0x00);
+	}
+#endif
+}
+
+#ifdef CONFIG_USB_HCI
+static VOID
+_BlockWrite_92d(
+	IN		PADAPTER		Adapter,
+	IN		PVOID			buffer,
+	IN		u32				size
+	)
+{
+	u32			blockSize8 = sizeof(u64);	
+	u32			blocksize4 = sizeof(u32);
+	u32			blockSize = 64;
+	u8*			bufferPtr = (u8*)buffer;
+	u32*		pu4BytePtr = (u32*)buffer;
+	u32			i, offset, blockCount, remainSize,remain8,remain4,blockCount8,blockCount4;
+
+	blockCount = size / blockSize;
+	remain8 = size % blockSize;
+	for(i = 0 ; i < blockCount ; i++){
+		offset = i * blockSize;
+		rtw_writeN(Adapter, (FW_8192D_START_ADDRESS + offset), 64,(bufferPtr + offset));
+	}
+
+
+	if(remain8){
+		offset = blockCount * blockSize;
+
+		blockCount8=remain8/blockSize8;
+		remain4=remain8%blockSize8;
+		//RT_TRACE(COMP_INIT,DBG_LOUD,("remain4 size %x blockcount %x blockCount8 %x\n",remain4,blockCount,blockCount8));		 
+		for(i = 0 ; i < blockCount8 ; i++){	
+			rtw_writeN(Adapter, (FW_8192D_START_ADDRESS + offset+i*blockSize8), 8,(bufferPtr + offset+i*blockSize8));
+		}
+
+		if(remain4){
+			offset=blockCount * blockSize+blockCount8*blockSize8;		
+			blockCount4=remain4/blocksize4;
+			remainSize=remain8%blocksize4;
+			 
+			for(i = 0 ; i < blockCount4 ; i++){				
+				rtw_write32(Adapter, (FW_8192D_START_ADDRESS + offset+i*blocksize4), cpu_to_le32(*(pu4BytePtr+ offset/4+i)));		
+			}	
+			
+			if(remainSize){
+				offset=blockCount * blockSize+blockCount8*blockSize8+blockCount4*blocksize4;
+				for(i = 0 ; i < remainSize ; i++){
+					rtw_write8(Adapter, (FW_8192D_START_ADDRESS + offset + i), *(bufferPtr +offset+ i));
+				}	
+			}
+			
+		}
+		
+	}
+	
+}
+#endif
+#ifndef CONFIG_USB_HCI
+static VOID
+_BlockWrite(
+	IN		PADAPTER		Adapter,
+	IN		PVOID			buffer,
+	IN		u32			size
+	)
+{
+	u32			blockSize	= sizeof(u32);	// Use 4-byte write to download FW
+	u8*			bufferPtr	= (u8*)buffer;
+	u32*			pu4BytePtr	= (u32*)buffer;
+	u32			i, offset, blockCount, remainSize;
+
+	blockCount = size / blockSize;
+	remainSize = size % blockSize;
+
+	for(i = 0 ; i < blockCount ; i++){
+		offset = i * blockSize;
+		rtw_write32(Adapter, (FW_8192D_START_ADDRESS + offset), cpu_to_le32(*(pu4BytePtr + i)));		
+	}
+
+	if(remainSize){
+		offset = blockCount * blockSize;
+		bufferPtr += offset;
+		
+		for(i = 0 ; i < remainSize ; i++){
+			rtw_write8(Adapter, (FW_8192D_START_ADDRESS + offset + i), *(bufferPtr + i));
+		}
+	}
+
+}
+#endif //CONFIG_USB_HCI
+static VOID
+_PageWrite(
+	IN		PADAPTER		Adapter,
+	IN		u32			page,
+	IN		PVOID			buffer,
+	IN		u32			size
+	)
+{
+	u8 value8;
+	u8 u8Page = (u8) (page & 0x07) ;
+
+	value8 = (rtw_read8(Adapter, REG_MCUFWDL+2)& 0xF8 ) | u8Page ;
+	rtw_write8(Adapter, REG_MCUFWDL+2,value8);
+#ifdef CONFIG_USB_HCI
+	_BlockWrite_92d(Adapter,buffer,size);
+#else
+	_BlockWrite(Adapter,buffer,size);
+#endif
+}
+#ifdef CONFIG_PCI_HCI
+static VOID
+_FillDummy(
+	u8*		pFwBuf,
+	u32*	pFwLen
+	)
+{
+	u32	FwLen = *pFwLen;
+	u8	remain = (u8)(FwLen%4);
+	remain = (remain==0)?0:(4-remain);
+
+	while(remain>0)
+	{
+		pFwBuf[FwLen] = 0;
+		FwLen++;
+		remain--;
+	}
+
+	*pFwLen = FwLen;
+}
+#endif //CONFIG_PCI_HCI
+static VOID
+_WriteFW(
+	IN		PADAPTER		Adapter,
+	IN		PVOID			buffer,
+	IN		u32			size
+	)
+{
+	// Since we need dynamic decide method of dwonload fw, so we call this function to get chip version.
+	// We can remove _ReadChipVersion from ReadAdapterInfo8192C later.
+	u32 	pageNums,remainSize ;
+	u32 	page,offset;
+	u8*	bufferPtr = (u8*)buffer;
+
+#ifdef CONFIG_PCI_HCI
+	// 20100120 Joseph: Add for 88CE normal chip. 
+	// Fill in zero to make firmware image to dword alignment.
+	_FillDummy(bufferPtr, &size);
+#endif
+
+	pageNums = size / MAX_PAGE_SIZE ;		
+	//RT_ASSERT((pageNums <= 4), ("Page numbers should not greater then 4 \n"));			
+	remainSize = size % MAX_PAGE_SIZE;		
+	
+	for(page = 0; page < pageNums;  page++){
+		offset = page *MAX_PAGE_SIZE;
+		_PageWrite(Adapter,page, (bufferPtr+offset),MAX_PAGE_SIZE);			
+	}
+	if(remainSize){
+		offset = pageNums *MAX_PAGE_SIZE;
+		page = pageNums;
+		_PageWrite(Adapter,page, (bufferPtr+offset),remainSize);
+	}	
+	DBG_8192C("_WriteFW Done- for Normal chip.\n");
+
+}
+int _FWFreeToGo_92D(
+	IN		PADAPTER		Adapter
+	);
+int _FWFreeToGo_92D(
+	IN		PADAPTER		Adapter
+	)
+{
+	u32			counter = 0;
+	u32			value32;
+	// polling CheckSum report
+	do{
+		value32 = rtw_read32(Adapter, REG_MCUFWDL);
+	}while((counter ++ < POLLING_READY_TIMEOUT_COUNT) && (!(value32 & FWDL_ChkSum_rpt  )));	
+
+	if(counter >= POLLING_READY_TIMEOUT_COUNT){	
+		DBG_8192C("chksum report faill ! REG_MCUFWDL:0x%08x .\n",value32);
+		return _FAIL;
+	}
+	DBG_8192C("Checksum report OK ! REG_MCUFWDL:0x%08x .\n",value32);
+
+	value32 = rtw_read32(Adapter, REG_MCUFWDL);
+	value32 |= MCUFWDL_RDY;
+	rtw_write32(Adapter, REG_MCUFWDL, value32);
+	return _SUCCESS;
+	
+}
+
+VOID
+rtl8192d_FirmwareSelfReset(
+	IN	PADAPTER		Adapter
+)
+{
+	//HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8	u1bTmp;
+	u8	Delay = 100;
+		
+	//if((pHalData->FirmwareVersion > 0x21) ||
+	//	(pHalData->FirmwareVersion == 0x21 &&
+	//	pHalData->FirmwareSubVersion >= 0x01))
+	{
+		rtw_write8(Adapter, REG_FSIMR, 0x00);
+		// 2010/08/25 MH Accordign to RD alfred's suggestion, we need to disable other
+		// HRCV INT to influence 8051 reset.
+		rtw_write8(Adapter, REG_FWIMR, 0x20);
+		// 2011/02/15 MH According to Alex's suggestion, close mask to prevent incorrect FW write operation.
+		rtw_write8(Adapter, REG_FTIMR, 0x00);
+	
+		//0x1cf=0x20. Inform 8051 to reset. 2009.12.25. tynli_test
+		rtw_write8(Adapter, REG_HMETFR+3, 0x20);
+	
+		u1bTmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1);
+		while(u1bTmp&BIT2)
+		{
+			Delay--;
+			//RT_TRACE(COMP_INIT, DBG_LOUD, ("PowerOffAdapter8192CE(): polling 0x03[2] Delay = %d \n", Delay));
+			if(Delay == 0)
+				break;
+			rtw_udelay_os(50);
+			u1bTmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1);
+		}
+	
+		if((u1bTmp&BIT2) && (Delay == 0))
+		{
+			//DbgPrint("FirmwareDownload92C(): Fail!!!!!! 0x03 = %x\n", u1bTmp);
+			rtw_write8(Adapter, REG_FWIMR, 0x00);
+		}
+	}
+}
+
+//
+// description :polling fw ready
+//
+int _FWInit(
+	IN PADAPTER			  Adapter     
+	);
+int _FWInit(
+	IN PADAPTER			  Adapter     
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u32			counter = 0;
+
+
+	DBG_8192C("FW already have download ; \n");
+
+	// polling for FW ready
+	counter = 0;
+	do
+	{
+		if(pHalData->interfaceIndex==0){
+			if(rtw_read8(Adapter, FW_MAC0_ready) & mac0_ready){
+				DBG_8192C("Polling FW ready success!! REG_MCUFWDL:0x%x .\n",rtw_read8(Adapter, FW_MAC0_ready));
+				return _SUCCESS;
+			}
+			rtw_udelay_os(5);
+		}
+		else{
+			if(rtw_read8(Adapter, FW_MAC1_ready) &mac1_ready){
+				DBG_8192C("Polling FW ready success!! REG_MCUFWDL:0x%x .\n",rtw_read8(Adapter, FW_MAC1_ready));
+				return _SUCCESS;
+			}
+			rtw_udelay_os(5);					
+		}
+
+	}while(counter++ < POLLING_READY_TIMEOUT_COUNT);
+
+	if(pHalData->interfaceIndex==0){
+		DBG_8192C("Polling FW ready fail!! MAC0 FW init not ready:0x%x .\n",rtw_read8(Adapter, FW_MAC0_ready) );
+	}
+	else{
+		DBG_8192C("Polling FW ready fail!! MAC1 FW init not ready:0x%x .\n",rtw_read8(Adapter, FW_MAC1_ready) );
+	}
+	
+	DBG_8192C("Polling FW ready fail!! REG_MCUFWDL:0x%x .\n",rtw_read32(Adapter, REG_MCUFWDL));
+	return _FAIL;
+
+}
+
+#ifdef CONFIG_FILE_FWIMG
+extern char *rtw_fw_file_path;
+u8	FwBuffer8192D[FW_8192D_SIZE];
+#endif //CONFIG_FILE_FWIMG
+//
+//	Description:
+//		Download 8192C firmware code.
+//
+//
+int FirmwareDownload92D(
+	IN	PADAPTER			Adapter
+)
+{	
+	int	rtStatus = _SUCCESS;	
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	s8 				R92DFwImageFileName[] ={RTL8192D_FW_IMG};
+	u8*				FwImage;
+	u32				FwImageLen;
+	char*			pFwImageFileName;
+	PRT_FIRMWARE_92D	pFirmware = NULL;
+	PRT_8192D_FIRMWARE_HDR		pFwHdr = NULL;
+	u8		*pFirmwareBuf;
+	u32		FirmwareLen;
+	u8		value;
+	u32		count;
+	BOOLEAN	 bFwDownloaded = _FALSE,bFwDownloadInProcess = _FALSE;
+
+	if(Adapter->bSurpriseRemoved){
+		return _FAIL;
+	}
+
+	pFirmware = (PRT_FIRMWARE_92D)rtw_zvmalloc(sizeof(RT_FIRMWARE_92D));
+	if(!pFirmware)
+	{
+		rtStatus = _FAIL;
+		goto Exit;
+	}
+
+	pFwImageFileName = R92DFwImageFileName;
+	FwImage = (u8 *)Rtl8192D_FwImageArray;
+	FwImageLen = Rtl8192D_FwImageArrayLength;
+
+	DBG_8192C(" ===> FirmwareDownload92D() fw:Rtl8192D_FwImageArray\n");
+
+	#ifdef CONFIG_FILE_FWIMG
+	if(rtw_is_file_readable(rtw_fw_file_path) == _TRUE)
+	{
+		DBG_871X("%s accquire FW from file:%s\n", __FUNCTION__, rtw_fw_file_path);
+		pFirmware->eFWSource = FW_SOURCE_IMG_FILE; // We should decided by Reg.
+	}
+	else
+	#endif //CONFIG_FILE_FWIMG
+	{
+		DBG_871X("%s accquire FW from embedded image\n", __FUNCTION__);
+		pFirmware->eFWSource = FW_SOURCE_HEADER_FILE;
+	}
+
+	switch(pFirmware->eFWSource)
+	{
+		case FW_SOURCE_IMG_FILE:
+			
+			#ifdef CONFIG_FILE_FWIMG
+			rtStatus = rtw_retrive_from_file(rtw_fw_file_path, FwBuffer8192D, FW_8192D_SIZE);
+			
+			pFirmware->ulFwLength = rtStatus>=0?rtStatus:0;
+			pFirmware->szFwBuffer = FwBuffer8192D;
+			#endif //CONFIG_FILE_FWIMG
+			
+			if(pFirmware->ulFwLength <= 0)
+			{
+				rtStatus = _FAIL;
+				goto Exit;
+			}
+			break;
+		case FW_SOURCE_HEADER_FILE:
+#if 0
+			if(ImgArrayLength > FW_8192C_SIZE){
+				rtStatus = _FAIL;
+				//RT_TRACE(COMP_INIT, DBG_SERIOUS, ("Firmware size exceed 0x%X. Check it.\n", FW_8192C_SIZE) );
+				goto Exit;
+			}
+#endif
+			pFirmware->szFwBuffer = FwImage;
+			pFirmware->ulFwLength = FwImageLen;
+			break;
+	}
+
+	#ifdef DBG_FW_STORE_FILE_PATH //used to store firmware to file...
+	if(pFirmware->ulFwLength > 0)
+	{
+		rtw_store_to_file(DBG_FW_STORE_FILE_PATH, pFirmware->szFwBuffer, pFirmware->ulFwLength);
+	}
+	#endif
+
+	pFirmwareBuf = pFirmware->szFwBuffer;
+	FirmwareLen = pFirmware->ulFwLength;
+
+	// To Check Fw header. Added by tynli. 2009.12.04.
+	pFwHdr = (PRT_8192D_FIRMWARE_HDR)pFirmware->szFwBuffer;
+
+	pHalData->FirmwareVersion =  le16_to_cpu(pFwHdr->Version); 
+	pHalData->FirmwareSubVersion = le16_to_cpu(pFwHdr->Subversion); 
+
+	DBG_8192C(" FirmwareVersion(%#x), Signature(%#x)\n", pHalData->FirmwareVersion, le16_to_cpu(pFwHdr->Signature));
+
+	if(IS_FW_HEADER_EXIST(pFwHdr))
+	{
+		//DBG_8192C("Shift 32 bytes for FW header!!\n");
+		pFirmwareBuf = pFirmwareBuf + 32;
+		FirmwareLen = FirmwareLen -32;
+	}
+
+  	ACQUIRE_GLOBAL_MUTEX(GlobalMutexForFwDownload);
+	bFwDownloaded = _IsFWDownloaded(Adapter);
+	if((rtw_read8(Adapter, 0x1f)&BIT5) == BIT5)
+		bFwDownloadInProcess = _TRUE;
+	else
+		bFwDownloadInProcess = _FALSE;
+
+	if(bFwDownloaded)
+	{
+		RELEASE_GLOBAL_MUTEX(GlobalMutexForFwDownload);
+		goto Exit;
+	}
+	else if(bFwDownloadInProcess)
+	{
+		RELEASE_GLOBAL_MUTEX(GlobalMutexForFwDownload);
+		for(count=0;count<5000;count++)
+		{
+			rtw_udelay_os(500);
+			ACQUIRE_GLOBAL_MUTEX(GlobalMutexForFwDownload);
+			bFwDownloaded = _IsFWDownloaded(Adapter);
+			if((rtw_read8(Adapter, 0x1f)&BIT5) == BIT5)
+				bFwDownloadInProcess = _TRUE;
+			else
+				bFwDownloadInProcess = _FALSE;
+			RELEASE_GLOBAL_MUTEX(GlobalMutexForFwDownload);
+			if(bFwDownloaded)
+				goto Exit;
+			else if(!bFwDownloadInProcess)
+				break;
+			else
+				DBG_8192C("Wait for another mac download fw \n");
+		}
+		ACQUIRE_GLOBAL_MUTEX(GlobalMutexForFwDownload);
+		value=rtw_read8(Adapter, 0x1f);
+		value|=BIT5;
+		rtw_write8(Adapter, 0x1f,value);
+		RELEASE_GLOBAL_MUTEX(GlobalMutexForFwDownload);
+	}
+	else
+	{
+		value=rtw_read8(Adapter, 0x1f);
+		value|=BIT5;
+		rtw_write8(Adapter, 0x1f,value);
+		RELEASE_GLOBAL_MUTEX(GlobalMutexForFwDownload);
+	}
+
+	// Suggested by Filen. If 8051 is running in RAM code, driver should inform Fw to reset by itself,
+	// or it will cause download Fw fail. 2010.02.01. by tynli.
+	if(rtw_read8(Adapter, REG_MCUFWDL)&BIT7) //8051 RAM code
+	{	
+		rtl8192d_FirmwareSelfReset(Adapter);
+		rtw_write8(Adapter, REG_MCUFWDL, 0x00);		
+	}
+
+	_FWDownloadEnable(Adapter, _TRUE);
+	_WriteFW(Adapter, pFirmwareBuf, FirmwareLen);
+	_FWDownloadEnable(Adapter, _FALSE);
+
+	ACQUIRE_GLOBAL_MUTEX(GlobalMutexForFwDownload);
+	rtStatus=_FWFreeToGo_92D(Adapter);	
+	// download fw over,clear 0x1f[5]
+	value=rtw_read8(Adapter, 0x1f);
+	value&=(~BIT5);
+	rtw_write8(Adapter, 0x1f,value);		
+	RELEASE_GLOBAL_MUTEX(GlobalMutexForFwDownload);
+
+	if(_SUCCESS != rtStatus){
+		DBG_8192C("Firmware is not ready to run!\n");
+		goto Exit;
+	}
+
+Exit:
+
+	rtStatus =_FWInit(Adapter);
+
+	if(pFirmware) {
+		rtw_vmfree((u8*)pFirmware, sizeof(RT_FIRMWARE_92D));
+	}
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, (" <=== FirmwareDownload91C()\n"));
+	return rtStatus;
+
+}
+
+//"chnl" begins from 0. It's not a real channel.
+//"channel_info[chnl]" is a real channel.
+static u8 Hal_GetChnlGroupfromArray(u8 chnl)
+{
+	u8	group=0;
+	u8	channel_info[59] = {1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,100,102,104,106,108,110,112,114,116,118,120,122,124,126,128,130,132,134,136,138,140,149,151,153,155,157,159,161,163,165};
+
+	if (channel_info[chnl] <= 3)			// Chanel 1-3
+		group = 0;
+	else if (channel_info[chnl] <= 9)		// Channel 4-9
+		group = 1;
+	else	if(channel_info[chnl] <=14)				// Channel 10-14
+		group = 2;
+	// For TX_POWER_FOR_5G_BAND 
+	else if(channel_info[chnl] <= 44)
+		group = 3;
+	else if(channel_info[chnl] <= 54)
+		group = 4;
+	else if(channel_info[chnl] <= 64)
+		group = 5;
+	else if(channel_info[chnl] <= 112)
+		group = 6;
+	else if(channel_info[chnl] <= 126)
+		group = 7;
+	else if(channel_info[chnl] <= 140)
+		group = 8;
+	else if(channel_info[chnl] <= 153)
+		group = 9;
+	else if(channel_info[chnl] <= 159)
+		group = 10;
+	else 
+		group = 11;
+	
+	return group;
+}
+
+VOID
+rtl8192d_ReadChipVersion(
+	IN PADAPTER			Adapter
+	)
+{
+	u32	value32;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	VERSION_8192D	ChipVersion = VERSION_TEST_CHIP_88C;
+
+	value32 = rtw_read32(Adapter, REG_SYS_CFG);
+	DBG_871X("ReadChipVersion8192D 0xF0 = 0x%x \n", value32);
+
+	ChipVersion = (VERSION_8192D)(VERSION_NORMAL_CHIP_92D_SINGLEPHY | CHIP_92D);
+
+	//Decide TestChip or NormalChip here.
+	//92D's RF_type will be decided when the reg0x2c is filled.
+	if (!(value32 & 0x000f0000))
+	{ //Test or Normal Chip:  hardward id 0xf0[19:16] =0 test chip
+		ChipVersion = VERSION_TEST_CHIP_92D_SINGLEPHY;
+		DBG_871X("TEST CHIP!!!\n");
+	}
+	else
+	{
+		ChipVersion = (VERSION_8192D)( ChipVersion | NORMAL_CHIP);
+		DBG_871X("Normal CHIP!!!\n");
+	}
+
+	pHalData->VersionID = ChipVersion;
+
+}
+
+//-------------------------------------------------------------------------
+//
+//	Channel Plan
+//
+//-------------------------------------------------------------------------
+
+static RT_CHANNEL_DOMAIN
+_HalMapChannelPlan8192D(
+	IN	PADAPTER	Adapter,
+	IN	u8		HalChannelPlan
+	)
+{
+	RT_CHANNEL_DOMAIN	rtChannelDomain;
+
+	switch(HalChannelPlan)
+	{
+#if 0 /* Not using EEPROM_CHANNEL_PLAN directly */
+		case EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN:
+			rtChannelDomain = RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN;
+			break;
+		case EEPROM_CHANNEL_PLAN_WORLD_WIDE_13:
+			rtChannelDomain = RT_CHANNEL_DOMAIN_WORLD_WIDE_13;
+			break;
+#endif /* Not using EEPROM_CHANNEL_PLAN directly */
+		case 0x7F: //Realtek Reserve
+			rtChannelDomain = RT_CHANNEL_DOMAIN_FCC_NO_DFS;
+			//RT_TRACE(COMP_INIT, DBG_LOUD, ("_HalMapChannelPlan8192D():Force ChannelPlan =0x%X \n" ,0));
+			break;
+		default:
+			if(HalChannelPlan == 0xFF)
+				rtChannelDomain = RT_CHANNEL_DOMAIN_FCC_NO_DFS;
+			else
+				rtChannelDomain = (RT_CHANNEL_DOMAIN)HalChannelPlan;
+			break;
+	}
+	
+	return 	rtChannelDomain;
+
+}
+
+VOID
+rtl8192d_ReadChannelPlan(
+	IN	PADAPTER 		Adapter,
+	IN	u8*			PROMContent,
+	IN	BOOLEAN			AutoLoadFail
+	)
+{
+	struct mlme_priv	*pmlmepriv = &(Adapter->mlmepriv);
+	struct registry_priv *pregistrypriv = &Adapter->registrypriv;
+	u8			channelPlan;
+
+	if(AutoLoadFail){
+		channelPlan = CHPL_FCC;
+	}
+	else{
+		channelPlan = PROMContent[EEPROM_CHANNEL_PLAN];
+	}
+
+	if((pregistrypriv->channel_plan>= RT_CHANNEL_DOMAIN_MAX) || (channelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK))
+	{
+		pmlmepriv->ChannelPlan = _HalMapChannelPlan8192D(Adapter, (channelPlan & (~(EEPROM_CHANNEL_PLAN_BY_HW_MASK))));
+		//pMgntInfo->bChnlPlanFromHW = (channelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK) ? _TRUE : _FALSE; // User cannot change  channel plan.
+	}
+	else
+	{
+		pmlmepriv->ChannelPlan = (RT_CHANNEL_DOMAIN)pregistrypriv->channel_plan;
+	}
+
+#if 0 //todo:
+	switch(pMgntInfo->ChannelPlan)
+	{
+		case RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN:
+		{
+			PRT_DOT11D_INFO	pDot11dInfo = GET_DOT11D_INFO(pMgntInfo);
+
+			pDot11dInfo->bEnabled = TRUE;
+
+			RT_TRACE(COMP_INIT, DBG_LOUD, ("Enable dot11d when RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN!\n"));
+			break;
+		}
+		
+		default: //for MacOSX warning message
+			break;
+	}
+#endif
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("RegChannelPlan(%d) EEPROMChannelPlan(%ld)", pMgntInfo->RegChannelPlan, (u4Byte)channelPlan));
+	MSG_8192C("ChannelPlan = %d\n" , pmlmepriv->ChannelPlan);
+
+}
+
+//-------------------------------------------------------------------------
+//
+//	EEPROM Power index mapping
+//
+//-------------------------------------------------------------------------
+
+static VOID
+hal_ReadPowerValueFromPROM92D(
+	IN	PADAPTER 		Adapter,
+	IN	PTxPowerInfo	pwrInfo,
+	IN	u8*			PROMContent,
+	IN	BOOLEAN			AutoLoadFail
+	)
+{
+	u32	rfPath, eeAddr, group, offset1,offset2=0;
+	u8	i = 0;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	_rtw_memset(pwrInfo, 0, sizeof(TxPowerInfo));
+
+	if(AutoLoadFail){		
+		for(group = 0 ; group < CHANNEL_GROUP_MAX ; group++){
+			for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){
+				if(group< CHANNEL_GROUP_MAX_2G)
+				{
+					pwrInfo->CCKIndex[rfPath][group]		= EEPROM_Default_TxPowerLevel_2G;	
+					pwrInfo->HT40_1SIndex[rfPath][group]		= EEPROM_Default_TxPowerLevel_2G;
+				}	
+				else
+				{
+					pwrInfo->HT40_1SIndex[rfPath][group]		= EEPROM_Default_TxPowerLevel_5G;
+				}
+				pwrInfo->HT40_2SIndexDiff[rfPath][group]	= EEPROM_Default_HT40_2SDiff;
+				pwrInfo->HT20IndexDiff[rfPath][group]		= EEPROM_Default_HT20_Diff;
+				pwrInfo->OFDMIndexDiff[rfPath][group]	= EEPROM_Default_LegacyHTTxPowerDiff;
+				pwrInfo->HT40MaxOffset[rfPath][group]	= EEPROM_Default_HT40_PwrMaxOffset;		
+				pwrInfo->HT20MaxOffset[rfPath][group]	= EEPROM_Default_HT20_PwrMaxOffset;
+			}
+		}
+
+		for(i = 0; i < 3; i++)
+		{
+			pwrInfo->TSSI_A_5G[i] = EEPROM_Default_TSSI;
+			pwrInfo->TSSI_B_5G[i] = EEPROM_Default_TSSI;
+		}
+		pHalData->bNOPG = _TRUE;
+		return;
+	}
+
+	//Maybe autoload OK,buf the tx power index vlaue is not filled.
+	//If we find it,we set it default value.
+	for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){
+		for(group = 0 ; group < CHANNEL_GROUP_MAX_2G; group++){
+			eeAddr = EEPROM_CCK_TX_PWR_INX_2G + (rfPath * 3) + group;
+			pwrInfo->CCKIndex[rfPath][group] = 
+				(PROMContent[eeAddr] == 0xFF)?(eeAddr>0x7B?EEPROM_Default_TxPowerLevel_5G:EEPROM_Default_TxPowerLevel_2G):PROMContent[eeAddr];
+			if(PROMContent[eeAddr] == 0xFF)
+				pHalData->bNOPG = _TRUE;
+		}
+	}
+	for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){
+		for(group = 0 ; group < CHANNEL_GROUP_MAX ; group++){
+			offset1 = group / 3;
+			offset2 = group % 3;
+			eeAddr = EEPROM_HT40_1S_TX_PWR_INX_2G+ (rfPath * 3) + offset2 + offset1*21;
+			pwrInfo->HT40_1SIndex[rfPath][group] = 
+				(PROMContent[eeAddr] == 0xFF)?(eeAddr>0x7B?EEPROM_Default_TxPowerLevel_5G:EEPROM_Default_TxPowerLevel_2G):PROMContent[eeAddr];
+		}
+	}
+
+	//These just for 92D efuse offset.
+	for(group = 0 ; group < CHANNEL_GROUP_MAX ; group++){
+		for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){
+			offset1 = group / 3;
+			offset2 = group % 3;
+
+			if(PROMContent[EEPROM_HT40_2S_TX_PWR_INX_DIFF_2G+ offset2 + offset1*21] != 0xFF)
+				pwrInfo->HT40_2SIndexDiff[rfPath][group] = 
+					(PROMContent[EEPROM_HT40_2S_TX_PWR_INX_DIFF_2G+ offset2 + offset1*21] >> (rfPath * 4)) & 0xF;
+					//RT_TRACE(COMP_INIT,DBG_LOUD,
+					//	("ht40_2sdiff:group:%d,%x:0x%x.\n",group,EEPROM_HT40_2S_TX_PWR_INX_DIFF_2G+ offset2 + offset1*21,PROMContent[EEPROM_HT40_2S_TX_PWR_INX_DIFF_2G+ offset2 + offset1*21]));
+			else
+				pwrInfo->HT40_2SIndexDiff[rfPath][group]	= EEPROM_Default_HT40_2SDiff;
+
+			if(PROMContent[EEPROM_HT20_TX_PWR_INX_DIFF_2G + offset2 + offset1*21] != 0xFF)
+			{
+				pwrInfo->HT20IndexDiff[rfPath][group] =
+					(PROMContent[EEPROM_HT20_TX_PWR_INX_DIFF_2G+ offset2 + offset1*21] >> (rfPath * 4)) & 0xF;
+				if(pwrInfo->HT20IndexDiff[rfPath][group] & BIT3)	//4bit sign number to 8 bit sign number
+					pwrInfo->HT20IndexDiff[rfPath][group] |= 0xF0;				
+			}
+			else
+			{
+				pwrInfo->HT20IndexDiff[rfPath][group]		= EEPROM_Default_HT20_Diff;
+			}
+
+			if(PROMContent[EEPROM_OFDM_TX_PWR_INX_DIFF_2G + offset2 + offset1*21] != 0xFF)
+				pwrInfo->OFDMIndexDiff[rfPath][group] =
+					(PROMContent[EEPROM_OFDM_TX_PWR_INX_DIFF_2G + offset2 + offset1*21] >> (rfPath * 4)) & 0xF;
+			else
+				pwrInfo->OFDMIndexDiff[rfPath][group]	= EEPROM_Default_LegacyHTTxPowerDiff;
+
+			if(PROMContent[EEPROM_HT40_MAX_PWR_OFFSET_2G + offset2 + offset1*21] != 0xFF)
+				pwrInfo->HT40MaxOffset[rfPath][group] =
+					(PROMContent[EEPROM_HT40_MAX_PWR_OFFSET_2G + offset2 + offset1*21] >> (rfPath * 4)) & 0xF;
+			else
+				pwrInfo->HT40MaxOffset[rfPath][group]	= EEPROM_Default_HT40_PwrMaxOffset;
+
+			if(PROMContent[EEPROM_HT20_MAX_PWR_OFFSET_2G + offset2 + offset1*21] != 0xFF)
+				pwrInfo->HT20MaxOffset[rfPath][group] =
+					(PROMContent[EEPROM_HT20_MAX_PWR_OFFSET_2G + offset2 + offset1*21] >> (rfPath * 4)) & 0xF;
+			else	
+				pwrInfo->HT20MaxOffset[rfPath][group]	= EEPROM_Default_HT20_PwrMaxOffset;			
+			
+		}
+	}
+
+	if(PROMContent[EEPROM_TSSI_A_5G] != 0xFF){
+		//5GL
+		pwrInfo->TSSI_A_5G[0] = PROMContent[EEPROM_TSSI_A_5G] & 0x3F;	//[0:5]
+		pwrInfo->TSSI_B_5G[0] = PROMContent[EEPROM_TSSI_B_5G] & 0x3F;
+
+		//5GM
+		pwrInfo->TSSI_A_5G[1] = PROMContent[EEPROM_TSSI_AB_5G] & 0x3F;
+		pwrInfo->TSSI_B_5G[1] = (PROMContent[EEPROM_TSSI_AB_5G] & 0xC0) >> 6 | 
+							(PROMContent[EEPROM_TSSI_AB_5G+1] & 0x0F) << 2;
+
+		//5GH
+		pwrInfo->TSSI_A_5G[2] = (PROMContent[EEPROM_TSSI_AB_5G+1] & 0xF0) >> 4 | 
+							(PROMContent[EEPROM_TSSI_AB_5G+2] & 0x03) << 4;
+		pwrInfo->TSSI_B_5G[2] = (PROMContent[EEPROM_TSSI_AB_5G+2] & 0xFC) >> 2 ;
+	}
+	else
+	{
+		for(i = 0; i < 3; i++)
+		{
+			pwrInfo->TSSI_A_5G[i] = EEPROM_Default_TSSI;
+			pwrInfo->TSSI_B_5G[i] = EEPROM_Default_TSSI;
+		}
+	}
+}
+
+VOID
+rtl8192d_ReadTxPowerInfo(
+	IN	PADAPTER 		Adapter,
+	IN	u8*			PROMContent,
+	IN	BOOLEAN			AutoLoadFail
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	TxPowerInfo	pwrInfo;
+	u32			rfPath, ch, group;
+	u8			pwr, diff,tempval[2], i;
+
+	hal_ReadPowerValueFromPROM92D(Adapter, &pwrInfo, PROMContent, AutoLoadFail);
+
+	if(!AutoLoadFail)
+	{
+		pHalData->EEPROMRegulatory = (PROMContent[EEPROM_RF_OPT1]&0x7);	//bit0~2
+		pHalData->EEPROMThermalMeter = PROMContent[EEPROM_THERMAL_METER]&0x1f;
+		pHalData->CrystalCap = PROMContent[EEPROM_XTAL_K];
+		tempval[0] = PROMContent[EEPROM_IQK_DELTA]&0x03;
+		tempval[1] = (PROMContent[EEPROM_LCK_DELTA]&0x0C) >> 2;
+		pHalData->bTXPowerDataReadFromEEPORM = _TRUE;
+		if(IS_92D_D_CUT(pHalData->VersionID)||IS_92D_E_CUT(pHalData->VersionID))
+		{
+			pHalData->InternalPA5G[0] = !((PROMContent[EEPROM_TSSI_A_5G] & BIT6) >> 6);
+			pHalData->InternalPA5G[1] = !((PROMContent[EEPROM_TSSI_B_5G] & BIT6) >> 6);
+			DBG_8192C("Is D/E cut,Internal PA0 %d Internal PA1 %d\n",pHalData->InternalPA5G[0],pHalData->InternalPA5G[1]);
+		}
+		pHalData->EEPROMC9 = PROMContent[EEPROM_RF_OPT6];
+		pHalData->EEPROMCC = PROMContent[EEPROM_RF_OPT7];
+	}
+	else
+	{
+		pHalData->EEPROMRegulatory = 0;
+		pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
+		pHalData->CrystalCap = EEPROM_Default_CrystalCap;		
+		tempval[0] = tempval[1] = 3;
+	}
+
+	pHalData->PAMode = PA_MODE_INTERNAL_SP3T;
+
+	if(pHalData->EEPROMC9 == 0xFF || AutoLoadFail)
+	{
+		switch(pHalData->PAMode)
+		{
+			//external pa
+			case 0:	
+				pHalData->EEPROMC9 = EEPROM_Default_externalPA_C9;
+				pHalData->EEPROMCC = EEPROM_Default_externalPA_CC;	
+				pHalData->InternalPA5G[0] = _FALSE;			
+				pHalData->InternalPA5G[1] = _FALSE;			
+				break;
+
+			// internal pa - SP3T
+			case 1:
+				pHalData->EEPROMC9 = EEPROM_Default_internalPA_SP3T_C9;
+				pHalData->EEPROMCC = EEPROM_Default_internalPA_SP3T_CC;			
+				pHalData->InternalPA5G[0] = _TRUE;			
+				pHalData->InternalPA5G[1] = _TRUE;						
+				break;
+
+			//intermal pa = SPDT
+			case 2:
+				pHalData->EEPROMC9 = EEPROM_Default_internalPA_SPDT_C9;
+				pHalData->EEPROMCC = EEPROM_Default_internalPA_SPDT_CC;			
+				pHalData->InternalPA5G[0] = _TRUE;			
+				pHalData->InternalPA5G[1] = _TRUE;									
+				break;
+
+			default:
+				break;
+		}	
+	}
+	DBG_871X("PHY_SetPAMode mode %d, c9 = 0x%x cc = 0x%x interface index %d\n", pHalData->PAMode, pHalData->EEPROMC9, pHalData->EEPROMCC, pHalData->interfaceIndex);
+
+	//Use default value to fill parameters if efuse is not filled on some place.	
+
+	// ThermalMeter from EEPROM
+	if(pHalData->EEPROMThermalMeter < 0x06 || pHalData->EEPROMThermalMeter > 0x1c)
+		pHalData->EEPROMThermalMeter = 0x12;
+	
+	pdmpriv->ThermalMeter[0] = pHalData->EEPROMThermalMeter;	
+
+	//check XTAL_K
+	if(pHalData->CrystalCap == 0xFF)
+		pHalData->CrystalCap = 0;
+
+	if(pHalData->EEPROMRegulatory >3)
+		pHalData->EEPROMRegulatory = 0;
+
+	for(i = 0; i < 2; i++)
+	{
+		switch(tempval[i])
+		{
+			case 0: 
+				tempval[i] = 2;
+				break;
+				
+			case 1: 
+				tempval[i] = 4;				
+				break;
+				
+			case 2:
+				tempval[i] = 6;				
+				break;
+				
+			case 3:
+			default:				
+				tempval[i] = 0;
+				break;			
+		}
+	}
+
+#if 1
+	pdmpriv->Delta_IQK = tempval[0];
+	pdmpriv->Delta_LCK = 5;
+#else
+	//temporarily close 92D re-IQK&LCK by thermal meter,advised by allen.2010-11-03
+	pHalData->Delta_IQK = 0;
+	pHalData->Delta_LCK = 0;
+#endif
+
+	if(pHalData->EEPROMC9 == 0xFF)
+		pHalData->EEPROMC9 = 0x00;
+
+	//RTPRINT(FINIT, INIT_TxPower, ("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory));		
+	//RTPRINT(FINIT, INIT_TxPower, ("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter));	
+	//RTPRINT(FINIT, INIT_TxPower, ("CrystalCap = 0x%x\n", pHalData->CrystalCap));	
+	//RTPRINT(FINIT, INIT_TxPower, ("Delta_IQK = 0x%x Delta_LCK = 0x%x\n", pHalData->Delta_IQK, pHalData->Delta_LCK));	
+	
+	for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){
+		for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){
+			group = Hal_GetChnlGroupfromArray((u8)ch);
+
+			if(ch < CHANNEL_MAX_NUMBER_2G)
+				pHalData->TxPwrLevelCck[rfPath][ch]		= pwrInfo.CCKIndex[rfPath][group];
+			pHalData->TxPwrLevelHT40_1S[rfPath][ch]	= pwrInfo.HT40_1SIndex[rfPath][group];
+
+			pHalData->TxPwrHt20Diff[rfPath][ch]		= pwrInfo.HT20IndexDiff[rfPath][group];
+			pHalData->TxPwrLegacyHtDiff[rfPath][ch]	= pwrInfo.OFDMIndexDiff[rfPath][group];
+			pHalData->PwrGroupHT20[rfPath][ch]		= pwrInfo.HT20MaxOffset[rfPath][group];
+			pHalData->PwrGroupHT40[rfPath][ch]		= pwrInfo.HT40MaxOffset[rfPath][group];
+
+			pwr		= pwrInfo.HT40_1SIndex[rfPath][group];
+			diff	= pwrInfo.HT40_2SIndexDiff[rfPath][group];
+
+			pHalData->TxPwrLevelHT40_2S[rfPath][ch]  = (pwr > diff) ? (pwr - diff) : 0;
+		}
+	}
+
+#if DBG
+
+	for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){
+		for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){
+			if(ch < CHANNEL_MAX_NUMBER_2G)
+			{
+				DBG_8192C("RF(%d)-Ch(%d) [CCK / HT40_1S / HT40_2S] = [0x%x / 0x%x / 0x%x]\n", 
+					rfPath, ch, 
+					pHalData->TxPwrLevelCck[rfPath][ch], 
+					pHalData->TxPwrLevelHT40_1S[rfPath][ch], 
+					pHalData->TxPwrLevelHT40_2S[rfPath][ch]);
+			}
+			else
+			{
+				DBG_8192C("RF(%d)-Ch(%d) [HT40_1S / HT40_2S] = [0x%x / 0x%x]\n", 
+					rfPath, ch, 
+					pHalData->TxPwrLevelHT40_1S[rfPath][ch], 
+					pHalData->TxPwrLevelHT40_2S[rfPath][ch]);
+			}
+		}
+	}
+
+	for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){
+		DBG_8192C("RF-A Ht20 to HT40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrHt20Diff[RF_PATH_A][ch]);
+	}
+
+	for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){
+		DBG_8192C("RF-A Legacy to Ht40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrLegacyHtDiff[RF_PATH_A][ch]);
+	}
+	
+	for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){
+		DBG_8192C("RF-B Ht20 to HT40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrHt20Diff[RF_PATH_B][ch]);
+	}
+	
+	for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){
+		DBG_8192C("RF-B Legacy to HT40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrLegacyHtDiff[RF_PATH_B][ch]);
+	}
+	
+#endif
+
+}
+
+//
+//	Description:
+//		Reset Dual Mac Mode Switch related settings
+//
+//	Assumption:
+//
+VOID rtl8192d_ResetDualMacSwitchVariables(
+		IN PADAPTER			Adapter
+)
+{
+#ifdef CONFIG_DUALMAC_CONCURRENT
+/*	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	PADAPTER		BuddyAdapter = Adapter->BuddyAdapter;
+
+	Adapter->bNeedReConfigMac = _FALSE;
+	Adapter->bNeedReConfigPhyRf = _FALSE;
+	Adapter->bNeedTurnOffAdapterInModeSwitchProcess = _FALSE;
+	Adapter->bNeedRecoveryAfterModeSwitch = _FALSE;
+	Adapter->bInModeSwitchProcess = _FALSE;
+	Adapter->bDoTurnOffPhyRf  = _FALSE;
+
+	if(BuddyAdapter != NULL)
+	{
+		Adapter->PreChangeAction = BuddyAdapter->PreChangeAction;
+	}
+	else
+	{
+		Adapter->PreChangeAction = MAXACTION;
+	}
+
+	//set dual mac role to set
+	Adapter->DualMacRoleToSet.BandType = pHalData->CurrentBandType92D;
+	Adapter->DualMacRoleToSet.BandSet = pHalData->BandSet92D;
+	Adapter->DualMacRoleToSet.RFType = pHalData->RF_Type;
+	Adapter->DualMacRoleToSet.macPhyMode = pHalData->MacPhyMode92D ;
+	Adapter->DualMacRoleToSet.bMasterOfDMSP = Adapter->bMasterOfDMSP;
+	Adapter->DualMacRoleToSet.bSlaveOfDMSP = Adapter->bSlaveOfDMSP;*/
+#endif //CONFIG_DUALMAC_CONCURRENT
+
+}
+
+u8 GetEEPROMSize8192D(PADAPTER Adapter)
+{
+	u8	size = 0;
+	u32	curRCR;
+
+	curRCR = rtw_read16(Adapter, REG_9346CR);
+	size = (curRCR & BOOT_FROM_EEPROM) ? 6 : 4; // 6: EEPROM used is 93C46, 4: boot from E-Fuse.
+	
+	MSG_8192C("EEPROM type is %s\n", size==4 ? "E-FUSE" : "93C46");
+	
+	return size;
+}
+
+void rtl8192d_HalSetBrateCfg(
+	IN PADAPTER		Adapter,
+	IN u8			*mBratesOS,
+	OUT u16			*pBrateCfg
+)
+{
+	u8	is_brate;
+	u8	i;
+	u8	brate;
+
+	for(i=0;i<NDIS_802_11_LENGTH_RATES_EX;i++)
+	{
+		is_brate = mBratesOS[i] & IEEE80211_BASIC_RATE_MASK;
+		brate = mBratesOS[i] & 0x7f;
+		if( is_brate )
+		{
+			switch(brate)
+			{
+				case IEEE80211_CCK_RATE_1MB:	*pBrateCfg |= RATE_1M;	break;
+				case IEEE80211_CCK_RATE_2MB:	*pBrateCfg |= RATE_2M;	break;
+				case IEEE80211_CCK_RATE_5MB:	*pBrateCfg |= RATE_5_5M;break;
+				case IEEE80211_CCK_RATE_11MB:	*pBrateCfg |= RATE_11M;	break;
+				case IEEE80211_OFDM_RATE_6MB:	*pBrateCfg |= RATE_6M;	break;
+				case IEEE80211_OFDM_RATE_9MB:	*pBrateCfg |= RATE_9M;	break;
+				case IEEE80211_OFDM_RATE_12MB:	*pBrateCfg |= RATE_12M;	break;
+				case IEEE80211_OFDM_RATE_18MB:	*pBrateCfg |= RATE_18M;	break;
+				case IEEE80211_OFDM_RATE_24MB:	*pBrateCfg |= RATE_24M;	break;
+				case IEEE80211_OFDM_RATE_36MB:	*pBrateCfg |= RATE_36M;	break;
+				case IEEE80211_OFDM_RATE_48MB:	*pBrateCfg |= RATE_48M;	break;
+				case IEEE80211_OFDM_RATE_54MB:	*pBrateCfg |= RATE_54M;	break;			
+			}
+		}
+
+	}
+}
+
+/************************************************************
+Function: Synchrosize for power off with dual mac
+*************************************************************/
+BOOLEAN
+PHY_CheckPowerOffFor8192D(
+	PADAPTER   Adapter
+)
+{
+	u8 u1bTmp;
+	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
+
+	if(pHalData->MacPhyMode92D==SINGLEMAC_SINGLEPHY)
+	{
+		u1bTmp = rtw_read8(Adapter, REG_MAC0);
+		rtw_write8(Adapter, REG_MAC0, u1bTmp&(~MAC0_ON));	
+		return _TRUE;	  
+	}
+
+	ACQUIRE_GLOBAL_MUTEX(GlobalMutexForPowerOnAndPowerOff);
+	if(pHalData->interfaceIndex == 0){
+		u1bTmp = rtw_read8(Adapter, REG_MAC0);
+		rtw_write8(Adapter, REG_MAC0, u1bTmp&(~MAC0_ON));	
+		u1bTmp = rtw_read8(Adapter, REG_MAC1);
+		u1bTmp &=MAC1_ON;
+
+	}
+	else{
+		u1bTmp = rtw_read8(Adapter, REG_MAC1);
+		rtw_write8(Adapter, REG_MAC1, u1bTmp&(~MAC1_ON));
+		u1bTmp = rtw_read8(Adapter, REG_MAC0);
+		u1bTmp &=MAC0_ON;
+	}
+
+	if(u1bTmp)
+	{
+		RELEASE_GLOBAL_MUTEX(GlobalMutexForPowerOnAndPowerOff);
+		return _FALSE;	
+	}
+
+	u1bTmp=rtw_read8(Adapter, REG_POWER_OFF_IN_PROCESS);
+	u1bTmp|=BIT7;
+	rtw_write8(Adapter, REG_POWER_OFF_IN_PROCESS, u1bTmp);
+
+	RELEASE_GLOBAL_MUTEX(GlobalMutexForPowerOnAndPowerOff);
+	return _TRUE;	
+}
+
+
+/************************************************************
+Function: Synchrosize for power off/on with dual mac
+*************************************************************/
+VOID
+PHY_SetPowerOnFor8192D(
+	PADAPTER	Adapter
+)
+{
+	PHAL_DATA_TYPE		pHalData = GET_HAL_DATA(Adapter);
+	u8	value8;
+	u16	i;
+
+	// notice fw know band status  0x81[1]/0x53[1] = 0: 5G, 1: 2G
+	if(pHalData->CurrentBandType92D==BAND_ON_2_4G)
+	{
+		value8 = rtw_read8(Adapter, (pHalData->interfaceIndex==0?REG_MAC0:REG_MAC1));
+		value8 |= BIT1;
+		rtw_write8(Adapter, (pHalData->interfaceIndex==0?REG_MAC0:REG_MAC1),value8);
+	}
+	else
+	{
+		value8 = rtw_read8(Adapter, (pHalData->interfaceIndex==0?REG_MAC0:REG_MAC1));
+		value8 &= (~BIT1);
+		rtw_write8(Adapter, (pHalData->interfaceIndex==0?REG_MAC0:REG_MAC1),value8);	
+	}
+
+	if(pHalData->MacPhyMode92D ==SINGLEMAC_SINGLEPHY)
+	{
+		value8 = rtw_read8(Adapter, REG_MAC0);		
+		rtw_write8(Adapter, REG_MAC0, value8|MAC0_ON);
+	}
+	else
+	{
+		ACQUIRE_GLOBAL_MUTEX(GlobalMutexForPowerOnAndPowerOff);
+		if(pHalData->interfaceIndex == 0)
+		{
+			value8 = rtw_read8(Adapter, REG_MAC0);		
+			rtw_write8(Adapter, REG_MAC0, value8|MAC0_ON);
+		}
+		else	
+		{
+			value8 = rtw_read8(Adapter, REG_MAC1);
+			rtw_write8(Adapter, REG_MAC1, value8|MAC1_ON);
+		}
+		value8 = rtw_read8(Adapter, REG_POWER_OFF_IN_PROCESS);
+		RELEASE_GLOBAL_MUTEX(GlobalMutexForPowerOnAndPowerOff);
+
+		for(i=0;i<200;i++)
+		{
+			if((value8&BIT7) == 0)
+			{
+				break;
+			}
+			else
+			{
+				rtw_udelay_os(500);
+				ACQUIRE_GLOBAL_MUTEX(GlobalMutexForPowerOnAndPowerOff);
+				value8 = rtw_read8(Adapter, REG_POWER_OFF_IN_PROCESS);
+				RELEASE_GLOBAL_MUTEX(GlobalMutexForPowerOnAndPowerOff);
+			}
+		}
+
+		if(i==200)
+			DBG_8192C("Another mac power off over time \n");
+	}
+}
+
+void rtl8192d_free_hal_data(_adapter * padapter)
+{
+_func_enter_;
+
+	DBG_8192C("===== rtl8192du_free_hal_data =====\n");
+
+	if(padapter->HalData)
+		rtw_mfree(padapter->HalData, sizeof(HAL_DATA_TYPE));
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	GlobalFirstConfigurationForNormalChip = _TRUE;
+#endif
+_func_exit_;
+}
+
+//===========================================================
+//				Efuse related code
+//===========================================================
+enum{
+		VOLTAGE_V25						= 0x03,
+		LDOE25_SHIFT						= 28 ,
+	};
+
+static VOID
+rtl8192d_EfusePowerSwitch(
+	IN	PADAPTER	pAdapter,
+	IN	u8		bWrite,
+	IN	u8		PwrState)
+{
+	u8	tempval;
+	u16	tmpV16;
+
+	if (PwrState == _TRUE)
+	{
+		// 1.2V Power: From VDDON with Power Cut(0x0000h[15]), defualt valid
+		tmpV16 = rtw_read16(pAdapter, REG_SYS_ISO_CTRL);
+		if (!(tmpV16 & PWC_EV12V)) {
+			tmpV16 |= PWC_EV12V ;
+			 rtw_write16(pAdapter, REG_SYS_ISO_CTRL, tmpV16);
+		}
+		// Reset: 0x0000h[28], default valid
+		tmpV16 = rtw_read16(pAdapter, REG_SYS_FUNC_EN);
+		if (!(tmpV16 & FEN_ELDR)) {
+			tmpV16 |= FEN_ELDR ;
+			rtw_write16(pAdapter,REG_SYS_FUNC_EN,tmpV16);
+		}
+
+		// Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock from ANA, default valid
+		tmpV16 = rtw_read16(pAdapter, REG_SYS_CLKR);
+		if ( (!(tmpV16 & LOADER_CLK_EN)) || (!(tmpV16 & ANA8M)) ){
+			tmpV16 |= (LOADER_CLK_EN | ANA8M);
+			rtw_write16(pAdapter, REG_SYS_CLKR, tmpV16);
+		}
+
+		if(bWrite == _TRUE){
+			// Enable LDO 2.5V before read/write action
+			tempval = rtw_read8(pAdapter, EFUSE_TEST+3);
+			tempval &= 0x0F;
+			tempval |= (VOLTAGE_V25 << 4);
+			rtw_write8(pAdapter, EFUSE_TEST+3, (tempval | 0x80));
+		}
+	}
+	else
+	{
+		if (bWrite == _TRUE) {
+			// Disable LDO 2.5V after read/write action
+			tempval = rtw_read8(pAdapter, EFUSE_TEST+3);
+			rtw_write8(pAdapter, EFUSE_TEST+3, (tempval & 0x7F));
+		}
+	}
+}
+
+static VOID
+ReadEFuse_RTL8192D(
+	PADAPTER	Adapter,
+	u8			efuseType,
+	u16			_offset,
+	u16 			_size_byte,
+	u8      		*pbuf,
+	IN BOOLEAN	bPseudoTest
+	)
+{
+	u8  	efuseTbl[EFUSE_MAP_LEN];
+	u8  	rtemp8[1];
+	u16 	eFuse_Addr = 0;
+	u8  	offset, wren;
+	u16  i, j;
+	u16 	eFuseWord[EFUSE_MAX_SECTION][EFUSE_MAX_WORD_UNIT];
+	u16	efuse_utilized = 0;
+	u8	efuse_usage = 0;
+	u8	u1temp = 0;
+
+	//
+	// Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10.
+	//
+	if((_offset + _size_byte)>EFUSE_MAP_LEN)
+	{// total E-Fuse table is 128bytes
+		DBG_8192C("ReadEFuse(): Invalid offset(%#x) with read bytes(%#x)!!\n",_offset, _size_byte);
+		return;
+	}
+
+	// 0. Refresh efuse init map as all oxFF.
+	for (i = 0; i < EFUSE_MAX_SECTION; i++)
+		for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++)
+			eFuseWord[i][j] = 0xFFFF;
+
+
+	//
+	// 1. Read the first byte to check if efuse is empty!!!
+	// 
+	//
+	ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);	
+	if(*rtemp8 != 0xFF)
+	{
+		efuse_utilized++;
+		//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d\n", eFuse_Addr));
+		eFuse_Addr++;
+	}
+	else
+	{
+		//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("EFUSE is empty efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8));
+		return;
+	}
+
+	//
+	// 2. Read real efuse content. Filter PG header and every section data.
+	//
+	while((*rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN))
+	{
+		// Check PG header for section num.
+		if((*rtemp8 & 0x1F ) == 0x0F)		//extended header
+		{
+		
+			//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x *rtemp&0xE0 0x%x\n", u1temp, *rtemp8 & 0xE0));
+			
+			u1temp =( (*rtemp8 & 0xE0) >> 5);
+
+			//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x \n", u1temp));
+			
+			ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
+
+			//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8));	
+			
+			if((*rtemp8 & 0x0F) == 0x0F)
+			{
+				eFuse_Addr++;			
+				ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); 
+				
+				if(*rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN))
+				{
+					eFuse_Addr++;				
+				}				
+				continue;
+			}
+			else
+			{
+				offset = ((*rtemp8 & 0xF0) >> 1) | u1temp;
+				wren = (*rtemp8 & 0x0F);
+				eFuse_Addr++;				
+			}
+		}
+		else
+		{
+			offset = ((*rtemp8 >> 4) & 0x0f);
+			wren = (*rtemp8 & 0x0f);			
+		}
+
+		if(offset < EFUSE_MAX_SECTION)
+		{
+			// Get word enable value from PG header
+			//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Offset-%d Worden=%x\n", offset, wren));
+
+			for(i=0; i<EFUSE_MAX_WORD_UNIT; i++)
+			{
+				// Check word enable condition in the section				
+				if(!(wren & 0x01))
+				{
+					//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d\n", eFuse_Addr));
+					ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
+					eFuse_Addr++;
+					//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Data=0x%x\n", *rtemp8));
+					efuse_utilized++;
+					eFuseWord[offset][i] = (*rtemp8 & 0xff);
+					
+
+					if(eFuse_Addr >= EFUSE_REAL_CONTENT_LEN) 
+						break;
+
+					//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d\n", eFuse_Addr));
+					ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
+					eFuse_Addr++;
+					//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Data=0x%x\n", *rtemp8));
+
+					efuse_utilized++;
+					eFuseWord[offset][i] |= (((u16)*rtemp8 << 8) & 0xff00);
+
+					if(eFuse_Addr >= EFUSE_REAL_CONTENT_LEN) 
+						break;
+				}
+				
+				wren >>= 1;
+				
+			}
+		}
+
+		// Read next PG header
+		ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
+		//RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d rtemp 0x%x\n", eFuse_Addr, *rtemp8));
+		
+		if(*rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN))
+		{
+			efuse_utilized++;
+			eFuse_Addr++;
+		}
+	}
+
+	//
+	// 3. Collect 16 sections and 4 word unit into Efuse map.
+	//
+	for(i=0; i<EFUSE_MAX_SECTION; i++)
+	{
+		for(j=0; j<EFUSE_MAX_WORD_UNIT; j++)
+		{
+			efuseTbl[(i*8)+(j*2)]=(eFuseWord[i][j] & 0xff);
+			efuseTbl[(i*8)+((j*2)+1)]=((eFuseWord[i][j] >> 8) & 0xff);
+		}
+	}
+
+	//
+	// 4. Copy from Efuse map to output pointer memory!!!
+	//
+	for(i=0; i<_size_byte; i++)
+	{		
+		pbuf[i] = efuseTbl[_offset+i];
+	}
+
+	//
+	// 5. Calculate Efuse utilization.
+	//
+	//priv->EfuseUsedBytes = efuse_utilized;
+	efuse_usage = (u8)((efuse_utilized*100)/EFUSE_REAL_CONTENT_LEN);
+	//priv->EfuseUsedPercentage = efuse_usage;	
+	Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_EFUSE_BYTES, (u8*)&efuse_utilized);
+	//Adapter->HalFunc.SetHwRegHandler(dev, HW_VAR_EFUSE_USAGE, (u8*)&efuse_usage);
+}
+
+static VOID
+hal_EfuseUpdateNormalChipVersion_92D(
+	IN	PADAPTER	Adapter
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	VERSION_8192D	ChipVer = pHalData->VersionID;
+	u8	CutValue[2];
+	u16	ChipValue=0;
+		
+	ReadEFuseByte(Adapter,EEPROME_CHIP_VERSION_H,&CutValue[1], _FALSE);
+	ReadEFuseByte(Adapter,EEPROME_CHIP_VERSION_L,&CutValue[0], _FALSE);
+
+	ChipValue= (CutValue[1]<<8)|CutValue[0];
+	switch(ChipValue){
+		case 0xAA55:
+			//ChipVer |= CHIP_92D_C_CUT;
+			ChipVer = (VERSION_8192D)( ChipVer | C_CUT_VERSION);
+			MSG_8192C("C-CUT!!!\n");
+			break;
+		case 0x9966:
+			//ChipVer |= CHIP_92D_D_CUT;
+			ChipVer = (VERSION_8192D)( ChipVer | D_CUT_VERSION);
+			MSG_8192C("D-CUT!!!\n");
+			break;
+		case 0xCC33:
+			ChipVer = (VERSION_8192D)( ChipVer | E_CUT_VERSION);
+			MSG_8192C("E-CUT!!!\n");
+			break;
+		default:
+			//ChipVer |= CHIP_92D_D_CUT;
+			ChipVer = (VERSION_8192D)( ChipVer | D_CUT_VERSION);
+			MSG_8192C("Unkown CUT!\n");
+			break; 
+	}
+
+	pHalData->VersionID = ChipVer;
+}
+
+static BOOLEAN 
+hal_EfuseMacMode_ISVS_92D(
+     IN     PADAPTER     Adapter
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8	PartNo;
+	BOOLEAN bResult = _FALSE;
+	// 92D VS not support dual mac mode  
+	if(IS_NORMAL_CHIP92D(pHalData->VersionID))
+	{
+		ReadEFuseByte(Adapter,EEPROM_DEF_PART_NO,&PartNo, _FALSE);	
+		//RT_TRACE(COMP_INIT, DBG_LOUD, ("92D efuse byte 1021 content :%d \n",PartNo));
+		
+		if((((PartNo & 0xc0) ==  PARTNO_92D_NIC)&&((PartNo & 0x0c) == PARTNO_SINGLE_BAND_VS))||
+			(((PartNo & 0xF0) == PARTNO_92D_NIC_REMARK) &&((PartNo & 0x0F) == PARTNO_SINGLE_BAND_VS_REMARK)))
+		{
+			//RT_TRACE(COMP_INIT, DBG_SERIOUS, ("92D VS !\n"));
+			bResult = _TRUE;
+		}
+		else if(PartNo == 0x00)
+		{
+			ReadEFuseByte(Adapter,EEPROM_DEF_PART_NO+1,&PartNo, _FALSE);			
+			//RT_TRACE(COMP_INIT, DBG_LOUD, ("92D efuse byte 1022 content :%d \n",PartNo));
+			if((((PartNo & 0xc0) ==  PARTNO_92D_NIC)&&((PartNo & 0x0c) == PARTNO_SINGLE_BAND_VS))||
+				(((PartNo & 0xF0) == PARTNO_92D_NIC_REMARK) &&((PartNo & 0x0F) == PARTNO_SINGLE_BAND_VS_REMARK)))
+			{
+				//RT_TRACE(COMP_INIT, DBG_SERIOUS, ("92D VS !\n"));
+				bResult = _TRUE;
+			}			
+		}
+	}
+	
+	return bResult;
+}
+
+static VOID
+rtl8192d_ReadEFuse(
+	PADAPTER	Adapter,
+	u8			efuseType,
+	u16			_offset,
+	u16 			_size_byte,
+	u8      		*pbuf,
+	IN BOOLEAN	bPseudoTest
+	)
+{
+	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
+
+	ReadEFuse_RTL8192D(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest);
+
+	hal_EfuseUpdateNormalChipVersion_92D(Adapter);
+	pHalData->bIsVS = hal_EfuseMacMode_ISVS_92D(Adapter);
+}
+
+static VOID
+rtl8192d_EFUSE_GetEfuseDefinition(
+	IN		PADAPTER	pAdapter,
+	IN		u8		efuseType,
+	IN		u8		type,
+	OUT		PVOID		*pOut,
+	IN		BOOLEAN		bPseudoTest
+	)
+{
+	switch(type)
+	{
+		case TYPE_EFUSE_MAX_SECTION:
+			{
+				u8	*pMax_section;
+				pMax_section = (u8 *)pOut;
+				*pMax_section = EFUSE_MAX_SECTION;
+			}
+			break;
+		case TYPE_EFUSE_REAL_CONTENT_LEN:
+			{
+				u16 *pu2Tmp;
+				pu2Tmp = (u16 *)pOut;
+				*pu2Tmp = EFUSE_REAL_CONTENT_LEN;
+			}
+			break;
+		case TYPE_AVAILABLE_EFUSE_BYTES_BANK:
+			{
+				u16	*pu2Tmp;
+				pu2Tmp = (u16 *)pOut;
+				*pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN-EFUSE_OOB_PROTECT_BYTES);
+			}
+			break;
+		case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL:
+			{
+				u16 *pu2Tmp;
+				pu2Tmp = (u16 *)pOut;
+				*pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN-EFUSE_OOB_PROTECT_BYTES);
+			}
+			break;
+		case TYPE_EFUSE_MAP_LEN:
+			{
+				u16 *pu2Tmp;
+				pu2Tmp = (u16 *)pOut;
+				*pu2Tmp = (u16)EFUSE_MAP_LEN;
+			}
+			break;
+		case TYPE_EFUSE_PROTECT_BYTES_BANK:
+			{
+				u8 *pu1Tmp;
+				pu1Tmp = (u8 *)pOut;
+				*pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES);
+			}
+			break;
+		default:
+			{
+				u8 *pu1Tmp;
+				pu1Tmp = (u8 *)pOut;
+				*pu1Tmp = 0;
+			}
+			break;
+	}
+}
+
+static u16
+rtl8192d_EfuseGetCurrentSize(
+	IN	PADAPTER	pAdapter,
+	IN	u8			efuseType,
+	IN	BOOLEAN		bPseudoTest)
+{
+	int	bContinual = _TRUE;
+
+	u16	efuse_addr = 0;
+	u8	hoffset=0,hworden=0;	
+	u8	efuse_data,word_cnts=0;
+		
+	while (	bContinual && 
+			efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest) && 
+			(efuse_addr  < EFUSE_REAL_CONTENT_LEN) )
+	{			
+		if(efuse_data!=0xFF)
+		{					
+			if((efuse_data&0x1F) == 0x0F)		//extended header
+			{
+				hoffset = efuse_data;
+				efuse_addr++;
+				efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest);
+				if((efuse_data & 0x0F) == 0x0F)
+				{
+					efuse_addr++;
+					continue;
+				}
+				else
+				{
+					hoffset = ((hoffset & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
+					hworden = efuse_data & 0x0F;
+				}
+			}		
+			else
+			{
+				hoffset = (efuse_data>>4) & 0x0F;
+				hworden =  efuse_data & 0x0F;									
+			}
+			word_cnts = Efuse_CalculateWordCnts(hworden);
+			//read next header							
+			efuse_addr = efuse_addr + (word_cnts*2)+1;						
+		}
+		else
+		{
+			bContinual = _FALSE ;			
+		}
+	}
+
+	return efuse_addr;
+	
+}
+
+static int
+rtl8192d_Efuse_PgPacketRead(	IN	PADAPTER	pAdapter,
+					IN	u8			offset,
+					IN	u8			*data,
+					IN	BOOLEAN		bPseudoTest)
+{	
+	u8	ReadState = PG_STATE_HEADER;	
+	
+	int	bContinual = _TRUE;
+	int	bDataEmpty = _TRUE ;	
+
+	u8	efuse_data,word_cnts=0;
+	u16	efuse_addr = 0;
+	u8	hoffset=0,hworden=0;	
+	u8	tmpidx=0;
+	u8	tmpdata[8];
+	u8	tmp_header = 0;
+	
+	if(data==NULL)	return _FALSE;
+	if(offset>=EFUSE_MAX_SECTION)		return _FALSE;	
+	
+
+	_rtw_memset((PVOID)data, 0xff, sizeof(u8)*PGPKT_DATA_SIZE);
+	_rtw_memset((PVOID)tmpdata, 0xff, sizeof(u8)*PGPKT_DATA_SIZE);
+	
+	//RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("efuse_PgPacketRead-1\n"), data, 8);
+	
+	//
+	// <Roger_TODO> Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP.
+	// Skip dummy parts to prevent unexpected data read from Efuse.
+	// By pass right now. 2009.02.19.
+	//
+	while(bContinual && (efuse_addr  < EFUSE_REAL_CONTENT_LEN) )
+	{			
+		//-------  Header Read -------------
+		if(ReadState & PG_STATE_HEADER)
+		{
+			if(efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest)&&(efuse_data!=0xFF))
+			{
+				if((efuse_data & 0x1F) == 0x0F)
+				{
+					tmp_header = efuse_data;
+					efuse_addr++;
+					efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest);
+					if((efuse_data & 0x0F) != 0x0F)
+					{
+						hoffset = ((tmp_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
+						hworden = efuse_data & 0x0F;						
+					}
+					else
+					{
+						efuse_addr++;
+						continue;
+					}
+					
+				}
+				else	
+				{
+					hoffset = (efuse_data>>4) & 0x0F;
+					hworden =  efuse_data & 0x0F;									
+				}
+				word_cnts = Efuse_CalculateWordCnts(hworden);
+				bDataEmpty = _TRUE ;
+
+				if(hoffset==offset){
+					for(tmpidx = 0;tmpidx< word_cnts*2 ;tmpidx++){
+						if(efuse_OneByteRead(pAdapter, efuse_addr+1+tmpidx ,&efuse_data, bPseudoTest) ){
+							tmpdata[tmpidx] = efuse_data;
+							if(efuse_data!=0xff){						
+								bDataEmpty = _FALSE;
+							}
+						}					
+					}
+					if(bDataEmpty==_FALSE){
+						ReadState = PG_STATE_DATA;							
+					}else{//read next header							
+						efuse_addr = efuse_addr + (word_cnts*2)+1;
+						ReadState = PG_STATE_HEADER; 
+					}
+				}
+				else{//read next header	
+					efuse_addr = efuse_addr + (word_cnts*2)+1;
+					ReadState = PG_STATE_HEADER; 
+				}
+				
+			}
+			else{
+				bContinual = _FALSE ;
+			}
+		}		
+		//-------  Data section Read -------------
+		else if(ReadState & PG_STATE_DATA)
+		{
+			efuse_WordEnableDataRead(hworden,tmpdata,data);
+			efuse_addr = efuse_addr + (word_cnts*2)+1;
+			ReadState = PG_STATE_HEADER; 
+		}
+		
+	}			
+	//efuse_reg_ctrl(pAdapter,_FALSE);//power off
+	
+	//RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("efuse_PgPacketRead-2\n"), data, 8);
+	
+	if(	(data[0]==0xff) &&(data[1]==0xff) && (data[2]==0xff)  && (data[3]==0xff) &&
+		(data[4]==0xff) &&(data[5]==0xff) && (data[6]==0xff)  && (data[7]==0xff))
+		return _FALSE;
+	else
+		return _TRUE;
+
+}
+
+static int 
+rtl8192d_Efuse_PgPacketWrite(IN	PADAPTER	pAdapter, 
+					IN	u8 			offset,
+					IN	u8			word_en,
+					IN	u8			*data,
+					IN	BOOLEAN		bPseudoTest)
+{
+	u8	WriteState = PG_STATE_HEADER;		
+
+	int	bContinual = _TRUE,bDataEmpty=_TRUE, bResult = _TRUE;
+	u16	efuse_addr = 0;
+	u8	efuse_data;
+
+	u8	pg_header = 0, pg_header_temp = 0;
+
+	u8	tmp_word_cnts=0,target_word_cnts=0;
+	u8	tmp_header,match_word_en,tmp_word_en;
+
+	PGPKT_STRUCT target_pkt;	
+	PGPKT_STRUCT tmp_pkt=
+	{
+		.offset=0,
+		.word_en=0,
+		.data={0,0,0,0,0,0,0,0},
+		.word_cnts=0
+	};
+	
+	u8	originaldata[sizeof(u8)*8];
+	u8	tmpindex = 0,badworden = 0x0F;
+
+	static int	repeat_times = 0;
+
+	BOOLEAN		bExtendedHeader = _FALSE;
+	u8	efuseType=EFUSE_WIFI;
+
+	//
+	// <Roger_Notes> Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP.
+	// So we have to prevent unexpected data string connection, which will cause
+	// incorrect data auto-load from HW. The total size is equal or smaller than 498bytes
+	// (i.e., offset 0~497, and dummy 1bytes) expected after CP test.
+	// 2009.02.19.
+	//
+	if( Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest) >= (EFUSE_REAL_CONTENT_LEN-EFUSE_OOB_PROTECT_BYTES))
+	{
+		//RTPRINT(FEEPROM, EFUSE_PG, ("efuse_PgPacketWrite error \n"));
+		return _FALSE;
+	}
+
+	// Init the 8 bytes content as 0xff
+	target_pkt.offset = offset;
+	target_pkt.word_en= word_en;
+
+	//RTPRINT(FEEPROM, EFUSE_PG, ("efuse_PgPacketWrite target offset 0x%x word_en 0x%x \n", target_pkt.offset, target_pkt.word_en));
+	
+
+	_rtw_memset((PVOID)target_pkt.data, 0xFF, sizeof(u8)*8);
+	
+	efuse_WordEnableDataRead(word_en, data, target_pkt.data);
+	target_word_cnts = Efuse_CalculateWordCnts(target_pkt.word_en);
+
+	//efuse_reg_ctrl(pAdapter,_TRUE);//power on
+	//RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE Power ON\n"));
+
+	//
+	// <Roger_Notes> Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP.
+	// So we have to prevent unexpected data string connection, which will cause
+	// incorrect data auto-load from HW. Dummy 1bytes is additional.
+	// 2009.02.19.
+	//
+	while( bContinual && (efuse_addr  < (EFUSE_REAL_CONTENT_LEN-EFUSE_OOB_PROTECT_BYTES)) )
+	{
+		
+		if(WriteState==PG_STATE_HEADER)
+		{	
+			bDataEmpty=_TRUE;
+			badworden = 0x0F;		
+			//************  so *******************
+			//RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE PG_STATE_HEADER\n"));
+			if (	efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest) &&
+				(efuse_data!=0xFF))
+			{ 	
+				if((efuse_data&0x1F) == 0x0F)		//extended header
+				{
+					tmp_header = efuse_data;
+					efuse_addr++;
+					efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest);
+					if((efuse_data & 0x0F) == 0x0F)	//wren fail
+					{
+						efuse_addr++;
+						continue;
+					}
+					else
+					{
+						tmp_pkt.offset = ((tmp_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
+						tmp_pkt.word_en = efuse_data & 0x0F;
+					}
+				}
+				else
+				{
+					tmp_header  =  efuse_data;					
+					tmp_pkt.offset 	= (tmp_header>>4) & 0x0F;
+					tmp_pkt.word_en = tmp_header & 0x0F;					
+				}				
+				tmp_word_cnts =  Efuse_CalculateWordCnts(tmp_pkt.word_en);
+
+				//RTPRINT(FEEPROM, EFUSE_PG, ("section offset 0x%x worden 0x%x\n", tmp_pkt.offset, tmp_pkt.word_en));
+
+				//************  so-1 *******************
+				if(tmp_pkt.offset  != target_pkt.offset)
+				{
+					efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet
+#if (EFUSE_ERROE_HANDLE == 1)
+					WriteState = PG_STATE_HEADER;
+#endif
+				}
+				else		//write the same offset
+				{	
+					//RTPRINT(FEEPROM, EFUSE_PG, ("efuse_PgPacketWrite section offset the same\n"));
+				
+					//************  so-2 *******************
+					for(tmpindex=0 ; tmpindex<(tmp_word_cnts*2) ; tmpindex++)
+					{
+						if(efuse_OneByteRead(pAdapter, (efuse_addr+1+tmpindex) ,&efuse_data, bPseudoTest)&&(efuse_data != 0xFF)){
+							bDataEmpty = _FALSE;	
+						}
+					}	
+					//************  so-2-1 *******************
+					if(bDataEmpty == _FALSE)
+					{		
+						//RTPRINT(FEEPROM, EFUSE_PG, ("efuse_PgPacketWrite section offset the same and data is NOT empty\n"));
+					
+						efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet										
+#if (EFUSE_ERROE_HANDLE == 1)
+						WriteState=PG_STATE_HEADER;
+#endif
+					}
+					else
+					{//************  so-2-2 *******************
+
+						//RTPRINT(FEEPROM, EFUSE_PG, ("efuse_PgPacketWrite section data empty\n"));
+					
+						match_word_en = 0x0F;			//same bit as original wren
+						if(   !( (target_pkt.word_en&BIT0)|(tmp_pkt.word_en&BIT0)  ))
+						{
+							 match_word_en &= (~BIT0);
+						}	
+						if(   !( (target_pkt.word_en&BIT1)|(tmp_pkt.word_en&BIT1)  ))
+						{
+							 match_word_en &= (~BIT1);
+						}
+						if(   !( (target_pkt.word_en&BIT2)|(tmp_pkt.word_en&BIT2)  ))
+						{
+							 match_word_en &= (~BIT2);
+						}
+						if(   !( (target_pkt.word_en&BIT3)|(tmp_pkt.word_en&BIT3)  ))
+						{
+							 match_word_en &= (~BIT3);
+						}					
+												
+						//************  so-2-2-A *******************
+						if((match_word_en&0x0F)!=0x0F)
+						{							
+							badworden = Efuse_WordEnableDataWrite(pAdapter,efuse_addr+1, tmp_pkt.word_en ,target_pkt.data, bPseudoTest);
+							
+							//************  so-2-2-A-1 *******************
+							//############################
+							if(0x0F != (badworden&0x0F))
+							{														
+								u8	reorg_offset = offset;
+								u8	reorg_worden=badworden;								
+								Efuse_PgPacketWrite(pAdapter, reorg_offset, reorg_worden, target_pkt.data, bPseudoTest);	
+							}	
+							//############################						
+
+							tmp_word_en = 0x0F;		//not the same bit as original wren
+							if(  (target_pkt.word_en&BIT0)^(match_word_en&BIT0)  )
+							{
+								tmp_word_en &= (~BIT0);
+							}
+							if(   (target_pkt.word_en&BIT1)^(match_word_en&BIT1) )
+							{
+								tmp_word_en &=  (~BIT1);
+							}
+							if(   (target_pkt.word_en&BIT2)^(match_word_en&BIT2) )
+							{
+								tmp_word_en &= (~BIT2);
+							}						
+							if(   (target_pkt.word_en&BIT3)^(match_word_en&BIT3) )
+							{
+								tmp_word_en &=(~BIT3);
+							}							
+						
+							//************  so-2-2-A-2 *******************	
+							if((tmp_word_en&0x0F)!=0x0F){
+								//reorganize other pg packet						
+//								efuse_addr = efuse_addr + (2*tmp_word_cnts) +1;//next pg packet addr							
+								efuse_addr = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest);
+								//===========================
+								target_pkt.offset = offset;
+								target_pkt.word_en= tmp_word_en;					
+								//===========================
+							}else{								
+								bContinual = _FALSE;
+							}
+#if (EFUSE_ERROE_HANDLE == 1)
+							WriteState=PG_STATE_HEADER;
+							repeat_times++;
+							if(repeat_times>EFUSE_REPEAT_THRESHOLD_){
+								bContinual = _FALSE;
+								bResult = _FALSE;
+							}
+#endif
+						}
+						else{//************  so-2-2-B *******************
+							//reorganize other pg packet						
+							efuse_addr = efuse_addr + (2*tmp_word_cnts) +1;//next pg packet addr							
+							//===========================
+							target_pkt.offset = offset;
+							target_pkt.word_en= target_pkt.word_en;					
+							//===========================			
+#if (EFUSE_ERROE_HANDLE == 1)
+							WriteState=PG_STATE_HEADER;
+#endif
+						}		
+					}				
+				}				
+				//RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE PG_STATE_HEADER-1\n"));
+			}
+			else		//************  s1: header == oxff  *******************
+			{
+				bExtendedHeader = _FALSE;
+			
+				if(target_pkt.offset >= EFUSE_MAX_SECTION_BASE)
+				{
+					pg_header = ((target_pkt.offset &0x07) << 5) | 0x0F;
+
+					//RTPRINT(FEEPROM, EFUSE_PG, ("efuse_PgPacketWrite extended pg_header[2:0] |0x0F 0x%x \n", pg_header));
+					
+					efuse_OneByteWrite(pAdapter,efuse_addr, pg_header, bPseudoTest);
+					efuse_OneByteRead(pAdapter,efuse_addr, &tmp_header, bPseudoTest);							
+
+					while(tmp_header == 0xFF)
+					{		
+						//RTPRINT(FEEPROM, EFUSE_PG, ("efuse_PgPacketWrite extended pg_header[2:0] wirte fail \n"));
+					
+						repeat_times++; 	
+					
+						if(repeat_times>EFUSE_REPEAT_THRESHOLD_){
+							bContinual = _FALSE;
+							bResult = _FALSE;
+							efuse_addr++;
+							break;
+						}		
+						efuse_OneByteWrite(pAdapter,efuse_addr, pg_header, bPseudoTest);
+						efuse_OneByteRead(pAdapter,efuse_addr, &tmp_header, bPseudoTest);																									
+					}
+					
+					if(!bContinual)
+						break;
+
+					if(tmp_header == pg_header)
+					{
+						efuse_addr++;
+						pg_header_temp = pg_header;
+						pg_header = ((target_pkt.offset & 0x78) << 1 ) | target_pkt.word_en;
+
+						//RTPRINT(FEEPROM, EFUSE_PG, ("efuse_PgPacketWrite extended pg_header[6:3] | worden 0x%x word_en 0x%x \n", pg_header));
+						
+						efuse_OneByteWrite(pAdapter,efuse_addr, pg_header, bPseudoTest);
+						efuse_OneByteRead(pAdapter,efuse_addr, &tmp_header, bPseudoTest);													
+
+						while(tmp_header == 0xFF)
+						{											
+							repeat_times++;		
+
+							if(repeat_times>EFUSE_REPEAT_THRESHOLD_){
+								bContinual = _FALSE;
+								bResult = _FALSE;
+								break;
+							}							
+							efuse_OneByteWrite(pAdapter,efuse_addr, pg_header, bPseudoTest);
+							efuse_OneByteRead(pAdapter,efuse_addr, &tmp_header, bPseudoTest);																										
+						}
+
+						if(!bContinual)
+							break;
+
+						if((tmp_header & 0x0F) == 0x0F)	//wren PG fail
+						{
+							repeat_times++;		
+
+							if(repeat_times>EFUSE_REPEAT_THRESHOLD_){
+								bContinual = _FALSE;
+								bResult = _FALSE;
+								break;
+							}							
+							else
+							{
+								efuse_addr++;
+								continue;
+							}
+						}
+						else if(pg_header != tmp_header)	//offset PG fail						
+						{
+							bExtendedHeader = _TRUE;
+							tmp_pkt.offset = ((pg_header_temp & 0xE0) >> 5) | ((tmp_header & 0xF0) >> 1);
+							tmp_pkt.word_en=  tmp_header & 0x0F;					
+							tmp_word_cnts =  Efuse_CalculateWordCnts(tmp_pkt.word_en);							
+						}
+					}
+					else if ((tmp_header & 0x1F) == 0x0F)		//wrong extended header
+					{
+						efuse_addr+=2;
+						continue;						
+					}
+				}
+				else
+				{
+					pg_header = ((target_pkt.offset << 4)&0xf0) |target_pkt.word_en;
+					efuse_OneByteWrite(pAdapter,efuse_addr, pg_header, bPseudoTest);
+					efuse_OneByteRead(pAdapter,efuse_addr, &tmp_header, bPseudoTest);					
+				}
+		
+				if(tmp_header == pg_header)
+				{ //************  s1-1*******************								
+					WriteState = PG_STATE_DATA;						
+				}				
+#if (EFUSE_ERROE_HANDLE == 1)
+				else if(tmp_header == 0xFF){//************  s1-3: if Write or read func doesn't work *******************		
+					//efuse_addr doesn't change
+					WriteState = PG_STATE_HEADER;					
+					repeat_times++;
+					if(repeat_times>EFUSE_REPEAT_THRESHOLD_){
+						bContinual = _FALSE;
+						bResult = _FALSE;
+					}
+				}
+#endif
+				else
+				{//************  s1-2 : fixed the header procedure *******************							
+					if(!bExtendedHeader)
+					{
+						tmp_pkt.offset = (tmp_header>>4) & 0x0F;
+						tmp_pkt.word_en=  tmp_header & 0x0F;					
+						tmp_word_cnts =  Efuse_CalculateWordCnts(tmp_pkt.word_en);
+					}
+																											
+					//************  s1-2-A :cover the exist data *******************
+					//memset(originaldata,0xff,sizeof(UINT8)*8);
+					_rtw_memset((PVOID)originaldata, 0xff, sizeof(u8)*8);
+					
+					if(Efuse_PgPacketRead( pAdapter, tmp_pkt.offset,originaldata, bPseudoTest))
+					{	//check if data exist 					
+						//efuse_reg_ctrl(pAdapter,_TRUE);//power on
+						badworden = Efuse_WordEnableDataWrite(pAdapter,efuse_addr+1,tmp_pkt.word_en,originaldata, bPseudoTest);	
+						//############################
+						if(0x0F != (badworden&0x0F))
+						{														
+							u8	reorg_offset = tmp_pkt.offset;
+							u8	reorg_worden=badworden;								
+							Efuse_PgPacketWrite(pAdapter,reorg_offset,reorg_worden,originaldata, bPseudoTest);
+							efuse_addr = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest);
+						}
+						//############################
+						else{
+							efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet							
+						}
+					}
+					 //************  s1-2-B: wrong address*******************
+					else
+					{
+						efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet
+					}
+
+#if (EFUSE_ERROE_HANDLE == 1)
+					WriteState=PG_STATE_HEADER;	
+					repeat_times++;
+					if(repeat_times>EFUSE_REPEAT_THRESHOLD_){
+						bContinual = _FALSE;
+						bResult = _FALSE;
+					}
+#endif
+					
+					//RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE PG_STATE_HEADER-2\n"));
+				}
+
+			}
+
+		}
+		//write data state
+		else if(WriteState==PG_STATE_DATA) 
+		{	//************  s1-1  *******************
+			//RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE PG_STATE_DATA\n"));
+			badworden = 0x0f;
+			badworden = Efuse_WordEnableDataWrite(pAdapter,efuse_addr+1,target_pkt.word_en,target_pkt.data , bPseudoTest);	
+			if((badworden&0x0F)==0x0F)
+			{ //************  s1-1-A *******************
+				bContinual = _FALSE;
+			}
+			else
+			{//reorganize other pg packet //************  s1-1-B *******************
+				efuse_addr = efuse_addr + (2*target_word_cnts) +1;//next pg packet addr
+										
+				//===========================
+				target_pkt.offset = offset;
+				target_pkt.word_en= badworden;		
+				target_word_cnts =  Efuse_CalculateWordCnts(target_pkt.word_en); 
+				//===========================			
+#if (EFUSE_ERROE_HANDLE == 1)
+				WriteState=PG_STATE_HEADER;	
+				repeat_times++;
+				if(repeat_times>EFUSE_REPEAT_THRESHOLD_){
+					bContinual = _FALSE;
+					bResult = _FALSE;
+				}
+#endif
+				//RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE PG_STATE_HEADER-3\n"));
+			}
+		}
+	}
+
+	if(efuse_addr  >= (EFUSE_REAL_CONTENT_LEN-EFUSE_OOB_PROTECT_BYTES))
+	{
+		//RT_TRACE(COMP_EFUSE, DBG_LOUD, ("efuse_PgPacketWrite(): efuse_addr(%#x) Out of size!!\n", efuse_addr));
+	}
+	//efuse_reg_ctrl(pAdapter,_FALSE);//power off
+	
+	return _TRUE;
+}
+
+static u8
+rtl8192d_Efuse_WordEnableDataWrite(	IN	PADAPTER	pAdapter,
+							IN	u16		efuse_addr,
+							IN	u8		word_en, 
+							IN	u8		*data,
+							IN	BOOLEAN		bPseudoTest)
+{		
+	u16	tmpaddr = 0;
+	u16	start_addr = efuse_addr;
+	u8	badworden = 0x0F;
+	u8	tmpdata[8]; 
+	
+	//memset(tmpdata,0xff,PGPKT_DATA_SIZE);
+	_rtw_memset((PVOID)tmpdata, 0xff, PGPKT_DATA_SIZE);
+	//RT_TRACE(COMP_EFUSE, DBG_LOUD, ("word_en = %x efuse_addr=%x\n", word_en, efuse_addr));
+
+	//RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("U-EFUSE\n"), data, 8);
+
+	if(!(word_en&BIT0))
+	{
+		tmpaddr = start_addr;
+		efuse_OneByteWrite(pAdapter,start_addr++, data[0], bPseudoTest);
+		efuse_OneByteWrite(pAdapter,start_addr++, data[1], bPseudoTest);
+
+		efuse_OneByteRead(pAdapter,tmpaddr, &tmpdata[0], bPseudoTest);
+		efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[1], bPseudoTest);
+		if((data[0]!=tmpdata[0])||(data[1]!=tmpdata[1])){
+			badworden &= (~BIT0);
+		}
+	}
+	if(!(word_en&BIT1))
+	{
+		tmpaddr = start_addr;
+		efuse_OneByteWrite(pAdapter,start_addr++, data[2], bPseudoTest);
+		efuse_OneByteWrite(pAdapter,start_addr++, data[3], bPseudoTest);
+				
+		efuse_OneByteRead(pAdapter,tmpaddr    , &tmpdata[2], bPseudoTest);
+		efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[3], bPseudoTest);
+		if((data[2]!=tmpdata[2])||(data[3]!=tmpdata[3])){
+			badworden &=( ~BIT1);
+		}
+	}
+	if(!(word_en&BIT2))
+	{
+		tmpaddr = start_addr;
+		efuse_OneByteWrite(pAdapter,start_addr++, data[4], bPseudoTest);
+		efuse_OneByteWrite(pAdapter,start_addr++, data[5], bPseudoTest);
+
+		efuse_OneByteRead(pAdapter,tmpaddr, &tmpdata[4], bPseudoTest);							
+		efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[5], bPseudoTest);
+		if((data[4]!=tmpdata[4])||(data[5]!=tmpdata[5])){
+			badworden &=( ~BIT2);
+		}
+	}
+	if(!(word_en&BIT3))
+	{
+		tmpaddr = start_addr;
+		efuse_OneByteWrite(pAdapter,start_addr++, data[6], bPseudoTest);
+		efuse_OneByteWrite(pAdapter,start_addr++, data[7], bPseudoTest);
+
+		efuse_OneByteRead(pAdapter,tmpaddr, &tmpdata[6], bPseudoTest);
+		efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[7], bPseudoTest);
+		if((data[6]!=tmpdata[6])||(data[7]!=tmpdata[7])){
+			badworden &=( ~BIT3);
+		}
+	}
+	return badworden;
+}
+
+void rtl8192d_set_hal_ops(struct hal_ops *pHalFunc)
+{
+	pHalFunc->free_hal_data = &rtl8192d_free_hal_data;
+
+	pHalFunc->dm_init = &rtl8192d_init_dm_priv;
+	pHalFunc->dm_deinit = &rtl8192d_deinit_dm_priv;
+	pHalFunc->read_chip_version = &rtl8192d_ReadChipVersion;
+
+	pHalFunc->set_bwmode_handler = &PHY_SetBWMode8192D;
+	pHalFunc->set_channel_handler = &PHY_SwChnl8192D;
+
+	pHalFunc->hal_dm_watchdog = &rtl8192d_HalDmWatchDog;
+
+	pHalFunc->Add_RateATid = &rtl8192d_Add_RateATid;
+
+	pHalFunc->read_bbreg = &rtl8192d_PHY_QueryBBReg;
+	pHalFunc->write_bbreg = &rtl8192d_PHY_SetBBReg;
+	pHalFunc->read_rfreg = &rtl8192d_PHY_QueryRFReg;
+	pHalFunc->write_rfreg = &rtl8192d_PHY_SetRFReg;
+
+	//Efuse related function
+	pHalFunc->EfusePowerSwitch = &rtl8192d_EfusePowerSwitch;
+	pHalFunc->ReadEFuse = &rtl8192d_ReadEFuse;
+	pHalFunc->EFUSEGetEfuseDefinition = &rtl8192d_EFUSE_GetEfuseDefinition;
+	pHalFunc->EfuseGetCurrentSize = &rtl8192d_EfuseGetCurrentSize;
+	pHalFunc->Efuse_PgPacketRead = &rtl8192d_Efuse_PgPacketRead;
+	pHalFunc->Efuse_PgPacketWrite = &rtl8192d_Efuse_PgPacketWrite;
+	pHalFunc->Efuse_WordEnableDataWrite = &rtl8192d_Efuse_WordEnableDataWrite;
+
+#ifdef CONFIG_IOL
+	pHalFunc->IOL_exec_cmds_sync = NULL;
+#endif
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_mp.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_mp.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_mp.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_mp.c	2017-09-23 03:42:49.962675235 +0800
@@ -0,0 +1,1191 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _RTL8192D_MP_C_
+#ifdef CONFIG_MP_INCLUDED
+
+#include <drv_types.h>
+#include <rtw_mp.h>
+
+#ifdef CONFIG_RTL8192D
+#include <rtl8192d_hal.h>
+#endif
+
+#define IQK_DELAY_TIME		1 	//ms
+
+#define PHY_IQCalibrate(a)	rtl8192d_PHY_IQCalibrate(a)
+#define PHY_LCCalibrate(a)	rtl8192d_PHY_LCCalibrate(a)
+#define dm_CheckTXPowerTracking(a)	rtl8192d_dm_CheckTXPowerTracking(a)
+#define PHY_SetRFPathSwitch(a,b)	rtl8192d_PHY_SetRFPathSwitch(a,b)
+
+
+VOID Hal_MptSet8256CCKTxPower( PADAPTER pAdapter,u8 *pTxPower)
+{
+	u8				TxAGC[2]={0, 0};
+	u32 			 tmpval=0;
+	u8				rf;
+	for(rf=0; rf<2; rf++)
+		TxAGC[rf] = pTxPower[rf];
+
+	// rf-A cck tx power
+	PHY_SetBBReg(pAdapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, TxAGC[RF_PATH_A]);
+
+	tmpval = (TxAGC[RF_PATH_A]<<16)|(TxAGC[RF_PATH_A]<<8)|(TxAGC[RF_PATH_A]);
+	PHY_SetBBReg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval);
+
+	// rf-B cck tx power
+	PHY_SetBBReg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, TxAGC[RF_PATH_B]);
+
+	tmpval = (TxAGC[RF_PATH_B]<<16)|(TxAGC[RF_PATH_B]<<8)|(TxAGC[RF_PATH_B]);
+	PHY_SetBBReg(pAdapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval);
+
+}
+
+
+VOID Hal_MptSet8256OFDMTxPower(PADAPTER pAdapter,u8 *pTxPower)
+{
+	u32 			 TxAGC=0;
+	u8 tmpval=0;
+	u8 rf;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	PMPT_CONTEXT		pMptCtx = &(pAdapter->mppriv.MptCtx);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+	tmpval = pTxPower[0];
+	TxAGC |= ((tmpval<<24)|(tmpval<<16)|(tmpval<<8)|tmpval);
+
+	PHY_SetBBReg(pAdapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC);
+	PHY_SetBBReg(pAdapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC);
+	PHY_SetBBReg(pAdapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC);
+	PHY_SetBBReg(pAdapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC);
+	PHY_SetBBReg(pAdapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC);
+	PHY_SetBBReg(pAdapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC);
+
+	TxAGC=0;
+	tmpval = pTxPower[1];
+	TxAGC |= ((tmpval<<24)|(tmpval<<16)|(tmpval<<8)|tmpval);
+
+	PHY_SetBBReg(pAdapter, rTxAGC_B_Rate18_06, bMaskDWord, TxAGC);
+	PHY_SetBBReg(pAdapter, rTxAGC_B_Rate54_24, bMaskDWord, TxAGC);
+	PHY_SetBBReg(pAdapter, rTxAGC_B_Mcs03_Mcs00, bMaskDWord, TxAGC);
+	PHY_SetBBReg(pAdapter, rTxAGC_B_Mcs07_Mcs04, bMaskDWord, TxAGC);
+	PHY_SetBBReg(pAdapter, rTxAGC_B_Mcs11_Mcs08, bMaskDWord, TxAGC);
+	PHY_SetBBReg(pAdapter, rTxAGC_B_Mcs15_Mcs12, bMaskDWord, TxAGC);
+
+
+
+}
+
+
+void Hal_SetAntenna(PADAPTER pAdapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+
+	R_ANTENNA_SELECT_OFDM *p_ofdm_tx;	/* OFDM Tx register */
+	R_ANTENNA_SELECT_CCK *p_cck_txrx;
+
+	u8	r_rx_antenna_ofdm = 0, r_ant_select_cck_val = 0;
+	u8	chgTx = 0, chgRx = 0;
+	u32 r_ant_sel_cck_val = 0, r_ant_select_ofdm_val = 0, r_ofdm_tx_en_val = 0;
+
+
+	p_ofdm_tx = (R_ANTENNA_SELECT_OFDM *)&r_ant_select_ofdm_val;
+	p_cck_txrx = (R_ANTENNA_SELECT_CCK *)&r_ant_select_cck_val;
+
+	p_ofdm_tx->r_ant_ht1	= 0x1;
+	p_ofdm_tx->r_ant_ht2	= 0x2;	// Second TX RF path is A
+	p_ofdm_tx->r_ant_non_ht = 0x3;	// 0x1+0x2=0x3
+
+	switch (pAdapter->mppriv.antenna_tx)
+	{
+		case ANTENNA_A:
+			p_ofdm_tx->r_tx_antenna 	= 0x1;
+			r_ofdm_tx_en_val		= 0x1;
+			p_ofdm_tx->r_ant_l		= 0x1;
+			p_ofdm_tx->r_ant_ht_s1		= 0x1;
+			p_ofdm_tx->r_ant_non_ht_s1	= 0x1;
+			p_cck_txrx->r_ccktx_enable	= 0x8;
+			chgTx = 1;
+
+			// From SD3 Willis suggestion !!! Set RF A=TX and B as standby
+//			if (IS_HARDWARE_TYPE_8192S(pAdapter))
+			{
+			write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2);
+			write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 1);
+			r_ofdm_tx_en_val		= 0x3;
+
+			// Power save
+			//cosa r_ant_select_ofdm_val = 0x11111111;
+
+			// We need to close RFB by SW control
+			if (pHalData->rf_type == RF_2T2R)
+			{
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 1);
+				PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 0);
+			}
+			}
+			break;
+
+		case ANTENNA_B:
+			p_ofdm_tx->r_tx_antenna 	= 0x2;
+			r_ofdm_tx_en_val		= 0x2;
+			p_ofdm_tx->r_ant_l		= 0x2;
+			p_ofdm_tx->r_ant_ht_s1		= 0x2;
+			p_ofdm_tx->r_ant_non_ht_s1	= 0x2;
+			p_cck_txrx->r_ccktx_enable	= 0x4;
+			chgTx = 1;
+
+			// From SD3 Willis suggestion !!! Set RF A as standby
+			//if (IS_HARDWARE_TYPE_8192S(pAdapter))
+			{
+			PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 1);
+			PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2);
+//			r_ofdm_tx_en_val		= 0x3;
+
+			// Power save
+			//cosa r_ant_select_ofdm_val = 0x22222222;
+
+			// 2008/10/31 MH From SD3 Willi's suggestion. We must read RF 1T table.
+			// 2009/01/08 MH From Sd3 Willis. We need to close RFA by SW control
+			if (pHalData->rf_type == RF_2T2R || pHalData->rf_type == RF_1T2R)
+			{
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 1);
+				PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0);
+//				PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 0);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1);
+			}
+			}
+		break;
+
+		case ANTENNA_AB:	// For 8192S
+			p_ofdm_tx->r_tx_antenna 	= 0x3;
+			r_ofdm_tx_en_val		= 0x3;
+			p_ofdm_tx->r_ant_l		= 0x3;
+			p_ofdm_tx->r_ant_ht_s1		= 0x3;
+			p_ofdm_tx->r_ant_non_ht_s1	= 0x3;
+			p_cck_txrx->r_ccktx_enable	= 0xC;
+			chgTx = 1;
+
+			// From SD3 Willis suggestion !!! Set RF B as standby
+			//if (IS_HARDWARE_TYPE_8192S(pAdapter))
+			{
+			PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2);
+			PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2);
+
+			// Disable Power save
+			//cosa r_ant_select_ofdm_val = 0x3321333;
+#if 0
+			// 2008/10/31 MH From SD3 Willi's suggestion. We must read RFA 2T table.
+			if ((pHalData->VersionID == VERSION_8192S_ACUT)) // For RTL8192SU A-Cut only, by Roger, 2008.11.07.
+			{
+				mpt_RFConfigFromPreParaArrary(pAdapter, 1, RF_PATH_A);
+			}
+#endif
+			// 2009/01/08 MH From Sd3 Willis. We need to enable RFA/B by SW control
+			if (pHalData->rf_type == RF_2T2R)
+			{
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0);
+//				PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1);
+				PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1);
+			}
+			}
+			break;
+
+		default:
+			break;
+	}
+
+	//
+	// r_rx_antenna_ofdm, bit0=A, bit1=B, bit2=C, bit3=D
+	// r_cckrx_enable : CCK default, 0=A, 1=B, 2=C, 3=D
+	// r_cckrx_enable_2 : CCK option, 0=A, 1=B, 2=C, 3=D
+	//
+	switch (pAdapter->mppriv.antenna_rx)
+	{
+		case ANTENNA_A:
+			r_rx_antenna_ofdm		= 0x1;	// A
+			p_cck_txrx->r_cckrx_enable	= 0x0;	// default: A
+			p_cck_txrx->r_cckrx_enable_2	= 0x0;	// option: A
+			chgRx = 1;
+			break;
+
+		case ANTENNA_B:
+			r_rx_antenna_ofdm		= 0x2;	// B
+			p_cck_txrx->r_cckrx_enable	= 0x1;	// default: B
+			p_cck_txrx->r_cckrx_enable_2	= 0x1;	// option: B
+			chgRx = 1;
+			break;
+
+		case ANTENNA_AB:
+			r_rx_antenna_ofdm		= 0x3;	// AB
+			p_cck_txrx->r_cckrx_enable	= 0x0;	// default:A
+			p_cck_txrx->r_cckrx_enable_2	= 0x1;	// option:B
+			chgRx = 1;
+			break;
+
+		default:
+			break;
+	}
+
+	if (chgTx && chgRx)
+	{
+		switch(pHalData->rf_chip)
+		{
+			case RF_8225:
+			case RF_8256:
+			case RF_6052:
+				//r_ant_sel_cck_val = r_ant_select_cck_val;
+				PHY_SetBBReg(pAdapter, rFPGA1_TxInfo, 0x7fffffff, r_ant_select_ofdm_val);	//OFDM Tx
+				PHY_SetBBReg(pAdapter, rFPGA0_TxInfo, 0x0000000f, r_ofdm_tx_en_val);		//OFDM Tx
+				PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm);	//OFDM Rx
+				PHY_SetBBReg(pAdapter, rOFDM1_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm);	//OFDM Rx
+				PHY_SetBBReg(pAdapter, rCCK0_AFESetting, bMaskByte3, r_ant_select_cck_val);//r_ant_sel_cck_val);		//CCK TxRx
+#ifdef CONFIG_RTL8192D
+				if(pHalData->CurrentBandType92D == BAND_ON_2_4G || IS_92D_SINGLEPHY(pHalData->VersionID))
+						rtw_write8(pAdapter, rCCK0_AFESetting+3, r_ant_select_cck_val);
+#endif
+				break;
+
+			default:
+				break;
+		}
+	}
+
+	RT_TRACE(_module_mp_, _drv_notice_, ("-SwitchAntenna: finished\n"));
+}
+
+
+s32 Hal_SetPowerTracking(PADAPTER padapter, u8 enable)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+
+	if (!netif_running(padapter->pnetdev)) {
+		RT_TRACE(_module_mp_, _drv_warning_, ("SetPowerTracking! Fail: interface not opened!\n"));
+		return _FAIL;
+	}
+
+	if (check_fwstate(&padapter->mlmepriv, WIFI_MP_STATE) == _FALSE) {
+		RT_TRACE(_module_mp_, _drv_warning_, ("SetPowerTracking! Fail: not in MP mode!\n"));
+		return _FAIL;
+	}
+
+	if (enable)
+		pdmpriv->TxPowerTrackControl = _TRUE;
+	else
+		pdmpriv->TxPowerTrackControl = _FALSE;
+
+	return _SUCCESS;
+}
+
+void Hal_GetPowerTracking(PADAPTER padapter, u8 *enable)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+
+	*enable = pdmpriv->TxPowerTrackControl;
+}
+
+
+
+void Hal_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart)
+{
+   // PMGNT_INFO          pMgntInfo = &(pAdapter->MgntInfo);
+    HAL_DATA_TYPE       *pHalData   = GET_HAL_DATA(pAdapter);
+    PMPT_CONTEXT	pMptCtx = &pAdapter->mppriv.MptCtx;
+
+
+    if(bStart)
+    { // Start Carrier Suppression.
+        //if(pMgntInfo->dot11CurrentWirelessMode == WIRELESS_MODE_B)
+        if( pMptCtx->MptRateIndex >= MPT_RATE_1M &&
+            pMptCtx->MptRateIndex <= MPT_RATE_11M )
+        { // Start CCK Carrier Suppression
+            // 1. if CCK block on?
+            if(!PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bCCKEn))
+                PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);//set CCK block on
+
+            //Turn Off All Test Mode
+            PHY_SetBBReg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
+            PHY_SetBBReg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
+            PHY_SetBBReg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+
+            PHY_SetBBReg(pAdapter, rCCK0_System, bCCKBBMode, 0x2);    //transmit mode
+            PHY_SetBBReg(pAdapter, rCCK0_System, bCCKScramble, 0x0);  //turn off scramble setting
+                //Set CCK Tx Test Rate
+            //PHY_SetBBReg(pAdapter, rCCK0_System, bCCKTxRate, pMgntInfo->ForcedDataRate);
+            PHY_SetBBReg(pAdapter, rCCK0_System, bCCKTxRate, 0x0);    //Set FTxRate to 1Mbps
+        }
+    }
+    else
+    { // Stop Carrier Suppression.
+        //if(pMgntInfo->dot11CurrentWirelessMode == WIRELESS_MODE_B)
+        if( pMptCtx->MptRateIndex >= MPT_RATE_1M &&
+            pMptCtx->MptRateIndex <= MPT_RATE_11M )
+        { // Stop Carrier Suppression
+            PHY_SetBBReg(pAdapter, rCCK0_System, bCCKBBMode, 0x0);    //normal mode
+            PHY_SetBBReg(pAdapter, rCCK0_System, bCCKScramble, 0x1);  //turn on scramble setting
+
+            //BB Reset
+            PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
+            PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
+        }
+    }
+
+}
+
+
+void Hal_SetSingleToneTx ( PADAPTER pAdapter , u8 bStart )
+{
+   // PMGNT_INFO          pMgntInfo = &(pAdapter->MgntInfo);
+    HAL_DATA_TYPE       *pHalData   = GET_HAL_DATA(pAdapter);
+    PMPT_CONTEXT	pMptCtx = &pAdapter->mppriv.MptCtx;
+    u8              CurrChannel = pAdapter->mppriv.channel;
+    u32              ulAntennaTx = pAdapter->mppriv.antenna_tx;
+    RF_RADIO_PATH_E   rfPath;
+
+    switch(ulAntennaTx)
+    {
+        case ANTENNA_A:         rfPath = RF_PATH_A;       break;
+        case ANTENNA_B:         rfPath = RF_PATH_B;       break;
+        case ANTENNA_C:         rfPath = RF_PATH_C;       break;
+        default:
+            rfPath = RF_PATH_C;
+            break;
+    }
+
+    if(bStart)
+    {   // Start Single Tone.
+    #if 1// use RF debug mode out by 'LO'.
+        //DbgPrint(" Started from Normal ->Single tone\n");
+        //Normal ->Single tone
+        PHY_SetRFReg(pAdapter, rfPath, 0x00, bRFRegOffsetMask, 0xb0);
+        rtw_udelay_os(IQK_DELAY_TIME*100);
+        PHY_SetRFReg(pAdapter, rfPath, 0x01, bRFRegOffsetMask, 0x41f);
+        rtw_udelay_os(IQK_DELAY_TIME*100);
+        PHY_SetRFReg(pAdapter, rfPath, 0x0c, bRFRegOffsetMask, 0xc40);
+        rtw_udelay_os(IQK_DELAY_TIME*100);
+        PHY_SetRFReg(pAdapter, rfPath, 0x08, bRFRegOffsetMask, 0xe01);
+        rtw_udelay_os(IQK_DELAY_TIME*100);
+        PHY_SetRFReg(pAdapter, rfPath, 0x09, bRFRegOffsetMask, 0x5f0);
+        rtw_udelay_os(IQK_DELAY_TIME*100);
+    #else// the old one, trigger by BB register..
+        // 1. if OFDM block on?
+        if(!PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn))
+            PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);//set OFDM block on
+
+        // 2. set CCK test mode off, set to CCK normal mode
+        PHY_SetBBReg(pAdapter, rCCK0_System, bCCKBBMode, bDisable);
+
+        // 3. turn on scramble setting
+        PHY_SetBBReg(pAdapter, rCCK0_System, bCCKScramble, bEnable);
+
+        // 4. Turn On Continue Tx and turn off the other test modes.
+        PHY_SetBBReg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
+        PHY_SetBBReg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
+        PHY_SetBBReg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bEnable);
+    #endif
+    }
+    else
+    {   // Stop Single Tone.
+    #if 1// set RF mode from debug mode to normal mode.
+        //DbgPrint(" end from Single tone -> Normal \n");
+        PHY_SetRFReg(pAdapter, rfPath, 0x01, bRFRegOffsetMask, 0xee0);
+        rtw_udelay_os(IQK_DELAY_TIME*100);
+        PHY_SetRFReg(pAdapter, rfPath, 0x0c, bRFRegOffsetMask, 0x240);
+        rtw_udelay_os(IQK_DELAY_TIME*100);
+        PHY_SetRFReg(pAdapter, rfPath, 0x08, bRFRegOffsetMask, 0xe1c);
+        rtw_udelay_os(IQK_DELAY_TIME*100);
+        PHY_SetRFReg(pAdapter, rfPath, 0x09, bRFRegOffsetMask, 0x7f0);
+        rtw_udelay_os(IQK_DELAY_TIME*100);
+        PHY_SetRFReg(pAdapter, rfPath, 0x00, bRFRegOffsetMask, 0xbf);
+        rtw_udelay_os(IQK_DELAY_TIME*100);
+    #else//old code, stop single tone by BB registers.
+        //Turn off all test modes.
+        PHY_SetBBReg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
+        PHY_SetBBReg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
+        PHY_SetBBReg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+        //Delay 10 ms
+        delay_ms(10);
+        //BB Reset
+        PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
+        PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
+    #endif
+    }
+
+}
+
+
+s32 Hal_SetThermalMeter(PADAPTER pAdapter, u8 target_ther)
+{
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
+
+
+	if (!netif_running(pAdapter->pnetdev)) {
+		RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter! Fail: interface not opened!\n"));
+		return _FAIL;
+	}
+
+	if (check_fwstate(&pAdapter->mlmepriv, WIFI_MP_STATE) == _FALSE) {
+		RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter: Fail! not in MP mode!\n"));
+		return _FAIL;
+	}
+
+	target_ther &= 0xff;
+	if (target_ther < 0x07)
+		target_ther = 0x07;
+	else if (target_ther > 0x1d)
+		target_ther = 0x1d;
+
+	pHalData->EEPROMThermalMeter = target_ther;
+
+	return _SUCCESS;
+}
+
+
+VOID Hal_TriggerRFThermalMeter( PADAPTER pAdapter )
+{
+   // PADAPTER			  pAdapter = (PADAPTER)Context;
+	PHY_SetRFReg(pAdapter, RF_PATH_A, RF_T_METER, BIT17 | BIT16, 0x03);
+}
+
+
+u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter)
+{
+	u32 ThermalValue = 0;
+	
+	ThermalValue = _read_rfreg(pAdapter, RF_PATH_A, RF_T_METER, 0xf800);	//0x42: RF Reg[15:11]
+//	RT_TRACE(_module_mp_, _drv_alert_, ("ThermalValue = 0x%x\n", ThermalValue));
+	return (u8)ThermalValue;
+}
+
+
+void Hal_GetThermalMeter(PADAPTER pAdapter, u8 *value)
+{
+#if 0
+	fw_cmd(pAdapter, IOCMD_GET_THERMAL_METER);
+	rtw_msleep_os(1000);
+	fw_cmd_data(pAdapter, value, 1);
+	*value &= 0xFF;
+#else
+
+	Hal_TriggerRFThermalMeter(pAdapter);
+	rtw_msleep_os(1000);
+	*value = Hal_ReadRFThermalMeter(pAdapter);
+#endif
+}
+
+void Hal_SetTxPower (PADAPTER pAdapter)
+{
+	HAL_DATA_TYPE		*pHalData	= GET_HAL_DATA(pAdapter);
+	//u1Byte				CurrChannel;
+	u8                  TxPowerLevel_CCK[2], TxPowerLevel_HTOFDM[2];
+    PMPT_CONTEXT        pMptCtx = &(pAdapter->mppriv.MptCtx);
+	u8  				rf;
+
+	printk("%s",__func__);
+
+    TxPowerLevel_CCK[RF_PATH_A] = pAdapter->mppriv.txpoweridx;
+	TxPowerLevel_CCK[RF_PATH_B] = pAdapter->mppriv.txpoweridx_b;
+    TxPowerLevel_HTOFDM[RF_PATH_A] = pAdapter->mppriv.txpoweridx;
+	TxPowerLevel_HTOFDM[RF_PATH_B] = pAdapter->mppriv.txpoweridx_b;
+
+	for(rf=0; rf<2; rf++)
+	{
+		if(IS_HARDWARE_TYPE_8192D(pAdapter))
+		{
+			//RT_TRACE(COMP_MP, DBG_LOUD, ("antenna settings txpath 0x%x\n", pHalData->AntennaTxPath));
+			switch(pHalData->AntennaTxPath)
+			{
+				case ANTENNA_B:
+					TxPowerLevel_CCK[rf] = pAdapter->mppriv.txpoweridx_b;
+					break;
+
+				case ANTENNA_A:
+				case ANTENNA_AB:
+				default:
+					TxPowerLevel_CCK[rf] =pAdapter->mppriv.txpoweridx;
+					break;
+			}
+		}
+	}
+	switch(pHalData->rf_chip)
+	{
+		// 2008/09/12 MH Test only !! We enable the TX power tracking for MP!!!!!
+		// We should call normal driver API later!!
+		case RF_8225:
+		case RF_8256:
+		case RF_6052:
+			Hal_MptSet8256CCKTxPower(pAdapter, &TxPowerLevel_CCK[0]);
+			Hal_MptSet8256OFDMTxPower(pAdapter, &TxPowerLevel_HTOFDM[0]);
+			break;
+
+		default:
+			break;
+	}
+	//DbgPrint("\n MPT_ProSetTxPower() is finished \n");
+}
+
+
+void Hal_SetSingleCarrierTx (PADAPTER pAdapter, u8 bStart)
+{
+    HAL_DATA_TYPE       *pHalData   = GET_HAL_DATA(pAdapter);
+    u8              CurrChannel = pAdapter->mppriv.channel;
+     PMPT_CONTEXT        pMptCtx = &(pAdapter->mppriv.MptCtx);
+
+    if ( bStart )
+    {// Start Single Carrier.
+        // 1. if OFDM block on?
+        if(!PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn))
+            PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);//set OFDM block on
+
+        if(pHalData->CurrentBandType92D == BAND_ON_2_4G)
+        {
+            // 2. set CCK test mode off, set to CCK normal mode
+            PHY_SetBBReg(pAdapter, rCCK0_System, bCCKBBMode, bDisable);
+
+            // 3. turn on scramble setting
+            PHY_SetBBReg(pAdapter, rCCK0_System, bCCKScramble, bEnable);
+        }
+
+        // 4. Turn On Continue Tx and turn off the other test modes.
+        PHY_SetBBReg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
+        PHY_SetBBReg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bEnable);
+        PHY_SetBBReg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+    }
+    else
+    { // Stop Single Carrier.
+        //Turn off all test modes.
+        PHY_SetBBReg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
+        PHY_SetBBReg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
+        PHY_SetBBReg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+        //Delay 10 ms
+        rtw_mdelay_os(10);
+        //BB Reset
+        PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
+        PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
+    }
+}
+
+static  VOID Hal_mpt_StartCckContTx(PADAPTER pAdapter,BOOLEAN bScrambleOn)
+{
+
+    HAL_DATA_TYPE   *pHalData   = GET_HAL_DATA(pAdapter);
+    PMPT_CONTEXT        pMptCtx = &pAdapter->mppriv.MptCtx;
+    //u1Byte            u1bReg;
+    //u4Byte            data;
+    //u1Byte            CckTxAGC;
+    u32          cckrate;
+
+    // 1. if CCK block on?
+    if(!PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bCCKEn))
+        PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);//set CCK block on
+
+    //Turn Off All Test Mode
+    PHY_SetBBReg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
+    PHY_SetBBReg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
+    PHY_SetBBReg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+    //Set CCK Tx Test Rate
+    switch(pAdapter->mppriv.rateidx)
+    {
+        case 2:
+            cckrate = 0;
+            break;
+        case 4:
+            cckrate = 1;
+            break;
+        case 11:
+            cckrate = 2;
+            break;
+        case 22:
+            cckrate = 3;
+            break;
+        default:
+            cckrate = 0;
+            break;
+    }
+    PHY_SetBBReg(pAdapter, rCCK0_System, bCCKTxRate, cckrate);
+
+    PHY_SetBBReg(pAdapter, rCCK0_System, bCCKBBMode, 0x2);    //transmit mode
+    PHY_SetBBReg(pAdapter, rCCK0_System, bCCKScramble, 0x1);  //turn on scramble setting
+
+    pMptCtx->bCckContTx = _TRUE;
+    pMptCtx->bOfdmContTx = _FALSE;
+
+}   /* mpt_StartCckContTx */
+
+
+static  VOID Hal_mpt_StopCckCoNtTx(PADAPTER pAdapter)
+{
+    HAL_DATA_TYPE   *pHalData   = GET_HAL_DATA(pAdapter);
+    PMPT_CONTEXT        pMptCtx = &(pAdapter->mppriv.MptCtx);
+
+    u8          u1bReg;
+
+    pMptCtx->bCckContTx = _FALSE;
+    pMptCtx->bOfdmContTx = _FALSE;
+
+    PHY_SetBBReg(pAdapter, rCCK0_System, bCCKBBMode, 0x0);    //normal mode
+    PHY_SetBBReg(pAdapter, rCCK0_System, bCCKScramble, 0x1);  //turn on scramble setting
+
+    //BB Reset
+    PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
+    PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
+
+}   /* mpt_StopCckCoNtTx */
+
+
+static  VOID Hal_mpt_StartOfdmContTx( PADAPTER pAdapter )
+{
+
+    HAL_DATA_TYPE   *pHalData   = GET_HAL_DATA(pAdapter);
+    PMPT_CONTEXT        pMptCtx = &(pAdapter->mppriv.MptCtx);
+    //u1Byte            u1bReg;
+    //u4Byte            data;
+    //u1Byte            OfdmTxAGC;
+
+    // 1. if OFDM block on?
+    if(!PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn))
+        PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);//set OFDM block on
+
+    if(pHalData->CurrentBandType92D == BAND_ON_2_4G)
+    {
+        // 2. set CCK test mode off, set to CCK normal mode
+        PHY_SetBBReg(pAdapter, rCCK0_System, bCCKBBMode, bDisable);
+
+        // 3. turn on scramble setting
+        PHY_SetBBReg(pAdapter, rCCK0_System, bCCKScramble, bEnable);
+    }
+
+    // 4. Turn On Continue Tx and turn off the other test modes.
+       PHY_SetBBReg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bEnable);
+       PHY_SetBBReg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
+       PHY_SetBBReg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+
+    pMptCtx->bCckContTx = _FALSE;
+    pMptCtx->bOfdmContTx = _TRUE;
+    //pMptCtx->bCtxTriggerPktSent = _FALSE;
+
+}   /* mpt_StartOfdmContTx */
+
+
+static  VOID Hal_mpt_StopOfdmContTx( PADAPTER pAdapter)
+{
+    HAL_DATA_TYPE   *pHalData   = GET_HAL_DATA(pAdapter);
+    PMPT_CONTEXT        pMptCtx = &(pAdapter->mppriv.MptCtx);
+    u8          u1bReg;
+    u32          data;
+
+    pMptCtx->bCckContTx = _FALSE;
+    pMptCtx->bOfdmContTx = _FALSE;
+
+    PHY_SetBBReg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
+    PHY_SetBBReg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
+    PHY_SetBBReg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+    //Delay 10 ms
+    rtw_msleep_os(10);
+    //BB Reset
+    PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
+    PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
+
+}   /* mpt_StopOfdmContTx */
+
+
+void Hal_SetContinuousTx (PADAPTER pAdapter, u8 bStart)
+{
+    HAL_DATA_TYPE       *pHalData   = GET_HAL_DATA(pAdapter);
+    PMPT_CONTEXT        pMptCtx = &(pAdapter->mppriv.MptCtx);
+
+    if(bStart)
+    { // Start Continuous Tx.
+        if( pAdapter->mppriv.rateidx >= MPT_RATE_1M &&
+            pAdapter->mppriv.rateidx <= MPT_RATE_11M )
+            Hal_mpt_StartCckContTx(pAdapter, _TRUE);
+        else if(pAdapter->mppriv.rateidx >= MPT_RATE_6M &&
+                pAdapter->mppriv.rateidx <= MPT_RATE_MCS15 )
+            Hal_mpt_StartOfdmContTx(pAdapter);
+        else
+        {
+            //RT_ASSERT(_FALSE, ("MPT_ProSetUpContTx(): Unknown wireless rate index: %d\n", pMptCtx->MptRateIndex));
+            pMptCtx->bStartContTx = _FALSE;
+            pMptCtx->bCckContTx = _FALSE;
+            pMptCtx->bOfdmContTx = _FALSE;
+        }
+
+    }
+    else
+    { // Stop Continuous Tx.
+        BOOLEAN bCckContTx = pMptCtx->bCckContTx;
+        BOOLEAN bOfdmContTx = pMptCtx->bOfdmContTx;
+
+        if(bCckContTx == _TRUE && bOfdmContTx == _FALSE)
+        { // Stop CCK Continuous Tx.
+            Hal_mpt_StopCckCoNtTx(pAdapter);
+        }
+        else if(bCckContTx == _FALSE && bOfdmContTx == _TRUE)
+        { // Stop OFDM Continuous Tx.
+            Hal_mpt_StopOfdmContTx(pAdapter);
+        }
+        else if(bCckContTx == _FALSE && bOfdmContTx == _FALSE)
+        { // We've already stopped Continuous Tx.
+        }
+        else
+        { // Unexpected case.
+
+        }
+    }
+
+}
+
+
+void Hal_mpt_SwitchRfSetting(PADAPTER pAdapter)
+{
+	
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
+	struct mp_priv *pmp = &pAdapter->mppriv;
+	u8 ChannelToSw = pmp->channel, eRFPath = RF_PATH_A;
+	u8 ulRateIdx = pmp->rateidx;
+	u8 ulbandwidth = pmp->bandwidth;
+	PMPT_CONTEXT	pMptCtx = &(pAdapter->mppriv.MptCtx);
+    BOOLEAN             bInteralPA = _FALSE;
+    u32				value = 0;
+    
+    
+	if (((ulRateIdx == MPT_RATE_1M || ulRateIdx == MPT_RATE_6M || ulRateIdx == MPT_RATE_MCS0 ||
+        ulRateIdx == MPT_RATE_MCS8) && ulbandwidth == HT_CHANNEL_WIDTH_20 &&
+        (ChannelToSw == 1 || ChannelToSw == 11)) ||
+        ((ulRateIdx == MPT_RATE_MCS0 ||ulRateIdx == MPT_RATE_MCS8) &&
+        ulbandwidth == HT_CHANNEL_WIDTH_40 &&
+        (ChannelToSw == 3 || ChannelToSw == 9)))
+
+    {
+        value = 0x294a5;
+    }
+    else
+    {
+        value = 0x18c63;
+    }
+
+
+    for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
+    {
+        if(pHalData->MacPhyMode92D == DUALMAC_DUALPHY &&
+            pHalData->interfaceIndex == 1)      //MAC 1 5G
+            bInteralPA = pHalData->InternalPA5G[1];
+        else
+            bInteralPA = pHalData->InternalPA5G[eRFPath];
+
+        if(!bInteralPA ||  pHalData->CurrentBandType92D==BAND_ON_2_4G)
+        	_write_rfreg(pAdapter, (RF_RADIO_PATH_E)eRFPath, 0x03, bRFRegOffsetMask, value);
+    }
+}
+
+void Hal_SetBandwidth(PADAPTER pAdapter)
+{
+	struct mp_priv *pmp = &pAdapter->mppriv;
+
+	SetBWMode(pAdapter, pmp->bandwidth, pmp->prime_channel_offset);
+	Hal_mpt_SwitchRfSetting(pAdapter);
+}
+
+
+void MPT_CCKTxPowerAdjust(PADAPTER Adapter,BOOLEAN	bInCH14)
+{
+	u4Byte				TempVal = 0, TempVal2 = 0, TempVal3 = 0;
+	u4Byte				CurrCCKSwingVal=0, CCKSwingIndex=12;
+	HAL_DATA_TYPE		*pHalData	= GET_HAL_DATA(Adapter);
+	u1Byte				i;
+
+
+	// get current cck swing value and check 0xa22 & 0xa23 later to match the table.
+	
+	CurrCCKSwingVal = PHY_QueryBBReg(Adapter, rCCK0_TxFilter1, bMaskHWord);
+	
+	if(!bInCH14)
+	{
+		// Readback the current bb cck swing value and compare with the table to 
+		// get the current swing index
+		for(i=0 ; i<CCK_TABLE_SIZE ; i++)
+		{
+			if( ((CurrCCKSwingVal&0xff) == (u4Byte)CCKSwingTable_Ch1_Ch13[i][0]) &&
+				( ((CurrCCKSwingVal&0xff00)>>8) == (u4Byte)CCKSwingTable_Ch1_Ch13[i][1]) )
+			{
+				CCKSwingIndex = i;
+				//RT_TRACE(COMP_INIT, DBG_LOUD,("Ch1~13, Current reg0x%x = 0x%lx, CCKSwingIndex=0x%x\n", (rCCK0_TxFilter1+2), CurrCCKSwingVal, CCKSwingIndex));
+				break;
+			}
+		}
+		
+		//Write 0xa22 0xa23
+		TempVal =	CCKSwingTable_Ch1_Ch13[CCKSwingIndex][0] +
+					(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][1]<<8) ;
+	
+		
+		//Write 0xa24 ~ 0xa27
+		TempVal2 = 0;
+		TempVal2 =	CCKSwingTable_Ch1_Ch13[CCKSwingIndex][2] +
+					(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][3]<<8) +
+					(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][4]<<16 )+
+					(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][5]<<24);
+		
+		//Write 0xa28  0xa29
+		TempVal3 = 0;
+		TempVal3 =	CCKSwingTable_Ch1_Ch13[CCKSwingIndex][6] +
+					(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][7]<<8) ;
+		
+		
+	}
+	else
+	{
+		for(i=0 ; i<CCK_TABLE_SIZE ; i++)
+		{
+			if( ((CurrCCKSwingVal&0xff) == (u4Byte)CCKSwingTable_Ch14[i][0]) &&
+				( ((CurrCCKSwingVal&0xff00)>>8) == (u4Byte)CCKSwingTable_Ch14[i][1]) )
+			{
+				CCKSwingIndex = i;
+				//RT_TRACE(COMP_INIT, DBG_LOUD,("Ch14, Current reg0x%x = 0x%lx, CCKSwingIndex=0x%x\n", (rCCK0_TxFilter1+2), CurrCCKSwingVal, CCKSwingIndex));
+				break;
+			}
+		}
+		
+		//Write 0xa22 0xa23
+		TempVal =	CCKSwingTable_Ch14[CCKSwingIndex][0] +
+					(CCKSwingTable_Ch14[CCKSwingIndex][1]<<8) ;
+		
+		//Write 0xa24 ~ 0xa27
+		TempVal2= 0;
+		TempVal2 =	CCKSwingTable_Ch14[CCKSwingIndex][2] +
+					(CCKSwingTable_Ch14[CCKSwingIndex][3]<<8) +
+					(CCKSwingTable_Ch14[CCKSwingIndex][4]<<16 )+
+					(CCKSwingTable_Ch14[CCKSwingIndex][5]<<24);
+		
+		//Write 0xa28  0xa29
+		TempVal3 = 0;
+		TempVal3 =	CCKSwingTable_Ch14[CCKSwingIndex][6] +
+					(CCKSwingTable_Ch14[CCKSwingIndex][7]<<8) ;
+	}
+
+	PHY_SetBBReg(Adapter, rCCK0_TxFilter1,bMaskHWord, TempVal);
+	//RTPRINT(FMP, MP_SWICH_CH, ("0xA20=0x%x\n", TempVal));
+	PHY_SetBBReg(Adapter, rCCK0_TxFilter2,bMaskDWord, TempVal2);
+	//RTPRINT(FMP, MP_SWICH_CH, ("0xA24=0x%x\n", TempVal2));
+	PHY_SetBBReg(Adapter, rCCK0_DebugPort,bMaskLWord, TempVal3);
+	//RTPRINT(FMP, MP_SWICH_CH, ("0xA28=0x%x\n", TempVal3));
+
+}
+
+
+void Hal_SetChannel(PADAPTER pAdapter)
+{
+#if 0
+	struct mp_priv *pmp = &pAdapter->mppriv;
+
+//	SelectChannel(pAdapter, pmp->channel);
+	set_channel_bwmode(pAdapter, pmp->channel, pmp->channel_offset, pmp->bandwidth);
+#else
+	u8		eRFPath;
+
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct mp_priv	*pmp = &pAdapter->mppriv;
+	u8		channel = pmp->channel;
+	u8		bandwidth = pmp->bandwidth;
+	u8		rate = pmp->rateidx;
+
+
+	// set RF channel register
+	for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++)
+	{
+	  if(IS_HARDWARE_TYPE_8192D(pAdapter))
+			_write_rfreg(pAdapter, (RF_RADIO_PATH_E)eRFPath, rRfChannel, 0xFF, channel);
+		else
+		_write_rfreg(pAdapter, eRFPath, rRfChannel, 0x3FF, channel);
+	}
+	Hal_mpt_SwitchRfSetting(pAdapter);
+
+	SelectChannel(pAdapter, channel);
+
+	if (pHalData->CurrentChannel == 14 && !pHalData->dmpriv.bCCKinCH14) {
+		pHalData->dmpriv.bCCKinCH14 = _TRUE;
+		MPT_CCKTxPowerAdjust(pAdapter, pHalData->dmpriv.bCCKinCH14);
+	}
+	else if (pHalData->CurrentChannel != 14 && pHalData->dmpriv.bCCKinCH14) {
+		pHalData->dmpriv.bCCKinCH14 = _FALSE;
+		MPT_CCKTxPowerAdjust(pAdapter, pHalData->dmpriv.bCCKinCH14);
+	}
+#if 0
+//#ifdef CONFIG_USB_HCI
+	// Georgia add 2009-11-17, suggested by Edlu , for 8188CU ,46 PIN
+	if (!IS_92C_SERIAL(pHalData->VersionID) && !IS_NORMAL_CHIP(pHalData->VersionID)) {
+		mpt_AdjustRFRegByRateByChan92CU(pAdapter, rate, pHalData->CurrentChannel, bandwidth);
+	}
+#endif
+
+#endif
+}
+
+
+void Hal_SetCCKTxPower(PADAPTER pAdapter, u8 *TxPower)
+{
+	u32 tmpval = 0;
+
+
+	// rf-A cck tx power
+	write_bbreg(pAdapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, TxPower[RF_PATH_A]);
+	tmpval = (TxPower[RF_PATH_A]<<16) | (TxPower[RF_PATH_A]<<8) | TxPower[RF_PATH_A];
+	write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval);
+
+	// rf-B cck tx power
+	write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, TxPower[RF_PATH_B]);
+	tmpval = (TxPower[RF_PATH_B]<<16) | (TxPower[RF_PATH_B]<<8) | TxPower[RF_PATH_B];
+	write_bbreg(pAdapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval);
+
+	RT_TRACE(_module_mp_, _drv_notice_,
+		 ("-SetCCKTxPower: A[0x%02x] B[0x%02x]\n",
+		  TxPower[RF_PATH_A], TxPower[RF_PATH_B]));
+}
+
+
+void Hal_SetOFDMTxPower(PADAPTER pAdapter, u8 *TxPower)
+{
+	u32 TxAGC = 0;
+	u8 tmpval = 0;
+	PMPT_CONTEXT	pMptCtx = &pAdapter->mppriv.MptCtx;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+
+
+	// HT Tx-rf(A)
+	tmpval = TxPower[RF_PATH_A];
+	TxAGC = (tmpval<<24) | (tmpval<<16) | (tmpval<<8) | tmpval;
+
+	write_bbreg(pAdapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC);
+
+	if (pHalData->dmpriv.bAPKdone && !IS_NORMAL_CHIP(pHalData->VersionID))
+	{
+		if (tmpval > pMptCtx->APK_bound[RF_PATH_A])
+			write_rfreg(pAdapter, RF_PATH_A, 0xe, pHalData->dmpriv.APKoutput[0][0]);
+		else
+			write_rfreg(pAdapter, RF_PATH_A, 0xe, pHalData->dmpriv.APKoutput[0][1]);
+	}
+
+	// HT Tx-rf(B)
+	tmpval = TxPower[RF_PATH_B];
+	TxAGC = (tmpval<<24) | (tmpval<<16) | (tmpval<<8) | tmpval;
+
+	write_bbreg(pAdapter, rTxAGC_B_Rate18_06, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_B_Rate54_24, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_B_Mcs03_Mcs00, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_B_Mcs07_Mcs04, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_B_Mcs11_Mcs08, bMaskDWord, TxAGC);
+	write_bbreg(pAdapter, rTxAGC_B_Mcs15_Mcs12, bMaskDWord, TxAGC);
+
+	if (pHalData->dmpriv.bAPKdone && !IS_NORMAL_CHIP(pHalData->VersionID))
+	{
+		if (tmpval > pMptCtx->APK_bound[RF_PATH_B])
+			write_rfreg(pAdapter, RF_PATH_B, 0xe, pHalData->dmpriv.APKoutput[1][0]);
+		else
+			write_rfreg(pAdapter, RF_PATH_B, 0xe, pHalData->dmpriv.APKoutput[1][1]);
+	}
+
+	RT_TRACE(_module_mp_, _drv_notice_,
+		 ("-SetOFDMTxPower: A[0x%02x] B[0x%02x]\n",
+		  TxPower[RF_PATH_A], TxPower[RF_PATH_B]));
+}
+
+
+void Hal_SetAntennaPathPower(PADAPTER pAdapter)
+{
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
+	u8 TxPowerLevel[MAX_RF_PATH_NUMS];
+	u8 rfPath;
+
+	TxPowerLevel[RF_PATH_A] = pAdapter->mppriv.txpoweridx;
+	TxPowerLevel[RF_PATH_B] = pAdapter->mppriv.txpoweridx_b;
+
+	switch (pAdapter->mppriv.antenna_tx)
+	{
+		case ANTENNA_A:
+		default:
+			rfPath = RF_PATH_A;
+			break;
+		case ANTENNA_B:
+			rfPath = RF_PATH_B;
+			break;
+		case ANTENNA_C:
+			rfPath = RF_PATH_C;
+			break;
+	}
+
+	switch (pHalData->rf_chip)
+	{
+		case RF_8225:
+		case RF_8256:
+		case RF_6052:
+			Hal_SetCCKTxPower(pAdapter, TxPowerLevel);
+			Hal_SetOFDMTxPower(pAdapter, TxPowerLevel);
+			break;
+
+		default:
+			break;
+	}
+}
+
+void Hal_SetDataRate(PADAPTER pAdapter)
+{
+	Hal_mpt_SwitchRfSetting(pAdapter);
+}
+
+void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+
+	if (bStart) {
+		RT_TRACE(_module_mp_, _drv_info_, ("SetOFDMContinuousTx: test start\n"));
+		// 1. if OFDM block on?
+		if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn))
+			write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);//set OFDM block on
+		{
+
+		// 2. set CCK test mode off, set to CCK normal mode
+		write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, bDisable);
+
+		// 3. turn on scramble setting
+		write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable);
+		}
+		// 4. Turn On Continue Tx and turn off the other test modes.
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bEnable);
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+	} else {
+		RT_TRACE(_module_mp_,_drv_info_, ("SetOFDMContinuousTx: test stop\n"));
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+		//Delay 10 ms
+		rtw_msleep_os(10);
+		//BB Reset
+		write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
+		write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
+	}
+
+	pAdapter->mppriv.MptCtx.bCckContTx = _FALSE;
+	pAdapter->mppriv.MptCtx.bOfdmContTx = bStart;
+}/* mpt_StartOfdmContTx */
+
+
+void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart)
+{
+	u32 cckrate;
+
+	if (bStart)
+	{
+		RT_TRACE(_module_mp_, _drv_alert_,
+			 ("SetCCKContinuousTx: test start\n"));
+
+		// 1. if CCK block on?
+		if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn))
+			write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);//set CCK block on
+
+		//Turn Off All Test Mode
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
+		write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+		//Set CCK Tx Test Rate
+		#if 0
+		switch(pAdapter->mppriv.rateidx)
+		{
+			case 2:
+				cckrate = 0;
+				break;
+			case 4:
+				cckrate = 1;
+				break;
+			case 11:
+				cckrate = 2;
+				break;
+			case 22:
+				cckrate = 3;
+				break;
+			default:
+				cckrate = 0;
+				break;
+		}
+		#else
+		cckrate  = pAdapter->mppriv.rateidx;
+		#endif
+		write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, cckrate);
+		write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2);	//transmit mode
+		write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); //turn on scramble setting
+
+#ifdef CONFIG_RTL8192C
+		// Patch for CCK 11M waveform
+		if (cckrate == MPT_RATE_1M)
+			write_bbreg(pAdapter, 0xA71, BIT(6), bDisable);
+		else
+			write_bbreg(pAdapter, 0xA71, BIT(6), bEnable);
+#endif
+
+	}
+	else {
+		RT_TRACE(_module_mp_, _drv_info_,
+			 ("SetCCKContinuousTx: test stop\n"));
+
+		write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0);	//normal mode
+		write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); //turn on scramble setting
+
+		//BB Reset
+		write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
+		write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
+	}
+
+	pAdapter->mppriv.MptCtx.bCckContTx = bStart;
+	pAdapter->mppriv.MptCtx.bOfdmContTx = _FALSE;
+}/* mpt_StartCckContTx */
+
+
+void Hal_ProSetCrystalCap (PADAPTER pAdapter , u32 CrystalCapVal)
+{
+	HAL_DATA_TYPE		*pHalData	= GET_HAL_DATA(pAdapter);
+
+	if(!IS_HARDWARE_TYPE_8192D(pAdapter))
+		return;
+
+	//CrystalCap = pHalData->CrystalCap;
+
+	PHY_SetBBReg(pAdapter, 0x24, 0xF0, CrystalCapVal & 0x0F);
+	PHY_SetBBReg(pAdapter, 0x28, 0xF0000000, (CrystalCapVal & 0xF0) >> 4);
+
+}
+
+
+#endif // CONFIG_MP_INCLUDED
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_phycfg.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_phycfg.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_phycfg.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_phycfg.c	2017-09-23 03:42:49.970675211 +0800
@@ -0,0 +1,7824 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+/******************************************************************************
+
+
+ Module:	rtl8192d_phycfg.c	
+
+ Note:		Merge 92DE/SDU PHY config as below
+			1. BB register R/W API
+ 			2. RF register R/W API
+ 			3. Initial BB/RF/MAC config by reading BB/MAC/RF txt.
+ 			3. Power setting API
+ 			4. Channel switch API
+ 			5. Initial gain switch API.
+ 			6. Other BB/MAC/RF API.
+ 			
+ Function:	PHY: Extern function, phy: local function
+ 		 
+ Export:	PHY_FunctionName
+
+ Abbrev:	NONE
+
+ History:
+	Data		Who		Remark	
+	08/08/2008  MHC    	1. Port from 9x series phycfg.c
+						2. Reorganize code arch and ad description.
+						3. Collect similar function.
+						4. Seperate extern/local API.
+	08/12/2008	MHC		We must merge or move USB PHY relative function later.
+	10/07/2008	MHC		Add IQ calibration for PHY.(Only 1T2R mode now!!!)
+	11/06/2008	MHC		Add TX Power index PG file to config in 0xExx register
+						area to map with EEPROM/EFUSE tx pwr index.
+	
+******************************************************************************/
+#define _HAL_8192D_PHYCFG_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtw_byteorder.h>
+
+#include <hal_init.h>
+#include <rtl8192d_hal.h>
+
+/*---------------------------Define Local Constant---------------------------*/
+/* Channel switch:The size of command tables for switch channel*/
+#define MAX_PRECMD_CNT 16
+#define MAX_RFDEPENDCMD_CNT 16
+#define MAX_POSTCMD_CNT 16
+
+#define MAX_DOZE_WAITING_TIMES_9x 64
+
+#define MAX_RF_IMR_INDEX 12
+#define MAX_RF_IMR_INDEX_NORMAL 13
+#define RF_REG_NUM_for_C_CUT_5G 	6
+#define RF_REG_NUM_for_C_CUT_5G_internalPA 	7
+#define RF_REG_NUM_for_C_CUT_2G 	5
+#define RF_CHNL_NUM_5G			19	
+#define RF_CHNL_NUM_5G_40M		17
+#define TARGET_CHNL_NUM_5G	221
+#define TARGET_CHNL_NUM_2G	14
+#define TARGET_CHNL_NUM_2G_5G	59
+#define CV_CURVE_CNT			64
+
+//static u32     RF_REG_FOR_5G_SWCHNL[MAX_RF_IMR_INDEX]={0,0x2f,0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x38,0x39,0x0};
+static u32     RF_REG_FOR_5G_SWCHNL_NORMAL[MAX_RF_IMR_INDEX_NORMAL]={0,0x2f,0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39,0x0};
+
+static u8	RF_REG_for_C_CUT_5G[RF_REG_NUM_for_C_CUT_5G] = 
+			{RF_SYN_G1,	RF_SYN_G2,	RF_SYN_G3,	RF_SYN_G4,	RF_SYN_G5,	RF_SYN_G6};
+
+static u8	RF_REG_for_C_CUT_5G_internalPA[RF_REG_NUM_for_C_CUT_5G_internalPA] = 
+			{0x0B,	0x48,	0x49,	0x4B,	0x03,	0x04, 	0x0E};
+static u8	RF_REG_for_C_CUT_2G[RF_REG_NUM_for_C_CUT_2G] = 
+			{RF_SYN_G1, RF_SYN_G2,	RF_SYN_G3,	RF_SYN_G7,	RF_SYN_G8};
+
+#if DBG
+static u32	RF_REG_MASK_for_C_CUT_2G[RF_REG_NUM_for_C_CUT_2G] = 
+			{BIT19|BIT18|BIT17|BIT14|BIT1, 	BIT10|BIT9,	
+			BIT18|BIT17|BIT16|BIT1,		BIT2|BIT1,	
+			BIT15|BIT14|BIT13|BIT12|BIT11};
+#endif  //amy, temp remove
+static u8	RF_CHNL_5G[RF_CHNL_NUM_5G] = 
+			{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140};
+static u8	RF_CHNL_5G_40M[RF_CHNL_NUM_5G_40M] = 
+			{38,42,46,50,54,58,62,102,106,110,114,118,122,126,130,134,138};
+
+static u32	RF_REG_Param_for_C_CUT_5G[5][RF_REG_NUM_for_C_CUT_5G] = {
+			{0xE43BE,	0xFC638,	0x77C0A,	0xDE471,	0xd7110,	0x8EB04},
+			{0xE43BE,	0xFC078,	0xF7C1A,	0xE0C71,	0xD7550,	0xAEB04},	
+			{0xE43BF,	0xFF038,	0xF7C0A,	0xDE471,	0xE5550,	0xAEB04},
+			{0xE43BF,	0xFF079,	0xF7C1A,	0xDE471,	0xE5550,	0xAEB04},
+			{0xE43BF,	0xFF038,	0xF7C1A,	0xDE471,	0xd7550,	0xAEB04}};
+
+static u32	RF_REG_Param_for_C_CUT_2G[3][RF_REG_NUM_for_C_CUT_2G] = {
+			{0x643BC,	0xFC038,	0x77C1A,	0x41289,	0x01840},
+			{0x643BC,	0xFC038,	0x07C1A,	0x41289,	0x01840},
+			{0x243BC,	0xFC438,	0x07C1A,	0x4128B,	0x0FC41}};
+
+#if SWLCK == 1
+static u32 RF_REG_SYN_G4_for_C_CUT_2G = 0xD1C31&0x7FF;
+#endif
+
+static u32	RF_REG_Param_for_C_CUT_5G_internalPA[3][RF_REG_NUM_for_C_CUT_5G_internalPA] = {
+			{0x01a00,	0x40443,	0x00eb5,	0x89bec,	0x94a12,	0x94a12,	0x94a12},
+			{0x01800,	0xc0443,	0x00730,	0x896ee,	0x94a52,	0x94a52,	0x94a52},	
+			{0x01800,	0xc0443,	0x00730,	0x896ee,	0x94a12,	0x94a12,	0x94a12}};
+
+
+
+//[mode][patha+b][reg]
+static u32 RF_IMR_Param_Normal[1][3][MAX_RF_IMR_INDEX_NORMAL]={{
+	{0x70000,0x00ff0,0x4400f,0x00ff0,0x0,0x0,0x0,0x0,0x0,0x64888,0xe266c,0x00090,0x22fff},// channel 1-14.
+	{0x70000,0x22880,0x4470f,0x55880,0x00070, 0x88000, 0x0,0x88080,0x70000,0x64a82,0xe466c,0x00090,0x32c9a}, //path 36-64
+	{0x70000,0x44880,0x4477f,0x77880,0x00070, 0x88000, 0x0,0x880b0,0x0,0x64b82,0xe466c,0x00090,0x32c9a} //100 -165
+}
+};
+
+//static u32 CurveIndex_5G[TARGET_CHNL_NUM_5G]={0};
+//static u32 CurveIndex_2G[TARGET_CHNL_NUM_2G]={0};
+static u32 CurveIndex[TARGET_CHNL_NUM_2G_5G]={0};
+
+static u32 TargetChnl_5G[TARGET_CHNL_NUM_5G] = {
+25141,	25116,	25091,	25066,	25041,
+25016,	24991,	24966,	24941,	24917,
+24892,	24867,	24843,	24818,	24794,
+24770,	24765,	24721,	24697,	24672,
+24648,	24624,	24600,	24576,	24552,
+24528,	24504,	24480,	24457,	24433,
+24409,	24385,	24362,	24338,	24315,
+24291,	24268,	24245,	24221,	24198,
+24175,	24151,	24128,	24105,	24082,
+24059,	24036,	24013,	23990,	23967,
+23945,	23922,	23899,	23876,	23854,
+23831,	23809,	23786,	23764,	23741,
+23719,	23697,	23674,	23652,	23630,
+23608,	23586,	23564,	23541,	23519,
+23498,	23476,	23454,	23432,	23410,
+23388,	23367,	23345,	23323,	23302,
+23280,	23259,	23237,	23216,	23194,
+23173,	23152,	23130,	23109,	23088,
+23067,	23046,	23025,	23003,	22982,
+22962,	22941,	22920,	22899,	22878,
+22857,	22837,	22816,	22795,	22775,
+22754,	22733,	22713,	22692,	22672,
+22652,	22631,	22611,	22591,	22570,
+22550,	22530,	22510,	22490,	22469,
+22449,	22429,	22409,	22390,	22370,
+22350,	22336,	22310,	22290,	22271,
+22251,	22231,	22212,	22192,	22173,
+22153,	22134,	22114,	22095,	22075,
+22056,	22037,	22017,	21998,	21979,
+21960,	21941,	21921,	21902,	21883,
+21864,	21845,	21826,	21807,	21789,
+21770,	21751,	21732,	21713,	21695,
+21676,	21657,	21639,	21620,	21602,
+21583,	21565,	21546,	21528,	21509,
+21491,	21473,	21454,	21436,	21418,
+21400,	21381,	21363,	21345,	21327,
+21309,	21291,	21273,	21255,	21237,
+21219,	21201,	21183,	21166,	21148,
+21130,	21112,	21095,	21077,	21059,
+21042,	21024,	21007,	20989,	20972,
+25679,	25653,	25627,	25601,	25575,
+25549,	25523,	25497,	25471,	25446,
+25420,	25394,	25369,	25343,	25318,
+25292,	25267,	25242,	25216,	25191,
+25166	};
+
+static u32 TargetChnl_2G[TARGET_CHNL_NUM_2G] = {	// channel 1~14
+26084, 26030, 25976, 25923, 25869, 25816, 25764,
+25711, 25658, 25606, 25554, 25502, 25451, 25328
+};
+
+/*---------------------------Define Local Constant---------------------------*/
+
+
+/*------------------------Define global variable-----------------------------*/
+#ifdef CONFIG_DUALMAC_CONCURRENT
+extern atomic_t GlobalCounterForMutex;
+#endif
+/*------------------------Define local variable------------------------------*/
+
+
+/*--------------------Define export function prototype-----------------------*/
+// Please refer to header file
+/*--------------------Define export function prototype-----------------------*/
+
+/*---------------------Define local function prototype-----------------------*/
+static VOID
+phy_PathAFillIQKMatrix(
+	IN PADAPTER	pAdapter,
+	IN BOOLEAN	bIQKOK,
+	IN int		result[][8],
+	IN u8		final_candidate,
+	IN BOOLEAN	bTxOnly
+	);
+
+static VOID
+phy_PathAFillIQKMatrix_5G_Normal(
+	IN PADAPTER	pAdapter,
+	IN BOOLEAN	bIQKOK,
+	IN int		result[][8],
+	IN u8		final_candidate,
+	IN BOOLEAN	bTxOnly
+	);
+
+static VOID
+phy_PathBFillIQKMatrix(
+	IN PADAPTER	pAdapter,
+	IN BOOLEAN	bIQKOK,
+	IN int		result[][8],
+	IN u8		final_candidate,
+	IN BOOLEAN	bTxOnly
+	);
+
+static VOID
+phy_PathBFillIQKMatrix_5G_Normal(
+	IN PADAPTER	pAdapter,
+	IN BOOLEAN	bIQKOK,
+	IN int		result[][8],
+	IN u8		final_candidate,
+	IN BOOLEAN	bTxOnly
+	);
+/*----------------------------Function Body----------------------------------*/
+
+static u8 GetRightChnlPlace(u8 chnl)
+{
+	u8	channel_5G[TARGET_CHNL_NUM_2G_5G] = {1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,100,102,104,106,108,110,112,114,116,118,120,122,124,126,128,130,132,134,136,138,140,149,151,153,155,157,159,161,163,165};
+	u8	place = chnl;
+
+	if(chnl > 14)
+	{
+		for(place = 14; place<sizeof(channel_5G); place++)
+		{
+			if(channel_5G[place] == chnl)
+			{
+				place++;
+				break;
+			}
+		}
+	}
+
+	return place;
+}
+
+static u8 GetChnlFromPlace(u8 place)
+{
+	u8	channel_5G[TARGET_CHNL_NUM_2G_5G] = {1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,100,102,104,106,108,110,112,114,116,118,120,122,124,126,128,130,132,134,136,138,140,149,151,153,155,157,159,161,163,165};
+
+	return channel_5G[place];
+}
+
+u8 rtl8192d_GetRightChnlPlaceforIQK(u8 chnl)
+{
+	u8	channel_all[TARGET_CHNL_NUM_2G_5G] = {1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,100,102,104,106,108,110,112,114,116,118,120,122,124,126,128,130,132,134,136,138,140,149,151,153,155,157,159,161,163,165};
+	u8	place = chnl;
+
+	
+	if(chnl > 14)
+	{
+		for(place = 14; place<sizeof(channel_all); place++)
+		{
+			if(channel_all[place] == chnl)
+			{
+				return place-13;
+			}
+		}
+	}
+
+	return 0;
+}
+
+
+//
+// 1. BB register R/W API
+//
+/**
+* Function:	phy_CalculateBitShift
+*
+* OverView:	Get shifted position of the BitMask
+*
+* Input:
+*			u4Byte		BitMask,	
+*
+* Output:	none
+* Return:		u4Byte		Return the shift bit bit position of the mask
+*/
+static	u32
+phy_CalculateBitShift(
+	u32 BitMask
+	)
+{
+	u32 i;
+
+	for(i=0; i<=31; i++)
+	{
+		if ( ((BitMask>>i) &  0x1 ) == 1)
+			break;
+	}
+
+	return (i);
+}
+
+//
+//To avoid miswrite Reg0x800 for 92D
+//
+VOID
+rtl8192d_PHY_SetBBReg1Byte(
+	IN	PADAPTER	Adapter,
+	IN	u32		RegAddr,
+	IN	u32		BitMask,
+	IN	u32		Data
+	)
+{
+	u32			OriginalValue, BitShift,offset = 0;
+       u8   			value=0;
+	   
+#if (DISABLE_BB_RF == 1)
+	return;
+#endif
+	// BitMask only support bit0~bit7 or bit8~bit15,bit16~bit23,bit24~bit31,should in 1 byte scale;
+	BitShift = phy_CalculateBitShift(BitMask);
+	offset = BitShift /8;
+
+	OriginalValue = rtw_read32(Adapter, RegAddr);
+	Data = ((OriginalValue & (~BitMask)) | ((Data << BitShift) & BitMask));
+
+	value =(u8)(Data>>(8*offset));
+
+	rtw_write8(Adapter, RegAddr+offset, value);
+	//RT_TRACE(COMP_INIT,DBG_TRACE,("Write Reg0x800 originalvalue %x  to set 1byte value %x Data %x offset %x \n",OriginalValue,value,Data,offset));
+
+}
+
+/**
+* Function:	PHY_QueryBBReg
+*
+* OverView:	Read "sepcific bits" from BB register
+*
+* Input:
+*			PADAPTER		Adapter,
+*			u4Byte			RegAddr,		//The target address to be readback
+*			u4Byte			BitMask		//The target bit position in the target address
+*										//to be readback	
+* Output:	None
+* Return:		u4Byte			Data			//The readback register value
+* Note:		This function is equal to "GetRegSetting" in PHY programming guide
+*/
+u32
+rtl8192d_PHY_QueryBBReg(
+	IN	PADAPTER	Adapter,
+	IN	u32		RegAddr,
+	IN	u32		BitMask
+	)
+{
+	#ifdef CONFIG_PCI_HCI
+	u8	DBIdirect = 0;
+	#endif //CONFIG_PCI_HCI
+  	u32	ReturnValue = 0, OriginalValue, BitShift;
+
+
+#if (DISABLE_BB_RF == 1)
+	return 0;
+#endif
+
+	//RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx)\n", RegAddr, BitMask));
+
+#ifdef CONFIG_PCI_HCI
+	if(RegAddr&MAC1_ACCESS_PHY0) //MAC1 use PHY0 wirte radio_A.
+		DBIdirect = BIT3;
+	else if(RegAddr&MAC0_ACCESS_PHY1) //MAC0 use PHY1 wirte radio_B.
+		DBIdirect = BIT3|BIT2;
+
+	if (DBIdirect)
+		OriginalValue = MpReadPCIDwordDBI8192D(Adapter, (u16)RegAddr&0xFFF, DBIdirect);  
+	else
+#endif
+	{
+		OriginalValue = rtw_read32(Adapter, RegAddr);
+	}
+	BitShift = phy_CalculateBitShift(BitMask);
+	ReturnValue = (OriginalValue & BitMask) >> BitShift;
+
+	//RTPRINT(FPHY, PHY_BBR, ("BBR MASK=0x%lx Addr[0x%lx]=0x%lx\n", BitMask, RegAddr, OriginalValue));
+	//RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx), OriginalValue(%#lx)\n", RegAddr, BitMask, OriginalValue));
+
+	return (ReturnValue);
+
+}
+
+
+/**
+* Function:	PHY_SetBBReg
+*
+* OverView:	Write "Specific bits" to BB register (page 8~) 
+*
+* Input:
+*			PADAPTER		Adapter,
+*			u4Byte			RegAddr,		//The target address to be modified
+*			u4Byte			BitMask		//The target bit position in the target address
+*										//to be modified	
+*			u4Byte			Data			//The new register value in the target bit position
+*										//of the target address			
+*
+* Output:	None
+* Return:		None
+* Note:		This function is equal to "PutRegSetting" in PHY programming guide
+*/
+
+VOID
+rtl8192d_PHY_SetBBReg(
+	IN	PADAPTER	Adapter,
+	IN	u32		RegAddr,
+	IN	u32		BitMask,
+	IN	u32		Data
+	)
+{
+#ifdef CONFIG_PCI_HCI
+	u8	DBIdirect=0;
+#endif //CONFIG_PCI_HCI
+	u32	OriginalValue, BitShift;
+
+#if (DISABLE_BB_RF == 1)
+	return;
+#endif
+
+#ifdef CONFIG_PCI_HCI
+	if(RegAddr&MAC1_ACCESS_PHY0) //MAC1 use PHY0 wirte radio_A.
+		DBIdirect = BIT3;
+	else if(RegAddr&MAC0_ACCESS_PHY1) //MAC0 use PHY1 wirte radio_B.
+		DBIdirect = BIT3|BIT2;
+#endif
+
+	//RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data));
+
+	if(BitMask!= bMaskDWord)
+	{//if not "double word" write
+#ifdef CONFIG_PCI_HCI
+		if (DBIdirect)
+		{
+			OriginalValue = MpReadPCIDwordDBI8192D(Adapter, (u16)RegAddr&0xFFF, DBIdirect);  
+		}
+		else
+#endif
+		{
+			OriginalValue = rtw_read32(Adapter, RegAddr);
+		}
+		BitShift = phy_CalculateBitShift(BitMask);
+		Data = ((OriginalValue & (~BitMask)) | ((Data << BitShift) & BitMask));
+	}
+
+#ifdef CONFIG_PCI_HCI
+	if (DBIdirect)
+	{
+		MpWritePCIDwordDBI8192D(Adapter, 
+					(u16)RegAddr&0xFFF, 
+					Data,
+					DBIdirect);
+	}
+	else
+#endif
+	{
+		rtw_write32(Adapter, RegAddr, Data);
+	}
+
+	//RTPRINT(FPHY, PHY_BBW, ("BBW MASK=0x%lx Addr[0x%lx]=0x%lx\n", BitMask, RegAddr, Data));
+	//RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data));
+	
+}
+
+
+//
+// 2. RF register R/W API
+//
+/*-----------------------------------------------------------------------------
+ * Function:	phy_FwRFSerialRead()
+ *
+ * Overview:	We support firmware to execute RF-R/W.
+ *
+ * Input:		NONE
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	01/21/2008	MHC		Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+#ifndef PLATFORM_FREEBSD   //amy, temp remove
+static	u32
+phy_FwRFSerialRead(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset	)
+{
+	u32		retValue = 0;		
+	//RT_ASSERT(FALSE,("deprecate!\n"));
+	return	(retValue);
+
+}	/* phy_FwRFSerialRead */
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	phy_FwRFSerialWrite()
+ *
+ * Overview:	We support firmware to execute RF-R/W.
+ *
+ * Input:		NONE
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	01/21/2008	MHC		Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+static	VOID
+phy_FwRFSerialWrite(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset,
+	IN	u32				Data	)
+{
+	//RT_ASSERT(FALSE,("deprecate!\n"));
+}
+#endif //PLATFORM_FREEBSD amy, temp remove
+
+/**
+* Function:	phy_RFSerialRead
+*
+* OverView:	Read regster from RF chips 
+*
+* Input:
+*			PADAPTER		Adapter,
+*			RF_RADIO_PATH_E	eRFPath,	//Radio path of A/B/C/D
+*			u4Byte			Offset,		//The target address to be read			
+*
+* Output:	None
+* Return:		u4Byte			reback value
+* Note:		Threre are three types of serial operations: 
+*			1. Software serial write
+*			2. Hardware LSSI-Low Speed Serial Interface 
+*			3. Hardware HSSI-High speed
+*			serial write. Driver need to implement (1) and (2).
+*			This function is equal to the combination of RF_ReadReg() and  RFLSSIRead()
+*/
+static	u32
+phy_RFSerialRead(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset
+	)
+{
+	u32	retValue = 0;
+	HAL_DATA_TYPE				*pHalData = GET_HAL_DATA(Adapter);
+	BB_REGISTER_DEFINITION_T	*pPhyReg = &pHalData->PHYRegDef[eRFPath];
+	u32	NewOffset;
+	u32 	tmplong,tmplong2;
+	u8	RfPiEnable=0;
+	u8	i;
+	u32	MaskforPhyAccess=0;
+#if 0
+	if(pHalData->RFChipID == RF_8225 && Offset > 0x24) //36 valid regs
+		return	retValue;
+	if(pHalData->RFChipID == RF_8256 && Offset > 0x2D) //45 valid regs
+		return	retValue;
+#endif
+	//
+	// Make sure RF register offset is correct 
+	//
+	if(Offset & MAC1_ACCESS_PHY0)
+		MaskforPhyAccess = MAC1_ACCESS_PHY0;
+	else if(Offset & MAC0_ACCESS_PHY1)
+		MaskforPhyAccess = MAC0_ACCESS_PHY1;
+
+	Offset &=0xFF;
+	//92D RF offset >0x3f
+
+	//
+	// Switch page for 8256 RF IC
+	//
+	NewOffset = Offset;
+
+	// 2009/06/17 MH We can not execute IO for power save or other accident mode.
+	//if(RT_CANNOT_IO(Adapter))
+	//{
+	//	RTPRINT(FPHY, PHY_RFR, ("phy_RFSerialRead return all one\n"));
+	//	return	0xFFFFFFFF;
+	//}
+
+	// For 92S LSSI Read RFLSSIRead
+	// For RF A/B write 0x824/82c(does not work in the future) 
+	// We must use 0x824 for RF A and B to execute read trigger
+	tmplong = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhyAccess, bMaskDWord);
+	tmplong |= 0x390004; //by yn.
+	if(eRFPath == RF_PATH_A)
+		tmplong2 = tmplong;
+	else
+		tmplong2 = PHY_QueryBBReg(Adapter, pPhyReg->rfHSSIPara2|MaskforPhyAccess, bMaskDWord);
+	tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset<<23) | bLSSIReadEdge;	//T65 RF
+	tmplong2 |= 0x390004;
+	PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhyAccess, bMaskDWord, tmplong&(~bLSSIReadEdge));
+	//rtw_udelay_os(1000);
+	rtw_udelay_os(10);
+	
+	PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2|MaskforPhyAccess, bMaskDWord, tmplong2);	
+	//rtw_udelay_os(1000);
+	for(i=0;i<2;i++)
+		rtw_udelay_os(MAX_STALL_TIME);
+	
+	PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhyAccess, bMaskDWord, tmplong|bLSSIReadEdge);
+	//rtw_udelay_os(1000);
+	rtw_udelay_os(10);
+
+	if(eRFPath == RF_PATH_A)
+		RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1|MaskforPhyAccess, BIT8);
+	else if(eRFPath == RF_PATH_B)
+		RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1|MaskforPhyAccess, BIT8);
+	
+	if(RfPiEnable)
+	{	// Read from BBreg8b8, 12 bits for 8190, 20bits for T65 RF
+		retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi|MaskforPhyAccess, bLSSIReadBackData);
+		//RTPRINT(FINIT, INIT_RF, ("Readback from RF-PI : 0x%x\n", retValue));
+	}
+	else
+	{	//Read from BBreg8a0, 12 bits for 8190, 20 bits for T65 RF
+		retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack|MaskforPhyAccess, bLSSIReadBackData);
+		//RTPRINT(FINIT, INIT_RF,("Readback from RF-SI : 0x%x\n", retValue));
+	}
+	//RTPRINT(FPHY, PHY_RFR, ("RFR-%d Addr[0x%lx]=0x%lx\n", eRFPath, pPhyReg->rfLSSIReadBack, retValue));
+	
+	return retValue;	
+		
+}
+
+
+
+/**
+* Function:	phy_RFSerialWrite
+*
+* OverView:	Write data to RF register (page 8~) 
+*
+* Input:
+*			PADAPTER		Adapter,
+*			RF_RADIO_PATH_E	eRFPath,	//Radio path of A/B/C/D
+*			u4Byte			Offset,		//The target address to be read			
+*			u4Byte			Data			//The new register Data in the target bit position
+*										//of the target to be read			
+*
+* Output:	None
+* Return:		None
+* Note:		Threre are three types of serial operations: 
+*			1. Software serial write
+*			2. Hardware LSSI-Low Speed Serial Interface 
+*			3. Hardware HSSI-High speed
+*			serial write. Driver need to implement (1) and (2).
+*			This function is equal to the combination of RF_ReadReg() and  RFLSSIRead()
+ *
+ * Note: 		  For RF8256 only
+ *			 The total count of RTL8256(Zebra4) register is around 36 bit it only employs 
+ *			 4-bit RF address. RTL8256 uses "register mode control bit" (Reg00[12], Reg00[10]) 
+ *			 to access register address bigger than 0xf. See "Appendix-4 in PHY Configuration
+ *			 programming guide" for more details. 
+ *			 Thus, we define a sub-finction for RTL8526 register address conversion
+ *		       ===========================================================
+ *			 Register Mode		RegCTL[1]		RegCTL[0]		Note
+ *								(Reg00[12])		(Reg00[10])
+ *		       ===========================================================
+ *			 Reg_Mode0				0				x			Reg 0 ~15(0x0 ~ 0xf)
+ *		       ------------------------------------------------------------------
+ *			 Reg_Mode1				1				0			Reg 16 ~30(0x1 ~ 0xf)
+ *		       ------------------------------------------------------------------
+ *			 Reg_Mode2				1				1			Reg 31 ~ 45(0x1 ~ 0xf)
+ *		       ------------------------------------------------------------------
+ *
+ *	2008/09/02	MH	Add 92S RF definition
+ *	
+ *
+ *
+*/
+static	VOID
+phy_RFSerialWrite(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset,
+	IN	u32				Data
+	)
+{
+	u32	DataAndAddr = 0;
+	HAL_DATA_TYPE				*pHalData = GET_HAL_DATA(Adapter);
+	BB_REGISTER_DEFINITION_T	*pPhyReg = &pHalData->PHYRegDef[eRFPath];
+	u32	NewOffset,MaskforPhyAccess=0;
+	
+#if 0
+	//<Roger_TODO> We should check valid regs for RF_6052 case.
+	if(pHalData->RFChipID == RF_8225 && Offset > 0x24) //36 valid regs
+		return;
+	if(pHalData->RFChipID == RF_8256 && Offset > 0x2D) //45 valid regs
+		return;
+#endif
+
+	// 2009/06/17 MH We can not execute IO for power save or other accident mode.
+	//if(RT_CANNOT_IO(Adapter))
+	//{
+	//	RTPRINT(FPHY, PHY_RFW, ("phy_RFSerialWrite stop\n"));
+	//	return;
+	//}
+
+	if(Offset & MAC1_ACCESS_PHY0)
+		MaskforPhyAccess = MAC1_ACCESS_PHY0;
+	else if(Offset & MAC0_ACCESS_PHY1)
+		MaskforPhyAccess = MAC0_ACCESS_PHY1;
+
+	Offset &=0xFF;
+
+	//
+	//92D RF offset >0x3f
+
+	//
+	// Shadow Update
+	//
+	//PHY_RFShadowWrite(Adapter, eRFPath, Offset, Data);	
+
+	//
+	// Switch page for 8256 RF IC
+	//
+	NewOffset = Offset;
+
+	//
+	// Put write addr in [5:0]  and write data in [31:16]
+	//
+	//DataAndAddr = (Data<<16) | (NewOffset&0x3f);
+	DataAndAddr = ((NewOffset<<20) | (Data&0x000fffff)) & 0x0fffffff;	// T65 RF
+
+	//
+	// Write Operation
+	//
+	PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset|MaskforPhyAccess, bMaskDWord, DataAndAddr);
+	//RTPRINT(FPHY, PHY_RFW, ("RFW-%d Addr[0x%lx]=0x%lx\n", eRFPath, pPhyReg->rf3wireOffset, DataAndAddr));
+
+}
+
+
+/**
+* Function:	PHY_QueryRFReg
+*
+* OverView:	Query "Specific bits" to RF register (page 8~) 
+*
+* Input:
+*			PADAPTER		Adapter,
+*			RF_RADIO_PATH_E	eRFPath,	//Radio path of A/B/C/D
+*			u4Byte			RegAddr,		//The target address to be read
+*			u4Byte			BitMask		//The target bit position in the target address
+*										//to be read	
+*
+* Output:	None
+* Return:		u4Byte			Readback value
+* Note:		This function is equal to "GetRFRegSetting" in PHY programming guide
+*/
+u32
+rtl8192d_PHY_QueryRFReg(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				RegAddr,
+	IN	u32				BitMask
+	)
+{
+	u32 Original_Value, Readback_Value, BitShift;	
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	//u8	RFWaitCounter = 0;
+
+#if (DISABLE_BB_RF == 1)
+	return 0;
+#endif
+
+	if(!pHalData->bPhyValueInitReady)
+		return 0;
+
+	//RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryRFReg(): RegAddr(%#lx), eRFPath(%#x), BitMask(%#lx)\n", RegAddr, eRFPath,BitMask));
+	
+#ifdef CONFIG_USB_HCI
+	//PlatformAcquireMutex(&pHalData->mxRFOperate);
+#else
+	//PlatformAcquireSpinLock(Adapter, RT_RF_OPERATE_SPINLOCK);
+#endif
+
+#ifdef CONFIG_USB_HCI
+	if(pHalData->bReadRFbyFW)
+	{
+		Original_Value = rtw_read32(Adapter,(0x66<<24|eRFPath<<16)|RegAddr ); //0x66 Just a identifier.by wl
+	}
+	else
+#endif
+	{
+		Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr);
+	}
+	
+	BitShift =  phy_CalculateBitShift(BitMask);
+	Readback_Value = (Original_Value & BitMask) >> BitShift;	
+
+#ifdef CONFIG_USB_HCI
+	//PlatformReleaseMutex(&pHalData->mxRFOperate);
+#else
+	//PlatformReleaseSpinLock(Adapter, RT_RF_OPERATE_SPINLOCK);
+#endif
+
+
+	//RTPRINT(FPHY, PHY_RFR, ("RFR-%d MASK=0x%lx Addr[0x%lx]=0x%lx\n", eRFPath, BitMask, RegAddr, Original_Value));//BitMask(%#lx),BitMask,
+	//RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_QueryRFReg(): RegAddr(%#lx), eRFPath(%#x),  Original_Value(%#lx)\n", 
+	//				RegAddr, eRFPath, Original_Value));
+	
+	return (Readback_Value);
+}
+
+/**
+* Function:	PHY_SetRFReg
+*
+* OverView:	Write "Specific bits" to RF register (page 8~) 
+*
+* Input:
+*			PADAPTER		Adapter,
+*			RF_RADIO_PATH_E	eRFPath,	//Radio path of A/B/C/D
+*			u4Byte			RegAddr,		//The target address to be modified
+*			u4Byte			BitMask		//The target bit position in the target address
+*										//to be modified	
+*			u4Byte			Data			//The new register Data in the target bit position
+*										//of the target address			
+*
+* Output:	None
+* Return:		None
+* Note:		This function is equal to "PutRFRegSetting" in PHY programming guide
+*/
+VOID
+rtl8192d_PHY_SetRFReg(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				RegAddr,
+	IN	u32				BitMask,
+	IN	u32				Data
+	)
+{
+
+	HAL_DATA_TYPE	*pHalData		= GET_HAL_DATA(Adapter);
+	//u1Byte			RFWaitCounter	= 0;
+	u32 			Original_Value, BitShift;
+
+#if (DISABLE_BB_RF == 1)
+	return;
+#endif
+
+	if(!pHalData->bPhyValueInitReady)
+		return;
+
+	if(BitMask == 0)
+		return;
+
+	//RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", 
+	//	RegAddr, BitMask, Data, eRFPath));
+	//RTPRINT(FINIT, INIT_RF, ("PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", 
+	//	RegAddr, BitMask, Data, eRFPath));
+
+
+#ifdef CONFIG_USB_HCI
+	//PlatformAcquireMutex(&pHalData->mxRFOperate);
+#else
+	//PlatformAcquireSpinLock(Adapter, RT_RF_OPERATE_SPINLOCK);
+#endif
+
+	
+	// RF data is 12 bits only
+	if (BitMask != bRFRegOffsetMask) 
+	{
+		Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr);
+		BitShift =  phy_CalculateBitShift(BitMask);
+		Data = (((Original_Value) & (~BitMask)) | (Data<< BitShift));
+	}
+		
+	phy_RFSerialWrite(Adapter, eRFPath, RegAddr, Data);
+	
+
+
+#ifdef CONFIG_USB_HCI
+	//PlatformReleaseMutex(&pHalData->mxRFOperate);
+#else
+	//PlatformReleaseSpinLock(Adapter, RT_RF_OPERATE_SPINLOCK);
+#endif
+	
+	//PHY_QueryRFReg(Adapter,eRFPath,RegAddr,BitMask);
+	//RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", 
+	//		RegAddr, BitMask, Data, eRFPath));
+
+}
+
+
+//
+// 3. Initial MAC/BB/RF config by reading MAC/BB/RF txt.
+//
+
+/*-----------------------------------------------------------------------------
+ * Function:    phy_ConfigMACWithParaFile()
+ *
+ * Overview:    This function read BB parameters from general file format, and do register
+ *			  Read/Write 
+ *
+ * Input:      	PADAPTER		Adapter
+ *			ps1Byte 			pFileName			
+ *
+ * Output:      NONE
+ *
+ * Return:      RT_STATUS_SUCCESS: configuration file exist
+ *			
+ * Note: 		The format of MACPHY_REG.txt is different from PHY and RF. 
+ *			[Register][Mask][Value]
+ *---------------------------------------------------------------------------*/
+#ifndef CONFIG_EMBEDDED_FWIMG
+static	int
+phy_ConfigMACWithParaFile(
+	IN	PADAPTER		Adapter,
+	IN	u8* 			pFileName
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	
+	int		rtStatus = _SUCCESS;
+
+	return rtStatus;
+}
+#endif //CONFIG_EMBEDDED_FWIMG
+/*-----------------------------------------------------------------------------
+ * Function:    phy_ConfigMACWithHeaderFile()
+ *
+ * Overview:    This function read BB parameters from Header file we gen, and do register
+ *			  Read/Write 
+ *
+ * Input:      	PADAPTER		Adapter
+ *			ps1Byte 			pFileName			
+ *
+ * Output:      NONE
+ *
+ * Return:      RT_STATUS_SUCCESS: configuration file exist
+ *			
+ * Note: 		The format of MACPHY_REG.txt is different from PHY and RF. 
+ *			[Register][Mask][Value]
+ *---------------------------------------------------------------------------*/
+static	int
+phy_ConfigMACWithHeaderFile(
+	IN	PADAPTER		Adapter
+)
+{
+	u32					i = 0;
+	u32					ArrayLength = 0;
+	u32*				ptrArray;	
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+
+	//2008.11.06 Modified by tynli.
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Read Rtl819XMACPHY_Array\n"));
+
+	ArrayLength = Rtl8192D_MAC_ArrayLength;
+	ptrArray = (u32 *)Rtl8192D_MAC_Array;
+	//RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> phy_ConfigMACWithHeaderFile() Img:Rtl819XMAC_Array\n"));
+
+	for(i = 0 ;i < ArrayLength;i=i+2){ // Add by tynli for 2 column
+		rtw_write8(Adapter, ptrArray[i], (u8)ptrArray[i+1]);
+	}
+	
+	return _SUCCESS;
+	
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:    PHY_MACConfig8192C
+ *
+ * Overview:	Condig MAC by header file or parameter file.
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ *  When		Who		Remark
+ *  08/12/2008	MHC		Create Version 0.
+ *
+ *---------------------------------------------------------------------------*/
+extern	int
+PHY_MACConfig8192D(
+	IN	PADAPTER	Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	char		*pszMACRegFile;
+	char		sz92DMACRegFile[] = RTL8192D_PHY_MACREG;
+	int		rtStatus = _SUCCESS;
+
+	if(Adapter->bSurpriseRemoved){
+		rtStatus = _FAIL;
+		return rtStatus;
+	}
+
+	pszMACRegFile = sz92DMACRegFile;
+
+	//
+	// Config MAC
+	//
+#ifdef CONFIG_EMBEDDED_FWIMG
+	rtStatus = phy_ConfigMACWithHeaderFile(Adapter);
+#else
+	
+	// Not make sure EEPROM, add later
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Read MACREG.txt\n"));
+	rtStatus = phy_ConfigMACWithParaFile(Adapter, pszMACRegFile);
+#endif
+
+	if(pHalData->MacPhyMode92D == SINGLEMAC_SINGLEPHY)
+	{
+		//improve 2-stream TX EVM by Jenyu
+		//rtw_write8(Adapter, 0x14,0x71);
+		// 2010.07.13 AMPDU aggregation number 9
+		//rtw_write16(Adapter, REG_MAX_AGGR_NUM, MAX_AGGR_NUM);
+		rtw_write8(Adapter, REG_MAX_AGGR_NUM, 0x0B); //By tynli. 2010.11.18.
+	}
+	else
+		rtw_write8(Adapter, REG_MAX_AGGR_NUM, 0x07); //92D need to test to decide the num.
+
+	return rtStatus;
+
+}
+
+
+/**
+* Function:	phy_InitBBRFRegisterDefinition
+*
+* OverView:	Initialize Register definition offset for Radio Path A/B/C/D
+*
+* Input:
+*			PADAPTER		Adapter,
+*
+* Output:	None
+* Return:		None
+* Note:		The initialization value is constant and it should never be changes
+*/
+static	VOID
+phy_InitBBRFRegisterDefinition(
+	IN	PADAPTER		Adapter
+)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);	
+
+	// RF Interface Sowrtware Control
+	pHalData->PHYRegDef[RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 LSBs if read 32-bit from 0x870
+	pHalData->PHYRegDef[RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 MSBs if read 32-bit from 0x870 (16-bit for 0x872)
+	pHalData->PHYRegDef[RF_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW;// 16 LSBs if read 32-bit from 0x874
+	pHalData->PHYRegDef[RF_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW;// 16 MSBs if read 32-bit from 0x874 (16-bit for 0x876)
+
+	// RF Interface Readback Value
+	pHalData->PHYRegDef[RF_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB; // 16 LSBs if read 32-bit from 0x8E0	
+	pHalData->PHYRegDef[RF_PATH_B].rfintfi = rFPGA0_XAB_RFInterfaceRB;// 16 MSBs if read 32-bit from 0x8E0 (16-bit for 0x8E2)
+	pHalData->PHYRegDef[RF_PATH_C].rfintfi = rFPGA0_XCD_RFInterfaceRB;// 16 LSBs if read 32-bit from 0x8E4
+	pHalData->PHYRegDef[RF_PATH_D].rfintfi = rFPGA0_XCD_RFInterfaceRB;// 16 MSBs if read 32-bit from 0x8E4 (16-bit for 0x8E6)
+
+	// RF Interface Output (and Enable)
+	pHalData->PHYRegDef[RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x860
+	pHalData->PHYRegDef[RF_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x864
+
+	// RF Interface (Output and)  Enable
+	pHalData->PHYRegDef[RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862)
+	pHalData->PHYRegDef[RF_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x864 (16-bit for 0x866)
+
+	//Addr of LSSI. Wirte RF register by driver
+	pHalData->PHYRegDef[RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; //LSSI Parameter
+	pHalData->PHYRegDef[RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter;
+
+	// RF parameter
+	pHalData->PHYRegDef[RF_PATH_A].rfLSSI_Select = rFPGA0_XAB_RFParameter;  //BB Band Select
+	pHalData->PHYRegDef[RF_PATH_B].rfLSSI_Select = rFPGA0_XAB_RFParameter;
+	pHalData->PHYRegDef[RF_PATH_C].rfLSSI_Select = rFPGA0_XCD_RFParameter;
+	pHalData->PHYRegDef[RF_PATH_D].rfLSSI_Select = rFPGA0_XCD_RFParameter;
+
+	// Tx AGC Gain Stage (same for all path. Should we remove this?)
+	pHalData->PHYRegDef[RF_PATH_A].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage
+	pHalData->PHYRegDef[RF_PATH_B].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage
+	pHalData->PHYRegDef[RF_PATH_C].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage
+	pHalData->PHYRegDef[RF_PATH_D].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage
+
+	// Tranceiver A~D HSSI Parameter-1
+	pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1;  //wire control parameter1
+	pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1;  //wire control parameter1
+
+	// Tranceiver A~D HSSI Parameter-2
+	pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2;  //wire control parameter2
+	pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2;  //wire control parameter2
+
+	// RF switch Control
+	pHalData->PHYRegDef[RF_PATH_A].rfSwitchControl = rFPGA0_XAB_SwitchControl; //TR/Ant switch control
+	pHalData->PHYRegDef[RF_PATH_B].rfSwitchControl = rFPGA0_XAB_SwitchControl;
+	pHalData->PHYRegDef[RF_PATH_C].rfSwitchControl = rFPGA0_XCD_SwitchControl;
+	pHalData->PHYRegDef[RF_PATH_D].rfSwitchControl = rFPGA0_XCD_SwitchControl;
+
+	// AGC control 1 
+	pHalData->PHYRegDef[RF_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1;
+	pHalData->PHYRegDef[RF_PATH_B].rfAGCControl1 = rOFDM0_XBAGCCore1;
+	pHalData->PHYRegDef[RF_PATH_C].rfAGCControl1 = rOFDM0_XCAGCCore1;
+	pHalData->PHYRegDef[RF_PATH_D].rfAGCControl1 = rOFDM0_XDAGCCore1;
+
+	// AGC control 2 
+	pHalData->PHYRegDef[RF_PATH_A].rfAGCControl2 = rOFDM0_XAAGCCore2;
+	pHalData->PHYRegDef[RF_PATH_B].rfAGCControl2 = rOFDM0_XBAGCCore2;
+	pHalData->PHYRegDef[RF_PATH_C].rfAGCControl2 = rOFDM0_XCAGCCore2;
+	pHalData->PHYRegDef[RF_PATH_D].rfAGCControl2 = rOFDM0_XDAGCCore2;
+
+	// RX AFE control 1 
+	pHalData->PHYRegDef[RF_PATH_A].rfRxIQImbalance = rOFDM0_XARxIQImbalance;
+	pHalData->PHYRegDef[RF_PATH_B].rfRxIQImbalance = rOFDM0_XBRxIQImbalance;
+	pHalData->PHYRegDef[RF_PATH_C].rfRxIQImbalance = rOFDM0_XCRxIQImbalance;
+	pHalData->PHYRegDef[RF_PATH_D].rfRxIQImbalance = rOFDM0_XDRxIQImbalance;	
+
+	// RX AFE control 1  
+	pHalData->PHYRegDef[RF_PATH_A].rfRxAFE = rOFDM0_XARxAFE;
+	pHalData->PHYRegDef[RF_PATH_B].rfRxAFE = rOFDM0_XBRxAFE;
+	pHalData->PHYRegDef[RF_PATH_C].rfRxAFE = rOFDM0_XCRxAFE;
+	pHalData->PHYRegDef[RF_PATH_D].rfRxAFE = rOFDM0_XDRxAFE;	
+
+	// Tx AFE control 1 
+	pHalData->PHYRegDef[RF_PATH_A].rfTxIQImbalance = rOFDM0_XATxIQImbalance;
+	pHalData->PHYRegDef[RF_PATH_B].rfTxIQImbalance = rOFDM0_XBTxIQImbalance;
+	pHalData->PHYRegDef[RF_PATH_C].rfTxIQImbalance = rOFDM0_XCTxIQImbalance;
+	pHalData->PHYRegDef[RF_PATH_D].rfTxIQImbalance = rOFDM0_XDTxIQImbalance;	
+
+	// Tx AFE control 2 
+	pHalData->PHYRegDef[RF_PATH_A].rfTxAFE = rOFDM0_XATxAFE;
+	pHalData->PHYRegDef[RF_PATH_B].rfTxAFE = rOFDM0_XBTxAFE;
+	pHalData->PHYRegDef[RF_PATH_C].rfTxAFE = rOFDM0_XCTxAFE;
+	pHalData->PHYRegDef[RF_PATH_D].rfTxAFE = rOFDM0_XDTxAFE;	
+
+	// Tranceiver LSSI Readback SI mode 
+	pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack;
+	pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack;
+	pHalData->PHYRegDef[RF_PATH_C].rfLSSIReadBack = rFPGA0_XC_LSSIReadBack;
+	pHalData->PHYRegDef[RF_PATH_D].rfLSSIReadBack = rFPGA0_XD_LSSIReadBack;	
+
+	// Tranceiver LSSI Readback PI mode 
+	pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback;
+	pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback;
+	//pHalData->PHYRegDef[RF_PATH_C].rfLSSIReadBackPi = rFPGA0_XC_LSSIReadBack;
+	//pHalData->PHYRegDef[RF_PATH_D].rfLSSIReadBackPi = rFPGA0_XD_LSSIReadBack;	
+	pHalData->bPhyValueInitReady = _TRUE;
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:    phy_ConfigBBWithHeaderFile()
+ *
+ * Overview:    This function read BB parameters from general file format, and do register
+ *			  Read/Write 
+ *
+ * Input:      	PADAPTER		Adapter
+ *			u1Byte 			ConfigType     0 => PHY_CONFIG
+ *										 1 =>AGC_TAB
+ *
+ * Output:      NONE
+ *
+ * Return:      RT_STATUS_SUCCESS: configuration file exist
+ *			
+ *---------------------------------------------------------------------------*/
+static	int
+phy_ConfigBBWithHeaderFile(
+	IN	PADAPTER		Adapter,
+	IN	u8 			ConfigType
+)
+{
+	int i;
+	u32*	Rtl819XPHY_REGArray_Table;
+	u32*	Rtl819XAGCTAB_Array_Table=NULL;
+	u32*	Rtl819XAGCTAB_5GArray_Table=NULL;
+	u16	PHY_REGArrayLen=0, AGCTAB_ArrayLen=0, AGCTAB_5GArrayLen=0;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+
+	//Normal chip,Mac0 use AGC_TAB.txt for 2G and 5G band.
+	if(pHalData->interfaceIndex == 0)
+	{
+		AGCTAB_ArrayLen = Rtl8192D_AGCTAB_ArrayLength;
+		Rtl819XAGCTAB_Array_Table = (u32 *)Rtl8192D_AGCTAB_Array;
+		//RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() phy:MAC0, Rtl819XAGCTAB_Array\n"));
+	}
+	else
+	{
+		if(pHalData->CurrentBandType92D == BAND_ON_2_4G)
+		{
+			AGCTAB_ArrayLen = Rtl8192D_AGCTAB_2GArrayLength;
+			Rtl819XAGCTAB_Array_Table = (u32 *)Rtl8192D_AGCTAB_2GArray;
+			//RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() phy:MAC1, Rtl819XAGCTAB_2GArray\n"));
+		}
+		else
+		{
+			AGCTAB_5GArrayLen = Rtl8192D_AGCTAB_5GArrayLength;
+			Rtl819XAGCTAB_5GArray_Table = (u32 *)Rtl8192D_AGCTAB_5GArray;
+			//RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() phy:MAC1, Rtl819XAGCTAB_5GArray\n"));
+		}
+	}
+
+	PHY_REGArrayLen = Rtl8192D_PHY_REG_2TArrayLength;
+	Rtl819XPHY_REGArray_Table = (u32 *)Rtl8192D_PHY_REG_2TArray;
+	//RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() phy:Rtl819XPHY_REG_Array_PG\n"));
+
+	if(ConfigType == BaseBand_Config_PHY_REG)
+	{
+		for(i=0;i<PHY_REGArrayLen;i=i+2)
+		{
+			if (Rtl819XPHY_REGArray_Table[i] == 0xfe) {
+				#ifdef CONFIG_LONG_DELAY_ISSUE
+				rtw_msleep_os(50);
+				#else
+				rtw_mdelay_os(50);
+				#endif
+			}
+			else if (Rtl819XPHY_REGArray_Table[i] == 0xfd)
+				rtw_mdelay_os(5);
+			else if (Rtl819XPHY_REGArray_Table[i] == 0xfc)
+				rtw_mdelay_os(1);
+			else if (Rtl819XPHY_REGArray_Table[i] == 0xfb)
+				rtw_udelay_os(50);
+			else if (Rtl819XPHY_REGArray_Table[i] == 0xfa)
+				rtw_udelay_os(5);
+			else if (Rtl819XPHY_REGArray_Table[i] == 0xf9)
+				rtw_udelay_os(1);
+			else if (Rtl819XPHY_REGArray_Table[i] == 0xa24)
+				pdmpriv->RegA24 = Rtl819XPHY_REGArray_Table[i+1];			
+			PHY_SetBBReg(Adapter, Rtl819XPHY_REGArray_Table[i], bMaskDWord, Rtl819XPHY_REGArray_Table[i+1]);		
+
+			// Add 1us delay between BB/RF register setting.
+			rtw_udelay_os(1);
+
+			//RT_TRACE(COMP_INIT, DBG_TRACE, ("The Rtl819XPHY_REGArray_Table[0] is %lx Rtl819XPHY_REGArray[1] is %lx \n",Rtl819XPHY_REGArray_Table[i], Rtl819XPHY_REGArray_Table[i+1]));
+		}
+	}
+	else if(ConfigType == BaseBand_Config_AGC_TAB)
+	{
+		//especial for 5G, vivi, 20100528
+		if(pHalData->interfaceIndex == 0)
+		{
+			for(i=0;i<AGCTAB_ArrayLen;i=i+2)
+			{
+				PHY_SetBBReg(Adapter, Rtl819XAGCTAB_Array_Table[i], bMaskDWord, Rtl819XAGCTAB_Array_Table[i+1]);		
+
+				// Add 1us delay between BB/RF register setting.
+				rtw_udelay_os(1);
+					
+				//RT_TRACE(COMP_INIT, DBG_TRACE, ("The Rtl819XAGCTAB_Array_Table[0] is %lx Rtl819XPHY_REGArray[1] is %lx \n",Rtl819XAGCTAB_Array_Table[i], Rtl819XAGCTAB_Array_Table[i+1]));
+			}
+			//RT_TRACE(COMP_INIT, DBG_LOUD, ("Normal Chip, MAC0, load Rtl819XAGCTAB_Array\n"));
+		}
+		else
+		{
+			if(pHalData->CurrentBandType92D == BAND_ON_2_4G)
+			{
+				for(i=0;i<AGCTAB_ArrayLen;i=i+2)
+				{
+					PHY_SetBBReg(Adapter, Rtl819XAGCTAB_Array_Table[i], bMaskDWord, Rtl819XAGCTAB_Array_Table[i+1]);		
+
+					// Add 1us delay between BB/RF register setting.
+					rtw_udelay_os(1);
+					
+					//RT_TRACE(COMP_INIT, DBG_TRACE, ("The Rtl819XAGCTAB_Array_Table[0] is %lx Rtl819XPHY_REGArray[1] is %lx \n",Rtl819XAGCTAB_Array_Table[i], Rtl819XAGCTAB_Array_Table[i+1]));
+				}
+				//RT_TRACE(COMP_INIT, DBG_LOUD, ("Load Rtl819XAGCTAB_2GArray\n"));
+			}
+			else
+			{
+				for(i=0;i<AGCTAB_5GArrayLen;i=i+2)
+				{
+					PHY_SetBBReg(Adapter, Rtl819XAGCTAB_5GArray_Table[i], bMaskDWord, Rtl819XAGCTAB_5GArray_Table[i+1]);		
+
+					// Add 1us delay between BB/RF register setting.
+					rtw_udelay_os(1);
+					
+					//RT_TRACE(COMP_INIT, DBG_TRACE, ("The Rtl819XAGCTAB_5GArray_Table[0] is %lx Rtl819XPHY_REGArray[1] is %lx \n",Rtl819XAGCTAB_5GArray_Table[i], Rtl819XAGCTAB_5GArray_Table[i+1]));
+				}
+				//RT_TRACE(COMP_INIT, DBG_LOUD, ("Load Rtl819XAGCTAB_5GArray\n"));
+			}
+		}
+	}
+	
+	return _SUCCESS;
+	
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:    phy_ConfigBBWithParaFile()
+ *
+ * Overview:    This function read BB parameters from general file format, and do register
+ *			  Read/Write 
+ *
+ * Input:      	PADAPTER		Adapter
+ *			ps1Byte 			pFileName			
+ *
+ * Output:      NONE
+ *
+ * Return:      RT_STATUS_SUCCESS: configuration file exist
+ *	2008/11/06	MH	For 92S we do not support silent reset now. Disable 
+ *					parameter file compare!!!!!!??
+ *			
+ *---------------------------------------------------------------------------*/
+#ifndef CONFIG_EMBEDDED_FWIMG
+static	int
+phy_ConfigBBWithParaFile(
+	IN	PADAPTER		Adapter,
+	IN	u8* 			pFileName
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	
+	int		rtStatus = _SUCCESS;
+
+	return rtStatus;	
+}
+#endif //CONFIG_EMBEDDED_FWIMG
+#if MP_DRIVER != 1
+static VOID
+storePwrIndexDiffRateOffset(
+	IN	PADAPTER	Adapter,
+	IN	u32		RegAddr,
+	IN	u32		BitMask,
+	IN	u32		Data
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	
+	if(RegAddr == rTxAGC_A_Rate18_06)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][0] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0]));
+	}
+	if(RegAddr == rTxAGC_A_Rate54_24)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][1] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][1] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][1]));
+	}
+	if(RegAddr == rTxAGC_A_CCK1_Mcs32)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][6] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][6] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][6]));
+	}
+	if(RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0xffffff00)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][7] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][7] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][7]));
+	}	
+	if(RegAddr == rTxAGC_A_Mcs03_Mcs00)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][2] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][2] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][2]));
+	}
+	if(RegAddr == rTxAGC_A_Mcs07_Mcs04)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][3] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][3] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][3]));
+	}
+	if(RegAddr == rTxAGC_A_Mcs11_Mcs08)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][4] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4]));
+	}
+	if(RegAddr == rTxAGC_A_Mcs15_Mcs12)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][5] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5]));
+	}
+	if(RegAddr == rTxAGC_B_Rate18_06)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][8] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8]));
+	}
+	if(RegAddr == rTxAGC_B_Rate54_24)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][9] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][9] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][9]));
+	}
+	if(RegAddr == rTxAGC_B_CCK1_55_Mcs32)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][14] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][14] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][14]));
+	}
+	if(RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0x000000ff)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][15] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][15] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][15]));
+	}	
+	if(RegAddr == rTxAGC_B_Mcs03_Mcs00)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][10] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][10] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][10]));
+	}
+	if(RegAddr == rTxAGC_B_Mcs07_Mcs04)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][11] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11]));
+	}
+	if(RegAddr == rTxAGC_B_Mcs11_Mcs08)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][12] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12]));
+	}
+	if(RegAddr == rTxAGC_B_Mcs15_Mcs12)
+	{
+		pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13] = Data;
+		//RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][13] = 0x%lx\n", pHalData->pwrGroupCnt,
+		//	pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13]));
+		pHalData->pwrGroupCnt++;
+	}
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:	phy_ConfigBBWithPgHeaderFile
+ *
+ * Overview:	Config PHY_REG_PG array 
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/06/2008 	MHC		Add later!!!!!!.. Please modify for new files!!!!
+ * 11/10/2008	tynli		Modify to mew files.
+ *---------------------------------------------------------------------------*/
+static	int
+phy_ConfigBBWithPgHeaderFile(
+	IN	PADAPTER		Adapter,
+	IN	u8 			ConfigType)
+{
+	int i;
+	u32*	Rtl819XPHY_REGArray_Table_PG;
+	u16	PHY_REGArrayPGLen;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	PHY_REGArrayPGLen = Rtl8192D_PHY_REG_Array_PGLength;
+	Rtl819XPHY_REGArray_Table_PG = (u32 *)Rtl8192D_PHY_REG_Array_PG;
+
+	if(ConfigType == BaseBand_Config_PHY_REG)
+	{
+		for(i=0;i<PHY_REGArrayPGLen;i=i+3)
+		{
+			//if (Rtl819XPHY_REGArray_Table_PG[i] == 0xfe) {
+			//	#ifdef CONFIG_LONG_DELAY_ISSUE
+			//	rtw_msleep_os(50);
+			//	#else
+			//	rtw_mdelay_os(50);
+			//	#endif
+			//}
+			//else if (Rtl819XPHY_REGArray_Table_PG[i] == 0xfd)
+			//	rtw_mdelay_os(5);
+			//else if (Rtl819XPHY_REGArray_Table_PG[i] == 0xfc)
+			//	rtw_mdelay_os(1);
+			//else if (Rtl819XPHY_REGArray_Table_PG[i] == 0xfb)
+			//	rtw_udelay_os(50);
+			//else if (Rtl819XPHY_REGArray_Table_PG[i] == 0xfa)
+			//	rtw_udelay_os(5);
+			//else if (Rtl819XPHY_REGArray_Table_PG[i] == 0xf9)
+			//	rtw_udelay_os(1);
+			storePwrIndexDiffRateOffset(Adapter, Rtl819XPHY_REGArray_Table_PG[i], 
+				Rtl819XPHY_REGArray_Table_PG[i+1], 
+				Rtl819XPHY_REGArray_Table_PG[i+2]);
+			//PHY_SetBBReg(Adapter, Rtl819XPHY_REGArray_Table_PG[i], Rtl819XPHY_REGArray_Table_PG[i+1], Rtl819XPHY_REGArray_Table_PG[i+2]);		
+			//RT_TRACE(COMP_SEND, DBG_TRACE, ("The Rtl819XPHY_REGArray_Table_PG[0] is %lx Rtl819XPHY_REGArray_Table_PG[1] is %lx \n",Rtl819XPHY_REGArray_Table_PG[i], Rtl819XPHY_REGArray_Table_PG[i+1]));
+		}
+	}
+	else
+	{
+
+		//RT_TRACE(COMP_SEND, DBG_LOUD, ("phy_ConfigBBWithPgHeaderFile(): ConfigType != BaseBand_Config_PHY_REG\n"));
+	}
+	
+	return _SUCCESS;
+	
+}	/* phy_ConfigBBWithPgHeaderFile */
+#endif
+
+/*-----------------------------------------------------------------------------
+ * Function:	phy_ConfigBBWithPgParaFile
+ *
+ * Overview:	
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/06/2008 	MHC		Create Version 0.
+ * 2009/07/29	tynli		(porting from 92SE branch)2009/03/11 Add copy parameter file to buffer for silent reset
+ *---------------------------------------------------------------------------*/
+#ifndef CONFIG_EMBEDDED_FWIMG
+static	int
+phy_ConfigBBWithPgParaFile(
+	IN	PADAPTER		Adapter,
+	IN	u8* 			pFileName)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	
+	int		rtStatus = _SUCCESS;
+
+
+	return rtStatus;
+	
+}	/* phy_ConfigBBWithPgParaFile */
+#endif //CONFIG_EMBEDDED_FWIMG
+#if MP_DRIVER == 1 
+#ifndef CONFIG_EMBEDDED_FWIMG
+/*-----------------------------------------------------------------------------
+ * Function:    phy_ConfigBBWithMpParaFile()
+ *
+ * Overview:    This function read BB parameters from general file format, and do register
+ *			  Read/Write 
+ *
+ * Input:      	PADAPTER		Adapter
+ *			ps1Byte 			pFileName			
+ *
+ * Output:      NONE
+ *
+ * Return:      RT_STATUS_SUCCESS: configuration file exist
+ *	2008/11/06	MH	For 92S we do not support silent reset now. Disable 
+ *					parameter file compare!!!!!!??
+ *			
+ *---------------------------------------------------------------------------*/
+static	int
+phy_ConfigBBWithMpParaFile(
+	IN	PADAPTER	Adapter,
+	IN	s8 			*pFileName
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	int	rtStatus = _SUCCESS;
+
+	return rtStatus;
+	
+}
+#else
+/*-----------------------------------------------------------------------------
+ * Function:	phy_ConfigBBWithMpHeaderFile
+ *
+ * Overview:	Config PHY_REG_MP array 
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 02/04/2010	chiyokolin		Modify to new files.
+ *---------------------------------------------------------------------------*/
+static	int
+phy_ConfigBBWithMpHeaderFile(
+	IN	PADAPTER		Adapter,
+	IN	u1Byte 			ConfigType)
+{
+	int	i;
+	u32	*Rtl8192CPHY_REGArray_Table_MP;
+	u16	PHY_REGArrayMPLen;
+
+	PHY_REGArrayMPLen = Rtl8192D_PHY_REG_Array_MPLength;
+	Rtl8192CPHY_REGArray_Table_MP = (u32 *)Rtl8192D_PHY_REG_Array_MP;
+
+	if(ConfigType == BaseBand_Config_PHY_REG)
+	{
+		for(i=0;i<PHY_REGArrayMPLen;i=i+2)
+		{
+			if (Rtl8192CPHY_REGArray_Table_MP[i] == 0xfe) {
+				#ifdef CONFIG_LONG_DELAY_ISSUE
+				rtw_msleep_os(50);
+				#else
+				rtw_mdelay_os(50);
+				#endif
+			}
+			else if (Rtl8192CPHY_REGArray_Table_MP[i] == 0xfd)
+				rtw_mdelay_os(5);
+			else if (Rtl8192CPHY_REGArray_Table_MP[i] == 0xfc)
+				rtw_mdelay_os(1);
+			else if (Rtl8192CPHY_REGArray_Table_MP[i] == 0xfb)
+				rtw_udelay_os(50);
+			else if (Rtl8192CPHY_REGArray_Table_MP[i] == 0xfa)
+				rtw_udelay_os(5);
+			else if (Rtl8192CPHY_REGArray_Table_MP[i] == 0xf9)
+				rtw_udelay_os(1);
+			PHY_SetBBReg(Adapter, Rtl8192CPHY_REGArray_Table_MP[i], bMaskDWord, Rtl8192CPHY_REGArray_Table_MP[i+1]);		
+
+			// Add 1us delay between BB/RF register setting.
+
+			rtw_udelay_os(1);
+
+			//RT_TRACE(COMP_INIT, DBG_TRACE, ("The Rtl8192CPHY_REGArray_Table_MP[%d] is %lx Rtl8192CPHY_REGArray_Table_MP[%d] is %lx \n", i, i+1, Rtl8192CPHY_REGArray_Table_MP[i], Rtl8192CPHY_REGArray_Table_MP[i+1]));
+		}
+	}
+	else
+	{
+		//RT_TRACE(COMP_SEND, DBG_LOUD, ("phy_ConfigBBWithMpHeaderFile(): ConfigType != BaseBand_Config_PHY_REG\n"));
+	}
+	return _SUCCESS;
+	
+}	/* phy_ConfigBBWithPgHeaderFile */
+
+#endif
+#endif
+
+static	int
+phy_BB8192D_Config_ParaFile(
+	IN	PADAPTER	Adapter
+	)
+{
+#if MP_DRIVER != 1
+	EEPROM_EFUSE_PRIV	*pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter);
+#endif
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	int		rtStatus = _SUCCESS;
+	s8		sz92DBBRegFile[] = RTL8192D_PHY_REG;
+	s8		sz92DBBRegPgFile[] = RTL8192D_PHY_REG_PG;
+	s8		sz92DBBRegMpFile[] = RTL8192D_PHY_REG_MP;	
+	s8		sz92DAGCTableFile[] = RTL8192D_AGC_TAB;
+	s8		sz92D2GAGCTableFile[] = RTL8192D_AGC_TAB_2G;
+	s8		sz92D5GAGCTableFile[] = RTL8192D_AGC_TAB_5G;
+	char		*pszBBRegFile, *pszAGCTableFile, *pszBBRegPgFile, *pszBBRegMpFile;
+	
+	//RT_TRACE(COMP_INIT, DBG_TRACE, ("==>phy_BB8192S_Config_ParaFile\n"));
+
+	pszBBRegFile = sz92DBBRegFile;
+	pszBBRegPgFile = sz92DBBRegPgFile;
+	
+	//Normal chip,Mac0 use AGC_TAB.txt for 2G and 5G band.
+	if(pHalData->interfaceIndex == 0)
+		pszAGCTableFile = sz92DAGCTableFile;
+	else
+	{
+		if(pHalData->CurrentBandType92D == BAND_ON_2_4G)
+			pszAGCTableFile = sz92D2GAGCTableFile;
+		else
+			pszAGCTableFile = sz92D5GAGCTableFile;
+	}
+	pszBBRegMpFile = sz92DBBRegMpFile;
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> phy_BB8192C_Config_ParaFile() phy_reg:%s\n",pszBBRegFile));
+	//RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> phy_BB8192C_Config_ParaFile() phy_reg_pg:%s\n",pszBBRegPgFile));
+	//RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> phy_BB8192C_Config_ParaFile() agc_table:%s\n",pszAGCTableFile));
+
+	//
+	// 1. Read PHY_REG.TXT BB INIT!!
+	// We will seperate as 88C / 92C according to chip version
+	//
+#ifdef CONFIG_EMBEDDED_FWIMG
+	rtStatus = phy_ConfigBBWithHeaderFile(Adapter, BaseBand_Config_PHY_REG);
+#else	
+	// No matter what kind of CHIP we always read PHY_REG.txt. We must copy different 
+	// type of parameter files to phy_reg.txt at first.	
+	rtStatus = phy_ConfigBBWithParaFile(Adapter,pszBBRegFile);
+#endif
+
+	if(rtStatus != _SUCCESS){
+		//RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():Write BB Reg Fail!!"));
+		goto phy_BB8190_Config_ParaFile_Fail;
+	}
+
+#if MP_DRIVER == 1 
+	//
+	// 1.1 Read PHY_REG_MP.TXT BB INIT!!
+	// We will seperate as 88C / 92C according to chip version
+	//
+#ifdef CONFIG_EMBEDDED_FWIMG
+	rtStatus = phy_ConfigBBWithMpHeaderFile(Adapter, BaseBand_Config_PHY_REG);
+#else	
+	// No matter what kind of CHIP we always read PHY_REG.txt. We must copy different 
+	// type of parameter files to phy_reg.txt at first.	
+	rtStatus = phy_ConfigBBWithMpParaFile(Adapter,pszBBRegMpFile);
+#endif
+
+	if(rtStatus != _SUCCESS){
+		//RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():Write BB Reg MP Fail!!"));
+		goto phy_BB8190_Config_ParaFile_Fail;
+	}
+#endif
+
+#if MP_DRIVER != 1
+	//
+	// 2. If EEPROM or EFUSE autoload OK, We must config by PHY_REG_PG.txt
+	//
+	if (pEEPROM->bautoload_fail_flag == _FALSE)
+	{
+		pHalData->pwrGroupCnt = 0;
+
+#ifdef CONFIG_EMBEDDED_FWIMG
+		rtStatus = phy_ConfigBBWithPgHeaderFile(Adapter, BaseBand_Config_PHY_REG);
+#else
+		rtStatus = phy_ConfigBBWithPgParaFile(Adapter, pszBBRegPgFile);
+#endif
+	}
+	
+	if(rtStatus != _SUCCESS){
+		//RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():BB_PG Reg Fail!!"));
+		goto phy_BB8190_Config_ParaFile_Fail;
+	}
+#endif
+
+	//
+	// 3. BB AGC table Initialization
+	//
+#ifdef CONFIG_EMBEDDED_FWIMG
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	if(pHalData->bSlaveOfDMSP)
+	{
+		DBG_871X("BB config slave skip  2222 \n");
+	}
+	else
+#endif
+	{
+		rtStatus = phy_ConfigBBWithHeaderFile(Adapter, BaseBand_Config_AGC_TAB);
+	}
+#else
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_BB8192S_Config_ParaFile AGC_TAB.txt\n"));
+	rtStatus = phy_ConfigBBWithParaFile(Adapter, pszAGCTableFile);
+#endif
+
+	if(rtStatus != _SUCCESS){
+		//RT_TRACE(COMP_FPGA, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():AGC Table Fail\n"));
+		goto phy_BB8190_Config_ParaFile_Fail;
+	}
+
+	// Check if the CCK HighPower is turned ON.
+	// This is used to calculate PWDB.
+	pHalData->bCckHighPower = (BOOLEAN)(PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, 0x200));
+	
+phy_BB8190_Config_ParaFile_Fail:
+
+	return rtStatus;
+}
+
+int
+PHY_BBConfig8192D(
+	IN	PADAPTER	Adapter
+	)
+{
+	int	rtStatus = _SUCCESS;
+	//u8		PathMap = 0, index = 0, rf_num = 0;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u32	RegVal;
+	u8	value;
+
+	if(Adapter->bSurpriseRemoved){
+		rtStatus = _FAIL;
+		return rtStatus;
+	}
+
+	phy_InitBBRFRegisterDefinition(Adapter);
+
+	// Enable BB and RF
+	RegVal = rtw_read16(Adapter, REG_SYS_FUNC_EN);
+	rtw_write16(Adapter, REG_SYS_FUNC_EN, RegVal|BIT13|BIT0|BIT1);
+
+	// 20090923 Joseph: Advised by Steven and Jenyu. Power sequence before init RF.
+	rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x83);
+	rtw_write8(Adapter, REG_AFE_PLL_CTRL+1, 0xdb);
+	value=rtw_read8(Adapter, REG_RF_CTRL);     //  0x1f bit7 bit6 represent for mac0/mac1 driver ready
+	rtw_write8(Adapter, REG_RF_CTRL, value|RF_EN|RF_RSTB|RF_SDMRSTB);
+
+#ifdef CONFIG_USB_HCI
+	rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_USBA | FEN_USBD | FEN_BB_GLB_RSTn | FEN_BBRSTB);
+#else
+	rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_PPLL|FEN_PCIEA|FEN_DIO_PCIE|FEN_BB_GLB_RSTn|FEN_BBRSTB);
+#endif
+
+#ifdef CONFIG_USB_HCI
+	//To Fix MAC loopback mode fail. Suggested by SD4 Johnny. 2010.03.23.
+	rtw_write8(Adapter, REG_LDOHCI12_CTRL, 0x0f);	
+	rtw_write8(Adapter, 0x15, 0xe9);
+#endif
+
+	rtw_write8(Adapter, REG_AFE_XTAL_CTRL+1, 0x80);
+
+#ifdef CONFIG_PCI_HCI
+	// Force use left antenna by default for 88C.
+	if(Adapter->ledpriv.LedStrategy != SW_LED_MODE10)
+	{
+		RegVal = rtw_read32(Adapter, REG_LEDCFG0);
+		rtw_write32(Adapter, REG_LEDCFG0, RegVal|BIT23);
+	}
+#endif
+
+	//
+	// Config BB and AGC
+	//
+	rtStatus = phy_BB8192D_Config_ParaFile(Adapter);
+
+#if MP_DRIVER == 1
+	PHY_SetBBReg(Adapter, 0x24, 0xF0, pHalData->CrystalCap & 0x0F);
+	PHY_SetBBReg(Adapter, 0x28, 0xF0000000, ((pHalData->CrystalCap & 0xF0) >> 4));
+#endif
+
+	return rtStatus;
+}
+
+
+extern	int
+PHY_RFConfig8192D(
+	IN	PADAPTER	Adapter
+	)
+{
+	//HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	int		rtStatus = _SUCCESS;
+
+	if(Adapter->bSurpriseRemoved){
+		rtStatus = _FAIL;
+		return rtStatus;
+	}
+
+	//
+	// RF config
+	//
+	rtStatus = PHY_RF6052_Config8192D(Adapter);
+#if 0	
+	switch(pHalData->rf_chip)
+	{
+		case RF_6052:
+			rtStatus = PHY_RF6052_Config(Adapter);
+			break;
+		case RF_8225:
+			rtStatus = PHY_RF8225_Config(Adapter);
+			break;
+		case RF_8256:			
+			rtStatus = PHY_RF8256_Config(Adapter);
+			break;
+		case RF_8258:
+			break;
+		case RF_PSEUDO_11N:
+			rtStatus = PHY_RF8225_Config(Adapter);
+			break;
+		default: //for MacOs Warning: "RF_TYPE_MIN" not handled in switch
+			break;
+	}
+#endif
+	return rtStatus;
+}
+
+
+/*-----------------------------------------------------------------------------
+ * Function:    PHY_ConfigRFWithParaFile()
+ *
+ * Overview:    This function read RF parameters from general file format, and do RF 3-wire
+ *
+ * Input:      	PADAPTER			Adapter
+ *			ps1Byte 				pFileName			
+ *			RF_RADIO_PATH_E	eRFPath
+ *
+ * Output:      NONE
+ *
+ * Return:      RT_STATUS_SUCCESS: configuration file exist
+ *			
+ * Note:		Delay may be required for RF configuration
+ *---------------------------------------------------------------------------*/
+int
+rtl8192d_PHY_ConfigRFWithParaFile(
+	IN	PADAPTER			Adapter,
+	IN	u8* 				pFileName,
+	RF_RADIO_PATH_E		eRFPath
+)
+{
+	int	rtStatus = _SUCCESS;
+
+
+	return rtStatus;
+	
+}
+
+//****************************************
+/*-----------------------------------------------------------------------------
+ * Function:    PHY_ConfigRFWithHeaderFile()
+ *
+ * Overview:    This function read RF parameters from general file format, and do RF 3-wire
+ *
+ * Input:      	PADAPTER			Adapter
+ *			ps1Byte 				pFileName			
+ *			RF_RADIO_PATH_E	eRFPath
+ *
+ * Output:      NONE
+ *
+ * Return:      RT_STATUS_SUCCESS: configuration file exist
+ *			
+ * Note:		Delay may be required for RF configuration
+ *---------------------------------------------------------------------------*/
+int
+rtl8192d_PHY_ConfigRFWithHeaderFile(
+	IN	PADAPTER			Adapter,
+	RF_CONTENT				Content,
+	RF_RADIO_PATH_E		eRFPath
+)
+{
+	int	i, j;
+	int	rtStatus = _SUCCESS;
+	u32*	Rtl819XRadioA_Array_Table;
+	u32*	Rtl819XRadioB_Array_Table;
+	u16		RadioA_ArrayLen,RadioB_ArrayLen;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u32	MaskforPhySet= (u32)(Content&0xE000);
+
+	Content &= 0x1FFF;
+
+	DBG_871X(" ===> PHY_ConfigRFWithHeaderFile() intferace = %d, Radio_txt = 0x%x, eRFPath = %d,MaskforPhyAccess:0x%x.\n", pHalData->interfaceIndex, Content,eRFPath,MaskforPhySet);
+
+	RadioA_ArrayLen = Rtl8192D_RadioA_2TArrayLength;
+	Rtl819XRadioA_Array_Table = (u32 *)Rtl8192D_RadioA_2TArray;
+	RadioB_ArrayLen = Rtl8192D_RadioB_2TArrayLength;	
+	Rtl819XRadioB_Array_Table = (u32 *)Rtl8192D_RadioB_2TArray;
+
+	if(pHalData->InternalPA5G[0])
+	{
+		RadioA_ArrayLen = Rtl8192D_RadioA_2T_intPAArrayLength;
+		Rtl819XRadioA_Array_Table = (u32 *)Rtl8192D_RadioA_2T_intPAArray;
+	}
+
+	if(pHalData->InternalPA5G[1])
+	{
+		RadioB_ArrayLen = Rtl8192D_RadioB_2T_intPAArrayLength;
+		Rtl819XRadioB_Array_Table = (u32 *)Rtl8192D_RadioB_2T_intPAArray;
+	}				
+	
+	//RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> PHY_ConfigRFWithHeaderFile() Radio_A:Rtl819XRadioA_1TArray\n"));
+	//RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> PHY_ConfigRFWithHeaderFile() Radio_B:Rtl819XRadioB_1TArray\n"));
+
+	//RT_TRACE(COMP_INIT, DBG_TRACE, ("PHY_ConfigRFWithHeaderFile: Radio No %x\n", eRFPath));
+	rtStatus = _SUCCESS;
+
+	//vivi added this for read parameter from header, 20100908
+	//1this only happens when DMDP, mac0 start on 2.4G, mac1 start on 5G, 
+	//1mac 0 has to set phy0&phy1 pathA or mac1 has to set phy0&phy1 pathA
+	if((Content == radiob_txt)&&(eRFPath == RF_PATH_A))
+	{
+		//RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> PHY_ConfigRFWithHeaderFile(), althougth Path A, we load radiob.txt\n"));
+		RadioA_ArrayLen = RadioB_ArrayLen;
+		Rtl819XRadioA_Array_Table = Rtl819XRadioB_Array_Table;
+	}
+
+	switch(eRFPath){
+		case RF_PATH_A:
+			for(i = 0;i<RadioA_ArrayLen; i=i+2)
+			{
+				if(Rtl819XRadioA_Array_Table[i] == 0xfe)
+				{
+					#ifdef CONFIG_LONG_DELAY_ISSUE
+					rtw_msleep_os(50);
+					#else
+					rtw_mdelay_os(50);
+					#endif
+				}
+				else if (Rtl819XRadioA_Array_Table[i] == 0xfd)
+				{
+					//rtw_mdelay_os(5);
+					for(j=0;j<100;j++)
+						rtw_udelay_os(MAX_STALL_TIME);
+				}
+				else if (Rtl819XRadioA_Array_Table[i] == 0xfc)
+				{
+					//rtw_mdelay_os(1);
+					for(j=0;j<20;j++)
+						rtw_udelay_os(MAX_STALL_TIME);
+				}
+				else if (Rtl819XRadioA_Array_Table[i] == 0xfb)
+				{
+					rtw_udelay_os(50);
+				}
+				else if (Rtl819XRadioA_Array_Table[i] == 0xfa)
+				{
+					rtw_udelay_os(5);
+				}
+				else if (Rtl819XRadioA_Array_Table[i] == 0xf9)
+				{
+					rtw_udelay_os(1);
+				}
+				else
+				{
+					PHY_SetRFReg(Adapter, eRFPath, Rtl819XRadioA_Array_Table[i]|MaskforPhySet, bRFRegOffsetMask, Rtl819XRadioA_Array_Table[i+1]);
+					// Add 1us delay between BB/RF register setting.
+					rtw_udelay_os(1);
+				}
+			}
+			break;
+		case RF_PATH_B:
+			for(i = 0;i<RadioB_ArrayLen; i=i+2)
+			{
+				if(Rtl819XRadioB_Array_Table[i] == 0xfe)
+				{ // Deay specific ms. Only RF configuration require delay.												
+					#ifdef CONFIG_LONG_DELAY_ISSUE
+					rtw_msleep_os(50);
+					#else
+					rtw_mdelay_os(50);
+					#endif
+				}
+				else if (Rtl819XRadioB_Array_Table[i] == 0xfd)
+				{
+					//rtw_mdelay_os(5);
+					for(j=0;j<100;j++)
+						rtw_udelay_os(MAX_STALL_TIME);
+				}
+				else if (Rtl819XRadioB_Array_Table[i] == 0xfc)
+				{
+					//rtw_mdelay_os(1);
+					for(j=0;j<20;j++)
+						rtw_udelay_os(MAX_STALL_TIME);
+				}
+				else if (Rtl819XRadioB_Array_Table[i] == 0xfb)
+				{
+					rtw_udelay_os(50);
+				}
+				else if (Rtl819XRadioB_Array_Table[i] == 0xfa)
+				{
+					rtw_udelay_os(5);
+				}
+				else if (Rtl819XRadioB_Array_Table[i] == 0xf9)
+				{
+					rtw_udelay_os(1);
+				}
+				else
+				{
+					PHY_SetRFReg(Adapter, eRFPath, Rtl819XRadioB_Array_Table[i]|MaskforPhySet, bRFRegOffsetMask, Rtl819XRadioB_Array_Table[i+1]);
+					// Add 1us delay between BB/RF register setting.
+					rtw_udelay_os(1);
+				}
+			}			
+			break;
+		case RF_PATH_C:
+			break;
+		case RF_PATH_D:
+			break;
+	}
+	
+	return _SUCCESS;
+
+}
+
+
+/*-----------------------------------------------------------------------------
+ * Function:    PHY_CheckBBAndRFOK()
+ *
+ * Overview:    This function is write register and then readback to make sure whether
+ *			  BB[PHY0, PHY1], RF[Patha, path b, path c, path d] is Ok
+ *
+ * Input:      	PADAPTER			Adapter
+ *			HW90_BLOCK_E		CheckBlock
+ *			RF_RADIO_PATH_E	eRFPath		// it is used only when CheckBlock is HW90_BLOCK_RF
+ *
+ * Output:      NONE
+ *
+ * Return:      RT_STATUS_SUCCESS: PHY is OK
+ *			
+ * Note:		This function may be removed in the ASIC
+ *---------------------------------------------------------------------------*/
+int
+rtl8192d_PHY_CheckBBAndRFOK(
+	IN	PADAPTER			Adapter,
+	IN	HW90_BLOCK_E		CheckBlock,
+	IN	RF_RADIO_PATH_E	eRFPath
+	)
+{
+	int			rtStatus = _SUCCESS;
+
+	u32				i, CheckTimes = 4,ulRegRead=0;
+
+	u32				WriteAddr[4];
+	u32				WriteData[] = {0xfffff027, 0xaa55a02f, 0x00000027, 0x55aa502f};
+
+	// Initialize register address offset to be checked
+	WriteAddr[HW90_BLOCK_MAC] = 0x100;
+	WriteAddr[HW90_BLOCK_PHY0] = 0x900;
+	WriteAddr[HW90_BLOCK_PHY1] = 0x800;
+	WriteAddr[HW90_BLOCK_RF] = 0x3;
+	
+	for(i=0 ; i < CheckTimes ; i++)
+	{
+
+		//
+		// Write Data to register and readback
+		//
+		switch(CheckBlock)
+		{
+		case HW90_BLOCK_MAC:
+			//RT_ASSERT(FALSE, ("PHY_CheckBBRFOK(): Never Write 0x100 here!"));
+			//RT_TRACE(COMP_INIT, DBG_LOUD, ("PHY_CheckBBRFOK(): Never Write 0x100 here!\n"));
+			break;
+			
+		case HW90_BLOCK_PHY0:
+		case HW90_BLOCK_PHY1:
+			rtw_write32(Adapter, WriteAddr[CheckBlock], WriteData[i]);
+			ulRegRead = rtw_read32(Adapter, WriteAddr[CheckBlock]);
+			break;
+
+		case HW90_BLOCK_RF:
+			// When initialization, we want the delay function(delay_ms(), delay_us() 
+			// ==> actually we call PlatformStallExecution()) to do NdisStallExecution()
+			// [busy wait] instead of NdisMSleep(). So we acquire RT_INITIAL_SPINLOCK 
+			// to run at Dispatch level to achive it.	
+			//cosa PlatformAcquireSpinLock(Adapter, RT_INITIAL_SPINLOCK);
+			WriteData[i] &= 0xfff;
+			PHY_SetRFReg(Adapter, eRFPath, WriteAddr[HW90_BLOCK_RF], bRFRegOffsetMask, WriteData[i]);
+			// TODO: we should not delay for such a long time. Ask SD3
+			rtw_mdelay_os(10);
+			ulRegRead = PHY_QueryRFReg(Adapter, eRFPath, WriteAddr[HW90_BLOCK_RF], bRFRegOffsetMask);				
+			rtw_mdelay_os(10);
+			//cosa PlatformReleaseSpinLock(Adapter, RT_INITIAL_SPINLOCK);
+			break;
+			
+		default:
+			rtStatus = _FAIL;
+			break;
+		}
+
+
+		//
+		// Check whether readback data is correct
+		//
+		if(ulRegRead != WriteData[i])
+		{
+			//RT_TRACE(COMP_FPGA, DBG_LOUD, ("ulRegRead: %lx, WriteData: %lx \n", ulRegRead, WriteData[i]));
+			rtStatus = _FAIL;			
+			break;
+		}
+	}
+
+	return rtStatus;
+}
+
+
+VOID
+rtl8192d_PHY_GetHWRegOriginalValue(
+	IN	PADAPTER		Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	
+	// read rx initial gain
+	pHalData->DefaultInitialGain[0] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XAAGCCore1, bMaskByte0);
+	pHalData->DefaultInitialGain[1] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XBAGCCore1, bMaskByte0);
+	pHalData->DefaultInitialGain[2] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XCAGCCore1, bMaskByte0);
+	pHalData->DefaultInitialGain[3] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XDAGCCore1, bMaskByte0);
+	//RT_TRACE(COMP_INIT, DBG_LOUD,
+	//("Default initial gain (c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x) \n", 
+	//pHalData->DefaultInitialGain[0], pHalData->DefaultInitialGain[1], 
+	//pHalData->DefaultInitialGain[2], pHalData->DefaultInitialGain[3]));
+
+	// read framesync
+	pHalData->framesync = (u8)PHY_QueryBBReg(Adapter, rOFDM0_RxDetector3, bMaskByte0);
+	pHalData->framesyncC34 = PHY_QueryBBReg(Adapter, rOFDM0_RxDetector2, bMaskDWord);
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Default framesync (0x%x) = 0x%x \n", 
+	//	rOFDM0_RxDetector3, pHalData->framesync));
+}
+
+
+//
+//	Description:
+//		Map dBm into Tx power index according to 
+//		current HW model, for example, RF and PA, and
+//		current wireless mode.
+//	By Bruce, 2008-01-29.
+//
+static	u8
+phy_DbmToTxPwrIdx(
+	IN	PADAPTER		Adapter,
+	IN	WIRELESS_MODE	WirelessMode,
+	IN	int			PowerInDbm
+	)
+{
+	u8				TxPwrIdx = 0;
+	int				Offset = 0;
+	
+
+	//
+	// Tested by MP, we found that CCK Index 0 equals to 8dbm, OFDM legacy equals to 
+	// 3dbm, and OFDM HT equals to 0dbm repectively.
+	// Note:
+	//	The mapping may be different by different NICs. Do not use this formula for what needs accurate result.  
+	// By Bruce, 2008-01-29.
+	// 
+	switch(WirelessMode)
+	{
+	case WIRELESS_MODE_B:
+		Offset = -7;
+		break;
+
+	case WIRELESS_MODE_G:
+	case WIRELESS_MODE_N_24G:
+		Offset = -8;
+		break;
+
+	default:
+		break;
+	}
+
+	if((PowerInDbm - Offset) > 0)
+	{
+		TxPwrIdx = (u8)((PowerInDbm - Offset) * 2);
+	}
+	else
+	{
+		TxPwrIdx = 0;
+	}
+
+	// Tx Power Index is too large.
+	if(TxPwrIdx > MAX_TXPWR_IDX_NMODE_92S)
+		TxPwrIdx = MAX_TXPWR_IDX_NMODE_92S;
+
+	return TxPwrIdx;
+}
+
+
+//
+//	Description:
+//		Map Tx power index into dBm according to 
+//		current HW model, for example, RF and PA, and
+//		current wireless mode.
+//	By Bruce, 2008-01-29.
+//
+static int
+phy_TxPwrIdxToDbm(
+	IN	PADAPTER		Adapter,
+	IN	WIRELESS_MODE	WirelessMode,
+	IN	u8			TxPwrIdx
+	)
+{
+	int				Offset = 0;
+	int				PwrOutDbm = 0;
+	
+	//
+	// Tested by MP, we found that CCK Index 0 equals to -7dbm, OFDM legacy equals to -8dbm.
+	// Note:
+	//	The mapping may be different by different NICs. Do not use this formula for what needs accurate result.  
+	// By Bruce, 2008-01-29.
+	// 
+	switch(WirelessMode)
+	{
+	case WIRELESS_MODE_B:
+		Offset = -7;
+		break;
+
+	case WIRELESS_MODE_G:
+	case WIRELESS_MODE_N_24G:
+		Offset = -8;
+		break;
+
+	default:
+		break;
+	}
+
+	PwrOutDbm = TxPwrIdx / 2 + Offset; // Discard the decimal part.
+
+	return PwrOutDbm;
+}
+
+
+/*-----------------------------------------------------------------------------
+ * Function:    GetTxPowerLevel8190()
+ *
+ * Overview:    This function is export to "common" moudule
+ *
+ * Input:       PADAPTER		Adapter
+ *			psByte			Power Level
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ *---------------------------------------------------------------------------*/
+VOID
+PHY_GetTxPowerLevel8192D(
+	IN	PADAPTER		Adapter,
+	OUT u32*    		powerlevel
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8			TxPwrLevel = 0;
+	int			TxPwrDbm;
+	
+	//
+	// Because the Tx power indexes are different, we report the maximum of them to 
+	// meet the CCX TPC request. By Bruce, 2008-01-31.
+	//
+
+	// CCK
+	TxPwrLevel = pHalData->CurrentCckTxPwrIdx;
+	TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_B, TxPwrLevel);
+
+	// Legacy OFDM
+	TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx + pHalData->LegacyHTTxPowerDiff;
+
+	// Compare with Legacy OFDM Tx power.
+	if(phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel) > TxPwrDbm)
+		TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel);
+
+	// HT OFDM
+	TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx;
+	
+	// Compare with HT OFDM Tx power.
+	if(phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel) > TxPwrDbm)
+		TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel);
+
+	*powerlevel = TxPwrDbm;
+}
+
+
+static void getTxPowerIndex(
+	IN	PADAPTER		Adapter,
+	IN	u8			channel,
+	IN OUT u8*		cckPowerLevel,
+	IN OUT u8*		ofdmPowerLevel
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8	index = (channel -1);
+
+	// 1. CCK
+	if(pHalData->CurrentBandType92D == BAND_ON_2_4G)
+	{
+		cckPowerLevel[RF_PATH_A] = pHalData->TxPwrLevelCck[RF_PATH_A][index];	//RF-A
+		cckPowerLevel[RF_PATH_B] = pHalData->TxPwrLevelCck[RF_PATH_B][index];	//RF-B
+	}
+	else
+		cckPowerLevel[RF_PATH_A] = cckPowerLevel[RF_PATH_B] = 0;
+
+	// 2. OFDM for 1S or 2S
+	if (GET_RF_TYPE(Adapter) == RF_1T2R || GET_RF_TYPE(Adapter) == RF_1T1R)
+	{
+		// Read HT 40 OFDM TX power
+		ofdmPowerLevel[RF_PATH_A] = pHalData->TxPwrLevelHT40_1S[RF_PATH_A][index];
+		ofdmPowerLevel[RF_PATH_B] = pHalData->TxPwrLevelHT40_1S[RF_PATH_B][index];
+	}
+	else if (GET_RF_TYPE(Adapter) == RF_2T2R)
+	{
+		// Read HT 40 OFDM TX power
+		ofdmPowerLevel[RF_PATH_A] = pHalData->TxPwrLevelHT40_2S[RF_PATH_A][index];
+		ofdmPowerLevel[RF_PATH_B] = pHalData->TxPwrLevelHT40_2S[RF_PATH_B][index];
+	}
+	//RTPRINT(FPHY, PHY_TXPWR, ("Channel-%d, set tx power index !!\n", channel));
+}
+
+static void ccxPowerIndexCheck(
+	IN	PADAPTER		Adapter,
+	IN	u8			channel,
+	IN OUT u8*		cckPowerLevel,
+	IN OUT u8*		ofdmPowerLevel
+	)
+{
+#if 0
+	PMGNT_INFO			pMgntInfo = &(Adapter->MgntInfo);
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	PRT_CCX_INFO		pCcxInfo = GET_CCX_INFO(pMgntInfo);
+
+	//
+	// CCX 2 S31, AP control of client transmit power:
+	// 1. We shall not exceed Cell Power Limit as possible as we can.
+	// 2. Tolerance is +/- 5dB.
+	// 3. 802.11h Power Contraint takes higher precedence over CCX Cell Power Limit.
+	// 
+	// TODO: 
+	// 1. 802.11h power contraint 
+	//
+	// 071011, by rcnjko.
+	//
+	if(	pMgntInfo->OpMode == RT_OP_MODE_INFRASTRUCTURE && 
+		pMgntInfo->mAssoc &&
+		pCcxInfo->bUpdateCcxPwr &&
+		pCcxInfo->bWithCcxCellPwr &&
+		channel == pMgntInfo->dot11CurrentChannelNumber)
+	{
+		u1Byte	CckCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_B, pCcxInfo->CcxCellPwr);
+		u1Byte	LegacyOfdmCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_G, pCcxInfo->CcxCellPwr);
+		u1Byte	OfdmCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_N_24G, pCcxInfo->CcxCellPwr);
+
+		RT_TRACE(COMP_TXAGC, DBG_LOUD, 
+		("CCX Cell Limit: %d dbm => CCK Tx power index : %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n", 
+		pCcxInfo->CcxCellPwr, CckCellPwrIdx, LegacyOfdmCellPwrIdx, OfdmCellPwrIdx));
+		RT_TRACE(COMP_TXAGC, DBG_LOUD, 
+		("EEPROM channel(%d) => CCK Tx power index: %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n",
+		channel, cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0])); 
+
+		// CCK
+		if(cckPowerLevel[0] > CckCellPwrIdx)
+			cckPowerLevel[0] = CckCellPwrIdx;
+		// Legacy OFDM, HT OFDM
+		if(ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff > LegacyOfdmCellPwrIdx)
+		{
+			if((OfdmCellPwrIdx - pHalData->LegacyHTTxPowerDiff) > 0)
+			{
+				ofdmPowerLevel[0] = OfdmCellPwrIdx - pHalData->LegacyHTTxPowerDiff;
+			}
+			else
+			{
+				ofdmPowerLevel[0] = 0;
+			}
+		}
+
+		RT_TRACE(COMP_TXAGC, DBG_LOUD, 
+		("Altered CCK Tx power index : %d, Legacy OFDM Tx power index: %d, OFDM Tx power index: %d\n", 
+		cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0]));
+	}
+
+	pHalData->CurrentCckTxPwrIdx = cckPowerLevel[0];
+	pHalData->CurrentOfdm24GTxPwrIdx = ofdmPowerLevel[0];
+
+	RT_TRACE(COMP_TXAGC, DBG_LOUD, 
+		("PHY_SetTxPowerLevel8192S(): CCK Tx power index : %d, Legacy OFDM Tx power index: %d, OFDM Tx power index: %d\n", 
+		cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0]));
+#endif	
+}
+/*-----------------------------------------------------------------------------
+ * Function:    SetTxPowerLevel8190()
+ *
+ * Overview:    This function is export to "HalCommon" moudule
+ *			We must consider RF path later!!!!!!!
+ *
+ * Input:       PADAPTER		Adapter
+ *			u1Byte		channel
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *	2008/11/04	MHC		We remove EEPROM_93C56.
+ *						We need to move CCX relative code to independet file.
+ *	2009/01/21	MHC		Support new EEPROM format from SD3 requirement.
+ *
+ *---------------------------------------------------------------------------*/
+VOID
+PHY_SetTxPowerLevel8192D(
+	IN	PADAPTER		Adapter,
+	IN	u8			channel
+	)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	u8	cckPowerLevel[2], ofdmPowerLevel[2];	// [0]:RF-A, [1]:RF-B
+
+#if(MP_DRIVER == 1)
+	return;
+#endif
+
+#ifdef CONFIG_USB_HCI
+	if((Adapter->mlmeextpriv.sitesurvey_res.state == SCAN_PROCESS)&&(Adapter->dvobjpriv.ishighspeed == _FALSE))
+		return;
+#endif
+
+	if(pHalData->bTXPowerDataReadFromEEPORM == _FALSE)
+		return;
+
+	channel = GetRightChnlPlace(channel);
+
+	getTxPowerIndex(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0]);
+	//DBG_8192C("Channel-%d, cckPowerLevel (A / B) = 0x%x / 0x%x,   ofdmPowerLevel (A / B) = 0x%x / 0x%x\n", 
+	//	channel, cckPowerLevel[0], cckPowerLevel[1], ofdmPowerLevel[0], ofdmPowerLevel[1]);
+
+	if(pHalData->CurrentBandType92D == BAND_ON_2_4G)
+		ccxPowerIndexCheck(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0]);
+
+	if(pHalData->CurrentBandType92D == BAND_ON_2_4G)
+		rtl8192d_PHY_RF6052SetCckTxPower(Adapter, &cckPowerLevel[0]);
+	rtl8192d_PHY_RF6052SetOFDMTxPower(Adapter, &ofdmPowerLevel[0], channel);
+
+#if 0
+	switch(pHalData->rf_chip)
+	{
+		case RF_8225:
+			PHY_SetRF8225CckTxPower(Adapter, cckPowerLevel[0]);
+			PHY_SetRF8225OfdmTxPower(Adapter, ofdmPowerLevel[0]);
+		break;
+
+		case RF_8256:
+			PHY_SetRF8256CCKTxPower(Adapter, cckPowerLevel[0]);
+			PHY_SetRF8256OFDMTxPower(Adapter, ofdmPowerLevel[0]);
+			break;
+
+		case RF_6052:
+			PHY_RF6052SetCckTxPower(Adapter, &cckPowerLevel[0]);
+			PHY_RF6052SetOFDMTxPower(Adapter, &ofdmPowerLevel[0], channel);
+			break;
+
+		case RF_8258:
+			break;
+	}
+#endif
+
+}
+
+
+//
+//	Description:
+//		Update transmit power level of all channel supported.
+//
+//	TODO: 
+//		A mode.
+//	By Bruce, 2008-02-04.
+//
+BOOLEAN
+PHY_UpdateTxPowerDbm8192D(
+	IN	PADAPTER	Adapter,
+	IN	int		powerInDbm
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8	idx;
+	u8	rf_path;
+
+	// TODO: A mode Tx power.
+	u8	CckTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_B, powerInDbm);
+	u8	OfdmTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_N_24G, powerInDbm);
+
+	if(OfdmTxPwrIdx - pHalData->LegacyHTTxPowerDiff > 0)
+		OfdmTxPwrIdx -= pHalData->LegacyHTTxPowerDiff;
+	else
+		OfdmTxPwrIdx = 0;
+
+	//RT_TRACE(COMP_TXAGC, DBG_LOUD, ("PHY_UpdateTxPowerDbm8192S(): %ld dBm , CckTxPwrIdx = %d, OfdmTxPwrIdx = %d\n", powerInDbm, CckTxPwrIdx, OfdmTxPwrIdx));
+
+	for(idx = 0; idx < CHANNEL_MAX_NUMBER; idx++)
+	{
+		for (rf_path = 0; rf_path < 2; rf_path++)
+		{
+			if(idx < CHANNEL_MAX_NUMBER_2G)
+				pHalData->TxPwrLevelCck[rf_path][idx] = CckTxPwrIdx;
+			pHalData->TxPwrLevelHT40_1S[rf_path][idx] = 
+			pHalData->TxPwrLevelHT40_2S[rf_path][idx] = OfdmTxPwrIdx;
+		}
+	}
+
+	//Adapter->HalFunc.SetTxPowerLevelHandler(Adapter, pHalData->CurrentChannel);//gtest:todo
+
+	return _TRUE;	
+}
+
+
+/*
+	Description:
+		When beacon interval is changed, the values of the 
+		hw registers should be modified.
+	By tynli, 2008.10.24.
+
+*/
+
+
+void	
+rtl8192d_PHY_SetBeaconHwReg(	
+	IN	PADAPTER		Adapter,
+	IN	u16			BeaconInterval	
+	)
+{
+
+}
+
+
+VOID 
+PHY_ScanOperationBackup8192D(
+	IN	PADAPTER	Adapter,
+	IN	u8		Operation
+	)
+{
+#if 0
+	IO_TYPE	IoType;
+	
+	if(!Adapter->bDriverStopped)
+	{
+		switch(Operation)
+		{
+			case SCAN_OPT_BACKUP:
+				IoType = IO_CMD_PAUSE_DM_BY_SCAN;
+				Adapter->HalFunc.SetHwRegHandler(Adapter,HW_VAR_IO_CMD,  (pu1Byte)&IoType);
+
+				break;
+
+			case SCAN_OPT_RESTORE:
+				IoType = IO_CMD_RESUME_DM_BY_SCAN;
+				Adapter->HalFunc.SetHwRegHandler(Adapter,HW_VAR_IO_CMD,  (pu1Byte)&IoType);
+				break;
+
+			default:
+				RT_TRACE(COMP_SCAN, DBG_LOUD, ("Unknown Scan Backup Operation. \n"));
+				break;
+		}
+	}
+#endif	
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:    PHY_SetBWModeCallback8192C()
+ *
+ * Overview:    Timer callback function for SetSetBWMode
+ *
+ * Input:       	PRT_TIMER		pTimer
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Note:		(1) We do not take j mode into consideration now
+ *			(2) Will two workitem of "switch channel" and "switch channel bandwidth" run
+ *			     concurrently?
+ *---------------------------------------------------------------------------*/
+static VOID
+_PHY_SetBWMode92D(
+	IN	PADAPTER	Adapter
+)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	u8	regBwOpMode;
+	u8	regRRSR_RSC;
+
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	// FOr 92D dual mac config.
+	PADAPTER	BuddyAdapter = Adapter->pbuddy_adapter;
+	PHAL_DATA_TYPE	pHalDataBuddyAdapter;
+#endif
+
+	//DBG_8192C("==>[%d]: _PHY_SetBWMode92D()  Switch to %s bandwidth\n", pHalData->interfaceIndex, pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz");
+
+	if(pHalData->rf_chip == RF_PSEUDO_11N)
+	{
+		//pHalData->SetBWModeInProgress= _FALSE;
+		return;
+	}
+
+	// There is no 40MHz mode in RF_8225.
+	if(pHalData->rf_chip==RF_8225)
+		return;
+
+	if(Adapter->bDriverStopped)
+		return;
+
+		
+	//3//
+	//3//<1>Set MAC register
+	//3//
+	//Adapter->HalFunc.SetBWModeHandler();
+	
+	regBwOpMode = rtw_read8(Adapter, REG_BWOPMODE);
+	regRRSR_RSC = rtw_read8(Adapter, REG_RRSR+2);
+	//regBwOpMode = Adapter->HalFunc.GetHwRegHandler(Adapter,HW_VAR_BWMODE,(pu1Byte)&regBwOpMode);
+	
+	switch(pHalData->CurrentChannelBW)
+	{
+		case HT_CHANNEL_WIDTH_20:
+			regBwOpMode |= BW_OPMODE_20MHZ;
+			   // 2007/02/07 Mark by Emily becasue we have not verify whether this register works
+			rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode);
+			break;
+			   
+		case HT_CHANNEL_WIDTH_40:
+			regBwOpMode &= ~BW_OPMODE_20MHZ;
+				// 2007/02/07 Mark by Emily becasue we have not verify whether this register works
+			rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode);
+
+			regRRSR_RSC = (regRRSR_RSC&0x90) |(pHalData->nCur40MhzPrimeSC<<5);
+			rtw_write8(Adapter, REG_RRSR+2, regRRSR_RSC);
+			break;
+
+		default:
+			/*RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetBWModeCallback8192C():
+						unknown Bandwidth: %#X\n",pHalData->CurrentChannelBW));*/
+			break;
+	}
+	
+	//3//
+	//3//<2>Set PHY related register
+	//3//
+	switch(pHalData->CurrentChannelBW)
+	{
+		/* 20 MHz channel*/
+		case HT_CHANNEL_WIDTH_20:
+			PHY_SetBBReg1Byte(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0);
+
+			PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0);
+
+			PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10|BIT11, 3);// SET BIT10 BIT11  for receive cck
+
+			break;
+
+		/* 40 MHz channel*/
+		case HT_CHANNEL_WIDTH_40:
+			PHY_SetBBReg1Byte(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1);
+
+			PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x1);
+
+			// Set Control channel to upper or lower. These settings are required only for 40MHz
+			if(pHalData->CurrentBandType92D == BAND_ON_2_4G)
+			{
+				//AcquireCCKAndRWPageAControl(Adapter);
+				PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC>>1));
+				//ReleaseCCKAndRWPageAControl(Adapter);
+			}
+			PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC);
+
+			PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10|BIT11, 0);// SET BIT10 BIT11  for receive cck
+
+			PHY_SetBBReg(Adapter, 0x818, (BIT26|BIT27), (pHalData->nCur40MhzPrimeSC==HAL_PRIME_CHNL_OFFSET_LOWER)?2:1);
+
+			break;
+
+		default:
+			/*RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetBWModeCallback8192C(): unknown Bandwidth: %#X\n"\
+						,pHalData->CurrentChannelBW));*/
+			break;
+			
+	}
+
+	//3<3>Set RF related register
+	switch(pHalData->rf_chip)
+	{
+		case RF_8225:		
+			//PHY_SetRF8225Bandwidth(Adapter, pHalData->CurrentChannelBW);
+			break;	
+			
+		case RF_8256:
+			// Please implement this function in Hal8190PciPhy8256.c
+			//PHY_SetRF8256Bandwidth(Adapter, pHalData->CurrentChannelBW);
+			break;
+			
+		case RF_8258:
+			// Please implement this function in Hal8190PciPhy8258.c
+			// PHY_SetRF8258Bandwidth();
+			break;
+
+		case RF_PSEUDO_11N:
+			// Do Nothing
+			break;
+			
+		case RF_6052:
+			rtl8192d_PHY_RF6052SetBandwidth(Adapter, pHalData->CurrentChannelBW);
+			break;	
+			
+		default:
+			//RT_ASSERT(FALSE, ("Unknown RFChipID: %d\n", pHalData->RFChipID));
+			break;
+	}
+
+	//pHalData->SetBWModeInProgress= FALSE;
+
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	if(Adapter->DualMacConcurrent == _TRUE && BuddyAdapter != NULL)
+	{
+		if(pHalData->bMasterOfDMSP)
+		{
+			pHalDataBuddyAdapter = GET_HAL_DATA(BuddyAdapter);
+			pHalDataBuddyAdapter->CurrentChannelBW=pHalData->CurrentChannelBW;
+			pHalDataBuddyAdapter->nCur40MhzPrimeSC = pHalData->nCur40MhzPrimeSC;
+		}
+	}
+#endif
+
+	//RT_TRACE(COMP_SCAN, DBG_LOUD, ("<==PHY_SetBWModeCallback8192C() \n" ));
+}
+
+ /*-----------------------------------------------------------------------------
+ * Function:   SetBWMode8190Pci()
+ *
+ * Overview:  This function is export to "HalCommon" moudule
+ *
+ * Input:       	PADAPTER			Adapter
+ *			HT_CHANNEL_WIDTH	Bandwidth	//20M or 40M
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Note:		We do not take j mode into consideration now
+ *---------------------------------------------------------------------------*/
+VOID
+PHY_SetBWMode8192D(
+	IN	PADAPTER					Adapter,
+	IN	HT_CHANNEL_WIDTH	Bandwidth,	// 20M or 40M
+	IN	unsigned char	Offset		// Upper, Lower, or Don't care
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	HT_CHANNEL_WIDTH 	tmpBW= pHalData->CurrentChannelBW;
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	PADAPTER	BuddyAdapter = Adapter->pbuddy_adapter;
+#endif
+
+	//if(pHalData->SetBWModeInProgress)
+	//	return;
+
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	if(pHalData->bInModeSwitchProcess)
+	{
+		DBG_871X("PHY_SwChnl8192D(): During mode switch \n");
+		//pHalData->SetBWModeInProgress=_FALSE;
+		return;
+	}
+#endif
+
+	//pHalData->SetBWModeInProgress= _TRUE;
+
+	pHalData->CurrentChannelBW = Bandwidth;
+
+#if 0
+	if(Offset==HT_EXTCHNL_OFFSET_LOWER)
+		pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER;
+	else if(Offset==HT_EXTCHNL_OFFSET_UPPER)
+		pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER;
+	else
+		pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+#else
+	pHalData->nCur40MhzPrimeSC = Offset;
+#endif
+
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	if((BuddyAdapter !=NULL) && (pHalData->bSlaveOfDMSP))
+	{
+		//if((BuddyAdapter->MgntInfo.bJoinInProgress) ||(BuddyAdapter->MgntInfo.bScanInProgress))
+		{
+			DBG_871X("PHY_SetBWMode92D():slave return when slave \n");
+			//pHalData->SetBWModeInProgress=_FALSE;
+			return;
+		}
+	}
+#endif
+
+	if((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved))
+	{
+#ifdef USE_WORKITEM	
+		//PlatformScheduleWorkItem(&(pHalData->SetBWModeWorkItem));
+#else
+	#if 0
+		//PlatformSetTimer(Adapter, &(pHalData->SetBWModeTimer), 0);
+	#else
+		_PHY_SetBWMode92D(Adapter);
+	#endif
+#endif		
+	}
+	else
+	{
+		//RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() SetBWModeInProgress FALSE driver sleep or unload\n"));	
+		//pHalData->SetBWModeInProgress= FALSE;	
+		pHalData->CurrentChannelBW = tmpBW;
+	}
+	
+}
+
+
+/*******************************************************************
+Descriptor:
+			stop TRX Before change bandType dynamically	
+
+********************************************************************/
+VOID 
+PHY_StopTRXBeforeChangeBand8192D(
+	  PADAPTER		Adapter
+)
+{
+#if MP_DRIVER == 1
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+	pdmpriv->RegC04_MP = (u8)PHY_QueryBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskByte0);
+	pdmpriv->RegD04_MP = PHY_QueryBBReg(Adapter, rOFDM1_TRxPathEnable, bDWord);
+#endif
+
+	PHY_SetBBReg1Byte(Adapter, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0x00);
+	
+	PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x00);
+	PHY_SetBBReg(Adapter, rOFDM1_TRxPathEnable, bDWord, 0x0);
+}
+
+/*
+
+*/
+void
+PHY_SwitchWirelessBand(
+	IN PADAPTER		 Adapter,
+	IN u8		Band);
+void
+PHY_SwitchWirelessBand(
+	IN PADAPTER		 Adapter,
+	IN u8		Band)
+{		
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u8	i, value8;//, RegValue
+
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	if(pHalData->bInModeSwitchProcess || pHalData->bSlaveOfDMSP)
+	{
+		DBG_871X("PHY_SwitchWirelessBand(): skip for mode switch or slave \n");
+		return;
+	}
+#endif
+	//DBG_8192C("PHY_SwitchWirelessBand():Before Switch Band \n");
+
+	pHalData->BandSet92D = pHalData->CurrentBandType92D = (BAND_TYPE)Band;	
+	if(IS_92D_SINGLEPHY(pHalData->VersionID))
+         	pHalData->BandSet92D = BAND_ON_BOTH;
+
+	if(pHalData->CurrentBandType92D == BAND_ON_5G)
+	{
+		pHalData->CurrentWirelessMode = WIRELESS_MODE_N_5G;
+	}
+	else
+	{
+		pHalData->CurrentWirelessMode = WIRELESS_MODE_N_24G;
+	}
+
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	if(pHalData->bMasterOfDMSP)
+	{
+		PADAPTER	BuddyAdapter = Adapter->pbuddy_adapter;
+		if(BuddyAdapter!=NULL)
+		{
+			if(BuddyAdapter->hw_init_completed)
+			{
+				GET_HAL_DATA(BuddyAdapter)->BandSet92D = pHalData->BandSet92D;
+				GET_HAL_DATA(BuddyAdapter)->CurrentBandType92D = pHalData->CurrentBandType92D;
+				GET_HAL_DATA(BuddyAdapter)->CurrentWirelessMode = pHalData->CurrentWirelessMode;
+			}
+		}
+	}
+#endif
+
+//#ifdef CONFIG_USB_HCI
+	//RT_ASSERT((KeGetCurrentIrql() == PASSIVE_LEVEL),
+	//	("MPT_ActSetWirelessMode819x(): not in PASSIVE_LEVEL!\n"));
+//#endif
+
+	//stop RX/Tx
+	PHY_StopTRXBeforeChangeBand8192D(Adapter);
+
+	//reconfig BB/RF according to wireless mode
+	if(pHalData->CurrentBandType92D == BAND_ON_2_4G)
+	{
+		//BB & RF Config
+		if(pHalData->interfaceIndex == 1)
+		{
+#ifdef CONFIG_EMBEDDED_FWIMG
+			phy_ConfigBBWithHeaderFile(Adapter, BaseBand_Config_AGC_TAB);
+#else
+			PHY_SetAGCTab8192D(Adapter);
+#endif
+		}
+		//if( (check_fwstate(&Adapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) &&
+		//	Adapter->mlmeextpriv.cur_channel <= 14)
+		//{
+		//	ResumeTxBeacon(Adapter);
+		//	DBG_8192C("==>PHY_SwitchWirelessBand():Resume send beacon! \n");
+		//}
+	}
+	else	//5G band
+	{
+		//if( (check_fwstate(&Adapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) &&
+		//	Adapter->mlmeextpriv.cur_channel <= 14)
+		//{
+		//	StopTxBeacon(Adapter);
+		//	DBG_8192C("==>PHY_SwitchWirelessBand():Stop send beacon! \n");
+		//}
+
+		if(pHalData->interfaceIndex == 1)
+		{
+#ifdef CONFIG_EMBEDDED_FWIMG
+			phy_ConfigBBWithHeaderFile(Adapter, BaseBand_Config_AGC_TAB);
+#else
+			PHY_SetAGCTab8192D(Adapter);
+#endif
+		}
+	}
+		
+	PHY_UpdateBBRFConfiguration8192D(Adapter, _TRUE);
+
+	if(pHalData->CurrentBandType92D == BAND_ON_2_4G)
+	{
+		rtw_write16(Adapter, REG_RRSR, 0x15d);
+	
+		PHY_SetBBReg1Byte(Adapter, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0x3);
+	}
+	else
+	{
+		//avoid using cck rate in 5G band
+		// Set RRSR rate table.
+		rtw_write16(Adapter, REG_RRSR, 0x150);
+	
+		PHY_SetBBReg1Byte(Adapter, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0x2);
+	}
+
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	if(pHalData->bMasterOfDMSP)
+	{
+		PADAPTER	BuddyAdapter = Adapter->pbuddy_adapter;
+		if(BuddyAdapter!=NULL)
+		{
+			if(pHalData->CurrentBandType92D == BAND_ON_2_4G)
+				rtw_write16(BuddyAdapter, REG_RRSR, 0x15d);
+			else
+				rtw_write16(BuddyAdapter, REG_RRSR, 0x150);
+		}
+	}
+#endif
+
+
+	pdmpriv->bReloadtxpowerindex = _TRUE;
+
+	// notice fw know band status  0x81[1]/0x53[1] = 0: 5G, 1: 2G
+	if(pHalData->CurrentBandType92D==BAND_ON_2_4G)
+	{
+		value8 = rtw_read8(Adapter, (pHalData->interfaceIndex==0?REG_MAC0:REG_MAC1));
+		value8 |= BIT1;
+		rtw_write8(Adapter, (pHalData->interfaceIndex==0?REG_MAC0:REG_MAC1),value8);
+	}
+	else
+	{
+		value8 = rtw_read8(Adapter, (pHalData->interfaceIndex==0?REG_MAC0:REG_MAC1));
+		value8 &= (~BIT1);
+		rtw_write8(Adapter, (pHalData->interfaceIndex==0?REG_MAC0:REG_MAC1),value8);	
+	}
+
+
+	for(i=0;i<20;i++)
+			rtw_udelay_os(MAX_STALL_TIME);
+
+	//DBG_8192C("PHY_SwitchWirelessBand():Switch Band OK.\n");
+}
+
+
+static VOID
+PHY_EnableRFENV(
+	IN	PADAPTER		Adapter,	
+	IN	u8				eRFPath	,
+	IN	u32				MaskforPhySet,
+	OUT	u32*			pu4RegValue
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	BB_REGISTER_DEFINITION_T	*pPhyReg = &pHalData->PHYRegDef[eRFPath];
+
+	//RT_TRACE(COMP_RF, DBG_LOUD, ("====>PHY_EnableRFENV\n"));
+
+	/*----Store original RFENV control type----*/		
+	switch(eRFPath)
+	{
+		case RF_PATH_A:
+		case RF_PATH_C:
+			*pu4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs|MaskforPhySet, bRFSI_RFENV);
+			break;
+		case RF_PATH_B:
+		case RF_PATH_D:
+			*pu4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs|MaskforPhySet, bRFSI_RFENV<<16);
+			break;
+	}	
+
+	/*----Set RF_ENV enable----*/		
+	PHY_SetBBReg(Adapter, pPhyReg->rfintfe|MaskforPhySet, bRFSI_RFENV<<16, 0x1);
+	rtw_udelay_os(1);
+	
+	/*----Set RF_ENV output high----*/
+	PHY_SetBBReg(Adapter, pPhyReg->rfintfo|MaskforPhySet, bRFSI_RFENV, 0x1);
+	rtw_udelay_os(1);
+	
+	/* Set bit number of Address and Data for RF register */
+	PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2|MaskforPhySet, b3WireAddressLength, 0x0);	// Set 1 to 4 bits for 8255
+	rtw_udelay_os(1);
+	
+	PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2|MaskforPhySet, b3WireDataLength, 0x0); // Set 0 to 12	bits for 8255
+	rtw_udelay_os(1);
+
+	//RT_TRACE(COMP_RF, DBG_LOUD, ("<====PHY_EnableRFENV\n"));	
+
+}
+
+static VOID
+PHY_RestoreRFENV(
+	IN	PADAPTER		Adapter,	
+	IN	u8				eRFPath,
+	IN	u32				MaskforPhySet,
+	IN	u32*			pu4RegValue
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	BB_REGISTER_DEFINITION_T	*pPhyReg = &pHalData->PHYRegDef[eRFPath];
+
+	//RT_TRACE(COMP_RF, DBG_LOUD, ("=====>PHY_RestoreRFENV\n"));
+	//If another MAC is ON,need do this?
+	/*----Restore RFENV control type----*/;
+	switch(eRFPath)
+	{
+		case RF_PATH_A:
+		case RF_PATH_C:
+			PHY_SetBBReg(Adapter, pPhyReg->rfintfs|MaskforPhySet, bRFSI_RFENV, *pu4RegValue);
+			break;
+		case RF_PATH_B :
+		case RF_PATH_D:
+			PHY_SetBBReg(Adapter, pPhyReg->rfintfs|MaskforPhySet, bRFSI_RFENV<<16, *pu4RegValue);
+			break;
+	}
+	//RT_TRACE(COMP_RF, DBG_LOUD, ("<=====PHY_RestoreRFENV\n"));	
+
+}
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	phy_SwitchRfSetting
+ *
+ * Overview:	Change RF Setting when we siwthc channel for 92D C-cut.
+ *
+ * Input:       IN	PADAPTER				pAdapter
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 01/08/2009	MHC		Suggestion from SD3 Willis for 92S series.
+ * 01/09/2009	MHC		Add CCK modification for 40MHZ. Suggestion from SD3.
+ *
+ *---------------------------------------------------------------------------*/
+ static	VOID	
+ phy_SwitchRfSetting(
+ 	IN	PADAPTER			Adapter,
+	IN	u8					channel 	
+ 	)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	u8			path = pHalData->CurrentBandType92D==BAND_ON_5G?RF_PATH_A:RF_PATH_B;
+	u8			index = 0,	i = 0, eRFPath = RF_PATH_A;
+	BOOLEAN		bNeedPowerDownRadio = _FALSE, bInteralPA = _FALSE;
+	u32			u4RegValue, mask = 0x1C000, value = 0, u4tmp, u4tmp2,MaskforPhySet=0;
+
+	//RT_TRACE(COMP_CMD, DBG_LOUD, ("====>phy_SwitchRfSetting interface %d\n", pHalData->interfaceIndex));
+
+	//only for 92D C-cut SMSP
+
+#ifdef CONFIG_USB_HCI
+	if(Adapter->dvobjpriv.ishighspeed == _FALSE)
+		return;
+#endif
+
+	//config path A for 5G
+	if(pHalData->CurrentBandType92D==BAND_ON_5G)
+	{
+		//RT_TRACE(COMP_CMD, DBG_LOUD, ("====>phy_SwitchRfSetting interface %d 5G\n", Adapter->interfaceIndex));
+
+		u4tmp = CurveIndex[GetRightChnlPlace(channel)-1];
+		//RTPRINT(FINIT, INIT_IQK, ("cosa ver 1 set RF-A, 5G, 0x28 = 0x%x !!\n", u4tmp));
+	
+		for(i = 0; i < RF_CHNL_NUM_5G; i++)
+		{
+			if(channel == RF_CHNL_5G[i] && channel <= 140)
+				index = 0;
+		}
+
+		for(i = 0; i < RF_CHNL_NUM_5G_40M; i++)
+		{
+			if(channel == RF_CHNL_5G_40M[i] && channel <= 140)
+				index = 1;
+		}
+
+		if(channel ==149 || channel == 155 || channel ==161)
+			index = 2;
+		else if(channel == 151 || channel == 153 || channel == 163 || channel == 165)
+			index = 3;
+		else if(channel == 157 || channel == 159 )
+			index = 4;
+
+		if(pHalData->MacPhyMode92D == DUALMAC_DUALPHY && pHalData->interfaceIndex == 1)
+		{
+			bNeedPowerDownRadio = rtl8192d_PHY_EnableAnotherPHY(Adapter, _FALSE);
+			MaskforPhySet = MAC1_ACCESS_PHY0;
+			//asume no this case
+			if(bNeedPowerDownRadio)
+			 	PHY_EnableRFENV(Adapter, path, MaskforPhySet, &u4RegValue);
+		}
+
+		for(i = 0; i < RF_REG_NUM_for_C_CUT_5G; i++)
+		{
+#if 1
+			if(i == 0 && (pHalData->MacPhyMode92D == DUALMAC_DUALPHY))
+			{
+				PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)path, RF_REG_for_C_CUT_5G[i]|MaskforPhySet, bRFRegOffsetMask, 0xE439D);
+			}
+			else if (RF_REG_for_C_CUT_5G[i] == RF_SYN_G4)
+			{
+#if SWLCK == 1
+				u4tmp2= (RF_REG_Param_for_C_CUT_5G[index][i]&0x7FF)|(u4tmp << 11);
+
+				if(channel == 36)
+					u4tmp2 &= ~(BIT7|BIT6);
+
+				PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)path, RF_REG_for_C_CUT_5G[i]|MaskforPhySet, bRFRegOffsetMask, u4tmp2);
+#else
+				u4tmp2= RF_REG_Param_for_C_CUT_5G[index][i];
+				PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)path, RF_REG_for_C_CUT_5G[i]|MaskforPhySet, 0xFF8FF, u4tmp2);
+#endif
+			}
+			else
+			{
+				PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)path, RF_REG_for_C_CUT_5G[i]|MaskforPhySet, bRFRegOffsetMask, RF_REG_Param_for_C_CUT_5G[index][i]);
+			}
+#else
+			if(i == 0 && (pHalData->MacPhyMode92D == DUALMAC_DUALPHY))
+				PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)path, RF_REG_for_C_CUT_5G[i], RF_REG_MASK_for_C_CUT_5G[i], 0xE439D);
+			else
+				PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)path, RF_REG_for_C_CUT_5G[i], RF_REG_MASK_for_C_CUT_5G[i], RF_REG_Param_for_C_CUT_5G[index][i]);
+#endif			
+			//RT_TRACE(COMP_RF, DBG_TRACE, ("phy_SwitchRfSetting offset 0x%x value 0x%x path %d index %d readback 0x%x\n", 
+			//	RF_REG_for_C_CUT_5G[i], RF_REG_Param_for_C_CUT_5G[index][i], path,  index,
+			//	PHY_QueryRFReg(Adapter, (RF_RADIO_PATH_E) path, RF_REG_for_C_CUT_5G[i]|MaskforPhyAccess, bRFRegOffsetMask)));
+		}
+		if(pHalData->MacPhyMode92D == DUALMAC_DUALPHY && pHalData->interfaceIndex == 1)
+		{
+			if(bNeedPowerDownRadio)
+			{
+				PHY_RestoreRFENV(Adapter, path,MaskforPhySet, &u4RegValue);	
+			}
+			rtl8192d_PHY_PowerDownAnotherPHY(Adapter, _FALSE);
+		}
+		if(channel < 149)
+			value = 0x07;
+		else if(channel >= 149)
+			value = 0x02;
+
+		if(channel >= 36 && channel <= 64)
+			index = 0;
+		else if(channel >=100 && channel <= 140)
+			index = 1;
+		else	
+			index = 2;
+
+		for(eRFPath = RF_PATH_A; eRFPath < pHalData->NumTotalRFPath; eRFPath++)
+		{
+			if(pHalData->MacPhyMode92D == DUALMAC_DUALPHY &&
+				pHalData->interfaceIndex == 1)		//MAC 1 5G
+				bInteralPA = pHalData->InternalPA5G[1];
+			else
+				bInteralPA = pHalData->InternalPA5G[eRFPath];
+			
+			if(bInteralPA)
+			{
+				for(i = 0; i < RF_REG_NUM_for_C_CUT_5G_internalPA; i++)
+				{
+					if(RF_REG_for_C_CUT_5G_internalPA[i] == 0x03 &&
+						channel >=36 && channel <=64)
+						PHY_SetRFReg(Adapter, eRFPath, RF_REG_for_C_CUT_5G_internalPA[i], bRFRegOffsetMask, 0x7bdef);
+					else
+						PHY_SetRFReg(Adapter, eRFPath, RF_REG_for_C_CUT_5G_internalPA[i], bRFRegOffsetMask, RF_REG_Param_for_C_CUT_5G_internalPA[index][i]);
+					//RT_TRACE(COMP_RF, DBG_LOUD, ("phy_SwitchRfSetting offset 0x%x value 0x%x path %d index %d \n", 
+					//	RF_REG_for_C_CUT_5G_internalPA[i], RF_REG_Param_for_C_CUT_5G_internalPA[index][i], eRFPath,	index));					
+				}
+			}		
+			else
+				PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, 0x0B, mask, value);
+		}
+	}
+	else if(pHalData->CurrentBandType92D==BAND_ON_2_4G)
+	{
+		//DBG_8192C("====>phy_SwitchRfSetting interface %d 2.4G\n", pHalData->interfaceIndex);
+		u4tmp = CurveIndex[channel-1];
+		//RTPRINT(FINIT, INIT_IQK, ("cosa ver 3 set RF-B, 2G, 0x28 = 0x%x !!\n", u4tmp));
+	
+		if(channel == 1 || channel == 2 || channel ==4 || channel == 9 || channel == 10 || 
+			channel == 11 || channel ==12)
+			index = 0;
+		else if(channel ==3 || channel == 13 || channel == 14)
+			index = 1;
+		else if(channel >= 5 && channel <= 8)
+			index = 2;
+
+		if(pHalData->MacPhyMode92D == DUALMAC_DUALPHY)
+		{
+			path = RF_PATH_A;		
+			if(pHalData->interfaceIndex == 0)
+			{
+				bNeedPowerDownRadio = rtl8192d_PHY_EnableAnotherPHY(Adapter, _TRUE);
+				MaskforPhySet = MAC0_ACCESS_PHY1;
+				if(bNeedPowerDownRadio)
+					PHY_EnableRFENV(Adapter, path,MaskforPhySet,&u4RegValue);
+			}
+		}
+
+
+		for(i = 0; i < RF_REG_NUM_for_C_CUT_2G; i++)
+		{
+#if 1
+#if SWLCK == 1
+			if (RF_REG_for_C_CUT_2G[i] == RF_SYN_G7)
+				PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)path, RF_REG_for_C_CUT_2G[i]|MaskforPhySet, bRFRegOffsetMask, (RF_REG_Param_for_C_CUT_2G[index][i] | BIT17));
+			else
+#endif
+			PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)path, RF_REG_for_C_CUT_2G[i]|MaskforPhySet, bRFRegOffsetMask, RF_REG_Param_for_C_CUT_2G[index][i]);
+#else
+			PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)path, RF_REG_for_C_CUT_2G[i], RF_REG_MASK_for_C_CUT_2G[i], RF_REG_Param_for_C_CUT_2G[index][i]);
+#endif
+			//RT_TRACE(COMP_RF, DBG_TRACE, ("phy_SwitchRfSetting offset 0x%x value 0x%x mak 0x%x path %d index %d readback 0x%x\n", 
+			//	RF_REG_for_C_CUT_2G[i], RF_REG_Param_for_C_CUT_2G[index][i], RF_REG_MASK_for_C_CUT_2G[i], path,  index, 
+			//	PHY_QueryRFReg(Adapter, (RF_RADIO_PATH_E) path, RF_REG_for_C_CUT_2G[i]|MaskforPhySet, bRFRegOffsetMask)));
+		}
+
+#if SWLCK == 1
+		//for SWLCK
+		//RTPRINT(FINIT, INIT_IQK, ("cosa ver 3 set RF-B, 2G, 0x28 = 0x%x !!\n", RF_REG_SYN_G4_for_C_CUT_2G | (u4tmp << 11)));
+
+		PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)path, RF_SYN_G4|MaskforPhySet, bRFRegOffsetMask, RF_REG_SYN_G4_for_C_CUT_2G | (u4tmp << 11));
+#endif
+		if(pHalData->MacPhyMode92D == DUALMAC_DUALPHY && pHalData->interfaceIndex == 0)
+		{
+			if(bNeedPowerDownRadio){
+				PHY_RestoreRFENV(Adapter, path,MaskforPhySet, &u4RegValue);
+			}
+			rtl8192d_PHY_PowerDownAnotherPHY(Adapter, _TRUE);
+		}
+	}
+
+	//RT_TRACE(COMP_CMD, DBG_LOUD, ("<====phy_SwitchRfSetting interface %d\n", pHalData->interfaceIndex));
+
+}
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	phy_ReloadLCKSetting
+ *
+ * Overview:	Change RF Setting when we siwthc channel for 92D C-cut.
+ *
+ * Input:       IN	PADAPTER				pAdapter
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 01/08/2009	MHC		Suggestion from SD3 Willis for 92S series.
+ * 01/09/2009	MHC		Add CCK modification for 40MHZ. Suggestion from SD3.
+ *
+ *---------------------------------------------------------------------------*/
+static  VOID	
+ phy_ReloadLCKSetting(
+ 	IN	PADAPTER				Adapter,
+	IN	u8					channel 	
+ 	)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	u8		eRFPath = pHalData->CurrentBandType92D == BAND_ON_5G?RF_PATH_A:IS_92D_SINGLEPHY(pHalData->VersionID)?RF_PATH_B:RF_PATH_A;
+	u32 		u4tmp = 0, u4RegValue = 0;
+	BOOLEAN		bNeedPowerDownRadio = _FALSE;
+	u32		MaskforPhySet = 0;
+
+	//RT_TRACE(COMP_CMD, DBG_LOUD, ("====>phy_ReloadLCKSetting interface %d path %d\n", Adapter->interfaceIndex, eRFPath));
+
+	//only for 92D C-cut SMSP
+
+	//RTPRINT(FINIT, INIT_IQK, ("cosa pHalData->CurrentBandType92D = %d\n", pHalData->CurrentBandType92D));
+	//RTPRINT(FINIT, INIT_IQK, ("cosa channel = %d\n", channel));
+	if(pHalData->CurrentBandType92D == BAND_ON_5G)
+	{
+		//Path-A for 5G
+		{
+			u4tmp = CurveIndex[GetRightChnlPlace(channel)-1];
+			//RTPRINT(FINIT, INIT_IQK, ("cosa ver 1 set RF-A, 5G,	0x28 = 0x%x !!\n", u4tmp));
+
+			if(pHalData->MacPhyMode92D == DUALMAC_DUALPHY && pHalData->interfaceIndex == 1)
+			{
+				bNeedPowerDownRadio = rtl8192d_PHY_EnableAnotherPHY(Adapter, _FALSE);
+				MaskforPhySet = MAC1_ACCESS_PHY0;
+				//asume no this case
+				if(bNeedPowerDownRadio)
+				 	PHY_EnableRFENV(Adapter, eRFPath, MaskforPhySet,&u4RegValue);
+			}		
+			
+			PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, RF_SYN_G4|MaskforPhySet, 0x3f800, u4tmp);
+
+			if(bNeedPowerDownRadio){
+				PHY_RestoreRFENV(Adapter, eRFPath,MaskforPhySet, &u4RegValue);
+				rtl8192d_PHY_PowerDownAnotherPHY(Adapter, _FALSE);
+			}
+		}
+	}
+	else if(pHalData->CurrentBandType92D == BAND_ON_2_4G)
+	{
+		{
+			u32 u4tmp=0;
+			u4tmp = CurveIndex[channel-1];
+			//RTPRINT(FINIT, INIT_IQK, ("cosa ver 3 set RF-B, 2G, 0x28 = 0x%x !!\n", u4tmp));
+
+			if(pHalData->MacPhyMode92D == DUALMAC_DUALPHY && pHalData->interfaceIndex == 0)
+			{
+				bNeedPowerDownRadio = rtl8192d_PHY_EnableAnotherPHY(Adapter, _TRUE);
+				MaskforPhySet = MAC0_ACCESS_PHY1;
+				if(bNeedPowerDownRadio)
+					PHY_EnableRFENV(Adapter, eRFPath,MaskforPhySet, &u4RegValue);
+			}			
+			PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, RF_SYN_G4|MaskforPhySet, 0x3f800, u4tmp);
+			//RTPRINT(FINIT, INIT_IQK, ("cosa ver 3 set RF-B, 2G, 0x28 = 0x%lx !!\n", PHY_QueryRFReg(Adapter, (RF_RADIO_PATH_E) eRFPath, RF_SYN_G4|MaskforPhyAccess, 0x3f800)));
+
+			if(bNeedPowerDownRadio){
+				PHY_RestoreRFENV(Adapter, eRFPath,MaskforPhySet, &u4RegValue);
+				rtl8192d_PHY_PowerDownAnotherPHY(Adapter, _TRUE);
+			}
+		}
+	}
+
+
+
+	//RT_TRACE(COMP_CMD, DBG_LOUD, ("<====phy_ReloadLCKSetting\n"));
+
+}
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	phy_ReloadIMRSetting
+ *
+ * Overview:	Change RF Setting when we siwthc channel for 92D C-cut.
+ *
+ * Input:       IN	PADAPTER				pAdapter
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 01/08/2009	MHC		Suggestion from SD3 Willis for 92S series.
+ * 01/09/2009	MHC		Add CCK modification for 40MHZ. Suggestion from SD3.
+ *
+ *---------------------------------------------------------------------------*/
+ static VOID	
+ phy_ReloadIMRSetting(
+ 	IN	PADAPTER				Adapter,
+	IN	u8					channel,
+	IN  	u8					eRFPath
+ 	)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	u32		IMR_NUM = MAX_RF_IMR_INDEX;
+	u32	   	RFMask=bRFRegOffsetMask;
+	u8	   	group=0, i;
+
+#ifdef CONFIG_USB_HCI
+	if(Adapter->dvobjpriv.ishighspeed == _FALSE)
+		return;
+#endif	
+
+	//only for 92D C-cut SMSP
+
+	//RT_TRACE(COMP_CMD, DBG_LOUD, ("====>phy_ReloadIMRSetting interface %d path %d\n", pHalData->interfaceIndex, eRFPath));
+
+	if(pHalData->CurrentBandType92D == BAND_ON_5G)
+	{
+		PHY_SetBBReg1Byte(Adapter, rFPGA0_RFMOD, BIT25|BIT24, 0);
+		PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter4, 0x00f00000,	0xf);
+	
+		// fc area 0xd2c
+		if(channel>=149)
+			PHY_SetBBReg(Adapter, rOFDM1_CFOTracking, BIT13|BIT14,2);	
+		else
+			PHY_SetBBReg(Adapter, rOFDM1_CFOTracking, BIT13|BIT14,1);
+		
+		group = channel<=64?1:2; //leave 0 for channel1-14.
+		IMR_NUM = MAX_RF_IMR_INDEX_NORMAL;
+		
+		for(i=0; i<IMR_NUM; i++){
+			PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, RF_REG_FOR_5G_SWCHNL_NORMAL[i], RFMask,RF_IMR_Param_Normal[0][group][i]);
+		}				
+		PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter4, 0x00f00000,0);
+		PHY_SetBBReg1Byte(Adapter, rFPGA0_RFMOD, bOFDMEn|bCCKEn, 2);
+	}
+	else{ //G band.
+		//RT_TRACE(COMP_SCAN,DBG_LOUD,("Load RF IMR parameters for G band. IMR already setting %d \n",pMgntInfo->bLoadIMRandIQKSettingFor2G));
+
+		if(!pHalData->bLoadIMRandIQKSettingFor2G){
+			//RT_TRACE(COMP_SCAN,DBG_LOUD,("Load RF IMR parameters for G band. %d \n",eRFPath));
+			//AcquireCCKAndRWPageAControl(Adapter);
+			PHY_SetBBReg1Byte(Adapter, rFPGA0_RFMOD, BIT25|BIT24, 0);
+			PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter4, 0x00f00000,	0xf);
+
+			IMR_NUM = MAX_RF_IMR_INDEX_NORMAL;
+			for(i=0; i<IMR_NUM; i++){
+				PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, RF_REG_FOR_5G_SWCHNL_NORMAL[i], bRFRegOffsetMask,RF_IMR_Param_Normal[0][0][i]);
+			}
+			PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter4, 0x00f00000,0);
+			PHY_SetBBReg1Byte(Adapter, rFPGA0_RFMOD, bOFDMEn|bCCKEn, 3);
+			//ReleaseCCKAndRWPageAControl(Adapter);
+		}
+	}
+	
+	//RT_TRACE(COMP_CMD, DBG_LOUD, ("<====phy_ReloadIMRSetting\n"));
+
+}	
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	phy_ReloadIQKSetting
+ *
+ * Overview:	Change RF Setting when we siwthc channel for 92D C-cut.
+ *
+ * Input:       IN	PADAPTER				pAdapter
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 01/08/2009	MHC		Suggestion from SD3 Willis for 92S series.
+ * 01/09/2009	MHC		Add CCK modification for 40MHZ. Suggestion from SD3.
+ *
+ *---------------------------------------------------------------------------*/
+ static VOID	
+ phy_ReloadIQKSetting(
+ 	IN	PADAPTER				Adapter,
+	IN	u8					channel
+ 	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8	   	Indexforchannel;//index, 
+
+	//only for 92D C-cut SMSP
+
+#ifdef CONFIG_USB_HCI
+	if(Adapter->dvobjpriv.ishighspeed == _FALSE)
+		return;
+#endif
+
+	//RT_TRACE(COMP_CMD, DBG_LOUD, ("====>phy_ReloadIQKSetting interface %d channel %d \n", Adapter->interfaceIndex, channel));
+
+	//---------Do IQK for normal chip and test chip 5G band----------------
+	Indexforchannel = rtl8192d_GetRightChnlPlaceforIQK(channel);
+
+	//RT_TRACE(COMP_CMD, DBG_LOUD, ("====>Indexforchannel %d done %d\n", Indexforchannel, pHalData->IQKMatrixRegSetting[Indexforchannel].bIQKDone));
+
+	
+#if MP_DRIVER == 1
+	pHalData->bNeedIQK = _TRUE;
+	pHalData->bLoadIMRandIQKSettingFor2G = _FALSE;
+#endif
+	
+	if(pHalData->bNeedIQK && !pHalData->IQKMatrixRegSetting[Indexforchannel].bIQKDone)
+	{ //Re Do IQK.
+		DBG_8192C("Do IQK Matrix reg for channel:%d....\n", channel);
+		rtl8192d_PHY_IQCalibrate(Adapter);
+	}
+	else //Just load the value.
+	{
+		// 2G band just load once.
+		if(((!pHalData->bLoadIMRandIQKSettingFor2G) && Indexforchannel==0) ||Indexforchannel>0)
+		{
+			//DBG_8192C("Just Read IQK Matrix reg for channel:%d....\n", channel);
+
+			if((pHalData->IQKMatrixRegSetting[Indexforchannel].Value[0][0] != 0)/*&&(RegEA4 != 0)*/)
+			{
+				if(pHalData->CurrentBandType92D == BAND_ON_5G)
+					phy_PathAFillIQKMatrix_5G_Normal(Adapter, _TRUE, pHalData->IQKMatrixRegSetting[Indexforchannel].Value, 0, (pHalData->IQKMatrixRegSetting[Indexforchannel].Value[0][2] == 0));
+				else
+					phy_PathAFillIQKMatrix(Adapter, _TRUE, pHalData->IQKMatrixRegSetting[Indexforchannel].Value, 0, (pHalData->IQKMatrixRegSetting[Indexforchannel].Value[0][2] == 0));
+			}
+
+			if (IS_92D_SINGLEPHY(pHalData->VersionID))
+			{
+				if((pHalData->IQKMatrixRegSetting[Indexforchannel].Value[0][4] != 0)/*&&(RegEC4 != 0)*/)
+				{
+					if(pHalData->CurrentBandType92D == BAND_ON_5G)
+						phy_PathBFillIQKMatrix_5G_Normal(Adapter, _TRUE, pHalData->IQKMatrixRegSetting[Indexforchannel].Value, 0, (pHalData->IQKMatrixRegSetting[Indexforchannel].Value[0][6] == 0));
+					else
+						phy_PathBFillIQKMatrix(Adapter, _TRUE, pHalData->IQKMatrixRegSetting[Indexforchannel].Value, 0, (pHalData->IQKMatrixRegSetting[Indexforchannel].Value[0][6] == 0));
+				}
+			}				
+
+			if((Adapter->mlmeextpriv.sitesurvey_res.state == SCAN_PROCESS)&&(Indexforchannel==0))
+				pHalData->bLoadIMRandIQKSettingFor2G=_TRUE;
+		}				
+	}					
+	pHalData->bNeedIQK = _FALSE;
+	ATOMIC_SET(&pHalData->IQKRdyForXmit, 1);
+	
+	//RT_TRACE(COMP_CMD, DBG_LOUD, ("<====phy_ReloadIQKSetting\n"));
+
+}
+
+
+static void _PHY_SwChnl8192D(PADAPTER Adapter, u8 channel)
+{
+	u8	eRFPath;
+	u32	param1, param2;
+	u32	ret_value;
+	BAND_TYPE	bandtype, target_bandtype;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	// FOr 92D dual mac config.
+	PADAPTER	BuddyAdapter = Adapter->pbuddy_adapter;
+#endif
+
+	if(pHalData->BandSet92D == BAND_ON_BOTH){
+		// Need change band?
+		// BB {Reg878[0],[16]} bit0= 1 is 5G, bit0=0 is 2G.
+		ret_value = PHY_QueryBBReg(Adapter, rFPGA0_XAB_RFParameter, bMaskDWord);
+
+		if(ret_value & BIT0)
+			bandtype = BAND_ON_5G;
+		else
+			bandtype = BAND_ON_2_4G;
+
+		// Use current channel to judge Band Type and switch Band if need.
+		if(channel > 14)
+		{
+			target_bandtype = BAND_ON_5G;
+		}
+		else
+		{
+			target_bandtype = BAND_ON_2_4G;
+		}
+
+		if(target_bandtype != bandtype)
+			PHY_SwitchWirelessBand(Adapter,target_bandtype);
+	}
+
+	do{
+		//s1. pre common command - CmdID_SetTxPowerLevel
+		PHY_SetTxPowerLevel8192D(Adapter, channel);
+
+		//s2. RF dependent command - CmdID_RF_WriteReg, param1=RF_CHNLBW, param2=channel
+		param1 = RF_CHNLBW;
+		param2 = channel;
+		for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
+		{
+#if 1
+			//pHalData->RfRegChnlVal[eRFPath] = PHY_QueryRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, RF_CHNLBW, bRFRegOffsetMask);
+			// & 0xFFFFFC00 just for 2.4G. So for 5G band,bit[9:8]= 1. we change this setting for 5G. by wl
+			pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xffffff00) | param2);
+			if(pHalData->CurrentBandType92D == BAND_ON_5G)
+			{
+				if(param2>99)
+				{
+					pHalData->RfRegChnlVal[eRFPath]=pHalData->RfRegChnlVal[eRFPath]|(BIT18);
+				}
+				else
+				{
+					pHalData->RfRegChnlVal[eRFPath]=pHalData->RfRegChnlVal[eRFPath]&(~BIT18);
+				}
+				pHalData->RfRegChnlVal[eRFPath] |= (BIT16|BIT8);
+			}
+			else
+			{
+				pHalData->RfRegChnlVal[eRFPath] &= ~(BIT8|BIT16|BIT18);
+			}
+			PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]);
+#else
+			PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, param1, bRFRegOffsetMask, param2);
+#endif
+
+			phy_ReloadIMRSetting(Adapter, channel, eRFPath);
+		}
+
+		phy_SwitchRfSetting(Adapter, channel);
+
+#if 0
+		phy_ReloadLCKSetting(Adapter, channel);		
+#endif	
+
+		//do IQK when all parameters are ready			
+		phy_ReloadIQKSetting(Adapter, channel);
+		break;
+	}while(_TRUE);
+
+	//s3. post common command - CmdID_End, None
+
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	if(Adapter->DualMacConcurrent == _TRUE && BuddyAdapter != NULL)
+	{
+		if(pHalData->bMasterOfDMSP)
+		{
+			GET_HAL_DATA(BuddyAdapter)->CurrentChannel=channel;
+			ATOMIC_SET(&(GET_HAL_DATA(BuddyAdapter)->IQKRdyForXmit), 1);
+		}
+	}
+#endif
+}
+
+
+VOID
+PHY_SwChnl8192D(	// Call after initialization
+	IN	PADAPTER	Adapter,
+	IN	u8		channel
+	)
+{
+	//PADAPTER Adapter =  ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, _TRUE);
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8	tmpchannel = pHalData->CurrentChannel;
+	BOOLEAN  bResult = _TRUE;
+	u32	timeout = 1000, timecount = 0;
+
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	PADAPTER	BuddyAdapter = Adapter->pbuddy_adapter;
+	HAL_DATA_TYPE	*pHalDataBuddyAdapter;
+#endif
+
+	if(pHalData->rf_chip == RF_PSEUDO_11N)
+	{
+		//pHalData->SwChnlInProgress=FALSE;
+		return; 								//return immediately if it is peudo-phy	
+	}
+
+	if(Adapter->mlmeextpriv.sitesurvey_res.state == SCAN_COMPLETE)
+		pHalData->bLoadIMRandIQKSettingFor2G = _FALSE;
+
+	//if(pHalData->SwChnlInProgress)
+	//	return;
+
+	//if(pHalData->SetBWModeInProgress)
+	//	return;
+
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	if(pHalData->bInModeSwitchProcess)
+	{
+		DBG_871X("PHY_SwChnl8192D(): During mode switch \n");
+		//pHalData->SwChnlInProgress=_FALSE;
+		return;
+	}
+
+	if(BuddyAdapter != NULL && 
+		((pHalData->interfaceIndex == 0 && pHalData->CurrentBandType92D == BAND_ON_2_4G) ||
+		(pHalData->interfaceIndex == 1 && pHalData->CurrentBandType92D == BAND_ON_5G)))
+	{
+		pHalDataBuddyAdapter=GET_HAL_DATA(BuddyAdapter);
+		while(pHalDataBuddyAdapter->bLCKInProgress && timecount < timeout)
+		{
+			#ifdef CONFIG_LONG_DELAY_ISSUE
+			rtw_msleep_os(50);
+			#else
+			rtw_mdelay_os(50);
+			#endif
+			timecount += 50;
+		}
+	}
+#endif
+
+	while(pHalData->bLCKInProgress && timecount < timeout)
+	{
+		#ifdef CONFIG_LONG_DELAY_ISSUE
+		rtw_msleep_os(50);
+		#else
+		rtw_mdelay_os(50);
+		#endif
+		timecount += 50;
+	}
+
+	//--------------------------------------------
+	switch(pHalData->CurrentWirelessMode)
+	{
+		case WIRELESS_MODE_A:
+		case WIRELESS_MODE_N_5G:
+			//Get first channel error when change between 5G and 2.4G band.
+			//FIX ME!!!
+			//if(channel <=14)
+			//	return;
+			//RT_ASSERT((channel>14), ("WIRELESS_MODE_A but channel<=14"));
+			break;
+		
+		case WIRELESS_MODE_B:
+			//if(channel>14)
+			//	return;
+			//RT_ASSERT((channel<=14), ("WIRELESS_MODE_B but channel>14"));
+			break;
+		
+		case WIRELESS_MODE_G:
+		case WIRELESS_MODE_N_24G:
+			//Get first channel error when change between 5G and 2.4G band.
+			//FIX ME!!!
+			//if(channel > 14)
+			//	return;
+			//RT_ASSERT((channel<=14), ("WIRELESS_MODE_G but channel>14"));
+			break;
+
+		default:
+			//RT_ASSERT(FALSE, ("Invalid WirelessMode(%#x)!!\n", pHalData->CurrentWirelessMode));
+			break;
+	}
+	//--------------------------------------------
+
+	//pHalData->SwChnlInProgress = TRUE;
+	if( channel == 0){//FIXME!!!A band?
+		channel = 1;
+	}
+
+	pHalData->CurrentChannel=channel;
+
+	//pHalData->SwChnlStage=0;
+	//pHalData->SwChnlStep=0;
+
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	if((BuddyAdapter !=NULL) && (pHalData->bSlaveOfDMSP))
+	{
+		DBG_871X("PHY_SwChnl8192D():slave return when slave  \n");
+		//pHalData->SwChnlInProgress=_FALSE;
+		return;
+	}
+#endif
+
+	if((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved))
+	{
+#ifdef USE_WORKITEM	
+		//bResult = PlatformScheduleWorkItem(&(pHalData->SwChnlWorkItem));
+#else
+		#if 0		
+		//PlatformSetTimer(Adapter, &(pHalData->SwChnlTimer), 0);
+		#else
+		_PHY_SwChnl8192D(Adapter, channel);
+		#endif
+#endif
+		if(bResult)
+		{
+			//RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress TRUE schdule workitem done\n"));
+		}
+		else
+		{
+			//RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress FALSE schdule workitem error\n"));		
+			//if(IS_HARDWARE_TYPE_8192SU(Adapter))
+			//{
+			//	pHalData->SwChnlInProgress = FALSE; 	
+				pHalData->CurrentChannel = tmpchannel;			
+			//}
+		}
+
+	}
+	else
+	{
+		//RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress FALSE driver sleep or unload\n"));	
+		//if(IS_HARDWARE_TYPE_8192SU(Adapter))
+		//{
+		//	pHalData->SwChnlInProgress = FALSE;		
+			pHalData->CurrentChannel = tmpchannel;
+		//}
+	}
+}
+
+#ifndef PLATFORM_FREEBSD //amy, temp remove
+static	BOOLEAN
+phy_SwChnlStepByStep(
+	IN	PADAPTER	Adapter,
+	IN	u8		channel,
+	IN	u8		*stage,
+	IN	u8		*step,
+	OUT u32		*delay
+	)
+{
+#if 0
+	HAL_DATA_TYPE			*pHalData = GET_HAL_DATA(Adapter);
+	PCHANNEL_ACCESS_SETTING	pChnlAccessSetting;
+	SwChnlCmd				PreCommonCmd[MAX_PRECMD_CNT];
+	u4Byte					PreCommonCmdCnt;
+	SwChnlCmd				PostCommonCmd[MAX_POSTCMD_CNT];
+	u4Byte					PostCommonCmdCnt;
+	SwChnlCmd				RfDependCmd[MAX_RFDEPENDCMD_CNT];
+	u4Byte					RfDependCmdCnt;
+	SwChnlCmd				*CurrentCmd;	
+	u1Byte					eRFPath;	
+	u4Byte					RfTXPowerCtrl;
+	BOOLEAN					bAdjRfTXPowerCtrl = _FALSE;
+	
+	
+	RT_ASSERT((Adapter != NULL), ("Adapter should not be NULL\n"));
+#if(MP_DRIVER != 1)
+	RT_ASSERT(IsLegalChannel(Adapter, channel), ("illegal channel: %d\n", channel));
+#endif
+	RT_ASSERT((pHalData != NULL), ("pHalData should not be NULL\n"));
+	
+	pChnlAccessSetting = &Adapter->MgntInfo.Info8185.ChannelAccessSetting;
+	RT_ASSERT((pChnlAccessSetting != NULL), ("pChnlAccessSetting should not be NULL\n"));
+	
+	//for(eRFPath = RF_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
+	//for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
+	//{
+		// <1> Fill up pre common command.
+	PreCommonCmdCnt = 0;
+	phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++, MAX_PRECMD_CNT, 
+				CmdID_SetTxPowerLevel, 0, 0, 0);
+	phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++, MAX_PRECMD_CNT, 
+				CmdID_End, 0, 0, 0);
+	
+		// <2> Fill up post common command.
+	PostCommonCmdCnt = 0;
+
+	phy_SetSwChnlCmdArray(PostCommonCmd, PostCommonCmdCnt++, MAX_POSTCMD_CNT, 
+				CmdID_End, 0, 0, 0);
+	
+		// <3> Fill up RF dependent command.
+	RfDependCmdCnt = 0;
+	switch( pHalData->RFChipID )
+	{
+		case RF_8225:		
+		RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel));
+		// 2008/09/04 MH Change channel. 
+		if(channel==14) channel++;
+		phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, 
+			CmdID_RF_WriteReg, rZebra1_Channel, (0x10+channel-1), 10);
+		phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, 
+		CmdID_End, 0, 0, 0);
+		break;	
+		
+	case RF_8256:
+		// TEST!! This is not the table for 8256!!
+		RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel));
+		phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, 
+			CmdID_RF_WriteReg, rRfChannel, channel, 10);
+		phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, 
+		CmdID_End, 0, 0, 0);
+		break;
+		
+	case RF_6052:
+		RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel));
+		phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, 
+			CmdID_RF_WriteReg, RF_CHNLBW, channel, 10);		
+		phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, 
+		CmdID_End, 0, 0, 0);		
+		
+		break;
+
+	case RF_8258:
+		break;
+
+	// For FPGA two MAC verification
+	case RF_PSEUDO_11N:
+		return TRUE;
+	default:
+		RT_ASSERT(FALSE, ("Unknown RFChipID: %d\n", pHalData->RFChipID));
+		return FALSE;
+		break;
+	}
+
+	
+	do{
+		switch(*stage)
+		{
+		case 0:
+			CurrentCmd=&PreCommonCmd[*step];
+			break;
+		case 1:
+			CurrentCmd=&RfDependCmd[*step];
+			break;
+		case 2:
+			CurrentCmd=&PostCommonCmd[*step];
+			break;
+		}
+		
+		if(CurrentCmd->CmdID==CmdID_End)
+		{
+			if((*stage)==2)
+			{
+				return TRUE;
+			}
+			else
+			{
+				(*stage)++;
+				(*step)=0;
+				continue;
+			}
+		}
+		
+		switch(CurrentCmd->CmdID)
+		{
+		case CmdID_SetTxPowerLevel:
+			PHY_SetTxPowerLevel8192C(Adapter,channel);
+			break;
+		case CmdID_WritePortUlong:
+			PlatformEFIOWrite4Byte(Adapter, CurrentCmd->Para1, CurrentCmd->Para2);
+			break;
+		case CmdID_WritePortUshort:
+			PlatformEFIOWrite2Byte(Adapter, CurrentCmd->Para1, (u2Byte)CurrentCmd->Para2);
+			break;
+		case CmdID_WritePortUchar:
+			PlatformEFIOWrite1Byte(Adapter, CurrentCmd->Para1, (u1Byte)CurrentCmd->Para2);
+			break;
+		case CmdID_RF_WriteReg:	// Only modify channel for the register now !!!!!
+			for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
+			{
+#if 1
+				pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | CurrentCmd->Para2);
+				PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]);
+#else
+				PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bRFRegOffsetMask, (CurrentCmd->Para2));
+#endif
+			}
+			break;
+		}
+		
+		break;
+	}while(TRUE);
+	//cosa }/*for(Number of RF paths)*/
+
+	(*delay)=CurrentCmd->msDelay;
+	(*step)++;
+	return FALSE;
+#endif	
+	return _TRUE;
+}
+
+
+static	BOOLEAN
+phy_SetSwChnlCmdArray(
+	SwChnlCmd*		CmdTable,
+	u32			CmdTableIdx,
+	u32			CmdTableSz,
+	SwChnlCmdID		CmdID,
+	u32			Para1,
+	u32			Para2,
+	u32			msDelay
+	)
+{
+	SwChnlCmd* pCmd;
+
+	if(CmdTable == NULL)
+	{
+		//RT_ASSERT(FALSE, ("phy_SetSwChnlCmdArray(): CmdTable cannot be NULL.\n"));
+		return _FALSE;
+	}
+	if(CmdTableIdx >= CmdTableSz)
+	{
+		//RT_ASSERT(FALSE, 
+		//		("phy_SetSwChnlCmdArray(): Access invalid index, please check size of the table, CmdTableIdx:%ld, CmdTableSz:%ld\n",
+		//		CmdTableIdx, CmdTableSz));
+		return _FALSE;
+	}
+
+	pCmd = CmdTable + CmdTableIdx;
+	pCmd->CmdID = CmdID;
+	pCmd->Para1 = Para1;
+	pCmd->Para2 = Para2;
+	pCmd->msDelay = msDelay;
+
+	return _TRUE;
+}
+#endif  //amy, temp remove
+
+static	void
+phy_FinishSwChnlNow(	// We should not call this function directly
+		IN	PADAPTER	Adapter,
+		IN	u8		channel
+		)
+{
+#if 0
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u32			delay;
+  
+	while(!phy_SwChnlStepByStep(Adapter,channel,&pHalData->SwChnlStage,&pHalData->SwChnlStep,&delay))
+	{
+		if(delay>0)
+			rtw_mdelay_os(delay);
+	}
+#endif	
+}
+
+
+//
+// Description:
+//	Switch channel synchronously. Called by SwChnlByDelayHandler.
+//
+// Implemented by Bruce, 2008-02-14.
+// The following procedure is operted according to SwChanlCallback8190Pci().
+// However, this procedure is performed synchronously  which should be running under
+// passive level.
+// 
+VOID
+PHY_SwChnlPhy8192D(	// Only called during initialize
+	IN	PADAPTER	Adapter,
+	IN	u8		channel
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	//RT_TRACE(COMP_SCAN | COMP_RM, DBG_LOUD, ("==>PHY_SwChnlPhy8192S(), switch from channel %d to channel %d.\n", pHalData->CurrentChannel, channel));
+
+	// Cannot IO.
+	//if(RT_CANNOT_IO(Adapter))
+	//	return;
+
+	// Channel Switching is in progress.
+	//if(pHalData->SwChnlInProgress)
+	//	return;
+	
+	//return immediately if it is peudo-phy
+	if(pHalData->rf_chip == RF_PSEUDO_11N)
+	{
+		//pHalData->SwChnlInProgress=FALSE;
+		return;
+	}
+	
+	//pHalData->SwChnlInProgress = TRUE;
+	if( channel == 0)
+		channel = 1;
+	
+	pHalData->CurrentChannel=channel;
+	
+	//pHalData->SwChnlStage = 0;
+	//pHalData->SwChnlStep = 0;
+	
+	phy_FinishSwChnlNow(Adapter,channel);
+	
+	//pHalData->SwChnlInProgress = FALSE;
+}
+
+
+//
+//	Description:
+//		Configure H/W functionality to enable/disable Monitor mode.
+//		Note, because we possibly need to configure BB and RF in this function, 
+//		so caller should in PASSIVE_LEVEL. 080118, by rcnjko.
+//
+VOID
+PHY_SetMonitorMode8192D(
+	IN	PADAPTER			pAdapter,
+	IN	BOOLEAN				bEnableMonitorMode
+	)
+{
+#if 0
+	HAL_DATA_TYPE		*pHalData	= GET_HAL_DATA(pAdapter);
+	BOOLEAN				bFilterOutNonAssociatedBSSID = FALSE;
+
+	//2 Note: we may need to stop antenna diversity.
+	if(bEnableMonitorMode)
+	{
+		bFilterOutNonAssociatedBSSID = FALSE;
+		RT_TRACE(COMP_RM, DBG_LOUD, ("PHY_SetMonitorMode8192S(): enable monitor mode\n"));
+
+		pHalData->bInMonitorMode = TRUE;
+		pAdapter->HalFunc.AllowAllDestAddrHandler(pAdapter, TRUE, TRUE);
+		pAdapter->HalFunc.SetHwRegHandler(pAdapter, HW_VAR_CHECK_BSSID, (pu1Byte)&bFilterOutNonAssociatedBSSID);
+	}
+	else
+	{
+		bFilterOutNonAssociatedBSSID = TRUE;
+		RT_TRACE(COMP_RM, DBG_LOUD, ("PHY_SetMonitorMode8192S(): disable monitor mode\n"));
+
+		pAdapter->HalFunc.AllowAllDestAddrHandler(pAdapter, FALSE, TRUE);
+		pHalData->bInMonitorMode = FALSE;
+		pAdapter->HalFunc.SetHwRegHandler(pAdapter, HW_VAR_CHECK_BSSID, (pu1Byte)&bFilterOutNonAssociatedBSSID);
+	}
+#endif	
+}
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	PHYCheckIsLegalRfPath8190Pci()
+ *
+ * Overview:	Check different RF type to execute legal judgement. If RF Path is illegal
+ *			We will return false.
+ *
+ * Input:		NONE
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	11/15/2007	MHC		Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+BOOLEAN	
+PHY_CheckIsLegalRfPath8192D(	
+	IN	PADAPTER	pAdapter,
+	IN	u32	eRFPath)
+{
+//	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	BOOLEAN				rtValue = _TRUE;
+
+	// NOt check RF Path now.!
+#if 0	
+	if (pHalData->RF_Type == RF_1T2R && eRFPath != RF_PATH_A)
+	{		
+		rtValue = FALSE;
+	}
+	if (pHalData->RF_Type == RF_1T2R && eRFPath != RF_PATH_A)
+	{
+
+	}
+#endif
+	return	rtValue;
+
+}	/* PHY_CheckIsLegalRfPath8192D */
+
+//-------------------------------------------------------------------------
+//
+//	IQK
+//
+//-------------------------------------------------------------------------
+#define MAX_TOLERANCE		5
+#define MAX_TOLERANCE_92D	3
+#define IQK_DELAY_TIME		1 	//ms
+
+static u8			//bit0 = 1 => Tx OK, bit1 = 1 => Rx OK
+phy_PathA_IQK(
+	IN	PADAPTER	pAdapter,
+	IN	BOOLEAN		configPathB
+	)
+{
+	u32	regEAC, regE94, regE9C, regEA4;
+	u8	result = 0x00;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+
+	//RTPRINT(FINIT, INIT_IQK, ("Path A IQK!\n"));
+
+	//path-A IQK setting
+	//RTPRINT(FINIT, INIT_IQK, ("Path-A IQK setting!\n"));
+	if(pHalData->interfaceIndex == 0)
+	{
+		PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1f);
+		PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f);
+	}
+	else
+	{
+		PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x10008c22);
+		PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x10008c22);	
+	}
+
+	PHY_SetBBReg(pAdapter, rTx_IQK_PI_A, bMaskDWord, 0x82140102);
+
+	PHY_SetBBReg(pAdapter, rRx_IQK_PI_A, bMaskDWord, configPathB ? 0x28160202 : 
+		IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)?0x28160202:0x28160502);
+
+	//path-B IQK setting
+	if(configPathB)
+	{
+		PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x10008c22);
+		PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x10008c22);
+		PHY_SetBBReg(pAdapter, rTx_IQK_PI_B, bMaskDWord, 0x82140102);
+		if(IS_HARDWARE_TYPE_8192D(pAdapter))
+			PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, 0x28160206);
+		else
+			PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, 0x28160202);
+	}
+
+	//LO calibration setting
+	//RTPRINT(FINIT, INIT_IQK, ("LO calibration setting!\n"));
+	if(IS_HARDWARE_TYPE_8192D(pAdapter))
+		PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x00462911);
+	else
+		PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x001028d1);
+
+	//One shot, path A LOK & IQK
+	//RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n"));
+	PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
+	PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
+	
+	// delay x ms
+	//RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME));
+	rtw_udelay_os(IQK_DELAY_TIME*1000);
+
+	// Check failed
+	regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC));
+	regE94 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xe94 = 0x%x\n", regE94));
+	regE9C= PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xe9c = 0x%x\n", regE9C));
+	regEA4= PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xea4 = 0x%x\n", regEA4));
+
+	if(!(regEAC & BIT28) &&		
+		(((regE94 & 0x03FF0000)>>16) != 0x142) &&
+		(((regE9C & 0x03FF0000)>>16) != 0x42) )
+		result |= 0x01;
+	else							//if Tx not OK, ignore Rx
+		return result;
+
+	if(!(regEAC & BIT27) &&		//if Tx is OK, check whether Rx is OK
+		(((regEA4 & 0x03FF0000)>>16) != 0x132) &&
+		(((regEAC & 0x03FF0000)>>16) != 0x36))
+		result |= 0x02;
+	else
+		DBG_8192C("Path A Rx IQK fail!!\n");
+	
+	return result;
+
+
+}
+
+static u8			//bit0 = 1 => Tx OK, bit1 = 1 => Rx OK
+phy_PathA_IQK_5G_Normal(
+	IN	PADAPTER	pAdapter,
+	IN	BOOLEAN		configPathB
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u32	regEAC, regE94, regE9C, regEA4;
+	u8	result = 0x00;
+	u8	i = 0;
+#if MP_DRIVER == 1
+	u8	retryCount = 9;
+#else
+	u8	retryCount = 2;
+#endif
+	u8	timeout = 20, timecount = 0;
+
+	u32	TxOKBit = BIT28, RxOKBit = BIT27;
+
+	if(pHalData->interfaceIndex == 1)	//PHY1
+	{
+		TxOKBit = BIT31;
+		RxOKBit = BIT30;
+	}
+
+	//RTPRINT(FINIT, INIT_IQK, ("Path A IQK!\n"));
+
+	//path-A IQK setting
+	//RTPRINT(FINIT, INIT_IQK, ("Path-A IQK setting!\n"));
+
+	PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1f);
+	PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x18008c1f);
+	PHY_SetBBReg(pAdapter, rTx_IQK_PI_A, bMaskDWord, 0x82140307);
+	PHY_SetBBReg(pAdapter, rRx_IQK_PI_A, bMaskDWord, 0x68160960);
+
+	//path-B IQK setting
+	if(configPathB)
+	{
+		PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x18008c2f );
+		PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x18008c2f );
+		PHY_SetBBReg(pAdapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
+		PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, 0x68110000);
+	}
+	
+	//LO calibration setting
+	//RTPRINT(FINIT, INIT_IQK, ("LO calibration setting!\n"));
+	PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x00462911);
+
+	//path-A PA on
+#if 0	
+	PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10|BIT11, 0x03);
+	PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT6|BIT5, 0x03);	
+	PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10|BIT11, 0x03);
+#else
+	PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, bMaskDWord, 0x07000f60);
+	PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, 0x66e60e30);
+#endif
+
+	for(i = 0 ; i < retryCount ; i++)
+	{
+
+		//One shot, path A LOK & IQK
+		//RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n"));
+		PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
+		PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
+
+		// delay x ms
+		//RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME));
+		//rtw_udelay_os(IQK_DELAY_TIME*1000*10);
+		rtw_mdelay_os(IQK_DELAY_TIME*10);
+
+		while(timecount < timeout && PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, BIT26) == 0x00)
+		{
+			rtw_udelay_os(IQK_DELAY_TIME*1000*2);
+			timecount++;
+			//RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for polling 0xeac bit26\n", timecount*2));
+		}
+
+		timecount = 0;
+		while(timecount < timeout && PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, 0x3FF0000) == 0x00)
+		{
+			rtw_udelay_os(IQK_DELAY_TIME*1000*2);
+			timecount++;
+			//RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for polling 0xea4[25:16]\n", timecount*2));
+		}
+
+		//RTPRINT(FINIT, INIT_IQK, ("0xea0 = 0x%lx\n", PHY_QueryBBReg(pAdapter, 0xea0, bMaskDWord)));
+		//RTPRINT(FINIT, INIT_IQK, ("0xea8 = 0x%lx\n", PHY_QueryBBReg(pAdapter, 0xea8, bMaskDWord)));
+
+		// Check failed
+		regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord);
+		//RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%lx\n", regEAC));
+		regE94 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord);
+		//RTPRINT(FINIT, INIT_IQK, ("0xe94 = 0x%lx\n", regE94));
+		regE9C= PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord);
+		//RTPRINT(FINIT, INIT_IQK, ("0xe9c = 0x%lx\n", regE9C));
+		regEA4= PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord);
+		//RTPRINT(FINIT, INIT_IQK, ("0xea4 = 0x%lx\n", regEA4));
+
+		if(!(regEAC & TxOKBit) &&		
+			(((regE94 & 0x03FF0000)>>16) != 0x142)  )
+		{
+			result |= 0x01;
+		}
+		else			//if Tx not OK, ignore Rx
+		{
+			//RTPRINT(FINIT, INIT_IQK, ("Path A Tx IQK fail!!\n"));		
+			continue;
+		}		
+
+		if(!(regEAC & RxOKBit) &&			//if Tx is OK, check whether Rx is OK
+			(((regEA4 & 0x03FF0000)>>16) != 0x132))
+		{
+			result |= 0x02;
+			break;
+		}	
+		else
+		{
+			//RTPRINT(FINIT, INIT_IQK, ("Path A Rx IQK fail!!\n"));
+		}
+	}
+
+	//path A PA off
+	PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, bMaskDWord, pdmpriv->IQK_BB_backup[0]);
+	PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pdmpriv->IQK_BB_backup[1]);
+
+	if(!(result & 0x01))	//Tx IQK fail
+	{
+		PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x19008c00);
+	}
+
+	if(!(result & 0x02))	//Rx IQK fail
+	{
+		PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance , bMaskDWord, 0x40000100);	
+		PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A , bMaskDWord, 0x19008c00);	
+
+		DBG_871X("Path A Rx IQK fail!!0xe34 = 0x%x\n", PHY_QueryBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord));
+	}
+
+	return result;
+}
+
+static u8				//bit0 = 1 => Tx OK, bit1 = 1 => Rx OK
+phy_PathB_IQK(
+	IN	PADAPTER	pAdapter
+	)
+{
+	u32 regEAC, regEB4, regEBC, regEC4, regECC;
+	u8	result = 0x00;
+	//RTPRINT(FINIT, INIT_IQK, ("Path B IQK!\n"));
+
+	//One shot, path B LOK & IQK
+	//RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n"));
+	PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000002);
+	PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000000);
+
+	// delay x ms
+	//RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path B LOK & IQK.\n", IQK_DELAY_TIME));
+	rtw_udelay_os(IQK_DELAY_TIME*1000);//PlatformStallExecution(IQK_DELAY_TIME*1000);
+
+	// Check failed
+	regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC));
+	regEB4 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xeb4 = 0x%x\n", regEB4));
+	regEBC= PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xebc = 0x%x\n", regEBC));
+	regEC4= PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xec4 = 0x%x\n", regEC4));
+	regECC= PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord);
+	//RTPRINT(FINIT, INIT_IQK, ("0xecc = 0x%x\n", regECC));
+
+	if(!(regEAC & BIT31) &&
+		(((regEB4 & 0x03FF0000)>>16) != 0x142) &&
+		(((regEBC & 0x03FF0000)>>16) != 0x42))
+		result |= 0x01;
+	else
+		return result;
+
+	if(!(regEAC & BIT30) &&
+		(((regEC4 & 0x03FF0000)>>16) != 0x132) &&
+		(((regECC & 0x03FF0000)>>16) != 0x36))
+		result |= 0x02;
+	else
+		DBG_8192C("Path B Rx IQK fail!!\n");
+	
+
+	return result;
+
+}
+
+static u8				//bit0 = 1 => Tx OK, bit1 = 1 => Rx OK
+phy_PathB_IQK_5G_Normal(
+	IN	PADAPTER	pAdapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u32	regEAC, regEB4, regEBC, regEC4, regECC;
+	u8	result = 0x00;
+	u8	i = 0;
+#if MP_DRIVER == 1
+	u8	retryCount = 9;
+#else
+	u8	retryCount = 2;
+#endif
+	u8	timeout = 20, timecount = 0;
+
+	//RTPRINT(FINIT, INIT_IQK, ("Path B IQK!\n"));
+
+	//path-A IQK setting
+	//RTPRINT(FINIT, INIT_IQK, ("Path-A IQK setting!\n"));
+	PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1f);
+	PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x18008c1f);
+
+	PHY_SetBBReg(pAdapter, rTx_IQK_PI_A, bMaskDWord, 0x82110000);
+	PHY_SetBBReg(pAdapter, rRx_IQK_PI_A, bMaskDWord, 0x68110000);
+
+	//path-B IQK setting
+	PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x18008c2f );
+	PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x18008c2f );
+	PHY_SetBBReg(pAdapter, rTx_IQK_PI_B, bMaskDWord, 0x82140307);
+	PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, 0x68160960);
+
+	//LO calibration setting
+	//RTPRINT(FINIT, INIT_IQK, ("LO calibration setting!\n"));
+	PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x00462911);
+
+	//path-B PA on
+#if 0	
+	PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT27|BIT26, 0x03);
+	PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT22|BIT21, 0x03);
+	PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10|BIT11, 0x03);
+#else
+	PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, bMaskDWord, 0x0f600700);	
+	PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, bMaskDWord, 0x061f0d30);
+#endif
+
+	for(i = 0 ; i < retryCount ; i++)
+	{
+		//One shot, path B LOK & IQK
+		//RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n"));
+		//PHY_SetBBReg(pAdapter, 0xe60, bMaskDWord, 0x00000002);
+		//PHY_SetBBReg(pAdapter, 0xe60, bMaskDWord, 0x00000000);
+		PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xfa000000);
+		PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
+
+
+		// delay x ms
+		//RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path B LOK & IQK.\n", 10));
+		//rtw_udelay_os(IQK_DELAY_TIME*1000*10);
+		rtw_mdelay_os(IQK_DELAY_TIME*10);
+
+		while(timecount < timeout && PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, BIT29) == 0x00)
+		{
+			rtw_udelay_os(IQK_DELAY_TIME*1000*2);
+			timecount++;
+			//RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for polling 0xeac bit29\n", timecount*2));
+		}
+
+		timecount = 0;
+		while(timecount < timeout && PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, 0x3FF0000) == 0x00)
+		{
+			rtw_udelay_os(IQK_DELAY_TIME*1000*2);
+			timecount++;
+			//RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for polling 0xec4[25:16]\n", timecount*2));
+		}
+
+		//RTPRINT(FINIT, INIT_IQK, ("0xec0 = 0x%lx\n", PHY_QueryBBReg(pAdapter, 0xec0, bMaskDWord)));
+		//RTPRINT(FINIT, INIT_IQK, ("0xec8 = 0x%lx\n", PHY_QueryBBReg(pAdapter, 0xec8, bMaskDWord)));
+
+		// Check failed
+		regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord);
+		//RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%lx\n", regEAC));
+		regEB4 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord);
+		//RTPRINT(FINIT, INIT_IQK, ("0xeb4 = 0x%lx\n", regEB4));
+		regEBC= PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord);
+		//RTPRINT(FINIT, INIT_IQK, ("0xebc = 0x%lx\n", regEBC));
+		regEC4= PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord);
+		//RTPRINT(FINIT, INIT_IQK, ("0xec4 = 0x%lx\n", regEC4));
+		regECC= PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord);
+		//RTPRINT(FINIT, INIT_IQK, ("0xecc = 0x%lx\n", regECC));
+
+		if(!(regEAC & BIT31) &&
+			(((regEB4 & 0x03FF0000)>>16) != 0x142))
+			result |= 0x01;
+		else
+			continue;
+
+		if(!(regEAC & BIT30) &&
+			(((regEC4 & 0x03FF0000)>>16) != 0x132))
+		{
+			result |= 0x02;
+			break;
+		}
+		else
+		{
+			//RTPRINT(FINIT, INIT_IQK, ("Path B Rx IQK fail!!\n"));		
+		}
+	}
+
+	//path B PA off
+	PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, bMaskDWord, pdmpriv->IQK_BB_backup[0]);
+	PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, bMaskDWord, pdmpriv->IQK_BB_backup[2]);
+
+	if(!(result & 0x01))	//Tx IQK fail
+	{
+		PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x19008c00);
+	}
+
+	if(!(result & 0x02))	//Rx IQK fail
+	{
+		PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance , bMaskDWord, 0x40000100);
+		PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B , bMaskDWord, 0x19008c00);
+		DBG_871X("Path B Rx IQK fail!!0xe54 = 0x%x\n", PHY_QueryBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord));
+	}
+
+	return result;
+}
+
+static VOID
+phy_PathAFillIQKMatrix(
+	IN PADAPTER	pAdapter,
+	IN BOOLEAN	bIQKOK,
+	IN int		result[][8],
+	IN u8		final_candidate,
+	IN BOOLEAN	bTxOnly
+	)
+{
+	u32	Oldval_0, X, TX0_A, reg;
+	int	Y, TX0_C;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);	
+	
+	//DBG_8192C("Path A IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed");
+
+	if(final_candidate == 0xFF)
+		return;
+
+	else if(bIQKOK)
+	{
+		Oldval_0 = (PHY_QueryBBReg(pAdapter, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF;//OFDM0_D
+
+		X = result[final_candidate][0];
+		if ((X & 0x00000200) != 0)
+			X = X | 0xFFFFFC00;				
+		TX0_A = (X * Oldval_0) >> 8;
+		//RTPRINT(FINIT, INIT_IQK, ("X = 0x%lx, TX0_A = 0x%lx, Oldval_0 0x%lx\n", X, TX0_A, Oldval_0));
+		PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A);
+		if(IS_HARDWARE_TYPE_8192D(pAdapter))
+			PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT24, ((X* Oldval_0>>7) & 0x1));
+		else
+			PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(31), ((X* Oldval_0>>7) & 0x1));
+
+		Y = result[final_candidate][1];
+		if ((Y & 0x00000200) != 0)
+			Y = Y | 0xFFFFFC00;
+
+		//path B IQK result + 3
+		if(pHalData->interfaceIndex == 1 && pHalData->CurrentBandType92D == BAND_ON_5G)
+			Y += 3;
+		
+		TX0_C = (Y * Oldval_0) >> 8;
+		//RTPRINT(FINIT, INIT_IQK, ("Y = 0x%lx, TX0_C = 0x%lx\n", Y, TX0_C));
+		PHY_SetBBReg(pAdapter, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6));
+		PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F));
+		if(IS_HARDWARE_TYPE_8192D(pAdapter)/*&&is2T*/)
+			PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT26, ((Y* Oldval_0>>7) & 0x1));
+		else
+			PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(29), ((Y* Oldval_0>>7) & 0x1));
+
+	        if(bTxOnly)
+		{
+			//DBG_8192C("_PHY_PathAFillIQKMatrix only Tx OK\n");
+			return;
+		}
+
+		reg = result[final_candidate][2];
+		PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0x3FF, reg);
+
+		reg = result[final_candidate][3] & 0x3F;
+		PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0xFC00, reg);
+
+		reg = (result[final_candidate][3] >> 6) & 0xF;
+		PHY_SetBBReg(pAdapter, rOFDM0_RxIQExtAnta, 0xF0000000, reg);
+	}
+}
+
+static VOID
+phy_PathAFillIQKMatrix_5G_Normal(
+	IN PADAPTER	pAdapter,
+	IN BOOLEAN	bIQKOK,
+	IN int		result[][8],
+	IN u8		final_candidate,
+	IN BOOLEAN	bTxOnly
+	)
+{
+	u32	X, reg;
+	int	Y;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	//BOOLEAN		is2T =  IS_92D_SINGLEPHY(pHalData->VersionID) || 
+	//				pHalData->MacPhyMode92D == DUALMAC_DUALPHY;
+
+	//DBG_8192C("Path A IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed");
+
+	if(bIQKOK && final_candidate != 0xFF)
+	{
+		X = result[final_candidate][0];
+		if ((X & 0x00000200) != 0)
+			X = X | 0xFFFFFC00;
+
+		//RTPRINT(FINIT, INIT_IQK, ("X = 0x%lx\n", X));
+		PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, 0x3FF0000, X);
+		PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT24, 0);
+
+		//RTPRINT(FINIT, INIT_IQK, ("0xe30 = 0x%lx\n", PHY_QueryBBReg(pAdapter, 0xe30, bMaskDWord)));
+
+		Y = result[final_candidate][1];
+		if ((Y & 0x00000200) != 0)
+			Y = Y | 0xFFFFFC00;	
+
+		//path A/B IQK result + 3, suggest by Jenyu
+		if(pHalData->CurrentBandType92D == BAND_ON_5G)
+			Y += 3;
+
+		//RTPRINT(FINIT, INIT_IQK, ("Y = 0x%lx\n", Y));
+		PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, 0x003FF, Y);
+		//if(is2T)
+			PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT26, 0);
+
+		//RTPRINT(FINIT, INIT_IQK, ("0xe30 = 0x%lx\n", PHY_QueryBBReg(pAdapter, 0xe30, bMaskDWord)));
+
+		if(bTxOnly)
+		{
+			//DBG_8192C("_PHY_PathAFillIQKMatrix only Tx OK\n");
+			return;
+		}
+
+		reg = result[final_candidate][2];
+		PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0x3FF, reg);
+
+		reg = result[final_candidate][3] & 0x3F;
+		PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0xFC00, reg);
+
+		reg = (result[final_candidate][3] >> 6) & 0xF;
+		PHY_SetBBReg(pAdapter, rOFDM0_RxIQExtAnta, 0xF0000000, reg);
+	}
+	else
+	{
+		DBG_871X("phy_PathAFillIQKMatrix Tx/Rx FAIL restore default value\n");
+		PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x19008c00);
+		PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance , bMaskDWord, 0x40000100);
+		PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A , bMaskDWord, 0x19008c00);
+	}
+}
+
+static VOID
+phy_PathBFillIQKMatrix(
+	IN PADAPTER	pAdapter,
+	IN BOOLEAN	bIQKOK,
+	IN int		result[][8],
+	IN u8		final_candidate,
+	IN BOOLEAN	bTxOnly			//do Tx only
+	)
+{
+	u32	Oldval_1, X, TX1_A, reg;
+	int	Y, TX1_C;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	
+	//DBG_8192C("Path B IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed");
+
+        if(final_candidate == 0xFF)
+		return;
+
+	else if(bIQKOK)
+	{
+		Oldval_1 = (PHY_QueryBBReg(pAdapter, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF;
+
+		X = result[final_candidate][4];
+		if ((X & 0x00000200) != 0)
+			X = X | 0xFFFFFC00;		
+		TX1_A = (X * Oldval_1) >> 8;
+		//RTPRINT(FINIT, INIT_IQK, ("X = 0x%lx, TX1_A = 0x%lx\n", X, TX1_A));
+		PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A);
+		if(IS_HARDWARE_TYPE_8192D(pAdapter))
+           		PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT28, ((X* Oldval_1>>7) & 0x1));
+		else
+			PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(27), ((X* Oldval_1>>7) & 0x1));
+
+		Y = result[final_candidate][5];
+		if ((Y & 0x00000200) != 0)
+			Y = Y | 0xFFFFFC00;
+		if(pHalData->CurrentBandType92D == BAND_ON_5G)		
+			Y += 3;		//temp modify for preformance
+		TX1_C = (Y * Oldval_1) >> 8;
+		//RTPRINT(FINIT, INIT_IQK, ("Y = 0x%lx, TX1_C = 0x%lx\n", Y, TX1_C));
+		PHY_SetBBReg(pAdapter, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6));
+		PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F));
+		if(IS_HARDWARE_TYPE_8192D(pAdapter))
+			PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT30, ((Y* Oldval_1>>7) & 0x1));
+		else
+			PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(25), ((Y* Oldval_1>>7) & 0x1));
+
+		if(bTxOnly)
+			return;
+
+		reg = result[final_candidate][6];
+		PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0x3FF, reg);
+
+		reg = result[final_candidate][7] & 0x3F;
+		PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0xFC00, reg);
+
+		reg = (result[final_candidate][7] >> 6) & 0xF;
+		PHY_SetBBReg(pAdapter, rOFDM0_AGCRSSITable, 0x0000F000, reg);
+	}
+}
+
+static VOID
+phy_PathBFillIQKMatrix_5G_Normal(
+	IN PADAPTER	pAdapter,
+	IN BOOLEAN	bIQKOK,
+	IN int		result[][8],
+	IN u8		final_candidate,
+	IN BOOLEAN	bTxOnly			//do Tx only
+	)
+{
+	u32	X, reg;
+	int	Y;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	
+	//DBG_8192C("Path B IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed");
+
+	if(bIQKOK && final_candidate != 0xFF)
+	{
+		X = result[final_candidate][4];
+		if ((X & 0x00000200) != 0)
+			X = X | 0xFFFFFC00;
+
+		//RTPRINT(FINIT, INIT_IQK, ("X = 0x%lx\n", X));
+		PHY_SetBBReg(pAdapter, 0xe50, 0x3FF0000, X);
+		PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT28, 0);
+
+		Y = result[final_candidate][5];
+		if ((Y & 0x00000200) != 0)
+			Y = Y | 0xFFFFFC00;
+		if(pHalData->CurrentBandType92D == BAND_ON_5G)
+			Y += 3;		//temp modify for preformance, suggest by Jenyu
+
+		//RTPRINT(FINIT, INIT_IQK, ("Y = 0x%lx\n", Y));
+		PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, 0x003FF, Y);
+		PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT30, 0);
+
+		if(bTxOnly)
+			return;
+
+		reg = result[final_candidate][6];
+		PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0x3FF, reg);
+
+		reg = result[final_candidate][7] & 0x3F;
+		PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0xFC00, reg);
+
+		reg = (result[final_candidate][7] >> 6) & 0xF;
+		PHY_SetBBReg(pAdapter, rOFDM0_AGCRSSITable, 0x0000F000, reg);
+	}
+	else
+	{
+		DBG_871X("phy_PathBFillIQKMatrix Tx/Rx FAIL\n");
+		PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x19008c00);			
+		PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance , bMaskDWord, 0x40000100);	
+		PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B , bMaskDWord, 0x19008c00); 		
+	}
+}
+
+static VOID
+phy_SaveADDARegisters(
+	IN	PADAPTER	pAdapter,
+	IN	u32*		ADDAReg,
+	IN	u32*		ADDABackup,
+	IN	u32			RegisterNum
+	)
+{
+	u32	i;
+
+	//if (ODM_CheckPowerStatus(pAdapter) == _FALSE)
+	//	return;
+
+	//RTPRINT(FINIT, INIT_IQK, ("Save ADDA parameters.\n"));
+	for( i = 0 ; i < RegisterNum ; i++){
+		ADDABackup[i] = PHY_QueryBBReg(pAdapter, ADDAReg[i], bMaskDWord);
+	}
+}
+
+static VOID
+phy_SaveMACRegisters(
+	IN	PADAPTER	pAdapter,
+	IN	u32*		MACReg,
+	IN	u32*		MACBackup
+	)
+{
+	u32	i;
+	
+	//RTPRINT(FINIT, INIT_IQK, ("Save MAC parameters.\n"));
+	for( i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){
+		MACBackup[i] = rtw_read8(pAdapter, MACReg[i]);		
+	}
+	MACBackup[i] = rtw_read32(pAdapter, MACReg[i]);		
+
+}
+
+static VOID
+phy_ReloadADDARegisters(
+	IN	PADAPTER	pAdapter,
+	IN	u32*		ADDAReg,
+	IN	u32*		ADDABackup,
+	IN	u32			RegiesterNum
+	)
+{
+	u32	i;
+
+	//RTPRINT(FINIT, INIT_IQK, ("Reload ADDA power saving parameters !\n"));
+	for(i = 0 ; i < RegiesterNum ; i++){
+		//path-A/B BB to initial gain		
+		if(ADDAReg[i] == rOFDM0_XAAGCCore1 || ADDAReg[i] == rOFDM0_XBAGCCore1)
+			PHY_SetBBReg(pAdapter, ADDAReg[i], bMaskDWord, 0x50);			
+		PHY_SetBBReg(pAdapter, ADDAReg[i], bMaskDWord, ADDABackup[i]);
+	}
+}
+
+static VOID
+phy_ReloadMACRegisters(
+	IN	PADAPTER	pAdapter,
+	IN	u32*		MACReg,
+	IN	u32*		MACBackup
+	)
+{
+	u32	i;
+
+	//RTPRINT(FINIT, INIT_IQK, ("Reload MAC parameters !\n"));
+	for(i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){
+		rtw_write8(pAdapter, MACReg[i], (u8)MACBackup[i]);
+	}
+	rtw_write32(pAdapter, MACReg[i], MACBackup[i]);	
+}
+
+static VOID
+phy_PathADDAOn(
+	IN	PADAPTER	pAdapter,
+	IN	u32*		ADDAReg,
+	IN	BOOLEAN		isPathAOn,
+	IN	BOOLEAN		is2T
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	u32	pathOn;
+	u32	i;
+
+	//RTPRINT(FINIT, INIT_IQK, ("ADDA ON.\n"));
+
+	pathOn = isPathAOn ? 0x04db25a4 : 0x0b1b25a4;
+	if(isPathAOn)
+		pathOn = pHalData->interfaceIndex == 0? 0x04db25a4 : 0x0b1b25a4;
+	for( i = 0 ; i < IQK_ADDA_REG_NUM ; i++){
+		PHY_SetBBReg(pAdapter, ADDAReg[i], bMaskDWord, pathOn);
+	}
+}
+
+static VOID
+phy_MACSettingCalibration(
+	IN	PADAPTER	pAdapter,
+	IN	u32*		MACReg,
+	IN	u32*		MACBackup	
+	)
+{
+	u32	i = 0;
+
+	//RTPRINT(FINIT, INIT_IQK, ("MAC settings for Calibration.\n"));
+
+	rtw_write8(pAdapter, MACReg[i], 0x3F);
+
+	for(i = 1 ; i < (IQK_MAC_REG_NUM - 1); i++){
+		rtw_write8(pAdapter, MACReg[i], (u8)(MACBackup[i]&(~BIT3)));
+	}
+	rtw_write8(pAdapter, MACReg[i], (u8)(MACBackup[i]&(~BIT5)));
+
+}
+
+static VOID
+phy_PathAStandBy(
+	IN	PADAPTER	pAdapter
+	)
+{
+	//RTPRINT(FINIT, INIT_IQK, ("Path-A standby mode!\n"));
+
+	PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x0);
+	PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x00010000);
+	PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80800000);
+}
+
+static VOID
+phy_PIModeSwitch(
+	IN	PADAPTER	pAdapter,
+	IN	BOOLEAN		PIMode
+	)
+{
+	u32	mode;
+
+	//RTPRINT(FINIT, INIT_IQK, ("BB Switch to %s mode!\n", (PIMode ? "PI" : "SI")));
+
+	mode = PIMode ? 0x01000100 : 0x01000000;
+	PHY_SetBBReg(pAdapter, 0x820, bMaskDWord, mode);
+	PHY_SetBBReg(pAdapter, 0x828, bMaskDWord, mode);
+}
+
+static BOOLEAN							
+phy_SimularityCompare_92D(
+	IN	PADAPTER	pAdapter,
+	IN	int 		result[][8],
+	IN	u8		 c1,
+	IN	u8		 c2
+	)
+{
+	u32	i, j, diff, SimularityBitMap, bound = 0, u4temp = 0;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);	
+	u8	final_candidate[2] = {0xFF, 0xFF};	//for path A and path B
+	BOOLEAN		bResult = _TRUE;
+	BOOLEAN		is2T = IS_92D_SINGLEPHY(pHalData->VersionID);
+	
+	if(is2T)
+		bound = 8;
+	else
+		bound = 4;
+
+	SimularityBitMap = 0;
+
+	//check Tx
+	for( i = 0; i < bound; i++ )
+	{
+		diff = (result[c1][i] > result[c2][i]) ? (result[c1][i] - result[c2][i]) : (result[c2][i] - result[c1][i]);
+		if (diff > MAX_TOLERANCE_92D)
+		{
+			if((i == 2 || i == 6) && !SimularityBitMap)
+			{
+				if(result[c1][i]+result[c1][i+1] == 0)
+					final_candidate[(i/4)] = c2;
+				else if (result[c2][i]+result[c2][i+1] == 0)
+					final_candidate[(i/4)] = c1;
+				else
+					SimularityBitMap = SimularityBitMap|(1<<i);
+			}
+			else
+				SimularityBitMap = SimularityBitMap|(1<<i);
+		}
+	}
+	
+	if ( SimularityBitMap == 0)
+	{
+		for( i = 0; i < (bound/4); i++ )
+		{
+			if(final_candidate[i] != 0xFF)
+			{
+				for( j = i*4; j < (i+1)*4-2; j++)
+					result[3][j] = result[final_candidate[i]][j];
+				bResult = _FALSE;
+			}
+		}
+
+		for( i = 0; i < bound; i++ )
+		{
+			u4temp += (result[c1][i]+ 	result[c2][i]);
+		}
+		if(u4temp == 0)	//IQK fail for c1 & c2
+			bResult = _FALSE;
+		
+		return bResult;
+	}
+
+	if (!(SimularityBitMap & 0x0F))			//path A OK
+	{
+		for(i = 0; i < 4; i++)
+			result[3][i] = result[c1][i];
+	}
+	else if (!(SimularityBitMap & 0x03)) 		//path A, Tx OK
+	{
+		for(i = 0; i < 2; i++)
+			result[3][i] = result[c1][i];
+	}
+
+	if (!(SimularityBitMap & 0xF0) && is2T)		//path B OK
+	{
+		for(i = 4; i < 8; i++)
+			result[3][i] = result[c1][i];
+	}
+	else if (!(SimularityBitMap & 0x30)) 		//path B, Tx OK
+	{
+		for(i = 4; i < 6; i++)
+			result[3][i] = result[c1][i];
+	}
+
+	return _FALSE;
+	
+}
+
+/*
+return _FALSE => do IQK again
+*/
+static BOOLEAN							
+phy_SimularityCompare(
+	IN	PADAPTER	pAdapter,
+	IN	int 		result[][8],
+	IN	u8		 c1,
+	IN	u8		 c2
+	)
+{
+	return phy_SimularityCompare_92D(pAdapter, result, c1, c2);
+}
+
+static VOID	
+phy_IQCalibrate(
+	IN	PADAPTER	pAdapter,
+	IN	int 		result[][8],
+	IN	u8		t,
+	IN	BOOLEAN		is2T
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u32			i;
+	u8			PathAOK, PathBOK;
+	u32			ADDA_REG[IQK_ADDA_REG_NUM] = {	
+						rFPGA0_XCD_SwitchControl, 	rBlue_Tooth, 	
+						rRx_Wait_CCA, 		rTx_CCK_RFON,
+						rTx_CCK_BBON, 	rTx_OFDM_RFON, 	
+						rTx_OFDM_BBON, 	rTx_To_Rx,
+						rTx_To_Tx, 		rRx_CCK, 	
+						rRx_OFDM, 		rRx_Wait_RIFS,
+						rRx_TO_Rx, 		rStandby, 	
+						rSleep, 			rPMPD_ANAEN };
+	u32			IQK_MAC_REG[IQK_MAC_REG_NUM] = {
+						REG_TXPAUSE, 		REG_BCN_CTRL,	
+						REG_BCN_CTRL_1,	REG_GPIO_MUXCFG};
+
+	//since 92C & 92D have the different define in IQK_BB_REG	
+	u32	IQK_BB_REG_92C[IQK_BB_REG_NUM_92C] = {
+							rOFDM0_TRxPathEnable, 		rOFDM0_TRMuxPar,	
+							rFPGA0_XCD_RFInterfaceSW,	rConfig_AntA,	rConfig_AntB,
+							rFPGA0_XAB_RFInterfaceSW,	rFPGA0_XA_RFInterfaceOE,	
+							rFPGA0_XB_RFInterfaceOE,	rFPGA0_RFMOD	
+							};	
+
+	u32	IQK_BB_REG_92D[IQK_BB_REG_NUM_92D] = {	//for normal
+							rFPGA0_XAB_RFInterfaceSW,	rFPGA0_XA_RFInterfaceOE,	
+							rFPGA0_XB_RFInterfaceOE,	rOFDM0_TRMuxPar,
+							rFPGA0_XCD_RFInterfaceSW,	rOFDM0_TRxPathEnable,	
+							rFPGA0_RFMOD,			rFPGA0_AnalogParameter4,
+							rOFDM0_XAAGCCore1,		rOFDM0_XBAGCCore1						
+						};
+
+#if MP_DRIVER
+	const u32	retryCount = 9;
+#else
+	const u32	retryCount = 2;
+#endif
+
+	// Note: IQ calibration must be performed after loading 
+	// 		PHY_REG.txt , and radio_a, radio_b.txt	
+	
+	u32 bbvalue;
+
+	if(t==0)
+	{
+	 	bbvalue = PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bMaskDWord);
+		//RTPRINT(FINIT, INIT_IQK, ("PHY_IQCalibrate()==>0x%08lx\n",bbvalue));
+		//RTPRINT(FINIT, INIT_IQK, ("IQ Calibration for %s\n", (is2T ? "2T2R" : "1T1R")));
+
+	 	// Save ADDA parameters, turn Path A ADDA on
+	 	phy_SaveADDARegisters(pAdapter, ADDA_REG, pdmpriv->ADDA_backup, IQK_ADDA_REG_NUM);
+		phy_SaveMACRegisters(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup);
+		if(IS_HARDWARE_TYPE_8192D(pAdapter))
+		 	phy_SaveADDARegisters(pAdapter, IQK_BB_REG_92D, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM_92D);
+		else
+			phy_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM_92C);
+	}
+
+ 	phy_PathADDAOn(pAdapter, ADDA_REG, _TRUE, is2T);
+
+	if(IS_HARDWARE_TYPE_8192D(pAdapter))
+		PHY_SetBBReg(pAdapter, rPdp_AntA, bMaskDWord, 0x01017038);
+
+	if(t==0)
+	{
+		pdmpriv->bRfPiEnable = (u8)PHY_QueryBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, BIT(8));
+	}
+
+	if(!pdmpriv->bRfPiEnable){
+		// Switch BB to PI mode to do IQ Calibration.
+		phy_PIModeSwitch(pAdapter, _TRUE);
+	}
+
+	PHY_SetBBReg1Byte(pAdapter, rFPGA0_RFMOD, BIT24, 0x00);
+	PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600);
+	PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4);
+	PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000);
+	if(IS_HARDWARE_TYPE_8192D(pAdapter))
+		PHY_SetBBReg(pAdapter, rFPGA0_AnalogParameter4, 0xf00000, 0x0f); 
+	else
+	{
+		PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0x01);
+		PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0x01);	
+		PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0x00);
+		PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0x00);	
+	}
+
+	if(is2T)
+	{
+		PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00010000);
+		PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00010000);
+	}
+
+	//MAC settings
+	phy_MACSettingCalibration(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup);
+
+	if(IS_HARDWARE_TYPE_8192D(pAdapter))
+	{
+		PHY_SetBBReg(pAdapter, rConfig_AntA, bMaskDWord, 0x0f600000);
+		
+		if(is2T)
+		{
+			PHY_SetBBReg(pAdapter, rConfig_AntB, bMaskDWord, 0x0f600000);
+		}
+	}
+	else
+	{
+		//Page B init
+		PHY_SetBBReg(pAdapter, rConfig_AntA, bMaskDWord, 0x00080000);
+		
+		if(is2T)
+		{
+			PHY_SetBBReg(pAdapter, rConfig_AntB, bMaskDWord, 0x00080000);
+		}
+	}
+
+	// IQ calibration setting
+	//RTPRINT(FINIT, INIT_IQK, ("IQK setting!\n"));		
+	PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80800000);
+	PHY_SetBBReg(pAdapter, rTx_IQK, bMaskDWord, 0x01007c00);
+	PHY_SetBBReg(pAdapter, rRx_IQK, bMaskDWord, 0x01004800);
+
+	for(i = 0 ; i < retryCount ; i++){
+		PathAOK = phy_PathA_IQK(pAdapter, is2T);
+		if(PathAOK == 0x03){
+			//RTPRINT(FINIT, INIT_IQK, ("Path A IQK Success!!\n"));
+			result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16;
+			result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16;
+			result[t][2] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16;
+			result[t][3] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16;
+			break;
+		}
+		else if (i == (retryCount-1) && PathAOK == 0x01)	//Tx IQK OK
+		{
+			//RTPRINT(FINIT, INIT_IQK, ("Path A IQK Only  Tx Success!!\n"));
+			
+			result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16;
+			result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16;
+		}
+	}
+
+	if(0x00 == PathAOK){		
+		DBG_871X("Path A IQK failed!!\n");
+	}
+
+	if(is2T){
+		phy_PathAStandBy(pAdapter);
+
+		// Turn Path B ADDA on
+		phy_PathADDAOn(pAdapter, ADDA_REG, _FALSE, is2T);
+
+		for(i = 0 ; i < retryCount ; i++){
+			PathBOK = phy_PathB_IQK(pAdapter);
+			if(PathBOK == 0x03){
+				//RTPRINT(FINIT, INIT_IQK, ("Path B IQK Success!!\n"));
+				result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16;
+				result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16;
+				result[t][6] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord)&0x3FF0000)>>16;
+				result[t][7] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord)&0x3FF0000)>>16;
+				break;
+			}
+			else if (i == (retryCount - 1) && PathBOK == 0x01)	//Tx IQK OK
+			{
+				//RTPRINT(FINIT, INIT_IQK, ("Path B Only Tx IQK Success!!\n"));
+				result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16;
+				result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16;
+			}
+		}
+
+		if(0x00 == PathBOK){		
+			DBG_871X("Path B IQK failed!!\n");
+		}
+	}
+
+	//Back to BB mode, load original value
+	//RTPRINT(FINIT, INIT_IQK, ("IQK:Back to BB mode, load original value!\n"));
+	PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0);
+
+	if(t!=0)
+	{
+		if(!pdmpriv->bRfPiEnable){
+			// Switch back BB to SI mode after finish IQ Calibration.
+			phy_PIModeSwitch(pAdapter, _FALSE);
+		}
+
+	 	// Reload ADDA power saving parameters
+	 	phy_ReloadADDARegisters(pAdapter, ADDA_REG, pdmpriv->ADDA_backup, IQK_ADDA_REG_NUM);
+
+		// Reload MAC parameters
+		phy_ReloadMACRegisters(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup);		
+
+	 	// Reload BB parameters
+	 	if(IS_HARDWARE_TYPE_8192D(pAdapter))
+	 	{
+			if(is2T)
+		 		phy_ReloadADDARegisters(pAdapter, IQK_BB_REG_92D, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM_92D);
+			else
+		 		phy_ReloadADDARegisters(pAdapter, IQK_BB_REG_92D, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM_92D -1);			
+	 	}
+		else
+		 	phy_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM_92C);
+
+		if(!IS_HARDWARE_TYPE_8192D(pAdapter))
+		{
+			// Restore RX initial gain
+			PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00032ed3);
+			if(is2T){
+				PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00032ed3);
+			}
+		}
+
+		//load 0xe30 IQC default value
+		PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00);
+		PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00);
+
+	}
+	//RTPRINT(FINIT, INIT_IQK, ("_PHY_IQCalibrate() <==\n"));
+
+}
+
+
+static VOID	
+phy_IQCalibrate_5G(
+	IN	PADAPTER	pAdapter,
+	IN	int 		result[][8]
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u32			extPAon, REG0xe5c, RX0REG0xe40, REG0xe40, REG0xe94, REG0xe9c;
+	u32			REG0xeac, RX1REG0xe40, REG0xeb4, REG0xea4,REG0xec4;
+	u8			TX0IQKOK = _FALSE, TX1IQKOK = _FALSE ;
+	u32			TX_X0, TX_Y0, TX_X1, TX_Y1, RX_X0, RX_Y0, RX_X1, RX_Y1;
+	u32			ADDA_REG[IQK_ADDA_REG_NUM] = {	
+						rFPGA0_XCD_SwitchControl, 	rBlue_Tooth, 	
+						rRx_Wait_CCA, 		rTx_CCK_RFON,
+						rTx_CCK_BBON, 	rTx_OFDM_RFON, 	
+						rTx_OFDM_BBON, 	rTx_To_Rx,
+						rTx_To_Tx, 		rRx_CCK, 	
+						rRx_OFDM, 		rRx_Wait_RIFS,
+						rRx_TO_Rx, 		rStandby, 	
+						rSleep, 			rPMPD_ANAEN };
+
+	u32			IQK_MAC_REG[IQK_MAC_REG_NUM] = {
+						REG_TXPAUSE, 		REG_BCN_CTRL,	
+						REG_BCN_CTRL_1,	REG_GPIO_MUXCFG};			
+
+	u32			IQK_BB_REG[IQK_BB_REG_NUM_test] = {	//for normal
+						rFPGA0_XAB_RFInterfaceSW,	rOFDM0_TRMuxPar,	
+						rFPGA0_XCD_RFInterfaceSW,	rOFDM0_TRxPathEnable,
+						rFPGA0_RFMOD,			rFPGA0_AnalogParameter4					
+					};
+
+	BOOLEAN       		is2T =  IS_92D_SINGLEPHY(pHalData->VersionID);
+
+	DBG_8192C("IQK for 5G:Start!!!interface %d\n", pHalData->interfaceIndex);
+
+	DBG_8192C("IQ Calibration for %s\n", (is2T ? "2T2R" : "1T1R"));
+
+	//Save MAC default value
+	phy_SaveMACRegisters(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup);
+
+ 	//Save BB Parameter
+	phy_SaveADDARegisters(pAdapter, IQK_BB_REG, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM_test);		
+
+	//Save AFE Parameters
+	phy_SaveADDARegisters(pAdapter, ADDA_REG, pdmpriv->ADDA_backup, IQK_ADDA_REG_NUM);
+
+	//1 Path-A TX IQK
+	//Path-A AFE all on
+ 	phy_PathADDAOn(pAdapter, ADDA_REG, _TRUE, _TRUE);
+
+	//MAC register setting
+	phy_MACSettingCalibration(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup);
+
+	//IQK must be done in PI mode	
+	pdmpriv->bRfPiEnable = (u8)PHY_QueryBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, BIT(8));
+	if(!pdmpriv->bRfPiEnable)
+		phy_PIModeSwitch(pAdapter, _TRUE);
+
+	//TXIQK RF setting
+	PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x01940000);
+	PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x01940000);
+
+	//BB setting
+	PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600);
+	PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4);
+	PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22208000);
+	PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT6|BIT5,  0x03);
+	PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT22|BIT21,  0x03);
+	PHY_SetBBReg(pAdapter, rFPGA0_AnalogParameter4, 0xf00000,  0x0f);
+
+	//AP or IQK
+	PHY_SetBBReg(pAdapter, rConfig_AntA, bMaskDWord, 0x0f600000);
+	PHY_SetBBReg(pAdapter, rConfig_AntB, bMaskDWord, 0x0f600000);
+
+	//IQK global setting
+	PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80800000);
+	PHY_SetBBReg(pAdapter, rTx_IQK, bMaskDWord, 0x10007c00);
+	PHY_SetBBReg(pAdapter, rRx_IQK, bMaskDWord, 0x01004800);
+
+	//path-A IQK setting
+	if(pHalData->interfaceIndex == 0)
+	{
+		PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x14008c1f);
+		PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x30008c1f);
+	}
+	else
+	{
+		PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x14008c22);
+		PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x30008c22);	
+	}
+
+	if(is2T)
+		PHY_SetBBReg(pAdapter, rTx_IQK_PI_A, bMaskDWord, 0x821402e2);
+	else
+		PHY_SetBBReg(pAdapter, rTx_IQK_PI_A, bMaskDWord, 0x821402e6);	
+	PHY_SetBBReg(pAdapter, rRx_IQK_PI_A, bMaskDWord, 0x68110000);
+
+	//path-B IQK setting
+	if(is2T)
+	{
+		PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x14008c22);
+		PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x30008c22);
+		PHY_SetBBReg(pAdapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
+		PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, 0x68110000);
+	}
+
+	//LO calibration setting
+	PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x00462911);
+
+	//RTPRINT(FINIT, INIT_IQK, ("0x522 %x\n", rtw_read8(pAdapter, 0x522)));
+
+	//One shot, path A LOK & IQK
+	PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
+	PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
+
+	//Delay 1 ms
+	rtw_udelay_os(IQK_DELAY_TIME*1000);
+
+	//Exit IQK mode
+	PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000);
+
+	//Check_TX_IQK_A_result()
+	REG0xe40 = PHY_QueryBBReg(pAdapter, rTx_IQK, bMaskDWord);
+	REG0xeac = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord);
+	REG0xe94 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord);
+
+	if(((REG0xeac&BIT(28)) == 0) && (((REG0xe94&0x3FF0000)>>16)!=0x142))
+	{		
+		REG0xe9c = PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord);
+		TX_X0 = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16;
+		TX_Y0 = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16;
+		RX0REG0xe40 =  0x80000000 | (REG0xe40 & 0xfc00fc00) | (TX_X0<<16) | TX_Y0;
+		result[0][0] = TX_X0;
+		result[0][1] = TX_Y0;
+		TX0IQKOK = _TRUE;
+		DBG_8192C("IQK for 5G: Path A TxOK interface %u\n", pHalData->interfaceIndex);
+	}
+	else
+	{
+		DBG_8192C("IQK for 5G: Path A Tx Fail interface %u\n", pHalData->interfaceIndex);
+	}
+
+	//1 path A RX IQK
+	if(TX0IQKOK == _TRUE)
+	{
+
+		DBG_8192C("IQK for 5G: Path A Rx  START interface %u\n", pHalData->interfaceIndex);
+
+		//TXIQK RF setting
+		PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x01900000);
+		PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x01900000);
+
+		//turn on external PA
+		if(pHalData->interfaceIndex == 1)
+			PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT(30), 0x01);
+
+		//IQK global setting
+		PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80800000);
+
+		//path-A IQK setting
+		if(pHalData->interfaceIndex == 0)
+		{
+			PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x14008c1f);
+			PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x14008c1f);
+		}
+		else
+		{
+			PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x14008c22);
+			PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x14008c22);	
+		}
+		PHY_SetBBReg(pAdapter, rTx_IQK_PI_A, bMaskDWord, 0x82110000);
+		if(pHalData->interfaceIndex == 0)
+			PHY_SetBBReg(pAdapter, rRx_IQK_PI_A, bMaskDWord, (pHalData->CurrentChannel<=140)?0x68160c62:0x68160c66);
+		else
+			PHY_SetBBReg(pAdapter, rRx_IQK_PI_A, bMaskDWord, 0x68160962);
+
+		//path-B IQK setting
+		if(is2T)
+		{
+			PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x14008c22);
+			PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x14008c22);
+			PHY_SetBBReg(pAdapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
+			PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, 0x68110000);
+		}
+
+		//load TX0 IMR setting
+		PHY_SetBBReg(pAdapter, rTx_IQK, bMaskDWord, RX0REG0xe40);
+		//Sleep(5) -> delay 1ms
+		rtw_udelay_os(IQK_DELAY_TIME*1000);
+
+		//LO calibration setting
+		PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911);
+
+		//One shot, path A LOK & IQK
+		PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
+		PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
+
+		//Delay 3 ms
+		rtw_udelay_os(3*IQK_DELAY_TIME*1000);
+
+		//Exit IQK mode
+		PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000);
+
+		//Check_RX_IQK_A_result()
+		REG0xeac = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord);
+		REG0xea4 = PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord);
+		if(pHalData->interfaceIndex == 0)
+		{
+			if(((REG0xeac&BIT(27)) == 0) && (((REG0xea4&0x3FF0000)>>16)!=0x132))
+			{
+				RX_X0 =  (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16;
+				RX_Y0 =  (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16;
+				result[0][2] = RX_X0;
+				result[0][3] = RX_Y0;
+			}
+		}
+		else
+		{
+			if(((REG0xeac&BIT(30)) == 0) && (((REG0xea4&0x3FF0000)>>16)!=0x132))
+			{
+				RX_X0 =  (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16;
+				RX_Y0 =  (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16;
+				result[0][2] = RX_X0;
+				result[0][3] = RX_Y0;
+			}		
+		}
+	}
+
+	if(!is2T)
+		goto Exit_IQK;
+
+	//1 path B TX IQK
+	//Path-B AFE all on
+
+	DBG_8192C("IQK for 5G: Path B Tx  START interface %u\n", pHalData->interfaceIndex);
+	
+ 	phy_PathADDAOn(pAdapter, ADDA_REG, _FALSE, _TRUE);
+
+	//TXIQK RF setting
+	PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x01940000);
+	PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x01940000);
+
+	//IQK global setting
+	PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80800000);
+	PHY_SetBBReg(pAdapter, rTx_IQK, bMaskDWord, 0x10007c00);	
+	
+	//path-A IQK setting
+	PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x14008c1f);
+	PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x30008c1f);
+	PHY_SetBBReg(pAdapter, rTx_IQK_PI_A, bMaskDWord, 0x82110000);
+	PHY_SetBBReg(pAdapter, rRx_IQK_PI_A, bMaskDWord, 0x68110000);
+	
+	//path-B IQK setting
+	PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x14008c22);
+	PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x30008c22);
+	PHY_SetBBReg(pAdapter, rTx_IQK_PI_B, bMaskDWord, 0x82140386);
+	PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, 0x68110000);
+	
+	//LO calibration setting
+	PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x00462911);
+	
+	//One shot, path A LOK & IQK
+	PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000002);
+	PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000000);
+
+	//Delay 1 ms
+	rtw_udelay_os(IQK_DELAY_TIME*1000);
+
+	//Exit IQK mode
+	PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000);
+
+	// Check_TX_IQK_B_result()
+	REG0xe40 = PHY_QueryBBReg(pAdapter, rTx_IQK, bMaskDWord);
+	REG0xeac = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord);
+	REG0xeb4 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord);
+	if(((REG0xeac&BIT(31)) == 0) && ((REG0xeb4&0x3FF0000)!=0x142))
+	{
+		TX_X1 = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16;
+		TX_Y1 = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16;
+		RX1REG0xe40 = 0x80000000 | (REG0xe40 & 0xfc00fc00) | (TX_X1<<16) | TX_Y1;
+		result[0][4] = TX_X1;
+		result[0][5] = TX_Y1;
+		TX1IQKOK = _TRUE;
+	}
+
+	//1 path B RX IQK
+	if(TX1IQKOK == _TRUE)
+	{
+
+		DBG_8192C("IQK for 5G: Path B Rx  START interface %u\n", pHalData->interfaceIndex);
+
+		if(pHalData->CurrentChannel<=140)
+		{
+			REG0xe5c = 0x68160960;
+			extPAon = 0x1;
+		}	
+		else
+		{
+			REG0xe5c = 0x68150c66;
+	   		extPAon = 0x0;
+		}
+
+		//TXIQK RF setting
+		PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x01900000);
+		PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x01900000);
+
+		//turn on external PA
+		PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT(30), extPAon);
+
+		//BB setting
+		PHY_SetBBReg(pAdapter, rFPGA0_AnalogParameter4, bMaskDWord, 0xcc300080);
+
+		//IQK global setting
+		PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80800000);
+		
+		//path-A IQK setting
+		PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x14008c1f);
+		PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x34008c1f);
+		PHY_SetBBReg(pAdapter, rTx_IQK_PI_A, bMaskDWord, 0x82110000);
+		PHY_SetBBReg(pAdapter, rRx_IQK_PI_A, bMaskDWord, 0x68110000 );
+		
+		//path-B IQK setting
+		PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x14008c22);
+		PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x14008c22);
+		PHY_SetBBReg(pAdapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
+		PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, REG0xe5c);
+		
+		//load TX0 IMR setting
+		PHY_SetBBReg(pAdapter, rTx_IQK, bMaskDWord, RX1REG0xe40);
+
+		//Sleep(5) -> delay 1ms
+		rtw_udelay_os(IQK_DELAY_TIME*1000);
+
+		//LO calibration setting
+		PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911);
+
+		//One shot, path A LOK & IQK
+		PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000002);
+		PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000000);
+
+		//Delay 1 ms
+		rtw_udelay_os(3*IQK_DELAY_TIME*1000);
+
+		//Check_RX_IQK_B_result()
+		REG0xeac = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord);
+		REG0xec4 = PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord);
+		if(((REG0xeac&BIT(30)) == 0) && (((REG0xec4&0x3FF0000)>>16)!=0x132))
+		{
+			RX_X1 =  (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord)&0x3FF0000)>>16;
+			RX_Y1 =  (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord)&0x3FF0000)>>16;
+			result[0][6] = RX_X1;
+			result[0][7] = RX_Y1;
+		}
+	}
+
+Exit_IQK:
+	//turn off external PA
+	if(pHalData->interfaceIndex == 1 || is2T)
+		PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT(30), 0);
+
+	//Exit IQK mode
+	PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000);
+	phy_ReloadADDARegisters(pAdapter, IQK_BB_REG, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM_test);
+	
+	PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x01900000);
+	PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x01900000);
+	PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00032fff);
+	PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00032fff);
+
+
+	//reload MAC default value	
+	phy_ReloadMACRegisters(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup);
+	
+	if(!pdmpriv->bRfPiEnable)
+		phy_PIModeSwitch(pAdapter, _FALSE);
+	//Reload ADDA power saving parameters
+	phy_ReloadADDARegisters(pAdapter, ADDA_REG, pdmpriv->ADDA_backup, IQK_ADDA_REG_NUM);
+	
+}
+
+static VOID	
+phy_IQCalibrate_5G_Normal(
+	IN	PADAPTER	pAdapter,
+	IN	int 		result[][8],
+	IN	u8		t
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u32			PathAOK, PathBOK;
+	u32			ADDA_REG[IQK_ADDA_REG_NUM] = {	
+						rFPGA0_XCD_SwitchControl, 	rBlue_Tooth, 	
+						rRx_Wait_CCA, 		rTx_CCK_RFON,
+						rTx_CCK_BBON, 	rTx_OFDM_RFON, 	
+						rTx_OFDM_BBON, 	rTx_To_Rx,
+						rTx_To_Tx, 		rRx_CCK, 	
+						rRx_OFDM, 		rRx_Wait_RIFS,
+						rRx_TO_Rx, 		rStandby, 	
+						rSleep, 			rPMPD_ANAEN };
+	u32			IQK_MAC_REG[IQK_MAC_REG_NUM] = {
+						REG_TXPAUSE, 		REG_BCN_CTRL,	
+						REG_BCN_CTRL_1,	REG_GPIO_MUXCFG};
+
+	u32			IQK_BB_REG[IQK_BB_REG_NUM] = {	//for normal
+						rFPGA0_XAB_RFInterfaceSW,	rFPGA0_XA_RFInterfaceOE,	
+						rFPGA0_XB_RFInterfaceOE,	rOFDM0_TRMuxPar,
+						rFPGA0_XCD_RFInterfaceSW,	rOFDM0_TRxPathEnable,	
+						rFPGA0_RFMOD,			rFPGA0_AnalogParameter4,
+						rOFDM0_XAAGCCore1,		rOFDM0_XBAGCCore1
+					};
+
+	// Note: IQ calibration must be performed after loading 
+	// 		PHY_REG.txt , and radio_a, radio_b.txt	
+
+	u32	bbvalue;
+	BOOLEAN		is2T =  IS_92D_SINGLEPHY(pHalData->VersionID);
+
+	//RTPRINT(FINIT, INIT_IQK, ("IQK for 5G NORMAL:Start!!! interface %d\n", pAdapter->interfaceIndex));
+
+	//rtw_udelay_os(IQK_DELAY_TIME*1000*100);	//delay after set IMR
+	
+	//rtw_udelay_os(IQK_DELAY_TIME*1000*20);
+	rtw_mdelay_os(IQK_DELAY_TIME*20);
+
+	if(t==0)
+	{
+		bbvalue = PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bMaskDWord);
+		//RTPRINT(FINIT, INIT_IQK, ("PHY_IQCalibrate()==>0x%08lx\n",bbvalue));
+		//RTPRINT(FINIT, INIT_IQK, ("IQ Calibration for %s\n", (is2T ? "2T2R" : "1T1R")));
+
+	 	// Save ADDA parameters, turn Path A ADDA on
+		phy_SaveADDARegisters(pAdapter, ADDA_REG, pdmpriv->ADDA_backup, IQK_ADDA_REG_NUM);
+		phy_SaveMACRegisters(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup);
+		if(is2T)
+			phy_SaveADDARegisters(pAdapter, IQK_BB_REG, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM_92D);		
+		else
+			phy_SaveADDARegisters(pAdapter, IQK_BB_REG, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM_92D-1);
+	}
+
+	//Path-A AFE all on
+ 	phy_PathADDAOn(pAdapter, ADDA_REG, _TRUE, is2T);
+
+	//MAC settings
+	phy_MACSettingCalibration(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup);
+		
+	if(t==0)
+	{
+		pdmpriv->bRfPiEnable = (u8)PHY_QueryBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, BIT(8));
+	}
+	
+	if(!pdmpriv->bRfPiEnable){
+		// Switch BB to PI mode to do IQ Calibration.
+		phy_PIModeSwitch(pAdapter, _TRUE);
+	}
+
+	PHY_SetBBReg1Byte(pAdapter, rFPGA0_RFMOD, BIT24, 0x00);
+	PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600);
+	PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4);
+	PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22208000);
+	PHY_SetBBReg(pAdapter, rFPGA0_AnalogParameter4, 0xf00000, 0x0f);
+
+#if 0
+	//Page B init
+	PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x0f600000);
+	
+	if(is2T)
+	{
+		PHY_SetBBReg(pAdapter, 0xb6c, bMaskDWord, 0x0f600000);
+	}
+#else	
+
+	//Page A AP setting for IQK
+	PHY_SetBBReg(pAdapter, rPdp_AntA, bMaskDWord, 0x00000000);
+	PHY_SetBBReg(pAdapter, rConfig_AntA, bMaskDWord, 0x20000000);
+
+	//Page B AP setting for IQK	
+	if(is2T)
+	{
+		PHY_SetBBReg(pAdapter, rPdp_AntB, bMaskDWord, 0x00000000);
+		PHY_SetBBReg(pAdapter, rConfig_AntB, bMaskDWord, 0x20000000);
+	}
+#endif
+	// IQ calibration setting
+	//RTPRINT(FINIT, INIT_IQK, ("IQK setting!\n"));		
+	PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80800000);
+	PHY_SetBBReg(pAdapter, rTx_IQK, bMaskDWord, 0x10007c00);
+	PHY_SetBBReg(pAdapter, rRx_IQK, bMaskDWord, 0x01004800);
+
+	{
+		PathAOK = phy_PathA_IQK_5G_Normal(pAdapter, is2T);
+		if(PathAOK == 0x03){
+			DBG_8192C("Path A IQK Success!!\n");
+			result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16;
+			result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16;
+			result[t][2] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16;
+			result[t][3] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16;
+		}
+		else if (PathAOK == 0x01)	//Tx IQK OK
+		{
+			DBG_8192C("Path A IQK Only  Tx Success!!\n");
+			
+			result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16;
+			result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16;
+		}
+		else
+		{
+			PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0);
+			DBG_871X("0xe70 = 0x%x\n", PHY_QueryBBReg(pAdapter, rRx_Wait_CCA, bMaskDWord));
+			DBG_871X("RF path A 0x0 = 0x%x\n", PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_AC, bRFRegOffsetMask));
+			PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80800000);					
+			DBG_871X("Path A IQK Fail!!\n");
+		}
+	}
+
+	if(is2T){
+		//_PHY_PathAStandBy(pAdapter);
+
+		// Turn Path B ADDA on
+		phy_PathADDAOn(pAdapter, ADDA_REG, _FALSE, is2T);
+
+		{
+			PathBOK = phy_PathB_IQK_5G_Normal(pAdapter);
+			if(PathBOK == 0x03){
+				DBG_8192C("Path B IQK Success!!\n");
+				result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16;
+				result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16;
+				result[t][6] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord)&0x3FF0000)>>16;
+				result[t][7] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord)&0x3FF0000)>>16;
+			}
+			else if (PathBOK == 0x01)	//Tx IQK OK
+			{
+				DBG_8192C("Path B Only Tx IQK Success!!\n");
+				result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16;
+				result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16;
+			}
+			else{		
+				DBG_8192C("Path B IQK failed!!\n");
+			}			
+		}
+	}
+	
+	//Back to BB mode, load original value
+	//RTPRINT(FINIT, INIT_IQK, ("IQK:Back to BB mode, load original value!\n"));
+	PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0);
+
+	if(t!=0)
+	{
+		if(is2T)			
+			phy_ReloadADDARegisters(pAdapter, IQK_BB_REG, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM_92D);
+		else
+			phy_ReloadADDARegisters(pAdapter, IQK_BB_REG, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM_92D-1);
+
+#if 1
+		//path A IQ path to DP block
+		PHY_SetBBReg(pAdapter, rPdp_AntA, bMaskDWord, 0x010170b8);
+
+		//path B IQ path to DP block
+		if(is2T)
+			PHY_SetBBReg(pAdapter, rPdp_AntB, bMaskDWord, 0x010170b8);
+#endif
+
+		// Reload MAC parameters
+		phy_ReloadMACRegisters(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup);		
+		
+		if(!pdmpriv->bRfPiEnable){
+			// Switch back BB to SI mode after finish IQ Calibration.
+			phy_PIModeSwitch(pAdapter, _FALSE);
+		}
+
+	 	// Reload ADDA power saving parameters
+	 	phy_ReloadADDARegisters(pAdapter, ADDA_REG, pdmpriv->ADDA_backup, IQK_ADDA_REG_NUM);
+
+		//load 0xe30 IQC default value
+		//PHY_SetBBReg(pAdapter, 0xe30, bMaskDWord, 0x01008c00);
+		//PHY_SetBBReg(pAdapter, 0xe34, bMaskDWord, 0x01008c00);
+
+	}
+	//RTPRINT(FINIT, INIT_IQK, ("_PHY_IQCalibrate_5G_Normal() <==\n"));
+	
+}
+
+#if SWLCK != 1
+static VOID	
+phy_LCCalibrate92D(
+	IN	PADAPTER	pAdapter,
+	IN	BOOLEAN		is2T
+	)
+{
+	u8	tmpReg, index = 0;
+	u32 	RF_mode[2], tmpu4Byte[2];
+	u8	path = is2T?2:1;
+#if SWLCK == 1
+	u16	timeout = 800, timecount = 0;
+#endif
+
+	//Check continuous TX and Packet TX
+	tmpReg = rtw_read8(pAdapter, 0xd03);
+
+	if((tmpReg&0x70) != 0)			//Deal with contisuous TX case
+		rtw_write8(pAdapter, 0xd03, tmpReg&0x8F);	//disable all continuous TX
+	else 							// Deal with Packet TX case
+		rtw_write8(pAdapter, REG_TXPAUSE, 0xFF);			// block all queues
+
+	PHY_SetBBReg(pAdapter, rFPGA0_AnalogParameter4, 0xF00000, 0x0F);
+
+	for(index = 0; index <path; index ++)
+	{
+		//1. Read original RF mode
+		RF_mode[index] = PHY_QueryRFReg(pAdapter, (RF_RADIO_PATH_E)index, RF_AC, bRFRegOffsetMask);
+		
+		//2. Set RF mode = standby mode
+		PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)index, RF_AC, 0x70000, 0x01);
+
+		tmpu4Byte[index] = PHY_QueryRFReg(pAdapter, (RF_RADIO_PATH_E)index, RF_SYN_G4, bRFRegOffsetMask);
+		PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)index, RF_SYN_G4, 0x700, 0x07);
+
+		//4. Set LC calibration begin
+		PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)index, RF_CHNLBW, 0x08000, 0x01);
+		
+	}
+		
+#if SWLCK == 1
+	for(index = 0; index <path; index ++)
+	{
+		while(!(PHY_QueryRFReg(pAdapter, (RF_RADIO_PATH_E)index, RF_SYN_G6, BIT11)) &&
+			timecount <= timeout)
+		{
+			
+			//RTPRINT(FINIT, INIT_IQK,("PHY_LCK delay for %d ms=2\n", timecount));
+			#ifdef CONFIG_LONG_DELAY_ISSUE
+			rtw_msleep_os(50);
+			#else
+			rtw_mdelay_os(50);		
+			#endif
+			timecount += 50;
+		}
+	}
+#else
+	#ifdef CONFIG_LONG_DELAY_ISSUE
+	rtw_msleep_os(100);
+	#else
+	rtw_mdelay_os(100);		
+	#endif
+#endif
+
+	//Restore original situation	
+	for(index = 0; index <path; index ++)
+	{
+		PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)index, RF_SYN_G4, bRFRegOffsetMask, tmpu4Byte[index]);
+		PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)index, RF_AC, bRFRegOffsetMask, RF_mode[index]);
+	}
+
+	if((tmpReg&0x70) != 0)	
+	{  
+		//Path-A
+		rtw_write8(pAdapter, 0xd03, tmpReg);
+	}
+	else // Deal with Packet TX case
+	{
+		rtw_write8(pAdapter, REG_TXPAUSE, 0x00);	
+	}
+
+	PHY_SetBBReg(pAdapter, rFPGA0_AnalogParameter4, 0xF00000, 0x00);
+	
+}
+#endif  //SWLCK != 1, amy, temp remove
+static u32
+get_abs(
+	IN	u32	val1,
+	IN	u32	val2
+	)
+{
+	u32 ret=0;
+	
+	if(val1 >= val2)
+	{
+		ret = val1 - val2;
+	}
+	else
+	{
+		ret = val2 - val1;
+	}
+	return ret;
+}
+
+#define	TESTFLAG			0
+#define	BASE_CHNL_NUM		6
+#define	BASE_CHNL_NUM_2G	2
+
+static VOID
+phy_CalcCurvIndex(
+	IN	PADAPTER	pAdapter,
+	IN	u32*		TargetChnl,
+	IN	u32*		CurveCountVal,	
+	IN	BOOLEAN		is5G,				
+	OUT	u32*		CurveIndex
+	)
+{
+	u32	smallestABSVal = 0xffffffff, u4tmp;
+	u8	i, channel, pre_channel, start = is5G?TARGET_CHNL_NUM_2G:0, 
+		start_base = is5G?BASE_CHNL_NUM_2G:0, 
+		end_base = is5G?BASE_CHNL_NUM:BASE_CHNL_NUM_2G;
+	u8	chnl_num = is5G?TARGET_CHNL_NUM_2G_5G:TARGET_CHNL_NUM_2G;
+	u8 	Base_chnl[BASE_CHNL_NUM] = {1, 14, 36, 100, 149};
+	u32	j, base_index = 0, search_bound;
+	BOOLEAN	bBase = _FALSE;
+	
+	for(i=start; i<chnl_num; i++)
+	{
+		if(is5G)
+		{
+			if(i != start)
+				pre_channel = channel;
+			channel = GetChnlFromPlace(i);	//actual channel number
+
+			if(i == start)
+				pre_channel = channel;
+		}
+		else
+		{
+			if(i != start)		
+				pre_channel = channel;		
+			channel = i+1;
+
+			if(i == start)
+				pre_channel = channel;			
+		}
+
+#if 1
+		bBase = _FALSE;
+
+		for(j = start_base; j < end_base; j++)
+		{
+			if(channel == Base_chnl[j])
+			{
+				bBase = _TRUE;
+				base_index = 0;
+				search_bound = (CV_CURVE_CNT*2);	//search every 128
+				break;
+			}
+			else if(channel < Base_chnl[j] || j == end_base-1)
+			{
+#if 1
+				base_index = CurveIndex[GetRightChnlPlace(pre_channel)-1];
+#else
+				if(j > start_base && channel < Base_chnl[j])
+					base_index = CurveIndex[GetRightChnlPlace(Base_chnl[j-1])-1];
+				else
+					base_index = CurveIndex[GetRightChnlPlace(Base_chnl[j])-1];
+#endif
+
+				if(base_index > 5)
+					base_index -= 5;	//search -5~5, not every 128
+				else
+					base_index = 0;
+				search_bound = base_index+10;
+				break;
+			}
+		}
+#endif
+
+		CurveIndex[i] = 0;
+#if 1
+		for(j=base_index; j<base_index+search_bound; j++)
+		{
+			u4tmp = get_abs(TargetChnl[channel-1], CurveCountVal[j]);
+
+			if(u4tmp < smallestABSVal)
+			{
+				CurveIndex[i] = j;
+				smallestABSVal = u4tmp;
+			}
+		}
+#endif
+
+		smallestABSVal = 0xffffffff;
+		//if(i == 0)
+		//	RTPRINT(FINIT, INIT_IQK,("cosa, CurveIndex[%d] = %d channel %d\n", i, CurveIndex[i], index));
+		//RTPRINT(FINIT, INIT_IQK,("CurveIndex[%d] = 0x%x channel %d base_index 0x%x\n", i, CurveIndex[i], channel, base_index));
+	}
+}
+
+static VOID	
+phy_LCCalibrate92DSW(
+	IN	PADAPTER	pAdapter,
+	IN	BOOLEAN		is2T
+	)
+{
+	u8	RF_mode[2], tmpReg, index = 0;
+#if (TESTFLAG == 0)
+	u32	tmpu4Byte[2];
+#endif //(TESTFLAG == 0)
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	u8	u1bTmp=0,path = is2T?2:1;
+	u32	i, u4tmp, offset;
+	u32	curveCountVal[CV_CURVE_CNT*2]={0};
+	u16	timeout = 800, timecount = 0;
+
+	//Check continuous TX and Packet TX
+	tmpReg = rtw_read8(pAdapter, 0xd03);
+
+	if((tmpReg&0x70) != 0)			//Deal with contisuous TX case
+		rtw_write8(pAdapter, 0xd03, tmpReg&0x8F);	//disable all continuous TX
+	else 							// Deal with Packet TX case
+		rtw_write8(pAdapter, REG_TXPAUSE, 0xFF);			// block all queues
+
+	PHY_SetBBReg(pAdapter, rFPGA0_AnalogParameter4, 0xF00000, 0x0F);
+
+	for(index = 0; index <path; index ++)
+	{
+		//RTPRINT(FINIT, INIT_IQK,("PHY_LCK enter for loop for index %d \n", index));
+	
+		//1. Read original RF mode
+		offset = index == 0?rOFDM0_XAAGCCore1:rOFDM0_XBAGCCore1;
+		RF_mode[index] = rtw_read8(pAdapter, offset);
+		//RTPRINT(FINIT, INIT_IQK,("PHY_LCK offset 0x%x tmpreg = 0x%x\n", offset, RF_mode[index]));
+		
+		//2. Set RF mode = standby mode
+		PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)index, RF_AC, bRFRegOffsetMask, 0x010000);
+#if (TESTFLAG == 0)
+		tmpu4Byte[index] = PHY_QueryRFReg(pAdapter, (RF_RADIO_PATH_E)index, RF_SYN_G4, bRFRegOffsetMask);
+		PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)index, RF_SYN_G4, 0x700, 0x07);
+#endif
+
+		if(pAdapter->hw_init_completed)
+		{
+			// switch CV-curve control by LC-calibration
+			PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)index, RF_SYN_G7, BIT17, 0x0);
+
+			//4. Set LC calibration begin
+			PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)index, RF_CHNLBW, 0x08000, 0x01);
+
+			//RTPRINT(FINIT, INIT_IQK,("PHY_LCK finish HWLCK \n"));
+		}
+	}
+
+	for(index = 0; index <path; index ++)
+	{
+		u4tmp = PHY_QueryRFReg(pAdapter, (RF_RADIO_PATH_E)index, RF_SYN_G6, bRFRegOffsetMask);
+
+		while((!(u4tmp & BIT11)) &&
+			timecount <= timeout)
+		{
+				#ifdef CONFIG_LONG_DELAY_ISSUE
+				rtw_msleep_os(50);
+				#else
+				rtw_mdelay_os(50);
+				#endif
+			timecount += 50;
+			u4tmp = PHY_QueryRFReg(pAdapter, (RF_RADIO_PATH_E)index, RF_SYN_G6, bRFRegOffsetMask);
+		}	
+		//RTPRINT(FINIT, INIT_IQK,("PHY_LCK finish delay for %d ms=2\n", timecount));
+	}
+	//Disable TX only need during phy lck, To reduce LCK affect on chariot, 
+	// move enable tx here after PHY LCK finish, it will not affect sw lck result.  
+	// zhiyuan 2011/06/03
+	if((tmpReg&0x70) != 0)	
+	{  
+		//Path-A
+		rtw_write8(pAdapter, 0xd03, tmpReg);
+	}
+	else // Deal with Packet TX case
+	{
+		rtw_write8(pAdapter, REG_TXPAUSE, 0x00);	
+	}
+	PHY_SetBBReg(pAdapter, rFPGA0_AnalogParameter4, 0xF00000, 0x00);
+
+	for(index = 0; index <path; index ++)
+	{
+		u4tmp = PHY_QueryRFReg(pAdapter, (RF_RADIO_PATH_E)index, RF_SYN_G4, bRFRegOffsetMask);
+
+		{
+
+			//if(index == 0 && pHalData->interfaceIndex == 0)
+			//{
+			//	RTPRINT(FINIT, INIT_IQK,("cosa, path-A / 5G LCK\n"));
+			//}
+			//else
+			//{
+			//	RTPRINT(FINIT, INIT_IQK,("cosa, path-B / 2.4G LCK\n"));				
+			//}
+			_rtw_memset(&curveCountVal[0], 0, CV_CURVE_CNT*2);
+
+			//Set LC calibration off
+			PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)index, RF_CHNLBW, 0x08000, 0x0);
+			//RTPRINT(FINIT, INIT_IQK,("cosa, set RF 0x18[15] = 0\n"));
+
+			//save Curve-counting number
+			for(i=0; i<CV_CURVE_CNT; i++)
+			{
+				u32	readVal=0, readVal2=0;
+				PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)index, RF_TRSW, 0x7f, i);
+
+				PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)index, 0x4D, bRFRegOffsetMask, 0x0);
+				readVal = PHY_QueryRFReg(pAdapter, (RF_RADIO_PATH_E)index, 0x4F, bRFRegOffsetMask);
+
+				curveCountVal[2*i+1] = (readVal & 0xfffe0) >> 5;
+				// reg 0x4f [4:0]
+				// reg 0x50 [19:10]
+				readVal2 = PHY_QueryRFReg(pAdapter, (RF_RADIO_PATH_E)index, 0x50, 0xffc00);
+				curveCountVal[2*i] = (((readVal & 0x1F) << 10) | readVal2);
+
+			}
+
+			if(index == 0 && pHalData->interfaceIndex == 0)
+				phy_CalcCurvIndex(pAdapter, TargetChnl_5G, curveCountVal, _TRUE, CurveIndex);
+			else 
+				phy_CalcCurvIndex(pAdapter, TargetChnl_2G, curveCountVal, _FALSE, CurveIndex);
+
+			// switch CV-curve control mode
+			PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)index, RF_SYN_G7, BIT17, 0x1);
+		}
+
+	}
+
+	//Restore original situation	
+	for(index = 0; index <path; index ++)
+	{
+#if (TESTFLAG == 0)
+		PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)index, RF_SYN_G4, bRFRegOffsetMask, tmpu4Byte[index]);
+#endif
+		offset = index == 0?rOFDM0_XAAGCCore1:rOFDM0_XBAGCCore1;
+		//RTPRINT(FINIT, INIT_IQK,("offset 0x%x tmpreg = 0x%x index %d\n", offset, RF_mode[index], index));
+		rtw_write8(pAdapter, offset, 0x50);
+		rtw_write8(pAdapter, offset, RF_mode[index]);
+	}
+
+	phy_ReloadLCKSetting(pAdapter, pHalData->CurrentChannel);
+	
+}
+
+
+static VOID	
+phy_LCCalibrate(
+	IN	PADAPTER	pAdapter,
+	IN	BOOLEAN		is2T
+	)
+{
+#if SWLCK == 1
+	//DBG_8192C("cosa PHY_LCK ver=2\n");
+	phy_LCCalibrate92DSW(pAdapter, is2T);
+#else
+	phy_LCCalibrate92D(pAdapter, is2T);
+#endif
+}
+
+
+//Analog Pre-distortion calibration
+#define		APK_BB_REG_NUM	8
+#define		APK_CURVE_REG_NUM 4
+#define		PATH_NUM		2
+
+static VOID
+phy_APCalibrate(
+	IN	PADAPTER	pAdapter,
+	IN	char 		delta,
+	IN	BOOLEAN		is2T
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u32 			regD[PATH_NUM];
+	u32			tmpReg, index, offset, path, i, pathbound = PATH_NUM, apkbound;
+
+	u32			BB_backup[APK_BB_REG_NUM];
+	u32			BB_REG[APK_BB_REG_NUM] = {	
+						rFPGA1_TxBlock, 	rOFDM0_TRxPathEnable, 
+						rFPGA0_RFMOD, 	rOFDM0_TRMuxPar, 
+						rFPGA0_XCD_RFInterfaceSW,	rFPGA0_XAB_RFInterfaceSW, 
+						rFPGA0_XA_RFInterfaceOE, 	rFPGA0_XB_RFInterfaceOE	};
+	u32			BB_AP_MODE[APK_BB_REG_NUM] = {	
+						0x00000020, 0x00a05430, 0x02040000, 
+						0x000800e4, 0x00204000 };
+	u32			BB_normal_AP_MODE[APK_BB_REG_NUM] = {	
+						0x00000020, 0x00a05430, 0x02040000, 
+						0x000800e4, 0x22204000 };
+
+	u32			AFE_backup[IQK_ADDA_REG_NUM];
+	u32			AFE_REG[IQK_ADDA_REG_NUM] = {	
+						rFPGA0_XCD_SwitchControl, 	rBlue_Tooth, 	
+						rRx_Wait_CCA, 		rTx_CCK_RFON,
+						rTx_CCK_BBON, 	rTx_OFDM_RFON, 	
+						rTx_OFDM_BBON, 	rTx_To_Rx,
+						rTx_To_Tx, 		rRx_CCK, 	
+						rRx_OFDM, 		rRx_Wait_RIFS,
+						rRx_TO_Rx, 		rStandby, 	
+						rSleep, 			rPMPD_ANAEN };
+
+	u32			MAC_backup[IQK_MAC_REG_NUM];
+	u32			MAC_REG[IQK_MAC_REG_NUM] = {
+						REG_TXPAUSE, 		REG_BCN_CTRL,	
+						REG_BCN_CTRL_1,	REG_GPIO_MUXCFG};
+
+	u32			APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = {
+					{0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c},
+					{0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e}
+					};
+
+	u32			APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = {
+					{0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c},	//path settings equal to path b settings
+					{0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c}
+					};
+
+	u32			APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = {
+					{0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d},
+					{0x5201a, 0x52019, 0x52016, 0x52033, 0x52050}
+					};
+
+	u32			APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = {
+					{0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a},	//path settings equal to path b settings
+					{0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}
+					};
+#if 0
+	u32			APK_RF_value_A[PATH_NUM][APK_BB_REG_NUM] = {
+					{0x1adb0, 0x1adb0, 0x1ada0, 0x1ad90, 0x1ad80},
+					{0x00fb0, 0x00fb0, 0x00fa0, 0x00f90, 0x00f80}
+					};
+#endif
+	u32			AFE_on_off[PATH_NUM] = {
+					0x04db25a4, 0x0b1b25a4};	//path A on path B off / path A off path B on
+
+	u32			APK_offset[PATH_NUM] = {
+					rConfig_AntA, rConfig_AntB};
+
+	u32			APK_normal_offset[PATH_NUM] = {
+					rConfig_Pmpd_AntA, rConfig_Pmpd_AntB};
+					
+	u32			APK_value[PATH_NUM] = {
+					0x92fc0000, 0x12fc0000};
+
+	u32			APK_normal_value[PATH_NUM] = {
+					0x92680000, 0x12680000};
+
+	char			APK_delta_mapping[APK_BB_REG_NUM][13] = {
+					{-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
+					{-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},											
+					{-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
+					{-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6},
+					{-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0}
+					};
+	
+	u32			APK_normal_setting_value_1[13] = {
+					0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28,
+					0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3,
+					0x12680000, 0x00880000, 0x00880000
+					};
+
+	u32			APK_normal_setting_value_2[16] = {
+					0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3,
+					0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025,
+					0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008,
+					0x00050006
+					};
+
+	u32			APK_result[PATH_NUM][APK_BB_REG_NUM];	//val_1_1a, val_1_2a, val_2a, val_3a, val_4a
+	//u32			AP_curve[PATH_NUM][APK_CURVE_REG_NUM];
+
+	int			BB_offset, delta_V, delta_offset;
+
+#if (MP_DRIVER == 1)
+	PMPT_CONTEXT	pMptCtx = &pAdapter->mppriv.MptCtx;
+
+	pMptCtx->APK_bound[0] = 45;
+	pMptCtx->APK_bound[1] = 52;		
+#endif
+
+	//RTPRINT(FINIT, INIT_IQK, ("==>PHY_APCalibrate() delta %d\n", delta));
+	//RTPRINT(FINIT, INIT_IQK, ("AP Calibration for %s\n", (is2T ? "2T2R" : "1T1R")));
+
+	if(!is2T)
+		pathbound = 1;
+
+	//2 FOR NORMAL CHIP SETTINGS
+
+// Temporarily do not allow normal driver to do the following settings because these offset
+// and value will cause RF internal PA to be unpredictably disabled by HW, such that RF Tx signal
+// will disappear after disable/enable card many times on 88CU. RF SD and DD have not find the
+// root cause, so we remove these actions temporarily. Added by tynli and SD3 Allen. 2010.05.31.
+#if MP_DRIVER != 1
+	return;
+#endif
+
+	//settings adjust for normal chip
+	for(index = 0; index < PATH_NUM; index ++)
+	{
+		APK_offset[index] = APK_normal_offset[index];
+		APK_value[index] = APK_normal_value[index];
+		AFE_on_off[index] = 0x6fdb25a4;
+	}
+
+	for(index = 0; index < APK_BB_REG_NUM; index ++)
+	{
+		for(path = 0; path < pathbound; path++)
+		{
+			APK_RF_init_value[path][index] = APK_normal_RF_init_value[path][index];
+			APK_RF_value_0[path][index] = APK_normal_RF_value_0[path][index];
+		}
+		BB_AP_MODE[index] = BB_normal_AP_MODE[index];
+	}
+
+	apkbound = 6;
+	
+	//save BB default value
+	for(index = 0; index < APK_BB_REG_NUM ; index++)
+	{
+		if(index == 0)		//skip 
+			continue;				
+		BB_backup[index] = PHY_QueryBBReg(pAdapter, BB_REG[index], bMaskDWord);
+	}
+	
+	//save MAC default value													
+	phy_SaveMACRegisters(pAdapter, MAC_REG, MAC_backup);
+	
+	//save AFE default value
+	phy_SaveADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM);
+
+	for(path = 0; path < pathbound; path++)
+	{
+
+
+		if(path == RF_PATH_A)
+		{
+			//path A APK
+			//load APK setting
+			//path-A		
+			offset = rPdp_AntA;
+			for(index = 0; index < 11; index ++)			
+			{
+				PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]);
+				//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); 	
+				
+				offset += 0x04;
+			}
+			
+			PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000);
+			
+			offset = rConfig_AntA;
+			for(; index < 13; index ++) 		
+			{
+				PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]);
+				//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); 	
+				
+				offset += 0x04;
+			}	
+			
+			//page-B1
+			PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x40000000);
+		
+			//path A
+			offset = rPdp_AntA;
+			for(index = 0; index < 16; index++)
+			{
+				PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]);		
+				//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); 	
+				
+				offset += 0x04;
+			}				
+			PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000);							
+		}
+		else if(path == RF_PATH_B)
+		{
+			//path B APK
+			//load APK setting
+			//path-B		
+			offset = rPdp_AntB;
+			for(index = 0; index < 10; index ++)			
+			{
+				PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]);
+				//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); 	
+				
+				offset += 0x04;
+			}
+			PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntA, bMaskDWord, 0x12680000);
+			
+			PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000);
+			
+			offset = rConfig_AntA;
+			index = 11;
+			for(; index < 13; index ++) //offset 0xb68, 0xb6c		
+			{
+				PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]);
+				//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); 	
+				
+				offset += 0x04;
+			}	
+			
+			//page-B1
+			PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x40000000);
+			
+			//path B
+			offset = 0xb60;
+			for(index = 0; index < 16; index++)
+			{
+				PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]);		
+				//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); 	
+				
+				offset += 0x04;
+			}				
+			PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000);							
+		}
+	
+		//save RF default value
+		regD[path] = PHY_QueryRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_TXBIAS_A, bRFRegOffsetMask);
+		
+		//Path A AFE all on, path B AFE All off or vise versa
+		for(index = 0; index < IQK_ADDA_REG_NUM ; index++)
+			PHY_SetBBReg(pAdapter, AFE_REG[index], bMaskDWord, AFE_on_off[path]);
+		//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xe70 %x\n", PHY_QueryBBReg(pAdapter, rRx_Wait_CCA, bMaskDWord)));		
+
+		//BB to AP mode
+		if(path == 0)
+		{				
+			for(index = 0; index < APK_BB_REG_NUM ; index++)
+			{
+
+				if(index == 0)		//skip 
+					continue;			
+				else if (index < 5)
+				PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_AP_MODE[index]);
+				else if (BB_REG[index] == 0x870)
+					PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]|BIT10|BIT26);
+				else
+					PHY_SetBBReg(pAdapter, BB_REG[index], BIT10, 0x0);					
+			}
+
+			PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00);			
+			PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00);					
+		}
+		else		//path B
+		{
+			PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x01008c00);			
+			PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x01008c00);					
+		
+		}
+
+		//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x800 %x\n", PHY_QueryBBReg(pAdapter, 0x800, bMaskDWord)));				
+
+		//MAC settings
+		phy_MACSettingCalibration(pAdapter, MAC_REG, MAC_backup);
+		
+		if(path == RF_PATH_A)	//Path B to standby mode
+		{
+			PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bRFRegOffsetMask, 0x10000);			
+		}
+		else			//Path A to standby mode
+		{
+			PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x10000);			
+			PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE1, bRFRegOffsetMask, 0x1000f);			
+			PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE2, bRFRegOffsetMask, 0x20103);						
+		}
+
+		delta_offset = ((delta+14)/2);
+		if(delta_offset < 0)
+			delta_offset = 0;
+		else if (delta_offset > 12)
+			delta_offset = 12;
+			
+		//AP calibration
+		for(index = 0; index < APK_BB_REG_NUM; index++)
+		{
+			if(index != 1)	//only DO PA11+PAD01001, AP RF setting
+				continue;
+					
+			tmpReg = APK_RF_init_value[path][index];
+#if 1			
+			if(!pdmpriv->bAPKThermalMeterIgnore)
+			{
+				BB_offset = (tmpReg & 0xF0000) >> 16;
+
+				if(!(tmpReg & BIT15)) //sign bit 0
+				{
+					BB_offset = -BB_offset;
+				}
+
+				delta_V = APK_delta_mapping[index][delta_offset];
+				
+				BB_offset += delta_V;
+
+				//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() APK index %d tmpReg 0x%x delta_V %d delta_offset %d\n", index, tmpReg, delta_V, delta_offset));		
+				
+				if(BB_offset < 0)
+				{
+					tmpReg = tmpReg & (~BIT15);
+					BB_offset = -BB_offset;
+				}
+				else
+				{
+					tmpReg = tmpReg | BIT15;
+				}
+				tmpReg = (tmpReg & 0xFFF0FFFF) | (BB_offset << 16);
+			}
+#endif
+
+#ifdef CONFIG_PCI_HCI
+			if(IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID))
+				PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_IPA_A, bRFRegOffsetMask, 0x894ae);
+			else
+#endif	
+				PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_IPA_A, bRFRegOffsetMask, 0x8992e);
+			//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xc %x\n", PHY_QueryRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_IPA_A, bRFRegOffsetMask)));		
+			PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_AC, bRFRegOffsetMask, APK_RF_value_0[path][index]);
+			//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x0 %x\n", PHY_QueryRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_AC, bRFRegOffsetMask)));		
+			PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_TXBIAS_A, bRFRegOffsetMask, tmpReg);
+			//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xd %x\n", PHY_QueryRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_TXBIAS_A, bRFRegOffsetMask)));					
+			
+			// PA11+PAD01111, one shot	
+			i = 0;
+			do
+			{
+				PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80000000);
+				{
+					PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[0]);		
+					//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord)));
+					rtw_mdelay_os(3);				
+					PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[1]);
+					//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord)));
+
+					rtw_mdelay_os(20);
+				}
+				PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000);
+
+				if(path == RF_PATH_A)
+					tmpReg = PHY_QueryBBReg(pAdapter, rAPK, 0x03E00000);
+				else
+					tmpReg = PHY_QueryBBReg(pAdapter, rAPK, 0xF8000000);
+				//RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xbd8[25:21] %x\n", tmpReg));		
+				
+
+				i++;
+			}
+			while(tmpReg > apkbound && i < 4);
+
+			APK_result[path][index] = tmpReg;
+		}
+	}
+
+	//reload MAC default value	
+	phy_ReloadMACRegisters(pAdapter, MAC_REG, MAC_backup);
+
+	//reload BB default value	
+	for(index = 0; index < APK_BB_REG_NUM ; index++)
+	{
+
+		if(index == 0)		//skip 
+			continue;					
+		PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]);
+	}
+	
+	//reload AFE default value
+	phy_ReloadADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM);
+
+	//reload RF path default value
+	for(path = 0; path < pathbound; path++)
+	{
+		PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_TXBIAS_A, bRFRegOffsetMask, regD[path]);
+		if(path == RF_PATH_B)
+		{
+			PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE1, bRFRegOffsetMask, 0x1000f);			
+			PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE2, bRFRegOffsetMask, 0x20101);						
+		}
+
+		//note no index == 0
+		if (APK_result[path][1] > 6)
+			APK_result[path][1] = 6;
+		//RTPRINT(FINIT, INIT_IQK, ("apk path %d result %d 0x%x \t", path, 1, APK_result[path][1]));					
+	}
+
+	//RTPRINT(FINIT, INIT_IQK, ("\n"));
+
+	for(path = 0; path < pathbound; path++)
+	{
+		PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_BS_PA_APSET_G1_G4, bRFRegOffsetMask, 
+		((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (APK_result[path][1] << 5) | APK_result[path][1]));
+		if(path == RF_PATH_A)
+			PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_BS_PA_APSET_G5_G8, bRFRegOffsetMask, 
+			((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x00 << 5) | 0x05));		
+		else
+		PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_BS_PA_APSET_G5_G8, bRFRegOffsetMask, 
+			((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05));						
+
+		//if(!IS_HARDWARE_TYPE_8723A(pAdapter))		
+		//	PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_BS_PA_APSET_G9_G11, bRFRegOffsetMask, 
+		//	((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08));
+	}
+
+	pdmpriv->bAPKdone = _TRUE;
+
+	//RTPRINT(FINIT, INIT_IQK, ("<==PHY_APCalibrate()\n"));
+}
+
+static VOID phy_SetRFPathSwitch(
+	IN	PADAPTER	pAdapter,
+	IN	BOOLEAN		bMain,
+	IN	BOOLEAN		is2T
+	)
+{
+	
+	if(!pAdapter->hw_init_completed)
+	{
+		PHY_SetBBReg(pAdapter, 0x4C, BIT23, 0x01);
+		PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01);
+	}
+	
+	if(bMain)
+		PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x2);	
+	else
+		PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x1);		
+
+	//RT_TRACE(COMP_OID_SET, DBG_LOUD, ("_PHY_SetRFPathSwitch 0x4C %lx, 0x878 %lx, 0x860 %lx \n", PHY_QueryBBReg(pAdapter, 0x4C, BIT23), PHY_QueryBBReg(pAdapter, 0x878, BIT13), PHY_QueryBBReg(pAdapter, 0x860, 0x300)));
+
+}
+
+VOID
+rtl8192d_PHY_IQCalibrate(
+	IN	PADAPTER	pAdapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	int			result[4][8];	//last is final result
+	u8			i, final_candidate, Indexforchannel;
+	BOOLEAN		bPathAOK, bPathBOK;
+	int			RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0;
+	BOOLEAN		is12simular, is13simular, is23simular;
+	BOOLEAN 	bStartContTx = _FALSE, bSingleTone = _FALSE, bCarrierSuppression = _FALSE;
+
+	//if (ODM_CheckPowerStatus(pAdapter) == _FALSE)
+	//	return;
+
+#if (MP_DRIVER == 1)
+	bStartContTx = pAdapter->mppriv.MptCtx.bStartContTx;
+	bSingleTone = pAdapter->mppriv.MptCtx.bSingleTone;
+	bCarrierSuppression = pAdapter->mppriv.MptCtx.bCarrierSuppression;
+#endif
+
+	//ignore IQK when continuous Tx
+	if(bStartContTx || bSingleTone || bCarrierSuppression)
+		return;
+
+#if DISABLE_BB_RF
+	return;
+#endif
+
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	if(pHalData->bSlaveOfDMSP)
+		return;
+#endif
+
+	//RTPRINT(FINIT, INIT_IQK, ("IQK:Start!!!interface %d channel %d\n", pHalData->interfaceIndex, pHalData->CurrentChannel));
+
+	for(i = 0; i < 8; i++)
+	{
+		result[0][i] = 0;
+		result[1][i] = 0;
+		result[2][i] = 0;
+		result[3][i] = 0;
+	}
+	final_candidate = 0xff;
+	bPathAOK = _FALSE;
+	bPathBOK = _FALSE;
+	is12simular = _FALSE;
+	is23simular = _FALSE;
+	is13simular = _FALSE;
+
+	//RTPRINT(FINIT, INIT_IQK, ("IQK !!!interface %d currentband %d ishardwareD %d \n", pAdapter->interfaceIndex, pHalData->CurrentBandType92D, IS_HARDWARE_TYPE_8192D(pAdapter)));
+	//AcquireCCKAndRWPageAControl(pAdapter);
+	//RT_TRACE(COMP_INIT,DBG_LOUD,("Acquire Mutex in IQCalibrate \n"));
+	for (i=0; i<3; i++)
+	{
+		if(pHalData->CurrentBandType92D == BAND_ON_5G)
+		{
+			phy_IQCalibrate_5G_Normal(pAdapter, result, i);
+		}
+		else if(pHalData->CurrentBandType92D == BAND_ON_2_4G)
+		{
+			if(IS_92D_SINGLEPHY(pHalData->VersionID))
+				phy_IQCalibrate(pAdapter, result, i, _TRUE);
+			else
+				phy_IQCalibrate(pAdapter, result, i, _FALSE);
+		}
+		
+		if(i == 1)
+		{
+			is12simular = phy_SimularityCompare(pAdapter, result, 0, 1);
+			if(is12simular)
+			{
+				final_candidate = 0;
+				break;
+			}
+		}
+		
+		if(i == 2)
+		{
+			is13simular = phy_SimularityCompare(pAdapter, result, 0, 2);
+			if(is13simular)
+			{
+				final_candidate = 0;			
+				break;
+			}
+			
+			is23simular = phy_SimularityCompare(pAdapter, result, 1, 2);
+			if(is23simular)
+				final_candidate = 1;
+			else
+			{
+				for(i = 0; i < 8; i++)
+					RegTmp += result[3][i];
+
+				if(RegTmp != 0)
+					final_candidate = 3;			
+				else
+					final_candidate = 0xFF;
+			}
+		}
+	}
+	//RT_TRACE(COMP_INIT,DBG_LOUD,("Release Mutex in IQCalibrate \n"));
+	//ReleaseCCKAndRWPageAControl(pAdapter);
+
+        for (i=0; i<4; i++)
+	{
+		RegE94 = result[i][0];
+		RegE9C = result[i][1];
+		RegEA4 = result[i][2];
+		RegEAC = result[i][3];
+		RegEB4 = result[i][4];
+		RegEBC = result[i][5];
+		RegEC4 = result[i][6];
+		RegECC = result[i][7];
+		//RTPRINT(FINIT, INIT_IQK, ("IQK: RegE94=%lx RegE9C=%lx RegEA4=%lx RegEAC=%lx RegEB4=%lx RegEBC=%lx RegEC4=%lx RegECC=%lx\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC));
+	}
+
+	if(final_candidate != 0xff)
+	{
+		pdmpriv->RegE94 = RegE94 = result[final_candidate][0];
+		pdmpriv->RegE9C = RegE9C = result[final_candidate][1];
+		RegEA4 = result[final_candidate][2];
+		RegEAC = result[final_candidate][3];
+		pdmpriv->RegEB4 = RegEB4 = result[final_candidate][4];
+		pdmpriv->RegEBC = RegEBC = result[final_candidate][5];
+		RegEC4 = result[final_candidate][6];
+		RegECC = result[final_candidate][7];
+		DBG_8192C("IQK: final_candidate is %x\n", final_candidate);
+		DBG_8192C("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC);
+		bPathAOK = bPathBOK = _TRUE;
+	}
+	else
+	{
+		pdmpriv->RegE94 = pdmpriv->RegEB4 = 0x100;	//X default value
+		pdmpriv->RegE9C = pdmpriv->RegEBC = 0x0;		//Y default value
+	}
+
+	if((RegE94 != 0)/*&&(RegEA4 != 0)*/)
+	{
+		if(pHalData->CurrentBandType92D == BAND_ON_5G)
+			phy_PathAFillIQKMatrix_5G_Normal(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0));	
+		else	
+			phy_PathAFillIQKMatrix(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0));
+	}
+
+	if (IS_92C_SERIAL(pHalData->VersionID) || IS_92D_SINGLEPHY(pHalData->VersionID))
+	{
+		if((RegEB4 != 0)/*&&(RegEC4 != 0)*/)
+		{
+			if(pHalData->CurrentBandType92D == BAND_ON_5G)
+				phy_PathBFillIQKMatrix_5G_Normal(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0));
+			else
+				phy_PathBFillIQKMatrix(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0));
+		}
+	}
+
+	if(IS_HARDWARE_TYPE_8192D(pAdapter) && final_candidate != 0xFF)
+	{
+		Indexforchannel = rtl8192d_GetRightChnlPlaceforIQK(pHalData->CurrentChannel);
+
+		for(i = 0; i < IQK_Matrix_REG_NUM; i++)
+		{
+			pHalData->IQKMatrixRegSetting[Indexforchannel].Value[0][i] = 
+				result[final_candidate][i];
+		}
+
+		pHalData->IQKMatrixRegSetting[Indexforchannel].bIQKDone = _TRUE;
+
+		//RT_TRACE(COMP_SCAN|COMP_MLME,DBG_LOUD,("\nIQK OK Indexforchannel %d.\n", Indexforchannel));
+	}
+
+}
+
+
+VOID
+rtl8192d_PHY_LCCalibrate(
+	IN	PADAPTER	pAdapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct mlme_ext_priv	*pmlmeext = &pAdapter->mlmeextpriv;
+	BOOLEAN 	bStartContTx = _FALSE, bSingleTone = _FALSE, bCarrierSuppression = _FALSE;
+	u32			timeout = 2000, timecount = 0;
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	PADAPTER	BuddyAdapter = pAdapter->pbuddy_adapter;
+	struct mlme_priv	*pmlmeprivBuddyAdapter;
+#endif
+
+#if MP_DRIVER == 1
+	bStartContTx = pAdapter->mppriv.MptCtx.bStartContTx;
+	bSingleTone = pAdapter->mppriv.MptCtx.bSingleTone;
+	bCarrierSuppression = pAdapter->mppriv.MptCtx.bCarrierSuppression;
+#endif
+
+#if DISABLE_BB_RF
+	return;
+#endif
+
+	//ignore IQK when continuous Tx
+	if(bStartContTx || bSingleTone || bCarrierSuppression)
+		return;
+
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	if(BuddyAdapter != NULL && 
+		((pHalData->interfaceIndex == 0 && pHalData->CurrentBandType92D == BAND_ON_2_4G) ||
+		(pHalData->interfaceIndex == 1 && pHalData->CurrentBandType92D == BAND_ON_5G)))
+	{
+		pmlmeprivBuddyAdapter = &BuddyAdapter->mlmepriv;
+		while((check_fwstate(pmlmeprivBuddyAdapter, _FW_UNDER_LINKING|_FW_UNDER_SURVEY)==_TRUE) && timecount < timeout)
+		{
+			#ifdef CONFIG_LONG_DELAY_ISSUE
+			rtw_msleep_os(50);
+			#else
+			rtw_mdelay_os(50);
+			#endif
+			timecount += 50;
+		}
+	}
+#endif
+
+	while((pmlmeext->sitesurvey_res.state == SCAN_PROCESS) && timecount < timeout)
+	{
+		#ifdef CONFIG_LONG_DELAY_ISSUE
+		rtw_msleep_os(50);
+		#else
+		rtw_mdelay_os(50);
+		#endif
+		timecount += 50;
+	}
+
+	pHalData->bLCKInProgress = _TRUE;
+
+	//DBG_8192C("LCK:Start!!!interface %d currentband %x delay %d ms\n", pHalData->interfaceIndex, pHalData->CurrentBandType92D, timecount);
+
+	if(IS_92D_SINGLEPHY(pHalData->VersionID))
+	{
+		phy_LCCalibrate(pAdapter, _TRUE);
+	}
+	else{
+		// For 88C 1T1R
+		phy_LCCalibrate(pAdapter, _FALSE);
+	}
+
+	pHalData->bLCKInProgress = _FALSE;
+
+	//RTPRINT(FINIT, INIT_IQK, ("LCK:Finish!!!interface %d\n", pHalData->interfaceIndex));
+}
+
+VOID
+rtl8192d_PHY_APCalibrate(
+	IN	PADAPTER	pAdapter,
+	IN	char 		delta	
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+#if DISABLE_BB_RF
+	return;
+#endif
+
+	//if(IS_HARDWARE_TYPE_8192D(pAdapter))
+		return;
+
+	if(pdmpriv->bAPKdone)
+		return;
+
+//	if(IS_NORMAL_CHIP(pHalData->VersionID))
+//		return;
+
+	if(IS_92D_SINGLEPHY(pHalData->VersionID)){
+		phy_APCalibrate(pAdapter, delta, _TRUE);
+	}
+	else{
+		// For 88C 1T1R
+		phy_APCalibrate(pAdapter, delta, _FALSE);
+	}
+}
+
+/*
+VOID PHY_SetRFPathSwitch(
+	IN	PADAPTER	pAdapter,
+	IN	BOOLEAN		bMain
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+
+#if DISABLE_BB_RF
+	return;
+#endif
+
+	if (IS_92D_SINGLEPHY(pHalData->VersionID))
+	{
+		_PHY_SetRFPathSwitch(pAdapter, bMain, _TRUE);
+	}
+	else{
+		// For 88C 1T1R
+		_PHY_SetRFPathSwitch(pAdapter, bMain, _FALSE);
+	}
+}
+
+
+//return value TRUE => Main; FALSE => Aux
+BOOLEAN PHY_QueryRFPathSwitch(	
+	IN	PADAPTER	pAdapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+
+#if DISABLE_BB_RF
+	return _TRUE;
+#endif
+
+#ifdef CONFIG_USB_HCI
+	return _TRUE;
+#endif
+
+	if(IS_92D_SINGLEPHY(pHalData->VersionID))
+	{
+		return _PHY_QueryRFPathSwitch(pAdapter, _TRUE);
+	}
+	else{
+		// For 88C 1T1R
+		return _PHY_QueryRFPathSwitch(pAdapter, _FALSE);
+	}
+}
+*/
+
+VOID
+PHY_UpdateBBRFConfiguration8192D(
+	IN PADAPTER Adapter,
+	IN BOOLEAN bisBandSwitch
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u8	eRFPath = 0;
+	BOOLEAN			bInternalPA;
+
+	//DBG_8192C("PHY_UpdateBBRFConfiguration8192D()=====>\n");
+
+	//Update BB
+	//r_select_5G for path_A/B.0 for 2.4G,1 for 5G
+	if(pHalData->CurrentBandType92D == BAND_ON_2_4G)
+	{// 2.4G band
+		//r_select_5G for path_A/B,0x878
+
+		DBG_871X("==>PHY_UpdateBBRFConfiguration8192D() interface %d BAND_ON_2_4G settings\n", pHalData->interfaceIndex);
+		
+		PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT0, 0x0);
+		PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT15, 0x0);
+		if(pHalData->MacPhyMode92D != DUALMAC_DUALPHY)
+		{
+			PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT16, 0x0);
+			PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT31, 0x0);
+		}
+		
+		//rssi_table_select:index 0 for 2.4G.1~3 for 5G,0xc78
+		PHY_SetBBReg(Adapter, rOFDM0_AGCRSSITable, BIT6|BIT7, 0x0);
+		
+		//fc_area//0xd2c
+		PHY_SetBBReg(Adapter, rOFDM1_CFOTracking, BIT14|BIT13, 0x0);
+		// 5G LAN ON
+		PHY_SetBBReg(Adapter, 0xB30, 0x00F00000, 0xa);
+
+		//TX BB gain shift*1,Just for testchip,0xc80,0xc88
+		PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, 0x40000100);
+		PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, 0x40000100);
+
+		if(pHalData->MacPhyMode92D == DUALMAC_DUALPHY)
+		{
+			PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, 0x40000100);
+			pdmpriv->OFDM_index[RF_PATH_A] = 0x0c;		
+			PHY_SetBBReg(Adapter, rFPGA0_XAB_RFInterfaceSW, BIT10|BIT6|BIT5, 
+				((pHalData->EEPROMC9&BIT3) >> 3)|(pHalData->EEPROMC9&BIT1)|((pHalData->EEPROMCC&BIT1) << 4));	
+			PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, BIT10|BIT6|BIT5, 
+				((pHalData->EEPROMC9&BIT2) >> 2)|((pHalData->EEPROMC9&BIT0) << 1)|((pHalData->EEPROMCC&BIT0) << 5));						
+			PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT15, 0);	
+			PHY_SetBBReg(Adapter, rPdp_AntA, bMaskDWord, 0x01017038);
+			PHY_SetBBReg(Adapter, rConfig_AntA, bMaskDWord, 0x0f600000);
+		}
+		else
+		{
+			PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, 0x40000100);
+			PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, 0x40000100);
+			pdmpriv->OFDM_index[RF_PATH_A] = 0x0c;		
+			pdmpriv->OFDM_index[RF_PATH_B] = 0x0c;		
+		
+			PHY_SetBBReg(Adapter, rFPGA0_XAB_RFInterfaceSW, BIT26|BIT22|BIT21|BIT10|BIT6|BIT5, 
+				((pHalData->EEPROMC9&BIT3) >> 3)|(pHalData->EEPROMC9&BIT1)|((pHalData->EEPROMCC&BIT1) << 4)|((pHalData->EEPROMC9&BIT7) << 9)|((pHalData->EEPROMC9&BIT5) << 12)|((pHalData->EEPROMCC&BIT3) << 18));	
+			PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, BIT10|BIT6|BIT5, 
+				((pHalData->EEPROMC9&BIT2) >> 2)|((pHalData->EEPROMC9&BIT0) << 1)|((pHalData->EEPROMCC&BIT0) << 5));			
+			PHY_SetBBReg(Adapter, rFPGA0_XB_RFInterfaceOE, BIT10|BIT6|BIT5, 
+				((pHalData->EEPROMC9&BIT6) >> 6)|((pHalData->EEPROMC9&BIT4) >> 3)|((pHalData->EEPROMCC&BIT2) << 3));						
+			PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT31|BIT15, 0);	
+			PHY_SetBBReg(Adapter, rPdp_AntA, bMaskDWord, 0x01017038);
+			PHY_SetBBReg(Adapter, rPdp_AntB, bMaskDWord, 0x01017038);	
+
+			PHY_SetBBReg(Adapter, rConfig_AntA, bMaskDWord, 0x0f600000);
+			PHY_SetBBReg(Adapter, rConfig_AntB, bMaskDWord, 0x0f600000);
+		}
+		pdmpriv->CCK_index = 0x0c;
+
+	}
+	else	//5G band
+	{
+		DBG_871X("==>PHY_UpdateBBRFConfiguration8192D() interface %d BAND_ON_5G settings\n", pHalData->interfaceIndex);
+	
+		//r_select_5G for path_A/B
+		PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT0, 0x1);
+		PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT15, 0x1);
+		if(pHalData->MacPhyMode92D != DUALMAC_DUALPHY)
+		{
+			PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT16, 0x1);
+			PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT31, 0x1);
+		}
+		
+		//rssi_table_select:index 0 for 2.4G.1~3 for 5G
+		PHY_SetBBReg(Adapter, rOFDM0_AGCRSSITable, BIT6|BIT7, 0x1);
+		
+		//fc_area
+		PHY_SetBBReg(Adapter, rOFDM1_CFOTracking, BIT14|BIT13, 0x1);
+		// 5G LAN ON
+		PHY_SetBBReg(Adapter, 0xB30, 0x00F00000, 0x0);
+
+		//TX BB gain shift,Just for testchip,0xc80,0xc88
+		if(pHalData->MacPhyMode92D == DUALMAC_DUALPHY)
+		{
+			if(pHalData->interfaceIndex == 0)
+				bInternalPA = pHalData->InternalPA5G[0];
+			else
+				bInternalPA = pHalData->InternalPA5G[1];							
+
+			if(bInternalPA)
+			{
+				PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, 0x2d4000b5);
+				pdmpriv->OFDM_index[RF_PATH_A] = 0x12;
+			}
+			else 
+			{
+				PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, 0x20000080);
+				pdmpriv->OFDM_index[RF_PATH_A] = 0x18;
+			}
+		}
+		else
+		{
+			if(pHalData->InternalPA5G[0])
+			{
+				PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, 0x2d4000b5);
+				pdmpriv->OFDM_index[RF_PATH_A] = 0x12;
+			}
+			else 
+			{
+				PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, 0x20000080);
+				pdmpriv->OFDM_index[RF_PATH_A] = 0x18;
+			}
+
+			if(pHalData->InternalPA5G[1])
+			{
+				PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, 0x2d4000b5);			
+				pdmpriv->OFDM_index[RF_PATH_B] = 0x12;
+			}
+			else
+			{
+				PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, 0x20000080);
+				pdmpriv->OFDM_index[RF_PATH_A] = 0x18;
+			}
+		}
+
+		DBG_871X("==>PHY_UpdateBBRFConfiguration8192D() interface %d BAND_ON_5G settings OFDM index 0x%x\n", pHalData->interfaceIndex, pdmpriv->OFDM_index[RF_PATH_A]);
+
+		if(pHalData->MacPhyMode92D == DUALMAC_DUALPHY)
+		{
+			PHY_SetBBReg(Adapter, rFPGA0_XAB_RFInterfaceSW, BIT10|BIT6|BIT5, 
+				(pHalData->EEPROMCC&BIT5));	
+			PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, BIT10, 
+				((pHalData->EEPROMCC&BIT4) >> 4));				
+			PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT15, 
+				(pHalData->EEPROMCC&BIT4) >> 4);
+			PHY_SetBBReg(Adapter, rPdp_AntA, bMaskDWord, 0x01017098);	
+			if(pdmpriv->bDPKdone[RF_PATH_A])			
+				PHY_SetBBReg(Adapter, 0xb68, bMaskDWord, 0x08080000);
+			else
+				PHY_SetBBReg(Adapter, 0xb68, bMaskDWord, 0x20000000);
+		}
+		else	
+		{
+			PHY_SetBBReg(Adapter, rFPGA0_XAB_RFInterfaceSW, BIT26|BIT22|BIT21|BIT10|BIT6|BIT5, 
+				(pHalData->EEPROMCC&BIT5)|((pHalData->EEPROMCC&BIT7) << 14));
+			PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, BIT10, 
+				((pHalData->EEPROMCC&BIT4) >> 4));
+			PHY_SetBBReg(Adapter, rFPGA0_XB_RFInterfaceOE, BIT10, 
+				((pHalData->EEPROMCC&BIT6) >> 6));
+			PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT31|BIT15, 
+				((pHalData->EEPROMCC&BIT4) >> 4)|((pHalData->EEPROMCC&BIT6) << 10));
+			PHY_SetBBReg(Adapter, rPdp_AntA, bMaskDWord, 0x01017098);
+			PHY_SetBBReg(Adapter, rPdp_AntB, bMaskDWord, 0x01017098);
+			if(pdmpriv->bDPKdone[RF_PATH_A])	
+				PHY_SetBBReg(Adapter, 0xb68, bMaskDWord, 0x08080000);
+			else
+				PHY_SetBBReg(Adapter, 0xb68, bMaskDWord, 0x20000000);
+			if(pdmpriv->bDPKdone[RF_PATH_B])	
+				PHY_SetBBReg(Adapter, 0xb6c, bMaskDWord, 0x08080000);
+			else	
+				PHY_SetBBReg(Adapter, 0xb6c, bMaskDWord, 0x20000000);
+		}
+
+	}
+
+	//update IQK related settings
+	{
+		PHY_SetBBReg(Adapter, rOFDM0_XARxIQImbalance, bMaskDWord, 0x40000100);
+		PHY_SetBBReg(Adapter, rOFDM0_XBRxIQImbalance, bMaskDWord, 0x40000100);
+		PHY_SetBBReg(Adapter, rOFDM0_XCTxAFE, 0xF0000000, 0x00);
+		PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold,  BIT30|BIT28|BIT26|BIT24,  0x00);
+		PHY_SetBBReg(Adapter, rOFDM0_XDTxAFE, 0xF0000000, 0x00);
+		PHY_SetBBReg(Adapter, rOFDM0_RxIQExtAnta, 0xF0000000, 0x00);
+		PHY_SetBBReg(Adapter, rOFDM0_AGCRSSITable, 0x0000F000, 0x00);
+	}
+		
+	//Update RF	
+	for(eRFPath = RF_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
+	{
+		if(pHalData->CurrentBandType92D == BAND_ON_2_4G){
+			//MOD_AG for RF paht_A 0x18 BIT8,BIT16
+			PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, RF_CHNLBW, BIT8|BIT16|BIT18|0xFF, 1);
+			
+			//RF0x0b[16:14] =3b'111  
+			PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, RF_TXPA_AG, 0x1c000, 0x07);
+		}
+		else{ //5G band
+			//MOD_AG for RF paht_A 0x18 BIT8,BIT16
+			PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, 0x97524); //set channel 36
+
+		}
+
+#if 1
+		if((pHalData->interfaceIndex == 0 && pHalData->BandSet92D == BAND_ON_2_4G)
+			|| (pHalData->interfaceIndex == 1 && pHalData->BandSet92D == BAND_ON_5G))
+		{
+			//Set right channel on RF reg0x18 for another mac. 
+			if(pHalData->interfaceIndex == 0) //set MAC1 default channel if MAC1 not up.
+ 			{
+				if(!(rtw_read8(Adapter, REG_MAC1)&MAC1_ON))
+				{
+					rtl8192d_PHY_EnableAnotherPHY(Adapter, _TRUE);
+					PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW|MAC0_ACCESS_PHY1, bRFRegOffsetMask, 0x97524); //set channel 36
+					DBG_871X("PHY_UpdateBBRFConfiguration8192D(),MAC0 set MAC1 RF0x18:%x.\n",PHY_QueryRFReg(Adapter,RF_PATH_A,RF_CHNLBW|MAC0_ACCESS_PHY1,bRFRegOffsetMask));
+					rtl8192d_PHY_PowerDownAnotherPHY(Adapter, _TRUE);
+				}
+			}
+			else
+			if(pHalData->interfaceIndex == 1)//set MAC0 default channel
+			{
+				if(!(rtw_read8(Adapter, REG_MAC0)&MAC0_ON))
+				{
+					rtl8192d_PHY_EnableAnotherPHY(Adapter, _FALSE);
+					PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW|MAC1_ACCESS_PHY0, bRFRegOffsetMask, 0x87401); // set channel 1
+					DBG_871X("PHY_UpdateBBRFConfiguration8192D(),MAC1 set MAC0 RF0x18:%x.\n",PHY_QueryRFReg(Adapter,RF_PATH_A,RF_CHNLBW|MAC1_ACCESS_PHY0,bRFRegOffsetMask));
+					rtl8192d_PHY_PowerDownAnotherPHY(Adapter, _FALSE);
+				}
+			}
+		}
+#endif
+
+	}
+
+	//Update for all band.
+	if(pHalData->rf_type == RF_1T1R)
+	{ //DMDP
+		//Use antenna 0,0xc04,0xd04
+#if MP_DRIVER == 1
+		if(!bisBandSwitch)
+#endif
+		{
+		PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x11);
+		PHY_SetBBReg(Adapter, rOFDM1_TRxPathEnable, bDWord, 0x1);
+		}
+
+		//enable ad/da clock1 for dual-phy reg0x888
+		if(pHalData->interfaceIndex == 0)
+			PHY_SetBBReg(Adapter, rFPGA0_AdDaClockEn, BIT12|BIT13, 0x3);
+		else
+		{
+			BOOLEAN bMAC0NotUp =_FALSE;
+
+			bMAC0NotUp = rtl8192d_PHY_EnableAnotherPHY(Adapter, _FALSE);
+			if(bMAC0NotUp)
+			{
+#ifdef CONFIG_PCI_HCI
+				//RT_TRACE(COMP_INIT,DBG_LOUD,("MAC1 use DBI to update 0x888"));
+				//0x888
+				MpWritePCIDwordDBI8192D(Adapter, 
+									rFPGA0_AdDaClockEn, 
+									MpReadPCIDwordDBI8192D(Adapter, rFPGA0_AdDaClockEn, BIT3)|BIT12|BIT13,
+									BIT3);
+#else	//USB interface
+				//RT_TRACE(COMP_INIT,DBG_LOUD,("MAC1 update MAC0's 0x888"));
+				PHY_SetBBReg(Adapter, rFPGA0_AdDaClockEn|MAC1_ACCESS_PHY0, BIT12|BIT13, 0x3);
+#endif
+				rtl8192d_PHY_PowerDownAnotherPHY(Adapter, _FALSE);
+			}
+		}
+	}
+	else // 2T2R //Single PHY
+	{
+		//Use antenna 0 & 1,0xc04,0xd04
+		PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x33);
+		PHY_SetBBReg(Adapter, rOFDM1_TRxPathEnable, bDWord, 0x3);
+
+		//disable ad/da clock1,0x888
+		PHY_SetBBReg(Adapter, rFPGA0_AdDaClockEn, BIT12|BIT13, 0);
+	}
+
+#if MP_DRIVER == 1
+	if(bisBandSwitch)
+	{
+		PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskByte0, pdmpriv->RegC04_MP);
+		PHY_SetBBReg(Adapter, rOFDM1_TRxPathEnable, bDWord, pdmpriv->RegD04_MP);
+	}
+#endif
+
+	for(eRFPath = RF_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
+	{
+		pHalData->RfRegChnlVal[eRFPath] = PHY_QueryRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, RF_CHNLBW, bRFRegOffsetMask);
+		pdmpriv->RegRF3C[eRFPath] = PHY_QueryRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, RF_RXRF_A3, bRFRegOffsetMask);
+	}
+
+	//for(i = 0; i < 2; i++)
+	//	DBG_8192C("PHY_UpdateBBRFConfiguration8192D RF 0x18 = 0x%x interface index %d\n",pHalData->RfRegChnlVal[i],	pHalData->interfaceIndex);
+
+	//RT_TRACE(COMP_INIT,DBG_LOUD,("<==PHY_UpdateBBRFConfiguration8192D()\n"));
+
+}
+
+//
+//	Description:
+//		Read HW adapter information through EEPROM 93C46.
+//		Or For EFUSE 92S .And Get and Set 92D MACPHY mode and Band Type.
+//		MacPhyMode:DMDP,SMSP.
+//		BandType:2.4G,5G.
+//
+//	Assumption:
+//		1. Boot from EEPROM and CR9346 regiser has verified.
+//		2. PASSIVE_LEVEL (USB interface)
+//
+VOID PHY_ReadMacPhyMode92D(
+		IN PADAPTER			Adapter,
+		IN	BOOLEAN		AutoloadFail		
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8	MacPhyCrValue = 0;
+
+	if(AutoloadFail)
+	{
+		pHalData->MacPhyMode92D = SINGLEMAC_SINGLEPHY;
+		return;	
+	}
+
+	MacPhyCrValue = rtw_read8(Adapter, REG_MAC_PHY_CTRL_NORMAL);
+
+	DBG_8192C("PHY_ReadMacPhyMode92D():   MAC_PHY_CTRL Value %x \n",MacPhyCrValue);
+	
+	if((MacPhyCrValue&0x03) == 0x03)
+	{
+		pHalData->MacPhyMode92D = DUALMAC_DUALPHY;
+	}
+	else if((MacPhyCrValue&0x03) == 0x01)
+	{
+		pHalData->MacPhyMode92D = DUALMAC_SINGLEPHY;
+	}
+	else
+	{
+		pHalData->MacPhyMode92D = SINGLEMAC_SINGLEPHY;
+	}		
+}
+
+//
+//	Description:
+//		Read HW adapter information through EEPROM 93C46.
+//		Or For EFUSE 92S .And Get and Set 92D MACPHY mode and Band Type.
+//		MacPhyMode:DMDP,SMSP.
+//		BandType:2.4G,5G.
+//
+//	Assumption:
+//		1. Boot from EEPROM and CR9346 regiser has verified.
+//		2. PASSIVE_LEVEL (USB interface)
+//
+VOID PHY_ConfigMacPhyMode92D(
+		IN PADAPTER			Adapter
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8	offset = REG_MAC_PHY_CTRL_NORMAL;
+			
+	switch(pHalData->MacPhyMode92D){
+		case DUALMAC_DUALPHY:
+			DBG_8192C("MacPhyMode: DUALMAC_DUALPHY \n");
+			rtw_write8(Adapter, offset, 0xF3);
+			break;
+		case SINGLEMAC_SINGLEPHY:
+			DBG_8192C("MacPhyMode: SINGLEMAC_SINGLEPHY \n");
+			rtw_write8(Adapter, offset, 0xF4);
+			break;
+		case DUALMAC_SINGLEPHY:
+			DBG_8192C("MacPhyMode: DUALMAC_SINGLEPHY \n");
+			rtw_write8(Adapter, offset, 0xF1);
+			break;
+	}		
+}
+
+//
+//	Description:
+//		Read HW adapter information through EEPROM 93C46.
+//		Or For EFUSE 92S .And Get and Set 92D MACPHY mode and Band Type.
+//		MacPhyMode:DMDP,SMSP.
+//		BandType:2.4G,5G.
+//
+//	Assumption:
+//		1. Boot from EEPROM and CR9346 regiser has verified.
+//		2. PASSIVE_LEVEL (USB interface)
+//
+VOID PHY_ConfigMacPhyModeInfo92D(
+		IN PADAPTER			Adapter
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	PADAPTER		BuddyAdapter = Adapter->pbuddy_adapter;
+	HAL_DATA_TYPE	*pHalDataBuddyAdapter;
+#endif
+
+	switch(pHalData->MacPhyMode92D){
+		case DUALMAC_SINGLEPHY:
+			pHalData->rf_type = RF_2T2R;
+			pHalData->VersionID = (VERSION_8192D)(pHalData->VersionID | RF_TYPE_2T2R);
+			pHalData->BandSet92D = BAND_ON_BOTH;
+			pHalData->CurrentBandType92D = BAND_ON_2_4G;
+#ifdef CONFIG_DUALMAC_CONCURRENT
+//get bMasetOfDMSP and bSlaveOfDMSP sync with buddy adapter
+			ACQUIRE_GLOBAL_MUTEX(GlobalCounterForMutex);
+			if(BuddyAdapter != NULL)
+			{
+				pHalDataBuddyAdapter = GET_HAL_DATA(BuddyAdapter);
+				pHalData->bMasterOfDMSP = !pHalDataBuddyAdapter->bMasterOfDMSP;
+				pHalData->bSlaveOfDMSP = !pHalDataBuddyAdapter->bSlaveOfDMSP;
+				pHalData->CurrentBandType92D = pHalDataBuddyAdapter->CurrentBandType92D;				
+			}
+			else
+			{
+				if(pHalData->interfaceIndex == 0)
+				{
+					pHalData->bMasterOfDMSP = _TRUE;
+					pHalData->bSlaveOfDMSP = _FALSE;
+				}
+				else if(pHalData->interfaceIndex == 1)
+				{
+					pHalData->bMasterOfDMSP = _FALSE;
+					pHalData->bSlaveOfDMSP = _TRUE;
+				}
+			}
+			RELEASE_GLOBAL_MUTEX(GlobalCounterForMutex);
+#endif
+			break;
+
+		case SINGLEMAC_SINGLEPHY:
+			pHalData->rf_type = RF_2T2R;
+			pHalData->VersionID = (VERSION_8192D)(pHalData->VersionID | RF_TYPE_2T2R);
+			pHalData->BandSet92D = BAND_ON_BOTH;
+			pHalData->CurrentBandType92D = BAND_ON_2_4G;
+			pHalData->bMasterOfDMSP = _FALSE;
+			pHalData->bSlaveOfDMSP = _FALSE;
+			break;
+
+		case DUALMAC_DUALPHY:
+			pHalData->rf_type = RF_1T1R;
+			pHalData->VersionID = (VERSION_8192D)(pHalData->VersionID & RF_TYPE_1T1R);
+			if(pHalData->interfaceIndex == 1){
+				pHalData->BandSet92D = BAND_ON_5G;
+				pHalData->CurrentBandType92D = BAND_ON_5G;//Now we let MAC1 run on 5G band.
+			}
+			else{
+				pHalData->BandSet92D = BAND_ON_2_4G;
+				pHalData->CurrentBandType92D = BAND_ON_2_4G;//
+			}
+			pHalData->bMasterOfDMSP = _FALSE;
+			pHalData->bSlaveOfDMSP = _FALSE;
+			break;
+
+		default:
+			break;	
+	}
+
+	/*if(Adapter->bInHctTest&&(pHalData->MacPhyMode92D == SINGLEMAC_SINGLEPHY))
+	{
+		pHalData->CurrentBandType92D=BAND_ON_2_4G;
+		pHalData->BandSet92D = BAND_ON_2_4G;
+	}*/
+
+	if(pHalData->CurrentBandType92D == BAND_ON_2_4G)
+		pHalData->CurrentChannel = 1;
+	else
+		pHalData->CurrentChannel = 36;
+
+	Adapter->registrypriv.channel = pHalData->CurrentChannel;
+
+#if DBG
+	switch(pHalData->VersionID)
+	{
+		case VERSION_NORMAL_CHIP_92D_D_CUT_SINGLEPHY:
+			MSG_8192C("Chip Version ID: VERSION_NORMAL_CHIP_92D_D_CUT_SINGLEPHY.\n");
+			break;
+		case VERSION_NORMAL_CHIP_92D_D_CUT_DUALPHY:
+			MSG_8192C("Chip Version ID: VERSION_NORMAL_CHIP_92D_D_CUT_DUALPHY.\n");
+			break;
+		case VERSION_NORMAL_CHIP_92D_E_CUT_SINGLEPHY:
+			MSG_8192C("Chip Version ID: VERSION_NORMAL_CHIP_92D_E_CUT_SINGLEPHY.\n");
+			break;
+		case VERSION_NORMAL_CHIP_92D_E_CUT_DUALPHY:
+			MSG_8192C("Chip Version ID: VERSION_NORMAL_CHIP_92D_E_CUT_DUALPHY.\n");
+			break;
+		case VERSION_NORMAL_CHIP_92D_C_CUT_SINGLEPHY:
+			MSG_8192C("Chip Version ID: VERSION_NORMAL_CHIP_92D_C_CUT_SINGLEPHY.\n");
+			break;
+		case VERSION_NORMAL_CHIP_92D_C_CUT_DUALPHY:
+			MSG_8192C("Chip Version ID: VERSION_NORMAL_CHIP_92D_C_CUT_DUALPHY.\n");
+			break;
+		case VERSION_TEST_CHIP_92D_SINGLEPHY:
+			MSG_8192C("Chip Version ID: VERSION_TEST_CHIP_92D_SINGLEPHY.\n");
+			break;
+		case VERSION_TEST_CHIP_92D_DUALPHY:
+			MSG_8192C("Chip Version ID: VERSION_TEST_CHIP_92D_DUALPHY.\n");
+			break;	
+		default:
+			MSG_8192C("Chip Version ID: ???????????????.0x%04X\n",pHalData->VersionID);
+			break;
+	}
+#endif
+
+	switch(pHalData->BandSet92D)
+	{
+		case BAND_ON_2_4G:
+			Adapter->registrypriv.wireless_mode = WIRELESS_11BG_24N;
+			break;
+
+		case BAND_ON_5G:
+			Adapter->registrypriv.wireless_mode = WIRELESS_11A_5N;
+			break;
+
+		case BAND_ON_BOTH:
+			Adapter->registrypriv.wireless_mode = WIRELESS_11ABGN;
+			break;
+
+		default:
+			Adapter->registrypriv.wireless_mode = WIRELESS_11ABGN;
+			break;
+	}
+	DBG_8192C("%s(): wireless_mode = %x\n",__FUNCTION__,Adapter->registrypriv.wireless_mode);
+}
+
+//
+//	Description:
+//	set RX packet buffer and other setting acording to dual mac mode
+//
+//	Assumption:
+//		1. Boot from EEPROM and CR9346 regiser has verified.
+//		2. PASSIVE_LEVEL (USB interface)
+//
+VOID PHY_ConfigMacCoexist_RFPage92D(
+		IN PADAPTER			Adapter
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	switch(pHalData->MacPhyMode92D)
+	{
+		case DUALMAC_DUALPHY:
+			rtw_write8(Adapter,REG_DMC, 0x0);
+			rtw_write8(Adapter,REG_RX_PKT_LIMIT,0x08);
+			rtw_write16(Adapter,(REG_TRXFF_BNDY+2), 0x13ff);
+			break;
+		case DUALMAC_SINGLEPHY:
+			rtw_write8(Adapter,REG_DMC, 0xf8);
+			rtw_write8(Adapter,REG_RX_PKT_LIMIT,0x08);
+			rtw_write16(Adapter,(REG_TRXFF_BNDY+2), 0x13ff);
+			break;
+		case SINGLEMAC_SINGLEPHY:
+			rtw_write8(Adapter,REG_DMC, 0x0);
+			rtw_write8(Adapter,REG_RX_PKT_LIMIT,0x10);
+			rtw_write16(Adapter, (REG_TRXFF_BNDY + 2), 0x27FF);
+			break;
+		default:
+			break;
+	}		
+}
+
+VOID
+rtl8192d_PHY_InitRxSetting(
+	IN	PADAPTER Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+#if MP_DRIVER != 1
+	return;
+#endif
+
+	if(pHalData->interfaceIndex == 0)
+	{
+		rtw_write32(Adapter, REG_MACID, 0x87654321);
+		rtw_write32(Adapter, 0x0700, 0x87654321);
+	}
+	else
+	{
+		rtw_write32(Adapter, REG_MACID, 0x12345678);
+		rtw_write32(Adapter, 0x0700, 0x12345678); 	
+	}	
+}
+
+
+VOID
+rtl8192d_PHY_ResetIQKResult(
+	IN	PADAPTER Adapter
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8			i;
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("PHY_ResetIQKResult interface %d settings regs %d default regs %d\n", Adapter->interfaceIndex, sizeof(pHalData->IQKMatrixRegSetting)/sizeof(IQK_MATRIX_REGS_SETTING), IQK_Matrix_Settings_NUM));
+	//0xe94, 0xe9c, 0xea4, 0xeac, 0xeb4, 0xebc, 0xec4, 0xecc
+
+	for(i = 0; i < IQK_Matrix_Settings_NUM; i++)
+	{
+		{
+			pHalData->IQKMatrixRegSetting[i].Value[0][0] = 
+				pHalData->IQKMatrixRegSetting[i].Value[0][2] = 
+				pHalData->IQKMatrixRegSetting[i].Value[0][4] = 
+				pHalData->IQKMatrixRegSetting[i].Value[0][6] = 0x100;
+
+			pHalData->IQKMatrixRegSetting[i].Value[0][1] = 
+				pHalData->IQKMatrixRegSetting[i].Value[0][3] = 
+				pHalData->IQKMatrixRegSetting[i].Value[0][5] = 
+				pHalData->IQKMatrixRegSetting[i].Value[0][7] = 0x0;
+
+			pHalData->IQKMatrixRegSetting[i].bIQKDone = _FALSE;
+			
+		}
+	}
+}
+
+VOID rtl8192d_PHY_SetRFPathSwitch(
+	IN	PADAPTER	pAdapter,
+	IN	BOOLEAN		bMain
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+
+#if DISABLE_BB_RF
+	return ;
+#endif
+
+	if (IS_92D_SINGLEPHY(pHalData->VersionID))
+	{
+		phy_SetRFPathSwitch(pAdapter, bMain, _TRUE);
+	}
+	else{
+		// For 88C 1T1R
+		phy_SetRFPathSwitch(pAdapter, bMain, _FALSE);
+	}
+}
+
+VOID
+HalChangeCCKStatus8192D(
+	IN	PADAPTER	Adapter,
+	IN	BOOLEAN		bCCKDisable
+)
+{
+	//PADAPTER	BuddyAdapter = Adapter->BuddyAdapter;
+	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(Adapter);
+	u8	i;
+
+	//DBG_871X("MAC %d: =====> ChangeCCKStatus8192D \n",pHalData->interfaceIndex);
+
+	if(pHalData->BandSet92D != BAND_ON_BOTH)
+	{
+		//DBG_871X("ChangeCCKStatus8192D():  Skip \n");
+		return;
+	}
+	
+	if(bCCKDisable)
+	{
+		//if(ACTING_AS_AP(Adapter) ||ACTING_AS_AP(ADJUST_TO_ADAPTIVE_ADAPTER(Adapter, FALSE)) || (Adapter->MgntInfo.mIbss))
+		//	StopTxBeacon(Adapter);
+		rtw_write16(Adapter, REG_RL,0x0101);
+		for(i=0;i<30;i++)
+		{
+			if(rtw_read32(Adapter, 0x200) != rtw_read32(Adapter, 0x204))
+			{
+				DBG_871X("packet in tx packet buffer aaaaaaaaa 0x204 %x  \n", rtw_read32(Adapter, 0x204));
+				DBG_871X("packet in tx packet buffer aaaaaaa 0x200 %x  \n", rtw_read32(Adapter, 0x200));
+				rtw_udelay_os(1000);
+			}
+			else
+			{
+				//DBG_871X("no packet in tx packet buffer \n");
+				break;
+			}
+		}
+
+		/*if((BuddyAdapter != NULL) && BuddyAdapter->bHWInitReady && (pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY))
+		{
+			if(ACTING_AS_AP(BuddyAdapter) ||ACTING_AS_AP(ADJUST_TO_ADAPTIVE_ADAPTER(BuddyAdapter, FALSE)) || BuddyAdapter->MgntInfo.mIbss)
+				StopTxBeacon(BuddyAdapter);
+			PlatformEFIOWrite2Byte(BuddyAdapter, REG_RL,0x0101);
+			for(i=0;i<30;i++)
+			{
+				if(PlatformEFIORead4Byte(BuddyAdapter, 0x200) != PlatformEFIORead4Byte(BuddyAdapter, 0x204))
+				{
+					RT_TRACE(COMP_EASY_CONCURRENT,DBG_LOUD,("packet in tx packet buffer aaaaaaaaa 0x204 %x  \n", PlatformEFIORead4Byte(BuddyAdapter, 0x204)));
+					RT_TRACE(COMP_EASY_CONCURRENT,DBG_LOUD,("packet in tx packet buffer aaaaaaa 0x200 %x  \n", PlatformEFIORead4Byte(BuddyAdapter, 0x200)));
+					PlatformStallExecution(1000);
+				}
+				else
+				{
+					RT_TRACE(COMP_EASY_CONCURRENT,DBG_LOUD,("no packet in tx packet buffer \n"));
+					break;
+				}
+			}
+
+		}*/
+
+		PHY_SetBBReg1Byte(Adapter, rFPGA0_RFMOD, bOFDMEn|bCCKEn, 3);
+	}
+	else
+	{
+		u8	RetryLimit = 0x30;
+		//if(ACTING_AS_AP(Adapter) ||ACTING_AS_AP(ADJUST_TO_ADAPTIVE_ADAPTER(Adapter, FALSE)) || Adapter->MgntInfo.mIbss)
+		//	ResumeTxBeacon(Adapter);
+
+		rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT);
+
+		/*if((BuddyAdapter != NULL) && (pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY))
+		{
+			if(ACTING_AS_AP(BuddyAdapter) ||ACTING_AS_AP(ADJUST_TO_ADAPTIVE_ADAPTER(BuddyAdapter, FALSE)) || BuddyAdapter->MgntInfo.mIbss)
+				ResumeTxBeacon(BuddyAdapter);
+			
+			PlatformEFIOWrite2Byte(BuddyAdapter, REG_RL,
+					pHalData->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT | \
+					pHalData->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT);
+		}*/
+	}
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_rf6052.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_rf6052.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_rf6052.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_rf6052.c	2017-09-23 03:42:49.970675211 +0800
@@ -0,0 +1,1227 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+/******************************************************************************
+ * 
+ * 
+ * Module:	HalRf6052.c	( Source C File)
+ * 
+ * Note:	Provide RF 6052 series relative API.	 
+ *
+ * Function:	
+ * 		 
+ * Export:	
+ * 
+ * Abbrev:	
+ * 
+ * History:
+ * Data			Who		Remark
+ * 
+ * 09/25/2008	MHC		Create initial version.
+ * 11/05/2008 	MHC		Add API for tw power setting.
+ * 
+ * 	
+******************************************************************************/
+
+#define _RTL8192D_RF6052_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtw_byteorder.h>
+
+#include <hal_init.h>
+#include <rtl8192d_hal.h>
+
+/*---------------------------Define Local Constant---------------------------*/
+// Define local structure for debug!!!!!
+typedef struct RF_Shadow_Compare_Map {
+	// Shadow register value
+	u32		Value;
+	// Compare or not flag
+	u8		Compare;
+	// Record If it had ever modified unpredicted
+	u8		ErrorOrNot;
+	// Recorver Flag
+	u8		Recorver;
+	//
+	u8		Driver_Write;
+}RF_SHADOW_T;
+/*---------------------------Define Local Constant---------------------------*/
+
+
+/*------------------------Define global variable-----------------------------*/
+/*------------------------Define global variable-----------------------------*/
+
+
+/*------------------------Define local variable------------------------------*/
+// 2008/11/20 MH For Debug only, RF
+//static	RF_SHADOW_T	RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG] = {0};
+static	RF_SHADOW_T	RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG];
+/*------------------------Define local variable------------------------------*/
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	RF_ChangeTxPath
+ *
+ * Overview:	For RL6052, we must change some RF settign for 1T or 2T.
+ *
+ * Input:		u2Byte DataRate		// 0x80-8f, 0x90-9f
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 09/25/2008 	MHC		Create Version 0.
+ *						Firmwaer support the utility later.
+ *
+ *---------------------------------------------------------------------------*/
+void rtl8192d_RF_ChangeTxPath(	IN	PADAPTER	Adapter, 
+										IN	u16		DataRate)
+{
+// We do not support gain table change inACUT now !!!! Delete later !!!
+#if 0//(RTL92SE_FPGA_VERIFY == 0)
+	static	u1Byte	RF_Path_Type = 2;	// 1 = 1T 2= 2T			
+	static	u4Byte	tx_gain_tbl1[6] 
+			= {0x17f50, 0x11f40, 0x0cf30, 0x08720, 0x04310, 0x00100};
+	static	u4Byte	tx_gain_tbl2[6] 
+			= {0x15ea0, 0x10e90, 0x0c680, 0x08250, 0x04040, 0x00030};
+	u1Byte	i;
+	
+	if (RF_Path_Type == 2 && (DataRate&0xF) <= 0x7)
+	{
+		// Set TX SYNC power G2G3 loop filter
+		PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, 
+					RF_TXPA_G2, bRFRegOffsetMask, 0x0f000);
+		PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, 
+					RF_TXPA_G3, bRFRegOffsetMask, 0xeacf1);
+
+		// Change TX AGC gain table
+		for (i = 0; i < 6; i++)					
+			PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, 
+						RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl1[i]);
+
+		// Set PA to high value
+		PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, 
+					RF_TXPA_G2, bRFRegOffsetMask, 0x01e39);
+	}
+	else if (RF_Path_Type == 1 && (DataRate&0xF) >= 0x8)
+	{
+		// Set TX SYNC power G2G3 loop filter
+		PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, 
+					RF_TXPA_G2, bRFRegOffsetMask, 0x04440);
+		PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, 
+					RF_TXPA_G3, bRFRegOffsetMask, 0xea4f1);
+
+		// Change TX AGC gain table
+		for (i = 0; i < 6; i++)
+			PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, 
+						RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl2[i]);
+
+		// Set PA low gain
+		PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, 
+					RF_TXPA_G2, bRFRegOffsetMask, 0x01e19);
+	}
+#endif	
+	
+}	/* RF_ChangeTxPath */
+
+
+/*-----------------------------------------------------------------------------
+ * Function:    PHY_RF6052SetBandwidth()
+ *
+ * Overview:    This function is called by SetBWModeCallback8190Pci() only
+ *
+ * Input:       PADAPTER				Adapter
+ *			WIRELESS_BANDWIDTH_E	Bandwidth	//20M or 40M
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Note:		For RF type 0222D
+ *---------------------------------------------------------------------------*/
+VOID
+rtl8192d_PHY_RF6052SetBandwidth(
+	IN	PADAPTER				Adapter,
+	IN	HT_CHANNEL_WIDTH		Bandwidth)	//20M or 40M
+{	
+	u8			eRFPath;	
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	//RT_TRACE(COMP_MLME,DBG_LOUD,("====>PHY_RF6052SetBandwidth()Bandwidth:%d \n",Bandwidth));
+	switch(Bandwidth)
+	{
+		case HT_CHANNEL_WIDTH_20:
+			for(eRFPath=0;eRFPath<pHalData->NumTotalRFPath;eRFPath++)
+			{
+				pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffff3ff) | 0x0400);
+				//PHY_SetRFReg(Adapter, eRFPath, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]);
+				PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, RF_CHNLBW, BIT10|BIT11, 0x01);
+
+				//RT_TRACE(COMP_RF, DBG_LOUD, ("PHY_RF6052SetBandwidth 20M RF 0x18 = 0x%x interface index %d\n",pHalData->RfRegChnlVal[eRFPath],  Adapter->interfaceIndex));
+			}
+			break;
+
+		case HT_CHANNEL_WIDTH_40:
+			for(eRFPath=0;eRFPath<pHalData->NumTotalRFPath;eRFPath++)
+			{
+				pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffff3ff));
+				//PHY_SetRFReg(Adapter, eRFPath, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]);	
+				PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, RF_CHNLBW, BIT10|BIT11, 0x00);
+				//RT_TRACE(COMP_RF, DBG_LOUD, ("PHY_RF6052SetBandwidth 40M RF 0x18 = 0x%x interface index %d\n",pHalData->RfRegChnlVal[eRFPath],  Adapter->interfaceIndex));
+			}
+			break;
+
+		default:
+			//RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetRF8225Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth ));
+			break;
+	}
+	//RT_TRACE(COMP_MLME,DBG_LOUD,("<==== PHY_RF6052SetBandwidth()Bandwidth:%d \n",Bandwidth));
+}
+
+
+/*-----------------------------------------------------------------------------
+ * Function:	PHY_RF6052SetCckTxPower
+ *
+ * Overview:	
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/05/2008 	MHC		Simulate 8192series..
+ *
+ *---------------------------------------------------------------------------*/
+
+VOID
+rtl8192d_PHY_RF6052SetCckTxPower(
+	IN	PADAPTER		Adapter,
+	IN	u8*			pPowerlevel)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	struct mlme_ext_priv 	*pmlmeext = &Adapter->mlmeextpriv;
+	u32			TxAGC[2]={0, 0}, tmpval=0;
+	BOOLEAN		TurboScanOff = _FALSE;
+	u8			idx1, idx2;
+	u8*			ptr;
+	
+	if(pHalData->EEPROMRegulatory != 0)
+		TurboScanOff = _TRUE;
+
+	if(pmlmeext->sitesurvey_res.state == SCAN_PROCESS)
+	{
+		TxAGC[RF_PATH_A] = 0x3f3f3f3f;
+		TxAGC[RF_PATH_B] = 0x3f3f3f3f;
+
+		TurboScanOff =  _TRUE;//disable Turbo scan
+
+		if(TurboScanOff)
+		{
+			for(idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++)
+			{
+				TxAGC[idx1] = 
+					pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) |
+					(pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24);
+			}
+		}
+	}
+	else
+	{
+//vivi merge from 92c, pass win7 DTM item: performance_ext 
+// 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism.
+// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism.
+// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder.
+#if 0
+		if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
+		{	
+			TxAGC[RF_PATH_A] = 0x10101010;
+			TxAGC[RF_PATH_B] = 0x10101010;
+		}
+		else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
+		{	
+			TxAGC[RF_PATH_A] = 0x00000000;
+			TxAGC[RF_PATH_B] = 0x00000000;
+		}
+		else
+#endif
+		{
+			for(idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++)
+			{
+				TxAGC[idx1] = 
+					pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) |
+					(pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24);
+			}
+
+			if(pHalData->EEPROMRegulatory==0)
+			{
+				tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][6]) + 
+						(pHalData->MCSTxPowerLevelOriginalOffset[0][7]<<8);
+				TxAGC[RF_PATH_A] += tmpval;
+
+				tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][14]) + 
+						(pHalData->MCSTxPowerLevelOriginalOffset[0][15]<<24);
+				TxAGC[RF_PATH_B] += tmpval;
+			}
+		}
+	}
+
+	for(idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++)
+	{
+		ptr = (u8 *)(&(TxAGC[idx1]));
+		for(idx2=0; idx2<4; idx2++)
+		{
+			if(*ptr > RF6052_MAX_TX_PWR)
+				*ptr = RF6052_MAX_TX_PWR;
+			ptr++;
+		}
+	}
+
+	// rf-A cck tx power
+	tmpval = TxAGC[RF_PATH_A]&0xff;
+	PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval);
+	//RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 1M (rf-A) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_A_CCK1_Mcs32));
+	tmpval = TxAGC[RF_PATH_A]>>8;
+	PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval);
+	//RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 2~11M (rf-A) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_B_CCK11_A_CCK2_11));
+
+	// rf-B cck tx power
+	tmpval = TxAGC[RF_PATH_B]>>24;
+	PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, tmpval);
+	//RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 11M (rf-B) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_B_CCK11_A_CCK2_11));
+	tmpval = TxAGC[RF_PATH_B]&0x00ffffff;
+	PHY_SetBBReg(Adapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval);
+	//RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 1~5.5M (rf-B) = 0x%x (reg 0x%x)\n", 
+	//	tmpval, rTxAGC_B_CCK1_55_Mcs32));
+	
+}	/* PHY_RF6052SetCckTxPower */
+
+//
+// powerbase0 for OFDM rates
+// powerbase1 for HT MCS rates
+//
+static void getPowerBase(
+	IN	PADAPTER	Adapter,
+	IN	u8		*pPowerLevel,
+	IN	u8		Channel,
+	IN OUT u32	*OfdmBase,
+	IN OUT u32	*MCSBase
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u32	powerBase0, powerBase1;
+	u8	Legacy_pwrdiff=0;
+	s8	HT20_pwrdiff=0;
+	u8	i, powerlevel[2];
+
+	for(i=0; i<2; i++)
+	{
+		powerlevel[i] = pPowerLevel[i];
+		Legacy_pwrdiff = pHalData->TxPwrLegacyHtDiff[i][Channel-1];
+		powerBase0 = powerlevel[i] + Legacy_pwrdiff; 
+
+		powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0;
+		*(OfdmBase+i) = powerBase0;
+		//RTPRINT(FPHY, PHY_TXPWR, (" [OFDM power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(OfdmBase+i)));
+	}
+
+	for(i=0; i<2; i++)
+	{
+		//Check HT20 to HT40 diff
+		if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
+		{
+			HT20_pwrdiff = pHalData->TxPwrHt20Diff[i][Channel-1];
+			powerlevel[i] += HT20_pwrdiff;
+		}
+		powerBase1 = powerlevel[i];
+		powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1;
+		*(MCSBase+i) = powerBase1;
+		//RTPRINT(FPHY, PHY_TXPWR, (" [MCS power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(MCSBase+i)));
+	}
+}
+
+/*
+Decide the group value according to the PHY_REG_PG.txt with 2G band and 5G band.
+*/
+static u8 getChnlGroupByPG(u8 chnlindex)
+{
+	u8	group=0;
+	u8	channel_info[59] = {1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,100,102,104,106,108,110,112,114,116,118,120,122,124,126,128,130,132,134,136,138,140,149,151,153,155,157,159,161,163,165};
+
+	if (channel_info[chnlindex] <= 3)			// Cjanel 1-3
+		group = 0;
+	else if (channel_info[chnlindex] <= 9)		// Channel 4-9
+		group = 1;
+	else if(channel_info[chnlindex] <=14)				// Channel 10-14
+		group = 2;
+	else if(channel_info[chnlindex] <= 64)
+		group = 6;
+	else if(channel_info[chnlindex] <= 140)
+		group = 7;
+	else 
+		group = 8;
+	
+	return group;
+}
+
+static void getTxPowerWriteValByRegulatory(
+	IN		PADAPTER	Adapter,
+	IN		u8*			pPowerLevel,
+	IN		u8			Channel,
+	IN		u8			index,
+	IN		u32*		powerBase0,
+	IN		u32*		powerBase1,
+	OUT		u32*		pOutWriteVal
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u8	i, chnlGroup=0, pwr_diff_limit[4], customer_pwr_limit;
+	s8	pwr_diff=0;
+	u32	writeVal, customer_limit, rf;
+	
+	//
+	// Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate
+	//
+	for(rf=0; rf<2; rf++)
+	{
+		switch(pHalData->EEPROMRegulatory)
+		{
+			case 0:	// Realtek better performance
+					// increase power diff defined by Realtek for large power
+				chnlGroup = 0;
+				//RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%lx\n", 
+				//	chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]));
+				writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + 
+					((index<2)?powerBase0[rf]:powerBase1[rf]);
+				//RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal(%c) = 0x%lx\n", ((rf==0)?'A':'B'), writeVal));
+				break;
+			case 1:	// Realtek regulatory
+					// increase power diff defined by Realtek for regulatory
+					if(pHalData->pwrGroupCnt == 1)
+						chnlGroup = 0;
+					if(pHalData->pwrGroupCnt >= MAX_PG_GROUP)
+					{
+						chnlGroup = getChnlGroupByPG(Channel-1);
+
+						if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
+							chnlGroup++;
+						else	   // 40M BW
+							chnlGroup += 4;
+					}
+					//RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%lx\n", 
+					//chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]));
+					writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + 
+							((index<2)?powerBase0[rf]:powerBase1[rf]);
+					//RTPRINT(FPHY, PHY_TXPWR, ("Realtek regulatory, 20MHz, writeVal(%c) = 0x%lx\n", ((rf==0)?'A':'B'), writeVal));
+				
+				break;
+			case 2:	// Better regulatory
+					// don't increase any power diff
+				writeVal = ((index<2)?powerBase0[rf]:powerBase1[rf]);
+				//RTPRINT(FPHY, PHY_TXPWR, ("Better regulatory, writeVal(%c) = 0x%lx\n", ((rf==0)?'A':'B'), writeVal));
+				break;
+			case 3:	// Customer defined power diff.
+					// increase power diff defined by customer.
+				chnlGroup = 0;
+				//RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%lx\n", 
+				//	chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]));
+
+				//if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40)
+				//{
+					//RTPRINT(FPHY, PHY_TXPWR, ("customer's limit, 40MHz rf(%c) = 0x%x\n", 
+					//	((rf==0)?'A':'B'), pHalData->PwrGroupHT40[rf][Channel-1]));
+				//}
+				//else
+				//{
+					//RTPRINT(FPHY, PHY_TXPWR, ("customer's limit, 20MHz rf(%c) = 0x%x\n", 
+					//	((rf==0)?'A':'B'), pHalData->PwrGroupHT20[rf][Channel-1]));
+				//}
+
+				if(index < 2)
+					pwr_diff = pHalData->TxPwrLegacyHtDiff[rf][Channel-1];
+				else if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
+					pwr_diff = pHalData->TxPwrHt20Diff[rf][Channel-1];
+
+				//RTPRINT(FPHY, PHY_TXPWR, ("power diff rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), pwr_diff));
+
+				if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40)
+					customer_pwr_limit = pHalData->PwrGroupHT40[rf][Channel-1];
+				else
+					customer_pwr_limit = pHalData->PwrGroupHT20[rf][Channel-1];
+
+				//RTPRINT(FPHY, PHY_TXPWR, ("customer pwr limit  rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), customer_pwr_limit));
+
+				if(pwr_diff >= customer_pwr_limit)
+					pwr_diff = 0;
+					else
+					pwr_diff = customer_pwr_limit - pwr_diff;
+				
+				for (i=0; i<4; i++)
+				{
+					pwr_diff_limit[i] = (u8)((pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]&(0x7f<<(i*8)))>>(i*8));
+					
+					if(pwr_diff_limit[i] > pwr_diff)
+						pwr_diff_limit[i] = pwr_diff;
+				}
+				
+				customer_limit = (pwr_diff_limit[3]<<24) | (pwr_diff_limit[2]<<16) |
+								(pwr_diff_limit[1]<<8) | (pwr_diff_limit[0]);
+				//RTPRINT(FPHY, PHY_TXPWR, ("Customer's limit rf(%c) = 0x%lx\n", ((rf==0)?'A':'B'), customer_limit));
+
+				writeVal = customer_limit + ((index<2)?powerBase0[rf]:powerBase1[rf]);
+				//RTPRINT(FPHY, PHY_TXPWR, ("Customer, writeVal rf(%c)= 0x%lx\n", ((rf==0)?'A':'B'), writeVal));
+				break;
+			default:
+				chnlGroup = 0;
+				writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + 
+						((index<2)?powerBase0[rf]:powerBase1[rf]);
+				//RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal rf(%c) = 0x%lx\n", ((rf==0)?'A':'B'), writeVal));
+				break;
+		}
+
+		// 20100628 Joseph: High power mode for BT-Coexist mechanism.
+		// This mechanism is only applied when Driver-Highpower-Mechanism is OFF.
+		if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT1)
+		{
+			//RTPRINT(FBT, BT_TRACE, ("Tx Power (-6)\n"));
+			writeVal = writeVal - 0x06060606;
+		}
+		else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT2)
+		{
+			//RTPRINT(FBT, BT_TRACE, ("Tx Power (-0)\n"));
+			writeVal = writeVal ;		
+		}
+
+		//if(pMgntInfo->bDisableTXPowerByRate)
+		//{
+			// add for  OID_RT_11N_TX_POWER_BY_RATE ,disable tx powre change by rate                                  
+		//	writeVal = 0x2c2c2c2c;
+		//}
+		*(pOutWriteVal+rf) = writeVal;
+	}
+}
+
+static void writeOFDMPowerReg(
+	IN		PADAPTER	Adapter,
+	IN		u8			index,
+	IN 		u32			*pValue
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u16	RegOffset_A[6] = {	rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24, 
+							rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04, 
+							rTxAGC_A_Mcs11_Mcs08, rTxAGC_A_Mcs15_Mcs12};
+	u16	RegOffset_B[6] = {	rTxAGC_B_Rate18_06, rTxAGC_B_Rate54_24, 
+							rTxAGC_B_Mcs03_Mcs00, rTxAGC_B_Mcs07_Mcs04,
+							rTxAGC_B_Mcs11_Mcs08, rTxAGC_B_Mcs15_Mcs12};
+	u8	i, rf, pwr_val[4];
+	u32	writeVal;
+	u16	RegOffset;
+
+	for(rf=0; rf<2; rf++)
+	{
+		writeVal = pValue[rf];
+		for(i=0; i<4; i++)
+		{
+			pwr_val[i] = (u8)((writeVal & (0x7f<<(i*8)))>>(i*8));
+			if (pwr_val[i]  > RF6052_MAX_TX_PWR)
+				pwr_val[i]  = RF6052_MAX_TX_PWR;
+		}
+		writeVal = (pwr_val[3]<<24) | (pwr_val[2]<<16) |(pwr_val[1]<<8) |pwr_val[0];
+
+		if(rf == 0)
+			RegOffset = RegOffset_A[index];
+		else
+			RegOffset = RegOffset_B[index];
+		PHY_SetBBReg(Adapter, RegOffset, bMaskDWord, writeVal);
+		//RTPRINT(FPHY, PHY_TXPWR, ("Set 0x%x = %08x\n", RegOffset, writeVal));
+
+		// 201005115 Joseph: Set Tx Power diff for Tx power training mechanism.
+		if(((pHalData->rf_type == RF_2T2R) && 
+				(RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs15_Mcs12))||
+		     ((pHalData->rf_type != RF_2T2R) && 
+				(RegOffset == rTxAGC_A_Mcs07_Mcs04 || RegOffset == rTxAGC_B_Mcs07_Mcs04))	)
+		{
+			writeVal = pwr_val[3];
+			if(RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_A_Mcs07_Mcs04)
+				RegOffset = 0xc90;
+			if(RegOffset == rTxAGC_B_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs07_Mcs04)
+				RegOffset = 0xc98;
+			for(i=0; i<3; i++)
+			{
+				if(i!=2)
+					writeVal = (writeVal>8)?(writeVal-8):0;
+				else
+					writeVal = (writeVal>6)?(writeVal-6):0;
+				rtw_write8(Adapter, (u32)(RegOffset+i), (u8)writeVal);
+			}
+		}
+	}
+}
+/*-----------------------------------------------------------------------------
+ * Function:	PHY_RF6052SetOFDMTxPower
+ *
+ * Overview:	For legacy and HY OFDM, we must read EEPROM TX power index for 
+ *			different channel and read original value in TX power register area from
+ *			0xe00. We increase offset and original value to be correct tx pwr.
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/05/2008 	MHC		Simulate 8192 series method.
+ * 01/06/2009	MHC		1. Prevent Path B tx power overflow or underflow dure to
+ *						A/B pwr difference or legacy/HT pwr diff.
+ *						2. We concern with path B legacy/HT OFDM difference.
+ * 01/22/2009	MHC		Support new EPRO format from SD3.
+ *
+ *---------------------------------------------------------------------------*/
+VOID 
+rtl8192d_PHY_RF6052SetOFDMTxPower(
+	IN	PADAPTER	Adapter,
+	IN	u8*		pPowerLevel,
+	IN	u8		Channel)
+{
+	u32	writeVal[2], powerBase0[2], powerBase1[2];
+	u8	index = 0;
+
+	//DBG_871X("PHY_RF6052SetOFDMTxPower, channel(%d) \n", Channel);
+
+	getPowerBase(Adapter, pPowerLevel, Channel, &powerBase0[0], &powerBase1[0]);
+
+	for(index=0; index<6; index++)
+	{
+		getTxPowerWriteValByRegulatory(Adapter, pPowerLevel, Channel, index, 
+			&powerBase0[0], &powerBase1[0], &writeVal[0]);
+
+		writeOFDMPowerReg(Adapter, index, &writeVal[0]);
+	}
+}
+
+BOOLEAN
+rtl8192d_PHY_EnableAnotherPHY(
+	IN	PADAPTER		Adapter,	
+	IN	BOOLEAN			bMac0
+	)
+{
+	u8			u1bTmp;
+#ifdef CONFIG_PCI_HCI
+	u8			Direct = bMac0==_TRUE?BIT3|BIT2:BIT3;
+#endif //CONFIG_PCI_HCI
+	u8			MAC_REG = bMac0==_TRUE?REG_MAC1:REG_MAC0;
+	u8			MAC_ON_BIT = bMac0==_TRUE?MAC1_ON:MAC0_ON;
+	BOOLEAN		bResult = _TRUE;	//true: need to enable BB/RF power
+#ifdef CONFIG_USB_HCI
+	u32			MaskForPHYSet = 0;
+#endif
+
+	//RT_TRACE(COMP_RF, DBG_LOUD, ("===>PHY_EnableAnotherPHY\n"));
+
+	//MAC0 Need PHY1 load radio_b.txt . Driver use DBI to write.
+	u1bTmp = rtw_read8(Adapter, MAC_REG);
+
+	if (!(u1bTmp&MAC_ON_BIT))
+  	{
+		//RT_TRACE(COMP_INIT, DBG_LOUD, ("PHY_EnableAnotherPHY enable BB & RF\n"));
+	
+		// Enable BB and RF power
+#ifdef CONFIG_PCI_HCI
+		MpWritePCIDwordDBI8192D(Adapter, 
+			REG_SYS_ISO_CTRL, 
+			MpReadPCIDwordDBI8192D(Adapter, REG_SYS_ISO_CTRL, Direct)|BIT29|BIT16|BIT17,
+			Direct);
+#elif defined(CONFIG_USB_HCI)
+		if(bMac0)
+			MaskForPHYSet = MAC0_ACCESS_PHY1;
+		else
+			MaskForPHYSet = MAC1_ACCESS_PHY0;
+		rtw_write16(Adapter, REG_SYS_FUNC_EN|MaskForPHYSet, rtw_read16(Adapter, REG_SYS_FUNC_EN|MaskForPHYSet)&0xFFFC);
+		rtw_write16(Adapter, REG_SYS_FUNC_EN|MaskForPHYSet, rtw_read16(Adapter, REG_SYS_FUNC_EN|MaskForPHYSet)|BIT13|BIT0|BIT1);
+#endif
+	}
+	else
+	{			
+		// We think if MAC1 is ON,then radio_a.txt and radio_b.txt has been load.
+		bResult = _FALSE;
+	}
+
+	//RT_TRACE(COMP_RF, DBG_LOUD, ("<===PHY_EnableAnotherPHY\n"));
+
+	return bResult;
+
+}
+
+
+VOID
+rtl8192d_PHY_PowerDownAnotherPHY(
+	IN	PADAPTER		Adapter,	
+	IN	BOOLEAN			bMac0
+	)
+{
+	u8	u1bTmp;
+#ifdef CONFIG_PCI_HCI
+	u8	Direct = bMac0==_TRUE?BIT3|BIT2:BIT3;
+#endif //CONFIG_PCI_HCI
+	u8	MAC_REG = bMac0==_TRUE?REG_MAC1:REG_MAC0;
+	u8	MAC_ON_BIT = bMac0==_TRUE?MAC1_ON:MAC0_ON;
+#ifdef CONFIG_USB_HCI
+	u32	MaskforPhySet = 0;
+#endif
+
+	//RT_TRACE(COMP_RF, DBG_LOUD, ("====>PHY_PowerDownAnotherPHY\n"));
+
+	// check MAC0 enable or not again now, if enabled, not power down radio A.
+	u1bTmp = rtw_read8(Adapter, MAC_REG);
+
+	if (!(u1bTmp&MAC_ON_BIT))
+	{	
+		//RT_TRACE(COMP_INIT, DBG_LOUD, ("PHY_PowerDownAnotherPHY power down\n"));
+
+		// power down RF radio A according to YuNan's advice.
+#ifdef CONFIG_PCI_HCI
+		MpWritePCIDwordDBI8192D(Adapter, 
+					rFPGA0_XA_LSSIParameter, 
+					0x00000000,
+					Direct);
+#elif defined(CONFIG_USB_HCI)
+		if(bMac0)
+			MaskforPhySet = MAC0_ACCESS_PHY1;
+		else
+			MaskforPhySet = MAC1_ACCESS_PHY0;
+		  rtw_write32(Adapter, rFPGA0_XA_LSSIParameter|MaskforPhySet, 0x00000000);
+#endif
+	}
+
+	//RT_TRACE(COMP_RF, DBG_LOUD, ("<====PHY_PowerDownAnotherPHY\n"));	
+}
+
+static int
+phy_RF6052_Config_ParaFile(
+	IN	PADAPTER		Adapter
+	)
+{
+	u32	u4RegValue=0;
+	u8	eRFPath;		
+	BB_REGISTER_DEFINITION_T	*pPhyReg;	
+	int	rtStatus = _SUCCESS;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	u8	*pszRadioAFile = NULL, *pszRadioBFile = NULL;
+	static s8		sz92DRadioAFile[] = RTL8192D_PHY_RADIO_A;
+	static s8		sz92DRadioBFile[] = RTL8192D_PHY_RADIO_B;
+	static s8		sz92DRadioAintPAFile[] = RTL8192D_PHY_RADIO_A_intPA;
+	static s8		sz92DRadioBintPAFile[] = RTL8192D_PHY_RADIO_B_intPA;
+	BOOLEAN		bMac1NeedInitRadioAFirst = _FALSE,bMac0NeedInitRadioBFirst = _FALSE;	
+	BOOLEAN     	bNeedPowerDownRadioA = _FALSE,bNeedPowerDownRadioB = _FALSE;
+	BOOLEAN		bTrueBPath = _FALSE;//vivi added this for read parameter from header, 20100908
+	u32	MaskforPhySet = 0; //For 92d PHY cross access, 88c must set value 0.
+
+
+	pszRadioAFile = sz92DRadioAFile;
+	pszRadioBFile = sz92DRadioBFile;
+
+	if(pHalData->InternalPA5G[0])
+		pszRadioAFile = sz92DRadioAintPAFile;
+	if(pHalData->InternalPA5G[1])
+		pszRadioBFile = sz92DRadioBintPAFile;
+
+	//DMDP,MAC0 on G band,MAC1 on A band.
+	if(pHalData->MacPhyMode92D==DUALMAC_DUALPHY)
+	{
+		if(pHalData->CurrentBandType92D == BAND_ON_2_4G && pHalData->interfaceIndex == 0)
+		{
+			//MAC0 Need PHY1 load radio_b.txt . Driver use DBI to write.
+			if(rtl8192d_PHY_EnableAnotherPHY(Adapter, _TRUE))
+			{
+				pHalData->NumTotalRFPath = 2;
+				bMac0NeedInitRadioBFirst = _TRUE;					
+			}					
+			else
+			{         	
+				// We think if MAC1 is ON,then radio_a.txt and radio_b.txt has been load.
+				return rtStatus;
+			}
+		}
+		else if(pHalData->CurrentBandType92D == BAND_ON_5G && pHalData->interfaceIndex == 1)
+		{
+			//MAC1 Need PHY0 load radio_a.txt . Driver use DBI to write.
+			if(rtl8192d_PHY_EnableAnotherPHY(Adapter, _FALSE))
+			{		                                
+				pHalData->NumTotalRFPath = 2;
+				bMac1NeedInitRadioAFirst = _TRUE;
+			}
+			else
+			{         	
+				// We think if MAC0 is ON,then radio_a.txt and radio_b.txt has been load.
+				return rtStatus;
+			}
+		}
+		else if(pHalData->interfaceIndex == 1)
+		{					
+			// MAC0 enabled, only init radia B.				
+			pszRadioAFile = pszRadioBFile;
+			bTrueBPath = _TRUE;  //vivi added this for read parameter from header, 20100909
+		}
+	}
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> phy_RF6052_Config_ParaFile() Radio_A:%s\n",pszRadioAFile));
+	//RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> phy_RF6052_Config_ParaFile() Radio_B:%s\n",pszRadioBFile));
+
+	//3//-----------------------------------------------------------------
+	//3// <2> Initialize RF
+	//3//-----------------------------------------------------------------
+	for(eRFPath = RF_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
+	{
+		if (bMac1NeedInitRadioAFirst) //Mac1 use PHY0 write
+		{
+			if (eRFPath == RF_PATH_A)
+			{
+				bNeedPowerDownRadioA = _TRUE;
+				MaskforPhySet = MAC1_ACCESS_PHY0;
+			}             
+			else if (eRFPath == RF_PATH_B)
+			{
+				MaskforPhySet = 0;
+				bMac1NeedInitRadioAFirst = _FALSE;
+				eRFPath = RF_PATH_A;
+				bTrueBPath = _TRUE;
+				pszRadioAFile = pszRadioBFile;
+				pHalData->NumTotalRFPath = 1; 
+			}
+		}
+		else  if (bMac0NeedInitRadioBFirst) //Mac0 use PHY1 write
+		{
+			if (eRFPath == RF_PATH_A)
+			{
+				MaskforPhySet = 0;
+			}
+
+			if (eRFPath == RF_PATH_B)
+			{
+				MaskforPhySet = MAC0_ACCESS_PHY1;
+				bMac0NeedInitRadioBFirst = _FALSE;
+				bNeedPowerDownRadioB = _TRUE;
+				eRFPath = RF_PATH_A;
+				bTrueBPath = _TRUE;		
+				pszRadioAFile = pszRadioBFile;
+				pHalData->NumTotalRFPath = 1; 
+			}
+             	}
+
+		pPhyReg = &pHalData->PHYRegDef[eRFPath];
+		
+		/*----Store original RFENV control type----*/		
+		switch(eRFPath)
+		{
+			case RF_PATH_A:
+			case RF_PATH_C:
+				u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs|MaskforPhySet, bRFSI_RFENV);
+				break;
+			case RF_PATH_B :
+			case RF_PATH_D:
+				u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs|MaskforPhySet, bRFSI_RFENV<<16);
+				break;
+		}
+
+		/*----Set RF_ENV enable----*/		
+		PHY_SetBBReg(Adapter, pPhyReg->rfintfe|MaskforPhySet, bRFSI_RFENV<<16, 0x1);
+		rtw_udelay_os(1);//PlatformStallExecution(1);
+		
+		/*----Set RF_ENV output high----*/
+		PHY_SetBBReg(Adapter, pPhyReg->rfintfo|MaskforPhySet, bRFSI_RFENV, 0x1);
+		rtw_udelay_os(1);//PlatformStallExecution(1);
+
+		/* Set bit number of Address and Data for RF register */
+		PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2|MaskforPhySet, b3WireAddressLength, 0x0); 	// Set 1 to 4 bits for 8255
+		rtw_udelay_os(1);//PlatformStallExecution(1);
+
+		PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2|MaskforPhySet, b3WireDataLength, 0x0);	// Set 0 to 12  bits for 8255
+		rtw_udelay_os(1);//PlatformStallExecution(1);
+
+		/*----Initialize RF fom connfiguration file----*/
+		switch(eRFPath)
+		{
+			case RF_PATH_A:
+#ifdef CONFIG_EMBEDDED_FWIMG
+				//vivi added this for read parameter from header, 20100908
+				if(bTrueBPath == _TRUE)
+					rtStatus = rtl8192d_PHY_ConfigRFWithHeaderFile(Adapter,radiob_txt|MaskforPhySet, (RF_RADIO_PATH_E)eRFPath);
+				else
+					rtStatus = rtl8192d_PHY_ConfigRFWithHeaderFile(Adapter,radioa_txt|MaskforPhySet, (RF_RADIO_PATH_E)eRFPath);
+#else
+				rtStatus = rtl8192d_PHY_ConfigRFWithParaFile(Adapter, pszRadioAFile, (RF_RADIO_PATH_E)eRFPath);
+#endif
+				break;
+			case RF_PATH_B:
+#ifdef CONFIG_EMBEDDED_FWIMG
+			rtStatus = rtl8192d_PHY_ConfigRFWithHeaderFile(Adapter,radiob_txt, (RF_RADIO_PATH_E)eRFPath);
+#else			
+			rtStatus = rtl8192d_PHY_ConfigRFWithParaFile(Adapter, pszRadioBFile, (RF_RADIO_PATH_E)eRFPath);
+#endif
+				break;
+			case RF_PATH_C:
+				break;
+			case RF_PATH_D:
+				break;
+		}
+
+		/*----Restore RFENV control type----*/;
+		switch(eRFPath)
+		{
+			case RF_PATH_A:
+			case RF_PATH_C:
+				PHY_SetBBReg(Adapter, pPhyReg->rfintfs|MaskforPhySet, bRFSI_RFENV, u4RegValue);
+				break;
+			case RF_PATH_B :
+			case RF_PATH_D:
+				PHY_SetBBReg(Adapter, pPhyReg->rfintfs|MaskforPhySet, bRFSI_RFENV<<16, u4RegValue);
+				break;
+		}
+
+		if(rtStatus != _SUCCESS){
+			//RT_TRACE(COMP_FPGA, DBG_LOUD, ("phy_RF6052_Config_ParaFile():Radio[%d] Fail!!", eRFPath));
+			goto phy_RF6052_Config_ParaFile_Fail;
+		}
+
+	}
+
+	if (bNeedPowerDownRadioA)
+	{
+		// check MAC0 enable or not again now, if enabled, not power down radio A.
+		rtl8192d_PHY_PowerDownAnotherPHY(Adapter, _FALSE);
+	}
+	else  if (bNeedPowerDownRadioB)
+	{
+		// check MAC1 enable or not again now, if enabled, not power down radio B.
+		rtl8192d_PHY_PowerDownAnotherPHY(Adapter, _TRUE);
+	}
+
+	for(eRFPath = RF_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
+	{
+#if MP_DRIVER == 1
+		PHY_SetRFReg(Adapter, eRFPath, RF_RXRF_A3, bRFRegOffsetMask, 0xff456);
+#endif		
+		pdmpriv->RegRF3C[eRFPath] = PHY_QueryRFReg(Adapter, eRFPath, RF_RXRF_A3, bRFRegOffsetMask);
+	}
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("<---phy_RF6052_Config_ParaFile()\n"));
+	return rtStatus;
+	
+phy_RF6052_Config_ParaFile_Fail:	
+	return rtStatus;
+}
+
+int
+PHY_RF6052_Config8192D(
+	IN	PADAPTER		Adapter)
+{
+	HAL_DATA_TYPE				*pHalData = GET_HAL_DATA(Adapter);
+	int					rtStatus = _SUCCESS;	
+	
+	//
+	// Initialize general global value
+	//
+	// TODO: Extend RF_PATH_C and RF_PATH_D in the future
+	if(pHalData->rf_type == RF_1T1R)
+		pHalData->NumTotalRFPath = 1;
+	else
+		pHalData->NumTotalRFPath = 2;
+
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	if(pHalData->bSlaveOfDMSP)
+	{
+		DBG_871X(("PHY_RF6052_Config() skip configuration RF \n"));
+		return rtStatus;
+	}
+#endif
+
+	//
+	// Config BB and RF
+	//
+	rtStatus = phy_RF6052_Config_ParaFile(Adapter);
+
+	return rtStatus;
+		
+}
+
+
+//
+// ==> RF shadow Operation API Code Section!!!
+//
+/*-----------------------------------------------------------------------------
+ * Function:	PHY_RFShadowRead
+ *				PHY_RFShadowWrite
+ *				PHY_RFShadowCompare
+ *				PHY_RFShadowRecorver
+ *				PHY_RFShadowCompareAll
+ *				PHY_RFShadowRecorverAll
+ *				PHY_RFShadowCompareFlagSet
+ *				PHY_RFShadowRecorverFlagSet
+ *
+ * Overview:	When we set RF register, we must write shadow at first.
+ *			When we are running, we must compare shadow abd locate error addr.
+ *			Decide to recorver or not.
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/20/2008 	MHC		Create Version 0.
+ *
+ *---------------------------------------------------------------------------*/
+#ifndef PLATFORM_FREEBSD //amy, temp remove
+
+u32
+PHY_RFShadowRead(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset)
+{
+	return	RF_Shadow[eRFPath][Offset].Value;
+	
+}	/* PHY_RFShadowRead */
+
+
+VOID
+PHY_RFShadowWrite(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset,
+	IN	u32				Data)
+{
+	RF_Shadow[eRFPath][Offset].Value = (Data & bRFRegOffsetMask);
+	RF_Shadow[eRFPath][Offset].Driver_Write = _TRUE;
+	
+}	/* PHY_RFShadowWrite */
+#endif  //amy, temp remove
+
+BOOLEAN
+PHY_RFShadowCompare(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset);
+BOOLEAN
+PHY_RFShadowCompare(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset)
+{
+	u32	reg;
+	// Check if we need to check the register
+	if (RF_Shadow[eRFPath][Offset].Compare == _TRUE)
+	{
+		reg = PHY_QueryRFReg(Adapter, eRFPath, Offset, bRFRegOffsetMask);
+		// Compare shadow and real rf register for 20bits!!
+		if (RF_Shadow[eRFPath][Offset].Value != reg)
+		{
+			// Locate error position.
+			RF_Shadow[eRFPath][Offset].ErrorOrNot = _TRUE;
+			//RT_TRACE(COMP_INIT, DBG_LOUD, 
+			//("PHY_RFShadowCompare RF-%d Addr%02lx Err = %05lx\n", 
+			//eRFPath, Offset, reg));
+		}
+		return RF_Shadow[eRFPath][Offset].ErrorOrNot ;
+	}
+	return _FALSE;
+}	/* PHY_RFShadowCompare */
+VOID
+PHY_RFShadowRecorver(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset);
+VOID
+PHY_RFShadowRecorver(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset)
+{
+	// Check if the address is error
+	if (RF_Shadow[eRFPath][Offset].ErrorOrNot == _TRUE)
+	{
+		// Check if we need to recorver the register.
+		if (RF_Shadow[eRFPath][Offset].Recorver == _TRUE)
+		{
+			PHY_SetRFReg(Adapter, eRFPath, Offset, bRFRegOffsetMask, 
+							RF_Shadow[eRFPath][Offset].Value);
+			//RT_TRACE(COMP_INIT, DBG_LOUD, 
+			//("PHY_RFShadowRecorver RF-%d Addr%02lx=%05lx", 
+			//eRFPath, Offset, RF_Shadow[eRFPath][Offset].Value));
+		}
+	}
+	
+}	/* PHY_RFShadowRecorver */
+VOID
+PHY_RFShadowCompareAll(
+	IN	PADAPTER			Adapter);
+VOID
+PHY_RFShadowCompareAll(
+	IN	PADAPTER			Adapter)
+{
+	u32		eRFPath;
+	u32		Offset;
+
+	for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
+	{
+		for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
+		{
+			PHY_RFShadowCompare(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset);
+		}
+	}
+	
+}	/* PHY_RFShadowCompareAll */
+VOID
+PHY_RFShadowRecorverAll(
+	IN	PADAPTER			Adapter);
+VOID
+PHY_RFShadowRecorverAll(
+	IN	PADAPTER			Adapter)
+{
+	u32		eRFPath;
+	u32		Offset;
+
+	for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
+	{
+		for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
+		{
+			PHY_RFShadowRecorver(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset);
+		}
+	}
+	
+}	/* PHY_RFShadowRecorverAll */
+VOID
+PHY_RFShadowCompareFlagSet(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset,
+	IN	u8				Type);
+VOID
+PHY_RFShadowCompareFlagSet(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset,
+	IN	u8				Type)
+{
+	// Set True or False!!!
+	RF_Shadow[eRFPath][Offset].Compare = Type;
+		
+}	/* PHY_RFShadowCompareFlagSet */
+VOID
+PHY_RFShadowRecorverFlagSet(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset,
+	IN	u8				Type);
+VOID
+PHY_RFShadowRecorverFlagSet(
+	IN	PADAPTER			Adapter,
+	IN	RF_RADIO_PATH_E	eRFPath,
+	IN	u32				Offset,
+	IN	u8				Type)
+{
+	// Set True or False!!!
+	RF_Shadow[eRFPath][Offset].Recorver= Type;
+		
+}	/* PHY_RFShadowRecorverFlagSet */
+VOID
+PHY_RFShadowCompareFlagSetAll(
+	IN	PADAPTER			Adapter);
+VOID
+PHY_RFShadowCompareFlagSetAll(
+	IN	PADAPTER			Adapter)
+{
+	u32		eRFPath;
+	u32		Offset;
+
+	for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
+	{
+		for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
+		{
+			// 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!!
+			if (Offset != 0x26 && Offset != 0x27)
+				PHY_RFShadowCompareFlagSet(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset, _FALSE);
+			else
+				PHY_RFShadowCompareFlagSet(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset, _TRUE);
+		}
+	}
+		
+}	/* PHY_RFShadowCompareFlagSetAll */
+VOID
+PHY_RFShadowRecorverFlagSetAll(
+	IN	PADAPTER			Adapter);
+VOID
+PHY_RFShadowRecorverFlagSetAll(
+	IN	PADAPTER			Adapter)
+{
+	u32		eRFPath;
+	u32		Offset;
+
+	for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
+	{
+		for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
+		{
+			// 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!!
+			if (Offset != 0x26 && Offset != 0x27)
+				PHY_RFShadowRecorverFlagSet(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset, _FALSE);
+			else
+				PHY_RFShadowRecorverFlagSet(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset, _TRUE);
+		}
+	}
+		
+}	/* PHY_RFShadowCompareFlagSetAll */
+VOID
+PHY_RFShadowRefresh(
+	IN	PADAPTER			Adapter);
+VOID
+PHY_RFShadowRefresh(
+	IN	PADAPTER			Adapter)
+{
+	u32		eRFPath;
+	u32		Offset;
+
+	for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
+	{
+		for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
+		{
+			RF_Shadow[eRFPath][Offset].Value = 0;
+			RF_Shadow[eRFPath][Offset].Compare = _FALSE;
+			RF_Shadow[eRFPath][Offset].Recorver  = _FALSE;
+			RF_Shadow[eRFPath][Offset].ErrorOrNot = _FALSE;
+			RF_Shadow[eRFPath][Offset].Driver_Write = _FALSE;
+		}
+	}
+	
+}	/* PHY_RFShadowRead */
+
+/* End of HalRf6052.c */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_rxdesc.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_rxdesc.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_rxdesc.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/rtl8192d_rxdesc.c	2017-09-23 03:42:49.970675211 +0800
@@ -0,0 +1,732 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _RTL8192C_REDESC_C_
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtl8192d_hal.h>
+
+static u8 evm_db2percentage(s8 value)
+{
+	//
+	// -33dB~0dB to 0%~99%
+	//
+	s8 ret_val;
+
+	ret_val = value;
+	//ret_val /= 2;
+
+	RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("EVMdbToPercentage92S Value=%d / %x \n", ret_val, ret_val));
+
+	if(ret_val >= 0)
+		ret_val = 0;
+	if(ret_val <= -33)
+		ret_val = -33;
+
+	ret_val = 0 - ret_val;
+	ret_val*=3;
+
+	if(ret_val == 99)
+		ret_val = 100;
+
+	return(ret_val);
+}
+
+
+static s32 signal_scale_mapping(_adapter *padapter, s32 cur_sig )
+{
+	s32 ret_sig;
+
+#ifdef CONFIG_USB_HCI
+	if(cur_sig >= 51 && cur_sig <= 100)
+	{
+		ret_sig = 100;
+	}
+	else if(cur_sig >= 41 && cur_sig <= 50)
+	{
+		ret_sig = 80 + ((cur_sig - 40)*2);
+	}
+	else if(cur_sig >= 31 && cur_sig <= 40)
+	{
+		ret_sig = 66 + (cur_sig - 30);
+	}
+	else if(cur_sig >= 21 && cur_sig <= 30)
+	{
+		ret_sig = 54 + (cur_sig - 20);
+	}
+	else if(cur_sig >= 10 && cur_sig <= 20)
+	{
+		ret_sig = 42 + (((cur_sig - 10) * 2) / 3);
+	}
+	else if(cur_sig >= 5 && cur_sig <= 9)
+	{
+		ret_sig = 22 + (((cur_sig - 5) * 3) / 2);
+	}
+	else if(cur_sig >= 1 && cur_sig <= 4)
+	{
+		ret_sig = 6 + (((cur_sig - 1) * 3) / 2);
+	}
+	else
+	{
+		ret_sig = cur_sig;
+	}
+#else
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+
+	if(pHalData->CustomerID == RT_CID_819x_Lenovo)
+	{
+		return cur_sig;
+	}
+
+	// Step 1. Scale mapping.
+	if(cur_sig >= 61 && cur_sig <= 100)
+	{
+		ret_sig = 90 + ((cur_sig - 60) / 4);
+	}
+	else if(cur_sig >= 41 && cur_sig <= 60)
+	{
+		ret_sig = 78 + ((cur_sig - 40) / 2);
+	}
+	else if(cur_sig >= 31 && cur_sig <= 40)
+	{
+		ret_sig = 66 + (cur_sig - 30);
+	}
+	else if(cur_sig >= 21 && cur_sig <= 30)
+	{
+		ret_sig = 54 + (cur_sig - 20);
+	}
+	else if(cur_sig >= 5 && cur_sig <= 20)
+	{
+		ret_sig = 42 + (((cur_sig - 5) * 2) / 3);
+	}
+	else if(cur_sig == 4)
+	{
+		ret_sig = 36;
+	}
+	else if(cur_sig == 3)
+	{
+		ret_sig = 27;
+	}
+	else if(cur_sig == 2)
+	{
+		ret_sig = 18;
+	}
+	else if(cur_sig == 1)
+	{
+		ret_sig = 9;
+	}
+	else
+	{
+		ret_sig = cur_sig;
+	}
+#endif
+
+	return ret_sig;
+}
+
+
+static s32  translate2dbm(u8 signal_strength_idx)
+{
+	s32	signal_power; // in dBm.
+
+
+	// Translate to dBm (x=0.5y-95).
+	signal_power = (s32)((signal_strength_idx + 1) >> 1);
+	signal_power -= 95;
+
+	return signal_power;
+}
+
+
+static void query_rx_phy_status(union recv_frame *prframe, struct phy_stat *pphy_stat, BOOLEAN bPacketMatchBSSID)
+{
+	PHY_STS_OFDM_8192CD_T	*pOfdm_buf;
+	PHY_STS_CCK_8192CD_T	*pCck_buf;
+	u8	i, max_spatial_stream, evm;
+	s8	rx_pwr[4], rx_pwr_all=0;
+	u8	pwdb_all;
+	u32	rssi,total_rssi=0;
+	u8 	bcck_rate=0, rf_rx_num = 0, cck_highpwr = 0;
+	_adapter				*padapter = prframe->u.hdr.adapter;
+	struct rx_pkt_attrib	*pattrib = &prframe->u.hdr.attrib;
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
+	u8	tmp_rxsnr;
+	s8	rx_snrX;
+
+	bcck_rate=(pattrib->mcs_rate<=3? 1:0);
+
+	// Record it for next packet processing
+	pattrib->rx_mimo_signal_qual[0]= -1;
+	pattrib->rx_mimo_signal_qual[1]= -1;
+
+	if(bcck_rate) //CCK
+	{
+		u8 report;
+
+		// CCK Driver info Structure is not the same as OFDM packet.
+		pCck_buf = (PHY_STS_CCK_8192CD_T *)pphy_stat;
+		//Adapter->RxStats.NumQryPhyStatusCCK++;
+
+		//
+		// (1)Hardware does not provide RSSI for CCK
+		// (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
+		//
+
+		if(padapter->pwrctrlpriv.rf_pwrstate == rf_on)
+			cck_highpwr = (u8)pHalData->bCckHighPower;
+		else
+			cck_highpwr = _FALSE;
+
+		if(!cck_highpwr)
+		{
+			report = pCck_buf->cck_agc_rpt&0xc0;
+			report = report>>6;
+			switch(report)
+			{
+				// 03312009 modified by cosa
+				// Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion
+				// Note: different RF with the different RNA gain.
+				case 0x3:
+					rx_pwr_all = (-46) - (pCck_buf->cck_agc_rpt & 0x3e);
+					break;
+				case 0x2:
+					rx_pwr_all = (-26) - (pCck_buf->cck_agc_rpt & 0x3e);
+					break;
+				case 0x1:
+					rx_pwr_all = (-12) - (pCck_buf->cck_agc_rpt & 0x3e);
+					break;
+				case 0x0:
+					rx_pwr_all = (16) - (pCck_buf->cck_agc_rpt & 0x3e);
+					break;
+			}
+		}
+		else
+		{
+			report = pCck_buf->cck_agc_rpt & 0x60;
+			report = report>>5;
+			switch(report)
+			{
+				case 0x3:
+					rx_pwr_all = (-46) - ((pCck_buf->cck_agc_rpt & 0x1f)<<1) ;
+					break;
+				case 0x2:
+					rx_pwr_all = (-26)- ((pCck_buf->cck_agc_rpt & 0x1f)<<1);
+					break;
+				case 0x1:
+					rx_pwr_all = (-12) - ((pCck_buf->cck_agc_rpt & 0x1f)<<1) ;
+					break;
+				case 0x0:
+					rx_pwr_all = (16) - ((pCck_buf->cck_agc_rpt & 0x1f)<<1) ;
+					break;
+			}
+		}
+
+		pwdb_all= query_rx_pwr_percentage(rx_pwr_all);
+		//if(pHalData->CustomerID == RT_CID_819x_Lenovo)
+		{
+			// CCK gain is smaller than OFDM/MCS gain,
+			// so we add gain diff by experiences, the val is 6
+			pwdb_all+=6;
+			if(pwdb_all > 100)
+				pwdb_all = 100;
+			// modify the offset to make the same gain index with OFDM.
+			if(pwdb_all > 34 && pwdb_all <= 42)
+				pwdb_all -= 2;
+			else if(pwdb_all > 26 && pwdb_all <= 34)
+				pwdb_all -= 6;
+			else if(pwdb_all > 14 && pwdb_all <= 26)
+				pwdb_all -= 8;
+			else if(pwdb_all > 4 && pwdb_all <= 14)
+				pwdb_all -= 4;
+		}
+
+		pattrib->RxPWDBAll = pwdb_all;
+		pattrib->RecvSignalPower = rx_pwr_all;
+
+		//
+		// (3) Get Signal Quality (EVM)
+		//
+		if(bPacketMatchBSSID)
+		{
+			u8	sq;
+
+			if(pHalData->CustomerID == RT_CID_819x_Lenovo)
+			{
+				// mapping to 5 bars for vista signal strength
+				// signal quality in driver will be displayed to signal strength
+				// in vista.
+				if(pwdb_all >= 50)
+					sq = 100;
+				else if(pwdb_all >= 35 && pwdb_all < 50)
+					sq = 80;
+				else if(pwdb_all >= 22 && pwdb_all < 35)
+					sq = 60;
+				else if(pwdb_all >= 18 && pwdb_all < 22)
+					sq = 40;
+				else
+					sq = 20;
+			}
+			else
+			{
+				if(pwdb_all> 40)
+				{
+					sq = 100;
+				}
+				else
+				{
+					sq = pCck_buf->SQ_rpt;
+
+					if(pCck_buf->SQ_rpt > 64)
+						sq = 0;
+					else if (pCck_buf->SQ_rpt < 20)
+						sq= 100;
+					else
+						sq = ((64-sq) * 100) / 44;
+
+				}
+			}
+
+			pattrib->signal_qual=sq;
+			pattrib->rx_mimo_signal_qual[0]=sq;
+			pattrib->rx_mimo_signal_qual[1]=(-1);
+		}
+	}
+	else //OFDM/HT
+	{
+		pOfdm_buf = (PHY_STS_OFDM_8192CD_T *)pphy_stat;
+
+		//
+		// (1)Get RSSI for HT rate
+		//
+		for(i=0; i<pHalData->NumTotalRFPath; i++)
+		{
+			// 2008/01/30 MH we will judge RF RX path now.
+			if (pHalData->bRFPathRxEnable[i])
+				rf_rx_num++;
+			//else
+				//continue;
+
+			rx_pwr[i] = ((pOfdm_buf->trsw_gain_X[+i]&0x3F)*2) - 110;
+			padapter->recvpriv.RxRssi[i] = rx_pwr[i];
+
+			/* Translate DBM to percentage. */
+			rssi=query_rx_pwr_percentage(rx_pwr[i]);
+			total_rssi += rssi;
+
+			RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], rssi));
+
+			//Get Rx snr value in DB
+			tmp_rxsnr = pOfdm_buf->rxsnr_X[i];
+			rx_snrX = (s8)(tmp_rxsnr);
+			rx_snrX >>= 1;
+			padapter->recvpriv.RxSNRdB[i] =  (int)rx_snrX;
+
+			/* Record Signal Strength for next packet */
+			if(bPacketMatchBSSID)
+			{
+				//pRfd->Status.RxMIMOSignalStrength[i] =(u8) rssi;
+
+				//The following is for lenovo signal strength in vista
+				if(pHalData->CustomerID == RT_CID_819x_Lenovo)
+				{
+					u8	SQ;
+
+					if(i == 0)
+					{
+						// mapping to 5 bars for vista signal strength
+						// signal quality in driver will be displayed to signal strength
+						// in vista.
+						if(rssi >= 50)
+							SQ = 100;
+						else if(rssi >= 35 && rssi < 50)
+							SQ = 80;
+						else if(rssi >= 22 && rssi < 35)
+							SQ = 60;
+						else if(rssi >= 18 && rssi < 22)
+							SQ = 40;
+						else
+							SQ = 20;
+						//DbgPrint("ofdm/mcs RSSI=%d\n", RSSI);
+						pattrib->signal_qual = SQ;
+						//DbgPrint("ofdm/mcs SQ = %d\n", pRfd->Status.SignalQuality);
+					}
+				}
+			}
+		}
+
+
+		//
+		// (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
+		//
+		rx_pwr_all = (((pOfdm_buf->pwdb_all) >> 1 )& 0x7f) -106;
+		pwdb_all = query_rx_pwr_percentage(rx_pwr_all);
+
+		RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("PWDB_ALL=%d\n",	pwdb_all));
+
+		pattrib->RxPWDBAll = pwdb_all;	//for DIG/rate adaptive
+		pattrib->RecvSignalPower = rx_pwr_all;
+
+		//
+		// (3)EVM of HT rate
+		//
+		if(pHalData->CustomerID != RT_CID_819x_Lenovo)
+		{
+			if(pattrib->rxht &&  pattrib->mcs_rate >=20 && pattrib->mcs_rate<=27)
+				max_spatial_stream = 2; //both spatial stream make sense
+			else
+				max_spatial_stream = 1; //only spatial stream 1 makes sense
+
+			for(i=0; i<max_spatial_stream; i++)
+			{
+				// Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
+				// fill most significant bit to "zero" when doing shifting operation which may change a negative
+				// value to positive one, then the dbm value (which is supposed to be negative)  is not correct anymore.
+				evm = evm_db2percentage( (pOfdm_buf->rxevm_X[i] /*/ 2*/));//dbm
+
+				RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("RXRATE=%x RXEVM=%x EVM=%s%d\n",
+					pattrib->mcs_rate, pOfdm_buf->rxevm_X[i], "%",evm));
+
+				if(bPacketMatchBSSID)
+				{
+					if(i==0) // Fill value in RFD, Get the first spatial stream only
+					{
+						pattrib->signal_qual = (u8)(evm & 0xff);
+					}
+					pattrib->rx_mimo_signal_qual[i] = (u8)(evm & 0xff);
+				}
+			}
+
+		}
+
+		//
+		// 4. Record rx statistics for debug
+		//
+
+	}
+
+
+	//UI BSS List signal strength(in percentage), make it good looking, from 0~100.
+	//It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
+	if(bcck_rate)
+	{
+		pattrib->signal_strength=(u8)signal_scale_mapping(padapter, pwdb_all);
+	}
+	else
+	{
+		if (rf_rx_num != 0)
+		{
+			pattrib->signal_strength= (u8)(signal_scale_mapping(padapter, total_rssi/=rf_rx_num));
+		}
+	}
+
+}
+
+
+static void process_rssi(_adapter *padapter,union recv_frame *prframe)
+{
+	u32	last_rssi, tmp_val;
+	struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib;
+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
+	struct signal_stat * signal_stat = &padapter->recvpriv.signal_strength_data;
+#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
+
+	//if(pRfd->Status.bPacketToSelf || pRfd->Status.bPacketBeacon)
+	{
+	#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
+		if(signal_stat->update_req) {
+			signal_stat->total_num = 0;
+			signal_stat->total_val = 0;
+			signal_stat->update_req = 0;
+		}
+
+		signal_stat->total_num++;
+		signal_stat->total_val  += pattrib->signal_strength;
+		signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num;		
+	#else //CONFIG_NEW_SIGNAL_STAT_PROCESS
+	
+		//Adapter->RxStats.RssiCalculateCnt++;	//For antenna Test
+		if(padapter->recvpriv.signal_strength_data.total_num++ >= PHY_RSSI_SLID_WIN_MAX)
+		{
+			padapter->recvpriv.signal_strength_data.total_num = PHY_RSSI_SLID_WIN_MAX;
+			last_rssi = padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index];
+			padapter->recvpriv.signal_strength_data.total_val -= last_rssi;
+		}
+		padapter->recvpriv.signal_strength_data.total_val  +=pattrib->signal_strength;
+
+		padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index++] = pattrib->signal_strength;
+		if(padapter->recvpriv.signal_strength_data.index >= PHY_RSSI_SLID_WIN_MAX)
+			padapter->recvpriv.signal_strength_data.index = 0;
+
+
+		tmp_val = padapter->recvpriv.signal_strength_data.total_val/padapter->recvpriv.signal_strength_data.total_num;
+		padapter->recvpriv.signal_strength= tmp_val;
+		padapter->recvpriv.rssi=(s8)translate2dbm((u8)tmp_val);
+
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("UI RSSI = %d, ui_rssi.TotalVal = %d, ui_rssi.TotalNum = %d\n", tmp_val, padapter->recvpriv.signal_strength_data.total_val,padapter->recvpriv.signal_strength_data.total_num));
+	#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
+	}
+
+}// Process_UI_RSSI_8192S
+
+
+static void process_PWDB(_adapter *padapter, union recv_frame *prframe)
+{
+	int	UndecoratedSmoothedPWDB;
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
+	struct dm_priv		*pdmpriv = &pHalData->dmpriv;
+	struct rx_pkt_attrib	*pattrib= &prframe->u.hdr.attrib;
+	struct sta_info		*psta = prframe->u.hdr.psta;
+
+	if(psta)
+	{
+		UndecoratedSmoothedPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
+	}
+	else
+	{
+		UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB;
+	}
+
+	//if(pRfd->Status.bPacketToSelf || pRfd->Status.bPacketBeacon)
+	{
+		if(UndecoratedSmoothedPWDB < 0) // initialize
+		{
+			UndecoratedSmoothedPWDB = pattrib->RxPWDBAll;
+		}
+
+		if(pattrib->RxPWDBAll > (u32)UndecoratedSmoothedPWDB)
+		{
+			UndecoratedSmoothedPWDB =
+					( ((UndecoratedSmoothedPWDB)*(Rx_Smooth_Factor-1)) +
+					(pattrib->RxPWDBAll)) /(Rx_Smooth_Factor);
+
+			UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB + 1;
+		}
+		else
+		{
+			UndecoratedSmoothedPWDB =
+					( ((UndecoratedSmoothedPWDB)*(Rx_Smooth_Factor-1)) +
+					(pattrib->RxPWDBAll)) /(Rx_Smooth_Factor);
+		}
+
+		if(psta)
+		{
+			psta->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
+			pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
+		}
+		else
+		{
+			pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
+		}
+
+		//UpdateRxSignalStatistics8192C(Adapter, pRfd);
+	}
+}
+
+
+static void process_link_qual(_adapter *padapter,union recv_frame *prframe)
+{
+	u32	last_evm=0,  tmpVal;
+ 	struct rx_pkt_attrib *pattrib;
+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
+	struct signal_stat * signal_stat;
+#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
+
+	if(prframe == NULL || padapter==NULL){
+		return;
+	}
+
+	pattrib = &prframe->u.hdr.attrib;
+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
+	signal_stat = &padapter->recvpriv.signal_qual_data;
+#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
+
+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
+	if(signal_stat->update_req) {
+		signal_stat->total_num = 0;
+		signal_stat->total_val = 0;
+		signal_stat->update_req = 0;
+	}
+
+	signal_stat->total_num++;
+	signal_stat->total_val  += pattrib->signal_qual;
+	signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num;
+
+#else //CONFIG_NEW_SIGNAL_STAT_PROCESS
+	if(pattrib->signal_qual != 0)
+	{
+			//
+			// 1. Record the general EVM to the sliding window.
+			//
+			if(padapter->recvpriv.signal_qual_data.total_num++ >= PHY_LINKQUALITY_SLID_WIN_MAX)
+			{
+				padapter->recvpriv.signal_qual_data.total_num = PHY_LINKQUALITY_SLID_WIN_MAX;
+				last_evm = padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index];
+				padapter->recvpriv.signal_qual_data.total_val -= last_evm;
+			}
+			padapter->recvpriv.signal_qual_data.total_val += pattrib->signal_qual;
+
+			padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index++] = pattrib->signal_qual;
+			if(padapter->recvpriv.signal_qual_data.index >= PHY_LINKQUALITY_SLID_WIN_MAX)
+				padapter->recvpriv.signal_qual_data.index = 0;
+
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("Total SQ=%d  pattrib->signal_qual= %d\n", padapter->recvpriv.signal_qual_data.total_val, pattrib->signal_qual));
+
+			// <1> Showed on UI for user, in percentage.
+			tmpVal = padapter->recvpriv.signal_qual_data.total_val/padapter->recvpriv.signal_qual_data.total_num;
+			padapter->recvpriv.signal_qual=(u8)tmpVal;
+	}
+	else
+	{
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" pattrib->signal_qual =%d\n", pattrib->signal_qual));
+	}
+#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
+
+}// Process_UiLinkQuality8192S
+
+
+static void process_phy_info(_adapter *padapter, union recv_frame *prframe)
+{
+	union recv_frame *precvframe = (union recv_frame *)prframe;
+
+	//
+	// Check RSSI
+	//
+	process_rssi(padapter, precvframe);
+	//
+	// Check PWDB.
+	//
+	process_PWDB(padapter, precvframe); 
+	//
+	// Check EVM
+	//
+	process_link_qual(padapter,  precvframe);
+}
+
+void rtl8192d_translate_rx_signal_stuff(union recv_frame *precvframe, struct phy_stat *pphy_info)
+{
+	struct rx_pkt_attrib	*pattrib = &precvframe->u.hdr.attrib;
+	_adapter				*padapter = precvframe->u.hdr.adapter;
+	u8	bPacketMatchBSSID =_FALSE;
+	u8	bPacketToSelf = _FALSE;
+	u8	bPacketBeacon = _FALSE;
+
+	if((pattrib->physt) && (pphy_info != NULL))
+	{
+		bPacketMatchBSSID = ((!IsFrameTypeCtrl(precvframe->u.hdr.rx_data)) && !(pattrib->icv_err) && !(pattrib->crc_err) &&
+			_rtw_memcmp(get_hdr_bssid(precvframe->u.hdr.rx_data), get_my_bssid(&padapter->mlmeextpriv.mlmext_info.network), ETH_ALEN));
+			
+
+		bPacketToSelf = bPacketMatchBSSID &&  (_rtw_memcmp(get_da(precvframe->u.hdr.rx_data), myid(&padapter->eeprompriv), ETH_ALEN));
+
+		bPacketBeacon =bPacketMatchBSSID && (GetFrameSubType(precvframe->u.hdr.rx_data) ==  WIFI_BEACON);
+
+		query_rx_phy_status(precvframe, pphy_info, bPacketMatchBSSID);
+
+		precvframe->u.hdr.psta = NULL;
+		if(bPacketMatchBSSID && check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE)
+		{
+			u8 *sa;
+			struct sta_info *psta=NULL;
+			struct sta_priv *pstapriv = &padapter->stapriv;
+			
+			sa = get_sa(precvframe->u.hdr.rx_data);
+
+			psta = rtw_get_stainfo(pstapriv, sa);
+			if(psta)
+			{
+				precvframe->u.hdr.psta = psta;
+				process_phy_info(padapter, precvframe);
+			}
+		}
+		else if(bPacketToSelf || bPacketBeacon)
+		{
+			if(check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE)
+			{
+				u8 *sa;
+				struct sta_info *psta=NULL;
+				struct sta_priv *pstapriv = &padapter->stapriv;
+			
+				sa = get_sa(precvframe->u.hdr.rx_data);
+
+				psta = rtw_get_stainfo(pstapriv, sa);
+				if(psta)
+				{
+					precvframe->u.hdr.psta = psta;
+				}				
+			}
+					
+			process_phy_info(padapter, precvframe);
+		}
+	}
+}
+
+void rtl8192d_query_rx_desc_status(union recv_frame *precvframe, struct recv_stat *pdesc)
+{
+	struct rx_pkt_attrib	*pattrib = &precvframe->u.hdr.attrib;
+
+	//Offset 0
+	pattrib->physt = (u8)((le32_to_cpu(pdesc->rxdw0) >> 26) & 0x1);
+	pattrib->pkt_len =  (u16)(le32_to_cpu(pdesc->rxdw0)&0x00003fff);
+	pattrib->drvinfo_sz = (u8)((le32_to_cpu(pdesc->rxdw0) >> 16) & 0xf) * 8;//uint 2^3 = 8 bytes
+
+	pattrib->shift_sz = (u8)((le32_to_cpu(pdesc->rxdw0) >> 24) & 0x3);
+
+	pattrib->crc_err = (u8)((le32_to_cpu(pdesc->rxdw0) >> 14) & 0x1);
+	pattrib->icv_err = (u8)((le32_to_cpu(pdesc->rxdw0) >> 15) & 0x1);
+	pattrib->qos = (u8)(( le32_to_cpu( pdesc->rxdw0 ) >> 23) & 0x1);// Qos data, wireless lan header length is 26
+	pattrib->bdecrypted = (le32_to_cpu(pdesc->rxdw0) & BIT(27))? 0:1;
+
+	//Offset 4
+	pattrib->mfrag = (u8)((le32_to_cpu(pdesc->rxdw1) >> 27) & 0x1);//more fragment bit
+
+	//Offset 8
+	pattrib->frag_num = (u8)((le32_to_cpu(pdesc->rxdw2) >> 12) & 0xf);//fragmentation number
+
+	//Offset 12
+#ifdef CONFIG_TCP_CSUM_OFFLOAD_RX
+	if ( le32_to_cpu(pdesc->rxdw3) & BIT(13)){
+		pattrib->tcpchk_valid = 1; // valid
+		if ( le32_to_cpu(pdesc->rxdw3) & BIT(11) ) {
+			pattrib->tcp_chkrpt = 1; // correct
+			//DBG_8192C("tcp csum ok\n");
+		}
+		else
+			pattrib->tcp_chkrpt = 0; // incorrect
+
+		if ( le32_to_cpu(pdesc->rxdw3) & BIT(12) )
+			pattrib->ip_chkrpt = 1; // correct
+		else
+			pattrib->ip_chkrpt = 0; // incorrect
+	}
+	else {
+		pattrib->tcpchk_valid = 0; // invalid
+	}
+#endif
+
+	pattrib->mcs_rate=(u8)((le32_to_cpu(pdesc->rxdw3))&0x3f);
+	pattrib->rxht=(u8)((le32_to_cpu(pdesc->rxdw3) >>6)&0x1);
+
+	//Offset 16
+	//Offset 20
+
+}
+
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/Hal8192DUHWImg.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/Hal8192DUHWImg.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/Hal8192DUHWImg.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/Hal8192DUHWImg.c	2017-09-23 03:42:49.974675199 +0800
@@ -0,0 +1,3733 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+/*Created on  2011/11/11,  8: 8*/
+
+#include <Hal8192DUHWImg.h>
+
+const u8 Rtl8192DUFwImgArray[Rtl8192DUImgArrayLength] = {
+0xd3,0x92,0x02,0x00,0x19,0x00,0x00,0x00,0x11,0x03,0x14,0x15,0x6e,0x7d,0x00,0x00,
+0x34,0x40,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x02,0xa6,0xfe,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x02,0xb6,0x28,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x02,0x95,0x5f,0x00,0x00,0x00,0x00,0x00,0x02,0xb4,0xea,0x00,0x00,
+0x00,0x00,0x00,0x02,0xb5,0x2a,0x00,0x00,0x00,0x00,0x00,0x02,0xb5,0x6a,0x00,0x00,
+0x05,0x04,0x03,0x02,0x00,0x03,0x06,0x05,0x04,0x03,0x00,0x04,0x06,0x05,0x04,0x02,
+0x00,0x04,0x08,0x07,0x06,0x04,0x00,0x06,0x0a,0x09,0x08,0x06,0x00,0x08,0x0a,0x09,
+0x08,0x04,0x00,0x08,0x0a,0x09,0x08,0x02,0x00,0x08,0x0a,0x09,0x08,0x00,0x00,0x08,
+0x12,0x11,0x10,0x08,0x00,0x10,0x1a,0x19,0x18,0x10,0x00,0x18,0x22,0x21,0x20,0x18,
+0x00,0x20,0x22,0x21,0x20,0x10,0x00,0x20,0x22,0x21,0x20,0x08,0x00,0x20,0x22,0x21,
+0x1c,0x08,0x00,0x20,0x22,0x21,0x14,0x08,0x00,0x20,0x22,0x20,0x18,0x08,0x00,0x20,
+0x31,0x30,0x20,0x10,0x00,0x30,0x31,0x30,0x18,0x00,0x00,0x30,0x31,0x2f,0x10,0x10,
+0x00,0x30,0x31,0x2c,0x10,0x10,0x00,0x30,0x31,0x28,0x10,0x00,0x00,0x30,0x31,0x20,
+0x10,0x00,0x00,0x30,0x31,0x10,0x10,0x00,0x00,0x30,0x04,0x04,0x04,0x05,0x04,0x04,
+0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04,
+0x05,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x05,0x05,0x05,0x05,0x06,0x07,0x0a,0x0b,
+0x0d,0x10,0x04,0x05,0x05,0x06,0x06,0x09,0x0c,0x11,0x08,0x08,0x09,0x09,0x0a,0x0c,
+0x10,0x11,0x04,0x04,0x04,0x05,0x04,0x04,0x05,0x07,0x07,0x07,0x08,0x0a,0x04,0x04,
+0x04,0x04,0x06,0x0a,0x0c,0x0d,0x05,0x05,0x07,0x07,0x08,0x0b,0x0e,0x0f,0x04,0x04,
+0x04,0x05,0x07,0x07,0x09,0x09,0x0c,0x0e,0x10,0x12,0x04,0x04,0x05,0x05,0x06,0x0a,
+0x11,0x13,0x09,0x09,0x09,0x09,0x0c,0x0e,0x11,0x13,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x24,0x26,0x2a,0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a,0x00,0x00,
+0x00,0x1f,0x23,0x28,0x2a,0x2c,0x00,0x04,0x00,0x04,0x00,0x08,0x00,0x10,0x00,0x18,
+0x00,0x24,0x00,0x30,0x00,0x48,0x00,0x60,0x00,0x90,0x00,0xc0,0x00,0xd8,0x00,0x50,
+0x00,0x78,0x00,0xa0,0x00,0xc8,0x01,0x40,0x01,0x90,0x01,0xe0,0x02,0x30,0x01,0x2c,
+0x01,0x40,0x01,0xe0,0x02,0xd0,0x03,0xe8,0x04,0xb0,0x06,0x40,0x07,0xd0,0x00,0x02,
+0x00,0x02,0x00,0x04,0x00,0x08,0x00,0x0c,0x00,0x12,0x00,0x18,0x00,0x24,0x00,0x30,
+0x00,0x48,0x00,0x60,0x00,0x6c,0x00,0x28,0x00,0x3c,0x00,0x50,0x00,0x64,0x00,0xa0,
+0x00,0xc8,0x00,0xf0,0x01,0x18,0x00,0x64,0x00,0xa0,0x00,0xf0,0x01,0x68,0x01,0xf4,
+0x02,0x58,0x03,0x20,0x03,0xe8,0x02,0x02,0x02,0x02,0x02,0x02,0x03,0x03,0x04,0x04,
+0x05,0x07,0x04,0x04,0x07,0x0a,0x0a,0x0c,0x0c,0x12,0x05,0x07,0x07,0x08,0x0b,0x12,
+0x24,0x3c,0x01,0x01,0x01,0x01,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x01,0x02,
+0x03,0x04,0x05,0x06,0x07,0x08,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x22,0x1f,
+0x1e,0x18,0x10,0x20,0xf0,0x15,0x0f,0x8f,0xf0,0x10,0x0f,0x8f,0xf0,0x05,0x0f,0x8f,
+0xf0,0x00,0x0f,0x8f,0x0f,0xf5,0x00,0x00,0x0f,0xf0,0x00,0x00,0x00,0x0d,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x90,0x8f,0xbf,0xef,0xf0,0x90,0x00,0x02,0x12,0x87,0xd5,0x90,0x90,0x79,0xf0,0x90,
+0x00,0x01,0x12,0x87,0xd5,0x25,0xe0,0x25,0xe0,0x90,0x90,0x77,0xf0,0x12,0x34,0x05,
+0x25,0xe0,0x25,0xe0,0x90,0x90,0x7d,0xf0,0x90,0x8f,0xbf,0xe0,0xff,0x25,0xe0,0x24,
+0x22,0xf8,0xe6,0xfc,0x08,0xe6,0xfd,0x24,0x60,0xf5,0x82,0x74,0x05,0x3c,0xf5,0x83,
+0xe0,0x90,0x90,0x84,0xf0,0x74,0x61,0x2d,0xf5,0x82,0x74,0x05,0x3c,0xf5,0x83,0xe0,
+0x90,0x90,0x85,0xf0,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0xff,0x24,
+0x62,0xf5,0x82,0x74,0x05,0x3e,0xf5,0x83,0xe0,0x90,0x90,0x86,0xf0,0x74,0x63,0x2f,
+0xf5,0x82,0x74,0x05,0x3e,0xf5,0x83,0xe0,0x90,0x90,0x87,0xf0,0xa2,0xaf,0xe4,0x33,
+0x90,0x8f,0xc0,0xf0,0xc2,0xaf,0x90,0x8f,0xbf,0xe0,0xff,0x90,0x90,0x77,0xe0,0xfd,
+0x12,0xa8,0x03,0x90,0x8f,0xc0,0xe0,0x24,0xff,0x92,0xaf,0x90,0x90,0x79,0xe0,0x70,
+0x03,0x02,0x44,0x57,0x90,0x90,0x77,0xe0,0x70,0x03,0x02,0x44,0x57,0x90,0x90,0x7d,
+0xe0,0x70,0x03,0x02,0x44,0x57,0xa2,0xaf,0xe4,0x33,0x90,0x8f,0xc0,0xf0,0xc2,0xaf,
+0x90,0x90,0x88,0x74,0x01,0xf0,0x90,0x8f,0xc0,0xe0,0x24,0xff,0x92,0xaf,0x90,0x00,
+0x45,0xe0,0x54,0xfe,0xfd,0x7f,0x45,0x12,0xba,0xeb,0x90,0x00,0x46,0xe0,0x44,0x01,
+0xfd,0x7f,0x46,0x12,0xba,0xeb,0x90,0x90,0x74,0xe0,0x60,0x10,0x90,0x90,0x78,0xe0,
+0xfb,0x7d,0x83,0x7c,0x08,0xe4,0xff,0x12,0xbb,0x8e,0x80,0x19,0x90,0x8f,0xbf,0xe0,
+0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x22,0xf5,0x82,0x74,0x05,0x3e,
+0xf5,0x83,0x74,0x7f,0xf0,0x90,0x00,0x45,0xe0,0x54,0xef,0xfd,0x7f,0x45,0x12,0xba,
+0xeb,0x90,0x8f,0xbf,0xe0,0xff,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,
+0x87,0xf5,0x82,0x74,0x05,0x3c,0xf5,0x83,0xe0,0x64,0x80,0xf0,0x90,0x90,0x84,0xe0,
+0xfe,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x84,0xf5,0x82,0x74,
+0x05,0x3c,0xf5,0x83,0xee,0xf0,0x90,0x90,0x85,0xe0,0xff,0x90,0x8f,0xbf,0xe0,0xfe,
+0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x85,0xf5,0x82,0x74,0x05,0x3c,
+0xf5,0x83,0xef,0xf0,0x90,0x90,0x86,0xe0,0xff,0xee,0x25,0xe0,0x24,0x22,0xf8,0xe6,
+0xfc,0x08,0xe6,0x24,0x86,0xf5,0x82,0x74,0x05,0x3c,0xf5,0x83,0xef,0xf0,0x90,0x90,
+0x87,0xe0,0xff,0xee,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x87,0xf5,
+0x82,0x74,0x05,0x3c,0xf5,0x83,0xef,0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x8f,0xc0,0xf0,
+0xc2,0xaf,0xee,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x3c,0xf5,0x82,
+0x74,0x01,0x3e,0xf5,0x83,0xe0,0x44,0x20,0xf0,0x90,0x8f,0xbf,0xe0,0xff,0x7b,0x20,
+0xe4,0xfd,0x12,0xb0,0xc3,0x80,0x4b,0x90,0x90,0x79,0xe0,0x70,0x4d,0x90,0x90,0x88,
+0xf0,0x90,0x00,0x45,0xe0,0x54,0xfe,0xfd,0x7f,0x45,0x12,0xba,0xeb,0x90,0x00,0x46,
+0xe0,0x54,0xfe,0xfd,0x7f,0x46,0x12,0xba,0xeb,0x90,0x8f,0xbf,0xe0,0xff,0x25,0xe0,
+0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x22,0xf5,0x82,0x74,0x05,0x3c,0xf5,0x83,
+0xe4,0xf0,0xa2,0xaf,0x33,0x90,0x8f,0xc0,0xf0,0xc2,0xaf,0x7b,0x20,0xe4,0xfd,0x12,
+0xaf,0xb9,0x90,0x8f,0xc0,0xe0,0x24,0xff,0x92,0xaf,0x22,0x90,0x90,0x9a,0xe0,0x64,
+0x04,0x60,0x4f,0x74,0x64,0x2f,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,0x0f,
+0x14,0x60,0x1f,0x14,0x60,0x15,0x24,0xfe,0x60,0x0a,0x24,0xf8,0x70,0x34,0xe4,0x90,
+0x90,0x9a,0xf0,0x22,0x90,0x90,0x9a,0x74,0x01,0xf0,0x22,0x90,0x90,0x9a,0x74,0x02,
+0xf0,0x22,0x74,0xc6,0x25,0x23,0xf5,0x82,0x74,0x01,0x35,0x22,0xf5,0x83,0xe0,0x44,
+0x08,0xf0,0x74,0xc6,0x25,0x25,0xf5,0x82,0x74,0x01,0x35,0x24,0xf5,0x83,0xe0,0x44,
+0x08,0xf0,0x22,0x02,0xb2,0xb4,0x02,0xbd,0x09,0x8f,0x2e,0x90,0x01,0xc4,0x74,0x09,
+0xf0,0x74,0x45,0xff,0xa3,0xf0,0x74,0xc4,0x25,0x25,0xf5,0x82,0x74,0x01,0x35,0x24,
+0xf5,0x83,0x74,0x09,0xf0,0x74,0xc5,0x25,0x25,0xf5,0x82,0x74,0x01,0x35,0x24,0xf5,
+0x83,0xef,0xf0,0x85,0x2e,0x38,0xe4,0x78,0x80,0xf6,0x78,0x80,0xe6,0xff,0xc3,0x94,
+0x04,0x50,0x41,0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0xfd,0x78,
+0x80,0xe6,0xfe,0x2d,0xfd,0xe4,0x3c,0xfc,0x74,0x34,0x2d,0xf5,0x82,0x74,0x01,0x3c,
+0xf5,0x83,0xe0,0xfd,0xe5,0x38,0x25,0xe0,0x25,0xe0,0x2e,0x24,0x08,0xf8,0xe6,0xfe,
+0xed,0x5e,0xfe,0xe5,0x38,0x25,0xe0,0x25,0xe0,0x2f,0x24,0x10,0xf8,0xa6,0x06,0x78,
+0x80,0x06,0x80,0xb6,0xe5,0x38,0x25,0xe0,0x25,0xe0,0x24,0x10,0xf8,0xe6,0x20,0xe0,
+0x03,0x02,0x47,0xc5,0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,
+0x34,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x01,0xf0,0xe5,0x38,0x70,0x1a,0xe5,
+0x38,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x50,0xf5,0x82,0x74,0x02,
+0x3e,0xf5,0x83,0xe0,0x44,0x04,0xf0,0x80,0x18,0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,
+0xe6,0xfe,0x08,0xe6,0x24,0x50,0xf5,0x82,0x74,0x02,0x3e,0xf5,0x83,0xe0,0x54,0xfb,
+0xf0,0x85,0xd1,0x30,0x85,0xd2,0x31,0x85,0xd3,0x32,0x85,0xd4,0x33,0x85,0xd5,0x34,
+0x85,0xd6,0x35,0x85,0xd7,0x36,0x85,0xd9,0x37,0xe5,0x37,0x54,0x40,0xc3,0x13,0xff,
+0xe5,0x36,0x54,0x20,0x6f,0x70,0x03,0x02,0x47,0x13,0xe5,0x37,0x30,0xe5,0x03,0x02,
+0x47,0x13,0xe5,0x35,0x54,0x1f,0xf5,0x2f,0xe5,0x30,0x54,0x3f,0x90,0x8f,0x99,0xf0,
+0xe5,0x34,0x54,0x1f,0xff,0xe5,0x38,0x75,0xf0,0x40,0xa4,0x24,0x03,0xf5,0x82,0xe4,
+0x34,0x8c,0xf5,0x83,0x75,0xf0,0x02,0xe5,0x2f,0x12,0x89,0x14,0xe4,0x8f,0xf0,0x12,
+0x88,0x36,0xe5,0x36,0x54,0x1f,0xff,0xe5,0x38,0x75,0xf0,0x40,0xa4,0x24,0xc0,0xf5,
+0x82,0xe4,0x34,0x85,0xf5,0x83,0x75,0xf0,0x02,0xe5,0x2f,0x12,0x89,0x14,0xe4,0x8f,
+0xf0,0x12,0x88,0x36,0x90,0x8f,0x99,0xe0,0xd3,0x94,0x04,0x40,0x03,0x74,0x04,0xf0,
+0xe5,0x36,0x54,0x1f,0xff,0x90,0x8f,0x99,0xe0,0xfe,0x75,0xf0,0xa0,0xe5,0x38,0xa4,
+0x24,0x00,0xf5,0x82,0xe5,0xf0,0x34,0x84,0xf5,0x83,0x75,0xf0,0x05,0xe5,0x2f,0x12,
+0x89,0x14,0xe5,0x82,0x2e,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xe0,0x2f,0xf0,0xe5,
+0x37,0x20,0xe6,0x30,0xe5,0x36,0x54,0x1f,0xff,0xe5,0x38,0x75,0xf0,0x40,0xa4,0x24,
+0xc3,0xf5,0x82,0xe4,0x34,0x8a,0xf5,0x83,0x75,0xf0,0x02,0xe5,0x2f,0x12,0x89,0x14,
+0xe4,0x8f,0xf0,0x12,0x88,0x36,0xe5,0x32,0x30,0xe7,0x48,0xad,0x2f,0xaf,0x38,0x12,
+0xa4,0xab,0x80,0x3f,0xe5,0x36,0x54,0x1f,0xff,0xe5,0x38,0x75,0xf0,0x40,0xa4,0x24,
+0x43,0xf5,0x82,0xe4,0x34,0x8b,0xf5,0x83,0x75,0xf0,0x02,0xe5,0x2f,0x12,0x89,0x14,
+0xe4,0x8f,0xf0,0x12,0x88,0x36,0xe5,0x32,0x30,0xe7,0x18,0xe5,0x32,0x54,0x7f,0xfb,
+0x90,0x8f,0x99,0xe0,0xf5,0x3e,0xe5,0x36,0x54,0x1f,0xf5,0x3f,0xad,0x2f,0xaf,0x38,
+0x12,0xa0,0x10,0x74,0x76,0x25,0x38,0xf8,0xe6,0x14,0x24,0xfd,0x50,0x03,0x02,0x47,
+0xc5,0x74,0x6a,0x25,0x38,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x70,0x03,0x02,
+0x47,0xb8,0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x5b,0xf5,
+0x82,0x74,0x01,0x3e,0xf5,0x83,0xe4,0xf0,0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,0xe6,
+0xfe,0x08,0xe6,0x24,0x3c,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x04,0xf0,0xaf,
+0x38,0x12,0xbb,0xee,0xef,0x64,0x01,0x70,0x5c,0xf5,0x3f,0x75,0x40,0x14,0xf5,0x41,
+0xfb,0x7d,0x58,0x7c,0x01,0xaf,0x38,0x12,0xa9,0x80,0xe5,0x38,0x25,0xe0,0x24,0x22,
+0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x5b,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x05,
+0xf0,0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x92,0xf5,0x82,
+0x74,0x06,0x3e,0xf5,0x83,0x74,0x01,0xf0,0x74,0x62,0x25,0x38,0xf5,0x82,0xe4,0x34,
+0x90,0xf5,0x83,0x74,0x01,0xf0,0x80,0x0d,0xaf,0x38,0x12,0xbb,0xee,0xbf,0x01,0x05,
+0xaf,0x38,0x12,0xb6,0xa2,0xe5,0x38,0x25,0xe0,0x25,0xe0,0x24,0x10,0xf8,0xe6,0x30,
+0xe1,0x34,0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x34,0xf5,
+0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x02,0xf0,0x85,0xd1,0x1a,0x85,0xd2,0x1b,0x85,
+0xd3,0x1c,0x85,0xd4,0x1d,0x85,0xd5,0x1e,0x85,0xd6,0x1f,0x85,0xd7,0x20,0x85,0xd9,
+0x21,0xaf,0x38,0x12,0xba,0x4c,0xe5,0x38,0x25,0xe0,0x25,0xe0,0x24,0x10,0xf8,0xe6,
+0x30,0xe3,0x17,0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x34,
+0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x08,0xf0,0xe5,0x38,0x25,0xe0,0x25,0xe0,
+0x24,0x10,0xf8,0xe6,0x30,0xe4,0x2e,0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,
+0x08,0xe6,0x24,0x34,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x10,0xf0,0x74,0x18,
+0x25,0x38,0xf8,0xe6,0x44,0x10,0xf6,0x74,0x0c,0x25,0x38,0xf5,0x82,0xe4,0x34,0x90,
+0xf5,0x83,0xe0,0x04,0xf0,0xe5,0x38,0x25,0xe0,0x25,0xe0,0x24,0x10,0xf8,0xe6,0x30,
+0xe6,0x17,0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x34,0xf5,
+0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x40,0xf0,0xe5,0x38,0x25,0xe0,0x25,0xe0,0x24,
+0x10,0xf8,0xe6,0x20,0xe5,0x03,0x02,0x49,0xdc,0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,
+0xe6,0xfe,0x08,0xe6,0xff,0x24,0xcf,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,0x30,
+0xe7,0x53,0x74,0xcf,0x2f,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,0x54,0x7f,0xf0,
+0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x34,0xf5,0x82,0x74,
+0x01,0x3e,0xf5,0x83,0x74,0x20,0xf0,0x90,0x00,0x82,0xe0,0x44,0x80,0xfd,0x7f,0x82,
+0x12,0xba,0xeb,0x90,0x00,0x80,0xe0,0x54,0x7f,0xfd,0x7f,0x80,0x12,0xba,0xeb,0x12,
+0xba,0xe2,0x90,0x00,0x1a,0xe0,0x54,0xfe,0xfd,0x7f,0x1a,0x12,0xba,0xeb,0x90,0xfd,
+0x00,0xe0,0x44,0x01,0xf0,0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,
+0xff,0x24,0xcf,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,0x20,0xe5,0x03,0x02,0x49,
+0xdc,0x74,0xcf,0x2f,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,0x54,0xdf,0xf0,0xe5,
+0x38,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x34,0xf5,0x82,0x74,0x01,
+0x3e,0xf5,0x83,0x74,0x20,0xf0,0xe4,0xf5,0xa8,0xf5,0xe8,0x78,0x80,0xf6,0x78,0x80,
+0xe6,0xff,0xc3,0x94,0x04,0x50,0x0e,0xef,0x24,0x50,0xff,0xe4,0xfd,0x12,0xba,0xeb,
+0x78,0x80,0x06,0x80,0xe9,0xe4,0x78,0x80,0xf6,0xe4,0x78,0x81,0xf6,0x78,0x81,0xe6,
+0xff,0xc3,0x94,0x04,0x50,0x42,0x18,0xe6,0xfe,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,
+0x08,0xe6,0xfd,0xef,0xfb,0x7a,0x00,0x2d,0xfd,0xea,0x3c,0xfc,0x74,0x30,0x2d,0xf5,
+0x82,0x74,0x01,0x3c,0xf5,0x83,0xe4,0xf0,0xee,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,
+0x08,0xe6,0x2b,0xff,0xea,0x3e,0xfe,0x74,0x38,0x2f,0xf5,0x82,0x74,0x01,0x3e,0xf5,
+0x83,0xe4,0xf0,0x78,0x81,0x06,0x80,0xb5,0x78,0x80,0x06,0xe6,0xb4,0x02,0xaa,0x12,
+0xba,0xe2,0x90,0x00,0x1a,0xe0,0x54,0xfe,0xfd,0x7f,0x1a,0x12,0xba,0xeb,0x90,0x00,
+0x03,0xe0,0x54,0xfb,0xfd,0x7f,0x03,0x12,0xba,0xeb,0x80,0xfe,0xe5,0x38,0x25,0xe0,
+0x25,0xe0,0x24,0x12,0xf8,0xe6,0x30,0xe0,0x17,0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,
+0xe6,0xfe,0x08,0xe6,0x24,0x35,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x01,0xf0,
+0xe5,0x38,0x25,0xe0,0x25,0xe0,0x24,0x12,0xf8,0xe6,0x20,0xe1,0x03,0x02,0x4a,0xfb,
+0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x36,0xf5,0x82,0x74,
+0x01,0x3e,0xf5,0x83,0x74,0x02,0xf0,0x74,0x18,0x25,0x38,0xf8,0xe6,0x44,0x40,0xf6,
+0x90,0x01,0x02,0xe0,0x54,0x03,0x64,0x01,0x60,0x03,0x02,0x4a,0xbb,0xe5,0x38,0x25,
+0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0xff,0x24,0x37,0xf5,0x82,0x74,0x01,0x3e,
+0xf5,0x83,0xe0,0x30,0xe0,0x1c,0x74,0x37,0x2f,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,
+0x74,0x01,0xf0,0x74,0x01,0x25,0x38,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe4,0xf0,
+0x80,0x49,0x74,0x01,0x25,0x38,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x04,0xf0,
+0x74,0x01,0x25,0x38,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xc3,0x94,0x0a,0x40,
+0x2a,0x74,0x01,0x25,0x38,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe4,0xf0,0xe5,0x38,
+0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x19,0xf5,0x82,0x74,0x04,0x3e,
+0xf5,0x83,0xe0,0x30,0xe0,0x05,0xaf,0x38,0x12,0xb5,0xaa,0x90,0x90,0xa4,0xe0,0xb4,
+0x01,0x1a,0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x22,0xf5,
+0x82,0x74,0x05,0x3e,0xf5,0x83,0xe4,0xf0,0x90,0x90,0xa4,0xf0,0x74,0xc3,0x25,0x23,
+0xf5,0x82,0x74,0x01,0x35,0x22,0xf5,0x83,0xe0,0xb4,0xee,0x0f,0x74,0xc1,0x25,0x23,
+0xf5,0x82,0x74,0x01,0x35,0x22,0xf5,0x83,0xe0,0x04,0xf0,0xe5,0x38,0x25,0xe0,0x25,
+0xe0,0x24,0x12,0xf8,0xe6,0x20,0xe0,0x03,0x02,0x4b,0xd8,0x90,0x90,0x20,0x74,0x01,
+0xf0,0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x36,0xf5,0x82,
+0x74,0x01,0x3e,0xf5,0x83,0x74,0x01,0xf0,0x90,0x90,0x9f,0xe0,0x30,0xe0,0x33,0x90,
+0x90,0xa4,0x74,0x01,0xf0,0x90,0x90,0x9f,0xe0,0x13,0x13,0x54,0x3f,0x30,0xe0,0x22,
+0x90,0x90,0xa1,0x74,0x01,0xf0,0xaf,0x38,0x12,0xb3,0x01,0x90,0x90,0xa0,0xe0,0x64,
+0x03,0x60,0x0f,0x7f,0x01,0x12,0xaa,0x72,0xef,0x60,0x07,0x7d,0x01,0xaf,0x38,0x12,
+0x9b,0x95,0x90,0x90,0x99,0xe0,0x30,0xe0,0x65,0x13,0x13,0x54,0x3f,0x30,0xe0,0x5e,
+0x90,0x90,0x9b,0x74,0x01,0xf0,0xaf,0x38,0x12,0xb3,0x01,0xe4,0xff,0x12,0xaa,0x72,
+0xef,0x60,0x4b,0xaf,0x38,0x12,0xb9,0xd4,0x90,0x90,0x9a,0xe0,0xff,0x64,0x04,0x60,
+0x3d,0xef,0xb4,0x03,0x09,0xe4,0xfd,0xaf,0x38,0x12,0x93,0x30,0x80,0x17,0x90,0x90,
+0x9a,0xe0,0x64,0x02,0x70,0x28,0xaf,0x38,0x12,0x9d,0x26,0xef,0x70,0x07,0x7d,0x01,
+0xaf,0x38,0x12,0x93,0x30,0x74,0x68,0x25,0x38,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,
+0xe0,0xfd,0x7b,0x01,0xaf,0x38,0x12,0x8a,0xba,0xaf,0x38,0x12,0x44,0xab,0xaf,0x38,
+0x12,0x92,0x11,0xe4,0x90,0x90,0x20,0xf0,0xe5,0x38,0x25,0xe0,0x25,0xe0,0x24,0x12,
+0xf8,0xe6,0x20,0xe2,0x03,0x02,0x4d,0x30,0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,0xe6,
+0xfe,0x08,0xe6,0x24,0x36,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x04,0xf0,0x90,
+0x90,0x99,0xe0,0x30,0xe0,0x09,0xa3,0xe0,0x64,0x04,0x70,0x03,0x02,0x4d,0x30,0x74,
+0x74,0x25,0x38,0xf8,0xe6,0x64,0x01,0x60,0x03,0x02,0x4d,0x30,0x74,0x76,0x25,0x38,
+0xf8,0xe6,0x70,0x03,0x02,0x4d,0x30,0x74,0x76,0x25,0x38,0xf8,0xe6,0x64,0x02,0x70,
+0x79,0xe5,0x2e,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0xab,0xf5,0x82,
+0x74,0x06,0x3e,0xf5,0x83,0xe0,0xff,0x74,0x4e,0x25,0x38,0xf5,0x82,0xe4,0x34,0x90,
+0xf5,0x83,0xef,0xf0,0xe5,0x2e,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,
+0xaa,0xf5,0x82,0x74,0x06,0x3e,0xf5,0x83,0xe0,0xff,0x74,0x66,0x25,0x38,0xf5,0x82,
+0xe4,0x34,0x90,0xf5,0x83,0xef,0xf0,0x74,0x4e,0x25,0x38,0xf5,0x82,0xe4,0x34,0x90,
+0xf5,0x83,0xe0,0x70,0x0b,0x74,0x66,0x25,0x38,0xf5,0x82,0xe4,0x34,0x90,0x80,0x09,
+0x74,0x4e,0x25,0x38,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xff,0x74,0x4e,0x25,
+0x38,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xef,0xf0,0x74,0x52,0x25,0x38,0xf5,0x82,
+0xe4,0x34,0x90,0xf5,0x83,0xe0,0x60,0x0e,0x74,0x52,0x25,0x38,0xf5,0x82,0xe4,0x34,
+0x90,0xf5,0x83,0xe0,0x14,0xf0,0x74,0x50,0x25,0x38,0xf5,0x82,0xe4,0x34,0x90,0xf5,
+0x83,0xe4,0xf0,0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x57,
+0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0xe4,0xf0,0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,
+0xe6,0xfe,0x08,0xe6,0x24,0x3c,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x02,0xf0,
+0x74,0x6e,0x25,0x38,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,0xfd,0xf0,0x74,
+0x6e,0x25,0x38,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,0xef,0xf0,0x74,0x76,
+0x25,0x38,0xf8,0xe6,0x14,0x24,0xfd,0x50,0x02,0x80,0x05,0xaf,0x38,0x12,0x99,0x12,
+0xe5,0x38,0x25,0xe0,0x25,0xe0,0x24,0x12,0xf8,0xe6,0x20,0xe3,0x03,0x02,0x4d,0xc3,
+0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x36,0xf5,0x82,0x74,
+0x01,0x3e,0xf5,0x83,0x74,0x08,0xf0,0x74,0x74,0x25,0x38,0xf8,0xe6,0x64,0x01,0x70,
+0x62,0x74,0x76,0x25,0x38,0xf8,0xe6,0x60,0x5a,0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,
+0xe6,0xfe,0x08,0xe6,0x24,0x57,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0xe4,0xf0,0xe5,
+0x38,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x3c,0xf5,0x82,0x74,0x01,
+0x3e,0xf5,0x83,0x74,0x02,0xf0,0xe4,0x90,0x90,0xaa,0xf0,0xa3,0xf0,0xa3,0x74,0x03,
+0xf0,0xe4,0xfb,0x7d,0x54,0x7c,0x01,0xaf,0x38,0x12,0xbc,0xb7,0xe5,0x38,0x25,0xe0,
+0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x57,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,
+0x74,0x05,0xf0,0xe5,0x38,0x25,0xe0,0x25,0xe0,0x24,0x12,0xf8,0xe6,0x20,0xe4,0x03,
+0x02,0x4e,0x5a,0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x36,
+0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x10,0xf0,0x74,0x74,0x25,0x38,0xf8,0xe6,
+0x64,0x01,0x70,0x66,0x74,0x76,0x25,0x38,0xf8,0xe6,0x60,0x5e,0xe5,0x38,0x25,0xe0,
+0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x57,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,
+0xe4,0xf0,0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x3c,0xf5,
+0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x02,0xf0,0x74,0x6c,0x25,0x38,0xf5,0x82,0xe4,
+0x34,0x90,0xf5,0x83,0xe4,0xf0,0x74,0x6e,0x25,0x38,0xf5,0x82,0xe4,0x34,0x90,0xf5,
+0x83,0xe0,0x54,0xfd,0xf0,0x74,0x6e,0x25,0x38,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,
+0xe0,0x54,0x07,0x70,0x05,0xaf,0x38,0x12,0xb6,0xa2,0xe5,0x38,0x25,0xe0,0x25,0xe0,
+0x24,0x12,0xf8,0xe6,0x30,0xe5,0x43,0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,
+0x08,0xe6,0x24,0x36,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x20,0xf0,0x74,0x74,
+0x25,0x38,0xf8,0xe6,0x64,0x01,0x70,0x22,0x74,0x76,0x25,0x38,0xf8,0xe6,0x60,0x1a,
+0x74,0x6a,0x25,0x38,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x64,0x02,0xaf,0x38,
+0x60,0x05,0x12,0xb6,0xdc,0x80,0x03,0x12,0xa2,0xbe,0xe5,0x38,0x25,0xe0,0x25,0xe0,
+0x24,0x12,0xf8,0xe6,0x30,0xe6,0x4d,0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,
+0x08,0xe6,0x24,0x36,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x40,0xf0,0x74,0x74,
+0x25,0x38,0xf8,0xe6,0x64,0x01,0x70,0x2c,0x74,0x76,0x25,0x38,0xf8,0xe6,0x60,0x24,
+0x74,0x6e,0x25,0x38,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,0xfe,0xf0,0x74,
+0x6e,0x25,0x38,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,0x07,0x70,0x05,0xaf,
+0x38,0x12,0xb6,0xa2,0xe5,0x38,0x25,0xe0,0x25,0xe0,0x24,0x13,0xf8,0xe6,0x30,0xe1,
+0x3f,0xe5,0x38,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x37,0xf5,0x82,
+0x74,0x01,0x3e,0xf5,0x83,0x74,0x02,0xf0,0x90,0x90,0x99,0xe0,0x30,0xe0,0x1c,0xe4,
+0xff,0x12,0xaa,0x72,0xef,0x60,0x0c,0xaf,0x38,0x12,0xb3,0xde,0xaf,0x38,0x12,0x44,
+0xab,0x80,0x0d,0x90,0x90,0x9e,0x74,0x01,0xf0,0x80,0x05,0xaf,0x38,0x12,0xb3,0xde,
+0x90,0x01,0xc4,0x74,0x09,0xf0,0x74,0x45,0xff,0xa3,0xf0,0x74,0xc4,0x25,0x25,0xf5,
+0x82,0x74,0x01,0x35,0x24,0xf5,0x83,0x74,0x09,0xf0,0x74,0xc5,0x25,0x25,0xf5,0x82,
+0x74,0x01,0x35,0x24,0xf5,0x83,0xef,0xf0,0x22,0x8f,0x49,0xe4,0xf5,0x4a,0x74,0x08,
+0x25,0x49,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xff,0xe5,0x4a,0xc3,0x9f,0x40,
+0x03,0x02,0x58,0x56,0x75,0xf0,0xe0,0xe5,0x49,0xa4,0x24,0x09,0xf5,0x82,0xe5,0xf0,
+0x34,0x89,0xf5,0x83,0x75,0xf0,0x07,0xe5,0x4a,0x12,0x89,0x14,0xe0,0xc3,0x13,0x20,
+0xe0,0x03,0x02,0x58,0x51,0xe5,0x49,0x75,0xf0,0x40,0xa4,0x24,0xc0,0xf5,0x82,0xe4,
+0x34,0x85,0xf5,0x83,0x75,0xf0,0x02,0xe5,0x4a,0x12,0x89,0x14,0xe0,0xfe,0xa3,0xe0,
+0xd3,0x94,0x00,0xee,0x94,0x00,0x50,0x03,0x02,0x58,0x51,0xe5,0x49,0x75,0xf0,0xa0,
+0xa4,0x24,0x00,0xf9,0x74,0x84,0x35,0xf0,0xfa,0xe5,0x4a,0x75,0xf0,0x05,0xa4,0x29,
+0xf9,0xea,0x35,0xf0,0x75,0x4e,0x01,0xf5,0x4f,0x89,0x50,0xe5,0x49,0x75,0xf0,0x40,
+0xa4,0x24,0xc0,0xf5,0x82,0xe4,0x34,0x85,0xf5,0x83,0x75,0xf0,0x02,0xe5,0x4a,0x12,
+0x89,0x14,0xa3,0xe0,0x90,0x8f,0xb4,0xf0,0xe5,0x49,0x75,0xf0,0x40,0xa4,0x24,0xc3,
+0xf5,0x82,0xe4,0x34,0x8a,0xf5,0x83,0x75,0xf0,0x02,0xe5,0x4a,0x12,0x89,0x14,0xe0,
+0xff,0xa3,0xe0,0x90,0x8f,0xb5,0xcf,0xf0,0xa3,0xef,0xf0,0xad,0x4a,0xaf,0x49,0x12,
+0xbc,0x49,0xef,0x54,0x3f,0x90,0x8f,0xb1,0xf0,0x54,0x1f,0x78,0x83,0xf6,0x75,0xf0,
+0xe0,0xe5,0x49,0xa4,0x24,0x07,0xf5,0x82,0xe5,0xf0,0x34,0x89,0xf5,0x83,0x75,0xf0,
+0x07,0xe5,0x4a,0x12,0x89,0x14,0xe0,0x90,0x8f,0xb8,0xf0,0xe5,0x49,0xc4,0x33,0x54,
+0xe0,0x24,0x05,0xf5,0x82,0xe4,0x34,0x8e,0xf5,0x83,0xe5,0x82,0x25,0x4a,0xf5,0x82,
+0xe4,0x35,0x83,0xf5,0x83,0xe0,0xc3,0x94,0x05,0x40,0x03,0x02,0x52,0xcf,0x90,0x8f,
+0xb8,0xe0,0xff,0xe6,0x9f,0x40,0x0d,0xe0,0xf6,0x90,0x8f,0xb1,0xe0,0x54,0x40,0xfe,
+0xf0,0xef,0x4e,0xf0,0xe5,0x49,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,
+0xfd,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xe0,0x64,0x01,0x70,0x38,0xe5,0x49,0xc4,
+0x33,0x54,0xe0,0x24,0x83,0xf5,0x82,0xe4,0x34,0x8c,0xf5,0x83,0xe5,0x82,0x25,0x4a,
+0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xe0,0xff,0x78,0x83,0xe6,0xfe,0x90,0x41,0x5a,
+0x93,0xfd,0xef,0xc3,0x9d,0x40,0x06,0xee,0x90,0x40,0xea,0x80,0x3e,0x78,0x83,0xe6,
+0x90,0x41,0x06,0x80,0x36,0xe5,0x49,0xc4,0x33,0x54,0xe0,0x24,0x83,0xf5,0x82,0xe4,
+0x34,0x8c,0xf5,0x83,0xe5,0x82,0x25,0x4a,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xe0,
+0xff,0x78,0x83,0xe6,0xfe,0x90,0x41,0x5a,0x93,0xfd,0xef,0xc3,0x9d,0x40,0x06,0xee,
+0x90,0x41,0x22,0x80,0x06,0x78,0x83,0xe6,0x90,0x41,0x3e,0x93,0x90,0x8f,0xb7,0xf0,
+0x90,0x8f,0xb7,0xe0,0x75,0xf0,0x06,0xa4,0x24,0x60,0xf9,0x74,0x40,0x35,0xf0,0x75,
+0x4b,0xff,0xf5,0x4c,0x89,0x4d,0x90,0x8f,0xb1,0xe0,0x90,0x42,0x02,0x93,0xff,0xd3,
+0x90,0x8f,0xb6,0xe0,0x9f,0x90,0x8f,0xb5,0xe0,0x94,0x00,0x40,0x06,0x12,0x83,0x01,
+0x02,0x57,0xdf,0xe5,0x49,0x75,0xf0,0x40,0xa4,0x24,0x80,0xf5,0x82,0xe4,0x34,0x88,
+0xf5,0x83,0x75,0xf0,0x02,0xe5,0x4a,0x12,0x89,0x14,0xe0,0xf5,0x51,0xa3,0xe0,0xf5,
+0x52,0xe4,0x78,0x82,0xf6,0xab,0x4b,0xaa,0x4c,0xa9,0x4d,0x78,0x82,0xe6,0xff,0xf5,
+0x82,0x75,0x83,0x00,0x12,0x87,0xd5,0xfe,0xab,0x4e,0xaa,0x4f,0xa9,0x50,0x8f,0x82,
+0x75,0x83,0x00,0x12,0x87,0xd5,0x8e,0xf0,0xa4,0xae,0xf0,0x25,0x52,0xf5,0x52,0xee,
+0x35,0x51,0xf5,0x51,0x78,0x82,0x06,0xe6,0xb4,0x05,0xca,0xab,0x4b,0xaa,0x4c,0xa9,
+0x4d,0x90,0x00,0x05,0x12,0x87,0xd5,0xff,0x90,0x8f,0xb4,0xe0,0x8f,0xf0,0xa4,0xff,
+0xae,0xf0,0xd3,0xe5,0x52,0x9f,0xe5,0x51,0x9e,0x40,0x0c,0xe5,0x52,0x9f,0xf5,0x52,
+0xe5,0x51,0x9e,0xf5,0x51,0x80,0x05,0xe4,0xf5,0x51,0xf5,0x52,0xe5,0x49,0x75,0xf0,
+0x40,0xa4,0x24,0x80,0xf5,0x82,0xe4,0x34,0x88,0xf5,0x83,0x75,0xf0,0x02,0xe5,0x4a,
+0x12,0x89,0x14,0xe5,0x51,0xf0,0xa3,0xe5,0x52,0xf0,0x90,0x8f,0xb4,0xe0,0xff,0xd3,
+0x94,0x08,0x50,0x72,0xef,0x60,0x6f,0xab,0x4e,0xaa,0x4f,0xa9,0x50,0x90,0x00,0x04,
+0x12,0x87,0xd5,0xff,0x90,0x00,0x03,0x12,0x87,0xd5,0x2f,0xff,0xe4,0x33,0xfe,0xef,
+0x25,0xe0,0xff,0xee,0x33,0xfe,0x90,0x8f,0xb4,0xe0,0xfd,0xd3,0xef,0x9d,0x74,0x80,
+0xf8,0x6e,0x98,0x40,0x03,0x02,0x52,0xc9,0xab,0x4e,0xaa,0x4f,0xa9,0x50,0x90,0x00,
+0x01,0x12,0x87,0xd5,0xff,0x12,0x34,0x05,0x2f,0xff,0xe4,0x33,0xfe,0xef,0x78,0x02,
+0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xfd,0xac,0x06,0x90,0x8f,0xb4,0xe0,0x75,0xf0,
+0x03,0xa4,0xff,0xd3,0xed,0x9f,0xe5,0xf0,0x64,0x80,0xf8,0xec,0x64,0x80,0x98,0x50,
+0x03,0x02,0x57,0x69,0x80,0x1b,0x90,0x8f,0xb1,0xe0,0x25,0xe0,0x24,0x76,0xf5,0x82,
+0xe4,0x34,0x41,0xf5,0x83,0xc3,0x74,0x01,0x93,0x95,0x52,0xe4,0x93,0x95,0x51,0x50,
+0x0a,0xad,0x4a,0xaf,0x49,0x12,0x74,0xec,0x02,0x57,0x69,0x90,0x8f,0xb1,0xe0,0x25,
+0xe0,0x24,0xae,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xd3,0x74,0x01,0x93,0x95,0x52,
+0xe4,0x93,0x95,0x51,0x50,0x03,0x02,0x57,0x69,0x12,0x83,0x01,0x02,0x57,0x69,0xe5,
+0x49,0xc4,0x33,0x54,0xe0,0x24,0x05,0xf5,0x82,0xe4,0x34,0x8e,0xf5,0x83,0xe5,0x82,
+0x25,0x4a,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xe0,0x64,0x05,0x60,0x03,0x02,0x55,
+0x8e,0x74,0xc3,0x25,0x49,0xf5,0x82,0xe4,0x34,0x8c,0xf5,0x83,0xe4,0xf0,0x74,0x01,
+0x25,0x49,0xf5,0x82,0xe4,0x34,0x89,0xf5,0x83,0xe0,0xff,0xb4,0x03,0x0a,0x78,0x83,
+0xe6,0xc3,0x94,0x19,0x40,0x52,0x80,0x33,0xef,0xb4,0x02,0x0a,0x78,0x83,0xe6,0xc3,
+0x94,0x11,0x40,0x44,0x80,0x25,0x74,0x01,0x25,0x49,0xf5,0x82,0xe4,0x34,0x89,0xf5,
+0x83,0xe0,0xff,0xb4,0x01,0x0a,0x78,0x83,0xe6,0xc3,0x94,0x0a,0x40,0x2a,0x80,0x0b,
+0xef,0x70,0x18,0x78,0x83,0xe6,0xc3,0x94,0x03,0x40,0x1d,0x74,0xc3,0x25,0x49,0xf5,
+0x82,0xe4,0x34,0x8c,0xf5,0x83,0x74,0x01,0xf0,0x80,0x0d,0x74,0xc3,0x25,0x49,0xf5,
+0x82,0xe4,0x34,0x8c,0xf5,0x83,0xe4,0xf0,0xe5,0x49,0xc4,0x33,0x54,0xe0,0x24,0xc3,
+0xf5,0x82,0xe4,0x34,0x8b,0xf5,0x83,0xe5,0x82,0x25,0x4a,0xf5,0x82,0xe4,0x35,0x83,
+0xf5,0x83,0xe0,0xf5,0x53,0xe5,0x49,0xc4,0x33,0x54,0xe0,0x24,0x83,0xf5,0x82,0xe4,
+0x34,0x8c,0xf5,0x83,0xe5,0x82,0x25,0x4a,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xe0,
+0xff,0xc3,0x94,0x30,0x50,0x03,0x02,0x54,0xee,0x74,0xc3,0x25,0x49,0xf5,0x82,0xe4,
+0x34,0x8c,0xf5,0x83,0xe0,0x64,0x01,0x60,0x03,0x02,0x54,0xee,0xe5,0x49,0xc4,0x33,
+0x54,0xe0,0x24,0xc5,0xf5,0x82,0xe4,0x34,0x8c,0xf5,0x83,0xe5,0x82,0x25,0x4a,0xf5,
+0x82,0xe4,0x35,0x83,0xf5,0x83,0xe0,0x64,0x0a,0x60,0x7b,0xef,0x24,0x05,0xff,0xe4,
+0x33,0xfe,0xe5,0x49,0xc4,0x33,0x54,0xe0,0x24,0xc0,0xf5,0x82,0xe4,0x34,0x86,0xf5,
+0x83,0xe5,0x82,0x25,0x4a,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xe0,0xfd,0xd3,0x9f,
+0xee,0x64,0x80,0xf8,0x74,0x80,0x98,0x50,0x4d,0xed,0x24,0x05,0xff,0xe4,0x33,0xfe,
+0xe5,0x49,0xc4,0x33,0x54,0xe0,0x24,0x83,0xf5,0x82,0xe4,0x34,0x8c,0xf5,0x83,0xe5,
+0x82,0x25,0x4a,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xe0,0xd3,0x9f,0xee,0x64,0x80,
+0xf8,0x74,0x80,0x98,0x50,0x20,0xe5,0x49,0xc4,0x33,0x54,0xe0,0x24,0x45,0xf5,0x82,
+0xe4,0x34,0x8e,0xf5,0x83,0xe5,0x82,0x25,0x4a,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,
+0xe0,0x78,0x83,0x66,0x60,0x5d,0xe5,0x53,0x70,0x05,0x75,0x53,0x01,0x80,0x0d,0xe5,
+0x53,0xb4,0x01,0x05,0x75,0x53,0x03,0x80,0x03,0x75,0x53,0x05,0xe5,0x49,0xc4,0x33,
+0x54,0xe0,0x24,0x83,0xf5,0x82,0xe4,0x34,0x8c,0xf5,0x83,0xe5,0x82,0x25,0x4a,0xf5,
+0x82,0xe4,0x35,0x83,0xf5,0x83,0xe0,0xff,0xe5,0x49,0xc4,0x33,0x54,0xe0,0x24,0xc0,
+0xf5,0x82,0xe4,0x34,0x86,0xf5,0x83,0xe5,0x82,0x25,0x4a,0xf5,0x82,0xe4,0x35,0x83,
+0xf5,0x83,0xef,0xf0,0xe5,0x49,0xc4,0x33,0x54,0xe0,0x24,0xc5,0xf5,0x82,0xe4,0x34,
+0x8c,0x80,0x4b,0xe5,0x49,0xc4,0x33,0x54,0xe0,0x24,0x05,0xf5,0x82,0xe4,0x34,0x8e,
+0xf5,0x83,0xe5,0x82,0x25,0x4a,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xe4,0xf0,0xe5,
+0x49,0xc4,0x33,0x54,0xe0,0x24,0xc5,0xf5,0x82,0xe4,0x34,0x8c,0xf5,0x83,0xe5,0x82,
+0x25,0x4a,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xe0,0x04,0xf0,0x80,0x1f,0xe4,0xf5,
+0x53,0xe5,0x49,0xc4,0x33,0x54,0xe0,0x24,0x05,0xf5,0x82,0xe4,0x34,0x8e,0xf5,0x83,
+0xe5,0x82,0x25,0x4a,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xe4,0xf0,0x78,0x83,0xe6,
+0xff,0xe5,0x49,0xc4,0x33,0x54,0xe0,0x24,0x45,0xf5,0x82,0xe4,0x34,0x8e,0xf5,0x83,
+0xe5,0x82,0x25,0x4a,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xef,0xf0,0xe5,0x49,0xc4,
+0x33,0x54,0xe0,0x24,0xc3,0xf5,0x82,0xe4,0x34,0x8b,0xf5,0x83,0xe5,0x82,0x25,0x4a,
+0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xe5,0x53,0xf0,0x75,0xf0,0xe0,0xe5,0x49,0xa4,
+0x24,0x09,0xf5,0x82,0xe5,0xf0,0x34,0x89,0xf5,0x83,0x75,0xf0,0x07,0xe5,0x4a,0x12,
+0x89,0x14,0xe0,0x13,0x13,0x54,0x3f,0x30,0xe0,0x1f,0xe4,0xf5,0x53,0xe5,0x49,0xc4,
+0x33,0x54,0xe0,0x24,0x05,0xf5,0x82,0xe4,0x34,0x8e,0xf5,0x83,0xe5,0x82,0x25,0x4a,
+0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xe4,0xf0,0xab,0x53,0x02,0x57,0x62,0xe5,0x49,
+0xc4,0x33,0x54,0xe0,0x24,0x05,0xf5,0x82,0xe4,0x34,0x8e,0xf5,0x83,0xe5,0x82,0x25,
+0x4a,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xe0,0x64,0x06,0x60,0x03,0x02,0x57,0x69,
+0xe5,0x49,0xc4,0x33,0x54,0xe0,0x24,0xc3,0xf5,0x82,0xe4,0x34,0x8b,0xf5,0x83,0xe5,
+0x82,0x25,0x4a,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xe0,0xf5,0x53,0xe4,0xf5,0x51,
+0xf5,0x52,0x90,0x42,0x23,0x93,0xff,0x90,0x8f,0xb4,0xe0,0x8f,0xf0,0xa4,0xff,0x90,
+0x8f,0xb2,0xe5,0xf0,0xf0,0xa3,0xef,0xf0,0xe4,0x78,0x82,0xf6,0xab,0x4e,0xaa,0x4f,
+0xa9,0x50,0x78,0x82,0xe6,0xff,0xf5,0x82,0x75,0x83,0x00,0x12,0x87,0xd5,0xfe,0xef,
+0x90,0x42,0x1e,0x93,0xff,0xee,0x8f,0xf0,0xa4,0xae,0xf0,0x25,0x52,0xf5,0x52,0xee,
+0x35,0x51,0xf5,0x51,0xc3,0x90,0x8f,0xb3,0xe0,0x95,0x52,0x90,0x8f,0xb2,0xe0,0x95,
+0x51,0x40,0x07,0x78,0x82,0x06,0xe6,0xb4,0x05,0xc2,0x78,0x82,0xe6,0xc3,0x13,0xf6,
+0xe5,0x53,0xb4,0x01,0x0c,0xe4,0x90,0x8f,0xba,0xf0,0xe6,0x70,0x23,0x04,0xf0,0x80,
+0x1f,0xe5,0x53,0xb4,0x03,0x08,0xc3,0x74,0x02,0x78,0x82,0x96,0x80,0x0e,0xe5,0x53,
+0xb4,0x05,0x08,0xc3,0x74,0x03,0x78,0x82,0x96,0x80,0x01,0xe4,0x90,0x8f,0xba,0xf0,
+0xe5,0x49,0xc4,0x33,0x54,0xe0,0x24,0x40,0xf5,0x82,0xe4,0x34,0x86,0xf5,0x83,0xe5,
+0x82,0x25,0x4a,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xe0,0xff,0xc3,0x13,0xfe,0xef,
+0x13,0x13,0x54,0x3f,0x2e,0xff,0x90,0x8f,0xba,0xe0,0xc4,0x54,0xf0,0x2f,0x24,0x02,
+0xff,0xe5,0x49,0xc4,0x33,0x54,0xe0,0x24,0x40,0xf5,0x82,0xe4,0x34,0x86,0xf5,0x83,
+0xe5,0x82,0x25,0x4a,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xef,0xf0,0xe5,0x49,0xc4,
+0x33,0x54,0xe0,0x24,0x40,0xf5,0x82,0xe4,0x34,0x86,0xf5,0x83,0xe5,0x82,0x25,0x4a,
+0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xe0,0xc3,0x94,0xc0,0x40,0x1d,0xe5,0x49,0xc4,
+0x33,0x54,0xe0,0x24,0x40,0xf5,0x82,0xe4,0x34,0x86,0xf5,0x83,0xe5,0x82,0x25,0x4a,
+0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0x74,0xc0,0xf0,0xe5,0x49,0xc4,0x33,0x54,0xe0,
+0x24,0x40,0xf5,0x82,0xe4,0x34,0x86,0xf5,0x83,0xe5,0x82,0x25,0x4a,0xf5,0x82,0xe4,
+0x35,0x83,0xf5,0x83,0xe0,0x24,0x10,0xff,0xe4,0x33,0xfe,0xef,0x78,0x06,0xce,0xa2,
+0xe7,0x13,0xce,0x13,0xd8,0xf8,0xff,0x90,0x8f,0xba,0xf0,0xbf,0x03,0x05,0x75,0x53,
+0x05,0x80,0x0f,0x90,0x8f,0xba,0xe0,0xff,0xb4,0x02,0x05,0x75,0x53,0x03,0x80,0x02,
+0x8f,0x53,0xd3,0x90,0x8f,0xb6,0xe0,0x94,0x05,0x90,0x8f,0xb5,0xe0,0x94,0x00,0x40,
+0x03,0xe4,0xf5,0x53,0xe5,0x49,0xc4,0x33,0x54,0xe0,0x24,0xc3,0xf5,0x82,0xe4,0x34,
+0x8b,0xf5,0x83,0xe5,0x82,0x25,0x4a,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xe5,0x53,
+0xf0,0xfb,0xad,0x4a,0xaf,0x49,0x12,0xa9,0xf9,0xe5,0x49,0xc4,0x33,0x54,0xe0,0x24,
+0x05,0xf5,0x82,0xe4,0x34,0x8e,0xf5,0x83,0xe5,0x82,0x25,0x4a,0xf5,0x82,0xe4,0x35,
+0x83,0xf5,0x83,0xe0,0xd3,0x94,0x05,0xe5,0x49,0x50,0x1d,0xc4,0x33,0x54,0xe0,0x24,
+0x05,0xf5,0x82,0xe4,0x34,0x8e,0xf5,0x83,0xe5,0x82,0x25,0x4a,0xf5,0x82,0xe4,0x35,
+0x83,0xf5,0x83,0xe0,0x04,0xf0,0x80,0x1a,0xc4,0x33,0x54,0xe0,0x24,0x05,0xf5,0x82,
+0xe4,0x34,0x8e,0xf5,0x83,0xe5,0x82,0x25,0x4a,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,
+0xe4,0xf0,0x75,0xf0,0xe0,0xe5,0x49,0xa4,0x24,0x08,0xf5,0x82,0xe5,0xf0,0x34,0x89,
+0xf5,0x83,0x75,0xf0,0x07,0xe5,0x4a,0x12,0x89,0x14,0xe0,0x90,0x8f,0xb9,0xf0,0xe4,
+0x78,0x82,0xf6,0x78,0x82,0xe6,0xff,0xc3,0x94,0x05,0x50,0x14,0xab,0x4e,0xaa,0x4f,
+0xa9,0x50,0x8f,0x82,0x75,0x83,0x00,0xe4,0x12,0x88,0x14,0x78,0x82,0x06,0x80,0xe3,
+0xe5,0x49,0x75,0xf0,0x40,0xa4,0x24,0xc0,0xf5,0x82,0xe4,0x34,0x85,0xf5,0x83,0x75,
+0xf0,0x02,0xe5,0x4a,0x12,0x89,0x14,0xe4,0xf0,0xa3,0xf0,0xe5,0x49,0x75,0xf0,0x40,
+0xa4,0x24,0xc3,0xf5,0x82,0xe4,0x34,0x8a,0xf5,0x83,0x75,0xf0,0x02,0xe5,0x4a,0x12,
+0x89,0x14,0xe4,0xf0,0xa3,0xf0,0xe5,0x49,0x75,0xf0,0x40,0xa4,0x24,0x43,0xf5,0x82,
+0xe4,0x34,0x8b,0xf5,0x83,0x75,0xf0,0x02,0xe5,0x4a,0x12,0x89,0x14,0xe4,0xf0,0xa3,
+0xf0,0x05,0x4a,0x02,0x4f,0x7e,0x22,0xe4,0xf5,0x44,0x90,0x8f,0xb0,0xf0,0x75,0x8e,
+0x02,0x12,0xbd,0x59,0x90,0x00,0x02,0xe0,0x54,0xe0,0x90,0x90,0x03,0x60,0x08,0xe0,
+0x54,0xfc,0x44,0x01,0xf0,0x80,0x06,0xe0,0x54,0xfc,0x44,0x02,0xf0,0x12,0xb8,0xbd,
+0x90,0xfe,0x5f,0xe0,0x24,0x13,0xf5,0x82,0xe4,0x34,0xfd,0xaf,0x82,0x90,0x90,0x10,
+0xf0,0xa3,0xef,0xf0,0x90,0x90,0x11,0xe0,0x24,0x20,0xfe,0x90,0x90,0x10,0xe0,0x34,
+0x00,0x90,0x90,0x12,0xf0,0xa3,0xce,0xf0,0xe4,0xf5,0x22,0xf5,0x23,0x75,0x24,0x40,
+0xf5,0x25,0xf5,0x18,0xf5,0x19,0x90,0x90,0x04,0xf0,0xa3,0xf0,0x90,0x90,0x0e,0x04,
+0xf0,0xa3,0xf0,0xe4,0x90,0x90,0x21,0xf0,0x90,0x8f,0xac,0xf0,0xa3,0xf0,0xa3,0xf0,
+0xa3,0xf0,0x90,0x00,0x80,0xe0,0x44,0x80,0xfd,0x7f,0x80,0x12,0xba,0xeb,0x12,0xbd,
+0x61,0x12,0x8f,0xca,0x63,0x44,0x01,0x7d,0x57,0xe5,0x44,0x2d,0x90,0x01,0xc4,0xf0,
+0x74,0x58,0xff,0xa3,0xf0,0xe5,0x44,0x2d,0xfe,0x74,0xc4,0x25,0x25,0xf5,0x82,0x74,
+0x01,0x35,0x24,0xf5,0x83,0xee,0xf0,0x74,0xc5,0x25,0x25,0xf5,0x82,0x74,0x01,0x35,
+0x24,0xf5,0x83,0xef,0xf0,0x12,0xb8,0xbd,0x90,0x00,0x81,0xe0,0xc3,0x13,0x54,0x01,
+0x90,0x90,0x06,0xf0,0x90,0x00,0x53,0xe0,0xc3,0x13,0x54,0x01,0x90,0x90,0x07,0xf0,
+0x90,0x00,0x81,0xe0,0x90,0x8f,0xa8,0xf0,0x90,0x00,0x53,0xe0,0x90,0x8f,0xa9,0xf0,
+0x90,0x8f,0xa8,0xe0,0x20,0xe7,0x17,0x90,0x90,0x0e,0xe0,0x70,0x03,0x12,0xba,0xe2,
+0xe4,0x90,0x90,0x04,0xf0,0xf5,0x18,0x90,0x90,0x0e,0x04,0xf0,0x80,0x24,0x90,0x90,
+0x0e,0xe0,0xb4,0x01,0x1d,0x85,0x23,0x82,0x85,0x22,0x83,0xa3,0xa3,0xa3,0xe0,0x30,
+0xe7,0x10,0xe4,0xff,0x12,0x7f,0xa7,0xe4,0x90,0x90,0x0e,0xf0,0x90,0x8f,0xac,0xe0,
+0x04,0xf0,0x90,0x8f,0xa9,0xe0,0x20,0xe0,0x20,0x90,0x90,0x0f,0xe0,0x70,0x0c,0x90,
+0x00,0x1a,0xe0,0x54,0xfe,0xfd,0x7f,0x1a,0x12,0xba,0xeb,0xe4,0x90,0x90,0x05,0xf0,
+0xf5,0x19,0x90,0x90,0x0f,0x04,0xf0,0x80,0x32,0x90,0x90,0x03,0xe0,0x13,0x13,0x13,
+0x54,0x03,0xd3,0x94,0x00,0x40,0x24,0x90,0x90,0x0f,0xe0,0xb4,0x01,0x1d,0x85,0x25,
+0x82,0x85,0x24,0x83,0xa3,0xa3,0xa3,0xe0,0x30,0xe7,0x10,0x7f,0x01,0x12,0x7f,0xa7,
+0xe4,0x90,0x90,0x0f,0xf0,0x90,0x8f,0xad,0xe0,0x04,0xf0,0xe4,0xf5,0x47,0x90,0x90,
+0x03,0xe0,0x13,0x13,0x13,0x54,0x03,0xd3,0x94,0x00,0x40,0x03,0x75,0x47,0x01,0xe4,
+0xf5,0x45,0xe5,0x45,0xd3,0x95,0x47,0x50,0x77,0x90,0x90,0x04,0xe0,0x70,0x04,0xe5,
+0x45,0x60,0x69,0x90,0x90,0x05,0xe0,0x70,0x06,0xe5,0x45,0x64,0x01,0x60,0x5d,0x74,
+0x18,0x25,0x45,0xf8,0xe6,0x30,0xe6,0x20,0xc2,0xaf,0x74,0x18,0x25,0x45,0xf8,0xe6,
+0x54,0xbf,0xf6,0xd2,0xaf,0xaf,0x45,0x12,0x4f,0x79,0x90,0x90,0x7b,0xe0,0x60,0x03,
+0xb4,0x01,0x05,0xaf,0x45,0x12,0x77,0xac,0x74,0x18,0x25,0x45,0xf8,0xe6,0x30,0xe4,
+0x20,0xc2,0xaf,0x74,0x18,0x25,0x45,0xf8,0xe6,0x54,0xef,0xf6,0xd2,0xaf,0x74,0xae,
+0x25,0x45,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0x04,0xf0,0xaf,0x45,0x12,0x72,
+0x1d,0x90,0x90,0x7b,0xe0,0x70,0x05,0xaf,0x45,0x12,0x97,0x49,0x05,0x45,0x80,0x82,
+0x74,0xc0,0x25,0x23,0xf5,0x82,0x74,0x01,0x35,0x22,0xf5,0x83,0xe0,0xf5,0x47,0xe5,
+0x47,0x54,0xe0,0x64,0xa0,0x60,0x03,0x02,0x5c,0x93,0xe5,0x47,0x54,0x18,0x13,0x13,
+0x13,0x54,0x1f,0xf5,0x48,0xe4,0xf5,0x46,0xe5,0x48,0x70,0x6e,0x74,0x6a,0x25,0x46,
+0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xff,0xe5,0x46,0x25,0xe0,0x24,0x22,0xf8,
+0xe6,0xfc,0x08,0xe6,0x24,0x30,0xf5,0x82,0x74,0x06,0x3c,0xf5,0x83,0xef,0xf0,0x74,
+0x76,0x25,0x46,0xf8,0xe6,0xff,0xe5,0x46,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,
+0xe6,0x24,0x31,0xf5,0x82,0x74,0x06,0x3c,0xf5,0x83,0xef,0xf0,0x74,0x64,0x25,0x46,
+0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xff,0xe5,0x46,0x25,0xe0,0x24,0x22,0xf8,
+0xe6,0xfc,0x08,0xe6,0x24,0x32,0xf5,0x82,0x74,0x06,0x3c,0xf5,0x83,0xef,0xf0,0x74,
+0x68,0x25,0x46,0xf5,0x82,0xe4,0x34,0x90,0x80,0x72,0xe5,0x48,0x64,0x01,0x70,0x72,
+0x74,0x6e,0x25,0x46,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xff,0xe5,0x46,0x25,
+0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x30,0xf5,0x82,0x74,0x06,0x3c,0xf5,
+0x83,0xef,0xf0,0x74,0x74,0x25,0x46,0xf8,0xe6,0xff,0xe5,0x46,0x25,0xe0,0x24,0x22,
+0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x31,0xf5,0x82,0x74,0x06,0x3c,0xf5,0x83,0xef,0xf0,
+0x74,0x62,0x25,0x46,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xff,0xe5,0x46,0x25,
+0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x32,0xf5,0x82,0x74,0x06,0x3c,0xf5,
+0x83,0xef,0xf0,0x74,0x60,0x25,0x46,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x02,
+0x5c,0x71,0xe5,0x48,0x64,0x02,0x70,0x74,0x74,0x66,0x25,0x46,0xf5,0x82,0xe4,0x34,
+0x90,0xf5,0x83,0xe0,0xff,0xe5,0x46,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,
+0x24,0x30,0xf5,0x82,0x74,0x06,0x3c,0xf5,0x83,0xef,0xf0,0x74,0x4e,0x25,0x46,0xf5,
+0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xff,0xe5,0x46,0x25,0xe0,0x24,0x22,0xf8,0xe6,
+0xfc,0x08,0xe6,0x24,0x31,0xf5,0x82,0x74,0x06,0x3c,0xf5,0x83,0xef,0xf0,0x74,0x6c,
+0x25,0x46,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xff,0xe5,0x46,0x25,0xe0,0x24,
+0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x32,0xf5,0x82,0x74,0x06,0x3c,0xf5,0x83,0xef,
+0xf0,0x90,0x90,0x03,0xe0,0x13,0x13,0x13,0x54,0x03,0x80,0x75,0x74,0x52,0x25,0x46,
+0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xff,0xe5,0x46,0x25,0xe0,0x24,0x22,0xf8,
+0xe6,0xfc,0x08,0xe6,0x24,0x30,0xf5,0x82,0x74,0x06,0x3c,0xf5,0x83,0xef,0xf0,0x74,
+0x50,0x25,0x46,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xff,0xe5,0x46,0x25,0xe0,
+0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x31,0xf5,0x82,0x74,0x06,0x3c,0xf5,0x83,
+0xef,0xf0,0x74,0x5c,0x25,0x46,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xff,0xe5,
+0x46,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x32,0xf5,0x82,0x74,0x06,
+0x3c,0xf5,0x83,0xef,0xf0,0x74,0x5e,0x25,0x46,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,
+0xe0,0xff,0xe5,0x46,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x33,0xf5,
+0x82,0x74,0x06,0x3c,0xf5,0x83,0xef,0xf0,0x05,0x46,0xe5,0x46,0x64,0x02,0x60,0x03,
+0x02,0x5a,0x98,0xe5,0x47,0x54,0xe0,0x64,0x20,0x60,0x03,0x02,0x5f,0x85,0xe5,0x47,
+0x54,0x18,0x13,0x13,0x13,0x54,0x1f,0xf5,0x48,0xe4,0xf5,0x46,0xe5,0x47,0x54,0x07,
+0x90,0x8f,0xa7,0xf0,0xe5,0x48,0x70,0x6f,0x75,0xf0,0xe0,0xe5,0x46,0xa4,0x24,0x05,
+0xf5,0x82,0xe5,0xf0,0x34,0x89,0xf5,0x83,0xc0,0x83,0xc0,0x82,0x90,0x8f,0xa7,0xe0,
+0xd0,0x82,0xd0,0x83,0x75,0xf0,0x07,0x12,0x89,0x14,0xe0,0xfc,0xa3,0xe0,0xfd,0xe5,
+0x46,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0xff,0xee,0xc3,0x13,0xfe,0xef,
+0x13,0x25,0xe0,0xff,0xee,0x33,0xfe,0x74,0x30,0x2f,0xf5,0x82,0x74,0x06,0x3e,0xf5,
+0x83,0xec,0xf0,0xa3,0xed,0xf0,0x75,0xf0,0xe0,0xe5,0x46,0xa4,0x24,0x03,0xf5,0x82,
+0xe5,0xf0,0x34,0x89,0xf5,0x83,0xc0,0x83,0xc0,0x82,0x90,0x8f,0xa7,0xe0,0xd0,0x82,
+0xd0,0x83,0x75,0xf0,0x07,0x80,0x74,0xe5,0x48,0x64,0x01,0x60,0x03,0x02,0x5d,0xcd,
+0xe5,0x46,0x75,0xf0,0x40,0xa4,0x24,0x05,0xf5,0x82,0xe4,0x34,0x8d,0xf5,0x83,0xc0,
+0x83,0xc0,0x82,0x90,0x8f,0xa7,0xe0,0xd0,0x82,0xd0,0x83,0x75,0xf0,0x02,0x12,0x89,
+0x14,0xe0,0xfc,0xa3,0xe0,0xfd,0xe5,0x46,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,
+0xe6,0xff,0xee,0xc3,0x13,0xfe,0xef,0x13,0x25,0xe0,0xff,0xee,0x33,0xfe,0x74,0x30,
+0x2f,0xf5,0x82,0x74,0x06,0x3e,0xf5,0x83,0xec,0xf0,0xa3,0xed,0xf0,0xe5,0x46,0x75,
+0xf0,0x40,0xa4,0x24,0x80,0xf5,0x82,0xe4,0x34,0x87,0xf5,0x83,0xc0,0x83,0xc0,0x82,
+0x90,0x8f,0xa7,0xe0,0xd0,0x82,0xd0,0x83,0x75,0xf0,0x02,0x12,0x89,0x14,0xe0,0xfc,
+0xa3,0xe0,0xfd,0xe5,0x46,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0xff,0xee,
+0xc3,0x13,0xfe,0xef,0x13,0x25,0xe0,0xff,0xee,0x33,0xfe,0x74,0x32,0x2f,0xf5,0x82,
+0x74,0x06,0x3e,0xf5,0x83,0xec,0xf0,0xa3,0xed,0xf0,0x02,0x5f,0x7a,0xe5,0x48,0x64,
+0x02,0x60,0x03,0x02,0x5e,0xc7,0x75,0xf0,0xe0,0xe5,0x46,0xa4,0x24,0x07,0xf5,0x82,
+0xe5,0xf0,0x34,0x89,0xf5,0x83,0xc0,0x83,0xc0,0x82,0x90,0x8f,0xa7,0xe0,0xd0,0x82,
+0xd0,0x83,0x75,0xf0,0x07,0x12,0x89,0x14,0xe0,0xff,0xe5,0x46,0x25,0xe0,0x24,0x22,
+0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x30,0xf5,0x82,0x74,0x06,0x3c,0xf5,0x83,0xef,0xf0,
+0x75,0xf0,0xe0,0xe5,0x46,0xa4,0x24,0x08,0xf5,0x82,0xe5,0xf0,0x34,0x89,0xf5,0x83,
+0xc0,0x83,0xc0,0x82,0x90,0x8f,0xa7,0xe0,0xd0,0x82,0xd0,0x83,0x75,0xf0,0x07,0x12,
+0x89,0x14,0xe0,0xff,0xe5,0x46,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,
+0x31,0xf5,0x82,0x74,0x06,0x3c,0xf5,0x83,0xef,0xf0,0x75,0xf0,0xe0,0xe5,0x46,0xa4,
+0x24,0x09,0xf5,0x82,0xe5,0xf0,0x34,0x89,0xf5,0x83,0xc0,0x83,0xc0,0x82,0x90,0x8f,
+0xa7,0xe0,0xff,0xd0,0x82,0xd0,0x83,0x75,0xf0,0x07,0x12,0x89,0x14,0xe0,0x54,0x01,
+0xc4,0x33,0x54,0xe0,0xfe,0xef,0x4e,0xff,0xe5,0x46,0x25,0xe0,0x24,0x22,0xf8,0xe6,
+0xfc,0x08,0xe6,0x24,0x32,0xf5,0x82,0x74,0x06,0x3c,0xf5,0x83,0xef,0xf0,0x90,0x8f,
+0xa7,0xe0,0xff,0xe5,0x46,0xc4,0x33,0x54,0xe0,0x24,0x00,0xf5,0x82,0xe4,0x34,0x88,
+0xf5,0x83,0xe5,0x82,0x2f,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xe0,0xff,0xe5,0x46,
+0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x33,0xf5,0x82,0x74,0x06,0x3c,
+0xf5,0x83,0xef,0xf0,0x02,0x5f,0x7a,0xe5,0x46,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,
+0x08,0xe6,0xff,0x90,0x8f,0xa7,0xe0,0xf9,0x2f,0xfd,0xe4,0x3e,0xfc,0x74,0x84,0x2d,
+0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xe0,0xfd,0x74,0x30,0x2f,0xf5,0x82,0x74,0x06,
+0x3e,0xf5,0x83,0xed,0xf0,0xe5,0x46,0xc4,0x33,0x54,0xe0,0x24,0x80,0xf5,0x82,0xe4,
+0x34,0x86,0xf5,0x83,0xe5,0x82,0x29,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xe0,0xff,
+0xe5,0x46,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x31,0xf5,0x82,0x74,
+0x06,0x3c,0xf5,0x83,0xef,0xf0,0xe5,0x46,0xc4,0x33,0x54,0xe0,0x24,0x40,0xf5,0x82,
+0xe4,0x34,0x88,0xf5,0x83,0xe5,0x82,0x29,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xe0,
+0xff,0xe5,0x46,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x32,0xf5,0x82,
+0x74,0x06,0x3c,0xf5,0x83,0xef,0xf0,0x74,0x08,0x25,0x46,0xf5,0x82,0xe4,0x34,0x90,
+0xf5,0x83,0xe0,0xff,0xe5,0x46,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,
+0x33,0xf5,0x82,0x74,0x06,0x3c,0xf5,0x83,0xef,0xf0,0x05,0x46,0xe5,0x46,0x64,0x02,
+0x60,0x03,0x02,0x5c,0xac,0x90,0x00,0x18,0xe0,0x90,0x8f,0xaa,0xf0,0x90,0x00,0x1a,
+0xe0,0x90,0x8f,0xab,0xf0,0xe5,0x47,0x54,0xe0,0x64,0x40,0x60,0x03,0x02,0x58,0xe4,
+0xe5,0x47,0x54,0x18,0x13,0x13,0x13,0x54,0x1f,0xf5,0x48,0xe4,0xf5,0x46,0xe5,0x46,
+0xd3,0x94,0x01,0x40,0x03,0x02,0x58,0xe4,0xe5,0x48,0x60,0x03,0x02,0x60,0x4e,0x74,
+0xa8,0x25,0x46,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0xff,0xe5,0x46,0x25,0xe0,
+0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x30,0xf5,0x82,0x74,0x06,0x3c,0xf5,0x83,
+0xef,0xf0,0x74,0x04,0x25,0x46,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xff,0xe5,
+0x46,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x31,0xf5,0x82,0x74,0x06,
+0x3c,0xf5,0x83,0xef,0xf0,0x74,0x0e,0x25,0x46,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,
+0xe0,0xff,0xe5,0x46,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x32,0xf5,
+0x82,0x74,0x06,0x3c,0xf5,0x83,0xef,0xf0,0x74,0xaa,0x25,0x46,0xf5,0x82,0xe4,0x34,
+0x8f,0xf5,0x83,0xe0,0xff,0xe5,0x46,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,
+0x24,0x33,0xf5,0x82,0x74,0x06,0x3c,0xf5,0x83,0xef,0xf0,0x02,0x61,0x1c,0xe5,0x48,
+0x64,0x01,0x70,0x7f,0x74,0xac,0x25,0x46,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,
+0xff,0xe5,0x46,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x30,0xf5,0x82,
+0x74,0x06,0x3c,0xf5,0x83,0xef,0xf0,0x74,0xae,0x25,0x46,0xf5,0x82,0xe4,0x34,0x8f,
+0xf5,0x83,0xe0,0xff,0xe5,0x46,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,
+0x31,0xf5,0x82,0x74,0x06,0x3c,0xf5,0x83,0xef,0xf0,0x74,0x0c,0x25,0x46,0xf5,0x82,
+0xe4,0x34,0x90,0xf5,0x83,0xe0,0xff,0xe5,0x46,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,
+0x08,0xe6,0x24,0x32,0xf5,0x82,0x74,0x06,0x3c,0xf5,0x83,0xef,0xf0,0x74,0x18,0x25,
+0x46,0xf8,0xe6,0xff,0xe5,0x46,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,
+0x33,0x80,0x40,0xe5,0x48,0x64,0x02,0x70,0x43,0x74,0x06,0x25,0x46,0xf5,0x82,0xe4,
+0x34,0x90,0xf5,0x83,0xe0,0xff,0xe5,0x46,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,
+0xe6,0x24,0x30,0xf5,0x82,0x74,0x06,0x3c,0xf5,0x83,0xef,0xf0,0x90,0x90,0x03,0xe0,
+0x13,0x13,0x13,0x54,0x03,0xff,0xe5,0x46,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,
+0xe6,0x24,0x31,0xf5,0x82,0x74,0x06,0x3c,0xf5,0x83,0xef,0xf0,0x05,0x46,0x02,0x5f,
+0xae,0x8f,0x2e,0x90,0x01,0xc4,0x74,0x21,0xf0,0x74,0x61,0xff,0xa3,0xf0,0x74,0xc4,
+0x25,0x25,0xf5,0x82,0x74,0x01,0x35,0x24,0xf5,0x83,0x74,0x21,0xf0,0x74,0xc5,0x25,
+0x25,0xf5,0x82,0x74,0x01,0x35,0x24,0xf5,0x83,0xef,0xf0,0xe4,0xff,0xe5,0x2e,0x25,
+0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0xfd,0xef,0x2d,0xfd,0xe4,0x3c,0xfc,0x74,
+0x3c,0x2d,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xe0,0xfe,0x75,0xf0,0x04,0xe5,0x2e,
+0xa4,0x2f,0xf5,0x82,0xe4,0x35,0xf0,0xf5,0x83,0xe5,0x82,0x24,0xe9,0xf5,0x82,0xe5,
+0x83,0x34,0x8f,0xf5,0x83,0xe0,0xfd,0xee,0x5d,0xfe,0x75,0xf0,0x04,0xe5,0x2e,0xa4,
+0x2f,0xf5,0x82,0xe4,0x35,0xf0,0xf5,0x83,0xe5,0x82,0x24,0xf1,0xf5,0x82,0xe5,0x83,
+0x34,0x8f,0xf5,0x83,0xee,0xf0,0x0f,0xbf,0x04,0xa3,0xe5,0x2e,0x25,0xe0,0x25,0xe0,
+0x24,0xf1,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0x30,0xe0,0x69,0xe5,0x2e,0x25,
+0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x3c,0xf5,0x82,0x74,0x01,0x3e,0xf5,
+0x83,0x74,0x01,0xf0,0x90,0x90,0x9f,0xe0,0x30,0xe0,0x23,0x13,0x13,0x54,0x3f,0x30,
+0xe0,0x1c,0xe4,0x90,0x90,0xa1,0xf0,0x90,0x90,0xa0,0xe0,0x64,0x03,0x60,0x0f,0x7f,
+0x01,0x12,0xaa,0x72,0xef,0x70,0x07,0x7d,0x02,0xaf,0x2e,0x12,0x9b,0x95,0x90,0x90,
+0x99,0xe0,0x30,0xe0,0x21,0x13,0x13,0x54,0x3f,0x30,0xe0,0x1a,0xe4,0x90,0x90,0x9b,
+0xf0,0x90,0x90,0x9a,0xe0,0x64,0x04,0x60,0x0d,0xe4,0xff,0x12,0xaa,0x72,0xef,0x70,
+0x05,0xaf,0x2e,0x12,0xb8,0x8c,0xe5,0x2e,0x25,0xe0,0x25,0xe0,0x24,0xf1,0xf5,0x82,
+0xe4,0x34,0x8f,0xf5,0x83,0xe0,0x30,0xe1,0x1c,0xe5,0x2e,0x25,0xe0,0x24,0x22,0xf8,
+0xe6,0xfe,0x08,0xe6,0x24,0x3c,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x02,0xf0,
+0xaf,0x2e,0x12,0xa5,0xe5,0xe5,0x2e,0x25,0xe0,0x25,0xe0,0x24,0xf1,0xf5,0x82,0xe4,
+0x34,0x8f,0xf5,0x83,0xe0,0x20,0xe2,0x03,0x02,0x62,0xec,0xe5,0x2e,0x25,0xe0,0x24,
+0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x3c,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,
+0x04,0xf0,0xe5,0x2e,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x92,0xf5,
+0x82,0x74,0x06,0x3e,0xf5,0x83,0xe0,0x30,0xe0,0x40,0xe4,0x90,0x90,0xaa,0xf0,0xa3,
+0xf0,0xa3,0x74,0x14,0xf0,0x7d,0x58,0x12,0xbc,0xb1,0xe5,0x2e,0x25,0xe0,0x24,0x22,
+0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x5b,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x05,
+0xf0,0xe5,0x2e,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x92,0xf5,0x82,
+0x74,0x06,0x3e,0xf5,0x83,0x74,0x01,0xf0,0x80,0x12,0x74,0x62,0x25,0x2e,0xf5,0x82,
+0xe4,0x34,0x90,0xf5,0x83,0xe4,0xf0,0xaf,0x2e,0x12,0xb6,0xa2,0xe5,0x2e,0x25,0xe0,
+0x25,0xe0,0x24,0xf1,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0x20,0xe3,0x03,0x02,
+0x63,0x83,0xe5,0x2e,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x3c,0xf5,
+0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x08,0xf0,0xe5,0x2e,0x25,0xe0,0x24,0x22,0xf8,
+0xe6,0xfe,0x08,0xe6,0x24,0x92,0xf5,0x82,0x74,0x06,0x3e,0xf5,0x83,0xe0,0x30,0xe1,
+0x40,0xe4,0x90,0x90,0xaa,0xf0,0xa3,0xf0,0xa3,0x74,0x14,0xf0,0x7d,0x5c,0x12,0xbc,
+0xb1,0xe5,0x2e,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x5f,0xf5,0x82,
+0x74,0x01,0x3e,0xf5,0x83,0x74,0x05,0xf0,0xe5,0x2e,0x25,0xe0,0x24,0x22,0xf8,0xe6,
+0xfe,0x08,0xe6,0x24,0x92,0xf5,0x82,0x74,0x06,0x3e,0xf5,0x83,0x74,0x02,0xf0,0x80,
+0x12,0x74,0x60,0x25,0x2e,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe4,0xf0,0xaf,0x2e,
+0x12,0xb6,0xa2,0xe5,0x2e,0x25,0xe0,0x25,0xe0,0x24,0xf1,0xf5,0x82,0xe4,0x34,0x8f,
+0xf5,0x83,0xe0,0x30,0xe4,0x1c,0xe5,0x2e,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,
+0xe6,0x24,0x3c,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x10,0xf0,0xaf,0x2e,0x12,
+0xae,0x3b,0xe5,0x2e,0x25,0xe0,0x25,0xe0,0x24,0xf1,0xf5,0x82,0xe4,0x34,0x8f,0xf5,
+0x83,0xe0,0x30,0xe5,0x1c,0xe5,0x2e,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,
+0x24,0x3c,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x20,0xf0,0xaf,0x2e,0x12,0x8e,
+0x8c,0xe5,0x2e,0x25,0xe0,0x25,0xe0,0x24,0xf3,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,
+0xe0,0x30,0xe1,0x5d,0xe5,0x2e,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,
+0x3e,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x02,0xf0,0x90,0x90,0x9f,0xe0,0x30,
+0xe0,0x1d,0x90,0x90,0xa3,0x74,0x01,0xf0,0x90,0x90,0xa0,0xe0,0x64,0x03,0x60,0x0f,
+0x7f,0x01,0x12,0xaa,0x72,0xef,0x70,0x07,0x7d,0x02,0xaf,0x2e,0x12,0x9b,0x95,0x90,
+0x90,0x99,0xe0,0x30,0xe0,0x1b,0x90,0x90,0x9d,0x74,0x01,0xf0,0x90,0x90,0x9a,0xe0,
+0x64,0x04,0x60,0x0d,0xe4,0xff,0x12,0xaa,0x72,0xef,0x70,0x05,0xaf,0x2e,0x12,0xb8,
+0x8c,0xe5,0x2e,0x25,0xe0,0x25,0xe0,0x24,0xf3,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,
+0xe0,0x20,0xe0,0x03,0x02,0x64,0xff,0xe5,0x2e,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,
+0x08,0xe6,0x24,0x3e,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x01,0xf0,0x90,0x90,
+0x9f,0xe0,0x30,0xe0,0x1c,0xe4,0x90,0x90,0xa3,0xf0,0x90,0x90,0xa0,0xe0,0x64,0x03,
+0x60,0x0f,0x7f,0x01,0x12,0xaa,0x72,0xef,0x60,0x07,0x7d,0x01,0xaf,0x2e,0x12,0x9b,
+0x95,0x90,0x90,0x99,0xe0,0x30,0xe0,0x57,0xe4,0x90,0x90,0x9d,0xf0,0xff,0x12,0xaa,
+0x72,0xef,0x60,0x4b,0xaf,0x2e,0x12,0xb9,0xd4,0x90,0x90,0x9a,0xe0,0xff,0x64,0x04,
+0x60,0x3d,0xef,0xb4,0x03,0x09,0xe4,0xfd,0xaf,0x2e,0x12,0x93,0x30,0x80,0x17,0x90,
+0x90,0x9a,0xe0,0x64,0x02,0x70,0x28,0xaf,0x2e,0x12,0x9d,0x26,0xef,0x70,0x07,0x7d,
+0x01,0xaf,0x2e,0x12,0x93,0x30,0x74,0x68,0x25,0x2e,0xf5,0x82,0xe4,0x34,0x90,0xf5,
+0x83,0xe0,0xfd,0x7b,0x01,0xaf,0x2e,0x12,0x8a,0xba,0xaf,0x2e,0x12,0x44,0xab,0x90,
+0x01,0xc4,0x74,0x21,0xf0,0x74,0x61,0xff,0xa3,0xf0,0x74,0xc4,0x25,0x25,0xf5,0x82,
+0x74,0x01,0x35,0x24,0xf5,0x83,0x74,0x21,0xf0,0x74,0xc5,0x25,0x25,0xf5,0x82,0x74,
+0x01,0x35,0x24,0xf5,0x83,0xef,0xf0,0x22,0x8f,0x4a,0x8d,0x4b,0xe5,0x4a,0xc4,0x33,
+0x54,0xe0,0x24,0x00,0xf5,0x82,0xe4,0x34,0x88,0xf5,0x83,0xe5,0x82,0x25,0x4b,0xf5,
+0x82,0xe4,0x35,0x83,0xf5,0x83,0xe0,0xff,0x24,0xf9,0x50,0x09,0x24,0xfb,0x24,0xfc,
+0x50,0x33,0x02,0x65,0xdd,0xef,0x25,0xe0,0x25,0xe0,0x24,0x24,0xf5,0x82,0xe4,0x34,
+0x42,0xf5,0x83,0xe4,0x93,0xf5,0x4f,0x74,0x01,0x93,0xf5,0x50,0xef,0x25,0xe0,0x25,
+0xe0,0x24,0x26,0xf5,0x82,0xe4,0x34,0x42,0xf5,0x83,0xe4,0x93,0xf5,0x51,0x74,0x01,
+0x93,0xf5,0x52,0x80,0x58,0xe5,0x4a,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,
+0xfd,0x24,0x53,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xe0,0xfe,0x74,0x52,0x2d,0xf5,
+0x82,0x74,0x04,0x3c,0xf5,0x83,0xe0,0x7c,0x00,0x24,0x00,0xf5,0x52,0xec,0x3e,0xf5,
+0x51,0xe5,0x4a,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0xfd,0x24,0x51,0xf5,
+0x82,0x74,0x04,0x3c,0xf5,0x83,0xe0,0xfe,0x74,0x50,0x2d,0xf5,0x82,0x74,0x04,0x3c,
+0xf5,0x83,0xe0,0x7c,0x00,0x24,0x00,0xf5,0x50,0xec,0x3e,0xf5,0x4f,0x75,0xf0,0xe0,
+0xe5,0x4a,0xa4,0x24,0x05,0xf5,0x82,0xe5,0xf0,0x34,0x89,0xf5,0x83,0x75,0xf0,0x07,
+0xe5,0x4b,0x12,0x89,0x14,0xe0,0x52,0x4f,0xa3,0xe0,0x52,0x50,0x75,0xf0,0xe0,0xe5,
+0x4a,0xa4,0x24,0x03,0xf5,0x82,0xe5,0xf0,0x34,0x89,0xf5,0x83,0x75,0xf0,0x07,0xe5,
+0x4b,0x12,0x89,0x14,0xe0,0x52,0x51,0xa3,0xe0,0x52,0x52,0xe5,0x52,0x45,0x51,0x60,
+0x31,0x75,0x4c,0x0b,0x74,0x01,0x7e,0x00,0xa8,0x4c,0x08,0x80,0x05,0xc3,0x33,0xce,
+0x33,0xce,0xd8,0xf9,0xff,0xe5,0x51,0x5e,0xfe,0xe5,0x52,0x5f,0x4e,0x60,0x08,0xe5,
+0x4c,0x24,0x10,0xf5,0x4d,0x80,0x42,0x15,0x4c,0xe5,0x4c,0xc3,0x94,0x00,0x50,0xd4,
+0x80,0x37,0xe5,0x50,0x45,0x4f,0x60,0x2e,0x75,0x4c,0x0f,0x74,0x01,0x7e,0x00,0xa8,
+0x4c,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x4f,0x5e,0xfe,
+0xe5,0x50,0x5f,0x4e,0x60,0x05,0x85,0x4c,0x4d,0x80,0x0e,0x15,0x4c,0xe5,0x4c,0xc3,
+0x94,0x00,0x50,0xd7,0x80,0x03,0xe4,0xf5,0x4d,0xe5,0x50,0x45,0x4f,0x60,0x2c,0xe4,
+0xf5,0x4c,0x74,0x01,0x7e,0x00,0xa8,0x4c,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,
+0xd8,0xf9,0xff,0xe5,0x4f,0x5e,0xfe,0xe5,0x50,0x5f,0x4e,0x60,0x05,0x85,0x4c,0x4e,
+0x80,0x41,0x05,0x4c,0xe5,0x4c,0xb4,0x10,0xd9,0x80,0x38,0xe5,0x52,0x45,0x51,0x60,
+0x2f,0xe4,0xf5,0x4c,0x74,0x01,0x7e,0x00,0xa8,0x4c,0x08,0x80,0x05,0xc3,0x33,0xce,
+0x33,0xce,0xd8,0xf9,0xff,0xe5,0x51,0x5e,0xfe,0xe5,0x52,0x5f,0x4e,0x60,0x08,0xe5,
+0x4c,0x24,0x10,0xf5,0x4e,0x80,0x0c,0x05,0x4c,0xe5,0x4c,0xb4,0x0c,0xd6,0x80,0x03,
+0xe4,0xf5,0x4e,0xe5,0x4d,0x65,0x4e,0x70,0x5b,0xe5,0x4d,0x70,0x57,0xe5,0x4a,0xc4,
+0x33,0x54,0xe0,0x24,0x00,0xf5,0x82,0xe4,0x34,0x88,0xf5,0x83,0xe5,0x82,0x25,0x4b,
+0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xe0,0xb4,0x07,0x00,0x50,0x37,0x90,0x67,0x24,
+0xf8,0x28,0x28,0x73,0x02,0x67,0x45,0x02,0x67,0x3b,0x02,0x67,0x45,0x02,0x67,0x3d,
+0x02,0x67,0x45,0x02,0x67,0x47,0x02,0x67,0x45,0x80,0x14,0x80,0x0a,0x75,0x4d,0x0c,
+0x75,0x4e,0x0c,0x80,0x0f,0x80,0x08,0x75,0x4d,0x04,0x75,0x4e,0x04,0x80,0x05,0xe4,
+0xf5,0x4d,0xf5,0x4e,0x75,0xf0,0xe0,0xe5,0x4a,0xa4,0x24,0x07,0xf5,0x82,0xe5,0xf0,
+0x34,0x89,0xf5,0x83,0x75,0xf0,0x07,0xe5,0x4b,0x12,0x89,0x14,0xe5,0x4d,0xf0,0x75,
+0xf0,0xe0,0xe5,0x4a,0xa4,0x24,0x08,0xf5,0x82,0xe5,0xf0,0x34,0x89,0xf5,0x83,0x75,
+0xf0,0x07,0xe5,0x4b,0x12,0x89,0x14,0xe5,0x4e,0xf0,0xe5,0x4a,0x25,0xe0,0x24,0x22,
+0xf8,0xe6,0xfe,0x08,0xe6,0x25,0x4b,0xff,0xe4,0x3e,0xfe,0x74,0x84,0x2f,0xf5,0x82,
+0x74,0x04,0x3e,0xf5,0x83,0xe0,0xd3,0x95,0x4d,0x40,0x1f,0xe5,0x4a,0xc4,0x33,0x54,
+0xe0,0x24,0x45,0xf5,0x82,0xe4,0x34,0x8e,0xf5,0x83,0xe5,0x82,0x25,0x4b,0xf5,0x82,
+0xe4,0x35,0x83,0xf5,0x83,0xe5,0x4d,0x12,0xb9,0x7d,0xe5,0x4a,0x25,0xe0,0x24,0x22,
+0xf8,0xe6,0xfe,0x08,0xe6,0x25,0x4b,0xff,0xe4,0x3e,0xfe,0x74,0x84,0x2f,0xf5,0x82,
+0x74,0x04,0x3e,0xf5,0x83,0xe0,0xc3,0x95,0x4e,0x50,0x1f,0xe5,0x4a,0xc4,0x33,0x54,
+0xe0,0x24,0x45,0xf5,0x82,0xe4,0x34,0x8e,0xf5,0x83,0xe5,0x82,0x25,0x4b,0xf5,0x82,
+0xe4,0x35,0x83,0xf5,0x83,0xe5,0x4e,0x12,0xb9,0x7d,0xad,0x4b,0xaf,0x4a,0x12,0x99,
+0xef,0xe5,0x4d,0xd3,0x94,0x13,0x40,0x10,0x74,0x01,0x25,0x4a,0xf5,0x82,0xe4,0x34,
+0x89,0xf5,0x83,0x74,0x03,0xf0,0x80,0x39,0xe5,0x4d,0xd3,0x94,0x0b,0x40,0x10,0x74,
+0x01,0x25,0x4a,0xf5,0x82,0xe4,0x34,0x89,0xf5,0x83,0x74,0x02,0xf0,0x80,0x22,0xe5,
+0x4d,0xd3,0x94,0x03,0x74,0x01,0x40,0x0e,0x25,0x4a,0xf5,0x82,0xe4,0x34,0x89,0xf5,
+0x83,0x74,0x01,0xf0,0x80,0x0b,0x25,0x4a,0xf5,0x82,0xe4,0x34,0x89,0xf5,0x83,0xe4,
+0xf0,0xe5,0x4a,0x75,0xf0,0x40,0xa4,0x24,0x05,0xf5,0x82,0xe4,0x34,0x8d,0xf5,0x83,
+0x75,0xf0,0x02,0xe5,0x4b,0x12,0x89,0x14,0xe5,0x4f,0xf0,0xa3,0xe5,0x50,0xf0,0xe5,
+0x4a,0x75,0xf0,0x40,0xa4,0x24,0x80,0xf5,0x82,0xe4,0x34,0x87,0xf5,0x83,0x75,0xf0,
+0x02,0xe5,0x4b,0x12,0x89,0x14,0xe5,0x51,0xf0,0xa3,0xe5,0x52,0xf0,0x22,0x8f,0x53,
+0x7b,0x18,0xe4,0xfd,0xff,0x12,0x96,0x5c,0x8f,0x4e,0x8e,0x4d,0x8d,0x4c,0x8c,0x4b,
+0x7b,0x0b,0xe4,0xfd,0xff,0x12,0x96,0x5c,0x90,0x8f,0xbf,0x12,0x88,0xd7,0x7b,0x18,
+0xe4,0xfd,0x7f,0x01,0x12,0x96,0x5c,0x8f,0x52,0x8e,0x51,0x8d,0x50,0x8c,0x4f,0x7b,
+0x0b,0xe4,0xfd,0x7f,0x01,0x12,0x96,0x5c,0x90,0x8f,0xc3,0x12,0x88,0xd7,0xe5,0x53,
+0x64,0x01,0x7d,0x33,0x7c,0x0b,0x70,0x1f,0xff,0x12,0xba,0xbd,0xef,0x44,0x08,0xfb,
+0x7d,0x33,0x7c,0x0b,0xe4,0xff,0x12,0xbb,0x8e,0x7d,0x33,0x7c,0x0b,0x7f,0x01,0x12,
+0xba,0xbd,0xef,0x44,0x08,0x80,0x1e,0xe4,0xff,0x12,0xba,0xbd,0xef,0x54,0xf7,0xfb,
+0x7d,0x33,0x7c,0x0b,0xe4,0xff,0x12,0xbb,0x8e,0x7d,0x33,0x7c,0x0b,0x7f,0x01,0x12,
+0xba,0xbd,0xef,0x54,0xf7,0xfb,0x7d,0x33,0x7c,0x0b,0x7f,0x01,0x12,0xbb,0x8e,0x85,
+0x4e,0x65,0xaf,0x4e,0xae,0x4d,0xad,0x4c,0xac,0x4b,0x78,0x08,0x12,0x88,0xb1,0x8f,
+0x66,0xaf,0x4e,0xae,0x4d,0xad,0x4c,0xac,0x4b,0x78,0x10,0x12,0x88,0xb1,0x8f,0x67,
+0x7b,0x18,0xe4,0xfd,0xff,0x12,0xb1,0x6d,0x90,0x8f,0xbf,0xa3,0xa3,0xa3,0xe0,0xf5,
+0x65,0x90,0x8f,0xbf,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x78,
+0x08,0x12,0x88,0xb1,0x8f,0x66,0x90,0x8f,0xbf,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,
+0xfe,0xa3,0xe0,0xff,0x78,0x10,0x12,0x88,0xb1,0x8f,0x67,0x7b,0x0b,0xe4,0xfd,0xff,
+0x12,0xb1,0x6d,0x85,0x52,0x65,0xaf,0x52,0xae,0x51,0xad,0x50,0xac,0x4f,0x78,0x08,
+0x12,0x88,0xb1,0x8f,0x66,0xaf,0x52,0xae,0x51,0xad,0x50,0xac,0x4f,0x78,0x10,0x12,
+0x88,0xb1,0x8f,0x67,0x7b,0x18,0xe4,0xfd,0x7f,0x01,0x12,0xb1,0x6d,0x90,0x8f,0xc3,
+0xa3,0xa3,0xa3,0xe0,0xf5,0x65,0x90,0x8f,0xc3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,
+0xfe,0xa3,0xe0,0xff,0x78,0x08,0x12,0x88,0xb1,0x8f,0x66,0x90,0x8f,0xc3,0xe0,0xfc,
+0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x78,0x10,0x12,0x88,0xb1,0x8f,0x67,
+0x7b,0x0b,0xe4,0xfd,0x7f,0x01,0x12,0xb1,0x6d,0xad,0x4e,0xe4,0xff,0x12,0x81,0x54,
+0xad,0x52,0x7f,0x01,0x12,0x81,0x54,0xe5,0x53,0x75,0xf0,0x14,0xa4,0x24,0x62,0xf5,
+0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0xfb,0xc0,0x03,0x7d,0x31,0x7c,0x0e,0xe4,0xff,
+0x12,0xba,0xbd,0xef,0x54,0xfc,0xff,0xe5,0x53,0x75,0xf0,0x14,0xa4,0x24,0x63,0xf5,
+0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0x4f,0xff,0xc0,0x07,0xe5,0x53,0x75,0xf0,0x14,
+0xa4,0x24,0x64,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0xff,0xc0,0x07,0x7d,0x33,
+0x7c,0x0e,0xe4,0xff,0x12,0xba,0xbd,0xef,0x54,0xfc,0xff,0xe5,0x53,0x75,0xf0,0x14,
+0xa4,0x24,0x65,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0x4f,0xf5,0x61,0xd0,0x60,
+0xd0,0x5f,0xd0,0x03,0x7d,0x30,0x7c,0x0e,0xe4,0xff,0x12,0xab,0xcc,0xe5,0x53,0x75,
+0xf0,0x14,0xa4,0x24,0x66,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0xfb,0xe5,0x53,
+0x75,0xf0,0x14,0xa4,0x24,0x67,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0xff,0xe5,
+0x53,0x75,0xf0,0x14,0xa4,0x24,0x68,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0xfe,
+0xe5,0x53,0x75,0xf0,0x14,0xa4,0x24,0x69,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,
+0xf5,0x61,0x8e,0x60,0x8f,0x5f,0x7d,0x14,0x7c,0x0c,0xe4,0xff,0x12,0xab,0xcc,0xe5,
+0x53,0x75,0xf0,0x14,0xa4,0x24,0x6a,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0xfb,
+0x7d,0xa3,0x7c,0x0c,0xe4,0xff,0x12,0xbb,0x8e,0xe5,0x53,0x75,0xf0,0x14,0xa4,0x24,
+0x6b,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0xfb,0xe5,0x53,0x75,0xf0,0x14,0xa4,
+0x24,0x6c,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0xff,0xe5,0x53,0x75,0xf0,0x14,
+0xa4,0x24,0x6d,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0xfe,0xe5,0x53,0x75,0xf0,
+0x14,0xa4,0x24,0x6e,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0xf5,0x61,0x8e,0x60,
+0x8f,0x5f,0x7d,0x80,0x7c,0x0c,0x7f,0x01,0x12,0xab,0xcc,0x7d,0x4f,0x7c,0x0c,0x7f,
+0x01,0x12,0xba,0xbd,0xef,0x54,0xf0,0xff,0xe5,0x53,0x75,0xf0,0x14,0xa4,0x24,0x6f,
+0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0x4f,0xfb,0x7d,0x4f,0x7c,0x0c,0x7f,0x01,
+0x12,0xbb,0x8e,0xe5,0x53,0x75,0xf0,0x14,0xa4,0x24,0x70,0xf5,0x82,0xe4,0x34,0x8f,
+0xf5,0x83,0xe0,0xfb,0x7d,0x97,0x7c,0x0c,0x7f,0x01,0x12,0xbb,0x8e,0xe5,0x53,0x75,
+0xf0,0x14,0xa4,0x24,0x71,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0xfb,0xe5,0x53,
+0x75,0xf0,0x14,0xa4,0x24,0x72,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0xff,0xe5,
+0x53,0x75,0xf0,0x14,0xa4,0x24,0x73,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0xfe,
+0xe5,0x53,0x75,0xf0,0x14,0xa4,0x24,0x74,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,
+0xf5,0x61,0x8e,0x60,0x8f,0x5f,0x7d,0x14,0x7c,0x0c,0x7f,0x01,0x12,0xab,0xcc,0xe5,
+0x53,0x75,0xf0,0x14,0xa4,0x24,0x75,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0xfb,
+0x7d,0xa3,0x7c,0x0c,0x7f,0x01,0x02,0xbb,0x8e,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,
+0x90,0x8f,0xbf,0xef,0xf0,0x8b,0x4a,0x8a,0x4b,0x89,0x4c,0xe4,0xf5,0x4d,0x12,0x34,
+0x05,0xc3,0x13,0x20,0xe0,0x03,0x02,0x6d,0x69,0x12,0x34,0x05,0xff,0x54,0x02,0xfe,
+0x90,0x90,0x9f,0xe0,0x54,0xfd,0x4e,0xfe,0xf0,0xef,0x54,0x01,0xff,0xee,0x54,0xfe,
+0x4f,0xff,0xf0,0x12,0x34,0x05,0xfe,0x54,0x08,0xfd,0xef,0x54,0xf7,0x4d,0xff,0x90,
+0x90,0x9f,0xf0,0xee,0x54,0x10,0xfe,0xef,0x54,0xef,0x4e,0xff,0xf0,0x12,0x34,0x05,
+0xfe,0x54,0x20,0xfd,0xef,0x54,0xdf,0x4d,0xff,0x90,0x90,0x9f,0xf0,0xee,0x54,0x40,
+0xfe,0xef,0x54,0xbf,0x4e,0xf0,0x20,0xe0,0x03,0x02,0x6d,0x44,0x75,0x4d,0x21,0x12,
+0x34,0x05,0xff,0x13,0x13,0x54,0x01,0xfe,0x90,0x90,0x9f,0xe0,0xfd,0x13,0x13,0x54,
+0x01,0x6e,0x60,0x44,0xef,0x54,0x04,0xff,0xed,0x54,0xfb,0x4f,0xf0,0xe0,0x13,0x13,
+0x54,0x3f,0x30,0xe0,0x22,0x90,0x8f,0xbf,0xe0,0xff,0x25,0xe0,0x24,0x22,0xf8,0xe6,
+0xfc,0x08,0xe6,0x24,0x34,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0x74,0x40,0xf0,0xfb,
+0xe4,0xfd,0x12,0xb7,0xba,0x80,0x11,0xe4,0x90,0x90,0xa1,0xf0,0x90,0x8f,0xbf,0xe0,
+0xff,0x7b,0x40,0xe4,0xfd,0x12,0xb7,0x16,0x90,0x90,0x9f,0xe0,0xff,0x13,0x13,0x13,
+0x54,0x1f,0x30,0xe0,0x03,0x43,0x4d,0x12,0xef,0xc4,0x54,0x0f,0x30,0xe0,0x03,0x43,
+0x4d,0x14,0x90,0x90,0x9f,0xe0,0xc4,0x13,0x54,0x07,0x30,0xe0,0x03,0x43,0x4d,0x80,
+0x90,0x90,0x9f,0xe0,0xc4,0x13,0x13,0x54,0x03,0x20,0xe0,0x03,0x43,0x4d,0x40,0x90,
+0x8f,0xbf,0xe0,0xff,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x27,0xf5,
+0x82,0x74,0x05,0x3c,0xf5,0x83,0xe5,0x4d,0xf0,0x90,0x90,0xa0,0xe0,0x70,0x05,0x7d,
+0x01,0x12,0x9b,0x95,0x90,0x90,0x9f,0xe0,0xc4,0x13,0x13,0x54,0x03,0x30,0xe0,0x09,
+0x90,0x8f,0xbf,0xe0,0xff,0x7d,0x03,0x80,0x15,0x7f,0x01,0x12,0xaa,0x72,0xef,0x90,
+0x8f,0xbf,0x60,0x06,0xe0,0xff,0x7d,0x01,0x80,0x04,0xe0,0xff,0x7d,0x02,0x12,0x9b,
+0x95,0x02,0x6f,0x03,0x75,0x4d,0x01,0x90,0x8f,0xbf,0xe0,0xff,0x25,0xe0,0x24,0x22,
+0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x27,0xf5,0x82,0x74,0x05,0x3c,0xf5,0x83,0xe5,0x4d,
+0xf0,0xe4,0xfd,0x12,0x9b,0x95,0x02,0x6f,0x00,0xab,0x4a,0xaa,0x4b,0xa9,0x4c,0x12,
+0x34,0x05,0xff,0x54,0x02,0xfe,0x90,0x90,0x99,0xe0,0x54,0xfd,0x4e,0xfe,0xf0,0xef,
+0x54,0x01,0xff,0xee,0x54,0xfe,0x4f,0xff,0xf0,0x12,0x34,0x05,0xfe,0x54,0x08,0xfd,
+0xef,0x54,0xf7,0x4d,0xff,0x90,0x90,0x99,0xf0,0xee,0x54,0x10,0xfe,0xef,0x54,0xef,
+0x4e,0xff,0xf0,0x12,0x34,0x05,0xfe,0x54,0x40,0xfd,0xef,0x54,0xbf,0x4d,0x90,0x90,
+0x99,0xf0,0x20,0xe0,0x03,0x02,0x6e,0xab,0x75,0x4d,0x31,0xee,0x13,0x13,0x54,0x01,
+0xff,0xe0,0xfe,0x13,0x13,0x54,0x01,0x6f,0x60,0x27,0x12,0x34,0x05,0x54,0x04,0xff,
+0xee,0x54,0xfb,0x4f,0x90,0x90,0x99,0xf0,0xe0,0x13,0x13,0x54,0x3f,0x20,0xe0,0x11,
+0xe4,0x90,0x90,0x9b,0xf0,0x90,0x8f,0xbf,0xe0,0xff,0x7b,0x40,0xe4,0xfd,0x12,0xb7,
+0x16,0x90,0x90,0x99,0xe0,0xff,0x13,0x13,0x13,0x54,0x1f,0x30,0xe0,0x03,0x43,0x4d,
+0x02,0xef,0xc4,0x54,0x0f,0x30,0xe0,0x03,0x43,0x4d,0x04,0xe5,0x4d,0x54,0x06,0x60,
+0x20,0x90,0x8f,0xbf,0xe0,0xff,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,
+0x3e,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0x74,0x03,0xf0,0xfb,0x7d,0x02,0x12,0xb0,
+0xc3,0x90,0x8f,0xbf,0xe0,0xff,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,
+0x27,0xf5,0x82,0x74,0x05,0x3c,0xf5,0x83,0xe5,0x4d,0xf0,0x90,0x90,0x99,0xe0,0xfe,
+0xc4,0x13,0x13,0x54,0x03,0x30,0xe0,0x11,0xa3,0xe0,0x64,0x04,0x70,0x03,0x02,0x6f,
+0x03,0x7d,0x04,0x12,0x93,0x30,0x02,0x6f,0x03,0x90,0x90,0x9a,0xe0,0x64,0x04,0x70,
+0x30,0x90,0x8f,0xbf,0xe0,0xff,0x7d,0x01,0x12,0x93,0x30,0xe4,0xff,0x12,0xaa,0x72,
+0xef,0x90,0x8f,0xbf,0x60,0x14,0xe0,0xff,0x24,0x68,0xf5,0x82,0xe4,0x34,0x90,0xf5,
+0x83,0xe0,0xfd,0x7b,0x01,0x12,0x8a,0xba,0x80,0x07,0xe0,0xff,0x12,0xb8,0x8c,0x80,
+0x62,0x90,0x8f,0xbf,0xe0,0xff,0x12,0x44,0xab,0x80,0x58,0x75,0x4d,0x01,0x90,0x8f,
+0xbf,0xe0,0xff,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x27,0xf5,0x82,
+0x74,0x05,0x3c,0xf5,0x83,0xe5,0x4d,0xf0,0x7b,0x03,0x7d,0x02,0x12,0xaf,0xb9,0x90,
+0x90,0x9a,0xe0,0xb4,0x04,0x09,0x90,0x8f,0xbf,0xe0,0xff,0x7d,0x01,0x80,0x0e,0x90,
+0x90,0x9a,0xe0,0xb4,0x03,0x0a,0x90,0x8f,0xbf,0xe0,0xff,0xe4,0xfd,0x12,0x93,0x30,
+0x90,0x8f,0xbf,0xe0,0xff,0x12,0xb9,0xaa,0x90,0x8f,0xbf,0xe0,0xff,0x12,0xb6,0xa2,
+0x12,0xb9,0x1d,0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x4a,0xef,0x25,0xe0,0x24,0x22,0xf8,
+0xe6,0xfe,0x08,0xe6,0x24,0x44,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0x74,0x11,0xf0,
+0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x45,0xf5,0x82,0x74,0x04,
+0x3e,0xf5,0x83,0x74,0xf0,0xf0,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,
+0x24,0x46,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0x74,0x0f,0xf0,0xef,0x25,0xe0,0x24,
+0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x47,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xe4,
+0xf0,0xf5,0x4b,0xe5,0x4a,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x25,0x4b,
+0xff,0xe4,0x3e,0xfe,0x74,0xa4,0x2f,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xe4,0xf0,
+0x05,0x4b,0xe5,0x4b,0xb4,0x10,0xdc,0xe4,0xf5,0x4b,0xe4,0xff,0x75,0xf0,0xa0,0xe5,
+0x4a,0xa4,0x24,0x00,0xf5,0x82,0xe5,0xf0,0x34,0x84,0xf5,0x83,0x75,0xf0,0x05,0xe5,
+0x4b,0x12,0x89,0x14,0xe5,0x82,0x2f,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xe4,0xf0,
+0x0f,0xbf,0x05,0xd8,0xe5,0x4a,0xc4,0x33,0x54,0xe0,0x24,0x45,0xf5,0x82,0xe4,0x34,
+0x8e,0xf5,0x83,0xe5,0x82,0x25,0x4b,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0x74,0x13,
+0xf0,0xe5,0x4a,0xc4,0x33,0x54,0xe0,0x24,0xc5,0xf5,0x82,0xe4,0x34,0x8c,0xf5,0x83,
+0xe5,0x82,0x25,0x4b,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xe4,0xf0,0xe5,0x4a,0xc4,
+0x33,0x54,0xe0,0x24,0x40,0xf5,0x82,0xe4,0x34,0x86,0xf5,0x83,0xe5,0x82,0x25,0x4b,
+0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0x74,0xc0,0xf0,0xe5,0x4a,0x75,0xf0,0x40,0xa4,
+0x24,0xc0,0xf5,0x82,0xe4,0x34,0x85,0xf5,0x83,0x75,0xf0,0x02,0xe5,0x4b,0x12,0x89,
+0x14,0xe4,0xf0,0xa3,0xf0,0xe5,0x4a,0x75,0xf0,0x40,0xa4,0x24,0xc3,0xf5,0x82,0xe4,
+0x34,0x8a,0xf5,0x83,0x75,0xf0,0x02,0xe5,0x4b,0x12,0x89,0x14,0xe4,0xf0,0xa3,0xf0,
+0xe5,0x4a,0x75,0xf0,0x40,0xa4,0x24,0x03,0xf5,0x82,0xe4,0x34,0x8c,0xf5,0x83,0x75,
+0xf0,0x02,0xe5,0x4b,0x12,0x89,0x14,0xe4,0xf0,0xa3,0xf0,0xe5,0x4a,0x75,0xf0,0x40,
+0xa4,0x24,0x43,0xf5,0x82,0xe4,0x34,0x8b,0xf5,0x83,0x75,0xf0,0x02,0xe5,0x4b,0x12,
+0x89,0x14,0xe4,0xf0,0xa3,0xf0,0xe5,0x4a,0xc4,0x33,0x54,0xe0,0x24,0x80,0xf5,0x82,
+0xe4,0x34,0x86,0xf5,0x83,0xe5,0x82,0x25,0x4b,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,
+0xe4,0xf0,0xe5,0x4a,0xc4,0x33,0x54,0xe0,0x24,0xc5,0xf5,0x82,0xe4,0x34,0x8d,0xf5,
+0x83,0xe5,0x82,0x25,0x4b,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xe4,0xf0,0xe5,0x4a,
+0xc4,0x33,0x54,0xe0,0x24,0x85,0xf5,0x82,0xe4,0x34,0x8d,0xf5,0x83,0xe5,0x82,0x25,
+0x4b,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xe4,0xf0,0xe5,0x4a,0xc4,0x33,0x54,0xe0,
+0x24,0x05,0xf5,0x82,0xe4,0x34,0x8e,0xf5,0x83,0xe5,0x82,0x25,0x4b,0xf5,0x82,0xe4,
+0x35,0x83,0xf5,0x83,0xe4,0xf0,0x90,0x41,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0x90,
+0x41,0xac,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,
+0xe5,0x4a,0x75,0xf0,0x40,0xa4,0x24,0x80,0xf5,0x82,0xe4,0x34,0x88,0xf5,0x83,0x75,
+0xf0,0x02,0xe5,0x4b,0x12,0x89,0x14,0xee,0xf0,0xa3,0xef,0xf0,0x75,0xf0,0xe0,0xe5,
+0x4a,0xa4,0x24,0x09,0xf5,0x82,0xe5,0xf0,0x34,0x89,0xf5,0x83,0x75,0xf0,0x07,0xe5,
+0x4b,0x12,0x89,0x14,0xe0,0x44,0x02,0xf0,0x75,0xf0,0xe0,0xe5,0x4a,0xa4,0x24,0x09,
+0xf5,0x82,0xe5,0xf0,0x34,0x89,0xf5,0x83,0x75,0xf0,0x07,0xe5,0x4b,0x12,0x89,0x14,
+0xe0,0x44,0x01,0xf0,0xe5,0x4a,0xc4,0x33,0x54,0xe0,0x24,0x00,0xf5,0x82,0xe4,0x34,
+0x88,0xf5,0x83,0xe5,0x82,0x25,0x4b,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0x74,0x0c,
+0xf0,0x75,0xf0,0xe0,0xe5,0x4a,0xa4,0x24,0x05,0xf5,0x82,0xe5,0xf0,0x34,0x89,0xf5,
+0x83,0x75,0xf0,0x07,0xe5,0x4b,0x12,0x89,0x14,0x74,0xff,0xf0,0xa3,0xf0,0x75,0xf0,
+0xe0,0xe5,0x4a,0xa4,0x24,0x03,0xf5,0x82,0xe5,0xf0,0x34,0x89,0xf5,0x83,0x75,0xf0,
+0x07,0xe5,0x4b,0x12,0x89,0x14,0xe4,0xf0,0xa3,0x74,0x0f,0xf0,0x75,0xf0,0xe0,0xe5,
+0x4a,0xa4,0x24,0x07,0xf5,0x82,0xe5,0xf0,0x34,0x89,0xf5,0x83,0x75,0xf0,0x07,0xe5,
+0x4b,0x12,0x89,0x14,0x74,0x13,0xf0,0x75,0xf0,0xe0,0xe5,0x4a,0xa4,0x24,0x08,0xf5,
+0x82,0xe5,0xf0,0x34,0x89,0xf5,0x83,0x75,0xf0,0x07,0xe5,0x4b,0x12,0x89,0x14,0xe4,
+0xf0,0xe5,0x4b,0x54,0x1f,0xff,0xe5,0x4a,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,
+0xe6,0x2f,0xff,0xe4,0x3c,0xfe,0x74,0x84,0x2f,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,
+0x74,0x13,0xf0,0x05,0x4b,0xe5,0x4b,0x64,0x20,0x60,0x03,0x02,0x6f,0x8a,0x74,0x08,
+0x25,0x4a,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0x74,0x20,0xf0,0x22,0x8f,0x49,0xef,
+0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0xcc,0xf5,0x82,0x74,0x01,0x3e,
+0xf5,0x83,0xe0,0x54,0x0f,0xff,0x74,0xb1,0x25,0x49,0xf5,0x82,0xe4,0x34,0x8f,0xf5,
+0x83,0xef,0xf0,0x74,0xb1,0x25,0x49,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0xfd,
+0x70,0x03,0x02,0x74,0xeb,0x74,0x0a,0x25,0x49,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,
+0xe0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,
+0xd8,0xf9,0xff,0xef,0x5d,0x70,0x03,0x02,0x74,0xcb,0x74,0x0a,0x25,0x49,0xf5,0x82,
+0xe4,0x34,0x90,0xf5,0x83,0xe0,0x75,0xf0,0x04,0xa4,0xff,0xe5,0x49,0x25,0xe0,0x24,
+0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x2f,0xff,0xe5,0xf0,0x3c,0xfe,0x74,0xd0,0x2f,0xf5,
+0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,0x90,0x8f,0xb3,0xf0,0x75,0x70,0x01,0x75,0x71,
+0x8f,0x75,0x72,0xb3,0x75,0x73,0x01,0x7b,0x01,0x7a,0x8f,0x79,0xb4,0x12,0xae,0xa0,
+0x90,0x8f,0xb4,0xe0,0xf9,0xc4,0x13,0x13,0x13,0x54,0x01,0x20,0xe0,0x03,0x02,0x73,
+0xb1,0x74,0x0a,0x25,0x49,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x75,0xf0,0x02,
+0xa4,0xff,0xe5,0x49,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0xfd,0x2f,0xff,
+0xe5,0xf0,0x3c,0xfe,0x74,0x88,0x2f,0xf5,0x82,0xe4,0x3e,0xf5,0x83,0xe0,0x90,0x8f,
+0xb5,0xf0,0x74,0x0a,0x25,0x49,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x75,0xf0,
+0x02,0xa4,0x2d,0xff,0xe5,0xf0,0x3c,0xfe,0x74,0x89,0x2f,0xf5,0x82,0xe4,0x3e,0xf5,
+0x83,0xe0,0x90,0x8f,0xb6,0xf0,0x74,0x0a,0x25,0x49,0xf5,0x82,0xe4,0x34,0x90,0xf5,
+0x83,0xe0,0x75,0xf0,0x04,0xa4,0xff,0xe5,0x49,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,
+0x08,0xe6,0xfd,0x2f,0xff,0xe5,0xf0,0x3c,0xfe,0x74,0xd1,0x2f,0xf5,0x82,0x74,0x01,
+0x3e,0xf5,0x83,0xe0,0x90,0x8f,0xb7,0xf0,0x74,0x0a,0x25,0x49,0xf5,0x82,0xe4,0x34,
+0x90,0xf5,0x83,0xe0,0x75,0xf0,0x04,0xa4,0x2d,0xff,0xe5,0xf0,0x3c,0xfe,0x74,0xd2,
+0x2f,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,0x90,0x8f,0xb8,0xf0,0x74,0x0a,0x25,
+0x49,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x75,0xf0,0x04,0xa4,0xff,0xe5,0x49,
+0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x2f,0xff,0xe5,0xf0,0x3c,0xfe,0x74,
+0xd3,0x2f,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,0x90,0x8f,0xb9,0xf0,0x02,0x74,
+0x39,0x74,0x0a,0x25,0x49,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x75,0xf0,0x04,
+0xa4,0xff,0xe5,0x49,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0xfd,0x2f,0xff,
+0xe5,0xf0,0x3c,0xfe,0x74,0xd1,0x2f,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,0x90,
+0x8f,0xb5,0xf0,0x74,0x0a,0x25,0x49,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x75,
+0xf0,0x04,0xa4,0x2d,0xff,0xe5,0xf0,0x3c,0xfe,0x74,0xd2,0x2f,0xf5,0x82,0x74,0x01,
+0x3e,0xf5,0x83,0xe0,0x90,0x8f,0xb6,0xf0,0x74,0x0a,0x25,0x49,0xf5,0x82,0xe4,0x34,
+0x90,0xf5,0x83,0xe0,0x75,0xf0,0x04,0xa4,0xff,0xe5,0x49,0x25,0xe0,0x24,0x22,0xf8,
+0xe6,0xfc,0x08,0xe6,0x2f,0xff,0xe5,0xf0,0x3c,0xfe,0x74,0xd3,0x2f,0xf5,0x82,0x74,
+0x01,0x3e,0xf5,0x83,0xe0,0x90,0x8f,0xb7,0xf0,0xe9,0x54,0x7f,0xff,0x7b,0x01,0x7a,
+0x8f,0x79,0xb5,0x90,0x8f,0xbe,0xe5,0x49,0xf0,0x12,0x7b,0xcf,0x74,0xb1,0x25,0x49,
+0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x74,0x0a,0x25,
+0x49,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xfe,0x74,0x01,0xa8,0x06,0x08,0x80,
+0x02,0xc3,0x33,0xd8,0xfc,0xf4,0x5f,0xd0,0x82,0xd0,0x83,0xf0,0x74,0x0a,0x25,0x49,
+0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,
+0xc3,0x33,0xd8,0xfc,0xff,0xe5,0x49,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,
+0x24,0xcc,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xef,0xf0,0x74,0x0a,0x25,0x49,0xf5,
+0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x04,0xf0,0x74,0x0a,0x25,0x49,0xf5,0x82,0xe4,
+0x34,0x90,0xf5,0x83,0xe0,0x54,0x03,0xf0,0x02,0x72,0x43,0x74,0xc6,0x25,0x23,0xf5,
+0x82,0x74,0x01,0x35,0x22,0xf5,0x83,0xe0,0x44,0x02,0xf0,0x74,0xc6,0x25,0x25,0xf5,
+0x82,0x74,0x01,0x35,0x24,0xf5,0x83,0xe0,0x44,0x02,0xf0,0x22,0x8f,0x54,0x8d,0x55,
+0x12,0xbc,0x49,0xef,0x54,0x7f,0xf5,0x56,0x54,0x1f,0xf5,0x57,0x75,0xf0,0xe0,0xe5,
+0x54,0xa4,0x24,0x07,0xf5,0x82,0xe5,0xf0,0x34,0x89,0xf5,0x83,0x75,0xf0,0x07,0xe5,
+0x55,0x12,0x89,0x14,0xe0,0xff,0x90,0x8f,0xbc,0xf0,0xe5,0x54,0x75,0xf0,0x40,0xa4,
+0x24,0x80,0xf5,0x82,0xe4,0x34,0x87,0xf5,0x83,0x75,0xf0,0x02,0xe5,0x55,0x12,0x89,
+0x14,0xe0,0xfd,0xa3,0xe0,0x90,0x8f,0xbd,0xcd,0xf0,0xa3,0xed,0xf0,0xe5,0x54,0x75,
+0xf0,0x40,0xa4,0x24,0x05,0xf5,0x82,0xe4,0x34,0x8d,0xf5,0x83,0x75,0xf0,0x02,0xe5,
+0x55,0x12,0x89,0x14,0xe0,0xfd,0xa3,0xe0,0x90,0x8f,0xbf,0xcd,0xf0,0xa3,0xed,0xf0,
+0xe5,0x57,0x25,0xe0,0x24,0x76,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfc,
+0x74,0x01,0x93,0xfd,0xe5,0x54,0x75,0xf0,0x40,0xa4,0x24,0x80,0xf5,0x82,0xe4,0x34,
+0x88,0xf5,0x83,0x75,0xf0,0x02,0xe5,0x55,0x12,0x89,0x14,0xec,0xf0,0xa3,0xed,0xf0,
+0xe5,0x57,0xc3,0x9f,0x40,0x03,0x02,0x76,0x61,0xe5,0x54,0xc4,0x33,0x54,0xe0,0x24,
+0x85,0xf5,0x82,0xe4,0x34,0x8e,0xf5,0x83,0xe5,0x82,0x25,0x55,0xf5,0x82,0xe4,0x35,
+0x83,0xf5,0x83,0xe5,0x57,0xf0,0x04,0x90,0x8f,0xbb,0xf0,0x90,0x8f,0xbc,0xe0,0xff,
+0x90,0x8f,0xbb,0xe0,0xfe,0xd3,0x9f,0x40,0x03,0x02,0x76,0xb2,0xee,0xc3,0x94,0x10,
+0x40,0x21,0xee,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,
+0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x8f,0xbd,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,
+0x4e,0x70,0x27,0x90,0x8f,0xbb,0xe0,0xff,0xc3,0x94,0x10,0x50,0x5b,0x74,0x01,0x7e,
+0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x8f,
+0xbf,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x3e,0x90,0x8f,0xbb,0xe0,0xb4,0x11,
+0x0d,0x90,0x8f,0xbe,0xe0,0x30,0xe7,0x06,0x90,0x8f,0xbb,0x74,0x17,0xf0,0x90,0x8f,
+0xbb,0xe0,0xff,0x64,0x13,0x60,0x09,0xef,0x64,0x12,0x60,0x04,0xef,0xb4,0x11,0x0d,
+0x90,0x8f,0xbd,0xe0,0x30,0xe0,0x06,0x90,0x8f,0xbb,0x74,0x18,0xf0,0x90,0x8f,0xbb,
+0xe0,0xf5,0x57,0x85,0x57,0x56,0x80,0x5a,0x90,0x8f,0xbb,0xe0,0x04,0xf0,0x02,0x75,
+0xbb,0x90,0x8f,0xbc,0xe0,0x65,0x57,0x60,0x03,0x02,0x76,0xff,0xe5,0x54,0xc4,0x33,
+0x54,0xe0,0x24,0x85,0xf5,0x82,0xe4,0x34,0x8e,0xf5,0x83,0xe5,0x82,0x25,0x55,0xf5,
+0x82,0xe4,0x35,0x83,0xf5,0x83,0xe5,0x57,0xf0,0x75,0xf0,0xe0,0xe5,0x54,0xa4,0x24,
+0x09,0xf5,0x82,0xe5,0xf0,0x34,0x89,0xf5,0x83,0x75,0xf0,0x07,0xe5,0x55,0x12,0x89,
+0x14,0xe0,0x30,0xe0,0x0d,0xe5,0x56,0x30,0xe6,0x02,0xff,0x22,0xe5,0x57,0x44,0x40,
+0xf5,0x56,0xe5,0x57,0x25,0xe0,0x24,0xae,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,
+0x93,0xfe,0x74,0x01,0x93,0xff,0xe5,0x57,0x25,0xe0,0x24,0x76,0xf5,0x82,0xe4,0x34,
+0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,
+0xff,0xe5,0x54,0x75,0xf0,0x40,0xa4,0x24,0x80,0xf5,0x82,0xe4,0x34,0x88,0xf5,0x83,
+0x75,0xf0,0x02,0xe5,0x55,0x12,0x89,0x14,0xee,0xf0,0xa3,0xef,0xf0,0x80,0x78,0x90,
+0x8f,0xbc,0xe0,0xff,0xe5,0x57,0xd3,0x9f,0x40,0x6d,0xe5,0x54,0xc4,0x33,0x54,0xe0,
+0x24,0x85,0xf5,0x82,0xe4,0x34,0x8e,0xf5,0x83,0xe5,0x82,0x25,0x55,0xf5,0x82,0xe4,
+0x35,0x83,0xf5,0x83,0xef,0xf0,0x8f,0x57,0x8f,0x56,0xef,0x25,0xe0,0x24,0xae,0xf5,
+0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xe5,0x57,0x25,
+0xe0,0x24,0x76,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,
+0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xe5,0x54,0x75,0xf0,0x40,0xa4,0x24,0x80,
+0xf5,0x82,0xe4,0x34,0x88,0xf5,0x83,0x75,0xf0,0x02,0xe5,0x55,0x12,0x89,0x14,0xee,
+0xf0,0xa3,0xef,0xf0,0xaf,0x56,0x22,0xe5,0x54,0xc4,0x33,0x54,0xe0,0x24,0x80,0xf5,
+0x82,0xe4,0x34,0x86,0xf5,0x83,0xe5,0x82,0x25,0x55,0xf5,0x82,0xe4,0x35,0x83,0xf5,
+0x83,0xe4,0xf0,0xe5,0x56,0x44,0x80,0xfb,0xad,0x55,0xaf,0x54,0x12,0xb9,0x83,0xad,
+0x55,0xaf,0x54,0x12,0x99,0xef,0xe5,0x56,0x44,0x80,0xff,0x22,0xa9,0x07,0x90,0x90,
+0x75,0xe0,0xc3,0x94,0x14,0x50,0x06,0xe0,0x04,0xf0,0x02,0x79,0x50,0x90,0x90,0x75,
+0xe0,0x64,0x14,0x60,0x03,0x02,0x79,0x50,0x90,0x90,0x7e,0xe0,0x70,0x35,0x90,0x90,
+0x81,0xe0,0x70,0x2f,0x90,0x90,0x7f,0xe0,0x70,0x29,0x90,0x90,0x82,0xe0,0x70,0x23,
+0x90,0x90,0x80,0xe0,0x70,0x1d,0x90,0x90,0x83,0xe0,0x70,0x17,0xe9,0x25,0xe0,0x24,
+0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0xfd,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xe0,
+0x54,0xfe,0xf0,0x90,0x90,0x7e,0xe0,0xfe,0xe9,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,
+0x08,0xe6,0x24,0x44,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xee,0xf0,0x90,0x90,0x7f,
+0xe0,0xfe,0xe9,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x45,0xf5,0x82,
+0x74,0x04,0x3c,0xf5,0x83,0xee,0xf0,0x90,0x90,0x80,0xe0,0xfe,0xe9,0x25,0xe0,0x24,
+0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x46,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xee,
+0xf0,0xe9,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x47,0xf5,0x82,0x74,
+0x04,0x3c,0xf5,0x83,0xe4,0xf0,0x90,0x90,0x81,0xe0,0xfe,0xe9,0x25,0xe0,0x24,0x22,
+0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x48,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xee,0xf0,
+0x90,0x90,0x82,0xe0,0xfe,0xe9,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,
+0x49,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xee,0xf0,0x90,0x90,0x83,0xe0,0xfe,0xe9,
+0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x4a,0xf5,0x82,0x74,0x04,0x3c,
+0xf5,0x83,0xee,0xf0,0xe9,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x4b,
+0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xe4,0xf0,0x90,0x90,0x70,0xe0,0xfe,0xe9,0x25,
+0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x4c,0xf5,0x82,0x74,0x04,0x3c,0xf5,
+0x83,0xee,0xf0,0x90,0x90,0x71,0xe0,0xfe,0xe9,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,
+0x08,0xe6,0x24,0x4d,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xee,0xf0,0x90,0x90,0x72,
+0xe0,0xfe,0xe9,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x4e,0xf5,0x82,
+0x74,0x04,0x3c,0xf5,0x83,0xee,0xf0,0x90,0x90,0x73,0xe0,0xfe,0xe9,0x25,0xe0,0x24,
+0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x4f,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xee,
+0xf0,0xe4,0x90,0x90,0x75,0xf0,0x90,0x90,0x70,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,
+0xa3,0xf0,0x90,0x90,0x7e,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,
+0xe9,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0xfd,0x24,0x60,0xf5,0x82,0x74,
+0x05,0x3c,0xf5,0x83,0xe0,0x90,0x8f,0xb1,0xf0,0x74,0x61,0x2d,0xf5,0x82,0x74,0x05,
+0x3c,0xf5,0x83,0xe0,0x90,0x8f,0xb2,0xf0,0xe9,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,
+0x08,0xe6,0xfd,0x24,0x62,0xf5,0x82,0x74,0x05,0x3c,0xf5,0x83,0xe0,0x90,0x8f,0xb3,
+0xf0,0x74,0x63,0x2d,0xf5,0x82,0x74,0x05,0x3c,0xf5,0x83,0xe0,0x90,0x8f,0xb4,0xf0,
+0x90,0x90,0x87,0xe0,0xfe,0x90,0x8f,0xb4,0xe0,0xfd,0xd3,0x9e,0x50,0x0b,0x90,0x90,
+0x87,0xe0,0xc3,0x9d,0xd3,0x94,0x01,0x40,0x13,0x90,0x90,0x77,0xe0,0xaf,0x01,0xb4,
+0x01,0x02,0x80,0x03,0x90,0x90,0x7d,0xe0,0xfd,0x12,0xa8,0x03,0x22,0x8f,0x6c,0x7d,
+0x78,0x7c,0x08,0x12,0x8d,0x4d,0xe5,0x6c,0x75,0xf0,0x14,0xa4,0x24,0x22,0xf5,0x82,
+0xe4,0x34,0x90,0xf5,0x83,0x12,0x88,0xd7,0x7d,0x04,0x7c,0x0c,0xaf,0x6c,0x12,0x8d,
+0x4d,0xe5,0x6c,0x75,0xf0,0x14,0xa4,0x24,0x26,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,
+0x12,0x88,0xd7,0x7d,0x00,0x7c,0x08,0xaf,0x6c,0x12,0x8d,0x4d,0xe5,0x6c,0x75,0xf0,
+0x14,0xa4,0x24,0x2a,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0x12,0x88,0xd7,0x7d,0x30,
+0x7c,0x0b,0xaf,0x6c,0x12,0x8d,0x4d,0xe5,0x6c,0x75,0xf0,0x14,0xa4,0x24,0x2e,0xf5,
+0x82,0xe4,0x34,0x90,0xf5,0x83,0x12,0x88,0xd7,0xe4,0xfb,0xe5,0x6c,0x75,0xf0,0x14,
+0xa4,0x24,0x22,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,
+0xe0,0xfe,0xa3,0xe0,0x54,0xc7,0xff,0xed,0x54,0xc7,0xfd,0xeb,0x75,0xf0,0x08,0xa4,
+0xf9,0xf8,0x12,0x88,0xb1,0x74,0xe5,0x2b,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xef,
+0xf0,0x0b,0xbb,0x04,0xc6,0x90,0x8f,0xe5,0xe0,0xfb,0xa3,0xe0,0xf5,0x5f,0xa3,0xe0,
+0xf5,0x60,0xa3,0xe0,0xf5,0x61,0x7d,0x78,0x7c,0x08,0xaf,0x6c,0x12,0xab,0xcc,0xe4,
+0xfb,0xe5,0x6c,0x75,0xf0,0x14,0xa4,0x24,0x26,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,
+0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0x54,0x0f,0xff,0xeb,0x75,0xf0,
+0x08,0xa4,0xf9,0xf8,0x12,0x88,0xb1,0x74,0xe5,0x2b,0xf5,0x82,0xe4,0x34,0x8f,0xf5,
+0x83,0xef,0xf0,0x0b,0xbb,0x04,0xca,0x90,0x8f,0xe5,0xe0,0xfb,0xa3,0xe0,0xf5,0x5f,
+0xa3,0xe0,0xf5,0x60,0xa3,0xe0,0xf5,0x61,0x7d,0x04,0x7c,0x0c,0xaf,0x6c,0x12,0xab,
+0xcc,0xe4,0xfb,0xe5,0x6c,0x75,0xf0,0x14,0xa4,0x24,0x2a,0xf5,0x82,0xe4,0x34,0x90,
+0xf5,0x83,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0x44,0x02,0xff,0xeb,
+0x75,0xf0,0x08,0xa4,0xf9,0xf8,0x12,0x88,0xb1,0x74,0xe5,0x2b,0xf5,0x82,0xe4,0x34,
+0x8f,0xf5,0x83,0xef,0xf0,0x0b,0xbb,0x04,0xca,0x90,0x8f,0xe5,0xe0,0xfb,0xa3,0xe0,
+0xf5,0x5f,0xa3,0xe0,0xf5,0x60,0xa3,0xe0,0xf5,0x61,0x7d,0x00,0x7c,0x08,0xaf,0x6c,
+0x12,0xab,0xcc,0x7b,0xa0,0x7d,0x32,0x7c,0x0b,0xaf,0x6c,0x12,0xbb,0x8e,0x7d,0x70,
+0x7c,0x0e,0xaf,0x6c,0x12,0x8d,0x4d,0xe5,0x6c,0x75,0xf0,0x14,0xa4,0x24,0x32,0xf5,
+0x82,0xe4,0x34,0x90,0xf5,0x83,0x12,0x88,0xd7,0x75,0x5f,0x25,0x75,0x60,0x1b,0xe4,
+0xf5,0x61,0x7b,0xa0,0x7d,0x70,0x7c,0x0e,0xaf,0x6c,0x12,0xab,0xcc,0xe4,0xf5,0x65,
+0xf5,0x66,0xf5,0x67,0xfb,0xfd,0xaf,0x6c,0x12,0xb1,0x6d,0x90,0x90,0x03,0xe0,0x13,
+0x13,0x13,0x54,0x03,0x20,0xe1,0x0f,0xe4,0xf5,0x65,0xf5,0x66,0xf5,0x67,0xfb,0x7d,
+0x01,0xaf,0x6c,0x12,0xb1,0x6d,0x90,0x90,0x03,0xe0,0x13,0x13,0x13,0x54,0x03,0xff,
+0xbf,0x01,0x10,0xe4,0x90,0x90,0x4a,0xf0,0x90,0x90,0x64,0xe0,0xd3,0x94,0x02,0x50,
+0x1d,0x80,0x0f,0x90,0x90,0x64,0xe0,0xd3,0x94,0x02,0x50,0x12,0xa3,0xe0,0x94,0x02,
+0x50,0x0c,0x90,0x00,0x11,0xe0,0x54,0xf6,0xfd,0x7f,0x11,0x12,0xba,0xeb,0x22,0x90,
+0x8f,0xba,0xef,0xf0,0xa3,0xeb,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,0xf0,0x90,0x01,0xc4,
+0x74,0xcf,0xf0,0x74,0x7b,0xff,0xa3,0xf0,0x74,0xc4,0x25,0x25,0xf5,0x82,0x74,0x01,
+0x35,0x24,0xf5,0x83,0x74,0xcf,0xf0,0x74,0xc5,0x25,0x25,0xf5,0x82,0x74,0x01,0x35,
+0x24,0xf5,0x83,0xef,0xf0,0x90,0x8f,0xba,0xe0,0x12,0x89,0x20,0x7c,0x40,0x01,0x7c,
+0x56,0x02,0x7c,0x6c,0x03,0x7c,0x82,0x05,0x7c,0x98,0x06,0x7d,0x9f,0x07,0x7c,0xae,
+0x08,0x7c,0xc4,0x09,0x7c,0xda,0x0c,0x7d,0x1c,0x0f,0x7c,0xf0,0x11,0x7d,0x06,0x12,
+0x7d,0x31,0x13,0x7d,0x46,0x18,0x7d,0x5b,0x19,0x7d,0x70,0x1a,0x00,0x00,0x7d,0x85,
+0x90,0x8f,0xbe,0xe0,0xff,0x90,0x8f,0xbb,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,
+0x12,0xb4,0x68,0x02,0x7d,0x9f,0x90,0x8f,0xbe,0xe0,0xff,0x90,0x8f,0xbb,0xe0,0xfb,
+0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x12,0xbd,0x39,0x02,0x7d,0x9f,0x90,0x8f,0xbe,0xe0,
+0xff,0x90,0x8f,0xbb,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x12,0xa9,0x05,0x02,
+0x7d,0x9f,0x90,0x8f,0xbe,0xe0,0xff,0x90,0x8f,0xbb,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,
+0xe0,0xf9,0x12,0xaf,0x5e,0x02,0x7d,0x9f,0x90,0x8f,0xbe,0xe0,0xff,0x90,0x8f,0xbb,
+0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x12,0xb7,0x4e,0x02,0x7d,0x9f,0x90,0x8f,
+0xbe,0xe0,0xff,0x90,0x8f,0xbb,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x12,0x6b,
+0xe9,0x02,0x7d,0x9f,0x90,0x8f,0xbe,0xe0,0xff,0x90,0x8f,0xbb,0xe0,0xfb,0xa3,0xe0,
+0xfa,0xa3,0xe0,0xf9,0x12,0xa1,0x6e,0x02,0x7d,0x9f,0x90,0x8f,0xbe,0xe0,0xff,0x90,
+0x8f,0xbb,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x12,0x42,0x80,0x02,0x7d,0x9f,
+0x90,0x8f,0xbe,0xe0,0xff,0x90,0x8f,0xbb,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,
+0x12,0xb7,0xef,0x02,0x7d,0x9f,0x90,0x8f,0xbe,0xe0,0xff,0x90,0x8f,0xbb,0xe0,0xfb,
+0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x12,0xa5,0x4b,0x02,0x7d,0x9f,0x90,0x8f,0xbe,0xe0,
+0xff,0x90,0x8f,0xbb,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x12,0xb1,0xc1,0x80,
+0x6e,0x90,0x8f,0xbe,0xe0,0xff,0x90,0x8f,0xbb,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,
+0xf9,0x12,0xb8,0xed,0x80,0x59,0x90,0x8f,0xbe,0xe0,0xff,0x90,0x8f,0xbb,0xe0,0xfb,
+0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x12,0xbc,0xfc,0x80,0x44,0x90,0x8f,0xbe,0xe0,0xff,
+0x90,0x8f,0xbb,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x12,0x8c,0x05,0x80,0x2f,
+0x90,0x8f,0xbe,0xe0,0xff,0x90,0x8f,0xbb,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,
+0x12,0xb0,0x6d,0x80,0x1a,0x90,0x8f,0xbe,0xe0,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,
+0x08,0xe6,0x24,0xc6,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,0x44,0x01,0xf0,0x7d,
+0xcf,0xed,0x24,0x02,0x90,0x01,0xc4,0xf0,0x74,0x7b,0x24,0x02,0xff,0xa3,0xf0,0xed,
+0x24,0x02,0xfe,0x74,0xc4,0x25,0x25,0xf5,0x82,0x74,0x01,0x35,0x24,0xf5,0x83,0xee,
+0xf0,0x74,0xc5,0x25,0x25,0xf5,0x82,0x74,0x01,0x35,0x24,0xf5,0x83,0xef,0xf0,0x22,
+0x8f,0x6c,0x90,0x90,0x03,0xe0,0x13,0x13,0x13,0x54,0x03,0xff,0xbf,0x01,0x0b,0x90,
+0x90,0x4a,0xe0,0x64,0x01,0x70,0x03,0x02,0x7f,0xa6,0x90,0x00,0x11,0xe0,0x44,0x09,
+0xfd,0x7f,0x11,0x12,0xba,0xeb,0xe4,0xfb,0xe5,0x6c,0x75,0xf0,0x14,0xa4,0x24,0x22,
+0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,
+0xe0,0xff,0xeb,0x75,0xf0,0x08,0xa4,0xf9,0xf8,0x12,0x88,0xb1,0x74,0xe5,0x2b,0xf5,
+0x82,0xe4,0x34,0x8f,0xf5,0x83,0xef,0xf0,0x0b,0xbb,0x04,0xcc,0x90,0x8f,0xe5,0xe0,
+0xfb,0xa3,0xe0,0xf5,0x5f,0xa3,0xe0,0xf5,0x60,0xa3,0xe0,0xf5,0x61,0x7d,0x78,0x7c,
+0x08,0xaf,0x6c,0x12,0xab,0xcc,0xe4,0xfb,0xe5,0x6c,0x75,0xf0,0x14,0xa4,0x24,0x26,
+0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,
+0xe0,0xff,0xeb,0x75,0xf0,0x08,0xa4,0xf9,0xf8,0x12,0x88,0xb1,0x74,0xe5,0x2b,0xf5,
+0x82,0xe4,0x34,0x8f,0xf5,0x83,0xef,0xf0,0x0b,0xbb,0x04,0xcc,0x90,0x8f,0xe5,0xe0,
+0xfb,0xa3,0xe0,0xf5,0x5f,0xa3,0xe0,0xf5,0x60,0xa3,0xe0,0xf5,0x61,0x7d,0x04,0x7c,
+0x0c,0xaf,0x6c,0x12,0xab,0xcc,0xe4,0xfb,0xe5,0x6c,0x75,0xf0,0x14,0xa4,0x24,0x2a,
+0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,
+0xe0,0xff,0xeb,0x75,0xf0,0x08,0xa4,0xf9,0xf8,0x12,0x88,0xb1,0x74,0xe5,0x2b,0xf5,
+0x82,0xe4,0x34,0x8f,0xf5,0x83,0xef,0xf0,0x0b,0xbb,0x04,0xcc,0x90,0x8f,0xe5,0xe0,
+0xfb,0xa3,0xe0,0xf5,0x5f,0xa3,0xe0,0xf5,0x60,0xa3,0xe0,0xf5,0x61,0x7d,0x00,0x7c,
+0x08,0xaf,0x6c,0x12,0xab,0xcc,0xe5,0x6c,0x75,0xf0,0x14,0xa4,0x24,0x2e,0xf5,0x82,
+0xe4,0x34,0x90,0xf5,0x83,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,
+0x78,0x10,0x12,0x88,0xb1,0x90,0x8f,0xe7,0xef,0xf0,0xfb,0x7d,0x32,0x7c,0x0b,0xaf,
+0x6c,0x12,0xbb,0x8e,0xe4,0xfb,0xe5,0x6c,0x75,0xf0,0x14,0xa4,0x24,0x32,0xf5,0x82,
+0xe4,0x34,0x90,0xf5,0x83,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,
+0xeb,0x75,0xf0,0x08,0xa4,0xf9,0xf8,0x12,0x88,0xb1,0x74,0xe5,0x2b,0xf5,0x82,0xe4,
+0x34,0x8f,0xf5,0x83,0xef,0xf0,0x0b,0xbb,0x04,0xcc,0x90,0x8f,0xe5,0xe0,0xfb,0xa3,
+0xe0,0xf5,0x5f,0xa3,0xe0,0xf5,0x60,0xa3,0xe0,0xf5,0x61,0x7d,0x70,0x7c,0x0e,0xaf,
+0x6c,0x12,0xab,0xcc,0x75,0x65,0x95,0x75,0x66,0x2d,0x75,0x67,0x03,0xe4,0xfb,0xfd,
+0xaf,0x6c,0x12,0xb1,0x6d,0x90,0x90,0x03,0xe0,0x13,0x13,0x13,0x54,0x03,0x20,0xe1,
+0x12,0x75,0x65,0x95,0x75,0x66,0x2d,0x75,0x67,0x03,0xe4,0xfb,0x7d,0x01,0xaf,0x6c,
+0x12,0xb1,0x6d,0x90,0x90,0x03,0xe0,0x13,0x13,0x13,0x54,0x03,0xff,0xbf,0x01,0x06,
+0x90,0x90,0x4a,0x74,0x01,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x8f,0x49,
+0x12,0x6f,0x08,0xaf,0x49,0x12,0x98,0x35,0x12,0xb2,0x13,0x12,0xb9,0x1d,0xaf,0x49,
+0x12,0xa3,0x64,0xe4,0x90,0x90,0x20,0xf0,0xe5,0x49,0x25,0xe0,0x24,0x22,0xf8,0xe6,
+0xfe,0x08,0xe6,0xff,0x24,0xcf,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0xc0,0x83,0xc0,
+0x82,0xe0,0xfd,0x74,0xcf,0x2f,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,0xf4,0xff,
+0xed,0x5f,0xd0,0x82,0xd0,0x83,0xf0,0x90,0x00,0xf3,0xe0,0x30,0xe2,0x17,0xe5,0x49,
+0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x41,0xf5,0x82,0x74,0x05,0x3e,
+0xf5,0x83,0x74,0x10,0xf0,0xe5,0x49,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,
+0x24,0x64,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0xa0,0xf0,0xaf,0x49,0x12,0xa4,
+0x09,0xaf,0x49,0x12,0xbd,0x67,0x12,0xad,0x08,0xe5,0x49,0x70,0x1a,0xe5,0x49,0x25,
+0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x50,0xf5,0x82,0x74,0x02,0x3e,0xf5,
+0x83,0xe0,0x44,0x04,0xf0,0x80,0x18,0xe5,0x49,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,
+0x08,0xe6,0x24,0x50,0xf5,0x82,0x74,0x02,0x3e,0xf5,0x83,0xe0,0x54,0xfb,0xf0,0x90,
+0x8f,0xb1,0xe5,0xd9,0xf0,0xaf,0x49,0x12,0x9f,0x5b,0x74,0x0c,0x25,0x49,0xf5,0x82,
+0xe4,0x34,0x90,0xf5,0x83,0xe4,0xf0,0x74,0x0a,0x25,0x49,0xf5,0x82,0xe4,0x34,0x90,
+0xf5,0x83,0xe4,0xf0,0x74,0x04,0x25,0x49,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0x74,
+0x01,0xf0,0x74,0x18,0x25,0x49,0xf8,0xe4,0xf6,0x74,0x01,0x25,0x49,0xf5,0x82,0xe4,
+0x34,0x90,0xf5,0x83,0xe4,0xf0,0xe5,0x49,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,
+0xe6,0x24,0xca,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xe0,0xff,0x74,0x1e,0x25,0x49,
+0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xef,0xf0,0xe5,0x49,0x25,0xe0,0x24,0x22,0xf8,
+0xe6,0xfe,0x08,0xe6,0x24,0xcb,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xe0,0xff,0x74,
+0x1c,0x25,0x49,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xef,0xf0,0xe5,0x49,0x70,0x2a,
+0x90,0x00,0x18,0xe0,0x44,0x01,0xfd,0x7f,0x18,0x12,0xba,0xeb,0x90,0x00,0x81,0xe0,
+0xc3,0x13,0x54,0x01,0xff,0x74,0x06,0x25,0x49,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,
+0xef,0xf0,0x43,0xe8,0x03,0x43,0xa8,0x05,0x80,0x25,0x90,0x00,0x1a,0xe0,0x44,0x01,
+0xfd,0x7f,0x1a,0x12,0xba,0xeb,0x90,0x00,0x53,0xe0,0xc3,0x13,0x54,0x01,0xff,0x74,
+0x06,0x25,0x49,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xef,0xf0,0x43,0xe8,0x0d,0xd0,
+0xd0,0x92,0xaf,0x22,0x8f,0x54,0x8d,0x55,0x7d,0x03,0x7c,0x08,0x12,0xba,0xbd,0xef,
+0x54,0xfc,0xfb,0x7d,0x03,0x7c,0x08,0xaf,0x54,0x12,0xbb,0x8e,0x7d,0x8e,0x7c,0x08,
+0xaf,0x54,0x12,0xba,0xbd,0xef,0x44,0xf0,0xfb,0x7d,0x8e,0x7c,0x08,0xaf,0x54,0x12,
+0xbb,0x8e,0x7d,0x2d,0x7c,0x0d,0xaf,0x54,0x12,0xba,0xbd,0xef,0x54,0x9f,0x90,0x8f,
+0xc7,0xf0,0xe5,0x55,0xd3,0x94,0x0e,0x50,0x03,0x02,0x82,0x6a,0xe5,0x55,0x94,0x95,
+0x40,0x05,0xe0,0x44,0x40,0x80,0x06,0x90,0x8f,0xc7,0xe0,0x44,0x20,0xfb,0x7d,0x2d,
+0x7c,0x0d,0xaf,0x54,0x12,0xbb,0x8e,0xe5,0x55,0xd3,0x94,0x40,0x7f,0x02,0x50,0x02,
+0x7f,0x01,0x90,0x8f,0xc8,0xef,0xf0,0xe4,0x78,0x82,0xf6,0x90,0x8f,0xc8,0xe0,0x75,
+0xf0,0x34,0xa4,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x8e,0xf5,0x83,0x78,0x82,0xe6,0x75,
+0xf0,0x04,0x12,0x89,0x14,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,
+0xfb,0x78,0x08,0x12,0x88,0xb1,0xaa,0x07,0x90,0x8f,0xc8,0xe0,0x75,0xf0,0x34,0xa4,
+0x24,0xc6,0xf5,0x82,0xe4,0x34,0x8e,0xf5,0x83,0x78,0x82,0xe6,0xf9,0x75,0xf0,0x04,
+0x12,0x89,0x14,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x78,0x10,
+0x12,0x88,0xb1,0x8f,0x67,0x8a,0x66,0x8b,0x65,0x74,0x8a,0x29,0xf5,0x82,0xe4,0x34,
+0x8f,0xf5,0x83,0xe0,0xfb,0xe4,0xfd,0xaf,0x54,0x12,0xb1,0x6d,0x78,0x82,0x06,0xe6,
+0xc3,0x94,0x0d,0x40,0x86,0x7d,0x8e,0x7c,0x08,0xaf,0x54,0x12,0xba,0xbd,0xef,0x54,
+0x0f,0xfb,0x7d,0x8e,0x7c,0x08,0xaf,0x54,0x12,0xbb,0x8e,0x7d,0x03,0x7c,0x08,0xaf,
+0x54,0x12,0xba,0xbd,0xef,0x44,0x02,0x02,0x82,0xf6,0xe4,0x78,0x82,0xf6,0x78,0x82,
+0xe6,0xf9,0xc3,0x94,0x0d,0x50,0x5d,0xe9,0x25,0xe0,0x25,0xe0,0x24,0xc6,0xf5,0x82,
+0xe4,0x34,0x8e,0xf5,0x83,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,
+0xfb,0x78,0x08,0x12,0x88,0xb1,0xaa,0x07,0xe9,0x25,0xe0,0x25,0xe0,0x24,0xc6,0xf5,
+0x82,0xe4,0x34,0x8e,0xf5,0x83,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,
+0xff,0x78,0x10,0x12,0x88,0xb1,0x8f,0x67,0x8a,0x66,0x8b,0x65,0x74,0x8a,0x29,0xf5,
+0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0xfb,0xe4,0xfd,0xaf,0x54,0x12,0xb1,0x6d,0x78,
+0x82,0x06,0x80,0x9a,0x7d,0x8e,0x7c,0x08,0xaf,0x54,0x12,0xba,0xbd,0xef,0x54,0x0f,
+0xfb,0x7d,0x8e,0x7c,0x08,0xaf,0x54,0x12,0xbb,0x8e,0x7d,0x03,0x7c,0x08,0xaf,0x54,
+0x12,0xba,0xbd,0xef,0x44,0x03,0xfb,0x7d,0x03,0x7c,0x08,0xaf,0x54,0x12,0xbb,0x8e,
+0x22,0x7b,0x01,0xad,0x4a,0xaf,0x49,0x8f,0x54,0x8d,0x55,0x8b,0x56,0xef,0x25,0xe0,
+0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x2d,0xff,0xe4,0x3e,0xfe,0x74,0x84,0x2f,0xf5,
+0x82,0x74,0x04,0x3e,0xf5,0x83,0xe0,0x54,0x7f,0xf5,0x57,0x54,0x1f,0xff,0x75,0xf0,
+0xe0,0xe5,0x54,0xa4,0x24,0x08,0xf5,0x82,0xe5,0xf0,0x34,0x89,0xf5,0x83,0x75,0xf0,
+0x07,0xe5,0x55,0x12,0x89,0x14,0xe0,0x90,0x8f,0xbb,0xf0,0x75,0xf0,0xe0,0xe5,0x54,
+0xa4,0x24,0x07,0xf5,0x82,0xe5,0xf0,0x34,0x89,0xf5,0x83,0x75,0xf0,0x07,0xe5,0x55,
+0x12,0x89,0x14,0xe0,0xfe,0x90,0x8f,0xbc,0xf0,0xe5,0x54,0x75,0xf0,0x40,0xa4,0x24,
+0x05,0xf5,0x82,0xe4,0x34,0x8d,0xf5,0x83,0x75,0xf0,0x02,0xed,0x12,0x89,0x14,0xe0,
+0xfd,0xa3,0xe0,0x90,0x8f,0xbd,0xcd,0xf0,0xa3,0xed,0xf0,0xe5,0x54,0x75,0xf0,0x40,
+0xa4,0x24,0x80,0xf5,0x82,0xe4,0x34,0x87,0xf5,0x83,0x75,0xf0,0x02,0xe5,0x55,0x12,
+0x89,0x14,0xe0,0xfd,0xa3,0xe0,0x90,0x8f,0xbf,0xcd,0xf0,0xa3,0xed,0xf0,0xef,0xd3,
+0x9e,0x40,0x07,0x90,0x8f,0xbc,0xe0,0xff,0xf5,0x57,0xe5,0x56,0x70,0x03,0x02,0x84,
+0x45,0xad,0x56,0xe5,0x57,0x30,0xe6,0x03,0x8f,0x57,0x1d,0xed,0x60,0x77,0xef,0xd3,
+0x94,0x00,0x40,0x71,0xe4,0xf9,0xef,0x14,0xfc,0x90,0x8f,0xbb,0xe0,0xff,0xec,0xd3,
+0x9f,0x40,0x53,0xec,0x94,0x10,0x40,0x21,0xec,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,
+0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x8f,0xbf,
+0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x70,0x23,0xec,0xc3,0x94,0x10,0x50,0x24,0x74,
+0x01,0x7e,0x00,0xa8,0x04,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,
+0x90,0x8f,0xbd,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x07,0x8c,0x57,0x09,0xe9,
+0x6d,0x60,0x03,0x1c,0x80,0xa3,0xe9,0xc3,0x9d,0x50,0x0a,0x90,0x8f,0xbb,0xe0,0xff,
+0xb5,0x04,0x02,0x8f,0x57,0xe5,0x57,0x25,0xe0,0x24,0xae,0xf5,0x82,0xe4,0x34,0x41,
+0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xe5,0x57,0x25,0xe0,0x24,0x76,0xf5,
+0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,
+0xfe,0xef,0x13,0xff,0xe5,0x54,0x75,0xf0,0x40,0xa4,0x24,0x80,0xf5,0x82,0xe4,0x34,
+0x88,0xf5,0x83,0x75,0xf0,0x02,0xe5,0x55,0x12,0x89,0x14,0xee,0xf0,0xa3,0xef,0xf0,
+0xab,0x57,0xad,0x55,0xaf,0x54,0x12,0xb9,0x83,0xad,0x55,0xaf,0x54,0x12,0x99,0xef,
+0xaf,0x57,0x22,0x90,0x8f,0xbf,0xef,0xf0,0xed,0x64,0x01,0x60,0x03,0x02,0x85,0x3b,
+0xe0,0xff,0x7b,0x7c,0x7d,0x02,0x12,0xb7,0x16,0x90,0x8f,0xbf,0xe0,0xff,0x7b,0x02,
+0x7d,0x03,0x12,0xb7,0x16,0x90,0x8f,0xbf,0xe0,0xff,0x25,0xe0,0x24,0x22,0xf8,0xe6,
+0xfc,0x08,0xe6,0x24,0x57,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xe4,0xf0,0xef,0x25,
+0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x3c,0xf5,0x82,0x74,0x01,0x3e,0xf5,
+0x83,0x74,0x02,0xf0,0x7d,0x0c,0x12,0x8a,0xb3,0x90,0x90,0x99,0xe0,0x30,0xe0,0x08,
+0x90,0x8f,0xbf,0xe0,0xff,0x12,0x44,0xab,0x90,0x8f,0xbf,0xe0,0xff,0x25,0xe0,0x24,
+0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x04,0xf5,0x82,0x74,0x06,0x3c,0xf5,0x83,0xe0,
+0x54,0x7f,0xf0,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x0a,0xf5,
+0x82,0x74,0x06,0x3e,0xf5,0x83,0xe0,0x54,0xf8,0xf0,0x22,0x90,0x8f,0xbf,0xe0,0xff,
+0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x36,0xf5,0x82,0x74,0x01,0x3c,
+0xf5,0x83,0x74,0x7c,0xf0,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,
+0x37,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x02,0xf0,0x90,0x8f,0xbf,0xe0,0xff,
+0x7b,0x7c,0x7d,0x02,0x12,0xb7,0xba,0x90,0x8f,0xbf,0xe0,0xff,0x7b,0x02,0x7d,0x03,
+0x12,0xb7,0xba,0x90,0x8f,0xbf,0xe0,0xff,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,
+0xe6,0x24,0x04,0xf5,0x82,0x74,0x06,0x3c,0xf5,0x83,0xe0,0x44,0x80,0xf0,0xef,0x25,
+0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x0a,0xf5,0x82,0x74,0x06,0x3e,0xf5,
+0x83,0xe0,0x44,0x07,0xf0,0x90,0x8f,0xbf,0xe0,0xff,0x25,0xe0,0x24,0x56,0xf5,0x82,
+0xe4,0x34,0x90,0xf5,0x83,0xe0,0xa3,0xe0,0xfe,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,
+0xfc,0x08,0xe6,0x24,0x58,0xf5,0x82,0x74,0x05,0x3c,0xf5,0x83,0xee,0xf0,0x90,0x8f,
+0xbf,0xe0,0xff,0x24,0x74,0xf8,0xe6,0x30,0xe0,0x43,0x74,0x52,0x2f,0xf5,0x82,0xe4,
+0x34,0x90,0xf5,0x83,0xe0,0x70,0x45,0x90,0x8f,0xbf,0xe0,0x24,0x52,0xf5,0x82,0xe4,
+0x34,0x90,0xf5,0x83,0xe0,0x04,0xf0,0x74,0x64,0x2f,0xf5,0x82,0xe4,0x34,0x90,0xf5,
+0x83,0xe0,0x54,0x0f,0xc3,0x94,0x04,0x50,0x05,0x7d,0x04,0x12,0x8a,0xb3,0x90,0x90,
+0x99,0xe0,0x30,0xe0,0x17,0x90,0x8f,0xbf,0xe0,0xff,0x02,0x44,0xab,0x90,0x8f,0xbf,
+0xe0,0x24,0x52,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe4,0xf0,0x22,0x90,0x8f,0xc2,
+0xef,0xf0,0xa3,0xed,0xf0,0xa3,0xeb,0xf0,0xa3,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,
+0xf9,0x90,0x00,0x03,0x12,0x87,0xd5,0x54,0xf0,0xc4,0x54,0x0f,0x90,0x8f,0xc8,0xf0,
+0x90,0x00,0x04,0x12,0x87,0xd5,0x54,0x40,0xc4,0x13,0x13,0x54,0x03,0x90,0x8f,0xc9,
+0xf0,0x90,0x8f,0xc2,0xe0,0xff,0x75,0xf0,0xe0,0xa4,0x24,0x05,0xf5,0x82,0xe5,0xf0,
+0x34,0x89,0xf5,0x83,0xc0,0x83,0xc0,0x82,0x90,0x8f,0xc3,0xe0,0xd0,0x82,0xd0,0x83,
+0x75,0xf0,0x07,0x12,0x89,0x14,0xad,0x82,0xac,0x83,0x90,0x8f,0xca,0xec,0xf0,0xa3,
+0xed,0xf0,0xef,0x75,0xf0,0xe0,0xa4,0x24,0x03,0xf9,0x74,0x89,0x35,0xf0,0xfa,0x90,
+0x8f,0xc3,0xe0,0x75,0xf0,0x07,0xa4,0x29,0xf9,0xea,0x35,0xf0,0xfa,0x90,0x8f,0xcc,
+0x74,0x01,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,0xf0,0x90,0x8f,0xc5,0xa3,0xe0,0xfa,0xa3,
+0xe0,0xf9,0x90,0x00,0x03,0x12,0x87,0xd5,0x54,0x0f,0xff,0x90,0x8f,0xcc,0xe0,0xfb,
+0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0xef,0x12,0x88,0x02,0x90,0x8f,0xc5,0xe0,0xfb,0xa3,
+0xe0,0xfa,0xa3,0xe0,0xf9,0x90,0x00,0x02,0x12,0x87,0xd5,0xff,0x90,0x8f,0xcc,0xe0,
+0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x90,0x00,0x01,0xef,0x12,0x88,0x14,0x90,0x8f,
+0xc5,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x90,0x00,0x01,0x12,0x87,0xd5,0xff,
+0x90,0x8f,0xca,0xe0,0xfc,0xa3,0xe0,0xfd,0xf5,0x82,0x8c,0x83,0xef,0xf0,0x12,0x34,
+0x05,0x8d,0x82,0x8c,0x83,0xa3,0xf0,0x90,0x8f,0xc8,0xe0,0xfe,0x90,0x8f,0xc3,0xe0,
+0xfd,0x90,0x8f,0xc2,0xe0,0xff,0xc4,0x33,0x54,0xe0,0x24,0x00,0xf5,0x82,0xe4,0x34,
+0x88,0xf5,0x83,0xe5,0x82,0x2d,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xee,0xf0,0x90,
+0x8f,0xc4,0xe0,0x54,0x01,0xfe,0x75,0xf0,0xe0,0xef,0xa4,0x24,0x09,0xf5,0x82,0xe5,
+0xf0,0x34,0x89,0xf5,0x83,0x75,0xf0,0x07,0xed,0x12,0x89,0x14,0xe0,0x54,0xfe,0x4e,
+0xf0,0x75,0xf0,0xe0,0xef,0xa4,0x24,0x09,0xf5,0x82,0xe5,0xf0,0x34,0x89,0xf5,0x83,
+0xc0,0x83,0xc0,0x82,0x90,0x8f,0xc3,0xe0,0xfe,0xd0,0x82,0xd0,0x83,0x75,0xf0,0x07,
+0x12,0x89,0x14,0xe0,0x44,0x02,0xf0,0x90,0x8f,0xc9,0xe0,0x54,0x01,0x25,0xe0,0x25,
+0xe0,0xfd,0x75,0xf0,0xe0,0xef,0xa4,0x24,0x09,0xf5,0x82,0xe5,0xf0,0x34,0x89,0xf5,
+0x83,0x75,0xf0,0x07,0xee,0x12,0x89,0x14,0xe0,0x54,0xfb,0x4d,0xf0,0x90,0x8f,0xc3,
+0xe0,0xfd,0x02,0x65,0x28,0xbb,0x01,0x0c,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,
+0xf5,0x83,0xe0,0x22,0x50,0x06,0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,
+0x25,0x82,0xf8,0xe2,0x22,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe4,
+0x93,0x22,0xbb,0x01,0x06,0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,0xf7,0x22,0xbb,
+0xfe,0x01,0xf3,0x22,0xf8,0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,
+0xf5,0x83,0xe8,0xf0,0x22,0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,0xbb,0xfe,0x05,
+0xe9,0x25,0x82,0xc8,0xf2,0x22,0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0,0xc5,0xf0,0xf8,
+0xe5,0x82,0x15,0x82,0x70,0x02,0x15,0x83,0xe0,0x38,0xf0,0x22,0xbb,0x01,0x10,0xe5,
+0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0xf5,0xf0,0xa3,0xe0,0x22,0x50,
+0x09,0xe9,0x25,0x82,0xf8,0x86,0xf0,0x08,0xe6,0x22,0xbb,0xfe,0x0a,0xe9,0x25,0x82,
+0xf8,0xe2,0xf5,0xf0,0x08,0xe2,0x22,0xe5,0x83,0x2a,0xf5,0x83,0xe9,0x93,0xf5,0xf0,
+0xa3,0xe9,0x93,0x22,0xf8,0xbb,0x01,0x11,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,
+0xf5,0x83,0xe8,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x09,0xe9,0x25,0x82,0xc8,0xf6,
+0x08,0xa6,0xf0,0x22,0xbb,0xfe,0x09,0xe9,0x25,0x82,0xc8,0xf2,0xe5,0xf0,0x08,0xf2,
+0x22,0xe8,0x60,0x0f,0xec,0xc3,0x13,0xfc,0xed,0x13,0xfd,0xee,0x13,0xfe,0xef,0x13,
+0xff,0xd8,0xf1,0x22,0xe8,0x60,0x0f,0xef,0xc3,0x33,0xff,0xee,0x33,0xfe,0xed,0x33,
+0xfd,0xec,0x33,0xfc,0xd8,0xf1,0x22,0xec,0xf0,0xa3,0xed,0xf0,0xa3,0xee,0xf0,0xa3,
+0xef,0xf0,0x22,0xa8,0x82,0x85,0x83,0xf0,0xd0,0x83,0xd0,0x82,0x12,0x88,0xfa,0x12,
+0x88,0xfa,0x12,0x88,0xfa,0x12,0x88,0xfa,0xe4,0x73,0xe4,0x93,0xa3,0xc5,0x83,0xc5,
+0xf0,0xc5,0x83,0xc8,0xc5,0x82,0xc8,0xf0,0xa3,0xc5,0x83,0xc5,0xf0,0xc5,0x83,0xc8,
+0xc5,0x82,0xc8,0x22,0xa4,0x25,0x82,0xf5,0x82,0xe5,0xf0,0x35,0x83,0xf5,0x83,0x22,
+0xd0,0x83,0xd0,0x82,0xf8,0xe4,0x93,0x70,0x12,0x74,0x01,0x93,0x70,0x0d,0xa3,0xa3,
+0x93,0xf8,0x74,0x01,0x93,0xf5,0x82,0x88,0x83,0xe4,0x73,0x74,0x02,0x93,0x68,0x60,
+0xef,0xa3,0xa3,0xa3,0x80,0xdf,0x8f,0x4b,0xe4,0xf5,0x4c,0xe5,0x4c,0x24,0x30,0xfd,
+0xe4,0x34,0x0e,0xfc,0xe4,0xff,0x12,0xba,0xbd,0xe5,0x4b,0x75,0xf0,0x14,0xa4,0x24,
+0x62,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe5,0x82,0x25,0x4c,0xf5,0x82,0xe4,0x35,
+0x83,0xf5,0x83,0xef,0xf0,0x05,0x4c,0xe5,0x4c,0xc3,0x94,0x04,0x40,0xcd,0xe5,0x4b,
+0x75,0xf0,0x14,0xa4,0x24,0x63,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0x54,0x03,
+0xf0,0xe5,0x4b,0x75,0xf0,0x14,0xa4,0x24,0x65,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,
+0xe0,0x54,0x03,0xf0,0xe4,0xf5,0x4c,0xe5,0x4c,0x24,0x14,0xfd,0xe4,0x34,0x0c,0xfc,
+0xe4,0xff,0x12,0xba,0xbd,0xe5,0x4b,0x75,0xf0,0x14,0xa4,0x24,0x66,0xf5,0x82,0xe4,
+0x34,0x8f,0xf5,0x83,0xe5,0x82,0x25,0x4c,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xef,
+0xf0,0x05,0x4c,0xe5,0x4c,0xc3,0x94,0x04,0x40,0xcd,0x7d,0xa3,0x7c,0x0c,0xe4,0xff,
+0x12,0xba,0xbd,0xe5,0x4b,0x75,0xf0,0x14,0xa4,0x24,0x6a,0xf5,0x82,0xe4,0x34,0x8f,
+0xf5,0x83,0xef,0xf0,0xe4,0xf5,0x4c,0xe5,0x4c,0x24,0x80,0xfd,0xe4,0x34,0x0c,0xfc,
+0x7f,0x01,0x12,0xba,0xbd,0xe5,0x4b,0x75,0xf0,0x14,0xa4,0x24,0x6b,0xf5,0x82,0xe4,
+0x34,0x8f,0xf5,0x83,0xe5,0x82,0x25,0x4c,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xef,
+0xf0,0x05,0x4c,0xe5,0x4c,0xc3,0x94,0x04,0x40,0xcd,0x7d,0x4f,0x7c,0x0c,0x7f,0x01,
+0x12,0xba,0xbd,0xef,0x54,0xf0,0xff,0xe5,0x4b,0x75,0xf0,0x14,0xa4,0x24,0x6f,0xf5,
+0x82,0xe4,0x34,0x8f,0xf5,0x83,0xef,0xf0,0x7d,0x97,0x7c,0x0c,0x7f,0x01,0x12,0xba,
+0xbd,0xe5,0x4b,0x75,0xf0,0x14,0xa4,0x24,0x70,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,
+0xef,0xf0,0xe4,0xf5,0x4c,0xe5,0x4c,0x24,0x14,0xfd,0xe4,0x34,0x0c,0xfc,0x7f,0x01,
+0x12,0xba,0xbd,0xe5,0x4b,0x75,0xf0,0x14,0xa4,0x24,0x71,0xf5,0x82,0xe4,0x34,0x8f,
+0xf5,0x83,0xe5,0x82,0x25,0x4c,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xef,0xf0,0x05,
+0x4c,0xe5,0x4c,0xc3,0x94,0x04,0x40,0xcd,0x7d,0xa3,0x7c,0x0c,0x7f,0x01,0x12,0xba,
+0xbd,0xe5,0x4b,0x75,0xf0,0x14,0xa4,0x24,0x75,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,
+0xef,0xf0,0x22,0x90,0x8f,0xbf,0xe0,0xff,0x7b,0x01,0x8f,0x78,0x8d,0x79,0x8b,0x7a,
+0x74,0x64,0x2f,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,0x0f,0xff,0xe5,0x79,
+0x54,0x0f,0x6f,0x70,0x03,0x02,0x8b,0x93,0xe5,0x79,0x30,0xe2,0x4f,0x74,0x64,0x25,
+0x78,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x20,0xe2,0x07,0x7d,0x01,0xaf,0x78,
+0x12,0xaa,0xe8,0x74,0x64,0x25,0x78,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x30,
+0xe3,0x0d,0xe5,0x79,0x20,0xe3,0x08,0xaf,0x78,0x12,0xb3,0x96,0x02,0x8b,0x93,0x74,
+0x64,0x25,0x78,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x20,0xe3,0x75,0xe5,0x79,
+0x30,0xe3,0x70,0xad,0x7a,0xaf,0x78,0x12,0xb2,0x64,0x80,0x67,0x74,0x64,0x25,0x78,
+0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,0x0f,0xff,0xbf,0x0c,0x12,0xe5,0x79,
+0x20,0xe3,0x0d,0xaf,0x78,0x12,0xa6,0x7a,0xef,0x60,0x48,0xaf,0x78,0x12,0xb3,0x96,
+0x74,0x64,0x25,0x78,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,0x0f,0xff,0xbf,
+0x04,0x12,0xe5,0x79,0x20,0xe2,0x0d,0xaf,0x78,0x12,0x9d,0x26,0xef,0x60,0x24,0xaf,
+0x78,0x12,0xa2,0x17,0x74,0x64,0x25,0x78,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,
+0x54,0x0f,0xff,0xbf,0x02,0x0d,0xaf,0x78,0x12,0xad,0xd5,0xef,0x60,0x05,0xaf,0x78,
+0x12,0xb5,0xe9,0x74,0x64,0x25,0x78,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,
+0x0f,0xff,0x74,0x68,0x25,0x78,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,0x0f,
+0x6f,0x70,0x51,0x74,0x68,0x25,0x78,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x30,
+0xe6,0x42,0x74,0x64,0x25,0x78,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,0x0f,
+0xff,0x90,0x90,0x4b,0xe0,0xfe,0x4f,0xff,0xe5,0x78,0x25,0xe0,0x24,0x22,0xf8,0xe6,
+0xfc,0x08,0xe6,0x24,0x2f,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xef,0xf0,0xee,0x64,
+0x80,0x90,0x90,0x4b,0xf0,0x74,0x68,0x25,0x78,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,
+0xe0,0x54,0xbf,0xf0,0x22,0x8f,0x4a,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,
+0xe6,0x24,0x36,0xf5,0x82,0x74,0x06,0x3e,0xf5,0x83,0xe4,0xf0,0xef,0x25,0xe0,0x24,
+0x22,0xf8,0xe6,0xfe,0x08,0xe6,0xff,0x24,0x36,0xf5,0x82,0x74,0x06,0x3e,0xf5,0x83,
+0xe0,0xb4,0xff,0x0e,0x74,0x36,0x2f,0xf5,0x82,0x74,0x06,0x3e,0xf5,0x83,0x74,0xee,
+0xf0,0x22,0x12,0x34,0x05,0x90,0x8f,0xbf,0xf0,0x90,0x00,0x01,0x12,0x87,0xd5,0x90,
+0x8f,0xc0,0xf0,0x90,0x00,0x02,0x12,0x87,0xd5,0x90,0x8f,0xc1,0xf0,0x30,0xe0,0x08,
+0x90,0x8f,0xc3,0x74,0x80,0xf0,0x80,0x05,0xe4,0x90,0x8f,0xc3,0xf0,0xe5,0x4a,0xc4,
+0x33,0x33,0x33,0x54,0x80,0xff,0x90,0x8f,0xc1,0xe0,0xc3,0x13,0x4f,0xa3,0xf0,0x90,
+0xfd,0x10,0xf0,0x90,0x8f,0xc0,0xe0,0x60,0x03,0x02,0x8d,0x35,0x90,0x8f,0xc4,0xf0,
+0x90,0x8f,0xbf,0xe0,0xff,0x90,0x8f,0xc4,0xe0,0xfe,0xc3,0x9f,0x40,0x03,0x02,0x8d,
+0x35,0x90,0x8f,0xc3,0xe0,0xff,0x75,0xf0,0x08,0xee,0xa4,0x2f,0xf5,0x82,0xe4,0x35,
+0xf0,0xf5,0x83,0xe5,0x82,0x24,0x20,0xf5,0x82,0xe5,0x83,0x34,0xfc,0xf5,0x83,0xe0,
+0x75,0x4b,0x00,0x75,0x4c,0x00,0xf5,0x4d,0xab,0x4b,0xaa,0x4c,0xf9,0x90,0x00,0x02,
+0x12,0x87,0xd5,0xfe,0x90,0x00,0x03,0x12,0x87,0xd5,0xfd,0xac,0x06,0x90,0x00,0x07,
+0x12,0x87,0xd5,0xfb,0xc0,0x03,0xab,0x4b,0x90,0x00,0x06,0x12,0x87,0xd5,0xf5,0x5f,
+0x90,0x00,0x05,0x12,0x87,0xd5,0xf5,0x60,0x90,0x00,0x04,0x12,0x87,0xd5,0xf5,0x61,
+0xd0,0x03,0xaf,0x4a,0x12,0xab,0xcc,0x90,0x8f,0xc3,0xe0,0x24,0x20,0xfd,0xe4,0x33,
+0xfc,0xa3,0xe0,0x75,0xf0,0x08,0xa4,0x2d,0xff,0xe5,0xf0,0x3c,0xfe,0xef,0x64,0xf8,
+0x4e,0x70,0x09,0x90,0xfd,0x10,0xe0,0xff,0x04,0xf0,0xef,0xf0,0x90,0x8f,0xc4,0xe0,
+0x04,0xf0,0x02,0x8c,0x90,0xe5,0x4a,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,
+0x24,0x36,0xf5,0x82,0x74,0x06,0x3e,0xf5,0x83,0x74,0xff,0xf0,0x22,0xd3,0x10,0xaf,
+0x01,0xc3,0xc0,0xd0,0x8f,0x5b,0x8c,0x5c,0x8d,0x5d,0x90,0x8f,0xd9,0x12,0x88,0xe3,
+0x00,0x00,0x00,0x00,0x53,0x5d,0xfc,0x90,0x8f,0xd9,0xe0,0xf8,0xa3,0xe0,0xf9,0xa3,
+0xe0,0xfa,0xa3,0xe0,0xfb,0xe8,0xc0,0xe0,0xe5,0x5b,0x25,0xe0,0x24,0x22,0xf8,0xe6,
+0xfe,0x08,0xe6,0x25,0x5d,0xff,0xe5,0x5c,0x3e,0x8f,0x82,0xf5,0x83,0xe0,0xff,0xd0,
+0xe0,0xf8,0xeb,0x4f,0xff,0xea,0xfe,0xe9,0xfd,0xe8,0xfc,0x90,0x8f,0xd9,0x12,0x88,
+0xd7,0x90,0x8f,0xd9,0xe0,0xf8,0xa3,0xe0,0xf9,0xa3,0xe0,0xfa,0xa3,0xe0,0xfb,0xe8,
+0xc0,0xe0,0xe5,0x5b,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x25,0x5d,0xff,
+0xe5,0x5c,0x3e,0x8f,0x82,0xf5,0x83,0xa3,0xe0,0xff,0xe4,0xfc,0xfd,0xfe,0x78,0x08,
+0x12,0x88,0xc4,0xd0,0xe0,0xf8,0xeb,0x4f,0xff,0xea,0x4e,0xfe,0xe9,0x4d,0xfd,0xe8,
+0x4c,0xfc,0x90,0x8f,0xd9,0x12,0x88,0xd7,0x90,0x8f,0xd9,0xe0,0xf8,0xa3,0xe0,0xf9,
+0xa3,0xe0,0xfa,0xa3,0xe0,0xfb,0xe8,0xc0,0xe0,0xe5,0x5b,0x25,0xe0,0x24,0x22,0xf8,
+0xe6,0xfe,0x08,0xe6,0x25,0x5d,0xff,0xe5,0x5c,0x3e,0x8f,0x82,0xf5,0x83,0xa3,0xa3,
+0xe0,0xff,0xe4,0xfc,0xfd,0xfe,0x78,0x10,0x12,0x88,0xc4,0xd0,0xe0,0xf8,0xeb,0x4f,
+0xff,0xea,0x4e,0xfe,0xe9,0x4d,0xfd,0xe8,0x4c,0xfc,0x90,0x8f,0xd9,0x12,0x88,0xd7,
+0x90,0x8f,0xd9,0xe0,0xf8,0xa3,0xe0,0xf9,0xa3,0xe0,0xfa,0xa3,0xe0,0xfb,0xe8,0xc0,
+0xe0,0xe5,0x5b,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x25,0x5d,0xff,0xe5,
+0x5c,0x3e,0x8f,0x82,0xf5,0x83,0xa3,0xa3,0xa3,0xe0,0xff,0xe4,0xfc,0xfd,0xfe,0x78,
+0x18,0x12,0x88,0xc4,0xd0,0xe0,0xf8,0xeb,0x4f,0xff,0xea,0x4e,0xfe,0xe9,0x4d,0xfd,
+0xe8,0x4c,0xfc,0x90,0x8f,0xd9,0x12,0x88,0xd7,0x90,0x8f,0xd9,0xe0,0xfc,0xa3,0xe0,
+0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x2f,0x90,0x90,
+0x79,0xe0,0x64,0x01,0x60,0x03,0x02,0x8f,0xc9,0x90,0x00,0x46,0xe0,0x44,0x01,0xfd,
+0x7f,0x46,0x12,0xba,0xeb,0x90,0x90,0x88,0xe0,0x70,0x4b,0x90,0x90,0x74,0xe0,0x60,
+0x10,0x90,0x90,0x78,0xe0,0xfb,0x7d,0x83,0x7c,0x08,0xe4,0xff,0x12,0xbb,0x8e,0x80,
+0x17,0xe5,0x2f,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x22,0xf5,0x82,
+0x74,0x05,0x3e,0xf5,0x83,0x74,0x7f,0xf0,0x90,0x90,0x77,0xe0,0xfd,0xaf,0x2f,0x12,
+0xa8,0x03,0x90,0x90,0x88,0x74,0x01,0xf0,0x90,0x00,0x45,0xe0,0x54,0xfe,0xfd,0x7f,
+0x45,0x12,0xba,0xeb,0x80,0x4f,0x90,0x90,0x88,0xe0,0x64,0x01,0x70,0x47,0x90,0x90,
+0x7d,0xe0,0xfd,0xaf,0x2f,0x12,0xa8,0x03,0xe4,0x90,0x90,0x88,0xf0,0x90,0x00,0x45,
+0xe0,0x44,0x01,0xfd,0x7f,0x45,0x12,0xba,0xeb,0x90,0x90,0x74,0xe0,0x60,0x10,0x90,
+0x90,0x7c,0xe0,0xfb,0x7d,0x83,0x7c,0x08,0xe4,0xff,0x12,0xbb,0x8e,0x80,0x16,0xe5,
+0x2f,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x22,0xf5,0x82,0x74,0x05,
+0x3e,0xf5,0x83,0xe4,0xf0,0xe5,0x2f,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,
+0x24,0x87,0xf5,0x82,0x74,0x05,0x3e,0xf5,0x83,0xe0,0x64,0x80,0xf0,0x90,0x90,0x84,
+0xe0,0xff,0xe5,0x2f,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x84,0xf5,
+0x82,0x74,0x05,0x3c,0xf5,0x83,0xef,0xf0,0x90,0x90,0x85,0xe0,0xff,0xe5,0x2f,0x25,
+0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x85,0xf5,0x82,0x74,0x05,0x3c,0xf5,
+0x83,0xef,0xf0,0x90,0x90,0x86,0xe0,0xff,0xe5,0x2f,0x25,0xe0,0x24,0x22,0xf8,0xe6,
+0xfc,0x08,0xe6,0x24,0x86,0xf5,0x82,0x74,0x05,0x3c,0xf5,0x83,0xef,0xf0,0x90,0x90,
+0x87,0xe0,0xff,0xe5,0x2f,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x87,
+0xf5,0x82,0x74,0x05,0x3c,0xf5,0x83,0xef,0xf0,0x22,0xe4,0xf5,0x4e,0xf5,0x4f,0xf5,
+0x50,0xfb,0x7a,0x00,0x79,0x49,0x7f,0xfd,0x7e,0x03,0x12,0xaf,0x00,0xef,0x64,0x01,
+0x60,0x03,0x02,0x90,0xb7,0xfb,0x7a,0x00,0x79,0x4a,0x7f,0xfc,0x7e,0x03,0x12,0xaf,
+0x00,0xef,0x64,0x01,0x60,0x03,0x02,0x90,0xb7,0xff,0xe4,0xfe,0xe5,0x4e,0x70,0x2e,
+0xee,0x25,0xe0,0xfd,0xc3,0x74,0x06,0x9d,0xfd,0x74,0x49,0x2f,0xf8,0xe6,0xfc,0xa8,
+0x05,0x08,0x80,0x02,0xc3,0x13,0xd8,0xfc,0x54,0x03,0xf5,0x4d,0x24,0xfd,0x60,0x08,
+0x04,0x70,0x0b,0x75,0x4b,0x01,0x80,0x03,0x75,0x4b,0x02,0x75,0x4e,0x01,0xe5,0x4f,
+0x70,0x2e,0xee,0x25,0xe0,0xfd,0xc3,0x74,0x02,0x9d,0xfd,0x74,0x49,0x2f,0xf8,0xe6,
+0xfc,0xa8,0x05,0x08,0x80,0x02,0xc3,0x13,0xd8,0xfc,0x54,0x03,0xf5,0x4d,0x24,0xfd,
+0x60,0x08,0x04,0x70,0x0b,0xe4,0xf5,0x4c,0x80,0x03,0x75,0x4c,0x01,0x75,0x4f,0x01,
+0xe5,0x4e,0xb4,0x01,0x06,0xe5,0x4f,0x64,0x01,0x60,0x06,0x0e,0xee,0x64,0x02,0x70,
+0x8b,0xe5,0x4e,0xb4,0x01,0x06,0xe5,0x4f,0x64,0x01,0x60,0x09,0x0f,0xef,0x64,0x02,
+0x60,0x03,0x02,0x8f,0xfa,0xe5,0x4e,0x70,0x05,0x75,0x50,0x01,0x80,0x2c,0xe5,0x4f,
+0x70,0x05,0x75,0x50,0x02,0x80,0x23,0xe5,0x4b,0x64,0x02,0x60,0x05,0x75,0x50,0x03,
+0x80,0x18,0xe5,0x4c,0x70,0x48,0x90,0x90,0x03,0xe0,0x13,0x13,0x13,0x54,0x03,0x30,
+0xe0,0x3c,0x75,0x50,0x04,0x80,0x03,0x75,0x50,0x05,0x90,0x01,0xc8,0xe5,0x49,0xf0,
+0xa3,0xe5,0x4a,0xf0,0x90,0x01,0xc4,0xe5,0x50,0xf0,0xa3,0x74,0xe0,0xf0,0x74,0xc4,
+0x25,0x25,0xf5,0x82,0x74,0x01,0x35,0x24,0xf5,0x83,0xe5,0x50,0xf0,0x74,0xc5,0x25,
+0x25,0xf5,0x82,0x74,0x01,0x35,0x24,0xf5,0x83,0x74,0xe0,0xf0,0x80,0xcc,0x22,0xd3,
+0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x8f,0x9b,0xeb,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,
+0xf0,0x90,0x8f,0x9a,0xef,0xf0,0xc4,0x33,0x54,0xe0,0x90,0x8f,0xa1,0xf0,0x90,0x90,
+0x03,0xe0,0x54,0x03,0x64,0x02,0x70,0x03,0x02,0x92,0x0c,0x90,0x8e,0xc5,0xe0,0xff,
+0x04,0xf0,0x90,0x8f,0x9b,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x90,0x00,0x01,
+0xef,0x12,0x88,0x14,0x90,0x8f,0x9a,0xe0,0xff,0x7d,0xaf,0x7c,0x01,0x12,0xab,0x5c,
+0xef,0x70,0x03,0x02,0x92,0x0c,0x90,0x8f,0x9a,0xe0,0x60,0x46,0xa3,0xe0,0xfb,0xa3,
+0xe0,0xfa,0xa3,0xe0,0x8b,0x70,0x8a,0x71,0xf5,0x72,0x75,0x73,0x02,0x7b,0x01,0x7a,
+0x41,0x79,0xa0,0x12,0xae,0xa0,0x90,0x8f,0x9e,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,
+0x8b,0x70,0x8a,0x71,0xf5,0x72,0x90,0x8f,0x9b,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,
+0xf9,0x12,0x34,0x05,0xff,0xc4,0x54,0x0f,0xf5,0x73,0x7b,0x01,0x7a,0x41,0x79,0xa2,
+0x80,0x46,0x90,0x8f,0x9b,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0x8b,0x70,0x8a,0x71,
+0xf5,0x72,0x75,0x73,0x02,0x7b,0x01,0x7a,0x01,0x79,0xa0,0x12,0xae,0xa0,0x90,0x8f,
+0x9e,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0x8b,0x70,0x8a,0x71,0xf5,0x72,0x90,0x8f,
+0x9b,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x12,0x34,0x05,0xff,0xc4,0x54,0x0f,
+0xf5,0x73,0x7b,0x01,0x7a,0x01,0x79,0xa2,0x12,0xae,0xa0,0x90,0x8f,0x9a,0xe0,0xff,
+0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0xaf,0xf5,0x82,0x74,0x01,0x3c,
+0xf5,0x83,0x74,0xff,0xf0,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,
+0xcb,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,0x64,0x80,0xf0,0xd0,0xd0,0x92,0xaf,
+0x22,0x8f,0x59,0xe4,0x90,0x8f,0xd8,0xf0,0x74,0x76,0x2f,0xf8,0xe6,0x70,0x03,0x02,
+0x93,0x2f,0x74,0x74,0x2f,0xf8,0xe6,0x64,0x01,0x60,0x03,0x02,0x93,0x2f,0x74,0x76,
+0x2f,0xf8,0xe6,0x14,0x60,0x60,0x24,0xfd,0x60,0x5c,0x24,0x02,0x24,0xfb,0x50,0x02,
+0x80,0x5a,0x74,0x4e,0x25,0x59,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x14,0xf0,
+0x74,0x4e,0x25,0x59,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x60,0x0e,0x74,0x50,
+0x25,0x59,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x60,0x30,0x74,0x4e,0x25,0x59,
+0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x70,0x1c,0x74,0x66,0x25,0x59,0xf5,0x82,
+0xe4,0x34,0x90,0xf5,0x83,0xe0,0xff,0x74,0x4e,0x25,0x59,0xf5,0x82,0xe4,0x34,0x90,
+0xf5,0x83,0xef,0xf0,0x80,0x00,0x90,0x8f,0xd8,0x74,0x01,0xf0,0x90,0x90,0x99,0xe0,
+0x30,0xe0,0x16,0xa3,0xe0,0xb4,0x04,0x05,0xe4,0x90,0x8f,0xd8,0xf0,0xe4,0xff,0x12,
+0xaa,0x72,0xef,0x70,0x04,0x90,0x8f,0xd8,0xf0,0x90,0x8f,0xd8,0xe0,0x60,0x70,0x74,
+0x6e,0x25,0x59,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x44,0x10,0xf0,0xe4,0x90,
+0x90,0xaa,0xf0,0xa3,0xf0,0x74,0x5a,0x25,0x59,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,
+0xe0,0x90,0x90,0xac,0xf0,0xe4,0xfb,0x7d,0x54,0x7c,0x01,0xaf,0x59,0x12,0xbc,0xb7,
+0xe5,0x59,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x57,0xf5,0x82,0x74,
+0x01,0x3e,0xf5,0x83,0x74,0x05,0xf0,0x74,0x64,0x25,0x59,0xf5,0x82,0xe4,0x34,0x90,
+0xf5,0x83,0xe0,0x54,0x0f,0xc3,0x94,0x04,0x50,0x15,0x7b,0x01,0x7d,0x04,0xaf,0x59,
+0x12,0x8a,0xba,0x90,0x90,0x99,0xe0,0x30,0xe0,0x05,0xaf,0x59,0x12,0x44,0xab,0x22,
+0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x90,0xcb,0xef,0xf0,0x90,0x90,0x9a,0xe0,
+0xff,0x6d,0x70,0x03,0x02,0x94,0x4a,0xed,0x14,0x60,0x3f,0x14,0x60,0x6e,0x14,0x70,
+0x03,0x02,0x93,0xec,0x14,0x70,0x03,0x02,0x94,0x20,0x24,0x04,0x60,0x03,0x02,0x94,
+0x4a,0xef,0xb4,0x03,0x06,0x12,0xb4,0x25,0x02,0x94,0x4a,0x90,0x90,0x9a,0xe0,0xfc,
+0xb4,0x04,0x05,0x12,0xba,0x72,0x80,0x07,0xec,0xb4,0x02,0x03,0x12,0xbc,0xdc,0x90,
+0x90,0xcb,0xe0,0xff,0x12,0xbd,0x44,0x02,0x94,0x4a,0x90,0x90,0x9a,0xe0,0xb4,0x03,
+0x03,0x12,0xb4,0x25,0x90,0x90,0x9a,0xe0,0x70,0x06,0x12,0xbc,0xed,0x02,0x94,0x4a,
+0x90,0x90,0x9a,0xe0,0xfc,0xb4,0x04,0x06,0x12,0xba,0x72,0x02,0x94,0x4a,0xec,0x64,
+0x02,0x60,0x03,0x02,0x94,0x4a,0x12,0xbc,0xdc,0x02,0x94,0x4a,0x90,0x90,0x9a,0xe0,
+0xb4,0x03,0x03,0x12,0xb4,0x25,0x90,0x90,0x9a,0xe0,0x70,0x05,0x12,0xbc,0xed,0x80,
+0x11,0x90,0x90,0x9a,0xe0,0xb4,0x04,0x0a,0x90,0x90,0xcb,0xe0,0xff,0xe4,0xfd,0x12,
+0xba,0x79,0x90,0x90,0xcb,0xe0,0xff,0x12,0xbd,0x4f,0x80,0x5e,0x90,0x90,0x9a,0xe0,
+0xfc,0xb4,0x04,0x0c,0x90,0x90,0xcb,0xe0,0xff,0xe4,0xfd,0x12,0xba,0x79,0x80,0x07,
+0xec,0xb4,0x02,0x03,0x12,0xbc,0xdc,0x90,0x90,0x9a,0xe0,0xb4,0x01,0x08,0x90,0x90,
+0xcb,0xe0,0xff,0x12,0xbd,0x44,0x90,0x90,0xcb,0xe0,0xff,0x12,0xbb,0xae,0x80,0x2a,
+0x90,0x90,0x9a,0xe0,0xff,0x64,0x03,0x60,0x21,0xef,0x70,0x05,0x12,0xbc,0xed,0x80,
+0x11,0x90,0x90,0x9a,0xe0,0xb4,0x02,0x0a,0x90,0x90,0xcb,0xe0,0xff,0xe4,0xfd,0x12,
+0xbc,0xe3,0x90,0x90,0xcb,0xe0,0xff,0x12,0xbc,0x2c,0xd0,0xd0,0x92,0xaf,0x22,0xd3,
+0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x90,0xc2,0xed,0xf0,0x90,0x90,0xc1,0xef,0xf0,
+0xd3,0x94,0x07,0x50,0x71,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,
+0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0,0x5f,0xfd,0x7f,0x47,0x12,0xba,0xeb,0x90,
+0x90,0xc1,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,
+0x90,0x00,0x46,0xe0,0x4f,0xfd,0x7f,0x46,0x12,0xba,0xeb,0x90,0x90,0xc2,0xe0,0x60,
+0x18,0x90,0x90,0xc1,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,
+0xfc,0xff,0x90,0x00,0x45,0xe0,0x4f,0x80,0x17,0x90,0x90,0xc1,0xe0,0xff,0x74,0x01,
+0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x45,0xe0,0x5f,
+0xfd,0x7f,0x45,0x02,0x95,0x57,0x90,0x90,0xc1,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,
+0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,
+0x00,0x43,0xe0,0x5f,0xfd,0x7f,0x43,0x12,0xba,0xeb,0x90,0x90,0xc1,0xe0,0xff,0x74,
+0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x43,0xe0,0x4f,
+0xfd,0x7f,0x43,0x12,0xba,0xeb,0x90,0x90,0xc2,0xe0,0x60,0x1e,0x90,0x90,0xc1,0xe0,
+0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff,
+0x90,0x00,0x42,0xe0,0x4f,0xfd,0x7f,0x42,0x80,0x1d,0x90,0x90,0xc1,0xe0,0xff,0x74,
+0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,
+0x00,0x42,0xe0,0x5f,0xfd,0x7f,0x42,0x12,0xba,0xeb,0xd0,0xd0,0x92,0xaf,0x22,0xc0,
+0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,
+0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74,
+0x5f,0xf0,0x74,0x95,0xff,0xa3,0xf0,0x74,0xc4,0x25,0x25,0xf5,0x82,0x74,0x01,0x35,
+0x24,0xf5,0x83,0x74,0x5f,0xf0,0x74,0xc5,0x25,0x25,0xf5,0x82,0x74,0x01,0x35,0x24,
+0xf5,0x83,0xef,0xf0,0x53,0x91,0xef,0x90,0x00,0x51,0xe0,0xff,0x90,0x00,0x55,0xe0,
+0x5f,0x90,0x8f,0xfe,0xf0,0xe0,0x30,0xe6,0x1e,0x7d,0x40,0x7f,0x55,0x12,0xba,0xeb,
+0x90,0x90,0x7a,0xe0,0x54,0x03,0xff,0xbf,0x03,0x0d,0x90,0x90,0x76,0xe0,0x60,0x07,
+0x7d,0x01,0x7f,0x01,0x12,0xb3,0x4c,0x90,0x8f,0xfe,0xe0,0x30,0xe7,0x18,0x7d,0x80,
+0x7f,0x55,0x12,0xba,0xeb,0x90,0x90,0x7a,0xe0,0x54,0x03,0xff,0xbf,0x03,0x07,0x7d,
+0x02,0x7f,0x01,0x12,0xb3,0x4c,0x90,0x8f,0xfe,0xe0,0x30,0xe7,0x18,0x7d,0x80,0x7f,
+0x56,0x12,0xba,0xeb,0x90,0x90,0x03,0xe0,0x54,0x03,0xff,0xbf,0x02,0x07,0x90,0xfe,
+0x10,0xe0,0x44,0x02,0xf0,0x7d,0x5f,0xed,0x04,0x90,0x01,0xc4,0xf0,0x74,0x95,0xff,
+0xa3,0xf0,0xed,0x04,0xfe,0x74,0xc4,0x25,0x25,0xf5,0x82,0x74,0x01,0x35,0x24,0xf5,
+0x83,0xee,0xf0,0x74,0xc5,0x25,0x25,0xf5,0x82,0x74,0x01,0x35,0x24,0xf5,0x83,0xef,
+0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,
+0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0xd3,0x10,0xaf,0x01,
+0xc3,0xc0,0xd0,0x8d,0x62,0xc9,0xef,0xc9,0xcb,0x54,0x7f,0xcb,0xe5,0x62,0x90,0x8f,
+0xe1,0x70,0x11,0x74,0x08,0xf0,0xa3,0x74,0xb8,0xf0,0xa3,0x74,0x08,0xf0,0xa3,0x74,
+0x24,0xf0,0x80,0x0f,0x74,0x08,0xf0,0xa3,0x74,0xbc,0xf0,0xa3,0x74,0x08,0xf0,0xa3,
+0x74,0x2c,0xf0,0xe4,0xfa,0xcf,0xe9,0xcf,0xea,0x24,0x24,0xfd,0xe4,0x34,0x08,0xfc,
+0x12,0xba,0xbd,0x74,0x63,0x2a,0xf8,0xc6,0xef,0xc6,0xe5,0x62,0x70,0x08,0x74,0x63,
+0x2a,0xf8,0xe6,0xff,0x80,0x0e,0xcf,0xe9,0xcf,0xea,0x24,0x2c,0xfd,0xe4,0x34,0x08,
+0xfc,0x12,0xba,0xbd,0x74,0x67,0x2a,0xf8,0xc6,0xef,0xc6,0x0a,0xba,0x04,0xc6,0xeb,
+0xc4,0x33,0x33,0x33,0x54,0x80,0xff,0xe5,0x69,0x54,0x7f,0x4f,0xf5,0x69,0xeb,0xc3,
+0x13,0x44,0x80,0xf5,0x6a,0xcf,0xe9,0xcf,0xe5,0x66,0x54,0x7f,0xfb,0x7d,0x27,0x7c,
+0x08,0x12,0xbb,0x8e,0xcf,0xe9,0xcf,0x90,0x8f,0xe3,0xe0,0xfc,0xa3,0xe0,0xfd,0x85,
+0x68,0x5f,0x85,0x69,0x60,0x85,0x6a,0x61,0xab,0x67,0x12,0xab,0xcc,0xcf,0xe9,0xcf,
+0xe5,0x66,0x44,0x80,0xfb,0x7d,0x27,0x7c,0x08,0x12,0xbb,0x8e,0xcf,0xe9,0xcf,0x90,
+0x8f,0xe1,0xe0,0xfc,0xa3,0xe0,0xfd,0x12,0x8d,0x4d,0xed,0x54,0x0f,0xfd,0xe4,0xfc,
+0x90,0x8f,0xdd,0x12,0x88,0xd7,0x90,0x8f,0xdd,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,
+0xfe,0xa3,0xe0,0xff,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x90,0x88,0xe0,0x64,0x01,0x60,
+0x09,0x90,0x90,0x79,0xe0,0x60,0x03,0x02,0x98,0x34,0x90,0x90,0x70,0xe0,0xc3,0x94,
+0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x3b,0x90,0x90,0x71,0xe0,0xc3,0x94,0xff,0x50,
+0x06,0xe0,0x04,0xf0,0xe4,0x80,0x28,0x90,0x90,0x72,0xe0,0xc3,0x94,0xff,0x50,0x0a,
+0xe0,0x04,0xf0,0xe4,0x90,0x90,0x71,0xf0,0x80,0x15,0x90,0x90,0x73,0xe0,0xc3,0x94,
+0xff,0x50,0x10,0xe0,0x04,0xf0,0xe4,0x90,0x90,0x72,0xf0,0x90,0x90,0x71,0xf0,0x90,
+0x90,0x70,0xf0,0x90,0x00,0x44,0xe0,0x54,0x0c,0x70,0x03,0x02,0x98,0x34,0xe0,0x30,
+0xe2,0x32,0x90,0x90,0x7e,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,
+0x90,0x90,0x7f,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,
+0x90,0x80,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x90,0x7f,0xf0,
+0x90,0x90,0x7e,0xf0,0x90,0x00,0x44,0xe0,0x30,0xe3,0x32,0x90,0x90,0x81,0xe0,0xc3,
+0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,0x90,0x82,0xe0,0xc3,0x94,0xff,
+0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,0x90,0x83,0xe0,0xc3,0x94,0xff,0x50,
+0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x90,0x82,0xf0,0x90,0x90,0x81,0xf0,0xef,0x25,0xe0,
+0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0xfd,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,
+0xe0,0x44,0x01,0xf0,0x22,0x74,0x74,0x2f,0xf8,0xe4,0xf6,0x74,0x6e,0x2f,0xf5,0x82,
+0xe4,0x34,0x90,0xf5,0x83,0xe4,0xf0,0x74,0x76,0x2f,0xf8,0xe4,0xf6,0x74,0x68,0x2f,
+0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0x74,0x0c,0xf0,0x74,0x64,0x2f,0xf5,0x82,0xe4,
+0x34,0x90,0xf5,0x83,0x74,0x0c,0xf0,0x74,0x6a,0x2f,0xf5,0x82,0xe4,0x34,0x90,0xf5,
+0x83,0xe4,0xf0,0x74,0x62,0x2f,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe4,0xf0,0x74,
+0x60,0x2f,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe4,0xf0,0x74,0x66,0x2f,0xf5,0x82,
+0xe4,0x34,0x90,0xf5,0x83,0x74,0x01,0xf0,0x74,0x4e,0x2f,0xf5,0x82,0xe4,0x34,0x90,
+0xf5,0x83,0x74,0x01,0xf0,0x74,0x6c,0x2f,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe4,
+0xf0,0x74,0x52,0x2f,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe4,0xf0,0x74,0x5a,0x2f,
+0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0x74,0x07,0xf0,0x74,0x50,0x2f,0xf5,0x82,0xe4,
+0x34,0x90,0xf5,0x83,0xe4,0xf0,0xef,0x25,0xe0,0x24,0x56,0xf5,0x82,0xe4,0x34,0x90,
+0xf5,0x83,0xe4,0xf0,0xa3,0x74,0x02,0xf0,0x74,0x4c,0x2f,0xf5,0x82,0xe4,0x34,0x90,
+0xf5,0x83,0xe4,0xf0,0x74,0x5c,0x2f,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe4,0xf0,
+0x74,0x5e,0x2f,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe4,0xf0,0x90,0x90,0x4a,0x04,
+0xf0,0x22,0x8f,0x59,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0xa9,
+0xf5,0x82,0x74,0x06,0x3e,0xf5,0x83,0xe0,0xf5,0x5a,0x54,0xc0,0x70,0x22,0x74,0x6e,
+0x2f,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,0xfe,0xf0,0x74,0x6e,0x25,0x59,
+0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,0xfd,0xf0,0xaf,0x59,0x02,0xb6,0xa2,
+0xe5,0x5a,0x30,0xe6,0x2b,0x74,0x6e,0x25,0x59,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,
+0xe0,0x44,0x01,0xf0,0x74,0x6a,0x25,0x59,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,
+0x64,0x02,0xaf,0x59,0x60,0x05,0x12,0xb6,0xdc,0x80,0x14,0x12,0xa2,0xbe,0x80,0x0f,
+0x74,0x6e,0x25,0x59,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,0xfe,0xf0,0xe5,
+0x5a,0x30,0xe7,0x4b,0x74,0x6e,0x25,0x59,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,
+0x44,0x02,0xf0,0xe4,0x90,0x90,0xaa,0xf0,0xa3,0xf0,0xa3,0x74,0x03,0xf0,0xe4,0xfb,
+0x7d,0x54,0x7c,0x01,0xaf,0x59,0x12,0xbc,0xb7,0xe5,0x59,0x25,0xe0,0x24,0x22,0xf8,
+0xe6,0xfe,0x08,0xe6,0x24,0x57,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x05,0xf0,
+0x74,0x6c,0x25,0x59,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0x74,0x01,0xf0,0x22,0x74,
+0x6e,0x25,0x59,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,0xfd,0xf0,0x22,0xa9,
+0x07,0x90,0x90,0x03,0xe0,0x54,0x03,0x64,0x01,0x60,0x03,0x02,0x9a,0xc1,0xe0,0x13,
+0x13,0x13,0x54,0x03,0x60,0x03,0x02,0x9a,0xc1,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,
+0xfa,0x08,0xe6,0xfb,0xed,0x2b,0xfd,0xe4,0x3a,0xfc,0x74,0x84,0x2d,0xf5,0x82,0x74,
+0x04,0x3c,0xf5,0x83,0xe0,0x54,0x1f,0x90,0x90,0xc3,0xf0,0xe9,0x25,0xe0,0x24,0x22,
+0xf8,0xe6,0xfe,0x08,0xe6,0xff,0x24,0xd0,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xe0,
+0x54,0x0f,0xfd,0xbd,0x0f,0x04,0x7d,0x01,0x80,0x02,0x7d,0x00,0x90,0x90,0xc3,0xe0,
+0x7c,0x00,0xb4,0x1b,0x02,0x7c,0x01,0xec,0x5d,0x60,0x24,0x74,0xca,0x2f,0xf5,0x82,
+0x74,0x04,0x3e,0xf5,0x83,0x74,0x0b,0xf0,0xe9,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,
+0x08,0xe6,0x24,0xcb,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0x74,0x0b,0xf0,0x22,0x74,
+0x1e,0x29,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xff,0xe9,0x25,0xe0,0x24,0x22,
+0xf8,0xe6,0xfc,0x08,0xe6,0x24,0xca,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xef,0xf0,
+0x74,0x1c,0x29,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xff,0xe9,0x25,0xe0,0x24,
+0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0xcb,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xef,
+0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x8f,0xc7,0xed,0xf0,0x90,0x8f,
+0xc6,0xef,0xf0,0xd3,0x94,0x07,0x50,0x55,0xa3,0xe0,0x70,0x19,0x90,0x8f,0xc6,0xe0,
+0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,
+0x47,0xe0,0x5f,0x80,0x16,0x90,0x8f,0xc6,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,
+0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x47,0xe0,0x4f,0xfd,0x7f,0x47,0x12,0xba,
+0xeb,0x90,0x8f,0xc6,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,
+0xfc,0xf4,0xff,0x90,0x00,0x46,0xe0,0x5f,0xfd,0x7f,0x46,0x80,0x60,0x90,0x8f,0xc6,
+0xe0,0x24,0xf8,0xf0,0xa3,0xe0,0x70,0x1c,0x90,0x8f,0xc6,0xe0,0xff,0x74,0x01,0xa8,
+0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x43,
+0xe0,0x5f,0x80,0x19,0x90,0x8f,0xc6,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,
+0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,0x43,0xe0,0x4f,0xfd,0x7f,0x43,
+0x12,0xba,0xeb,0x90,0x8f,0xc6,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,
+0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xfd,0x7f,0x43,0x12,0xba,0xeb,
+0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x90,0xca,0xef,
+0xf0,0x90,0x90,0xa0,0xe0,0xff,0x6d,0x70,0x03,0x02,0x9c,0x5e,0xed,0x14,0x60,0x34,
+0x14,0x60,0x63,0x14,0x70,0x03,0x02,0x9c,0x3f,0x24,0x03,0x60,0x03,0x02,0x9c,0x5e,
+0xef,0xb4,0x03,0x0b,0x90,0x90,0xca,0xe0,0xff,0x12,0xbc,0x99,0x02,0x9c,0x5e,0x90,
+0x90,0xa0,0xe0,0x64,0x02,0x60,0x03,0x02,0x9c,0x5e,0x90,0x90,0xca,0xe0,0xff,0x12,
+0xb9,0x4d,0x80,0x7a,0x90,0x90,0xa0,0xe0,0xfc,0xb4,0x03,0x0c,0x90,0x90,0xca,0xe0,
+0xff,0x7d,0x01,0x12,0xbc,0x0d,0x80,0x66,0xec,0xb4,0x02,0x0a,0x90,0x90,0xca,0xe0,
+0xff,0x12,0xb4,0xa9,0x80,0x58,0x90,0x90,0xa0,0xe0,0x70,0x52,0x90,0x90,0xca,0xe0,
+0xff,0x12,0xbb,0x28,0x80,0x48,0x90,0x90,0xa0,0xe0,0xfc,0xb4,0x03,0x0c,0x90,0x90,
+0xca,0xe0,0xff,0xe4,0xfd,0x12,0xbc,0x0d,0x80,0x0b,0xec,0x70,0x08,0x90,0x90,0xca,
+0xe0,0xff,0x12,0xbb,0x28,0x90,0x90,0xca,0xe0,0xff,0x12,0xb1,0x18,0x80,0x1f,0x90,
+0x90,0xa0,0xe0,0xb4,0x02,0x0a,0x90,0x90,0xca,0xe0,0xff,0x12,0xbc,0x65,0x80,0x0e,
+0x90,0x90,0xa0,0xe0,0x70,0x08,0x90,0x90,0xca,0xe0,0xff,0x12,0xb7,0x84,0xd0,0xd0,
+0x92,0xaf,0x22,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x30,0xf5,
+0x82,0x74,0x01,0x3c,0xf5,0x83,0xe4,0xf0,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,
+0x08,0xe6,0x24,0x31,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xe4,0xf0,0xef,0x25,0xe0,
+0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x32,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,
+0xe4,0xf0,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x33,0xf5,0x82,
+0x74,0x01,0x3c,0xf5,0x83,0xe4,0xf0,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,
+0xe6,0x24,0x38,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xe4,0xf0,0xef,0x25,0xe0,0x24,
+0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x39,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xe4,
+0xf0,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x3a,0xf5,0x82,0x74,
+0x01,0x3c,0xf5,0x83,0xe4,0xf0,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,
+0x24,0x3b,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0xe4,0xf0,0xfd,0x7f,0x50,0x12,0xba,
+0xeb,0xe4,0xfd,0x7f,0x51,0x12,0xba,0xeb,0xe4,0xfd,0x7f,0x52,0x12,0xba,0xeb,0xe4,
+0xfd,0x7f,0x53,0x02,0xba,0xeb,0xad,0x07,0x12,0xbb,0xee,0xef,0x64,0x01,0x60,0x10,
+0x74,0x5c,0x2d,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0x74,0x01,0xf0,0x02,0x9d,0xe5,
+0x74,0x6e,0x2d,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,0x03,0x60,0x10,0x74,
+0x5c,0x2d,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0x74,0x02,0xf0,0x02,0x9d,0xe5,0x74,
+0x68,0x2d,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,0x0f,0xd3,0x94,0x02,0x40,
+0x0f,0x74,0x5c,0x2d,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0x74,0x04,0xf0,0x80,0x65,
+0x74,0x6e,0x2d,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x30,0xe2,0x0f,0x74,0x5c,
+0x2d,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0x74,0x08,0xf0,0x80,0x48,0x74,0x6e,0x2d,
+0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x30,0xe4,0x0f,0x74,0x5c,0x2d,0xf5,0x82,
+0xe4,0x34,0x90,0xf5,0x83,0x74,0x10,0xf0,0x80,0x2b,0x74,0x52,0x2d,0xf5,0x82,0xe4,
+0x34,0x90,0xf5,0x83,0xe0,0x60,0x0f,0x74,0x5c,0x2d,0xf5,0x82,0xe4,0x34,0x90,0xf5,
+0x83,0x74,0x20,0xf0,0x80,0x0f,0x74,0x5c,0x2d,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,
+0xe4,0xf0,0x7f,0x01,0x22,0x7f,0x00,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,
+0x90,0xb8,0xef,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0x90,0x01,0xc4,0x74,0xe8,0xf0,0x74,
+0x9d,0xff,0xa3,0xf0,0x74,0xc4,0x25,0x25,0xf5,0x82,0x74,0x01,0x35,0x24,0xf5,0x83,
+0x74,0xe8,0xf0,0x74,0xc5,0x25,0x25,0xf5,0x82,0x74,0x01,0x35,0x24,0xf5,0x83,0xef,
+0xf0,0x90,0x90,0xb8,0xe0,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0xff,0x24,
+0xf8,0xf5,0x82,0x74,0x05,0x3e,0xf5,0x83,0xe0,0x70,0x38,0x74,0xf9,0x2f,0xf5,0x82,
+0x74,0x05,0x3e,0xf5,0x83,0xe0,0x70,0x2b,0x90,0x90,0xb8,0xe0,0x25,0xe0,0x24,0x22,
+0xf8,0xe6,0xfe,0x08,0xe6,0xff,0x24,0xfa,0xf5,0x82,0x74,0x05,0x3e,0xf5,0x83,0xe0,
+0x70,0x11,0x74,0xfb,0x2f,0xf5,0x82,0x74,0x05,0x3e,0xf5,0x83,0xe0,0x70,0x04,0x7f,
+0x01,0x80,0x2a,0xd3,0x90,0x90,0xba,0xe0,0x94,0xe8,0x90,0x90,0xb9,0xe0,0x94,0x03,
+0x40,0x04,0x7f,0x00,0x80,0x17,0x7f,0x32,0x7e,0x00,0x12,0xbc,0xc7,0x90,0x90,0xba,
+0xe0,0x04,0xf0,0x70,0x8c,0x90,0x90,0xb9,0xe0,0x04,0xf0,0x80,0x84,0xd0,0xd0,0x92,
+0xaf,0x22,0x41,0x90,0x4b,0x80,0x4d,0x8f,0x8a,0x00,0x2f,0x30,0x31,0x32,0x33,0x34,
+0x35,0x36,0x37,0x38,0x39,0x00,0x60,0x9c,0x8e,0xc6,0x00,0x07,0x00,0x00,0x00,0x00,
+0x0f,0xf0,0x00,0x04,0x40,0x0f,0x00,0x00,0x0f,0xf0,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x06,
+0x48,0x88,0x00,0x0e,0x26,0x6c,0x00,0x00,0x00,0x90,0x00,0x02,0x2f,0xff,0x00,0x07,
+0x00,0x00,0x00,0x02,0x28,0x80,0x00,0x04,0x47,0x0f,0x00,0x05,0x58,0x80,0x00,0x00,
+0x00,0x70,0x00,0x08,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x80,0x80,0x00,0x07,
+0x00,0x00,0x00,0x06,0x4a,0x82,0x00,0x0e,0x46,0x6c,0x00,0x00,0x00,0x90,0x00,0x03,
+0x2c,0x9a,0x00,0x07,0x00,0x00,0x00,0x04,0x48,0x80,0x00,0x04,0x47,0x7f,0x00,0x07,
+0x78,0x80,0x00,0x00,0x00,0x70,0x00,0x08,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x08,
+0x80,0xb0,0x00,0x00,0x00,0x00,0x00,0x06,0x4b,0x82,0x00,0x0e,0x46,0x6c,0x00,0x00,
+0x00,0x90,0x00,0x03,0x2c,0x9a,0x41,0x8e,0xc5,0x00,0x00,0xef,0x25,0xe0,0x24,0x22,
+0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x3c,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0x74,0xff,
+0xf0,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x3d,0xf5,0x82,0x74,
+0x01,0x3c,0xf5,0x83,0x74,0xff,0xf0,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,
+0xe6,0x24,0x3e,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0x74,0xff,0xf0,0xef,0x25,0xe0,
+0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x34,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,
+0x74,0xff,0xf0,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x35,0xf5,
+0x82,0x74,0x01,0x3c,0xf5,0x83,0x74,0xff,0xf0,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,
+0xfc,0x08,0xe6,0x24,0x36,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0x74,0xff,0xf0,0xef,
+0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x37,0xf5,0x82,0x74,0x01,0x3e,
+0xf5,0x83,0x74,0xff,0xf0,0xfd,0x7f,0x54,0x12,0xba,0xeb,0x7d,0xff,0x7f,0x55,0x12,
+0xba,0xeb,0x7d,0xff,0x7f,0x56,0x12,0xba,0xeb,0x7d,0xff,0x7f,0x57,0x02,0xba,0xeb,
+0x8f,0x3b,0x8d,0x3c,0x8b,0x3d,0xe5,0x3d,0x54,0x1f,0xf5,0x42,0xe5,0x3b,0xc4,0x33,
+0x54,0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x86,0xf5,0x83,0xe5,0x82,0x25,0x3c,0xf5,
+0x82,0xe4,0x35,0x83,0xf5,0x83,0xe0,0xf5,0x40,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,
+0xfe,0x08,0xe6,0x24,0xfd,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xe0,0xb4,0x01,0x05,
+0x75,0x43,0x02,0x80,0x03,0x75,0x43,0x01,0xe5,0x3e,0xc3,0x95,0x43,0x40,0x07,0xad,
+0x3c,0xaf,0x3b,0x02,0xa4,0xab,0xe5,0x40,0x25,0x3f,0xf5,0x41,0xe5,0x42,0x90,0x41,
+0xe6,0x93,0xff,0xe5,0x41,0xd3,0x9f,0xe5,0x3b,0x40,0x2a,0xc4,0x33,0x54,0xe0,0x24,
+0x80,0xf5,0x82,0xe4,0x34,0x86,0xf5,0x83,0xe5,0x82,0x25,0x3c,0xf5,0x82,0xe4,0x35,
+0x83,0xf5,0x83,0xe4,0xf0,0xab,0x3d,0xad,0x3c,0xaf,0x3b,0x12,0xb9,0x83,0xad,0x3c,
+0xaf,0x3b,0x02,0x99,0xef,0xc4,0x33,0x54,0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x86,
+0xf5,0x83,0xe5,0x82,0x25,0x3c,0xf5,0x82,0xe4,0x35,0x83,0xf5,0x83,0xe5,0x41,0xf0,
+0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x90,0xd0,0xef,0xf0,0xd3,0x94,0x07,
+0x50,0x49,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,
+0xff,0x90,0x00,0x46,0xe0,0x5f,0xfd,0x7f,0x46,0x12,0xba,0xeb,0x90,0x90,0xd0,0xe0,
+0xfd,0x74,0x01,0x7e,0x00,0xa8,0x05,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,
+0xf9,0xff,0x90,0x00,0x44,0xe0,0xfb,0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,
+0xce,0xa2,0xe7,0x13,0xce,0x13,0xd8,0xf8,0xff,0x80,0x4e,0x90,0x90,0xd0,0xe0,0x24,
+0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,
+0xff,0x90,0x00,0x43,0xe0,0x5f,0xfd,0x7f,0x43,0x12,0xba,0xeb,0x90,0x90,0xd0,0xe0,
+0xfd,0x74,0x01,0x7e,0x00,0xa8,0x05,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,
+0xf9,0xff,0x90,0x00,0x42,0xe0,0xfb,0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,
+0xce,0xa2,0xe7,0x13,0xce,0x13,0xd8,0xf8,0xff,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,
+0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x8f,0xbf,0xef,0xf0,0xa3,0xeb,0xf0,0xa3,0xea,0xf0,
+0xa3,0xe9,0xf0,0x90,0x8f,0xc0,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x90,0x00,
+0x01,0x12,0x88,0x4c,0xfa,0xe5,0xf0,0x24,0x00,0xff,0xe4,0x3a,0xfe,0x90,0x8f,0xc0,
+0xa3,0xe0,0xfa,0x90,0x00,0x01,0xee,0x8f,0xf0,0x12,0x88,0x84,0x12,0x34,0x05,0xff,
+0x60,0x42,0x90,0x90,0xb3,0xe0,0xb5,0x07,0x1f,0x90,0x8f,0xc0,0xe0,0xfb,0xa3,0xe0,
+0xfa,0xa3,0xe0,0xf9,0x90,0x00,0x01,0x12,0x88,0x4c,0xff,0x90,0x90,0xb4,0xe0,0x65,
+0xf0,0x70,0x03,0xa3,0xe0,0x6f,0x60,0x3a,0x90,0x8f,0xbf,0xe0,0xff,0xa3,0xe0,0xfb,
+0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x90,0x00,0x01,0x12,0x88,0x4c,0xfd,0xac,0xf0,0x12,
+0xac,0x9f,0x80,0x1e,0x90,0x8f,0xc0,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x12,
+0x34,0x05,0xff,0x90,0x90,0xb3,0xe0,0x6f,0x60,0x08,0x90,0x8f,0xbf,0xe0,0xff,0x12,
+0xbd,0x2d,0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x58,0xe4,0x90,0x8f,0xd6,0xf0,0xef,0x25,
+0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x37,0xf5,0x82,0x74,0x01,0x3e,0xf5,
+0x83,0x74,0x02,0xf0,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x22,
+0xf5,0x82,0x74,0x05,0x3e,0xf5,0x83,0x74,0xff,0xf0,0x12,0x9d,0xe8,0xef,0x70,0x17,
+0xe5,0x58,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0xc8,0xf5,0x82,0x74,
+0x01,0x3e,0xf5,0x83,0x74,0xfd,0xf0,0x7b,0x02,0x7d,0x03,0xaf,0x58,0x12,0xb7,0xba,
+0x90,0x90,0x03,0xe0,0x13,0x13,0x13,0x54,0x03,0xff,0xbf,0x01,0x1d,0xe5,0x58,0x70,
+0x0f,0x90,0x90,0x64,0xe0,0xd3,0x94,0x02,0x40,0x06,0x90,0x8f,0xd6,0x74,0x01,0xf0,
+0x90,0x8f,0xd6,0xe0,0x60,0x09,0xe4,0xff,0x80,0x02,0xaf,0x58,0x12,0x79,0xcd,0x74,
+0x64,0x25,0x58,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0x64,
+0x25,0x58,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x44,0x02,0xf0,0x22,0x8f,0x27,
+0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x5f,0xf5,0x82,0x74,0x01,
+0x3e,0xf5,0x83,0xe4,0xf0,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,
+0x3c,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x08,0xf0,0xe4,0x90,0x90,0xaa,0xf0,
+0xa3,0xf0,0xa3,0x74,0x14,0xf0,0xe4,0xfb,0x7d,0x5c,0x7c,0x01,0x12,0xbc,0xb7,0xe5,
+0x27,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x5f,0xf5,0x82,0x74,0x01,
+0x3e,0xf5,0x83,0x74,0x05,0xf0,0xe5,0x27,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,
+0xe6,0x24,0x92,0xf5,0x82,0x74,0x06,0x3e,0xf5,0x83,0x74,0x02,0xf0,0x74,0x60,0x25,
+0x27,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0x74,0x01,0xf0,0x74,0x64,0x25,0x27,0xf5,
+0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,0x0f,0xc3,0x94,0x0c,0x50,0x15,0x7b,0x01,
+0x7d,0x0c,0xaf,0x27,0x12,0x8a,0xba,0x90,0x90,0x99,0xe0,0x30,0xe0,0x05,0xaf,0x27,
+0x12,0x44,0xab,0x22,0xef,0x25,0xe0,0x25,0xe0,0x24,0x08,0xf8,0x76,0x33,0xef,0x25,
+0xe0,0x25,0xe0,0x24,0x09,0xf8,0xe4,0xf6,0xef,0x25,0xe0,0x25,0xe0,0x24,0x0a,0xf8,
+0x76,0x03,0xef,0x25,0xe0,0x25,0xe0,0x24,0x0b,0xf8,0xe4,0xf6,0xef,0x25,0xe0,0x25,
+0xe0,0x24,0x08,0xf8,0xe6,0xfe,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,
+0x24,0x30,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xee,0xf0,0xef,0x25,0xe0,0x25,0xe0,
+0x24,0x09,0xf8,0xe6,0xfe,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,
+0x31,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xee,0xf0,0xef,0x25,0xe0,0x25,0xe0,0x24,
+0x0a,0xf8,0xe6,0xfe,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x32,
+0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xee,0xf0,0xef,0x25,0xe0,0x25,0xe0,0x24,0x0b,
+0xf8,0xe6,0xfe,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x33,0xf5,
+0x82,0x74,0x01,0x3c,0xf5,0x83,0xee,0xf0,0x22,0xef,0x25,0xe0,0x25,0xe0,0x24,0xe9,
+0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0x74,0x0f,0xf0,0xef,0x25,0xe0,0x25,0xe0,0x24,
+0xea,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0x74,0x01,0xf0,0xef,0x25,0xe0,0x25,0xe0,
+0x24,0xeb,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe4,0xf0,0xef,0x25,0xe0,0x25,0xe0,
+0x24,0xe9,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0xfe,0xef,0x25,0xe0,0x24,0x22,
+0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x38,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xee,0xf0,
+0xef,0x25,0xe0,0x25,0xe0,0x24,0xea,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0xfe,
+0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x39,0xf5,0x82,0x74,0x01,
+0x3c,0xf5,0x83,0xee,0xf0,0xef,0x25,0xe0,0x25,0xe0,0x24,0xeb,0xf5,0x82,0xe4,0x34,
+0x8f,0xf5,0x83,0xe0,0xfe,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,
+0x3a,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xee,0xf0,0x22,0x8f,0x3b,0x8d,0x3c,0x75,
+0xf0,0xe0,0xef,0xa4,0x24,0x07,0xf5,0x82,0xe5,0xf0,0x34,0x89,0xf5,0x83,0x75,0xf0,
+0x07,0xe5,0x3c,0x12,0x89,0x14,0xe0,0xff,0xe5,0x3b,0xc4,0x33,0x54,0xe0,0x24,0x85,
+0xf5,0x82,0xe4,0x34,0x8e,0xf5,0x83,0xe5,0x82,0x25,0x3c,0xf5,0x82,0xe4,0x35,0x83,
+0xf5,0x83,0xe0,0x54,0x1f,0xf5,0x3d,0xd3,0x9f,0x40,0x02,0x8f,0x3d,0xe5,0x3d,0x25,
+0xe0,0x24,0xae,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,
+0xff,0xe5,0x3d,0x25,0xe0,0x24,0x76,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,
+0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xe5,0x3b,0x75,0xf0,
+0x40,0xa4,0x24,0x80,0xf5,0x82,0xe4,0x34,0x88,0xf5,0x83,0x75,0xf0,0x02,0xe5,0x3c,
+0x12,0x89,0x14,0xee,0xf0,0xa3,0xef,0xf0,0xab,0x3d,0xad,0x3c,0xaf,0x3b,0x12,0xb9,
+0x83,0xad,0x3c,0xaf,0x3b,0x12,0x99,0xef,0xaf,0x3d,0x22,0x90,0x00,0x02,0x12,0x87,
+0xd5,0x90,0x90,0x7a,0xf0,0xe0,0x30,0xe0,0x2d,0x90,0x90,0x74,0x74,0x01,0xf0,0xf5,
+0x82,0x75,0x83,0x00,0x12,0x87,0xd5,0x25,0xe0,0x25,0xe0,0x90,0x90,0x78,0xf0,0xef,
+0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x22,0xf5,0x82,0x74,0x05,0x3e,
+0xf5,0x83,0xe4,0xf0,0x80,0x13,0xe4,0x90,0x90,0x74,0xf0,0x90,0x90,0x7c,0xe0,0xfb,
+0x7d,0x83,0x7c,0x08,0xe4,0xff,0x12,0xbb,0x8e,0x90,0x90,0x7a,0xe0,0x30,0xe1,0x1b,
+0x7d,0x0c,0x7f,0x47,0x12,0xba,0xeb,0x90,0x00,0x48,0xe0,0x44,0x0c,0xfd,0x7f,0x48,
+0x12,0xba,0xeb,0x90,0x00,0x46,0xe0,0x44,0x10,0x80,0x1e,0x90,0x00,0x47,0xe0,0x54,
+0xf3,0xfd,0x7f,0x47,0x12,0xba,0xeb,0x90,0x00,0x48,0xe0,0x54,0xf3,0xfd,0x7f,0x48,
+0x12,0xba,0xeb,0x90,0x00,0x46,0xe0,0x54,0xef,0xfd,0x7f,0x46,0x12,0xba,0xeb,0xe4,
+0x90,0x90,0x76,0xf0,0x22,0x8f,0x59,0x74,0x6c,0x2f,0xf5,0x82,0xe4,0x34,0x90,0xf5,
+0x83,0xe0,0x60,0x2c,0x74,0x6c,0x2f,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe4,0xf0,
+0x74,0x6e,0x2f,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,0xfd,0xf0,0x74,0x6e,
+0x25,0x59,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,0x07,0x70,0x5b,0x80,0x54,
+0x74,0x50,0x25,0x59,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x04,0xf0,0x74,0x6e,
+0x25,0x59,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,0xef,0xf0,0x74,0x50,0x25,
+0x59,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xd3,0x94,0x01,0x40,0x26,0x74,0x74,
+0x25,0x59,0xf8,0xe6,0xb4,0x01,0x22,0x74,0x52,0x25,0x59,0xf5,0x82,0xe4,0x34,0x90,
+0xf5,0x83,0xe0,0x70,0x14,0x74,0x52,0x25,0x59,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,
+0xe0,0x04,0xf0,0x22,0xaf,0x59,0x12,0xb6,0xa2,0x22,0xad,0x07,0x12,0xbb,0xee,0xef,
+0x64,0x01,0x60,0x0f,0x74,0x5e,0x2d,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0x74,0x01,
+0xf0,0x80,0x68,0x74,0x62,0x2d,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x60,0x0f,
+0x74,0x5e,0x2d,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0x74,0x02,0xf0,0x80,0x4c,0x74,
+0x60,0x2d,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x60,0x0f,0x74,0x5e,0x2d,0xf5,
+0x82,0xe4,0x34,0x90,0xf5,0x83,0x74,0x04,0xf0,0x80,0x30,0x74,0x68,0x2d,0xf5,0x82,
+0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,0x0f,0xd3,0x94,0x04,0x40,0x0f,0x74,0x5e,0x2d,
+0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0x74,0x08,0xf0,0x80,0x0f,0x74,0x5e,0x2d,0xf5,
+0x82,0xe4,0x34,0x90,0xf5,0x83,0xe4,0xf0,0x7f,0x01,0x22,0x7f,0x00,0x22,0x02,0xa7,
+0x3c,0x02,0x58,0x57,0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0x40,0x03,0xf6,0x80,0x01,
+0xf2,0x08,0xdf,0xf4,0x80,0x29,0xe4,0x93,0xa3,0xf8,0x54,0x07,0x24,0x0c,0xc8,0xc3,
+0x33,0xc4,0x54,0x0f,0x44,0x20,0xc8,0x83,0x40,0x04,0xf4,0x56,0x80,0x01,0x46,0xf6,
+0xdf,0xe4,0x80,0x0b,0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,0x90,0x9e,0xa2,0xe4,
+0x7e,0x01,0x93,0x60,0xbc,0xa3,0xff,0x54,0x3f,0x30,0xe5,0x09,0x54,0x1f,0xfe,0xe4,
+0x93,0xa3,0x60,0x01,0x0e,0xcf,0x54,0xc0,0x25,0xe0,0x60,0xa8,0x40,0xb8,0xe4,0x93,
+0xa3,0xfa,0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,
+0xca,0xf0,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xdf,0xe9,0xde,0xe7,0x80,
+0xbe,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x8f,0x4a,0x8b,0x4b,0x8a,0x4c,0x89,0x4d,
+0x12,0xba,0x98,0xab,0x4b,0xaa,0x4c,0xa9,0x4d,0x12,0x34,0x05,0xff,0x74,0x76,0x25,
+0x4a,0xf8,0xa6,0x07,0xef,0x14,0x60,0x0e,0x14,0x60,0x21,0x14,0x60,0x35,0x24,0x03,
+0x70,0x4c,0x7d,0x01,0x80,0x43,0xab,0x4b,0xaa,0x4c,0xa9,0x4d,0x90,0x00,0x02,0x12,
+0x87,0xd5,0xfb,0xe4,0xfd,0xaf,0x4a,0x12,0xb0,0x13,0x80,0x2d,0xab,0x4b,0xaa,0x4c,
+0xa9,0x4d,0x90,0x00,0x02,0x12,0x87,0xd5,0xfb,0x7d,0x01,0xaf,0x4a,0x12,0xb0,0x13,
+0x1d,0x80,0x16,0xab,0x4b,0xaa,0x4c,0xa9,0x4d,0x90,0x00,0x02,0x12,0x87,0xd5,0xfb,
+0x7d,0x02,0xaf,0x4a,0x12,0xb0,0x13,0xe4,0xfd,0xaf,0x4a,0x12,0x84,0xa3,0xd0,0xd0,
+0x92,0xaf,0x22,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfa,0x08,0xe6,0xfb,0x24,0x60,
+0xf5,0x82,0x74,0x05,0x3a,0xf5,0x83,0xe0,0x90,0x90,0x84,0xf0,0x74,0x61,0x2b,0xf5,
+0x82,0x74,0x05,0x3a,0xf5,0x83,0xe0,0x90,0x90,0x85,0xf0,0xef,0x25,0xe0,0x24,0x22,
+0xf8,0xe6,0xfa,0x08,0xe6,0xfb,0x24,0x62,0xf5,0x82,0x74,0x05,0x3a,0xf5,0x83,0xe0,
+0x90,0x90,0x86,0xf0,0x74,0x63,0x2b,0xf5,0x82,0x74,0x05,0x3a,0xf5,0x83,0xe0,0x90,
+0x90,0x87,0xf0,0xc3,0x74,0xff,0x9d,0xff,0x90,0x90,0x85,0xe0,0xd3,0x9f,0x40,0x1e,
+0xe0,0x2d,0xf0,0xa3,0xe0,0xb4,0xff,0x0f,0xe4,0xf0,0xa3,0xe0,0xb4,0xff,0x03,0xe4,
+0xf0,0x22,0x90,0x90,0x87,0x80,0x03,0x90,0x90,0x86,0xe0,0x04,0xf0,0x22,0x90,0x90,
+0x85,0xe0,0x2d,0xf0,0x22,0xa9,0x03,0xe4,0xfb,0xfa,0xed,0x30,0xe0,0x02,0x7b,0x80,
+0xef,0xc4,0x33,0x33,0x33,0x54,0x80,0xfe,0xed,0xc3,0x13,0x4e,0x90,0xfd,0x10,0xf0,
+0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x25,0xf5,0x82,0x74,0x04,
+0x3c,0xf5,0x83,0xed,0xf0,0xe9,0x60,0x1e,0xaf,0x03,0x74,0x0f,0x2f,0xf5,0x82,0xe4,
+0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x74,0x10,0x2f,0xf5,0x82,0xe4,0x34,0xfc,
+0xf5,0x83,0xe0,0x44,0x80,0xf0,0xaf,0x03,0x74,0x08,0x2f,0xf5,0x82,0xe4,0x34,0xfc,
+0xf5,0x83,0xe4,0xf0,0x74,0x09,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,
+0xf0,0xf0,0x74,0x21,0x2b,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf7,0xf0,
+0xae,0x02,0xaf,0x03,0x22,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,
+0x09,0xf5,0x82,0x74,0x02,0x3c,0xf5,0x83,0xe0,0xfe,0x12,0x34,0x05,0xfd,0xee,0x2d,
+0xfd,0xef,0x25,0xe0,0x25,0xe0,0x24,0x14,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xed,
+0xf0,0x90,0x00,0x01,0x12,0x87,0xd5,0xfd,0xee,0x2d,0xfd,0xef,0x25,0xe0,0x25,0xe0,
+0x24,0x15,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xed,0xf0,0x90,0x00,0x02,0x12,0x87,
+0xd5,0xfd,0xee,0x2d,0xfd,0xef,0x25,0xe0,0x25,0xe0,0x24,0x16,0xf5,0x82,0xe4,0x34,
+0x90,0xf5,0x83,0xed,0xf0,0x90,0x00,0x03,0x12,0x87,0xd5,0xfd,0xee,0x2d,0xfe,0xef,
+0x25,0xe0,0x25,0xe0,0x24,0x17,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xee,0xf0,0x22,
+0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xf5,0x83,0x08,0xe6,0x2d,0xf5,0x82,0xe5,0x83,
+0x3c,0xf5,0x83,0xe5,0x41,0xf0,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xf5,0x83,0x08,
+0xe6,0x2d,0xf5,0x82,0xe5,0x83,0x3c,0xf5,0x83,0xa3,0xe5,0x40,0xf0,0xef,0x25,0xe0,
+0x24,0x22,0xf8,0xe6,0xf5,0x83,0x08,0xe6,0x2d,0xf5,0x82,0xe5,0x83,0x3c,0xf5,0x83,
+0xa3,0xa3,0xe5,0x3f,0xf0,0xef,0xbb,0x01,0x18,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,
+0x08,0xe6,0x2d,0xff,0xee,0x3c,0x8f,0x82,0xf5,0x83,0xa3,0xa3,0xa3,0x74,0x03,0xf0,
+0x22,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x2d,0xff,0xee,0x3c,0x8f,0x82,
+0xf5,0x83,0xa3,0xa3,0xa3,0x74,0x01,0xf0,0x22,0xa9,0x07,0xed,0xc3,0x94,0x20,0x50,
+0x70,0xed,0x30,0xe0,0x29,0xeb,0xc4,0x54,0xf0,0xfb,0xed,0xc3,0x13,0xff,0xe9,0x25,
+0xe0,0x24,0x22,0xf8,0xe6,0xf5,0x83,0x08,0xe6,0x2f,0xff,0xe4,0x35,0x83,0xfe,0x74,
+0xa4,0x2f,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xe0,0x54,0x0f,0x80,0x22,0xed,0xc3,
+0x13,0xff,0xe9,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xf5,0x83,0x08,0xe6,0x2f,0xff,0xe4,
+0x35,0x83,0xfe,0x74,0xa4,0x2f,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xe0,0x54,0xf0,
+0xf0,0xed,0xc3,0x13,0xff,0xe9,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x2f,
+0xff,0xe4,0x3c,0xfe,0x74,0xa4,0x2f,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xe0,0x4b,
+0xf0,0x22,0xef,0x64,0x01,0x70,0x3d,0x90,0x90,0xa2,0xe0,0x60,0x03,0x7f,0x00,0x22,
+0x90,0x90,0x20,0xe0,0x60,0x03,0x7f,0x01,0x22,0x90,0x90,0xa1,0xe0,0x60,0x03,0x7f,
+0x01,0x22,0x90,0x90,0x9f,0xe0,0xff,0x13,0x13,0x54,0x3f,0x30,0xe0,0x0b,0xef,0xc4,
+0x13,0x54,0x07,0x30,0xe0,0x03,0x7f,0x00,0x22,0x90,0x90,0xa3,0xe0,0x7f,0x01,0x60,
+0x36,0x7f,0x00,0x22,0x90,0x90,0x9c,0xe0,0x60,0x03,0x7f,0x00,0x22,0x90,0x90,0x20,
+0xe0,0x60,0x03,0x7f,0x01,0x22,0x90,0x90,0x9b,0xe0,0x60,0x03,0x7f,0x01,0x22,0x90,
+0x90,0x99,0xe0,0x13,0x13,0x54,0x3f,0x30,0xe0,0x03,0x7f,0x00,0x22,0x90,0x90,0x9d,
+0xe0,0x7f,0x01,0x60,0x02,0x7f,0x00,0x22,0x90,0x8f,0xd6,0xef,0xf0,0xa3,0xed,0xf0,
+0xe4,0xff,0x90,0x90,0x03,0xe0,0x13,0x13,0x13,0x54,0x03,0xfe,0xbe,0x01,0x16,0x90,
+0x8f,0xd6,0xe0,0x70,0x0a,0x90,0x90,0x64,0xe0,0xc3,0x94,0x04,0x50,0x01,0x0f,0xef,
+0x60,0x0b,0xe4,0x80,0x04,0x90,0x8f,0xd6,0xe0,0xff,0x12,0x7d,0xd0,0x90,0x8f,0xd7,
+0xe0,0x60,0x18,0x90,0x8f,0xd6,0xe0,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,
+0x24,0x22,0xf5,0x82,0x74,0x05,0x3e,0xf5,0x83,0xe4,0xf0,0x90,0x8f,0xd6,0xe0,0xff,
+0x24,0x64,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0x64,0x2f,
+0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x44,0x04,0xf0,0x22,0xd3,0x10,0xaf,0x01,
+0xc3,0xc0,0xd0,0x90,0x8f,0xa2,0xef,0xf0,0xa3,0xec,0xf0,0xa3,0xed,0xf0,0xe4,0xa3,
+0xf0,0xa3,0xf0,0x90,0x8f,0xa3,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,
+0x44,0xc3,0x90,0x8f,0xa6,0xe0,0x94,0xe8,0x90,0x8f,0xa5,0xe0,0x94,0x03,0x40,0x1e,
+0x90,0x8f,0xa2,0xe0,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0xc6,0xf5,
+0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x7f,0x00,0x80,0x19,0x90,0x8f,
+0xa6,0xe0,0x04,0xf0,0x70,0x06,0x90,0x8f,0xa5,0xe0,0x04,0xf0,0x7f,0x0a,0x7e,0x00,
+0x12,0xbc,0xc7,0x80,0xae,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,
+0xc3,0xc0,0xd0,0xcd,0x54,0xfc,0xcd,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xf5,0x83,
+0x08,0xe6,0x2d,0xf5,0x82,0xe5,0x83,0x3c,0xf5,0x83,0xeb,0xf0,0xef,0x25,0xe0,0x24,
+0x22,0xf8,0xe6,0xfa,0x08,0xe6,0x2d,0xfb,0xea,0x3c,0x8b,0x82,0xf5,0x83,0xa3,0xe5,
+0x5f,0xf0,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfa,0x08,0xe6,0x2d,0xfb,0xea,0x3c,
+0x8b,0x82,0xf5,0x83,0xa3,0xa3,0xe5,0x60,0xf0,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,
+0xfe,0x08,0xe6,0x2d,0xff,0xee,0x3c,0x8f,0x82,0xf5,0x83,0xa3,0xa3,0xa3,0xe5,0x61,
+0xf0,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x90,0xbc,0xed,0xf0,0x90,0x90,0xbb,0xef,0xf0,
+0x12,0xad,0x6f,0xef,0x64,0x01,0x70,0x56,0x90,0x90,0xbb,0xe0,0xff,0x25,0xe0,0x25,
+0xe0,0x24,0x16,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xfd,0x7b,0x01,0x12,0xa8,
+0x85,0x90,0x90,0xbc,0xe0,0x60,0x10,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,
+0x83,0xe0,0x44,0x10,0xf0,0x80,0x0e,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,
+0x83,0xe0,0x54,0xef,0xf0,0x90,0x90,0xbb,0xe0,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,
+0x08,0xe6,0x24,0x1f,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0x74,0x20,0xf0,0x22,0x90,
+0x8f,0xc3,0xef,0xf0,0xa3,0xec,0xf0,0xa3,0xed,0xf0,0x90,0x90,0xb3,0x74,0x01,0xf0,
+0xa3,0xec,0xf0,0xa3,0xed,0xf0,0xe4,0xfd,0x7f,0x0b,0x12,0x9a,0xc2,0xe4,0xfd,0x7f,
+0x02,0x12,0x9a,0xc2,0x12,0xb8,0x58,0x90,0x8f,0xc3,0xe0,0xff,0xe4,0xfd,0x12,0xbb,
+0x6d,0xe4,0x90,0x90,0xb7,0xf0,0x90,0x8f,0xc3,0xe0,0xff,0x25,0xe0,0x24,0x22,0xf8,
+0xe6,0xfc,0x08,0xe6,0x24,0xc9,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xe4,0xf0,0x90,
+0x8f,0xc4,0xe0,0xfc,0xa3,0xe0,0xfd,0xec,0xf5,0x3f,0x8d,0x40,0xe4,0xf5,0x41,0x7b,
+0x01,0x7d,0x60,0x7c,0x01,0x02,0xa9,0x80,0xe4,0xfd,0x7f,0x45,0x12,0xba,0xeb,0x90,
+0x04,0xfd,0xe4,0xf0,0xa3,0xf0,0x90,0x90,0x7b,0xf0,0x90,0x90,0x7e,0xf0,0x90,0x90,
+0x81,0xf0,0x90,0x90,0x7f,0xf0,0x90,0x90,0x82,0xf0,0x90,0x90,0x80,0xf0,0x90,0x90,
+0x83,0xf0,0x90,0x90,0x70,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x90,
+0x75,0xf0,0xa3,0xf0,0x90,0x90,0x79,0xf0,0x90,0x90,0x88,0xf0,0x90,0x90,0x7d,0xf0,
+0x90,0x90,0x77,0xf0,0x90,0x90,0x74,0xf0,0x90,0x90,0x7c,0x74,0xc0,0xf0,0xe4,0x90,
+0x90,0x78,0xf0,0x90,0x00,0x51,0xe0,0x44,0xc0,0xfd,0x7f,0x51,0x02,0xba,0xeb,0xd3,
+0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,
+0xfd,0x24,0x1d,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xe0,0x60,0x41,0x74,0x22,0x2d,
+0xf5,0x82,0x74,0x05,0x3c,0xf5,0x83,0xe0,0x54,0x90,0x60,0x17,0xef,0x25,0xe0,0x24,
+0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0xc6,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xe0,
+0x44,0x40,0xf0,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0xc7,0xf5,
+0x82,0x74,0x01,0x3c,0xf5,0x83,0xe0,0x30,0xe1,0xac,0x7f,0x00,0x80,0x02,0x7f,0x01,
+0xd0,0xd0,0x92,0xaf,0x22,0x74,0x18,0x2f,0xf8,0xe6,0x70,0x5c,0x74,0x68,0x2f,0xf5,
+0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,0x0f,0xd3,0x94,0x01,0x50,0x4a,0xef,0x25,
+0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0xfd,0x24,0x87,0xf5,0x82,0x74,0x02,0x3c,
+0xf5,0x83,0xe0,0x70,0x33,0x90,0x90,0x03,0xe0,0x54,0x03,0xfe,0xbe,0x02,0x19,0xef,
+0x25,0xe0,0x24,0x10,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xfa,0xa3,0xe0,0xf5,
+0x82,0x8a,0x83,0xe0,0x60,0x0f,0x80,0x10,0x74,0xaf,0x2d,0xf5,0x82,0x74,0x01,0x3c,
+0xf5,0x83,0xe0,0x70,0x03,0x7f,0x01,0x22,0x7f,0x00,0x22,0x8f,0x2f,0x90,0x90,0xb3,
+0xe0,0x64,0x01,0x70,0x5a,0x12,0xb8,0x58,0xbf,0x01,0x07,0x7d,0x01,0xaf,0x2f,0x12,
+0xbb,0x6d,0x90,0x00,0x46,0xe0,0x44,0x04,0xfd,0x7f,0x46,0x12,0xba,0xeb,0x90,0x00,
+0x44,0xe0,0x54,0xfb,0xfd,0x7f,0x44,0x12,0xba,0xeb,0x90,0x00,0x46,0xe0,0x54,0xfb,
+0xfd,0x7f,0x46,0x12,0xba,0xeb,0x7f,0x02,0x12,0xa0,0xc1,0x90,0x90,0xb7,0xef,0xf0,
+0xe0,0xff,0xe5,0x2f,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0xc9,0xf5,
+0x82,0x74,0x01,0x3c,0xf5,0x83,0xef,0xf0,0xef,0xb4,0x01,0x03,0x12,0xbb,0xce,0x22,
+0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x8b,0x6d,0x8a,0x6e,0x89,0x6f,0x90,0x90,0xad,
+0xeb,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,0xf0,0xa3,0xe5,0x70,0xf0,0xa3,0xe5,0x71,0xf0,
+0xa3,0xe5,0x72,0xf0,0xaf,0x73,0x15,0x73,0xef,0x60,0x2a,0x90,0x90,0xb0,0xe0,0xfb,
+0xa3,0xe4,0x75,0xf0,0x01,0x12,0x34,0x85,0xa9,0xf0,0xfa,0x12,0x34,0x05,0xff,0x90,
+0x90,0xad,0xe0,0xfb,0xa3,0xe4,0x75,0xf0,0x01,0x12,0x34,0x85,0xa9,0xf0,0xfa,0xef,
+0x12,0x88,0x02,0x80,0xcf,0xab,0x6d,0xaa,0x6e,0xa9,0x6f,0xd0,0xd0,0x92,0xaf,0x22,
+0x8e,0x51,0x8f,0x52,0x8b,0x53,0x8a,0x54,0x89,0x55,0xe4,0xf5,0x56,0xef,0xfd,0x7f,
+0x31,0x12,0xba,0xeb,0xe5,0x51,0x54,0x03,0xff,0x90,0x00,0x32,0xe0,0x54,0xfc,0x4f,
+0xfd,0x7f,0x32,0x12,0xba,0xeb,0x90,0x00,0x33,0xe0,0x54,0x7f,0xfd,0x7f,0x33,0x12,
+0xba,0xeb,0x90,0x00,0x33,0xe0,0x20,0xe7,0x0b,0xe5,0x56,0xc3,0x94,0x64,0x50,0x04,
+0x05,0x56,0x80,0xee,0xe5,0x56,0xc3,0x94,0x64,0x50,0x10,0x90,0x00,0x30,0xe0,0xab,
+0x53,0xaa,0x54,0xa9,0x55,0x12,0x88,0x02,0x7f,0x01,0x22,0x7f,0x00,0x22,0x12,0x34,
+0x05,0xfe,0x90,0x00,0x01,0x12,0x87,0xd5,0x54,0x1f,0xfd,0x74,0x08,0x2f,0xf5,0x82,
+0xe4,0x34,0x90,0xf5,0x83,0xed,0xf0,0x74,0x08,0x2f,0xf5,0x82,0xe4,0x34,0x90,0xf5,
+0x83,0xe0,0x70,0x0d,0x74,0x08,0x2f,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0x74,0x20,
+0xf0,0xee,0xc3,0x94,0x20,0x50,0x21,0x90,0x00,0x02,0x12,0x87,0xd5,0xfd,0xef,0xc4,
+0x33,0x54,0xe0,0x24,0x83,0xf5,0x82,0xe4,0x34,0x8c,0xf5,0x83,0xe5,0x82,0x2e,0xf5,
+0x82,0xe4,0x35,0x83,0xf5,0x83,0xed,0xf0,0x22,0x75,0xf0,0x04,0xef,0xa4,0x2d,0xf5,
+0x82,0xe4,0x35,0xf0,0xf5,0x83,0xe5,0x82,0x24,0xe9,0xf5,0x82,0xe5,0x83,0x34,0x8f,
+0xf5,0x83,0xe0,0xfe,0xeb,0xf4,0xfc,0xee,0x5c,0xf0,0x75,0xf0,0x04,0xef,0xa4,0x2d,
+0xf5,0x82,0xe4,0x35,0xf0,0xf5,0x83,0xe5,0x82,0x24,0xe9,0xf5,0x82,0xe5,0x83,0x34,
+0x8f,0xf5,0x83,0xe0,0xfe,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfa,0x08,0xe6,0xfb,
+0xed,0x2b,0xfd,0xe4,0x3a,0xfc,0x74,0x38,0x2d,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,
+0xee,0xf0,0x22,0xed,0x24,0xfe,0x60,0x1e,0x04,0x70,0x51,0x74,0x66,0x2f,0xf5,0x82,
+0xe4,0x34,0x90,0xf5,0x83,0x74,0x01,0xf0,0x74,0x4e,0x2f,0xf5,0x82,0xe4,0x34,0x90,
+0xf5,0x83,0x74,0x01,0xf0,0x22,0xeb,0x70,0x0f,0x74,0x66,0x2f,0xf5,0x82,0xe4,0x34,
+0x90,0xf5,0x83,0x74,0x05,0xf0,0x80,0x0c,0x74,0x66,0x2f,0xf5,0x82,0xe4,0x34,0x90,
+0xf5,0x83,0xeb,0xf0,0x74,0x66,0x2f,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xfe,
+0x74,0x4e,0x2f,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xee,0xf0,0x22,0x8f,0x4a,0x12,
+0x34,0x05,0xff,0xe5,0x4a,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x37,
+0xf5,0x82,0x74,0x06,0x3c,0xf5,0x83,0xe4,0xf0,0xef,0x14,0x60,0x0e,0x14,0x60,0x12,
+0x14,0x60,0x13,0x24,0x03,0x70,0x14,0xe4,0xff,0x80,0x02,0x7f,0x01,0x12,0x89,0x46,
+0x80,0x09,0x7f,0x01,0x80,0x02,0xe4,0xff,0x12,0x68,0x9e,0xe5,0x4a,0x25,0xe0,0x24,
+0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x37,0xf5,0x82,0x74,0x06,0x3e,0xf5,0x83,0x74,
+0xff,0xf0,0x22,0x75,0xf0,0x04,0xef,0xa4,0x2d,0xf5,0x82,0xe4,0x35,0xf0,0xf5,0x83,
+0xe5,0x82,0x24,0xe9,0xf5,0x82,0xe5,0x83,0x34,0x8f,0xf5,0x83,0xe0,0x4b,0xf0,0x75,
+0xf0,0x04,0xef,0xa4,0x2d,0xf5,0x82,0xe4,0x35,0xf0,0xf5,0x83,0xe5,0x82,0x24,0xe9,
+0xf5,0x82,0xe5,0x83,0x34,0x8f,0xf5,0x83,0xe0,0xfe,0xef,0x25,0xe0,0x24,0x22,0xf8,
+0xe6,0xfa,0x08,0xe6,0xfb,0xed,0x2b,0xfd,0xe4,0x3a,0xfc,0x74,0x38,0x2d,0xf5,0x82,
+0x74,0x01,0x3c,0xf5,0x83,0xee,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,
+0x90,0xc9,0xef,0xf0,0xe0,0xff,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,
+0x22,0xf5,0x82,0x74,0x05,0x3c,0xf5,0x83,0x74,0xff,0xf0,0x12,0x9d,0xe8,0xef,0x70,
+0x19,0x90,0x90,0xc9,0xe0,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0xc8,
+0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0xfd,0xf0,0x90,0x90,0xc9,0xe0,0xff,0x12,
+0x79,0xcd,0x90,0x90,0xa0,0x74,0x02,0xf0,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,
+0x01,0xc3,0xc0,0xd0,0xed,0x90,0x8f,0xdd,0x70,0x09,0x74,0x08,0xf0,0xa3,0x74,0x40,
+0xf0,0x80,0x07,0x74,0x08,0xf0,0xa3,0x74,0x44,0xf0,0xcb,0x54,0x7f,0xcb,0x85,0x65,
+0x68,0x85,0x66,0x69,0xeb,0xc4,0x54,0xf0,0xfe,0xe5,0x67,0x54,0x0f,0x4e,0xf5,0x6a,
+0xeb,0xc4,0x54,0x0f,0xf5,0x6b,0x90,0x8f,0xdd,0xe0,0xfc,0xa3,0xe0,0xfd,0x85,0x69,
+0x5f,0x85,0x6a,0x60,0x85,0x6b,0x61,0xab,0x68,0x12,0xab,0xcc,0xd0,0xd0,0x92,0xaf,
+0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x8f,0xbf,0xef,0xf0,0x12,0x34,0x05,
+0xfe,0x90,0x8f,0xbf,0xe0,0xff,0x24,0x68,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xee,
+0xf0,0x90,0x90,0x99,0xe0,0x30,0xe0,0x11,0x74,0x68,0x2f,0xf5,0x82,0xe4,0x34,0x90,
+0xf5,0x83,0xe0,0xfd,0x12,0xb6,0x65,0x80,0x15,0x90,0x8f,0xbf,0xe0,0xff,0x24,0x68,
+0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xfd,0x7b,0x01,0x12,0x8a,0xba,0xd0,0xd0,
+0x92,0xaf,0x22,0x90,0x90,0x89,0x74,0x08,0xf0,0xa3,0x74,0x40,0xf0,0x90,0x90,0x91,
+0x74,0x08,0xf0,0xa3,0x74,0x44,0xf0,0x90,0x90,0x8b,0x74,0x08,0xf0,0xa3,0x74,0x24,
+0xf0,0x90,0x90,0x93,0x74,0x08,0xf0,0xa3,0x74,0x2c,0xf0,0x90,0x90,0x8f,0x74,0x08,
+0xf0,0xa3,0x74,0xb8,0xf0,0x90,0x90,0x97,0x74,0x08,0xf0,0xa3,0x74,0xbc,0xf0,0x90,
+0x90,0x8d,0x74,0x08,0xf0,0xa3,0x74,0xa0,0xf0,0x90,0x90,0x95,0x74,0x08,0xf0,0xa3,
+0x74,0xa4,0xf0,0x22,0x90,0x8f,0xd6,0xef,0xf0,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,
+0x08,0xe6,0x24,0x04,0xf5,0x82,0x74,0x06,0x3e,0xf5,0x83,0xe0,0x54,0xbf,0xf0,0xed,
+0x60,0x11,0x90,0x8f,0xd6,0xe0,0xff,0x24,0x74,0xf8,0xe6,0xb4,0x01,0x05,0xe4,0xfd,
+0x12,0xac,0x36,0x90,0x8f,0xd6,0xe0,0xff,0x24,0x64,0xf5,0x82,0xe4,0x34,0x90,0xf5,
+0x83,0xe0,0x54,0xf0,0xf0,0x74,0x64,0x2f,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,
+0x44,0x0c,0xf0,0x22,0xef,0xc4,0x13,0x13,0x13,0x54,0x01,0xf9,0xef,0xc4,0x13,0x54,
+0x03,0xfe,0xef,0x54,0x1f,0xac,0x05,0x24,0xf8,0x70,0x35,0xaf,0x01,0xad,0x06,0xae,
+0x04,0xab,0x06,0x12,0x96,0x5c,0x90,0x8f,0xcf,0x12,0x88,0xd7,0xe4,0xfb,0x90,0x8f,
+0xcf,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0xeb,0x75,0xf0,0x08,
+0xa4,0xf9,0xf8,0x12,0x88,0xb1,0x90,0xfe,0x28,0xef,0xf0,0x0b,0xeb,0xb4,0x04,0xde,
+0x22,0x8f,0x39,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x58,0xf5,
+0x82,0x74,0x05,0x3e,0xf5,0x83,0xe0,0xff,0x90,0x90,0xa5,0xe0,0x2f,0x24,0xfe,0x90,
+0x90,0xac,0xf0,0xe4,0x90,0x90,0xaa,0xf0,0xa3,0xf0,0xfb,0x7d,0x50,0x7c,0x01,0xaf,
+0x39,0x12,0xbc,0xb7,0xe5,0x39,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,
+0x53,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x05,0xf0,0x22,0x8f,0x3a,0xed,0x14,
+0x60,0x25,0x14,0x60,0x2c,0x24,0x02,0x70,0x3c,0x90,0x90,0x76,0x74,0x02,0xf0,0x90,
+0x00,0x48,0xe0,0x44,0x0c,0xfd,0x7f,0x48,0x12,0xba,0xeb,0x90,0x00,0x47,0xe0,0x44,
+0x08,0xfd,0x7f,0x47,0x02,0xba,0xeb,0xe4,0x90,0x90,0x76,0xf0,0x90,0x90,0x7c,0x80,
+0x09,0x90,0x90,0x76,0x74,0x01,0xf0,0x90,0x90,0x78,0xe0,0xfb,0x7d,0x83,0x7c,0x08,
+0xe4,0xff,0x12,0xbb,0x8e,0x22,0x8f,0x58,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,
+0x08,0xe6,0x24,0x04,0xf5,0x82,0x74,0x06,0x3e,0xf5,0x83,0xe0,0x44,0x40,0xf0,0x74,
+0x74,0x25,0x58,0xf8,0xe6,0xb4,0x01,0x07,0x7d,0x01,0xaf,0x58,0x12,0xac,0x36,0x74,
+0x64,0x25,0x58,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0x64,
+0x25,0x58,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0x44,0x04,0xf0,0x22,0x8f,0x59,
+0x7b,0x02,0x7d,0x03,0x12,0xb7,0x16,0x74,0x76,0x25,0x59,0xf8,0xe6,0x14,0x24,0xfd,
+0x50,0x02,0x80,0x30,0x74,0x6a,0x25,0x59,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,
+0x60,0x06,0x7b,0x01,0x7d,0x0c,0x80,0x17,0x74,0x64,0x25,0x59,0xf5,0x82,0xe4,0x34,
+0x90,0xf5,0x83,0xe0,0x54,0x0f,0xc3,0x94,0x04,0x50,0x09,0x7b,0x01,0x7d,0x04,0xaf,
+0x59,0x12,0x8a,0xba,0x22,0x90,0x90,0xcb,0xe0,0xff,0x7d,0x01,0xd3,0x10,0xaf,0x01,
+0xc3,0xc0,0xd0,0x90,0x90,0xc0,0xed,0xf0,0x90,0x90,0xbf,0xef,0xf0,0x12,0x7d,0xd0,
+0x90,0x90,0xc0,0xe0,0x60,0x18,0x90,0x90,0xbf,0xe0,0x25,0xe0,0x24,0x22,0xf8,0xe6,
+0xfe,0x08,0xe6,0x24,0x22,0xf5,0x82,0x74,0x05,0x3e,0xf5,0x83,0xe4,0xf0,0xe4,0x90,
+0x90,0x9a,0xf0,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,
+0x00,0x01,0x12,0x87,0xd5,0xfe,0x74,0x6a,0x2f,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,
+0xee,0xf0,0x90,0x00,0x03,0x12,0x87,0xd5,0xfe,0x74,0x4c,0x2f,0xf5,0x82,0xe4,0x34,
+0x90,0xf5,0x83,0xee,0xf0,0x12,0x34,0x05,0xfe,0x74,0x76,0x2f,0xf8,0xe6,0x6e,0x60,
+0x03,0x12,0xa7,0x81,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,
+0x90,0x90,0xc6,0xef,0xf0,0x12,0x7d,0xd0,0x90,0x90,0xa4,0xe0,0x64,0x01,0x60,0x1f,
+0x90,0x01,0x36,0xe0,0x20,0xe0,0x18,0x90,0x90,0xc6,0xe0,0x25,0xe0,0x24,0x22,0xf8,
+0xe6,0xfe,0x08,0xe6,0x24,0x22,0xf5,0x82,0x74,0x05,0x3e,0xf5,0x83,0xe4,0xf0,0x90,
+0x90,0xa0,0x74,0x01,0xf0,0xd0,0xd0,0x92,0xaf,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,
+0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,
+0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0xe4,0xff,0x12,0x61,0x21,0x53,0x91,0xdf,0xd0,
+0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,
+0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,
+0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,
+0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x7f,0x01,0x12,0x45,0x09,0x53,0x91,0xbf,0xd0,
+0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,
+0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,
+0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,
+0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x7f,0x01,0x12,0x61,0x21,0x53,0x91,0x7f,0xd0,
+0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,
+0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x8f,0x39,0x12,0xad,0x6f,0xef,
+0x64,0x01,0x70,0x34,0xe5,0x39,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,
+0x09,0xf5,0x82,0x74,0x02,0x3e,0xf5,0x83,0xe0,0xfd,0x7b,0x01,0xaf,0x39,0x12,0xa8,
+0x85,0xe5,0x39,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x1f,0xf5,0x82,
+0x74,0x04,0x3e,0xf5,0x83,0x74,0x20,0xf0,0x22,0x74,0x64,0x2f,0xf5,0x82,0xe4,0x34,
+0x90,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0x64,0x2f,0xf5,0x82,0xe4,0x34,0x90,0xf5,
+0x83,0xe0,0x44,0x01,0xf0,0x12,0xbd,0x15,0x12,0xbd,0x21,0x74,0x64,0x2f,0xf5,0x82,
+0xe4,0x34,0x90,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0x64,0x2f,0xf5,0x82,0xe4,0x34,
+0x90,0xf5,0x83,0xe0,0x44,0x02,0xf0,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,
+0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,
+0x05,0xc0,0x06,0xc0,0x07,0xe4,0xff,0x12,0x45,0x09,0xd0,0x07,0xd0,0x06,0xd0,0x05,
+0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,
+0xd0,0xf0,0xd0,0xe0,0x32,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x90,0xcd,0xef,
+0xf0,0xe4,0xff,0x12,0xaa,0x72,0xef,0x60,0x22,0x90,0x90,0x99,0xe0,0xc4,0x13,0x13,
+0x54,0x03,0x20,0xe0,0x16,0x90,0x90,0xcd,0xe0,0xff,0x7b,0x01,0x12,0x8a,0xba,0x90,
+0x90,0xcd,0xe0,0xff,0x12,0x44,0xab,0x7f,0x01,0x80,0x02,0x7f,0x00,0xd0,0xd0,0x92,
+0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x8f,0x26,0x90,0x90,0x99,0xe0,0x30,
+0xe0,0x11,0x74,0x68,0x2f,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xfd,0x12,0xb6,
+0x65,0x80,0x14,0x74,0x68,0x25,0x26,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe0,0xfd,
+0x7b,0x01,0xaf,0x26,0x12,0x8a,0xba,0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x58,0x12,0xad,
+0x6f,0xef,0x64,0x01,0x70,0x2f,0xe5,0x58,0x25,0xe0,0x25,0xe0,0x24,0x15,0xf5,0x82,
+0xe4,0x34,0x90,0xf5,0x83,0xe0,0xfd,0xe4,0xfb,0xaf,0x58,0x12,0xa8,0x85,0xe5,0x58,
+0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x1f,0xf5,0x82,0x74,0x04,0x3e,
+0xf5,0x83,0x74,0x20,0xf0,0x22,0xef,0x25,0xe0,0x25,0xe0,0x2d,0x24,0x08,0xf8,0xe6,
+0xfe,0xeb,0xf4,0x5e,0xf6,0xef,0x25,0xe0,0x25,0xe0,0x2d,0x24,0x08,0xf8,0xe6,0xfe,
+0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfa,0x08,0xe6,0xfb,0xed,0x2b,0xfd,0xe4,0x3a,
+0xfc,0x74,0x30,0x2d,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xee,0xf0,0x22,0x90,0x8f,
+0xbf,0xeb,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,0xf0,0x90,0x00,0x04,0x12,0x87,0xd5,0xfe,
+0x54,0x1f,0xfd,0xee,0x54,0x20,0xc4,0x13,0x54,0x07,0xfe,0xfb,0x90,0x8f,0xbf,0xe0,
+0xf9,0xa3,0xe0,0xfa,0xa3,0xe0,0x90,0x8f,0xc5,0xc9,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,
+0xf0,0x02,0x86,0x3d,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x90,0xc4,0xef,0xf0,
+0xe0,0xff,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x3e,0xf5,0x82,0x74,
+0x01,0x3c,0xf5,0x83,0x74,0x03,0xf0,0xfb,0x7d,0x02,0x12,0xb0,0xc3,0x90,0x90,0xc4,
+0xe0,0xff,0x12,0xb9,0xfd,0xd0,0xd0,0x92,0xaf,0x22,0xef,0x25,0xe0,0x25,0xe0,0x2d,
+0x24,0x08,0xf8,0xe6,0x4b,0xf6,0xef,0x25,0xe0,0x25,0xe0,0x2d,0x24,0x08,0xf8,0xe6,
+0xfe,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfa,0x08,0xe6,0xfb,0xed,0x2b,0xfd,0xe4,
+0x3a,0xfc,0x74,0x30,0x2d,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xee,0xf0,0x22,0x8f,
+0x4a,0x90,0x00,0x02,0x12,0x87,0xd5,0x90,0x90,0x7b,0xf0,0xe0,0x60,0x04,0xe0,0xf4,
+0x70,0x21,0xa2,0xaf,0xe4,0x33,0xf5,0x4b,0xc2,0xaf,0x90,0x00,0x47,0xe0,0x54,0xfb,
+0xfd,0x7f,0x47,0x12,0xba,0xeb,0x7d,0x40,0x7f,0x01,0x12,0xba,0x25,0xe5,0x4b,0x24,
+0xff,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x90,0xc5,0xef,0xf0,
+0x7b,0x03,0x7d,0x02,0x12,0xaf,0xb9,0x90,0x90,0xc5,0xe0,0x25,0xe0,0x24,0x22,0xf8,
+0xe6,0xfe,0x08,0xe6,0x24,0x27,0xf5,0x82,0x74,0x05,0x3e,0xf5,0x83,0xe4,0xf0,0x90,
+0x90,0xa0,0xf0,0xd0,0xd0,0x92,0xaf,0x22,0x7f,0x0b,0x12,0xa0,0xc1,0x90,0x90,0xb6,
+0xe0,0xfe,0x6f,0x60,0x24,0xee,0xb4,0x01,0x04,0xe4,0xf0,0x80,0x06,0x90,0x90,0xb6,
+0x74,0x01,0xf0,0x90,0x90,0x03,0xe0,0x13,0x13,0x13,0x54,0x03,0x30,0xe0,0x07,0xa3,
+0xe0,0x60,0x03,0x7f,0x00,0x22,0x7f,0x01,0x22,0x7f,0x00,0x22,0xd3,0x10,0xaf,0x01,
+0xc3,0xc0,0xd0,0x90,0x90,0xcc,0xef,0xf0,0x90,0x90,0x9a,0xe0,0xb4,0x01,0x09,0x90,
+0x90,0xcc,0xe0,0xff,0x7d,0x02,0x80,0x0d,0x90,0x90,0x9a,0xe0,0x70,0x0a,0x90,0x90,
+0xcc,0xe0,0xff,0x7d,0x03,0x12,0x93,0x30,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x00,0x2c,
+0xe0,0x54,0x03,0x90,0x8f,0xc3,0xf0,0xe0,0x14,0x60,0x10,0x24,0xfe,0x60,0x16,0x24,
+0x03,0x70,0x19,0x90,0x90,0x03,0xe0,0x54,0xe7,0xf0,0x22,0x90,0x90,0x03,0xe0,0x54,
+0xe7,0x44,0x08,0xf0,0x22,0x90,0x90,0x03,0xe0,0x44,0x18,0xf0,0x22,0x90,0x8f,0xbf,
+0xef,0xf0,0xa3,0xeb,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,0xf0,0x12,0xb8,0xbd,0x90,0x8f,
+0xc0,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x12,0x34,0x05,0xff,0x90,0x8f,0xbf,
+0xe0,0x24,0x97,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xef,0xf0,0x22,0xe4,0x90,0x90,
+0xa5,0xf0,0x90,0x90,0x9f,0xe0,0x54,0xfe,0xf0,0x54,0xfb,0xf0,0xe4,0xa3,0xf0,0xa3,
+0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x90,0x99,0xe0,0x54,0xfe,0xf0,0x54,0xfb,
+0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x22,0xd3,0x10,0xaf,
+0x01,0xc3,0xc0,0xd0,0x90,0x90,0xc8,0xef,0xf0,0x12,0x7d,0xd0,0x90,0x90,0xc8,0xe0,
+0xff,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x22,0xf5,0x82,0x74,0x05,
+0x3c,0xf5,0x83,0xe4,0xf0,0x12,0xb8,0x24,0xd0,0xd0,0x92,0xaf,0x22,0xf0,0xfb,0xad,
+0x4b,0xaf,0x4a,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xef,0x25,0xe0,0x24,0x22,0xf8,
+0xe6,0xfe,0x08,0xe6,0x2d,0xff,0xe4,0x3e,0xfe,0x74,0x84,0x2f,0xf5,0x82,0x74,0x04,
+0x3e,0xf5,0x83,0xeb,0xf0,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,
+0xd0,0x90,0x90,0xce,0xef,0xf0,0x90,0x90,0x9e,0xe0,0xb4,0x01,0x12,0xe4,0xf0,0x90,
+0x90,0xce,0xe0,0xff,0x12,0xb3,0xde,0x90,0x90,0xce,0xe0,0xff,0x12,0x44,0xab,0xd0,
+0xd0,0x92,0xaf,0x22,0x8f,0x39,0x90,0x90,0x99,0xe0,0xc4,0x13,0x13,0x54,0x03,0x30,
+0xe0,0x0d,0xa3,0xe0,0x64,0x04,0x60,0x07,0x7d,0x04,0xaf,0x39,0x12,0x93,0x30,0x90,
+0x90,0x9a,0xe0,0x64,0x04,0x60,0x05,0xaf,0x39,0x12,0xb9,0xaa,0x22,0xd3,0x10,0xaf,
+0x01,0xc3,0xc0,0xd0,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x22,
+0xf5,0x82,0x74,0x05,0x3e,0xf5,0x83,0x74,0x0f,0xf0,0x90,0x90,0xa0,0x74,0x03,0xf0,
+0xd0,0xd0,0x92,0xaf,0x22,0xae,0x07,0x74,0xf9,0x2e,0xf5,0x82,0xe4,0x34,0x8f,0xf5,
+0x83,0xe0,0xff,0xed,0xf4,0xfd,0xef,0x5d,0xf0,0xee,0x24,0x50,0xff,0x74,0xf9,0x2e,
+0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0xfd,0x02,0xba,0xeb,0xad,0x07,0x90,0x90,
+0xbd,0xe0,0x54,0xf0,0x44,0x03,0xf0,0x54,0x0f,0x44,0x80,0xf0,0x90,0x8f,0x9e,0xe4,
+0xf0,0xa3,0x74,0x00,0xf0,0xa3,0x74,0x1a,0xf0,0x7b,0x01,0x7a,0x90,0x79,0xbd,0x02,
+0x90,0xef,0x90,0x90,0xcb,0xe0,0xff,0x7d,0x01,0xed,0x60,0x15,0xef,0x25,0xe0,0x24,
+0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x22,0xf5,0x82,0x74,0x05,0x3e,0xf5,0x83,0xe4,
+0xf0,0x90,0x90,0x9a,0x74,0x01,0xf0,0x22,0x74,0x6c,0x2f,0xf5,0x82,0xe4,0x34,0x90,
+0xf5,0x83,0xe4,0xf0,0x74,0x50,0x2f,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe4,0xf0,
+0x74,0x6e,0x2f,0xf5,0x82,0xe4,0x34,0x90,0xf5,0x83,0xe4,0xf0,0x22,0xd3,0x10,0xaf,
+0x01,0xc3,0xc0,0xd0,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x2d,0xff,
+0xee,0x3c,0x8f,0x82,0xf5,0x83,0xe0,0x90,0x8f,0xd9,0xf0,0xe0,0xff,0xd0,0xd0,0x92,
+0xaf,0x22,0x90,0x00,0x18,0xe0,0x54,0xfe,0xfd,0x7f,0x18,0xd3,0x10,0xaf,0x01,0xc3,
+0xc0,0xd0,0x8f,0x82,0x75,0x83,0x00,0xed,0xf0,0x7f,0x10,0x7e,0x00,0x12,0xbc,0xc7,
+0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xad,0x07,0xac,0x06,
+0xed,0x1d,0xae,0x04,0x70,0x01,0x1c,0x4e,0x60,0x09,0x7f,0xe8,0x7e,0x03,0x12,0xbc,
+0xc7,0x80,0xed,0xd0,0xd0,0x92,0xaf,0x22,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfc,
+0x08,0xe6,0x24,0x3e,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0x74,0x03,0xf0,0xfb,0x7d,
+0x02,0x12,0xb0,0xc3,0x90,0x90,0xa0,0x74,0x01,0xf0,0x22,0xae,0x07,0x74,0xf9,0x2e,
+0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0x4d,0xf0,0xee,0x24,0x50,0xff,0x74,0xf9,
+0x2e,0xf5,0x82,0xe4,0x34,0x8f,0xf5,0x83,0xe0,0xfd,0x02,0xba,0xeb,0x90,0x90,0xb6,
+0xe0,0xfe,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfa,0x08,0xe6,0x24,0xca,0xf5,0x82,
+0x74,0x01,0x3a,0xf5,0x83,0xee,0xf0,0xed,0x60,0x03,0x12,0xbb,0xce,0x22,0xd3,0x10,
+0xaf,0x01,0xc3,0xc0,0xd0,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x2d,
+0xff,0xee,0x3c,0x8f,0x82,0xf5,0x83,0xeb,0xf0,0xd0,0xd0,0x92,0xaf,0x22,0xef,0x25,
+0xe0,0x24,0x22,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x22,0xf5,0x82,0x74,0x05,0x3c,0xf5,
+0x83,0x74,0xff,0xf0,0x12,0x79,0xcd,0x90,0x90,0x9a,0x74,0x03,0xf0,0x22,0x90,0x00,
+0x49,0xe0,0x90,0x90,0xcf,0xf0,0xe0,0x54,0x0f,0xf0,0x44,0xf0,0xfd,0x7f,0x49,0x12,
+0xba,0xeb,0x90,0x90,0xcf,0xe0,0x44,0xb0,0xfd,0x7f,0x49,0x02,0xba,0xeb,0xef,0x25,
+0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x1b,0xf5,0x82,0x74,0x04,0x3e,0xf5,
+0x83,0xe0,0x54,0x7f,0x64,0x7f,0x7f,0x01,0x60,0x02,0x7f,0x00,0x22,0xed,0x60,0x15,
+0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x22,0xf5,0x82,0x74,0x05,
+0x3e,0xf5,0x83,0xe4,0xf0,0x90,0x90,0xa0,0x74,0x01,0xf0,0x22,0xef,0x25,0xe0,0x24,
+0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x22,0xf5,0x82,0x74,0x05,0x3e,0xf5,0x83,0x74,
+0x0f,0xf0,0x90,0x90,0x9a,0x74,0x04,0xf0,0x22,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,
+0xfe,0x08,0xe6,0x2d,0xff,0xe4,0x3e,0xfe,0x74,0x84,0x2f,0xf5,0x82,0x74,0x04,0x3e,
+0xf5,0x83,0xe0,0xff,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x90,0xc7,0xef,
+0xf0,0x12,0x7d,0xd0,0x90,0x90,0xc7,0xe0,0xff,0x12,0xb9,0xfd,0xd0,0xd0,0x92,0xaf,
+0x22,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,0xfe,0x08,0xe6,0x2d,0xff,0xee,0x3c,0x8f,
+0x82,0xf5,0x83,0xa3,0xa3,0xa3,0xe4,0xf0,0x22,0xef,0x25,0xe0,0x24,0x22,0xf8,0xe6,
+0xfc,0x08,0xe6,0x24,0x22,0xf5,0x82,0x74,0x05,0x3c,0xf5,0x83,0xe4,0xf0,0x02,0xb8,
+0x24,0xe4,0xfb,0x7c,0x01,0xaf,0x2e,0x90,0x90,0xab,0xe0,0xf5,0x3f,0xa3,0xe0,0xf5,
+0x40,0xe4,0xf5,0x41,0x02,0xa9,0x80,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xef,0x1f,
+0x70,0x01,0x1e,0x14,0x4e,0x70,0xf7,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x90,0xcb,0xe0,
+0xff,0x7d,0x01,0x12,0xaa,0xe8,0x90,0x90,0x9a,0x74,0x01,0xf0,0x22,0x90,0x90,0xcb,
+0xe0,0xff,0x12,0xb3,0x96,0x90,0x90,0x9a,0x74,0x01,0xf0,0x22,0x90,0x8f,0xbf,0xef,
+0xf0,0x12,0x34,0x05,0x90,0x90,0xa5,0xf0,0x22,0x90,0x8f,0xd3,0xef,0xf0,0xa3,0xec,
+0xf0,0xa3,0xed,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xd0,0xd0,0x92,0xaf,
+0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xd0,0xd0,0x92,0xaf,0x22,0xe4,0x90,0x90,
+0xb3,0xf0,0x7d,0x60,0x7c,0x01,0x02,0xbc,0x81,0x12,0x34,0x05,0xfe,0x74,0x74,0x2f,
+0xf8,0xa6,0x06,0x22,0x7d,0x01,0x12,0xb2,0x64,0xe4,0x90,0x90,0x9a,0xf0,0x22,0x12,
+0xa2,0x17,0x90,0x90,0x9a,0x74,0x02,0xf0,0x22,0x90,0x90,0x03,0xe0,0x54,0xfb,0xf0,
+0x22,0xe4,0x90,0x90,0xb6,0xf0,0x22,0x8f,0x4a,0x22,0x22,0x00,0x01,0x9f,};
+
+const u8 Rtl8192DUFwMainArray[Rtl8192DUMainArrayLength] = {
+0x0, };
+
+const u8 Rtl8192DUFwDataArray[Rtl8192DUDataArrayLength] = {
+0x0, };
+
+const u32 Rtl8192DUPHY_REG_2TArray[Rtl8192DUPHY_REG_2TArrayLength] = {
+0x800,0x80040002,
+0x804,0x00000003,
+0x808,0x0000fc00,
+0x80c,0x0000000a,
+0x810,0x10001331,
+0x814,0x020c3d10,
+0x818,0x02200385,
+0x81c,0x00000000,
+0x820,0x01000100,
+0x824,0x00390004,
+0x828,0x01000100,
+0x82c,0x00390004,
+0x830,0x27272727,
+0x834,0x27272727,
+0x838,0x27272727,
+0x83c,0x27272727,
+0x840,0x00010000,
+0x844,0x00010000,
+0x848,0x27272727,
+0x84c,0x27272727,
+0x850,0x00000000,
+0x854,0x00000000,
+0x858,0x569a569a,
+0x85c,0x0c1b25a4,
+0x860,0x66e60250,
+0x864,0x061f0150,
+0x868,0x27272727,
+0x86c,0x272b2b2b,
+0x870,0x07000700,
+0x874,0x22188000,
+0x878,0x08080808,
+0x87c,0x0001fff8,
+0x880,0xc0083070,
+0x884,0x00000cd5,
+0x888,0x00000000,
+0x88c,0xcc0000c0,
+0x890,0x00000800,
+0x894,0xfffffffe,
+0x898,0x40302010,
+0x89c,0x00706050,
+0x900,0x00000000,
+0x904,0x00000023,
+0x908,0x00000000,
+0x90c,0x81121313,
+0xa00,0x00d047c8,
+0xa04,0x80ff000c,
+0xa08,0x8c8a8300,
+0xa0c,0x2e68120f,
+0xa10,0x9500bb78,
+0xa14,0x11144028,
+0xa18,0x00881117,
+0xa1c,0x89140f00,
+0xa20,0x1a1b0000,
+0xa24,0x090e1317,
+0xa28,0x00000204,
+0xa2c,0x00d30000,
+0xa70,0x101fbf00,
+0xa74,0x00000007,
+0xc00,0x40071d40,
+0xc04,0x03a05633,
+0xc08,0x001000e4,
+0xc0c,0x6c6c6c6c,
+0xc10,0x08800000,
+0xc14,0x40000100,
+0xc18,0x08800000,
+0xc1c,0x40000100,
+0xc20,0x00000000,
+0xc24,0x00000000,
+0xc28,0x00000000,
+0xc2c,0x00000000,
+0xc30,0x69e9ac44,
+0xc34,0x469652cf,
+0xc38,0x49795994,
+0xc3c,0x0a979718,
+0xc40,0x1f7c403f,
+0xc44,0x000100b7,
+0xc48,0xec020107,
+0xc4c,0x007f037f,
+0xc50,0x69543420,
+0xc54,0x43bc009e,
+0xc58,0x69543420,
+0xc5c,0x433c00a8,
+0xc60,0x00000000,
+0xc64,0x7116848b,
+0xc68,0x47c00bff,
+0xc6c,0x00000036,
+0xc70,0x2c7f000d,
+0xc74,0x258610db,
+0xc78,0x0000001f,
+0xc7c,0x40b95612,
+0xc80,0x40000100,
+0xc84,0x20f60000,
+0xc88,0x40000100,
+0xc8c,0xa0e40000,
+0xc90,0x00121820,
+0xc94,0x00000007,
+0xc98,0x00121820,
+0xc9c,0x00007f7f,
+0xca0,0x00000000,
+0xca4,0x00000080,
+0xca8,0x00000000,
+0xcac,0x00000000,
+0xcb0,0x00000000,
+0xcb4,0x00000000,
+0xcb8,0x00000000,
+0xcbc,0x28000000,
+0xcc0,0x00000000,
+0xcc4,0x00000000,
+0xcc8,0x00000000,
+0xccc,0x00000000,
+0xcd0,0x00000000,
+0xcd4,0x00000000,
+0xcd8,0x64b11e20,
+0xcdc,0xe0767533,
+0xce0,0x00222222,
+0xce4,0x00000000,
+0xce8,0x37644302,
+0xcec,0x2f97d40c,
+0xd00,0x00080740,
+0xd04,0x00020403,
+0xd08,0x0000907f,
+0xd0c,0x20010201,
+0xd10,0xa0633333,
+0xd14,0x3333bc43,
+0xd18,0x7a8f5b6b,
+0xd2c,0xcc979975,
+0xd30,0x00000000,
+0xd34,0x80608404,
+0xd38,0x00000000,
+0xd3c,0x00027293,
+0xd40,0x00000000,
+0xd44,0x00000000,
+0xd48,0x00000000,
+0xd4c,0x00000000,
+0xd50,0x6437140a,
+0xd54,0x00000000,
+0xd58,0x00000000,
+0xd5c,0x30032064,
+0xd60,0x4653de68,
+0xd64,0x04518a3c,
+0xd68,0x00002101,
+0xd6c,0x2a201c16,
+0xd70,0x1812362e,
+0xd74,0x322c2220,
+0xd78,0x000e3c24,
+0xe00,0x2a2a2a2a,
+0xe04,0x2a2a2a2a,
+0xe08,0x03902a2a,
+0xe10,0x2a2a2a2a,
+0xe14,0x2a2a2a2a,
+0xe18,0x2a2a2a2a,
+0xe1c,0x2a2a2a2a,
+0xe28,0x00000000,
+0xe30,0x1000dc1f,
+0xe34,0x10008c1f,
+0xe38,0x02140102,
+0xe3c,0x681604c2,
+0xe40,0x01007c00,
+0xe44,0x01004800,
+0xe48,0xfb000000,
+0xe4c,0x000028d1,
+0xe50,0x1000dc1f,
+0xe54,0x10008c1f,
+0xe58,0x02140102,
+0xe5c,0x28160d05,
+0xe60,0x00000010,
+0xe68,0x001b25a4,
+0xe6c,0x63db25a4,
+0xe70,0x63db25a4,
+0xe74,0x0c126da4,
+0xe78,0x0c126da4,
+0xe7c,0x0c126da4,
+0xe80,0x0c126da4,
+0xe84,0x63db25a4,
+0xe88,0x0c126da4,
+0xe8c,0x63db25a4,
+0xed0,0x63db25a4,
+0xed4,0x63db25a4,
+0xed8,0x63db25a4,
+0xedc,0x001b25a4,
+0xee0,0x001b25a4,
+0xeec,0x6fdb25a4,
+0xf14,0x00000003,
+0xf1c,0x00000064,
+0xf4c,0x00000004,
+0xf00,0x00000300,
+};
+
+const u32 Rtl8192DUPHY_REG_1TArray[Rtl8192DUPHY_REG_1TArrayLength] = {
+0x0, };
+
+const u32 Rtl8192DUPHY_REG_Array_PG[Rtl8192DUPHY_REG_Array_PGLength] = {
+0xe00,0xffffffff,0x07090c0c,
+0xe04,0xffffffff,0x01020405,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x0b0c0c0e,
+0xe14,0xffffffff,0x01030506,
+0xe18,0xffffffff,0x0b0c0d0e,
+0xe1c,0xffffffff,0x01030509,
+0x830,0xffffffff,0x07090c0c,
+0x834,0xffffffff,0x01020405,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x0b0c0c0e,
+0x848,0xffffffff,0x01030506,
+0x84c,0xffffffff,0x0b0c0d0e,
+0x868,0xffffffff,0x01030509,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x04040404,
+0xe04,0xffffffff,0x00020204,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x06060606,
+0xe14,0xffffffff,0x00020406,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x04040404,
+0x834,0xffffffff,0x00020204,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x06060606,
+0x848,0xffffffff,0x00020406,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x04040404,
+0xe04,0xffffffff,0x00020204,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x04040404,
+0x834,0xffffffff,0x00020204,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x00000000,
+0xe04,0xffffffff,0x00000000,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x00000000,
+0xe14,0xffffffff,0x00000000,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x00000000,
+0x834,0xffffffff,0x00000000,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x00000000,
+0x848,0xffffffff,0x00000000,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x04040404,
+0xe04,0xffffffff,0x00020204,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x08080808,
+0xe14,0xffffffff,0x00040408,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x04040404,
+0x834,0xffffffff,0x00020204,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x08080808,
+0x848,0xffffffff,0x00040408,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x04040404,
+0xe04,0xffffffff,0x00020204,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x08080808,
+0xe14,0xffffffff,0x00040408,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x04040404,
+0x834,0xffffffff,0x00020204,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x08080808,
+0x848,0xffffffff,0x00040408,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x04040404,
+0xe04,0xffffffff,0x00020204,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x08080808,
+0xe14,0xffffffff,0x00040408,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x04040404,
+0x834,0xffffffff,0x00020204,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x08080808,
+0x848,0xffffffff,0x00040408,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x04040404,
+0xe04,0xffffffff,0x00020204,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x08080808,
+0xe14,0xffffffff,0x00040408,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x04040404,
+0x834,0xffffffff,0x00020204,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x08080808,
+0x848,0xffffffff,0x00040408,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x04040404,
+0xe04,0xffffffff,0x00020204,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x08080808,
+0xe14,0xffffffff,0x00040408,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x04040404,
+0x834,0xffffffff,0x00020204,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x08080808,
+0x848,0xffffffff,0x00040408,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+0xe00,0xffffffff,0x04040404,
+0xe04,0xffffffff,0x00020204,
+0xe08,0x0000ff00,0x00000000,
+0x86c,0xffffff00,0x00000000,
+0xe10,0xffffffff,0x08080808,
+0xe14,0xffffffff,0x00040408,
+0xe18,0xffffffff,0x00000000,
+0xe1c,0xffffffff,0x00000000,
+0x830,0xffffffff,0x04040404,
+0x834,0xffffffff,0x00020204,
+0x838,0xffffff00,0x00000000,
+0x86c,0x000000ff,0x00000000,
+0x83c,0xffffffff,0x08080808,
+0x848,0xffffffff,0x00040408,
+0x84c,0xffffffff,0x00000000,
+0x868,0xffffffff,0x00000000,
+};
+
+const u32 Rtl8192DUPHY_REG_Array_MP[Rtl8192DUPHY_REG_Array_MPLength] = {
+0xc64,0x5116848b,
+0xc30,0x69e9ac4a,
+0xd04,0x80020403,
+0xd14,0x3333bc53,
+0x840,0x03cff456,
+0x844,0x03cff456,
+};
+
+const u32 Rtl8192DURadioA_2TArray[Rtl8192DURadioA_2TArrayLength] = {
+0x000,0x00030000,
+0x001,0x00030000,
+0x002,0x00000000,
+0x003,0x00018c63,
+0x004,0x00018c63,
+0x008,0x00084000,
+0x00b,0x0001c000,
+0x00e,0x00018c67,
+0x00f,0x00000851,
+0x014,0x00021440,
+0x018,0x00017524,
+0x019,0x00000000,
+0x01d,0x000a1290,
+0x023,0x00001558,
+0x01a,0x00030a99,
+0x01b,0x00040b00,
+0x01c,0x000fc339,
+0x03a,0x000a57eb,
+0x03b,0x00020000,
+0x03c,0x000ff454,
+0x020,0x0000aa52,
+0x021,0x00054000,
+0x040,0x0000aa52,
+0x041,0x00014000,
+0x025,0x000803be,
+0x026,0x000fc638,
+0x027,0x00077c18,
+0x028,0x000de471,
+0x029,0x000d7110,
+0x02a,0x0008cb04,
+0x02b,0x0004128b,
+0x02c,0x00001840,
+0x043,0x0002444f,
+0x044,0x0001adb0,
+0x045,0x00056467,
+0x046,0x0008992c,
+0x047,0x0000452c,
+0x048,0x000f9c43,
+0x049,0x00002e0c,
+0x04a,0x000546eb,
+0x04b,0x0008966c,
+0x04c,0x0000dde9,
+0x018,0x00007401,
+0x000,0x00070000,
+0x012,0x000dc000,
+0x012,0x00090000,
+0x012,0x00051000,
+0x012,0x00012000,
+0x013,0x000287b7,
+0x013,0x000247ab,
+0x013,0x0002079f,
+0x013,0x0001c793,
+0x013,0x0001839b,
+0x013,0x00014392,
+0x013,0x0001019a,
+0x013,0x0000c191,
+0x013,0x00008194,
+0x013,0x000040a0,
+0x013,0x00000018,
+0x015,0x0000f424,
+0x015,0x0004f424,
+0x015,0x0008f424,
+0x016,0x000e1330,
+0x016,0x000a1330,
+0x016,0x00061330,
+0x016,0x00021330,
+0x018,0x00017524,
+0x000,0x00070000,
+0x012,0x000cf000,
+0x012,0x000bc000,
+0x012,0x00078000,
+0x012,0x00000000,
+0x013,0x000287bc,
+0x013,0x000247b0,
+0x013,0x000203b4,
+0x013,0x0001c3a8,
+0x013,0x000181b4,
+0x013,0x000141a8,
+0x013,0x000100b4,
+0x013,0x0000c0a8,
+0x013,0x0000b030,
+0x013,0x00004024,
+0x013,0x00000018,
+0x015,0x0000f4c3,
+0x015,0x0004f4c3,
+0x015,0x0008f4c3,
+0x016,0x000e085f,
+0x016,0x000a085f,
+0x016,0x0006085f,
+0x016,0x0002085f,
+0x018,0x00037524,
+0x000,0x00070000,
+0x012,0x000cf000,
+0x012,0x000bc000,
+0x012,0x00078000,
+0x012,0x00000000,
+0x013,0x000287bc,
+0x013,0x000247b0,
+0x013,0x000203b4,
+0x013,0x0001c3a8,
+0x013,0x000181b4,
+0x013,0x000141a8,
+0x013,0x000100b4,
+0x013,0x0000c0a8,
+0x013,0x0000b030,
+0x013,0x00004024,
+0x013,0x00000018,
+0x015,0x0000f4c3,
+0x015,0x0004f4c3,
+0x015,0x0008f4c3,
+0x016,0x000e085f,
+0x016,0x000a085f,
+0x016,0x0006085f,
+0x016,0x0002085f,
+0x018,0x00057568,
+0x000,0x00070000,
+0x012,0x000cf000,
+0x012,0x000bc000,
+0x012,0x00078000,
+0x012,0x00000000,
+0x013,0x000287bc,
+0x013,0x000247b0,
+0x013,0x000203b4,
+0x013,0x0001c3a8,
+0x013,0x000181b4,
+0x013,0x000141a8,
+0x013,0x000100b4,
+0x013,0x0000c0a8,
+0x013,0x0000b030,
+0x013,0x00004024,
+0x013,0x00000018,
+0x015,0x0000f4c3,
+0x015,0x0004f4c3,
+0x015,0x0008f4c3,
+0x016,0x000e085f,
+0x016,0x000a085f,
+0x016,0x0006085f,
+0x016,0x0002085f,
+0x030,0x0004470f,
+0x031,0x00044ff0,
+0x032,0x00000070,
+0x033,0x000dd480,
+0x034,0x000ffac0,
+0x035,0x000b80c0,
+0x036,0x00077000,
+0x037,0x00064ff2,
+0x038,0x000e7661,
+0x039,0x00000e90,
+0x000,0x00030000,
+0x018,0x0000f401,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x01e,0x00088009,
+0x01f,0x00080003,
+0x0fe,0x00000000,
+0x01e,0x00088001,
+0x01f,0x00080000,
+0x0fe,0x00000000,
+0x018,0x00097524,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x02b,0x00041289,
+0x0fe,0x00000000,
+0x02d,0x0006aaaa,
+0x02e,0x000b4d01,
+0x02d,0x00080000,
+0x02e,0x00004d02,
+0x02d,0x00095555,
+0x02e,0x00054d03,
+0x02d,0x000aaaaa,
+0x02e,0x000b4d04,
+0x02d,0x000c0000,
+0x02e,0x00004d05,
+0x02d,0x000d5555,
+0x02e,0x00054d06,
+0x02d,0x000eaaaa,
+0x02e,0x000b4d07,
+0x02d,0x00000000,
+0x02e,0x00005108,
+0x02d,0x00015555,
+0x02e,0x00055109,
+0x02d,0x0002aaaa,
+0x02e,0x000b510a,
+0x02d,0x00040000,
+0x02e,0x0000510b,
+0x02d,0x00055555,
+0x02e,0x0005510c,
+};
+
+const u32 Rtl8192DURadioB_2TArray[Rtl8192DURadioB_2TArrayLength] = {
+0x000,0x00030000,
+0x001,0x00030000,
+0x002,0x00000000,
+0x003,0x00018c63,
+0x004,0x00018c63,
+0x008,0x00084000,
+0x00b,0x0001c000,
+0x00e,0x00018c67,
+0x00f,0x00000851,
+0x014,0x00021440,
+0x018,0x00007401,
+0x019,0x00000060,
+0x01d,0x000a1290,
+0x023,0x00001558,
+0x01a,0x00030a99,
+0x01b,0x00040b00,
+0x01c,0x000fc339,
+0x03a,0x000a57eb,
+0x03b,0x00020000,
+0x03c,0x000ff454,
+0x020,0x0000aa52,
+0x021,0x00054000,
+0x040,0x0000aa52,
+0x041,0x00014000,
+0x025,0x000803be,
+0x026,0x000fc638,
+0x027,0x00077c18,
+0x028,0x000d1c31,
+0x029,0x000d7110,
+0x02a,0x000aeb04,
+0x02b,0x0004128b,
+0x02c,0x00001840,
+0x043,0x0002444f,
+0x044,0x0001adb0,
+0x045,0x00056467,
+0x046,0x0008992c,
+0x047,0x0000452c,
+0x048,0x000f9c43,
+0x049,0x00002e0c,
+0x04a,0x000546eb,
+0x04b,0x0008966c,
+0x04c,0x0000dde9,
+0x018,0x00007401,
+0x000,0x00070000,
+0x012,0x000dc000,
+0x012,0x00090000,
+0x012,0x00051000,
+0x012,0x00012000,
+0x013,0x000287b7,
+0x013,0x000247ab,
+0x013,0x0002079f,
+0x013,0x0001c793,
+0x013,0x0001839b,
+0x013,0x00014392,
+0x013,0x0001019a,
+0x013,0x0000c191,
+0x013,0x00008194,
+0x013,0x000040a0,
+0x013,0x00000018,
+0x015,0x0000f424,
+0x015,0x0004f424,
+0x015,0x0008f424,
+0x016,0x000e1330,
+0x016,0x000a1330,
+0x016,0x00061330,
+0x016,0x00021330,
+0x018,0x00017524,
+0x000,0x00070000,
+0x012,0x000cf000,
+0x012,0x000bc000,
+0x012,0x00078000,
+0x012,0x00000000,
+0x013,0x000287bc,
+0x013,0x000247b0,
+0x013,0x000203b4,
+0x013,0x0001c3a8,
+0x013,0x000181b4,
+0x013,0x000141a8,
+0x013,0x000100b4,
+0x013,0x0000c0a8,
+0x013,0x0000b030,
+0x013,0x00004024,
+0x013,0x00000018,
+0x015,0x0000f4c3,
+0x015,0x0004f4c3,
+0x015,0x0008f4c3,
+0x016,0x000e085f,
+0x016,0x000a085f,
+0x016,0x0006085f,
+0x016,0x0002085f,
+0x018,0x00037524,
+0x000,0x00070000,
+0x012,0x000cf000,
+0x012,0x000bc000,
+0x012,0x00078000,
+0x012,0x00000000,
+0x013,0x000287bc,
+0x013,0x000247b0,
+0x013,0x000203b4,
+0x013,0x0001c3a8,
+0x013,0x000181b4,
+0x013,0x000141a8,
+0x013,0x000100b4,
+0x013,0x0000c0a8,
+0x013,0x0000b030,
+0x013,0x00004024,
+0x013,0x00000018,
+0x015,0x0000f4c3,
+0x015,0x0004f4c3,
+0x015,0x0008f4c3,
+0x016,0x000e085f,
+0x016,0x000a085f,
+0x016,0x0006085f,
+0x016,0x0002085f,
+0x018,0x00057524,
+0x000,0x00070000,
+0x012,0x000cf000,
+0x012,0x000bc000,
+0x012,0x00078000,
+0x012,0x00000000,
+0x013,0x000287bc,
+0x013,0x000247b0,
+0x013,0x000203b4,
+0x013,0x0001c3a8,
+0x013,0x000181b4,
+0x013,0x000141a8,
+0x013,0x000100b4,
+0x013,0x0000c0a8,
+0x013,0x0000b030,
+0x013,0x00004024,
+0x013,0x00000018,
+0x015,0x0000f4c3,
+0x015,0x0004f4c3,
+0x015,0x0008f4c3,
+0x016,0x000e085f,
+0x016,0x000a085f,
+0x016,0x0006085f,
+0x016,0x0002085f,
+0x030,0x0004470f,
+0x031,0x00044ff0,
+0x032,0x00000070,
+0x033,0x000dd480,
+0x034,0x000ffac0,
+0x035,0x000b80c0,
+0x036,0x00077000,
+0x037,0x00064ff2,
+0x038,0x000e7661,
+0x039,0x00000e90,
+0x000,0x00030000,
+0x018,0x0000f401,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x01e,0x00088009,
+0x01f,0x00080003,
+0x0fe,0x00000000,
+0x01e,0x00088001,
+0x01f,0x00080000,
+0x0fe,0x00000000,
+0x018,0x00087401,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x02b,0x00041289,
+0x0fe,0x00000000,
+0x02d,0x00066666,
+0x02e,0x00064001,
+0x02d,0x00091111,
+0x02e,0x00014002,
+0x02d,0x000bbbbb,
+0x02e,0x000b4003,
+0x02d,0x000e6666,
+0x02e,0x00064004,
+0x02d,0x00088888,
+0x02e,0x00084005,
+0x02d,0x0009dddd,
+0x02e,0x000d4006,
+0x02d,0x000b3333,
+0x02e,0x00034007,
+0x02d,0x00048888,
+0x02e,0x00084408,
+0x02d,0x000bbbbb,
+0x02e,0x000b4409,
+0x02d,0x000e6666,
+0x02e,0x0006440a,
+0x02d,0x00011111,
+0x02e,0x0001480b,
+0x02d,0x0003bbbb,
+0x02e,0x000b480c,
+0x02d,0x00066666,
+0x02e,0x0006480d,
+0x02d,0x000ccccc,
+0x02e,0x000c480e,
+};
+
+const u32 Rtl8192DURadioA_1TArray[Rtl8192DURadioA_1TArrayLength] = {
+0x0, };
+
+const u32 Rtl8192DURadioB_1TArray[Rtl8192DURadioB_1TArrayLength] = {
+0x0, };
+
+const u32 Rtl8192DURadioA_2T_intPAArray[Rtl8192DURadioA_2T_intPAArrayLength] = {
+0x000,0x00030000,
+0x001,0x00030000,
+0x002,0x00000000,
+0x003,0x00018c63,
+0x004,0x00018c63,
+0x008,0x00084000,
+0x00b,0x0001c000,
+0x00e,0x00018c67,
+0x00f,0x00000851,
+0x014,0x00021440,
+0x018,0x00017524,
+0x019,0x00000000,
+0x01d,0x000a1290,
+0x023,0x00001558,
+0x01a,0x00030a99,
+0x01b,0x00040b00,
+0x01c,0x000fc339,
+0x03a,0x000a57eb,
+0x03b,0x00020000,
+0x03c,0x000ff455,
+0x020,0x0000aa52,
+0x021,0x00054000,
+0x040,0x0000aa52,
+0x041,0x00014000,
+0x025,0x000803be,
+0x026,0x000fc638,
+0x027,0x00077c18,
+0x028,0x000de471,
+0x029,0x000d7110,
+0x02a,0x0008eb04,
+0x02b,0x0004128b,
+0x02c,0x00001840,
+0x043,0x0002444f,
+0x044,0x0001adb0,
+0x045,0x00056467,
+0x046,0x0008992c,
+0x047,0x0000452c,
+0x048,0x000c0443,
+0x049,0x00000730,
+0x04a,0x00050f0f,
+0x04b,0x000896ef,
+0x04c,0x0000ddee,
+0x018,0x00007401,
+0x000,0x00070000,
+0x012,0x000dc000,
+0x012,0x00090000,
+0x012,0x00051000,
+0x012,0x00012000,
+0x013,0x000287b7,
+0x013,0x000247ab,
+0x013,0x0002079f,
+0x013,0x0001c793,
+0x013,0x0001839b,
+0x013,0x00014392,
+0x013,0x0001019a,
+0x013,0x0000c191,
+0x013,0x00008194,
+0x013,0x000040a0,
+0x013,0x00000018,
+0x015,0x0000f424,
+0x015,0x0004f424,
+0x015,0x0008f424,
+0x016,0x000e1330,
+0x016,0x000a1330,
+0x016,0x00061330,
+0x016,0x00021330,
+0x018,0x00017524,
+0x000,0x00070000,
+0x012,0x000cf000,
+0x012,0x000bc000,
+0x012,0x00078000,
+0x012,0x00000000,
+0x013,0x000287bf,
+0x013,0x000247b3,
+0x013,0x000207a7,
+0x013,0x0001c79b,
+0x013,0x0001839f,
+0x013,0x00014393,
+0x013,0x00010399,
+0x013,0x0000c38d,
+0x013,0x00008199,
+0x013,0x0000418d,
+0x013,0x00000099,
+0x015,0x0000f495,
+0x015,0x0004f495,
+0x015,0x0008f495,
+0x016,0x000e1874,
+0x016,0x000a1874,
+0x016,0x00061874,
+0x016,0x00021874,
+0x018,0x00037564,
+0x000,0x00070000,
+0x012,0x000cf000,
+0x012,0x000bc000,
+0x012,0x00078000,
+0x012,0x00000000,
+0x013,0x000287bf,
+0x013,0x000247b3,
+0x013,0x000207a7,
+0x013,0x0001c79b,
+0x013,0x0001839f,
+0x013,0x00014393,
+0x013,0x00010399,
+0x013,0x0000c38d,
+0x013,0x00008199,
+0x013,0x0000418d,
+0x013,0x00000099,
+0x015,0x0000f495,
+0x015,0x0004f495,
+0x015,0x0008f495,
+0x016,0x000e1874,
+0x016,0x000a1874,
+0x016,0x00061874,
+0x016,0x00021874,
+0x018,0x00057595,
+0x000,0x00070000,
+0x012,0x000cf000,
+0x012,0x000bc000,
+0x012,0x00078000,
+0x012,0x00000000,
+0x013,0x000287bf,
+0x013,0x000247b3,
+0x013,0x000207a7,
+0x013,0x0001c79b,
+0x013,0x0001839f,
+0x013,0x00014393,
+0x013,0x00010399,
+0x013,0x0000c38d,
+0x013,0x00008199,
+0x013,0x0000418d,
+0x013,0x00000099,
+0x015,0x0000f495,
+0x015,0x0004f495,
+0x015,0x0008f495,
+0x016,0x000e1874,
+0x016,0x000a1874,
+0x016,0x00061874,
+0x016,0x00021874,
+0x030,0x0004470f,
+0x031,0x00044ff0,
+0x032,0x00000070,
+0x033,0x000dd480,
+0x034,0x000ffac0,
+0x035,0x000b80c0,
+0x036,0x00077000,
+0x037,0x00064ff2,
+0x038,0x000e7661,
+0x039,0x00000e90,
+0x000,0x00030000,
+0x018,0x0000f401,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x01e,0x00088009,
+0x01f,0x00080003,
+0x0fe,0x00000000,
+0x01e,0x00088001,
+0x01f,0x00080000,
+0x0fe,0x00000000,
+0x018,0x00097524,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x02b,0x00041289,
+0x0fe,0x00000000,
+0x02d,0x0006aaaa,
+0x02e,0x000b4d01,
+0x02d,0x00080000,
+0x02e,0x00004d02,
+0x02d,0x00095555,
+0x02e,0x00054d03,
+0x02d,0x000aaaaa,
+0x02e,0x000b4d04,
+0x02d,0x000c0000,
+0x02e,0x00004d05,
+0x02d,0x000d5555,
+0x02e,0x00054d06,
+0x02d,0x000eaaaa,
+0x02e,0x000b4d07,
+0x02d,0x00000000,
+0x02e,0x00005108,
+0x02d,0x00015555,
+0x02e,0x00055109,
+0x02d,0x0002aaaa,
+0x02e,0x000b510a,
+0x02d,0x00040000,
+0x02e,0x0000510b,
+0x02d,0x00055555,
+0x02e,0x0005510c,
+};
+
+const u32 Rtl8192DURadioB_2T_intPAArray[Rtl8192DURadioB_2T_intPAArrayLength] = {
+0x000,0x00030000,
+0x001,0x00030000,
+0x002,0x00000000,
+0x003,0x00018c63,
+0x004,0x00018c63,
+0x008,0x00084000,
+0x00b,0x0001c000,
+0x00e,0x00018c67,
+0x00f,0x00000851,
+0x014,0x00021440,
+0x018,0x00007401,
+0x019,0x00000060,
+0x01d,0x000a1290,
+0x023,0x00001558,
+0x01a,0x00030a99,
+0x01b,0x00040b00,
+0x01c,0x000fc339,
+0x03a,0x000a57eb,
+0x03b,0x00020000,
+0x03c,0x000ff455,
+0x020,0x0000aa52,
+0x021,0x00054000,
+0x040,0x0000aa52,
+0x041,0x00014000,
+0x025,0x000803be,
+0x026,0x000fc638,
+0x027,0x00077c18,
+0x028,0x000d1c31,
+0x029,0x000d7110,
+0x02a,0x000aeb04,
+0x02b,0x0004128b,
+0x02c,0x00001840,
+0x043,0x0002444f,
+0x044,0x0001adb0,
+0x045,0x00056467,
+0x046,0x0008992c,
+0x047,0x0000452c,
+0x048,0x000c0443,
+0x049,0x00000730,
+0x04a,0x00050f0f,
+0x04b,0x000896ef,
+0x04c,0x0000ddee,
+0x018,0x00007401,
+0x000,0x00070000,
+0x012,0x000dc000,
+0x012,0x00090000,
+0x012,0x00051000,
+0x012,0x00012000,
+0x013,0x000287b7,
+0x013,0x000247ab,
+0x013,0x0002079f,
+0x013,0x0001c793,
+0x013,0x0001839b,
+0x013,0x00014392,
+0x013,0x0001019a,
+0x013,0x0000c191,
+0x013,0x00008194,
+0x013,0x000040a0,
+0x013,0x00000018,
+0x015,0x0000f424,
+0x015,0x0004f424,
+0x015,0x0008f424,
+0x016,0x000e1330,
+0x016,0x000a1330,
+0x016,0x00061330,
+0x016,0x00021330,
+0x018,0x00017524,
+0x000,0x00070000,
+0x012,0x000cf000,
+0x012,0x000bc000,
+0x012,0x00078000,
+0x012,0x00000000,
+0x013,0x000287bf,
+0x013,0x000247b3,
+0x013,0x000207a7,
+0x013,0x0001c79b,
+0x013,0x0001839f,
+0x013,0x00014393,
+0x013,0x00010399,
+0x013,0x0000c38d,
+0x013,0x00008199,
+0x013,0x0000418d,
+0x013,0x00000099,
+0x015,0x0000f495,
+0x015,0x0004f495,
+0x015,0x0008f495,
+0x016,0x000e1874,
+0x016,0x000a1874,
+0x016,0x00061874,
+0x016,0x00021874,
+0x018,0x00037564,
+0x000,0x00070000,
+0x012,0x000cf000,
+0x012,0x000bc000,
+0x012,0x00078000,
+0x012,0x00000000,
+0x013,0x000287bf,
+0x013,0x000247b3,
+0x013,0x000207a7,
+0x013,0x0001c79b,
+0x013,0x0001839f,
+0x013,0x00014393,
+0x013,0x00010399,
+0x013,0x0000c38d,
+0x013,0x00008199,
+0x013,0x0000418d,
+0x013,0x00000099,
+0x015,0x0000f495,
+0x015,0x0004f495,
+0x015,0x0008f495,
+0x016,0x000e1874,
+0x016,0x000a1874,
+0x016,0x00061874,
+0x016,0x00021874,
+0x018,0x00057595,
+0x000,0x00070000,
+0x012,0x000cf000,
+0x012,0x000bc000,
+0x012,0x00078000,
+0x012,0x00000000,
+0x013,0x000287bf,
+0x013,0x000247b3,
+0x013,0x000207a7,
+0x013,0x0001c79b,
+0x013,0x0001839f,
+0x013,0x00014393,
+0x013,0x00010399,
+0x013,0x0000c38d,
+0x013,0x00008199,
+0x013,0x0000418d,
+0x013,0x00000099,
+0x015,0x0000f495,
+0x015,0x0004f495,
+0x015,0x0008f495,
+0x016,0x000e1874,
+0x016,0x000a1874,
+0x016,0x00061874,
+0x016,0x00021874,
+0x030,0x0004470f,
+0x031,0x00044ff0,
+0x032,0x00000070,
+0x033,0x000dd480,
+0x034,0x000ffac0,
+0x035,0x000b80c0,
+0x036,0x00077000,
+0x037,0x00064ff2,
+0x038,0x000e7661,
+0x039,0x00000e90,
+0x000,0x00030000,
+0x018,0x0000f401,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x01e,0x00088009,
+0x01f,0x00080003,
+0x0fe,0x00000000,
+0x01e,0x00088001,
+0x01f,0x00080000,
+0x0fe,0x00000000,
+0x018,0x00087401,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x02b,0x00041289,
+0x0fe,0x00000000,
+0x02d,0x00066666,
+0x02e,0x00064001,
+0x02d,0x00091111,
+0x02e,0x00014002,
+0x02d,0x000bbbbb,
+0x02e,0x000b4003,
+0x02d,0x000e6666,
+0x02e,0x00064004,
+0x02d,0x00088888,
+0x02e,0x00084005,
+0x02d,0x0009dddd,
+0x02e,0x000d4006,
+0x02d,0x000b3333,
+0x02e,0x00034007,
+0x02d,0x00048888,
+0x02e,0x00084408,
+0x02d,0x000bbbbb,
+0x02e,0x000b4409,
+0x02d,0x000e6666,
+0x02e,0x0006440a,
+0x02d,0x00011111,
+0x02e,0x0001480b,
+0x02d,0x0003bbbb,
+0x02e,0x000b480c,
+0x02d,0x00066666,
+0x02e,0x0006480d,
+0x02d,0x000ccccc,
+0x02e,0x000c480e,
+};
+
+const u32 Rtl8192DUMAC_2T_Array[Rtl8192DUMAC_2T_ArrayLength] = {
+0x420,0x00000080,
+0x423,0x00000000,
+0x430,0x00000000,
+0x431,0x00000000,
+0x432,0x00000000,
+0x433,0x00000001,
+0x434,0x00000004,
+0x435,0x00000005,
+0x436,0x00000006,
+0x437,0x00000007,
+0x438,0x00000000,
+0x439,0x00000000,
+0x43a,0x00000000,
+0x43b,0x00000001,
+0x43c,0x00000004,
+0x43d,0x00000005,
+0x43e,0x00000006,
+0x43f,0x00000007,
+0x440,0x00000050,
+0x441,0x00000001,
+0x442,0x00000000,
+0x444,0x00000015,
+0x445,0x000000f0,
+0x446,0x0000000f,
+0x447,0x00000000,
+0x462,0x00000008,
+0x463,0x00000003,
+0x4c8,0x000000ff,
+0x4c9,0x00000008,
+0x4cc,0x000000ff,
+0x4cd,0x000000ff,
+0x4ce,0x00000001,
+0x500,0x00000026,
+0x501,0x000000a2,
+0x502,0x0000002f,
+0x503,0x00000000,
+0x504,0x00000028,
+0x505,0x000000a3,
+0x506,0x0000005e,
+0x507,0x00000000,
+0x508,0x0000002b,
+0x509,0x000000a4,
+0x50a,0x0000005e,
+0x50b,0x00000000,
+0x50c,0x0000004f,
+0x50d,0x000000a4,
+0x50e,0x00000000,
+0x50f,0x00000000,
+0x512,0x0000001c,
+0x514,0x0000000a,
+0x515,0x00000010,
+0x516,0x0000000a,
+0x517,0x00000010,
+0x51a,0x00000016,
+0x524,0x0000000f,
+0x525,0x0000004f,
+0x546,0x00000040,
+0x547,0x00000000,
+0x550,0x00000010,
+0x551,0x00000010,
+0x559,0x00000002,
+0x55a,0x00000002,
+0x55d,0x000000ff,
+0x605,0x00000080,
+0x608,0x0000000e,
+0x609,0x0000002a,
+0x652,0x00000020,
+0x63c,0x0000000a,
+0x63d,0x0000000a,
+0x63e,0x0000000e,
+0x63f,0x0000000e,
+0x66e,0x00000005,
+0x700,0x00000021,
+0x701,0x00000043,
+0x702,0x00000065,
+0x703,0x00000087,
+0x708,0x00000021,
+0x709,0x00000043,
+0x70a,0x00000065,
+0x70b,0x00000087,
+0x024,0x0000000d,
+0x025,0x00000080,
+0x026,0x00000011,
+0x027,0x00000000,
+0x028,0x00000083,
+0x029,0x000000db,
+0x02a,0x000000ff,
+0x02b,0x00000000,
+0x014,0x00000055,
+0x015,0x000000a9,
+0x016,0x0000008b,
+0x017,0x00000008,
+0x010,0x00000003,
+0x011,0x0000002b,
+0x012,0x00000002,
+0x013,0x00000049,
+};
+
+const u32 Rtl8192DUAGCTAB_Array[Rtl8192DUAGCTAB_ArrayLength] = {
+0xc78,0x7b000001,
+0xc78,0x7b010001,
+0xc78,0x7b020001,
+0xc78,0x7b030001,
+0xc78,0x7b040001,
+0xc78,0x7b050001,
+0xc78,0x7b060001,
+0xc78,0x7a070001,
+0xc78,0x79080001,
+0xc78,0x78090001,
+0xc78,0x770a0001,
+0xc78,0x760b0001,
+0xc78,0x750c0001,
+0xc78,0x740d0001,
+0xc78,0x730e0001,
+0xc78,0x720f0001,
+0xc78,0x71100001,
+0xc78,0x70110001,
+0xc78,0x6f120001,
+0xc78,0x6e130001,
+0xc78,0x6d140001,
+0xc78,0x6c150001,
+0xc78,0x6b160001,
+0xc78,0x6a170001,
+0xc78,0x69180001,
+0xc78,0x68190001,
+0xc78,0x671a0001,
+0xc78,0x661b0001,
+0xc78,0x651c0001,
+0xc78,0x641d0001,
+0xc78,0x631e0001,
+0xc78,0x621f0001,
+0xc78,0x61200001,
+0xc78,0x60210001,
+0xc78,0x49220001,
+0xc78,0x48230001,
+0xc78,0x47240001,
+0xc78,0x46250001,
+0xc78,0x45260001,
+0xc78,0x44270001,
+0xc78,0x43280001,
+0xc78,0x42290001,
+0xc78,0x412a0001,
+0xc78,0x402b0001,
+0xc78,0x262c0001,
+0xc78,0x252d0001,
+0xc78,0x242e0001,
+0xc78,0x232f0001,
+0xc78,0x22300001,
+0xc78,0x21310001,
+0xc78,0x20320001,
+0xc78,0x06330001,
+0xc78,0x05340001,
+0xc78,0x04350001,
+0xc78,0x03360001,
+0xc78,0x02370001,
+0xc78,0x01380001,
+0xc78,0x00390001,
+0xc78,0x003a0001,
+0xc78,0x003b0001,
+0xc78,0x003c0001,
+0xc78,0x003d0001,
+0xc78,0x003e0001,
+0xc78,0x003f0001,
+0xc78,0x7b400001,
+0xc78,0x7b410001,
+0xc78,0x7a420001,
+0xc78,0x79430001,
+0xc78,0x78440001,
+0xc78,0x77450001,
+0xc78,0x76460001,
+0xc78,0x75470001,
+0xc78,0x74480001,
+0xc78,0x73490001,
+0xc78,0x724a0001,
+0xc78,0x714b0001,
+0xc78,0x704c0001,
+0xc78,0x6f4d0001,
+0xc78,0x6e4e0001,
+0xc78,0x6d4f0001,
+0xc78,0x6c500001,
+0xc78,0x6b510001,
+0xc78,0x6a520001,
+0xc78,0x69530001,
+0xc78,0x68540001,
+0xc78,0x67550001,
+0xc78,0x66560001,
+0xc78,0x65570001,
+0xc78,0x64580001,
+0xc78,0x63590001,
+0xc78,0x625a0001,
+0xc78,0x615b0001,
+0xc78,0x605c0001,
+0xc78,0x485d0001,
+0xc78,0x475e0001,
+0xc78,0x465f0001,
+0xc78,0x45600001,
+0xc78,0x44610001,
+0xc78,0x43620001,
+0xc78,0x42630001,
+0xc78,0x41640001,
+0xc78,0x40650001,
+0xc78,0x27660001,
+0xc78,0x26670001,
+0xc78,0x25680001,
+0xc78,0x24690001,
+0xc78,0x236a0001,
+0xc78,0x226b0001,
+0xc78,0x216c0001,
+0xc78,0x206d0001,
+0xc78,0x206e0001,
+0xc78,0x206f0001,
+0xc78,0x20700001,
+0xc78,0x20710001,
+0xc78,0x20720001,
+0xc78,0x20730001,
+0xc78,0x20740001,
+0xc78,0x20750001,
+0xc78,0x20760001,
+0xc78,0x20770001,
+0xc78,0x20780001,
+0xc78,0x20790001,
+0xc78,0x207a0001,
+0xc78,0x207b0001,
+0xc78,0x207c0001,
+0xc78,0x207d0001,
+0xc78,0x207e0001,
+0xc78,0x207f0001,
+0xc78,0x38000002,
+0xc78,0x38010002,
+0xc78,0x38020002,
+0xc78,0x38030002,
+0xc78,0x38040002,
+0xc78,0x38050002,
+0xc78,0x38060002,
+0xc78,0x38070002,
+0xc78,0x38080002,
+0xc78,0x3c090002,
+0xc78,0x3e0a0002,
+0xc78,0x400b0002,
+0xc78,0x440c0002,
+0xc78,0x480d0002,
+0xc78,0x4c0e0002,
+0xc78,0x500f0002,
+0xc78,0x52100002,
+0xc78,0x56110002,
+0xc78,0x5a120002,
+0xc78,0x5e130002,
+0xc78,0x60140002,
+0xc78,0x60150002,
+0xc78,0x60160002,
+0xc78,0x62170002,
+0xc78,0x62180002,
+0xc78,0x62190002,
+0xc78,0x621a0002,
+0xc78,0x621b0002,
+0xc78,0x621c0002,
+0xc78,0x621d0002,
+0xc78,0x621e0002,
+0xc78,0x621f0002,
+0xc78,0x32000044,
+0xc78,0x32010044,
+0xc78,0x32020044,
+0xc78,0x32030044,
+0xc78,0x32040044,
+0xc78,0x32050044,
+0xc78,0x32060044,
+0xc78,0x32070044,
+0xc78,0x32080044,
+0xc78,0x34090044,
+0xc78,0x350a0044,
+0xc78,0x360b0044,
+0xc78,0x370c0044,
+0xc78,0x380d0044,
+0xc78,0x390e0044,
+0xc78,0x3a0f0044,
+0xc78,0x3e100044,
+0xc78,0x42110044,
+0xc78,0x44120044,
+0xc78,0x46130044,
+0xc78,0x4a140044,
+0xc78,0x4e150044,
+0xc78,0x50160044,
+0xc78,0x55170044,
+0xc78,0x5a180044,
+0xc78,0x5e190044,
+0xc78,0x641a0044,
+0xc78,0x6e1b0044,
+0xc78,0x6e1c0044,
+0xc78,0x6e1d0044,
+0xc78,0x6e1e0044,
+0xc78,0x6e1f0044,
+0xc78,0x6e1f0000,
+};
+
+const u32 Rtl8192DUAGCTAB_5GArray[Rtl8192DUAGCTAB_5GArrayLength] = {
+0xc78,0x7b000001,
+0xc78,0x7b010001,
+0xc78,0x7a020001,
+0xc78,0x79030001,
+0xc78,0x78040001,
+0xc78,0x77050001,
+0xc78,0x76060001,
+0xc78,0x75070001,
+0xc78,0x74080001,
+0xc78,0x73090001,
+0xc78,0x720a0001,
+0xc78,0x710b0001,
+0xc78,0x700c0001,
+0xc78,0x6f0d0001,
+0xc78,0x6e0e0001,
+0xc78,0x6d0f0001,
+0xc78,0x6c100001,
+0xc78,0x6b110001,
+0xc78,0x6a120001,
+0xc78,0x69130001,
+0xc78,0x68140001,
+0xc78,0x67150001,
+0xc78,0x66160001,
+0xc78,0x65170001,
+0xc78,0x64180001,
+0xc78,0x63190001,
+0xc78,0x621a0001,
+0xc78,0x611b0001,
+0xc78,0x601c0001,
+0xc78,0x481d0001,
+0xc78,0x471e0001,
+0xc78,0x461f0001,
+0xc78,0x45200001,
+0xc78,0x44210001,
+0xc78,0x43220001,
+0xc78,0x42230001,
+0xc78,0x41240001,
+0xc78,0x40250001,
+0xc78,0x27260001,
+0xc78,0x26270001,
+0xc78,0x25280001,
+0xc78,0x24290001,
+0xc78,0x232a0001,
+0xc78,0x222b0001,
+0xc78,0x212c0001,
+0xc78,0x202d0001,
+0xc78,0x202e0001,
+0xc78,0x202f0001,
+0xc78,0x20300001,
+0xc78,0x20310001,
+0xc78,0x20320001,
+0xc78,0x20330001,
+0xc78,0x20340001,
+0xc78,0x20350001,
+0xc78,0x20360001,
+0xc78,0x20370001,
+0xc78,0x20380001,
+0xc78,0x20390001,
+0xc78,0x203a0001,
+0xc78,0x203b0001,
+0xc78,0x203c0001,
+0xc78,0x203d0001,
+0xc78,0x203e0001,
+0xc78,0x203f0001,
+0xc78,0x32000044,
+0xc78,0x32010044,
+0xc78,0x32020044,
+0xc78,0x32030044,
+0xc78,0x32040044,
+0xc78,0x32050044,
+0xc78,0x32060044,
+0xc78,0x32070044,
+0xc78,0x32080044,
+0xc78,0x34090044,
+0xc78,0x350a0044,
+0xc78,0x360b0044,
+0xc78,0x370c0044,
+0xc78,0x380d0044,
+0xc78,0x390e0044,
+0xc78,0x3a0f0044,
+0xc78,0x3e100044,
+0xc78,0x42110044,
+0xc78,0x44120044,
+0xc78,0x46130044,
+0xc78,0x4a140044,
+0xc78,0x4e150044,
+0xc78,0x50160044,
+0xc78,0x55170044,
+0xc78,0x5a180044,
+0xc78,0x5e190044,
+0xc78,0x641a0044,
+0xc78,0x6e1b0044,
+0xc78,0x6e1c0044,
+0xc78,0x6e1d0044,
+0xc78,0x6e1e0044,
+0xc78,0x6e1f0044,
+0xc78,0x6e1f0000,
+};
+
+const u32 Rtl8192DUAGCTAB_2GArray[Rtl8192DUAGCTAB_2GArrayLength] = {
+0xc78,0x7b000001,
+0xc78,0x7b010001,
+0xc78,0x7b020001,
+0xc78,0x7b030001,
+0xc78,0x7b040001,
+0xc78,0x7b050001,
+0xc78,0x7b060001,
+0xc78,0x7a070001,
+0xc78,0x79080001,
+0xc78,0x78090001,
+0xc78,0x770a0001,
+0xc78,0x760b0001,
+0xc78,0x750c0001,
+0xc78,0x740d0001,
+0xc78,0x730e0001,
+0xc78,0x720f0001,
+0xc78,0x71100001,
+0xc78,0x70110001,
+0xc78,0x6f120001,
+0xc78,0x6e130001,
+0xc78,0x6d140001,
+0xc78,0x6c150001,
+0xc78,0x6b160001,
+0xc78,0x6a170001,
+0xc78,0x69180001,
+0xc78,0x68190001,
+0xc78,0x671a0001,
+0xc78,0x661b0001,
+0xc78,0x651c0001,
+0xc78,0x641d0001,
+0xc78,0x631e0001,
+0xc78,0x621f0001,
+0xc78,0x61200001,
+0xc78,0x60210001,
+0xc78,0x49220001,
+0xc78,0x48230001,
+0xc78,0x47240001,
+0xc78,0x46250001,
+0xc78,0x45260001,
+0xc78,0x44270001,
+0xc78,0x43280001,
+0xc78,0x42290001,
+0xc78,0x412a0001,
+0xc78,0x402b0001,
+0xc78,0x262c0001,
+0xc78,0x252d0001,
+0xc78,0x242e0001,
+0xc78,0x232f0001,
+0xc78,0x22300001,
+0xc78,0x21310001,
+0xc78,0x20320001,
+0xc78,0x06330001,
+0xc78,0x05340001,
+0xc78,0x04350001,
+0xc78,0x03360001,
+0xc78,0x02370001,
+0xc78,0x01380001,
+0xc78,0x00390001,
+0xc78,0x003a0001,
+0xc78,0x003b0001,
+0xc78,0x003c0001,
+0xc78,0x003d0001,
+0xc78,0x003e0001,
+0xc78,0x003f0001,
+0xc78,0x38000002,
+0xc78,0x38010002,
+0xc78,0x38020002,
+0xc78,0x38030002,
+0xc78,0x38040002,
+0xc78,0x38050002,
+0xc78,0x38060002,
+0xc78,0x38070002,
+0xc78,0x38080002,
+0xc78,0x3c090002,
+0xc78,0x3e0a0002,
+0xc78,0x400b0002,
+0xc78,0x440c0002,
+0xc78,0x480d0002,
+0xc78,0x4c0e0002,
+0xc78,0x500f0002,
+0xc78,0x52100002,
+0xc78,0x56110002,
+0xc78,0x5a120002,
+0xc78,0x5e130002,
+0xc78,0x60140002,
+0xc78,0x60150002,
+0xc78,0x60160002,
+0xc78,0x62170002,
+0xc78,0x62180002,
+0xc78,0x62190002,
+0xc78,0x621a0002,
+0xc78,0x621b0002,
+0xc78,0x621c0002,
+0xc78,0x621d0002,
+0xc78,0x621e0002,
+0xc78,0x621f0002,
+0xc78,0x6e1f0000,
+};
+
+const u32 Rtl8192DUAGCTAB_2TArray[Rtl8192DUAGCTAB_2TArrayLength] = {
+0x0, };
+
+const u32 Rtl8192DUAGCTAB_1TArray[Rtl8192DUAGCTAB_1TArrayLength] = {
+0x0, };
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/Hal8192DUTestHWImg.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/Hal8192DUTestHWImg.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/Hal8192DUTestHWImg.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/Hal8192DUTestHWImg.c	2017-09-23 03:42:49.978675187 +0800
@@ -0,0 +1,2131 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+/*Created on  2010/ 5/27,  9:49*/
+
+#include "Hal8192DUTestHWImg.h"
+
+u8 Rtl8192DTestFwImgArray[Rtl8192DTestImgArrayLength] = {
+0x02,0x44,0xfb,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x02,0x77,0xb2,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x02,0x78,0x54,0x00,0x00,0x00,0x00,0x00,0x02,0x75,0xb2,0x00,0x00,
+0x00,0x00,0x00,0x02,0x76,0x08,0x00,0x00,0x00,0x00,0x00,0x02,0x76,0x5e,0x00,0x00,
+0x05,0x04,0x03,0x02,0x00,0x03,0x06,0x05,0x04,0x03,0x00,0x04,0x06,0x05,0x04,0x02,
+0x00,0x04,0x08,0x07,0x06,0x04,0x00,0x06,0x0a,0x09,0x08,0x06,0x00,0x08,0x0a,0x09,
+0x08,0x04,0x00,0x08,0x0a,0x09,0x08,0x02,0x00,0x08,0x0a,0x09,0x08,0x00,0x00,0x08,
+0x12,0x11,0x10,0x08,0x00,0x10,0x1a,0x19,0x18,0x10,0x00,0x18,0x22,0x21,0x20,0x18,
+0x00,0x20,0x22,0x21,0x20,0x10,0x00,0x20,0x22,0x21,0x20,0x08,0x00,0x20,0x22,0x21,
+0x1c,0x08,0x00,0x20,0x22,0x21,0x14,0x08,0x00,0x20,0x22,0x20,0x18,0x08,0x00,0x20,
+0x31,0x30,0x20,0x10,0x00,0x30,0x31,0x30,0x18,0x00,0x00,0x30,0x31,0x2f,0x10,0x10,
+0x00,0x30,0x31,0x2c,0x10,0x10,0x00,0x30,0x31,0x28,0x10,0x00,0x00,0x30,0x31,0x20,
+0x10,0x00,0x00,0x30,0x31,0x10,0x10,0x00,0x00,0x30,0x05,0x05,0x05,0x05,0x05,0x05,
+0x05,0x07,0x07,0x07,0x08,0x0a,0x05,0x05,0x05,0x07,0x07,0x0a,0x0d,0x0e,0x05,0x05,
+0x07,0x07,0x08,0x0c,0x14,0x14,0x05,0x05,0x05,0x05,0x09,0x09,0x09,0x09,0x0c,0x0e,
+0x13,0x13,0x09,0x09,0x0a,0x0b,0x0d,0x11,0x13,0x13,0x09,0x09,0x09,0x09,0x0c,0x14,
+0x15,0x15,0x05,0x05,0x05,0x05,0x05,0x05,0x05,0x06,0x06,0x06,0x06,0x06,0x05,0x05,
+0x05,0x06,0x06,0x06,0x06,0x06,0x05,0x05,0x06,0x06,0x06,0x06,0x06,0x06,0x05,0x05,
+0x05,0x05,0x09,0x09,0x09,0x09,0x0b,0x0d,0x10,0x12,0x05,0x09,0x0a,0x0c,0x0d,0x0e,
+0x10,0x12,0x09,0x09,0x0e,0x0e,0x10,0x10,0x12,0x12,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x24,0x26,0x2a,0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a,0x00,0x00,
+0x00,0x1f,0x23,0x28,0x2a,0x2c,0x00,0x04,0x00,0x04,0x00,0x08,0x00,0x10,0x00,0x18,
+0x00,0x24,0x00,0x30,0x00,0x48,0x00,0x60,0x00,0x90,0x00,0xc0,0x00,0xd8,0x00,0x50,
+0x00,0x78,0x00,0xa0,0x00,0xc8,0x01,0x40,0x01,0x90,0x01,0xe0,0x02,0x30,0x01,0x2c,
+0x01,0x40,0x01,0xe0,0x02,0xd0,0x03,0xe8,0x04,0xb0,0x06,0x40,0x07,0xd0,0x00,0x02,
+0x00,0x02,0x00,0x04,0x00,0x08,0x00,0x0c,0x00,0x12,0x00,0x18,0x00,0x24,0x00,0x30,
+0x00,0x48,0x00,0x60,0x00,0x6c,0x00,0x28,0x00,0x3c,0x00,0x50,0x00,0x64,0x00,0xa0,
+0x00,0xc8,0x00,0xf0,0x01,0x18,0x00,0x64,0x00,0xa0,0x00,0xf0,0x01,0x68,0x01,0xf4,
+0x02,0x58,0x03,0x20,0x03,0xe8,0x00,0x00,0x00,0x00,0x01,0x02,0x03,0x04,0x05,0x06,
+0x07,0x08,0x01,0x02,0x03,0x04,0x08,0x0f,0x23,0x3c,0x05,0x06,0x07,0x0f,0x19,0x32,
+0x4b,0x64,0x01,0x01,0x01,0x01,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x01,0x02,
+0x03,0x04,0x05,0x06,0x07,0x08,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x22,0x1f,
+0x1e,0x18,0x00,0x20,0x08,0x00,0x00,0x00,0xff,0xff,0xff,0xff,0xff,0xff,0x00,0xe0,
+0x4c,0x81,0x92,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x20,0x8d,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0xf8,0xff,0xff,0xff,0xff,0xff,0xff,0x0c,0x63,0x84,0xaa,
+0x32,0xca,0x89,0xb2,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0xab,0x07,0xeb,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x44,0xf5,0x82,
+0x74,0x04,0x3e,0xf5,0x83,0x74,0x11,0xf0,0xeb,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,
+0x08,0xe6,0x24,0x45,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0x74,0xf0,0xf0,0xeb,0x25,
+0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x46,0xf5,0x82,0x74,0x04,0x3e,0xf5,
+0x83,0x74,0x0f,0xf0,0xeb,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x47,
+0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xe4,0xf0,0x90,0x9c,0x39,0xf0,0x90,0x9c,0x39,
+0xe0,0xff,0xc3,0x94,0x10,0x50,0x25,0xeb,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,
+0xe6,0xfd,0xef,0x2d,0xff,0xe4,0x3c,0xfe,0x74,0xa4,0x2f,0xf5,0x82,0x74,0x04,0x3e,
+0xf5,0x83,0xe4,0xf0,0x90,0x9c,0x39,0xe0,0x04,0xf0,0x80,0xd1,0xeb,0xc4,0x33,0x54,
+0xe0,0x90,0x9c,0x3b,0xf0,0x90,0x9c,0x39,0xf0,0x90,0x9c,0x3b,0xe0,0x24,0x20,0xff,
+0xe4,0x33,0xfe,0x90,0x9c,0x39,0xe0,0xfa,0xc3,0x9f,0xee,0x64,0x80,0xf8,0x74,0x80,
+0x98,0x40,0x03,0x02,0x44,0xd6,0xe0,0xff,0x75,0xf0,0x0a,0xa4,0x24,0x00,0xf5,0x82,
+0xe5,0xf0,0x34,0x90,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xef,0xa4,0x24,
+0x02,0xf5,0x82,0xe5,0xf0,0x34,0x90,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,
+0xef,0xa4,0x24,0x04,0xf5,0x82,0xe5,0xf0,0x34,0x90,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,
+0x75,0xf0,0x0a,0xef,0xa4,0x24,0x06,0xf5,0x82,0xe5,0xf0,0x34,0x90,0xf5,0x83,0xe4,
+0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xef,0xa4,0x24,0x08,0xf5,0x82,0xe5,0xf0,0x34,0x90,
+0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xef,0x25,0xe0,0x24,0x00,0xf5,0x82,0xe4,0x34,0x93,
+0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xef,0x25,0xe0,0x24,0xe5,0xf5,0x82,0xe4,0x34,0x97,
+0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xef,0x25,0xe0,0x24,0xe5,0xf5,0x82,0xe4,0x34,0x98,
+0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xef,0x25,0xe0,0x24,0x65,0xf5,0x82,0xe4,0x34,0x98,
+0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xef,0x25,0xe0,0x24,0xe7,0xf5,0x82,0xe4,0x34,0x99,
+0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xef,0x25,0xe0,0x24,0x67,0xf5,0x82,0xe4,0x34,0x9a,
+0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x74,0x67,0x2f,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,
+0xe4,0xf0,0x90,0x41,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0x90,0x41,0xac,0x74,0x01,
+0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xe4,0xfc,0xfd,0xea,
+0x25,0xe0,0x25,0xe0,0x24,0xe2,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0x12,0x6f,0x7c,
+0x75,0xf0,0x08,0xea,0xa4,0x24,0xec,0xf5,0x82,0xe5,0xf0,0x34,0x95,0xf5,0x83,0x74,
+0x01,0xf0,0x75,0xf0,0x08,0xea,0xa4,0x24,0xeb,0xf5,0x82,0xe5,0xf0,0x34,0x95,0xf5,
+0x83,0x74,0x01,0xf0,0x74,0xa2,0x2a,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0x74,0x0c,
+0xf0,0x75,0xf0,0x08,0xea,0xa4,0x24,0xe7,0xf5,0x82,0xe5,0xf0,0x34,0x95,0xf5,0x83,
+0x74,0xff,0xf0,0xa3,0xf0,0x75,0xf0,0x08,0xea,0xa4,0x24,0xe5,0xf5,0x82,0xe5,0xf0,
+0x34,0x95,0xf5,0x83,0xe4,0xf0,0xa3,0x74,0x0f,0xf0,0x75,0xf0,0x08,0xea,0xa4,0x24,
+0xe9,0xf5,0x82,0xe5,0xf0,0x34,0x95,0xf5,0x83,0x74,0x13,0xf0,0x75,0xf0,0x08,0xea,
+0xa4,0x24,0xea,0xf5,0x82,0xe5,0xf0,0x34,0x95,0xf5,0x83,0xe4,0xf0,0xea,0x54,0x1f,
+0xff,0xeb,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x2f,0xff,0xe4,0x3c,0xfe,
+0x74,0x84,0x2f,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0x74,0x13,0xf0,0x90,0x9c,0x39,
+0xe0,0x04,0xf0,0x02,0x43,0x19,0x74,0x20,0x2b,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,
+0xe4,0xf0,0x22,0xef,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x2d,0xff,0xee,
+0x3c,0x8f,0x82,0xf5,0x83,0xa3,0xa3,0xa3,0xe4,0xf0,0x22,0x02,0x58,0x04,0x22,0x00,
+0x00,0x00,0x00,0x02,0x65,0xd4,0x02,0x6c,0x9e,0x8f,0x19,0xa2,0xaf,0xe4,0x33,0x90,
+0x9c,0x51,0xf0,0xc2,0xaf,0x7e,0x45,0x7f,0x09,0xe4,0xfd,0x12,0x74,0x3c,0x90,0x9c,
+0x51,0xe0,0x24,0xff,0x92,0xaf,0xe5,0x19,0xc4,0x33,0x54,0xe0,0x90,0x9c,0x38,0xf0,
+0xe5,0x19,0x24,0x01,0xff,0xe4,0x33,0xfe,0xef,0x78,0x05,0xc3,0x33,0xce,0x33,0xce,
+0xd8,0xf9,0xff,0x90,0x9c,0x38,0xe0,0xfb,0xc3,0x9f,0xee,0x64,0x80,0xf8,0x74,0x80,
+0x98,0x40,0x03,0x02,0x4c,0x9a,0xe0,0xfe,0x54,0x1f,0x90,0x9c,0x4f,0xf0,0x75,0xf0,
+0x08,0xee,0xa4,0x24,0xec,0xf5,0x82,0xe5,0xf0,0x34,0x95,0xf5,0x83,0xe0,0x64,0x01,
+0x60,0x03,0x02,0x4c,0x91,0xeb,0x25,0xe0,0x24,0x00,0xf5,0x82,0xe4,0x34,0x93,0xf5,
+0x83,0xe0,0xfe,0xa3,0xe0,0xd3,0x94,0x00,0xee,0x94,0x00,0x50,0x03,0x02,0x4c,0x91,
+0x90,0x9c,0x38,0xe0,0xff,0x24,0x20,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0x04,
+0xf0,0xef,0x75,0xf0,0x0a,0xa4,0x24,0x00,0xf9,0x74,0x90,0x35,0xf0,0xfa,0x7b,0x01,
+0x8b,0x1d,0xf5,0x1e,0x89,0x1f,0x90,0x9c,0x38,0xe0,0xff,0x25,0xe0,0x24,0x00,0xf5,
+0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xfd,0xa3,0xe0,0x90,0x9c,0x41,0xcd,0xf0,0xa3,
+0xed,0xf0,0xef,0x25,0xe0,0x24,0xe5,0xf5,0x82,0xe4,0x34,0x97,0xf5,0x83,0xe0,0xff,
+0xa3,0xe0,0x90,0x9c,0x43,0xcf,0xf0,0xa3,0xef,0xf0,0x90,0x00,0x02,0x12,0x6e,0xe7,
+0xff,0xae,0xf0,0x12,0x6e,0xbc,0x2f,0xff,0xe5,0xf0,0x3e,0x90,0x9c,0x4a,0xf0,0xa3,
+0xef,0xf0,0x90,0x00,0x06,0x12,0x6e,0xe7,0xff,0xae,0xf0,0x90,0x00,0x04,0x12,0x6e,
+0xe7,0x2f,0xff,0xe5,0xf0,0x3e,0x90,0x9c,0x48,0xf0,0xa3,0xef,0xf0,0x90,0x00,0x08,
+0x12,0x6e,0xe7,0xff,0x90,0x9c,0x46,0xe5,0xf0,0xf0,0xa3,0xef,0xf0,0xe5,0x19,0x25,
+0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0xff,0x90,0x9c,0x4f,0xe0,0x2f,0xff,0xe4,
+0x3e,0xfe,0x74,0x84,0x2f,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xe0,0x54,0x3f,0x90,
+0x9c,0x3b,0xf0,0xe0,0xfe,0x54,0x1f,0xa3,0xf0,0x90,0x9c,0x38,0xe0,0xff,0x75,0xf0,
+0x08,0xa4,0x24,0xe9,0xf5,0x82,0xe5,0xf0,0x34,0x95,0xf5,0x83,0xe0,0x90,0x9c,0x4c,
+0xf0,0x74,0x67,0x2f,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xc3,0x94,0x05,0x40,
+0x03,0x02,0x49,0x27,0x90,0x9c,0x4c,0xe0,0xff,0x90,0x9c,0x3c,0xe0,0x9f,0x40,0x13,
+0x90,0x9c,0x4c,0xe0,0x90,0x9c,0x3c,0xf0,0xee,0x54,0x40,0xfe,0x90,0x9c,0x3b,0xf0,
+0xef,0x4e,0xf0,0x90,0x9c,0x3c,0xe0,0xff,0x90,0x41,0x5a,0x93,0xfe,0x90,0x9c,0x38,
+0xe0,0x24,0x65,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe0,0xc3,0x9e,0x40,0x06,0xef,
+0x90,0x40,0xea,0x80,0x07,0x90,0x9c,0x3c,0xe0,0x90,0x41,0x06,0x93,0x90,0x9c,0x45,
+0xf0,0x90,0x9c,0x45,0xe0,0x75,0xf0,0x06,0xa4,0x24,0x60,0xf9,0x74,0x40,0x35,0xf0,
+0x75,0x1a,0xff,0xf5,0x1b,0x89,0x1c,0x90,0x9c,0x3b,0xe0,0x90,0x42,0x02,0x93,0xff,
+0xd3,0x90,0x9c,0x44,0xe0,0x9f,0x90,0x9c,0x43,0xe0,0x94,0x00,0x40,0x0d,0x90,0x9c,
+0x38,0xe0,0xff,0xe4,0xfd,0x12,0x6a,0x8c,0x02,0x4c,0x27,0x90,0x9c,0x38,0xe0,0x25,
+0xe0,0x25,0xe0,0x24,0xe2,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xfc,0xa3,0xe0,
+0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xf5,0x23,0x8e,0x22,0x8d,0x21,0x8c,0x20,0xab,0x1a,
+0xaa,0x1b,0xa9,0x1c,0x12,0x2f,0xc0,0xff,0x7e,0x00,0xab,0x1d,0xaa,0x1e,0xa9,0x1f,
+0x12,0x6e,0xbc,0xfd,0xac,0xf0,0x12,0x2f,0xd9,0xe4,0xfc,0xfd,0xe5,0x23,0x2f,0xf5,
+0x23,0xe5,0x22,0x3e,0xf5,0x22,0xed,0x35,0x21,0xf5,0x21,0xec,0x35,0x20,0xf5,0x20,
+0xab,0x1a,0xaa,0x1b,0xa9,0x1c,0x90,0x00,0x01,0x12,0x6e,0x2f,0xff,0x7e,0x00,0xab,
+0x1d,0xaa,0x1e,0xa9,0x1f,0x90,0x00,0x02,0x12,0x6e,0xe7,0xfd,0xac,0xf0,0x12,0x2f,
+0xd9,0xe4,0xfc,0xfd,0xe5,0x23,0x2f,0xf5,0x23,0xe5,0x22,0x3e,0xf5,0x22,0xed,0x35,
+0x21,0xf5,0x21,0xec,0x35,0x20,0xf5,0x20,0xab,0x1a,0xaa,0x1b,0xa9,0x1c,0x90,0x00,
+0x02,0x12,0x6e,0x2f,0xff,0x7e,0x00,0xab,0x1d,0xaa,0x1e,0xa9,0x1f,0x90,0x00,0x04,
+0x12,0x6e,0xe7,0xfd,0xac,0xf0,0x12,0x2f,0xd9,0xe4,0xfc,0xfd,0xe5,0x23,0x2f,0xf5,
+0x23,0xe5,0x22,0x3e,0xf5,0x22,0xed,0x35,0x21,0xf5,0x21,0xec,0x35,0x20,0xf5,0x20,
+0xab,0x1a,0xaa,0x1b,0xa9,0x1c,0x90,0x00,0x03,0x12,0x6e,0x2f,0xff,0x7e,0x00,0xab,
+0x1d,0xaa,0x1e,0xa9,0x1f,0x90,0x00,0x06,0x12,0x6e,0xe7,0xfd,0xac,0xf0,0x12,0x2f,
+0xd9,0xe4,0xfc,0xfd,0xe5,0x23,0x2f,0xf5,0x23,0xe5,0x22,0x3e,0xf5,0x22,0xed,0x35,
+0x21,0xf5,0x21,0xec,0x35,0x20,0xf5,0x20,0xab,0x1a,0xaa,0x1b,0xa9,0x1c,0x90,0x00,
+0x04,0x12,0x6e,0x2f,0xff,0x7e,0x00,0xab,0x1d,0xaa,0x1e,0xa9,0x1f,0x90,0x00,0x08,
+0x12,0x6e,0xe7,0xfd,0xac,0xf0,0x12,0x2f,0xd9,0xe4,0xfc,0xfd,0xe5,0x23,0x2f,0xf5,
+0x23,0xe5,0x22,0x3e,0xf5,0x22,0xed,0x35,0x21,0xf5,0x21,0xec,0x35,0x20,0xf5,0x20,
+0xab,0x1a,0xaa,0x1b,0xa9,0x1c,0x90,0x00,0x05,0x12,0x6e,0x2f,0xff,0x7e,0x00,0x90,
+0x9c,0x41,0xe0,0xfc,0xa3,0xe0,0xfd,0x12,0x2f,0xd9,0xe4,0xfc,0xfd,0xab,0x23,0xaa,
+0x22,0xa9,0x21,0xa8,0x20,0xd3,0x12,0x6f,0x6b,0x40,0x35,0xab,0x1a,0xaa,0x1b,0xa9,
+0x1c,0x90,0x00,0x05,0x12,0x6e,0x2f,0xff,0x7e,0x00,0x90,0x9c,0x41,0xe0,0xfc,0xa3,
+0xe0,0xfd,0x12,0x2f,0xd9,0xaa,0x06,0xc3,0xe5,0x23,0x9f,0xf5,0x23,0xe5,0x22,0x9a,
+0xf5,0x22,0xe5,0x21,0x94,0x00,0xf5,0x21,0xe5,0x20,0x94,0x00,0xf5,0x20,0x80,0x09,
+0xe4,0xf5,0x23,0xf5,0x22,0xf5,0x21,0xf5,0x20,0xaf,0x23,0xae,0x22,0xad,0x21,0xac,
+0x20,0x90,0x9c,0x38,0xe0,0x25,0xe0,0x25,0xe0,0x24,0xe2,0xf5,0x82,0xe4,0x34,0x94,
+0xf5,0x83,0x12,0x6f,0x7c,0x90,0x9c,0x3b,0xe0,0x25,0xe0,0x24,0x76,0xf5,0x82,0xe4,
+0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xe4,0xfc,0xfd,0xab,0x23,
+0xaa,0x22,0xa9,0x21,0xa8,0x20,0xd3,0x12,0x6f,0x6b,0x40,0x0a,0x90,0x9c,0x38,0xe0,
+0xff,0x12,0x62,0xfc,0x80,0x31,0x90,0x9c,0x3b,0xe0,0x25,0xe0,0x24,0xae,0xf5,0x82,
+0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xe4,0xfc,0xfd,0xab,
+0x23,0xaa,0x22,0xa9,0x21,0xa8,0x20,0xc3,0x12,0x6f,0x6b,0x50,0x0a,0x90,0x9c,0x38,
+0xe0,0xff,0x7d,0x01,0x12,0x6a,0x8c,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,
+0x08,0xe6,0xff,0x90,0x9c,0x4f,0xe0,0xf9,0x2f,0xff,0xe4,0x3e,0xfe,0x74,0x84,0x2f,
+0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xe0,0x54,0x1f,0xc3,0x94,0x09,0x50,0x05,0x90,
+0x9c,0x50,0x80,0x11,0x74,0x84,0x2f,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xe0,0x90,
+0x9c,0x50,0x20,0xe2,0x05,0x74,0x08,0xf0,0x80,0x03,0x74,0x04,0xf0,0xe9,0x60,0x11,
+0x64,0x20,0x60,0x0d,0x90,0x9c,0x4d,0xe0,0xff,0x90,0x9c,0x50,0xe0,0xc3,0x9f,0x50,
+0x08,0x90,0x9c,0x50,0xe0,0x90,0x9c,0x4d,0xf0,0x90,0x9c,0x4d,0xe0,0xff,0xe5,0x19,
+0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x80,0xf5,0x82,0x74,0x04,0x3c,
+0xf5,0x83,0xef,0xf0,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0xff,
+0x24,0xc0,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,0x90,0x9c,0x3a,0xf0,0x74,0xa9,
+0x2f,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xe9,0xf0,0x90,0x9c,0x3a,0xe0,0xff,0xe5,
+0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0xaa,0xf5,0x82,0x74,0x04,
+0x3c,0xf5,0x83,0xef,0xf0,0xef,0x54,0xe0,0x64,0x20,0x60,0x03,0x02,0x4c,0x27,0x90,
+0x9c,0x3a,0xe0,0x54,0x1f,0xff,0x90,0x9c,0x4f,0xe0,0xfe,0x6f,0x60,0x03,0x02,0x4c,
+0x27,0xe5,0x19,0xc4,0x33,0x54,0xe0,0xff,0xee,0x2f,0x90,0x9c,0x3a,0xf0,0xe0,0xfd,
+0x75,0xf0,0x0a,0xa4,0x24,0x00,0xf5,0x82,0xe5,0xf0,0x34,0x90,0xf5,0x83,0xe0,0xfa,
+0xa3,0xe0,0xfb,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x25,0xe0,
+0xff,0xee,0x33,0xfe,0x74,0x92,0x2f,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xea,0xf0,
+0xa3,0xeb,0xf0,0x75,0xf0,0x0a,0xed,0xa4,0x24,0x02,0xf5,0x82,0xe5,0xf0,0x34,0x90,
+0xf5,0x83,0xe0,0xfc,0xa3,0xe0,0xfd,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,
+0x08,0xe6,0x25,0xe0,0xff,0xee,0x33,0xfe,0x74,0x94,0x2f,0xf5,0x82,0x74,0x04,0x3e,
+0xf5,0x83,0xec,0xf0,0xa3,0xed,0xf0,0x90,0x9c,0x3a,0xe0,0xfd,0x75,0xf0,0x0a,0xa4,
+0x24,0x04,0xf5,0x82,0xe5,0xf0,0x34,0x90,0xf5,0x83,0xe0,0xfa,0xa3,0xe0,0xfb,0xe5,
+0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x25,0xe0,0xff,0xee,0x33,0xfe,
+0x74,0x96,0x2f,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xea,0xf0,0xa3,0xeb,0xf0,0x75,
+0xf0,0x0a,0xed,0xa4,0x24,0x06,0xf5,0x82,0xe5,0xf0,0x34,0x90,0xf5,0x83,0xe0,0xfc,
+0xa3,0xe0,0xfd,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x25,0xe0,
+0xff,0xee,0x33,0xfe,0x74,0x98,0x2f,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xec,0xf0,
+0xa3,0xed,0xf0,0x90,0x9c,0x3a,0xe0,0xfd,0x75,0xf0,0x0a,0xa4,0x24,0x08,0xf5,0x82,
+0xe5,0xf0,0x34,0x90,0xf5,0x83,0xe0,0xfa,0xa3,0xe0,0xfb,0xe5,0x19,0x25,0xe0,0x24,
+0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x25,0xe0,0xff,0xee,0x33,0xfe,0x74,0x9a,0x2f,0xf5,
+0x82,0x74,0x04,0x3e,0xf5,0x83,0xea,0xf0,0xa3,0xeb,0xf0,0xed,0x25,0xe0,0x24,0xe5,
+0xf5,0x82,0xe4,0x34,0x97,0xf5,0x83,0xe0,0xfc,0xa3,0xe0,0xfd,0xe5,0x19,0x25,0xe0,
+0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x25,0xe0,0xff,0xee,0x33,0xfe,0x74,0x9c,0x2f,
+0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xec,0xf0,0xa3,0xed,0xf0,0x90,0x9c,0x3a,0xe0,
+0xfd,0x25,0xe0,0x24,0x65,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe0,0xfa,0xa3,0xe0,
+0xfb,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x25,0xe0,0xff,0xee,
+0x33,0xfe,0x74,0x9e,0x2f,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xea,0xf0,0xa3,0xeb,
+0xf0,0xed,0x25,0xe0,0x24,0x00,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xfc,0xa3,
+0xe0,0xfd,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x25,0xe0,0xff,
+0xee,0x33,0xfe,0x74,0xa0,0x2f,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xec,0xf0,0xa3,
+0xed,0xf0,0x90,0x9c,0x3a,0xe0,0xff,0x75,0xf0,0x08,0xa4,0x24,0xe9,0xf5,0x82,0xe5,
+0xf0,0x34,0x95,0xf5,0x83,0xe0,0xfe,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,
+0x08,0xe6,0x24,0xa6,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xee,0xf0,0x75,0xf0,0x08,
+0xef,0xa4,0x24,0xea,0xf5,0x82,0xe5,0xf0,0x34,0x95,0xf5,0x83,0xe0,0xff,0xe5,0x19,
+0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0xa7,0xf5,0x82,0x74,0x04,0x3c,
+0xf5,0x83,0xef,0xf0,0x74,0x20,0x25,0x19,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,
+0xff,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0xa8,0xf5,0x82,
+0x74,0x04,0x3c,0xf5,0x83,0xef,0xf0,0xab,0x1d,0xaa,0x1e,0xa9,0x1f,0xe4,0xf5,0xf0,
+0x12,0x6f,0x1f,0xab,0x1d,0xaa,0x1e,0xa9,0x1f,0x90,0x00,0x02,0xe4,0xf5,0xf0,0x12,
+0x6f,0x3e,0x90,0x00,0x04,0xe4,0xf5,0xf0,0x12,0x6f,0x3e,0x90,0x00,0x06,0xe4,0xf5,
+0xf0,0x12,0x6f,0x3e,0x90,0x00,0x08,0xe4,0xf5,0xf0,0x12,0x6f,0x3e,0x90,0x9c,0x38,
+0xe0,0xff,0x25,0xe0,0x24,0x00,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4,0xf0,0xa3,
+0xf0,0xef,0x25,0xe0,0x24,0xe5,0xf5,0x82,0xe4,0x34,0x97,0xf5,0x83,0xe4,0xf0,0xa3,
+0xf0,0xef,0x25,0xe0,0x24,0x65,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0xf0,0xa3,
+0xf0,0x90,0x9c,0x38,0xe0,0x04,0xf0,0x02,0x45,0x30,0x22,0xc0,0xd0,0x75,0xd0,0x08,
+0x8f,0x34,0xe5,0x34,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x34,0xf5,
+0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,0xff,0xe5,0x34,0x25,0xe0,0x25,0xe0,0x24,0x55,
+0xf8,0xe6,0xfe,0xef,0x5e,0xff,0xe5,0x34,0x25,0xe0,0x25,0xe0,0x24,0x5d,0xf8,0xa6,
+0x0f,0xe5,0x34,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x36,0xf5,0x82,
+0x74,0x01,0x3e,0xf5,0x83,0xe0,0xff,0xe5,0x34,0x25,0xe0,0x25,0xe0,0x24,0x57,0xf8,
+0xe6,0xfe,0xef,0x5e,0xff,0xe5,0x34,0x25,0xe0,0x25,0xe0,0x24,0x5f,0xf8,0xa6,0x0f,
+0xe5,0x34,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x37,0xf5,0x82,0x74,
+0x01,0x3e,0xf5,0x83,0xe0,0xff,0xe5,0x34,0x25,0xe0,0x25,0xe0,0x24,0x58,0xf8,0xe6,
+0xfe,0xef,0x5e,0xff,0xe5,0x34,0x25,0xe0,0x25,0xe0,0x24,0x60,0xf8,0xa6,0x0f,0xe5,
+0x34,0x25,0xe0,0x25,0xe0,0x24,0x5d,0xf8,0xe6,0x20,0xe0,0x03,0x02,0x4f,0x53,0xe5,
+0x34,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x34,0xf5,0x82,0x74,0x01,
+0x3e,0xf5,0x83,0x74,0x01,0xf0,0xe5,0x34,0x70,0x1a,0xe5,0x34,0x25,0xe0,0x24,0x69,
+0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x50,0xf5,0x82,0x74,0x02,0x3e,0xf5,0x83,0xe0,0x44,
+0x04,0xf0,0x80,0x18,0xe5,0x34,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,
+0x50,0xf5,0x82,0x74,0x02,0x3e,0xf5,0x83,0xe0,0x54,0xfb,0xf0,0x85,0xd1,0x36,0x85,
+0xd2,0x37,0x85,0xd3,0x38,0x85,0xd4,0x39,0x85,0xd5,0x3a,0x85,0xd6,0x3b,0x85,0xd7,
+0x3c,0x85,0xd9,0x3d,0xe5,0x34,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0xff,
+0x24,0xc0,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,0x54,0xe0,0x64,0x20,0x60,0x03,
+0x02,0x4e,0x71,0x74,0xac,0x2f,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xe5,0xd1,0xf0,
+0xe5,0x34,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0xad,0xf5,0x82,0x74,
+0x04,0x3e,0xf5,0x83,0xe5,0xd2,0xf0,0xe5,0x34,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,
+0x08,0xe6,0x24,0xae,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xe5,0xd3,0xf0,0xe5,0x34,
+0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0xaf,0xf5,0x82,0x74,0x04,0x3e,
+0xf5,0x83,0xe5,0xd4,0xf0,0xe5,0x34,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,
+0x24,0xb0,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xe5,0xd5,0xf0,0xe5,0x34,0x25,0xe0,
+0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0xb1,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,
+0xe5,0xd6,0xf0,0xe5,0x34,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0xb2,
+0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xe5,0xd7,0xf0,0xe5,0x34,0x25,0xe0,0x24,0x69,
+0xf8,0xe6,0xfe,0x08,0xe6,0x24,0xb3,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xe5,0xd9,
+0xf0,0xe5,0x3d,0x54,0x40,0xc3,0x13,0xff,0xe5,0x3c,0x54,0x20,0x6f,0x70,0x03,0x02,
+0x4f,0x53,0xe5,0x3d,0x30,0xe5,0x03,0x02,0x4f,0x53,0xe5,0x3b,0x54,0x1f,0xff,0xe5,
+0x34,0xc4,0x33,0x54,0xe0,0x2f,0xf5,0x35,0xe5,0x36,0x54,0x3f,0xf5,0x3e,0xe5,0x3a,
+0x54,0x1f,0xff,0xe5,0x35,0x25,0xe0,0x24,0xe5,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,
+0xe4,0x8f,0xf0,0x12,0x6e,0x90,0xe5,0x3c,0x54,0x1f,0xff,0xe5,0x35,0x25,0xe0,0x24,
+0x00,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x6e,0x90,0xe5,0x3e,
+0xd3,0x94,0x04,0x40,0x03,0x75,0x3e,0x04,0xe5,0x3c,0x54,0x1f,0xff,0x75,0xf0,0x0a,
+0xe5,0x35,0xa4,0x24,0x00,0xf5,0x82,0xe5,0xf0,0x34,0x90,0xf5,0x83,0x75,0xf0,0x02,
+0xe5,0x3e,0x12,0x6f,0x88,0xe4,0x8f,0xf0,0x12,0x6e,0x90,0xe5,0x3d,0x20,0xe6,0x24,
+0xe5,0x3c,0x54,0x1f,0xff,0xe5,0x35,0x25,0xe0,0x24,0xe5,0xf5,0x82,0xe4,0x34,0x97,
+0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x6e,0x90,0xe5,0x38,0x30,0xe7,0x36,0xaf,0x35,0x12,
+0x72,0x3a,0x80,0x2f,0xe5,0x3c,0x54,0x1f,0xff,0xe5,0x35,0x25,0xe0,0x24,0x65,0xf5,
+0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x6e,0x90,0xe5,0x38,0x30,0xe7,
+0x12,0xe5,0x38,0x54,0x7f,0xfd,0xe5,0x3c,0x54,0x1f,0xf5,0x31,0xab,0x3e,0xaf,0x35,
+0x12,0x72,0xd5,0xe5,0x34,0x25,0xe0,0x25,0xe0,0x24,0x5d,0xf8,0xe6,0x30,0xe1,0x39,
+0xe5,0x34,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x34,0xf5,0x82,0x74,
+0x01,0x3e,0xf5,0x83,0x74,0x02,0xf0,0x90,0x9c,0xa6,0xe5,0xd1,0xf0,0xa3,0xe5,0xd2,
+0xf0,0xa3,0xe5,0xd3,0xf0,0xa3,0xe5,0xd4,0xf0,0xa3,0xe5,0xd5,0xf0,0xa3,0xe5,0xd6,
+0xf0,0xa3,0xe5,0xd7,0xf0,0xa3,0xe5,0xd9,0xf0,0xe5,0x34,0x25,0xe0,0x25,0xe0,0x24,
+0x5d,0xf8,0xe6,0x30,0xe3,0x17,0xe5,0x34,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,
+0xe6,0x24,0x34,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x08,0xf0,0xe5,0x34,0x25,
+0xe0,0x25,0xe0,0x24,0x5d,0xf8,0xe6,0x30,0xe4,0x2e,0xe5,0x34,0x25,0xe0,0x24,0x69,
+0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x34,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x10,
+0xf0,0x74,0x67,0x25,0x34,0xf8,0xe6,0x44,0x10,0xf6,0x74,0x9e,0x25,0x34,0xf5,0x82,
+0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x04,0xf0,0xe5,0x34,0x25,0xe0,0x25,0xe0,0x24,0x5d,
+0xf8,0xe6,0x20,0xe5,0x03,0x02,0x50,0xfe,0xe5,0x34,0x25,0xe0,0x24,0x69,0xf8,0xe6,
+0xfe,0x08,0xe6,0xff,0x24,0xcf,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,0x30,0xe7,
+0x47,0x74,0xcf,0x2f,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,0x54,0x7f,0xf0,0xe5,
+0x34,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x34,0xf5,0x82,0x74,0x01,
+0x3e,0xf5,0x83,0x74,0x20,0xf0,0x90,0x00,0x82,0xe0,0x44,0x80,0x12,0x7a,0x9e,0x90,
+0x00,0x80,0xe0,0x54,0x7f,0x12,0x7a,0x9e,0x12,0x7a,0x98,0x90,0x00,0x1a,0x12,0x7a,
+0x9b,0x90,0xfd,0x00,0xe0,0x44,0x01,0xf0,0xe5,0x34,0x25,0xe0,0x24,0x69,0xf8,0xe6,
+0xfe,0x08,0xe6,0xff,0x24,0xcf,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,0x30,0xe6,
+0x2b,0x74,0xcf,0x2f,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,0x54,0xbf,0xf0,0xe5,
+0x34,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x34,0xf5,0x82,0x74,0x01,
+0x3e,0xf5,0x83,0x74,0x20,0xf0,0x90,0x9c,0xa5,0x74,0x01,0xf0,0xe5,0x34,0x25,0xe0,
+0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0xff,0x24,0xcf,0xf5,0x82,0x74,0x01,0x3e,0xf5,
+0x83,0xe0,0x30,0xe5,0x39,0x74,0xcf,0x2f,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,
+0x54,0xdf,0xf0,0xe5,0x34,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x34,
+0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0x20,0xf0,0x12,0x7a,0x98,0x90,0x00,0x1a,
+0x12,0x7a,0x9b,0x90,0x00,0x03,0xe0,0x54,0xfb,0x12,0x7a,0x9e,0x80,0xfe,0xe5,0x34,
+0x25,0xe0,0x25,0xe0,0x24,0x5d,0xf8,0xe6,0x30,0xe6,0x17,0xe5,0x34,0x25,0xe0,0x24,
+0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x34,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,
+0x40,0xf0,0xe5,0x34,0x25,0xe0,0x25,0xe0,0x24,0x5f,0xf8,0xe6,0x30,0xe1,0x20,0xe5,
+0x34,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x36,0xf5,0x82,0x74,0x01,
+0x3e,0xf5,0x83,0x74,0x02,0xf0,0x74,0x67,0x25,0x34,0xf8,0xe6,0x44,0x40,0xf6,0xe5,
+0x34,0x25,0xe0,0x25,0xe0,0x24,0x5f,0xf8,0xe6,0x30,0xe0,0x17,0xe5,0x34,0x25,0xe0,
+0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x36,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,
+0x74,0x01,0xf0,0xe5,0x34,0x70,0x03,0x02,0x52,0x5a,0x25,0xe0,0x24,0x69,0xf8,0xe6,
+0xfe,0x08,0xe6,0x24,0x34,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,0xff,0xe5,0x34,
+0x25,0xe0,0x25,0xe0,0x24,0x55,0xf8,0xe6,0xfe,0xef,0x5e,0xff,0xe5,0x34,0x25,0xe0,
+0x25,0xe0,0x24,0x5d,0xf8,0xa6,0x0f,0xe5,0x34,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,
+0x08,0xe6,0x24,0x36,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,0xff,0xe5,0x34,0x25,
+0xe0,0x25,0xe0,0x24,0x57,0xf8,0xe6,0xfe,0xef,0x5e,0xff,0xe5,0x34,0x25,0xe0,0x25,
+0xe0,0x24,0x5f,0xf8,0xa6,0x0f,0xe5,0x34,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,
+0xe6,0x24,0x37,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,0xff,0xe5,0x34,0x25,0xe0,
+0x25,0xe0,0x24,0x58,0xf8,0xe6,0xfe,0xef,0x5e,0xff,0xe5,0x34,0x25,0xe0,0x25,0xe0,
+0x24,0x60,0xf8,0xa6,0x0f,0xe5,0x34,0x25,0xe0,0x25,0xe0,0x24,0x5d,0xf8,0xe6,0x70,
+0x18,0xe5,0x34,0x25,0xe0,0x25,0xe0,0x24,0x5f,0xf8,0xe6,0x70,0x0c,0xe5,0x34,0x25,
+0xe0,0x25,0xe0,0x24,0x60,0xf8,0xe6,0x60,0x31,0xe5,0x34,0x25,0xe0,0x24,0x69,0xf8,
+0xe6,0xfe,0x08,0xe6,0x24,0xb1,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xe0,0xff,0x04,
+0xf0,0xe5,0x34,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0xb1,0xf5,0x82,
+0x74,0x04,0x3c,0xf5,0x83,0xef,0xf0,0x02,0x4c,0xa2,0xd0,0xd0,0x22,0x8f,0x1a,0x8d,
+0x1b,0xe5,0x1a,0x54,0x1f,0x90,0x9c,0x57,0xf0,0x74,0xa2,0x2f,0xf5,0x82,0xe4,0x34,
+0x94,0xf5,0x83,0xe0,0x14,0x60,0x3d,0x14,0x60,0x4f,0x14,0x60,0x61,0x14,0x70,0x03,
+0x02,0x53,0x08,0x14,0x70,0x03,0x02,0x53,0x1d,0x14,0x70,0x03,0x02,0x53,0x32,0x24,
+0xfa,0x24,0xfc,0x40,0x03,0x02,0x53,0x58,0x24,0x10,0x60,0x03,0x02,0x53,0xd0,0xe5,
+0x1a,0x25,0xe0,0x24,0xe7,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0x74,0xf0,0xf0,0xa3,
+0x74,0x15,0x80,0x3c,0xe5,0x1a,0x25,0xe0,0x24,0xe7,0xf5,0x82,0xe4,0x34,0x9a,0xf5,
+0x83,0x74,0xf0,0xf0,0xa3,0x74,0x10,0x80,0x27,0xe5,0x1a,0x25,0xe0,0x24,0xe7,0xf5,
+0x82,0xe4,0x34,0x9a,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74,0x05,0x80,0x12,0xe5,0x1a,
+0x25,0xe0,0x24,0xe7,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0xe4,
+0xf0,0xe5,0x1a,0x25,0xe0,0x24,0x22,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0x74,0x0f,
+0xf0,0xa3,0x74,0x8f,0xf0,0x02,0x53,0xd0,0xe5,0x1a,0x25,0xe0,0x24,0xe7,0xf5,0x82,
+0xe4,0x34,0x9a,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf5,0x80,0x27,0xe5,0x1a,0x25,
+0xe0,0x24,0xe7,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf0,
+0x80,0x12,0xe5,0x1a,0x25,0xe0,0x24,0xe7,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe4,
+0xf0,0xa3,0x74,0x0d,0xf0,0xe5,0x1a,0x25,0xe0,0x24,0x22,0xf5,0x82,0xe4,0x34,0x94,
+0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x80,0x78,0xe5,0x1b,0x25,0xe0,0x24,0x69,0xf8,0xe6,
+0xfc,0x08,0xe6,0xfd,0x24,0x53,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xe0,0xfe,0x74,
+0x52,0x2d,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xe0,0x7c,0x00,0x24,0x00,0xff,0xec,
+0x3e,0xfe,0xe5,0x1a,0x25,0xe0,0x24,0x22,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xee,
+0xf0,0xa3,0xef,0xf0,0xe5,0x1b,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0xfd,
+0x24,0x51,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xe0,0xfe,0x74,0x50,0x2d,0xf5,0x82,
+0x74,0x04,0x3c,0xf5,0x83,0xe0,0x7c,0x00,0x24,0x00,0xff,0xec,0x3e,0xfe,0xe5,0x1a,
+0x25,0xe0,0x24,0xe7,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,
+0xe5,0x1a,0x25,0xe0,0x24,0xe7,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xc0,0x83,0xc0,
+0x82,0xe0,0xfe,0xa3,0xe0,0xff,0x75,0xf0,0x08,0xe5,0x1a,0xa4,0x24,0xe7,0xf5,0x82,
+0xe5,0xf0,0x34,0x95,0xf5,0x83,0xe0,0xfc,0xa3,0xe0,0xfd,0xee,0x5c,0xfe,0xef,0x5d,
+0xff,0xd0,0x82,0xd0,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xe5,0x1a,0x25,0xe0,0x24,0x22,
+0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xc0,0x83,0xc0,0x82,0xe0,0xfe,0xa3,0xe0,0xff,
+0x75,0xf0,0x08,0xe5,0x1a,0xa4,0x24,0xe5,0xf5,0x82,0xe5,0xf0,0x34,0x95,0xf5,0x83,
+0xe0,0xfc,0xa3,0xe0,0xfd,0xee,0x5c,0xfe,0xef,0x5d,0xff,0xd0,0x82,0xd0,0x83,0xee,
+0xf0,0xa3,0xef,0xf0,0xe5,0x1a,0x25,0xe0,0x24,0x22,0xf5,0x82,0xe4,0x34,0x94,0xf5,
+0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b,0x75,0x1c,0x0b,0x74,0x01,0x7e,0x00,0xa8,
+0x1c,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x1a,0x25,0xe0,
+0x24,0x22,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,
+0x60,0x06,0xe5,0x1c,0x24,0x10,0x80,0x5d,0x15,0x1c,0xe5,0x1c,0xc3,0x94,0x00,0x50,
+0xca,0x80,0x56,0xe5,0x1a,0x25,0xe0,0x24,0xe7,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,
+0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3d,0x75,0x1c,0x0f,0x74,0x01,0x7e,0x00,0xa8,0x1c,
+0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x1a,0x25,0xe0,0x24,
+0xe7,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,
+0x08,0x90,0x9c,0x55,0xe5,0x1c,0xf0,0x80,0x10,0x15,0x1c,0xe5,0x1c,0xc3,0x94,0x00,
+0x50,0xc8,0x80,0x05,0xe4,0x90,0x9c,0x55,0xf0,0xe5,0x1a,0x25,0xe0,0x24,0xe7,0xf5,
+0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b,0xe4,0xf5,0x1c,
+0x74,0x01,0x7e,0x00,0xa8,0x1c,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,
+0xff,0xe5,0x1a,0x25,0xe0,0x24,0xe7,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0x5e,
+0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x08,0x90,0x9c,0x56,0xe5,0x1c,0xf0,0x80,0x5b,0x05,
+0x1c,0xe5,0x1c,0xb4,0x10,0xca,0x80,0x52,0xe5,0x1a,0x25,0xe0,0x24,0x22,0xf5,0x82,
+0xe4,0x34,0x94,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x39,0xe4,0xf5,0x1c,0x74,
+0x01,0x7e,0x00,0xa8,0x1c,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,
+0xe5,0x1a,0x25,0xe0,0x24,0x22,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0x5e,0xfe,
+0xa3,0xe0,0x5f,0x4e,0x60,0x06,0xe5,0x1c,0x24,0x10,0x80,0x0a,0x05,0x1c,0xe5,0x1c,
+0xb4,0x0c,0xcc,0x80,0x05,0xe4,0x90,0x9c,0x56,0xf0,0x90,0x9c,0x56,0xe0,0xff,0x90,
+0x9c,0x55,0xe0,0xfe,0x6f,0x70,0x49,0xee,0x70,0x46,0x74,0xa2,0x25,0x1a,0xf5,0x82,
+0xe4,0x34,0x94,0xf5,0x83,0xe0,0xb4,0x07,0x00,0x50,0x35,0x90,0x55,0xb2,0xf8,0x28,
+0x28,0x73,0x02,0x55,0xd2,0x02,0x55,0xc9,0x02,0x55,0xd2,0x02,0x55,0xcb,0x02,0x55,
+0xd2,0x02,0x55,0xd8,0x02,0x55,0xd2,0x80,0x09,0x80,0x0d,0x90,0x9c,0x55,0x74,0x0c,
+0x80,0x0b,0xe4,0x90,0x9c,0x55,0x80,0x05,0x90,0x9c,0x55,0x74,0x04,0xf0,0xa3,0xf0,
+0x90,0x9c,0x55,0xe0,0xff,0x75,0xf0,0x08,0xe5,0x1a,0xa4,0x24,0xe9,0xf5,0x82,0xe5,
+0xf0,0x34,0x95,0xf5,0x83,0xef,0xf0,0x90,0x9c,0x56,0xe0,0xfe,0x75,0xf0,0x08,0xe5,
+0x1a,0xa4,0x24,0xea,0xf5,0x82,0xe5,0xf0,0x34,0x95,0xf5,0x83,0xee,0xf0,0xe5,0x1b,
+0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0xfd,0xe5,0x1a,0x2d,0xfd,0xe4,0x3c,
+0xfc,0x74,0x84,0x2d,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xe0,0xd3,0x9f,0x40,0x31,
+0x90,0x9c,0x55,0xe0,0xff,0x74,0xa7,0x25,0x1a,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,
+0xef,0xf0,0xe5,0x1b,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0xfd,0xe5,0x1a,
+0x2d,0xfd,0xe4,0x3c,0xfc,0x74,0x84,0x2d,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xef,
+0xf0,0xe5,0x1b,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0xff,0x24,0xc0,0xf5,
+0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,0x54,0xe0,0x64,0x20,0x60,0x03,0x02,0x58,0x03,
+0x75,0xf0,0x08,0xe5,0x1a,0xa4,0x24,0xe7,0xf5,0x82,0xe5,0xf0,0x34,0x95,0xf5,0x83,
+0xe0,0xfc,0xa3,0xe0,0xfd,0xee,0xc3,0x13,0xfe,0xef,0x13,0x25,0xe0,0xff,0xee,0x33,
+0xfe,0x74,0x86,0x2f,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xec,0xf0,0xa3,0xed,0xf0,
+0x75,0xf0,0x08,0xe5,0x1a,0xa4,0x24,0xe5,0xf5,0x82,0xe5,0xf0,0x34,0x95,0xf5,0x83,
+0xe0,0xfc,0xa3,0xe0,0xfd,0xe5,0x1b,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,
+0xff,0xee,0xc3,0x13,0xfe,0xef,0x13,0x25,0xe0,0xff,0xee,0x33,0xfe,0x74,0x88,0x2f,
+0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xec,0xf0,0xa3,0xed,0xf0,0xe5,0x1a,0x25,0xe0,
+0x24,0xe7,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xfc,0xa3,0xe0,0xfd,0xe5,0x1b,
+0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0xff,0xee,0xc3,0x13,0xfe,0xef,0x13,
+0x25,0xe0,0xff,0xee,0x33,0xfe,0x74,0x8a,0x2f,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,
+0xec,0xf0,0xa3,0xed,0xf0,0xe5,0x1a,0x25,0xe0,0x24,0x22,0xf5,0x82,0xe4,0x34,0x94,
+0xf5,0x83,0xe0,0xfc,0xa3,0xe0,0xfd,0xe5,0x1b,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,
+0x08,0xe6,0xff,0xee,0xc3,0x13,0xfe,0xef,0x13,0x25,0xe0,0xff,0xee,0x33,0xfe,0x74,
+0x8c,0x2f,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xec,0xf0,0xa3,0xed,0xf0,0x75,0xf0,
+0x08,0xe5,0x1a,0xa4,0x24,0xe9,0xf5,0x82,0xe5,0xf0,0x34,0x95,0xf5,0x83,0xe0,0xff,
+0xe5,0x1b,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x8e,0xf5,0x82,0x74,
+0x04,0x3c,0xf5,0x83,0xef,0xf0,0x75,0xf0,0x08,0xe5,0x1a,0xa4,0x24,0xea,0xf5,0x82,
+0xe5,0xf0,0x34,0x95,0xf5,0x83,0xe0,0xff,0xe5,0x1b,0x25,0xe0,0x24,0x69,0xf8,0xe6,
+0xfc,0x08,0xe6,0x24,0x8f,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xef,0xf0,0x75,0xf0,
+0x08,0xe5,0x1a,0xa4,0x24,0xeb,0xf5,0x82,0xe5,0xf0,0x34,0x95,0xf5,0x83,0xe0,0xc4,
+0x33,0x54,0xe0,0xff,0x90,0x9c,0x57,0xe0,0x4f,0xff,0xe5,0x1b,0x25,0xe0,0x24,0x69,
+0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x90,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xef,0xf0,
+0x74,0xa2,0x25,0x1a,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xff,0xe5,0x1b,0x25,
+0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x91,0xf5,0x82,0x74,0x04,0x3c,0xf5,
+0x83,0xef,0xf0,0x22,0xe4,0x90,0x9c,0x2c,0xf0,0xa3,0xf0,0x90,0x9c,0x37,0xf0,0x12,
+0x44,0xfe,0x90,0x00,0x02,0xe0,0x54,0xe0,0x90,0x9c,0xa2,0x60,0x05,0x74,0x01,0xf0,
+0x80,0x03,0x74,0x02,0xf0,0x90,0x00,0x2c,0xe0,0x54,0x03,0x90,0x9c,0x2f,0xf0,0xe0,
+0x14,0x60,0x0e,0x24,0xfe,0x60,0x16,0x24,0x03,0x70,0x1e,0xe4,0x90,0x9c,0x7d,0x80,
+0x05,0x90,0x9c,0x7d,0x74,0x01,0xf0,0x90,0x9c,0xa1,0xf0,0x80,0x0c,0x90,0x9c,0x7d,
+0x74,0x03,0xf0,0x90,0x9c,0xa1,0x74,0x01,0xf0,0x90,0xfe,0x5f,0xe0,0x24,0x13,0xf5,
+0x82,0xe4,0x34,0xfd,0xaf,0x82,0x90,0x9c,0x71,0xf0,0xa3,0xef,0xf0,0x90,0x9c,0x72,
+0xe0,0x24,0x20,0xfe,0x90,0x9c,0x71,0xe0,0x34,0x00,0x90,0x9c,0x73,0xf0,0xa3,0xce,
+0xf0,0xe4,0xf5,0x69,0xf5,0x6a,0x75,0x6b,0x40,0xf5,0x6c,0xf5,0x67,0xf5,0x68,0xf5,
+0x65,0xf5,0x66,0x90,0x9c,0x96,0x04,0xf0,0xa3,0xf0,0xe4,0x90,0x9c,0x9e,0xf0,0xa3,
+0xf0,0x90,0x9c,0xa5,0xf0,0x90,0x9c,0x33,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa2,
+0xaf,0x33,0x90,0x9c,0x2f,0xf0,0xc2,0xaf,0x90,0x00,0x80,0xe0,0x44,0x80,0x12,0x7a,
+0x9e,0x90,0x9c,0x2f,0xe0,0x24,0xff,0x92,0xaf,0x90,0xfe,0x4d,0x74,0x02,0xf0,0x90,
+0x01,0xc0,0xe4,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x01,0xc6,0xf0,0xa3,0xf0,
+0x90,0x9c,0x2c,0xe0,0x64,0x01,0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x9c,0x30,0xf0,0xc2,
+0xaf,0x7e,0x58,0x7f,0x04,0x90,0x9c,0x2c,0xe0,0xfd,0x12,0x74,0x3c,0x90,0x9c,0x30,
+0xe0,0x24,0xff,0x92,0xaf,0x90,0x00,0x81,0xe0,0xf5,0x17,0x90,0x00,0x53,0xe0,0xf5,
+0x18,0xe5,0x17,0x20,0xe7,0x26,0x90,0x9c,0x96,0xe0,0x70,0x14,0xa2,0xaf,0x33,0x90,
+0x9c,0x30,0xf0,0xc2,0xaf,0x12,0x7a,0x98,0x90,0x9c,0x30,0xe0,0x24,0xff,0x92,0xaf,
+0xe4,0xf5,0x65,0xf5,0x67,0x90,0x9c,0x96,0x04,0xf0,0x80,0x37,0x90,0x9c,0x96,0xe0,
+0x64,0x01,0x70,0x2f,0x85,0x6a,0x82,0x85,0x69,0x83,0xa3,0xa3,0xa3,0xe0,0x30,0xe7,
+0x22,0xa2,0xaf,0xe4,0x33,0x90,0x9c,0x30,0xf0,0xc2,0xaf,0xe4,0xff,0x12,0x5f,0xde,
+0x90,0x9c,0x30,0xe0,0x24,0xff,0x92,0xaf,0xe4,0x90,0x9c,0x96,0xf0,0x90,0x9c,0x33,
+0xe0,0x04,0xf0,0xe5,0x18,0x20,0xe0,0x29,0x90,0x9c,0x97,0xe0,0x70,0x17,0xa2,0xaf,
+0x33,0x90,0x9c,0x30,0xf0,0xc2,0xaf,0x90,0x00,0x1a,0x12,0x7a,0x9b,0x90,0x9c,0x30,
+0xe0,0x24,0xff,0x92,0xaf,0xe4,0xf5,0x66,0xf5,0x68,0x90,0x9c,0x97,0x04,0xf0,0x80,
+0x3d,0x90,0x9c,0xa1,0xe0,0x60,0x37,0x90,0x9c,0x97,0xe0,0x64,0x01,0x70,0x2f,0x85,
+0x6c,0x82,0x85,0x6b,0x83,0xa3,0xa3,0xa3,0xe0,0x30,0xe7,0x22,0xa2,0xaf,0xe4,0x33,
+0x90,0x9c,0x30,0xf0,0xc2,0xaf,0x7f,0x01,0x12,0x5f,0xde,0x90,0x9c,0x30,0xe0,0x24,
+0xff,0x92,0xaf,0xe4,0x90,0x9c,0x97,0xf0,0x90,0x9c,0x34,0xe0,0x04,0xf0,0xe4,0x90,
+0x9c,0x2f,0xf0,0x90,0x9c,0xa1,0xe0,0xff,0x90,0x9c,0x2f,0xe0,0xd3,0x9f,0x50,0x7b,
+0xe5,0x65,0x70,0x03,0xe0,0x60,0x6b,0xe5,0x66,0x70,0x08,0x90,0x9c,0x2f,0xe0,0x64,
+0x01,0x60,0x5f,0x90,0x9c,0x2f,0xe0,0x24,0x67,0xf8,0xe6,0x30,0xe6,0x11,0xc2,0xaf,
+0xe0,0x24,0x67,0xf8,0xe6,0x54,0xbf,0xf6,0xd2,0xaf,0xe0,0xff,0x12,0x45,0x09,0x90,
+0x9c,0x2f,0xe0,0x24,0x67,0xf8,0xe6,0x30,0xe7,0x0c,0xc2,0xaf,0xe0,0x24,0x67,0xf8,
+0xe6,0x54,0x7f,0xf6,0xd2,0xaf,0x90,0x9c,0x2f,0xe0,0x24,0x67,0xf8,0xe6,0x30,0xe4,
+0x21,0xc2,0xaf,0xe0,0x24,0x67,0xf8,0xe6,0x54,0xef,0xf6,0xd2,0xaf,0xe0,0x24,0x35,
+0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x04,0xf0,0x90,0x9c,0x2f,0xe0,0xff,0x12,
+0x5c,0x6d,0x90,0x9c,0x2f,0xe0,0x04,0xf0,0x02,0x59,0xe3,0x90,0x9c,0xa5,0xe0,0xb4,
+0x01,0x09,0x75,0xa8,0x01,0x75,0xe8,0x01,0x12,0x78,0x05,0x90,0x00,0x18,0xe0,0x90,
+0x9c,0x31,0xf0,0x90,0x00,0x1a,0xe0,0x90,0x9c,0x32,0xf0,0xe4,0x90,0x9c,0x2e,0xf0,
+0x90,0x9c,0x2e,0xe0,0xff,0xd3,0x94,0x01,0x40,0x03,0x02,0x58,0xe0,0xef,0x25,0xe0,
+0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0xc0,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,
+0xe0,0x54,0xe0,0x64,0x40,0x60,0x03,0x02,0x5c,0x64,0x90,0x9c,0x2d,0xf0,0x90,0x9c,
+0x2d,0xe0,0xff,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x88,0xf5,0x82,
+0x74,0x04,0x3c,0xf5,0x83,0xe5,0x17,0xf0,0xef,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,
+0x08,0xe6,0x24,0x89,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xe5,0x65,0xf0,0x90,0x9c,
+0x96,0xe0,0xff,0x90,0x9c,0x2d,0xe0,0xfe,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,
+0xe6,0x24,0x8a,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xef,0xf0,0x90,0x9c,0x31,0xe0,
+0xff,0xee,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x8b,0xf5,0x82,0x74,
+0x04,0x3c,0xf5,0x83,0xef,0xf0,0x90,0x9c,0x33,0xe0,0xff,0xee,0x25,0xe0,0x24,0x69,
+0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x8c,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xef,0xf0,
+0x90,0x9c,0x35,0xe0,0xff,0xee,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,
+0x8d,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xef,0xf0,0x90,0x9c,0x9e,0xe0,0xff,0xee,
+0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x8e,0xf5,0x82,0x74,0x04,0x3c,
+0xf5,0x83,0xef,0xf0,0xee,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x8f,
+0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xe5,0x67,0xf0,0x90,0x9c,0x2d,0xe0,0xff,0x25,
+0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x90,0xf5,0x82,0x74,0x04,0x3c,0xf5,
+0x83,0xe5,0x18,0xf0,0xef,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x91,
+0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xe5,0x66,0xf0,0x90,0x9c,0x97,0xe0,0xff,0x90,
+0x9c,0x2d,0xe0,0xfe,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x92,0xf5,
+0x82,0x74,0x04,0x3c,0xf5,0x83,0xef,0xf0,0x90,0x9c,0x32,0xe0,0xff,0xee,0x25,0xe0,
+0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x93,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,
+0xef,0xf0,0x90,0x9c,0x34,0xe0,0xff,0xee,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,
+0xe6,0x24,0x94,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xef,0xf0,0x90,0x9c,0x36,0xe0,
+0xff,0xee,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x95,0xf5,0x82,0x74,
+0x04,0x3c,0xf5,0x83,0xef,0xf0,0x90,0x9c,0x9f,0xe0,0xff,0xee,0x25,0xe0,0x24,0x69,
+0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x96,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xef,0xf0,
+0xee,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x97,0xf5,0x82,0x74,0x04,
+0x3e,0xf5,0x83,0xe5,0x68,0xf0,0x90,0x9c,0x2d,0xe0,0x04,0xf0,0xe0,0x64,0x02,0x60,
+0x03,0x02,0x5a,0xbe,0x90,0x9c,0x2e,0xe0,0x04,0xf0,0x02,0x5a,0x90,0x8f,0x19,0xa2,
+0xaf,0xe4,0x33,0x90,0x9c,0x42,0xf0,0xc2,0xaf,0x7e,0x5c,0x7f,0x6d,0xe4,0xfd,0x12,
+0x74,0x3c,0x90,0x9c,0x42,0xe0,0x24,0xff,0x92,0xaf,0xe5,0x19,0x25,0xe0,0x24,0x69,
+0xf8,0xe6,0xfe,0x08,0xe6,0x24,0xcc,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,0x54,
+0x0f,0xff,0x74,0x38,0x25,0x19,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xef,0xf0,0x74,
+0x38,0x25,0x19,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x70,0x03,0x02,0x5f,0xdd,
+0x90,0x9c,0x3a,0xe0,0x64,0x01,0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x9c,0x42,0xf0,0xc2,
+0xaf,0x7e,0x5c,0x7f,0x6d,0x90,0x9c,0x3a,0xe0,0xfd,0x12,0x74,0x3c,0x90,0x9c,0x42,
+0xe0,0x24,0xff,0x92,0xaf,0x74,0xa3,0x25,0x19,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,
+0xe0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,
+0xd8,0xf9,0xff,0x74,0x38,0x25,0x19,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xfd,
+0xef,0x5d,0x70,0x03,0x02,0x5f,0x68,0x74,0xa3,0x25,0x19,0xf5,0x82,0xe4,0x34,0x9c,
+0xf5,0x83,0xe0,0x75,0xf0,0x04,0xa4,0xff,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,
+0xfc,0x08,0xe6,0x2f,0xff,0xe5,0xf0,0x3c,0xfe,0x74,0xd0,0x2f,0xf5,0x82,0x74,0x01,
+0x3e,0xf5,0x83,0xe0,0x90,0x9c,0x3b,0xf0,0x75,0x1d,0x01,0x75,0x1e,0x9c,0x75,0x1f,
+0x3b,0x75,0x20,0x01,0x7b,0x01,0x7a,0x9c,0x79,0x3c,0x12,0x76,0xb4,0x90,0x9c,0x3c,
+0xe0,0xf9,0xc4,0x13,0x13,0x13,0x54,0x01,0x20,0xe0,0x03,0x02,0x5e,0x4e,0x74,0xa3,
+0x25,0x19,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x75,0xf0,0x02,0xa4,0xff,0xe5,
+0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0xfd,0x2f,0xff,0xe5,0xf0,0x3c,
+0xfe,0x74,0x88,0x2f,0xf5,0x82,0xe4,0x3e,0xf5,0x83,0xe0,0x90,0x9c,0x3d,0xf0,0x74,
+0xa3,0x25,0x19,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x75,0xf0,0x02,0xa4,0x2d,
+0xff,0xe5,0xf0,0x3c,0xfe,0x74,0x89,0x2f,0xf5,0x82,0xe4,0x3e,0xf5,0x83,0xe0,0x90,
+0x9c,0x3e,0xf0,0x74,0xa3,0x25,0x19,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x75,
+0xf0,0x04,0xa4,0xff,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0xfd,
+0x2f,0xff,0xe5,0xf0,0x3c,0xfe,0x74,0xd1,0x2f,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,
+0xe0,0x90,0x9c,0x3f,0xf0,0x74,0xa3,0x25,0x19,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,
+0xe0,0x75,0xf0,0x04,0xa4,0x2d,0xff,0xe5,0xf0,0x3c,0xfe,0x74,0xd2,0x2f,0xf5,0x82,
+0x74,0x01,0x3e,0xf5,0x83,0xe0,0x90,0x9c,0x40,0xf0,0x74,0xa3,0x25,0x19,0xf5,0x82,
+0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x75,0xf0,0x04,0xa4,0xff,0xe5,0x19,0x25,0xe0,0x24,
+0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x2f,0xff,0xe5,0xf0,0x3c,0xfe,0x74,0xd3,0x2f,0xf5,
+0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,0x90,0x9c,0x41,0xf0,0x02,0x5e,0xd6,0x74,0xa3,
+0x25,0x19,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x75,0xf0,0x04,0xa4,0xff,0xe5,
+0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0xfd,0x2f,0xff,0xe5,0xf0,0x3c,
+0xfe,0x74,0xd1,0x2f,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0xe0,0x90,0x9c,0x3d,0xf0,
+0x74,0xa3,0x25,0x19,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x75,0xf0,0x04,0xa4,
+0x2d,0xff,0xe5,0xf0,0x3c,0xfe,0x74,0xd2,0x2f,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,
+0xe0,0x90,0x9c,0x3e,0xf0,0x74,0xa3,0x25,0x19,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,
+0xe0,0x75,0xf0,0x04,0xa4,0xff,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,
+0xe6,0x2f,0xff,0xe5,0xf0,0x3c,0xfe,0x74,0xd3,0x2f,0xf5,0x82,0x74,0x01,0x3e,0xf5,
+0x83,0xe0,0x90,0x9c,0x3f,0xf0,0xe9,0x54,0x7f,0xff,0x7b,0x01,0x7a,0x9c,0x79,0x3d,
+0x90,0x9c,0x47,0xe5,0x19,0xf0,0x12,0x71,0x95,0x74,0x38,0x25,0x19,0xf5,0x82,0xe4,
+0x34,0x9c,0xf5,0x83,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x74,0xa3,0x25,0x19,0xf5,0x82,
+0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xfe,0x74,0x01,0xa8,0x06,0x08,0x80,0x02,0xc3,0x33,
+0xd8,0xfc,0xf4,0x5f,0xd0,0x82,0xd0,0x83,0xf0,0x74,0xa3,0x25,0x19,0xf5,0x82,0xe4,
+0x34,0x9c,0xf5,0x83,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,
+0xfc,0xff,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0xcc,0xf5,
+0x82,0x74,0x01,0x3c,0xf5,0x83,0xef,0xf0,0x74,0xa3,0x25,0x19,0xf5,0x82,0xe4,0x34,
+0x9c,0xf5,0x83,0xe0,0x04,0xf0,0x74,0xa3,0x25,0x19,0xf5,0x82,0xe4,0x34,0x9c,0xf5,
+0x83,0xe0,0x54,0x03,0xf0,0x02,0x5c,0xaf,0xc2,0xaf,0xa2,0xaf,0xe4,0x33,0x90,0x9c,
+0x42,0xf0,0xc2,0xaf,0x7e,0x5c,0x7f,0x6d,0x7d,0x02,0x12,0x74,0x3c,0x90,0x9c,0x42,
+0xe0,0x24,0xff,0x92,0xaf,0xe5,0x19,0xc4,0x54,0xf0,0xff,0x74,0x38,0x25,0x19,0xf5,
+0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x4f,0xfe,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,
+0xe6,0xfc,0x08,0xe6,0x24,0xc6,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xee,0xf0,0x74,
+0xa3,0x25,0x19,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x4f,0xff,0xe5,0x19,0x25,
+0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0xc7,0xf5,0x82,0x74,0x01,0x3c,0xf5,
+0x83,0xef,0xf0,0x90,0x06,0x30,0xe0,0xb4,0x56,0x90,0x02,0x5c,0xaf,0x22,0x8f,0x19,
+0x7e,0x5f,0x7f,0xde,0xe4,0xfd,0x12,0x74,0x3c,0xaf,0x19,0x12,0x42,0x80,0xe5,0x19,
+0x25,0xe0,0x25,0xe0,0x24,0x55,0xf8,0x76,0x33,0xe5,0x19,0x25,0xe0,0x25,0xe0,0x24,
+0x56,0xf8,0xe4,0xf6,0xe5,0x19,0x25,0xe0,0x25,0xe0,0x24,0x57,0xf8,0x76,0x02,0xe5,
+0x19,0x25,0xe0,0x25,0xe0,0x24,0x58,0xf8,0xe4,0xf6,0xe5,0x19,0x25,0xe0,0x25,0xe0,
+0x24,0x55,0xf8,0xe6,0xff,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,
+0x24,0x30,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xef,0xf0,0xe5,0x19,0x25,0xe0,0x25,
+0xe0,0x24,0x56,0xf8,0xe6,0xff,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,
+0xe6,0x24,0x31,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xef,0xf0,0xe5,0x19,0x25,0xe0,
+0x25,0xe0,0x24,0x57,0xf8,0xe6,0xff,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,
+0x08,0xe6,0x24,0x32,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xef,0xf0,0xe5,0x19,0x25,
+0xe0,0x25,0xe0,0x24,0x58,0xf8,0xe6,0xff,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,
+0xfc,0x08,0xe6,0x24,0x33,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xef,0xf0,0xe5,0x19,
+0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0xff,0x24,0xcf,0xf5,0x82,0x74,0x01,
+0x3e,0xf5,0x83,0xc0,0x83,0xc0,0x82,0xe0,0xfd,0x74,0xcf,0x2f,0xf5,0x82,0x74,0x01,
+0x3e,0xf5,0x83,0xe0,0xf4,0xff,0xed,0x5f,0xd0,0x82,0xd0,0x83,0xf0,0x90,0x00,0xf3,
+0xe0,0x30,0xe2,0x17,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,
+0x41,0xf5,0x82,0x74,0x05,0x3e,0xf5,0x83,0x74,0x10,0xf0,0xe5,0x19,0x25,0xe0,0x24,
+0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x64,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,
+0xa0,0xf0,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x50,0xfd,
+0xee,0x34,0x01,0xfc,0xe4,0xf5,0x14,0x75,0x15,0xff,0xf5,0x16,0x7b,0x01,0xaf,0x19,
+0x12,0x73,0x4f,0xe5,0x19,0x25,0xe0,0x25,0xe0,0x24,0x75,0xf5,0x82,0xe4,0x34,0x9c,
+0xf5,0x83,0x74,0x0f,0xf0,0xe5,0x19,0x25,0xe0,0x25,0xe0,0x24,0x76,0xf5,0x82,0xe4,
+0x34,0x9c,0xf5,0x83,0x74,0x01,0xf0,0xe5,0x19,0x25,0xe0,0x25,0xe0,0x24,0x77,0xf5,
+0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0xe5,0x19,0x25,0xe0,0x25,0xe0,0x24,0x75,
+0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xff,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,
+0xe6,0xfc,0x08,0xe6,0x24,0x38,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xef,0xf0,0xe5,
+0x19,0x25,0xe0,0x25,0xe0,0x24,0x76,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xff,
+0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x39,0xf5,0x82,0x74,
+0x01,0x3c,0xf5,0x83,0xef,0xf0,0xe5,0x19,0x25,0xe0,0x25,0xe0,0x24,0x77,0xf5,0x82,
+0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xff,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,
+0x08,0xe6,0x24,0x3a,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xef,0xf0,0xe5,0x19,0x70,
+0x1a,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x50,0xf5,0x82,
+0x74,0x02,0x3e,0xf5,0x83,0xe0,0x44,0x04,0xf0,0x80,0x18,0xe5,0x19,0x25,0xe0,0x24,
+0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x50,0xf5,0x82,0x74,0x02,0x3e,0xf5,0x83,0xe0,
+0x54,0xfb,0xf0,0x90,0x9c,0x38,0xe5,0xd9,0xf0,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,
+0xe6,0xfe,0x08,0xe6,0x24,0x3c,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0xff,0xf0,
+0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x3d,0xf5,0x82,0x74,
+0x01,0x3e,0xf5,0x83,0x74,0xff,0xf0,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,
+0x08,0xe6,0x24,0x3e,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0xff,0xf0,0xe5,0x19,
+0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x34,0xf5,0x82,0x74,0x01,0x3e,
+0xf5,0x83,0x74,0xff,0xf0,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,
+0x24,0x35,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0xff,0xf0,0xe5,0x19,0x25,0xe0,
+0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x36,0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,
+0x74,0xff,0xf0,0xe5,0x19,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x24,0x37,
+0xf5,0x82,0x74,0x01,0x3e,0xf5,0x83,0x74,0xff,0xf0,0x74,0x9e,0x25,0x19,0xf5,0x82,
+0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x74,0xa3,0x25,0x19,0xf5,0x82,0xe4,0x34,0x9c,
+0xf5,0x83,0xe4,0xf0,0x74,0x67,0x25,0x19,0xf8,0xe4,0xf6,0x74,0x65,0x25,0x19,0xf8,
+0x76,0x01,0xe5,0x19,0x70,0x11,0x90,0x00,0x18,0xe0,0x44,0x01,0x12,0x7a,0x9e,0x43,
+0xe8,0x03,0x43,0xa8,0x05,0x80,0x0c,0x90,0x00,0x1a,0xe0,0x44,0x01,0x12,0x7a,0x9e,
+0x43,0xe8,0x0c,0x7e,0x5f,0x7f,0xde,0x7d,0x01,0x02,0x74,0x3c,0x8f,0x24,0xa2,0xaf,
+0xe4,0x33,0x90,0x9c,0x5c,0xf0,0xc2,0xaf,0x7e,0x62,0x7f,0xfc,0xe4,0xfd,0x12,0x74,
+0x3c,0x90,0x9c,0x5c,0xe0,0x24,0xff,0x92,0xaf,0xe5,0x24,0xc4,0x13,0x54,0x07,0xff,
+0x90,0x9c,0x5a,0xf0,0xe5,0x24,0x54,0x1f,0xfe,0xa3,0xf0,0xef,0x25,0xe0,0x24,0x69,
+0xf8,0xe6,0xfc,0x08,0xe6,0xfd,0xee,0x2d,0xff,0xe4,0x3c,0xfe,0x74,0x84,0x2f,0xf5,
+0x82,0x74,0x04,0x3e,0xf5,0x83,0xe0,0x54,0x7f,0x90,0x9c,0x52,0xf0,0xe0,0x54,0x1f,
+0xff,0xa3,0xf0,0x75,0xf0,0x08,0xe5,0x24,0xa4,0x24,0xe9,0xf5,0x82,0xe5,0xf0,0x34,
+0x95,0xf5,0x83,0xe0,0xfe,0x90,0x9c,0x55,0xf0,0xe5,0x24,0x25,0xe0,0x24,0x22,0xf5,
+0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xfd,0xa3,0xe0,0x90,0x9c,0x56,0xcd,0xf0,0xa3,
+0xed,0xf0,0xe5,0x24,0x25,0xe0,0x24,0xe7,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,
+0xfd,0xa3,0xe0,0x90,0x9c,0x58,0xcd,0xf0,0xa3,0xed,0xf0,0xef,0xc3,0x9e,0x40,0x03,
+0x02,0x64,0x6b,0xa2,0xaf,0xe4,0x33,0x90,0x9c,0x5c,0xf0,0xc2,0xaf,0x7e,0x62,0x7f,
+0xfc,0x7d,0x01,0x12,0x74,0x3c,0x90,0x9c,0x5c,0xe0,0x24,0xff,0x92,0xaf,0x90,0x9c,
+0x53,0xe0,0xff,0x74,0xe7,0x25,0x24,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xef,0xf0,
+0xef,0x04,0x90,0x9c,0x54,0xf0,0x90,0x9c,0x55,0xe0,0xff,0x90,0x9c,0x54,0xe0,0xfe,
+0xd3,0x9f,0x40,0x03,0x02,0x64,0xca,0xee,0xc3,0x94,0x10,0x40,0x21,0xee,0x24,0xf0,
+0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,
+0xf9,0xff,0x90,0x9c,0x56,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x70,0x27,0x90,0x9c,
+0x54,0xe0,0xff,0xc3,0x94,0x10,0x50,0x4a,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,
+0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9c,0x58,0xe0,0x5e,0xfe,0xa3,
+0xe0,0x5f,0x4e,0x60,0x2d,0x90,0x9c,0x54,0xe0,0xff,0x64,0x13,0x60,0x09,0xef,0x64,
+0x12,0x60,0x04,0xef,0xb4,0x11,0x0d,0x90,0x9c,0x56,0xe0,0x30,0xe0,0x06,0x90,0x9c,
+0x54,0x74,0x18,0xf0,0x90,0x9c,0x54,0xe0,0x90,0x9c,0x53,0xf0,0x90,0x9c,0x52,0xf0,
+0x80,0x68,0x90,0x9c,0x54,0xe0,0x04,0xf0,0x02,0x63,0xd6,0x90,0x9c,0x55,0xe0,0xff,
+0x90,0x9c,0x53,0xe0,0x6f,0x60,0x03,0x02,0x65,0x13,0xa2,0xaf,0x33,0x90,0x9c,0x5c,
+0xf0,0xc2,0xaf,0x7e,0x62,0x7f,0xfc,0x7d,0x02,0x12,0x74,0x3c,0x90,0x9c,0x5c,0xe0,
+0x24,0xff,0x92,0xaf,0x90,0x9c,0x53,0xe0,0xfe,0x74,0xe7,0x25,0x24,0xf5,0x82,0xe4,
+0x34,0x9b,0xf5,0x83,0xee,0xf0,0x75,0xf0,0x08,0xe5,0x24,0xa4,0x24,0xeb,0xf5,0x82,
+0xe5,0xf0,0x34,0x95,0xf5,0x83,0xe0,0xb4,0x01,0x10,0x90,0x9c,0x52,0xe0,0xff,0x30,
+0xe6,0x01,0x22,0xee,0x44,0x40,0x90,0x9c,0x52,0xf0,0x90,0x9c,0x53,0xe0,0xff,0x25,
+0xe0,0x24,0xae,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfc,0x74,0x01,0x93,
+0xfd,0xef,0x25,0xe0,0x24,0x76,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,
+0x2d,0xff,0xe4,0x93,0x3c,0xc3,0x13,0xfe,0xef,0x13,0xff,0xe4,0xfc,0xfd,0xe5,0x24,
+0x25,0xe0,0x25,0xe0,0x24,0xe2,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0x12,0x6f,0x7c,
+0x02,0x65,0x9e,0x90,0x9c,0x55,0xe0,0xff,0x90,0x9c,0x53,0xe0,0xd3,0x9f,0x40,0x7e,
+0xa2,0xaf,0xe4,0x33,0x90,0x9c,0x5c,0xf0,0xc2,0xaf,0x7e,0x62,0x7f,0xfc,0x7d,0x03,
+0x12,0x74,0x3c,0x90,0x9c,0x5c,0xe0,0x24,0xff,0x92,0xaf,0x90,0x9c,0x55,0xe0,0xff,
+0x74,0xe7,0x25,0x24,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xef,0xf0,0x90,0x9c,0x53,
+0xef,0xf0,0x90,0x9c,0x52,0xf0,0xfb,0xa3,0xe0,0xff,0x25,0xe0,0x24,0xae,0xf5,0x82,
+0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfc,0x74,0x01,0x93,0xfd,0xef,0x25,0xe0,0x24,
+0x76,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2d,0xff,0xe4,0x93,0x3c,
+0xc3,0x13,0xfe,0xef,0x13,0xff,0xe4,0xfc,0xfd,0xe5,0x24,0x25,0xe0,0x25,0xe0,0x24,
+0xe2,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0x12,0x6f,0x7c,0xaf,0x03,0x22,0x74,0x80,
+0x25,0x24,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4,0xf0,0x90,0x9c,0x52,0xe0,0x44,
+0x80,0xff,0x90,0x9c,0x5a,0xe0,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0xfd,
+0xa3,0xe0,0x2d,0xfd,0xe4,0x3c,0xfc,0x74,0x84,0x2d,0xf5,0x82,0x74,0x04,0x3c,0xf5,
+0x83,0xef,0xf0,0x22,0x8c,0x26,0x8d,0x27,0xef,0x24,0xfd,0x70,0x03,0x02,0x66,0xda,
+0x14,0x70,0x03,0x02,0x67,0x32,0x14,0x70,0x03,0x02,0x67,0x8f,0x14,0x70,0x03,0x02,
+0x67,0xe7,0x14,0x70,0x03,0x02,0x68,0x3e,0x24,0x05,0x60,0x03,0x02,0x68,0x5e,0x53,
+0x26,0x03,0x90,0x9c,0x60,0xe0,0xd3,0x94,0x40,0x40,0x03,0x74,0x40,0xf0,0xa2,0xaf,
+0xe4,0x33,0x90,0x9c,0x66,0xf0,0xc2,0xaf,0x90,0x9c,0x61,0xe5,0x26,0xf0,0xa3,0xe5,
+0x27,0xf0,0x90,0x9c,0x60,0xe0,0x7e,0x00,0x25,0x27,0xff,0xee,0x35,0x26,0xfe,0xa3,
+0xe0,0xfc,0xa3,0xe0,0xfd,0xc3,0x9f,0xec,0x9e,0x40,0x03,0x02,0x66,0xd1,0xe4,0xa3,
+0xf0,0xa3,0xf0,0x90,0x00,0x31,0xed,0xf0,0x7f,0x02,0x7e,0x00,0x12,0x7a,0xa3,0x90,
+0x9c,0x61,0xe0,0x44,0x20,0x90,0x00,0x32,0xf0,0x7f,0x02,0x7e,0x00,0x12,0x7a,0xa3,
+0x90,0x00,0x33,0xe4,0xf0,0x7f,0x02,0xfe,0x12,0x7a,0xa3,0x90,0x00,0x33,0xe0,0x20,
+0xe7,0x1a,0x90,0x9c,0x64,0xe0,0x04,0xf0,0x70,0x06,0x90,0x9c,0x63,0xe0,0x04,0xf0,
+0x90,0x9c,0x63,0xe0,0xb4,0xff,0xe4,0xa3,0xe0,0xb4,0xff,0xdf,0x90,0x9c,0x63,0xe0,
+0xb4,0xff,0x0b,0xa3,0xe0,0xb4,0xff,0x06,0xa3,0x74,0xea,0xf0,0x80,0x08,0x90,0x00,
+0x30,0xe0,0x90,0x9c,0x65,0xf0,0x90,0x9c,0x65,0xe0,0x90,0xfe,0x28,0xf0,0xd3,0x90,
+0x9c,0x62,0xe0,0x94,0x3f,0x90,0x9c,0x61,0xe0,0x94,0x04,0x50,0x14,0x90,0x9c,0x62,
+0xe0,0x04,0xf0,0x60,0x03,0x02,0x66,0x22,0x90,0x9c,0x61,0xe0,0x04,0xf0,0x02,0x66,
+0x22,0x90,0x9c,0x66,0xe0,0x24,0xff,0x92,0xaf,0x22,0x90,0xfe,0x20,0xe4,0xf0,0x90,
+0xfe,0x22,0xf0,0x90,0x9c,0x61,0xe5,0x26,0xf0,0xa3,0xe5,0x27,0xf0,0x90,0x9c,0x60,
+0xe0,0x7e,0x00,0x25,0x27,0xff,0xee,0x35,0x26,0xfe,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,
+0xc3,0x9f,0xec,0x9e,0x40,0x03,0x02,0x68,0x5e,0xed,0x94,0xff,0xec,0x94,0x3f,0x40,
+0x03,0x02,0x68,0x5e,0xe4,0xff,0x12,0x78,0xec,0x90,0x9c,0x65,0xef,0xf0,0x90,0xfe,
+0x28,0xf0,0x90,0x9c,0x62,0xe0,0x04,0xf0,0x70,0xc3,0x90,0x9c,0x61,0xe0,0x04,0xf0,
+0x80,0xbb,0x90,0xfe,0x20,0xe4,0xf0,0x90,0xfe,0x22,0xf0,0x90,0x9c,0x61,0xe5,0x26,
+0xf0,0xa3,0xe5,0x27,0xf0,0x90,0x9c,0x60,0xe0,0x7e,0x00,0x25,0x27,0xff,0xee,0x35,
+0x26,0xfe,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xc3,0x9f,0xec,0x9e,0x40,0x03,0x02,0x68,
+0x5e,0xe4,0xff,0x12,0x79,0x2a,0x90,0x9c,0x65,0xef,0xf0,0x90,0xfe,0x28,0xf0,0x90,
+0x9c,0x61,0xe0,0x64,0x13,0x70,0x03,0xa3,0xe0,0xf4,0x70,0x03,0x02,0x68,0x5e,0x90,
+0x9c,0x62,0xe0,0x04,0xf0,0x70,0xbe,0x90,0x9c,0x61,0xe0,0x04,0xf0,0x80,0xb6,0x90,
+0xfe,0x20,0xe4,0xf0,0x90,0xfe,0x22,0xf0,0x90,0x9c,0x61,0xe5,0x26,0xf0,0xa3,0xe5,
+0x27,0xf0,0x90,0x9c,0x60,0xe0,0x7e,0x00,0x25,0x27,0xff,0xee,0x35,0x26,0xfe,0xa3,
+0xe0,0xfc,0xa3,0xe0,0xfd,0xc3,0x9f,0xec,0x9e,0x40,0x03,0x02,0x68,0x5e,0xed,0x94,
+0xff,0xec,0x94,0x3f,0x40,0x03,0x02,0x68,0x5e,0x7f,0x01,0x12,0x78,0xec,0x90,0x9c,
+0x65,0xef,0xf0,0x90,0xfe,0x28,0xf0,0x90,0x9c,0x62,0xe0,0x04,0xf0,0x70,0xc3,0x90,
+0x9c,0x61,0xe0,0x04,0xf0,0x80,0xbb,0x90,0xfe,0x20,0xe4,0xf0,0x90,0xfe,0x22,0xf0,
+0x90,0x9c,0x61,0xe5,0x26,0xf0,0xa3,0xe5,0x27,0xf0,0x90,0x9c,0x60,0xe0,0x7e,0x00,
+0x25,0x27,0xff,0xee,0x35,0x26,0xfe,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xc3,0x9f,0xec,
+0x9e,0x50,0x4b,0x7f,0x01,0x12,0x79,0x2a,0x90,0x9c,0x65,0xef,0xf0,0x90,0xfe,0x28,
+0xf0,0x90,0x9c,0x61,0xe0,0x64,0x13,0x70,0x03,0xa3,0xe0,0xf4,0x60,0x30,0x90,0x9c,
+0x62,0xe0,0x04,0xf0,0x70,0xc4,0x90,0x9c,0x61,0xe0,0x04,0xf0,0x80,0xbc,0x90,0xfe,
+0x20,0xe4,0xf0,0x90,0xfe,0x22,0xf0,0x90,0xfe,0x40,0xe5,0x27,0xf0,0x90,0xfe,0x42,
+0x74,0x81,0xf0,0xa3,0xe0,0x90,0x9c,0x65,0xf0,0xe0,0x90,0xfe,0x28,0xf0,0x22,0xc0,
+0xd0,0x75,0xd0,0x08,0xef,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x3c,
+0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xe0,0xfe,0xef,0x25,0xe0,0x25,0xe0,0x24,0x75,
+0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xfd,0xee,0x5d,0xfe,0xef,0x25,0xe0,0x25,
+0xe0,0x24,0x7e,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xee,0xf0,0xef,0x25,0xe0,0x24,
+0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x3d,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xe0,
+0xfe,0xef,0x25,0xe0,0x25,0xe0,0x24,0x76,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,
+0xfd,0xee,0x5d,0xfe,0xef,0x25,0xe0,0x25,0xe0,0x24,0x7f,0xf5,0x82,0xe4,0x34,0x9c,
+0xf5,0x83,0xee,0xf0,0xef,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x3e,
+0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xe0,0xfe,0xef,0x25,0xe0,0x25,0xe0,0x24,0x77,
+0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xfd,0xee,0x5d,0xfe,0xef,0x25,0xe0,0x25,
+0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xee,0xf0,0xef,0x25,0xe0,0x25,
+0xe0,0x24,0x7e,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x30,0xe0,0x34,0xef,0x25,
+0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x3c,0xf5,0x82,0x74,0x01,0x3c,0xf5,
+0x83,0x74,0x01,0xf0,0xef,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x53,
+0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0x74,0x07,0xf0,0x74,0x67,0x2f,0xf8,0xe6,0x44,
+0x80,0xf6,0xef,0x25,0xe0,0x25,0xe0,0x24,0x7e,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,
+0xe0,0x30,0xe1,0x16,0xef,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x3c,
+0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0x74,0x02,0xf0,0xef,0x70,0x03,0x02,0x6a,0x89,
+0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x3c,0xf5,0x82,0x74,0x01,0x3c,
+0xf5,0x83,0xe0,0xfe,0xef,0x25,0xe0,0x25,0xe0,0x24,0x75,0xf5,0x82,0xe4,0x34,0x9c,
+0xf5,0x83,0xe0,0xfd,0xee,0x5d,0xfe,0xef,0x25,0xe0,0x25,0xe0,0x24,0x7e,0xf5,0x82,
+0xe4,0x34,0x9c,0xf5,0x83,0xee,0xf0,0xef,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,
+0xe6,0x24,0x3d,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xe0,0xfe,0xef,0x25,0xe0,0x25,
+0xe0,0x24,0x76,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xfd,0xee,0x5d,0xfe,0xef,
+0x25,0xe0,0x25,0xe0,0x24,0x7f,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xee,0xf0,0xef,
+0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x3e,0xf5,0x82,0x74,0x01,0x3c,
+0xf5,0x83,0xe0,0xfe,0xef,0x25,0xe0,0x25,0xe0,0x24,0x77,0xf5,0x82,0xe4,0x34,0x9c,
+0xf5,0x83,0xe0,0xfd,0xee,0x5d,0xfe,0xef,0x25,0xe0,0x25,0xe0,0x24,0x80,0xf5,0x82,
+0xe4,0x34,0x9c,0xf5,0x83,0xee,0xf0,0xef,0x25,0xe0,0x25,0xe0,0x24,0x7e,0xf5,0x82,
+0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x70,0x22,0xef,0x25,0xe0,0x25,0xe0,0x24,0x7f,0xf5,
+0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x70,0x11,0xef,0x25,0xe0,0x25,0xe0,0x24,0x80,
+0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x60,0x2f,0xef,0x25,0xe0,0x24,0x69,0xf8,
+0xe6,0xfc,0x08,0xe6,0x24,0xb3,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xe0,0xfe,0x04,
+0xf0,0xef,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0xb3,0xf5,0x82,0x74,
+0x04,0x3c,0xf5,0x83,0xee,0xf0,0x02,0x68,0x64,0xd0,0xd0,0x22,0x8f,0x24,0x8d,0x25,
+0xa2,0xaf,0xe4,0x33,0x90,0x9c,0x5f,0xf0,0xc2,0xaf,0x7e,0x6a,0x7f,0x8c,0xe4,0xfd,
+0x12,0x74,0x3c,0x90,0x9c,0x5f,0xe0,0x24,0xff,0x92,0xaf,0xe5,0x24,0xc4,0x13,0x54,
+0x07,0xff,0x90,0x9c,0x5d,0xf0,0xe5,0x24,0x54,0x1f,0xfe,0xa3,0xf0,0xef,0x25,0xe0,
+0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0xfd,0xee,0x2d,0xff,0xe4,0x3c,0xfe,0x74,0x84,
+0x2f,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,0xe0,0x54,0x7f,0x90,0x9c,0x52,0xf0,0xe0,
+0x54,0x1f,0xff,0x90,0x9c,0x55,0xf0,0x75,0xf0,0x08,0xe5,0x24,0xa4,0x24,0xea,0xf5,
+0x82,0xe5,0xf0,0x34,0x95,0xf5,0x83,0xe0,0x90,0x9c,0x57,0xf0,0x75,0xf0,0x08,0xe5,
+0x24,0xa4,0x24,0xe9,0xf5,0x82,0xe5,0xf0,0x34,0x95,0xf5,0x83,0xe0,0xfe,0x90,0x9c,
+0x58,0xf0,0xe5,0x24,0x25,0xe0,0x24,0xe7,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,
+0xfd,0xa3,0xe0,0x90,0x9c,0x59,0xcd,0xf0,0xa3,0xed,0xf0,0xe5,0x24,0x25,0xe0,0x24,
+0x22,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xfd,0xa3,0xe0,0x90,0x9c,0x5b,0xcd,
+0xf0,0xa3,0xed,0xf0,0xef,0xd3,0x9e,0x40,0x0c,0x90,0x9c,0x58,0xe0,0x90,0x9c,0x55,
+0xf0,0x90,0x9c,0x52,0xf0,0xe5,0x25,0x70,0x03,0x02,0x6c,0x31,0x90,0x9c,0x56,0xe5,
+0x25,0xf0,0x90,0x9c,0x52,0xe0,0x30,0xe6,0x0e,0x90,0x9c,0x55,0xe0,0x90,0x9c,0x52,
+0xf0,0x90,0x9c,0x56,0xe0,0x14,0xf0,0x90,0x9c,0x56,0xe0,0x70,0x03,0x02,0x6c,0x31,
+0x90,0x9c,0x55,0xe0,0xff,0xd3,0x94,0x00,0x50,0x03,0x02,0x6c,0x31,0xe4,0x90,0x9c,
+0x54,0xf0,0xef,0x14,0x90,0x9c,0x53,0xf0,0x90,0x9c,0x57,0xe0,0xfd,0x90,0x9c,0x53,
+0xe0,0xff,0xd3,0x9d,0x40,0x6f,0xef,0x94,0x10,0x40,0x21,0xef,0x24,0xf0,0xff,0x74,
+0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,
+0x90,0x9c,0x5b,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x70,0x27,0x90,0x9c,0x53,0xe0,
+0xff,0xc3,0x94,0x10,0x50,0x37,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,
+0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9c,0x59,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,
+0x4e,0x60,0x1a,0x90,0x9c,0x53,0xe0,0x90,0x9c,0x52,0xf0,0x90,0x9c,0x54,0xe0,0x04,
+0xf0,0x90,0x9c,0x56,0xe0,0xff,0x90,0x9c,0x54,0xe0,0x6f,0x60,0x08,0x90,0x9c,0x53,
+0xe0,0x14,0xf0,0x80,0x83,0x90,0x9c,0x56,0xe0,0xff,0x90,0x9c,0x54,0xe0,0xc3,0x9f,
+0x50,0x0f,0x90,0x9c,0x53,0xe0,0xb5,0x05,0x08,0x90,0x9c,0x57,0xe0,0x90,0x9c,0x52,
+0xf0,0x90,0x9c,0x52,0xe0,0xff,0x25,0xe0,0x24,0xae,0xf5,0x82,0xe4,0x34,0x41,0xf5,
+0x83,0xe4,0x93,0xfc,0x74,0x01,0x93,0xfd,0xef,0x25,0xe0,0x24,0x76,0xf5,0x82,0xe4,
+0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2d,0xff,0xe4,0x93,0x3c,0xc3,0x13,0xfe,0xef,
+0x13,0xff,0xe4,0xfc,0xfd,0xe5,0x24,0x25,0xe0,0x25,0xe0,0x24,0xe2,0xf5,0x82,0xe4,
+0x34,0x94,0xf5,0x83,0x12,0x6f,0x7c,0x90,0x9c,0x52,0xe0,0xff,0x90,0x9c,0x5d,0xe0,
+0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0xfd,0xa3,0xe0,0x2d,0xfd,0xe4,0x3c,
+0xfc,0x74,0x84,0x2d,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xef,0xf0,0x22,0x8c,0x2a,
+0x8d,0x2b,0xef,0x24,0xfc,0x60,0x71,0x14,0x70,0x03,0x02,0x6d,0x70,0x14,0x70,0x03,
+0x02,0x6d,0xc8,0x14,0x70,0x03,0x02,0x6e,0x1a,0x24,0x04,0x60,0x03,0x02,0x6e,0x2e,
+0xe4,0x90,0x9c,0x6a,0xf0,0xa3,0xf0,0x90,0x9c,0x69,0xe0,0xff,0xa3,0xe0,0xfc,0xa3,
+0xe0,0xfd,0xc3,0x9f,0xec,0x94,0x00,0x40,0x03,0x02,0x6e,0x2e,0xe5,0x2b,0x2d,0xfd,
+0xe5,0x2a,0x3c,0xfc,0xd3,0xed,0x94,0xff,0xec,0x94,0x3f,0x40,0x03,0x02,0x6e,0x2e,
+0x90,0xfe,0x29,0xe0,0xd3,0x94,0x00,0x40,0xce,0x90,0xfe,0x28,0xe0,0x90,0x9c,0x6c,
+0xf0,0xe0,0xfb,0xe4,0xff,0x12,0x79,0xdb,0x90,0x9c,0x6b,0xe0,0x04,0xf0,0x70,0xb7,
+0x90,0x9c,0x6a,0xe0,0x04,0xf0,0x80,0xaf,0xe4,0x90,0x9c,0x6a,0xf0,0xa3,0xf0,0x90,
+0x9c,0x69,0xe0,0xff,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xc3,0x9f,0xec,0x94,0x00,0x40,
+0x03,0x02,0x6e,0x2e,0xe5,0x2b,0x2d,0xfd,0xe5,0x2a,0x3c,0xfc,0xd3,0xed,0x94,0xff,
+0xec,0x94,0x13,0x40,0x03,0x02,0x6e,0x2e,0x90,0xfe,0x29,0xe0,0xd3,0x94,0x00,0x40,
+0xce,0x90,0xfe,0x28,0xe0,0x90,0x9c,0x6c,0xf0,0xe0,0xfb,0xe4,0xff,0x12,0x7a,0x13,
+0x90,0x9c,0x6b,0xe0,0x04,0xf0,0x70,0xb7,0x90,0x9c,0x6a,0xe0,0x04,0xf0,0x80,0xaf,
+0xe4,0x90,0x9c,0x6a,0xf0,0xa3,0xf0,0x90,0x9c,0x69,0xe0,0xff,0xa3,0xe0,0xfc,0xa3,
+0xe0,0xfd,0xc3,0x9f,0xec,0x94,0x00,0x40,0x03,0x02,0x6e,0x2e,0xe5,0x2b,0x2d,0xfd,
+0xe5,0x2a,0x3c,0xfc,0xd3,0xed,0x94,0xff,0xec,0x94,0x3f,0x40,0x03,0x02,0x6e,0x2e,
+0x90,0xfe,0x29,0xe0,0xd3,0x94,0x00,0x40,0xce,0x90,0xfe,0x28,0xe0,0x90,0x9c,0x6c,
+0xf0,0xe0,0xfb,0x7f,0x01,0x12,0x79,0xdb,0x90,0x9c,0x6b,0xe0,0x04,0xf0,0x70,0xb7,
+0x90,0x9c,0x6a,0xe0,0x04,0xf0,0x80,0xaf,0xe4,0x90,0x9c,0x6a,0xf0,0xa3,0xf0,0x90,
+0x9c,0x69,0xe0,0xff,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xc3,0x9f,0xec,0x94,0x00,0x50,
+0x4d,0xe5,0x2b,0x2d,0xfd,0xe5,0x2a,0x3c,0xfc,0xd3,0xed,0x94,0xff,0xec,0x94,0x13,
+0x50,0x3c,0x90,0xfe,0x29,0xe0,0xd3,0x94,0x00,0x40,0xd4,0x90,0xfe,0x28,0xe0,0x90,
+0x9c,0x6c,0xf0,0xe0,0xfb,0x7f,0x01,0x12,0x7a,0x13,0x90,0x9c,0x6b,0xe0,0x04,0xf0,
+0x70,0xbd,0x90,0x9c,0x6a,0xe0,0x04,0xf0,0x80,0xb5,0x90,0xfe,0x28,0xe0,0x90,0xfe,
+0x41,0xf0,0x90,0xfe,0x40,0xe5,0x2b,0xf0,0x90,0xfe,0x42,0x74,0x81,0xf0,0x22,0xbb,
+0x01,0x0c,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0x22,0x50,0x06,
+0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,0x25,0x82,0xf8,0xe2,0x22,0xe5,
+0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe4,0x93,0x22,0xbb,0x01,0x06,0x89,
+0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8,0xbb,
+0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22,0x50,
+0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2,0x22,
+0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0,0xc5,0xf0,0xf8,0xe5,0x82,0x15,0x82,0x70,0x02,
+0x15,0x83,0xe0,0x38,0xf0,0x22,0xa3,0xf8,0xe0,0xc5,0xf0,0x25,0xf0,0xf0,0xe5,0x82,
+0x15,0x82,0x70,0x02,0x15,0x83,0xe0,0xc8,0x38,0xf0,0xe8,0x22,0xbb,0x01,0x0a,0x89,
+0x82,0x8a,0x83,0xe0,0xf5,0xf0,0xa3,0xe0,0x22,0x50,0x06,0x87,0xf0,0x09,0xe7,0x19,
+0x22,0xbb,0xfe,0x07,0xe3,0xf5,0xf0,0x09,0xe3,0x19,0x22,0x89,0x82,0x8a,0x83,0xe4,
+0x93,0xf5,0xf0,0x74,0x01,0x93,0x22,0xbb,0x01,0x10,0xe5,0x82,0x29,0xf5,0x82,0xe5,
+0x83,0x3a,0xf5,0x83,0xe0,0xf5,0xf0,0xa3,0xe0,0x22,0x50,0x09,0xe9,0x25,0x82,0xf8,
+0x86,0xf0,0x08,0xe6,0x22,0xbb,0xfe,0x0a,0xe9,0x25,0x82,0xf8,0xe2,0xf5,0xf0,0x08,
+0xe2,0x22,0xe5,0x83,0x2a,0xf5,0x83,0xe9,0x93,0xf5,0xf0,0xa3,0xe9,0x93,0x22,0xbb,
+0x01,0x0a,0x89,0x82,0x8a,0x83,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x06,0xf7,0x09,
+0xa7,0xf0,0x19,0x22,0xbb,0xfe,0x06,0xf3,0xe5,0xf0,0x09,0xf3,0x19,0x22,0xf8,0xbb,
+0x01,0x11,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0xe5,0xf0,
+0xa3,0xf0,0x22,0x50,0x09,0xe9,0x25,0x82,0xc8,0xf6,0x08,0xa6,0xf0,0x22,0xbb,0xfe,
+0x09,0xe9,0x25,0x82,0xc8,0xf2,0xe5,0xf0,0x08,0xf2,0x22,0xeb,0x9f,0xf5,0xf0,0xea,
+0x9e,0x42,0xf0,0xe9,0x9d,0x42,0xf0,0xe8,0x9c,0x45,0xf0,0x22,0xec,0xf0,0xa3,0xed,
+0xf0,0xa3,0xee,0xf0,0xa3,0xef,0xf0,0x22,0xa4,0x25,0x82,0xf5,0x82,0xe5,0xf0,0x35,
+0x83,0xf5,0x83,0x22,0x90,0x9c,0x49,0xef,0xf0,0xa3,0xeb,0xf0,0xa3,0xea,0xf0,0xa3,
+0xe9,0xf0,0x90,0x9c,0x4a,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x90,0x00,0x04,
+0x12,0x6e,0x2f,0xff,0x54,0x1f,0xfe,0x90,0x9c,0x49,0xe0,0xc4,0x33,0x54,0xe0,0x2e,
+0x90,0x9c,0x4d,0xf0,0x90,0x00,0x03,0x12,0x6e,0x2f,0x54,0xf0,0xc4,0x54,0x0f,0x90,
+0x9c,0x4e,0xf0,0xef,0x54,0x20,0xc4,0x13,0x54,0x07,0xa3,0xf0,0x90,0x9c,0x4d,0xe0,
+0xff,0x75,0xf0,0x08,0xa4,0x24,0xe7,0xf5,0x82,0xe5,0xf0,0x34,0x95,0xad,0x82,0x90,
+0x9c,0x50,0xf0,0xa3,0xed,0xf0,0xef,0x75,0xf0,0x08,0xa4,0x24,0xe5,0xf9,0x74,0x95,
+0x35,0xf0,0xfa,0xa3,0x74,0x01,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,0xf0,0x90,0x9c,0x4a,
+0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x90,0x00,0x03,0x12,0x6e,0x2f,0x54,0x0f,0xff,0x90,
+0x9c,0x52,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0xef,0x12,0x6e,0x5c,0x90,0x9c,
+0x4a,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x90,0x00,0x02,0x12,0x6e,0x2f,0xff,
+0x90,0x9c,0x52,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x90,0x00,0x01,0xef,0x12,
+0x6e,0x6e,0x90,0x9c,0x4a,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x90,0x00,0x01,
+0x12,0x6e,0x2f,0xff,0x90,0x9c,0x50,0xe0,0xfc,0xa3,0xe0,0xfd,0xf5,0x82,0x8c,0x83,
+0xef,0xf0,0x12,0x2f,0xc0,0x8d,0x82,0x8c,0x83,0xa3,0xf0,0x90,0x9c,0x4e,0xe0,0xfe,
+0x90,0x9c,0x4d,0xe0,0xff,0x24,0xa2,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xee,0xf0,
+0x90,0x9c,0x4f,0xe0,0xfe,0x75,0xf0,0x08,0xef,0xa4,0x24,0xeb,0xf5,0x82,0xe5,0xf0,
+0x34,0x95,0xf5,0x83,0xee,0xf0,0x75,0xf0,0x08,0xef,0xa4,0x24,0xec,0xf5,0x82,0xe5,
+0xf0,0x34,0x95,0xf5,0x83,0x74,0x01,0xf0,0x90,0x9c,0x49,0xe0,0xfd,0x02,0x52,0x5d,
+0x90,0x9c,0xaf,0xeb,0xf0,0xa9,0x07,0x90,0x9c,0xae,0xed,0xf0,0xe4,0xff,0xfe,0xed,
+0x30,0xe0,0x02,0x7f,0x80,0xe9,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0xfd,
+0x24,0x1d,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xe0,0x60,0x46,0x74,0x22,0x2d,0xf5,
+0x82,0x74,0x05,0x3c,0xf5,0x83,0xe0,0x90,0x9c,0xb0,0xf0,0xe0,0xfd,0x54,0x90,0x60,
+0xd4,0xe9,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfa,0x08,0xe6,0x24,0xc8,0xf5,0x82,0x74,
+0x01,0x3a,0xf5,0x83,0x74,0xfc,0xf0,0xed,0x54,0x6f,0xfd,0xe9,0x25,0xe0,0x24,0x69,
+0xf8,0xe6,0xfa,0x08,0xe6,0x24,0x22,0xf5,0x82,0x74,0x05,0x3a,0xf5,0x83,0xed,0xf0,
+0x80,0xa3,0x90,0x9c,0xae,0xe0,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x90,0x9c,0xae,0xe0,
+0xfd,0xe9,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfa,0x08,0xe6,0x24,0x25,0xf5,0x82,0x74,
+0x04,0x3a,0xf5,0x83,0xed,0xf0,0x90,0x9c,0xaf,0xe0,0x60,0x0e,0x74,0x10,0x2f,0xf5,
+0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0xad,0x07,0x74,0x08,0x2d,0xf5,
+0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe4,0xf0,0x74,0x09,0x2d,0xf5,0x82,0xe4,0x34,0xfc,
+0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,
+0xe0,0x54,0xf7,0xf0,0x22,0x90,0x9c,0x43,0xef,0xf0,0xa3,0xeb,0xf0,0xa3,0xea,0xf0,
+0xa3,0xe9,0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x9c,0x48,0xf0,0xc2,0xaf,0x7e,0x71,0x7f,
+0x95,0xe4,0xfd,0x12,0x74,0x3c,0x90,0x9c,0x48,0xe0,0x24,0xff,0x92,0xaf,0x90,0x9c,
+0x43,0xe0,0x24,0xfb,0x60,0x1d,0x14,0x60,0x2d,0x14,0x60,0x3d,0x24,0x04,0x70,0x4c,
+0x90,0x9c,0x47,0xe0,0xff,0x90,0x9c,0x44,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,
+0x02,0x74,0x9e,0x90,0x9c,0x47,0xe0,0xff,0x90,0x9c,0x44,0xe0,0xfb,0xa3,0xe0,0xfa,
+0xa3,0xe0,0xf9,0x02,0x78,0xa2,0x90,0x9c,0x47,0xe0,0xff,0x90,0x9c,0x44,0xe0,0xfb,
+0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x02,0x6f,0x94,0x90,0x9c,0x47,0xe0,0xff,0x90,0x9c,
+0x44,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x02,0x7a,0xbd,0x90,0x9c,0x43,0xe0,
+0xff,0x90,0x9c,0x47,0xe0,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0xc3,
+0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xef,0xf0,0x22,0xcb,0xef,0xcb,0xeb,0xc4,0x13,
+0x54,0x07,0x90,0x9c,0x6e,0xf0,0xeb,0x54,0x1f,0xa3,0xf0,0x75,0xf0,0x08,0xeb,0xa4,
+0x24,0xe9,0xf5,0x82,0xe5,0xf0,0x34,0x95,0xf5,0x83,0xe0,0xff,0x74,0xe7,0x2b,0xf5,
+0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0x54,0x1f,0xfa,0xd3,0x9f,0x40,0x03,0xca,0xef,
+0xca,0xea,0x25,0xe0,0x24,0xae,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,
+0x74,0x01,0x93,0xff,0xea,0x25,0xe0,0x24,0x76,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,
+0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xe4,0xfc,
+0xfd,0xeb,0x25,0xe0,0x25,0xe0,0x24,0xe2,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0x12,
+0x6f,0x7c,0x90,0x9c,0x6e,0xe0,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0xff,
+0xa3,0xe0,0x2f,0xff,0xe4,0x3e,0xfe,0x74,0x84,0x2f,0xf5,0x82,0x74,0x04,0x3e,0xf5,
+0x83,0xea,0xf0,0xff,0x22,0x8d,0x2f,0xc9,0xef,0xc9,0xe9,0xc4,0x13,0x54,0x07,0x90,
+0x9c,0x6e,0xf0,0xe9,0x54,0x1f,0xa3,0xf0,0xe5,0x2f,0x54,0x1f,0xf5,0x33,0x74,0x80,
+0x29,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xf5,0x32,0xeb,0xd3,0x94,0x01,0x40,
+0x03,0x02,0x72,0x3a,0xe5,0x32,0x25,0x31,0xff,0xe5,0x33,0x90,0x41,0xe6,0x93,0xfe,
+0xef,0xd3,0x9e,0x74,0x80,0x40,0x2d,0x29,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4,
+0xf0,0x90,0x9c,0x6e,0xe0,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0xff,0xa3,
+0xe0,0x2f,0xff,0xe4,0x3e,0xfe,0x74,0x84,0x2f,0xf5,0x82,0x74,0x04,0x3e,0xf5,0x83,
+0xe5,0x2f,0xf0,0x22,0x29,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xef,0xf0,0x22,0xef,
+0x25,0xe0,0x24,0x69,0xf8,0xe6,0xf5,0x83,0x08,0xe6,0x2d,0xf5,0x82,0xe5,0x83,0x3c,
+0xf5,0x83,0xe5,0x16,0xf0,0xef,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xf5,0x83,0x08,0xe6,
+0x2d,0xf5,0x82,0xe5,0x83,0x3c,0xf5,0x83,0xa3,0xe5,0x15,0xf0,0xef,0x25,0xe0,0x24,
+0x69,0xf8,0xe6,0xf5,0x83,0x08,0xe6,0x2d,0xf5,0x82,0xe5,0x83,0x3c,0xf5,0x83,0xa3,
+0xa3,0xe5,0x14,0xf0,0xef,0xbb,0x01,0x18,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,
+0xe6,0x2d,0xff,0xee,0x3c,0x8f,0x82,0xf5,0x83,0xa3,0xa3,0xa3,0x74,0x03,0xf0,0x22,
+0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfe,0x08,0xe6,0x2d,0xff,0xee,0x3c,0x8f,0x82,0xf5,
+0x83,0xa3,0xa3,0xa3,0x74,0x01,0xf0,0x22,0x90,0x9c,0xb1,0xef,0xf0,0xa3,0xed,0xf0,
+0x90,0x9c,0xb1,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,
+0xf4,0xff,0x90,0x00,0x47,0xe0,0x5f,0x12,0x7a,0x9e,0x90,0x9c,0xb1,0xe0,0xff,0x74,
+0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x46,0xe0,0x4f,
+0x12,0x7a,0x9e,0x90,0x9c,0xb2,0xe0,0x60,0x18,0x90,0x9c,0xb1,0xe0,0xff,0x74,0x01,
+0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x45,0xe0,0x4f,0x80,
+0x17,0x90,0x9c,0xb1,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,
+0xfc,0xf4,0xff,0x90,0x00,0x45,0xe0,0x5f,0x12,0x7a,0x9e,0x22,0xab,0x07,0xaa,0x06,
+0xa9,0x05,0x90,0x9c,0xa1,0xe0,0x70,0x0a,0xef,0x29,0x90,0x01,0xc4,0xf0,0xa3,0xea,
+0xf0,0x22,0xe4,0x90,0x9c,0xb4,0xf0,0x90,0x9c,0xb4,0xe0,0x24,0x65,0xf8,0xe6,0x64,
+0x01,0x70,0x30,0xeb,0x29,0xff,0xe0,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,
+0x24,0xc4,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xef,0xf0,0x90,0x9c,0xb4,0xe0,0x25,
+0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0xc5,0xf5,0x82,0x74,0x01,0x3c,0xf5,
+0x83,0xea,0xf0,0x90,0x9c,0xb4,0xe0,0x04,0xf0,0xe0,0xb4,0x02,0xba,0x22,0xef,0x25,
+0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,0x24,0x09,0xf5,0x82,0x74,0x02,0x3c,0xf5,
+0x83,0xe0,0xfe,0x12,0x2f,0xc0,0xfd,0xee,0x2d,0xfd,0xef,0x75,0xf0,0x03,0xa4,0x24,
+0x98,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xed,0xf0,0x90,0x00,0x01,0x12,0x6e,0x2f,
+0xfd,0xee,0x2d,0xfd,0xef,0x75,0xf0,0x03,0xa4,0x24,0x99,0xf5,0x82,0xe4,0x34,0x9c,
+0xf5,0x83,0xed,0xf0,0x90,0x00,0x02,0x12,0x6e,0x2f,0xfd,0xee,0x2d,0xfe,0xef,0x75,
+0xf0,0x03,0xa4,0x24,0x9a,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xee,0xf0,0x22,0x75,
+0xf0,0x04,0xef,0xa4,0x2d,0xf5,0x82,0xe4,0x35,0xf0,0xf5,0x83,0xe5,0x82,0x24,0x75,
+0xf5,0x82,0xe5,0x83,0x34,0x9c,0xf5,0x83,0xe0,0xfe,0xeb,0xf4,0xfc,0xee,0x5c,0xf0,
+0x75,0xf0,0x04,0xef,0xa4,0x2d,0xf5,0x82,0xe4,0x35,0xf0,0xf5,0x83,0xe5,0x82,0x24,
+0x75,0xf5,0x82,0xe5,0x83,0x34,0x9c,0xf5,0x83,0xe0,0xfe,0xef,0x25,0xe0,0x24,0x69,
+0xf8,0xe6,0xfa,0x08,0xe6,0xfb,0xed,0x2b,0xfd,0xe4,0x3a,0xfc,0x74,0x38,0x2d,0xf5,
+0x82,0x74,0x01,0x3c,0xf5,0x83,0xee,0xf0,0x22,0x75,0xf0,0x04,0xef,0xa4,0x2d,0xf5,
+0x82,0xe4,0x35,0xf0,0xf5,0x83,0xe5,0x82,0x24,0x86,0xf5,0x82,0xe5,0x83,0x34,0x9c,
+0xf5,0x83,0xe0,0xfe,0xeb,0xf4,0xfc,0xee,0x5c,0xf0,0x75,0xf0,0x04,0xef,0xa4,0x2d,
+0xf5,0x82,0xe4,0x35,0xf0,0xf5,0x83,0xe5,0x82,0x24,0x86,0xf5,0x82,0xe5,0x83,0x34,
+0x9c,0xf5,0x83,0xe0,0xfe,0xef,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfa,0x08,0xe6,0xfb,
+0xed,0x2b,0xfd,0xe4,0x3a,0xfc,0x74,0x50,0x2d,0xf5,0x82,0xe4,0x3c,0xf5,0x83,0xee,
+0xf0,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x08,0xa2,
+0xaf,0xe4,0x33,0x90,0x9c,0x29,0xf0,0xc2,0xaf,0x7e,0x75,0x7f,0xb2,0xe4,0xfd,0x12,
+0x74,0x3c,0x90,0x9c,0x29,0xe0,0x24,0xff,0x92,0xaf,0xe4,0xff,0x12,0x68,0x5f,0x53,
+0x91,0xdf,0xa2,0xaf,0xe4,0x33,0x90,0x9c,0x29,0xf0,0xc2,0xaf,0x7e,0x75,0x7f,0xb2,
+0x7d,0x01,0x12,0x74,0x3c,0x90,0x9c,0x29,0xe0,0x24,0xff,0x92,0xaf,0xd0,0xd0,0xd0,
+0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,
+0xc0,0xd0,0x75,0xd0,0x08,0xa2,0xaf,0xe4,0x33,0x90,0x9c,0x2a,0xf0,0xc2,0xaf,0x7e,
+0x76,0x7f,0x08,0xe4,0xfd,0x12,0x74,0x3c,0x90,0x9c,0x2a,0xe0,0x24,0xff,0x92,0xaf,
+0x7f,0x01,0x12,0x4c,0x9b,0x53,0x91,0xbf,0xa2,0xaf,0xe4,0x33,0x90,0x9c,0x2a,0xf0,
+0xc2,0xaf,0x7e,0x76,0x7f,0x08,0x7d,0x01,0x12,0x74,0x3c,0x90,0x9c,0x2a,0xe0,0x24,
+0xff,0x92,0xaf,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0xc0,0xe0,
+0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x08,0xa2,0xaf,0xe4,0x33,0x90,
+0x9c,0x2b,0xf0,0xc2,0xaf,0x7e,0x76,0x7f,0x5e,0xe4,0xfd,0x12,0x74,0x3c,0x90,0x9c,
+0x2b,0xe0,0x24,0xff,0x92,0xaf,0x7f,0x01,0x12,0x68,0x5f,0x53,0x91,0x7f,0xa2,0xaf,
+0xe4,0x33,0x90,0x9c,0x2b,0xf0,0xc2,0xaf,0x7e,0x76,0x7f,0x5e,0x7d,0x01,0x12,0x74,
+0x3c,0x90,0x9c,0x2b,0xe0,0x24,0xff,0x92,0xaf,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,
+0xf0,0xd0,0xe0,0x32,0x8b,0x1a,0x8a,0x1b,0x89,0x1c,0x90,0x9c,0x43,0xeb,0xf0,0xa3,
+0xea,0xf0,0xa3,0xe9,0xf0,0xa3,0xe5,0x1d,0xf0,0xa3,0xe5,0x1e,0xf0,0xa3,0xe5,0x1f,
+0xf0,0xaf,0x20,0x15,0x20,0xef,0x60,0x2a,0x90,0x9c,0x46,0xe0,0xfb,0xa3,0xe4,0x75,
+0xf0,0x01,0x12,0x6e,0xa6,0xa9,0xf0,0xfa,0x12,0x2f,0xc0,0xff,0x90,0x9c,0x43,0xe0,
+0xfb,0xa3,0xe4,0x75,0xf0,0x01,0x12,0x6e,0xa6,0xa9,0xf0,0xfa,0xef,0x12,0x6e,0x5c,
+0x80,0xcf,0xab,0x1a,0xaa,0x1b,0xa9,0x1c,0x22,0x75,0xf0,0x04,0xef,0xa4,0x2d,0xf5,
+0x82,0xe4,0x35,0xf0,0xf5,0x83,0xe5,0x82,0x24,0x75,0xf5,0x82,0xe5,0x83,0x34,0x9c,
+0xf5,0x83,0xe0,0x4b,0xf0,0x75,0xf0,0x04,0xef,0xa4,0x2d,0xf5,0x82,0xe4,0x35,0xf0,
+0xf5,0x83,0xe5,0x82,0x24,0x75,0xf5,0x82,0xe5,0x83,0x34,0x9c,0xf5,0x83,0xe0,0xfe,
+0xef,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfa,0x08,0xe6,0xfb,0xed,0x2b,0xfd,0xe4,0x3a,
+0xfc,0x74,0x38,0x2d,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xee,0xf0,0x22,0x75,0xf0,
+0x04,0xef,0xa4,0x2d,0xf5,0x82,0xe4,0x35,0xf0,0xf5,0x83,0xe5,0x82,0x24,0x86,0xf5,
+0x82,0xe5,0x83,0x34,0x9c,0xf5,0x83,0xe0,0x4b,0xf0,0x75,0xf0,0x04,0xef,0xa4,0x2d,
+0xf5,0x82,0xe4,0x35,0xf0,0xf5,0x83,0xe5,0x82,0x24,0x86,0xf5,0x82,0xe5,0x83,0x34,
+0x9c,0xf5,0x83,0xe0,0xfe,0xef,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfa,0x08,0xe6,0xfb,
+0xed,0x2b,0xfd,0xe4,0x3a,0xfc,0x74,0x50,0x2d,0xf5,0x82,0xe4,0x3c,0xf5,0x83,0xee,
+0xf0,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x08,0xa2,
+0xaf,0xe4,0x33,0x90,0x9c,0x27,0xf0,0xc2,0xaf,0x7e,0x77,0x7f,0xb2,0xe4,0xfd,0x12,
+0x74,0x3c,0x90,0x9c,0x27,0xe0,0x24,0xff,0x92,0xaf,0xe4,0xff,0x12,0x4c,0x9b,0xa2,
+0xaf,0xe4,0x33,0x90,0x9c,0x27,0xf0,0xc2,0xaf,0x7e,0x77,0x7f,0xb2,0x7d,0x01,0x12,
+0x74,0x3c,0x90,0x9c,0x27,0xe0,0x24,0xff,0x92,0xaf,0xd0,0xd0,0xd0,0x82,0xd0,0x83,
+0xd0,0xf0,0xd0,0xe0,0x32,0xe4,0x90,0x9c,0xa5,0xf0,0x90,0x00,0x18,0xe0,0x54,0xfe,
+0xf0,0x7f,0x10,0x7e,0x00,0x12,0x7a,0xa3,0x90,0x00,0x1a,0xe0,0x54,0xfe,0xf0,0x7f,
+0x10,0x7e,0x00,0x12,0x7a,0xa3,0x90,0x00,0x80,0xe0,0x54,0x7d,0x90,0x9c,0x38,0xf0,
+0xe0,0x30,0xe2,0x05,0xe0,0x54,0xfb,0x80,0x06,0x90,0x9c,0x38,0xe0,0x44,0x04,0x90,
+0x00,0x80,0xf0,0x7f,0x10,0x7e,0x00,0x12,0x7a,0xa3,0x75,0xa8,0x81,0x75,0x81,0x7f,
+0x02,0x36,0x46,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,
+0x08,0xa2,0xaf,0xe4,0x33,0x90,0x9c,0x28,0xf0,0xc2,0xaf,0x7e,0x78,0x7f,0x54,0xe4,
+0xfd,0x12,0x74,0x3c,0x90,0x9c,0x28,0xe0,0x24,0xff,0x92,0xaf,0x53,0x91,0xef,0xa2,
+0xaf,0xe4,0x33,0xf0,0xc2,0xaf,0x7e,0x78,0x7f,0x54,0x7d,0x01,0x12,0x74,0x3c,0x90,
+0x9c,0x28,0xe0,0x24,0xff,0x92,0xaf,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,
+0xe0,0x32,0x12,0x2f,0xc0,0xfe,0xef,0xc4,0x33,0x54,0xe0,0x2e,0xfe,0xc3,0x94,0x40,
+0x50,0x18,0xee,0x64,0x20,0x60,0x13,0x90,0x00,0x02,0x12,0x6e,0x2f,0xfd,0x74,0x65,
+0x2e,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xed,0xf0,0x74,0x65,0x2e,0xf5,0x82,0xe4,
+0x34,0x99,0xf5,0x83,0xe0,0xfe,0xef,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfc,0x08,0xe6,
+0x24,0xb2,0xf5,0x82,0x74,0x04,0x3c,0xf5,0x83,0xee,0xf0,0x22,0xab,0x07,0xc2,0xaf,
+0x90,0x9c,0x67,0xe5,0x8e,0xf0,0x75,0x8e,0x02,0xec,0xf5,0x28,0xeb,0xc4,0x33,0x33,
+0x33,0x54,0x80,0x42,0x28,0xed,0xf5,0x29,0x90,0xfd,0x10,0xe5,0x28,0xf0,0xaf,0x29,
+0xe4,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x90,0x9c,0x68,0xf0,0x90,0x9c,
+0x67,0xe0,0xf5,0x8e,0xd2,0xaf,0xa3,0xe0,0xff,0x22,0xab,0x07,0xc2,0xaf,0x90,0x9c,
+0x67,0xe5,0x8e,0xf0,0x75,0x8e,0x02,0xec,0xf5,0x28,0xeb,0xc4,0x33,0x33,0x33,0x54,
+0x80,0x42,0x28,0xed,0xf5,0x29,0x90,0xfd,0x11,0xe5,0x28,0xf0,0xaf,0x29,0xe4,0x2f,
+0xf5,0x82,0xe4,0x34,0xfb,0xf5,0x83,0xe0,0x90,0x9c,0x68,0xf0,0x90,0x9c,0x67,0xe0,
+0xf5,0x8e,0xd2,0xaf,0xa3,0xe0,0xff,0x22,0x90,0x9c,0xb3,0xef,0xf0,0xe0,0xff,0x74,
+0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0,
+0x5f,0x12,0x7a,0x9e,0x90,0x9c,0xb3,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,
+0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0xe0,0x5f,0xf0,0x7f,0x10,0x7e,0x00,
+0x02,0x7a,0xa3,0xef,0x25,0xe0,0x25,0xe0,0x2d,0x24,0x55,0xf8,0xe6,0xfe,0xeb,0xf4,
+0x5e,0xf6,0xef,0x25,0xe0,0x25,0xe0,0x2d,0x24,0x55,0xf8,0xe6,0xfe,0xef,0x25,0xe0,
+0x24,0x69,0xf8,0xe6,0xfa,0x08,0xe6,0xfb,0xed,0x2b,0xfd,0xe4,0x3a,0xfc,0x74,0x30,
+0x2d,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xee,0xf0,0x22,0xaa,0x07,0xc2,0xaf,0x90,
+0x9c,0x6d,0xe5,0x8e,0xf0,0x75,0x8e,0x02,0xec,0xf5,0x2c,0xea,0xc4,0x33,0x33,0x33,
+0x54,0x80,0x42,0x2c,0xed,0xf5,0x2d,0x90,0xfd,0x10,0xe5,0x2c,0xf0,0xaf,0x2d,0xe4,
+0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xeb,0xf0,0x90,0x9c,0x6d,0xe0,0xf5,0x8e,
+0xd2,0xaf,0x22,0xaa,0x07,0xc2,0xaf,0x90,0x9c,0x6d,0xe5,0x8e,0xf0,0x75,0x8e,0x02,
+0xec,0xf5,0x2c,0xea,0xc4,0x33,0x33,0x33,0x54,0x80,0x42,0x2c,0xed,0xf5,0x2d,0x90,
+0xfd,0x11,0xe5,0x2c,0xf0,0xaf,0x2d,0xe4,0x2f,0xf5,0x82,0xe4,0x34,0xfb,0xf5,0x83,
+0xeb,0xf0,0x90,0x9c,0x6d,0xe0,0xf5,0x8e,0xd2,0xaf,0x22,0xef,0x25,0xe0,0x25,0xe0,
+0x2d,0x24,0x55,0xf8,0xe6,0x4b,0xf6,0xef,0x25,0xe0,0x25,0xe0,0x2d,0x24,0x55,0xf8,
+0xe6,0xfe,0xef,0x25,0xe0,0x24,0x69,0xf8,0xe6,0xfa,0x08,0xe6,0xfb,0xed,0x2b,0xfd,
+0xe4,0x3a,0xfc,0x74,0x30,0x2d,0xf5,0x82,0x74,0x01,0x3c,0xf5,0x83,0xee,0xf0,0x22,
+0xad,0x07,0xac,0x06,0xed,0x1d,0xae,0x04,0x70,0x01,0x1c,0x4e,0x60,0x09,0x7f,0xe8,
+0x7e,0x03,0x12,0x7a,0xa3,0x80,0xed,0x22,0x90,0x00,0x18,0xe0,0x54,0xfe,0xf0,0x7f,
+0x10,0x7e,0x00,0xef,0x1f,0x70,0x01,0x1e,0x14,0x4e,0x70,0xf7,0x22,0x90,0x09,0x28,
+0xef,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x22,0x90,0x9c,0x49,
+0xef,0xf0,0xa3,0xeb,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,0xf0,0x22,0x19,0x6c,};
+
+u8 Rtl8192DTestFwMainArray[Rtl8192DTestMainArrayLength] = {
+0x0, };
+
+u8 Rtl8192DTestFwDataArray[Rtl8192DTestDataArrayLength] = {
+0x0, };
+
+u32 Rtl8192DTestPHY_REG_2TArray[Rtl8192DTestPHY_REG_2TArrayLength] = {
+0x024,0x0011800f,
+0x028,0x00ffdb83,
+0x014,0x08dba955,
+0x800,0x80040002,
+0x804,0x00000003,
+0x808,0x0000fc00,
+0x80c,0x0000000a,
+0x810,0x10006388,
+0x814,0x020c3d10,
+0x818,0x02200385,
+0x81c,0x00000000,
+0x820,0x01000100,
+0x824,0x00390004,
+0x828,0x01000100,
+0x82c,0x00390004,
+0x830,0x27272727,
+0x834,0x27272727,
+0x838,0x27272727,
+0x83c,0x27272727,
+0x840,0x00010000,
+0x844,0x00010000,
+0x848,0x27272727,
+0x84c,0x27272727,
+0x850,0x00000000,
+0x854,0x00000000,
+0x858,0x569a569a,
+0x85c,0x0c1b25a4,
+0x860,0x66e60230,
+0x864,0x061f0130,
+0x868,0x27272727,
+0x86c,0x272b2b2b,
+0x870,0x07000700,
+0x874,0x22008000,
+0x878,0x08080808,
+0x87c,0x00006fb8,
+0x880,0xc0083070,
+0x884,0x000004d5,
+0x888,0x00000000,
+0x88c,0xcc0000c0,
+0x890,0x00000800,
+0x894,0xfffffffe,
+0x898,0x40302010,
+0x89c,0x00706050,
+0x900,0x00000000,
+0x904,0x00000023,
+0x908,0x00000000,
+0x90c,0x81121313,
+0xa00,0x00d047c8,
+0xa04,0x80ff000c,
+0xa08,0x8c838300,
+0xa0c,0x2e62120f,
+0xa10,0x9500bb78,
+0xa14,0x11144028,
+0xa18,0x00881117,
+0xa1c,0x89140f00,
+0xa20,0x1a1b0000,
+0xa24,0x090e1317,
+0xa28,0x00000204,
+0xa2c,0x00d30000,
+0xa70,0x101fbf80,
+0xa74,0x00000007,
+0xc00,0x48071d40,
+0xc04,0x03a05633,
+0xc08,0x000000e4,
+0xc0c,0x6c6c6c6c,
+0xc10,0x08800000,
+0xc14,0x40000100,
+0xc18,0x08800000,
+0xc1c,0x40000100,
+0xc20,0x00000000,
+0xc24,0x00000000,
+0xc28,0x00000000,
+0xc2c,0x00000000,
+0xc30,0x69e9ac44,
+0xc34,0x469652cf,
+0xc38,0x49795994,
+0xc3c,0x0a979718,
+0xc40,0x1f7c403f,
+0xc44,0x000100b7,
+0xc48,0xec020107,
+0xc4c,0x007f037f,
+0xc50,0x69543428,
+0xc54,0x43bc009e,
+0xc58,0x69543428,
+0xc5c,0x433c00a8,
+0xc60,0x00000000,
+0xc64,0x5116848b,
+0xc68,0x47c00bff,
+0xc6c,0x00000036,
+0xc70,0x2c7f000d,
+0xc74,0x058610db,
+0xc78,0x0000001f,
+0xc7c,0x40b97612,
+0xc80,0x40000100,
+0xc84,0x20f60000,
+0xc88,0x40000100,
+0xc8c,0x20200000,
+0xc90,0x00121820,
+0xc94,0x00000000,
+0xc98,0x00121820,
+0xc9c,0x00007f7f,
+0xca0,0x00000000,
+0xca4,0x00000080,
+0xca8,0x00000000,
+0xcac,0x00000000,
+0xcb0,0x00000000,
+0xcb4,0x00000000,
+0xcb8,0x00000000,
+0xcbc,0x28000000,
+0xcc0,0x00000000,
+0xcc4,0x00000000,
+0xcc8,0x00000000,
+0xccc,0x00000000,
+0xcd0,0x00000000,
+0xcd4,0x00000000,
+0xcd8,0x64b1f9fc,
+0xcdc,0xe0767233,
+0xce0,0x00222222,
+0xce4,0x00000000,
+0xce8,0x37644302,
+0xcec,0x2f97d40c,
+0xd00,0x00080740,
+0xd04,0x00020403,
+0xd08,0x0000907f,
+0xd0c,0x20010201,
+0xd10,0xa0633333,
+0xd14,0x3333bc43,
+0xd18,0x7a8f5b6b,
+0xd2c,0xcc979975,
+0xd30,0x00000000,
+0xd34,0x80608000,
+0xd38,0x00000000,
+0xd3c,0x00027293,
+0xd40,0x00000000,
+0xd44,0x00000000,
+0xd48,0x00000000,
+0xd4c,0x00000000,
+0xd50,0x6437140a,
+0xd54,0x00000000,
+0xd58,0x00000000,
+0xd5c,0x30032064,
+0xd60,0x4653de68,
+0xd64,0x04518a3c,
+0xd68,0x00002101,
+0xd6c,0x2a201c16,
+0xd70,0x1812362e,
+0xd74,0x322c2220,
+0xd78,0x000e3c24,
+0xe00,0x2a2a2a2a,
+0xe04,0x2a2a2a2a,
+0xe08,0x03902a2a,
+0xe10,0x2a2a2a2a,
+0xe14,0x2a2a2a2a,
+0xe18,0x2a2a2a2a,
+0xe1c,0x2a2a2a2a,
+0xe28,0x00000000,
+0xe30,0x1000dc1f,
+0xe34,0x10008c1f,
+0xe38,0x02140102,
+0xe3c,0x681604c2,
+0xe40,0x01007c00,
+0xe44,0x01004800,
+0xe48,0xfb000000,
+0xe4c,0x000028d1,
+0xe50,0x1000dc1f,
+0xe54,0x10008c1f,
+0xe58,0x02140102,
+0xe5c,0x28160d05,
+0xe60,0x00000010,
+0xe68,0x001b25a4,
+0xe6c,0x63db25a4,
+0xe70,0x63db25a4,
+0xe74,0x0c1b25a4,
+0xe78,0x0c1b25a4,
+0xe7c,0x0c1b25a4,
+0xe80,0x0c1b25a4,
+0xe84,0x63db25a4,
+0xe88,0x0c1b25a4,
+0xe8c,0x63db25a4,
+0xed0,0x63db25a4,
+0xed4,0x63db25a4,
+0xed8,0x63db25a4,
+0xedc,0x001b25a4,
+0xee0,0x001b25a4,
+0xeec,0x6fdb25a4,
+0xf14,0x00000003,
+0xf4c,0x00000004,
+0xf00,0x00000300,
+};
+
+u32 Rtl8192DTestPHY_REG_1TArray[Rtl8192DTestPHY_REG_1TArrayLength] = {
+0x0, };
+
+u32 Rtl8192DTestPHY_REG_Array_PG[Rtl8192DTestPHY_REG_Array_PGLength] = {
+0x0, };
+
+u32 Rtl8192DTestRadioA_2TArray[Rtl8192DTestRadioA_2TArrayLength] = {
+0x000,0x00030000,
+0x001,0x00030000,
+0x002,0x00000000,
+0x003,0x00000000,
+0x004,0x00070000,
+0x005,0x000fd800,
+0x006,0x000f001c,
+0x007,0x0003c800,
+0x008,0x00084000,
+0x00b,0x00024000,
+0x00e,0x00096f18,
+0x00f,0x00000851,
+0x014,0x00021440,
+0x015,0x00000430,
+0x016,0x000e0332,
+0x017,0x000f0000,
+0x018,0x00007407,
+0x019,0x00000000,
+0x01d,0x000a1290,
+0x022,0x00000000,
+0x023,0x00001558,
+0x024,0x00000000,
+0x03d,0x00000000,
+0x03e,0x00000000,
+0x03f,0x00000000,
+0x042,0x00008400,
+0x01a,0x00030a99,
+0x01b,0x00040b00,
+0x01c,0x000fc338,
+0x03a,0x000a57eb,
+0x03b,0x000e0000,
+0x03c,0x000ff7d4,
+0x020,0x0000aa52,
+0x021,0x00054000,
+0x040,0x0000aa52,
+0x041,0x00014000,
+0x025,0x000803be,
+0x026,0x000fc638,
+0x027,0x0007b858,
+0x028,0x000ed471,
+0x029,0x000d7110,
+0x02a,0x0008cb04,
+0x02b,0x0004128a,
+0x02c,0x00001840,
+0x02f,0x00096770,
+0x043,0x0002444f,
+0x044,0x0001adb0,
+0x045,0x00056467,
+0x046,0x0008992c,
+0x047,0x0000052c,
+0x048,0x000f9c43,
+0x049,0x00002e0c,
+0x04a,0x000546eb,
+0x04b,0x0008966c,
+0x04c,0x0000dde9,
+0x018,0x00007401,
+0x000,0x00070000,
+0x012,0x000dc000,
+0x012,0x00090000,
+0x012,0x00051000,
+0x012,0x00012000,
+0x013,0x000287b3,
+0x013,0x000247a7,
+0x013,0x0002079b,
+0x013,0x0001c49f,
+0x013,0x0001839e,
+0x013,0x000142a1,
+0x013,0x000102a8,
+0x013,0x0000c29c,
+0x013,0x000081a0,
+0x013,0x000040ac,
+0x013,0x00000024,
+0x015,0x0000f433,
+0x015,0x0004f433,
+0x015,0x0008f433,
+0x016,0x000e0330,
+0x016,0x000a0330,
+0x016,0x00060330,
+0x016,0x00020330,
+0x018,0x00017568,
+0x000,0x00070000,
+0x012,0x000cc000,
+0x012,0x000bc000,
+0x012,0x00078000,
+0x012,0x00030000,
+0x013,0x000287bc,
+0x013,0x000247b0,
+0x013,0x000203b4,
+0x013,0x0001c3a8,
+0x013,0x000181b4,
+0x013,0x000141a8,
+0x013,0x000100b4,
+0x013,0x0000c028,
+0x013,0x0000801c,
+0x013,0x00004010,
+0x013,0x00000004,
+0x015,0x0000f4c3,
+0x015,0x0004f4c3,
+0x015,0x0008f4c3,
+0x016,0x000e085f,
+0x016,0x000a085f,
+0x016,0x0006085f,
+0x016,0x0002085f,
+0x018,0x00037568,
+0x000,0x00070000,
+0x012,0x000cc000,
+0x012,0x000bc000,
+0x012,0x00078000,
+0x012,0x00030000,
+0x013,0x000287bc,
+0x013,0x000247b0,
+0x013,0x000203b4,
+0x013,0x0001c3a8,
+0x013,0x000181b4,
+0x013,0x000141a8,
+0x013,0x000100b4,
+0x013,0x0000c028,
+0x013,0x0000801c,
+0x013,0x00004010,
+0x013,0x00000004,
+0x015,0x0000f4c3,
+0x015,0x0004f4c3,
+0x015,0x0008f4c3,
+0x016,0x000e085f,
+0x016,0x000a085f,
+0x016,0x0006085f,
+0x016,0x0002085f,
+0x018,0x00057568,
+0x000,0x00070000,
+0x012,0x000cc000,
+0x012,0x000bc000,
+0x012,0x00078000,
+0x012,0x00030000,
+0x013,0x000287bc,
+0x013,0x000247b0,
+0x013,0x000203b4,
+0x013,0x0001c3a8,
+0x013,0x000181b4,
+0x013,0x000141a8,
+0x013,0x000100b4,
+0x013,0x0000c028,
+0x013,0x0000801c,
+0x013,0x00004010,
+0x013,0x00000004,
+0x015,0x0000f4c3,
+0x015,0x0004f4c3,
+0x015,0x0008f4c3,
+0x016,0x000e085f,
+0x016,0x000a085f,
+0x016,0x0006085f,
+0x016,0x0002085f,
+0x030,0x00099900,
+0x031,0x000ff6c0,
+0x032,0x000c8cf0,
+0x033,0x000dd480,
+0x034,0x000ffac0,
+0x035,0x000886c7,
+0x036,0x000ff550,
+0x037,0x00076c51,
+0x038,0x000fff1c,
+0x039,0x000e30c0,
+0x000,0x00030000,
+0x018,0x0000f401,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x01e,0x00088009,
+0x01f,0x00080003,
+0x0fe,0x00000000,
+0x01e,0x00088001,
+0x01f,0x00080000,
+};
+
+u32 Rtl8192DTestRadioB_2TArray[Rtl8192DTestRadioB_2TArrayLength] = {
+0x000,0x00070000,
+0x001,0x00030000,
+0x002,0x00000000,
+0x003,0x00000000,
+0x004,0x00070000,
+0x005,0x000fd800,
+0x006,0x000f001c,
+0x007,0x0003c800,
+0x008,0x00084000,
+0x00b,0x00024000,
+0x00e,0x00096f0f,
+0x00f,0x00000851,
+0x014,0x00021440,
+0x015,0x00000430,
+0x016,0x000e0332,
+0x017,0x00090000,
+0x018,0x00007407,
+0x019,0x00000000,
+0x01d,0x000a1290,
+0x022,0x00000000,
+0x023,0x00001558,
+0x024,0x00000000,
+0x03d,0x00000000,
+0x03e,0x00000000,
+0x03f,0x00000000,
+0x042,0x00008400,
+0x01a,0x00030a99,
+0x01b,0x00040b00,
+0x01c,0x000fc338,
+0x03a,0x000a57eb,
+0x03b,0x00020000,
+0x03c,0x000ff7d4,
+0x020,0x0000aa52,
+0x021,0x00054000,
+0x040,0x0000aa52,
+0x041,0x00014000,
+0x025,0x000803be,
+0x026,0x000fc638,
+0x027,0x0007b858,
+0x028,0x000ed471,
+0x029,0x000d7110,
+0x02a,0x0008cb04,
+0x02b,0x0004128a,
+0x02c,0x00001840,
+0x02f,0x00096770,
+0x043,0x0002444f,
+0x044,0x0001adb0,
+0x045,0x00056467,
+0x046,0x0008992c,
+0x047,0x0000052c,
+0x048,0x000f9c43,
+0x049,0x00002e0c,
+0x04a,0x000546eb,
+0x04b,0x0008966c,
+0x04c,0x0000dde9,
+0x018,0x00007401,
+0x000,0x00070000,
+0x012,0x000dc000,
+0x012,0x00090000,
+0x012,0x00051000,
+0x012,0x00012000,
+0x013,0x000287b3,
+0x013,0x000247a7,
+0x013,0x0002079b,
+0x013,0x0001c49f,
+0x013,0x0001839e,
+0x013,0x000142a1,
+0x013,0x000102a8,
+0x013,0x0000c29c,
+0x013,0x000081a0,
+0x013,0x000040ac,
+0x013,0x00000024,
+0x015,0x0000f433,
+0x015,0x0004f433,
+0x015,0x0008f433,
+0x016,0x000e0330,
+0x016,0x000a0330,
+0x016,0x00060330,
+0x016,0x00020330,
+0x018,0x00017568,
+0x000,0x00070000,
+0x012,0x000cc000,
+0x012,0x000bc000,
+0x012,0x00078000,
+0x012,0x00030000,
+0x013,0x000287bc,
+0x013,0x000247b0,
+0x013,0x000203b0,
+0x013,0x0001c3a4,
+0x013,0x000181b0,
+0x013,0x000141a4,
+0x013,0x00010198,
+0x013,0x0000c18c,
+0x013,0x00008104,
+0x013,0x00004104,
+0x013,0x00000104,
+0x015,0x0000f4c3,
+0x015,0x0004f4c3,
+0x015,0x0008f4c3,
+0x016,0x000e085f,
+0x016,0x000a085f,
+0x016,0x0006085f,
+0x016,0x0002085f,
+0x018,0x00037568,
+0x000,0x00070000,
+0x012,0x000cc000,
+0x012,0x000bc000,
+0x012,0x00078000,
+0x012,0x00030000,
+0x013,0x000287bc,
+0x013,0x000247b0,
+0x013,0x000203b0,
+0x013,0x0001c3a4,
+0x013,0x000181b0,
+0x013,0x000141a4,
+0x013,0x00010198,
+0x013,0x0000c18c,
+0x013,0x00008104,
+0x013,0x00004104,
+0x013,0x00000104,
+0x015,0x0000f4c3,
+0x015,0x0004f4c3,
+0x015,0x0008f4c3,
+0x016,0x000e085f,
+0x016,0x000a085f,
+0x016,0x0006085f,
+0x016,0x0002085f,
+0x018,0x00057568,
+0x000,0x00070000,
+0x012,0x000cc000,
+0x012,0x000bc000,
+0x012,0x00078000,
+0x012,0x00030000,
+0x013,0x000287bc,
+0x013,0x000247b0,
+0x013,0x000203b0,
+0x013,0x0001c3a4,
+0x013,0x000181b0,
+0x013,0x000141a4,
+0x013,0x00010198,
+0x013,0x0000c18c,
+0x013,0x00008104,
+0x013,0x00004104,
+0x013,0x00000104,
+0x015,0x0000f4c3,
+0x015,0x0004f4c3,
+0x015,0x0008f4c3,
+0x016,0x000e085f,
+0x016,0x000a085f,
+0x016,0x0006085f,
+0x016,0x0002085f,
+0x030,0x00099900,
+0x031,0x000ff6c0,
+0x032,0x000c8cf0,
+0x033,0x000dd480,
+0x034,0x000ffac0,
+0x035,0x000886c7,
+0x036,0x000ff550,
+0x037,0x00076c51,
+0x038,0x000fff1c,
+0x039,0x000e30c0,
+0x000,0x00030000,
+0x018,0x0000f401,
+0x0fe,0x00000000,
+0x0fe,0x00000000,
+0x01e,0x00088009,
+0x01f,0x00080003,
+0x0fe,0x00000000,
+0x01e,0x00088001,
+0x01f,0x00080000,
+};
+
+u32 Rtl8192DTestRadioA_1TArray[Rtl8192DTestRadioA_1TArrayLength] = {
+0x0, };
+
+u32 Rtl8192DTestRadioB_1TArray[Rtl8192DTestRadioB_1TArrayLength] = {
+0x0, };
+
+u32 Rtl8192DTestMAC_2TArray[Rtl8192DTestMAC_2TArrayLength] = {
+0x420,0x00000080,
+0x423,0x00000000,
+0x428,0x00000010,
+0x429,0x00000010,
+0x42a,0x00000030,
+0x43b,0x00000030,
+0x430,0x00000000,
+0x431,0x00000000,
+0x432,0x00000000,
+0x433,0x00000000,
+0x434,0x00000004,
+0x435,0x00000004,
+0x436,0x00000008,
+0x437,0x00000010,
+0x438,0x00000001,
+0x439,0x00000002,
+0x43a,0x00000003,
+0x43b,0x00000004,
+0x43c,0x00000005,
+0x43d,0x00000006,
+0x43e,0x00000007,
+0x43f,0x00000008,
+0x440,0x0000005d,
+0x441,0x00000001,
+0x442,0x00000000,
+0x444,0x00000015,
+0x445,0x000000f0,
+0x446,0x0000000f,
+0x447,0x00000000,
+0x458,0x00000041,
+0x459,0x000000a8,
+0x45a,0x00000072,
+0x45b,0x000000b9,
+0x462,0x00000008,
+0x463,0x00000003,
+0x4c8,0x00000004,
+0x4c9,0x00000002,
+0x4cc,0x00000004,
+0x4cd,0x00000040,
+0x4ce,0x00000001,
+0x500,0x00000026,
+0x501,0x000000a2,
+0x502,0x0000002f,
+0x503,0x00000000,
+0x504,0x00000024,
+0x505,0x000000a3,
+0x506,0x0000005e,
+0x507,0x00000000,
+0x508,0x0000002b,
+0x509,0x000000a4,
+0x50a,0x0000005e,
+0x50b,0x00000000,
+0x50c,0x0000004f,
+0x50d,0x000000a4,
+0x50e,0x00000000,
+0x50f,0x00000000,
+0x512,0x0000001c,
+0x514,0x0000000a,
+0x515,0x0000000a,
+0x516,0x00000010,
+0x517,0x00000010,
+0x51a,0x00000016,
+0x523,0x00000010,
+0x524,0x0000000f,
+0x525,0x0000007f,
+0x546,0x00000040,
+0x547,0x00000000,
+0x550,0x0000001a,
+0x551,0x00000024,
+0x559,0x00000002,
+0x55a,0x00000002,
+0x55d,0x000000ff,
+0x55e,0x00000030,
+0x55f,0x00000030,
+0x605,0x00000030,
+0x606,0x00000030,
+0x608,0x0000000f,
+0x609,0x00000068,
+0x640,0x00000040,
+0x700,0x00000021,
+0x701,0x00000043,
+0x702,0x00000065,
+0x703,0x00000087,
+0x708,0x00000021,
+0x709,0x00000043,
+0x70a,0x00000065,
+0x70b,0x00000087,
+};
+
+u32 Rtl8192DTestAGCTAB_5GArray[Rtl8192DTestAGCTAB_5GArrayLength] = {
+0xc78,0x7b000001,
+0xc78,0x7b010001,
+0xc78,0x7b020001,
+0xc78,0x7a030001,
+0xc78,0x79040001,
+0xc78,0x78050001,
+0xc78,0x77060001,
+0xc78,0x76070001,
+0xc78,0x75080001,
+0xc78,0x74090001,
+0xc78,0x730a0001,
+0xc78,0x720b0001,
+0xc78,0x710c0001,
+0xc78,0x700d0001,
+0xc78,0x6f0e0001,
+0xc78,0x6e0f0001,
+0xc78,0x6d100001,
+0xc78,0x6c110001,
+0xc78,0x6b120001,
+0xc78,0x6a130001,
+0xc78,0x69140001,
+0xc78,0x68150001,
+0xc78,0x67160001,
+0xc78,0x66170001,
+0xc78,0x65180001,
+0xc78,0x64190001,
+0xc78,0x631a0001,
+0xc78,0x621b0001,
+0xc78,0x611c0001,
+0xc78,0x601d0001,
+0xc78,0x431e0001,
+0xc78,0x421f0001,
+0xc78,0x41200001,
+0xc78,0x40210001,
+0xc78,0x27220001,
+0xc78,0x26230001,
+0xc78,0x25240001,
+0xc78,0x24250001,
+0xc78,0x23260001,
+0xc78,0x22270001,
+0xc78,0x21280001,
+0xc78,0x20290001,
+0xc78,0x202a0001,
+0xc78,0x202b0001,
+0xc78,0x202c0001,
+0xc78,0x202d0001,
+0xc78,0x202e0001,
+0xc78,0x202f0001,
+0xc78,0x20300001,
+0xc78,0x20310001,
+0xc78,0x20320001,
+0xc78,0x20330001,
+0xc78,0x20340001,
+0xc78,0x20350001,
+0xc78,0x20360001,
+0xc78,0x20370001,
+0xc78,0x20380001,
+0xc78,0x20390001,
+0xc78,0x203a0001,
+0xc78,0x203b0001,
+0xc78,0x203c0001,
+0xc78,0x203d0001,
+0xc78,0x203e0001,
+0xc78,0x203f0001,
+0xc78,0x7b400001,
+0xc78,0x7b410001,
+0xc78,0x7b420001,
+0xc78,0x7a430001,
+0xc78,0x79440001,
+0xc78,0x78450001,
+0xc78,0x77460001,
+0xc78,0x76470001,
+0xc78,0x75480001,
+0xc78,0x74490001,
+0xc78,0x734a0001,
+0xc78,0x724b0001,
+0xc78,0x714c0001,
+0xc78,0x704d0001,
+0xc78,0x6f4e0001,
+0xc78,0x6e4f0001,
+0xc78,0x6d500001,
+0xc78,0x6c510001,
+0xc78,0x6b520001,
+0xc78,0x6a530001,
+0xc78,0x69540001,
+0xc78,0x68550001,
+0xc78,0x67560001,
+0xc78,0x66570001,
+0xc78,0x65580001,
+0xc78,0x64590001,
+0xc78,0x635a0001,
+0xc78,0x625b0001,
+0xc78,0x615c0001,
+0xc78,0x605d0001,
+0xc78,0x435e0001,
+0xc78,0x425f0001,
+0xc78,0x41600001,
+0xc78,0x40610001,
+0xc78,0x27620001,
+0xc78,0x26630001,
+0xc78,0x25640001,
+0xc78,0x24650001,
+0xc78,0x23660001,
+0xc78,0x22670001,
+0xc78,0x21680001,
+0xc78,0x20690001,
+0xc78,0x206a0001,
+0xc78,0x206b0001,
+0xc78,0x206c0001,
+0xc78,0x206d0001,
+0xc78,0x206e0001,
+0xc78,0x206f0001,
+0xc78,0x20700001,
+0xc78,0x20710001,
+0xc78,0x20720001,
+0xc78,0x20730001,
+0xc78,0x20740001,
+0xc78,0x20750001,
+0xc78,0x20760001,
+0xc78,0x20770001,
+0xc78,0x20780001,
+0xc78,0x20790001,
+0xc78,0x207a0001,
+0xc78,0x207b0001,
+0xc78,0x207c0001,
+0xc78,0x207d0001,
+0xc78,0x207e0001,
+0xc78,0x207f0001,
+0xc78,0x38000002,
+0xc78,0x38010002,
+0xc78,0x38020002,
+0xc78,0x38030002,
+0xc78,0x38040002,
+0xc78,0x38050002,
+0xc78,0x38060002,
+0xc78,0x38070002,
+0xc78,0x38080002,
+0xc78,0x3c090002,
+0xc78,0x3e0a0002,
+0xc78,0x400b0002,
+0xc78,0x440c0002,
+0xc78,0x480d0002,
+0xc78,0x4c0e0002,
+0xc78,0x500f0002,
+0xc78,0x52100002,
+0xc78,0x56110002,
+0xc78,0x5a120002,
+0xc78,0x5e130002,
+0xc78,0x60140002,
+0xc78,0x60150002,
+0xc78,0x60160002,
+0xc78,0x62170002,
+0xc78,0x62180002,
+0xc78,0x62190002,
+0xc78,0x621a0002,
+0xc78,0x621b0002,
+0xc78,0x621c0002,
+0xc78,0x621d0002,
+0xc78,0x621e0002,
+0xc78,0x621f0002,
+0xc78,0x32000044,
+0xc78,0x32010044,
+0xc78,0x32020044,
+0xc78,0x32030044,
+0xc78,0x32040044,
+0xc78,0x32050044,
+0xc78,0x32060044,
+0xc78,0x34070044,
+0xc78,0x36080044,
+0xc78,0x3a090044,
+0xc78,0x3e0a0044,
+0xc78,0x400b0044,
+0xc78,0x420c0044,
+0xc78,0x440d0044,
+0xc78,0x480e0044,
+0xc78,0x4c0f0044,
+0xc78,0x50100044,
+0xc78,0x54110044,
+0xc78,0x58120044,
+0xc78,0x60130044,
+0xc78,0x68140044,
+0xc78,0x6e150044,
+0xc78,0x6e160044,
+0xc78,0x6e170044,
+0xc78,0x6e180044,
+0xc78,0x6e190044,
+0xc78,0x6e1a0044,
+0xc78,0x6e1b0044,
+0xc78,0x6e1c0044,
+0xc78,0x6e1d0044,
+0xc78,0x6e1e0044,
+0xc78,0x6e1f0044,
+0xc78,0x32000088,
+0xc78,0x32010088,
+0xc78,0x32020088,
+0xc78,0x32030088,
+0xc78,0x32040088,
+0xc78,0x32050088,
+0xc78,0x38060088,
+0xc78,0x38070088,
+0xc78,0x38080088,
+0xc78,0x40090088,
+0xc78,0x460a0088,
+0xc78,0x4a0b0088,
+0xc78,0x4e0c0088,
+0xc78,0x540d0088,
+0xc78,0x560e0088,
+0xc78,0x580f0088,
+0xc78,0x5c100088,
+0xc78,0x64110088,
+0xc78,0x6a120088,
+0xc78,0x6e130088,
+0xc78,0x6e140088,
+0xc78,0x6e150088,
+0xc78,0x6e160088,
+0xc78,0x6e170088,
+0xc78,0x6e180088,
+0xc78,0x6e190088,
+0xc78,0x6e1a0088,
+0xc78,0x6e1b0088,
+0xc78,0x6e1c0088,
+0xc78,0x6e1d0088,
+0xc78,0x6e1e0088,
+0xc78,0x6e1f0088,
+0xc78,0x320000d0,
+0xc78,0x320100d0,
+0xc78,0x320200d0,
+0xc78,0x320300d0,
+0xc78,0x320400d0,
+0xc78,0x320500d0,
+0xc78,0x380600d0,
+0xc78,0x380700d0,
+0xc78,0x380800d0,
+0xc78,0x400900d0,
+0xc78,0x460a00d0,
+0xc78,0x4a0b00d0,
+0xc78,0x4e0c00d0,
+0xc78,0x540d00d0,
+0xc78,0x560e00d0,
+0xc78,0x580f00d0,
+0xc78,0x5c1000d0,
+0xc78,0x641100d0,
+0xc78,0x6a1200d0,
+0xc78,0x6e1300d0,
+0xc78,0x6e1400d0,
+0xc78,0x6e1500d0,
+0xc78,0x6e1600d0,
+0xc78,0x6e1700d0,
+0xc78,0x6e1800d0,
+0xc78,0x6e1900d0,
+0xc78,0x6e1a00d0,
+0xc78,0x6e1b00d0,
+0xc78,0x6e1c00d0,
+0xc78,0x6e1d00d0,
+0xc78,0x6e1e00d0,
+0xc78,0x6e1f00d0,
+0xc78,0x6e1f0000,
+};
+
+u32 Rtl8192DTestAGCTAB_2GArray[Rtl8192DTestAGCTAB_2GArrayLength] = {
+0xc78,0x7b000001,
+0xc78,0x7b010001,
+0xc78,0x7b020001,
+0xc78,0x7b030001,
+0xc78,0x7b040001,
+0xc78,0x7b050001,
+0xc78,0x7b060001,
+0xc78,0x7a070001,
+0xc78,0x79080001,
+0xc78,0x78090001,
+0xc78,0x770a0001,
+0xc78,0x760b0001,
+0xc78,0x750c0001,
+0xc78,0x740d0001,
+0xc78,0x730e0001,
+0xc78,0x720f0001,
+0xc78,0x71100001,
+0xc78,0x70110001,
+0xc78,0x6f120001,
+0xc78,0x6e130001,
+0xc78,0x6d140001,
+0xc78,0x6c150001,
+0xc78,0x6b160001,
+0xc78,0x6a170001,
+0xc78,0x69180001,
+0xc78,0x68190001,
+0xc78,0x671a0001,
+0xc78,0x661b0001,
+0xc78,0x651c0001,
+0xc78,0x641d0001,
+0xc78,0x631e0001,
+0xc78,0x621f0001,
+0xc78,0x61200001,
+0xc78,0x60210001,
+0xc78,0x49220001,
+0xc78,0x48230001,
+0xc78,0x47240001,
+0xc78,0x46250001,
+0xc78,0x45260001,
+0xc78,0x44270001,
+0xc78,0x43280001,
+0xc78,0x42290001,
+0xc78,0x412a0001,
+0xc78,0x402b0001,
+0xc78,0x262c0001,
+0xc78,0x252d0001,
+0xc78,0x242e0001,
+0xc78,0x232f0001,
+0xc78,0x22300001,
+0xc78,0x21310001,
+0xc78,0x20320001,
+0xc78,0x06330001,
+0xc78,0x05340001,
+0xc78,0x04350001,
+0xc78,0x03360001,
+0xc78,0x02370001,
+0xc78,0x01380001,
+0xc78,0x00390001,
+0xc78,0x003a0001,
+0xc78,0x003b0001,
+0xc78,0x003c0001,
+0xc78,0x003d0001,
+0xc78,0x003e0001,
+0xc78,0x003f0001,
+0xc78,0x7b400001,
+0xc78,0x7b410001,
+0xc78,0x7b420001,
+0xc78,0x7b430001,
+0xc78,0x7b440001,
+0xc78,0x7b450001,
+0xc78,0x7b460001,
+0xc78,0x7a470001,
+0xc78,0x79480001,
+0xc78,0x78490001,
+0xc78,0x774a0001,
+0xc78,0x764b0001,
+0xc78,0x754c0001,
+0xc78,0x744d0001,
+0xc78,0x734e0001,
+0xc78,0x724f0001,
+0xc78,0x71500001,
+0xc78,0x70510001,
+0xc78,0x6f520001,
+0xc78,0x6e530001,
+0xc78,0x6d540001,
+0xc78,0x6c550001,
+0xc78,0x6b560001,
+0xc78,0x6a570001,
+0xc78,0x69580001,
+0xc78,0x68590001,
+0xc78,0x675a0001,
+0xc78,0x665b0001,
+0xc78,0x655c0001,
+0xc78,0x645d0001,
+0xc78,0x635e0001,
+0xc78,0x625f0001,
+0xc78,0x61600001,
+0xc78,0x60610001,
+0xc78,0x49620001,
+0xc78,0x48630001,
+0xc78,0x47640001,
+0xc78,0x46650001,
+0xc78,0x45660001,
+0xc78,0x44670001,
+0xc78,0x43680001,
+0xc78,0x42690001,
+0xc78,0x416a0001,
+0xc78,0x406b0001,
+0xc78,0x266c0001,
+0xc78,0x256d0001,
+0xc78,0x246e0001,
+0xc78,0x236f0001,
+0xc78,0x22700001,
+0xc78,0x21710001,
+0xc78,0x20720001,
+0xc78,0x06730001,
+0xc78,0x05740001,
+0xc78,0x04750001,
+0xc78,0x03760001,
+0xc78,0x02770001,
+0xc78,0x01780001,
+0xc78,0x00790001,
+0xc78,0x007a0001,
+0xc78,0x007b0001,
+0xc78,0x007c0001,
+0xc78,0x007d0001,
+0xc78,0x007e0001,
+0xc78,0x007f0001,
+0xc78,0x38000002,
+0xc78,0x38010002,
+0xc78,0x38020002,
+0xc78,0x38030002,
+0xc78,0x38040002,
+0xc78,0x38050002,
+0xc78,0x38060002,
+0xc78,0x38070002,
+0xc78,0x38080002,
+0xc78,0x3c090002,
+0xc78,0x3e0a0002,
+0xc78,0x400b0002,
+0xc78,0x440c0002,
+0xc78,0x480d0002,
+0xc78,0x4c0e0002,
+0xc78,0x500f0002,
+0xc78,0x52100002,
+0xc78,0x56110002,
+0xc78,0x5a120002,
+0xc78,0x5e130002,
+0xc78,0x60140002,
+0xc78,0x60150002,
+0xc78,0x60160002,
+0xc78,0x62170002,
+0xc78,0x62180002,
+0xc78,0x62190002,
+0xc78,0x621a0002,
+0xc78,0x621b0002,
+0xc78,0x621c0002,
+0xc78,0x621d0002,
+0xc78,0x621e0002,
+0xc78,0x621f0002,
+0xc78,0x28000044,
+0xc78,0x28010044,
+0xc78,0x28020044,
+0xc78,0x28030044,
+0xc78,0x28040044,
+0xc78,0x28050044,
+0xc78,0x30060044,
+0xc78,0x31070044,
+0xc78,0x32080044,
+0xc78,0x35090044,
+0xc78,0x370a0044,
+0xc78,0x3a0b0044,
+0xc78,0x3c0c0044,
+0xc78,0x3f0d0044,
+0xc78,0x410e0044,
+0xc78,0x440f0044,
+0xc78,0x46100044,
+0xc78,0x4b110044,
+0xc78,0x50120044,
+0xc78,0x52130044,
+0xc78,0x55140044,
+0xc78,0x57150044,
+0xc78,0x5a160044,
+0xc78,0x5c170044,
+0xc78,0x5e180044,
+0xc78,0x60190044,
+0xc78,0x621a0044,
+0xc78,0x651b0044,
+0xc78,0x681c0044,
+0xc78,0x6b1d0044,
+0xc78,0x6e1e0044,
+0xc78,0x6e1f0044,
+0xc78,0x28000088,
+0xc78,0x28010088,
+0xc78,0x28020088,
+0xc78,0x28030088,
+0xc78,0x28040088,
+0xc78,0x28050088,
+0xc78,0x30060088,
+0xc78,0x31070088,
+0xc78,0x32080088,
+0xc78,0x35090088,
+0xc78,0x370a0088,
+0xc78,0x3a0b0088,
+0xc78,0x3c0c0088,
+0xc78,0x3f0d0088,
+0xc78,0x410e0088,
+0xc78,0x440f0088,
+0xc78,0x46100088,
+0xc78,0x4b110088,
+0xc78,0x50120088,
+0xc78,0x52130088,
+0xc78,0x55140088,
+0xc78,0x57150088,
+0xc78,0x5a160088,
+0xc78,0x5c170088,
+0xc78,0x5e180088,
+0xc78,0x60190088,
+0xc78,0x621a0088,
+0xc78,0x651b0088,
+0xc78,0x681c0088,
+0xc78,0x6b1d0088,
+0xc78,0x6e1e0088,
+0xc78,0x6e1f0088,
+0xc78,0x280000d0,
+0xc78,0x280100d0,
+0xc78,0x280200d0,
+0xc78,0x280300d0,
+0xc78,0x280400d0,
+0xc78,0x280500d0,
+0xc78,0x300600d0,
+0xc78,0x310700d0,
+0xc78,0x320800d0,
+0xc78,0x350900d0,
+0xc78,0x370a00d0,
+0xc78,0x3a0b00d0,
+0xc78,0x3c0c00d0,
+0xc78,0x3f0d00d0,
+0xc78,0x410e00d0,
+0xc78,0x440f00d0,
+0xc78,0x461000d0,
+0xc78,0x4b1100d0,
+0xc78,0x501200d0,
+0xc78,0x521300d0,
+0xc78,0x551400d0,
+0xc78,0x571500d0,
+0xc78,0x5a1600d0,
+0xc78,0x5c1700d0,
+0xc78,0x5e1800d0,
+0xc78,0x601900d0,
+0xc78,0x621a00d0,
+0xc78,0x651b00d0,
+0xc78,0x681c00d0,
+0xc78,0x6b1d00d0,
+0xc78,0x6e1e00d0,
+0xc78,0x6e1f00d0,
+0xc78,0x6e1f0000,
+};
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/rtl8192du_led.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/rtl8192du_led.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/rtl8192du_led.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/rtl8192du_led.c	2017-09-23 03:42:49.982675174 +0800
@@ -0,0 +1,2587 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+#include "drv_types.h"
+#include "rtl8192d_hal.h"
+
+//================================================================================
+//	Constant.
+//================================================================================
+
+//
+// Default LED behavior.
+//
+#define LED_BLINK_NORMAL_INTERVAL	100
+#define LED_BLINK_SLOWLY_INTERVAL	200
+#define LED_BLINK_LONG_INTERVAL	400
+
+#define LED_BLINK_NO_LINK_INTERVAL_ALPHA		1000
+#define LED_BLINK_LINK_INTERVAL_ALPHA			500		//500
+#define LED_BLINK_SCAN_INTERVAL_ALPHA		180 	//150
+#define LED_BLINK_FASTER_INTERVAL_ALPHA		50
+#define LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA	5000
+
+//================================================================================
+// LED object.
+//================================================================================
+
+
+//================================================================================
+//	Prototype of protected function.
+//================================================================================
+
+#ifndef PLATFORM_FREEBSD //amy temp remove
+static void
+BlinkTimerCallback(
+	unsigned long data
+	);
+
+static void
+BlinkWorkItemCallback(
+	struct work_struct *work
+	);
+#endif //PLATFORM_FREEBSD,amy temp remove
+//================================================================================
+// LED_819xUsb routines. 
+//================================================================================
+
+//
+//	Description:
+//		Initialize an LED_871x object.
+//
+
+void
+InitLed871x(
+	_adapter			*padapter,
+	PLED_871x		pLed,
+	LED_PIN_871x	LedPin
+	);
+void
+InitLed871x(
+	_adapter			*padapter,
+	PLED_871x		pLed,
+	LED_PIN_871x	LedPin
+	)
+{
+	pLed->padapter = padapter;
+
+	pLed->LedPin = LedPin;
+
+	pLed->CurrLedState = LED_OFF;
+	pLed->bLedOn = _FALSE;
+
+	pLed->bLedBlinkInProgress = _FALSE;
+	pLed->BlinkTimes = 0;
+	pLed->BlinkingLedState = LED_UNKNOWN;
+#ifndef PLATFORM_FREEBSD   //amy, temp remove
+
+	_init_timer(&(pLed->BlinkTimer), padapter->pnetdev, BlinkTimerCallback, pLed);
+
+	_init_workitem(&(pLed->BlinkWorkItem), BlinkWorkItemCallback, pLed);
+#endif //PLATFORM_FREEBSD    //amy, temp remove
+}
+
+
+//
+//	Description:
+//		DeInitialize an LED_871x object.
+//
+
+void
+DeInitLed871x(
+	PLED_871x			pLed
+	);
+void
+DeInitLed871x(
+	PLED_871x			pLed
+	)
+{
+	_cancel_timer_ex(&(pLed->BlinkTimer));
+
+	// We should reset bLedBlinkInProgress if we cancel the LedControlTimer, 2005.03.10, by rcnjko.
+	pLed->bLedBlinkInProgress = _FALSE;
+}
+
+
+//
+//	Description:
+//		Turn on LED according to LedPin specified.
+//
+
+void
+SwLedOn(
+	_adapter			*padapter, 
+	PLED_871x		pLed
+);
+void
+SwLedOn(
+	_adapter			*padapter, 
+	PLED_871x		pLed
+)
+{
+	u8	LedCfg;
+
+	if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE))	
+	{
+		return;
+	}
+
+	//LedCfg = PlatformEFIORead1Byte(Adapter, LEDCFG);
+
+	switch(pLed->LedPin)
+	{
+		case LED_PIN_GPIO0:
+			break;
+
+		case LED_PIN_LED0:
+			LedCfg = rtw_read8(padapter, REG_LEDCFG2);
+			rtw_write8(padapter, REG_LEDCFG2, LedCfg&0xf0); // SW control led0 on.
+			//RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOn LED0\n"));
+			
+			break;
+
+		case LED_PIN_LED1:
+			LedCfg = rtw_read8(padapter, (REG_LEDCFG2 + 1));
+			rtw_write8(padapter, (REG_LEDCFG2 + 1), LedCfg&0x0f); // SW control led1 on.
+			//RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOn LED1\n"));
+			
+			break;
+
+		default:
+			break;
+	}
+
+	pLed->bLedOn = _TRUE;
+	
+}
+
+
+//
+//	Description:
+//		Turn off LED according to LedPin specified.
+//
+void
+SwLedOff(
+	_adapter			*padapter, 
+	PLED_871x		pLed
+);
+void
+SwLedOff(
+	_adapter			*padapter, 
+	PLED_871x		pLed
+)
+{
+	u8	LedCfg;
+
+	if((padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE))	
+	{
+             return;
+	}
+
+	//LedCfg = PlatformEFIORead1Byte(Adapter, LEDCFG);
+
+	switch(pLed->LedPin)
+	{
+		case LED_PIN_GPIO0:
+			break;
+
+		case LED_PIN_LED0:
+			LedCfg = rtw_read8(padapter, REG_LEDCFG2);
+			LedCfg &= 0xf0; // Set to software control.
+			rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3));
+			//RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOff LED0\n"));
+			
+			break;
+
+		case LED_PIN_LED1:
+			LedCfg = rtw_read8(padapter, (REG_LEDCFG2+1));
+			LedCfg &= 0x0f; // Set to software control.
+			rtw_write8(padapter, (REG_LEDCFG2+1), (LedCfg|BIT3));
+			//RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOff LED1\n"));
+			
+			break;
+
+		default:
+			break;
+	}
+
+	pLed->bLedOn = _FALSE;
+	
+}
+
+//
+//	Description:
+//		Implementation of LED blinking behavior.
+//		It toggle off LED and schedule corresponding timer if necessary.
+//
+void
+SwLedBlink(
+	PLED_871x			pLed
+	);
+void
+SwLedBlink(
+	PLED_871x			pLed
+	)
+{
+	_adapter			*padapter = pLed->padapter;
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	u8				bStopBlinking = _FALSE;
+
+	// Change LED according to BlinkingLedState specified.
+	if( pLed->BlinkingLedState == LED_ON ) 
+	{
+		SwLedOn(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes));
+	}
+	else 
+	{
+		SwLedOff(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,( "Blinktimes (%d): turn off\n", pLed->BlinkTimes));
+	}
+
+	// Determine if we shall change LED state again.
+	pLed->BlinkTimes--;
+	switch(pLed->CurrLedState)
+	{
+
+	case LED_BLINK_NORMAL: 
+		if(pLed->BlinkTimes == 0)
+		{
+			bStopBlinking = _TRUE;
+		}
+		break;
+		
+	case LED_BLINK_StartToBlink:
+		if( check_fwstate(pmlmepriv, _FW_LINKED) && check_fwstate(pmlmepriv, WIFI_STATION_STATE) )
+		{
+			bStopBlinking = _TRUE;
+		}
+		if( check_fwstate(pmlmepriv, _FW_LINKED) &&
+			(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) )
+		{
+			bStopBlinking = _TRUE;
+		}
+		else if(pLed->BlinkTimes == 0)
+		{
+			bStopBlinking = _TRUE;
+		}
+		break;
+
+	case LED_BLINK_WPS:
+		if( pLed->BlinkTimes == 0 )
+		{
+			bStopBlinking = _TRUE;
+		}
+		break;
+
+
+	default:
+		bStopBlinking = _TRUE;
+		break;
+			
+	}
+	
+	if(bStopBlinking)
+	{
+		if( padapter->pwrctrlpriv.rf_pwrstate != rf_on)
+		{
+			SwLedOff(padapter, pLed);
+		}
+		else if( (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && (pLed->bLedOn == _FALSE))
+		{
+			SwLedOn(padapter, pLed);
+		}
+		else if( (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) &&  pLed->bLedOn == _TRUE)
+		{
+			SwLedOff(padapter, pLed);
+		}
+
+		pLed->BlinkTimes = 0;
+		pLed->bLedBlinkInProgress = _FALSE;
+	}
+	else
+	{
+		// Assign LED state to toggle.
+		if( pLed->BlinkingLedState == LED_ON ) 
+			pLed->BlinkingLedState = LED_OFF;
+		else 
+			pLed->BlinkingLedState = LED_ON;
+
+		// Schedule a timer to toggle LED state. 
+		switch( pLed->CurrLedState )
+		{
+		case LED_BLINK_NORMAL:
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+			break;
+		
+		case LED_BLINK_SLOWLY:
+		case LED_BLINK_StartToBlink:
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
+			break;
+
+		case LED_BLINK_WPS:
+			{
+				if( pLed->BlinkingLedState == LED_ON )
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL);
+				else
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL);
+			}
+			break;
+
+		default:
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
+			break;
+		}
+	}
+}
+void
+SwLedBlink1(
+	PLED_871x			pLed
+	);
+void
+SwLedBlink1(
+	PLED_871x			pLed
+	)
+{
+	_adapter				*padapter = pLed->padapter;
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
+	struct led_priv		*ledpriv = &(padapter->ledpriv);
+	struct mlme_priv		*pmlmepriv = &(padapter->mlmepriv);
+	PLED_871x 			pLed1 = &(ledpriv->SwLed1);	
+	u8					bStopBlinking = _FALSE;
+
+	if(pHalData->CustomerID == RT_CID_819x_CAMEO)
+		pLed = &(ledpriv->SwLed1);	
+
+	// Change LED according to BlinkingLedState specified.
+	if( pLed->BlinkingLedState == LED_ON ) 
+	{
+		SwLedOn(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,( "Blinktimes (%d): turn on\n", pLed->BlinkTimes));
+	}
+	else 
+	{
+		SwLedOff(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes));
+	}
+
+
+	if(pHalData->CustomerID == RT_CID_DEFAULT)
+	{
+		if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
+		{
+			if(!pLed1->bSWLedCtrl)
+			{
+				SwLedOn(padapter, pLed1); 	
+				pLed1->bSWLedCtrl = _TRUE;
+			}
+			else if(!pLed1->bLedOn)	
+				SwLedOn(padapter, pLed1);
+			RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (): turn on pLed1\n"));
+		}
+		else 
+		{
+			if(!pLed1->bSWLedCtrl)
+			{
+				SwLedOff(padapter, pLed1);
+				pLed1->bSWLedCtrl = _TRUE;
+			}
+			else if(pLed1->bLedOn)
+				SwLedOff(padapter, pLed1);
+			RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (): turn off pLed1\n"));		
+		}
+	}
+
+	switch(pLed->CurrLedState)
+	{
+		case LED_BLINK_SLOWLY:			
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = LED_OFF; 
+			else
+				pLed->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+			break;
+
+		case LED_BLINK_NORMAL:
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = LED_OFF; 
+			else
+				pLed->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+			break;
+			
+		case LED_SCAN_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
+				{
+					pLed->bLedLinkBlinkInProgress = _TRUE;
+					pLed->CurrLedState = LED_BLINK_NORMAL;
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));
+					
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE)
+				{
+					pLed->bLedNoLinkBlinkInProgress = _TRUE;
+					pLed->CurrLedState = LED_BLINK_SLOWLY;
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}
+			else
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else
+				{
+					 if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF;
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+				}
+			}
+			break;
+
+		case LED_TXRX_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
+				{
+					pLed->bLedLinkBlinkInProgress = _TRUE;
+					pLed->CurrLedState = LED_BLINK_NORMAL;
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF;
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE)
+				{
+					pLed->bLedNoLinkBlinkInProgress = _TRUE;
+					pLed->CurrLedState = LED_BLINK_SLOWLY;
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				pLed->BlinkTimes = 0;
+				pLed->bLedBlinkInProgress = _FALSE;	
+			}
+			else
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else
+				{
+					 if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+				}
+			}
+			break;
+
+		case LED_BLINK_WPS:
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = LED_OFF; 
+			else
+				pLed->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			break;
+
+		case LED_BLINK_WPS_STOP:	//WPS success
+			if(pLed->BlinkingLedState == LED_ON)
+			{
+				pLed->BlinkingLedState = LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA);
+				bStopBlinking = _FALSE;
+			}
+			else
+			{
+				bStopBlinking = _TRUE;				
+			}
+			
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else 
+				{
+					pLed->bLedLinkBlinkInProgress = _TRUE;
+					pLed->CurrLedState = LED_BLINK_NORMAL;
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				pLed->bLedWPSBlinkInProgress = _FALSE;	
+			}		
+			break;
+					
+		default:
+			break;
+	}
+
+}
+void
+SwLedBlink2(
+	PLED_871x			pLed
+	);
+void
+SwLedBlink2(
+	PLED_871x			pLed
+	)
+{
+	_adapter				*padapter = pLed->padapter;
+	struct mlme_priv		*pmlmepriv = &(padapter->mlmepriv);
+	u8					bStopBlinking = _FALSE;
+
+	// Change LED according to BlinkingLedState specified.
+	if( pLed->BlinkingLedState == LED_ON) 
+	{
+		SwLedOn(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes));
+	}
+	else 
+	{
+		SwLedOff(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes));
+	}
+
+	switch(pLed->CurrLedState)
+	{	
+		case LED_SCAN_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
+				{
+					pLed->CurrLedState = LED_ON;
+					pLed->BlinkingLedState = LED_ON; 
+					SwLedOn(padapter, pLed);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop scan blink CurrLedState %d\n", pLed->CurrLedState));
+					
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE)
+				{
+					pLed->CurrLedState = LED_OFF;
+					pLed->BlinkingLedState = LED_OFF; 
+					SwLedOff(padapter, pLed);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop scan blink CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}
+			else
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else
+				{
+					 if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+				}
+			}
+			break;
+
+		case LED_TXRX_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
+				{
+					pLed->CurrLedState = LED_ON;
+					pLed->BlinkingLedState = LED_ON; 
+					SwLedOn(padapter, pLed);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop CurrLedState %d\n", pLed->CurrLedState));
+					
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE)
+				{
+					pLed->CurrLedState = LED_OFF;
+					pLed->BlinkingLedState = LED_OFF; 
+					SwLedOff(padapter, pLed);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				pLed->bLedBlinkInProgress = _FALSE;
+			}
+			else
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else
+				{
+					 if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+				}
+			}
+			break;
+					
+		default:
+			break;
+	}
+
+}
+void
+SwLedBlink3(
+	PLED_871x			pLed
+	);
+void
+SwLedBlink3(
+	PLED_871x			pLed
+	)
+{
+	_adapter			*padapter = pLed->padapter;
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	u8				bStopBlinking = _FALSE;
+
+	// Change LED according to BlinkingLedState specified.
+	if( pLed->BlinkingLedState == LED_ON ) 
+	{
+		SwLedOn(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes));
+	}
+	else 
+	{
+		if(pLed->CurrLedState != LED_BLINK_WPS_STOP)
+			SwLedOff(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes));
+	}	
+
+	switch(pLed->CurrLedState)
+	{			
+		case LED_SCAN_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
+				{
+					pLed->CurrLedState = LED_ON;
+					pLed->BlinkingLedState = LED_ON;				
+					if( !pLed->bLedOn )
+						SwLedOn(padapter, pLed);
+
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE)
+				{
+					pLed->CurrLedState = LED_OFF;
+					pLed->BlinkingLedState = LED_OFF;									
+					if( pLed->bLedOn )
+						SwLedOff(padapter, pLed);
+
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}
+			else
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else
+				{
+				 	if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+				}
+			}
+			break;
+
+		case LED_TXRX_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
+				{
+					pLed->CurrLedState = LED_ON;
+					pLed->BlinkingLedState = LED_ON;
+				
+					if( !pLed->bLedOn )
+						SwLedOn(padapter, pLed);
+
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE)
+				{
+					pLed->CurrLedState = LED_OFF;
+					pLed->BlinkingLedState = LED_OFF;					
+				
+					if( pLed->bLedOn )
+						SwLedOff(padapter, pLed);
+
+
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				pLed->bLedBlinkInProgress = _FALSE;	
+			}
+			else
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else
+				{
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+				}
+			}
+			break;
+
+		case LED_BLINK_WPS:
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = LED_OFF; 
+			else
+				pLed->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			break;
+
+		case LED_BLINK_WPS_STOP:	//WPS success
+			if(pLed->BlinkingLedState == LED_ON)
+			{
+				pLed->BlinkingLedState = LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA);
+				bStopBlinking = _FALSE;
+			}
+			else
+			{
+				bStopBlinking = _TRUE;				
+			}
+			
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on )
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else 
+				{
+					pLed->CurrLedState = LED_ON;
+					pLed->BlinkingLedState = LED_ON; 
+					SwLedOn(padapter, pLed);
+					RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));					
+				}
+				pLed->bLedWPSBlinkInProgress = _FALSE;	
+			}		
+			break;
+			
+					
+		default:
+			break;
+	}
+
+}
+void
+SwLedBlink4(
+	PLED_871x			pLed
+	);
+void
+SwLedBlink4(
+	PLED_871x			pLed
+	)
+{
+	_adapter			*padapter = pLed->padapter;
+	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	PLED_871x 		pLed1 = &(ledpriv->SwLed1);	
+	u8				bStopBlinking = _FALSE;
+
+	// Change LED according to BlinkingLedState specified.
+	if( pLed->BlinkingLedState == LED_ON ) 
+	{
+		SwLedOn(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes));
+	}
+	else 
+	{
+		SwLedOff(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes));
+	}	
+
+	if(!pLed1->bLedWPSBlinkInProgress && pLed1->BlinkingLedState == LED_UNKNOWN)
+	{
+		pLed1->BlinkingLedState = LED_OFF;
+		pLed1->CurrLedState = LED_OFF;
+		SwLedOff(padapter, pLed1);
+	}	
+
+	switch(pLed->CurrLedState)
+	{
+		case LED_BLINK_SLOWLY:			
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = LED_OFF; 
+			else
+				pLed->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+			break;
+
+		case LED_BLINK_StartToBlink:
+			if( pLed->bLedOn )
+			{
+				pLed->BlinkingLedState = LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
+			}
+			else
+			{
+				pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+			}
+			break;			
+			
+		case LED_SCAN_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _FALSE;
+			}
+			
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS)
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else 
+				{
+					pLed->bLedNoLinkBlinkInProgress = _FALSE;
+					pLed->CurrLedState = LED_BLINK_SLOWLY;
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+				}
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}
+			else
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS)
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else
+				{
+					 if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+				}
+			}
+			break;
+
+		case LED_TXRX_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS)
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else 
+				{
+					pLed->bLedNoLinkBlinkInProgress = _TRUE;
+					pLed->CurrLedState = LED_BLINK_SLOWLY;
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+				}
+				pLed->bLedBlinkInProgress = _FALSE;	
+			}
+			else
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS)
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else
+				{
+					 if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+				}
+			}
+			break;
+
+		case LED_BLINK_WPS:
+			if( pLed->bLedOn )
+			{
+				pLed->BlinkingLedState = LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
+			}
+			else
+			{
+				pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+			}
+			break;
+
+		case LED_BLINK_WPS_STOP:	//WPS authentication fail
+			if( pLed->bLedOn )			
+				pLed->BlinkingLedState = LED_OFF; 			
+			else			
+				pLed->BlinkingLedState = LED_ON;
+
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+			break;
+
+		case LED_BLINK_WPS_STOP_OVERLAP:	//WPS session overlap		
+			pLed->BlinkTimes--;
+			if(pLed->BlinkTimes == 0)
+			{
+				if(pLed->bLedOn)
+				{
+					pLed->BlinkTimes = 1;							
+				}
+				else
+				{
+					bStopBlinking = _TRUE;
+				}
+			}
+
+			if(bStopBlinking)
+			{				
+				pLed->BlinkTimes = 10;			
+				pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+			}
+			else
+			{
+				if( pLed->bLedOn )			
+					pLed->BlinkingLedState = LED_OFF;			
+				else			
+					pLed->BlinkingLedState = LED_ON;
+
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+			}
+			break;
+
+					
+		default:
+			break;
+	}
+
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink4 CurrLedState %d\n", pLed->CurrLedState));
+
+
+}
+void
+SwLedBlink5(
+	PLED_871x			pLed
+	);
+void
+SwLedBlink5(
+	PLED_871x			pLed
+	)
+{
+	_adapter			*padapter = pLed->padapter;
+	u8				bStopBlinking = _FALSE;
+
+	// Change LED according to BlinkingLedState specified.
+	if( pLed->BlinkingLedState == LED_ON ) 
+	{
+		SwLedOn(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes));
+	}
+	else 
+	{
+		SwLedOff(padapter, pLed);
+		RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes));
+	}
+
+	switch(pLed->CurrLedState)
+	{
+		case LED_SCAN_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS)
+				{
+					pLed->CurrLedState = LED_OFF;
+					pLed->BlinkingLedState = LED_OFF; 									
+					if(pLed->bLedOn)				
+						SwLedOff(padapter, pLed);
+				}
+				else 
+				{		pLed->CurrLedState = LED_ON;
+						pLed->BlinkingLedState = LED_ON;					
+						if(!pLed->bLedOn)
+							_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+				}
+
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}
+			else
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS)
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else
+				{
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+				}
+			}
+			break;
+
+	
+		case LED_TXRX_BLINK:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = _TRUE;
+			}
+			
+			if(bStopBlinking)
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS)
+				{
+					pLed->CurrLedState = LED_OFF;
+					pLed->BlinkingLedState = LED_OFF; 									
+					if(pLed->bLedOn)
+						SwLedOff(padapter, pLed);
+				}
+				else
+				{
+					pLed->CurrLedState = LED_ON;
+					pLed->BlinkingLedState = LED_ON; 					
+					if(!pLed->bLedOn)
+						_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+				}
+
+				pLed->bLedBlinkInProgress = _FALSE;	
+			}
+			else
+			{
+				if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS)
+				{
+					SwLedOff(padapter, pLed);
+				}
+				else
+				{
+					 if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+				}
+			}
+			break;
+					
+		default:
+			break;
+	}
+
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink5 CurrLedState %d\n", pLed->CurrLedState));
+
+
+}
+
+#ifndef PLATFORM_FREEBSD //amy temp remove
+//
+//	Description:
+//		Callback function of LED BlinkTimer, 
+//		it just schedules to corresponding BlinkWorkItem.
+//
+void
+BlinkTimerCallback(
+	unsigned long data
+	)
+{
+	PLED_871x	 pLed = (PLED_871x)data;
+	_adapter		*padapter = pLed->padapter;
+
+	 if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE))	
+       {
+             return;
+       }
+
+	_set_workitem(&(pLed->BlinkWorkItem));
+}
+
+
+//
+//	Description:
+//		Callback function of LED BlinkWorkItem.
+//		We dispatch acture LED blink action according to LedStrategy.
+//
+void BlinkWorkItemCallback(struct work_struct *work)
+{
+	PLED_871x	 pLed = container_of(work, LED_871x, BlinkWorkItem);
+	struct led_priv	*ledpriv = &(pLed->padapter->ledpriv);
+	_adapter		*padapter = pLed->padapter;
+
+	 if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE))	
+       {
+             return;
+       }
+
+	switch(ledpriv->LedStrategy)
+	{
+		case SW_LED_MODE0:
+			SwLedBlink(pLed);
+			break;
+		
+		case SW_LED_MODE1:
+			SwLedBlink1(pLed);
+			break;
+		
+		case SW_LED_MODE2:
+			SwLedBlink2(pLed);
+			break;
+			
+		case SW_LED_MODE3:
+			SwLedBlink3(pLed);
+			break;
+
+		case SW_LED_MODE4:
+			SwLedBlink4(pLed);
+			break;			
+
+		case SW_LED_MODE5:
+			SwLedBlink5(pLed);
+			break;
+
+		default:
+			SwLedBlink(pLed);
+			break;
+	}
+}
+#endif //PLATFORM_FREEBSD,amy temp remove
+
+
+//================================================================================
+// Default LED behavior.
+//================================================================================
+
+//
+//	Description:	
+//		Implement each led action for SW_LED_MODE0.
+//		This is default strategy.
+//
+void
+SwLedControlMode0(
+	_adapter		*padapter,
+	LED_CTL_MODE		LedAction
+);
+void
+SwLedControlMode0(
+	_adapter		*padapter,
+	LED_CTL_MODE		LedAction
+)
+{
+	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	PLED_871x	pLed = &(ledpriv->SwLed1);
+
+	// Decide led state
+	switch(LedAction)
+	{
+	case LED_CTL_TX:
+	case LED_CTL_RX:
+		if( pLed->bLedBlinkInProgress == _FALSE )
+		{
+			pLed->bLedBlinkInProgress = _TRUE;
+
+			pLed->CurrLedState = LED_BLINK_NORMAL;
+			pLed->BlinkTimes = 2;
+
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = LED_OFF; 
+			else
+				pLed->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+		}
+		break;
+
+	case LED_CTL_START_TO_LINK:
+		if( pLed->bLedBlinkInProgress == _FALSE )
+		{
+			pLed->bLedBlinkInProgress = _TRUE;
+
+			pLed->CurrLedState = LED_BLINK_StartToBlink;
+			pLed->BlinkTimes = 24;
+
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = LED_OFF; 
+			else
+				pLed->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
+		}
+		else
+		{
+			pLed->CurrLedState = LED_BLINK_StartToBlink;
+		}	
+		break;
+		
+	case LED_CTL_LINK:
+		pLed->CurrLedState = LED_ON;
+		if( pLed->bLedBlinkInProgress == _FALSE )
+		{
+			SwLedOn(padapter, pLed);
+		}
+		break;
+
+	case LED_CTL_NO_LINK:
+		pLed->CurrLedState = LED_OFF;
+		if( pLed->bLedBlinkInProgress == _FALSE )
+		{
+			SwLedOff(padapter, pLed);
+		}
+		break;
+	
+	case LED_CTL_POWER_OFF:
+		pLed->CurrLedState = LED_OFF;
+		pLed->BlinkingLedState = LED_OFF;
+
+		if(pLed->bLedBlinkInProgress)
+		{
+			_cancel_timer_ex(&(pLed->BlinkTimer));
+			pLed->bLedBlinkInProgress = _FALSE;
+		}
+		SwLedOff(padapter, pLed);
+		break;
+
+	case LED_CTL_START_WPS:
+		if( pLed->bLedBlinkInProgress == _FALSE || pLed->CurrLedState == LED_ON)
+		{
+			pLed->bLedBlinkInProgress = _TRUE;
+
+			pLed->CurrLedState = LED_BLINK_WPS;
+			pLed->BlinkTimes = 20;
+
+			if( pLed->bLedOn )
+			{
+				pLed->BlinkingLedState = LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL);
+			}
+			else
+			{
+				pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL);
+			}
+		}
+		break;
+
+	case LED_CTL_STOP_WPS:
+		if(pLed->bLedBlinkInProgress)
+		{
+			pLed->CurrLedState = LED_OFF;
+			_cancel_timer_ex(&(pLed->BlinkTimer));
+			pLed->bLedBlinkInProgress = _FALSE;
+		}
+		break;
+		
+
+	default:
+		break;
+	}
+	
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState));
+	
+}
+
+ //ALPHA, added by chiyoko, 20090106
+void
+SwLedControlMode1(
+	_adapter		*padapter,
+	LED_CTL_MODE		LedAction
+);
+void
+SwLedControlMode1(
+	_adapter		*padapter,
+	LED_CTL_MODE		LedAction
+)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
+	struct led_priv		*ledpriv = &(padapter->ledpriv);
+	PLED_871x			pLed = &(ledpriv->SwLed0);
+	struct mlme_priv		*pmlmepriv = &(padapter->mlmepriv);
+
+	if(pHalData->CustomerID == RT_CID_819x_CAMEO)
+		pLed = &(ledpriv->SwLed1);
+	
+	switch(LedAction)
+	{
+		case LED_CTL_START_TO_LINK:	
+		case LED_CTL_NO_LINK:
+			if( pLed->bLedNoLinkBlinkInProgress == _FALSE )
+			{
+				if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
+				{
+					return;
+				}
+				if( pLed->bLedLinkBlinkInProgress == _TRUE )
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedLinkBlinkInProgress = _FALSE;
+				}
+	 			if(pLed->bLedBlinkInProgress ==_TRUE)
+				{	
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+	 			}
+				
+				pLed->bLedNoLinkBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_BLINK_SLOWLY;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+			}
+			break;		
+
+		case LED_CTL_LINK:
+			if( pLed->bLedLinkBlinkInProgress == _FALSE )
+			{
+				if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
+				{
+					return;
+				}
+				if(pLed->bLedNoLinkBlinkInProgress == _TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedNoLinkBlinkInProgress = _FALSE;
+				}
+				if(pLed->bLedBlinkInProgress ==_TRUE)
+				{	
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+	 			}
+				pLed->bLedLinkBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_BLINK_NORMAL;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+			}
+			break;
+
+		case LED_CTL_SITE_SURVEY:
+			 if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE))
+			 	;		 
+			 else if(pLed->bLedScanBlinkInProgress ==_FALSE)
+			 {
+			 	if(IS_LED_WPS_BLINKING(pLed))
+					return;
+				
+	  			if(pLed->bLedNoLinkBlinkInProgress == _TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedNoLinkBlinkInProgress = _FALSE;
+				}
+				if( pLed->bLedLinkBlinkInProgress == _TRUE )
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					 pLed->bLedLinkBlinkInProgress = _FALSE;
+				}
+	 			if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				pLed->bLedScanBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_SCAN_BLINK;
+				pLed->BlinkTimes = 24;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			 }
+			break;
+		
+		case LED_CTL_TX:
+		case LED_CTL_RX:
+	 		if(pLed->bLedBlinkInProgress ==_FALSE)
+	  		{
+                            if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
+                            {
+					return;
+                            }
+                            if(pLed->bLedNoLinkBlinkInProgress == _TRUE)
+                            {
+                                _cancel_timer_ex(&(pLed->BlinkTimer));
+                                pLed->bLedNoLinkBlinkInProgress = _FALSE;
+                            }
+                            if( pLed->bLedLinkBlinkInProgress == _TRUE )
+                            {
+                                _cancel_timer_ex(&(pLed->BlinkTimer));
+                                pLed->bLedLinkBlinkInProgress = _FALSE;
+                            }
+                            pLed->bLedBlinkInProgress = _TRUE;
+                            pLed->CurrLedState = LED_TXRX_BLINK;
+                            pLed->BlinkTimes = 2;
+                            if( pLed->bLedOn )
+                                pLed->BlinkingLedState = LED_OFF; 
+                            else
+                                pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+			}
+			break;
+
+		case LED_CTL_START_WPS: //wait until xinpin finish
+		case LED_CTL_START_WPS_BOTTON:
+			 if(pLed->bLedWPSBlinkInProgress ==_FALSE)
+			 {
+				if(pLed->bLedNoLinkBlinkInProgress == _TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedNoLinkBlinkInProgress = _FALSE;
+				}
+				if( pLed->bLedLinkBlinkInProgress == _TRUE )
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					 pLed->bLedLinkBlinkInProgress = _FALSE;
+				}
+				if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				if(pLed->bLedScanBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedScanBlinkInProgress = _FALSE;
+				}				
+				pLed->bLedWPSBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_BLINK_WPS;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			 }
+			break;
+
+		
+		case LED_CTL_STOP_WPS:
+			if(pLed->bLedNoLinkBlinkInProgress == _TRUE)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedNoLinkBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedLinkBlinkInProgress == _TRUE )
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				 pLed->bLedLinkBlinkInProgress = _FALSE;
+			}
+			if(pLed->bLedBlinkInProgress ==_TRUE)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = _FALSE;
+			}
+			if(pLed->bLedScanBlinkInProgress ==_TRUE)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}			
+			if(pLed->bLedWPSBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+			}
+			else
+			{
+				pLed->bLedWPSBlinkInProgress = _TRUE;
+			}
+			
+			pLed->CurrLedState = LED_BLINK_WPS_STOP;
+			if(pLed->bLedOn)
+			{
+				pLed->BlinkingLedState = LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA);
+			}
+			else
+			{
+				pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), 0);
+			}					
+			break;		
+
+		case LED_CTL_STOP_WPS_FAIL:			
+			if(pLed->bLedWPSBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;				
+			}			
+
+			pLed->bLedNoLinkBlinkInProgress = _TRUE;
+			pLed->CurrLedState = LED_BLINK_SLOWLY;
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = LED_OFF;
+			else
+				pLed->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+			break;				
+
+		case LED_CTL_POWER_OFF:
+			pLed->CurrLedState = LED_OFF;
+			pLed->BlinkingLedState = LED_OFF;
+
+			if( pLed->bLedNoLinkBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedNoLinkBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedLinkBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedLinkBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedWPSBlinkInProgress )
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedScanBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}			
+
+			SwLedOff(padapter, pLed);
+			break;
+			
+		default:
+			break;
+
+	}
+
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState));
+}
+
+ //Arcadyan/Sitecom , added by chiyoko, 20090216
+void
+SwLedControlMode2(
+	_adapter				*padapter,
+	LED_CTL_MODE		LedAction
+);
+void
+SwLedControlMode2(
+	_adapter				*padapter,
+	LED_CTL_MODE		LedAction
+)
+{
+	struct led_priv	 *ledpriv = &(padapter->ledpriv);
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	PLED_871x 		pLed = &(ledpriv->SwLed0);
+	
+	switch(LedAction)
+	{		
+		case LED_CTL_SITE_SURVEY:
+			 if(pmlmepriv->LinkDetectInfo.bBusyTraffic)
+			 	;		 
+			 else if(pLed->bLedScanBlinkInProgress ==_FALSE)
+			 {
+			 	if(IS_LED_WPS_BLINKING(pLed))
+					return;
+			 
+	 			if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				pLed->bLedScanBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_SCAN_BLINK;
+				pLed->BlinkTimes = 24;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			 }
+			break;
+		
+		case LED_CTL_TX:
+		case LED_CTL_RX:
+	 		if((pLed->bLedBlinkInProgress ==_FALSE) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE))
+	  		{
+	  		  	if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
+				{
+					return;
+				}
+
+				pLed->bLedBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_TXRX_BLINK;
+				pLed->BlinkTimes = 2;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+			}
+			break;
+
+		case LED_CTL_LINK:
+			pLed->CurrLedState = LED_ON;
+			pLed->BlinkingLedState = LED_ON;
+			if( pLed->bLedBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedScanBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}			
+
+			_set_timer(&(pLed->BlinkTimer), 0);
+			break;			
+
+		case LED_CTL_START_WPS: //wait until xinpin finish
+		case LED_CTL_START_WPS_BOTTON:		
+			if(pLed->bLedWPSBlinkInProgress ==_FALSE)
+			{
+				if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				if(pLed->bLedScanBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedScanBlinkInProgress = _FALSE;
+				}				
+				pLed->bLedWPSBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_ON;
+				pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), 0);
+			 }			
+			break;
+			
+		case LED_CTL_STOP_WPS:
+			pLed->bLedWPSBlinkInProgress = _FALSE;
+			if(padapter->pwrctrlpriv.rf_pwrstate != rf_on)
+			{
+				SwLedOff(padapter, pLed);
+			}
+			else
+			{
+				pLed->CurrLedState = LED_ON;
+				pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), 0);
+				RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));
+			}
+			break;
+			
+		case LED_CTL_STOP_WPS_FAIL:			
+			pLed->bLedWPSBlinkInProgress = _FALSE;			
+			if(padapter->pwrctrlpriv.rf_pwrstate != rf_on)
+			{
+				SwLedOff(padapter, pLed);
+			}
+			else 
+			{
+				pLed->CurrLedState = LED_OFF;
+				pLed->BlinkingLedState = LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), 0);
+				RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); 				
+			}	
+			break;				
+
+		case LED_CTL_START_TO_LINK: 
+		case LED_CTL_NO_LINK:
+			if(!IS_LED_BLINKING(pLed))
+			{
+				pLed->CurrLedState = LED_OFF;
+				pLed->BlinkingLedState = LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), 0);
+			}
+			break;
+			
+		case LED_CTL_POWER_OFF:
+			pLed->CurrLedState = LED_OFF;
+			pLed->BlinkingLedState = LED_OFF;
+			if( pLed->bLedBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedScanBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}			
+			if( pLed->bLedWPSBlinkInProgress )
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;
+			}
+
+			_set_timer(&(pLed->BlinkTimer), 0);
+			break;
+			
+		default:
+			break;
+
+	}
+
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));
+}
+
+  //COREGA, added by chiyoko, 20090316
+ void
+ SwLedControlMode3(
+	_adapter				*padapter,
+	LED_CTL_MODE		LedAction
+);
+ void
+ SwLedControlMode3(
+	_adapter				*padapter,
+	LED_CTL_MODE		LedAction
+)
+{
+	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	PLED_871x		pLed = &(ledpriv->SwLed0);
+	
+	switch(LedAction)
+	{		
+		case LED_CTL_SITE_SURVEY:
+			if(pmlmepriv->LinkDetectInfo.bBusyTraffic)
+				;		 
+			else if(pLed->bLedScanBlinkInProgress ==_FALSE)
+			{
+				if(IS_LED_WPS_BLINKING(pLed))
+					return;
+
+				if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				pLed->bLedScanBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_SCAN_BLINK;
+				pLed->BlinkTimes = 24;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			}
+			break;
+		
+		case LED_CTL_TX:
+		case LED_CTL_RX:
+	 		if((pLed->bLedBlinkInProgress ==_FALSE) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE))
+	  		{
+	  		  	if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
+				{
+					return;
+				}
+
+				pLed->bLedBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_TXRX_BLINK;
+				pLed->BlinkTimes = 2;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+			}
+			break;
+
+		case LED_CTL_LINK:
+			if(IS_LED_WPS_BLINKING(pLed))
+				return;
+			
+			pLed->CurrLedState = LED_ON;
+			pLed->BlinkingLedState = LED_ON;
+			if( pLed->bLedBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedScanBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}			
+
+			_set_timer(&(pLed->BlinkTimer), 0);
+			break;			
+
+		case LED_CTL_START_WPS: //wait until xinpin finish
+		case LED_CTL_START_WPS_BOTTON:		
+			if(pLed->bLedWPSBlinkInProgress ==_FALSE)
+			{
+				if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				if(pLed->bLedScanBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedScanBlinkInProgress = _FALSE;
+				}				
+				pLed->bLedWPSBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_BLINK_WPS;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			}			
+			break;
+			
+		case LED_CTL_STOP_WPS:			
+			if(pLed->bLedWPSBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;				
+			}						
+			else
+			{
+				pLed->bLedWPSBlinkInProgress = _TRUE;
+			}
+				
+			pLed->CurrLedState = LED_BLINK_WPS_STOP;
+			if(pLed->bLedOn)
+			{
+				pLed->BlinkingLedState = LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA);
+			}
+			else
+			{
+				pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), 0);
+			}					
+
+			break;
+			
+		case LED_CTL_STOP_WPS_FAIL:			
+			if(pLed->bLedWPSBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;				
+			}			
+
+			pLed->CurrLedState = LED_OFF;
+			pLed->BlinkingLedState = LED_OFF;
+			_set_timer(&(pLed->BlinkTimer), 0);
+			break;				
+
+		case LED_CTL_START_TO_LINK: 
+		case LED_CTL_NO_LINK:
+			if(!IS_LED_BLINKING(pLed))
+			{
+				pLed->CurrLedState = LED_OFF;
+				pLed->BlinkingLedState = LED_OFF;
+				_set_timer(&(pLed->BlinkTimer), 0);
+			}
+			break;
+			
+		case LED_CTL_POWER_OFF:
+			pLed->CurrLedState = LED_OFF;
+			pLed->BlinkingLedState = LED_OFF;
+			if( pLed->bLedBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedScanBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}			
+			if( pLed->bLedWPSBlinkInProgress )
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;
+			}
+
+			_set_timer(&(pLed->BlinkTimer), 0);
+			break;
+			
+		default:
+			break;
+
+	}
+
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState));
+}
+
+
+ //Edimax-Belkin, added by chiyoko, 20090413
+void
+SwLedControlMode4(
+	_adapter				*padapter,
+	LED_CTL_MODE		LedAction
+);
+void
+SwLedControlMode4(
+	_adapter				*padapter,
+	LED_CTL_MODE		LedAction
+)
+{
+	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	PLED_871x		pLed = &(ledpriv->SwLed0);
+	PLED_871x		pLed1 = &(ledpriv->SwLed1);
+	
+	switch(LedAction)
+	{		
+		case LED_CTL_START_TO_LINK:	
+			if(pLed1->bLedWPSBlinkInProgress)
+			{
+				pLed1->bLedWPSBlinkInProgress = _FALSE;
+				_cancel_timer_ex(&(pLed1->BlinkTimer));
+		
+				pLed1->BlinkingLedState = LED_OFF;
+				pLed1->CurrLedState = LED_OFF;
+
+				if(pLed1->bLedOn)
+					_set_timer(&(pLed->BlinkTimer), 0);
+			}
+				
+			if( pLed->bLedStartToLinkBlinkInProgress == _FALSE )
+			{
+				if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
+				{
+					return;
+				}
+	 			if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+	 			}
+	 			if(pLed->bLedNoLinkBlinkInProgress ==_TRUE)
+				{	
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedNoLinkBlinkInProgress = _FALSE;
+	 			}				
+				
+				pLed->bLedStartToLinkBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_BLINK_StartToBlink;
+				if( pLed->bLedOn )
+				{
+					pLed->BlinkingLedState = LED_OFF;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
+				}
+				else
+				{
+					pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+				}
+			}
+			break;		
+
+		case LED_CTL_LINK:			
+		case LED_CTL_NO_LINK:
+			//LED1 settings
+			if(LedAction == LED_CTL_LINK)
+			{
+				if(pLed1->bLedWPSBlinkInProgress)
+				{
+					pLed1->bLedWPSBlinkInProgress = _FALSE;
+					_cancel_timer_ex(&(pLed1->BlinkTimer));
+			
+					pLed1->BlinkingLedState = LED_OFF;
+					pLed1->CurrLedState = LED_OFF;
+
+					if(pLed1->bLedOn)
+						_set_timer(&(pLed->BlinkTimer), 0);
+				}				
+			}
+			
+			if( pLed->bLedNoLinkBlinkInProgress == _FALSE )
+			{
+				if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
+				{
+					return;
+				}
+	 			if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+	 			}
+				
+				pLed->bLedNoLinkBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_BLINK_SLOWLY;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+			}
+			break;		
+
+		case LED_CTL_SITE_SURVEY:
+			if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE))
+				;		 
+			else if(pLed->bLedScanBlinkInProgress ==_FALSE)
+			{
+				if(IS_LED_WPS_BLINKING(pLed))
+					return;
+
+				if(pLed->bLedNoLinkBlinkInProgress == _TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedNoLinkBlinkInProgress = _FALSE;
+				}
+				if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				pLed->bLedScanBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_SCAN_BLINK;
+				pLed->BlinkTimes = 24;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			}
+			break;
+		
+		case LED_CTL_TX:
+		case LED_CTL_RX:
+	 		if(pLed->bLedBlinkInProgress ==_FALSE)
+	  		{
+	  		  	if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
+				{
+					return;
+				}
+	  		  	if(pLed->bLedNoLinkBlinkInProgress == _TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedNoLinkBlinkInProgress = _FALSE;
+				}
+				pLed->bLedBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_TXRX_BLINK;
+				pLed->BlinkTimes = 2;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+			}
+			break;
+
+		case LED_CTL_START_WPS: //wait until xinpin finish
+		case LED_CTL_START_WPS_BOTTON:
+			if(pLed1->bLedWPSBlinkInProgress)
+			{
+				pLed1->bLedWPSBlinkInProgress = _FALSE;
+				_cancel_timer_ex(&(pLed1->BlinkTimer));
+			
+				pLed1->BlinkingLedState = LED_OFF;
+				pLed1->CurrLedState = LED_OFF;
+
+				if(pLed1->bLedOn)
+					_set_timer(&(pLed->BlinkTimer), 0);
+			}
+				
+			if(pLed->bLedWPSBlinkInProgress ==_FALSE)
+			{
+				if(pLed->bLedNoLinkBlinkInProgress == _TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedNoLinkBlinkInProgress = _FALSE;
+				}
+				if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				if(pLed->bLedScanBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedScanBlinkInProgress = _FALSE;
+				}				
+				pLed->bLedWPSBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_BLINK_WPS;
+				if( pLed->bLedOn )
+				{
+					pLed->BlinkingLedState = LED_OFF;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
+				}
+				else
+				{
+					pLed->BlinkingLedState = LED_ON;
+					_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+				}
+			}
+			break;
+		
+		case LED_CTL_STOP_WPS:	//WPS connect success		
+			if(pLed->bLedWPSBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;								
+			}
+
+			pLed->bLedNoLinkBlinkInProgress = _TRUE;
+			pLed->CurrLedState = LED_BLINK_SLOWLY;
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = LED_OFF; 
+			else
+				pLed->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+
+			break;		
+
+		case LED_CTL_STOP_WPS_FAIL:		//WPS authentication fail			
+			if(pLed->bLedWPSBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;				
+			}			
+
+			pLed->bLedNoLinkBlinkInProgress = _TRUE;
+			pLed->CurrLedState = LED_BLINK_SLOWLY;
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = LED_OFF; 
+			else
+				pLed->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+
+			//LED1 settings
+			if(pLed1->bLedWPSBlinkInProgress)
+				_cancel_timer_ex(&(pLed1->BlinkTimer));
+			else	
+				pLed1->bLedWPSBlinkInProgress = _TRUE;				
+
+			pLed1->CurrLedState = LED_BLINK_WPS_STOP;
+			if( pLed1->bLedOn )
+				pLed1->BlinkingLedState = LED_OFF; 
+			else
+				pLed1->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+
+			break;				
+
+		case LED_CTL_STOP_WPS_FAIL_OVERLAP:	//WPS session overlap		
+			if(pLed->bLedWPSBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;								
+			}
+			
+			pLed->bLedNoLinkBlinkInProgress = _TRUE;
+			pLed->CurrLedState = LED_BLINK_SLOWLY;
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = LED_OFF; 
+			else
+				pLed->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+
+			//LED1 settings
+			if(pLed1->bLedWPSBlinkInProgress)
+				_cancel_timer_ex(&(pLed1->BlinkTimer));
+			else	
+				pLed1->bLedWPSBlinkInProgress = _TRUE;				
+
+			pLed1->CurrLedState = LED_BLINK_WPS_STOP_OVERLAP;
+			pLed1->BlinkTimes = 10;
+			if( pLed1->bLedOn )
+				pLed1->BlinkingLedState = LED_OFF; 
+			else
+				pLed1->BlinkingLedState = LED_ON;
+			_set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+			
+			break;
+
+		case LED_CTL_POWER_OFF:
+			pLed->CurrLedState = LED_OFF;
+			pLed->BlinkingLedState = LED_OFF; 
+			
+			if( pLed->bLedNoLinkBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedNoLinkBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedLinkBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedLinkBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedWPSBlinkInProgress )
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedWPSBlinkInProgress = _FALSE;
+			}
+			if( pLed->bLedScanBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedScanBlinkInProgress = _FALSE;
+			}	
+			if( pLed->bLedStartToLinkBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedStartToLinkBlinkInProgress = _FALSE;
+			}			
+
+			if( pLed1->bLedWPSBlinkInProgress )
+			{
+				_cancel_timer_ex(&(pLed1->BlinkTimer));
+				pLed1->bLedWPSBlinkInProgress = _FALSE;
+			}
+
+			pLed1->BlinkingLedState = LED_UNKNOWN;				
+			SwLedOff(padapter, pLed);
+			SwLedOff(padapter, pLed1);			
+			break;
+			
+		default:
+			break;
+
+	}
+
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState));
+}
+
+
+
+ //Sercomm-Belkin, added by chiyoko, 20090415
+void
+SwLedControlMode5(
+	_adapter				*padapter,
+	LED_CTL_MODE		LedAction
+);
+void
+SwLedControlMode5(
+	_adapter				*padapter,
+	LED_CTL_MODE		LedAction
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct led_priv	*ledpriv = &(padapter->ledpriv);
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	PLED_871x		pLed = &(ledpriv->SwLed0);
+
+	if(pHalData->EEPROMCustomerID == RT_CID_819x_CAMEO)
+		pLed = &(ledpriv->SwLed1);
+	
+	switch(LedAction)
+	{		
+		case LED_CTL_POWER_ON:
+		case LED_CTL_NO_LINK:
+		case LED_CTL_LINK: 	//solid blue
+			pLed->CurrLedState = LED_ON;
+			pLed->BlinkingLedState = LED_ON; 
+
+			_set_timer(&(pLed->BlinkTimer), 0);
+			break;
+
+		case LED_CTL_SITE_SURVEY:
+			if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE))
+				;		 
+			else if(pLed->bLedScanBlinkInProgress ==_FALSE)
+			{				
+				if(pLed->bLedBlinkInProgress ==_TRUE)
+				{
+					_cancel_timer_ex(&(pLed->BlinkTimer));
+					pLed->bLedBlinkInProgress = _FALSE;
+				}
+				pLed->bLedScanBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_SCAN_BLINK;
+				pLed->BlinkTimes = 24;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+			}
+			break;
+		
+		case LED_CTL_TX:
+		case LED_CTL_RX:
+	 		if(pLed->bLedBlinkInProgress ==_FALSE)
+	  		{
+	  		  	if(pLed->CurrLedState == LED_SCAN_BLINK)
+				{
+					return;
+				}			
+				pLed->bLedBlinkInProgress = _TRUE;
+				pLed->CurrLedState = LED_TXRX_BLINK;
+				pLed->BlinkTimes = 2;
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON;
+				_set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+			}
+			break;				
+
+		case LED_CTL_POWER_OFF:
+			pLed->CurrLedState = LED_OFF;
+			pLed->BlinkingLedState = LED_OFF; 
+
+			if( pLed->bLedBlinkInProgress)
+			{
+				_cancel_timer_ex(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = _FALSE;
+			}			
+				
+			SwLedOff(padapter, pLed);
+			break;
+			
+		default:
+			break;
+
+	}
+
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState));
+}
+
+
+//
+//	Description:	
+//		Dispatch LED action according to pHalData->LedStrategy. 
+//
+void
+LedControl871x(
+	_adapter				*padapter,
+	LED_CTL_MODE		LedAction
+	);
+void
+LedControl871x(
+	_adapter				*padapter,
+	LED_CTL_MODE		LedAction
+	)
+{
+	struct led_priv	*ledpriv = &(padapter->ledpriv);
+
+       if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE))	
+       {
+             return;
+       }
+
+	if( ledpriv->bRegUseLed == _FALSE)
+		return;
+
+	//if (!priv->up)
+	//	return;
+
+	//if(priv->bInHctTest)
+	//	return;
+	
+	if(	padapter->pwrctrlpriv.rf_pwrstate != rf_on && 
+		(LedAction == LED_CTL_TX || LedAction == LED_CTL_RX || 
+		 LedAction == LED_CTL_SITE_SURVEY || 
+		 LedAction == LED_CTL_LINK || 
+		 LedAction == LED_CTL_NO_LINK ||
+		 LedAction == LED_CTL_POWER_ON) )
+	{
+		return;
+	}
+	
+	switch(ledpriv->LedStrategy)
+	{
+		case SW_LED_MODE0:
+			//SwLedControlMode0(padapter, LedAction);
+			break;
+
+		case SW_LED_MODE1:
+			SwLedControlMode1(padapter, LedAction);
+			break;
+
+		case SW_LED_MODE2:
+			SwLedControlMode2(padapter, LedAction);
+                	break;
+
+		case SW_LED_MODE3:
+			SwLedControlMode3(padapter, LedAction);
+			break;	
+
+		case SW_LED_MODE4:
+			SwLedControlMode4(padapter, LedAction);
+			break;			
+
+		case SW_LED_MODE5:
+			SwLedControlMode5(padapter, LedAction);
+			break;
+
+		default:
+			break;
+	}
+	
+	RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("LedStrategy:%d, LedAction %d\n", ledpriv->LedStrategy,LedAction));
+}
+
+//================================================================================
+// Interface to manipulate LED objects.
+//================================================================================
+
+//
+//	Description:
+//		Initialize all LED_871x objects.
+//
+void
+rtl8192du_InitSwLeds(
+	_adapter	*padapter
+	);
+void
+rtl8192du_InitSwLeds(
+	_adapter	*padapter
+	)
+{
+	struct led_priv *pledpriv = &(padapter->ledpriv);
+
+	pledpriv->LedControlHandler = LedControl871x;
+
+	InitLed871x(padapter, &(pledpriv->SwLed0), LED_PIN_LED0);
+
+	InitLed871x(padapter,&(pledpriv->SwLed1), LED_PIN_LED1);
+}
+
+
+//
+//	Description:
+//		DeInitialize all LED_819xUsb objects.
+//
+void
+rtl8192du_DeInitSwLeds(
+	_adapter	*padapter
+	);
+void
+rtl8192du_DeInitSwLeds(
+	_adapter	*padapter
+	)
+{
+	struct led_priv	*ledpriv = &(padapter->ledpriv);
+
+	DeInitLed871x( &(ledpriv->SwLed0) );
+	DeInitLed871x( &(ledpriv->SwLed1) );
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/rtl8192du_recv.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/rtl8192du_recv.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/rtl8192du_recv.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/rtl8192du_recv.c	2017-09-23 03:42:49.982675174 +0800
@@ -0,0 +1,282 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _RTL8192DU_RECV_C_
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <recv_osdep.h>
+#include <mlme_osdep.h>
+#include <ip.h>
+#include <if_ether.h>
+#include <ethernet.h>
+
+#ifdef CONFIG_USB_HCI
+#include <usb_ops.h>
+#endif
+
+#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
+
+#error "Shall be Linux or Windows, but not both!\n"
+
+#endif
+
+#include <wifi.h>
+#include <circ_buf.h>
+
+#include <rtl8192d_hal.h>
+
+void rtl8192du_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf)
+{
+
+	precvbuf->transfer_len = 0;
+
+	precvbuf->len = 0;
+
+	precvbuf->ref_cnt = 0;
+
+	if(precvbuf->pbuf)
+	{
+		precvbuf->pdata = precvbuf->phead = precvbuf->ptail = precvbuf->pbuf;
+		precvbuf->pend = precvbuf->pdata + MAX_RECVBUF_SZ;
+	}
+
+}
+
+int	rtl8192du_init_recv_priv(_adapter *padapter)
+{
+	struct recv_priv	*precvpriv = &padapter->recvpriv;
+	int	i, res = _SUCCESS;
+	struct recv_buf *precvbuf;
+
+#ifdef CONFIG_RECV_THREAD_MODE	
+	_rtw_init_sema(&precvpriv->recv_sema, 0);//will be removed
+	_rtw_init_sema(&precvpriv->terminate_recvthread_sema, 0);//will be removed
+#endif //CONFIG_RECV_THREAD_MODE
+
+#ifdef PLATFORM_LINUX
+	tasklet_init(&precvpriv->recv_tasklet,
+	     (void(*)(unsigned long))rtl8192du_recv_tasklet,
+	     (unsigned long)padapter);
+
+#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX
+	_rtw_init_queue(&precvpriv->recv_buf_pending_queue);
+#endif	// CONFIG_USE_USB_BUFFER_ALLOC_RX
+#endif	// PLATFORM_LINUX
+
+#ifdef PLATFORM_FREEBSD
+	TASK_INIT(&precvpriv->recv_tasklet, 0, rtl8192du_recv_tasklet, padapter);
+#ifdef CONFIG_RX_INDICATE_QUEUE
+	TASK_INIT(&precvpriv->rx_indicate_tasklet, 0, rtw_rx_indicate_tasklet, padapter);
+#endif	// CONFIG_RX_INDICATE_QUEUE
+#endif	// PLATFORM_FREEBSD
+
+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
+
+#ifdef PLATFORM_LINUX
+	precvpriv->int_in_urb = usb_alloc_urb(0, GFP_KERNEL);
+	if(precvpriv->int_in_urb == NULL){
+		DBG_8192C("alloc_urb for interrupt in endpoint fail !!!!\n");
+	}
+#endif //PLATFORM_LINUX
+	precvpriv->int_in_buf = rtw_malloc(sizeof(INTERRUPT_MSG_FORMAT_EX));
+	if(precvpriv->int_in_buf == NULL){
+		DBG_8192C("alloc_mem for interrupt in endpoint fail !!!!\n");
+	}
+#endif //CONFIG_USB_INTERRUPT_IN_PIPE
+
+	//init recv_buf
+	_rtw_init_queue(&precvpriv->free_recv_buf_queue);
+
+	precvpriv->pallocated_recv_buf = rtw_zmalloc(NR_RECVBUFF *sizeof(struct recv_buf) + 4);
+	if(precvpriv->pallocated_recv_buf==NULL){
+		res= _FAIL;
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("alloc recv_buf fail!\n"));
+		goto exit;
+	}
+
+	precvpriv->precv_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(precvpriv->pallocated_recv_buf), 4);
+
+	precvbuf = (struct recv_buf*)precvpriv->precv_buf;
+
+	for(i=0; i < NR_RECVBUFF ; i++)
+	{
+		_rtw_init_listhead(&precvbuf->list);
+
+		_rtw_spinlock_init(&precvbuf->recvbuf_lock);
+
+		precvbuf->alloc_sz = MAX_RECVBUF_SZ;
+
+		res = rtw_os_recvbuf_resource_alloc(padapter, precvbuf);
+		if(res==_FAIL)
+			break;
+
+		precvbuf->ref_cnt = 0;
+		precvbuf->adapter =padapter;
+
+
+		//rtw_list_insert_tail(&precvbuf->list, &(precvpriv->free_recv_buf_queue.queue));
+
+		precvbuf++;
+
+	}
+
+	precvpriv->free_recv_buf_queue_cnt = NR_RECVBUFF;
+
+#if defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD)
+
+	skb_queue_head_init(&precvpriv->rx_skb_queue);
+
+#ifdef CONFIG_RX_INDICATE_QUEUE
+	memset(&precvpriv->rx_indicate_queue, 0, sizeof(struct ifqueue));
+	mtx_init(&precvpriv->rx_indicate_queue.ifq_mtx, "rx_indicate_queue", NULL, MTX_DEF);
+#endif	// CONFIG_RX_INDICATE_QUEUE
+
+#ifdef CONFIG_PREALLOC_RECV_SKB
+	{
+		int i;
+		SIZE_PTR tmpaddr=0;
+		SIZE_PTR alignment=0;
+		struct sk_buff *pskb=NULL;
+
+		skb_queue_head_init(&precvpriv->free_recv_skb_queue);
+
+		for(i=0; i<NR_PREALLOC_RECV_SKB; i++)
+		{
+	#ifdef PLATFORM_FREEBSD
+			pskb = dev_alloc_skb(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
+	#else
+	#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html
+			pskb = dev_alloc_skb(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
+	#else
+			pskb = netdev_alloc_skb(padapter->pnetdev, MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
+	#endif //(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18))
+	#endif //PLATFORM_FREEBSD
+
+			if(pskb)
+			{
+				#ifdef PLATFORM_FREEBSD
+				pskb->dev = padapter->pifp;
+				#else
+				pskb->dev = padapter->pnetdev;
+				#endif //PLATFORM_FREEBSD
+
+				tmpaddr = (SIZE_PTR)pskb->data;
+				alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1);
+				skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment));
+
+				skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb);
+			}
+
+			pskb=NULL;
+
+		}
+	}
+#endif
+
+#endif
+
+exit:
+
+	return res;
+
+}
+
+void rtl8192du_free_recv_priv (_adapter *padapter)
+{
+	int i;
+	struct recv_buf *precvbuf;
+	struct recv_priv	*precvpriv = &padapter->recvpriv;
+
+	precvbuf = (struct recv_buf *)precvpriv->precv_buf;
+
+	for(i=0; i < NR_RECVBUFF ; i++)
+	{
+		rtw_os_recvbuf_resource_free(padapter, precvbuf);
+		precvbuf++;
+	}
+
+	if(precvpriv->pallocated_recv_buf)
+		rtw_mfree(precvpriv->pallocated_recv_buf, NR_RECVBUFF *sizeof(struct recv_buf) + 4);
+
+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
+#ifdef PLATFORM_LINUX
+	if(precvpriv->int_in_urb)
+	{
+		usb_free_urb(precvpriv->int_in_urb);
+	}
+#endif
+	if(precvpriv->int_in_buf)
+		rtw_mfree(precvpriv->int_in_buf, sizeof(INTERRUPT_MSG_FORMAT_EX));
+#endif
+
+#ifdef PLATFORM_LINUX
+
+	if (skb_queue_len(&precvpriv->rx_skb_queue)) {
+		DBG_8192C(KERN_WARNING "rx_skb_queue not empty\n");
+	}
+
+	skb_queue_purge(&precvpriv->rx_skb_queue);
+
+#ifdef CONFIG_PREALLOC_RECV_SKB
+
+	if (skb_queue_len(&precvpriv->free_recv_skb_queue)) {
+		DBG_8192C(KERN_WARNING "free_recv_skb_queue not empty, %d\n", skb_queue_len(&precvpriv->free_recv_skb_queue));
+	}
+
+	skb_queue_purge(&precvpriv->free_recv_skb_queue);
+
+#endif
+
+#endif // PLATFORM_LINUX
+
+#ifdef PLATFORM_FREEBSD
+	struct sk_buff  *pskb;
+	while (NULL != (pskb = skb_dequeue(&precvpriv->rx_skb_queue)))
+	{
+		dev_kfree_skb_any(pskb);
+				
+	}
+
+#ifdef CONFIG_PREALLOC_RECV_SKB
+	while (NULL != (pskb = skb_dequeue(&precvpriv->free_recv_skb_queue)))
+	{
+		dev_kfree_skb_any(pskb);
+				
+	}
+#endif	
+
+#ifdef CONFIG_RX_INDICATE_QUEUE
+	struct mbuf *m;
+	for (;;) {
+		IF_DEQUEUE(&precvpriv->rx_indicate_queue, m);
+		if (m == NULL)
+			break;
+		m_freem(m);
+	}
+	mtx_destroy(&precvpriv->rx_indicate_queue.ifq_mtx);
+#endif	// CONFIG_RX_INDICATE_QUEUE
+
+#endif // PLATFORM_FREEBSD
+
+
+
+}
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/rtl8192du_xmit.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/rtl8192du_xmit.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/rtl8192du_xmit.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/rtl8192du_xmit.c	2017-09-23 03:42:49.982675174 +0800
@@ -0,0 +1,1714 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _RTL8192C_XMIT_C_
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <rtw_byteorder.h>
+#include <wifi.h>
+#include <osdep_intf.h>
+#include <circ_buf.h>
+#include <usb_ops.h>
+#include <rtl8192d_hal.h>
+
+#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
+#error "Shall be Linux or Windows, but not both!\n"
+#endif
+
+
+s32	rtl8192du_init_xmit_priv(_adapter *padapter)
+{
+	struct xmit_priv	*pxmitpriv = &padapter->xmitpriv;
+
+#ifdef PLATFORM_LINUX
+	tasklet_init(&pxmitpriv->xmit_tasklet,
+	     (void(*)(unsigned long))rtl8192du_xmit_tasklet,
+	     (unsigned long)padapter);
+#endif
+#ifdef PLATFORM_FREEBSD
+		TASK_INIT(&pxmitpriv->xmit_tasklet, 1, (task_fn_t *)rtl8192du_xmit_tasklet, (void *)padapter);
+#endif
+
+	return _SUCCESS;
+}
+
+void	rtl8192du_free_xmit_priv(_adapter *padapter)
+{
+}
+
+u32 rtw_get_ff_hwaddr(struct xmit_frame	*pxmitframe);
+u32 rtw_get_ff_hwaddr(struct xmit_frame	*pxmitframe)
+{
+	u32 addr;
+	struct pkt_attrib *pattrib = &pxmitframe->attrib;	
+	
+	switch(pattrib->qsel)
+	{
+		case 0:
+		case 3:
+			addr = BE_QUEUE_INX;
+		 	break;
+		case 1:
+		case 2:
+			addr = BK_QUEUE_INX;
+			break;				
+		case 4:
+		case 5:
+			addr = VI_QUEUE_INX;
+			break;		
+		case 6:
+		case 7:
+			addr = VO_QUEUE_INX;
+			break;
+		case 0x10:
+			addr = BCN_QUEUE_INX;
+			break;
+		case 0x11://BC/MC in PS (HIQ)
+			addr = HIGH_QUEUE_INX;
+			break;
+		case 0x12:
+			addr = MGT_QUEUE_INX;
+			break;
+		default:
+			addr = BE_QUEUE_INX;
+			break;		
+			
+	}
+
+	return addr;
+
+}
+
+static void do_queue_select(_adapter	*padapter, struct pkt_attrib *pattrib)
+{
+	u8 qsel;
+		
+	qsel = pattrib->priority;
+#ifdef CONFIG_CONCURRENT_MODE	
+	if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE)
+		qsel = 7;//
+#endif //CONFIG_CONCURRENT_MODE
+	RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("### do_queue_select priority=%d ,qsel = %d\n",pattrib->priority ,qsel));
+	pattrib->qsel = qsel;
+}
+
+int urb_zero_packet_chk(_adapter *padapter, int sz);
+int urb_zero_packet_chk(_adapter *padapter, int sz)
+{
+	int blnSetTxDescOffset;
+	struct dvobj_priv	*pdvobj = (struct dvobj_priv*)&padapter->dvobjpriv;	
+
+	if ( pdvobj->ishighspeed )
+	{
+		if ( ( (sz + TXDESC_SIZE) % 512 ) == 0 ) {
+			blnSetTxDescOffset = 1;
+		} else {
+			blnSetTxDescOffset = 0;
+		}
+	}
+	else
+	{
+		if ( ( (sz + TXDESC_SIZE) % 64 ) == 0 ) 	{
+			blnSetTxDescOffset = 1;
+		} else {
+			blnSetTxDescOffset = 0;
+		}
+	}
+	
+	return blnSetTxDescOffset;
+	
+}
+
+void rtl8192du_cal_txdesc_chksum(struct tx_desc	*ptxdesc)
+{
+		u16	*usPtr = (u16*)ptxdesc;
+		u32 count = 16;		// (32 bytes / 2 bytes per XOR) => 16 times
+		u32 index;
+		u16 checksum = 0;
+
+		//Clear first
+		ptxdesc->txdw7 &= cpu_to_le32(0xffff0000);
+	
+		for(index = 0 ; index < count ; index++){
+			checksum = checksum ^ le16_to_cpu(*(usPtr + index));
+		}
+
+		ptxdesc->txdw7 |= cpu_to_le32(0x0000ffff&checksum);	
+
+}
+
+void fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc);
+void fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc)
+{
+	if ((pattrib->encrypt > 0) && !pattrib->bswenc)
+	{
+		switch (pattrib->encrypt)
+		{	
+			//SEC_TYPE
+			case _WEP40_:
+			case _WEP104_:
+					ptxdesc->txdw1 |= cpu_to_le32((0x01<<22)&0x00c00000);
+					break;				
+			case _TKIP_:
+			case _TKIP_WTMIC_:	
+					//ptxdesc->txdw1 |= cpu_to_le32((0x02<<22)&0x00c00000);
+					ptxdesc->txdw1 |= cpu_to_le32((0x01<<22)&0x00c00000);
+					break;
+			case _AES_:
+					ptxdesc->txdw1 |= cpu_to_le32((0x03<<22)&0x00c00000);
+					break;
+			case _NO_PRIVACY_:
+			default:
+					break;
+		
+		}
+		
+	}
+
+}
+
+void fill_txdesc_vcs(struct pkt_attrib *pattrib, u32 *pdw);
+void fill_txdesc_vcs(struct pkt_attrib *pattrib, u32 *pdw)
+{
+	//DBG_8192C("cvs_mode=%d\n", pattrib->vcs_mode);	
+
+	switch(pattrib->vcs_mode)
+	{
+		case RTS_CTS:
+			*pdw |= cpu_to_le32(BIT(12));
+			break;
+		case CTS_TO_SELF:
+			*pdw |= cpu_to_le32(BIT(11));
+			break;
+		case NONE_VCS:
+		default:
+			break;		
+	}
+
+	if(pattrib->vcs_mode)
+	{
+		*pdw |= cpu_to_le32(BIT(13));//ENABLE HW RTS
+	}
+}
+
+void fill_txdesc_phy(struct pkt_attrib *pattrib, u32 *pdw);
+void fill_txdesc_phy(struct pkt_attrib *pattrib, u32 *pdw)
+{
+	//DBG_8192C("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset);
+
+	if(pattrib->ht_en)
+	{
+		*pdw |= (pattrib->bwmode&HT_CHANNEL_WIDTH_40)?	cpu_to_le32(BIT(25)):0;
+
+		if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER)
+			*pdw |= cpu_to_le32((0x01<<20)&0x003f0000);
+		else if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER)
+			*pdw |= cpu_to_le32((0x02<<20)&0x003f0000);
+		else if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE)
+			*pdw |= 0;
+		else
+			*pdw |= cpu_to_le32((0x03<<20)&0x003f0000);
+	}
+}
+
+#ifdef CONFIG_USB_TX_AGGREGATION
+/*
+	Insert Early mode 's Content,8Byte
+Len1	Len0	Pkt_num
+Len4	Len3	Len2
+
+*/
+VOID
+InsertEMContent(IN struct xmit_frame *pxmitframe, IN u8 *VirtualAddress);
+VOID
+InsertEMContent(IN struct xmit_frame *pxmitframe, IN u8 *VirtualAddress)
+{
+	_rtw_memset(VirtualAddress, 0, 8);
+	SET_EARLYMODE_PKTNUM(VirtualAddress, pxmitframe->EMPktNum);
+	SET_EARLYMODE_LEN0(VirtualAddress, pxmitframe->EMPktLen[0]);
+	SET_EARLYMODE_LEN1(VirtualAddress, pxmitframe->EMPktLen[1]);
+	SET_EARLYMODE_LEN2_1(VirtualAddress, pxmitframe->EMPktLen[2]&0xF);
+	SET_EARLYMODE_LEN2_2(VirtualAddress, pxmitframe->EMPktLen[2]>>4);
+	SET_EARLYMODE_LEN3(VirtualAddress, pxmitframe->EMPktLen[3]);
+	SET_EARLYMODE_LEN4(VirtualAddress, pxmitframe->EMPktLen[4]);
+	//RT_PRINT_DATA(COMP_SEND, DBG_LOUD, "EM Header:", VirtualAddress, 8)
+}
+
+static void _update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, int sz)
+{
+	uint	qsel;
+	_adapter				*padapter = pxmitframe->padapter;
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
+	struct dm_priv		*pdmpriv = &pHalData->dmpriv;
+	struct pkt_attrib		*pattrib = &pxmitframe->attrib;
+	struct tx_desc		*ptxdesc = (struct tx_desc*)pmem;
+	sint	bmcst = IS_MCAST(pattrib->ra);
+#ifdef CONFIG_P2P
+	struct wifidirect_info*	pwdinfo = &padapter->wdinfo;
+	struct registry_priv *pregistrypriv = &padapter->registrypriv;
+#endif //CONFIG_P2P
+
+	_rtw_memset(ptxdesc, 0, sizeof(struct tx_desc));
+	
+	//4 offset 0
+	ptxdesc->txdw0 |= cpu_to_le32(sz & 0x0000ffff);
+	ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
+	ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00ff0000);//32 bytes for TX Desc
+	
+	if (bmcst) ptxdesc->txdw0 |= cpu_to_le32(BIT(24));
+
+	RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_,
+		 ("update_txdesc: offset0=0x%08x\n", ptxdesc->txdw0));
+
+	//4 offset 4
+	// pkt_offset, unit:8 bytes padding
+	if (pxmitframe->pkt_offset > 0)
+		ptxdesc->txdw1 |= cpu_to_le32((pxmitframe->pkt_offset << 26) & 0x7c000000);
+
+#ifdef CONFIG_USB_TX_AGGREGATION
+	if (pxmitframe->agg_num > 1)
+		ptxdesc->txdw5 |= cpu_to_le32((pxmitframe->agg_num << 24) & 0xff000000);
+#endif
+
+	if (pxmitframe->frame_tag == DATA_FRAMETAG)
+	{
+		//4 offset 4
+		ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x1f);
+
+		qsel = (uint)(pattrib->qsel & 0x0000001f);
+		ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
+
+		ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid << 16) & 0x000f0000);
+
+		fill_txdesc_sectype(pattrib, ptxdesc);
+
+		if(pattrib->ampdu_en==_TRUE){
+			ptxdesc->txdw1 |= cpu_to_le32(BIT(5));//AGG EN
+			//Insert Early Mode Content after tx desc position.
+			if(pHalData->bEarlyModeEnable){
+				ptxdesc->txdw0 |= cpu_to_le32(((USB_HWDESC_HEADER_LEN-8) << OFFSET_SHT) & 0x00ff0000);//32 bytes for TX Desc
+				if(pxmitframe->EMPktNum > 0){
+					InsertEMContent(pxmitframe, pmem+TXDESC_SIZE);
+				}
+			}
+		}
+		else
+		{
+			ptxdesc->txdw1 |= cpu_to_le32(BIT(6));//AGG BK
+		}
+
+
+		//4 offset 8
+
+
+		//4 offset 12
+		ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum << 16) & 0xffff0000);
+
+
+		//4 offset 16 , offset 20
+		if (pattrib->qos_en)
+			ptxdesc->txdw4 |= cpu_to_le32(BIT(6));//QoS
+
+		if ((pattrib->ether_type != 0x888e) &&
+		    (pattrib->ether_type != 0x0806) &&
+		    (pattrib->dhcp_pkt != 1))
+		{
+			//Non EAP & ARP & DHCP type data packet
+
+			fill_txdesc_vcs(pattrib, &ptxdesc->txdw4);
+			fill_txdesc_phy(pattrib, &ptxdesc->txdw4);
+
+			ptxdesc->txdw4 |= cpu_to_le32(0x00000008);//RTS Rate=24M
+			ptxdesc->txdw5 |= cpu_to_le32(0x0001ff00);
+			//ptxdesc->txdw5 |= cpu_to_le32(0x0000000b);//DataRate - 54M
+
+			//use REG_INIDATA_RATE_SEL value
+			ptxdesc->txdw5 |= cpu_to_le32(pdmpriv->INIDATA_RATE[pattrib->mac_id]);
+
+			if (0)//for driver dbg
+			{
+				ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+
+				if (pattrib->ht_en)
+					ptxdesc->txdw5 |= cpu_to_le32(BIT(6));//SGI
+
+				ptxdesc->txdw5 |= cpu_to_le32(0x00000013);//init rate - mcs7
+			}
+		}
+		else
+		{
+			// EAP data packet and ARP packet.
+			// Use the 1M data rate to send the EAP/ARP packet.
+			// This will maybe make the handshake smooth.
+
+			ptxdesc->txdw1 |= cpu_to_le32(BIT(6));//AGG BK
+		   	ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+
+			if(pHalData->CurrentBandType92D == BAND_ON_5G)
+				ptxdesc->txdw5 |= cpu_to_le32(BIT(2));// use OFDM 6Mbps
+		}
+
+#ifdef CONFIG_P2P
+		if(pregistrypriv->wifi_spec==1 && pwdinfo->p2p_state != P2P_STATE_NONE)
+		{
+			ptxdesc->txdw1 |= cpu_to_le32(BIT(6));//AGG BK
+			
+		   	ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+
+			ptxdesc->txdw5 = cpu_to_le32(0x0001ff00);//
+
+#ifdef CONFIG_USB_TX_AGGREGATION
+			if (pxmitframe->agg_num > 1)
+				ptxdesc->txdw5 |= cpu_to_le32((pxmitframe->agg_num << 24) & 0xff000000);
+#endif
+			ptxdesc->txdw5 |= cpu_to_le32(BIT(2));// use OFDM 6Mbps
+		}			
+#endif //CONFIG_P2P
+
+		//4 offset 24
+#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
+		if (pattrib->hw_tcp_csum == 1) {
+			// ptxdesc->txdw6 = 0; // clear TCP_CHECKSUM and IP_CHECKSUM. It's zero already!!
+			u8 ip_hdr_offset = 32 + pattrib->hdrlen + pattrib->iv_len + 8;
+			ptxdesc->txdw7 = (1 << 31) | (ip_hdr_offset << 16);
+			DBG_8192C("ptxdesc->txdw7 = %08x\n", ptxdesc->txdw7);
+		}
+#endif
+	}
+	else if(pxmitframe->frame_tag == MGNT_FRAMETAG)
+	{
+		//DBG_8192C("pxmitframe->frame_tag == MGNT_FRAMETAG\n");	
+
+		//4 offset 4
+		ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x1f);
+
+		qsel = (uint)(pattrib->qsel&0x0000001f);
+		ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
+
+		ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid<< 16) & 0x000f0000);
+
+		//fill_txdesc_sectype(pattrib, ptxdesc);
+
+
+		//4 offset 8
+
+
+		//4 offset 12
+		ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0xffff0000);
+
+
+		//4 offset 16
+		ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+
+
+		//4 offset 20
+		if(pHalData->CurrentBandType92D == BAND_ON_5G)
+			ptxdesc->txdw5 |= cpu_to_le32(BIT(2));// use OFDM 6Mbps
+	}
+	else if(pxmitframe->frame_tag == TXAGG_FRAMETAG)
+	{
+		DBG_8192C("pxmitframe->frame_tag == TXAGG_FRAMETAG\n");
+	}
+	else
+	{
+		DBG_8192C("pxmitframe->frame_tag = %d\n", pxmitframe->frame_tag);
+
+		//4 offset 4
+		ptxdesc->txdw1 |= cpu_to_le32((4)&0x1f);//CAM_ID(MAC_ID)
+
+		ptxdesc->txdw1 |= cpu_to_le32((6<< 16) & 0x000f0000);//raid
+
+		//4 offset 8
+
+		//4 offset 12
+		ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum << 16) & 0xffff0000);
+
+
+		//4 offset 16
+		ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+
+		//4 offset 20
+		if(pHalData->CurrentBandType92D == BAND_ON_5G)
+			ptxdesc->txdw5 |= cpu_to_le32(BIT(2));// use OFDM 6Mbps
+	}
+
+	// 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS.
+	// (1) The sequence number of each non-Qos frame / broadcast / multicast /
+	// mgnt frame should be controled by Hw because Fw will also send null data
+	// which we cannot control when Fw LPS enable.
+	// --> default enable non-Qos data sequense number. 2010.06.23. by tynli.
+	// (2) Enable HW SEQ control for beacon packet, because we use Hw beacon.
+	// (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets.
+	// 2010.06.23. Added by tynli.
+	if(!pattrib->qos_en)
+	{		
+		ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number
+		ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29.
+	}
+
+	rtl8192du_cal_txdesc_chksum(ptxdesc);
+}
+#endif
+
+static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz)
+{
+	int	pull=0;
+	uint	qsel;
+	_adapter				*padapter = pxmitframe->padapter;
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
+	struct dm_priv		*pdmpriv = &pHalData->dmpriv;
+#ifdef CONFIG_AP_MODE
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+#endif //CONFIG_AP_MODE
+	struct pkt_attrib		*pattrib = &pxmitframe->attrib;
+	struct tx_desc		*ptxdesc = (struct tx_desc *)pmem;
+	sint	bmcst = IS_MCAST(pattrib->ra);
+#ifdef CONFIG_P2P
+	struct wifidirect_info*	pwdinfo = &padapter->wdinfo;
+	struct registry_priv *pregistrypriv = &padapter->registrypriv;
+#endif //CONFIG_P2P
+	
+
+#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX
+	if(urb_zero_packet_chk(padapter, sz)==0)
+	{
+		ptxdesc = (struct tx_desc *)(pmem+PACKET_OFFSET_SZ);
+		pull = 1;
+		pxmitframe->pkt_offset --;
+	}
+#endif	// CONFIG_USE_USB_BUFFER_ALLOC_TX
+		
+	_rtw_memset(ptxdesc, 0, sizeof(struct tx_desc));
+
+	if((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG)
+	{
+		//DBG_8192C("pxmitframe->frame_tag == DATA_FRAMETAG\n");			
+
+		//offset 4
+		ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x1f);
+
+		qsel = (uint)(pattrib->qsel & 0x0000001f);
+		ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
+
+		ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid<< 16) & 0x000f0000);
+
+		fill_txdesc_sectype(pattrib, ptxdesc);
+
+
+		if(pattrib->ampdu_en==_TRUE)
+			ptxdesc->txdw1 |= cpu_to_le32(BIT(5));//AGG EN
+		else
+			ptxdesc->txdw1 |= cpu_to_le32(BIT(6));//AGG BK
+		
+		//offset 8
+		
+
+		//offset 12
+		ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0xffff0000);
+
+
+		//offset 16 , offset 20
+		if (pattrib->qos_en)
+			ptxdesc->txdw4 |= cpu_to_le32(BIT(6));//QoS
+
+		if ((pattrib->ether_type != 0x888e) && (pattrib->ether_type != 0x0806) && (pattrib->dhcp_pkt != 1))
+		{
+              	//Non EAP & ARP & DHCP type data packet
+              	
+			fill_txdesc_vcs(pattrib, &ptxdesc->txdw4);
+			fill_txdesc_phy(pattrib, &ptxdesc->txdw4);
+
+			ptxdesc->txdw4 |= cpu_to_le32(0x00000008);//RTS Rate=24M
+			ptxdesc->txdw5 |= cpu_to_le32(0x0001ff00);//
+			//ptxdesc->txdw5 |= cpu_to_le32(0x0000000b);//DataRate - 54M
+
+			//use REG_INIDATA_RATE_SEL value
+			ptxdesc->txdw5 |= cpu_to_le32(pdmpriv->INIDATA_RATE[pattrib->mac_id]);
+
+              	if(0)//for driver dbg
+			{
+				ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+				
+				if(pattrib->ht_en)
+					ptxdesc->txdw5 |= cpu_to_le32(BIT(6));//SGI
+
+				ptxdesc->txdw5 |= cpu_to_le32(0x00000013);//init rate - mcs7
+			}
+
+		}
+		else
+		{
+			// EAP data packet and ARP packet.
+			// Use the 1M data rate to send the EAP/ARP packet.
+			// This will maybe make the handshake smooth.
+
+			ptxdesc->txdw1 |= cpu_to_le32(BIT(6));//AGG BK
+			
+		   	ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+
+			if(pHalData->CurrentBandType92D == BAND_ON_5G)
+			{
+				ptxdesc->txdw5 |= cpu_to_le32(BIT(2));// use OFDM 6Mbps
+			}
+#ifdef CONFIG_P2P
+			else
+			{
+				//	Added by Albert 2011/06/09
+				//	In the P2P mode, the driver should not support the b mode.
+				//	So, the Tx packet shouldn't use the CCK rate
+				if ( pwdinfo->p2p_state != P2P_STATE_NONE )
+				{
+					ptxdesc->txdw5 |= cpu_to_le32(BIT(2));	//	Use the 6M data rate.
+				}
+			}
+#endif //CONFIG_P2P		
+
+			
+		}
+		
+#ifdef CONFIG_P2P
+		if(pregistrypriv->wifi_spec==1 && pwdinfo->p2p_state != P2P_STATE_NONE)
+		{
+			ptxdesc->txdw1 |= cpu_to_le32(BIT(6));//AGG BK
+			
+		   	ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+
+			ptxdesc->txdw5 = cpu_to_le32(0x0001ff00);//
+		
+			ptxdesc->txdw5 |= cpu_to_le32(BIT(2));// use OFDM 6Mbps
+		}			
+#endif //CONFIG_P2P
+
+		//offset 24
+
+#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
+		if ( pattrib->hw_tcp_csum == 1 ) {
+			// ptxdesc->txdw6 = 0; // clear TCP_CHECKSUM and IP_CHECKSUM. It's zero already!!
+			u8 ip_hdr_offset = 32 + pattrib->hdrlen + pattrib->iv_len + 8;
+			ptxdesc->txdw7 = (1 << 31) | (ip_hdr_offset << 16);
+			DBG_8192C("ptxdesc->txdw7 = %08x\n", ptxdesc->txdw7);
+		}
+#endif
+	}
+	else if((pxmitframe->frame_tag&0x0f)== MGNT_FRAMETAG)
+	{
+		//DBG_8192C("pxmitframe->frame_tag == MGNT_FRAMETAG\n");	
+		
+		//offset 4		
+		ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x1f);
+		
+		qsel = (uint)(pattrib->qsel&0x0000001f);
+		ptxdesc->txdw1 |= cpu_to_le32((qsel<<QSEL_SHT)&0x00001f00);
+
+		ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid<< 16) & 0x000f0000);
+		
+		//fill_txdesc_sectype(pattrib, ptxdesc);
+		
+		//offset 8		
+
+		//offset 12
+		ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0xffff0000);
+		
+		//offset 16
+		ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+		
+		//offset 20
+#ifdef CONFIG_AP_MODE
+		if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)
+		{
+			ptxdesc->txdw5 |= cpu_to_le32(BIT(17));//retry limit enable
+			ptxdesc->txdw5 |= cpu_to_le32(0x00180000);//retry limit = 6
+		}
+#endif
+
+		if(pHalData->CurrentBandType92D == BAND_ON_5G)
+		{
+			ptxdesc->txdw5 |= cpu_to_le32(BIT(2));// use OFDM 6Mbps
+		}
+#ifdef CONFIG_INTEL_WIDI
+		else if(padapter->mlmepriv.widi_state == INTEL_WIDI_STATE_LISTEN)
+		{
+			ptxdesc->txdw5 |= cpu_to_le32(BIT(2));// use OFDM 6Mbps
+		}
+#endif //CONFIG_INTEL_WIDI
+#ifdef CONFIG_P2P
+		else
+		{
+			//	Added by Albert 2011/06/09
+			//	In the P2P mode, the driver should not support the b mode.
+			//	So, the Tx packet shouldn't use the CCK rate
+			if ( pwdinfo->p2p_state != P2P_STATE_NONE )
+			{
+				ptxdesc->txdw5 |= cpu_to_le32(BIT(2));	//	Use the 6M data rate.
+			}
+		}
+#endif //CONFIG_P2P		
+		
+	}
+	else if((pxmitframe->frame_tag&0x0f) == TXAGG_FRAMETAG)
+	{
+		DBG_8192C("pxmitframe->frame_tag == TXAGG_FRAMETAG\n");
+	}
+#ifdef CONFIG_MP_INCLUDED
+	else if((pxmitframe->frame_tag&0x0f) == MP_FRAMETAG)
+	{
+		fill_txdesc_for_mp(padapter, ptxdesc);
+	}
+#endif
+	else
+	{
+		DBG_8192C("pxmitframe->frame_tag = %d\n", pxmitframe->frame_tag);
+		
+		//offset 4	
+		ptxdesc->txdw1 |= cpu_to_le32((4)&0x1f);//CAM_ID(MAC_ID)
+		
+		ptxdesc->txdw1 |= cpu_to_le32((6<< 16) & 0x000f0000);//raid
+		
+		//offset 8		
+
+		//offset 12
+		ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0xffff0000);
+		
+		//offset 16
+		ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+		
+		//offset 20
+		if(pHalData->CurrentBandType92D == BAND_ON_5G)
+			ptxdesc->txdw5 |= cpu_to_le32(BIT(2));// use OFDM 6Mbps
+	}
+
+	// 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS.
+	// (1) The sequence number of each non-Qos frame / broadcast / multicast /
+	// mgnt frame should be controled by Hw because Fw will also send null data
+	// which we cannot control when Fw LPS enable.
+	// --> default enable non-Qos data sequense number. 2010.06.23. by tynli.
+	// (2) Enable HW SEQ control for beacon packet, because we use Hw beacon.
+	// (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets.
+	// 2010.06.23. Added by tynli.
+	if(!pattrib->qos_en)
+	{		
+		ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number
+		ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29.
+	}
+
+	//offset 0
+	ptxdesc->txdw0 |= cpu_to_le32(sz&0x0000ffff);
+	ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
+	ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<<OFFSET_SHT)&0x00ff0000);//32 bytes for TX Desc
+	
+	if(bmcst)	
+	{
+		ptxdesc->txdw0 |= cpu_to_le32(BIT(24));
+	}	
+
+	RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("offset0-txdesc=0x%x\n", ptxdesc->txdw0));
+
+	//offset 4
+	//if(!pull) ptxdesc->txdw1 |= cpu_to_le32((0x01<<26)&0xff000000);//pkt_offset, unit:8 bytes padding
+	// pkt_offset, unit:8 bytes padding
+	if (pxmitframe->pkt_offset > 0)
+		ptxdesc->txdw1 |= cpu_to_le32((pxmitframe->pkt_offset << 26) & 0x7c000000);
+
+#ifdef CONFIG_USB_TX_AGGREGATION
+	if (pxmitframe->agg_num > 1)
+		ptxdesc->txdw5 |= cpu_to_le32((pxmitframe->agg_num << 24) & 0xff000000);
+#endif
+
+	rtl8192du_cal_txdesc_chksum(ptxdesc);
+		
+	return pull;
+		
+}
+
+void rtw_dump_xframe(_adapter *padapter, struct xmit_frame *pxmitframe);
+void rtw_dump_xframe(_adapter *padapter, struct xmit_frame *pxmitframe)
+{
+	int t, sz, w_sz, pull=0;
+	u8 *mem_addr;
+	u32 ff_hwaddr;
+	struct xmit_buf *pxmitbuf = pxmitframe->pxmitbuf;
+	struct pkt_attrib *pattrib = &pxmitframe->attrib;
+	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
+	struct security_priv *psecuritypriv = &padapter->securitypriv;
+
+	if ((pxmitframe->frame_tag == DATA_FRAMETAG) &&
+	    (pxmitframe->attrib.ether_type != 0x0806) &&
+	    (pxmitframe->attrib.ether_type != 0x888e) &&
+	    (pxmitframe->attrib.dhcp_pkt != 1))
+	{
+		rtw_issue_addbareq_cmd(padapter, pxmitframe);
+	}
+
+	mem_addr = pxmitframe->buf_addr;
+
+       RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_dump_xframe()\n"));
+	
+	for (t = 0; t < pattrib->nr_frags; t++)
+	{
+		if (t != (pattrib->nr_frags - 1))
+		{
+			RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("pattrib->nr_frags=%d\n", pattrib->nr_frags));
+
+			sz = pxmitpriv->frag_len;
+			sz = sz - 4 - (psecuritypriv->sw_encrypt ? 0 : pattrib->icv_len);					
+		}
+		else //no frag
+		{
+			sz = pattrib->last_txcmdsz;
+		}
+
+		pull = update_txdesc(pxmitframe, mem_addr, sz);
+		
+		if(pull)
+		{
+			mem_addr += PACKET_OFFSET_SZ; //pull txdesc head
+			
+			//pxmitbuf ->pbuf = mem_addr;			
+			pxmitframe->buf_addr = mem_addr;
+
+			w_sz = sz + TXDESC_SIZE;
+		}
+		else
+		{
+			w_sz = sz + TXDESC_SIZE + PACKET_OFFSET_SZ;
+		}	
+
+		ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe);
+
+		rtw_write_port(padapter, ff_hwaddr, w_sz, (unsigned char*)pxmitbuf);
+
+		rtw_count_tx_stats(padapter, pxmitframe, sz);
+
+
+		RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_write_port, w_sz=%d\n", w_sz));
+		//DBG_8192C("rtw_write_port, w_sz=%d, sz=%d, txdesc_sz=%d, tid=%d\n", w_sz, sz, w_sz-sz, pattrib->priority);      
+
+		mem_addr += w_sz;
+
+		mem_addr = (u8 *)RND4(((SIZE_PTR)(mem_addr)));
+
+	}
+	
+	rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
+	
+}
+
+
+#ifdef CONFIG_USB_TX_AGGREGATION
+static u32 xmitframe_need_length(struct xmit_frame *pxmitframe)
+{
+	struct pkt_attrib *pattrib = &pxmitframe->attrib;
+
+	u32	len = 0;
+
+	// no consider fragement
+	len = pattrib->hdrlen + pattrib->iv_len +
+		SNAP_SIZE + sizeof(u16) +
+		pattrib->pktlen +
+		((pattrib->bswenc) ? pattrib->icv_len : 0);
+
+	if(pattrib->encrypt ==_TKIP_)
+		len += 8;
+
+	return len;
+}
+
+void UpdateEarlyModeInfo8192D(_adapter *padapter, struct xmit_frame *pxmitframe,struct tx_servq	*ptxservq);
+void UpdateEarlyModeInfo8192D(_adapter *padapter, struct xmit_frame *pxmitframe,struct tx_servq	*ptxservq)
+{
+	_irqL irqL;
+	u32	len;
+	struct xmit_priv	*pxmitpriv = &padapter->xmitpriv;
+	struct pkt_attrib	*pattrib = &pxmitframe->attrib;
+	_list *xmitframe_plist = NULL, *xmitframe_phead = NULL;
+
+	//Some macaddr can't do early mode.
+	if(MacAddr_isBcst(pattrib->dst) ||IS_MCAST(pattrib->dst) || !!pattrib->qos_en)
+		return;
+
+	pxmitframe->EMPktNum = 0;
+
+	// dequeue same priority packet from station tx queue
+	_enter_critical_bh(&pxmitpriv->lock, &irqL);
+
+	xmitframe_phead = get_list_head(&ptxservq->sta_pending);
+	xmitframe_plist = get_next(xmitframe_phead);
+	while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist) == _FALSE)&&(pxmitframe->EMPktNum < 5))
+	{
+		pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list);
+		xmitframe_plist = get_next(xmitframe_plist);
+
+		len = xmitframe_need_length(pxmitframe);
+		pxmitframe->EMPktLen[pxmitframe->EMPktNum] = len;
+		pxmitframe->EMPktNum++;
+	}
+	_exit_critical_bh(&pxmitpriv->lock, &irqL);
+
+}
+
+#if 1
+#define IDEA_CONDITION 1	// check all packets before enqueue
+s32 rtl8192du_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct xmit_frame *pxmitframe = NULL;
+	struct xmit_frame *pfirstframe = NULL;
+
+	// aggregate variable
+	struct hw_xmit	*phwxmit = pxmitpriv->hwxmits;
+	struct tx_servq	*ptxservq = NULL;
+
+	_irqL irqL;
+	_list *xmitframe_plist = NULL, *xmitframe_phead = NULL;
+
+	u32	pbuf=0; // next pkt address
+	u32	pbuf_tail; // last pkt tail
+	u32	len=0; //packet length, except TXDESC_SIZE and PKT_OFFSET
+	u32	aggMaxLength = MAX_XMITBUF_SZ;
+	u32	bulkSize = pHalData->UsbBulkOutSize;
+	u32	bulkPtr=0;
+	u8	descCount=0;
+	u8	ac_index;
+	u8	bfirst = _TRUE;//first aggregation xmitframe
+	u8	bulkstart = _FALSE;
+
+	// dump frame variable
+	u32 ff_hwaddr;
+
+#ifndef IDEA_CONDITION
+	int res = _SUCCESS;
+#endif
+
+	RT_TRACE(_module_rtl8192c_xmit_c_, _drv_info_, ("+xmitframe_complete\n"));
+
+	// check xmitbuffer is ok
+	if (pxmitbuf == NULL) {
+		pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
+		if (pxmitbuf == NULL) return _FALSE;
+	}
+
+	if(pHalData->MacPhyMode92D==SINGLEMAC_SINGLEPHY)
+		aggMaxLength = MAX_XMITBUF_SZ;
+	else
+		aggMaxLength = 0x3D00;
+
+	do {
+		//3 1. pick up first frame
+		if(bfirst)
+		{
+			pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry);
+			if (pxmitframe == NULL) {
+				// no more xmit frame, release xmit buffer
+				rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
+				return _FALSE;
+			}
+
+			pxmitframe->pxmitbuf = pxmitbuf;
+			pxmitframe->buf_addr = pxmitbuf->pbuf;
+			pxmitbuf->priv_data = pxmitframe;
+
+			//pxmitframe->agg_num = 1; // alloc xmitframe should assign to 1.
+			pxmitframe->pkt_offset = USB_92D_DUMMY_OFFSET; // first frame of aggregation, reserve 2 offset for 512 alignment and early mode
+
+			pfirstframe = pxmitframe;
+			ptxservq = rtw_get_sta_pending(padapter, pfirstframe->attrib.psta, pfirstframe->attrib.priority, (u8 *)(&ac_index));
+		}
+		//3 2. aggregate same priority and same DA(AP or STA) frames
+		else
+		{
+			// dequeue same priority packet from station tx queue
+			_enter_critical_bh(&pxmitpriv->lock, &irqL);
+
+			if (_rtw_queue_empty(&ptxservq->sta_pending) == _FALSE)
+			{
+				xmitframe_phead = get_list_head(&ptxservq->sta_pending);
+				xmitframe_plist = get_next(xmitframe_phead);
+
+				pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list);
+
+#ifdef CONFIG_AP_MODE
+				if(xmitframe_enqueue_for_sleeping_sta(padapter, pxmitframe)==_TRUE)
+				{
+					//rtw_list_delete(&pxmitframe->list);
+			
+					ptxservq->qcnt--;
+
+					_exit_critical_bh(&pxmitpriv->lock, &irqL);
+			
+					continue;
+				}
+#endif
+
+				len = xmitframe_need_length(pxmitframe) + TXDESC_SIZE + ((USB_92D_DUMMY_OFFSET - 1) * PACKET_OFFSET_SZ);
+				if (pbuf + _RND8(len) > aggMaxLength)
+				{
+					bulkstart = _TRUE;
+				}
+				else
+				{
+					rtw_list_delete(&pxmitframe->list);
+					ptxservq->qcnt--;
+					phwxmit[ac_index].accnt--;
+
+					//Remove sta node when there is no pending packets.
+					if (_rtw_queue_empty(&ptxservq->sta_pending) == _TRUE)
+						rtw_list_delete(&ptxservq->tx_pending);
+				}
+			}
+			else
+			{
+				bulkstart = _TRUE;
+			}
+
+			_exit_critical_bh(&pxmitpriv->lock, &irqL);
+
+			if(bulkstart)
+			{
+				break;
+			}
+
+			pxmitframe->buf_addr = pxmitbuf->pbuf + pbuf;
+
+			pxmitframe->agg_num = 0; // not first frame of aggregation
+			pxmitframe->pkt_offset = USB_92D_DUMMY_OFFSET - 1; // not first frame of aggregation, reserve 1 offset for early mode
+		}
+
+		if(pHalData->bEarlyModeEnable)
+			UpdateEarlyModeInfo8192D(padapter, pxmitframe,ptxservq);
+
+#ifdef IDEA_CONDITION
+		rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
+#else
+		res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
+		if (res == _FALSE) {
+			rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
+			continue;
+		}
+#endif
+
+		// always return ndis_packet after rtw_xmitframe_coalesce
+		rtw_os_xmit_complete(padapter, pxmitframe);
+
+		if(bfirst)
+		{
+			len = xmitframe_need_length(pfirstframe) + USB_HWDESC_HEADER_LEN;
+			pbuf_tail = len;
+			pbuf = _RND8(pbuf_tail);
+
+			descCount = 0;
+			bulkPtr = bulkSize;
+			bfirst = _FALSE;
+		}
+		else
+		{
+			_update_txdesc(pxmitframe, pxmitframe->buf_addr, pxmitframe->attrib.last_txcmdsz);
+
+			// don't need xmitframe any more
+			rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
+
+			// handle pointer and stop condition
+			pbuf_tail = pbuf + len;
+			pbuf = _RND8(pbuf_tail);
+
+			pfirstframe->agg_num++;
+			if (MAX_TX_AGG_PACKET_NUMBER == pfirstframe->agg_num)
+				break;
+		}
+
+		// check pkt amount in one bluk
+		if (pbuf < bulkPtr)
+		{
+			descCount++;
+			if (descCount == pHalData->UsbTxAggDescNum)
+				break;
+		}
+		else
+		{
+			descCount = 0;
+			bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize; // round to next bulkSize
+		}
+	} while (1);
+
+	if ((pfirstframe->attrib.ether_type != 0x0806) &&
+	    (pfirstframe->attrib.ether_type != 0x888e) &&
+	    (pfirstframe->attrib.dhcp_pkt != 1))
+	{
+		rtw_issue_addbareq_cmd(padapter, pfirstframe);
+	}
+
+#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX
+	//3 3. update first frame txdesc
+	if ((pbuf_tail % bulkSize) == 0) {
+		// remove 1 pkt_offset
+		pbuf_tail -= PACKET_OFFSET_SZ;
+		pfirstframe->buf_addr += PACKET_OFFSET_SZ;
+		pfirstframe->pkt_offset--;
+	}
+#endif	// CONFIG_USE_USB_BUFFER_ALLOC_TX
+	_update_txdesc(pfirstframe, pfirstframe->buf_addr, pfirstframe->attrib.last_txcmdsz);
+
+	//3 4. write xmit buffer to USB FIFO
+	ff_hwaddr = rtw_get_ff_hwaddr(pfirstframe);
+
+	// xmit address == ((xmit_frame*)pxmitbuf->priv_data)->buf_addr
+	rtw_write_port(padapter, ff_hwaddr, pbuf_tail, (u8*)pxmitbuf);
+
+	//3 5. update statisitc
+	pbuf_tail -= (pfirstframe->agg_num * TXDESC_SIZE);
+	//if (pfirstframe->pkt_offset == 1) pbuf_tail -= PACKET_OFFSET_SZ;
+	pbuf_tail -= (pfirstframe->pkt_offset * PACKET_OFFSET_SZ);
+	
+	rtw_count_tx_stats(padapter, pfirstframe, pbuf_tail);
+
+	rtw_free_xmitframe_ex(pxmitpriv, pfirstframe);
+
+	return _TRUE;
+}
+#else
+#define IDEA_CONDITION 1	// check all packets before enqueue
+s32 rtl8192du_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct xmit_frame *pxmitframe = NULL;
+	struct xmit_frame *pfirstframe = NULL;
+
+	// aggregate variable
+	//struct hw_xmit *phwxmit;
+	struct sta_info *psta = NULL;
+	struct tx_servq *ptxservq = NULL;
+
+	_irqL irqL;
+	_list *xmitframe_plist = NULL, *xmitframe_phead = NULL;
+
+	u32	pbuf;	// next pkt address
+	u32	pbuf_tail;	// last pkt tail
+	u32	len;	// packet length, except TXDESC_SIZE and PKT_OFFSET
+	u32	aggMaxLength = MAX_XMITBUF_SZ;
+	u32	bulkSize = pHalData->UsbBulkOutSize;
+	u8	descCount;
+	u32	bulkPtr;
+
+	// dump frame variable
+	u32 ff_hwaddr;
+
+#ifndef IDEA_CONDITION
+	int res = _SUCCESS;
+#endif
+
+	RT_TRACE(_module_rtl8192c_xmit_c_, _drv_info_, ("+xmitframe_complete\n"));
+
+
+	// check xmitbuffer is ok
+	if (pxmitbuf == NULL) {
+		pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
+		if (pxmitbuf == NULL) return _FALSE;
+	}
+
+	if(pHalData->MacPhyMode92D==SINGLEMAC_SINGLEPHY)
+		aggMaxLength = MAX_XMITBUF_SZ;
+	else
+		aggMaxLength = 0x3D00;
+
+	//3 1. pick up first frame
+	do {
+		rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
+			
+		pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry);
+		if (pxmitframe == NULL) {
+			// no more xmit frame, release xmit buffer
+			rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
+			return _FALSE;
+		}
+
+
+#ifndef IDEA_CONDITION
+		if (pxmitframe->frame_tag != DATA_FRAMETAG) {
+			RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_,
+				 ("xmitframe_complete: frame tag(%d) is not DATA_FRAMETAG(%d)!\n",
+				  pxmitframe->frame_tag, DATA_FRAMETAG));
+//			rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
+			continue;
+		}
+
+		// TID 0~15
+		if ((pxmitframe->attrib.priority < 0) ||
+		    (pxmitframe->attrib.priority > 15)) {
+			RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_,
+				 ("xmitframe_complete: TID(%d) should be 0~15!\n",
+				  pxmitframe->attrib.priority));
+//			rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
+			continue;
+		}
+#endif
+
+		pxmitframe->pxmitbuf = pxmitbuf;
+		pxmitframe->buf_addr = pxmitbuf->pbuf;
+		pxmitbuf->priv_data = pxmitframe;
+
+		//pxmitframe->agg_num = 1; // alloc xmitframe should assign to 1.
+		pxmitframe->pkt_offset = 1; // first frame of aggregation, reserve offset
+
+#ifdef IDEA_CONDITION
+		rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
+#else
+		res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
+		if (res == _FALSE) {
+//			rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
+			continue;
+		}
+#endif
+
+		// always return ndis_packet after rtw_xmitframe_coalesce
+		rtw_os_xmit_complete(padapter, pxmitframe);
+
+		break;
+	} while (1);
+
+	//3 2. aggregate same priority and same DA(AP or STA) frames
+	pfirstframe = pxmitframe;
+	len = xmitframe_need_length(pfirstframe) + TXDESC_OFFSET;
+	pbuf_tail = len;
+	pbuf = _RND8(pbuf_tail);
+
+	// check pkt amount in one bluk
+	descCount = 0;
+	bulkPtr = bulkSize;
+	if (pbuf < bulkPtr)
+		descCount++;
+	else {
+		descCount = 0;
+		bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize; // round to next bulkSize
+	}
+
+	// dequeue same priority packet from station tx queue
+	psta = pfirstframe->attrib.psta;
+	switch (pfirstframe->attrib.priority) {
+		case 1:
+		case 2:
+			ptxservq = &(psta->sta_xmitpriv.bk_q);
+//			phwxmit = pxmitpriv->hwxmits + 3;
+			break;
+
+		case 4:
+		case 5:
+			ptxservq = &(psta->sta_xmitpriv.vi_q);
+//			phwxmit = pxmitpriv->hwxmits + 1;
+			break;
+
+		case 6:
+		case 7:
+			ptxservq = &(psta->sta_xmitpriv.vo_q);
+//			phwxmit = pxmitpriv->hwxmits;
+			break;
+
+		case 0:
+		case 3:
+		default:
+			ptxservq = &(psta->sta_xmitpriv.be_q);
+//			phwxmit = pxmitpriv->hwxmits + 2;
+			break;
+	}
+
+	_enter_critical_bh(&pxmitpriv->lock, &irqL);
+
+	xmitframe_phead = get_list_head(&ptxservq->sta_pending);
+	xmitframe_plist = get_next(xmitframe_phead);
+	while (rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist) == _FALSE)
+	{
+		pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list);
+		xmitframe_plist = get_next(xmitframe_plist);
+
+		len = xmitframe_need_length(pxmitframe) + TXDESC_SIZE; // no offset
+		if (pbuf + len > aggMaxLength) break;
+
+		rtw_list_delete(&pxmitframe->list);
+		ptxservq->qcnt--;
+
+#ifndef IDEA_CONDITION
+		// suppose only data frames would be in queue
+		if (pxmitframe->frame_tag != DATA_FRAMETAG) {
+			RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_,
+				 ("xmitframe_complete: frame tag(%d) is not DATA_FRAMETAG(%d)!\n",
+				  pxmitframe->frame_tag, DATA_FRAMETAG));
+			rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
+			continue;
+		}
+
+		// TID 0~15
+		if ((pxmitframe->attrib.priority < 0) ||
+		    (pxmitframe->attrib.priority > 15)) {
+			RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_,
+				 ("xmitframe_complete: TID(%d) should be 0~15!\n",
+				  pxmitframe->attrib.priority));
+			rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
+			continue;
+		}
+#endif
+
+//		pxmitframe->pxmitbuf = pxmitbuf;
+		pxmitframe->buf_addr = pxmitbuf->pbuf + pbuf;
+
+		pxmitframe->agg_num = 0; // not first frame of aggregation
+		pxmitframe->pkt_offset = 0; // not first frame of aggregation, no need to reserve offset
+
+#ifdef IDEA_CONDITION
+		rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
+#else
+		res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
+		if (res == _FALSE) {
+			rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
+			continue;
+		}
+#endif
+
+		// always return ndis_packet after rtw_xmitframe_coalesce
+		rtw_os_xmit_complete(padapter, pxmitframe);
+
+		// (len - TXDESC_SIZE) == pxmitframe->attrib.last_txcmdsz
+		_update_txdesc(pxmitframe, pxmitframe->buf_addr, pxmitframe->attrib.last_txcmdsz);
+
+		// don't need xmitframe any more
+		rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
+
+		// handle pointer and stop condition
+		pbuf_tail = pbuf + len;
+		pbuf = _RND8(pbuf_tail);
+
+		pfirstframe->agg_num++;
+		if (MAX_TX_AGG_PACKET_NUMBER == pfirstframe->agg_num)
+			break;
+
+		if (pbuf < bulkPtr) {
+			descCount++;
+			if (descCount == pHalData->UsbTxAggDescNum)
+				break;
+		} else {
+			descCount = 0;
+			bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize;
+		}
+	}
+	if (_rtw_queue_empty(&ptxservq->sta_pending) == _TRUE)
+		rtw_list_delete(&ptxservq->tx_pending);
+
+	_exit_critical_bh(&pxmitpriv->lock, &irqL);
+
+	if ((pfirstframe->attrib.ether_type != 0x0806) &&
+	    (pfirstframe->attrib.ether_type != 0x888e) &&
+	    (pfirstframe->attrib.dhcp_pkt != 1))
+	{
+		rtw_issue_addbareq_cmd(padapter, pfirstframe);
+	}
+
+	//3 3. update first frame txdesc
+	if ((pbuf_tail % bulkSize) == 0) {
+		// remove pkt_offset
+		pbuf_tail -= PACKET_OFFSET_SZ;
+		pfirstframe->buf_addr += PACKET_OFFSET_SZ;
+		pfirstframe->pkt_offset = 0;
+	}
+	_update_txdesc(pfirstframe, pfirstframe->buf_addr, pfirstframe->attrib.last_txcmdsz);
+
+	//3 4. write xmit buffer to USB FIFO
+	ff_hwaddr = rtw_get_ff_hwaddr(pfirstframe);
+
+	// xmit address == ((xmit_frame*)pxmitbuf->priv_data)->buf_addr
+	rtw_write_port(padapter, ff_hwaddr, pbuf_tail, (u8*)pxmitbuf);
+
+
+	//3 5. update statisitc
+	pbuf_tail -= (pfirstframe->agg_num * TXDESC_SIZE);
+	if (pfirstframe->pkt_offset == 1) pbuf_tail -= PACKET_OFFSET_SZ;
+	
+	rtw_count_tx_stats(padapter, pfirstframe, pbuf_tail);
+
+	rtw_free_xmitframe_ex(pxmitpriv, pfirstframe);
+
+	return _TRUE;
+}
+#endif
+#else
+
+s32 rtl8192du_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf)
+{		
+
+	struct hw_xmit *phwxmits;
+	sint hwentry;
+	struct xmit_frame *pxmitframe=NULL;	
+	int res=_SUCCESS, xcnt = 0;
+
+	phwxmits = pxmitpriv->hwxmits;
+	hwentry = pxmitpriv->hwxmit_entry;
+
+	RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("xmitframe_complete()\n"));
+
+	if(pxmitbuf==NULL)
+	{
+		pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);		
+		if(!pxmitbuf)
+		{
+			return _FALSE;
+		}			
+	}
+
+	do
+	{		
+		pxmitframe =  rtw_dequeue_xframe(pxmitpriv, phwxmits, hwentry);
+		
+		if(pxmitframe)
+		{
+			pxmitframe->pxmitbuf = pxmitbuf;				
+
+			pxmitframe->buf_addr = pxmitbuf->pbuf;
+
+			pxmitbuf->priv_data = pxmitframe;	
+
+			if((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG)
+			{	
+				if(pxmitframe->attrib.priority<=15)//TID0~15
+				{
+					res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
+				}	
+							
+				rtw_os_xmit_complete(padapter, pxmitframe);//always return ndis_packet after rtw_xmitframe_coalesce 			
+			}	
+
+				
+			RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("xmitframe_complete(): rtw_dump_xframe\n"));
+
+			
+			if(res == _SUCCESS)
+			{
+				rtw_dump_xframe(padapter, pxmitframe);		 
+			}
+			else
+			{
+				rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
+				rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);	
+			}
+	 			 		
+			xcnt++;
+			
+		}
+		else
+		{			
+			rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
+			return _FALSE;
+		}
+
+		break;
+		
+	}while(0/*xcnt < (NR_XMITFRAME >> 3)*/);
+
+	return _TRUE;
+	
+}
+#endif
+
+
+static s32 xmitframe_direct(_adapter *padapter, struct xmit_frame *pxmitframe)
+{
+	s32 res = _SUCCESS;
+
+
+	res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
+	if (res == _SUCCESS) {
+		rtw_dump_xframe(padapter, pxmitframe);
+	}
+
+	return res;
+}
+
+/*
+ * Return
+ *	_TRUE	dump packet directly
+ *	_FALSE	enqueue packet
+ */
+static s32 pre_xmitframe(_adapter *padapter, struct xmit_frame *pxmitframe)
+{
+	_irqL irqL;
+	s32 res;
+	struct xmit_buf *pxmitbuf = NULL;
+	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
+	struct pkt_attrib *pattrib = &pxmitframe->attrib;
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+#ifdef CONFIG_CONCURRENT_MODE
+	PADAPTER pbuddy_adapter = padapter->pbuddy_adapter;
+	struct mlme_priv *pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv);
+#endif //CONFIG_CONCURRENT_MODE
+
+	do_queue_select(padapter, pattrib);
+	
+	_enter_critical_bh(&pxmitpriv->lock, &irqL);
+	
+#ifdef CONFIG_AP_MODE
+	if(xmitframe_enqueue_for_sleeping_sta(padapter, pxmitframe) == _TRUE)
+	{
+		struct sta_info *psta;
+		struct sta_priv *pstapriv = &padapter->stapriv;
+
+	
+		_exit_critical_bh(&pxmitpriv->lock, &irqL);
+
+		if(pattrib->psta)
+		{
+			psta = pattrib->psta;
+		}
+		else
+		{
+			psta=rtw_get_stainfo(pstapriv, pattrib->ra);
+		}
+
+		if(psta)
+		{
+			if(psta->sleepq_len > (NR_XMITFRAME>>3))
+			{
+				wakeup_sta_to_xmit(padapter, psta);
+			}	
+		}	
+
+		return _FALSE;
+	}
+#endif
+
+#ifdef PLATFORM_FREEBSD
+	//force tx to enqueue, and schedule tx task later.
+	goto enqueue;
+#endif	// PLATFORM_FREEBSD
+
+	if (rtw_txframes_sta_ac_pending(padapter, pattrib) > 0 ||
+#ifdef CONFIG_DUALMAC_CONCURRENT
+		(dc_check_xmit(padapter)== _FALSE) ||
+#endif
+		ATOMIC_READ(&(GET_HAL_DATA(padapter)->IQKRdyForXmit))==0)
+		goto enqueue;
+
+	if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE)
+		goto enqueue;
+
+#ifdef CONFIG_CONCURRENT_MODE
+	if (check_fwstate(pbuddy_mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE)
+		goto enqueue;
+#endif //CONFIG_CONCURRENT_MODE
+
+	pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
+	if (pxmitbuf == NULL)
+		goto enqueue;
+
+	_exit_critical_bh(&pxmitpriv->lock, &irqL);
+
+	pxmitframe->pxmitbuf = pxmitbuf;
+	pxmitframe->buf_addr = pxmitbuf->pbuf;
+	pxmitbuf->priv_data = pxmitframe;
+
+	if (xmitframe_direct(padapter, pxmitframe) != _SUCCESS) {
+		rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
+		rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
+	}
+
+	return _TRUE;
+
+enqueue:
+	res = rtw_xmitframe_enqueue(padapter, pxmitframe);
+	_exit_critical_bh(&pxmitpriv->lock, &irqL);
+
+	if (res != _SUCCESS) {
+		RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("pre_xmitframe: enqueue xmitframe fail\n"));
+		rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
+
+		// Trick, make the statistics correct
+		pxmitpriv->tx_pkts--;
+		pxmitpriv->tx_drop++;
+		return _TRUE;
+	}
+
+#ifdef PLATFORM_FREEBSD
+	rtw_os_xmit_schedule(padapter);
+#endif	// PLATFORM_FREEBSD
+
+	return _FALSE;
+}
+
+void rtl8192du_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe)
+{
+	rtw_dump_xframe(padapter, pmgntframe);
+}
+
+/*
+ * Return
+ *	_TRUE	dump packet directly ok
+ *	_FALSE	temporary can't transmit packets to hardware
+ */
+s32 rtl8192du_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe)
+{
+	return pre_xmitframe(padapter, pxmitframe);
+}
+
+#ifdef  CONFIG_HOSTAPD_MLME
+
+static void rtl8192du_hostap_mgnt_xmit_cb(struct urb *urb)
+{	
+#ifdef PLATFORM_LINUX
+	struct sk_buff *skb = (struct sk_buff *)urb->context;
+
+	//DBG_8192C("%s\n", __FUNCTION__);
+
+	dev_kfree_skb_any(skb);
+#endif	
+}
+
+s32 rtl8192du_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt)
+{
+#ifdef PLATFORM_LINUX
+	u16 fc;
+	int rc, len, pipe;	
+	unsigned int bmcst, tid, qsel;
+	struct sk_buff *skb, *pxmit_skb;
+	struct urb *urb;
+	unsigned char *pxmitbuf;
+	struct tx_desc *ptxdesc;
+	struct ieee80211_hdr *tx_hdr;
+	struct hostapd_priv *phostapdpriv = padapter->phostapdpriv;	
+	struct net_device *pnetdev = padapter->pnetdev;
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
+	struct dvobj_priv *pdvobj = &padapter->dvobjpriv;	
+
+	
+	//DBG_8192C("%s\n", __FUNCTION__);
+
+	skb = pkt;
+	
+	len = skb->len;
+	tx_hdr = (struct ieee80211_hdr *)(skb->data);
+	fc = le16_to_cpu(tx_hdr->frame_ctl);
+	bmcst = IS_MCAST(tx_hdr->addr1);
+
+	if ((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_MGMT)
+		goto _exit;
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html
+	pxmit_skb = dev_alloc_skb(len + TXDESC_SIZE);			
+#else			
+	pxmit_skb = netdev_alloc_skb(pnetdev, len + TXDESC_SIZE);
+#endif		
+
+	if(!pxmit_skb)
+		goto _exit;
+
+	pxmitbuf = pxmit_skb->data;
+#ifdef PLATFORM_FREEBSD
+	urb = rtw_usb_alloc_urb(0, GFP_ATOMIC);
+#else //PLATFORM_FREEBSD
+	urb = usb_alloc_urb(0, GFP_ATOMIC);
+#endif //PLATFORM_FREEBSD
+	if (!urb) {
+		goto _exit;
+	}
+
+	// ----- fill tx desc -----	
+	ptxdesc = (struct tx_desc *)pxmitbuf;	
+	_rtw_memset(ptxdesc, 0, sizeof(*ptxdesc));
+		
+	//offset 0	
+	ptxdesc->txdw0 |= cpu_to_le32(len&0x0000ffff); 
+	ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<<OFFSET_SHT)&0x00ff0000);//default = 32 bytes for TX Desc
+	ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
+
+	if(bmcst)	
+	{
+		ptxdesc->txdw0 |= cpu_to_le32(BIT(24));
+	}	
+
+	//offset 4	
+	ptxdesc->txdw1 |= cpu_to_le32(0x00);//MAC_ID
+
+	ptxdesc->txdw1 |= cpu_to_le32((0x12<<QSEL_SHT)&0x00001f00);
+
+	ptxdesc->txdw1 |= cpu_to_le32((0x06<< 16) & 0x000f0000);//b mode
+
+	//offset 8			
+
+	//offset 12		
+	ptxdesc->txdw3 |= cpu_to_le32((le16_to_cpu(tx_hdr->seq_ctl)<<16)&0xffff0000);
+
+	//offset 16		
+	ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
+		
+	//offset 20
+
+
+	//HW append seq
+	ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number
+	ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29.
+	
+
+	rtl8192cu_cal_txdesc_chksum(ptxdesc);
+	// ----- end of fill tx desc -----
+
+	//
+	skb_put(pxmit_skb, len + TXDESC_SIZE);
+	pxmitbuf = pxmitbuf + TXDESC_SIZE;
+	_rtw_memcpy(pxmitbuf, skb->data, len);
+
+	//DBG_8192C("mgnt_xmit, len=%x\n", pxmit_skb->len);
+
+
+	// ----- prepare urb for submit -----
+	
+	//translate DMA FIFO addr to pipehandle
+	//pipe = ffaddr2pipehdl(pdvobj, MGT_QUEUE_INX);
+	pipe = usb_sndbulkpipe(pdvobj->pusbdev, pHalData->Queue2EPNum[(u8)MGT_QUEUE_INX]&0x0f);
+#ifdef PLATFORM_FREEBSD
+	rtw_usb_fill_bulk_urb(urb, pdvobj->pusbdev, pipe,
+		pxmit_skb->data, pxmit_skb->len, rtl8192cu_hostap_mgnt_xmit_cb, pxmit_skb);
+#else //PLATFORM_FREEBSD
+	usb_fill_bulk_urb(urb, pdvobj->pusbdev, pipe,
+		pxmit_skb->data, pxmit_skb->len, rtl8192cu_hostap_mgnt_xmit_cb, pxmit_skb);
+#endif //PLATFORM_FREEBSD
+	
+	urb->transfer_flags |= URB_ZERO_PACKET;
+	usb_anchor_urb(urb, &phostapdpriv->anchored);
+#ifdef PLATFORM_FREEBSD
+	rc = rtw_usb_submit_urb(urb, GFP_ATOMIC);
+#else //PLATFORM_FREEBSD
+	rc = usb_submit_urb(urb, GFP_ATOMIC);
+#endif //PLATFORM_FREEBSD
+	if (rc < 0) {
+		usb_unanchor_urb(urb);
+		kfree_skb(skb);
+	}
+#ifdef PLATFORM_FREEBSD
+	rtw_usb_free_urb(urb);
+#else //PLATFORM_FREEBSD
+	usb_free_urb(urb);
+#endif //PLATFORM_FREEBSD
+
+	
+_exit:	
+	
+	dev_kfree_skb_any(skb);
+
+#endif
+
+	return 0;
+
+}
+#endif
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/usb_halinit.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/usb_halinit.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/usb_halinit.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/usb_halinit.c	2017-09-23 03:42:49.986675163 +0800
@@ -0,0 +1,5315 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _HCI_HAL_INIT_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <hal_init.h>
+#include <rtw_efuse.h>
+
+#include <rtl8192d_hal.h>
+#include <rtl8192d_led.h>
+
+#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
+
+#error "Shall be Linux or Windows, but not both!\n"
+
+#endif
+
+#ifndef CONFIG_USB_HCI
+
+#error "CONFIG_USB_HCI shall be on!\n"
+
+#endif
+
+#include <usb_ops.h>
+#include <usb_hal.h>
+#include <usb_osintf.h>
+
+
+#if DISABLE_BB_RF
+	#define		HAL_MAC_ENABLE	0
+	#define		HAL_BB_ENABLE		0
+	#define		HAL_RF_ENABLE		0
+#else
+	#define		HAL_MAC_ENABLE	1
+	#define		HAL_BB_ENABLE		1
+	#define		HAL_RF_ENABLE		1
+#endif
+
+//add mutex to solve the problem that reading efuse and power on/fw download do 
+//on the same time 
+extern atomic_t GlobalMutexForMac0_2G_Mac1_5G;
+extern atomic_t GlobalMutexForPowerAndEfuse;
+extern atomic_t GlobalMutexForPowerOnAndPowerOff;
+#ifdef CONFIG_DUALMAC_CONCURRENT
+extern atomic_t GlobalCounterForMutex;
+extern BOOLEAN GlobalFirstConfigurationForNormalChip;
+#endif
+
+
+//endpoint number 1,2,3,4,5
+// bult in : 1
+// bult out: 2 (High)
+// bult out: 3 (Normal) for 3 out_ep, (Low) for 2 out_ep
+// interrupt in: 4
+// bult out: 5 (Low) for 3 out_ep
+
+
+static VOID
+_OneOutEpMapping(
+	IN	HAL_DATA_TYPE	*pHalData
+	)
+{
+	//only endpoint number 0x02
+
+	pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[0];//VO
+	pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[0];//VI
+	pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[0];//BE
+	pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[0];//BK
+	
+	pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//TS
+	pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT
+	pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//BMC
+	pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//BCN
+}
+
+
+static VOID
+_TwoOutEpMapping(
+	IN	HAL_DATA_TYPE	*pHalData,
+	IN	BOOLEAN	 		bWIFICfg
+	)
+{
+
+	if(bWIFICfg){ // Normal chip && wmm
+		
+		//	BK, 	BE, 	VI, 	VO, 	BCN,	CMD,MGT,HIGH,HCCA 
+		//{  0, 	1, 	0, 	1, 	0, 	0, 	0, 	0, 		0	};
+		//0:H(end_number=0x02), 1:L (end_number=0x03)
+		
+		pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[1];//VO
+		pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[0];//VI
+		pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[1];//BE
+		pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[0];//BK
+		
+		pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//TS
+		pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT
+		pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//BMC
+		pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//BCN
+		
+	}
+	else{//typical setting
+
+		
+		//BK, 	BE, 	VI, 	VO, 	BCN,	CMD,MGT,HIGH,HCCA 
+		//{  1, 	1, 	0, 	0, 	0, 	0, 	0, 	0, 		0	};			
+		//0:H(end_number=0x02), 1:L (end_number=0x03)
+		
+		pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[0];//VO
+		pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[0];//VI
+		pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[1];//BE
+		pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[1];//BK
+		
+		pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//TS
+		pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT
+		pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//BMC
+		pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//BCN	
+		
+	}
+	
+}
+
+
+static VOID _ThreeOutEpMapping(
+	IN	HAL_DATA_TYPE	*pHalData,
+	IN	BOOLEAN	 		bWIFICfg
+	)
+{
+	if(bWIFICfg){//for WMM
+		
+		//	BK, 	BE, 	VI, 	VO, 	BCN,	CMD,MGT,HIGH,HCCA 
+		//{  1, 	2, 	1, 	0, 	0, 	0, 	0, 	0, 		0	};
+		//0:H(end_number=0x02), 1:N(end_number=0x03), 2:L (end_number=0x05)
+		
+		pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[0];//VO
+		pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[1];//VI
+		pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[2];//BE
+		pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[1];//BK
+		
+		pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//TS
+		pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT
+		pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//BMC
+		pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//BCN
+		
+	}
+	else{//typical setting
+
+		
+		//	BK, 	BE, 	VI, 	VO, 	BCN,	CMD,MGT,HIGH,HCCA 
+		//{  2, 	2, 	1, 	0, 	0, 	0, 	0, 	0, 		0	};			
+		//0:H(end_number=0x02), 1:N(end_number=0x03), 2:L (end_number=0x05)
+		
+		pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[0];//VO
+		pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[1];//VI
+		pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[2];//BE
+		pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[2];//BK
+		
+		pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//TS
+		pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT
+		pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//BMC
+		pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//BCN	
+	}
+
+}
+
+static BOOLEAN
+_MappingOutEP(
+	IN	PADAPTER	pAdapter,
+	IN	u8		NumOutPipe
+	)
+{		
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
+	struct registry_priv *pregistrypriv = &pAdapter->registrypriv;
+
+	BOOLEAN	 bWIFICfg = (pregistrypriv->wifi_spec) ?_TRUE:_FALSE;
+	
+	BOOLEAN result = _TRUE;
+
+	switch(NumOutPipe)
+	{
+		case 2:
+			_TwoOutEpMapping(pHalData, bWIFICfg);
+			break;
+		case 3:
+			_ThreeOutEpMapping(pHalData, bWIFICfg);
+			break;
+		case 1:
+			_OneOutEpMapping(pHalData);
+			break;
+		default:
+			result = _FALSE;
+			break;
+	}
+
+	return result;
+	
+}
+
+static VOID
+_ConfigChipOutEP(
+	IN	PADAPTER	pAdapter,
+	IN	u8		NumOutPipe
+	)
+{
+	u8			value8;
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(pAdapter);
+
+	pHalData->OutEpQueueSel = 0;
+	pHalData->OutEpNumber = 0;
+		
+	// Normal and High queue
+	if(pHalData->interfaceIndex==0)
+		value8=rtw_read8(pAdapter, REG_USB_High_NORMAL_Queue_Select_MAC0);
+	else
+		value8=rtw_read8(pAdapter, REG_USB_High_NORMAL_Queue_Select_MAC1);
+
+	if(value8 & USB_NORMAL_SIE_EP_MASK){
+		pHalData->OutEpQueueSel |= TX_SELE_HQ;
+		pHalData->OutEpNumber++;
+	}
+	
+	if((value8 >> USB_NORMAL_SIE_EP_SHIFT) & USB_NORMAL_SIE_EP_MASK){
+		pHalData->OutEpQueueSel |= TX_SELE_NQ;
+		pHalData->OutEpNumber++;
+	}
+	
+	// Low queue
+	if(pHalData->interfaceIndex==0)
+		value8=rtw_read8(pAdapter, (REG_USB_High_NORMAL_Queue_Select_MAC0+1));
+	else
+		value8=rtw_read8(pAdapter, (REG_USB_High_NORMAL_Queue_Select_MAC1+1));
+	
+	if(value8 & USB_NORMAL_SIE_EP_MASK){
+		pHalData->OutEpQueueSel |= TX_SELE_LQ;
+		pHalData->OutEpNumber++;
+	}
+
+	//add for 0xfe44 0xfe45 0xfe47 0xfe48 not validly 
+	switch(NumOutPipe){
+		case 3:
+			pHalData->OutEpQueueSel=TX_SELE_HQ| TX_SELE_LQ|TX_SELE_NQ;
+			pHalData->OutEpNumber=3;
+			break;
+		case 2:
+			pHalData->OutEpQueueSel=TX_SELE_HQ| TX_SELE_NQ;
+			pHalData->OutEpNumber=2;
+			break;
+		case 1:
+			pHalData->OutEpQueueSel=TX_SELE_HQ;
+			pHalData->OutEpNumber=1;
+			break;
+		default:				
+			break;
+	}
+
+	// TODO: Error recovery for this case
+	//RT_ASSERT((NumOutPipe == pHalData->OutEpNumber), ("Out EP number isn't match! %d(Descriptor) != %d (SIE reg)\n", (u4Byte)NumOutPipe, (u4Byte)pHalData->OutEpNumber));
+
+}
+
+static BOOLEAN HalUsbSetQueuePipeMapping8192DUsb(
+	IN	PADAPTER	pAdapter,
+	IN	u8		NumInPipe,
+	IN	u8		NumOutPipe
+	)
+{
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(pAdapter);
+	BOOLEAN			result		= _FALSE;
+
+	_ConfigChipOutEP(pAdapter, NumOutPipe);
+
+	// Normal chip with one IN and one OUT doesn't have interrupt IN EP.
+	if(1 == pHalData->OutEpNumber){
+		if(1 != NumInPipe){
+			return result;
+		}
+	}
+
+	result = _MappingOutEP(pAdapter, NumOutPipe);
+	
+	return result;
+
+}
+
+void rtl8192du_interface_configure(_adapter *padapter);
+void rtl8192du_interface_configure(_adapter *padapter)
+{
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(padapter);
+	struct dvobj_priv	*pdvobjpriv = &padapter->dvobjpriv;
+
+	if (pdvobjpriv->ishighspeed == _TRUE)
+	{
+		pHalData->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;//512 bytes
+	}
+	else
+	{
+		pHalData->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;//64 bytes
+	}
+
+	pHalData->interfaceIndex = pdvobjpriv->InterfaceNumber;
+	pHalData->RtBulkInPipe = pdvobjpriv->ep_num[0];
+	pHalData->RtBulkOutPipe[0] = pdvobjpriv->ep_num[1];
+	pHalData->RtBulkOutPipe[1] = pdvobjpriv->ep_num[2];
+	pHalData->RtIntInPipe = pdvobjpriv->ep_num[3];
+	pHalData->RtBulkOutPipe[2] = pdvobjpriv->ep_num[4];
+	//DBG_8192C("Bulk In = %x, Bulk Out = %x %x %x\n",pHalData->RtBulkInPipe, pHalData->RtBulkOutPipe[0],pHalData->RtBulkOutPipe[1],pHalData->RtBulkOutPipe[2]);
+#ifdef CONFIG_USB_TX_AGGREGATION
+	pHalData->UsbTxAggMode		= 1;
+	pHalData->UsbTxAggDescNum	= 0x4;	// only 4 bits
+#endif
+
+#ifdef CONFIG_USB_RX_AGGREGATION
+	//pHalData->UsbRxAggMode = USB_RX_AGG_DMA_USB;// USB_RX_AGG_DMA;
+	pHalData->UsbRxAggMode = USB_RX_AGG_DMA;// USB_RX_AGG_DMA;
+	pHalData->UsbRxAggBlockCount	= 8; //unit : 512b
+	pHalData->UsbRxAggBlockTimeout = 0x6;
+	pHalData->UsbRxAggPageCount	= 48; //uint :128 b //0x0A;	// 10 = MAX_RX_DMA_BUFFER_SIZE/2/pHalData->UsbBulkOutSize
+	pHalData->UsbRxAggPageTimeout = 0x6; //6, absolute time = 34ms/(2^6)
+#endif
+
+	HalUsbSetQueuePipeMapping8192DUsb(padapter,
+				pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes);
+
+}
+
+static u8 _InitPowerOn(_adapter *padapter)
+{
+	u8	ret = _SUCCESS;
+	u16	value16=0;
+	u8	value8 = 0;
+//	HAL_DATA_TYPE    *pHalData = GET_HAL_DATA(padapter);
+
+	// polling autoload done.
+	u32	pollingCount = 0;
+
+	if(padapter->bSurpriseRemoved){
+		return _FAIL;
+	}
+
+#if 0
+	if(pHalData->MacPhyMode92D != SINGLEMAC_SINGLEPHY)
+	{
+		// in DMDP mode,polling power off in process bit 0x17[7]
+		value8=rtw_read8(padapter, 0x17);
+		while((value8&BIT7) && (pollingCount < 200))
+		{
+			rtw_udelay_os(200);
+			value8=rtw_read8(padapter, 0x17);		
+			pollingCount++;
+		}
+	}
+#endif
+	pollingCount = 0;
+	do
+	{
+		if(rtw_read8(padapter, REG_APS_FSMCO) & PFM_ALDN){
+			//RT_TRACE(COMP_INIT,DBG_LOUD,("Autoload Done!\n"));
+			break;
+		}
+
+		if(pollingCount++ > POLLING_READY_TIMEOUT_COUNT){
+			//RT_TRACE(COMP_INIT,DBG_SERIOUS,("Failed to polling REG_APS_FSMCO[PFM_ALDN] done!\n"));
+			return _FAIL;
+		}
+				
+	}while(_TRUE);
+
+
+	//For hardware power on sequence.
+
+	//0.	RSV_CTRL 0x1C[7:0] = 0x00			// unlock ISO/CLK/Power control register
+	rtw_write8(padapter, REG_RSV_CTRL, 0x0);	
+	// Power on when re-enter from IPS/Radio off/card disable
+	rtw_write8(padapter, REG_SPS0_CTRL, 0x2b);//enable SPS into PWM mode
+	rtw_usleep_os(100);//PlatformSleepUs(150);//this is not necessary when initially power on
+
+	value8 = rtw_read8(padapter, REG_LDOV12D_CTRL);	
+	if(0== (value8 & LDV12_EN) ){
+		value8 |= LDV12_EN;
+		rtw_write8(padapter, REG_LDOV12D_CTRL, value8);	
+		//RT_TRACE(COMP_INIT, DBG_LOUD, (" power-on :REG_LDOV12D_CTRL Reg0x21:0x%02x.\n",value8));
+		rtw_usleep_os(100);//PlatformSleepUs(100);//this is not necessary when initially power on
+		value8 = rtw_read8(padapter, REG_SYS_ISO_CTRL);
+		value8 &= ~ISO_MD2PP;
+		rtw_write8(padapter, REG_SYS_ISO_CTRL, value8);			
+	}	
+	
+	// auto enable WLAN
+	pollingCount = 0;
+	value16 = rtw_read16(padapter, REG_APS_FSMCO);
+	value16 |= APFM_ONMAC;
+	rtw_write16(padapter, REG_APS_FSMCO, value16);
+
+	do
+	{
+		if(0 == (rtw_read16(padapter, REG_APS_FSMCO) & APFM_ONMAC)){
+			//RT_TRACE(COMP_INIT,DBG_LOUD,("MAC auto ON okay!\n"));
+			break;
+		}
+
+		if(pollingCount++ > POLLING_READY_TIMEOUT_COUNT){
+			//RT_TRACE(COMP_INIT,DBG_SERIOUS,("Failed to polling REG_APS_FSMCO[APFM_ONMAC] done!\n"));
+			return _FAIL;
+		}
+				
+	}while(_TRUE);
+
+	// release RF digital isolation
+	value16 = rtw_read16(padapter, REG_SYS_ISO_CTRL);
+	value16 &= ~ISO_DIOR;
+	rtw_write16(padapter, REG_SYS_ISO_CTRL, value16);
+
+	// Enable MAC DMA/WMAC/SCHEDULE/SEC block
+	value16 = rtw_read16(padapter, REG_CR);
+	value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN
+				| PROTOCOL_EN | SCHEDULE_EN | MACTXEN | MACRXEN | ENSEC);
+	rtw_write16(padapter, REG_CR, value16);
+
+	return ret;
+
+}
+
+
+static VOID 
+PHY_InitPABias92D(IN	PADAPTER Adapter)
+{
+	u8	tmpU1b;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	BOOLEAN		is92 = IS_92D_SINGLEPHY(pHalData->VersionID);
+	RF_RADIO_PATH_E eRFPath = RF_PATH_A;
+
+	tmpU1b = EFUSE_Read1Byte(Adapter, 0x3FA); 
+
+	DBG_871X("PHY_InitPABias92D 0x3FA 0x%x \n",tmpU1b);
+
+	if(!(tmpU1b & BIT0) && (is92 || pHalData->interfaceIndex == 0))
+	{
+		PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, 0x07401);	
+		PHY_SetRFReg(Adapter, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x70000);		
+		PHY_SetRFReg(Adapter, RF_PATH_A, RF_IPA, bRFRegOffsetMask, 0x0F425);
+		PHY_SetRFReg(Adapter, RF_PATH_A, RF_IPA, bRFRegOffsetMask, 0x4F425);		
+		PHY_SetRFReg(Adapter, RF_PATH_A, RF_IPA, bRFRegOffsetMask, 0x8F425);		
+		
+		//Back to RX Mode
+		PHY_SetRFReg(Adapter, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x30000);				
+		DBG_871X("2G PA BIAS path A\n");
+	}	
+
+	if(!(tmpU1b & BIT1) && (is92 || pHalData->interfaceIndex == 1))
+	{
+		eRFPath = pHalData->interfaceIndex == 1?RF_PATH_A:RF_PATH_B;
+		PHY_SetRFReg(Adapter, eRFPath, RF_CHNLBW, bRFRegOffsetMask, 0x07401);	
+		PHY_SetRFReg(Adapter, eRFPath, RF_AC, bRFRegOffsetMask, 0x70000);				
+		PHY_SetRFReg(Adapter, eRFPath, RF_IPA, bRFRegOffsetMask, 0x0F425);
+		PHY_SetRFReg(Adapter, eRFPath, RF_IPA, bRFRegOffsetMask, 0x4F425);		
+		PHY_SetRFReg(Adapter, eRFPath, RF_IPA, bRFRegOffsetMask, 0x8F425);
+
+		//Back to RX Mode
+		PHY_SetRFReg(Adapter, eRFPath, RF_AC, bRFRegOffsetMask, 0x30000);			
+		DBG_871X("2G PA BIAS path B\n");
+	}
+
+	if(!(tmpU1b & BIT2) && (is92 || pHalData->interfaceIndex == 0))
+	{
+		//5GL_channel	
+		PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, 0x17524);	
+		PHY_SetRFReg(Adapter, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x70000);			
+		PHY_SetRFReg(Adapter, RF_PATH_A, RF_IPA, bRFRegOffsetMask, 0x0F496);
+		PHY_SetRFReg(Adapter, RF_PATH_A, RF_IPA, bRFRegOffsetMask, 0x4F496);		
+		PHY_SetRFReg(Adapter, RF_PATH_A, RF_IPA, bRFRegOffsetMask, 0x8F496);		
+
+		//5GM_channel	
+		PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, 0x37564);	
+		PHY_SetRFReg(Adapter, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x70000);			
+		PHY_SetRFReg(Adapter, RF_PATH_A, RF_IPA, bRFRegOffsetMask, 0x0F496);
+		PHY_SetRFReg(Adapter, RF_PATH_A, RF_IPA, bRFRegOffsetMask, 0x4F496);		
+		PHY_SetRFReg(Adapter, RF_PATH_A, RF_IPA, bRFRegOffsetMask, 0x8F496);		
+
+		//5GH_channel	
+		PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, 0x57595);	
+		PHY_SetRFReg(Adapter, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x70000);			
+		PHY_SetRFReg(Adapter, RF_PATH_A, RF_IPA, bRFRegOffsetMask, 0x0F496);
+		PHY_SetRFReg(Adapter, RF_PATH_A, RF_IPA, bRFRegOffsetMask, 0x4F496);		
+		PHY_SetRFReg(Adapter, RF_PATH_A, RF_IPA, bRFRegOffsetMask, 0x8F496);			
+
+		//Back to RX Mode
+		PHY_SetRFReg(Adapter, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x30000);				
+		
+		DBG_871X("5G PA BIAS path A\n");
+	}	
+
+	if(!(tmpU1b & BIT3) && (is92 || pHalData->interfaceIndex == 1))
+	{
+		eRFPath = (pHalData->interfaceIndex == 1)?RF_PATH_A:RF_PATH_B;	
+		//5GL_channel	
+		PHY_SetRFReg(Adapter, eRFPath, RF_CHNLBW, bRFRegOffsetMask, 0x17524);	
+		PHY_SetRFReg(Adapter, eRFPath, RF_AC, bRFRegOffsetMask, 0x70000);		
+		PHY_SetRFReg(Adapter, eRFPath, RF_IPA, bRFRegOffsetMask, 0x0F496);
+		PHY_SetRFReg(Adapter, eRFPath, RF_IPA, bRFRegOffsetMask, 0x4F496);		
+		PHY_SetRFReg(Adapter, eRFPath, RF_IPA, bRFRegOffsetMask, 0x8F496);
+
+		//5GM_channel	
+		PHY_SetRFReg(Adapter, eRFPath, RF_CHNLBW, bRFRegOffsetMask, 0x37564);	
+		PHY_SetRFReg(Adapter, eRFPath, RF_AC, bRFRegOffsetMask, 0x70000);	
+		PHY_SetRFReg(Adapter, eRFPath, RF_IPA, bRFRegOffsetMask, 0x0F496);
+		PHY_SetRFReg(Adapter, eRFPath, RF_IPA, bRFRegOffsetMask, 0x4F496);		
+		PHY_SetRFReg(Adapter, eRFPath, RF_IPA, bRFRegOffsetMask, 0x8F496);
+
+		//5GH_channel	
+		PHY_SetRFReg(Adapter, eRFPath, RF_CHNLBW, bRFRegOffsetMask, 0x57595);	
+		PHY_SetRFReg(Adapter, eRFPath, RF_AC, bRFRegOffsetMask, 0x70000);			
+		PHY_SetRFReg(Adapter, eRFPath, RF_IPA, bRFRegOffsetMask, 0x0F496);
+		PHY_SetRFReg(Adapter, eRFPath, RF_IPA, bRFRegOffsetMask, 0x4F496);		
+		PHY_SetRFReg(Adapter, eRFPath, RF_IPA, bRFRegOffsetMask, 0x8F496);
+
+		//Back to RX Mode
+		PHY_SetRFReg(Adapter, eRFPath, RF_AC, bRFRegOffsetMask, 0x30000);			
+		DBG_871X("5G PA BIAS path B\n");
+	}
+}
+
+//-------------------------------------------------------------------------
+//
+// LLT R/W/Init function
+//
+//-------------------------------------------------------------------------
+static u8 _LLTWrite(
+	IN  PADAPTER	Adapter,
+	IN	u32		address,
+	IN	u32		data
+	)
+{
+	u8	status = _SUCCESS;
+	int	count = 0;
+	u32	value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
+
+	rtw_write32(Adapter, REG_LLT_INIT, value);
+	
+	//polling
+	do{
+		
+		value = rtw_read32(Adapter, REG_LLT_INIT);
+		if(_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)){
+			break;
+		}
+		
+		if(count > POLLING_LLT_THRESHOLD){
+			//RT_TRACE(COMP_INIT,DBG_SERIOUS,("Failed to polling write LLT done at address %d!\n", address));
+			status = _FAIL;
+			break;
+		}
+	}while(count++);
+
+	return status;
+	
+}
+
+#ifndef PLATFORM_FREEBSD //amy,temp remove
+static u8 _LLTRead(
+	IN  PADAPTER	Adapter,
+	IN	u32		address
+	)
+{
+	int		count = 0;
+	u32		value = _LLT_INIT_ADDR(address) | _LLT_OP(_LLT_READ_ACCESS);
+
+	rtw_write32(Adapter, REG_LLT_INIT, value);
+
+	//polling and get value
+	do{
+		
+		value = rtw_read32(Adapter, REG_LLT_INIT);
+		if(_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)){
+			return (u8)value;
+		}
+		
+		if(count > POLLING_LLT_THRESHOLD){
+			//RT_TRACE(COMP_INIT,DBG_SERIOUS,("Failed to polling read LLT done at address %d!\n", address));
+			break;
+		}
+	}while(count++);
+
+	return 0xFF;
+
+}
+#endif //amy,temp remove
+
+static u8 InitLLTTable(
+	IN  PADAPTER	Adapter,
+	IN	u32		boundary
+	)
+{
+	u8		status = _SUCCESS;
+	u32		i;
+	u32		txpktbuf_bndy = boundary;
+	u32		Last_Entry_Of_TxPktBuf = LAST_ENTRY_OF_TX_PKT_BUFFER;
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
+
+
+	if(pHalData->MacPhyMode92D !=SINGLEMAC_SINGLEPHY){
+		//for 92du two mac: The page size is different from 92c and 92s
+		txpktbuf_bndy =TX_PAGE_BOUNDARY_DUAL_MAC;
+		Last_Entry_Of_TxPktBuf=LAST_ENTRY_OF_TX_PKT_BUFFER_DUAL_MAC;
+	}
+	else{
+		txpktbuf_bndy = boundary;
+		Last_Entry_Of_TxPktBuf=LAST_ENTRY_OF_TX_PKT_BUFFER;
+		//txpktbuf_bndy =253;
+		//Last_Entry_Of_TxPktBuf=255;
+	} 
+
+	for(i = 0 ; i < (txpktbuf_bndy - 1) ; i++){
+		status = _LLTWrite(Adapter, i , i + 1);
+		if(_SUCCESS != status){
+			return status;
+		}
+	}
+
+	// end of list
+	status = _LLTWrite(Adapter, (txpktbuf_bndy - 1), 0xFF);
+	if(_SUCCESS != status){
+		return status;
+	}
+
+	// Make the other pages as ring buffer
+	// This ring buffer is used as beacon buffer if we config this MAC as two MAC transfer.
+	// Otherwise used as local loopback buffer. 
+	for(i = txpktbuf_bndy ; i < Last_Entry_Of_TxPktBuf ; i++){
+		status = _LLTWrite(Adapter, i, (i + 1)); 
+		if(_SUCCESS != status){
+			return status;
+		}
+	}
+	
+	// Let last entry point to the start entry of ring buffer
+	status = _LLTWrite(Adapter, Last_Entry_Of_TxPktBuf, txpktbuf_bndy);
+	if(_SUCCESS != status){
+		return status;
+	}
+
+	return status;
+	
+}
+
+#ifndef PLATFORM_FREEBSD //amy,temp remove
+//---------------------------------------------------------------
+//
+//	MAC init functions
+//
+//---------------------------------------------------------------
+static VOID
+_SetMacID(
+	IN  PADAPTER Adapter, u8* MacID
+	)
+{
+	u32 i;
+	for(i=0 ; i< MAC_ADDR_LEN ; i++){
+#ifdef  CONFIG_CONCURRENT_MODE
+		if(Adapter->iface_type == IFACE_PORT1)				
+			rtw_write32(Adapter, REG_MACID1+i, MacID[i]);
+		else
+#endif
+		rtw_write32(Adapter, REG_MACID+i, MacID[i]);
+	}
+}
+
+static VOID
+_SetBSSID(
+	IN  PADAPTER Adapter, u8* BSSID
+	)
+{
+	u32 i;
+	for(i=0 ; i< MAC_ADDR_LEN ; i++){
+#ifdef  CONFIG_CONCURRENT_MODE
+		if(Adapter->iface_type == IFACE_PORT1)			
+			rtw_write32(Adapter, REG_BSSID1+i, BSSID[i]);
+		else
+#endif
+		rtw_write32(Adapter, REG_BSSID+i, BSSID[i]);
+	}
+}
+#endif //amy,temp remove
+
+// Shall USB interface init this?
+static VOID
+_InitInterrupt(
+	IN  PADAPTER Adapter
+	)
+{
+	u32	value32;
+
+	// HISR - turn all on
+	value32 = 0xFFFFFFFF;
+	rtw_write32(Adapter, REG_HISR, value32);
+
+	// HIMR - turn all on
+	rtw_write32(Adapter, REG_HIMR, value32);
+}
+
+
+static VOID
+_InitQueueReservedPage(
+	IN  PADAPTER Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(Adapter);
+	struct registry_priv *pregistrypriv = &Adapter->registrypriv;
+	
+	u32			outEPNum	= (u32)pHalData->OutEpNumber;
+	u32			numHQ		= 0;
+	u32			numLQ		= 0;
+	u32			numNQ		= 0;
+	u32			numPubQ;
+	u32			value32;
+	u8			value8;
+	u32			txQPageNum, txQPageUnit,txQRemainPage;
+
+	if(!pregistrypriv->wifi_spec)
+	{
+		if(pHalData->MacPhyMode92D !=SINGLEMAC_SINGLEPHY)	
+		{
+			numPubQ = NORMAL_PAGE_NUM_PUBQ_92D_DUAL_MAC;
+			txQPageNum = TX_TOTAL_PAGE_NUMBER_92D_DUAL_MAC- numPubQ;	
+		}
+		else
+		{
+			numPubQ =TEST_PAGE_NUM_PUBQ;
+			//RT_ASSERT((numPubQ < TX_TOTAL_PAGE_NUMBER), ("Public queue page number is great than total tx page number.\n"));
+			txQPageNum = TX_TOTAL_PAGE_NUMBER - numPubQ;
+		}
+
+		if((pHalData->MacPhyMode92D !=SINGLEMAC_SINGLEPHY)&&(outEPNum==3))
+		{// temply for DMDP/DMSP Page allocate
+			numHQ=NORMAL_PAGE_NUM_HPQ_92D_DUAL_MAC;
+			numLQ=NORMAL_PAGE_NUM_LPQ_92D_DUAL_MAC;
+			numNQ=NORMAL_PAGE_NUM_NORMALQ_92D_DUAL_MAC;
+		}
+		else
+		{
+			txQPageUnit = txQPageNum/outEPNum;
+			txQRemainPage = txQPageNum % outEPNum;
+
+			if(pHalData->OutEpQueueSel & TX_SELE_HQ){
+				numHQ = txQPageUnit;
+			}
+			if(pHalData->OutEpQueueSel & TX_SELE_LQ){
+				numLQ = txQPageUnit;
+			}
+			// HIGH priority queue always present in the configuration of 2 or 3 out-ep 
+			// so ,remainder pages have assigned to High queue
+			if((outEPNum>1) && (txQRemainPage)){			
+				numHQ += txQRemainPage;
+			}
+
+			// NOTE: This step shall be proceed before writting REG_RQPN.
+			if(pHalData->OutEpQueueSel & TX_SELE_NQ)
+				numNQ = txQPageUnit;
+
+			value8 = (u8)_NPQ(numNQ);
+			rtw_write8(Adapter, REG_RQPN_NPQ, value8);
+		}
+	}
+	else{ //for WMM 
+		//RT_ASSERT((outEPNum>=2), ("for WMM ,number of out-ep must more than or equal to 2!\n"));
+		// 92du wifi config only for SMSP
+		//RT_ASSERT((pHalData->MacPhyMode92D==SINGLEMAC_SINGLEPHY), ("for WMM ,only SMSP come here!\n"));
+
+		numPubQ = (outEPNum==2)?WMM_NORMAL_PAGE_NUM_PUBQ:WMM_NORMAL_PAGE_NUM_PUBQ_92D;
+
+		if(pHalData->OutEpQueueSel & TX_SELE_HQ){
+			numHQ = (outEPNum==2)?WMM_NORMAL_PAGE_NUM_HPQ:WMM_NORMAL_PAGE_NUM_HPQ_92D;							
+		}
+
+		if(pHalData->OutEpQueueSel & TX_SELE_LQ){
+			numLQ = (outEPNum==2)?WMM_NORMAL_PAGE_NUM_LPQ:WMM_NORMAL_PAGE_NUM_LPQ_92D;
+		}
+
+		if(pHalData->OutEpQueueSel & TX_SELE_NQ){
+			numNQ = (outEPNum==2)?WMM_NORMAL_PAGE_NUM_NPQ:WMM_NORMAL_PAGE_NUM_NPQ_92D;
+			value8 = (u8)_NPQ(numNQ);
+			rtw_write8(Adapter, REG_RQPN_NPQ, value8);
+		}
+	}
+
+	// TX DMA
+	value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN;	
+	rtw_write32(Adapter, REG_RQPN, value32);	
+}
+
+static void _InitID(IN  PADAPTER Adapter)
+{
+	int i;	 
+	EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter);
+	
+	for(i=0; i<6; i++)
+	{
+#ifdef  CONFIG_CONCURRENT_MODE
+		if(Adapter->iface_type == IFACE_PORT1)			
+			rtw_write8(Adapter, (REG_MACID1+i), pEEPROM->mac_addr[i]);			
+		else
+#endif			
+		rtw_write8(Adapter, (REG_MACID+i), pEEPROM->mac_addr[i]);		 	
+	}
+
+/*
+	NicIFSetMacAddress(Adapter, Adapter->PermanentAddress);
+	//Ziv test
+#if 1
+	{
+		u1Byte sMacAddr[6] = {0};
+		u4Byte i;
+		
+		for(i = 0 ; i < MAC_ADDR_LEN ; i++){
+			sMacAddr[i] = PlatformIORead1Byte(Adapter, (REG_MACID + i));
+		}
+		RT_PRINT_ADDR(COMP_INIT|COMP_EFUSE, DBG_LOUD, "Read back MAC Addr: ", sMacAddr);
+	}
+#endif
+*/
+}
+
+
+static VOID
+_InitTxBufferBoundary(
+	IN  PADAPTER Adapter
+	)
+{	
+	struct registry_priv *pregistrypriv = &Adapter->registrypriv;
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(Adapter);
+
+	//u16	txdmactrl;	
+	u8	txpktbuf_bndy; 
+
+	if(!pregistrypriv->wifi_spec){
+		txpktbuf_bndy = TX_PAGE_BOUNDARY;
+	}
+	else{//for WMM
+		txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY;
+	}
+
+	if(pHalData->MacPhyMode92D !=SINGLEMAC_SINGLEPHY)
+		txpktbuf_bndy = TX_PAGE_BOUNDARY_DUAL_MAC;
+
+	rtw_write8(Adapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy);
+	rtw_write8(Adapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy);
+	rtw_write8(Adapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy);
+	rtw_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy);
+	rtw_write8(Adapter, REG_TDECTRL+1, txpktbuf_bndy);
+}
+
+
+static VOID
+_InitNormalChipRegPriority(
+	IN	PADAPTER	Adapter,
+	IN	u16		beQ,
+	IN	u16		bkQ,
+	IN	u16		viQ,
+	IN	u16		voQ,
+	IN	u16		mgtQ,
+	IN	u16		hiQ
+	)
+{
+	u16 value16		= (rtw_read16(Adapter, REG_TRXDMA_CTRL) & 0x7);
+
+	value16 |=	_TXDMA_BEQ_MAP(beQ) 	| _TXDMA_BKQ_MAP(bkQ) |
+				_TXDMA_VIQ_MAP(viQ) 	| _TXDMA_VOQ_MAP(voQ) |
+				_TXDMA_MGQ_MAP(mgtQ)| _TXDMA_HIQ_MAP(hiQ);
+	
+	rtw_write16(Adapter, REG_TRXDMA_CTRL, value16);
+}
+
+static VOID
+_InitNormalChipOneOutEpPriority(
+	IN	PADAPTER Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(Adapter);
+
+	u16	value = 0;
+	switch(pHalData->OutEpQueueSel)
+	{
+		case TX_SELE_HQ:
+			value = QUEUE_HIGH;
+			break;
+		case TX_SELE_LQ:
+			value = QUEUE_LOW;
+			break;
+		case TX_SELE_NQ:
+			value = QUEUE_NORMAL;
+			break;
+		default:
+			//RT_ASSERT(FALSE,("Shall not reach here!\n"));
+			break;
+	}
+	
+	_InitNormalChipRegPriority(Adapter,
+								value,
+								value,
+								value,
+								value,
+								value,
+								value
+								);
+
+}
+
+static VOID
+_InitNormalChipTwoOutEpPriority(
+	IN	PADAPTER Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(Adapter);
+	struct registry_priv *pregistrypriv = &Adapter->registrypriv;
+	u16			beQ,bkQ,viQ,voQ,mgtQ,hiQ;
+	
+
+	u16	valueHi = 0;
+	u16	valueLow = 0;
+	
+	switch(pHalData->OutEpQueueSel)
+	{
+		case (TX_SELE_HQ | TX_SELE_LQ):
+			valueHi = QUEUE_HIGH;
+			valueLow = QUEUE_LOW;
+			break;
+		case (TX_SELE_NQ | TX_SELE_LQ):
+			valueHi = QUEUE_NORMAL;
+			valueLow = QUEUE_LOW;
+			break;
+		case (TX_SELE_HQ | TX_SELE_NQ):
+			valueHi = QUEUE_HIGH;
+			valueLow = QUEUE_NORMAL;
+			break;
+		default:
+			//RT_ASSERT(FALSE,("Shall not reach here!\n"));
+			break;
+	}
+
+	if(!pregistrypriv->wifi_spec ){
+		beQ 		= valueLow;
+		bkQ 		= valueLow;
+		viQ		= valueHi;
+		voQ 		= valueHi;
+		mgtQ 	= valueHi; 
+		hiQ 		= valueHi;								
+	}
+	else{//for WMM ,CONFIG_OUT_EP_WIFI_MODE
+		beQ		= valueLow;
+		bkQ 		= valueHi;		
+		viQ 		= valueHi;
+		voQ 		= valueLow;
+		mgtQ 	= valueHi;
+		hiQ 		= valueHi;							
+	}
+	
+	_InitNormalChipRegPriority(Adapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ);
+
+}
+
+static VOID
+_InitNormalChipThreeOutEpPriority(
+	IN	PADAPTER Adapter
+	)
+{
+	struct registry_priv *pregistrypriv = &Adapter->registrypriv;
+	u16			beQ,bkQ,viQ,voQ,mgtQ,hiQ;
+
+	if(!pregistrypriv->wifi_spec ){// typical setting
+		beQ		= QUEUE_LOW;
+		bkQ 		= QUEUE_LOW;
+		viQ 		= QUEUE_NORMAL;
+		voQ 		= QUEUE_HIGH;
+		mgtQ 	= QUEUE_HIGH;
+		hiQ 		= QUEUE_HIGH;			
+	}
+	else{// for WMM
+		beQ		= QUEUE_LOW;
+		bkQ 		= QUEUE_NORMAL;
+		viQ 		= QUEUE_NORMAL;
+		voQ 		= QUEUE_HIGH;
+		mgtQ 	= QUEUE_HIGH;
+		hiQ 		= QUEUE_HIGH;			
+	}
+	_InitNormalChipRegPriority(Adapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ);
+}
+
+static VOID
+_InitQueuePriority(
+	IN  PADAPTER Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(Adapter);
+
+	switch(pHalData->OutEpNumber)
+	{
+		case 1:
+			_InitNormalChipOneOutEpPriority(Adapter);
+			break;
+		case 2:
+			_InitNormalChipTwoOutEpPriority(Adapter);
+			break;
+		case 3:
+			_InitNormalChipThreeOutEpPriority(Adapter);
+			break;
+		default:
+			//RT_ASSERT(FALSE,("Shall not reach here!\n"));
+			break;
+	}
+}
+#if ENABLE_USB_DROP_INCORRECT_OUT //amy,temp remove
+static VOID
+_InitHardwareDropIncorrectBulkOut(
+	IN  PADAPTER Adapter
+	)
+{
+	u32	value32 = rtw_read32(Adapter, REG_TXDMA_OFFSET_CHK);
+	value32 |= DROP_DATA_EN;
+	rtw_write32(Adapter, REG_TXDMA_OFFSET_CHK, value32);
+}
+#endif //ENABLE_USB_DROP_INCORRECT_OUT, amy,temp remove
+static VOID
+_InitNetworkType(
+	IN  PADAPTER Adapter
+	)
+{
+	u32	value32;
+
+	value32 = rtw_read32(Adapter, REG_CR);
+
+	// TODO: use the other function to set network type
+#if RTL8191C_FPGA_NETWORKTYPE_ADHOC
+	value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AD_HOC);
+#else
+	value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP);
+#endif
+	rtw_write32(Adapter, REG_CR, value32);
+//	RASSERT(pIoBase->rtw_read8(REG_CR + 2) == 0x2);
+}
+
+static VOID
+_InitTransferPageSize(
+	IN  PADAPTER Adapter
+	)
+{
+	// Tx page size is always 128.
+	
+	u8	value8;
+	value8 = _PSRX(PBP_128) | _PSTX(PBP_128);
+	rtw_write8(Adapter, REG_PBP, value8);
+}
+
+static VOID
+_InitDriverInfoSize(
+	IN  PADAPTER	Adapter,
+	IN	u8		drvInfoSize
+	)
+{
+	rtw_write8(Adapter,REG_RX_DRVINFO_SZ, drvInfoSize);
+}
+
+static VOID
+_InitWMACSetting(
+	IN  PADAPTER Adapter
+	)
+{
+	//u4Byte			value32;
+	//u16			value16;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	//pHalData->ReceiveConfig = AAP | APM | AM | AB | APP_ICV | ADF | AMF | APP_FCS | HTC_LOC_CTRL | APP_MIC | APP_PHYSTS;
+	pHalData->ReceiveConfig = AAP | APM | AM | AB | CBSSID |CBSSID_BCN | APP_ICV | AMF | HTC_LOC_CTRL | APP_MIC | APP_PHYSTS;
+
+#if (0 == RTL8192C_RX_PACKET_NO_INCLUDE_CRC)
+	pHalData->ReceiveConfig |= ACRC32;
+#endif
+
+	rtw_write32(Adapter, REG_RCR, pHalData->ReceiveConfig);
+
+	// Accept all multicast address
+	rtw_write32(Adapter, REG_MAR, 0xFFFFFFFF);
+	rtw_write32(Adapter, REG_MAR+4, 0xFFFFFFFF);
+
+	// Accept all data frames
+	//value16 = 0xFFFF;
+	//rtw_write16(Adapter, REG_RXFLTMAP2, value16);
+
+	// Accept all management frames
+	//value16 = 0xFFFF;
+	//rtw_write16(Adapter, REG_RXFLTMAP0, value16);
+
+	//Reject all control frame - default value is 0
+	//rtw_write16(Adapter,REG_RXFLTMAP1,0x0);
+}
+
+static VOID
+_InitAdaptiveCtrl(
+	IN  PADAPTER Adapter
+	)
+{
+	u16	value16;
+	u32	value32;
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
+
+	// Response Rate Set
+	value32 = rtw_read32(Adapter, REG_RRSR);
+	value32 &= ~RATE_BITMAP_ALL;
+	if(pHalData->CurrentBandType92D == BAND_ON_5G)
+	{
+		value32 |= RATE_RRSR_WITHOUT_CCK;
+	}
+	else
+	{
+		value32 |= RATE_RRSR_CCK_ONLY_1M;
+	}
+	rtw_write32(Adapter, REG_RRSR, value32);
+
+	// CF-END Threshold
+	//m_spIoBase->rtw_write8(REG_CFEND_TH, 0x1);
+
+	// SIFS (used in NAV)
+	value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
+	rtw_write16(Adapter, REG_SPEC_SIFS, value16);
+
+	// Retry Limit
+	value16 = _LRL(0x30) | _SRL(0x30);
+	rtw_write16(Adapter, REG_RL, value16);
+	
+}
+
+static VOID
+_InitRateFallback(
+	IN  PADAPTER Adapter
+	)
+{
+	// Set Data Auto Rate Fallback Retry Count register.
+	rtw_write32(Adapter, REG_DARFRC, 0x00000000);
+	rtw_write32(Adapter, REG_DARFRC+4, 0x10080404);
+	rtw_write32(Adapter, REG_RARFRC, 0x04030201);
+	rtw_write32(Adapter, REG_RARFRC+4, 0x08070605);
+}
+
+
+static VOID
+_InitEDCA(
+	IN  PADAPTER Adapter
+	)
+{
+	//PHAL_DATA_8192CUSB	pHalData = GetHalData8192CUsb(Adapter);
+	u16				value16;
+
+	//disable EDCCA count down, to reduce collison and retry
+	value16 = rtw_read16(Adapter, REG_RD_CTRL);
+	value16 |= DIS_EDCA_CNT_DWN;
+	rtw_write16(Adapter, REG_RD_CTRL, value16);	
+
+
+	// Update SIFS timing.  ??????????
+	//pHalData->SifsTime = 0x0e0e0a0a;
+	//Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_SIFS,  (pu1Byte)&pHalData->SifsTime);
+	// SIFS for CCK Data ACK
+	rtw_write8(Adapter, REG_SIFS_CTX, 0xa);
+	// SIFS for CCK consecutive tx like CTS data!
+	rtw_write8(Adapter, REG_SIFS_CTX+1, 0xa);
+	
+	// SIFS for OFDM Data ACK
+	rtw_write8(Adapter, REG_SIFS_TRX, 0xe);
+	// SIFS for OFDM consecutive tx like CTS data!
+	rtw_write8(Adapter, REG_SIFS_TRX+1, 0xe);
+
+	// Set CCK/OFDM SIFS
+	rtw_write16(Adapter, REG_SIFS_CTX, 0x0a0a); // CCK SIFS shall always be 10us.
+	rtw_write16(Adapter, REG_SIFS_TRX, 0x1010);
+
+	rtw_write16(Adapter, REG_PROT_MODE_CTRL, 0x0204);
+
+	rtw_write32(Adapter, REG_BAR_MODE_CTRL, 0x014004);
+
+
+	// TXOP
+	rtw_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B);
+	rtw_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F);
+	rtw_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324);
+	rtw_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226);
+
+	// PIFS
+	rtw_write8(Adapter, REG_PIFS, 0x1C);
+		
+	//AGGR BREAK TIME Register
+	rtw_write8(Adapter, REG_AGGR_BREAK_TIME, 0x16);
+
+	rtw_write16(Adapter, REG_NAV_PROT_LEN, 0x0040);
+	
+	rtw_write8(Adapter, REG_BCNDMATIM, 0x02);
+
+	rtw_write8(Adapter, REG_ATIMWND, 0x02);
+	
+}
+
+
+static VOID
+_InitAMPDUAggregation(
+	IN  PADAPTER Adapter
+	)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+
+	//rtw_write32(Adapter, REG_AGGLEN_LMT, 0x99997631);
+
+	if(pHalData->MacPhyMode92D ==SINGLEMAC_SINGLEPHY)
+		rtw_write32(Adapter, REG_AGGLEN_LMT, 0x88728841);
+	else if(pHalData->MacPhyMode92D ==DUALMAC_SINGLEPHY)
+		rtw_write32(Adapter, REG_AGGLEN_LMT, 0x44444441);
+	else if(pHalData->MacPhyMode92D ==DUALMAC_DUALPHY)
+		rtw_write32(Adapter, REG_AGGLEN_LMT, 0x66525541);
+
+	rtw_write8(Adapter, REG_AGGR_BREAK_TIME, 0x16);
+}
+
+static VOID
+_InitBeaconMaxError(
+	IN  PADAPTER	Adapter,
+	IN	BOOLEAN		InfraMode
+	)
+{
+#ifdef RTL8192CU_ADHOC_WORKAROUND_SETTING
+	rtw_write8(Adapter, REG_BCN_MAX_ERR,  0xFF );
+#else
+	//rtw_write8(Adapter, REG_BCN_MAX_ERR, (InfraMode ? 0xFF : 0x10));
+#endif
+}
+
+static VOID
+_InitRDGSetting(
+	IN	PADAPTER Adapter
+	)
+{
+	rtw_write8(Adapter,REG_RD_CTRL,0xFF);
+	rtw_write16(Adapter, REG_RD_NAV_NXT, 0x200);
+	rtw_write8(Adapter,REG_RD_RESP_PKT_TH,0x05);
+}
+
+static VOID
+_InitRetryFunction(
+	IN  PADAPTER Adapter
+	)
+{
+	u8	value8;
+	
+	value8 = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL);
+	value8 |= EN_AMPDU_RTY_NEW;
+	rtw_write8(Adapter, REG_FWHW_TXQ_CTRL, value8);
+
+	// Set ACK timeout
+	rtw_write8(Adapter, REG_ACKTO, 0x40);
+}
+
+
+static VOID
+_InitUsbAggregationSetting(
+	IN  PADAPTER Adapter
+	)
+{
+#ifdef CONFIG_USB_TX_AGGREGATION
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u32			value32;
+
+	if(Adapter->registrypriv.wifi_spec)
+		pHalData->UsbTxAggMode = _FALSE;
+
+	if(pHalData->MacPhyMode92D!=SINGLEMAC_SINGLEPHY)
+		pHalData->UsbTxAggDescNum = 2;
+
+	if(pHalData->UsbTxAggMode){
+		value32 = rtw_read32(Adapter, REG_TDECTRL);
+		value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT);
+		value32 |= ((pHalData->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT);
+		
+		rtw_write32(Adapter, REG_TDECTRL, value32);
+	}
+}
+#endif
+
+	// Rx aggregation setting
+#ifdef CONFIG_USB_RX_AGGREGATION
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8		valueDMA;
+	u8		valueUSB;
+
+	if(pHalData->MacPhyMode92D!=SINGLEMAC_SINGLEPHY)
+	{
+		pHalData->UsbRxAggPageCount	= 24;
+		pHalData->UsbRxAggPageTimeout = 0x6;
+	}
+
+	valueDMA = rtw_read8(Adapter, REG_TRXDMA_CTRL);
+	valueUSB = rtw_read8(Adapter, REG_USB_SPECIAL_OPTION);
+
+	switch(pHalData->UsbRxAggMode)
+	{
+		case USB_RX_AGG_DMA:
+			valueDMA |= RXDMA_AGG_EN;
+			valueUSB &= ~USB_AGG_EN;
+			break;
+		case USB_RX_AGG_USB:
+			valueDMA &= ~RXDMA_AGG_EN;
+			valueUSB |= USB_AGG_EN;
+			break;
+		case USB_RX_AGG_DMA_USB:
+			valueDMA |= RXDMA_AGG_EN;
+			valueUSB |= USB_AGG_EN;
+			break;
+		case USB_RX_AGG_DISABLE:
+		default:
+			valueDMA &= ~RXDMA_AGG_EN;
+			valueUSB &= ~USB_AGG_EN;
+			break;
+	}
+
+	rtw_write8(Adapter, REG_TRXDMA_CTRL, valueDMA);
+	rtw_write8(Adapter, REG_USB_SPECIAL_OPTION, valueUSB);
+#if 1
+	switch(pHalData->UsbRxAggMode)
+	{
+		case USB_RX_AGG_DMA:
+			rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, pHalData->UsbRxAggPageCount);
+			rtw_write8(Adapter, REG_USB_DMA_AGG_TO, pHalData->UsbRxAggPageTimeout);
+			break;
+		case USB_RX_AGG_USB:
+			rtw_write8(Adapter, REG_USB_AGG_TH, pHalData->UsbRxAggBlockCount);
+			rtw_write8(Adapter, REG_USB_AGG_TO, pHalData->UsbRxAggBlockTimeout);
+			break;
+		case USB_RX_AGG_DMA_USB:
+			rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, pHalData->UsbRxAggPageCount);
+			rtw_write8(Adapter, REG_USB_DMA_AGG_TO, pHalData->UsbRxAggPageTimeout);
+			rtw_write8(Adapter, REG_USB_AGG_TH, pHalData->UsbRxAggBlockCount);
+			rtw_write8(Adapter, REG_USB_AGG_TO, pHalData->UsbRxAggBlockTimeout);
+			break;
+		case USB_RX_AGG_DISABLE:
+		default:
+			// TODO: 
+			break;
+	}
+#endif
+	switch(PBP_128)
+	{
+		case PBP_128:
+			pHalData->HwRxPageSize = 128;
+			break;
+		case PBP_64:
+			pHalData->HwRxPageSize = 64;
+			break;
+		case PBP_256:
+			pHalData->HwRxPageSize = 256;
+			break;
+		case PBP_512:
+			pHalData->HwRxPageSize = 512;
+			break;
+		case PBP_1024:
+			pHalData->HwRxPageSize = 1024;
+			break;
+		default:
+			//RT_ASSERT(FALSE, ("RX_PAGE_SIZE_REG_VALUE definition is incorrect!\n"));
+			break;
+	}
+
+}
+#endif
+
+}
+
+
+static VOID
+_InitOperationMode(
+	IN	PADAPTER			Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8				regBwOpMode = 0, MinSpaceCfg=0;
+	u32				regRATR = 0, regRRSR = 0;
+
+	//1 This part need to modified according to the rate set we filtered!!
+	//
+	// Set RRSR, RATR, and REG_BWOPMODE registers
+	//
+	switch(pHalData->CurrentWirelessMode)
+	{
+		case WIRELESS_MODE_B:
+			regBwOpMode = BW_OPMODE_20MHZ;
+			regRATR = RATE_ALL_CCK;
+			regRRSR = RATE_ALL_CCK;
+			break;
+		case WIRELESS_MODE_A:
+			//RT_ASSERT(FALSE,("Error wireless a mode\n"));
+#if 1
+			regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
+			regRATR = RATE_ALL_OFDM_AG;
+			regRRSR = RATE_ALL_OFDM_AG;
+#endif
+			break;
+		case WIRELESS_MODE_G:
+			regBwOpMode = BW_OPMODE_20MHZ;
+			regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+			regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+			break;
+		case WIRELESS_MODE_UNKNOWN:
+		case WIRELESS_MODE_AUTO:
+			//if (pHalData->bInHctTest)
+			if (0)
+			{
+			    regBwOpMode = BW_OPMODE_20MHZ;
+			    regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+			    regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+			}
+			else
+			{
+			    regBwOpMode = BW_OPMODE_20MHZ;
+			    regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
+			    regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+			}
+			break;
+		case WIRELESS_MODE_N_24G:
+			// It support CCK rate by default.
+			// CCK rate will be filtered out only when associated AP does not support it.
+			regBwOpMode = BW_OPMODE_20MHZ;
+				regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
+				regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+			break;
+		case WIRELESS_MODE_N_5G:
+			//RT_ASSERT(FALSE,("Error wireless mode"));
+#if 1
+			regBwOpMode = BW_OPMODE_5G;
+			regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
+			regRRSR = RATE_ALL_OFDM_AG;
+#endif
+			break;
+	}
+
+	// Ziv ????????
+	//rtw_write32(Adapter, REG_INIRTS_RATE_SEL, regRRSR);
+	rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode);
+
+	// For Min Spacing configuration.
+	switch(pHalData->rf_type)
+	{
+		case RF_1T2R:
+		case RF_1T1R:
+			//RT_TRACE(COMP_INIT, DBG_LOUD, ("Initializeadapter: RF_Type%s\n", (pHalData->RF_Type==RF_1T1R? "(1T1R)":"(1T2R)")));
+			MinSpaceCfg = (MAX_MSS_DENSITY_1T<<3);						
+			break;
+		case RF_2T2R:
+		case RF_2T2R_GREEN:
+			//RT_TRACE(COMP_INIT, DBG_LOUD, ("Initializeadapter:RF_Type(2T2R)\n"));
+			MinSpaceCfg = (MAX_MSS_DENSITY_2T<<3);			
+			break;
+	}
+	
+	rtw_write8(Adapter, REG_AMPDU_MIN_SPACE, MinSpaceCfg);
+
+}
+
+
+static VOID
+_InitSecuritySetting(
+	IN  PADAPTER Adapter
+	)
+{
+	invalidate_cam_all(Adapter);
+}
+
+ static VOID
+_InitBeaconParameters(
+	IN  PADAPTER Adapter
+	)
+{
+//	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	 //default value  for register 0x558 and 0x559 is  0x05 0x03 (92DU before bitfile0821) zhiyuan 2009/08/26
+	rtw_write16(Adapter, REG_TBTT_PROHIBIT,0x3c02);// ms
+	rtw_write8(Adapter, REG_DRVERLYINT, 0x05);//ms
+	rtw_write8(Adapter, REG_BCNDMATIM, 0x03);
+
+	// TODO: Remove these magic number
+	//rtw_write16(Adapter, REG_TBTT_PROHIBIT,0x6404);// ms
+	//rtw_write8(Adapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);//ms
+	//rtw_write8(Adapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME);
+
+	// Suggested by designer timchen. Change beacon AIFS to the largest number
+	// beacause test chip does not contension before sending beacon. by tynli. 2009.11.03
+	//if(IS_NORMAL_CHIP( pHalData->VersionID)){
+		rtw_write16(Adapter, REG_BCNTCFG, 0x660F);
+	//}
+	//else{		
+	//	rtw_write16(Adapter, REG_BCNTCFG, 0x66FF);
+	//}
+
+}
+
+static VOID
+_InitRFType(
+	IN	PADAPTER Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+#if (DISABLE_BB_RF==1)
+	pHalData->rf_chip	= RF_PSEUDO_11N;
+	pHalData->rf_type	= RF_1T1R;// RF_2T2R;
+#else
+
+	pHalData->rf_chip	= RF_6052;
+
+	if(pHalData->MacPhyMode92D==DUALMAC_DUALPHY)
+	{
+		pHalData->rf_type = RF_1T1R;
+	}
+	else{// SMSP OR DMSP
+		pHalData->rf_type = RF_2T2R;
+	}
+#endif
+}
+
+#if RTL8192CU_ADHOC_WORKAROUND_SETTING
+static VOID _InitAdhocWorkaroundParams(IN PADAPTER Adapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);	
+	pHalData->RegBcnCtrlVal = rtw_read8(Adapter, REG_BCN_CTRL);
+	pHalData->RegTxPause = rtw_read8(Adapter, REG_TXPAUSE); 
+	pHalData->RegFwHwTxQCtrl = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL+2);
+	pHalData->RegReg542 = rtw_read8(Adapter, REG_TBTT_PROHIBIT+2);
+	pHalData->RegCR_1 = rtw_read8(Adapter, REG_CR+1);
+}
+#endif
+
+static VOID
+_BeaconFunctionEnable(
+	IN	PADAPTER		Adapter,
+	IN	BOOLEAN			Enable,
+	IN	BOOLEAN			Linked
+	)
+{
+//	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+//	u8			value8 = 0;
+#if 0
+	value8 = Enable ? (EN_BCN_FUNCTION | EN_TXBCN_RPT) : EN_BCN_FUNCTION;
+
+	if(_FALSE == Linked){		
+		if(IS_NORMAL_CHIP( pHalData->VersionID)){
+			value8 |= DIS_TSF_UDT0_NORMAL_CHIP;
+		}
+		else{
+			value8 |= DIS_TSF_UDT0_TEST_CHIP;
+		}
+	}
+
+	rtw_write8(Adapter, REG_BCN_CTRL, value8);
+#else
+	// 20100901 zhiyuan: Change original setting of BCN_CTRL(0x550) from 
+	// 0x1a to 0x1b. Set BIT0 of this register disable ATIM  function. 
+	//  enable ATIM function may invoke HW Tx stop operation. This may cause ping failed 
+	// sometimes in long run test. So just disable it now.
+	// When ATIM function is disabled, High Queue should not use anymore.
+	rtw_write8(Adapter, REG_BCN_CTRL, 0x1b);
+	rtw_write8(Adapter, REG_RD_CTRL+1, 0x6F);
+#endif
+}
+
+
+// Set CCK and OFDM Block "ON"
+static VOID _BBTurnOnBlock(
+	IN	PADAPTER		Adapter
+	)
+{
+	HAL_DATA_TYPE		*pHalData	= GET_HAL_DATA(Adapter);
+#if (DISABLE_BB_RF)
+	return;
+#endif
+
+	if(pHalData->CurrentBandType92D == BAND_ON_5G)
+		PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0x2);
+	else
+		PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0x3);
+}
+
+static VOID _RfPowerSave(
+	IN	PADAPTER		Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(Adapter);
+	struct pwrctrl_priv		*pwrctrlpriv = &Adapter->pwrctrlpriv;
+	u8			eRFPath;
+
+#if (DISABLE_BB_RF)
+	return;
+#endif
+
+	if(pwrctrlpriv->reg_rfoff == _TRUE){ // User disable RF via registry.
+		//RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): Turn off RF for RegRfOff.\n"));
+		//MgntActSet_RF_State(Adapter, rf_off, RF_CHANGE_BY_SW, _TRUE);
+		// Those action will be discard in MgntActSet_RF_State because off the same state
+#ifdef CONFIG_DUALMAC_CONCURRENT
+		if(pHalData->bSlaveOfDMSP)
+			return;
+#endif
+		for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
+			PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0);
+	}
+	else if(pwrctrlpriv->rfoff_reason > RF_CHANGE_BY_PS){ // H/W or S/W RF OFF before sleep.
+		//RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): Turn off RF for RfOffReason(%ld).\n", pMgntInfo->RfOffReason));
+		//MgntActSet_RF_State(Adapter, rf_off, pMgntInfo->RfOffReason, _TRUE);
+	}
+	else{
+		pwrctrlpriv->rf_pwrstate = rf_on;
+		pwrctrlpriv->rfoff_reason = 0; 
+		//if(Adapter->bInSetPower || Adapter->bResetInProgress)
+		//	PlatformUsbEnableInPipes(Adapter);
+		//RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): RF is on.\n"));
+	}
+}
+
+#ifdef CONFIG_LED
+static void _InitHWLed(PADAPTER Adapter)
+{
+	struct led_priv *pledpriv = &(Adapter->ledpriv);
+	
+	if( pledpriv->LedStrategy != HW_LED)
+			return;
+	
+// HW led control
+// to do .... 
+//must consider the cases of antenna diversity/ commbo card/solo card/mini card
+
+}
+#endif //CONFIG_LED
+
+
+u32 rtl8192du_hal_init(_adapter *padapter);
+u32 rtl8192du_hal_init(_adapter *padapter)
+{
+	u8	val8 = 0, tmpU1b;
+	u16	val16;
+	u32	boundary, i = 0,  status = _SUCCESS;
+#if SWLCK == 0
+	u32	j;
+#endif //SWLCK == 0
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
+	struct pwrctrl_priv		*pwrctrlpriv = &padapter->pwrctrlpriv;
+	struct registry_priv	*pregistrypriv = &padapter->registrypriv;
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	PADAPTER	BuddyAdapter = padapter->pbuddy_adapter;
+#endif
+
+_func_enter_;
+
+	padapter->init_adpt_in_progress = _TRUE;
+
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	if(BuddyAdapter != NULL)
+	{
+		if(BuddyAdapter->bHaltInProgress)
+		{
+			for(i=0;i<100;i++)
+			{
+				rtw_usleep_os(1000);
+				if(!BuddyAdapter->bHaltInProgress)
+					break;
+			}
+
+			if(i==100)
+			{
+				DBG_871X("fail to initialization due to another adapter is in halt \n");
+				return _FAIL;
+			}
+		}
+	}
+#endif
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("--->InitializeAdapter8192CUsb()\n"));
+
+	if(padapter->bSurpriseRemoved)
+		return _FAIL;
+
+	//Let the first starting mac load RF parameters and do LCK in this case,by wl
+	if(pHalData->MacPhyMode92D == DUALMAC_DUALPHY 
+		&& ((pHalData->interfaceIndex == 0 && pHalData->BandSet92D == BAND_ON_2_4G)
+			|| (pHalData->interfaceIndex == 1 && pHalData->BandSet92D == BAND_ON_5G)))
+		ACQUIRE_GLOBAL_MUTEX(GlobalMutexForMac0_2G_Mac1_5G);
+
+	ACQUIRE_GLOBAL_MUTEX(GlobalMutexForPowerAndEfuse);
+
+	rtw_write8(padapter, REG_RSV_CTRL, 0x0);
+	val8 = rtw_read8(padapter, 0x0003);
+	val8 &= (~BIT7);
+	rtw_write8(padapter, 0x0003, val8);
+
+	//mac status:
+	//0x81[4]:0 mac0 off, 1:mac0 on
+	//0x82[4]:0 mac1 off, 1: mac1 on.
+
+	//For s3/s4 may reset mac,Reg0xf8 may be set to 0, so reset macphy control reg here.
+	PHY_ConfigMacPhyMode92D(padapter);
+
+	PHY_SetPowerOnFor8192D(padapter);
+
+	status = _InitPowerOn(padapter);
+	if(status == _FAIL){
+		RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init power on!\n"));
+		RELEASE_GLOBAL_MUTEX(GlobalMutexForPowerAndEfuse);
+		if(pHalData->MacPhyMode92D == DUALMAC_DUALPHY 
+		&& ((pHalData->interfaceIndex == 0 && pHalData->BandSet92D == BAND_ON_2_4G)
+			|| (pHalData->interfaceIndex == 1 && pHalData->BandSet92D == BAND_ON_5G)))
+			RELEASE_GLOBAL_MUTEX(GlobalMutexForMac0_2G_Mac1_5G);
+		goto exit;
+	}
+
+	if(!pregistrypriv->wifi_spec){
+		boundary = TX_PAGE_BOUNDARY;
+	}
+	else{// for WMM
+		boundary = WMM_NORMAL_TX_PAGE_BOUNDARY;
+	}
+
+	PHY_ConfigMacCoexist_RFPage92D(padapter);
+
+	status =  InitLLTTable(padapter, boundary);
+	if(status == _FAIL){
+		RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init power on!\n"));
+		RELEASE_GLOBAL_MUTEX(GlobalMutexForPowerAndEfuse);
+		if(pHalData->MacPhyMode92D == DUALMAC_DUALPHY 
+		&& ((pHalData->interfaceIndex == 0 && pHalData->BandSet92D == BAND_ON_2_4G)
+			|| (pHalData->interfaceIndex == 1 && pHalData->BandSet92D == BAND_ON_5G)))
+			RELEASE_GLOBAL_MUTEX(GlobalMutexForMac0_2G_Mac1_5G);
+		return status;
+	}
+
+#if ((1 == MP_DRIVER) ||  (0 == FW_PROCESS_VENDOR_CMD))
+
+	rtl8192d_PHY_InitRxSetting(padapter);
+	RELEASE_GLOBAL_MUTEX(GlobalMutexForPowerAndEfuse);
+	DBG_8192C("%s(): Don't Download Firmware !!\n",__FUNCTION__);
+	padapter->bFWReady = _FALSE;
+	pHalData->fw_ractrl = _FALSE;
+
+#else
+
+	status = FirmwareDownload92D(padapter);
+	RELEASE_GLOBAL_MUTEX(GlobalMutexForPowerAndEfuse);
+	if(status == _FAIL){
+		padapter->bFWReady = _FALSE;
+		pHalData->fw_ractrl = _FALSE;
+		DBG_8192C("fw download fail!\n");
+
+		//return fail only when part number check fail,suggested by alex
+		if(0xE0 == rtw_read8(padapter, 0x1c5))
+		{
+			if(pHalData->MacPhyMode92D == DUALMAC_DUALPHY 
+			&& ((pHalData->interfaceIndex == 0 && pHalData->BandSet92D == BAND_ON_2_4G)
+				|| (pHalData->interfaceIndex == 1 && pHalData->BandSet92D == BAND_ON_5G)))
+				RELEASE_GLOBAL_MUTEX(GlobalMutexForMac0_2G_Mac1_5G);	
+
+			goto exit;
+		}
+	}
+	else	{
+		padapter->bFWReady = _TRUE;
+		pHalData->fw_ractrl = _TRUE;
+		DBG_8192C("fw download ok!\n");
+	}
+
+#endif
+
+	pHalData->LastHMEBoxNum = 0;
+
+	if(pwrctrlpriv->reg_rfoff == _TRUE){
+		pwrctrlpriv->rf_pwrstate = rf_off;
+	}
+
+	// Set RF type for BB/RF configuration	
+	_InitRFType(padapter);//->_ReadRFType()
+
+	// Save target channel
+	// <Roger_Notes> Current Channel will be updated again later.
+	//pHalData->CurrentChannel = 6;//default set to 6
+
+#if (HAL_MAC_ENABLE == 1)
+	status = PHY_MACConfig8192D(padapter);
+	if(status == _FAIL)
+	{
+		if(pHalData->MacPhyMode92D == DUALMAC_DUALPHY 
+		&& ((pHalData->interfaceIndex == 0 && pHalData->BandSet92D == BAND_ON_2_4G)
+			|| (pHalData->interfaceIndex == 1 && pHalData->BandSet92D == BAND_ON_5G)))
+			RELEASE_GLOBAL_MUTEX(GlobalMutexForMac0_2G_Mac1_5G);
+		goto exit;
+	}
+#endif
+
+	_InitQueueReservedPage(padapter);
+	_InitTxBufferBoundary(padapter);		
+	_InitQueuePriority(padapter);
+	_InitTransferPageSize(padapter);
+
+	// Get Rx PHY status in order to report RSSI and others.
+	_InitDriverInfoSize(padapter, DRVINFO_SZ);
+
+	_InitInterrupt(padapter);	
+	_InitID(padapter);//set mac_address
+	_InitNetworkType(padapter);//set msr	
+	_InitWMACSetting(padapter);
+	_InitAdaptiveCtrl(padapter);
+	_InitEDCA(padapter);
+	_InitRateFallback(padapter);
+	_InitRetryFunction(padapter);
+	_InitUsbAggregationSetting(padapter);
+	_InitOperationMode(padapter);//todo
+	_InitBeaconParameters(padapter);
+	_InitAMPDUAggregation(padapter);
+	_InitBeaconMaxError(padapter, _TRUE);
+	
+#if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_TX_MCAST2UNI)
+
+#ifdef CONFIG_CHECK_AC_LIFETIME
+	// Enable lifetime check for the four ACs
+	//rtw_write8(padapter, REG_LIFETIME_EN, 0x0F);
+#endif	// CONFIG_CHECK_AC_LIFETIME
+
+#ifdef CONFIG_TX_MCAST2UNI
+	rtw_write16(padapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400);	// unit: 256us. 256ms
+	rtw_write16(padapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400);	// unit: 256us. 256ms
+#else	// CONFIG_TX_MCAST2UNI
+	rtw_write16(padapter, REG_PKT_VO_VI_LIFE_TIME, 0x3000);	// unit: 256us. 3s
+	rtw_write16(padapter, REG_PKT_BE_BK_LIFE_TIME, 0x3000);	// unit: 256us. 3s
+#endif	// CONFIG_TX_MCAST2UNI
+#endif	// CONFIG_CONCURRENT_MODE || CONFIG_TX_MCAST2UNI
+	
+	#ifdef CONFIG_LED
+	_InitHWLed(padapter);
+	#endif
+
+#if ENABLE_USB_DROP_INCORRECT_OUT
+	_InitHardwareDropIncorrectBulkOut(padapter);
+#endif
+	if(pHalData->bRDGEnable){
+		_InitRDGSetting(padapter);
+	}
+
+	// Set Data Auto Rate Fallback Reg.
+	for(i = 0 ; i < 4 ; i++){
+		rtw_write32(padapter, REG_ARFR0+i*4, 0x1f8ffff0);
+	}
+
+	if(pregistrypriv->wifi_spec)
+	{
+		rtw_write16(padapter, REG_FAST_EDCA_CTRL, 0);
+	}
+	else{
+		if(pHalData->MacPhyMode92D==SINGLEMAC_SINGLEPHY){
+			if(pHalData->OutEpNumber == 2)  // suggested by chunchu
+				rtw_write32(padapter, REG_FAST_EDCA_CTRL, 0x03066666);
+		       else
+				rtw_write16(padapter, REG_FAST_EDCA_CTRL, 0x8888);
+		}
+		else{
+			rtw_write16(padapter, REG_FAST_EDCA_CTRL, 0x5555);
+		}
+	}
+
+	tmpU1b=rtw_read8(padapter, 0x605);
+	tmpU1b|=0xf0;
+	rtw_write8(padapter, 0x605,tmpU1b);	
+	rtw_write8(padapter, 0x55e,0x30);
+	rtw_write8(padapter, 0x55f,0x30);
+	rtw_write8(padapter, 0x606,0x30);
+	//PlatformEFIOWrite1Byte(Adapter, 0x5e4,0x38);	  // masked for new bitfile
+
+	//for bitfile 0912/0923 zhiyuan 2009/09/23
+	// temp for high queue and mgnt Queue corrupt in time;
+	//it may cause hang when sw beacon use high_Q,other frame use mgnt_Q; or ,sw beacon use mgnt_Q ,other frame use high_Q;
+	rtw_write8(padapter, 0x523, 0x10);
+	val16 = rtw_read16(padapter, 0x524);
+	val16|=BIT12;
+	rtw_write16(padapter,0x524 , val16);
+
+	rtw_write8(padapter,REG_TXPAUSE, 0);
+
+	// suggested by zhouzhou   usb suspend  idle time count for bitfile0927  2009/10/09 zhiyuan
+	val8=rtw_read8(padapter, 0xfe56);
+	val8 |=(BIT0|BIT1);
+	rtw_write8(padapter, 0xfe56, val8);
+
+	if(pHalData->bEarlyModeEnable)
+	{
+		DBG_8192C("EarlyMode Enabled!!!\n");
+
+		tmpU1b = rtw_read8(padapter,0x4d0);
+		tmpU1b = tmpU1b|0x1f;
+		rtw_write8(padapter,0x4d0,tmpU1b);
+
+		rtw_write8(padapter,0x4d3,0x80);
+
+		tmpU1b = rtw_read8(padapter,0x605);
+		tmpU1b = tmpU1b|0x40;
+		rtw_write8(padapter,0x605,tmpU1b);
+	}
+	else
+	{
+		rtw_write8(padapter,0x4d0,0);
+	}
+
+	//
+	//d. Initialize BB related configurations.
+	//
+#if (HAL_BB_ENABLE == 1)
+	status = PHY_BBConfig8192D(padapter);
+	if(status == _FAIL)
+	{
+		if(pHalData->MacPhyMode92D == DUALMAC_DUALPHY 
+		&& ((pHalData->interfaceIndex == 0 && pHalData->BandSet92D == BAND_ON_2_4G)
+			|| (pHalData->interfaceIndex == 1 && pHalData->BandSet92D == BAND_ON_5G)))
+			RELEASE_GLOBAL_MUTEX(GlobalMutexForMac0_2G_Mac1_5G);
+		goto exit;
+	}
+#endif
+
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	if(pHalData->bSlaveOfDMSP)
+	{
+		DBG_871X("slave of dmsp close phy1 \n");
+		PHY_StopTRXBeforeChangeBand8192D(padapter);
+	}
+#endif
+
+	if(padapter->bFWReady && pHalData->FirmwareVersion >= 0x13)
+	{
+		pHalData->bReadRFbyFW = _TRUE;
+		DBG_871X("Enable 92du query RF by FW.\n");
+	}
+	else
+	{
+		pHalData->bReadRFbyFW = _FALSE;
+	}
+
+	// 92CU use 3-wire to r/w RF
+	//
+	// e. Initialize RF related configurations.
+	//
+	// 2007/11/02 MH Before initalizing RF. We can not use FW to do RF-R/W.
+	//pHalData->Rf_Mode = RF_OP_By_SW_3wire;
+#if (HAL_RF_ENABLE == 1)
+	// set before initialize RF, 
+	PHY_SetBBReg(padapter, rFPGA0_AnalogParameter4, 0x00f00000,  0xf);
+
+	status = PHY_RFConfig8192D(padapter);	
+	if(status == _FAIL)
+	{
+		if(pHalData->MacPhyMode92D == DUALMAC_DUALPHY 
+		&& ((pHalData->interfaceIndex == 0 && pHalData->BandSet92D == BAND_ON_2_4G)
+			|| (pHalData->interfaceIndex == 1 && pHalData->BandSet92D == BAND_ON_5G)))
+			RELEASE_GLOBAL_MUTEX(GlobalMutexForMac0_2G_Mac1_5G);
+		goto exit;
+	}
+
+	// set default value after initialize RF, 
+	PHY_SetBBReg(padapter, rFPGA0_AnalogParameter4, 0x00f00000,  0);
+
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	if(!pHalData->bSlaveOfDMSP)
+#endif
+		PHY_UpdateBBRFConfiguration8192D(padapter, _FALSE);
+
+#endif
+
+#if RTL8192CU_ADHOC_WORKAROUND_SETTING
+	_InitAdhocWorkaroundParams(padapter);
+#endif
+
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	if(!pHalData->bSlaveOfDMSP)
+#endif
+		_BBTurnOnBlock(padapter);
+
+	//_InitID(padapter);
+	//NicIFSetMacAddress(padapter, padapter->PermanentAddress);
+
+	if(pHalData->CurrentBandType92D == BAND_ON_5G)
+	{
+		pHalData->CurrentWirelessMode = WIRELESS_MODE_N_5G;
+	}
+	else
+	{
+		pHalData->CurrentWirelessMode = WIRELESS_MODE_N_24G;
+	}
+
+	_InitSecuritySetting(padapter);
+	_RfPowerSave(padapter);
+
+	// HW SEQ CTRL
+	//set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM.
+	rtw_write8(padapter,REG_HWSEQ_CTRL, 0xFF); 
+
+	//schmitt trigger ,improve tx evm for 92du,suggested by ynlin  12/03/2010
+	tmpU1b = rtw_read8(padapter, REG_AFE_XTAL_CTRL);
+	tmpU1b |=BIT1;
+	rtw_write8(padapter, REG_AFE_XTAL_CTRL, tmpU1b);
+
+	//disable bar
+	rtw_write32(padapter, REG_BAR_MODE_CTRL, 0xffff);
+
+	//Nav limit , suggest by scott
+	rtw_write8(padapter, 0x652, 0x0);
+	rtw_write8(padapter, 0xc87, 0x50);//suggest by Jackson for CCA
+
+#if (MP_DRIVER == 1)
+	padapter->mppriv.channel = pHalData->CurrentChannel;
+	MPT_InitializeAdapter(padapter, padapter->mppriv.channel);
+	//MPT_InitializeAdapter(padapter, Channel);
+#else // temply marked this for RF
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	if(!pHalData->bSlaveOfDMSP)
+#endif
+	{
+		// do IQK for 2.4G for better scan result, if current bandtype is 2.4G.
+		if(pHalData->CurrentBandType92D == BAND_ON_2_4G)
+			rtl8192d_PHY_IQCalibrate(padapter);
+	
+		rtl8192d_dm_CheckTXPowerTracking(padapter);
+		rtl8192d_PHY_LCCalibrate(padapter);
+		if(pHalData->MacPhyMode92D == DUALMAC_DUALPHY 
+		&& ((pHalData->interfaceIndex == 0 && pHalData->BandSet92D == BAND_ON_2_4G)
+			|| (pHalData->interfaceIndex == 1 && pHalData->BandSet92D == BAND_ON_5G)))
+			RELEASE_GLOBAL_MUTEX(GlobalMutexForMac0_2G_Mac1_5G);
+		//5G and 2.4G must wait sometime to let RF LO ready
+		//by sherry 2010.06.28
+#if SWLCK == 0	
+		{
+			u32 tmpRega, tmpRegb;
+			for(j=0;j<10000;j++)
+			{
+				rtw_udelay_os(MAX_STALL_TIME);
+                           	if(pHalData->rf_type == RF_1T1R)
+				{
+					tmpRega = PHY_QueryRFReg(padapter, (RF_RADIO_PATH_E)RF_PATH_A, 0x2a, bMaskDWord);
+					if((tmpRega&BIT11)==BIT11)
+						break;	
+				}
+				else
+				{
+					tmpRega = PHY_QueryRFReg(padapter, (RF_RADIO_PATH_E)RF_PATH_A, 0x2a, bMaskDWord);
+					tmpRegb = PHY_QueryRFReg(padapter, (RF_RADIO_PATH_E)RF_PATH_B, 0x2a, bMaskDWord);				
+					if(((tmpRega&BIT11)==BIT11)&&((tmpRegb&BIT11)==BIT11))
+						break;
+					// temply add for DMSP
+					if(pHalData->MacPhyMode92D==DUALMAC_SINGLEPHY&&(pHalData->interfaceIndex!=0))
+						break;
+				}
+			}
+		}
+#endif
+	}
+#endif
+
+	PHY_InitPABias92D(padapter);
+
+	rtl8192d_InitHalDm(padapter);
+
+	padapter->init_adpt_in_progress = _FALSE;
+
+	//misc
+	{
+		int i;		
+		u8 mac_addr[6];
+		for(i=0; i<6; i++)
+		{			
+#ifdef CONFIG_CONCURRENT_MODE
+			if(padapter->iface_type == IFACE_PORT1)		
+				mac_addr[i] = rtw_read8(padapter, REG_MACID1+i);
+			else
+#endif			
+			mac_addr[i] = rtw_read8(padapter, REG_MACID+i);		
+		}
+		
+		DBG_8192C("MAC Address from REG_MACID = "MAC_FMT"\n", MAC_ARG(mac_addr));
+	}
+
+	{	
+		//pHalData->LoopbackMode=LOOPBACK_MODE;
+		//if(padapter->ResetProgress == RESET_TYPE_NORESET)
+		//{
+		       u32					ulRegRead;
+			//3//
+			//3//Set Loopback mode or Normal mode
+			//3//
+			//2006.12.13 by emily. Note!We should not merge these two CPU_GEN register writings 
+			//	because setting of System_Reset bit reset MAC to default transmission mode.
+			ulRegRead = rtw_read32(padapter, 0x100);	//CPU_GEN  0x100
+
+			//if(pHalData->LoopbackMode == RTL8192SU_NO_LOOPBACK)
+			{
+				ulRegRead |= ulRegRead ;
+			}
+			//else if (pHalData->LoopbackMode == RTL8192SU_MAC_LOOPBACK )
+			//{
+				//RT_TRACE(COMP_INIT, DBG_LOUD, ("==>start loop back mode %x\n",ulRegRead));
+			//	ulRegRead |= 0x0b000000; //0x0b000000 CPU_CCK_LOOPBACK;
+			//}
+			//else if(pHalData->LoopbackMode == RTL8192SU_DMA_LOOPBACK)
+			//{
+				//RT_TRACE(COMP_INIT, DBG_LOUD, ("==>start dule mac loop back mode %x\n",ulRegRead));
+			//	ulRegRead |= 0x07000000; //0x07000000 CPU_CCK_LOOPBACK;
+			//}
+			//else
+			//{
+				//RT_ASSERT(FALSE, ("Serious error: wrong loopback mode setting\n"));	
+			//}
+
+			rtw_write32(padapter, 0x100, ulRegRead);
+	              //RT_TRACE(COMP_INIT,DBG_LOUD,("==>loop back mode CPU GEN value:%x\n",ulRegRead));
+
+			// 2006.11.29. After reset cpu, we sholud wait for a second, otherwise, it may fail to write registers. Emily
+			rtw_udelay_os(500);
+		//}
+	}
+
+	RT_CLEAR_PS_LEVEL(pwrctrlpriv, RT_RF_OFF_LEVL_HALT_NIC);
+
+
+	if((pregistrypriv->lowrate_two_xmit) && (pHalData->MacPhyMode92D != DUALMAC_DUALPHY))
+	{		
+		//for Use 2 path Tx to transmit MCS0~7 and legacy mode
+		//Reg90C[30]=1'b0 (OFDM TX by Reg, default PHY parameter)
+		//Reg80C[31]=1'b0 (CCK TX by Reg, default PHYparameter)
+		//RegC8C=0xa0e40000 (OFDM RX weighting)
+		rtw_write32(padapter, 0x90C, rtw_read32(padapter, 0x90C)&(~BIT(30)));
+		rtw_write32(padapter, 0x80C, rtw_read32(padapter, 0x80C)&(~BIT(31)));	
+		rtw_write32(padapter, 0xC8C, 0xa0e40000);
+	}
+
+#if (RTL8192D_EASY_SMART_CONCURRENT == 1)
+	if((Adapter->bMasterOfDMSP) && (!GET_POWER_SAVE_CONTROL(pMgntInfo)->bSwRfProcessing))
+		PlatformSetTimer(Adapter, &pHalData->DualMacSetOperationForAnotherMacTimer, 2000);
+#if 0
+	if(IS_HARDWARE_TYPE_8192D(Adapter))
+	{
+		DualMacEasyConcurrentInit(Adapter);
+	}
+#endif
+#endif
+
+exit:
+
+_func_exit_;
+
+	return status;
+}
+
+
+static VOID 
+_DisableGPIO(
+	IN	PADAPTER	Adapter
+	)
+{
+/***************************************
+j. GPIO_PIN_CTRL 0x44[31:0]=0x000		// 
+k. Value = GPIO_PIN_CTRL[7:0]
+l.  GPIO_PIN_CTRL 0x44[31:0] = 0x00FF0000 | (value <<8); //write external PIN level
+m. GPIO_MUXCFG 0x42 [15:0] = 0x0780
+n. LEDCFG 0x4C[15:0] = 0x8080
+***************************************/
+	u8	value8;
+	u16	value16;
+	u32	value32;
+
+	//1. Disable GPIO[7:0]
+	rtw_write16(Adapter, REG_GPIO_PIN_CTRL+2, 0x0000);
+    	value32 = rtw_read32(Adapter, REG_GPIO_PIN_CTRL) & 0xFFFF00FF;  
+	value8 = (u8) (value32&0x000000FF);
+	value32 |= ((value8<<8) | 0x00FF0000);
+	rtw_write32(Adapter, REG_GPIO_PIN_CTRL, value32);
+	      
+	//2. Disable GPIO[10:8]          
+	rtw_write8(Adapter, REG_GPIO_MUXCFG+3, 0x00);
+	value16 = rtw_read16(Adapter, REG_GPIO_MUXCFG+2) & 0xFF0F;  
+	value8 = (u8) (value16&0x000F);
+	value16 |= ((value8<<4) | 0x0780);
+	rtw_write16(Adapter, REG_GPIO_MUXCFG+2, value16);
+
+	//3. Disable LED0 & 1
+	rtw_write16(Adapter, REG_LEDCFG0, 0x8888);
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Disable GPIO and LED.\n"));
+ 
+} //end of _DisableGPIO()
+#ifndef PLATFORM_FREEBSD //amy, temp remove
+static VOID
+_ResetFWDownloadRegister(
+	IN PADAPTER			Adapter
+	)
+{
+	u32	value32;
+
+	value32 = rtw_read32(Adapter, REG_MCUFWDL);
+	value32 &= ~(MCUFWDL_EN | MCUFWDL_RDY);
+	rtw_write32(Adapter, REG_MCUFWDL, value32);
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Reset FW download register.\n"));
+}
+
+
+static int
+_DisableRF_AFE(
+	IN PADAPTER			Adapter
+	)
+{
+	int		rtStatus = _SUCCESS;
+	u32			pollingCount = 0;
+	u8			value8;
+	
+	//disable RF/ AFE AD/DA
+	value8 = APSDOFF;
+	rtw_write8(Adapter, REG_APSD_CTRL, value8);
+
+
+#if (RTL8192CU_ASIC_VERIFICATION)
+
+	do
+	{
+		if(rtw_read8(Adapter, REG_APSD_CTRL) & APSDOFF_STATUS){
+			//RT_TRACE(COMP_INIT, DBG_LOUD, ("Disable RF, AFE, AD, DA Done!\n"));
+			break;
+		}
+
+		if(pollingCount++ > POLLING_READY_TIMEOUT_COUNT){
+			//RT_TRACE(COMP_INIT, DBG_SERIOUS, ("Failed to polling APSDOFF_STATUS done!\n"));
+			return _FAIL;
+		}
+				
+	}while(_TRUE);
+	
+#endif
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Disable RF, AFE,AD, DA.\n"));
+	return rtStatus;
+
+}
+
+static VOID
+_ResetBB(
+	IN PADAPTER			Adapter
+	)
+{
+	u16	value16;
+
+	//reset BB
+	value16 = rtw_read16(Adapter, REG_SYS_FUNC_EN);
+	value16 &= ~(FEN_BBRSTB | FEN_BB_GLB_RSTn);
+	rtw_write16(Adapter, REG_SYS_FUNC_EN, value16);
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Reset BB.\n"));
+}
+
+static VOID
+_ResetMCU(
+	IN PADAPTER			Adapter
+	)
+{
+	u16	value16;
+	
+	// reset MCU
+	value16 = rtw_read16(Adapter, REG_SYS_FUNC_EN);
+	value16 &= ~FEN_CPUEN;
+	rtw_write16(Adapter, REG_SYS_FUNC_EN, value16);
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Reset MCU.\n"));
+}
+
+static VOID
+_DisableMAC_AFE_PLL(
+	IN PADAPTER			Adapter
+	)
+{
+	u32	value32;
+	
+	//disable MAC/ AFE PLL
+	value32 = rtw_read32(Adapter, REG_APS_FSMCO);
+	value32 |= APDM_MAC;
+	rtw_write32(Adapter, REG_APS_FSMCO, value32);
+	
+	value32 |= APFM_OFF;
+	rtw_write32(Adapter, REG_APS_FSMCO, value32);
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Disable MAC, AFE PLL.\n"));
+}
+
+static VOID
+_AutoPowerDownToHostOff(
+	IN	PADAPTER		Adapter
+	)
+{
+	u32			value32;
+	rtw_write8(Adapter, REG_SPS0_CTRL, 0x22);
+
+	value32 = rtw_read32(Adapter, REG_APS_FSMCO);	
+	
+	value32 |= APDM_HOST;//card disable
+	rtw_write32(Adapter, REG_APS_FSMCO, value32);
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Auto Power Down to Host-off state.\n"));
+
+	// set USB suspend
+	value32 = rtw_read32(Adapter, REG_APS_FSMCO);
+	value32 &= ~AFSM_PCIE;
+	rtw_write32(Adapter, REG_APS_FSMCO, value32);
+
+}
+
+static VOID
+_SetUsbSuspend(
+	IN PADAPTER			Adapter
+	)
+{
+	u32			value32;
+
+	value32 = rtw_read32(Adapter, REG_APS_FSMCO);
+	
+	// set USB suspend
+	value32 |= AFSM_HSUS;
+	rtw_write32(Adapter, REG_APS_FSMCO, value32);
+
+	//RT_ASSERT(0 == (rtw_read32(Adapter, REG_APS_FSMCO) & BIT(12)),(""));
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("Set USB suspend.\n"));
+	
+}
+#endif //amy, temp remove
+static VOID
+_DisableRFAFEAndResetBB8192D(
+	IN PADAPTER			Adapter
+	)
+{
+/**************************************
+a.	TXPAUSE 0x522[7:0] = 0xFF             //Pause MAC TX queue
+b.	RF path 0 offset 0x00 = 0x00            // disable RF
+c. 	APSD_CTRL 0x600[7:0] = 0x40
+d.	SYS_FUNC_EN 0x02[7:0] = 0x16		//reset BB state machine
+e.	SYS_FUNC_EN 0x02[7:0] = 0x14		//reset BB state machine
+***************************************/
+       HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8	eRFPath = 0,value8 = 0;
+
+	PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter4, 0x00f00000,  0xf);
+	PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, 0x0,bRFRegOffsetMask, 0x0);
+
+	value8 |= APSDOFF;
+	rtw_write8(Adapter, REG_APSD_CTRL, value8);//0x40
+
+
+	//testchip  should not do BB reset if another mac is alive;
+	value8 = 0 ; 
+	value8 |=( FEN_USBD | FEN_USBA | FEN_BB_GLB_RSTn);
+	rtw_write8(Adapter, REG_SYS_FUNC_EN,value8 );//0x16
+
+	if(pHalData->MacPhyMode92D!=SINGLEMAC_SINGLEPHY)
+	{
+		if(pHalData->interfaceIndex!=0){
+			value8 &=( ~FEN_BB_GLB_RSTn );
+			rtw_write8(Adapter, REG_SYS_FUNC_EN, value8); //0x14	
+		}
+	}
+	else{
+		value8 &=( ~FEN_BB_GLB_RSTn );
+		rtw_write8(Adapter, REG_SYS_FUNC_EN, value8); //0x14	
+	}
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("======> RF off and reset BB.\n"));
+}
+
+static VOID
+_DisableRFAFEAndResetBB(
+	IN PADAPTER			Adapter
+	)
+{
+	_DisableRFAFEAndResetBB8192D(Adapter);
+}
+
+static VOID
+_ResetDigitalProcedure1(
+	IN 	PADAPTER			Adapter,
+	IN	BOOLEAN				bWithoutHWSM	
+	)
+{
+
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
+
+	if((pHalData->FirmwareVersion <=  0x20)&&(_FALSE)){
+		#if 0
+		/*****************************
+		f.	SYS_FUNC_EN 0x03[7:0]=0x54		// reset MAC register, DCORE
+		g.	MCUFWDL 0x80[7:0]=0				// reset MCU ready status
+		******************************/
+		u4Byte	value32 = 0;
+		PlatformIOWrite1Byte(Adapter, REG_SYS_FUNC_EN+1, 0x54);
+		PlatformIOWrite1Byte(Adapter, REG_MCUFWDL, 0);	
+		#else
+		/*****************************
+		f.	MCUFWDL 0x80[7:0]=0				// reset MCU ready status
+		g.	SYS_FUNC_EN 0x02[10]= 0			// reset MCU register, (8051 reset)
+		h.	SYS_FUNC_EN 0x02[15-12]= 5		// reset MAC register, DCORE
+		i.     SYS_FUNC_EN 0x02[10]= 1			// enable MCU register, (8051 enable)
+		******************************/
+			u16 valu16 = 0;
+			rtw_write8(Adapter, REG_MCUFWDL, 0);
+
+			valu16 = rtw_read16(Adapter, REG_SYS_FUNC_EN);	
+			rtw_write16(Adapter, REG_SYS_FUNC_EN, (valu16 & (~FEN_CPUEN)));//reset MCU ,8051
+
+			valu16 = rtw_read16(Adapter, REG_SYS_FUNC_EN)&0x0FFF;	
+			rtw_write16(Adapter, REG_SYS_FUNC_EN, (valu16 |(FEN_HWPDN|FEN_ELDR)));//reset MAC
+			
+			#ifdef DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE
+			{
+				u8 val;
+				if( (val=rtw_read8(Adapter, REG_MCUFWDL)))
+					DBG_871X("DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE %s:%d REG_MCUFWDL:0x%02x\n", __FUNCTION__, __LINE__, val);
+			}
+			#endif
+
+			
+			valu16 = rtw_read16(Adapter, REG_SYS_FUNC_EN);	
+			rtw_write16(Adapter, REG_SYS_FUNC_EN, (valu16 | FEN_CPUEN));//enable MCU ,8051	
+
+		
+		#endif
+	}
+	else{
+		u8 retry_cnts = 0;
+		// 2010/08/12 MH For USB SS, we can not stop 8051 when we are trying to
+		// enter IPS/HW&SW radio off. For S3/S4/S5/Disable, we can stop 8051 because
+		// we will init FW when power on again.
+		//if(!pDevice->RegUsbSS)
+		{	// If we want to SS mode, we can not reset 8051.
+			if(rtw_read8(Adapter, REG_MCUFWDL) & BIT1)
+			{ //IF fw in RAM code, do reset 
+				
+				if(Adapter->bFWReady)
+				{
+					rtw_write8(Adapter, REG_FSIMR, 0x00);
+					// 2010/08/25 MH Accordign to RD alfred's suggestion, we need to disable other
+					// HRCV INT to influence 8051 reset.
+					rtw_write8(Adapter, REG_FWIMR, 0x20);
+					// 2011/02/15 MH According to Alex's suggestion, close mask to prevent incorrect FW write operation.
+					rtw_write8(Adapter, REG_FTIMR, 0x00);
+					
+					rtw_write8(Adapter, REG_MCUFWDL, 0);
+					rtw_write8(Adapter, REG_HMETFR+3, 0x20);//8051 reset by self
+					
+					while( (retry_cnts++ <100) && (FEN_CPUEN &rtw_read16(Adapter, REG_SYS_FUNC_EN)))
+					{
+						rtw_udelay_os(50);//us
+					}
+					//RT_ASSERT((retry_cnts < 100), ("8051 reset failed!\n"));			
+
+					if (retry_cnts>= 100)
+					{
+						rtw_write8(Adapter, REG_FWIMR, 0x00);
+						// 2010/08/31 MH According to Filen's info, if 8051 reset fail, reset MAC directly.
+						rtw_write8(Adapter, REG_SYS_FUNC_EN+1, 0x50);	//Reset MAC and Enable 8051
+						rtw_mdelay_os(10);
+					}
+					else	
+					{
+						DBG_8192C("=====> 8051 reset success (%d) .\n",retry_cnts);
+					}
+				}
+			}
+			else
+			{
+				DBG_8192C("=====> 8051 in ROM.\n");
+			}			
+
+			#ifdef DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE
+			{
+				u8 val;
+				if( (val=rtw_read8(Adapter, REG_MCUFWDL)))
+					DBG_871X("DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE %s:%d REG_MCUFWDL:0x%02x\n", __FUNCTION__, __LINE__, val);
+			}
+			#endif
+			
+			rtw_write8(Adapter, REG_SYS_FUNC_EN+1, 0x54);	//Reset MAC and Enable 8051
+			rtw_write8(Adapter, REG_MCUFWDL, 0);
+
+		}
+	}
+
+	if(bWithoutHWSM){
+	/*****************************
+		Without HW auto state machine
+	g.	SYS_CLKR 0x08[15:0] = 0x30A3			//disable MAC clock
+	h.	AFE_PLL_CTRL 0x28[7:0] = 0x80			//disable AFE PLL
+	i.	AFE_XTAL_CTRL 0x24[15:0] = 0x880F		//gated AFE DIG_CLOCK
+	j.	SYS_ISO_CTRL 0x00[7:0] = 0xF9			// isolated digital to PON
+	******************************/	
+		//rtw_write16(Adapter, REG_SYS_CLKR, 0x30A3);
+		rtw_write16(Adapter, REG_SYS_CLKR, 0x70A3);//modify to 0x70A3 by Scott.
+		rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x80);		
+		rtw_write16(Adapter, REG_AFE_XTAL_CTRL, 0x880F);
+		rtw_write8(Adapter, REG_SYS_ISO_CTRL, 0xF9);		
+	}
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Reset Digital.\n"));
+
+}
+
+static VOID
+_ResetDigitalProcedure2(
+	IN 	PADAPTER			Adapter
+)
+{
+/*****************************
+k.	SYS_FUNC_EN 0x03[7:0] = 0x44			// disable ELDR runction
+l.	SYS_CLKR 0x08[15:0] = 0x3083			// disable ELDR clock
+m.	SYS_ISO_CTRL 0x01[7:0] = 0x83			// isolated ELDR to PON
+******************************/
+	//rtw_write8(Adapter, REG_SYS_FUNC_EN+1, 0x44);//marked by Scott.
+	//rtw_write16(Adapter, REG_SYS_CLKR, 0x3083);
+	//rtw_write8(Adapter, REG_SYS_ISO_CTRL+1, 0x83);
+
+ 	rtw_write16(Adapter, REG_SYS_CLKR, 0x70a3); //modify to 0x70a3 by Scott.
+ 	rtw_write8(Adapter, REG_SYS_ISO_CTRL+1, 0x82); //modify to 0x82 by Scott.
+}
+
+static VOID
+_DisableAnalog(
+	IN PADAPTER			Adapter,
+	IN BOOLEAN			bWithoutHWSM	
+	)
+{
+	u32 value16 = 0;
+	u8 value8=0;
+	
+	if(bWithoutHWSM){
+	/*****************************
+	n.	LDOA15_CTRL 0x20[7:0] = 0x04		// disable A15 power
+	o.	LDOV12D_CTRL 0x21[7:0] = 0x54		// disable digital core power
+	r.	When driver call disable, the ASIC will turn off remaining clock automatically 
+	******************************/
+	
+		rtw_write8(Adapter, REG_LDOA15_CTRL, 0x04);
+		//PlatformIOWrite1Byte(Adapter, REG_LDOV12D_CTRL, 0x54);		
+		
+		value8 = rtw_read8(Adapter, REG_LDOV12D_CTRL);		
+		value8 &= (~LDV12_EN);
+		rtw_write8(Adapter, REG_LDOV12D_CTRL, value8);	
+		//RT_TRACE(COMP_INIT, DBG_LOUD, (" REG_LDOV12D_CTRL Reg0x21:0x%02x.\n",value8));
+	}
+	
+/*****************************
+h.	SPS0_CTRL 0x11[7:0] = 0x23			//enter PFM mode
+i.	APS_FSMCO 0x04[15:0] = 0x4802		// set USB suspend 
+******************************/	
+	rtw_write8(Adapter, REG_SPS0_CTRL, 0x23);
+	
+	value16 |= (APDM_HOST | AFSM_HSUS |PFM_ALDN);
+	rtw_write16(Adapter, REG_APS_FSMCO,value16 );//0x4802 
+
+	rtw_write8(Adapter, REG_RSV_CTRL, 0x0e);
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Disable Analog Reg0x04:0x%04x.\n",value16));
+}
+
+#ifndef PLATFORM_FREEBSD //amy, temp remove
+static BOOLEAN
+CanGotoPowerOff92D(
+	IN	PADAPTER			Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8 u1bTmp;
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	PADAPTER	BuddyAdapter = Adapter->pbuddy_adapter;
+#endif
+
+	if(pHalData->MacPhyMode92D==SINGLEMAC_SINGLEPHY)
+		return _TRUE;	  
+	
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	if(BuddyAdapter != NULL)
+	{
+		if(BuddyAdapter->init_adpt_in_progress)
+		{
+			DBG_871X("do not power off during another adapter is initialization \n");
+			return _FALSE;
+		}
+	}
+#endif
+
+	if(pHalData->interfaceIndex==0)
+	{	// query another mac status;
+		u1bTmp = rtw_read8(Adapter, REG_MAC1);
+		u1bTmp&=MAC1_ON;
+	}
+	else
+	{
+		u1bTmp = rtw_read8(Adapter, REG_MAC0);
+		u1bTmp&=MAC0_ON;
+	}
+
+	//0x17[7]:1b' power off in process
+	u1bTmp=rtw_read8(Adapter, 0x17);
+	u1bTmp|=BIT7;
+	rtw_write8(Adapter, 0x17, u1bTmp);
+
+	rtw_udelay_os(500);
+	// query another mac status;
+	if(pHalData->interfaceIndex==0)
+	{	// query another mac status;
+		u1bTmp = rtw_read8(Adapter, REG_MAC1);
+		u1bTmp&=MAC1_ON;
+	}
+	else
+	{
+		u1bTmp = rtw_read8(Adapter, REG_MAC0);
+		u1bTmp&=MAC0_ON;
+	}
+	//if another mac is alive,do not do power off 
+	if(u1bTmp)
+	{
+		u1bTmp=rtw_read8(Adapter, 0x17);
+		u1bTmp&=(~BIT7);
+		rtw_write8(Adapter, 0x17, u1bTmp);
+		return _FALSE;
+	}
+	return _TRUE;
+}
+#endif //amy, temp remove
+
+static int	
+CardDisableHWSM( // HW Auto state machine
+	IN	PADAPTER		Adapter,
+	IN	BOOLEAN			resetMCU
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	int		rtStatus = _SUCCESS;
+	u8		value;
+	
+	if(Adapter->bSurpriseRemoved){
+		return rtStatus;
+	}
+
+	rtw_write8(Adapter, REG_TXPAUSE, 0xFF);
+	rtw_udelay_os(500); 
+	rtw_write8(Adapter,	REG_CR, 0x0);
+
+	//==== RF Off Sequence ====
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	if(!pHalData->bSlaveOfDMSP || Adapter->DualMacConcurrent == _FALSE)
+#endif
+		_DisableRFAFEAndResetBB(Adapter);
+
+	if(!PHY_CheckPowerOffFor8192D(Adapter))
+		return rtStatus;
+
+	//0x20:value 05-->04
+	rtw_write8(Adapter, REG_LDOA15_CTRL,0x04);
+      	//RF Control 
+	rtw_write8(Adapter, REG_RF_CTRL,0);
+
+	//  ==== Reset digital sequence   ======
+	_ResetDigitalProcedure1(Adapter, _FALSE);
+	
+	//  ==== Pull GPIO PIN to balance level and LED control ======
+	_DisableGPIO(Adapter);
+
+	//  ==== Disable analog sequence ===
+	_DisableAnalog(Adapter, _FALSE);
+
+	ACQUIRE_GLOBAL_MUTEX(GlobalMutexForPowerOnAndPowerOff);
+	value=rtw_read8(Adapter, REG_POWER_OFF_IN_PROCESS);
+	value&=(~BIT7);
+	rtw_write8(Adapter, REG_POWER_OFF_IN_PROCESS, value);
+	RELEASE_GLOBAL_MUTEX(GlobalMutexForPowerOnAndPowerOff);
+
+	RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("======> Card disable finished.\n"));
+
+	return rtStatus;
+}
+
+static int	
+CardDisableWithoutHWSM( // without HW Auto state machine
+	IN	PADAPTER		Adapter	
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	int		rtStatus = _SUCCESS;
+	u8		value;
+
+	if(Adapter->bSurpriseRemoved){
+		return rtStatus;
+	}
+
+	rtw_write8(Adapter, REG_TXPAUSE, 0xFF);
+	rtw_udelay_os(500); 
+	rtw_write8(Adapter,	REG_CR, 0x0);
+
+	//==== RF Off Sequence ====
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	if(!pHalData->bSlaveOfDMSP || Adapter->DualMacConcurrent == _FALSE)
+#endif	
+		_DisableRFAFEAndResetBB(Adapter);
+
+	// stop tx/rx 
+	rtw_write8(Adapter, REG_TXPAUSE, 0xFF);
+	rtw_udelay_os(500); 
+	rtw_write8(Adapter,	REG_CR, 0x0);
+
+	if(!PHY_CheckPowerOffFor8192D(Adapter))
+	{
+		return rtStatus;
+	}
+
+	//0x20:value 05-->04
+	rtw_write8(Adapter, REG_LDOA15_CTRL,0x04);
+      	//RF Control 
+	rtw_write8(Adapter, REG_RF_CTRL,0);
+
+	//  ==== Reset digital sequence   ======
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	_ResetDigitalProcedure1(Adapter, _FALSE);
+#else
+	_ResetDigitalProcedure1(Adapter,_TRUE);
+#endif
+
+	//  ==== Pull GPIO PIN to balance level and LED control ======
+	_DisableGPIO(Adapter);
+
+	//  ==== Reset digital sequence   ======
+	_ResetDigitalProcedure2(Adapter);
+
+	//  ==== Disable analog sequence ===
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	_DisableAnalog(Adapter,_FALSE);
+#else
+	_DisableAnalog(Adapter,_TRUE);
+#endif
+
+	ACQUIRE_GLOBAL_MUTEX(GlobalMutexForPowerOnAndPowerOff);
+	value=rtw_read8(Adapter, REG_POWER_OFF_IN_PROCESS);
+	value&=(~BIT7);
+	rtw_write8(Adapter, REG_POWER_OFF_IN_PROCESS, value);
+	RELEASE_GLOBAL_MUTEX(GlobalMutexForPowerOnAndPowerOff);
+
+	//RT_TRACE(COMP_INIT, DBG_LOUD, ("<====== Card Disable Without HWSM .\n"));
+	return rtStatus;
+}
+
+u32 rtl8192du_hal_deinit(_adapter *padapter);
+u32 rtl8192du_hal_deinit(_adapter *padapter)
+ {
+	u8	u1bTmp;
+	u8	OpMode;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct pwrctrl_priv	*pwrpriv = &padapter->pwrctrlpriv;
+
+_func_enter_;
+
+	if(RT_IN_PS_LEVEL(pwrpriv, RT_RF_OFF_LEVL_HALT_NIC))
+	{
+		DBG_8192C("HaltAdapter8192DUsb(): Not to haltadapter if HW already halt\n");
+		return _FAIL;
+	}
+
+	padapter->bHaltInProgress = _TRUE;
+
+	OpMode = 0;
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MEDIA_STATUS, (u8 *)(&OpMode));
+
+#if 0
+	if(pHalData->interfaceIndex == 0){
+		u1bTmp = rtw_read8(padapter, REG_MAC0);
+		rtw_write8(padapter, REG_MAC0, u1bTmp&(~MAC0_ON));
+	}
+	else{
+		u1bTmp = rtw_read8(padapter, REG_MAC1);
+		rtw_write8(padapter, REG_MAC1, u1bTmp&(~MAC1_ON));
+	}
+#endif
+
+	if(/*Adapter->bInUsbIfTest ||*/ !pHalData->bSupportRemoteWakeUp){
+		if( padapter->bCardDisableWOHSM == _FALSE)
+			CardDisableHWSM(padapter, _FALSE);
+		else
+			CardDisableWithoutHWSM(padapter);
+	}
+	else{
+
+		// Wake on WLAN
+	}
+
+	if(pHalData->bInSetPower)
+	{
+		//0xFE10[4] clear before suspend	 suggested by zhouzhou
+		u1bTmp=rtw_read8(padapter,0xfe10);
+		u1bTmp&=(~BIT4);
+		rtw_write8(padapter,0xfe10,u1bTmp);
+	}
+
+	RT_SET_PS_LEVEL(pwrpriv, RT_RF_OFF_LEVL_HALT_NIC);
+
+	rtw_led_control(padapter, LED_CTL_POWER_OFF);
+
+	padapter->bHaltInProgress = _FALSE;
+
+_func_exit_;
+	
+	return _SUCCESS;
+ }
+
+unsigned int rtl8192du_inirp_init(_adapter * padapter);
+unsigned int rtl8192du_inirp_init(_adapter * padapter)
+{	
+	u8 i;	
+	struct recv_buf *precvbuf;
+	uint	status;
+	struct intf_hdl * pintfhdl=&padapter->iopriv.intf;
+	struct recv_priv *precvpriv = &(padapter->recvpriv);
+	u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
+	u32 (*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr);
+#endif
+
+_func_enter_;
+
+	_read_port = pintfhdl->io_ops._read_port;
+
+	status = _SUCCESS;
+
+	RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("===> usb_inirp_init \n"));	
+		
+	precvpriv->ff_hwaddr = RECV_BULK_IN_ADDR;
+
+	//issue Rx irp to receive data	
+	precvbuf = (struct recv_buf *)precvpriv->precv_buf;	
+	for(i=0; i<NR_RECVBUFF; i++)
+	{
+		if(_read_port(pintfhdl, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf) == _FALSE )
+		{
+			RT_TRACE(_module_hci_hal_init_c_,_drv_err_,("usb_rx_init: usb_read_port error \n"));
+			status = _FAIL;
+			goto exit;
+		}
+		
+		precvbuf++;		
+		precvpriv->free_recv_buf_queue_cnt--;
+	}
+
+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
+	_read_interrupt = pintfhdl->io_ops._read_interrupt;
+	if(_read_interrupt(pintfhdl, RECV_INT_IN_ADDR) == _FALSE )
+	{
+		RT_TRACE(_module_hci_hal_init_c_,_drv_err_,("usb_rx_init: usb_read_interrupt error \n"));
+		status = _FAIL;
+	}
+#endif
+
+exit:
+	
+	RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("<=== usb_inirp_init \n"));
+
+_func_exit_;
+
+	return status;
+
+}
+
+unsigned int rtl8192du_inirp_deinit(_adapter * padapter);
+unsigned int rtl8192du_inirp_deinit(_adapter * padapter)
+{	
+	RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("\n ===> usb_rx_deinit \n"));
+	
+	rtw_read_port_cancel(padapter);
+
+
+	RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("\n <=== usb_rx_deinit \n"));
+
+	return _SUCCESS;
+}
+
+//-------------------------------------------------------------------
+//
+//	EEPROM/EFUSE Content Parsing
+//
+//-------------------------------------------------------------------
+
+static void
+_ReadPROMVersion(
+	IN	PADAPTER	Adapter,	
+	IN	u8* 	PROMContent,
+	IN	BOOLEAN 	AutoloadFail
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+	if(AutoloadFail){
+		pHalData->EEPROMVersion = EEPROM_Default_Version;		
+	}
+	else{
+		pHalData->EEPROMVersion = *(u8 *)&PROMContent[EEPROM_VERSION];
+	}
+}
+
+u32
+_GetChannelGroup(
+	IN	u32	channel
+	);
+u32
+_GetChannelGroup(
+	IN	u32	channel
+	)
+{
+	//RT_ASSERT((channel < 14), ("Channel %d no is supported!\n"));
+
+	if(channel < 3){ 	// Channel 1~3
+		return 0;
+	}
+	else if(channel < 9){ // Channel 4~9
+		return 1;
+	}
+
+	return 2;				// Channel 10~14	
+}
+
+static void
+_ReadIDs(
+	IN	PADAPTER	Adapter,
+	IN	u8*		PROMContent,
+	IN	BOOLEAN		AutoloadFail
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+
+	if(_FALSE == AutoloadFail){
+		// VID, PID 
+		pHalData->EEPROMVID = le16_to_cpu( *(u16 *)&PROMContent[EEPROM_VID]);
+		pHalData->EEPROMPID = le16_to_cpu( *(u16 *)&PROMContent[EEPROM_PID]);
+		
+		// Customer ID, 0x00 and 0xff are reserved for Realtek. 		
+		pHalData->EEPROMCustomerID = *(u8 *)&PROMContent[EEPROM_CUSTOMER_ID];
+		pHalData->EEPROMSubCustomerID = *(u8 *)&PROMContent[EEPROM_SUBCUSTOMER_ID];
+
+	}
+	else{
+		pHalData->EEPROMVID	 = EEPROM_Default_VID;
+		pHalData->EEPROMPID	 = EEPROM_Default_PID;
+
+		// Customer ID, 0x00 and 0xff are reserved for Realtek. 		
+		pHalData->EEPROMCustomerID	= EEPROM_Default_CustomerID;
+		pHalData->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID;
+
+	}
+
+	//	Decide CustomerID according to VID/DID or EEPROM
+	switch(pHalData->EEPROMCustomerID)
+	{
+		case EEPROM_CID_WHQL:
+			//Adapter->bInHctTest = _TRUE;
+
+			//pMgntInfo->bSupportTurboMode = _FALSE;
+			//pMgntInfo->bAutoTurboBy8186 = _FALSE;
+
+			//pMgntInfo->PowerSaveControl.bInactivePs = _FALSE;
+			//pMgntInfo->PowerSaveControl.bIPSModeBackup = _FALSE;
+			//pMgntInfo->PowerSaveControl.bLeisurePs = _FALSE;
+			//pMgntInfo->keepAliveLevel = 0;
+
+			//Adapter->bUnloadDriverwhenS3S4 = _FALSE;
+			break;			
+		default:
+			pHalData->CustomerID = RT_CID_DEFAULT;
+			break;
+			
+	}
+
+	MSG_8192C("EEPROMVID = 0x%04x\n", pHalData->EEPROMVID);
+	MSG_8192C("EEPROMPID = 0x%04x\n", pHalData->EEPROMPID);
+	MSG_8192C("EEPROMCustomerID : 0x%02x\n", pHalData->EEPROMCustomerID);
+	MSG_8192C("EEPROMSubCustomerID: 0x%02x\n", pHalData->EEPROMSubCustomerID);
+}
+
+static VOID
+_ReadMACAddress(
+	IN	PADAPTER	Adapter,	
+	IN	u8*		PROMContent,
+	IN	BOOLEAN		AutoloadFail
+	)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	EEPROM_EFUSE_PRIV	*pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter);
+
+	// Dual MAC should assign diffrent MAC address ,or, it is wil cause hang in single phy mode  zhiyuan 04/07/2010
+	//Temply random assigh mac address for  efuse mac address not ready now
+	if(AutoloadFail == _FALSE  ){
+		if(pHalData->interfaceIndex == 0){
+			//change to use memcpy, in order to avoid alignment issue. Baron 2011/6/20
+			_rtw_memcpy(&pEEPROM->mac_addr, &PROMContent[EEPROM_MAC_ADDR_MAC0_92D], ETH_ALEN);
+		}
+		else{
+			//change to use memcpy, in order to avoid alignment issue. Baron 2011/6/20
+			_rtw_memcpy(&pEEPROM->mac_addr, &PROMContent[EEPROM_MAC_ADDR_MAC1_92D], ETH_ALEN);
+		}
+
+		if(is_broadcast_mac_addr(pEEPROM->mac_addr) || is_multicast_mac_addr(pEEPROM->mac_addr))
+		{
+			//Random assigh MAC address
+			u8 sMacAddr[MAC_ADDR_LEN] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00};
+			//u32	curtime = rtw_get_current_time();
+			if(pHalData->interfaceIndex == 1){
+				sMacAddr[5] = 0x01;
+				//sMacAddr[5] = (u8)(curtime & 0xff);
+				//sMacAddr[5] = (u8)GetRandomNumber(1, 254);
+			}
+			_rtw_memcpy(pEEPROM->mac_addr, sMacAddr, ETH_ALEN);
+		}
+	}
+	else
+	{
+		//Random assigh MAC address
+		u8 sMacAddr[MAC_ADDR_LEN] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00};
+		//u32	curtime = rtw_get_current_time();
+		if(pHalData->interfaceIndex == 1){
+			sMacAddr[5] = 0x01;
+			//sMacAddr[5] = (u8)(curtime & 0xff);
+			//sMacAddr[5] = (u8)GetRandomNumber(1, 254);
+		}
+		_rtw_memcpy(pEEPROM->mac_addr, sMacAddr, ETH_ALEN);
+	}
+	
+	//NicIFSetMacAddress(Adapter, Adapter->PermanentAddress);
+	//RT_PRINT_ADDR(COMP_INIT|COMP_EFUSE, DBG_LOUD, "MAC Addr: %s", Adapter->PermanentAddress);
+	DBG_8192C("MAC Address from EFUSE = "MAC_FMT"\n", MAC_ARG(pEEPROM->mac_addr));
+}
+
+
+static VOID
+hal_ReadMacPhyModeFromPROM92DU(
+	IN	PADAPTER	Adapter,	
+	IN	u8*		PROMContent
+)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8	MacPhyCrValue = 0;
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	//PADAPTER	BuddyAdapter = Adapter->BuddyAdapter;
+#endif
+	
+
+	MacPhyCrValue=PROMContent[EEPROM_ENDPOINT_SETTING];
+	if(MacPhyCrValue & BIT0)
+	{
+#ifdef CONFIG_DUALMAC_CONCURRENT
+		pHalData->MacPhyMode92D = DUALMAC_SINGLEPHY;
+		Adapter->DualMacConcurrent = _TRUE;
+#else
+		pHalData->MacPhyMode92D = DUALMAC_DUALPHY;
+		DBG_8192C("hal_ReadMacPhyModeFromPROM92DU:: MacPhyMode DUALMAC_DUALPHY \n");
+#endif
+	}
+	else
+	{
+		pHalData->MacPhyMode92D = SINGLEMAC_SINGLEPHY;
+	}
+
+	DBG_8192C("_ReadMacPhyModeFromPROM92DU(): MacPhyCrValue %d \n", MacPhyCrValue);
+	
+}
+
+static VOID
+hal_ReadMacPhyMode_92D(
+	IN	PADAPTER	Adapter,	
+	IN	u8			*PROMContent,
+	IN	BOOLEAN		AutoloadFail
+)
+{
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+#endif //CONFIG_DUALMAC_CONCURRENT
+	u8	Mac1EnableValue = 0;
+
+
+	
+	if(AutoloadFail==_TRUE){
+		Mac1EnableValue = rtw_read8(Adapter,0xFE64);
+		PHY_ReadMacPhyMode92D(Adapter, AutoloadFail);
+
+		DBG_8192C("_ReadMacPhyMode(): AutoloadFail %d 0xFE64 = 0x%x \n",AutoloadFail, Mac1EnableValue);
+	}
+	else{
+		hal_ReadMacPhyModeFromPROM92DU(Adapter, PROMContent);
+	}
+
+#ifdef CONFIG_DUALMAC_CONCURRENT
+//SMSP-->DMDP/DMSP wait for another adapter compeletes mode switc
+	//CheckInModeSwitchProcess(Adapter);
+
+//get Dual Mac Mode from 0x2C for test chip and 0xF8 for normal chip
+	ACQUIRE_GLOBAL_MUTEX(GlobalCounterForMutex);
+	if(GlobalFirstConfigurationForNormalChip)
+	{
+		RELEASE_GLOBAL_MUTEX(GlobalCounterForMutex);			
+		PHY_ConfigMacPhyMode92D(Adapter);
+		ACQUIRE_GLOBAL_MUTEX(GlobalCounterForMutex);
+		GlobalFirstConfigurationForNormalChip = _FALSE;
+		RELEASE_GLOBAL_MUTEX(GlobalCounterForMutex);				
+	}
+	else
+	{
+		RELEASE_GLOBAL_MUTEX(GlobalCounterForMutex);			
+		PHY_ReadMacPhyMode92D(Adapter, AutoloadFail);
+	}
+#else
+	PHY_ConfigMacPhyMode92D(Adapter);
+#endif
+
+	PHY_ConfigMacPhyModeInfo92D(Adapter);
+	rtl8192d_ResetDualMacSwitchVariables(Adapter);
+
+}
+
+static VOID
+_ReadBoardType(
+	IN	PADAPTER	Adapter,	
+	IN	u8*		PROMContent,
+	IN	BOOLEAN		AutoloadFail
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8			boardType;
+
+	if(AutoloadFail){
+		pHalData->rf_type = RF_2T2R;
+		pHalData->BluetoothCoexist = _FALSE;
+		return;
+	}
+
+	boardType = PROMContent[EEPROM_NORMAL_BoardType];
+	boardType &= BOARD_TYPE_NORMAL_MASK;
+	boardType >>= 5;
+
+#if 0
+	switch(boardType & 0xF)
+	{
+		case 0:
+		case 1:
+		case 2:
+		case 3:
+		case 4:
+			pHalData->rf_type = RF_2T2R;
+			break;
+		case 5:
+			pHalData->rf_type = RF_1T2R;
+			break;
+		default:
+			pHalData->rf_type = RF_1T1R;
+			break;
+	}
+
+	pHalData->BluetoothCoexist = (boardType >> 4) ? _TRUE : _FALSE;
+#endif
+}
+
+
+static VOID
+_ReadLEDSetting(
+	IN	PADAPTER	Adapter,	
+	IN	u8*		PROMContent,
+	IN	BOOLEAN		AutoloadFail
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct led_priv 	*pledpriv = &(Adapter->ledpriv);
+
+	// Led mode
+	switch(pHalData->CustomerID)
+	{
+		case RT_CID_DEFAULT:
+			pledpriv->LedStrategy = SW_LED_MODE1;
+			pledpriv->bRegUseLed = _TRUE;
+			break;
+		default:
+			pledpriv->LedStrategy = SW_LED_MODE0;
+			break;			
+	}
+
+	#ifdef CONFIG_FORCE_HW_LED
+	pledpriv->LedStrategy = HW_LED;
+	#endif
+}
+
+static void _InitAdapterVariablesByPROM(
+	IN	PADAPTER	Adapter,	
+	IN	u8*		PROMContent,
+	IN	unsigned char AutoloadFail
+	)
+{
+	_ReadPROMVersion(Adapter, PROMContent, AutoloadFail);
+	_ReadIDs(Adapter, PROMContent, AutoloadFail);
+	_ReadMACAddress(Adapter, PROMContent, AutoloadFail);
+	rtl8192d_ReadTxPowerInfo(Adapter, PROMContent, AutoloadFail);
+	hal_ReadMacPhyMode_92D(Adapter, PROMContent, AutoloadFail);
+	rtl8192d_ReadChannelPlan(Adapter, PROMContent, AutoloadFail);
+	_ReadBoardType(Adapter, PROMContent, AutoloadFail);
+	_ReadLEDSetting(Adapter, PROMContent, AutoloadFail);	
+}
+
+static void _ReadPROMContent(
+	IN PADAPTER 		Adapter
+	)
+{	
+	EEPROM_EFUSE_PRIV	*pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter);
+//	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
+	u8			PROMContent[HWSET_MAX_SIZE]={0};
+	u8			eeValue;
+	u32			i;
+//	u16			value16;
+
+	eeValue = rtw_read8(Adapter, REG_9346CR);
+	// To check system boot selection.
+	pEEPROM->EepromOrEfuse		= (eeValue & BOOT_FROM_EEPROM) ? _TRUE : _FALSE;
+	pEEPROM->bautoload_fail_flag	= (eeValue & EEPROM_EN) ? _FALSE : _TRUE;
+
+
+	DBG_8192C("Boot from %s, Autoload %s !\n", (pEEPROM->EepromOrEfuse ? "EEPROM" : "EFUSE"),
+				(pEEPROM->bautoload_fail_flag ? "Fail" : "OK") );
+
+	//pHalData->EEType = (pEEPROM->EepromOrEfuse == _TRUE) ? EEPROM_93C46 : EEPROM_BOOT_EFUSE;
+
+	if (pEEPROM->bautoload_fail_flag == _FALSE)
+	{
+		if ( pEEPROM->EepromOrEfuse == _TRUE)
+		{
+			// Read all Content from EEPROM or EFUSE.
+			for(i = 0; i < HWSET_MAX_SIZE; i += 2)
+			{
+				//todo:
+				//value16 = EF2Byte(ReadEEprom(Adapter, (u16) (i>>1)));
+				//*((u16*)(&PROMContent[i])) = value16; 				
+			}
+		}
+		else
+		{
+			// Read EFUSE real map to shadow.
+			ACQUIRE_GLOBAL_MUTEX(GlobalMutexForPowerAndEfuse);
+			EFUSE_ShadowMapUpdate(Adapter, EFUSE_WIFI, _FALSE);
+			RELEASE_GLOBAL_MUTEX(GlobalMutexForPowerAndEfuse);
+			_rtw_memcpy((void*)PROMContent, (void*)pEEPROM->efuse_eeprom_data, HWSET_MAX_SIZE);		
+		}
+
+		//Double check 0x8192 autoload status again
+		if(RTL8192_EEPROM_ID != le16_to_cpu(*((u16 *)PROMContent)))
+		{
+			pEEPROM->bautoload_fail_flag = _TRUE;
+			DBG_8192C("Autoload OK but EEPROM ID content is incorrect!!\n");
+		}
+		
+	}
+	else if ( pEEPROM->EepromOrEfuse == _FALSE)//auto load fail
+	{
+		_rtw_memset(pEEPROM->efuse_eeprom_data, 0xff, HWSET_MAX_SIZE);
+		_rtw_memcpy((void*)PROMContent, (void*)pEEPROM->efuse_eeprom_data, HWSET_MAX_SIZE);		
+	}
+
+	
+	_InitAdapterVariablesByPROM(Adapter, PROMContent, pEEPROM->bautoload_fail_flag);
+	
+}
+
+
+static VOID
+_InitOtherVariable(
+	IN PADAPTER 		Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);	
+
+	//if(Adapter->bInHctTest){
+	//	pMgntInfo->PowerSaveControl.bInactivePs = _FALSE;
+	//	pMgntInfo->PowerSaveControl.bIPSModeBackup = _FALSE;
+	//	pMgntInfo->PowerSaveControl.bLeisurePs = _FALSE;
+	//	pMgntInfo->keepAliveLevel = 0;
+	//}
+
+	// 2009/06/10 MH For 92S 1*1=1R/ 1*2&2*2 use 2R. We default set 1*1 use radio A
+	// So if you want to use radio B. Please modify RF path enable bit for correct signal
+	// strength calculate.
+	if (pHalData->rf_type == RF_1T1R){
+		pHalData->bRFPathRxEnable[0] = _TRUE;
+	}
+	else{
+		pHalData->bRFPathRxEnable[0] = pHalData->bRFPathRxEnable[1] = _TRUE;
+	}
+
+}
+
+static VOID
+_ReadRFType(
+	IN	PADAPTER	Adapter
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+#if DISABLE_BB_RF
+	pHalData->rf_chip = RF_PSEUDO_11N;
+#else
+	pHalData->rf_chip = RF_6052;
+#endif
+}
+
+static int _ReadAdapterInfo8192DU(PADAPTER	Adapter)
+{
+	MSG_8192C("====> ReadAdapterInfo8192D\n");
+
+	//rtl8192d_ReadChipVersion(Adapter);
+	_ReadRFType(Adapter);
+	_ReadPROMContent(Adapter);
+
+	_InitOtherVariable(Adapter);
+
+	//For 92DU Phy and Mac mode set ,will initialize by EFUSE/EPPROM     zhiyuan 2010/03/25
+	MSG_8192C("<==== ReadAdapterInfo8192D\n");
+
+	return _SUCCESS;
+}
+
+static void ReadAdapterInfo8192DU(PADAPTER Adapter)
+{
+	// Read EEPROM size before call any EEPROM function
+	//Adapter->EepromAddressSize=Adapter->HalFunc.GetEEPROMSizeHandler(Adapter);
+	Adapter->EepromAddressSize = GetEEPROMSize8192D(Adapter);
+	
+	_ReadAdapterInfo8192DU(Adapter);
+}
+
+#define GPIO_DEBUG_PORT_NUM 0
+static void rtl8192du_trigger_gpio_0(_adapter *padapter)
+{
+
+	u32 gpioctrl;
+	DBG_8192C("==> trigger_gpio_0...\n");
+	rtw_write16_async(padapter,REG_GPIO_PIN_CTRL,0);
+	rtw_write8_async(padapter,REG_GPIO_PIN_CTRL+2,0xFF);
+	gpioctrl = (BIT(GPIO_DEBUG_PORT_NUM)<<24 )|(BIT(GPIO_DEBUG_PORT_NUM)<<16);
+	rtw_write32_async(padapter,REG_GPIO_PIN_CTRL,gpioctrl);
+	gpioctrl |= (BIT(GPIO_DEBUG_PORT_NUM)<<8);
+	rtw_write32_async(padapter,REG_GPIO_PIN_CTRL,gpioctrl);
+	DBG_8192C("<=== trigger_gpio_0...\n");
+
+}
+
+static VOID 
+StopTxBeacon(	
+	IN	PADAPTER	Adapter
+	)
+{
+	HAL_DATA_TYPE*	pHalData = GET_HAL_DATA(Adapter);
+
+	//PlatformScheduleWorkItem(&pHalData->StopTxBeaconWorkItem);
+
+	DBG_8192C("StopTxBeacon\n");
+
+	rtw_write8(Adapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl) & (~BIT6));
+	pHalData->RegFwHwTxQCtrl &= (~BIT6);
+	rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xff);
+	rtw_write8(Adapter, REG_TBTT_PROHIBIT+1, 0x64);
+
+	//CheckFwRsvdPageContent(Adapter);  // 2010.06.23. Added by tynli.
+
+}
+
+static VOID
+ResumeTxBeacon(
+	IN	PADAPTER	Adapter
+	)
+{
+	HAL_DATA_TYPE*	pHalData = GET_HAL_DATA(Adapter);
+
+	//PlatformScheduleWorkItem(&pHalData->ResumeTxBeaconWorkItem);
+
+	DBG_8192C("ResumeTxBeacon\n");
+
+	rtw_write8(Adapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl) | BIT6);
+	pHalData->RegFwHwTxQCtrl |= BIT6;
+	rtw_write8(Adapter, REG_BCN_MAX_ERR, 0x0a);
+	rtw_write8(Adapter, REG_TBTT_PROHIBIT+1, 0x64);
+
+}
+
+//
+// 2010.11.17. Added by tynli.
+//
+u8
+SelectRTSInitialRate(
+	IN	PADAPTER	Adapter
+);
+u8
+SelectRTSInitialRate(
+	IN	PADAPTER	Adapter
+)
+{
+	struct sta_info		*psta;
+	struct mlme_priv		*pmlmepriv = &Adapter->mlmepriv;
+	struct mlme_ext_priv	*pmlmeext = &Adapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX 		*cur_network = &(pmlmeinfo->network);
+	struct sta_priv		*pstapriv = &Adapter->stapriv;
+	u8	bUseProtection;
+	u16	BasicRateCfg=0;
+	u8	SupportRateSet[NDIS_802_11_LENGTH_RATES_EX];
+	u8	RTSRateIndex=0; // 1M
+	u8	LowestRateIdx=0;
+	//u8	TempRateIdx=0;
+	//u8	i;
+
+
+	psta = rtw_get_stainfo(pstapriv, cur_network->MacAddress);
+	if(psta == NULL)
+	{
+		return RTSRateIndex;
+	}
+
+	if(psta->rtsen || psta->cts2self)
+		bUseProtection = _TRUE;
+
+	_rtw_memcpy(SupportRateSet, cur_network->SupportedRates, NDIS_802_11_LENGTH_RATES_EX);
+
+	rtl8192d_HalSetBrateCfg( Adapter, SupportRateSet, &BasicRateCfg );
+
+	if( bUseProtection && 
+		(!(pmlmeext->cur_wireless_mode == WIRELESS_11A|| pmlmeext->cur_wireless_mode == WIRELESS_11A_5N)))// 5G not support cck rate
+	{
+		// Use CCK rate
+		BasicRateCfg &= 0xf; //CCK rate
+		while(BasicRateCfg > 0x1)
+		{
+			BasicRateCfg = (BasicRateCfg>> 1);
+			RTSRateIndex++;
+		}
+	}
+	else //if(pMgntInfo->pHTInfo->CurrentOpMode)
+	{
+		//MacId 0: INFRA mode.
+		if((check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)&&(check_fwstate(pmlmepriv, WIFI_STATION_STATE)==_TRUE))
+		{
+			LowestRateIdx = rtw_read8(Adapter, REG_INIDATA_RATE_SEL)&0x3f;
+		}		
+
+		//Todo: for AP mode and IBSS mode.
+		/*for(i = 0; i < ASSOCIATE_ENTRY_NUM; i++)
+		{
+			if(AsocEntry[i].bUsed && AsocEntry[i].bAssociated)
+ 			{
+				//Get the lowest data rate.
+				if(AsocEntry[i].AID != 0)
+				{
+					TempRateIdx = rtw_read8(Adapter, REG_INIDATA_RATE_SEL+4*(AsocEntry[i].AID+1));
+					TempRateIdx &= 0x3f; // bit 0-5: rate index
+					
+					if(TempRateIdx < LowestRateIdx)
+						LowestRateIdx = TempRateIdx;
+				}
+			}
+		}*/
+		
+		// Adjust RTS Init rate when the data rate is MCS0~2, 8~10 which is lower than 24M.
+		if(LowestRateIdx == 12 || LowestRateIdx == 20) //MCS0, MCS8
+		{
+			RTSRateIndex = 4; // 6M
+		}
+		else if(LowestRateIdx == 13 || LowestRateIdx == 14 ||
+			LowestRateIdx == 21 || LowestRateIdx == 22) //MCS1, MCS2, MCS9, MCS10
+		{
+			RTSRateIndex = 6; // 12M
+		}
+		else 
+		{
+			//if((pmlmeext->cur_wireless_mode == WIRELESS_11BG_24N) && 
+				//(!pMgntInfo->pHTInfo->bCurSuppCCK) && 
+			//	(pmlmeext->cur_bwmode == HT_CHANNEL_WIDTH_40))
+			//{
+			//	BasicRateCfg &= 0xfff0; //disable CCK
+			//}
+			
+			if(BasicRateCfg != 0)
+			{
+				// Select RTS Init rate
+				while(BasicRateCfg > 0x1)
+				{
+					BasicRateCfg = (BasicRateCfg>> 1);
+					RTSRateIndex++;
+				}
+			}
+			else
+			{
+				RTSRateIndex = 4; // 6M
+			}
+		}
+		
+	}
+
+	//Set RTS init rate to Hw.
+	return RTSRateIndex;
+}
+
+//
+// Description: Selcet the RTS init rate and set the rate to HW.
+// 2010.11.25. Created by tynli.
+//
+VOID
+SetRTSRateWorkItemCallback(
+	IN PVOID			pContext
+);
+VOID
+SetRTSRateWorkItemCallback(
+	IN PVOID			pContext
+)
+{
+	PADAPTER		Adapter =  (PADAPTER)pContext;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8	NewRTSInitRate = 0;
+	
+	NewRTSInitRate = SelectRTSInitialRate(Adapter);
+	if(NewRTSInitRate != pHalData->RTSInitRate)
+	{
+		rtw_write8(Adapter, REG_INIRTS_RATE_SEL, NewRTSInitRate);
+		pHalData->RTSInitRate = NewRTSInitRate;
+	}
+	
+	DBG_8192C("HW_VAR_INIT_RTS_RATE: RateIndex(%d)\n", NewRTSInitRate);
+}
+
+static void hw_var_set_opmode(PADAPTER Adapter, u8 variable, u8* val)
+{
+	u8	val8;
+	u8	mode = *((u8 *)val);
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+#ifdef CONFIG_CONCURRENT_MODE
+	if(Adapter->iface_type == IFACE_PORT1)
+	{
+		if((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_))
+		{
+			PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter;
+			struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv;
+			struct mlme_ext_info *pbuddy_mlmeinfo = &(pbuddy_mlmeext->mlmext_info);
+			
+			if((pbuddy_mlmeinfo->state&0x03) != WIFI_FW_AP_STATE)
+			{
+				StopTxBeacon(Adapter);
+			}
+			rtw_write8(Adapter,REG_BCN_CTRL_1, 0x19);//disable atim wnd
+			//rtw_write8(Adapter,REG_BCN_CTRL_1, 0x18);
+		}
+		else if((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/)
+		{
+			ResumeTxBeacon(Adapter);
+			rtw_write8(Adapter,REG_BCN_CTRL_1, 0x1a);
+		}
+		else if(mode == _HW_STATE_AP_)
+		{
+			ResumeTxBeacon(Adapter);
+					
+			rtw_write8(Adapter, REG_BCN_CTRL_1, 0x12);
+
+					
+			//Set RCR
+			//rtw_write32(padapter, REG_RCR, 0x70002a8e);//CBSSID_DATA must set to 0
+			rtw_write32(Adapter, REG_RCR, 0x7000228e);//CBSSID_DATA must set to 0
+			//enable to rx data frame				
+			rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
+			//enable to rx ps-poll
+			rtw_write16(Adapter, REG_RXFLTMAP1, 0x0400);
+
+			//Beacon Control related register for first time 
+			rtw_write8(Adapter, REG_BCNDMATIM, 0x02); // 2ms		
+			rtw_write8(Adapter, REG_DRVERLYINT, 0x05);// 5ms
+			//rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF);
+			rtw_write8(Adapter, REG_ATIMWND_1, 0x0a); // 10ms for port1
+			rtw_write16(Adapter, REG_BCNTCFG, 0x00);
+			rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04);
+			rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);// +32767 (~32ms)		
+	
+			//reset TSF2	
+			rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1));
+
+			//enable TSF1 Function for if2
+			rtw_write8(Adapter, REG_BCN_CTRL_1, (EN_BCN_FUNCTION | EN_TXBCN_RPT|BIT(1)));
+			
+			//enable update TSF1 for if2
+			rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(4)));
+
+			//dis BCN0 ATIM  WND if if1 is station
+			rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(0));
+					
+		}
+
+		val8 = rtw_read8(Adapter, MSR)&0x03;
+		val8 |= (mode<<2);
+		rtw_write8(Adapter, MSR, val8);
+
+	}
+	else
+#endif //CONFIG_CONCURRENT_MODE
+	{
+		if((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_))
+		{
+#ifdef CONFIG_CONCURRENT_MODE
+			PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter;
+			struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv;
+			struct mlme_ext_info *pbuddy_mlmeinfo = &(pbuddy_mlmeext->mlmext_info);
+			
+			if((pbuddy_mlmeinfo->state&0x03) != WIFI_FW_AP_STATE)
+#endif //CONFIG_CONCURRENT_MODE
+			{
+				StopTxBeacon(Adapter);
+			}
+			rtw_write8(Adapter,REG_BCN_CTRL, 0x19);//disable atim wnd
+			//rtw_write8(Adapter,REG_BCN_CTRL, 0x18);
+		}
+		else if((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/)
+		{
+			ResumeTxBeacon(Adapter);
+			rtw_write8(Adapter,REG_BCN_CTRL, 0x1a);
+		}
+		else if(mode == _HW_STATE_AP_)
+		{
+			ResumeTxBeacon(Adapter);
+					
+			rtw_write8(Adapter, REG_BCN_CTRL, 0x12);
+
+					
+			//Set RCR
+			//write32(padapter, REG_RCR, 0x70002a8e);//CBSSID_DATA must set to 0
+			rtw_write32(Adapter, REG_RCR, 0x7000228e);//CBSSID_DATA must set to 0
+			//enable to rx data frame				
+			rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
+			//enable to rx ps-poll
+			rtw_write16(Adapter, REG_RXFLTMAP1, 0x0400);
+
+			//Beacon Control related register for first time 
+			rtw_write8(Adapter, REG_BCNDMATIM, 0x02); // 2ms		
+			rtw_write8(Adapter, REG_DRVERLYINT, 0x05);// 5ms
+			//write8(Adapter, REG_BCN_MAX_ERR, 0xFF);
+			rtw_write8(Adapter, REG_ATIMWND, 0x0a); // 10ms for port0
+			rtw_write16(Adapter, REG_BCNTCFG, 0x00);
+			rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04);
+			rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);// +32767 (~32ms)	
+	
+			//reset TSF		
+			rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0));
+
+			//enable TSF Function for if1
+			rtw_write8(Adapter, REG_BCN_CTRL, (EN_BCN_FUNCTION | EN_TXBCN_RPT));
+			
+			//enable update TSF for if1
+			rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));			
+
+			//dis BCN1 ATIM  WND if if2 is station
+			rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(0));		
+		}
+
+		val8 = rtw_read8(Adapter, MSR)&0x0c;
+		val8 |= mode;
+		rtw_write8(Adapter, MSR, val8);
+
+	}
+
+}
+
+static void hw_var_set_macaddr(PADAPTER Adapter, u8 variable, u8* val)
+{
+	u8 idx = 0;
+	u32 reg_macid;
+
+#ifdef CONFIG_CONCURRENT_MODE
+	if(Adapter->iface_type == IFACE_PORT1)
+	{
+		reg_macid = REG_MACID1;
+	}
+	else
+#endif
+	{
+		reg_macid = REG_MACID;
+	}
+
+	for(idx = 0 ; idx < 6; idx++)
+	{
+		rtw_write8(Adapter, (reg_macid+idx), val[idx]);
+	}
+	
+}
+
+static void hw_var_set_bssid(PADAPTER Adapter, u8 variable, u8* val)
+{
+	u8	idx = 0;
+	u32 reg_bssid;
+
+#ifdef CONFIG_CONCURRENT_MODE
+	if(Adapter->iface_type == IFACE_PORT1)
+	{
+		reg_bssid = REG_BSSID1;
+	}
+	else
+#endif
+	{
+		reg_bssid = REG_BSSID;
+	}
+
+	for(idx = 0 ; idx < 6; idx++)
+	{
+		rtw_write8(Adapter, (reg_bssid+idx), val[idx]);
+	}
+
+}
+
+static void hw_var_set_bcn_func(PADAPTER Adapter, u8 variable, u8* val)
+{
+	u32 bcn_ctrl_reg;
+
+#ifdef CONFIG_CONCURRENT_MODE
+	if(Adapter->iface_type == IFACE_PORT1)
+	{
+		bcn_ctrl_reg = REG_BCN_CTRL_1;
+	}	
+	else
+#endif //CONFIG_CONCURRENT_MODE
+	{		
+		bcn_ctrl_reg = REG_BCN_CTRL;
+	}
+
+	if(*((u8 *)val))
+	{
+		rtw_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT));
+	}
+	else
+	{
+		rtw_write8(Adapter, bcn_ctrl_reg, rtw_read8(Adapter, bcn_ctrl_reg)&(~(EN_BCN_FUNCTION | EN_TXBCN_RPT)));
+	}
+	
+
+}
+
+static void hw_var_set_correct_tsf(PADAPTER Adapter, u8 variable, u8* val)
+{
+	u64	tsf;
+	struct mlme_ext_priv	*pmlmeext = &Adapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	//tsf = pmlmeext->TSFValue - ((u32)pmlmeext->TSFValue % (pmlmeinfo->bcn_interval*1024)) -1024; //us
+	tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) -1024; //us
+
+	if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
+	{				
+		//pHalData->RegTxPause |= STOP_BCNQ;BIT(6)
+		//rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)|BIT(6)));
+		StopTxBeacon(Adapter);
+	}
+#ifdef CONFIG_CONCURRENT_MODE
+	if(Adapter->iface_type == IFACE_PORT1)
+	{
+		//disable related TSF function
+		rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3)));
+							
+		rtw_write32(Adapter, REG_TSFTR1, tsf);
+		rtw_write32(Adapter, REG_TSFTR1+4, tsf>>32);
+
+		//enable related TSF function
+		rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(3));
+	}
+	else
+#endif //CONFIG_CONCURRENT_MODE
+	{
+		//disable related TSF function
+		rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(3)));
+							
+		rtw_write32(Adapter, REG_TSFTR, tsf);
+		rtw_write32(Adapter, REG_TSFTR+4, tsf>>32);
+
+		//enable related TSF function
+		rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(3));
+	}
+				
+							
+	if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
+	{
+		//pHalData->RegTxPause  &= (~STOP_BCNQ);
+		//rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)&(~BIT(6))));
+		ResumeTxBeacon(Adapter);
+	}
+}
+
+static void hw_var_set_mlme_disconnect(PADAPTER Adapter, u8 variable, u8* val)
+{
+#ifdef CONFIG_CONCURRENT_MODE
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter;
+	struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv;
+	struct mlme_ext_info *pbuddy_mlmeinfo = &(pbuddy_mlmeext->mlmext_info);
+			
+	if((pbuddy_mlmeinfo->state&0x03) == _HW_STATE_NOLINK_)
+		rtw_write16(Adapter, REG_RXFLTMAP2, 0x00);
+	
+
+	if(Adapter->iface_type == IFACE_PORT1)
+	{
+		//reset TSF
+		rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1));
+
+		//disable update TSF
+		rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(4));	
+	}
+	else
+	{
+		//reset TSF
+		rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0));
+
+		//disable update TSF
+		rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4));	
+	}
+#endif
+}
+
+static void hw_var_set_mlme_sitesurvey(PADAPTER Adapter, u8 variable, u8* val)
+{	
+#ifdef CONFIG_CONCURRENT_MODE	
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
+
+	struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
+	struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
+	
+	PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter;
+	struct mlme_priv *pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv);
+	struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv;
+	struct mlme_ext_info *pbuddy_mlmeinfo = &(pbuddy_mlmeext->mlmext_info);
+	
+	if(*((u8 *)val))//under sitesurvey
+	{
+		//config RCR to receive different BSSID & not to receive data frame
+		//pHalData->ReceiveConfig &= (~(RCR_CBSSID_DATA | RCR_CBSSID_BCN));			
+		u32 v = rtw_read32(Adapter, REG_RCR);
+		v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN );//| RCR_ADF
+		rtw_write32(Adapter, REG_RCR, v);
+
+		//disable update TSF
+		if((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE)
+		{
+			if(Adapter->iface_type == IFACE_PORT1)
+			{
+				rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(4));
+			}
+			else
+			{
+				rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4));
+			}				
+		}
+
+		if(((pbuddy_mlmeinfo->state&0x03) == WIFI_FW_AP_STATE) &&
+			check_fwstate(pbuddy_mlmepriv, _FW_LINKED))
+		{
+			StopTxBeacon(Adapter);
+		}
+	}
+	else//sitesurvey done
+	{
+		//enable to rx data frame
+		//write32(Adapter, REG_RCR, read32(padapter, REG_RCR)|RCR_ADF);
+		rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF);
+
+		//enable update TSF
+		if(Adapter->iface_type == IFACE_PORT1)
+			rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(4)));
+		else
+			rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
+
+		if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE ||
+			(pbuddy_mlmeinfo->state&0x03) == WIFI_FW_AP_STATE)
+			rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN);
+		else			
+			rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
+					
+		if(((pbuddy_mlmeinfo->state&0x03) == WIFI_FW_AP_STATE) &&
+			check_fwstate(pbuddy_mlmepriv, _FW_LINKED))
+		{
+			ResumeTxBeacon(Adapter);			
+
+			//reset TSF 1/2 after ResumeTxBeacon
+			if(pbuddy_adapter->iface_type == IFACE_PORT1)				
+				rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1));	
+			else
+				rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0));
+		}			
+	}
+#endif			
+}
+
+static void hw_var_set_mlme_join(PADAPTER Adapter, u8 variable, u8* val)
+{
+#ifdef CONFIG_CONCURRENT_MODE
+	u8	RetryLimit = 0x30;
+	u8	type = *((u8 *)val);
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
+	struct mlme_priv	*pmlmepriv = &Adapter->mlmepriv;
+	PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter;
+	struct mlme_priv *pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv);
+	struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv;
+	struct mlme_ext_info *pbuddy_mlmeinfo = &(pbuddy_mlmeext->mlmext_info);
+
+	if(type == 0) // prepare to join
+	{		
+		if(((pbuddy_mlmeinfo->state&0x03) == WIFI_FW_AP_STATE) &&
+			check_fwstate(pbuddy_mlmepriv, _FW_LINKED))
+		{
+			StopTxBeacon(Adapter);
+		}
+	
+		//enable to rx data frame.Accept all data frame
+		//rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF);
+		rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF);
+
+		if((pbuddy_mlmeinfo->state&0x03) == WIFI_FW_AP_STATE)
+			rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN);
+		else
+			rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
+
+		if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
+		{
+			RetryLimit = (pHalData->CustomerID == RT_CID_CCX) ? 7 : 48;
+		}
+		else // Ad-hoc Mode
+		{
+			RetryLimit = 0x7;
+		}
+	}
+	else if(type == 1) //joinbss_event call back when join res < 0
+	{		
+		if((pbuddy_mlmeinfo->state&0x03) == _HW_STATE_NOLINK_)
+			rtw_write16(Adapter, REG_RXFLTMAP2,0x00);
+
+		if(((pbuddy_mlmeinfo->state&0x03) == WIFI_FW_AP_STATE) &&
+			check_fwstate(pbuddy_mlmepriv, _FW_LINKED))
+		{
+			ResumeTxBeacon(Adapter);			
+		}
+	}
+	else if(type == 2) //sta add event call back
+	{
+	 
+		//enable update TSF
+		if(Adapter->iface_type == IFACE_PORT1)
+			rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(4)));
+		else
+			rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
+		 
+	
+		if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE))
+		{
+			//fixed beacon issue for 8191su...........
+			rtw_write8(Adapter,0x542 ,0x02);
+			RetryLimit = 0x7;
+		}
+
+
+		if(((pbuddy_mlmeinfo->state&0x03) == WIFI_FW_AP_STATE) &&
+			check_fwstate(pbuddy_mlmepriv, _FW_LINKED))
+		{
+			ResumeTxBeacon(Adapter);			
+		}
+		
+	}
+
+	rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT);
+	
+#endif
+}
+
+#ifdef CONFIG_DUALMAC_CONCURRENT
+static void dc_hw_var_mlme_sitesurvey(PADAPTER Adapter, u8 sitesurvey_state)
+{
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);	
+	PADAPTER BuddyAdapter = Adapter->pbuddy_adapter;
+	struct mlme_priv *pbuddy_mlmepriv;
+	struct mlme_ext_priv *pbuddy_mlmeext;
+	struct mlme_ext_info *pbuddy_mlmeinfo;
+
+
+	if((BuddyAdapter !=NULL) && 
+		Adapter->DualMacConcurrent == _TRUE)
+	{
+		pbuddy_mlmepriv = &(BuddyAdapter->mlmepriv);
+		pbuddy_mlmeext = &BuddyAdapter->mlmeextpriv;
+		pbuddy_mlmeinfo = &(pbuddy_mlmeext->mlmext_info);
+
+		if(sitesurvey_state)//under sitesurvey
+		{
+			if(((pbuddy_mlmeinfo->state&0x03) == WIFI_FW_AP_STATE) &&
+				check_fwstate(pbuddy_mlmepriv, _FW_LINKED))
+			{
+				StopTxBeacon(BuddyAdapter);
+			}
+
+			rtw_write16(Adapter, REG_RRSR, 0x150);
+		}
+		else//sitesurvey done
+		{
+			if(((pbuddy_mlmeinfo->state&0x03) == WIFI_FW_AP_STATE) &&
+				check_fwstate(pbuddy_mlmepriv, _FW_LINKED))
+			{
+				ResumeTxBeacon(BuddyAdapter);
+			}	
+		}
+	}
+}
+
+static void dc_hw_var_mlme_join(PADAPTER Adapter, u8 join_state)
+{
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
+	struct mlme_ext_priv	*pmlmeext = &Adapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	PADAPTER BuddyAdapter = Adapter->pbuddy_adapter;
+	struct mlme_priv *pbuddy_mlmepriv;
+	struct mlme_ext_priv *pbuddy_mlmeext;
+	struct mlme_ext_info *pbuddy_mlmeinfo;
+
+
+	if((BuddyAdapter !=NULL) && 
+		Adapter->DualMacConcurrent == _TRUE)
+	{
+		pbuddy_mlmepriv = &(BuddyAdapter->mlmepriv);
+		pbuddy_mlmeext = &BuddyAdapter->mlmeextpriv;
+		pbuddy_mlmeinfo = &(pbuddy_mlmeext->mlmext_info);
+
+		if(pmlmeext->cur_channel != pbuddy_mlmeext->cur_channel ||
+			pmlmeext->cur_bwmode != pbuddy_mlmeext->cur_bwmode ||
+			pmlmeext->cur_ch_offset != pbuddy_mlmeext->cur_ch_offset)
+		{
+			if(join_state == 0)// prepare to join
+			{
+				if(((pbuddy_mlmeinfo->state&0x03) == WIFI_FW_AP_STATE) &&
+					check_fwstate(pbuddy_mlmepriv, _FW_LINKED))
+				{
+					StopTxBeacon(BuddyAdapter);
+				}
+			}
+			else//join success or fail
+			{
+				if(((pbuddy_mlmeinfo->state&0x03) == WIFI_FW_AP_STATE) &&
+					check_fwstate(pbuddy_mlmepriv, _FW_LINKED))
+				{
+					ResumeTxBeacon(BuddyAdapter);
+				}
+			}
+		}
+	}
+}
+#endif
+
+void SetHwReg8192DU(PADAPTER Adapter, u8 variable, u8* val);
+void SetHwReg8192DU(PADAPTER Adapter, u8 variable, u8* val)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+_func_enter_;
+
+	switch(variable)
+	{
+		case HW_VAR_MEDIA_STATUS:
+			{
+				u8 val8;
+
+				val8 = rtw_read8(Adapter, MSR)&0x0c;
+				val8 |= *((u8 *)val);
+				rtw_write8(Adapter, MSR, val8);
+			}
+			break;
+		case HW_VAR_MEDIA_STATUS1:
+			{
+				u8 val8;
+				
+				val8 = rtw_read8(Adapter, MSR)&0x03;
+				val8 |= *((u8 *)val) <<2;
+				rtw_write8(Adapter, MSR, val8);
+			}
+			break;
+		case HW_VAR_SET_OPMODE:
+#if defined(CONFIG_CONCURRENT_MODE)
+			hw_var_set_opmode(Adapter, variable, val);
+#else //CONFIG_CONCURRENT_MODE
+			{
+				u8	val8;
+				u8	mode = *((u8 *)val);
+
+				if((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_))
+				{
+					StopTxBeacon(Adapter);
+					rtw_write8(Adapter,REG_BCN_CTRL, 0x18);
+				}
+				else if((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/)
+				{
+					ResumeTxBeacon(Adapter);
+					rtw_write8(Adapter,REG_BCN_CTRL, 0x1a);
+				}
+				else if(mode == _HW_STATE_AP_)
+				{
+					ResumeTxBeacon(Adapter);
+					
+					rtw_write8(Adapter, REG_BCN_CTRL, 0x12);
+
+					
+					//Set RCR
+					//rtw_write32(padapter, REG_RCR, 0x70002a8e);//CBSSID_DATA must set to 0
+					rtw_write32(Adapter, REG_RCR, 0x7000228e);//CBSSID_DATA must set to 0
+					//enable to rx data frame				
+					rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
+					//enable to rx ps-poll
+					rtw_write16(Adapter, REG_RXFLTMAP1, 0x0400);
+
+					//Beacon Control related register for first time 
+					rtw_write8(Adapter, REG_BCNDMATIM, 0x02); // 2ms		
+					rtw_write8(Adapter, REG_DRVERLYINT, 0x05);// 5ms
+					//rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF);
+					rtw_write8(Adapter, REG_ATIMWND, 0x0a); // 10ms
+					rtw_write16(Adapter, REG_BCNTCFG, 0x00);
+					rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0x6404);		
+	
+					//reset TSF		
+					rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0));
+
+					//enable TSF Function for if1
+					rtw_write8(Adapter, REG_BCN_CTRL, (EN_BCN_FUNCTION | EN_TXBCN_RPT));
+			
+					//enable update TSF for if1
+					//if(IS_NORMAL_CHIP(pHalData->VersionID))
+					//{			
+						rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));			
+					//}
+					//else
+					//{
+					//	rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~(BIT(4)|BIT(5))));
+					//}
+					
+				}
+
+				val8 = rtw_read8(Adapter, MSR)&0x0c;
+				val8 |= mode;
+				rtw_write8(Adapter, MSR, val8);
+			}
+#endif //CONFIG_CONCURRENT_MODE
+			break;
+		case HW_VAR_MAC_ADDR:
+			hw_var_set_macaddr(Adapter, variable, val);			
+			break;
+		case HW_VAR_BSSID:
+#if defined(CONFIG_CONCURRENT_MODE)
+			hw_var_set_bssid(Adapter, variable, val);
+#else //CONFIG_CONCURRENT_MODE
+			{
+				u8	idx = 0;
+				for(idx = 0 ; idx < 6; idx++)
+				{
+					rtw_write8(Adapter, (REG_BSSID+idx), val[idx]);
+				}
+			}
+#endif //CONFIG_CONCURRENT_MODE
+			break;
+		case HW_VAR_BASIC_RATE:
+			{
+				u16	BrateCfg = 0;
+				u8	RateIndex = 0;
+#ifdef CONFIG_DUALMAC_CONCURRENT
+				PADAPTER	BuddyAdapter = Adapter->pbuddy_adapter;
+#endif
+				
+				// 2007.01.16, by Emily
+				// Select RRSR (in Legacy-OFDM and CCK)
+				// For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate.
+				// We do not use other rates.
+				rtl8192d_HalSetBrateCfg( Adapter, val, &BrateCfg );
+
+				if(pHalData->CurrentBandType92D == BAND_ON_2_4G)
+				{
+					//CCK 2M ACK should be disabled for some BCM and Atheros AP IOT
+					//because CCK 2M has poor TXEVM
+					//CCK 5.5M & 11M ACK should be enabled for better performance
+					pHalData->BasicRateSet = BrateCfg = (BrateCfg |0xd )& 0x15d;
+					BrateCfg |= 0x1; // default enable 1M ACK rate
+				}
+				else // 5G
+				{
+					pHalData->BasicRateSet &= 0xFF0;
+					BrateCfg |= 0x10; // default enable 6M ACK rate
+				}
+
+				DBG_8192C("HW_VAR_BASIC_RATE: BrateCfg(%#x)\n", BrateCfg);
+
+				// Set RRSR rate table.
+				rtw_write8(Adapter, REG_RRSR, BrateCfg&0xff);
+				rtw_write8(Adapter, REG_RRSR+1, (BrateCfg>>8)&0xff);
+
+				//if(pHalData->FirmwareVersion > 0xe)
+				//{
+				//	SetRTSRateWorkItemCallback(Adapter);
+				//}
+				//else
+				//{
+					// Set RTS initial rate
+					while(BrateCfg > 0x1)
+					{
+						BrateCfg = (BrateCfg>> 1);
+						RateIndex++;
+					}
+					rtw_write8(Adapter, REG_INIRTS_RATE_SEL, RateIndex);
+				//}
+
+
+				if(check_fwstate(&Adapter->mlmepriv, WIFI_AP_STATE) == _TRUE)
+				{
+					DBG_8192C("%s(): pHalData->bNeedIQK = _TRUE\n",__FUNCTION__);
+					pHalData->bNeedIQK = _TRUE; //for 92D IQK
+				}
+#ifdef CONFIG_DUALMAC_CONCURRENT
+				if((BuddyAdapter !=NULL) && (pHalData->bSlaveOfDMSP))
+				{
+					if(check_fwstate(&BuddyAdapter->mlmepriv, WIFI_AP_STATE) == _TRUE)
+						GET_HAL_DATA(BuddyAdapter)->bNeedIQK = _TRUE; //for 92D IQK
+				}
+#endif
+			}
+			break;
+		case HW_VAR_TXPAUSE:
+			rtw_write8(Adapter, REG_TXPAUSE, *((u8 *)val));	
+			break;
+		case HW_VAR_BCN_FUNC:
+#ifdef CONFIG_CONCURRENT_MODE
+			hw_var_set_bcn_func(Adapter, variable, val);
+#else //CONFIG_CONCURRENT_MODE
+			if(*((u8 *)val))
+			{
+				rtw_write8(Adapter, REG_BCN_CTRL, (EN_BCN_FUNCTION | EN_TXBCN_RPT));
+			}
+			else
+			{
+				rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~(EN_BCN_FUNCTION | EN_TXBCN_RPT)));
+			}
+#endif //CONFIG_CONCURRENT_MODE
+			break;
+		case HW_VAR_CORRECT_TSF:
+#ifdef CONFIG_CONCURRENT_MODE
+			hw_var_set_correct_tsf(Adapter, variable, val);
+#else //CONFIG_CONCURRENT_MODE
+			{
+				u64	tsf;
+				struct mlme_ext_priv	*pmlmeext = &Adapter->mlmeextpriv;
+				struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+				//tsf = pmlmeext->TSFValue - ((u32)pmlmeext->TSFValue % (pmlmeinfo->bcn_interval*1024)) -1024; //us
+				tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) -1024; //us
+
+				if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
+				{				
+					//pHalData->RegTxPause |= STOP_BCNQ;BIT(6)
+					//rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)|BIT(6)));
+					StopTxBeacon(Adapter);
+				}
+
+				//disable related TSF function
+				rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(3)));
+							
+				rtw_write32(Adapter, REG_TSFTR, tsf);
+				rtw_write32(Adapter, REG_TSFTR+4, tsf>>32);
+
+				//enable related TSF function
+				rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(3));
+				
+							
+				if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
+				{
+					//pHalData->RegTxPause  &= (~STOP_BCNQ);
+					//rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)&(~BIT(6))));
+					ResumeTxBeacon(Adapter);
+				}
+			}
+#endif //CONFIG_CONCURRENT_MODE
+			break;
+		case HW_VAR_CHECK_BSSID:
+			if(*((u8 *)val))
+			{
+				rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
+			}
+			else
+			{
+				u32	val32;
+
+				val32 = rtw_read32(Adapter, REG_RCR);
+
+				val32 &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);
+
+				rtw_write32(Adapter, REG_RCR, val32);
+			}
+			break;
+		case HW_VAR_MLME_DISCONNECT:
+#ifdef CONFIG_CONCURRENT_MODE
+			hw_var_set_mlme_disconnect(Adapter, variable, val);
+#else //CONFIG_CONCURRENT_MODE
+			{
+				//Set RCR to not to receive data frame when NO LINK state
+				//rtw_write32(Adapter, REG_RCR, rtw_read32(padapter, REG_RCR) & ~RCR_ADF);
+				rtw_write16(Adapter, REG_RXFLTMAP2,0x00);
+
+				//reset TSF
+				rtw_write8(Adapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1)));
+
+				//disable update TSF
+				rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4));
+			}
+#endif //CONFIG_CONCURRENT_MODE
+			break;
+		case HW_VAR_MLME_SITESURVEY:
+#ifdef CONFIG_CONCURRENT_MODE
+			hw_var_set_mlme_sitesurvey(Adapter, variable,  val);
+#else //CONFIG_CONCURRENT_MODE
+			if(*((u8 *)val))//under sitesurvey
+			{
+				pHalData->bLoadIMRandIQKSettingFor2G = _FALSE;			
+				{
+					u32 v = rtw_read32(Adapter, REG_RCR);
+					v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN );//| RCR_ADF
+					rtw_write32(Adapter, REG_RCR, v);
+#ifdef CONFIG_FIND_BEST_CHANNEL
+					// Recieve all data frames
+					rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF);
+#else /* CONFIG_FIND_BEST_CHANNEL */
+					//config RCR to receive different BSSID & not to receive data frame
+					rtw_write16(Adapter, REG_RXFLTMAP2,0x00);
+#endif /* CONFIG_FIND_BEST_CHANNEL */
+					//disable update TSF
+					rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4));
+				}
+
+				// Save orignal RRSR setting.
+				pHalData->RegRRSR = rtw_read16(Adapter, REG_RRSR);
+			}
+			else//sitesurvey done
+			{
+				struct mlme_ext_priv	*pmlmeext = &Adapter->mlmeextpriv;
+				struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+				if ((is_client_associated_to_ap(Adapter) == _TRUE) ||
+					((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) )
+				{
+					//enable to rx data frame
+					//rtw_write32(Adapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF);
+					rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF);
+
+					//enable update TSF
+					rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
+				}
+				else if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)
+				{
+					//rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_ADF);
+					rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF);
+					//enable update TSF
+					rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
+				}
+
+				if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)
+					rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN);
+				else
+					rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
+
+				// Restore orignal RRSR setting.
+				rtw_write16(Adapter, REG_RRSR, pHalData->RegRRSR);
+			}
+#ifdef CONFIG_DUALMAC_CONCURRENT
+			dc_hw_var_mlme_sitesurvey(Adapter, *((u8 *)val));
+#endif //CONFIG_DUALMAC_CONCURRENT
+
+#endif //CONFIG_CONCURRENT_MODE
+			break;
+		case HW_VAR_MLME_JOIN:
+#ifdef CONFIG_CONCURRENT_MODE
+			hw_var_set_mlme_join(Adapter, variable,  val);
+#else //CONFIG_CONCURRENT_MODE
+			{
+				u8	RetryLimit = 0x30;
+				u8	type = *((u8 *)val);
+				struct mlme_priv	*pmlmepriv = &Adapter->mlmepriv;
+#ifdef CONFIG_DUALMAC_CONCURRENT
+				PADAPTER	BuddyAdapter = Adapter->pbuddy_adapter;
+#endif
+
+				if(type == 0) // prepare to join
+				{
+					//enable to rx data frame.Accept all data frame
+					//rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF);
+					rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF);
+
+					rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
+
+					if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
+					{
+						RetryLimit = (pHalData->CustomerID == RT_CID_CCX) ? 7 : 48;
+					}
+					else // Ad-hoc Mode
+					{
+						RetryLimit = 0x7;
+					}
+
+					DBG_8192C("%s(): pHalData->bNeedIQK = _TRUE, pHalData->IQKRdyForXmit = 0\n",__FUNCTION__);
+					pHalData->bNeedIQK = _TRUE; //for 92D IQK
+					ATOMIC_SET(&pHalData->IQKRdyForXmit, 0);
+#ifdef CONFIG_DUALMAC_CONCURRENT
+					if((BuddyAdapter !=NULL) && (pHalData->bSlaveOfDMSP))
+					{
+						GET_HAL_DATA(BuddyAdapter)->bNeedIQK = _TRUE; //for 92D IQK
+					}
+#endif
+				}
+				else if(type == 1) //joinbss_event call back when join res < 0
+				{
+					//config RCR to receive different BSSID & not to receive data frame during linking				
+					//u32 v = rtw_read32(Adapter, REG_RCR);
+					//v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN );//| RCR_ADF
+					//rtw_write32(Adapter, REG_RCR, v);
+				
+					rtw_write16(Adapter, REG_RXFLTMAP2,0x00);
+				}
+				else if(type == 2) //sta add event call back
+				{
+					//enable update TSF
+					rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
+
+					if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE))
+					{
+						//fixed beacon issue for 8191su...........
+						//rtw_write8(Adapter,0x542 ,0x02);
+						RetryLimit = 0x7;
+					}
+				}
+
+				rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT);
+#ifdef CONFIG_DUALMAC_CONCURRENT
+				dc_hw_var_mlme_join(Adapter, *((u8 *)val));
+#endif //CONFIG_DUALMAC_CONCURRENT
+			}
+#endif //CONFIG_CONCURRENT_MODE
+			break;
+		case HW_VAR_BEACON_INTERVAL:
+			rtw_write16(Adapter, REG_BCN_INTERVAL, *((u16 *)val));
+			break;
+		case HW_VAR_SLOT_TIME:
+			{
+				u8	u1bAIFS, aSifsTime;
+				struct mlme_ext_priv	*pmlmeext = &Adapter->mlmeextpriv;
+				struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+				DBG_8192C("Set HW_VAR_SLOT_TIME: SlotTime(%#x)\n", val[0]);
+				rtw_write8(Adapter, REG_SLOT, val[0]);
+
+				if(pmlmeinfo->WMM_enable == 0)
+				{
+					if(pmlmeext->cur_wireless_mode == WIRELESS_11B)
+						aSifsTime = 10;
+					else
+						aSifsTime = 16;
+					
+					u1bAIFS = aSifsTime + (2 * pmlmeinfo->slotTime);
+					
+					// <Roger_EXP> Temporary removed, 2008.06.20.
+					rtw_write8(Adapter, REG_EDCA_VO_PARAM, u1bAIFS);
+					rtw_write8(Adapter, REG_EDCA_VI_PARAM, u1bAIFS);
+					rtw_write8(Adapter, REG_EDCA_BE_PARAM, u1bAIFS);
+					rtw_write8(Adapter, REG_EDCA_BK_PARAM, u1bAIFS);
+				}
+			}
+			break;
+		case HW_VAR_ACK_PREAMBLE:
+			{
+				u8	regTmp;
+				u8	bShortPreamble = *( (PBOOLEAN)val );
+				// Joseph marked out for Netgear 3500 TKIP channel 7 issue.(Temporarily)
+				regTmp = (pHalData->nCur40MhzPrimeSC)<<5;
+				//regTmp = 0;
+				if(bShortPreamble)
+					regTmp |= 0x80;
+
+				rtw_write8(Adapter, REG_RRSR+2, regTmp);
+			}
+			break;
+		case HW_VAR_SEC_CFG:
+#ifdef CONFIG_CONCURRENT_MODE			
+			rtw_write8(Adapter, REG_SECCFG, 0x0c |BIT(5));//only enable tx enc and rx dec engine.
+#else //CONFIG_CONCURRENT_MODE
+			rtw_write8(Adapter, REG_SECCFG, *((u8 *)val));
+#endif //CONFIG_CONCURRENT_MODE
+			break;
+		case HW_VAR_DM_FLAG:
+			pdmpriv->DMFlag = *((u8 *)val);
+			break;
+		case HW_VAR_DM_FUNC_OP:
+			if(val[0])
+			{// save dm flag
+				pdmpriv->DMFlag_tmp = pdmpriv->DMFlag;
+			}
+			else
+			{// restore dm flag
+				pdmpriv->DMFlag = pdmpriv->DMFlag_tmp;
+			}
+			break;
+		case HW_VAR_DM_FUNC_SET:
+			pdmpriv->DMFlag |= *((u8 *)val);
+			break;
+		case HW_VAR_DM_FUNC_CLR:
+			pdmpriv->DMFlag &= *((u8 *)val);
+			break;
+		case HW_VAR_CAM_EMPTY_ENTRY:
+			{
+				u8	ucIndex = *((u8 *)val);
+				u8	i;
+				u32	ulCommand=0;
+				u32	ulContent=0;
+				u32	ulEncAlgo=CAM_AES;
+
+				for(i=0;i<CAM_CONTENT_COUNT;i++)
+				{
+					// filled id in CAM config 2 byte
+					if( i == 0)
+					{
+						ulContent |=(ucIndex & 0x03) | ((u16)(ulEncAlgo)<<2);
+						//ulContent |= CAM_VALID;
+					}
+					else
+					{
+						ulContent = 0;
+					}
+					// polling bit, and No Write enable, and address
+					ulCommand= CAM_CONTENT_COUNT*ucIndex+i;
+					ulCommand= ulCommand | CAM_POLLINIG|CAM_WRITE;
+					// write content 0 is equall to mark invalid
+					rtw_write32(Adapter, WCAMI, ulContent);  //delay_ms(40);
+					//RT_TRACE(COMP_SEC, DBG_LOUD, ("CAM_empty_entry(): WRITE A4: %lx \n",ulContent));
+					rtw_write32(Adapter, RWCAM, ulCommand);  //delay_ms(40);
+					//RT_TRACE(COMP_SEC, DBG_LOUD, ("CAM_empty_entry(): WRITE A0: %lx \n",ulCommand));
+				}
+			}
+			break;
+		case HW_VAR_CAM_INVALID_ALL:
+			rtw_write32(Adapter, RWCAM, BIT(31)|BIT(30));
+			break;
+		case HW_VAR_CAM_WRITE:
+			{
+				u32	cmd;
+				u32	*cam_val = (u32 *)val;
+				rtw_write32(Adapter, WCAMI, cam_val[0]);
+				
+				cmd = CAM_POLLINIG | CAM_WRITE | cam_val[1];
+				rtw_write32(Adapter, RWCAM, cmd);
+			}
+			break;
+		case HW_VAR_AC_PARAM_VO:
+			rtw_write32(Adapter, REG_EDCA_VO_PARAM, ((u32 *)(val))[0]);
+			break;
+		case HW_VAR_AC_PARAM_VI:
+			rtw_write32(Adapter, REG_EDCA_VI_PARAM, ((u32 *)(val))[0]);
+			break;
+		case HW_VAR_AC_PARAM_BE:
+			pHalData->AcParam_BE = ((u32 *)(val))[0];
+			rtw_write32(Adapter, REG_EDCA_BE_PARAM, ((u32 *)(val))[0]);
+			break;
+		case HW_VAR_AC_PARAM_BK:
+			rtw_write32(Adapter, REG_EDCA_BK_PARAM, ((u32 *)(val))[0]);
+			break;
+		case HW_VAR_ACM_CTRL:
+			{
+				u8	acm_ctrl = *((u8 *)val);
+				u8	AcmCtrl = rtw_read8( Adapter, REG_ACMHWCTRL);
+
+				if(acm_ctrl > 1)
+					AcmCtrl = AcmCtrl | 0x1;
+
+				if(acm_ctrl & BIT(3))
+					AcmCtrl |= AcmHw_VoqEn;
+				else
+					AcmCtrl &= (~AcmHw_VoqEn);
+
+				if(acm_ctrl & BIT(2))
+					AcmCtrl |= AcmHw_ViqEn;
+				else
+					AcmCtrl &= (~AcmHw_ViqEn);
+
+				if(acm_ctrl & BIT(1))
+					AcmCtrl |= AcmHw_BeqEn;
+				else
+					AcmCtrl &= (~AcmHw_BeqEn);
+
+				DBG_871X("[HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl );
+				rtw_write8(Adapter, REG_ACMHWCTRL, AcmCtrl );
+			}
+			break;
+		case HW_VAR_AMPDU_MIN_SPACE:
+			{
+				u8	MinSpacingToSet;
+				u8	SecMinSpace;
+
+				MinSpacingToSet = *((u8 *)val);
+				if(MinSpacingToSet <= 7)
+				{
+					switch(Adapter->securitypriv.dot11PrivacyAlgrthm)
+					{
+						case _NO_PRIVACY_:
+						case _AES_:
+							SecMinSpace = 0;
+							break;
+
+						case _WEP40_:
+						case _WEP104_:
+						case _TKIP_:
+						case _TKIP_WTMIC_:
+							SecMinSpace = 6;
+							break;
+						default:
+							SecMinSpace = 7;
+							break;
+					}
+
+					if(MinSpacingToSet < SecMinSpace){
+						MinSpacingToSet = SecMinSpace;
+					}
+
+					//RT_TRACE(COMP_MLME, DBG_LOUD, ("Set HW_VAR_AMPDU_MIN_SPACE: %#x\n", Adapter->MgntInfo.MinSpaceCfg));
+					rtw_write8(Adapter, REG_AMPDU_MIN_SPACE, (rtw_read8(Adapter, REG_AMPDU_MIN_SPACE) & 0xf8) | MinSpacingToSet);
+				}
+			}
+			break;
+		case HW_VAR_AMPDU_FACTOR:
+			{
+				u8	FactorToSet;
+				u32	RegToSet;
+				u8	*pTmpByte = NULL;
+				u8	index = 0;
+
+				RegToSet = 0xb972a841;
+				if(pHalData->MacPhyMode92D==SINGLEMAC_SINGLEPHY){
+					RegToSet = 0x88728841;
+				}
+				else if(pHalData->MacPhyMode92D==DUALMAC_DUALPHY){
+					RegToSet = 0x66525541;
+				}
+				else if(pHalData->MacPhyMode92D==DUALMAC_SINGLEPHY){
+					RegToSet = 0x44444441;
+				}
+
+				FactorToSet = *((u8 *)val);
+				if(FactorToSet <= 3)
+				{
+					FactorToSet = (1<<(FactorToSet + 2));
+					if(FactorToSet>0xf)
+						FactorToSet = 0xf;
+
+					for(index=0; index<4; index++)
+					{
+						pTmpByte = (u8 *)(&RegToSet) + index;
+
+						if((*pTmpByte & 0xf0) > (FactorToSet<<4))
+							*pTmpByte = (*pTmpByte & 0x0f) | (FactorToSet<<4);
+					
+						if((*pTmpByte & 0x0f) > FactorToSet)
+							*pTmpByte = (*pTmpByte & 0xf0) | (FactorToSet);
+					}
+
+					rtw_write32(Adapter, REG_AGGLEN_LMT, RegToSet);
+					//RT_TRACE(COMP_MLME, DBG_LOUD, ("Set HW_VAR_AMPDU_FACTOR: %#x\n", FactorToSet));
+				}
+			}
+			break;
+		case HW_VAR_RXDMA_AGG_PG_TH:
+			#ifdef CONFIG_USB_RX_AGGREGATION
+			{
+				u8	threshold = *((u8 *)val);
+				if( threshold == 0)
+				{
+					threshold = pHalData->UsbRxAggPageCount;
+				}
+				rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold);
+			}
+			#endif
+			break;
+		case HW_VAR_SET_RPWM:
+			{
+				u8	RpwmVal = (*(u8 *)val);
+				RpwmVal = RpwmVal & 0xf;
+
+				/*if(pHalData->PreRpwmVal & BIT7) //bit7: 1
+				{
+					PlatformEFIOWrite1Byte(Adapter, REG_USB_HRPWM, (*(pu1Byte)val));
+					pHalData->PreRpwmVal = (*(pu1Byte)val);
+				}
+				else //bit7: 0
+				{
+					PlatformEFIOWrite1Byte(Adapter, REG_USB_HRPWM, ((*(pu1Byte)val)|BIT7));
+					pHalData->PreRpwmVal = ((*(pu1Byte)val)|BIT7);
+				}*/
+				FillH2CCmd92D(Adapter, H2C_PWRM, 1, (u8 *)(&RpwmVal));
+			}
+			break;
+		case HW_VAR_H2C_FW_PWRMODE:
+			rtl8192d_set_FwPwrMode_cmd(Adapter, (*(u8 *)val));
+			break;
+		case HW_VAR_H2C_FW_JOINBSSRPT:
+			rtl8192d_set_FwJoinBssReport_cmd(Adapter, (*(u8 *)val));
+			break;
+#ifdef CONFIG_P2P
+		case HW_VAR_H2C_FW_P2P_PS_OFFLOAD:
+			{
+				u8	p2p_ps_state = (*(u8 *)val);
+				rtl8192d_set_p2p_ps_offload_cmd(Adapter, p2p_ps_state);
+			}
+			break;
+#endif //CONFIG_P2P
+		case HW_VAR_INITIAL_GAIN:
+			{				
+				DIG_T	*pDigTable = &pdmpriv->DM_DigTable;					
+				u32 		rx_gain = ((u32 *)(val))[0];
+				
+				if(rx_gain == 0xff){//restore rx gain
+					pDigTable->CurIGValue = pDigTable->BackupIGValue;
+					rtw_write8(Adapter,rOFDM0_XAAGCCore1, pDigTable->CurIGValue);
+					rtw_write8(Adapter,rOFDM0_XBAGCCore1, pDigTable->CurIGValue);
+				}
+				else{
+					pDigTable->BackupIGValue = pDigTable->CurIGValue;					
+					PHY_SetBBReg(Adapter, rOFDM0_XAAGCCore1, 0x7f,rx_gain );
+					PHY_SetBBReg(Adapter, rOFDM0_XBAGCCore1, 0x7f,rx_gain);
+					pDigTable->CurIGValue = rx_gain;
+				}
+			}
+			break;
+		case HW_VAR_TRIGGER_GPIO_0:
+			rtl8192du_trigger_gpio_0(Adapter);
+			break;
+		case HW_VAR_EFUSE_BYTES: // To set EFUE total used bytes, added by Roger, 2008.12.22.
+			pHalData->EfuseUsedBytes = *((u16 *)val);			
+			break;
+		case HW_VAR_FIFO_CLEARN_UP:
+			{
+				#define RW_RELEASE_EN		BIT18
+				#define RXDMA_IDLE			BIT17
+				
+				struct pwrctrl_priv *pwrpriv = &Adapter->pwrctrlpriv;
+				u8 trycnt = 100;	
+				
+				//pause tx
+				rtw_write8(Adapter,REG_TXPAUSE,0xff);
+			
+				//keep sn
+				Adapter->xmitpriv.nqos_ssn = rtw_read16(Adapter,REG_NQOS_SEQ);
+
+				if(pwrpriv->bkeepfwalive != _TRUE)
+				{
+					//RX DMA stop
+					rtw_write32(Adapter,REG_RXPKT_NUM,(rtw_read32(Adapter,REG_RXPKT_NUM)|RW_RELEASE_EN));
+					do{
+						if(!(rtw_read32(Adapter,REG_RXPKT_NUM)&RXDMA_IDLE))
+							break;
+					}while(trycnt--);
+					if(trycnt ==0)
+						DBG_8192C("Stop RX DMA failed...... \n");
+
+					//RQPN Load 0
+					rtw_write16(Adapter,REG_RQPN_NPQ,0x0);
+					rtw_write32(Adapter,REG_RQPN,0x80000000);
+					rtw_mdelay_os(10);
+				}
+	
+			}
+			break;
+		case HW_VAR_CHECK_TXBUF:
+#if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_DUALMAC_CONCURRENT)
+			{
+				int i;
+				u8	RetryLimit = 0x01;
+				
+				//rtw_write16(Adapter, REG_RL,0x0101);
+				rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT);
+		
+				for(i=0;i<1000;i++)
+				{
+					if(rtw_read32(Adapter, 0x200) != rtw_read32(Adapter, 0x204))
+					{
+						//DBG_871X("packet in tx packet buffer - 0x204=%x, 0x200=%x (%d)\n", rtw_read32(Adapter, 0x204), rtw_read32(Adapter, 0x200), i);
+						rtw_msleep_os(10);
+					}
+					else
+					{
+						DBG_871X("no packet in tx packet buffer (%d)\n", i);
+						break;
+					}
+				}
+
+				RetryLimit = 0x30;	
+				rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT);
+		
+			}
+#endif
+			break;
+		default:
+			break;
+	}
+
+_func_exit_;
+}
+
+void GetHwReg8192DU(PADAPTER Adapter, u8 variable, u8* val);
+void GetHwReg8192DU(PADAPTER Adapter, u8 variable, u8* val)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+
+_func_enter_;
+
+	switch(variable)
+	{
+		case HW_VAR_BASIC_RATE:
+			*((u16 *)(val)) = pHalData->BasicRateSet;
+			break;
+		case HW_VAR_TXPAUSE:
+			val[0] = rtw_read8(Adapter, REG_TXPAUSE);
+			break;
+		case HW_VAR_TX_BCN_DONE:
+			{
+				u32 xmitbcnDown;
+				xmitbcnDown= rtw_read32(Adapter, REG_TDECTRL);
+				if(xmitbcnDown & BCN_VALID  ){
+					rtw_write32(Adapter,REG_TDECTRL, xmitbcnDown | BCN_VALID  ); // write 1 to clear, Clear by sw
+					val[0] = _TRUE;
+				}
+			}
+			break;
+		case HW_VAR_DM_FLAG:
+			val[0] = pHalData->dmpriv.DMFlag;
+			break;
+		case HW_VAR_RF_TYPE:
+			val[0] = pHalData->rf_type;
+			break;
+		case HW_VAR_FWLPS_RF_ON:
+			{
+				//When we halt NIC, we should check if FW LPS is leave.
+				u32	valRCR;
+				
+				if(Adapter->pwrctrlpriv.rf_pwrstate == rf_off)
+				{
+					// If it is in HW/SW Radio OFF or IPS state, we do not check Fw LPS Leave,
+					// because Fw is unload.
+					val[0] = _TRUE;
+				}
+				else
+				{
+					valRCR = rtw_read32(Adapter, REG_RCR);
+					valRCR &= 0x00070000;
+					if(valRCR)
+						val[0] = _FALSE;
+					else
+						val[0] = _TRUE;
+				}
+			}
+			break;
+		case HW_VAR_EFUSE_BYTES: // To get EFUE total used bytes, added by Roger, 2008.12.22.
+			*((u16 *)(val)) = pHalData->EfuseUsedBytes;	
+			break;
+		default:
+			break;
+	}
+
+_func_exit_;
+}
+
+//
+//	Description: 
+//		Query setting of specified variable.
+//
+u8
+GetHalDefVar8192DUsb(
+	IN	PADAPTER				Adapter,
+	IN	HAL_DEF_VARIABLE		eVariable,
+	IN	PVOID					pValue
+	);
+u8
+GetHalDefVar8192DUsb(
+	IN	PADAPTER				Adapter,
+	IN	HAL_DEF_VARIABLE		eVariable,
+	IN	PVOID					pValue
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8			bResult = _TRUE;
+
+	switch(eVariable)
+	{
+		case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
+			*((int *)pValue) = pHalData->dmpriv.UndecoratedSmoothedPWDB;
+			break;
+		case HAL_DEF_DRVINFO_SZ:
+			*(( u32*)pValue) = DRVINFO_SZ;
+			break;
+		case HAL_DEF_MAX_RECVBUF_SZ:
+			*(( u32*)pValue) = MAX_RECVBUF_SZ;
+			break;
+		case HAL_DEF_RX_PACKET_OFFSET:
+			*(( u32*)pValue) = RXDESC_SIZE + DRVINFO_SZ;
+			break;
+		default:
+			//RT_TRACE(COMP_INIT, DBG_WARNING, ("GetHalDefVar8192CUsb(): Unkown variable: %d!\n", eVariable));
+			bResult = _FALSE;
+			break;
+	}
+
+	return bResult;
+}
+
+
+//
+//	Description:
+//		Change default setting of specified variable.
+//
+u8
+SetHalDefVar8192DUsb(
+	IN	PADAPTER				Adapter,
+	IN	HAL_DEF_VARIABLE		eVariable,
+	IN	PVOID					pValue
+	);
+u8
+SetHalDefVar8192DUsb(
+	IN	PADAPTER				Adapter,
+	IN	HAL_DEF_VARIABLE		eVariable,
+	IN	PVOID					pValue
+	)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8			bResult = _TRUE;
+
+	switch(eVariable)
+	{
+		case HAL_DEF_DBG_DM_FUNC:
+			{
+				u8 dm_func = *(( u8*)pValue);
+				struct dm_priv	*pdmpriv = &pHalData->dmpriv;	
+				
+				if(dm_func == 0){ //disable all dynamic func
+					pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE;
+					DBG_8192C("==> Disable all dynamic function...\n");
+				}
+				else if(dm_func == 1){//disable DIG
+					pdmpriv->DMFlag &= (~DYNAMIC_FUNC_DIG);
+					DBG_8192C("==> Disable DIG...\n");
+				}
+				else if(dm_func == 2){//disable High power
+					pdmpriv->DMFlag &= (~DYNAMIC_FUNC_HP);
+				}
+				else if(dm_func == 3){//disable tx power tracking
+					pdmpriv->DMFlag &= (~DYNAMIC_FUNC_SS);
+					DBG_8192C("==> Disable tx power tracking...\n");
+				}
+				else if(dm_func == 4){//disable BT coexistence
+					pdmpriv->DMFlag &= (~DYNAMIC_FUNC_BT);
+				}
+				else if(dm_func == 5){//disable antenna diversity
+					pdmpriv->DMFlag &= (~DYNAMIC_FUNC_ANT_DIV);
+				}				
+				else if(dm_func == 6){//turn on all dynamic func
+					if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_DIG))
+					{
+						struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+						DIG_T	*pDigTable = &pdmpriv->DM_DigTable;
+						pDigTable->PreIGValue = rtw_read8(Adapter,0xc50);	
+					}
+						
+					pdmpriv->DMFlag |= (DYNAMIC_FUNC_DIG|DYNAMIC_FUNC_HP|DYNAMIC_FUNC_SS|
+						DYNAMIC_FUNC_BT|DYNAMIC_FUNC_ANT_DIV) ;
+					DBG_8192C("==> Turn on all dynamic function...\n");
+				}			
+			}
+			break;
+		default:
+			//RT_TRACE(COMP_INIT, DBG_TRACE, ("SetHalDefVar819xUsb(): Unkown variable: %d!\n", eVariable));
+			bResult = _FALSE;
+			break;
+	}
+
+	return bResult;
+}
+
+u32  _update_92cu_basic_rate(_adapter *padapter, unsigned int mask);
+u32  _update_92cu_basic_rate(_adapter *padapter, unsigned int mask)
+{
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
+#ifdef CONFIG_BT_COEXIST
+	struct btcoexist_priv	*pbtpriv = &(pHalData->bt_coexist);
+#endif
+	unsigned int BrateCfg = 0;
+
+#ifdef CONFIG_BT_COEXIST
+	if(	(pbtpriv->BT_Coexist) &&	(pbtpriv->BT_CoexistType == BT_CSR_BC4)	)
+	{
+		BrateCfg = mask  & 0x151;
+		//DBG_8192C("BT temp disable cck 2/5.5/11M, (0x%x = 0x%x)\n", REG_RRSR, BrateCfg & 0x151);
+	}
+	else
+#endif
+	{
+		if(pHalData->VersionID != VERSION_TEST_CHIP_88C)
+			BrateCfg = mask  & 0x15F;
+		else	//for 88CU 46PING setting, Disable CCK 2M, 5.5M, Others must tuning
+			BrateCfg = mask  & 0x159;
+	}
+
+	BrateCfg |= 0x01; // default enable 1M ACK rate					
+
+	return BrateCfg;
+}
+
+void _update_response_rate(_adapter *padapter,unsigned int mask);
+void _update_response_rate(_adapter *padapter,unsigned int mask)
+{
+	u8	RateIndex = 0;
+	// Set RRSR rate table.
+	rtw_write8(padapter, REG_RRSR, mask&0xff);
+	rtw_write8(padapter,REG_RRSR+1, (mask>>8)&0xff);
+
+	// Set RTS initial rate
+	while(mask > 0x1)
+	{
+		mask = (mask>> 1);
+		RateIndex++;
+	}
+	rtw_write8(padapter, REG_INIRTS_RATE_SEL, RateIndex);
+}
+
+void UpdateHalRAMask8192DUsb(PADAPTER padapter, u32 mac_id);
+void UpdateHalRAMask8192DUsb(PADAPTER padapter, u32 mac_id)
+{
+	u32	value[2];
+	u8	init_rate=0;
+	u8	networkType, raid;	
+	u32	mask;
+	u8	shortGIrate = _FALSE;
+	int	supportRateNum = 0;
+	struct sta_info	*psta;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX 		*cur_network = &(pmlmeinfo->network);
+#ifdef CONFIG_BT_COEXIST
+	struct btcoexist_priv	*pbtpriv = &(pHalData->bt_coexist);
+#endif
+
+	if (mac_id >= NUM_STA)
+	{
+		return;
+	}
+
+	psta = pmlmeinfo->FW_sta_info[mac_id].psta;
+	if(psta == NULL)
+	{
+		return;
+	}
+
+	switch (mac_id)
+	{
+		case 0:// for infra mode
+			supportRateNum = rtw_get_rateset_len(cur_network->SupportedRates);
+			networkType = judge_network_type(padapter, cur_network->SupportedRates, supportRateNum);
+			//pmlmeext->cur_wireless_mode = networkType;
+			raid = networktype_to_raid(networkType);
+						
+			mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
+			mask |= (pmlmeinfo->HT_enable)? update_MSC_rate(&(pmlmeinfo->HT_caps)): 0;
+			
+			mask |= ((raid<<28)&0xf0000000);
+			
+			if (support_short_GI(padapter, &(pmlmeinfo->HT_caps)))
+			{
+				shortGIrate = _TRUE;
+			}
+
+			break;
+
+		case 1://for broadcast/multicast
+			supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
+			if(pmlmeext->cur_wireless_mode & WIRELESS_11B)
+				networkType = WIRELESS_11B;
+			else
+				networkType = WIRELESS_11G;
+			raid = networktype_to_raid(networkType);
+
+			mask = update_basic_rate(cur_network->SupportedRates, supportRateNum);
+			mask |= ((raid<<28)&0xf0000000);
+
+			break;
+
+		default: //for each sta in IBSS
+			supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
+			networkType = judge_network_type(padapter, pmlmeinfo->FW_sta_info[mac_id].SupportedRates, supportRateNum);
+			//pmlmeext->cur_wireless_mode = networkType;
+			raid = networktype_to_raid(networkType);
+			
+			mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
+			mask |= ((raid<<28)&0xf0000000);
+
+			//todo: support HT in IBSS
+			
+			break;
+	}
+	
+#ifdef CONFIG_BT_COEXIST
+	if( (pbtpriv->BT_Coexist) &&
+		(pbtpriv->BT_CoexistType == BT_CSR_BC4) &&
+		(pbtpriv->BT_CUR_State) &&
+		(pbtpriv->BT_Ant_isolation) &&
+		((pbtpriv->BT_Service==BT_SCO)||
+		(pbtpriv->BT_Service==BT_Busy)) )
+		mask &= 0xffffcfc0;
+	else		
+#endif
+		mask &=0xffffffff;
+	
+	
+	init_rate = get_highest_rate_idx(mask)&0x3f;
+
+	if(pHalData->fw_ractrl == _TRUE)
+	{
+		value[0] = mask;
+		value[1] = mac_id | (shortGIrate?0x20:0x00) |BIT(7);
+
+		DBG_871X("update raid entry, mask=0x%x, arg=0x%x\n", value[0], value[1]);
+
+		FillH2CCmd92D(padapter, H2C_RA_MASK, 5, (u8 *)(&value));
+	}
+	else
+	{
+		if (shortGIrate==_TRUE)
+			init_rate |= BIT(6);
+
+		rtw_write8(padapter, (REG_INIDATA_RATE_SEL+mac_id), init_rate);		
+	}
+
+
+	//set ra_id
+	psta->raid = raid;
+	psta->init_rate = init_rate;
+
+	//set correct initial date rate for each mac_id
+	pdmpriv->INIDATA_RATE[mac_id] = init_rate;
+}
+
+void SetBeaconRelatedRegisters8192DUsb(PADAPTER padapter);
+void SetBeaconRelatedRegisters8192DUsb(PADAPTER padapter)
+{
+	u32	value32;
+//	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+
+	rtw_write8(padapter, REG_ATIMWND, 0x02);
+
+	rtw_write16(padapter, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval);
+
+	_InitBeaconParameters(padapter);
+
+	rtw_write8(padapter, REG_SLOT, 0x09);
+
+	//
+	// Reset TSF Timer to zero, added by Roger. 2008.06.24
+	//
+	//pHalData->TransmitConfig &= (~TSFRST);
+	value32 = rtw_read32(padapter, REG_TCR); 
+	value32 &= ~TSFRST;
+	rtw_write32(padapter, REG_TCR, value32); 
+
+	value32 |= TSFRST;
+	rtw_write32(padapter, REG_TCR, value32);
+
+	// NOTE: Fix test chip's bug (about contention windows's randomness)
+	rtw_write8(padapter,  REG_RXTSF_OFFSET_CCK, 0x50);
+	rtw_write8(padapter, REG_RXTSF_OFFSET_OFDM, 0x50);
+
+	_BeaconFunctionEnable(padapter, _TRUE, _TRUE);
+
+	ResumeTxBeacon(padapter);
+
+	//rtw_write8(padapter, 0x422, rtw_read8(padapter, 0x422)|BIT(6));
+	
+	//rtw_write8(padapter, 0x541, 0xff);
+
+	//rtw_write8(padapter, 0x542, rtw_read8(padapter, 0x541)|BIT(0));
+
+	rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(1));
+
+}
+
+static void rtl8192du_init_default_value(_adapter * padapter)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv;
+	struct dm_priv	*pdmpriv = &pHalData->dmpriv;
+
+	pHalData->CurrentWirelessMode = WIRELESS_MODE_AUTO;
+
+	//init default value
+	pHalData->fw_ractrl = _FALSE;
+	if(!pwrctrlpriv->bkeepfwalive)
+		pHalData->LastHMEBoxNum = 0;
+
+	pHalData->bEarlyModeEnable = 0;
+	pHalData->pwrGroupCnt = 0;
+
+	//init dm default value
+	pdmpriv->TM_Trigger = 0;
+	//pdmpriv->binitialized = _FALSE;
+	pdmpriv->prv_traffic_idx = 3;
+
+	rtl8192d_PHY_ResetIQKResult(padapter);
+
+}
+
+
+void rtl8192du_set_hal_ops(_adapter * padapter)
+{
+	struct hal_ops	*pHalFunc = &padapter->HalFunc;
+
+_func_enter_;
+
+	padapter->HalData = rtw_zmalloc(sizeof(HAL_DATA_TYPE));
+	if(padapter->HalData == NULL){
+		DBG_8192C("cant not alloc memory for HAL DATA \n");
+	}
+	//_rtw_memset(padapter->HalData, 0, sizeof(HAL_DATA_TYPE));
+	padapter->hal_data_sz = sizeof(HAL_DATA_TYPE);
+
+	ATOMIC_SET(&(GET_HAL_DATA(padapter)->IQKRdyForXmit), 1);
+
+	pHalFunc->hal_init = &rtl8192du_hal_init;
+	pHalFunc->hal_deinit = &rtl8192du_hal_deinit;
+
+	//pHalFunc->free_hal_data = &rtl8192d_free_hal_data;
+
+	pHalFunc->inirp_init = &rtl8192du_inirp_init;
+	pHalFunc->inirp_deinit = &rtl8192du_inirp_deinit;
+
+	pHalFunc->init_xmit_priv = &rtl8192du_init_xmit_priv;
+	pHalFunc->free_xmit_priv = &rtl8192du_free_xmit_priv;
+
+	pHalFunc->init_recv_priv = &rtl8192du_init_recv_priv;
+	pHalFunc->free_recv_priv = &rtl8192du_free_recv_priv;
+#ifdef CONFIG_SW_LED
+	pHalFunc->InitSwLeds = &rtl8192du_InitSwLeds;
+	pHalFunc->DeInitSwLeds = &rtl8192du_DeInitSwLeds;
+#else // case of hw led or no led
+	pHalFunc->InitSwLeds = NULL;
+	pHalFunc->DeInitSwLeds = NULL;	
+#endif //CONFIG_SW_LED
+	//pHalFunc->dm_init = &rtl8192d_init_dm_priv;
+	//pHalFunc->dm_deinit = &rtl8192d_deinit_dm_priv;
+
+	pHalFunc->init_default_value = &rtl8192du_init_default_value;
+	pHalFunc->intf_chip_configure = &rtl8192du_interface_configure;
+	pHalFunc->read_adapter_info = &ReadAdapterInfo8192DU;
+
+	//pHalFunc->set_bwmode_handler = &PHY_SetBWMode8192D;
+	//pHalFunc->set_channel_handler = &PHY_SwChnl8192D;
+
+	pHalFunc->hal_dm_watchdog = &rtl8192d_HalDmWatchDog;
+
+	pHalFunc->SetHwRegHandler = &SetHwReg8192DU;
+	pHalFunc->GetHwRegHandler = &GetHwReg8192DU;
+  	pHalFunc->GetHalDefVarHandler = &GetHalDefVar8192DUsb;
+ 	pHalFunc->SetHalDefVarHandler = &SetHalDefVar8192DUsb;
+
+	pHalFunc->UpdateRAMaskHandler = &UpdateHalRAMask8192DUsb;
+	pHalFunc->SetBeaconRelatedRegistersHandler = &SetBeaconRelatedRegisters8192DUsb;
+
+	pHalFunc->hal_xmit = &rtl8192du_hal_xmit;
+	pHalFunc->mgnt_xmit = &rtl8192du_mgnt_xmit;
+
+	//pHalFunc->read_bbreg = &rtl8192d_PHY_QueryBBReg;
+	//pHalFunc->write_bbreg = &rtl8192d_PHY_SetBBReg;
+	//pHalFunc->read_rfreg = &rtl8192d_PHY_QueryRFReg;
+	//pHalFunc->write_rfreg = &rtl8192d_PHY_SetRFReg;
+
+#ifdef CONFIG_HOSTAPD_MLME
+	pHalFunc->hostap_mgnt_xmit_entry = &rtl8192du_hostap_mgnt_xmit_entry;
+#endif
+
+	rtl8192d_set_hal_ops(pHalFunc);
+
+_func_exit_;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/usb_ops_linux.c linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/usb_ops_linux.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/usb_ops_linux.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/hal/rtl8192d/usb/usb_ops_linux.c	2017-09-23 03:42:49.990675150 +0800
@@ -0,0 +1,2224 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _HCI_OPS_OS_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <osdep_intf.h>
+#include <usb_ops.h>
+#include <circ_buf.h>
+#include <recv_osdep.h>
+#include <rtl8192d_hal.h>
+
+#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
+
+#error "Shall be Linux or Windows, but not both!\n"
+
+#endif
+
+struct zero_bulkout_context{
+	void *pbuf;
+	void *purb;
+	void *pirp;
+	void *padapter;
+};
+
+#define REALTEK_USB_VENQT_MAX_BUF_SIZE	254
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12))
+#define USB_CONTROL_MSG_TIMEOUT	500		//ms
+#else
+#define USB_CONTROL_MSG_TIMEOUT	HZ/2	//jiffies
+#endif
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)) || (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18))
+#define _usbctrl_vendorreq_async_callback(urb, regs)	_usbctrl_vendorreq_async_callback(urb)
+#define usb_bulkout_zero_complete(purb, regs)	usb_bulkout_zero_complete(purb)
+#define usb_write_mem_complete(purb, regs)	usb_write_mem_complete(purb)
+#define usb_write_port_complete(purb, regs)	usb_write_port_complete(purb)
+#define usb_read_port_complete(purb, regs)	usb_read_port_complete(purb)
+#define usb_read_interrupt_complete(purb, regs)	usb_read_interrupt_complete(purb)
+#endif
+
+#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC
+static int usbctrl_vendorreq(struct dvobj_priv  *pdvobjpriv, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype)
+{
+	unsigned int pipe;
+	int status = 0;
+	u32 tmp_buflen=0;
+	u8 reqtype;
+	u8 *pIo_buf;
+	_adapter		*padapter = pdvobjpriv->padapter ; 
+	struct usb_device *udev=pdvobjpriv->pusbdev;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pdvobjpriv->padapter);
+	
+	#ifdef CONFIG_CONCURRENT_MODE
+	if(padapter->adapter_type > PRIMARY_ADAPTER)
+	{
+		padapter = padapter->pbuddy_adapter;
+		pdvobjpriv = &padapter->dvobjpriv;
+		udev = pdvobjpriv->pusbdev;
+		pHalData = GET_HAL_DATA(pdvobjpriv->padapter);
+	}
+	#endif
+	
+	if( (padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx))
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usbctrl_vendorreq:(padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n"));
+		status = -EPERM;
+		goto exit;
+	}	
+
+	if(len>MAX_VENDOR_REQ_CMD_SIZE)
+	{
+		DBG_8192C( "[%s] Buffer len error ,vendor request failed\n", __FUNCTION__ );
+		status = -EINVAL;
+		goto exit;
+	}	
+
+	if ( pdvobjpriv->usb_vendor_req_buf== NULL)
+	{
+		DBG_8192C( "[%s] usb_vendor_req_buf == NULL \n", __FUNCTION__ );
+		status = -ENOMEM;
+		goto exit;
+	}
+	
+	#ifdef CONFIG_USB_VENDOR_REQ_MUTEX
+	_enter_critical_mutex(&pdvobjpriv->usb_vendor_req_mutex, NULL);
+	#endif
+	
+	pIo_buf = pdvobjpriv->usb_vendor_req_buf;
+	_rtw_memset(pIo_buf, 0, MAX_VENDOR_REQ_CMD_SIZE);
+
+	if (requesttype == 0x01)
+	{
+		pipe = usb_rcvctrlpipe(udev, 0);//read_in
+		reqtype =  REALTEK_USB_VENQT_READ;		
+	} 
+	else 
+	{
+		pipe = usb_sndctrlpipe(udev, 0);//write_out
+		reqtype =  REALTEK_USB_VENQT_WRITE;		
+		_rtw_memcpy( pIo_buf, pdata, len);
+	}		
+	
+	status = usb_control_msg(udev, pipe, request, reqtype, value, index, pIo_buf, len, USB_CONTROL_MSG_TIMEOUT);
+	
+	if (status < 0)
+       {
+       	if(status == (-ESHUTDOWN))
+		{			
+			DBG_8192C("reg 0x%x, usb %s  fail ,status:%d value=0x%x\n", value,(requesttype == 0x01)?"read":"write" , status, *(u32*)pdata);					
+			padapter->bDriverStopped=_TRUE;					
+		}
+		else{
+			DBG_8192C("reg 0x%x, usb %s  fail ,status:%d value=0x%x\n", value,(requesttype == 0x01)?"read":"write" , status, *(u32*)pdata);		
+#ifdef DBG_CONFIG_ERROR_DETECT
+			{
+				_adapter *padapter =  pdvobjpriv->padapter;
+				HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+				pHalData->srestpriv.Wifi_Error_Status = USB_VEN_REQ_CMD_FAIL;
+			}
+#endif
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("reg 0x%x, usb %s  fail ,status:%d value=0x%x\n", value, status, *(u32*)pdata));
+		}
+       }
+	else if ( status > 0 )   // Success this control transfer.
+	{
+               if ( requesttype == 0x01 )
+               {   // For Control read transfer, we have to copy the read data from pIo_buf to pdata.
+                       _rtw_memcpy( pdata, pIo_buf,  status );
+               }
+	}
+
+	#ifdef CONFIG_USB_VENDOR_REQ_MUTEX
+	_exit_critical_mutex(&pdvobjpriv->usb_vendor_req_mutex, NULL);
+	#endif
+
+exit:
+	return status;
+}
+
+#else	// CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC
+static int usbctrl_vendorreq(struct dvobj_priv  *pdvobjpriv, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype)
+{
+	unsigned int	pipe;
+	int	status;
+	u8	reqtype;
+	u32	tmp_buflen=0;
+	_adapter		*padapter = pdvobjpriv->padapter ; 
+
+#ifndef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE
+	u8	tmp_buf[MAX_USB_IO_CTL_SIZE];
+#endif
+
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pdvobjpriv->padapter);
+	struct usb_device	*udev=pdvobjpriv->pusbdev;
+		
+	#ifdef CONFIG_CONCURRENT_MODE
+	if(padapter->adapter_type > PRIMARY_ADAPTER)
+	{
+		padapter = padapter->pbuddy_adapter;
+		pdvobjpriv = &padapter->dvobjpriv;
+		udev = pdvobjpriv->pusbdev;
+		pHalData = GET_HAL_DATA(pdvobjpriv->padapter);
+	}
+	#endif
+	
+	// Added by Albert 2010/02/09
+	// For mstar platform, mstar suggests the address for USB IO should be 16 bytes alignment.
+	// Trying to fix it here.
+
+	u8 *palloc_buf, *pIo_buf;
+	if( (padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx))
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usbctrl_vendorreq:(padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n"));
+		status = -EPERM;
+		goto exit;
+	}
+
+	if(len>MAX_VENDOR_REQ_CMD_SIZE)
+	{
+		DBG_8192C( "[%s] Buffer len error ,vendor request failed\n", __FUNCTION__ );
+		status = -EINVAL;
+		goto exit;
+	}
+
+#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE
+	palloc_buf = rtw_malloc( (u32) len + ALIGNMENT_UNIT);
+	tmp_buflen =  (u32)len + ALIGNMENT_UNIT;
+#else
+	palloc_buf = tmp_buf;
+	tmp_buflen = MAX_USB_IO_CTL_SIZE;
+#endif
+
+	if ( palloc_buf== NULL)
+	{
+		DBG_8192C( "[%s] Can't alloc memory for vendor request\n", __FUNCTION__ );
+		status -ENOMEM;
+		goto exit;
+	}
+
+	_rtw_memset(palloc_buf, 0, tmp_buflen);
+
+	pIo_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(palloc_buf), ALIGNMENT_UNIT);
+
+	if (requesttype == 0x01)
+	{
+		pipe = usb_rcvctrlpipe(udev, 0);//read_in
+		reqtype =  REALTEK_USB_VENQT_READ;		
+	} 
+	else 
+	{
+		pipe = usb_sndctrlpipe(udev, 0);//write_out
+		reqtype =  REALTEK_USB_VENQT_WRITE;		
+		_rtw_memcpy( pIo_buf, pdata, len);
+	}		
+	
+	status = usb_control_msg(udev, pipe, request, reqtype, value, index, pIo_buf, len, USB_CONTROL_MSG_TIMEOUT);
+	
+	if (status < 0)
+       {
+		DBG_8192C("reg 0x%x, usb read/write TimeOut! status:%d value=0x%x\n", value, status, *(u32*)pdata);
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("reg 0x%x, usb_read8 TimeOut! status:0x%x value=0x%x\n", value, status, *(u32*)pdata));
+       }
+	else if ( status > 0 )   // Success this control transfer.
+	{
+               if ( requesttype == 0x01 )
+               {   // For Control read transfer, we have to copy the read data from pIo_buf to pdata.
+                       _rtw_memcpy( pdata, pIo_buf,  status );
+               }
+	}
+
+	#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE
+	rtw_mfree( palloc_buf,tmp_buflen);
+	#endif
+
+exit:
+	return status;
+
+}
+#endif	// CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC
+
+static void usb_read_reg_rf_byfw(struct dvobj_priv  *pdvobjpriv, u16 byteCount, u32 registerIndex, PVOID buffer)
+{
+	u16	wPage = 0x0000, offset;
+	u32	BufferLengthRead;
+	PADAPTER	Adapter = pdvobjpriv->padapter;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
+	u8	RFPath=0,nPHY=0;
+
+	RFPath =(u8) ((registerIndex&0xff0000)>>16);
+	
+	if (pHalData->interfaceIndex!=0)
+	{ 
+		nPHY = 1; //MAC1
+		if(registerIndex&MAC1_ACCESS_PHY0)// MAC1 need to access PHY0
+			nPHY = 0;
+	}
+	else
+	{
+		if(registerIndex&MAC0_ACCESS_PHY1)
+			nPHY = 1;
+	}
+	registerIndex &= 0xFF;
+	wPage = ((nPHY<<7)|(RFPath<<5)|8)<<8;
+	offset = (u16)registerIndex;
+	
+	//
+	// IN a vendor request to read back MAC register.
+	//
+	usbctrl_vendorreq(pdvobjpriv, 0x05, offset, wPage, buffer, byteCount, 0x01);
+
+}
+
+static void usb_read_reg(struct dvobj_priv  *pdvobjpriv, u16 value, void *pdata, u16 len)
+{
+	_adapter		*padapter = pdvobjpriv->padapter;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pdvobjpriv->padapter);
+	u8	request;
+	u8	requesttype;
+	u16	index;
+
+	request = 0x05;
+	requesttype = 0x01;//read_in
+	index = 0;//n/a
+
+	if (pHalData->interfaceIndex!=0)
+	{
+		if(value<0x1000)
+			value|=0x4000;
+		else if ((value&MAC1_ACCESS_PHY0) && !(value&0x8000))
+			value &= 0xFFF;
+	}
+
+	usbctrl_vendorreq(pdvobjpriv, request, value, index, pdata, len, requesttype);
+}
+
+static int usb_write_reg(struct dvobj_priv  *pdvobjpriv, u16 value, void *pdata, u16 len)
+{
+	_adapter		*padapter = pdvobjpriv->padapter;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pdvobjpriv->padapter);
+	u8	request;
+	u8	requesttype;
+	u16	index;
+
+	request = 0x05;
+	requesttype = 0x00;//write_out
+	index = 0;//n/a
+
+	if (pHalData->interfaceIndex!=0)
+	{
+		if(value<0x1000)
+			value|=0x4000;
+		else if((value&MAC1_ACCESS_PHY0) && !(value&0x8000))// MAC1 need to access PHY0
+			value &= 0xFFF;
+	}
+
+	return usbctrl_vendorreq(pdvobjpriv, request, value, index, pdata, len, requesttype);
+}
+
+static u8 usb_read8(struct intf_hdl *pintfhdl, u32 addr)
+{
+	u16 wvalue;
+	u16 len;
+	u32 data=0;	
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv  *)pintfhdl->pintf_dev;   
+	
+	_func_enter_;
+
+	wvalue = (u16)(addr&0x0000ffff);
+	len = 1;
+
+	usb_read_reg(pdvobjpriv, wvalue, &data, len);
+
+	_func_exit_;
+
+	return (u8)(le32_to_cpu(data)&0x0ff);
+		
+}
+
+static u16 usb_read16(struct intf_hdl *pintfhdl, u32 addr)
+{       
+	u16 wvalue;
+	u16 len;
+	u32 data=0;
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv  *)pintfhdl->pintf_dev;   
+	
+	_func_enter_;
+
+	wvalue = (u16)(addr&0x0000ffff);
+	len = 2;	
+
+	usb_read_reg(pdvobjpriv, wvalue, &data, len);
+
+	_func_exit_;
+
+	return (u16)(le32_to_cpu(data)&0xffff);
+	
+}
+
+static u32 usb_read32(struct intf_hdl *pintfhdl, u32 addr)
+{
+	u16 wvalue;
+	u16 len;
+	u32 data=0;
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv  *)pintfhdl->pintf_dev;  
+	
+	_func_enter_;
+
+	wvalue = (u16)(addr&0x0000ffff);
+	len = 4;
+
+	if((addr&0xff000000)>>24 == 0x66){
+		usb_read_reg_rf_byfw(pdvobjpriv, len, addr, &data);
+	}
+	else {
+		usb_read_reg(pdvobjpriv, wvalue, &data, len);
+	}
+
+	_func_exit_;
+
+	return le32_to_cpu(data);
+	
+}
+
+static int usb_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val)
+{
+	u16 wvalue;
+	u16 len;
+	u32 data;
+	int ret;
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv  *)pintfhdl->pintf_dev;   
+	
+	_func_enter_;
+
+	wvalue = (u16)(addr&0x0000ffff);
+	len = 1;
+	
+	data = val;
+	data = cpu_to_le32(data&0x000000ff);
+
+	ret = usb_write_reg(pdvobjpriv, wvalue, &data, len);
+	
+	_func_exit_;
+	
+	return ret;
+}
+
+static int usb_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val)
+{
+	u16 wvalue;
+	u16 len;
+	u32 data;
+	int ret;
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv  *)pintfhdl->pintf_dev;   
+	
+	_func_enter_;
+
+	wvalue = (u16)(addr&0x0000ffff);
+	len = 2;
+	
+	data = val;
+	data = cpu_to_le32(data&0x0000ffff);
+
+	ret = usb_write_reg(pdvobjpriv, wvalue, &data, len);
+	
+	_func_exit_;
+	
+	return ret;
+	
+}
+
+static int usb_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val)
+{
+	u16 wvalue;
+	u16 len;
+	u32 data;
+	int ret;
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv  *)pintfhdl->pintf_dev;   
+	
+	_func_enter_;
+
+	wvalue = (u16)(addr&0x0000ffff);
+	len = 4;
+	data = cpu_to_le32(val);	
+
+	ret = usb_write_reg(pdvobjpriv, wvalue, &data, len);
+	
+	_func_exit_;
+	
+	return ret;
+	
+}
+#define VENDOR_CMD_MAX_DATA_LEN	254
+static int usb_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata)
+{
+	u16	wvalue;
+	u16	len;
+	u8	buf[VENDOR_CMD_MAX_DATA_LEN]={0};
+	int	ret;
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv  *)pintfhdl->pintf_dev;  
+	
+	_func_enter_;
+
+	wvalue = (u16)(addr&0x0000ffff);
+	len = length;
+	 _rtw_memcpy(buf, pdata, len );
+
+	ret = usb_write_reg(pdvobjpriv, wvalue, buf, len);
+	
+	_func_exit_;
+	
+	return ret;
+	
+}
+
+#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ
+static void _usbctrl_vendorreq_async_callback(struct urb *urb, struct pt_regs *regs)
+{
+	if(urb){
+		if(urb->context){
+			kfree(urb->context);
+		}
+		usb_free_urb(urb);
+	}
+}
+
+static int _usbctrl_vendorreq_async_write(struct usb_device *udev, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype)
+{
+	int rc;
+	unsigned int pipe;	
+	u8 reqtype;
+	struct usb_ctrlrequest *dr;
+	struct urb *urb;
+	struct rtl819x_async_write_data {
+		u8 data[REALTEK_USB_VENQT_MAX_BUF_SIZE];
+		struct usb_ctrlrequest dr;
+	} *buf;
+	
+				
+	if (requesttype == VENDOR_READ){
+		pipe = usb_rcvctrlpipe(udev, 0);//read_in
+		reqtype =  REALTEK_USB_VENQT_READ;		
+	} 
+	else {
+		pipe = usb_sndctrlpipe(udev, 0);//write_out
+		reqtype =  REALTEK_USB_VENQT_WRITE;		
+	}		
+	
+	//buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
+	buf = (struct rtl819x_async_write_data *)rtw_zmalloc(sizeof(*buf));
+	if (!buf) {
+		rc = -ENOMEM;
+		goto exit;
+	}
+
+	urb = usb_alloc_urb(0, GFP_ATOMIC);
+	if (!urb) {
+		rtw_mfree((u8*)buf, sizeof(*buf));
+		rc = -ENOMEM;
+		goto exit;
+	}
+
+	dr = &buf->dr;
+
+	dr->bRequestType = reqtype;
+	dr->bRequest = request;
+	dr->wValue = cpu_to_le16(value);
+	dr->wIndex = cpu_to_le16(index);
+	dr->wLength = cpu_to_le16(len);
+
+	_rtw_memcpy(buf, pdata, len);
+
+	usb_fill_control_urb(urb, udev, pipe,
+			     (unsigned char *)dr, buf, len,
+			     _usbctrl_vendorreq_async_callback, buf);
+
+	rc = usb_submit_urb(urb, GFP_ATOMIC);
+	if (rc < 0) {
+	 	rtw_mfree((u8*)buf, sizeof(*buf));
+		usb_free_urb(urb);
+	}
+
+exit:
+	return rc;
+}
+
+static int usb_write_async(struct usb_device *udev, u32 addr, u32 val, u16 len)
+{
+	u8 request;
+	u8 requesttype;
+	u16 wvalue;
+	u16 index;
+	u32 data;
+	int ret;
+	
+	requesttype = VENDOR_WRITE;//write_out	
+	request = REALTEK_USB_VENQT_CMD_REQ;
+	index = REALTEK_USB_VENQT_CMD_IDX;//n/a
+
+	wvalue = (u16)(addr&0x0000ffff);
+	data = val & (0xffffffff >> ((4 - len) * 8));
+	data = cpu_to_le32(data);
+	
+	ret = _usbctrl_vendorreq_async_write(udev, request, wvalue, index, &data, len, requesttype);
+
+	return ret;
+}
+static int usb_async_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val)
+{	
+	u32 data;
+	int ret;
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv  *)pintfhdl->pintf_dev;   
+	struct usb_device *udev=pdvobjpriv->pusbdev;
+
+	_func_enter_;
+	data = cpu_to_le32(val & 0xFF);	
+	ret = usb_write_async(udev, addr, val, 1);
+	_func_exit_;	
+
+	return ret;
+}
+
+static int usb_async_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val)
+{	
+	u32 data;
+	int ret;
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv  *)pintfhdl->pintf_dev;   
+	struct usb_device *udev=pdvobjpriv->pusbdev;
+
+	_func_enter_;
+	data = cpu_to_le32(val & 0xFFFF);	
+	ret = usb_write_async(udev, addr, val, 2);
+	_func_exit_;	
+	
+	return ret;
+}
+static int usb_async_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val)
+{	
+	u32 data;
+	int ret;
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv  *)pintfhdl->pintf_dev;   
+	struct usb_device *udev=pdvobjpriv->pusbdev;
+
+	_func_enter_;
+	data = cpu_to_le32(val);	
+	ret = usb_write_async(udev, addr, val, 4);
+	_func_exit_;	
+	
+	return ret;
+}
+#endif
+
+static int ffaddr2pipehdl(struct dvobj_priv *pdvobj, u32 addr)
+{
+	int pipe=0, ep_num=0;
+	_adapter *padapter = pdvobj->padapter;
+	struct usb_device *pusbd = pdvobj->pusbdev;	
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
+
+	if(addr == RECV_BULK_IN_ADDR)
+	{	
+		pipe=usb_rcvbulkpipe(pusbd, pHalData->RtBulkInPipe);
+
+		return pipe;
+	}
+
+	if(addr == RECV_INT_IN_ADDR)
+	{	
+		pipe=usb_rcvbulkpipe(pusbd, pHalData->RtIntInPipe);
+
+		return pipe;
+	}
+
+	if(addr < HW_QUEUE_ENTRY) 
+	{
+		//ep_num = (pHalData->Queue2EPNum[(u8)addr] & 0x0f);
+		ep_num = pHalData->Queue2EPNum[addr];
+		
+		pipe = usb_sndbulkpipe(pusbd, ep_num);
+
+		return pipe;
+	}
+
+	return pipe;
+
+}
+
+static void usb_bulkout_zero_complete(struct urb *purb, struct pt_regs *regs)
+{	
+	struct zero_bulkout_context *pcontext = (struct zero_bulkout_context *)purb->context;
+
+	//DBG_8192C("+usb_bulkout_zero_complete\n");
+	
+	if(pcontext)
+	{
+		if(pcontext->pbuf)
+		{			
+			rtw_mfree(pcontext->pbuf, sizeof(int));	
+		}	
+
+		if(pcontext->purb && (pcontext->purb==purb))
+		{
+			usb_free_urb(pcontext->purb);
+		}
+
+	
+		rtw_mfree((u8*)pcontext, sizeof(struct zero_bulkout_context));	
+	}	
+	
+
+}
+
+static u32 usb_bulkout_zero(struct intf_hdl *pintfhdl, u32 addr)
+{	
+	int pipe, status, len;
+	u32 ret;
+	unsigned char *pbuf;
+	struct zero_bulkout_context *pcontext;
+	PURB	purb = NULL;	
+	_adapter *padapter = (_adapter *)pintfhdl->padapter;
+	struct dvobj_priv *pdvobj = (struct dvobj_priv *)&padapter->dvobjpriv;	
+	struct usb_device *pusbd = pdvobj->pusbdev;
+
+	//DBG_8192C("+usb_bulkout_zero\n");
+	
+		
+	if((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx))
+	{		
+		return _FAIL;
+	}
+	
+
+	pcontext = (struct zero_bulkout_context *)rtw_malloc(sizeof(struct zero_bulkout_context));
+
+	pbuf = (unsigned char *)rtw_malloc(sizeof(int));	
+    	purb = usb_alloc_urb(0, GFP_ATOMIC);
+      	
+	len = 0;
+	pcontext->pbuf = pbuf;
+	pcontext->purb = purb;
+	pcontext->pirp = NULL;
+	pcontext->padapter = padapter;
+
+	
+	//translate DMA FIFO addr to pipehandle
+	//pipe = ffaddr2pipehdl(pdvobj, addr);	
+
+	usb_fill_bulk_urb(purb, pusbd, pipe, 
+       				pbuf,
+              			len,
+              			usb_bulkout_zero_complete,
+              			pcontext);//context is pcontext
+
+	status = usb_submit_urb(purb, GFP_ATOMIC);
+
+	if (!status)
+	{		
+		ret= _SUCCESS;
+	}
+	else
+	{
+		ret= _FAIL;
+	}
+	
+	
+	return _SUCCESS;
+
+}
+
+static void usb_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
+{
+	
+}
+
+static void usb_write_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem)
+{
+	
+}
+
+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
+static void usb_read_interrupt_complete(struct urb *purb, struct pt_regs *regs)
+{
+	int	err;
+	_adapter		*padapter = (_adapter	 *)purb->context;
+
+	padapter->recvpriv.int_cnt ++;
+	if(purb->status==0)//SUCCESS
+	{
+		if (purb->actual_length > sizeof(INTERRUPT_MSG_FORMAT_EX))
+		{
+			DBG_8192C("usb_read_interrupt_complete: purb->actual_length > sizeof(INTERRUPT_MSG_FORMAT_EX) \n");
+		}
+
+		err = usb_submit_urb(purb, GFP_ATOMIC);
+		if((err) && (err != (-EPERM)))
+		{
+			DBG_8192C("cannot submit interrupt in-token(err = 0x%08x),urb_status = %d\n",err, purb->status);
+		}
+	}
+	else
+	{
+		DBG_8192C("###=> usb_read_interrupt_complete => urb status(%d)\n", purb->status);
+
+		switch(purb->status) {
+			case -EINVAL:
+			case -EPIPE:			
+			case -ENODEV:
+			case -ESHUTDOWN:
+				//padapter->bSurpriseRemoved=_TRUE;
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n"));
+			case -ENOENT:
+				padapter->bDriverStopped=_TRUE;			
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n"));
+				break;
+			case -EPROTO:
+				break;
+			case -EINPROGRESS:
+				DBG_8192C("ERROR: URB IS IN PROGRESS!/n");
+				break;
+			default:
+				break;				
+		}
+	}	
+
+}
+
+static u32 usb_read_interrupt(struct intf_hdl *pintfhdl, u32 addr)
+{
+	int	err, pipe;
+	u32	ret = _SUCCESS;
+	struct dvobj_priv	*pdvobj = (struct dvobj_priv *)pintfhdl->pintf_dev;
+	_adapter			*adapter = (_adapter *)pdvobj->padapter;
+	struct recv_priv	*precvpriv = &adapter->recvpriv;
+	struct usb_device	*pusbd = pdvobj->pusbdev;
+
+_func_enter_;
+
+	//translate DMA FIFO addr to pipehandle
+	pipe = ffaddr2pipehdl(pdvobj, addr);
+
+	usb_fill_int_urb(precvpriv->int_in_urb, pusbd, pipe, 
+					precvpriv->int_in_buf,
+            				sizeof(INTERRUPT_MSG_FORMAT_EX),
+            				usb_read_interrupt_complete,
+            				adapter,
+            				3);
+
+	err = usb_submit_urb(precvpriv->int_in_urb, GFP_ATOMIC);
+	if((err) && (err != (-EPERM)))
+	{
+		DBG_8192C("cannot submit interrupt in-token(err = 0x%08x),urb_status = %d\n",err, precvpriv->int_in_urb->status);
+		ret = _FAIL;
+	}
+
+_func_exit_;
+
+	return ret;
+}
+#endif
+
+#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX
+static int recvbuf2recvframe(_adapter *padapter, struct recv_buf *precvbuf)
+{
+	u8	*pbuf;
+	u8	shift_sz = 0;
+	u16	pkt_cnt;
+	u32	pkt_offset, skb_len, alloc_sz;
+	int	transfer_len;
+	struct recv_stat	*prxstat;
+	struct phy_stat	*pphy_info = NULL;
+	_pkt				*pkt_copy = NULL;
+	union recv_frame	*precvframe = NULL;
+	struct rx_pkt_attrib	*pattrib = NULL;
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(padapter);
+	struct recv_priv	*precvpriv = &padapter->recvpriv;
+	_queue			*pfree_recv_queue = &precvpriv->free_recv_queue;
+
+
+	transfer_len = (s32)precvbuf->transfer_len;	
+	pbuf = precvbuf->pbuf;
+
+	prxstat = (struct recv_stat *)pbuf;	
+	pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff;
+
+#if 0 //temp remove when disable usb rx aggregation
+	if((pkt_cnt > 10) || (pkt_cnt < 1) || (transfer_len<RXDESC_SIZE) ||(pkt_len<=0))
+	{		
+		return _FAIL;
+	}
+#endif
+
+	do{		
+		RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
+			 ("recvbuf2recvframe: rxdesc=offsset 0:0x%08x, 4:0x%08x, 8:0x%08x, C:0x%08x\n",
+			  prxstat->rxdw0, prxstat->rxdw1, prxstat->rxdw2, prxstat->rxdw4));
+
+		prxstat = (struct recv_stat *)pbuf;
+
+		precvframe = rtw_alloc_recvframe(pfree_recv_queue);
+		if(precvframe==NULL)
+		{
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: precvframe==NULL\n"));
+			DBG_8192C("%s()-%d: rtw_alloc_recvframe() failed! RX Drop!\n", __FUNCTION__, __LINE__);	
+			goto _exit_recvbuf2recvframe;
+		}
+
+		_rtw_init_listhead(&precvframe->u.hdr.list);	
+		precvframe->u.hdr.precvbuf = NULL;	//can't access the precvbuf for new arch.
+		precvframe->u.hdr.len=0;
+
+		rtl8192d_query_rx_desc_status(precvframe, prxstat);
+
+		pattrib = &precvframe->u.hdr.attrib;
+		if(pattrib->physt)
+		{
+			pphy_info = (struct phy_stat *)(pbuf + RXDESC_OFFSET + pattrib->shift_sz);
+		}
+
+		pkt_offset = pattrib->pkt_len + pattrib->drvinfo_sz + RXDESC_SIZE;
+
+		if((pattrib->pkt_len<=0) || (pkt_offset>transfer_len))
+		{	
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe: pkt_len<=0\n"));
+			DBG_8192C("%s()-%d: RX Warning!\n", __FUNCTION__, __LINE__);	
+			rtw_free_recvframe(precvframe, pfree_recv_queue);
+			goto _exit_recvbuf2recvframe;
+		}
+
+		//	Modified by Albert 20101213
+		//	For 8 bytes IP header alignment.
+		if (pattrib->qos)	//	Qos data, wireless lan header length is 26
+		{
+			shift_sz = 6;
+		}
+		else
+		{
+			shift_sz = 0;
+		}
+
+		skb_len = pattrib->pkt_len;
+
+		// for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet.
+		// modify alloc_sz for recvive crc error packet by thomas 2011-06-02
+		if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){
+			//alloc_sz = 1664;	//1664 is 128 alignment.
+			if(skb_len <= 1650)
+				alloc_sz = 1664;
+			else
+				alloc_sz = skb_len + 14;
+		}
+		else {
+			alloc_sz = skb_len;
+			//	6 is for IP header 8 bytes alignment in QoS packet case.
+			//	8 is for skb->data 4 bytes alignment.
+			alloc_sz += 14;
+		}
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html
+		pkt_copy = dev_alloc_skb(alloc_sz);
+#else			
+		pkt_copy = netdev_alloc_skb(padapter->pnetdev, alloc_sz);
+#endif
+		if(pkt_copy)
+		{
+			precvframe->u.hdr.pkt = pkt_copy;
+			skb_reserve( pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data ) & 7 ));//force pkt_copy->data at 8-byte alignment address
+			skb_reserve( pkt_copy, shift_sz );//force ip_hdr at 8-byte alignment address according to shift_sz.
+			_rtw_memcpy(pkt_copy->data, (pbuf + pattrib->drvinfo_sz + RXDESC_SIZE), skb_len);
+			precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pkt_copy->data;
+			precvframe->u.hdr.rx_end = pkt_copy->data + alloc_sz;
+		}
+		else
+		{
+			DBG_8192C("recvbuf2recvframe:can not allocate memory for skb copy\n");
+			//precvframe->u.hdr.pkt = skb_clone(pskb, GFP_ATOMIC);	
+			//precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pbuf;
+			//precvframe->u.hdr.rx_end = pbuf + (pkt_offset>1612?pkt_offset:1612);
+
+			precvframe->u.hdr.pkt = NULL;
+			rtw_free_recvframe(precvframe, pfree_recv_queue);
+
+			goto _exit_recvbuf2recvframe;
+		}
+
+		recvframe_put(precvframe, skb_len);
+		//recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE);
+
+		rtl8192d_translate_rx_signal_stuff(precvframe, pphy_info);
+
+#ifdef CONFIG_USB_RX_AGGREGATION
+		switch(pHalData->UsbRxAggMode)
+		{
+			case USB_RX_AGG_DMA:
+			case USB_RX_AGG_DMA_USB:
+				pkt_offset = (u16)_RND128(pkt_offset);
+				break;
+				case USB_RX_AGG_USB:
+				pkt_offset = (u16)_RND4(pkt_offset);
+				break;
+			case USB_RX_AGG_DISABLE:			
+			default:				
+				break;
+		}
+#endif
+
+		if(rtw_recv_entry(precvframe) != _SUCCESS)
+		{
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n"));
+		}
+
+		pkt_cnt--;
+	
+		transfer_len -= pkt_offset;
+		pbuf += pkt_offset;	
+		precvframe = NULL;
+		pkt_copy = NULL;
+
+		if(transfer_len>0 && pkt_cnt==0)
+			pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff;
+
+	}while((transfer_len>0) && (pkt_cnt>0));
+
+_exit_recvbuf2recvframe:
+
+	return _SUCCESS;
+}
+
+
+void rtl8192du_recv_tasklet(void *priv)
+{	
+	struct recv_buf *precvbuf = NULL;
+	_adapter	*padapter = (_adapter*)priv;
+	struct recv_priv	*precvpriv = &padapter->recvpriv;
+
+	while (NULL != (precvbuf = rtw_dequeue_recvbuf(&precvpriv->recv_buf_pending_queue)))
+	{
+		if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE))
+		{
+			DBG_8192C("recv_tasklet => bDriverStopped or bSurpriseRemoved \n");
+			
+			break;
+		}
+		
+
+		recvbuf2recvframe(padapter, precvbuf);
+
+		rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
+	}	
+	
+}
+
+static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
+{	
+	struct recv_buf	*precvbuf = (struct recv_buf *)purb->context;	
+	_adapter 			*padapter =(_adapter *)precvbuf->adapter;
+	struct recv_priv	*precvpriv = &padapter->recvpriv;
+
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete!!!\n"));
+	
+	precvpriv->rx_pending_cnt --;
+		
+	if(padapter->bSurpriseRemoved || padapter->bDriverStopped||padapter->bReadPortCancel)
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", padapter->bDriverStopped, padapter->bSurpriseRemoved));		
+
+		goto exit;
+	}
+
+	if(purb->status==0)//SUCCESS
+	{
+		if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE))
+		{
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: (purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)\n"));
+
+			rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
+		}
+		else 
+		{			
+			precvbuf->transfer_len = purb->actual_length;	
+
+			//rtw_enqueue_rx_transfer_buffer(precvpriv, rx_transfer_buf);			
+			rtw_enqueue_recvbuf(precvbuf, &precvpriv->recv_buf_pending_queue);
+
+			tasklet_schedule(&precvpriv->recv_tasklet);			
+		}		
+	}
+	else
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete : purb->status(%d) != 0 \n", purb->status));
+	
+		DBG_8192C("###=> usb_read_port_complete => urb status(%d)\n", purb->status);
+
+		switch(purb->status) {
+			case -EINVAL:
+			case -EPIPE:			
+			case -ENODEV:
+			case -ESHUTDOWN:
+				//padapter->bSurpriseRemoved=_TRUE;
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n"));
+			case -ENOENT:
+				padapter->bDriverStopped=_TRUE;			
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n"));
+				break;
+			case -EPROTO:				
+				rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);			
+				break;
+			case -EINPROGRESS:
+				DBG_8192C("ERROR: URB IS IN PROGRESS!/n");
+				break;
+			default:
+				break;				
+		}
+		
+	}	
+
+exit:	
+	
+_func_exit_;
+	
+}
+
+static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
+{		
+	int err, pipe;	
+	u32 ret = _SUCCESS;
+	PURB purb = NULL;	
+	struct recv_buf	*precvbuf = (struct recv_buf *)rmem;
+	struct dvobj_priv	*pdvobj = (struct dvobj_priv *)pintfhdl->pintf_dev;
+	_adapter		*adapter = (_adapter *)pdvobj->padapter;
+	struct recv_priv	*precvpriv = &adapter->recvpriv;
+	struct usb_device	*pusbd = pdvobj->pusbdev;
+
+_func_enter_;
+	
+	if(adapter->bDriverStopped || adapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n"));
+		return _FAIL;
+	}
+
+	if(precvbuf !=NULL)
+	{	
+		rtl8192du_init_recvbuf(adapter, precvbuf);
+
+		if(precvbuf->pbuf)
+		{			
+			precvpriv->rx_pending_cnt++;
+		
+			purb = precvbuf->purb;		
+
+			//translate DMA FIFO addr to pipehandle
+			pipe = ffaddr2pipehdl(pdvobj, addr);	
+
+			usb_fill_bulk_urb(purb, pusbd, pipe, 
+						precvbuf->pbuf,
+                				MAX_RECVBUF_SZ,
+                				usb_read_port_complete,
+                				precvbuf);//context is precvbuf
+
+			purb->transfer_dma = precvbuf->dma_transfer_addr;
+			purb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;								
+
+			err = usb_submit_urb(purb, GFP_ATOMIC);	
+			if((err) && (err != (-EPERM)))
+			{
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("cannot submit rx in-token(err=0x%.8x), URB_STATUS =0x%.8x", err, purb->status));
+				DBG_8192C("cannot submit rx in-token(err = 0x%08x),urb_status = %d\n",err,purb->status);
+				ret = _FAIL;
+			}
+			
+		}
+			
+	}
+	else
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:precvbuf ==NULL\n"));
+		ret = _FAIL;
+	}
+
+_func_exit_;
+	
+	return ret;	
+}
+#else	// CONFIG_USE_USB_BUFFER_ALLOC_RX
+static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_stat *prxstat, struct phy_stat *pphy_info)
+{	
+	s32 ret=_SUCCESS;
+#ifdef CONFIG_CONCURRENT_MODE	
+	u8 *primary_myid, *secondary_myid, *paddr1;
+	union recv_frame	*precvframe_if2 = NULL;
+	_adapter *primary_padapter = precvframe->u.hdr.adapter;
+	_adapter *secondary_padapter = primary_padapter->pbuddy_adapter;
+	struct recv_priv *precvpriv = &primary_padapter->recvpriv;
+	_queue *pfree_recv_queue = &precvpriv->free_recv_queue;
+	u8	*pbuf = precvframe->u.hdr.rx_head;
+	
+	if(!secondary_padapter)
+		return ret;
+	
+	paddr1 = GetAddr1Ptr(precvframe->u.hdr.rx_data);		
+
+	if(IS_MCAST(paddr1) == _FALSE)//unicast packets
+	{
+		//primary_myid = myid(&primary_padapter->eeprompriv);
+		secondary_myid = myid(&secondary_padapter->eeprompriv);
+
+		if(_rtw_memcmp(paddr1, secondary_myid, ETH_ALEN))
+		{			
+			//change to secondary interface
+			precvframe->u.hdr.adapter = secondary_padapter;
+		}	
+
+		//ret = recv_entry(precvframe);
+
+	}
+	else // Handle BC/MC Packets	
+	{
+		
+		u8 clone = _TRUE;
+#if 0		
+		u8 type, subtype, *paddr2, *paddr3;
+	
+		type =  GetFrameType(pbuf);
+		subtype = GetFrameSubType(pbuf); //bit(7)~bit(2)
+		
+		switch (type)
+		{
+			case WIFI_MGT_TYPE: //Handle BC/MC mgnt Packets
+				if(subtype == WIFI_BEACON)
+				{
+					paddr3 = GetAddr3Ptr(precvframe->u.hdr.rx_data);
+				
+					if (check_fwstate(&secondary_padapter->mlmepriv, _FW_LINKED) &&
+						_rtw_memcmp(paddr3, get_bssid(&secondary_padapter->mlmepriv), ETH_ALEN))
+					{
+						//change to secondary interface
+						precvframe->u.hdr.adapter = secondary_padapter;
+						clone = _FALSE;
+					}
+
+					if(check_fwstate(&primary_padapter->mlmepriv, _FW_LINKED) &&
+						_rtw_memcmp(paddr3, get_bssid(&primary_padapter->mlmepriv), ETH_ALEN))
+					{
+						if(clone==_FALSE)
+						{
+							clone = _TRUE;									
+						}	
+						else
+						{
+							clone = _FALSE;
+						}
+
+						precvframe->u.hdr.adapter = primary_padapter;	
+					}
+
+					if(check_fwstate(&primary_padapter->mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) ||
+						check_fwstate(&secondary_padapter->mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING))
+					{
+						clone = _TRUE;
+						precvframe->u.hdr.adapter = primary_padapter;	
+					}
+				
+				}
+				else if(subtype == WIFI_PROBEREQ)
+				{
+					//probe req frame is only for interface2
+					//change to secondary interface
+					precvframe->u.hdr.adapter = secondary_padapter;
+					clone = _FALSE;
+				}			
+				break;
+			case WIFI_CTRL_TYPE: // Handle BC/MC ctrl Packets
+			
+				break;
+			case WIFI_DATA_TYPE: //Handle BC/MC data Packets
+					//Notes: AP MODE never rx BC/MC data packets
+			
+				paddr2 = GetAddr2Ptr(precvframe->u.hdr.rx_data);
+
+				if(_rtw_memcmp(paddr2, get_bssid(&secondary_padapter->mlmepriv), ETH_ALEN))
+				{
+					//change to secondary interface
+					precvframe->u.hdr.adapter = secondary_padapter;
+					clone = _FALSE;
+				}
+
+				break;
+			default:
+			
+				break;			
+		}
+#endif
+
+		if(_TRUE == clone)
+		{
+			//clone/copy to if2
+			u8 frag, mf, shift_sz = 0;
+			u16 drvinfo_sz;
+			u32 pkt_len, pkt_offset, alloc_sz, skb_len;		
+			_pkt	 *pkt_copy = NULL;
+			struct rx_pkt_attrib *pattrib = NULL;
+		
+			precvframe_if2 = rtw_alloc_recvframe(pfree_recv_queue);
+			if(precvframe_if2)
+			{
+				precvframe_if2->u.hdr.adapter = secondary_padapter;
+		
+				_rtw_init_listhead(&precvframe_if2->u.hdr.list);	
+				precvframe_if2->u.hdr.precvbuf = NULL;	//can't access the precvbuf for new arch.
+				precvframe_if2->u.hdr.len=0;
+
+				_rtw_memcpy(&precvframe_if2->u.hdr.attrib, &precvframe->u.hdr.attrib, sizeof(struct rx_pkt_attrib));
+
+				pattrib = &precvframe_if2->u.hdr.attrib;
+
+				pkt_offset = pattrib->pkt_len + pattrib->drvinfo_sz + RXDESC_SIZE;
+
+				//	Modified by Albert 20101213
+				//	For 8 bytes IP header alignment.
+				if (pattrib->qos)	//	Qos data, wireless lan header length is 26
+				{
+					shift_sz = 6;
+				}
+				else
+				{
+					shift_sz = 0;
+				}
+
+				skb_len = pattrib->pkt_len;
+
+				// for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet.
+				// modify alloc_sz for recvive crc error packet by thomas 2011-06-02
+				if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){
+					//alloc_sz = 1664;	//1664 is 128 alignment.
+					if(skb_len <= 1650)
+						alloc_sz = 1664;
+					else
+						alloc_sz = skb_len + 14;
+				}
+				else {
+					alloc_sz = skb_len;
+					//	6 is for IP header 8 bytes alignment in QoS packet case.
+					//	8 is for skb->data 4 bytes alignment.
+					alloc_sz += 14;
+				}
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html
+				pkt_copy = dev_alloc_skb(alloc_sz);
+#else			
+				pkt_copy = netdev_alloc_skb(secondary_padapter->pnetdev, alloc_sz);
+#endif		
+				if(pkt_copy)
+				{
+					pkt_copy->dev = secondary_padapter->pnetdev;
+					precvframe_if2->u.hdr.pkt = pkt_copy;
+					skb_reserve( pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data ) & 7 ));//force pkt_copy->data at 8-byte alignment address
+					skb_reserve( pkt_copy, shift_sz );//force ip_hdr at 8-byte alignment address according to shift_sz.
+					_rtw_memcpy(pkt_copy->data, pbuf, skb_len);
+					precvframe_if2->u.hdr.rx_head = precvframe_if2->u.hdr.rx_data = precvframe_if2->u.hdr.rx_tail = pkt_copy->data;
+					precvframe_if2->u.hdr.rx_end = pkt_copy->data + alloc_sz;
+				}
+
+				recvframe_put(precvframe_if2, skb_len);
+				//recvframe_pull(precvframe_if2, drvinfo_sz + RXDESC_SIZE);
+
+				rtl8192d_translate_rx_signal_stuff(precvframe_if2, pphy_info);
+
+				ret = rtw_recv_entry(precvframe_if2);
+
+			}
+			
+		}
+		
+	}
+
+	ret = rtw_recv_entry(precvframe);	
+
+#endif
+
+	return ret;
+
+}
+
+static int recvbuf2recvframe(_adapter *padapter, _pkt *pskb)
+{
+	u8	*pbuf;
+	u8	shift_sz = 0;
+	u16	pkt_cnt;
+	u32	pkt_offset, skb_len, alloc_sz;
+	int	transfer_len;
+	struct recv_stat	*prxstat;
+	struct phy_stat	*pphy_info = NULL;
+	_pkt				*pkt_copy = NULL;
+	union recv_frame	*precvframe = NULL;
+	struct rx_pkt_attrib	*pattrib = NULL;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct recv_priv	*precvpriv = &padapter->recvpriv;
+	_queue			*pfree_recv_queue = &precvpriv->free_recv_queue;
+
+	transfer_len = pskb->len;	
+	pbuf = pskb->data;
+
+	prxstat = (struct recv_stat *)pbuf;	
+	pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff;
+
+#if 0 //temp remove when disable usb rx aggregation
+	if((pkt_cnt > 10) || (pkt_cnt < 1) || (transfer_len<RXDESC_SIZE) ||(pkt_len<=0))
+	{		
+		return _FAIL;
+	}
+#endif
+
+	do{
+		RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
+			 ("recvbuf2recvframe: rxdesc=offsset 0:0x%08x, 4:0x%08x, 8:0x%08x, C:0x%08x\n",
+			  prxstat->rxdw0, prxstat->rxdw1, prxstat->rxdw2, prxstat->rxdw4));
+
+		prxstat = (struct recv_stat *)pbuf;
+
+		precvframe = rtw_alloc_recvframe(pfree_recv_queue);
+		if(precvframe==NULL)
+		{
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: precvframe==NULL\n"));
+			DBG_8192C("%s()-%d: rtw_alloc_recvframe() failed! RX Drop!\n", __FUNCTION__, __LINE__);	
+			goto _exit_recvbuf2recvframe;
+		}
+
+		_rtw_init_listhead(&precvframe->u.hdr.list);	
+		precvframe->u.hdr.precvbuf = NULL;	//can't access the precvbuf for new arch.
+		precvframe->u.hdr.len=0;
+
+		rtl8192d_query_rx_desc_status(precvframe, prxstat);
+
+		pattrib = &precvframe->u.hdr.attrib;
+		if(pattrib->physt)
+		{
+			pphy_info = (struct phy_stat *)(pbuf + RXDESC_OFFSET + pattrib->shift_sz);
+		}
+
+		pkt_offset = pattrib->pkt_len + pattrib->drvinfo_sz + RXDESC_SIZE;
+
+		if((pattrib->pkt_len<=0) || (pkt_offset>transfer_len))
+		{	
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe: pkt_len<=0\n"));
+			DBG_8192C("%s()-%d: RX Warning!\n", __FUNCTION__, __LINE__);	
+			rtw_free_recvframe(precvframe, pfree_recv_queue);
+			goto _exit_recvbuf2recvframe;
+		}
+
+		//	Modified by Albert 20101213
+		//	For 8 bytes IP header alignment.
+		if (pattrib->qos)	//	Qos data, wireless lan header length is 26
+		{
+			shift_sz = 6;
+		}
+		else
+		{
+			shift_sz = 0;
+		}
+
+		skb_len = pattrib->pkt_len;
+
+		// for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet.
+		// modify alloc_sz for recvive crc error packet by thomas 2011-06-02
+		if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){
+			//alloc_sz = 1664;	//1664 is 128 alignment.
+			if(skb_len <= 1650)
+				alloc_sz = 1664;
+			else
+				alloc_sz = skb_len + 14;
+		}
+		else {
+			alloc_sz = skb_len;
+			//	6 is for IP header 8 bytes alignment in QoS packet case.
+			//	8 is for skb->data 4 bytes alignment.
+			alloc_sz += 14;
+		}
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html
+		pkt_copy = dev_alloc_skb(alloc_sz);
+#else			
+		pkt_copy = netdev_alloc_skb(padapter->pnetdev, alloc_sz);
+#endif
+		if(pkt_copy)
+		{
+			precvframe->u.hdr.pkt = pkt_copy;
+			skb_reserve( pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data ) & 7 ));//force pkt_copy->data at 8-byte alignment address
+			skb_reserve( pkt_copy, shift_sz );//force ip_hdr at 8-byte alignment address according to shift_sz.
+			_rtw_memcpy(pkt_copy->data, (pbuf + pattrib->drvinfo_sz + RXDESC_SIZE), skb_len);
+			precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pkt_copy->data;
+			precvframe->u.hdr.rx_end = pkt_copy->data + alloc_sz;
+		}
+		else
+		{
+			precvframe->u.hdr.pkt = skb_clone(pskb, GFP_ATOMIC);
+			if(pkt_copy)
+			{
+				precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pbuf;
+				precvframe->u.hdr.rx_end = pbuf + alloc_sz;
+			}
+			else
+			{
+				DBG_8192C("recvbuf2recvframe: skb_clone fail\n");
+				rtw_free_recvframe(precvframe, pfree_recv_queue);
+				goto _exit_recvbuf2recvframe;
+			}
+		}
+
+		recvframe_put(precvframe, skb_len);
+		//recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE);
+
+		rtl8192d_translate_rx_signal_stuff(precvframe, pphy_info);
+
+#ifdef CONFIG_USB_RX_AGGREGATION
+		switch(pHalData->UsbRxAggMode)
+		{
+			case USB_RX_AGG_DMA:
+			case USB_RX_AGG_DMA_USB:
+				pkt_offset = (u16)_RND128(pkt_offset);
+				break;
+				case USB_RX_AGG_USB:
+				pkt_offset = (u16)_RND4(pkt_offset);
+				break;
+			case USB_RX_AGG_DISABLE:			
+			default:				
+				break;
+		}
+#endif
+#ifdef CONFIG_CONCURRENT_MODE
+		if(pre_recv_entry(precvframe, prxstat, pphy_info) != _SUCCESS)
+		{
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: recv_entry(precvframe) != _SUCCESS\n"));
+		}
+#else
+		if(rtw_recv_entry(precvframe) != _SUCCESS)
+		{
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n"));
+		}
+#endif //CONFIG_CONCURRENT_MODE
+		pkt_cnt--;
+	
+		transfer_len -= pkt_offset;
+		pbuf += pkt_offset;	
+		precvframe = NULL;
+		pkt_copy = NULL;
+
+		if(transfer_len>0 && pkt_cnt==0)
+			pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff;
+
+	}while((transfer_len>0) && (pkt_cnt>0));
+
+_exit_recvbuf2recvframe:
+
+	return _SUCCESS;	
+}
+
+
+void rtl8192du_recv_tasklet(void *priv)
+{
+	_pkt			*pskb;
+	_adapter		*padapter = (_adapter*)priv;
+	struct recv_priv	*precvpriv = &padapter->recvpriv;
+	
+	while (NULL != (pskb = skb_dequeue(&precvpriv->rx_skb_queue)))
+	{
+		if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE))
+		{
+			DBG_8192C("recv_tasklet => bDriverStopped or bSurpriseRemoved \n");
+			dev_kfree_skb_any(pskb);
+			break;
+		}
+	
+		recvbuf2recvframe(padapter, pskb);
+
+#ifdef CONFIG_PREALLOC_RECV_SKB
+
+		pskb->tail = pskb->data;
+		pskb->len = 0;
+		
+		skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb);
+		
+#else
+		dev_kfree_skb_any(pskb);
+#endif
+				
+	}
+	
+}
+
+
+static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
+{
+	_irqL irqL;
+	uint isevt, *pbuf;
+	struct recv_buf	*precvbuf = (struct recv_buf *)purb->context;	
+	_adapter 			*padapter =(_adapter *)precvbuf->adapter;
+	struct recv_priv	*precvpriv = &padapter->recvpriv;	
+	
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete!!!\n"));
+
+	//_enter_critical(&precvpriv->lock, &irqL);
+	//precvbuf->irp_pending=_FALSE;
+	//precvpriv->rx_pending_cnt --;
+	//_exit_critical(&precvpriv->lock, &irqL);
+		
+	precvpriv->rx_pending_cnt --;
+		
+	//if(precvpriv->rx_pending_cnt== 0)
+	//{		
+	//	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: rx_pending_cnt== 0, set allrxreturnevt!\n"));
+	//	_rtw_up_sema(&precvpriv->allrxreturnevt);	
+	//}
+
+	if(padapter->bSurpriseRemoved || padapter->bDriverStopped||padapter->bReadPortCancel)
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", padapter->bDriverStopped, padapter->bSurpriseRemoved));		
+		
+	#ifdef CONFIG_PREALLOC_RECV_SKB
+		precvbuf->reuse = _TRUE;
+	#else
+		if(precvbuf->pskb){
+			DBG_8192C("==> free skb(%p)\n",precvbuf->pskb);
+			dev_kfree_skb_any(precvbuf->pskb);				
+		}	
+	#endif
+	
+		goto exit;
+	}
+
+	if(purb->status==0)//SUCCESS
+	{
+		if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE))
+		{
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: (purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)\n"));
+			precvbuf->reuse = _TRUE;
+			rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
+		}
+		else 
+		{
+			precvbuf->transfer_len = purb->actual_length;			
+
+			skb_put(precvbuf->pskb, purb->actual_length);	
+			skb_queue_tail(&precvpriv->rx_skb_queue, precvbuf->pskb);
+
+			if (skb_queue_len(&precvpriv->rx_skb_queue)<=1)
+				tasklet_schedule(&precvpriv->recv_tasklet);
+
+			precvbuf->pskb = NULL;
+			precvbuf->reuse = _FALSE;
+			rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);			
+		}		
+	}
+	else
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete : purb->status(%d) != 0 \n", purb->status));
+	
+		DBG_8192C("###=> usb_read_port_complete => urb status(%d)\n", purb->status);
+
+		switch(purb->status) {
+			case -EINVAL:
+			case -EPIPE:			
+			case -ENODEV:
+			case -ESHUTDOWN:
+				//padapter->bSurpriseRemoved=_TRUE;
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n"));
+			case -ENOENT:
+				padapter->bDriverStopped=_TRUE;			
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n"));
+				break;
+			case -EPROTO:
+				precvbuf->reuse = _TRUE;
+				rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);			
+				break;
+			case -EINPROGRESS:
+				DBG_8192C("ERROR: URB IS IN PROGRESS!/n");
+				break;
+			default:
+				break;				
+		}
+		
+	}	
+
+exit:	
+	
+_func_exit_;
+	
+}
+
+static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
+{	
+	_irqL irqL;
+	int err, pipe;
+	u32 tmpaddr=0;
+        int alignment=0;
+	u32 ret = _SUCCESS;
+	PURB purb = NULL;	
+	struct recv_buf	*precvbuf = (struct recv_buf *)rmem;
+	struct dvobj_priv	*pdvobj = (struct dvobj_priv *)pintfhdl->pintf_dev;
+	_adapter		*adapter = (_adapter *)pdvobj->padapter;
+	struct recv_priv	*precvpriv = &adapter->recvpriv;
+	struct usb_device	*pusbd = pdvobj->pusbdev;
+	
+
+_func_enter_;
+	
+	if(adapter->bDriverStopped || adapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n"));
+		return _FAIL;
+	}
+
+#ifdef CONFIG_PREALLOC_RECV_SKB
+	if((precvbuf->reuse == _FALSE) || (precvbuf->pskb == NULL))
+	{
+		if (NULL != (precvbuf->pskb = skb_dequeue(&precvpriv->free_recv_skb_queue)))
+		{
+			precvbuf->reuse = _TRUE;
+		}
+	}
+#endif
+	
+
+	if(precvbuf !=NULL)
+	{	
+		rtl8192du_init_recvbuf(adapter, precvbuf);
+
+		//re-assign for linux based on skb
+		if((precvbuf->reuse == _FALSE) || (precvbuf->pskb == NULL))
+		{
+			//precvbuf->pskb = alloc_skb(MAX_RECVBUF_SZ, GFP_ATOMIC);//don't use this after v2.6.25
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html
+			precvbuf->pskb = dev_alloc_skb(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
+#else			
+			precvbuf->pskb = netdev_alloc_skb(adapter->pnetdev, MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
+#endif			
+			if(precvbuf->pskb == NULL)		
+			{
+				RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("init_recvbuf(): alloc_skb fail!\n"));
+				return _FAIL;
+			}	
+
+			tmpaddr = (u32)precvbuf->pskb->data;
+	        	alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1);
+			skb_reserve(precvbuf->pskb, (RECVBUFF_ALIGN_SZ - alignment));			
+
+			precvbuf->phead = precvbuf->pskb->head;
+		   	precvbuf->pdata = precvbuf->pskb->data;
+#ifdef NET_SKBUFF_DATA_USES_OFFSET
+			precvbuf->ptail = precvbuf->pskb->head + precvbuf->pskb->tail;
+			precvbuf->pend = precvbuf->ptail + (MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
+#else
+			precvbuf->ptail = precvbuf->pskb->tail;
+			precvbuf->pend = precvbuf->pskb->end;
+#endif
+			precvbuf->pbuf = precvbuf->pskb->data;
+		}	
+		else//reuse skb
+		{
+			precvbuf->phead = precvbuf->pskb->head;
+			precvbuf->pdata = precvbuf->pskb->data;
+#ifdef NET_SKBUFF_DATA_USES_OFFSET
+			precvbuf->ptail = precvbuf->pskb->head + precvbuf->pskb->tail;
+			precvbuf->pend = precvbuf->ptail + (MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
+#else
+			precvbuf->ptail = precvbuf->pskb->tail;
+			precvbuf->pend = precvbuf->pskb->end;
+#endif
+
+			precvbuf->pbuf = precvbuf->pskb->data;
+		
+			precvbuf->reuse = _FALSE;
+		}
+	
+		//_enter_critical(&precvpriv->lock, &irqL);
+		//precvpriv->rx_pending_cnt++;
+		//precvbuf->irp_pending = _TRUE;
+		//_exit_critical(&precvpriv->lock, &irqL);
+				
+		precvpriv->rx_pending_cnt++;
+		
+		purb = precvbuf->purb;		
+
+		//translate DMA FIFO addr to pipehandle
+		pipe = ffaddr2pipehdl(pdvobj, addr);	
+
+		usb_fill_bulk_urb(purb, pusbd, pipe, 
+						precvbuf->pbuf,
+                				MAX_RECVBUF_SZ,
+                				usb_read_port_complete,
+                				precvbuf);//context is precvbuf
+
+		err = usb_submit_urb(purb, GFP_ATOMIC);	
+		if((err) && (err != (-EPERM)))
+		{
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("cannot submit rx in-token(err=0x%.8x), URB_STATUS =0x%.8x", err, purb->status));
+			DBG_8192C("cannot submit rx in-token(err = 0x%08x),urb_status = %d\n",err,purb->status);
+			ret = _FAIL;
+		}
+	}
+	else
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:precvbuf ==NULL\n"));
+		ret = _FAIL;
+	}
+
+_func_exit_;
+	
+	return ret;	
+}
+#endif	// CONFIG_USE_USB_BUFFER_ALLOC_RX
+
+static void usb_read_port_cancel(struct intf_hdl *pintfhdl)
+{
+	int i;	
+
+	struct recv_buf *precvbuf;	
+
+	_adapter	*padapter = pintfhdl->padapter;
+	precvbuf = (struct recv_buf *)padapter->recvpriv.precv_buf;	
+
+	DBG_8192C("usb_read_port_cancel \n");
+
+	padapter->bReadPortCancel = _TRUE;	
+	
+	for(i=0; i < NR_RECVBUFF ; i++)	
+	{		
+		precvbuf->reuse = _TRUE;		
+		if(precvbuf->purb)		
+		{
+			//DBG_8192C("usb_read_port_cancel : usb_kill_urb \n");			
+			usb_kill_urb(precvbuf->purb);		
+		}		
+
+		precvbuf++;		
+	}
+
+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
+	usb_kill_urb(padapter->recvpriv.int_in_urb);
+#endif
+}
+
+void rtl8192du_xmit_tasklet(void *priv)
+{	
+	int ret = _FALSE;
+	_adapter *padapter = (_adapter*)priv;
+	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
+
+	if(check_fwstate(&padapter->mlmepriv, _FW_UNDER_SURVEY) == _TRUE ||
+#ifdef CONFIG_DUALMAC_CONCURRENT
+		(dc_check_xmit(padapter)== _FALSE) ||
+#endif
+		ATOMIC_READ(&(GET_HAL_DATA(padapter)->IQKRdyForXmit))==0)
+		return;
+
+	while(1)
+	{
+		if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE))
+		{
+			DBG_8192C("xmit_tasklet => bDriverStopped or bSurpriseRemoved \n");
+			break;
+		}
+
+		ret = rtl8192du_xmitframe_complete(padapter, pxmitpriv, NULL);
+
+		if(ret==_FALSE)
+			break;
+	}
+	
+}
+
+static void usb_write_port_complete(struct urb *purb, struct pt_regs *regs)
+{
+	_irqL irqL;
+	int i;
+	struct xmit_buf *pxmitbuf = (struct xmit_buf *)purb->context;
+	//struct xmit_frame *pxmitframe = (struct xmit_frame *)pxmitbuf->priv_data;
+	//_adapter			*padapter = pxmitframe->padapter;
+	_adapter	*padapter = pxmitbuf->padapter;
+       struct xmit_priv	*pxmitpriv = &padapter->xmitpriv;		
+	//struct pkt_attrib *pattrib = &pxmitframe->attrib;
+	   
+_func_enter_;
+
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("+usb_write_port_complete\n"));
+
+	switch(pxmitbuf->flags)
+	{
+		case XMIT_VO_QUEUE:
+			pxmitpriv->voq_cnt--;			
+			break;
+		case XMIT_VI_QUEUE:
+			pxmitpriv->viq_cnt--;		
+			break;
+		case XMIT_BE_QUEUE:
+			pxmitpriv->beq_cnt--;			
+			break;
+		case XMIT_BK_QUEUE:
+			pxmitpriv->bkq_cnt--;			
+			break;
+		case HIGH_QUEUE_INX:
+#ifdef CONFIG_AP_MODE			
+			rtw_chk_hi_queue_cmd(padapter);
+#endif
+			break;
+		default:			
+			break;
+	}
+		
+
+/*
+	_enter_critical(&pxmitpriv->lock, &irqL);
+
+	pxmitpriv->txirp_cnt--;
+	
+	switch(pattrib->priority) 
+	{
+		case 1:				
+		case 2:
+			pxmitpriv->bkq_cnt--;
+			//DBG_8192C("pxmitpriv->bkq_cnt=%d\n", pxmitpriv->bkq_cnt);
+			break;
+		case 4:
+		case 5:
+			pxmitpriv->viq_cnt--;
+			//DBG_8192C("pxmitpriv->viq_cnt=%d\n", pxmitpriv->viq_cnt);
+			break;
+		case 6:
+		case 7:
+			pxmitpriv->voq_cnt--;
+			//DBG_8192C("pxmitpriv->voq_cnt=%d\n", pxmitpriv->voq_cnt);
+			break;
+		case 0:
+		case 3:			
+		default:
+			pxmitpriv->beq_cnt--;
+			//DBG_8192C("pxmitpriv->beq_cnt=%d\n", pxmitpriv->beq_cnt);
+			break;
+			
+	}	
+	
+	_exit_critical(&pxmitpriv->lock, &irqL);
+	
+	
+	if(pxmitpriv->txirp_cnt==0)
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete: txirp_cnt== 0, set allrxreturnevt!\n"));		
+		_rtw_up_sema(&(pxmitpriv->tx_retevt));
+	}
+*/
+        //rtw_free_xmitframe_ex(pxmitpriv, pxmitframe);
+
+	rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
+	
+	if(padapter->bSurpriseRemoved || padapter->bDriverStopped ||padapter->bWritePortCancel)
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved));
+		goto exit;
+	}
+
+
+	if(purb->status==0)
+	{
+	
+	}
+	else
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete : purb->status(%d) != 0 \n", purb->status));
+		DBG_8192C("###=> urb_write_port_complete status(%d)\n",purb->status);
+		if((purb->status==-EPIPE)||(purb->status==-EPROTO))
+		{
+			//usb_clear_halt(pusbdev, purb->pipe);	
+			//msleep(10);
+		}		
+		else if(purb->status == (-ESHUTDOWN))
+		{
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete: ESHUTDOWN\n"));
+						
+			padapter->bDriverStopped=_TRUE;
+			
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete:bDriverStopped=TRUE\n"));
+
+			goto exit;
+		}
+		else
+		{					
+			padapter->bSurpriseRemoved=_TRUE;
+			DBG_8192C("bSurpriseRemoved=TRUE\n");
+			//rtl8192cu_trigger_gpio_0(padapter);
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete:bSurpriseRemoved=TRUE\n"));
+
+			goto exit;
+		}		
+
+		
+
+	}
+
+	
+	//if(rtw_txframes_pending(padapter))	
+	{
+		tasklet_hi_schedule(&pxmitpriv->xmit_tasklet);
+	}
+	
+
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("-usb_write_port_complete\n"));
+
+exit:
+
+_func_exit_;	
+
+}
+
+static u32 usb_write_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem)
+{    
+	_irqL irqL;
+	int pipe, status;
+	u32 ret, bwritezero = _FALSE;
+	PURB	purb = NULL;
+	_adapter *padapter = (_adapter *)pintfhdl->padapter;
+	struct dvobj_priv	*pdvobj = (struct dvobj_priv   *)&padapter->dvobjpriv;	
+	struct xmit_priv	*pxmitpriv = &padapter->xmitpriv;
+	struct xmit_buf *pxmitbuf = (struct xmit_buf *)wmem;
+	struct xmit_frame *pxmitframe = (struct xmit_frame *)pxmitbuf->priv_data;
+	struct usb_device *pusbd = pdvobj->pusbdev;
+	struct pkt_attrib *pattrib = &pxmitframe->attrib;
+	
+_func_enter_;	
+	
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("+usb_write_port\n"));
+	
+	if((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx))
+	{
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n"));
+		return _FAIL;
+	}
+	
+	_enter_critical(&pxmitpriv->lock, &irqL);
+
+	switch(addr)
+	{
+		case VO_QUEUE_INX:
+			pxmitpriv->voq_cnt++;
+			pxmitbuf->flags = XMIT_VO_QUEUE;
+			break;
+		case VI_QUEUE_INX:
+			pxmitpriv->viq_cnt++;
+			pxmitbuf->flags = XMIT_VI_QUEUE;
+			break;
+		case BE_QUEUE_INX:
+			pxmitpriv->beq_cnt++;
+			pxmitbuf->flags = XMIT_BE_QUEUE;
+			break;
+		case BK_QUEUE_INX:
+			pxmitpriv->bkq_cnt++;
+			pxmitbuf->flags = XMIT_BK_QUEUE;
+			break;
+		case HIGH_QUEUE_INX:
+			pxmitbuf->flags = HIGH_QUEUE_INX;
+			break;
+		default:
+			pxmitbuf->flags = XMIT_VO_QUEUE;
+			break;
+	}
+		
+	_exit_critical(&pxmitpriv->lock, &irqL);
+	
+/*
+	_enter_critical(&pxmitpriv->lock, &irqL);
+
+	//total irp 
+	pxmitpriv->txirp_cnt++;
+	
+	//per ac irp
+	switch(pattrib->priority) 
+	{
+		case 1:				
+		case 2:				
+			pxmitpriv->bkq_cnt++;
+			break;
+		case 4:
+		case 5:
+			pxmitpriv->viq_cnt++;
+			break;
+		case 6:
+		case 7:
+			pxmitpriv->voq_cnt++;
+			break;
+		case 0:
+		case 3:			
+		default:
+			pxmitpriv->beq_cnt++;
+			break;		
+	}
+
+
+	_exit_critical(&pxmitpriv->lock, &irqL);
+*/
+
+	purb	= pxmitbuf->pxmit_urb[0];
+
+#if 0
+	if(pdvobj->ishighspeed)
+	{
+		if(cnt> 0 && cnt%512 == 0)
+		{
+			//DBG_8192C("ishighspeed, cnt=%d\n", cnt);
+			bwritezero = _TRUE;			
+		}	
+	}
+	else
+	{
+		if(cnt > 0 && cnt%64 == 0)
+		{
+			//DBG_8192C("cnt=%d\n", cnt);
+			bwritezero = _TRUE;			
+		}	
+	}
+#endif
+
+	//translate DMA FIFO addr to pipehandle
+	pipe = ffaddr2pipehdl(pdvobj, addr);	
+
+#ifdef CONFIG_REDUCE_USB_TX_INT	
+	if ( (pxmitpriv->free_xmitbuf_cnt%NR_XMITBUFF == 0)
+		|| (pxmitbuf->ext_tag == _TRUE) )
+	{
+		purb->transfer_flags  &=  (~URB_NO_INTERRUPT);
+	} else {
+		purb->transfer_flags  |=  URB_NO_INTERRUPT;
+		//DBG_8192C("URB_NO_INTERRUPT ");
+	}
+#endif
+
+
+	usb_fill_bulk_urb(purb, pusbd, pipe, 
+       				pxmitframe->buf_addr,
+              			cnt,
+              			usb_write_port_complete,
+              			pxmitbuf);//context is pxmitbuf
+
+#ifdef CONFIG_USE_USB_BUFFER_ALLOC_TX
+	purb->transfer_dma = pxmitbuf->dma_transfer_addr;
+	purb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
+	purb->transfer_flags |= URB_ZERO_PACKET;
+#endif	// CONFIG_USE_USB_BUFFER_ALLOC_TX
+
+#if 0
+	if (bwritezero)
+        {
+            purb->transfer_flags |= URB_ZERO_PACKET;           
+        }			
+#endif
+
+	status = usb_submit_urb(purb, GFP_ATOMIC);
+
+	if (!status)
+	{		
+		ret= _SUCCESS;
+	}
+	else
+	{
+		DBG_8192C("usb_write_port, status=%d\n", status);
+		RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port(): usb_submit_urb, status=%x\n", status));
+		ret= _FAIL;
+	}
+	
+//   Commented by Albert 2009/10/13
+//   We add the URB_ZERO_PACKET flag to urb so that the host will send the zero packet automatically.
+/*	
+	if(bwritezero == _TRUE)
+	{
+		usb_bulkout_zero(pintfhdl, addr);
+	}
+*/
+
+_func_exit_;
+	
+	RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("-usb_write_port\n"));
+	
+	return ret;
+
+}
+
+static void usb_write_port_cancel(struct intf_hdl *pintfhdl)
+{
+	int i, j;
+	_adapter	*padapter = pintfhdl->padapter;
+	struct xmit_buf *pxmitbuf = (struct xmit_buf *)padapter->xmitpriv.pxmitbuf;
+
+	DBG_8192C("usb_write_port_cancel \n");
+	
+	padapter->bWritePortCancel = _TRUE;	
+	
+	for(i=0; i<NR_XMITBUFF; i++)
+	{
+		for(j=0; j<8; j++)
+		{
+		        if(pxmitbuf->pxmit_urb[j])
+		        {
+		                usb_kill_urb(pxmitbuf->pxmit_urb[j]);
+		        }
+		}
+		
+		pxmitbuf++;
+	}
+
+}
+
+
+void rtl8192du_set_intf_ops(struct _io_ops	*pops)
+{
+	_func_enter_;
+	
+	_rtw_memset((u8 *)pops, 0, sizeof(struct _io_ops));	
+
+	pops->_read8 = &usb_read8;
+	pops->_read16 = &usb_read16;
+	pops->_read32 = &usb_read32;
+	pops->_read_mem = &usb_read_mem;
+	pops->_read_port = &usb_read_port;	
+	
+	pops->_write8 = &usb_write8;
+	pops->_write16 = &usb_write16;
+	pops->_write32 = &usb_write32;
+	pops->_writeN = &usb_writeN;
+	
+#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ		
+	pops->_write8_async= &usb_async_write8;
+	pops->_write16_async = &usb_async_write16;
+	pops->_write32_async = &usb_async_write32;
+#endif
+	pops->_write_mem = &usb_write_mem;
+	pops->_write_port = &usb_write_port;
+
+
+	pops->_read_port_cancel = &usb_read_port_cancel;
+	pops->_write_port_cancel = &usb_write_port_cancel;
+
+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
+	pops->_read_interrupt = &usb_read_interrupt;
+#endif
+
+	_func_exit_;
+
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/ifcfg-wlan0 linux-3.0.82x/drivers/net/wireless/rtl8188/ifcfg-wlan0
--- linux-3.0.82/drivers/net/wireless/rtl8188/ifcfg-wlan0	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/ifcfg-wlan0	2017-09-23 03:42:49.990675150 +0800
@@ -0,0 +1,4 @@
+#DHCP client
+DEVICE=wlan0
+BOOTPROTO=dhcp
+ONBOOT=yes
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/autoconf.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/autoconf.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/autoconf.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/autoconf.h	2017-09-23 03:42:49.990675150 +0800
@@ -0,0 +1,268 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+/*
+ * Public  General Config
+ */
+#define AUTOCONF_INCLUDED
+#define RTL871X_MODULE_NAME "92CU"
+#define DRV_NAME "rtl8192cu"
+
+#define CONFIG_USB_HCI	1
+
+#define CONFIG_RTL8192C	1
+
+#define PLATFORM_LINUX	1
+
+
+/*
+ * Internal  General Config
+ */
+//#define CONFIG_PWRCTRL
+//#define CONFIG_H2CLBK
+
+#define CONFIG_EMBEDDED_FWIMG	1
+//#define CONFIG_FILE_FWIMG
+
+#define CONFIG_R871X_TEST	1
+
+#define CONFIG_80211N_HT	1
+
+#define CONFIG_RECV_REORDERING_CTRL	1
+
+//#define CONFIG_TCP_CSUM_OFFLOAD_RX	1
+
+//#define CONFIG_DRVEXT_MODULE	1
+
+#ifndef CONFIG_MP_INCLUDED
+	#define CONFIG_IPS	1
+	#ifdef CONFIG_IPS
+		//#define CONFIG_IPS_LEVEL_2	1 //enable this to set default IPS mode to IPS_LEVEL_2
+	#endif
+	#define SUPPORT_HW_RFOFF_DETECTED	1
+	
+	#define CONFIG_LPS	1
+	#define CONFIG_BT_COEXIST	1
+	//befor link
+	#define CONFIG_ANTENNA_DIVERSITY	 	
+	//after link
+	#ifdef CONFIG_ANTENNA_DIVERSITY
+	#define CONFIG_SW_ANTENNA_DIVERSITY	 
+	//#define CONFIG_HW_ANTENNA_DIVERSITY	
+	#endif
+	
+	#define CONFIG_IOL
+#else  //#ifndef CONFIG_MP_INCLUDED
+	#define CONFIG_MP_IWPRIV_SUPPORT	1
+#endif  //#ifndef CONFIG_MP_INCLUDED
+
+#define CONFIG_AP_MODE	1
+#define CONFIG_NATIVEAP_MLME	1
+
+//	Added by Albert 20110314
+#define CONFIG_P2P	1
+
+
+#ifdef CONFIG_P2P
+//	Added by Albert 20110812
+//	The CONFIG_WFD is for supporting the Wi-Fi display
+//#define CONFIG_WFD	1
+
+//	Unmarked if there is low p2p scanned ratio; Kurt
+//#define CONFIG_P2P_AGAINST_NOISE	1
+#endif
+
+//	Added by Kurt 20110511
+//#define CONFIG_TDLS	1
+			
+#ifdef CONFIG_AP_MODE
+	#ifndef CONFIG_NATIVEAP_MLME
+		#define CONFIG_HOSTAPD_MLME	1
+	#endif			
+	#define CONFIG_FIND_BEST_CHANNEL	1
+#endif
+
+#define CONFIG_SKB_COPY	1//for amsdu
+
+#define CONFIG_LED
+#ifdef CONFIG_LED
+	#define CONFIG_SW_LED
+	#ifdef CONFIG_SW_LED
+		//#define CONFIG_LED_HANDLED_BY_CMD_THREAD
+	#endif
+#endif // CONFIG_LED
+
+
+
+#define USB_INTERFERENCE_ISSUE // this should be checked in all usb interface
+#define CONFIG_GLOBAL_UI_PID
+
+#define CONFIG_LAYER2_ROAMING
+#define CONFIG_LAYER2_ROAMING_RESUME
+//#define CONFIG_ADAPTOR_INFO_CACHING_FILE // now just applied on 8192cu only, should make it general...
+//#define CONFIG_RESUME_IN_WORKQUEUE
+//#define CONFIG_SET_SCAN_DENY_TIMER
+#define CONFIG_LONG_DELAY_ISSUE
+#define CONFIG_NEW_SIGNAL_STAT_PROCESS
+//#define CONFIG_SIGNAL_DISPLAY_DBM //display RX signal with dbm
+
+#ifdef CONFIG_IOL
+	#define CONFIG_IOL_LLT
+	#define CONFIG_IOL_MAC
+	#define CONFIG_IOL_BB_PHY_REG
+	#define CONFIG_IOL_BB_AGC_TAB
+	#define CONFIG_IOL_RF_RF90_PATH_A
+	#define CONFIG_IOL_RF_RF90_PATH_B
+#endif
+
+#define CONFIG_BR_EXT	1	// Enable NAT2.5 support for STA mode interface with a L2 Bridge
+#ifdef CONFIG_BR_EXT
+#define CONFIG_BR_EXT_BRNAME	"br0"
+#endif	// CONFIG_BR_EXT
+
+#define CONFIG_TX_MCAST2UNI	1	// Support IP multicast->unicast
+//#define CONFIG_CHECK_AC_LIFETIME 1	// Check packet lifetime of 4 ACs.
+
+
+/*
+ * Interface  Related Config
+ */
+//#define CONFIG_USB_INTERRUPT_IN_PIPE	1
+
+#ifndef CONFIG_MINIMAL_MEMORY_USAGE
+	#define CONFIG_USB_TX_AGGREGATION	1
+	#define CONFIG_USB_RX_AGGREGATION	1
+#endif
+
+#define CONFIG_PREALLOC_RECV_SKB	1
+//#define CONFIG_REDUCE_USB_TX_INT	1	// Trade-off: Improve performance, but may cause TX URBs blocked by USB Host/Bus driver on few platforms.
+//#define CONFIG_EASY_REPLACEMENT	1
+
+/* 
+ * CONFIG_USE_USB_BUFFER_ALLOC_XX uses Linux USB Buffer alloc API and is for Linux platform only now!
+ */
+#define CONFIG_USE_USB_BUFFER_ALLOC_TX 1	// Trade-off: For TX path, improve stability on some platforms, but may cause performance degrade on other platforms.
+//#define CONFIG_USE_USB_BUFFER_ALLOC_RX 1	// For RX path
+
+/* 
+ * USB VENDOR REQ BUFFER ALLOCATION METHOD
+ * if not set we'll use function local variable (stack memory)
+ */
+//#define CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE
+#define CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC
+
+#define CONFIG_USB_VENDOR_REQ_MUTEX
+#define CONFIG_VENDOR_REQ_RETRY
+
+//#define CONFIG_USB_SUPPORT_ASYNC_VDN_REQ 1
+
+
+/*
+ * HAL  Related Config
+ */
+
+#define RTL8192C_RX_PACKET_NO_INCLUDE_CRC	1
+
+#define SUPPORTED_BLOCK_IO
+
+
+
+#define RTL8192CU_FW_DOWNLOAD_ENABLE	1
+
+#define CONFIG_ONLY_ONE_OUT_EP_TO_LOW	0
+
+#define CONFIG_OUT_EP_WIFI_MODE	0
+
+#define ENABLE_USB_DROP_INCORRECT_OUT	0
+
+#define RTL8192CU_ASIC_VERIFICATION	0	// For ASIC verification.
+
+#define RTL8192CU_ADHOC_WORKAROUND_SETTING	1
+
+#define DISABLE_BB_RF	0
+
+#define RTL8191C_FPGA_NETWORKTYPE_ADHOC 0
+
+#ifdef CONFIG_MP_INCLUDED
+	#define MP_DRIVER 1
+	#undef CONFIG_USB_TX_AGGREGATION
+	#undef CONFIG_USB_RX_AGGREGATION
+#else
+	#define MP_DRIVER 0
+#endif
+
+
+/*
+ * Platform  Related Config
+ */
+#ifdef CONFIG_PLATFORM_MN10300
+#define CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV
+
+#if	defined (CONFIG_SW_ANTENNA_DIVERSITY)
+	#undef CONFIG_SW_ANTENNA_DIVERSITY
+	#define CONFIG_HW_ANTENNA_DIVERSITY
+#endif
+
+#endif
+
+#ifdef CONFIG_WISTRON_PLATFORM
+
+#endif
+
+#ifdef CONFIG_PLATFORM_TI_DM365
+#define CONFIG_USE_USB_BUFFER_ALLOC_RX 1
+#endif
+
+
+/*
+ * Debug  Related Config
+ */
+//#define CONFIG_DEBUG_RTL871X
+
+#define DBG	0
+#define CONFIG_DEBUG_RTL819X
+
+#define CONFIG_PROC_DEBUG	1
+
+//#define DBG_IO
+//#define DBG_DELAY_OS
+//#define DBG_MEM_ALLOC
+//#define DBG_IOCTL
+
+//#define DBG_TX
+//#define DBG_XMIT_BUF
+//#define DBG_TX_DROP_FRAME
+
+//#define DBG_RX_DROP_FRAME
+//#define DBG_RX_SEQ
+//#define DBG_RX_SIGNAL_DISPLAY_PROCESSING
+//#define DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED "jeff-ap"
+
+
+
+//#define DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE
+//#define DBG_ROAMING_TEST
+
+//#define DBG_HAL_INIT_PROFILING
+#define DBG_MEMORY_LEAK	1
+
+#define DBG_CONFIG_ERROR_DETECT
+//#define DBG_CONFIG_ERROR_RESET
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/basic_types.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/basic_types.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/basic_types.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/basic_types.h	2017-09-23 03:42:49.990675150 +0800
@@ -0,0 +1,276 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __BASIC_TYPES_H__
+#define __BASIC_TYPES_H__
+
+#include <drv_conf.h>
+
+
+#define SUCCESS	0
+#define FAIL	(-1)
+
+#ifndef TRUE
+	#define _TRUE	1
+#else
+	#define _TRUE	TRUE	
+#endif
+		
+#ifndef FALSE		
+	#define _FALSE	0
+#else
+	#define _FALSE	FALSE	
+#endif
+
+#ifdef PLATFORM_WINDOWS
+
+	typedef signed char s8;
+	typedef unsigned char u8;
+
+	typedef signed short s16;
+	typedef unsigned short u16;
+
+	typedef signed long s32;
+	typedef unsigned long u32;
+	
+	typedef unsigned int	uint;
+	typedef	signed int		sint;
+
+
+	typedef signed long long s64;
+	typedef unsigned long long u64;
+
+	#ifdef NDIS50_MINIPORT
+	
+		#define NDIS_MAJOR_VERSION       5
+		#define NDIS_MINOR_VERSION       0
+
+	#endif
+
+	#ifdef NDIS51_MINIPORT
+
+		#define NDIS_MAJOR_VERSION       5
+		#define NDIS_MINOR_VERSION       1
+
+	#endif
+
+	typedef NDIS_PROC proc_t;
+
+	typedef LONG atomic_t;
+
+#endif
+
+
+#ifdef PLATFORM_LINUX
+
+	#include <linux/types.h>
+	#define IN
+	#define OUT
+	#define VOID void
+	#define NDIS_OID uint
+	#define NDIS_STATUS uint
+
+	typedef	signed int sint;
+
+	#ifndef	PVOID
+	typedef void * PVOID;
+	//#define PVOID	(void *)
+	#endif
+
+        #define UCHAR u8
+	#define USHORT u16
+	#define UINT u32
+	#define ULONG u32	
+
+	typedef void (*proc_t)(void*);
+
+	typedef 	__kernel_size_t	SIZE_T;	
+	typedef	__kernel_ssize_t	SSIZE_T;
+	#define FIELD_OFFSET(s,field)	((SSIZE_T)&((s*)(0))->field)
+	
+#endif
+
+#define MEM_ALIGNMENT_OFFSET	(sizeof (SIZE_T))
+#define MEM_ALIGNMENT_PADDING	(sizeof(SIZE_T) - 1)
+
+#define SIZE_PTR SIZE_T
+#define SSIZE_PTR SSIZE_T
+
+//port from fw by thomas
+// TODO: Belows are Sync from SD7-Driver. It is necessary to check correctness
+
+/*
+ *	Call endian free function when
+ *		1. Read/write packet content.
+ *		2. Before write integer to IO.
+ *		3. After read integer from IO.
+*/
+
+//
+// Byte Swapping routine.
+//
+#define EF1Byte	
+#define EF2Byte 	le16_to_cpu
+#define EF4Byte	le32_to_cpu
+
+//
+// Read LE format data from memory
+//
+#define ReadEF1Byte(_ptr)		EF1Byte(*((u8 *)(_ptr)))
+#define ReadEF2Byte(_ptr)		EF2Byte(*((u16 *)(_ptr)))
+#define ReadEF4Byte(_ptr)		EF4Byte(*((u32 *)(_ptr)))
+
+//
+// Write LE data to memory
+//
+#define WriteEF1Byte(_ptr, _val)	(*((u8 *)(_ptr)))=EF1Byte(_val)
+#define WriteEF2Byte(_ptr, _val)	(*((u16 *)(_ptr)))=EF2Byte(_val)
+#define WriteEF4Byte(_ptr, _val)	(*((u32 *)(_ptr)))=EF4Byte(_val)									
+
+//
+//	Example:
+//		BIT_LEN_MASK_32(0) => 0x00000000
+//		BIT_LEN_MASK_32(1) => 0x00000001
+//		BIT_LEN_MASK_32(2) => 0x00000003
+//		BIT_LEN_MASK_32(32) => 0xFFFFFFFF
+//
+#define BIT_LEN_MASK_32(__BitLen) \
+	(0xFFFFFFFF >> (32 - (__BitLen)))
+//
+//	Example:
+//		BIT_OFFSET_LEN_MASK_32(0, 2) => 0x00000003
+//		BIT_OFFSET_LEN_MASK_32(16, 2) => 0x00030000
+//
+#define BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen) \
+	(BIT_LEN_MASK_32(__BitLen) << (__BitOffset)) 
+
+//
+//	Description:
+//		Return 4-byte value in host byte ordering from
+//		4-byte pointer in litten-endian system.
+//
+#define LE_P4BYTE_TO_HOST_4BYTE(__pStart) \
+	(EF4Byte(*((u32 *)(__pStart))))
+
+//
+//	Description:
+//		Translate subfield (continuous bits in little-endian) of 4-byte value in litten byte to
+//		4-byte value in host byte ordering.
+//
+#define LE_BITS_TO_4BYTE(__pStart, __BitOffset, __BitLen) \
+	( \
+		( LE_P4BYTE_TO_HOST_4BYTE(__pStart) >> (__BitOffset) ) \
+		& \
+		BIT_LEN_MASK_32(__BitLen) \
+	)
+
+//
+//	Description:
+//		Mask subfield (continuous bits in little-endian) of 4-byte value in litten byte oredering  
+//		and return the result in 4-byte value in host byte ordering.
+//
+#define LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \
+	( \
+		LE_P4BYTE_TO_HOST_4BYTE(__pStart) \
+		& \
+		( ~BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen) ) \
+	)
+
+//
+//	Description:
+//		Set subfield of little-endian 4-byte value to specified value.	
+//
+#define SET_BITS_TO_LE_4BYTE(__pStart, __BitOffset, __BitLen, __Value) \
+	*((u32 *)(__pStart)) = \
+		EF4Byte( \
+			LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \
+			| \
+			( (((u32)__Value) & BIT_LEN_MASK_32(__BitLen)) << (__BitOffset) ) \
+		);
+
+		
+#define BIT_LEN_MASK_16(__BitLen) \
+		(0xFFFF >> (16 - (__BitLen)))
+		
+#define BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen) \
+	(BIT_LEN_MASK_16(__BitLen) << (__BitOffset))
+	
+#define LE_P2BYTE_TO_HOST_2BYTE(__pStart) \
+	(EF2Byte(*((u16 *)(__pStart))))
+	
+#define LE_BITS_TO_2BYTE(__pStart, __BitOffset, __BitLen) \
+	( \
+		( LE_P2BYTE_TO_HOST_2BYTE(__pStart) >> (__BitOffset) ) \
+		& \
+		BIT_LEN_MASK_16(__BitLen) \
+	)
+	
+#define LE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \
+	( \
+		LE_P2BYTE_TO_HOST_2BYTE(__pStart) \
+		& \
+		( ~BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen) ) \
+	)
+
+#define SET_BITS_TO_LE_2BYTE(__pStart, __BitOffset, __BitLen, __Value) \
+	*((u16 *)(__pStart)) = \
+		EF2Byte( \
+			LE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \
+			| \
+			( (((u16)__Value) & BIT_LEN_MASK_16(__BitLen)) << (__BitOffset) ) \
+		);
+			
+#define BIT_LEN_MASK_8(__BitLen) \
+		(0xFF >> (8 - (__BitLen)))
+
+#define BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen) \
+	(BIT_LEN_MASK_8(__BitLen) << (__BitOffset))
+
+#define LE_P1BYTE_TO_HOST_1BYTE(__pStart) \
+	(EF1Byte(*((u8 *)(__pStart))))
+
+#define LE_BITS_TO_1BYTE(__pStart, __BitOffset, __BitLen) \
+	( \
+		( LE_P1BYTE_TO_HOST_1BYTE(__pStart) >> (__BitOffset) ) \
+		& \
+		BIT_LEN_MASK_8(__BitLen) \
+	)
+
+#define LE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \
+	( \
+		LE_P1BYTE_TO_HOST_1BYTE(__pStart) \
+		& \
+		( ~BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen) ) \
+	)
+
+#define SET_BITS_TO_LE_1BYTE(__pStart, __BitOffset, __BitLen, __Value) \
+	*((u8 *)(__pStart)) = \
+		EF1Byte( \
+			LE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \
+			| \
+			( (((u8)__Value) & BIT_LEN_MASK_8(__BitLen)) << (__BitOffset) ) \
+		);
+
+// Get the N-bytes aligment offset from the current length
+#define N_BYTE_ALIGMENT(__Value, __Aligment) ((__Aligment == 1) ? (__Value) : (((__Value + __Aligment - 1) / __Aligment) * __Aligment))
+
+typedef unsigned char	BOOLEAN,*PBOOLEAN;
+
+#endif //__BASIC_TYPES_H__
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/byteorder/big_endian.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/byteorder/big_endian.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/byteorder/big_endian.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/byteorder/big_endian.h	2017-09-23 03:42:49.994675138 +0800
@@ -0,0 +1,87 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef _LINUX_BYTEORDER_BIG_ENDIAN_H
+#define _LINUX_BYTEORDER_BIG_ENDIAN_H
+
+#ifndef __BIG_ENDIAN
+#define __BIG_ENDIAN 4321
+#endif
+#ifndef __BIG_ENDIAN_BITFIELD
+#define __BIG_ENDIAN_BITFIELD
+#endif
+
+#include <byteorder/swab.h>
+
+#define __constant_htonl(x) ((__u32)(x))
+#define __constant_ntohl(x) ((__u32)(x))
+#define __constant_htons(x) ((__u16)(x))
+#define __constant_ntohs(x) ((__u16)(x))
+#define __constant_cpu_to_le64(x) ___constant_swab64((x))
+#define __constant_le64_to_cpu(x) ___constant_swab64((x))
+#define __constant_cpu_to_le32(x) ___constant_swab32((x))
+#define __constant_le32_to_cpu(x) ___constant_swab32((x))
+#define __constant_cpu_to_le16(x) ___constant_swab16((x))
+#define __constant_le16_to_cpu(x) ___constant_swab16((x))
+#define __constant_cpu_to_be64(x) ((__u64)(x))
+#define __constant_be64_to_cpu(x) ((__u64)(x))
+#define __constant_cpu_to_be32(x) ((__u32)(x))
+#define __constant_be32_to_cpu(x) ((__u32)(x))
+#define __constant_cpu_to_be16(x) ((__u16)(x))
+#define __constant_be16_to_cpu(x) ((__u16)(x))
+#define __cpu_to_le64(x) __swab64((x))
+#define __le64_to_cpu(x) __swab64((x))
+#define __cpu_to_le32(x) __swab32((x))
+#define __le32_to_cpu(x) __swab32((x))
+#define __cpu_to_le16(x) __swab16((x))
+#define __le16_to_cpu(x) __swab16((x))
+#define __cpu_to_be64(x) ((__u64)(x))
+#define __be64_to_cpu(x) ((__u64)(x))
+#define __cpu_to_be32(x) ((__u32)(x))
+#define __be32_to_cpu(x) ((__u32)(x))
+#define __cpu_to_be16(x) ((__u16)(x))
+#define __be16_to_cpu(x) ((__u16)(x))
+#define __cpu_to_le64p(x) __swab64p((x))
+#define __le64_to_cpup(x) __swab64p((x))
+#define __cpu_to_le32p(x) __swab32p((x))
+#define __le32_to_cpup(x) __swab32p((x))
+#define __cpu_to_le16p(x) __swab16p((x))
+#define __le16_to_cpup(x) __swab16p((x))
+#define __cpu_to_be64p(x) (*(__u64*)(x))
+#define __be64_to_cpup(x) (*(__u64*)(x))
+#define __cpu_to_be32p(x) (*(__u32*)(x))
+#define __be32_to_cpup(x) (*(__u32*)(x))
+#define __cpu_to_be16p(x) (*(__u16*)(x))
+#define __be16_to_cpup(x) (*(__u16*)(x))
+#define __cpu_to_le64s(x) __swab64s((x))
+#define __le64_to_cpus(x) __swab64s((x))
+#define __cpu_to_le32s(x) __swab32s((x))
+#define __le32_to_cpus(x) __swab32s((x))
+#define __cpu_to_le16s(x) __swab16s((x))
+#define __le16_to_cpus(x) __swab16s((x))
+#define __cpu_to_be64s(x) do {} while (0)
+#define __be64_to_cpus(x) do {} while (0)
+#define __cpu_to_be32s(x) do {} while (0)
+#define __be32_to_cpus(x) do {} while (0)
+#define __cpu_to_be16s(x) do {} while (0)
+#define __be16_to_cpus(x) do {} while (0)
+
+#include <byteorder/generic.h>
+
+#endif /* _LINUX_BYTEORDER_BIG_ENDIAN_H */
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/byteorder/generic.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/byteorder/generic.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/byteorder/generic.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/byteorder/generic.h	2017-09-23 03:42:49.994675138 +0800
@@ -0,0 +1,209 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef _LINUX_BYTEORDER_GENERIC_H
+#define _LINUX_BYTEORDER_GENERIC_H
+
+/*
+ * linux/byteorder_generic.h
+ * Generic Byte-reordering support
+ *
+ * Francois-Rene Rideau <fare@tunes.org> 19970707
+ *    gathered all the good ideas from all asm-foo/byteorder.h into one file,
+ *    cleaned them up.
+ *    I hope it is compliant with non-GCC compilers.
+ *    I decided to put __BYTEORDER_HAS_U64__ in byteorder.h,
+ *    because I wasn't sure it would be ok to put it in types.h
+ *    Upgraded it to 2.1.43
+ * Francois-Rene Rideau <fare@tunes.org> 19971012
+ *    Upgraded it to 2.1.57
+ *    to please Linus T., replaced huge #ifdef's between little/big endian
+ *    by nestedly #include'd files.
+ * Francois-Rene Rideau <fare@tunes.org> 19971205
+ *    Made it to 2.1.71; now a facelift:
+ *    Put files under include/linux/byteorder/
+ *    Split swab from generic support.
+ *
+ * TODO:
+ *   = Regular kernel maintainers could also replace all these manual
+ *    byteswap macros that remain, disseminated among drivers,
+ *    after some grep or the sources...
+ *   = Linus might want to rename all these macros and files to fit his taste,
+ *    to fit his personal naming scheme.
+ *   = it seems that a few drivers would also appreciate
+ *    nybble swapping support...
+ *   = every architecture could add their byteswap macro in asm/byteorder.h
+ *    see how some architectures already do (i386, alpha, ppc, etc)
+ *   = cpu_to_beXX and beXX_to_cpu might some day need to be well
+ *    distinguished throughout the kernel. This is not the case currently,
+ *    since little endian, big endian, and pdp endian machines needn't it.
+ *    But this might be the case for, say, a port of Linux to 20/21 bit
+ *    architectures (and F21 Linux addict around?).
+ */
+
+/*
+ * The following macros are to be defined by <asm/byteorder.h>:
+ *
+ * Conversion of long and short int between network and host format
+ *	ntohl(__u32 x)
+ *	ntohs(__u16 x)
+ *	htonl(__u32 x)
+ *	htons(__u16 x)
+ * It seems that some programs (which? where? or perhaps a standard? POSIX?)
+ * might like the above to be functions, not macros (why?).
+ * if that's true, then detect them, and take measures.
+ * Anyway, the measure is: define only ___ntohl as a macro instead,
+ * and in a separate file, have
+ * unsigned long inline ntohl(x){return ___ntohl(x);}
+ *
+ * The same for constant arguments
+ *	__constant_ntohl(__u32 x)
+ *	__constant_ntohs(__u16 x)
+ *	__constant_htonl(__u32 x)
+ *	__constant_htons(__u16 x)
+ *
+ * Conversion of XX-bit integers (16- 32- or 64-)
+ * between native CPU format and little/big endian format
+ * 64-bit stuff only defined for proper architectures
+ *	cpu_to_[bl]eXX(__uXX x)
+ *	[bl]eXX_to_cpu(__uXX x)
+ *
+ * The same, but takes a pointer to the value to convert
+ *	cpu_to_[bl]eXXp(__uXX x)
+ *	[bl]eXX_to_cpup(__uXX x)
+ *
+ * The same, but change in situ
+ *	cpu_to_[bl]eXXs(__uXX x)
+ *	[bl]eXX_to_cpus(__uXX x)
+ *
+ * See asm-foo/byteorder.h for examples of how to provide
+ * architecture-optimized versions
+ *
+ */
+
+
+#if defined(PLATFORM_LINUX) || defined(PLATFORM_WINDOWS) || defined(PLATFORM_MPIXEL)
+/*
+ * inside the kernel, we can use nicknames;
+ * outside of it, we must avoid POSIX namespace pollution...
+ */
+#define cpu_to_le64 __cpu_to_le64
+#define le64_to_cpu __le64_to_cpu
+#define cpu_to_le32 __cpu_to_le32
+#define le32_to_cpu __le32_to_cpu
+#define cpu_to_le16 __cpu_to_le16
+#define le16_to_cpu __le16_to_cpu
+#define cpu_to_be64 __cpu_to_be64
+#define be64_to_cpu __be64_to_cpu
+#define cpu_to_be32 __cpu_to_be32
+#define be32_to_cpu __be32_to_cpu
+#define cpu_to_be16 __cpu_to_be16
+#define be16_to_cpu __be16_to_cpu
+#define cpu_to_le64p __cpu_to_le64p
+#define le64_to_cpup __le64_to_cpup
+#define cpu_to_le32p __cpu_to_le32p
+#define le32_to_cpup __le32_to_cpup
+#define cpu_to_le16p __cpu_to_le16p
+#define le16_to_cpup __le16_to_cpup
+#define cpu_to_be64p __cpu_to_be64p
+#define be64_to_cpup __be64_to_cpup
+#define cpu_to_be32p __cpu_to_be32p
+#define be32_to_cpup __be32_to_cpup
+#define cpu_to_be16p __cpu_to_be16p
+#define be16_to_cpup __be16_to_cpup
+#define cpu_to_le64s __cpu_to_le64s
+#define le64_to_cpus __le64_to_cpus
+#define cpu_to_le32s __cpu_to_le32s
+#define le32_to_cpus __le32_to_cpus
+#define cpu_to_le16s __cpu_to_le16s
+#define le16_to_cpus __le16_to_cpus
+#define cpu_to_be64s __cpu_to_be64s
+#define be64_to_cpus __be64_to_cpus
+#define cpu_to_be32s __cpu_to_be32s
+#define be32_to_cpus __be32_to_cpus
+#define cpu_to_be16s __cpu_to_be16s
+#define be16_to_cpus __be16_to_cpus
+#endif
+
+
+/*
+ * Handle ntohl and suches. These have various compatibility
+ * issues - like we want to give the prototype even though we
+ * also have a macro for them in case some strange program
+ * wants to take the address of the thing or something..
+ *
+ * Note that these used to return a "long" in libc5, even though
+ * long is often 64-bit these days.. Thus the casts.
+ *
+ * They have to be macros in order to do the constant folding
+ * correctly - if the argument passed into a inline function
+ * it is no longer constant according to gcc..
+ */
+
+#undef ntohl
+#undef ntohs
+#undef htonl
+#undef htons
+
+/*
+ * Do the prototypes. Somebody might want to take the
+ * address or some such sick thing..
+ */
+#if defined(PLATFORM_LINUX) || (defined (__GLIBC__) && __GLIBC__ >= 2)
+extern __u32			ntohl(__u32);
+extern __u32			htonl(__u32);
+#else
+extern unsigned long int	ntohl(unsigned long int);
+extern unsigned long int	htonl(unsigned long int);
+#endif
+extern unsigned short int	ntohs(unsigned short int);
+extern unsigned short int	htons(unsigned short int);
+
+
+#if defined(__GNUC__) && (__GNUC__ >= 2) && defined(__OPTIMIZE__) ||  defined(PLATFORM_MPIXEL)
+
+#define ___htonl(x) __cpu_to_be32(x)
+#define ___htons(x) __cpu_to_be16(x)
+#define ___ntohl(x) __be32_to_cpu(x)
+#define ___ntohs(x) __be16_to_cpu(x)
+
+#if defined(PLATFORM_LINUX) || (defined (__GLIBC__) && __GLIBC__ >= 2)
+#define htonl(x) ___htonl(x)
+#define ntohl(x) ___ntohl(x)
+#else
+#define htonl(x) ((unsigned long)___htonl(x))
+#define ntohl(x) ((unsigned long)___ntohl(x))
+#endif
+#define htons(x) ___htons(x)
+#define ntohs(x) ___ntohs(x)
+
+#endif /* OPTIMIZE */
+
+
+#if defined (PLATFORM_WINDOWS)
+
+#define htonl(x) __cpu_to_be32(x)
+#define ntohl(x) __be32_to_cpu(x)
+#define htons(x) __cpu_to_be16(x)
+#define ntohs(x) __be16_to_cpu(x)
+
+
+#endif
+
+#endif /* _LINUX_BYTEORDER_GENERIC_H */
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/byteorder/little_endian.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/byteorder/little_endian.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/byteorder/little_endian.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/byteorder/little_endian.h	2017-09-23 03:42:49.994675138 +0800
@@ -0,0 +1,89 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef _LINUX_BYTEORDER_LITTLE_ENDIAN_H
+#define _LINUX_BYTEORDER_LITTLE_ENDIAN_H
+
+#ifndef __LITTLE_ENDIAN
+#define __LITTLE_ENDIAN 1234
+#endif
+#ifndef __LITTLE_ENDIAN_BITFIELD
+#define __LITTLE_ENDIAN_BITFIELD
+#endif
+
+#include <byteorder/swab.h>
+
+#ifndef __constant_htonl
+#define __constant_htonl(x) ___constant_swab32((x))
+#define __constant_ntohl(x) ___constant_swab32((x))
+#define __constant_htons(x) ___constant_swab16((x))
+#define __constant_ntohs(x) ___constant_swab16((x))
+#define __constant_cpu_to_le64(x) ((__u64)(x))
+#define __constant_le64_to_cpu(x) ((__u64)(x))
+#define __constant_cpu_to_le32(x) ((__u32)(x))
+#define __constant_le32_to_cpu(x) ((__u32)(x))
+#define __constant_cpu_to_le16(x) ((__u16)(x))
+#define __constant_le16_to_cpu(x) ((__u16)(x))
+#define __constant_cpu_to_be64(x) ___constant_swab64((x))
+#define __constant_be64_to_cpu(x) ___constant_swab64((x))
+#define __constant_cpu_to_be32(x) ___constant_swab32((x))
+#define __constant_be32_to_cpu(x) ___constant_swab32((x))
+#define __constant_cpu_to_be16(x) ___constant_swab16((x))
+#define __constant_be16_to_cpu(x) ___constant_swab16((x))
+#define __cpu_to_le64(x) ((__u64)(x))
+#define __le64_to_cpu(x) ((__u64)(x))
+#define __cpu_to_le32(x) ((__u32)(x))
+#define __le32_to_cpu(x) ((__u32)(x))
+#define __cpu_to_le16(x) ((__u16)(x))
+#define __le16_to_cpu(x) ((__u16)(x))
+#define __cpu_to_be64(x) __swab64((x))
+#define __be64_to_cpu(x) __swab64((x))
+#define __cpu_to_be32(x) __swab32((x))
+#define __be32_to_cpu(x) __swab32((x))
+#define __cpu_to_be16(x) __swab16((x))
+#define __be16_to_cpu(x) __swab16((x))
+#define __cpu_to_le64p(x) (*(__u64*)(x))
+#define __le64_to_cpup(x) (*(__u64*)(x))
+#define __cpu_to_le32p(x) (*(__u32*)(x))
+#define __le32_to_cpup(x) (*(__u32*)(x))
+#define __cpu_to_le16p(x) (*(__u16*)(x))
+#define __le16_to_cpup(x) (*(__u16*)(x))
+#define __cpu_to_be64p(x) __swab64p((x))
+#define __be64_to_cpup(x) __swab64p((x))
+#define __cpu_to_be32p(x) __swab32p((x))
+#define __be32_to_cpup(x) __swab32p((x))
+#define __cpu_to_be16p(x) __swab16p((x))
+#define __be16_to_cpup(x) __swab16p((x))
+#define __cpu_to_le64s(x) do {} while (0)
+#define __le64_to_cpus(x) do {} while (0)
+#define __cpu_to_le32s(x) do {} while (0)
+#define __le32_to_cpus(x) do {} while (0)
+#define __cpu_to_le16s(x) do {} while (0)
+#define __le16_to_cpus(x) do {} while (0)
+#define __cpu_to_be64s(x) __swab64s((x))
+#define __be64_to_cpus(x) __swab64s((x))
+#define __cpu_to_be32s(x) __swab32s((x))
+#define __be32_to_cpus(x) __swab32s((x))
+#define __cpu_to_be16s(x) __swab16s((x))
+#define __be16_to_cpus(x) __swab16s((x))
+#endif	// __constant_htonl
+
+#include <byteorder/generic.h>
+
+#endif /* _LINUX_BYTEORDER_LITTLE_ENDIAN_H */
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/byteorder/swabb.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/byteorder/swabb.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/byteorder/swabb.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/byteorder/swabb.h	2017-09-23 03:42:49.994675138 +0800
@@ -0,0 +1,157 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef _LINUX_BYTEORDER_SWABB_H
+#define _LINUX_BYTEORDER_SWABB_H
+
+/*
+ * linux/byteorder/swabb.h
+ * SWAp Bytes Bizarrely
+ *	swaHHXX[ps]?(foo)
+ *
+ * Support for obNUXIous pdp-endian and other bizarre architectures.
+ * Will Linux ever run on such ancient beasts? if not, this file
+ * will be but a programming pearl. Still, it's a reminder that we
+ * shouldn't be making too many assumptions when trying to be portable.
+ *
+ */
+
+/*
+ * Meaning of the names I chose (vaxlinux people feel free to correct them):
+ * swahw32	swap 16-bit half-words in a 32-bit word
+ * swahb32	swap 8-bit halves of each 16-bit half-word in a 32-bit word
+ *
+ * No 64-bit support yet. I don't know NUXI conventions for long longs.
+ * I guarantee it will be a mess when it's there, though :->
+ * It will be even worse if there are conflicting 64-bit conventions.
+ * Hopefully, no one ever used 64-bit objects on NUXI machines.
+ *
+ */
+
+#define ___swahw32(x) \
+({ \
+	__u32 __x = (x); \
+	((__u32)( \
+		(((__u32)(__x) & (__u32)0x0000ffffUL) << 16) | \
+		(((__u32)(__x) & (__u32)0xffff0000UL) >> 16) )); \
+})
+#define ___swahb32(x) \
+({ \
+	__u32 __x = (x); \
+	((__u32)( \
+		(((__u32)(__x) & (__u32)0x00ff00ffUL) << 8) | \
+		(((__u32)(__x) & (__u32)0xff00ff00UL) >> 8) )); \
+})
+
+#define ___constant_swahw32(x) \
+	((__u32)( \
+		(((__u32)(x) & (__u32)0x0000ffffUL) << 16) | \
+		(((__u32)(x) & (__u32)0xffff0000UL) >> 16) ))
+#define ___constant_swahb32(x) \
+	((__u32)( \
+		(((__u32)(x) & (__u32)0x00ff00ffUL) << 8) | \
+		(((__u32)(x) & (__u32)0xff00ff00UL) >> 8) ))
+
+/*
+ * provide defaults when no architecture-specific optimization is detected
+ */
+#ifndef __arch__swahw32
+#  define __arch__swahw32(x) ___swahw32(x)
+#endif
+#ifndef __arch__swahb32
+#  define __arch__swahb32(x) ___swahb32(x)
+#endif
+
+#ifndef __arch__swahw32p
+#  define __arch__swahw32p(x) __swahw32(*(x))
+#endif
+#ifndef __arch__swahb32p
+#  define __arch__swahb32p(x) __swahb32(*(x))
+#endif
+
+#ifndef __arch__swahw32s
+#  define __arch__swahw32s(x) do { *(x) = __swahw32p((x)); } while (0)
+#endif
+#ifndef __arch__swahb32s
+#  define __arch__swahb32s(x) do { *(x) = __swahb32p((x)); } while (0)
+#endif
+
+
+/*
+ * Allow constant folding
+ */
+#if defined(__GNUC__) && (__GNUC__ >= 2) && defined(__OPTIMIZE__)
+#  define __swahw32(x) \
+(__builtin_constant_p((__u32)(x)) ? \
+ ___swahw32((x)) : \
+ __fswahw32((x)))
+#  define __swahb32(x) \
+(__builtin_constant_p((__u32)(x)) ? \
+ ___swahb32((x)) : \
+ __fswahb32((x)))
+#else
+#  define __swahw32(x) __fswahw32(x)
+#  define __swahb32(x) __fswahb32(x)
+#endif /* OPTIMIZE */
+
+
+__inline static__ __const__ __u32 __fswahw32(__u32 x)
+{
+	return __arch__swahw32(x);
+}
+__inline static__ __u32 __swahw32p(__u32 *x)
+{
+	return __arch__swahw32p(x);
+}
+__inline static__ void __swahw32s(__u32 *addr)
+{
+	__arch__swahw32s(addr);
+}
+
+
+__inline static__ __const__ __u32 __fswahb32(__u32 x)
+{
+	return __arch__swahb32(x);
+}
+__inline static__ __u32 __swahb32p(__u32 *x)
+{
+	return __arch__swahb32p(x);
+}
+__inline static__ void __swahb32s(__u32 *addr)
+{
+	__arch__swahb32s(addr);
+}
+
+#ifdef __BYTEORDER_HAS_U64__
+/*
+ * Not supported yet
+ */
+#endif /* __BYTEORDER_HAS_U64__ */
+
+#if defined(PLATFORM_LINUX)
+#define swahw32 __swahw32
+#define swahb32 __swahb32
+#define swahw32p __swahw32p
+#define swahb32p __swahb32p
+#define swahw32s __swahw32s
+#define swahb32s __swahb32s
+#endif
+
+#endif /* _LINUX_BYTEORDER_SWABB_H */
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/byteorder/swab.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/byteorder/swab.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/byteorder/swab.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/byteorder/swab.h	2017-09-23 03:42:49.994675138 +0800
@@ -0,0 +1,133 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef _LINUX_BYTEORDER_SWAB_H
+#define _LINUX_BYTEORDER_SWAB_H
+
+#if !defined(CONFIG_PLATFORM_MSTAR_TITANIA12)
+#ifndef __u16
+typedef unsigned short __u16;
+#endif
+
+#ifndef __u32
+typedef unsigned int	__u32;
+#endif
+
+#ifndef __u8
+typedef unsigned char __u8;
+#endif
+
+#ifndef __u64
+typedef unsigned long long	__u64;	
+#endif
+
+
+__inline static __u16  ___swab16(__u16 x)
+{
+	__u16 __x = x; 
+	return 
+	((__u16)( 
+		(((__u16)(__x) & (__u16)0x00ffU) << 8) |
+		(((__u16)(__x) & (__u16)0xff00U) >> 8) ));
+
+}
+
+__inline static __u32  ___swab32(__u32 x)
+{
+	__u32 __x = (x);
+	return ((__u32)(
+		(((__u32)(__x) & (__u32)0x000000ffUL) << 24) |
+		(((__u32)(__x) & (__u32)0x0000ff00UL) <<  8) |
+		(((__u32)(__x) & (__u32)0x00ff0000UL) >>  8) |
+		(((__u32)(__x) & (__u32)0xff000000UL) >> 24) ));
+}
+
+__inline static __u64  ___swab64(__u64 x)
+{
+	__u64 __x = (x);
+	
+	return 
+	((__u64)( \
+		(__u64)(((__u64)(__x) & (__u64)0x00000000000000ffULL) << 56) | \
+		(__u64)(((__u64)(__x) & (__u64)0x000000000000ff00ULL) << 40) | \
+		(__u64)(((__u64)(__x) & (__u64)0x0000000000ff0000ULL) << 24) | \
+		(__u64)(((__u64)(__x) & (__u64)0x00000000ff000000ULL) <<  8) | \
+	        (__u64)(((__u64)(__x) & (__u64)0x000000ff00000000ULL) >>  8) | \
+		(__u64)(((__u64)(__x) & (__u64)0x0000ff0000000000ULL) >> 24) | \
+		(__u64)(((__u64)(__x) & (__u64)0x00ff000000000000ULL) >> 40) | \
+		(__u64)(((__u64)(__x) & (__u64)0xff00000000000000ULL) >> 56) )); \
+}
+#endif // CONFIG_PLATFORM_MSTAR_TITANIA12
+
+#ifndef __arch__swab16
+__inline static __u16 __arch__swab16(__u16 x)
+{
+	return ___swab16(x);
+}
+
+#endif
+
+#ifndef __arch__swab32
+__inline static __u32 __arch__swab32(__u32 x)
+{
+	__u32 __tmp = (x) ; 
+	return ___swab32(__tmp);
+}
+#endif
+
+#ifndef __arch__swab64
+
+__inline static __u64 __arch__swab64(__u64 x)
+{
+	__u64 __tmp = (x) ; 
+	return ___swab64(__tmp);
+}
+
+
+#endif
+
+#ifndef __swab16
+#define __swab16(x) __fswab16(x)
+#define __swab32(x) __fswab32(x)
+#define __swab64(x) __fswab64(x)
+#endif	// __swab16
+
+__inline static const __u16 __fswab16(__u16 x)
+{
+	return __arch__swab16(x);
+}
+__inline static const __u32 __fswab32(__u32 x)
+{
+	return __arch__swab32(x);
+}
+
+#if defined(PLATFORM_LINUX) || defined(PLATFORM_WINDOWS)
+#define swab16 __swab16
+#define swab32 __swab32
+#define swab64 __swab64
+#define swab16p __swab16p
+#define swab32p __swab32p
+#define swab64p __swab64p
+#define swab16s __swab16s
+#define swab32s __swab32s
+#define swab64s __swab64s
+#endif
+
+#endif /* _LINUX_BYTEORDER_SWAB_H */
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/circ_buf.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/circ_buf.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/circ_buf.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/circ_buf.h	2017-09-23 03:42:49.994675138 +0800
@@ -0,0 +1,27 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __CIRC_BUF_H_
+#define __CIRC_BUF_H_ 1
+
+#define CIRC_CNT(head,tail,size) (((head) - (tail)) & ((size)-1))
+
+#define CIRC_SPACE(head,tail,size) CIRC_CNT((tail),((head)+1),(size))
+
+#endif //_CIRC_BUF_H_
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/cmd_osdep.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/cmd_osdep.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/cmd_osdep.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/cmd_osdep.h	2017-09-23 03:42:49.994675138 +0800
@@ -0,0 +1,36 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __CMD_OSDEP_H_
+#define __CMD_OSDEP_H_
+
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+extern sint _rtw_init_cmd_priv (struct	cmd_priv *pcmdpriv);
+extern sint _rtw_init_evt_priv(struct evt_priv *pevtpriv);
+extern void _rtw_free_evt_priv (struct	evt_priv *pevtpriv);
+extern void _rtw_free_cmd_priv (struct	cmd_priv *pcmdpriv);
+extern sint _rtw_enqueue_cmd(_queue *queue, struct cmd_obj *obj);
+extern struct	cmd_obj	*_rtw_dequeue_cmd(_queue *queue);
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/drv_conf.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/drv_conf.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/drv_conf.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/drv_conf.h	2017-09-23 03:42:49.994675138 +0800
@@ -0,0 +1,78 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __DRV_CONF_H__
+#define __DRV_CONF_H__
+#include "autoconf.h"
+
+#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
+
+#error "Shall be Linux or Windows, but not both!\n"
+
+#endif
+
+//Older Android kernel doesn't has CONFIG_ANDROID defined,
+//add this to force CONFIG_ANDROID defined
+#ifdef CONFIG_PLATFORM_ANDROID
+#define CONFIG_ANDROID
+#endif
+
+#ifdef CONFIG_ANDROID
+//Some Android build will restart the UI while non-printable ascii is passed
+//between java and c/c++ layer (JNI). We force CONFIG_VALIDATE_SSID
+//for Android here. If you are sure there is no risk on your system about this,
+//mask this macro define to support non-printable ascii ssid.
+#define CONFIG_VALIDATE_SSID
+
+//Android expect dbm as the rx signal strength unit
+#define CONFIG_SIGNAL_DISPLAY_DBM
+#endif
+
+#if defined(CONFIG_HAS_EARLYSUSPEND) && defined (CONFIG_RESUME_IN_WORKQUEUE)
+	#warning "You have CONFIG_HAS_EARLYSUSPEND enabled in your system, we disable CONFIG_RESUME_IN_WORKQUEUE automatically"
+	#undef CONFIG_RESUME_IN_WORKQUEUE
+#endif
+
+#if defined(CONFIG_ANDROID_POWER) && defined (CONFIG_RESUME_IN_WORKQUEUE)
+	#warning "You have CONFIG_ANDROID_POWER enabled in your system, we disable CONFIG_RESUME_IN_WORKQUEUE automatically"
+	#undef CONFIG_RESUME_IN_WORKQUEUE
+#endif
+
+#ifdef CONFIG_RESUME_IN_WORKQUEUE //this can be removed, because there is no case for this...
+	#if !defined( CONFIG_WAKELOCK) && !defined(CONFIG_ANDROID_POWER)
+	#error "enable CONFIG_RESUME_IN_WORKQUEUE without CONFIG_WAKELOCK or CONFIG_ANDROID_POWER will suffer from the danger of wifi's unfunctionality..."
+	#error "If you still want to enable CONFIG_RESUME_IN_WORKQUEUE in this case, mask this preprossor checking and GOOD LUCK..."
+	#endif
+#endif
+
+//About USB VENDOR REQ
+#if defined(CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC) && !defined(CONFIG_USB_VENDOR_REQ_MUTEX) 
+	#warning "define CONFIG_USB_VENDOR_REQ_MUTEX for CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC automatically"
+	#define CONFIG_USB_VENDOR_REQ_MUTEX
+#endif
+#if defined(CONFIG_VENDOR_REQ_RETRY) &&  !defined(CONFIG_USB_VENDOR_REQ_MUTEX)
+	#warning "define CONFIG_USB_VENDOR_REQ_MUTEX for CONFIG_VENDOR_REQ_RETRY automatically"
+	#define CONFIG_USB_VENDOR_REQ_MUTEX
+#endif
+
+
+//#include <rtl871x_byteorder.h>
+
+#endif // __DRV_CONF_H__
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/drv_types_ce.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/drv_types_ce.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/drv_types_ce.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/drv_types_ce.h	2017-09-23 03:42:49.994675138 +0800
@@ -0,0 +1,92 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __DRV_TYPES_CE_H__
+#define __DRV_TYPES_CE_H__
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+
+#include <Sdcardddk.h>
+
+#define MAX_ACTIVE_REG_PATH 256
+
+#define MAX_MCAST_LIST_NUM					32
+
+
+
+//for ioctl
+#define MAKE_DRIVER_VERSION(_MainVer,_MinorVer)	((((u32)(_MainVer))<<16)+_MinorVer)
+
+#define NIC_HEADER_SIZE				14			//!< can be moved to typedef.h
+#define NIC_MAX_PACKET_SIZE			1514		//!< can be moved to typedef.h
+#define NIC_MAX_SEND_PACKETS			10		// max number of send packets the MiniportSendPackets function can accept, can be moved to typedef.h
+#define NIC_VENDOR_DRIVER_VERSION       MAKE_DRIVER_VERSION(0,001)	//!< can be moved to typedef.h
+#define NIC_MAX_PACKET_SIZE			1514		//!< can be moved to typedef.h
+
+typedef struct _MP_REG_ENTRY
+{
+
+	NDIS_STRING		RegName;	// variable name text
+	BOOLEAN			bRequired;	// 1 -> required, 0 -> optional
+
+	u8			Type;		// NdisParameterInteger/NdisParameterHexInteger/NdisParameterStringle/NdisParameterMultiString
+	uint			FieldOffset;	// offset to MP_ADAPTER field
+	uint			FieldSize;	// size (in bytes) of the field
+	
+#ifdef UNDER_AMD64
+	u64			Default;
+#else
+	u32			Default;		// default value to use
+#endif
+
+	u32			Min;			// minimum value allowed
+	u32			Max;		// maximum value allowed
+} MP_REG_ENTRY, *PMP_REG_ENTRY;
+
+#ifdef CONFIG_USB_HCI
+typedef struct _USB_EXTENSION {
+    LPCUSB_FUNCS    _lpUsbFuncs;
+	USB_HANDLE	    _hDevice;
+    PVOID 		    pAdapter;
+
+#if 0
+	USB_ENDPOINT_DESCRIPTOR		_endpACLIn;
+    USB_ENDPOINT_DESCRIPTOR		_endpACLOutHigh;
+	USB_ENDPOINT_DESCRIPTOR		_endpACLOutNormal;
+
+	USB_PIPE        pPipeIn;
+    USB_PIPE        pPipeOutNormal;
+    USB_PIPE        pPipeOutHigh;
+#endif
+
+} USB_EXTENSION, *PUSB_EXTENSION;
+#endif
+
+
+typedef struct _OCTET_STRING{
+	u8      *Octet;
+	u16      Length;
+} OCTET_STRING, *POCTET_STRING;
+
+
+
+
+
+#endif
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/drv_types.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/drv_types.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/drv_types.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/drv_types.h	2017-09-23 03:42:49.994675138 +0800
@@ -0,0 +1,485 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+/*-------------------------------------------------------------------------------
+	
+	For type defines and data structure defines
+
+--------------------------------------------------------------------------------*/
+
+
+#ifndef __DRV_TYPES_H__
+#define __DRV_TYPES_H__
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <wlan_bssdef.h>
+
+
+#ifdef PLATFORM_OS_XP
+#include <drv_types_xp.h>
+#endif
+
+#ifdef PLATFORM_OS_CE
+#include <drv_types_ce.h>
+#endif
+
+#ifdef PLATFORM_LINUX
+#include <drv_types_linux.h>
+#endif
+
+enum _NIC_VERSION {
+	
+	RTL8711_NIC,
+	RTL8712_NIC,
+	RTL8713_NIC,
+	RTL8716_NIC
+		
+};
+
+enum{
+	UP_LINK,
+	DOWN_LINK,	
+};
+typedef struct _ADAPTER _adapter, ADAPTER,*PADAPTER;
+
+#ifdef CONFIG_80211N_HT
+#include <rtw_ht.h>
+#endif
+
+#include <rtw_cmd.h>
+#include <wlan_bssdef.h>
+#include <rtw_xmit.h>
+#include <rtw_recv.h>
+#include <hal_init.h>
+#include <rtw_qos.h>
+#include <rtw_security.h>
+#include <rtw_pwrctrl.h>
+#include <rtw_io.h>
+#include <rtw_eeprom.h>
+#include <sta_info.h>
+#include <rtw_mlme.h>
+#include <rtw_debug.h>
+#include <rtw_rf.h>
+#include <rtw_event.h>
+#include <rtw_led.h>
+#include <rtw_mlme_ext.h>
+#include <rtw_p2p.h>
+
+#ifdef CONFIG_DRVEXT_MODULE
+#include <drvext_api.h>
+#endif
+
+#ifdef CONFIG_MP_INCLUDED
+#include <rtw_mp.h>
+#endif
+
+#ifdef CONFIG_BR_EXT
+#include <rtw_br_ext.h>
+#endif	// CONFIG_BR_EXT
+
+#define SPEC_DEV_ID_NONE BIT(0)
+#define SPEC_DEV_ID_DISABLE_HT BIT(1)
+#define SPEC_DEV_ID_ENABLE_PS BIT(2)
+#define SPEC_DEV_ID_RF_CONFIG_1T1R BIT(3)
+#define SPEC_DEV_ID_RF_CONFIG_2T2R BIT(4)
+#define SPEC_DEV_ID_ASSIGN_IFNAME BIT(5)
+
+struct specific_device_id{
+	
+	u32		flags;
+	
+	u16		idVendor;
+	u16		idProduct;
+
+};
+
+struct registry_priv
+{    
+	u8	chip_version;
+	u8	rfintfs;
+	u8	lbkmode;
+	u8	hci;
+	NDIS_802_11_SSID	ssid;
+	u8	network_mode;	//infra, ad-hoc, auto	  
+	u8	channel;//ad-hoc support requirement 
+	u8	wireless_mode;//A, B, G, auto
+	u8 	scan_mode;//active, passive
+	u8	radio_enable;
+	u8	preamble;//long, short, auto
+	u8	vrtl_carrier_sense;//Enable, Disable, Auto
+	u8	vcs_type;//RTS/CTS, CTS-to-self
+	u16	rts_thresh;
+	u16  frag_thresh;	
+	u8	adhoc_tx_pwr;
+	u8	soft_ap;
+	u8	power_mgnt;
+	 u8	ips_mode;
+	u8	smart_ps;
+	u8	long_retry_lmt;
+	u8	short_retry_lmt;
+	u16	busy_thresh;
+	u8	ack_policy;
+	u8	mp_mode;
+	u8	software_encrypt;
+	u8	software_decrypt;
+
+	  //UAPSD
+	u8	wmm_enable;
+	u8	uapsd_enable;	  
+	u8	uapsd_max_sp;
+	u8	uapsd_acbk_en;
+	u8	uapsd_acbe_en;
+	u8	uapsd_acvi_en;
+	u8	uapsd_acvo_en;	  
+
+	WLAN_BSSID_EX    dev_network;
+
+#ifdef CONFIG_80211N_HT
+	u8	ht_enable;
+	u8	cbw40_enable;
+	u8	ampdu_enable;//for tx
+	u8 	rx_stbc;
+	u8	ampdu_amsdu;//A-MPDU Supports A-MSDU is permitted
+#endif
+	u8	lowrate_two_xmit;
+	
+	u8	rf_config ;
+	u8	low_power ;
+
+	u8	wifi_spec;// !turbo_mode	  
+	  
+	u8	channel_plan;
+#ifdef CONFIG_BT_COEXIST
+	u8	bt_iso;
+	u8	bt_sco;
+	u8	bt_ampdu;
+#endif
+	BOOLEAN	bAcceptAddbaReq;	
+
+	u8	antdiv_cfg;
+
+	u8	usbss_enable;//0:disable,1:enable
+	u8	hwpdn_mode;//0:disable,1:enable,2:decide by EFUSE config
+	u8	hwpwrp_detect;//0:disable,1:enable
+
+	u8	hw_wps_pbc;//0:disable,1:enable
+
+#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE
+	char	adaptor_info_caching_file_path[PATH_LENGTH_MAX];
+#endif
+
+#ifdef CONFIG_LAYER2_ROAMING
+	u8	max_roaming_times; // the max number driver will try to roaming
+#endif
+};
+
+
+//For registry parameters
+#define RGTRY_OFT(field) ((ULONG)FIELD_OFFSET(struct registry_priv,field))
+#define RGTRY_SZ(field)   sizeof(((struct registry_priv*) 0)->field)
+#define BSSID_OFT(field) ((ULONG)FIELD_OFFSET(WLAN_BSSID_EX,field))
+#define BSSID_SZ(field)   sizeof(((PWLAN_BSSID_EX) 0)->field)
+
+#define MAX_CONTINUAL_URB_ERR 4
+
+struct dvobj_priv {
+
+	_adapter * padapter;
+
+	//For 92D, DMDP have 2 interface.
+	u8	InterfaceNumber;
+	u8	NumInterfaces;
+
+/*-------- below is for SDIO INTERFACE --------*/
+
+#ifdef CONFIG_SDIO_HCI
+
+#ifdef PLATFORM_OS_XP
+	PDEVICE_OBJECT	pphysdevobj;//pPhysDevObj;
+	PDEVICE_OBJECT	pfuncdevobj;//pFuncDevObj;
+	PDEVICE_OBJECT	pnextdevobj;//pNextDevObj;
+	SDBUS_INTERFACE_STANDARD	sdbusinft;//SdBusInterface;
+	u8	nextdevstacksz;//unsigned char			 NextDeviceStackSize;
+#endif//PLATFORM_OS_XP
+
+#ifdef PLATFORM_OS_CE
+	SD_DEVICE_HANDLE hDevice;     
+	SD_CARD_RCA                 sd_rca;
+	SD_CARD_INTERFACE           card_intf;
+	BOOLEAN                     enableIsarWithStatus;
+	WCHAR	active_path[MAX_ACTIVE_REG_PATH];
+	SD_HOST_BLOCK_CAPABILITY    sd_host_blk_cap;
+#endif//PLATFORM_OS_CE
+
+#ifdef PLATFORM_LINUX
+	struct sdio_func	*func;	
+#endif//PLATFORM_LINUX
+
+	u8	func_number;//unsigned char			FunctionNumber;
+	u32	block_transfer_len;//unsigned long			BLOCK_TRANSFER_LEN;
+	u32	blk_shiftbits;
+	u16	driver_version;
+	u16	rxblknum;
+	u16	rxblknum_rd;
+	u16	c2hblknum; 
+	u8  tx_block_mode;
+	u8  rx_block_mode;
+	u8 cmdfifo_cnt;
+	u8 rxfifo_cnt;
+	u16	sdio_hisr;
+	u16	sdio_himr;	
+#endif//	CONFIG_SDIO_HCI
+
+/*-------- below is for USB INTERFACE --------*/
+ 
+#ifdef CONFIG_USB_HCI
+
+	u8	nr_endpoint;
+	u8	ishighspeed;
+	u8	RtNumInPipes;
+	u8	RtNumOutPipes;
+	int	ep_num[5]; //endpoint number
+
+	int	RegUsbSS;
+	
+	_sema	usb_suspend_sema;
+
+#ifdef CONFIG_USB_VENDOR_REQ_MUTEX
+	_mutex  usb_vendor_req_mutex;
+#endif
+	
+#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC
+	u8 * usb_alloc_vendor_req_buf;
+	u8 * usb_vendor_req_buf;
+#endif	
+
+#ifdef PLATFORM_WINDOWS
+	//related device objects
+	PDEVICE_OBJECT	pphysdevobj;//pPhysDevObj;
+	PDEVICE_OBJECT	pfuncdevobj;//pFuncDevObj;
+	PDEVICE_OBJECT	pnextdevobj;//pNextDevObj;
+
+	u8	nextdevstacksz;//unsigned char NextDeviceStackSize;	//= (CHAR)CEdevice->pUsbDevObj->StackSize + 1; 
+
+	//urb for control diescriptor request
+
+#ifdef PLATFORM_OS_XP
+	struct _URB_CONTROL_DESCRIPTOR_REQUEST descriptor_urb;
+	PUSB_CONFIGURATION_DESCRIPTOR	pconfig_descriptor;//UsbConfigurationDescriptor;
+#endif
+
+#ifdef PLATFORM_OS_CE
+	WCHAR			active_path[MAX_ACTIVE_REG_PATH];	// adapter regpath
+	USB_EXTENSION	usb_extension;
+
+	_nic_hdl		pipehdls_r8192c[0x10];
+#endif
+
+	u32	config_descriptor_len;//ULONG UsbConfigurationDescriptorLength;	
+#endif//PLATFORM_WINDOWS
+
+#ifdef PLATFORM_LINUX
+	struct usb_interface *pusbintf;
+	struct usb_device *pusbdev;
+#endif//PLATFORM_LINUX
+
+	ATOMIC_T continual_urb_error;
+#endif//CONFIG_USB_HCI
+
+/*-------- below is for PCIE INTERFACE --------*/
+ 
+#ifdef CONFIG_PCI_HCI
+
+#ifdef PLATFORM_LINUX
+	struct pci_dev *ppcidev;
+
+	//PCI MEM map
+	unsigned long	pci_mem_end;	/* shared mem end	*/
+	unsigned long	pci_mem_start;	/* shared mem start	*/
+	
+	//PCI IO map
+	unsigned long	pci_base_addr;	/* device I/O address	*/
+
+	//PciBridge
+	struct pci_priv	pcipriv;
+
+	u16	irqline;
+	u8	irq_enabled;
+	u8	irq_alloc;
+	RT_ISR_CONTENT	isr_content;
+	_lock	irq_th_lock;
+
+	//ASPM
+	u8	const_pci_aspm;
+	u8	const_amdpci_aspm;
+	u8	const_hwsw_rfoff_d3;
+	u8	const_support_pciaspm;
+	// pci-e bridge */
+	u8 	const_hostpci_aspm_setting;
+	// pci-e device */
+	u8 	const_devicepci_aspm_setting;
+	u8 	b_support_aspm; // If it supports ASPM, Offset[560h] = 0x40, otherwise Offset[560h] = 0x00. 
+	u8	b_support_backdoor;
+#endif//PLATFORM_LINUX
+
+#endif//CONFIG_PCI_HCI
+};
+
+typedef enum _DRIVER_STATE{
+	DRIVER_NORMAL = 0,
+	DRIVER_DISAPPEAR = 1,
+	DRIVER_REPLACE_DONGLE = 2,
+}DRIVER_STATE;
+
+struct _ADAPTER{	
+	int	DriverState;// for disable driver using module, use dongle to replace module.
+	int	pid[3];//process id from UI, 0:wps, 1:hostapd, 2:dhcpcd
+	int	bDongle;//build-in module or external dongle
+	u16 	chip_type;
+	u16	HardwareType;
+	u16	interface_type;//USB,SDIO,PCI
+ 
+	struct 	dvobj_priv dvobjpriv;
+	struct	mlme_priv mlmepriv;
+	struct	mlme_ext_priv mlmeextpriv;
+	struct	cmd_priv	cmdpriv;
+	struct	evt_priv	evtpriv;
+	//struct	io_queue	*pio_queue;
+	struct 	io_priv	iopriv;
+	struct	xmit_priv	xmitpriv;
+	struct	recv_priv	recvpriv;
+	struct	sta_priv	stapriv;
+	struct	security_priv	securitypriv;	
+	struct	registry_priv	registrypriv;
+	struct	wlan_acl_pool	acl_list;
+	struct	pwrctrl_priv	pwrctrlpriv;
+	struct 	eeprom_priv eeprompriv;
+	struct	led_priv	ledpriv;
+	
+#ifdef CONFIG_MP_INCLUDED
+       struct	mp_priv	mppriv;
+#endif
+
+#ifdef CONFIG_DRVEXT_MODULE
+	struct	drvext_priv	drvextpriv;
+#endif
+	
+#ifdef CONFIG_AP_MODE
+	struct	hostapd_priv	*phostapdpriv;		
+#endif
+
+#ifdef CONFIG_P2P
+	struct wifidirect_info	wdinfo;
+#endif //CONFIG_P2P
+
+	PVOID			HalData;
+	u32 hal_data_sz;
+	struct hal_ops	HalFunc;
+
+#ifdef CONFIG_BT_COEXIST
+	//struct	btcoexist_priv	bt_coexist;
+#endif
+	s32	bDriverStopped; 
+	s32	bSurpriseRemoved;
+	s32  bCardDisableWOHSM;
+
+	u32	IsrContent;
+	u32	ImrContent;	
+
+	u8	EepromAddressSize;
+	u8	hw_init_completed;
+	u8	init_adpt_in_progress;
+	u8	bfirst_init;
+	u8	bHaltInProgress;
+	
+	_thread_hdl_	cmdThread;
+	_thread_hdl_	evtThread;
+	_thread_hdl_	xmitThread;
+	_thread_hdl_	recvThread;
+
+
+	NDIS_STATUS (*dvobj_init)(_adapter * adapter);
+	void (*dvobj_deinit)(_adapter * adapter);
+
+	void (*intf_start)(_adapter * adapter);
+	void (*intf_stop)(_adapter * adapter);
+
+#ifdef PLATFORM_WINDOWS
+	_nic_hdl		hndis_adapter;//hNdisAdapter(NDISMiniportAdapterHandle);
+	_nic_hdl		hndis_config;//hNdisConfiguration;
+	NDIS_STRING fw_img;
+
+	u32	NdisPacketFilter;	
+	u8	MCList[MAX_MCAST_LIST_NUM][6];
+	u32	MCAddrCount;	
+#endif //end of PLATFORM_WINDOWS
+
+
+#ifdef PLATFORM_LINUX	
+	_nic_hdl pnetdev;
+
+	// used by rtw_rereg_nd_name related function
+	struct rereg_nd_name_data {
+		_nic_hdl old_pnetdev;
+		char old_ifname[IFNAMSIZ];
+		u8 old_ips_mode;
+		u8 old_bRegUseLed;
+	} rereg_nd_name_priv;
+	
+	int bup;
+	struct net_device_stats stats;
+	struct iw_statistics iwstats;
+	struct proc_dir_entry *dir_dev;// for proc directory
+#endif //end of PLATFORM_LINUX
+
+	int net_closed;
+
+	u8 bFWReady;
+	u8 bReadPortCancel;
+	u8 bWritePortCancel;
+	u8 bRxRSSIDisplay;
+#ifdef CONFIG_AUTOSUSPEND
+	u8	bDisableAutosuspend;
+#endif
+#ifdef CONFIG_BR_EXT
+	_lock					br_ext_lock;
+	//unsigned int			macclone_completed;
+	struct nat25_network_db_entry	*nethash[NAT25_HASH_SIZE];
+	int				pppoe_connection_in_progress;
+	unsigned char			pppoe_addr[MACADDRLEN];
+	unsigned char			scdb_mac[MACADDRLEN];
+	unsigned char			scdb_ip[4];
+	struct nat25_network_db_entry	*scdb_entry;
+	unsigned char			br_mac[MACADDRLEN];
+	unsigned char			br_ip[4];
+	
+	struct br_ext_info		ethBrExtInfo;
+#endif	// CONFIG_BR_EXT
+
+};	
+  
+__inline static u8 *myid(struct eeprom_priv *peepriv)
+{
+	return (peepriv->mac_addr);
+}
+
+
+#endif //__DRV_TYPES_H__
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/drv_types_linux.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/drv_types_linux.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/drv_types_linux.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/drv_types_linux.h	2017-09-23 03:42:49.998675125 +0800
@@ -0,0 +1,25 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __DRV_TYPES_LINUX_H__
+#define __DRV_TYPES_LINUX_H__
+
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/drv_types_xp.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/drv_types_xp.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/drv_types_xp.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/drv_types_xp.h	2017-09-23 03:42:49.998675125 +0800
@@ -0,0 +1,95 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __DRV_TYPES_XP_H__
+#define __DRV_TYPES_XP_H__
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+
+
+
+#define MAX_MCAST_LIST_NUM					32
+
+
+
+//for ioctl
+#define MAKE_DRIVER_VERSION(_MainVer,_MinorVer)	((((u32)(_MainVer))<<16)+_MinorVer)
+
+#define NIC_HEADER_SIZE				14			//!< can be moved to typedef.h
+#define NIC_MAX_PACKET_SIZE			1514		//!< can be moved to typedef.h
+#define NIC_MAX_SEND_PACKETS			10		// max number of send packets the MiniportSendPackets function can accept, can be moved to typedef.h
+#define NIC_VENDOR_DRIVER_VERSION       MAKE_DRIVER_VERSION(0,001)	//!< can be moved to typedef.h
+#define NIC_MAX_PACKET_SIZE			1514		//!< can be moved to typedef.h
+
+
+#undef ON_VISTA
+//added by Jackson
+#ifndef ON_VISTA
+//
+// Bus driver versions
+//
+
+#define SDBUS_DRIVER_VERSION_1          0x100
+#define SDBUS_DRIVER_VERSION_2          0x200
+
+#define    SDP_FUNCTION_TYPE	4
+#define    SDP_BUS_DRIVER_VERSION 5
+#define    SDP_BUS_WIDTH 6
+#define    SDP_BUS_CLOCK 7
+#define    SDP_BUS_INTERFACE_CONTROL 8
+#define    SDP_HOST_BLOCK_LENGTH 9
+#define    SDP_FUNCTION_BLOCK_LENGTH 10
+#define    SDP_FN0_BLOCK_LENGTH 11
+#define    SDP_FUNCTION_INT_ENABLE 12
+#endif
+
+
+typedef struct _MP_REG_ENTRY
+{
+
+	NDIS_STRING		RegName;	// variable name text
+	BOOLEAN			bRequired;	// 1 -> required, 0 -> optional
+
+	u8			Type;		// NdisParameterInteger/NdisParameterHexInteger/NdisParameterStringle/NdisParameterMultiString
+	uint			FieldOffset;	// offset to MP_ADAPTER field
+	uint			FieldSize;	// size (in bytes) of the field
+	
+#ifdef UNDER_AMD64
+	u64			Default;
+#else
+	u32			Default;		// default value to use
+#endif
+
+	u32			Min;			// minimum value allowed
+	u32			Max;		// maximum value allowed
+} MP_REG_ENTRY, *PMP_REG_ENTRY;
+
+
+typedef struct _OCTET_STRING{
+	u8      *Octet;
+	u16      Length;
+} OCTET_STRING, *POCTET_STRING;
+
+
+
+
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/ethernet.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/ethernet.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/ethernet.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/ethernet.h	2017-09-23 03:42:49.998675125 +0800
@@ -0,0 +1,41 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+/*! \file */ 
+#ifndef __INC_ETHERNET_H
+#define __INC_ETHERNET_H
+
+#define ETHERNET_ADDRESS_LENGTH				6		//!< Ethernet Address Length
+#define ETHERNET_HEADER_SIZE				14		//!< Ethernet Header Length
+#define LLC_HEADER_SIZE						6		//!< LLC Header Length
+#define TYPE_LENGTH_FIELD_SIZE				2		//!< Type/Length Size
+#define MINIMUM_ETHERNET_PACKET_SIZE		60		//!< Minimum Ethernet Packet Size
+#define MAXIMUM_ETHERNET_PACKET_SIZE		1514	//!< Maximum Ethernet Packet Size
+
+#define RT_ETH_IS_MULTICAST(_pAddr)	((((UCHAR *)(_pAddr))[0]&0x01)!=0)		//!< Is Multicast Address?
+#define RT_ETH_IS_BROADCAST(_pAddr)	(										\
+											((UCHAR *)(_pAddr))[0]==0xff	&& 		\
+											((UCHAR *)(_pAddr))[1]==0xff	&&		\
+											((UCHAR *)(_pAddr))[2]==0xff	&&		\
+											((UCHAR *)(_pAddr))[3]==0xff	&&		\
+											((UCHAR *)(_pAddr))[4]==0xff	&&		\
+											((UCHAR *)(_pAddr))[5]==0xff		)	//!< Is Broadcast Address?
+
+
+#endif // #ifndef __INC_ETHERNET_H
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/farray.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/farray.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/farray.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/farray.h	2017-09-23 03:42:50.022675052 +0800
@@ -0,0 +1,31480 @@
+unsigned char f_array[125912] = {
+0x12,0x87,0x09,0x10,
+0x30,0x00,0x00,0x00,
+0x08,0xF8,0x00,0x00,
+0x50,0xF3,0x00,0x00,
+0x30,0x00,0x00,0x00,
+0xB8,0xF1,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x10,0x27,0x17,0x41,
+0x87,0x12,0x12,0x01,
+0x00,0x00,0x12,0x06,
+0x00,0x00,0x00,0x00,
+0x00,0x07,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x01,0x01,0x00,0x01,
+0x01,0x01,0x00,0x00,
+0x01,0x00,0x01,0x00,
+0x00,0x00,0x01,0x01,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x7F,0x00,0x00,0x10,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x1F,0x00,0x00,0x10,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x1A,0x3C,
+0x80,0x03,0x5A,0x37,
+0x00,0x80,0x1B,0x3C,
+0x80,0x00,0x7B,0x37,
+0x00,0x00,0x5B,0xAF,
+0x25,0xB0,0x1A,0x3C,
+0x18,0x03,0x5A,0x37,
+0x00,0x80,0x1B,0x3C,
+0x80,0x00,0x7B,0x37,
+0x00,0x00,0x5B,0xAF,
+0x01,0x80,0x1A,0x3C,
+0x90,0xEE,0x5A,0x27,
+0x08,0x00,0x40,0x03,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x04,0x00,0xA1,0xAF,
+0x08,0x00,0xA2,0xAF,
+0x0C,0x00,0xA3,0xAF,
+0x10,0x00,0xA4,0xAF,
+0x14,0x00,0xA5,0xAF,
+0x18,0x00,0xA6,0xAF,
+0x1C,0x00,0xA7,0xAF,
+0x20,0x00,0xA8,0xAF,
+0x24,0x00,0xA9,0xAF,
+0x28,0x00,0xAA,0xAF,
+0x2C,0x00,0xAB,0xAF,
+0x30,0x00,0xAC,0xAF,
+0x34,0x00,0xAD,0xAF,
+0x38,0x00,0xAE,0xAF,
+0x3C,0x00,0xAF,0xAF,
+0x12,0x40,0x00,0x00,
+0x10,0x48,0x00,0x00,
+0x00,0x70,0x0A,0x40,
+0x40,0x00,0xB0,0xAF,
+0x44,0x00,0xB1,0xAF,
+0x48,0x00,0xB2,0xAF,
+0x4C,0x00,0xB3,0xAF,
+0x50,0x00,0xB4,0xAF,
+0x54,0x00,0xB5,0xAF,
+0x58,0x00,0xB6,0xAF,
+0x5C,0x00,0xB7,0xAF,
+0x60,0x00,0xB8,0xAF,
+0x64,0x00,0xB9,0xAF,
+0x68,0x00,0xBC,0xAF,
+0x6C,0x00,0xBD,0xAF,
+0x70,0x00,0xBE,0xAF,
+0x74,0x00,0xBF,0xAF,
+0x78,0x00,0xA8,0xAF,
+0x7C,0x00,0xA9,0xAF,
+0x80,0x00,0xAA,0xAF,
+0x32,0x3B,0x00,0x08,
+0x21,0x20,0xA0,0x03,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x05,0x3C,
+0x00,0x80,0x02,0x3C,
+0xE0,0xFF,0xBD,0x27,
+0x18,0x03,0xA3,0x34,
+0x00,0x03,0x42,0x24,
+0x18,0x00,0xBF,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x00,0x00,0x62,0xAC,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x42,0xB0,0x02,0x3C,
+0x03,0x00,0x46,0x34,
+0x00,0x00,0xC3,0x90,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x70,0x30,
+0x10,0x00,0x02,0x32,
+0x18,0x00,0x40,0x10,
+0x02,0x80,0x11,0x3C,
+0x30,0x1F,0x27,0x26,
+0x78,0x36,0xE4,0x94,
+0x10,0x00,0x02,0x24,
+0x00,0x00,0xC2,0xA0,
+0x08,0x00,0x80,0x10,
+0x1C,0x03,0xA3,0x34,
+0x7C,0x36,0xE2,0x94,
+0xB0,0x03,0xA4,0x34,
+0x00,0x00,0x62,0xAC,
+0x00,0x00,0x80,0xAC,
+0x78,0x36,0xE0,0xA4,
+0x7C,0x36,0xE0,0xA4,
+0x00,0x00,0x04,0x24,
+0x02,0x80,0x05,0x3C,
+0x02,0x80,0x06,0x3C,
+0x14,0x5E,0xA2,0x8C,
+0x18,0x5F,0xC3,0x8C,
+0x01,0x00,0x84,0x24,
+0x01,0x00,0x42,0x24,
+0x01,0x00,0x63,0x24,
+0x78,0x36,0xE4,0xA4,
+0x14,0x5E,0xA2,0xAC,
+0x18,0x5F,0xC3,0xAC,
+0x00,0x16,0x10,0x00,
+0x03,0x16,0x02,0x00,
+0x7B,0x00,0x40,0x04,
+0x42,0xB0,0x02,0x3C,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x40,0x00,0x02,0x32,
+0x16,0x00,0x40,0x10,
+0x30,0x1F,0x24,0x26,
+0x42,0xB0,0x0B,0x3C,
+0x03,0x00,0x62,0x35,
+0x40,0x00,0x03,0x24,
+0x00,0x00,0x43,0xA0,
+0x02,0x80,0x03,0x3C,
+0x12,0x5F,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x1A,0x00,0x40,0x10,
+0x02,0x80,0x04,0x3C,
+0x12,0x5F,0x60,0xA0,
+0x02,0x80,0x04,0x3C,
+0x0E,0x5F,0x83,0x90,
+0xFD,0xFF,0x02,0x24,
+0x24,0x18,0x62,0x00,
+0x0E,0x5F,0x83,0xA0,
+0x0E,0x5F,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x07,0x00,0x42,0x30,
+0x5D,0x00,0x40,0x10,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x24,0x26,
+0xE0,0x1B,0x83,0x94,
+0xDC,0x1B,0x85,0x94,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x80,0x00,0x63,0x30,
+0x41,0xB0,0x02,0x3C,
+0x25,0x18,0x65,0x00,
+0x08,0x00,0x42,0x34,
+0x20,0x00,0xBD,0x27,
+0x00,0x00,0x43,0xA4,
+0x08,0x00,0xE0,0x03,
+0xDC,0x1B,0x83,0xA4,
+0xFA,0x5E,0x82,0x90,
+0x02,0x80,0x05,0x3C,
+0x01,0x00,0x42,0x24,
+0xFA,0x5E,0x82,0xA0,
+0x0E,0x5F,0xA3,0x90,
+0xEF,0xFF,0x02,0x24,
+0x24,0x18,0x62,0x00,
+0x0E,0x5F,0xA3,0xA0,
+0xFA,0x5E,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x02,0x00,0x42,0x2C,
+0x32,0x00,0x40,0x10,
+0x30,0x1F,0x23,0x26,
+0x25,0xB0,0x06,0x3C,
+0x84,0x00,0xC4,0x34,
+0x80,0x00,0xC6,0x34,
+0x00,0x00,0x82,0x8C,
+0x00,0x00,0xC4,0x8C,
+0x02,0x80,0x08,0x3C,
+0x21,0x10,0x00,0x00,
+0x1C,0x5F,0x06,0x8D,
+0x25,0x10,0x44,0x00,
+0x02,0x80,0x04,0x3C,
+0x20,0x5F,0x88,0x8C,
+0x24,0x5F,0x89,0x8C,
+0x00,0x00,0x65,0x91,
+0x21,0x10,0x46,0x00,
+0xFB,0xFF,0x04,0x24,
+0x24,0x28,0xA4,0x00,
+0x23,0x40,0x02,0x01,
+0x00,0x00,0x65,0xA1,
+0x04,0x00,0x00,0x11,
+0x01,0x00,0x06,0x24,
+0x80,0x10,0x08,0x00,
+0x21,0x10,0x48,0x00,
+0x80,0x30,0x02,0x00,
+0x01,0x00,0x04,0x24,
+0x8C,0x23,0x00,0x0C,
+0x21,0x28,0x00,0x00,
+0x42,0xB0,0x02,0x3C,
+0x22,0x00,0x04,0x24,
+0x03,0x00,0x42,0x34,
+0x00,0x00,0x44,0xA0,
+0x02,0x80,0x03,0x3C,
+0xF5,0x5E,0x64,0x90,
+0x01,0x00,0x05,0x24,
+0x64,0x31,0x00,0x0C,
+0xFF,0x00,0x84,0x30,
+0x30,0x1F,0x24,0x26,
+0xE0,0x1B,0x83,0x94,
+0xDC,0x1B,0x85,0x94,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x80,0x00,0x63,0x30,
+0x41,0xB0,0x02,0x3C,
+0x25,0x18,0x65,0x00,
+0x08,0x00,0x42,0x34,
+0x20,0x00,0xBD,0x27,
+0x00,0x00,0x43,0xA4,
+0x08,0x00,0xE0,0x03,
+0xDC,0x1B,0x83,0xA4,
+0xB0,0x1B,0x62,0x94,
+0x00,0x00,0x00,0x00,
+0x00,0x01,0x42,0x30,
+0x16,0x00,0x40,0x10,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0x15,0x5F,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0xAB,0xFF,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x15,0x5F,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0x15,0x5F,0x62,0xA0,
+0x0B,0x01,0x00,0x08,
+0x30,0x1F,0x24,0x26,
+0x0C,0x5F,0x40,0xA0,
+0x44,0x01,0x00,0x08,
+0x02,0x80,0x03,0x3C,
+0x80,0xFF,0x03,0x24,
+0x03,0x00,0x42,0x34,
+0x00,0x00,0x43,0xA0,
+0x9E,0x25,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xEF,0x00,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x15,0x5F,0x40,0xA0,
+0x0B,0x01,0x00,0x08,
+0x30,0x1F,0x24,0x26,
+0xFF,0x00,0x84,0x30,
+0x0B,0x00,0x82,0x2C,
+0xFF,0xFF,0xE7,0x30,
+0x10,0x00,0xA8,0x93,
+0x19,0x00,0x40,0x10,
+0x21,0x18,0x00,0x00,
+0x02,0x80,0x03,0x3C,
+0x80,0x10,0x04,0x00,
+0xD8,0xE9,0x63,0x24,
+0x21,0x10,0x43,0x00,
+0x00,0x00,0x44,0x8C,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x80,0x00,
+0x00,0x00,0x00,0x00,
+0x43,0xB0,0x02,0x3C,
+0x78,0x00,0x44,0x34,
+0x07,0x00,0xE2,0x30,
+0x00,0x00,0x85,0xAC,
+0x04,0x00,0x86,0xAC,
+0x04,0x00,0x40,0x18,
+0x00,0x00,0x00,0x00,
+0xF8,0xFF,0xE2,0x30,
+0x08,0x00,0x42,0x24,
+0xFF,0xFF,0x47,0x30,
+0x21,0x10,0xE8,0x00,
+0x00,0x80,0x03,0x3C,
+0x08,0x00,0x82,0xAC,
+0x25,0x10,0x43,0x00,
+0x08,0x00,0x82,0xAC,
+0x01,0x00,0x03,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x43,0xB0,0x02,0x3C,
+0x83,0x01,0x00,0x08,
+0x6C,0x00,0x44,0x34,
+0x43,0xB0,0x02,0x3C,
+0x83,0x01,0x00,0x08,
+0x60,0x00,0x44,0x34,
+0x43,0xB0,0x02,0x3C,
+0x83,0x01,0x00,0x08,
+0x54,0x00,0x44,0x34,
+0x43,0xB0,0x02,0x3C,
+0x83,0x01,0x00,0x08,
+0x48,0x00,0x44,0x34,
+0x43,0xB0,0x02,0x3C,
+0x83,0x01,0x00,0x08,
+0x3C,0x00,0x44,0x34,
+0x43,0xB0,0x02,0x3C,
+0x83,0x01,0x00,0x08,
+0x30,0x00,0x44,0x34,
+0x43,0xB0,0x02,0x3C,
+0x83,0x01,0x00,0x08,
+0x24,0x00,0x44,0x34,
+0x43,0xB0,0x02,0x3C,
+0x83,0x01,0x00,0x08,
+0x18,0x00,0x44,0x34,
+0x43,0xB0,0x02,0x3C,
+0x83,0x01,0x00,0x08,
+0x0C,0x00,0x44,0x34,
+0x83,0x01,0x00,0x08,
+0x43,0xB0,0x04,0x3C,
+0x00,0x80,0x03,0x3C,
+0x25,0xB0,0x02,0x3C,
+0x18,0x03,0x42,0x34,
+0xC0,0x06,0x63,0x24,
+0x00,0x00,0x43,0xAC,
+0x01,0x00,0x05,0x24,
+0x43,0xB0,0x02,0x3C,
+0x04,0x28,0x85,0x00,
+0x88,0x00,0x44,0x34,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0xFF,0x42,0x30,
+0x05,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x00,0x00,0x82,0x94,
+0x00,0x00,0x00,0x00,
+0xFF,0xFF,0x42,0x30,
+0x24,0x10,0x45,0x00,
+0xF5,0xFF,0x40,0x1C,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x08,0x3C,
+0x00,0x80,0x02,0x3C,
+0xC8,0xFF,0xBD,0x27,
+0x18,0x03,0x03,0x35,
+0x1C,0x07,0x42,0x24,
+0x00,0x00,0x62,0xAC,
+0x30,0x00,0xB6,0xAF,
+0x28,0x00,0xB4,0xAF,
+0x24,0x00,0xB3,0xAF,
+0x1C,0x00,0xB1,0xAF,
+0x34,0x00,0xBF,0xAF,
+0x2C,0x00,0xB5,0xAF,
+0x20,0x00,0xB2,0xAF,
+0x18,0x00,0xB0,0xAF,
+0x0C,0x00,0xF2,0x84,
+0x08,0x00,0xF5,0x8C,
+0xFF,0x00,0xC6,0x30,
+0x00,0x01,0x02,0x24,
+0x23,0x10,0x46,0x00,
+0xFF,0xFF,0x51,0x30,
+0xD0,0x03,0x08,0x35,
+0xFF,0x00,0x96,0x30,
+0x00,0x00,0x12,0xAD,
+0x21,0xA0,0xA0,0x00,
+0x21,0x30,0xC5,0x00,
+0x00,0x00,0x15,0xAD,
+0x21,0x20,0xC0,0x02,
+0x21,0x28,0xA0,0x02,
+0x21,0x38,0x20,0x02,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA0,0xAF,
+0x23,0x18,0x51,0x02,
+0xFF,0xFF,0x82,0x32,
+0x00,0x94,0x03,0x00,
+0x03,0x94,0x12,0x00,
+0x09,0x02,0x00,0x08,
+0x02,0x9A,0x02,0x00,
+0x28,0xB0,0x03,0x3C,
+0xC0,0x10,0x13,0x00,
+0x21,0x10,0x43,0x00,
+0x00,0x00,0x44,0x90,
+0x25,0xB0,0x10,0x3C,
+0x20,0x10,0x02,0x3C,
+0xFF,0x00,0x93,0x30,
+0x00,0x22,0x13,0x00,
+0xFF,0xFF,0x43,0x32,
+0x01,0x01,0x45,0x2A,
+0x21,0xA0,0x82,0x00,
+0x21,0xA8,0xB1,0x02,
+0xD0,0x03,0x02,0x36,
+0x00,0x01,0x11,0x24,
+0x0B,0x88,0x65,0x00,
+0x21,0x20,0xC0,0x02,
+0x00,0x00,0x53,0xAC,
+0xB0,0x01,0x00,0x0C,
+0xB0,0x03,0x10,0x36,
+0x21,0x30,0x80,0x02,
+0x21,0x20,0xC0,0x02,
+0x21,0x28,0xA0,0x02,
+0x21,0x38,0x20,0x02,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA0,0xAF,
+0x23,0x18,0x51,0x02,
+0x00,0x94,0x03,0x00,
+0x03,0x94,0x12,0x00,
+0x00,0x00,0x12,0xAE,
+0xE2,0xFF,0x40,0x1E,
+0x00,0x00,0x00,0x00,
+0x34,0x00,0xBF,0x8F,
+0x30,0x00,0xB6,0x8F,
+0x2C,0x00,0xB5,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x38,0x00,0xBD,0x27,
+0xD8,0xFF,0xBD,0x27,
+0x20,0x00,0xB2,0xAF,
+0x18,0x00,0xB0,0xAF,
+0x24,0x00,0xBF,0xAF,
+0x1C,0x00,0xB1,0xAF,
+0x04,0x00,0x8B,0x8C,
+0x21,0x80,0x80,0x00,
+0x08,0x00,0x84,0x8C,
+0x0E,0x00,0x07,0x96,
+0xFF,0xE0,0x02,0x3C,
+0x10,0x00,0x08,0x8E,
+0x1F,0x00,0x6A,0x31,
+0xFF,0xFF,0x42,0x34,
+0x24,0x20,0x82,0x00,
+0x00,0x1E,0x0A,0x00,
+0x25,0x48,0x83,0x00,
+0x21,0x90,0xA0,0x00,
+0x21,0x60,0xC0,0x00,
+0x10,0x01,0x00,0x05,
+0x07,0x00,0xE7,0x30,
+0x00,0x00,0x02,0x96,
+0x00,0x00,0x00,0x00,
+0xFD,0x0F,0x42,0x28,
+0xC0,0x00,0x40,0x14,
+0x02,0x80,0x11,0x3C,
+0xFF,0xDF,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x24,0x48,0x22,0x01,
+0x1C,0x00,0x02,0x8E,
+0x00,0x40,0x03,0x3C,
+0x25,0x48,0x23,0x01,
+0x02,0x80,0x11,0x3C,
+0xC5,0x00,0x40,0x04,
+0x08,0x00,0x09,0xAE,
+0xC0,0x30,0x0A,0x00,
+0x21,0x10,0xCA,0x00,
+0x80,0x10,0x02,0x00,
+0x21,0x10,0x4A,0x00,
+0x80,0x10,0x02,0x00,
+0x30,0x1F,0x27,0x26,
+0x21,0x28,0x47,0x00,
+0x1C,0x24,0xA3,0x8C,
+0x01,0x00,0x0A,0x24,
+0x02,0x13,0x03,0x00,
+0x01,0x00,0x42,0x30,
+0xDB,0x00,0x4A,0x10,
+0x42,0x18,0x03,0x00,
+0x82,0x11,0x09,0x00,
+0x01,0x00,0x42,0x30,
+0x06,0x00,0x40,0x14,
+0x02,0x80,0x02,0x3C,
+0xC0,0xFF,0x02,0x24,
+0x24,0x10,0x22,0x01,
+0x04,0x00,0x49,0x34,
+0x08,0x00,0x09,0xAE,
+0x02,0x80,0x02,0x3C,
+0xE9,0x5D,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0x6C,0x00,0x60,0x14,
+0x21,0x28,0xC7,0x00,
+0xE8,0x22,0xA4,0x8C,
+0x10,0x00,0x02,0x8E,
+0xBF,0xFF,0x03,0x24,
+0x40,0x00,0x84,0x30,
+0x24,0x10,0x43,0x00,
+0x25,0x40,0x44,0x00,
+0x10,0x00,0x08,0xAE,
+0xE8,0x22,0xA3,0x8C,
+0x7F,0xF8,0x02,0x24,
+0x24,0x10,0x02,0x01,
+0x80,0x07,0x63,0x30,
+0x42,0x27,0x09,0x00,
+0x25,0x40,0x43,0x00,
+0x01,0x00,0x84,0x30,
+0xE1,0x00,0x8A,0x10,
+0x10,0x00,0x08,0xAE,
+0x30,0x1F,0x24,0x26,
+0x21,0x20,0xC4,0x00,
+0xE8,0x22,0x83,0x8C,
+0xFF,0xF7,0x02,0x24,
+0x24,0x10,0x02,0x01,
+0x00,0x08,0x63,0x30,
+0x25,0x40,0x43,0x00,
+0x10,0x00,0x08,0xAE,
+0xE8,0x22,0x83,0x8C,
+0xFF,0xEF,0x02,0x24,
+0x24,0x10,0x02,0x01,
+0x00,0x10,0x63,0x30,
+0x30,0x1F,0x25,0x26,
+0x25,0x40,0x43,0x00,
+0x10,0x00,0x08,0xAE,
+0x21,0x30,0xC5,0x00,
+0xE8,0x22,0xC4,0x8C,
+0xFD,0xFF,0x02,0x3C,
+0x02,0x00,0x03,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x24,0x20,0x83,0x00,
+0x24,0x10,0x02,0x01,
+0x25,0x40,0x44,0x00,
+0x10,0x00,0x08,0xAE,
+0xB0,0x1B,0xA3,0x94,
+0xFB,0xFF,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0xC2,0x1B,0x03,0x00,
+0x24,0x10,0x02,0x01,
+0x80,0x1C,0x03,0x00,
+0x25,0x40,0x43,0x00,
+0x10,0x00,0x08,0xAE,
+0x8F,0x3E,0xA3,0x90,
+0xE7,0xFF,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x03,0x00,0x63,0x30,
+0x24,0x10,0x02,0x01,
+0xC0,0x1C,0x03,0x00,
+0x25,0x40,0x43,0x00,
+0x10,0x00,0x08,0xAE,
+0xE8,0x22,0xC4,0x8C,
+0xFF,0xFD,0x02,0x3C,
+0x00,0x02,0x03,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x24,0x20,0x83,0x00,
+0x24,0x10,0x02,0x01,
+0x25,0x40,0x44,0x00,
+0x10,0x00,0x08,0xAE,
+0xB0,0x1B,0xA3,0x94,
+0xFF,0xFB,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0xC2,0x1B,0x03,0x00,
+0x24,0x10,0x02,0x01,
+0x80,0x1E,0x03,0x00,
+0x25,0x40,0x43,0x00,
+0x10,0x00,0x08,0xAE,
+0x8F,0x3E,0xA3,0x90,
+0xFF,0xE7,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x03,0x00,0x63,0x30,
+0x24,0x10,0x02,0x01,
+0xC0,0x1E,0x03,0x00,
+0x25,0x40,0x43,0x00,
+0x10,0x00,0x08,0xAE,
+0xE8,0x22,0xC3,0x8C,
+0xC0,0xFF,0x02,0x24,
+0x24,0x10,0x02,0x01,
+0x3F,0x00,0x63,0x30,
+0x25,0x10,0x43,0x00,
+0x10,0x00,0x02,0xAE,
+0xEC,0x22,0xC5,0x8C,
+0x14,0x00,0x03,0x8E,
+0xFF,0xFF,0x04,0x3C,
+0xFF,0x7F,0x84,0x34,
+0x24,0x18,0x64,0x00,
+0x00,0x80,0xA5,0x30,
+0x25,0x18,0x65,0x00,
+0x14,0x00,0x03,0xAE,
+0xEC,0x22,0xC2,0x8C,
+0x24,0x18,0x64,0x00,
+0x00,0x80,0x42,0x30,
+0x25,0x18,0x62,0x00,
+0x14,0x00,0x03,0xAE,
+0xEE,0x22,0xC4,0x94,
+0xE0,0xFF,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x1F,0x00,0x84,0x30,
+0x24,0x18,0x62,0x00,
+0x00,0x24,0x04,0x00,
+0x25,0x18,0x64,0x00,
+0x14,0x00,0x03,0xAE,
+0x02,0x00,0x02,0x92,
+0x02,0x24,0x0B,0x00,
+0x02,0x80,0x03,0x3C,
+0x21,0x10,0x4C,0x00,
+0xFF,0xFF,0x42,0x30,
+0x01,0x00,0x84,0x30,
+0x6A,0x00,0x80,0x10,
+0x25,0x30,0x43,0x00,
+0x30,0x1F,0x23,0x26,
+0xF8,0x1D,0x62,0x94,
+0x00,0x00,0x00,0x00,
+0xFF,0x0F,0x45,0x30,
+0x01,0x00,0x42,0x24,
+0xF8,0x1D,0x62,0xA4,
+0x0C,0x00,0x03,0x8E,
+0x00,0xF0,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x00,0x24,0x05,0x00,
+0x24,0x18,0x62,0x00,
+0x25,0x18,0x64,0x00,
+0x0C,0x00,0x03,0xAE,
+0x16,0x00,0xC2,0x94,
+0x00,0x19,0x05,0x00,
+0x02,0x00,0x04,0x24,
+0x0F,0x00,0x42,0x30,
+0x25,0x10,0x43,0x00,
+0x16,0x00,0xC2,0xA4,
+0x21,0x28,0x80,0x01,
+0x21,0x30,0x40,0x02,
+0x80,0x00,0x07,0x24,
+0x01,0x00,0x02,0x24,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA2,0xAF,
+0x25,0xB0,0x02,0x3C,
+0xB0,0x03,0x42,0x34,
+0x00,0x00,0x52,0xAC,
+0xB0,0x01,0x00,0x0C,
+0x02,0x00,0x04,0x24,
+0x30,0x1F,0x24,0x26,
+0x00,0x00,0x03,0x96,
+0x94,0x3E,0x82,0x8C,
+0x24,0x00,0xBF,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x21,0x10,0x43,0x00,
+0x28,0x00,0xBD,0x27,
+0x08,0x00,0xE0,0x03,
+0x94,0x3E,0x82,0xAC,
+0x08,0x00,0x09,0xAE,
+0x30,0x1F,0x22,0x26,
+0x1A,0x3E,0x43,0x90,
+0xFF,0xDF,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x07,0x18,0xE3,0x00,
+0x01,0x00,0x63,0x30,
+0x24,0x10,0x22,0x01,
+0x40,0x1F,0x03,0x00,
+0x25,0x48,0x43,0x00,
+0x1C,0x00,0x02,0x8E,
+0x00,0x00,0x00,0x00,
+0x3D,0xFF,0x41,0x04,
+0x08,0x00,0x09,0xAE,
+0x1E,0x00,0x02,0x92,
+0x04,0x00,0x03,0x24,
+0x21,0x30,0x50,0x00,
+0x00,0x00,0xC4,0x90,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x82,0x30,
+0x02,0x29,0x02,0x00,
+0x50,0x00,0xA3,0x10,
+0x06,0x00,0x02,0x24,
+0x32,0xFF,0xA2,0x14,
+0x00,0x00,0x00,0x00,
+0x1A,0x00,0x02,0x96,
+0x00,0x00,0x00,0x00,
+0x39,0x00,0xC2,0xA0,
+0x1E,0x00,0x03,0x92,
+0x1A,0x00,0x02,0x96,
+0x21,0x18,0x70,0x00,
+0x03,0x12,0x02,0x00,
+0x38,0x00,0x62,0xA0,
+0x04,0x00,0x0B,0x8E,
+0x08,0x00,0x09,0x8E,
+0xC0,0x30,0x0A,0x00,
+0x21,0x10,0xCA,0x00,
+0x80,0x10,0x02,0x00,
+0x21,0x10,0x4A,0x00,
+0x80,0x10,0x02,0x00,
+0x30,0x1F,0x27,0x26,
+0x21,0x28,0x47,0x00,
+0x1C,0x24,0xA3,0x8C,
+0x01,0x00,0x0A,0x24,
+0x02,0x13,0x03,0x00,
+0x01,0x00,0x42,0x30,
+0x29,0xFF,0x4A,0x14,
+0x82,0x11,0x09,0x00,
+0x42,0x18,0x03,0x00,
+0x7F,0xFF,0x02,0x24,
+0x24,0x10,0x22,0x01,
+0x80,0x00,0x63,0x30,
+0x25,0x48,0x43,0x00,
+0x08,0x00,0x09,0xAE,
+0x1C,0x24,0xA3,0x8C,
+0x10,0x00,0x04,0x8E,
+0xFF,0xFF,0x02,0x3C,
+0x07,0x00,0x63,0x30,
+0xFF,0x1F,0x42,0x34,
+0x24,0x20,0x82,0x00,
+0x40,0x1B,0x03,0x00,
+0x25,0x40,0x83,0x00,
+0x44,0x02,0x00,0x08,
+0x10,0x00,0x08,0xAE,
+0x0E,0x00,0x02,0x96,
+0x30,0x1F,0x23,0x26,
+0x07,0x00,0x42,0x30,
+0x40,0x10,0x02,0x00,
+0x21,0x10,0x43,0x00,
+0xE8,0x1D,0x44,0x94,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x83,0x24,
+0xFF,0x0F,0x85,0x30,
+0xCA,0x02,0x00,0x08,
+0xE8,0x1D,0x43,0xA4,
+0x14,0x00,0x02,0x8E,
+0x00,0x00,0x00,0x00,
+0x42,0x12,0x02,0x00,
+0x3F,0x00,0x42,0x30,
+0x0C,0x00,0x42,0x28,
+0xF1,0xFE,0x40,0x14,
+0xFF,0xDF,0x02,0x3C,
+0x29,0x02,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x02,0x3C,
+0xE6,0x5D,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0x1D,0xFF,0x64,0x14,
+0x30,0x1F,0x24,0x26,
+0x90,0x3E,0xE2,0x90,
+0xFF,0xF7,0x03,0x24,
+0x24,0x18,0x03,0x01,
+0x01,0x00,0x42,0x30,
+0xC0,0x12,0x02,0x00,
+0x25,0x40,0x62,0x00,
+0x10,0x00,0x08,0xAE,
+0x91,0x3E,0xE2,0x90,
+0xFF,0xEF,0x03,0x24,
+0x24,0x18,0x03,0x01,
+0x01,0x00,0x42,0x30,
+0x6D,0x02,0x00,0x08,
+0x00,0x13,0x02,0x00,
+0x1A,0x00,0x05,0x96,
+0x0F,0x00,0x84,0x30,
+0x80,0x20,0x04,0x00,
+0x21,0x18,0xC4,0x00,
+0x11,0x00,0x65,0xA0,
+0x1E,0x00,0x02,0x92,
+0x1A,0x00,0x03,0x96,
+0x21,0x10,0x50,0x00,
+0x21,0x10,0x44,0x00,
+0x03,0x1A,0x03,0x00,
+0x10,0x00,0x43,0xA0,
+0x04,0x00,0x0B,0x8E,
+0x08,0x00,0x09,0x8E,
+0x11,0x03,0x00,0x08,
+0xC0,0x30,0x0A,0x00,
+0x00,0x80,0x03,0x3C,
+0x25,0xB0,0x02,0x3C,
+0x88,0x0D,0x63,0x24,
+0x18,0x03,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x04,0x3C,
+0x00,0x80,0x02,0x3C,
+0xC0,0xFF,0xBD,0x27,
+0x18,0x03,0x83,0x34,
+0xA4,0x0D,0x42,0x24,
+0x3C,0x00,0xBF,0xAF,
+0x38,0x00,0xBE,0xAF,
+0x34,0x00,0xB7,0xAF,
+0x30,0x00,0xB6,0xAF,
+0x2C,0x00,0xB5,0xAF,
+0x28,0x00,0xB4,0xAF,
+0x24,0x00,0xB3,0xAF,
+0x20,0x00,0xB2,0xAF,
+0x1C,0x00,0xB1,0xAF,
+0x18,0x00,0xB0,0xAF,
+0x00,0x00,0x62,0xAC,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x02,0x80,0x02,0x3C,
+0xB0,0x03,0x9E,0x34,
+0x98,0x03,0x00,0x08,
+0x30,0x1F,0x55,0x24,
+0x08,0x00,0x04,0xAE,
+0x14,0x37,0x46,0x8E,
+0x21,0x28,0x60,0x02,
+0x80,0x00,0x07,0x24,
+0x01,0x00,0x04,0x24,
+0x01,0x00,0x14,0x24,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xB4,0xAF,
+0x14,0x37,0x43,0x8E,
+0x01,0x00,0x04,0x24,
+0x00,0x00,0xC3,0xAE,
+0xB0,0x01,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x2A,0x1C,0x42,0x92,
+0x00,0x00,0x00,0x00,
+0x5F,0x00,0x40,0x10,
+0x2A,0xB0,0x02,0x3C,
+0x09,0x00,0x42,0x34,
+0x02,0x00,0x03,0x24,
+0x00,0x00,0x54,0xA0,
+0x00,0x00,0x43,0xA0,
+0xFF,0x00,0x03,0x24,
+0x74,0x00,0x23,0x12,
+0x00,0x00,0x00,0x00,
+0x10,0x37,0xA2,0x8E,
+0x7C,0x37,0xB3,0x8E,
+0x01,0x00,0x04,0x24,
+0x00,0x00,0xC2,0xAF,
+0x14,0x37,0xA2,0xAE,
+0x00,0x00,0xD3,0xAF,
+0xB0,0x01,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x7C,0x37,0xA4,0x8E,
+0x80,0x37,0xA3,0x8E,
+0x02,0x80,0x02,0x3C,
+0x04,0xEA,0x42,0x24,
+0x00,0x00,0x52,0x8C,
+0x80,0x00,0x84,0x24,
+0xFF,0x00,0x62,0x24,
+0x2B,0x10,0x44,0x00,
+0x0A,0x18,0x82,0x00,
+0x7C,0x37,0xA3,0xAE,
+0x02,0x80,0x03,0x3C,
+0x08,0xEA,0x63,0x24,
+0x7C,0x37,0x42,0x8E,
+0x00,0x00,0x76,0x8C,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xC2,0xAE,
+0x02,0x80,0x17,0x3C,
+0xFF,0xFF,0x62,0x32,
+0x25,0x80,0x57,0x00,
+0x00,0x00,0xD0,0xAE,
+0x0C,0x00,0x02,0x92,
+0x21,0x28,0x00,0x00,
+0x00,0x00,0xC2,0xAE,
+0x02,0x00,0x04,0x92,
+0x00,0x00,0x00,0x00,
+0x21,0x20,0x93,0x00,
+0xFF,0xFF,0x84,0x30,
+0xFB,0x60,0x00,0x0C,
+0x25,0x20,0x97,0x00,
+0x0C,0x00,0x11,0x92,
+0x20,0x10,0x02,0x3C,
+0x01,0x00,0x04,0x24,
+0x00,0x1A,0x11,0x00,
+0x21,0x18,0x62,0x00,
+0xFF,0x00,0x02,0x24,
+0x21,0x30,0x60,0x00,
+0x06,0x00,0x22,0x12,
+0x80,0x00,0x07,0x24,
+0x7C,0x37,0x45,0x8E,
+0x10,0x37,0x43,0xAE,
+0xB4,0x36,0x51,0xA2,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA0,0xAF,
+0x04,0x00,0x04,0x8E,
+0x08,0x00,0x03,0x8E,
+0xFF,0xE0,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x1F,0x00,0x84,0x30,
+0x24,0x18,0x62,0x00,
+0x00,0x26,0x04,0x00,
+0xFF,0xDF,0x02,0x3C,
+0x25,0x18,0x64,0x00,
+0xFF,0xFF,0x42,0x34,
+0x24,0x18,0x62,0x00,
+0x00,0x40,0x04,0x3C,
+0x25,0x18,0x64,0x00,
+0xC0,0xFF,0x05,0x24,
+0x82,0x11,0x03,0x00,
+0x24,0x20,0x65,0x00,
+0x01,0x00,0x42,0x30,
+0xA3,0xFF,0x40,0x10,
+0x04,0x00,0x84,0x34,
+0x08,0x00,0x03,0xAE,
+0x14,0x37,0x46,0x8E,
+0x21,0x28,0x60,0x02,
+0x80,0x00,0x07,0x24,
+0x01,0x00,0x04,0x24,
+0x01,0x00,0x14,0x24,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xB4,0xAF,
+0x14,0x37,0x43,0x8E,
+0x01,0x00,0x04,0x24,
+0x00,0x00,0xC3,0xAE,
+0xB0,0x01,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x2A,0x1C,0x42,0x92,
+0x00,0x00,0x00,0x00,
+0xA3,0xFF,0x40,0x14,
+0x2A,0xB0,0x02,0x3C,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x2A,0x1C,0x54,0xA2,
+0x02,0x00,0x02,0x92,
+0x00,0x00,0x00,0x00,
+0x21,0x10,0x53,0x00,
+0xFF,0xFF,0x42,0x30,
+0x25,0x10,0x57,0x00,
+0x02,0x00,0x43,0x94,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x64,0x30,
+0x00,0xC0,0x84,0x24,
+0xFF,0xFF,0x84,0x30,
+0xC2,0x34,0x00,0x0C,
+0x2B,0x1C,0x43,0xA2,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x2A,0xB0,0x02,0x3C,
+0x09,0x00,0x42,0x34,
+0x02,0x00,0x03,0x24,
+0x00,0x00,0x54,0xA0,
+0x00,0x00,0x43,0xA0,
+0xFF,0x00,0x03,0x24,
+0x8E,0xFF,0x23,0x16,
+0x00,0x00,0x00,0x00,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x02,0x80,0x03,0x3C,
+0x30,0x1F,0x62,0x24,
+0xD0,0x1B,0x43,0x8C,
+0x3C,0x00,0xBF,0x8F,
+0x38,0x00,0xBE,0x8F,
+0x34,0x00,0xB7,0x8F,
+0x30,0x00,0xB6,0x8F,
+0x2C,0x00,0xB5,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x00,0x38,0x63,0x34,
+0x41,0xB0,0x04,0x3C,
+0x40,0x00,0xBD,0x27,
+0x00,0x00,0x83,0xAC,
+0x08,0x00,0xE0,0x03,
+0xD0,0x1B,0x43,0xAC,
+0x00,0x80,0x03,0x3C,
+0x25,0xB0,0x02,0x3C,
+0x88,0x10,0x63,0x24,
+0x18,0x03,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xC0,0xFF,0xBD,0x27,
+0x34,0x00,0xB7,0xAF,
+0x3C,0x00,0xBF,0xAF,
+0x38,0x00,0xBE,0xAF,
+0x30,0x00,0xB6,0xAF,
+0x2C,0x00,0xB5,0xAF,
+0x28,0x00,0xB4,0xAF,
+0x24,0x00,0xB3,0xAF,
+0x20,0x00,0xB2,0xAF,
+0x1C,0x00,0xB1,0xAF,
+0x18,0x00,0xB0,0xAF,
+0x02,0x80,0x06,0x3C,
+0xCC,0x5E,0xC5,0x90,
+0x00,0x80,0x03,0x3C,
+0x25,0xB0,0x02,0x3C,
+0x18,0x03,0x42,0x34,
+0xA4,0x10,0x63,0x24,
+0x40,0x00,0xA4,0x30,
+0x00,0x00,0x43,0xAC,
+0x21,0xB8,0x00,0x00,
+0x03,0x00,0x80,0x10,
+0x7F,0x00,0xA2,0x30,
+0xBF,0x00,0xA2,0x30,
+0x01,0x00,0x17,0x24,
+0xCC,0x5E,0xC2,0xA0,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x02,0x80,0x1E,0x3C,
+0x25,0xB0,0x02,0x3C,
+0x30,0x1F,0xD3,0x27,
+0xB0,0x03,0x55,0x34,
+0x6A,0x04,0x00,0x08,
+0x02,0x80,0x16,0x3C,
+0x90,0x36,0x91,0xA2,
+0x30,0x1F,0xC2,0x27,
+0xC8,0x36,0x46,0x8C,
+0x34,0x37,0x45,0x8C,
+0x03,0x00,0x04,0x24,
+0x80,0x00,0x07,0x24,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA0,0xAF,
+0x30,0x1F,0xD4,0x27,
+0xCC,0x36,0x85,0x8E,
+0x21,0x20,0x00,0x02,
+0x15,0x02,0x00,0x0C,
+0x21,0x30,0x40,0x02,
+0x2A,0xB0,0x07,0x3C,
+0x0D,0x00,0xE2,0x34,
+0x04,0x00,0x43,0x24,
+0x0B,0x10,0x77,0x00,
+0x01,0x00,0x04,0x24,
+0x02,0x00,0x03,0x24,
+0x00,0x00,0x44,0xA0,
+0x00,0x00,0x43,0xA0,
+0x1A,0x5E,0xC4,0x96,
+0x25,0xB0,0x06,0x3C,
+0x66,0x03,0xC5,0x34,
+0x01,0x00,0x84,0x24,
+0x1A,0x5E,0xC4,0xA6,
+0x1A,0x5E,0xC2,0x96,
+0xFF,0x00,0x03,0x24,
+0x00,0x00,0xA2,0xA4,
+0x2F,0x00,0x23,0x12,
+0x00,0x00,0x00,0x00,
+0xC8,0x36,0x62,0x8E,
+0x34,0x37,0x72,0x8E,
+0x03,0x00,0x04,0x24,
+0x00,0x00,0xA2,0xAE,
+0xCC,0x36,0x62,0xAE,
+0x00,0x00,0xB2,0xAE,
+0xB0,0x01,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x34,0x37,0x64,0x8E,
+0x38,0x37,0x63,0x8E,
+0x02,0x80,0x02,0x3C,
+0x0C,0xEA,0x42,0x24,
+0x00,0x00,0x54,0x8C,
+0x80,0x00,0x84,0x24,
+0xFF,0x00,0x62,0x24,
+0x2B,0x10,0x44,0x00,
+0x0A,0x18,0x82,0x00,
+0x34,0x37,0x63,0xAE,
+0x34,0x37,0x82,0x8E,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xA2,0xAE,
+0x02,0x80,0x03,0x3C,
+0xFF,0xFF,0x42,0x32,
+0x25,0x80,0x43,0x00,
+0x00,0x00,0xB0,0xAE,
+0x0C,0x00,0x02,0x92,
+0x01,0x00,0x05,0x24,
+0x00,0x00,0xA2,0xAE,
+0x02,0x00,0x04,0x92,
+0x00,0x00,0x00,0x00,
+0x21,0x20,0x92,0x00,
+0xFF,0xFF,0x84,0x30,
+0xFB,0x60,0x00,0x0C,
+0x25,0x20,0x83,0x00,
+0x0C,0x00,0x11,0x92,
+0x20,0x10,0x02,0x3C,
+0xFF,0x00,0x03,0x24,
+0x00,0x22,0x11,0x00,
+0xC2,0xFF,0x23,0x12,
+0x21,0x20,0x82,0x00,
+0xB8,0xFF,0xE0,0x16,
+0xC8,0x36,0x84,0xAE,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x42,0x24,
+0x4C,0x04,0x00,0x08,
+0x8C,0x36,0x51,0xA0,
+0x21,0x00,0xE0,0x12,
+0x40,0x00,0xE4,0x34,
+0x90,0x36,0x83,0x92,
+0x41,0x00,0xE4,0x34,
+0xB0,0x03,0xC5,0x34,
+0x00,0x00,0x83,0xA0,
+0x00,0x00,0xA3,0xAC,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x30,0x1F,0xC5,0x27,
+0xD0,0x1B,0xA4,0x8C,
+0x01,0x00,0x02,0x3C,
+0x3C,0x00,0xBF,0x8F,
+0x38,0x00,0xBE,0x8F,
+0x34,0x00,0xB7,0x8F,
+0x30,0x00,0xB6,0x8F,
+0x2C,0x00,0xB5,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x00,0x80,0x42,0x34,
+0x25,0x20,0x82,0x00,
+0x41,0xB0,0x03,0x3C,
+0x40,0x00,0xBD,0x27,
+0x00,0x00,0x64,0xAC,
+0x08,0x00,0xE0,0x03,
+0xD0,0x1B,0xA4,0xAC,
+0x8C,0x36,0x83,0x92,
+0xB0,0x03,0xC5,0x34,
+0x00,0x00,0x83,0xA0,
+0x00,0x00,0xA3,0xAC,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x30,0x1F,0xC5,0x27,
+0xD0,0x1B,0xA4,0x8C,
+0x01,0x00,0x02,0x3C,
+0x3C,0x00,0xBF,0x8F,
+0x38,0x00,0xBE,0x8F,
+0x34,0x00,0xB7,0x8F,
+0x30,0x00,0xB6,0x8F,
+0x2C,0x00,0xB5,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x00,0x80,0x42,0x34,
+0x25,0x20,0x82,0x00,
+0x41,0xB0,0x03,0x3C,
+0x40,0x00,0xBD,0x27,
+0x00,0x00,0x64,0xAC,
+0x08,0x00,0xE0,0x03,
+0xD0,0x1B,0xA4,0xAC,
+0xC0,0xFF,0xBD,0x27,
+0x34,0x00,0xB7,0xAF,
+0x3C,0x00,0xBF,0xAF,
+0x38,0x00,0xBE,0xAF,
+0x30,0x00,0xB6,0xAF,
+0x2C,0x00,0xB5,0xAF,
+0x28,0x00,0xB4,0xAF,
+0x24,0x00,0xB3,0xAF,
+0x20,0x00,0xB2,0xAF,
+0x1C,0x00,0xB1,0xAF,
+0x18,0x00,0xB0,0xAF,
+0x02,0x80,0x06,0x3C,
+0xCC,0x5E,0xC5,0x90,
+0x00,0x80,0x03,0x3C,
+0x25,0xB0,0x02,0x3C,
+0x18,0x03,0x42,0x34,
+0x64,0x13,0x63,0x24,
+0x10,0x00,0xA4,0x30,
+0x00,0x00,0x43,0xAC,
+0x21,0xB8,0x00,0x00,
+0x03,0x00,0x80,0x10,
+0xDF,0x00,0xA2,0x30,
+0xEF,0x00,0xA2,0x30,
+0x01,0x00,0x17,0x24,
+0xCC,0x5E,0xC2,0xA0,
+0xCC,0x5E,0xC3,0x90,
+0x25,0xB0,0x02,0x3C,
+0xB0,0x03,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0x00,0x00,0x43,0xAC,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x02,0x80,0x1E,0x3C,
+0x30,0x1F,0xD3,0x27,
+0x21,0xA8,0x40,0x00,
+0x1E,0x05,0x00,0x08,
+0x02,0x80,0x16,0x3C,
+0x98,0x36,0x91,0xA2,
+0x30,0x1F,0xC2,0x27,
+0xD4,0x36,0x46,0x8C,
+0x40,0x37,0x45,0x8C,
+0x04,0x00,0x04,0x24,
+0x80,0x00,0x07,0x24,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA0,0xAF,
+0x30,0x1F,0xD4,0x27,
+0xD8,0x36,0x85,0x8E,
+0x21,0x20,0x00,0x02,
+0x15,0x02,0x00,0x0C,
+0x21,0x30,0x40,0x02,
+0x2A,0xB0,0x07,0x3C,
+0x15,0x00,0xE2,0x34,
+0x04,0x00,0x43,0x24,
+0x0B,0x10,0x77,0x00,
+0x01,0x00,0x04,0x24,
+0x02,0x00,0x03,0x24,
+0x00,0x00,0x44,0xA0,
+0x00,0x00,0x43,0xA0,
+0x1A,0x5E,0xC4,0x96,
+0x25,0xB0,0x06,0x3C,
+0x66,0x03,0xC5,0x34,
+0x01,0x00,0x84,0x24,
+0x1A,0x5E,0xC4,0xA6,
+0x1A,0x5E,0xC2,0x96,
+0xFF,0x00,0x03,0x24,
+0x00,0x00,0xA2,0xA4,
+0x2F,0x00,0x23,0x12,
+0x00,0x00,0x00,0x00,
+0xD4,0x36,0x62,0x8E,
+0x40,0x37,0x72,0x8E,
+0x04,0x00,0x04,0x24,
+0x00,0x00,0xA2,0xAE,
+0xD8,0x36,0x62,0xAE,
+0x00,0x00,0xB2,0xAE,
+0xB0,0x01,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x40,0x37,0x64,0x8E,
+0x44,0x37,0x63,0x8E,
+0x02,0x80,0x02,0x3C,
+0x10,0xEA,0x42,0x24,
+0x00,0x00,0x54,0x8C,
+0x80,0x00,0x84,0x24,
+0xFF,0x00,0x62,0x24,
+0x2B,0x10,0x44,0x00,
+0x0A,0x18,0x82,0x00,
+0x40,0x37,0x63,0xAE,
+0x40,0x37,0x82,0x8E,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xA2,0xAE,
+0x02,0x80,0x03,0x3C,
+0xFF,0xFF,0x42,0x32,
+0x25,0x80,0x43,0x00,
+0x00,0x00,0xB0,0xAE,
+0x0C,0x00,0x02,0x92,
+0x02,0x00,0x05,0x24,
+0x00,0x00,0xA2,0xAE,
+0x02,0x00,0x04,0x92,
+0x00,0x00,0x00,0x00,
+0x21,0x20,0x92,0x00,
+0xFF,0xFF,0x84,0x30,
+0xFB,0x60,0x00,0x0C,
+0x25,0x20,0x83,0x00,
+0x0C,0x00,0x11,0x92,
+0x20,0x10,0x02,0x3C,
+0xFF,0x00,0x03,0x24,
+0x00,0x22,0x11,0x00,
+0xC2,0xFF,0x23,0x12,
+0x21,0x20,0x82,0x00,
+0xB8,0xFF,0xE0,0x16,
+0xD4,0x36,0x84,0xAE,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x42,0x24,
+0x00,0x05,0x00,0x08,
+0x94,0x36,0x51,0xA0,
+0x20,0x00,0xE0,0x12,
+0x42,0x00,0xE4,0x34,
+0x98,0x36,0x83,0x92,
+0x43,0x00,0xE4,0x34,
+0xB0,0x03,0xC5,0x34,
+0x00,0x00,0x83,0xA0,
+0x00,0x00,0xA3,0xAC,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x30,0x1F,0xC5,0x27,
+0xD0,0x1B,0xA2,0x8C,
+0x3C,0x00,0xBF,0x8F,
+0x38,0x00,0xBE,0x8F,
+0x34,0x00,0xB7,0x8F,
+0x30,0x00,0xB6,0x8F,
+0x2C,0x00,0xB5,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x06,0x00,0x03,0x3C,
+0x25,0x10,0x43,0x00,
+0x41,0xB0,0x04,0x3C,
+0x40,0x00,0xBD,0x27,
+0x00,0x00,0x82,0xAC,
+0x08,0x00,0xE0,0x03,
+0xD0,0x1B,0xA2,0xAC,
+0x94,0x36,0x83,0x92,
+0xB0,0x03,0xC5,0x34,
+0x00,0x00,0x83,0xA0,
+0x00,0x00,0xA3,0xAC,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x30,0x1F,0xC5,0x27,
+0xD0,0x1B,0xA2,0x8C,
+0x3C,0x00,0xBF,0x8F,
+0x38,0x00,0xBE,0x8F,
+0x34,0x00,0xB7,0x8F,
+0x30,0x00,0xB6,0x8F,
+0x2C,0x00,0xB5,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x06,0x00,0x03,0x3C,
+0x25,0x10,0x43,0x00,
+0x41,0xB0,0x04,0x3C,
+0x40,0x00,0xBD,0x27,
+0x00,0x00,0x82,0xAC,
+0x08,0x00,0xE0,0x03,
+0xD0,0x1B,0xA2,0xAC,
+0xC0,0xFF,0xBD,0x27,
+0x34,0x00,0xB7,0xAF,
+0x3C,0x00,0xBF,0xAF,
+0x38,0x00,0xBE,0xAF,
+0x30,0x00,0xB6,0xAF,
+0x2C,0x00,0xB5,0xAF,
+0x28,0x00,0xB4,0xAF,
+0x24,0x00,0xB3,0xAF,
+0x20,0x00,0xB2,0xAF,
+0x1C,0x00,0xB1,0xAF,
+0x18,0x00,0xB0,0xAF,
+0x02,0x80,0x06,0x3C,
+0xCC,0x5E,0xC5,0x90,
+0x00,0x80,0x03,0x3C,
+0x25,0xB0,0x02,0x3C,
+0x18,0x03,0x42,0x34,
+0x2C,0x16,0x63,0x24,
+0x01,0x00,0xA4,0x30,
+0x00,0x00,0x43,0xAC,
+0x21,0xB8,0x00,0x00,
+0x03,0x00,0x80,0x10,
+0xF7,0x00,0xA2,0x30,
+0xFE,0x00,0xA2,0x30,
+0x01,0x00,0x17,0x24,
+0xCC,0x5E,0xC2,0xA0,
+0xCC,0x5E,0xC3,0x90,
+0x25,0xB0,0x02,0x3C,
+0xB0,0x03,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x02,0x80,0x1E,0x3C,
+0x30,0x1F,0xD3,0x27,
+0x21,0xA8,0x40,0x00,
+0xCF,0x05,0x00,0x08,
+0x02,0x80,0x16,0x3C,
+0xA8,0x36,0x91,0xA2,
+0x30,0x1F,0xC2,0x27,
+0xE0,0x36,0x46,0x8C,
+0x4C,0x37,0x45,0x8C,
+0x05,0x00,0x04,0x24,
+0x80,0x00,0x07,0x24,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA0,0xAF,
+0x30,0x1F,0xD4,0x27,
+0xE4,0x36,0x85,0x8E,
+0x21,0x20,0x00,0x02,
+0x15,0x02,0x00,0x0C,
+0x21,0x30,0x40,0x02,
+0x2A,0xB0,0x07,0x3C,
+0x1D,0x00,0xE2,0x34,
+0x04,0x00,0x43,0x24,
+0x0B,0x10,0x77,0x00,
+0x01,0x00,0x04,0x24,
+0x02,0x00,0x03,0x24,
+0x00,0x00,0x44,0xA0,
+0x00,0x00,0x43,0xA0,
+0x1A,0x5E,0xC4,0x96,
+0x25,0xB0,0x06,0x3C,
+0x66,0x03,0xC5,0x34,
+0x01,0x00,0x84,0x24,
+0x1A,0x5E,0xC4,0xA6,
+0x1A,0x5E,0xC2,0x96,
+0xFF,0x00,0x03,0x24,
+0x00,0x00,0xA2,0xA4,
+0x2F,0x00,0x23,0x12,
+0x00,0x00,0x00,0x00,
+0xE0,0x36,0x62,0x8E,
+0x4C,0x37,0x72,0x8E,
+0x05,0x00,0x04,0x24,
+0x00,0x00,0xA2,0xAE,
+0xE4,0x36,0x62,0xAE,
+0x00,0x00,0xB2,0xAE,
+0xB0,0x01,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x4C,0x37,0x64,0x8E,
+0x50,0x37,0x63,0x8E,
+0x02,0x80,0x02,0x3C,
+0x14,0xEA,0x42,0x24,
+0x00,0x00,0x54,0x8C,
+0x80,0x00,0x84,0x24,
+0xFF,0x00,0x62,0x24,
+0x2B,0x10,0x44,0x00,
+0x0A,0x18,0x82,0x00,
+0x4C,0x37,0x63,0xAE,
+0x4C,0x37,0x82,0x8E,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xA2,0xAE,
+0x02,0x80,0x03,0x3C,
+0xFF,0xFF,0x42,0x32,
+0x25,0x80,0x43,0x00,
+0x00,0x00,0xB0,0xAE,
+0x0C,0x00,0x02,0x92,
+0x08,0x00,0x05,0x24,
+0x00,0x00,0xA2,0xAE,
+0x02,0x00,0x04,0x92,
+0x00,0x00,0x00,0x00,
+0x21,0x20,0x92,0x00,
+0xFF,0xFF,0x84,0x30,
+0xFB,0x60,0x00,0x0C,
+0x25,0x20,0x83,0x00,
+0x0C,0x00,0x11,0x92,
+0x20,0x10,0x02,0x3C,
+0xFF,0x00,0x03,0x24,
+0x00,0x22,0x11,0x00,
+0xC2,0xFF,0x23,0x12,
+0x21,0x20,0x82,0x00,
+0xB8,0xFF,0xE0,0x16,
+0xE0,0x36,0x84,0xAE,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x42,0x24,
+0xB1,0x05,0x00,0x08,
+0x9C,0x36,0x51,0xA0,
+0x20,0x00,0xE0,0x12,
+0x44,0x00,0xE4,0x34,
+0xA8,0x36,0x83,0x92,
+0x45,0x00,0xE4,0x34,
+0xB0,0x03,0xC5,0x34,
+0x00,0x00,0x83,0xA0,
+0x00,0x00,0xA3,0xAC,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x30,0x1F,0xC5,0x27,
+0xD0,0x1B,0xA2,0x8C,
+0x3C,0x00,0xBF,0x8F,
+0x38,0x00,0xBE,0x8F,
+0x34,0x00,0xB7,0x8F,
+0x30,0x00,0xB6,0x8F,
+0x2C,0x00,0xB5,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x18,0x00,0x03,0x3C,
+0x25,0x10,0x43,0x00,
+0x41,0xB0,0x04,0x3C,
+0x40,0x00,0xBD,0x27,
+0x00,0x00,0x82,0xAC,
+0x08,0x00,0xE0,0x03,
+0xD0,0x1B,0xA2,0xAC,
+0x9C,0x36,0x83,0x92,
+0xB0,0x03,0xC5,0x34,
+0x00,0x00,0x83,0xA0,
+0x00,0x00,0xA3,0xAC,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x30,0x1F,0xC5,0x27,
+0xD0,0x1B,0xA2,0x8C,
+0x3C,0x00,0xBF,0x8F,
+0x38,0x00,0xBE,0x8F,
+0x34,0x00,0xB7,0x8F,
+0x30,0x00,0xB6,0x8F,
+0x2C,0x00,0xB5,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x18,0x00,0x03,0x3C,
+0x25,0x10,0x43,0x00,
+0x41,0xB0,0x04,0x3C,
+0x40,0x00,0xBD,0x27,
+0x00,0x00,0x82,0xAC,
+0x08,0x00,0xE0,0x03,
+0xD0,0x1B,0xA2,0xAC,
+0xC0,0xFF,0xBD,0x27,
+0x34,0x00,0xB7,0xAF,
+0x3C,0x00,0xBF,0xAF,
+0x38,0x00,0xBE,0xAF,
+0x30,0x00,0xB6,0xAF,
+0x2C,0x00,0xB5,0xAF,
+0x28,0x00,0xB4,0xAF,
+0x24,0x00,0xB3,0xAF,
+0x20,0x00,0xB2,0xAF,
+0x1C,0x00,0xB1,0xAF,
+0x18,0x00,0xB0,0xAF,
+0x02,0x80,0x06,0x3C,
+0xCC,0x5E,0xC5,0x90,
+0x00,0x80,0x03,0x3C,
+0x25,0xB0,0x02,0x3C,
+0x18,0x03,0x42,0x34,
+0xF0,0x18,0x63,0x24,
+0x02,0x00,0xA4,0x30,
+0x00,0x00,0x43,0xAC,
+0x21,0xB8,0x00,0x00,
+0x03,0x00,0x80,0x10,
+0xFB,0x00,0xA2,0x30,
+0xFD,0x00,0xA2,0x30,
+0x01,0x00,0x17,0x24,
+0xCC,0x5E,0xC2,0xA0,
+0xCC,0x5E,0xC3,0x90,
+0x25,0xB0,0x02,0x3C,
+0xB0,0x03,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x02,0x80,0x1E,0x3C,
+0x30,0x1F,0xD3,0x27,
+0x21,0xA8,0x40,0x00,
+0x80,0x06,0x00,0x08,
+0x02,0x80,0x16,0x3C,
+0xA4,0x36,0x91,0xA2,
+0x30,0x1F,0xC2,0x27,
+0xEC,0x36,0x46,0x8C,
+0x58,0x37,0x45,0x8C,
+0x06,0x00,0x04,0x24,
+0x80,0x00,0x07,0x24,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA0,0xAF,
+0x30,0x1F,0xD4,0x27,
+0xF0,0x36,0x85,0x8E,
+0x21,0x20,0x00,0x02,
+0x15,0x02,0x00,0x0C,
+0x21,0x30,0x40,0x02,
+0x2A,0xB0,0x07,0x3C,
+0x25,0x00,0xE2,0x34,
+0x04,0x00,0x43,0x24,
+0x0B,0x10,0x77,0x00,
+0x01,0x00,0x04,0x24,
+0x02,0x00,0x03,0x24,
+0x00,0x00,0x44,0xA0,
+0x00,0x00,0x43,0xA0,
+0x1A,0x5E,0xC4,0x96,
+0x25,0xB0,0x06,0x3C,
+0x66,0x03,0xC5,0x34,
+0x01,0x00,0x84,0x24,
+0x1A,0x5E,0xC4,0xA6,
+0x1A,0x5E,0xC2,0x96,
+0xFF,0x00,0x03,0x24,
+0x00,0x00,0xA2,0xA4,
+0x2F,0x00,0x23,0x12,
+0x00,0x00,0x00,0x00,
+0xEC,0x36,0x62,0x8E,
+0x58,0x37,0x72,0x8E,
+0x06,0x00,0x04,0x24,
+0x00,0x00,0xA2,0xAE,
+0xF0,0x36,0x62,0xAE,
+0x00,0x00,0xB2,0xAE,
+0xB0,0x01,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x58,0x37,0x64,0x8E,
+0x5C,0x37,0x63,0x8E,
+0x02,0x80,0x02,0x3C,
+0x18,0xEA,0x42,0x24,
+0x00,0x00,0x54,0x8C,
+0x80,0x00,0x84,0x24,
+0xFF,0x00,0x62,0x24,
+0x2B,0x10,0x44,0x00,
+0x0A,0x18,0x82,0x00,
+0x58,0x37,0x63,0xAE,
+0x58,0x37,0x82,0x8E,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xA2,0xAE,
+0x02,0x80,0x03,0x3C,
+0xFF,0xFF,0x42,0x32,
+0x25,0x80,0x43,0x00,
+0x00,0x00,0xB0,0xAE,
+0x0C,0x00,0x02,0x92,
+0x04,0x00,0x05,0x24,
+0x00,0x00,0xA2,0xAE,
+0x02,0x00,0x04,0x92,
+0x00,0x00,0x00,0x00,
+0x21,0x20,0x92,0x00,
+0xFF,0xFF,0x84,0x30,
+0xFB,0x60,0x00,0x0C,
+0x25,0x20,0x83,0x00,
+0x0C,0x00,0x11,0x92,
+0x20,0x10,0x02,0x3C,
+0xFF,0x00,0x03,0x24,
+0x00,0x22,0x11,0x00,
+0xC2,0xFF,0x23,0x12,
+0x21,0x20,0x82,0x00,
+0xB8,0xFF,0xE0,0x16,
+0xEC,0x36,0x84,0xAE,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x42,0x24,
+0x62,0x06,0x00,0x08,
+0xA0,0x36,0x51,0xA0,
+0x20,0x00,0xE0,0x12,
+0x46,0x00,0xE4,0x34,
+0xA4,0x36,0x83,0x92,
+0x47,0x00,0xE4,0x34,
+0xB0,0x03,0xC5,0x34,
+0x00,0x00,0x83,0xA0,
+0x00,0x00,0xA3,0xAC,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x30,0x1F,0xC5,0x27,
+0xD0,0x1B,0xA2,0x8C,
+0x3C,0x00,0xBF,0x8F,
+0x38,0x00,0xBE,0x8F,
+0x34,0x00,0xB7,0x8F,
+0x30,0x00,0xB6,0x8F,
+0x2C,0x00,0xB5,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x60,0x00,0x03,0x3C,
+0x25,0x10,0x43,0x00,
+0x41,0xB0,0x04,0x3C,
+0x40,0x00,0xBD,0x27,
+0x00,0x00,0x82,0xAC,
+0x08,0x00,0xE0,0x03,
+0xD0,0x1B,0xA2,0xAC,
+0xA0,0x36,0x83,0x92,
+0xB0,0x03,0xC5,0x34,
+0x00,0x00,0x83,0xA0,
+0x00,0x00,0xA3,0xAC,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x30,0x1F,0xC5,0x27,
+0xD0,0x1B,0xA2,0x8C,
+0x3C,0x00,0xBF,0x8F,
+0x38,0x00,0xBE,0x8F,
+0x34,0x00,0xB7,0x8F,
+0x30,0x00,0xB6,0x8F,
+0x2C,0x00,0xB5,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x60,0x00,0x03,0x3C,
+0x25,0x10,0x43,0x00,
+0x41,0xB0,0x04,0x3C,
+0x40,0x00,0xBD,0x27,
+0x00,0x00,0x82,0xAC,
+0x08,0x00,0xE0,0x03,
+0xD0,0x1B,0xA2,0xAC,
+0x00,0x80,0x03,0x3C,
+0x25,0xB0,0x02,0x3C,
+0xB4,0x1B,0x63,0x24,
+0x18,0x03,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x02,0x80,0x05,0x3C,
+0x30,0x1F,0xA5,0x24,
+0xD8,0x1B,0xA2,0x8C,
+0xD0,0x1B,0xA4,0x8C,
+0x00,0x08,0x03,0x3C,
+0x24,0x10,0x43,0x00,
+0x25,0x20,0x82,0x00,
+0x41,0xB0,0x03,0x3C,
+0x00,0x00,0x64,0xAC,
+0x08,0x00,0xE0,0x03,
+0xD0,0x1B,0xA4,0xAC,
+0x25,0xB0,0x04,0x3C,
+0x00,0x80,0x02,0x3C,
+0xC8,0xFF,0xBD,0x27,
+0x18,0x03,0x83,0x34,
+0x10,0x1C,0x42,0x24,
+0x30,0x00,0xBF,0xAF,
+0x2C,0x00,0xB5,0xAF,
+0x28,0x00,0xB4,0xAF,
+0x24,0x00,0xB3,0xAF,
+0x20,0x00,0xB2,0xAF,
+0x1C,0x00,0xB1,0xAF,
+0x18,0x00,0xB0,0xAF,
+0x00,0x00,0x62,0xAC,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x02,0x80,0x14,0x3C,
+0x30,0x1F,0x93,0x26,
+0xFC,0x00,0x82,0x34,
+0x00,0x00,0x45,0x8C,
+0xAC,0x1B,0x66,0x96,
+0xD8,0x37,0x63,0x96,
+0xD0,0x37,0x67,0x8E,
+0x23,0x28,0xA6,0x00,
+0x21,0x10,0xA3,0x00,
+0x23,0x88,0x47,0x00,
+0xB0,0x03,0x84,0x34,
+0x23,0x30,0x23,0x02,
+0x2B,0x10,0x71,0x00,
+0x00,0x00,0x83,0xAC,
+0x00,0x00,0x91,0xAC,
+0x0B,0x88,0xC2,0x00,
+0x21,0x20,0x20,0x02,
+0x25,0x24,0x00,0x0C,
+0xD4,0x37,0x65,0xAE,
+0x4B,0x00,0x40,0x10,
+0x21,0x90,0x40,0x00,
+0x0C,0x00,0x51,0xAC,
+0xD0,0x37,0x68,0x8E,
+0xD4,0x37,0x62,0x8E,
+0x08,0x00,0x45,0x8E,
+0x20,0xBD,0x03,0x3C,
+0x88,0x03,0x63,0x34,
+0x2B,0x10,0x48,0x00,
+0x40,0x10,0x15,0x3C,
+0x21,0x20,0x00,0x00,
+0xFF,0xFF,0x27,0x32,
+0x00,0x00,0x65,0xAC,
+0x28,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0xAC,0x1B,0x66,0x96,
+0x08,0x00,0x42,0x96,
+0x40,0x10,0x05,0x3C,
+0x21,0x20,0x00,0x00,
+0x21,0x30,0x06,0x01,
+0x25,0x28,0x45,0x00,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA0,0xAF,
+0x02,0x80,0x02,0x3C,
+0x64,0x57,0x42,0x24,
+0x30,0x1F,0x84,0x26,
+0xD4,0x37,0x83,0x8C,
+0x04,0x00,0x45,0x8C,
+0xD0,0x37,0x83,0xAC,
+0x00,0x00,0x42,0xAE,
+0x04,0x00,0x52,0xAC,
+0x00,0x00,0xB2,0xAC,
+0x04,0x00,0x45,0xAE,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x30,0x1F,0x85,0x26,
+0xD8,0x1B,0xA2,0x8C,
+0xD0,0x1B,0xA3,0x8C,
+0x30,0x00,0xBF,0x8F,
+0x2C,0x00,0xB5,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x04,0x00,0x42,0x30,
+0x25,0x18,0x62,0x00,
+0x41,0xB0,0x04,0x3C,
+0x38,0x00,0xBD,0x27,
+0x00,0x00,0x83,0xAC,
+0x08,0x00,0xE0,0x03,
+0xD0,0x1B,0xA3,0xAC,
+0xD8,0x37,0x70,0x8E,
+0x08,0x00,0x45,0x96,
+0xAC,0x1B,0x66,0x96,
+0x23,0x80,0x08,0x02,
+0xFF,0xFF,0x10,0x32,
+0x21,0x30,0x06,0x01,
+0x25,0x28,0xB5,0x00,
+0x21,0x38,0x00,0x02,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA0,0xAF,
+0xB0,0x01,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0x08,0x00,0x45,0x96,
+0xAC,0x1B,0x62,0x96,
+0x23,0x38,0x30,0x02,
+0x25,0x28,0xB5,0x00,
+0x21,0x10,0x06,0x3C,
+0x21,0x28,0xB0,0x00,
+0x21,0x30,0x46,0x00,
+0xFF,0xFF,0xE7,0x30,
+0x3C,0x07,0x00,0x08,
+0x21,0x20,0x00,0x00,
+0x00,0x60,0x02,0x40,
+0x01,0x00,0x41,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x02,0x80,0x04,0x3C,
+0xD0,0x5E,0x83,0x8C,
+0x00,0x00,0x00,0x00,
+0x00,0x10,0x63,0x34,
+0xD0,0x5E,0x83,0xAC,
+0x00,0x60,0x82,0x40,
+0x48,0x07,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x04,0x3C,
+0x00,0x80,0x02,0x3C,
+0xC0,0xFF,0xBD,0x27,
+0x18,0x03,0x83,0x34,
+0xFC,0x1D,0x42,0x24,
+0x3C,0x00,0xBF,0xAF,
+0x38,0x00,0xBE,0xAF,
+0x34,0x00,0xB7,0xAF,
+0x30,0x00,0xB6,0xAF,
+0x2C,0x00,0xB5,0xAF,
+0x28,0x00,0xB4,0xAF,
+0x24,0x00,0xB3,0xAF,
+0x20,0x00,0xB2,0xAF,
+0x1C,0x00,0xB1,0xAF,
+0x18,0x00,0xB0,0xAF,
+0x00,0x00,0x62,0xAC,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x02,0x80,0x1E,0x3C,
+0x02,0x80,0x02,0x3C,
+0x2A,0xB0,0x03,0x3C,
+0xB0,0x03,0x96,0x34,
+0x80,0xD5,0x57,0x24,
+0x2C,0x00,0x73,0x34,
+0x30,0x1F,0xD1,0x27,
+0x02,0x80,0x15,0x3C,
+0xD1,0x07,0x00,0x08,
+0x02,0x80,0x14,0x3C,
+0x54,0xF3,0x90,0xAE,
+0x02,0x80,0x04,0x3C,
+0x03,0x00,0xC3,0x90,
+0x7C,0xD5,0x82,0x90,
+0x7F,0x00,0x63,0x30,
+0xFF,0x00,0x42,0x30,
+0x6B,0x00,0x62,0x10,
+0x08,0x00,0x10,0x26,
+0x02,0x00,0xC2,0x90,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x42,0x30,
+0x37,0x00,0x42,0x28,
+0x5E,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x02,0x00,0xC5,0x90,
+0x03,0x00,0xC3,0x90,
+0xFF,0x00,0xA5,0x30,
+0x7F,0x00,0x63,0x30,
+0x7C,0xD5,0x83,0xA0,
+0x02,0x00,0xC2,0x90,
+0x0E,0x00,0xA5,0x38,
+0x0A,0x80,0xE5,0x00,
+0xFF,0x00,0x42,0x30,
+0xC0,0x10,0x02,0x00,
+0x21,0x10,0x57,0x00,
+0x04,0x00,0x43,0x8C,
+0x02,0x80,0x04,0x3C,
+0x8C,0xD7,0x84,0x24,
+0x4C,0xF3,0xA3,0xAE,
+0x02,0x00,0xC5,0x90,
+0x2F,0x55,0x00,0x0C,
+0xFF,0x00,0xA5,0x30,
+0x4C,0xF3,0xA2,0x8E,
+0x00,0x00,0x00,0x00,
+0x09,0xF8,0x40,0x00,
+0x21,0x20,0x00,0x02,
+0x01,0x00,0x02,0x24,
+0x02,0x00,0x03,0x24,
+0x01,0x00,0x62,0xA2,
+0x01,0x00,0x63,0xA2,
+0x2B,0x00,0x40,0x12,
+0x00,0x00,0x00,0x00,
+0xB8,0x36,0x22,0x92,
+0x20,0x10,0x03,0x3C,
+0x88,0x37,0x25,0x8E,
+0x00,0x12,0x02,0x00,
+0x21,0x10,0x43,0x00,
+0x21,0x30,0x40,0x00,
+0x0A,0x00,0x04,0x24,
+0x00,0x01,0x07,0x24,
+0x1C,0x37,0x22,0xAE,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA0,0xAF,
+0x88,0x37,0x30,0x8E,
+0xB0,0x01,0x00,0x0C,
+0x0A,0x00,0x04,0x24,
+0xFF,0xFF,0x10,0x32,
+0x02,0x80,0x02,0x3C,
+0x25,0x80,0x02,0x02,
+0x0C,0x00,0x04,0x92,
+0xFF,0x00,0x02,0x24,
+0x21,0x38,0x00,0x02,
+0xFF,0x00,0x83,0x30,
+0x20,0x00,0x10,0x26,
+0x04,0x00,0x62,0x10,
+0x21,0x90,0x00,0x00,
+0xB8,0x36,0x24,0xA2,
+0x01,0x00,0x12,0x24,
+0x00,0x00,0xC3,0xAE,
+0x04,0x00,0xE2,0x8C,
+0x13,0x00,0x03,0x24,
+0x02,0x12,0x02,0x00,
+0x1F,0x00,0x45,0x30,
+0xB6,0xFF,0xA3,0x10,
+0x21,0x30,0x00,0x02,
+0x02,0x80,0x04,0x3C,
+0x2F,0x55,0x00,0x0C,
+0x38,0xD7,0x84,0x24,
+0x01,0x00,0x02,0x24,
+0x02,0x00,0x03,0x24,
+0x01,0x00,0x62,0xA2,
+0x01,0x00,0x63,0xA2,
+0xD7,0xFF,0x40,0x16,
+0x00,0x00,0x00,0x00,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x30,0x1F,0xC5,0x27,
+0xD0,0x1B,0xA2,0x8C,
+0x3C,0x00,0xBF,0x8F,
+0x38,0x00,0xBE,0x8F,
+0x34,0x00,0xB7,0x8F,
+0x30,0x00,0xB6,0x8F,
+0x2C,0x00,0xB5,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x00,0x04,0x03,0x3C,
+0x25,0x10,0x43,0x00,
+0x41,0xB0,0x04,0x3C,
+0x40,0x00,0xBD,0x27,
+0x00,0x00,0x82,0xAC,
+0x08,0x00,0xE0,0x03,
+0xD0,0x1B,0xA2,0xAC,
+0x02,0x00,0xC5,0x90,
+0x02,0x80,0x04,0x3C,
+0x78,0xD7,0x84,0x24,
+0x2F,0x55,0x00,0x0C,
+0xFF,0x00,0xA5,0x30,
+0xEB,0x07,0x00,0x08,
+0x01,0x00,0x02,0x24,
+0x02,0x00,0xC5,0x90,
+0x02,0x00,0xC6,0x90,
+0x7C,0xD5,0x87,0x90,
+0x02,0x80,0x04,0x3C,
+0x48,0xD7,0x84,0x24,
+0xFF,0x00,0xA5,0x30,
+0xFF,0x00,0xC6,0x30,
+0x2F,0x55,0x00,0x0C,
+0xFF,0x00,0xE7,0x30,
+0xC1,0x07,0x00,0x08,
+0x01,0x00,0x02,0x24,
+0xC8,0xFF,0xBD,0x27,
+0xFF,0xFF,0xA8,0x30,
+0x02,0x80,0x02,0x3C,
+0x25,0x40,0x02,0x01,
+0x30,0x00,0xB6,0xAF,
+0x20,0x00,0xB2,0xAF,
+0x34,0x00,0xBF,0xAF,
+0x2C,0x00,0xB5,0xAF,
+0x28,0x00,0xB4,0xAF,
+0x24,0x00,0xB3,0xAF,
+0x1C,0x00,0xB1,0xAF,
+0x18,0x00,0xB0,0xAF,
+0x00,0x00,0x03,0x8D,
+0xFF,0xFF,0xD2,0x30,
+0x21,0xB0,0xA0,0x00,
+0x00,0xC0,0x02,0x24,
+0x08,0x00,0x45,0x26,
+0x04,0x00,0x06,0x8D,
+0x24,0x18,0x62,0x00,
+0xFF,0x3F,0xA5,0x30,
+0xF0,0xFF,0x02,0x3C,
+0x25,0x18,0x65,0x00,
+0xFF,0xFF,0x42,0x34,
+0x24,0x18,0x62,0x00,
+0x00,0x80,0x05,0x3C,
+0x25,0x18,0x65,0x00,
+0xFF,0x01,0xC6,0x34,
+0x00,0x00,0x03,0xAD,
+0x04,0x00,0x06,0xAD,
+0x21,0x48,0x80,0x00,
+0xFF,0xFF,0xE7,0x30,
+0x18,0x00,0x12,0xA5,
+0x1A,0x00,0x07,0xA1,
+0x18,0x00,0x03,0x8D,
+0xFF,0x7F,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x24,0x18,0x62,0x00,
+0x02,0x80,0x15,0x3C,
+0x18,0x00,0x03,0xAD,
+0x30,0x1F,0xA5,0x26,
+0x7A,0x36,0xA3,0x90,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x62,0x24,
+0x7A,0x36,0xA2,0xA0,
+0x18,0x00,0x04,0x8D,
+0xFF,0x80,0x02,0x3C,
+0x20,0x00,0x45,0x26,
+0xFF,0xFF,0x42,0x34,
+0x7F,0x00,0x63,0x30,
+0xFF,0xFF,0xB2,0x30,
+0x24,0x20,0x82,0x00,
+0x00,0x1E,0x03,0x00,
+0x25,0xB0,0x02,0x3C,
+0xC0,0x00,0x42,0x34,
+0x25,0x20,0x83,0x00,
+0x07,0x00,0x45,0x32,
+0x18,0x00,0x04,0xAD,
+0x00,0x00,0x52,0xA4,
+0x03,0x00,0xA0,0x10,
+0xFF,0xFF,0x42,0x32,
+0x08,0x00,0x42,0x26,
+0xFF,0xFF,0x42,0x30,
+0x30,0x1F,0xB4,0x26,
+0xF8,0x37,0x86,0x8E,
+0xFC,0x37,0x90,0x8E,
+0xF8,0xFF,0x52,0x30,
+0x21,0x10,0xD2,0x00,
+0x2B,0x10,0x02,0x02,
+0x31,0x00,0x40,0x10,
+0xFF,0x00,0x33,0x31,
+0x23,0x80,0x06,0x02,
+0x21,0x28,0xC0,0x02,
+0xFF,0xFF,0x07,0x32,
+0x01,0x00,0x11,0x24,
+0x21,0x20,0x60,0x02,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xB1,0xAF,
+0x23,0x18,0x50,0x02,
+0xFF,0xFF,0x72,0x30,
+0x22,0x10,0x02,0x3C,
+0x21,0x10,0x42,0x02,
+0x21,0x20,0x60,0x02,
+0xB0,0x01,0x00,0x0C,
+0xF8,0x37,0x82,0xAE,
+0x21,0x28,0xD0,0x02,
+0x21,0x38,0x40,0x02,
+0x21,0x20,0x60,0x02,
+0x10,0x00,0xB1,0xAF,
+0x22,0x10,0x06,0x3C,
+0x73,0x01,0x00,0x0C,
+0x30,0x1F,0xB1,0x26,
+0xF8,0x37,0x23,0x8E,
+0x25,0xB0,0x10,0x3C,
+0xB0,0x03,0x02,0x36,
+0x21,0x20,0x60,0x02,
+0x00,0x00,0x43,0xAC,
+0xB0,0x01,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xF8,0x37,0x25,0x8E,
+0xEC,0x00,0x02,0x36,
+0xBD,0x00,0x04,0x36,
+0x00,0x00,0x45,0xAC,
+0x00,0x00,0x83,0x90,
+0xC2,0x00,0x10,0x36,
+0x34,0x00,0xBF,0x8F,
+0x10,0x00,0x63,0x34,
+0x00,0x00,0x83,0xA0,
+0x30,0x00,0xB6,0x8F,
+0x00,0x00,0x05,0xA6,
+0x2C,0x00,0xB5,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x01,0x00,0x02,0x24,
+0x08,0x00,0xE0,0x03,
+0x38,0x00,0xBD,0x27,
+0x21,0x28,0xC0,0x02,
+0x21,0x20,0x60,0x02,
+0x21,0x38,0x40,0x02,
+0x01,0x00,0x02,0x24,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA2,0xAF,
+0xF8,0x37,0x83,0x8E,
+0x30,0x1F,0xB1,0x26,
+0x25,0xB0,0x10,0x3C,
+0x21,0x18,0x72,0x00,
+0xF8,0x37,0x83,0xAE,
+0xF8,0x37,0x23,0x8E,
+0xB0,0x03,0x02,0x36,
+0x21,0x20,0x60,0x02,
+0x00,0x00,0x43,0xAC,
+0xB0,0x01,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xF8,0x37,0x25,0x8E,
+0xEC,0x00,0x02,0x36,
+0xBD,0x00,0x04,0x36,
+0x00,0x00,0x45,0xAC,
+0x00,0x00,0x83,0x90,
+0xC2,0x00,0x10,0x36,
+0x34,0x00,0xBF,0x8F,
+0x10,0x00,0x63,0x34,
+0x00,0x00,0x83,0xA0,
+0x30,0x00,0xB6,0x8F,
+0x00,0x00,0x05,0xA6,
+0x2C,0x00,0xB5,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x01,0x00,0x02,0x24,
+0x08,0x00,0xE0,0x03,
+0x38,0x00,0xBD,0x27,
+0xC8,0xFF,0xBD,0x27,
+0x18,0x00,0xB0,0xAF,
+0x34,0x00,0xBF,0xAF,
+0x30,0x00,0xB6,0xAF,
+0x2C,0x00,0xB5,0xAF,
+0x28,0x00,0xB4,0xAF,
+0x24,0x00,0xB3,0xAF,
+0x20,0x00,0xB2,0xAF,
+0x1C,0x00,0xB1,0xAF,
+0x21,0x80,0x80,0x00,
+0x00,0x60,0x14,0x40,
+0x01,0x00,0x81,0x36,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x14,0x00,0x83,0x8C,
+0x02,0x80,0x15,0x3C,
+0x16,0x00,0x02,0x24,
+0x30,0x1F,0xB3,0x26,
+0x21,0x28,0x00,0x00,
+0x1D,0x00,0x62,0x10,
+0x08,0x00,0x06,0x24,
+0x08,0x00,0x82,0x94,
+0x02,0x80,0x04,0x3C,
+0x08,0x52,0x00,0x0C,
+0x25,0x20,0x44,0x00,
+0x08,0x00,0x05,0x8E,
+0x0C,0x00,0x06,0x96,
+0x14,0x00,0x07,0x96,
+0x19,0x08,0x00,0x0C,
+0x09,0x00,0x04,0x24,
+0x04,0x00,0x02,0x8E,
+0x00,0x00,0x03,0x8E,
+0x21,0x20,0x00,0x02,
+0x00,0x00,0x43,0xAC,
+0x04,0x00,0x62,0xAC,
+0x00,0x00,0x10,0xAE,
+0x3D,0x24,0x00,0x0C,
+0x04,0x00,0x10,0xAE,
+0x00,0x60,0x94,0x40,
+0x34,0x00,0xBF,0x8F,
+0x30,0x00,0xB6,0x8F,
+0x2C,0x00,0xB5,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x38,0x00,0xBD,0x27,
+0xF8,0x37,0x68,0x8E,
+0x0C,0x00,0x11,0x8E,
+0xFC,0x37,0x62,0x8E,
+0x25,0xB0,0x03,0x3C,
+0x21,0x28,0x11,0x01,
+0xC0,0x00,0x63,0x34,
+0x23,0x90,0x48,0x00,
+0x2B,0x10,0x45,0x00,
+0x01,0x00,0x16,0x24,
+0x09,0x00,0x04,0x24,
+0xFF,0xFF,0x27,0x32,
+0x21,0x30,0x00,0x01,
+0x00,0x00,0x71,0xA4,
+0x33,0x00,0x40,0x10,
+0x01,0x00,0x02,0x24,
+0x08,0x00,0x05,0x8E,
+0xFF,0xFF,0x47,0x32,
+0x23,0x88,0x32,0x02,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xB6,0xAF,
+0x22,0x10,0x03,0x3C,
+0x21,0x18,0x23,0x02,
+0x09,0x00,0x04,0x24,
+0xB0,0x01,0x00,0x0C,
+0xF8,0x37,0x63,0xAE,
+0x08,0x00,0x05,0x8E,
+0xFF,0xFF,0x27,0x32,
+0x09,0x00,0x04,0x24,
+0x21,0x28,0xB2,0x00,
+0x22,0x10,0x06,0x3C,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xB6,0xAF,
+0xB0,0x01,0x00,0x0C,
+0x09,0x00,0x04,0x24,
+0x30,0x1F,0xA2,0x26,
+0xF8,0x37,0x46,0x8C,
+0x25,0xB0,0x03,0x3C,
+0xEC,0x00,0x64,0x34,
+0x00,0x00,0x86,0xAC,
+0xBD,0x00,0x65,0x34,
+0x00,0x00,0xA2,0x90,
+0xC2,0x00,0x63,0x34,
+0x21,0x20,0x00,0x02,
+0x10,0x00,0x42,0x34,
+0x00,0x00,0xA2,0xA0,
+0x00,0x00,0x66,0xA4,
+0x04,0x00,0x02,0x8E,
+0x00,0x00,0x03,0x8E,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x43,0xAC,
+0x04,0x00,0x62,0xAC,
+0x00,0x00,0x10,0xAE,
+0x3D,0x24,0x00,0x0C,
+0x04,0x00,0x10,0xAE,
+0x00,0x60,0x94,0x40,
+0x34,0x00,0xBF,0x8F,
+0x30,0x00,0xB6,0x8F,
+0x2C,0x00,0xB5,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x38,0x00,0xBD,0x27,
+0x08,0x00,0x05,0x8E,
+0x21,0x30,0x00,0x01,
+0x09,0x00,0x04,0x24,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA2,0xAF,
+0xF8,0x37,0x63,0x8E,
+0x00,0x00,0x00,0x00,
+0x21,0x18,0x71,0x00,
+0x05,0x09,0x00,0x08,
+0xF8,0x37,0x63,0xAE,
+0xE8,0xFF,0xBD,0x27,
+0x14,0x00,0xBF,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x21,0x28,0x80,0x00,
+0x00,0x60,0x10,0x40,
+0x01,0x00,0x01,0x36,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x25,0xB0,0x02,0x3C,
+0xBF,0x00,0x42,0x34,
+0x00,0x00,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0x04,0x00,0x63,0x2C,
+0x05,0x00,0x60,0x10,
+0x02,0x80,0x06,0x3C,
+0x6C,0x57,0xC3,0x8C,
+0x6C,0x57,0xC2,0x24,
+0x0C,0x00,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0x6C,0x57,0xC2,0x24,
+0x04,0x00,0x43,0x8C,
+0x00,0x00,0xA2,0xAC,
+0x04,0x00,0x45,0xAC,
+0x00,0x00,0x65,0xAC,
+0x04,0x00,0xA3,0xAC,
+0x00,0x60,0x90,0x40,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0xB4,0x08,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x00,0x60,0x90,0x40,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0xE0,0xFF,0xBD,0x27,
+0x10,0x00,0xB0,0xAF,
+0x21,0x80,0x80,0x00,
+0x02,0x80,0x04,0x3C,
+0x98,0xD7,0x84,0x24,
+0x1C,0x00,0xBF,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x2F,0x55,0x00,0x0C,
+0x14,0x00,0xB1,0xAF,
+0x00,0x00,0x04,0x96,
+0x00,0x00,0x00,0x00,
+0x20,0x00,0x83,0x24,
+0x07,0x00,0x62,0x30,
+0x49,0x00,0x40,0x10,
+0xC2,0x10,0x03,0x00,
+0x28,0x00,0x82,0x24,
+0xC2,0x10,0x02,0x00,
+0x25,0x24,0x00,0x0C,
+0xC0,0x20,0x02,0x00,
+0x47,0x00,0x40,0x10,
+0x21,0x88,0x40,0x00,
+0x02,0x80,0x12,0x3C,
+0x30,0x1F,0x50,0x26,
+0x1C,0x37,0x05,0x8E,
+0x0A,0x00,0x04,0x24,
+0x28,0x00,0x06,0x24,
+0xC7,0x01,0x00,0x0C,
+0x21,0x38,0x40,0x00,
+0xB0,0x1B,0x03,0x96,
+0x00,0x00,0x00,0x00,
+0x00,0x01,0x62,0x30,
+0x47,0x00,0x40,0x14,
+0x01,0x00,0x62,0x30,
+0x02,0x80,0x02,0x3C,
+0xEA,0x5D,0x48,0x90,
+0x25,0xB0,0x04,0x3C,
+0x2F,0x00,0x02,0x3C,
+0xD0,0x01,0x85,0x34,
+0x17,0x32,0x42,0x34,
+0x00,0x00,0xA2,0xAC,
+0x5E,0x00,0x03,0x3C,
+0x10,0x00,0x02,0x3C,
+0xDC,0x01,0x87,0x34,
+0xD4,0x01,0x86,0x34,
+0x17,0x43,0x63,0x34,
+0x20,0x53,0x42,0x34,
+0xD8,0x01,0x84,0x34,
+0x00,0x00,0xC3,0xAC,
+0x30,0x1F,0x49,0x26,
+0x00,0x00,0x82,0xAC,
+0x44,0xA4,0x03,0x34,
+0x01,0x00,0x02,0x24,
+0x00,0x00,0xE3,0xAC,
+0xEC,0x38,0x20,0xAD,
+0x08,0x39,0x20,0xAD,
+0x50,0x3E,0x20,0xAD,
+0x10,0x3E,0x20,0xAD,
+0x51,0x00,0x02,0x11,
+0x1A,0x3E,0x20,0xA1,
+0x10,0x23,0x22,0x8D,
+0xFF,0xF7,0x03,0x24,
+0xFF,0xEF,0x04,0x24,
+0x24,0x10,0x43,0x00,
+0x24,0x10,0x44,0x00,
+0x10,0x23,0x22,0xAD,
+0xB0,0x01,0x00,0x0C,
+0x0A,0x00,0x04,0x24,
+0x08,0x00,0x22,0x96,
+0x02,0x80,0x05,0x3C,
+0x02,0x80,0x04,0x3C,
+0x25,0x28,0x45,0x00,
+0xDC,0x01,0x06,0x24,
+0x10,0x52,0x00,0x0C,
+0x84,0x58,0x84,0x24,
+0x3D,0x24,0x00,0x0C,
+0x21,0x20,0x20,0x02,
+0x30,0x1F,0x43,0x26,
+0x9C,0x39,0x62,0x8C,
+0xD1,0x11,0x00,0x0C,
+0x30,0x3B,0x62,0xA0,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x25,0x24,0x00,0x0C,
+0xC0,0x20,0x02,0x00,
+0xBB,0xFF,0x40,0x14,
+0x21,0x88,0x40,0x00,
+0x02,0x80,0x04,0x3C,
+0x02,0x80,0x05,0x3C,
+0xA8,0xD7,0x84,0x24,
+0x2F,0x55,0x00,0x0C,
+0x1C,0xEA,0xA5,0x24,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x32,0x00,0x40,0x14,
+0x02,0x80,0x04,0x3C,
+0xA3,0x51,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xB0,0x1B,0x02,0x96,
+0x25,0xB0,0x03,0x3C,
+0x4C,0x00,0x63,0x34,
+0xFF,0xFE,0x42,0x30,
+0xB0,0x1B,0x02,0xA6,
+0x00,0x00,0x60,0xA0,
+0x02,0x80,0x02,0x3C,
+0xEA,0x5D,0x48,0x90,
+0x25,0xB0,0x04,0x3C,
+0x2F,0x00,0x02,0x3C,
+0xD0,0x01,0x85,0x34,
+0x17,0x32,0x42,0x34,
+0x00,0x00,0xA2,0xAC,
+0x5E,0x00,0x03,0x3C,
+0x10,0x00,0x02,0x3C,
+0xDC,0x01,0x87,0x34,
+0xD4,0x01,0x86,0x34,
+0x17,0x43,0x63,0x34,
+0x20,0x53,0x42,0x34,
+0xD8,0x01,0x84,0x34,
+0x00,0x00,0xC3,0xAC,
+0x30,0x1F,0x49,0x26,
+0x00,0x00,0x82,0xAC,
+0x44,0xA4,0x03,0x34,
+0x01,0x00,0x02,0x24,
+0x00,0x00,0xE3,0xAC,
+0xEC,0x38,0x20,0xAD,
+0x08,0x39,0x20,0xAD,
+0x50,0x3E,0x20,0xAD,
+0x10,0x3E,0x20,0xAD,
+0xB1,0xFF,0x02,0x15,
+0x1A,0x3E,0x20,0xA1,
+0x02,0x80,0x02,0x3C,
+0xEB,0x5D,0x44,0x90,
+0x02,0x00,0x03,0x24,
+0x06,0x00,0x83,0x10,
+0xFF,0xF7,0x03,0x24,
+0x10,0x23,0x22,0x8D,
+0x00,0x00,0x00,0x00,
+0x24,0x10,0x43,0x00,
+0x95,0x09,0x00,0x08,
+0x00,0x10,0x42,0x34,
+0x10,0x23,0x22,0x8D,
+0xFF,0xEF,0x03,0x24,
+0x00,0x08,0x42,0x34,
+0x95,0x09,0x00,0x08,
+0x24,0x10,0x43,0x00,
+0x88,0x58,0x84,0x24,
+0x6C,0x4C,0x00,0x0C,
+0x03,0x00,0x05,0x24,
+0xBE,0x09,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0xD8,0xFF,0xBD,0x27,
+0x18,0x00,0xB2,0xAF,
+0x02,0x80,0x12,0x3C,
+0x1C,0x00,0xB3,0xAF,
+0x24,0x00,0xBF,0xAF,
+0x20,0x00,0xB4,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x30,0x1F,0x43,0x26,
+0xB0,0x1B,0x62,0x94,
+0x00,0x00,0x00,0x00,
+0x00,0x10,0x42,0x30,
+0x76,0x00,0x40,0x14,
+0x21,0x98,0x80,0x00,
+0x00,0x60,0x10,0x40,
+0x01,0x00,0x01,0x36,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x02,0x80,0x14,0x3C,
+0xF6,0x5E,0x82,0x92,
+0x00,0x00,0x00,0x00,
+0x0F,0x00,0x42,0x30,
+0x04,0x00,0x42,0x28,
+0x74,0x00,0x40,0x14,
+0x04,0x00,0x04,0x24,
+0x00,0x60,0x90,0x40,
+0x30,0x1F,0x42,0x8E,
+0xFF,0xF0,0x03,0x24,
+0x0F,0xFF,0x04,0x24,
+0x24,0x10,0x43,0x00,
+0x24,0x10,0x44,0x00,
+0x25,0xB0,0x05,0x3C,
+0xF0,0xFF,0x03,0x24,
+0x24,0x10,0x43,0x00,
+0x64,0x03,0xA4,0x34,
+0x17,0x00,0x03,0x24,
+0x00,0x00,0x80,0xA0,
+0x50,0x0C,0xA3,0xA0,
+0x30,0x1F,0x42,0xAE,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x25,0xB0,0x02,0x3C,
+0x17,0x00,0x03,0x24,
+0x58,0x0C,0x43,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x30,0x1F,0x51,0x26,
+0xB0,0x1B,0x22,0x96,
+0x02,0x80,0x04,0x3C,
+0xB4,0xD7,0x84,0x24,
+0x00,0x10,0x42,0x34,
+0x2F,0x55,0x00,0x0C,
+0xB0,0x1B,0x22,0xA6,
+0x01,0x00,0x02,0x24,
+0x25,0xB0,0x03,0x3C,
+0x6C,0x3B,0x22,0xAE,
+0x4C,0x00,0x63,0x34,
+0x08,0x00,0x66,0x8E,
+0x00,0x00,0x67,0x90,
+0xB0,0x1B,0x22,0x96,
+0x30,0x3B,0x28,0x92,
+0x31,0x3B,0x29,0x92,
+0x8F,0x3E,0x2A,0x92,
+0x38,0x3B,0x2B,0x92,
+0x67,0x3B,0x2C,0x92,
+0x74,0x3B,0x26,0xAE,
+0x00,0x80,0x42,0x30,
+0xA1,0x3B,0x27,0xA2,
+0x21,0x20,0x00,0x00,
+0x00,0x00,0x60,0xA0,
+0x21,0x28,0x00,0x00,
+0x99,0x3B,0x28,0xA2,
+0x9A,0x3B,0x29,0xA2,
+0x9E,0x3B,0x22,0xA6,
+0xA0,0x3B,0x2A,0xA2,
+0x30,0x3B,0x2B,0xA2,
+0x31,0x3B,0x2C,0xA2,
+0xA4,0x3B,0x20,0xAE,
+0xA8,0x3B,0x20,0xAE,
+0x9C,0x3B,0x20,0xA2,
+0x12,0x0D,0x00,0x0C,
+0x9B,0x3B,0x20,0xA2,
+0x08,0x00,0x66,0x8E,
+0x00,0x00,0x00,0x00,
+0x33,0x00,0xC0,0x14,
+0x0C,0x00,0x70,0x26,
+0x00,0x00,0x62,0x8E,
+0x21,0x20,0x20,0x02,
+0xAC,0x3B,0x23,0x26,
+0x70,0x3B,0x22,0xAE,
+0x3F,0x00,0x02,0x24,
+0xFF,0xFF,0x42,0x24,
+0x00,0x00,0x60,0xA0,
+0xFD,0xFF,0x41,0x04,
+0x07,0x00,0x63,0x24,
+0xB0,0x1B,0x83,0x94,
+0x00,0x00,0x00,0x00,
+0x00,0x01,0x62,0x30,
+0x09,0x00,0x40,0x10,
+0x30,0x1F,0x50,0x26,
+0x01,0x00,0x62,0x30,
+0x06,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0xF6,0x5E,0x82,0x92,
+0x0C,0x00,0x03,0x24,
+0x0F,0x00,0x42,0x30,
+0x2C,0x00,0x43,0x10,
+0x00,0x00,0x00,0x00,
+0x30,0x3B,0x04,0x92,
+0x4F,0x0C,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x04,0x3C,
+0x48,0x00,0x84,0x34,
+0x00,0x00,0x83,0x8C,
+0x70,0x3B,0x05,0x8E,
+0x7B,0xFF,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x24,0x18,0x62,0x00,
+0x01,0x00,0x02,0x24,
+0x00,0x00,0x83,0xAC,
+0x19,0x00,0xA2,0x10,
+0x3C,0x00,0x02,0x24,
+0x98,0x38,0x02,0xAE,
+0x24,0x00,0xBF,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0x64,0x31,0x00,0x0C,
+0x01,0x00,0x05,0x24,
+0x0F,0x0A,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x04,0x3C,
+0x21,0x28,0x00,0x02,
+0x10,0x52,0x00,0x0C,
+0xA8,0x5A,0x84,0x24,
+0x02,0x80,0x04,0x3C,
+0xC4,0xD7,0x84,0x24,
+0x2F,0x55,0x00,0x0C,
+0x21,0x28,0x00,0x02,
+0x54,0x0A,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x13,0x0F,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x3C,0x00,0x02,0x24,
+0x79,0x0A,0x00,0x08,
+0x98,0x38,0x02,0xAE,
+0xCD,0x4E,0x00,0x0C,
+0x01,0x00,0x04,0x24,
+0x6A,0x0A,0x00,0x08,
+0x30,0x1F,0x50,0x26,
+0xE8,0xFF,0xBD,0x27,
+0x10,0x00,0xB0,0xAF,
+0x14,0x00,0xBF,0xAF,
+0x21,0x80,0x80,0x00,
+0x00,0x00,0x02,0x92,
+0x02,0x80,0x04,0x3C,
+0x21,0x28,0x40,0x00,
+0x03,0x00,0x42,0x2C,
+0x06,0x00,0x40,0x14,
+0xD0,0xD7,0x84,0x24,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x2F,0x55,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x03,0x92,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x02,0x80,0x02,0x3C,
+0xA8,0x5C,0x43,0xAC,
+0x18,0x00,0xBD,0x27,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x00,0x80,0x03,0x3C,
+0x25,0xB0,0x02,0x3C,
+0xD0,0xFF,0xBD,0x27,
+0x18,0x03,0x42,0x34,
+0xC8,0x2A,0x63,0x24,
+0x24,0x00,0xB3,0xAF,
+0x28,0x00,0xBF,0xAF,
+0x20,0x00,0xB2,0xAF,
+0x1C,0x00,0xB1,0xAF,
+0x18,0x00,0xB0,0xAF,
+0x00,0x00,0x43,0xAC,
+0x02,0x80,0x04,0x3C,
+0xF4,0x5E,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x12,0x00,0x40,0x10,
+0x02,0x80,0x13,0x3C,
+0x02,0x80,0x02,0x3C,
+0x0D,0x5F,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0x66,0x00,0x60,0x14,
+0x01,0x00,0x04,0x24,
+0x02,0x80,0x02,0x3C,
+0x16,0x5F,0x44,0xA0,
+0x02,0x80,0x03,0x3C,
+0xF5,0x5E,0x64,0x90,
+0x01,0x00,0x05,0x24,
+0x64,0x31,0x00,0x0C,
+0xFF,0x00,0x84,0x30,
+0x02,0x80,0x02,0x3C,
+0x74,0x57,0x43,0x8C,
+0x74,0x57,0x42,0x24,
+0xA7,0x00,0x62,0x10,
+0x02,0x80,0x13,0x3C,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x2A,0xB0,0x02,0x3C,
+0x36,0x00,0x42,0x34,
+0x00,0x00,0x43,0x90,
+0x30,0x1F,0x66,0x26,
+0x00,0x38,0xC5,0x8C,
+0xC0,0x18,0x03,0x00,
+0x23,0xB0,0x04,0x3C,
+0xF0,0x07,0x63,0x30,
+0xFF,0x1F,0x02,0x3C,
+0x21,0x18,0x64,0x00,
+0xFF,0xFF,0x42,0x34,
+0x24,0x20,0x62,0x00,
+0x23,0x88,0x85,0x00,
+0x00,0x04,0x22,0x26,
+0x2B,0x28,0x85,0x00,
+0xA4,0x37,0xC3,0x8C,
+0x0B,0x88,0x45,0x00,
+0xE1,0x01,0x22,0x2E,
+0xA0,0x37,0xC3,0xAC,
+0x04,0x38,0xC4,0xAC,
+0xAA,0x37,0xC0,0xA4,
+0x14,0x00,0x40,0x14,
+0xA9,0x37,0xC0,0xA0,
+0x20,0xFE,0x82,0x24,
+0x20,0x02,0x83,0x24,
+0x0A,0x18,0x45,0x00,
+0x23,0x10,0x02,0x3C,
+0xFF,0x03,0x42,0x34,
+0x2B,0x10,0x43,0x00,
+0x21,0x28,0x60,0x00,
+0x34,0x00,0x40,0x14,
+0x00,0x38,0xC3,0xAC,
+0x04,0x38,0xC2,0x8C,
+0x00,0x00,0x00,0x00,
+0x2B,0x18,0x45,0x00,
+0x23,0x88,0x45,0x00,
+0x03,0x00,0x60,0x10,
+0xE1,0x01,0x22,0x2E,
+0x00,0x04,0x31,0x26,
+0xE1,0x01,0x22,0x2E,
+0x0E,0x00,0x40,0x10,
+0x30,0x1F,0x70,0x26,
+0x30,0x1F,0x70,0x26,
+0x04,0x38,0x03,0x8E,
+0x00,0x38,0x04,0x8E,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x83,0x00,
+0x2E,0x00,0x40,0x14,
+0x2B,0x10,0x64,0x00,
+0x5A,0x00,0x40,0x14,
+0x25,0xB0,0x02,0x3C,
+0x80,0x00,0x03,0x24,
+0xD0,0x03,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0x30,0x1F,0x70,0x26,
+0x00,0x38,0x03,0x96,
+0x2A,0xB0,0x02,0x3C,
+0x35,0x00,0x42,0x34,
+0xC2,0x88,0x03,0x00,
+0x00,0x00,0x51,0xA0,
+0x5D,0x27,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xAA,0x37,0x03,0x96,
+0x25,0xB0,0x02,0x3C,
+0xB0,0x03,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0xD0,0x1B,0x02,0x8E,
+0x80,0x00,0x03,0x3C,
+0x41,0xB0,0x04,0x3C,
+0x25,0x10,0x43,0x00,
+0x00,0x00,0x82,0xAC,
+0x28,0x00,0xBF,0x8F,
+0xD0,0x1B,0x02,0xAE,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x30,0x00,0xBD,0x27,
+0x00,0xFC,0xA5,0x24,
+0xF6,0x0A,0x00,0x08,
+0x00,0x38,0xC5,0xAC,
+0x17,0x30,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x9F,0xFF,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x0D,0x30,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xCF,0x0A,0x00,0x08,
+0x02,0x80,0x02,0x3C,
+0xA0,0x37,0x05,0x8E,
+0x21,0x30,0x80,0x00,
+0xFF,0xFF,0x27,0x32,
+0x09,0x00,0x04,0x24,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA0,0xAF,
+0xA0,0x37,0x03,0x8E,
+0xAA,0x37,0x05,0x96,
+0x00,0x38,0x02,0x8E,
+0x21,0x18,0x71,0x00,
+0x21,0x28,0x25,0x02,
+0x21,0x10,0x51,0x00,
+0x09,0x00,0x04,0x24,
+0x00,0x38,0x02,0xAE,
+0xA0,0x37,0x03,0xAE,
+0xB0,0x01,0x00,0x0C,
+0xAA,0x37,0x05,0xA6,
+0x30,0x1F,0x70,0x26,
+0x00,0x38,0x03,0x96,
+0x2A,0xB0,0x02,0x3C,
+0x35,0x00,0x42,0x34,
+0xC2,0x88,0x03,0x00,
+0x00,0x00,0x51,0xA0,
+0x5D,0x27,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xAA,0x37,0x03,0x96,
+0x25,0xB0,0x02,0x3C,
+0xB0,0x03,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0xD0,0x1B,0x02,0x8E,
+0x80,0x00,0x03,0x3C,
+0x41,0xB0,0x04,0x3C,
+0x25,0x10,0x43,0x00,
+0x00,0x00,0x82,0xAC,
+0x28,0x00,0xBF,0x8F,
+0xD0,0x1B,0x02,0xAE,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x30,0x00,0xBD,0x27,
+0x08,0x38,0x02,0x8E,
+0xA0,0x37,0x05,0x8E,
+0x21,0x30,0x80,0x00,
+0x23,0x88,0x44,0x00,
+0xFF,0xFF,0x27,0x32,
+0x09,0x00,0x04,0x24,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA0,0xAF,
+0xA0,0x37,0x03,0x8E,
+0xAA,0x37,0x02,0x96,
+0x04,0x38,0x12,0x96,
+0x21,0x18,0x71,0x00,
+0x21,0x10,0x22,0x02,
+0x23,0x10,0x11,0x3C,
+0xA0,0x37,0x03,0xAE,
+0xAA,0x37,0x02,0xA6,
+0x15,0x00,0x40,0x16,
+0x00,0x38,0x11,0xAE,
+0x09,0x00,0x04,0x24,
+0xB0,0x01,0x00,0x0C,
+0x30,0x1F,0x70,0x26,
+0x46,0x0B,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x17,0x30,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x57,0xFF,0x40,0x10,
+0x30,0x1F,0x63,0x26,
+0x2A,0x1C,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x53,0xFF,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x50,0x39,0x64,0x94,
+0x2A,0x1C,0x60,0xA0,
+0x00,0xC0,0x84,0x24,
+0xC2,0x34,0x00,0x0C,
+0xFF,0xFF,0x84,0x30,
+0xD3,0x0A,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0xB0,0x01,0x00,0x0C,
+0x09,0x00,0x04,0x24,
+0xA0,0x37,0x05,0x8E,
+0x09,0x00,0x04,0x24,
+0x23,0x10,0x06,0x3C,
+0x21,0x38,0x40,0x02,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA0,0xAF,
+0xA0,0x37,0x03,0x8E,
+0xAA,0x37,0x02,0x96,
+0x21,0x20,0x51,0x02,
+0x21,0x18,0x72,0x00,
+0x21,0x10,0x42,0x02,
+0x00,0x38,0x04,0xAE,
+0x09,0x00,0x04,0x24,
+0xA0,0x37,0x03,0xAE,
+0x75,0x0B,0x00,0x08,
+0xAA,0x37,0x02,0xA6,
+0xFF,0x00,0x86,0x30,
+0x02,0x80,0x02,0x3C,
+0x40,0x00,0xC3,0x2C,
+0x4A,0xF3,0x47,0x90,
+0x00,0x00,0x63,0x38,
+0x3F,0x00,0x02,0x24,
+0x0A,0x30,0x43,0x00,
+0x01,0x00,0x02,0x24,
+0x08,0x0E,0x04,0x24,
+0x00,0x7F,0x05,0x24,
+0x03,0x00,0xE2,0x10,
+0x31,0x00,0xC3,0x2C,
+0xA9,0x45,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x30,0x00,0x02,0x24,
+0xA9,0x45,0x00,0x08,
+0x0A,0x30,0x43,0x00,
+0xC0,0xFF,0xBD,0x27,
+0x02,0x80,0x03,0x3C,
+0x38,0x00,0xB4,0xAF,
+0x34,0x00,0xB3,0xAF,
+0x30,0x00,0xB2,0xAF,
+0x2C,0x00,0xB1,0xAF,
+0x28,0x00,0xB0,0xAF,
+0x28,0xEA,0x62,0x24,
+0x3C,0x00,0xBF,0xAF,
+0x0A,0x00,0x4A,0x94,
+0x02,0x00,0x48,0x94,
+0x06,0x00,0x49,0x94,
+0xFF,0x00,0x84,0x30,
+0xFF,0x00,0xA5,0x30,
+0x28,0xEA,0x6B,0x94,
+0x04,0x00,0x4C,0x94,
+0x08,0x00,0x4D,0x94,
+0x00,0x1C,0x05,0x00,
+0x00,0x14,0x04,0x00,
+0x00,0x3E,0x05,0x00,
+0x00,0x36,0x04,0x00,
+0x25,0x38,0xE3,0x00,
+0x25,0x30,0xC2,0x00,
+0x00,0x44,0x08,0x00,
+0x00,0x12,0x05,0x00,
+0x00,0x4C,0x09,0x00,
+0x00,0x54,0x0A,0x00,
+0x00,0x1A,0x04,0x00,
+0x25,0x38,0xE2,0x00,
+0x25,0x40,0x0B,0x01,
+0x25,0x48,0x2C,0x01,
+0x25,0x50,0x4D,0x01,
+0x25,0x30,0xC3,0x00,
+0x02,0x80,0x02,0x3C,
+0x10,0x00,0xA8,0xAF,
+0x14,0x00,0xA9,0xAF,
+0x18,0x00,0xAA,0xAF,
+0x25,0x98,0xE5,0x00,
+0x25,0x90,0xC4,0x00,
+0x30,0x1F,0x54,0x24,
+0x21,0x80,0x00,0x00,
+0x10,0x00,0xB1,0x27,
+0x02,0x00,0x02,0x2E,
+0x32,0x00,0x40,0x10,
+0x80,0x10,0x10,0x00,
+0x21,0x10,0x54,0x00,
+0xF0,0x1C,0x43,0x8C,
+0x00,0x00,0x00,0x00,
+0x21,0x40,0x73,0x00,
+0x21,0x38,0x00,0x00,
+0x7F,0x00,0x09,0x24,
+0xC0,0x20,0x07,0x00,
+0x04,0x10,0x89,0x00,
+0x24,0x10,0x48,0x00,
+0x06,0x10,0x82,0x00,
+0x01,0x00,0xE5,0x24,
+0xFF,0x00,0x43,0x30,
+0x21,0x30,0x27,0x02,
+0x40,0x00,0x63,0x2C,
+0xFF,0x00,0xA7,0x30,
+0x02,0x00,0x60,0x14,
+0x04,0x00,0xE4,0x2C,
+0x3F,0x00,0x02,0x24,
+0xF3,0xFF,0x80,0x14,
+0x10,0x00,0xC2,0xA0,
+0x23,0x00,0xA6,0x93,
+0x22,0x00,0xA2,0x93,
+0x21,0x00,0xA5,0x93,
+0x40,0x18,0x10,0x00,
+0x00,0x14,0x02,0x00,
+0x21,0x18,0x71,0x00,
+0x20,0x00,0xA7,0x93,
+0x00,0x36,0x06,0x00,
+0x25,0x30,0xC2,0x00,
+0x00,0x2A,0x05,0x00,
+0x00,0x00,0x64,0x94,
+0x25,0x30,0xC5,0x00,
+0x7F,0x7F,0x05,0x3C,
+0x25,0x30,0xC7,0x00,
+0xA9,0x45,0x00,0x0C,
+0x7F,0x7F,0xA5,0x34,
+0x01,0x00,0x02,0x26,
+0xFF,0x00,0x50,0x30,
+0x06,0x00,0x03,0x2E,
+0xD5,0xFF,0x60,0x14,
+0x00,0x00,0x00,0x00,
+0x3C,0x00,0xBF,0x8F,
+0x38,0x00,0xB4,0x8F,
+0x34,0x00,0xB3,0x8F,
+0x30,0x00,0xB2,0x8F,
+0x2C,0x00,0xB1,0x8F,
+0x28,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x40,0x00,0xBD,0x27,
+0x21,0x10,0x54,0x00,
+0xF0,0x1C,0x43,0x8C,
+0xDC,0x0B,0x00,0x08,
+0x21,0x40,0x72,0x00,
+0xD8,0xFF,0xBD,0x27,
+0x02,0x80,0x09,0x3C,
+0x1C,0x00,0xB3,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x20,0x00,0xBF,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x30,0x1F,0x27,0x25,
+0x02,0x80,0x02,0x3C,
+0xB0,0x1B,0xE3,0x94,
+0xDE,0x5D,0x46,0x90,
+0xFF,0x00,0x90,0x30,
+0x00,0x10,0x63,0x30,
+0x20,0x00,0xC5,0x30,
+0x21,0x20,0x07,0x02,
+0x10,0x00,0xC6,0x30,
+0x02,0x00,0x60,0x14,
+0x3F,0x00,0x13,0x24,
+0x63,0x1D,0x93,0x90,
+0x28,0x00,0xC0,0x10,
+0x30,0x1F,0x22,0x25,
+0x8D,0x1D,0x82,0x90,
+0x7F,0x1D,0x83,0x90,
+0x00,0x00,0x00,0x00,
+0x23,0x10,0x43,0x00,
+0x00,0x46,0x02,0x00,
+0x03,0x46,0x08,0x00,
+0xFF,0x00,0x71,0x30,
+0x30,0x1F,0x27,0x25,
+0x0F,0x00,0x08,0x31,
+0x21,0x30,0x00,0x01,
+0x21,0x40,0x07,0x02,
+0xB7,0x1D,0x02,0x91,
+0xB0,0x1B,0xE3,0x84,
+0x0F,0x00,0x05,0x3C,
+0x0F,0x00,0x42,0x30,
+0x21,0x10,0x51,0x00,
+0x0C,0x08,0x04,0x24,
+0x00,0xFF,0xA5,0x34,
+0x06,0x00,0x60,0x04,
+0xFF,0x00,0x52,0x30,
+0xC5,0x1D,0x02,0x91,
+0x00,0x00,0x00,0x00,
+0x0F,0x00,0x42,0x30,
+0x21,0x10,0x51,0x00,
+0xFF,0x00,0x51,0x30,
+0xA9,0x45,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x9A,0x0B,0x00,0x0C,
+0x21,0x20,0x60,0x02,
+0x21,0x20,0x20,0x02,
+0x21,0x28,0x40,0x02,
+0x21,0x30,0x00,0x02,
+0x20,0x00,0xBF,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0xAB,0x0B,0x00,0x08,
+0x28,0x00,0xBD,0x27,
+0xDF,0xFF,0xA0,0x10,
+0x21,0x18,0x02,0x02,
+0xA9,0x1D,0x62,0x90,
+0x9B,0x1D,0x63,0x90,
+0x26,0x0C,0x00,0x08,
+0x23,0x10,0x43,0x00,
+0xE0,0xFF,0xBD,0x27,
+0x14,0x00,0xB1,0xAF,
+0x02,0x80,0x02,0x3C,
+0x18,0x00,0xBF,0xAF,
+0x10,0x00,0xB0,0xAF,
+0xE9,0x5D,0x43,0x90,
+0x01,0x00,0x02,0x24,
+0x0D,0x00,0x62,0x10,
+0xFF,0x00,0x91,0x30,
+0x0D,0x0C,0x00,0x0C,
+0x21,0x20,0x20,0x02,
+0x21,0x30,0x20,0x02,
+0x18,0x00,0x04,0x24,
+0x5F,0x47,0x00,0x0C,
+0xFF,0x03,0x05,0x24,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x0A,0x00,0x04,0x24,
+0x25,0x22,0x00,0x08,
+0x20,0x00,0xBD,0x27,
+0x1A,0x00,0x23,0x12,
+0x0B,0x00,0x02,0x24,
+0x1D,0x00,0x22,0x12,
+0x0F,0x00,0x05,0x3C,
+0xFF,0xFF,0xA5,0x34,
+0x15,0x00,0x04,0x24,
+0xF4,0xF8,0x06,0x34,
+0x5F,0x47,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x02,0x3C,
+0x48,0xF3,0x44,0x90,
+0xFE,0x00,0x03,0x24,
+0xE9,0xFF,0x83,0x14,
+0x0F,0x00,0x10,0x3C,
+0xFF,0xFF,0x05,0x36,
+0x8A,0x47,0x00,0x0C,
+0x15,0x00,0x04,0x24,
+0xFF,0x00,0x46,0x30,
+0x00,0xFF,0x03,0x36,
+0x24,0x10,0x43,0x00,
+0x01,0x00,0xC6,0x24,
+0x25,0x30,0x46,0x00,
+0xFF,0xFF,0x05,0x36,
+0x5F,0x47,0x00,0x0C,
+0x15,0x00,0x04,0x24,
+0x5B,0x0C,0x00,0x08,
+0x21,0x30,0x20,0x02,
+0x0F,0x00,0x05,0x3C,
+0xFF,0xFF,0xA5,0x34,
+0x15,0x00,0x04,0x24,
+0x6B,0x0C,0x00,0x08,
+0xF4,0xA8,0x06,0x34,
+0xFF,0xFF,0xA5,0x34,
+0x15,0x00,0x04,0x24,
+0x6B,0x0C,0x00,0x08,
+0xF5,0xF8,0x06,0x34,
+0xFC,0x00,0x84,0x30,
+0x50,0x00,0x02,0x24,
+0x11,0x00,0x82,0x10,
+0x05,0x00,0x03,0x24,
+0x51,0x00,0x82,0x28,
+0x10,0x00,0x40,0x10,
+0xA0,0x00,0x02,0x24,
+0x20,0x00,0x02,0x24,
+0x0B,0x00,0x82,0x10,
+0x02,0x00,0x03,0x24,
+0x21,0x00,0x82,0x28,
+0x15,0x00,0x40,0x14,
+0x30,0x00,0x02,0x24,
+0x06,0x00,0x82,0x10,
+0x03,0x00,0x03,0x24,
+0x04,0x00,0x03,0x24,
+0x40,0x00,0x02,0x24,
+0x02,0x00,0x82,0x10,
+0x00,0x00,0x00,0x00,
+0x0C,0x00,0x03,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0xFD,0xFF,0x82,0x10,
+0x08,0x00,0x03,0x24,
+0xA1,0x00,0x82,0x28,
+0x0C,0x00,0x40,0x10,
+0xC0,0x00,0x02,0x24,
+0x80,0x00,0x02,0x24,
+0xF7,0xFF,0x82,0x10,
+0x06,0x00,0x03,0x24,
+0x07,0x00,0x03,0x24,
+0x99,0x0C,0x00,0x08,
+0x90,0x00,0x02,0x24,
+0xF2,0xFF,0x80,0x10,
+0x21,0x18,0x00,0x00,
+0x01,0x00,0x03,0x24,
+0x99,0x0C,0x00,0x08,
+0x10,0x00,0x02,0x24,
+0xED,0xFF,0x82,0x10,
+0x0A,0x00,0x03,0x24,
+0xC1,0x00,0x82,0x28,
+0x04,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x09,0x00,0x03,0x24,
+0x99,0x0C,0x00,0x08,
+0xB0,0x00,0x02,0x24,
+0x0B,0x00,0x03,0x24,
+0x99,0x0C,0x00,0x08,
+0xD0,0x00,0x02,0x24,
+0xD8,0xFF,0xBD,0x27,
+0x1C,0x00,0xB3,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x20,0x00,0xBF,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x08,0x00,0x83,0x8C,
+0x25,0xB0,0x02,0x3C,
+0xB0,0x03,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0x08,0x00,0x90,0x94,
+0x02,0x80,0x02,0x3C,
+0x21,0x98,0x80,0x00,
+0x25,0x80,0x02,0x02,
+0x21,0x20,0x00,0x02,
+0xFF,0x00,0xB2,0x30,
+0xFF,0x00,0xD1,0x30,
+0x21,0x28,0x00,0x00,
+0x08,0x52,0x00,0x0C,
+0x08,0x00,0x06,0x24,
+0x08,0x00,0x04,0x8E,
+0x04,0x00,0x05,0x8E,
+0xFF,0xDF,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0xFF,0xE0,0x03,0x24,
+0x24,0x20,0x82,0x00,
+0x00,0x40,0x02,0x3C,
+0x10,0x00,0x06,0x8E,
+0x24,0x28,0xA3,0x00,
+0x25,0x20,0x82,0x00,
+0x3F,0xFF,0x02,0x3C,
+0x0C,0x00,0x67,0x8E,
+0x7F,0xFF,0x03,0x24,
+0xFF,0xFF,0x42,0x34,
+0x00,0x12,0xA5,0x34,
+0x01,0x00,0x52,0x32,
+0x03,0x00,0x31,0x32,
+0x24,0x20,0x83,0x00,
+0x24,0x28,0xA2,0x00,
+0xC0,0x91,0x12,0x00,
+0x80,0x8D,0x11,0x00,
+0x00,0x80,0x02,0x3C,
+0x25,0x30,0xC2,0x00,
+0x25,0x20,0x92,0x00,
+0x25,0x28,0xB1,0x00,
+0x20,0x00,0x02,0x24,
+0x10,0x00,0x06,0xAE,
+0x02,0x00,0x02,0xA2,
+0x08,0x00,0x04,0xAE,
+0x04,0x00,0x05,0xAE,
+0x00,0x00,0x07,0xA6,
+0x02,0x80,0x02,0x3C,
+0xE0,0x3A,0x43,0x94,
+0xFB,0xFF,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0xC2,0x1B,0x03,0x00,
+0x24,0x30,0xC2,0x00,
+0x80,0x1C,0x03,0x00,
+0x25,0x30,0xC3,0x00,
+0x14,0x00,0x05,0x8E,
+0x82,0x24,0x06,0x00,
+0x01,0x00,0x84,0x30,
+0x0C,0x00,0x02,0x24,
+0x0A,0x10,0x04,0x00,
+0xFF,0x81,0x03,0x24,
+0x24,0x28,0xA3,0x00,
+0x40,0x12,0x02,0x00,
+0x25,0x28,0xA2,0x00,
+0x14,0x00,0x05,0xAE,
+0x10,0x00,0x06,0xAE,
+0x00,0x60,0x03,0x40,
+0x01,0x00,0x61,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x02,0x80,0x02,0x3C,
+0x74,0x57,0x42,0x24,
+0x04,0x00,0x44,0x8C,
+0x00,0x00,0x62,0xAE,
+0x04,0x00,0x53,0xAC,
+0x00,0x00,0x93,0xAC,
+0x04,0x00,0x64,0xAE,
+0x00,0x60,0x83,0x40,
+0x20,0x00,0xBF,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0xD8,0xFF,0xBD,0x27,
+0x14,0x00,0xB1,0xAF,
+0x20,0x00,0xBF,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x10,0x00,0xB0,0xAF,
+0xFF,0xFF,0x83,0x30,
+0xFF,0x00,0xB1,0x30,
+0x00,0x60,0x12,0x40,
+0x01,0x00,0x41,0x36,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x02,0x80,0x13,0x3C,
+0x30,0x1F,0x70,0x26,
+0xB0,0x1B,0x02,0x96,
+0x00,0x00,0x00,0x00,
+0x00,0x80,0x42,0x30,
+0x2F,0x00,0x43,0x10,
+0x02,0x80,0x04,0x3C,
+0x00,0x80,0x02,0x34,
+0x50,0xDF,0x84,0x24,
+0x33,0x00,0x62,0x10,
+0x21,0x30,0x20,0x02,
+0x2F,0x55,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x30,0x3B,0x04,0x92,
+0x4F,0x0C,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x03,0x3C,
+0x03,0x02,0x63,0x34,
+0x00,0x00,0x62,0x90,
+0x00,0x08,0x04,0x24,
+0x01,0x00,0x05,0x24,
+0x04,0x00,0x42,0x30,
+0x00,0x00,0x62,0xA0,
+0x1B,0x47,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x00,0x09,0x04,0x24,
+0x01,0x00,0x05,0x24,
+0x1B,0x47,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x84,0x08,0x04,0x24,
+0xFF,0xFF,0x05,0x24,
+0x1B,0x47,0x00,0x0C,
+0x58,0x00,0x06,0x24,
+0x00,0x0C,0x05,0x24,
+0x01,0x00,0x06,0x24,
+0x5F,0x47,0x00,0x0C,
+0x18,0x00,0x04,0x24,
+0xB0,0x1B,0x02,0x96,
+0x8F,0x3E,0x11,0xA2,
+0xFF,0x7F,0x42,0x30,
+0xB0,0x1B,0x02,0xA6,
+0x30,0x1F,0x62,0x26,
+0x30,0x3B,0x44,0x90,
+0x0D,0x0C,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x00,0x60,0x92,0x40,
+0x20,0x00,0xBF,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0x00,0x60,0x92,0x40,
+0x20,0x00,0xBF,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0x30,0x3B,0x05,0x92,
+0x02,0x80,0x04,0x3C,
+0x2F,0x55,0x00,0x0C,
+0x30,0xDF,0x84,0x24,
+0x01,0x00,0x02,0x24,
+0x2C,0x00,0x22,0x12,
+0x00,0x00,0x00,0x00,
+0x30,0x3B,0x04,0x92,
+0x00,0x00,0x00,0x00,
+0xFE,0xFF,0x84,0x24,
+0x4F,0x0C,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x07,0x3C,
+0x03,0x02,0xE7,0x34,
+0x00,0x00,0xE2,0x90,
+0xFB,0xFF,0x03,0x24,
+0x00,0x08,0x04,0x24,
+0x24,0x10,0x43,0x00,
+0x00,0x00,0xE2,0xA0,
+0x01,0x00,0x05,0x24,
+0x1B,0x47,0x00,0x0C,
+0x01,0x00,0x06,0x24,
+0x03,0x00,0x30,0x32,
+0x00,0x09,0x04,0x24,
+0x01,0x00,0x05,0x24,
+0x1B,0x47,0x00,0x0C,
+0x01,0x00,0x06,0x24,
+0x00,0x0A,0x04,0x24,
+0x10,0x00,0x05,0x24,
+0x1B,0x47,0x00,0x0C,
+0x42,0x30,0x10,0x00,
+0x21,0x30,0x00,0x02,
+0x00,0x0D,0x04,0x24,
+0x1B,0x47,0x00,0x0C,
+0x00,0x0C,0x05,0x24,
+0x84,0x08,0x04,0x24,
+0xFF,0xFF,0x05,0x24,
+0x1B,0x47,0x00,0x0C,
+0x18,0x00,0x06,0x24,
+0x18,0x00,0x04,0x24,
+0x00,0x0C,0x05,0x24,
+0x5F,0x47,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x30,0x1F,0x64,0x26,
+0xB0,0x1B,0x82,0x94,
+0x00,0x80,0x03,0x24,
+0x8F,0x3E,0x91,0xA0,
+0x25,0x10,0x43,0x00,
+0x47,0x0D,0x00,0x08,
+0xB0,0x1B,0x82,0xA4,
+0x30,0x3B,0x04,0x92,
+0x65,0x0D,0x00,0x08,
+0x02,0x00,0x84,0x24,
+0xC8,0xFF,0xBD,0x27,
+0x02,0x80,0x03,0x3C,
+0x34,0x00,0xBF,0xAF,
+0x30,0x00,0xB2,0xAF,
+0x2C,0x00,0xB1,0xAF,
+0x28,0x00,0xB0,0xAF,
+0x34,0xEA,0x62,0x24,
+0x01,0x00,0x44,0x90,
+0x05,0x00,0x45,0x90,
+0x09,0x00,0x46,0x90,
+0x0D,0x00,0x47,0x90,
+0x04,0x00,0x51,0x90,
+0x08,0x00,0x50,0x90,
+0x34,0xEA,0x72,0x90,
+0x02,0x00,0x4F,0x90,
+0x0C,0x00,0x43,0x90,
+0x06,0x00,0x4E,0x90,
+0x0A,0x00,0x4D,0x90,
+0x0E,0x00,0x48,0x90,
+0x03,0x00,0x49,0x90,
+0x07,0x00,0x4A,0x90,
+0x0B,0x00,0x4B,0x90,
+0x0F,0x00,0x4C,0x90,
+0x00,0x22,0x04,0x00,
+0x00,0x2A,0x05,0x00,
+0x00,0x32,0x06,0x00,
+0x00,0x3A,0x07,0x00,
+0x02,0x80,0x18,0x3C,
+0x25,0x28,0xB1,0x00,
+0x25,0x30,0xD0,0x00,
+0x25,0x38,0xE3,0x00,
+0x25,0x20,0x92,0x00,
+0x11,0x00,0x51,0x90,
+0x10,0x00,0x50,0x90,
+0x30,0x1F,0x03,0x27,
+0x00,0x7C,0x0F,0x00,
+0x00,0x74,0x0E,0x00,
+0x00,0x6C,0x0D,0x00,
+0x00,0x44,0x08,0x00,
+0x25,0x78,0xE4,0x01,
+0x25,0x70,0xC5,0x01,
+0x25,0x68,0xA6,0x01,
+0x25,0x40,0x07,0x01,
+0x5A,0x3E,0x66,0x90,
+0x00,0x4E,0x09,0x00,
+0x00,0x56,0x0A,0x00,
+0x00,0x5E,0x0B,0x00,
+0x00,0x66,0x0C,0x00,
+0x25,0x48,0x2F,0x01,
+0x25,0x50,0x4E,0x01,
+0x25,0x58,0x6D,0x01,
+0x25,0x60,0x88,0x01,
+0x25,0xB0,0x05,0x3C,
+0x37,0x02,0xA5,0x34,
+0x10,0x00,0xA9,0xAF,
+0x14,0x00,0xAA,0xAF,
+0x18,0x00,0xAB,0xAF,
+0x1C,0x00,0xAC,0xAF,
+0x20,0x00,0xB0,0xA3,
+0x21,0x00,0xB1,0xA3,
+0x03,0x00,0xC7,0x30,
+0x00,0x00,0xA4,0x90,
+0x02,0x00,0xE2,0x24,
+0x01,0x00,0x03,0x24,
+0x04,0x18,0x43,0x00,
+0x1C,0x00,0xC6,0x30,
+0xF8,0xFF,0x02,0x24,
+0x24,0x20,0x82,0x00,
+0xFF,0x00,0x67,0x30,
+0x82,0x30,0x06,0x00,
+0x10,0x00,0xE3,0x2C,
+0x25,0x20,0x86,0x00,
+0x0F,0x00,0x02,0x24,
+0x00,0x00,0xA4,0xA0,
+0x0A,0x38,0x43,0x00,
+0x21,0x28,0x00,0x00,
+0x10,0x00,0xA3,0x27,
+0x21,0x30,0x65,0x00,
+0x00,0x00,0xC2,0x90,
+0x01,0x00,0xA5,0x24,
+0x2B,0x10,0xE2,0x00,
+0x02,0x00,0x40,0x10,
+0x11,0x00,0xA4,0x2C,
+0x00,0x00,0xC7,0xA0,
+0xF8,0xFF,0x80,0x14,
+0x21,0x30,0x60,0x00,
+0x21,0x28,0x00,0x00,
+0x25,0xB0,0x07,0x3C,
+0x01,0x00,0xC2,0x90,
+0x00,0x00,0xC3,0x90,
+0x21,0x20,0xA7,0x00,
+0x00,0x11,0x02,0x00,
+0x25,0x10,0x43,0x00,
+0x01,0x00,0xA5,0x24,
+0xFF,0x00,0x42,0x30,
+0x08,0x00,0xA3,0x2C,
+0xA8,0x01,0x82,0xA0,
+0xF6,0xFF,0x60,0x14,
+0x02,0x00,0xC6,0x24,
+0x21,0x00,0xA2,0x93,
+0x20,0x00,0xA4,0x93,
+0x02,0x80,0x03,0x3C,
+0x00,0x11,0x02,0x00,
+0xF1,0x5D,0x65,0x90,
+0x25,0x10,0x44,0x00,
+0xFF,0x00,0x42,0x30,
+0xA7,0x01,0xE3,0x34,
+0x00,0x00,0x62,0xA0,
+0x01,0x00,0x02,0x24,
+0x07,0x00,0xA2,0x10,
+0x30,0x1F,0x03,0x27,
+0x34,0x00,0xBF,0x8F,
+0x30,0x00,0xB2,0x8F,
+0x2C,0x00,0xB1,0x8F,
+0x28,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x38,0x00,0xBD,0x27,
+0x58,0x3E,0x62,0x94,
+0x00,0x00,0x00,0x00,
+0x02,0x00,0x42,0x30,
+0xF6,0xFF,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x79,0x3E,0x63,0x90,
+0x00,0x00,0x00,0x00,
+0x04,0x00,0x62,0x30,
+0xF1,0xFF,0x40,0x10,
+0x03,0x00,0x63,0x30,
+0x0C,0x00,0x65,0x10,
+0x03,0x00,0x02,0x24,
+0x05,0x00,0x62,0x10,
+0x21,0x20,0x00,0x00,
+0x12,0x0D,0x00,0x0C,
+0x21,0x28,0x00,0x00,
+0xFF,0x0D,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x00,0x80,0x04,0x34,
+0x12,0x0D,0x00,0x0C,
+0x02,0x00,0x05,0x24,
+0xFF,0x0D,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x00,0x80,0x04,0x34,
+0x12,0x0D,0x00,0x0C,
+0x01,0x00,0x05,0x24,
+0xFF,0x0D,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0xE8,0xFF,0xBD,0x27,
+0x02,0x80,0x06,0x3C,
+0x14,0x00,0xBF,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x88,0x58,0xC2,0x24,
+0x01,0x00,0x44,0x90,
+0x88,0x58,0xC3,0x90,
+0x02,0x00,0x45,0x90,
+0x03,0x00,0x46,0x90,
+0x05,0x00,0x47,0x90,
+0x04,0x00,0x48,0x90,
+0x00,0x22,0x04,0x00,
+0x25,0x18,0x64,0x00,
+0x00,0x2C,0x05,0x00,
+0x25,0xB0,0x10,0x3C,
+0x25,0x18,0x65,0x00,
+0x00,0x36,0x06,0x00,
+0x00,0x3A,0x07,0x00,
+0x25,0x18,0x66,0x00,
+0x58,0x00,0x02,0x36,
+0x5C,0x00,0x05,0x36,
+0x25,0x40,0x07,0x01,
+0x02,0x80,0x04,0x3C,
+0x00,0x00,0x43,0xAC,
+0x84,0x58,0x84,0x24,
+0x00,0x00,0xA8,0xAC,
+0x19,0x4F,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x94,0x00,0x03,0x36,
+0x00,0x00,0x62,0xA4,
+0x48,0x00,0x10,0x36,
+0x00,0x00,0x02,0x8E,
+0x04,0x00,0x03,0x3C,
+0x14,0x00,0xBF,0x8F,
+0x25,0x10,0x43,0x00,
+0x00,0x00,0x02,0xAE,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0xE0,0xFF,0xBD,0x27,
+0x18,0x00,0xB2,0xAF,
+0x21,0x90,0x80,0x00,
+0x18,0x02,0x04,0x24,
+0x14,0x00,0xB1,0xAF,
+0x1C,0x00,0xBF,0xAF,
+0x25,0x24,0x00,0x0C,
+0x10,0x00,0xB0,0xAF,
+0x02,0x80,0x05,0x3C,
+0x02,0x80,0x04,0x3C,
+0x21,0x88,0x40,0x00,
+0x84,0x58,0xA5,0x24,
+0xDC,0x01,0x06,0x24,
+0x18,0x00,0x40,0x10,
+0x98,0xDF,0x84,0x24,
+0x08,0x00,0x50,0x94,
+0xF8,0x01,0x02,0x24,
+0x0C,0x00,0x22,0xAE,
+0x02,0x80,0x02,0x3C,
+0x0A,0x00,0x03,0x24,
+0x25,0x80,0x02,0x02,
+0x14,0x00,0x23,0xAE,
+0x3C,0x00,0x04,0x26,
+0x10,0x52,0x00,0x0C,
+0x20,0x00,0x10,0x26,
+0x18,0x00,0x12,0xAE,
+0x21,0x20,0x20,0x02,
+0x30,0x09,0x00,0x0C,
+0x14,0x00,0x12,0xAE,
+0x02,0x80,0x04,0x3C,
+0x21,0x28,0x40,0x02,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0xA4,0xDF,0x84,0x24,
+0x2F,0x55,0x00,0x08,
+0x20,0x00,0xBD,0x27,
+0x02,0x80,0x05,0x3C,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x5C,0xEA,0xA5,0x24,
+0x2F,0x55,0x00,0x08,
+0x20,0x00,0xBD,0x27,
+0xE0,0xFF,0xBD,0x27,
+0x10,0x00,0xB0,0xAF,
+0x21,0x80,0x80,0x00,
+0x14,0x00,0xB1,0xAF,
+0x18,0x00,0xBF,0xAF,
+0x25,0x24,0x00,0x0C,
+0x28,0x00,0x04,0x24,
+0x02,0x80,0x04,0x3C,
+0x21,0x88,0x40,0x00,
+0x21,0x28,0x00,0x02,
+0x06,0x00,0x06,0x24,
+0x15,0x00,0x40,0x10,
+0xB4,0xDF,0x84,0x24,
+0x08,0x00,0x44,0x94,
+0x08,0x00,0x02,0x24,
+0x0C,0x00,0x22,0xAE,
+0x02,0x80,0x02,0x3C,
+0x0C,0x00,0x03,0x24,
+0x25,0x20,0x82,0x00,
+0x14,0x00,0x23,0xAE,
+0x10,0x52,0x00,0x0C,
+0x20,0x00,0x84,0x24,
+0x30,0x09,0x00,0x0C,
+0x21,0x20,0x20,0x02,
+0x02,0x80,0x04,0x3C,
+0x2F,0x55,0x00,0x0C,
+0xC0,0xDF,0x84,0x24,
+0x21,0x10,0x00,0x00,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x02,0x80,0x05,0x3C,
+0x2F,0x55,0x00,0x0C,
+0x6C,0xEA,0xA5,0x24,
+0x92,0x0E,0x00,0x08,
+0xFF,0xFF,0x02,0x24,
+0xD8,0xFF,0xBD,0x27,
+0x1C,0x00,0xB3,0xAF,
+0x21,0x98,0x80,0x00,
+0x2C,0x00,0x04,0x24,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x21,0x90,0xA0,0x00,
+0x20,0x00,0xBF,0xAF,
+0x25,0x24,0x00,0x0C,
+0x10,0x00,0xB0,0xAF,
+0x02,0x80,0x04,0x3C,
+0x02,0x80,0x05,0x3C,
+0x21,0x88,0x40,0x00,
+0xD8,0xDF,0x84,0x24,
+0x21,0x30,0x40,0x02,
+0x19,0x00,0x40,0x10,
+0x84,0xEA,0xA5,0x24,
+0x05,0x00,0x65,0x92,
+0x2F,0x55,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x30,0x96,
+0x02,0x80,0x02,0x3C,
+0x0B,0x00,0x03,0x24,
+0x25,0x80,0x02,0x02,
+0x20,0x00,0x10,0x26,
+0x0C,0x00,0x02,0x24,
+0x21,0x20,0x00,0x02,
+0x0C,0x00,0x22,0xAE,
+0x14,0x00,0x23,0xAE,
+0x21,0x28,0x60,0x02,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x08,0x00,0x12,0xAE,
+0x21,0x20,0x20,0x02,
+0x20,0x00,0xBF,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x30,0x09,0x00,0x08,
+0x28,0x00,0xBD,0x27,
+0x02,0x80,0x04,0x3C,
+0x20,0x00,0xBF,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0xCC,0xDF,0x84,0x24,
+0x2F,0x55,0x00,0x08,
+0x28,0x00,0xBD,0x27,
+0xE0,0xFF,0xBD,0x27,
+0x14,0x00,0xB1,0xAF,
+0x18,0x00,0xBF,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x02,0x80,0x02,0x3C,
+0xF6,0x5E,0x43,0x90,
+0x02,0x80,0x11,0x3C,
+0x04,0x00,0x04,0x24,
+0x0F,0x00,0x63,0x30,
+0x04,0x00,0x63,0x28,
+0x36,0x00,0x60,0x14,
+0x01,0x00,0x05,0x24,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x50,0x24,
+0x2C,0xE0,0x22,0x8E,
+0x0F,0x00,0x05,0x3C,
+0xFF,0xFF,0xA5,0x34,
+0x24,0x00,0x04,0x24,
+0x12,0x00,0x40,0x14,
+0x60,0x00,0x06,0x24,
+0x0F,0x00,0x05,0x3C,
+0x5F,0x47,0x00,0x0C,
+0xFF,0xFF,0xA5,0x34,
+0x01,0x00,0x02,0x24,
+0x2C,0xE0,0x22,0xAE,
+0xD0,0x07,0x03,0x24,
+0x02,0x80,0x02,0x3C,
+0x70,0x58,0x43,0xAC,
+0x02,0x80,0x02,0x3C,
+0xF5,0x5E,0x44,0x90,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x01,0x00,0x05,0x24,
+0xFF,0x00,0x84,0x30,
+0x64,0x31,0x00,0x08,
+0x20,0x00,0xBD,0x27,
+0x8A,0x47,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x9C,0x3E,0x04,0x92,
+0xFF,0x00,0x43,0x30,
+0x00,0x2C,0x03,0x00,
+0x0A,0x00,0x64,0x10,
+0x9D,0x3E,0x02,0xA2,
+0x02,0x80,0x02,0x3C,
+0x49,0xF3,0x44,0x90,
+0x00,0x00,0x00,0x00,
+0x00,0x22,0x04,0x00,
+0x6B,0x1E,0x00,0x0C,
+0x25,0x20,0xA4,0x00,
+0x9D,0x3E,0x03,0x92,
+0x00,0x00,0x00,0x00,
+0x9C,0x3E,0x03,0xA2,
+0x10,0x27,0x02,0x24,
+0x40,0x39,0x02,0xAE,
+0x02,0x80,0x02,0x3C,
+0xF5,0x5E,0x44,0x90,
+0x2C,0xE0,0x20,0xAE,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x01,0x00,0x05,0x24,
+0xFF,0x00,0x84,0x30,
+0x64,0x31,0x00,0x08,
+0x20,0x00,0xBD,0x27,
+0x64,0x31,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xDB,0x0E,0x00,0x08,
+0x02,0x80,0x02,0x3C,
+0xB8,0xFF,0xBD,0x27,
+0x00,0x01,0x04,0x24,
+0x3C,0x00,0xB3,0xAF,
+0x38,0x00,0xB2,0xAF,
+0x34,0x00,0xB1,0xAF,
+0x40,0x00,0xBF,0xAF,
+0x30,0x00,0xB0,0xAF,
+0x25,0x24,0x00,0x0C,
+0x02,0x80,0x13,0x3C,
+0x02,0x80,0x04,0x3C,
+0x21,0x88,0x40,0x00,
+0xF0,0xDD,0x65,0x26,
+0x06,0x00,0x06,0x24,
+0x0C,0x00,0x52,0x24,
+0x4C,0x00,0x40,0x10,
+0x30,0xE0,0x84,0x24,
+0x08,0x00,0x50,0x94,
+0x02,0x80,0x02,0x3C,
+0x25,0x80,0x02,0x02,
+0x24,0x00,0x04,0x26,
+0x10,0x52,0x00,0x0C,
+0x20,0x00,0x00,0xA6,
+0x02,0x80,0x05,0x3C,
+0x2A,0x00,0x04,0x26,
+0x18,0x3B,0xA5,0x24,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x30,0x00,0x04,0x26,
+0xF0,0xDD,0x65,0x26,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x20,0x00,0x03,0x96,
+0x18,0x00,0x02,0x24,
+0x02,0x80,0x04,0x3C,
+0x03,0xFF,0x63,0x30,
+0x40,0x00,0x63,0x34,
+0x20,0x00,0x03,0xA6,
+0x30,0x1F,0x84,0x24,
+0x0C,0x00,0x22,0xAE,
+0xF8,0x1D,0x82,0x94,
+0x20,0x00,0x06,0x26,
+0x02,0x80,0x07,0x3C,
+0xFF,0x0F,0x43,0x30,
+0x00,0x19,0x03,0x00,
+0x02,0x2A,0x03,0x00,
+0x01,0x00,0x42,0x24,
+0xF8,0x1D,0x82,0xA4,
+0x16,0x00,0xC3,0xA0,
+0x17,0x00,0xC5,0xA0,
+0x74,0x3B,0x86,0x8C,
+0xA8,0x5A,0xE7,0x24,
+0x38,0x00,0x04,0x26,
+0x21,0x28,0x00,0x00,
+0x41,0x4F,0x00,0x0C,
+0x10,0x00,0xB2,0xAF,
+0x18,0x00,0xA4,0x27,
+0x28,0x00,0xA5,0x27,
+0x21,0x50,0x00,0x0C,
+0x21,0x80,0x40,0x00,
+0x28,0x00,0xA3,0x8F,
+0x21,0x20,0x00,0x02,
+0x18,0x00,0xA7,0x27,
+0x09,0x00,0x62,0x28,
+0x01,0x00,0x05,0x24,
+0x12,0x00,0x40,0x10,
+0x08,0x00,0x06,0x24,
+0x21,0x20,0x00,0x02,
+0x21,0x30,0x60,0x00,
+0x01,0x00,0x05,0x24,
+0x18,0x00,0xA7,0x27,
+0x41,0x4F,0x00,0x0C,
+0x10,0x00,0xB2,0xAF,
+0x21,0x20,0x20,0x02,
+0x01,0x00,0x05,0x24,
+0xB9,0x0C,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x40,0x00,0xBF,0x8F,
+0x3C,0x00,0xB3,0x8F,
+0x38,0x00,0xB2,0x8F,
+0x34,0x00,0xB1,0x8F,
+0x30,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x48,0x00,0xBD,0x27,
+0x41,0x4F,0x00,0x0C,
+0x10,0x00,0xB2,0xAF,
+0x28,0x00,0xA6,0x8F,
+0x21,0x20,0x40,0x00,
+0x32,0x00,0x05,0x24,
+0xF8,0xFF,0xC6,0x24,
+0x59,0x0F,0x00,0x08,
+0x20,0x00,0xA7,0x27,
+0x02,0x80,0x05,0x3C,
+0x2F,0x55,0x00,0x0C,
+0x9C,0xEA,0xA5,0x24,
+0x40,0x00,0xBF,0x8F,
+0x3C,0x00,0xB3,0x8F,
+0x38,0x00,0xB2,0x8F,
+0x34,0x00,0xB1,0x8F,
+0x30,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x48,0x00,0xBD,0x27,
+0xC8,0xFF,0xBD,0x27,
+0x18,0x00,0xB2,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x34,0x00,0xBF,0xAF,
+0x30,0x00,0xBE,0xAF,
+0x2C,0x00,0xB7,0xAF,
+0x28,0x00,0xB6,0xAF,
+0x24,0x00,0xB5,0xAF,
+0x20,0x00,0xB4,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x21,0x80,0x80,0x00,
+0x45,0x00,0xA0,0x14,
+0x21,0x90,0x00,0x00,
+0x08,0x00,0x82,0x90,
+0x02,0x80,0x13,0x3C,
+0x30,0x1F,0x63,0x26,
+0x0F,0x00,0x42,0x30,
+0x14,0x3E,0x62,0xAC,
+0x25,0xB0,0x02,0x3C,
+0x0A,0x00,0x10,0x26,
+0xD0,0x01,0x57,0x34,
+0x02,0x80,0x14,0x3C,
+0xD8,0x01,0x5E,0x34,
+0xDC,0x01,0x55,0x34,
+0xD4,0x01,0x56,0x34,
+0x03,0x00,0x11,0x24,
+0x00,0x00,0x06,0x92,
+0x30,0x1F,0x62,0x26,
+0x0C,0x3E,0x47,0x90,
+0x0F,0x00,0xC3,0x30,
+0x01,0x00,0x05,0x92,
+0x18,0x00,0x67,0x00,
+0x03,0x00,0x04,0x92,
+0x02,0x00,0x02,0x92,
+0x0F,0x00,0xA7,0x30,
+0x00,0x3A,0x07,0x00,
+0x02,0x29,0x05,0x00,
+0x00,0x22,0x04,0x00,
+0x25,0x20,0x82,0x00,
+0x00,0x2B,0x05,0x00,
+0x42,0x11,0x06,0x00,
+0x00,0x24,0x04,0x00,
+0x03,0x00,0x49,0x30,
+0x02,0x31,0x06,0x00,
+0x01,0x00,0x02,0x24,
+0x01,0x00,0xC6,0x30,
+0x12,0x18,0x00,0x00,
+0x0A,0x00,0x63,0x24,
+0xFF,0x00,0x63,0x30,
+0x25,0x18,0x67,0x00,
+0x25,0x18,0x65,0x00,
+0x30,0x00,0x22,0x11,
+0x25,0x38,0x64,0x00,
+0x02,0x00,0x22,0x29,
+0x3E,0x00,0x40,0x14,
+0x02,0x00,0x02,0x24,
+0x38,0x00,0x22,0x11,
+0x03,0x00,0x02,0x24,
+0x40,0x00,0x22,0x11,
+0x00,0x00,0x00,0x00,
+0x21,0x28,0x20,0x01,
+0x3C,0xE0,0x84,0x26,
+0x2F,0x55,0x00,0x0C,
+0xFF,0xFF,0x31,0x26,
+0xD9,0xFF,0x21,0x06,
+0x04,0x00,0x10,0x26,
+0x25,0xB0,0x02,0x3C,
+0xE7,0x01,0x42,0x34,
+0x00,0x00,0x52,0xA0,
+0x34,0x00,0xBF,0x8F,
+0x30,0x00,0xBE,0x8F,
+0x2C,0x00,0xB7,0x8F,
+0x28,0x00,0xB6,0x8F,
+0x24,0x00,0xB5,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x38,0x00,0xBD,0x27,
+0x02,0x80,0x13,0x3C,
+0x08,0x00,0x83,0x90,
+0x30,0x1F,0x62,0x26,
+0x14,0x3E,0x44,0x8C,
+0x0F,0x00,0x63,0x30,
+0xBB,0xFF,0x83,0x14,
+0x00,0x00,0x00,0x00,
+0x34,0x00,0xBF,0x8F,
+0x30,0x00,0xBE,0x8F,
+0x2C,0x00,0xB7,0x8F,
+0x28,0x00,0xB6,0x8F,
+0x24,0x00,0xB5,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x38,0x00,0xBD,0x27,
+0x00,0x00,0xA7,0xAE,
+0x21,0x20,0x00,0x00,
+0x25,0xB0,0x08,0x3C,
+0x07,0x10,0x92,0x00,
+0x01,0x00,0x42,0x30,
+0x01,0x00,0x84,0x24,
+0x02,0x00,0x40,0x10,
+0x03,0x00,0x85,0x2C,
+0xD0,0x01,0x07,0xAD,
+0xF9,0xFF,0xA0,0x14,
+0x04,0x00,0x08,0x25,
+0xB6,0x0F,0x00,0x08,
+0x21,0x28,0x20,0x01,
+0x0D,0x00,0xC0,0x10,
+0x00,0x00,0x00,0x00,
+0xB5,0x0F,0x00,0x08,
+0x02,0x00,0x52,0x36,
+0xC7,0xFF,0x20,0x15,
+0x21,0x28,0x20,0x01,
+0x0D,0x00,0xC0,0x10,
+0x00,0x00,0x00,0x00,
+0xB6,0x0F,0x00,0x08,
+0x04,0x00,0x52,0x36,
+0x06,0x00,0xC0,0x10,
+0x00,0x00,0x00,0x00,
+0xB5,0x0F,0x00,0x08,
+0x01,0x00,0x52,0x36,
+0x00,0x00,0xC7,0xAE,
+0xB6,0x0F,0x00,0x08,
+0x21,0x28,0x20,0x01,
+0x00,0x00,0xE7,0xAE,
+0xB6,0x0F,0x00,0x08,
+0x21,0x28,0x20,0x01,
+0x00,0x00,0xC7,0xAF,
+0xB6,0x0F,0x00,0x08,
+0x21,0x28,0x20,0x01,
+0xC8,0xFF,0xBD,0x27,
+0x1C,0x00,0xB1,0xAF,
+0x02,0x80,0x02,0x3C,
+0x21,0x88,0x80,0x00,
+0x00,0x01,0x04,0x24,
+0x30,0x00,0xB6,0xAF,
+0x24,0x00,0xB3,0xAF,
+0x34,0x00,0xBF,0xAF,
+0x2C,0x00,0xB5,0xAF,
+0x28,0x00,0xB4,0xAF,
+0x20,0x00,0xB2,0xAF,
+0x18,0x00,0xB0,0xAF,
+0x25,0x24,0x00,0x0C,
+0x84,0x58,0x56,0x24,
+0x74,0x00,0x40,0x10,
+0x21,0x98,0x40,0x00,
+0x08,0x00,0x50,0x94,
+0x02,0x80,0x02,0x3C,
+0x21,0x28,0x20,0x02,
+0x25,0x80,0x02,0x02,
+0x24,0x00,0x04,0x26,
+0x20,0x00,0x00,0xA6,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x02,0x80,0x05,0x3C,
+0x2A,0x00,0x04,0x26,
+0x18,0x3B,0xA5,0x24,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x02,0x80,0x05,0x3C,
+0x06,0x00,0x06,0x24,
+0x30,0x00,0x04,0x26,
+0x10,0x52,0x00,0x0C,
+0x88,0x58,0xA5,0x24,
+0x20,0x00,0x03,0x96,
+0x02,0x80,0x04,0x3C,
+0x30,0x1F,0x84,0x24,
+0x03,0xFF,0x63,0x30,
+0x50,0x00,0x63,0x34,
+0x20,0x00,0x03,0xA6,
+0xF8,0x1D,0x82,0x94,
+0x20,0x00,0x12,0x26,
+0x74,0x00,0xD1,0x26,
+0xFF,0x0F,0x43,0x30,
+0x00,0x19,0x03,0x00,
+0x01,0x00,0x42,0x24,
+0xF8,0x1D,0x82,0xA4,
+0x02,0x2A,0x03,0x00,
+0x20,0x00,0x02,0x24,
+0x16,0x00,0x43,0xA2,
+0x17,0x00,0x45,0xA2,
+0x21,0x20,0x20,0x02,
+0x17,0x4F,0x00,0x0C,
+0x0C,0x00,0x62,0xAE,
+0x40,0x00,0x12,0x26,
+0x21,0x20,0x40,0x02,
+0x21,0x28,0x40,0x00,
+0x10,0x52,0x00,0x0C,
+0x02,0x00,0x06,0x24,
+0x0C,0x00,0x63,0x8E,
+0x21,0x20,0x20,0x02,
+0x42,0x00,0x12,0x26,
+0x02,0x00,0x63,0x24,
+0x32,0x4F,0x00,0x0C,
+0x0C,0x00,0x63,0xAE,
+0x21,0x28,0x40,0x00,
+0x21,0x20,0x40,0x02,
+0x10,0x52,0x00,0x0C,
+0x02,0x00,0x06,0x24,
+0x0C,0x00,0x63,0x8E,
+0x44,0x00,0x04,0x26,
+0x0C,0x00,0x75,0x26,
+0x02,0x00,0x63,0x24,
+0x0C,0x00,0x63,0xAE,
+0x0C,0x00,0xC6,0x8E,
+0x21,0x28,0x00,0x00,
+0x10,0x00,0xC7,0x26,
+0x60,0x00,0xD0,0x26,
+0x41,0x4F,0x00,0x0C,
+0x10,0x00,0xB5,0xAF,
+0x21,0x20,0x00,0x02,
+0x37,0x50,0x00,0x0C,
+0x21,0x90,0x40,0x00,
+0x09,0x00,0x51,0x2C,
+0x08,0x00,0x06,0x24,
+0x21,0x20,0x40,0x02,
+0x0B,0x30,0x51,0x00,
+0x21,0x38,0x00,0x02,
+0x01,0x00,0x05,0x24,
+0x21,0xA0,0x40,0x00,
+0x41,0x4F,0x00,0x0C,
+0x10,0x00,0xB5,0xAF,
+0x21,0x20,0x40,0x00,
+0x03,0x00,0x05,0x24,
+0x01,0x00,0x06,0x24,
+0x48,0x00,0xC7,0x26,
+0x41,0x4F,0x00,0x0C,
+0x10,0x00,0xB5,0xAF,
+0x0D,0x00,0x20,0x12,
+0x21,0x20,0x60,0x02,
+0x34,0x00,0xBF,0x8F,
+0x30,0x00,0xB6,0x8F,
+0x2C,0x00,0xB5,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x01,0x00,0x05,0x24,
+0x21,0x30,0x00,0x00,
+0xB9,0x0C,0x00,0x08,
+0x38,0x00,0xBD,0x27,
+0xF8,0xFF,0x86,0x26,
+0x21,0x20,0x40,0x00,
+0x68,0x00,0xC7,0x26,
+0x32,0x00,0x05,0x24,
+0x41,0x4F,0x00,0x0C,
+0x10,0x00,0xB5,0xAF,
+0x21,0x20,0x60,0x02,
+0x34,0x00,0xBF,0x8F,
+0x30,0x00,0xB6,0x8F,
+0x2C,0x00,0xB5,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x01,0x00,0x05,0x24,
+0x21,0x30,0x00,0x00,
+0xB9,0x0C,0x00,0x08,
+0x38,0x00,0xBD,0x27,
+0x02,0x80,0x04,0x3C,
+0x02,0x80,0x05,0x3C,
+0x34,0x00,0xBF,0x8F,
+0x30,0x00,0xB6,0x8F,
+0x2C,0x00,0xB5,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x98,0xE0,0x84,0x24,
+0xAC,0xEA,0xA5,0x24,
+0x2F,0x55,0x00,0x08,
+0x38,0x00,0xBD,0x27,
+0xB0,0xFF,0xBD,0x27,
+0x50,0x00,0xA4,0xAF,
+0xFC,0x01,0x04,0x24,
+0x4C,0x00,0xBF,0xAF,
+0x48,0x00,0xBE,0xAF,
+0x44,0x00,0xB7,0xAF,
+0x40,0x00,0xB6,0xAF,
+0x3C,0x00,0xB5,0xAF,
+0x38,0x00,0xB4,0xAF,
+0x34,0x00,0xB3,0xAF,
+0x30,0x00,0xB2,0xAF,
+0x2C,0x00,0xB1,0xAF,
+0x25,0x24,0x00,0x0C,
+0x28,0x00,0xB0,0xAF,
+0xE3,0x00,0x40,0x10,
+0x1C,0x00,0xA2,0xAF,
+0x50,0x00,0xA6,0x8F,
+0x02,0x80,0x03,0x3C,
+0xD0,0xEA,0x62,0x24,
+0xD0,0xEA,0x68,0x90,
+0x01,0x00,0x44,0x90,
+0x02,0x00,0xC3,0x90,
+0x02,0x00,0x45,0x90,
+0x03,0x00,0x46,0x90,
+0x1C,0x00,0xA2,0x8F,
+0x00,0x22,0x04,0x00,
+0x25,0x20,0x88,0x00,
+0x08,0x00,0x47,0x94,
+0x50,0x00,0xA2,0x8F,
+0x00,0x2C,0x05,0x00,
+0x0F,0x00,0x63,0x30,
+0x00,0x00,0x48,0x8C,
+0x02,0x80,0x02,0x3C,
+0x25,0x38,0xE2,0x00,
+0x50,0x00,0xA2,0x8F,
+0x25,0x28,0xA4,0x00,
+0x00,0x36,0x06,0x00,
+0xC0,0x18,0x03,0x00,
+0x21,0x18,0x62,0x00,
+0x25,0x30,0xC5,0x00,
+0x02,0x80,0x02,0x3C,
+0x10,0x00,0xA6,0xAF,
+0xDD,0x5A,0x55,0x24,
+0x22,0x00,0x66,0x24,
+0x18,0x00,0x62,0x24,
+0x28,0x00,0x76,0x24,
+0x02,0x80,0x03,0x3C,
+0x20,0x00,0xF7,0x24,
+0xFF,0x3F,0x1E,0x31,
+0x21,0x90,0x00,0x00,
+0x30,0x1F,0x73,0x24,
+0x01,0x00,0x14,0x24,
+0x21,0x80,0x00,0x00,
+0x24,0x00,0xA6,0xAF,
+0xD0,0x10,0x00,0x08,
+0x20,0x00,0xA2,0xAF,
+0x39,0x52,0x00,0x0C,
+0x07,0x00,0x10,0x26,
+0x19,0x00,0x40,0x10,
+0x40,0x00,0x43,0x2A,
+0x0E,0x00,0x60,0x10,
+0xE8,0xFF,0xC2,0x27,
+0x21,0x88,0x13,0x02,
+0xAC,0x3B,0x22,0x92,
+0x01,0x00,0x52,0x26,
+0x21,0x20,0x15,0x02,
+0x21,0x28,0xC0,0x02,
+0xF4,0xFF,0x54,0x10,
+0x06,0x00,0x06,0x24,
+0x21,0x20,0x15,0x02,
+0x21,0x28,0xC0,0x02,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0xAC,0x3B,0x34,0xA2,
+0xE8,0xFF,0xC2,0x27,
+0x69,0x01,0x43,0x28,
+0x16,0x00,0x60,0x14,
+0x18,0x00,0xA2,0xAF,
+0x02,0x80,0x06,0x3C,
+0x30,0x1F,0xC3,0x24,
+0xA8,0x3B,0x62,0x8C,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xA8,0x3B,0x62,0xAC,
+0x1C,0x00,0xA4,0x8F,
+0x3D,0x24,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x4C,0x00,0xBF,0x8F,
+0x48,0x00,0xBE,0x8F,
+0x44,0x00,0xB7,0x8F,
+0x40,0x00,0xB6,0x8F,
+0x3C,0x00,0xB5,0x8F,
+0x38,0x00,0xB4,0x8F,
+0x34,0x00,0xB3,0x8F,
+0x30,0x00,0xB2,0x8F,
+0x2C,0x00,0xB1,0x8F,
+0x28,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x50,0x00,0xBD,0x27,
+0x21,0x20,0xE0,0x02,
+0x21,0x28,0x00,0x00,
+0xFF,0x51,0x00,0x0C,
+0xDC,0x01,0x06,0x24,
+0x20,0x00,0xA2,0x8F,
+0x74,0x00,0xF4,0x26,
+0x21,0x20,0x80,0x02,
+0x18,0x00,0x45,0x24,
+0x18,0x00,0xA2,0x8F,
+0x80,0x00,0xF1,0x26,
+0x74,0x00,0x42,0x24,
+0x00,0x00,0xE2,0xAE,
+0x18,0x00,0xA3,0x8F,
+0x00,0x00,0x00,0x00,
+0x21,0x30,0x60,0x00,
+0x10,0x52,0x00,0x0C,
+0x70,0x00,0xE3,0xAE,
+0x70,0x00,0xE7,0x8E,
+0x21,0x20,0x20,0x02,
+0x21,0x28,0x00,0x00,
+0xF4,0xFF,0xE7,0x24,
+0x55,0x1D,0x00,0x0C,
+0x18,0x00,0xA6,0x27,
+0xD9,0xFF,0x40,0x10,
+0x21,0x80,0x40,0x00,
+0x02,0x80,0x03,0x3C,
+0x30,0x1F,0x62,0x24,
+0x74,0x3B,0x46,0x8C,
+0x00,0x00,0x00,0x00,
+0x0A,0x00,0xC0,0x18,
+0x00,0x00,0x00,0x00,
+0x18,0x00,0xA2,0x8F,
+0x00,0x00,0x00,0x00,
+0xCF,0xFF,0xC2,0x14,
+0x02,0x80,0x04,0x3C,
+0xA8,0x5A,0x84,0x24,
+0x39,0x52,0x00,0x0C,
+0x02,0x00,0x05,0x26,
+0xCA,0xFF,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x06,0x92,
+0x00,0x00,0x00,0x00,
+0x77,0x00,0xC0,0x14,
+0x10,0x00,0xE4,0x26,
+0x0C,0x00,0xE0,0xAE,
+0x50,0x00,0xA6,0x8F,
+0x00,0x00,0x00,0x00,
+0x02,0x00,0xC2,0x94,
+0x00,0x00,0x00,0x00,
+0x0F,0x00,0x42,0x30,
+0x04,0x00,0x42,0x28,
+0x68,0x00,0x40,0x10,
+0x21,0x20,0xC0,0x00,
+0x34,0x00,0xE0,0xAE,
+0x60,0x00,0xF3,0x26,
+0x21,0x20,0x60,0x02,
+0x21,0x28,0x00,0x00,
+0xFF,0x51,0x00,0x0C,
+0x10,0x00,0x06,0x24,
+0x70,0x00,0xE7,0x8E,
+0x21,0x20,0x20,0x02,
+0x01,0x00,0x05,0x24,
+0xF4,0xFF,0xE7,0x24,
+0x55,0x1D,0x00,0x0C,
+0x18,0x00,0xA6,0x27,
+0x06,0x00,0x40,0x10,
+0x21,0x90,0x00,0x00,
+0x18,0x00,0xA6,0x8F,
+0x02,0x00,0x45,0x24,
+0x10,0x52,0x00,0x0C,
+0x21,0x20,0x60,0x02,
+0x18,0x00,0xB2,0x8F,
+0x70,0x00,0xE7,0x8E,
+0x21,0x20,0x20,0x02,
+0x32,0x00,0x05,0x24,
+0xF4,0xFF,0xE7,0x24,
+0x55,0x1D,0x00,0x0C,
+0x18,0x00,0xA6,0x27,
+0x05,0x00,0x40,0x10,
+0x21,0x20,0xF2,0x02,
+0x18,0x00,0xA6,0x8F,
+0x60,0x00,0x84,0x24,
+0x10,0x52,0x00,0x0C,
+0x02,0x00,0x45,0x24,
+0x18,0x00,0xA5,0x8F,
+0x21,0x20,0x60,0x02,
+0x7D,0x50,0x00,0x0C,
+0x21,0x28,0xB2,0x00,
+0x21,0x18,0x40,0x00,
+0x01,0x00,0x02,0x24,
+0x3F,0x00,0x62,0x10,
+0x03,0x00,0x02,0x24,
+0x38,0x00,0xE2,0xAE,
+0x70,0x00,0xE7,0x8E,
+0x21,0x20,0x20,0x02,
+0x03,0x00,0x05,0x24,
+0xF4,0xFF,0xE7,0x24,
+0x55,0x1D,0x00,0x0C,
+0x18,0x00,0xA6,0x27,
+0x48,0x00,0xE0,0xAE,
+0x04,0x00,0x40,0x10,
+0x3C,0x00,0xE0,0xAE,
+0x02,0x00,0x42,0x90,
+0x00,0x00,0x00,0x00,
+0x48,0x00,0xE2,0xAE,
+0x17,0x4F,0x00,0x0C,
+0x21,0x20,0x80,0x02,
+0x21,0x28,0x40,0x00,
+0x40,0x00,0xE4,0x26,
+0x10,0x52,0x00,0x0C,
+0x02,0x00,0x06,0x24,
+0x34,0x4F,0x00,0x0C,
+0x21,0x20,0xE0,0x02,
+0xFF,0xFF,0x50,0x30,
+0x01,0x00,0x02,0x32,
+0x22,0x00,0x40,0x10,
+0x21,0x28,0xC0,0x02,
+0x01,0x00,0x02,0x24,
+0x5C,0x00,0xE2,0xAE,
+0x24,0x00,0xA5,0x8F,
+0x04,0x00,0xE4,0x26,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x10,0x00,0x02,0x32,
+0x1B,0x00,0x40,0x10,
+0x01,0x00,0x02,0x24,
+0x30,0x00,0xE2,0xAE,
+0x02,0x80,0x02,0x3C,
+0x44,0x00,0xE0,0xAE,
+0x30,0x1F,0x44,0x24,
+0xA4,0x3B,0x82,0x8C,
+0x1C,0x00,0xA6,0x8F,
+0xDC,0x01,0x03,0x24,
+0x01,0x00,0x42,0x24,
+0xA4,0x3B,0x82,0xAC,
+0x08,0x00,0x02,0x24,
+0x0C,0x00,0xC3,0xAC,
+0x14,0x00,0xC2,0xAC,
+0x1C,0x00,0xA4,0x8F,
+0x30,0x09,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xE9,0x10,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x04,0x3C,
+0x02,0x80,0x05,0x3C,
+0xA4,0xE0,0x84,0x24,
+0x2F,0x55,0x00,0x0C,
+0xBC,0xEA,0xA5,0x24,
+0xE9,0x10,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x6D,0x11,0x00,0x08,
+0x5C,0x00,0xE0,0xAE,
+0x74,0x11,0x00,0x08,
+0x30,0x00,0xE0,0xAE,
+0x52,0x11,0x00,0x08,
+0x38,0x00,0xE3,0xAE,
+0xF7,0x19,0x00,0x0C,
+0x18,0x00,0xC5,0x24,
+0x4C,0x1A,0x00,0x0C,
+0x21,0x20,0x40,0x00,
+0x2B,0x11,0x00,0x08,
+0x34,0x00,0xE2,0xAE,
+0x10,0x52,0x00,0x0C,
+0x02,0x00,0x05,0x26,
+0x01,0x00,0x03,0x92,
+0x22,0x11,0x00,0x08,
+0x0C,0x00,0xE3,0xAE,
+0x02,0x80,0x04,0x3C,
+0x84,0x58,0x84,0x24,
+0xE0,0xFF,0xBD,0x27,
+0x18,0x00,0xBF,0xAF,
+0x17,0x4F,0x00,0x0C,
+0x74,0x00,0x84,0x24,
+0x21,0x28,0x40,0x00,
+0x10,0x00,0xA4,0x27,
+0x10,0x52,0x00,0x0C,
+0x02,0x00,0x06,0x24,
+0x10,0x00,0xA2,0x97,
+0x25,0xB0,0x04,0x3C,
+0x94,0x00,0x85,0x34,
+0x9A,0x00,0x87,0x34,
+0x26,0xB0,0x06,0x3C,
+0x00,0x08,0x03,0x24,
+0x00,0x00,0xA2,0xA4,
+0x0A,0x00,0x0B,0x24,
+0x00,0x00,0xE3,0xA4,
+0x98,0x00,0x88,0x34,
+0x96,0x00,0x89,0x34,
+0x7A,0x00,0xCA,0x34,
+0x50,0x00,0x02,0x24,
+0x04,0x00,0x03,0x24,
+0x00,0x00,0x02,0xA5,
+0x00,0x00,0x2B,0xA5,
+0x00,0x00,0x43,0xA1,
+0x10,0x00,0xA2,0x97,
+0x89,0x00,0x83,0x34,
+0x14,0x00,0x07,0x24,
+0x40,0x11,0x02,0x00,
+0xA0,0xFF,0x42,0x24,
+0xFF,0xFF,0x42,0x30,
+0x9C,0x00,0x85,0x34,
+0x7C,0x00,0xC6,0x34,
+0x00,0x00,0xC2,0xA4,
+0x44,0x00,0x84,0x34,
+0x00,0x00,0x67,0xA0,
+0x00,0x00,0xAB,0xA0,
+0x00,0x00,0x82,0x94,
+0xFF,0xFD,0x03,0x24,
+0x18,0x00,0xBF,0x8F,
+0x24,0x10,0x43,0x00,
+0x00,0x00,0x82,0xA4,
+0x00,0x00,0x83,0x94,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x42,0x24,
+0x00,0x02,0x63,0x34,
+0x20,0x00,0xBD,0x27,
+0x8E,0x3E,0x40,0xA0,
+0x00,0x00,0x83,0xA4,
+0x08,0x00,0xE0,0x03,
+0x0C,0x3E,0x47,0xA0,
+0xD8,0xFF,0xBD,0x27,
+0x10,0x00,0xB0,0xAF,
+0x02,0x80,0x10,0x3C,
+0x84,0x58,0x04,0x26,
+0x24,0x00,0xBF,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x20,0x00,0xB4,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x34,0x4F,0x00,0x0C,
+0x18,0x00,0xB2,0xAF,
+0xFF,0xFF,0x51,0x30,
+0x84,0x58,0x04,0x26,
+0x19,0x4F,0x00,0x0C,
+0x02,0x80,0x10,0x3C,
+0x30,0x1F,0x03,0x26,
+0x01,0x00,0x24,0x32,
+0x08,0x3E,0x62,0xA4,
+0x03,0x00,0x80,0x14,
+0x02,0x00,0x05,0x24,
+0x40,0x10,0x11,0x00,
+0x04,0x00,0x45,0x30,
+0x02,0x00,0x02,0x24,
+0x59,0x00,0xA2,0x10,
+0x30,0x1F,0x02,0x26,
+0x0F,0x00,0x80,0x10,
+0x02,0x00,0x03,0x24,
+0x04,0x00,0x02,0x24,
+0x11,0x00,0x62,0x10,
+0x30,0x1F,0x13,0x26,
+0x02,0x80,0x04,0x3C,
+0x21,0x28,0x20,0x02,
+0x24,0x00,0xBF,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x18,0xE1,0x84,0x24,
+0x2F,0x55,0x00,0x08,
+0x28,0x00,0xBD,0x27,
+0x40,0x10,0x11,0x00,
+0x04,0x00,0x43,0x30,
+0x04,0x00,0x02,0x24,
+0xF1,0xFF,0x62,0x14,
+0x30,0x1F,0x13,0x26,
+0x08,0x3E,0x66,0x96,
+0x30,0x3B,0x65,0x92,
+0x02,0x80,0x04,0x3C,
+0xB0,0x1B,0x63,0xA6,
+0xD4,0xE0,0x84,0x24,
+0x2F,0x55,0x00,0x0C,
+0x25,0xB0,0x10,0x3C,
+0x50,0x02,0x03,0x36,
+0x0F,0x00,0x02,0x24,
+0x00,0x00,0x62,0xA0,
+0x21,0x28,0x00,0x00,
+0x12,0x0D,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0x30,0x3B,0x64,0x92,
+0x01,0x00,0x14,0x24,
+0x4F,0x0C,0x00,0x0C,
+0x4C,0x00,0x10,0x36,
+0x02,0x80,0x11,0x3C,
+0x00,0x00,0x14,0xA2,
+0x21,0x0E,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x37,0x50,0x00,0x0C,
+0xE4,0x58,0x24,0x26,
+0x21,0x28,0x40,0x00,
+0xE4,0x58,0x24,0x26,
+0x7D,0x50,0x00,0x0C,
+0x21,0x90,0x40,0x00,
+0x0F,0x00,0x50,0x30,
+0xE4,0x58,0x24,0x26,
+0x96,0x50,0x00,0x0C,
+0x21,0x28,0x40,0x02,
+0x40,0x02,0x10,0x36,
+0x02,0x80,0x04,0x3C,
+0x21,0x88,0x40,0x00,
+0x21,0x30,0x40,0x00,
+0x21,0x28,0x00,0x02,
+0x2F,0x55,0x00,0x0C,
+0x04,0xE1,0x84,0x24,
+0x21,0x20,0x00,0x02,
+0xC1,0x5B,0x00,0x0C,
+0x21,0x28,0x20,0x02,
+0x02,0x80,0x04,0x3C,
+0x02,0x80,0x05,0x3C,
+0xF3,0x3D,0x84,0x24,
+0x88,0x58,0xA5,0x24,
+0x06,0x00,0x06,0x24,
+0x10,0x52,0x00,0x0C,
+0xC2,0x1E,0x74,0xA2,
+0x0F,0x48,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x9C,0x11,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xB0,0x1B,0x62,0x96,
+0x00,0x00,0x00,0x00,
+0x00,0x01,0x42,0x34,
+0x53,0x1E,0x00,0x0C,
+0xB0,0x1B,0x62,0xA6,
+0xEC,0x38,0x62,0xAE,
+0x24,0x00,0xBF,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x01,0x00,0x04,0x24,
+0x48,0x0E,0x00,0x08,
+0x28,0x00,0xBD,0x27,
+0x78,0x3D,0x44,0x8C,
+0x01,0x20,0x03,0x24,
+0xB0,0x1B,0x43,0xA4,
+0x02,0x00,0x85,0x10,
+0x0C,0x00,0x03,0x24,
+0x0F,0x00,0x03,0x24,
+0x25,0xB0,0x02,0x3C,
+0x50,0x02,0x42,0x34,
+0x00,0x00,0x43,0xA0,
+0x30,0x1F,0x10,0x26,
+0xB0,0x1B,0x02,0x96,
+0x08,0x3E,0x06,0x96,
+0x30,0x3B,0x05,0x92,
+0x10,0x00,0x42,0x34,
+0x02,0x80,0x04,0x3C,
+0xB0,0x1B,0x02,0xA6,
+0x2F,0x55,0x00,0x0C,
+0xB0,0xE0,0x84,0x24,
+0x21,0x28,0x00,0x00,
+0x12,0x0D,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0x30,0x3B,0x04,0x92,
+0x4F,0x0C,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x53,0x1E,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xEC,0x38,0x02,0xAE,
+0x24,0x00,0xBF,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0x02,0x80,0x03,0x3C,
+0x30,0x1F,0x65,0x24,
+0x50,0x3E,0xA2,0x8C,
+0x00,0x00,0x00,0x00,
+0x1F,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x0A,0x3E,0xA2,0x90,
+0x00,0x00,0x00,0x00,
+0x07,0x00,0x42,0x2C,
+0x1A,0x00,0x40,0x10,
+0x21,0x38,0xA0,0x00,
+0x98,0x3E,0xA4,0x8C,
+0x94,0x3E,0xA5,0x8C,
+0x21,0x30,0x00,0x00,
+0x80,0x10,0x04,0x00,
+0x80,0x18,0x05,0x00,
+0x2B,0x10,0x45,0x00,
+0x04,0x00,0x40,0x14,
+0x2B,0x18,0x64,0x00,
+0x01,0x00,0x06,0x24,
+0x02,0x00,0x02,0x24,
+0x0A,0x30,0x43,0x00,
+0x0A,0x3E,0xE2,0x90,
+0x94,0x3E,0xE0,0xAC,
+0x98,0x3E,0xE0,0xAC,
+0x40,0x18,0x02,0x00,
+0x21,0x18,0x62,0x00,
+0x21,0x18,0x66,0x00,
+0x02,0x80,0x02,0x3C,
+0x48,0xDD,0x42,0x24,
+0x80,0x18,0x03,0x00,
+0x21,0x18,0x62,0x00,
+0x00,0x00,0x64,0x8C,
+0x25,0xB0,0x02,0x3C,
+0xD8,0x01,0x42,0x34,
+0x00,0x00,0x44,0xAC,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xE8,0xFF,0xBD,0x27,
+0x10,0x00,0xB0,0xAF,
+0x14,0x00,0xBF,0xAF,
+0x21,0x80,0x80,0x00,
+0x02,0x00,0x84,0x90,
+0x02,0x80,0x05,0x3C,
+0x18,0x3B,0xA5,0x24,
+0x0F,0x00,0x84,0x30,
+0xC0,0x20,0x04,0x00,
+0x21,0x20,0x90,0x00,
+0x1C,0x00,0x84,0x24,
+0x39,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x06,0x00,0x40,0x10,
+0x21,0x20,0x00,0x02,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x92,0x10,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x80,0xFF,0xBD,0x27,
+0x02,0x80,0x06,0x3C,
+0x02,0x80,0x08,0x3C,
+0x78,0x00,0xBE,0xAF,
+0x7C,0x00,0xBF,0xAF,
+0x74,0x00,0xB7,0xAF,
+0x70,0x00,0xB6,0xAF,
+0x6C,0x00,0xB5,0xAF,
+0x68,0x00,0xB4,0xAF,
+0x64,0x00,0xB3,0xAF,
+0x60,0x00,0xB2,0xAF,
+0x5C,0x00,0xB1,0xAF,
+0x58,0x00,0xB0,0xAF,
+0xD0,0xEA,0xC2,0x24,
+0xE4,0xEA,0x03,0x25,
+0x01,0x00,0x44,0x90,
+0x01,0x00,0x65,0x90,
+0xD0,0xEA,0xCB,0x90,
+0xE4,0xEA,0x0A,0x91,
+0x02,0x00,0x47,0x90,
+0x02,0x00,0x66,0x90,
+0x03,0x00,0x48,0x90,
+0x03,0x00,0x69,0x90,
+0x00,0x22,0x04,0x00,
+0x00,0x2A,0x05,0x00,
+0x25,0x20,0x8B,0x00,
+0x25,0x28,0xAA,0x00,
+0x00,0x3C,0x07,0x00,
+0x00,0x34,0x06,0x00,
+0x25,0x38,0xE4,0x00,
+0x25,0x30,0xC5,0x00,
+0x00,0x46,0x08,0x00,
+0x00,0x4E,0x09,0x00,
+0x25,0x40,0x07,0x01,
+0x25,0x48,0x26,0x01,
+0x00,0x02,0x04,0x24,
+0x40,0x00,0xA8,0xAF,
+0x25,0x24,0x00,0x0C,
+0x48,0x00,0xA9,0xAF,
+0xB0,0x01,0x40,0x10,
+0x21,0xF0,0x40,0x00,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x52,0x24,
+0xC4,0x39,0x45,0x8E,
+0x02,0x80,0x04,0x3C,
+0x2F,0x55,0x00,0x0C,
+0x34,0xE1,0x84,0x24,
+0x08,0x00,0xD1,0x97,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x10,0x3C,
+0x25,0x88,0x22,0x02,
+0x88,0x58,0x10,0x26,
+0x24,0x00,0x24,0x26,
+0x21,0x28,0x00,0x02,
+0x20,0x00,0x20,0xA6,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x02,0x80,0x05,0x3C,
+0x2A,0x00,0x24,0x26,
+0x18,0x3B,0xA5,0x24,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x21,0x28,0x00,0x02,
+0x06,0x00,0x06,0x24,
+0x10,0x52,0x00,0x0C,
+0x30,0x00,0x24,0x26,
+0x18,0x00,0x03,0x24,
+0x0C,0x00,0xC3,0xAF,
+0xF8,0x1D,0x42,0x96,
+0x20,0x00,0x25,0x26,
+0x38,0x00,0x37,0x26,
+0xFF,0x0F,0x43,0x30,
+0x00,0x19,0x03,0x00,
+0x02,0x22,0x03,0x00,
+0x01,0x00,0x42,0x24,
+0xF8,0x1D,0x42,0xA6,
+0x17,0x00,0xA4,0xA0,
+0x02,0x80,0x04,0x3C,
+0x16,0x00,0xA3,0xA0,
+0x32,0x4F,0x00,0x0C,
+0xF8,0x58,0x84,0x24,
+0x21,0x28,0x40,0x00,
+0x21,0x20,0xE0,0x02,
+0x10,0x52,0x00,0x0C,
+0x02,0x00,0x06,0x24,
+0x3A,0x00,0x24,0x26,
+0x18,0x00,0xA5,0x27,
+0x02,0x00,0x06,0x24,
+0x03,0x00,0x02,0x24,
+0x10,0x52,0x00,0x0C,
+0x18,0x00,0xA2,0xA7,
+0x0C,0x00,0xC3,0x8F,
+0x02,0x80,0x07,0x3C,
+0x3C,0x00,0x24,0x26,
+0x04,0x00,0x63,0x24,
+0x0C,0x00,0xC3,0xAF,
+0x60,0x39,0x46,0x8E,
+0x0C,0x00,0xC2,0x27,
+0x94,0x58,0xE7,0x24,
+0x21,0x28,0x00,0x00,
+0x54,0x00,0xA2,0xAF,
+0x41,0x4F,0x00,0x0C,
+0x10,0x00,0xA2,0xAF,
+0x20,0x00,0xA4,0x27,
+0x50,0x00,0xA5,0x27,
+0x21,0x50,0x00,0x0C,
+0x21,0xB8,0x40,0x00,
+0x50,0x00,0xA8,0x8F,
+0x21,0x88,0x00,0x00,
+0x52,0x00,0x00,0x11,
+0x21,0x80,0x00,0x00,
+0x21,0x38,0x40,0x02,
+0x18,0x00,0xA9,0x27,
+0x21,0x10,0x31,0x01,
+0x08,0x00,0x46,0x90,
+0x21,0x20,0x00,0x00,
+0x7F,0x00,0xC5,0x30,
+0x21,0x10,0x87,0x00,
+0xB4,0x39,0x43,0x90,
+0x01,0x00,0x84,0x24,
+0x7F,0x00,0x63,0x30,
+0x3D,0x00,0xA3,0x10,
+0x0D,0x00,0x82,0x2C,
+0xFA,0xFF,0x40,0x14,
+0x21,0x10,0x87,0x00,
+0x01,0x00,0x31,0x26,
+0x2B,0x10,0x28,0x02,
+0xF2,0xFF,0x40,0x14,
+0x21,0x10,0x31,0x01,
+0x09,0x00,0x02,0x2E,
+0x3D,0x00,0x40,0x14,
+0x21,0x20,0xE0,0x02,
+0x54,0x00,0xA2,0x8F,
+0x01,0x00,0x05,0x24,
+0x08,0x00,0x06,0x24,
+0x30,0x00,0xA7,0x27,
+0x41,0x4F,0x00,0x0C,
+0x10,0x00,0xA2,0xAF,
+0x21,0x20,0x40,0x00,
+0x54,0x00,0xA2,0x8F,
+0xF8,0xFF,0x06,0x26,
+0x32,0x00,0x05,0x24,
+0x38,0x00,0xA7,0x27,
+0x41,0x4F,0x00,0x0C,
+0x10,0x00,0xA2,0xAF,
+0x21,0xB8,0x40,0x00,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x44,0x24,
+0x78,0x3D,0x83,0x8C,
+0x02,0x00,0x02,0x24,
+0x37,0x00,0x62,0x14,
+0x00,0x00,0x00,0x00,
+0xC4,0x39,0x83,0x8C,
+0x0C,0x00,0x11,0x24,
+0x2B,0x10,0x23,0x02,
+0x32,0x00,0x40,0x10,
+0x02,0x80,0x02,0x3C,
+0xF8,0x58,0x46,0x24,
+0x21,0x20,0x60,0x00,
+0x4D,0x13,0x00,0x08,
+0x30,0x00,0x05,0x24,
+0x01,0x00,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x21,0x10,0x51,0x00,
+0x02,0x00,0x51,0x24,
+0x2B,0x18,0x24,0x02,
+0x27,0x00,0x60,0x10,
+0x00,0x00,0x00,0x00,
+0x21,0x18,0x26,0x02,
+0x00,0x00,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0xF5,0xFF,0x45,0x14,
+0x02,0x80,0x07,0x3C,
+0x01,0x00,0x66,0x90,
+0x54,0x00,0xA2,0x8F,
+0xFA,0x58,0xE7,0x24,
+0x21,0x20,0xE0,0x02,
+0x21,0x38,0x27,0x02,
+0x30,0x00,0x05,0x24,
+0x41,0x4F,0x00,0x0C,
+0x10,0x00,0xA2,0xAF,
+0x73,0x13,0x00,0x08,
+0x21,0xB8,0x40,0x00,
+0x21,0x10,0x30,0x01,
+0x18,0x00,0x46,0xA0,
+0x50,0x00,0xA8,0x8F,
+0x01,0x00,0x31,0x26,
+0x2B,0x10,0x28,0x02,
+0xB4,0xFF,0x40,0x14,
+0x01,0x00,0x10,0x26,
+0x27,0x13,0x00,0x08,
+0x09,0x00,0x02,0x2E,
+0x54,0x00,0xA2,0x8F,
+0x21,0x20,0xE0,0x02,
+0x21,0x30,0x00,0x02,
+0x01,0x00,0x05,0x24,
+0x30,0x00,0xA7,0x27,
+0x41,0x4F,0x00,0x0C,
+0x10,0x00,0xA2,0xAF,
+0x21,0xB8,0x40,0x00,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x44,0x24,
+0x78,0x3D,0x83,0x8C,
+0x02,0x00,0x02,0x24,
+0xCB,0xFF,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0xD5,0x1D,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x16,0x00,0x40,0x14,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x43,0x24,
+0xC4,0x39,0x62,0x8C,
+0x0C,0x00,0x11,0x24,
+0x2B,0x10,0x22,0x02,
+0x10,0x00,0x40,0x10,
+0x02,0x80,0x02,0x3C,
+0xF8,0x58,0x52,0x24,
+0x21,0x80,0x60,0x00,
+0x02,0x80,0x13,0x3C,
+0x21,0x20,0x32,0x02,
+0x00,0x00,0x83,0x90,
+0x2D,0x00,0x02,0x24,
+0xCB,0x00,0x62,0x10,
+0x02,0x80,0x05,0x3C,
+0x01,0x00,0x82,0x90,
+0xC4,0x39,0x03,0x8E,
+0x21,0x10,0x51,0x00,
+0x02,0x00,0x51,0x24,
+0x2B,0x18,0x23,0x02,
+0xF6,0xFF,0x60,0x14,
+0x21,0x20,0x32,0x02,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x44,0x24,
+0x78,0x3D,0x83,0x8C,
+0x02,0x00,0x02,0x24,
+0x82,0x00,0x62,0x10,
+0x0C,0x00,0x11,0x24,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x43,0x24,
+0xC4,0x39,0x62,0x8C,
+0x0C,0x00,0x11,0x24,
+0x2B,0x10,0x22,0x02,
+0x26,0x00,0x40,0x10,
+0x02,0x80,0x02,0x3C,
+0xF8,0x58,0x56,0x24,
+0x21,0xA8,0x60,0x00,
+0xDD,0x00,0x14,0x24,
+0xA5,0x13,0x00,0x08,
+0x02,0x80,0x13,0x3C,
+0x01,0x00,0x02,0x92,
+0xC4,0x39,0xA3,0x8E,
+0x21,0x10,0x51,0x00,
+0x02,0x00,0x51,0x24,
+0x2B,0x18,0x23,0x02,
+0x1B,0x00,0x60,0x10,
+0x02,0x80,0x02,0x3C,
+0x21,0x80,0x36,0x02,
+0x00,0x00,0x02,0x92,
+0x02,0x00,0x12,0x26,
+0x21,0x20,0x40,0x02,
+0xD0,0xDD,0x65,0x26,
+0xF3,0xFF,0x54,0x14,
+0x06,0x00,0x06,0x24,
+0x39,0x52,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xEF,0xFF,0x40,0x14,
+0x21,0x20,0xE0,0x02,
+0x54,0x00,0xA2,0x8F,
+0xDD,0x00,0x05,0x24,
+0x21,0x38,0x40,0x02,
+0x07,0x00,0x06,0x24,
+0x41,0x4F,0x00,0x0C,
+0x10,0x00,0xA2,0xAF,
+0x08,0x00,0x04,0x92,
+0x21,0xB8,0x40,0x00,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x45,0x24,
+0x01,0x00,0x03,0x24,
+0x02,0x80,0x02,0x3C,
+0x0F,0x5F,0x44,0xA0,
+0x10,0x3E,0xA3,0xAC,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x44,0x24,
+0xC4,0x39,0x82,0x8C,
+0x0C,0x00,0x11,0x24,
+0x2B,0x10,0x22,0x02,
+0x20,0x00,0x40,0x10,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0xF8,0x58,0x56,0x24,
+0xFA,0x58,0x75,0x24,
+0x21,0xA0,0x80,0x00,
+0xD2,0x13,0x00,0x08,
+0xDD,0x00,0x13,0x24,
+0x01,0x00,0x02,0x92,
+0xC4,0x39,0x83,0x8E,
+0x21,0x10,0x51,0x00,
+0x02,0x00,0x51,0x24,
+0x2B,0x18,0x23,0x02,
+0x14,0x00,0x60,0x10,
+0x02,0x80,0x02,0x3C,
+0x21,0x80,0x36,0x02,
+0x00,0x00,0x02,0x92,
+0x21,0x90,0x35,0x02,
+0x21,0x20,0x40,0x02,
+0x48,0x00,0xA5,0x27,
+0xF3,0xFF,0x53,0x14,
+0x04,0x00,0x06,0x24,
+0x39,0x52,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xEF,0xFF,0x40,0x14,
+0x21,0x20,0xE0,0x02,
+0x01,0x00,0x06,0x92,
+0x54,0x00,0xA2,0x8F,
+0x21,0x38,0x40,0x02,
+0xDD,0x00,0x05,0x24,
+0x41,0x4F,0x00,0x0C,
+0x10,0x00,0xA2,0xAF,
+0x21,0xB8,0x40,0x00,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x50,0x24,
+0x0A,0x3E,0x02,0x92,
+0x50,0x3E,0x03,0x8E,
+0x05,0x00,0x42,0x38,
+0x01,0x00,0x63,0x38,
+0x01,0x00,0x42,0x2C,
+0x01,0x00,0x63,0x2C,
+0x24,0x10,0x43,0x00,
+0x58,0x00,0x40,0x14,
+0x02,0x80,0x07,0x3C,
+0xC4,0x39,0x05,0x8E,
+0x0C,0x00,0x11,0x24,
+0x2B,0x10,0x25,0x02,
+0x0F,0x00,0x40,0x10,
+0x02,0x80,0x02,0x3C,
+0xF8,0x58,0x46,0x24,
+0x44,0x00,0x04,0x24,
+0x21,0x80,0x26,0x02,
+0x00,0x00,0x02,0x92,
+0x00,0x00,0x00,0x00,
+0x3E,0x00,0x44,0x10,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x02,0x92,
+0x00,0x00,0x00,0x00,
+0x21,0x10,0x51,0x00,
+0x02,0x00,0x51,0x24,
+0x2B,0x18,0x25,0x02,
+0xF6,0xFF,0x60,0x14,
+0x21,0x80,0x26,0x02,
+0x21,0x20,0xC0,0x03,
+0x21,0x28,0x00,0x00,
+0xB9,0x0C,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x21,0x10,0x00,0x00,
+0x7C,0x00,0xBF,0x8F,
+0x78,0x00,0xBE,0x8F,
+0x74,0x00,0xB7,0x8F,
+0x70,0x00,0xB6,0x8F,
+0x6C,0x00,0xB5,0x8F,
+0x68,0x00,0xB4,0x8F,
+0x64,0x00,0xB3,0x8F,
+0x60,0x00,0xB2,0x8F,
+0x5C,0x00,0xB1,0x8F,
+0x58,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x80,0x00,0xBD,0x27,
+0xC4,0x39,0x82,0x8C,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x22,0x02,
+0x7B,0xFF,0x40,0x10,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0xF8,0x58,0x56,0x24,
+0xFA,0x58,0x75,0x24,
+0x21,0xA0,0x80,0x00,
+0x25,0x14,0x00,0x08,
+0xDD,0x00,0x13,0x24,
+0x01,0x00,0x02,0x92,
+0xC4,0x39,0x83,0x8E,
+0x21,0x10,0x51,0x00,
+0x02,0x00,0x51,0x24,
+0x2B,0x18,0x23,0x02,
+0x6F,0xFF,0x60,0x10,
+0x02,0x80,0x02,0x3C,
+0x21,0x80,0x36,0x02,
+0x00,0x00,0x02,0x92,
+0x21,0x90,0x35,0x02,
+0x21,0x20,0x40,0x02,
+0x40,0x00,0xA5,0x27,
+0xF3,0xFF,0x53,0x14,
+0x04,0x00,0x06,0x24,
+0x39,0x52,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xEF,0xFF,0x40,0x14,
+0x21,0x20,0xE0,0x02,
+0x01,0x00,0x06,0x92,
+0x54,0x00,0xA2,0x8F,
+0x21,0x38,0x40,0x02,
+0xDD,0x00,0x05,0x24,
+0x41,0x4F,0x00,0x0C,
+0x10,0x00,0xA2,0xAF,
+0x92,0x13,0x00,0x08,
+0x21,0xB8,0x40,0x00,
+0x02,0x80,0x04,0x3C,
+0x2F,0x55,0x00,0x0C,
+0x48,0xE1,0x84,0x24,
+0x01,0x00,0x06,0x92,
+0x54,0x00,0xA2,0x8F,
+0x02,0x80,0x07,0x3C,
+0xFA,0x58,0xE7,0x24,
+0x21,0x38,0x27,0x02,
+0x21,0x20,0xE0,0x02,
+0x44,0x00,0x05,0x24,
+0x41,0x4F,0x00,0x0C,
+0x10,0x00,0xA2,0xAF,
+0x03,0x14,0x00,0x08,
+0x21,0x20,0xC0,0x03,
+0x54,0x00,0xA2,0x8F,
+0x21,0x20,0xE0,0x02,
+0x9C,0xDD,0xE7,0x24,
+0xDD,0x00,0x05,0x24,
+0x06,0x00,0x06,0x24,
+0x41,0x4F,0x00,0x0C,
+0x10,0x00,0xA2,0xAF,
+0xEF,0x13,0x00,0x08,
+0x21,0xB8,0x40,0x00,
+0x02,0x80,0x14,0x3C,
+0xFA,0x58,0xA5,0x24,
+0x21,0x28,0x25,0x02,
+0x88,0x5D,0x84,0x26,
+0x10,0x52,0x00,0x0C,
+0x20,0x00,0x06,0x24,
+0x02,0x80,0x03,0x3C,
+0xF1,0x5D,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x1D,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x58,0x3E,0x02,0x96,
+0x00,0x00,0x00,0x00,
+0xBD,0xFF,0x42,0x30,
+0x58,0x3E,0x02,0xA6,
+0x02,0x80,0x02,0x3C,
+0x58,0x3E,0x03,0x96,
+0xDE,0x5D,0x44,0x90,
+0x0C,0x00,0x63,0x34,
+0x01,0x00,0x84,0x30,
+0x15,0x00,0x80,0x10,
+0x58,0x3E,0x03,0xA6,
+0x02,0x80,0x05,0x3C,
+0x8B,0x5D,0x64,0x26,
+0x3C,0xE3,0xA5,0x24,
+0x10,0x52,0x00,0x0C,
+0x10,0x00,0x06,0x24,
+0x21,0x10,0x32,0x02,
+0x01,0x00,0x46,0x90,
+0x54,0x00,0xA2,0x8F,
+0x21,0x20,0xE0,0x02,
+0x88,0x5D,0x87,0x26,
+0x2D,0x00,0x05,0x24,
+0x41,0x4F,0x00,0x0C,
+0x10,0x00,0xA2,0xAF,
+0x21,0xB8,0x40,0x00,
+0x01,0x00,0x02,0x24,
+0x8C,0x13,0x00,0x08,
+0x50,0x3E,0x02,0xAE,
+0x58,0x3E,0x02,0x96,
+0x5D,0x14,0x00,0x08,
+0x02,0x00,0x42,0x34,
+0x02,0x80,0x05,0x3C,
+0x8B,0x5D,0x64,0x26,
+0x68,0x14,0x00,0x08,
+0x4C,0xE3,0xA5,0x24,
+0x02,0x80,0x04,0x3C,
+0x02,0x80,0x05,0x3C,
+0x28,0xE1,0x84,0x24,
+0x2F,0x55,0x00,0x0C,
+0xD4,0xEA,0xA5,0x24,
+0x07,0x14,0x00,0x08,
+0xFF,0xFF,0x02,0x24,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x42,0x24,
+0xB0,0x1B,0x43,0x94,
+0xC8,0x00,0x04,0x24,
+0xD0,0x38,0x44,0xAC,
+0x9F,0xFE,0x63,0x30,
+0x80,0x00,0x63,0x34,
+0xB0,0x1B,0x43,0xA4,
+0x6C,0x3D,0x40,0xAC,
+0x70,0x3D,0x40,0xAC,
+0xA5,0x12,0x00,0x08,
+0xB4,0x38,0x40,0xAC,
+0xD8,0xFF,0xBD,0x27,
+0x28,0x00,0xA4,0xA3,
+0x00,0x01,0x04,0x24,
+0x18,0x00,0xB2,0xAF,
+0x20,0x00,0xBF,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x2C,0x00,0xA5,0xA3,
+0x25,0x24,0x00,0x0C,
+0x30,0x00,0xA6,0xA7,
+0x94,0x00,0x40,0x10,
+0x21,0x90,0x40,0x00,
+0x30,0x00,0xA7,0x97,
+0x28,0x00,0xA5,0x93,
+0x2C,0x00,0xA6,0x93,
+0x02,0x80,0x04,0x3C,
+0x2F,0x55,0x00,0x0C,
+0x68,0xE1,0x84,0x24,
+0x08,0x00,0x50,0x96,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x11,0x3C,
+0x25,0x80,0x02,0x02,
+0x88,0x58,0x31,0x26,
+0x21,0x28,0x20,0x02,
+0x24,0x00,0x04,0x26,
+0x06,0x00,0x06,0x24,
+0x10,0x52,0x00,0x0C,
+0x20,0x00,0x00,0xA6,
+0x02,0x80,0x05,0x3C,
+0x18,0x3B,0xA5,0x24,
+0x2A,0x00,0x04,0x26,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x21,0x28,0x20,0x02,
+0x30,0x00,0x04,0x26,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x20,0x00,0x03,0x96,
+0x18,0x00,0x02,0x24,
+0x20,0x00,0x05,0x26,
+0x03,0xFF,0x63,0x30,
+0xD0,0x00,0x63,0x34,
+0x20,0x00,0x03,0xA6,
+0x02,0x80,0x03,0x3C,
+0x0C,0x00,0x42,0xAE,
+0x30,0x1F,0x73,0x24,
+0xF8,0x1D,0x62,0x96,
+0x0C,0x00,0x51,0x26,
+0x28,0x00,0xA6,0x27,
+0xFF,0x0F,0x43,0x30,
+0x00,0x19,0x03,0x00,
+0x02,0x22,0x03,0x00,
+0x01,0x00,0x42,0x24,
+0xF8,0x1D,0x62,0xA6,
+0x21,0x38,0x20,0x02,
+0x16,0x00,0xA3,0xA0,
+0x17,0x00,0xA4,0xA0,
+0x38,0x00,0x04,0x26,
+0x68,0x4F,0x00,0x0C,
+0x01,0x00,0x05,0x24,
+0x21,0x20,0x40,0x00,
+0x01,0x00,0x05,0x24,
+0x2C,0x00,0xA6,0x27,
+0x68,0x4F,0x00,0x0C,
+0x21,0x38,0x20,0x02,
+0x28,0x00,0xA3,0x93,
+0x21,0x20,0x40,0x00,
+0x03,0x00,0x02,0x24,
+0x0C,0x00,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0x21,0x20,0x40,0x02,
+0x21,0x28,0x00,0x00,
+0xB9,0x0C,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x20,0x00,0xBF,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0x2C,0x00,0xA3,0x93,
+0x00,0x00,0x00,0x00,
+0x2E,0x00,0x60,0x14,
+0x01,0x00,0x02,0x24,
+0x19,0x3E,0x63,0x92,
+0x21,0x80,0x60,0x02,
+0x01,0x00,0x68,0x24,
+0xFF,0x00,0x02,0x31,
+0xFD,0xFF,0x40,0x10,
+0x21,0x18,0x00,0x01,
+0x02,0x80,0x06,0x3C,
+0x19,0x3E,0x08,0xA2,
+0x21,0x38,0x20,0x02,
+0x49,0x5D,0xC6,0x24,
+0x68,0x4F,0x00,0x0C,
+0x01,0x00,0x05,0x24,
+0x30,0x00,0xA3,0x97,
+0x02,0x80,0x06,0x3C,
+0x21,0x38,0x20,0x02,
+0x0F,0x00,0x63,0x30,
+0x80,0x18,0x03,0x00,
+0x02,0x08,0x63,0x34,
+0x1C,0x3E,0x03,0xA6,
+0x4C,0x5D,0xC6,0x24,
+0x21,0x20,0x40,0x00,
+0x68,0x4F,0x00,0x0C,
+0x02,0x00,0x05,0x24,
+0x02,0x80,0x06,0x3C,
+0x21,0x38,0x20,0x02,
+0x4E,0x5D,0xC6,0x24,
+0x21,0x20,0x40,0x00,
+0x02,0x00,0x05,0x24,
+0x68,0x4F,0x00,0x0C,
+0x1E,0x3E,0x00,0xA6,
+0x30,0x00,0xA3,0x97,
+0x21,0x20,0x40,0x00,
+0x02,0x80,0x06,0x3C,
+0x07,0x00,0x63,0x30,
+0x40,0x18,0x03,0x00,
+0x21,0x18,0x70,0x00,
+0xE8,0x1D,0x62,0x94,
+0x50,0x5D,0xC6,0x24,
+0x21,0x38,0x20,0x02,
+0x00,0x11,0x02,0x00,
+0x02,0x00,0x05,0x24,
+0x68,0x4F,0x00,0x0C,
+0x20,0x3E,0x02,0xA6,
+0xD8,0x14,0x00,0x08,
+0x21,0x20,0x40,0x02,
+0xC3,0xFF,0x62,0x14,
+0x02,0x80,0x06,0x3C,
+0x21,0x38,0x20,0x02,
+0x48,0x5D,0xC6,0x24,
+0x68,0x4F,0x00,0x0C,
+0x01,0x00,0x05,0x24,
+0x21,0x20,0x40,0x00,
+0x30,0x00,0xA6,0x27,
+0x21,0x38,0x20,0x02,
+0x68,0x4F,0x00,0x0C,
+0x02,0x00,0x05,0x24,
+0x1C,0x3E,0x63,0x96,
+0x02,0x80,0x06,0x3C,
+0x21,0x38,0x20,0x02,
+0x3F,0x00,0x63,0x30,
+0x00,0x08,0x63,0x34,
+0x21,0x20,0x40,0x00,
+0x4C,0x5D,0xC6,0x24,
+0x02,0x00,0x05,0x24,
+0x68,0x4F,0x00,0x0C,
+0x1C,0x3E,0x63,0xA6,
+0x02,0x80,0x06,0x3C,
+0x21,0x20,0x40,0x00,
+0x4E,0x5D,0xC6,0x24,
+0x21,0x38,0x20,0x02,
+0x68,0x4F,0x00,0x0C,
+0x02,0x00,0x05,0x24,
+0xD8,0x14,0x00,0x08,
+0x21,0x20,0x40,0x02,
+0x02,0x80,0x04,0x3C,
+0x02,0x80,0x05,0x3C,
+0x5C,0xE1,0x84,0x24,
+0x2F,0x55,0x00,0x0C,
+0xE8,0xEA,0xA5,0x24,
+0x20,0x00,0xBF,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0x00,0x80,0x03,0x3C,
+0x25,0xB0,0x02,0x3C,
+0xE0,0xFF,0xBD,0x27,
+0x18,0x03,0x42,0x34,
+0xF0,0x54,0x63,0x24,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x1C,0x00,0xBF,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x00,0x00,0x43,0xAC,
+0x02,0x00,0x82,0x90,
+0x02,0x80,0x05,0x3C,
+0x88,0x58,0xA5,0x24,
+0x0F,0x00,0x42,0x30,
+0xC0,0x10,0x02,0x00,
+0x21,0x80,0x44,0x00,
+0x28,0x00,0x04,0x26,
+0x06,0x00,0x06,0x24,
+0x39,0x52,0x00,0x0C,
+0x18,0x00,0x11,0x26,
+0x08,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x55,0x50,0x00,0x0C,
+0x21,0x20,0x20,0x02,
+0x02,0x80,0x04,0x3C,
+0x18,0x3B,0x84,0x24,
+0x21,0x28,0x40,0x00,
+0x39,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0xF1,0xFF,0x40,0x14,
+0x03,0x00,0x02,0x24,
+0x30,0x00,0x03,0x92,
+0x00,0x00,0x00,0x00,
+0xED,0xFF,0x62,0x14,
+0x30,0x00,0x07,0x26,
+0x02,0x80,0x06,0x3C,
+0x30,0x1F,0xC8,0x24,
+0x50,0x3E,0x02,0x8D,
+0x00,0x00,0x00,0x00,
+0xE7,0xFF,0x40,0x10,
+0x01,0x00,0x05,0x24,
+0x01,0x00,0xE3,0x90,
+0x00,0x00,0x00,0x00,
+0x1A,0x00,0x65,0x10,
+0x02,0x00,0x62,0x28,
+0x2E,0x00,0x40,0x14,
+0x02,0x00,0x02,0x24,
+0xDF,0xFF,0x62,0x14,
+0x00,0x00,0x00,0x00,
+0x03,0x00,0xE3,0x90,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x62,0x30,
+0x0A,0x00,0x40,0x14,
+0x02,0x11,0x03,0x00,
+0x1A,0x3E,0x03,0x91,
+0x04,0x10,0x45,0x00,
+0x27,0x10,0x02,0x00,
+0x24,0x10,0x43,0x00,
+0x1A,0x3E,0x02,0xA1,
+0x05,0x00,0xE3,0x90,
+0x04,0x00,0xE2,0x90,
+0x00,0x1A,0x03,0x00,
+0x25,0x90,0x62,0x00,
+0x1A,0x3E,0x05,0x91,
+0x02,0x80,0x04,0x3C,
+0x94,0xE1,0x84,0x24,
+0x2F,0x55,0x00,0x0C,
+0x21,0x30,0x40,0x02,
+0x52,0x15,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x04,0x00,0xE2,0x90,
+0x03,0x00,0xE4,0x90,
+0x05,0x00,0xE3,0x90,
+0x00,0x12,0x02,0x00,
+0x25,0x10,0x44,0x00,
+0x82,0x18,0x03,0x00,
+0x27,0x00,0x40,0x14,
+0x07,0x00,0x64,0x30,
+0x1A,0x3E,0x03,0x91,
+0x04,0x10,0x85,0x00,
+0x25,0x10,0x43,0x00,
+0x1A,0x3E,0x02,0xA1,
+0x30,0x1F,0xC2,0x24,
+0x4C,0x3E,0x43,0x90,
+0x1A,0x3E,0x45,0x90,
+0x02,0x80,0x04,0x3C,
+0x21,0x18,0x62,0x00,
+0x84,0xE1,0x84,0x24,
+0x2F,0x55,0x00,0x0C,
+0x44,0x3E,0x60,0xA0,
+0x52,0x15,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0xB2,0xFF,0x60,0x14,
+0x03,0x00,0x04,0x24,
+0x02,0x00,0xE2,0x90,
+0x01,0x00,0x05,0x24,
+0x18,0x3E,0x02,0xA1,
+0x04,0x00,0xE3,0x90,
+0x03,0x00,0xE2,0x90,
+0x21,0x30,0x00,0x00,
+0x00,0x1A,0x03,0x00,
+0x25,0x18,0x62,0x00,
+0x1C,0x3E,0x03,0xA5,
+0x06,0x00,0xE2,0x90,
+0x05,0x00,0xE3,0x90,
+0x00,0x12,0x02,0x00,
+0x25,0x10,0x43,0x00,
+0x1E,0x3E,0x02,0xA5,
+0x08,0x00,0xE3,0x90,
+0x07,0x00,0xE2,0x90,
+0x00,0x1A,0x03,0x00,
+0x25,0x18,0x62,0x00,
+0x90,0x14,0x00,0x0C,
+0x20,0x3E,0x03,0xA5,
+0x52,0x15,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x1A,0x3E,0x03,0x91,
+0x04,0x10,0x85,0x00,
+0x27,0x10,0x02,0x00,
+0x94,0x15,0x00,0x08,
+0x24,0x10,0x43,0x00,
+0xC0,0xFF,0xBD,0x27,
+0x34,0x00,0xB5,0xAF,
+0xFF,0xFF,0x95,0x30,
+0x00,0x01,0x04,0x24,
+0x38,0x00,0xB6,0xAF,
+0x28,0x00,0xB2,0xAF,
+0x3C,0x00,0xBF,0xAF,
+0x30,0x00,0xB4,0xAF,
+0x2C,0x00,0xB3,0xAF,
+0x24,0x00,0xB1,0xAF,
+0x25,0x24,0x00,0x0C,
+0x20,0x00,0xB0,0xAF,
+0x21,0x90,0x40,0x00,
+0x7A,0x00,0x40,0x10,
+0x21,0xB0,0x00,0x00,
+0x02,0x80,0x04,0x3C,
+0x2F,0x55,0x00,0x0C,
+0xB0,0xE1,0x84,0x24,
+0x08,0x00,0x50,0x96,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x11,0x3C,
+0x25,0x80,0x02,0x02,
+0x88,0x58,0x31,0x26,
+0x24,0x00,0x04,0x26,
+0x21,0x28,0x20,0x02,
+0x20,0x00,0x00,0xA6,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x02,0x80,0x05,0x3C,
+0x2A,0x00,0x04,0x26,
+0x18,0x3B,0xA5,0x24,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x30,0x00,0x04,0x26,
+0x21,0x28,0x20,0x02,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x20,0x00,0x03,0x96,
+0x18,0x00,0x02,0x24,
+0x02,0x80,0x13,0x3C,
+0x03,0xFF,0x63,0x30,
+0xB0,0x00,0x63,0x34,
+0x20,0x00,0x03,0xA6,
+0x30,0x1F,0x68,0x26,
+0x0C,0x00,0x42,0xAE,
+0xF8,0x1D,0x02,0x95,
+0x20,0x00,0x14,0x26,
+0x0C,0x00,0x51,0x26,
+0xFF,0x0F,0x43,0x30,
+0x00,0x19,0x03,0x00,
+0x02,0x22,0x03,0x00,
+0x01,0x00,0x42,0x24,
+0xF8,0x1D,0x02,0xA5,
+0x17,0x00,0x84,0xA2,
+0x16,0x00,0x83,0xA2,
+0x74,0x3D,0x04,0x8D,
+0x03,0x00,0x02,0x24,
+0x3C,0x00,0x82,0x10,
+0x38,0x00,0x10,0x26,
+0x30,0x1F,0x73,0x26,
+0x78,0x3D,0x62,0x8E,
+0x21,0x20,0x00,0x02,
+0x02,0x00,0x05,0x24,
+0x01,0x00,0x42,0x38,
+0x01,0x00,0x42,0x2C,
+0x18,0x00,0xA6,0x27,
+0x21,0x38,0x20,0x02,
+0x68,0x4F,0x00,0x0C,
+0x18,0x00,0xA2,0xA7,
+0x74,0x3D,0x63,0x8E,
+0x21,0x20,0x40,0x00,
+0x02,0x00,0x05,0x24,
+0x18,0x00,0xA6,0x27,
+0x21,0x38,0x20,0x02,
+0x68,0x4F,0x00,0x0C,
+0x18,0x00,0xA3,0xA7,
+0x21,0x20,0x40,0x00,
+0x02,0x00,0x05,0x24,
+0x18,0x00,0xA6,0x27,
+0x21,0x38,0x20,0x02,
+0x68,0x4F,0x00,0x0C,
+0x18,0x00,0xB5,0xA7,
+0x74,0x3D,0x63,0x8E,
+0x21,0x80,0x40,0x00,
+0x03,0x00,0x02,0x24,
+0x0F,0x00,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0x21,0x20,0x40,0x02,
+0x21,0x30,0xC0,0x02,
+0xB9,0x0C,0x00,0x0C,
+0x21,0x28,0x00,0x00,
+0x3C,0x00,0xBF,0x8F,
+0x38,0x00,0xB6,0x8F,
+0x34,0x00,0xB5,0x8F,
+0x30,0x00,0xB4,0x8F,
+0x2C,0x00,0xB3,0x8F,
+0x28,0x00,0xB2,0x8F,
+0x24,0x00,0xB1,0x8F,
+0x20,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x40,0x00,0xBD,0x27,
+0xB0,0x1B,0x62,0x96,
+0x00,0x00,0x00,0x00,
+0x40,0x00,0x42,0x30,
+0xEF,0xFF,0x40,0x10,
+0x21,0x20,0x40,0x02,
+0x02,0x80,0x07,0x3C,
+0x21,0x20,0x00,0x02,
+0xB8,0x5C,0xE7,0x24,
+0x10,0x00,0x05,0x24,
+0x80,0x00,0x06,0x24,
+0x41,0x4F,0x00,0x0C,
+0x10,0x00,0xB1,0xAF,
+0x00,0x00,0x83,0x96,
+0x01,0x00,0x16,0x24,
+0x00,0x40,0x63,0x34,
+0x13,0x16,0x00,0x08,
+0x00,0x00,0x83,0xA6,
+0xB0,0x1B,0x02,0x95,
+0x00,0x00,0x00,0x00,
+0x40,0x00,0x42,0x30,
+0xC1,0xFF,0x40,0x10,
+0x21,0x20,0x00,0x02,
+0x80,0x3D,0x03,0x8D,
+0x84,0x3D,0x02,0x8D,
+0x80,0x1F,0x03,0x00,
+0x25,0x18,0x43,0x00,
+0x04,0x00,0x05,0x24,
+0x01,0x00,0x42,0x24,
+0x1C,0x00,0xA6,0x27,
+0x21,0x38,0x20,0x02,
+0x84,0x3D,0x02,0xAD,
+0x68,0x4F,0x00,0x0C,
+0x1C,0x00,0xA3,0xAF,
+0xF7,0x15,0x00,0x08,
+0x21,0x80,0x40,0x00,
+0x02,0x80,0x04,0x3C,
+0x02,0x80,0x05,0x3C,
+0xA4,0xE1,0x84,0x24,
+0x2F,0x55,0x00,0x0C,
+0xF8,0xEA,0xA5,0x24,
+0x3C,0x00,0xBF,0x8F,
+0x38,0x00,0xB6,0x8F,
+0x34,0x00,0xB5,0x8F,
+0x30,0x00,0xB4,0x8F,
+0x2C,0x00,0xB3,0x8F,
+0x28,0x00,0xB2,0x8F,
+0x24,0x00,0xB1,0x8F,
+0x20,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x40,0x00,0xBD,0x27,
+0x02,0x80,0x03,0x3C,
+0x30,0x1F,0x63,0x24,
+0xB0,0x1B,0x62,0x94,
+0x01,0x00,0x05,0x24,
+0x21,0x20,0x00,0x00,
+0xEF,0xFF,0x42,0x30,
+0x20,0x00,0x42,0x34,
+0xB0,0x1B,0x62,0xA4,
+0xC8,0x00,0x02,0x24,
+0x74,0x3D,0x65,0xAC,
+0xB4,0x38,0x62,0xAC,
+0xD0,0x38,0x60,0xAC,
+0x6C,0x3D,0x60,0xAC,
+0xBC,0x15,0x00,0x08,
+0x70,0x3D,0x60,0xAC,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xA8,0xFF,0xBD,0x27,
+0x50,0x00,0xBE,0xAF,
+0x40,0x00,0xB4,0xAF,
+0x3C,0x00,0xB3,0xAF,
+0x54,0x00,0xBF,0xAF,
+0x4C,0x00,0xB7,0xAF,
+0x48,0x00,0xB6,0xAF,
+0x44,0x00,0xB5,0xAF,
+0x38,0x00,0xB2,0xAF,
+0x34,0x00,0xB1,0xAF,
+0x30,0x00,0xB0,0xAF,
+0x21,0xA0,0x80,0x00,
+0x02,0x00,0x84,0x90,
+0x21,0xF0,0x00,0x00,
+0x24,0x00,0xA0,0xAF,
+0x0F,0x00,0x84,0x30,
+0xC0,0x20,0x04,0x00,
+0x21,0x20,0x94,0x00,
+0x18,0x00,0x93,0x24,
+0x00,0x60,0x12,0x40,
+0x01,0x00,0x41,0x36,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x02,0x80,0x15,0x3C,
+0x28,0x00,0x84,0x24,
+0x88,0x58,0xA5,0x26,
+0x39,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x0F,0x00,0x40,0x14,
+0x02,0x80,0x16,0x3C,
+0xF4,0x5E,0xC2,0x92,
+0x00,0x00,0x00,0x00,
+0x29,0x00,0x40,0x14,
+0x02,0x80,0x02,0x3C,
+0xF4,0x5E,0xC2,0x92,
+0x00,0x00,0x00,0x00,
+0x07,0x00,0x40,0x14,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x50,0x24,
+0xB0,0x1B,0x02,0x96,
+0x00,0x00,0x00,0x00,
+0x00,0x01,0x42,0x30,
+0x3C,0x01,0x40,0x14,
+0x05,0x00,0x05,0x24,
+0x00,0x60,0x92,0x40,
+0x02,0x80,0x03,0x3C,
+0x30,0x1F,0x70,0x24,
+0xB0,0x1B,0x03,0x96,
+0x00,0x00,0x00,0x00,
+0x00,0x10,0x62,0x30,
+0x24,0x01,0x40,0x14,
+0x10,0x00,0x62,0x30,
+0xCB,0x00,0x40,0x14,
+0x10,0x00,0x64,0x26,
+0x02,0x80,0x04,0x3C,
+0x30,0x1F,0x92,0x24,
+0xB0,0x1B,0x42,0x96,
+0x00,0x00,0x00,0x00,
+0x00,0x01,0x42,0x30,
+0x4E,0x01,0x40,0x14,
+0x21,0x18,0x00,0x00,
+0x54,0x00,0xBF,0x8F,
+0x50,0x00,0xBE,0x8F,
+0x4C,0x00,0xB7,0x8F,
+0x48,0x00,0xB6,0x8F,
+0x44,0x00,0xB5,0x8F,
+0x40,0x00,0xB4,0x8F,
+0x3C,0x00,0xB3,0x8F,
+0x38,0x00,0xB2,0x8F,
+0x34,0x00,0xB1,0x8F,
+0x30,0x00,0xB0,0x8F,
+0x21,0x10,0x60,0x00,
+0x08,0x00,0xE0,0x03,
+0x58,0x00,0xBD,0x27,
+0x30,0x1F,0x43,0x24,
+0xB0,0x1B,0x62,0x94,
+0x00,0x00,0x00,0x00,
+0x00,0x01,0x42,0x30,
+0xD3,0xFF,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x6C,0x3B,0x62,0x8C,
+0x00,0x00,0x00,0x00,
+0xCF,0xFF,0x40,0x14,
+0x02,0x80,0x0B,0x3C,
+0x15,0x5F,0x62,0x91,
+0x00,0x00,0x00,0x00,
+0x55,0x01,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0xFA,0x5E,0x40,0xA0,
+0x1C,0x5F,0x60,0xAC,
+0x02,0x80,0x03,0x3C,
+0x0E,0x5F,0x62,0x90,
+0xFD,0xFF,0x03,0x24,
+0x02,0x80,0x04,0x3C,
+0x24,0x10,0x43,0x00,
+0x0E,0x5F,0x82,0xA0,
+0x42,0xB0,0x17,0x3C,
+0x00,0x00,0xE3,0x92,
+0xEF,0xFF,0x02,0x24,
+0x03,0x00,0xE4,0x36,
+0x24,0x18,0x62,0x00,
+0x40,0x00,0x02,0x24,
+0x00,0x00,0xE3,0xA2,
+0x00,0x00,0x82,0xA0,
+0x02,0x80,0x04,0x3C,
+0xFC,0x5E,0x82,0x94,
+0x20,0x00,0x63,0x96,
+0xFF,0xFF,0x42,0x30,
+0x0A,0x00,0x43,0x10,
+0x02,0x80,0x07,0x3C,
+0x25,0xB0,0x02,0x3C,
+0x94,0x00,0x42,0x34,
+0xFC,0x5E,0x83,0xA4,
+0x00,0x00,0x43,0xA4,
+0xFC,0x5E,0x83,0x94,
+0x00,0x00,0x00,0x00,
+0xFF,0xFF,0x63,0x30,
+0x80,0x1A,0x03,0x00,
+0x00,0x5F,0xE3,0xAC,
+0x25,0xB0,0x04,0x3C,
+0x84,0x00,0x82,0x34,
+0x00,0x00,0x50,0x8C,
+0x80,0x00,0x84,0x34,
+0x00,0x00,0x82,0x8C,
+0x21,0x18,0x00,0x00,
+0x00,0x5F,0xE6,0x8C,
+0x00,0x88,0x10,0x00,
+0x21,0x80,0x00,0x00,
+0x25,0x80,0x02,0x02,
+0x25,0x88,0x23,0x02,
+0x21,0x20,0x00,0x02,
+0x21,0x28,0x20,0x02,
+0x28,0x00,0xA7,0xAF,
+0xBA,0x34,0x00,0x0C,
+0x2C,0x00,0xAB,0xAF,
+0x28,0x00,0xA7,0x8F,
+0x02,0x80,0x0A,0x3C,
+0x21,0x28,0x00,0x00,
+0x00,0x5F,0xE8,0x8C,
+0x04,0x5F,0x43,0x95,
+0x21,0x28,0xB1,0x00,
+0x23,0x48,0x02,0x01,
+0x21,0x20,0x30,0x01,
+0x2B,0x10,0x90,0x00,
+0xFF,0xFF,0x63,0x30,
+0x80,0x1A,0x03,0x00,
+0x21,0x28,0xA2,0x00,
+0x21,0x38,0x00,0x00,
+0x2B,0x40,0x83,0x00,
+0x23,0x28,0xA7,0x00,
+0x23,0x20,0x83,0x00,
+0x23,0x28,0xA8,0x00,
+0x02,0x80,0x03,0x3C,
+0x20,0x5F,0x64,0xAC,
+0x24,0x5F,0x65,0xAC,
+0x04,0x5F,0x42,0x95,
+0x2C,0x00,0xAB,0x8F,
+0xFF,0xFF,0x42,0x30,
+0x80,0x12,0x02,0x00,
+0x2B,0x10,0x49,0x00,
+0x31,0x01,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x04,0x5F,0x42,0x95,
+0x00,0x00,0xE4,0x92,
+0xFB,0xFF,0x03,0x24,
+0xFF,0xFF,0x42,0x30,
+0x80,0x12,0x02,0x00,
+0x24,0x20,0x83,0x00,
+0x23,0x48,0x22,0x01,
+0x00,0x00,0xE4,0xA2,
+0x01,0x00,0x06,0x24,
+0x04,0x00,0x20,0x11,
+0x01,0x00,0x04,0x24,
+0x80,0x10,0x09,0x00,
+0x21,0x10,0x49,0x00,
+0x80,0x30,0x02,0x00,
+0x8C,0x23,0x00,0x0C,
+0x21,0x28,0x00,0x00,
+0x42,0xB0,0x02,0x3C,
+0x22,0x00,0x03,0x24,
+0x03,0x00,0x42,0x34,
+0x00,0x00,0x43,0xA0,
+0x00,0x00,0x87,0x8E,
+0x05,0x00,0x05,0x24,
+0x24,0x00,0x64,0x26,
+0xFF,0x3F,0xE7,0x30,
+0xDC,0xFF,0xE7,0x24,
+0x55,0x1D,0x00,0x0C,
+0x20,0x00,0xA6,0x27,
+0x2E,0x00,0x40,0x10,
+0x21,0x28,0x40,0x00,
+0xF4,0x5E,0xC2,0x92,
+0x02,0x00,0x03,0x24,
+0xFF,0x00,0x42,0x30,
+0x45,0x01,0x43,0x10,
+0x02,0x80,0x07,0x3C,
+0x02,0x00,0xA2,0x90,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x04,0x00,0xA3,0x90,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x62,0x30,
+0x04,0x00,0x40,0x10,
+0x02,0x80,0x02,0x3C,
+0x01,0x00,0x1E,0x24,
+0x12,0x5F,0x5E,0xA0,
+0x04,0x00,0xA3,0x90,
+0x20,0x00,0xA7,0x8F,
+0x00,0x00,0x00,0x00,
+0x04,0x00,0xE2,0x28,
+0x18,0x00,0x40,0x14,
+0xFE,0x00,0x66,0x30,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x43,0x24,
+0x50,0x39,0x64,0x94,
+0xC0,0x10,0x06,0x00,
+0x2A,0x10,0x82,0x00,
+0x12,0x00,0x40,0x14,
+0x02,0x80,0x03,0x3C,
+0x21,0x10,0xC7,0x00,
+0xFD,0xFF,0x42,0x24,
+0xC0,0x10,0x02,0x00,
+0x2A,0x10,0x44,0x00,
+0x0C,0x00,0x40,0x14,
+0xC2,0x10,0x04,0x00,
+0x23,0x30,0x46,0x00,
+0x21,0x18,0xA6,0x00,
+0x05,0x00,0x62,0x90,
+0x07,0x00,0x84,0x30,
+0x01,0x00,0x03,0x24,
+0x07,0x10,0x82,0x00,
+0x24,0x00,0xA4,0x8F,
+0x01,0x00,0x42,0x30,
+0x0B,0x20,0x62,0x00,
+0x24,0x00,0xA4,0xAF,
+0x02,0x80,0x03,0x3C,
+0x0E,0x5F,0x62,0x90,
+0xEF,0xFF,0x03,0x24,
+0x02,0x80,0x04,0x3C,
+0x24,0x10,0x43,0x00,
+0x0E,0x5F,0x82,0xA0,
+0xF4,0x5E,0xC3,0x92,
+0x02,0x80,0x02,0x3C,
+0x24,0xE9,0x42,0x24,
+0xFF,0x00,0x63,0x30,
+0x80,0x18,0x03,0x00,
+0x21,0x18,0x62,0x00,
+0x00,0x00,0x66,0x8C,
+0x24,0x00,0xA5,0x8F,
+0x09,0xF8,0xC0,0x00,
+0x21,0x20,0xC0,0x03,
+0x90,0x16,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x88,0x58,0xA5,0x26,
+0x39,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x33,0xFF,0x40,0x14,
+0x02,0x80,0x04,0x3C,
+0x06,0x00,0x02,0x24,
+0x0A,0x3E,0x02,0xA2,
+0xEC,0x38,0x00,0xAE,
+0x00,0x00,0x84,0x8E,
+0x0C,0x00,0x12,0x24,
+0xFF,0x3F,0x82,0x30,
+0xE8,0xFF,0x42,0x24,
+0x2A,0x10,0x42,0x02,
+0xA4,0x00,0x40,0x10,
+0x21,0xA8,0x00,0x02,
+0x7D,0x17,0x00,0x08,
+0x21,0x80,0x72,0x02,
+0x19,0x00,0x03,0x92,
+0xFF,0x3F,0x82,0x30,
+0xE8,0xFF,0x42,0x24,
+0x21,0x18,0x72,0x00,
+0x02,0x00,0x72,0x24,
+0x2A,0x10,0x42,0x02,
+0x9A,0x00,0x40,0x10,
+0x21,0x80,0x72,0x02,
+0x18,0x00,0x03,0x92,
+0xDD,0x00,0x02,0x24,
+0xF5,0xFF,0x62,0x14,
+0x1A,0x00,0x11,0x26,
+0x02,0x80,0x05,0x3C,
+0xC4,0xDD,0xA5,0x24,
+0x21,0x20,0x20,0x02,
+0x39,0x52,0x00,0x0C,
+0x03,0x00,0x06,0x24,
+0x20,0x01,0x40,0x10,
+0x02,0x80,0x05,0x3C,
+0xC0,0xDD,0xA5,0x24,
+0x21,0x20,0x20,0x02,
+0x39,0x52,0x00,0x0C,
+0x03,0x00,0x06,0x24,
+0x1A,0x01,0x40,0x10,
+0x02,0x80,0x05,0x3C,
+0xBC,0xDD,0xA5,0x24,
+0x21,0x20,0x20,0x02,
+0x39,0x52,0x00,0x0C,
+0x03,0x00,0x06,0x24,
+0x0F,0x01,0x40,0x10,
+0x02,0x80,0x05,0x3C,
+0xB8,0xDD,0xA5,0x24,
+0x21,0x20,0x20,0x02,
+0x39,0x52,0x00,0x0C,
+0x03,0x00,0x06,0x24,
+0x09,0x01,0x40,0x10,
+0x02,0x80,0x05,0x3C,
+0xB4,0xDD,0xA5,0x24,
+0x21,0x20,0x20,0x02,
+0x39,0x52,0x00,0x0C,
+0x03,0x00,0x06,0x24,
+0x03,0x01,0x40,0x10,
+0x02,0x80,0x05,0x3C,
+0xAC,0xDD,0xA5,0x24,
+0x21,0x20,0x20,0x02,
+0x39,0x52,0x00,0x0C,
+0x03,0x00,0x06,0x24,
+0x64,0x01,0x40,0x10,
+0x02,0x80,0x05,0x3C,
+0xA8,0xDD,0xA5,0x24,
+0x21,0x20,0x20,0x02,
+0x39,0x52,0x00,0x0C,
+0x03,0x00,0x06,0x24,
+0x57,0x01,0x40,0x10,
+0x02,0x80,0x05,0x3C,
+0xB0,0xDD,0xA5,0x24,
+0x21,0x20,0x20,0x02,
+0x39,0x52,0x00,0x0C,
+0x03,0x00,0x06,0x24,
+0x4A,0x01,0x40,0x10,
+0x02,0x80,0x05,0x3C,
+0x21,0x20,0x20,0x02,
+0x9C,0xDD,0xA5,0x24,
+0x39,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x3E,0x01,0x40,0x10,
+0x02,0x80,0x02,0x3C,
+0x00,0x00,0x84,0x8E,
+0x75,0x17,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x92,0x10,0x00,0x0C,
+0x21,0x20,0x80,0x02,
+0x21,0x18,0x00,0x00,
+0x54,0x00,0xBF,0x8F,
+0x50,0x00,0xBE,0x8F,
+0x4C,0x00,0xB7,0x8F,
+0x48,0x00,0xB6,0x8F,
+0x44,0x00,0xB5,0x8F,
+0x40,0x00,0xB4,0x8F,
+0x3C,0x00,0xB3,0x8F,
+0x38,0x00,0xB2,0x8F,
+0x34,0x00,0xB1,0x8F,
+0x30,0x00,0xB0,0x8F,
+0x21,0x10,0x60,0x00,
+0x08,0x00,0xE0,0x03,
+0x58,0x00,0xBD,0x27,
+0x00,0x00,0x87,0x8E,
+0x24,0x00,0x64,0x26,
+0xFF,0x3F,0xE7,0x30,
+0xDC,0xFF,0xE7,0x24,
+0x55,0x1D,0x00,0x0C,
+0x20,0x00,0xA6,0x27,
+0xBE,0xFE,0x40,0x10,
+0x21,0x28,0x40,0x00,
+0x20,0x00,0xA7,0x8F,
+0x04,0x00,0x42,0x90,
+0x04,0x00,0xE3,0x28,
+0xB9,0xFE,0x60,0x14,
+0xFE,0x00,0x46,0x30,
+0x50,0x39,0x04,0x96,
+0xC0,0x10,0x06,0x00,
+0x2A,0x10,0x82,0x00,
+0xB4,0xFE,0x40,0x14,
+0x21,0x10,0xC7,0x00,
+0xFD,0xFF,0x42,0x24,
+0xC0,0x10,0x02,0x00,
+0x2A,0x10,0x44,0x00,
+0xAF,0xFE,0x40,0x14,
+0xC2,0x10,0x04,0x00,
+0x23,0x30,0x46,0x00,
+0x21,0x18,0xA6,0x00,
+0x05,0x00,0x62,0x90,
+0x07,0x00,0x84,0x30,
+0x07,0x10,0x82,0x00,
+0x01,0x00,0x42,0x30,
+0xA7,0xFE,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0xCD,0x4E,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0x90,0x16,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x88,0x58,0xA5,0x26,
+0x10,0x00,0x64,0x26,
+0x39,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0xCB,0xFF,0x40,0x14,
+0x21,0x18,0x00,0x00,
+0xB0,0x1B,0x43,0x96,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x62,0x30,
+0x0D,0x00,0x40,0x14,
+0x04,0x00,0x62,0x30,
+0x83,0x00,0x40,0x14,
+0x02,0x80,0x03,0x3C,
+0x30,0x1F,0x70,0x24,
+0x0B,0x3E,0x02,0x92,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x44,0x24,
+0xFF,0x00,0x83,0x30,
+0x0B,0x00,0x02,0x24,
+0x45,0x00,0x62,0x10,
+0x21,0x18,0x00,0x00,
+0xA1,0x16,0x00,0x08,
+0x0B,0x3E,0x04,0xA2,
+0x00,0x60,0x03,0x40,
+0x01,0x00,0x61,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0xD4,0x1E,0x42,0x8E,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xD4,0x1E,0x42,0xAE,
+0x00,0x60,0x83,0x40,
+0xFB,0x17,0x00,0x08,
+0x02,0x80,0x03,0x3C,
+0x15,0x5F,0x62,0x91,
+0x00,0x00,0x00,0x00,
+0xFF,0xFF,0x42,0x24,
+0x15,0x5F,0x62,0xA1,
+0xBD,0x16,0x00,0x08,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x04,0x3C,
+0xFC,0xE2,0x84,0x24,
+0x2F,0x55,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x02,0x3C,
+0xE6,0x5D,0x46,0x90,
+0x01,0x00,0x03,0x24,
+0x10,0x00,0xC3,0x10,
+0x02,0x80,0x03,0x3C,
+0x53,0x16,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x54,0x00,0xBF,0x8F,
+0x50,0x00,0xBE,0x8F,
+0x4C,0x00,0xB7,0x8F,
+0x48,0x00,0xB6,0x8F,
+0x44,0x00,0xB5,0x8F,
+0x40,0x00,0xB4,0x8F,
+0x3C,0x00,0xB3,0x8F,
+0x38,0x00,0xB2,0x8F,
+0x34,0x00,0xB1,0x8F,
+0x30,0x00,0xB0,0x8F,
+0x21,0x10,0x60,0x00,
+0x08,0x00,0xE0,0x03,
+0x58,0x00,0xBD,0x27,
+0x30,0x1F,0x64,0x24,
+0x0A,0x3E,0x83,0x90,
+0x03,0x00,0x02,0x24,
+0x62,0x00,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0x91,0x3E,0x86,0xA0,
+0x53,0x16,0x00,0x0C,
+0x90,0x3E,0x80,0xA0,
+0x21,0x18,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x15,0x5F,0x62,0x91,
+0x00,0x00,0x00,0x00,
+0x05,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x15,0x5F,0x62,0x91,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0x15,0x5F,0x62,0xA1,
+0x00,0x00,0xE2,0x92,
+0xFB,0xFF,0x03,0x24,
+0x01,0x00,0x06,0x24,
+0x24,0x10,0x43,0x00,
+0x00,0x00,0xE2,0xA2,
+0x11,0x17,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x02,0x3C,
+0xE6,0x5D,0x43,0x90,
+0x01,0x00,0x11,0x24,
+0x53,0x00,0x71,0x10,
+0x0B,0x3E,0x00,0xA2,
+0x02,0x80,0x02,0x3C,
+0xEA,0x5D,0x44,0x90,
+0x02,0x00,0x03,0x24,
+0x6E,0xFF,0x83,0x14,
+0x21,0x18,0x00,0x00,
+0x00,0x00,0x87,0x8E,
+0x24,0x00,0x64,0x26,
+0x2A,0x00,0x05,0x24,
+0xFF,0x3F,0xE7,0x30,
+0xDC,0xFF,0xE7,0x24,
+0x55,0x1D,0x00,0x0C,
+0x20,0x00,0xA6,0x27,
+0x65,0xFF,0x40,0x10,
+0x21,0x18,0x00,0x00,
+0x02,0x00,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0x02,0x00,0x62,0x30,
+0x4D,0x00,0x40,0x10,
+0x02,0x80,0x04,0x3C,
+0x01,0x00,0x62,0x30,
+0x4B,0x00,0x40,0x14,
+0x30,0x1F,0x85,0x24,
+0x02,0x80,0x02,0x3C,
+0xEB,0x5D,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0xAA,0x00,0x71,0x10,
+0x00,0x00,0x00,0x00,
+0x10,0x23,0x02,0x8E,
+0xFF,0xEF,0x03,0x24,
+0x00,0x08,0x42,0x34,
+0x24,0x10,0x43,0x00,
+0x10,0x23,0x02,0xAE,
+0xBE,0x17,0x00,0x08,
+0x21,0x18,0x00,0x00,
+0x03,0x00,0xA2,0x90,
+0x02,0x80,0x04,0x3C,
+0x10,0x5F,0xE2,0xA0,
+0x02,0x00,0xA3,0x90,
+0x21,0x30,0x80,0x00,
+0x11,0x5F,0x83,0xA0,
+0x11,0x5F,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x22,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x10,0x5F,0xE2,0x90,
+0x00,0x00,0x00,0x00,
+0x11,0x5F,0xC2,0xA0,
+0x2A,0x17,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x0A,0x00,0x76,0x26,
+0x3B,0x51,0x00,0x0C,
+0x21,0x20,0xC0,0x02,
+0x20,0x00,0x10,0x24,
+0x32,0x00,0x50,0x10,
+0x21,0xA8,0x40,0x00,
+0x00,0x60,0x05,0x40,
+0x01,0x00,0xA1,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x80,0x18,0x15,0x00,
+0x21,0x18,0x75,0x00,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x44,0x24,
+0xC0,0x18,0x03,0x00,
+0x21,0x18,0x64,0x00,
+0x0C,0x1E,0x62,0x8C,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0x0C,0x1E,0x62,0xAC,
+0x00,0x60,0x85,0x40,
+0xBE,0x17,0x00,0x08,
+0x21,0x18,0x00,0x00,
+0x90,0x3E,0x86,0xA0,
+0x53,0x16,0x00,0x0C,
+0x91,0x3E,0x80,0xA0,
+0x21,0x18,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x11,0x5F,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x11,0x5F,0xC2,0xA0,
+0x2A,0x17,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x64,0x12,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x4D,0x18,0x00,0x08,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x04,0x3C,
+0x01,0x00,0x02,0x24,
+0x90,0xE2,0x84,0x24,
+0x18,0x18,0x00,0x08,
+0x0A,0x3E,0xA2,0xA2,
+0x02,0x80,0x04,0x3C,
+0x78,0xE2,0x84,0x24,
+0x18,0x18,0x00,0x08,
+0x0A,0x3E,0xA0,0xA2,
+0x30,0x1F,0x85,0x24,
+0x10,0x23,0xA2,0x8C,
+0xFF,0xEF,0x03,0x24,
+0xFF,0xF7,0x04,0x24,
+0x24,0x10,0x43,0x00,
+0x24,0x10,0x44,0x00,
+0x21,0x18,0x00,0x00,
+0xBE,0x17,0x00,0x08,
+0x10,0x23,0xA2,0xAC,
+0xFF,0xFF,0x04,0x24,
+0xE3,0x50,0x00,0x0C,
+0x21,0x28,0xC0,0x02,
+0xCB,0xFF,0x50,0x10,
+0x21,0xA8,0x40,0x00,
+0x00,0x00,0x87,0x8E,
+0x24,0x00,0x70,0x26,
+0x21,0x20,0x00,0x02,
+0xFF,0x3F,0xE7,0x30,
+0xDC,0xFF,0xE7,0x24,
+0x01,0x00,0x05,0x24,
+0x55,0x1D,0x00,0x0C,
+0x20,0x00,0xA6,0x27,
+0xDF,0xFD,0x40,0x10,
+0x21,0x18,0x00,0x00,
+0x20,0x00,0xA6,0x8F,
+0x02,0x00,0x45,0x24,
+0x10,0x52,0x00,0x0C,
+0x10,0x00,0xA4,0x27,
+0x00,0x00,0x87,0x8E,
+0x21,0x20,0x00,0x02,
+0x32,0x00,0x05,0x24,
+0xFF,0x3F,0xE7,0x30,
+0xDC,0xFF,0xE7,0x24,
+0x20,0x00,0xB1,0x8F,
+0x55,0x1D,0x00,0x0C,
+0x20,0x00,0xA6,0x27,
+0x09,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x20,0x00,0xA6,0x8F,
+0x10,0x00,0xA4,0x27,
+0x21,0x20,0x91,0x00,
+0x10,0x52,0x00,0x0C,
+0x02,0x00,0x45,0x24,
+0x20,0x00,0xA3,0x8F,
+0x00,0x00,0x00,0x00,
+0x21,0x88,0x23,0x02,
+0x10,0x00,0xA4,0x27,
+0x7D,0x50,0x00,0x0C,
+0x21,0x28,0x20,0x02,
+0x0F,0x00,0x42,0x30,
+0x00,0x81,0x15,0x00,
+0x21,0x28,0x20,0x02,
+0x10,0x00,0xA4,0x27,
+0x25,0x80,0x02,0x02,
+0xC2,0x50,0x00,0x0C,
+0xFF,0xFF,0x10,0x32,
+0x02,0x80,0x04,0x3C,
+0x21,0x88,0x40,0x00,
+0x21,0x38,0x40,0x00,
+0x21,0x28,0xA0,0x02,
+0x21,0x30,0x00,0x02,
+0x2F,0x55,0x00,0x0C,
+0x10,0xE3,0x84,0x24,
+0x21,0x20,0x00,0x02,
+0xC1,0x5B,0x00,0x0C,
+0x21,0x28,0x20,0x02,
+0x8E,0x3E,0x42,0x92,
+0x21,0x20,0xC0,0x02,
+0x21,0x28,0xA0,0x02,
+0x01,0x00,0x42,0x24,
+0x9C,0x0E,0x00,0x0C,
+0x8E,0x3E,0x42,0xA2,
+0x83,0x18,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x04,0x3C,
+0x30,0x1F,0x43,0x24,
+0xE4,0xE2,0x84,0x24,
+0x05,0x00,0x02,0x24,
+0x18,0x18,0x00,0x08,
+0x0A,0x3E,0x62,0xA0,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x04,0x3C,
+0x30,0x1F,0x43,0x24,
+0xD0,0xE2,0x84,0x24,
+0x02,0x00,0x02,0x24,
+0x18,0x18,0x00,0x08,
+0x0A,0x3E,0x62,0xA0,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x04,0x3C,
+0x30,0x1F,0x43,0x24,
+0xBC,0xE2,0x84,0x24,
+0x04,0x00,0x02,0x24,
+0x18,0x18,0x00,0x08,
+0x0A,0x3E,0x62,0xA0,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x04,0x3C,
+0x30,0x1F,0x43,0x24,
+0xA8,0xE2,0x84,0x24,
+0x03,0x00,0x02,0x24,
+0x18,0x18,0x00,0x08,
+0x0A,0x3E,0x62,0xA0,
+0x10,0x23,0x02,0x8E,
+0xFF,0xF7,0x03,0x24,
+0x24,0x10,0x43,0x00,
+0x00,0x10,0x42,0x34,
+0x6C,0x18,0x00,0x08,
+0x10,0x23,0x02,0xAE,
+0xE8,0xFF,0xBD,0x27,
+0x10,0x00,0xB0,0xAF,
+0x02,0x80,0x10,0x3C,
+0x30,0x1F,0x02,0x26,
+0x14,0x00,0xBF,0xAF,
+0xB0,0x1B,0x43,0x94,
+0x21,0x28,0x00,0x00,
+0x00,0x01,0x62,0x30,
+0x03,0x00,0x40,0x10,
+0x01,0x00,0x64,0x30,
+0x06,0x00,0x80,0x14,
+0x00,0x10,0x62,0x30,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x10,0xA0,0x00,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x08,0x00,0x40,0x14,
+0x02,0x00,0x03,0x3C,
+0x02,0x80,0x02,0x3C,
+0xF6,0x5E,0x43,0x90,
+0x0C,0x00,0x02,0x24,
+0x0F,0x00,0x63,0x30,
+0x0A,0x00,0x62,0x10,
+0x21,0x20,0x00,0x00,
+0x02,0x00,0x03,0x3C,
+0x30,0x1F,0x04,0x26,
+0x20,0xBF,0x63,0x34,
+0x08,0x39,0x83,0xAC,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x10,0xA0,0x00,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0xCD,0x4E,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x02,0x00,0x03,0x3C,
+0x30,0x1F,0x04,0x26,
+0x20,0xBF,0x63,0x34,
+0x33,0x19,0x00,0x08,
+0x08,0x39,0x83,0xAC,
+0xE0,0xFF,0xBD,0x27,
+0x14,0x00,0xB1,0xAF,
+0x02,0x80,0x11,0x3C,
+0x1C,0x00,0xBF,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x30,0x1F,0x25,0x26,
+0x6C,0x3B,0xA2,0x8C,
+0x00,0x10,0x03,0x3C,
+0x24,0x10,0x43,0x00,
+0x21,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x9B,0x3B,0xA6,0x90,
+0x9C,0x3B,0xA4,0x90,
+0xFF,0x00,0xC3,0x30,
+0x40,0x10,0x03,0x00,
+0x21,0x10,0x43,0x00,
+0x80,0x10,0x02,0x00,
+0x21,0x10,0x43,0x00,
+0x01,0x00,0x84,0x24,
+0x80,0x10,0x02,0x00,
+0xFF,0x00,0x83,0x30,
+0x21,0x10,0x45,0x00,
+0x21,0x10,0x43,0x00,
+0x9C,0x3B,0xA4,0xA0,
+0x38,0x3B,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0x21,0x00,0x60,0x10,
+0x01,0x00,0xC2,0x24,
+0xFF,0x00,0xC2,0x30,
+0x22,0x00,0x40,0x14,
+0x30,0x1F,0x30,0x26,
+0x9C,0x3B,0xA2,0x90,
+0x00,0x00,0x00,0x00,
+0x21,0x10,0x45,0x00,
+0x38,0x3B,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x64,0x30,
+0x1A,0x00,0x80,0x10,
+0x00,0x00,0x00,0x00,
+0x67,0x3B,0xA2,0x90,
+0x30,0x3B,0xA3,0xA0,
+0x4F,0x0C,0x00,0x0C,
+0x31,0x3B,0xA2,0xA0,
+0x30,0x1F,0x30,0x26,
+0x70,0x3B,0x03,0x8E,
+0x01,0x00,0x02,0x24,
+0x7C,0x00,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0x6C,0x3B,0x03,0x8E,
+0x00,0x10,0x02,0x3C,
+0x3C,0x00,0x04,0x24,
+0x26,0x18,0x62,0x00,
+0x98,0x38,0x04,0xAE,
+0x6C,0x3B,0x03,0xAE,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x21,0x30,0x40,0x00,
+0x9B,0x3B,0xA2,0xA0,
+0x5C,0x19,0x00,0x08,
+0x9C,0x3B,0xA0,0xA0,
+0x99,0x3B,0x03,0x92,
+0x9A,0x3B,0x02,0x92,
+0xFF,0x00,0x64,0x30,
+0x30,0x3B,0x03,0xA2,
+0x4F,0x0C,0x00,0x0C,
+0x31,0x3B,0x02,0xA2,
+0xB0,0x1B,0x03,0x96,
+0x00,0x00,0x00,0x00,
+0x00,0x01,0x62,0x30,
+0x09,0x00,0x40,0x10,
+0x01,0x00,0x62,0x30,
+0x08,0x00,0x40,0x10,
+0x30,0x1F,0x30,0x26,
+0x02,0x80,0x02,0x3C,
+0xF6,0x5E,0x43,0x90,
+0x0C,0x00,0x02,0x24,
+0x0F,0x00,0x63,0x30,
+0x61,0x00,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0x30,0x1F,0x30,0x26,
+0x9E,0x3B,0x04,0x96,
+0xA0,0x3B,0x05,0x92,
+0x12,0x0D,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xC1,0x48,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x6C,0x3B,0x00,0xAE,
+0x00,0x60,0x12,0x40,
+0x01,0x00,0x41,0x36,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0xB0,0x1B,0x02,0x96,
+0x00,0x00,0x00,0x00,
+0x00,0x01,0x42,0x30,
+0x3F,0x00,0x40,0x10,
+0x02,0x80,0x02,0x3C,
+0xF4,0x5E,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0x3C,0x00,0x60,0x10,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0xF6,0x5E,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x0F,0x00,0x42,0x30,
+0x04,0x00,0x42,0x28,
+0x41,0x00,0x40,0x14,
+0x04,0x00,0x04,0x24,
+0x02,0x80,0x03,0x3C,
+0x15,0x5F,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x05,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x15,0x5F,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0x15,0x5F,0x62,0xA0,
+0x00,0x60,0x92,0x40,
+0x25,0xB0,0x07,0x3C,
+0x30,0x1F,0x30,0x26,
+0xB0,0x1B,0x04,0x96,
+0x48,0x00,0xE6,0x34,
+0x00,0x00,0xC3,0x8C,
+0xFF,0xEF,0x84,0x30,
+0x80,0x00,0x02,0x3C,
+0x25,0x18,0x62,0x00,
+0x00,0x01,0x85,0x30,
+0x00,0x00,0xC3,0xAC,
+0x02,0x80,0x08,0x3C,
+0x05,0x00,0xA0,0x10,
+0xB0,0x1B,0x04,0xA6,
+0x00,0x00,0xC2,0x8C,
+0x04,0x00,0x03,0x3C,
+0x25,0x10,0x43,0x00,
+0x00,0x00,0xC2,0xAC,
+0x30,0x1F,0x02,0x8D,
+0xFF,0xF0,0x03,0x24,
+0xA1,0x3B,0x05,0x92,
+0x24,0x10,0x43,0x00,
+0x00,0x01,0x42,0x34,
+0x0F,0xFF,0x03,0x24,
+0x24,0x10,0x43,0x00,
+0x10,0x00,0x42,0x34,
+0xF0,0xFF,0x03,0x24,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x24,0x10,0x43,0x00,
+0x4C,0x00,0xE3,0x34,
+0x01,0x00,0x42,0x34,
+0x00,0x00,0x65,0xA0,
+0x64,0x03,0xE4,0x34,
+0x07,0x00,0x03,0x24,
+0x20,0x00,0xBD,0x27,
+0x30,0x1F,0x02,0xAD,
+0x00,0x00,0x83,0xA0,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x02,0x3C,
+0x15,0x5F,0x40,0xA0,
+0x02,0x80,0x03,0x3C,
+0xF5,0x5E,0x64,0x90,
+0x01,0x00,0x05,0x24,
+0x64,0x31,0x00,0x0C,
+0xFF,0x00,0x84,0x30,
+0xB8,0x19,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x13,0x0F,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x70,0x19,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x64,0x31,0x00,0x0C,
+0x01,0x00,0x05,0x24,
+0xB0,0x19,0x00,0x08,
+0x02,0x80,0x03,0x3C,
+0xCD,0x4E,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0x94,0x19,0x00,0x08,
+0x30,0x1F,0x30,0x26,
+0x0C,0x00,0x82,0x8C,
+0x00,0x00,0x00,0x00,
+0x3F,0x00,0x42,0x30,
+0x04,0x00,0x42,0x28,
+0x17,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x02,0x3C,
+0x24,0x08,0x42,0x34,
+0x00,0x00,0x43,0x8C,
+0x00,0x00,0x00,0x00,
+0x00,0x02,0x63,0x30,
+0x15,0x00,0x60,0x14,
+0x01,0x00,0x02,0x24,
+0x05,0x00,0xA3,0x90,
+0x00,0x00,0x00,0x00,
+0x82,0x21,0x03,0x00,
+0x28,0x00,0x82,0x10,
+0xF5,0xFF,0x02,0x24,
+0x02,0x00,0x82,0x28,
+0x3B,0x00,0x40,0x14,
+0x02,0x00,0x02,0x24,
+0x2F,0x00,0x82,0x10,
+0xE9,0xFF,0x02,0x24,
+0x03,0x00,0x02,0x24,
+0x24,0x00,0x82,0x10,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x05,0x00,0xC2,0x24,
+0x04,0x00,0xA2,0x90,
+0x00,0x00,0x00,0x00,
+0x42,0x10,0x02,0x00,
+0x08,0x00,0xE0,0x03,
+0x96,0xFF,0x42,0x24,
+0x05,0x00,0xA3,0x90,
+0x00,0x00,0x00,0x00,
+0x60,0x00,0x64,0x30,
+0x42,0x21,0x04,0x00,
+0x0F,0x00,0x82,0x10,
+0x1F,0x00,0x62,0x30,
+0x02,0x00,0x82,0x28,
+0x1F,0x00,0x40,0x14,
+0x02,0x00,0x02,0x24,
+0x16,0x00,0x82,0x10,
+0x1F,0x00,0x62,0x30,
+0x03,0x00,0x02,0x24,
+0xEC,0xFF,0x82,0x14,
+0x00,0x00,0x00,0x00,
+0x1F,0x00,0x62,0x30,
+0x40,0x10,0x02,0x00,
+0xDD,0xFF,0x03,0x24,
+0x23,0x30,0x62,0x00,
+0x08,0x00,0xE0,0x03,
+0x05,0x00,0xC2,0x24,
+0x40,0x10,0x02,0x00,
+0xF5,0xFF,0x03,0x24,
+0x2A,0x1A,0x00,0x08,
+0x23,0x30,0x62,0x00,
+0x3E,0x00,0x63,0x30,
+0x23,0x30,0x43,0x00,
+0x08,0x00,0xE0,0x03,
+0x05,0x00,0xC2,0x24,
+0x3E,0x00,0x63,0x30,
+0xDD,0xFF,0x02,0x24,
+0x32,0x1A,0x00,0x08,
+0x23,0x30,0x43,0x00,
+0x40,0x10,0x02,0x00,
+0xE9,0xFF,0x03,0x24,
+0x2A,0x1A,0x00,0x08,
+0x23,0x30,0x62,0x00,
+0x3E,0x00,0x63,0x30,
+0x32,0x1A,0x00,0x08,
+0x23,0x30,0x43,0x00,
+0xD1,0xFF,0x80,0x14,
+0x00,0x00,0x00,0x00,
+0x1F,0x00,0x62,0x30,
+0x40,0x10,0x02,0x00,
+0xF8,0xFF,0x03,0x24,
+0x2A,0x1A,0x00,0x08,
+0x23,0x30,0x62,0x00,
+0xCA,0xFF,0x80,0x14,
+0x00,0x00,0x00,0x00,
+0x3E,0x00,0x63,0x30,
+0xF8,0xFF,0x02,0x24,
+0x32,0x1A,0x00,0x08,
+0x23,0x30,0x43,0x00,
+0x63,0x00,0x82,0x24,
+0x77,0x00,0x42,0x2C,
+0x00,0x00,0x85,0x28,
+0x04,0x00,0x40,0x10,
+0x21,0x18,0x00,0x00,
+0x64,0x00,0x82,0x24,
+0x64,0x00,0x03,0x24,
+0x0B,0x18,0x45,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x02,0x80,0x09,0x3C,
+0x30,0x1F,0x28,0x25,
+0x80,0x36,0x06,0x8D,
+0xFF,0xFF,0x02,0x34,
+0x3F,0x00,0xC2,0x10,
+0x21,0x38,0x80,0x00,
+0x2B,0x10,0xC7,0x00,
+0x30,0x00,0x40,0x10,
+0x02,0x19,0x06,0x00,
+0x21,0x10,0xC7,0x00,
+0x23,0x10,0x43,0x00,
+0x10,0x00,0x46,0x24,
+0x80,0x36,0x06,0xAD,
+0x30,0x1F,0x26,0x25,
+0x04,0x00,0xC4,0x8C,
+0x84,0x36,0x02,0xAD,
+0xFF,0xFF,0x02,0x34,
+0x2F,0x00,0x82,0x10,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x87,0x00,
+0x1F,0x00,0x40,0x10,
+0x02,0x19,0x04,0x00,
+0x21,0x10,0x87,0x00,
+0x23,0x10,0x43,0x00,
+0x10,0x00,0x44,0x24,
+0x04,0x00,0xC4,0xAC,
+0x84,0x36,0xC2,0xAC,
+0xC0,0x10,0x05,0x00,
+0x21,0x10,0x45,0x00,
+0x80,0x10,0x02,0x00,
+0x21,0x10,0x45,0x00,
+0x30,0x1F,0x23,0x25,
+0x80,0x10,0x02,0x00,
+0x21,0x28,0x43,0x00,
+0x0C,0x24,0xA6,0x8C,
+0x00,0x21,0x07,0x00,
+0xFF,0xFF,0xC2,0x38,
+0x0A,0x30,0x82,0x00,
+0x2B,0x18,0xC7,0x00,
+0x07,0x00,0x60,0x10,
+0x21,0x10,0xC7,0x00,
+0x02,0x19,0x06,0x00,
+0x23,0x10,0x43,0x00,
+0x10,0x00,0x46,0x24,
+0x0C,0x24,0xA6,0xAC,
+0x08,0x00,0xE0,0x03,
+0x10,0x24,0xA2,0xAC,
+0x02,0x19,0x06,0x00,
+0x23,0x10,0x43,0x00,
+0x0C,0x24,0xA2,0xAC,
+0x08,0x00,0xE0,0x03,
+0x10,0x24,0xA2,0xAC,
+0x21,0x10,0x87,0x00,
+0x23,0x10,0x43,0x00,
+0x70,0x1A,0x00,0x08,
+0x04,0x00,0xC2,0xAC,
+0x21,0x10,0xC7,0x00,
+0x30,0x1F,0x26,0x25,
+0x04,0x00,0xC4,0x8C,
+0x23,0x10,0x43,0x00,
+0x80,0x36,0x02,0xAD,
+0x84,0x36,0x02,0xAD,
+0xFF,0xFF,0x02,0x34,
+0xD4,0xFF,0x82,0x14,
+0x2B,0x10,0x87,0x00,
+0x00,0x21,0x07,0x00,
+0x69,0x1A,0x00,0x08,
+0x04,0x00,0xC4,0xAC,
+0x00,0x31,0x04,0x00,
+0x5C,0x1A,0x00,0x08,
+0x80,0x36,0x06,0xAD,
+0xA0,0xFF,0xBD,0x27,
+0x54,0x00,0xB7,0xAF,
+0x5C,0x00,0xBF,0xAF,
+0x58,0x00,0xBE,0xAF,
+0x50,0x00,0xB6,0xAF,
+0x4C,0x00,0xB5,0xAF,
+0x48,0x00,0xB4,0xAF,
+0x44,0x00,0xB3,0xAF,
+0x40,0x00,0xB2,0xAF,
+0x3C,0x00,0xB1,0xAF,
+0x38,0x00,0xB0,0xAF,
+0x02,0x80,0x17,0x3C,
+0x02,0x80,0x02,0x3C,
+0x64,0x57,0x45,0x8C,
+0x00,0x80,0x04,0x3C,
+0x74,0x6A,0x83,0x24,
+0x64,0x57,0x44,0x24,
+0x25,0xB0,0x02,0x3C,
+0x18,0x03,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0x7F,0x00,0xA4,0x10,
+0x02,0x80,0x09,0x3C,
+0x02,0x80,0x02,0x3C,
+0x40,0xEB,0x29,0x25,
+0x44,0xEB,0x42,0x24,
+0x00,0x00,0x35,0x8D,
+0x00,0x00,0x53,0x8C,
+0x02,0x80,0x03,0x3C,
+0x48,0xEB,0x63,0x24,
+0x00,0x00,0x7E,0x8C,
+0x34,0x38,0xB4,0x8E,
+0x21,0x20,0x00,0x00,
+0x21,0xB0,0x00,0x00,
+0x08,0x00,0x82,0x8E,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x62,0xAE,
+0x08,0x00,0x83,0x96,
+0x02,0x80,0x02,0x3C,
+0xB0,0x01,0x00,0x0C,
+0x25,0x90,0x62,0x00,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0xAC,0x1B,0xA3,0x96,
+0xD0,0x37,0xA2,0x8E,
+0x00,0x00,0x00,0x00,
+0x21,0x10,0x43,0x00,
+0x00,0x00,0xC2,0xAF,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0xF4,0x1A,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x17,0x00,0xC7,0x90,
+0x16,0x00,0xC8,0x90,
+0x32,0x3B,0xA2,0x96,
+0xFF,0x00,0xE3,0x30,
+0x00,0x1A,0x03,0x00,
+0xFF,0x00,0x05,0x31,
+0x25,0x18,0x65,0x00,
+0xB7,0x00,0x43,0x10,
+0x24,0xE3,0x24,0x25,
+0xFF,0x00,0xE2,0x30,
+0xFF,0x00,0x03,0x31,
+0x00,0x12,0x02,0x00,
+0x25,0x10,0x43,0x00,
+0x32,0x3B,0xA2,0xA6,
+0x01,0x00,0xC4,0x90,
+0x00,0x00,0xC2,0x90,
+0x00,0x22,0x04,0x00,
+0x88,0x0C,0x00,0x0C,
+0x25,0x20,0x82,0x00,
+0x40,0x18,0x02,0x00,
+0x21,0x18,0x62,0x00,
+0x80,0x18,0x03,0x00,
+0x94,0xDE,0xE2,0x26,
+0x21,0x18,0x62,0x00,
+0x08,0x00,0x62,0x8C,
+0x00,0x00,0x00,0x00,
+0x09,0xF8,0x40,0x00,
+0x21,0x20,0x20,0x02,
+0x0C,0x00,0x82,0x8E,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0xC2,0x02,
+0x2C,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x42,0x8E,
+0x21,0x88,0x40,0x02,
+0x42,0x1B,0x02,0x00,
+0x78,0x00,0x63,0x30,
+0x02,0x26,0x02,0x00,
+0xFF,0x3F,0x42,0x30,
+0x21,0x10,0x43,0x00,
+0x03,0x00,0x84,0x30,
+0x21,0x10,0x44,0x00,
+0x18,0x00,0x42,0x24,
+0xFF,0xFF,0x50,0x30,
+0x7F,0x00,0x02,0x32,
+0x80,0x00,0x03,0x26,
+0x00,0x00,0x70,0xAE,
+0x02,0x00,0x40,0x10,
+0x80,0xFF,0x05,0x32,
+0x80,0xFF,0x65,0x30,
+0x00,0x00,0x65,0xAE,
+0x02,0x00,0x22,0x96,
+0x21,0x18,0xC5,0x02,
+0xFF,0xFF,0x76,0x30,
+0x0F,0x00,0x42,0x30,
+0x00,0x00,0x62,0xAE,
+0x00,0x00,0x23,0x8E,
+0x21,0x90,0x45,0x02,
+0x42,0x13,0x03,0x00,
+0x78,0x00,0x42,0x30,
+0x02,0x1E,0x03,0x00,
+0x21,0x10,0x51,0x00,
+0x03,0x00,0x63,0x30,
+0x21,0x10,0x43,0x00,
+0x18,0x00,0x46,0x24,
+0x00,0x00,0x66,0xAE,
+0x01,0x00,0xC2,0x90,
+0x00,0x00,0x00,0x00,
+0x00,0x12,0x02,0x00,
+0x00,0x08,0x42,0x30,
+0xB9,0xFF,0x40,0x14,
+0x02,0x80,0x09,0x3C,
+0x16,0x00,0xC8,0x90,
+0x17,0x00,0xC7,0x90,
+0xDD,0x1A,0x00,0x08,
+0xFF,0x00,0xE2,0x30,
+0x00,0x60,0x10,0x40,
+0x01,0x00,0x01,0x36,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x04,0x00,0x83,0x8E,
+0x00,0x00,0x82,0x8E,
+0x21,0x20,0x80,0x02,
+0x00,0x00,0x62,0xAC,
+0x04,0x00,0x43,0xAC,
+0x00,0x00,0x94,0xAE,
+0x3D,0x24,0x00,0x0C,
+0x04,0x00,0x94,0xAE,
+0x00,0x60,0x90,0x40,
+0x02,0x80,0x02,0x3C,
+0x64,0x57,0x43,0x8C,
+0x64,0x57,0x42,0x24,
+0x8B,0xFF,0x62,0x14,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x03,0x3C,
+0x40,0xEB,0x63,0x24,
+0x00,0x00,0x71,0x8C,
+0x25,0xB0,0x10,0x3C,
+0x04,0x01,0x02,0x36,
+0x00,0x00,0x43,0x8C,
+0xE8,0x37,0x27,0x8E,
+0x00,0x00,0x00,0x00,
+0xC8,0x00,0xE3,0x10,
+0xEC,0x37,0x23,0xAE,
+0x2B,0x10,0x67,0x00,
+0xD2,0x00,0x40,0x14,
+0x2B,0x10,0xE3,0x00,
+0x08,0x01,0x40,0x14,
+0x02,0x80,0x09,0x3C,
+0x30,0x1F,0x24,0x25,
+0xBC,0x37,0x83,0x94,
+0x02,0x80,0x02,0x3C,
+0x21,0x80,0x00,0x00,
+0x2F,0x00,0xC0,0x1A,
+0x25,0xA8,0x62,0x00,
+0x21,0x98,0x80,0x00,
+0x21,0x90,0x00,0x00,
+0x01,0x00,0x1E,0x24,
+0x21,0x88,0x55,0x02,
+0x00,0x00,0x22,0x8E,
+0x98,0x3E,0x63,0x8E,
+0xFF,0x3F,0x42,0x30,
+0x21,0x18,0x62,0x00,
+0x98,0x3E,0x63,0xAE,
+0x00,0x60,0x04,0x40,
+0x01,0x00,0x81,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0xD4,0x1E,0x62,0x8E,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xD4,0x1E,0x62,0xAE,
+0x00,0x60,0x84,0x40,
+0x04,0x00,0x22,0x8E,
+0x02,0x00,0x03,0x24,
+0x02,0x17,0x02,0x00,
+0x03,0x00,0x42,0x30,
+0x39,0x00,0x43,0x10,
+0x02,0x80,0x03,0x3C,
+0x21,0x10,0x55,0x02,
+0x00,0x00,0x43,0x8C,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x60,0x10,
+0x01,0x00,0x02,0x26,
+0x04,0x00,0x22,0x8E,
+0x00,0xF0,0x03,0x3C,
+0x00,0x20,0x04,0x3C,
+0x24,0x10,0x43,0x00,
+0x10,0x00,0x44,0x10,
+0x02,0x80,0x09,0x3C,
+0x06,0x00,0x02,0x26,
+0x00,0x00,0x23,0x8E,
+0xFF,0xFF,0x50,0x30,
+0x82,0x16,0x03,0x00,
+0x01,0x00,0x42,0x30,
+0x52,0x00,0x5E,0x10,
+0x02,0x80,0x04,0x3C,
+0x80,0x90,0x10,0x00,
+0x2A,0x10,0x56,0x02,
+0xD7,0xFF,0x40,0x14,
+0x21,0x88,0x55,0x02,
+0x3D,0x24,0x00,0x0C,
+0x21,0x20,0x80,0x02,
+0x08,0x1C,0x00,0x08,
+0x02,0x80,0x02,0x3C,
+0x40,0xEB,0x29,0x25,
+0x00,0x00,0x25,0x8D,
+0x00,0x00,0x00,0x00,
+0xD4,0x1D,0xA2,0x8C,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xD4,0x1D,0xA2,0xAC,
+0x0C,0x00,0x24,0x8E,
+0x0C,0x00,0x02,0x24,
+0x3F,0x00,0x83,0x30,
+0xBD,0x00,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0x0D,0x00,0x02,0x24,
+0xB3,0x00,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0x3F,0x00,0x83,0x30,
+0x0E,0x00,0x02,0x24,
+0xE0,0xFF,0x62,0x14,
+0x06,0x00,0x02,0x26,
+0x02,0x80,0x03,0x3C,
+0x30,0x1F,0x63,0x24,
+0xE0,0x1D,0x62,0x8C,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0x69,0x1B,0x00,0x08,
+0xE0,0x1D,0x62,0xAC,
+0x2F,0x55,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xEF,0x1A,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0xF4,0x5E,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0xC6,0xFF,0x40,0x10,
+0x21,0x10,0x55,0x02,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0xF4,0x5E,0x62,0x90,
+0x02,0x80,0x04,0x3C,
+0xF8,0xE8,0x85,0x24,
+0xFF,0x00,0x42,0x30,
+0x80,0x10,0x02,0x00,
+0x21,0x10,0x45,0x00,
+0x00,0x00,0x43,0x8C,
+0x00,0x00,0x24,0x8E,
+0x04,0x00,0x25,0x8E,
+0x09,0xF8,0x60,0x00,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x09,0x3C,
+0xF6,0x5E,0x22,0x91,
+0x0C,0x00,0x03,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x10,
+0x02,0x80,0x03,0x3C,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x5F,0x1B,0x00,0x08,
+0x21,0x10,0x55,0x02,
+0x0D,0x5F,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0xF8,0xFF,0x40,0x10,
+0x02,0x80,0x04,0x3C,
+0x13,0x5F,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0x13,0x5F,0x82,0xA0,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x5F,0x1B,0x00,0x08,
+0x21,0x10,0x55,0x02,
+0x30,0x1F,0x82,0x8C,
+0x00,0x00,0x00,0x00,
+0x02,0x12,0x02,0x00,
+0x0F,0x00,0x42,0x30,
+0x05,0x00,0x5E,0x10,
+0xC2,0x13,0x03,0x00,
+0x1E,0x00,0x42,0x30,
+0x21,0x10,0x50,0x00,
+0x70,0x1B,0x00,0x08,
+0xFF,0xFF,0x50,0x30,
+0x02,0x00,0x62,0x92,
+0x00,0x00,0x00,0x00,
+0x1C,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x04,0x00,0x23,0x8E,
+0x00,0x00,0x00,0x00,
+0x02,0x14,0x03,0x00,
+0x0F,0x00,0x42,0x30,
+0x14,0x00,0x40,0x14,
+0x02,0x17,0x03,0x00,
+0x03,0x00,0x44,0x30,
+0x08,0x00,0x80,0x10,
+0x00,0xC0,0x02,0x3C,
+0x24,0x10,0x62,0x00,
+0x0E,0x00,0x40,0x14,
+0x03,0x00,0x02,0x24,
+0x0C,0x00,0x82,0x10,
+0x00,0x00,0x00,0x00,
+0x0A,0x00,0x80,0x10,
+0x00,0x00,0x00,0x00,
+0x80,0x28,0x10,0x00,
+0x21,0x28,0xB5,0x00,
+0xF7,0x19,0x00,0x0C,
+0x21,0x20,0x20,0x02,
+0x4C,0x1A,0x00,0x0C,
+0x21,0x20,0x40,0x00,
+0x21,0x20,0x40,0x00,
+0x56,0x1A,0x00,0x0C,
+0x21,0x28,0x00,0x00,
+0x02,0x00,0x62,0x92,
+0x00,0x00,0x00,0x00,
+0x8B,0x00,0x5E,0x10,
+0x00,0x00,0x00,0x00,
+0x02,0x00,0x63,0x92,
+0x02,0x00,0x02,0x24,
+0x71,0x00,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x02,0x3C,
+0x4C,0x00,0x42,0x34,
+0x00,0x00,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0x03,0x00,0x63,0x30,
+0x08,0x00,0x7E,0x10,
+0xD0,0x02,0x02,0x24,
+0x00,0x00,0x23,0x8E,
+0x00,0x00,0x00,0x00,
+0xC2,0x13,0x03,0x00,
+0x1E,0x00,0x42,0x30,
+0x21,0x10,0x50,0x00,
+0x70,0x1B,0x00,0x08,
+0xFF,0xFF,0x50,0x30,
+0x80,0x36,0x62,0xAE,
+0x00,0x00,0x23,0x8E,
+0xFA,0x1B,0x00,0x08,
+0xC2,0x13,0x03,0x00,
+0x02,0x80,0x09,0x3C,
+0x00,0x01,0x02,0x36,
+0x30,0x1F,0x29,0x25,
+0x00,0x00,0x47,0xAC,
+0xE8,0x37,0x27,0xAD,
+0x02,0x80,0x02,0x3C,
+0x08,0x04,0x44,0x24,
+0x21,0x28,0x00,0x00,
+0x21,0x30,0x00,0x00,
+0x91,0x3C,0x00,0x0C,
+0x21,0x38,0x00,0x00,
+0xAA,0x1A,0x00,0x08,
+0x02,0x80,0x02,0x3C,
+0xF0,0x37,0x22,0x8E,
+0xFF,0xFF,0x73,0x30,
+0x23,0x10,0x47,0x00,
+0xFF,0xFF,0x52,0x30,
+0x21,0x18,0x53,0x02,
+0xFF,0xFF,0x76,0x30,
+0x25,0x24,0x00,0x0C,
+0x21,0x20,0xC0,0x02,
+0xEF,0xFF,0x40,0x10,
+0x21,0xA0,0x40,0x00,
+0x08,0x00,0x42,0x8C,
+0xE8,0x37,0x26,0x8E,
+0x21,0x38,0x40,0x02,
+0x21,0x18,0x56,0x00,
+0xB8,0x37,0x23,0xAE,
+0x21,0x28,0x40,0x00,
+0x08,0x00,0x04,0x24,
+0xBC,0x37,0x22,0xAE,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA0,0xAF,
+0xB0,0x01,0x00,0x0C,
+0x08,0x00,0x04,0x24,
+0xBC,0x37,0x25,0x8E,
+0x24,0x10,0x02,0x3C,
+0x00,0x01,0x10,0x36,
+0x00,0x00,0x02,0xAE,
+0x21,0x38,0x60,0x02,
+0x21,0x28,0xB2,0x00,
+0x08,0x00,0x04,0x24,
+0x24,0x10,0x06,0x3C,
+0xE8,0x37,0x22,0xAE,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA0,0xAF,
+0xEC,0x37,0x23,0x8E,
+0x08,0x00,0x04,0x24,
+0xB0,0x01,0x00,0x0C,
+0xE8,0x37,0x23,0xAE,
+0xE8,0x37,0x22,0x8E,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x02,0xAE,
+0x40,0x1B,0x00,0x08,
+0x02,0x80,0x09,0x3C,
+0xDC,0x1D,0xA2,0x8C,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xDC,0x1D,0xA2,0xAC,
+0x0C,0x00,0x24,0x8E,
+0x88,0x1B,0x00,0x08,
+0x3F,0x00,0x83,0x30,
+0xD8,0x1D,0xA2,0x8C,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xD8,0x1D,0xA2,0xAC,
+0x0C,0x00,0x24,0x8E,
+0x84,0x1B,0x00,0x08,
+0x3F,0x00,0x83,0x30,
+0x23,0x10,0x67,0x00,
+0xFF,0xFF,0x56,0x30,
+0x25,0x24,0x00,0x0C,
+0x21,0x20,0xC0,0x02,
+0x4A,0x00,0x40,0x10,
+0x21,0xA0,0x40,0x00,
+0x08,0x00,0x42,0x8C,
+0xE8,0x37,0x26,0x8E,
+0x08,0x00,0x04,0x24,
+0x21,0x18,0x56,0x00,
+0xB8,0x37,0x23,0xAE,
+0x21,0x28,0x40,0x00,
+0x21,0x38,0xC0,0x02,
+0xBC,0x37,0x22,0xAE,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA0,0xAF,
+0xEC,0x37,0x23,0x8E,
+0x08,0x00,0x04,0x24,
+0xB0,0x01,0x00,0x0C,
+0xE8,0x37,0x23,0xAE,
+0xE8,0x37,0x23,0x8E,
+0x00,0x01,0x02,0x36,
+0x00,0x00,0x43,0xAC,
+0x40,0x1B,0x00,0x08,
+0x02,0x80,0x09,0x3C,
+0x04,0x00,0x23,0x8E,
+0x00,0x00,0x00,0x00,
+0x02,0x14,0x03,0x00,
+0x0F,0x00,0x42,0x30,
+0x08,0x00,0x42,0x28,
+0x8B,0xFF,0x40,0x10,
+0x25,0xB0,0x02,0x3C,
+0x02,0x17,0x03,0x00,
+0x03,0x00,0x42,0x30,
+0x86,0xFF,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x80,0x28,0x10,0x00,
+0x21,0x28,0xB5,0x00,
+0xF7,0x19,0x00,0x0C,
+0x21,0x20,0x20,0x02,
+0x4C,0x1A,0x00,0x0C,
+0x21,0x20,0x40,0x00,
+0x21,0x20,0x40,0x00,
+0x56,0x1A,0x00,0x0C,
+0x21,0x28,0x00,0x00,
+0xF1,0x1B,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x04,0x00,0x23,0x8E,
+0x00,0x00,0x00,0x00,
+0x02,0x14,0x03,0x00,
+0x0F,0x00,0x42,0x30,
+0x08,0x00,0x42,0x28,
+0x06,0x00,0x40,0x10,
+0x00,0xC0,0x02,0x3C,
+0x02,0x17,0x03,0x00,
+0x03,0x00,0x42,0x30,
+0x0C,0x00,0x40,0x10,
+0x80,0x28,0x10,0x00,
+0x00,0xC0,0x02,0x3C,
+0x24,0x10,0x62,0x00,
+0x68,0xFF,0x40,0x14,
+0x02,0x17,0x03,0x00,
+0x03,0x00,0x42,0x30,
+0x03,0x00,0x03,0x24,
+0x64,0xFF,0x43,0x10,
+0x00,0x00,0x00,0x00,
+0x62,0xFF,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x80,0x28,0x10,0x00,
+0x21,0x28,0xB5,0x00,
+0xF7,0x19,0x00,0x0C,
+0x21,0x20,0x20,0x02,
+0x4C,0x1A,0x00,0x0C,
+0x21,0x20,0x40,0x00,
+0x21,0x20,0x40,0x00,
+0x56,0x1A,0x00,0x0C,
+0x21,0x28,0x00,0x00,
+0xEC,0x1B,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0xEC,0x37,0x23,0x8E,
+0x00,0x01,0x02,0x36,
+0x00,0x00,0x43,0xAC,
+0x07,0x1C,0x00,0x08,
+0xE8,0x37,0x23,0xAE,
+0xB8,0xFF,0xBD,0x27,
+0x25,0xB0,0x03,0x3C,
+0x44,0x00,0xBF,0xAF,
+0x40,0x00,0xBE,0xAF,
+0x3C,0x00,0xB7,0xAF,
+0x38,0x00,0xB6,0xAF,
+0x34,0x00,0xB5,0xAF,
+0x30,0x00,0xB4,0xAF,
+0x2C,0x00,0xB3,0xAF,
+0x28,0x00,0xB2,0xAF,
+0x24,0x00,0xB1,0xAF,
+0x20,0x00,0xB0,0xAF,
+0x44,0x00,0x63,0x34,
+0x00,0x00,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x00,0x16,0x02,0x00,
+0x03,0x16,0x02,0x00,
+0x0E,0x00,0x40,0x04,
+0x18,0x00,0xA0,0xAF,
+0x21,0x20,0x60,0x00,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0xFF,0x42,0x30,
+0x64,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x00,0x00,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x00,0x16,0x02,0x00,
+0x03,0x16,0x02,0x00,
+0xF6,0xFF,0x41,0x04,
+0x21,0x10,0x00,0x00,
+0x02,0x80,0x02,0x3C,
+0x74,0x57,0x43,0x8C,
+0x00,0x80,0x06,0x3C,
+0x6C,0x72,0xC2,0x24,
+0x25,0xB0,0x05,0x3C,
+0x02,0x80,0x06,0x3C,
+0x18,0x03,0xA4,0x34,
+0x74,0x57,0xD2,0x24,
+0x00,0x00,0x82,0xAC,
+0x67,0x00,0x72,0x10,
+0x01,0x00,0x16,0x24,
+0x11,0x11,0x02,0x3C,
+0x2A,0xB0,0x03,0x3C,
+0x22,0x22,0x5E,0x34,
+0x02,0x80,0x02,0x3C,
+0x21,0xB8,0x80,0x00,
+0x05,0x00,0x74,0x34,
+0x30,0x1F,0x55,0x24,
+0x01,0x00,0x13,0x24,
+0x00,0x00,0xFE,0xAE,
+0x21,0x00,0xC0,0x12,
+0x2A,0xB0,0x03,0x3C,
+0x02,0x80,0x03,0x3C,
+0xF4,0x5E,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x1B,0x00,0x40,0x10,
+0x21,0xB0,0x00,0x00,
+0x01,0x00,0x06,0x24,
+0x18,0x00,0xA6,0xAF,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x02,0x80,0x03,0x3C,
+0xF6,0x5E,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x0F,0x00,0x42,0x30,
+0x04,0x00,0x42,0x28,
+0x5F,0x00,0x40,0x14,
+0x04,0x00,0x04,0x24,
+0x02,0x80,0x06,0x3C,
+0xDE,0x5D,0xC2,0x90,
+0x00,0x00,0x00,0x00,
+0x02,0x00,0x42,0x30,
+0x55,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x00,0x08,0x04,0x24,
+0x00,0x02,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x01,0x00,0x06,0x24,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x2A,0xB0,0x03,0x3C,
+0x06,0x00,0x63,0x34,
+0x00,0x00,0x62,0x94,
+0x44,0x38,0xB1,0x8E,
+0x25,0xB0,0x06,0x3C,
+0xB0,0x03,0xC6,0x34,
+0x00,0xFF,0x42,0x30,
+0x00,0x00,0xD1,0xAC,
+0x0F,0x00,0x40,0x18,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0x4C,0xEB,0x42,0x24,
+0x50,0xEB,0x63,0x24,
+0x00,0x00,0x45,0x8C,
+0x00,0x00,0x64,0x8C,
+0x02,0x80,0x06,0x3C,
+0x54,0xEB,0xC6,0x24,
+0x00,0x00,0xC3,0x8C,
+0x00,0x00,0xA4,0xAC,
+0x00,0x00,0x62,0x94,
+0x00,0x00,0x00,0x00,
+0x00,0xFF,0x42,0x30,
+0xFB,0xFF,0x40,0x1C,
+0x00,0x00,0x00,0x00,
+0x0C,0x00,0x23,0x8E,
+0x00,0x00,0x00,0x00,
+0x07,0x00,0x62,0x30,
+0x47,0x00,0x40,0x14,
+0x08,0x00,0x62,0x24,
+0xC2,0x10,0x03,0x00,
+0x08,0x00,0x25,0x8E,
+0x04,0x37,0xA6,0x8E,
+0xC0,0x10,0x02,0x00,
+0x20,0x00,0x42,0x24,
+0xFF,0xFF,0x47,0x30,
+0x01,0x00,0x04,0x24,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xB3,0xAF,
+0xB0,0x01,0x00,0x0C,
+0x01,0x00,0x04,0x24,
+0x02,0x00,0x02,0x24,
+0x00,0x00,0x93,0xA2,
+0x00,0x00,0x82,0xA2,
+0x00,0x60,0x10,0x40,
+0x01,0x00,0x01,0x36,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x04,0x00,0x23,0x8E,
+0x00,0x00,0x22,0x8E,
+0x21,0x20,0x20,0x02,
+0x00,0x00,0x62,0xAC,
+0x04,0x00,0x43,0xAC,
+0x00,0x00,0x31,0xAE,
+0x3D,0x24,0x00,0x0C,
+0x04,0x00,0x31,0xAE,
+0x00,0x60,0x90,0x40,
+0x00,0x00,0x42,0x8E,
+0x00,0x00,0x00,0x00,
+0xA3,0xFF,0x52,0x14,
+0x00,0x00,0x00,0x00,
+0x18,0x00,0xA2,0x8F,
+0x00,0x00,0x00,0x00,
+0x07,0x00,0x40,0x10,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0xF4,0x5E,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x11,0x00,0x40,0x14,
+0x18,0x00,0xA0,0xAF,
+0x02,0x80,0x02,0x3C,
+0x08,0x08,0x44,0x24,
+0x21,0x28,0x00,0x00,
+0x21,0x30,0x00,0x00,
+0x91,0x3C,0x00,0x0C,
+0x21,0x38,0x00,0x00,
+0xBC,0x1C,0x00,0x08,
+0x02,0x80,0x02,0x3C,
+0x9B,0x30,0x00,0x0C,
+0x01,0x00,0x04,0x24,
+0xEA,0x1C,0x00,0x08,
+0x00,0x08,0x04,0x24,
+0x64,0x31,0x00,0x0C,
+0x01,0x00,0x05,0x24,
+0xE4,0x1C,0x00,0x08,
+0x02,0x80,0x06,0x3C,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x02,0x80,0x06,0x3C,
+0xF5,0x5E,0xC4,0x90,
+0x01,0x00,0x05,0x24,
+0x64,0x31,0x00,0x0C,
+0xFF,0x00,0x84,0x30,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x36,0x1D,0x00,0x08,
+0x02,0x80,0x02,0x3C,
+0x0E,0x1D,0x00,0x08,
+0xC2,0x10,0x02,0x00,
+0x10,0x00,0xE0,0x18,
+0x21,0x18,0x00,0x00,
+0x00,0x00,0xC0,0xAC,
+0x21,0x40,0x00,0x00,
+0x00,0x00,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x0C,0x00,0x45,0x10,
+0x21,0x18,0x80,0x00,
+0x01,0x00,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x21,0x18,0x48,0x00,
+0x02,0x00,0x68,0x24,
+0x21,0x10,0x82,0x00,
+0x2B,0x18,0x07,0x01,
+0xF5,0xFF,0x60,0x14,
+0x02,0x00,0x44,0x24,
+0x21,0x18,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x01,0x00,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xC2,0xAC,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x02,0x80,0x07,0x3C,
+0x30,0x1F,0xE5,0x24,
+0x22,0x3E,0xA3,0x90,
+0xFF,0x00,0x84,0x30,
+0x80,0x10,0x04,0x00,
+0x0C,0x00,0x60,0x14,
+0x21,0x30,0x45,0x00,
+0xC8,0x00,0x02,0x24,
+0x24,0x39,0xA2,0xAC,
+0x01,0x00,0x03,0x24,
+0x30,0x1F,0xE2,0x24,
+0x04,0x18,0x83,0x00,
+0x4C,0x3E,0xA4,0xA0,
+0x22,0x3E,0x44,0x90,
+0x00,0x00,0x00,0x00,
+0x25,0x18,0x64,0x00,
+0x08,0x00,0xE0,0x03,
+0x22,0x3E,0x43,0xA0,
+0x24,0x39,0xA3,0x8C,
+0xC8,0x00,0x02,0x24,
+0x23,0x10,0x43,0x00,
+0x24,0x3E,0xC2,0xAC,
+0x01,0x00,0x03,0x24,
+0x30,0x1F,0xE2,0x24,
+0x04,0x18,0x83,0x00,
+0x22,0x3E,0x44,0x90,
+0x00,0x00,0x00,0x00,
+0x25,0x18,0x64,0x00,
+0x08,0x00,0xE0,0x03,
+0x22,0x3E,0x43,0xA0,
+0xE0,0xFF,0xBD,0x27,
+0x14,0x00,0xB1,0xAF,
+0x02,0x80,0x11,0x3C,
+0x10,0x00,0xB0,0xAF,
+0x18,0x00,0xBF,0xAF,
+0x30,0x1F,0x25,0x26,
+0x4C,0x3E,0xA6,0x90,
+0x01,0x00,0x02,0x24,
+0x04,0x10,0xC2,0x00,
+0x06,0x00,0x40,0x14,
+0xC9,0x00,0x10,0x24,
+0x1A,0x3E,0xA2,0x90,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x30,
+0x23,0x00,0x40,0x14,
+0x21,0x20,0xC5,0x00,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x46,0x24,
+0x21,0x20,0x00,0x00,
+0x24,0x3E,0xC5,0x24,
+0x00,0x00,0xA2,0x8C,
+0x04,0x00,0xA5,0x24,
+0x05,0x00,0x40,0x10,
+0x2B,0x18,0x50,0x00,
+0x03,0x00,0x60,0x10,
+0x00,0x00,0x00,0x00,
+0x21,0x80,0x40,0x00,
+0x4C,0x3E,0xC4,0xA0,
+0x01,0x00,0x84,0x24,
+0x08,0x00,0x82,0x2C,
+0xF5,0xFF,0x40,0x14,
+0xC9,0x00,0x02,0x24,
+0x21,0x00,0x02,0x12,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x45,0x24,
+0x07,0x00,0x04,0x24,
+0x24,0x3E,0xA2,0x8C,
+0xFF,0xFF,0x84,0x24,
+0x02,0x00,0x40,0x10,
+0x23,0x18,0x50,0x00,
+0x24,0x3E,0xA3,0xAC,
+0xFA,0xFF,0x81,0x04,
+0x04,0x00,0xA5,0x24,
+0x30,0x1F,0x22,0x26,
+0x24,0x39,0x50,0xAC,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x44,0x3E,0x83,0x90,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x63,0x24,
+0xFF,0x00,0x62,0x30,
+0x03,0x00,0x42,0x2C,
+0xD8,0xFF,0x40,0x10,
+0x44,0x3E,0x83,0xA0,
+0x80,0x18,0x06,0x00,
+0x21,0x18,0x65,0x00,
+0xC8,0x00,0x02,0x24,
+0x03,0x00,0x04,0x24,
+0x21,0x28,0x00,0x00,
+0x90,0x14,0x00,0x0C,
+0x24,0x3E,0x62,0xAC,
+0x9C,0x1D,0x00,0x08,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x22,0x26,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x20,0x00,0xBD,0x27,
+0x22,0x3E,0x40,0xA0,
+0x08,0x00,0xE0,0x03,
+0x24,0x39,0x40,0xAC,
+0xB8,0xFF,0xBD,0x27,
+0x02,0x80,0x08,0x3C,
+0x02,0x80,0x0B,0x3C,
+0x02,0x80,0x0C,0x3C,
+0x40,0x00,0xBF,0xAF,
+0x3C,0x00,0xB5,0xAF,
+0x38,0x00,0xB4,0xAF,
+0x34,0x00,0xB3,0xAF,
+0x30,0x00,0xB2,0xAF,
+0x2C,0x00,0xB1,0xAF,
+0x28,0x00,0xB0,0xAF,
+0x40,0xED,0x63,0x25,
+0x3C,0xED,0x02,0x25,
+0x44,0xED,0x84,0x25,
+0x01,0x00,0x45,0x90,
+0x01,0x00,0x66,0x90,
+0x01,0x00,0x87,0x90,
+0x3C,0xED,0x0F,0x91,
+0x02,0x00,0x4A,0x90,
+0x40,0xED,0x6E,0x91,
+0x02,0x00,0x69,0x90,
+0x44,0xED,0x8D,0x91,
+0x02,0x00,0x88,0x90,
+0x03,0x00,0x4B,0x90,
+0x03,0x00,0x6C,0x90,
+0x03,0x00,0x82,0x90,
+0x00,0x2A,0x05,0x00,
+0x00,0x32,0x06,0x00,
+0x00,0x3A,0x07,0x00,
+0x25,0x28,0xAF,0x00,
+0x25,0x30,0xCE,0x00,
+0x25,0x38,0xED,0x00,
+0x00,0x54,0x0A,0x00,
+0x00,0x4C,0x09,0x00,
+0x00,0x44,0x08,0x00,
+0x25,0x50,0x45,0x01,
+0x25,0x48,0x26,0x01,
+0x25,0x40,0x07,0x01,
+0x00,0x5E,0x0B,0x00,
+0x00,0x66,0x0C,0x00,
+0x00,0x16,0x02,0x00,
+0x02,0x80,0x04,0x3C,
+0x25,0x58,0x6A,0x01,
+0x25,0x60,0x89,0x01,
+0x25,0x10,0x48,0x00,
+0x84,0x58,0x84,0x24,
+0x10,0x00,0xAB,0xAF,
+0x18,0x00,0xAC,0xAF,
+0x34,0x4F,0x00,0x0C,
+0x20,0x00,0xA2,0xAF,
+0x10,0x00,0x42,0x30,
+0x29,0x00,0x40,0x10,
+0x21,0x18,0x00,0x00,
+0x02,0x80,0x13,0x3C,
+0x30,0x1F,0x63,0x26,
+0xC4,0x39,0x62,0x8C,
+0x0C,0x00,0x10,0x24,
+0x2B,0x10,0x02,0x02,
+0x2C,0x00,0x40,0x10,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0xF8,0x58,0x51,0x24,
+0x02,0x59,0x72,0x24,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0xFA,0x58,0x54,0x24,
+0x26,0x1E,0x00,0x08,
+0x06,0x59,0x75,0x24,
+0xDD,0x00,0x02,0x24,
+0x21,0x20,0x14,0x02,
+0x2B,0x00,0x62,0x10,
+0x10,0x00,0xA5,0x27,
+0x21,0x10,0x11,0x02,
+0x01,0x00,0x43,0x90,
+0x30,0x1F,0x64,0x26,
+0xC4,0x39,0x82,0x8C,
+0x21,0x18,0x70,0x00,
+0x02,0x00,0x70,0x24,
+0x2B,0x10,0x02,0x02,
+0x17,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x21,0x10,0x11,0x02,
+0x00,0x00,0x43,0x90,
+0x30,0x00,0x02,0x24,
+0x21,0x20,0x12,0x02,
+0x20,0x00,0xA5,0x27,
+0xED,0xFF,0x62,0x14,
+0x04,0x00,0x06,0x24,
+0x39,0x52,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xEE,0xFF,0x40,0x14,
+0x21,0x10,0x11,0x02,
+0x01,0x00,0x03,0x24,
+0x40,0x00,0xBF,0x8F,
+0x3C,0x00,0xB5,0x8F,
+0x38,0x00,0xB4,0x8F,
+0x34,0x00,0xB3,0x8F,
+0x30,0x00,0xB2,0x8F,
+0x2C,0x00,0xB1,0x8F,
+0x28,0x00,0xB0,0x8F,
+0x21,0x10,0x60,0x00,
+0x08,0x00,0xE0,0x03,
+0x48,0x00,0xBD,0x27,
+0x40,0x00,0xBF,0x8F,
+0x3C,0x00,0xB5,0x8F,
+0x38,0x00,0xB4,0x8F,
+0x34,0x00,0xB3,0x8F,
+0x30,0x00,0xB2,0x8F,
+0x2C,0x00,0xB1,0x8F,
+0x28,0x00,0xB0,0x8F,
+0x21,0x18,0x00,0x00,
+0x21,0x10,0x60,0x00,
+0x08,0x00,0xE0,0x03,
+0x48,0x00,0xBD,0x27,
+0x39,0x52,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x21,0x20,0x15,0x02,
+0x18,0x00,0xA5,0x27,
+0xD1,0xFF,0x40,0x14,
+0x04,0x00,0x06,0x24,
+0x39,0x52,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xCE,0xFF,0x40,0x14,
+0x21,0x10,0x11,0x02,
+0x32,0x1E,0x00,0x08,
+0x01,0x00,0x03,0x24,
+0x02,0x80,0x02,0x3C,
+0x38,0x5D,0x43,0x94,
+0x00,0x00,0x00,0x00,
+0x80,0x18,0x03,0x00,
+0xB8,0x0B,0x62,0x28,
+0x04,0x00,0x40,0x14,
+0xB8,0x0B,0x04,0x24,
+0x21,0x4E,0x62,0x28,
+0x20,0x4E,0x04,0x24,
+0x0B,0x20,0x62,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x80,0x00,
+0x21,0x38,0x80,0x00,
+0x08,0x00,0xC0,0x10,
+0xFF,0xFF,0xC3,0x24,
+0xFF,0xFF,0x06,0x24,
+0x00,0x00,0xA2,0x8C,
+0xFF,0xFF,0x63,0x24,
+0x04,0x00,0xA5,0x24,
+0x00,0x00,0xE2,0xAC,
+0xFB,0xFF,0x66,0x14,
+0x04,0x00,0xE7,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x80,0x00,
+0x25,0xB0,0x03,0x3C,
+0xD8,0xFF,0xBD,0x27,
+0x20,0x00,0xBF,0xAF,
+0x1C,0x00,0xB1,0xAF,
+0x18,0x00,0xB0,0xAF,
+0x94,0x0E,0x65,0x34,
+0x9C,0x0E,0x66,0x34,
+0xA4,0x0E,0x67,0x34,
+0xAC,0x0E,0x68,0x34,
+0x02,0x80,0x02,0x3C,
+0x00,0x00,0xA9,0x8C,
+0x30,0x1F,0x58,0x24,
+0x00,0x00,0xCC,0x8C,
+0x00,0x00,0xF1,0x8C,
+0x00,0x00,0x05,0x8D,
+0x0C,0x00,0x07,0x8F,
+0x10,0x00,0x08,0x8F,
+0xFF,0x03,0x0A,0x3C,
+0xB4,0x0E,0x62,0x34,
+0x00,0x00,0x4B,0x8C,
+0x24,0x48,0x2A,0x01,
+0x00,0xFC,0x02,0x24,
+0x24,0x28,0xAA,0x00,
+0xBC,0x0E,0x66,0x34,
+0x24,0x40,0x02,0x01,
+0x02,0x4C,0x09,0x00,
+0x24,0x38,0xE2,0x00,
+0x02,0x2C,0x05,0x00,
+0xF0,0xFF,0x02,0x3C,
+0x00,0x00,0xD0,0x8C,
+0xFF,0x03,0x42,0x34,
+0xCC,0x0E,0x66,0x34,
+0x25,0x38,0xE9,0x00,
+0xC4,0x0E,0x63,0x34,
+0x25,0x40,0x05,0x01,
+0x08,0x00,0x0D,0x8F,
+0x00,0x00,0x6F,0x8C,
+0x24,0x40,0x02,0x01,
+0x00,0x00,0xCE,0x8C,
+0x24,0x38,0xE2,0x00,
+0x24,0x60,0x8A,0x01,
+0x24,0x58,0x6A,0x01,
+0xFF,0x9F,0x02,0x3C,
+0x82,0x61,0x0C,0x00,
+0x82,0x59,0x0B,0x00,
+0xFF,0xFF,0x42,0x34,
+0x0F,0xC0,0x05,0x3C,
+0xFF,0xFF,0xA5,0x34,
+0x25,0x38,0xEC,0x00,
+0x25,0x40,0x0B,0x01,
+0x24,0x68,0xA2,0x01,
+0xFF,0x00,0x0B,0x3C,
+0x00,0xFF,0x82,0x30,
+0x24,0x88,0x2A,0x02,
+0x24,0x80,0x0A,0x02,
+0x24,0x18,0x8B,0x00,
+0x24,0x40,0x05,0x01,
+0x21,0x48,0x80,0x00,
+0x02,0x62,0x02,0x00,
+0x24,0x38,0xE5,0x00,
+0x00,0x20,0x02,0x3C,
+0x24,0x70,0xCA,0x01,
+0x00,0x89,0x11,0x00,
+0x00,0x81,0x10,0x00,
+0x24,0x78,0xEA,0x01,
+0x00,0xFF,0x6B,0x35,
+0x25,0x68,0xA2,0x01,
+0x02,0x1C,0x03,0x00,
+0x02,0x80,0x04,0x3C,
+0x25,0x38,0xF1,0x00,
+0x25,0x40,0x10,0x01,
+0x02,0x7C,0x0F,0x00,
+0x02,0x74,0x0E,0x00,
+0x24,0x48,0x2B,0x01,
+0xDC,0xE3,0x84,0x24,
+0x21,0x28,0x80,0x01,
+0x21,0x30,0x60,0x00,
+0x12,0x00,0x02,0x24,
+0x08,0x00,0x0D,0xAF,
+0x0C,0x00,0x07,0xAF,
+0x10,0x00,0x08,0xAF,
+0x14,0x00,0x0F,0xA7,
+0x0A,0x00,0x20,0x15,
+0x16,0x00,0x0E,0xA7,
+0x10,0x00,0xA4,0x27,
+0xC7,0x02,0x02,0xA3,
+0xC8,0x5C,0x00,0x0C,
+0xC3,0x02,0x02,0xA3,
+0x20,0x00,0xBF,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0xC7,0x02,0x03,0xA3,
+0x2F,0x55,0x00,0x0C,
+0xC3,0x02,0x0C,0xA3,
+0xC8,0x5C,0x00,0x0C,
+0x10,0x00,0xA4,0x27,
+0x20,0x00,0xBF,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0xC8,0xFF,0xBD,0x27,
+0x28,0x00,0xB6,0xAF,
+0x25,0xB0,0x02,0x3C,
+0x00,0x80,0x16,0x3C,
+0x48,0x7B,0xC3,0x26,
+0x18,0x03,0x42,0x34,
+0x30,0x00,0xBE,0xAF,
+0x2C,0x00,0xB7,0xAF,
+0x24,0x00,0xB5,0xAF,
+0x20,0x00,0xB4,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x34,0x00,0xBF,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x00,0x00,0x43,0xAC,
+0x21,0x98,0x00,0x00,
+0x02,0x80,0x15,0x3C,
+0x00,0x80,0x1E,0x3C,
+0x02,0x80,0x14,0x3C,
+0x02,0x80,0x17,0x3C,
+0x25,0xB0,0x10,0x3C,
+0x18,0x03,0x02,0x36,
+0x48,0x7B,0xC3,0x26,
+0x00,0x00,0x43,0xAC,
+0x30,0x1F,0xB1,0x26,
+0x7C,0x36,0x24,0x96,
+0x70,0x03,0x05,0x36,
+0x00,0x00,0xB2,0x8C,
+0x01,0x00,0x84,0x24,
+0x03,0x00,0x40,0x12,
+0x7C,0x36,0x24,0xA6,
+0x01,0x00,0x62,0x26,
+0xFF,0xFF,0x53,0x30,
+0xFF,0x00,0x04,0x3C,
+0xFF,0xFF,0x82,0x34,
+0x2B,0x10,0x52,0x00,
+0x47,0x00,0x40,0x10,
+0x00,0x50,0x62,0x2E,
+0x00,0xFF,0x06,0x3C,
+0xFF,0x00,0xC2,0x34,
+0x00,0xFD,0x05,0x3C,
+0x24,0x18,0x42,0x02,
+0x29,0x00,0xA2,0x34,
+0xA7,0x01,0x62,0x10,
+0x2B,0x10,0x43,0x00,
+0x46,0x00,0x40,0x14,
+0xAC,0x00,0xA2,0x34,
+0x00,0xF2,0x06,0x3C,
+0x01,0x00,0xC2,0x34,
+0xB8,0x01,0x62,0x10,
+0x2B,0x10,0x43,0x00,
+0x7D,0x00,0x40,0x14,
+0x07,0x00,0xA2,0x34,
+0x00,0xF0,0x05,0x3C,
+0x03,0x00,0xA2,0x34,
+0xD5,0x01,0x62,0x10,
+0x2B,0x10,0x43,0x00,
+0xC8,0x00,0x40,0x14,
+0x00,0xF1,0x07,0x3C,
+0x21,0x02,0x65,0x10,
+0x00,0xFF,0x82,0x34,
+0x2B,0x10,0xA3,0x00,
+0x48,0x01,0x40,0x14,
+0x01,0x00,0xA2,0x34,
+0x00,0xE0,0x02,0x3C,
+0x73,0x01,0x62,0x10,
+0x00,0xFF,0x48,0x32,
+0x25,0xB0,0x02,0x3C,
+0x70,0x03,0x42,0x34,
+0x21,0x98,0x00,0x00,
+0x00,0x00,0x40,0xAC,
+0x25,0xB0,0x04,0x3C,
+0x18,0x03,0x82,0x34,
+0x48,0x7C,0xC3,0x27,
+0x00,0x00,0x43,0xAC,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x6C,0x57,0x82,0x8E,
+0x6C,0x57,0x83,0x26,
+0x10,0x00,0x43,0x10,
+0x02,0x80,0x02,0x3C,
+0xBF,0x00,0x92,0x34,
+0x30,0x1F,0x51,0x24,
+0x21,0x80,0x60,0x00,
+0x00,0x00,0x42,0x92,
+0x00,0x00,0x00,0x00,
+0x04,0x00,0x42,0x2C,
+0x08,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x3C,0x38,0x24,0x8E,
+0xB4,0x08,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x6C,0x57,0x83,0x8E,
+0x00,0x00,0x00,0x00,
+0xF5,0xFF,0x70,0x14,
+0x00,0x00,0x00,0x00,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x21,0x28,0x00,0x00,
+0x08,0x10,0xE4,0x26,
+0x21,0x30,0x00,0x00,
+0x91,0x3C,0x00,0x0C,
+0x21,0x38,0x00,0x00,
+0xE8,0x1E,0x00,0x08,
+0x25,0xB0,0x10,0x3C,
+0xDA,0xFF,0x40,0x14,
+0x74,0x03,0x03,0x36,
+0xFF,0xFF,0x02,0x24,
+0x21,0x98,0x00,0x00,
+0x00,0x00,0xA0,0xAC,
+0x00,0x00,0x62,0xAC,
+0x1B,0x1F,0x00,0x08,
+0x25,0xB0,0x04,0x3C,
+0x84,0x01,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x43,0x00,
+0x1E,0x00,0x40,0x14,
+0x00,0xFE,0x07,0x3C,
+0xA4,0x00,0xA2,0x34,
+0x8F,0x01,0x62,0x10,
+0x2B,0x10,0x43,0x00,
+0x47,0x00,0x40,0x14,
+0xA7,0x00,0xA2,0x34,
+0xA1,0x00,0xA2,0x34,
+0xEA,0x01,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x43,0x00,
+0xAD,0x00,0x40,0x14,
+0xA2,0x00,0xA2,0x34,
+0xA0,0x00,0xA2,0x34,
+0xBE,0xFF,0x62,0x14,
+0x25,0xB0,0x02,0x3C,
+0x00,0x0F,0x42,0x32,
+0x02,0x22,0x02,0x00,
+0x01,0x00,0x03,0x24,
+0x96,0x02,0x83,0x10,
+0x00,0x00,0x00,0x00,
+0x02,0x00,0x02,0x24,
+0x8F,0x02,0x82,0x10,
+0x00,0x00,0x00,0x00,
+0x03,0x00,0x02,0x24,
+0x88,0x02,0x82,0x10,
+0x00,0x00,0x00,0x00,
+0xCD,0x5A,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x12,0x00,0xE2,0x34,
+0x65,0x01,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x43,0x00,
+0x37,0x00,0x40,0x14,
+0x1A,0x00,0xE2,0x34,
+0xAF,0x00,0xA2,0x34,
+0xC8,0x01,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x43,0x00,
+0x97,0x00,0x40,0x14,
+0x10,0x00,0xE2,0x34,
+0xAD,0x00,0xA2,0x34,
+0x44,0x02,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0xAE,0x00,0xA2,0x34,
+0x9C,0xFF,0x62,0x14,
+0x02,0x24,0x12,0x00,
+0x00,0xFF,0x45,0x32,
+0xFF,0x00,0x84,0x30,
+0x58,0x5A,0x00,0x0C,
+0x02,0x2A,0x05,0x00,
+0x25,0xB0,0x03,0x3C,
+0x74,0x03,0x63,0x34,
+0x00,0x00,0x62,0xA0,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x73,0x01,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x43,0x00,
+0x35,0x00,0x40,0x14,
+0x18,0x00,0xA2,0x34,
+0x00,0xF8,0x04,0x3C,
+0x16,0x00,0x82,0x34,
+0xB6,0x01,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x43,0x00,
+0x90,0x00,0x40,0x14,
+0x17,0x00,0x82,0x34,
+0x15,0x00,0x82,0x34,
+0x84,0xFF,0x62,0x14,
+0x00,0x00,0x00,0x00,
+0xA7,0x22,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x6A,0x01,0x62,0x10,
+0x2B,0x10,0x43,0x00,
+0xB7,0x00,0x40,0x14,
+0xAA,0x00,0xA2,0x34,
+0xA5,0x00,0xA2,0x34,
+0x35,0x02,0x62,0x10,
+0x24,0x20,0x44,0x02,
+0xA6,0x00,0xA2,0x34,
+0x76,0xFF,0x62,0x14,
+0x00,0x00,0x00,0x00,
+0xF7,0x5B,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x75,0x01,0x62,0x10,
+0x2B,0x10,0x43,0x00,
+0x80,0x00,0x40,0x14,
+0x0F,0x00,0xC2,0x34,
+0x18,0x00,0xE2,0x34,
+0xC1,0x01,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0x19,0x00,0xE2,0x34,
+0x68,0xFF,0x62,0x14,
+0x00,0x00,0x00,0x00,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x30,0x1F,0xA2,0x26,
+0x2A,0x1C,0x44,0x90,
+0x25,0xB0,0x03,0x3C,
+0x74,0x03,0x63,0x34,
+0x00,0x00,0x64,0xAC,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x3E,0x01,0x62,0x10,
+0x2B,0x10,0x43,0x00,
+0x74,0x00,0x40,0x14,
+0x19,0x00,0xA2,0x34,
+0x14,0x00,0xA2,0x34,
+0x96,0x01,0x62,0x10,
+0x17,0x00,0xA2,0x34,
+0x51,0xFF,0x62,0x14,
+0x25,0xB0,0x04,0x3C,
+0x68,0x03,0x85,0x34,
+0x00,0x00,0xA3,0x8C,
+0x00,0xFF,0x42,0x32,
+0x00,0x12,0x02,0x00,
+0xFF,0xFF,0x73,0x30,
+0x25,0x10,0x53,0x00,
+0x00,0x00,0xA2,0xAC,
+0x64,0x03,0x84,0x34,
+0x00,0x00,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x53,0x30,
+0x40,0x00,0x63,0x36,
+0x00,0x00,0x83,0xA0,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x02,0x00,0xE2,0x34,
+0x3F,0xFF,0x62,0x10,
+0x2B,0x10,0x43,0x00,
+0x9B,0x00,0x40,0x14,
+0x04,0x00,0xE2,0x34,
+0x08,0x00,0xA2,0x34,
+0xA3,0x01,0x62,0x10,
+0x00,0xFF,0x42,0x32,
+0x38,0xFF,0x67,0x14,
+0x25,0xB0,0x04,0x3C,
+0xFF,0x00,0x05,0x3C,
+0x00,0xFF,0xA5,0x34,
+0x24,0x28,0x45,0x02,
+0x02,0x2A,0x05,0x00,
+0x94,0x00,0x83,0x34,
+0x40,0x11,0x05,0x00,
+0x26,0xB0,0x06,0x3C,
+0x00,0x00,0x65,0xA4,
+0xC0,0xFF,0x53,0x24,
+0x7C,0x00,0xCC,0x34,
+0x04,0x00,0x07,0x24,
+0x9A,0x00,0x88,0x34,
+0x98,0x00,0x89,0x34,
+0x96,0x00,0x8A,0x34,
+0x7A,0x00,0xC6,0x34,
+0xB0,0x03,0x8B,0x34,
+0x00,0x04,0x02,0x24,
+0xA0,0x00,0x03,0x24,
+0x00,0x00,0x02,0xA5,
+0x44,0x00,0x84,0x34,
+0x00,0x00,0x23,0xA5,
+0x00,0x00,0x47,0xA5,
+0x00,0x00,0xC7,0xA0,
+0x00,0x00,0x73,0xAD,
+0x00,0x00,0x93,0xA5,
+0x00,0x00,0x83,0x94,
+0xFF,0xFD,0x02,0x24,
+0x30,0x1F,0xA6,0x26,
+0x24,0x18,0x62,0x00,
+0x00,0x00,0x83,0xA4,
+0x00,0x00,0x82,0x94,
+0xBA,0x1B,0xC5,0xA4,
+0x00,0x02,0x42,0x34,
+0x00,0x00,0x82,0xA4,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0xBF,0x01,0x62,0x10,
+0x25,0xB0,0x02,0x3C,
+0xA3,0x00,0xA2,0x34,
+0x10,0xFF,0x62,0x14,
+0x25,0xB0,0x02,0x3C,
+0x30,0x1F,0xA2,0x26,
+0x16,0x1F,0x00,0x08,
+0x30,0x38,0x40,0xAC,
+0x3A,0x01,0x62,0x10,
+0x11,0x00,0xE2,0x34,
+0x08,0xFF,0x62,0x14,
+0x00,0x00,0x00,0x00,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0xFF,0x00,0x04,0x3C,
+0x00,0xFF,0x84,0x34,
+0x24,0x20,0x44,0x02,
+0x30,0x1F,0xA2,0x26,
+0x02,0x22,0x04,0x00,
+0xC2,0x34,0x00,0x0C,
+0x2A,0x1C,0x40,0xA0,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x9F,0x01,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0x18,0x00,0x82,0x34,
+0xF3,0xFE,0x62,0x14,
+0x00,0x00,0x00,0x00,
+0x0A,0x23,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x4E,0x01,0x62,0x10,
+0x10,0x00,0xC2,0x34,
+0xEC,0xFE,0x62,0x14,
+0x25,0xB0,0x02,0x3C,
+0x00,0xFF,0x43,0x32,
+0x00,0xFF,0x02,0x34,
+0xDA,0xFF,0x62,0x14,
+0x30,0x1F,0xA2,0x26,
+0x30,0x1F,0xA3,0x26,
+0xFF,0xFF,0x02,0x34,
+0x16,0x1F,0x00,0x08,
+0x30,0x38,0x62,0xAC,
+0x96,0x01,0x62,0x10,
+0x25,0xB0,0x02,0x3C,
+0x28,0x00,0xA2,0x34,
+0xDE,0xFE,0x62,0x14,
+0x0F,0x00,0x10,0x3C,
+0xFF,0xFF,0x05,0x36,
+0x60,0x00,0x06,0x24,
+0x5F,0x47,0x00,0x0C,
+0x24,0x00,0x04,0x24,
+0x25,0x22,0x00,0x0C,
+0xE8,0x03,0x04,0x24,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x24,0x00,0x04,0x24,
+0x8A,0x47,0x00,0x0C,
+0xFF,0xFF,0x05,0x36,
+0x1F,0x00,0x53,0x30,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0x25,0xB0,0x02,0x3C,
+0x74,0x03,0x42,0x34,
+0x00,0x00,0x53,0xA0,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x84,0x01,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0xAB,0x00,0xA2,0x34,
+0xC1,0xFE,0x62,0x14,
+0x00,0x00,0x00,0x00,
+0xE6,0x5F,0x00,0x0C,
+0x21,0x20,0x40,0x02,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x4C,0x01,0x62,0x10,
+0x25,0xB0,0x02,0x3C,
+0x02,0x00,0xA2,0x34,
+0xB9,0xFE,0x62,0x14,
+0x25,0xB0,0x02,0x3C,
+0x02,0x14,0x12,0x00,
+0x00,0xFF,0x43,0x32,
+0xFF,0x00,0x45,0x30,
+0x04,0x00,0xA0,0x10,
+0x02,0x92,0x03,0x00,
+0x01,0x00,0x02,0x24,
+0x02,0x00,0xA2,0x10,
+0x01,0x00,0x04,0x24,
+0x21,0x20,0x00,0x00,
+0xE6,0x44,0x00,0x0C,
+0x0F,0x00,0x10,0x3C,
+0xFF,0xFF,0x05,0x36,
+0x8A,0x47,0x00,0x0C,
+0x21,0x20,0x40,0x02,
+0xFF,0xFF,0x10,0x36,
+0x24,0x98,0x50,0x00,
+0x25,0xB0,0x02,0x3C,
+0x74,0x03,0x42,0x34,
+0x00,0x00,0x53,0xAC,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x15,0x01,0x62,0x10,
+0x24,0x10,0x44,0x02,
+0xA0,0xFE,0x66,0x14,
+0x25,0xB0,0x02,0x3C,
+0x25,0xB0,0x05,0x3C,
+0x74,0x03,0xA3,0x34,
+0x00,0x00,0x64,0x8C,
+0xFF,0x0F,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x24,0x90,0x82,0x00,
+0x01,0x00,0x03,0x3C,
+0x2B,0x18,0x72,0x00,
+0x95,0xFE,0x60,0x10,
+0x00,0xB0,0x02,0x3C,
+0x25,0x90,0x42,0x02,
+0x00,0x00,0x53,0x8E,
+0x78,0x03,0xA2,0x34,
+0x00,0x00,0x53,0xAC,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x02,0x1A,0x08,0x00,
+0xFF,0x00,0x02,0x24,
+0x56,0x01,0x62,0x10,
+0x25,0xB0,0x05,0x3C,
+0x0E,0x00,0x60,0x14,
+0x00,0xCC,0x02,0x34,
+0x25,0xB0,0x04,0x3C,
+0x64,0x03,0x84,0x34,
+0x30,0x1F,0xA7,0x26,
+0x00,0x00,0x85,0x94,
+0xE4,0x02,0xE6,0x8C,
+0xFF,0xCF,0x02,0x3C,
+0xFF,0xFE,0x03,0x24,
+0xFF,0xFF,0x42,0x34,
+0x24,0x28,0xA3,0x00,
+0x24,0x30,0xC2,0x00,
+0x00,0x00,0x85,0xA4,
+0xE4,0x02,0xE6,0xAC,
+0x00,0xCC,0x02,0x34,
+0x7B,0xFE,0x02,0x15,
+0x25,0xB0,0x02,0x3C,
+0x30,0x1F,0xA5,0x26,
+0xE4,0x02,0xA3,0x8C,
+0xFF,0xCF,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x24,0x18,0x62,0x00,
+0x00,0x10,0x04,0x3C,
+0x25,0x18,0x64,0x00,
+0x16,0x1F,0x00,0x08,
+0xE4,0x02,0xA3,0xAC,
+0x02,0x14,0x12,0x00,
+0x00,0x1F,0x43,0x32,
+0x02,0x9A,0x03,0x00,
+0x3F,0x00,0x42,0x30,
+0xC1,0x02,0x22,0xA2,
+0xBC,0x02,0x33,0xA2,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x76,0x2C,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x21,0x98,0x40,0x00,
+0x74,0x03,0x02,0x36,
+0x00,0x00,0x53,0xAC,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x03,0x00,0x22,0x92,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0x16,0x1F,0x00,0x08,
+0x03,0x00,0x22,0xA2,
+0x74,0x03,0x03,0x36,
+0x00,0x00,0x64,0x8C,
+0xFF,0x0F,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x24,0x90,0x82,0x00,
+0x01,0x00,0x03,0x3C,
+0x2B,0x18,0x72,0x00,
+0x51,0xFE,0x60,0x10,
+0x78,0x03,0x02,0x36,
+0x00,0x00,0x53,0x8C,
+0x00,0xB0,0x03,0x3C,
+0x25,0x90,0x43,0x02,
+0x00,0x00,0x53,0xAE,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0xBE,0x59,0x00,0x0C,
+0x21,0x20,0x40,0x02,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x00,0xFF,0x82,0x34,
+0x24,0x10,0x42,0x02,
+0x02,0x2A,0x02,0x00,
+0x2B,0x1C,0x25,0xA2,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0xFF,0xFF,0x02,0x34,
+0x16,0x1F,0x00,0x08,
+0x30,0x38,0x22,0xAE,
+0x24,0x10,0x44,0x02,
+0x00,0xFF,0x43,0x32,
+0x02,0x2C,0x02,0x00,
+0x04,0x00,0xA0,0x10,
+0x02,0x92,0x03,0x00,
+0x01,0x00,0x02,0x24,
+0x02,0x00,0xA2,0x10,
+0x01,0x00,0x04,0x24,
+0x21,0x20,0x00,0x00,
+0x25,0xB0,0x10,0x3C,
+0xE6,0x44,0x00,0x0C,
+0x74,0x03,0x10,0x36,
+0x00,0x00,0x13,0x8E,
+0x0F,0x00,0x11,0x3C,
+0x21,0x20,0x40,0x02,
+0x21,0x30,0x60,0x02,
+0x5F,0x47,0x00,0x0C,
+0xFF,0xFF,0x25,0x36,
+0x21,0x20,0x40,0x02,
+0x8A,0x47,0x00,0x0C,
+0xFF,0xFF,0x25,0x36,
+0x00,0x00,0x02,0xAE,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x85,0x5F,0x00,0x0C,
+0x21,0x20,0x40,0x02,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x08,0x00,0x23,0x8E,
+0xFF,0x9F,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x24,0x18,0x62,0x00,
+0x16,0x1F,0x00,0x08,
+0x08,0x00,0x23,0xAE,
+0x00,0xFF,0x42,0x32,
+0x24,0x18,0x44,0x02,
+0x02,0x9A,0x02,0x00,
+0x01,0x00,0x02,0x24,
+0x95,0x00,0x62,0x12,
+0x02,0x1C,0x03,0x00,
+0x02,0x00,0x02,0x24,
+0xA9,0x00,0x62,0x12,
+0xC0,0x10,0x03,0x00,
+0x03,0x00,0x02,0x24,
+0x09,0xFE,0x62,0x16,
+0xC0,0x10,0x03,0x00,
+0x21,0x10,0x43,0x00,
+0x80,0x10,0x02,0x00,
+0x21,0x10,0x43,0x00,
+0x02,0x80,0x04,0x3C,
+0x4C,0x43,0x83,0x24,
+0x80,0x10,0x02,0x00,
+0x21,0x10,0x43,0x00,
+0x00,0x00,0x44,0x8C,
+0x25,0xB0,0x03,0x3C,
+0x74,0x03,0x63,0x34,
+0x00,0x00,0x64,0xAC,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x00,0xFF,0x82,0x34,
+0x24,0x10,0x42,0x02,
+0x02,0x2A,0x02,0x00,
+0x01,0x00,0x03,0x24,
+0x77,0x00,0xA3,0x10,
+0x74,0x03,0x02,0x36,
+0x02,0x00,0xA2,0x28,
+0xB7,0x00,0x40,0x14,
+0x03,0x00,0x02,0x24,
+0x06,0x00,0xA2,0x10,
+0x00,0x00,0x00,0x00,
+0x30,0x1F,0xA2,0x26,
+0x24,0x1C,0x44,0x94,
+0x25,0xB0,0x03,0x3C,
+0x18,0x21,0x00,0x08,
+0x74,0x03,0x63,0x34,
+0x30,0x1F,0xA2,0x26,
+0x26,0x1C,0x44,0x94,
+0x25,0xB0,0x03,0x3C,
+0x18,0x21,0x00,0x08,
+0x74,0x03,0x63,0x34,
+0x24,0x10,0x42,0x02,
+0x02,0x92,0x02,0x00,
+0x21,0x18,0x50,0x02,
+0x00,0x00,0x73,0x8C,
+0x74,0x03,0x02,0x36,
+0x00,0x00,0x53,0xAC,
+0x00,0x00,0x73,0x8C,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0xA6,0x5A,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x24,0x20,0x44,0x02,
+0x56,0x25,0x00,0x0C,
+0x02,0x24,0x04,0x00,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0xD7,0x22,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x30,0x1F,0xA3,0x26,
+0x2A,0x1C,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x6A,0xFE,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x00,0xFF,0x82,0x34,
+0x24,0x10,0x42,0x02,
+0x02,0x2A,0x02,0x00,
+0x01,0x00,0x02,0x24,
+0x21,0x20,0xA0,0x00,
+0x2A,0x1C,0x62,0xA0,
+0xC2,0x34,0x00,0x0C,
+0x2B,0x1C,0x65,0xA0,
+0x1A,0x20,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x00,0xFF,0x82,0x34,
+0x24,0x10,0x42,0x02,
+0xBB,0xFD,0x40,0x10,
+0x25,0xB0,0x02,0x3C,
+0x30,0x1F,0xA3,0x26,
+0x04,0x03,0x66,0x90,
+0x24,0x20,0x44,0x02,
+0x00,0xFF,0x45,0x32,
+0x02,0x24,0x04,0x00,
+0x02,0x2A,0x05,0x00,
+0x00,0x01,0xC6,0x34,
+0xFB,0xFF,0x87,0x24,
+0xFB,0xFF,0xA2,0x24,
+0x1F,0x03,0x62,0xA0,
+0x04,0x03,0x66,0xAC,
+0x1D,0x03,0x67,0xA0,
+0x1C,0x03,0x64,0xA0,
+0x16,0x1F,0x00,0x08,
+0x1E,0x03,0x65,0xA0,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x30,0x1F,0xA2,0x26,
+0x2B,0x1C,0x44,0x90,
+0x25,0xB0,0x03,0x3C,
+0x74,0x03,0x63,0x34,
+0x00,0x00,0x64,0xAC,
+0xB8,0x1F,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x03,0x3C,
+0xFF,0x00,0x02,0x24,
+0x56,0x01,0x63,0x34,
+0x00,0x00,0x62,0xA4,
+0x01,0x00,0x04,0x24,
+0x02,0x80,0x02,0x3C,
+0x16,0x1F,0x00,0x08,
+0x08,0x5E,0x44,0xA0,
+0x02,0x92,0x02,0x00,
+0x05,0x00,0x40,0x12,
+0x21,0x20,0x00,0x00,
+0x01,0x00,0x02,0x24,
+0x02,0x00,0x42,0x12,
+0x01,0x00,0x04,0x24,
+0x21,0x20,0x00,0x00,
+0xE6,0x44,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x02,0x9C,0x02,0x00,
+0x00,0xFF,0x43,0x32,
+0x07,0x00,0x62,0x2E,
+0x88,0xFD,0x40,0x10,
+0x02,0x2A,0x03,0x00,
+0x02,0x80,0x04,0x3C,
+0x50,0xED,0x83,0x24,
+0x80,0x10,0x13,0x00,
+0x21,0x10,0x43,0x00,
+0x00,0x00,0x44,0x8C,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x80,0x00,
+0x00,0x00,0x00,0x00,
+0x22,0x1C,0x23,0x96,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x43,0xAC,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0xC0,0x10,0x03,0x00,
+0x21,0x10,0x43,0x00,
+0x80,0x10,0x02,0x00,
+0x21,0x10,0x43,0x00,
+0x80,0x10,0x02,0x00,
+0x21,0x10,0x51,0x00,
+0x14,0x24,0x44,0x8C,
+0x74,0x03,0x03,0x36,
+0x00,0x00,0x64,0xAC,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x00,0xFF,0x83,0x34,
+0x74,0x03,0x44,0x34,
+0x00,0x00,0x93,0x8C,
+0x24,0x18,0x43,0x02,
+0x02,0x92,0x03,0x00,
+0x21,0x10,0x42,0x02,
+0x00,0x00,0x53,0xAC,
+0x00,0x00,0x53,0x8C,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x93,0xAC,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x21,0x10,0x43,0x00,
+0x80,0x10,0x02,0x00,
+0x21,0x10,0x43,0x00,
+0x80,0x10,0x02,0x00,
+0x21,0x10,0x51,0x00,
+0x18,0x24,0x44,0x8C,
+0xA4,0x21,0x00,0x08,
+0x74,0x03,0x03,0x36,
+0xCD,0x59,0x00,0x0C,
+0x21,0x20,0x40,0x02,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x3D,0x23,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x74,0x03,0x42,0x34,
+0x00,0x00,0x45,0x8C,
+0x00,0xFF,0x84,0x34,
+0x24,0x20,0x44,0x02,
+0xC1,0x5B,0x00,0x0C,
+0x02,0x22,0x04,0x00,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x70,0x03,0x42,0x34,
+0x21,0x20,0x40,0x02,
+0x00,0x00,0x40,0xAC,
+0x6B,0x1E,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0xF5,0x5B,0x00,0x0C,
+0x02,0x24,0x04,0x00,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x00,0x60,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x4B,0xFF,0xA0,0x14,
+0x00,0x00,0x00,0x00,
+0x30,0x1F,0xA2,0x26,
+0x20,0x1C,0x44,0x94,
+0x25,0xB0,0x03,0x3C,
+0x18,0x21,0x00,0x08,
+0x74,0x03,0x63,0x34,
+0x64,0x03,0xA5,0x34,
+0x30,0x1F,0xA6,0x26,
+0x00,0x00,0xA3,0x94,
+0xE4,0x02,0xC4,0x8C,
+0xFF,0xCF,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x24,0x20,0x82,0x00,
+0x00,0x01,0x63,0x34,
+0x00,0x00,0xA3,0xA4,
+0x9A,0x20,0x00,0x08,
+0xE4,0x02,0xC4,0xAC,
+0xCD,0x5A,0x00,0x0C,
+0x03,0x00,0x04,0x24,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0xCD,0x5A,0x00,0x0C,
+0x02,0x00,0x04,0x24,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0xCD,0x5A,0x00,0x0C,
+0x01,0x00,0x04,0x24,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x00,0x19,0x05,0x00,
+0x30,0x1F,0xA2,0x26,
+0x21,0x18,0x62,0x00,
+0x36,0x03,0x64,0x94,
+0x25,0xB0,0x02,0x3C,
+0x74,0x03,0x42,0x34,
+0x00,0x00,0x44,0xAC,
+0x17,0x1F,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x00,0x19,0x05,0x00,
+0x30,0x1F,0xA2,0x26,
+0x21,0x18,0x62,0x00,
+0x35,0x03,0x64,0x90,
+0xFD,0x21,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x00,0x19,0x05,0x00,
+0x30,0x1F,0xA2,0x26,
+0x21,0x18,0x62,0x00,
+0x34,0x03,0x64,0x90,
+0xFD,0x21,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x00,0x19,0x05,0x00,
+0x30,0x1F,0xA2,0x26,
+0x21,0x18,0x62,0x00,
+0x32,0x03,0x64,0x94,
+0xFD,0x21,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x00,0x19,0x05,0x00,
+0x30,0x1F,0xA2,0x26,
+0x21,0x18,0x62,0x00,
+0x30,0x03,0x64,0x94,
+0xFD,0x21,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x00,0x11,0x05,0x00,
+0x30,0x1F,0xA3,0x26,
+0x21,0x10,0x43,0x00,
+0x2C,0x03,0x44,0x8C,
+0xFC,0x21,0x00,0x08,
+0x42,0x26,0x04,0x00,
+0x00,0x11,0x05,0x00,
+0x30,0x1F,0xA3,0x26,
+0x21,0x10,0x43,0x00,
+0x2F,0x03,0x44,0x90,
+0xFC,0x21,0x00,0x08,
+0x01,0x00,0x84,0x30,
+0x01,0x80,0x03,0x3C,
+0x25,0xB0,0x02,0x3C,
+0x18,0x03,0x42,0x34,
+0x94,0x88,0x63,0x24,
+0x00,0x00,0x43,0xAC,
+0x02,0x80,0x05,0x3C,
+0xD4,0x5E,0xA5,0x8C,
+0x04,0x00,0x02,0x24,
+0x1E,0x00,0xA2,0x10,
+0x05,0x00,0xA2,0x2C,
+0x10,0x00,0x40,0x10,
+0x05,0x00,0x02,0x24,
+0x03,0x00,0x02,0x24,
+0x08,0x00,0xA2,0x10,
+0x00,0x19,0x04,0x00,
+0x80,0x10,0x04,0x00,
+0x21,0x10,0x44,0x00,
+0xC0,0x10,0x02,0x00,
+0x23,0x10,0x44,0x00,
+0x00,0x11,0x02,0x00,
+0x21,0x10,0x44,0x00,
+0x40,0x19,0x02,0x00,
+0xFF,0xFF,0x63,0x24,
+0xFE,0xFF,0x60,0x14,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xF3,0xFF,0xA2,0x10,
+0x06,0x00,0x02,0x24,
+0xF2,0xFF,0xA2,0x14,
+0x80,0x10,0x04,0x00,
+0x40,0x11,0x04,0x00,
+0x23,0x10,0x44,0x00,
+0x80,0x10,0x02,0x00,
+0x21,0x10,0x44,0x00,
+0x00,0x19,0x02,0x00,
+0x23,0x18,0x62,0x00,
+0x3B,0x22,0x00,0x08,
+0x00,0x19,0x03,0x00,
+0x80,0x10,0x04,0x00,
+0x21,0x10,0x44,0x00,
+0xC0,0x10,0x02,0x00,
+0x23,0x10,0x44,0x00,
+0x00,0x11,0x02,0x00,
+0x21,0x10,0x44,0x00,
+0x3B,0x22,0x00,0x08,
+0x00,0x19,0x02,0x00,
+0x01,0x80,0x03,0x3C,
+0x25,0xB0,0x02,0x3C,
+0x50,0x89,0x63,0x24,
+0x18,0x03,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0x02,0x80,0x05,0x3C,
+0xD4,0x5E,0xA3,0x8C,
+0x05,0x00,0x02,0x24,
+0x06,0x00,0x62,0x10,
+0x06,0x00,0x62,0x2C,
+0x0C,0x00,0x40,0x10,
+0x06,0x00,0x02,0x24,
+0x04,0x00,0x02,0x24,
+0x0E,0x00,0x62,0x10,
+0x80,0x10,0x04,0x00,
+0x80,0x10,0x04,0x00,
+0x21,0x10,0x44,0x00,
+0x80,0x10,0x02,0x00,
+0xFF,0xFF,0x42,0x24,
+0xFE,0xFF,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xF7,0xFF,0x62,0x14,
+0x00,0x11,0x04,0x00,
+0x23,0x10,0x44,0x00,
+0x66,0x22,0x00,0x08,
+0x40,0x10,0x02,0x00,
+0x21,0x10,0x44,0x00,
+0x66,0x22,0x00,0x08,
+0x40,0x10,0x02,0x00,
+0xFF,0xFF,0x85,0x30,
+0x21,0x30,0x00,0x00,
+0x25,0xB0,0x03,0x3C,
+0x2A,0xB0,0x04,0x3C,
+0xB4,0x00,0x63,0x34,
+0x01,0x00,0xA2,0x24,
+0x31,0x00,0x84,0x34,
+0x00,0x00,0x65,0xA0,
+0x00,0x00,0x85,0xA0,
+0xFF,0xFF,0x45,0x30,
+0x12,0x00,0xA0,0x10,
+0x01,0x00,0x03,0x24,
+0x28,0xB0,0x07,0x3C,
+0x88,0x22,0x00,0x08,
+0xFF,0xFF,0x08,0x24,
+0x00,0x00,0x83,0xA0,
+0x01,0x00,0x63,0x24,
+0xFF,0xFF,0x63,0x30,
+0x2B,0x10,0xA3,0x00,
+0x09,0x00,0x40,0x14,
+0x08,0x00,0xC6,0x24,
+0xF9,0xFF,0x65,0x14,
+0x21,0x20,0xC7,0x00,
+0x01,0x00,0x63,0x24,
+0xFF,0xFF,0x63,0x30,
+0x2B,0x10,0xA3,0x00,
+0x00,0x00,0x88,0xA0,
+0xF9,0xFF,0x40,0x10,
+0x08,0x00,0xC6,0x24,
+0x00,0x01,0xA2,0x2C,
+0x13,0x00,0x40,0x10,
+0x21,0x18,0xA0,0x00,
+0xFF,0x00,0x08,0x24,
+0x28,0xB0,0x07,0x3C,
+0x9C,0x22,0x00,0x08,
+0xFF,0xFF,0x09,0x24,
+0xFF,0xFF,0x43,0x30,
+0x00,0x00,0xA2,0xA0,
+0x00,0x01,0x62,0x2C,
+0x0A,0x00,0x40,0x10,
+0x08,0x00,0xC6,0x24,
+0x01,0x00,0x62,0x24,
+0xF9,0xFF,0x68,0x14,
+0x21,0x28,0xC7,0x00,
+0x00,0x01,0x02,0x24,
+0xFF,0xFF,0x43,0x30,
+0x00,0x01,0x62,0x2C,
+0x00,0x00,0xA9,0xA0,
+0xF8,0xFF,0x40,0x14,
+0x08,0x00,0xC6,0x24,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xD0,0xFF,0xBD,0x27,
+0x2C,0x00,0xBF,0xAF,
+0x28,0x00,0xB6,0xAF,
+0x24,0x00,0xB5,0xAF,
+0x20,0x00,0xB4,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x25,0xB0,0x10,0x3C,
+0x40,0x00,0x03,0x36,
+0x00,0x00,0x60,0xA4,
+0xA8,0x00,0x13,0x36,
+0xA0,0x00,0x12,0x36,
+0xA4,0x00,0x10,0x36,
+0x00,0x00,0x55,0x8E,
+0x00,0x00,0x16,0x8E,
+0x00,0x00,0x71,0x8E,
+0x00,0x80,0x14,0x3C,
+0xFC,0x37,0x02,0x24,
+0x00,0x00,0x40,0xAE,
+0xFD,0x00,0x04,0x24,
+0x00,0x00,0x00,0xAE,
+0x21,0x88,0x34,0x02,
+0x00,0x00,0x74,0xAE,
+0x00,0x00,0x62,0xA4,
+0x73,0x22,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x55,0xAE,
+0x00,0x00,0x16,0xAE,
+0x00,0x00,0x71,0xAE,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x2C,0x00,0xBF,0x8F,
+0x28,0x00,0xB6,0x8F,
+0x24,0x00,0xB5,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x30,0x00,0xBD,0x27,
+0xD0,0xFF,0xBD,0x27,
+0x2C,0x00,0xBF,0xAF,
+0x28,0x00,0xB6,0xAF,
+0x24,0x00,0xB5,0xAF,
+0x20,0x00,0xB4,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x25,0xB0,0x10,0x3C,
+0x40,0x00,0x05,0x36,
+0x00,0x00,0xA2,0x94,
+0x24,0xFA,0x03,0x24,
+0xA8,0x00,0x13,0x36,
+0x24,0x10,0x43,0x00,
+0x00,0x00,0xA2,0xA4,
+0xA0,0x00,0x12,0x36,
+0xA4,0x00,0x10,0x36,
+0x00,0x00,0x55,0x8E,
+0x00,0x00,0x16,0x8E,
+0x00,0x00,0x71,0x8E,
+0x00,0x80,0x14,0x3C,
+0xFC,0x37,0x02,0x24,
+0x00,0x00,0x40,0xAE,
+0xFD,0x00,0x04,0x24,
+0x00,0x00,0x00,0xAE,
+0x21,0x88,0x34,0x02,
+0x00,0x00,0x74,0xAE,
+0x00,0x00,0xA2,0xA4,
+0x73,0x22,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x55,0xAE,
+0x00,0x00,0x16,0xAE,
+0x00,0x00,0x71,0xAE,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x2C,0x00,0xBF,0x8F,
+0x28,0x00,0xB6,0x8F,
+0x24,0x00,0xB5,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x30,0x00,0xBD,0x27,
+0xD0,0xFF,0xBD,0x27,
+0x2C,0x00,0xBF,0xAF,
+0x28,0x00,0xB6,0xAF,
+0x24,0x00,0xB5,0xAF,
+0x20,0x00,0xB4,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x25,0xB0,0x10,0x3C,
+0x40,0x00,0x05,0x36,
+0x00,0x00,0xA2,0x94,
+0xAF,0xFF,0x03,0x24,
+0xA8,0x00,0x13,0x36,
+0x24,0x10,0x43,0x00,
+0x00,0x00,0xA2,0xA4,
+0xA0,0x00,0x12,0x36,
+0xA4,0x00,0x10,0x36,
+0x00,0x00,0x55,0x8E,
+0x00,0x00,0x16,0x8E,
+0x00,0x00,0x71,0x8E,
+0x00,0x80,0x14,0x3C,
+0xFC,0x37,0x02,0x24,
+0x00,0x00,0x40,0xAE,
+0xFD,0x00,0x04,0x24,
+0x00,0x00,0x00,0xAE,
+0x21,0x88,0x34,0x02,
+0x00,0x00,0x74,0xAE,
+0x00,0x00,0xA2,0xA4,
+0x73,0x22,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x55,0xAE,
+0x00,0x00,0x16,0xAE,
+0x00,0x00,0x71,0xAE,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x2C,0x00,0xBF,0x8F,
+0x28,0x00,0xB6,0x8F,
+0x24,0x00,0xB5,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x30,0x00,0xBD,0x27,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x25,0xB0,0x04,0x3C,
+0x40,0x00,0x84,0x34,
+0x00,0x00,0x82,0x94,
+0xD8,0xFD,0x03,0x24,
+0x24,0x10,0x43,0x00,
+0xFC,0x37,0x03,0x24,
+0x00,0x00,0x82,0xA4,
+0x00,0x00,0x83,0xA4,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x84,0x30,
+0xFF,0xFF,0xAC,0x30,
+0xC0,0x48,0x04,0x00,
+0x00,0x60,0x0E,0x40,
+0x01,0x00,0xC1,0x35,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x25,0xB0,0x02,0x3C,
+0x40,0x02,0x4D,0x34,
+0xF8,0xFF,0xE7,0x24,
+0x21,0x40,0x00,0x00,
+0x01,0x00,0x0F,0x24,
+0x44,0x02,0x4B,0x34,
+0x72,0x23,0x00,0x08,
+0x01,0x80,0x0A,0x3C,
+0x28,0x00,0x0F,0x11,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0xE2,0x90,
+0x00,0x00,0xE4,0x90,
+0x02,0x00,0xE3,0x90,
+0x03,0x00,0xE5,0x90,
+0x00,0x12,0x02,0x00,
+0x25,0x20,0x82,0x00,
+0x00,0x1C,0x03,0x00,
+0x25,0x20,0x83,0x00,
+0x21,0x10,0x28,0x01,
+0x00,0x2E,0x05,0x00,
+0x01,0x00,0x08,0x25,
+0x25,0x20,0x85,0x00,
+0x25,0x10,0x4A,0x00,
+0x06,0x00,0x03,0x2D,
+0x00,0x00,0x64,0xAD,
+0x04,0x00,0xE7,0x24,
+0x00,0x00,0xA2,0xAD,
+0x12,0x00,0x60,0x10,
+0x00,0x00,0x00,0x00,
+0xEA,0xFF,0x00,0x15,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xC2,0x90,
+0x01,0x00,0xC3,0x90,
+0x04,0x00,0xE7,0x24,
+0x00,0x14,0x02,0x00,
+0x25,0x10,0x82,0x01,
+0x00,0x1E,0x03,0x00,
+0x25,0x20,0x43,0x00,
+0x21,0x10,0x28,0x01,
+0x01,0x00,0x08,0x25,
+0x25,0x10,0x4A,0x00,
+0x06,0x00,0x03,0x2D,
+0x00,0x00,0x64,0xAD,
+0x00,0x00,0xA2,0xAD,
+0xF0,0xFF,0x60,0x14,
+0x00,0x00,0x00,0x00,
+0x00,0x60,0x8E,0x40,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x03,0x00,0xC2,0x90,
+0x02,0x00,0xC4,0x90,
+0x04,0x00,0xC3,0x90,
+0x05,0x00,0xC5,0x90,
+0x64,0x23,0x00,0x08,
+0x00,0x12,0x02,0x00,
+0xFF,0xFF,0x84,0x30,
+0x42,0xB0,0x08,0x3C,
+0x80,0x10,0x04,0x00,
+0x21,0x10,0x48,0x00,
+0x04,0x00,0x46,0xAC,
+0x00,0x00,0x07,0x91,
+0x40,0x18,0x04,0x00,
+0x03,0x00,0x06,0x24,
+0xFF,0x00,0xE7,0x30,
+0x04,0x30,0x66,0x00,
+0x01,0x00,0x02,0x24,
+0x04,0x10,0x62,0x00,
+0x25,0x30,0xC7,0x00,
+0xFF,0xFF,0xA5,0x30,
+0x25,0x10,0x47,0x00,
+0x02,0x00,0xA0,0x14,
+0xFF,0x00,0xC7,0x30,
+0xFF,0x00,0x47,0x30,
+0x42,0xB0,0x02,0x3C,
+0x00,0x00,0x47,0xA0,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x14,0x00,0x83,0x90,
+0x01,0x00,0x02,0x24,
+0x08,0x00,0x86,0xAC,
+0x18,0x00,0x85,0xAC,
+0x00,0x00,0x84,0xAC,
+0x03,0x00,0x62,0x10,
+0x04,0x00,0x84,0xAC,
+0x99,0x59,0x00,0x08,
+0x0C,0x00,0x80,0xAC,
+0x0C,0x00,0x82,0x8C,
+0x99,0x59,0x00,0x08,
+0x10,0x00,0x82,0xAC,
+0xC8,0xFF,0xBD,0x27,
+0x28,0x00,0xB6,0xAF,
+0x25,0xB0,0x02,0x3C,
+0x02,0x80,0x16,0x3C,
+0x2C,0x00,0xB7,0xAF,
+0x24,0x00,0xB5,0xAF,
+0x20,0x00,0xB4,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x30,0x00,0xBF,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x18,0x03,0x55,0x34,
+0x01,0x80,0x17,0x3C,
+0x02,0x80,0x13,0x3C,
+0x02,0x80,0x14,0x3C,
+0x08,0xE4,0xD2,0x26,
+0xB8,0x8E,0xE2,0x26,
+0x00,0x00,0xA2,0xAE,
+0x08,0xE4,0xD0,0x8E,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x14,0x5E,0x71,0x8E,
+0x00,0x00,0x00,0x00,
+0x25,0x00,0x20,0x12,
+0x00,0x00,0x00,0x00,
+0x14,0x5E,0x60,0xAE,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x23,0x00,0x12,0x12,
+0x08,0x0C,0x84,0x26,
+0x14,0x00,0x03,0x92,
+0x01,0x00,0x02,0x24,
+0x2B,0x00,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0x0A,0x00,0x60,0x14,
+0x02,0x00,0x02,0x24,
+0x0C,0x00,0x03,0x8E,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x23,0x02,
+0x1E,0x00,0x40,0x10,
+0x23,0x10,0x71,0x00,
+0x0C,0x00,0x02,0xAE,
+0x00,0x00,0x10,0x8E,
+0xCE,0x23,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0xFC,0xFF,0x62,0x14,
+0x00,0x00,0x00,0x00,
+0x0C,0x00,0x03,0x8E,
+0x00,0x00,0x00,0x00,
+0xF8,0xFF,0x60,0x10,
+0x2B,0x10,0x23,0x02,
+0xF5,0xFF,0x40,0x14,
+0x23,0x10,0x71,0x00,
+0x08,0x00,0x02,0x8E,
+0x18,0x00,0x04,0x8E,
+0x09,0xF8,0x40,0x00,
+0x0C,0x00,0x00,0xAE,
+0x00,0x00,0x10,0x8E,
+0xCE,0x23,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x08,0x0C,0x84,0x26,
+0x21,0x28,0x00,0x00,
+0x21,0x30,0x00,0x00,
+0x91,0x3C,0x00,0x0C,
+0x21,0x38,0x00,0x00,
+0xC0,0x23,0x00,0x08,
+0xB8,0x8E,0xE2,0x26,
+0x08,0x00,0x02,0x8E,
+0x18,0x00,0x04,0x8E,
+0x09,0xF8,0x40,0x00,
+0x00,0x00,0x00,0x00,
+0xDC,0x23,0x00,0x08,
+0x0C,0x00,0x02,0xAE,
+0x0C,0x00,0x03,0x8E,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x23,0x02,
+0xD9,0xFF,0x40,0x14,
+0x23,0x10,0x71,0x00,
+0x08,0x00,0x02,0x8E,
+0x18,0x00,0x04,0x8E,
+0x09,0xF8,0x40,0x00,
+0x00,0x00,0x00,0x00,
+0x10,0x00,0x03,0x8E,
+0x00,0x00,0x00,0x00,
+0x0C,0x00,0x03,0xAE,
+0x00,0x00,0x10,0x8E,
+0xCE,0x23,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x02,0x3C,
+0x9C,0x57,0x42,0x24,
+0xC0,0x20,0x04,0x00,
+0x21,0x20,0x82,0x00,
+0x21,0x28,0x00,0x00,
+0x00,0x60,0x06,0x40,
+0x01,0x00,0xC1,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x00,0x00,0x82,0x8C,
+0x00,0x00,0x00,0x00,
+0x09,0x00,0x44,0x10,
+0x00,0x00,0x00,0x00,
+0x04,0x00,0x43,0x8C,
+0x21,0x28,0x40,0x00,
+0x00,0x00,0x42,0x8C,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x62,0xAC,
+0x04,0x00,0x43,0xAC,
+0x00,0x00,0xA5,0xAC,
+0x04,0x00,0xA5,0xAC,
+0x00,0x60,0x86,0x40,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0xA0,0x00,
+0x21,0x18,0x80,0x00,
+0xE8,0xFF,0xBD,0x27,
+0x01,0x01,0x62,0x2C,
+0x10,0x00,0xBF,0xAF,
+0x01,0x00,0x04,0x24,
+0x01,0x02,0x65,0x2C,
+0x0A,0x00,0x40,0x14,
+0x21,0x30,0x00,0x00,
+0x02,0x00,0x04,0x24,
+0x07,0x00,0xA0,0x14,
+0x01,0x08,0x62,0x2C,
+0x05,0x00,0x40,0x14,
+0x03,0x00,0x04,0x24,
+0x10,0x00,0xBF,0x8F,
+0x21,0x10,0xC0,0x00,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x0D,0x24,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x10,0x00,0xBF,0x8F,
+0x21,0x30,0x40,0x00,
+0x21,0x10,0xC0,0x00,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x00,0x60,0x06,0x40,
+0x01,0x00,0xC1,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x10,0x00,0x83,0x8C,
+0x02,0x80,0x02,0x3C,
+0x9C,0x57,0x42,0x24,
+0xC0,0x18,0x03,0x00,
+0x21,0x18,0x62,0x00,
+0x00,0x00,0x65,0x8C,
+0x02,0x80,0x07,0x3C,
+0x02,0x80,0x08,0x3C,
+0x00,0x00,0x85,0xAC,
+0x04,0x00,0xA4,0xAC,
+0x04,0x00,0x83,0xAC,
+0xD0,0x5E,0xE5,0x8C,
+0x00,0x00,0x00,0x00,
+0x05,0x00,0xA0,0x10,
+0x00,0x00,0x64,0xAC,
+0xBC,0x5E,0x02,0x8D,
+0xD0,0x5E,0xE0,0xAC,
+0x25,0x10,0x45,0x00,
+0xBC,0x5E,0x02,0xAD,
+0x00,0x60,0x86,0x40,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0xA5,0x30,
+0x25,0xB0,0x02,0x3C,
+0x21,0x28,0xA2,0x00,
+0xFF,0x00,0x84,0x30,
+0x60,0x01,0xA4,0xA0,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x84,0x30,
+0x01,0x00,0x03,0x24,
+0x10,0x00,0x02,0x3C,
+0x04,0x18,0x83,0x00,
+0xF0,0x70,0x42,0x34,
+0x15,0x00,0x84,0x2C,
+0x06,0x00,0x80,0x10,
+0x24,0x28,0x62,0x00,
+0x0F,0x00,0x63,0x30,
+0x04,0x00,0xA0,0x14,
+0x01,0x00,0x02,0x24,
+0x02,0x00,0x60,0x14,
+0x02,0x00,0x02,0x24,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0xA5,0x30,
+0x04,0x00,0xA2,0x2C,
+0x14,0x00,0x40,0x10,
+0xFF,0x00,0x84,0x30,
+0x02,0x80,0x03,0x3C,
+0xDE,0x5D,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0xEF,0xFF,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x02,0x00,0x42,0x2C,
+0x0E,0x00,0x40,0x10,
+0x02,0x00,0x03,0x24,
+0x24,0x00,0x83,0x10,
+0x0F,0x10,0x02,0x3C,
+0x03,0x00,0x82,0x28,
+0x14,0x00,0x40,0x10,
+0x03,0x00,0x02,0x24,
+0x01,0x00,0x02,0x24,
+0x2F,0x00,0x82,0x10,
+0x00,0x00,0x00,0x00,
+0xFF,0x1F,0x02,0x3C,
+0x08,0x00,0xE0,0x03,
+0xFF,0xFF,0x42,0x34,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x35,0x00,0x83,0x10,
+0x0F,0x1F,0x02,0x3C,
+0x03,0x00,0x82,0x28,
+0x16,0x00,0x40,0x10,
+0x03,0x00,0x02,0x24,
+0x01,0x00,0x02,0x24,
+0xF4,0xFF,0x82,0x14,
+0x00,0x00,0x00,0x00,
+0x0F,0x1F,0x02,0x3C,
+0x08,0x00,0xE0,0x03,
+0x00,0x80,0x42,0x34,
+0xF0,0xFF,0x82,0x14,
+0xFF,0x1F,0x02,0x3C,
+0x01,0x00,0x02,0x24,
+0x29,0x00,0xA2,0x10,
+0x0F,0x10,0x02,0x3C,
+0x02,0x00,0xA2,0x28,
+0x1F,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x28,0x00,0xA3,0x10,
+0x00,0x00,0x00,0x00,
+0xE5,0xFF,0xA4,0x14,
+0x00,0x00,0x00,0x00,
+0x0F,0x10,0x02,0x3C,
+0x08,0x00,0xE0,0x03,
+0x00,0xF0,0x42,0x34,
+0xE1,0xFF,0x82,0x14,
+0xFF,0x1F,0x02,0x3C,
+0x01,0x00,0x02,0x24,
+0x1C,0x00,0xA2,0x10,
+0x0F,0x00,0x02,0x3C,
+0x02,0x00,0xA2,0x28,
+0x0B,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x1C,0x00,0xA3,0x10,
+0x00,0x00,0x00,0x00,
+0xD6,0xFF,0xA4,0x14,
+0x00,0x00,0x00,0x00,
+0x0F,0x00,0x02,0x3C,
+0x08,0x00,0xE0,0x03,
+0x00,0xF0,0x42,0x34,
+0x0F,0x10,0x02,0x3C,
+0x08,0x00,0xE0,0x03,
+0x00,0x80,0x42,0x34,
+0xCE,0xFF,0xA0,0x14,
+0x00,0x00,0x00,0x00,
+0x0F,0x00,0x02,0x3C,
+0x08,0x00,0xE0,0x03,
+0x15,0xF0,0x42,0x34,
+0xC9,0xFF,0xA0,0x14,
+0x00,0x00,0x00,0x00,
+0x0F,0x10,0x02,0x3C,
+0x08,0x00,0xE0,0x03,
+0x15,0xF0,0x42,0x34,
+0x08,0x00,0xE0,0x03,
+0x00,0xF0,0x42,0x34,
+0x08,0x00,0xE0,0x03,
+0x10,0xF0,0x42,0x34,
+0x08,0x00,0xE0,0x03,
+0x10,0xF0,0x42,0x34,
+0x0F,0x10,0x02,0x3C,
+0x08,0x00,0xE0,0x03,
+0x05,0xF0,0x42,0x34,
+0x0F,0x00,0x02,0x3C,
+0x08,0x00,0xE0,0x03,
+0x05,0xF0,0x42,0x34,
+0xC0,0x40,0x04,0x00,
+0x21,0x18,0x04,0x01,
+0x80,0x18,0x03,0x00,
+0x21,0x18,0x64,0x00,
+0x02,0x80,0x02,0x3C,
+0x80,0x18,0x03,0x00,
+0x30,0x1F,0x42,0x24,
+0x21,0x18,0x62,0x00,
+0x18,0x24,0x66,0x8C,
+0x21,0x38,0x60,0x00,
+0x1E,0x24,0x60,0xA0,
+0x1F,0x24,0x60,0xA0,
+0x1C,0x00,0x05,0x24,
+0xDA,0x24,0x00,0x08,
+0x01,0x00,0x03,0x24,
+0x08,0x00,0xA0,0x04,
+0x21,0x10,0x04,0x01,
+0x04,0x10,0xA3,0x00,
+0x24,0x10,0xC2,0x00,
+0xFB,0xFF,0x40,0x10,
+0xFF,0xFF,0xA5,0x24,
+0x01,0x00,0xA5,0x24,
+0x1E,0x24,0xE5,0xA0,
+0x21,0x10,0x04,0x01,
+0x80,0x10,0x02,0x00,
+0x21,0x10,0x44,0x00,
+0x02,0x80,0x03,0x3C,
+0x80,0x10,0x02,0x00,
+0x30,0x1F,0x63,0x24,
+0x21,0x18,0x43,0x00,
+0x18,0x24,0x66,0x8C,
+0x21,0x28,0x00,0x00,
+0xEE,0x24,0x00,0x08,
+0x01,0x00,0x07,0x24,
+0x1D,0x00,0xA2,0x28,
+0x08,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x04,0x10,0xA7,0x00,
+0x24,0x10,0xC2,0x00,
+0xFA,0xFF,0x40,0x10,
+0x01,0x00,0xA5,0x24,
+0xFF,0xFF,0xA5,0x24,
+0x08,0x00,0xE0,0x03,
+0x1F,0x24,0x65,0xA0,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xD8,0xFF,0xBD,0x27,
+0x02,0x80,0x02,0x3C,
+0x20,0x00,0xB4,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x21,0x88,0x00,0x00,
+0x30,0x1F,0x50,0x24,
+0xFF,0xF1,0x14,0x24,
+0x25,0xB0,0x13,0x3C,
+0x24,0x00,0xBF,0xAF,
+0x08,0x25,0x00,0x08,
+0x18,0x00,0xB2,0xAF,
+0x01,0x00,0x31,0x26,
+0x20,0x00,0x22,0x2E,
+0x2A,0x00,0x40,0x10,
+0x94,0x00,0x10,0x26,
+0x1C,0x24,0x06,0x8E,
+0x01,0x00,0x03,0x24,
+0x02,0x13,0x06,0x00,
+0x01,0x00,0x45,0x30,
+0xF7,0xFF,0xA3,0x14,
+0x42,0x1A,0x06,0x00,
+0x0C,0x24,0x02,0x8E,
+0x07,0x00,0x64,0x30,
+0x02,0x11,0x02,0x00,
+0x7F,0x00,0x43,0x30,
+0x27,0x00,0x85,0x10,
+0x07,0x00,0xD2,0x30,
+0x02,0x00,0x82,0x28,
+0x31,0x00,0x40,0x14,
+0x02,0x00,0x02,0x24,
+0x28,0x00,0x82,0x10,
+0x03,0x00,0x02,0x24,
+0x31,0x00,0x82,0x10,
+0x1A,0x00,0x62,0x2C,
+0x1C,0x24,0x02,0x8E,
+0x04,0x00,0x43,0x2E,
+0x42,0x12,0x02,0x00,
+0x0A,0x00,0x60,0x10,
+0x07,0x00,0x44,0x30,
+0x6E,0x24,0x00,0x0C,
+0x21,0x28,0x40,0x02,
+0x80,0x18,0x12,0x00,
+0x21,0x18,0x73,0x00,
+0x14,0x24,0x04,0x8E,
+0x84,0x01,0x65,0x8C,
+0x24,0x20,0x82,0x00,
+0x24,0x28,0xA4,0x00,
+0x18,0x24,0x05,0xAE,
+0xC9,0x24,0x00,0x0C,
+0x21,0x20,0x20,0x02,
+0x21,0x10,0x33,0x02,
+0x01,0x00,0x31,0x26,
+0x60,0x01,0x43,0x90,
+0x20,0x00,0x22,0x2E,
+0xD8,0xFF,0x40,0x14,
+0x94,0x00,0x10,0x26,
+0x24,0x00,0xBF,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0x32,0x00,0x62,0x2C,
+0xDF,0xFF,0x40,0x10,
+0x24,0x10,0xD4,0x00,
+0x00,0x04,0x42,0x34,
+0x1B,0x25,0x00,0x08,
+0x1C,0x24,0x02,0xAE,
+0x38,0x00,0x62,0x2C,
+0x0D,0x00,0x40,0x14,
+0x14,0x00,0x62,0x2C,
+0x24,0x10,0xD4,0x00,
+0x00,0x02,0x42,0x34,
+0x1B,0x25,0x00,0x08,
+0x1C,0x24,0x02,0xAE,
+0xD3,0xFF,0x80,0x14,
+0x24,0x10,0xD4,0x00,
+0x1B,0x25,0x00,0x08,
+0x1C,0x24,0x02,0xAE,
+0xCF,0xFF,0x40,0x14,
+0x24,0x10,0xD4,0x00,
+0x3E,0x25,0x00,0x08,
+0x00,0x04,0x42,0x34,
+0xCB,0xFF,0x40,0x10,
+0x24,0x10,0xD4,0x00,
+0x00,0x06,0x42,0x34,
+0x1B,0x25,0x00,0x08,
+0x1C,0x24,0x02,0xAE,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xE0,0xFF,0xBD,0x27,
+0x10,0x00,0xB0,0xAF,
+0xC0,0x80,0x04,0x00,
+0x21,0x80,0x04,0x02,
+0x80,0x80,0x10,0x00,
+0x21,0x80,0x04,0x02,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x42,0x24,
+0x80,0x80,0x10,0x00,
+0x18,0x00,0xBF,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x21,0x80,0x02,0x02,
+0x1C,0x24,0x03,0x8E,
+0x25,0xB0,0x02,0x3C,
+0x80,0x01,0x45,0x34,
+0x07,0x00,0x63,0x30,
+0x80,0x18,0x03,0x00,
+0x21,0x18,0x62,0x00,
+0x00,0x00,0xA6,0x90,
+0x14,0x24,0x05,0x8E,
+0x84,0x01,0x62,0x8C,
+0x21,0x88,0x80,0x00,
+0x24,0x10,0x45,0x00,
+0xC9,0x24,0x00,0x0C,
+0x18,0x24,0x02,0xAE,
+0x1E,0x24,0x04,0x92,
+0xFF,0x00,0x25,0x32,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x57,0x24,0x00,0x08,
+0x20,0x00,0xBD,0x27,
+0xFF,0xFF,0x84,0x30,
+0x00,0x02,0x82,0x30,
+0x07,0x00,0x03,0x24,
+0x0D,0x00,0x40,0x14,
+0x0B,0x00,0x84,0x30,
+0x0C,0x00,0x82,0x2C,
+0x0A,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x03,0x3C,
+0x80,0x10,0x04,0x00,
+0x74,0xED,0x63,0x24,
+0x21,0x10,0x43,0x00,
+0x00,0x00,0x44,0x8C,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x80,0x00,
+0x00,0x00,0x00,0x00,
+0x07,0x00,0x03,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x06,0x00,0x03,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x05,0x00,0x03,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x04,0x00,0x03,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x03,0x00,0x03,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x02,0x00,0x03,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x01,0x00,0x03,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x21,0x18,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0xA8,0xFF,0xBD,0x27,
+0x02,0x80,0x02,0x3C,
+0x50,0x00,0xBE,0xAF,
+0x4C,0x00,0xB7,0xAF,
+0x48,0x00,0xB6,0xAF,
+0x44,0x00,0xB5,0xAF,
+0x3C,0x00,0xB3,0xAF,
+0x38,0x00,0xB2,0xAF,
+0x54,0x00,0xBF,0xAF,
+0x40,0x00,0xB4,0xAF,
+0x34,0x00,0xB1,0xAF,
+0x30,0x00,0xB0,0xAF,
+0xA4,0xED,0x42,0x24,
+0x00,0x00,0x54,0x8C,
+0x21,0x98,0x00,0x00,
+0x21,0xA8,0x00,0x00,
+0x21,0xB0,0x00,0x00,
+0x10,0x00,0xA0,0xAF,
+0x21,0xB8,0x00,0x00,
+0x14,0x00,0xA0,0xAF,
+0x21,0xF0,0x00,0x00,
+0x18,0x00,0xA0,0xAF,
+0x1C,0x00,0xA0,0xAF,
+0x20,0x00,0xA0,0xAF,
+0x24,0x00,0xA0,0xAF,
+0x28,0x00,0xA0,0xAF,
+0x2C,0x00,0xA0,0xAF,
+0x21,0x90,0x80,0x02,
+0x1C,0x24,0x42,0x8E,
+0x00,0x00,0x00,0x00,
+0x02,0x13,0x02,0x00,
+0x01,0x00,0x42,0x30,
+0x68,0x00,0x40,0x10,
+0x25,0xB0,0x02,0x3C,
+0x21,0x10,0x62,0x02,
+0x60,0x01,0x44,0x90,
+0x04,0x24,0x43,0x8E,
+0x00,0x24,0x46,0x8E,
+0xFF,0x00,0x8B,0x30,
+0x02,0x80,0x04,0x3C,
+0x30,0x1F,0x84,0x24,
+0x21,0x10,0x64,0x01,
+0xE7,0x04,0x44,0x90,
+0xCA,0x04,0x45,0x90,
+0xE8,0x23,0x47,0x8E,
+0x18,0x00,0x64,0x00,
+0x12,0x18,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x18,0x00,0xC5,0x00,
+0x12,0x30,0x00,0x00,
+0x21,0x30,0xC3,0x00,
+0x2B,0x10,0xE6,0x00,
+0x02,0x01,0x40,0x14,
+0x23,0x10,0xE6,0x00,
+0xE8,0x23,0x42,0xAE,
+0x04,0x24,0x44,0x8E,
+0x00,0x24,0x47,0x8E,
+0xEC,0x23,0x48,0x8E,
+0xF0,0x23,0x45,0x8E,
+0xF8,0x23,0x46,0x8E,
+0xFC,0x23,0x43,0x8E,
+0x21,0x38,0xE4,0x00,
+0x02,0x80,0x04,0x3C,
+0x30,0x1F,0x84,0x24,
+0x21,0x10,0x64,0x01,
+0x21,0x40,0x05,0x01,
+0x21,0x30,0xC3,0x00,
+0x3E,0x05,0x42,0x90,
+0xE8,0x23,0x4A,0x8E,
+0x0C,0x00,0xE0,0x10,
+0x21,0x48,0x00,0x00,
+0x2B,0x48,0x47,0x00,
+0x0B,0x00,0x20,0x15,
+0x02,0x80,0x02,0x3C,
+0x07,0x00,0x62,0x2D,
+0x4B,0x01,0x40,0x14,
+0xC0,0x10,0x07,0x00,
+0x0C,0x00,0x02,0x24,
+0x47,0x01,0x62,0x11,
+0x0D,0x00,0x02,0x24,
+0x46,0x01,0x62,0x11,
+0xC0,0x10,0x07,0x00,
+0x6C,0x00,0x20,0x11,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x42,0x24,
+0x80,0x18,0x0B,0x00,
+0x21,0x18,0x62,0x00,
+0x21,0x20,0x4B,0x02,
+0x5A,0x24,0x85,0x90,
+0x60,0x05,0x62,0x8C,
+0x00,0x00,0x00,0x00,
+0x04,0x10,0xA2,0x00,
+0x2B,0x10,0x4A,0x00,
+0x61,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x78,0x24,0x42,0x8E,
+0x01,0x00,0x07,0x24,
+0x04,0x18,0x67,0x01,
+0x24,0x10,0x43,0x00,
+0xE1,0x00,0x40,0x10,
+0x1C,0x00,0x62,0x2D,
+0x21,0x28,0x4B,0x02,
+0x20,0x24,0xA6,0x90,
+0x5A,0x24,0xA2,0x90,
+0x0A,0x00,0x04,0x24,
+0xFF,0x00,0xC3,0x30,
+0x04,0x20,0x44,0x00,
+0x2A,0x18,0x64,0x00,
+0xD8,0x00,0x60,0x10,
+0x1C,0x00,0x62,0x2D,
+0x01,0x00,0xC2,0x24,
+0xFF,0x00,0x43,0x30,
+0x37,0x01,0x64,0x10,
+0x20,0x24,0xA2,0xA0,
+0x02,0x80,0x04,0x3C,
+0x30,0x1F,0x85,0x24,
+0x80,0x10,0x0B,0x00,
+0x21,0x10,0x45,0x00,
+0xD4,0x05,0x44,0x8C,
+0x60,0x05,0x43,0x8C,
+0x18,0x00,0xA2,0x8F,
+0x00,0x00,0x00,0x00,
+0x21,0x30,0x45,0x00,
+0x40,0x10,0x04,0x00,
+0x21,0x10,0x44,0x00,
+0x21,0x18,0x62,0x00,
+0x82,0x50,0x03,0x00,
+0xE8,0x23,0xCA,0xAC,
+0x30,0x38,0xA3,0x8C,
+0xFF,0xFF,0x02,0x34,
+0x03,0x00,0x62,0x10,
+0x21,0x20,0x60,0x01,
+0x57,0x24,0x00,0x0C,
+0xFF,0x00,0x65,0x32,
+0x9E,0x00,0x60,0x12,
+0x02,0x80,0x03,0x3C,
+0x02,0x80,0x04,0x3C,
+0x30,0x1F,0x82,0x24,
+0x21,0x10,0xA2,0x02,
+0xFC,0x23,0x40,0xAC,
+0x00,0x24,0x40,0xAC,
+0x04,0x24,0x40,0xAC,
+0xEC,0x23,0x40,0xAC,
+0xF0,0x23,0x40,0xAC,
+0xF4,0x23,0x40,0xAC,
+0xF8,0x23,0x40,0xAC,
+0x2C,0x00,0xA2,0x8F,
+0x28,0x00,0xA4,0x8F,
+0x01,0x00,0x73,0x26,
+0x94,0x00,0x42,0x24,
+0x94,0x00,0x84,0x24,
+0x2C,0x00,0xA2,0xAF,
+0x28,0x00,0xA4,0xAF,
+0x24,0x00,0xA2,0x8F,
+0x20,0x00,0xA4,0x8F,
+0x20,0x00,0x63,0x2A,
+0x94,0x00,0x42,0x24,
+0x94,0x00,0x84,0x24,
+0x24,0x00,0xA2,0xAF,
+0x20,0x00,0xA4,0xAF,
+0x1C,0x00,0xA2,0x8F,
+0x18,0x00,0xA4,0x8F,
+0x94,0x00,0x52,0x26,
+0x94,0x00,0x42,0x24,
+0x94,0x00,0x84,0x24,
+0x1C,0x00,0xA2,0xAF,
+0x18,0x00,0xA4,0xAF,
+0x14,0x00,0xA2,0x8F,
+0x10,0x00,0xA4,0x8F,
+0x94,0x00,0xDE,0x27,
+0x94,0x00,0x42,0x24,
+0x94,0x00,0x84,0x24,
+0x14,0x00,0xA2,0xAF,
+0x94,0x00,0xF7,0x26,
+0x10,0x00,0xA4,0xAF,
+0x94,0x00,0x94,0x26,
+0x94,0x00,0xD6,0x26,
+0x69,0xFF,0x60,0x14,
+0x94,0x00,0xB5,0x26,
+0x54,0x00,0xBF,0x8F,
+0x50,0x00,0xBE,0x8F,
+0x4C,0x00,0xB7,0x8F,
+0x48,0x00,0xB6,0x8F,
+0x44,0x00,0xB5,0x8F,
+0x40,0x00,0xB4,0x8F,
+0x3C,0x00,0xB3,0x8F,
+0x38,0x00,0xB2,0x8F,
+0x34,0x00,0xB1,0x8F,
+0x30,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x58,0x00,0xBD,0x27,
+0x79,0x00,0xE0,0x10,
+0x00,0x00,0x00,0x00,
+0x79,0x00,0x20,0x15,
+0x02,0x80,0x03,0x3C,
+0x40,0x10,0x07,0x00,
+0x21,0x10,0x47,0x00,
+0x82,0x10,0x02,0x00,
+0x2B,0x10,0x46,0x00,
+0xBE,0xFF,0x40,0x10,
+0x02,0x80,0x04,0x3C,
+0x30,0x1F,0x88,0x24,
+0x21,0x20,0xC8,0x03,
+0x21,0x30,0x8B,0x00,
+0x78,0x24,0x83,0x8C,
+0x01,0x00,0x05,0x24,
+0x04,0x10,0x65,0x01,
+0x3D,0x24,0xC7,0x90,
+0x27,0x10,0x02,0x00,
+0x24,0x18,0x62,0x00,
+0x78,0x24,0x83,0xAC,
+0x09,0x00,0xE5,0x10,
+0x20,0x24,0xC0,0xA0,
+0x14,0x00,0xA2,0x8F,
+0x21,0x38,0x00,0x00,
+0x21,0x20,0x48,0x00,
+0x21,0x18,0x87,0x00,
+0x01,0x00,0xE7,0x24,
+0x1D,0x00,0xE2,0x28,
+0xFC,0xFF,0x40,0x14,
+0x5A,0x24,0x60,0xA0,
+0x02,0x80,0x04,0x3C,
+0x30,0x1F,0x83,0x24,
+0x21,0x10,0xE3,0x02,
+0x21,0x10,0x4B,0x00,
+0x3D,0x24,0x40,0xA0,
+0x21,0x50,0x60,0x00,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0x78,0xE8,0x49,0x24,
+0x04,0xE8,0x68,0x24,
+0x21,0x38,0x00,0x00,
+0x80,0x18,0x07,0x00,
+0x21,0x10,0x69,0x00,
+0x21,0x20,0x68,0x00,
+0x00,0x00,0x46,0x8C,
+0x00,0x00,0x85,0x8C,
+0x01,0x00,0xE7,0x24,
+0x21,0x18,0x6A,0x00,
+0x1D,0x00,0xE2,0x28,
+0x60,0x05,0x65,0xAC,
+0xF6,0xFF,0x40,0x14,
+0xD4,0x05,0x66,0xAC,
+0x15,0x00,0x60,0x11,
+0x02,0x80,0x04,0x3C,
+0x1F,0x24,0x82,0x92,
+0xFF,0xFF,0x67,0x25,
+0x2A,0x10,0xE2,0x00,
+0x10,0x00,0x40,0x14,
+0x02,0x80,0x03,0x3C,
+0x10,0x00,0xA4,0x8F,
+0x30,0x1F,0x62,0x24,
+0x21,0x10,0x82,0x00,
+0x1F,0x24,0x45,0x90,
+0x18,0x24,0x44,0x8C,
+0x01,0x00,0x06,0x24,
+0x04,0x18,0xE6,0x00,
+0x24,0x10,0x83,0x00,
+0xB9,0x00,0x43,0x10,
+0x00,0x00,0x00,0x00,
+0xFF,0xFF,0xE7,0x24,
+0x2A,0x10,0xE5,0x00,
+0xFA,0xFF,0x40,0x10,
+0x04,0x18,0xE6,0x00,
+0x02,0x80,0x04,0x3C,
+0x30,0x1F,0x83,0x24,
+0x80,0x10,0x0B,0x00,
+0x21,0x10,0x43,0x00,
+0xD4,0x05,0x45,0x8C,
+0x60,0x05,0x44,0x8C,
+0x02,0x80,0x03,0x3C,
+0x40,0x10,0x05,0x00,
+0xDE,0x5D,0x66,0x90,
+0x21,0x10,0x45,0x00,
+0x21,0x20,0x82,0x00,
+0x22,0x00,0x02,0x24,
+0x9D,0x00,0xC2,0x10,
+0x82,0x50,0x04,0x00,
+0x78,0x24,0x83,0x8E,
+0x01,0x00,0x02,0x24,
+0x04,0x10,0x62,0x01,
+0x25,0x18,0x62,0x00,
+0x78,0x24,0x83,0xAE,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x43,0x24,
+0x21,0x10,0xC3,0x02,
+0xE8,0x23,0x4A,0xAC,
+0x30,0x38,0x64,0x8C,
+0xFF,0xFF,0x02,0x34,
+0x62,0xFF,0x82,0x14,
+0x21,0x20,0x60,0x01,
+0x64,0xFF,0x60,0x16,
+0x02,0x80,0x03,0x3C,
+0x30,0x1F,0x70,0x24,
+0xF0,0x23,0x05,0x96,
+0xEC,0x23,0x02,0x96,
+0x25,0xB0,0x11,0x3C,
+0x00,0x2C,0x05,0x00,
+0x21,0x28,0x45,0x00,
+0xB5,0x59,0x00,0x0C,
+0x68,0x0C,0x24,0x36,
+0xFC,0x23,0x02,0x8E,
+0xF8,0x23,0x05,0x8E,
+0xF4,0x23,0x03,0x96,
+0x6C,0x0C,0x24,0x36,
+0x21,0x28,0xA2,0x00,
+0x00,0x2C,0x05,0x00,
+0xB5,0x59,0x00,0x0C,
+0x21,0x28,0x65,0x00,
+0x28,0x26,0x00,0x08,
+0x02,0x80,0x04,0x3C,
+0xD6,0x25,0x00,0x08,
+0xE8,0x23,0x40,0xAE,
+0x4C,0xFF,0x20,0x11,
+0x02,0x80,0x03,0x3C,
+0x30,0x1F,0x62,0x24,
+0x80,0x18,0x0B,0x00,
+0x21,0x18,0x62,0x00,
+0xD4,0x05,0x64,0x8C,
+0x00,0x00,0x00,0x00,
+0x2B,0x20,0x44,0x01,
+0x44,0xFF,0x80,0x10,
+0x02,0x80,0x04,0x3C,
+0x69,0x26,0x00,0x08,
+0x30,0x1F,0x88,0x24,
+0x2D,0xFF,0x40,0x10,
+0x02,0x80,0x04,0x3C,
+0x21,0x20,0x4B,0x02,
+0x3D,0x24,0x83,0x90,
+0x01,0x00,0x02,0x24,
+0x53,0x00,0x62,0x10,
+0x02,0x80,0x02,0x3C,
+0x2C,0x00,0xA3,0x8F,
+0x30,0x1F,0x42,0x24,
+0x21,0x38,0x00,0x00,
+0x21,0x20,0x62,0x00,
+0x21,0x18,0x87,0x00,
+0x01,0x00,0xE7,0x24,
+0x1D,0x00,0xE2,0x28,
+0xFC,0xFF,0x40,0x14,
+0x5A,0x24,0x60,0xA0,
+0x28,0x00,0xA4,0x8F,
+0x02,0x80,0x03,0x3C,
+0x30,0x1F,0x65,0x24,
+0x21,0x30,0x85,0x00,
+0x78,0x24,0xC2,0x8C,
+0x01,0x00,0x03,0x24,
+0x04,0x18,0x63,0x01,
+0x27,0x18,0x03,0x00,
+0x21,0x20,0xCB,0x00,
+0x24,0x10,0x43,0x00,
+0x3D,0x24,0x80,0xA0,
+0x78,0x24,0xC2,0xAC,
+0x12,0x00,0x60,0x15,
+0x20,0x24,0x80,0xA0,
+0x1E,0x24,0xC2,0x90,
+0x00,0x00,0x00,0x00,
+0x0E,0x00,0x40,0x10,
+0x01,0x00,0x07,0x24,
+0x24,0x00,0xA3,0x8F,
+0x01,0x00,0x06,0x24,
+0x21,0x10,0x65,0x00,
+0x1E,0x24,0x44,0x90,
+0x18,0x24,0x45,0x8C,
+0x04,0x18,0xE6,0x00,
+0x24,0x10,0xA3,0x00,
+0x4B,0x00,0x43,0x10,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0xE7,0x24,
+0x2A,0x10,0x87,0x00,
+0xFA,0xFF,0x40,0x10,
+0x04,0x18,0xE6,0x00,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x44,0x24,
+0x20,0x00,0xA2,0x8F,
+0x01,0x00,0x67,0x25,
+0x21,0x18,0x44,0x00,
+0x1E,0x24,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x2A,0x10,0x47,0x00,
+0x0E,0x00,0x40,0x14,
+0x01,0x00,0x06,0x24,
+0x1C,0x00,0xA3,0x8F,
+0x00,0x00,0x00,0x00,
+0x21,0x10,0x64,0x00,
+0x1E,0x24,0x45,0x90,
+0x18,0x24,0x44,0x8C,
+0x04,0x18,0xE6,0x00,
+0x24,0x10,0x83,0x00,
+0x31,0x00,0x43,0x10,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0xE7,0x24,
+0x2A,0x10,0xA7,0x00,
+0xFA,0xFF,0x40,0x10,
+0x04,0x18,0xE6,0x00,
+0x02,0x80,0x02,0x3C,
+0xDE,0x5D,0x44,0x90,
+0x22,0x00,0x03,0x24,
+0xE4,0xFE,0x83,0x14,
+0x02,0x80,0x04,0x3C,
+0xEE,0xFF,0x62,0x25,
+0xFF,0x00,0x42,0x30,
+0x02,0x00,0x42,0x2C,
+0x18,0x00,0x03,0x24,
+0x12,0x26,0x00,0x08,
+0x0B,0x58,0x62,0x00,
+0xC0,0x10,0x07,0x00,
+0x23,0x10,0x47,0x00,
+0xC2,0x10,0x02,0x00,
+0x2B,0x10,0x48,0x00,
+0xC4,0xFE,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0xF1,0x25,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x18,0x00,0x62,0x2D,
+0x0A,0x00,0x40,0x14,
+0x05,0x00,0x62,0x2D,
+0x5A,0x24,0x83,0x90,
+0x00,0x00,0x00,0x00,
+0x05,0x00,0x62,0x2C,
+0xB0,0xFF,0x40,0x10,
+0x01,0x00,0x62,0x24,
+0xF4,0x26,0x00,0x08,
+0x5A,0x24,0x82,0xA0,
+0x11,0x26,0x00,0x08,
+0x3D,0x24,0xA7,0xA0,
+0x04,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x5A,0x24,0x83,0x90,
+0x43,0x27,0x00,0x08,
+0x03,0x00,0x62,0x2C,
+0x5A,0x24,0x83,0x90,
+0x43,0x27,0x00,0x08,
+0x04,0x00,0x62,0x2C,
+0x13,0x00,0x02,0x24,
+0x62,0xFF,0x62,0x15,
+0x02,0x80,0x02,0x3C,
+0xBC,0x26,0x00,0x08,
+0x30,0x1F,0x43,0x24,
+0xFF,0x00,0xEB,0x30,
+0x2B,0x27,0x00,0x08,
+0x02,0x80,0x02,0x3C,
+0x13,0x27,0x00,0x08,
+0xFF,0x00,0xEB,0x30,
+0xA7,0x26,0x00,0x08,
+0xFF,0x00,0xEB,0x30,
+0xD8,0xFF,0xBD,0x27,
+0x02,0x80,0x02,0x3C,
+0x14,0x00,0xB1,0xAF,
+0x24,0x00,0xBF,0xAF,
+0x20,0x00,0xB4,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x30,0x1F,0x45,0x24,
+0xA9,0x37,0xA4,0x90,
+0xA4,0x37,0xA3,0x8C,
+0xA0,0x37,0xA2,0x8C,
+0x21,0x88,0x64,0x00,
+0x2B,0x10,0x22,0x02,
+0x60,0x00,0x40,0x10,
+0x21,0x80,0xA0,0x00,
+0x02,0x80,0x14,0x3C,
+0x21,0x98,0xA0,0x00,
+0x76,0x27,0x00,0x08,
+0x21,0x90,0xA0,0x00,
+0xA0,0x37,0x42,0x8E,
+0x10,0x00,0x31,0x26,
+0x2B,0x10,0x22,0x02,
+0x57,0x00,0x40,0x10,
+0x21,0x80,0x40,0x02,
+0xA9,0x37,0x02,0x92,
+0xFF,0xFF,0x23,0x32,
+0x02,0x80,0x05,0x3C,
+0x10,0x00,0x42,0x24,
+0x25,0x28,0x65,0x00,
+0x98,0x55,0x84,0x26,
+0x10,0x00,0x06,0x24,
+0x10,0x52,0x00,0x0C,
+0xA9,0x37,0x02,0xA2,
+0x6C,0x36,0x06,0x8E,
+0x00,0x00,0x00,0x00,
+0x42,0x24,0x06,0x00,
+0x1F,0x00,0x84,0x30,
+0xC0,0x10,0x04,0x00,
+0x21,0x10,0x44,0x00,
+0x80,0x10,0x02,0x00,
+0x21,0x10,0x44,0x00,
+0x80,0x10,0x02,0x00,
+0x21,0x38,0x50,0x00,
+0x1C,0x24,0xE3,0x8C,
+0x00,0x00,0x00,0x00,
+0x02,0x1B,0x03,0x00,
+0x01,0x00,0x63,0x30,
+0xE3,0xFF,0x60,0x10,
+0x25,0xB0,0x02,0x3C,
+0x68,0x36,0x05,0x8E,
+0x21,0x10,0x82,0x00,
+0x60,0x01,0x44,0x90,
+0x82,0x1D,0x05,0x00,
+0x3F,0x00,0x63,0x30,
+0x04,0x00,0x0A,0x24,
+0x05,0x00,0x62,0x28,
+0x21,0x40,0x40,0x01,
+0x0B,0x40,0x62,0x00,
+0x07,0x00,0xA0,0x04,
+0xFF,0x00,0x89,0x30,
+0x08,0x24,0xE2,0x8C,
+0x04,0x00,0x08,0x24,
+0x01,0x00,0x42,0x24,
+0x08,0x24,0xE2,0xAC,
+0x6C,0x36,0x66,0x8E,
+0x00,0x00,0x00,0x00,
+0x02,0x13,0x06,0x00,
+0x1F,0x00,0x42,0x30,
+0x08,0x00,0x42,0x28,
+0xCD,0xFF,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x68,0x36,0x62,0x8E,
+0x00,0x00,0x00,0x00,
+0x3F,0x00,0x42,0x30,
+0xC8,0xFF,0x49,0x14,
+0x00,0x00,0x00,0x00,
+0x29,0x00,0x00,0x11,
+0x01,0x00,0x02,0x24,
+0x2E,0x00,0x02,0x11,
+0x02,0x00,0x02,0x24,
+0x33,0x00,0x02,0x11,
+0x03,0x00,0x02,0x24,
+0x38,0x00,0x02,0x11,
+0x00,0x00,0x00,0x00,
+0x3B,0x00,0x0A,0x11,
+0x00,0x00,0x00,0x00,
+0x0C,0x24,0xE2,0x8C,
+0x21,0x18,0x33,0x01,
+0x04,0x05,0x64,0x90,
+0x02,0x11,0x02,0x00,
+0x2B,0x10,0x44,0x00,
+0x3E,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x00,0x24,0xE3,0x8C,
+0x80,0x10,0x09,0x00,
+0x21,0x10,0x49,0x00,
+0x01,0x00,0x63,0x24,
+0x21,0x10,0x53,0x00,
+0x00,0x24,0xE3,0xAC,
+0x21,0x10,0x48,0x00,
+0xA8,0x03,0x44,0x90,
+0xE8,0x23,0xE3,0x8C,
+0x00,0x00,0x00,0x00,
+0x21,0x18,0x64,0x00,
+0xE8,0x23,0xE3,0xAC,
+0xA0,0x37,0x42,0x8E,
+0x10,0x00,0x31,0x26,
+0x2B,0x10,0x22,0x02,
+0xAB,0xFF,0x40,0x14,
+0x21,0x80,0x40,0x02,
+0x24,0x00,0xBF,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0xEC,0x23,0xE2,0x8C,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xEC,0x23,0xE2,0xAC,
+0x01,0x00,0x02,0x24,
+0xD4,0xFF,0x02,0x15,
+0x02,0x00,0x02,0x24,
+0xF0,0x23,0xE2,0x8C,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xF0,0x23,0xE2,0xAC,
+0x02,0x00,0x02,0x24,
+0xCF,0xFF,0x02,0x15,
+0x03,0x00,0x02,0x24,
+0xF4,0x23,0xE2,0x8C,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xF4,0x23,0xE2,0xAC,
+0x03,0x00,0x02,0x24,
+0xCA,0xFF,0x02,0x15,
+0x00,0x00,0x00,0x00,
+0xF8,0x23,0xE2,0x8C,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xC7,0xFF,0x0A,0x15,
+0xF8,0x23,0xE2,0xAC,
+0xFC,0x23,0xE2,0x8C,
+0x21,0x18,0x33,0x01,
+0x01,0x00,0x42,0x24,
+0xFC,0x23,0xE2,0xAC,
+0x0C,0x24,0xE2,0x8C,
+0x04,0x05,0x64,0x90,
+0x02,0x11,0x02,0x00,
+0x2B,0x10,0x44,0x00,
+0xC4,0xFF,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x04,0x24,0xE3,0x8C,
+0x80,0x10,0x09,0x00,
+0x21,0x10,0x49,0x00,
+0x01,0x00,0x63,0x24,
+0x21,0x10,0x53,0x00,
+0x04,0x24,0xE3,0xAC,
+0x21,0x10,0x48,0x00,
+0x39,0x04,0x44,0x90,
+0xE8,0x23,0xE3,0x8C,
+0x00,0x00,0x00,0x00,
+0x21,0x18,0x64,0x00,
+0xC7,0x27,0x00,0x08,
+0xE8,0x23,0xE3,0xAC,
+0x23,0x10,0xA4,0x00,
+0x2B,0x18,0xA4,0x00,
+0x23,0x20,0x85,0x00,
+0x08,0x00,0xE0,0x03,
+0x0B,0x10,0x83,0x00,
+0x20,0xFF,0xBD,0x27,
+0xCC,0x00,0xB5,0xAF,
+0xDC,0x00,0xBF,0xAF,
+0xD8,0x00,0xBE,0xAF,
+0xD4,0x00,0xB7,0xAF,
+0xD0,0x00,0xB6,0xAF,
+0xC8,0x00,0xB4,0xAF,
+0xC4,0x00,0xB3,0xAF,
+0xC0,0x00,0xB2,0xAF,
+0xBC,0x00,0xB1,0xAF,
+0xB8,0x00,0xB0,0xAF,
+0x21,0xA8,0x00,0x00,
+0x40,0x11,0x15,0x00,
+0x10,0x00,0xA3,0x27,
+0x21,0x10,0x43,0x00,
+0x07,0x00,0x16,0x24,
+0xFF,0xFF,0xD6,0x26,
+0x00,0x00,0x40,0xAC,
+0xFD,0xFF,0xC1,0x06,
+0x04,0x00,0x42,0x24,
+0x01,0x00,0xB5,0x26,
+0x03,0x00,0xA2,0x2E,
+0xF6,0xFF,0x40,0x14,
+0x40,0x11,0x15,0x00,
+0x25,0xB0,0x10,0x3C,
+0xC4,0x02,0x02,0x36,
+0x00,0x00,0x40,0xAC,
+0x04,0x00,0x03,0x36,
+0x00,0x00,0x62,0x8C,
+0x04,0x0C,0x03,0x36,
+0x00,0x00,0x63,0x8C,
+0x08,0x0C,0x04,0x36,
+0x0F,0x00,0x11,0x3C,
+0xAC,0x00,0xA3,0xAF,
+0x00,0x00,0x84,0x8C,
+0x24,0x10,0x51,0x00,
+0x02,0xF4,0x02,0x00,
+0xB0,0x00,0xA4,0xAF,
+0x00,0x60,0x12,0x40,
+0x01,0x00,0x41,0x36,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x21,0x20,0x00,0x00,
+0x8A,0x47,0x00,0x0C,
+0xFF,0xFF,0x25,0x36,
+0x70,0x00,0xA2,0xAF,
+0x00,0x60,0x92,0x40,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0xE6,0x44,0x00,0x0C,
+0x01,0x00,0x04,0x24,
+0x00,0x60,0x12,0x40,
+0x01,0x00,0x41,0x36,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x21,0x20,0x00,0x00,
+0x8A,0x47,0x00,0x0C,
+0xFF,0xFF,0x25,0x36,
+0x74,0x00,0xA2,0xAF,
+0x00,0x60,0x92,0x40,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0xE6,0x44,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0xE0,0x0E,0x02,0x36,
+0x21,0x20,0x40,0x00,
+0x00,0x00,0x42,0x8C,
+0xDC,0x0E,0x12,0x36,
+0x70,0x0E,0x13,0x36,
+0x78,0x00,0xA2,0xAF,
+0x00,0x00,0x42,0x8E,
+0x74,0x0E,0x14,0x36,
+0x78,0x0E,0x15,0x36,
+0x7C,0x00,0xA2,0xAF,
+0x00,0x00,0x63,0x8E,
+0x7C,0x0E,0x16,0x36,
+0x80,0x0E,0x17,0x36,
+0x80,0x00,0xA3,0xAF,
+0x00,0x00,0x82,0x8E,
+0xD4,0x0E,0x10,0x36,
+0xED,0x3F,0x11,0x3C,
+0x84,0x00,0xA2,0xAF,
+0x00,0x00,0xA3,0x8E,
+0xFB,0x92,0x25,0x36,
+0x88,0x00,0xA3,0xAF,
+0x00,0x00,0xC2,0x8E,
+0x00,0x00,0x00,0x00,
+0x8C,0x00,0xA2,0xAF,
+0x00,0x00,0xE3,0x8E,
+0x25,0xB0,0x02,0x3C,
+0x84,0x0E,0x42,0x34,
+0x90,0x00,0xA3,0xAF,
+0x00,0x00,0x42,0x8C,
+0x25,0xB0,0x03,0x3C,
+0x88,0x0E,0x63,0x34,
+0x94,0x00,0xA2,0xAF,
+0x00,0x00,0x63,0x8C,
+0x25,0xB0,0x02,0x3C,
+0x8C,0x0E,0x42,0x34,
+0x98,0x00,0xA3,0xAF,
+0x00,0x00,0x42,0x8C,
+0x25,0xB0,0x03,0x3C,
+0xD0,0x0E,0x63,0x34,
+0x9C,0x00,0xA2,0xAF,
+0x00,0x00,0x63,0x8C,
+0x00,0x00,0x00,0x00,
+0xA0,0x00,0xA3,0xAF,
+0x00,0x00,0x02,0x8E,
+0x25,0xB0,0x03,0x3C,
+0xD8,0x0E,0x63,0x34,
+0xA4,0x00,0xA2,0xAF,
+0x00,0x00,0x63,0x8C,
+0x02,0x5C,0x00,0x0C,
+0xA8,0x00,0xA3,0xAF,
+0x21,0x20,0x40,0x02,
+0x02,0x5C,0x00,0x0C,
+0xFB,0x92,0x25,0x36,
+0x21,0x20,0x60,0x02,
+0x02,0x5C,0x00,0x0C,
+0xFB,0x92,0x25,0x36,
+0x21,0x20,0x80,0x02,
+0x02,0x5C,0x00,0x0C,
+0xFB,0x92,0x25,0x36,
+0x21,0x20,0xA0,0x02,
+0x02,0x5C,0x00,0x0C,
+0xFB,0x92,0x25,0x36,
+0x21,0x20,0xC0,0x02,
+0x02,0x5C,0x00,0x0C,
+0xFB,0x92,0x25,0x36,
+0x21,0x20,0xE0,0x02,
+0x02,0x5C,0x00,0x0C,
+0xFB,0x92,0x25,0x36,
+0x02,0x80,0x02,0x3C,
+0xA8,0xED,0x42,0x24,
+0x00,0x00,0x44,0x8C,
+0xFB,0x92,0x25,0x36,
+0x02,0x5C,0x00,0x0C,
+0x25,0xB0,0x13,0x3C,
+0x02,0x80,0x03,0x3C,
+0xAC,0xED,0x63,0x24,
+0x00,0x00,0x64,0x8C,
+0xFB,0x92,0x25,0x36,
+0x02,0x5C,0x00,0x0C,
+0x21,0xB0,0x00,0x00,
+0x02,0x80,0x02,0x3C,
+0xB0,0xED,0x42,0x24,
+0x00,0x00,0x44,0x8C,
+0xFB,0x92,0x25,0x36,
+0x02,0x5C,0x00,0x0C,
+0xFF,0x03,0x14,0x3C,
+0x02,0x80,0x03,0x3C,
+0xB4,0xED,0x63,0x24,
+0x00,0x00,0x64,0x8C,
+0xFB,0x92,0x25,0x36,
+0x02,0x5C,0x00,0x0C,
+0x10,0x00,0xB7,0x27,
+0x21,0x20,0x00,0x02,
+0x02,0x5C,0x00,0x0C,
+0xFB,0x92,0x25,0x36,
+0x02,0x80,0x02,0x3C,
+0xB8,0xED,0x42,0x24,
+0x00,0x00,0x44,0x8C,
+0x02,0x5C,0x00,0x0C,
+0xFB,0x92,0x25,0x36,
+0xE4,0x28,0x00,0x08,
+0x21,0xA8,0x00,0x00,
+0x6E,0x00,0xC2,0x13,
+0x02,0x80,0x02,0x3C,
+0xAC,0x0E,0x62,0x36,
+0x94,0x0E,0x63,0x36,
+0x00,0x00,0x48,0x8C,
+0x00,0x00,0x64,0x8C,
+0xB4,0x0E,0x62,0x36,
+0x9C,0x0E,0x63,0x36,
+0x00,0x00,0x45,0x8C,
+0x00,0x00,0x66,0x8C,
+0x25,0xB0,0x03,0x3C,
+0xBC,0x0E,0x63,0x34,
+0x00,0x00,0x67,0x8C,
+0x24,0x20,0x94,0x00,
+0x00,0xD8,0x02,0x3C,
+0x24,0x10,0x02,0x01,
+0x24,0x28,0xB4,0x00,
+0x24,0x30,0xD4,0x00,
+0x24,0x38,0xF4,0x00,
+0x02,0x24,0x04,0x00,
+0x20,0x01,0x03,0x24,
+0x01,0x00,0x42,0x2C,
+0x02,0x2C,0x05,0x00,
+0x02,0x34,0x06,0x00,
+0xE8,0x00,0x83,0x10,
+0x02,0x3C,0x07,0x00,
+0xE6,0x00,0xA3,0x10,
+0x20,0x00,0x03,0x24,
+0xE4,0x00,0xC3,0x10,
+0x00,0x00,0x00,0x00,
+0xE2,0x00,0xE3,0x10,
+0x01,0x00,0x08,0x24,
+0x80,0x00,0x03,0x24,
+0x08,0x00,0x83,0x10,
+0x21,0x20,0x00,0x00,
+0x06,0x00,0xA3,0x10,
+0x21,0x20,0x00,0x00,
+0xE0,0x03,0x03,0x24,
+0x03,0x00,0xC3,0x10,
+0x00,0x00,0x00,0x00,
+0xDB,0x00,0xE3,0x10,
+0x01,0x00,0x04,0x24,
+0x05,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x03,0x00,0x00,0x11,
+0x00,0x00,0x00,0x00,
+0xD7,0x00,0x80,0x14,
+0x94,0x0E,0x63,0x36,
+0x01,0x00,0xB5,0x26,
+0x0A,0x00,0xA2,0x2E,
+0x01,0x01,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0xCB,0xFF,0xC0,0x17,
+0x01,0x00,0x02,0x24,
+0xA0,0x00,0x03,0x3C,
+0x30,0x54,0x65,0x34,
+0x02,0x5C,0x00,0x0C,
+0x04,0x0C,0x64,0x36,
+0x08,0x00,0x05,0x3C,
+0xE4,0x00,0xA5,0x34,
+0x02,0x5C,0x00,0x0C,
+0x08,0x0C,0x64,0x36,
+0x28,0x0E,0x64,0x36,
+0x02,0x5C,0x00,0x0C,
+0x80,0x80,0x05,0x3C,
+0x14,0x02,0x02,0x3C,
+0x48,0x01,0x45,0x34,
+0x02,0x5C,0x00,0x0C,
+0x40,0x0E,0x64,0x36,
+0x16,0x68,0x05,0x3C,
+0xA2,0x04,0xA5,0x34,
+0x02,0x5C,0x00,0x0C,
+0x44,0x0E,0x64,0x36,
+0x4C,0x0E,0x64,0x36,
+0x02,0x5C,0x00,0x0C,
+0xD1,0x28,0x05,0x24,
+0x14,0x02,0x03,0x3C,
+0x4D,0x01,0x65,0x34,
+0x02,0x5C,0x00,0x0C,
+0x60,0x0E,0x64,0x36,
+0x16,0x28,0x05,0x3C,
+0xBA,0x08,0xA5,0x34,
+0x02,0x5C,0x00,0x0C,
+0x64,0x0E,0x64,0x36,
+0x6C,0x0E,0x64,0x36,
+0x02,0x5C,0x00,0x0C,
+0xD1,0x28,0x05,0x24,
+0x00,0xFB,0x05,0x3C,
+0x01,0x00,0xA5,0x34,
+0x02,0x5C,0x00,0x0C,
+0x48,0x0E,0x64,0x36,
+0x00,0xF8,0x05,0x3C,
+0x01,0x00,0xA5,0x34,
+0x02,0x5C,0x00,0x0C,
+0x48,0x0E,0x64,0x36,
+0x25,0x22,0x00,0x0C,
+0x03,0x00,0x04,0x24,
+0xA0,0x00,0x02,0x3C,
+0x33,0x54,0x45,0x34,
+0x02,0x5C,0x00,0x0C,
+0x04,0x0C,0x64,0x36,
+0x08,0x0C,0x64,0x36,
+0x02,0x5C,0x00,0x0C,
+0xE4,0x00,0x05,0x24,
+0x28,0x0E,0x64,0x36,
+0x02,0x5C,0x00,0x0C,
+0x21,0x28,0x00,0x00,
+0x01,0x00,0x02,0x24,
+0x96,0xFF,0xC2,0x17,
+0xAC,0x0E,0x62,0x36,
+0x02,0x80,0x02,0x3C,
+0xBC,0xED,0x42,0x24,
+0x25,0xB0,0x03,0x3C,
+0x00,0x00,0x44,0x8C,
+0x20,0x08,0x63,0x34,
+0x00,0x00,0x71,0x8C,
+0x00,0x01,0x03,0x3C,
+0x00,0x01,0x65,0x34,
+0x02,0x5C,0x00,0x0C,
+0x25,0xB0,0x12,0x3C,
+0x00,0x01,0x02,0x3C,
+0x00,0x01,0x45,0x34,
+0x02,0x5C,0x00,0x0C,
+0x28,0x08,0x44,0x36,
+0xA0,0x00,0x03,0x3C,
+0x30,0x54,0x65,0x34,
+0x02,0x5C,0x00,0x0C,
+0x04,0x0C,0x44,0x36,
+0x08,0x00,0x05,0x3C,
+0xE4,0x00,0xA5,0x34,
+0x02,0x5C,0x00,0x0C,
+0x08,0x0C,0x44,0x36,
+0x28,0x0E,0x44,0x36,
+0x02,0x5C,0x00,0x0C,
+0x80,0x80,0x05,0x3C,
+0x00,0x01,0x02,0x3C,
+0x00,0x7C,0x45,0x34,
+0x02,0x5C,0x00,0x0C,
+0x30,0x0E,0x44,0x36,
+0x00,0x01,0x03,0x3C,
+0x00,0x48,0x65,0x34,
+0x02,0x5C,0x00,0x0C,
+0x34,0x0E,0x44,0x36,
+0x00,0x10,0x02,0x3C,
+0x1F,0xDC,0x45,0x34,
+0x02,0x5C,0x00,0x0C,
+0x38,0x0E,0x44,0x36,
+0x00,0x10,0x03,0x3C,
+0x1F,0x8C,0x65,0x34,
+0x02,0x5C,0x00,0x0C,
+0x3C,0x0E,0x44,0x36,
+0x14,0x02,0x02,0x3C,
+0x02,0x01,0x45,0x34,
+0x02,0x5C,0x00,0x0C,
+0x40,0x0E,0x44,0x36,
+0x16,0x68,0x05,0x3C,
+0xC7,0x04,0xA5,0x34,
+0x02,0x5C,0x00,0x0C,
+0x44,0x0E,0x44,0x36,
+0x4C,0x0E,0x44,0x36,
+0x02,0x5C,0x00,0x0C,
+0xD1,0x28,0x05,0x24,
+0x6C,0x0E,0x44,0x36,
+0x02,0x5C,0x00,0x0C,
+0xD1,0x28,0x05,0x24,
+0x00,0x01,0x03,0x3C,
+0x00,0x7C,0x65,0x34,
+0x02,0x5C,0x00,0x0C,
+0x50,0x0E,0x44,0x36,
+0x00,0x01,0x02,0x3C,
+0x00,0x48,0x45,0x34,
+0x02,0x5C,0x00,0x0C,
+0x54,0x0E,0x44,0x36,
+0x00,0x10,0x03,0x3C,
+0x23,0xDC,0x65,0x34,
+0x02,0x5C,0x00,0x0C,
+0x58,0x0E,0x44,0x36,
+0x00,0x10,0x02,0x3C,
+0x23,0x8C,0x45,0x34,
+0x02,0x5C,0x00,0x0C,
+0x5C,0x0E,0x44,0x36,
+0x14,0x02,0x03,0x3C,
+0x02,0x01,0x65,0x34,
+0x02,0x5C,0x00,0x0C,
+0x60,0x0E,0x44,0x36,
+0x16,0x28,0x05,0x3C,
+0x07,0x0D,0xA5,0x34,
+0x02,0x5C,0x00,0x0C,
+0x64,0x0E,0x44,0x36,
+0x48,0x0E,0x44,0x36,
+0x02,0x5C,0x00,0x0C,
+0x00,0xFB,0x05,0x3C,
+0x00,0xF8,0x05,0x3C,
+0x02,0x5C,0x00,0x0C,
+0x48,0x0E,0x44,0x36,
+0x00,0x02,0x10,0x3C,
+0x25,0x22,0x00,0x0C,
+0x03,0x00,0x04,0x24,
+0x4C,0x0E,0x44,0x36,
+0x02,0x5C,0x00,0x0C,
+0xD1,0x28,0x05,0x36,
+0xD1,0x28,0x05,0x36,
+0x02,0x5C,0x00,0x0C,
+0x6C,0x0E,0x44,0x36,
+0x48,0x0E,0x44,0x36,
+0x02,0x5C,0x00,0x0C,
+0x00,0xFB,0x05,0x3C,
+0x00,0xF8,0x05,0x3C,
+0x02,0x5C,0x00,0x0C,
+0x48,0x0E,0x44,0x36,
+0x25,0x22,0x00,0x0C,
+0x03,0x00,0x04,0x24,
+0xAC,0x00,0xA5,0x8F,
+0x04,0x0C,0x44,0x36,
+0x02,0x5C,0x00,0x0C,
+0x00,0x01,0x31,0x32,
+0xB0,0x00,0xA5,0x8F,
+0x08,0x0C,0x44,0x36,
+0x02,0x5C,0x00,0x0C,
+0x2B,0x88,0x11,0x00,
+0x28,0x0E,0x44,0x36,
+0x02,0x5C,0x00,0x0C,
+0x21,0x28,0x00,0x00,
+0x23,0xFF,0x20,0x16,
+0xAC,0x0E,0x62,0x36,
+0x02,0x80,0x02,0x3C,
+0xBC,0xED,0x42,0x24,
+0x00,0x00,0x44,0x8C,
+0x02,0x5C,0x00,0x0C,
+0x00,0x01,0x05,0x3C,
+0x28,0x08,0x44,0x36,
+0x02,0x5C,0x00,0x0C,
+0x00,0x01,0x05,0x3C,
+0xAC,0x0E,0x62,0x36,
+0x94,0x0E,0x63,0x36,
+0x00,0x00,0x48,0x8C,
+0x00,0x00,0x64,0x8C,
+0xB4,0x0E,0x62,0x36,
+0x9C,0x0E,0x63,0x36,
+0x00,0x00,0x45,0x8C,
+0x00,0x00,0x66,0x8C,
+0x25,0xB0,0x03,0x3C,
+0xBC,0x0E,0x63,0x34,
+0x00,0x00,0x67,0x8C,
+0x24,0x20,0x94,0x00,
+0x00,0xD8,0x02,0x3C,
+0x24,0x10,0x02,0x01,
+0x24,0x28,0xB4,0x00,
+0x24,0x30,0xD4,0x00,
+0x24,0x38,0xF4,0x00,
+0x02,0x24,0x04,0x00,
+0x20,0x01,0x03,0x24,
+0x01,0x00,0x42,0x2C,
+0x02,0x2C,0x05,0x00,
+0x02,0x34,0x06,0x00,
+0x1A,0xFF,0x83,0x14,
+0x02,0x3C,0x07,0x00,
+0x80,0x00,0x03,0x24,
+0x20,0xFF,0x83,0x14,
+0x21,0x40,0x00,0x00,
+0xDA,0x28,0x00,0x08,
+0x21,0x20,0x00,0x00,
+0x00,0x00,0x62,0x8C,
+0x9C,0x0E,0x65,0x36,
+0xA4,0x0E,0x66,0x36,
+0x24,0x10,0x54,0x00,
+0x02,0x14,0x02,0x00,
+0x00,0x00,0xE2,0xAE,
+0x00,0x00,0xA4,0x8C,
+0xAC,0x0E,0x67,0x36,
+0xB4,0x0E,0x65,0x36,
+0x24,0x20,0x94,0x00,
+0x02,0x24,0x04,0x00,
+0x04,0x00,0xE4,0xAE,
+0x00,0x00,0xC3,0x8C,
+0xC4,0x0E,0x64,0x36,
+0x24,0x18,0x74,0x00,
+0x02,0x1C,0x03,0x00,
+0x08,0x00,0xE3,0xAE,
+0x00,0x00,0xE2,0x8C,
+0x00,0x00,0x00,0x00,
+0x24,0x10,0x54,0x00,
+0x02,0x14,0x02,0x00,
+0x0C,0x00,0xE2,0xAE,
+0x00,0x00,0xA3,0x8C,
+0x00,0x00,0x00,0x00,
+0x24,0x18,0x74,0x00,
+0x02,0x1C,0x03,0x00,
+0x10,0x00,0xE3,0xAE,
+0x25,0xB0,0x03,0x3C,
+0xBC,0x0E,0x63,0x34,
+0x00,0x00,0x62,0x8C,
+0x00,0x00,0x00,0x00,
+0x24,0x10,0x54,0x00,
+0x02,0x14,0x02,0x00,
+0x14,0x00,0xE2,0xAE,
+0x00,0x00,0x83,0x8C,
+0x00,0x00,0x00,0x00,
+0x24,0x18,0x74,0x00,
+0x02,0x1C,0x03,0x00,
+0x18,0x00,0xE3,0xAE,
+0x25,0xB0,0x03,0x3C,
+0xCC,0x0E,0x63,0x34,
+0x00,0x00,0x62,0x8C,
+0x00,0x00,0x00,0x00,
+0x24,0x10,0x54,0x00,
+0x02,0x14,0x02,0x00,
+0x1C,0x00,0xE2,0xAE,
+0x01,0x00,0xD6,0x26,
+0x03,0x00,0xC2,0x2E,
+0xC7,0xFE,0x40,0x14,
+0x20,0x00,0xF7,0x26,
+0x10,0x00,0xB0,0x8F,
+0x00,0x00,0x00,0x00,
+0x49,0x01,0x00,0x16,
+0x00,0x00,0x00,0x00,
+0x30,0x00,0xB1,0x8F,
+0x00,0x00,0x00,0x00,
+0x06,0x00,0x20,0x16,
+0x21,0x20,0x00,0x02,
+0x50,0x00,0xA2,0x8F,
+0x00,0x00,0x00,0x00,
+0x29,0x00,0x40,0x10,
+0xFF,0x00,0x05,0x24,
+0x21,0x20,0x00,0x02,
+0x05,0x28,0x00,0x0C,
+0x21,0x28,0x20,0x02,
+0x03,0x00,0x42,0x2C,
+0x08,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x34,0x00,0xA5,0x8F,
+0x14,0x00,0xA4,0x8F,
+0x05,0x28,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x03,0x00,0x42,0x2C,
+0x1C,0x00,0x40,0x14,
+0x21,0x28,0x00,0x00,
+0x50,0x00,0xB2,0x8F,
+0x21,0x20,0x00,0x02,
+0x05,0x28,0x00,0x0C,
+0x21,0x28,0x40,0x02,
+0x03,0x00,0x42,0x2C,
+0x09,0x00,0x40,0x10,
+0x21,0x20,0x20,0x02,
+0x54,0x00,0xA5,0x8F,
+0x14,0x00,0xA4,0x8F,
+0x05,0x28,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x03,0x00,0x42,0x2C,
+0x0E,0x00,0x40,0x14,
+0x21,0x28,0x00,0x00,
+0x21,0x20,0x20,0x02,
+0x05,0x28,0x00,0x0C,
+0x21,0x28,0x40,0x02,
+0x03,0x00,0x42,0x2C,
+0xE0,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x54,0x00,0xA5,0x8F,
+0x34,0x00,0xA4,0x8F,
+0x05,0x28,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x03,0x00,0x42,0x2C,
+0xD9,0x00,0x40,0x10,
+0x01,0x00,0x05,0x24,
+0xFF,0x00,0x02,0x24,
+0xDB,0x00,0xA2,0x10,
+0x25,0xB0,0x03,0x3C,
+0x10,0x00,0xA2,0x27,
+0x40,0x29,0x05,0x00,
+0x02,0x80,0x0F,0x3C,
+0x21,0x28,0xA2,0x00,
+0x30,0x1F,0xEC,0x25,
+0x00,0x00,0xA6,0x8C,
+0x0C,0x00,0xA7,0x8C,
+0x0C,0x00,0x83,0x8D,
+0x10,0x00,0x84,0x8D,
+0x04,0x00,0xA8,0x8C,
+0x10,0x00,0xA9,0x8C,
+0x00,0xFC,0x02,0x24,
+0x08,0x00,0xAA,0x8C,
+0x14,0x00,0xAB,0x8C,
+0x24,0x20,0x82,0x00,
+0xFF,0x03,0xC6,0x30,
+0x24,0x18,0x62,0x00,
+0xFF,0x03,0xE7,0x30,
+0xF0,0xFF,0x02,0x3C,
+0xFF,0x03,0x42,0x34,
+0x25,0x18,0x66,0x00,
+0x25,0x20,0x87,0x00,
+0xFF,0x03,0x08,0x31,
+0xFF,0x03,0x29,0x31,
+0x24,0x20,0x82,0x00,
+0x24,0x18,0x62,0x00,
+0x80,0x42,0x08,0x00,
+0x80,0x4A,0x09,0x00,
+0x0F,0xC0,0x02,0x3C,
+0x1C,0x00,0xA6,0x8C,
+0x18,0x00,0xA7,0x8C,
+0xFF,0xFF,0x42,0x34,
+0x25,0x18,0x68,0x00,
+0x25,0x20,0x89,0x00,
+0xFF,0x03,0x4A,0x31,
+0xFF,0x03,0x6B,0x31,
+0x24,0x20,0x82,0x00,
+0x00,0x55,0x0A,0x00,
+0x24,0x18,0x62,0x00,
+0x00,0x5D,0x0B,0x00,
+0x25,0x18,0x6A,0x00,
+0x25,0x20,0x8B,0x00,
+0x16,0x00,0x86,0xA5,
+0x0C,0x00,0x83,0xAD,
+0x10,0x00,0x84,0xAD,
+0x14,0x00,0x87,0xA5,
+0x30,0x1F,0xF1,0x25,
+0x10,0x00,0x22,0x8E,
+0x01,0x00,0x03,0x24,
+0x82,0x17,0x02,0x00,
+0x4D,0x00,0x43,0x10,
+0x25,0xB0,0x12,0x3C,
+0x0C,0x00,0x23,0x8E,
+0x80,0x0C,0x44,0x36,
+0x00,0x00,0x88,0x8C,
+0x00,0x02,0x62,0x30,
+0xC0,0xFF,0x13,0x3C,
+0x82,0x6D,0x08,0x00,
+0x03,0x00,0x40,0x10,
+0xFF,0x03,0x65,0x30,
+0x00,0xFC,0x02,0x24,
+0x25,0x28,0xA2,0x00,
+0x18,0x00,0xAD,0x00,
+0x82,0x62,0x03,0x00,
+0xFF,0x03,0x8C,0x31,
+0x00,0x02,0x83,0x31,
+0x12,0x10,0x00,0x00,
+0x02,0x12,0x02,0x00,
+0x03,0x00,0x60,0x10,
+0xFF,0x03,0x46,0x30,
+0x00,0xFC,0x02,0x24,
+0x25,0x60,0x82,0x01,
+0x18,0x00,0x8D,0x01,
+0x00,0xFC,0x74,0x36,
+0x24,0x28,0x14,0x01,
+0x12,0x80,0x00,0x00,
+0x02,0x82,0x10,0x00,
+0x3F,0x00,0x02,0x32,
+0x00,0x14,0x02,0x00,
+0x25,0x28,0xA2,0x00,
+0x02,0x5C,0x00,0x0C,
+0x25,0x28,0xA6,0x00,
+0x94,0x0C,0x44,0x36,
+0x00,0x00,0x85,0x8C,
+0xFF,0x0F,0x02,0x3C,
+0xFF,0xFF,0x55,0x34,
+0xC0,0x03,0x10,0x32,
+0x24,0x28,0xB5,0x00,
+0x80,0x85,0x10,0x00,
+0x02,0x5C,0x00,0x0C,
+0x25,0x28,0xB0,0x00,
+0x10,0x00,0x2C,0x8E,
+0x88,0x0C,0x44,0x36,
+0x00,0x00,0x88,0x8C,
+0x82,0x2A,0x0C,0x00,
+0xFF,0x03,0xA5,0x30,
+0x24,0x10,0x13,0x01,
+0x00,0x02,0xA3,0x30,
+0x03,0x00,0x60,0x10,
+0x82,0x6D,0x02,0x00,
+0x00,0xFC,0x02,0x24,
+0x25,0x28,0xA2,0x00,
+0x18,0x00,0xAD,0x00,
+0x02,0x65,0x0C,0x00,
+0xFF,0x03,0x8C,0x31,
+0x00,0x02,0x83,0x31,
+0x12,0x10,0x00,0x00,
+0x02,0x12,0x02,0x00,
+0x03,0x00,0x60,0x10,
+0xFF,0x03,0x46,0x30,
+0x00,0xFC,0x02,0x24,
+0x25,0x60,0x82,0x01,
+0x18,0x00,0x8D,0x01,
+0x24,0x28,0x14,0x01,
+0x12,0x80,0x00,0x00,
+0x02,0x82,0x10,0x00,
+0x3F,0x00,0x02,0x32,
+0x00,0x14,0x02,0x00,
+0x25,0x28,0xA2,0x00,
+0x02,0x5C,0x00,0x0C,
+0x25,0x28,0xA6,0x00,
+0x9C,0x0C,0x44,0x36,
+0x00,0x00,0x85,0x8C,
+0xC0,0x03,0x10,0x32,
+0x80,0x85,0x10,0x00,
+0x24,0x28,0xB5,0x00,
+0x02,0x5C,0x00,0x0C,
+0x25,0x28,0xB0,0x00,
+0x78,0x00,0xA5,0x8F,
+0x25,0xB0,0x10,0x3C,
+0x02,0x5C,0x00,0x0C,
+0xE0,0x0E,0x04,0x36,
+0x7C,0x00,0xA5,0x8F,
+0x02,0x5C,0x00,0x0C,
+0xDC,0x0E,0x04,0x36,
+0x80,0x00,0xA5,0x8F,
+0x02,0x5C,0x00,0x0C,
+0x70,0x0E,0x04,0x36,
+0x84,0x00,0xA5,0x8F,
+0x02,0x5C,0x00,0x0C,
+0x74,0x0E,0x04,0x36,
+0x88,0x00,0xA5,0x8F,
+0x02,0x5C,0x00,0x0C,
+0x78,0x0E,0x04,0x36,
+0x8C,0x00,0xA5,0x8F,
+0x02,0x5C,0x00,0x0C,
+0x7C,0x0E,0x04,0x36,
+0x90,0x00,0xA5,0x8F,
+0x02,0x5C,0x00,0x0C,
+0x80,0x0E,0x04,0x36,
+0x94,0x00,0xA5,0x8F,
+0x02,0x5C,0x00,0x0C,
+0x84,0x0E,0x04,0x36,
+0x98,0x00,0xA5,0x8F,
+0x02,0x5C,0x00,0x0C,
+0x88,0x0E,0x04,0x36,
+0x9C,0x00,0xA5,0x8F,
+0x02,0x5C,0x00,0x0C,
+0x8C,0x0E,0x04,0x36,
+0xA0,0x00,0xA5,0x8F,
+0x02,0x5C,0x00,0x0C,
+0xD0,0x0E,0x04,0x36,
+0xA4,0x00,0xA5,0x8F,
+0x02,0x5C,0x00,0x0C,
+0xD4,0x0E,0x04,0x36,
+0xA8,0x00,0xA5,0x8F,
+0x88,0x0E,0x04,0x36,
+0x02,0x5C,0x00,0x0C,
+0x0F,0x00,0x10,0x3C,
+0x70,0x00,0xA6,0x8F,
+0xFF,0xFF,0x05,0x36,
+0x5F,0x47,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0xE6,0x44,0x00,0x0C,
+0x01,0x00,0x04,0x24,
+0x74,0x00,0xA6,0x8F,
+0xFF,0xFF,0x05,0x36,
+0x5F,0x47,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0xE6,0x44,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0xFF,0xFF,0x05,0x36,
+0x8A,0x47,0x00,0x0C,
+0x1E,0x00,0x04,0x24,
+0x21,0x88,0x40,0x00,
+0xFD,0xFF,0x06,0x24,
+0x01,0x00,0x42,0x34,
+0x24,0x30,0x46,0x00,
+0xFF,0xFF,0x05,0x36,
+0x5F,0x47,0x00,0x0C,
+0x1E,0x00,0x04,0x24,
+0x25,0x22,0x00,0x0C,
+0x03,0x00,0x04,0x24,
+0xFF,0xFF,0x05,0x36,
+0x03,0x00,0x26,0x36,
+0x5F,0x47,0x00,0x0C,
+0x1E,0x00,0x04,0x24,
+0xDC,0x00,0xBF,0x8F,
+0xD8,0x00,0xBE,0x8F,
+0xD4,0x00,0xB7,0x8F,
+0xD0,0x00,0xB6,0x8F,
+0xCC,0x00,0xB5,0x8F,
+0xC8,0x00,0xB4,0x8F,
+0xC4,0x00,0xB3,0x8F,
+0xC0,0x00,0xB2,0x8F,
+0xBC,0x00,0xB1,0x8F,
+0xB8,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0xE0,0x00,0xBD,0x27,
+0xFF,0x00,0x05,0x24,
+0xFF,0x00,0x02,0x24,
+0x29,0xFF,0xA2,0x14,
+0x10,0x00,0xA2,0x27,
+0x25,0xB0,0x03,0x3C,
+0x94,0x0E,0x62,0x34,
+0x9C,0x0E,0x64,0x34,
+0xA4,0x0E,0x65,0x34,
+0xAC,0x0E,0x66,0x34,
+0x02,0x80,0x0F,0x3C,
+0x00,0x00,0x49,0x8C,
+0x30,0x1F,0xED,0x25,
+0x00,0x00,0x8C,0x8C,
+0x00,0x00,0xAE,0x8C,
+0x00,0x00,0xC7,0x8C,
+0xB4,0x0E,0x62,0x34,
+0x0C,0x00,0xA4,0x8D,
+0x10,0x00,0xA5,0x8D,
+0x00,0x00,0x4A,0x8C,
+0xFF,0x03,0x06,0x3C,
+0x00,0xFC,0x08,0x24,
+0xBC,0x0E,0x62,0x34,
+0x24,0x48,0x26,0x01,
+0x24,0x38,0xE6,0x00,
+0x00,0x00,0x4B,0x8C,
+0x24,0x28,0xA8,0x00,
+0x24,0x20,0x88,0x00,
+0x02,0x3C,0x07,0x00,
+0xCC,0x0E,0x68,0x34,
+0x02,0x4C,0x09,0x00,
+0xC4,0x0E,0x63,0x34,
+0xF0,0xFF,0x02,0x3C,
+0xFF,0x03,0x42,0x34,
+0x25,0x28,0xA7,0x00,
+0x25,0x20,0x89,0x00,
+0x00,0x00,0x67,0x8C,
+0x24,0x60,0x86,0x01,
+0x00,0x00,0x03,0x8D,
+0x24,0x50,0x46,0x01,
+0x24,0x28,0xA2,0x00,
+0x24,0x20,0x82,0x00,
+0x82,0x61,0x0C,0x00,
+0x82,0x51,0x0A,0x00,
+0x0F,0xC0,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x25,0x20,0x8C,0x00,
+0x25,0x28,0xAA,0x00,
+0x24,0x70,0xC6,0x01,
+0x24,0x58,0x66,0x01,
+0x24,0x28,0xA2,0x00,
+0x24,0x18,0x66,0x00,
+0x00,0x71,0x0E,0x00,
+0x24,0x20,0x82,0x00,
+0x00,0x59,0x0B,0x00,
+0x24,0x38,0xE6,0x00,
+0x25,0x20,0x8E,0x00,
+0x25,0x28,0xAB,0x00,
+0x02,0x3C,0x07,0x00,
+0x02,0x1C,0x03,0x00,
+0x16,0x00,0xA3,0xA5,
+0x0C,0x00,0xA4,0xAD,
+0x10,0x00,0xA5,0xAD,
+0x4D,0x2A,0x00,0x08,
+0x14,0x00,0xA7,0xA5,
+0x30,0x00,0xB1,0x8F,
+0xF5,0x29,0x00,0x08,
+0x21,0x20,0x00,0x02,
+0x25,0xB0,0x05,0x3C,
+0x4C,0x00,0xA2,0x34,
+0x02,0x80,0x07,0x3C,
+0x00,0x00,0x43,0x90,
+0x30,0x1F,0xE4,0x24,
+0xC1,0x1B,0x82,0x90,
+0x03,0x00,0x66,0x30,
+0x24,0x00,0x46,0x10,
+0x00,0x00,0x00,0x00,
+0x18,0x00,0xC0,0x14,
+0x25,0xB0,0x03,0x3C,
+0xE6,0x02,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x15,0x00,0x40,0x14,
+0x58,0x00,0x62,0x34,
+0x1C,0x00,0x02,0x24,
+0x50,0x0C,0xA3,0x34,
+0x00,0x00,0x62,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x25,0xB0,0x02,0x3C,
+0x58,0x0C,0x42,0x34,
+0x1C,0x00,0x03,0x24,
+0x00,0x00,0x43,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFC,0xFF,0x60,0x14,
+0x25,0xB0,0x03,0x3C,
+0x58,0x00,0x62,0x34,
+0x00,0x00,0x45,0x8C,
+0x29,0xB0,0x04,0x3C,
+0x5C,0x00,0x63,0x34,
+0x00,0x00,0x85,0xAC,
+0x00,0x00,0x65,0x8C,
+0x30,0x1F,0xE2,0x24,
+0x04,0x00,0x84,0x34,
+0xC1,0x1B,0x46,0xA0,
+0x00,0x00,0x85,0xAC,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x25,0xB0,0x02,0x3C,
+0xE8,0xFF,0xBD,0x27,
+0x10,0x00,0xBF,0xAF,
+0x2D,0x0A,0x46,0x34,
+0xA2,0x0D,0x43,0x34,
+0xA4,0x0D,0x44,0x34,
+0xA6,0x0D,0x45,0x34,
+0xA8,0x0D,0x42,0x34,
+0x00,0x00,0x67,0x94,
+0x00,0x00,0x88,0x94,
+0x00,0x00,0xA9,0x94,
+0x00,0x00,0x44,0x94,
+0x00,0x00,0xC3,0x90,
+0x02,0x80,0x0A,0x3C,
+0x30,0x1F,0x42,0x25,
+0x40,0x00,0x63,0x34,
+0xFF,0x00,0x63,0x30,
+0xDE,0x02,0x44,0xA4,
+0x00,0x00,0xC3,0xA0,
+0xD8,0x02,0x47,0xA4,
+0xDA,0x02,0x48,0xA4,
+0xDC,0x02,0x49,0xA4,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x25,0xB0,0x07,0x3C,
+0x5B,0x0A,0xE2,0x34,
+0x00,0x00,0x44,0x90,
+0x30,0x1F,0x46,0x25,
+0x5C,0x0A,0xE2,0x34,
+0x00,0x00,0x45,0x90,
+0xD8,0x02,0xC3,0x94,
+0xDA,0x02,0xC2,0x94,
+0xDC,0x02,0xC9,0x94,
+0xDE,0x02,0xC8,0x94,
+0xFF,0x00,0x84,0x30,
+0x21,0x18,0x62,0x00,
+0x00,0x22,0x04,0x00,
+0xFF,0x00,0xA5,0x30,
+0x21,0x20,0x85,0x00,
+0x21,0x18,0x69,0x00,
+0xFF,0xFF,0x82,0x30,
+0x21,0x18,0x68,0x00,
+0x21,0x18,0x62,0x00,
+0x64,0x0C,0xE7,0x34,
+0xFF,0xFF,0x42,0x30,
+0xE0,0x02,0xC3,0xAC,
+0x00,0x00,0xE2,0xA4,
+0xE4,0x02,0xC4,0xA4,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x30,0x1F,0x42,0x8D,
+0x01,0x00,0x03,0x24,
+0x0F,0x00,0x44,0x30,
+0x07,0x00,0x83,0x10,
+0x30,0x1F,0x45,0x25,
+0xB6,0x5F,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x10,0x00,0xBF,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0xE4,0x02,0xA2,0x8C,
+0x00,0x00,0x00,0x00,
+0x02,0x17,0x02,0x00,
+0x03,0x00,0x42,0x30,
+0xF5,0xFF,0x40,0x14,
+0x25,0xB0,0x02,0x3C,
+0x4C,0x00,0x42,0x34,
+0x00,0x00,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0x03,0x00,0x63,0x30,
+0x3F,0x00,0x64,0x10,
+0x30,0x1F,0x44,0x25,
+0xE6,0x02,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x07,0x00,0x40,0x14,
+0x01,0x00,0x03,0x24,
+0x30,0x1F,0x42,0x8D,
+0x00,0x00,0x00,0x00,
+0x02,0x12,0x02,0x00,
+0x0F,0x00,0x42,0x30,
+0x3C,0x00,0x43,0x10,
+0x25,0xB0,0x02,0x3C,
+0x30,0x1F,0x45,0x25,
+0xE6,0x02,0xA3,0x90,
+0xFF,0x00,0x02,0x24,
+0xE0,0xFF,0x62,0x14,
+0x25,0xB0,0x03,0x3C,
+0xC8,0x02,0xA2,0x94,
+0xE0,0x02,0xA6,0x8C,
+0x50,0x0C,0x63,0x34,
+0x00,0x00,0x64,0x90,
+0x2B,0x10,0xC2,0x00,
+0x85,0x00,0x40,0x10,
+0x7F,0x00,0x84,0x30,
+0xFF,0xFF,0x82,0x24,
+0xFF,0x00,0x44,0x30,
+0x30,0x1F,0x45,0x25,
+0xD0,0x02,0xA3,0x90,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x64,0x00,
+0x78,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x21,0x20,0x60,0x00,
+0x30,0x1F,0x43,0x25,
+0xE0,0x02,0x62,0x8C,
+0x00,0x00,0x00,0x00,
+0x11,0x27,0x42,0x2C,
+0x6D,0x00,0x40,0x14,
+0x3A,0x00,0x82,0x2C,
+0x32,0x00,0x04,0x24,
+0x44,0x00,0x03,0x24,
+0x25,0xB0,0x02,0x3C,
+0x30,0x0C,0x42,0x34,
+0x00,0x00,0x43,0xA0,
+0x25,0xB0,0x02,0x3C,
+0x50,0x0C,0x42,0x34,
+0x00,0x00,0x44,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x25,0xB0,0x02,0x3C,
+0x58,0x0C,0x42,0x34,
+0x00,0x00,0x44,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0xA4,0x2B,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0xE6,0x02,0xA2,0x90,
+0x00,0x00,0x00,0x00,
+0xBF,0xFF,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0xFF,0xFF,0x02,0x24,
+0xB6,0x2B,0x00,0x08,
+0xE6,0x02,0xA2,0xA0,
+0x4C,0x00,0x42,0x34,
+0x00,0x00,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0x03,0x00,0x63,0x30,
+0xA4,0xFF,0x60,0x10,
+0xFF,0xFF,0x02,0x34,
+0x80,0x36,0x83,0x8C,
+0x00,0x00,0x00,0x00,
+0xA0,0xFF,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0xE0,0x02,0x83,0x8C,
+0x00,0x00,0x00,0x00,
+0x65,0x00,0x62,0x2C,
+0x59,0x00,0x40,0x14,
+0x28,0x00,0x62,0x2C,
+0xD2,0x02,0x83,0x90,
+0x00,0x00,0x00,0x00,
+0x00,0x16,0x03,0x00,
+0x03,0x16,0x02,0x00,
+0xFE,0xFF,0x42,0x24,
+0xFC,0xFF,0x42,0x28,
+0x02,0x00,0x40,0x10,
+0xFE,0xFF,0x62,0x24,
+0xFC,0xFF,0x02,0x24,
+0xD2,0x02,0x82,0xA0,
+0x30,0x1F,0x45,0x25,
+0x80,0x36,0xA2,0x8C,
+0xD2,0x02,0xA3,0x90,
+0xCE,0x02,0xA6,0x90,
+0x02,0x11,0x02,0x00,
+0x7F,0x00,0x42,0x30,
+0x0A,0x00,0x44,0x24,
+0x23,0x18,0x83,0x00,
+0x00,0x26,0x03,0x00,
+0x03,0x26,0x04,0x00,
+0xFF,0x00,0xC2,0x30,
+0x2A,0x10,0x44,0x00,
+0x4D,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x00,0x26,0x06,0x00,
+0x03,0x26,0x04,0x00,
+0x30,0x1F,0x43,0x25,
+0xE0,0x02,0x62,0x8C,
+0x00,0x00,0x00,0x00,
+0x11,0x27,0x42,0x2C,
+0x33,0x00,0x40,0x14,
+0x3A,0x00,0x82,0x28,
+0x32,0x00,0x82,0x28,
+0x30,0x00,0x40,0x10,
+0x3A,0x00,0x82,0x28,
+0x32,0x00,0x04,0x24,
+0x44,0x00,0x03,0x24,
+0x25,0xB0,0x02,0x3C,
+0x30,0x0C,0x42,0x34,
+0x00,0x00,0x43,0xA0,
+0x25,0xB0,0x02,0x3C,
+0x50,0x0C,0x42,0x34,
+0xFF,0x00,0x84,0x30,
+0x00,0x00,0x44,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x25,0xB0,0x02,0x3C,
+0x58,0x0C,0x42,0x34,
+0x00,0x00,0x44,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0xA4,0x2B,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x95,0xFF,0x40,0x10,
+0x48,0x00,0x03,0x24,
+0xDD,0x2B,0x00,0x08,
+0x44,0x00,0x03,0x24,
+0xD1,0x02,0xA3,0x90,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x83,0x00,
+0xD5,0x2B,0x00,0x08,
+0x0B,0x20,0x62,0x00,
+0xCA,0x02,0xA2,0x94,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0xC2,0x00,
+0x7A,0xFF,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0xCC,0x02,0xA2,0x94,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0xC2,0x00,
+0x07,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0xCD,0x2B,0x00,0x08,
+0x01,0x00,0x82,0x24,
+0xD2,0xFF,0x40,0x10,
+0x48,0x00,0x03,0x24,
+0x2F,0x2C,0x00,0x08,
+0x44,0x00,0x03,0x24,
+0xCD,0x2B,0x00,0x08,
+0x02,0x00,0x82,0x24,
+0xB2,0xFF,0x40,0x10,
+0x30,0x1F,0x45,0x25,
+0xD2,0x02,0x83,0x90,
+0x00,0x00,0x00,0x00,
+0x00,0x16,0x03,0x00,
+0x03,0x16,0x02,0x00,
+0x02,0x00,0x42,0x24,
+0x0D,0x00,0x42,0x28,
+0x09,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x13,0x2C,0x00,0x08,
+0x0C,0x00,0x02,0x24,
+0xCF,0x02,0xA3,0x80,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x62,0x30,
+0x2A,0x10,0x82,0x00,
+0x24,0x2C,0x00,0x08,
+0x0B,0x20,0x62,0x00,
+0x13,0x2C,0x00,0x08,
+0x02,0x00,0x62,0x24,
+0xC0,0xFF,0xBD,0x27,
+0x28,0x00,0xB4,0xAF,
+0x25,0xB0,0x14,0x3C,
+0x20,0x00,0xB2,0xAF,
+0x1C,0x00,0xB1,0xAF,
+0x18,0x00,0xB0,0xAF,
+0x3C,0x00,0xBF,0xAF,
+0x38,0x00,0xBE,0xAF,
+0x34,0x00,0xB7,0xAF,
+0x30,0x00,0xB6,0xAF,
+0x2C,0x00,0xB5,0xAF,
+0x24,0x00,0xB3,0xAF,
+0xD8,0x00,0x86,0x36,
+0x00,0x00,0xC3,0x90,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x51,0x24,
+0x2A,0xB0,0x10,0x3C,
+0xA0,0xFF,0x02,0x24,
+0x25,0x18,0x62,0x00,
+0x34,0x00,0x05,0x36,
+0xFE,0xFF,0x02,0x24,
+0xBC,0x02,0x33,0x92,
+0x40,0x00,0x04,0x24,
+0x00,0x00,0xC3,0xA0,
+0x00,0x00,0xA2,0xA0,
+0x25,0x24,0x00,0x0C,
+0x00,0x9E,0x13,0x00,
+0x21,0x90,0x40,0x00,
+0x8A,0x00,0x40,0x12,
+0x00,0x40,0x02,0x3C,
+0x08,0x00,0x43,0x8E,
+0xB0,0x03,0x82,0x36,
+0x25,0xB0,0x1E,0x3C,
+0x21,0x20,0x40,0x02,
+0x00,0x00,0x43,0xAC,
+0x0C,0x4D,0x00,0x0C,
+0x21,0xB8,0x20,0x02,
+0x42,0x00,0xD5,0x37,
+0x03,0x0C,0xD1,0x37,
+0x17,0x0E,0xD6,0x37,
+0x04,0x00,0x14,0x24,
+0x2A,0xB0,0x03,0x3C,
+0x06,0x00,0x63,0x34,
+0x00,0x00,0x62,0x94,
+0x00,0x00,0x00,0x00,
+0x00,0xFF,0x42,0x30,
+0x0A,0x00,0x40,0x18,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x04,0x3C,
+0x8C,0xF0,0x84,0x24,
+0x00,0x00,0x83,0x8C,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x62,0x94,
+0x00,0x00,0x00,0x00,
+0x00,0xFF,0x42,0x30,
+0xFC,0xFF,0x40,0x1C,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x45,0x8E,
+0x20,0x10,0x06,0x3C,
+0x01,0x00,0x04,0x24,
+0x00,0xFE,0xC6,0x34,
+0x40,0x00,0x07,0x24,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA4,0xAF,
+0xB0,0x01,0x00,0x0C,
+0x01,0x00,0x04,0x24,
+0x02,0x80,0x02,0x3C,
+0x90,0xF0,0x42,0x24,
+0x00,0x00,0x45,0x8C,
+0x01,0x00,0x03,0x24,
+0x21,0x20,0x00,0x00,
+0x00,0x00,0xA3,0xA0,
+0xFF,0xFF,0x03,0x24,
+0x00,0x00,0xA3,0xA2,
+0x00,0x00,0x22,0x92,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x42,0x30,
+0x40,0x00,0x42,0x34,
+0x00,0x00,0x22,0xA2,
+0x01,0x00,0x82,0x24,
+0xFF,0x00,0x44,0x30,
+0x06,0x00,0x83,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x82,0x24,
+0x02,0x00,0x02,0x24,
+0x02,0x80,0x04,0x3C,
+0x00,0x00,0xA2,0xA0,
+0x30,0x1F,0x83,0x24,
+0xC1,0x02,0x62,0x90,
+0x00,0x00,0xC4,0x92,
+0x21,0x28,0x00,0x00,
+0x00,0x00,0xC2,0xA2,
+0xFF,0x00,0x90,0x30,
+0x01,0x00,0xA2,0x24,
+0xFF,0x00,0x45,0x30,
+0x06,0x00,0xA3,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0xA2,0x24,
+0xEF,0xFF,0x02,0x24,
+0x64,0x00,0x04,0x24,
+0x00,0x00,0xA2,0xA2,
+0x54,0x22,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x22,0x92,
+0x21,0x20,0x00,0x00,
+0xBF,0x00,0x42,0x30,
+0x00,0x00,0x22,0xA2,
+0x01,0x00,0x82,0x24,
+0xFF,0x00,0x44,0x30,
+0x06,0x00,0x83,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x82,0x24,
+0x54,0x22,0x00,0x0C,
+0x84,0x03,0x04,0x24,
+0xF4,0x08,0xC2,0x37,
+0x00,0x00,0x43,0x8C,
+0x00,0x80,0x04,0x3C,
+0xDF,0x07,0x84,0x34,
+0x00,0x00,0xD0,0xA2,
+0x21,0x10,0x00,0x00,
+0x24,0x28,0x64,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x00,0x00,0xA0,0xA2,
+0x00,0x00,0x22,0x92,
+0x21,0x20,0x00,0x00,
+0xFF,0x00,0x42,0x30,
+0x40,0x00,0x42,0x34,
+0x00,0x00,0x22,0xA2,
+0x01,0x00,0x82,0x24,
+0xFF,0x00,0x44,0x30,
+0x06,0x00,0x83,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x82,0x24,
+0xBE,0x02,0xE2,0x92,
+0x1F,0x00,0xA3,0x30,
+0x2B,0x10,0x62,0x00,
+0x0A,0x00,0x40,0x10,
+0x02,0x80,0x02,0x3C,
+0xBF,0x02,0xE2,0x92,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x43,0x00,
+0x05,0x00,0x40,0x10,
+0x02,0x80,0x02,0x3C,
+0x01,0x00,0x02,0x3C,
+0x25,0x10,0x62,0x00,
+0x21,0x98,0x62,0x02,
+0x02,0x80,0x02,0x3C,
+0xDE,0x5D,0x43,0x90,
+0x22,0x00,0x02,0x24,
+0x19,0x00,0x62,0x10,
+0x92,0x00,0x02,0x24,
+0x18,0x00,0x62,0x10,
+0x02,0x80,0x03,0x3C,
+0xFF,0xFF,0x94,0x26,
+0x54,0x22,0x00,0x0C,
+0xF4,0x01,0x04,0x24,
+0x89,0xFF,0x81,0x06,
+0x2A,0xB0,0x03,0x3C,
+0x04,0x00,0x40,0x12,
+0x21,0x10,0x60,0x02,
+0x3D,0x24,0x00,0x0C,
+0x21,0x20,0x40,0x02,
+0x21,0x10,0x60,0x02,
+0x3C,0x00,0xBF,0x8F,
+0x38,0x00,0xBE,0x8F,
+0x34,0x00,0xB7,0x8F,
+0x30,0x00,0xB6,0x8F,
+0x2C,0x00,0xB5,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x40,0x00,0xBD,0x27,
+0x02,0x80,0x03,0x3C,
+0x30,0x1F,0x63,0x24,
+0xBE,0x02,0x62,0x90,
+0xC0,0x07,0xA3,0x30,
+0x82,0x19,0x03,0x00,
+0x2B,0x10,0x62,0x00,
+0xE3,0xFF,0x40,0x10,
+0x02,0x80,0x04,0x3C,
+0x30,0x1F,0x84,0x24,
+0xBF,0x02,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x43,0x00,
+0xDD,0xFF,0x40,0x10,
+0x00,0x12,0x03,0x00,
+0x10,0x00,0x03,0x3C,
+0x25,0x10,0x43,0x00,
+0x13,0x2D,0x00,0x08,
+0x21,0x98,0x62,0x02,
+0xE0,0xFF,0xBD,0x27,
+0x10,0x00,0xB0,0xAF,
+0x0F,0x00,0x10,0x3C,
+0xFF,0xFF,0x05,0x36,
+0xF0,0xF8,0x06,0x34,
+0x15,0x00,0x04,0x24,
+0x1C,0x00,0xBF,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x5F,0x47,0x00,0x0C,
+0x14,0x00,0xB1,0xAF,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0x02,0x80,0x12,0x3C,
+0xFF,0xFF,0x05,0x36,
+0x56,0x30,0x06,0x24,
+0x5F,0x47,0x00,0x0C,
+0x1A,0x00,0x04,0x24,
+0x30,0x1F,0x51,0x26,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0x04,0x03,0x23,0x92,
+0x04,0x00,0x02,0x24,
+0x20,0x00,0x62,0x10,
+0x25,0xB0,0x02,0x3C,
+0x14,0x03,0x25,0x8E,
+0x25,0xB0,0x10,0x3C,
+0x43,0x60,0x00,0x0C,
+0x00,0x0E,0x04,0x36,
+0x14,0x03,0x25,0x8E,
+0x43,0x60,0x00,0x0C,
+0x04,0x0E,0x04,0x36,
+0x18,0x03,0x25,0x8E,
+0x43,0x60,0x00,0x0C,
+0x08,0x0E,0x04,0x36,
+0x14,0x03,0x25,0x8E,
+0x43,0x60,0x00,0x0C,
+0x10,0x0E,0x04,0x36,
+0x14,0x03,0x25,0x8E,
+0x43,0x60,0x00,0x0C,
+0x14,0x0E,0x04,0x36,
+0x14,0x03,0x25,0x8E,
+0x43,0x60,0x00,0x0C,
+0x18,0x0E,0x04,0x36,
+0x14,0x03,0x25,0x8E,
+0x43,0x60,0x00,0x0C,
+0x1C,0x0E,0x04,0x36,
+0x30,0x1F,0x43,0x26,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x04,0x00,0x02,0x24,
+0x20,0x00,0xBD,0x27,
+0x08,0x00,0xE0,0x03,
+0x04,0x03,0x62,0xA0,
+0x00,0x0E,0x42,0x34,
+0x00,0x00,0x43,0x8C,
+0x14,0x03,0x25,0x8E,
+0x00,0x00,0x00,0x00,
+0xDE,0xFF,0x65,0x14,
+0x25,0xB0,0x10,0x3C,
+0x6A,0x2D,0x00,0x08,
+0x30,0x1F,0x43,0x26,
+0xE0,0xFF,0xBD,0x27,
+0x10,0x00,0xB0,0xAF,
+0x0F,0x00,0x10,0x3C,
+0xFF,0xFF,0x05,0x36,
+0xF0,0xF8,0x06,0x34,
+0x15,0x00,0x04,0x24,
+0x1C,0x00,0xBF,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x5F,0x47,0x00,0x0C,
+0x14,0x00,0xB1,0xAF,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0xFF,0xFF,0x05,0x36,
+0x56,0x30,0x06,0x24,
+0x5F,0x47,0x00,0x0C,
+0x1A,0x00,0x04,0x24,
+0x02,0x80,0x10,0x3C,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0x30,0x1F,0x02,0x26,
+0x04,0x03,0x46,0x90,
+0x25,0xB0,0x11,0x3C,
+0x10,0x10,0x12,0x3C,
+0x01,0x00,0x03,0x24,
+0x00,0x0E,0x24,0x36,
+0x1E,0x00,0xC3,0x10,
+0x10,0x10,0x45,0x36,
+0x43,0x60,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x04,0x0E,0x24,0x36,
+0x43,0x60,0x00,0x0C,
+0x10,0x10,0x45,0x36,
+0x08,0x0E,0x24,0x36,
+0x43,0x60,0x00,0x0C,
+0x10,0x10,0x05,0x24,
+0x10,0x0E,0x24,0x36,
+0x43,0x60,0x00,0x0C,
+0x10,0x10,0x45,0x36,
+0x14,0x0E,0x24,0x36,
+0x43,0x60,0x00,0x0C,
+0x10,0x10,0x45,0x36,
+0x18,0x0E,0x24,0x36,
+0x43,0x60,0x00,0x0C,
+0x10,0x10,0x45,0x36,
+0x1C,0x0E,0x24,0x36,
+0x43,0x60,0x00,0x0C,
+0x10,0x10,0x45,0x36,
+0x30,0x1F,0x03,0x26,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x01,0x00,0x02,0x24,
+0x20,0x00,0xBD,0x27,
+0x08,0x00,0xE0,0x03,
+0x04,0x03,0x62,0xA0,
+0x00,0x00,0x86,0x8C,
+0x00,0x00,0x00,0x00,
+0xE0,0xFF,0xC5,0x14,
+0x30,0x1F,0x03,0x26,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x01,0x00,0x02,0x24,
+0x20,0x00,0xBD,0x27,
+0x08,0x00,0xE0,0x03,
+0x04,0x03,0x62,0xA0,
+0xD8,0xFF,0xBD,0x27,
+0x1C,0x00,0xB3,0xAF,
+0x02,0x80,0x13,0x3C,
+0x14,0x00,0xB1,0xAF,
+0x30,0x1F,0x71,0x26,
+0x0C,0x03,0x26,0x8E,
+0x10,0x00,0xB0,0xAF,
+0x0F,0x00,0x10,0x3C,
+0xFF,0xFF,0x05,0x36,
+0x15,0x00,0x04,0x24,
+0x20,0x00,0xBF,0xAF,
+0x5F,0x47,0x00,0x0C,
+0x18,0x00,0xB2,0xAF,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0x10,0x03,0x26,0x8E,
+0xFF,0xFF,0x05,0x36,
+0x5F,0x47,0x00,0x0C,
+0x1A,0x00,0x04,0x24,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0x04,0x03,0x22,0x92,
+0x25,0xB0,0x12,0x3C,
+0x08,0x00,0x40,0x14,
+0x08,0x0E,0x44,0x36,
+0x25,0xB0,0x02,0x3C,
+0x00,0x0E,0x42,0x34,
+0x00,0x00,0x45,0x8C,
+0xEC,0x02,0x23,0x8E,
+0x00,0x00,0x00,0x00,
+0x17,0x00,0xA3,0x10,
+0x30,0x1F,0x62,0x26,
+0xE8,0x02,0x25,0x8E,
+0x43,0x60,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xEC,0x02,0x25,0x8E,
+0x43,0x60,0x00,0x0C,
+0x00,0x0E,0x44,0x36,
+0xF0,0x02,0x25,0x8E,
+0x43,0x60,0x00,0x0C,
+0x04,0x0E,0x44,0x36,
+0xF4,0x02,0x25,0x8E,
+0x43,0x60,0x00,0x0C,
+0x10,0x0E,0x44,0x36,
+0xF8,0x02,0x25,0x8E,
+0x43,0x60,0x00,0x0C,
+0x14,0x0E,0x44,0x36,
+0xFC,0x02,0x25,0x8E,
+0x43,0x60,0x00,0x0C,
+0x18,0x0E,0x44,0x36,
+0x00,0x03,0x25,0x8E,
+0x43,0x60,0x00,0x0C,
+0x1C,0x0E,0x44,0x36,
+0x30,0x1F,0x62,0x26,
+0x20,0x00,0xBF,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x28,0x00,0xBD,0x27,
+0x08,0x00,0xE0,0x03,
+0x04,0x03,0x40,0xA0,
+0xE0,0xFF,0xBD,0x27,
+0x18,0x00,0xB2,0xAF,
+0x02,0x80,0x12,0x3C,
+0x14,0x00,0xB1,0xAF,
+0x30,0x1F,0x51,0x26,
+0x0C,0x03,0x26,0x8E,
+0x10,0x00,0xB0,0xAF,
+0x0F,0x00,0x10,0x3C,
+0xFF,0xFF,0x05,0x36,
+0x1C,0x00,0xBF,0xAF,
+0x5F,0x47,0x00,0x0C,
+0x15,0x00,0x04,0x24,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0x10,0x03,0x26,0x8E,
+0xFF,0xFF,0x05,0x36,
+0x5F,0x47,0x00,0x0C,
+0x1A,0x00,0x04,0x24,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0x04,0x03,0x23,0x92,
+0x03,0x00,0x02,0x24,
+0x2C,0x00,0x62,0x10,
+0x25,0xB0,0x02,0x3C,
+0xEC,0x02,0x25,0x8E,
+0x25,0xB0,0x10,0x3C,
+0x43,0x60,0x00,0x0C,
+0x00,0x0E,0x04,0x36,
+0xF0,0x02,0x25,0x8E,
+0x43,0x60,0x00,0x0C,
+0x04,0x0E,0x04,0x36,
+0xF4,0x02,0x25,0x8E,
+0x43,0x60,0x00,0x0C,
+0x10,0x0E,0x04,0x36,
+0xF8,0x02,0x25,0x8E,
+0x43,0x60,0x00,0x0C,
+0x14,0x0E,0x04,0x36,
+0xFC,0x02,0x25,0x8E,
+0x43,0x60,0x00,0x0C,
+0x18,0x0E,0x04,0x36,
+0x00,0x03,0x25,0x8E,
+0x43,0x60,0x00,0x0C,
+0x1C,0x0E,0x04,0x36,
+0x08,0x03,0x24,0x8E,
+0xE8,0x02,0x22,0x8E,
+0x00,0x00,0x00,0x00,
+0x21,0x28,0x44,0x00,
+0x00,0xFF,0xA3,0x30,
+0xFF,0xFF,0x02,0x3C,
+0xFF,0x00,0x42,0x34,
+0x01,0x3F,0x63,0x2C,
+0x24,0x10,0xA2,0x00,
+0x0C,0x00,0x60,0x10,
+0x08,0x0E,0x04,0x36,
+0x43,0x60,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x30,0x1F,0x43,0x26,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x03,0x00,0x02,0x24,
+0x20,0x00,0xBD,0x27,
+0x08,0x00,0xE0,0x03,
+0x04,0x03,0x62,0xA0,
+0x32,0x2E,0x00,0x08,
+0x00,0x3F,0x45,0x34,
+0x00,0x0E,0x42,0x34,
+0x00,0x00,0x43,0x8C,
+0xEC,0x02,0x25,0x8E,
+0x00,0x00,0x00,0x00,
+0xD2,0xFF,0x65,0x14,
+0x25,0xB0,0x10,0x3C,
+0x35,0x2E,0x00,0x08,
+0x30,0x1F,0x43,0x26,
+0xD8,0xFF,0xBD,0x27,
+0x18,0x00,0xB2,0xAF,
+0x02,0x80,0x12,0x3C,
+0x20,0x00,0xB4,0xAF,
+0x24,0x00,0xBF,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x30,0x1F,0x44,0x26,
+0x0C,0x24,0x82,0x8C,
+0x30,0x1F,0x43,0x8E,
+0x04,0x03,0x93,0x90,
+0x02,0x11,0x02,0x00,
+0x7F,0x00,0x54,0x30,
+0xF0,0xF0,0x63,0x30,
+0x00,0x10,0x02,0x24,
+0x6A,0x00,0x62,0x10,
+0x01,0x00,0x02,0x24,
+0x25,0xB0,0x08,0x3C,
+0x4C,0x00,0x03,0x35,
+0x00,0x00,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x03,0x00,0x42,0x30,
+0x08,0x00,0x40,0x10,
+0x30,0x1F,0x45,0x26,
+0x30,0x1F,0x42,0x8E,
+0x00,0x00,0x00,0x00,
+0x02,0x13,0x02,0x00,
+0x0F,0x00,0x42,0x30,
+0x2F,0x00,0x40,0x10,
+0x00,0x0E,0x05,0x35,
+0x30,0x1F,0x45,0x26,
+0x04,0x03,0xA2,0x8C,
+0x00,0x00,0x00,0x00,
+0x02,0x12,0x02,0x00,
+0x0F,0x00,0x40,0x14,
+0x30,0x1F,0x42,0x26,
+0x25,0xB0,0x02,0x3C,
+0x84,0x01,0x42,0x34,
+0x00,0x00,0x44,0x8C,
+0x0D,0x00,0x03,0x24,
+0x7C,0x00,0x83,0x10,
+0x3E,0x00,0x02,0x24,
+0x4A,0x00,0x03,0x24,
+0x1F,0x03,0xA2,0xA0,
+0x1C,0x03,0xA3,0xA0,
+0x45,0x00,0x02,0x24,
+0x43,0x00,0x03,0x24,
+0x1D,0x03,0xA2,0xA0,
+0x1E,0x03,0xA3,0xA0,
+0x30,0x1F,0x42,0x26,
+0x0C,0x24,0x43,0x8C,
+0x25,0xB0,0x02,0x3C,
+0x60,0x0C,0x42,0x34,
+0x02,0x19,0x03,0x00,
+0xFF,0x00,0x63,0x30,
+0x00,0x00,0x43,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x30,0x1F,0x45,0x8E,
+0x10,0x10,0x02,0x24,
+0xF0,0xF0,0xA3,0x30,
+0x3F,0x00,0x62,0x10,
+0x30,0x1F,0x44,0x26,
+0x24,0x00,0xBF,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0x00,0x00,0xA2,0x8C,
+0x00,0x00,0x00,0x00,
+0x5F,0x00,0x40,0x10,
+0x10,0x0E,0x07,0x35,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x08,0x0E,0x02,0x35,
+0x04,0x0E,0x03,0x35,
+0x00,0x00,0x44,0x8C,
+0x00,0x00,0xA5,0x8C,
+0x00,0x00,0x66,0x8C,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x49,0x24,
+0xE8,0x02,0x24,0xAD,
+0xEC,0x02,0x25,0xAD,
+0xF0,0x02,0x26,0xAD,
+0x14,0x0E,0x04,0x35,
+0x02,0x80,0x02,0x3C,
+0x18,0x0E,0x05,0x35,
+0x00,0x00,0xE7,0x8C,
+0x1C,0x0E,0x06,0x35,
+0x00,0x00,0x83,0x8C,
+0xDE,0x5D,0x4A,0x90,
+0x00,0x00,0xA2,0x8C,
+0x00,0x00,0xC4,0x8C,
+0xF4,0x02,0x27,0xAD,
+0xFC,0x02,0x22,0xAD,
+0x22,0x00,0x02,0x24,
+0xF8,0x02,0x23,0xAD,
+0x5B,0x00,0x42,0x11,
+0x00,0x03,0x24,0xAD,
+0x92,0x00,0x02,0x24,
+0x59,0x00,0x42,0x11,
+0x0D,0x08,0x02,0x35,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x30,0x1F,0x43,0x8E,
+0xFF,0xFF,0x02,0x3C,
+0xFF,0x0F,0x42,0x34,
+0x24,0x18,0x62,0x00,
+0x00,0x10,0x63,0x34,
+0x66,0x2E,0x00,0x08,
+0x30,0x1F,0x43,0xAE,
+0x3A,0x00,0x62,0x12,
+0x04,0x00,0x02,0x24,
+0x38,0x00,0x62,0x12,
+0x30,0x1F,0x43,0x26,
+0xFF,0xFF,0x02,0x24,
+0x59,0x2E,0x00,0x08,
+0x04,0x03,0x62,0xA0,
+0x0C,0x24,0x83,0x8C,
+0xFF,0xFF,0x02,0x34,
+0xBF,0xFF,0x62,0x10,
+0x02,0x12,0x05,0x00,
+0x0F,0x00,0x45,0x30,
+0x01,0x00,0x03,0x24,
+0xBB,0xFF,0xA3,0x14,
+0x25,0xB0,0x02,0x3C,
+0x4C,0x00,0x42,0x34,
+0x00,0x00,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0x03,0x00,0x63,0x30,
+0xB5,0xFF,0x60,0x10,
+0x03,0x00,0x02,0x24,
+0x65,0x00,0x62,0x12,
+0x04,0x00,0x62,0x2A,
+0x47,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x6A,0x00,0x60,0x12,
+0x00,0x00,0x00,0x00,
+0xAD,0xFF,0x65,0x16,
+0x00,0x00,0x00,0x00,
+0x1C,0x03,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x82,0x02,
+0x56,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x1F,0x03,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x54,0x00,
+0x48,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0xBE,0x2D,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x8B,0x2E,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x3B,0x00,0x02,0x24,
+0x46,0x00,0x03,0x24,
+0x1F,0x03,0xA2,0xA0,
+0x1C,0x03,0xA3,0xA0,
+0x41,0x00,0x02,0x24,
+0x40,0x00,0x03,0x24,
+0x1D,0x03,0xA2,0xA0,
+0x79,0x2E,0x00,0x08,
+0x1E,0x03,0xA3,0xA0,
+0x00,0x00,0xE3,0x8C,
+0x3F,0x3F,0x02,0x3C,
+0x3F,0x3F,0x42,0x34,
+0x9E,0xFF,0x62,0x14,
+0x00,0x00,0x00,0x00,
+0x67,0x2E,0x00,0x08,
+0x30,0x1F,0x45,0x26,
+0x0F,0x00,0x10,0x3C,
+0x01,0x00,0x11,0x3C,
+0xFF,0xFF,0x05,0x36,
+0xF4,0x98,0x26,0x36,
+0x5F,0x47,0x00,0x0C,
+0x15,0x00,0x04,0x24,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0xFF,0xFF,0x05,0x36,
+0x56,0x30,0x26,0x36,
+0x5F,0x47,0x00,0x0C,
+0x1A,0x00,0x04,0x24,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0x30,0x1F,0x43,0x26,
+0xFF,0xFF,0x02,0x24,
+0x59,0x2E,0x00,0x08,
+0x04,0x03,0x62,0xA0,
+0x0D,0x08,0x02,0x35,
+0x00,0x00,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0x0F,0x00,0x63,0x30,
+0x08,0x00,0x62,0x2C,
+0x0F,0x00,0x63,0x38,
+0xA2,0xFF,0x40,0x14,
+0x01,0x00,0x65,0x24,
+0x00,0x16,0x05,0x00,
+0x00,0x24,0x05,0x00,
+0x00,0x1A,0x05,0x00,
+0x25,0x10,0x44,0x00,
+0x25,0x10,0x43,0x00,
+0x25,0x10,0x45,0x00,
+0x25,0x18,0x65,0x00,
+0x18,0x03,0x23,0xAD,
+0xB8,0x2E,0x00,0x08,
+0x14,0x03,0x22,0xAD,
+0x04,0x00,0x02,0x24,
+0x11,0x00,0x62,0x12,
+0xFF,0x00,0x02,0x24,
+0x66,0xFF,0x62,0x16,
+0x00,0x00,0x00,0x00,
+0x1E,0x03,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x82,0x02,
+0x21,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x1C,0x03,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x82,0x02,
+0x0A,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x7A,0x2D,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x8B,0x2E,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x1D,0x03,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x54,0x00,
+0xF8,0xFF,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x3B,0x2D,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x8B,0x2E,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x20,0x03,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x82,0x02,
+0xA8,0xFF,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0xFC,0x2D,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x8B,0x2E,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x1E,0x03,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x82,0x02,
+0xE6,0xFF,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x21,0x03,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x54,0x00,
+0x9A,0xFF,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0xFC,0x2D,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x8B,0x2E,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x08,0x3C,
+0x30,0x1F,0x05,0x25,
+0x80,0x36,0xA4,0x8C,
+0xE6,0x02,0xA3,0x90,
+0x02,0x11,0x04,0x00,
+0x26,0x00,0x60,0x14,
+0x7F,0x00,0x46,0x30,
+0x25,0xB0,0x07,0x3C,
+0x4C,0x00,0xE2,0x34,
+0x00,0x00,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0x20,0x00,0x60,0x10,
+0x00,0x00,0x00,0x00,
+0xFF,0xFF,0x02,0x34,
+0x1D,0x00,0x82,0x10,
+0x00,0x00,0x00,0x00,
+0x00,0x08,0xE3,0x34,
+0x00,0x00,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x30,
+0x19,0x00,0x40,0x10,
+0x4B,0x00,0xC2,0x2C,
+0x3E,0x00,0x40,0x10,
+0x01,0x00,0x04,0x24,
+0xD8,0xFF,0xC2,0x24,
+0x1E,0x00,0x42,0x2C,
+0x49,0x00,0x40,0x10,
+0x23,0x00,0xC2,0x2C,
+0x30,0x1F,0x04,0x25,
+0xD3,0x02,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x44,0x00,0x40,0x10,
+0x23,0x00,0xC2,0x2C,
+0x25,0xB0,0x02,0x3C,
+0x87,0x0C,0x42,0x34,
+0x20,0x00,0x03,0x24,
+0x00,0x00,0x43,0xA0,
+0xD3,0x02,0x80,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFC,0xFF,0x60,0x14,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x17,0x00,0x40,0x10,
+0x01,0x00,0x04,0x24,
+0xD8,0xFF,0xC2,0x24,
+0x1E,0x00,0x42,0x2C,
+0x44,0x00,0x40,0x10,
+0x23,0x00,0xC2,0x2C,
+0x30,0x1F,0x04,0x25,
+0xD3,0x02,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x3F,0x00,0x40,0x10,
+0x23,0x00,0xC2,0x2C,
+0x25,0xB0,0x02,0x3C,
+0x30,0x0C,0x42,0x34,
+0x44,0x00,0x03,0x24,
+0x00,0x00,0x43,0xA0,
+0xD3,0x02,0x80,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFC,0xFF,0x60,0x14,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0xD3,0x02,0xA2,0x90,
+0x00,0x00,0x00,0x00,
+0xE7,0xFF,0x44,0x10,
+0x43,0x00,0x02,0x24,
+0x30,0x0C,0xE3,0x34,
+0xD3,0x02,0xA4,0xA0,
+0x00,0x00,0x62,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFC,0xFF,0x60,0x14,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0xD3,0x02,0xA2,0x90,
+0x00,0x00,0x00,0x00,
+0xC0,0xFF,0x44,0x10,
+0x10,0x00,0x02,0x24,
+0x87,0x0C,0xE3,0x34,
+0xD3,0x02,0xA4,0xA0,
+0x00,0x00,0x62,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFC,0xFF,0x60,0x14,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0xC7,0xFF,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x30,0x1F,0x04,0x25,
+0xD3,0x02,0x82,0x90,
+0x02,0x00,0x03,0x24,
+0xC2,0xFF,0x43,0x10,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x02,0x3C,
+0x87,0x0C,0x42,0x34,
+0xD3,0x02,0x83,0xA0,
+0x00,0x00,0x40,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFC,0xFF,0x60,0x14,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0xB4,0xFF,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x30,0x1F,0x04,0x25,
+0xD3,0x02,0x82,0x90,
+0x02,0x00,0x03,0x24,
+0xAF,0xFF,0x43,0x10,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x02,0x3C,
+0xD3,0x02,0x83,0xA0,
+0x30,0x0C,0x42,0x34,
+0x42,0x00,0x03,0x24,
+0x00,0x00,0x43,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFC,0xFF,0x60,0x14,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x25,0xB0,0x03,0x3C,
+0x01,0x80,0x02,0x3C,
+0x18,0x03,0x64,0x34,
+0x7C,0xBF,0x42,0x24,
+0x00,0x00,0x82,0xAC,
+0x00,0x60,0x07,0x40,
+0x01,0x00,0xE1,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x20,0x80,0x02,0x3C,
+0x30,0x03,0x63,0x34,
+0x00,0x00,0x62,0xAC,
+0x25,0xB0,0x06,0x3C,
+0x01,0x80,0x02,0x3C,
+0x7D,0xBF,0x45,0x24,
+0x33,0x03,0xC3,0x34,
+0x00,0x00,0x85,0xAC,
+0x00,0x00,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x40,0x00,0x42,0x30,
+0xFB,0xFF,0x40,0x10,
+0x30,0x03,0xC2,0x34,
+0x00,0x00,0x45,0x8C,
+0x0F,0x00,0x03,0x3C,
+0xFF,0xFF,0x63,0x34,
+0x24,0x28,0xA3,0x00,
+0x40,0x11,0x05,0x00,
+0x23,0x10,0x45,0x00,
+0x80,0x10,0x02,0x00,
+0x21,0x10,0x45,0x00,
+0xAF,0x0F,0x04,0x3C,
+0xC0,0x10,0x02,0x00,
+0x00,0xA0,0x84,0x34,
+0x1B,0x00,0x82,0x00,
+0x02,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x0D,0x00,0x07,0x00,
+0x02,0x80,0x03,0x3C,
+0x30,0x1F,0x63,0x24,
+0xC2,0x28,0x05,0x00,
+0xA0,0x3E,0x65,0xAC,
+0x12,0x20,0x00,0x00,
+0xA4,0x3E,0x64,0xAC,
+0x00,0x60,0x87,0x40,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x03,0x24,
+0x02,0x80,0x02,0x3C,
+0x14,0x5F,0x43,0xA0,
+0xD0,0x07,0x04,0x24,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0xE4,0x5E,0x44,0xAC,
+0x13,0x5F,0x60,0xA0,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x2A,0xB0,0x04,0x3C,
+0x28,0x00,0x85,0x34,
+0x02,0x00,0x82,0x94,
+0x04,0x00,0x84,0x24,
+0x05,0x00,0x40,0x14,
+0x2B,0x18,0xA4,0x00,
+0xFB,0xFF,0x60,0x10,
+0x01,0x00,0x02,0x24,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x25,0xB0,0x03,0x3C,
+0xBE,0x00,0x63,0x34,
+0x00,0x00,0x62,0x94,
+0x08,0x00,0xE0,0x03,
+0x01,0x00,0x42,0x2C,
+0xE8,0xFF,0xBD,0x27,
+0x10,0x00,0xBF,0xAF,
+0x17,0x30,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x03,0x3C,
+0x19,0x00,0x40,0x10,
+0x74,0x57,0x64,0x24,
+0x74,0x57,0x62,0x8C,
+0x00,0x00,0x00,0x00,
+0x15,0x00,0x44,0x14,
+0x02,0x80,0x02,0x3C,
+0x14,0x5F,0x43,0x90,
+0x01,0x00,0x02,0x24,
+0xFF,0x00,0x63,0x30,
+0x10,0x00,0x62,0x10,
+0x02,0x80,0x03,0x3C,
+0xF5,0x5E,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x0F,0x00,0x42,0x30,
+0x05,0x00,0x42,0x28,
+0x0A,0x00,0x40,0x10,
+0x01,0x00,0x04,0x24,
+0x02,0x80,0x02,0x3C,
+0x9C,0x5A,0x43,0x8C,
+0x00,0x00,0x00,0x00,
+0x05,0x00,0x60,0x14,
+0x21,0x10,0x80,0x00,
+0x10,0x00,0xBF,0x8F,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x10,0x00,0xBF,0x8F,
+0x21,0x20,0x00,0x00,
+0x21,0x10,0x80,0x00,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0xE8,0xFF,0xBD,0x27,
+0x10,0x00,0xBF,0xAF,
+0x17,0x30,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x2C,0x00,0x40,0x10,
+0x02,0x80,0x02,0x3C,
+0x74,0x57,0x43,0x8C,
+0x74,0x57,0x42,0x24,
+0x28,0x00,0x62,0x14,
+0x02,0x80,0x03,0x3C,
+0x0C,0x5F,0x62,0x90,
+0x01,0x00,0x04,0x24,
+0xFF,0x00,0x42,0x30,
+0x23,0x00,0x44,0x10,
+0x02,0x80,0x03,0x3C,
+0xF5,0x5E,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x0F,0x00,0x42,0x30,
+0x03,0x00,0x42,0x28,
+0x1D,0x00,0x40,0x10,
+0x02,0x80,0x03,0x3C,
+0x0E,0x5F,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x04,0x00,0x42,0x30,
+0x18,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x0E,0x5F,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x10,0x00,0x42,0x30,
+0x13,0x00,0x40,0x14,
+0x02,0x80,0x03,0x3C,
+0x14,0x5F,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x42,0x30,
+0x0E,0x00,0x44,0x10,
+0x02,0x80,0x02,0x3C,
+0x15,0x5F,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0x0A,0x00,0x60,0x14,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x42,0x24,
+0x6C,0x3B,0x43,0x8C,
+0x00,0x00,0x00,0x00,
+0x06,0x00,0x60,0x14,
+0x21,0x18,0x00,0x00,
+0x40,0x39,0x42,0x8C,
+0x00,0x00,0x00,0x00,
+0x02,0x00,0x40,0x14,
+0x01,0x00,0x03,0x24,
+0x21,0x18,0x00,0x00,
+0x10,0x00,0xBF,0x8F,
+0x21,0x10,0x60,0x00,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0xE8,0xFF,0xBD,0x27,
+0x10,0x00,0xBF,0xAF,
+0x23,0x30,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x03,0x3C,
+0x0E,0x00,0x40,0x10,
+0x6C,0x57,0x65,0x24,
+0x6C,0x57,0x62,0x8C,
+0x02,0x80,0x04,0x3C,
+0x64,0x57,0x86,0x24,
+0x09,0x00,0x45,0x14,
+0x01,0x00,0x03,0x24,
+0x64,0x57,0x82,0x8C,
+0x00,0x00,0x00,0x00,
+0x05,0x00,0x46,0x14,
+0x21,0x10,0x60,0x00,
+0x10,0x00,0xBF,0x8F,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x10,0x00,0xBF,0x8F,
+0x21,0x18,0x00,0x00,
+0x21,0x10,0x60,0x00,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0xD8,0xFF,0xBD,0x27,
+0x20,0x00,0xBF,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0xFF,0x00,0x84,0x30,
+0x00,0x60,0x12,0x40,
+0x01,0x00,0x41,0x36,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x0E,0x00,0x80,0x10,
+0x02,0x80,0x13,0x3C,
+0x44,0x5F,0x62,0x92,
+0x01,0x00,0x03,0x24,
+0xFF,0x00,0x42,0x30,
+0x39,0x00,0x43,0x10,
+0x25,0xB0,0x03,0x3C,
+0x00,0x60,0x92,0x40,
+0x20,0x00,0xBF,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0x44,0x5F,0x62,0x92,
+0x02,0x00,0x03,0x24,
+0xFF,0x00,0x42,0x30,
+0xF4,0xFF,0x43,0x14,
+0x44,0x08,0x04,0x24,
+0x94,0x60,0x00,0x0C,
+0x21,0x28,0x00,0x00,
+0x25,0xB0,0x03,0x3C,
+0x04,0x0C,0x62,0x90,
+0x21,0x20,0x00,0x00,
+0xFD,0x00,0x42,0x30,
+0x04,0x0C,0x62,0xA0,
+0x01,0x00,0x82,0x24,
+0xFF,0x00,0x44,0x30,
+0x06,0x00,0x83,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x82,0x24,
+0x25,0xB0,0x03,0x3C,
+0x04,0x0D,0x62,0x90,
+0x21,0x20,0x00,0x00,
+0xFD,0x00,0x42,0x30,
+0x04,0x0D,0x62,0xA0,
+0x01,0x00,0x82,0x24,
+0xFF,0x00,0x44,0x30,
+0x06,0x00,0x83,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x82,0x24,
+0x25,0xB0,0x11,0x3C,
+0x70,0x0E,0x25,0x8E,
+0x7F,0xFE,0x10,0x3C,
+0xFF,0xFF,0x10,0x36,
+0x24,0x28,0xB0,0x00,
+0x94,0x60,0x00,0x0C,
+0x70,0x0E,0x04,0x24,
+0x8C,0x0E,0x25,0x8E,
+0x8C,0x0E,0x04,0x24,
+0x94,0x60,0x00,0x0C,
+0x24,0x28,0xB0,0x00,
+0x01,0x00,0x02,0x24,
+0x44,0x5F,0x62,0xA2,
+0x00,0x60,0x92,0x40,
+0x20,0x00,0xBF,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0x04,0x0C,0x62,0x90,
+0x21,0x20,0x00,0x00,
+0xFF,0x00,0x42,0x30,
+0x02,0x00,0x42,0x34,
+0x04,0x0C,0x62,0xA0,
+0x01,0x00,0x82,0x24,
+0xFF,0x00,0x44,0x30,
+0x06,0x00,0x83,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x82,0x24,
+0x25,0xB0,0x03,0x3C,
+0x04,0x0D,0x62,0x90,
+0x21,0x20,0x00,0x00,
+0xFF,0x00,0x42,0x30,
+0x02,0x00,0x42,0x34,
+0x04,0x0D,0x62,0xA0,
+0x01,0x00,0x82,0x24,
+0xFF,0x00,0x44,0x30,
+0x06,0x00,0x83,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x82,0x24,
+0x25,0xB0,0x10,0x3C,
+0x70,0x0E,0x05,0x8E,
+0x80,0x01,0x11,0x3C,
+0x70,0x0E,0x04,0x24,
+0x94,0x60,0x00,0x0C,
+0x25,0x28,0xB1,0x00,
+0x8C,0x0E,0x05,0x8E,
+0x8C,0x0E,0x04,0x24,
+0x94,0x60,0x00,0x0C,
+0x25,0x28,0xB1,0x00,
+0x03,0x00,0x05,0x3C,
+0x59,0x01,0xA5,0x34,
+0x94,0x60,0x00,0x0C,
+0x44,0x08,0x04,0x24,
+0x02,0x00,0x02,0x24,
+0x44,0x5F,0x62,0xA2,
+0xDD,0x30,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x03,0x3C,
+0xFC,0x37,0x02,0x24,
+0x40,0x00,0x64,0x34,
+0x00,0x00,0x82,0xA4,
+0x42,0x00,0x65,0x34,
+0x03,0x00,0x02,0x24,
+0x00,0x00,0xA0,0xA0,
+0x03,0x08,0x62,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFC,0xFF,0x60,0x14,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xE0,0xFF,0xBD,0x27,
+0x18,0x00,0xBF,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x02,0x80,0x02,0x3C,
+0xF4,0x5E,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0x0B,0x00,0x60,0x10,
+0x25,0xB0,0x10,0x3C,
+0x02,0x80,0x03,0x3C,
+0xDE,0x5D,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x02,0x00,0x42,0x30,
+0x32,0x00,0x40,0x14,
+0x00,0x02,0x05,0x3C,
+0x00,0x08,0x04,0x24,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x25,0xB0,0x10,0x3C,
+0x21,0x00,0x06,0x36,
+0x00,0x00,0xC2,0x90,
+0x18,0x00,0x03,0x36,
+0x42,0x00,0x05,0x36,
+0x01,0x00,0x42,0x34,
+0x00,0x00,0xC2,0xA0,
+0x40,0x00,0x11,0x36,
+0x00,0x00,0x60,0xA0,
+0xFF,0xFF,0x02,0x24,
+0xFC,0x57,0x03,0x24,
+0x00,0x00,0xA2,0xA0,
+0x64,0x00,0x04,0x24,
+0x00,0x00,0x23,0xA6,
+0x54,0x22,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xFC,0x77,0x02,0x24,
+0x00,0x00,0x22,0xA6,
+0x54,0x22,0x00,0x0C,
+0x0A,0x00,0x04,0x24,
+0x03,0x08,0x00,0xA2,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x0A,0x00,0x04,0x24,
+0x54,0x22,0x00,0x0C,
+0x25,0xB0,0x10,0x3C,
+0x40,0x00,0x10,0x36,
+0xFC,0x37,0x02,0x24,
+0x00,0x00,0x02,0xA6,
+0x54,0x22,0x00,0x0C,
+0x0A,0x00,0x04,0x24,
+0xFC,0x77,0x02,0x24,
+0x00,0x00,0x02,0xA6,
+0x54,0x22,0x00,0x0C,
+0x0A,0x00,0x04,0x24,
+0xFC,0x57,0x02,0x24,
+0x00,0x00,0x02,0xA6,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x9B,0x30,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0x00,0x08,0x04,0x24,
+0x00,0x02,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x2F,0x31,0x00,0x08,
+0x25,0xB0,0x10,0x3C,
+0xC0,0xFF,0xBD,0x27,
+0x28,0x00,0xB4,0xAF,
+0x20,0x00,0xB2,0xAF,
+0x18,0x00,0xB0,0xAF,
+0x3C,0x00,0xBF,0xAF,
+0x38,0x00,0xBE,0xAF,
+0x34,0x00,0xB7,0xAF,
+0x30,0x00,0xB6,0xAF,
+0x2C,0x00,0xB5,0xAF,
+0x24,0x00,0xB3,0xAF,
+0x1C,0x00,0xB1,0xAF,
+0xFF,0x00,0x90,0x30,
+0xFF,0x00,0xB2,0x30,
+0x21,0xA0,0x00,0x00,
+0x00,0x60,0x16,0x40,
+0x01,0x00,0xC1,0x36,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x02,0x80,0x13,0x3C,
+0xF6,0x5E,0x62,0x92,
+0x0F,0x00,0x11,0x32,
+0x0F,0x00,0x42,0x30,
+0x12,0x00,0x51,0x10,
+0x04,0x00,0x02,0x32,
+0x40,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0xF6,0x5E,0x62,0x92,
+0x0C,0x00,0x03,0x24,
+0x0F,0x00,0x42,0x30,
+0x8F,0x00,0x43,0x10,
+0x08,0x00,0x02,0x32,
+0xF6,0x5E,0x62,0x92,
+0x04,0x00,0x03,0x24,
+0x0F,0x00,0x42,0x30,
+0xD2,0x01,0x43,0x10,
+0x00,0x00,0x00,0x00,
+0xF6,0x5E,0x62,0x92,
+0x02,0x00,0x03,0x24,
+0x0F,0x00,0x42,0x30,
+0x9B,0x00,0x43,0x10,
+0x06,0x00,0x02,0x32,
+0x02,0x80,0x10,0x3C,
+0xF5,0x5E,0x03,0x92,
+0xF6,0x5E,0x62,0x92,
+0x0F,0x00,0x63,0x30,
+0x0F,0x00,0x42,0x30,
+0x2A,0x10,0x43,0x00,
+0x1C,0x00,0x40,0x14,
+0x02,0x80,0x12,0x3C,
+0xF5,0x5E,0x02,0x92,
+0x00,0x00,0x00,0x00,
+0x40,0x00,0x42,0x30,
+0x17,0x00,0x40,0x10,
+0x02,0x80,0x02,0x3C,
+0xDA,0x5D,0x42,0x90,
+0x00,0x00,0x00,0x00,
+0x02,0x00,0x43,0x30,
+0x52,0x00,0x60,0x14,
+0x04,0x00,0x42,0x30,
+0x10,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0xF6,0x5E,0x43,0x92,
+0x02,0x80,0x06,0x3C,
+0x5C,0xE9,0xC5,0x90,
+0x0F,0x00,0x63,0x30,
+0x25,0xB0,0x02,0x3C,
+0x25,0x18,0x65,0x00,
+0xDD,0x02,0x42,0x34,
+0x00,0x00,0x43,0xA0,
+0xF5,0x5E,0x04,0x92,
+0x80,0xFF,0x02,0x24,
+0xBF,0xFF,0x03,0x24,
+0x26,0x28,0xA2,0x00,
+0x24,0x20,0x83,0x00,
+0x5C,0xE9,0xC5,0xA0,
+0xF5,0x5E,0x04,0xA2,
+0x00,0x60,0x96,0x40,
+0x3C,0x00,0xBF,0x8F,
+0x38,0x00,0xBE,0x8F,
+0x34,0x00,0xB7,0x8F,
+0x30,0x00,0xB6,0x8F,
+0x2C,0x00,0xB5,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x40,0x00,0xBD,0x27,
+0xF6,0x5E,0x62,0x92,
+0x00,0x00,0x00,0x00,
+0x04,0x00,0x42,0x30,
+0x4C,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0xF6,0x5E,0x62,0x92,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x42,0x30,
+0x03,0x00,0x40,0x10,
+0x08,0x00,0x02,0x32,
+0x1B,0x00,0x40,0x10,
+0x02,0x80,0x03,0x3C,
+0xF6,0x5E,0x62,0x92,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x42,0x30,
+0x0C,0x00,0x40,0x14,
+0x08,0x00,0x02,0x32,
+0x0A,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x40,0x12,
+0x02,0x80,0x03,0x3C,
+0xE0,0x3A,0x62,0x94,
+0x00,0x00,0x00,0x00,
+0x00,0x01,0x42,0x30,
+0x03,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0xCD,0x4E,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0xF6,0x5E,0x62,0x92,
+0xF0,0xFF,0x03,0x24,
+0x24,0x10,0x43,0x00,
+0xF6,0x5E,0x62,0xA2,
+0xF6,0x5E,0x63,0x92,
+0x00,0x00,0x00,0x00,
+0x25,0x18,0x23,0x02,
+0xF6,0x5E,0x63,0xA2,
+0x8E,0x31,0x00,0x08,
+0x02,0x80,0x10,0x3C,
+0xE0,0x3A,0x62,0x94,
+0x00,0x00,0x00,0x00,
+0x00,0x01,0x42,0x30,
+0xF2,0xFF,0x40,0x10,
+0x02,0x80,0x02,0x3C,
+0x14,0x5F,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0xA2,0xFF,0x60,0x14,
+0x01,0x00,0x04,0x24,
+0xCD,0x4E,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xD9,0x31,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x25,0x24,0x00,0x0C,
+0x24,0x00,0x04,0x24,
+0x76,0x01,0x40,0x10,
+0x21,0x88,0x40,0x00,
+0x02,0x80,0x02,0x3C,
+0xF4,0x5E,0x45,0x90,
+0xF6,0x5E,0x44,0x92,
+0xF5,0x5E,0x02,0x92,
+0xBF,0xFF,0x03,0x24,
+0x0F,0x00,0x84,0x30,
+0x24,0x10,0x43,0x00,
+0xF5,0x5E,0x02,0xA2,
+0x10,0x00,0xA5,0xA3,
+0x11,0x00,0xA4,0xA3,
+0x08,0x00,0x24,0x96,
+0x02,0x80,0x02,0x3C,
+0x10,0x00,0xA5,0x27,
+0x25,0x20,0x82,0x00,
+0x20,0x00,0x84,0x24,
+0x5F,0x1E,0x00,0x0C,
+0x01,0x00,0x06,0x24,
+0x04,0x00,0x03,0x24,
+0x17,0x00,0x02,0x24,
+0x0C,0x00,0x23,0xAE,
+0x14,0x00,0x22,0xAE,
+0x30,0x09,0x00,0x0C,
+0x21,0x20,0x20,0x02,
+0xB0,0x31,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x0C,0x31,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xC2,0x31,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x71,0xFF,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x28,0x30,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x77,0xFF,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0xF6,0x5E,0x62,0x92,
+0xF0,0xFF,0x03,0x24,
+0x24,0x10,0x43,0x00,
+0xF6,0x5E,0x62,0xA2,
+0x02,0x80,0x03,0x3C,
+0xF6,0x5E,0x62,0x92,
+0xE0,0x3A,0x64,0x94,
+0x04,0x00,0x42,0x34,
+0x00,0x01,0x84,0x30,
+0xF6,0x5E,0x62,0xA2,
+0x61,0xFF,0x80,0x10,
+0x00,0x00,0x00,0x00,
+0xCD,0x4E,0x00,0x0C,
+0x01,0x00,0x04,0x24,
+0x83,0x31,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x65,0xFF,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x82,0x30,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x61,0xFF,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0xF6,0x5E,0x62,0x92,
+0xF0,0xFF,0x03,0x24,
+0x41,0xB0,0x04,0x3C,
+0x24,0x10,0x43,0x00,
+0xF6,0x5E,0x62,0xA2,
+0xF6,0x5E,0x63,0x92,
+0x08,0x00,0x85,0x34,
+0x82,0x00,0x02,0x24,
+0x01,0x00,0x63,0x34,
+0x02,0x80,0x1E,0x3C,
+0xF6,0x5E,0x63,0xA2,
+0x00,0x00,0x80,0xAC,
+0x00,0x00,0xA2,0xA4,
+0x42,0xB0,0x04,0x3C,
+0x30,0x1F,0xC2,0x27,
+0xB0,0x1B,0x45,0x94,
+0x00,0x00,0x83,0x90,
+0xBE,0xFF,0x02,0x24,
+0x03,0x00,0x86,0x34,
+0x24,0x18,0x62,0x00,
+0x00,0x01,0xA5,0x30,
+0x90,0xFF,0x02,0x24,
+0x00,0x00,0x83,0xA0,
+0x00,0x00,0xC2,0xA0,
+0x38,0x00,0xA0,0x10,
+0x25,0xB0,0x06,0x3C,
+0x25,0xB0,0x04,0x3C,
+0x84,0x00,0x82,0x34,
+0x00,0x00,0x46,0x8C,
+0x80,0x00,0x84,0x34,
+0x00,0x00,0x82,0x8C,
+0x02,0x80,0x0B,0x3C,
+0x1C,0x5F,0x64,0x8D,
+0x00,0x38,0x06,0x00,
+0x21,0x30,0x00,0x00,
+0x25,0xA0,0xC2,0x00,
+0x21,0x18,0x00,0x00,
+0x02,0x80,0x0A,0x3C,
+0x25,0xA8,0xE3,0x00,
+0x21,0x28,0x00,0x00,
+0x24,0x5F,0x42,0x8D,
+0x21,0x20,0x94,0x00,
+0x2B,0x18,0x94,0x00,
+0x21,0x28,0xB5,0x00,
+0x21,0x28,0xA3,0x00,
+0x2B,0x10,0xA2,0x00,
+0x24,0x01,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x24,0x5F,0x42,0x8D,
+0x00,0x00,0x00,0x00,
+0x10,0x01,0x45,0x10,
+0x01,0x00,0x05,0x24,
+0x30,0x1F,0xC2,0x27,
+0xA4,0x3E,0x43,0x8C,
+0x42,0xB0,0x07,0x3C,
+0x00,0x00,0xE6,0x90,
+0x18,0x00,0x65,0x00,
+0xFB,0xFF,0x02,0x24,
+0x24,0x30,0xC2,0x00,
+0x00,0x00,0xE6,0xA0,
+0x67,0x46,0x06,0x3C,
+0xCF,0xAC,0xC6,0x34,
+0x01,0x00,0x04,0x24,
+0x21,0x28,0x00,0x00,
+0x12,0x18,0x00,0x00,
+0x82,0x1A,0x03,0x00,
+0x40,0x10,0x03,0x00,
+0x21,0x10,0x43,0x00,
+0xC0,0x10,0x02,0x00,
+0x21,0x10,0x43,0x00,
+0x80,0x10,0x02,0x00,
+0x19,0x00,0x46,0x00,
+0x10,0x30,0x00,0x00,
+0x23,0x10,0x46,0x00,
+0x42,0x10,0x02,0x00,
+0x21,0x30,0xC2,0x00,
+0x02,0x33,0x06,0x00,
+0x01,0x00,0x02,0x24,
+0x8C,0x23,0x00,0x0C,
+0x0A,0x30,0x46,0x00,
+0x25,0xB0,0x06,0x3C,
+0xF2,0x02,0xC3,0x34,
+0x88,0xFF,0x02,0x24,
+0x00,0x00,0x62,0xA0,
+0x11,0x00,0xC7,0x34,
+0x00,0x00,0xE2,0x90,
+0x08,0x00,0xC5,0x34,
+0x30,0x1F,0xC4,0x27,
+0x01,0x00,0x42,0x34,
+0x00,0x00,0xE2,0xA0,
+0x00,0x00,0xA3,0x94,
+0xB0,0x1B,0x82,0x94,
+0xFF,0xFF,0x64,0x30,
+0x10,0x00,0x84,0x34,
+0x00,0x00,0xA4,0xA4,
+0xFB,0xFF,0x84,0x30,
+0x00,0x00,0xA4,0xA4,
+0x00,0x01,0x42,0x30,
+0x02,0x00,0x84,0x34,
+0x00,0x00,0xA4,0xA4,
+0x04,0x00,0x40,0x10,
+0x42,0xB0,0x02,0x3C,
+0x22,0x00,0x03,0x24,
+0x03,0x00,0x42,0x34,
+0x00,0x00,0x43,0xA0,
+0xFF,0xF7,0x84,0x30,
+0x00,0x00,0xA4,0xA4,
+0x28,0x00,0xC4,0x34,
+0x00,0x00,0x83,0x94,
+0xEF,0xFE,0x02,0x24,
+0xFE,0xFF,0x08,0x24,
+0x24,0x18,0x62,0x00,
+0x00,0x00,0x83,0xA4,
+0x00,0x00,0x82,0x94,
+0x26,0x00,0xC5,0x34,
+0x02,0x80,0x03,0x3C,
+0x24,0x10,0x48,0x00,
+0x00,0x00,0x82,0xA4,
+0xDA,0x5D,0x64,0x90,
+0x00,0x00,0xA2,0x94,
+0x04,0x00,0x84,0x30,
+0x00,0x24,0x42,0x34,
+0x00,0x00,0xA2,0xA4,
+0x09,0x00,0x80,0x10,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xA2,0x94,
+0x00,0x00,0x00,0x00,
+0x24,0x10,0x48,0x00,
+0x00,0x00,0xA2,0xA4,
+0x00,0x00,0xE3,0x90,
+0xFD,0xFF,0x02,0x24,
+0x24,0x18,0x62,0x00,
+0x00,0x00,0xE3,0xA0,
+0x00,0x68,0x02,0x40,
+0x00,0x08,0x42,0x30,
+0xFD,0xFF,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x12,0x3C,
+0x11,0x00,0x43,0x36,
+0x00,0x00,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x02,0x00,0x42,0x34,
+0x00,0x00,0x62,0xA0,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x26,0x00,0x44,0x36,
+0x00,0x00,0x82,0x94,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x34,
+0x00,0x00,0x82,0xA4,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x83,0x94,
+0xFF,0xDB,0x02,0x24,
+0x28,0x00,0x45,0x36,
+0x24,0x18,0x62,0x00,
+0x00,0x00,0x83,0xA4,
+0x00,0x00,0xA2,0x94,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x34,
+0x00,0x00,0xA2,0xA4,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xA2,0x94,
+0x00,0x00,0x00,0x00,
+0x10,0x01,0x42,0x34,
+0x00,0x00,0xA2,0xA4,
+0x08,0x00,0x51,0x36,
+0x00,0x00,0x23,0x96,
+0x30,0x1F,0xD7,0x27,
+0xB0,0x1B,0xE2,0x96,
+0xFF,0xFF,0x70,0x30,
+0x00,0x18,0x10,0x36,
+0x00,0x00,0x30,0xA6,
+0x00,0x01,0x42,0x30,
+0xFD,0xFF,0x10,0x32,
+0x00,0x00,0x30,0xA6,
+0x05,0x00,0x40,0x10,
+0x42,0xB0,0x02,0x3C,
+0x00,0x00,0x43,0x90,
+0xFB,0xFF,0x04,0x24,
+0x24,0x18,0x64,0x00,
+0x00,0x00,0x43,0xA0,
+0x04,0x00,0x10,0x36,
+0x54,0x22,0x00,0x0C,
+0x32,0x00,0x04,0x24,
+0x00,0x00,0x30,0xA6,
+0x22,0x00,0x02,0x24,
+0xF2,0x02,0x43,0x36,
+0xEF,0xFF,0x10,0x32,
+0x00,0x00,0x30,0xA6,
+0xC8,0x00,0x04,0x24,
+0x00,0x00,0x62,0xA0,
+0x54,0x22,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xB0,0x1B,0xE2,0x96,
+0x00,0x00,0x00,0x00,
+0x00,0x01,0x42,0x30,
+0x41,0x00,0x40,0x10,
+0x42,0xB0,0x06,0x3C,
+0x84,0x00,0x42,0x36,
+0x00,0x00,0x44,0x8C,
+0x80,0x00,0x46,0x36,
+0x00,0x00,0xC2,0x8C,
+0x00,0x28,0x04,0x00,
+0x21,0x18,0x00,0x00,
+0x21,0x20,0x00,0x00,
+0x25,0x30,0x82,0x00,
+0x25,0x38,0xA3,0x00,
+0xA4,0x3E,0xE3,0x8E,
+0x23,0x28,0xD4,0x00,
+0x80,0x12,0x05,0x00,
+0x1B,0x00,0x43,0x00,
+0x02,0x00,0x60,0x14,
+0x00,0x00,0x00,0x00,
+0x0D,0x00,0x07,0x00,
+0x02,0x80,0x0B,0x3C,
+0x1C,0x5F,0x63,0x8D,
+0x12,0x10,0x00,0x00,
+0x23,0x10,0x45,0x00,
+0x21,0x10,0x43,0x00,
+0x1C,0x5F,0x62,0xAD,
+0x1C,0x5F,0x63,0x8D,
+0x42,0xB0,0x02,0x3C,
+0x03,0x00,0x42,0x34,
+0xC4,0x09,0x63,0x24,
+0x1C,0x5F,0x63,0xAD,
+0x00,0x00,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0x20,0x00,0x63,0x30,
+0x20,0x00,0x60,0x14,
+0x00,0x00,0x00,0x00,
+0x1C,0x5F,0x62,0x8D,
+0x02,0x80,0x0A,0x3C,
+0x24,0x5F,0x44,0x8D,
+0x21,0x40,0x46,0x00,
+0x2B,0x28,0x06,0x01,
+0x21,0x48,0x67,0x00,
+0x21,0x48,0x25,0x01,
+0x2B,0x20,0x24,0x01,
+0x59,0x00,0x80,0x14,
+0x00,0x00,0x00,0x00,
+0x24,0x5F,0x42,0x8D,
+0x00,0x00,0x00,0x00,
+0x47,0x00,0x49,0x10,
+0x01,0x00,0x05,0x24,
+0x42,0xB0,0x02,0x3C,
+0x00,0x00,0x43,0x90,
+0xFB,0xFF,0x04,0x24,
+0x01,0x00,0x06,0x24,
+0x24,0x18,0x64,0x00,
+0x00,0x00,0x43,0xA0,
+0x04,0x00,0xA0,0x10,
+0x01,0x00,0x04,0x24,
+0x80,0x10,0x05,0x00,
+0x21,0x10,0x45,0x00,
+0x80,0x30,0x02,0x00,
+0x8C,0x23,0x00,0x0C,
+0x21,0x28,0x00,0x00,
+0x42,0xB0,0x02,0x3C,
+0x22,0x00,0x03,0x24,
+0x03,0x00,0x42,0x34,
+0x00,0x00,0x43,0xA0,
+0x42,0xB0,0x06,0x3C,
+0x00,0x00,0xC2,0x90,
+0x30,0x1F,0xC5,0x27,
+0xD0,0x1B,0xA8,0x8C,
+0xDC,0x1B,0xA7,0x94,
+0x41,0xB0,0x03,0x3C,
+0x41,0x00,0x42,0x34,
+0x08,0x00,0x64,0x34,
+0x00,0x00,0xC2,0xA0,
+0x00,0x00,0x68,0xAC,
+0x00,0x00,0x87,0xA4,
+0xF6,0x5E,0x63,0x92,
+0xF0,0xFF,0x02,0x24,
+0xDC,0x1B,0xA7,0xA4,
+0x24,0x18,0x62,0x00,
+0xF6,0x5E,0x63,0xA2,
+0xF6,0x5E,0x62,0x92,
+0xD0,0x1B,0xA8,0xAC,
+0x02,0x00,0x42,0x34,
+0xF6,0x5E,0x62,0xA2,
+0x8E,0x31,0x00,0x08,
+0x02,0x80,0x10,0x3C,
+0x4C,0x30,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x31,0xFE,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x1C,0x31,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xF6,0x5E,0x62,0x92,
+0xF0,0xFF,0x03,0x24,
+0x24,0x10,0x43,0x00,
+0xF6,0x5E,0x62,0xA2,
+0xF6,0x5E,0x63,0x92,
+0x00,0x00,0x00,0x00,
+0x02,0x00,0x63,0x34,
+0xF6,0x5E,0x63,0xA2,
+0x88,0x31,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x99,0x99,0x03,0x3C,
+0x25,0xB0,0x02,0x3C,
+0x97,0x99,0x63,0x34,
+0x18,0x03,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0xB0,0x31,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x20,0x5F,0x42,0x8D,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x82,0x00,
+0x0C,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x20,0x5F,0x42,0x8D,
+0x61,0x32,0x00,0x08,
+0x01,0x00,0x05,0x24,
+0x20,0x5F,0x42,0x8D,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x02,0x01,
+0x0A,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x20,0x5F,0x42,0x8D,
+0x32,0x33,0x00,0x08,
+0x01,0x00,0x05,0x24,
+0x20,0x5F,0x42,0x8D,
+0x24,0x5F,0x43,0x8D,
+0x1C,0x5F,0x64,0x8D,
+0x23,0x10,0x54,0x00,
+0x61,0x32,0x00,0x08,
+0x23,0x28,0x44,0x00,
+0x20,0x5F,0x42,0x8D,
+0x24,0x5F,0x43,0x8D,
+0x1C,0x5F,0x64,0x8D,
+0x23,0x10,0x46,0x00,
+0x32,0x33,0x00,0x08,
+0x23,0x28,0x44,0x00,
+0x02,0x80,0x02,0x3C,
+0xF4,0x5E,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0x07,0x00,0x60,0x10,
+0x02,0x80,0x02,0x3C,
+0xF6,0x5E,0x43,0x90,
+0x04,0x00,0x04,0x24,
+0x0F,0x00,0x63,0x30,
+0x04,0x00,0x63,0x28,
+0x03,0x00,0x60,0x14,
+0x01,0x00,0x05,0x24,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x64,0x31,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x01,0x80,0x02,0x3C,
+0x25,0xB0,0x03,0x3C,
+0xE8,0xFF,0xBD,0x27,
+0x6C,0xCE,0x42,0x24,
+0x18,0x03,0x63,0x34,
+0x14,0x00,0xBF,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x00,0x00,0x62,0xAC,
+0x00,0x60,0x10,0x40,
+0x01,0x00,0x01,0x36,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x02,0x80,0x04,0x3C,
+0x13,0x5F,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x0B,0x00,0x40,0x10,
+0x01,0x00,0x05,0x24,
+0xD0,0x07,0x03,0x24,
+0x02,0x80,0x02,0x3C,
+0xE4,0x5E,0x43,0xAC,
+0x13,0x5F,0x80,0xA0,
+0x00,0x60,0x90,0x40,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x02,0x80,0x03,0x3C,
+0x01,0x00,0x04,0x24,
+0x02,0x80,0x02,0x3C,
+0x16,0x5F,0x44,0xA0,
+0x14,0x5F,0x60,0xA0,
+0x02,0x80,0x02,0x3C,
+0xF5,0x5E,0x44,0x90,
+0x64,0x31,0x00,0x0C,
+0xFF,0x00,0x84,0x30,
+0x00,0x60,0x90,0x40,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x42,0x11,0x05,0x00,
+0x0F,0x00,0x46,0x30,
+0xE8,0xFF,0xBD,0x27,
+0x09,0x00,0xC3,0x28,
+0x14,0x00,0xBF,0xAF,
+0x15,0x00,0x60,0x10,
+0x10,0x00,0xB0,0xAF,
+0x82,0x16,0x05,0x00,
+0x01,0x00,0x42,0x30,
+0x15,0x00,0x40,0x10,
+0x00,0xC0,0x02,0x3C,
+0x24,0x10,0xA2,0x00,
+0x48,0x00,0x40,0x14,
+0xC2,0x15,0x04,0x00,
+0x01,0x00,0x42,0x30,
+0x55,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x03,0x3C,
+0x50,0xE9,0x63,0x24,
+0x21,0x18,0xC3,0x00,
+0x02,0x80,0x04,0x3C,
+0x0F,0x5F,0x85,0x90,
+0x00,0x00,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x24,0x10,0x45,0x00,
+0x4B,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x24,0x10,0xA2,0x00,
+0x20,0x00,0x40,0x14,
+0xC2,0x15,0x04,0x00,
+0x01,0x00,0x42,0x30,
+0x0B,0x00,0x40,0x10,
+0x02,0x80,0x04,0x3C,
+0x02,0x80,0x03,0x3C,
+0x50,0xE9,0x63,0x24,
+0x21,0x18,0xC3,0x00,
+0x02,0x80,0x04,0x3C,
+0x0F,0x5F,0x85,0x90,
+0x00,0x00,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x24,0x10,0x45,0x00,
+0x3C,0x00,0x40,0x14,
+0x02,0x80,0x04,0x3C,
+0x0E,0x5F,0x82,0x90,
+0xFE,0xFF,0x03,0x24,
+0x24,0x10,0x43,0x00,
+0x0E,0x5F,0x82,0xA0,
+0x0E,0x5F,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x07,0x00,0x42,0x30,
+0xE4,0xFF,0x40,0x14,
+0x02,0x80,0x02,0x3C,
+0x0C,0x5F,0x40,0xA0,
+0x02,0x80,0x03,0x3C,
+0xF5,0x5E,0x64,0x90,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x01,0x00,0x05,0x24,
+0xFF,0x00,0x84,0x30,
+0x64,0x31,0x00,0x08,
+0x18,0x00,0xBD,0x27,
+0x02,0x80,0x04,0x3C,
+0x0E,0x5F,0x82,0x90,
+0xFD,0xFF,0x03,0x24,
+0x14,0x00,0xBF,0x8F,
+0x24,0x10,0x43,0x00,
+0x02,0x80,0x03,0x3C,
+0x0E,0x5F,0x82,0xA0,
+0x12,0x5F,0x60,0xA0,
+0x42,0xB0,0x04,0x3C,
+0x00,0x00,0x82,0x90,
+0x10,0x00,0xB0,0x8F,
+0xEF,0xFF,0x03,0x24,
+0x24,0x10,0x43,0x00,
+0x03,0x00,0x85,0x34,
+0x40,0x00,0x03,0x24,
+0x18,0x00,0xBD,0x27,
+0x00,0x00,0x82,0xA0,
+0x00,0x00,0xA3,0xA0,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x42,0xB0,0x07,0x3C,
+0x00,0x00,0xE3,0x90,
+0xEF,0xFF,0x02,0x24,
+0x03,0x00,0xF0,0x34,
+0x24,0x18,0x62,0x00,
+0x40,0x00,0x02,0x24,
+0x00,0x00,0xE3,0xA0,
+0x02,0x00,0x04,0x24,
+0x00,0x00,0x02,0xA2,
+0x21,0x28,0x00,0x00,
+0x8C,0x23,0x00,0x0C,
+0x00,0xF0,0x06,0x34,
+0x44,0x00,0x02,0x24,
+0x00,0x00,0x02,0xA2,
+0xE0,0x33,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x01,0x00,0x04,0x24,
+0xFE,0x4E,0x00,0x08,
+0x18,0x00,0xBD,0x27,
+0x0E,0x5F,0x82,0x90,
+0xF6,0x33,0x00,0x08,
+0xFB,0xFF,0x03,0x24,
+0x82,0x16,0x05,0x00,
+0xE8,0xFF,0xBD,0x27,
+0x01,0x00,0x42,0x30,
+0x14,0x00,0xBF,0xAF,
+0x0E,0x00,0x40,0x10,
+0x10,0x00,0xB0,0xAF,
+0x00,0xC0,0x02,0x3C,
+0x24,0x10,0xA2,0x00,
+0x37,0x00,0x40,0x14,
+0x02,0x80,0x02,0x3C,
+0x0D,0x5F,0x43,0x90,
+0x02,0x00,0x02,0x24,
+0xFF,0x00,0x63,0x30,
+0x44,0x00,0x62,0x10,
+0x01,0x00,0x04,0x24,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0xFE,0x4E,0x00,0x08,
+0x18,0x00,0xBD,0x27,
+0x00,0xC0,0x02,0x3C,
+0x24,0x10,0xA2,0x00,
+0x0E,0x00,0x40,0x14,
+0x02,0x80,0x06,0x3C,
+0x0E,0x5F,0xC2,0x90,
+0xFE,0xFF,0x03,0x24,
+0x24,0x10,0x43,0x00,
+0x0E,0x5F,0xC2,0xA0,
+0x0E,0x5F,0xC2,0x90,
+0x00,0x00,0x00,0x00,
+0x07,0x00,0x42,0x30,
+0x18,0x00,0x40,0x10,
+0x02,0x80,0x02,0x3C,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x0E,0x5F,0xC2,0x90,
+0xFD,0xFF,0x03,0x24,
+0x42,0xB0,0x04,0x3C,
+0x24,0x10,0x43,0x00,
+0x02,0x80,0x03,0x3C,
+0x0E,0x5F,0xC2,0xA0,
+0x12,0x5F,0x60,0xA0,
+0x00,0x00,0x82,0x90,
+0xEF,0xFF,0x03,0x24,
+0x03,0x00,0x85,0x34,
+0x24,0x10,0x43,0x00,
+0x40,0x00,0x03,0x24,
+0x00,0x00,0x82,0xA0,
+0x00,0x00,0xA3,0xA0,
+0x0E,0x5F,0xC2,0x90,
+0x00,0x00,0x00,0x00,
+0x07,0x00,0x42,0x30,
+0xEA,0xFF,0x40,0x14,
+0x02,0x80,0x02,0x3C,
+0x0C,0x5F,0x40,0xA0,
+0x02,0x80,0x03,0x3C,
+0xF5,0x5E,0x64,0x90,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x01,0x00,0x05,0x24,
+0xFF,0x00,0x84,0x30,
+0x64,0x31,0x00,0x08,
+0x18,0x00,0xBD,0x27,
+0x42,0xB0,0x07,0x3C,
+0x00,0x00,0xE3,0x90,
+0xEF,0xFF,0x02,0x24,
+0x03,0x00,0xF0,0x34,
+0x24,0x18,0x62,0x00,
+0x40,0x00,0x02,0x24,
+0x00,0x00,0xE3,0xA0,
+0x02,0x00,0x04,0x24,
+0x00,0x00,0x02,0xA2,
+0x21,0x28,0x00,0x00,
+0x8C,0x23,0x00,0x0C,
+0x00,0xF0,0x06,0x34,
+0x44,0x00,0x02,0x24,
+0x00,0x00,0x02,0xA2,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x0D,0x30,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x0C,0x00,0x04,0x24,
+0x01,0x00,0x05,0x24,
+0x64,0x31,0x00,0x08,
+0x18,0x00,0xBD,0x27,
+0x01,0x80,0x02,0x3C,
+0x25,0xB0,0x03,0x3C,
+0xE8,0xFF,0xBD,0x27,
+0x30,0xD2,0x42,0x24,
+0x18,0x03,0x63,0x34,
+0x10,0x00,0xB0,0xAF,
+0x00,0x00,0x62,0xAC,
+0x02,0x80,0x10,0x3C,
+0xF5,0x5E,0x02,0x92,
+0x14,0x00,0xBF,0xAF,
+0x0F,0x00,0x42,0x30,
+0x03,0x00,0x42,0x28,
+0x05,0x00,0x40,0x10,
+0x01,0x00,0x05,0x24,
+0x4C,0x30,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x04,0x00,0x40,0x10,
+0x01,0x00,0x05,0x24,
+0xF5,0x5E,0x04,0x92,
+0x64,0x31,0x00,0x0C,
+0xFF,0x00,0x84,0x30,
+0x02,0x80,0x04,0x3C,
+0x30,0x1F,0x84,0x24,
+0xE0,0x1B,0x83,0x94,
+0xDC,0x1B,0x85,0x94,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x02,0x00,0x63,0x30,
+0x41,0xB0,0x02,0x3C,
+0x25,0x18,0x65,0x00,
+0x08,0x00,0x42,0x34,
+0x18,0x00,0xBD,0x27,
+0x00,0x00,0x43,0xA4,
+0x08,0x00,0xE0,0x03,
+0xDC,0x1B,0x83,0xA4,
+0xE8,0xFF,0xBD,0x27,
+0x10,0x00,0xB0,0xAF,
+0x14,0x00,0xBF,0xAF,
+0x02,0x80,0x10,0x3C,
+0x08,0x14,0x04,0x26,
+0x21,0x28,0x00,0x00,
+0x21,0x30,0x00,0x00,
+0x91,0x3C,0x00,0x0C,
+0x21,0x38,0x00,0x00,
+0xB4,0x34,0x00,0x08,
+0x08,0x14,0x04,0x26,
+0xE8,0xFF,0xBD,0x27,
+0x10,0x00,0xBF,0xAF,
+0xCF,0x61,0x00,0x0C,
+0x21,0x38,0x00,0x00,
+0x10,0x00,0xBF,0x8F,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0xFF,0xFF,0x8D,0x30,
+0x00,0x60,0x0F,0x40,
+0x01,0x00,0xE1,0x35,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x02,0x80,0x06,0x3C,
+0x30,0x1F,0xCE,0x24,
+0x2A,0x1C,0xC2,0x91,
+0x00,0x00,0x00,0x00,
+0x1D,0x00,0x40,0x10,
+0x25,0xB0,0x03,0x3C,
+0x38,0x02,0x64,0x34,
+0x80,0xFF,0x02,0x24,
+0x00,0x00,0x82,0xA0,
+0x34,0x02,0x6A,0x34,
+0xD2,0x01,0x65,0x34,
+0xD6,0x01,0x66,0x34,
+0xDA,0x01,0x67,0x34,
+0xDE,0x01,0x63,0x34,
+0x00,0x00,0xA8,0x94,
+0x00,0x00,0xC9,0x94,
+0x00,0x00,0xEB,0x94,
+0x00,0x00,0x6C,0x94,
+0x00,0x00,0x44,0x95,
+0xB0,0xFE,0xA2,0x25,
+0xFF,0xFF,0x4D,0x30,
+0x28,0x1C,0xC4,0xA5,
+0x00,0x00,0xA0,0xA4,
+0x20,0x1C,0xC8,0xA5,
+0x00,0x00,0xC0,0xA4,
+0x22,0x1C,0xC9,0xA5,
+0x00,0x00,0xE0,0xA4,
+0x24,0x1C,0xCB,0xA5,
+0x00,0x00,0x60,0xA4,
+0x00,0x00,0x4D,0xA5,
+0x26,0x1C,0xCC,0xA5,
+0x00,0x60,0x8F,0x40,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x2A,0xB0,0x02,0x3C,
+0x0A,0x00,0x45,0x34,
+0x63,0x00,0x03,0x24,
+0xFF,0xFF,0x04,0x34,
+0x00,0x00,0xA2,0x90,
+0x00,0x00,0x00,0x00,
+0x0A,0x00,0x40,0x10,
+0x30,0x1F,0xC2,0x24,
+0x64,0x00,0x02,0x24,
+0xFF,0xFF,0x42,0x24,
+0xFF,0xFF,0x42,0x30,
+0xFE,0xFF,0x40,0x14,
+0xFF,0xFF,0x42,0x24,
+0xFF,0xFF,0x62,0x24,
+0xFF,0xFF,0x43,0x30,
+0xF4,0xFF,0x64,0x14,
+0x30,0x1F,0xC2,0x24,
+0x28,0x1C,0x48,0x94,
+0x26,0x1C,0x47,0x94,
+0x20,0x1C,0x49,0x94,
+0x22,0x1C,0x4A,0x94,
+0x24,0x1C,0x4B,0x94,
+0x25,0xB0,0x03,0x3C,
+0x38,0x02,0x6C,0x34,
+0x34,0x02,0x62,0x34,
+0xD2,0x01,0x64,0x34,
+0xD6,0x01,0x65,0x34,
+0xDA,0x01,0x66,0x34,
+0xDE,0x01,0x63,0x34,
+0x00,0x00,0x48,0xA4,
+0x00,0x00,0x89,0xA4,
+0x00,0x00,0xAA,0xA4,
+0x00,0x00,0xCB,0xA4,
+0x00,0x00,0x67,0xA4,
+0x00,0x00,0x80,0xA1,
+0x00,0x60,0x8F,0x40,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xD0,0xFF,0xBD,0x27,
+0x28,0x00,0xB4,0xAF,
+0x2C,0x00,0xBF,0xAF,
+0x24,0x00,0xB3,0xAF,
+0x20,0x00,0xB2,0xAF,
+0x1C,0x00,0xB1,0xAF,
+0x18,0x00,0xB0,0xAF,
+0xFF,0xFF,0x14,0x24,
+0x02,0x80,0x13,0x3C,
+0x41,0xB0,0x02,0x3C,
+0x30,0x1F,0x63,0x26,
+0x04,0x00,0x42,0x34,
+0x00,0x00,0x45,0x8C,
+0xD4,0x1B,0x64,0x8C,
+0xD0,0x1B,0x66,0x8C,
+0x02,0x80,0x02,0x3C,
+0x08,0x5E,0x47,0x90,
+0x25,0xB0,0x08,0x3C,
+0xB0,0x03,0x02,0x35,
+0x25,0x90,0x85,0x00,
+0x00,0x00,0x52,0xAC,
+0x00,0x00,0x46,0xAC,
+0x01,0x00,0x02,0x24,
+0x8D,0x03,0xE2,0x10,
+0xD4,0x1B,0x72,0xAC,
+0x30,0x1F,0x64,0x26,
+0xD0,0x1B,0x82,0x8C,
+0x00,0x00,0x00,0x00,
+0x24,0x10,0x52,0x00,
+0x01,0x00,0x42,0x30,
+0x0E,0x00,0x40,0x10,
+0x30,0x1F,0x67,0x26,
+0x25,0xB0,0x10,0x3C,
+0xB0,0x03,0x02,0x36,
+0x01,0x00,0x05,0x24,
+0x00,0x00,0x45,0xAC,
+0x04,0x00,0x0B,0x36,
+0xD4,0x1B,0x83,0x8C,
+0x00,0x00,0x69,0x8D,
+0x40,0x00,0x02,0x3C,
+0x01,0x00,0x63,0x38,
+0x24,0x10,0x22,0x01,
+0x2A,0x01,0x40,0x10,
+0xD4,0x1B,0x83,0xAC,
+0x30,0x1F,0x67,0x26,
+0xD0,0x1B,0xE8,0x8C,
+0x00,0x00,0x00,0x00,
+0x24,0x10,0x12,0x01,
+0x04,0x00,0x42,0x30,
+0x18,0x00,0x40,0x10,
+0x30,0x1F,0x71,0x26,
+0x25,0xB0,0x03,0x3C,
+0xB0,0x03,0x64,0x34,
+0x04,0x00,0x02,0x24,
+0x00,0x00,0x82,0xAC,
+0xD4,0x1B,0xE2,0x8C,
+0xFC,0x00,0x63,0x34,
+0xAC,0x1B,0xE5,0x94,
+0xD0,0x37,0xE4,0x8C,
+0x00,0x00,0x66,0x8C,
+0x04,0x00,0x42,0x38,
+0x21,0x48,0x85,0x00,
+0x0A,0x00,0xC9,0x10,
+0xD4,0x1B,0xE2,0xAC,
+0x02,0x80,0x05,0x3C,
+0xBC,0x5E,0xA2,0x8C,
+0xFB,0xFF,0x04,0x24,
+0x24,0x20,0x04,0x01,
+0x00,0x10,0x42,0x34,
+0x41,0xB0,0x03,0x3C,
+0xBC,0x5E,0xA2,0xAC,
+0x00,0x00,0x64,0xAC,
+0xD0,0x1B,0xE4,0xAC,
+0x30,0x1F,0x71,0x26,
+0xD0,0x1B,0x22,0x8E,
+0x00,0x00,0x00,0x00,
+0x24,0x10,0x52,0x00,
+0x08,0x00,0x42,0x30,
+0x0A,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0xB0,0x1B,0x22,0x96,
+0x00,0x00,0x00,0x00,
+0x04,0x00,0x42,0x30,
+0x5D,0x03,0x40,0x14,
+0x00,0x80,0x02,0x3C,
+0xD4,0x1B,0x22,0x8E,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x42,0x38,
+0xD4,0x1B,0x22,0xAE,
+0x30,0x1F,0x70,0x26,
+0xD0,0x1B,0x02,0x8E,
+0x00,0x00,0x00,0x00,
+0x24,0x20,0x52,0x00,
+0x00,0x08,0x83,0x30,
+0x06,0x00,0x60,0x10,
+0x00,0x10,0x82,0x30,
+0xD4,0x1B,0x02,0x8E,
+0x00,0x00,0x00,0x00,
+0x00,0x08,0x42,0x38,
+0xD4,0x1B,0x02,0xAE,
+0x00,0x10,0x82,0x30,
+0x05,0x03,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x30,0x1F,0x70,0x26,
+0xD0,0x1B,0x03,0x8E,
+0x00,0x00,0x00,0x00,
+0x24,0x10,0x72,0x00,
+0x00,0x20,0x42,0x30,
+0xF7,0x02,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x24,0x10,0x72,0x00,
+0x00,0x80,0x42,0x30,
+0xB9,0x01,0x40,0x14,
+0x01,0x00,0x03,0x3C,
+0x30,0x1F,0x70,0x26,
+0xD0,0x1B,0x02,0x8E,
+0x00,0x00,0x00,0x00,
+0x24,0x10,0x52,0x00,
+0x24,0x10,0x54,0x00,
+0x24,0x10,0x43,0x00,
+0xF1,0x01,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0xD0,0x1B,0x02,0x8E,
+0x02,0x00,0x03,0x3C,
+0x24,0x10,0x52,0x00,
+0x24,0x10,0x43,0x00,
+0x28,0x02,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x30,0x1F,0x70,0x26,
+0xD0,0x1B,0x02,0x8E,
+0x04,0x00,0x03,0x3C,
+0x24,0x10,0x52,0x00,
+0x24,0x10,0x54,0x00,
+0x24,0x10,0x43,0x00,
+0x62,0x02,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x30,0x1F,0x70,0x26,
+0xD0,0x1B,0x02,0x8E,
+0x08,0x00,0x03,0x3C,
+0x24,0x10,0x52,0x00,
+0x24,0x10,0x43,0x00,
+0x9B,0x02,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x30,0x1F,0x70,0x26,
+0xD0,0x1B,0x02,0x8E,
+0x10,0x00,0x03,0x3C,
+0x24,0x10,0x52,0x00,
+0x24,0x10,0x54,0x00,
+0x24,0x10,0x43,0x00,
+0x5A,0x01,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x30,0x1F,0x70,0x26,
+0xD0,0x1B,0x02,0x8E,
+0x20,0x00,0x03,0x3C,
+0x24,0x10,0x52,0x00,
+0x24,0x10,0x43,0x00,
+0x18,0x01,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x30,0x1F,0x70,0x26,
+0xD0,0x1B,0x02,0x8E,
+0x40,0x00,0x03,0x3C,
+0x24,0x10,0x52,0x00,
+0x24,0x10,0x54,0x00,
+0x24,0x10,0x43,0x00,
+0xD6,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x30,0x1F,0x65,0x26,
+0xD0,0x1B,0xA2,0x8C,
+0x00,0x04,0x03,0x3C,
+0x24,0x10,0x52,0x00,
+0x24,0x10,0x43,0x00,
+0x3D,0x00,0x40,0x10,
+0x30,0x1F,0x66,0x26,
+0x2A,0xB0,0x02,0x3C,
+0x2C,0x00,0x43,0x34,
+0x00,0x00,0x69,0x8C,
+0xFF,0x00,0x02,0x24,
+0xFF,0x00,0x24,0x31,
+0x29,0x03,0x82,0x10,
+0x00,0x80,0x22,0x31,
+0xF9,0x02,0x40,0x14,
+0x00,0x80,0x02,0x3C,
+0x00,0xFF,0x02,0x3C,
+0x24,0x10,0x22,0x01,
+0x0B,0x00,0x40,0x10,
+0xFF,0x00,0x02,0x24,
+0xB8,0x36,0xA2,0x90,
+0x20,0xB0,0x03,0x3C,
+0x00,0x12,0x02,0x00,
+0x21,0x10,0x43,0x00,
+0x0C,0x00,0x49,0x8C,
+0x25,0xB0,0x03,0x3C,
+0xB0,0x03,0x63,0x34,
+0x00,0x00,0x69,0xAC,
+0xFF,0x00,0x24,0x31,
+0xFF,0x00,0x02,0x24,
+0x1B,0x00,0x82,0x10,
+0x30,0x1F,0x70,0x26,
+0xFF,0x00,0x23,0x31,
+0x88,0x37,0x05,0x8E,
+0x20,0x10,0x02,0x3C,
+0x00,0x1A,0x03,0x00,
+0x21,0x18,0x62,0x00,
+0x21,0x30,0x60,0x00,
+0x1C,0x37,0x03,0xAE,
+0x0A,0x00,0x04,0x24,
+0xB8,0x36,0x09,0xA2,
+0x00,0x01,0x07,0x24,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA0,0xAF,
+0xD0,0x1B,0x05,0x8E,
+0x02,0x80,0x06,0x3C,
+0xBC,0x5E,0xC4,0x8C,
+0x00,0x04,0x02,0x3C,
+0x27,0x10,0x02,0x00,
+0x24,0x28,0xA2,0x00,
+0x25,0xB0,0x02,0x3C,
+0x00,0x40,0x84,0x34,
+0xB0,0x03,0x42,0x34,
+0x41,0xB0,0x03,0x3C,
+0x00,0x00,0x44,0xAC,
+0x00,0x00,0x65,0xAC,
+0xBC,0x5E,0xC4,0xAC,
+0xD0,0x1B,0x05,0xAE,
+0x30,0x1F,0x65,0x26,
+0xD4,0x1B,0xA4,0x8C,
+0x00,0x04,0x03,0x3C,
+0x25,0xB0,0x02,0x3C,
+0x26,0x20,0x83,0x00,
+0xB0,0x03,0x42,0x34,
+0x00,0x00,0x44,0xAC,
+0xD4,0x1B,0xA4,0xAC,
+0x30,0x1F,0x66,0x26,
+0xD0,0x1B,0xC7,0x8C,
+0x00,0x08,0x04,0x3C,
+0x24,0x28,0xF2,0x00,
+0x24,0x10,0xA4,0x00,
+0x08,0x00,0x40,0x10,
+0x80,0x00,0x08,0x3C,
+0xD4,0x1B,0xC3,0x8C,
+0x25,0xB0,0x02,0x3C,
+0xB0,0x03,0x42,0x34,
+0x26,0x18,0x64,0x00,
+0x00,0x00,0x44,0xAC,
+0xD4,0x1B,0xC3,0xAC,
+0x80,0x00,0x08,0x3C,
+0x24,0x10,0xA8,0x00,
+0x21,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0xD4,0x1B,0xC3,0x8C,
+0x25,0xB0,0x09,0x3C,
+0xB0,0x03,0x2A,0x35,
+0x2A,0xB0,0x02,0x3C,
+0x00,0x00,0x43,0xAD,
+0x36,0x00,0x42,0x34,
+0x00,0x00,0x43,0x90,
+0x23,0xB0,0x04,0x3C,
+0xFF,0x1F,0x02,0x3C,
+0xC0,0x18,0x03,0x00,
+0xF0,0x07,0x63,0x30,
+0x00,0x38,0xC5,0x8C,
+0x21,0x18,0x64,0x00,
+0xFF,0xFF,0x42,0x34,
+0x24,0x18,0x62,0x00,
+0xCE,0x02,0x65,0x10,
+0x04,0x38,0xC3,0xAC,
+0x02,0x80,0x05,0x3C,
+0xBC,0x5E,0xA3,0x8C,
+0x27,0x20,0x08,0x00,
+0x24,0x20,0xE4,0x00,
+0x00,0x08,0x63,0x34,
+0x41,0xB0,0x02,0x3C,
+0x00,0x00,0x43,0xAD,
+0x00,0x00,0x44,0xAC,
+0xBC,0x5E,0xA3,0xAC,
+0xD0,0x1B,0xC4,0xAC,
+0x30,0x1F,0x62,0x26,
+0xD4,0x1B,0x43,0x8C,
+0x80,0x00,0x04,0x3C,
+0x26,0x18,0x64,0x00,
+0xD4,0x1B,0x43,0xAC,
+0x30,0x1F,0x66,0x26,
+0xD0,0x1B,0xC3,0x8C,
+0x00,0x01,0x05,0x3C,
+0x24,0x20,0x72,0x00,
+0x24,0x10,0x85,0x00,
+0x06,0x00,0x40,0x10,
+0x25,0xB0,0x02,0x3C,
+0xD4,0x1B,0xC3,0x8C,
+0xB0,0x03,0x42,0x34,
+0x26,0x18,0x65,0x00,
+0x00,0x00,0x45,0xAC,
+0xD4,0x1B,0xC3,0xAC,
+0x00,0x02,0x05,0x3C,
+0x24,0x10,0x85,0x00,
+0x06,0x00,0x40,0x10,
+0x25,0xB0,0x02,0x3C,
+0xD4,0x1B,0xC3,0x8C,
+0xB0,0x03,0x42,0x34,
+0x26,0x18,0x65,0x00,
+0x00,0x00,0x45,0xAC,
+0xD4,0x1B,0xC3,0xAC,
+0x00,0x10,0x05,0x3C,
+0x24,0x10,0x85,0x00,
+0x0C,0x00,0x40,0x10,
+0x30,0x1F,0x63,0x26,
+0xB0,0x1B,0xC3,0x94,
+0x00,0x00,0x00,0x00,
+0x04,0x00,0x62,0x30,
+0x02,0x00,0x40,0x10,
+0x00,0x08,0x62,0x34,
+0xB0,0x1B,0xC2,0xA4,
+0xD4,0x1B,0xC2,0x8C,
+0x00,0x00,0x00,0x00,
+0x26,0x10,0x45,0x00,
+0xD4,0x1B,0xC2,0xAC,
+0x30,0x1F,0x63,0x26,
+0xD0,0x1B,0x62,0x8C,
+0x00,0x20,0x05,0x3C,
+0x24,0x10,0x52,0x00,
+0x24,0x10,0x45,0x00,
+0x0B,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0xB0,0x1B,0x64,0x94,
+0x00,0x00,0x00,0x00,
+0x04,0x00,0x82,0x30,
+0x02,0x00,0x40,0x10,
+0xFF,0xF7,0x82,0x30,
+0xB0,0x1B,0x62,0xA4,
+0xD4,0x1B,0x62,0x8C,
+0x00,0x00,0x00,0x00,
+0x26,0x10,0x45,0x00,
+0xD4,0x1B,0x62,0xAC,
+0x2C,0x00,0xBF,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x30,0x00,0xBD,0x27,
+0x20,0xBD,0x02,0x3C,
+0xEC,0x02,0x03,0x36,
+0x4D,0x00,0x07,0x36,
+0xF1,0x02,0x08,0x36,
+0x08,0x00,0x06,0x24,
+0x78,0x02,0x42,0x34,
+0x00,0x00,0x45,0xA4,
+0x00,0x00,0xE0,0xA0,
+0x00,0x00,0x06,0xA1,
+0x00,0x00,0x60,0xAC,
+0x00,0x00,0x62,0x8C,
+0xFF,0x00,0x04,0x3C,
+0x00,0x00,0xE0,0xA0,
+0xFF,0x00,0x49,0x30,
+0x25,0x48,0x24,0x01,
+0x00,0x00,0x06,0xA1,
+0xF2,0x02,0x05,0x36,
+0x00,0x00,0x64,0xAC,
+0x0A,0x00,0x0A,0x36,
+0x00,0x00,0x69,0xAC,
+0x80,0xFF,0x03,0x24,
+0x00,0x00,0xA0,0xA0,
+0x00,0x00,0x43,0xA1,
+0x00,0x00,0x62,0x8D,
+0x80,0x00,0x03,0x3C,
+0x24,0x10,0x43,0x00,
+0x02,0x00,0x40,0x10,
+0x84,0xFF,0x02,0x24,
+0x00,0x00,0x42,0xA1,
+0x25,0x22,0x00,0x0C,
+0x01,0x00,0x04,0x24,
+0x02,0x00,0x02,0x36,
+0x00,0x00,0x43,0x94,
+0xFF,0xBF,0x04,0x24,
+0x24,0x18,0x64,0x00,
+0x00,0x00,0x43,0xA4,
+0x3C,0x35,0x00,0x08,
+0x30,0x1F,0x67,0x26,
+0x8C,0x33,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x02,0x3C,
+0x2A,0xB0,0x06,0x3C,
+0xB0,0x03,0x42,0x34,
+0x00,0x00,0x54,0xAC,
+0x28,0x00,0xC3,0x34,
+0x00,0x00,0x69,0x8C,
+0xFF,0x00,0x05,0x24,
+0xFF,0x00,0x24,0x31,
+0x6D,0x03,0x85,0x10,
+0x25,0xBD,0x02,0x3C,
+0x00,0x80,0x22,0x31,
+0x59,0x02,0x40,0x10,
+0x00,0xFF,0x02,0x3C,
+0x00,0x80,0x02,0x3C,
+0x00,0x00,0x62,0xAC,
+0xFF,0x00,0x02,0x24,
+0x21,0x00,0x82,0x10,
+0xFF,0x00,0x23,0x31,
+0x30,0x1F,0x70,0x26,
+0x58,0x37,0x05,0x8E,
+0x20,0x10,0x02,0x3C,
+0x00,0x1A,0x03,0x00,
+0x21,0x18,0x62,0x00,
+0x21,0x30,0x60,0x00,
+0xA4,0x36,0x09,0xA2,
+0xEC,0x36,0x03,0xAE,
+0x06,0x00,0x04,0x24,
+0x80,0x00,0x07,0x24,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA0,0xAF,
+0x02,0x80,0x09,0x3C,
+0xCC,0x5E,0x27,0x91,
+0x02,0x80,0x08,0x3C,
+0xBC,0x5E,0x05,0x8D,
+0xD0,0x1B,0x06,0x8E,
+0x60,0x00,0x02,0x3C,
+0x02,0x00,0xE7,0x34,
+0x27,0x10,0x02,0x00,
+0x24,0x30,0xC2,0x00,
+0x00,0x04,0xA5,0x34,
+0x00,0x26,0x07,0x00,
+0x25,0xB0,0x02,0x3C,
+0x25,0x20,0x85,0x00,
+0x80,0x03,0x42,0x34,
+0x41,0xB0,0x03,0x3C,
+0x00,0x00,0x44,0xAC,
+0x00,0x00,0x66,0xAC,
+0xBC,0x5E,0x05,0xAD,
+0xCC,0x5E,0x27,0xA1,
+0xD0,0x1B,0x06,0xAE,
+0x30,0x1F,0x62,0x26,
+0xD4,0x1B,0x43,0x8C,
+0x40,0x00,0x04,0x3C,
+0x26,0x18,0x64,0x00,
+0xB5,0x35,0x00,0x08,
+0xD4,0x1B,0x43,0xAC,
+0x8C,0x33,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x2A,0xB0,0x05,0x3C,
+0x24,0x00,0xA3,0x34,
+0x00,0x00,0x69,0x8C,
+0xFF,0x00,0x06,0x24,
+0xFF,0x00,0x24,0x31,
+0x48,0x03,0x86,0x10,
+0x25,0xB0,0x02,0x3C,
+0x00,0x80,0x22,0x31,
+0x64,0x02,0x40,0x10,
+0x00,0xFF,0x02,0x3C,
+0x00,0x80,0x02,0x3C,
+0x00,0x00,0x62,0xAC,
+0xFF,0x00,0x02,0x24,
+0x25,0x00,0x82,0x10,
+0x30,0x1F,0x70,0x26,
+0xFF,0x00,0x23,0x31,
+0x58,0x37,0x05,0x8E,
+0x20,0x10,0x02,0x3C,
+0x00,0x1A,0x03,0x00,
+0x21,0x18,0x62,0x00,
+0x21,0x30,0x60,0x00,
+0xA0,0x36,0x09,0xA2,
+0xEC,0x36,0x03,0xAE,
+0x06,0x00,0x04,0x24,
+0x80,0x00,0x07,0x24,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA0,0xAF,
+0x02,0x80,0x0A,0x3C,
+0xCC,0x5E,0x47,0x91,
+0x02,0x80,0x09,0x3C,
+0xBC,0x5E,0x25,0x8D,
+0xD0,0x1B,0x06,0x8E,
+0x60,0x00,0x02,0x3C,
+0x04,0x00,0xE7,0x34,
+0x27,0x10,0x02,0x00,
+0x24,0x30,0xC2,0x00,
+0x00,0x04,0xA5,0x34,
+0x25,0xB0,0x03,0x3C,
+0x40,0x00,0x02,0x3C,
+0x00,0x26,0x07,0x00,
+0x26,0xA0,0x82,0x02,
+0xB0,0x03,0x68,0x34,
+0x25,0x20,0x85,0x00,
+0x80,0x03,0x63,0x34,
+0x41,0xB0,0x02,0x3C,
+0x00,0x00,0x64,0xAC,
+0x00,0x00,0x46,0xAC,
+0xBC,0x5E,0x25,0xAD,
+0xCC,0x5E,0x47,0xA1,
+0xD0,0x1B,0x06,0xAE,
+0x00,0x00,0x14,0xAD,
+0x30,0x1F,0x62,0x26,
+0xD4,0x1B,0x43,0x8C,
+0x20,0x00,0x04,0x3C,
+0x26,0x18,0x64,0x00,
+0xAD,0x35,0x00,0x08,
+0xD4,0x1B,0x43,0xAC,
+0x8C,0x33,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x05,0x3C,
+0xB0,0x03,0xA2,0x34,
+0x2A,0xB0,0x07,0x3C,
+0x00,0x00,0x54,0xAC,
+0x20,0x00,0xE3,0x34,
+0x00,0x00,0x69,0x8C,
+0xFF,0x00,0x06,0x24,
+0xFF,0x00,0x24,0x31,
+0x07,0x03,0x86,0x10,
+0x90,0x03,0xA2,0x34,
+0x00,0x80,0x22,0x31,
+0x05,0x02,0x40,0x10,
+0x00,0xFF,0x02,0x3C,
+0x00,0x80,0x02,0x3C,
+0x00,0x00,0x62,0xAC,
+0xFF,0x00,0x02,0x24,
+0x21,0x00,0x82,0x10,
+0x30,0x1F,0x70,0x26,
+0xFF,0x00,0x23,0x31,
+0x4C,0x37,0x05,0x8E,
+0x20,0x10,0x02,0x3C,
+0x00,0x1A,0x03,0x00,
+0x21,0x18,0x62,0x00,
+0x21,0x30,0x60,0x00,
+0xA8,0x36,0x09,0xA2,
+0xE0,0x36,0x03,0xAE,
+0x05,0x00,0x04,0x24,
+0x80,0x00,0x07,0x24,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA0,0xAF,
+0x02,0x80,0x09,0x3C,
+0xCC,0x5E,0x27,0x91,
+0x02,0x80,0x08,0x3C,
+0xBC,0x5E,0x05,0x8D,
+0xD0,0x1B,0x06,0x8E,
+0x18,0x00,0x02,0x3C,
+0x01,0x00,0xE7,0x34,
+0x27,0x10,0x02,0x00,
+0x24,0x30,0xC2,0x00,
+0x00,0x02,0xA5,0x34,
+0x00,0x26,0x07,0x00,
+0x25,0xB0,0x02,0x3C,
+0x25,0x20,0x85,0x00,
+0x80,0x03,0x42,0x34,
+0x41,0xB0,0x03,0x3C,
+0x00,0x00,0x44,0xAC,
+0x00,0x00,0x66,0xAC,
+0xBC,0x5E,0x05,0xAD,
+0xCC,0x5E,0x27,0xA1,
+0xD0,0x1B,0x06,0xAE,
+0x30,0x1F,0x62,0x26,
+0xD4,0x1B,0x43,0x8C,
+0x10,0x00,0x04,0x3C,
+0x26,0x18,0x64,0x00,
+0xA6,0x35,0x00,0x08,
+0xD4,0x1B,0x43,0xAC,
+0x8C,0x33,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x2A,0xB0,0x05,0x3C,
+0x0C,0x00,0xA3,0x34,
+0x00,0x00,0x69,0x8C,
+0xFF,0x00,0x06,0x24,
+0xFF,0x00,0x24,0x31,
+0xC6,0x02,0x86,0x10,
+0x00,0x80,0x22,0x31,
+0x54,0x02,0x40,0x10,
+0x00,0xFF,0x02,0x3C,
+0x00,0x80,0x02,0x3C,
+0x00,0x00,0x62,0xAC,
+0xFF,0x00,0x02,0x24,
+0x24,0x00,0x82,0x10,
+0x30,0x1F,0x70,0x26,
+0xFF,0x00,0x23,0x31,
+0x34,0x37,0x05,0x8E,
+0x20,0x10,0x02,0x3C,
+0x00,0x1A,0x03,0x00,
+0x21,0x18,0x62,0x00,
+0x21,0x30,0x60,0x00,
+0x8C,0x36,0x09,0xA2,
+0xC8,0x36,0x03,0xAE,
+0x03,0x00,0x04,0x24,
+0x80,0x00,0x07,0x24,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA0,0xAF,
+0x02,0x80,0x0A,0x3C,
+0xCC,0x5E,0x47,0x91,
+0x02,0x80,0x09,0x3C,
+0xBC,0x5E,0x25,0x8D,
+0xD0,0x1B,0x06,0x8E,
+0x01,0x00,0x08,0x3C,
+0x80,0xFF,0x02,0x24,
+0x25,0x38,0xE2,0x00,
+0x00,0x80,0x03,0x35,
+0x80,0x00,0xA5,0x34,
+0x27,0x18,0x03,0x00,
+0x00,0x26,0x07,0x00,
+0x25,0xB0,0x02,0x3C,
+0x24,0x30,0xC3,0x00,
+0x25,0x20,0x85,0x00,
+0x80,0x03,0x42,0x34,
+0x41,0xB0,0x03,0x3C,
+0x00,0x00,0x44,0xAC,
+0x27,0xA0,0x08,0x00,
+0x00,0x00,0x66,0xAC,
+0xBC,0x5E,0x25,0xAD,
+0xCC,0x5E,0x47,0xA1,
+0xD0,0x1B,0x06,0xAE,
+0x30,0x1F,0x63,0x26,
+0xD4,0x1B,0x62,0x8C,
+0x00,0x00,0x00,0x00,
+0x00,0x80,0x42,0x38,
+0xD4,0x1B,0x62,0xAC,
+0x30,0x1F,0x70,0x26,
+0xD0,0x1B,0x02,0x8E,
+0x01,0x00,0x03,0x3C,
+0x24,0x10,0x52,0x00,
+0x24,0x10,0x54,0x00,
+0x24,0x10,0x43,0x00,
+0x11,0xFE,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x8C,0x33,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x2A,0xB0,0x05,0x3C,
+0x10,0x00,0xA3,0x34,
+0x00,0x00,0x69,0x8C,
+0xFF,0x00,0x06,0x24,
+0xFF,0x00,0x24,0x31,
+0x7C,0x02,0x86,0x10,
+0x25,0xB0,0x02,0x3C,
+0x00,0x80,0x22,0x31,
+0xD0,0x01,0x40,0x10,
+0x00,0x80,0x02,0x3C,
+0x00,0x00,0x62,0xAC,
+0xFF,0x00,0x02,0x24,
+0x22,0x00,0x82,0x10,
+0x30,0x1F,0x70,0x26,
+0xFF,0x00,0x23,0x31,
+0x34,0x37,0x05,0x8E,
+0x20,0x10,0x02,0x3C,
+0x00,0x1A,0x03,0x00,
+0x21,0x18,0x62,0x00,
+0x21,0x30,0x60,0x00,
+0x90,0x36,0x09,0xA2,
+0xC8,0x36,0x03,0xAE,
+0x03,0x00,0x04,0x24,
+0x80,0x00,0x07,0x24,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA0,0xAF,
+0x02,0x80,0x09,0x3C,
+0xCC,0x5E,0x27,0x91,
+0x02,0x80,0x08,0x3C,
+0xBC,0x5E,0x05,0x8D,
+0xD0,0x1B,0x06,0x8E,
+0x01,0x00,0x02,0x3C,
+0x00,0x80,0x42,0x34,
+0x40,0x00,0xE7,0x34,
+0x27,0x10,0x02,0x00,
+0x24,0x30,0xC2,0x00,
+0x80,0x00,0xA5,0x34,
+0x00,0x26,0x07,0x00,
+0x25,0xB0,0x02,0x3C,
+0x25,0x20,0x85,0x00,
+0x80,0x03,0x42,0x34,
+0x41,0xB0,0x03,0x3C,
+0x00,0x00,0x44,0xAC,
+0x00,0x00,0x66,0xAC,
+0xBC,0x5E,0x05,0xAD,
+0xCC,0x5E,0x27,0xA1,
+0xD0,0x1B,0x06,0xAE,
+0x30,0x1F,0x62,0x26,
+0xD4,0x1B,0x43,0x8C,
+0x01,0x00,0x04,0x3C,
+0x30,0x1F,0x70,0x26,
+0x26,0x18,0x64,0x00,
+0xD4,0x1B,0x43,0xAC,
+0xD0,0x1B,0x02,0x8E,
+0x02,0x00,0x03,0x3C,
+0x24,0x10,0x52,0x00,
+0x24,0x10,0x43,0x00,
+0xDB,0xFD,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x8C,0x33,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x2A,0xB0,0x05,0x3C,
+0x14,0x00,0xA3,0x34,
+0x00,0x00,0x69,0x8C,
+0xFF,0x00,0x06,0x24,
+0xFF,0x00,0x24,0x31,
+0x64,0x02,0x86,0x10,
+0x25,0xB0,0x02,0x3C,
+0x00,0x80,0x22,0x31,
+0xFA,0x01,0x40,0x10,
+0x00,0xFF,0x02,0x3C,
+0x00,0x80,0x02,0x3C,
+0x00,0x00,0x62,0xAC,
+0xFF,0x00,0x02,0x24,
+0x25,0x00,0x82,0x10,
+0x30,0x1F,0x70,0x26,
+0xFF,0x00,0x23,0x31,
+0x40,0x37,0x05,0x8E,
+0x20,0x10,0x02,0x3C,
+0x00,0x1A,0x03,0x00,
+0x21,0x18,0x62,0x00,
+0x21,0x30,0x60,0x00,
+0x94,0x36,0x09,0xA2,
+0xD4,0x36,0x03,0xAE,
+0x04,0x00,0x04,0x24,
+0x80,0x00,0x07,0x24,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA0,0xAF,
+0x02,0x80,0x0A,0x3C,
+0xCC,0x5E,0x47,0x91,
+0x02,0x80,0x09,0x3C,
+0xBC,0x5E,0x25,0x8D,
+0xD0,0x1B,0x06,0x8E,
+0x06,0x00,0x02,0x3C,
+0x20,0x00,0xE7,0x34,
+0x27,0x10,0x02,0x00,
+0x24,0x30,0xC2,0x00,
+0x00,0x01,0xA5,0x34,
+0x25,0xB0,0x03,0x3C,
+0x04,0x00,0x02,0x3C,
+0x00,0x26,0x07,0x00,
+0x26,0xA0,0x82,0x02,
+0xB0,0x03,0x68,0x34,
+0x25,0x20,0x85,0x00,
+0x80,0x03,0x63,0x34,
+0x41,0xB0,0x02,0x3C,
+0x00,0x00,0x64,0xAC,
+0x00,0x00,0x46,0xAC,
+0xBC,0x5E,0x25,0xAD,
+0xCC,0x5E,0x47,0xA1,
+0xD0,0x1B,0x06,0xAE,
+0x00,0x00,0x14,0xAD,
+0x30,0x1F,0x62,0x26,
+0xD4,0x1B,0x43,0x8C,
+0x02,0x00,0x04,0x3C,
+0x30,0x1F,0x70,0x26,
+0x26,0x18,0x64,0x00,
+0xD4,0x1B,0x43,0xAC,
+0xD0,0x1B,0x02,0x8E,
+0x04,0x00,0x03,0x3C,
+0x24,0x10,0x52,0x00,
+0x24,0x10,0x54,0x00,
+0x24,0x10,0x43,0x00,
+0xA1,0xFD,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x8C,0x33,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x03,0x3C,
+0xB0,0x03,0x62,0x34,
+0x2A,0xB0,0x07,0x3C,
+0x00,0x00,0x54,0xAC,
+0x18,0x00,0xE5,0x34,
+0x00,0x00,0xA9,0x8C,
+0xFF,0x00,0x06,0x24,
+0xFF,0x00,0x24,0x31,
+0x16,0x02,0x86,0x10,
+0x04,0x00,0x02,0x24,
+0x00,0x80,0x22,0x31,
+0xD6,0x01,0x40,0x10,
+0x00,0xFF,0x02,0x3C,
+0x00,0x80,0x02,0x3C,
+0x00,0x00,0xA2,0xAC,
+0xFF,0x00,0x02,0x24,
+0x21,0x00,0x82,0x10,
+0x30,0x1F,0x70,0x26,
+0xFF,0x00,0x23,0x31,
+0x40,0x37,0x05,0x8E,
+0x20,0x10,0x02,0x3C,
+0x00,0x1A,0x03,0x00,
+0x21,0x18,0x62,0x00,
+0x21,0x30,0x60,0x00,
+0x98,0x36,0x09,0xA2,
+0xD4,0x36,0x03,0xAE,
+0x04,0x00,0x04,0x24,
+0x80,0x00,0x07,0x24,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA0,0xAF,
+0x02,0x80,0x09,0x3C,
+0xCC,0x5E,0x27,0x91,
+0x02,0x80,0x08,0x3C,
+0xBC,0x5E,0x05,0x8D,
+0xD0,0x1B,0x06,0x8E,
+0x06,0x00,0x02,0x3C,
+0x10,0x00,0xE7,0x34,
+0x27,0x10,0x02,0x00,
+0x24,0x30,0xC2,0x00,
+0x00,0x01,0xA5,0x34,
+0x00,0x26,0x07,0x00,
+0x25,0xB0,0x02,0x3C,
+0x25,0x20,0x85,0x00,
+0x80,0x03,0x42,0x34,
+0x41,0xB0,0x03,0x3C,
+0x00,0x00,0x44,0xAC,
+0x00,0x00,0x66,0xAC,
+0xBC,0x5E,0x05,0xAD,
+0xCC,0x5E,0x27,0xA1,
+0xD0,0x1B,0x06,0xAE,
+0x30,0x1F,0x62,0x26,
+0xD4,0x1B,0x43,0x8C,
+0x04,0x00,0x04,0x3C,
+0x30,0x1F,0x70,0x26,
+0x26,0x18,0x64,0x00,
+0xD4,0x1B,0x43,0xAC,
+0xD0,0x1B,0x02,0x8E,
+0x08,0x00,0x03,0x3C,
+0x24,0x10,0x52,0x00,
+0x24,0x10,0x43,0x00,
+0x68,0xFD,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x8C,0x33,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x2A,0xB0,0x05,0x3C,
+0x1C,0x00,0xA3,0x34,
+0x00,0x00,0x69,0x8C,
+0xFF,0x00,0x06,0x24,
+0xFF,0x00,0x24,0x31,
+0xDD,0x01,0x86,0x10,
+0x25,0xB0,0x02,0x3C,
+0x00,0x80,0x22,0x31,
+0x33,0x01,0x40,0x10,
+0x00,0xFF,0x02,0x3C,
+0x00,0x80,0x02,0x3C,
+0x00,0x00,0x62,0xAC,
+0xFF,0x00,0x02,0x24,
+0x25,0x00,0x82,0x10,
+0x30,0x1F,0x70,0x26,
+0xFF,0x00,0x23,0x31,
+0x4C,0x37,0x05,0x8E,
+0x20,0x10,0x02,0x3C,
+0x00,0x1A,0x03,0x00,
+0x21,0x18,0x62,0x00,
+0x21,0x30,0x60,0x00,
+0x9C,0x36,0x09,0xA2,
+0xE0,0x36,0x03,0xAE,
+0x05,0x00,0x04,0x24,
+0x80,0x00,0x07,0x24,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA0,0xAF,
+0x02,0x80,0x0A,0x3C,
+0xCC,0x5E,0x47,0x91,
+0x02,0x80,0x09,0x3C,
+0xBC,0x5E,0x25,0x8D,
+0xD0,0x1B,0x06,0x8E,
+0x18,0x00,0x02,0x3C,
+0x08,0x00,0xE7,0x34,
+0x27,0x10,0x02,0x00,
+0x24,0x30,0xC2,0x00,
+0x00,0x02,0xA5,0x34,
+0x25,0xB0,0x03,0x3C,
+0x10,0x00,0x02,0x3C,
+0x00,0x26,0x07,0x00,
+0x26,0xA0,0x82,0x02,
+0xB0,0x03,0x68,0x34,
+0x25,0x20,0x85,0x00,
+0x80,0x03,0x63,0x34,
+0x41,0xB0,0x02,0x3C,
+0x00,0x00,0x64,0xAC,
+0x00,0x00,0x46,0xAC,
+0xBC,0x5E,0x25,0xAD,
+0xCC,0x5E,0x47,0xA1,
+0xD0,0x1B,0x06,0xAE,
+0x00,0x00,0x14,0xAD,
+0x30,0x1F,0x62,0x26,
+0xD4,0x1B,0x43,0x8C,
+0x08,0x00,0x04,0x3C,
+0x26,0x18,0x64,0x00,
+0x9E,0x35,0x00,0x08,
+0xD4,0x1B,0x43,0xAC,
+0x8C,0x33,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xD4,0x1B,0x02,0x8E,
+0xD0,0x1B,0x03,0x8E,
+0x00,0x20,0x42,0x38,
+0x7D,0x35,0x00,0x08,
+0xD4,0x1B,0x02,0xAE,
+0x8C,0x33,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x2A,0xB0,0x02,0x3C,
+0x08,0x00,0x43,0x34,
+0x00,0x00,0x69,0x8C,
+0xFF,0x00,0x02,0x24,
+0xFF,0x00,0x24,0x31,
+0x2C,0x00,0x82,0x10,
+0x00,0x80,0x22,0x31,
+0x34,0x01,0x40,0x14,
+0x00,0x80,0x02,0x3C,
+0x00,0xFF,0x02,0x3C,
+0x24,0x10,0x22,0x01,
+0x0B,0x00,0x40,0x10,
+0xFF,0x00,0x02,0x24,
+0xB4,0x36,0x02,0x92,
+0x20,0xB0,0x03,0x3C,
+0x00,0x12,0x02,0x00,
+0x21,0x10,0x43,0x00,
+0x0C,0x00,0x49,0x8C,
+0x25,0xB0,0x03,0x3C,
+0xB0,0x03,0x63,0x34,
+0x00,0x00,0x69,0xAC,
+0xFF,0x00,0x24,0x31,
+0xFF,0x00,0x02,0x24,
+0x1A,0x00,0x82,0x10,
+0x30,0x1F,0x70,0x26,
+0xFF,0x00,0x23,0x31,
+0x7C,0x37,0x05,0x8E,
+0x20,0x10,0x02,0x3C,
+0x00,0x1A,0x03,0x00,
+0x21,0x18,0x62,0x00,
+0x21,0x30,0x60,0x00,
+0x10,0x37,0x03,0xAE,
+0x01,0x00,0x04,0x24,
+0xB4,0x36,0x09,0xA2,
+0x80,0x00,0x07,0x24,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA0,0xAF,
+0xD0,0x1B,0x05,0x8E,
+0x02,0x80,0x06,0x3C,
+0xBC,0x5E,0xC4,0x8C,
+0xFF,0xC7,0x02,0x24,
+0x24,0x28,0xA2,0x00,
+0x25,0xB0,0x02,0x3C,
+0x10,0x00,0x84,0x34,
+0x80,0x03,0x42,0x34,
+0x41,0xB0,0x03,0x3C,
+0x00,0x00,0x44,0xAC,
+0x00,0x00,0x65,0xAC,
+0xBC,0x5E,0xC4,0xAC,
+0xD0,0x1B,0x05,0xAE,
+0x30,0x1F,0x63,0x26,
+0xD4,0x1B,0x62,0x8C,
+0x00,0x00,0x00,0x00,
+0x00,0x10,0x42,0x38,
+0x76,0x35,0x00,0x08,
+0xD4,0x1B,0x62,0xAC,
+0x56,0x01,0x02,0x35,
+0x00,0x00,0x43,0x94,
+0x00,0x00,0x00,0x00,
+0x70,0xFC,0x60,0x10,
+0x00,0x00,0x00,0x00,
+0x93,0x55,0x00,0x0C,
+0x07,0x00,0x04,0x24,
+0x29,0x35,0x00,0x08,
+0x30,0x1F,0x64,0x26,
+0x00,0x00,0x62,0xAC,
+0xD3,0x35,0x00,0x08,
+0xFF,0x00,0x02,0x24,
+0xF8,0x1D,0x24,0x96,
+0x64,0x37,0x25,0x8E,
+0xFF,0x0F,0x83,0x30,
+0x25,0x28,0xA2,0x00,
+0x00,0x19,0x03,0x00,
+0x20,0x00,0xA6,0x24,
+0x02,0x12,0x03,0x00,
+0x01,0x00,0x84,0x24,
+0xF8,0x1D,0x24,0xA6,
+0x17,0x00,0xC2,0xA0,
+0x16,0x00,0xC3,0xA0,
+0x0C,0x00,0xA4,0x8C,
+0x00,0xF0,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0xFF,0x0F,0x63,0x30,
+0x00,0x1C,0x03,0x00,
+0x24,0x20,0x82,0x00,
+0x25,0x20,0x83,0x00,
+0x0C,0x00,0xA4,0xAC,
+0x64,0x37,0x25,0x8E,
+0x01,0x00,0x10,0x24,
+0x01,0x00,0x04,0x24,
+0x31,0x10,0x06,0x3C,
+0x00,0x01,0x07,0x24,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xB0,0xAF,
+0xB0,0x01,0x00,0x0C,
+0x01,0x00,0x04,0x24,
+0x2A,0xB0,0x02,0x3C,
+0x01,0x00,0x42,0x34,
+0x02,0x00,0x03,0x24,
+0x00,0x00,0x50,0xA0,
+0x00,0x00,0x43,0xA0,
+0xD4,0x1B,0x22,0x8E,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x42,0x38,
+0x68,0x35,0x00,0x08,
+0xD4,0x1B,0x22,0xAE,
+0xD0,0x03,0x23,0x35,
+0x80,0x00,0x02,0x24,
+0x00,0x00,0x62,0xAC,
+0x24,0x36,0x00,0x08,
+0x30,0x1F,0x62,0x26,
+0x25,0xB0,0x02,0x3C,
+0x01,0x00,0x03,0x24,
+0x90,0x03,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0xF0,0x35,0x00,0x08,
+0x30,0x1F,0x65,0x26,
+0x24,0x10,0x22,0x01,
+0xA9,0xFD,0x40,0x10,
+0xFF,0x00,0x02,0x24,
+0x47,0x00,0xC6,0x34,
+0x00,0x00,0xC2,0x90,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x44,0x30,
+0x0E,0x00,0x85,0x10,
+0x30,0x1F,0x62,0x26,
+0xA4,0x36,0x04,0xA2,
+0x00,0x00,0xC2,0x90,
+0xFF,0x00,0x83,0x30,
+0xFF,0x00,0x44,0x30,
+0x07,0x00,0x83,0x10,
+0x21,0x38,0x00,0x02,
+0x21,0x28,0xC0,0x00,
+0x00,0x00,0xA2,0x90,
+0x21,0x18,0x80,0x00,
+0xFD,0xFF,0x62,0x14,
+0xFF,0x00,0x44,0x30,
+0xA4,0x36,0xE3,0xA0,
+0x30,0x1F,0x62,0x26,
+0xA4,0x36,0x43,0x90,
+0x20,0xB0,0x02,0x3C,
+0x00,0x1A,0x03,0x00,
+0x21,0x18,0x62,0x00,
+0x0C,0x00,0x69,0x8C,
+0x25,0xB0,0x02,0x3C,
+0xB0,0x03,0x42,0x34,
+0xFF,0x00,0x24,0x31,
+0x00,0x00,0x49,0xAC,
+0x9C,0x36,0x00,0x08,
+0xFF,0x00,0x02,0x24,
+0x24,0x10,0x22,0x01,
+0xFD,0xFD,0x40,0x10,
+0xFF,0x00,0x02,0x24,
+0x45,0x00,0xE5,0x34,
+0x00,0x00,0xA2,0x90,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x44,0x30,
+0x0E,0x00,0x86,0x10,
+0x30,0x1F,0x62,0x26,
+0xA8,0x36,0x04,0xA2,
+0x00,0x00,0xA2,0x90,
+0xFF,0x00,0x83,0x30,
+0xFF,0x00,0x44,0x30,
+0x08,0x00,0x83,0x10,
+0x30,0x1F,0x62,0x26,
+0x21,0x30,0x00,0x02,
+0x00,0x00,0xA2,0x90,
+0x21,0x18,0x80,0x00,
+0xFD,0xFF,0x62,0x14,
+0xFF,0x00,0x44,0x30,
+0xA8,0x36,0xC3,0xA0,
+0x30,0x1F,0x62,0x26,
+0xA8,0x36,0x43,0x90,
+0x20,0xB0,0x02,0x3C,
+0x00,0x1A,0x03,0x00,
+0x21,0x18,0x62,0x00,
+0x0C,0x00,0x69,0x8C,
+0x25,0xB0,0x02,0x3C,
+0xB0,0x03,0x42,0x34,
+0xFF,0x00,0x24,0x31,
+0x00,0x00,0x49,0xAC,
+0x11,0x37,0x00,0x08,
+0xFF,0x00,0x02,0x24,
+0x24,0x10,0x22,0x01,
+0x9E,0xFD,0x40,0x10,
+0xFF,0x00,0x02,0x24,
+0x46,0x00,0xA5,0x34,
+0x00,0x00,0xA2,0x90,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x44,0x30,
+0x0E,0x00,0x86,0x10,
+0x30,0x1F,0x62,0x26,
+0xA0,0x36,0x04,0xA2,
+0x00,0x00,0xA2,0x90,
+0xFF,0x00,0x83,0x30,
+0xFF,0x00,0x44,0x30,
+0x08,0x00,0x83,0x10,
+0x30,0x1F,0x62,0x26,
+0x21,0x30,0x00,0x02,
+0x00,0x00,0xA2,0x90,
+0x21,0x18,0x80,0x00,
+0xFD,0xFF,0x62,0x14,
+0xFF,0x00,0x44,0x30,
+0xA0,0x36,0xC3,0xA0,
+0x30,0x1F,0x62,0x26,
+0xA0,0x36,0x43,0x90,
+0x20,0xB0,0x02,0x3C,
+0x00,0x1A,0x03,0x00,
+0x21,0x18,0x62,0x00,
+0x0C,0x00,0x69,0x8C,
+0x25,0xB0,0x02,0x3C,
+0xB0,0x03,0x42,0x34,
+0xFF,0x00,0x24,0x31,
+0x00,0x00,0x49,0xAC,
+0xD3,0x36,0x00,0x08,
+0xFF,0x00,0x02,0x24,
+0x00,0xFF,0x02,0x3C,
+0x24,0x10,0x22,0x01,
+0x30,0xFE,0x40,0x10,
+0xFF,0x00,0x02,0x24,
+0x41,0x00,0xA5,0x34,
+0x00,0x00,0xA2,0x90,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x44,0x30,
+0x0E,0x00,0x86,0x10,
+0x30,0x1F,0x62,0x26,
+0x90,0x36,0x04,0xA2,
+0x00,0x00,0xA2,0x90,
+0xFF,0x00,0x83,0x30,
+0xFF,0x00,0x44,0x30,
+0x08,0x00,0x83,0x10,
+0x30,0x1F,0x62,0x26,
+0x21,0x30,0x00,0x02,
+0x00,0x00,0xA2,0x90,
+0x21,0x18,0x80,0x00,
+0xFD,0xFF,0x62,0x14,
+0xFF,0x00,0x44,0x30,
+0x90,0x36,0xC3,0xA0,
+0x30,0x1F,0x62,0x26,
+0x90,0x36,0x43,0x90,
+0x20,0xB0,0x02,0x3C,
+0x00,0x1A,0x03,0x00,
+0x21,0x18,0x62,0x00,
+0x0C,0x00,0x69,0x8C,
+0x25,0xB0,0x02,0x3C,
+0xB0,0x03,0x42,0x34,
+0xFF,0x00,0x24,0x31,
+0x00,0x00,0x49,0xAC,
+0x87,0x37,0x00,0x08,
+0xFF,0x00,0x02,0x24,
+0x24,0x10,0x22,0x01,
+0xCF,0xFE,0x40,0x10,
+0xFF,0x00,0x02,0x24,
+0x44,0x00,0xA5,0x34,
+0x00,0x00,0xA2,0x90,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x44,0x30,
+0x0E,0x00,0x86,0x10,
+0x30,0x1F,0x62,0x26,
+0x9C,0x36,0x04,0xA2,
+0x00,0x00,0xA2,0x90,
+0xFF,0x00,0x83,0x30,
+0xFF,0x00,0x44,0x30,
+0x08,0x00,0x83,0x10,
+0x30,0x1F,0x62,0x26,
+0x21,0x30,0x00,0x02,
+0x00,0x00,0xA2,0x90,
+0x21,0x18,0x80,0x00,
+0xFD,0xFF,0x62,0x14,
+0xFF,0x00,0x44,0x30,
+0x9C,0x36,0xC3,0xA0,
+0x30,0x1F,0x62,0x26,
+0x9C,0x36,0x43,0x90,
+0x20,0xB0,0x02,0x3C,
+0x00,0x1A,0x03,0x00,
+0x21,0x18,0x62,0x00,
+0x0C,0x00,0x69,0x8C,
+0x25,0xB0,0x02,0x3C,
+0xB0,0x03,0x42,0x34,
+0xFF,0x00,0x24,0x31,
+0x00,0x00,0x49,0xAC,
+0x47,0x38,0x00,0x08,
+0xFF,0x00,0x02,0x24,
+0x24,0x10,0x22,0x01,
+0xAE,0xFD,0x40,0x10,
+0xFF,0x00,0x02,0x24,
+0x40,0x00,0xA5,0x34,
+0x00,0x00,0xA2,0x90,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x44,0x30,
+0x0E,0x00,0x86,0x10,
+0x30,0x1F,0x62,0x26,
+0x8C,0x36,0x04,0xA2,
+0x00,0x00,0xA2,0x90,
+0xFF,0x00,0x83,0x30,
+0xFF,0x00,0x44,0x30,
+0x08,0x00,0x83,0x10,
+0x30,0x1F,0x62,0x26,
+0x21,0x30,0x00,0x02,
+0x00,0x00,0xA2,0x90,
+0x21,0x18,0x80,0x00,
+0xFD,0xFF,0x62,0x14,
+0xFF,0x00,0x44,0x30,
+0x8C,0x36,0xC3,0xA0,
+0x30,0x1F,0x62,0x26,
+0x8C,0x36,0x43,0x90,
+0x20,0xB0,0x02,0x3C,
+0x00,0x1A,0x03,0x00,
+0x21,0x18,0x62,0x00,
+0x0C,0x00,0x69,0x8C,
+0x25,0xB0,0x02,0x3C,
+0xB0,0x03,0x42,0x34,
+0xFF,0x00,0x24,0x31,
+0x00,0x00,0x49,0xAC,
+0x47,0x37,0x00,0x08,
+0xFF,0x00,0x02,0x24,
+0x00,0x00,0x62,0xAC,
+0x93,0x38,0x00,0x08,
+0xFF,0x00,0x02,0x24,
+0x24,0x10,0x22,0x01,
+0x08,0xFE,0x40,0x10,
+0xFF,0x00,0x02,0x24,
+0x42,0x00,0xA5,0x34,
+0x00,0x00,0xA2,0x90,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x44,0x30,
+0x0E,0x00,0x86,0x10,
+0x30,0x1F,0x62,0x26,
+0x94,0x36,0x04,0xA2,
+0x00,0x00,0xA2,0x90,
+0xFF,0x00,0x83,0x30,
+0xFF,0x00,0x44,0x30,
+0x08,0x00,0x83,0x10,
+0x30,0x1F,0x62,0x26,
+0x21,0x30,0x00,0x02,
+0x00,0x00,0xA2,0x90,
+0x21,0x18,0x80,0x00,
+0xFD,0xFF,0x62,0x14,
+0xFF,0x00,0x44,0x30,
+0x94,0x36,0xC3,0xA0,
+0x30,0x1F,0x62,0x26,
+0x94,0x36,0x43,0x90,
+0x20,0xB0,0x02,0x3C,
+0x00,0x1A,0x03,0x00,
+0x21,0x18,0x62,0x00,
+0x0C,0x00,0x69,0x8C,
+0x25,0xB0,0x02,0x3C,
+0xB0,0x03,0x42,0x34,
+0xFF,0x00,0x24,0x31,
+0x00,0x00,0x49,0xAC,
+0xC5,0x37,0x00,0x08,
+0xFF,0x00,0x02,0x24,
+0x24,0x10,0x22,0x01,
+0x2C,0xFE,0x40,0x10,
+0xFF,0x00,0x02,0x24,
+0x43,0x00,0xE5,0x34,
+0x00,0x00,0xA2,0x90,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x44,0x30,
+0x0E,0x00,0x86,0x10,
+0x30,0x1F,0x62,0x26,
+0x98,0x36,0x04,0xA2,
+0x00,0x00,0xA2,0x90,
+0xFF,0x00,0x83,0x30,
+0xFF,0x00,0x44,0x30,
+0x08,0x00,0x83,0x10,
+0x30,0x1F,0x62,0x26,
+0x21,0x30,0x00,0x02,
+0x00,0x00,0xA2,0x90,
+0x21,0x18,0x80,0x00,
+0xFD,0xFF,0x62,0x14,
+0xFF,0x00,0x44,0x30,
+0x98,0x36,0xC3,0xA0,
+0x30,0x1F,0x62,0x26,
+0x98,0x36,0x43,0x90,
+0x20,0xB0,0x02,0x3C,
+0x00,0x1A,0x03,0x00,
+0x21,0x18,0x62,0x00,
+0x0C,0x00,0x69,0x8C,
+0x25,0xB0,0x02,0x3C,
+0xB0,0x03,0x42,0x34,
+0xFF,0x00,0x24,0x31,
+0x00,0x00,0x49,0xAC,
+0x0A,0x38,0x00,0x08,
+0xFF,0x00,0x02,0x24,
+0x06,0x00,0x03,0x24,
+0x90,0x03,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0xAB,0x37,0x00,0x08,
+0x30,0x1F,0x62,0x26,
+0x01,0x00,0x03,0x24,
+0x90,0x03,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0xBF,0x36,0x00,0x08,
+0x30,0x1F,0x62,0x26,
+0x25,0xB0,0x02,0x3C,
+0x07,0x00,0x03,0x24,
+0x90,0x03,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0x30,0x1F,0x63,0x26,
+0xD4,0x1B,0x62,0x8C,
+0x00,0x00,0x00,0x00,
+0x00,0x80,0x42,0x38,
+0x71,0x37,0x00,0x08,
+0xD4,0x1B,0x62,0xAC,
+0x00,0x00,0x40,0xAC,
+0x34,0x37,0x00,0x08,
+0x30,0x1F,0x62,0x26,
+0x02,0x00,0x03,0x24,
+0x90,0x03,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0xFA,0x36,0x00,0x08,
+0x30,0x1F,0x62,0x26,
+0x90,0x03,0x63,0x34,
+0x00,0x00,0x62,0xAC,
+0x2D,0x38,0x00,0x08,
+0x30,0x1F,0x62,0x26,
+0x03,0x00,0x03,0x24,
+0x90,0x03,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0x6E,0x38,0x00,0x08,
+0x30,0x1F,0x62,0x26,
+0x05,0x00,0x03,0x24,
+0x90,0x03,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0xEC,0x37,0x00,0x08,
+0x30,0x1F,0x62,0x26,
+0xE0,0xFF,0xBD,0x27,
+0x1C,0x00,0xBF,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x25,0xB0,0x0C,0x3C,
+0x01,0x80,0x02,0x3C,
+0x18,0x03,0x83,0x35,
+0x9C,0xE8,0x42,0x24,
+0x02,0x80,0x12,0x3C,
+0x41,0xB0,0x0B,0x3C,
+0x00,0x00,0x62,0xAC,
+0x30,0x1F,0x4A,0x26,
+0x0A,0x00,0x62,0x35,
+0x00,0x00,0x44,0x94,
+0xDE,0x1B,0x43,0x95,
+0xDC,0x1B,0x49,0x95,
+0x25,0x30,0x64,0x00,
+0xFF,0xFF,0xD0,0x30,
+0x24,0x10,0x09,0x02,
+0x02,0x00,0x42,0x30,
+0xC2,0x00,0x40,0x10,
+0xC0,0x03,0x83,0x35,
+0x02,0x00,0x02,0x24,
+0x00,0x00,0x62,0xAC,
+0x02,0x80,0x08,0x3C,
+0xBC,0x5E,0x04,0x8D,
+0xDC,0x02,0x82,0x35,
+0x00,0x00,0x47,0x90,
+0xFD,0xFF,0x03,0x24,
+0x00,0x80,0x02,0x3C,
+0x24,0x18,0x23,0x01,
+0x25,0x20,0x82,0x00,
+0x02,0x00,0xC6,0x38,
+0x08,0x00,0x65,0x35,
+0x02,0x80,0x02,0x3C,
+0xF5,0x5E,0x47,0xA0,
+0xBC,0x5E,0x04,0xAD,
+0xDE,0x1B,0x46,0xA5,
+0x21,0x48,0x60,0x00,
+0x00,0x00,0xA3,0xA4,
+0xDC,0x1B,0x43,0xA5,
+0x24,0x38,0x09,0x02,
+0x04,0x00,0xE2,0x30,
+0x0A,0x00,0x40,0x10,
+0x08,0x00,0xE2,0x30,
+0xDE,0x1B,0x43,0x95,
+0x0C,0x00,0x64,0x35,
+0xC0,0x03,0x85,0x35,
+0x04,0x00,0x63,0x38,
+0x04,0x00,0x02,0x24,
+0x00,0x00,0x86,0x8C,
+0x00,0x00,0xA2,0xAC,
+0xDE,0x1B,0x43,0xA5,
+0x08,0x00,0xE2,0x30,
+0x08,0x00,0x40,0x10,
+0x10,0x00,0xE2,0x30,
+0xDE,0x1B,0x42,0x95,
+0xC0,0x03,0x84,0x35,
+0x08,0x00,0x03,0x24,
+0x08,0x00,0x42,0x38,
+0x00,0x00,0x83,0xAC,
+0xDE,0x1B,0x42,0xA5,
+0x10,0x00,0xE2,0x30,
+0x08,0x00,0x40,0x10,
+0x20,0x00,0xE2,0x30,
+0xDE,0x1B,0x42,0x95,
+0xC0,0x03,0x84,0x35,
+0x10,0x00,0x03,0x24,
+0x10,0x00,0x42,0x38,
+0x00,0x00,0x83,0xAC,
+0xDE,0x1B,0x42,0xA5,
+0x20,0x00,0xE2,0x30,
+0x08,0x00,0x40,0x10,
+0x80,0x00,0xE2,0x30,
+0xDE,0x1B,0x42,0x95,
+0xC0,0x03,0x84,0x35,
+0x20,0x00,0x03,0x24,
+0x20,0x00,0x42,0x38,
+0x00,0x00,0x83,0xAC,
+0xDE,0x1B,0x42,0xA5,
+0x80,0x00,0xE2,0x30,
+0x74,0x00,0x40,0x10,
+0x30,0x1F,0x47,0x26,
+0xC0,0x03,0x83,0x35,
+0x80,0x00,0x02,0x24,
+0x42,0xB0,0x0B,0x3C,
+0x00,0x00,0x62,0xAC,
+0x03,0x00,0x71,0x35,
+0xDE,0x1B,0x42,0x95,
+0x00,0x00,0x23,0x92,
+0x80,0x00,0x42,0x38,
+0x20,0x00,0x63,0x30,
+0x59,0x00,0x60,0x10,
+0xDE,0x1B,0x42,0xA5,
+0x20,0x00,0x02,0x24,
+0x00,0x00,0x22,0xA2,
+0x02,0x80,0x03,0x3C,
+0x16,0x5F,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x75,0x00,0x40,0x14,
+0x21,0x40,0x00,0x00,
+0xB0,0x1B,0x42,0x95,
+0x00,0x00,0x00,0x00,
+0x00,0x01,0x42,0x30,
+0x4E,0x00,0x40,0x10,
+0x02,0x80,0x06,0x3C,
+0x02,0x80,0x07,0x3C,
+0xF4,0x5E,0xE2,0x90,
+0x00,0x00,0x00,0x00,
+0x49,0x00,0x40,0x10,
+0x02,0x80,0x09,0x3C,
+0x02,0x80,0x04,0x3C,
+0x00,0x5F,0x82,0x8C,
+0x20,0x5F,0x24,0x8D,
+0x24,0x5F,0x25,0x8D,
+0x21,0x18,0x00,0x00,
+0x21,0x10,0x44,0x00,
+0x2B,0x30,0x44,0x00,
+0x21,0x18,0x65,0x00,
+0x21,0x18,0x66,0x00,
+0x20,0x5F,0x22,0xAD,
+0x24,0x5F,0x23,0xAD,
+0xF4,0x5E,0xE4,0x90,
+0x02,0x00,0x02,0x24,
+0xFF,0x00,0x84,0x30,
+0x07,0x00,0x82,0x10,
+0x02,0x80,0x04,0x3C,
+0xF4,0x5E,0xE2,0x90,
+0x03,0x00,0x03,0x24,
+0xFF,0x00,0x42,0x30,
+0x5A,0x00,0x43,0x14,
+0x02,0x80,0x05,0x3C,
+0x02,0x80,0x04,0x3C,
+0x11,0x5F,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0xFF,0xFF,0x42,0x24,
+0x11,0x5F,0x82,0xA0,
+0x11,0x5F,0x83,0x90,
+0x00,0x00,0x00,0x00,
+0x07,0x00,0x60,0x10,
+0x02,0x80,0x02,0x3C,
+0xFA,0x5E,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0x03,0x00,0x60,0x14,
+0x00,0x00,0x00,0x00,
+0x5B,0x00,0x00,0x11,
+0x80,0x00,0x86,0x35,
+0x11,0x5F,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x06,0x00,0x40,0x14,
+0x02,0x80,0x05,0x3C,
+0x02,0x80,0x02,0x3C,
+0x10,0x5F,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0x11,0x5F,0x83,0xA0,
+0x02,0x80,0x05,0x3C,
+0x0E,0x5F,0xA2,0x90,
+0x02,0x80,0x03,0x3C,
+0x02,0x00,0x04,0x24,
+0x10,0x00,0x42,0x34,
+0x0E,0x5F,0xA2,0xA0,
+0xF9,0x5E,0x62,0x90,
+0x21,0x28,0x00,0x00,
+0xFF,0x00,0x42,0x30,
+0x80,0x30,0x02,0x00,
+0x21,0x30,0xC2,0x00,
+0x8C,0x23,0x00,0x0C,
+0x00,0x33,0x06,0x00,
+0x42,0xB0,0x02,0x3C,
+0x44,0x00,0x04,0x24,
+0x03,0x00,0x42,0x34,
+0x00,0x00,0x44,0xA0,
+0x02,0x80,0x03,0x3C,
+0xF6,0x5E,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x0F,0x00,0x42,0x30,
+0x04,0x00,0x42,0x28,
+0x05,0x00,0x40,0x10,
+0x02,0x80,0x06,0x3C,
+0x04,0x00,0x04,0x24,
+0x64,0x31,0x00,0x0C,
+0x01,0x00,0x05,0x24,
+0x02,0x80,0x06,0x3C,
+0xBC,0x5E,0xC4,0x8C,
+0x30,0x1F,0x47,0x26,
+0xDC,0x1B,0xE5,0x94,
+0x08,0x00,0x02,0x3C,
+0x25,0x20,0x82,0x00,
+0x41,0xB0,0x03,0x3C,
+0x25,0xB0,0x02,0x3C,
+0x7F,0xFF,0xA5,0x30,
+0xB0,0x03,0x42,0x34,
+0x08,0x00,0x63,0x34,
+0x00,0x00,0x44,0xAC,
+0x00,0x00,0x65,0xA4,
+0xBC,0x5E,0xC4,0xAC,
+0xDC,0x1B,0xE5,0xA4,
+0x30,0x1F,0x47,0x26,
+0xDC,0x1B,0xE2,0x94,
+0x00,0x00,0x00,0x00,
+0x24,0x10,0x50,0x00,
+0x00,0x30,0x42,0x30,
+0x06,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0xDE,0x1B,0xE2,0x94,
+0x00,0x00,0x00,0x00,
+0x00,0x10,0x42,0x38,
+0x00,0x20,0x42,0x34,
+0xDE,0x1B,0xE2,0xA4,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x51,0x3A,0x00,0x08,
+0xDE,0x1B,0x46,0xA5,
+0x01,0x00,0x08,0x24,
+0x16,0x5F,0x60,0xA0,
+0x8D,0x3A,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x0E,0x5F,0xA2,0x90,
+0x02,0x80,0x03,0x3C,
+0x02,0x00,0x04,0x24,
+0x10,0x00,0x42,0x34,
+0x0E,0x5F,0xA2,0xA0,
+0xF9,0x5E,0x62,0x90,
+0x21,0x28,0x00,0x00,
+0xFF,0x00,0x42,0x30,
+0x80,0x30,0x02,0x00,
+0x21,0x30,0xC2,0x00,
+0x8C,0x23,0x00,0x0C,
+0x00,0x33,0x06,0x00,
+0x44,0x00,0x02,0x24,
+0x00,0x00,0x22,0xA2,
+0xD5,0x3A,0x00,0x08,
+0x02,0x80,0x03,0x3C,
+0x84,0x00,0x84,0x35,
+0x00,0x00,0x82,0x8C,
+0x02,0x80,0x08,0x3C,
+0x00,0x00,0xC4,0x8C,
+0x1C,0x5F,0x06,0x8D,
+0x21,0x10,0x00,0x00,
+0x20,0x5F,0x28,0x8D,
+0x24,0x5F,0x29,0x8D,
+0x00,0x00,0x65,0x91,
+0x25,0x10,0x44,0x00,
+0x21,0x10,0x46,0x00,
+0xFB,0xFF,0x04,0x24,
+0x24,0x28,0xA4,0x00,
+0x23,0x40,0x02,0x01,
+0x00,0x00,0x65,0xA1,
+0x04,0x00,0x00,0x11,
+0x01,0x00,0x06,0x24,
+0x80,0x10,0x08,0x00,
+0x21,0x10,0x48,0x00,
+0x80,0x30,0x02,0x00,
+0x01,0x00,0x04,0x24,
+0x8C,0x23,0x00,0x0C,
+0x21,0x28,0x00,0x00,
+0x42,0xB0,0x02,0x3C,
+0x22,0x00,0x03,0x24,
+0x03,0x00,0x42,0x34,
+0x00,0x00,0x43,0xA0,
+0xDF,0x3A,0x00,0x08,
+0x02,0x80,0x06,0x3C,
+0xF0,0xFF,0xBD,0x27,
+0x08,0x00,0xB2,0xAF,
+0x04,0x00,0xB1,0xAF,
+0x00,0x00,0xB0,0xAF,
+0x00,0x40,0x09,0x40,
+0x00,0x68,0x0A,0x40,
+0x00,0x70,0x02,0x40,
+0x00,0x60,0x0B,0x40,
+0x25,0xB0,0x05,0x3C,
+0x18,0x03,0xA7,0x34,
+0x00,0x00,0xE6,0x8C,
+0x01,0x80,0x02,0x3C,
+0x1C,0x03,0xA3,0x34,
+0xC8,0xEC,0x42,0x24,
+0x00,0x00,0x66,0xAC,
+0x00,0x00,0xE2,0xAC,
+0x80,0x00,0x83,0x8C,
+0x7C,0x02,0xA2,0x34,
+0x80,0x02,0xA6,0x34,
+0x84,0x02,0xA7,0x34,
+0x88,0x02,0xA8,0x34,
+0x00,0x00,0x43,0xAC,
+0x00,0x00,0xC9,0xAC,
+0x00,0x00,0xEA,0xAC,
+0x00,0x00,0x0B,0xAD,
+0x74,0x00,0x83,0x8C,
+0x8C,0x02,0xA2,0x34,
+0x90,0x02,0xA7,0x34,
+0x00,0x00,0x43,0xAC,
+0x08,0x00,0x86,0x8C,
+0x94,0x02,0xA8,0x34,
+0x98,0x02,0xA9,0x34,
+0x00,0x00,0xE6,0xAC,
+0x0C,0x00,0x82,0x8C,
+0x9C,0x02,0xA6,0x34,
+0xA0,0x02,0xA7,0x34,
+0x00,0x00,0x02,0xAD,
+0x10,0x00,0x83,0x8C,
+0xA4,0x02,0xA8,0x34,
+0xA8,0x02,0xAA,0x34,
+0x00,0x00,0x23,0xAD,
+0x14,0x00,0x82,0x8C,
+0xAC,0x02,0xA9,0x34,
+0xB0,0x02,0xAB,0x34,
+0x00,0x00,0xC2,0xAC,
+0x18,0x00,0x83,0x8C,
+0xB4,0x02,0xAC,0x34,
+0xB8,0x02,0xAD,0x34,
+0x00,0x00,0xE3,0xAC,
+0x1C,0x00,0x82,0x8C,
+0xBC,0x02,0xA7,0x34,
+0xC0,0x02,0xAE,0x34,
+0x00,0x00,0x02,0xAD,
+0x20,0x00,0x83,0x8C,
+0xC4,0x02,0xA8,0x34,
+0xC8,0x02,0xAF,0x34,
+0x00,0x00,0x43,0xAD,
+0x24,0x00,0x82,0x8C,
+0xCC,0x02,0xAA,0x34,
+0xD0,0x02,0xB0,0x34,
+0x00,0x00,0x22,0xAD,
+0x28,0x00,0x83,0x8C,
+0xD4,0x02,0xA9,0x34,
+0xD8,0x02,0xB1,0x34,
+0x00,0x00,0x63,0xAD,
+0x2C,0x00,0x86,0x8C,
+0x70,0x02,0xAB,0x34,
+0x74,0x02,0xB2,0x34,
+0x00,0x00,0x86,0xAD,
+0x30,0x00,0x82,0x8C,
+0x78,0x02,0xA6,0x34,
+0x6C,0x03,0xAC,0x34,
+0x00,0x00,0xA2,0xAD,
+0x34,0x00,0x83,0x8C,
+0x02,0x80,0x02,0x3C,
+0x00,0x00,0xE3,0xAC,
+0x38,0x00,0x85,0x8C,
+0x28,0xC7,0x47,0x8C,
+0x00,0x00,0xC5,0xAD,
+0x3C,0x00,0x82,0x8C,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x02,0xAD,
+0x40,0x00,0x83,0x8C,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xE3,0xAD,
+0x44,0x00,0x82,0x8C,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x42,0xAD,
+0x48,0x00,0x83,0x8C,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x03,0xAE,
+0x4C,0x00,0x82,0x8C,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x22,0xAD,
+0x50,0x00,0x83,0x8C,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x23,0xAE,
+0x54,0x00,0x82,0x8C,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x62,0xAD,
+0x58,0x00,0x83,0x8C,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x43,0xAE,
+0x5C,0x00,0x82,0x8C,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xC2,0xAC,
+0x21,0x10,0xE0,0x00,
+0x00,0x00,0x82,0xAD,
+0x01,0x00,0xE7,0x24,
+0x21,0x10,0xE0,0x00,
+0x01,0x00,0xE7,0x24,
+0x00,0x00,0x82,0xAD,
+0x9D,0x3B,0x00,0x08,
+0x21,0x10,0xE0,0x00,
+0x01,0x80,0x1B,0x3C,
+0x90,0xEE,0x7B,0x27,
+0x25,0xB0,0x1A,0x3C,
+0x18,0x03,0x5A,0x27,
+0x00,0x00,0x5B,0xAF,
+0x21,0xD8,0xA0,0x03,
+0x82,0xDA,0x1B,0x00,
+0x80,0xDA,0x1B,0x00,
+0x08,0x00,0x7B,0x27,
+0x04,0x00,0x61,0xAF,
+0x08,0x00,0x62,0xAF,
+0x0C,0x00,0x63,0xAF,
+0x10,0x00,0x64,0xAF,
+0x14,0x00,0x65,0xAF,
+0x18,0x00,0x66,0xAF,
+0x1C,0x00,0x67,0xAF,
+0x20,0x00,0x68,0xAF,
+0x24,0x00,0x69,0xAF,
+0x28,0x00,0x6A,0xAF,
+0x2C,0x00,0x6B,0xAF,
+0x30,0x00,0x6C,0xAF,
+0x34,0x00,0x6D,0xAF,
+0x38,0x00,0x6E,0xAF,
+0x3C,0x00,0x6F,0xAF,
+0x12,0x40,0x00,0x00,
+0x10,0x48,0x00,0x00,
+0x00,0x70,0x0A,0x40,
+0x40,0x00,0x70,0xAF,
+0x44,0x00,0x71,0xAF,
+0x48,0x00,0x72,0xAF,
+0x4C,0x00,0x73,0xAF,
+0x50,0x00,0x74,0xAF,
+0x54,0x00,0x75,0xAF,
+0x58,0x00,0x76,0xAF,
+0x5C,0x00,0x77,0xAF,
+0x60,0x00,0x78,0xAF,
+0x64,0x00,0x79,0xAF,
+0x68,0x00,0x7C,0xAF,
+0x6C,0x00,0x7D,0xAF,
+0x70,0x00,0x7E,0xAF,
+0x74,0x00,0x7F,0xAF,
+0x78,0x00,0x68,0xAF,
+0x7C,0x00,0x69,0xAF,
+0x80,0x00,0x6A,0xAF,
+0x00,0x68,0x1A,0x40,
+0x25,0xB0,0x1B,0x3C,
+0x1C,0x03,0x7B,0x37,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x7A,0xAF,
+0x7F,0x00,0x5B,0x33,
+0x30,0x00,0x60,0x13,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x1B,0x3C,
+0x30,0x03,0x7B,0x37,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x7A,0xAF,
+0x00,0x00,0x00,0x00,
+0x21,0xD8,0xA0,0x03,
+0x82,0xDA,0x1B,0x00,
+0x80,0xDA,0x1B,0x00,
+0x08,0x00,0x7B,0x27,
+0x04,0x00,0x61,0xAF,
+0x08,0x00,0x62,0xAF,
+0x0C,0x00,0x63,0xAF,
+0x10,0x00,0x64,0xAF,
+0x14,0x00,0x65,0xAF,
+0x18,0x00,0x66,0xAF,
+0x1C,0x00,0x67,0xAF,
+0x20,0x00,0x68,0xAF,
+0x24,0x00,0x69,0xAF,
+0x28,0x00,0x6A,0xAF,
+0x2C,0x00,0x6B,0xAF,
+0x30,0x00,0x6C,0xAF,
+0x34,0x00,0x6D,0xAF,
+0x38,0x00,0x6E,0xAF,
+0x3C,0x00,0x6F,0xAF,
+0x12,0x40,0x00,0x00,
+0x10,0x48,0x00,0x00,
+0x00,0x70,0x0A,0x40,
+0x40,0x00,0x70,0xAF,
+0x44,0x00,0x71,0xAF,
+0x48,0x00,0x72,0xAF,
+0x4C,0x00,0x73,0xAF,
+0x50,0x00,0x74,0xAF,
+0x54,0x00,0x75,0xAF,
+0x58,0x00,0x76,0xAF,
+0x5C,0x00,0x77,0xAF,
+0x60,0x00,0x78,0xAF,
+0x64,0x00,0x79,0xAF,
+0x68,0x00,0x7C,0xAF,
+0x6C,0x00,0x7D,0xAF,
+0x70,0x00,0x7E,0xAF,
+0x74,0x00,0x7F,0xAF,
+0x78,0x00,0x68,0xAF,
+0x7C,0x00,0x69,0xAF,
+0x80,0x00,0x6A,0xAF,
+0x32,0x3B,0x00,0x08,
+0x21,0x20,0x60,0x03,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x08,0x3C,
+0x20,0x03,0x08,0x35,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x1A,0xAD,
+0x00,0x04,0x5B,0x33,
+0x0A,0x00,0x60,0x13,
+0x00,0x00,0x00,0x00,
+0x01,0x80,0x08,0x3C,
+0x3C,0xD4,0x08,0x25,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x1B,0x3C,
+0x24,0x03,0x7B,0x37,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x68,0xAF,
+0x09,0xF8,0x00,0x01,
+0x00,0x00,0x00,0x00,
+0x00,0x08,0x5B,0x33,
+0x25,0xB0,0x08,0x3C,
+0x28,0x03,0x08,0x35,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x1B,0xAD,
+0x06,0x00,0x60,0x13,
+0x00,0x00,0x00,0x00,
+0x01,0x80,0x08,0x3C,
+0x9C,0xE8,0x08,0x25,
+0x00,0x00,0x00,0x00,
+0x09,0xF8,0x00,0x01,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x1A,0x3C,
+0xBC,0x5E,0x5A,0x27,
+0x04,0x00,0x5B,0x97,
+0x25,0xB0,0x08,0x3C,
+0x30,0x03,0x08,0x35,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x1B,0xAD,
+0x18,0x00,0x60,0x13,
+0x00,0x00,0x00,0x00,
+0x08,0xE4,0x9B,0x27,
+0x00,0x00,0x00,0x00,
+0x04,0x00,0x61,0x8F,
+0xFC,0x03,0x70,0x7B,
+0x7C,0x00,0x62,0x7B,
+0xBC,0x00,0x64,0x7B,
+0xFC,0x00,0x66,0x7B,
+0x3C,0x01,0x68,0x7B,
+0x13,0x00,0x00,0x02,
+0x11,0x00,0x20,0x02,
+0x7C,0x01,0x6A,0x7B,
+0xBC,0x01,0x6C,0x7B,
+0xFC,0x01,0x6E,0x7B,
+0x3C,0x02,0x70,0x7B,
+0x7C,0x02,0x72,0x7B,
+0xBC,0x02,0x74,0x7B,
+0xFC,0x02,0x76,0x7B,
+0x3C,0x03,0x78,0x7B,
+0x7C,0x03,0x7C,0x7B,
+0xBC,0x03,0x7E,0x7B,
+0x80,0x00,0x7B,0x8F,
+0x8F,0x3C,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x21,0xD8,0xA0,0x03,
+0x82,0xDA,0x1B,0x00,
+0x80,0xDA,0x1B,0x00,
+0x08,0x00,0x7B,0x27,
+0x08,0x00,0x5B,0xAF,
+0xFC,0xE7,0x9D,0x27,
+0x00,0x00,0x4A,0x8F,
+0x00,0x00,0x00,0x00,
+0x21,0x00,0x40,0x11,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x08,0x3C,
+0x1C,0x5E,0x08,0x25,
+0x21,0x48,0x00,0x00,
+0x21,0x58,0x00,0x00,
+0x01,0x00,0x6B,0x25,
+0x1A,0x00,0x40,0x11,
+0x24,0x70,0x4B,0x01,
+0x14,0x00,0xC0,0x11,
+0x01,0x00,0x04,0x24,
+0x00,0x00,0x00,0x00,
+0x04,0x00,0x44,0xA3,
+0x26,0x50,0x4B,0x01,
+0x00,0x00,0x4A,0xAF,
+0x80,0x80,0x09,0x00,
+0x21,0x80,0x08,0x02,
+0x00,0x00,0x10,0x8E,
+0x00,0x00,0x00,0x00,
+0x09,0xF8,0x00,0x02,
+0x00,0x00,0x00,0x00,
+0x01,0x80,0x1B,0x3C,
+0x68,0xF1,0x7B,0x27,
+0x25,0xB0,0x1A,0x3C,
+0x18,0x03,0x5A,0x27,
+0x00,0x00,0x5B,0xAF,
+0x02,0x80,0x1A,0x3C,
+0xBC,0x5E,0x5A,0x27,
+0xE1,0xFF,0x00,0x10,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x29,0x25,
+0x40,0x58,0x0B,0x00,
+0x52,0x3C,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x1B,0x3C,
+0xBC,0x5E,0x7B,0x27,
+0x21,0x60,0x00,0x00,
+0x04,0x00,0x6C,0xA7,
+0x08,0x00,0x7A,0x8F,
+0x00,0x00,0x00,0x00,
+0xF8,0xFF,0x5A,0x27,
+0x00,0x00,0x5A,0x8F,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x5A,0x27,
+0x84,0x00,0x44,0x8F,
+0x00,0x00,0x00,0x00,
+0xF9,0xFF,0x80,0x10,
+0x00,0x00,0x00,0x00,
+0x04,0x00,0x41,0x8F,
+0xFC,0x03,0x50,0x7B,
+0x7C,0x00,0x42,0x7B,
+0xBC,0x00,0x44,0x7B,
+0xFC,0x00,0x46,0x7B,
+0x3C,0x01,0x48,0x7B,
+0x13,0x00,0x00,0x02,
+0x11,0x00,0x20,0x02,
+0x7C,0x01,0x4A,0x7B,
+0xBC,0x01,0x4C,0x7B,
+0xFC,0x01,0x4E,0x7B,
+0x3C,0x02,0x50,0x7B,
+0x7C,0x02,0x52,0x7B,
+0xBC,0x02,0x54,0x7B,
+0xFC,0x02,0x56,0x7B,
+0x3C,0x03,0x58,0x7B,
+0x7C,0x03,0x5C,0x7B,
+0xBC,0x03,0x5E,0x7B,
+0x80,0x00,0x5B,0x8F,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x60,0x03,
+0x10,0x00,0x00,0x42,
+0x00,0x60,0x05,0x40,
+0x42,0x28,0x05,0x00,
+0x40,0x28,0x05,0x00,
+0x00,0x60,0x85,0x40,
+0x04,0x00,0x81,0xAC,
+0x08,0x00,0x82,0xAC,
+0x0C,0x00,0x83,0xAC,
+0x20,0x00,0x88,0xAC,
+0x24,0x00,0x89,0xAC,
+0x28,0x00,0x8A,0xAC,
+0x2C,0x00,0x8B,0xAC,
+0x30,0x00,0x8C,0xAC,
+0x34,0x00,0x8D,0xAC,
+0x38,0x00,0x8E,0xAC,
+0x3C,0x00,0x8F,0xAC,
+0x12,0x40,0x00,0x00,
+0x10,0x48,0x00,0x00,
+0x40,0x00,0x90,0xAC,
+0x44,0x00,0x91,0xAC,
+0x48,0x00,0x92,0xAC,
+0x4C,0x00,0x93,0xAC,
+0x50,0x00,0x94,0xAC,
+0x54,0x00,0x95,0xAC,
+0x58,0x00,0x96,0xAC,
+0x5C,0x00,0x97,0xAC,
+0x60,0x00,0x98,0xAC,
+0x64,0x00,0x99,0xAC,
+0x68,0x00,0x9C,0xAC,
+0x6C,0x00,0x9D,0xAC,
+0x70,0x00,0x9E,0xAC,
+0x74,0x00,0x9F,0xAC,
+0x78,0x00,0x88,0xAC,
+0x7C,0x00,0x89,0xAC,
+0x80,0x00,0x9F,0xAC,
+0xF8,0xFF,0x84,0x24,
+0x00,0x00,0x84,0x8C,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x84,0x24,
+0x84,0x00,0x86,0x8C,
+0x00,0x00,0x00,0x00,
+0xF9,0xFF,0xC0,0x10,
+0x00,0x00,0x00,0x00,
+0x21,0xD8,0x80,0x00,
+0x01,0x00,0xBA,0x34,
+0x04,0x00,0x61,0x8F,
+0xFC,0x03,0x70,0x7B,
+0x7C,0x00,0x62,0x7B,
+0xBC,0x00,0x64,0x7B,
+0xFC,0x00,0x66,0x7B,
+0x3C,0x01,0x68,0x7B,
+0x13,0x00,0x00,0x02,
+0x11,0x00,0x20,0x02,
+0x7C,0x01,0x6A,0x7B,
+0xBC,0x01,0x6C,0x7B,
+0xFC,0x01,0x6E,0x7B,
+0x3C,0x02,0x70,0x7B,
+0x7C,0x02,0x72,0x7B,
+0xBC,0x02,0x74,0x7B,
+0xFC,0x02,0x76,0x7B,
+0x3C,0x03,0x78,0x7B,
+0x7C,0x03,0x7C,0x7B,
+0xBC,0x03,0x7E,0x7B,
+0x80,0x00,0x7B,0x8F,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x60,0x03,
+0x00,0x60,0x9A,0x40,
+0x00,0x60,0x05,0x40,
+0x42,0x28,0x05,0x00,
+0x40,0x28,0x05,0x00,
+0x00,0x60,0x85,0x40,
+0x04,0x00,0x81,0xAC,
+0x08,0x00,0x82,0xAC,
+0x0C,0x00,0x83,0xAC,
+0x20,0x00,0x88,0xAC,
+0x24,0x00,0x89,0xAC,
+0x28,0x00,0x8A,0xAC,
+0x2C,0x00,0x8B,0xAC,
+0x30,0x00,0x8C,0xAC,
+0x34,0x00,0x8D,0xAC,
+0x38,0x00,0x8E,0xAC,
+0x3C,0x00,0x8F,0xAC,
+0x12,0x40,0x00,0x00,
+0x10,0x48,0x00,0x00,
+0x40,0x00,0x90,0xAC,
+0x44,0x00,0x91,0xAC,
+0x48,0x00,0x92,0xAC,
+0x4C,0x00,0x93,0xAC,
+0x50,0x00,0x94,0xAC,
+0x54,0x00,0x94,0xAC,
+0x58,0x00,0x96,0xAC,
+0x5C,0x00,0x96,0xAC,
+0x60,0x00,0x98,0xAC,
+0x64,0x00,0x99,0xAC,
+0x68,0x00,0x9C,0xAC,
+0x6C,0x00,0x9D,0xAC,
+0x70,0x00,0x9E,0xAC,
+0x78,0x00,0x88,0xAC,
+0x7C,0x00,0x89,0xAC,
+0x80,0x00,0x9F,0xAC,
+0x84,0x00,0x80,0xAC,
+0xF8,0xFF,0x84,0x24,
+0x00,0x00,0x84,0x8C,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x84,0x24,
+0x84,0x00,0x86,0x8C,
+0xFA,0xFF,0xC0,0x10,
+0x00,0x00,0x00,0x00,
+0x21,0xD8,0x80,0x00,
+0x01,0x00,0xBA,0x24,
+0x04,0x00,0x61,0x8F,
+0xFC,0x03,0x70,0x7B,
+0x7C,0x00,0x62,0x7B,
+0xBC,0x00,0x64,0x7B,
+0xFC,0x00,0x66,0x7B,
+0x3C,0x01,0x68,0x7B,
+0x13,0x00,0x00,0x02,
+0x11,0x00,0x20,0x02,
+0x7C,0x01,0x6A,0x7B,
+0xBC,0x01,0x6C,0x7B,
+0xFC,0x01,0x6E,0x7B,
+0x3C,0x02,0x70,0x7B,
+0x7C,0x02,0x72,0x7B,
+0xBC,0x02,0x74,0x7B,
+0xFC,0x02,0x76,0x7B,
+0x3C,0x03,0x78,0x7B,
+0x7C,0x03,0x7C,0x7B,
+0xBC,0x03,0x7E,0x7B,
+0x80,0x00,0x7B,0x8F,
+0x08,0x00,0x60,0x03,
+0x00,0x60,0x9A,0x40,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x83,0x4E,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x01,0x80,0x1B,0x3C,
+0x00,0x00,0x7B,0x27,
+0x25,0xB0,0x1A,0x3C,
+0x18,0x03,0x5A,0x27,
+0x00,0x00,0x5B,0xAF,
+0x00,0x00,0x05,0x24,
+0x03,0x00,0xA4,0x24,
+0x00,0xA0,0x80,0x40,
+0x00,0xA0,0x84,0x40,
+0x01,0x80,0x04,0x3C,
+0x40,0x00,0x84,0x24,
+0x08,0x00,0x80,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x01,0x80,0x1B,0x3C,
+0x40,0x00,0x7B,0x27,
+0x25,0xB0,0x1A,0x3C,
+0x18,0x03,0x5A,0x27,
+0x00,0x00,0x5B,0xAF,
+0x02,0x80,0x1A,0x3C,
+0x00,0x00,0x5A,0x27,
+0xFC,0x03,0x5D,0x27,
+0x02,0x80,0x1C,0x3C,
+0x00,0x1C,0x9C,0x27,
+0x00,0xF0,0x08,0x3C,
+0x00,0x0C,0x08,0x35,
+0x00,0x60,0x88,0x40,
+0x02,0x80,0x04,0x3C,
+0x00,0x00,0x84,0x24,
+0xFF,0x7F,0x05,0x3C,
+0xFF,0xFF,0xA5,0x34,
+0x24,0x20,0x85,0x00,
+0x00,0x20,0x84,0x4C,
+0xFF,0xFF,0x05,0x34,
+0x21,0x28,0xA4,0x00,
+0x00,0x28,0x85,0x4C,
+0x02,0x80,0x08,0x3C,
+0x00,0x00,0x08,0x25,
+0x00,0x00,0x00,0xAD,
+0x03,0x80,0x09,0x3C,
+0xFC,0xCC,0x29,0x25,
+0x04,0x00,0x08,0x25,
+0xFE,0xFF,0x09,0x15,
+0x00,0x00,0x00,0xAD,
+0x00,0x80,0x04,0x3C,
+0x00,0x00,0x84,0x24,
+0xFF,0x7F,0x05,0x3C,
+0xFF,0xFF,0xA5,0x34,
+0x24,0x20,0x85,0x00,
+0x00,0x00,0x84,0x4C,
+0xFF,0xFF,0x06,0x34,
+0x21,0x30,0xC4,0x00,
+0x24,0x30,0xC5,0x00,
+0x00,0x08,0x86,0x4C,
+0x00,0xA0,0x04,0x40,
+0x10,0x00,0x84,0x34,
+0x00,0xA0,0x84,0x40,
+0x01,0x80,0x1B,0x3C,
+0xEC,0x00,0x7B,0x27,
+0x25,0xB0,0x1A,0x3C,
+0x18,0x03,0x5A,0x27,
+0x00,0x00,0x5B,0xAF,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x04,0x3C,
+0x44,0x00,0x84,0x34,
+0x00,0x00,0x85,0x84,
+0x20,0x00,0x06,0x24,
+0x25,0x28,0xA6,0x00,
+0x00,0x00,0x85,0xA4,
+0x01,0x80,0x1B,0x3C,
+0x1C,0x01,0x7B,0x27,
+0x25,0xB0,0x1A,0x3C,
+0x18,0x03,0x5A,0x27,
+0x00,0x00,0x5B,0xAF,
+0x25,0xB0,0x04,0x3C,
+0x44,0x00,0x84,0x34,
+0x00,0x00,0x85,0x8C,
+0x00,0x00,0x00,0x00,
+0x10,0x00,0xA5,0x30,
+0xFC,0xFF,0xA0,0x10,
+0x00,0x00,0x00,0x00,
+0xFF,0x1F,0x07,0x3C,
+0xFF,0xFF,0xE7,0x34,
+0x02,0x80,0x05,0x3C,
+0xD8,0x5D,0xA5,0x24,
+0xFF,0xFF,0xA5,0x30,
+0x40,0xB0,0x04,0x3C,
+0x25,0x28,0xA4,0x00,
+0x24,0x28,0xA7,0x00,
+0x21,0x30,0x00,0x00,
+0x43,0xB0,0x02,0x3C,
+0x00,0x80,0x04,0x3C,
+0x40,0x00,0x84,0x34,
+0x00,0x00,0x45,0xAC,
+0x04,0x00,0x46,0xAC,
+0x08,0x00,0x44,0xAC,
+0xEA,0x65,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x09,0x00,0x02,0x24,
+0xFF,0xFF,0x42,0x24,
+0xFF,0xFF,0x41,0x04,
+0xFF,0xFF,0x42,0x24,
+0x08,0x00,0xE0,0x03,
+0x01,0x00,0x42,0x24,
+0x00,0x60,0x02,0x40,
+0x01,0x00,0x41,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x82,0xAC,
+0x00,0x00,0x82,0x8C,
+0x00,0x00,0x00,0x00,
+0x21,0x18,0x40,0x00,
+0x00,0x60,0x83,0x40,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x82,0xAC,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x00,0x60,0x81,0x40,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x01,0x80,0x03,0x3C,
+0x25,0xB0,0x02,0x3C,
+0x0C,0x02,0x63,0x24,
+0x18,0x03,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0x04,0x00,0x85,0x8C,
+0x00,0xA0,0x03,0x3C,
+0x01,0x00,0x02,0x24,
+0x25,0x28,0xA3,0x00,
+0x00,0x00,0xA4,0x8C,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x01,0x80,0x03,0x3C,
+0x25,0xB0,0x02,0x3C,
+0x3C,0x02,0x63,0x24,
+0x18,0x03,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0x04,0x00,0x82,0x8C,
+0x02,0x00,0x83,0x94,
+0x00,0xA0,0x07,0x3C,
+0x25,0x28,0x47,0x00,
+0x00,0x00,0xA2,0x8C,
+0x10,0x00,0x02,0x24,
+0x13,0x00,0x62,0x10,
+0x11,0x00,0x66,0x28,
+0x06,0x00,0xC0,0x10,
+0x20,0x00,0x02,0x24,
+0x08,0x00,0x02,0x24,
+0x17,0x00,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x01,0x00,0x02,0x24,
+0xFD,0xFF,0x62,0x14,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x83,0x8C,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xA3,0xAC,
+0x04,0x00,0x82,0x8C,
+0x00,0x00,0x00,0x00,
+0x25,0x10,0x47,0x00,
+0x00,0x00,0x42,0x8C,
+0x08,0x00,0xE0,0x03,
+0x01,0x00,0x02,0x24,
+0x08,0x00,0x82,0x8C,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xA2,0xA4,
+0x04,0x00,0x83,0x8C,
+0x00,0x00,0x00,0x00,
+0x25,0x18,0x67,0x00,
+0x00,0x00,0x62,0x94,
+0x08,0x00,0xE0,0x03,
+0x01,0x00,0x02,0x24,
+0x08,0x00,0x82,0x8C,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xA2,0xA0,
+0x04,0x00,0x83,0x8C,
+0x00,0x00,0x00,0x00,
+0x25,0x18,0x67,0x00,
+0x00,0x00,0x62,0x90,
+0x08,0x00,0xE0,0x03,
+0x01,0x00,0x02,0x24,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x47,0x24,
+0x30,0x37,0xE3,0x90,
+0xFF,0xFF,0xA5,0x30,
+0x09,0x00,0xA3,0x10,
+0x21,0x20,0xC0,0x00,
+0xA0,0x37,0xE2,0x8C,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xC2,0xAC,
+0xAA,0x37,0xE3,0x94,
+0x0E,0x00,0x02,0x24,
+0x14,0x00,0xC2,0xAC,
+0x30,0x09,0x00,0x08,
+0x0C,0x00,0xC3,0xAC,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xE0,0xFF,0xBD,0x27,
+0x14,0x00,0xB1,0xAF,
+0x02,0x80,0x11,0x3C,
+0x1C,0x00,0xBF,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x30,0x1F,0x31,0x26,
+0x88,0x37,0x30,0x96,
+0x02,0x80,0x02,0x3C,
+0x01,0x80,0x03,0x3C,
+0x25,0x80,0x02,0x02,
+0x25,0xB0,0x02,0x3C,
+0x40,0x03,0x63,0x24,
+0x18,0x03,0x42,0x34,
+0x60,0x00,0x04,0x26,
+0x80,0x00,0x05,0x26,
+0x00,0x00,0x43,0xAC,
+0x5F,0x1E,0x00,0x0C,
+0x03,0x00,0x06,0x24,
+0x21,0x20,0x00,0x02,
+0x21,0x28,0x00,0x00,
+0x08,0x52,0x00,0x0C,
+0x08,0x00,0x06,0x24,
+0x88,0x37,0x22,0x8E,
+0x0C,0x00,0x03,0x24,
+0x0C,0x00,0x43,0xAE,
+0x08,0x00,0x42,0xAE,
+0x12,0x00,0x02,0x24,
+0x14,0x00,0x42,0xAE,
+0x21,0x20,0x40,0x02,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x30,0x09,0x00,0x08,
+0x20,0x00,0xBD,0x27,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0xE0,0xFF,0xBD,0x27,
+0x18,0x00,0xB2,0xAF,
+0x1C,0x00,0xBF,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x21,0x30,0x80,0x00,
+0x21,0x90,0x00,0x00,
+0x00,0x60,0x11,0x40,
+0x01,0x00,0x21,0x36,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x0D,0x00,0x83,0x90,
+0x00,0x00,0x00,0x00,
+0x02,0x00,0x60,0x14,
+0x02,0x80,0x02,0x3C,
+0x01,0x00,0x03,0x24,
+0xF8,0x5E,0x43,0xA0,
+0x0C,0x00,0xC2,0x90,
+0x02,0x80,0x05,0x3C,
+0x0D,0x5F,0xA2,0xA0,
+0x00,0x00,0xC4,0x90,
+0x05,0x00,0x02,0x24,
+0xFF,0x00,0x83,0x30,
+0x41,0x00,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0x03,0x00,0x02,0x24,
+0x31,0x00,0x62,0x10,
+0xFF,0x00,0x84,0x30,
+0x09,0x00,0x82,0x2C,
+0x25,0x00,0x40,0x10,
+0x02,0x80,0x10,0x3C,
+0xF4,0x5E,0x02,0x92,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x42,0x30,
+0x21,0x00,0x82,0x10,
+0x00,0x00,0x00,0x00,
+0xB6,0x60,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xF4,0x5E,0x02,0x92,
+0x00,0x00,0x00,0x00,
+0x34,0x00,0x40,0x10,
+0x02,0x80,0x03,0x3C,
+0xE0,0x3A,0x62,0x94,
+0x00,0x00,0x00,0x00,
+0x00,0x01,0x42,0x30,
+0x51,0x00,0x40,0x10,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0x15,0x5F,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x11,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x15,0x5F,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0x15,0x5F,0x62,0xA0,
+0x02,0x80,0x03,0x3C,
+0xF6,0x5E,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x0F,0x00,0x42,0x30,
+0x04,0x00,0x42,0x28,
+0x06,0x00,0x40,0x10,
+0x04,0x00,0x04,0x24,
+0x64,0x31,0x00,0x0C,
+0x01,0x00,0x05,0x24,
+0x40,0x41,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x04,0x00,0x12,0x24,
+0x00,0x60,0x91,0x40,
+0x21,0x10,0x40,0x02,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x0B,0x00,0xC2,0x90,
+0x00,0x00,0x00,0x00,
+0x03,0x00,0x40,0x14,
+0x02,0x80,0x03,0x3C,
+0x02,0x80,0x03,0x3C,
+0x01,0x00,0x02,0x24,
+0x10,0x5F,0x62,0xA0,
+0x10,0x5F,0x63,0x90,
+0x02,0x80,0x02,0x3C,
+0x11,0x5F,0x43,0xA0,
+0x00,0x00,0xC4,0x90,
+0x18,0x41,0x00,0x08,
+0xFF,0x00,0x84,0x30,
+0x0D,0x5F,0xA0,0xA0,
+0x00,0x00,0xC4,0x90,
+0x15,0x41,0x00,0x08,
+0xFF,0x00,0x83,0x30,
+0x42,0xB0,0x06,0x3C,
+0x00,0x00,0xC3,0x90,
+0xEF,0xFF,0x02,0x24,
+0x03,0x00,0xC7,0x34,
+0x24,0x18,0x62,0x00,
+0x40,0x00,0x02,0x24,
+0x00,0x00,0xC3,0xA0,
+0x0C,0x00,0x04,0x24,
+0x00,0x00,0xE2,0xA0,
+0x64,0x31,0x00,0x0C,
+0x01,0x00,0x05,0x24,
+0x02,0x80,0x03,0x3C,
+0xDE,0x5D,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x02,0x00,0x42,0x30,
+0x15,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x00,0x08,0x04,0x24,
+0x00,0x02,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x01,0x00,0x06,0x24,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x42,0x24,
+0x2A,0x1C,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0xCD,0xFF,0x60,0x10,
+0x00,0x00,0x00,0x00,
+0x50,0x39,0x44,0x94,
+0x2A,0x1C,0x40,0xA0,
+0x00,0xC0,0x84,0x24,
+0xC2,0x34,0x00,0x0C,
+0xFF,0xFF,0x84,0x30,
+0x40,0x41,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x15,0x5F,0x40,0xA0,
+0x40,0x41,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x9B,0x30,0x00,0x0C,
+0x01,0x00,0x04,0x24,
+0x6B,0x41,0x00,0x08,
+0x00,0x08,0x04,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0xE0,0xFF,0xBD,0x27,
+0x14,0x00,0xB1,0xAF,
+0x02,0x80,0x11,0x3C,
+0x10,0x00,0xB0,0xAF,
+0x30,0x1F,0x30,0x26,
+0xB0,0x1B,0x07,0x96,
+0x18,0x00,0xBF,0xAF,
+0xFF,0xFF,0xE3,0x30,
+0x00,0x01,0x62,0x30,
+0x0E,0x00,0x40,0x10,
+0x01,0x00,0x66,0x30,
+0x02,0x80,0x04,0x3C,
+0x88,0x58,0x84,0x24,
+0x03,0x00,0x05,0x24,
+0x17,0x00,0xC0,0x14,
+0x04,0x00,0x62,0x30,
+0x02,0x00,0x40,0x10,
+0xFB,0xF6,0xE3,0x30,
+0xB0,0x1B,0x03,0xA6,
+0xA3,0x51,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x02,0x3C,
+0x4C,0x00,0x42,0x34,
+0x00,0x00,0x40,0xA0,
+0x21,0x20,0x00,0x00,
+0x12,0x0D,0x00,0x0C,
+0x21,0x28,0x00,0x00,
+0x30,0x1F,0x23,0x26,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x10,0x00,0x00,
+0x20,0x00,0xBD,0x27,
+0x10,0x3E,0x60,0xAC,
+0xEC,0x38,0x60,0xAC,
+0x08,0x39,0x60,0xAC,
+0x08,0x00,0xE0,0x03,
+0x50,0x3E,0x60,0xAC,
+0x6C,0x4C,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xB0,0x1B,0x02,0x96,
+0x00,0x00,0x00,0x00,
+0xFE,0xFE,0x42,0x30,
+0xA3,0x51,0x00,0x0C,
+0xB0,0x1B,0x02,0xA6,
+0x25,0xB0,0x02,0x3C,
+0x4C,0x00,0x42,0x34,
+0x00,0x00,0x40,0xA0,
+0x9D,0x41,0x00,0x08,
+0x21,0x20,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0xE8,0xFF,0xBD,0x27,
+0x10,0x00,0xBF,0xAF,
+0x01,0x00,0x83,0x90,
+0x02,0x80,0x02,0x3C,
+0x21,0x38,0x80,0x00,
+0xB0,0x5C,0x43,0xAC,
+0x01,0x00,0x84,0x90,
+0x00,0x00,0xE2,0x90,
+0x02,0x80,0x06,0x3C,
+0xFF,0x00,0x85,0x30,
+0x80,0x10,0x02,0x00,
+0x25,0x28,0xA2,0x00,
+0xE8,0xDD,0xC6,0x24,
+0xFF,0x00,0x84,0x30,
+0x00,0x80,0xA5,0x34,
+0x4E,0x23,0x00,0x0C,
+0x03,0x00,0xE7,0x24,
+0x10,0x00,0xBF,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0xE0,0xFF,0xBD,0x27,
+0x18,0x00,0xB0,0xAF,
+0x02,0x80,0x03,0x3C,
+0x1C,0x00,0xBF,0xAF,
+0xE0,0x3A,0x62,0x94,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x43,0x30,
+0x00,0x01,0x42,0x30,
+0x04,0x00,0x40,0x10,
+0x21,0x80,0x80,0x00,
+0x02,0x80,0x04,0x3C,
+0x06,0x00,0x60,0x14,
+0xE0,0xD7,0x84,0x24,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x2F,0x55,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x06,0x00,0x07,0x92,
+0x07,0x00,0x02,0x26,
+0x21,0x20,0x00,0x02,
+0x80,0x38,0x07,0x00,
+0x00,0x80,0xE7,0x34,
+0x05,0x00,0x05,0x24,
+0x21,0x30,0x00,0x00,
+0x1E,0x51,0x00,0x0C,
+0x10,0x00,0xA2,0xAF,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x01,0x00,0x02,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x01,0x00,0x02,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x01,0x00,0x02,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x01,0x00,0x02,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x01,0x00,0x02,0x24,
+0x08,0x00,0xE0,0x03,
+0x01,0x00,0x02,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x01,0x00,0x02,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0xE8,0xFF,0xBD,0x27,
+0x02,0x80,0x02,0x3C,
+0x10,0x00,0xB0,0xAF,
+0x14,0x00,0xBF,0xAF,
+0x30,0x1F,0x45,0x24,
+0x50,0x3E,0xA3,0x8C,
+0x00,0x00,0x00,0x00,
+0x06,0x00,0x60,0x14,
+0x21,0x80,0x80,0x00,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x4C,0x3E,0xA2,0x90,
+0x00,0x00,0x00,0x00,
+0x21,0x10,0x45,0x00,
+0x44,0x3E,0x40,0xA0,
+0x00,0x00,0x84,0x8C,
+0x6D,0x1D,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x06,0x8E,
+0x03,0x00,0x04,0x24,
+0x90,0x14,0x00,0x0C,
+0x21,0x28,0x00,0x00,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x00,0x00,0x84,0x90,
+0x4F,0x0C,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0xE0,0xFF,0xBD,0x27,
+0x18,0x00,0xBF,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x00,0x00,0x86,0x90,
+0x21,0x80,0x80,0x00,
+0x00,0x7F,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x08,0x0E,0x04,0x24,
+0x00,0x00,0x05,0x92,
+0x7F,0x7F,0x11,0x3C,
+0x00,0x0E,0x04,0x24,
+0x00,0x14,0x05,0x00,
+0x00,0x86,0x05,0x00,
+0x00,0x1A,0x05,0x00,
+0x25,0x80,0x02,0x02,
+0x25,0x80,0x03,0x02,
+0x25,0x80,0x05,0x02,
+0x21,0x30,0x00,0x02,
+0xA9,0x45,0x00,0x0C,
+0x7F,0x7F,0x25,0x36,
+0x7F,0x7F,0x25,0x36,
+0x21,0x30,0x00,0x02,
+0xA9,0x45,0x00,0x0C,
+0x04,0x0E,0x04,0x24,
+0x7F,0x7F,0x25,0x36,
+0x21,0x30,0x00,0x02,
+0xA9,0x45,0x00,0x0C,
+0x10,0x0E,0x04,0x24,
+0x7F,0x7F,0x25,0x36,
+0x21,0x30,0x00,0x02,
+0xA9,0x45,0x00,0x0C,
+0x14,0x0E,0x04,0x24,
+0x7F,0x7F,0x25,0x36,
+0x21,0x30,0x00,0x02,
+0xA9,0x45,0x00,0x0C,
+0x18,0x0E,0x04,0x24,
+0x7F,0x7F,0x25,0x36,
+0x21,0x30,0x00,0x02,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x1C,0x0E,0x04,0x24,
+0xA9,0x45,0x00,0x08,
+0x20,0x00,0xBD,0x27,
+0xD0,0xFF,0xBD,0x27,
+0x24,0x00,0xB3,0xAF,
+0x20,0x00,0xB2,0xAF,
+0x1C,0x00,0xB1,0xAF,
+0x18,0x00,0xB0,0xAF,
+0x28,0x00,0xBF,0xAF,
+0x00,0x00,0x85,0x94,
+0x02,0x00,0x02,0x24,
+0x21,0x98,0x80,0x00,
+0x10,0x00,0xA0,0xA3,
+0x21,0x80,0x00,0x00,
+0x21,0x30,0x00,0x00,
+0x21,0x88,0x00,0x00,
+0x66,0x00,0xA2,0x10,
+0x10,0x00,0xB2,0x27,
+0x03,0x00,0xA2,0x28,
+0x26,0x00,0x40,0x14,
+0x01,0x00,0x02,0x24,
+0x03,0x00,0x02,0x24,
+0x75,0x00,0xA2,0x10,
+0x24,0x08,0x04,0x24,
+0x0C,0x09,0x04,0x24,
+0xA9,0x45,0x00,0x0C,
+0xFF,0xFF,0x05,0x24,
+0x04,0x08,0x04,0x24,
+0x21,0x30,0x00,0x02,
+0xA9,0x45,0x00,0x0C,
+0x0F,0x00,0x05,0x24,
+0x02,0x00,0x64,0x96,
+0x02,0x00,0x02,0x24,
+0x35,0x00,0x82,0x10,
+0x03,0x00,0x82,0x28,
+0x4B,0x00,0x40,0x10,
+0x03,0x00,0x02,0x24,
+0x01,0x00,0x02,0x24,
+0x60,0x00,0x82,0x10,
+0x21,0x30,0x20,0x02,
+0x04,0x0C,0x04,0x24,
+0xA9,0x45,0x00,0x0C,
+0x0F,0x00,0x05,0x24,
+0x21,0x30,0x20,0x02,
+0x04,0x0D,0x04,0x24,
+0xA9,0x45,0x00,0x0C,
+0x0F,0x00,0x05,0x24,
+0x10,0x00,0xA6,0x93,
+0x04,0x0A,0x04,0x24,
+0xA9,0x45,0x00,0x0C,
+0x00,0xFF,0x05,0x3C,
+0x28,0x00,0xBF,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x30,0x00,0xBD,0x27,
+0xDE,0xFF,0xA2,0x14,
+0x0C,0x09,0x04,0x24,
+0x24,0x08,0x04,0x24,
+0x0E,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x02,0x00,0x06,0x24,
+0x2C,0x08,0x04,0x24,
+0x01,0x00,0x06,0x24,
+0xA9,0x45,0x00,0x0C,
+0x0E,0x00,0x05,0x24,
+0x10,0x00,0xA2,0x93,
+0x80,0xFF,0x03,0x24,
+0x11,0x11,0x04,0x3C,
+0x0F,0x00,0x42,0x30,
+0x25,0x10,0x43,0x00,
+0x11,0x11,0x86,0x34,
+0x03,0x00,0x10,0x24,
+0x10,0x00,0xA2,0xA3,
+0x0C,0x09,0x04,0x24,
+0xA9,0x45,0x00,0x0C,
+0xFF,0xFF,0x05,0x24,
+0x04,0x08,0x04,0x24,
+0x21,0x30,0x00,0x02,
+0xA9,0x45,0x00,0x0C,
+0x0F,0x00,0x05,0x24,
+0x02,0x00,0x64,0x96,
+0x02,0x00,0x02,0x24,
+0xCD,0xFF,0x82,0x14,
+0x03,0x00,0x82,0x28,
+0x00,0x00,0x42,0x92,
+0x02,0x00,0x11,0x24,
+0xF5,0x00,0x42,0x30,
+0x05,0x00,0x42,0x34,
+0x00,0x00,0x42,0xA2,
+0x21,0x30,0x20,0x02,
+0x04,0x0C,0x04,0x24,
+0xA9,0x45,0x00,0x0C,
+0x0F,0x00,0x05,0x24,
+0x21,0x30,0x20,0x02,
+0x04,0x0D,0x04,0x24,
+0xA9,0x45,0x00,0x0C,
+0x0F,0x00,0x05,0x24,
+0x10,0x00,0xA6,0x93,
+0x04,0x0A,0x04,0x24,
+0xA9,0x45,0x00,0x0C,
+0x00,0xFF,0x05,0x3C,
+0x28,0x00,0xBF,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x30,0x00,0xBD,0x27,
+0xB8,0xFF,0x82,0x14,
+0x21,0x30,0x20,0x02,
+0x00,0x00,0x42,0x92,
+0x03,0x00,0x11,0x24,
+0xF0,0x00,0x42,0x30,
+0x01,0x00,0x42,0x34,
+0xD4,0x42,0x00,0x08,
+0x00,0x00,0x42,0xA2,
+0x24,0x08,0x04,0x24,
+0x0E,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x01,0x00,0x06,0x24,
+0x02,0x00,0x06,0x24,
+0x2C,0x08,0x04,0x24,
+0xA9,0x45,0x00,0x0C,
+0x0E,0x00,0x05,0x24,
+0x10,0x00,0xA2,0x93,
+0x22,0x22,0x03,0x3C,
+0x22,0x22,0x66,0x34,
+0x0F,0x00,0x42,0x30,
+0x40,0x00,0x42,0x34,
+0x03,0x00,0x10,0x24,
+0xC4,0x42,0x00,0x08,
+0x10,0x00,0xA2,0xA3,
+0x00,0x00,0x42,0x92,
+0x01,0x00,0x11,0x24,
+0xF0,0x00,0x42,0x30,
+0xD4,0x42,0x00,0x08,
+0x00,0x00,0x42,0xA2,
+0x0E,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x02,0x00,0x06,0x24,
+0x02,0x00,0x06,0x24,
+0x2C,0x08,0x04,0x24,
+0xA9,0x45,0x00,0x0C,
+0x0E,0x00,0x05,0x24,
+0x10,0x00,0xA2,0x93,
+0xC0,0xFF,0x03,0x24,
+0x03,0x00,0x10,0x24,
+0x0F,0x00,0x42,0x30,
+0x25,0x10,0x43,0x00,
+0x32,0x03,0x03,0x3C,
+0x33,0x13,0x66,0x34,
+0x90,0x42,0x00,0x08,
+0x10,0x00,0xA2,0xA3,
+0x00,0x00,0x86,0x8C,
+0x00,0x0F,0x05,0x3C,
+0xA9,0x45,0x00,0x08,
+0x80,0x08,0x04,0x24,
+0xE8,0xFF,0xBD,0x27,
+0x10,0x00,0xB0,0xAF,
+0x21,0x80,0x80,0x00,
+0x02,0x80,0x04,0x3C,
+0x14,0x00,0xBF,0xAF,
+0x2F,0x55,0x00,0x0C,
+0xF0,0xD7,0x84,0x24,
+0x00,0x00,0x02,0x92,
+0x00,0x0D,0x04,0x24,
+0x00,0x10,0x05,0x3C,
+0x21,0x00,0x40,0x10,
+0x21,0x30,0x00,0x00,
+0x00,0x08,0x04,0x24,
+0xCB,0x45,0x00,0x0C,
+0x00,0x02,0x05,0x3C,
+0x00,0x08,0x04,0x24,
+0x00,0x02,0x05,0x3C,
+0x32,0x00,0x40,0x10,
+0x01,0x00,0x06,0x24,
+0x00,0x0A,0x04,0x24,
+0x03,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x00,0x0A,0x04,0x24,
+0x08,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x01,0x00,0x06,0x24,
+0x00,0x0D,0x04,0x24,
+0x00,0x10,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x00,0x0D,0x04,0x24,
+0x00,0x20,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x01,0x00,0x06,0x24,
+0x00,0x0D,0x04,0x24,
+0x00,0x40,0x05,0x3C,
+0x21,0x30,0x00,0x00,
+0xA9,0x45,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0xA9,0x45,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x00,0x0D,0x04,0x24,
+0x00,0x20,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x00,0x40,0x05,0x3C,
+0x21,0x30,0x00,0x00,
+0xA9,0x45,0x00,0x0C,
+0x00,0x0D,0x04,0x24,
+0x54,0x22,0x00,0x0C,
+0x10,0x27,0x04,0x24,
+0x00,0x0F,0x04,0x24,
+0x00,0x01,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x00,0x0F,0x04,0x24,
+0x00,0x01,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x01,0x00,0x06,0x24,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0xA9,0x45,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x00,0x0A,0x04,0x24,
+0x03,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x00,0x0A,0x04,0x24,
+0x08,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x01,0x00,0x06,0x24,
+0x00,0x0D,0x04,0x24,
+0x00,0x10,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x00,0x0D,0x04,0x24,
+0x00,0x20,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x01,0x00,0x06,0x24,
+0x00,0x0D,0x04,0x24,
+0x00,0x40,0x05,0x3C,
+0x3E,0x43,0x00,0x08,
+0x21,0x30,0x00,0x00,
+0xE0,0xFF,0xBD,0x27,
+0x10,0x00,0xB0,0xAF,
+0x21,0x80,0x80,0x00,
+0x02,0x80,0x04,0x3C,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x1C,0x00,0xBF,0xAF,
+0x2F,0x55,0x00,0x0C,
+0x08,0xD8,0x84,0x24,
+0x00,0x00,0x02,0x92,
+0x0F,0x00,0x12,0x3C,
+0x0F,0x00,0x11,0x3C,
+0x00,0x08,0x04,0x24,
+0x00,0x01,0x05,0x3C,
+0x20,0x00,0x40,0x10,
+0x21,0x30,0x00,0x00,
+0xA9,0x45,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x00,0x02,0x05,0x3C,
+0x21,0x30,0x00,0x00,
+0xA9,0x45,0x00,0x0C,
+0x00,0x08,0x04,0x24,
+0x01,0x00,0x04,0x92,
+0xE6,0x44,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x0D,0x00,0x06,0x3C,
+0xFF,0xFF,0x45,0x36,
+0x00,0x40,0xC6,0x34,
+0x5F,0x47,0x00,0x0C,
+0x21,0x00,0x04,0x24,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0xE6,0x44,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0x02,0x00,0x06,0x3C,
+0xFF,0xFF,0x45,0x36,
+0x1F,0x00,0xC6,0x34,
+0x5F,0x47,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0xA9,0x45,0x00,0x0C,
+0x01,0x00,0x06,0x24,
+0x00,0x02,0x05,0x3C,
+0x01,0x00,0x06,0x24,
+0xA9,0x45,0x00,0x0C,
+0x00,0x08,0x04,0x24,
+0x01,0x00,0x04,0x92,
+0xE6,0x44,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x05,0x00,0x06,0x3C,
+0xFF,0xFF,0x25,0x36,
+0x00,0x40,0xC6,0x34,
+0x5F,0x47,0x00,0x0C,
+0x21,0x00,0x04,0x24,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0xFF,0xFF,0x25,0x36,
+0x21,0x20,0x00,0x00,
+0x5F,0x47,0x00,0x0C,
+0x03,0x00,0x06,0x3C,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0xE8,0xFF,0xBD,0x27,
+0x10,0x00,0xB0,0xAF,
+0x21,0x80,0x80,0x00,
+0x02,0x80,0x04,0x3C,
+0x14,0x00,0xBF,0xAF,
+0x2F,0x55,0x00,0x0C,
+0x20,0xD8,0x84,0x24,
+0x00,0x00,0x02,0x92,
+0x00,0x00,0x00,0x00,
+0x0A,0x00,0x40,0x10,
+0x00,0x0A,0x04,0x24,
+0x04,0x00,0x02,0x8E,
+0x00,0x08,0x04,0x24,
+0x04,0x00,0x42,0x2C,
+0x1C,0x00,0x40,0x14,
+0x00,0x01,0x05,0x3C,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x04,0x00,0x02,0x8E,
+0x03,0x00,0x05,0x24,
+0x04,0x00,0x42,0x2C,
+0xF8,0xFF,0x40,0x10,
+0x21,0x30,0x00,0x00,
+0xA9,0x45,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x00,0x0A,0x04,0x24,
+0x08,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x01,0x00,0x06,0x24,
+0x00,0x0F,0x04,0x24,
+0x00,0x01,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x00,0x0F,0x04,0x24,
+0x00,0x01,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x01,0x00,0x06,0x24,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0xCB,0x45,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x00,0x08,0x04,0x24,
+0x00,0x01,0x05,0x3C,
+0x1B,0x00,0x40,0x10,
+0x01,0x00,0x06,0x24,
+0x00,0x0D,0x04,0x24,
+0x00,0x10,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x00,0x0D,0x04,0x24,
+0x00,0x20,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x00,0x0D,0x04,0x24,
+0x00,0x40,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x00,0x0A,0x04,0x24,
+0x03,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x02,0x00,0x06,0x24,
+0x00,0x0A,0x04,0x24,
+0x08,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x00,0x0A,0x04,0x24,
+0x00,0x30,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0xE4,0x43,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0xA9,0x45,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xEF,0x43,0x00,0x08,
+0x00,0x0D,0x04,0x24,
+0xE8,0xFF,0xBD,0x27,
+0x10,0x00,0xB0,0xAF,
+0x21,0x80,0x80,0x00,
+0x02,0x80,0x04,0x3C,
+0x14,0x00,0xBF,0xAF,
+0x2F,0x55,0x00,0x0C,
+0x40,0xD8,0x84,0x24,
+0x04,0x00,0x03,0x8E,
+0x00,0x00,0x00,0x00,
+0x04,0x00,0x62,0x2C,
+0x2C,0x00,0x40,0x14,
+0xFC,0xFF,0x62,0x24,
+0x18,0x00,0x42,0x2C,
+0x05,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x02,0x80,0x04,0x3C,
+0x2F,0x55,0x00,0x0C,
+0x6C,0xD8,0x84,0x24,
+0x00,0x00,0x02,0x92,
+0x00,0x00,0x00,0x00,
+0x54,0x00,0x40,0x10,
+0x00,0x0D,0x04,0x24,
+0x00,0x08,0x04,0x24,
+0xCB,0x45,0x00,0x0C,
+0x00,0x02,0x05,0x3C,
+0x63,0x00,0x40,0x10,
+0x00,0x08,0x04,0x24,
+0x00,0x0A,0x04,0x24,
+0x03,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x00,0x0A,0x04,0x24,
+0x08,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x01,0x00,0x06,0x24,
+0x00,0x0D,0x04,0x24,
+0x00,0x10,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x01,0x00,0x06,0x24,
+0x00,0x0D,0x04,0x24,
+0x00,0x20,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x00,0x0D,0x04,0x24,
+0x00,0x40,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x02,0x80,0x04,0x3C,
+0x2F,0x55,0x00,0x0C,
+0x58,0xD8,0x84,0x24,
+0x00,0x00,0x02,0x92,
+0x00,0x00,0x00,0x00,
+0x21,0x00,0x40,0x10,
+0x00,0x0A,0x04,0x24,
+0x00,0x08,0x04,0x24,
+0xCB,0x45,0x00,0x0C,
+0x00,0x01,0x05,0x3C,
+0x3A,0x00,0x40,0x10,
+0x00,0x08,0x04,0x24,
+0x00,0x0D,0x04,0x24,
+0x00,0x10,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x00,0x0D,0x04,0x24,
+0x00,0x20,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x00,0x0D,0x04,0x24,
+0x00,0x40,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x04,0x00,0x06,0x8E,
+0x00,0x0A,0x04,0x24,
+0xA9,0x45,0x00,0x0C,
+0x00,0x30,0x05,0x24,
+0x00,0x0A,0x04,0x24,
+0x03,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x02,0x00,0x06,0x24,
+0x00,0x0A,0x04,0x24,
+0x08,0x00,0x05,0x24,
+0x01,0x00,0x06,0x24,
+0xA9,0x45,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x3F,0x44,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x03,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x00,0x0A,0x04,0x24,
+0x08,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x01,0x00,0x06,0x24,
+0x00,0x0F,0x04,0x24,
+0x00,0x01,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x00,0x0F,0x04,0x24,
+0x00,0x01,0x05,0x24,
+0x66,0x44,0x00,0x08,
+0x01,0x00,0x06,0x24,
+0x00,0x10,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x00,0x0D,0x04,0x24,
+0x00,0x20,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x00,0x40,0x05,0x3C,
+0x21,0x30,0x00,0x00,
+0xA9,0x45,0x00,0x0C,
+0x00,0x0D,0x04,0x24,
+0x54,0x22,0x00,0x0C,
+0x10,0x27,0x04,0x24,
+0x72,0x44,0x00,0x08,
+0x00,0x0F,0x04,0x24,
+0x00,0x01,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x01,0x00,0x06,0x24,
+0x50,0x44,0x00,0x08,
+0x00,0x0D,0x04,0x24,
+0x00,0x02,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x01,0x00,0x06,0x24,
+0x2C,0x44,0x00,0x08,
+0x00,0x0A,0x04,0x24,
+0xE8,0xFF,0xBD,0x27,
+0x25,0xB0,0x02,0x3C,
+0x14,0x00,0xBF,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x03,0x02,0x42,0x34,
+0x00,0x00,0x43,0x90,
+0x00,0x00,0x90,0x90,
+0x25,0xB0,0x02,0x3C,
+0xFF,0x00,0x63,0x30,
+0xFB,0x00,0x65,0x30,
+0x00,0x00,0x04,0x3A,
+0x04,0x00,0x63,0x34,
+0x0B,0x18,0xA4,0x00,
+0x03,0x02,0x42,0x34,
+0x00,0x00,0x43,0xA0,
+0x12,0x00,0x00,0x12,
+0x01,0x00,0x02,0x24,
+0x22,0x00,0x02,0x12,
+0x00,0x08,0x04,0x24,
+0x1A,0x00,0x00,0x12,
+0x01,0x00,0x02,0x24,
+0x08,0x00,0x02,0x16,
+0x00,0x00,0x00,0x00,
+0xE6,0x44,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0x18,0x00,0x04,0x24,
+0x00,0x0C,0x05,0x24,
+0x21,0x30,0x00,0x00,
+0x5F,0x47,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x00,0x08,0x04,0x24,
+0x01,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x00,0x09,0x04,0x24,
+0x01,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x84,0x08,0x04,0x24,
+0xFF,0xFF,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x58,0x00,0x06,0x24,
+0xE6,0x44,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0x18,0x00,0x04,0x24,
+0x00,0x0C,0x05,0x24,
+0xAE,0x44,0x00,0x08,
+0x01,0x00,0x06,0x24,
+0x01,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x01,0x00,0x06,0x24,
+0x00,0x09,0x04,0x24,
+0x01,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x01,0x00,0x06,0x24,
+0x00,0x0A,0x04,0x24,
+0x10,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x00,0x0D,0x04,0x24,
+0x00,0x0C,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x84,0x08,0x04,0x24,
+0xFF,0xFF,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x18,0x00,0x06,0x24,
+0xA5,0x44,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x02,0x3C,
+0x21,0x20,0x82,0x00,
+0x00,0x00,0x85,0xAC,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFC,0xFF,0x60,0x14,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x05,0x3C,
+0x01,0x80,0x03,0x3C,
+0x21,0x38,0x80,0x00,
+0x18,0x03,0xA2,0x34,
+0x98,0x13,0x63,0x24,
+0x01,0x00,0x04,0x24,
+0x00,0x00,0x43,0xAC,
+0x35,0x00,0xE4,0x10,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x10,
+0x20,0x08,0xA2,0x34,
+0x02,0x00,0x02,0x24,
+0x83,0x00,0xE2,0x10,
+0x03,0x00,0x02,0x24,
+0x5A,0x00,0xE2,0x10,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x03,0x3C,
+0x00,0x00,0x44,0x8C,
+0x30,0x1F,0x66,0x24,
+0x70,0x08,0x02,0x24,
+0xE0,0x08,0x03,0x24,
+0x34,0x1C,0xC2,0xAC,
+0x40,0x08,0x02,0x24,
+0x38,0x1C,0xC3,0xAC,
+0x44,0x1C,0xC2,0xAC,
+0x78,0x08,0x03,0x24,
+0x0C,0x08,0x02,0x24,
+0x48,0x1C,0xC3,0xAC,
+0x4C,0x1C,0xC2,0xAC,
+0x10,0x08,0x03,0x24,
+0x20,0x08,0x02,0x24,
+0x50,0x1C,0xC3,0xAC,
+0x54,0x1C,0xC2,0xAC,
+0x24,0x08,0x03,0x24,
+0x58,0x08,0x02,0x24,
+0x58,0x1C,0xC3,0xAC,
+0x5C,0x1C,0xC2,0xAC,
+0x50,0x0C,0x03,0x24,
+0x54,0x0C,0x02,0x24,
+0x60,0x1C,0xC3,0xAC,
+0x64,0x1C,0xC2,0xAC,
+0x14,0x0C,0x03,0x24,
+0x10,0x0C,0x02,0x24,
+0x60,0x08,0x05,0x24,
+0x68,0x1C,0xC3,0xAC,
+0x6C,0x1C,0xC2,0xAC,
+0x80,0x0C,0x03,0x24,
+0x84,0x0C,0x02,0x24,
+0x00,0x01,0x84,0x30,
+0x74,0x1C,0xC2,0xAC,
+0x40,0x1C,0xC5,0xAC,
+0x70,0x1C,0xC3,0xAC,
+0x31,0x1C,0xC0,0xA0,
+0x3C,0x1C,0xC5,0xAC,
+0x02,0x00,0x80,0x10,
+0xA0,0x08,0x02,0x24,
+0xB8,0x08,0x02,0x24,
+0x08,0x00,0xE0,0x03,
+0x78,0x1C,0xC2,0xAC,
+0x28,0x08,0xA2,0x34,
+0x02,0x80,0x03,0x3C,
+0x00,0x00,0x44,0x8C,
+0x30,0x1F,0x66,0x24,
+0x70,0x08,0x02,0x24,
+0xE0,0x08,0x03,0x24,
+0x34,0x1C,0xC2,0xAC,
+0x44,0x08,0x02,0x24,
+0x38,0x1C,0xC3,0xAC,
+0x44,0x1C,0xC2,0xAC,
+0x78,0x08,0x03,0x24,
+0x0C,0x08,0x02,0x24,
+0x48,0x1C,0xC3,0xAC,
+0x4C,0x1C,0xC2,0xAC,
+0x14,0x08,0x03,0x24,
+0x28,0x08,0x02,0x24,
+0x50,0x1C,0xC3,0xAC,
+0x54,0x1C,0xC2,0xAC,
+0x2C,0x08,0x03,0x24,
+0x58,0x08,0x02,0x24,
+0x58,0x1C,0xC3,0xAC,
+0x5C,0x1C,0xC2,0xAC,
+0x58,0x0C,0x03,0x24,
+0x5C,0x0C,0x02,0x24,
+0x60,0x1C,0xC3,0xAC,
+0x64,0x1C,0xC2,0xAC,
+0x1C,0x0C,0x03,0x24,
+0x18,0x0C,0x02,0x24,
+0x64,0x08,0x05,0x24,
+0x68,0x1C,0xC3,0xAC,
+0x6C,0x1C,0xC2,0xAC,
+0x88,0x0C,0x03,0x24,
+0x8C,0x0C,0x02,0x24,
+0x00,0x01,0x84,0x30,
+0x74,0x1C,0xC2,0xAC,
+0x31,0x1C,0xC7,0xA0,
+0x40,0x1C,0xC5,0xAC,
+0x70,0x1C,0xC3,0xAC,
+0x3C,0x1C,0xC5,0xAC,
+0xD6,0xFF,0x80,0x10,
+0xA4,0x08,0x02,0x24,
+0xBC,0x08,0x02,0x24,
+0x08,0x00,0xE0,0x03,
+0x78,0x1C,0xC2,0xAC,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x42,0x24,
+0xAC,0x08,0x03,0x24,
+0x78,0x1C,0x43,0xAC,
+0x74,0x08,0x03,0x24,
+0xE4,0x08,0x04,0x24,
+0x34,0x1C,0x43,0xAC,
+0x4C,0x08,0x03,0x24,
+0x38,0x1C,0x44,0xAC,
+0x44,0x1C,0x43,0xAC,
+0x7C,0x08,0x04,0x24,
+0x0C,0x08,0x03,0x24,
+0x48,0x1C,0x44,0xAC,
+0x4C,0x1C,0x43,0xAC,
+0x1C,0x08,0x04,0x24,
+0x38,0x08,0x03,0x24,
+0x50,0x1C,0x44,0xAC,
+0x54,0x1C,0x43,0xAC,
+0x3C,0x08,0x04,0x24,
+0x5C,0x08,0x03,0x24,
+0x58,0x1C,0x44,0xAC,
+0x5C,0x1C,0x43,0xAC,
+0x68,0x0C,0x04,0x24,
+0x6C,0x0C,0x03,0x24,
+0x60,0x1C,0x44,0xAC,
+0x64,0x1C,0x43,0xAC,
+0x2C,0x0C,0x04,0x24,
+0x28,0x0C,0x03,0x24,
+0x6C,0x08,0x05,0x24,
+0x68,0x1C,0x44,0xAC,
+0x6C,0x1C,0x43,0xAC,
+0x98,0x0C,0x04,0x24,
+0x9C,0x0C,0x03,0x24,
+0x31,0x1C,0x47,0xA0,
+0x40,0x1C,0x45,0xAC,
+0x70,0x1C,0x44,0xAC,
+0x74,0x1C,0x43,0xAC,
+0x08,0x00,0xE0,0x03,
+0x3C,0x1C,0x45,0xAC,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x42,0x24,
+0xA8,0x08,0x03,0x24,
+0x78,0x1C,0x43,0xAC,
+0x74,0x08,0x03,0x24,
+0xE4,0x08,0x04,0x24,
+0x34,0x1C,0x43,0xAC,
+0x48,0x08,0x03,0x24,
+0x38,0x1C,0x44,0xAC,
+0x44,0x1C,0x43,0xAC,
+0x7C,0x08,0x04,0x24,
+0x0C,0x08,0x03,0x24,
+0x48,0x1C,0x44,0xAC,
+0x4C,0x1C,0x43,0xAC,
+0x18,0x08,0x04,0x24,
+0x30,0x08,0x03,0x24,
+0x50,0x1C,0x44,0xAC,
+0x54,0x1C,0x43,0xAC,
+0x34,0x08,0x04,0x24,
+0x5C,0x08,0x03,0x24,
+0x58,0x1C,0x44,0xAC,
+0x5C,0x1C,0x43,0xAC,
+0x60,0x0C,0x04,0x24,
+0x64,0x0C,0x03,0x24,
+0x60,0x1C,0x44,0xAC,
+0x64,0x1C,0x43,0xAC,
+0x24,0x0C,0x04,0x24,
+0x20,0x0C,0x03,0x24,
+0x68,0x08,0x05,0x24,
+0x68,0x1C,0x44,0xAC,
+0x6C,0x1C,0x43,0xAC,
+0x90,0x0C,0x04,0x24,
+0x94,0x0C,0x03,0x24,
+0x31,0x1C,0x47,0xA0,
+0x40,0x1C,0x45,0xAC,
+0x70,0x1C,0x44,0xAC,
+0x74,0x1C,0x43,0xAC,
+0x08,0x00,0xE0,0x03,
+0x3C,0x1C,0x45,0xAC,
+0xA2,0x45,0x00,0x08,
+0x21,0x18,0x00,0x00,
+0x20,0x00,0x62,0x2C,
+0x06,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x06,0x10,0x64,0x00,
+0x01,0x00,0x42,0x30,
+0xFA,0xFF,0x40,0x10,
+0x01,0x00,0x63,0x24,
+0xFF,0xFF,0x63,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0xD8,0xFF,0xBD,0x27,
+0x14,0x00,0xB1,0xAF,
+0x25,0xB0,0x02,0x3C,
+0x21,0x88,0xA0,0x00,
+0xFF,0xFF,0x03,0x24,
+0x1C,0x00,0xB3,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x20,0x00,0xBF,0xAF,
+0x21,0x98,0xC0,0x00,
+0x21,0x28,0xC0,0x00,
+0x21,0x90,0x80,0x00,
+0x09,0x00,0x23,0x12,
+0x21,0x80,0x82,0x00,
+0x00,0x00,0x10,0x8E,
+0x9D,0x45,0x00,0x0C,
+0x21,0x20,0x20,0x02,
+0x27,0x28,0x11,0x00,
+0x24,0x28,0xB0,0x00,
+0x04,0x10,0x53,0x00,
+0x25,0x28,0xA2,0x00,
+0x21,0x20,0x40,0x02,
+0x20,0x00,0xBF,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0xDB,0x44,0x00,0x08,
+0x28,0x00,0xBD,0x27,
+0x02,0x80,0x02,0x3C,
+0x21,0x30,0x80,0x00,
+0x74,0x3B,0x44,0x8C,
+0xA9,0x45,0x00,0x08,
+0xFF,0xFF,0x05,0x24,
+0xE0,0xFF,0xBD,0x27,
+0x25,0xB0,0x02,0x3C,
+0x18,0x00,0xBF,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x21,0x20,0x82,0x00,
+0x00,0x00,0x90,0x8C,
+0x21,0x88,0xA0,0x00,
+0x9D,0x45,0x00,0x0C,
+0x21,0x20,0xA0,0x00,
+0x24,0x80,0x11,0x02,
+0x06,0x10,0x50,0x00,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0xD8,0xFF,0xBD,0x27,
+0x14,0x00,0xB1,0xAF,
+0x02,0x80,0x11,0x3C,
+0x20,0x00,0xBF,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x30,0x1F,0x31,0x26,
+0x58,0x1C,0x23,0x8E,
+0x25,0xB0,0x02,0x3C,
+0x24,0x08,0x53,0x8C,
+0x21,0x18,0x62,0x00,
+0x00,0x00,0x70,0x8C,
+0x7F,0x80,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0xFF,0x7F,0x05,0x3C,
+0x24,0x80,0x02,0x02,
+0xC0,0x25,0x04,0x00,
+0xFF,0xFF,0xA5,0x34,
+0x24,0x28,0x65,0x02,
+0x25,0x80,0x04,0x02,
+0xDB,0x44,0x00,0x0C,
+0x24,0x08,0x04,0x24,
+0x25,0x22,0x00,0x0C,
+0x01,0x00,0x04,0x24,
+0x00,0x80,0x12,0x3C,
+0x58,0x1C,0x24,0x8E,
+0x25,0x80,0x12,0x02,
+0xDB,0x44,0x00,0x0C,
+0x21,0x28,0x00,0x02,
+0x25,0x22,0x00,0x0C,
+0x01,0x00,0x04,0x24,
+0x25,0x28,0x72,0x02,
+0xDB,0x44,0x00,0x0C,
+0x24,0x08,0x04,0x24,
+0x25,0x22,0x00,0x0C,
+0x01,0x00,0x04,0x24,
+0x78,0x1C,0x24,0x8E,
+0x0F,0x00,0x05,0x3C,
+0x20,0x00,0xBF,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0xFF,0xFF,0xA5,0x34,
+0xCB,0x45,0x00,0x08,
+0x28,0x00,0xBD,0x27,
+0xE0,0xFF,0xBD,0x27,
+0x14,0x00,0xB1,0xAF,
+0x02,0x80,0x11,0x3C,
+0x10,0x00,0xB0,0xAF,
+0x18,0x00,0xBF,0xAF,
+0x30,0x1F,0x27,0x26,
+0x33,0x1C,0xE5,0x90,
+0x01,0x80,0x03,0x3C,
+0x25,0xB0,0x02,0x3C,
+0x2C,0x18,0x63,0x24,
+0x18,0x03,0x42,0x34,
+0x02,0x00,0x06,0x24,
+0x00,0x00,0x43,0xAC,
+0x34,0x00,0xA6,0x10,
+0x21,0x80,0x80,0x00,
+0x03,0x00,0x03,0x24,
+0x3A,0x00,0xA3,0x10,
+0x2E,0x00,0x02,0x2E,
+0x10,0x00,0x02,0x2E,
+0x07,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x04,0x32,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0xDC,0x45,0x00,0x08,
+0x20,0x00,0xBD,0x27,
+0xFA,0xFF,0xA6,0x14,
+0xFF,0x00,0x04,0x32,
+0x31,0x1C,0xE4,0x90,
+0x01,0x00,0x02,0x24,
+0x33,0x00,0x82,0x10,
+0x02,0x00,0x82,0x28,
+0x38,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x38,0x00,0x85,0x10,
+0x30,0x1F,0x22,0x26,
+0x2E,0x00,0x83,0x10,
+0x00,0x00,0x00,0x00,
+0x00,0x08,0x04,0x24,
+0xCB,0x45,0x00,0x0C,
+0xFF,0xFF,0x05,0x24,
+0xFF,0xFC,0x06,0x3C,
+0xFF,0xFF,0xC6,0x34,
+0x24,0x30,0x46,0x00,
+0x00,0x08,0x04,0x24,
+0xA9,0x45,0x00,0x0C,
+0xFF,0xFF,0x05,0x24,
+0x30,0x1F,0x22,0x26,
+0x31,0x1C,0x44,0x90,
+0x01,0x00,0x03,0x24,
+0x07,0x00,0x83,0x10,
+0x02,0x00,0x82,0x28,
+0x2C,0x00,0x40,0x14,
+0x02,0x00,0x02,0x24,
+0x2C,0x00,0x82,0x10,
+0x03,0x00,0x02,0x24,
+0xDB,0xFF,0x82,0x14,
+0x00,0x00,0x00,0x00,
+0x30,0x1F,0x22,0x26,
+0x34,0x1C,0x44,0x8C,
+0x0F,0x00,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x21,0x46,0x00,0x08,
+0xFF,0x00,0x04,0x32,
+0x25,0x00,0x82,0x2C,
+0xCC,0xFF,0x40,0x14,
+0x03,0x00,0x03,0x24,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0xC7,0xFF,0x40,0x14,
+0x10,0x00,0x02,0x2E,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x30,0x1F,0x22,0x26,
+0x34,0x1C,0x44,0x8C,
+0x0F,0x00,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x0F,0x00,0x06,0x24,
+0x33,0x46,0x00,0x08,
+0x00,0x08,0x04,0x24,
+0xCC,0xFF,0x80,0x14,
+0x30,0x1F,0x22,0x26,
+0x34,0x1C,0x44,0x8C,
+0x0F,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x0F,0x00,0x06,0x24,
+0x33,0x46,0x00,0x08,
+0x00,0x08,0x04,0x24,
+0xB2,0xFF,0x80,0x14,
+0x00,0x00,0x00,0x00,
+0x30,0x1F,0x22,0x26,
+0x34,0x1C,0x44,0x8C,
+0x0F,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x21,0x46,0x00,0x08,
+0xFF,0x00,0x04,0x32,
+0xE0,0xFF,0xBD,0x27,
+0x14,0x00,0xB1,0xAF,
+0x02,0x80,0x11,0x3C,
+0x30,0x1F,0x28,0x26,
+0x33,0x1C,0x06,0x91,
+0x01,0x80,0x03,0x3C,
+0x25,0xB0,0x02,0x3C,
+0xD8,0x19,0x63,0x24,
+0x18,0x03,0x42,0x34,
+0x02,0x00,0x07,0x24,
+0x18,0x00,0xB2,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x1C,0x00,0xBF,0xAF,
+0x00,0x00,0x43,0xAC,
+0x21,0x90,0xA0,0x00,
+0x39,0x00,0xC7,0x10,
+0xFF,0x00,0x90,0x30,
+0x03,0x00,0x03,0x24,
+0x3F,0x00,0xC3,0x10,
+0x2E,0x00,0x02,0x2E,
+0x10,0x00,0x02,0x2E,
+0x0C,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x0F,0x00,0x04,0x3C,
+0xFF,0xFF,0x84,0x34,
+0x24,0x20,0x44,0x02,
+0x00,0x15,0x10,0x00,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x25,0x20,0x44,0x00,
+0xC6,0x45,0x00,0x08,
+0x20,0x00,0xBD,0x27,
+0xF5,0xFF,0xC7,0x14,
+0x0F,0x00,0x04,0x3C,
+0x31,0x1C,0x04,0x91,
+0x01,0x00,0x02,0x24,
+0x33,0x00,0x82,0x10,
+0x02,0x00,0x82,0x28,
+0x38,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x38,0x00,0x86,0x10,
+0x30,0x1F,0x22,0x26,
+0x2E,0x00,0x83,0x10,
+0x00,0x00,0x00,0x00,
+0x00,0x08,0x04,0x24,
+0xCB,0x45,0x00,0x0C,
+0xFF,0xFF,0x05,0x24,
+0xFF,0xFC,0x06,0x3C,
+0xFF,0xFF,0xC6,0x34,
+0x24,0x30,0x46,0x00,
+0x00,0x08,0x04,0x24,
+0xA9,0x45,0x00,0x0C,
+0xFF,0xFF,0x05,0x24,
+0x30,0x1F,0x22,0x26,
+0x31,0x1C,0x44,0x90,
+0x01,0x00,0x03,0x24,
+0x07,0x00,0x83,0x10,
+0x02,0x00,0x82,0x28,
+0x2C,0x00,0x40,0x14,
+0x02,0x00,0x02,0x24,
+0x2C,0x00,0x82,0x10,
+0x03,0x00,0x02,0x24,
+0xD6,0xFF,0x82,0x14,
+0x00,0x00,0x00,0x00,
+0x30,0x1F,0x22,0x26,
+0x34,0x1C,0x44,0x8C,
+0x0F,0x00,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x8E,0x46,0x00,0x08,
+0x0F,0x00,0x04,0x3C,
+0x25,0x00,0x02,0x2E,
+0xC7,0xFF,0x40,0x14,
+0x03,0x00,0x03,0x24,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0xC1,0xFF,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x30,0x1F,0x22,0x26,
+0x34,0x1C,0x44,0x8C,
+0x0F,0x00,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x0F,0x00,0x06,0x24,
+0xA5,0x46,0x00,0x08,
+0x00,0x08,0x04,0x24,
+0xCC,0xFF,0x80,0x14,
+0x30,0x1F,0x22,0x26,
+0x34,0x1C,0x44,0x8C,
+0x0F,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x0F,0x00,0x06,0x24,
+0xA5,0x46,0x00,0x08,
+0x00,0x08,0x04,0x24,
+0xAD,0xFF,0x80,0x14,
+0x00,0x00,0x00,0x00,
+0x30,0x1F,0x22,0x26,
+0x34,0x1C,0x44,0x8C,
+0x0F,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x8E,0x46,0x00,0x08,
+0x0F,0x00,0x04,0x3C,
+0xE8,0xFF,0xBD,0x27,
+0x10,0x00,0xB0,0xAF,
+0x21,0x80,0x80,0x00,
+0x14,0x00,0xBF,0xAF,
+0xDC,0x45,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0x40,0x01,0x44,0x34,
+0x21,0x18,0x40,0x00,
+0x1F,0x00,0x02,0x2E,
+0x00,0x23,0x04,0x00,
+0x10,0x00,0x40,0x10,
+0x10,0x00,0x05,0x2E,
+0x00,0x01,0x64,0x34,
+0x06,0x00,0xA0,0x10,
+0x00,0x23,0x04,0x00,
+0x21,0x10,0x00,0x02,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0xC6,0x45,0x00,0x0C,
+0xF1,0xFF,0x10,0x26,
+0x21,0x10,0x00,0x02,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0xC6,0x45,0x00,0x0C,
+0xE2,0xFF,0x10,0x26,
+0x21,0x10,0x00,0x02,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0xE0,0xFF,0xBD,0x27,
+0x25,0xB0,0x02,0x3C,
+0x18,0x00,0xBF,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x21,0x20,0x82,0x00,
+0x00,0x00,0x90,0x8C,
+0x21,0x88,0xA0,0x00,
+0x9D,0x45,0x00,0x0C,
+0x21,0x20,0xA0,0x00,
+0x24,0x80,0x11,0x02,
+0x06,0x10,0x50,0x00,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0xD8,0xFF,0xBD,0x27,
+0x25,0xB0,0x02,0x3C,
+0x18,0x00,0xB2,0xAF,
+0x21,0x90,0x82,0x00,
+0xFF,0xFF,0x02,0x24,
+0x1C,0x00,0xB3,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x20,0x00,0xBF,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x21,0x88,0xA0,0x00,
+0x21,0x20,0xA0,0x00,
+0x21,0x18,0x40,0x02,
+0x10,0x00,0xA2,0x10,
+0x21,0x98,0xC0,0x00,
+0x00,0x00,0x50,0x8E,
+0x9D,0x45,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x27,0x18,0x11,0x00,
+0x24,0x18,0x70,0x00,
+0x04,0x10,0x53,0x00,
+0x25,0x18,0x62,0x00,
+0x00,0x00,0x43,0xAE,
+0x20,0x00,0xBF,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0x20,0x00,0xBF,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x28,0x00,0xBD,0x27,
+0x00,0x00,0x66,0xAC,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x02,0x3C,
+0x21,0x38,0x82,0x00,
+0xFF,0xFF,0x02,0x24,
+0x27,0x40,0x05,0x00,
+0x08,0x00,0xA2,0x10,
+0x24,0x18,0xC5,0x00,
+0x00,0x00,0xE2,0x8C,
+0x00,0x00,0x00,0x00,
+0x24,0x10,0x02,0x01,
+0x25,0x10,0x43,0x00,
+0x00,0x00,0xE2,0xAC,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xE6,0xAC,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x21,0x38,0xA0,0x00,
+0x25,0xB0,0x02,0x3C,
+0xFF,0xFF,0x03,0x24,
+0x27,0x48,0x05,0x00,
+0x24,0x40,0xC7,0x00,
+0x21,0x28,0xC0,0x00,
+0x05,0x00,0xE3,0x10,
+0x21,0x30,0x82,0x00,
+0x00,0x00,0xC5,0x8C,
+0x00,0x00,0x00,0x00,
+0x24,0x28,0x25,0x01,
+0x25,0x28,0xA8,0x00,
+0xDB,0x44,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x01,0x80,0x02,0x3C,
+0x25,0xB0,0x03,0x3C,
+0xD8,0xFF,0xBD,0x27,
+0x7C,0x1D,0x42,0x24,
+0x18,0x03,0x63,0x34,
+0x20,0x00,0xB4,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x24,0x00,0xBF,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x00,0x00,0x62,0xAC,
+0x21,0x88,0xA0,0x00,
+0x21,0x98,0xC0,0x00,
+0x21,0xA0,0x80,0x00,
+0x00,0x60,0x12,0x40,
+0x01,0x00,0x41,0x36,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x0F,0x00,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x0A,0x00,0x22,0x12,
+0x21,0x28,0xC0,0x00,
+0x0B,0x46,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x21,0x20,0x20,0x02,
+0x9D,0x45,0x00,0x0C,
+0x21,0x80,0x40,0x00,
+0x27,0x28,0x11,0x00,
+0x24,0x28,0xB0,0x00,
+0x04,0x10,0x53,0x00,
+0x25,0x28,0xA2,0x00,
+0x76,0x46,0x00,0x0C,
+0xFF,0x00,0x84,0x32,
+0x00,0x60,0x92,0x40,
+0x24,0x00,0xBF,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0x01,0x80,0x03,0x3C,
+0x25,0xB0,0x02,0x3C,
+0x28,0x1E,0x63,0x24,
+0x18,0x03,0x42,0x34,
+0xE0,0xFF,0xBD,0x27,
+0x00,0x00,0x43,0xAC,
+0x18,0x00,0xBF,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x0B,0x46,0x00,0x0C,
+0x21,0x88,0xA0,0x00,
+0x21,0x80,0x40,0x00,
+0x9D,0x45,0x00,0x0C,
+0x21,0x20,0x20,0x02,
+0x24,0x80,0x11,0x02,
+0x06,0x10,0x50,0x00,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0xD0,0xFF,0xBD,0x27,
+0x24,0x00,0xB5,0xAF,
+0xFF,0x00,0x84,0x30,
+0x21,0xA8,0xC0,0x00,
+0x28,0x00,0xB6,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x2C,0x00,0xBF,0xAF,
+0x20,0x00,0xB4,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x21,0xB0,0xA0,0x00,
+0xE6,0x44,0x00,0x0C,
+0x21,0x98,0x00,0x00,
+0x21,0x00,0xA0,0x16,
+0x80,0x10,0x13,0x00,
+0xDD,0x47,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0xFD,0x00,0x02,0x24,
+0x23,0x00,0x02,0x12,
+0x05,0x00,0x04,0x24,
+0xFC,0x00,0x02,0x24,
+0x37,0x00,0x02,0x12,
+0x00,0x00,0x00,0x00,
+0xFB,0x00,0x02,0x24,
+0x30,0x00,0x02,0x12,
+0x32,0x00,0x04,0x24,
+0xFA,0x00,0x02,0x24,
+0x2D,0x00,0x02,0x12,
+0x05,0x00,0x04,0x24,
+0xF9,0x00,0x02,0x24,
+0x29,0x00,0x02,0x12,
+0x0F,0x00,0x05,0x3C,
+0x04,0x00,0xD1,0x8C,
+0xFF,0xFF,0xA5,0x34,
+0x21,0x20,0x00,0x02,
+0x5F,0x47,0x00,0x0C,
+0x21,0x30,0x20,0x02,
+0x25,0x22,0x00,0x0C,
+0x01,0x00,0x04,0x24,
+0x19,0x00,0x02,0x24,
+0x28,0x00,0x02,0x12,
+0x21,0x90,0x00,0x00,
+0x02,0x00,0x62,0x26,
+0xFF,0x00,0x53,0x30,
+0x2B,0x18,0x75,0x02,
+0x0F,0x00,0x60,0x10,
+0x80,0x10,0x13,0x00,
+0x21,0x30,0x56,0x00,
+0x00,0x00,0xD0,0x8C,
+0xFF,0x00,0x02,0x24,
+0x0A,0x00,0x02,0x12,
+0xFE,0x00,0x02,0x24,
+0xDC,0xFF,0x02,0x16,
+0x32,0x00,0x04,0x24,
+0x25,0x22,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x02,0x00,0x62,0x26,
+0xFF,0x00,0x53,0x30,
+0x2B,0x18,0x75,0x02,
+0xF3,0xFF,0x60,0x14,
+0x80,0x10,0x13,0x00,
+0x2C,0x00,0xBF,0x8F,
+0x28,0x00,0xB6,0x8F,
+0x24,0x00,0xB5,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x01,0x00,0x02,0x24,
+0x08,0x00,0xE0,0x03,
+0x30,0x00,0xBD,0x27,
+0x01,0x00,0x04,0x24,
+0x54,0x22,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xCB,0x47,0x00,0x08,
+0x02,0x00,0x62,0x26,
+0x25,0x22,0x00,0x0C,
+0x01,0x00,0x04,0x24,
+0xD9,0x47,0x00,0x08,
+0x02,0x00,0x62,0x26,
+0x0F,0x00,0x14,0x3C,
+0x21,0x20,0x00,0x02,
+0x8A,0x47,0x00,0x0C,
+0xFF,0xFF,0x85,0x36,
+0x21,0x20,0x00,0x02,
+0xFF,0xFF,0x85,0x36,
+0xD2,0xFF,0x51,0x10,
+0x21,0x30,0x20,0x02,
+0x5F,0x47,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x25,0x22,0x00,0x0C,
+0x01,0x00,0x04,0x24,
+0x01,0x00,0x42,0x26,
+0xFF,0x00,0x52,0x30,
+0x0A,0x00,0x43,0x2E,
+0xF2,0xFF,0x60,0x14,
+0x21,0x20,0x00,0x02,
+0xE6,0x44,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0x2C,0x00,0xBF,0x8F,
+0x28,0x00,0xB6,0x8F,
+0x24,0x00,0xB5,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x30,0x00,0xBD,0x27,
+0xB8,0xFF,0xBD,0x27,
+0x02,0x80,0x02,0x3C,
+0x44,0x00,0xBF,0xAF,
+0x40,0x00,0xBE,0xAF,
+0x3C,0x00,0xB7,0xAF,
+0x38,0x00,0xB6,0xAF,
+0x34,0x00,0xB5,0xAF,
+0x30,0x00,0xB4,0xAF,
+0x2C,0x00,0xB3,0xAF,
+0x28,0x00,0xB2,0xAF,
+0x24,0x00,0xB1,0xAF,
+0x20,0x00,0xB0,0xAF,
+0x30,0x1F,0x57,0x24,
+0x64,0x37,0xE3,0x96,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x05,0x3C,
+0x25,0xA0,0x62,0x00,
+0xF0,0xDD,0xA5,0x24,
+0x24,0x00,0x84,0x26,
+0x06,0x00,0x06,0x24,
+0x02,0x80,0x02,0x3C,
+0x20,0x00,0x80,0xA6,
+0x10,0x52,0x00,0x0C,
+0x84,0x58,0x56,0x24,
+0x02,0x80,0x05,0x3C,
+0x18,0x3B,0xA5,0x24,
+0x2A,0x00,0x84,0x26,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x02,0x80,0x05,0x3C,
+0x88,0x58,0xA5,0x24,
+0x06,0x00,0x06,0x24,
+0x10,0x52,0x00,0x0C,
+0x30,0x00,0x84,0x26,
+0x20,0x00,0x83,0x96,
+0x74,0x00,0xD0,0x26,
+0x21,0x20,0x00,0x02,
+0x03,0xFF,0x63,0x30,
+0x80,0x00,0x63,0x34,
+0x20,0x00,0x83,0xA6,
+0x20,0x00,0x1E,0x24,
+0x40,0x00,0x93,0x26,
+0x17,0x4F,0x00,0x0C,
+0x1C,0x00,0xBE,0xAF,
+0x21,0x28,0x40,0x00,
+0x21,0x20,0x60,0x02,
+0x10,0x52,0x00,0x0C,
+0x02,0x00,0x06,0x24,
+0x1C,0x00,0xA2,0x8F,
+0x21,0x20,0x00,0x02,
+0x42,0x00,0x93,0x26,
+0x02,0x00,0x42,0x24,
+0x32,0x4F,0x00,0x0C,
+0x1C,0x00,0xA2,0xAF,
+0x21,0x28,0x40,0x00,
+0x21,0x20,0x60,0x02,
+0x10,0x52,0x00,0x0C,
+0x02,0x00,0x06,0x24,
+0x1C,0x00,0xA2,0x8F,
+0x0C,0x00,0xC6,0x8E,
+0x1C,0x00,0xB0,0x27,
+0x21,0x28,0x00,0x00,
+0x10,0x00,0xC7,0x26,
+0x02,0x00,0x42,0x24,
+0x44,0x00,0x84,0x26,
+0x60,0x00,0xD1,0x26,
+0x1C,0x00,0xA2,0xAF,
+0x41,0x4F,0x00,0x0C,
+0x10,0x00,0xB0,0xAF,
+0x21,0x20,0x20,0x02,
+0x37,0x50,0x00,0x0C,
+0x21,0x98,0x40,0x00,
+0x09,0x00,0x52,0x2C,
+0x08,0x00,0x06,0x24,
+0x21,0x20,0x60,0x02,
+0x0B,0x30,0x52,0x00,
+0x21,0x38,0x20,0x02,
+0x01,0x00,0x05,0x24,
+0x21,0xA8,0x40,0x00,
+0x41,0x4F,0x00,0x0C,
+0x10,0x00,0xB0,0xAF,
+0x21,0x20,0x40,0x00,
+0x03,0x00,0x05,0x24,
+0x01,0x00,0x06,0x24,
+0x48,0x00,0xC7,0x26,
+0x41,0x4F,0x00,0x0C,
+0x10,0x00,0xB0,0xAF,
+0x21,0x20,0x40,0x00,
+0x06,0x00,0x05,0x24,
+0x02,0x00,0x06,0x24,
+0x18,0x00,0xA7,0x27,
+0x18,0x00,0xA0,0xA7,
+0x41,0x4F,0x00,0x0C,
+0x10,0x00,0xB0,0xAF,
+0x18,0x00,0xA5,0x97,
+0x02,0x80,0x04,0x3C,
+0x68,0xDF,0x84,0x24,
+0x2F,0x55,0x00,0x0C,
+0x21,0x98,0x40,0x00,
+0x13,0x00,0x40,0x12,
+0x21,0x20,0x60,0x02,
+0x1C,0x00,0xA2,0x8F,
+0x00,0x00,0x00,0x00,
+0x20,0x00,0x42,0x24,
+0x01,0x01,0x42,0x2C,
+0x18,0x00,0x40,0x14,
+0x21,0x20,0x80,0x02,
+0x44,0x00,0xBF,0x8F,
+0x40,0x00,0xBE,0x8F,
+0x3C,0x00,0xB7,0x8F,
+0x38,0x00,0xB6,0x8F,
+0x34,0x00,0xB5,0x8F,
+0x30,0x00,0xB4,0x8F,
+0x2C,0x00,0xB3,0x8F,
+0x28,0x00,0xB2,0x8F,
+0x24,0x00,0xB1,0x8F,
+0x20,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x48,0x00,0xBD,0x27,
+0xF8,0xFF,0xA6,0x26,
+0x68,0x00,0xC7,0x26,
+0x32,0x00,0x05,0x24,
+0x41,0x4F,0x00,0x0C,
+0x10,0x00,0xB0,0xAF,
+0x1C,0x00,0xA2,0x8F,
+0x00,0x00,0x00,0x00,
+0x20,0x00,0x42,0x24,
+0x01,0x01,0x42,0x2C,
+0xEA,0xFF,0x40,0x10,
+0x21,0x20,0x80,0x02,
+0x21,0x28,0x00,0x00,
+0x08,0x52,0x00,0x0C,
+0x08,0x00,0x06,0x24,
+0x08,0x00,0x84,0x8E,
+0x04,0x00,0x85,0x8E,
+0xFF,0xDF,0x02,0x3C,
+0x10,0x00,0x86,0x8E,
+0x14,0x00,0x87,0x8E,
+0xFF,0xFF,0x42,0x34,
+0x1C,0x00,0xA8,0x8F,
+0x24,0x20,0x82,0x00,
+0x00,0x40,0x03,0x3C,
+0xFF,0xE0,0x02,0x24,
+0x24,0x28,0xA2,0x00,
+0x25,0x20,0x83,0x00,
+0x00,0x80,0x02,0x3C,
+0xFF,0x81,0x03,0x24,
+0x24,0x38,0xE3,0x00,
+0x25,0x30,0xC2,0x00,
+0x00,0x10,0xA5,0x34,
+0x80,0x00,0x84,0x34,
+0x08,0x00,0x84,0xAE,
+0x00,0x00,0x88,0xA6,
+0x02,0x00,0x9E,0xA2,
+0x14,0x00,0x87,0xAE,
+0x04,0x00,0x85,0xAE,
+0x10,0x00,0x86,0xAE,
+0xF8,0x36,0xE6,0x8E,
+0x64,0x37,0xE5,0x8E,
+0x01,0x00,0x04,0x24,
+0x00,0x01,0x07,0x24,
+0x01,0x00,0x02,0x24,
+0x73,0x01,0x00,0x0C,
+0x10,0x00,0xA2,0xAF,
+0xB0,0x01,0x00,0x0C,
+0x01,0x00,0x04,0x24,
+0x44,0x00,0xBF,0x8F,
+0x40,0x00,0xBE,0x8F,
+0x3C,0x00,0xB7,0x8F,
+0x38,0x00,0xB6,0x8F,
+0x34,0x00,0xB5,0x8F,
+0x30,0x00,0xB4,0x8F,
+0x2C,0x00,0xB3,0x8F,
+0x28,0x00,0xB2,0x8F,
+0x24,0x00,0xB1,0x8F,
+0x20,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x48,0x00,0xBD,0x27,
+0xE8,0xFF,0xBD,0x27,
+0x10,0x00,0xB0,0xAF,
+0x14,0x00,0xBF,0xAF,
+0x25,0x24,0x00,0x0C,
+0x24,0x00,0x04,0x24,
+0x21,0x30,0x40,0x00,
+0x02,0x80,0x05,0x3C,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x50,0x24,
+0x21,0x20,0xC0,0x00,
+0x13,0x00,0xC0,0x10,
+0x48,0xEA,0xA5,0x24,
+0x04,0x00,0x02,0x24,
+0x09,0x00,0x03,0x24,
+0x0C,0x00,0xC2,0xAC,
+0x14,0x00,0xC3,0xAC,
+0x08,0x00,0xC5,0x94,
+0xA4,0x3B,0x03,0x8E,
+0x02,0x80,0x02,0x3C,
+0x25,0x28,0xA2,0x00,
+0x30,0x09,0x00,0x0C,
+0x20,0x00,0xA3,0xAC,
+0xA8,0x3B,0x06,0x8E,
+0xA4,0x3B,0x05,0x8E,
+0x02,0x80,0x04,0x3C,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x80,0xDF,0x84,0x24,
+0x2F,0x55,0x00,0x08,
+0x18,0x00,0xBD,0x27,
+0x02,0x80,0x04,0x3C,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x74,0xDF,0x84,0x24,
+0x2F,0x55,0x00,0x08,
+0x18,0x00,0xBD,0x27,
+0xD8,0xFF,0xBD,0x27,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x24,0x00,0xBF,0xAF,
+0x20,0x00,0xB4,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x02,0x00,0x82,0x90,
+0x02,0x80,0x12,0x3C,
+0x30,0x1F,0x51,0x26,
+0xB0,0x1B,0x25,0x96,
+0x0F,0x00,0x42,0x30,
+0xC0,0x10,0x02,0x00,
+0x21,0x80,0x44,0x00,
+0x00,0x01,0xA3,0x30,
+0x04,0x00,0x60,0x10,
+0x18,0x00,0x04,0x26,
+0x00,0x10,0xA2,0x30,
+0x0B,0x00,0x40,0x10,
+0x04,0x00,0xA2,0x30,
+0x21,0x18,0x00,0x00,
+0x24,0x00,0xBF,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x10,0x60,0x00,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0xF5,0xFF,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x55,0x50,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x04,0x3C,
+0x18,0x3B,0x84,0x24,
+0x21,0x28,0x40,0x00,
+0x39,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0xED,0xFF,0x40,0x14,
+0x21,0x18,0x00,0x00,
+0x02,0x80,0x02,0x3C,
+0x88,0x58,0x53,0x24,
+0x22,0x00,0x14,0x26,
+0x21,0x20,0x80,0x02,
+0x21,0x28,0x60,0x02,
+0x39,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0xE4,0xFF,0x40,0x14,
+0x21,0x18,0x00,0x00,
+0x28,0x00,0x04,0x26,
+0x21,0x28,0x60,0x02,
+0x39,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0xDE,0xFF,0x40,0x14,
+0x21,0x18,0x00,0x00,
+0x02,0x80,0x04,0x3C,
+0x2F,0x55,0x00,0x0C,
+0xE8,0xDF,0x84,0x24,
+0xB0,0x1B,0x24,0x96,
+0x00,0x00,0x00,0x00,
+0xFF,0xFF,0x83,0x30,
+0x01,0x00,0x62,0x30,
+0x08,0x00,0x40,0x10,
+0x00,0x20,0x62,0x30,
+0x15,0x00,0x40,0x10,
+0xFF,0xDE,0x82,0x30,
+0xFE,0xFF,0x04,0x24,
+0xB0,0x1B,0x22,0xA6,
+0xD0,0x38,0x20,0xAE,
+0x48,0x0E,0x00,0x0C,
+0xB4,0x38,0x20,0xAE,
+0x25,0xB0,0x02,0x3C,
+0x30,0x1F,0x50,0x26,
+0x4C,0x00,0x42,0x34,
+0x00,0x00,0x40,0xA0,
+0x21,0x20,0x00,0x00,
+0x21,0x28,0x00,0x00,
+0x12,0x0D,0x00,0x0C,
+0xA1,0x3B,0x00,0xA2,
+0x10,0x3E,0x00,0xAE,
+0xEC,0x38,0x00,0xAE,
+0x08,0x39,0x00,0xAE,
+0xA3,0x51,0x00,0x0C,
+0x50,0x3E,0x00,0xAE,
+0xFA,0x48,0x00,0x08,
+0x21,0x18,0x00,0x00,
+0x76,0x0E,0x00,0x0C,
+0x21,0x20,0x80,0x02,
+0xBB,0xFF,0x40,0x14,
+0xFF,0xFF,0x03,0x24,
+0xB0,0x1B,0x22,0x96,
+0x00,0x00,0x00,0x00,
+0xFF,0xFE,0x42,0x30,
+0x2D,0x49,0x00,0x08,
+0xB0,0x1B,0x22,0xA6,
+0xD0,0xFF,0xBD,0x27,
+0x20,0x00,0xB4,0xAF,
+0x02,0x80,0x14,0x3C,
+0x14,0x00,0xB1,0xAF,
+0x28,0x00,0xBF,0xAF,
+0x24,0x00,0xB5,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x30,0x1F,0x91,0x26,
+0xB0,0x1B,0x23,0x96,
+0x00,0x00,0x00,0x00,
+0x10,0x00,0x62,0x30,
+0x3A,0x00,0x40,0x14,
+0x00,0x01,0x62,0x30,
+0x2E,0x00,0x40,0x10,
+0x00,0x10,0x62,0x30,
+0x29,0x00,0x40,0x14,
+0x01,0x00,0x62,0x30,
+0x1D,0x00,0x40,0x14,
+0x04,0x00,0x62,0x30,
+0x25,0x00,0x40,0x10,
+0x02,0x80,0x02,0x3C,
+0x21,0x90,0x20,0x02,
+0x2B,0x3D,0x55,0x24,
+0x01,0x00,0x13,0x24,
+0xF0,0x00,0x10,0x24,
+0x65,0x49,0x00,0x08,
+0x19,0x00,0x11,0x24,
+0xFF,0xFF,0x31,0x26,
+0x1C,0x00,0x20,0x06,
+0x28,0x00,0x10,0x26,
+0x21,0x18,0x12,0x02,
+0xFA,0x1D,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0xF9,0xFF,0x53,0x14,
+0x00,0x00,0x00,0x00,
+0x0C,0x1E,0x62,0x8C,
+0x00,0x00,0x00,0x00,
+0x33,0x00,0x40,0x10,
+0x21,0x20,0x15,0x02,
+0x00,0x60,0x02,0x40,
+0x01,0x00,0x41,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x0C,0x1E,0x60,0xAC,
+0x00,0x60,0x82,0x40,
+0x63,0x49,0x00,0x08,
+0xFF,0xFF,0x31,0x26,
+0xD4,0x1E,0x22,0x8E,
+0x00,0x00,0x00,0x00,
+0x2F,0x00,0x40,0x10,
+0x02,0x80,0x04,0x3C,
+0x00,0x60,0x02,0x40,
+0x01,0x00,0x41,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0xD4,0x1E,0x20,0xAE,
+0x00,0x60,0x82,0x40,
+0x53,0x1E,0x00,0x0C,
+0x30,0x1F,0x90,0x26,
+0xEC,0x38,0x02,0xAE,
+0x28,0x00,0xBF,0x8F,
+0x24,0x00,0xB5,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x30,0x00,0xBD,0x27,
+0x02,0x80,0x04,0x3C,
+0x2F,0x55,0x00,0x0C,
+0xF8,0xDF,0x84,0x24,
+0xB0,0x1B,0x22,0x96,
+0xEC,0x38,0x20,0xAE,
+0xFD,0xFF,0x04,0x24,
+0xEF,0xDF,0x42,0x30,
+0x48,0x0E,0x00,0x0C,
+0xB0,0x1B,0x22,0xA6,
+0x28,0x00,0xBF,0x8F,
+0x24,0x00,0xB5,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x30,0x00,0xBD,0x27,
+0x8E,0x3E,0x42,0x92,
+0x00,0x00,0x00,0x00,
+0xFF,0xFF,0x42,0x24,
+0x8E,0x3E,0x42,0xA2,
+0x76,0x0E,0x00,0x0C,
+0xFA,0x1D,0x60,0xA0,
+0x63,0x49,0x00,0x08,
+0xFF,0xFF,0x31,0x26,
+0x2F,0x55,0x00,0x0C,
+0x18,0xE0,0x84,0x24,
+0xB0,0x1B,0x23,0x96,
+0x25,0xB0,0x02,0x3C,
+0x4C,0x00,0x42,0x34,
+0xFE,0xFE,0x63,0x30,
+0xB0,0x1B,0x23,0xA6,
+0x21,0x20,0x00,0x00,
+0x00,0x00,0x40,0xA0,
+0x21,0x28,0x00,0x00,
+0xA1,0x3B,0x20,0xA2,
+0x12,0x0D,0x00,0x0C,
+0xC2,0x1E,0x20,0xA2,
+0x02,0x80,0x04,0x3C,
+0x76,0x0E,0x00,0x0C,
+0x88,0x58,0x84,0x24,
+0x83,0x49,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0xA8,0xFF,0xBD,0x27,
+0x48,0x00,0xB6,0xAF,
+0x3C,0x00,0xB3,0xAF,
+0x38,0x00,0xB2,0xAF,
+0x30,0x00,0xB0,0xAF,
+0x54,0x00,0xBF,0xAF,
+0x50,0x00,0xBE,0xAF,
+0x4C,0x00,0xB7,0xAF,
+0x44,0x00,0xB5,0xAF,
+0x40,0x00,0xB4,0xAF,
+0x34,0x00,0xB1,0xAF,
+0x02,0x00,0x82,0x90,
+0x00,0x00,0x83,0x8C,
+0x21,0xB0,0x00,0x00,
+0x0F,0x00,0x42,0x30,
+0xC0,0x10,0x02,0x00,
+0x21,0x80,0x44,0x00,
+0x18,0x00,0x12,0x26,
+0x21,0x20,0x40,0x02,
+0x55,0x50,0x00,0x0C,
+0xFF,0x3F,0x73,0x30,
+0x02,0x80,0x04,0x3C,
+0x18,0x3B,0x84,0x24,
+0x21,0x28,0x40,0x00,
+0x39,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x0B,0x00,0x40,0x14,
+0x02,0x80,0x15,0x3C,
+0x30,0x1F,0xB1,0x26,
+0xB0,0x1B,0x23,0x96,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x62,0x30,
+0x05,0x00,0x40,0x10,
+0x00,0x10,0x62,0x30,
+0x03,0x00,0x40,0x14,
+0x00,0x01,0x62,0x30,
+0x0E,0x00,0x40,0x10,
+0x20,0x00,0xB4,0x27,
+0x54,0x00,0xBF,0x8F,
+0x50,0x00,0xBE,0x8F,
+0x4C,0x00,0xB7,0x8F,
+0x48,0x00,0xB6,0x8F,
+0x44,0x00,0xB5,0x8F,
+0x40,0x00,0xB4,0x8F,
+0x3C,0x00,0xB3,0x8F,
+0x38,0x00,0xB2,0x8F,
+0x34,0x00,0xB1,0x8F,
+0x30,0x00,0xB0,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x58,0x00,0xBD,0x27,
+0x32,0x00,0x05,0x26,
+0x21,0x20,0x80,0x02,
+0x10,0x52,0x00,0x0C,
+0x02,0x00,0x06,0x24,
+0x20,0x00,0xA5,0x97,
+0x00,0x00,0x00,0x00,
+0xC2,0x00,0xA0,0x14,
+0x02,0x80,0x04,0x3C,
+0x21,0x20,0x80,0x02,
+0x34,0x00,0x05,0x26,
+0x10,0x52,0x00,0x0C,
+0x02,0x00,0x06,0x24,
+0x20,0x00,0xA2,0x97,
+0x21,0x20,0x80,0x02,
+0x30,0x00,0x05,0x26,
+0xFF,0x3F,0x42,0x30,
+0x02,0x00,0x06,0x24,
+0x50,0x39,0x22,0xA6,
+0x10,0x52,0x00,0x0C,
+0x28,0x00,0xA2,0xAF,
+0x20,0x00,0xA3,0x97,
+0x21,0x40,0x20,0x02,
+0x00,0x04,0x63,0x30,
+0x02,0x00,0x60,0x14,
+0x09,0x00,0x02,0x24,
+0x14,0x00,0x02,0x24,
+0x1E,0x00,0x5E,0x26,
+0xE2,0xFF,0x74,0x26,
+0x21,0x20,0xC0,0x03,
+0x01,0x00,0x05,0x24,
+0x24,0x00,0xA6,0x27,
+0x21,0x38,0x80,0x02,
+0x55,0x1D,0x00,0x0C,
+0x0C,0x3E,0x02,0xA1,
+0xA8,0x00,0x40,0x10,
+0x02,0x00,0x45,0x24,
+0x24,0x00,0xA6,0x8F,
+0x10,0x52,0x00,0x0C,
+0x10,0x00,0xA4,0x27,
+0x21,0x20,0xC0,0x03,
+0x32,0x00,0x05,0x24,
+0x24,0x00,0xA6,0x27,
+0x24,0x00,0xB7,0x8F,
+0x55,0x1D,0x00,0x0C,
+0x21,0x38,0x80,0x02,
+0x08,0x00,0x40,0x10,
+0x10,0x00,0xA4,0x27,
+0x24,0x00,0xA6,0x8F,
+0x21,0x20,0x97,0x00,
+0x10,0x52,0x00,0x0C,
+0x02,0x00,0x45,0x24,
+0x24,0x00,0xA3,0x8F,
+0x00,0x00,0x00,0x00,
+0x21,0xB8,0xE3,0x02,
+0x02,0x80,0x02,0x3C,
+0xEA,0x5D,0x44,0x90,
+0x02,0x00,0x03,0x24,
+0xE5,0x00,0x83,0x10,
+0x21,0x20,0xC0,0x03,
+0x30,0x1F,0xA4,0x26,
+0x10,0x3E,0x82,0x8C,
+0x00,0x00,0x00,0x00,
+0x22,0x00,0x40,0x10,
+0x30,0x1F,0xB1,0x26,
+0x02,0x80,0x02,0x3C,
+0xE6,0x5D,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0x1D,0x00,0x60,0x14,
+0x23,0x10,0xD2,0x03,
+0x2B,0x10,0x53,0x00,
+0x1A,0x00,0x40,0x10,
+0x21,0x80,0xC0,0x03,
+0x02,0x80,0x11,0x3C,
+0x21,0x20,0x00,0x02,
+0xDD,0x00,0x05,0x24,
+0x24,0x00,0xA6,0x27,
+0x55,0x1D,0x00,0x0C,
+0x21,0x38,0x80,0x02,
+0x21,0x80,0x40,0x00,
+0x02,0x00,0x44,0x24,
+0xC8,0xDD,0x25,0x26,
+0x0E,0x01,0x40,0x10,
+0x06,0x00,0x06,0x24,
+0x39,0x52,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x10,0x01,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x24,0x00,0xA2,0x8F,
+0x00,0x00,0x00,0x00,
+0x21,0x18,0x02,0x02,
+0x02,0x00,0x70,0x24,
+0x23,0x20,0x12,0x02,
+0x03,0x01,0x40,0x10,
+0x2B,0x20,0x93,0x00,
+0xEB,0xFF,0x80,0x14,
+0x21,0x20,0x00,0x02,
+0x30,0x1F,0xB1,0x26,
+0x50,0x3E,0x22,0x8E,
+0x00,0x00,0x00,0x00,
+0x6A,0x00,0x40,0x14,
+0x24,0x00,0xA6,0x27,
+0x53,0x1E,0x00,0x0C,
+0x30,0x1F,0xB2,0x26,
+0x25,0xB0,0x14,0x3C,
+0xB0,0x1B,0x45,0x96,
+0x02,0x00,0x03,0x24,
+0x4C,0x00,0x84,0x36,
+0x00,0x00,0x83,0xA0,
+0xEC,0x38,0x42,0xAE,
+0x02,0x00,0x02,0x3C,
+0x00,0x01,0xA5,0x34,
+0x20,0xBF,0x42,0x34,
+0x08,0x39,0x42,0xAE,
+0x21,0x0E,0x00,0x0C,
+0xB0,0x1B,0x45,0xA6,
+0x10,0x00,0xA4,0x27,
+0x7D,0x50,0x00,0x0C,
+0x21,0x28,0xE0,0x02,
+0x0F,0x00,0x50,0x30,
+0x10,0x00,0xA4,0x27,
+0x96,0x50,0x00,0x0C,
+0x21,0x28,0xE0,0x02,
+0x40,0x02,0x13,0x36,
+0x02,0x80,0x04,0x3C,
+0x21,0x88,0x40,0x00,
+0x21,0x30,0x40,0x00,
+0x21,0x28,0x60,0x02,
+0x2F,0x55,0x00,0x0C,
+0x6C,0xE0,0x84,0x24,
+0x21,0x20,0x60,0x02,
+0xC1,0x5B,0x00,0x0C,
+0x21,0x28,0x20,0x02,
+0x21,0x28,0xE0,0x02,
+0xC2,0x50,0x00,0x0C,
+0x10,0x00,0xA4,0x27,
+0x21,0x88,0x40,0x00,
+0x50,0x3E,0x42,0x8E,
+0x00,0x00,0x00,0x00,
+0x16,0x00,0x40,0x10,
+0x50,0x00,0x13,0x36,
+0x5B,0x3E,0x42,0x92,
+0x5C,0x3E,0x43,0x92,
+0x0A,0x3E,0x44,0x92,
+0x00,0x13,0x02,0x00,
+0x00,0x1D,0x03,0x00,
+0x25,0x10,0x43,0x00,
+0x04,0x00,0x03,0x24,
+0xA0,0x00,0x83,0x10,
+0x25,0x88,0x22,0x02,
+0x54,0x3E,0x43,0x8E,
+0x00,0x00,0x00,0x00,
+0x07,0x00,0x60,0x14,
+0x01,0x00,0x02,0x24,
+0x58,0x3E,0x42,0x96,
+0x00,0x00,0x00,0x00,
+0x20,0x00,0x42,0x30,
+0xA1,0x00,0x40,0x14,
+0x00,0x10,0x02,0x3C,
+0x01,0x00,0x02,0x24,
+0x98,0x00,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x04,0x3C,
+0x80,0xE0,0x84,0x24,
+0x21,0x28,0x60,0x02,
+0x21,0x38,0xC0,0x02,
+0x2F,0x55,0x00,0x0C,
+0x21,0x30,0x20,0x02,
+0x21,0x20,0x60,0x02,
+0xC1,0x5B,0x00,0x0C,
+0x21,0x28,0x20,0x02,
+0x30,0x1F,0xA2,0x26,
+0xB0,0x1B,0x43,0x94,
+0x0A,0x3E,0x44,0x90,
+0xB4,0x38,0x40,0xAC,
+0xFF,0xDF,0x63,0x30,
+0xB0,0x1B,0x43,0xA4,
+0x04,0x00,0x03,0x24,
+0xD0,0x38,0x40,0xAC,
+0x94,0x3E,0x40,0xAC,
+0x06,0x00,0x83,0x10,
+0x98,0x3E,0x40,0xAC,
+0x28,0x00,0xA4,0x8F,
+0x48,0x0E,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xE2,0x49,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x06,0x3C,
+0x64,0x03,0xC6,0x34,
+0x30,0x1F,0xA4,0x8E,
+0x00,0x00,0xC5,0x90,
+0x0F,0xFF,0x02,0x24,
+0xFD,0xFF,0x03,0x24,
+0x24,0x20,0x82,0x00,
+0x24,0x28,0xA3,0x00,
+0x30,0x1F,0xA4,0xAE,
+0x00,0x00,0xC5,0xA0,
+0x28,0x00,0xA4,0x8F,
+0x48,0x0E,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xE2,0x49,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x2F,0x55,0x00,0x0C,
+0x50,0xE0,0x84,0x24,
+0xFF,0xFF,0x02,0x24,
+0x99,0x4A,0x00,0x08,
+0x28,0x00,0xA2,0xAF,
+0x21,0x20,0xC0,0x03,
+0x2D,0x00,0x05,0x24,
+0x55,0x1D,0x00,0x0C,
+0x21,0x38,0x80,0x02,
+0x91,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x24,0x00,0xAB,0x8F,
+0x00,0x00,0x00,0x00,
+0x1F,0x00,0x60,0x19,
+0x21,0x40,0x00,0x00,
+0x02,0x00,0x49,0x24,
+0x21,0x50,0x20,0x02,
+0x02,0x00,0x0C,0x24,
+0xD5,0x4A,0x00,0x08,
+0x21,0x68,0x20,0x01,
+0x58,0x3E,0x82,0x90,
+0x00,0x00,0x23,0x91,
+0x00,0x00,0x00,0x00,
+0x24,0x10,0x43,0x00,
+0x58,0x3E,0x82,0xA0,
+0x01,0x00,0x08,0x25,
+0x2A,0x10,0x0B,0x01,
+0x11,0x00,0x40,0x10,
+0x01,0x00,0x29,0x25,
+0xF6,0xFF,0x0C,0x15,
+0x21,0x20,0x0A,0x01,
+0x5A,0x3E,0x43,0x91,
+0x00,0x00,0x25,0x91,
+0x02,0x00,0xA2,0x91,
+0x1C,0x00,0x64,0x30,
+0x1C,0x00,0xA5,0x30,
+0x03,0x00,0x42,0x30,
+0x03,0x00,0x63,0x30,
+0x2A,0x30,0x43,0x00,
+0x2A,0x38,0xA4,0x00,
+0x0A,0x10,0x66,0x00,
+0x0A,0x20,0xA7,0x00,
+0x25,0x10,0x44,0x00,
+0xD1,0x4A,0x00,0x08,
+0x5A,0x3E,0x42,0xA1,
+0x02,0x80,0x02,0x3C,
+0xDE,0x5D,0x43,0x90,
+0x02,0x80,0x02,0x3C,
+0x3C,0xE3,0x47,0x24,
+0x10,0x00,0x65,0x30,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0x4C,0xE3,0x66,0x24,
+0x30,0x1F,0x44,0x24,
+0xF8,0x4A,0x00,0x08,
+0x21,0x40,0x00,0x00,
+0x00,0x00,0x43,0x90,
+0x5B,0x3E,0x82,0x90,
+0x01,0x00,0x08,0x25,
+0x24,0x10,0x43,0x00,
+0x5B,0x3E,0x82,0xA0,
+0x10,0x00,0x02,0x29,
+0x07,0x00,0x40,0x10,
+0x01,0x00,0x84,0x24,
+0x21,0x10,0x07,0x01,
+0xF6,0xFF,0xA0,0x14,
+0x21,0x18,0x06,0x01,
+0x00,0x00,0x63,0x90,
+0xF1,0x4A,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x21,0x20,0xC0,0x03,
+0x21,0x38,0x80,0x02,
+0x3D,0x00,0x05,0x24,
+0x55,0x1D,0x00,0x0C,
+0x24,0x00,0xA6,0x27,
+0x48,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x24,0x00,0xA6,0x8F,
+0x02,0x80,0x04,0x3C,
+0xA8,0x5D,0x84,0x24,
+0x10,0x52,0x00,0x0C,
+0x02,0x00,0x45,0x24,
+0x90,0x0D,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x54,0x4A,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x2A,0x00,0x05,0x24,
+0x24,0x00,0xA6,0x27,
+0x55,0x1D,0x00,0x0C,
+0x21,0x38,0x80,0x02,
+0x30,0x00,0x40,0x10,
+0x30,0x1F,0xA5,0x26,
+0x02,0x00,0x42,0x90,
+0x00,0x00,0x00,0x00,
+0x02,0x00,0x42,0x30,
+0x2B,0x00,0x40,0x10,
+0x02,0x80,0x02,0x3C,
+0xEB,0x5D,0x44,0x90,
+0x01,0x00,0x03,0x24,
+0x3E,0x00,0x83,0x10,
+0x30,0x1F,0xA2,0x26,
+0x10,0x23,0x43,0x8C,
+0xFF,0xEF,0x04,0x24,
+0x00,0x08,0x63,0x34,
+0x24,0x18,0x64,0x00,
+0x2A,0x4A,0x00,0x08,
+0x10,0x23,0x43,0xAC,
+0xF6,0x01,0x82,0x36,
+0x00,0x00,0x40,0xA4,
+0x91,0x4A,0x00,0x08,
+0x02,0x80,0x04,0x3C,
+0x58,0x3E,0x42,0x96,
+0x00,0x00,0x00,0x00,
+0x40,0x00,0x42,0x30,
+0x66,0xFF,0x40,0x10,
+0x02,0x80,0x04,0x3C,
+0x00,0x10,0x02,0x3C,
+0x25,0x88,0x22,0x02,
+0x0F,0x00,0x08,0x24,
+0x01,0x00,0x03,0x24,
+0x0C,0x00,0x02,0x25,
+0x04,0x10,0x43,0x00,
+0x24,0x10,0x51,0x00,
+0x16,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0xFF,0xFF,0x08,0x25,
+0xFA,0xFF,0x01,0x05,
+0x0C,0x00,0x02,0x25,
+0x00,0x12,0x16,0x00,
+0x00,0x1B,0x16,0x00,
+0x25,0x18,0x62,0x00,
+0x00,0x21,0x16,0x00,
+0x25,0x18,0x64,0x00,
+0x25,0xB0,0x02,0x3C,
+0x25,0x18,0x76,0x00,
+0xF6,0x01,0x42,0x34,
+0x00,0x00,0x43,0xA4,
+0x91,0x4A,0x00,0x08,
+0x02,0x80,0x04,0x3C,
+0x10,0x23,0xA2,0x8C,
+0xFF,0xF7,0x03,0x24,
+0xFF,0xEF,0x04,0x24,
+0x24,0x10,0x43,0x00,
+0x24,0x10,0x44,0x00,
+0x2A,0x4A,0x00,0x08,
+0x10,0x23,0xA2,0xAC,
+0x38,0x4B,0x00,0x08,
+0xFF,0x00,0x16,0x31,
+0x30,0x1F,0xA2,0x26,
+0x54,0x4A,0x00,0x08,
+0x50,0x3E,0x40,0xAC,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x42,0x24,
+0x4F,0x4A,0x00,0x08,
+0x10,0x3E,0x40,0xAC,
+0x54,0x4A,0x00,0x08,
+0x50,0x3E,0x20,0xAE,
+0x21,0x20,0x00,0x02,
+0x78,0x0F,0x00,0x0C,
+0x21,0x28,0x00,0x00,
+0x50,0x4A,0x00,0x08,
+0x30,0x1F,0xB1,0x26,
+0x10,0x23,0x43,0x8C,
+0xFF,0xF7,0x04,0x24,
+0x24,0x18,0x64,0x00,
+0x00,0x10,0x63,0x34,
+0x2A,0x4A,0x00,0x08,
+0x10,0x23,0x43,0xAC,
+0xD8,0xFF,0xBD,0x27,
+0x1C,0x00,0xB1,0xAF,
+0x18,0x00,0xB0,0xAF,
+0x20,0x00,0xBF,0xAF,
+0x02,0x00,0x82,0x90,
+0x02,0x80,0x03,0x3C,
+0xE0,0x3A,0x65,0x94,
+0x0F,0x00,0x42,0x30,
+0x00,0x00,0x83,0x8C,
+0xC0,0x10,0x02,0x00,
+0x21,0x20,0x44,0x00,
+0x00,0x10,0xA8,0x30,
+0x02,0x80,0x02,0x3C,
+0x00,0x08,0xA5,0x30,
+0x84,0x58,0x51,0x24,
+0xFF,0x3F,0x63,0x30,
+0x06,0x00,0xA0,0x10,
+0x18,0x00,0x90,0x24,
+0xE8,0xFF,0x67,0x24,
+0x30,0x00,0x84,0x24,
+0x21,0x28,0x00,0x00,
+0x07,0x00,0x00,0x11,
+0x10,0x00,0xA6,0x27,
+0x20,0x00,0xBF,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0x55,0x1D,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xF7,0xFF,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x02,0x00,0x44,0x24,
+0x10,0x00,0xA2,0x8F,
+0x00,0x00,0x00,0x00,
+0x06,0x00,0x40,0x10,
+0x10,0x00,0x25,0x26,
+0x0C,0x00,0x26,0x8E,
+0x39,0x52,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xED,0xFF,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x42,0x50,0x00,0x0C,
+0x21,0x20,0x00,0x02,
+0x01,0x10,0x00,0x0C,
+0x21,0x20,0x40,0x00,
+0x77,0x4B,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0xE8,0xFF,0xBD,0x27,
+0x10,0x00,0xBF,0xAF,
+0xE5,0x48,0x00,0x0C,
+0xFE,0xFF,0x05,0x24,
+0x10,0x00,0xBF,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0xE8,0xFF,0xBD,0x27,
+0x10,0x00,0xBF,0xAF,
+0xE5,0x48,0x00,0x0C,
+0xFF,0xFF,0x05,0x24,
+0x10,0x00,0xBF,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x25,0xB0,0x03,0x3C,
+0x01,0x80,0x02,0x3C,
+0xB0,0x03,0x65,0x34,
+0x8C,0x2E,0x42,0x24,
+0x18,0x03,0x63,0x34,
+0x00,0x00,0x62,0xAC,
+0x00,0x00,0xA4,0xAC,
+0x00,0x00,0x83,0x8C,
+0x21,0x10,0x00,0x00,
+0xFF,0x3F,0x63,0x30,
+0x00,0x00,0xA3,0xAC,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xE8,0xFF,0xBD,0x27,
+0x02,0x80,0x02,0x3C,
+0x10,0x00,0xB0,0xAF,
+0x14,0x00,0xBF,0xAF,
+0x30,0x1F,0x50,0x24,
+0x70,0x3D,0x03,0x8E,
+0xFE,0xFF,0x04,0x24,
+0x01,0x00,0x63,0x24,
+0x05,0x00,0x62,0x2C,
+0x12,0x00,0x40,0x10,
+0x70,0x3D,0x03,0xAE,
+0xB0,0x1B,0x02,0x96,
+0x00,0x00,0x00,0x00,
+0x00,0x01,0x42,0x30,
+0x05,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0xA5,0x12,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xC8,0x00,0x03,0x24,
+0xD0,0x38,0x03,0xAE,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0xB0,0x1B,0x02,0x96,
+0x00,0x00,0x00,0x00,
+0xFF,0xDF,0x42,0x30,
+0x48,0x0E,0x00,0x0C,
+0xB0,0x1B,0x02,0xA6,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0xD0,0xFF,0xBD,0x27,
+0x28,0x00,0xB4,0xAF,
+0x24,0x00,0xB3,0xAF,
+0x20,0x00,0xB2,0xAF,
+0x1C,0x00,0xB1,0xAF,
+0x18,0x00,0xB0,0xAF,
+0x2C,0x00,0xBF,0xAF,
+0x02,0x00,0x82,0x90,
+0x02,0x80,0x14,0x3C,
+0x30,0x1F,0x92,0x26,
+0xB0,0x1B,0x43,0x96,
+0x00,0x00,0x85,0x8C,
+0x0F,0x00,0x42,0x30,
+0xC0,0x10,0x02,0x00,
+0x21,0x80,0x44,0x00,
+0x01,0x00,0x63,0x30,
+0xFF,0x3F,0xB3,0x30,
+0x18,0x00,0x11,0x26,
+0x0A,0x00,0x60,0x14,
+0x21,0x20,0x00,0x00,
+0x2C,0x00,0xBF,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x21,0x10,0x80,0x00,
+0x08,0x00,0xE0,0x03,
+0x30,0x00,0xBD,0x27,
+0x55,0x50,0x00,0x0C,
+0x21,0x20,0x20,0x02,
+0x02,0x80,0x04,0x3C,
+0x18,0x3B,0x84,0x24,
+0x21,0x28,0x40,0x00,
+0x39,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0xEF,0xFF,0x40,0x14,
+0x21,0x20,0x00,0x00,
+0xB0,0x1B,0x42,0x96,
+0x00,0x00,0x00,0x00,
+0x00,0x10,0x42,0x30,
+0xEA,0xFF,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x18,0x00,0x03,0x96,
+0x04,0x00,0x04,0x24,
+0x21,0x10,0x80,0x00,
+0x00,0x40,0x63,0x30,
+0x0A,0x10,0x03,0x00,
+0x21,0x10,0x22,0x02,
+0x1C,0x00,0x43,0x94,
+0x1A,0x00,0x45,0x94,
+0x2F,0x00,0x60,0x14,
+0x02,0x00,0x02,0x24,
+0x14,0x00,0xA2,0x10,
+0x01,0x00,0x02,0x24,
+0x0E,0x00,0xA4,0x14,
+0x02,0x80,0x04,0x3C,
+0x78,0x3D,0x43,0x8E,
+0x00,0x00,0x00,0x00,
+0x06,0x00,0x62,0x10,
+0x30,0x1F,0x83,0x26,
+0xB0,0x1B,0x62,0x94,
+0xFF,0xFF,0x04,0x24,
+0xFF,0xDF,0x42,0x30,
+0xE9,0x4B,0x00,0x08,
+0xB0,0x1B,0x62,0xA4,
+0x84,0x14,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xE9,0x4B,0x00,0x08,
+0x21,0x20,0x00,0x00,
+0x2F,0x55,0x00,0x0C,
+0xEC,0xE1,0x84,0x24,
+0x12,0x4C,0x00,0x08,
+0x30,0x1F,0x83,0x26,
+0x78,0x3D,0x43,0x8E,
+0x00,0x00,0x00,0x00,
+0xF5,0xFF,0x62,0x14,
+0xE2,0xFF,0x67,0x26,
+0x36,0x00,0x04,0x26,
+0x10,0x00,0x05,0x24,
+0x55,0x1D,0x00,0x0C,
+0x10,0x00,0xA6,0x27,
+0x16,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x10,0x00,0xA6,0x8F,
+0x02,0x80,0x04,0x3C,
+0xB8,0x5C,0x84,0x24,
+0x10,0x52,0x00,0x0C,
+0x02,0x00,0x45,0x24,
+0xB0,0x1B,0x43,0x96,
+0x21,0x20,0x00,0x00,
+0x03,0x00,0x02,0x24,
+0xDF,0xFF,0x63,0x30,
+0x40,0x00,0x63,0x34,
+0xB0,0x1B,0x43,0xA6,
+0xBC,0x15,0x00,0x0C,
+0x74,0x3D,0x42,0xAE,
+0xE9,0x4B,0x00,0x08,
+0x21,0x20,0x00,0x00,
+0x02,0x80,0x04,0x3C,
+0xBC,0xE1,0x84,0x24,
+0x2F,0x55,0x00,0x0C,
+0x21,0x28,0x60,0x00,
+0x12,0x4C,0x00,0x08,
+0x30,0x1F,0x83,0x26,
+0x02,0x80,0x04,0x3C,
+0x2F,0x55,0x00,0x0C,
+0xD8,0xE1,0x84,0x24,
+0x12,0x4C,0x00,0x08,
+0x30,0x1F,0x83,0x26,
+0xE8,0xFF,0xBD,0x27,
+0x02,0x80,0x02,0x3C,
+0x10,0x00,0xB0,0xAF,
+0x14,0x00,0xBF,0xAF,
+0x30,0x1F,0x50,0x24,
+0x6C,0x3D,0x03,0x8E,
+0xFF,0xFF,0x04,0x24,
+0x01,0x00,0x63,0x24,
+0x05,0x00,0x62,0x2C,
+0x16,0x00,0x40,0x10,
+0x6C,0x3D,0x03,0xAE,
+0xB0,0x1B,0x03,0x96,
+0xBF,0xFF,0x02,0x24,
+0x21,0x20,0x00,0x00,
+0x24,0x10,0x62,0x00,
+0x80,0x00,0x63,0x30,
+0x05,0x00,0x60,0x10,
+0x20,0x00,0x45,0x34,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x01,0x00,0x02,0x24,
+0x74,0x3D,0x02,0xAE,
+0xBC,0x15,0x00,0x0C,
+0xB0,0x1B,0x05,0xA6,
+0xC8,0x00,0x03,0x24,
+0xB4,0x38,0x03,0xAE,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0xB0,0x1B,0x02,0x96,
+0x00,0x00,0x00,0x00,
+0xFF,0xDF,0x42,0x30,
+0x48,0x0E,0x00,0x0C,
+0xB0,0x1B,0x02,0xA6,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0xD0,0xFF,0xBD,0x27,
+0x20,0x00,0xB2,0xAF,
+0x21,0x90,0x80,0x00,
+0x00,0x01,0x04,0x24,
+0x24,0x00,0xB3,0xAF,
+0x1C,0x00,0xB1,0xAF,
+0x21,0x98,0xA0,0x00,
+0x28,0x00,0xBF,0xAF,
+0x25,0x24,0x00,0x0C,
+0x18,0x00,0xB0,0xAF,
+0x02,0x80,0x04,0x3C,
+0x02,0x80,0x05,0x3C,
+0x21,0x88,0x40,0x00,
+0x20,0xE2,0x84,0x24,
+0x37,0x00,0x40,0x10,
+0x04,0xEB,0xA5,0x24,
+0x2F,0x55,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x30,0x96,
+0x02,0x80,0x02,0x3C,
+0x21,0x28,0x40,0x02,
+0x25,0x80,0x02,0x02,
+0x24,0x00,0x04,0x26,
+0x20,0x00,0x00,0xA6,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x02,0x80,0x05,0x3C,
+0x2A,0x00,0x04,0x26,
+0x18,0x3B,0xA5,0x24,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x02,0x80,0x05,0x3C,
+0x30,0x00,0x04,0x26,
+0x88,0x58,0xA5,0x24,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x20,0x00,0x03,0x96,
+0x18,0x00,0x02,0x24,
+0x02,0x80,0x05,0x3C,
+0x03,0xFF,0x63,0x30,
+0xC0,0x00,0x63,0x34,
+0x20,0x00,0x03,0xA6,
+0x30,0x1F,0xA5,0x24,
+0x0C,0x00,0x22,0xAE,
+0xF8,0x1D,0xA3,0x94,
+0x20,0x00,0x07,0x26,
+0x38,0x00,0x04,0x26,
+0xFF,0x0F,0x62,0x30,
+0x00,0x11,0x02,0x00,
+0x02,0x32,0x02,0x00,
+0x01,0x00,0x63,0x24,
+0xF8,0x1D,0xA3,0xA4,
+0x17,0x00,0xE6,0xA0,
+0x16,0x00,0xE2,0xA0,
+0x10,0x00,0xA6,0x27,
+0x0C,0x00,0x27,0x26,
+0x02,0x00,0x05,0x24,
+0x68,0x4F,0x00,0x0C,
+0x10,0x00,0xB3,0xA7,
+0x21,0x20,0x20,0x02,
+0x21,0x28,0x00,0x00,
+0xB9,0x0C,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x28,0x00,0xBF,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x30,0x00,0xBD,0x27,
+0x02,0x80,0x04,0x3C,
+0x2F,0x55,0x00,0x0C,
+0x14,0xE2,0x84,0x24,
+0x28,0x00,0xBF,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x30,0x00,0xBD,0x27,
+0xD0,0xFF,0xBD,0x27,
+0x20,0x00,0xB2,0xAF,
+0x21,0x90,0x80,0x00,
+0x00,0x01,0x04,0x24,
+0x24,0x00,0xB3,0xAF,
+0x1C,0x00,0xB1,0xAF,
+0x21,0x98,0xA0,0x00,
+0x28,0x00,0xBF,0xAF,
+0x25,0x24,0x00,0x0C,
+0x18,0x00,0xB0,0xAF,
+0x02,0x80,0x04,0x3C,
+0x02,0x80,0x05,0x3C,
+0x21,0x88,0x40,0x00,
+0x3C,0xE2,0x84,0x24,
+0x37,0x00,0x40,0x10,
+0x14,0xEB,0xA5,0x24,
+0x2F,0x55,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x30,0x96,
+0x02,0x80,0x02,0x3C,
+0x21,0x28,0x40,0x02,
+0x25,0x80,0x02,0x02,
+0x24,0x00,0x04,0x26,
+0x20,0x00,0x00,0xA6,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x02,0x80,0x05,0x3C,
+0x2A,0x00,0x04,0x26,
+0x18,0x3B,0xA5,0x24,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x02,0x80,0x05,0x3C,
+0x30,0x00,0x04,0x26,
+0x88,0x58,0xA5,0x24,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x20,0x00,0x03,0x96,
+0x18,0x00,0x02,0x24,
+0x02,0x80,0x05,0x3C,
+0x03,0xFF,0x63,0x30,
+0xA0,0x00,0x63,0x34,
+0x20,0x00,0x03,0xA6,
+0x30,0x1F,0xA5,0x24,
+0x0C,0x00,0x22,0xAE,
+0xF8,0x1D,0xA3,0x94,
+0x20,0x00,0x07,0x26,
+0x38,0x00,0x04,0x26,
+0xFF,0x0F,0x62,0x30,
+0x00,0x11,0x02,0x00,
+0x02,0x32,0x02,0x00,
+0x01,0x00,0x63,0x24,
+0xF8,0x1D,0xA3,0xA4,
+0x17,0x00,0xE6,0xA0,
+0x16,0x00,0xE2,0xA0,
+0x10,0x00,0xA6,0x27,
+0x0C,0x00,0x27,0x26,
+0x02,0x00,0x05,0x24,
+0x68,0x4F,0x00,0x0C,
+0x10,0x00,0xB3,0xA7,
+0x21,0x20,0x20,0x02,
+0x21,0x28,0x00,0x00,
+0xB9,0x0C,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x28,0x00,0xBF,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x30,0x00,0xBD,0x27,
+0x02,0x80,0x04,0x3C,
+0x2F,0x55,0x00,0x0C,
+0x30,0xE2,0x84,0x24,
+0x28,0x00,0xBF,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x30,0x00,0xBD,0x27,
+0xC8,0xFF,0xBD,0x27,
+0x2C,0x00,0xB1,0xAF,
+0xFF,0xFF,0x05,0x24,
+0x21,0x88,0x80,0x00,
+0x02,0x00,0x06,0x24,
+0x10,0x00,0xA4,0x27,
+0x34,0x00,0xBF,0xAF,
+0x30,0x00,0xB2,0xAF,
+0x08,0x52,0x00,0x0C,
+0x28,0x00,0xB0,0xAF,
+0x08,0x00,0x30,0x96,
+0x02,0x80,0x02,0x3C,
+0x21,0x28,0x00,0x00,
+0x25,0x80,0x02,0x02,
+0x21,0x20,0x00,0x02,
+0x08,0x52,0x00,0x0C,
+0x10,0x00,0x06,0x24,
+0x20,0x00,0x02,0x96,
+0x24,0x00,0x04,0x26,
+0x10,0x00,0xA5,0x27,
+0x03,0xFF,0x42,0x30,
+0xC8,0x00,0x42,0x34,
+0x20,0x00,0x02,0xA6,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x25,0xB0,0x03,0x3C,
+0x50,0x00,0x62,0x34,
+0x00,0x00,0x44,0x8C,
+0x54,0x00,0x65,0x34,
+0x58,0x00,0x66,0x34,
+0x18,0x00,0xA4,0xAF,
+0x00,0x00,0xA2,0x8C,
+0x5C,0x00,0x63,0x34,
+0x2A,0x00,0x04,0x26,
+0x1C,0x00,0xA2,0xAF,
+0x00,0x00,0xC7,0x8C,
+0x18,0x00,0xA5,0x27,
+0x06,0x00,0x06,0x24,
+0x20,0x00,0xA7,0xAF,
+0x00,0x00,0x62,0x8C,
+0x1A,0x00,0x12,0x24,
+0x10,0x52,0x00,0x0C,
+0x24,0x00,0xA2,0xAF,
+0x30,0x00,0x04,0x26,
+0x20,0x00,0xA5,0x27,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x13,0x00,0x03,0x24,
+0x14,0x00,0x23,0xAE,
+0x0C,0x00,0x32,0xAE,
+0x08,0x00,0x05,0x8E,
+0x04,0x00,0x04,0x8E,
+0xFF,0xDF,0x02,0x3C,
+0x14,0x00,0x06,0x8E,
+0xFF,0xFF,0x42,0x34,
+0x10,0x00,0x07,0x8E,
+0xFF,0xE0,0x03,0x24,
+0x24,0x28,0xA2,0x00,
+0x00,0x40,0x02,0x3C,
+0x24,0x20,0x83,0x00,
+0x25,0x28,0xA2,0x00,
+0xFF,0x81,0x03,0x24,
+0xFE,0xFF,0x02,0x3C,
+0x24,0x30,0xC3,0x00,
+0xFF,0xFF,0x42,0x34,
+0x00,0x12,0x84,0x34,
+0x00,0x80,0x03,0x3C,
+0x24,0x20,0x82,0x00,
+0x25,0x38,0xE3,0x00,
+0x00,0x26,0xC6,0x34,
+0x80,0x00,0xA5,0x34,
+0x20,0x00,0x02,0x24,
+0x00,0x00,0x12,0xA6,
+0x10,0x00,0x07,0xAE,
+0x02,0x00,0x02,0xA2,
+0x14,0x00,0x06,0xAE,
+0x04,0x00,0x04,0xAE,
+0x08,0x00,0x05,0xAE,
+0x34,0x00,0xBF,0x8F,
+0x30,0x00,0xB2,0x8F,
+0x2C,0x00,0xB1,0x8F,
+0x28,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x38,0x00,0xBD,0x27,
+0xC8,0xFF,0xBD,0x27,
+0x1C,0x00,0xB1,0xAF,
+0x01,0x80,0x02,0x3C,
+0x25,0xB0,0x11,0x3C,
+0x18,0x03,0x23,0x36,
+0x80,0x35,0x42,0x24,
+0x28,0x00,0xB4,0xAF,
+0x20,0x00,0xB2,0xAF,
+0x21,0xA0,0x80,0x00,
+0x48,0x00,0xB2,0x93,
+0xFF,0x00,0xE4,0x30,
+0x00,0x00,0x62,0xAC,
+0x24,0x00,0xB3,0xAF,
+0x18,0x00,0xB0,0xAF,
+0x30,0x00,0xBF,0xAF,
+0x2C,0x00,0xB5,0xAF,
+0xFF,0x00,0xB3,0x30,
+0x0D,0x24,0x00,0x0C,
+0xFF,0x00,0xD0,0x30,
+0x66,0x00,0x40,0x10,
+0x10,0x00,0xA2,0xAF,
+0x08,0x00,0x44,0x8C,
+0xB0,0x03,0x22,0x36,
+0x00,0x00,0x44,0xAC,
+0x10,0x00,0xA3,0x8F,
+0x02,0x80,0x02,0x3C,
+0x08,0x00,0x64,0x94,
+0x00,0x00,0x00,0x00,
+0x25,0x88,0x82,0x00,
+0x41,0x00,0x40,0x16,
+0x20,0x00,0x24,0x26,
+0x48,0x00,0x02,0x24,
+0x43,0x00,0x02,0x12,
+0x20,0x00,0x30,0xA6,
+0x04,0x00,0x02,0x24,
+0x47,0x00,0x62,0x16,
+0x21,0x28,0x80,0x02,
+0xA4,0x00,0x02,0x24,
+0x61,0x00,0x02,0x12,
+0x02,0x80,0x02,0x3C,
+0x10,0x00,0xA2,0x8F,
+0x25,0xB0,0x10,0x3C,
+0xB0,0x03,0x10,0x36,
+0x0C,0x00,0x55,0xAC,
+0x10,0x00,0xA2,0x8F,
+0x12,0x00,0x03,0x24,
+0x21,0x28,0x00,0x00,
+0x14,0x00,0x43,0xAC,
+0x00,0x00,0x15,0xAE,
+0x10,0x00,0xA2,0x8F,
+0x08,0x00,0x06,0x24,
+0x08,0x00,0x43,0x8C,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x03,0xAE,
+0x10,0x00,0xA2,0x8F,
+0x02,0x80,0x03,0x3C,
+0x08,0x00,0x44,0x94,
+0x00,0x00,0x00,0x00,
+0x25,0x88,0x83,0x00,
+0x08,0x52,0x00,0x0C,
+0x21,0x20,0x20,0x02,
+0x14,0x00,0x25,0x8E,
+0x08,0x00,0x24,0x8E,
+0xFF,0xDF,0x02,0x3C,
+0xFF,0x81,0x03,0x24,
+0xFF,0xFF,0x42,0x34,
+0x24,0x28,0xA3,0x00,
+0x24,0x20,0x82,0x00,
+0x00,0x40,0x03,0x3C,
+0x25,0x20,0x83,0x00,
+0x20,0x00,0x02,0x24,
+0x00,0x24,0xA5,0x34,
+0x00,0x00,0x35,0xA6,
+0x02,0x00,0x22,0xA2,
+0x08,0x00,0x24,0xAE,
+0x14,0x00,0x25,0xAE,
+0x02,0x80,0x02,0x3C,
+0x10,0x00,0xA3,0x8F,
+0x74,0x57,0x42,0x24,
+0x04,0x00,0x44,0x8C,
+0x00,0x00,0x62,0xAC,
+0x04,0x00,0x43,0xAC,
+0x10,0x00,0xA2,0x27,
+0x00,0x00,0x83,0xAC,
+0x04,0x00,0x64,0xAC,
+0x30,0x00,0xBF,0x8F,
+0x00,0x00,0x02,0xAE,
+0x2C,0x00,0xB5,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x38,0x00,0xBD,0x27,
+0x00,0x10,0x02,0x36,
+0x20,0x00,0x22,0xA6,
+0x48,0x00,0x02,0x24,
+0xC0,0xFF,0x02,0x16,
+0x04,0x00,0x02,0x24,
+0x20,0x00,0x22,0x96,
+0x00,0x00,0x00,0x00,
+0x00,0x01,0x42,0x34,
+0x20,0x00,0x22,0xA6,
+0x04,0x00,0x02,0x24,
+0xBB,0xFF,0x62,0x12,
+0x21,0x28,0x80,0x02,
+0x24,0x00,0x24,0x26,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x02,0x80,0x05,0x3C,
+0x18,0x3B,0xA5,0x24,
+0x2A,0x00,0x24,0x26,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x02,0x80,0x05,0x3C,
+0x30,0x00,0x24,0x26,
+0x88,0x58,0xA5,0x24,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x88,0x4D,0x00,0x08,
+0x18,0x00,0x15,0x24,
+0x02,0x80,0x04,0x3C,
+0x02,0x80,0x05,0x3C,
+0x4C,0xE2,0x84,0x24,
+0x2F,0x55,0x00,0x0C,
+0x24,0xEB,0xA5,0x24,
+0x30,0x00,0xBF,0x8F,
+0x2C,0x00,0xB5,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x38,0x00,0xBD,0x27,
+0x80,0x58,0x43,0x94,
+0x02,0x80,0x05,0x3C,
+0x88,0x58,0xA5,0x24,
+0x00,0xC0,0x63,0x24,
+0xFF,0xFF,0x63,0x30,
+0x02,0x12,0x03,0x00,
+0x02,0x00,0x83,0xA0,
+0x03,0x00,0x82,0xA0,
+0x06,0x00,0x06,0x24,
+0x10,0x52,0x00,0x0C,
+0x24,0x00,0x24,0x26,
+0x02,0x80,0x05,0x3C,
+0x2A,0x00,0x24,0x26,
+0x18,0x3B,0xA5,0x24,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x88,0x4D,0x00,0x08,
+0x18,0x00,0x15,0x24,
+0xB0,0xFF,0xBD,0x27,
+0x3C,0x00,0xB5,0xAF,
+0x38,0x00,0xB4,0xAF,
+0xFF,0xFF,0xF5,0x30,
+0x25,0xB0,0x14,0x3C,
+0x01,0x80,0x02,0x3C,
+0x2C,0x00,0xB1,0xAF,
+0x18,0x03,0x83,0x36,
+0xE8,0x37,0x42,0x24,
+0x20,0x00,0xB1,0x26,
+0x44,0x00,0xB7,0xAF,
+0x34,0x00,0xB3,0xAF,
+0x21,0xB8,0x80,0x00,
+0x60,0x00,0xB3,0x93,
+0x21,0x20,0x20,0x02,
+0x00,0x00,0x62,0xAC,
+0x40,0x00,0xB6,0xAF,
+0x30,0x00,0xB2,0xAF,
+0x48,0x00,0xBF,0xAF,
+0x28,0x00,0xB0,0xAF,
+0xFF,0x00,0xB6,0x30,
+0x25,0x24,0x00,0x0C,
+0xFF,0x00,0xD2,0x30,
+0x11,0x00,0x40,0x14,
+0x20,0x00,0xA2,0xAF,
+0x02,0x80,0x04,0x3C,
+0x02,0x80,0x05,0x3C,
+0x58,0xE2,0x84,0x24,
+0x2F,0x55,0x00,0x0C,
+0x30,0xEB,0xA5,0x24,
+0x48,0x00,0xBF,0x8F,
+0x44,0x00,0xB7,0x8F,
+0x40,0x00,0xB6,0x8F,
+0x3C,0x00,0xB5,0x8F,
+0x38,0x00,0xB4,0x8F,
+0x34,0x00,0xB3,0x8F,
+0x30,0x00,0xB2,0x8F,
+0x2C,0x00,0xB1,0x8F,
+0x28,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x50,0x00,0xBD,0x27,
+0x08,0x00,0x43,0x8C,
+0xB0,0x03,0x82,0x36,
+0x02,0x80,0x10,0x3C,
+0x00,0x00,0x43,0xAC,
+0x20,0x00,0xA2,0x8F,
+0x21,0x30,0x20,0x02,
+0x21,0x28,0x00,0x00,
+0x08,0x00,0x44,0x94,
+0xFF,0x51,0x00,0x0C,
+0x25,0x20,0x90,0x00,
+0x20,0x00,0xA3,0x8F,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x62,0x94,
+0x00,0x00,0x00,0x00,
+0x25,0x88,0x50,0x00,
+0x51,0x00,0x60,0x16,
+0x20,0x00,0x30,0x26,
+0x20,0x00,0x32,0xA6,
+0x48,0x00,0x02,0x24,
+0x6C,0x00,0x42,0x12,
+0x50,0x00,0x82,0x36,
+0x04,0x00,0x02,0x24,
+0x4D,0x00,0xC2,0x16,
+0x21,0x28,0xE0,0x02,
+0xA4,0x00,0x02,0x24,
+0x7E,0x00,0x42,0x12,
+0x02,0x80,0x02,0x3C,
+0x20,0x00,0xA2,0x8F,
+0x25,0xB0,0x10,0x3C,
+0xB0,0x03,0x10,0x36,
+0x0C,0x00,0x55,0xAC,
+0x20,0x00,0xA2,0x8F,
+0x12,0x00,0x03,0x24,
+0x21,0x28,0x00,0x00,
+0x14,0x00,0x43,0xAC,
+0x00,0x00,0x15,0xAE,
+0x20,0x00,0xA2,0x8F,
+0x08,0x00,0x06,0x24,
+0x08,0x00,0x43,0x8C,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x03,0xAE,
+0x20,0x00,0xA2,0x8F,
+0x02,0x80,0x03,0x3C,
+0x08,0x00,0x44,0x94,
+0x00,0x00,0x00,0x00,
+0x25,0x88,0x83,0x00,
+0x08,0x52,0x00,0x0C,
+0x21,0x20,0x20,0x02,
+0x04,0x00,0x25,0x8E,
+0x08,0x00,0x26,0x8E,
+0x14,0x00,0x27,0x8E,
+0x10,0x00,0x24,0x8E,
+0xFF,0xE0,0x03,0x24,
+0xFF,0xDF,0x02,0x3C,
+0x24,0x28,0xA3,0x00,
+0xFF,0xFF,0x42,0x34,
+0xFF,0x81,0x03,0x24,
+0x24,0x38,0xE3,0x00,
+0x24,0x30,0xC2,0x00,
+0x00,0x80,0x03,0x3C,
+0x00,0x40,0x02,0x3C,
+0x25,0x30,0xC2,0x00,
+0x25,0x20,0x83,0x00,
+0x00,0x12,0xA5,0x34,
+0x20,0x00,0x02,0x24,
+0x10,0x00,0x24,0xAE,
+0x00,0x00,0x35,0xA6,
+0x02,0x00,0x22,0xA2,
+0x04,0x00,0x25,0xAE,
+0x14,0x00,0x27,0xAE,
+0x08,0x00,0x26,0xAE,
+0x00,0x60,0x05,0x40,
+0x01,0x00,0xA1,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x02,0x80,0x02,0x3C,
+0x20,0x00,0xA3,0x8F,
+0x74,0x57,0x42,0x24,
+0x04,0x00,0x44,0x8C,
+0x00,0x00,0x62,0xAC,
+0x04,0x00,0x43,0xAC,
+0x20,0x00,0xA2,0x27,
+0x00,0x00,0x83,0xAC,
+0x04,0x00,0x64,0xAC,
+0x00,0x00,0x02,0xAE,
+0x00,0x60,0x85,0x40,
+0x48,0x00,0xBF,0x8F,
+0x44,0x00,0xB7,0x8F,
+0x40,0x00,0xB6,0x8F,
+0x3C,0x00,0xB5,0x8F,
+0x38,0x00,0xB4,0x8F,
+0x34,0x00,0xB3,0x8F,
+0x30,0x00,0xB2,0x8F,
+0x2C,0x00,0xB1,0x8F,
+0x28,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x50,0x00,0xBD,0x27,
+0x00,0x10,0x42,0x36,
+0x35,0x4E,0x00,0x08,
+0x20,0x00,0x22,0xA6,
+0x24,0x00,0x24,0x26,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x02,0x80,0x05,0x3C,
+0x18,0x3B,0xA5,0x24,
+0x2A,0x00,0x24,0x26,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x02,0x80,0x05,0x3C,
+0x30,0x00,0x24,0x26,
+0x88,0x58,0xA5,0x24,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x02,0x80,0x05,0x3C,
+0x30,0x1F,0xA5,0x24,
+0xF8,0x1D,0xA6,0x94,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0xC2,0x24,
+0x00,0x21,0x06,0x00,
+0xFF,0xFF,0x46,0x30,
+0xFF,0xFF,0x84,0x30,
+0x00,0x10,0xC2,0x2C,
+0x0A,0x30,0x02,0x00,
+0x02,0x1A,0x04,0x00,
+0x17,0x00,0x03,0xA2,
+0x16,0x00,0x04,0xA2,
+0x3E,0x4E,0x00,0x08,
+0xF8,0x1D,0xA6,0xA4,
+0x00,0x00,0x43,0x8C,
+0x54,0x00,0x84,0x36,
+0x58,0x00,0x85,0x36,
+0x10,0x00,0xA3,0xAF,
+0x00,0x00,0x82,0x8C,
+0x5C,0x00,0x87,0x36,
+0x2A,0x00,0x24,0x26,
+0x14,0x00,0xA2,0xAF,
+0x00,0x00,0xA3,0x8C,
+0x06,0x00,0x06,0x24,
+0x10,0x00,0xA5,0x27,
+0x18,0x00,0xA3,0xAF,
+0x00,0x00,0xE2,0x8C,
+0x10,0x52,0x00,0x0C,
+0x1C,0x00,0xA2,0xAF,
+0x30,0x00,0x24,0x26,
+0x18,0x00,0xA5,0x27,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x20,0x00,0x23,0x96,
+0x00,0x00,0x00,0x00,
+0x00,0x01,0x63,0x34,
+0x38,0x4E,0x00,0x08,
+0x20,0x00,0x23,0xA6,
+0x80,0x58,0x43,0x94,
+0x02,0x80,0x05,0x3C,
+0x24,0x00,0x24,0x26,
+0x00,0xC0,0x63,0x24,
+0xFF,0xFF,0x63,0x30,
+0x02,0x12,0x03,0x00,
+0x88,0x58,0xA5,0x24,
+0x03,0x00,0x02,0xA2,
+0x02,0x00,0x03,0xA2,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x02,0x80,0x05,0x3C,
+0x2A,0x00,0x24,0x26,
+0x18,0x3B,0xA5,0x24,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x3E,0x4E,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0xE0,0xFF,0xBD,0x27,
+0x18,0x00,0xB0,0xAF,
+0xFF,0x00,0x90,0x30,
+0x02,0x80,0x04,0x3C,
+0x21,0x28,0x00,0x02,
+0x1C,0x00,0xBF,0xAF,
+0x2F,0x55,0x00,0x0C,
+0x64,0xE2,0x84,0x24,
+0x02,0x80,0x04,0x3C,
+0x88,0x58,0x84,0x24,
+0x08,0x00,0x05,0x24,
+0x48,0x00,0x06,0x24,
+0x18,0x00,0x07,0x24,
+0xFA,0x4D,0x00,0x0C,
+0x10,0x00,0xB0,0xAF,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0xE0,0xFF,0xBD,0x27,
+0x01,0x00,0x02,0x24,
+0x21,0x28,0x00,0x00,
+0x90,0x00,0x06,0x24,
+0x21,0x38,0x00,0x00,
+0x18,0x00,0xBF,0xAF,
+0x60,0x4D,0x00,0x0C,
+0x10,0x00,0xA2,0xAF,
+0x18,0x00,0xBF,0x8F,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0xD8,0xFF,0xBD,0x27,
+0x20,0x00,0xB0,0xAF,
+0xFF,0xFF,0x05,0x24,
+0xFF,0x00,0x90,0x30,
+0x02,0x00,0x06,0x24,
+0x24,0x00,0xBF,0xAF,
+0x08,0x52,0x00,0x0C,
+0x18,0x00,0xA4,0x27,
+0x18,0x00,0xA4,0x27,
+0x08,0x00,0x05,0x24,
+0xC8,0x00,0x06,0x24,
+0x21,0x38,0x00,0x00,
+0x60,0x4D,0x00,0x0C,
+0x10,0x00,0xB0,0xAF,
+0x24,0x00,0xBF,0x8F,
+0x20,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0xE0,0xFF,0xBD,0x27,
+0x02,0x80,0x05,0x3C,
+0x1C,0x00,0xBF,0xAF,
+0x18,0x00,0xB0,0xAF,
+0x30,0x1F,0xA5,0x24,
+0x50,0x39,0xA2,0x94,
+0x01,0x00,0x03,0x24,
+0xFF,0x00,0x90,0x30,
+0x00,0xC0,0x42,0x24,
+0xFF,0xFF,0x44,0x30,
+0xC2,0x34,0x00,0x0C,
+0x2A,0x1C,0xA3,0xA0,
+0x02,0x80,0x04,0x3C,
+0x88,0x58,0x84,0x24,
+0x04,0x00,0x05,0x24,
+0xA4,0x00,0x06,0x24,
+0x10,0x00,0x07,0x24,
+0xFA,0x4D,0x00,0x0C,
+0x10,0x00,0xB0,0xAF,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x80,0x00,
+0x08,0x00,0xE0,0x03,
+0x08,0x00,0x82,0x24,
+0xE0,0xFF,0xBD,0x27,
+0x18,0x00,0xBF,0xAF,
+0x17,0x4F,0x00,0x0C,
+0x74,0x00,0x84,0x24,
+0x21,0x28,0x40,0x00,
+0x10,0x00,0xA4,0x27,
+0x10,0x52,0x00,0x0C,
+0x02,0x00,0x06,0x24,
+0x10,0x00,0xA2,0x97,
+0x18,0x00,0xBF,0x8F,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0xE0,0xFF,0xBD,0x27,
+0x18,0x00,0xBF,0xAF,
+0x17,0x4F,0x00,0x0C,
+0x10,0x00,0xA5,0xA7,
+0x21,0x20,0x40,0x00,
+0x10,0x00,0xA5,0x27,
+0x10,0x52,0x00,0x0C,
+0x02,0x00,0x06,0x24,
+0x18,0x00,0xBF,0x8F,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x08,0x00,0xE0,0x03,
+0x0A,0x00,0x82,0x24,
+0xE0,0xFF,0xBD,0x27,
+0x18,0x00,0xBF,0xAF,
+0x32,0x4F,0x00,0x0C,
+0x74,0x00,0x84,0x24,
+0x21,0x28,0x40,0x00,
+0x10,0x00,0xA4,0x27,
+0x10,0x52,0x00,0x0C,
+0x02,0x00,0x06,0x24,
+0x10,0x00,0xA2,0x97,
+0x18,0x00,0xBF,0x8F,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0xE0,0xFF,0xBD,0x27,
+0x10,0x00,0xB0,0xAF,
+0x21,0x80,0x80,0x00,
+0x00,0x00,0x05,0xA2,
+0x01,0x00,0x06,0xA2,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x1C,0x00,0xBF,0xAF,
+0x21,0x88,0xC0,0x00,
+0x02,0x00,0x84,0x24,
+0x30,0x00,0xB2,0x8F,
+0x0D,0x00,0xC0,0x14,
+0x21,0x28,0xE0,0x00,
+0x00,0x00,0x43,0x8E,
+0x21,0x10,0x11,0x02,
+0x1C,0x00,0xBF,0x8F,
+0x21,0x18,0x71,0x00,
+0x02,0x00,0x63,0x24,
+0x00,0x00,0x43,0xAE,
+0x14,0x00,0xB1,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x02,0x00,0x42,0x24,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x10,0x52,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x43,0x8E,
+0x21,0x10,0x11,0x02,
+0x1C,0x00,0xBF,0x8F,
+0x21,0x18,0x71,0x00,
+0x02,0x00,0x63,0x24,
+0x00,0x00,0x43,0xAE,
+0x14,0x00,0xB1,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x02,0x00,0x42,0x24,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0xE0,0xFF,0xBD,0x27,
+0x10,0x00,0xB0,0xAF,
+0x21,0x80,0xA0,0x00,
+0x18,0x00,0xB2,0xAF,
+0x21,0x28,0xC0,0x00,
+0x21,0x90,0xE0,0x00,
+0x21,0x30,0x00,0x02,
+0x1C,0x00,0xBF,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x52,0x00,0x0C,
+0x21,0x88,0x80,0x00,
+0x00,0x00,0x43,0x8E,
+0x21,0x10,0x30,0x02,
+0x1C,0x00,0xBF,0x8F,
+0x21,0x18,0x70,0x00,
+0x00,0x00,0x43,0xAE,
+0x14,0x00,0xB1,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x7F,0x00,0x84,0x30,
+0x6D,0x00,0x82,0x2C,
+0x0A,0x00,0x40,0x10,
+0x21,0x28,0x00,0x00,
+0x02,0x80,0x03,0x3C,
+0x80,0x10,0x04,0x00,
+0x58,0xEB,0x63,0x24,
+0x21,0x10,0x43,0x00,
+0x00,0x00,0x44,0x8C,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x80,0x00,
+0x00,0x00,0x00,0x00,
+0x21,0x28,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0xA0,0x00,
+0x0B,0x00,0x05,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0xA0,0x00,
+0x0A,0x00,0x05,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0xA0,0x00,
+0x09,0x00,0x05,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0xA0,0x00,
+0x08,0x00,0x05,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0xA0,0x00,
+0x07,0x00,0x05,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0xA0,0x00,
+0x06,0x00,0x05,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0xA0,0x00,
+0x03,0x00,0x05,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0xA0,0x00,
+0x05,0x00,0x05,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0xA0,0x00,
+0x04,0x00,0x05,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0xA0,0x00,
+0x02,0x00,0x05,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0xA0,0x00,
+0x01,0x00,0x05,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0xA0,0x00,
+0x7F,0x00,0x84,0x30,
+0x0C,0x00,0x82,0x2C,
+0x0A,0x00,0x40,0x10,
+0x21,0x18,0x00,0x00,
+0x02,0x80,0x03,0x3C,
+0x80,0x10,0x04,0x00,
+0x0C,0xED,0x63,0x24,
+0x21,0x10,0x43,0x00,
+0x00,0x00,0x44,0x8C,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x80,0x00,
+0x00,0x00,0x00,0x00,
+0x6C,0x00,0x03,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x60,0x00,0x03,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x48,0x00,0x03,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x30,0x00,0x03,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x24,0x00,0x03,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x18,0x00,0x03,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x12,0x00,0x03,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x0C,0x00,0x03,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x16,0x00,0x03,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x0B,0x00,0x03,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x04,0x00,0x03,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x02,0x00,0x03,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0xC8,0xFF,0xBD,0x27,
+0x24,0x00,0xB5,0xAF,
+0x02,0x80,0x15,0x3C,
+0x2C,0x00,0xB7,0xAF,
+0x28,0x00,0xB6,0xAF,
+0x20,0x00,0xB4,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x30,0x00,0xBF,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x21,0xB8,0x80,0x00,
+0x21,0xA0,0x00,0x00,
+0x21,0x98,0x00,0x00,
+0x30,0x1F,0xB6,0x26,
+0x30,0x1F,0xA2,0x26,
+0x21,0x10,0x62,0x02,
+0xFB,0x1B,0x51,0x90,
+0xFE,0x00,0x03,0x24,
+0x1E,0x00,0x23,0x12,
+0xFF,0x00,0x02,0x24,
+0x21,0x00,0x22,0x12,
+0x21,0x10,0x80,0x02,
+0xAD,0x4F,0x00,0x0C,
+0x21,0x20,0x20,0x02,
+0x21,0x88,0x40,0x00,
+0x21,0x80,0x00,0x00,
+0x21,0x90,0xC0,0x02,
+0x21,0x10,0x12,0x02,
+0xEE,0x1B,0x44,0x90,
+0x00,0x00,0x00,0x00,
+0x02,0x00,0x82,0x24,
+0xFF,0x00,0x42,0x30,
+0x02,0x00,0x42,0x2C,
+0x05,0x00,0x40,0x14,
+0x01,0x00,0x10,0x26,
+0xAD,0x4F,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x05,0x00,0x51,0x10,
+0x01,0x00,0x03,0x24,
+0x0D,0x00,0x02,0x2A,
+0xF3,0xFF,0x40,0x14,
+0x21,0x10,0x12,0x02,
+0x21,0x18,0x00,0x00,
+0x01,0x00,0x02,0x24,
+0x14,0x00,0x62,0x10,
+0xFF,0x00,0x22,0x32,
+0x21,0x10,0xF4,0x02,
+0x00,0x00,0x51,0xA0,
+0x01,0x00,0x94,0x26,
+0x01,0x00,0x73,0x26,
+0x0D,0x00,0x62,0x2A,
+0xDB,0xFF,0x40,0x14,
+0x30,0x1F,0xA2,0x26,
+0x21,0x10,0x80,0x02,
+0x30,0x00,0xBF,0x8F,
+0x2C,0x00,0xB7,0x8F,
+0x28,0x00,0xB6,0x8F,
+0x24,0x00,0xB5,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x38,0x00,0xBD,0x27,
+0x0C,0x50,0x00,0x08,
+0x80,0x00,0x51,0x34,
+0xD0,0xFF,0xBD,0x27,
+0x24,0x00,0xB1,0xAF,
+0x20,0x00,0xB0,0xAF,
+0x21,0x88,0x80,0x00,
+0x21,0x80,0xA0,0x00,
+0x0D,0x00,0x06,0x24,
+0x21,0x28,0x00,0x00,
+0x28,0x00,0xBF,0xAF,
+0xFF,0x51,0x00,0x0C,
+0x10,0x00,0xA4,0x27,
+0xDD,0x4F,0x00,0x0C,
+0x10,0x00,0xA4,0x27,
+0x00,0x00,0x02,0xAE,
+0x21,0x20,0x20,0x02,
+0x10,0x00,0xA5,0x27,
+0x10,0x52,0x00,0x0C,
+0x21,0x30,0x40,0x00,
+0x28,0x00,0xBF,0x8F,
+0x24,0x00,0xB1,0x8F,
+0x20,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x30,0x00,0xBD,0x27,
+0x21,0x28,0x00,0x00,
+0x21,0x10,0x85,0x00,
+0x00,0x00,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0x04,0x00,0x60,0x10,
+0x0D,0x00,0xA2,0x2C,
+0xFA,0xFF,0x40,0x14,
+0x01,0x00,0xA5,0x24,
+0xFF,0xFF,0xA5,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0xA0,0x00,
+0x00,0x00,0x82,0x94,
+0x21,0x30,0x80,0x00,
+0x10,0x00,0x85,0x24,
+0x42,0x1A,0x02,0x00,
+0xC2,0x11,0x02,0x00,
+0x02,0x00,0x42,0x30,
+0x01,0x00,0x63,0x30,
+0x25,0x18,0x43,0x00,
+0x01,0x00,0x04,0x24,
+0x07,0x00,0x64,0x10,
+0x00,0x00,0x00,0x00,
+0x05,0x00,0x60,0x10,
+0x0A,0x00,0xC5,0x24,
+0x02,0x00,0x02,0x24,
+0x02,0x00,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0x18,0x00,0xC5,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0xA0,0x00,
+0x00,0x00,0x82,0x94,
+0x21,0x30,0x80,0x00,
+0x04,0x00,0x85,0x24,
+0x42,0x1A,0x02,0x00,
+0xC2,0x11,0x02,0x00,
+0x02,0x00,0x42,0x30,
+0x01,0x00,0x63,0x30,
+0x25,0x18,0x43,0x00,
+0x01,0x00,0x04,0x24,
+0x04,0x00,0x64,0x10,
+0x00,0x00,0x00,0x00,
+0x02,0x00,0x60,0x10,
+0x00,0x00,0x00,0x00,
+0x10,0x00,0xC5,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0xA0,0x00,
+0x13,0x00,0xA0,0x18,
+0x21,0x30,0x00,0x00,
+0x02,0x00,0x07,0x24,
+0x04,0x00,0x08,0x24,
+0x0B,0x00,0x09,0x24,
+0x16,0x00,0x0A,0x24,
+0x21,0x10,0x86,0x00,
+0x00,0x00,0x43,0x90,
+0x01,0x00,0xC6,0x24,
+0x7F,0x00,0x63,0x30,
+0x07,0x00,0x67,0x10,
+0x2A,0x10,0xC5,0x00,
+0x05,0x00,0x68,0x10,
+0x00,0x00,0x00,0x00,
+0x03,0x00,0x69,0x10,
+0x00,0x00,0x00,0x00,
+0x05,0x00,0x6A,0x14,
+0x00,0x00,0x00,0x00,
+0xF3,0xFF,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x01,0x00,0x02,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0xE8,0xFF,0xBD,0x27,
+0x10,0x00,0xB0,0xAF,
+0x14,0x00,0xBF,0xAF,
+0x02,0x80,0x02,0x3C,
+0x80,0x5D,0x43,0x8C,
+0x08,0x00,0x10,0x24,
+0x06,0x00,0xA0,0x14,
+0x0A,0x80,0x03,0x00,
+0x21,0x10,0x00,0x02,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x65,0x50,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x03,0x36,
+0x01,0x00,0x42,0x38,
+0x03,0x00,0x04,0x36,
+0x21,0x80,0x60,0x00,
+0x0B,0x80,0x82,0x00,
+0x21,0x10,0x00,0x02,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0xD8,0xFF,0xBD,0x27,
+0x14,0x00,0xB1,0xAF,
+0x0E,0x00,0xA3,0x2C,
+0x21,0x88,0xA0,0x00,
+0x0D,0x00,0x02,0x24,
+0x0A,0x88,0x43,0x00,
+0x1C,0x00,0xB3,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x24,0x00,0xBF,0xAF,
+0x20,0x00,0xB4,0xAF,
+0x21,0x98,0x80,0x00,
+0x21,0x90,0x00,0x00,
+0x15,0x00,0x20,0x12,
+0x21,0x80,0x00,0x00,
+0xAA,0x50,0x00,0x08,
+0x01,0x00,0x14,0x24,
+0x2B,0x10,0x11,0x02,
+0x11,0x00,0x40,0x10,
+0x21,0x10,0x40,0x02,
+0x21,0x18,0x70,0x02,
+0x00,0x00,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x44,0x30,
+0x00,0x16,0x02,0x00,
+0x03,0x16,0x02,0x00,
+0xF6,0xFF,0x41,0x04,
+0x01,0x00,0x10,0x26,
+0x7D,0x4F,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x04,0x10,0x54,0x00,
+0x25,0x90,0x42,0x02,
+0x2B,0x10,0x11,0x02,
+0xF3,0xFF,0x40,0x14,
+0x21,0x18,0x70,0x02,
+0x21,0x10,0x40,0x02,
+0x24,0x00,0xBF,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0xD8,0xFF,0xBD,0x27,
+0x14,0x00,0xB1,0xAF,
+0x0E,0x00,0xA3,0x2C,
+0x21,0x88,0xA0,0x00,
+0x0D,0x00,0x02,0x24,
+0x0A,0x88,0x43,0x00,
+0x20,0x00,0xB4,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x24,0x00,0xBF,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x21,0xA0,0x80,0x00,
+0x21,0x90,0x00,0x00,
+0x0A,0x00,0x20,0x12,
+0x21,0x80,0x00,0x00,
+0x01,0x00,0x13,0x24,
+0x21,0x10,0x90,0x02,
+0x00,0x00,0x44,0x90,
+0x7D,0x4F,0x00,0x0C,
+0x01,0x00,0x10,0x26,
+0x04,0x10,0x53,0x00,
+0x2B,0x18,0x11,0x02,
+0xF9,0xFF,0x60,0x14,
+0x25,0x90,0x42,0x02,
+0x21,0x10,0x40,0x02,
+0x24,0x00,0xBF,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0xE8,0xFF,0xBD,0x27,
+0xFF,0xFF,0x02,0x24,
+0x10,0x00,0xB0,0xAF,
+0x14,0x00,0xBF,0xAF,
+0x21,0x30,0xA0,0x00,
+0x1B,0x00,0x82,0x10,
+0x20,0x00,0x10,0x24,
+0x20,0x00,0x82,0x28,
+0x06,0x00,0x40,0x14,
+0x80,0x18,0x04,0x00,
+0x21,0x10,0x00,0x02,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x21,0x18,0x64,0x00,
+0x21,0x80,0x80,0x00,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x04,0x3C,
+0xC0,0x18,0x03,0x00,
+0x30,0x1F,0x42,0x24,
+0x2B,0x3D,0x84,0x24,
+0x21,0x20,0x64,0x00,
+0x21,0x18,0x62,0x00,
+0x01,0x00,0x02,0x24,
+0x06,0x00,0x06,0x24,
+0x10,0x52,0x00,0x0C,
+0xFA,0x1D,0x62,0xA0,
+0x21,0x10,0x00,0x02,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x42,0x24,
+0xC8,0x00,0x47,0x24,
+0x05,0x00,0x10,0x24,
+0xC2,0x1E,0x43,0x24,
+0x10,0x51,0x00,0x08,
+0xC8,0x00,0x05,0x24,
+0x01,0x00,0x10,0x26,
+0x20,0x00,0x02,0x2E,
+0x28,0x00,0xA5,0x24,
+0xDE,0xFF,0x40,0x10,
+0x28,0x00,0xE7,0x24,
+0x00,0x00,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0xF8,0xFF,0x40,0x14,
+0x28,0x00,0x63,0x24,
+0x02,0x80,0x04,0x3C,
+0x2B,0x3D,0x84,0x24,
+0x01,0x00,0x02,0x24,
+0x21,0x20,0xA4,0x00,
+0xFA,0x1D,0xE2,0xA0,
+0x21,0x28,0xC0,0x00,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x00,0x51,0x00,0x08,
+0x21,0x10,0x00,0x02,
+0xE0,0xFF,0xBD,0x27,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x30,0x00,0xB2,0x8F,
+0x21,0x88,0x80,0x00,
+0x21,0x20,0xA0,0x00,
+0x21,0x28,0x20,0x02,
+0x10,0x00,0xB0,0xAF,
+0x1C,0x00,0xBF,0xAF,
+0xE3,0x50,0x00,0x0C,
+0xFF,0xFF,0xF0,0x30,
+0x20,0x00,0x03,0x24,
+0x21,0x20,0x40,0x00,
+0x21,0x28,0x00,0x02,
+0x21,0x30,0x20,0x02,
+0x07,0x00,0x43,0x10,
+0x21,0x38,0x40,0x02,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x4E,0x23,0x00,0x08,
+0x20,0x00,0xBD,0x27,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0xD0,0xFF,0xBD,0x27,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0x24,0x00,0xB5,0xAF,
+0x20,0x00,0xB4,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x21,0xA8,0x80,0x00,
+0x30,0x1F,0x54,0x24,
+0x2B,0x3D,0x73,0x24,
+0x05,0x00,0x11,0x24,
+0x01,0x00,0x12,0x24,
+0xC8,0x00,0x10,0x24,
+0x50,0x51,0x00,0x08,
+0x28,0x00,0xBF,0xAF,
+0x01,0x00,0x31,0x26,
+0x20,0x00,0x22,0x2A,
+0x0E,0x00,0x40,0x10,
+0x21,0x10,0x20,0x02,
+0x21,0x10,0x14,0x02,
+0xFA,0x1D,0x43,0x90,
+0x21,0x20,0x13,0x02,
+0x21,0x28,0xA0,0x02,
+0x06,0x00,0x06,0x24,
+0xF6,0xFF,0x72,0x14,
+0x28,0x00,0x10,0x26,
+0x39,0x52,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xF3,0xFF,0x40,0x14,
+0x01,0x00,0x31,0x26,
+0xFF,0xFF,0x31,0x26,
+0x21,0x10,0x20,0x02,
+0x28,0x00,0xBF,0x8F,
+0x24,0x00,0xB5,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x30,0x00,0xBD,0x27,
+0xD0,0xFF,0xBD,0x27,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0x28,0x00,0xB6,0xAF,
+0x24,0x00,0xB5,0xAF,
+0x20,0x00,0xB4,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x21,0x98,0x80,0x00,
+0x30,0x1F,0x56,0x24,
+0x2B,0x3D,0x75,0x24,
+0x21,0x88,0x00,0x00,
+0x01,0x00,0x14,0x24,
+0x21,0x80,0x00,0x00,
+0x2C,0x00,0xBF,0xAF,
+0x7C,0x51,0x00,0x08,
+0x18,0x00,0xB2,0xAF,
+0x01,0x00,0x31,0x26,
+0x20,0x00,0x22,0x2A,
+0x1E,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x21,0x90,0x16,0x02,
+0xFA,0x1D,0x42,0x92,
+0x21,0x20,0x15,0x02,
+0x21,0x28,0x60,0x02,
+0x06,0x00,0x06,0x24,
+0xF6,0xFF,0x54,0x14,
+0x28,0x00,0x10,0x26,
+0x39,0x52,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xF3,0xFF,0x40,0x14,
+0x01,0x00,0x31,0x26,
+0xFF,0xFF,0x31,0x26,
+0x02,0x80,0x06,0x3C,
+0x02,0x80,0x07,0x3C,
+0x21,0x20,0x20,0x02,
+0xFA,0x1D,0x40,0xA2,
+0x2C,0x00,0xBF,0x8F,
+0x28,0x00,0xB6,0x8F,
+0x24,0x00,0xB5,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0xE8,0xDD,0xC6,0x24,
+0xD8,0xDD,0xE7,0x24,
+0x21,0x28,0x00,0x00,
+0x4E,0x23,0x00,0x08,
+0x30,0x00,0xBD,0x27,
+0x2C,0x00,0xBF,0x8F,
+0x28,0x00,0xB6,0x8F,
+0x24,0x00,0xB5,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x30,0x00,0xBD,0x27,
+0xC8,0xFF,0xBD,0x27,
+0x02,0x80,0x02,0x3C,
+0x18,0x00,0xB2,0xAF,
+0x30,0x1F,0x52,0x24,
+0x30,0x00,0xBE,0xAF,
+0x2C,0x00,0xB7,0xAF,
+0x28,0x00,0xB6,0xAF,
+0x24,0x00,0xB5,0xAF,
+0x20,0x00,0xB4,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x34,0x00,0xBF,0xAF,
+0x21,0x80,0x00,0x00,
+0x02,0x80,0x1E,0x3C,
+0x02,0x80,0x17,0x3C,
+0x02,0x80,0x16,0x3C,
+0x01,0x00,0x13,0x24,
+0xFF,0xF7,0x15,0x24,
+0xFF,0xEF,0x14,0x24,
+0x21,0x88,0x40,0x02,
+0xFA,0x1D,0x22,0x92,
+0xC0,0x48,0x10,0x00,
+0xEA,0x5D,0xC7,0x93,
+0x41,0x00,0x53,0x10,
+0x21,0x30,0x32,0x01,
+0xE8,0x22,0xC2,0x8C,
+0xBF,0xFF,0x03,0x24,
+0x24,0x28,0x43,0x00,
+0x80,0x07,0xA3,0x34,
+0x24,0x10,0x75,0x00,
+0x31,0x00,0xF3,0x10,
+0x24,0x10,0x54,0x00,
+0xE8,0x22,0xC2,0xAC,
+0x21,0x48,0x32,0x01,
+0xE8,0x22,0x23,0x8D,
+0xFD,0xFF,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x24,0x18,0x62,0x00,
+0xFB,0xFF,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x24,0x18,0x62,0x00,
+0xE7,0xFF,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x24,0x18,0x62,0x00,
+0xFF,0xFD,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0xEC,0x22,0x28,0x8D,
+0x24,0x18,0x62,0x00,
+0xFF,0xFB,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x24,0x18,0x62,0x00,
+0xFF,0xE7,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x1F,0x00,0x06,0x3C,
+0x00,0x80,0x08,0x35,
+0x24,0x18,0x62,0x00,
+0x25,0x40,0x06,0x01,
+0x21,0x20,0x00,0x02,
+0xE8,0x22,0x23,0xAD,
+0x01,0x00,0x10,0x26,
+0x21,0x28,0x00,0x00,
+0xE8,0xDD,0xE6,0x26,
+0xD8,0xDD,0xC7,0x26,
+0x4E,0x23,0x00,0x0C,
+0xEC,0x22,0x28,0xAD,
+0x20,0x00,0x03,0x2A,
+0xD1,0xFF,0x60,0x14,
+0x28,0x00,0x31,0x26,
+0x34,0x00,0xBF,0x8F,
+0x30,0x00,0xBE,0x8F,
+0x2C,0x00,0xB7,0x8F,
+0x28,0x00,0xB6,0x8F,
+0x24,0x00,0xB5,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x38,0x00,0xBD,0x27,
+0x02,0x80,0x02,0x3C,
+0xEB,0x5D,0x44,0x90,
+0x24,0x18,0x75,0x00,
+0x80,0x0F,0xA2,0x34,
+0x00,0x10,0x63,0x34,
+0xCA,0xFF,0x87,0x14,
+0x24,0x10,0x54,0x00,
+0xC5,0x51,0x00,0x08,
+0xE8,0x22,0xC3,0xAC,
+0xBD,0x51,0x00,0x08,
+0xFA,0x1D,0x20,0xA2,
+0x04,0x52,0x00,0x08,
+0xFF,0x00,0xA5,0x30,
+0x00,0x00,0x85,0xA0,
+0xFF,0xFF,0xC6,0x24,
+0x01,0x00,0x84,0x24,
+0xFC,0xFF,0xC0,0x14,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x05,0x00,0xC0,0x10,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x85,0xAC,
+0xFF,0xFF,0xC6,0x24,
+0xFD,0xFF,0xC0,0x14,
+0x04,0x00,0x84,0x24,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x21,0x38,0x80,0x00,
+0x08,0x00,0xC0,0x10,
+0xFF,0xFF,0xC3,0x24,
+0xFF,0xFF,0x06,0x24,
+0x00,0x00,0xA2,0x90,
+0xFF,0xFF,0x63,0x24,
+0x01,0x00,0xA5,0x24,
+0x00,0x00,0xE2,0xA0,
+0xFB,0xFF,0x66,0x14,
+0x01,0x00,0xE7,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x80,0x00,
+0x2B,0x10,0xA4,0x00,
+0x0D,0x00,0x40,0x14,
+0xFF,0xFF,0x02,0x24,
+0xFF,0xFF,0xC6,0x24,
+0x08,0x00,0xC2,0x10,
+0x21,0x18,0x80,0x00,
+0xFF,0xFF,0x07,0x24,
+0x00,0x00,0xA2,0x90,
+0xFF,0xFF,0xC6,0x24,
+0x01,0x00,0xA5,0x24,
+0x00,0x00,0x62,0xA0,
+0xFB,0xFF,0xC7,0x14,
+0x01,0x00,0x63,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x80,0x00,
+0x21,0x28,0xA6,0x00,
+0x21,0x18,0x86,0x00,
+0xFF,0xFF,0xC6,0x24,
+0xFA,0xFF,0xC2,0x10,
+0x00,0x00,0x00,0x00,
+0xFF,0xFF,0x07,0x24,
+0xFF,0xFF,0xA5,0x24,
+0x00,0x00,0xA2,0x90,
+0xFF,0xFF,0x63,0x24,
+0xFF,0xFF,0xC6,0x24,
+0xFB,0xFF,0xC7,0x14,
+0x00,0x00,0x62,0xA0,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x80,0x00,
+0x0C,0x00,0xC0,0x10,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x82,0x90,
+0x00,0x00,0xA3,0x90,
+0x01,0x00,0x84,0x24,
+0x23,0x10,0x43,0x00,
+0x00,0x16,0x02,0x00,
+0x03,0x16,0x02,0x00,
+0x04,0x00,0x40,0x14,
+0x01,0x00,0xA5,0x24,
+0xFF,0xFF,0xC6,0x24,
+0xF6,0xFF,0xC0,0x14,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0xC0,0x00,
+0x4F,0x52,0x00,0x08,
+0x21,0x18,0x86,0x00,
+0x00,0x00,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x04,0x00,0x45,0x10,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x84,0x24,
+0xFA,0xFF,0x83,0x14,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x80,0x00,
+0x09,0x00,0xC0,0x10,
+0xFF,0xFF,0xC3,0x24,
+0xFF,0x00,0xA5,0x30,
+0xFF,0xFF,0x06,0x24,
+0x00,0x00,0x82,0x90,
+0xFF,0xFF,0x63,0x24,
+0x05,0x00,0x45,0x10,
+0x01,0x00,0x84,0x24,
+0xFB,0xFF,0x66,0x14,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0xFF,0xFF,0x82,0x24,
+0x21,0x38,0x00,0x00,
+0x1F,0x00,0xC0,0x10,
+0x21,0x18,0x00,0x00,
+0x02,0x80,0x02,0x3C,
+0x40,0xF2,0x4B,0x24,
+0x00,0x00,0x87,0x90,
+0x00,0x00,0xA3,0x90,
+0xFF,0xFF,0xC6,0x24,
+0x01,0x00,0x84,0x24,
+0x21,0x10,0xEB,0x00,
+0x16,0x00,0xE0,0x10,
+0x01,0x00,0xA5,0x24,
+0x14,0x00,0x60,0x10,
+0x21,0x48,0x6B,0x00,
+0x10,0x00,0xE3,0x10,
+0x20,0x00,0xE8,0x24,
+0x00,0x00,0x42,0x90,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x30,
+0x02,0x00,0x40,0x10,
+0x20,0x00,0x6A,0x24,
+0xFF,0x00,0x07,0x31,
+0x00,0x00,0x22,0x91,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x30,
+0x02,0x00,0x40,0x10,
+0xFF,0x00,0xE7,0x30,
+0xFF,0x00,0x43,0x31,
+0xFF,0x00,0x63,0x30,
+0x03,0x00,0xE3,0x14,
+0x00,0x00,0x00,0x00,
+0xE5,0xFF,0xC0,0x14,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x23,0x10,0xE3,0x00,
+0x21,0x18,0x80,0x00,
+0x00,0x00,0xA2,0x90,
+0x01,0x00,0xA5,0x24,
+0x00,0x00,0x82,0xA0,
+0xFC,0xFF,0x40,0x14,
+0x01,0x00,0x84,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x21,0x38,0x80,0x00,
+0xFF,0xFF,0x03,0x24,
+0xFF,0xFF,0xC6,0x24,
+0x06,0x00,0xC3,0x10,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xA2,0x90,
+0x01,0x00,0xA5,0x24,
+0x00,0x00,0x82,0xA0,
+0xF9,0xFF,0x40,0x14,
+0x01,0x00,0x84,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0xE0,0x00,
+0x00,0x00,0x82,0x80,
+0x9E,0x52,0x00,0x08,
+0x21,0x18,0x80,0x00,
+0x01,0x00,0x84,0x24,
+0x00,0x00,0x82,0x80,
+0x00,0x00,0x00,0x00,
+0xFC,0xFF,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xA2,0x90,
+0x01,0x00,0xA5,0x24,
+0x00,0x00,0x82,0xA0,
+0xFC,0xFF,0x40,0x14,
+0x01,0x00,0x84,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x12,0x00,0xC0,0x10,
+0x21,0x18,0x80,0x00,
+0x00,0x00,0x82,0x80,
+0xAF,0x52,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x84,0x24,
+0x00,0x00,0x82,0x80,
+0x00,0x00,0x00,0x00,
+0xFC,0xFF,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xA2,0x90,
+0x01,0x00,0xA5,0x24,
+0x00,0x00,0x82,0xA0,
+0x05,0x00,0x40,0x10,
+0x01,0x00,0x84,0x24,
+0xFF,0xFF,0xC6,0x24,
+0xF9,0xFF,0xC0,0x14,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x80,0xA0,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x00,0x00,0x83,0x90,
+0x00,0x00,0xA2,0x90,
+0x01,0x00,0x84,0x24,
+0x23,0x10,0x62,0x00,
+0x00,0x16,0x02,0x00,
+0x03,0x16,0x02,0x00,
+0x03,0x00,0x40,0x14,
+0x01,0x00,0xA5,0x24,
+0xF7,0xFF,0x60,0x14,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x21,0x10,0x00,0x00,
+0x0B,0x00,0xC0,0x10,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xA2,0x90,
+0x00,0x00,0x83,0x90,
+0xFF,0xFF,0xC6,0x24,
+0x23,0x10,0x62,0x00,
+0x00,0x16,0x02,0x00,
+0x03,0x16,0x02,0x00,
+0x03,0x00,0x40,0x14,
+0x01,0x00,0xA5,0x24,
+0xF5,0xFF,0x60,0x14,
+0x01,0x00,0x84,0x24,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x83,0x80,
+0x00,0x2E,0x05,0x00,
+0x21,0x10,0x80,0x00,
+0xE0,0x52,0x00,0x08,
+0x03,0x2E,0x05,0x00,
+0x07,0x00,0x60,0x10,
+0x01,0x00,0x42,0x24,
+0x00,0x00,0x43,0x80,
+0x00,0x00,0x00,0x00,
+0xFB,0xFF,0x65,0x14,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x00,0x00,0x82,0x80,
+0xEC,0x52,0x00,0x08,
+0x21,0x18,0x80,0x00,
+0x01,0x00,0x63,0x24,
+0x00,0x00,0x62,0x80,
+0x00,0x00,0x00,0x00,
+0xFC,0xFF,0x40,0x14,
+0x23,0x10,0x64,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xE0,0xFF,0xBD,0x27,
+0x10,0x00,0xB0,0xAF,
+0x21,0x80,0xA0,0x00,
+0x14,0x00,0xB1,0xAF,
+0x18,0x00,0xBF,0xAF,
+0x21,0x88,0x80,0x00,
+0xE6,0x52,0x00,0x0C,
+0x00,0x86,0x10,0x00,
+0x21,0x18,0x51,0x00,
+0x03,0x86,0x10,0x00,
+0x00,0x00,0x62,0x80,
+0x00,0x00,0x00,0x00,
+0x0A,0x00,0x50,0x10,
+0x21,0x10,0x60,0x00,
+0xFF,0xFF,0x63,0x24,
+0x2B,0x10,0x71,0x00,
+0xF9,0xFF,0x40,0x10,
+0x21,0x10,0x00,0x00,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x21,0x30,0x80,0x00,
+0x0D,0x00,0xA0,0x10,
+0xFF,0xFF,0xA3,0x24,
+0x00,0x00,0x82,0x80,
+0x00,0x00,0x00,0x00,
+0x09,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0xFF,0xFF,0x05,0x24,
+0xFF,0xFF,0x63,0x24,
+0x05,0x00,0x65,0x10,
+0x01,0x00,0xC6,0x24,
+0x00,0x00,0xC2,0x80,
+0x00,0x00,0x00,0x00,
+0xFA,0xFF,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x23,0x10,0xC4,0x00,
+0x00,0x00,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x19,0x00,0x40,0x10,
+0x21,0x40,0x00,0x00,
+0x00,0x00,0xA9,0x80,
+0x00,0x00,0x00,0x00,
+0x17,0x00,0x20,0x11,
+0x21,0x30,0xA0,0x00,
+0x00,0x3E,0x02,0x00,
+0x03,0x3E,0x07,0x00,
+0x21,0x18,0x20,0x01,
+0x15,0x00,0xE3,0x10,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0xC6,0x24,
+0x00,0x00,0xC2,0x90,
+0x00,0x00,0x00,0x00,
+0x00,0x1E,0x02,0x00,
+0x03,0x1E,0x03,0x00,
+0xF8,0xFF,0x60,0x14,
+0x00,0x16,0x02,0x00,
+0x03,0x16,0x02,0x00,
+0x06,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x84,0x24,
+0x00,0x00,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0xEB,0xFF,0x40,0x14,
+0x01,0x00,0x08,0x25,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x01,
+0x00,0x00,0xA2,0x90,
+0x31,0x53,0x00,0x08,
+0x00,0x16,0x02,0x00,
+0x00,0x00,0xC2,0x90,
+0x31,0x53,0x00,0x08,
+0x00,0x16,0x02,0x00,
+0x00,0x00,0x87,0x90,
+0x00,0x00,0x00,0x00,
+0x14,0x00,0xE0,0x10,
+0x21,0x10,0x80,0x00,
+0x00,0x00,0xA4,0x90,
+0x00,0x00,0x00,0x00,
+0x00,0x1E,0x04,0x00,
+0x03,0x1E,0x03,0x00,
+0x09,0x00,0x60,0x10,
+0x21,0x30,0xA0,0x00,
+0x00,0x3E,0x07,0x00,
+0x03,0x3E,0x07,0x00,
+0x0B,0x00,0xE3,0x10,
+0x01,0x00,0xC6,0x24,
+0x00,0x00,0xC3,0x80,
+0x00,0x00,0x00,0x00,
+0xFB,0xFF,0x60,0x14,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0x00,0x00,0x47,0x90,
+0x00,0x00,0x00,0x00,
+0xF0,0xFF,0xE0,0x14,
+0x00,0x00,0x00,0x00,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xE0,0xFF,0xBD,0x27,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x18,0x00,0xBF,0xAF,
+0x21,0x80,0x80,0x00,
+0x1D,0x00,0x80,0x10,
+0x21,0x88,0xA0,0x00,
+0x1D,0x53,0x00,0x0C,
+0x21,0x20,0x00,0x02,
+0x21,0x80,0x02,0x02,
+0x00,0x00,0x02,0x82,
+0x21,0x28,0x20,0x02,
+0x21,0x20,0x00,0x02,
+0x22,0x00,0x40,0x10,
+0x21,0x18,0x00,0x00,
+0x41,0x53,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x05,0x00,0x40,0x10,
+0x21,0x18,0x40,0x00,
+0x00,0x00,0x42,0x80,
+0x00,0x00,0x00,0x00,
+0x0A,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x02,0x3C,
+0x5C,0xF3,0x43,0xAC,
+0x21,0x18,0x00,0x02,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x10,0x60,0x00,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x00,0x00,0x60,0xA0,
+0x72,0x53,0x00,0x08,
+0x01,0x00,0x63,0x24,
+0x02,0x80,0x02,0x3C,
+0x5C,0xF3,0x50,0x8C,
+0x00,0x00,0x00,0x00,
+0xF3,0xFF,0x00,0x12,
+0x21,0x18,0x00,0x00,
+0x1D,0x53,0x00,0x0C,
+0x21,0x20,0x00,0x02,
+0x21,0x80,0x02,0x02,
+0x00,0x00,0x02,0x82,
+0x21,0x28,0x20,0x02,
+0x21,0x20,0x00,0x02,
+0xE0,0xFF,0x40,0x14,
+0x21,0x18,0x00,0x00,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x02,0x80,0x02,0x3C,
+0x5C,0xF3,0x40,0xAC,
+0x20,0x00,0xBD,0x27,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0xE0,0xFF,0xBD,0x27,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x1C,0x00,0xBF,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x00,0x00,0x90,0x8C,
+0x21,0x90,0x80,0x00,
+0x21,0x88,0xA0,0x00,
+0x21,0x18,0x00,0x00,
+0x0F,0x00,0x00,0x12,
+0x21,0x20,0x00,0x02,
+0x1D,0x53,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x21,0x80,0x02,0x02,
+0x00,0x00,0x02,0x82,
+0x21,0x28,0x20,0x02,
+0x21,0x20,0x00,0x02,
+0x07,0x00,0x40,0x10,
+0x21,0x18,0x00,0x00,
+0x41,0x53,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x21,0x18,0x40,0x00,
+0x09,0x00,0x40,0x14,
+0x00,0x00,0x42,0xAE,
+0x21,0x18,0x00,0x02,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x10,0x60,0x00,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x00,0x00,0x42,0x80,
+0x00,0x00,0x00,0x00,
+0xF5,0xFF,0x40,0x10,
+0x01,0x00,0x64,0x24,
+0x00,0x00,0x60,0xA0,
+0xAB,0x53,0x00,0x08,
+0x00,0x00,0x44,0xAE,
+0xD8,0xFF,0xBD,0x27,
+0x14,0x00,0xB1,0xAF,
+0x21,0x88,0x80,0x00,
+0x21,0x20,0xA0,0x00,
+0x1C,0x00,0xB3,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x20,0x00,0xBF,0xAF,
+0x10,0x00,0xB0,0xAF,
+0xE6,0x52,0x00,0x0C,
+0x21,0x98,0xA0,0x00,
+0x21,0x90,0x40,0x00,
+0x08,0x00,0x40,0x16,
+0x21,0x10,0x20,0x02,
+0x20,0x00,0xBF,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0xE6,0x52,0x00,0x0C,
+0x21,0x20,0x20,0x02,
+0x21,0x80,0x40,0x00,
+0x2A,0x10,0x52,0x00,
+0x0A,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x21,0x20,0x20,0x02,
+0x21,0x28,0x60,0x02,
+0x21,0x30,0x40,0x02,
+0x39,0x52,0x00,0x0C,
+0xFF,0xFF,0x10,0x26,
+0x0B,0x00,0x40,0x10,
+0x2A,0x18,0x12,0x02,
+0xF8,0xFF,0x60,0x10,
+0x01,0x00,0x31,0x26,
+0x20,0x00,0xBF,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0xC7,0x53,0x00,0x08,
+0x21,0x10,0x20,0x02,
+0x00,0x00,0x87,0x90,
+0x00,0x00,0x00,0x00,
+0x27,0x00,0xE0,0x10,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xA6,0x90,
+0x00,0x00,0x00,0x00,
+0x0A,0x00,0xC0,0x10,
+0xDF,0xFF,0x02,0x24,
+0x24,0x18,0xC2,0x00,
+0x24,0x10,0xE2,0x00,
+0x00,0x16,0x02,0x00,
+0x00,0x1E,0x03,0x00,
+0x03,0x16,0x02,0x00,
+0x03,0x1E,0x03,0x00,
+0x0A,0x00,0x43,0x10,
+0x00,0x00,0x00,0x00,
+0xDF,0xFF,0x02,0x24,
+0x24,0x18,0xC2,0x00,
+0x24,0x10,0xE2,0x00,
+0x00,0x16,0x02,0x00,
+0x00,0x1E,0x03,0x00,
+0x03,0x1E,0x03,0x00,
+0x03,0x16,0x02,0x00,
+0x08,0x00,0xE0,0x03,
+0x23,0x10,0x43,0x00,
+0x0A,0x54,0x00,0x08,
+0xDF,0xFF,0x08,0x24,
+0x00,0x00,0xA6,0x90,
+0x00,0x00,0x00,0x00,
+0x24,0x10,0x06,0x01,
+0x00,0x16,0x02,0x00,
+0xF0,0xFF,0xC0,0x10,
+0x03,0x16,0x02,0x00,
+0xEF,0xFF,0x62,0x14,
+0xDF,0xFF,0x02,0x24,
+0x01,0x00,0x84,0x24,
+0x00,0x00,0x87,0x90,
+0x01,0x00,0xA5,0x24,
+0x24,0x10,0x07,0x01,
+0x00,0x1E,0x02,0x00,
+0xF2,0xFF,0xE0,0x14,
+0x03,0x1E,0x03,0x00,
+0x00,0x00,0xA6,0x90,
+0xDF,0xFF,0x02,0x24,
+0x24,0x18,0xC2,0x00,
+0x24,0x10,0xE2,0x00,
+0x00,0x16,0x02,0x00,
+0x00,0x1E,0x03,0x00,
+0x03,0x1E,0x03,0x00,
+0x03,0x16,0x02,0x00,
+0x08,0x00,0xE0,0x03,
+0x23,0x10,0x43,0x00,
+0xA8,0xFF,0xBD,0x27,
+0x44,0x00,0xB5,0xAF,
+0x40,0x00,0xB4,0xAF,
+0x38,0x00,0xB2,0xAF,
+0x34,0x00,0xB1,0xAF,
+0x54,0x00,0xBF,0xAF,
+0x50,0x00,0xBE,0xAF,
+0x4C,0x00,0xB7,0xAF,
+0x48,0x00,0xB6,0xAF,
+0x3C,0x00,0xB3,0xAF,
+0x30,0x00,0xB0,0xAF,
+0x21,0x90,0xA0,0x00,
+0x00,0x00,0xA5,0x90,
+0x21,0xA0,0x80,0x00,
+0x21,0xA8,0xC0,0x00,
+0x00,0x26,0x05,0x00,
+0x03,0x26,0x04,0x00,
+0x11,0x00,0x80,0x10,
+0x21,0x88,0x80,0x02,
+0x25,0x00,0x02,0x24,
+0x29,0x00,0x82,0x10,
+0x0A,0x00,0x02,0x24,
+0x1B,0x00,0x82,0x10,
+0x00,0x00,0x00,0x00,
+0x1E,0x00,0x80,0x12,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x25,0xA2,
+0x01,0x00,0x31,0x26,
+0x01,0x00,0x52,0x26,
+0x00,0x00,0x45,0x92,
+0x00,0x00,0x00,0x00,
+0x00,0x26,0x05,0x00,
+0x03,0x26,0x04,0x00,
+0xF2,0xFF,0x80,0x14,
+0x25,0x00,0x02,0x24,
+0x02,0x00,0x80,0x12,
+0x23,0x10,0x34,0x02,
+0x00,0x00,0x20,0xA2,
+0x54,0x00,0xBF,0x8F,
+0x50,0x00,0xBE,0x8F,
+0x4C,0x00,0xB7,0x8F,
+0x48,0x00,0xB6,0x8F,
+0x44,0x00,0xB5,0x8F,
+0x40,0x00,0xB4,0x8F,
+0x3C,0x00,0xB3,0x8F,
+0x38,0x00,0xB2,0x8F,
+0x34,0x00,0xB1,0x8F,
+0x30,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x58,0x00,0xBD,0x27,
+0xE7,0xFF,0x80,0x16,
+0x00,0x00,0x00,0x00,
+0x77,0x55,0x00,0x0C,
+0x0D,0x00,0x04,0x24,
+0x0A,0x00,0x04,0x24,
+0x77,0x55,0x00,0x0C,
+0x01,0x00,0x52,0x26,
+0x00,0x00,0x45,0x92,
+0x00,0x00,0x00,0x00,
+0x00,0x26,0x05,0x00,
+0x3C,0x54,0x00,0x08,
+0x03,0x26,0x04,0x00,
+0x01,0x00,0x52,0x26,
+0x00,0x00,0x45,0x92,
+0x73,0x00,0x02,0x24,
+0x00,0x1E,0x05,0x00,
+0x03,0x1E,0x03,0x00,
+0x2C,0x00,0x62,0x10,
+0x10,0x00,0xB3,0x27,
+0x23,0x00,0x02,0x24,
+0x21,0xF0,0x60,0x02,
+0x21,0x38,0x00,0x00,
+0x34,0x00,0x62,0x10,
+0x1C,0x00,0x04,0x24,
+0x00,0x16,0x05,0x00,
+0x03,0x16,0x02,0x00,
+0x68,0x00,0x03,0x24,
+0x36,0x00,0x43,0x10,
+0x00,0x00,0x00,0x00,
+0x00,0x16,0x05,0x00,
+0x03,0x16,0x02,0x00,
+0x39,0x00,0x43,0x10,
+0x00,0x00,0x00,0x00,
+0x20,0x00,0xA2,0x34,
+0x00,0x16,0x02,0x00,
+0x03,0x16,0x02,0x00,
+0x78,0x00,0x03,0x24,
+0x3C,0x00,0x43,0x10,
+0x20,0x00,0xA6,0x30,
+0x00,0x1E,0x05,0x00,
+0x03,0x1E,0x03,0x00,
+0x64,0x00,0x02,0x24,
+0x49,0x00,0x62,0x10,
+0x40,0x00,0x02,0x24,
+0x81,0x00,0x62,0x10,
+0x21,0x00,0x02,0x24,
+0x92,0x00,0x62,0x10,
+0x63,0x00,0x02,0x24,
+0xA2,0x00,0x62,0x10,
+0x11,0x00,0xB3,0x27,
+0x10,0x00,0xA5,0xA3,
+0x21,0x80,0xC0,0x03,
+0x2B,0x10,0x13,0x02,
+0xB4,0xFF,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x6C,0x00,0x80,0x12,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x02,0x92,
+0x01,0x00,0x10,0x26,
+0x00,0x00,0x22,0xA2,
+0x81,0x54,0x00,0x08,
+0x01,0x00,0x31,0x26,
+0x00,0x00,0xA2,0x8E,
+0x04,0x00,0xB5,0x26,
+0x21,0x80,0x40,0x00,
+0x00,0x00,0x02,0x92,
+0x00,0x00,0x00,0x00,
+0xA6,0xFF,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x63,0x00,0x80,0x12,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x22,0xA2,
+0x01,0x00,0x10,0x26,
+0x8E,0x54,0x00,0x08,
+0x01,0x00,0x31,0x26,
+0x01,0x00,0x52,0x26,
+0x00,0x00,0x45,0x92,
+0x68,0x00,0x03,0x24,
+0x00,0x16,0x05,0x00,
+0x03,0x16,0x02,0x00,
+0xCC,0xFF,0x43,0x14,
+0x01,0x00,0x07,0x24,
+0x01,0x00,0x52,0x26,
+0x00,0x00,0x45,0x92,
+0x00,0x00,0x00,0x00,
+0x00,0x16,0x05,0x00,
+0x03,0x16,0x02,0x00,
+0xC9,0xFF,0x43,0x14,
+0x0C,0x00,0x04,0x24,
+0x01,0x00,0x52,0x26,
+0x00,0x00,0x45,0x92,
+0x78,0x00,0x03,0x24,
+0x20,0x00,0xA2,0x34,
+0x00,0x16,0x02,0x00,
+0x03,0x16,0x02,0x00,
+0xC7,0xFF,0x43,0x14,
+0x04,0x00,0x04,0x24,
+0x20,0x00,0xA6,0x30,
+0x00,0x00,0xA5,0x8E,
+0x35,0x00,0xE0,0x14,
+0x04,0x00,0xB5,0x26,
+0xCD,0xFF,0x80,0x04,
+0x02,0x80,0x02,0x3C,
+0x48,0xED,0x42,0x24,
+0x00,0x00,0x47,0x8C,
+0x07,0x10,0x85,0x00,
+0x0F,0x00,0x42,0x30,
+0x21,0x10,0x47,0x00,
+0x00,0x00,0x43,0x90,
+0xFC,0xFF,0x84,0x24,
+0x25,0x18,0xC3,0x00,
+0x00,0x00,0x63,0xA2,
+0xF8,0xFF,0x81,0x04,
+0x01,0x00,0x73,0x26,
+0x81,0x54,0x00,0x08,
+0x21,0x80,0xC0,0x03,
+0x00,0x00,0xA2,0x8E,
+0x04,0x00,0xB5,0x26,
+0x28,0x00,0x40,0x04,
+0x21,0x28,0x40,0x00,
+0x21,0x80,0x60,0x02,
+0x02,0x80,0x02,0x3C,
+0x4C,0xED,0x42,0x24,
+0x00,0x00,0x46,0x8C,
+0x00,0x00,0x00,0x00,
+0x18,0x00,0xA6,0x00,
+0xC3,0x27,0x05,0x00,
+0x10,0x10,0x00,0x00,
+0x83,0x10,0x02,0x00,
+0x23,0x10,0x44,0x00,
+0x80,0x18,0x02,0x00,
+0x21,0x18,0x62,0x00,
+0x40,0x18,0x03,0x00,
+0x23,0x18,0xA3,0x00,
+0x30,0x00,0x63,0x24,
+0x00,0x00,0x63,0xA2,
+0x21,0x28,0x40,0x00,
+0xF3,0xFF,0x40,0x14,
+0x01,0x00,0x73,0x26,
+0xE1,0x54,0x00,0x08,
+0xFF,0xFF,0x63,0x26,
+0x00,0x00,0x65,0x80,
+0x00,0x00,0x02,0x92,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x62,0xA0,
+0x00,0x00,0x05,0xA2,
+0xFF,0xFF,0x63,0x24,
+0x01,0x00,0x10,0x26,
+0x2B,0x10,0x03,0x02,
+0xF7,0xFF,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x81,0x54,0x00,0x08,
+0x21,0x80,0xC0,0x03,
+0x58,0x00,0xC3,0x34,
+0x30,0x00,0x02,0x24,
+0x12,0x00,0xB3,0x27,
+0x10,0x00,0xA2,0xA3,
+0xB2,0x54,0x00,0x08,
+0x11,0x00,0xA3,0xA3,
+0x2D,0x00,0x02,0x24,
+0x23,0x28,0x05,0x00,
+0x11,0x00,0xB3,0x27,
+0xC5,0x54,0x00,0x08,
+0x10,0x00,0xA2,0xA3,
+0x00,0x00,0x04,0x82,
+0x77,0x55,0x00,0x0C,
+0x01,0x00,0x10,0x26,
+0x82,0x54,0x00,0x08,
+0x2B,0x10,0x13,0x02,
+0x00,0x00,0x04,0x82,
+0x77,0x55,0x00,0x0C,
+0x01,0x00,0x10,0x26,
+0x8E,0x54,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xA3,0x8E,
+0x28,0x00,0xB0,0x27,
+0x2C,0x00,0xA4,0x27,
+0x2B,0x10,0x04,0x02,
+0x28,0x00,0xA3,0xAF,
+0x0B,0x00,0x40,0x10,
+0x04,0x00,0xB5,0x26,
+0x21,0xB8,0x80,0x00,
+0x02,0x80,0x16,0x3C,
+0x00,0x00,0x06,0x92,
+0x21,0x20,0x60,0x02,
+0x01,0x00,0x10,0x26,
+0x24,0x55,0x00,0x0C,
+0xD0,0xE3,0xC5,0x26,
+0x2B,0x18,0x17,0x02,
+0xF9,0xFF,0x60,0x14,
+0x21,0x98,0x62,0x02,
+0x80,0x54,0x00,0x08,
+0xFF,0xFF,0x73,0x26,
+0x00,0x00,0xA2,0x8E,
+0x00,0x00,0x00,0x00,
+0x06,0x00,0x56,0x24,
+0x21,0x80,0x40,0x00,
+0x2B,0x10,0x56,0x00,
+0xF8,0xFF,0x40,0x10,
+0x04,0x00,0xB5,0x26,
+0x02,0x80,0x17,0x3C,
+0x00,0x00,0x06,0x82,
+0x21,0x20,0x60,0x02,
+0x01,0x00,0x10,0x26,
+0x24,0x55,0x00,0x0C,
+0xD4,0xE3,0xE5,0x26,
+0x2B,0x18,0x16,0x02,
+0xF9,0xFF,0x60,0x14,
+0x21,0x98,0x62,0x02,
+0x80,0x54,0x00,0x08,
+0xFF,0xFF,0x73,0x26,
+0x00,0x00,0xA2,0x8E,
+0x04,0x00,0xB5,0x26,
+0x80,0x54,0x00,0x08,
+0x10,0x00,0xA2,0xA3,
+0xE8,0xFF,0xBD,0x27,
+0x20,0x00,0xA6,0xAF,
+0x20,0x00,0xA6,0x27,
+0x10,0x00,0xBF,0xAF,
+0x24,0x00,0xA7,0xAF,
+0x1B,0x54,0x00,0x0C,
+0x1C,0x00,0xA5,0xAF,
+0x10,0x00,0xBF,0x8F,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0xE0,0xFF,0xBD,0x27,
+0x18,0x00,0xBF,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x24,0x00,0xA5,0xAF,
+0x28,0x00,0xA6,0xAF,
+0x2C,0x00,0xA7,0xAF,
+0x20,0x00,0xA4,0xAF,
+0x00,0x60,0x11,0x40,
+0x01,0x00,0x21,0x36,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x25,0x24,0x00,0x0C,
+0xA0,0x00,0x04,0x24,
+0x19,0x00,0x40,0x10,
+0x21,0x80,0x40,0x00,
+0x08,0x00,0x44,0x94,
+0x20,0x00,0xA5,0x8F,
+0x02,0x80,0x02,0x3C,
+0x25,0x20,0x82,0x00,
+0x20,0x00,0x84,0x24,
+0x1B,0x54,0x00,0x0C,
+0x24,0x00,0xA6,0x27,
+0x01,0x00,0x42,0x24,
+0x13,0x00,0x03,0x24,
+0x81,0x00,0x44,0x2C,
+0x14,0x00,0x03,0xAE,
+0x17,0x00,0x80,0x14,
+0x0C,0x00,0x02,0xAE,
+0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x88,0x88,0x03,0x3C,
+0x25,0xB0,0x02,0x3C,
+0x88,0x88,0x63,0x34,
+0x18,0x03,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0x55,0x55,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x00,0x60,0x91,0x40,
+0x99,0x99,0x03,0x3C,
+0x25,0xB0,0x02,0x3C,
+0x99,0x99,0x63,0x34,
+0x18,0x03,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x30,0x09,0x00,0x0C,
+0x21,0x20,0x00,0x02,
+0x00,0x60,0x91,0x40,
+0x5D,0x55,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0xE8,0xFF,0xBD,0x27,
+0x10,0x00,0xBF,0xAF,
+0x02,0x80,0x06,0x3C,
+0x60,0xF3,0xC5,0x8C,
+0x02,0x80,0x02,0x3C,
+0x40,0xF3,0x42,0x24,
+0x03,0x00,0xA3,0x30,
+0x21,0x18,0x62,0x00,
+0x00,0x00,0x64,0x80,
+0x01,0x00,0xA5,0x24,
+0x77,0x55,0x00,0x0C,
+0x60,0xF3,0xC5,0xAC,
+0x10,0x00,0xBF,0x8F,
+0x08,0x00,0x04,0x24,
+0x77,0x55,0x00,0x08,
+0x18,0x00,0xBD,0x27,
+0x00,0x26,0x04,0x00,
+0x03,0x26,0x04,0x00,
+0x00,0x00,0x84,0x48,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x00,0x26,0x04,0x00,
+0x03,0x26,0x04,0x00,
+0xF7,0xFF,0x82,0x24,
+0x05,0x00,0x42,0x2C,
+0x06,0x00,0x40,0x14,
+0x21,0x18,0x00,0x00,
+0x20,0x00,0x02,0x24,
+0x03,0x00,0x82,0x10,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x01,0x00,0x03,0x24,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0x00,0x60,0x02,0x40,
+0x01,0x00,0x41,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x02,0x80,0x03,0x3C,
+0xD4,0x5E,0x64,0xAC,
+0x00,0x60,0x82,0x40,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x05,0x3C,
+0x01,0x00,0x06,0x24,
+0x01,0x80,0x02,0x3C,
+0x04,0x30,0x86,0x00,
+0xF1,0x02,0xA7,0x34,
+0xED,0x02,0xA4,0x34,
+0x4C,0x56,0x42,0x24,
+0x18,0x03,0xA5,0x34,
+0x08,0x00,0x03,0x24,
+0x00,0x00,0xA2,0xAC,
+0x00,0x00,0xE3,0xA0,
+0x00,0x00,0x80,0xA0,
+0x00,0x00,0x86,0xA0,
+0x00,0x00,0x80,0xA0,
+0x00,0x00,0x86,0xA0,
+0x00,0x00,0x80,0xA0,
+0x00,0x00,0x86,0xA0,
+0x00,0x00,0x80,0xA0,
+0x00,0x00,0x86,0xA0,
+0x00,0x00,0x80,0xA0,
+0x00,0x00,0xE0,0xA0,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x82,0x8C,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xFF,0xFF,0xC6,0x30,
+0x10,0x00,0x02,0x24,
+0x0C,0x00,0xC2,0x10,
+0x11,0x00,0xC3,0x28,
+0x06,0x00,0x60,0x10,
+0x20,0x00,0x02,0x24,
+0x08,0x00,0x02,0x24,
+0x0D,0x00,0xC2,0x10,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x06,0x00,0xC2,0x10,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x85,0xA4,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x85,0xAC,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x85,0xA0,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x25,0xB0,0x02,0x3C,
+0x0A,0x00,0x42,0x34,
+0x00,0x00,0x43,0x90,
+0xFF,0xFF,0xA5,0x24,
+0x00,0x2C,0x05,0x00,
+0xFD,0x00,0x63,0x30,
+0x03,0x2C,0x05,0x00,
+0xFF,0xFF,0x87,0x30,
+0x00,0x00,0x43,0xA0,
+0x1A,0x00,0xA0,0x04,
+0x00,0x00,0x00,0x00,
+0x21,0x30,0x40,0x00,
+0x07,0x10,0xA7,0x00,
+0x01,0x00,0x42,0x30,
+0xFD,0x00,0x64,0x30,
+0x00,0x00,0x42,0x38,
+0x02,0x00,0x63,0x34,
+0x0A,0x18,0x82,0x00,
+0x00,0x00,0xC3,0xA0,
+0x04,0x00,0x63,0x34,
+0x00,0x00,0xC3,0xA0,
+0x09,0x00,0x02,0x24,
+0xFF,0xFF,0x42,0x24,
+0xFF,0xFF,0x41,0x04,
+0xFF,0xFF,0x42,0x24,
+0xFB,0x00,0x63,0x30,
+0x00,0x00,0xC3,0xA0,
+0x04,0x00,0x02,0x24,
+0xFF,0xFF,0x42,0x24,
+0xFF,0xFF,0x41,0x04,
+0xFF,0xFF,0x42,0x24,
+0xFF,0xFF,0xA2,0x24,
+0x00,0x2C,0x02,0x00,
+0x03,0x2C,0x05,0x00,
+0xEA,0xFF,0xA1,0x04,
+0x07,0x10,0xA7,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x02,0x3C,
+0x0A,0x00,0x42,0x34,
+0x00,0x00,0x43,0x90,
+0xFF,0xFF,0x84,0x24,
+0x00,0x24,0x04,0x00,
+0x03,0x24,0x04,0x00,
+0xFF,0x00,0x65,0x30,
+0x1D,0x00,0x80,0x04,
+0x21,0x38,0x00,0x00,
+0x21,0x30,0x40,0x00,
+0x01,0x00,0x08,0x24,
+0x04,0x00,0xA5,0x34,
+0x00,0x00,0xC5,0xA0,
+0x00,0x00,0xC2,0x90,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x45,0x30,
+0x01,0x00,0xA3,0x30,
+0x05,0x00,0x60,0x10,
+0x04,0x00,0x02,0x24,
+0x04,0x10,0x88,0x00,
+0x25,0x10,0x47,0x00,
+0xFF,0xFF,0x47,0x30,
+0x04,0x00,0x02,0x24,
+0xFF,0xFF,0x42,0x24,
+0xFF,0xFF,0x41,0x04,
+0xFF,0xFF,0x42,0x24,
+0xFB,0x00,0xA5,0x30,
+0x00,0x00,0xC5,0xA0,
+0x09,0x00,0x02,0x24,
+0xFF,0xFF,0x42,0x24,
+0xFF,0xFF,0x41,0x04,
+0xFF,0xFF,0x42,0x24,
+0xFF,0xFF,0x82,0x24,
+0x00,0x24,0x02,0x00,
+0x03,0x24,0x04,0x00,
+0xE7,0xFF,0x81,0x04,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0xE0,0x00,
+0xE0,0xFF,0xBD,0x27,
+0x10,0x00,0xB0,0xAF,
+0x25,0xB0,0x10,0x3C,
+0x0A,0x00,0x10,0x36,
+0x18,0x00,0xBF,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x00,0x00,0x02,0x92,
+0xFF,0xFF,0x91,0x30,
+0x03,0x00,0x05,0x24,
+0xC0,0x00,0x42,0x30,
+0x80,0x00,0x43,0x34,
+0x00,0x00,0x03,0xA2,
+0x04,0x00,0x63,0x34,
+0x00,0x00,0x03,0xA2,
+0xFB,0x00,0x63,0x30,
+0x00,0x00,0x03,0xA2,
+0x08,0x00,0x63,0x34,
+0x00,0x00,0x03,0xA2,
+0x04,0x00,0x63,0x34,
+0x00,0x00,0x03,0xA2,
+0xFB,0x00,0x63,0x30,
+0x00,0x00,0x03,0xA2,
+0xC9,0x55,0x00,0x0C,
+0x06,0x00,0x04,0x24,
+0x42,0x20,0x11,0x00,
+0xC9,0x55,0x00,0x0C,
+0x06,0x00,0x05,0x24,
+0xEF,0x55,0x00,0x0C,
+0x10,0x00,0x04,0x24,
+0x00,0x00,0x03,0x92,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0xC0,0x00,0x63,0x30,
+0x00,0x00,0x03,0xA2,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0xE0,0xFF,0xBD,0x27,
+0x14,0x00,0xB1,0xAF,
+0xFF,0xFF,0xB1,0x30,
+0x18,0x00,0xB2,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x1C,0x00,0xBF,0xAF,
+0x21,0x90,0xC0,0x00,
+0x0A,0x00,0x20,0x12,
+0xFF,0xFF,0x90,0x30,
+0x16,0x56,0x00,0x0C,
+0x21,0x20,0x00,0x02,
+0xFE,0xFF,0x23,0x26,
+0x02,0x00,0x04,0x26,
+0x00,0x00,0x42,0xA6,
+0xFF,0xFF,0x71,0x30,
+0xFF,0xFF,0x90,0x30,
+0xF8,0xFF,0x20,0x16,
+0x02,0x00,0x52,0x26,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0xC8,0xFF,0xBD,0x27,
+0x25,0xB0,0x03,0x3C,
+0x1C,0x00,0xB3,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x34,0x00,0xBF,0xAF,
+0x30,0x00,0xBE,0xAF,
+0x2C,0x00,0xB7,0xAF,
+0x28,0x00,0xB6,0xAF,
+0x24,0x00,0xB5,0xAF,
+0x20,0x00,0xB4,0xAF,
+0x0A,0x00,0x67,0x34,
+0x00,0x00,0xE2,0x90,
+0xFF,0xFF,0xB2,0x30,
+0x21,0x98,0xC0,0x00,
+0xFF,0x00,0x91,0x30,
+0x20,0x00,0x40,0x12,
+0xFF,0x00,0x50,0x30,
+0x21,0xA0,0xE0,0x00,
+0x0C,0x00,0x77,0x34,
+0x0B,0x00,0x76,0x34,
+0x21,0xF0,0xE0,0x00,
+0xC0,0xFF,0x15,0x24,
+0x25,0x10,0x15,0x02,
+0xFF,0x00,0x50,0x30,
+0x00,0x00,0xD1,0xA2,
+0x00,0x00,0x90,0xA2,
+0x00,0x00,0x82,0x92,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x50,0x30,
+0xC0,0x00,0x03,0x32,
+0x07,0x00,0x60,0x10,
+0x21,0x20,0xC0,0x03,
+0x00,0x00,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x50,0x30,
+0xC0,0x00,0x03,0x32,
+0xFB,0xFF,0x60,0x14,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xE2,0x8E,
+0x04,0x00,0x23,0x26,
+0x64,0x00,0x04,0x24,
+0x00,0x00,0x62,0xAE,
+0x25,0x22,0x00,0x0C,
+0xFF,0x00,0x71,0x30,
+0xFC,0xFF,0x42,0x26,
+0xFF,0xFF,0x52,0x30,
+0xE7,0xFF,0x40,0x16,
+0x04,0x00,0x73,0x26,
+0x34,0x00,0xBF,0x8F,
+0x30,0x00,0xBE,0x8F,
+0x2C,0x00,0xB7,0x8F,
+0x28,0x00,0xB6,0x8F,
+0x24,0x00,0xB5,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x38,0x00,0xBD,0x27,
+0x25,0xB0,0x06,0x3C,
+0x31,0x00,0xC2,0x34,
+0xFF,0xFF,0x84,0x30,
+0x00,0x00,0x44,0xA0,
+0x32,0x00,0xC7,0x34,
+0x00,0x00,0xE3,0x90,
+0xFC,0xFF,0x02,0x24,
+0x02,0x22,0x04,0x00,
+0x24,0x18,0x62,0x00,
+0x03,0x00,0x84,0x30,
+0x25,0x20,0x83,0x00,
+0x33,0x00,0xC6,0x34,
+0x72,0x00,0x02,0x24,
+0x00,0x00,0xE4,0xA0,
+0x00,0x00,0xC2,0xA0,
+0x00,0x00,0xC3,0x90,
+0x00,0x00,0x00,0x00,
+0x00,0x1E,0x03,0x00,
+0x03,0x1E,0x03,0x00,
+0x05,0x00,0x61,0x04,
+0x21,0x10,0x00,0x00,
+0xB5,0x56,0x00,0x08,
+0x25,0xB0,0x02,0x3C,
+0x11,0x00,0x80,0x10,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xC3,0x90,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x00,0x1E,0x03,0x00,
+0x03,0x1E,0x03,0x00,
+0xF8,0xFF,0x61,0x04,
+0x64,0x00,0x44,0x2C,
+0x64,0x00,0x44,0x2C,
+0x07,0x00,0x80,0x10,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x02,0x3C,
+0x30,0x00,0x42,0x34,
+0x00,0x00,0x43,0x90,
+0x01,0x00,0x02,0x24,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0xA3,0xA0,
+0xFF,0xFF,0x02,0x24,
+0x00,0x00,0xA2,0xA0,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x25,0xB0,0x06,0x3C,
+0x31,0x00,0xC2,0x34,
+0xFF,0xFF,0x84,0x30,
+0x00,0x00,0x44,0xA0,
+0x32,0x00,0xC3,0x34,
+0x00,0x00,0x62,0x90,
+0x02,0x22,0x04,0x00,
+0x03,0x00,0x84,0x30,
+0x25,0x20,0x82,0x00,
+0x00,0x00,0x64,0xA0,
+0x33,0x00,0xC7,0x34,
+0xFF,0x00,0xA5,0x30,
+0x30,0x00,0xC6,0x34,
+0xF2,0xFF,0x03,0x24,
+0x00,0x00,0xC5,0xA0,
+0x00,0x00,0xE3,0xA0,
+0x00,0x00,0xE2,0x90,
+0x00,0x00,0x00,0x00,
+0x00,0x16,0x02,0x00,
+0x03,0x16,0x02,0x00,
+0x03,0x00,0x40,0x04,
+0x21,0x20,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x01,0x00,0x02,0x24,
+0xDA,0x56,0x00,0x08,
+0x21,0x30,0xE0,0x00,
+0x0B,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xC3,0x90,
+0x01,0x00,0x82,0x24,
+0xFF,0x00,0x44,0x30,
+0x00,0x1E,0x03,0x00,
+0x03,0x1E,0x03,0x00,
+0xF8,0xFF,0x60,0x04,
+0x64,0x00,0x82,0x2C,
+0x64,0x00,0x82,0x2C,
+0xF1,0xFF,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0xE0,0xFF,0xBD,0x27,
+0x25,0xB0,0x02,0x3C,
+0x18,0x00,0xB0,0xAF,
+0xF8,0x02,0x45,0x34,
+0x25,0xB0,0x10,0x3C,
+0xFF,0x00,0x83,0x30,
+0x01,0x00,0x02,0x24,
+0x1C,0x00,0xBF,0xAF,
+0x03,0x00,0x06,0x36,
+0x0A,0x00,0x62,0x10,
+0x0A,0x00,0x04,0x24,
+0x00,0x00,0xA2,0x90,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB0,0x8F,
+0xFE,0xFF,0x03,0x24,
+0x24,0x10,0x43,0x00,
+0x20,0x00,0xBD,0x27,
+0x00,0x00,0xA2,0xA0,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xC2,0x90,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x42,0x30,
+0x20,0x00,0x43,0x34,
+0x20,0x00,0x42,0x30,
+0x02,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xC3,0xA0,
+0x25,0x22,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x04,0x36,
+0x00,0x00,0x82,0x90,
+0xFE,0xFF,0x03,0x24,
+0xF8,0x02,0x06,0x36,
+0x24,0x10,0x43,0x00,
+0x00,0x00,0x82,0xA0,
+0x00,0x00,0xC3,0x90,
+0x10,0x00,0xA5,0x27,
+0x21,0x20,0x00,0x00,
+0x03,0x00,0x63,0x34,
+0x00,0x00,0xC3,0xA0,
+0x91,0x56,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0xFF,0x00,0x84,0x30,
+0x21,0x38,0x00,0x00,
+0x21,0x28,0x00,0x00,
+0x01,0x00,0xA3,0x24,
+0x07,0x10,0xA4,0x00,
+0x01,0x00,0x42,0x30,
+0xFF,0x00,0x65,0x30,
+0x01,0x00,0xE6,0x24,
+0x02,0x00,0x40,0x14,
+0x04,0x00,0xA3,0x2C,
+0xFF,0x00,0xC7,0x30,
+0xF7,0xFF,0x60,0x14,
+0x21,0x10,0xE0,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x8C,0x30,
+0x21,0x48,0x00,0x00,
+0x21,0x38,0x00,0x00,
+0x40,0x10,0x07,0x00,
+0xFF,0x00,0x42,0x30,
+0x21,0x50,0x46,0x00,
+0x01,0x00,0xE3,0x24,
+0x07,0x10,0xEC,0x00,
+0x01,0x00,0x42,0x30,
+0xFF,0x00,0x67,0x30,
+0x21,0x58,0x25,0x01,
+0x01,0x00,0x24,0x25,
+0x09,0x00,0x40,0x14,
+0x04,0x00,0xE8,0x2C,
+0x00,0x00,0x63,0x91,
+0xFF,0x00,0x89,0x30,
+0x21,0x20,0x25,0x01,
+0x00,0x00,0x43,0xA1,
+0x00,0x00,0x83,0x90,
+0x01,0x00,0x22,0x25,
+0xFF,0x00,0x49,0x30,
+0x01,0x00,0x43,0xA1,
+0xED,0xFF,0x00,0x15,
+0x40,0x10,0x07,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xD8,0xFF,0xBD,0x27,
+0x20,0x00,0xB2,0xAF,
+0x1C,0x00,0xB1,0xAF,
+0x18,0x00,0xB0,0xAF,
+0x24,0x00,0xBF,0xAF,
+0x01,0x00,0x12,0x24,
+0x21,0x80,0x00,0x00,
+0x57,0x57,0x00,0x08,
+0xFF,0x00,0x11,0x24,
+0x91,0x56,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x10,0x00,0x40,0x10,
+0x00,0x02,0x03,0x2E,
+0x0F,0x00,0x60,0x10,
+0x21,0x10,0x00,0x02,
+0x10,0x00,0xA2,0x93,
+0x00,0x00,0x00,0x00,
+0x0A,0x00,0x51,0x10,
+0x0F,0x00,0x44,0x30,
+0x15,0x57,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x40,0x10,0x02,0x00,
+0x21,0x10,0x50,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0xFF,0x50,0x30,
+0x21,0x20,0x00,0x02,
+0xEE,0xFF,0x40,0x16,
+0x10,0x00,0xA5,0x27,
+0x21,0x10,0x00,0x02,
+0x24,0x00,0xBF,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0xB8,0xFF,0xBD,0x27,
+0x3C,0x00,0xB7,0xAF,
+0x38,0x00,0xB6,0xAF,
+0x34,0x00,0xB5,0xAF,
+0x30,0x00,0xB4,0xAF,
+0x2C,0x00,0xB3,0xAF,
+0x24,0x00,0xB1,0xAF,
+0x20,0x00,0xB0,0xAF,
+0x44,0x00,0xBF,0xAF,
+0x40,0x00,0xBE,0xAF,
+0x28,0x00,0xB2,0xAF,
+0x21,0x98,0xA0,0x00,
+0xFF,0x00,0x96,0x30,
+0x01,0x00,0x10,0x24,
+0x01,0x00,0x17,0x24,
+0x21,0xA0,0x00,0x00,
+0x21,0x88,0x00,0x00,
+0x21,0xA8,0x00,0x00,
+0x04,0x00,0xA0,0x10,
+0x21,0x18,0x00,0x00,
+0x10,0x00,0xC2,0x2E,
+0x0E,0x00,0x40,0x14,
+0x21,0x20,0xA0,0x00,
+0x44,0x00,0xBF,0x8F,
+0x40,0x00,0xBE,0x8F,
+0x3C,0x00,0xB7,0x8F,
+0x38,0x00,0xB6,0x8F,
+0x34,0x00,0xB5,0x8F,
+0x30,0x00,0xB4,0x8F,
+0x2C,0x00,0xB3,0x8F,
+0x28,0x00,0xB2,0x8F,
+0x24,0x00,0xB1,0x8F,
+0x20,0x00,0xB0,0x8F,
+0x21,0x10,0x60,0x00,
+0x08,0x00,0xE0,0x03,
+0x48,0x00,0xBD,0x27,
+0x08,0x00,0x06,0x24,
+0xFF,0x51,0x00,0x0C,
+0xFF,0x00,0x05,0x24,
+0x18,0x00,0xA4,0x27,
+0xFF,0x00,0x05,0x24,
+0xFF,0x51,0x00,0x0C,
+0x08,0x00,0x06,0x24,
+0xE6,0x56,0x00,0x0C,
+0x01,0x00,0x04,0x24,
+0x96,0x57,0x00,0x08,
+0x10,0x00,0xBE,0x27,
+0x1C,0x00,0x40,0x14,
+0x21,0x20,0xA0,0x02,
+0x37,0x00,0xE0,0x12,
+0x00,0x02,0x22,0x2E,
+0x35,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x02,0x32,
+0xF8,0xFF,0x40,0x10,
+0x20,0x00,0x02,0x32,
+0x21,0x20,0x20,0x02,
+0x91,0x56,0x00,0x0C,
+0x10,0x00,0xA5,0x27,
+0x2D,0x00,0x40,0x10,
+0xFF,0x00,0x02,0x24,
+0x10,0x00,0xB0,0x93,
+0x00,0x00,0x00,0x00,
+0x29,0x00,0x02,0x12,
+0x0F,0x00,0x15,0x32,
+0x15,0x57,0x00,0x0C,
+0x21,0x20,0xA0,0x02,
+0x02,0x81,0x10,0x00,
+0x10,0x00,0x16,0x12,
+0x21,0xA0,0x40,0x00,
+0x40,0x10,0x14,0x00,
+0x21,0x10,0x51,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0xFF,0x51,0x30,
+0x92,0x57,0x00,0x08,
+0x01,0x00,0x10,0x24,
+0x18,0x00,0xA5,0x27,
+0x24,0x57,0x00,0x0C,
+0x21,0x30,0x60,0x02,
+0x40,0x10,0x14,0x00,
+0x21,0x10,0x51,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0xFF,0x51,0x30,
+0x92,0x57,0x00,0x08,
+0x01,0x00,0x10,0x24,
+0x40,0x90,0x02,0x00,
+0x10,0x00,0x40,0x1A,
+0x21,0x80,0x00,0x00,
+0x21,0x20,0x30,0x02,
+0x01,0x00,0x84,0x24,
+0xFF,0xFF,0x84,0x30,
+0x91,0x56,0x00,0x0C,
+0x10,0x00,0xA5,0x27,
+0x01,0x00,0x03,0x26,
+0x21,0x20,0xD0,0x03,
+0xFF,0x00,0x70,0x30,
+0x04,0x00,0x40,0x10,
+0x2A,0x18,0x12,0x02,
+0x10,0x00,0xA2,0x93,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x82,0xA0,
+0xF3,0xFF,0x60,0x14,
+0x21,0x20,0x30,0x02,
+0x92,0x57,0x00,0x08,
+0x20,0x00,0x10,0x24,
+0xE6,0x56,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0x00,0x00,0x63,0x92,
+0xFF,0x00,0x02,0x24,
+0x0F,0x00,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x03,0x24,
+0x44,0x00,0xBF,0x8F,
+0x40,0x00,0xBE,0x8F,
+0x3C,0x00,0xB7,0x8F,
+0x38,0x00,0xB6,0x8F,
+0x34,0x00,0xB5,0x8F,
+0x30,0x00,0xB4,0x8F,
+0x2C,0x00,0xB3,0x8F,
+0x28,0x00,0xB2,0x8F,
+0x24,0x00,0xB1,0x8F,
+0x20,0x00,0xB0,0x8F,
+0x21,0x10,0x60,0x00,
+0x08,0x00,0xE0,0x03,
+0x48,0x00,0xBD,0x27,
+0x01,0x00,0x62,0x92,
+0x00,0x00,0x00,0x00,
+0xF0,0xFF,0x43,0x14,
+0x01,0x00,0x03,0x24,
+0x02,0x00,0x63,0x92,
+0x00,0x00,0x00,0x00,
+0xEB,0xFF,0x62,0x14,
+0x00,0x00,0x00,0x00,
+0x03,0x00,0x62,0x92,
+0x00,0x00,0x00,0x00,
+0xE8,0xFF,0x43,0x14,
+0x01,0x00,0x03,0x24,
+0x04,0x00,0x63,0x92,
+0x00,0x00,0x00,0x00,
+0xE3,0xFF,0x62,0x14,
+0x00,0x00,0x00,0x00,
+0x05,0x00,0x62,0x92,
+0x00,0x00,0x00,0x00,
+0xDF,0xFF,0x43,0x14,
+0x00,0x00,0x00,0x00,
+0x06,0x00,0x67,0x92,
+0x00,0x00,0x00,0x00,
+0xDC,0xFF,0xE2,0x14,
+0x01,0x00,0x03,0x24,
+0x07,0x00,0x62,0x92,
+0x00,0x00,0x00,0x00,
+0x7F,0xFF,0x47,0x10,
+0x21,0x18,0x00,0x00,
+0xD1,0x57,0x00,0x08,
+0x01,0x00,0x03,0x24,
+0xC0,0xFF,0xBD,0x27,
+0x38,0x00,0xBE,0xAF,
+0x30,0x00,0xB6,0xAF,
+0x2C,0x00,0xB5,0xAF,
+0x21,0xF0,0xC0,0x00,
+0xFF,0x00,0xB6,0x30,
+0xFF,0xFF,0x95,0x30,
+0xFF,0x00,0x05,0x24,
+0x10,0x00,0xA4,0x27,
+0x08,0x00,0x06,0x24,
+0x34,0x00,0xB7,0xAF,
+0x24,0x00,0xB3,0xAF,
+0x3C,0x00,0xBF,0xAF,
+0x28,0x00,0xB4,0xAF,
+0x20,0x00,0xB2,0xAF,
+0x1C,0x00,0xB1,0xAF,
+0x18,0x00,0xB0,0xAF,
+0xFF,0x51,0x00,0x0C,
+0x0F,0x00,0x17,0x24,
+0x21,0x98,0x00,0x00,
+0x40,0x10,0x13,0x00,
+0xFF,0x00,0x52,0x30,
+0x07,0x10,0x76,0x02,
+0x01,0x00,0x42,0x30,
+0x21,0xA0,0x5E,0x02,
+0x21,0x88,0xA0,0x02,
+0x21,0x20,0xA0,0x02,
+0x13,0x00,0x40,0x10,
+0x01,0x00,0xA3,0x26,
+0x01,0x00,0x62,0x26,
+0xFF,0x00,0x53,0x30,
+0x04,0x00,0x63,0x2E,
+0xF4,0xFF,0x60,0x14,
+0x40,0x10,0x13,0x00,
+0x21,0x10,0xE0,0x02,
+0x3C,0x00,0xBF,0x8F,
+0x38,0x00,0xBE,0x8F,
+0x34,0x00,0xB7,0x8F,
+0x30,0x00,0xB6,0x8F,
+0x2C,0x00,0xB5,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x40,0x00,0xBD,0x27,
+0x00,0x00,0x85,0x92,
+0xFF,0xFF,0x75,0x30,
+0xBE,0x56,0x00,0x0C,
+0x21,0x80,0xA0,0x02,
+0x01,0x00,0x85,0x92,
+0x21,0x20,0xA0,0x02,
+0x01,0x00,0xA2,0x26,
+0xBE,0x56,0x00,0x0C,
+0xFF,0xFF,0x55,0x30,
+0x10,0x00,0xA3,0x27,
+0x21,0x90,0x72,0x00,
+0x21,0x20,0x20,0x02,
+0x91,0x56,0x00,0x0C,
+0x21,0x28,0x40,0x02,
+0x21,0x20,0x00,0x02,
+0x91,0x56,0x00,0x0C,
+0x01,0x00,0x45,0x26,
+0x00,0x00,0x84,0x92,
+0x00,0x00,0x42,0x92,
+0x01,0x00,0x03,0x24,
+0x04,0x18,0x63,0x02,
+0x03,0x00,0x82,0x10,
+0x27,0x30,0x03,0x00,
+0x19,0x58,0x00,0x08,
+0x24,0xB8,0xD7,0x00,
+0x01,0x00,0x83,0x92,
+0x01,0x00,0x42,0x92,
+0x00,0x00,0x00,0x00,
+0xD2,0xFF,0x62,0x10,
+0x01,0x00,0x62,0x26,
+0x1A,0x58,0x00,0x08,
+0x24,0xB8,0xD7,0x00,
+0x98,0xFF,0xBD,0x27,
+0x50,0x00,0xB4,0xAF,
+0xFF,0x00,0x94,0x30,
+0x01,0x00,0x04,0x24,
+0x64,0x00,0xBF,0xAF,
+0x60,0x00,0xBE,0xAF,
+0x5C,0x00,0xB7,0xAF,
+0x58,0x00,0xB6,0xAF,
+0x4C,0x00,0xB3,0xAF,
+0x48,0x00,0xB2,0xAF,
+0x44,0x00,0xB1,0xAF,
+0x21,0x98,0xC0,0x00,
+0xFF,0x00,0xB1,0x30,
+0x54,0x00,0xB5,0xAF,
+0xE6,0x56,0x00,0x0C,
+0x40,0x00,0xB0,0xAF,
+0x3E,0x57,0x00,0x0C,
+0x01,0x00,0x16,0x24,
+0x21,0x18,0x40,0x00,
+0xFF,0x01,0x42,0x2C,
+0x01,0x00,0x17,0x24,
+0x01,0x00,0x1E,0x24,
+0x21,0x90,0x00,0x00,
+0x0E,0x00,0x40,0x14,
+0x21,0x20,0x00,0x00,
+0x64,0x00,0xBF,0x8F,
+0x60,0x00,0xBE,0x8F,
+0x5C,0x00,0xB7,0x8F,
+0x58,0x00,0xB6,0x8F,
+0x54,0x00,0xB5,0x8F,
+0x50,0x00,0xB4,0x8F,
+0x4C,0x00,0xB3,0x8F,
+0x48,0x00,0xB2,0x8F,
+0x44,0x00,0xB1,0x8F,
+0x40,0x00,0xB0,0x8F,
+0x21,0x10,0x80,0x00,
+0x08,0x00,0xE0,0x03,
+0x68,0x00,0xBD,0x27,
+0xFF,0x01,0x02,0x24,
+0x23,0x10,0x43,0x00,
+0x1A,0x00,0xA4,0x27,
+0xFF,0x00,0x05,0x24,
+0x08,0x00,0x06,0x24,
+0xFF,0xFF,0x50,0x30,
+0x18,0x00,0xB4,0xA3,
+0xFF,0x51,0x00,0x0C,
+0x19,0x00,0xB1,0xA3,
+0x21,0x20,0x20,0x02,
+0x21,0x28,0x60,0x02,
+0x24,0x57,0x00,0x0C,
+0x1A,0x00,0xA6,0x27,
+0x19,0x00,0xA4,0x93,
+0x15,0x57,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x21,0xA8,0x40,0x00,
+0xFF,0xFF,0x42,0x30,
+0x2B,0x10,0x02,0x02,
+0xDF,0xFF,0x40,0x14,
+0x21,0x20,0x00,0x00,
+0x01,0x00,0x02,0x24,
+0x09,0x00,0xC2,0x12,
+0x20,0x00,0x02,0x24,
+0x22,0x00,0xC2,0x12,
+0x00,0x00,0x00,0x00,
+0x3B,0x00,0xE0,0x12,
+0x00,0x02,0x42,0x2E,
+0x39,0x00,0x40,0x10,
+0x01,0x00,0x02,0x24,
+0xF9,0xFF,0xC2,0x16,
+0x20,0x00,0x02,0x24,
+0x21,0x20,0x40,0x02,
+0x10,0x00,0xA5,0x27,
+0x91,0x56,0x00,0x0C,
+0x01,0x00,0x13,0x24,
+0x41,0x00,0x40,0x10,
+0xFF,0x00,0x02,0x24,
+0x10,0x00,0xA5,0x93,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0xA4,0x30,
+0x3C,0x00,0x82,0x10,
+0x0F,0x00,0xA3,0x30,
+0x02,0x11,0x04,0x00,
+0x21,0x20,0x60,0x00,
+0x29,0x00,0xA3,0xA3,
+0x28,0x00,0xA2,0xA3,
+0x15,0x57,0x00,0x0C,
+0x11,0x00,0xA5,0xA3,
+0x21,0x80,0x40,0x00,
+0x28,0x00,0xA3,0x93,
+0x18,0x00,0xA2,0x93,
+0x00,0x00,0x00,0x00,
+0x5F,0x00,0x62,0x10,
+0x40,0x10,0x10,0x00,
+0x21,0x10,0x52,0x00,
+0x01,0x00,0x42,0x24,
+0x8B,0x58,0x00,0x08,
+0xFF,0xFF,0x52,0x30,
+0x19,0x00,0xA5,0x93,
+0x01,0x00,0x44,0x26,
+0xFF,0xFF,0x84,0x30,
+0xFC,0x57,0x00,0x0C,
+0x1A,0x00,0xA6,0x27,
+0x21,0x28,0x40,0x00,
+0x0F,0x00,0x43,0x30,
+0x0F,0x00,0x02,0x24,
+0x12,0x00,0x62,0x10,
+0x40,0x10,0x15,0x00,
+0x21,0x10,0x52,0x00,
+0x01,0x00,0x42,0x24,
+0x21,0x20,0xA0,0x00,
+0xFF,0xFF,0x52,0x30,
+0x18,0x00,0xB4,0xA3,
+0x15,0x57,0x00,0x0C,
+0x19,0x00,0xA5,0xA3,
+0x21,0xA8,0x40,0x00,
+0x02,0x80,0x03,0x3C,
+0x04,0xE4,0x62,0x8C,
+0x02,0x80,0x04,0x3C,
+0x01,0x00,0x16,0x24,
+0x01,0x00,0x42,0x24,
+0x04,0x00,0x43,0x28,
+0xC6,0xFF,0x60,0x14,
+0x04,0xE4,0x82,0xAC,
+0x21,0xF0,0x00,0x00,
+0xE6,0x56,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0x21,0x20,0xC0,0x03,
+0x64,0x00,0xBF,0x8F,
+0x60,0x00,0xBE,0x8F,
+0x5C,0x00,0xB7,0x8F,
+0x58,0x00,0xB6,0x8F,
+0x54,0x00,0xB5,0x8F,
+0x50,0x00,0xB4,0x8F,
+0x4C,0x00,0xB3,0x8F,
+0x48,0x00,0xB2,0x8F,
+0x44,0x00,0xB1,0x8F,
+0x40,0x00,0xB0,0x8F,
+0x21,0x10,0x80,0x00,
+0x08,0x00,0xE0,0x03,
+0x68,0x00,0xBD,0x27,
+0x3E,0x57,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xFF,0x01,0x03,0x24,
+0x23,0x18,0x62,0x00,
+0xFF,0xFF,0x70,0x30,
+0xFF,0xFF,0xA2,0x32,
+0x2B,0x10,0x02,0x02,
+0xE7,0xFF,0x40,0x14,
+0x21,0x20,0x40,0x02,
+0x18,0x00,0xB0,0x93,
+0x19,0x00,0xA2,0x93,
+0x00,0x81,0x10,0x00,
+0x25,0x80,0x02,0x02,
+0xFF,0x00,0x10,0x32,
+0xBE,0x56,0x00,0x0C,
+0x21,0x28,0x00,0x02,
+0x21,0x20,0x40,0x02,
+0x91,0x56,0x00,0x0C,
+0x11,0x00,0xA5,0x27,
+0x11,0x00,0xA3,0x93,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x64,0x30,
+0x9D,0xFF,0x90,0x10,
+0x20,0x00,0x16,0x24,
+0xFF,0x00,0x02,0x24,
+0xCD,0xFF,0x82,0x10,
+0x0F,0x00,0x63,0x30,
+0x02,0x11,0x04,0x00,
+0x21,0x20,0x60,0x00,
+0x29,0x00,0xA3,0xA3,
+0x15,0x57,0x00,0x0C,
+0x28,0x00,0xA2,0xA3,
+0x38,0x00,0xA4,0x27,
+0xFF,0x00,0x05,0x24,
+0x08,0x00,0x06,0x24,
+0xFF,0x51,0x00,0x0C,
+0x21,0x80,0x40,0x00,
+0x28,0x00,0xA4,0x93,
+0x61,0x57,0x00,0x0C,
+0x38,0x00,0xA5,0x27,
+0x1F,0x00,0x40,0x14,
+0x01,0x00,0x44,0x26,
+0x40,0x10,0x10,0x00,
+0x21,0x10,0x52,0x00,
+0x01,0x00,0x42,0x24,
+0xBE,0x58,0x00,0x08,
+0xFF,0xFF,0x52,0x30,
+0x40,0x88,0x10,0x00,
+0x27,0x00,0x20,0x1A,
+0x21,0x80,0x00,0x00,
+0xFF,0x00,0x16,0x24,
+0x21,0x20,0x50,0x02,
+0x01,0x00,0x84,0x24,
+0xFF,0xFF,0x84,0x30,
+0x91,0x56,0x00,0x0C,
+0x10,0x00,0xA5,0x27,
+0x01,0x00,0x03,0x26,
+0xFF,0x00,0x70,0x30,
+0x05,0x00,0x40,0x10,
+0x2A,0x18,0x11,0x02,
+0x10,0x00,0xA2,0x93,
+0x00,0x00,0x00,0x00,
+0x26,0x10,0x56,0x00,
+0x0B,0x98,0x02,0x00,
+0xF3,0xFF,0x60,0x14,
+0x21,0x20,0x50,0x02,
+0x15,0x00,0x60,0x16,
+0x21,0x10,0x32,0x02,
+0x01,0x00,0x42,0x24,
+0xFF,0xFF,0x52,0x30,
+0x8B,0x58,0x00,0x08,
+0x01,0x00,0x16,0x24,
+0x29,0x00,0xA5,0x93,
+0xFF,0xFF,0x84,0x30,
+0xFC,0x57,0x00,0x0C,
+0x38,0x00,0xA6,0x27,
+0x21,0x28,0x40,0x00,
+0x0F,0x00,0x43,0x30,
+0x0F,0x00,0x02,0x24,
+0xDB,0xFF,0x62,0x10,
+0x40,0x10,0x10,0x00,
+0x28,0x00,0xA4,0x93,
+0x4B,0x58,0x00,0x0C,
+0x38,0x00,0xA6,0x27,
+0x3E,0x57,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xBE,0x58,0x00,0x08,
+0x21,0x90,0x40,0x00,
+0x19,0x00,0xA3,0x93,
+0x29,0x00,0xA6,0x93,
+0x0F,0x00,0x13,0x24,
+0x0E,0x00,0x10,0x24,
+0x25,0x18,0x66,0x00,
+0x01,0x00,0x62,0x30,
+0x0A,0x98,0x02,0x02,
+0x02,0x00,0x64,0x30,
+0xFD,0x00,0x62,0x32,
+0x0A,0x98,0x44,0x00,
+0x04,0x00,0x65,0x30,
+0xFB,0x00,0x62,0x32,
+0x0A,0x98,0x45,0x00,
+0x08,0x00,0x63,0x30,
+0xF7,0x00,0x62,0x32,
+0x0A,0x98,0x43,0x00,
+0x0F,0x00,0x64,0x32,
+0x0F,0x00,0x16,0x24,
+0x25,0x00,0x96,0x10,
+0x21,0x28,0xC0,0x00,
+0x01,0x00,0x44,0x26,
+0xFF,0xFF,0x84,0x30,
+0xFC,0x57,0x00,0x0C,
+0x1A,0x00,0xA6,0x27,
+0x21,0x28,0x40,0x00,
+0x0F,0x00,0x42,0x30,
+0x03,0x00,0x56,0x10,
+0x21,0x20,0x80,0x02,
+0x4B,0x58,0x00,0x0C,
+0x38,0x00,0xA6,0x27,
+0x19,0x00,0xA5,0x93,
+0x00,0x00,0x00,0x00,
+0x26,0x10,0x65,0x02,
+0x01,0x00,0x42,0x30,
+0x0A,0x80,0xC2,0x02,
+0x26,0x18,0x65,0x02,
+0x02,0x00,0x63,0x30,
+0xFD,0x00,0x04,0x32,
+0x0B,0x80,0x83,0x00,
+0x26,0x10,0x65,0x02,
+0x04,0x00,0x42,0x30,
+0xFB,0x00,0x03,0x32,
+0x0B,0x80,0x62,0x00,
+0x26,0x28,0x65,0x02,
+0x08,0x00,0xA5,0x30,
+0xF7,0x00,0x02,0x32,
+0x0B,0x80,0x45,0x00,
+0x0F,0x00,0x03,0x32,
+0x0D,0x00,0x76,0x10,
+0x00,0x00,0x00,0x00,
+0x3E,0x57,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x21,0x90,0x40,0x00,
+0x19,0x00,0xB0,0xA3,
+0xBE,0x58,0x00,0x08,
+0x18,0x00,0xB4,0xA3,
+0x21,0x10,0x32,0x02,
+0x01,0x00,0x42,0x24,
+0xFF,0xFF,0x52,0x30,
+0x01,0x00,0x16,0x24,
+0x8B,0x58,0x00,0x08,
+0x18,0x00,0xB4,0xA3,
+0xBE,0x58,0x00,0x08,
+0x21,0xB8,0x00,0x00,
+0x01,0x80,0x02,0x3C,
+0x25,0xB0,0x03,0x3C,
+0xBC,0x65,0x42,0x24,
+0x18,0x03,0x63,0x34,
+0x00,0x00,0x62,0xAC,
+0x00,0x00,0x83,0x90,
+0x30,0x00,0x02,0x24,
+0x05,0x00,0x62,0x10,
+0x21,0x20,0x00,0x00,
+0x31,0x00,0x02,0x24,
+0x02,0x00,0x62,0x10,
+0x01,0x00,0x04,0x24,
+0x07,0x00,0x04,0x24,
+0x93,0x55,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x01,0x80,0x02,0x3C,
+0x25,0xB0,0x03,0x3C,
+0xF8,0x65,0x42,0x24,
+0x18,0x03,0x63,0x34,
+0x02,0x80,0x04,0x3C,
+0x00,0x00,0x62,0xAC,
+0x08,0x00,0xE0,0x03,
+0x14,0x5E,0x80,0xAC,
+0x42,0xB0,0x02,0x3C,
+0x03,0x00,0x47,0x34,
+0x00,0x00,0xE3,0x90,
+0xFF,0x00,0x84,0x30,
+0x04,0x00,0x84,0x24,
+0xFF,0x00,0x65,0x30,
+0x01,0x00,0x02,0x24,
+0x04,0x30,0x82,0x00,
+0x07,0x18,0x85,0x00,
+0x25,0xB0,0x02,0x3C,
+0xE8,0x03,0x42,0x34,
+0x01,0x00,0x63,0x30,
+0x21,0x20,0xC0,0x00,
+0x00,0x00,0x45,0xA0,
+0x02,0x00,0x60,0x10,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xE6,0xA0,
+0x08,0x00,0xE0,0x03,
+0x24,0x10,0x85,0x00,
+0x00,0x60,0x03,0x40,
+0x01,0x00,0x61,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x02,0x80,0x02,0x3C,
+0x08,0xE4,0x42,0x24,
+0x04,0x00,0x45,0x8C,
+0x00,0x00,0x82,0xAC,
+0x04,0x00,0x44,0xAC,
+0x00,0x00,0xA4,0xAC,
+0x04,0x00,0x85,0xAC,
+0x00,0x60,0x83,0x40,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x00,0x60,0x03,0x40,
+0x01,0x00,0x61,0x34,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x04,0x00,0x85,0x8C,
+0x00,0x00,0x82,0x8C,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xA2,0xAC,
+0x04,0x00,0x45,0xAC,
+0x00,0x00,0x84,0xAC,
+0x04,0x00,0x84,0xAC,
+0x00,0x60,0x83,0x40,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x85,0xAC,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFC,0xFF,0x60,0x14,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x02,0x24,0x04,0x00,
+0xFF,0x00,0x84,0x30,
+0xC0,0x18,0x04,0x00,
+0x21,0x18,0x64,0x00,
+0x80,0x18,0x03,0x00,
+0x21,0x18,0x64,0x00,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x42,0x24,
+0x80,0x18,0x03,0x00,
+0x21,0x18,0x62,0x00,
+0x1C,0x24,0x64,0x8C,
+0xFF,0xF1,0x02,0x24,
+0x24,0x20,0x82,0x00,
+0x08,0x00,0xE0,0x03,
+0x1C,0x24,0x64,0xAC,
+0x02,0x24,0x04,0x00,
+0xFF,0x00,0x84,0x30,
+0xC0,0x18,0x04,0x00,
+0x21,0x18,0x64,0x00,
+0x80,0x18,0x03,0x00,
+0x21,0x18,0x64,0x00,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x42,0x24,
+0x80,0x18,0x03,0x00,
+0x21,0x18,0x62,0x00,
+0x1C,0x24,0x64,0x8C,
+0xFF,0xF1,0x02,0x24,
+0x24,0x20,0x82,0x00,
+0x00,0x02,0x84,0x34,
+0x08,0x00,0xE0,0x03,
+0x1C,0x24,0x64,0xAC,
+0xE0,0xFF,0xBD,0x27,
+0x10,0x00,0xB0,0xAF,
+0xC0,0x80,0x04,0x00,
+0x21,0x80,0x04,0x02,
+0x80,0x80,0x10,0x00,
+0x21,0x80,0x04,0x02,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x42,0x24,
+0x80,0x80,0x10,0x00,
+0x21,0x80,0x02,0x02,
+0x1C,0x00,0xBF,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x1C,0x24,0x05,0x8E,
+0xFF,0x1F,0x02,0x3C,
+0x25,0xB0,0x12,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x14,0x24,0x02,0xAE,
+0x84,0x01,0x43,0x36,
+0xF8,0xFF,0x02,0x24,
+0x00,0x00,0x66,0x8C,
+0x24,0x28,0xA2,0x00,
+0xFF,0xFE,0x02,0x24,
+0x24,0x28,0xA2,0x00,
+0xFF,0xEF,0x03,0x24,
+0x24,0x28,0xA3,0x00,
+0x18,0x24,0x06,0xAE,
+0x1C,0x24,0x05,0xAE,
+0xC9,0x24,0x00,0x0C,
+0x21,0x88,0x80,0x00,
+0x1E,0x24,0x02,0x92,
+0x21,0x88,0x32,0x02,
+0x1C,0x00,0xBF,0x8F,
+0x60,0x01,0x22,0xA2,
+0x18,0x00,0xB2,0x8F,
+0x08,0x24,0x00,0xAE,
+0xEC,0x23,0x00,0xAE,
+0xF0,0x23,0x00,0xAE,
+0xF4,0x23,0x00,0xAE,
+0xF8,0x23,0x00,0xAE,
+0xFC,0x23,0x00,0xAE,
+0x00,0x24,0x00,0xAE,
+0x04,0x24,0x00,0xAE,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0xFF,0x00,0xA5,0x30,
+0xC0,0x10,0x05,0x00,
+0x21,0x10,0x45,0x00,
+0x80,0x10,0x02,0x00,
+0x21,0x10,0x45,0x00,
+0x02,0x80,0x03,0x3C,
+0x30,0x1F,0x63,0x24,
+0x80,0x10,0x02,0x00,
+0x21,0x10,0x43,0x00,
+0x1C,0x24,0x43,0x8C,
+0x25,0xB0,0x05,0x3C,
+0xFF,0x00,0xC6,0x30,
+0x21,0x30,0xC5,0x00,
+0xAF,0x01,0xC2,0x90,
+0x07,0x00,0x63,0x30,
+0x80,0x18,0x03,0x00,
+0x21,0x18,0x65,0x00,
+0xFF,0x00,0x88,0x30,
+0xFF,0x00,0x49,0x30,
+0x84,0x01,0x66,0x8C,
+0x21,0x50,0x00,0x00,
+0x21,0x58,0x00,0x00,
+0x2B,0x00,0x20,0x11,
+0x21,0x20,0x00,0x01,
+0x2B,0x00,0xC0,0x10,
+0x2B,0x10,0x09,0x01,
+0x21,0x28,0x00,0x00,
+0x2D,0x5A,0x00,0x08,
+0x01,0x00,0x07,0x24,
+0xFF,0x00,0x65,0x30,
+0x1D,0x00,0xA2,0x2C,
+0x07,0x00,0x40,0x10,
+0xFF,0xFF,0x02,0x25,
+0x04,0x10,0xA7,0x00,
+0x24,0x10,0x46,0x00,
+0xF9,0xFF,0x40,0x10,
+0x01,0x00,0xA3,0x24,
+0x21,0x58,0xA0,0x00,
+0xFF,0xFF,0x02,0x25,
+0xFF,0x00,0x45,0x30,
+0x2B,0x18,0xAB,0x00,
+0x0F,0x00,0x60,0x14,
+0x2B,0x10,0x49,0x01,
+0x01,0x00,0x04,0x24,
+0x04,0x10,0xA4,0x00,
+0x24,0x10,0x46,0x00,
+0xFF,0xFF,0xA7,0x24,
+0x04,0x00,0x40,0x10,
+0x01,0x00,0x43,0x25,
+0x17,0x00,0x49,0x11,
+0xFF,0x00,0x6A,0x30,
+0x21,0x40,0xA0,0x00,
+0xFF,0x00,0xE5,0x30,
+0x2B,0x10,0xAB,0x00,
+0xF6,0xFF,0x40,0x10,
+0x04,0x10,0xA4,0x00,
+0x2B,0x10,0x49,0x01,
+0x08,0x00,0x40,0x10,
+0x21,0x20,0x00,0x01,
+0x23,0x10,0x2A,0x01,
+0x2A,0x10,0x62,0x01,
+0x04,0x00,0x40,0x14,
+0x21,0x20,0x00,0x00,
+0x23,0x10,0x69,0x01,
+0x21,0x10,0x4A,0x00,
+0xFF,0x00,0x44,0x30,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x80,0x00,
+0xFD,0xFF,0x40,0x14,
+0x21,0x20,0x00,0x00,
+0x23,0x10,0x09,0x01,
+0x4E,0x5A,0x00,0x08,
+0xFF,0x00,0x44,0x30,
+0x21,0x20,0x00,0x01,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x80,0x00,
+0xFF,0x00,0x84,0x30,
+0xC0,0x10,0x04,0x00,
+0x21,0x10,0x44,0x00,
+0x80,0x10,0x02,0x00,
+0x21,0x10,0x44,0x00,
+0x02,0x80,0x03,0x3C,
+0x30,0x1F,0x63,0x24,
+0x80,0x10,0x02,0x00,
+0x21,0x10,0x43,0x00,
+0x25,0xB0,0x06,0x3C,
+0x1C,0x24,0x43,0x8C,
+0xFF,0x00,0xA5,0x30,
+0x21,0x20,0x86,0x00,
+0x21,0x28,0xA6,0x00,
+0x60,0x01,0x82,0x90,
+0xAF,0x01,0xA4,0x90,
+0x07,0x00,0x63,0x30,
+0x80,0x18,0x03,0x00,
+0x21,0x18,0x66,0x00,
+0xFF,0x00,0x48,0x30,
+0xFF,0x00,0x89,0x30,
+0x84,0x01,0x66,0x8C,
+0x21,0x50,0x00,0x00,
+0x21,0x58,0x00,0x00,
+0x2B,0x00,0x20,0x11,
+0x21,0x20,0x00,0x01,
+0x2B,0x00,0xC0,0x10,
+0x2B,0x10,0x09,0x01,
+0x21,0x28,0x00,0x00,
+0x7B,0x5A,0x00,0x08,
+0x01,0x00,0x07,0x24,
+0xFF,0x00,0x65,0x30,
+0x1D,0x00,0xA2,0x2C,
+0x07,0x00,0x40,0x10,
+0xFF,0xFF,0x02,0x25,
+0x04,0x10,0xA7,0x00,
+0x24,0x10,0x46,0x00,
+0xF9,0xFF,0x40,0x10,
+0x01,0x00,0xA3,0x24,
+0x21,0x58,0xA0,0x00,
+0xFF,0xFF,0x02,0x25,
+0xFF,0x00,0x45,0x30,
+0x2B,0x18,0xAB,0x00,
+0x0F,0x00,0x60,0x14,
+0x2B,0x10,0x49,0x01,
+0x01,0x00,0x04,0x24,
+0x04,0x10,0xA4,0x00,
+0x24,0x10,0x46,0x00,
+0xFF,0xFF,0xA7,0x24,
+0x04,0x00,0x40,0x10,
+0x01,0x00,0x43,0x25,
+0x17,0x00,0x49,0x11,
+0xFF,0x00,0x6A,0x30,
+0x21,0x40,0xA0,0x00,
+0xFF,0x00,0xE5,0x30,
+0x2B,0x10,0xAB,0x00,
+0xF6,0xFF,0x40,0x10,
+0x04,0x10,0xA4,0x00,
+0x2B,0x10,0x49,0x01,
+0x08,0x00,0x40,0x10,
+0x21,0x20,0x00,0x01,
+0x23,0x10,0x2A,0x01,
+0x2A,0x10,0x62,0x01,
+0x04,0x00,0x40,0x14,
+0x21,0x20,0x00,0x00,
+0x23,0x10,0x69,0x01,
+0x21,0x10,0x4A,0x00,
+0xFF,0x00,0x44,0x30,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x80,0x00,
+0xFD,0xFF,0x40,0x14,
+0x21,0x20,0x00,0x00,
+0x23,0x10,0x09,0x01,
+0x9C,0x5A,0x00,0x08,
+0xFF,0x00,0x44,0x30,
+0x21,0x20,0x00,0x01,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x80,0x00,
+0xE0,0xFF,0xBD,0x27,
+0x02,0x80,0x02,0x3C,
+0x10,0x00,0xB0,0xAF,
+0x30,0x1F,0x50,0x24,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x1C,0x00,0xBF,0xAF,
+0x21,0x88,0x00,0x00,
+0x21,0x90,0x00,0x02,
+0xDD,0x59,0x00,0x0C,
+0x21,0x20,0x20,0x02,
+0x1E,0x24,0x02,0x92,
+0x21,0x28,0x00,0x00,
+0x80,0x10,0x02,0x00,
+0x21,0x10,0x52,0x00,
+0x60,0x05,0x44,0x8C,
+0xD4,0x05,0x43,0x8C,
+0x00,0x00,0x00,0x00,
+0x21,0x18,0x64,0x00,
+0x42,0x18,0x03,0x00,
+0xE8,0x23,0x03,0xAE,
+0x21,0x10,0x05,0x02,
+0x01,0x00,0xA5,0x24,
+0x1D,0x00,0xA3,0x28,
+0x5A,0x24,0x40,0xA0,
+0x20,0x24,0x40,0xA0,
+0xFA,0xFF,0x60,0x14,
+0x3D,0x24,0x40,0xA0,
+0x01,0x00,0x31,0x26,
+0x20,0x00,0x22,0x2A,
+0x78,0x24,0x00,0xAE,
+0xE9,0xFF,0x40,0x14,
+0x94,0x00,0x10,0x26,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0xD0,0xFF,0xBD,0x27,
+0x28,0x00,0xB6,0xAF,
+0x02,0x80,0x16,0x3C,
+0x24,0x00,0xB5,0xAF,
+0x30,0x1F,0xC6,0x26,
+0x2C,0x00,0xBF,0xAF,
+0x20,0x00,0xB4,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x30,0x38,0xC2,0x8C,
+0xFF,0x00,0x8D,0x30,
+0xFF,0x00,0x03,0x24,
+0xFF,0xFF,0x42,0x38,
+0x21,0xA8,0x00,0x00,
+0xFF,0xFF,0x04,0x34,
+0x0A,0xA8,0x62,0x00,
+0xA4,0x00,0xA0,0x11,
+0x30,0x38,0xC4,0xAC,
+0x02,0x80,0x02,0x3C,
+0xE4,0xE7,0x45,0x24,
+0x04,0x05,0xC4,0x24,
+0xEB,0x5A,0x00,0x08,
+0x21,0x80,0x00,0x00,
+0x01,0x00,0x10,0x26,
+0x00,0x00,0x82,0xA0,
+0x1D,0x00,0x02,0x2A,
+0x0B,0x00,0x40,0x10,
+0x01,0x00,0x84,0x24,
+0x21,0x10,0x05,0x02,
+0x00,0x00,0x42,0x90,
+0x00,0x00,0x00,0x00,
+0xF7,0xFF,0x40,0x10,
+0xFD,0xFF,0x43,0x24,
+0x01,0x00,0x10,0x26,
+0x1D,0x00,0x02,0x2A,
+0x00,0x00,0x83,0xA0,
+0xF7,0xFF,0x40,0x14,
+0x01,0x00,0x84,0x24,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x4A,0x24,
+0x02,0x80,0x03,0x3C,
+0x02,0x80,0x02,0x3C,
+0x7C,0xE5,0x6C,0x24,
+0x04,0xE5,0x4B,0x24,
+0x21,0x80,0x00,0x00,
+0x21,0x48,0x00,0x00,
+0x21,0x30,0x00,0x00,
+0x21,0x40,0x2A,0x01,
+0x21,0x38,0x2C,0x01,
+0x21,0x10,0xE6,0x00,
+0x91,0x00,0x44,0x90,
+0x00,0x00,0x45,0x90,
+0x21,0x18,0x06,0x01,
+0x01,0x00,0xC6,0x24,
+0x05,0x00,0xC2,0x28,
+0x39,0x04,0x64,0xA0,
+0xF8,0xFF,0x40,0x14,
+0xA8,0x03,0x65,0xA0,
+0x21,0x10,0x0B,0x02,
+0x1D,0x00,0x44,0x90,
+0x00,0x00,0x45,0x90,
+0x21,0x18,0x0A,0x02,
+0x01,0x00,0x10,0x26,
+0x1D,0x00,0x02,0x2A,
+0xE7,0x04,0x64,0xA0,
+0xCA,0x04,0x65,0xA0,
+0xEB,0xFF,0x40,0x14,
+0x05,0x00,0x29,0x25,
+0x9A,0x00,0xA0,0x11,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x48,0x24,
+0x02,0x80,0x03,0x3C,
+0x02,0x80,0x02,0x3C,
+0x78,0xE8,0x69,0x24,
+0x04,0xE8,0x47,0x24,
+0x21,0x80,0x00,0x00,
+0x80,0x18,0x10,0x00,
+0x21,0x10,0x69,0x00,
+0x21,0x20,0x67,0x00,
+0x00,0x00,0x46,0x8C,
+0x00,0x00,0x85,0x8C,
+0x01,0x00,0x10,0x26,
+0x21,0x18,0x68,0x00,
+0x04,0x00,0x02,0x2A,
+0x60,0x05,0x65,0xAC,
+0xF6,0xFF,0x40,0x14,
+0xD4,0x05,0x66,0xAC,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x49,0x24,
+0x02,0x80,0x03,0x3C,
+0x02,0x80,0x02,0x3C,
+0x78,0xE8,0x68,0x24,
+0x04,0xE8,0x47,0x24,
+0x04,0x00,0x10,0x24,
+0x80,0x20,0x10,0x00,
+0x21,0x10,0x88,0x00,
+0x21,0x30,0x87,0x00,
+0x00,0x00,0x45,0x8C,
+0x00,0x00,0xC3,0x8C,
+0x01,0x00,0x10,0x26,
+0x21,0x20,0x89,0x00,
+0x82,0x28,0x05,0x00,
+0x82,0x18,0x03,0x00,
+0x1D,0x00,0x02,0x2A,
+0x60,0x05,0x83,0xAC,
+0xF4,0xFF,0x40,0x14,
+0xD4,0x05,0x85,0xAC,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x53,0x24,
+0x21,0x80,0x00,0x00,
+0x21,0xA0,0x60,0x02,
+0x21,0x90,0x00,0x00,
+0x46,0x5B,0x00,0x08,
+0x21,0x88,0x60,0x02,
+0x01,0x00,0x10,0x26,
+0x20,0x00,0x02,0x2A,
+0x94,0x00,0x31,0x26,
+0x32,0x00,0x40,0x10,
+0x94,0x00,0x52,0x26,
+0x1C,0x24,0x24,0x8E,
+0x01,0x00,0x03,0x24,
+0x02,0x13,0x04,0x00,
+0x01,0x00,0x42,0x30,
+0xF6,0xFF,0x43,0x14,
+0x07,0x00,0x82,0x30,
+0x25,0xB0,0x03,0x3C,
+0x80,0x10,0x02,0x00,
+0x21,0x10,0x43,0x00,
+0x84,0x01,0x45,0x8C,
+0x14,0x24,0x23,0x8E,
+0x21,0x20,0x00,0x02,
+0x24,0x28,0xA3,0x00,
+0xC9,0x24,0x00,0x0C,
+0x18,0x24,0x25,0xAE,
+0x1E,0x24,0x24,0x92,
+0x57,0x24,0x00,0x0C,
+0xFF,0x00,0x05,0x32,
+0x1E,0x24,0x23,0x92,
+0xEC,0x23,0x20,0xAE,
+0xF0,0x23,0x20,0xAE,
+0x80,0x18,0x03,0x00,
+0xF4,0x23,0x20,0xAE,
+0xF8,0x23,0x20,0xAE,
+0xFC,0x23,0x20,0xAE,
+0x00,0x24,0x20,0xAE,
+0x04,0x24,0x20,0xAE,
+0x08,0x24,0x20,0xAE,
+0x21,0x18,0x74,0x00,
+0x60,0x05,0x64,0x8C,
+0xD4,0x05,0x62,0x8C,
+0x21,0x30,0x00,0x00,
+0x21,0x28,0x53,0x02,
+0x21,0x10,0x44,0x00,
+0x42,0x10,0x02,0x00,
+0xE8,0x23,0x22,0xAE,
+0x21,0x10,0xA6,0x00,
+0x01,0x00,0xC6,0x24,
+0x1D,0x00,0xC3,0x28,
+0x5A,0x24,0x40,0xA0,
+0x20,0x24,0x40,0xA0,
+0xFA,0xFF,0x60,0x14,
+0x3D,0x24,0x40,0xA0,
+0x01,0x00,0x10,0x26,
+0x20,0x00,0x02,0x2A,
+0x78,0x24,0xA0,0xAC,
+0x94,0x00,0x31,0x26,
+0xD0,0xFF,0x40,0x14,
+0x94,0x00,0x52,0x26,
+0x02,0x00,0xA0,0x16,
+0x30,0x1F,0xC2,0x26,
+0x30,0x38,0x40,0xAC,
+0x2C,0x00,0xBF,0x8F,
+0x28,0x00,0xB6,0x8F,
+0x24,0x00,0xB5,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x30,0x00,0xBD,0x27,
+0x02,0x80,0x02,0x3C,
+0xE4,0xE7,0x45,0x24,
+0x04,0x05,0xC4,0x24,
+0x21,0x80,0x00,0x00,
+0x21,0x10,0x05,0x02,
+0x00,0x00,0x43,0x90,
+0x01,0x00,0x10,0x26,
+0x1D,0x00,0x02,0x2A,
+0x00,0x00,0x83,0xA0,
+0xFA,0xFF,0x40,0x14,
+0x01,0x00,0x84,0x24,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x4A,0x24,
+0x02,0x80,0x03,0x3C,
+0x02,0x80,0x02,0x3C,
+0xA0,0xE6,0x6C,0x24,
+0x40,0xE5,0x4B,0x24,
+0x21,0x80,0x00,0x00,
+0x21,0x48,0x00,0x00,
+0x21,0x30,0x00,0x00,
+0x21,0x40,0x2A,0x01,
+0x21,0x38,0x2C,0x01,
+0x21,0x10,0xE6,0x00,
+0x91,0x00,0x44,0x90,
+0x00,0x00,0x45,0x90,
+0x21,0x18,0x06,0x01,
+0x01,0x00,0xC6,0x24,
+0x05,0x00,0xC2,0x28,
+0x39,0x04,0x64,0xA0,
+0xF8,0xFF,0x40,0x14,
+0xA8,0x03,0x65,0xA0,
+0x21,0x10,0x0B,0x02,
+0x1D,0x00,0x44,0x90,
+0x00,0x00,0x45,0x90,
+0x21,0x18,0x0A,0x02,
+0x01,0x00,0x10,0x26,
+0x1D,0x00,0x02,0x2A,
+0xE7,0x04,0x64,0xA0,
+0xCA,0x04,0x65,0xA0,
+0xEB,0xFF,0x40,0x14,
+0x05,0x00,0x29,0x25,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x49,0x24,
+0x02,0x80,0x03,0x3C,
+0x02,0x80,0x02,0x3C,
+0x78,0xE8,0x68,0x24,
+0x04,0xE8,0x47,0x24,
+0x21,0x80,0x00,0x00,
+0x80,0x18,0x10,0x00,
+0x21,0x10,0x68,0x00,
+0x21,0x20,0x67,0x00,
+0x00,0x00,0x46,0x8C,
+0x00,0x00,0x85,0x8C,
+0x01,0x00,0x10,0x26,
+0x21,0x18,0x69,0x00,
+0x1D,0x00,0x02,0x2A,
+0x60,0x05,0x65,0xAC,
+0xF6,0xFF,0x40,0x14,
+0xD4,0x05,0x66,0xAC,
+0x3B,0x5B,0x00,0x08,
+0x02,0x80,0x02,0x3C,
+0xD8,0xFF,0xBD,0x27,
+0xFF,0xFF,0x84,0x30,
+0x18,0x00,0xB2,0xAF,
+0xF0,0x01,0x92,0x30,
+0x02,0x91,0x12,0x00,
+0x14,0x00,0xB1,0xAF,
+0xC0,0x88,0x12,0x00,
+0x21,0x88,0x32,0x02,
+0x80,0x88,0x11,0x00,
+0x21,0x88,0x32,0x02,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x42,0x24,
+0x80,0x88,0x11,0x00,
+0x21,0x88,0x22,0x02,
+0x20,0x00,0xBF,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x1C,0x24,0x30,0x8E,
+0x00,0x02,0x82,0x30,
+0xFF,0xFE,0x03,0x24,
+0x2B,0x10,0x02,0x00,
+0x00,0x10,0x10,0x36,
+0x24,0x80,0x03,0x02,
+0x00,0x12,0x02,0x00,
+0x25,0x80,0x02,0x02,
+0x14,0x24,0x25,0xAE,
+0x1C,0x24,0x30,0xAE,
+0x76,0x25,0x00,0x0C,
+0x21,0x98,0xA0,0x00,
+0xF8,0xFF,0x03,0x24,
+0x24,0x80,0x03,0x02,
+0x07,0x00,0x42,0x30,
+0x25,0x80,0x02,0x02,
+0x07,0x00,0x03,0x32,
+0x25,0xB0,0x02,0x3C,
+0x80,0x18,0x03,0x00,
+0x1C,0x24,0x30,0xAE,
+0x21,0x18,0x62,0x00,
+0x84,0x01,0x62,0x8C,
+0x21,0x20,0x40,0x02,
+0x24,0x10,0x53,0x00,
+0xC9,0x24,0x00,0x0C,
+0x18,0x24,0x22,0xAE,
+0x1E,0x24,0x24,0x92,
+0x21,0x28,0x40,0x02,
+0x20,0x00,0xBF,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x57,0x24,0x00,0x08,
+0x28,0x00,0xBD,0x27,
+0xDD,0x59,0x00,0x08,
+0xFF,0x00,0x84,0x30,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x43,0x24,
+0x1F,0x00,0x04,0x24,
+0x1C,0x24,0x62,0x8C,
+0xFF,0xFF,0x84,0x24,
+0x00,0x10,0x42,0x34,
+0x1C,0x24,0x62,0xAC,
+0xFB,0xFF,0x81,0x04,
+0x94,0x00,0x63,0x24,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x85,0xAC,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFC,0xFF,0x60,0x14,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xE0,0xFF,0xBD,0x27,
+0x44,0x00,0x02,0x24,
+0x10,0x00,0xA2,0xA3,
+0x49,0x00,0x03,0x24,
+0x47,0x00,0x02,0x24,
+0x02,0x80,0x07,0x3C,
+0xD4,0xF3,0xE7,0x24,
+0x11,0x00,0xA3,0xA3,
+0x12,0x00,0xA2,0xA3,
+0x10,0x27,0x03,0x24,
+0x01,0x00,0x02,0x24,
+0x01,0x80,0x06,0x3C,
+0x10,0x00,0xA5,0x27,
+0x21,0x20,0xE0,0x00,
+0x20,0x73,0xC6,0x24,
+0x0C,0x00,0xE3,0xAC,
+0x14,0x00,0xE2,0xA0,
+0x18,0x00,0xBF,0xAF,
+0xA2,0x23,0x00,0x0C,
+0x13,0x00,0xA0,0xA3,
+0x18,0x00,0xBF,0x8F,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0xD0,0xFF,0xBD,0x27,
+0x25,0xB0,0x03,0x3C,
+0x20,0x00,0xB4,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x2C,0x00,0xBF,0xAF,
+0x28,0x00,0xB6,0xAF,
+0x24,0x00,0xB5,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x03,0x0D,0x64,0x34,
+0x00,0x00,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x54,0x30,
+0x70,0x00,0x93,0x32,
+0x5D,0x00,0x60,0x12,
+0x42,0x00,0x63,0x34,
+0x8F,0x00,0x82,0x32,
+0x00,0x00,0x82,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x55,0x00,0x60,0x12,
+0x00,0x00,0x00,0x00,
+0x00,0x60,0x12,0x40,
+0x01,0x00,0x41,0x36,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x0F,0x00,0x11,0x3C,
+0x21,0x20,0x00,0x00,
+0x8A,0x47,0x00,0x0C,
+0xFF,0xFF,0x25,0x36,
+0x21,0xA8,0x40,0x00,
+0x00,0x60,0x92,0x40,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0xE6,0x44,0x00,0x0C,
+0x01,0x00,0x04,0x24,
+0x00,0x60,0x12,0x40,
+0x01,0x00,0x41,0x36,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x21,0x20,0x00,0x00,
+0x8A,0x47,0x00,0x0C,
+0xFF,0xFF,0x25,0x36,
+0x21,0xB0,0x40,0x00,
+0x00,0x60,0x92,0x40,
+0x64,0x00,0x04,0x24,
+0x54,0x22,0x00,0x0C,
+0x08,0x00,0x10,0x3C,
+0xFF,0xFF,0x10,0x36,
+0xE6,0x44,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0x01,0x00,0x12,0x3C,
+0x24,0x30,0xB0,0x02,
+0x25,0x30,0xD2,0x00,
+0xFF,0xFF,0x25,0x36,
+0x5F,0x47,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0x24,0x80,0xD0,0x02,
+0xE6,0x44,0x00,0x0C,
+0x01,0x00,0x04,0x24,
+0x25,0x30,0x12,0x02,
+0xFF,0xFF,0x25,0x36,
+0x5F,0x47,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0xE6,0x44,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0x00,0x60,0x12,0x40,
+0x01,0x00,0x41,0x36,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x0F,0x00,0x10,0x3C,
+0x18,0x00,0x04,0x24,
+0x8A,0x47,0x00,0x0C,
+0xFF,0xFF,0x05,0x36,
+0x21,0x88,0x40,0x00,
+0x00,0x60,0x92,0x40,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0x18,0x00,0x04,0x24,
+0xFF,0xFF,0x05,0x36,
+0x5F,0x47,0x00,0x0C,
+0x00,0x80,0x26,0x36,
+0x25,0x22,0x00,0x0C,
+0x03,0x00,0x04,0x24,
+0x25,0x00,0x60,0x16,
+0x25,0xB0,0x02,0x3C,
+0x2C,0x00,0xBF,0x8F,
+0x28,0x00,0xB6,0x8F,
+0x24,0x00,0xB5,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x25,0xB0,0x02,0x3C,
+0x42,0x00,0x42,0x34,
+0x30,0x00,0xBD,0x27,
+0x00,0x00,0x40,0xA0,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xFF,0xFF,0x02,0x24,
+0x00,0x00,0x62,0xA0,
+0x00,0x60,0x12,0x40,
+0x01,0x00,0x41,0x36,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x0F,0x00,0x10,0x3C,
+0x18,0x00,0x04,0x24,
+0x8A,0x47,0x00,0x0C,
+0xFF,0xFF,0x05,0x36,
+0x21,0x88,0x40,0x00,
+0x00,0x60,0x92,0x40,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0x18,0x00,0x04,0x24,
+0xFF,0xFF,0x05,0x36,
+0x5F,0x47,0x00,0x0C,
+0x00,0x80,0x26,0x36,
+0x25,0x22,0x00,0x0C,
+0x03,0x00,0x04,0x24,
+0xDD,0xFF,0x60,0x12,
+0x25,0xB0,0x02,0x3C,
+0x03,0x0D,0x42,0x34,
+0x00,0x00,0x54,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x0F,0x00,0x10,0x3C,
+0x21,0x30,0xA0,0x02,
+0xFF,0xFF,0x05,0x36,
+0x5F,0x47,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0xE6,0x44,0x00,0x0C,
+0x01,0x00,0x04,0x24,
+0xFF,0xFF,0x05,0x36,
+0x21,0x30,0xC0,0x02,
+0x5F,0x47,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0x2C,0x00,0xBF,0x8F,
+0x28,0x00,0xB6,0x8F,
+0x24,0x00,0xB5,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x20,0x00,0x00,
+0xE6,0x44,0x00,0x08,
+0x30,0x00,0xBD,0x27,
+0xC8,0xFF,0xBD,0x27,
+0x28,0x00,0xB4,0xAF,
+0x02,0x80,0x14,0x3C,
+0x30,0x00,0xB6,0xAF,
+0x34,0x00,0xBF,0xAF,
+0x2C,0x00,0xB5,0xAF,
+0x24,0x00,0xB3,0xAF,
+0x20,0x00,0xB2,0xAF,
+0x1C,0x00,0xB1,0xAF,
+0x18,0x00,0xB0,0xAF,
+0x30,0x1F,0x85,0x26,
+0x0C,0x00,0xA2,0x8C,
+0x00,0x00,0x00,0x00,
+0x82,0x17,0x02,0x00,
+0x01,0x00,0x42,0x30,
+0x08,0x00,0x40,0x14,
+0x06,0x00,0x16,0x24,
+0x08,0x00,0xA2,0x8C,
+0x01,0x00,0x03,0x24,
+0x42,0x17,0x02,0x00,
+0x03,0x00,0x42,0x30,
+0x57,0x00,0x43,0x10,
+0x25,0xB0,0x02,0x3C,
+0x30,0x1F,0x85,0x26,
+0x0C,0x00,0xA2,0x8C,
+0x01,0x00,0x03,0x24,
+0x82,0x17,0x02,0x00,
+0x01,0x00,0x44,0x30,
+0x0B,0x00,0x83,0x10,
+0x21,0x10,0x00,0x00,
+0x34,0x00,0xBF,0x8F,
+0x30,0x00,0xB6,0x8F,
+0x2C,0x00,0xB5,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x38,0x00,0xBD,0x27,
+0x08,0x00,0xA2,0x8C,
+0x00,0x00,0x00,0x00,
+0x42,0x17,0x02,0x00,
+0x03,0x00,0x43,0x30,
+0xF1,0xFF,0x64,0x14,
+0x21,0x10,0x00,0x00,
+0x10,0x00,0xA2,0x8C,
+0x00,0x00,0x00,0x00,
+0x82,0x17,0x02,0x00,
+0x50,0x02,0x43,0x10,
+0x25,0xB0,0x02,0x3C,
+0xC7,0x02,0xB3,0x90,
+0x62,0x0C,0x42,0x34,
+0xFF,0x00,0x63,0x32,
+0x00,0x00,0x43,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x30,0x1F,0x90,0x26,
+0xC6,0x02,0x02,0x92,
+0x00,0x00,0x00,0x00,
+0x83,0x00,0x40,0x10,
+0x01,0x00,0x02,0x24,
+0x25,0xB0,0x11,0x3C,
+0x03,0x0D,0x23,0x36,
+0x00,0x00,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x70,0x00,0x42,0x30,
+0xA9,0x00,0x40,0x14,
+0xCC,0x00,0x02,0x24,
+0xC4,0x02,0x02,0x96,
+0x00,0x00,0x00,0x00,
+0x23,0x20,0x53,0x00,
+0x2B,0x18,0x53,0x00,
+0x23,0x10,0x62,0x02,
+0x0A,0x10,0x83,0x00,
+0x03,0x00,0x42,0x2C,
+0x76,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0xC4,0x02,0x03,0x92,
+0x63,0x0C,0x22,0x36,
+0x21,0x20,0x00,0x00,
+0x00,0x00,0x43,0xA0,
+0x01,0x00,0x82,0x24,
+0xFF,0x00,0x44,0x30,
+0x06,0x00,0x83,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x82,0x24,
+0x30,0x1F,0x83,0x26,
+0xC3,0x02,0x62,0x90,
+0x08,0x00,0x66,0x8C,
+0xC2,0x02,0x73,0xA0,
+0x23,0x20,0x53,0x00,
+0x02,0x2C,0x06,0x00,
+0x2B,0x40,0x62,0x02,
+0x23,0x90,0x62,0x02,
+0x0B,0x90,0x88,0x00,
+0x3F,0x00,0xA7,0x30,
+0x3F,0x00,0xC6,0x30,
+0x24,0x00,0x02,0x24,
+0x20,0x00,0x03,0x24,
+0x23,0x10,0x46,0x00,
+0x91,0x00,0x40,0x16,
+0x23,0x20,0x67,0x00,
+0xE6,0x5C,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x80,0x0C,0x42,0x34,
+0x00,0x00,0x43,0x8C,
+0x21,0x30,0xA0,0x00,
+0xC0,0xFF,0x02,0x3C,
+0x24,0x20,0x62,0x00,
+0x21,0x88,0x00,0x00,
+0xC0,0xFF,0x05,0x3C,
+0x42,0x5D,0x00,0x08,
+0x18,0x00,0xC3,0x24,
+0x01,0x00,0x31,0x26,
+0x25,0x00,0x22,0x2E,
+0x0D,0x00,0x40,0x10,
+0x02,0x80,0x02,0x3C,
+0x00,0x00,0x62,0x8C,
+0x00,0x00,0x00,0x00,
+0x24,0x10,0x45,0x00,
+0xF8,0xFF,0x44,0x14,
+0x04,0x00,0x63,0x24,
+0x08,0x00,0xC2,0x8C,
+0xC0,0xFF,0x03,0x24,
+0x3F,0x00,0x24,0x32,
+0x24,0x10,0x43,0x00,
+0x25,0x10,0x44,0x00,
+0x08,0x00,0xC2,0xAC,
+0x02,0x80,0x02,0x3C,
+0xDE,0x5D,0x44,0x90,
+0x22,0x00,0x03,0x24,
+0x42,0x00,0x83,0x10,
+0x92,0x00,0x02,0x24,
+0x41,0x00,0x82,0x10,
+0x25,0xB0,0x02,0x3C,
+0x25,0xB0,0x02,0x3C,
+0x24,0x0A,0x42,0x34,
+0x00,0x00,0x44,0x8C,
+0x3F,0x3F,0x03,0x3C,
+0x3F,0x3F,0x63,0x34,
+0x24,0x20,0x83,0x00,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0xDE,0x1F,0x53,0x24,
+0xE6,0x20,0x72,0x24,
+0x21,0x88,0x00,0x00,
+0x69,0x5D,0x00,0x08,
+0x10,0x00,0xA4,0xAF,
+0x39,0x52,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x4B,0x00,0x40,0x10,
+0x30,0x1F,0x85,0x26,
+0x01,0x00,0x31,0x26,
+0x21,0x00,0x22,0x2E,
+0x17,0x00,0x40,0x10,
+0x30,0x1F,0x82,0x26,
+0xC0,0x80,0x11,0x00,
+0x10,0x00,0xA4,0x27,
+0x21,0x28,0x13,0x02,
+0x39,0x52,0x00,0x0C,
+0x04,0x00,0x06,0x24,
+0x21,0x28,0x12,0x02,
+0x10,0x00,0xA4,0x27,
+0xF0,0xFF,0x40,0x14,
+0x04,0x00,0x06,0x24,
+0x30,0x1F,0x85,0x26,
+0x08,0x00,0xA3,0x8C,
+0xC0,0xFF,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x3F,0x00,0x24,0x32,
+0x24,0x18,0x62,0x00,
+0x00,0x24,0x04,0x00,
+0xFF,0x7F,0x02,0x3C,
+0x25,0x18,0x64,0x00,
+0xFF,0xFF,0x42,0x34,
+0x24,0x18,0x62,0x00,
+0x08,0x00,0xA3,0xAC,
+0x30,0x1F,0x82,0x26,
+0x0C,0x00,0x43,0x8C,
+0x00,0x40,0x04,0x3C,
+0x30,0x1F,0x85,0x26,
+0x25,0x18,0x64,0x00,
+0x0C,0x00,0x43,0xAC,
+0x0C,0x00,0xA2,0x8C,
+0x01,0x00,0x03,0x24,
+0x82,0x17,0x02,0x00,
+0x01,0x00,0x44,0x30,
+0x5D,0xFF,0x83,0x14,
+0x21,0x10,0x00,0x00,
+0xF0,0x5C,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0xC6,0x02,0x02,0xA2,
+0x0A,0x5D,0x00,0x08,
+0xC4,0x02,0x13,0xA6,
+0x23,0x5C,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x1A,0x5D,0x00,0x08,
+0xC4,0x02,0x13,0xA6,
+0x25,0xB0,0x02,0x3C,
+0x88,0x0C,0x42,0x34,
+0x00,0x00,0x44,0x8C,
+0x02,0x80,0x03,0x3C,
+0x30,0x1F,0x66,0x24,
+0xC0,0xFF,0x02,0x3C,
+0x24,0x20,0x82,0x00,
+0x21,0x88,0x00,0x00,
+0xC0,0xFF,0x05,0x3C,
+0xA2,0x5D,0x00,0x08,
+0x18,0x00,0xC3,0x24,
+0x01,0x00,0x31,0x26,
+0x25,0x00,0x22,0x2E,
+0xB4,0xFF,0x40,0x10,
+0x25,0xB0,0x02,0x3C,
+0x00,0x00,0x62,0x8C,
+0x00,0x00,0x00,0x00,
+0x24,0x10,0x45,0x00,
+0xF8,0xFF,0x44,0x14,
+0x04,0x00,0x63,0x24,
+0x08,0x00,0xC2,0x8C,
+0x3F,0x00,0x23,0x32,
+0xFF,0xC0,0x04,0x24,
+0x24,0x10,0x44,0x00,
+0x00,0x1A,0x03,0x00,
+0x25,0x10,0x43,0x00,
+0x54,0x5D,0x00,0x08,
+0x08,0x00,0xC2,0xAC,
+0x08,0x00,0xA3,0x8C,
+0xC0,0xFF,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x3F,0x00,0x24,0x32,
+0x24,0x18,0x62,0x00,
+0x00,0x24,0x04,0x00,
+0x25,0x18,0x64,0x00,
+0x00,0x80,0x02,0x3C,
+0x7D,0x5D,0x00,0x08,
+0x25,0x18,0x62,0x00,
+0x63,0x0C,0x23,0x36,
+0x00,0x00,0x62,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x24,0x5D,0x00,0x08,
+0x30,0x1F,0x83,0x26,
+0x71,0x01,0x00,0x11,
+0x23,0x28,0xF2,0x00,
+0x2B,0x10,0x42,0x02,
+0x21,0x18,0xD2,0x00,
+0x00,0x00,0x42,0x38,
+0x24,0x00,0x08,0x24,
+0x2B,0x20,0x44,0x02,
+0x0B,0x40,0x62,0x00,
+0x06,0x00,0x80,0x10,
+0x20,0x00,0x15,0x24,
+0x30,0x1F,0x83,0x26,
+0x0A,0x00,0x62,0x94,
+0x00,0x00,0x00,0x00,
+0x3F,0x00,0x42,0x30,
+0x21,0xA8,0x52,0x00,
+0x2B,0x28,0xC8,0x02,
+0x5E,0x01,0xA0,0x10,
+0x30,0x1F,0x82,0x26,
+0x80,0x10,0x08,0x00,
+0x30,0x1F,0x83,0x26,
+0x21,0x10,0x43,0x00,
+0x18,0x00,0x44,0x8C,
+0x00,0x00,0x00,0x00,
+0x82,0x25,0x04,0x00,
+0x30,0x1F,0x86,0x26,
+0x0C,0x00,0xC3,0x8C,
+0x00,0x00,0x00,0x00,
+0xFF,0x03,0x67,0x30,
+0x47,0x01,0xE0,0x10,
+0x00,0x02,0x62,0x30,
+0x04,0x00,0x40,0x10,
+0x18,0x00,0xE4,0x00,
+0x00,0xFC,0x02,0x24,
+0x25,0x38,0xE2,0x00,
+0x18,0x00,0xE4,0x00,
+0x82,0x82,0x03,0x00,
+0xFF,0x03,0x10,0x32,
+0x00,0x02,0x03,0x32,
+0x12,0x10,0x00,0x00,
+0x02,0x12,0x02,0x00,
+0x03,0x00,0x60,0x10,
+0xFF,0x03,0x45,0x30,
+0x00,0xFC,0x02,0x24,
+0x25,0x80,0x02,0x02,
+0x18,0x00,0x04,0x02,
+0x80,0x1D,0x04,0x00,
+0x25,0xB0,0x11,0x3C,
+0x80,0x0C,0x24,0x36,
+0x94,0x0C,0x31,0x36,
+0x12,0x80,0x00,0x00,
+0x02,0x82,0x10,0x00,
+0x3F,0x00,0x02,0x32,
+0x00,0x14,0x02,0x00,
+0x25,0x18,0x62,0x00,
+0x25,0x18,0x65,0x00,
+0x21,0x28,0x60,0x00,
+0x02,0x5C,0x00,0x0C,
+0x10,0x00,0xA3,0xAF,
+0x00,0x00,0x23,0x8E,
+0xFF,0x0F,0x02,0x3C,
+0xC0,0x03,0x10,0x32,
+0xFF,0xFF,0x42,0x34,
+0x24,0x18,0x62,0x00,
+0x80,0x85,0x10,0x00,
+0x25,0x18,0x70,0x00,
+0x21,0x20,0x20,0x02,
+0x21,0x28,0x60,0x00,
+0x10,0x00,0xA3,0xAF,
+0x02,0x5C,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x30,0x1F,0x83,0x26,
+0x08,0x00,0x62,0x8C,
+0x00,0x00,0x00,0x00,
+0xB9,0x00,0x40,0x04,
+0xC0,0x28,0x15,0x00,
+0x21,0x10,0xA3,0x00,
+0xAC,0x00,0x44,0x90,
+0x25,0xB0,0x03,0x3C,
+0x22,0x0A,0x63,0x34,
+0x00,0x00,0x64,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x30,0x1F,0x82,0x26,
+0x21,0x10,0xA2,0x00,
+0xAD,0x00,0x44,0x90,
+0x25,0xB0,0x03,0x3C,
+0x23,0x0A,0x63,0x34,
+0x00,0x00,0x64,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x30,0x1F,0x82,0x26,
+0x21,0x10,0xA2,0x00,
+0xAE,0x00,0x44,0x90,
+0x25,0xB0,0x03,0x3C,
+0x24,0x0A,0x63,0x34,
+0x00,0x00,0x64,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x30,0x1F,0x82,0x26,
+0x21,0x10,0xA2,0x00,
+0xAF,0x00,0x44,0x90,
+0x25,0xB0,0x03,0x3C,
+0x25,0x0A,0x63,0x34,
+0x00,0x00,0x64,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x30,0x1F,0x82,0x26,
+0x21,0x10,0xA2,0x00,
+0xB0,0x00,0x44,0x90,
+0x25,0xB0,0x03,0x3C,
+0x26,0x0A,0x63,0x34,
+0x00,0x00,0x64,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x30,0x1F,0x82,0x26,
+0x21,0x10,0xA2,0x00,
+0xB1,0x00,0x44,0x90,
+0x25,0xB0,0x03,0x3C,
+0x27,0x0A,0x63,0x34,
+0x00,0x00,0x64,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x30,0x1F,0x82,0x26,
+0x21,0x10,0xA2,0x00,
+0xB2,0x00,0x44,0x90,
+0x25,0xB0,0x03,0x3C,
+0x28,0x0A,0x63,0x34,
+0x00,0x00,0x64,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x30,0x1F,0x82,0x26,
+0x21,0x10,0xA2,0x00,
+0xB3,0x00,0x44,0x90,
+0x25,0xB0,0x03,0x3C,
+0x29,0x0A,0x63,0x34,
+0x00,0x00,0x64,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x02,0x80,0x02,0x3C,
+0xDE,0x5D,0x44,0x90,
+0x22,0x00,0x03,0x24,
+0x03,0x00,0x83,0x10,
+0x92,0x00,0x02,0x24,
+0x73,0xFE,0x82,0x14,
+0x21,0x10,0x00,0x00,
+0x30,0x1F,0x82,0x26,
+0x08,0x00,0x43,0x8C,
+0x01,0x00,0x44,0x3A,
+0x24,0x00,0x02,0x24,
+0x02,0x1A,0x03,0x00,
+0x3F,0x00,0x63,0x30,
+0x01,0x00,0x84,0x30,
+0xF3,0x00,0x80,0x10,
+0x23,0x28,0x43,0x00,
+0x42,0x18,0x12,0x00,
+0x40,0x10,0x03,0x00,
+0x21,0x90,0x43,0x00,
+0x30,0x1F,0x83,0x26,
+0xC3,0x02,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x62,0x02,
+0xB8,0x00,0x40,0x10,
+0x2B,0x10,0x45,0x02,
+0x06,0x00,0x40,0x10,
+0x24,0x00,0x06,0x24,
+0x08,0x00,0x62,0x8C,
+0x00,0x00,0x00,0x00,
+0x02,0x12,0x02,0x00,
+0x3F,0x00,0x42,0x30,
+0x21,0x30,0x52,0x00,
+0x2B,0x28,0xC6,0x02,
+0xB8,0x00,0xA0,0x10,
+0x30,0x1F,0x82,0x26,
+0x80,0x10,0x06,0x00,
+0x30,0x1F,0x83,0x26,
+0x21,0x10,0x43,0x00,
+0x18,0x00,0x44,0x8C,
+0x00,0x00,0x00,0x00,
+0x82,0x25,0x04,0x00,
+0x30,0x1F,0x83,0x26,
+0x10,0x00,0x70,0x8C,
+0x00,0x00,0x00,0x00,
+0x82,0x3A,0x10,0x00,
+0xFF,0x03,0xE7,0x30,
+0xC5,0x00,0xE0,0x10,
+0x00,0x02,0xE2,0x30,
+0x04,0x00,0x40,0x10,
+0x18,0x00,0xE4,0x00,
+0x00,0xFC,0x02,0x24,
+0x25,0x38,0xE2,0x00,
+0x18,0x00,0xE4,0x00,
+0x02,0x85,0x10,0x00,
+0xFF,0x03,0x10,0x32,
+0x00,0x02,0x03,0x32,
+0x12,0x10,0x00,0x00,
+0x02,0x12,0x02,0x00,
+0x03,0x00,0x60,0x10,
+0xFF,0x03,0x45,0x30,
+0x00,0xFC,0x02,0x24,
+0x25,0x80,0x02,0x02,
+0x18,0x00,0x04,0x02,
+0x80,0x1D,0x04,0x00,
+0x25,0xB0,0x11,0x3C,
+0x88,0x0C,0x24,0x36,
+0x9C,0x0C,0x31,0x36,
+0x12,0x80,0x00,0x00,
+0x02,0x82,0x10,0x00,
+0x3F,0x00,0x02,0x32,
+0x00,0x14,0x02,0x00,
+0x25,0x18,0x62,0x00,
+0x25,0x18,0x65,0x00,
+0x21,0x28,0x60,0x00,
+0x02,0x5C,0x00,0x0C,
+0x10,0x00,0xA3,0xAF,
+0x00,0x00,0x23,0x8E,
+0xFF,0x0F,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0xC0,0x03,0x10,0x32,
+0x24,0x18,0x62,0x00,
+0x80,0x85,0x10,0x00,
+0x25,0x18,0x70,0x00,
+0x21,0x20,0x20,0x02,
+0x21,0x28,0x60,0x00,
+0x02,0x5C,0x00,0x0C,
+0x10,0x00,0xA3,0xAF,
+0xE6,0x5C,0x00,0x08,
+0x21,0x10,0x00,0x00,
+0x21,0x10,0xA3,0x00,
+0xB4,0x01,0x44,0x90,
+0x25,0xB0,0x03,0x3C,
+0x22,0x0A,0x63,0x34,
+0x00,0x00,0x64,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x30,0x1F,0x82,0x26,
+0x21,0x10,0xA2,0x00,
+0xB5,0x01,0x44,0x90,
+0x25,0xB0,0x03,0x3C,
+0x23,0x0A,0x63,0x34,
+0x00,0x00,0x64,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x30,0x1F,0x82,0x26,
+0x21,0x10,0xA2,0x00,
+0xB6,0x01,0x44,0x90,
+0x25,0xB0,0x03,0x3C,
+0x24,0x0A,0x63,0x34,
+0x00,0x00,0x64,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x30,0x1F,0x82,0x26,
+0x21,0x10,0xA2,0x00,
+0xB7,0x01,0x44,0x90,
+0x25,0xB0,0x03,0x3C,
+0x25,0x0A,0x63,0x34,
+0x00,0x00,0x64,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x30,0x1F,0x82,0x26,
+0x21,0x10,0xA2,0x00,
+0xB8,0x01,0x44,0x90,
+0x25,0xB0,0x03,0x3C,
+0x26,0x0A,0x63,0x34,
+0x00,0x00,0x64,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x30,0x1F,0x82,0x26,
+0x21,0x10,0xA2,0x00,
+0xB9,0x01,0x44,0x90,
+0x25,0xB0,0x03,0x3C,
+0x27,0x0A,0x63,0x34,
+0x00,0x00,0x64,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x30,0x1F,0x82,0x26,
+0x21,0x10,0xA2,0x00,
+0xBA,0x01,0x44,0x90,
+0x25,0xB0,0x03,0x3C,
+0x28,0x0A,0x63,0x34,
+0x00,0x00,0x64,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x42,0x24,
+0x30,0x1F,0x82,0x26,
+0x21,0x10,0xA2,0x00,
+0xBB,0x01,0x44,0x90,
+0x25,0xB0,0x03,0x3C,
+0x29,0x0A,0x63,0x34,
+0x00,0x00,0x64,0xA0,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFC,0xFF,0x60,0x14,
+0x00,0x00,0x00,0x00,
+0x6E,0x5E,0x00,0x08,
+0x02,0x80,0x02,0x3C,
+0x36,0x00,0xA0,0x10,
+0x80,0x10,0x08,0x00,
+0x21,0x10,0x46,0x00,
+0x18,0x00,0x45,0x8C,
+0x25,0xB0,0x04,0x3C,
+0x02,0x5C,0x00,0x0C,
+0x80,0x0C,0x84,0x34,
+0x25,0xB0,0x04,0x3C,
+0x94,0x0C,0x84,0x34,
+0x07,0x5E,0x00,0x08,
+0x21,0x28,0x00,0x00,
+0x30,0x00,0x43,0x8C,
+0xDB,0x5D,0x00,0x08,
+0x82,0x25,0x03,0x00,
+0x23,0x20,0xD2,0x00,
+0x2B,0x10,0x46,0x02,
+0x2B,0x18,0x47,0x02,
+0x21,0x40,0x00,0x00,
+0x21,0xA8,0x00,0x00,
+0x0B,0x40,0x82,0x00,
+0xD2,0x5D,0x00,0x08,
+0x0B,0xA8,0xA3,0x00,
+0x08,0x00,0x62,0x8C,
+0x00,0x00,0x00,0x00,
+0x02,0x12,0x02,0x00,
+0x3F,0x00,0x42,0x30,
+0x2B,0x18,0x42,0x02,
+0x4A,0xFF,0x60,0x14,
+0x23,0x30,0x52,0x00,
+0x21,0x30,0x00,0x00,
+0x21,0x28,0x00,0x00,
+0x30,0x1F,0x82,0x26,
+0x30,0x00,0x43,0x8C,
+0x96,0x5E,0x00,0x08,
+0x82,0x25,0x03,0x00,
+0x0F,0x00,0x11,0x3C,
+0xFF,0xFF,0x25,0x36,
+0x60,0x00,0x06,0x24,
+0x5F,0x47,0x00,0x0C,
+0x24,0x00,0x04,0x24,
+0x25,0x22,0x00,0x0C,
+0xE8,0x03,0x04,0x24,
+0x00,0x60,0x10,0x40,
+0x01,0x00,0x01,0x36,
+0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,
+0x24,0x00,0x04,0x24,
+0x8A,0x47,0x00,0x0C,
+0xFF,0xFF,0x25,0x36,
+0x1F,0x00,0x53,0x30,
+0x00,0x60,0x90,0x40,
+0x54,0x22,0x00,0x0C,
+0x64,0x00,0x04,0x24,
+0x06,0x5D,0x00,0x08,
+0x30,0x1F,0x90,0x26,
+0x30,0x00,0xC5,0x8C,
+0x2C,0x5F,0x00,0x08,
+0x25,0xB0,0x04,0x3C,
+0x13,0x00,0xA0,0x10,
+0x00,0x00,0x00,0x00,
+0x80,0x10,0x06,0x00,
+0x21,0x10,0x43,0x00,
+0x18,0x00,0x45,0x8C,
+0x25,0xB0,0x04,0x3C,
+0x02,0x5C,0x00,0x0C,
+0x88,0x0C,0x84,0x34,
+0x25,0xB0,0x04,0x3C,
+0x9C,0x0C,0x84,0x34,
+0x02,0x5C,0x00,0x0C,
+0x21,0x28,0x00,0x00,
+0xE6,0x5C,0x00,0x08,
+0x21,0x10,0x00,0x00,
+0xFF,0xFF,0x43,0x26,
+0x42,0x18,0x03,0x00,
+0x40,0x10,0x03,0x00,
+0x21,0x10,0x43,0x00,
+0x80,0x5E,0x00,0x08,
+0x01,0x00,0x52,0x24,
+0x30,0x00,0x65,0x8C,
+0x67,0x5F,0x00,0x08,
+0x25,0xB0,0x04,0x3C,
+0x00,0xFF,0x84,0x30,
+0x02,0x22,0x04,0x00,
+0x08,0x00,0x80,0x10,
+0x02,0x80,0x02,0x3C,
+0xFF,0x00,0x02,0x24,
+0x04,0x00,0x82,0x10,
+0xCC,0xFF,0x03,0x24,
+0x02,0x80,0x02,0x3C,
+0x08,0x00,0xE0,0x03,
+0x16,0x22,0x43,0xA0,
+0x02,0x80,0x02,0x3C,
+0x08,0x00,0xE0,0x03,
+0x16,0x22,0x44,0xA0,
+0x02,0x24,0x04,0x00,
+0xFF,0x00,0x84,0x30,
+0xC0,0x10,0x04,0x00,
+0x21,0x10,0x44,0x00,
+0x80,0x10,0x02,0x00,
+0x21,0x10,0x44,0x00,
+0x02,0x80,0x03,0x3C,
+0x80,0x10,0x02,0x00,
+0x30,0x1F,0x63,0x24,
+0x20,0x00,0x84,0x2C,
+0x09,0x00,0x80,0x10,
+0x21,0x10,0x43,0x00,
+0x0C,0x24,0x43,0x8C,
+0x25,0xB0,0x02,0x3C,
+0x74,0x03,0x42,0x34,
+0x02,0x19,0x03,0x00,
+0x7F,0x00,0x63,0x30,
+0x00,0x00,0x43,0xAC,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x02,0x3C,
+0xB0,0x55,0x43,0x8C,
+0x25,0xB0,0x02,0x3C,
+0x74,0x03,0x42,0x34,
+0x02,0x19,0x03,0x00,
+0x7F,0x00,0x63,0x30,
+0x00,0x00,0x43,0xAC,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x85,0x30,
+0xD2,0xFF,0xA3,0x24,
+0xFE,0xFF,0xA2,0x24,
+0xDA,0xFF,0xA4,0x24,
+0x04,0x00,0x63,0x2C,
+0x08,0x00,0x84,0x2C,
+0x06,0x00,0x60,0x14,
+0xFF,0x00,0x42,0x30,
+0xF0,0xFF,0xA2,0x24,
+0xFC,0xFF,0xA3,0x24,
+0x16,0x00,0x46,0x2C,
+0x03,0x00,0x80,0x10,
+0xFF,0x00,0x62,0x30,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xFA,0xFF,0xA3,0x24,
+0xFC,0xFF,0xC0,0x10,
+0x21,0x10,0xA0,0x00,
+0x08,0x00,0xE0,0x03,
+0xFF,0x00,0x62,0x30,
+0x25,0xB0,0x03,0x3C,
+0x03,0x0D,0x63,0x34,
+0x00,0x00,0x62,0x90,
+0x21,0x20,0x00,0x00,
+0xFF,0x00,0x42,0x30,
+0x08,0x00,0x42,0x34,
+0x00,0x00,0x62,0xA0,
+0x01,0x00,0x82,0x24,
+0xFF,0x00,0x44,0x30,
+0x06,0x00,0x83,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x82,0x24,
+0x25,0xB0,0x03,0x3C,
+0x03,0x0D,0x63,0x34,
+0x00,0x00,0x62,0x90,
+0x21,0x20,0x00,0x00,
+0xF7,0x00,0x42,0x30,
+0x00,0x00,0x62,0xA0,
+0x01,0x00,0x82,0x24,
+0xFF,0x00,0x44,0x30,
+0x06,0x00,0x83,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x82,0x24,
+0x25,0xB0,0x03,0x3C,
+0x2D,0x0A,0x63,0x34,
+0x00,0x00,0x62,0x90,
+0x21,0x20,0x00,0x00,
+0x3F,0x00,0x42,0x30,
+0x00,0x00,0x62,0xA0,
+0x01,0x00,0x82,0x24,
+0xFF,0x00,0x44,0x30,
+0x06,0x00,0x83,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x82,0x24,
+0x25,0xB0,0x03,0x3C,
+0x2D,0x0A,0x63,0x34,
+0x00,0x00,0x62,0x90,
+0x21,0x20,0x00,0x00,
+0xFF,0x00,0x42,0x30,
+0x80,0x00,0x42,0x34,
+0x00,0x00,0x62,0xA0,
+0x01,0x00,0x82,0x24,
+0xFF,0x00,0x44,0x30,
+0x06,0x00,0x83,0x2C,
+0xFC,0xFF,0x60,0x14,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x02,0x3C,
+0xFF,0x00,0x03,0x3C,
+0x82,0x01,0x49,0x34,
+0x81,0x01,0x48,0x34,
+0x24,0x10,0x83,0x00,
+0x02,0x3C,0x02,0x00,
+0x00,0xFF,0x63,0x34,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x45,0x24,
+0x02,0x32,0x04,0x00,
+0x01,0x00,0x02,0x24,
+0x24,0x20,0x83,0x00,
+0xE6,0x1D,0xA2,0xA0,
+0xD4,0x1D,0xA0,0xAC,
+0xD8,0x1D,0xA0,0xAC,
+0xDC,0x1D,0xA0,0xAC,
+0x06,0x00,0x80,0x14,
+0xE0,0x1D,0xA0,0xAC,
+0x00,0x00,0x02,0x91,
+0x00,0x00,0x23,0x91,
+0xE4,0x1D,0xA2,0xA0,
+0x08,0x00,0xE0,0x03,
+0xE5,0x1D,0xA3,0xA0,
+0xE5,0x1D,0xA7,0xA0,
+0x08,0x00,0xE0,0x03,
+0xE4,0x1D,0xA6,0xA0,
+0x02,0x80,0x03,0x3C,
+0x30,0x1F,0x63,0x24,
+0xE5,0x1D,0x66,0x90,
+0xE4,0x1D,0x65,0x90,
+0x25,0xB0,0x02,0x3C,
+0x82,0x01,0x44,0x34,
+0x81,0x01,0x42,0x34,
+0x00,0x00,0x45,0xA0,
+0x00,0x00,0x86,0xA0,
+0x08,0x00,0xE0,0x03,
+0xE6,0x1D,0x60,0xA0,
+0x02,0x80,0x08,0x3C,
+0x30,0x1F,0x04,0x25,
+0xE6,0x1D,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x15,0x00,0x40,0x10,
+0x21,0x18,0x00,0x00,
+0xD8,0x1D,0x82,0x8C,
+0xD4,0x1D,0x85,0x8C,
+0x25,0xB0,0x03,0x3C,
+0x40,0x11,0x02,0x00,
+0x2B,0x10,0xA2,0x00,
+0x82,0x01,0x67,0x34,
+0x0F,0x00,0x40,0x10,
+0x81,0x01,0x66,0x34,
+0xE5,0x1D,0x83,0x90,
+0xE4,0x1D,0x82,0x90,
+0xF0,0x00,0x63,0x30,
+0x1F,0x00,0x42,0x30,
+0x00,0x00,0xC2,0xA0,
+0x00,0x00,0xE3,0xA0,
+0x30,0x1F,0x02,0x25,
+0x01,0x00,0x03,0x24,
+0xE0,0x1D,0x40,0xAC,
+0xD4,0x1D,0x40,0xAC,
+0xD8,0x1D,0x40,0xAC,
+0xDC,0x1D,0x40,0xAC,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x60,0x00,
+0xDC,0x1D,0x82,0x8C,
+0x25,0xB0,0x03,0x3C,
+0x82,0x01,0x69,0x34,
+0x40,0x11,0x02,0x00,
+0x2B,0x10,0xA2,0x00,
+0x0E,0x00,0x40,0x14,
+0x81,0x01,0x66,0x34,
+0xE0,0x1D,0x82,0x8C,
+0x00,0x00,0x00,0x00,
+0x40,0x11,0x02,0x00,
+0x2B,0x10,0xA2,0x00,
+0x08,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0xE5,0x1D,0x83,0x90,
+0xE4,0x1D,0x82,0x90,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xC2,0xA0,
+0x00,0x00,0x23,0xA1,
+0x20,0x60,0x00,0x08,
+0x30,0x1F,0x02,0x25,
+0xE5,0x1D,0x83,0x90,
+0xE4,0x1D,0x82,0x90,
+0xF0,0x00,0x63,0x30,
+0x7F,0x00,0x42,0x30,
+0x00,0x00,0xC2,0xA0,
+0x00,0x00,0x23,0xA1,
+0x20,0x60,0x00,0x08,
+0x30,0x1F,0x02,0x25,
+0x00,0x00,0x85,0xAC,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFC,0xFF,0x60,0x14,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x03,0x3C,
+0x33,0x02,0x65,0x34,
+0x00,0x11,0x04,0x00,
+0x00,0x00,0xA2,0xA0,
+0x30,0x02,0x63,0x34,
+0x00,0x00,0x65,0x8C,
+0x0F,0x00,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x24,0x28,0xA2,0x00,
+0x01,0x00,0x03,0x24,
+0x04,0x18,0x83,0x00,
+0x02,0x00,0xA0,0x10,
+0x21,0x10,0x00,0x00,
+0xFF,0xFF,0x62,0x30,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xE0,0xFF,0xBD,0x27,
+0x14,0x00,0xB1,0xAF,
+0x25,0xB0,0x11,0x3C,
+0x18,0x00,0xB2,0xAF,
+0x4C,0x00,0x22,0x36,
+0x1C,0x00,0xBF,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x00,0x00,0x44,0x90,
+0x02,0x80,0x03,0x3C,
+0x02,0x00,0x02,0x24,
+0xFF,0x00,0x84,0x30,
+0x07,0x00,0x82,0x10,
+0x30,0x1F,0x72,0x24,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x8A,0x36,0x43,0x96,
+0x01,0x00,0x02,0x24,
+0xF7,0xFF,0x62,0x14,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x02,0x3C,
+0xF4,0x5E,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0xF2,0xFF,0x60,0x14,
+0x21,0x20,0x00,0x00,
+0x4C,0x60,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x04,0x00,0x04,0x24,
+0x4C,0x60,0x00,0x0C,
+0x21,0x80,0x40,0x00,
+0x25,0x80,0x02,0x02,
+0x02,0x80,0x04,0x3C,
+0x33,0x02,0x23,0x36,
+0x08,0x00,0x02,0x24,
+0xFF,0xFF,0x10,0x32,
+0x40,0x00,0x27,0x36,
+0xEC,0xE8,0x84,0x24,
+0x00,0x00,0x62,0xA0,
+0xE3,0xFF,0x00,0x16,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xE2,0x94,
+0x88,0x36,0x43,0x96,
+0xFF,0xDF,0x42,0x30,
+0x01,0x00,0x63,0x24,
+0x00,0x20,0x46,0x34,
+0x88,0x36,0x43,0xA6,
+0xFF,0xFF,0x65,0x30,
+0x00,0x00,0xE2,0xA4,
+0x00,0x00,0xE6,0xA4,
+0x2F,0x55,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x69,0x60,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x02,0x3C,
+0x21,0x20,0x82,0x00,
+0x00,0x00,0x85,0xAC,
+0x21,0x10,0x00,0x00,
+0x01,0x00,0x42,0x24,
+0xFF,0x00,0x42,0x30,
+0x06,0x00,0x43,0x2C,
+0xFC,0xFF,0x60,0x14,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xE8,0xFF,0xBD,0x27,
+0x10,0x00,0xBF,0xAF,
+0xDF,0x2F,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x10,0x00,0xBF,0x8F,
+0x02,0x80,0x02,0x3C,
+0xE8,0x03,0x03,0x24,
+0x34,0x5F,0x43,0xAC,
+0x18,0x00,0xBD,0x27,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x02,0x3C,
+0xFA,0x5E,0x40,0xA0,
+0xFF,0x00,0x85,0x30,
+0x02,0x80,0x03,0x3C,
+0x02,0x80,0x02,0x3C,
+0x0C,0x5F,0x60,0xA0,
+0x08,0x00,0xA4,0x2C,
+0x0E,0x5F,0x40,0xA0,
+0x02,0x80,0x03,0x3C,
+0x02,0x80,0x02,0x3C,
+0x16,0x5F,0x60,0xA0,
+0xF4,0x5E,0x45,0xA0,
+0x2C,0x00,0x80,0x10,
+0x02,0x80,0x03,0x3C,
+0x80,0x10,0x05,0x00,
+0x94,0xF0,0x63,0x24,
+0x21,0x10,0x43,0x00,
+0x00,0x00,0x44,0x8C,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x80,0x00,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x05,0x3C,
+0x30,0x1F,0xA5,0x24,
+0xD0,0x1B,0xA4,0x8C,
+0x00,0x70,0x02,0x3C,
+0x02,0x00,0x42,0x34,
+0x25,0x20,0x82,0x00,
+0x41,0xB0,0x03,0x3C,
+0x00,0x00,0x64,0xAC,
+0x08,0x00,0xE0,0x03,
+0xD0,0x1B,0xA4,0xAC,
+0x02,0x80,0x05,0x3C,
+0x30,0x1F,0xA5,0x24,
+0xD0,0x1B,0xA4,0x8C,
+0x00,0x70,0x02,0x3C,
+0x02,0x00,0x42,0x34,
+0x27,0x10,0x02,0x00,
+0x24,0x20,0x82,0x00,
+0x41,0xB0,0x03,0x3C,
+0x00,0x00,0x64,0xAC,
+0x08,0x00,0xE0,0x03,
+0xD0,0x1B,0xA4,0xAC,
+0x02,0x80,0x05,0x3C,
+0x30,0x1F,0xA5,0x24,
+0xD0,0x1B,0xA4,0x8C,
+0x00,0x70,0x02,0x3C,
+0x27,0x10,0x02,0x00,
+0x24,0x20,0x82,0x00,
+0x02,0x80,0x07,0x3C,
+0x41,0xB0,0x02,0x3C,
+0x01,0x00,0x03,0x24,
+0x00,0x00,0x44,0xAC,
+0x10,0x5F,0xE3,0xA0,
+0x10,0x5F,0xE6,0x90,
+0x02,0x80,0x02,0x3C,
+0xD0,0x1B,0xA4,0xAC,
+0x11,0x5F,0x46,0xA0,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x05,0x3C,
+0x30,0x1F,0xA5,0x24,
+0xD0,0x1B,0xA4,0x8C,
+0x00,0x70,0x02,0x3C,
+0x27,0x10,0x02,0x00,
+0x24,0x20,0x82,0x00,
+0x41,0xB0,0x03,0x3C,
+0x00,0x00,0x64,0xAC,
+0x08,0x00,0xE0,0x03,
+0xD0,0x1B,0xA4,0xAC,
+0xE0,0xFF,0xBD,0x27,
+0x10,0x00,0xB0,0xAF,
+0x02,0x80,0x10,0x3C,
+0xF4,0x5E,0x02,0x92,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x1C,0x00,0xBF,0xAF,
+0x21,0x90,0x80,0x00,
+0x1C,0x00,0x40,0x10,
+0xFF,0x00,0xB1,0x30,
+0x02,0x80,0x03,0x3C,
+0xDE,0x5D,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x02,0x00,0x42,0x30,
+0x1C,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x00,0x08,0x04,0x24,
+0x00,0x02,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x01,0x00,0x06,0x24,
+0x02,0x80,0x03,0x3C,
+0xF6,0x5E,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x0F,0x00,0x42,0x30,
+0x0C,0x00,0x42,0x28,
+0x06,0x00,0x40,0x10,
+0x08,0x00,0x02,0x24,
+0x00,0x00,0x44,0x96,
+0x00,0x00,0x00,0x00,
+0x0C,0x00,0x83,0x30,
+0x1B,0x00,0x62,0x10,
+0x02,0x80,0x02,0x3C,
+0xF4,0x5E,0x02,0x92,
+0x05,0x00,0x03,0x24,
+0xFF,0x00,0x42,0x30,
+0x0B,0x00,0x43,0x10,
+0x02,0x80,0x03,0x3C,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x9B,0x30,0x00,0x0C,
+0x01,0x00,0x04,0x24,
+0x0C,0x61,0x00,0x08,
+0x00,0x08,0x04,0x24,
+0x0F,0x5F,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x24,0x10,0x22,0x02,
+0xF2,0xFF,0x40,0x10,
+0x02,0x80,0x03,0x3C,
+0x0E,0x5F,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x04,0x00,0x42,0x34,
+0x0E,0x5F,0x62,0xA0,
+0x20,0x61,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x0D,0x5F,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0x03,0x00,0x60,0x14,
+0x00,0x10,0x82,0x34,
+0x1B,0x61,0x00,0x08,
+0x00,0x00,0x42,0xA6,
+0x0C,0x00,0x04,0x24,
+0x64,0x31,0x00,0x0C,
+0x21,0x28,0x00,0x00,
+0x1B,0x61,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0xE8,0xFF,0xBD,0x27,
+0xFF,0x00,0xA5,0x30,
+0x10,0x00,0xB0,0xAF,
+0x14,0x00,0xBF,0xAF,
+0x18,0x00,0xA0,0x14,
+0xFF,0x00,0x90,0x30,
+0x2C,0x00,0x00,0x12,
+0x01,0x00,0x05,0x24,
+0x02,0x80,0x03,0x3C,
+0x01,0x00,0x07,0x24,
+0x0C,0x5F,0x67,0xA0,
+0x02,0x80,0x08,0x3C,
+0x0E,0x5F,0x02,0x91,
+0x02,0x00,0x04,0x24,
+0x21,0x28,0x00,0x00,
+0x02,0x00,0x42,0x34,
+0x00,0xF0,0x06,0x34,
+0x0E,0x5F,0x02,0xA1,
+0x8C,0x23,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x42,0xB0,0x02,0x3C,
+0x44,0x00,0x03,0x24,
+0x03,0x00,0x42,0x34,
+0x18,0x00,0xBD,0x27,
+0x00,0x00,0x43,0xA0,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x03,0x24,
+0x02,0x80,0x02,0x3C,
+0x0C,0x5F,0x43,0xA0,
+0x02,0x80,0x02,0x3C,
+0x0F,0x5F,0x43,0x90,
+0x0F,0x00,0x02,0x24,
+0x02,0x80,0x05,0x3C,
+0x0F,0x00,0x63,0x30,
+0x07,0x00,0x62,0x10,
+0x01,0x00,0x04,0x24,
+0x0E,0x5F,0xA2,0x90,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x34,
+0x0E,0x5F,0xA2,0xA0,
+0xFE,0x4E,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xDB,0xFF,0x00,0x16,
+0x02,0x80,0x03,0x3C,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x02,0x80,0x02,0x3C,
+0x0C,0x5F,0x40,0xA0,
+0x02,0x80,0x03,0x3C,
+0xF5,0x5E,0x64,0x90,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0xFF,0x00,0x84,0x30,
+0x64,0x31,0x00,0x08,
+0x18,0x00,0xBD,0x27,
+0xE0,0xFF,0xBD,0x27,
+0xFF,0x00,0xA5,0x30,
+0x14,0x00,0xB1,0xAF,
+0x18,0x00,0xBF,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x03,0x00,0xA0,0x14,
+0xFF,0x00,0x91,0x30,
+0x3A,0x00,0x20,0x12,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x10,0x3C,
+0x0E,0x5F,0x02,0x92,
+0xFB,0xFF,0x03,0x24,
+0x24,0x10,0x43,0x00,
+0x0E,0x5F,0x02,0xA2,
+0x10,0x00,0xA0,0x14,
+0x02,0x80,0x03,0x3C,
+0x0E,0x5F,0x02,0x92,
+0xFE,0xFF,0x03,0x24,
+0x24,0x10,0x43,0x00,
+0x0E,0x5F,0x02,0xA2,
+0x19,0x00,0x20,0x16,
+0x02,0x80,0x02,0x3C,
+0x0E,0x5F,0x02,0x92,
+0xFD,0xFF,0x03,0x24,
+0x18,0x00,0xBF,0x8F,
+0x24,0x10,0x43,0x00,
+0x0E,0x5F,0x02,0xA2,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x01,0x00,0x04,0x24,
+0x0C,0x5F,0x64,0xA0,
+0x0E,0x5F,0x02,0x92,
+0x02,0x80,0x03,0x3C,
+0x01,0x00,0x42,0x34,
+0x0E,0x5F,0x02,0xA2,
+0x0D,0x5F,0x62,0x90,
+0x02,0x00,0x03,0x24,
+0xFF,0x00,0x42,0x30,
+0x23,0x00,0x43,0x10,
+0x00,0x00,0x00,0x00,
+0xFE,0x4E,0x00,0x0C,
+0x01,0x00,0x04,0x24,
+0xE9,0xFF,0x20,0x12,
+0x02,0x80,0x02,0x3C,
+0x01,0x00,0x04,0x24,
+0x0C,0x5F,0x44,0xA0,
+0x0E,0x5F,0x03,0x92,
+0x02,0x00,0x04,0x24,
+0x21,0x28,0x00,0x00,
+0x02,0x00,0x63,0x34,
+0x00,0xF0,0x06,0x34,
+0x0E,0x5F,0x03,0xA2,
+0x8C,0x23,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x42,0xB0,0x02,0x3C,
+0x44,0x00,0x03,0x24,
+0x03,0x00,0x42,0x34,
+0x20,0x00,0xBD,0x27,
+0x00,0x00,0x43,0xA0,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x0C,0x5F,0x40,0xA0,
+0x02,0x80,0x03,0x3C,
+0xF5,0x5E,0x64,0x90,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x01,0x00,0x05,0x24,
+0xFF,0x00,0x84,0x30,
+0x64,0x31,0x00,0x08,
+0x20,0x00,0xBD,0x27,
+0x0D,0x30,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x0C,0x00,0x04,0x24,
+0x64,0x31,0x00,0x0C,
+0x01,0x00,0x05,0x24,
+0x90,0x61,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0xE8,0xFF,0xBD,0x27,
+0x10,0x00,0xB2,0xAF,
+0x0C,0x00,0xB1,0xAF,
+0x08,0x00,0xB0,0xAF,
+0x21,0x40,0xE0,0x00,
+0x21,0x90,0xA0,0x03,
+0x21,0x60,0xC0,0x00,
+0x21,0x78,0x80,0x00,
+0x45,0x00,0xE0,0x14,
+0x21,0x50,0xA0,0x00,
+0x2B,0x10,0xA6,0x00,
+0x78,0x00,0x40,0x10,
+0xFF,0xFF,0x02,0x34,
+0x2B,0x10,0x46,0x00,
+0x8F,0x01,0x40,0x10,
+0x21,0x28,0xC0,0x00,
+0xFF,0x00,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x10,0x00,0x03,0x24,
+0x2B,0x10,0x46,0x00,
+0x18,0x00,0x04,0x24,
+0x21,0x30,0x60,0x00,
+0x0B,0x30,0x82,0x00,
+0x02,0x80,0x03,0x3C,
+0x06,0x10,0xC5,0x00,
+0xB4,0xF0,0x63,0x24,
+0x21,0x10,0x43,0x00,
+0x00,0x00,0x44,0x90,
+0x20,0x00,0x02,0x24,
+0x21,0x20,0x86,0x00,
+0x23,0x30,0x44,0x00,
+0x08,0x00,0xC0,0x10,
+0x02,0x4C,0x0C,0x00,
+0x23,0x10,0x46,0x00,
+0x06,0x10,0x4F,0x00,
+0x04,0x18,0xCA,0x00,
+0x25,0x50,0x62,0x00,
+0x04,0x60,0xCC,0x00,
+0x04,0x78,0xCF,0x00,
+0x02,0x4C,0x0C,0x00,
+0x1B,0x00,0x49,0x01,
+0x02,0x00,0x20,0x15,
+0x00,0x00,0x00,0x00,
+0x0D,0x00,0x07,0x00,
+0xFF,0xFF,0x87,0x31,
+0x02,0x24,0x0F,0x00,
+0x12,0x18,0x00,0x00,
+0x10,0x28,0x00,0x00,
+0x00,0x14,0x05,0x00,
+0x25,0x28,0x44,0x00,
+0x18,0x00,0x67,0x00,
+0x12,0x58,0x00,0x00,
+0x2B,0x18,0xAB,0x00,
+0x00,0x00,0x00,0x00,
+0x1B,0x00,0x49,0x01,
+0x02,0x00,0x20,0x15,
+0x00,0x00,0x00,0x00,
+0x0D,0x00,0x07,0x00,
+0x08,0x00,0x60,0x10,
+0x00,0x00,0x00,0x00,
+0x21,0x28,0xAC,0x00,
+0x2B,0x10,0xAC,0x00,
+0x04,0x00,0x40,0x14,
+0x2B,0x10,0xAB,0x00,
+0x00,0x00,0x42,0x38,
+0x21,0x18,0xAC,0x00,
+0x0B,0x28,0x62,0x00,
+0x23,0x28,0xAB,0x00,
+0x1B,0x00,0xA9,0x00,
+0x02,0x00,0x20,0x15,
+0x00,0x00,0x00,0x00,
+0x0D,0x00,0x07,0x00,
+0xFF,0xFF,0xE4,0x31,
+0x12,0x18,0x00,0x00,
+0x10,0x40,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x8F,0x62,0x00,0x08,
+0x18,0x00,0x67,0x00,
+0x2B,0x10,0xA7,0x00,
+0x0A,0x00,0x40,0x10,
+0xFF,0xFF,0x02,0x34,
+0x10,0x00,0xB2,0x8F,
+0x0C,0x00,0xB1,0x8F,
+0x08,0x00,0xB0,0x8F,
+0x21,0x10,0x80,0x00,
+0x21,0x18,0xA0,0x00,
+0x00,0x00,0xA4,0xAF,
+0x04,0x00,0xA5,0xAF,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x2B,0x10,0x47,0x00,
+0xD2,0x00,0x40,0x10,
+0x00,0x01,0xE3,0x2C,
+0xFF,0x00,0x02,0x3C,
+0x10,0x00,0x03,0x24,
+0xFF,0xFF,0x42,0x34,
+0x2B,0x10,0x47,0x00,
+0x18,0x00,0x04,0x24,
+0x21,0x28,0x60,0x00,
+0x0B,0x28,0x82,0x00,
+0x06,0x10,0xA8,0x00,
+0x02,0x80,0x03,0x3C,
+0xB4,0xF0,0x63,0x24,
+0x21,0x10,0x43,0x00,
+0x00,0x00,0x44,0x90,
+0x20,0x00,0x02,0x24,
+0x21,0x20,0x85,0x00,
+0x23,0x30,0x44,0x00,
+0xCE,0x00,0xC0,0x14,
+0x23,0x38,0x46,0x00,
+0x2B,0x10,0x0A,0x01,
+0x04,0x00,0x40,0x14,
+0x23,0x20,0xEC,0x01,
+0x2B,0x10,0xEC,0x01,
+0x05,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0xE4,0x01,
+0x23,0x18,0x48,0x01,
+0x23,0x50,0x62,0x00,
+0x21,0x78,0x80,0x00,
+0x04,0x00,0x40,0x12,
+0x21,0xC0,0xE0,0x01,
+0x21,0xC8,0x40,0x01,
+0x00,0x00,0x58,0xAE,
+0x04,0x00,0x59,0xAE,
+0x00,0x00,0xA2,0x8F,
+0x04,0x00,0xA3,0x8F,
+0x10,0x00,0xB2,0x8F,
+0x0C,0x00,0xB1,0x8F,
+0x08,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x53,0x00,0xC0,0x10,
+0x01,0x00,0x02,0x24,
+0xFF,0xFF,0x02,0x34,
+0x2B,0x10,0x4C,0x00,
+0x59,0x00,0x40,0x14,
+0xFF,0x00,0x02,0x3C,
+0x00,0x01,0x83,0x2D,
+0x08,0x00,0x02,0x24,
+0x21,0x28,0x00,0x00,
+0x0A,0x28,0x43,0x00,
+0x06,0x10,0xAC,0x00,
+0x02,0x80,0x03,0x3C,
+0xB4,0xF0,0x63,0x24,
+0x21,0x10,0x43,0x00,
+0x00,0x00,0x44,0x90,
+0x20,0x00,0x02,0x24,
+0x21,0x20,0x85,0x00,
+0x23,0x30,0x44,0x00,
+0x5B,0x00,0xC0,0x14,
+0x00,0x00,0x00,0x00,
+0x23,0x50,0x4C,0x01,
+0x02,0x4C,0x0C,0x00,
+0xFF,0xFF,0x8D,0x31,
+0x1B,0x00,0x49,0x01,
+0x02,0x00,0x20,0x15,
+0x00,0x00,0x00,0x00,
+0x0D,0x00,0x07,0x00,
+0x02,0x24,0x0F,0x00,
+0x12,0x18,0x00,0x00,
+0x10,0x28,0x00,0x00,
+0x00,0x14,0x05,0x00,
+0x25,0x28,0x44,0x00,
+0x18,0x00,0x6D,0x00,
+0x12,0x58,0x00,0x00,
+0x2B,0x18,0xAB,0x00,
+0x00,0x00,0x00,0x00,
+0x1B,0x00,0x49,0x01,
+0x02,0x00,0x20,0x15,
+0x00,0x00,0x00,0x00,
+0x0D,0x00,0x07,0x00,
+0x08,0x00,0x60,0x10,
+0x00,0x00,0x00,0x00,
+0x21,0x28,0xAC,0x00,
+0x2B,0x10,0xAC,0x00,
+0x04,0x00,0x40,0x14,
+0x2B,0x10,0xAB,0x00,
+0x00,0x00,0x42,0x38,
+0x21,0x18,0xAC,0x00,
+0x0B,0x28,0x62,0x00,
+0x23,0x28,0xAB,0x00,
+0x1B,0x00,0xA9,0x00,
+0x02,0x00,0x20,0x15,
+0x00,0x00,0x00,0x00,
+0x0D,0x00,0x07,0x00,
+0xFF,0xFF,0xE4,0x31,
+0x12,0x18,0x00,0x00,
+0x10,0x40,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x18,0x00,0x6D,0x00,
+0x00,0x14,0x08,0x00,
+0x12,0x58,0x00,0x00,
+0x25,0x40,0x44,0x00,
+0x2B,0x18,0x0B,0x01,
+0x1B,0x00,0xA9,0x00,
+0x02,0x00,0x20,0x15,
+0x00,0x00,0x00,0x00,
+0x0D,0x00,0x07,0x00,
+0x08,0x00,0x60,0x10,
+0x00,0x00,0x00,0x00,
+0x21,0x40,0x0C,0x01,
+0x2B,0x10,0x0C,0x01,
+0x04,0x00,0x40,0x14,
+0x2B,0x10,0x0B,0x01,
+0x21,0x18,0x0C,0x01,
+0x00,0x00,0x42,0x38,
+0x0B,0x40,0x62,0x00,
+0xAB,0xFF,0x40,0x12,
+0x23,0x78,0x0B,0x01,
+0x06,0xC0,0xCF,0x00,
+0x21,0xC8,0x00,0x00,
+0x00,0x00,0x58,0xAE,
+0x4C,0x62,0x00,0x08,
+0x04,0x00,0x59,0xAE,
+0x1B,0x00,0x47,0x00,
+0x02,0x00,0xE0,0x14,
+0x00,0x00,0x00,0x00,
+0x0D,0x00,0x07,0x00,
+0xFF,0xFF,0x02,0x34,
+0x12,0x60,0x00,0x00,
+0x2B,0x10,0x4C,0x00,
+0xAB,0xFF,0x40,0x10,
+0x00,0x01,0x83,0x2D,
+0xFF,0x00,0x02,0x3C,
+0x10,0x00,0x03,0x24,
+0xFF,0xFF,0x42,0x34,
+0x2B,0x10,0x4C,0x00,
+0x18,0x00,0x04,0x24,
+0x21,0x28,0x60,0x00,
+0x0B,0x28,0x82,0x00,
+0x02,0x80,0x03,0x3C,
+0x06,0x10,0xAC,0x00,
+0xB4,0xF0,0x63,0x24,
+0x21,0x10,0x43,0x00,
+0x00,0x00,0x44,0x90,
+0x20,0x00,0x02,0x24,
+0x21,0x20,0x85,0x00,
+0x23,0x30,0x44,0x00,
+0xA7,0xFF,0xC0,0x10,
+0x00,0x00,0x00,0x00,
+0x23,0x38,0x46,0x00,
+0x04,0x60,0xCC,0x00,
+0x06,0x58,0xEA,0x00,
+0x02,0x4C,0x0C,0x00,
+0x1B,0x00,0x69,0x01,
+0x02,0x00,0x20,0x15,
+0x00,0x00,0x00,0x00,
+0x0D,0x00,0x07,0x00,
+0xFF,0xFF,0x8D,0x31,
+0x06,0x18,0xEF,0x00,
+0x04,0x10,0xCA,0x00,
+0x25,0x50,0x43,0x00,
+0x02,0x24,0x0A,0x00,
+0x12,0x28,0x00,0x00,
+0x10,0x40,0x00,0x00,
+0x00,0x14,0x08,0x00,
+0x25,0x40,0x44,0x00,
+0x18,0x00,0xAD,0x00,
+0x12,0x28,0x00,0x00,
+0x2B,0x18,0x05,0x01,
+0x00,0x00,0x00,0x00,
+0x1B,0x00,0x69,0x01,
+0x02,0x00,0x20,0x15,
+0x00,0x00,0x00,0x00,
+0x0D,0x00,0x07,0x00,
+0x05,0x00,0x60,0x10,
+0x04,0x78,0xCF,0x00,
+0x21,0x40,0x0C,0x01,
+0x2B,0x10,0x0C,0x01,
+0x93,0x00,0x40,0x10,
+0x2B,0x10,0x05,0x01,
+0x23,0x40,0x05,0x01,
+0x1B,0x00,0x09,0x01,
+0x02,0x00,0x20,0x15,
+0x00,0x00,0x00,0x00,
+0x0D,0x00,0x07,0x00,
+0xFF,0xFF,0x44,0x31,
+0x12,0x18,0x00,0x00,
+0x10,0x58,0x00,0x00,
+0x00,0x14,0x0B,0x00,
+0x25,0x58,0x44,0x00,
+0x18,0x00,0x6D,0x00,
+0x12,0x28,0x00,0x00,
+0x2B,0x18,0x65,0x01,
+0x00,0x00,0x00,0x00,
+0x1B,0x00,0x09,0x01,
+0x02,0x00,0x20,0x15,
+0x00,0x00,0x00,0x00,
+0x0D,0x00,0x07,0x00,
+0x77,0xFF,0x60,0x10,
+0x23,0x50,0x65,0x01,
+0x21,0x58,0x6C,0x01,
+0x2B,0x10,0x6C,0x01,
+0x04,0x00,0x40,0x14,
+0x2B,0x10,0x65,0x01,
+0x00,0x00,0x42,0x38,
+0x21,0x18,0x6C,0x01,
+0x0B,0x58,0x62,0x00,
+0x6A,0x62,0x00,0x08,
+0x23,0x50,0x65,0x01,
+0x08,0x00,0x02,0x24,
+0x21,0x28,0x00,0x00,
+0x0A,0x28,0x43,0x00,
+0x02,0x80,0x03,0x3C,
+0x06,0x10,0xA8,0x00,
+0xB4,0xF0,0x63,0x24,
+0x21,0x10,0x43,0x00,
+0x00,0x00,0x44,0x90,
+0x20,0x00,0x02,0x24,
+0x21,0x20,0x85,0x00,
+0x23,0x30,0x44,0x00,
+0x34,0xFF,0xC0,0x10,
+0x23,0x38,0x46,0x00,
+0x06,0x10,0xEC,0x00,
+0x04,0x18,0xC8,0x00,
+0x25,0x40,0x62,0x00,
+0x06,0x58,0xEA,0x00,
+0x02,0x6C,0x08,0x00,
+0x1B,0x00,0x6D,0x01,
+0x02,0x00,0xA0,0x15,
+0x00,0x00,0x00,0x00,
+0x0D,0x00,0x07,0x00,
+0xFF,0xFF,0x11,0x31,
+0x06,0x10,0xEF,0x00,
+0x04,0x18,0xCA,0x00,
+0x25,0x50,0x62,0x00,
+0x02,0x24,0x0A,0x00,
+0x04,0x60,0xCC,0x00,
+0x12,0x80,0x00,0x00,
+0x10,0x48,0x00,0x00,
+0x00,0x14,0x09,0x00,
+0x25,0x48,0x44,0x00,
+0x12,0x28,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x18,0x00,0x11,0x02,
+0x12,0x70,0x00,0x00,
+0x2B,0x18,0x2E,0x01,
+0x00,0x00,0x00,0x00,
+0x1B,0x00,0x6D,0x01,
+0x02,0x00,0xA0,0x15,
+0x00,0x00,0x00,0x00,
+0x0D,0x00,0x07,0x00,
+0x0A,0x00,0x60,0x10,
+0x04,0x78,0xCF,0x00,
+0x21,0x48,0x28,0x01,
+0x2B,0x10,0x28,0x01,
+0x06,0x00,0x40,0x14,
+0xFF,0xFF,0xB0,0x24,
+0x2B,0x10,0x2E,0x01,
+0x03,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0xFF,0xFF,0x10,0x26,
+0x21,0x48,0x28,0x01,
+0x23,0x48,0x2E,0x01,
+0x1B,0x00,0x2D,0x01,
+0x02,0x00,0xA0,0x15,
+0x00,0x00,0x00,0x00,
+0x0D,0x00,0x07,0x00,
+0xFF,0xFF,0x44,0x31,
+0x12,0x28,0x00,0x00,
+0x10,0x58,0x00,0x00,
+0x00,0x14,0x0B,0x00,
+0x25,0x58,0x44,0x00,
+0x18,0x00,0xB1,0x00,
+0x12,0x70,0x00,0x00,
+0x2B,0x18,0x6E,0x01,
+0x00,0x00,0x00,0x00,
+0x1B,0x00,0x2D,0x01,
+0x02,0x00,0xA0,0x15,
+0x00,0x00,0x00,0x00,
+0x0D,0x00,0x07,0x00,
+0x0B,0x00,0x60,0x10,
+0x00,0x14,0x10,0x00,
+0x21,0x58,0x68,0x01,
+0x2B,0x10,0x68,0x01,
+0x06,0x00,0x40,0x14,
+0xFF,0xFF,0xA5,0x24,
+0x2B,0x10,0x6E,0x01,
+0x04,0x00,0x40,0x10,
+0x00,0x14,0x10,0x00,
+0xFF,0xFF,0xA5,0x24,
+0x21,0x58,0x68,0x01,
+0x00,0x14,0x10,0x00,
+0x25,0x10,0x45,0x00,
+0x23,0x58,0x6E,0x01,
+0x19,0x00,0x4C,0x00,
+0x10,0x28,0x00,0x00,
+0x2B,0x18,0x65,0x01,
+0x12,0x48,0x00,0x00,
+0x05,0x00,0x60,0x14,
+0x23,0x20,0x2C,0x01,
+0x07,0x00,0xAB,0x14,
+0x2B,0x10,0xE9,0x01,
+0x05,0x00,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x2B,0x10,0x24,0x01,
+0x23,0x18,0xA8,0x00,
+0x23,0x28,0x62,0x00,
+0x21,0x48,0x80,0x00,
+0xEA,0xFE,0x40,0x12,
+0x23,0x18,0xE9,0x01,
+0x23,0x20,0x65,0x01,
+0x2B,0x10,0xE3,0x01,
+0x23,0x50,0x82,0x00,
+0x04,0x28,0xEA,0x00,
+0x06,0x18,0xC3,0x00,
+0x25,0xC0,0xA3,0x00,
+0x06,0xC8,0xCA,0x00,
+0x00,0x00,0x58,0xAE,
+0x4C,0x62,0x00,0x08,
+0x04,0x00,0x59,0xAE,
+0x00,0x01,0xC3,0x2C,
+0x08,0x00,0x02,0x24,
+0x21,0x30,0x00,0x00,
+0xE6,0x61,0x00,0x08,
+0x0A,0x30,0x43,0x00,
+0x00,0x00,0x42,0x38,
+0x21,0x18,0x0C,0x01,
+0xE0,0x62,0x00,0x08,
+0x0B,0x40,0x62,0x00,
+0x25,0xB0,0x02,0x3C,
+0xFF,0x00,0x03,0x3C,
+0xEC,0x02,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x03,0x3C,
+0x25,0xB0,0x02,0x3C,
+0xF0,0x8D,0x63,0x24,
+0x18,0x03,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x7F,0x00,0x02,0x3C,
+0x0D,0xB8,0x44,0x34,
+0x80,0x04,0x03,0x3C,
+0x25,0x20,0x83,0x00,
+0x00,0x08,0x02,0x3C,
+0x25,0x20,0x82,0x00,
+0x00,0x30,0x03,0x3C,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x42,0x24,
+0x25,0x20,0x83,0x00,
+0x41,0xB0,0x03,0x3C,
+0x00,0x00,0x64,0xAC,
+0xD8,0x1B,0x44,0xAC,
+0xD0,0x1B,0x44,0xAC,
+0x08,0x00,0x63,0x34,
+0x86,0x00,0x04,0x24,
+0x00,0x00,0x64,0xA4,
+0xDC,0x1B,0x44,0xA4,
+0xD4,0x1B,0x40,0xAC,
+0xDE,0x1B,0x40,0xA4,
+0x08,0x00,0xE0,0x03,
+0xE0,0x1B,0x44,0xA4,
+0x99,0x63,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x42,0xB0,0x03,0x3C,
+0x01,0x00,0x63,0x34,
+0x02,0x00,0x02,0x24,
+0xE8,0xFF,0xBD,0x27,
+0x00,0x00,0x62,0xA0,
+0x10,0x00,0xBF,0xAF,
+0xDF,0x2F,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x21,0x20,0x00,0x00,
+0x01,0x00,0x05,0x24,
+0x8C,0x23,0x00,0x0C,
+0x00,0x50,0x06,0x24,
+0x1F,0x00,0x06,0x3C,
+0x10,0x00,0xBF,0x8F,
+0x00,0x40,0xC6,0x34,
+0x03,0x00,0x04,0x24,
+0x01,0x00,0x05,0x24,
+0x8C,0x23,0x00,0x08,
+0x18,0x00,0xBD,0x27,
+0x25,0xB0,0x03,0x3C,
+0x02,0x80,0x02,0x3C,
+0xC8,0xFF,0xBD,0x27,
+0x18,0x03,0x64,0x34,
+0xB8,0x8E,0x42,0x24,
+0x00,0x00,0x82,0xAC,
+0x30,0x00,0xBE,0xAF,
+0x2C,0x00,0xB7,0xAF,
+0x28,0x00,0xB6,0xAF,
+0x24,0x00,0xB5,0xAF,
+0x20,0x00,0xB4,0xAF,
+0x1C,0x00,0xB3,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x34,0x00,0xBF,0xAF,
+0xB6,0x00,0x63,0x34,
+0x00,0x00,0x62,0x90,
+0x02,0x80,0x03,0x3C,
+0x30,0x1F,0x70,0x24,
+0xAB,0x1B,0x02,0xA2,
+0x28,0x6B,0x00,0x0C,
+0x7A,0x36,0x00,0xA2,
+0x48,0x01,0x03,0x24,
+0x84,0x36,0x03,0xAE,
+0x80,0x36,0x03,0xAE,
+0xFD,0xFF,0x02,0x3C,
+0xFB,0xFF,0x03,0x3C,
+0x21,0x98,0x00,0x02,
+0x21,0xA0,0x00,0x02,
+0xFF,0xFF,0x55,0x34,
+0xFF,0xFF,0x76,0x34,
+0x21,0x88,0x00,0x00,
+0x02,0x80,0x1E,0x3C,
+0x02,0x80,0x17,0x3C,
+0x21,0x90,0x00,0x02,
+0x80,0x10,0x11,0x00,
+0x21,0x10,0x51,0x00,
+0xC0,0x10,0x02,0x00,
+0x21,0x10,0x53,0x00,
+0xE8,0x1D,0x42,0x24,
+0x07,0x00,0x03,0x24,
+0xFF,0xFF,0x63,0x24,
+0x00,0x00,0x40,0xA4,
+0xFD,0xFF,0x61,0x04,
+0x02,0x00,0x42,0x24,
+0xC0,0x80,0x11,0x00,
+0x18,0x42,0xC4,0x27,
+0x21,0x20,0x04,0x02,
+0x21,0x28,0x00,0x00,
+0x02,0x00,0x06,0x24,
+0xF8,0x1D,0x40,0xA6,
+0x08,0x52,0x00,0x0C,
+0xFA,0x1D,0x40,0xA2,
+0x21,0x20,0x13,0x02,
+0xE8,0x22,0x83,0x8C,
+0xEA,0x5D,0xE7,0x92,
+0xBF,0xFF,0x02,0x24,
+0x24,0x28,0x62,0x00,
+0x01,0x00,0x02,0x24,
+0x63,0x00,0xE2,0x10,
+0x80,0x07,0xA6,0x34,
+0xFF,0xF7,0x03,0x24,
+0x24,0x10,0xC3,0x00,
+0xFF,0xEF,0x03,0x24,
+0x24,0x10,0x43,0x00,
+0xE8,0x22,0x82,0xAC,
+0x21,0x30,0x14,0x02,
+0xE8,0x22,0xC4,0x8C,
+0xE7,0xFF,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x24,0x20,0x95,0x00,
+0x24,0x20,0x96,0x00,
+0xFF,0xFD,0x03,0x3C,
+0x24,0x20,0x82,0x00,
+0xFF,0xFF,0x63,0x34,
+0xFF,0xFB,0x02,0x3C,
+0x24,0x20,0x83,0x00,
+0xEC,0x22,0xC5,0x8C,
+0xFF,0xFF,0x42,0x34,
+0xFF,0xE7,0x03,0x3C,
+0x24,0x20,0x82,0x00,
+0xFF,0xFF,0x63,0x34,
+0xFF,0xFF,0x02,0x3C,
+0x24,0x20,0x83,0x00,
+0xFF,0x7F,0x42,0x34,
+0xC0,0xFF,0x03,0x24,
+0x24,0x28,0xA2,0x00,
+0x24,0x20,0x83,0x00,
+0x1F,0x00,0x02,0x3C,
+0x01,0x00,0x31,0x26,
+0x25,0x28,0xA2,0x00,
+0x08,0x00,0x84,0x34,
+0x20,0x00,0x22,0x2A,
+0xE8,0x22,0xC4,0xAC,
+0xEC,0x22,0xC5,0xAC,
+0xC3,0xFF,0x40,0x14,
+0x28,0x00,0x52,0x26,
+0x25,0xB0,0x02,0x3C,
+0x10,0x00,0x03,0x24,
+0xB0,0x03,0x42,0x34,
+0x02,0x80,0x04,0x3C,
+0x00,0x00,0x43,0xAC,
+0x58,0x22,0x84,0x24,
+0x21,0x28,0x00,0x00,
+0x08,0x52,0x00,0x0C,
+0x20,0x00,0x06,0x24,
+0x02,0x80,0x02,0x3C,
+0xE9,0x5D,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0x3A,0x00,0x60,0x10,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x50,0x24,
+0x24,0x03,0x00,0xA2,
+0x38,0x70,0x00,0x0C,
+0x25,0x03,0x00,0xA2,
+0x02,0x80,0x09,0x3C,
+0x64,0x57,0x22,0x25,
+0x02,0x80,0x0A,0x3C,
+0x02,0x80,0x0B,0x3C,
+0x02,0x80,0x0C,0x3C,
+0x02,0x80,0x0D,0x3C,
+0x02,0x80,0x0E,0x3C,
+0x02,0x80,0x0F,0x3C,
+0x04,0x00,0x42,0xAC,
+0x64,0x57,0x22,0xAD,
+0x6C,0x57,0x43,0x25,
+0x74,0x57,0x64,0x25,
+0x7C,0x57,0x85,0x25,
+0x84,0x57,0xA6,0x25,
+0x8C,0x57,0xC7,0x25,
+0x94,0x57,0xE8,0x25,
+0x09,0x00,0x02,0x24,
+0x04,0x00,0x63,0xAC,
+0x6C,0x57,0x43,0xAD,
+0x04,0x00,0x84,0xAC,
+0x74,0x57,0x64,0xAD,
+0x04,0x00,0xA5,0xAC,
+0x7C,0x57,0x85,0xAD,
+0x04,0x00,0xC6,0xAC,
+0x84,0x57,0xA6,0xAD,
+0x04,0x00,0xE7,0xAC,
+0x8C,0x57,0xC7,0xAD,
+0x94,0x57,0xE8,0xAD,
+0x04,0x00,0x08,0xAD,
+0x34,0x00,0xBF,0x8F,
+0x0C,0x3E,0x02,0xA2,
+0x32,0x3B,0x00,0xA6,
+0x8E,0x3E,0x00,0xA2,
+0x30,0x00,0xBE,0x8F,
+0x2C,0x00,0xB7,0x8F,
+0x28,0x00,0xB6,0x8F,
+0x24,0x00,0xB5,0x8F,
+0x20,0x00,0xB4,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x38,0x00,0xBD,0x27,
+0x02,0x80,0x02,0x3C,
+0xEB,0x5D,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0x9C,0xFF,0x67,0x14,
+0x80,0x0F,0xA2,0x34,
+0xFF,0xF7,0x03,0x24,
+0x24,0x10,0xC3,0x00,
+0xF0,0x63,0x00,0x08,
+0x00,0x10,0x42,0x34,
+0xFA,0x6B,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x50,0x6E,0x00,0x0C,
+0x30,0x38,0x80,0xAE,
+0x6E,0x6F,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x03,0x3C,
+0xDE,0x5D,0x64,0x90,
+0x92,0x00,0x02,0x24,
+0x03,0x00,0x82,0x10,
+0x00,0x00,0x00,0x00,
+0xCA,0x6F,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xB0,0x6F,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x6A,0x6E,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x03,0x24,
+0x8A,0x36,0x83,0xA6,
+0x1E,0x70,0x00,0x0C,
+0x88,0x36,0x80,0xA6,
+0x1E,0x64,0x00,0x08,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0x25,0xB0,0x02,0x3C,
+0xC8,0xFF,0xBD,0x27,
+0xB8,0x91,0x63,0x24,
+0x18,0x03,0x42,0x34,
+0x18,0x00,0xB0,0xAF,
+0x34,0x00,0xBF,0xAF,
+0x30,0x00,0xB6,0xAF,
+0x2C,0x00,0xB5,0xAF,
+0x28,0x00,0xB4,0xAF,
+0x24,0x00,0xB3,0xAF,
+0x20,0x00,0xB2,0xAF,
+0x1C,0x00,0xB1,0xAF,
+0x00,0x00,0x43,0xAC,
+0x21,0x80,0x00,0x00,
+0x01,0x00,0x02,0x26,
+0xFF,0xFF,0x50,0x30,
+0x64,0x00,0x03,0x2E,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0x02,0x26,
+0x02,0x80,0x03,0x3C,
+0xDB,0x5D,0x68,0x90,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0xD8,0x5D,0x4B,0x94,
+0xF3,0x5D,0x6A,0x90,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0x02,0x80,0x14,0x3C,
+0xFA,0x5D,0x67,0x90,
+0xE8,0x5D,0x49,0x90,
+0xDA,0x5D,0x83,0x92,
+0x02,0x80,0x0C,0x3C,
+0x02,0x80,0x02,0x3C,
+0xF5,0x5D,0x46,0x90,
+0xF8,0x5D,0x85,0x91,
+0x25,0xB0,0x04,0x3C,
+0xB0,0x03,0x82,0x34,
+0x00,0x00,0x4B,0xAC,
+0x00,0x00,0x48,0xAC,
+0x00,0x00,0x49,0xAC,
+0x00,0x00,0x43,0xAC,
+0x02,0x80,0x03,0x3C,
+0x00,0x00,0x4A,0xAC,
+0x0A,0x00,0x88,0x34,
+0x00,0x00,0x46,0xAC,
+0x00,0x00,0x45,0xAC,
+0x00,0x00,0x47,0xAC,
+0x1A,0x5E,0x60,0xA4,
+0x00,0x00,0x06,0x91,
+0x02,0x80,0x02,0x3C,
+0x0B,0x00,0x04,0x24,
+0x02,0x80,0x16,0x3C,
+0xE5,0x5D,0x44,0xA0,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0xC5,0x26,
+0x00,0x78,0x03,0x24,
+0x08,0x5E,0x40,0xA0,
+0xF0,0xFF,0x02,0x24,
+0x01,0x00,0x07,0x24,
+0x02,0x80,0x15,0x3C,
+0xAC,0x1B,0xA3,0xA4,
+0xAA,0x1B,0xA2,0xA0,
+0xFF,0x07,0x03,0x24,
+0xFF,0xFF,0x02,0x24,
+0x20,0x00,0xC6,0x30,
+0xF8,0x5D,0x87,0xA1,
+0xA8,0x1B,0xA7,0xA0,
+0xAE,0x1B,0xA3,0xA4,
+0x48,0xF3,0xA2,0xA2,
+0xB1,0x00,0xC0,0x10,
+0xB0,0x1B,0xA0,0xA4,
+0x00,0x00,0x02,0x91,
+0x00,0x00,0x00,0x00,
+0x10,0x00,0x42,0x30,
+0xFB,0x00,0x40,0x14,
+0x02,0x80,0x13,0x3C,
+0x21,0x80,0x00,0x00,
+0x21,0x88,0x00,0x00,
+0xB8,0xF1,0x72,0x26,
+0xFF,0x00,0x24,0x32,
+0x61,0x57,0x00,0x0C,
+0x21,0x28,0x12,0x02,
+0x08,0x00,0x03,0x26,
+0xFF,0xFF,0x70,0x30,
+0x01,0x00,0x22,0x26,
+0x80,0x00,0x03,0x2E,
+0xF8,0xFF,0x60,0x14,
+0xFF,0xFF,0x51,0x30,
+0xDA,0x5D,0x83,0x92,
+0x00,0x00,0x00,0x00,
+0x02,0x00,0x62,0x30,
+0xC1,0x00,0x40,0x14,
+0x04,0x00,0x62,0x30,
+0x9A,0x00,0x40,0x10,
+0x25,0xB0,0x03,0x3C,
+0x25,0xB0,0x04,0x3C,
+0x02,0x80,0x05,0x3C,
+0x06,0x00,0x06,0x24,
+0x50,0x00,0x84,0x34,
+0x10,0x52,0x00,0x0C,
+0x07,0xF2,0xA5,0x24,
+0xB8,0xF1,0x63,0x26,
+0x7B,0x00,0x66,0x90,
+0x00,0x00,0x00,0x00,
+0x02,0x00,0xC2,0x2C,
+0x04,0x00,0x40,0x14,
+0x02,0x00,0x0B,0x24,
+0x79,0x00,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x03,0x00,0x4B,0x30,
+0x04,0x00,0xC2,0x2C,
+0xDC,0x00,0x40,0x10,
+0xB8,0xF1,0x62,0x26,
+0x02,0x80,0x02,0x3C,
+0x4A,0xF3,0x40,0xA0,
+0x02,0x80,0x02,0x3C,
+0xE7,0x5D,0x43,0x90,
+0x01,0x00,0x02,0x24,
+0x02,0x00,0x62,0x10,
+0xFC,0xFF,0x08,0x24,
+0x21,0x40,0x00,0x00,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0xB8,0xF1,0x4A,0x24,
+0x30,0x1F,0x69,0x24,
+0x21,0x60,0x00,0x00,
+0x21,0x80,0x00,0x00,
+0x01,0x00,0x02,0x26,
+0x21,0x30,0x30,0x01,
+0x03,0x00,0x03,0x2E,
+0x08,0x00,0x04,0x2E,
+0xFF,0xFF,0x50,0x30,
+0x0E,0x00,0x07,0x2E,
+0x04,0x00,0x60,0x14,
+0x21,0x88,0x00,0x00,
+0x01,0x00,0x11,0x24,
+0x02,0x00,0x02,0x24,
+0x0A,0x88,0x44,0x00,
+0x21,0x10,0x51,0x01,
+0x61,0x00,0x43,0x90,
+0x55,0x00,0x44,0x90,
+0x5B,0x00,0x45,0x90,
+0x21,0x18,0x03,0x01,
+0x21,0x20,0x04,0x01,
+0x21,0x28,0x05,0x01,
+0x9C,0x1D,0xC3,0xA0,
+0x64,0x1D,0xC4,0xA0,
+0xEB,0xFF,0xE0,0x14,
+0x80,0x1D,0xC5,0xA0,
+0x01,0x00,0x8C,0x25,
+0x02,0x00,0x82,0x2D,
+0x0E,0x00,0x29,0x25,
+0xE5,0xFF,0x40,0x14,
+0x03,0x00,0x4A,0x25,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0x30,0x1F,0x47,0x24,
+0xB8,0xF1,0x66,0x24,
+0x21,0x80,0x00,0x00,
+0x03,0x00,0x02,0x2E,
+0x21,0x20,0x07,0x02,
+0xB9,0x00,0x40,0x10,
+0x08,0x00,0x03,0x2E,
+0x71,0x00,0xC3,0x90,
+0x6E,0x00,0xC2,0x90,
+0x00,0x00,0x00,0x00,
+0xC6,0x1D,0x82,0xA0,
+0xB8,0x1D,0x83,0xA0,
+0x01,0x00,0x02,0x26,
+0xFF,0xFF,0x50,0x30,
+0x0E,0x00,0x03,0x2E,
+0xF4,0xFF,0x60,0x14,
+0x03,0x00,0x02,0x2E,
+0x03,0x00,0x02,0x24,
+0x2A,0x00,0x62,0x15,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0xB8,0xF1,0x4E,0x24,
+0x34,0xD9,0x6F,0x24,
+0x21,0x60,0x00,0x00,
+0x21,0x68,0x00,0x00,
+0x21,0x10,0xAE,0x01,
+0x74,0x00,0x43,0x90,
+0x21,0x80,0x00,0x00,
+0x0F,0x00,0x6A,0x30,
+0x02,0x49,0x03,0x00,
+0x21,0x10,0xB0,0x01,
+0x00,0x11,0x02,0x00,
+0x21,0x58,0x4F,0x00,
+0x21,0x38,0x00,0x00,
+0x21,0x40,0x67,0x01,
+0x00,0x00,0x03,0x91,
+0x00,0x31,0x09,0x00,
+0x01,0x00,0xE7,0x24,
+0x02,0x11,0x03,0x00,
+0x00,0x21,0x02,0x00,
+0x0F,0x00,0x63,0x30,
+0x2B,0x10,0x49,0x00,
+0x0A,0x20,0xC2,0x00,
+0x2B,0x28,0x6A,0x00,
+0x00,0x00,0xA5,0x38,
+0x25,0x18,0x83,0x00,
+0xFF,0xFF,0xE7,0x30,
+0x25,0x20,0x8A,0x00,
+0x0A,0x18,0x85,0x00,
+0x10,0x00,0xE2,0x2C,
+0xEF,0xFF,0x40,0x14,
+0x00,0x00,0x03,0xA1,
+0x01,0x00,0x02,0x26,
+0xFF,0xFF,0x50,0x30,
+0x03,0x00,0x03,0x2E,
+0xE7,0xFF,0x60,0x14,
+0x21,0x10,0xB0,0x01,
+0x01,0x00,0x8C,0x25,
+0x02,0x00,0x82,0x2D,
+0xDD,0xFF,0x40,0x14,
+0x03,0x00,0xAD,0x25,
+0xE6,0x56,0x00,0x0C,
+0x01,0x00,0x04,0x24,
+0x48,0xF3,0xA5,0x26,
+0x91,0x56,0x00,0x0C,
+0xFA,0x01,0x04,0x24,
+0xE6,0x56,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0x02,0x80,0x04,0x3C,
+0x25,0xB0,0x05,0x3C,
+0x18,0x3B,0x84,0x24,
+0x50,0x00,0xA5,0x34,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0x30,0x1F,0xC5,0x26,
+0x01,0x00,0x02,0x24,
+0x06,0x00,0x03,0x24,
+0x05,0x00,0x04,0x24,
+0x33,0x1C,0xA2,0xA0,
+0x8A,0x55,0x00,0x0C,
+0x30,0x3B,0xA3,0xA0,
+0x34,0x00,0xBF,0x8F,
+0x30,0x00,0xB6,0x8F,
+0x2C,0x00,0xB5,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x38,0x00,0xBD,0x27,
+0x25,0xB0,0x03,0x3C,
+0x4C,0x87,0x02,0x3C,
+0x54,0x00,0x65,0x34,
+0x00,0xE0,0x42,0x34,
+0x50,0x00,0x63,0x34,
+0x00,0x00,0x62,0xAC,
+0x12,0x01,0x04,0x24,
+0x02,0x80,0x02,0x3C,
+0x00,0x00,0xA4,0xAC,
+0x30,0x1F,0x46,0x24,
+0x21,0x60,0x00,0x00,
+0x10,0x00,0x05,0x24,
+0x21,0x80,0x00,0x00,
+0x01,0x00,0x02,0x26,
+0x21,0x18,0xD0,0x00,
+0xFF,0xFF,0x50,0x30,
+0x0E,0x00,0x04,0x2E,
+0x80,0x1D,0x65,0xA0,
+0x64,0x1D,0x65,0xA0,
+0xF9,0xFF,0x80,0x14,
+0x9C,0x1D,0x65,0xA0,
+0x01,0x00,0x8C,0x25,
+0x02,0x00,0x82,0x2D,
+0xF4,0xFF,0x40,0x14,
+0x0E,0x00,0xC6,0x24,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x46,0x24,
+0x21,0x80,0x00,0x00,
+0x04,0x00,0x05,0x24,
+0x01,0x00,0x02,0x26,
+0x21,0x18,0x06,0x02,
+0xFF,0xFF,0x50,0x30,
+0x0E,0x00,0x04,0x2E,
+0xC6,0x1D,0x60,0xA0,
+0xFA,0xFF,0x80,0x14,
+0xB8,0x1D,0x65,0xA0,
+0x48,0x65,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x04,0x3C,
+0x02,0x80,0x05,0x3C,
+0x50,0x00,0x84,0x34,
+0xCA,0xF1,0xA5,0x24,
+0x10,0x52,0x00,0x0C,
+0x06,0x00,0x06,0x24,
+0xB8,0xF1,0x62,0x92,
+0xB8,0xF1,0x64,0x26,
+0x01,0x00,0x85,0x90,
+0x21,0x18,0x40,0x00,
+0x10,0x00,0xA2,0xA3,
+0x29,0x00,0x02,0x24,
+0x11,0x00,0xA5,0xA3,
+0x50,0x00,0x86,0x90,
+0x3B,0x00,0x62,0x10,
+0xFF,0x00,0xA3,0x30,
+0xB8,0xF1,0x65,0x26,
+0x68,0x00,0xA2,0x90,
+0x02,0x80,0x03,0x3C,
+0x04,0x00,0xC4,0x2C,
+0x1F,0x00,0x42,0x30,
+0x24,0x00,0x80,0x14,
+0x49,0xF3,0x62,0xA0,
+0x7A,0x00,0xA2,0x90,
+0x79,0x00,0xA4,0x90,
+0x02,0x80,0x03,0x3C,
+0x04,0x00,0x42,0x30,
+0x83,0x10,0x02,0x00,
+0x03,0x00,0x8B,0x30,
+0x4A,0xF3,0x62,0xA0,
+0x06,0x00,0xC2,0x2C,
+0x37,0xFF,0x40,0x14,
+0x02,0x80,0x02,0x3C,
+0xB8,0xF1,0x63,0x26,
+0x69,0x00,0x62,0x90,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x42,0x30,
+0x31,0xFF,0x40,0x14,
+0x02,0x80,0x02,0x3C,
+0xE8,0x64,0x00,0x08,
+0x21,0x40,0x00,0x00,
+0x21,0x20,0x00,0x00,
+0x80,0x00,0x05,0x24,
+0x53,0x56,0x00,0x0C,
+0xB8,0xF1,0x66,0x26,
+0xC7,0x64,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x7D,0x00,0x43,0x90,
+0x69,0x00,0x44,0x90,
+0x02,0x80,0x02,0x3C,
+0x04,0x00,0x63,0x30,
+0x01,0x00,0x84,0x30,
+0x83,0x18,0x03,0x00,
+0x01,0x00,0x84,0x2C,
+0x1F,0xFF,0x80,0x10,
+0x4A,0xF3,0x43,0xA0,
+0xE8,0x64,0x00,0x08,
+0x21,0x40,0x00,0x00,
+0x02,0x80,0x02,0x3C,
+0x02,0x00,0x0B,0x24,
+0xAA,0x65,0x00,0x08,
+0x4A,0xF3,0x40,0xA0,
+0x21,0x28,0x07,0x02,
+0x06,0x00,0x60,0x10,
+0x21,0x20,0xA0,0x00,
+0x67,0x00,0xC3,0x90,
+0x6F,0x00,0xC2,0x90,
+0xB8,0x1D,0xA3,0xA0,
+0x17,0x65,0x00,0x08,
+0xC6,0x1D,0xA2,0xA0,
+0x72,0x00,0xC3,0x90,
+0x70,0x00,0xC2,0x90,
+0x16,0x65,0x00,0x08,
+0xC6,0x1D,0x82,0xA0,
+0x81,0x00,0x02,0x24,
+0xC4,0xFF,0x62,0x14,
+0x01,0x00,0x02,0x24,
+0x54,0x00,0x83,0x90,
+0x00,0x00,0x00,0x00,
+0x0A,0x00,0x62,0x10,
+0x02,0x00,0x02,0x24,
+0x04,0x00,0x62,0x10,
+0x11,0x00,0x03,0x24,
+0x02,0x80,0x02,0x3C,
+0x9C,0x65,0x00,0x08,
+0xDE,0x5D,0x43,0xA0,
+0x22,0x00,0x03,0x24,
+0x02,0x80,0x02,0x3C,
+0x9C,0x65,0x00,0x08,
+0xDE,0x5D,0x43,0xA0,
+0x12,0x00,0x03,0x24,
+0x02,0x80,0x02,0x3C,
+0x9C,0x65,0x00,0x08,
+0xDE,0x5D,0x43,0xA0,
+0xD8,0xFF,0xBD,0x27,
+0x18,0x00,0xB0,0xAF,
+0x02,0x80,0x02,0x3C,
+0x25,0xB0,0x10,0x3C,
+0x18,0x03,0x03,0x36,
+0xA8,0x97,0x42,0x24,
+0x00,0x00,0x62,0xAC,
+0x20,0x00,0xB2,0xAF,
+0x02,0x80,0x12,0x3C,
+0x24,0x00,0xBF,0xAF,
+0x6E,0x64,0x00,0x0C,
+0x1C,0x00,0xB1,0xAF,
+0x9C,0x66,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x36,0x69,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x1A,0x6A,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x7C,0x6C,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x82,0x69,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x30,0x1F,0x43,0x26,
+0x30,0x3B,0x64,0x90,
+0x0D,0x0C,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x76,0x63,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x64,0x40,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x44,0x00,0x03,0x36,
+0x00,0x00,0x62,0x94,
+0x00,0x00,0x00,0x00,
+0x40,0x00,0x42,0x34,
+0x00,0x00,0x62,0xA4,
+0xAE,0x63,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x7C,0x63,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x9B,0x63,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xE6,0x69,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xA3,0x69,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x00,0x80,0x04,0x3C,
+0x74,0x6A,0x84,0x24,
+0x03,0x6A,0x00,0x0C,
+0x01,0x00,0x05,0x24,
+0x00,0x80,0x04,0x3C,
+0x6C,0x72,0x84,0x24,
+0x03,0x6A,0x00,0x0C,
+0x02,0x00,0x05,0x24,
+0x00,0x80,0x04,0x3C,
+0x48,0x7B,0x84,0x24,
+0x03,0x6A,0x00,0x0C,
+0x04,0x00,0x05,0x24,
+0x7E,0x59,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x01,0x80,0x04,0x3C,
+0xB8,0x8E,0x84,0x24,
+0x03,0x6A,0x00,0x0C,
+0x03,0x00,0x05,0x24,
+0x02,0x80,0x03,0x3C,
+0xE8,0x5D,0x63,0x90,
+0x00,0x00,0x00,0x00,
+0x60,0x00,0x60,0x10,
+0x43,0x00,0x02,0x36,
+0x07,0x00,0x02,0x24,
+0x0C,0x00,0x62,0x10,
+0x03,0x00,0x02,0x24,
+0x25,0xB0,0x04,0x3C,
+0x43,0x00,0x85,0x34,
+0x10,0x02,0x86,0x34,
+0x10,0x00,0x03,0x24,
+0x00,0x00,0xA2,0xA0,
+0xD8,0x00,0x84,0x34,
+0x00,0x00,0xC3,0xA0,
+0x00,0x00,0x82,0x90,
+0x80,0xFF,0x03,0x24,
+0x25,0x10,0x43,0x00,
+0x00,0x00,0x82,0xA0,
+0xE0,0x6A,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x42,0xB0,0x03,0x3C,
+0x00,0x00,0x62,0x90,
+0x25,0xB0,0x10,0x3C,
+0x02,0x80,0x11,0x3C,
+0x01,0x00,0x42,0x34,
+0x00,0x00,0x62,0xA0,
+0x83,0x63,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x44,0x00,0x05,0x36,
+0x00,0x00,0xA2,0x94,
+0x02,0x80,0x03,0x3C,
+0x8C,0xC6,0x64,0x8C,
+0xC0,0x00,0x42,0x34,
+0x00,0x00,0xA2,0xA4,
+0x2F,0x55,0x00,0x0C,
+0x80,0x0C,0x10,0x36,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0xDA,0x5D,0x45,0x90,
+0xDF,0x5D,0x66,0x90,
+0x02,0x80,0x04,0x3C,
+0x2F,0x55,0x00,0x0C,
+0x90,0xC6,0x84,0x24,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0xDE,0x5D,0x45,0x90,
+0x48,0xF3,0x66,0x90,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0xE7,0x5D,0x47,0x90,
+0x4A,0xF3,0x62,0x90,
+0x02,0x80,0x04,0x3C,
+0xA4,0xC6,0x84,0x24,
+0x2F,0x55,0x00,0x0C,
+0x10,0x00,0xA2,0xAF,
+0x02,0x80,0x02,0x3C,
+0x00,0x00,0x07,0x8E,
+0xE6,0x5D,0x46,0x90,
+0xE9,0x5D,0x25,0x92,
+0x02,0x80,0x04,0x3C,
+0x2F,0x55,0x00,0x0C,
+0xC0,0xC6,0x84,0x24,
+0x02,0x80,0x03,0x3C,
+0x02,0x80,0x02,0x3C,
+0xEB,0x5D,0x66,0x90,
+0xEA,0x5D,0x45,0x90,
+0x02,0x80,0x04,0x3C,
+0x30,0x1F,0x50,0x26,
+0x2F,0x55,0x00,0x0C,
+0xDC,0xC6,0x84,0x24,
+0xA0,0x3E,0x06,0x8E,
+0xA4,0x3E,0x05,0x8E,
+0x02,0x80,0x04,0x3C,
+0x2F,0x55,0x00,0x0C,
+0xF0,0xC6,0x84,0x24,
+0x02,0x80,0x02,0x3C,
+0x49,0xF3,0x45,0x90,
+0x02,0x80,0x04,0x3C,
+0x2F,0x55,0x00,0x0C,
+0x10,0xC7,0x84,0x24,
+0xE9,0x5D,0x23,0x92,
+0x10,0x27,0x02,0x24,
+0x02,0x80,0x04,0x3C,
+0x0B,0x10,0x03,0x00,
+0x40,0x39,0x02,0xAE,
+0x08,0x00,0x84,0x24,
+0x21,0x28,0x00,0x00,
+0x21,0x30,0x00,0x00,
+0x91,0x3C,0x00,0x0C,
+0x21,0x38,0x00,0x00,
+0x99,0x63,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x24,0x00,0xBF,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x01,0x00,0x02,0x24,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0xD8,0x00,0x04,0x36,
+0x00,0x00,0x40,0xA0,
+0x38,0x66,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x21,0x20,0x00,0x00,
+0x20,0xB0,0x06,0x3C,
+0xFF,0xFF,0x05,0x34,
+0x21,0x18,0x86,0x00,
+0x04,0x00,0x84,0x24,
+0x2A,0x10,0xA4,0x00,
+0x00,0x00,0x60,0xAC,
+0xFB,0xFF,0x40,0x10,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xB8,0xFF,0xBD,0x27,
+0x24,0x00,0xB1,0xAF,
+0x44,0x00,0xBF,0xAF,
+0x40,0x00,0xBE,0xAF,
+0x3C,0x00,0xB7,0xAF,
+0x38,0x00,0xB6,0xAF,
+0x34,0x00,0xB5,0xAF,
+0x30,0x00,0xB4,0xAF,
+0x2C,0x00,0xB3,0xAF,
+0x28,0x00,0xB2,0xAF,
+0x20,0x00,0xB0,0xAF,
+0x02,0x80,0x02,0x3C,
+0xDA,0x5D,0x42,0x90,
+0x25,0xB0,0x11,0x3C,
+0x58,0x00,0x25,0x36,
+0x10,0x00,0xA2,0xAF,
+0x4C,0x81,0x02,0x3C,
+0x00,0xE0,0x42,0x34,
+0x00,0x00,0xA2,0xAC,
+0xFF,0xFF,0x04,0x24,
+0x96,0x01,0x03,0x24,
+0x28,0x28,0x02,0x24,
+0x5C,0x00,0x26,0x36,
+0x60,0x00,0x27,0x36,
+0x64,0x00,0x28,0x36,
+0x8A,0x00,0x29,0x36,
+0x00,0x00,0xC3,0xAC,
+0x00,0x00,0xE4,0xAC,
+0x00,0x00,0x04,0xAD,
+0x00,0x00,0x22,0xA5,
+0x0E,0x0E,0x02,0x3C,
+0x09,0x00,0x03,0x24,
+0x0A,0x0A,0x42,0x34,
+0x89,0x00,0x2A,0x36,
+0x8C,0x00,0x2B,0x36,
+0x00,0x00,0x43,0xA1,
+0x90,0x00,0x2C,0x36,
+0x00,0x00,0x62,0xAD,
+0x13,0x00,0x03,0x24,
+0x30,0x00,0x02,0x24,
+0x91,0x00,0x2D,0x36,
+0x00,0x00,0x83,0xA1,
+0x92,0x00,0x2E,0x36,
+0x00,0x00,0xA2,0xA1,
+0x3A,0x01,0x03,0x24,
+0x21,0x00,0x02,0x24,
+0xB5,0x00,0x2F,0x36,
+0x00,0x00,0xC3,0xA5,
+0x00,0x00,0xE2,0xA1,
+0x10,0x00,0xA2,0x8F,
+0x12,0x00,0x03,0x24,
+0x89,0x01,0x43,0x10,
+0x07,0x07,0x02,0x3C,
+0x07,0x07,0x42,0x34,
+0xA0,0x00,0x24,0x36,
+0x00,0x00,0x82,0xAC,
+0xA4,0x00,0x25,0x36,
+0x00,0x07,0x03,0x24,
+0x00,0xC0,0x02,0x3C,
+0xA8,0x00,0x26,0x36,
+0x00,0x00,0xA3,0xAC,
+0x00,0xC4,0x42,0x34,
+0x00,0x00,0xC2,0xAC,
+0x02,0x80,0x03,0x3C,
+0x30,0x1F,0x62,0x24,
+0xAC,0x1B,0x45,0x94,
+0xAE,0x1B,0x46,0x94,
+0xAA,0x1B,0x42,0x90,
+0x02,0x80,0x03,0x3C,
+0x21,0xB0,0x07,0x3C,
+0x14,0x00,0xA2,0xA3,
+0xE9,0x5D,0x63,0x90,
+0x20,0xB0,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x18,0x00,0xA3,0xAF,
+0x23,0xB0,0x03,0x3C,
+0xFF,0xFF,0x63,0x34,
+0x24,0xB0,0x08,0x3C,
+0xFF,0x1F,0x04,0x3C,
+0x25,0xB0,0x1E,0x3C,
+0xFF,0xFF,0x84,0x34,
+0x21,0x38,0xA7,0x00,
+0x21,0x40,0xC8,0x00,
+0x21,0x28,0xA2,0x00,
+0x21,0x30,0xC3,0x00,
+0x24,0x40,0x04,0x01,
+0x24,0x28,0xA4,0x00,
+0x24,0x38,0xE4,0x00,
+0x24,0x30,0xC4,0x00,
+0x35,0x00,0x02,0x24,
+0x20,0x00,0xC4,0x37,
+0x00,0x00,0x82,0xA0,
+0x22,0x00,0x03,0x24,
+0x09,0x00,0x02,0x24,
+0x03,0x05,0xC9,0x37,
+0x60,0x05,0xCA,0x37,
+0xAC,0x00,0xCB,0x37,
+0xF8,0x00,0xCC,0x37,
+0xB0,0x00,0xCD,0x37,
+0x08,0x01,0xCE,0x37,
+0xD8,0x00,0xCF,0x37,
+0x00,0x00,0x23,0xA1,
+0x00,0x00,0x42,0xA1,
+0x00,0x00,0x65,0xAD,
+0x00,0x00,0x87,0xAD,
+0x00,0x00,0xA6,0xAD,
+0x00,0x00,0xC8,0xAD,
+0x00,0x00,0xE0,0xA1,
+0x14,0x00,0xA3,0x93,
+0x25,0xB0,0x02,0x3C,
+0xB4,0x00,0x42,0x34,
+0x00,0x00,0x43,0xA0,
+0xB6,0x00,0xD1,0x37,
+0x04,0x00,0x02,0x24,
+0x25,0xB0,0x03,0x3C,
+0x00,0x00,0x22,0xA2,
+0xB9,0x00,0x63,0x34,
+0xFF,0xFF,0x02,0x24,
+0x00,0x00,0x62,0xA0,
+0x25,0xB0,0x03,0x3C,
+0x0F,0x00,0x02,0x24,
+0xBA,0x00,0x63,0x34,
+0x00,0x00,0x62,0xA4,
+0x16,0x01,0xD4,0x37,
+0x3F,0x3F,0x03,0x24,
+0x2F,0x00,0x02,0x3C,
+0x00,0x00,0x83,0xA6,
+0x17,0x32,0x42,0x34,
+0xFF,0xCF,0x03,0x24,
+0x18,0x01,0xD5,0x37,
+0x1A,0x01,0xD6,0x37,
+0xDC,0x00,0xD7,0x37,
+0xD0,0x01,0xD8,0x37,
+0x00,0x00,0xA0,0xA6,
+0x00,0x00,0xC0,0xA6,
+0x00,0x00,0xE3,0xAE,
+0x00,0x00,0x02,0xAF,
+0x5E,0x00,0x03,0x3C,
+0x25,0xB0,0x02,0x3C,
+0x17,0x43,0x63,0x34,
+0xD4,0x01,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0x10,0x00,0x02,0x3C,
+0x20,0x53,0x42,0x34,
+0xD8,0x01,0xDF,0x37,
+0x00,0x00,0xE2,0xAF,
+0x25,0xB0,0x02,0x3C,
+0x44,0xA4,0x03,0x34,
+0xDC,0x01,0x42,0x34,
+0x00,0x00,0x43,0xAC,
+0x25,0xB0,0x03,0x3C,
+0x1A,0x06,0x02,0x24,
+0xE0,0x01,0x63,0x34,
+0x00,0x00,0x62,0xA4,
+0xC2,0x00,0x02,0x3C,
+0x30,0x30,0x03,0x24,
+0x51,0x10,0x42,0x34,
+0xF4,0x01,0xD0,0x37,
+0xF8,0x01,0xD3,0x37,
+0x00,0x00,0x03,0xA6,
+0x00,0x02,0xD2,0x37,
+0x00,0x00,0x62,0xAE,
+0x26,0x00,0x03,0x24,
+0x03,0x02,0xD9,0x37,
+0x04,0x00,0x02,0x24,
+0x00,0x00,0x43,0xA6,
+0x00,0x00,0x22,0xA3,
+0x18,0x00,0xA3,0x8F,
+0x00,0x00,0x00,0x00,
+0xE5,0x00,0x60,0x14,
+0x36,0x02,0xC2,0x37,
+0x04,0x00,0x03,0x24,
+0x00,0x00,0x43,0xA0,
+0x02,0x80,0x0B,0x3C,
+0xDE,0x5D,0x66,0x91,
+0x25,0xB0,0x09,0x3C,
+0x80,0x00,0x02,0x24,
+0x34,0x02,0x24,0x35,
+0x00,0x00,0x82,0xA4,
+0x37,0x02,0x25,0x35,
+0x53,0x00,0x03,0x24,
+0x22,0x00,0x02,0x24,
+0x00,0x00,0xA3,0xA0,
+0xE6,0x00,0xC2,0x10,
+0x1B,0x1B,0x02,0x3C,
+0x13,0x13,0x02,0x3C,
+0x13,0x13,0x42,0x34,
+0x60,0x01,0x23,0x35,
+0x64,0x01,0x24,0x35,
+0x68,0x01,0x25,0x35,
+0x7C,0x01,0x2A,0x35,
+0x6C,0x01,0x26,0x35,
+0x70,0x01,0x27,0x35,
+0x74,0x01,0x28,0x35,
+0x78,0x01,0x29,0x35,
+0x00,0x00,0x62,0xAC,
+0x00,0x00,0x82,0xAC,
+0x00,0x00,0xA2,0xAC,
+0x00,0x00,0xC2,0xAC,
+0x00,0x00,0xE2,0xAC,
+0x00,0x00,0x02,0xAD,
+0x00,0x00,0x22,0xAD,
+0x00,0x00,0x42,0xAD,
+0xDE,0x5D,0x65,0x91,
+0x25,0xB0,0x0C,0x3C,
+0x01,0x00,0x03,0x3C,
+0x80,0x01,0x82,0x35,
+0x08,0x5F,0x63,0x34,
+0x22,0x00,0x04,0x24,
+0x00,0x00,0x43,0xAC,
+0xE5,0x00,0xA4,0x10,
+0x0F,0x1F,0x02,0x3C,
+0x92,0x00,0x02,0x24,
+0xE2,0x00,0xA2,0x10,
+0x0F,0x1F,0x02,0x3C,
+0x0F,0x10,0x02,0x3C,
+0x00,0xF0,0x4F,0x34,
+0xF7,0x01,0x91,0x35,
+0x15,0xF0,0x4D,0x34,
+0x77,0x00,0x0E,0x24,
+0x84,0x01,0x87,0x35,
+0x88,0x01,0x88,0x35,
+0x10,0xF0,0x44,0x34,
+0x8C,0x01,0x85,0x35,
+0x05,0xF0,0x42,0x34,
+0x00,0x00,0xED,0xAC,
+0x90,0x01,0x83,0x35,
+0x00,0x00,0x04,0xAD,
+0x94,0x01,0x86,0x35,
+0x00,0x00,0xA2,0xAC,
+0xF5,0x0F,0x02,0x24,
+0x00,0x00,0x6F,0xAC,
+0x98,0x01,0x89,0x35,
+0x00,0x00,0xC2,0xAC,
+0x9C,0x01,0x8A,0x35,
+0xA0,0x01,0x8B,0x35,
+0xF0,0x0F,0x03,0x24,
+0xF6,0x01,0x8C,0x35,
+0x0D,0x00,0x02,0x24,
+0x00,0x00,0x23,0xAD,
+0x00,0x00,0x42,0xAD,
+0x00,0x00,0x6D,0xAD,
+0x02,0x80,0x02,0x3C,
+0x00,0x00,0x8E,0xA1,
+0x00,0x00,0x2E,0xA2,
+0xFB,0x5D,0x42,0x90,
+0x25,0xB0,0x1F,0x3C,
+0xA7,0x01,0xE7,0x37,
+0x1C,0x00,0xA2,0xAF,
+0xFF,0xFF,0x02,0x24,
+0x00,0x00,0xE2,0xA0,
+0x05,0x06,0x03,0x3C,
+0x25,0xB0,0x02,0x3C,
+0x03,0x04,0x63,0x34,
+0x0C,0x00,0x04,0x24,
+0xFF,0xFF,0x05,0x24,
+0x01,0x02,0x06,0x3C,
+0xC2,0x01,0x42,0x34,
+0xA8,0x01,0xE8,0x37,
+0xAC,0x01,0xE9,0x37,
+0xB0,0x01,0xEA,0x37,
+0xB4,0x01,0xEB,0x37,
+0xB8,0x01,0xEC,0x37,
+0xBC,0x01,0xED,0x37,
+0xC0,0x01,0xEE,0x37,
+0xC1,0x01,0xEF,0x37,
+0x00,0x00,0x05,0xAD,
+0x00,0x00,0x25,0xAD,
+0x00,0x00,0x46,0xAD,
+0x00,0x00,0x63,0xAD,
+0x00,0x00,0x86,0xAD,
+0x00,0x00,0xA3,0xAD,
+0x00,0x00,0xC4,0xA1,
+0x25,0xB0,0x03,0x3C,
+0x00,0x00,0xE4,0xA1,
+0x00,0x00,0x44,0xA0,
+0x25,0xB0,0x02,0x3C,
+0x0D,0x00,0x17,0x24,
+0x0E,0x00,0x18,0x24,
+0xC4,0x01,0x63,0x34,
+0xC5,0x01,0x42,0x34,
+0xC3,0x01,0xF1,0x37,
+0x00,0x00,0x37,0xA2,
+0xC6,0x01,0xF4,0x37,
+0x00,0x00,0x77,0xA0,
+0xC7,0x01,0xF5,0x37,
+0x00,0x00,0x58,0xA0,
+0x0F,0x00,0x02,0x24,
+0x00,0x00,0x98,0xA2,
+0x00,0x00,0xA2,0xA2,
+0xD3,0x01,0x02,0x3C,
+0x46,0x00,0xF6,0x37,
+0x48,0x00,0xFE,0x37,
+0x0E,0xF0,0x42,0x34,
+0x00,0x00,0xC0,0xA6,
+0x00,0x00,0xC2,0xAF,
+0x1C,0x00,0xA3,0x8F,
+0x00,0x00,0x00,0x00,
+0x09,0x00,0x60,0x10,
+0x44,0x00,0xF7,0x37,
+0x00,0x00,0xE2,0x8E,
+0x00,0x02,0x03,0x3C,
+0x25,0x10,0x43,0x00,
+0x00,0x00,0xE2,0xAE,
+0x00,0x00,0xC3,0x8F,
+0x00,0x04,0x02,0x3C,
+0x25,0x18,0x62,0x00,
+0x00,0x00,0xC3,0xAF,
+0x4C,0x00,0xE2,0x37,
+0x00,0x00,0x40,0xA0,
+0x4D,0x00,0xE3,0x37,
+0xF1,0x02,0xE4,0x37,
+0x08,0x00,0x02,0x24,
+0x00,0x00,0x60,0xA0,
+0x40,0x00,0xE6,0x37,
+0x00,0x00,0x82,0xA0,
+0x64,0x03,0xE5,0x37,
+0xBC,0x00,0x03,0x24,
+0xFC,0x37,0x02,0x24,
+0x00,0x00,0xC3,0xA4,
+0x00,0x00,0xA0,0xA0,
+0x00,0x00,0xC2,0xA4,
+0x02,0x80,0x02,0x3C,
+0xD8,0x00,0xE9,0x37,
+0x30,0x1F,0x43,0x24,
+0x00,0x00,0x26,0x91,
+0xAA,0x1B,0x64,0x90,
+0x2A,0xB0,0x05,0x3C,
+0xA0,0xFF,0x02,0x24,
+0x26,0xB0,0x07,0x3C,
+0x25,0x30,0xC2,0x00,
+0x30,0x00,0xAD,0x34,
+0x34,0x00,0xA8,0x34,
+0x01,0x00,0x83,0x24,
+0x38,0x00,0xA5,0x34,
+0x20,0x20,0x02,0x24,
+0x00,0x00,0x26,0xA1,
+0x79,0x00,0xEA,0x34,
+0x00,0x00,0x03,0xA1,
+0x00,0x00,0xA2,0xA4,
+0x40,0x00,0x03,0x24,
+0x16,0x00,0x02,0x24,
+0x00,0x00,0xA3,0xA1,
+0x94,0x00,0xEB,0x37,
+0x00,0x00,0x42,0xA1,
+0x98,0x00,0xEC,0x37,
+0x64,0x00,0x03,0x24,
+0x22,0x00,0x02,0x24,
+0x00,0x00,0x63,0xA5,
+0x7C,0x00,0xF4,0x34,
+0x00,0x00,0x82,0xA5,
+0x7A,0x00,0xE7,0x34,
+0x04,0x00,0x03,0x24,
+0x20,0x0C,0x02,0x24,
+0x00,0x00,0xE3,0xA0,
+0x9C,0x00,0xEE,0x37,
+0x00,0x00,0x82,0xA6,
+0x9A,0x00,0xEF,0x37,
+0x0A,0x00,0x03,0x24,
+0xFF,0x03,0x02,0x24,
+0x00,0x00,0xC3,0xA1,
+0x00,0x00,0xE2,0xA5,
+0x25,0xB0,0x02,0x3C,
+0x02,0x00,0x03,0x24,
+0x96,0x00,0x42,0x34,
+0x00,0x00,0x43,0xA4,
+0x89,0x00,0xF5,0x37,
+0xB7,0x00,0xF1,0x37,
+0x20,0x00,0x02,0x24,
+0x09,0x00,0x03,0x24,
+0x00,0x00,0x22,0xA2,
+0x00,0x00,0xA3,0xA2,
+0x00,0x00,0xE2,0x96,
+0xFF,0xFD,0x03,0x24,
+0x04,0x02,0x05,0x24,
+0x24,0x10,0x43,0x00,
+0x00,0x00,0xE2,0xA6,
+0x00,0x00,0xE3,0x96,
+0x29,0xB0,0x02,0x3C,
+0x40,0x00,0x42,0x34,
+0x00,0x02,0x63,0x34,
+0x00,0x00,0xE3,0xA6,
+0xFF,0x00,0x84,0x30,
+0x00,0x00,0x45,0xA4,
+0x73,0x22,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x44,0x00,0xBF,0x8F,
+0x40,0x00,0xBE,0x8F,
+0x3C,0x00,0xB7,0x8F,
+0x38,0x00,0xB6,0x8F,
+0x34,0x00,0xB5,0x8F,
+0x30,0x00,0xB4,0x8F,
+0x2C,0x00,0xB3,0x8F,
+0x28,0x00,0xB2,0x8F,
+0x24,0x00,0xB1,0x8F,
+0x20,0x00,0xB0,0x8F,
+0x01,0x00,0x02,0x24,
+0x08,0x00,0xE0,0x03,
+0x48,0x00,0xBD,0x27,
+0xFF,0xFF,0x03,0x24,
+0x00,0x00,0x43,0xA0,
+0x02,0x80,0x0B,0x3C,
+0xDE,0x5D,0x66,0x91,
+0x25,0xB0,0x09,0x3C,
+0x80,0x00,0x02,0x24,
+0x34,0x02,0x24,0x35,
+0x00,0x00,0x82,0xA4,
+0x37,0x02,0x25,0x35,
+0x53,0x00,0x03,0x24,
+0x22,0x00,0x02,0x24,
+0x00,0x00,0xA3,0xA0,
+0x1E,0xFF,0xC2,0x14,
+0x13,0x13,0x02,0x3C,
+0x1B,0x1B,0x02,0x3C,
+0x1B,0x1B,0x42,0x34,
+0x60,0x01,0x23,0x35,
+0x64,0x01,0x24,0x35,
+0x68,0x01,0x25,0x35,
+0x7C,0x01,0x2A,0x35,
+0x6C,0x01,0x26,0x35,
+0x70,0x01,0x27,0x35,
+0x74,0x01,0x28,0x35,
+0x78,0x01,0x29,0x35,
+0x00,0x00,0x62,0xAC,
+0x00,0x00,0x82,0xAC,
+0x00,0x00,0xA2,0xAC,
+0x00,0x00,0xC2,0xAC,
+0x00,0x00,0xE2,0xAC,
+0x00,0x00,0x02,0xAD,
+0x00,0x00,0x22,0xAD,
+0x00,0x00,0x42,0xAD,
+0xDE,0x5D,0x65,0x91,
+0x25,0xB0,0x0C,0x3C,
+0x01,0x00,0x03,0x3C,
+0x80,0x01,0x82,0x35,
+0x08,0x5F,0x63,0x34,
+0x22,0x00,0x04,0x24,
+0x00,0x00,0x43,0xAC,
+0x1D,0xFF,0xA4,0x14,
+0x0F,0x1F,0x02,0x3C,
+0x00,0xF0,0x4F,0x34,
+0xF7,0x01,0x91,0x35,
+0x15,0xF0,0x4D,0x34,
+0x78,0x67,0x00,0x08,
+0xFF,0xFF,0x0E,0x24,
+0x02,0x80,0x02,0x3C,
+0xDF,0x5D,0x44,0x90,
+0x06,0x00,0x03,0x24,
+0x0C,0x00,0x83,0x10,
+0x00,0x1C,0x02,0x3C,
+0x00,0x1C,0x42,0x34,
+0xA0,0x00,0x24,0x36,
+0x00,0x00,0x82,0xAC,
+0x00,0xE0,0x02,0x3C,
+0xA4,0x00,0x25,0x36,
+0x00,0x04,0x03,0x24,
+0xA8,0x00,0x26,0x36,
+0x00,0xB0,0x42,0x34,
+0x00,0x00,0xA3,0xAC,
+0xDA,0x66,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x16,0x16,0x02,0x3C,
+0x07,0x07,0x42,0x34,
+0xA0,0x00,0x23,0x36,
+0x00,0x00,0x62,0xAC,
+0x00,0xC0,0x02,0x3C,
+0xA8,0x00,0x25,0x36,
+0xA4,0x00,0x24,0x36,
+0x00,0xB4,0x42,0x34,
+0x00,0x00,0x80,0xAC,
+0x00,0x00,0xA2,0xAC,
+0xDC,0x66,0x00,0x08,
+0x02,0x80,0x03,0x3C,
+0xE8,0xFF,0xBD,0x27,
+0x01,0x00,0x06,0x24,
+0xE8,0x0E,0x04,0x24,
+0x10,0x00,0xBF,0xAF,
+0xA9,0x45,0x00,0x0C,
+0x00,0x10,0x05,0x3C,
+0x60,0x08,0x04,0x24,
+0xCB,0x45,0x00,0x0C,
+0xFF,0xFF,0x05,0x24,
+0x20,0x04,0x06,0x3C,
+0x20,0x04,0xC6,0x34,
+0x25,0x30,0x46,0x00,
+0x60,0x08,0x04,0x24,
+0xA9,0x45,0x00,0x0C,
+0xFF,0xFF,0x05,0x24,
+0x70,0x08,0x04,0x24,
+0x00,0x04,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x00,0x20,0x06,0x3C,
+0x80,0x00,0xC6,0x34,
+0x80,0x0C,0x04,0x24,
+0xA9,0x45,0x00,0x0C,
+0xFF,0xFF,0x05,0x24,
+0x00,0x40,0x06,0x3C,
+0x10,0x00,0xBF,0x8F,
+0x00,0x01,0xC6,0x34,
+0x88,0x0C,0x04,0x24,
+0xFF,0xFF,0x05,0x24,
+0xA9,0x45,0x00,0x08,
+0x18,0x00,0xBD,0x27,
+0x10,0x00,0xA0,0x10,
+0x21,0x38,0x00,0x00,
+0x25,0xB0,0x08,0x3C,
+0x00,0x00,0x82,0x8C,
+0x04,0x00,0x83,0x8C,
+0x21,0x30,0x00,0x00,
+0x21,0x10,0x48,0x00,
+0x00,0x00,0x43,0xAC,
+0x01,0x00,0xC2,0x24,
+0xFF,0x00,0x46,0x30,
+0x06,0x00,0xC3,0x2C,
+0xFD,0xFF,0x60,0x14,
+0x01,0x00,0xC2,0x24,
+0x02,0x00,0xE7,0x24,
+0x2B,0x10,0xE5,0x00,
+0xF3,0xFF,0x40,0x14,
+0x08,0x00,0x84,0x24,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xE0,0xFF,0xBD,0x27,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x1C,0x00,0xBF,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x21,0x90,0xA0,0x00,
+0x0B,0x00,0xA0,0x10,
+0x21,0x88,0x00,0x00,
+0x21,0x80,0x80,0x00,
+0x00,0x00,0x04,0x8E,
+0x04,0x00,0x05,0x8E,
+0x08,0x00,0x06,0x8E,
+0x03,0x00,0x31,0x26,
+0xA9,0x45,0x00,0x0C,
+0x0C,0x00,0x10,0x26,
+0x2B,0x10,0x32,0x02,
+0xF8,0xFF,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x21,0x40,0x80,0x00,
+0x21,0x48,0x00,0x00,
+0x1E,0x00,0xA0,0x10,
+0x21,0x38,0x00,0x00,
+0x80,0x30,0x07,0x00,
+0x21,0x10,0xC8,0x00,
+0x00,0x00,0x43,0x8C,
+0x00,0x00,0x00,0x00,
+0x00,0xF2,0x63,0x24,
+0x1D,0x00,0x62,0x2C,
+0x12,0x00,0x40,0x10,
+0x80,0x10,0x03,0x00,
+0x02,0x80,0x03,0x3C,
+0x64,0xE9,0x63,0x24,
+0x21,0x10,0x43,0x00,
+0x00,0x00,0x44,0x8C,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0x80,0x00,
+0x00,0x00,0x00,0x00,
+0x21,0x10,0xC8,0x00,
+0xC0,0x18,0x09,0x00,
+0x23,0x18,0x69,0x00,
+0x08,0x00,0x44,0x8C,
+0x02,0x80,0x02,0x3C,
+0x80,0x18,0x03,0x00,
+0x30,0x1F,0x42,0x24,
+0x21,0x18,0x62,0x00,
+0x04,0x1D,0x64,0xAC,
+0x01,0x00,0x29,0x25,
+0x03,0x00,0xE7,0x24,
+0x2B,0x10,0xE5,0x00,
+0xE5,0xFF,0x40,0x14,
+0x80,0x30,0x07,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x21,0x10,0xC8,0x00,
+0xC0,0x18,0x09,0x00,
+0x08,0x00,0x44,0x8C,
+0x23,0x18,0x69,0x00,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x42,0x24,
+0x80,0x18,0x03,0x00,
+0x03,0x00,0xE7,0x24,
+0x21,0x18,0x62,0x00,
+0x2B,0x10,0xE5,0x00,
+0xD6,0xFF,0x40,0x14,
+0x00,0x1D,0x64,0xAC,
+0xE0,0x68,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x21,0x10,0xC8,0x00,
+0xC0,0x18,0x09,0x00,
+0x08,0x00,0x44,0x8C,
+0x23,0x18,0x69,0x00,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x42,0x24,
+0x80,0x18,0x03,0x00,
+0x03,0x00,0xE7,0x24,
+0x21,0x18,0x62,0x00,
+0x2B,0x10,0xE5,0x00,
+0xC8,0xFF,0x40,0x14,
+0xFC,0x1C,0x64,0xAC,
+0xE0,0x68,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x21,0x10,0xC8,0x00,
+0xC0,0x18,0x09,0x00,
+0x08,0x00,0x44,0x8C,
+0x23,0x18,0x69,0x00,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x42,0x24,
+0x80,0x18,0x03,0x00,
+0x03,0x00,0xE7,0x24,
+0x21,0x18,0x62,0x00,
+0x2B,0x10,0xE5,0x00,
+0xBA,0xFF,0x40,0x14,
+0xF8,0x1C,0x64,0xAC,
+0xE0,0x68,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x21,0x10,0xC8,0x00,
+0xC0,0x18,0x09,0x00,
+0x08,0x00,0x44,0x8C,
+0x23,0x18,0x69,0x00,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x42,0x24,
+0x80,0x18,0x03,0x00,
+0x03,0x00,0xE7,0x24,
+0x21,0x18,0x62,0x00,
+0x2B,0x10,0xE5,0x00,
+0xAC,0xFF,0x40,0x14,
+0x08,0x1D,0x64,0xAC,
+0xE0,0x68,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x21,0x10,0xC8,0x00,
+0xC0,0x18,0x09,0x00,
+0x08,0x00,0x44,0x8C,
+0x23,0x18,0x69,0x00,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x42,0x24,
+0x80,0x18,0x03,0x00,
+0x03,0x00,0xE7,0x24,
+0x21,0x18,0x62,0x00,
+0x2B,0x10,0xE5,0x00,
+0x9E,0xFF,0x40,0x14,
+0xF4,0x1C,0x64,0xAC,
+0xE0,0x68,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x21,0x10,0xC8,0x00,
+0xC0,0x18,0x09,0x00,
+0x08,0x00,0x44,0x8C,
+0x23,0x18,0x69,0x00,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x42,0x24,
+0x80,0x18,0x03,0x00,
+0x03,0x00,0xE7,0x24,
+0x21,0x18,0x62,0x00,
+0x2B,0x10,0xE5,0x00,
+0x90,0xFF,0x40,0x14,
+0xF0,0x1C,0x64,0xAC,
+0xE0,0x68,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x25,0xB0,0x02,0x3C,
+0xFC,0x37,0x03,0x24,
+0x40,0x00,0x42,0x34,
+0x02,0x80,0x04,0x3C,
+0x00,0x00,0x43,0xA4,
+0xE8,0xFF,0xBD,0x27,
+0xA4,0xCF,0x84,0x24,
+0x10,0x00,0xBF,0xAF,
+0x94,0x68,0x00,0x0C,
+0x74,0x01,0x05,0x24,
+0x02,0x80,0x02,0x3C,
+0xDE,0x5D,0x44,0x90,
+0x12,0x00,0x03,0x24,
+0x34,0x00,0x83,0x10,
+0x13,0x00,0x82,0x28,
+0x17,0x00,0x40,0x14,
+0x11,0x00,0x02,0x24,
+0x22,0x00,0x02,0x24,
+0x36,0x00,0x82,0x10,
+0x02,0x80,0x04,0x3C,
+0x02,0x80,0x04,0x3C,
+0x2C,0xCC,0x84,0x24,
+0xBF,0x68,0x00,0x0C,
+0x54,0x00,0x05,0x24,
+0x02,0x80,0x02,0x3C,
+0x4A,0xF3,0x44,0x90,
+0x01,0x00,0x03,0x24,
+0x1A,0x00,0x83,0x10,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x04,0x3C,
+0x2C,0xC7,0x84,0x24,
+0x94,0x68,0x00,0x0C,
+0x40,0x01,0x05,0x24,
+0x10,0x00,0xBF,0x8F,
+0x84,0x08,0x04,0x24,
+0xFF,0x00,0x05,0x24,
+0x58,0x00,0x06,0x24,
+0x1B,0x47,0x00,0x08,
+0x18,0x00,0xBD,0x27,
+0xED,0xFF,0x82,0x14,
+0x02,0x80,0x04,0x3C,
+0x02,0x80,0x04,0x3C,
+0xE4,0xCE,0x84,0x24,
+0xA7,0x68,0x00,0x0C,
+0x30,0x00,0x05,0x24,
+0x02,0x80,0x04,0x3C,
+0x2C,0xCC,0x84,0x24,
+0xBF,0x68,0x00,0x0C,
+0x54,0x00,0x05,0x24,
+0x02,0x80,0x02,0x3C,
+0x4A,0xF3,0x44,0x90,
+0x01,0x00,0x03,0x24,
+0xE8,0xFF,0x83,0x14,
+0x00,0x00,0x00,0x00,
+0x75,0x68,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x04,0x3C,
+0x2C,0xC7,0x84,0x24,
+0x94,0x68,0x00,0x0C,
+0x40,0x01,0x05,0x24,
+0x10,0x00,0xBF,0x8F,
+0x84,0x08,0x04,0x24,
+0xFF,0x00,0x05,0x24,
+0x58,0x00,0x06,0x24,
+0x1B,0x47,0x00,0x08,
+0x18,0x00,0xBD,0x27,
+0x02,0x80,0x04,0x3C,
+0x30,0xCE,0x84,0x24,
+0x2D,0x00,0x05,0x24,
+0xA7,0x68,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x64,0x69,0x00,0x08,
+0x02,0x80,0x04,0x3C,
+0x7C,0xCD,0x84,0x24,
+0x7B,0x69,0x00,0x08,
+0x2D,0x00,0x05,0x24,
+0xE8,0xFF,0xBD,0x27,
+0x10,0x00,0xB0,0xAF,
+0x50,0x0C,0x04,0x24,
+0xFF,0x00,0x05,0x24,
+0x02,0x80,0x10,0x3C,
+0x14,0x00,0xBF,0xAF,
+0x0A,0x47,0x00,0x0C,
+0x30,0x1F,0x10,0x26,
+0x60,0x1D,0x02,0xA2,
+0x58,0x0C,0x04,0x24,
+0x0A,0x47,0x00,0x0C,
+0xFF,0x00,0x05,0x24,
+0x61,0x1D,0x02,0xA2,
+0x60,0x0C,0x04,0x24,
+0x0A,0x47,0x00,0x0C,
+0xFF,0x00,0x05,0x24,
+0x62,0x1D,0x02,0xA2,
+0x68,0x0C,0x04,0x24,
+0x0A,0x47,0x00,0x0C,
+0xFF,0x00,0x05,0x24,
+0x63,0x1D,0x02,0xA2,
+0x38,0x0C,0x04,0x24,
+0x0A,0x47,0x00,0x0C,
+0xFF,0x00,0x05,0x24,
+0xE8,0x1C,0x02,0xA2,
+0x34,0x0C,0x04,0x24,
+0x0A,0x47,0x00,0x0C,
+0xFF,0xFF,0x05,0x24,
+0xEC,0x1C,0x02,0xAE,
+0x14,0x00,0xBF,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x05,0x3C,
+0x02,0x80,0x03,0x3C,
+0x84,0xA7,0x42,0x24,
+0xBC,0x5E,0x60,0xAC,
+0x1C,0x5E,0xA2,0xAC,
+0x02,0x80,0x03,0x3C,
+0x00,0x80,0x02,0x3C,
+0xC0,0x5E,0x60,0xA4,
+0x1C,0x5E,0xA4,0x24,
+0x88,0x0D,0x42,0x24,
+0x02,0x80,0x03,0x3C,
+0xC2,0x5E,0x60,0xA4,
+0x08,0x00,0x82,0xAC,
+0x00,0x80,0x03,0x3C,
+0x00,0x80,0x02,0x3C,
+0x02,0x80,0x06,0x3C,
+0x88,0x10,0x42,0x24,
+0xA4,0x0D,0x63,0x24,
+0xC4,0x5E,0xC7,0x24,
+0x14,0x00,0x82,0xAC,
+0x10,0x00,0x83,0xAC,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0xC4,0x5E,0xC0,0xAC,
+0x04,0x00,0xE0,0xAC,
+0xCC,0x5E,0x40,0xA0,
+0xD0,0x5E,0x60,0xAC,
+0x01,0x80,0x02,0x3C,
+0x30,0xD2,0x42,0x24,
+0x7C,0x00,0x82,0xAC,
+0x00,0x80,0x03,0x3C,
+0x00,0x80,0x02,0x3C,
+0xA4,0x10,0x63,0x24,
+0x64,0x13,0x42,0x24,
+0x1C,0x00,0x83,0xAC,
+0x20,0x00,0x82,0xAC,
+0x00,0x80,0x03,0x3C,
+0x00,0x80,0x02,0x3C,
+0x2C,0x16,0x63,0x24,
+0xF0,0x18,0x42,0x24,
+0x24,0x00,0x83,0xAC,
+0x28,0x00,0x82,0xAC,
+0x00,0x80,0x03,0x3C,
+0x01,0x80,0x02,0x3C,
+0xC8,0x2A,0x63,0x24,
+0x98,0x01,0x42,0x24,
+0x2C,0x00,0x83,0xAC,
+0x50,0x00,0x82,0xAC,
+0x00,0x80,0x03,0x3C,
+0x00,0x80,0x02,0x3C,
+0x10,0x1C,0x63,0x24,
+0xFC,0x1D,0x42,0x24,
+0x30,0x00,0x83,0xAC,
+0x38,0x00,0x82,0xAC,
+0x00,0x80,0x03,0x3C,
+0x00,0x80,0x02,0x3C,
+0x00,0x03,0x63,0x24,
+0xB4,0x1B,0x42,0x24,
+0x4C,0x00,0x83,0xAC,
+0x08,0x00,0xE0,0x03,
+0x3C,0x00,0x82,0xAC,
+0x25,0xB0,0x02,0x3C,
+0x08,0x00,0x42,0x34,
+0x00,0x00,0x43,0x8C,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x0E,0x3C,
+0x02,0x80,0x08,0x3C,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0xF8,0x03,0x4D,0x24,
+0x00,0x1C,0x6C,0x24,
+0x01,0x00,0x07,0x24,
+0x00,0x00,0xCB,0x25,
+0xFF,0xFF,0x0A,0x24,
+0x00,0x04,0x09,0x25,
+0x80,0x1A,0x07,0x00,
+0x21,0x10,0x6B,0x00,
+0x00,0x00,0x42,0xAC,
+0x90,0x00,0x4A,0xAC,
+0x00,0x04,0x04,0x8D,
+0x01,0x00,0xE7,0x24,
+0x08,0x00,0x45,0x24,
+0x21,0x18,0x6D,0x00,
+0x07,0x00,0xE6,0x28,
+0x04,0x00,0x82,0xAC,
+0x00,0x00,0x44,0xAC,
+0x04,0x00,0x49,0xAC,
+0x00,0x04,0x02,0xAD,
+0x8C,0x00,0x40,0xAC,
+0x6C,0x00,0xA3,0xAC,
+0xF0,0xFF,0xC0,0x14,
+0x68,0x00,0xAC,0xAC,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0xC9,0xAD,
+0x07,0x00,0xA2,0x2C,
+0x13,0x00,0x40,0x10,
+0xFF,0xFF,0x07,0x24,
+0x02,0x80,0x02,0x3C,
+0x80,0x1A,0x05,0x00,
+0x00,0x00,0x42,0x24,
+0x0E,0x00,0xA0,0x10,
+0x21,0x30,0x62,0x00,
+0x90,0x00,0xC3,0x8C,
+0xFF,0xFF,0x02,0x24,
+0x0A,0x00,0x62,0x14,
+0x00,0x00,0x00,0x00,
+0x8C,0x00,0xC2,0x8C,
+0x00,0x00,0x00,0x00,
+0x06,0x00,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x02,0x24,
+0x88,0x00,0xC4,0xAC,
+0x8C,0x00,0xC2,0xAC,
+0x90,0x00,0xC5,0xAC,
+0x21,0x38,0xA0,0x00,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0xE0,0x00,
+0x25,0xB0,0x06,0x3C,
+0x02,0x80,0x02,0x3C,
+0xE0,0xFF,0xBD,0x27,
+0x68,0xA8,0x42,0x24,
+0xDB,0xFF,0x03,0x24,
+0x18,0x03,0xC4,0x34,
+0x27,0x00,0xC5,0x34,
+0x00,0x00,0x82,0xAC,
+0x1C,0x00,0xBF,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x00,0x00,0xA3,0xA0,
+0x06,0x00,0xC2,0x34,
+0x00,0x00,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0x0F,0x00,0x63,0x30,
+0x5A,0x00,0x60,0x14,
+0x01,0x00,0x02,0x24,
+0x1B,0x00,0xC3,0x34,
+0x07,0x00,0x02,0x24,
+0x00,0x00,0x62,0xA0,
+0xE6,0x44,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x50,0x24,
+0x34,0x1C,0x04,0x8E,
+0xCB,0x45,0x00,0x0C,
+0x10,0x00,0x05,0x24,
+0x40,0x1C,0x04,0x8E,
+0x10,0x00,0x05,0x3C,
+0x01,0x00,0x06,0x24,
+0xA9,0x45,0x00,0x0C,
+0x21,0x90,0x40,0x00,
+0x3C,0x1C,0x04,0x8E,
+0x10,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x01,0x00,0x06,0x24,
+0x58,0x1C,0x04,0x8E,
+0x00,0x04,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x58,0x1C,0x04,0x8E,
+0x00,0x08,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x02,0x80,0x05,0x3C,
+0xEC,0xD9,0xA5,0x24,
+0x21,0x20,0x00,0x00,
+0x9F,0x47,0x00,0x0C,
+0xCA,0x00,0x06,0x24,
+0x31,0x00,0x40,0x10,
+0x21,0x18,0x00,0x00,
+0x02,0x80,0x02,0x3C,
+0xE7,0x5D,0x43,0x90,
+0x01,0x00,0x11,0x24,
+0x57,0x00,0x71,0x10,
+0x02,0x80,0x05,0x3C,
+0x02,0x80,0x02,0x3C,
+0x4A,0xF3,0x43,0x90,
+0x00,0x00,0x00,0x00,
+0x58,0x00,0x71,0x10,
+0x02,0x80,0x05,0x3C,
+0x34,0x1C,0x04,0x8E,
+0x21,0x30,0x40,0x02,
+0x10,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x02,0x80,0x11,0x3C,
+0xDE,0x5D,0x23,0x92,
+0x11,0x00,0x02,0x24,
+0x2E,0x00,0x62,0x10,
+0x00,0x08,0x04,0x24,
+0xE6,0x44,0x00,0x0C,
+0x01,0x00,0x04,0x24,
+0x34,0x1C,0x04,0x8E,
+0xCB,0x45,0x00,0x0C,
+0x10,0x00,0x05,0x3C,
+0x40,0x1C,0x04,0x8E,
+0x10,0x00,0x05,0x3C,
+0x01,0x00,0x06,0x24,
+0xA9,0x45,0x00,0x0C,
+0x21,0x90,0x40,0x00,
+0x3C,0x1C,0x04,0x8E,
+0x10,0x00,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x01,0x00,0x06,0x24,
+0x58,0x1C,0x04,0x8E,
+0x00,0x04,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x58,0x1C,0x04,0x8E,
+0x00,0x08,0x05,0x24,
+0xA9,0x45,0x00,0x0C,
+0x21,0x30,0x00,0x00,
+0x02,0x80,0x05,0x3C,
+0x94,0xD9,0xA5,0x24,
+0x01,0x00,0x04,0x24,
+0x9F,0x47,0x00,0x0C,
+0x16,0x00,0x06,0x24,
+0x0C,0x00,0x40,0x14,
+0x21,0x18,0x00,0x00,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x21,0x10,0x60,0x00,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0xA9,0xFF,0x62,0x14,
+0x1F,0x00,0xC3,0x34,
+0x2F,0x6A,0x00,0x08,
+0x07,0x00,0x02,0x24,
+0x34,0x1C,0x04,0x8E,
+0x21,0x30,0x40,0x02,
+0xA9,0x45,0x00,0x0C,
+0x10,0x00,0x05,0x3C,
+0x00,0x08,0x04,0x24,
+0x00,0x01,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x01,0x00,0x06,0x24,
+0x00,0x08,0x04,0x24,
+0x00,0x02,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x01,0x00,0x06,0x24,
+0xDE,0x5D,0x23,0x92,
+0x11,0x00,0x02,0x24,
+0x1D,0x00,0x62,0x10,
+0x00,0x08,0x04,0x24,
+0xE6,0x44,0x00,0x0C,
+0x21,0x20,0x00,0x00,
+0x0F,0x00,0x05,0x3C,
+0x0C,0x00,0x06,0x3C,
+0xFF,0xFF,0xA5,0x34,
+0x00,0xB4,0xC6,0x34,
+0x5F,0x47,0x00,0x0C,
+0x08,0x00,0x04,0x24,
+0x1C,0x00,0xBF,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x01,0x00,0x03,0x24,
+0x21,0x10,0x60,0x00,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x84,0xD8,0xA5,0x24,
+0x21,0x20,0x00,0x00,
+0x9F,0x47,0x00,0x0C,
+0x16,0x00,0x06,0x24,
+0x55,0x6A,0x00,0x08,
+0x02,0x80,0x02,0x3C,
+0xDC,0xD8,0xA5,0x24,
+0x21,0x20,0x00,0x00,
+0x9F,0x47,0x00,0x0C,
+0x16,0x00,0x06,0x24,
+0x59,0x6A,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x00,0xFF,0x05,0x3C,
+0xA9,0x45,0x00,0x0C,
+0x03,0x00,0x06,0x24,
+0x9A,0x6A,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xE8,0xFF,0xBD,0x27,
+0x10,0x00,0xBF,0xAF,
+0x02,0x80,0x02,0x3C,
+0x61,0x5A,0x47,0x90,
+0x02,0x80,0x04,0x3C,
+0x02,0x80,0x05,0x3C,
+0x03,0x00,0x03,0x24,
+0x1E,0x3B,0x84,0x24,
+0xAC,0xE3,0xA5,0x24,
+0x0F,0x00,0xE3,0x10,
+0x0D,0x00,0x06,0x24,
+0x02,0x80,0x04,0x3C,
+0x02,0x80,0x05,0x3C,
+0x1E,0x3B,0x84,0x24,
+0x5C,0xE3,0xA5,0x24,
+0x10,0x52,0x00,0x0C,
+0x0D,0x00,0x06,0x24,
+0x02,0x80,0x04,0x3C,
+0x02,0x80,0x05,0x3C,
+0x10,0x00,0xBF,0x8F,
+0x2B,0x3B,0x84,0x24,
+0x6C,0xE3,0xA5,0x24,
+0x0D,0x00,0x06,0x24,
+0x10,0x52,0x00,0x08,
+0x18,0x00,0xBD,0x27,
+0x10,0x52,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x02,0x80,0x04,0x3C,
+0x02,0x80,0x05,0x3C,
+0x10,0x00,0xBF,0x8F,
+0x2B,0x3B,0x84,0x24,
+0x9C,0xE3,0xA5,0x24,
+0x0D,0x00,0x06,0x24,
+0x10,0x52,0x00,0x08,
+0x18,0x00,0xBD,0x27,
+0xE0,0xFF,0xBD,0x27,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x02,0x80,0x11,0x3C,
+0x02,0x80,0x05,0x3C,
+0x02,0x80,0x10,0x3C,
+0x30,0x1F,0x10,0x26,
+0x64,0x5A,0x24,0x26,
+0x14,0xDD,0xA5,0x24,
+0x34,0x00,0x06,0x24,
+0x18,0x00,0xBF,0xAF,
+0x10,0x52,0x00,0x0C,
+0x64,0x5A,0x31,0x26,
+0xBD,0x6A,0x00,0x0C,
+0x68,0x3B,0x11,0xAE,
+0x02,0x00,0x11,0x24,
+0x02,0x80,0x04,0x3C,
+0x00,0x80,0x06,0x3C,
+0xA0,0x38,0x11,0xA2,
+0xBC,0x57,0x84,0x24,
+0xFC,0x64,0xC6,0x24,
+0x21,0x28,0x00,0x00,
+0xA2,0x23,0x00,0x0C,
+0x98,0x38,0x00,0xAE,
+0x02,0x80,0x04,0x3C,
+0x01,0x80,0x06,0x3C,
+0xBC,0x38,0x11,0xA2,
+0xD8,0x57,0x84,0x24,
+0x0C,0x31,0xC6,0x24,
+0x21,0x28,0x00,0x00,
+0xA2,0x23,0x00,0x0C,
+0xB4,0x38,0x00,0xAE,
+0x02,0x80,0x04,0x3C,
+0x01,0x80,0x06,0x3C,
+0xD8,0x38,0x11,0xA2,
+0xF4,0x57,0x84,0x24,
+0xC0,0x2E,0xC6,0x24,
+0x21,0x28,0x00,0x00,
+0xA2,0x23,0x00,0x0C,
+0xD0,0x38,0x00,0xAE,
+0x02,0x80,0x04,0x3C,
+0x01,0x80,0x06,0x3C,
+0xF4,0x38,0x11,0xA2,
+0x10,0x58,0x84,0x24,
+0x14,0x25,0xC6,0x24,
+0x21,0x28,0x00,0x00,
+0xA2,0x23,0x00,0x0C,
+0xEC,0x38,0x00,0xAE,
+0x02,0x80,0x04,0x3C,
+0x00,0x80,0x06,0x3C,
+0x10,0x39,0x11,0xA2,
+0x2C,0x58,0x84,0x24,
+0x58,0x64,0xC6,0x24,
+0x21,0x28,0x00,0x00,
+0xA2,0x23,0x00,0x0C,
+0x08,0x39,0x00,0xAE,
+0x02,0x80,0x04,0x3C,
+0x00,0x80,0x06,0x3C,
+0x48,0x39,0x11,0xA2,
+0x40,0x39,0x00,0xAE,
+0x64,0x58,0x84,0x24,
+0x38,0x3B,0xC6,0x24,
+0xA2,0x23,0x00,0x0C,
+0x21,0x28,0x00,0x00,
+0x02,0x80,0x02,0x3C,
+0x49,0xF3,0x43,0x90,
+0x18,0x00,0xBF,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x9C,0x3E,0x03,0xA2,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x03,0x80,0x05,0x3C,
+0x00,0x80,0xA5,0x24,
+0x40,0x10,0x0D,0x3C,
+0xFF,0xFF,0xA5,0x30,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x42,0x24,
+0x25,0xC8,0xAD,0x00,
+0x38,0x37,0x59,0xAC,
+0x00,0x01,0x39,0x27,
+0xE0,0xFF,0xBD,0x27,
+0x44,0x37,0x59,0xAC,
+0x00,0x01,0x39,0x27,
+0x1C,0x00,0xB7,0xAF,
+0x18,0x00,0xB6,0xAF,
+0x14,0x00,0xB5,0xAF,
+0x10,0x00,0xB4,0xAF,
+0x0C,0x00,0xB3,0xAF,
+0x08,0x00,0xB2,0xAF,
+0x04,0x00,0xB1,0xAF,
+0x00,0x00,0xB0,0xAF,
+0x50,0x37,0x59,0xAC,
+0x00,0x01,0x39,0x27,
+0x5C,0x37,0x59,0xAC,
+0xAA,0x1B,0x44,0x90,
+0x00,0x01,0x39,0x27,
+0x68,0x37,0x59,0xAC,
+0x00,0x01,0x39,0x27,
+0x74,0x37,0x59,0xAC,
+0x20,0xB0,0x06,0x3C,
+0x44,0x37,0x48,0x8C,
+0x50,0x37,0x49,0x8C,
+0x5C,0x37,0x4A,0x8C,
+0x68,0x37,0x4B,0x8C,
+0x74,0x37,0x4C,0x8C,
+0x00,0x22,0x04,0x00,
+0x00,0x01,0xC7,0x34,
+0xFF,0x1F,0x03,0x3C,
+0x00,0x01,0x39,0x27,
+0xFF,0xFF,0x63,0x34,
+0x21,0x38,0x87,0x00,
+0x21,0x20,0x86,0x00,
+0x24,0x38,0xE3,0x00,
+0x20,0x10,0x06,0x3C,
+0x24,0x20,0x83,0x00,
+0x80,0x37,0x59,0xAC,
+0x21,0x78,0x20,0x03,
+0x25,0x28,0xAD,0x00,
+0x25,0xB0,0x0E,0x3C,
+0x00,0x01,0x39,0x27,
+0x34,0x37,0x45,0xAC,
+0x40,0x37,0x48,0xAC,
+0x4C,0x37,0x49,0xAC,
+0x58,0x37,0x4A,0xAC,
+0xF8,0x36,0x44,0xAC,
+0x64,0x37,0x4B,0xAC,
+0x04,0x37,0x47,0xAC,
+0x70,0x37,0x4C,0xAC,
+0xAC,0x00,0xC3,0x35,
+0xCC,0x36,0x46,0xAC,
+0xC8,0x36,0x46,0xAC,
+0xD8,0x36,0x46,0xAC,
+0xD4,0x36,0x46,0xAC,
+0xE4,0x36,0x46,0xAC,
+0x8C,0x37,0x59,0xAC,
+0xFC,0x36,0x44,0xAC,
+0x08,0x37,0x47,0xAC,
+0x7C,0x37,0x4F,0xAC,
+0xE0,0x36,0x46,0xAC,
+0xF0,0x36,0x46,0xAC,
+0xEC,0x36,0x46,0xAC,
+0x14,0x37,0x46,0xAC,
+0x10,0x37,0x46,0xAC,
+0x00,0x02,0x39,0x27,
+0x00,0x00,0x68,0x8C,
+0xAC,0x1B,0x47,0x94,
+0xA4,0x37,0x59,0xAC,
+0xB0,0x00,0xC3,0x35,
+0x00,0x00,0x75,0x8C,
+0x21,0x10,0x05,0x3C,
+0x8C,0x37,0x52,0x8C,
+0x23,0x10,0x0B,0x3C,
+0x22,0x10,0x0F,0x3C,
+0x02,0x80,0x14,0x3C,
+0x02,0x80,0x16,0x3C,
+0x02,0x80,0x17,0x3C,
+0x02,0x80,0x18,0x3C,
+0x00,0x80,0xA4,0x34,
+0x21,0x98,0x20,0x03,
+0x23,0x20,0x87,0x00,
+0x00,0x04,0x39,0x27,
+0x24,0x10,0x07,0x3C,
+0x9C,0x57,0x8A,0x26,
+0xA4,0x57,0xC9,0x26,
+0xAC,0x57,0xEC,0x26,
+0xB4,0x57,0x0D,0x27,
+0x00,0x04,0x70,0x35,
+0x01,0x00,0x08,0x25,
+0x00,0x40,0xF1,0x35,
+0x00,0x01,0xCE,0x35,
+0x01,0x00,0x03,0x24,
+0x88,0x37,0x52,0xAC,
+0x91,0x37,0x43,0xA0,
+0xA0,0x37,0x53,0xAC,
+0x08,0x38,0x50,0xAC,
+0xCC,0x37,0x48,0xAC,
+0xD8,0x37,0x44,0xAC,
+0xFC,0x37,0x51,0xAC,
+0xF0,0x37,0x55,0xAC,
+0x00,0x00,0xC7,0xAD,
+0xEC,0x37,0x47,0xAC,
+0x0C,0x38,0x46,0xAC,
+0x20,0x37,0x46,0xAC,
+0x1C,0x37,0x46,0xAC,
+0xAA,0x37,0x40,0xA4,
+0xA9,0x37,0x40,0xA0,
+0xA8,0x37,0x40,0xA0,
+0x00,0x38,0x4B,0xAC,
+0x04,0x38,0x4B,0xAC,
+0xC4,0x37,0x45,0xAC,
+0xC8,0x37,0x45,0xAC,
+0xD0,0x37,0x45,0xAC,
+0xD4,0x37,0x45,0xAC,
+0xF4,0x37,0x4F,0xAC,
+0xF8,0x37,0x4F,0xAC,
+0xE8,0x37,0x47,0xAC,
+0x10,0x38,0x46,0xAC,
+0x1C,0x38,0x59,0xAC,
+0x18,0x38,0x59,0xAC,
+0x04,0x00,0x4A,0xAD,
+0x9C,0x57,0x8A,0xAE,
+0x04,0x00,0x8C,0xAD,
+0xA4,0x57,0xC9,0xAE,
+0x04,0x00,0xAD,0xAD,
+0xAC,0x57,0xEC,0xAE,
+0xB4,0x57,0x0D,0xAF,
+0x04,0x00,0x29,0xAD,
+0x02,0x80,0x02,0x3C,
+0x00,0x1C,0x43,0x24,
+0x01,0x00,0x05,0x24,
+0x21,0x20,0x20,0x01,
+0x0F,0x00,0x06,0x24,
+0x21,0x10,0x80,0x00,
+0xFF,0xFF,0xC6,0x24,
+0x08,0x00,0x79,0xAC,
+0x00,0x00,0x63,0xAC,
+0x10,0x00,0x65,0xAC,
+0x00,0x00,0x69,0xAC,
+0x21,0x20,0x60,0x00,
+0x04,0x00,0x62,0xAC,
+0x00,0x00,0x43,0xAC,
+0x00,0x01,0x39,0x27,
+0xF5,0xFF,0xC1,0x04,
+0x18,0x00,0x63,0x24,
+0x02,0x80,0x02,0x3C,
+0xAC,0x57,0x48,0x24,
+0x02,0x80,0x03,0x3C,
+0x02,0x80,0x02,0x3C,
+0x04,0x00,0x07,0x8D,
+0x80,0x1D,0x4B,0x24,
+0x04,0x00,0x24,0xAD,
+0x00,0x1C,0x6A,0x24,
+0x02,0x00,0x09,0x24,
+0x21,0x28,0x00,0x00,
+0x0F,0x00,0x06,0x24,
+0x21,0x20,0xAB,0x00,
+0x21,0x10,0xAA,0x00,
+0xFF,0xFF,0xC6,0x24,
+0x88,0x01,0x59,0xAC,
+0x90,0x01,0x49,0xAC,
+0x18,0x00,0xA5,0x24,
+0x00,0x00,0x88,0xAC,
+0x04,0x00,0x87,0xAC,
+0x00,0x00,0xE4,0xAC,
+0x00,0x02,0x39,0x27,
+0xF5,0xFF,0xC1,0x04,
+0x21,0x38,0x80,0x00,
+0x02,0x80,0x02,0x3C,
+0xB4,0x57,0x49,0x24,
+0x02,0x80,0x03,0x3C,
+0x02,0x80,0x02,0x3C,
+0x04,0x00,0x27,0x8D,
+0x00,0x1F,0x4B,0x24,
+0x04,0x00,0x04,0xAD,
+0x00,0x1C,0x6A,0x24,
+0x03,0x00,0x08,0x24,
+0x21,0x28,0x00,0x00,
+0x01,0x00,0x06,0x24,
+0x21,0x20,0xAB,0x00,
+0x21,0x10,0xAA,0x00,
+0xFF,0xFF,0xC6,0x24,
+0x08,0x03,0x59,0xAC,
+0x10,0x03,0x48,0xAC,
+0x18,0x00,0xA5,0x24,
+0x00,0x00,0x89,0xAC,
+0x04,0x00,0x87,0xAC,
+0x00,0x00,0xE4,0xAC,
+0x00,0x08,0x39,0x27,
+0xF5,0xFF,0xC1,0x04,
+0x21,0x38,0x80,0x00,
+0x1C,0x00,0xB7,0x8F,
+0x18,0x00,0xB6,0x8F,
+0x14,0x00,0xB5,0x8F,
+0x10,0x00,0xB4,0x8F,
+0x0C,0x00,0xB3,0x8F,
+0x08,0x00,0xB2,0x8F,
+0x04,0x00,0xB1,0x8F,
+0x00,0x00,0xB0,0x8F,
+0x20,0x00,0xBD,0x27,
+0x08,0x00,0xE0,0x03,
+0x04,0x00,0x24,0xAD,
+0xD0,0xFF,0xBD,0x27,
+0x02,0x80,0x02,0x3C,
+0x20,0x00,0xB2,0xAF,
+0x02,0x80,0x03,0x3C,
+0x78,0xE8,0x52,0x24,
+0x02,0x80,0x02,0x3C,
+0x28,0x00,0xB4,0xAF,
+0x24,0x00,0xB3,0xAF,
+0x1C,0x00,0xB1,0xAF,
+0x18,0x00,0xB0,0xAF,
+0x2C,0x00,0xBF,0xAF,
+0x04,0xE8,0x73,0x24,
+0x30,0x1F,0x50,0x24,
+0x21,0x88,0x00,0x00,
+0x02,0x80,0x14,0x3C,
+0xDD,0x59,0x00,0x0C,
+0x21,0x20,0x20,0x02,
+0x1C,0x24,0x05,0x8E,
+0x6C,0x00,0x66,0x8E,
+0xE4,0xE7,0x82,0x26,
+0x6C,0x00,0x43,0x8E,
+0x1B,0x00,0x44,0x90,
+0xFF,0xF1,0x02,0x24,
+0x21,0x18,0x66,0x00,
+0x24,0x28,0xA2,0x00,
+0x00,0x21,0x04,0x00,
+0x42,0x18,0x03,0x00,
+0x00,0x02,0xA5,0x34,
+0xE8,0x23,0x03,0xAE,
+0x0C,0x24,0x04,0xAE,
+0x1C,0x24,0x05,0xAE,
+0x10,0x24,0x04,0xAE,
+0x21,0x30,0x00,0x00,
+0x21,0x10,0x06,0x02,
+0x01,0x00,0xC6,0x24,
+0x1D,0x00,0xC3,0x28,
+0x3D,0x24,0x40,0xA0,
+0x20,0x24,0x40,0xA0,
+0xFA,0xFF,0x60,0x14,
+0x5A,0x24,0x40,0xA0,
+0x01,0x00,0x31,0x26,
+0x20,0x00,0x22,0x2A,
+0x78,0x24,0x00,0xAE,
+0xE3,0xFF,0x40,0x14,
+0x94,0x00,0x10,0x26,
+0x02,0x80,0x02,0x3C,
+0x02,0x80,0x03,0x3C,
+0x30,0x1F,0x4B,0x24,
+0x02,0x80,0x02,0x3C,
+0x78,0xE8,0x6F,0x24,
+0x04,0xE8,0x4D,0x24,
+0x02,0x80,0x03,0x3C,
+0x02,0x80,0x02,0x3C,
+0xE4,0xE7,0x6E,0x24,
+0xC4,0xE7,0x4C,0x24,
+0x21,0x88,0x00,0x00,
+0x80,0x18,0x11,0x00,
+0x21,0x20,0x6D,0x00,
+0x21,0x10,0x6F,0x00,
+0x21,0x28,0x2E,0x02,
+0x21,0x30,0x2C,0x02,
+0x00,0x00,0x88,0x8C,
+0x00,0x00,0xA9,0x90,
+0x00,0x00,0xC7,0x90,
+0x00,0x00,0x4A,0x8C,
+0x21,0x10,0x2B,0x02,
+0x01,0x00,0x31,0x26,
+0x21,0x18,0x6B,0x00,
+0x1D,0x00,0x24,0x2A,
+0x60,0x05,0x68,0xAC,
+0x3E,0x05,0x47,0xA0,
+0xD4,0x05,0x6A,0xAC,
+0xEF,0xFF,0x80,0x14,
+0x04,0x05,0x49,0xA0,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x4A,0x24,
+0x02,0x80,0x03,0x3C,
+0x02,0x80,0x02,0x3C,
+0xA0,0xE6,0x6B,0x24,
+0x40,0xE5,0x4C,0x24,
+0x21,0x88,0x00,0x00,
+0x21,0x48,0x00,0x00,
+0x21,0x30,0x00,0x00,
+0x21,0x40,0x2A,0x01,
+0x21,0x38,0x2B,0x01,
+0x21,0x10,0xE6,0x00,
+0x91,0x00,0x44,0x90,
+0x00,0x00,0x45,0x90,
+0x21,0x18,0x06,0x01,
+0x01,0x00,0xC6,0x24,
+0x05,0x00,0xC2,0x28,
+0x39,0x04,0x64,0xA0,
+0xF8,0xFF,0x40,0x14,
+0xA8,0x03,0x65,0xA0,
+0x21,0x10,0x2C,0x02,
+0x1D,0x00,0x44,0x90,
+0x00,0x00,0x45,0x90,
+0x21,0x18,0x2A,0x02,
+0x01,0x00,0x31,0x26,
+0x1D,0x00,0x22,0x2A,
+0xE7,0x04,0x64,0xA0,
+0xCA,0x04,0x65,0xA0,
+0xEB,0xFF,0x40,0x14,
+0x05,0x00,0x29,0x25,
+0x52,0x00,0x02,0x24,
+0x10,0x00,0xA2,0xA3,
+0x41,0x00,0x03,0x24,
+0x4D,0x00,0x02,0x24,
+0x02,0x80,0x07,0x3C,
+0x64,0xF3,0xE7,0x24,
+0x11,0x00,0xA3,0xA3,
+0x12,0x00,0xA2,0xA3,
+0xE8,0x03,0x03,0x24,
+0x01,0x00,0x02,0x24,
+0x01,0x80,0x06,0x3C,
+0x10,0x00,0xA5,0x27,
+0x21,0x20,0xE0,0x00,
+0xDC,0x93,0xC6,0x24,
+0x0C,0x00,0xE3,0xAC,
+0x14,0x00,0xE2,0xA0,
+0xA2,0x23,0x00,0x0C,
+0x13,0x00,0xA0,0xA3,
+0x2C,0x00,0xBF,0x8F,
+0x28,0x00,0xB4,0x8F,
+0x24,0x00,0xB3,0x8F,
+0x20,0x00,0xB2,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x30,0x00,0xBD,0x27,
+0x90,0xFF,0xBD,0x27,
+0x48,0x00,0xB0,0xAF,
+0x25,0xB0,0x10,0x3C,
+0x6C,0x00,0xBF,0xAF,
+0x68,0x00,0xBE,0xAF,
+0x64,0x00,0xB7,0xAF,
+0x58,0x00,0xB4,0xAF,
+0x54,0x00,0xB3,0xAF,
+0x50,0x00,0xB2,0xAF,
+0x4C,0x00,0xB1,0xAF,
+0x60,0x00,0xB6,0xAF,
+0x5C,0x00,0xB5,0xAF,
+0xE0,0x0E,0x02,0x36,
+0x21,0x20,0x40,0x00,
+0x00,0x00,0x42,0x8C,
+0xDC,0x0E,0x12,0x36,
+0x70,0x0E,0x13,0x36,
+0x10,0x00,0xA2,0xAF,
+0x00,0x00,0x42,0x8E,
+0x78,0x0E,0x1E,0x36,
+0x7C,0x0E,0x14,0x36,
+0x14,0x00,0xA2,0xAF,
+0x00,0x00,0x63,0x8E,
+0x25,0xB0,0x02,0x3C,
+0x74,0x0E,0x42,0x34,
+0x18,0x00,0xA3,0xAF,
+0x00,0x00,0x42,0x8C,
+0xD4,0x0E,0x10,0x36,
+0xED,0x3F,0x11,0x3C,
+0x1C,0x00,0xA2,0xAF,
+0x00,0x00,0xC3,0x8F,
+0xFB,0x92,0x25,0x36,
+0x25,0xB0,0x17,0x3C,
+0x20,0x00,0xA3,0xAF,
+0x00,0x00,0x82,0x8E,
+0x25,0xB0,0x03,0x3C,
+0x80,0x0E,0x63,0x34,
+0x24,0x00,0xA2,0xAF,
+0x00,0x00,0x63,0x8C,
+0x25,0xB0,0x02,0x3C,
+0x84,0x0E,0x42,0x34,
+0x28,0x00,0xA3,0xAF,
+0x00,0x00,0x42,0x8C,
+0x25,0xB0,0x03,0x3C,
+0x88,0x0E,0x63,0x34,
+0x2C,0x00,0xA2,0xAF,
+0x00,0x00,0x63,0x8C,
+0x25,0xB0,0x02,0x3C,
+0x8C,0x0E,0x42,0x34,
+0x30,0x00,0xA3,0xAF,
+0x00,0x00,0x42,0x8C,
+0x25,0xB0,0x03,0x3C,
+0xD0,0x0E,0x63,0x34,
+0x34,0x00,0xA2,0xAF,
+0x00,0x00,0x63,0x8C,
+0x00,0x00,0x00,0x00,
+0x38,0x00,0xA3,0xAF,
+0x00,0x00,0x02,0x8E,
+0x25,0xB0,0x03,0x3C,
+0xD8,0x0E,0x63,0x34,
+0x3C,0x00,0xA2,0xAF,
+0x00,0x00,0x63,0x8C,
+0x02,0x5C,0x00,0x0C,
+0x40,0x00,0xA3,0xAF,
+0x21,0x20,0x40,0x02,
+0x02,0x5C,0x00,0x0C,
+0xFB,0x92,0x25,0x36,
+0x21,0x20,0x60,0x02,
+0x02,0x5C,0x00,0x0C,
+0xFB,0x92,0x25,0x36,
+0x02,0x80,0x05,0x3C,
+0xC0,0xED,0xA5,0x24,
+0x00,0x00,0xA4,0x8C,
+0xFB,0x92,0x25,0x36,
+0x02,0x5C,0x00,0x0C,
+0x00,0x01,0x13,0x3C,
+0xFB,0x92,0x25,0x36,
+0x02,0x5C,0x00,0x0C,
+0x21,0x20,0xC0,0x03,
+0xFB,0x92,0x25,0x36,
+0x02,0x5C,0x00,0x0C,
+0x21,0x20,0x80,0x02,
+0x02,0x80,0x02,0x3C,
+0xC4,0xED,0x42,0x24,
+0x00,0x00,0x44,0x8C,
+0xFB,0x92,0x25,0x36,
+0x02,0x5C,0x00,0x0C,
+0xA0,0x00,0x12,0x3C,
+0x02,0x80,0x03,0x3C,
+0xC8,0xED,0x63,0x24,
+0x00,0x00,0x64,0x8C,
+0x02,0x5C,0x00,0x0C,
+0xFB,0x92,0x25,0x36,
+0x02,0x80,0x05,0x3C,
+0xCC,0xED,0xA5,0x24,
+0x00,0x00,0xA4,0x8C,
+0x02,0x5C,0x00,0x0C,
+0xFB,0x92,0x25,0x36,
+0x02,0x80,0x02,0x3C,
+0xD0,0xED,0x42,0x24,
+0x00,0x00,0x44,0x8C,
+0x02,0x5C,0x00,0x0C,
+0xFB,0x92,0x25,0x36,
+0x02,0x80,0x03,0x3C,
+0xD4,0xED,0x63,0x24,
+0x00,0x00,0x64,0x8C,
+0x02,0x5C,0x00,0x0C,
+0xFB,0x92,0x25,0x36,
+0x21,0x20,0x00,0x02,
+0x02,0x5C,0x00,0x0C,
+0xFB,0x92,0x25,0x36,
+0x02,0x80,0x05,0x3C,
+0xD8,0xED,0xA5,0x24,
+0x00,0x00,0xA4,0x8C,
+0xFB,0x92,0x25,0x36,
+0x02,0x5C,0x00,0x0C,
+0x21,0x80,0x00,0x00,
+0x14,0x02,0x11,0x3C,
+0x20,0x08,0xE4,0x36,
+0x02,0x5C,0x00,0x0C,
+0x00,0x01,0x65,0x36,
+0x28,0x08,0xE4,0x36,
+0x02,0x5C,0x00,0x0C,
+0x00,0x01,0x65,0x36,
+0x30,0x54,0x45,0x36,
+0x02,0x5C,0x00,0x0C,
+0x04,0x0C,0xE4,0x36,
+0x54,0x22,0x00,0x0C,
+0x05,0x00,0x04,0x24,
+0x08,0x00,0x05,0x3C,
+0xE4,0x00,0xA5,0x34,
+0x02,0x5C,0x00,0x0C,
+0x08,0x0C,0xE4,0x36,
+0x54,0x22,0x00,0x0C,
+0x05,0x00,0x04,0x24,
+0x80,0x80,0x05,0x3C,
+0x02,0x5C,0x00,0x0C,
+0x28,0x0E,0xE4,0x36,
+0x54,0x22,0x00,0x0C,
+0x05,0x00,0x04,0x24,
+0x02,0x01,0x25,0x36,
+0x02,0x5C,0x00,0x0C,
+0x40,0x0E,0xE4,0x36,
+0x54,0x22,0x00,0x0C,
+0x05,0x00,0x04,0x24,
+0x16,0x68,0x05,0x3C,
+0xC2,0x04,0xA5,0x34,
+0x02,0x5C,0x00,0x0C,
+0x44,0x0E,0xE4,0x36,
+0x54,0x22,0x00,0x0C,
+0x05,0x00,0x04,0x24,
+0xD1,0x28,0x05,0x24,
+0x02,0x5C,0x00,0x0C,
+0x4C,0x0E,0xE4,0x36,
+0x54,0x22,0x00,0x0C,
+0x05,0x00,0x04,0x24,
+0x02,0x01,0x25,0x36,
+0x02,0x5C,0x00,0x0C,
+0x60,0x0E,0xE4,0x36,
+0x54,0x22,0x00,0x0C,
+0x05,0x00,0x04,0x24,
+0x16,0x28,0x05,0x3C,
+0x05,0x0D,0xA5,0x34,
+0x02,0x5C,0x00,0x0C,
+0x64,0x0E,0xE4,0x36,
+0x54,0x22,0x00,0x0C,
+0x05,0x00,0x04,0x24,
+0x00,0xFB,0x05,0x3C,
+0x02,0x5C,0x00,0x0C,
+0x48,0x0E,0xE4,0x36,
+0x54,0x22,0x00,0x0C,
+0x05,0x00,0x04,0x24,
+0x00,0xF8,0x05,0x3C,
+0x02,0x5C,0x00,0x0C,
+0x48,0x0E,0xE4,0x36,
+0x54,0x22,0x00,0x0C,
+0x05,0x00,0x04,0x24,
+0x25,0x22,0x00,0x0C,
+0x02,0x00,0x04,0x24,
+0x00,0x02,0x05,0x3C,
+0xD1,0x28,0xA5,0x34,
+0x02,0x5C,0x00,0x0C,
+0x6C,0x0E,0xE4,0x36,
+0x54,0x22,0x00,0x0C,
+0x05,0x00,0x04,0x24,
+0x00,0xFB,0x05,0x3C,
+0x02,0x5C,0x00,0x0C,
+0x48,0x0E,0xE4,0x36,
+0x54,0x22,0x00,0x0C,
+0x05,0x00,0x04,0x24,
+0x00,0xF8,0x05,0x3C,
+0x02,0x5C,0x00,0x0C,
+0x48,0x0E,0xE4,0x36,
+0x25,0x22,0x00,0x0C,
+0x02,0x00,0x04,0x24,
+0x33,0x54,0x45,0x36,
+0x02,0x5C,0x00,0x0C,
+0x04,0x0C,0xE4,0x36,
+0x54,0x22,0x00,0x0C,
+0x05,0x00,0x04,0x24,
+0xE4,0x00,0x05,0x24,
+0x02,0x5C,0x00,0x0C,
+0x08,0x0C,0xE4,0x36,
+0x54,0x22,0x00,0x0C,
+0x05,0x00,0x04,0x24,
+0x28,0x0E,0xE4,0x36,
+0x02,0x5C,0x00,0x0C,
+0x21,0x28,0x00,0x00,
+0x20,0x08,0xE4,0x36,
+0x02,0x5C,0x00,0x0C,
+0x00,0x01,0x05,0x3C,
+0x28,0x08,0xE4,0x36,
+0x02,0x5C,0x00,0x0C,
+0x00,0x01,0x05,0x3C,
+0x25,0xB0,0x02,0x3C,
+0xAC,0x0E,0x42,0x34,
+0x00,0x00,0x5E,0x8C,
+0x00,0xD8,0x02,0x3C,
+0x24,0x10,0xC2,0x03,
+0x37,0x00,0x40,0x10,
+0x01,0x00,0x10,0x26,
+0x0A,0x00,0x02,0x2E,
+0x97,0xFF,0x40,0x14,
+0x00,0x00,0x00,0x00,
+0x10,0x00,0xA5,0x8F,
+0x25,0xB0,0x10,0x3C,
+0x02,0x5C,0x00,0x0C,
+0xE0,0x0E,0x04,0x36,
+0x14,0x00,0xA5,0x8F,
+0x02,0x5C,0x00,0x0C,
+0xDC,0x0E,0x04,0x36,
+0x18,0x00,0xA5,0x8F,
+0x02,0x5C,0x00,0x0C,
+0x70,0x0E,0x04,0x36,
+0x1C,0x00,0xA5,0x8F,
+0x02,0x5C,0x00,0x0C,
+0x74,0x0E,0x04,0x36,
+0x20,0x00,0xA5,0x8F,
+0x02,0x5C,0x00,0x0C,
+0x78,0x0E,0x04,0x36,
+0x24,0x00,0xA5,0x8F,
+0x02,0x5C,0x00,0x0C,
+0x7C,0x0E,0x04,0x36,
+0x28,0x00,0xA5,0x8F,
+0x02,0x5C,0x00,0x0C,
+0x80,0x0E,0x04,0x36,
+0x2C,0x00,0xA5,0x8F,
+0x02,0x5C,0x00,0x0C,
+0x84,0x0E,0x04,0x36,
+0x30,0x00,0xA5,0x8F,
+0x02,0x5C,0x00,0x0C,
+0x88,0x0E,0x04,0x36,
+0x34,0x00,0xA5,0x8F,
+0x02,0x5C,0x00,0x0C,
+0x8C,0x0E,0x04,0x36,
+0x38,0x00,0xA5,0x8F,
+0x02,0x5C,0x00,0x0C,
+0xD0,0x0E,0x04,0x36,
+0x3C,0x00,0xA5,0x8F,
+0x02,0x5C,0x00,0x0C,
+0xD4,0x0E,0x04,0x36,
+0x40,0x00,0xA5,0x8F,
+0x88,0x0E,0x04,0x36,
+0x6C,0x00,0xBF,0x8F,
+0x68,0x00,0xBE,0x8F,
+0x64,0x00,0xB7,0x8F,
+0x60,0x00,0xB6,0x8F,
+0x5C,0x00,0xB5,0x8F,
+0x58,0x00,0xB4,0x8F,
+0x54,0x00,0xB3,0x8F,
+0x50,0x00,0xB2,0x8F,
+0x4C,0x00,0xB1,0x8F,
+0x48,0x00,0xB0,0x8F,
+0x02,0x5C,0x00,0x08,
+0x70,0x00,0xBD,0x27,
+0x80,0x0C,0xF1,0x36,
+0x94,0x0E,0xE3,0x36,
+0x00,0x00,0x24,0x8E,
+0x00,0x00,0x62,0x8C,
+0xFF,0x03,0x03,0x3C,
+0xFF,0x03,0x95,0x30,
+0x24,0x10,0x43,0x00,
+0x02,0x14,0x02,0x00,
+0x18,0x00,0x55,0x00,
+0x02,0x80,0x10,0x3C,
+0x30,0x1F,0x10,0x26,
+0x0C,0x00,0x02,0x8E,
+0x00,0xFC,0x12,0x24,
+0x00,0x00,0x3E,0x8E,
+0x24,0x10,0x52,0x00,
+0x21,0x20,0x20,0x02,
+0x24,0x30,0xD2,0x03,
+0xFF,0xFF,0x13,0x3C,
+0xFF,0x03,0x73,0x36,
+0x12,0x18,0x00,0x00,
+0x02,0x1A,0x03,0x00,
+0xFF,0x03,0x63,0x30,
+0x25,0x10,0x43,0x00,
+0xFF,0x03,0x45,0x30,
+0x25,0x28,0xC5,0x00,
+0x02,0x5C,0x00,0x0C,
+0x0C,0x00,0x02,0xAE,
+0x54,0x22,0x00,0x0C,
+0x05,0x00,0x04,0x24,
+0x9C,0x0E,0xE3,0x36,
+0x00,0x00,0x62,0x8C,
+0xFF,0x03,0x03,0x3C,
+0x0C,0x00,0x06,0x8E,
+0x24,0x10,0x43,0x00,
+0x02,0xB4,0x02,0x00,
+0x18,0x00,0xD5,0x02,
+0xF0,0xFF,0x02,0x3C,
+0xFF,0x03,0x42,0x34,
+0x24,0x30,0xC2,0x00,
+0x00,0x00,0x3E,0x8E,
+0xC0,0xFF,0x04,0x3C,
+0xFF,0xFF,0x84,0x34,
+0x24,0x10,0xC4,0x03,
+0x21,0x20,0x20,0x02,
+0xFF,0x0F,0x11,0x3C,
+0xFF,0xFF,0x31,0x36,
+0x12,0x18,0x00,0x00,
+0x02,0x1A,0x03,0x00,
+0xFF,0x03,0x63,0x30,
+0x80,0x1A,0x03,0x00,
+0x25,0x30,0xC3,0x00,
+0x82,0x2A,0x06,0x00,
+0x3F,0x00,0xA5,0x30,
+0x00,0x2C,0x05,0x00,
+0x0C,0x00,0x06,0xAE,
+0x02,0x5C,0x00,0x0C,
+0x25,0x28,0x45,0x00,
+0x94,0x0C,0xE4,0x36,
+0x00,0x00,0x9E,0x8C,
+0x82,0x29,0x16,0x00,
+0x00,0x2F,0x05,0x00,
+0x24,0x10,0xD1,0x03,
+0x02,0x5C,0x00,0x0C,
+0x25,0x28,0x45,0x00,
+0x54,0x22,0x00,0x0C,
+0x05,0x00,0x04,0x24,
+0x25,0xB0,0x05,0x3C,
+0xA4,0x0E,0xE3,0x36,
+0x14,0x0C,0xA5,0x34,
+0x00,0x00,0xBE,0x8C,
+0x00,0x00,0x62,0x8C,
+0xFF,0x03,0x05,0x3C,
+0x02,0x80,0x03,0x3C,
+0xDC,0xED,0x63,0x24,
+0x24,0x10,0x45,0x00,
+0x00,0x00,0x64,0x8C,
+0x02,0x14,0x02,0x00,
+0x24,0x18,0xD2,0x03,
+0x25,0xF0,0x62,0x00,
+0x02,0x5C,0x00,0x0C,
+0x21,0x28,0xC0,0x03,
+0x25,0xB0,0x02,0x3C,
+0xAC,0x0E,0x42,0x34,
+0x00,0x00,0x45,0x8C,
+0x3F,0x00,0x03,0x3C,
+0x24,0x10,0xD3,0x03,
+0x24,0x28,0xA3,0x00,
+0x82,0x29,0x05,0x00,
+0x25,0x28,0x45,0x00,
+0x02,0x80,0x02,0x3C,
+0xDC,0xED,0x42,0x24,
+0x00,0x00,0x44,0x8C,
+0x02,0x5C,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0x54,0x22,0x00,0x0C,
+0x05,0x00,0x04,0x24,
+0x25,0xB0,0x05,0x3C,
+0xB4,0x0E,0xE3,0x36,
+0x88,0x0C,0xA5,0x34,
+0x00,0x00,0xA4,0x8C,
+0x00,0x00,0x62,0x8C,
+0xFF,0x03,0x03,0x3C,
+0xFF,0x03,0x95,0x30,
+0x24,0x10,0x43,0x00,
+0x02,0x14,0x02,0x00,
+0x18,0x00,0x55,0x00,
+0x0C,0x00,0x06,0x8E,
+0x00,0x00,0xBE,0x8C,
+0x02,0x80,0x02,0x3C,
+0x24,0x30,0xD2,0x00,
+0xE0,0xED,0x42,0x24,
+0x00,0x00,0x44,0x8C,
+0x24,0x10,0xD2,0x03,
+0x12,0x18,0x00,0x00,
+0x02,0x1A,0x03,0x00,
+0xFF,0x03,0x63,0x30,
+0x25,0x30,0xC3,0x00,
+0xFF,0x03,0xC5,0x30,
+0x25,0x28,0x45,0x00,
+0x02,0x5C,0x00,0x0C,
+0x0C,0x00,0x06,0xAE,
+0x54,0x22,0x00,0x0C,
+0x05,0x00,0x04,0x24,
+0xBC,0x0E,0xE2,0x36,
+0x00,0x00,0x43,0x8C,
+0xFF,0x03,0x05,0x3C,
+0x0C,0x00,0x06,0x8E,
+0x24,0x18,0x65,0x00,
+0x02,0xB4,0x03,0x00,
+0x18,0x00,0xD5,0x02,
+0x25,0xB0,0x04,0x3C,
+0x88,0x0C,0x84,0x34,
+0xF0,0xFF,0x03,0x3C,
+0x00,0x00,0x9E,0x8C,
+0xFF,0x03,0x63,0x34,
+0x24,0x30,0xC3,0x00,
+0xC0,0xFF,0x04,0x3C,
+0x02,0x80,0x05,0x3C,
+0xFF,0xFF,0x84,0x34,
+0xE0,0xED,0xA5,0x24,
+0x24,0xF0,0xC4,0x03,
+0x00,0x00,0xA4,0x8C,
+0x44,0x00,0xBE,0xAF,
+0x12,0x10,0x00,0x00,
+0x02,0x12,0x02,0x00,
+0xFF,0x03,0x42,0x30,
+0x80,0x12,0x02,0x00,
+0x25,0x30,0xC2,0x00,
+0x82,0x2A,0x06,0x00,
+0x3F,0x00,0xA5,0x30,
+0x00,0x2C,0x05,0x00,
+0x0C,0x00,0x06,0xAE,
+0x02,0x5C,0x00,0x0C,
+0x25,0x28,0xC5,0x03,
+0x9C,0x0C,0xE4,0x36,
+0x00,0x00,0x9E,0x8C,
+0x82,0x29,0x16,0x00,
+0x00,0x2F,0x05,0x00,
+0x24,0x88,0xD1,0x03,
+0x02,0x5C,0x00,0x0C,
+0x25,0x28,0x25,0x02,
+0x54,0x22,0x00,0x0C,
+0x05,0x00,0x04,0x24,
+0x25,0xB0,0x02,0x3C,
+0xC4,0x0E,0xE3,0x36,
+0x1C,0x0C,0x42,0x34,
+0x00,0x00,0x5E,0x8C,
+0x00,0x00,0x62,0x8C,
+0xFF,0x03,0x05,0x3C,
+0x02,0x80,0x03,0x3C,
+0xE4,0xED,0x63,0x24,
+0x24,0x10,0x45,0x00,
+0x00,0x00,0x64,0x8C,
+0x02,0x14,0x02,0x00,
+0x24,0x90,0xD2,0x03,
+0x25,0xF0,0x42,0x02,
+0x02,0x5C,0x00,0x0C,
+0x21,0x28,0xC0,0x03,
+0xCC,0x0E,0xE2,0x36,
+0x00,0x00,0x45,0x8C,
+0x02,0x80,0x02,0x3C,
+0xE4,0xED,0x42,0x24,
+0x3F,0x00,0x03,0x3C,
+0x00,0x00,0x44,0x8C,
+0x24,0x28,0xA3,0x00,
+0x24,0x98,0xD3,0x03,
+0x82,0x29,0x05,0x00,
+0x02,0x5C,0x00,0x0C,
+0x25,0x28,0x65,0x02,
+0x54,0x22,0x00,0x0C,
+0x05,0x00,0x04,0x24,
+0x5C,0x6D,0x00,0x08,
+0x00,0x00,0x00,0x00,
+0xE0,0xFF,0xBD,0x27,
+0x02,0x80,0x02,0x3C,
+0x42,0x00,0x03,0x24,
+0x10,0x00,0xA3,0xA3,
+0xF1,0x3A,0x40,0xA0,
+0x4E,0x00,0x03,0x24,
+0x43,0x00,0x02,0x24,
+0x02,0x80,0x07,0x3C,
+0x9C,0xF3,0xE7,0x24,
+0x11,0x00,0xA2,0xA3,
+0x12,0x00,0xA3,0xA3,
+0xD0,0x07,0x02,0x24,
+0x01,0x00,0x03,0x24,
+0x01,0x80,0x06,0x3C,
+0x10,0x00,0xA5,0x27,
+0x21,0x20,0xE0,0x00,
+0xDC,0xAC,0xC6,0x24,
+0x0C,0x00,0xE2,0xAC,
+0x14,0x00,0xE3,0xA0,
+0x18,0x00,0xBF,0xAF,
+0xA2,0x23,0x00,0x0C,
+0x13,0x00,0xA0,0xA3,
+0x18,0x00,0xBF,0x8F,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x02,0x80,0x02,0x3C,
+0x48,0xFD,0xBD,0x27,
+0xE8,0xED,0x46,0x24,
+0x02,0x80,0x03,0x3C,
+0xB0,0x02,0xB2,0xAF,
+0xAC,0x02,0xB1,0xAF,
+0xA8,0x02,0xB0,0xAF,
+0x33,0x1F,0x60,0xA0,
+0x21,0x38,0xA0,0x03,
+0x90,0x00,0xC8,0x24,
+0x00,0x00,0xC2,0x8C,
+0x04,0x00,0xC3,0x8C,
+0x08,0x00,0xC4,0x8C,
+0x0C,0x00,0xC5,0x8C,
+0x10,0x00,0xC6,0x24,
+0x00,0x00,0xE2,0xAC,
+0x04,0x00,0xE3,0xAC,
+0x08,0x00,0xE4,0xAC,
+0x0C,0x00,0xE5,0xAC,
+0xF6,0xFF,0xC8,0x14,
+0x10,0x00,0xE7,0x24,
+0x00,0x00,0xC3,0x8C,
+0x02,0x80,0x02,0x3C,
+0x7C,0xEE,0x58,0x24,
+0x00,0x00,0xE3,0xAC,
+0x98,0x00,0xB9,0x27,
+0x00,0x01,0x12,0x27,
+0x01,0x00,0x02,0x93,
+0x05,0x00,0x03,0x93,
+0x09,0x00,0x04,0x93,
+0x0D,0x00,0x05,0x93,
+0x00,0x00,0x11,0x93,
+0x02,0x00,0x0D,0x93,
+0x04,0x00,0x10,0x93,
+0x06,0x00,0x0C,0x93,
+0x08,0x00,0x0F,0x93,
+0x0A,0x00,0x07,0x93,
+0x0C,0x00,0x0E,0x93,
+0x0E,0x00,0x06,0x93,
+0x03,0x00,0x08,0x93,
+0x07,0x00,0x09,0x93,
+0x0B,0x00,0x0A,0x93,
+0x0F,0x00,0x0B,0x93,
+0x00,0x12,0x02,0x00,
+0x00,0x1A,0x03,0x00,
+0x00,0x22,0x04,0x00,
+0x00,0x2A,0x05,0x00,
+0x25,0x10,0x51,0x00,
+0x25,0x18,0x70,0x00,
+0x25,0x20,0x8F,0x00,
+0x25,0x28,0xAE,0x00,
+0x00,0x6C,0x0D,0x00,
+0x00,0x64,0x0C,0x00,
+0x00,0x3C,0x07,0x00,
+0x00,0x34,0x06,0x00,
+0x25,0x68,0xA2,0x01,
+0x25,0x60,0x83,0x01,
+0x25,0x38,0xE4,0x00,
+0x25,0x30,0xC5,0x00,
+0x00,0x46,0x08,0x00,
+0x00,0x4E,0x09,0x00,
+0x00,0x56,0x0A,0x00,
+0x00,0x5E,0x0B,0x00,
+0x25,0x40,0x0D,0x01,
+0x25,0x48,0x2C,0x01,
+0x25,0x50,0x47,0x01,
+0x25,0x58,0x66,0x01,
+0x10,0x00,0x18,0x27,
+0x00,0x00,0x28,0xAF,
+0x04,0x00,0x29,0xAF,
+0x08,0x00,0x2A,0xAF,
+0x0C,0x00,0x2B,0xAF,
+0xD2,0xFF,0x12,0x17,
+0x10,0x00,0x39,0x27,
+0x01,0x00,0x02,0x93,
+0x05,0x00,0x03,0x93,
+0x00,0x00,0x09,0x93,
+0x02,0x00,0x04,0x93,
+0x04,0x00,0x08,0x93,
+0x06,0x00,0x05,0x93,
+0x07,0x00,0x06,0x93,
+0x03,0x00,0x07,0x93,
+0x00,0x12,0x02,0x00,
+0x00,0x1A,0x03,0x00,
+0x25,0x10,0x49,0x00,
+0x25,0x18,0x68,0x00,
+0x00,0x24,0x04,0x00,
+0x00,0x2C,0x05,0x00,
+0x25,0x20,0x82,0x00,
+0x25,0x28,0xA3,0x00,
+0x00,0x3E,0x07,0x00,
+0x00,0x36,0x06,0x00,
+0x02,0x80,0x02,0x3C,
+0x25,0x38,0xE4,0x00,
+0x25,0x30,0xC5,0x00,
+0x84,0xEF,0x58,0x24,
+0x04,0x00,0x26,0xAF,
+0x00,0x00,0x27,0xAF,
+0x00,0x01,0x12,0x27,
+0xA0,0x01,0xB9,0x27,
+0x01,0x00,0x02,0x93,
+0x05,0x00,0x03,0x93,
+0x09,0x00,0x04,0x93,
+0x0D,0x00,0x05,0x93,
+0x00,0x00,0x11,0x93,
+0x02,0x00,0x0D,0x93,
+0x04,0x00,0x10,0x93,
+0x06,0x00,0x0C,0x93,
+0x08,0x00,0x0F,0x93,
+0x0A,0x00,0x07,0x93,
+0x0C,0x00,0x0E,0x93,
+0x0E,0x00,0x06,0x93,
+0x03,0x00,0x08,0x93,
+0x07,0x00,0x09,0x93,
+0x0B,0x00,0x0A,0x93,
+0x0F,0x00,0x0B,0x93,
+0x00,0x12,0x02,0x00,
+0x00,0x1A,0x03,0x00,
+0x00,0x22,0x04,0x00,
+0x00,0x2A,0x05,0x00,
+0x25,0x10,0x51,0x00,
+0x25,0x18,0x70,0x00,
+0x25,0x20,0x8F,0x00,
+0x25,0x28,0xAE,0x00,
+0x00,0x6C,0x0D,0x00,
+0x00,0x64,0x0C,0x00,
+0x00,0x3C,0x07,0x00,
+0x00,0x34,0x06,0x00,
+0x25,0x68,0xA2,0x01,
+0x25,0x60,0x83,0x01,
+0x25,0x38,0xE4,0x00,
+0x25,0x30,0xC5,0x00,
+0x00,0x46,0x08,0x00,
+0x00,0x4E,0x09,0x00,
+0x00,0x56,0x0A,0x00,
+0x00,0x5E,0x0B,0x00,
+0x25,0x40,0x0D,0x01,
+0x25,0x48,0x2C,0x01,
+0x25,0x50,0x47,0x01,
+0x25,0x58,0x66,0x01,
+0x10,0x00,0x18,0x27,
+0x00,0x00,0x28,0xAF,
+0x04,0x00,0x29,0xAF,
+0x08,0x00,0x2A,0xAF,
+0x0C,0x00,0x2B,0xAF,
+0xD2,0xFF,0x12,0x17,
+0x10,0x00,0x39,0x27,
+0x01,0x00,0x02,0x93,
+0x05,0x00,0x03,0x93,
+0x00,0x00,0x09,0x93,
+0x02,0x00,0x04,0x93,
+0x04,0x00,0x08,0x93,
+0x06,0x00,0x05,0x93,
+0x07,0x00,0x06,0x93,
+0x03,0x00,0x07,0x93,
+0x00,0x12,0x02,0x00,
+0x00,0x1A,0x03,0x00,
+0x25,0x10,0x49,0x00,
+0x25,0x18,0x68,0x00,
+0x00,0x24,0x04,0x00,
+0x00,0x2C,0x05,0x00,
+0x25,0x20,0x82,0x00,
+0x25,0x28,0xA3,0x00,
+0x00,0x3E,0x07,0x00,
+0x00,0x36,0x06,0x00,
+0x25,0x30,0xC5,0x00,
+0x25,0x38,0xE4,0x00,
+0x02,0x80,0x02,0x3C,
+0x04,0x00,0x26,0xAF,
+0x00,0x00,0x27,0xAF,
+0x30,0x1F,0x46,0x24,
+0x21,0x50,0x00,0x00,
+0x80,0x20,0x0A,0x00,
+0x21,0x10,0x9D,0x00,
+0x00,0x00,0x45,0x8C,
+0x01,0x00,0x43,0x25,
+0xFF,0x00,0x6A,0x30,
+0x21,0x20,0x86,0x00,
+0x25,0x00,0x42,0x2D,
+0xF8,0xFF,0x40,0x14,
+0x18,0x00,0x85,0xAC,
+0x02,0x80,0x02,0x3C,
+0x30,0x1F,0x4B,0x24,
+0x21,0x50,0x00,0x00,
+0xC0,0x10,0x0A,0x00,
+0x21,0x48,0x5D,0x00,
+0x21,0x38,0x00,0x00,
+0x21,0x40,0x4B,0x00,
+0x21,0x10,0x27,0x01,
+0xA0,0x01,0x46,0x90,
+0x98,0x00,0x45,0x90,
+0x01,0x00,0xE4,0x24,
+0x21,0x18,0x07,0x01,
+0xFF,0x00,0x87,0x30,
+0x08,0x00,0xE2,0x2C,
+0xB4,0x01,0x66,0xA0,
+0xF7,0xFF,0x40,0x14,
+0xAC,0x00,0x65,0xA0,
+0x01,0x00,0x42,0x25,
+0xFF,0x00,0x4A,0x30,
+0x21,0x00,0x43,0x2D,
+0xEF,0xFF,0x60,0x14,
+0xC0,0x10,0x0A,0x00,
+0x08,0x00,0x64,0x8D,
+0xFF,0x7F,0x07,0x3C,
+0xFF,0xFF,0xE7,0x34,
+0xC0,0xFF,0x02,0x24,
+0x24,0x20,0x87,0x00,
+0x24,0x20,0x82,0x00,
+0x0C,0x00,0x84,0x34,
+0xFF,0xC0,0x02,0x24,
+0x24,0x20,0x82,0x00,
+0xC0,0xFF,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x00,0x18,0x84,0x34,
+0xBF,0xFF,0x03,0x3C,
+0x24,0x20,0x82,0x00,
+0xFF,0xFF,0x63,0x34,
+0x7F,0xFF,0x02,0x3C,
+0x24,0x20,0x83,0x00,
+0xFF,0xFF,0x42,0x34,
+0x24,0x20,0x82,0x00,
+0x0C,0x00,0x65,0x8D,
+0x7F,0xFF,0x03,0x24,
+0x40,0x40,0x84,0x34,
+0xFF,0xFF,0x02,0x3C,
+0x24,0x20,0x83,0x00,
+0xFF,0x7F,0x42,0x34,
+0xFF,0xBF,0x03,0x3C,
+0x10,0x00,0x66,0x8D,
+0x24,0x20,0x82,0x00,
+0xFF,0xFF,0x63,0x34,
+0xFF,0x9F,0x02,0x3C,
+0x24,0x28,0xA3,0x00,
+0xFF,0xFF,0x42,0x34,
+0xFF,0x3F,0x03,0x3C,
+0x24,0x20,0x82,0x00,
+0xFF,0xFF,0x63,0x34,
+0x12,0x00,0x02,0x24,
+0xB0,0x02,0xB2,0x8F,
+0xAC,0x02,0xB1,0x8F,
+0xA8,0x02,0xB0,0x8F,
+0x24,0x30,0xC3,0x00,
+0xC7,0x02,0x62,0xA1,
+0x1F,0x00,0x03,0x24,
+0x01,0x00,0x02,0x24,
+0x24,0x28,0xA7,0x00,
+0xBE,0x02,0x63,0xA1,
+0xC0,0x02,0x62,0xA1,
+0xFF,0x00,0x03,0x24,
+0xFF,0xFF,0x02,0x24,
+0xB8,0x02,0xBD,0x27,
+0x08,0x00,0x64,0xAD,
+0x10,0x00,0x66,0xAD,
+0x0C,0x00,0x65,0xAD,
+0xC2,0x02,0x62,0xA1,
+0xC4,0x02,0x63,0xA5,
+0xBF,0x02,0x60,0xA1,
+0x08,0x00,0xE0,0x03,
+0xC6,0x02,0x60,0xA1,
+0x02,0x80,0x0B,0x3C,
+0x30,0x1F,0x67,0x25,
+0xE0,0xFF,0xBD,0x27,
+0xE6,0x02,0xE0,0xA0,
+0x18,0x00,0xBF,0xAF,
+0xE4,0x02,0xE8,0x8C,
+0xFF,0xCF,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x30,0x1F,0x69,0x8D,
+0x24,0x40,0x02,0x01,
+0xFF,0xBF,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0xF0,0xFF,0x03,0x24,
+0x24,0x40,0x02,0x01,
+0xFF,0x7F,0x02,0x3C,
+0x24,0x48,0x23,0x01,
+0xFF,0xFF,0x42,0x34,
+0xFF,0xF0,0x03,0x24,
+0x24,0x48,0x23,0x01,
+0x24,0x40,0x02,0x01,
+0x20,0x00,0x03,0x24,
+0x0A,0x00,0x02,0x24,
+0x30,0x1F,0x69,0xAD,
+0xD2,0x02,0xE2,0xA0,
+0xD7,0x02,0xE3,0xA0,
+0x20,0x00,0x02,0x24,
+0x00,0x01,0x03,0x24,
+0xC8,0x02,0xE2,0xA4,
+0xCA,0x02,0xE3,0xA4,
+0x00,0x02,0x02,0x24,
+0x49,0x00,0x03,0x24,
+0x02,0x80,0x0A,0x3C,
+0xE4,0x02,0xE8,0xAC,
+0x80,0xF3,0x4A,0x25,
+0xFF,0xFF,0x0D,0x34,
+0x3E,0x00,0x0E,0x24,
+0x1C,0x00,0x0F,0x24,
+0x01,0x00,0x0C,0x24,
+0x11,0x00,0xA3,0xA3,
+0xCC,0x02,0xE2,0xA4,
+0xD0,0x07,0x03,0x24,
+0x44,0x00,0x02,0x24,
+0x01,0x80,0x06,0x3C,
+0x10,0x00,0xA2,0xA3,
+0x10,0x00,0xA5,0x27,
+0x47,0x00,0x02,0x24,
+0x21,0x20,0x40,0x01,
+0x94,0xAD,0xC6,0x24,
+0x04,0x00,0xED,0xAC,
+0xD0,0x02,0xEE,0xA0,
+0xD1,0x02,0xEF,0xA0,
+0x02,0x00,0xEC,0xA0,
+0x0C,0x00,0x43,0xAD,
+0x14,0x00,0x4C,0xA1,
+0x80,0x36,0xED,0xAC,
+0xCE,0x02,0xEE,0xA0,
+0xCF,0x02,0xEF,0xA0,
+0xD6,0x02,0xE0,0xA0,
+0xD4,0x02,0xE0,0xA0,
+0x12,0x00,0xA2,0xA3,
+0xA2,0x23,0x00,0x0C,
+0x13,0x00,0xA0,0xA3,
+0x18,0x00,0xBF,0x8F,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0xE0,0xFF,0xBD,0x27,
+0x02,0x80,0x02,0x3C,
+0x50,0x00,0x03,0x24,
+0x10,0x00,0xA3,0xA3,
+0x16,0x3D,0x40,0xA0,
+0x41,0x00,0x03,0x24,
+0x52,0x00,0x02,0x24,
+0x02,0x80,0x07,0x3C,
+0x0C,0xF4,0xE7,0x24,
+0x11,0x00,0xA2,0xA3,
+0x12,0x00,0xA3,0xA3,
+0xD0,0x07,0x02,0x24,
+0x01,0x00,0x03,0x24,
+0x02,0x80,0x06,0x3C,
+0x10,0x00,0xA5,0x27,
+0x21,0x20,0xE0,0x00,
+0x2C,0x80,0xC6,0x24,
+0x0C,0x00,0xE2,0xAC,
+0x14,0x00,0xE3,0xA0,
+0x18,0x00,0xBF,0xAF,
+0xA2,0x23,0x00,0x0C,
+0x13,0x00,0xA0,0xA3,
+0x18,0x00,0xBF,0x8F,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0x02,0x80,0x09,0x3C,
+0x30,0x1F,0x23,0x8D,
+0xFF,0xFF,0x02,0x24,
+0xFF,0x00,0x4B,0x30,
+0x0F,0xFF,0x02,0x24,
+0x24,0x18,0x62,0x00,
+0xFF,0xFF,0x02,0x3C,
+0xFF,0x0F,0x42,0x34,
+0x24,0x18,0x62,0x00,
+0xD8,0xFF,0xBD,0x27,
+0x30,0x1F,0x23,0xAD,
+0x47,0x00,0x02,0x24,
+0x3B,0x00,0x03,0x24,
+0x02,0x80,0x08,0x3C,
+0x28,0xF4,0x08,0x25,
+0x18,0x00,0xB0,0xAF,
+0x10,0x00,0xA2,0xA3,
+0x30,0x1F,0x30,0x25,
+0x11,0x00,0xA3,0xA3,
+0xD0,0x07,0x02,0x24,
+0x01,0x00,0x03,0x24,
+0x01,0x00,0x07,0x3C,
+0x01,0x80,0x06,0x3C,
+0x04,0x03,0x0B,0xAE,
+0x1C,0x00,0xB1,0xAF,
+0x56,0x30,0xEA,0x34,
+0x43,0x00,0x11,0x24,
+0xF4,0x98,0xE7,0x34,
+0x10,0x00,0xA5,0x27,
+0x0C,0x00,0x02,0xAD,
+0x14,0x00,0x03,0xA1,
+0x21,0x20,0x00,0x01,
+0x1C,0xB9,0xC6,0x24,
+0x20,0x00,0xBF,0xAF,
+0x12,0x00,0xB1,0xA3,
+0x0C,0x03,0x07,0xAE,
+0x10,0x03,0x0A,0xAE,
+0x13,0x00,0xA0,0xA3,
+0x08,0x03,0x00,0xAE,
+0x14,0x03,0x00,0xAE,
+0xA2,0x23,0x00,0x0C,
+0x18,0x03,0x00,0xAE,
+0x1E,0x00,0x02,0x24,
+0x21,0x03,0x02,0xA2,
+0x4A,0x00,0x03,0x24,
+0x45,0x00,0x02,0x24,
+0x1C,0x03,0x03,0xA2,
+0x1D,0x03,0x02,0xA2,
+0x23,0x00,0x03,0x24,
+0x3E,0x00,0x02,0x24,
+0x1E,0x03,0x11,0xA2,
+0x1F,0x03,0x02,0xA2,
+0x20,0x03,0x03,0xA2,
+0x20,0x00,0xBF,0x8F,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0xE0,0xFF,0xBD,0x27,
+0x3B,0x00,0x02,0x24,
+0x43,0x00,0x03,0x24,
+0x10,0x00,0xA2,0xA3,
+0x11,0x00,0xA3,0xA3,
+0x36,0x00,0x02,0x24,
+0x02,0x80,0x03,0x3C,
+0x02,0x80,0x07,0x3C,
+0x44,0xF4,0xE7,0x24,
+0x12,0x00,0xA2,0xA3,
+0x03,0x22,0x60,0xA0,
+0xD0,0x07,0x02,0x24,
+0x01,0x00,0x03,0x24,
+0x01,0x80,0x06,0x3C,
+0x10,0x00,0xA5,0x27,
+0x21,0x20,0xE0,0x00,
+0x50,0xBD,0xC6,0x24,
+0x0C,0x00,0xE2,0xAC,
+0x14,0x00,0xE3,0xA0,
+0x18,0x00,0xBF,0xAF,
+0xA2,0x23,0x00,0x0C,
+0x13,0x00,0xA0,0xA3,
+0x18,0x00,0xBF,0x8F,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0xE0,0xFF,0xBD,0x27,
+0x02,0x80,0x02,0x3C,
+0x52,0x00,0x03,0x24,
+0x10,0x00,0xA3,0xA3,
+0xB8,0x55,0x40,0xA4,
+0x54,0x00,0x03,0x24,
+0x53,0x00,0x02,0x24,
+0x02,0x80,0x07,0x3C,
+0x7C,0xF4,0xE7,0x24,
+0x11,0x00,0xA2,0xA3,
+0x12,0x00,0xA3,0xA3,
+0xF4,0x01,0x02,0x24,
+0x01,0x00,0x03,0x24,
+0x02,0x80,0x06,0x3C,
+0x10,0x00,0xA5,0x27,
+0x21,0x20,0xE0,0x00,
+0x70,0x81,0xC6,0x24,
+0x0C,0x00,0xE2,0xAC,
+0x14,0x00,0xE3,0xA0,
+0x18,0x00,0xBF,0xAF,
+0xA2,0x23,0x00,0x0C,
+0x13,0x00,0xA0,0xA3,
+0x18,0x00,0xBF,0x8F,
+0x00,0x00,0x00,0x00,
+0x08,0x00,0xE0,0x03,
+0x20,0x00,0xBD,0x27,
+0xD8,0xFF,0xBD,0x27,
+0x02,0x80,0x03,0x3C,
+0x20,0x00,0xBF,0xAF,
+0x1C,0x00,0xB1,0xAF,
+0x18,0x00,0xB0,0xAF,
+0x58,0xE9,0x62,0x24,
+0x58,0xE9,0x67,0x94,
+0x02,0x00,0x48,0x90,
+0x02,0x80,0x02,0x3C,
+0xD8,0x5E,0x42,0x24,
+0x02,0x00,0x11,0x24,
+0x01,0x80,0x06,0x3C,
+0x21,0x20,0x40,0x00,
+0x14,0x00,0x51,0xA0,
+0x10,0x00,0xA5,0x27,
+0x6C,0xCE,0xC6,0x24,
+0x02,0x80,0x10,0x3C,
+0x10,0x00,0xA7,0xA7,
+0x28,0x5F,0x10,0x26,
+0x12,0x00,0xA8,0xA3,
+0xA2,0x23,0x00,0x0C,
+0x13,0x00,0xA0,0xA3,
+0x02,0x80,0x06,0x3C,
+0x21,0x20,0x00,0x02,
+0x10,0x00,0xA5,0x27,
+0x14,0x00,0x11,0xA2,
+0xA2,0x23,0x00,0x0C,
+0x7C,0x82,0xC6,0x24,
+0x02,0x80,0x03,0x3C,
+0xDE,0x5D,0x62,0x90,
+0x02,0x00,0x07,0x24,
+0x0C,0x00,0x04,0x24,
+0x02,0x00,0x42,0x30,
+0x01,0x00,0x42,0x2C,
+0x23,0x38,0xE2,0x00,
+0xE8,0x03,0x02,0x24,
+0x0C,0x00,0x02,0xAE,
+0x02,0x80,0x03,0x3C,
+0x02,0x80,0x02,0x3C,
+0xF4,0x5E,0x60,0xA0,
+0xF5,0x5E,0x44,0xA0,
+0x02,0x80,0x03,0x3C,
+0x02,0x80,0x02,0x3C,
+0xF6,0x5E,0x64,0xA0,
+0x0D,0x5F,0x40,0xA0,
+0x02,0x80,0x03,0x3C,
+0x02,0x80,0x02,0x3C,
+0x13,0x5F,0x60,0xA0,
+0x01,0x00,0x06,0x24,
+0x14,0x5F,0x40,0xA0,
+0x02,0x80,0x03,0x3C,
+0x02,0x80,0x02,0x3C,
+0xF8,0x5E,0x66,0xA0,
+0x0F,0x00,0x04,0x24,
+0x15,0x5F,0x40,0xA0,
+0x02,0x80,0x03,0x3C,
+0x02,0x80,0x02,0x3C,
+0xF7,0x5E,0x66,0xA0,
+0xF9,0x5E,0x44,0xA0,
+0x02,0x80,0x03,0x3C,
+0x08,0x00,0x04,0x24,
+0x02,0x80,0x02,0x3C,
+0xFA,0x5E,0x60,0xA0,
+0x64,0x00,0x05,0x24,
+0x04,0x5F,0x44,0xA4,
+0x02,0x80,0x03,0x3C,
+0x01,0x00,0x02,0x3C,
+0xFC,0x5E,0x65,0xA4,
+0x00,0x90,0x42,0x34,
+0x02,0x80,0x03,0x3C,
+0x00,0x5F,0x62,0xAC,
+0x02,0x80,0x04,0x3C,
+0x02,0x80,0x02,0x3C,
+0x08,0x5F,0x80,0xAC,
+0x02,0x80,0x03,0x3C,
+0x0C,0x5F,0x40,0xA0,
+0x02,0x80,0x02,0x3C,
+0x0E,0x5F,0x60,0xA0,
+0x16,0x5F,0x40,0xA0,
+0x02,0x80,0x03,0x3C,
+0x02,0x80,0x02,0x3C,
+0x44,0x5F,0x67,0xA0,
+0x20,0x00,0xBF,0x8F,
+0x0F,0x5F,0x40,0xA0,
+0x02,0x80,0x03,0x3C,
+0x02,0x80,0x02,0x3C,
+0x1C,0x00,0xB1,0x8F,
+0x18,0x00,0xB0,0x8F,
+0x10,0x5F,0x66,0xA0,
+0x11,0x5F,0x46,0xA0,
+0x02,0x80,0x03,0x3C,
+0x02,0x80,0x02,0x3C,
+0x12,0x5F,0x60,0xA0,
+0x21,0x20,0x00,0x00,
+0x18,0x5F,0x40,0xAC,
+0x02,0x80,0x03,0x3C,
+0x02,0x80,0x02,0x3C,
+0x21,0x28,0x00,0x00,
+0x28,0x00,0xBD,0x27,
+0x1C,0x5F,0x60,0xAC,
+0x20,0x5F,0x44,0xAC,
+0x24,0x5F,0x45,0xAC,
+0x08,0x00,0xE0,0x03,
+0x00,0x00,0x00,0x00,
+0xD8,0xFF,0xBD,0x27,
+0x1C,0x00,0xB3,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x20,0x00,0xBF,0xAF,
+0x21,0x80,0x80,0x00,
+0x21,0x98,0xA0,0x00,
+0x21,0x88,0xC0,0x00,
+0x21,0x90,0x00,0x00,
+0x00,0x00,0x04,0x82,
+0x7C,0x55,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xFC,0xFF,0x40,0x14,
+0x01,0x00,0x10,0x26,
+0xFF,0xFF,0x10,0x26,
+0x00,0x00,0x04,0x92,
+0x2B,0x00,0x02,0x24,
+0x00,0x1E,0x04,0x00,
+0x03,0x1E,0x03,0x00,
+0x41,0x00,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0x10,0x00,0x02,0x24,
+0x30,0x00,0x22,0x12,
+0x00,0x1E,0x04,0x00,
+0x07,0x00,0x20,0x16,
+0x21,0x18,0x80,0x00,
+0x00,0x1E,0x04,0x00,
+0x03,0x1E,0x03,0x00,
+0x30,0x00,0x02,0x24,
+0x3B,0x00,0x62,0x10,
+0x0A,0x00,0x11,0x24,
+0x21,0x18,0x80,0x00,
+0x00,0x16,0x03,0x00,
+0x03,0x16,0x02,0x00,
+0x1A,0x00,0x40,0x10,
+0xFF,0x00,0x64,0x30,
+0xA9,0xFF,0x82,0x24,
+0x61,0x00,0x83,0x2C,
+0xFF,0x00,0x45,0x30,
+0x09,0x00,0x60,0x10,
+0x41,0x00,0x86,0x2C,
+0xC9,0xFF,0x82,0x24,
+0xFF,0x00,0x45,0x30,
+0x05,0x00,0xC0,0x10,
+0x3A,0x00,0x87,0x2C,
+0xD0,0xFF,0x82,0x24,
+0x02,0x00,0xE0,0x10,
+0xFF,0x00,0x05,0x24,
+0xFF,0x00,0x45,0x30,
+0x2A,0x10,0xB1,0x00,
+0x0A,0x00,0x40,0x10,
+0x18,0x00,0x51,0x02,
+0x01,0x00,0x10,0x26,
+0x12,0x10,0x00,0x00,
+0x2B,0x18,0x52,0x00,
+0x23,0x00,0x60,0x14,
+0x21,0x90,0xA2,0x00,
+0x00,0x00,0x03,0x92,
+0x00,0x00,0x00,0x00,
+0xE8,0xFF,0x60,0x14,
+0xFF,0x00,0x64,0x30,
+0x02,0x00,0x60,0x12,
+0x21,0x10,0x40,0x02,
+0x00,0x00,0x70,0xAE,
+0x20,0x00,0xBF,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0x03,0x1E,0x03,0x00,
+0x30,0x00,0x02,0x24,
+0xCE,0xFF,0x62,0x14,
+0x00,0x00,0x00,0x00,
+0x01,0x00,0x03,0x82,
+0x78,0x00,0x02,0x24,
+0x03,0x00,0x62,0x10,
+0x58,0x00,0x02,0x24,
+0xD0,0xFF,0x62,0x14,
+0x21,0x18,0x80,0x00,
+0x02,0x00,0x10,0x26,
+0x00,0x00,0x04,0x92,
+0xC0,0x70,0x00,0x08,
+0x10,0x00,0x11,0x24,
+0x01,0x00,0x10,0x26,
+0x00,0x00,0x04,0x92,
+0xB7,0x70,0x00,0x08,
+0x10,0x00,0x02,0x24,
+0xEC,0x70,0x00,0x08,
+0x08,0x00,0x11,0x24,
+0x20,0x00,0xBF,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0xFF,0xFF,0x02,0x24,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0x21,0x48,0x80,0x00,
+0x31,0x00,0xC0,0x14,
+0x21,0x50,0x00,0x00,
+0x00,0x00,0x87,0x90,
+0x30,0x00,0x02,0x24,
+0x00,0x1E,0x07,0x00,
+0x03,0x1E,0x03,0x00,
+0x2E,0x00,0x62,0x10,
+0x0A,0x00,0x06,0x24,
+0x02,0x80,0x02,0x3C,
+0x40,0xF2,0x4B,0x24,
+0xFF,0x00,0xE8,0x30,
+0x21,0x10,0x0B,0x01,
+0x00,0x00,0x44,0x90,
+0x00,0x1E,0x07,0x00,
+0x03,0x1E,0x03,0x00,
+0x44,0x00,0x82,0x30,
+0x02,0x00,0x87,0x30,
+0xD0,0xFF,0x63,0x24,
+0x1A,0x00,0x40,0x10,
+0x04,0x00,0x84,0x30,
+0x07,0x00,0x80,0x14,
+0x2B,0x10,0x66,0x00,
+0x21,0x10,0x00,0x01,
+0x02,0x00,0xE0,0x10,
+0xE0,0xFF,0x03,0x25,
+0xFF,0x00,0x62,0x30,
+0xC9,0xFF,0x43,0x24,
+0x2B,0x10,0x66,0x00,
+0x10,0x00,0x40,0x10,
+0x18,0x00,0x46,0x01,
+0x01,0x00,0x29,0x25,
+0x00,0x00,0x27,0x91,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0xE8,0x30,
+0x12,0x10,0x00,0x00,
+0x21,0x50,0x43,0x00,
+0x21,0x10,0x0B,0x01,
+0x00,0x00,0x44,0x90,
+0x00,0x1E,0x07,0x00,
+0x03,0x1E,0x03,0x00,
+0x44,0x00,0x82,0x30,
+0x02,0x00,0x87,0x30,
+0xD0,0xFF,0x63,0x24,
+0xE8,0xFF,0x40,0x14,
+0x04,0x00,0x84,0x30,
+0x02,0x00,0xA0,0x10,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0xA9,0xAC,
+0x08,0x00,0xE0,0x03,
+0x21,0x10,0x40,0x01,
+0x00,0x00,0x87,0x90,
+0x0E,0x71,0x00,0x08,
+0x02,0x80,0x02,0x3C,
+0x01,0x00,0x89,0x24,
+0x00,0x00,0x27,0x91,
+0x78,0x00,0x02,0x24,
+0x00,0x1E,0x07,0x00,
+0x03,0x1E,0x03,0x00,
+0xCD,0xFF,0x62,0x14,
+0x08,0x00,0x06,0x24,
+0x01,0x00,0x22,0x91,
+0x02,0x80,0x03,0x3C,
+0x40,0xF2,0x63,0x24,
+0x21,0x10,0x43,0x00,
+0x00,0x00,0x44,0x90,
+0x00,0x00,0x00,0x00,
+0x44,0x00,0x84,0x30,
+0xC5,0xFF,0x80,0x10,
+0x02,0x80,0x02,0x3C,
+0x01,0x00,0x29,0x25,
+0x00,0x00,0x27,0x91,
+0x0E,0x71,0x00,0x08,
+0x10,0x00,0x06,0x24,
+0xE8,0xFF,0xBD,0x27,
+0x10,0x00,0xBF,0xAF,
+0x00,0x00,0x83,0x80,
+0x2D,0x00,0x02,0x24,
+0x04,0x00,0x62,0x10,
+0x00,0x00,0x00,0x00,
+0x10,0x00,0xBF,0x8F,
+0x04,0x71,0x00,0x08,
+0x18,0x00,0xBD,0x27,
+0x04,0x71,0x00,0x0C,
+0x01,0x00,0x84,0x24,
+0x10,0x00,0xBF,0x8F,
+0x23,0x10,0x02,0x00,
+0x08,0x00,0xE0,0x03,
+0x18,0x00,0xBD,0x27,
+0xD8,0xFF,0xBD,0x27,
+0x1C,0x00,0xB3,0xAF,
+0x18,0x00,0xB2,0xAF,
+0x14,0x00,0xB1,0xAF,
+0x10,0x00,0xB0,0xAF,
+0x20,0x00,0xBF,0xAF,
+0x21,0x80,0x80,0x00,
+0x21,0x90,0xA0,0x00,
+0x21,0x98,0xC0,0x00,
+0x21,0x88,0x00,0x00,
+0x00,0x00,0x04,0x82,
+0x7C,0x55,0x00,0x0C,
+0x00,0x00,0x00,0x00,
+0xFC,0xFF,0x40,0x14,
+0x01,0x00,0x10,0x26,
+0xFF,0xFF,0x10,0x26,
+0x00,0x00,0x03,0x82,
+0x2D,0x00,0x02,0x24,
+0x0F,0x00,0x62,0x10,
+0x21,0x20,0x00,0x02,
+0x21,0x28,0x40,0x02,
+0xA0,0x70,0x00,0x0C,
+0x21,0x30,0x60,0x02,
+0x12,0x00,0x40,0x04,
+0x21,0x18,0x40,0x00,
+0x23,0x10,0x02,0x00,
+0x0A,0x10,0x71,0x00,
+0x20,0x00,0xBF,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0x01,0x00,0x10,0x26,
+0x21,0x20,0x00,0x02,
+0x21,0x28,0x40,0x02,
+0xA0,0x70,0x00,0x0C,
+0x21,0x30,0x60,0x02,
+0xFF,0xFF,0x11,0x24,
+0xF0,0xFF,0x41,0x04,
+0x21,0x18,0x40,0x00,
+0xF0,0xFF,0x20,0x16,
+0x00,0x80,0x02,0x3C,
+0x20,0x00,0xBF,0x8F,
+0x1C,0x00,0xB3,0x8F,
+0x18,0x00,0xB2,0x8F,
+0x14,0x00,0xB1,0x8F,
+0x10,0x00,0xB0,0x8F,
+0xFF,0x7F,0x02,0x3C,
+0xFF,0xFF,0x42,0x34,
+0x08,0x00,0xE0,0x03,
+0x28,0x00,0xBD,0x27,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x52,0x54,0x4C,0x38,
+0x37,0x31,0x32,0x20,
+0x46,0x57,0x20,0x76,
+0x65,0x72,0x73,0x69,
+0x6F,0x6E,0x20,0x30,
+0x2E,0x30,0x2E,0x31,
+0x23,0x20,0xE4,0xB8,
+0x89,0x20,0x31,0x30,
+0xE6,0x9C,0x88,0x20,
+0x32,0x38,0x20,0x31,
+0x37,0x3A,0x34,0x31,
+0x3A,0x34,0x37,0x20,
+0x43,0x53,0x54,0x20,
+0x32,0x30,0x30,0x39,
+0x0A,0x00,0x00,0x00,
+0x50,0xC6,0x01,0x80,
+0x48,0x43,0x49,0x20,
+0x74,0x79,0x70,0x65,
+0x3A,0x20,0x25,0x78,
+0x28,0x25,0x78,0x29,
+0x0A,0x00,0x00,0x00,
+0x72,0x66,0x5F,0x63,
+0x6F,0x66,0x69,0x67,
+0x3A,0x20,0x25,0x78,
+0x28,0x25,0x78,0x2C,
+0x20,0x25,0x78,0x2C,
+0x20,0x25,0x78,0x29,
+0x0A,0x00,0x00,0x00,
+0x6D,0x70,0x5F,0x6D,
+0x6F,0x64,0x65,0x3A,
+0x20,0x25,0x78,0x28,
+0x25,0x78,0x29,0x2C,
+0x20,0x49,0x51,0x4B,
+0x3A,0x20,0x25,0x78,
+0x0A,0x00,0x00,0x00,
+0x76,0x63,0x73,0x20,
+0x74,0x79,0x70,0x65,
+0x3A,0x20,0x25,0x78,
+0x28,0x25,0x78,0x29,
+0x0A,0x00,0x00,0x00,
+0x33,0x32,0x6B,0x20,
+0x63,0x61,0x6C,0x69,
+0x62,0x72,0x61,0x3A,
+0x20,0x25,0x64,0x2C,
+0x20,0x33,0x32,0x4B,
+0x20,0x54,0x53,0x46,
+0x3A,0x20,0x25,0x78,
+0x00,0x00,0x00,0x00,
+0x74,0x61,0x72,0x67,
+0x65,0x74,0x20,0x74,
+0x68,0x65,0x72,0x6D,
+0x61,0x6C,0x3A,0x20,
+0x25,0x78,0x0A,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x00,0x7F,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x01,0x7F,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x02,0x7E,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x03,0x7D,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x04,0x7C,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x05,0x7B,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x06,0x7A,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x07,0x79,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x08,0x78,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x09,0x77,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x0A,0x76,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x0B,0x75,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x0C,0x74,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x0D,0x73,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x0E,0x72,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x0F,0x71,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x10,0x70,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x11,0x6F,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x12,0x6F,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x13,0x6E,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x14,0x6D,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x15,0x6D,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x16,0x6C,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x17,0x6B,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x18,0x6A,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x19,0x6A,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x1A,0x69,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x1B,0x68,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x1C,0x67,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x1D,0x66,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x1E,0x65,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x1F,0x64,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x20,0x63,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x21,0x4C,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x22,0x4B,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x23,0x4A,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x24,0x49,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x25,0x48,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x26,0x47,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x27,0x46,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x28,0x45,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x29,0x44,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x2A,0x2C,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x2B,0x2B,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x2C,0x2A,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x2D,0x29,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x2E,0x28,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x2F,0x27,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x30,0x26,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x31,0x25,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x32,0x24,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x33,0x23,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x34,0x22,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x35,0x09,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x36,0x08,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x37,0x07,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x38,0x06,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x39,0x05,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x3A,0x04,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x3B,0x03,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x3C,0x02,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x3D,0x01,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x3E,0x00,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x3F,0x00,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x40,0x7F,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x41,0x7F,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x42,0x7E,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x43,0x7D,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x44,0x7C,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x45,0x7B,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x46,0x7A,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x47,0x79,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x48,0x78,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x49,0x77,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x4A,0x76,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x4B,0x75,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x4C,0x74,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x4D,0x73,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x4E,0x72,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x4F,0x71,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x50,0x70,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x51,0x6F,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x52,0x6F,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x53,0x6E,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x54,0x6D,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x55,0x6D,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x56,0x6C,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x57,0x6B,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x58,0x6A,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x59,0x6A,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x5A,0x69,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x5B,0x68,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x5C,0x67,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x5D,0x66,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x5E,0x65,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x5F,0x64,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x60,0x63,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x61,0x4C,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x62,0x4B,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x63,0x4A,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x64,0x49,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x65,0x48,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x66,0x47,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x67,0x46,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x68,0x45,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x69,0x44,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x6A,0x2C,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x6B,0x2B,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x6C,0x2A,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x6D,0x29,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x6E,0x28,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x6F,0x27,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x70,0x26,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x71,0x25,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x72,0x24,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x73,0x23,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x74,0x22,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x75,0x09,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x76,0x08,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x77,0x07,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x78,0x06,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x79,0x05,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x7A,0x04,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x7B,0x03,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x7C,0x02,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x7D,0x01,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x7E,0x00,
+0x78,0x0C,0x00,0x00,
+0x01,0x00,0x7F,0x00,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x00,0x30,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x01,0x30,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x02,0x30,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x03,0x30,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x04,0x30,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x05,0x34,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x06,0x38,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x07,0x3E,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x08,0x3E,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x09,0x44,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x0A,0x46,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x0B,0x48,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x0C,0x48,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x0D,0x4E,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x0E,0x56,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x0F,0x5A,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x10,0x5E,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x11,0x62,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x12,0x6C,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x13,0x72,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x14,0x72,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x15,0x72,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x16,0x72,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x17,0x72,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x18,0x72,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x19,0x72,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x1A,0x72,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x1B,0x72,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x1C,0x72,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x1D,0x72,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x1E,0x72,
+0x78,0x0C,0x00,0x00,
+0x1E,0x00,0x1F,0x72,
+0x00,0x0E,0x00,0x00,
+0xFF,0xFF,0xFF,0xFF,
+0x06,0x06,0x06,0x04,
+0x04,0x0E,0x00,0x00,
+0xFF,0xFF,0xFF,0xFF,
+0x04,0x02,0x02,0x00,
+0x08,0x0E,0x00,0x00,
+0x00,0xFF,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x10,0x0E,0x00,0x00,
+0xFF,0xFF,0xFF,0xFF,
+0x0A,0x08,0x08,0x04,
+0x14,0x0E,0x00,0x00,
+0xFF,0xFF,0xFF,0xFF,
+0x04,0x02,0x02,0x00,
+0x18,0x0E,0x00,0x00,
+0xFF,0xFF,0xFF,0xFF,
+0x0A,0x08,0x08,0x04,
+0x1C,0x0E,0x00,0x00,
+0xFF,0xFF,0xFF,0xFF,
+0x04,0x02,0x02,0x00,
+0x00,0x0E,0x00,0x00,
+0xFF,0xFF,0xFF,0xFF,
+0x00,0x00,0x00,0x00,
+0x04,0x0E,0x00,0x00,
+0xFF,0xFF,0xFF,0xFF,
+0x00,0x00,0x00,0x00,
+0x08,0x0E,0x00,0x00,
+0x00,0xFF,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x10,0x0E,0x00,0x00,
+0xFF,0xFF,0xFF,0xFF,
+0x00,0x00,0x00,0x00,
+0x14,0x0E,0x00,0x00,
+0xFF,0xFF,0xFF,0xFF,
+0x00,0x00,0x00,0x00,
+0x18,0x0E,0x00,0x00,
+0xFF,0xFF,0xFF,0xFF,
+0x00,0x00,0x00,0x00,
+0x1C,0x0E,0x00,0x00,
+0xFF,0xFF,0xFF,0xFF,
+0x00,0x00,0x00,0x00,
+0x00,0x0E,0x00,0x00,
+0xFF,0xFF,0xFF,0xFF,
+0x00,0x00,0x00,0x00,
+0x04,0x0E,0x00,0x00,
+0xFF,0xFF,0xFF,0xFF,
+0x00,0x00,0x00,0x00,
+0x08,0x0E,0x00,0x00,
+0x00,0xFF,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x10,0x0E,0x00,0x00,
+0xFF,0xFF,0xFF,0xFF,
+0x00,0x00,0x00,0x00,
+0x14,0x0E,0x00,0x00,
+0xFF,0xFF,0xFF,0xFF,
+0x00,0x00,0x00,0x00,
+0x18,0x0E,0x00,0x00,
+0xFF,0xFF,0xFF,0xFF,
+0x00,0x00,0x00,0x00,
+0x1C,0x0E,0x00,0x00,
+0xFF,0xFF,0xFF,0xFF,
+0x00,0x00,0x00,0x00,
+0x00,0x0E,0x00,0x00,
+0xFF,0xFF,0xFF,0xFF,
+0x00,0x00,0x00,0x00,
+0x04,0x0E,0x00,0x00,
+0xFF,0xFF,0xFF,0xFF,
+0x00,0x00,0x00,0x00,
+0x08,0x0E,0x00,0x00,
+0x00,0xFF,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x10,0x0E,0x00,0x00,
+0xFF,0xFF,0xFF,0xFF,
+0x00,0x00,0x00,0x00,
+0x14,0x0E,0x00,0x00,
+0xFF,0xFF,0xFF,0xFF,
+0x00,0x00,0x00,0x00,
+0x18,0x0E,0x00,0x00,
+0xFF,0xFF,0xFF,0xFF,
+0x00,0x00,0x00,0x00,
+0x1C,0x0E,0x00,0x00,
+0xFF,0xFF,0xFF,0xFF,
+0x00,0x00,0x00,0x00,
+0x04,0x08,0x00,0x00,
+0x0F,0x00,0x00,0x00,
+0x03,0x00,0x00,0x00,
+0x24,0x08,0x00,0x00,
+0x0F,0x00,0xF0,0x00,
+0x04,0x00,0x30,0x00,
+0x2C,0x08,0x00,0x00,
+0x0F,0x00,0xF0,0x00,
+0x04,0x00,0x30,0x00,
+0x70,0x08,0x00,0x00,
+0x00,0x00,0x00,0x04,
+0x01,0x00,0x00,0x00,
+0x64,0x08,0x00,0x00,
+0x00,0x04,0x00,0x00,
+0x01,0x00,0x00,0x00,
+0x78,0x08,0x00,0x00,
+0x0F,0x00,0x0F,0x00,
+0x02,0x00,0x02,0x00,
+0x74,0x0E,0x00,0x00,
+0x00,0x00,0x00,0x0F,
+0x06,0x00,0x00,0x00,
+0x78,0x0E,0x00,0x00,
+0x00,0x00,0x00,0x0F,
+0x06,0x00,0x00,0x00,
+0x7C,0x0E,0x00,0x00,
+0x00,0x00,0x00,0x0F,
+0x06,0x00,0x00,0x00,
+0x80,0x0E,0x00,0x00,
+0x00,0x00,0x00,0x0F,
+0x06,0x00,0x00,0x00,
+0x0C,0x09,0x00,0x00,
+0xFF,0x00,0x00,0x00,
+0x33,0x00,0x00,0x00,
+0x04,0x0C,0x00,0x00,
+0xFF,0x00,0x00,0x00,
+0x33,0x00,0x00,0x00,
+0x04,0x0D,0x00,0x00,
+0x0F,0x00,0x00,0x00,
+0x03,0x00,0x00,0x00,
+0xF4,0x01,0x00,0x00,
+0x00,0x00,0xFF,0xFF,
+0xFF,0xFF,0x00,0x00,
+0x34,0x02,0x00,0x00,
+0x00,0x00,0x00,0xF8,
+0x13,0x00,0x00,0x00,
+0x04,0x08,0x00,0x00,
+0x0F,0x00,0x00,0x00,
+0x03,0x00,0x00,0x00,
+0x24,0x08,0x00,0x00,
+0x0F,0x00,0xF0,0x00,
+0x04,0x00,0x30,0x00,
+0x2C,0x08,0x00,0x00,
+0x0F,0x00,0xF0,0x00,
+0x02,0x00,0x30,0x00,
+0x70,0x08,0x00,0x00,
+0x00,0x00,0x00,0x04,
+0x01,0x00,0x00,0x00,
+0x64,0x08,0x00,0x00,
+0x00,0x04,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x78,0x08,0x00,0x00,
+0x0F,0x00,0x0F,0x00,
+0x02,0x00,0x00,0x00,
+0x74,0x0E,0x00,0x00,
+0x00,0x00,0x00,0x0F,
+0x02,0x00,0x00,0x00,
+0x78,0x0E,0x00,0x00,
+0x00,0x00,0x00,0x0F,
+0x02,0x00,0x00,0x00,
+0x7C,0x0E,0x00,0x00,
+0x00,0x00,0x00,0x0F,
+0x02,0x00,0x00,0x00,
+0x80,0x0E,0x00,0x00,
+0x00,0x00,0x00,0x0F,
+0x02,0x00,0x00,0x00,
+0x0C,0x09,0x00,0x00,
+0xFF,0x00,0x00,0x00,
+0x11,0x00,0x00,0x00,
+0x04,0x0C,0x00,0x00,
+0xFF,0x00,0x00,0x00,
+0x33,0x00,0x00,0x00,
+0x04,0x0D,0x00,0x00,
+0x0F,0x00,0x00,0x00,
+0x03,0x00,0x00,0x00,
+0xF4,0x01,0x00,0x00,
+0x00,0x00,0xFF,0xFF,
+0x77,0x77,0x00,0x00,
+0x34,0x02,0x00,0x00,
+0x00,0x00,0x00,0xF8,
+0x0A,0x00,0x00,0x00,
+0x44,0x08,0x00,0x00,
+0xFF,0xFF,0xFF,0xFF,
+0x00,0x00,0x01,0x00,
+0x04,0x08,0x00,0x00,
+0x0F,0x00,0x00,0x00,
+0x01,0x00,0x00,0x00,
+0x24,0x08,0x00,0x00,
+0x0F,0x00,0xF0,0x00,
+0x04,0x00,0x30,0x00,
+0x2C,0x08,0x00,0x00,
+0x0F,0x00,0xF0,0x00,
+0x02,0x00,0x10,0x00,
+0x70,0x08,0x00,0x00,
+0x00,0x00,0x00,0x04,
+0x01,0x00,0x00,0x00,
+0x64,0x08,0x00,0x00,
+0x00,0x04,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x78,0x08,0x00,0x00,
+0x0F,0x00,0x0F,0x00,
+0x02,0x00,0x00,0x00,
+0x74,0x0E,0x00,0x00,
+0x00,0x00,0x00,0x0F,
+0x02,0x00,0x00,0x00,
+0x78,0x0E,0x00,0x00,
+0x00,0x00,0x00,0x0F,
+0x02,0x00,0x00,0x00,
+0x7C,0x0E,0x00,0x00,
+0x00,0x00,0x00,0x0F,
+0x02,0x00,0x00,0x00,
+0x80,0x0E,0x00,0x00,
+0x00,0x00,0x00,0x0F,
+0x02,0x00,0x00,0x00,
+0x0C,0x09,0x00,0x00,
+0xFF,0x00,0x00,0x00,
+0x11,0x00,0x00,0x00,
+0x04,0x0C,0x00,0x00,
+0xFF,0x00,0x00,0x00,
+0x11,0x00,0x00,0x00,
+0x04,0x0D,0x00,0x00,
+0x0F,0x00,0x00,0x00,
+0x01,0x00,0x00,0x00,
+0xF4,0x01,0x00,0x00,
+0x00,0x00,0xFF,0xFF,
+0x77,0x77,0x00,0x00,
+0x34,0x02,0x00,0x00,
+0x00,0x00,0x00,0xF8,
+0x0A,0x00,0x00,0x00,
+0x1C,0x00,0x00,0x00,
+0x00,0x00,0x00,0x07,
+0x00,0x08,0x00,0x00,
+0x00,0x00,0x04,0x00,
+0x04,0x08,0x00,0x00,
+0x03,0x80,0x00,0x00,
+0x08,0x08,0x00,0x00,
+0x00,0xFC,0x00,0x00,
+0x0C,0x08,0x00,0x00,
+0x0A,0x00,0x00,0x00,
+0x10,0x08,0x00,0x00,
+0x88,0x50,0x00,0x10,
+0x14,0x08,0x00,0x00,
+0x10,0x3D,0x0C,0x02,
+0x18,0x08,0x00,0x00,
+0x85,0x01,0x20,0x00,
+0x1C,0x08,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x20,0x08,0x00,0x00,
+0x00,0x00,0x00,0x01,
+0x24,0x08,0x00,0x00,
+0x04,0x00,0x39,0x00,
+0x28,0x08,0x00,0x00,
+0x00,0x00,0x00,0x01,
+0x2C,0x08,0x00,0x00,
+0x04,0x00,0x39,0x00,
+0x30,0x08,0x00,0x00,
+0x04,0x00,0x00,0x00,
+0x34,0x08,0x00,0x00,
+0x00,0x02,0x69,0x00,
+0x38,0x08,0x00,0x00,
+0x04,0x00,0x00,0x00,
+0x3C,0x08,0x00,0x00,
+0x00,0x02,0x69,0x00,
+0x40,0x08,0x00,0x00,
+0x00,0x00,0x01,0x00,
+0x44,0x08,0x00,0x00,
+0x00,0x00,0x01,0x00,
+0x48,0x08,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x4C,0x08,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x50,0x08,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x54,0x08,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x58,0x08,0x00,0x00,
+0x48,0x48,0x48,0x48,
+0x5C,0x08,0x00,0x00,
+0xA9,0x65,0xA9,0x65,
+0x60,0x08,0x00,0x00,
+0x30,0x01,0x7F,0x0F,
+0x64,0x08,0x00,0x00,
+0x30,0x01,0x7F,0x0F,
+0x68,0x08,0x00,0x00,
+0x30,0x01,0x7F,0x0F,
+0x6C,0x08,0x00,0x00,
+0x30,0x01,0x7F,0x0F,
+0x70,0x08,0x00,0x00,
+0x00,0x07,0x00,0x03,
+0x74,0x08,0x00,0x00,
+0x00,0x03,0x00,0x03,
+0x78,0x08,0x00,0x00,
+0x02,0x00,0x02,0x00,
+0x7C,0x08,0x00,0x00,
+0x01,0x02,0x4F,0x00,
+0x80,0x08,0x00,0x00,
+0xC1,0x0A,0x30,0xA8,
+0x84,0x08,0x00,0x00,
+0x58,0x00,0x00,0x00,
+0x88,0x08,0x00,0x00,
+0x08,0x00,0x00,0x00,
+0x8C,0x08,0x00,0x00,
+0x04,0x00,0x00,0x00,
+0x90,0x08,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x94,0x08,0x00,0x00,
+0xFE,0xFF,0xFF,0xFF,
+0x98,0x08,0x00,0x00,
+0x10,0x20,0x30,0x40,
+0x9C,0x08,0x00,0x00,
+0x50,0x60,0x70,0x00,
+0xB0,0x08,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0xE0,0x08,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0xE4,0x08,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x0E,0x00,0x00,
+0x33,0x33,0x33,0x30,
+0x04,0x0E,0x00,0x00,
+0x2F,0x2E,0x2D,0x2A,
+0x08,0x0E,0x00,0x00,
+0x32,0x32,0x00,0x00,
+0x10,0x0E,0x00,0x00,
+0x33,0x33,0x33,0x30,
+0x14,0x0E,0x00,0x00,
+0x2F,0x2E,0x2D,0x2A,
+0x18,0x0E,0x00,0x00,
+0x33,0x33,0x33,0x30,
+0x1C,0x0E,0x00,0x00,
+0x2F,0x2E,0x2D,0x2A,
+0x30,0x0E,0x00,0x00,
+0x00,0x7C,0x00,0x01,
+0x34,0x0E,0x00,0x00,
+0x00,0x48,0x00,0x01,
+0x38,0x0E,0x00,0x00,
+0x1F,0xDC,0x00,0x10,
+0x3C,0x0E,0x00,0x00,
+0x1F,0x8C,0x00,0x10,
+0x40,0x0E,0x00,0x00,
+0xA0,0x00,0x14,0x02,
+0x44,0x0E,0x00,0x00,
+0xA0,0x00,0x16,0x28,
+0x48,0x0E,0x00,0x00,
+0x01,0x00,0x00,0xF8,
+0x4C,0x0E,0x00,0x00,
+0x10,0x29,0x00,0x00,
+0x50,0x0E,0x00,0x00,
+0x00,0x7C,0x00,0x01,
+0x54,0x0E,0x00,0x00,
+0x00,0x48,0x00,0x01,
+0x58,0x0E,0x00,0x00,
+0x1F,0xDC,0x00,0x10,
+0x5C,0x0E,0x00,0x00,
+0x1F,0x8C,0x00,0x10,
+0x60,0x0E,0x00,0x00,
+0xA0,0x00,0x14,0x02,
+0x64,0x0E,0x00,0x00,
+0xA0,0x00,0x16,0x28,
+0x6C,0x0E,0x00,0x00,
+0x10,0x29,0x00,0x00,
+0x70,0x0E,0x00,0x00,
+0xFB,0x92,0xED,0x31,
+0x74,0x0E,0x00,0x00,
+0xFB,0x36,0x15,0x36,
+0x78,0x0E,0x00,0x00,
+0xFB,0x36,0x15,0x36,
+0x7C,0x0E,0x00,0x00,
+0xFB,0x36,0x15,0x36,
+0x80,0x0E,0x00,0x00,
+0xFB,0x36,0x15,0x36,
+0x84,0x0E,0x00,0x00,
+0xFB,0x92,0x0D,0x00,
+0x88,0x0E,0x00,0x00,
+0xFB,0x92,0x0D,0x00,
+0x8C,0x0E,0x00,0x00,
+0xFB,0x92,0xED,0x31,
+0xD0,0x0E,0x00,0x00,
+0xFB,0x92,0xED,0x31,
+0xD4,0x0E,0x00,0x00,
+0xFB,0x92,0xED,0x31,
+0xD8,0x0E,0x00,0x00,
+0xFB,0x92,0x0D,0x00,
+0xDC,0x0E,0x00,0x00,
+0xFB,0x92,0x0D,0x00,
+0xE0,0x0E,0x00,0x00,
+0xFB,0x92,0x0D,0x00,
+0xE4,0x0E,0x00,0x00,
+0x48,0x54,0x5E,0x01,
+0xE8,0x0E,0x00,0x00,
+0x48,0x54,0x55,0x21,
+0x00,0x09,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x04,0x09,0x00,0x00,
+0x23,0x00,0x00,0x00,
+0x08,0x09,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x0C,0x09,0x00,0x00,
+0x13,0x13,0x12,0x01,
+0x00,0x0A,0x00,0x00,
+0xC8,0x47,0xD0,0x00,
+0x04,0x0A,0x00,0x00,
+0x08,0x00,0xFF,0x80,
+0x08,0x0A,0x00,0x00,
+0x00,0x83,0xCD,0x88,
+0x0C,0x0A,0x00,0x00,
+0x0F,0x12,0x62,0x2E,
+0x10,0x0A,0x00,0x00,
+0x78,0xBB,0x00,0x95,
+0x14,0x0A,0x00,0x00,
+0x28,0x40,0x14,0x11,
+0x18,0x0A,0x00,0x00,
+0x17,0x11,0x88,0x00,
+0x1C,0x0A,0x00,0x00,
+0x00,0x0F,0x14,0x89,
+0x20,0x0A,0x00,0x00,
+0x00,0x00,0x1B,0x1A,
+0x24,0x0A,0x00,0x00,
+0x17,0x13,0x0E,0x09,
+0x28,0x0A,0x00,0x00,
+0x04,0x02,0x00,0x00,
+0x2C,0x0A,0x00,0x00,
+0x00,0x00,0xD3,0x10,
+0x00,0x0C,0x00,0x00,
+0x40,0x1D,0x07,0x40,
+0x04,0x0C,0x00,0x00,
+0x33,0x56,0xA0,0x00,
+0x08,0x0C,0x00,0x00,
+0xE4,0x00,0x00,0x00,
+0x0C,0x0C,0x00,0x00,
+0x6C,0x6C,0x6C,0x6C,
+0x10,0x0C,0x00,0x00,
+0x00,0x00,0x80,0x08,
+0x14,0x0C,0x00,0x00,
+0x00,0x01,0x00,0x40,
+0x18,0x0C,0x00,0x00,
+0x00,0x00,0x00,0x08,
+0x1C,0x0C,0x00,0x00,
+0x00,0x01,0x00,0x40,
+0x20,0x0C,0x00,0x00,
+0x00,0x00,0x00,0x08,
+0x24,0x0C,0x00,0x00,
+0x00,0x01,0x00,0x40,
+0x28,0x0C,0x00,0x00,
+0x00,0x00,0x00,0x08,
+0x2C,0x0C,0x00,0x00,
+0x00,0x01,0x00,0x40,
+0x30,0x0C,0x00,0x00,
+0x44,0xAC,0xE9,0x6D,
+0x34,0x0C,0x00,0x00,
+0xCF,0x52,0x96,0x46,
+0x38,0x0C,0x00,0x00,
+0x94,0x59,0x79,0x49,
+0x3C,0x0C,0x00,0x00,
+0x64,0x97,0x97,0x0A,
+0x40,0x0C,0x00,0x00,
+0x3F,0x40,0x7C,0x1F,
+0x44,0x0C,0x00,0x00,
+0xB7,0x00,0x01,0x00,
+0x48,0x0C,0x00,0x00,
+0x00,0x00,0x02,0xEC,
+0x4C,0x0C,0x00,0x00,
+0x7F,0x03,0x7F,0x00,
+0x50,0x0C,0x00,0x00,
+0x20,0x34,0x54,0x69,
+0x54,0x0C,0x00,0x00,
+0x94,0x00,0x3C,0x43,
+0x58,0x0C,0x00,0x00,
+0x20,0x34,0x54,0x69,
+0x5C,0x0C,0x00,0x00,
+0x94,0x00,0x3C,0x43,
+0x60,0x0C,0x00,0x00,
+0x20,0x34,0x54,0x69,
+0x64,0x0C,0x00,0x00,
+0x94,0x00,0x3C,0x43,
+0x68,0x0C,0x00,0x00,
+0x20,0x34,0x54,0x69,
+0x6C,0x0C,0x00,0x00,
+0x94,0x00,0x3C,0x43,
+0x70,0x0C,0x00,0x00,
+0x0D,0x00,0x7F,0x2C,
+0x74,0x0C,0x00,0x00,
+0x5B,0x17,0x86,0x01,
+0x78,0x0C,0x00,0x00,
+0x1F,0x00,0x00,0x00,
+0x7C,0x0C,0x00,0x00,
+0x12,0x16,0xB9,0x00,
+0x80,0x0C,0x00,0x00,
+0x00,0x01,0x00,0x40,
+0x84,0x0C,0x00,0x00,
+0x00,0x00,0xF6,0x20,
+0x88,0x0C,0x00,0x00,
+0x80,0x00,0x00,0x20,
+0x8C,0x0C,0x00,0x00,
+0x00,0x00,0x20,0x20,
+0x90,0x0C,0x00,0x00,
+0x00,0x01,0x00,0x40,
+0x94,0x0C,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x98,0x0C,0x00,0x00,
+0x00,0x01,0x00,0x40,
+0x9C,0x0C,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0xA0,0x0C,0x00,0x00,
+0x92,0x24,0x49,0x00,
+0xA4,0x0C,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0xA8,0x0C,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0xAC,0x0C,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0xB0,0x0C,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0xB4,0x0C,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0xB8,0x0C,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0xBC,0x0C,0x00,0x00,
+0x00,0x00,0x00,0x28,
+0xC0,0x0C,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0xC4,0x0C,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0xC8,0x0C,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0xCC,0x0C,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0xD0,0x0C,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0xD4,0x0C,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0xD8,0x0C,0x00,0x00,
+0x27,0x24,0xB2,0x64,
+0xDC,0x0C,0x00,0x00,
+0x32,0x69,0x76,0x00,
+0xE0,0x0C,0x00,0x00,
+0x22,0x22,0x22,0x00,
+0xE4,0x0C,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0xE8,0x0C,0x00,0x00,
+0x02,0x43,0x64,0x37,
+0xEC,0x0C,0x00,0x00,
+0x0C,0xD4,0x97,0x2F,
+0x00,0x0D,0x00,0x00,
+0x50,0x07,0x00,0x00,
+0x04,0x0D,0x00,0x00,
+0x03,0x04,0x00,0x00,
+0x08,0x0D,0x00,0x00,
+0x7F,0x90,0x00,0x00,
+0x0C,0x0D,0x00,0x00,
+0x01,0x00,0x00,0x00,
+0x10,0x0D,0x00,0x00,
+0x33,0x33,0x63,0xA0,
+0x14,0x0D,0x00,0x00,
+0x63,0x3C,0x33,0x33,
+0x18,0x0D,0x00,0x00,
+0x6B,0x5B,0x8F,0x6A,
+0x1C,0x0D,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x20,0x0D,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x24,0x0D,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x28,0x0D,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x2C,0x0D,0x00,0x00,
+0x75,0x99,0x97,0xCC,
+0x30,0x0D,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x34,0x0D,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x38,0x0D,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x3C,0x0D,0x00,0x00,
+0x93,0x72,0x02,0x00,
+0x40,0x0D,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x44,0x0D,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x48,0x0D,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x50,0x0D,0x00,0x00,
+0x0A,0x14,0x37,0x64,
+0x54,0x0D,0x00,0x00,
+0x02,0xBD,0x4D,0x02,
+0x58,0x0D,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x5C,0x0D,0x00,0x00,
+0x64,0x20,0x03,0x30,
+0x60,0x0D,0x00,0x00,
+0x68,0xDE,0x53,0x46,
+0x64,0x0D,0x00,0x00,
+0x3C,0x8A,0x51,0x00,
+0x68,0x0D,0x00,0x00,
+0x01,0x21,0x00,0x00,
+0x14,0x0F,0x00,0x00,
+0x03,0x00,0x00,0x00,
+0x4C,0x0F,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x0F,0x00,0x00,
+0x00,0x03,0x00,0x00,
+0x40,0x01,0x00,0x00,
+0x04,0x00,0x00,0x00,
+0xFF,0x00,0x00,0x00,
+0x10,0x00,0x00,0x00,
+0x0C,0x02,0x01,0x80,
+0x10,0x00,0x00,0x00,
+0x3C,0x02,0x01,0x80,
+0x10,0x00,0x00,0x00,
+0x2C,0x08,0x01,0x80,
+0x10,0x00,0x00,0x00,
+0x34,0x08,0x01,0x80,
+0x10,0x00,0x00,0x00,
+0x3C,0x08,0x01,0x80,
+0x10,0x00,0x00,0x00,
+0x44,0x08,0x01,0x80,
+0x10,0x00,0x00,0x00,
+0x1C,0x08,0x01,0x80,
+0x10,0x00,0x00,0x00,
+0x24,0x08,0x01,0x80,
+0x10,0x00,0x00,0x00,
+0x7C,0x08,0x01,0x80,
+0x10,0x00,0x00,0x00,
+0x84,0x08,0x01,0x80,
+0x10,0x00,0x00,0x00,
+0xE0,0x03,0x01,0x80,
+0x10,0x00,0x00,0x00,
+0xD8,0x03,0x01,0x80,
+0x10,0x00,0x00,0x00,
+0x8C,0x08,0x01,0x80,
+0x10,0x00,0x00,0x00,
+0x94,0x08,0x01,0x80,
+0xDC,0x01,0x00,0x00,
+0x54,0x25,0x00,0x80,
+0x04,0x00,0x00,0x00,
+0x10,0x06,0x01,0x80,
+0xDC,0x01,0x00,0x00,
+0x54,0x25,0x00,0x80,
+0x04,0x00,0x00,0x00,
+0xD0,0x27,0x00,0x80,
+0x30,0x00,0x00,0x00,
+0xD8,0x27,0x00,0x80,
+0x04,0x00,0x00,0x00,
+0x64,0x2A,0x00,0x80,
+0x13,0x00,0x00,0x00,
+0xE8,0x06,0x01,0x80,
+0x17,0x00,0x00,0x00,
+0x3C,0x07,0x01,0x80,
+0x06,0x00,0x00,0x00,
+0xC4,0x07,0x01,0x80,
+0x06,0x00,0x00,0x00,
+0xCC,0x07,0x01,0x80,
+0x08,0x00,0x00,0x00,
+0xD4,0x07,0x01,0x80,
+0x0C,0x00,0x00,0x00,
+0xDC,0x07,0x01,0x80,
+0x04,0x00,0x00,0x00,
+0xE4,0x07,0x01,0x80,
+0x0E,0x00,0x00,0x00,
+0xEC,0x07,0x01,0x80,
+0x01,0x00,0x00,0x00,
+0xF4,0x07,0x01,0x80,
+0x38,0x00,0x00,0x00,
+0xFC,0x07,0x01,0x80,
+0x04,0x00,0x00,0x00,
+0x04,0x08,0x01,0x80,
+0x02,0x00,0x00,0x00,
+0x0C,0x08,0x01,0x80,
+0x04,0x00,0x00,0x00,
+0x14,0x08,0x01,0x80,
+0x01,0x00,0x00,0x00,
+0x54,0x08,0x01,0x80,
+0x01,0x00,0x00,0x00,
+0x5C,0x08,0x01,0x80,
+0x0C,0x00,0x00,0x00,
+0xE8,0x03,0x01,0x80,
+0x0E,0x00,0x00,0x00,
+0xF0,0x03,0x01,0x80,
+0x0C,0x00,0x00,0x00,
+0x08,0x06,0x01,0x80,
+0x34,0x00,0x00,0x00,
+0x64,0x08,0x01,0x80,
+0x04,0x00,0x00,0x00,
+0x6C,0x08,0x01,0x80,
+0x04,0x00,0x00,0x00,
+0x9C,0x08,0x01,0x80,
+0x04,0x00,0x00,0x00,
+0xA4,0x08,0x01,0x80,
+0x04,0x00,0x00,0x00,
+0xAC,0x08,0x01,0x80,
+0x04,0x00,0x00,0x00,
+0x74,0x08,0x01,0x80,
+0x08,0x00,0x00,0x00,
+0x40,0x03,0x01,0x80,
+0x04,0x00,0x00,0x00,
+0xB4,0x08,0x01,0x80,
+0x04,0x00,0x00,0x00,
+0x2C,0x09,0x01,0x80,
+0x04,0x00,0x00,0x00,
+0x38,0x09,0x01,0x80,
+0x04,0x00,0x00,0x00,
+0xEC,0x09,0x01,0x80,
+0x04,0x00,0x00,0x00,
+0x50,0x0C,0x01,0x80,
+0x04,0x00,0x00,0x00,
+0x60,0x0C,0x01,0x80,
+0x04,0x00,0x00,0x00,
+0xC8,0x0D,0x01,0x80,
+0x04,0x00,0x00,0x00,
+0xF4,0x0E,0x01,0x80,
+0x04,0x00,0x00,0x00,
+0x30,0x10,0x01,0x80,
+0x04,0x00,0x00,0x00,
+0x48,0x12,0x01,0x80,
+0x51,0x73,0x65,0x6C,
+0x20,0x45,0x72,0x72,
+0x6F,0x72,0x2C,0x20,
+0x25,0x78,0x00,0x00,
+0x72,0x65,0x70,0x65,
+0x61,0x74,0x65,0x64,
+0x20,0x65,0x6C,0x65,
+0x6D,0x65,0x6E,0x74,
+0x20,0x49,0x44,0x3A,
+0x20,0x25,0x78,0x2C,
+0x20,0x63,0x6D,0x64,
+0x20,0x73,0x65,0x71,
+0x3D,0x25,0x78,0x2C,
+0x20,0x68,0x32,0x64,
+0x73,0x65,0x71,0x3D,
+0x25,0x78,0x0A,0x00,
+0x69,0x6E,0x76,0x61,
+0x6C,0x69,0x64,0x20,
+0x63,0x6D,0x64,0x20,
+0x69,0x64,0x3A,0x20,
+0x25,0x78,0x0A,0x00,
+0x48,0x32,0x43,0x3A,
+0x20,0x25,0x78,0x0A,
+0x00,0x00,0x00,0x00,
+0x67,0x65,0x74,0x20,
+0x6A,0x6F,0x69,0x6E,
+0x20,0x63,0x6D,0x64,
+0x0A,0x00,0x00,0x00,
+0x4E,0x6F,0x20,0x69,
+0x72,0x70,0x20,0x25,
+0x73,0x0A,0x00,0x00,
+0x67,0x65,0x74,0x20,
+0x73,0x75,0x72,0x76,
+0x65,0x79,0x20,0x63,
+0x6D,0x64,0x0A,0x00,
+0x53,0x53,0x49,0x44,
+0x3A,0x20,0x25,0x73,
+0x0A,0x00,0x00,0x00,
+0x73,0x65,0x74,0x41,
+0x75,0x74,0x68,0x3A,
+0x20,0x25,0x78,0x0A,
+0x00,0x00,0x00,0x00,
+0x72,0x63,0x76,0x20,
+0x73,0x65,0x74,0x5F,
+0x73,0x74,0x61,0x6B,
+0x65,0x79,0x0A,0x00,
+0x53,0x65,0x74,0x53,
+0x69,0x6E,0x67,0x6C,
+0x65,0x43,0x61,0x72,
+0x72,0x69,0x65,0x72,
+0x54,0x78,0x5F,0x68,
+0x64,0x6C,0x0A,0x00,
+0x53,0x65,0x74,0x53,
+0x69,0x6E,0x67,0x6C,
+0x65,0x54,0x6F,0x6E,
+0x65,0x54,0x78,0x5F,
+0x68,0x64,0x6C,0x0A,
+0x00,0x00,0x00,0x00,
+0x53,0x65,0x74,0x43,
+0x61,0x72,0x72,0x69,
+0x65,0x72,0x53,0x75,
+0x70,0x70,0x72,0x65,
+0x73,0x73,0x69,0x6F,
+0x6E,0x54,0x78,0x5F,
+0x68,0x64,0x6C,0x0A,
+0x00,0x00,0x00,0x00,
+0x53,0x65,0x74,0x43,
+0x6F,0x6E,0x74,0x69,
+0x6E,0x75,0x6F,0x75,
+0x73,0x54,0x78,0x5F,
+0x68,0x64,0x6C,0x0A,
+0x00,0x00,0x00,0x00,
+0x53,0x65,0x74,0x43,
+0x43,0x4B,0x43,0x6F,
+0x6E,0x74,0x69,0x6E,
+0x75,0x6F,0x75,0x73,
+0x54,0x78,0x0A,0x00,
+0x53,0x65,0x74,0x4F,
+0x46,0x44,0x4D,0x43,
+0x6F,0x6E,0x74,0x69,
+0x6E,0x75,0x6F,0x75,
+0x73,0x54,0x78,0x0A,
+0x00,0x00,0x00,0x00,
+0x13,0x00,0x00,0x00,
+0xF8,0x9E,0x02,0x00,
+0x13,0x00,0x00,0x00,
+0xC8,0x5E,0x02,0x00,
+0x13,0x00,0x00,0x00,
+0xF8,0x0E,0x02,0x00,
+0x13,0x00,0x00,0x00,
+0xC8,0xCE,0x01,0x00,
+0x13,0x00,0x00,0x00,
+0xD4,0x8E,0x01,0x00,
+0x13,0x00,0x00,0x00,
+0xA4,0x4E,0x01,0x00,
+0x13,0x00,0x00,0x00,
+0xD0,0x0E,0x01,0x00,
+0x13,0x00,0x00,0x00,
+0xA0,0xCE,0x00,0x00,
+0x13,0x00,0x00,0x00,
+0xD0,0x86,0x00,0x00,
+0x13,0x00,0x00,0x00,
+0xA0,0x46,0x00,0x00,
+0x13,0x00,0x00,0x00,
+0x70,0x06,0x00,0x00,
+0x13,0x00,0x00,0x00,
+0xA4,0x9E,0x02,0x00,
+0x13,0x00,0x00,0x00,
+0x74,0x5E,0x02,0x00,
+0x13,0x00,0x00,0x00,
+0xA4,0x0E,0x02,0x00,
+0x13,0x00,0x00,0x00,
+0xD0,0xCE,0x01,0x00,
+0x13,0x00,0x00,0x00,
+0x40,0x9F,0x01,0x00,
+0x13,0x00,0x00,0x00,
+0x70,0x4E,0x01,0x00,
+0x13,0x00,0x00,0x00,
+0xA0,0x06,0x01,0x00,
+0x13,0x00,0x00,0x00,
+0x70,0xC6,0x00,0x00,
+0x13,0x00,0x00,0x00,
+0xA0,0x82,0x00,0x00,
+0x13,0x00,0x00,0x00,
+0x70,0x42,0x00,0x00,
+0x13,0x00,0x00,0x00,
+0x40,0x02,0x00,0x00,
+0xAA,0x88,0x88,0x44,
+0x44,0x22,0x22,0x00,
+0xAA,0x88,0x88,0x44,
+0x44,0x22,0x22,0x00,
+0xAA,0x88,0x88,0x44,
+0x44,0x22,0x22,0x00,
+0xAA,0x88,0x88,0x44,
+0x44,0x22,0x22,0x00,
+0xAA,0x88,0x88,0x44,
+0x44,0x22,0x22,0x00,
+0xAA,0x88,0x88,0x44,
+0x44,0x22,0x22,0x00,
+0xAA,0x88,0x88,0x44,
+0x44,0x22,0x22,0x00,
+0xAA,0x88,0x88,0x44,
+0x44,0x22,0x22,0x00,
+0xAA,0x88,0x88,0x44,
+0x44,0x22,0x22,0x00,
+0xAA,0x88,0x88,0x44,
+0x44,0x22,0x22,0x00,
+0xAA,0x88,0x88,0x44,
+0x44,0x22,0x22,0x00,
+0xAA,0x88,0x88,0x44,
+0x44,0x22,0x22,0x00,
+0x00,0x00,0x00,0x00,
+0x59,0x01,0x03,0x00,
+0x01,0x00,0x00,0x00,
+0x41,0x10,0x00,0x00,
+0x02,0x00,0x00,0x00,
+0x00,0x10,0x01,0x00,
+0x05,0x00,0x00,0x00,
+0xC0,0x0F,0x08,0x00,
+0x07,0x00,0x00,0x00,
+0x03,0xC8,0x0F,0x00,
+0x13,0x00,0x00,0x00,
+0xB0,0x7C,0x01,0x00,
+0x13,0x00,0x00,0x00,
+0xC0,0x1C,0x01,0x00,
+0x13,0x00,0x00,0x00,
+0x60,0xDC,0x00,0x00,
+0x13,0x00,0x00,0x00,
+0x60,0x8C,0x00,0x00,
+0x13,0x00,0x00,0x00,
+0x50,0x44,0x00,0x00,
+0x13,0x00,0x00,0x00,
+0x20,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x59,0x01,0x03,0x00,
+0x01,0x00,0x00,0x00,
+0x50,0x02,0x03,0x00,
+0x02,0x00,0x00,0x00,
+0x00,0x00,0x01,0x00,
+0x10,0x00,0x00,0x00,
+0x0F,0x00,0x08,0x00,
+0x11,0x00,0x00,0x00,
+0xFC,0x31,0x02,0x00,
+0x10,0x00,0x00,0x00,
+0x0F,0x00,0x0C,0x00,
+0x11,0x00,0x00,0x00,
+0xF8,0xF9,0x03,0x00,
+0x10,0x00,0x00,0x00,
+0x0F,0x00,0x02,0x00,
+0x11,0x00,0x00,0x00,
+0x01,0x01,0x02,0x00,
+0x14,0x00,0x00,0x00,
+0x3E,0x09,0x01,0x00,
+0x14,0x00,0x00,0x00,
+0x3E,0x09,0x09,0x00,
+0x15,0x00,0x00,0x00,
+0xF4,0x98,0x01,0x00,
+0x17,0x00,0x00,0x00,
+0x00,0x65,0x0F,0x00,
+0x1A,0x00,0x00,0x00,
+0x56,0x30,0x01,0x00,
+0x1B,0x00,0x00,0x00,
+0x00,0x00,0x06,0x00,
+0x1C,0x00,0x00,0x00,
+0x00,0x03,0x00,0x00,
+0x1E,0x00,0x00,0x00,
+0x59,0x10,0x03,0x00,
+0x21,0x00,0x00,0x00,
+0x00,0x40,0x05,0x00,
+0x22,0x00,0x00,0x00,
+0x3C,0x08,0x00,0x00,
+0x23,0x00,0x00,0x00,
+0x58,0x15,0x00,0x00,
+0x24,0x00,0x00,0x00,
+0x60,0x00,0x00,0x00,
+0x25,0x00,0x00,0x00,
+0x83,0x25,0x02,0x00,
+0x26,0x00,0x00,0x00,
+0x00,0xF2,0x00,0x00,
+0x27,0x00,0x00,0x00,
+0xF1,0xAC,0x0E,0x00,
+0x28,0x00,0x00,0x00,
+0x54,0xBD,0x09,0x00,
+0x29,0x00,0x00,0x00,
+0x82,0x45,0x00,0x00,
+0x2A,0x00,0x00,0x00,
+0x01,0x00,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x34,0x13,0x02,0x00,
+0x2A,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x0A,0x00,0x00,0x00,
+0x2A,0x00,0x00,0x00,
+0x01,0x00,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x08,0x08,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x33,0x33,0x05,0x00,
+0x2C,0x00,0x00,0x00,
+0x0C,0x00,0x00,0x00,
+0x2A,0x00,0x00,0x00,
+0x02,0x00,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x08,0x08,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x33,0xB3,0x05,0x00,
+0x2C,0x00,0x00,0x00,
+0x0D,0x00,0x00,0x00,
+0x2A,0x00,0x00,0x00,
+0x03,0x00,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x08,0x08,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x33,0x33,0x06,0x00,
+0x2C,0x00,0x00,0x00,
+0x0D,0x00,0x00,0x00,
+0x2A,0x00,0x00,0x00,
+0x04,0x00,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x08,0x08,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x33,0xB3,0x06,0x00,
+0x2C,0x00,0x00,0x00,
+0x0D,0x00,0x00,0x00,
+0x2A,0x00,0x00,0x00,
+0x05,0x00,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x09,0x07,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x33,0x33,0x05,0x00,
+0x2C,0x00,0x00,0x00,
+0x0D,0x00,0x00,0x00,
+0x2A,0x00,0x00,0x00,
+0x06,0x00,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x09,0x07,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x33,0xB3,0x05,0x00,
+0x2C,0x00,0x00,0x00,
+0x0D,0x00,0x00,0x00,
+0x2A,0x00,0x00,0x00,
+0x07,0x00,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x09,0x07,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x33,0x33,0x06,0x00,
+0x2C,0x00,0x00,0x00,
+0x0D,0x00,0x00,0x00,
+0x2A,0x00,0x00,0x00,
+0x08,0x00,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x09,0x07,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x33,0xB3,0x06,0x00,
+0x2C,0x00,0x00,0x00,
+0x0D,0x00,0x00,0x00,
+0x2A,0x00,0x00,0x00,
+0x09,0x00,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x0A,0x06,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x33,0x33,0x05,0x00,
+0x2C,0x00,0x00,0x00,
+0x0D,0x00,0x00,0x00,
+0x2A,0x00,0x00,0x00,
+0x0A,0x00,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x0A,0x06,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x33,0xB3,0x05,0x00,
+0x2C,0x00,0x00,0x00,
+0x0D,0x00,0x00,0x00,
+0x2A,0x00,0x00,0x00,
+0x0B,0x00,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x0A,0x06,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x33,0x33,0x06,0x00,
+0x2C,0x00,0x00,0x00,
+0x0D,0x00,0x00,0x00,
+0x2A,0x00,0x00,0x00,
+0x0C,0x00,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x0A,0x06,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x33,0xB3,0x06,0x00,
+0x2C,0x00,0x00,0x00,
+0x0D,0x00,0x00,0x00,
+0x2A,0x00,0x00,0x00,
+0x0D,0x00,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x0B,0x05,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x33,0x33,0x05,0x00,
+0x2C,0x00,0x00,0x00,
+0x0D,0x00,0x00,0x00,
+0x2A,0x00,0x00,0x00,
+0x0E,0x00,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x0B,0x05,0x00,0x00,
+0x2B,0x00,0x00,0x00,
+0x23,0x66,0x06,0x00,
+0x2C,0x00,0x00,0x00,
+0x1A,0x00,0x00,0x00,
+0x2A,0x00,0x00,0x00,
+0x00,0x40,0x0E,0x00,
+0x30,0x00,0x00,0x00,
+0x00,0x00,0x02,0x00,
+0x31,0x00,0x00,0x00,
+0x31,0x96,0x0B,0x00,
+0x32,0x00,0x00,0x00,
+0x0D,0x13,0x00,0x00,
+0x33,0x00,0x00,0x00,
+0x87,0x01,0x00,0x00,
+0x13,0x00,0x00,0x00,
+0x6C,0x9E,0x01,0x00,
+0x13,0x00,0x00,0x00,
+0x94,0x5E,0x01,0x00,
+0x00,0x00,0x00,0x00,
+0x59,0x01,0x01,0x00,
+0x18,0x00,0x00,0x00,
+0x01,0xF4,0x00,0x00,
+0xFE,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x1E,0x00,0x00,0x00,
+0x5B,0x10,0x03,0x00,
+0xFE,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x59,0x01,0x03,0x00,
+0x10,0x00,0x00,0x00,
+0x0F,0x00,0x04,0x00,
+0x11,0x00,0x00,0x00,
+0xF9,0x03,0x02,0x00,
+0x6C,0x09,0x00,0x00,
+0x01,0x02,0x03,0x04,
+0x05,0x06,0x07,0x08,
+0x09,0x0A,0x0B,0x00,
+0x00,0x00,0x00,0x12,
+0x12,0x12,0x12,0x12,
+0x12,0x12,0x12,0x12,
+0x12,0x12,0x00,0x00,
+0x00,0x00,0x0F,0x0F,
+0x0F,0x0F,0x0F,0x0F,
+0x0F,0x0F,0x0F,0x0F,
+0x0F,0x00,0x00,0x00,
+0x00,0x17,0x05,0x03,
+0x22,0x43,0x5E,0x00,
+0x4F,0xA4,0x00,0x00,
+0x4F,0xA4,0x00,0x00,
+0x22,0x43,0x5E,0x00,
+0x4F,0xA4,0x00,0x00,
+0x22,0x43,0x5E,0x00,
+0x4F,0xA4,0x3E,0x00,
+0x30,0xA6,0x00,0x00,
+0x4F,0xA4,0x3E,0x00,
+0x2B,0xA4,0x5E,0x00,
+0x2B,0xA4,0x00,0x00,
+0x2B,0xA4,0x5E,0x00,
+0x22,0xA4,0x5E,0x00,
+0x4F,0xA4,0x00,0x00,
+0x4F,0xA4,0x00,0x00,
+0x4F,0xA4,0x5E,0x00,
+0x4F,0xA4,0x5E,0x00,
+0x4F,0xA4,0x5E,0x00,
+0x4F,0xA4,0x5E,0x00,
+0x4F,0xA4,0x00,0x00,
+0x4F,0xA4,0x5E,0x00,
+0x00,0xE0,0x4C,0x02,
+0x01,0x20,0x00,0x00,
+0x00,0xE0,0x4C,0x00,
+0x00,0x0C,0x43,0x00,
+0x00,0x50,0x43,0x00,
+0x00,0x40,0x96,0x00,
+0x00,0x05,0xB5,0x00,
+0x00,0x0A,0xF7,0x00,
+0x00,0x10,0x18,0x00,
+0x00,0x13,0x74,0x00,
+0x00,0x03,0x7F,0x00,
+0x00,0x50,0xF2,0x02,
+0x01,0x01,0x00,0x00,
+0x00,0x50,0xF2,0x02,
+0x00,0x01,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0xFF,0xFF,0xFF,0xFF,
+0xFF,0xFF,0x00,0x00,
+0x4F,0x6E,0x41,0x73,
+0x73,0x6F,0x63,0x52,
+0x65,0x71,0x00,0x00,
+0x4F,0x6E,0x41,0x73,
+0x73,0x6F,0x63,0x52,
+0x73,0x70,0x00,0x00,
+0x4F,0x6E,0x52,0x65,
+0x41,0x73,0x73,0x6F,
+0x63,0x52,0x65,0x71,
+0x00,0x00,0x00,0x00,
+0x4F,0x6E,0x52,0x65,
+0x41,0x73,0x73,0x6F,
+0x63,0x52,0x73,0x70,
+0x00,0x00,0x00,0x00,
+0x4F,0x6E,0x50,0x72,
+0x6F,0x62,0x65,0x52,
+0x65,0x71,0x00,0x00,
+0x4F,0x6E,0x50,0x72,
+0x6F,0x62,0x65,0x52,
+0x73,0x70,0x00,0x00,
+0x4F,0x6E,0x42,0x65,
+0x61,0x63,0x6F,0x6E,
+0x00,0x00,0x00,0x00,
+0x4F,0x6E,0x41,0x54,
+0x49,0x4D,0x00,0x00,
+0x4F,0x6E,0x44,0x69,
+0x73,0x61,0x73,0x73,
+0x6F,0x63,0x00,0x00,
+0x4F,0x6E,0x41,0x75,
+0x74,0x68,0x00,0x00,
+0x4F,0x6E,0x44,0x65,
+0x41,0x75,0x74,0x68,
+0x00,0x00,0x00,0x00,
+0x4F,0x6E,0x41,0x63,
+0x74,0x69,0x6F,0x6E,
+0x00,0x00,0x00,0x00,
+0x4F,0x6E,0x45,0x78,
+0x63,0x65,0x70,0x74,
+0x69,0x6F,0x6E,0x00,
+0x00,0x00,0x00,0x00,
+0xF8,0xDD,0x01,0x80,
+0xE8,0x26,0x01,0x80,
+0x10,0x00,0x00,0x00,
+0x04,0xDE,0x01,0x80,
+0xF0,0x26,0x01,0x80,
+0x20,0x00,0x00,0x00,
+0x10,0xDE,0x01,0x80,
+0xE8,0x26,0x01,0x80,
+0x30,0x00,0x00,0x00,
+0x20,0xDE,0x01,0x80,
+0xF0,0x26,0x01,0x80,
+0x40,0x00,0x00,0x00,
+0x30,0xDE,0x01,0x80,
+0x80,0x2D,0x01,0x80,
+0x50,0x00,0x00,0x00,
+0x3C,0xDE,0x01,0x80,
+0x28,0x4A,0x00,0x80,
+0x80,0x00,0x00,0x00,
+0x48,0xDE,0x01,0x80,
+0x90,0x59,0x00,0x80,
+0x90,0x00,0x00,0x00,
+0x54,0xDE,0x01,0x80,
+0x44,0x2E,0x01,0x80,
+0xA0,0x00,0x00,0x00,
+0x5C,0xDE,0x01,0x80,
+0x4C,0x2E,0x01,0x80,
+0xB0,0x00,0x00,0x00,
+0x68,0xDE,0x01,0x80,
+0x54,0x2F,0x01,0x80,
+0xC0,0x00,0x00,0x00,
+0x70,0xDE,0x01,0x80,
+0x6C,0x2E,0x01,0x80,
+0xD0,0x00,0x00,0x00,
+0x7C,0xDE,0x01,0x80,
+0xF0,0x54,0x00,0x80,
+0x0C,0x00,0x00,0x00,
+0x88,0xDE,0x01,0x80,
+0x8C,0x2E,0x01,0x80,
+0x73,0x77,0x69,0x74,
+0x63,0x68,0x20,0x74,
+0x6F,0x20,0x34,0x30,
+0x4D,0x20,0x48,0x7A,
+0x20,0x6D,0x6F,0x64,
+0x65,0x28,0x25,0x78,
+0x2C,0x20,0x25,0x78,
+0x29,0x0A,0x00,0x00,
+0x73,0x77,0x69,0x74,
+0x63,0x68,0x20,0x74,
+0x6F,0x20,0x32,0x30,
+0x4D,0x20,0x48,0x7A,
+0x20,0x6D,0x6F,0x64,
+0x65,0x0A,0x00,0x00,
+0x41,0x54,0x49,0x4D,
+0x3A,0x20,0x25,0x78,
+0x0A,0x00,0x00,0x00,
+0x4E,0x6F,0x20,0x69,
+0x72,0x70,0x20,0x25,
+0x73,0x0A,0x00,0x00,
+0x73,0x75,0x72,0x76,
+0x65,0x79,0x20,0x64,
+0x6F,0x6E,0x65,0x28,
+0x25,0x78,0x2C,0x20,
+0x25,0x78,0x29,0x0A,
+0x00,0x00,0x00,0x00,
+0x4E,0x6F,0x20,0x69,
+0x72,0x70,0x20,0x25,
+0x73,0x0A,0x00,0x00,
+0x6A,0x6F,0x69,0x6E,
+0x20,0x72,0x65,0x73,
+0x28,0x25,0x78,0x29,
+0x0A,0x00,0x00,0x00,
+0x4E,0x6F,0x20,0x69,
+0x72,0x70,0x20,0x25,
+0x73,0x0A,0x00,0x00,
+0x64,0x65,0x6C,0x20,
+0x73,0x74,0x61,0x0A,
+0x00,0x00,0x00,0x00,
+0x4E,0x6F,0x20,0x69,
+0x72,0x70,0x20,0x25,
+0x73,0x0A,0x00,0x00,
+0x61,0x64,0x64,0x20,
+0x73,0x74,0x61,0x3A,
+0x25,0x78,0x2C,0x20,
+0x25,0x78,0x0A,0x00,
+0x72,0x63,0x76,0x20,
+0x64,0x69,0x73,0x63,
+0x6F,0x6E,0x6E,0x65,
+0x63,0x74,0x0A,0x00,
+0x64,0x69,0x73,0x63,
+0x6F,0x6E,0x6E,0x65,
+0x63,0x74,0x20,0x74,
+0x69,0x6D,0x65,0x72,
+0x3A,0x20,0x6E,0x6F,
+0x20,0x62,0x65,0x61,
+0x63,0x6F,0x6E,0x0A,
+0x00,0x00,0x00,0x00,
+0x64,0x69,0x73,0x63,
+0x6F,0x6E,0x6E,0x65,
+0x63,0x74,0x20,0x74,
+0x69,0x6D,0x65,0x72,
+0x0A,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x4E,0x6F,0x20,0x69,
+0x72,0x70,0x20,0x40,
+0x25,0x73,0x0A,0x00,
+0x57,0x4D,0x4D,0x28,
+0x25,0x78,0x29,0x3A,
+0x20,0x25,0x78,0x2C,
+0x20,0x25,0x78,0x0A,
+0x00,0x00,0x00,0x00,
+0x61,0x73,0x73,0x6F,
+0x63,0x20,0x72,0x65,
+0x6A,0x65,0x63,0x74,
+0x2C,0x20,0x73,0x74,
+0x61,0x74,0x75,0x73,
+0x3A,0x20,0x25,0x64,
+0x0A,0x00,0x00,0x00,
+0x6D,0x61,0x63,0x20,
+0x69,0x64,0x20,0x23,
+0x34,0x3A,0x20,0x25,
+0x78,0x2C,0x20,0x25,
+0x78,0x0A,0x00,0x00,
+0x6D,0x61,0x63,0x20,
+0x69,0x64,0x20,0x23,
+0x35,0x3A,0x20,0x25,
+0x78,0x2C,0x20,0x25,
+0x78,0x2C,0x20,0x25,
+0x78,0x0A,0x00,0x00,
+0x4E,0x6F,0x20,0x69,
+0x72,0x70,0x20,0x40,
+0x25,0x73,0x0A,0x00,
+0x4E,0x6F,0x20,0x69,
+0x72,0x70,0x20,0x25,
+0x73,0x0A,0x00,0x00,
+0x63,0x75,0x72,0x20,
+0x63,0x68,0x61,0x6E,
+0x6E,0x65,0x6C,0x3A,
+0x20,0x25,0x78,0x2C,
+0x20,0x62,0x63,0x6E,
+0x20,0x69,0x6E,0x74,
+0x65,0x72,0x76,0x61,
+0x6C,0x3A,0x20,0x25,
+0x78,0x0A,0x00,0x00,
+0x49,0x42,0x53,0x53,
+0x20,0x6D,0x6F,0x64,
+0x65,0x2C,0x20,0x63,
+0x75,0x72,0x20,0x63,
+0x68,0x61,0x6E,0x6E,
+0x65,0x6C,0x3A,0x20,
+0x25,0x78,0x2C,0x20,
+0x62,0x63,0x6E,0x20,
+0x69,0x6E,0x74,0x65,
+0x72,0x76,0x61,0x6C,
+0x3A,0x20,0x25,0x78,
+0x0A,0x00,0x00,0x00,
+0x6D,0x61,0x63,0x20,
+0x69,0x64,0x20,0x23,
+0x34,0x3A,0x20,0x25,
+0x78,0x2C,0x20,0x25,
+0x78,0x0A,0x00,0x00,
+0x69,0x6E,0x76,0x61,
+0x6C,0x69,0x64,0x20,
+0x63,0x61,0x70,0x3A,
+0x25,0x78,0x0A,0x00,
+0x4E,0x6F,0x20,0x69,
+0x72,0x70,0x20,0x25,
+0x73,0x0A,0x00,0x00,
+0x69,0x73,0x73,0x75,
+0x65,0x20,0x61,0x73,
+0x73,0x6F,0x63,0x72,
+0x65,0x71,0x28,0x25,
+0x78,0x29,0x0A,0x00,
+0x5B,0x57,0x41,0x50,
+0x49,0x5D,0x20,0x67,
+0x65,0x74,0x20,0x77,
+0x61,0x70,0x69,0x20,
+0x49,0x45,0x0A,0x00,
+0x4E,0x6F,0x20,0x69,
+0x72,0x70,0x20,0x25,
+0x73,0x0A,0x00,0x00,
+0x69,0x73,0x73,0x75,
+0x65,0x20,0x61,0x63,
+0x74,0x69,0x6F,0x6E,
+0x3A,0x20,0x25,0x78,
+0x2C,0x20,0x25,0x78,
+0x2C,0x20,0x25,0x78,
+0x20,0x0A,0x00,0x00,
+0x41,0x44,0x44,0x42,
+0x41,0x20,0x52,0x53,
+0x50,0x3A,0x20,0x25,
+0x78,0x0A,0x00,0x00,
+0x44,0x45,0x4C,0x42,
+0x41,0x3A,0x20,0x25,
+0x78,0x28,0x25,0x78,
+0x29,0x0A,0x00,0x00,
+0x4E,0x6F,0x20,0x69,
+0x72,0x70,0x20,0x25,
+0x73,0x0A,0x00,0x00,
+0x69,0x73,0x73,0x75,
+0x65,0x20,0x61,0x75,
+0x74,0x68,0x0A,0x00,
+0x63,0x6C,0x6E,0x74,
+0x20,0x61,0x75,0x74,
+0x68,0x20,0x66,0x61,
+0x69,0x6C,0x2C,0x20,
+0x73,0x74,0x61,0x74,
+0x75,0x73,0x3A,0x20,
+0x25,0x64,0x0A,0x00,
+0x6E,0x6F,0x20,0x63,
+0x68,0x61,0x6C,0x6C,
+0x65,0x6E,0x67,0x65,
+0x20,0x74,0x65,0x78,
+0x74,0x3F,0x0A,0x00,
+0x63,0x6C,0x6E,0x74,
+0x20,0x61,0x75,0x74,
+0x68,0x20,0x66,0x61,
+0x69,0x6C,0x65,0x64,
+0x20,0x64,0x75,0x65,
+0x20,0x74,0x6F,0x20,
+0x69,0x6C,0x6C,0x65,
+0x67,0x61,0x6C,0x20,
+0x73,0x65,0x71,0x3D,
+0x25,0x78,0x0A,0x00,
+0x4E,0x6F,0x20,0x69,
+0x72,0x70,0x20,0x25,
+0x73,0x0A,0x00,0x00,
+0x69,0x73,0x73,0x75,
+0x65,0x5F,0x64,0x65,
+0x61,0x75,0x74,0x68,
+0x0A,0x00,0x00,0x00,
+0x4E,0x6F,0x20,0x69,
+0x72,0x70,0x20,0x25,
+0x73,0x0A,0x00,0x00,
+0x69,0x73,0x73,0x75,
+0x65,0x5F,0x64,0x69,
+0x73,0x61,0x73,0x73,
+0x6F,0x63,0x0A,0x00,
+0x4E,0x6F,0x20,0x69,
+0x72,0x70,0x20,0x25,
+0x73,0x0A,0x00,0x00,
+0x4E,0x6F,0x20,0x69,
+0x72,0x70,0x20,0x25,
+0x73,0x0A,0x00,0x00,
+0x69,0x73,0x73,0x75,
+0x65,0x20,0x6E,0x75,
+0x6C,0x6C,0x20,0x64,
+0x61,0x74,0x61,0x28,
+0x25,0x64,0x29,0x00,
+0x6C,0x69,0x6E,0x6B,
+0x20,0x74,0x6F,0x20,
+0x41,0x72,0x74,0x68,
+0x65,0x72,0x6F,0x73,
+0x20,0x41,0x50,0x0A,
+0x00,0x00,0x00,0x00,
+0x6C,0x69,0x6E,0x6B,
+0x20,0x74,0x6F,0x20,
+0x42,0x72,0x6F,0x61,
+0x64,0x63,0x6F,0x6D,
+0x20,0x41,0x50,0x0A,
+0x00,0x00,0x00,0x00,
+0x6C,0x69,0x6E,0x6B,
+0x20,0x74,0x6F,0x20,
+0x4D,0x61,0x72,0x76,
+0x65,0x6C,0x6C,0x20,
+0x41,0x50,0x0A,0x00,
+0x6C,0x69,0x6E,0x6B,
+0x20,0x74,0x6F,0x20,
+0x52,0x61,0x6C,0x69,
+0x6E,0x6B,0x20,0x41,
+0x50,0x0A,0x00,0x00,
+0x6C,0x69,0x6E,0x6B,
+0x20,0x74,0x6F,0x20,
+0x43,0x69,0x73,0x63,
+0x6F,0x20,0x41,0x50,
+0x0A,0x00,0x00,0x00,
+0x6C,0x69,0x6E,0x6B,
+0x20,0x74,0x6F,0x20,
+0x52,0x65,0x61,0x6C,
+0x74,0x65,0x6B,0x20,
+0x39,0x36,0x42,0x20,
+0x41,0x50,0x0A,0x00,
+0x6C,0x69,0x6E,0x6B,
+0x20,0x74,0x6F,0x20,
+0x75,0x6E,0x6B,0x6E,
+0x6F,0x77,0x6E,0x20,
+0x41,0x50,0x0A,0x00,
+0x6D,0x61,0x63,0x20,
+0x69,0x64,0x20,0x23,
+0x25,0x78,0x3A,0x20,
+0x25,0x78,0x2C,0x20,
+0x25,0x78,0x0A,0x00,
+0x64,0x72,0x6F,0x70,
+0x20,0x64,0x75,0x65,
+0x20,0x74,0x6F,0x20,
+0x64,0x65,0x63,0x61,
+0x63,0x68,0x65,0x0A,
+0x00,0x00,0x00,0x00,
+0xFF,0x00,0x00,0x00,
+0x01,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0xFF,0xFF,0x00,0x00,
+0x01,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x01,0x02,0x03,
+0xFF,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x01,0x02,0x03,
+0x04,0x05,0x06,0x07,
+0x08,0x09,0x0A,0x0B,
+0xFF,0x00,0x00,0x00,
+0x04,0x05,0x06,0x07,
+0x08,0x09,0x0A,0x0B,
+0xFF,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x04,0x05,0x06,0x07,
+0x08,0xFF,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x01,0x02,0x03,
+0xFF,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x01,0x01,0x03,
+0xFF,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x30,0x31,0x32,0x33,
+0x34,0x35,0x36,0x37,
+0x38,0x39,0x41,0x42,
+0x43,0x44,0x45,0x46,
+0x00,0x00,0x00,0x00,
+0x25,0x64,0x2E,0x00,
+0x25,0x68,0x68,0x58,
+0x3A,0x00,0x00,0x00,
+0x74,0x61,0x72,0x67,
+0x65,0x74,0x20,0x74,
+0x68,0x65,0x72,0x6D,
+0x61,0x6C,0x3A,0x20,
+0x25,0x78,0x2C,0x20,
+0x63,0x75,0x72,0x20,
+0x74,0x68,0x65,0x72,
+0x6D,0x61,0x6C,0x3A,
+0x20,0x25,0x78,0x0A,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x08,0xE4,0x01,0x80,
+0x08,0xE4,0x01,0x80,
+0x31,0x10,0x10,0x00,
+0x00,0x30,0x00,0x00,
+0x31,0x20,0x10,0x00,
+0x00,0x30,0x00,0x00,
+0x31,0x28,0x10,0x00,
+0x00,0x30,0x00,0x00,
+0x31,0x2C,0x10,0x10,
+0x00,0x30,0x00,0x00,
+0x31,0x2F,0x10,0x10,
+0x00,0x30,0x00,0x00,
+0x31,0x30,0x18,0x00,
+0x00,0x30,0x00,0x00,
+0x31,0x30,0x20,0x10,
+0x00,0x30,0x00,0x00,
+0x22,0x20,0x18,0x08,
+0x00,0x20,0x00,0x00,
+0x22,0x21,0x14,0x08,
+0x00,0x20,0x00,0x00,
+0x22,0x21,0x1C,0x08,
+0x00,0x20,0x00,0x00,
+0x22,0x21,0x20,0x08,
+0x00,0x20,0x00,0x00,
+0x22,0x21,0x20,0x10,
+0x00,0x20,0x00,0x00,
+0x22,0x21,0x20,0x18,
+0x00,0x20,0x00,0x00,
+0x1A,0x19,0x18,0x10,
+0x00,0x18,0x00,0x00,
+0x12,0x11,0x10,0x08,
+0x00,0x10,0x00,0x00,
+0x0A,0x09,0x08,0x00,
+0x00,0x08,0x00,0x00,
+0x0A,0x09,0x08,0x02,
+0x00,0x08,0x00,0x00,
+0x0A,0x09,0x08,0x04,
+0x00,0x08,0x00,0x00,
+0x0A,0x09,0x08,0x06,
+0x00,0x08,0x00,0x00,
+0x08,0x07,0x06,0x04,
+0x00,0x06,0x00,0x00,
+0x06,0x05,0x04,0x02,
+0x00,0x04,0x00,0x00,
+0x06,0x05,0x04,0x03,
+0x00,0x04,0x00,0x00,
+0x05,0x04,0x03,0x02,
+0x00,0x03,0x00,0x00,
+0x09,0x08,0x07,0x06,
+0x07,0x06,0x06,0x05,
+0x05,0x04,0x04,0x03,
+0x06,0x05,0x05,0x04,
+0x04,0x03,0x03,0x03,
+0x05,0x04,0x04,0x03,
+0x03,0x02,0x02,0x02,
+0x00,0x09,0x08,0x07,
+0x06,0x07,0x06,0x06,
+0x05,0x05,0x04,0x04,
+0x03,0x05,0x04,0x04,
+0x03,0x03,0x02,0x02,
+0x02,0x04,0x03,0x03,
+0x02,0x02,0x01,0x01,
+0x01,0x00,0x00,0x00,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x10,0x10,0x20,
+0x08,0x08,0x08,0x08,
+0x20,0x20,0x20,0x20,
+0x08,0x08,0x08,0x08,
+0x08,0x20,0x20,0x20,
+0x30,0x08,0x08,0x08,
+0x08,0x18,0x18,0x18,
+0x18,0x18,0x20,0x30,
+0x30,0x10,0x20,0x20,
+0x20,0x20,0x20,0x30,
+0x30,0x08,0x10,0x20,
+0x30,0x30,0x30,0x30,
+0x30,0x30,0x00,0x00,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x10,0x10,0x20,
+0x08,0x08,0x08,0x08,
+0x08,0x20,0x20,0x20,
+0x08,0x08,0x08,0x08,
+0x08,0x20,0x20,0x20,
+0x20,0x08,0x08,0x08,
+0x08,0x18,0x18,0x18,
+0x18,0x18,0x20,0x30,
+0x30,0x10,0x20,0x20,
+0x20,0x20,0x20,0x30,
+0x30,0x08,0x10,0x20,
+0x30,0x30,0x30,0x30,
+0x30,0x30,0x00,0x00,
+0x0A,0x09,0x08,0x04,
+0x00,0x0A,0x09,0x08,
+0x04,0x00,0x0A,0x09,
+0x08,0x04,0x00,0x0A,
+0x09,0x08,0x04,0x00,
+0x0A,0x09,0x08,0x00,
+0x00,0x0A,0x09,0x08,
+0x00,0x00,0x0A,0x09,
+0x08,0x00,0x00,0x0A,
+0x09,0x08,0x00,0x00,
+0x0A,0x09,0x08,0x00,
+0x00,0x12,0x11,0x10,
+0x08,0x00,0x12,0x11,
+0x10,0x08,0x00,0x22,
+0x21,0x20,0x18,0x00,
+0x0A,0x09,0x08,0x00,
+0x00,0x0A,0x09,0x08,
+0x00,0x00,0x0A,0x09,
+0x08,0x00,0x00,0x0A,
+0x09,0x08,0x00,0x00,
+0x22,0x21,0x20,0x18,
+0x00,0x22,0x21,0x20,
+0x18,0x00,0x22,0x21,
+0x1C,0x08,0x00,0x22,
+0x20,0x18,0x08,0x00,
+0x0A,0x09,0x08,0x02,
+0x00,0x0A,0x09,0x08,
+0x02,0x00,0x0A,0x09,
+0x08,0x02,0x00,0x0A,
+0x09,0x08,0x02,0x00,
+0x0A,0x09,0x08,0x00,
+0x00,0x22,0x21,0x20,
+0x10,0x00,0x22,0x21,
+0x20,0x08,0x00,0x22,
+0x21,0x1C,0x08,0x00,
+0x31,0x30,0x18,0x00,
+0x00,0x0A,0x09,0x08,
+0x04,0x00,0x0A,0x09,
+0x08,0x04,0x00,0x0A,
+0x09,0x08,0x04,0x00,
+0x0A,0x09,0x08,0x04,
+0x00,0x1A,0x19,0x18,
+0x10,0x00,0x1A,0x19,
+0x18,0x10,0x00,0x1A,
+0x19,0x18,0x10,0x00,
+0x1A,0x19,0x18,0x10,
+0x00,0x1A,0x19,0x18,
+0x10,0x00,0x22,0x21,
+0x20,0x08,0x00,0x31,
+0x2C,0x10,0x10,0x00,
+0x31,0x28,0x10,0x00,
+0x00,0x12,0x11,0x10,
+0x08,0x00,0x22,0x21,
+0x20,0x18,0x00,0x22,
+0x21,0x20,0x18,0x00,
+0x22,0x21,0x20,0x08,
+0x00,0x22,0x21,0x14,
+0x08,0x00,0x22,0x20,
+0x18,0x08,0x00,0x31,
+0x30,0x20,0x10,0x00,
+0x31,0x2C,0x10,0x10,
+0x00,0x0A,0x09,0x08,
+0x00,0x00,0x12,0x11,
+0x10,0x08,0x00,0x22,
+0x21,0x20,0x18,0x00,
+0x22,0x21,0x20,0x18,
+0x00,0x31,0x30,0x20,
+0x10,0x00,0x31,0x2F,
+0x10,0x10,0x00,0x31,
+0x2F,0x10,0x10,0x00,
+0x31,0x10,0x10,0x00,
+0x00,0x31,0x2C,0x10,
+0x10,0x00,0x00,0x00,
+0x0A,0x09,0x08,0x04,
+0x00,0x0A,0x09,0x08,
+0x04,0x00,0x0A,0x09,
+0x08,0x04,0x00,0x0A,
+0x09,0x08,0x04,0x00,
+0x0A,0x09,0x08,0x00,
+0x00,0x0A,0x09,0x08,
+0x00,0x00,0x0A,0x09,
+0x08,0x00,0x00,0x0A,
+0x09,0x08,0x00,0x00,
+0x0A,0x09,0x08,0x00,
+0x00,0x12,0x11,0x10,
+0x08,0x00,0x12,0x11,
+0x10,0x08,0x00,0x22,
+0x21,0x20,0x18,0x00,
+0x0A,0x09,0x08,0x04,
+0x00,0x0A,0x09,0x08,
+0x04,0x00,0x0A,0x09,
+0x08,0x02,0x00,0x0A,
+0x09,0x08,0x00,0x00,
+0x0A,0x09,0x08,0x00,
+0x00,0x22,0x21,0x20,
+0x18,0x00,0x22,0x21,
+0x1C,0x08,0x00,0x22,
+0x21,0x14,0x08,0x00,
+0x0A,0x09,0x08,0x02,
+0x00,0x0A,0x09,0x08,
+0x02,0x00,0x0A,0x09,
+0x08,0x02,0x00,0x0A,
+0x09,0x08,0x02,0x00,
+0x0A,0x09,0x08,0x00,
+0x00,0x22,0x21,0x20,
+0x10,0x00,0x22,0x21,
+0x20,0x08,0x00,0x22,
+0x21,0x14,0x08,0x00,
+0x22,0x21,0x14,0x08,
+0x00,0x0A,0x09,0x08,
+0x04,0x00,0x0A,0x09,
+0x08,0x04,0x00,0x0A,
+0x09,0x08,0x04,0x00,
+0x0A,0x09,0x08,0x04,
+0x00,0x1A,0x19,0x18,
+0x10,0x00,0x1A,0x19,
+0x18,0x10,0x00,0x1A,
+0x19,0x18,0x10,0x00,
+0x1A,0x19,0x18,0x10,
+0x00,0x1A,0x19,0x18,
+0x10,0x00,0x22,0x21,
+0x20,0x08,0x00,0x31,
+0x2C,0x10,0x10,0x00,
+0x31,0x28,0x10,0x00,
+0x00,0x12,0x11,0x10,
+0x08,0x00,0x22,0x21,
+0x20,0x18,0x00,0x22,
+0x21,0x20,0x18,0x00,
+0x22,0x21,0x20,0x08,
+0x00,0x22,0x21,0x14,
+0x08,0x00,0x22,0x20,
+0x18,0x08,0x00,0x31,
+0x30,0x20,0x10,0x00,
+0x31,0x2C,0x10,0x10,
+0x00,0x0A,0x09,0x08,
+0x00,0x00,0x12,0x11,
+0x10,0x08,0x00,0x22,
+0x21,0x20,0x18,0x00,
+0x22,0x21,0x20,0x18,
+0x00,0x31,0x30,0x20,
+0x10,0x00,0x31,0x2F,
+0x10,0x10,0x00,0x31,
+0x2F,0x10,0x10,0x00,
+0x31,0x10,0x10,0x00,
+0x00,0x31,0x2C,0x10,
+0x10,0x00,0x00,0x00,
+0x01,0x02,0x04,0x08,
+0x02,0x04,0x08,0x0C,
+0x10,0x18,0x20,0x30,
+0x02,0x04,0x08,0x0C,
+0x10,0x18,0x20,0x30,
+0x06,0x0C,0x10,0x18,
+0x24,0x30,0x3C,0x48,
+0x48,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x25,0x27,0x2C,
+0x19,0x1B,0x1E,0x20,
+0x23,0x29,0x2A,0x2B,
+0x00,0x00,0x00,0x00,
+0x25,0x29,0x2B,0x2E,
+0x2E,0x00,0x00,0x00,
+0x04,0x00,0x00,0x00,
+0x04,0x00,0x00,0x00,
+0x08,0x00,0x00,0x00,
+0x10,0x00,0x00,0x00,
+0x18,0x00,0x00,0x00,
+0x24,0x00,0x00,0x00,
+0x30,0x00,0x00,0x00,
+0x48,0x00,0x00,0x00,
+0x60,0x00,0x00,0x00,
+0x90,0x00,0x00,0x00,
+0xC0,0x00,0x00,0x00,
+0xD8,0x00,0x00,0x00,
+0x50,0x00,0x00,0x00,
+0x78,0x00,0x00,0x00,
+0xA0,0x00,0x00,0x00,
+0xC8,0x00,0x00,0x00,
+0x40,0x01,0x00,0x00,
+0x90,0x01,0x00,0x00,
+0xE0,0x01,0x00,0x00,
+0x30,0x02,0x00,0x00,
+0x2C,0x01,0x00,0x00,
+0x40,0x01,0x00,0x00,
+0xE0,0x01,0x00,0x00,
+0xD0,0x02,0x00,0x00,
+0x80,0x0C,0x00,0x00,
+0x80,0x0C,0x00,0x00,
+0x80,0x0C,0x00,0x00,
+0xA0,0x0F,0x00,0x00,
+0xA0,0x0F,0x00,0x00,
+0x02,0x00,0x00,0x00,
+0x02,0x00,0x00,0x00,
+0x04,0x00,0x00,0x00,
+0x08,0x00,0x00,0x00,
+0x0C,0x00,0x00,0x00,
+0x12,0x00,0x00,0x00,
+0x18,0x00,0x00,0x00,
+0x24,0x00,0x00,0x00,
+0x30,0x00,0x00,0x00,
+0x48,0x00,0x00,0x00,
+0x60,0x00,0x00,0x00,
+0x6C,0x00,0x00,0x00,
+0x28,0x00,0x00,0x00,
+0x3C,0x00,0x00,0x00,
+0x50,0x00,0x00,0x00,
+0x64,0x00,0x00,0x00,
+0xA0,0x00,0x00,0x00,
+0xC8,0x00,0x00,0x00,
+0xF0,0x00,0x00,0x00,
+0x18,0x01,0x00,0x00,
+0x64,0x00,0x00,0x00,
+0xA0,0x00,0x00,0x00,
+0xF0,0x00,0x00,0x00,
+0x68,0x01,0x00,0x00,
+0x40,0x06,0x00,0x00,
+0x40,0x06,0x00,0x00,
+0x40,0x06,0x00,0x00,
+0xD0,0x07,0x00,0x00,
+0xD0,0x07,0x00,0x00,
+0x72,0x65,0x73,0x65,
+0x74,0x28,0x25,0x78,
+0x29,0x0A,0x00,0x00,
+0xC8,0x82,0x01,0x80,
+0xC8,0xD0,0x00,0x80,
+0xC8,0xD0,0x00,0x80,
+0xC8,0xD0,0x00,0x80,
+0xC8,0xD0,0x00,0x80,
+0x14,0xCF,0x00,0x80,
+0xD0,0x82,0x01,0x80,
+0xC8,0x82,0x01,0x80,
+0xC8,0x82,0x01,0x80,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0xF0,0x85,0x01,0x80,
+0xF0,0x85,0x01,0x80,
+0xF0,0x85,0x01,0x80,
+0xF0,0x85,0x01,0x80,
+0xA8,0x82,0x01,0x80,
+0x00,0x85,0x01,0x80,
+0xB0,0x82,0x01,0x80,
+0xB8,0x82,0x01,0x80,
+0xC0,0x82,0x01,0x80,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x08,0x04,0x04,0x08,
+0x02,0x02,0x01,0x01,
+0x50,0x53,0x00,0x00,
+0x80,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0xA0,0xA4,0x01,0x80,
+0x70,0xA3,0x01,0x80,
+0x70,0xA3,0x01,0x80,
+0x70,0xA3,0x01,0x80,
+0x68,0xA4,0x01,0x80,
+0x70,0xA3,0x01,0x80,
+0x70,0xA3,0x01,0x80,
+0x70,0xA3,0x01,0x80,
+0x30,0xA4,0x01,0x80,
+0x70,0xA3,0x01,0x80,
+0x70,0xA3,0x01,0x80,
+0x70,0xA3,0x01,0x80,
+0x70,0xA3,0x01,0x80,
+0x70,0xA3,0x01,0x80,
+0x70,0xA3,0x01,0x80,
+0x70,0xA3,0x01,0x80,
+0xF8,0xA3,0x01,0x80,
+0x70,0xA3,0x01,0x80,
+0x70,0xA3,0x01,0x80,
+0x70,0xA3,0x01,0x80,
+0xC0,0xA3,0x01,0x80,
+0x70,0xA3,0x01,0x80,
+0x70,0xA3,0x01,0x80,
+0x70,0xA3,0x01,0x80,
+0x88,0xA3,0x01,0x80,
+0x70,0xA3,0x01,0x80,
+0x70,0xA3,0x01,0x80,
+0x70,0xA3,0x01,0x80,
+0x48,0xA3,0x01,0x80,
+0xB8,0x06,0x00,0x80,
+0xAC,0x06,0x00,0x80,
+0xA0,0x06,0x00,0x80,
+0x94,0x06,0x00,0x80,
+0x88,0x06,0x00,0x80,
+0x7C,0x06,0x00,0x80,
+0x70,0x06,0x00,0x80,
+0x64,0x06,0x00,0x80,
+0x58,0x06,0x00,0x80,
+0x4C,0x06,0x00,0x80,
+0x04,0x06,0x00,0x80,
+0x30,0x1F,0x02,0x80,
+0xB0,0x03,0x25,0xB0,
+0x30,0x1F,0x02,0x80,
+0x30,0x1F,0x02,0x80,
+0x30,0x1F,0x02,0x80,
+0x30,0x1F,0x02,0x80,
+0x6A,0x6F,0x69,0x6E,
+0x62,0x73,0x73,0x5F,
+0x68,0x64,0x6C,0x00,
+0x00,0x0E,0x04,0x0E,
+0x10,0x0E,0x14,0x0E,
+0x18,0x0E,0x1C,0x0E,
+0x02,0x04,0x04,0x07,
+0x07,0x0D,0x0D,0x0D,
+0x02,0x07,0x07,0x0D,
+0x0D,0x0F,0x0F,0x0F,
+0x0F,0x00,0x00,0x00,
+0x72,0x65,0x70,0x6F,
+0x72,0x74,0x5F,0x73,
+0x75,0x72,0x76,0x65,
+0x79,0x5F,0x64,0x6F,
+0x6E,0x65,0x00,0x00,
+0x72,0x65,0x70,0x6F,
+0x72,0x74,0x5F,0x6A,
+0x6F,0x69,0x6E,0x5F,
+0x72,0x65,0x73,0x00,
+0x72,0x65,0x70,0x6F,
+0x72,0x74,0x5F,0x64,
+0x65,0x6C,0x5F,0x73,
+0x74,0x61,0x5F,0x65,
+0x76,0x65,0x6E,0x74,
+0x00,0x00,0x00,0x00,
+0x72,0x65,0x70,0x6F,
+0x72,0x74,0x5F,0x61,
+0x64,0x64,0x5F,0x73,
+0x74,0x61,0x5F,0x65,
+0x76,0x65,0x6E,0x74,
+0x00,0x00,0x00,0x00,
+0x69,0x73,0x73,0x75,
+0x65,0x5F,0x70,0x72,
+0x6F,0x62,0x65,0x72,
+0x65,0x71,0x00,0x00,
+0x69,0x73,0x73,0x75,
+0x65,0x5F,0x70,0x72,
+0x6F,0x62,0x65,0x72,
+0x73,0x70,0x00,0x00,
+0x72,0x65,0x70,0x6F,
+0x72,0x74,0x5F,0x42,
+0x53,0x53,0x49,0x44,
+0x5F,0x69,0x6E,0x66,
+0x6F,0x00,0x00,0x00,
+0x00,0x50,0xF2,0x01,
+0x69,0x73,0x73,0x75,
+0x65,0x5F,0x61,0x73,
+0x73,0x6F,0x63,0x72,
+0x65,0x71,0x00,0x00,
+0x00,0x50,0xF2,0x04,
+0x69,0x73,0x73,0x75,
+0x65,0x5F,0x61,0x63,
+0x74,0x69,0x6F,0x6E,
+0x00,0x00,0x00,0x00,
+0x69,0x73,0x73,0x75,
+0x65,0x5F,0x61,0x75,
+0x74,0x68,0x00,0x00,
+0x69,0x73,0x73,0x75,
+0x65,0x5F,0x64,0x65,
+0x61,0x75,0x74,0x68,
+0x00,0x00,0x00,0x00,
+0x69,0x73,0x73,0x75,
+0x65,0x5F,0x64,0x69,
+0x73,0x61,0x73,0x73,
+0x6F,0x63,0x00,0x00,
+0x69,0x73,0x73,0x75,
+0x65,0x5F,0x66,0x72,
+0x61,0x6D,0x65,0x00,
+0x69,0x73,0x73,0x75,
+0x65,0x5F,0x66,0x72,
+0x61,0x6D,0x65,0x5F,
+0x6C,0x65,0x6E,0x00,
+0x30,0x1F,0x02,0x80,
+0xB0,0x03,0x25,0xB0,
+0xF8,0x00,0x25,0xB0,
+0x18,0x03,0x25,0xB0,
+0x44,0x44,0x33,0x33,
+0x06,0x00,0x2A,0xB0,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x24,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0xA8,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x9C,0x3E,0x01,0x80,
+0x90,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x84,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x78,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x6C,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x60,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x54,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x48,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x3C,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x28,0x3E,0x01,0x80,
+0x30,0x3E,0x01,0x80,
+0x68,0x3F,0x01,0x80,
+0x5C,0x3F,0x01,0x80,
+0x50,0x3F,0x01,0x80,
+0x44,0x3F,0x01,0x80,
+0x38,0x3F,0x01,0x80,
+0x2C,0x3F,0x01,0x80,
+0x20,0x3F,0x01,0x80,
+0x14,0x3F,0x01,0x80,
+0x08,0x3F,0x01,0x80,
+0xFC,0x3E,0x01,0x80,
+0xF0,0x3E,0x01,0x80,
+0xE4,0x3E,0x01,0x80,
+0x00,0x50,0xF2,0x01,
+0x00,0x50,0xF2,0x02,
+0x00,0x0F,0xAC,0x02,
+0xBC,0xE3,0x01,0x80,
+0x67,0x66,0x66,0x66,
+0x7C,0x88,0x00,0x80,
+0x64,0x88,0x00,0x80,
+0x4C,0x88,0x00,0x80,
+0x34,0x88,0x00,0x80,
+0x1C,0x88,0x00,0x80,
+0x04,0x88,0x00,0x80,
+0xE0,0x87,0x00,0x80,
+0x00,0x02,0x00,0x00,
+0x08,0x09,0x00,0x00,
+0x18,0x96,0x00,0x80,
+0x24,0x96,0x00,0x80,
+0x30,0x96,0x00,0x80,
+0x3C,0x96,0x00,0x80,
+0x18,0x96,0x00,0x80,
+0x18,0x96,0x00,0x80,
+0x18,0x96,0x00,0x80,
+0x18,0x96,0x00,0x80,
+0x48,0x96,0x00,0x80,
+0x54,0x96,0x00,0x80,
+0x60,0x96,0x00,0x80,
+0x6C,0x96,0x00,0x80,
+0x30,0x1F,0x02,0x80,
+0x84,0x0E,0x25,0xB0,
+0x88,0x0E,0x25,0xB0,
+0x8C,0x0E,0x25,0xB0,
+0xD0,0x0E,0x25,0xB0,
+0xD8,0x0E,0x25,0xB0,
+0x20,0x08,0x25,0xB0,
+0x74,0x0E,0x25,0xB0,
+0x80,0x0E,0x25,0xB0,
+0x84,0x0E,0x25,0xB0,
+0x88,0x0E,0x25,0xB0,
+0x8C,0x0E,0x25,0xB0,
+0xD0,0x0E,0x25,0xB0,
+0xD8,0x0E,0x25,0xB0,
+0x14,0x0C,0x25,0xB0,
+0x88,0x0C,0x25,0xB0,
+0x1C,0x0C,0x25,0xB0,
+0xFE,0x01,0x80,0x7F,
+0xE2,0x01,0x80,0x78,
+0xC7,0x01,0xC0,0x71,
+0xAE,0x01,0x80,0x6B,
+0x95,0x01,0x40,0x65,
+0x7F,0x01,0xC0,0x5F,
+0x69,0x01,0x40,0x5A,
+0x55,0x01,0x40,0x55,
+0x42,0x01,0x80,0x50,
+0x30,0x01,0x00,0x4C,
+0x1F,0x01,0xC0,0x47,
+0x0F,0x01,0xC0,0x43,
+0x00,0x01,0x00,0x40,
+0xF2,0x00,0x80,0x3C,
+0xE4,0x00,0x00,0x39,
+0xD7,0x00,0xC0,0x35,
+0xCB,0x00,0xC0,0x32,
+0xC0,0x00,0x00,0x30,
+0xB5,0x00,0x40,0x2D,
+0xAB,0x00,0xC0,0x2A,
+0xA2,0x00,0x80,0x28,
+0x98,0x00,0x00,0x26,
+0x90,0x00,0x00,0x24,
+0x88,0x00,0x00,0x22,
+0x80,0x00,0x00,0x20,
+0x79,0x00,0x40,0x1E,
+0x72,0x00,0x80,0x1C,
+0x6C,0x00,0x00,0x1B,
+0x66,0x00,0x80,0x19,
+0x60,0x00,0x00,0x18,
+0x5B,0x00,0xC0,0x16,
+0x56,0x00,0x80,0x15,
+0x51,0x00,0x40,0x14,
+0x4C,0x00,0x00,0x13,
+0x48,0x00,0x00,0x12,
+0x44,0x00,0x00,0x11,
+0x40,0x00,0x00,0x10,
+0x36,0x35,0x2E,0x25,
+0x1C,0x12,0x09,0x04,
+0x33,0x32,0x2B,0x23,
+0x1A,0x11,0x08,0x04,
+0x30,0x2F,0x29,0x21,
+0x19,0x10,0x08,0x03,
+0x2D,0x2D,0x27,0x1F,
+0x18,0x0F,0x08,0x03,
+0x2B,0x2A,0x25,0x1E,
+0x16,0x0E,0x07,0x03,
+0x28,0x28,0x22,0x1C,
+0x15,0x0D,0x07,0x03,
+0x26,0x25,0x21,0x1B,
+0x14,0x0D,0x06,0x03,
+0x24,0x23,0x1F,0x19,
+0x13,0x0C,0x06,0x03,
+0x22,0x21,0x1D,0x18,
+0x11,0x0B,0x06,0x02,
+0x20,0x20,0x1B,0x16,
+0x11,0x08,0x05,0x02,
+0x1F,0x1E,0x1A,0x15,
+0x10,0x0A,0x05,0x02,
+0x1D,0x1C,0x18,0x14,
+0x0F,0x0A,0x05,0x02,
+0x1B,0x1A,0x17,0x13,
+0x0E,0x09,0x04,0x02,
+0x1A,0x19,0x16,0x12,
+0x0D,0x09,0x04,0x02,
+0x18,0x17,0x15,0x11,
+0x0C,0x08,0x04,0x02,
+0x17,0x16,0x13,0x10,
+0x0C,0x08,0x04,0x02,
+0x16,0x15,0x12,0x0F,
+0x0B,0x07,0x04,0x01,
+0x14,0x14,0x11,0x0E,
+0x0B,0x07,0x03,0x02,
+0x13,0x13,0x10,0x0D,
+0x0A,0x06,0x03,0x01,
+0x12,0x12,0x0F,0x0C,
+0x09,0x06,0x03,0x01,
+0x11,0x11,0x0F,0x0C,
+0x09,0x06,0x03,0x01,
+0x10,0x10,0x0E,0x0B,
+0x08,0x05,0x03,0x01,
+0x0F,0x0F,0x0D,0x0B,
+0x08,0x05,0x03,0x01,
+0x0E,0x0E,0x0C,0x0A,
+0x08,0x05,0x02,0x01,
+0x0D,0x0D,0x0C,0x0A,
+0x07,0x05,0x02,0x01,
+0x0D,0x0C,0x0B,0x09,
+0x07,0x04,0x02,0x01,
+0x0C,0x0C,0x0A,0x09,
+0x06,0x04,0x02,0x01,
+0x0B,0x0B,0x0A,0x08,
+0x06,0x04,0x02,0x01,
+0x0B,0x0A,0x09,0x08,
+0x06,0x04,0x02,0x01,
+0x0A,0x0A,0x09,0x07,
+0x05,0x03,0x02,0x01,
+0x0A,0x09,0x08,0x07,
+0x05,0x03,0x02,0x01,
+0x09,0x09,0x08,0x06,
+0x05,0x03,0x01,0x01,
+0x09,0x08,0x07,0x06,
+0x04,0x03,0x01,0x01,
+0x36,0x35,0x2E,0x1B,
+0x00,0x00,0x00,0x00,
+0x33,0x32,0x2B,0x19,
+0x00,0x00,0x00,0x00,
+0x30,0x2F,0x29,0x18,
+0x00,0x00,0x00,0x00,
+0x2D,0x2D,0x17,0x17,
+0x00,0x00,0x00,0x00,
+0x2B,0x2A,0x25,0x15,
+0x00,0x00,0x00,0x00,
+0x28,0x28,0x24,0x14,
+0x00,0x00,0x00,0x00,
+0x26,0x25,0x21,0x13,
+0x00,0x00,0x00,0x00,
+0x24,0x23,0x1F,0x12,
+0x00,0x00,0x00,0x00,
+0x22,0x21,0x1D,0x11,
+0x00,0x00,0x00,0x00,
+0x20,0x20,0x1B,0x10,
+0x00,0x00,0x00,0x00,
+0x1F,0x1E,0x1A,0x0F,
+0x00,0x00,0x00,0x00,
+0x1D,0x1C,0x18,0x0E,
+0x00,0x00,0x00,0x00,
+0x1B,0x1A,0x17,0x0E,
+0x00,0x00,0x00,0x00,
+0x1A,0x19,0x16,0x0D,
+0x00,0x00,0x00,0x00,
+0x18,0x17,0x15,0x0C,
+0x00,0x00,0x00,0x00,
+0x17,0x16,0x13,0x0B,
+0x00,0x00,0x00,0x00,
+0x16,0x15,0x12,0x0B,
+0x00,0x00,0x00,0x00,
+0x14,0x14,0x11,0x0A,
+0x00,0x00,0x00,0x00,
+0x13,0x13,0x10,0x0A,
+0x00,0x00,0x00,0x00,
+0x12,0x12,0x0F,0x09,
+0x00,0x00,0x00,0x00,
+0x11,0x11,0x0F,0x09,
+0x00,0x00,0x00,0x00,
+0x10,0x10,0x0E,0x08,
+0x00,0x00,0x00,0x00,
+0x0F,0x0F,0x0D,0x08,
+0x00,0x00,0x00,0x00,
+0x0E,0x0E,0x0C,0x07,
+0x00,0x00,0x00,0x00,
+0x0D,0x0D,0x0C,0x07,
+0x00,0x00,0x00,0x00,
+0x0D,0x0C,0x0B,0x06,
+0x00,0x00,0x00,0x00,
+0x0C,0x0C,0x0A,0x06,
+0x00,0x00,0x00,0x00,
+0x0B,0x0B,0x0A,0x06,
+0x00,0x00,0x00,0x00,
+0x0B,0x0A,0x09,0x05,
+0x00,0x00,0x00,0x00,
+0x0A,0x0A,0x09,0x05,
+0x00,0x00,0x00,0x00,
+0x0A,0x09,0x08,0x05,
+0x00,0x00,0x00,0x00,
+0x09,0x09,0x08,0x05,
+0x00,0x00,0x00,0x00,
+0x09,0x08,0x07,0x04,
+0x00,0x00,0x00,0x00,
+0x06,0x00,0x2A,0xB0,
+0x05,0x00,0x2A,0xB0,
+0x54,0x83,0x01,0x80,
+0xC4,0x83,0x01,0x80,
+0x80,0x83,0x01,0x80,
+0xC4,0x83,0x01,0x80,
+0xC4,0x83,0x01,0x80,
+0xC4,0x83,0x01,0x80,
+0xC4,0x83,0x01,0x80,
+0x2C,0x83,0x01,0x80,
+0x00,0x01,0x02,0x02,
+0x03,0x03,0x03,0x03,
+0x04,0x04,0x04,0x04,
+0x04,0x04,0x04,0x04,
+0x05,0x05,0x05,0x05,
+0x05,0x05,0x05,0x05,
+0x05,0x05,0x05,0x05,
+0x05,0x05,0x05,0x05,
+0x06,0x06,0x06,0x06,
+0x06,0x06,0x06,0x06,
+0x06,0x06,0x06,0x06,
+0x06,0x06,0x06,0x06,
+0x06,0x06,0x06,0x06,
+0x06,0x06,0x06,0x06,
+0x06,0x06,0x06,0x06,
+0x06,0x06,0x06,0x06,
+0x07,0x07,0x07,0x07,
+0x07,0x07,0x07,0x07,
+0x07,0x07,0x07,0x07,
+0x07,0x07,0x07,0x07,
+0x07,0x07,0x07,0x07,
+0x07,0x07,0x07,0x07,
+0x07,0x07,0x07,0x07,
+0x07,0x07,0x07,0x07,
+0x07,0x07,0x07,0x07,
+0x07,0x07,0x07,0x07,
+0x07,0x07,0x07,0x07,
+0x07,0x07,0x07,0x07,
+0x07,0x07,0x07,0x07,
+0x07,0x07,0x07,0x07,
+0x07,0x07,0x07,0x07,
+0x07,0x07,0x07,0x07,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x28,0x28,0x28,
+0x28,0x28,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,
+0xA0,0x10,0x10,0x10,
+0x10,0x10,0x10,0x10,
+0x10,0x10,0x10,0x10,
+0x10,0x10,0x10,0x10,
+0x04,0x04,0x04,0x04,
+0x04,0x04,0x04,0x04,
+0x04,0x04,0x10,0x10,
+0x10,0x10,0x10,0x10,
+0x10,0x41,0x41,0x41,
+0x41,0x41,0x41,0x01,
+0x01,0x01,0x01,0x01,
+0x01,0x01,0x01,0x01,
+0x01,0x01,0x01,0x01,
+0x01,0x01,0x01,0x01,
+0x01,0x01,0x01,0x10,
+0x10,0x10,0x10,0x10,
+0x10,0x42,0x42,0x42,
+0x42,0x42,0x42,0x02,
+0x02,0x02,0x02,0x02,
+0x02,0x02,0x02,0x02,
+0x02,0x02,0x02,0x02,
+0x02,0x02,0x02,0x02,
+0x02,0x02,0x02,0x10,
+0x10,0x10,0x10,0x08,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0xA0,0x10,0x10,0x10,
+0x10,0x10,0x10,0x10,
+0x10,0x10,0x10,0x10,
+0x10,0x10,0x10,0x10,
+0x10,0x10,0x10,0x10,
+0x10,0x10,0x10,0x10,
+0x10,0x10,0x10,0x10,
+0x10,0x10,0x10,0x10,
+0x01,0x01,0x01,0x01,
+0x01,0x01,0x01,0x01,
+0x01,0x01,0x01,0x01,
+0x01,0x01,0x01,0x01,
+0x01,0x01,0x01,0x01,
+0x01,0x01,0x01,0x10,
+0x01,0x01,0x01,0x01,
+0x01,0x01,0x01,0x02,
+0x02,0x02,0x02,0x02,
+0x02,0x02,0x02,0x02,
+0x02,0x02,0x02,0x02,
+0x02,0x02,0x02,0x02,
+0x02,0x02,0x02,0x02,
+0x02,0x02,0x02,0x10,
+0x02,0x02,0x02,0x02,
+0x02,0x02,0x02,0x00,
+0x2D,0x5C,0x7C,0x2F,
+0x00,0x00,0x00,0x00,
+0xFD,0xFA,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x45,0xC4,0xF0,
+0x00,0x45,0xC4,0xF0,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x00,0x45,0xB5,0x60,
+0xFF,0xFF,0xFF,0xFF,
+0x00,0x00,0x00,0x02,
+0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,
+0x08,0xFB,0x90,0xB8,
+0xFF,0xFF,0xFF,0xFF,
+};
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/h2clbk.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/h2clbk.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/h2clbk.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/h2clbk.h	2017-09-23 03:42:50.026675040 +0800
@@ -0,0 +1,35 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+
+#define _H2CLBK_H_
+
+
+#include <rtl8711_spec.h>
+#include <TypeDef.h>
+
+
+void _lbk_cmd(PADAPTER Adapter);
+
+void _lbk_rsp(PADAPTER Adapter);
+
+void _lbk_evt(IN PADAPTER Adapter);
+
+void h2c_event_callback(unsigned char *dev, unsigned char *pbuf);
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/Hal8192CEHWImg.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/Hal8192CEHWImg.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/Hal8192CEHWImg.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/Hal8192CEHWImg.h	2017-09-23 03:42:50.026675040 +0800
@@ -0,0 +1,81 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __INC_HAL8192CE_FW_IMG_H
+#define __INC_HAL8192CE_FW_IMG_H
+
+#include <basic_types.h>
+
+/*Created on  2011/ 6/15,  5:45*/
+
+#ifdef CONFIG_BT_COEXISTENCE
+#define TSMCImgArrayLength 16248 //v79 TSMC COMMON 2011-10-06
+#else //#ifdef CONFIG_P2P
+#define TSMCImgArrayLength 16404 //v79 TSMC P2PPS 2011-10-06
+#endif
+extern u8 Rtl8192CEFwTSMCImgArray[TSMCImgArrayLength];
+
+#ifdef CONFIG_BT_COEXISTENCE
+#define UMCACutImgArrayLength 16248 //v79 UMC A Cut COMMON 2011-10-06
+#else //#ifdef CONFIG_P2P
+#define UMCACutImgArrayLength 16404 //v79 UMC A Cut P2PPS 2011-10-06
+#endif
+extern u8 Rtl8192CEFwUMCACutImgArray[UMCACutImgArrayLength];
+
+#ifdef CONFIG_BT_COEXISTENCE
+#define UMCBCutImgArrayLength 16254 //v79 UMC B Cut COMMON 2011-10-06
+#else //#ifdef CONFIG_P2P
+#define UMCBCutImgArrayLength 16386 //v79 UMC B Cut P2PPS 2011-10-06
+#endif
+extern u8 Rtl8192CEFwUMCBCutImgArray[UMCBCutImgArrayLength];
+
+#define PHY_REG_2TArrayLength 374
+extern u32 Rtl8192CEPHY_REG_2TArray[PHY_REG_2TArrayLength];
+#define PHY_REG_1TArrayLength 374
+extern u32 Rtl8192CEPHY_REG_1TArray[PHY_REG_1TArrayLength];
+#define PHY_ChangeTo_1T1RArrayLength 1
+extern u32 Rtl8192CEPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength];
+#define PHY_ChangeTo_1T2RArrayLength 1
+extern u32 Rtl8192CEPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength];
+#define PHY_ChangeTo_2T2RArrayLength 1
+extern u32 Rtl8192CEPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength];
+#define PHY_REG_Array_PGLength 336
+extern u32 Rtl8192CEPHY_REG_Array_PG[PHY_REG_Array_PGLength];
+#define PHY_REG_Array_MPLength 4
+extern u32 Rtl8192CEPHY_REG_Array_MP[PHY_REG_Array_MPLength];
+#define RadioA_2TArrayLength 282
+extern u32 Rtl8192CERadioA_2TArray[RadioA_2TArrayLength];
+#define RadioB_2TArrayLength 78
+extern u32 Rtl8192CERadioB_2TArray[RadioB_2TArrayLength];
+#define RadioA_1TArrayLength 282
+extern u32 Rtl8192CERadioA_1TArray[RadioA_1TArrayLength];
+#define RadioB_1TArrayLength 1
+extern u32 Rtl8192CERadioB_1TArray[RadioB_1TArrayLength];
+#define RadioB_GM_ArrayLength 1
+extern u32 Rtl8192CERadioB_GM_Array[RadioB_GM_ArrayLength];
+#define MAC_2T_ArrayLength 172
+extern u32 Rtl8192CEMAC_2T_Array[MAC_2T_ArrayLength];
+#define MACPHY_Array_PGLength 1
+extern u32 Rtl8192CEMACPHY_Array_PG[MACPHY_Array_PGLength];
+#define AGCTAB_2TArrayLength 320
+extern u32 Rtl8192CEAGCTAB_2TArray[AGCTAB_2TArrayLength];
+#define AGCTAB_1TArrayLength 320
+extern u32 Rtl8192CEAGCTAB_1TArray[AGCTAB_1TArrayLength];
+
+#endif //__INC_HAL8192CE_FW_IMG_H
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/Hal8192CPhyCfg.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/Hal8192CPhyCfg.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/Hal8192CPhyCfg.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/Hal8192CPhyCfg.h	2017-09-23 03:42:50.026675040 +0800
@@ -0,0 +1,451 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+/*****************************************************************************
+ * Module:	__INC_HAL8192CPHYCFG_H
+ *
+ *
+ * Note:	
+ *			
+ *
+ * Export:	Constants, macro, functions(API), global variables(None).
+ *
+ * Abbrev:	
+ *
+ * History:
+ *		Data		Who		Remark 
+ *      08/07/2007  MHC    	1. Porting from 9x series PHYCFG.h.
+ *							2. Reorganize code architecture.
+ * 
+ *****************************************************************************/
+ /* Check to see if the file has been included already.  */
+#ifndef __INC_HAL8192CPHYCFG_H
+#define __INC_HAL8192CPHYCFG_H
+
+
+/*--------------------------Define Parameters-------------------------------*/
+#define LOOP_LIMIT				5
+#define MAX_STALL_TIME			50		//us
+#define AntennaDiversityValue	0x80	//(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80)
+#define MAX_TXPWR_IDX_NMODE_92S	63
+#define Reset_Cnt_Limit			3
+
+#define IQK_MAC_REG_NUM		4
+#define IQK_ADDA_REG_NUM		16
+#define IQK_BB_REG_NUM			9
+#define HP_THERMAL_NUM		8
+
+#ifdef CONFIG_PCI_HCI
+#define MAX_AGGR_NUM	0x0A0A
+#else
+#define MAX_AGGR_NUM	0x0909
+#endif
+
+#ifdef CONFIG_PCI_HCI
+#define	SET_RTL8192SE_RF_SLEEP(_pAdapter)							\
+{																	\
+	u1Byte		u1bTmp;												\
+	u1bTmp = PlatformEFIORead1Byte(_pAdapter, REG_LDOV12D_CTRL);		\
+	u1bTmp |= BIT0;													\
+	PlatformEFIOWrite1Byte(_pAdapter, REG_LDOV12D_CTRL, u1bTmp);		\
+	PlatformEFIOWrite1Byte(_pAdapter, REG_SPS_OCP_CFG, 0x0);				\
+	PlatformEFIOWrite1Byte(_pAdapter, TXPAUSE, 0xFF);				\
+	PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC);				\
+	delay_us(100);													\
+	PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC);				\
+	PlatformEFIOWrite1Byte(_pAdapter, PHY_CCA, 0x0);				\
+	delay_us(10);													\
+	PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x37FC);				\
+	delay_us(10);													\
+	PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC);				\
+	delay_us(10);													\
+	PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC);				\
+}
+#endif
+
+
+/*--------------------------Define Parameters-------------------------------*/
+
+
+/*------------------------------Define structure----------------------------*/ 
+typedef enum _SwChnlCmdID{
+	CmdID_End,
+	CmdID_SetTxPowerLevel,
+	CmdID_BBRegWrite10,
+	CmdID_WritePortUlong,
+	CmdID_WritePortUshort,
+	CmdID_WritePortUchar,
+	CmdID_RF_WriteReg,
+}SwChnlCmdID;
+
+
+/* 1. Switch channel related */
+typedef struct _SwChnlCmd{
+	SwChnlCmdID	CmdID;
+	u32			Para1;
+	u32			Para2;
+	u32			msDelay;
+}SwChnlCmd;
+
+typedef enum _HW90_BLOCK{
+	HW90_BLOCK_MAC = 0,
+	HW90_BLOCK_PHY0 = 1,
+	HW90_BLOCK_PHY1 = 2,
+	HW90_BLOCK_RF = 3,
+	HW90_BLOCK_MAXIMUM = 4, // Never use this
+}HW90_BLOCK_E, *PHW90_BLOCK_E;
+
+typedef enum _RF90_RADIO_PATH{
+	RF90_PATH_A = 0,			//Radio Path A
+	RF90_PATH_B = 1,			//Radio Path B
+	RF90_PATH_C = 2,			//Radio Path C
+	RF90_PATH_D = 3,			//Radio Path D
+	//RF90_PATH_MAX				//Max RF number 90 support 
+}RF90_RADIO_PATH_E, *PRF90_RADIO_PATH_E;
+
+#define	RF90_PATH_MAX			2
+
+#define CHANNEL_MAX_NUMBER		14	// 14 is the max channel number
+#define CHANNEL_GROUP_MAX		3	// ch1~3, ch4~9, ch10~14 total three groups
+
+typedef enum _WIRELESS_MODE {
+	WIRELESS_MODE_UNKNOWN = 0x00,
+	WIRELESS_MODE_A = 0x01,
+	WIRELESS_MODE_B = 0x02,
+	WIRELESS_MODE_G = 0x04,
+	WIRELESS_MODE_AUTO = 0x08,
+	WIRELESS_MODE_N_24G = 0x10,
+	WIRELESS_MODE_N_5G = 0x20
+} WIRELESS_MODE;
+
+typedef enum _BaseBand_Config_Type{
+	BaseBand_Config_PHY_REG = 0,			//Radio Path A
+	BaseBand_Config_AGC_TAB = 1,			//Radio Path B
+}BaseBand_Config_Type, *PBaseBand_Config_Type;
+
+
+typedef enum _PHY_Rate_Tx_Power_Offset_Area{
+	RA_OFFSET_LEGACY_OFDM1,
+	RA_OFFSET_LEGACY_OFDM2,
+	RA_OFFSET_HT_OFDM1,
+	RA_OFFSET_HT_OFDM2,
+	RA_OFFSET_HT_OFDM3,
+	RA_OFFSET_HT_OFDM4,
+	RA_OFFSET_HT_CCK,
+}RA_OFFSET_AREA,*PRA_OFFSET_AREA;
+
+
+/* BB/RF related */
+typedef	enum _RF_TYPE_8190P{
+	RF_TYPE_MIN,	// 0
+	RF_8225=1,			// 1 11b/g RF for verification only
+	RF_8256=2,			// 2 11b/g/n 
+	RF_8258=3,			// 3 11a/b/g/n RF
+	RF_6052=4,		// 4 11b/g/n RF
+	//RF_6052=5,		// 4 11b/g/n RF
+	// TODO: We sholud remove this psudo PHY RF after we get new RF.
+	RF_PSEUDO_11N=5,	// 5, It is a temporality RF. 
+}RF_TYPE_8190P_E,*PRF_TYPE_8190P_E;
+
+
+typedef enum _RATR_TABLE_MODE_8192C{
+	RATR_INX_WIRELESS_NGB = 0,
+	RATR_INX_WIRELESS_NG = 1,
+	RATR_INX_WIRELESS_NB = 2,
+	RATR_INX_WIRELESS_N = 3,
+	RATR_INX_WIRELESS_GB = 4,
+	RATR_INX_WIRELESS_G = 5,
+	RATR_INX_WIRELESS_B = 6,
+	RATR_INX_WIRELESS_MC = 7,
+	RATR_INX_WIRELESS_A = 8,
+}RATR_TABLE_MODE_8192C, *PRATR_TABLE_MODE_8192C;
+
+typedef struct _BB_REGISTER_DEFINITION{
+	u32 rfintfs;			// set software control: 
+							//		0x870~0x877[8 bytes]
+							
+	u32 rfintfi;			// readback data: 
+							//		0x8e0~0x8e7[8 bytes]
+							
+	u32 rfintfo; 		// output data: 
+							//		0x860~0x86f [16 bytes]
+							
+	u32 rfintfe; 		// output enable: 
+							//		0x860~0x86f [16 bytes]
+							
+	u32 rf3wireOffset;	// LSSI data:
+							//		0x840~0x84f [16 bytes]
+							
+	u32 rfLSSI_Select;	// BB Band Select: 
+							//		0x878~0x87f [8 bytes]
+							
+	u32 rfTxGainStage;	// Tx gain stage: 
+							//		0x80c~0x80f [4 bytes]
+							
+	u32 rfHSSIPara1; 	// wire parameter control1 : 
+							//		0x820~0x823,0x828~0x82b, 0x830~0x833, 0x838~0x83b [16 bytes]
+							
+	u32 rfHSSIPara2; 	// wire parameter control2 : 
+							//		0x824~0x827,0x82c~0x82f, 0x834~0x837, 0x83c~0x83f [16 bytes]
+								
+	u32 rfSwitchControl; //Tx Rx antenna control : 
+							//		0x858~0x85f [16 bytes]
+								
+	u32 rfAGCControl1; 	//AGC parameter control1 : 
+							//		0xc50~0xc53,0xc58~0xc5b, 0xc60~0xc63, 0xc68~0xc6b [16 bytes] 
+								
+	u32 rfAGCControl2; 	//AGC parameter control2 : 
+							//		0xc54~0xc57,0xc5c~0xc5f, 0xc64~0xc67, 0xc6c~0xc6f [16 bytes] 
+							
+	u32 rfRxIQImbalance; //OFDM Rx IQ imbalance matrix : 
+							//		0xc14~0xc17,0xc1c~0xc1f, 0xc24~0xc27, 0xc2c~0xc2f [16 bytes]
+							
+	u32 rfRxAFE;  		//Rx IQ DC ofset and Rx digital filter, Rx DC notch filter : 
+							//		0xc10~0xc13,0xc18~0xc1b, 0xc20~0xc23, 0xc28~0xc2b [16 bytes]
+							
+	u32 rfTxIQImbalance; //OFDM Tx IQ imbalance matrix
+							//		0xc80~0xc83,0xc88~0xc8b, 0xc90~0xc93, 0xc98~0xc9b [16 bytes]
+							
+	u32 rfTxAFE; 		//Tx IQ DC Offset and Tx DFIR type
+							//		0xc84~0xc87,0xc8c~0xc8f, 0xc94~0xc97, 0xc9c~0xc9f [16 bytes]
+								
+	u32 rfLSSIReadBack; 	//LSSI RF readback data SI mode
+								//		0x8a0~0x8af [16 bytes]
+
+	u32 rfLSSIReadBackPi; 	//LSSI RF readback data PI mode 0x8b8-8bc for Path A and B
+
+}BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T;
+
+#ifdef CONFIG_MP_INCLUDED
+typedef enum _ANTENNA_PATH{
+        ANTENNA_NONE 	= 0x00,
+		ANTENNA_D		,
+		ANTENNA_C		,
+		ANTENNA_CD		,
+		ANTENNA_B		,
+		ANTENNA_BD		,
+		ANTENNA_BC		,
+		ANTENNA_BCD		,
+		ANTENNA_A		,
+		ANTENNA_AD		,
+		ANTENNA_AC		,
+		ANTENNA_ACD		,
+		ANTENNA_AB		,
+		ANTENNA_ABD		,
+		ANTENNA_ABC		,
+		ANTENNA_ABCD	
+} ANTENNA_PATH;
+#endif
+
+typedef struct _R_ANTENNA_SELECT_OFDM{	
+	u32			r_tx_antenna:4;	
+	u32			r_ant_l:4;
+	u32			r_ant_non_ht:4;	
+	u32			r_ant_ht1:4;
+	u32			r_ant_ht2:4;
+	u32			r_ant_ht_s1:4;
+	u32			r_ant_non_ht_s1:4;
+	u32			OFDM_TXSC:2;
+	u32			Reserved:2;
+}R_ANTENNA_SELECT_OFDM;
+
+typedef struct _R_ANTENNA_SELECT_CCK{
+	u8			r_cckrx_enable_2:2;	
+	u8			r_cckrx_enable:2;
+	u8			r_ccktx_enable:4;
+}R_ANTENNA_SELECT_CCK;
+
+/*------------------------------Define structure----------------------------*/ 
+
+
+/*------------------------Export global variable----------------------------*/
+/*------------------------Export global variable----------------------------*/
+
+
+/*------------------------Export Marco Definition---------------------------*/
+/*------------------------Export Marco Definition---------------------------*/
+
+
+/*--------------------------Exported Function prototype---------------------*/
+//
+// BB and RF register read/write
+//
+u32	rtl8192c_PHY_QueryBBReg(	IN	PADAPTER	Adapter,
+								IN	u32		RegAddr,
+								IN	u32		BitMask	);
+void	rtl8192c_PHY_SetBBReg(	IN	PADAPTER	Adapter,
+								IN	u32		RegAddr,
+								IN	u32		BitMask,
+								IN	u32		Data	);
+u32	rtl8192c_PHY_QueryRFReg(	IN	PADAPTER			Adapter,
+								IN	RF90_RADIO_PATH_E	eRFPath,
+								IN	u32				RegAddr,
+								IN	u32				BitMask	);
+void	rtl8192c_PHY_SetRFReg(	IN	PADAPTER			Adapter,
+								IN	RF90_RADIO_PATH_E	eRFPath,
+								IN	u32				RegAddr,
+								IN	u32				BitMask,
+								IN	u32				Data	);
+
+//
+// Initialization related function
+//
+/* MAC/BB/RF HAL config */
+int	PHY_MACConfig8192C(	IN	PADAPTER	Adapter	);
+int	PHY_BBConfig8192C(	IN	PADAPTER	Adapter	);
+int	PHY_RFConfig8192C(	IN	PADAPTER	Adapter	);
+/* RF config */
+int	rtl8192c_PHY_ConfigRFWithParaFile(	IN	PADAPTER	Adapter,
+												IN	u8* 	pFileName,
+												IN	RF90_RADIO_PATH_E	eRFPath);
+int	rtl8192c_PHY_ConfigRFWithHeaderFile(	IN	PADAPTER			Adapter,
+												IN	RF90_RADIO_PATH_E	eRFPath);
+
+/* BB/RF readback check for making sure init OK */
+int	rtl8192c_PHY_CheckBBAndRFOK(	IN	PADAPTER			Adapter,
+										IN	HW90_BLOCK_E		CheckBlock,
+										IN	RF90_RADIO_PATH_E	eRFPath	  );
+/* Read initi reg value for tx power setting. */
+void	rtl8192c_PHY_GetHWRegOriginalValue(	IN	PADAPTER		Adapter	);
+
+//
+// RF Power setting
+//
+//extern	BOOLEAN	PHY_SetRFPowerState(IN	PADAPTER			Adapter, 
+//									IN	RT_RF_POWER_STATE	eRFPowerState);
+
+//
+// BB TX Power R/W
+//
+void	PHY_GetTxPowerLevel8192C(	IN	PADAPTER		Adapter,
+											OUT u32*    		powerlevel	);
+void	PHY_SetTxPowerLevel8192C(	IN	PADAPTER		Adapter,
+											IN	u8			channel	);
+BOOLEAN	PHY_UpdateTxPowerDbm8192C(	IN	PADAPTER	Adapter,
+											IN	int		powerInDbm	);
+
+//
+VOID 
+PHY_ScanOperationBackup8192C(IN	PADAPTER	Adapter,
+										IN	u8		Operation	);
+
+//
+// Switch bandwidth for 8192S
+//
+//extern	void	PHY_SetBWModeCallback8192C(	IN	PRT_TIMER		pTimer	);
+void	PHY_SetBWMode8192C(	IN	PADAPTER			pAdapter,
+									IN	HT_CHANNEL_WIDTH	ChnlWidth,
+									IN	unsigned char	Offset	);
+
+//
+// Set FW CMD IO for 8192S.
+//
+//extern	BOOLEAN HalSetIO8192C(	IN	PADAPTER			Adapter,
+//									IN	IO_TYPE				IOType);
+
+//
+// Set A2 entry to fw for 8192S
+//
+extern	void FillA2Entry8192C(		IN	PADAPTER			Adapter,
+										IN	u8				index,
+										IN	u8*				val);
+
+
+//
+// channel switch related funciton
+//
+//extern	void	PHY_SwChnlCallback8192C(	IN	PRT_TIMER		pTimer	);
+void	PHY_SwChnl8192C(	IN	PADAPTER		pAdapter,
+									IN	u8			channel	);
+				// Call after initialization
+void	PHY_SwChnlPhy8192C(	IN	PADAPTER		pAdapter,
+									IN	u8			channel	);
+
+void ChkFwCmdIoDone(	IN	PADAPTER	Adapter);
+
+#ifdef USE_WORKITEM	
+//extern 	void SetIOWorkItemCallback( IN PVOID            pContext );
+#else
+//extern	void SetIOTimerCallback( IN PRT_TIMER		pTimer);
+#endif	
+				
+//
+// BB/MAC/RF other monitor API
+//
+void	PHY_SetMonitorMode8192C(IN	PADAPTER	pAdapter,
+										IN	BOOLEAN		bEnableMonitorMode	);
+
+BOOLEAN	PHY_CheckIsLegalRfPath8192C(IN	PADAPTER	pAdapter,
+											IN	u32		eRFPath	);
+
+//
+// IQ calibrate
+//
+VOID rtl8192c_PHY_IQCalibrate( IN PADAPTER pAdapter , IN BOOLEAN bReCovery);
+
+//
+// LC calibrate
+//
+VOID rtl8192c_PHY_LCCalibrate(IN	PADAPTER	pAdapter);
+
+//
+// AP calibrate
+//
+VOID rtl8192c_PHY_APCalibrate(IN	PADAPTER	pAdapter, IN 	char		delta);
+
+VOID rtl8192c_PHY_DigitalPredistortion(IN	PADAPTER	pAdapter);
+
+VOID rtl8192c_PHY_SetRFPathSwitch(IN	PADAPTER	pAdapter, IN	BOOLEAN		bMain);
+
+//
+// Modify the value of the hw register when beacon interval be changed.
+//
+void	
+rtl8192c_PHY_SetBeaconHwReg(	IN	PADAPTER		Adapter,
+					IN	u16			BeaconInterval	);
+
+
+extern	VOID
+PHY_SwitchEphyParameter(
+	IN	PADAPTER			Adapter
+	);
+
+extern	VOID
+PHY_EnableHostClkReq(
+	IN	PADAPTER			Adapter
+	);
+
+BOOLEAN
+SetAntennaConfig92C(
+	IN	PADAPTER	Adapter,
+	IN	u8		DefaultAnt	
+	);
+
+
+/*--------------------------Exported Function prototype---------------------*/
+
+#define PHY_QueryBBReg(Adapter, RegAddr, BitMask) rtl8192c_PHY_QueryBBReg((Adapter), (RegAddr), (BitMask))
+#define PHY_SetBBReg(Adapter, RegAddr, BitMask, Data) rtl8192c_PHY_SetBBReg((Adapter), (RegAddr), (BitMask), (Data))
+#define PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask) rtl8192c_PHY_QueryRFReg((Adapter), (eRFPath), (RegAddr), (BitMask))
+#define PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data) rtl8192c_PHY_SetRFReg((Adapter), (eRFPath), (RegAddr), (BitMask), (Data))
+
+#define PHY_SetMacReg	PHY_SetBBReg
+
+#endif	// __INC_HAL8192CPHYCFG_H
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/Hal8192CPhyReg.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/Hal8192CPhyReg.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/Hal8192CPhyReg.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/Hal8192CPhyReg.h	2017-09-23 03:42:50.026675040 +0800
@@ -0,0 +1,1102 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+/*****************************************************************************
+ *
+ * Module:	__INC_HAL8192CPHYREG_H
+ *
+ *
+ * Note:	1. Define PMAC/BB register map
+ *			2. Define RF register map
+ *			3. PMAC/BB register bit mask.
+ *			4. RF reg bit mask.
+ *			5. Other BB/RF relative definition.
+ *			
+ *
+ * Export:	Constants, macro, functions(API), global variables(None).
+ *
+ * Abbrev:	
+ *
+ * History:
+ *		Data		Who		Remark 
+ *      08/07/2007  MHC    	1. Porting from 9x series PHYCFG.h.
+ *							2. Reorganize code architecture.
+ *	09/25/2008	MH		1. Add RL6052 register definition
+ * 
+ *****************************************************************************/
+#ifndef __INC_HAL8192CPHYREG_H
+#define __INC_HAL8192CPHYREG_H
+
+
+/*--------------------------Define Parameters-------------------------------*/
+
+//============================================================
+//       8192S Regsiter offset definition
+//============================================================
+
+//
+// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF
+// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF
+// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00
+// 3. RF register 0x00-2E
+// 4. Bit Mask for BB/RF register
+// 5. Other defintion for BB/RF R/W
+//
+
+
+//
+// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF
+// 1. Page1(0x100)
+//
+#define		rPMAC_Reset					0x100
+#define		rPMAC_TxStart					0x104
+#define		rPMAC_TxLegacySIG				0x108
+#define		rPMAC_TxHTSIG1				0x10c
+#define		rPMAC_TxHTSIG2				0x110
+#define		rPMAC_PHYDebug				0x114
+#define		rPMAC_TxPacketNum				0x118
+#define		rPMAC_TxIdle					0x11c
+#define		rPMAC_TxMACHeader0			0x120
+#define		rPMAC_TxMACHeader1			0x124
+#define		rPMAC_TxMACHeader2			0x128
+#define		rPMAC_TxMACHeader3			0x12c
+#define		rPMAC_TxMACHeader4			0x130
+#define		rPMAC_TxMACHeader5			0x134
+#define		rPMAC_TxDataType				0x138
+#define		rPMAC_TxRandomSeed			0x13c
+#define		rPMAC_CCKPLCPPreamble			0x140
+#define		rPMAC_CCKPLCPHeader			0x144
+#define		rPMAC_CCKCRC16				0x148
+#define		rPMAC_OFDMRxCRC32OK			0x170
+#define		rPMAC_OFDMRxCRC32Er			0x174
+#define		rPMAC_OFDMRxParityEr			0x178
+#define		rPMAC_OFDMRxCRC8Er			0x17c
+#define		rPMAC_CCKCRxRC16Er			0x180
+#define		rPMAC_CCKCRxRC32Er			0x184
+#define		rPMAC_CCKCRxRC32OK			0x188
+#define		rPMAC_TxStatus					0x18c
+
+//
+// 2. Page2(0x200)
+//
+// The following two definition are only used for USB interface.
+#define		RF_BB_CMD_ADDR				0x02c0	// RF/BB read/write command address.
+#define		RF_BB_CMD_DATA				0x02c4	// RF/BB read/write command data.
+
+//
+// 3. Page8(0x800)
+//
+#define		rFPGA0_RFMOD				0x800	//RF mode & CCK TxSC // RF BW Setting??
+
+#define		rFPGA0_TxInfo				0x804	// Status report??
+#define		rFPGA0_PSDFunction			0x808
+
+#define		rFPGA0_TxGainStage			0x80c	// Set TX PWR init gain?
+
+#define		rFPGA0_RFTiming1			0x810	// Useless now
+#define		rFPGA0_RFTiming2			0x814
+
+#define		rFPGA0_XA_HSSIParameter1		0x820	// RF 3 wire register
+#define		rFPGA0_XA_HSSIParameter2		0x824
+#define		rFPGA0_XB_HSSIParameter1		0x828
+#define		rFPGA0_XB_HSSIParameter2		0x82c
+#define		rTxAGC_B_Rate18_06				0x830
+#define		rTxAGC_B_Rate54_24				0x834
+#define		rTxAGC_B_CCK1_55_Mcs32		0x838
+#define		rTxAGC_B_Mcs03_Mcs00			0x83c
+
+#define		rTxAGC_B_Mcs07_Mcs04			0x848
+#define		rTxAGC_B_Mcs11_Mcs08			0x84c
+
+#define		rFPGA0_XA_LSSIParameter		0x840
+#define		rFPGA0_XB_LSSIParameter		0x844
+
+#define		rFPGA0_RFWakeUpParameter		0x850	// Useless now
+#define		rFPGA0_RFSleepUpParameter		0x854
+
+#define		rFPGA0_XAB_SwitchControl		0x858	// RF Channel switch
+#define		rFPGA0_XCD_SwitchControl		0x85c
+
+#define		rFPGA0_XA_RFInterfaceOE		0x860	// RF Channel switch
+#define		rFPGA0_XB_RFInterfaceOE		0x864
+
+#define		rTxAGC_B_Mcs15_Mcs12			0x868
+#define		rTxAGC_B_CCK11_A_CCK2_11		0x86c
+
+#define		rFPGA0_XAB_RFInterfaceSW		0x870	// RF Interface Software Control
+#define		rFPGA0_XCD_RFInterfaceSW		0x874
+
+#define		rFPGA0_XAB_RFParameter		0x878	// RF Parameter
+#define		rFPGA0_XCD_RFParameter		0x87c
+
+#define		rFPGA0_AnalogParameter1		0x880	// Crystal cap setting RF-R/W protection for parameter4??
+#define		rFPGA0_AnalogParameter2		0x884
+#define		rFPGA0_AnalogParameter3		0x888	// Useless now
+#define		rFPGA0_AnalogParameter4		0x88c
+
+#define		rFPGA0_XA_LSSIReadBack		0x8a0	// Tranceiver LSSI Readback
+#define		rFPGA0_XB_LSSIReadBack		0x8a4
+#define		rFPGA0_XC_LSSIReadBack		0x8a8
+#define		rFPGA0_XD_LSSIReadBack		0x8ac
+
+#define		rFPGA0_PSDReport				0x8b4	// Useless now
+#define		TransceiverA_HSPI_Readback	0x8b8	// Transceiver A HSPI Readback
+#define		TransceiverB_HSPI_Readback	0x8bc	// Transceiver B HSPI Readback
+#define		rFPGA0_XAB_RFInterfaceRB		0x8e0	// Useless now // RF Interface Readback Value
+#define		rFPGA0_XCD_RFInterfaceRB		0x8e4	// Useless now
+
+//
+// 4. Page9(0x900)
+//
+#define		rFPGA1_RFMOD				0x900	//RF mode & OFDM TxSC // RF BW Setting??
+
+#define		rFPGA1_TxBlock				0x904	// Useless now
+#define		rFPGA1_DebugSelect			0x908	// Useless now
+#define		rFPGA1_TxInfo				0x90c	// Useless now // Status report??
+
+//
+// 5. PageA(0xA00)
+//
+// Set Control channel to upper or lower. These settings are required only for 40MHz
+#define		rCCK0_System				0xa00
+
+#define		rCCK0_AFESetting			0xa04	// Disable init gain now // Select RX path by RSSI
+#define		rCCK0_CCA					0xa08	// Disable init gain now // Init gain
+
+#define		rCCK0_RxAGC1				0xa0c 	//AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series
+#define		rCCK0_RxAGC2				0xa10 	//AGC & DAGC
+
+#define		rCCK0_RxHP					0xa14
+
+#define		rCCK0_DSPParameter1		0xa18	//Timing recovery & Channel estimation threshold
+#define		rCCK0_DSPParameter2		0xa1c	//SQ threshold
+
+#define		rCCK0_TxFilter1				0xa20
+#define		rCCK0_TxFilter2				0xa24
+#define		rCCK0_DebugPort			0xa28	//debug port and Tx filter3
+#define		rCCK0_FalseAlarmReport		0xa2c	//0xa2d	useless now 0xa30-a4f channel report
+#define		rCCK0_TRSSIReport         		0xa50
+#define		rCCK0_RxReport            		0xa54  //0xa57
+#define		rCCK0_FACounterLower      	0xa5c  //0xa5b
+#define		rCCK0_FACounterUpper      	0xa58  //0xa5c
+
+//
+// 6. PageC(0xC00)
+//
+#define		rOFDM0_LSTF				0xc00
+
+#define		rOFDM0_TRxPathEnable		0xc04
+#define		rOFDM0_TRMuxPar			0xc08
+#define		rOFDM0_TRSWIsolation		0xc0c
+
+#define		rOFDM0_XARxAFE			0xc10  //RxIQ DC offset, Rx digital filter, DC notch filter
+#define		rOFDM0_XARxIQImbalance    	0xc14  //RxIQ imblance matrix
+#define		rOFDM0_XBRxAFE            		0xc18
+#define		rOFDM0_XBRxIQImbalance    	0xc1c
+#define		rOFDM0_XCRxAFE            		0xc20
+#define		rOFDM0_XCRxIQImbalance    	0xc24
+#define		rOFDM0_XDRxAFE            		0xc28
+#define		rOFDM0_XDRxIQImbalance    	0xc2c
+
+#define		rOFDM0_RxDetector1			0xc30  //PD,BW & SBD	// DM tune init gain
+#define		rOFDM0_RxDetector2			0xc34  //SBD & Fame Sync. 
+#define		rOFDM0_RxDetector3			0xc38  //Frame Sync.
+#define		rOFDM0_RxDetector4			0xc3c  //PD, SBD, Frame Sync & Short-GI
+
+#define		rOFDM0_RxDSP				0xc40  //Rx Sync Path
+#define		rOFDM0_CFOandDAGC		0xc44  //CFO & DAGC
+#define		rOFDM0_CCADropThreshold	0xc48 //CCA Drop threshold
+#define		rOFDM0_ECCAThreshold		0xc4c // energy CCA
+
+#define		rOFDM0_XAAGCCore1			0xc50	// DIG
+#define		rOFDM0_XAAGCCore2			0xc54
+#define		rOFDM0_XBAGCCore1			0xc58
+#define		rOFDM0_XBAGCCore2			0xc5c
+#define		rOFDM0_XCAGCCore1			0xc60
+#define		rOFDM0_XCAGCCore2			0xc64
+#define		rOFDM0_XDAGCCore1			0xc68
+#define		rOFDM0_XDAGCCore2			0xc6c
+
+#define		rOFDM0_AGCParameter1			0xc70
+#define		rOFDM0_AGCParameter2			0xc74
+#define		rOFDM0_AGCRSSITable			0xc78
+#define		rOFDM0_HTSTFAGC				0xc7c
+
+#define		rOFDM0_XATxIQImbalance		0xc80	// TX PWR TRACK and DIG
+#define		rOFDM0_XATxAFE				0xc84
+#define		rOFDM0_XBTxIQImbalance		0xc88
+#define		rOFDM0_XBTxAFE				0xc8c
+#define		rOFDM0_XCTxIQImbalance		0xc90
+#define		rOFDM0_XCTxAFE            			0xc94
+#define		rOFDM0_XDTxIQImbalance		0xc98
+#define		rOFDM0_XDTxAFE				0xc9c
+
+#define		rOFDM0_RxIQExtAnta			0xca0
+#define		rOFDM0_TxCoeff1				0xca4
+#define		rOFDM0_TxCoeff2				0xca8
+#define		rOFDM0_TxCoeff3				0xcac
+#define		rOFDM0_TxCoeff4				0xcb0
+#define		rOFDM0_TxCoeff5				0xcb4
+#define		rOFDM0_TxCoeff6				0xcb8
+#define		rOFDM0_RxHPParameter			0xce0
+#define		rOFDM0_TxPseudoNoiseWgt		0xce4
+#define		rOFDM0_FrameSync				0xcf0
+#define		rOFDM0_DFSReport				0xcf4
+
+//
+// 7. PageD(0xD00)
+//
+#define		rOFDM1_LSTF					0xd00
+#define		rOFDM1_TRxPathEnable			0xd04
+
+#define		rOFDM1_CFO						0xd08	// No setting now
+#define		rOFDM1_CSI1					0xd10
+#define		rOFDM1_SBD						0xd14
+#define		rOFDM1_CSI2					0xd18
+#define		rOFDM1_CFOTracking			0xd2c
+#define		rOFDM1_TRxMesaure1			0xd34
+#define		rOFDM1_IntfDet					0xd3c
+#define		rOFDM1_PseudoNoiseStateAB		0xd50
+#define		rOFDM1_PseudoNoiseStateCD		0xd54
+#define		rOFDM1_RxPseudoNoiseWgt		0xd58
+
+#define		rOFDM_PHYCounter1				0xda0  //cca, parity fail
+#define		rOFDM_PHYCounter2				0xda4  //rate illegal, crc8 fail
+#define		rOFDM_PHYCounter3				0xda8  //MCS not support
+
+#define		rOFDM_ShortCFOAB				0xdac	// No setting now
+#define		rOFDM_ShortCFOCD				0xdb0
+#define		rOFDM_LongCFOAB				0xdb4
+#define		rOFDM_LongCFOCD				0xdb8
+#define		rOFDM_TailCFOAB				0xdbc
+#define		rOFDM_TailCFOCD				0xdc0
+#define		rOFDM_PWMeasure1          		0xdc4
+#define		rOFDM_PWMeasure2          		0xdc8
+#define		rOFDM_BWReport				0xdcc
+#define		rOFDM_AGCReport				0xdd0
+#define		rOFDM_RxSNR					0xdd4
+#define		rOFDM_RxEVMCSI				0xdd8
+#define		rOFDM_SIGReport				0xddc
+
+
+//
+// 8. PageE(0xE00)
+//
+#define		rTxAGC_A_Rate18_06			0xe00
+#define		rTxAGC_A_Rate54_24			0xe04
+#define		rTxAGC_A_CCK1_Mcs32			0xe08
+#define		rTxAGC_A_Mcs03_Mcs00			0xe10
+#define		rTxAGC_A_Mcs07_Mcs04			0xe14
+#define		rTxAGC_A_Mcs11_Mcs08			0xe18
+#define		rTxAGC_A_Mcs15_Mcs12			0xe1c
+
+#define		rFPGA0_IQK					0xe28
+#define		rTx_IQK_Tone_A				0xe30
+#define		rRx_IQK_Tone_A				0xe34
+#define		rTx_IQK_PI_A					0xe38
+#define		rRx_IQK_PI_A					0xe3c
+
+#define		rTx_IQK 						0xe40
+#define		rRx_IQK						0xe44
+#define		rIQK_AGC_Pts					0xe48
+#define		rIQK_AGC_Rsp					0xe4c
+#define		rTx_IQK_Tone_B				0xe50
+#define		rRx_IQK_Tone_B				0xe54
+#define		rTx_IQK_PI_B					0xe58
+#define		rRx_IQK_PI_B					0xe5c
+#define		rIQK_AGC_Cont				0xe60
+
+#define		rBlue_Tooth					0xe6c
+#define		rRx_Wait_CCA					0xe70
+#define		rTx_CCK_RFON					0xe74
+#define		rTx_CCK_BBON				0xe78
+#define		rTx_OFDM_RFON				0xe7c
+#define		rTx_OFDM_BBON				0xe80
+#define		rTx_To_Rx					0xe84
+#define		rTx_To_Tx					0xe88
+#define		rRx_CCK						0xe8c
+
+#define		rTx_Power_Before_IQK_A		0xe94
+#define		rTx_Power_After_IQK_A			0xe9c
+
+#define		rRx_Power_Before_IQK_A		0xea0
+#define		rRx_Power_Before_IQK_A_2		0xea4
+#define		rRx_Power_After_IQK_A			0xea8
+#define		rRx_Power_After_IQK_A_2		0xeac
+
+#define		rTx_Power_Before_IQK_B		0xeb4
+#define		rTx_Power_After_IQK_B			0xebc
+
+#define		rRx_Power_Before_IQK_B		0xec0
+#define		rRx_Power_Before_IQK_B_2		0xec4
+#define		rRx_Power_After_IQK_B			0xec8
+#define		rRx_Power_After_IQK_B_2		0xecc
+
+#define		rRx_OFDM					0xed0
+#define		rRx_Wait_RIFS 				0xed4
+#define		rRx_TO_Rx 					0xed8
+#define		rStandby 						0xedc
+#define		rSleep 						0xee0
+#define		rPMPD_ANAEN				0xeec
+
+//
+// 7. RF Register 0x00-0x2E (RF 8256)
+//    RF-0222D 0x00-3F
+//
+//Zebra1
+#define		rZebra1_HSSIEnable				0x0	// Useless now
+#define		rZebra1_TRxEnable1				0x1
+#define		rZebra1_TRxEnable2				0x2
+#define		rZebra1_AGC					0x4
+#define		rZebra1_ChargePump			0x5
+#define		rZebra1_Channel				0x7	// RF channel switch
+
+//#endif
+#define		rZebra1_TxGain					0x8	// Useless now
+#define		rZebra1_TxLPF					0x9
+#define		rZebra1_RxLPF					0xb
+#define		rZebra1_RxHPFCorner			0xc
+
+//Zebra4
+#define		rGlobalCtrl						0	// Useless now
+#define		rRTL8256_TxLPF					19
+#define		rRTL8256_RxLPF					11
+
+//RTL8258
+#define		rRTL8258_TxLPF					0x11	// Useless now
+#define		rRTL8258_RxLPF					0x13
+#define		rRTL8258_RSSILPF				0xa
+
+//
+// RL6052 Register definition
+//
+#define		RF_AC						0x00	// 
+
+#define		RF_IQADJ_G1				0x01	// 
+#define		RF_IQADJ_G2				0x02	// 
+#define		RF_POW_TRSW				0x05	// 
+
+#define		RF_GAIN_RX					0x06	// 
+#define		RF_GAIN_TX					0x07	// 
+
+#define		RF_TXM_IDAC				0x08	// 
+#define		RF_BS_IQGEN				0x0F	// 
+
+#define		RF_MODE1					0x10	// 
+#define		RF_MODE2					0x11	// 
+
+#define		RF_RX_AGC_HP				0x12	// 
+#define		RF_TX_AGC					0x13	// 
+#define		RF_BIAS						0x14	// 
+#define		RF_IPA						0x15	// 
+#define		RF_POW_ABILITY			0x17	// 
+#define		RF_MODE_AG				0x18	// 
+#define		rRfChannel					0x18	// RF channel and BW switch
+#define		RF_CHNLBW					0x18	// RF channel and BW switch
+#define		RF_TOP						0x19	// 
+
+#define		RF_RX_G1					0x1A	// 
+#define		RF_RX_G2					0x1B	// 
+
+#define		RF_RX_BB2					0x1C	// 
+#define		RF_RX_BB1					0x1D	// 
+
+#define		RF_RCK1					0x1E	// 
+#define		RF_RCK2					0x1F	// 
+
+#define		RF_TX_G1					0x20	// 
+#define		RF_TX_G2					0x21	// 
+#define		RF_TX_G3					0x22	// 
+
+#define		RF_TX_BB1					0x23	// 
+
+#define		RF_T_METER					0x24	// 
+
+#define		RF_SYN_G1					0x25	// RF TX Power control
+#define		RF_SYN_G2					0x26	// RF TX Power control
+#define		RF_SYN_G3					0x27	// RF TX Power control
+#define		RF_SYN_G4					0x28	// RF TX Power control
+#define		RF_SYN_G5					0x29	// RF TX Power control
+#define		RF_SYN_G6					0x2A	// RF TX Power control
+#define		RF_SYN_G7					0x2B	// RF TX Power control
+#define		RF_SYN_G8					0x2C	// RF TX Power control
+
+#define		RF_RCK_OS					0x30	// RF TX PA control
+
+#define		RF_TXPA_G1					0x31	// RF TX PA control
+#define		RF_TXPA_G2					0x32	// RF TX PA control
+#define		RF_TXPA_G3					0x33	// RF TX PA control
+
+//
+//Bit Mask
+//
+// 1. Page1(0x100)
+#define		bBBResetB						0x100	// Useless now?
+#define		bGlobalResetB					0x200
+#define		bOFDMTxStart					0x4
+#define		bCCKTxStart						0x8
+#define		bCRC32Debug					0x100
+#define		bPMACLoopback					0x10
+#define		bTxLSIG							0xffffff
+#define		bOFDMTxRate					0xf
+#define		bOFDMTxReserved				0x10
+#define		bOFDMTxLength					0x1ffe0
+#define		bOFDMTxParity					0x20000
+#define		bTxHTSIG1						0xffffff
+#define		bTxHTMCSRate					0x7f
+#define		bTxHTBW						0x80
+#define		bTxHTLength					0xffff00
+#define		bTxHTSIG2						0xffffff
+#define		bTxHTSmoothing					0x1
+#define		bTxHTSounding					0x2
+#define		bTxHTReserved					0x4
+#define		bTxHTAggreation				0x8
+#define		bTxHTSTBC						0x30
+#define		bTxHTAdvanceCoding			0x40
+#define		bTxHTShortGI					0x80
+#define		bTxHTNumberHT_LTF			0x300
+#define		bTxHTCRC8						0x3fc00
+#define		bCounterReset					0x10000
+#define		bNumOfOFDMTx					0xffff
+#define		bNumOfCCKTx					0xffff0000
+#define		bTxIdleInterval					0xffff
+#define		bOFDMService					0xffff0000
+#define		bTxMACHeader					0xffffffff
+#define		bTxDataInit						0xff
+#define		bTxHTMode						0x100
+#define		bTxDataType					0x30000
+#define		bTxRandomSeed					0xffffffff
+#define		bCCKTxPreamble					0x1
+#define		bCCKTxSFD						0xffff0000
+#define		bCCKTxSIG						0xff
+#define		bCCKTxService					0xff00
+#define		bCCKLengthExt					0x8000
+#define		bCCKTxLength					0xffff0000
+#define		bCCKTxCRC16					0xffff
+#define		bCCKTxStatus					0x1
+#define		bOFDMTxStatus					0x2
+
+#define 		IS_BB_REG_OFFSET_92S(_Offset)		((_Offset >= 0x800) && (_Offset <= 0xfff))
+
+// 2. Page8(0x800)
+#define		bRFMOD							0x1	// Reg 0x800 rFPGA0_RFMOD
+#define		bJapanMode						0x2
+#define		bCCKTxSC						0x30
+#define		bCCKEn							0x1000000
+#define		bOFDMEn						0x2000000
+
+#define		bOFDMRxADCPhase           		0x10000	// Useless now
+#define		bOFDMTxDACPhase           		0x40000
+#define		bXATxAGC                  			0x3f
+
+#define		bAntennaSelect                 		0x0300
+
+#define		bXBTxAGC                  			0xf00	// Reg 80c rFPGA0_TxGainStage
+#define		bXCTxAGC                  			0xf000
+#define		bXDTxAGC                  			0xf0000
+       		
+#define		bPAStart                  			0xf0000000	// Useless now
+#define		bTRStart                  			0x00f00000
+#define		bRFStart                  			0x0000f000
+#define		bBBStart                  			0x000000f0
+#define		bBBCCKStart               		0x0000000f
+#define		bPAEnd                    			0xf          //Reg0x814
+#define		bTREnd                    			0x0f000000
+#define		bRFEnd                    			0x000f0000
+#define		bCCAMask                  			0x000000f0   //T2R
+#define		bR2RCCAMask               		0x00000f00
+#define		bHSSI_R2TDelay            		0xf8000000
+#define		bHSSI_T2RDelay            		0xf80000
+#define		bContTxHSSI               		0x400     //chane gain at continue Tx
+#define		bIGFromCCK                		0x200
+#define		bAGCAddress               		0x3f
+#define		bRxHPTx                   			0x7000
+#define		bRxHPT2R                  			0x38000
+#define		bRxHPCCKIni               		0xc0000
+#define		bAGCTxCode                		0xc00000
+#define		bAGCRxCode                		0x300000
+
+#define		b3WireDataLength          		0x800	// Reg 0x820~84f rFPGA0_XA_HSSIParameter1
+#define		b3WireAddressLength       		0x400
+
+#define		b3WireRFPowerDown         		0x1	// Useless now
+//#define bHWSISelect               		0x8
+#define		b5GPAPEPolarity           		0x40000000
+#define		b2GPAPEPolarity           		0x80000000
+#define		bRFSW_TxDefaultAnt        		0x3
+#define		bRFSW_TxOptionAnt         		0x30
+#define		bRFSW_RxDefaultAnt        		0x300
+#define		bRFSW_RxOptionAnt         		0x3000
+#define		bRFSI_3WireData           		0x1
+#define		bRFSI_3WireClock          		0x2
+#define		bRFSI_3WireLoad           		0x4
+#define		bRFSI_3WireRW             		0x8
+#define		bRFSI_3Wire               			0xf
+
+#define		bRFSI_RFENV               		0x10	// Reg 0x870 rFPGA0_XAB_RFInterfaceSW
+
+#define		bRFSI_TRSW                		0x20	// Useless now
+#define		bRFSI_TRSWB               		0x40
+#define		bRFSI_ANTSW               		0x100
+#define		bRFSI_ANTSWB              		0x200
+#define		bRFSI_PAPE                			0x400
+#define		bRFSI_PAPE5G              		0x800 
+#define		bBandSelect               			0x1
+#define		bHTSIG2_GI                			0x80
+#define		bHTSIG2_Smoothing         		0x01
+#define		bHTSIG2_Sounding          		0x02
+#define		bHTSIG2_Aggreaton         		0x08
+#define		bHTSIG2_STBC              		0x30
+#define		bHTSIG2_AdvCoding         		0x40
+#define		bHTSIG2_NumOfHTLTF        	0x300
+#define		bHTSIG2_CRC8              		0x3fc
+#define		bHTSIG1_MCS               		0x7f
+#define		bHTSIG1_BandWidth         		0x80
+#define		bHTSIG1_HTLength          		0xffff
+#define		bLSIG_Rate                			0xf
+#define		bLSIG_Reserved            		0x10
+#define		bLSIG_Length              		0x1fffe
+#define		bLSIG_Parity              			0x20
+#define		bCCKRxPhase               		0x4
+
+#define		bLSSIReadAddress          		0x7f800000   // T65 RF
+
+#define		bLSSIReadEdge             		0x80000000   //LSSI "Read" edge signal
+
+#define		bLSSIReadBackData         		0xfffff		// T65 RF
+
+#define		bLSSIReadOKFlag           		0x1000	// Useless now
+#define		bCCKSampleRate            		0x8       //0: 44MHz, 1:88MHz       		
+#define		bRegulator0Standby        		0x1
+#define		bRegulatorPLLStandby      		0x2
+#define		bRegulator1Standby        		0x4
+#define		bPLLPowerUp               		0x8
+#define		bDPLLPowerUp              		0x10
+#define		bDA10PowerUp              		0x20
+#define		bAD7PowerUp               		0x200
+#define		bDA6PowerUp               		0x2000
+#define		bXtalPowerUp              		0x4000
+#define		b40MDClkPowerUP           		0x8000
+#define		bDA6DebugMode             		0x20000
+#define		bDA6Swing                 			0x380000
+
+#define		bADClkPhase               		0x4000000	// Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ
+
+#define		b80MClkDelay              		0x18000000	// Useless
+#define		bAFEWatchDogEnable        		0x20000000
+
+#define		bXtalCap01                			0xc0000000	// Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap
+#define		bXtalCap23                			0x3
+#define		bXtalCap92x					0x0f000000
+#define 		bXtalCap                			0x0f000000
+
+#define		bIntDifClkEnable          		0x400	// Useless
+#define		bExtSigClkEnable         	 	0x800
+#define		bBandgapMbiasPowerUp      	0x10000
+#define		bAD11SHGain               		0xc0000
+#define		bAD11InputRange           		0x700000
+#define		bAD11OPCurrent            		0x3800000
+#define		bIPathLoopback            		0x4000000
+#define		bQPathLoopback            		0x8000000
+#define		bAFELoopback              		0x10000000
+#define		bDA10Swing                		0x7e0
+#define		bDA10Reverse              		0x800
+#define		bDAClkSource              		0x1000
+#define		bAD7InputRange            		0x6000
+#define		bAD7Gain                  			0x38000
+#define		bAD7OutputCMMode          		0x40000
+#define		bAD7InputCMMode           		0x380000
+#define		bAD7Current               			0xc00000
+#define		bRegulatorAdjust          		0x7000000
+#define		bAD11PowerUpAtTx          		0x1
+#define		bDA10PSAtTx               		0x10
+#define		bAD11PowerUpAtRx          		0x100
+#define		bDA10PSAtRx               		0x1000       		
+#define		bCCKRxAGCFormat           		0x200       		
+#define		bPSDFFTSamplepPoint       		0xc000
+#define		bPSDAverageNum            		0x3000
+#define		bIQPathControl            		0xc00
+#define		bPSDFreq                  			0x3ff
+#define		bPSDAntennaPath           		0x30
+#define		bPSDIQSwitch              		0x40
+#define		bPSDRxTrigger             		0x400000
+#define		bPSDTxTrigger             		0x80000000
+#define		bPSDSineToneScale        		0x7f000000
+#define		bPSDReport                			0xffff
+
+// 3. Page9(0x900)
+#define		bOFDMTxSC                 		0x30000000	// Useless
+#define		bCCKTxOn                  			0x1
+#define		bOFDMTxOn                 		0x2
+#define		bDebugPage                		0xfff  //reset debug page and also HWord, LWord
+#define		bDebugItem                		0xff   //reset debug page and LWord
+#define		bAntL              	       		0x10
+#define		bAntNonHT           	      			0x100
+#define		bAntHT1               			0x1000
+#define		bAntHT2                   			0x10000
+#define		bAntHT1S1                 			0x100000
+#define		bAntNonHTS1               		0x1000000
+
+// 4. PageA(0xA00)
+#define		bCCKBBMode				0x3	// Useless
+#define		bCCKTxPowerSaving		0x80
+#define		bCCKRxPowerSaving		0x40
+
+#define		bCCKSideBand			0x10	// Reg 0xa00 rCCK0_System 20/40 switch
+
+#define		bCCKScramble			0x8	// Useless
+#define		bCCKAntDiversity		0x8000
+#define		bCCKCarrierRecovery		0x4000
+#define		bCCKTxRate				0x3000
+#define		bCCKDCCancel			0x0800
+#define		bCCKISICancel			0x0400
+#define		bCCKMatchFilter			0x0200
+#define		bCCKEqualizer			0x0100
+#define		bCCKPreambleDetect		0x800000
+#define		bCCKFastFalseCCA		0x400000
+#define		bCCKChEstStart			0x300000
+#define		bCCKCCACount			0x080000
+#define		bCCKcs_lim				0x070000
+#define		bCCKBistMode			0x80000000
+#define		bCCKCCAMask			0x40000000
+#define		bCCKTxDACPhase		0x4
+#define		bCCKRxADCPhase		0x20000000   //r_rx_clk
+#define		bCCKr_cp_mode0		0x0100
+#define		bCCKTxDCOffset			0xf0
+#define		bCCKRxDCOffset			0xf
+#define		bCCKCCAMode			0xc000
+#define		bCCKFalseCS_lim			0x3f00
+#define		bCCKCS_ratio			0xc00000
+#define		bCCKCorgBit_sel			0x300000
+#define		bCCKPD_lim				0x0f0000
+#define		bCCKNewCCA			0x80000000
+#define		bCCKRxHPofIG			0x8000
+#define		bCCKRxIG				0x7f00
+#define		bCCKLNAPolarity			0x800000
+#define		bCCKRx1stGain			0x7f0000
+#define		bCCKRFExtend			0x20000000 //CCK Rx Iinital gain polarity
+#define		bCCKRxAGCSatLevel		0x1f000000
+#define		bCCKRxAGCSatCount		0xe0
+#define		bCCKRxRFSettle			0x1f       //AGCsamp_dly
+#define		bCCKFixedRxAGC			0x8000
+//#define bCCKRxAGCFormat         	 	0x4000   //remove to HSSI register 0x824
+#define		bCCKAntennaPolarity		0x2000
+#define		bCCKTxFilterType		0x0c00
+#define		bCCKRxAGCReportType	0x0300
+#define		bCCKRxDAGCEn			0x80000000
+#define		bCCKRxDAGCPeriod		0x20000000
+#define		bCCKRxDAGCSatLevel		0x1f000000
+#define		bCCKTimingRecovery		0x800000
+#define		bCCKTxC0				0x3f0000
+#define		bCCKTxC1				0x3f000000
+#define		bCCKTxC2				0x3f
+#define		bCCKTxC3				0x3f00
+#define		bCCKTxC4				0x3f0000
+#define		bCCKTxC5				0x3f000000
+#define		bCCKTxC6				0x3f
+#define		bCCKTxC7				0x3f00
+#define		bCCKDebugPort			0xff0000
+#define		bCCKDACDebug			0x0f000000
+#define		bCCKFalseAlarmEnable	0x8000
+#define		bCCKFalseAlarmRead		0x4000
+#define		bCCKTRSSI				0x7f
+#define		bCCKRxAGCReport		0xfe
+#define		bCCKRxReport_AntSel	0x80000000
+#define		bCCKRxReport_MFOff		0x40000000
+#define		bCCKRxRxReport_SQLoss	0x20000000
+#define		bCCKRxReport_Pktloss	0x10000000
+#define		bCCKRxReport_Lockedbit	0x08000000
+#define		bCCKRxReport_RateError	0x04000000
+#define		bCCKRxReport_RxRate	0x03000000
+#define		bCCKRxFACounterLower	0xff
+#define		bCCKRxFACounterUpper	0xff000000
+#define		bCCKRxHPAGCStart		0xe000
+#define		bCCKRxHPAGCFinal		0x1c00       		
+#define		bCCKRxFalseAlarmEnable	0x8000
+#define		bCCKFACounterFreeze	0x4000       		
+#define		bCCKTxPathSel			0x10000000
+#define		bCCKDefaultRxPath		0xc000000
+#define		bCCKOptionRxPath		0x3000000
+
+// 5. PageC(0xC00)
+#define		bNumOfSTF				0x3	// Useless
+#define		bShift_L					0xc0
+#define		bGI_TH					0xc
+#define		bRxPathA				0x1
+#define		bRxPathB				0x2
+#define		bRxPathC				0x4
+#define		bRxPathD				0x8
+#define		bTxPathA				0x1
+#define		bTxPathB				0x2
+#define		bTxPathC				0x4
+#define		bTxPathD				0x8
+#define		bTRSSIFreq				0x200
+#define		bADCBackoff				0x3000
+#define		bDFIRBackoff			0xc000
+#define		bTRSSILatchPhase		0x10000
+#define		bRxIDCOffset			0xff
+#define		bRxQDCOffset			0xff00
+#define		bRxDFIRMode			0x1800000
+#define		bRxDCNFType			0xe000000
+#define		bRXIQImb_A				0x3ff
+#define		bRXIQImb_B				0xfc00
+#define		bRXIQImb_C				0x3f0000
+#define		bRXIQImb_D				0xffc00000
+#define		bDC_dc_Notch			0x60000
+#define		bRxNBINotch			0x1f000000
+#define		bPD_TH					0xf
+#define		bPD_TH_Opt2			0xc000
+#define		bPWED_TH				0x700
+#define		bIfMF_Win_L			0x800
+#define		bPD_Option				0x1000
+#define		bMF_Win_L				0xe000
+#define		bBW_Search_L			0x30000
+#define		bwin_enh_L				0xc0000
+#define		bBW_TH					0x700000
+#define		bED_TH2				0x3800000
+#define		bBW_option				0x4000000
+#define		bRatio_TH				0x18000000
+#define		bWindow_L				0xe0000000
+#define		bSBD_Option				0x1
+#define		bFrame_TH				0x1c
+#define		bFS_Option				0x60
+#define		bDC_Slope_check		0x80
+#define		bFGuard_Counter_DC_L	0xe00
+#define		bFrame_Weight_Short	0x7000
+#define		bSub_Tune				0xe00000
+#define		bFrame_DC_Length		0xe000000
+#define		bSBD_start_offset		0x30000000
+#define		bFrame_TH_2			0x7
+#define		bFrame_GI2_TH			0x38
+#define		bGI2_Sync_en			0x40
+#define		bSarch_Short_Early		0x300
+#define		bSarch_Short_Late		0xc00
+#define		bSarch_GI2_Late		0x70000
+#define		bCFOAntSum				0x1
+#define		bCFOAcc				0x2
+#define		bCFOStartOffset			0xc
+#define		bCFOLookBack			0x70
+#define		bCFOSumWeight			0x80
+#define		bDAGCEnable			0x10000
+#define		bTXIQImb_A				0x3ff
+#define		bTXIQImb_B				0xfc00
+#define		bTXIQImb_C				0x3f0000
+#define		bTXIQImb_D				0xffc00000
+#define		bTxIDCOffset			0xff
+#define		bTxQDCOffset			0xff00
+#define		bTxDFIRMode			0x10000
+#define		bTxPesudoNoiseOn		0x4000000
+#define		bTxPesudoNoise_A		0xff
+#define		bTxPesudoNoise_B		0xff00
+#define		bTxPesudoNoise_C		0xff0000
+#define		bTxPesudoNoise_D		0xff000000
+#define		bCCADropOption			0x20000
+#define		bCCADropThres			0xfff00000
+#define		bEDCCA_H				0xf
+#define		bEDCCA_L				0xf0
+#define		bLambda_ED			0x300
+#define		bRxInitialGain			0x7f
+#define		bRxAntDivEn				0x80
+#define		bRxAGCAddressForLNA	0x7f00
+#define		bRxHighPowerFlow		0x8000
+#define		bRxAGCFreezeThres		0xc0000
+#define		bRxFreezeStep_AGC1	0x300000
+#define		bRxFreezeStep_AGC2	0xc00000
+#define		bRxFreezeStep_AGC3	0x3000000
+#define		bRxFreezeStep_AGC0	0xc000000
+#define		bRxRssi_Cmp_En			0x10000000
+#define		bRxQuickAGCEn			0x20000000
+#define		bRxAGCFreezeThresMode	0x40000000
+#define		bRxOverFlowCheckType	0x80000000
+#define		bRxAGCShift				0x7f
+#define		bTRSW_Tri_Only			0x80
+#define		bPowerThres			0x300
+#define		bRxAGCEn				0x1
+#define		bRxAGCTogetherEn		0x2
+#define		bRxAGCMin				0x4
+#define		bRxHP_Ini				0x7
+#define		bRxHP_TRLNA			0x70
+#define		bRxHP_RSSI				0x700
+#define		bRxHP_BBP1				0x7000
+#define		bRxHP_BBP2				0x70000
+#define		bRxHP_BBP3				0x700000
+#define		bRSSI_H					0x7f0000     //the threshold for high power
+#define		bRSSI_Gen				0x7f000000   //the threshold for ant diversity
+#define		bRxSettle_TRSW			0x7
+#define		bRxSettle_LNA			0x38
+#define		bRxSettle_RSSI			0x1c0
+#define		bRxSettle_BBP			0xe00
+#define		bRxSettle_RxHP			0x7000
+#define		bRxSettle_AntSW_RSSI	0x38000
+#define		bRxSettle_AntSW		0xc0000
+#define		bRxProcessTime_DAGC	0x300000
+#define		bRxSettle_HSSI			0x400000
+#define		bRxProcessTime_BBPPW	0x800000
+#define		bRxAntennaPowerShift	0x3000000
+#define		bRSSITableSelect		0xc000000
+#define		bRxHP_Final				0x7000000
+#define		bRxHTSettle_BBP			0x7
+#define		bRxHTSettle_HSSI		0x8
+#define		bRxHTSettle_RxHP		0x70
+#define		bRxHTSettle_BBPPW		0x80
+#define		bRxHTSettle_Idle		0x300
+#define		bRxHTSettle_Reserved	0x1c00
+#define		bRxHTRxHPEn			0x8000
+#define		bRxHTAGCFreezeThres	0x30000
+#define		bRxHTAGCTogetherEn	0x40000
+#define		bRxHTAGCMin			0x80000
+#define		bRxHTAGCEn				0x100000
+#define		bRxHTDAGCEn			0x200000
+#define		bRxHTRxHP_BBP			0x1c00000
+#define		bRxHTRxHP_Final		0xe0000000
+#define		bRxPWRatioTH			0x3
+#define		bRxPWRatioEn			0x4
+#define		bRxMFHold				0x3800
+#define		bRxPD_Delay_TH1		0x38
+#define		bRxPD_Delay_TH2		0x1c0
+#define		bRxPD_DC_COUNT_MAX	0x600
+//#define bRxMF_Hold               0x3800
+#define		bRxPD_Delay_TH			0x8000
+#define		bRxProcess_Delay		0xf0000
+#define		bRxSearchrange_GI2_Early	0x700000
+#define		bRxFrame_Guard_Counter_L	0x3800000
+#define		bRxSGI_Guard_L			0xc000000
+#define		bRxSGI_Search_L		0x30000000
+#define		bRxSGI_TH				0xc0000000
+#define		bDFSCnt0				0xff
+#define		bDFSCnt1				0xff00
+#define		bDFSFlag				0xf0000       		
+#define		bMFWeightSum			0x300000
+#define		bMinIdxTH				0x7f000000       		
+#define		bDAFormat				0x40000       		
+#define		bTxChEmuEnable		0x01000000       		
+#define		bTRSWIsolation_A		0x7f
+#define		bTRSWIsolation_B		0x7f00
+#define		bTRSWIsolation_C		0x7f0000
+#define		bTRSWIsolation_D		0x7f000000       		
+#define		bExtLNAGain				0x7c00          
+
+// 6. PageE(0xE00)
+#define		bSTBCEn				0x4	// Useless
+#define		bAntennaMapping		0x10
+#define		bNss					0x20
+#define		bCFOAntSumD			0x200
+#define		bPHYCounterReset		0x8000000
+#define		bCFOReportGet			0x4000000
+#define		bOFDMContinueTx		0x10000000
+#define		bOFDMSingleCarrier		0x20000000
+#define		bOFDMSingleTone		0x40000000
+//#define bRxPath1                 0x01
+//#define bRxPath2                 0x02
+//#define bRxPath3                 0x04
+//#define bRxPath4                 0x08
+//#define bTxPath1                 0x10
+//#define bTxPath2                 0x20
+#define		bHTDetect			0x100
+#define		bCFOEn				0x10000
+#define		bCFOValue			0xfff00000
+#define		bSigTone_Re		0x3f
+#define		bSigTone_Im		0x7f00
+#define		bCounter_CCA		0xffff
+#define		bCounter_ParityFail	0xffff0000
+#define		bCounter_RateIllegal		0xffff
+#define		bCounter_CRC8Fail	0xffff0000
+#define		bCounter_MCSNoSupport	0xffff
+#define		bCounter_FastSync	0xffff
+#define		bShortCFO			0xfff
+#define		bShortCFOTLength	12   //total
+#define		bShortCFOFLength	11   //fraction
+#define		bLongCFO			0x7ff
+#define		bLongCFOTLength	11
+#define		bLongCFOFLength	11
+#define		bTailCFO			0x1fff
+#define		bTailCFOTLength		13
+#define		bTailCFOFLength		12       		
+#define		bmax_en_pwdB		0xffff
+#define		bCC_power_dB		0xffff0000
+#define		bnoise_pwdB		0xffff
+#define		bPowerMeasTLength	10
+#define		bPowerMeasFLength	3
+#define		bRx_HT_BW			0x1
+#define		bRxSC				0x6
+#define		bRx_HT				0x8       		
+#define		bNB_intf_det_on		0x1
+#define		bIntf_win_len_cfg	0x30
+#define		bNB_Intf_TH_cfg		0x1c0       		
+#define		bRFGain				0x3f
+#define		bTableSel			0x40
+#define		bTRSW				0x80       		
+#define		bRxSNR_A			0xff
+#define		bRxSNR_B			0xff00
+#define		bRxSNR_C			0xff0000
+#define		bRxSNR_D			0xff000000
+#define		bSNREVMTLength		8
+#define		bSNREVMFLength		1       		
+#define		bCSI1st				0xff
+#define		bCSI2nd				0xff00
+#define		bRxEVM1st			0xff0000
+#define		bRxEVM2nd			0xff000000       		
+#define		bSIGEVM			0xff
+#define		bPWDB				0xff00
+#define		bSGIEN				0x10000
+       		
+#define		bSFactorQAM1		0xf	// Useless
+#define		bSFactorQAM2		0xf0
+#define		bSFactorQAM3		0xf00
+#define		bSFactorQAM4		0xf000
+#define		bSFactorQAM5		0xf0000
+#define		bSFactorQAM6		0xf0000
+#define		bSFactorQAM7		0xf00000
+#define		bSFactorQAM8		0xf000000
+#define		bSFactorQAM9		0xf0000000
+#define		bCSIScheme			0x100000
+       		
+#define		bNoiseLvlTopSet		0x3	// Useless
+#define		bChSmooth			0x4
+#define		bChSmoothCfg1		0x38
+#define		bChSmoothCfg2		0x1c0
+#define		bChSmoothCfg3		0xe00
+#define		bChSmoothCfg4		0x7000
+#define		bMRCMode			0x800000
+#define		bTHEVMCfg			0x7000000
+       		
+#define		bLoopFitType		0x1	// Useless
+#define		bUpdCFO			0x40
+#define		bUpdCFOOffData		0x80
+#define		bAdvUpdCFO			0x100
+#define		bAdvTimeCtrl		0x800
+#define		bUpdClko			0x1000
+#define		bFC					0x6000
+#define		bTrackingMode		0x8000
+#define		bPhCmpEnable		0x10000
+#define		bUpdClkoLTF		0x20000
+#define		bComChCFO			0x40000
+#define		bCSIEstiMode		0x80000
+#define		bAdvUpdEqz			0x100000
+#define		bUChCfg				0x7000000
+#define		bUpdEqz			0x8000000
+
+//Rx Pseduo noise
+#define		bRxPesudoNoiseOn		0x20000000	// Useless
+#define		bRxPesudoNoise_A		0xff
+#define		bRxPesudoNoise_B		0xff00
+#define		bRxPesudoNoise_C		0xff0000
+#define		bRxPesudoNoise_D		0xff000000
+#define		bPesudoNoiseState_A	0xffff
+#define		bPesudoNoiseState_B	0xffff0000
+#define		bPesudoNoiseState_C	0xffff
+#define		bPesudoNoiseState_D	0xffff0000
+
+//7. RF Register
+//Zebra1
+#define		bZebra1_HSSIEnable		0x8		// Useless
+#define		bZebra1_TRxControl		0xc00
+#define		bZebra1_TRxGainSetting	0x07f
+#define		bZebra1_RxCorner		0xc00
+#define		bZebra1_TxChargePump	0x38
+#define		bZebra1_RxChargePump	0x7
+#define		bZebra1_ChannelNum	0xf80
+#define		bZebra1_TxLPFBW		0x400
+#define		bZebra1_RxLPFBW		0x600
+
+//Zebra4
+#define		bRTL8256RegModeCtrl1	0x100	// Useless
+#define		bRTL8256RegModeCtrl0	0x40
+#define		bRTL8256_TxLPFBW		0x18
+#define		bRTL8256_RxLPFBW		0x600
+
+//RTL8258
+#define		bRTL8258_TxLPFBW		0xc	// Useless
+#define		bRTL8258_RxLPFBW		0xc00
+#define		bRTL8258_RSSILPFBW	0xc0
+
+
+//
+// Other Definition
+//
+
+//byte endable for sb_write
+#define		bByte0				0x1	// Useless
+#define		bByte1				0x2
+#define		bByte2				0x4
+#define		bByte3				0x8
+#define		bWord0				0x3
+#define		bWord1				0xc
+#define		bDWord				0xf
+
+//for PutRegsetting & GetRegSetting BitMask
+#define		bMaskByte0			0xff	// Reg 0xc50 rOFDM0_XAAGCCore~0xC6f
+#define		bMaskByte1			0xff00
+#define		bMaskByte2			0xff0000
+#define		bMaskByte3			0xff000000
+#define		bMaskHWord		0xffff0000
+#define		bMaskLWord			0x0000ffff
+#define		bMaskDWord		0xffffffff
+#define		bMask12Bits			0xfff
+#define		bMaskH4Bits			0xf0000000	
+#define		bMaskOFDM_D		0xffc00000
+#define		bMaskCCK			0x3f3f3f3f
+
+//for PutRFRegsetting & GetRFRegSetting BitMask
+//#define		bMask12Bits               0xfffff	// RF Reg mask bits
+//#define		bMask20Bits               0xfffff	// RF Reg mask bits T65 RF
+#define 		bRFRegOffsetMask	0xfffff		
+  		
+#define		bEnable			0x1	// Useless
+#define		bDisable		0x0
+       		
+#define		LeftAntenna		0x0	// Useless
+#define		RightAntenna	0x1
+       		
+#define		tCheckTxStatus		500   //500ms // Useless
+#define		tUpdateRxCounter	100   //100ms
+       		
+#define		rateCCK		0	// Useless
+#define		rateOFDM	1
+#define		rateHT		2
+
+//define Register-End
+#define		bPMAC_End			0x1ff	// Useless
+#define		bFPGAPHY0_End		0x8ff
+#define		bFPGAPHY1_End		0x9ff
+#define		bCCKPHY0_End		0xaff
+#define		bOFDMPHY0_End		0xcff
+#define		bOFDMPHY1_End		0xdff
+
+//define max debug item in each debug page
+//#define bMaxItem_FPGA_PHY0        0x9
+//#define bMaxItem_FPGA_PHY1        0x3
+//#define bMaxItem_PHY_11B          0x16
+//#define bMaxItem_OFDM_PHY0        0x29
+//#define bMaxItem_OFDM_PHY1        0x0
+
+#define		bPMACControl		0x0		// Useless
+#define		bWMACControl		0x1
+#define		bWNICControl		0x2
+       		
+#define		PathA			0x0	// Useless
+#define		PathB			0x1
+#define		PathC			0x2
+#define		PathD			0x3
+
+/*--------------------------Define Parameters-------------------------------*/
+
+
+#endif	//__INC_HAL8192SPHYREG_H
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/Hal8192CUHWImg.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/Hal8192CUHWImg.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/Hal8192CUHWImg.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/Hal8192CUHWImg.h	2017-09-23 03:42:50.026675040 +0800
@@ -0,0 +1,99 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __INC_HAL8192CU_FW_IMG_H
+#define __INC_HAL8192CU_FW_IMG_H
+
+/*Created on  2011/ 6/15,  5:45*/
+
+#ifdef CONFIG_BT_COEXISTENCE
+#define TSMCImgArrayLength 16248 //v79 TSMC COMMON 2011-10-06
+#else
+#define TSMCImgArrayLength 16404 //v79 TSMC P2PPS 2011-10-06
+#endif
+extern u8 Rtl8192CUFwTSMCImgArray[TSMCImgArrayLength];
+
+#ifdef CONFIG_BT_COEXISTENCE
+#define UMCACutImgArrayLength 16248 //v79 UMC A Cut COMMON 2011-10-06
+#else //#ifdef CONFIG_P2P
+#define UMCACutImgArrayLength 16404 //v79 UMC A Cut P2PPS 2011-10-06
+#endif
+extern u8 Rtl8192CUFwUMCACutImgArray[UMCACutImgArrayLength];
+
+#ifdef CONFIG_BT_COEXISTENCE
+#define UMCBCutImgArrayLength 16254 //v79 UMC B Cut COMMON 2011-10-06
+#else //#ifdef CONFIG_P2P
+#define UMCBCutImgArrayLength 16386 //v79 UMC B Cut P2PPS 2011-10-06
+#endif
+extern u8 Rtl8192CUFwUMCBCutImgArray[UMCBCutImgArrayLength];
+
+#define UMC8723ImgArrayLength 16288
+extern u8 Rtl8192CUFwUMC8723ImgArray[UMC8723ImgArrayLength];
+#define PHY_REG_2TArrayLength 374
+extern u32  Rtl8192CUPHY_REG_2TArray[PHY_REG_2TArrayLength];
+#define PHY_REG_1TArrayLength 374
+extern u32 Rtl8192CUPHY_REG_1TArray[PHY_REG_1TArrayLength];
+#define PHY_ChangeTo_1T1RArrayLength 1
+extern u32 Rtl8192CUPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength];
+#define PHY_ChangeTo_1T2RArrayLength 1
+extern u32 Rtl8192CUPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength];
+#define PHY_ChangeTo_2T2RArrayLength 1
+extern u32 Rtl8192CUPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength];
+#define PHY_REG_Array_PGLength 336
+extern u32 Rtl8192CUPHY_REG_Array_PG[PHY_REG_Array_PGLength];
+#define PHY_REG_Array_PG_mCardLength 336
+extern u32 Rtl8192CUPHY_REG_Array_PG_mCard[PHY_REG_Array_PG_mCardLength];
+#define PHY_REG_Array_MPLength 4
+extern u32 Rtl8192CUPHY_REG_Array_MP[PHY_REG_Array_MPLength];
+#define PHY_REG_1T_HPArrayLength 378
+extern u32 Rtl8192CUPHY_REG_1T_HPArray[PHY_REG_1T_HPArrayLength];
+#define PHY_REG_1T_mCardArrayLength 374
+extern u32 Rtl8192CUPHY_REG_1T_mCardArray[PHY_REG_1T_mCardArrayLength];
+#define PHY_REG_2T_mCardArrayLength 374
+extern u32 Rtl8192CUPHY_REG_2T_mCardArray[PHY_REG_2T_mCardArrayLength];
+#define PHY_REG_Array_PG_HPLength 336
+extern u32 Rtl8192CUPHY_REG_Array_PG_HP[PHY_REG_Array_PG_HPLength];
+#define RadioA_2TArrayLength 282
+extern u32 Rtl8192CURadioA_2TArray[RadioA_2TArrayLength];
+#define RadioB_2TArrayLength 78
+extern u32 Rtl8192CURadioB_2TArray[RadioB_2TArrayLength];
+#define RadioA_1TArrayLength 282
+extern u32 Rtl8192CURadioA_1TArray[RadioA_1TArrayLength];
+#define RadioB_1TArrayLength 1
+extern u32 Rtl8192CURadioB_1TArray[RadioB_1TArrayLength];
+#define RadioA_1T_mCardArrayLength 282
+extern u32 Rtl8192CURadioA_1T_mCardArray[RadioA_1T_mCardArrayLength];
+#define RadioB_1T_mCardArrayLength 1
+extern u32 Rtl8192CURadioB_1T_mCardArray[RadioB_1T_mCardArrayLength];
+#define RadioA_1T_HPArrayLength 282
+extern u32 Rtl8192CURadioA_1T_HPArray[RadioA_1T_HPArrayLength];
+#define RadioB_GM_ArrayLength 1
+extern u32 Rtl8192CURadioB_GM_Array[RadioB_GM_ArrayLength];
+#define MAC_2T_ArrayLength 172
+extern u32 Rtl8192CUMAC_2T_Array[MAC_2T_ArrayLength];
+#define MACPHY_Array_PGLength 1
+extern u32 Rtl8192CUMACPHY_Array_PG[MACPHY_Array_PGLength];
+#define AGCTAB_2TArrayLength 320
+extern u32 Rtl8192CUAGCTAB_2TArray[AGCTAB_2TArrayLength];
+#define AGCTAB_1TArrayLength 320
+extern u32 Rtl8192CUAGCTAB_1TArray[AGCTAB_1TArrayLength];
+#define AGCTAB_1T_HPArrayLength 320
+extern u32 Rtl8192CUAGCTAB_1T_HPArray[AGCTAB_1T_HPArrayLength];
+
+#endif //__INC_HAL8192CU_FW_IMG_H
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/Hal8192DEHWImg.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/Hal8192DEHWImg.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/Hal8192DEHWImg.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/Hal8192DEHWImg.h	2017-09-23 03:42:50.026675040 +0800
@@ -0,0 +1,66 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __INC_HAL8192DU_FW_IMG_H
+#define __INC_HAL8192DU_FW_IMG_H
+
+#include <basic_types.h>
+
+/*Created on  2011/ 8/ 8,  1:41*/
+
+#define ImgArrayLength 29642
+extern u8 Rtl8192DEFwImgArray[ImgArrayLength];
+#define MainArrayLength 1
+extern u8 Rtl8192DEFwMainArray[MainArrayLength];
+#define DataArrayLength 1
+extern u8 Rtl8192DEFwDataArray[DataArrayLength];
+#define PHY_REG_2TArrayLength 380
+extern u32 Rtl8192DEPHY_REG_2TArray[PHY_REG_2TArrayLength];
+#define PHY_REG_1TArrayLength 1
+extern u32 Rtl8192DEPHY_REG_1TArray[PHY_REG_1TArrayLength];
+#define PHY_REG_Array_PGLength 624
+extern u32 Rtl8192DEPHY_REG_Array_PG[PHY_REG_Array_PGLength];
+#define PHY_REG_Array_MPLength 10
+extern u32 Rtl8192DEPHY_REG_Array_MP[PHY_REG_Array_MPLength];
+#define RadioA_2TArrayLength 378
+extern u32 Rtl8192DERadioA_2TArray[RadioA_2TArrayLength];
+#define RadioB_2TArrayLength 384
+extern u32 Rtl8192DERadioB_2TArray[RadioB_2TArrayLength];
+#define RadioA_1TArrayLength 1
+extern u32 Rtl8192DERadioA_1TArray[RadioA_1TArrayLength];
+#define RadioB_1TArrayLength 1
+extern u32 Rtl8192DERadioB_1TArray[RadioB_1TArrayLength];
+#define RadioA_2T_intPAArrayLength 378
+extern u32 Rtl8192DERadioA_2T_intPAArray[RadioA_2T_intPAArrayLength];
+#define RadioB_2T_intPAArrayLength 384
+extern u32 Rtl8192DERadioB_2T_intPAArray[RadioB_2T_intPAArrayLength];
+#define MAC_2TArrayLength 160
+extern u32 Rtl8192DEMAC_2TArray[MAC_2TArrayLength];
+#define AGCTAB_ArrayLength 386
+extern u32 Rtl8192DEAGCTAB_Array[AGCTAB_ArrayLength];
+#define AGCTAB_5GArrayLength 194
+extern u32 Rtl8192DEAGCTAB_5GArray[AGCTAB_5GArrayLength];
+#define AGCTAB_2GArrayLength 194
+extern u32 Rtl8192DEAGCTAB_2GArray[AGCTAB_2GArrayLength];
+#define AGCTAB_2TArrayLength 1
+extern u32 Rtl8192DEAGCTAB_2TArray[AGCTAB_2TArrayLength];
+#define AGCTAB_1TArrayLength 1
+extern u32 Rtl8192DEAGCTAB_1TArray[AGCTAB_1TArrayLength];
+
+#endif //__INC_HAL8192CU_FW_IMG_H
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/Hal8192DETestHWImg.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/Hal8192DETestHWImg.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/Hal8192DETestHWImg.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/Hal8192DETestHWImg.h	2017-09-23 03:42:50.026675040 +0800
@@ -0,0 +1,54 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __INC_HAL8192DETEST_FW_IMG_H
+#define __INC_HAL8192DETEST_FW_IMG_H
+
+#include <basic_types.h>
+
+/*Created on  2010/ 5/27,  8: 6*/
+
+#define Rtl8192DTestImgArrayLength 15054
+extern u8 Rtl8192DTestFwImgArray[Rtl8192DTestImgArrayLength];
+#define Rtl8192DTestMainArrayLength 1
+extern u8 Rtl8192DTestFwMainArray[Rtl8192DTestMainArrayLength];
+#define Rtl8192DTestDataArrayLength 1
+extern u8 Rtl8192DTestFwDataArray[Rtl8192DTestDataArrayLength];
+#define Rtl8192DTestPHY_REG_2TArrayLength 376
+extern u32 Rtl8192DTestPHY_REG_2TArray[Rtl8192DTestPHY_REG_2TArrayLength];
+#define Rtl8192DTestPHY_REG_1TArrayLength 1
+extern u32 Rtl8192DTestPHY_REG_1TArray[Rtl8192DTestPHY_REG_1TArrayLength];
+#define Rtl8192DTestPHY_REG_Array_PGLength 1
+extern u32 Rtl8192DTestPHY_REG_Array_PG[Rtl8192DTestPHY_REG_Array_PGLength];
+#define Rtl8192DTestRadioA_2TArrayLength 340
+extern u32 Rtl8192DTestRadioA_2TArray[Rtl8192DTestRadioA_2TArrayLength];
+#define Rtl8192DTestRadioB_2TArrayLength 340
+extern u32 Rtl8192DTestRadioB_2TArray[Rtl8192DTestRadioB_2TArrayLength];
+#define Rtl8192DTestRadioA_1TArrayLength 1
+extern u32 Rtl8192DTestRadioA_1TArray[Rtl8192DTestRadioA_1TArrayLength];
+#define Rtl8192DTestRadioB_1TArrayLength 1
+extern u32 Rtl8192DTestRadioB_1TArray[Rtl8192DTestRadioB_1TArrayLength];
+#define Rtl8192DTestMAC_2TArrayLength 174
+extern u32 Rtl8192DTestMAC_2TArray[Rtl8192DTestMAC_2TArrayLength];
+#define Rtl8192DTestAGCTAB_5GArrayLength 514
+extern u32 Rtl8192DTestAGCTAB_5GArray[Rtl8192DTestAGCTAB_5GArrayLength];
+#define Rtl8192DTestAGCTAB_2GArrayLength 514
+extern u32 Rtl8192DTestAGCTAB_2GArray[Rtl8192DTestAGCTAB_2GArrayLength];
+
+#endif //__INC_HAL8192CU_FW_IMG_H
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/Hal8192DPhyCfg.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/Hal8192DPhyCfg.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/Hal8192DPhyCfg.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/Hal8192DPhyCfg.h	2017-09-23 03:42:50.026675040 +0800
@@ -0,0 +1,528 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+/*****************************************************************************
+ *
+ * Module:	__INC_HAL8192DPHYCFG_H
+ *
+ *
+ * Note:	
+ *			
+ *
+ * Export:	Constants, macro, functions(API), global variables(None).
+ *
+ * Abbrev:	
+ *
+ * History:
+ *		Data		Who		Remark 
+ *      08/07/2007  MHC    	1. Porting from 9x series PHYCFG.h.
+ *							2. Reorganize code architecture.
+ * 
+ *****************************************************************************/
+ /* Check to see if the file has been included already.  */
+#ifndef __INC_HAL8192DPHYCFG_H
+#define __INC_HAL8192DPHYCFG_H
+
+
+/*--------------------------Define Parameters-------------------------------*/
+#define LOOP_LIMIT				5
+#define MAX_STALL_TIME			50		//us
+#define AntennaDiversityValue	0x80	//(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80)
+#define MAX_TXPWR_IDX_NMODE_92S	63
+#define Reset_Cnt_Limit			3
+
+
+#define IQK_MAC_REG_NUM		4
+#define IQK_ADDA_REG_NUM		16
+#define IQK_BB_REG_NUM			10
+#define IQK_BB_REG_NUM_92C	9
+#define IQK_BB_REG_NUM_92D	10
+#define IQK_BB_REG_NUM_test	6
+#define index_mapping_NUM		13
+#define Rx_index_mapping_NUM	15
+#define AVG_THERMAL_NUM		8
+#define IQK_Matrix_REG_NUM	8
+#define IQK_Matrix_Settings_NUM	1+24+21
+
+#ifdef CONFIG_PCI_HCI
+#define	SET_RTL8192SE_RF_SLEEP(_pAdapter)							\
+{																	\
+	u1Byte		u1bTmp;												\
+	u1bTmp = PlatformEFIORead1Byte(_pAdapter, REG_LDOV12D_CTRL);		\
+	u1bTmp |= BIT0;													\
+	PlatformEFIOWrite1Byte(_pAdapter, REG_LDOV12D_CTRL, u1bTmp);		\
+	PlatformEFIOWrite1Byte(_pAdapter, REG_SPS_OCP_CFG, 0x0);				\
+	PlatformEFIOWrite1Byte(_pAdapter, TXPAUSE, 0xFF);				\
+	PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC);				\
+	delay_us(100);													\
+	PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC);				\
+	PlatformEFIOWrite1Byte(_pAdapter, PHY_CCA, 0x0);				\
+	delay_us(10);													\
+	PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x37FC);				\
+	delay_us(10);													\
+	PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC);				\
+	delay_us(10);													\
+	PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC);				\
+}
+#endif
+
+
+/*--------------------------Define Parameters-------------------------------*/
+
+
+/*------------------------------Define structure----------------------------*/ 
+typedef enum _SwChnlCmdID{
+	CmdID_End,
+	CmdID_SetTxPowerLevel,
+	CmdID_BBRegWrite10,
+	CmdID_WritePortUlong,
+	CmdID_WritePortUshort,
+	CmdID_WritePortUchar,
+	CmdID_RF_WriteReg,
+}SwChnlCmdID;
+
+
+/* 1. Switch channel related */
+typedef struct _SwChnlCmd{
+	SwChnlCmdID	CmdID;
+	u32			Para1;
+	u32			Para2;
+	u32			msDelay;
+}SwChnlCmd;
+
+typedef enum _HW90_BLOCK{
+	HW90_BLOCK_MAC = 0,
+	HW90_BLOCK_PHY0 = 1,
+	HW90_BLOCK_PHY1 = 2,
+	HW90_BLOCK_RF = 3,
+	HW90_BLOCK_MAXIMUM = 4, // Never use this
+}HW90_BLOCK_E, *PHW90_BLOCK_E;
+
+//vivi added this for read parameter from header, 20100908
+typedef enum _RF_CONTENT{
+	radioa_txt = 0x1000,
+	radiob_txt = 0x1001,
+	radioc_txt = 0x1002,
+	radiod_txt = 0x1003
+} RF_CONTENT;
+
+#define	RF_PATH_MAX			2
+
+typedef enum _WIRELESS_MODE {
+	WIRELESS_MODE_UNKNOWN = 0x00,
+	WIRELESS_MODE_A = 0x01,
+	WIRELESS_MODE_B = 0x02,
+	WIRELESS_MODE_G = 0x04,
+	WIRELESS_MODE_AUTO = 0x08,
+	WIRELESS_MODE_N_24G = 0x10,
+	WIRELESS_MODE_N_5G = 0x20
+} WIRELESS_MODE;
+
+
+#define CHANNEL_MAX_NUMBER		14+24+21	// 14 is the max channel number
+#define CHANNEL_GROUP_MAX		3+9	// ch1~3, ch4~9, ch10~14 total three groups
+#define MAX_PG_GROUP 13
+
+#define	CHANNEL_GROUP_MAX_2G		3
+#define	CHANNEL_GROUP_IDX_5GL		3
+#define	CHANNEL_GROUP_IDX_5GM		6
+#define	CHANNEL_GROUP_IDX_5GH		9
+#define	CHANNEL_GROUP_MAX_5G		9
+#define	CHANNEL_MAX_NUMBER_2G		14
+
+typedef enum _BaseBand_Config_Type{
+	BaseBand_Config_PHY_REG = 0,			//Radio Path A
+	BaseBand_Config_AGC_TAB = 1,			//Radio Path B
+}BaseBand_Config_Type, *PBaseBand_Config_Type;
+
+typedef enum _MACPHY_MODE_8192D{
+	SINGLEMAC_SINGLEPHY,
+	DUALMAC_DUALPHY,
+	DUALMAC_SINGLEPHY,
+}MACPHY_MODE_8192D,*PMACPHY_MODE_8192D;
+
+typedef enum _BAND_TYPE{
+	BAND_ON_2_4G = 0,
+	BAND_ON_5G,
+	BAND_ON_BOTH,
+	BANDMAX
+}BAND_TYPE,*PBAND_TYPE;
+
+typedef enum _PHY_Rate_Tx_Power_Offset_Area{
+	RA_OFFSET_LEGACY_OFDM1,
+	RA_OFFSET_LEGACY_OFDM2,
+	RA_OFFSET_HT_OFDM1,
+	RA_OFFSET_HT_OFDM2,
+	RA_OFFSET_HT_OFDM3,
+	RA_OFFSET_HT_OFDM4,
+	RA_OFFSET_HT_CCK,
+}RA_OFFSET_AREA,*PRA_OFFSET_AREA;
+
+
+/* BB/RF related */
+typedef	enum _RF_TYPE_8190P{
+	RF_TYPE_MIN,	// 0
+	RF_8225=1,			// 1 11b/g RF for verification only
+	RF_8256=2,			// 2 11b/g/n 
+	RF_8258=3,			// 3 11a/b/g/n RF
+	RF_6052=4,		// 4 11b/g/n RF
+	//RF_6052=5,		// 4 11b/g/n RF
+	// TODO: We sholud remove this psudo PHY RF after we get new RF.
+	RF_PSEUDO_11N=5,	// 5, It is a temporality RF. 
+}RF_TYPE_8190P_E,*PRF_TYPE_8190P_E;
+
+
+typedef enum _RATR_TABLE_MODE_8192C{
+	RATR_INX_WIRELESS_NGB = 0,
+	RATR_INX_WIRELESS_NG = 1,
+	RATR_INX_WIRELESS_NB = 2,
+	RATR_INX_WIRELESS_N = 3,
+	RATR_INX_WIRELESS_GB = 4,
+	RATR_INX_WIRELESS_G = 5,
+	RATR_INX_WIRELESS_B = 6,
+	RATR_INX_WIRELESS_MC = 7,
+	RATR_INX_WIRELESS_A = 8,
+}RATR_TABLE_MODE_8192C, *PRATR_TABLE_MODE_8192C;
+
+typedef struct _BB_REGISTER_DEFINITION{
+	u32 rfintfs;			// set software control: 
+							//		0x870~0x877[8 bytes]
+							
+	u32 rfintfi;			// readback data: 
+							//		0x8e0~0x8e7[8 bytes]
+							
+	u32 rfintfo; 		// output data: 
+							//		0x860~0x86f [16 bytes]
+							
+	u32 rfintfe; 		// output enable: 
+							//		0x860~0x86f [16 bytes]
+							
+	u32 rf3wireOffset;	// LSSI data:
+							//		0x840~0x84f [16 bytes]
+							
+	u32 rfLSSI_Select;	// BB Band Select: 
+							//		0x878~0x87f [8 bytes]
+							
+	u32 rfTxGainStage;	// Tx gain stage: 
+							//		0x80c~0x80f [4 bytes]
+							
+	u32 rfHSSIPara1; 	// wire parameter control1 : 
+							//		0x820~0x823,0x828~0x82b, 0x830~0x833, 0x838~0x83b [16 bytes]
+							
+	u32 rfHSSIPara2; 	// wire parameter control2 : 
+							//		0x824~0x827,0x82c~0x82f, 0x834~0x837, 0x83c~0x83f [16 bytes]
+								
+	u32 rfSwitchControl; //Tx Rx antenna control : 
+							//		0x858~0x85f [16 bytes]
+								
+	u32 rfAGCControl1; 	//AGC parameter control1 : 
+							//		0xc50~0xc53,0xc58~0xc5b, 0xc60~0xc63, 0xc68~0xc6b [16 bytes] 
+								
+	u32 rfAGCControl2; 	//AGC parameter control2 : 
+							//		0xc54~0xc57,0xc5c~0xc5f, 0xc64~0xc67, 0xc6c~0xc6f [16 bytes] 
+							
+	u32 rfRxIQImbalance; //OFDM Rx IQ imbalance matrix : 
+							//		0xc14~0xc17,0xc1c~0xc1f, 0xc24~0xc27, 0xc2c~0xc2f [16 bytes]
+							
+	u32 rfRxAFE;  		//Rx IQ DC ofset and Rx digital filter, Rx DC notch filter : 
+							//		0xc10~0xc13,0xc18~0xc1b, 0xc20~0xc23, 0xc28~0xc2b [16 bytes]
+							
+	u32 rfTxIQImbalance; //OFDM Tx IQ imbalance matrix
+							//		0xc80~0xc83,0xc88~0xc8b, 0xc90~0xc93, 0xc98~0xc9b [16 bytes]
+							
+	u32 rfTxAFE; 		//Tx IQ DC Offset and Tx DFIR type
+							//		0xc84~0xc87,0xc8c~0xc8f, 0xc94~0xc97, 0xc9c~0xc9f [16 bytes]
+								
+	u32 rfLSSIReadBack; 	//LSSI RF readback data SI mode
+								//		0x8a0~0x8af [16 bytes]
+
+	u32 rfLSSIReadBackPi; 	//LSSI RF readback data PI mode 0x8b8-8bc for Path A and B
+
+}BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T;
+
+#ifdef CONFIG_MP_INCLUDED
+typedef enum _ANTENNA_PATH{
+        ANTENNA_NONE 	= 0x00,
+		ANTENNA_D		,
+		ANTENNA_C		,
+		ANTENNA_CD		,
+		ANTENNA_B		,
+		ANTENNA_BD		,
+		ANTENNA_BC		,
+		ANTENNA_BCD		,
+		ANTENNA_A		,
+		ANTENNA_AD		,
+		ANTENNA_AC		,
+		ANTENNA_ACD		,
+		ANTENNA_AB		,
+		ANTENNA_ABD		,
+		ANTENNA_ABC		,
+		ANTENNA_ABCD	
+} ANTENNA_PATH;
+#endif
+
+typedef struct _R_ANTENNA_SELECT_OFDM{	
+	u32			r_tx_antenna:4;	
+	u32			r_ant_l:4;
+	u32			r_ant_non_ht:4;	
+	u32			r_ant_ht1:4;
+	u32			r_ant_ht2:4;
+	u32			r_ant_ht_s1:4;
+	u32			r_ant_non_ht_s1:4;
+	u32			OFDM_TXSC:2;
+	u32			Reserved:2;
+}R_ANTENNA_SELECT_OFDM;
+
+typedef struct _R_ANTENNA_SELECT_CCK{
+	u8			r_cckrx_enable_2:2;	
+	u8			r_cckrx_enable:2;
+	u8			r_ccktx_enable:4;
+}R_ANTENNA_SELECT_CCK;
+
+/*------------------------------Define structure----------------------------*/ 
+
+
+/*------------------------Export global variable----------------------------*/
+/*------------------------Export global variable----------------------------*/
+
+
+/*------------------------Export Marco Definition---------------------------*/
+/*------------------------Export Marco Definition---------------------------*/
+
+//Added for TX Power
+//u8 GetRightChnlPlace(u8 chnl);
+u8 rtl8192d_GetRightChnlPlaceforIQK(u8 chnl);
+u8 rtl8192d_getChnlGroupfromArray(u8 chnl);
+/*--------------------------Exported Function prototype---------------------*/
+//
+// BB and RF register read/write
+//
+void	rtl8192d_PHY_SetBBReg1Byte(	IN	PADAPTER	Adapter,
+								IN	u32		RegAddr,
+								IN	u32		BitMask,
+								IN	u32		Data	);
+u32	rtl8192d_PHY_QueryBBReg(	IN	PADAPTER	Adapter,
+								IN	u32		RegAddr,
+								IN	u32		BitMask	);
+void	rtl8192d_PHY_SetBBReg(	IN	PADAPTER	Adapter,
+								IN	u32		RegAddr,
+								IN	u32		BitMask,
+								IN	u32		Data	);
+u32	rtl8192d_PHY_QueryRFReg(	IN	PADAPTER			Adapter,
+								IN	RF_RADIO_PATH_E	eRFPath,
+								IN	u32				RegAddr,
+								IN	u32				BitMask	);
+void	rtl8192d_PHY_SetRFReg(	IN	PADAPTER			Adapter,
+								IN	RF_RADIO_PATH_E	eRFPath,
+								IN	u32				RegAddr,
+								IN	u32				BitMask,
+								IN	u32				Data	);
+
+//
+// Initialization related function
+//
+/* MAC/BB/RF HAL config */
+extern	int	PHY_MACConfig8192D(	IN	PADAPTER	Adapter	);
+extern	int	PHY_BBConfig8192D(	IN	PADAPTER	Adapter	);
+extern	int	PHY_RFConfig8192D(	IN	PADAPTER	Adapter	);
+/* RF config */
+int	rtl8192d_PHY_ConfigRFWithParaFile(	IN	PADAPTER	Adapter,
+												IN	u8* 	pFileName,
+												IN	RF_RADIO_PATH_E	eRFPath);
+int	rtl8192d_PHY_ConfigRFWithHeaderFile(	IN	PADAPTER			Adapter,
+												IN	RF_CONTENT			Content,
+												IN	RF_RADIO_PATH_E	eRFPath);
+/* BB/RF readback check for making sure init OK */
+int	rtl8192d_PHY_CheckBBAndRFOK(	IN	PADAPTER			Adapter,
+										IN	HW90_BLOCK_E		CheckBlock,
+										IN	RF_RADIO_PATH_E	eRFPath	  );
+/* Read initi reg value for tx power setting. */
+void	rtl8192d_PHY_GetHWRegOriginalValue(	IN	PADAPTER		Adapter	);
+
+//
+// RF Power setting
+//
+//extern	BOOLEAN	PHY_SetRFPowerState(IN	PADAPTER			Adapter, 
+//									IN	RT_RF_POWER_STATE	eRFPowerState);
+
+//
+// BB TX Power R/W
+//
+void	PHY_GetTxPowerLevel8192D(	IN	PADAPTER		Adapter,
+											OUT u32*    		powerlevel	);
+void	PHY_SetTxPowerLevel8192D(	IN	PADAPTER		Adapter,
+											IN	u8			channel	);
+BOOLEAN	PHY_UpdateTxPowerDbm8192D(	IN	PADAPTER	Adapter,
+											IN	int		powerInDbm	);
+
+//
+VOID 
+PHY_ScanOperationBackup8192D(IN	PADAPTER	Adapter,
+										IN	u8		Operation	);
+
+//
+// Switch bandwidth for 8192S
+//
+//void	PHY_SetBWModeCallback8192C(	IN	PRT_TIMER		pTimer	);
+void	PHY_SetBWMode8192D(	IN	PADAPTER			pAdapter,
+									IN	HT_CHANNEL_WIDTH	ChnlWidth,
+									IN	unsigned char	Offset	);
+
+//
+// Set FW CMD IO for 8192S.
+//
+//extern	BOOLEAN HalSetIO8192C(	IN	PADAPTER			Adapter,
+//									IN	IO_TYPE				IOType);
+
+//
+// Set A2 entry to fw for 8192S
+//
+extern	void FillA2Entry8192C(		IN	PADAPTER			Adapter,
+										IN	u8				index,
+										IN	u8*				val);
+
+
+//
+// channel switch related funciton
+//
+//extern	void	PHY_SwChnlCallback8192C(	IN	PRT_TIMER		pTimer	);
+void	PHY_SwChnl8192D(	IN	PADAPTER		pAdapter,
+									IN	u8			channel	);
+				// Call after initialization
+void	PHY_SwChnlPhy8192D(	IN	PADAPTER		pAdapter,
+									IN	u8			channel	);
+
+extern void ChkFwCmdIoDone(	IN	PADAPTER	Adapter);
+
+#ifdef USE_WORKITEM	
+//extern 	void SetIOWorkItemCallback( IN PVOID            pContext );
+#else
+//extern	void SetIOTimerCallback( IN PRT_TIMER		pTimer);
+#endif	
+				
+//
+// BB/MAC/RF other monitor API
+//
+void	PHY_SetMonitorMode8192D(IN	PADAPTER	pAdapter,
+										IN	BOOLEAN		bEnableMonitorMode	);
+
+BOOLEAN	PHY_CheckIsLegalRfPath8192D(IN	PADAPTER	pAdapter,
+											IN	u32		eRFPath	);
+
+//
+// IQ calibrate
+//
+void	rtl8192d_PHY_IQCalibrate(	IN	PADAPTER	pAdapter);
+
+
+//
+// LC calibrate
+//
+void	rtl8192d_PHY_LCCalibrate(IN	PADAPTER	pAdapter);
+
+//
+// AP calibrate
+//
+void	rtl8192d_PHY_APCalibrate(IN	PADAPTER	pAdapter, IN 	char		delta);
+
+
+//
+// Modify the value of the hw register when beacon interval be changed.
+//
+void	
+rtl8192d_PHY_SetBeaconHwReg(	IN	PADAPTER		Adapter,
+					IN	u16			BeaconInterval	);
+
+
+extern	VOID
+PHY_SwitchEphyParameter(
+	IN	PADAPTER			Adapter
+	);
+
+extern	VOID
+PHY_EnableHostClkReq(
+	IN	PADAPTER			Adapter
+	);
+
+BOOLEAN
+SetAntennaConfig92C(
+	IN	PADAPTER	Adapter,
+	IN	u8		DefaultAnt	
+	);
+
+VOID 
+PHY_StopTRXBeforeChangeBand8192D(
+	  PADAPTER		Adapter
+);
+
+VOID
+PHY_UpdateBBRFConfiguration8192D(
+	IN PADAPTER Adapter,
+	IN BOOLEAN bisBandSwitch
+);
+
+VOID PHY_ReadMacPhyMode92D(
+	IN PADAPTER	Adapter,
+	IN BOOLEAN 	AutoloadFail	
+);
+
+VOID PHY_ConfigMacPhyMode92D(
+	IN PADAPTER	Adapter
+);
+
+VOID PHY_ConfigMacPhyModeInfo92D(
+	IN PADAPTER	Adapter
+);
+
+VOID PHY_ConfigMacCoexist_RFPage92D(
+	IN PADAPTER	Adapter
+);
+
+VOID
+rtl8192d_PHY_InitRxSetting(
+	IN	PADAPTER Adapter
+);
+
+VOID
+rtl8192d_PHY_ResetIQKResult(
+	IN	PADAPTER Adapter
+);
+
+
+VOID 
+rtl8192d_PHY_SetRFPathSwitch(IN	PADAPTER	pAdapter, IN	BOOLEAN		bMain);
+
+VOID
+HalChangeCCKStatus8192D(
+	IN	PADAPTER	Adapter,
+	IN	BOOLEAN		bCCKDisable
+);
+
+/*--------------------------Exported Function prototype---------------------*/
+
+#define PHY_SetBBReg1Byte(Adapter, RegAddr, BitMask, Data) rtl8192d_PHY_SetBBReg1Byte((Adapter), (RegAddr), (BitMask), (Data))
+#define PHY_QueryBBReg(Adapter, RegAddr, BitMask) rtl8192d_PHY_QueryBBReg((Adapter), (RegAddr), (BitMask))
+#define PHY_SetBBReg(Adapter, RegAddr, BitMask, Data) rtl8192d_PHY_SetBBReg((Adapter), (RegAddr), (BitMask), (Data))
+#define PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask) rtl8192d_PHY_QueryRFReg((Adapter), (eRFPath), (RegAddr), (BitMask))
+#define PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data) rtl8192d_PHY_SetRFReg((Adapter), (eRFPath), (RegAddr), (BitMask), (Data))
+
+#define PHY_SetMacReg	PHY_SetBBReg
+
+#endif	// __INC_HAL8192SPHYCFG_H
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/Hal8192DPhyReg.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/Hal8192DPhyReg.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/Hal8192DPhyReg.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/Hal8192DPhyReg.h	2017-09-23 03:42:50.030675028 +0800
@@ -0,0 +1,1171 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+/*****************************************************************************
+ *
+ * Module:	__INC_HAL8192DPHYREG_H
+ *
+ *
+ * Note:	1. Define PMAC/BB register map
+ *			2. Define RF register map
+ *			3. PMAC/BB register bit mask.
+ *			4. RF reg bit mask.
+ *			5. Other BB/RF relative definition.
+ *			
+ *
+ * Export:	Constants, macro, functions(API), global variables(None).
+ *
+ * Abbrev:	
+ *
+ * History:
+ *		Data		Who		Remark 
+ *      08/07/2007  MHC    	1. Porting from 9x series PHYCFG.h.
+ *							2. Reorganize code architecture.
+ *	09/25/2008	MH		1. Add RL6052 register definition
+ * 
+ *****************************************************************************/
+#ifndef __INC_HAL8192DPHYREG_H
+#define __INC_HAL8192DPHYREG_H
+
+
+/*--------------------------Define Parameters-------------------------------*/
+
+//============================================================
+//       8192S Regsiter offset definition
+//============================================================
+
+//
+// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF
+// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF
+// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00
+// 3. RF register 0x00-2E
+// 4. Bit Mask for BB/RF register
+// 5. Other defintion for BB/RF R/W
+//
+
+
+//
+// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF
+// 1. Page1(0x100)
+//
+#define		rPMAC_Reset					0x100
+#define		rPMAC_TxStart					0x104
+#define		rPMAC_TxLegacySIG				0x108
+#define		rPMAC_TxHTSIG1				0x10c
+#define		rPMAC_TxHTSIG2				0x110
+#define		rPMAC_PHYDebug				0x114
+#define		rPMAC_TxPacketNum				0x118
+#define		rPMAC_TxIdle					0x11c
+#define		rPMAC_TxMACHeader0			0x120
+#define		rPMAC_TxMACHeader1			0x124
+#define		rPMAC_TxMACHeader2			0x128
+#define		rPMAC_TxMACHeader3			0x12c
+#define		rPMAC_TxMACHeader4			0x130
+#define		rPMAC_TxMACHeader5			0x134
+#define		rPMAC_TxDataType				0x138
+#define		rPMAC_TxRandomSeed			0x13c
+#define		rPMAC_CCKPLCPPreamble			0x140
+#define		rPMAC_CCKPLCPHeader			0x144
+#define		rPMAC_CCKCRC16				0x148
+#define		rPMAC_OFDMRxCRC32OK			0x170
+#define		rPMAC_OFDMRxCRC32Er			0x174
+#define		rPMAC_OFDMRxParityEr			0x178
+#define		rPMAC_OFDMRxCRC8Er			0x17c
+#define		rPMAC_CCKCRxRC16Er			0x180
+#define		rPMAC_CCKCRxRC32Er			0x184
+#define		rPMAC_CCKCRxRC32OK			0x188
+#define		rPMAC_TxStatus					0x18c
+
+//
+// 2. Page2(0x200)
+//
+// The following two definition are only used for USB interface.
+#define		RF_BB_CMD_ADDR				0x02c0	// RF/BB read/write command address.
+#define		RF_BB_CMD_DATA				0x02c4	// RF/BB read/write command data.
+
+//
+// 3. Page8(0x800)
+//
+#define		rFPGA0_RFMOD				0x800	//RF mode & CCK TxSC // RF BW Setting??
+
+#define		rFPGA0_TxInfo				0x804	// Status report??
+#define		rFPGA0_PSDFunction			0x808
+
+#define		rFPGA0_TxGainStage			0x80c	// Set TX PWR init gain?
+
+#define		rFPGA0_RFTiming1			0x810	// Useless now
+#define		rFPGA0_RFTiming2			0x814
+
+#define		rFPGA0_XA_HSSIParameter1		0x820	// RF 3 wire register
+#define		rFPGA0_XA_HSSIParameter2		0x824
+#define		rFPGA0_XB_HSSIParameter1		0x828
+#define		rFPGA0_XB_HSSIParameter2		0x82c
+
+#define		rFPGA0_XA_LSSIParameter		0x840
+#define		rFPGA0_XB_LSSIParameter		0x844
+
+#define		rFPGA0_RFWakeUpParameter		0x850	// Useless now
+#define		rFPGA0_RFSleepUpParameter		0x854
+
+#define		rFPGA0_XAB_SwitchControl		0x858	// RF Channel switch
+#define		rFPGA0_XCD_SwitchControl		0x85c
+
+#define		rFPGA0_XA_RFInterfaceOE		0x860	// RF Channel switch
+#define		rFPGA0_XB_RFInterfaceOE		0x864
+
+#define		rFPGA0_XAB_RFInterfaceSW		0x870	// RF Interface Software Control
+#define		rFPGA0_XCD_RFInterfaceSW		0x874
+
+#define		rFPGA0_XAB_RFParameter		0x878	// RF Parameter
+#define		rFPGA0_XCD_RFParameter		0x87c
+
+#define		rFPGA0_AnalogParameter1		0x880	// Crystal cap setting RF-R/W protection for parameter4??
+#define		rFPGA0_AnalogParameter2		0x884
+#define		rFPGA0_AnalogParameter3		0x888
+#define		rFPGA0_AdDaClockEn			0x888	// enable ad/da clock1 for dual-phy
+#define		rFPGA0_AnalogParameter4		0x88c
+
+#define		rFPGA0_XA_LSSIReadBack		0x8a0	// Tranceiver LSSI Readback
+#define		rFPGA0_XB_LSSIReadBack		0x8a4
+#define		rFPGA0_XC_LSSIReadBack		0x8a8
+#define		rFPGA0_XD_LSSIReadBack		0x8ac
+
+#define		rFPGA0_PSDReport				0x8b4	// Useless now
+#define		TransceiverA_HSPI_Readback	0x8b8	// Transceiver A HSPI Readback
+#define		TransceiverB_HSPI_Readback	0x8bc	// Transceiver B HSPI Readback
+#define		rFPGA0_XAB_RFInterfaceRB		0x8e0	// Useless now // RF Interface Readback Value
+#define		rFPGA0_XCD_RFInterfaceRB		0x8e4	// Useless now
+
+//
+// 4. Page9(0x900)
+//
+#define		rFPGA1_RFMOD				0x900	//RF mode & OFDM TxSC // RF BW Setting??
+
+#define		rFPGA1_TxBlock				0x904	// Useless now
+#define		rFPGA1_DebugSelect			0x908	// Useless now
+#define		rFPGA1_TxInfo				0x90c	// Useless now // Status report??
+
+//
+// 5. PageA(0xA00)
+//
+// Set Control channel to upper or lower. These settings are required only for 40MHz
+#define		rCCK0_System				0xa00
+
+#define		rCCK0_AFESetting			0xa04	// Disable init gain now // Select RX path by RSSI
+#define		rCCK0_CCA					0xa08	// Disable init gain now // Init gain
+
+#define		rCCK0_RxAGC1				0xa0c 	//AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series
+#define		rCCK0_RxAGC2				0xa10 	//AGC & DAGC
+
+#define		rCCK0_RxHP					0xa14
+
+#define		rCCK0_DSPParameter1		0xa18	//Timing recovery & Channel estimation threshold
+#define		rCCK0_DSPParameter2		0xa1c	//SQ threshold
+
+#define		rCCK0_TxFilter1				0xa20
+#define		rCCK0_TxFilter2				0xa24
+#define		rCCK0_DebugPort			0xa28	//debug port and Tx filter3
+#define		rCCK0_FalseAlarmReport		0xa2c	//0xa2d	useless now 0xa30-a4f channel report
+#define		rCCK0_TRSSIReport         		0xa50
+#define		rCCK0_RxReport            		0xa54  //0xa57
+#define		rCCK0_FACounterLower      	0xa5c  //0xa5b
+#define		rCCK0_FACounterUpper      	0xa58  //0xa5c
+
+//
+// PageB(0xB00)
+//
+#define		rPdp_AntA      					0xb00  
+#define		rPdp_AntA_4    				0xb04
+#define		rPdp_AntA_8    				0xb08
+#define		rPdp_AntA_C    				0xb0c
+#define		rPdp_AntA_10    				0xb10
+#define		rPdp_AntA_14    				0xb14
+#define		rPdp_AntA_18    				0xb18
+#define		rPdp_AntA_1C    				0xb1c
+#define		rPdp_AntA_20    				0xb20
+#define		rPdp_AntA_24    				0xb24
+
+#define		rConfig_Pmpd_AntA 			0xb28
+#define		rConfig_ram64x16				0xb2c
+
+#define		rBndA						0xb30
+#define		rHssiPar						0xb34
+
+#define		rConfig_AntA 					0xb68
+#define		rConfig_AntB 					0xb6c
+
+#define		rPdp_AntB 					0xb70
+#define		rPdp_AntB_4 					0xb74
+#define		rPdp_AntB_8 					0xb78
+#define		rPdp_AntB_C 					0xb7c
+#define		rPdp_AntB_10 					0xb80
+#define		rPdp_AntB_14 					0xb84
+#define		rPdp_AntB_18 					0xb88
+#define		rPdp_AntB_1C 					0xb8c
+#define		rPdp_AntB_20 					0xb90
+#define		rPdp_AntB_24 					0xb94
+
+#define		rConfig_Pmpd_AntB			0xb98
+
+#define		rBndB						0xba0
+
+#define		rAPK							0xbd8
+#define		rPm_Rx0_AntA				0xbdc
+#define		rPm_Rx1_AntA				0xbe0
+#define		rPm_Rx2_AntA				0xbe4
+#define		rPm_Rx3_AntA				0xbe8
+#define		rPm_Rx0_AntB				0xbec
+#define		rPm_Rx1_AntB				0xbf0
+#define		rPm_Rx2_AntB				0xbf4
+#define		rPm_Rx3_AntB				0xbf8
+
+//
+// 6. PageC(0xC00)
+//
+#define		rOFDM0_LSTF				0xc00
+
+#define		rOFDM0_TRxPathEnable		0xc04
+#define		rOFDM0_TRMuxPar			0xc08
+#define		rOFDM0_TRSWIsolation		0xc0c
+
+#define		rOFDM0_XARxAFE			0xc10  //RxIQ DC offset, Rx digital filter, DC notch filter
+#define		rOFDM0_XARxIQImbalance    	0xc14  //RxIQ imblance matrix
+#define		rOFDM0_XBRxAFE            		0xc18
+#define		rOFDM0_XBRxIQImbalance    	0xc1c
+#define		rOFDM0_XCRxAFE            		0xc20
+#define		rOFDM0_XCRxIQImbalance    	0xc24
+#define		rOFDM0_XDRxAFE            		0xc28
+#define		rOFDM0_XDRxIQImbalance    	0xc2c
+
+#define		rOFDM0_RxDetector1			0xc30  //PD,BW & SBD	// DM tune init gain
+#define		rOFDM0_RxDetector2			0xc34  //SBD & Fame Sync. 
+#define		rOFDM0_RxDetector3			0xc38  //Frame Sync.
+#define		rOFDM0_RxDetector4			0xc3c  //PD, SBD, Frame Sync & Short-GI
+
+#define		rOFDM0_RxDSP				0xc40  //Rx Sync Path
+#define		rOFDM0_CFOandDAGC		0xc44  //CFO & DAGC
+#define		rOFDM0_CCADropThreshold	0xc48 //CCA Drop threshold
+#define		rOFDM0_ECCAThreshold		0xc4c // energy CCA
+
+#define		rOFDM0_XAAGCCore1			0xc50	// DIG
+#define		rOFDM0_XAAGCCore2			0xc54
+#define		rOFDM0_XBAGCCore1			0xc58
+#define		rOFDM0_XBAGCCore2			0xc5c
+#define		rOFDM0_XCAGCCore1			0xc60
+#define		rOFDM0_XCAGCCore2			0xc64
+#define		rOFDM0_XDAGCCore1			0xc68
+#define		rOFDM0_XDAGCCore2			0xc6c
+
+#define		rOFDM0_AGCParameter1			0xc70
+#define		rOFDM0_AGCParameter2			0xc74
+#define		rOFDM0_AGCRSSITable			0xc78
+#define		rOFDM0_HTSTFAGC				0xc7c
+
+#define		rOFDM0_XATxIQImbalance		0xc80	// TX PWR TRACK and DIG
+#define		rOFDM0_XATxAFE				0xc84
+#define		rOFDM0_XBTxIQImbalance		0xc88
+#define		rOFDM0_XBTxAFE				0xc8c
+#define		rOFDM0_XCTxIQImbalance		0xc90
+#define		rOFDM0_XCTxAFE            			0xc94
+#define		rOFDM0_XDTxIQImbalance		0xc98
+#define		rOFDM0_XDTxAFE				0xc9c
+
+#define		rOFDM0_RxIQExtAnta			0xca0
+#define		rOFDM0_TxCoeff1				0xca4
+#define		rOFDM0_TxCoeff2				0xca8
+#define		rOFDM0_TxCoeff3				0xcac
+#define		rOFDM0_TxCoeff4				0xcb0
+#define		rOFDM0_TxCoeff5				0xcb4
+#define		rOFDM0_TxCoeff6				0xcb8
+#define		rOFDM0_RxHPParameter			0xce0
+#define		rOFDM0_TxPseudoNoiseWgt		0xce4
+#define		rOFDM0_FrameSync				0xcf0
+#define		rOFDM0_DFSReport				0xcf4
+
+//
+// 7. PageD(0xD00)
+//
+#define		rOFDM1_LSTF					0xd00
+#define		rOFDM1_TRxPathEnable			0xd04
+
+#define		rOFDM1_CFO						0xd08	// No setting now
+#define		rOFDM1_CSI1					0xd10
+#define		rOFDM1_SBD						0xd14
+#define		rOFDM1_CSI2					0xd18
+#define		rOFDM1_CFOTracking			0xd2c
+#define		rOFDM1_TRxMesaure1			0xd34
+#define		rOFDM1_IntfDet					0xd3c
+#define		rOFDM1_PseudoNoiseStateAB		0xd50
+#define		rOFDM1_PseudoNoiseStateCD		0xd54
+#define		rOFDM1_RxPseudoNoiseWgt		0xd58
+
+#define		rOFDM_PHYCounter1				0xda0  //cca, parity fail
+#define		rOFDM_PHYCounter2				0xda4  //rate illegal, crc8 fail
+#define		rOFDM_PHYCounter3				0xda8  //MCS not support
+
+#define		rOFDM_ShortCFOAB				0xdac	// No setting now
+#define		rOFDM_ShortCFOCD				0xdb0
+#define		rOFDM_LongCFOAB				0xdb4
+#define		rOFDM_LongCFOCD				0xdb8
+#define		rOFDM_TailCFOAB				0xdbc
+#define		rOFDM_TailCFOCD				0xdc0
+#define		rOFDM_PWMeasure1          		0xdc4
+#define		rOFDM_PWMeasure2          		0xdc8
+#define		rOFDM_BWReport				0xdcc
+#define		rOFDM_AGCReport				0xdd0
+#define		rOFDM_RxSNR					0xdd4
+#define		rOFDM_RxEVMCSI				0xdd8
+#define		rOFDM_SIGReport				0xddc
+
+
+//
+// 8. PageE(0xE00)
+//
+#define		rTxAGC_A_Rate18_06			0xe00
+#define		rTxAGC_A_Rate54_24			0xe04
+#define		rTxAGC_A_CCK1_Mcs32			0xe08
+#define		rTxAGC_A_Mcs03_Mcs00			0xe10
+#define		rTxAGC_A_Mcs07_Mcs04			0xe14
+#define		rTxAGC_A_Mcs11_Mcs08			0xe18
+#define		rTxAGC_A_Mcs15_Mcs12			0xe1c
+
+#define		rTxAGC_B_Rate18_06			0x830
+#define		rTxAGC_B_Rate54_24			0x834
+#define		rTxAGC_B_CCK1_55_Mcs32		0x838
+#define		rTxAGC_B_Mcs03_Mcs00			0x83c
+#define		rTxAGC_B_Mcs07_Mcs04			0x848
+#define		rTxAGC_B_Mcs11_Mcs08			0x84c
+#define		rTxAGC_B_Mcs15_Mcs12			0x868
+#define		rTxAGC_B_CCK11_A_CCK2_11		0x86c
+
+#define		rFPGA0_IQK						0xe28
+#define		rTx_IQK_Tone_A					0xe30
+#define		rRx_IQK_Tone_A					0xe34
+#define		rTx_IQK_PI_A					0xe38
+#define		rRx_IQK_PI_A					0xe3c
+
+#define		rTx_IQK 						0xe40
+#define		rRx_IQK							0xe44
+#define		rIQK_AGC_Pts					0xe48
+#define		rIQK_AGC_Rsp					0xe4c
+#define		rTx_IQK_Tone_B					0xe50
+#define		rRx_IQK_Tone_B					0xe54
+#define		rTx_IQK_PI_B					0xe58
+#define		rRx_IQK_PI_B					0xe5c
+#define		rIQK_AGC_Cont					0xe60
+
+#define		rBlue_Tooth						0xe6c
+#define		rRx_Wait_CCA					0xe70
+#define		rTx_CCK_RFON					0xe74
+#define		rTx_CCK_BBON					0xe78
+#define		rTx_OFDM_RFON					0xe7c
+#define		rTx_OFDM_BBON					0xe80
+#define		rTx_To_Rx						0xe84
+#define		rTx_To_Tx						0xe88
+#define		rRx_CCK							0xe8c
+
+#define		rTx_Power_Before_IQK_A		0xe94
+#define		rTx_Power_After_IQK_A			0xe9c
+
+#define		rRx_Power_Before_IQK_A		0xea0
+#define		rRx_Power_Before_IQK_A_2		0xea4
+#define		rRx_Power_After_IQK_A			0xea8
+#define		rRx_Power_After_IQK_A_2		0xeac
+
+#define		rTx_Power_Before_IQK_B		0xeb4
+#define		rTx_Power_After_IQK_B			0xebc
+
+#define		rRx_Power_Before_IQK_B		0xec0
+#define		rRx_Power_Before_IQK_B_2		0xec4
+#define		rRx_Power_After_IQK_B			0xec8
+#define		rRx_Power_After_IQK_B_2		0xecc
+
+#define		rRx_OFDM						0xed0
+#define		rRx_Wait_RIFS 					0xed4
+#define		rRx_TO_Rx 						0xed8
+#define		rStandby 						0xedc
+#define		rSleep 							0xee0
+#define		rPMPD_ANAEN					0xeec
+
+//
+// 7. RF Register 0x00-0x2E (RF 8256)
+//    RF-0222D 0x00-3F
+//
+//Zebra1
+#define		rZebra1_HSSIEnable				0x0	// Useless now
+#define		rZebra1_TRxEnable1				0x1
+#define		rZebra1_TRxEnable2				0x2
+#define		rZebra1_AGC					0x4
+#define		rZebra1_ChargePump			0x5
+#define		rZebra1_Channel				0x7	// RF channel switch
+
+//#endif
+#define		rZebra1_TxGain					0x8	// Useless now
+#define		rZebra1_TxLPF					0x9
+#define		rZebra1_RxLPF					0xb
+#define		rZebra1_RxHPFCorner			0xc
+
+//Zebra4
+#define		rGlobalCtrl						0	// Useless now
+#define		rRTL8256_TxLPF					19
+#define		rRTL8256_RxLPF					11
+
+//RTL8258
+#define		rRTL8258_TxLPF					0x11	// Useless now
+#define		rRTL8258_RxLPF					0x13
+#define		rRTL8258_RSSILPF				0xa
+
+//
+// RL6052 Register definition
+//
+#define		RF_AC						0x00	// 
+
+#define		RF_IQADJ_G1				0x01	// 
+#define		RF_IQADJ_G2				0x02	// 
+#define		RF_BS_PA_APSET_G1_G4		0x03
+#define		RF_BS_PA_APSET_G5_G8		0x04
+#define		RF_POW_TRSW				0x05	// 
+
+#define		RF_GAIN_RX					0x06	// 
+#define		RF_GAIN_TX					0x07	// 
+
+#define		RF_TXM_IDAC				0x08	// 
+#define		RF_IPA_G					0x09	// 
+#define		RF_TXBIAS_G				0x0A
+#define		RF_TXPA_AG					0x0B
+#define		RF_IPA_A					0x0C	// 
+#define		RF_TXBIAS_A				0x0D
+#define		RF_BS_PA_APSET_G9_G11	0x0E
+#define		RF_BS_IQGEN				0x0F	// 
+
+#define		RF_MODE1					0x10	// 
+#define		RF_MODE2					0x11	// 
+
+#define		RF_RX_AGC_HP				0x12	// 
+#define		RF_TX_AGC					0x13	// 
+#define		RF_BIAS						0x14	// 
+#define		RF_IPA						0x15	// 
+#define		RF_POW_ABILITY			0x17	// 
+#define		RF_MODE_AG				0x18	// 
+#define		rRfChannel					0x18	// RF channel and BW switch
+#define		RF_CHNLBW					0x18	// RF channel and BW switch
+#define		RF_TOP						0x19	// 
+
+#define		RF_RX_G1					0x1A	// 
+#define		RF_RX_G2					0x1B	// 
+
+#define		RF_RX_BB2					0x1C	// 
+#define		RF_RX_BB1					0x1D	// 
+
+#define		RF_RCK1					0x1E	// 
+#define		RF_RCK2					0x1F	// 
+
+#define		RF_TX_G1					0x20	// 
+#define		RF_TX_G2					0x21	// 
+#define		RF_TX_G3					0x22	// 
+
+#define		RF_TX_BB1					0x23	// 
+
+#define		RF_T_METER					0x42	// 
+
+#define		RF_SYN_G1					0x25	// RF TX Power control
+#define		RF_SYN_G2					0x26	// RF TX Power control
+#define		RF_SYN_G3					0x27	// RF TX Power control
+#define		RF_SYN_G4					0x28	// RF TX Power control
+#define		RF_SYN_G5					0x29	// RF TX Power control
+#define		RF_SYN_G6					0x2A	// RF TX Power control
+#define		RF_SYN_G7					0x2B	// RF TX Power control
+#define		RF_SYN_G8					0x2C	// RF TX Power control
+
+#define		RF_RCK_OS					0x30	// RF TX PA control
+
+#define		RF_TXPA_G1					0x31	// RF TX PA control
+#define		RF_TXPA_G2					0x32	// RF TX PA control
+#define		RF_TXPA_G3					0x33	// RF TX PA control
+#define		RF_LOBF_9					0x38
+#define		RF_RXRF_A3					0x3C	//
+#define		RF_TRSW					0x3F
+
+#define		RF_TXRF_A2					0x41
+#define		RF_TXPA_G4					0x46
+#define		RF_TXPA_A4					0x4B
+
+//
+//Bit Mask
+//
+// 1. Page1(0x100)
+#define		bBBResetB						0x100	// Useless now?
+#define		bGlobalResetB					0x200
+#define		bOFDMTxStart					0x4
+#define		bCCKTxStart						0x8
+#define		bCRC32Debug					0x100
+#define		bPMACLoopback					0x10
+#define		bTxLSIG							0xffffff
+#define		bOFDMTxRate					0xf
+#define		bOFDMTxReserved				0x10
+#define		bOFDMTxLength					0x1ffe0
+#define		bOFDMTxParity					0x20000
+#define		bTxHTSIG1						0xffffff
+#define		bTxHTMCSRate					0x7f
+#define		bTxHTBW						0x80
+#define		bTxHTLength					0xffff00
+#define		bTxHTSIG2						0xffffff
+#define		bTxHTSmoothing					0x1
+#define		bTxHTSounding					0x2
+#define		bTxHTReserved					0x4
+#define		bTxHTAggreation				0x8
+#define		bTxHTSTBC						0x30
+#define		bTxHTAdvanceCoding			0x40
+#define		bTxHTShortGI					0x80
+#define		bTxHTNumberHT_LTF			0x300
+#define		bTxHTCRC8						0x3fc00
+#define		bCounterReset					0x10000
+#define		bNumOfOFDMTx					0xffff
+#define		bNumOfCCKTx					0xffff0000
+#define		bTxIdleInterval					0xffff
+#define		bOFDMService					0xffff0000
+#define		bTxMACHeader					0xffffffff
+#define		bTxDataInit						0xff
+#define		bTxHTMode						0x100
+#define		bTxDataType					0x30000
+#define		bTxRandomSeed					0xffffffff
+#define		bCCKTxPreamble					0x1
+#define		bCCKTxSFD						0xffff0000
+#define		bCCKTxSIG						0xff
+#define		bCCKTxService					0xff00
+#define		bCCKLengthExt					0x8000
+#define		bCCKTxLength					0xffff0000
+#define		bCCKTxCRC16					0xffff
+#define		bCCKTxStatus					0x1
+#define		bOFDMTxStatus					0x2
+
+#define 		IS_BB_REG_OFFSET_92S(_Offset)		((_Offset >= 0x800) && (_Offset <= 0xfff))
+
+// 2. Page8(0x800)
+#define		bRFMOD							0x1	// Reg 0x800 rFPGA0_RFMOD
+#define		bJapanMode						0x2
+#define		bCCKTxSC						0x30
+#define		bCCKEn							0x1000000
+#define		bOFDMEn						0x2000000
+
+#define		bOFDMRxADCPhase           		0x10000	// Useless now
+#define		bOFDMTxDACPhase           		0x40000
+#define		bXATxAGC                  			0x3f
+
+#define		bAntennaSelect                 		0x0300
+
+#define		bXBTxAGC                  			0xf00	// Reg 80c rFPGA0_TxGainStage
+#define		bXCTxAGC                  			0xf000
+#define		bXDTxAGC                  			0xf0000
+       		
+#define		bPAStart                  			0xf0000000	// Useless now
+#define		bTRStart                  			0x00f00000
+#define		bRFStart                  			0x0000f000
+#define		bBBStart                  			0x000000f0
+#define		bBBCCKStart               		0x0000000f
+#define		bPAEnd                    			0xf          //Reg0x814
+#define		bTREnd                    			0x0f000000
+#define		bRFEnd                    			0x000f0000
+#define		bCCAMask                  			0x000000f0   //T2R
+#define		bR2RCCAMask               		0x00000f00
+#define		bHSSI_R2TDelay            		0xf8000000
+#define		bHSSI_T2RDelay            		0xf80000
+#define		bContTxHSSI               		0x400     //chane gain at continue Tx
+#define		bIGFromCCK                		0x200
+#define		bAGCAddress               		0x3f
+#define		bRxHPTx                   			0x7000
+#define		bRxHPT2R                  			0x38000
+#define		bRxHPCCKIni               		0xc0000
+#define		bAGCTxCode                		0xc00000
+#define		bAGCRxCode                		0x300000
+
+#define		b3WireDataLength          		0x800	// Reg 0x820~84f rFPGA0_XA_HSSIParameter1
+#define		b3WireAddressLength       		0x400
+
+#define		b3WireRFPowerDown         		0x1	// Useless now
+//#define bHWSISelect               		0x8
+#define		b5GPAPEPolarity           		0x40000000
+#define		b2GPAPEPolarity           		0x80000000
+#define		bRFSW_TxDefaultAnt        		0x3
+#define		bRFSW_TxOptionAnt         		0x30
+#define		bRFSW_RxDefaultAnt        		0x300
+#define		bRFSW_RxOptionAnt         		0x3000
+#define		bRFSI_3WireData           		0x1
+#define		bRFSI_3WireClock          		0x2
+#define		bRFSI_3WireLoad           		0x4
+#define		bRFSI_3WireRW             		0x8
+#define		bRFSI_3Wire               			0xf
+
+#define		bRFSI_RFENV               		0x10	// Reg 0x870 rFPGA0_XAB_RFInterfaceSW
+
+#define		bRFSI_TRSW                		0x20	// Useless now
+#define		bRFSI_TRSWB               		0x40
+#define		bRFSI_ANTSW               		0x100
+#define		bRFSI_ANTSWB              		0x200
+#define		bRFSI_PAPE                			0x400
+#define		bRFSI_PAPE5G              		0x800 
+#define		bBandSelect               			0x1
+#define		bHTSIG2_GI                			0x80
+#define		bHTSIG2_Smoothing         		0x01
+#define		bHTSIG2_Sounding          		0x02
+#define		bHTSIG2_Aggreaton         		0x08
+#define		bHTSIG2_STBC              		0x30
+#define		bHTSIG2_AdvCoding         		0x40
+#define		bHTSIG2_NumOfHTLTF        	0x300
+#define		bHTSIG2_CRC8              		0x3fc
+#define		bHTSIG1_MCS               		0x7f
+#define		bHTSIG1_BandWidth         		0x80
+#define		bHTSIG1_HTLength          		0xffff
+#define		bLSIG_Rate                			0xf
+#define		bLSIG_Reserved            		0x10
+#define		bLSIG_Length              		0x1fffe
+#define		bLSIG_Parity              			0x20
+#define		bCCKRxPhase               		0x4
+
+#define		bLSSIReadAddress          		0x7f800000   // T65 RF
+
+#define		bLSSIReadEdge             		0x80000000   //LSSI "Read" edge signal
+
+#define		bLSSIReadBackData         		0xfffff		// T65 RF
+
+#define		bLSSIReadOKFlag           		0x1000	// Useless now
+#define		bCCKSampleRate            		0x8       //0: 44MHz, 1:88MHz       		
+#define		bRegulator0Standby        		0x1
+#define		bRegulatorPLLStandby      		0x2
+#define		bRegulator1Standby        		0x4
+#define		bPLLPowerUp               		0x8
+#define		bDPLLPowerUp              		0x10
+#define		bDA10PowerUp              		0x20
+#define		bAD7PowerUp               		0x200
+#define		bDA6PowerUp               		0x2000
+#define		bXtalPowerUp              		0x4000
+#define		b40MDClkPowerUP           		0x8000
+#define		bDA6DebugMode             		0x20000
+#define		bDA6Swing                 			0x380000
+
+#define		bADClkPhase               		0x4000000	// Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ
+
+#define		b80MClkDelay              		0x18000000	// Useless
+#define		bAFEWatchDogEnable        		0x20000000
+
+#define		bXtalCap01                			0xc0000000	// Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap
+#define		bXtalCap23                			0x3
+#define		bXtalCap92x					0x0f000000
+#define 		bXtalCap                			0x0f000000
+
+#define		bIntDifClkEnable          		0x400	// Useless
+#define		bExtSigClkEnable         	 	0x800
+#define		bBandgapMbiasPowerUp      	0x10000
+#define		bAD11SHGain               		0xc0000
+#define		bAD11InputRange           		0x700000
+#define		bAD11OPCurrent            		0x3800000
+#define		bIPathLoopback            		0x4000000
+#define		bQPathLoopback            		0x8000000
+#define		bAFELoopback              		0x10000000
+#define		bDA10Swing                		0x7e0
+#define		bDA10Reverse              		0x800
+#define		bDAClkSource              		0x1000
+#define		bAD7InputRange            		0x6000
+#define		bAD7Gain                  			0x38000
+#define		bAD7OutputCMMode          		0x40000
+#define		bAD7InputCMMode           		0x380000
+#define		bAD7Current               			0xc00000
+#define		bRegulatorAdjust          		0x7000000
+#define		bAD11PowerUpAtTx          		0x1
+#define		bDA10PSAtTx               		0x10
+#define		bAD11PowerUpAtRx          		0x100
+#define		bDA10PSAtRx               		0x1000       		
+#define		bCCKRxAGCFormat           		0x200       		
+#define		bPSDFFTSamplepPoint       		0xc000
+#define		bPSDAverageNum            		0x3000
+#define		bIQPathControl            		0xc00
+#define		bPSDFreq                  			0x3ff
+#define		bPSDAntennaPath           		0x30
+#define		bPSDIQSwitch              		0x40
+#define		bPSDRxTrigger             		0x400000
+#define		bPSDTxTrigger             		0x80000000
+#define		bPSDSineToneScale        		0x7f000000
+#define		bPSDReport                			0xffff
+
+// 3. Page9(0x900)
+#define		bOFDMTxSC                 		0x30000000	// Useless
+#define		bCCKTxOn                  			0x1
+#define		bOFDMTxOn                 		0x2
+#define		bDebugPage                		0xfff  //reset debug page and also HWord, LWord
+#define		bDebugItem                		0xff   //reset debug page and LWord
+#define		bAntL              	       		0x10
+#define		bAntNonHT           	      			0x100
+#define		bAntHT1               			0x1000
+#define		bAntHT2                   			0x10000
+#define		bAntHT1S1                 			0x100000
+#define		bAntNonHTS1               		0x1000000
+
+// 4. PageA(0xA00)
+#define		bCCKBBMode				0x3	// Useless
+#define		bCCKTxPowerSaving		0x80
+#define		bCCKRxPowerSaving		0x40
+
+#define		bCCKSideBand			0x10	// Reg 0xa00 rCCK0_System 20/40 switch
+
+#define		bCCKScramble			0x8	// Useless
+#define		bCCKAntDiversity		0x8000
+#define		bCCKCarrierRecovery		0x4000
+#define		bCCKTxRate				0x3000
+#define		bCCKDCCancel			0x0800
+#define		bCCKISICancel			0x0400
+#define		bCCKMatchFilter			0x0200
+#define		bCCKEqualizer			0x0100
+#define		bCCKPreambleDetect		0x800000
+#define		bCCKFastFalseCCA		0x400000
+#define		bCCKChEstStart			0x300000
+#define		bCCKCCACount			0x080000
+#define		bCCKcs_lim				0x070000
+#define		bCCKBistMode			0x80000000
+#define		bCCKCCAMask			0x40000000
+#define		bCCKTxDACPhase		0x4
+#define		bCCKRxADCPhase		0x20000000   //r_rx_clk
+#define		bCCKr_cp_mode0		0x0100
+#define		bCCKTxDCOffset			0xf0
+#define		bCCKRxDCOffset			0xf
+#define		bCCKCCAMode			0xc000
+#define		bCCKFalseCS_lim			0x3f00
+#define		bCCKCS_ratio			0xc00000
+#define		bCCKCorgBit_sel			0x300000
+#define		bCCKPD_lim				0x0f0000
+#define		bCCKNewCCA			0x80000000
+#define		bCCKRxHPofIG			0x8000
+#define		bCCKRxIG				0x7f00
+#define		bCCKLNAPolarity			0x800000
+#define		bCCKRx1stGain			0x7f0000
+#define		bCCKRFExtend			0x20000000 //CCK Rx Iinital gain polarity
+#define		bCCKRxAGCSatLevel		0x1f000000
+#define		bCCKRxAGCSatCount		0xe0
+#define		bCCKRxRFSettle			0x1f       //AGCsamp_dly
+#define		bCCKFixedRxAGC			0x8000
+//#define bCCKRxAGCFormat         	 	0x4000   //remove to HSSI register 0x824
+#define		bCCKAntennaPolarity		0x2000
+#define		bCCKTxFilterType		0x0c00
+#define		bCCKRxAGCReportType	0x0300
+#define		bCCKRxDAGCEn			0x80000000
+#define		bCCKRxDAGCPeriod		0x20000000
+#define		bCCKRxDAGCSatLevel		0x1f000000
+#define		bCCKTimingRecovery		0x800000
+#define		bCCKTxC0				0x3f0000
+#define		bCCKTxC1				0x3f000000
+#define		bCCKTxC2				0x3f
+#define		bCCKTxC3				0x3f00
+#define		bCCKTxC4				0x3f0000
+#define		bCCKTxC5				0x3f000000
+#define		bCCKTxC6				0x3f
+#define		bCCKTxC7				0x3f00
+#define		bCCKDebugPort			0xff0000
+#define		bCCKDACDebug			0x0f000000
+#define		bCCKFalseAlarmEnable	0x8000
+#define		bCCKFalseAlarmRead		0x4000
+#define		bCCKTRSSI				0x7f
+#define		bCCKRxAGCReport		0xfe
+#define		bCCKRxReport_AntSel	0x80000000
+#define		bCCKRxReport_MFOff		0x40000000
+#define		bCCKRxRxReport_SQLoss	0x20000000
+#define		bCCKRxReport_Pktloss	0x10000000
+#define		bCCKRxReport_Lockedbit	0x08000000
+#define		bCCKRxReport_RateError	0x04000000
+#define		bCCKRxReport_RxRate	0x03000000
+#define		bCCKRxFACounterLower	0xff
+#define		bCCKRxFACounterUpper	0xff000000
+#define		bCCKRxHPAGCStart		0xe000
+#define		bCCKRxHPAGCFinal		0x1c00       		
+#define		bCCKRxFalseAlarmEnable	0x8000
+#define		bCCKFACounterFreeze	0x4000       		
+#define		bCCKTxPathSel			0x10000000
+#define		bCCKDefaultRxPath		0xc000000
+#define		bCCKOptionRxPath		0x3000000
+
+// 5. PageC(0xC00)
+#define		bNumOfSTF				0x3	// Useless
+#define		bShift_L					0xc0
+#define		bGI_TH					0xc
+#define		bRxPathA				0x1
+#define		bRxPathB				0x2
+#define		bRxPathC				0x4
+#define		bRxPathD				0x8
+#define		bTxPathA				0x1
+#define		bTxPathB				0x2
+#define		bTxPathC				0x4
+#define		bTxPathD				0x8
+#define		bTRSSIFreq				0x200
+#define		bADCBackoff				0x3000
+#define		bDFIRBackoff			0xc000
+#define		bTRSSILatchPhase		0x10000
+#define		bRxIDCOffset			0xff
+#define		bRxQDCOffset			0xff00
+#define		bRxDFIRMode			0x1800000
+#define		bRxDCNFType			0xe000000
+#define		bRXIQImb_A				0x3ff
+#define		bRXIQImb_B				0xfc00
+#define		bRXIQImb_C				0x3f0000
+#define		bRXIQImb_D				0xffc00000
+#define		bDC_dc_Notch			0x60000
+#define		bRxNBINotch			0x1f000000
+#define		bPD_TH					0xf
+#define		bPD_TH_Opt2			0xc000
+#define		bPWED_TH				0x700
+#define		bIfMF_Win_L			0x800
+#define		bPD_Option				0x1000
+#define		bMF_Win_L				0xe000
+#define		bBW_Search_L			0x30000
+#define		bwin_enh_L				0xc0000
+#define		bBW_TH					0x700000
+#define		bED_TH2				0x3800000
+#define		bBW_option				0x4000000
+#define		bRatio_TH				0x18000000
+#define		bWindow_L				0xe0000000
+#define		bSBD_Option				0x1
+#define		bFrame_TH				0x1c
+#define		bFS_Option				0x60
+#define		bDC_Slope_check		0x80
+#define		bFGuard_Counter_DC_L	0xe00
+#define		bFrame_Weight_Short	0x7000
+#define		bSub_Tune				0xe00000
+#define		bFrame_DC_Length		0xe000000
+#define		bSBD_start_offset		0x30000000
+#define		bFrame_TH_2			0x7
+#define		bFrame_GI2_TH			0x38
+#define		bGI2_Sync_en			0x40
+#define		bSarch_Short_Early		0x300
+#define		bSarch_Short_Late		0xc00
+#define		bSarch_GI2_Late		0x70000
+#define		bCFOAntSum				0x1
+#define		bCFOAcc				0x2
+#define		bCFOStartOffset			0xc
+#define		bCFOLookBack			0x70
+#define		bCFOSumWeight			0x80
+#define		bDAGCEnable			0x10000
+#define		bTXIQImb_A				0x3ff
+#define		bTXIQImb_B				0xfc00
+#define		bTXIQImb_C				0x3f0000
+#define		bTXIQImb_D				0xffc00000
+#define		bTxIDCOffset			0xff
+#define		bTxQDCOffset			0xff00
+#define		bTxDFIRMode			0x10000
+#define		bTxPesudoNoiseOn		0x4000000
+#define		bTxPesudoNoise_A		0xff
+#define		bTxPesudoNoise_B		0xff00
+#define		bTxPesudoNoise_C		0xff0000
+#define		bTxPesudoNoise_D		0xff000000
+#define		bCCADropOption			0x20000
+#define		bCCADropThres			0xfff00000
+#define		bEDCCA_H				0xf
+#define		bEDCCA_L				0xf0
+#define		bLambda_ED			0x300
+#define		bRxInitialGain			0x7f
+#define		bRxAntDivEn				0x80
+#define		bRxAGCAddressForLNA	0x7f00
+#define		bRxHighPowerFlow		0x8000
+#define		bRxAGCFreezeThres		0xc0000
+#define		bRxFreezeStep_AGC1	0x300000
+#define		bRxFreezeStep_AGC2	0xc00000
+#define		bRxFreezeStep_AGC3	0x3000000
+#define		bRxFreezeStep_AGC0	0xc000000
+#define		bRxRssi_Cmp_En			0x10000000
+#define		bRxQuickAGCEn			0x20000000
+#define		bRxAGCFreezeThresMode	0x40000000
+#define		bRxOverFlowCheckType	0x80000000
+#define		bRxAGCShift				0x7f
+#define		bTRSW_Tri_Only			0x80
+#define		bPowerThres			0x300
+#define		bRxAGCEn				0x1
+#define		bRxAGCTogetherEn		0x2
+#define		bRxAGCMin				0x4
+#define		bRxHP_Ini				0x7
+#define		bRxHP_TRLNA			0x70
+#define		bRxHP_RSSI				0x700
+#define		bRxHP_BBP1				0x7000
+#define		bRxHP_BBP2				0x70000
+#define		bRxHP_BBP3				0x700000
+#define		bRSSI_H					0x7f0000     //the threshold for high power
+#define		bRSSI_Gen				0x7f000000   //the threshold for ant diversity
+#define		bRxSettle_TRSW			0x7
+#define		bRxSettle_LNA			0x38
+#define		bRxSettle_RSSI			0x1c0
+#define		bRxSettle_BBP			0xe00
+#define		bRxSettle_RxHP			0x7000
+#define		bRxSettle_AntSW_RSSI	0x38000
+#define		bRxSettle_AntSW		0xc0000
+#define		bRxProcessTime_DAGC	0x300000
+#define		bRxSettle_HSSI			0x400000
+#define		bRxProcessTime_BBPPW	0x800000
+#define		bRxAntennaPowerShift	0x3000000
+#define		bRSSITableSelect		0xc000000
+#define		bRxHP_Final				0x7000000
+#define		bRxHTSettle_BBP			0x7
+#define		bRxHTSettle_HSSI		0x8
+#define		bRxHTSettle_RxHP		0x70
+#define		bRxHTSettle_BBPPW		0x80
+#define		bRxHTSettle_Idle		0x300
+#define		bRxHTSettle_Reserved	0x1c00
+#define		bRxHTRxHPEn			0x8000
+#define		bRxHTAGCFreezeThres	0x30000
+#define		bRxHTAGCTogetherEn	0x40000
+#define		bRxHTAGCMin			0x80000
+#define		bRxHTAGCEn				0x100000
+#define		bRxHTDAGCEn			0x200000
+#define		bRxHTRxHP_BBP			0x1c00000
+#define		bRxHTRxHP_Final		0xe0000000
+#define		bRxPWRatioTH			0x3
+#define		bRxPWRatioEn			0x4
+#define		bRxMFHold				0x3800
+#define		bRxPD_Delay_TH1		0x38
+#define		bRxPD_Delay_TH2		0x1c0
+#define		bRxPD_DC_COUNT_MAX	0x600
+//#define bRxMF_Hold               0x3800
+#define		bRxPD_Delay_TH			0x8000
+#define		bRxProcess_Delay		0xf0000
+#define		bRxSearchrange_GI2_Early	0x700000
+#define		bRxFrame_Guard_Counter_L	0x3800000
+#define		bRxSGI_Guard_L			0xc000000
+#define		bRxSGI_Search_L		0x30000000
+#define		bRxSGI_TH				0xc0000000
+#define		bDFSCnt0				0xff
+#define		bDFSCnt1				0xff00
+#define		bDFSFlag				0xf0000       		
+#define		bMFWeightSum			0x300000
+#define		bMinIdxTH				0x7f000000       		
+#define		bDAFormat				0x40000       		
+#define		bTxChEmuEnable		0x01000000       		
+#define		bTRSWIsolation_A		0x7f
+#define		bTRSWIsolation_B		0x7f00
+#define		bTRSWIsolation_C		0x7f0000
+#define		bTRSWIsolation_D		0x7f000000       		
+#define		bExtLNAGain				0x7c00          
+
+// 6. PageE(0xE00)
+#define		bSTBCEn				0x4	// Useless
+#define		bAntennaMapping		0x10
+#define		bNss					0x20
+#define		bCFOAntSumD			0x200
+#define		bPHYCounterReset		0x8000000
+#define		bCFOReportGet			0x4000000
+#define		bOFDMContinueTx		0x10000000
+#define		bOFDMSingleCarrier		0x20000000
+#define		bOFDMSingleTone		0x40000000
+//#define bRxPath1                 0x01
+//#define bRxPath2                 0x02
+//#define bRxPath3                 0x04
+//#define bRxPath4                 0x08
+//#define bTxPath1                 0x10
+//#define bTxPath2                 0x20
+#define		bHTDetect			0x100
+#define		bCFOEn				0x10000
+#define		bCFOValue			0xfff00000
+#define		bSigTone_Re		0x3f
+#define		bSigTone_Im		0x7f00
+#define		bCounter_CCA		0xffff
+#define		bCounter_ParityFail	0xffff0000
+#define		bCounter_RateIllegal		0xffff
+#define		bCounter_CRC8Fail	0xffff0000
+#define		bCounter_MCSNoSupport	0xffff
+#define		bCounter_FastSync	0xffff
+#define		bShortCFO			0xfff
+#define		bShortCFOTLength	12   //total
+#define		bShortCFOFLength	11   //fraction
+#define		bLongCFO			0x7ff
+#define		bLongCFOTLength	11
+#define		bLongCFOFLength	11
+#define		bTailCFO			0x1fff
+#define		bTailCFOTLength		13
+#define		bTailCFOFLength		12       		
+#define		bmax_en_pwdB		0xffff
+#define		bCC_power_dB		0xffff0000
+#define		bnoise_pwdB		0xffff
+#define		bPowerMeasTLength	10
+#define		bPowerMeasFLength	3
+#define		bRx_HT_BW			0x1
+#define		bRxSC				0x6
+#define		bRx_HT				0x8       		
+#define		bNB_intf_det_on		0x1
+#define		bIntf_win_len_cfg	0x30
+#define		bNB_Intf_TH_cfg		0x1c0       		
+#define		bRFGain				0x3f
+#define		bTableSel			0x40
+#define		bTRSW				0x80       		
+#define		bRxSNR_A			0xff
+#define		bRxSNR_B			0xff00
+#define		bRxSNR_C			0xff0000
+#define		bRxSNR_D			0xff000000
+#define		bSNREVMTLength		8
+#define		bSNREVMFLength		1       		
+#define		bCSI1st				0xff
+#define		bCSI2nd				0xff00
+#define		bRxEVM1st			0xff0000
+#define		bRxEVM2nd			0xff000000       		
+#define		bSIGEVM			0xff
+#define		bPWDB				0xff00
+#define		bSGIEN				0x10000
+       		
+#define		bSFactorQAM1		0xf	// Useless
+#define		bSFactorQAM2		0xf0
+#define		bSFactorQAM3		0xf00
+#define		bSFactorQAM4		0xf000
+#define		bSFactorQAM5		0xf0000
+#define		bSFactorQAM6		0xf0000
+#define		bSFactorQAM7		0xf00000
+#define		bSFactorQAM8		0xf000000
+#define		bSFactorQAM9		0xf0000000
+#define		bCSIScheme			0x100000
+       		
+#define		bNoiseLvlTopSet		0x3	// Useless
+#define		bChSmooth			0x4
+#define		bChSmoothCfg1		0x38
+#define		bChSmoothCfg2		0x1c0
+#define		bChSmoothCfg3		0xe00
+#define		bChSmoothCfg4		0x7000
+#define		bMRCMode			0x800000
+#define		bTHEVMCfg			0x7000000
+       		
+#define		bLoopFitType		0x1	// Useless
+#define		bUpdCFO			0x40
+#define		bUpdCFOOffData		0x80
+#define		bAdvUpdCFO			0x100
+#define		bAdvTimeCtrl		0x800
+#define		bUpdClko			0x1000
+#define		bFC					0x6000
+#define		bTrackingMode		0x8000
+#define		bPhCmpEnable		0x10000
+#define		bUpdClkoLTF		0x20000
+#define		bComChCFO			0x40000
+#define		bCSIEstiMode		0x80000
+#define		bAdvUpdEqz			0x100000
+#define		bUChCfg				0x7000000
+#define		bUpdEqz			0x8000000
+
+//Rx Pseduo noise
+#define		bRxPesudoNoiseOn		0x20000000	// Useless
+#define		bRxPesudoNoise_A		0xff
+#define		bRxPesudoNoise_B		0xff00
+#define		bRxPesudoNoise_C		0xff0000
+#define		bRxPesudoNoise_D		0xff000000
+#define		bPesudoNoiseState_A	0xffff
+#define		bPesudoNoiseState_B	0xffff0000
+#define		bPesudoNoiseState_C	0xffff
+#define		bPesudoNoiseState_D	0xffff0000
+
+//7. RF Register
+//Zebra1
+#define		bZebra1_HSSIEnable		0x8		// Useless
+#define		bZebra1_TRxControl		0xc00
+#define		bZebra1_TRxGainSetting	0x07f
+#define		bZebra1_RxCorner		0xc00
+#define		bZebra1_TxChargePump	0x38
+#define		bZebra1_RxChargePump	0x7
+#define		bZebra1_ChannelNum	0xf80
+#define		bZebra1_TxLPFBW		0x400
+#define		bZebra1_RxLPFBW		0x600
+
+//Zebra4
+#define		bRTL8256RegModeCtrl1	0x100	// Useless
+#define		bRTL8256RegModeCtrl0	0x40
+#define		bRTL8256_TxLPFBW		0x18
+#define		bRTL8256_RxLPFBW		0x600
+
+//RTL8258
+#define		bRTL8258_TxLPFBW		0xc	// Useless
+#define		bRTL8258_RxLPFBW		0xc00
+#define		bRTL8258_RSSILPFBW	0xc0
+
+
+//
+// Other Definition
+//
+
+//byte endable for sb_write
+#define		bByte0				0x1	// Useless
+#define		bByte1				0x2
+#define		bByte2				0x4
+#define		bByte3				0x8
+#define		bWord0				0x3
+#define		bWord1				0xc
+#define		bDWord				0xf
+
+//for PutRegsetting & GetRegSetting BitMask
+#define		bMaskByte0			0xff	// Reg 0xc50 rOFDM0_XAAGCCore~0xC6f
+#define		bMaskByte1			0xff00
+#define		bMaskByte2			0xff0000
+#define		bMaskByte3			0xff000000
+#define		bMaskHWord		0xffff0000
+#define		bMaskLWord			0x0000ffff
+#define		bMaskDWord		0xffffffff
+#define		bMask12Bits			0xfff
+#define		bMaskH4Bits			0xf0000000	
+#define		bMaskOFDM_D		0xffc00000
+#define		bMaskCCK			0x3f3f3f3f
+
+//for PutRFRegsetting & GetRFRegSetting BitMask
+//#define		bMask12Bits               	0xfffff	// RF Reg mask bits
+//#define		bMask20Bits               	0xfffff	// RF Reg mask bits T65 RF
+#define 		bRFRegOffsetMask		0xfffff
+//#define 		bRFRegOffsetMask		0xfff	
+
+//MAC0 will wirte PHY1
+#define	MAC0_ACCESS_PHY1	0x4000
+//MAC1 will wirte PHY0
+#define	MAC1_ACCESS_PHY0	0x2000
+
+#define		bEnable			0x1	// Useless
+#define		bDisable		0x0
+       		
+#define		LeftAntenna		0x0	// Useless
+#define		RightAntenna	0x1
+       		
+#define		tCheckTxStatus		500   //500ms // Useless
+#define		tUpdateRxCounter	100   //100ms
+       		
+#define		rateCCK		0	// Useless
+#define		rateOFDM	1
+#define		rateHT		2
+
+//define Register-End
+#define		bPMAC_End			0x1ff	// Useless
+#define		bFPGAPHY0_End		0x8ff
+#define		bFPGAPHY1_End		0x9ff
+#define		bCCKPHY0_End		0xaff
+#define		bOFDMPHY0_End		0xcff
+#define		bOFDMPHY1_End		0xdff
+
+//define max debug item in each debug page
+//#define bMaxItem_FPGA_PHY0        0x9
+//#define bMaxItem_FPGA_PHY1        0x3
+//#define bMaxItem_PHY_11B          0x16
+//#define bMaxItem_OFDM_PHY0        0x29
+//#define bMaxItem_OFDM_PHY1        0x0
+
+#define		bPMACControl		0x0		// Useless
+#define		bWMACControl		0x1
+#define		bWNICControl		0x2
+       		
+#define		PathA			0x0	// Useless
+#define		PathB			0x1
+#define		PathC			0x2
+#define		PathD			0x3
+
+/*--------------------------Define Parameters-------------------------------*/
+
+
+#endif	//__INC_HAL8192SPHYREG_H
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/Hal8192DUHWImg.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/Hal8192DUHWImg.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/Hal8192DUHWImg.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/Hal8192DUHWImg.h	2017-09-23 03:42:50.030675028 +0800
@@ -0,0 +1,66 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __INC_HAL8192DU_FW_IMG_H
+#define __INC_HAL8192DU_FW_IMG_H
+
+#include <basic_types.h>
+
+/*Created on  2011/11/11,  8: 8*/
+
+#define Rtl8192DUImgArrayLength 32142
+extern const u8 Rtl8192DUFwImgArray[Rtl8192DUImgArrayLength];
+#define Rtl8192DUMainArrayLength 1
+extern const u8 Rtl8192DUFwMainArray[Rtl8192DUMainArrayLength];
+#define Rtl8192DUDataArrayLength 1
+extern const u8 Rtl8192DUFwDataArray[Rtl8192DUDataArrayLength];
+#define Rtl8192DUPHY_REG_2TArrayLength 372
+extern const u32 Rtl8192DUPHY_REG_2TArray[Rtl8192DUPHY_REG_2TArrayLength];
+#define Rtl8192DUPHY_REG_1TArrayLength 1
+extern const u32 Rtl8192DUPHY_REG_1TArray[Rtl8192DUPHY_REG_1TArrayLength];
+#define Rtl8192DUPHY_REG_Array_PGLength 624
+extern const u32 Rtl8192DUPHY_REG_Array_PG[Rtl8192DUPHY_REG_Array_PGLength];
+#define Rtl8192DUPHY_REG_Array_MPLength 12
+extern const u32 Rtl8192DUPHY_REG_Array_MP[Rtl8192DUPHY_REG_Array_MPLength];
+#define Rtl8192DURadioA_2TArrayLength 378
+extern const u32 Rtl8192DURadioA_2TArray[Rtl8192DURadioA_2TArrayLength];
+#define Rtl8192DURadioB_2TArrayLength 384
+extern const u32 Rtl8192DURadioB_2TArray[Rtl8192DURadioB_2TArrayLength];
+#define Rtl8192DURadioA_1TArrayLength 1
+extern const u32 Rtl8192DURadioA_1TArray[Rtl8192DURadioA_1TArrayLength];
+#define Rtl8192DURadioB_1TArrayLength 1
+extern const u32 Rtl8192DURadioB_1TArray[Rtl8192DURadioB_1TArrayLength];
+#define Rtl8192DURadioA_2T_intPAArrayLength 378
+extern const u32 Rtl8192DURadioA_2T_intPAArray[Rtl8192DURadioA_2T_intPAArrayLength];
+#define Rtl8192DURadioB_2T_intPAArrayLength 384
+extern const u32 Rtl8192DURadioB_2T_intPAArray[Rtl8192DURadioB_2T_intPAArrayLength];
+#define Rtl8192DUMAC_2T_ArrayLength 192
+extern const u32 Rtl8192DUMAC_2T_Array[Rtl8192DUMAC_2T_ArrayLength];
+#define Rtl8192DUAGCTAB_ArrayLength 386
+extern const u32 Rtl8192DUAGCTAB_Array[Rtl8192DUAGCTAB_ArrayLength];
+#define Rtl8192DUAGCTAB_5GArrayLength 194
+extern const u32 Rtl8192DUAGCTAB_5GArray[Rtl8192DUAGCTAB_5GArrayLength];
+#define Rtl8192DUAGCTAB_2GArrayLength 194
+extern const u32 Rtl8192DUAGCTAB_2GArray[Rtl8192DUAGCTAB_2GArrayLength];
+#define Rtl8192DUAGCTAB_2TArrayLength 1
+extern const u32 Rtl8192DUAGCTAB_2TArray[Rtl8192DUAGCTAB_2TArrayLength];
+#define Rtl8192DUAGCTAB_1TArrayLength 1
+extern const u32 Rtl8192DUAGCTAB_1TArray[Rtl8192DUAGCTAB_1TArrayLength];
+
+#endif //__INC_HAL8192CU_FW_IMG_H
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/Hal8192DUTestHWImg.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/Hal8192DUTestHWImg.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/Hal8192DUTestHWImg.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/Hal8192DUTestHWImg.h	2017-09-23 03:42:50.030675028 +0800
@@ -0,0 +1,54 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __INC_HAL8192DUTEST_FW_IMG_H
+#define __INC_HAL8192DUTEST_FW_IMG_H
+
+#include <basic_types.h>
+
+/*Created on  2010/ 5/27,  9:49*/
+
+#define Rtl8192DTestImgArrayLength 15054
+extern u8 Rtl8192DTestFwImgArray[Rtl8192DTestImgArrayLength];
+#define Rtl8192DTestMainArrayLength 1
+extern u8 Rtl8192DTestFwMainArray[Rtl8192DTestMainArrayLength];
+#define Rtl8192DTestDataArrayLength 1
+extern u8 Rtl8192DTestFwDataArray[Rtl8192DTestDataArrayLength];
+#define Rtl8192DTestPHY_REG_2TArrayLength 376
+extern u32 Rtl8192DTestPHY_REG_2TArray[Rtl8192DTestPHY_REG_2TArrayLength];
+#define Rtl8192DTestPHY_REG_1TArrayLength 1
+extern u32 Rtl8192DTestPHY_REG_1TArray[Rtl8192DTestPHY_REG_1TArrayLength];
+#define Rtl8192DTestPHY_REG_Array_PGLength 1
+extern u32 Rtl8192DTestPHY_REG_Array_PG[Rtl8192DTestPHY_REG_Array_PGLength];
+#define Rtl8192DTestRadioA_2TArrayLength 340
+extern u32 Rtl8192DTestRadioA_2TArray[Rtl8192DTestRadioA_2TArrayLength];
+#define Rtl8192DTestRadioB_2TArrayLength 340
+extern u32 Rtl8192DTestRadioB_2TArray[Rtl8192DTestRadioB_2TArrayLength];
+#define Rtl8192DTestRadioA_1TArrayLength 1
+extern u32 Rtl8192DTestRadioA_1TArray[Rtl8192DTestRadioA_1TArrayLength];
+#define Rtl8192DTestRadioB_1TArrayLength 1
+extern u32 Rtl8192DTestRadioB_1TArray[Rtl8192DTestRadioB_1TArrayLength];
+#define Rtl8192DTestMAC_2TArrayLength 174
+extern u32 Rtl8192DTestMAC_2TArray[Rtl8192DTestMAC_2TArrayLength];
+#define Rtl8192DTestAGCTAB_5GArrayLength 514
+extern u32 Rtl8192DTestAGCTAB_5GArray[Rtl8192DTestAGCTAB_5GArrayLength];
+#define Rtl8192DTestAGCTAB_2GArrayLength 514
+extern u32 Rtl8192DTestAGCTAB_2GArray[Rtl8192DTestAGCTAB_2GArrayLength];
+
+#endif //__INC_HAL8192CU_FW_IMG_H
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/hal_init.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/hal_init.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/hal_init.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/hal_init.h	2017-09-23 03:42:50.030675028 +0800
@@ -0,0 +1,280 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __HAL_INIT_H__
+#define __HAL_INIT_H__
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+#ifdef CONFIG_PCI_HCI
+#include <pci_hal.h>
+#endif
+
+
+enum RTL871X_HCI_TYPE {
+
+	RTW_SDIO,
+	RTW_USB,
+	RTW_PCIE
+};
+
+enum _CHIP_TYPE {
+
+	NULL_CHIP_TYPE,
+	RTL8712_8188S_8191S_8192S,
+	RTL8188C_8192C,
+	RTL8192D,
+	MAX_CHIP_TYPE
+};
+
+
+typedef enum _HW_VARIABLES{
+	HW_VAR_MEDIA_STATUS,
+	HW_VAR_MEDIA_STATUS1,
+	HW_VAR_SET_OPMODE,
+	HW_VAR_MAC_ADDR,
+	HW_VAR_BSSID,
+	HW_VAR_INIT_RTS_RATE,
+	HW_VAR_BASIC_RATE,
+	HW_VAR_TXPAUSE,
+	HW_VAR_BCN_FUNC,
+	HW_VAR_CORRECT_TSF,
+	HW_VAR_CHECK_BSSID,
+	HW_VAR_MLME_DISCONNECT,
+	HW_VAR_MLME_SITESURVEY,
+	HW_VAR_MLME_JOIN,
+	HW_VAR_BEACON_INTERVAL,
+	HW_VAR_SLOT_TIME,
+	HW_VAR_SIFS,
+	HW_VAR_ACK_PREAMBLE,
+	HW_VAR_SEC_CFG,
+	HW_VAR_TX_BCN_DONE,
+	HW_VAR_RF_TYPE,
+	HW_VAR_DM_FLAG,
+	HW_VAR_DM_FUNC_OP,
+	HW_VAR_DM_FUNC_SET,
+	HW_VAR_DM_FUNC_CLR,
+	HW_VAR_CAM_EMPTY_ENTRY,
+	HW_VAR_CAM_INVALID_ALL,
+	HW_VAR_CAM_WRITE,
+	HW_VAR_AC_PARAM_VO,
+	HW_VAR_AC_PARAM_VI,
+	HW_VAR_AC_PARAM_BE,
+	HW_VAR_AC_PARAM_BK,
+	HW_VAR_ACM_CTRL,
+	HW_VAR_AMPDU_MIN_SPACE,
+	HW_VAR_AMPDU_FACTOR,
+	HW_VAR_RXDMA_AGG_PG_TH,
+	HW_VAR_SET_RPWM,
+	HW_VAR_H2C_FW_PWRMODE,
+	HW_VAR_H2C_FW_JOINBSSRPT,
+	HW_VAR_FWLPS_RF_ON,
+	HW_VAR_H2C_FW_P2P_PS_OFFLOAD,
+	HW_VAR_INITIAL_GAIN,
+	HW_VAR_TRIGGER_GPIO_0,
+	HW_VAR_BT_SET_COEXIST,
+	HW_VAR_BT_ISSUE_DELBA,	
+	HW_VAR_CURRENT_ANTENNA,
+	HW_VAR_ANTENNA_DIVERSITY_LINK,
+	HW_VAR_ANTENNA_DIVERSITY_SELECT,
+	HW_VAR_SWITCH_EPHY_WoWLAN,
+	HW_VAR_EFUSE_BYTES,
+	HW_VAR_FIFO_CLEARN_UP,
+	HW_VAR_CHECK_TXBUF,
+	HW_VAR_APFM_ON_MAC, //Auto FSM to Turn On, include clock, isolation, power control for MAC only
+}HW_VARIABLES;
+
+typedef enum _HAL_DEF_VARIABLE{
+	HAL_DEF_UNDERCORATEDSMOOTHEDPWDB,
+	HAL_DEF_IS_SUPPORT_ANT_DIV,
+	HAL_DEF_CURRENT_ANTENNA,
+	HAL_DEF_DRVINFO_SZ,
+	HAL_DEF_MAX_RECVBUF_SZ,
+	HAL_DEF_RX_PACKET_OFFSET,
+	HAL_DEF_DBG_DUMP_RXPKT,//for dbg
+	HAL_DEF_DBG_DM_FUNC,//for dbg
+}HAL_DEF_VARIABLE;
+
+typedef enum _HAL_INTF_PS_FUNC{
+	HAL_USB_SELECT_SUSPEND,
+	HAL_MAX_ID,
+}HAL_INTF_PS_FUNC;
+
+struct hal_ops {
+	u32	(*hal_init)(PADAPTER Adapter);
+	u32	(*hal_deinit)(PADAPTER Adapter);
+
+	void	(*free_hal_data)(PADAPTER Adapter);
+
+	u32	(*inirp_init)(PADAPTER Adapter);
+	u32	(*inirp_deinit)(PADAPTER Adapter);
+
+	s32	(*init_xmit_priv)(PADAPTER Adapter);
+	void	(*free_xmit_priv)(PADAPTER Adapter);
+
+	s32	(*init_recv_priv)(PADAPTER Adapter);
+	void	(*free_recv_priv)(PADAPTER Adapter);
+
+	void	(*InitSwLeds)(PADAPTER Adapter);
+	void	(*DeInitSwLeds)(PADAPTER Adapter);
+
+	void	(*dm_init)(PADAPTER Adapter);
+	void	(*dm_deinit)(PADAPTER Adapter);
+	void	(*read_chip_version)(PADAPTER Adapter);
+
+	void	(*init_default_value)(PADAPTER Adapter);
+
+	void	(*intf_chip_configure)(PADAPTER Adapter);
+
+	void	(*read_adapter_info)(PADAPTER Adapter);
+
+	void	(*enable_interrupt)(PADAPTER Adapter);
+	void	(*disable_interrupt)(PADAPTER Adapter);
+	s32	(*interrupt_handler)(PADAPTER Adapter);
+
+	void	(*set_bwmode_handler)(PADAPTER Adapter, HT_CHANNEL_WIDTH Bandwidth, u8 Offset);
+	void	(*set_channel_handler)(PADAPTER Adapter, u8 channel);
+
+	void	(*hal_dm_watchdog)(PADAPTER Adapter);
+
+	void	(*SetHwRegHandler)(PADAPTER Adapter, u8	variable,u8* val);
+	void	(*GetHwRegHandler)(PADAPTER Adapter, u8	variable,u8* val);
+
+	u8	(*GetHalDefVarHandler)(PADAPTER Adapter, HAL_DEF_VARIABLE eVariable, PVOID pValue);
+	u8	(*SetHalDefVarHandler)(PADAPTER Adapter, HAL_DEF_VARIABLE eVariable, PVOID pValue);
+
+	void	(*UpdateRAMaskHandler)(PADAPTER Adapter, u32 mac_id);
+	void	(*SetBeaconRelatedRegistersHandler)(PADAPTER Adapter);
+
+	void	(*Add_RateATid)(PADAPTER Adapter, u32 bitmap, u8 arg);
+
+#ifdef CONFIG_ANTENNA_DIVERSITY
+	u8	(*SwAntDivBeforeLinkHandler)(PADAPTER Adapter);
+	void	(*SwAntDivCompareHandler)(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src);
+#endif
+	u8	(*interface_ps_func)(PADAPTER Adapter,HAL_INTF_PS_FUNC efunc_id, u8* val);
+	
+	s32	(*hal_xmit)(PADAPTER Adapter, struct xmit_frame *pxmitframe);
+	void	(*mgnt_xmit)(PADAPTER Adapter, struct xmit_frame *pmgntframe);
+
+	u32	(*read_bbreg)(PADAPTER Adapter, u32 RegAddr, u32 BitMask);
+	void	(*write_bbreg)(PADAPTER Adapter, u32 RegAddr, u32 BitMask, u32 Data);
+	u32	(*read_rfreg)(PADAPTER Adapter, u32 eRFPath, u32 RegAddr, u32 BitMask);
+	void	(*write_rfreg)(PADAPTER Adapter, u32 eRFPath, u32 RegAddr, u32 BitMask, u32 Data);
+
+#ifdef CONFIG_HOSTAPD_MLME
+	s32	(*hostap_mgnt_xmit_entry)(PADAPTER Adapter, _pkt *pkt);
+#endif
+	void (*EfusePowerSwitch)(PADAPTER pAdapter, u8 bWrite, u8 PwrState);
+	void (*ReadEFuse)(PADAPTER Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, BOOLEAN bPseudoTest);
+	void (*EFUSEGetEfuseDefinition)(PADAPTER pAdapter, u8 efuseType, u8 type, PVOID *pOut, BOOLEAN bPseudoTest);
+	u16	(*EfuseGetCurrentSize)(PADAPTER pAdapter, u8 efuseType, BOOLEAN bPseudoTest);
+	int 	(*Efuse_PgPacketRead)(PADAPTER pAdapter, u8 offset, u8 *data, BOOLEAN bPseudoTest);
+	int 	(*Efuse_PgPacketWrite)(PADAPTER pAdapter, u8 offset, u8 word_en, u8 *data, BOOLEAN bPseudoTest);
+	u8	(*Efuse_WordEnableDataWrite)(PADAPTER pAdapter, u16 efuse_addr, u8 word_en, u8 *data, BOOLEAN bPseudoTest);
+	
+#ifdef DBG_CONFIG_ERROR_DETECT
+	void (*sreset_init_value)(_adapter *padapter);
+	void (*sreset_reset_value)(_adapter *padapter);		
+	void (*silentreset)(_adapter *padapter);
+	void (*sreset_xmit_status_check)(_adapter *padapter);
+	void (*sreset_linked_status_check) (_adapter *padapter);
+	u8 (*sreset_get_wifi_status)(_adapter *padapter);
+#endif
+
+#ifdef CONFIG_IOL
+	int (*IOL_exec_cmds_sync)(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms);
+#endif
+};
+
+typedef	enum _RT_EEPROM_TYPE{
+	EEPROM_93C46,
+	EEPROM_93C56,
+	EEPROM_BOOT_EFUSE,
+}RT_EEPROM_TYPE,*PRT_EEPROM_TYPE;
+
+#define USB_HIGH_SPEED_BULK_SIZE	512
+#define USB_FULL_SPEED_BULK_SIZE	64
+
+#define RF_CHANGE_BY_INIT	0
+#define RF_CHANGE_BY_IPS 	BIT28
+#define RF_CHANGE_BY_PS 	BIT29
+#define RF_CHANGE_BY_HW 	BIT30
+#define RF_CHANGE_BY_SW 	BIT31
+
+typedef enum _HARDWARE_TYPE{
+	HARDWARE_TYPE_RTL8180,
+	HARDWARE_TYPE_RTL8185,
+	HARDWARE_TYPE_RTL8187,
+	HARDWARE_TYPE_RTL8188,
+	HARDWARE_TYPE_RTL8190P,
+	HARDWARE_TYPE_RTL8192E,
+	HARDWARE_TYPE_RTL819xU,
+	HARDWARE_TYPE_RTL8192SE,
+	HARDWARE_TYPE_RTL8192SU,
+	HARDWARE_TYPE_RTL8192CE,
+	HARDWARE_TYPE_RTL8192CU,
+	HARDWARE_TYPE_RTL8192DE,
+	HARDWARE_TYPE_RTL8192DU,
+	HARDWARE_TYPE_RTL8723E,
+	HARDWARE_TYPE_RTL8723U,
+}HARDWARE_TYPE;
+
+#define IS_HARDWARE_TYPE_8192CE(_Adapter)	(((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192CE)
+#define IS_HARDWARE_TYPE_8192CU(_Adapter)	(((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192CU)
+
+#define IS_HARDWARE_TYPE_8192DE(_Adapter)	(((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192DE)
+#define IS_HARDWARE_TYPE_8192DU(_Adapter)	(((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192DU)
+
+#define IS_HARDWARE_TYPE_8723E(_Adapter)		(((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8723E)
+#define IS_HARDWARE_TYPE_8723U(_Adapter)		(((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8723U)
+
+#define	IS_HARDWARE_TYPE_8192C(_Adapter)			\
+(IS_HARDWARE_TYPE_8192CE(_Adapter) || IS_HARDWARE_TYPE_8192CU(_Adapter))
+
+#define	IS_HARDWARE_TYPE_8192D(_Adapter)			\
+(IS_HARDWARE_TYPE_8192DE(_Adapter) || IS_HARDWARE_TYPE_8192DU(_Adapter))
+
+#define	IS_HARDWARE_TYPE_8723(_Adapter)			\
+(IS_HARDWARE_TYPE_8723E(_Adapter) || IS_HARDWARE_TYPE_8723U(_Adapter))
+
+
+typedef struct eeprom_priv EEPROM_EFUSE_PRIV, *PEEPROM_EFUSE_PRIV;
+#define GET_EEPROM_EFUSE_PRIV(priv)	(&priv->eeprompriv)
+
+
+void	rtw_dm_init(_adapter *padapter);
+void	rtw_sw_led_init(_adapter *padapter);
+void	rtw_sw_led_deinit(_adapter *padapter);
+
+uint	rtw_hal_init(_adapter *padapter);
+uint	rtw_hal_deinit(_adapter *padapter);
+void	rtw_hal_stop(_adapter *padapter);
+
+void	intf_chip_configure(_adapter *padapter);
+void	intf_read_chip_info(_adapter *padapter);
+void	intf_read_chip_version(_adapter *padapter);
+#ifdef DBG_CONFIG_ERROR_DETECT
+void	rtw_sreset_init(_adapter *padapter);
+#endif
+
+#endif //__HAL_INIT_H__
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/ieee80211_ext.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/ieee80211_ext.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/ieee80211_ext.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/ieee80211_ext.h	2017-09-23 03:42:50.030675028 +0800
@@ -0,0 +1,477 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __IEEE80211_EXT_H
+#define __IEEE80211_EXT_H
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+#define WMM_OUI_TYPE 2
+#define WMM_OUI_SUBTYPE_INFORMATION_ELEMENT 0
+#define WMM_OUI_SUBTYPE_PARAMETER_ELEMENT 1
+#define WMM_OUI_SUBTYPE_TSPEC_ELEMENT 2
+#define WMM_VERSION 1
+
+#define WPA_PROTO_WPA BIT(0)
+#define WPA_PROTO_RSN BIT(1)
+
+#define WPA_KEY_MGMT_IEEE8021X BIT(0)
+#define WPA_KEY_MGMT_PSK BIT(1)
+#define WPA_KEY_MGMT_NONE BIT(2)
+#define WPA_KEY_MGMT_IEEE8021X_NO_WPA BIT(3)
+#define WPA_KEY_MGMT_WPA_NONE BIT(4)
+
+
+#define WPA_CAPABILITY_PREAUTH BIT(0)
+#define WPA_CAPABILITY_MGMT_FRAME_PROTECTION BIT(6)
+#define WPA_CAPABILITY_PEERKEY_ENABLED BIT(9)
+
+
+#define PMKID_LEN 16
+
+
+#ifdef PLATFORM_LINUX
+struct wpa_ie_hdr {
+	u8 elem_id;
+	u8 len;
+	u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */
+	u8 version[2]; /* little endian */
+}__attribute__ ((packed));
+
+struct rsn_ie_hdr {
+	u8 elem_id; /* WLAN_EID_RSN */
+	u8 len;
+	u8 version[2]; /* little endian */
+}__attribute__ ((packed));
+
+struct wme_ac_parameter {
+#if defined(CONFIG_LITTLE_ENDIAN)
+	/* byte 1 */
+	u8 	aifsn:4,
+		acm:1,
+	 	aci:2,
+	 	reserved:1;
+
+	/* byte 2 */
+	u8 	eCWmin:4,
+	 	eCWmax:4;
+#elif defined(CONFIG_BIG_ENDIAN)
+	/* byte 1 */
+	u8 	reserved:1,
+	 	aci:2,
+	 	acm:1,
+	 	aifsn:4;
+
+	/* byte 2 */
+	u8 	eCWmax:4,
+	 	eCWmin:4;
+#else
+#error	"Please fix <endian.h>"
+#endif
+
+	/* bytes 3 & 4 */
+	u16 txopLimit;
+} __attribute__ ((packed));
+
+struct wme_parameter_element {
+	/* required fields for WME version 1 */
+	u8 oui[3];
+	u8 oui_type;
+	u8 oui_subtype;
+	u8 version;
+	u8 acInfo;
+	u8 reserved;
+	struct wme_ac_parameter ac[4];
+
+} __attribute__ ((packed));
+
+#endif
+
+#ifdef PLATFORM_WINDOWS
+
+#pragma pack(1)
+
+struct wpa_ie_hdr {
+	u8 elem_id;
+	u8 len;
+	u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */
+	u8 version[2]; /* little endian */
+};
+
+struct rsn_ie_hdr {
+	u8 elem_id; /* WLAN_EID_RSN */
+	u8 len;
+	u8 version[2]; /* little endian */
+};
+
+#pragma pack()
+
+#endif
+
+#define WPA_PUT_LE16(a, val)			\
+	do {					\
+		(a)[1] = ((u16) (val)) >> 8;	\
+		(a)[0] = ((u16) (val)) & 0xff;	\
+	} while (0)
+
+#define WPA_PUT_BE32(a, val)					\
+	do {							\
+		(a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff);	\
+		(a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff);	\
+		(a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff);	\
+		(a)[3] = (u8) (((u32) (val)) & 0xff);		\
+	} while (0)
+
+#define WPA_PUT_LE32(a, val)					\
+	do {							\
+		(a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff);	\
+		(a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff);	\
+		(a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff);	\
+		(a)[0] = (u8) (((u32) (val)) & 0xff);		\
+	} while (0)
+
+#define RSN_SELECTOR_PUT(a, val) WPA_PUT_BE32((u8 *) (a), (val))
+//#define RSN_SELECTOR_PUT(a, val) WPA_PUT_LE32((u8 *) (a), (val))
+
+
+
+/* Action category code */
+enum ieee80211_category {
+	WLAN_CATEGORY_SPECTRUM_MGMT = 0,
+	WLAN_CATEGORY_QOS = 1,
+	WLAN_CATEGORY_DLS = 2,
+	WLAN_CATEGORY_BACK = 3,
+	WLAN_CATEGORY_HT = 7,
+	WLAN_CATEGORY_WMM = 17,
+};
+
+/* SPECTRUM_MGMT action code */
+enum ieee80211_spectrum_mgmt_actioncode {
+	WLAN_ACTION_SPCT_MSR_REQ = 0,
+	WLAN_ACTION_SPCT_MSR_RPRT = 1,
+	WLAN_ACTION_SPCT_TPC_REQ = 2,
+	WLAN_ACTION_SPCT_TPC_RPRT = 3,
+	WLAN_ACTION_SPCT_CHL_SWITCH = 4,
+	WLAN_ACTION_SPCT_EXT_CHL_SWITCH = 5,
+};
+
+/* BACK action code */
+enum ieee80211_back_actioncode {
+	WLAN_ACTION_ADDBA_REQ = 0,
+	WLAN_ACTION_ADDBA_RESP = 1,
+	WLAN_ACTION_DELBA = 2,
+};
+
+/* HT features action code */
+enum ieee80211_ht_actioncode {
+	WLAN_ACTION_NOTIFY_CH_WIDTH = 0,
+       WLAN_ACTION_SM_PS = 1,
+       WLAN_ACTION_PSPM = 2,
+       WLAN_ACTION_PCO_PHASE = 3,
+       WLAN_ACTION_MIMO_CSI_MX = 4,
+       WLAN_ACTION_MIMO_NONCP_BF = 5,
+       WLAN_ACTION_MIMP_CP_BF = 6,
+       WLAN_ACTION_ASEL_INDICATES_FB = 7,
+       WLAN_ACTION_HI_INFO_EXCHG = 8,
+};
+
+/* BACK (block-ack) parties */
+enum ieee80211_back_parties {
+	WLAN_BACK_RECIPIENT = 0,
+	WLAN_BACK_INITIATOR = 1,
+	WLAN_BACK_TIMER = 2,
+};
+
+#ifdef PLATFORM_LINUX
+
+struct ieee80211_mgmt {
+	u16 frame_control;
+	u16 duration;
+	u8 da[6];
+	u8 sa[6];
+	u8 bssid[6];
+	u16 seq_ctrl;
+	union {
+		struct {
+			u16 auth_alg;
+			u16 auth_transaction;
+			u16 status_code;
+			/* possibly followed by Challenge text */
+			u8 variable[0];
+		}  __attribute__ ((packed)) auth;
+		struct {
+			u16 reason_code;
+		}  __attribute__ ((packed)) deauth;
+		struct {
+			u16 capab_info;
+			u16 listen_interval;
+			/* followed by SSID and Supported rates */
+			u8 variable[0];
+		}  __attribute__ ((packed)) assoc_req;
+		struct {
+			u16 capab_info;
+			u16 status_code;
+			u16 aid;
+			/* followed by Supported rates */
+			u8 variable[0];
+		}  __attribute__ ((packed)) assoc_resp, reassoc_resp;
+		struct {
+			u16 capab_info;
+			u16 listen_interval;
+			u8 current_ap[6];
+			/* followed by SSID and Supported rates */
+			u8 variable[0];
+		}  __attribute__ ((packed)) reassoc_req;
+		struct {
+			u16 reason_code;
+		}  __attribute__ ((packed)) disassoc;
+		struct {
+			__le64 timestamp;
+			u16 beacon_int;
+			u16 capab_info;
+			/* followed by some of SSID, Supported rates,
+			 * FH Params, DS Params, CF Params, IBSS Params, TIM */
+			u8 variable[0];
+		}  __attribute__ ((packed)) beacon;
+		struct {
+			/* only variable items: SSID, Supported rates */
+			u8 variable[0];
+		}  __attribute__ ((packed)) probe_req;
+		struct {
+			__le64 timestamp;
+			u16 beacon_int;
+			u16 capab_info;
+			/* followed by some of SSID, Supported rates,
+			 * FH Params, DS Params, CF Params, IBSS Params */
+			u8 variable[0];
+		}  __attribute__ ((packed)) probe_resp;
+		struct {
+			u8 category;
+			union {
+				struct {
+					u8 action_code;
+					u8 dialog_token;
+					u8 status_code;
+					u8 variable[0];
+				}  __attribute__ ((packed)) wme_action;
+#if 0
+				struct{
+					u8 action_code;
+					u8 element_id;
+					u8 length;
+					struct ieee80211_channel_sw_ie sw_elem;
+				}  __attribute__ ((packed)) chan_switch;
+				struct{
+					u8 action_code;
+					u8 dialog_token;
+					u8 element_id;
+					u8 length;
+					struct ieee80211_msrment_ie msr_elem;
+				}  __attribute__ ((packed)) measurement;
+#endif
+				struct{
+					u8 action_code;
+					u8 dialog_token;
+					u16 capab;
+					u16 timeout;
+					u16 start_seq_num;
+				}  __attribute__ ((packed)) addba_req;
+				struct{
+					u8 action_code;
+					u8 dialog_token;
+					u16 status;
+					u16 capab;
+					u16 timeout;
+				}  __attribute__ ((packed)) addba_resp;
+				struct{
+					u8 action_code;
+					u16 params;
+					u16 reason_code;
+				}  __attribute__ ((packed)) delba;
+				struct{
+					u8 action_code;
+					/* capab_info for open and confirm,
+					 * reason for close
+					 */
+					u16 aux;
+					/* Followed in plink_confirm by status
+					 * code, AID and supported rates,
+					 * and directly by supported rates in
+					 * plink_open and plink_close
+					 */
+					u8 variable[0];
+				}  __attribute__ ((packed)) plink_action;
+				struct{
+					u8 action_code;
+					u8 variable[0];
+				}  __attribute__ ((packed)) mesh_action;
+			} __attribute__ ((packed)) u;
+		}  __attribute__ ((packed)) action;
+	} __attribute__ ((packed)) u;
+}__attribute__ ((packed));
+
+#endif
+
+
+#ifdef PLATFORM_WINDOWS
+
+#pragma pack(1)
+
+struct ieee80211_mgmt {
+	u16 frame_control;
+	u16 duration;
+	u8 da[6];
+	u8 sa[6];
+	u8 bssid[6];
+	u16 seq_ctrl;
+	union {
+		struct {
+			u16 auth_alg;
+			u16 auth_transaction;
+			u16 status_code;
+			/* possibly followed by Challenge text */
+			u8 variable[0];
+		}  auth;
+		struct {
+			u16 reason_code;
+		}  deauth;
+		struct {
+			u16 capab_info;
+			u16 listen_interval;
+			/* followed by SSID and Supported rates */
+			u8 variable[0];
+		}  assoc_req;
+		struct {
+			u16 capab_info;
+			u16 status_code;
+			u16 aid;
+			/* followed by Supported rates */
+			u8 variable[0];
+		}  assoc_resp, reassoc_resp;
+		struct {
+			u16 capab_info;
+			u16 listen_interval;
+			u8 current_ap[6];
+			/* followed by SSID and Supported rates */
+			u8 variable[0];
+		}  reassoc_req;
+		struct {
+			u16 reason_code;
+		}  disassoc;
+#if 0		
+		struct {
+			__le64 timestamp;
+			u16 beacon_int;
+			u16 capab_info;
+			/* followed by some of SSID, Supported rates,
+			 * FH Params, DS Params, CF Params, IBSS Params, TIM */
+			u8 variable[0];
+		}  beacon;
+		struct {
+			/* only variable items: SSID, Supported rates */
+			u8 variable[0];
+		}  probe_req;
+		
+		struct {
+			__le64 timestamp;
+			u16 beacon_int;
+			u16 capab_info;
+			/* followed by some of SSID, Supported rates,
+			 * FH Params, DS Params, CF Params, IBSS Params */
+			u8 variable[0];
+		}  probe_resp;
+#endif	
+		struct {
+			u8 category;
+			union {
+				struct {
+					u8 action_code;
+					u8 dialog_token;
+					u8 status_code;
+					u8 variable[0];
+				}  wme_action;
+/*				
+				struct{
+					u8 action_code;
+					u8 element_id;
+					u8 length;
+					struct ieee80211_channel_sw_ie sw_elem;
+				}  chan_switch;
+				struct{
+					u8 action_code;
+					u8 dialog_token;
+					u8 element_id;
+					u8 length;
+					struct ieee80211_msrment_ie msr_elem;
+				}  measurement;
+*/				
+				struct{
+					u8 action_code;
+					u8 dialog_token;
+					u16 capab;
+					u16 timeout;
+					u16 start_seq_num;
+				}  addba_req;
+				struct{
+					u8 action_code;
+					u8 dialog_token;
+					u16 status;
+					u16 capab;
+					u16 timeout;
+				}  addba_resp;
+				struct{
+					u8 action_code;
+					u16 params;
+					u16 reason_code;
+				}  delba;
+				struct{
+					u8 action_code;
+					/* capab_info for open and confirm,
+					 * reason for close
+					 */
+					u16 aux;
+					/* Followed in plink_confirm by status
+					 * code, AID and supported rates,
+					 * and directly by supported rates in
+					 * plink_open and plink_close
+					 */
+					u8 variable[0];
+				}  plink_action;
+				struct{
+					u8 action_code;
+					u8 variable[0];
+				}  mesh_action;
+			} u;
+		}  action;
+	} u;
+} ;
+
+#pragma pack()
+
+#endif
+
+/* mgmt header + 1 byte category code */
+#define IEEE80211_MIN_ACTION_SIZE FIELD_OFFSET(struct ieee80211_mgmt, u.action.u)
+
+
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/ieee80211.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/ieee80211.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/ieee80211.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/ieee80211.h	2017-09-23 03:42:50.030675028 +0800
@@ -0,0 +1,1437 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __IEEE80211_H
+#define __IEEE80211_H
+
+
+#ifndef CONFIG_RTL8711FW
+
+	#include <drv_conf.h>
+	#include <osdep_service.h>
+	#include <drv_types.h>
+	#include "wifi.h"
+
+	#if defined PLATFORM_OS_XP
+	#include <ntstrsafe.h>
+	#endif
+	#if defined PLATFORM_LINUX
+	#include <linux/wireless.h>
+	#endif
+#else
+	
+	#include <list.h>
+
+#endif
+
+#define MGMT_QUEUE_NUM 5
+
+#define ETH_ALEN	6
+
+#ifdef CONFIG_AP_MODE
+
+#define RTL_IOCTL_HOSTAPD (SIOCIWFIRSTPRIV + 28)
+
+/* RTL871X_IOCTL_HOSTAPD ioctl() cmd: */
+enum {
+	RTL871X_HOSTAPD_FLUSH = 1,
+	RTL871X_HOSTAPD_ADD_STA = 2,
+	RTL871X_HOSTAPD_REMOVE_STA = 3,
+	RTL871X_HOSTAPD_GET_INFO_STA = 4,
+	/* REMOVED: PRISM2_HOSTAPD_RESET_TXEXC_STA = 5, */
+	RTL871X_HOSTAPD_GET_WPAIE_STA = 5,
+	RTL871X_SET_ENCRYPTION = 6,
+	RTL871X_GET_ENCRYPTION = 7,
+	RTL871X_HOSTAPD_SET_FLAGS_STA = 8,
+	RTL871X_HOSTAPD_GET_RID = 9,
+	RTL871X_HOSTAPD_SET_RID = 10,
+	RTL871X_HOSTAPD_SET_ASSOC_AP_ADDR = 11,
+	RTL871X_HOSTAPD_SET_GENERIC_ELEMENT = 12,
+	RTL871X_HOSTAPD_MLME = 13,
+	RTL871X_HOSTAPD_SCAN_REQ = 14,
+	RTL871X_HOSTAPD_STA_CLEAR_STATS = 15,
+	RTL871X_HOSTAPD_SET_BEACON=16,
+	RTL871X_HOSTAPD_SET_WPS_BEACON = 17,
+	RTL871X_HOSTAPD_SET_WPS_PROBE_RESP = 18,
+	RTL871X_HOSTAPD_SET_WPS_ASSOC_RESP = 19,
+};
+
+/* STA flags */
+#define WLAN_STA_AUTH BIT(0)
+#define WLAN_STA_ASSOC BIT(1)
+#define WLAN_STA_PS BIT(2)
+#define WLAN_STA_TIM BIT(3)
+#define WLAN_STA_PERM BIT(4)
+#define WLAN_STA_AUTHORIZED BIT(5)
+#define WLAN_STA_PENDING_POLL BIT(6) /* pending activity poll not ACKed */
+#define WLAN_STA_SHORT_PREAMBLE BIT(7)
+#define WLAN_STA_PREAUTH BIT(8)
+#define WLAN_STA_WME BIT(9)
+#define WLAN_STA_MFP BIT(10)
+#define WLAN_STA_HT BIT(11)
+#define WLAN_STA_WPS BIT(12)
+#define WLAN_STA_MAYBE_WPS BIT(13)
+#define WLAN_STA_NONERP BIT(31)
+
+#endif
+
+#define IEEE_CMD_SET_WPA_PARAM			1
+#define IEEE_CMD_SET_WPA_IE				2
+#define IEEE_CMD_SET_ENCRYPTION			3
+#define IEEE_CMD_MLME						4
+
+#define IEEE_PARAM_WPA_ENABLED				1
+#define IEEE_PARAM_TKIP_COUNTERMEASURES		2
+#define IEEE_PARAM_DROP_UNENCRYPTED			3
+#define IEEE_PARAM_PRIVACY_INVOKED			4
+#define IEEE_PARAM_AUTH_ALGS					5
+#define IEEE_PARAM_IEEE_802_1X				6
+#define IEEE_PARAM_WPAX_SELECT				7
+
+#define AUTH_ALG_OPEN_SYSTEM			0x1
+#define AUTH_ALG_SHARED_KEY			0x2
+#define AUTH_ALG_LEAP				0x00000004
+
+#define IEEE_MLME_STA_DEAUTH				1
+#define IEEE_MLME_STA_DISASSOC			2
+
+#define IEEE_CRYPT_ERR_UNKNOWN_ALG			2
+#define IEEE_CRYPT_ERR_UNKNOWN_ADDR			3
+#define IEEE_CRYPT_ERR_CRYPT_INIT_FAILED		4
+#define IEEE_CRYPT_ERR_KEY_SET_FAILED			5
+#define IEEE_CRYPT_ERR_TX_KEY_SET_FAILED		6
+#define IEEE_CRYPT_ERR_CARD_CONF_FAILED		7
+
+
+#define	IEEE_CRYPT_ALG_NAME_LEN			16
+
+#define WPA_CIPHER_NONE 	BIT(0)
+#define WPA_CIPHER_WEP40 	BIT(1)
+#define WPA_CIPHER_WEP104 BIT(2)
+#define WPA_CIPHER_TKIP 	BIT(3)
+#define WPA_CIPHER_CCMP 	BIT(4)
+
+
+
+#define WPA_SELECTOR_LEN 4
+static u8 WPA_OUI_TYPE[] = { 0x00, 0x50, 0xf2, 1 };
+static u16 WPA_VERSION = 1;
+static u8 WPA_AUTH_KEY_MGMT_NONE[] = { 0x00, 0x50, 0xf2, 0 };
+static u8 WPA_AUTH_KEY_MGMT_UNSPEC_802_1X[] = { 0x00, 0x50, 0xf2, 1 };
+static u8 WPA_AUTH_KEY_MGMT_PSK_OVER_802_1X[] = { 0x00, 0x50, 0xf2, 2 };
+static u8 WPA_CIPHER_SUITE_NONE[] = { 0x00, 0x50, 0xf2, 0 };
+static u8 WPA_CIPHER_SUITE_WEP40[] = { 0x00, 0x50, 0xf2, 1 };
+static u8 WPA_CIPHER_SUITE_TKIP[] = { 0x00, 0x50, 0xf2, 2 };
+//static u8 WPA_CIPHER_SUITE_WRAP[] = { 0x00, 0x50, 0xf2, 3 };
+static u8 WPA_CIPHER_SUITE_CCMP[] = { 0x00, 0x50, 0xf2, 4 };
+static u8 WPA_CIPHER_SUITE_WEP104[] = { 0x00, 0x50, 0xf2, 5 };
+
+
+#define RSN_HEADER_LEN 4
+#define RSN_SELECTOR_LEN 4
+static u16 RSN_VERSION = 1;
+static u8 RSN_AUTH_KEY_MGMT_UNSPEC_802_1X[] = { 0x00, 0x0f, 0xac, 1 };
+static u8 RSN_AUTH_KEY_MGMT_PSK_OVER_802_1X[] = { 0x00, 0x0f, 0xac, 2 };
+static u8 RSN_CIPHER_SUITE_NONE[] = { 0x00, 0x0f, 0xac, 0 };
+static u8 RSN_CIPHER_SUITE_WEP40[] = { 0x00, 0x0f, 0xac, 1 };
+static u8 RSN_CIPHER_SUITE_TKIP[] = { 0x00, 0x0f, 0xac, 2 };
+//static u8 RSN_CIPHER_SUITE_WRAP[] = { 0x00, 0x0f, 0xac, 3 };
+static u8 RSN_CIPHER_SUITE_CCMP[] = { 0x00, 0x0f, 0xac, 4 };
+static u8 RSN_CIPHER_SUITE_WEP104[] = { 0x00, 0x0f, 0xac, 5 };
+
+
+enum NETWORK_TYPE
+{
+    WIRELESS_INVALID = 0,
+    //Sub-Element
+    WIRELESS_11B = BIT(0), // tx: cck only , rx: cck only, hw: cck
+    WIRELESS_11G = BIT(1), // tx: ofdm only, rx: ofdm & cck, hw: cck & ofdm
+    WIRELESS_11A = BIT(2), // tx: ofdm only, rx: ofdm only, hw: ofdm only
+    WIRELESS_11_24N = BIT(3), // tx: MCS only, rx: MCS & cck, hw: MCS & cck
+    WIRELESS_11_5N = BIT(4), // tx: MCS only, rx: MCS & ofdm, hw: ofdm only
+
+    //Combination
+    WIRELESS_11BG = (WIRELESS_11B|WIRELESS_11G), // tx: cck & ofdm, rx: cck & ofdm & MCS, hw: cck & ofdm
+    WIRELESS_11G_24N = (WIRELESS_11G|WIRELESS_11_24N), // tx: ofdm & MCS, rx: ofdm & cck & MCS, hw: cck & ofdm
+    WIRELESS_11A_5N = (WIRELESS_11A|WIRELESS_11_5N), // tx: ofdm & MCS, rx: ofdm & MCS, hw: ofdm only
+    WIRELESS_11BG_24N = (WIRELESS_11B|WIRELESS_11G|WIRELESS_11_24N), // tx: ofdm & cck & MCS, rx: ofdm & cck & MCS, hw: ofdm & cck
+    WIRELESS_11ABGN = (WIRELESS_11A|WIRELESS_11B|WIRELESS_11G|WIRELESS_11_24N|WIRELESS_11_5N),
+};
+
+#define SUPPORTED_24G_NETTYPE_MSK (WIRELESS_11B | WIRELESS_11G | WIRELESS_11_24N)
+#define SUPPORTED_5G_NETTYPE_MSK (WIRELESS_11A | WIRELESS_11_5N)
+
+#define IsSupported24G(NetType) ((NetType) & SUPPORTED_24G_NETTYPE_MSK ? _TRUE : _FALSE)
+#define IsSupported5G(NetType) ((NetType) & SUPPORTED_5G_NETTYPE_MSK ? _TRUE : _FALSE)
+
+#define IsEnableHWCCK(NetType) IsSupported24G(NetType)
+#define IsEnableHWOFDM(NetType) ((NetType) & (WIRELESS_11G|WIRELESS_11_24N|SUPPORTED_5G_NETTYPE_MSK) ? _TRUE : _FALSE)
+
+#define IsSupportedRxCCK(NetType) IsEnableHWCCK(NetType)
+#define IsSupportedRxOFDM(NetType) IsEnableHWOFDM(NetType)
+#define IsSupportedRxMCS(NetType) IsEnableHWOFDM(NetType)
+
+#define IsSupportedTxCCK(NetType) ((NetType) & (WIRELESS_11B) ? _TRUE : _FALSE)
+#define IsSupportedTxOFDM(NetType) ((NetType) & (WIRELESS_11G|WIRELESS_11A) ? _TRUE : _FALSE)
+#define IsSupportedTxMCS(NetType) ((NetType) & (WIRELESS_11_24N|WIRELESS_11_5N) ? _TRUE : _FALSE) 
+
+
+typedef struct ieee_param {
+	u32 cmd;
+	u8 sta_addr[ETH_ALEN];
+        union {
+		struct {
+			u8 name;
+			u32 value;
+		} wpa_param;
+		struct {
+			u32 len;
+			u8 reserved[32];
+			u8 data[0];
+		} wpa_ie;
+	        struct{
+			int command;
+    			int reason_code;
+		} mlme;
+		struct {
+			u8 alg[IEEE_CRYPT_ALG_NAME_LEN];
+			u8 set_tx;
+			u32 err;
+			u8 idx;
+			u8 seq[8]; /* sequence counter (set: RX, get: TX) */
+			u16 key_len;
+			u8 key[0];
+		} crypt;
+#ifdef CONFIG_AP_MODE
+		struct {
+			u16 aid;
+			u16 capability;
+			int flags;
+			u8 tx_supp_rates[16];		
+			struct ieee80211_ht_cap ht_cap;
+		} add_sta;
+		struct {
+			u8	reserved[2];//for set max_num_sta
+			u8	buf[0];
+		} bcn_ie;
+#endif
+
+	} u;	   
+}ieee_param;
+
+
+#if WIRELESS_EXT < 17
+#define IW_QUAL_QUAL_INVALID   0x10
+#define IW_QUAL_LEVEL_INVALID  0x20
+#define IW_QUAL_NOISE_INVALID  0x40
+#define IW_QUAL_QUAL_UPDATED   0x1
+#define IW_QUAL_LEVEL_UPDATED  0x2
+#define IW_QUAL_NOISE_UPDATED  0x4
+#endif
+
+#define IEEE80211_DATA_LEN		2304
+/* Maximum size for the MA-UNITDATA primitive, 802.11 standard section
+   6.2.1.1.2.
+
+   The figure in section 7.1.2 suggests a body size of up to 2312
+   bytes is allowed, which is a bit confusing, I suspect this
+   represents the 2304 bytes of real data, plus a possible 8 bytes of
+   WEP IV and ICV. (this interpretation suggested by Ramiro Barreiro) */
+
+
+#define IEEE80211_HLEN			30
+#define IEEE80211_FRAME_LEN		(IEEE80211_DATA_LEN + IEEE80211_HLEN)
+
+
+/* this is stolen from ipw2200 driver */
+#define IEEE_IBSS_MAC_HASH_SIZE 31
+
+struct ieee_ibss_seq {
+	u8 mac[ETH_ALEN];
+	u16 seq_num;
+	u16 frag_num;
+	unsigned long packet_time;
+	_list	list;
+};
+
+#if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW)
+
+struct ieee80211_hdr {
+	u16 frame_ctl;
+	u16 duration_id;
+	u8 addr1[ETH_ALEN];
+	u8 addr2[ETH_ALEN];
+	u8 addr3[ETH_ALEN];
+	u16 seq_ctl;
+	u8 addr4[ETH_ALEN];
+} __attribute__ ((packed));
+
+struct ieee80211_hdr_3addr {
+	u16 frame_ctl;
+	u16 duration_id;
+	u8 addr1[ETH_ALEN];
+	u8 addr2[ETH_ALEN];
+	u8 addr3[ETH_ALEN];
+	u16 seq_ctl;
+} __attribute__ ((packed));
+
+
+struct	ieee80211_hdr_qos {
+	u16 frame_ctl;
+	u16 duration_id;
+	u8 addr1[ETH_ALEN];
+	u8 addr2[ETH_ALEN];
+	u8 addr3[ETH_ALEN];
+	u16 seq_ctl;
+	u8 addr4[ETH_ALEN];
+	u16	qc;
+}  __attribute__ ((packed));
+
+struct  ieee80211_hdr_3addr_qos {
+        u16 frame_ctl;
+	u16 duration_id;
+	u8 addr1[ETH_ALEN];
+	u8 addr2[ETH_ALEN];
+	u8 addr3[ETH_ALEN];
+	u16 seq_ctl;
+       u16     qc;
+}  __attribute__ ((packed));
+
+struct eapol {
+	u8 snap[6];
+	u16 ethertype;
+	u8 version;
+	u8 type;
+	u16 length;
+} __attribute__ ((packed));
+
+#endif
+
+
+
+#ifdef PLATFORM_WINDOWS
+
+#pragma pack(1)
+struct ieee80211_hdr {
+	u16 frame_ctl;
+	u16 duration_id;
+	u8 addr1[ETH_ALEN];
+	u8 addr2[ETH_ALEN];
+	u8 addr3[ETH_ALEN];
+	u16 seq_ctl;
+	u8 addr4[ETH_ALEN];
+};
+
+struct ieee80211_hdr_3addr {
+	u16 frame_ctl;
+	u16 duration_id;
+	u8 addr1[ETH_ALEN];
+	u8 addr2[ETH_ALEN];
+	u8 addr3[ETH_ALEN];
+	u16 seq_ctl;
+};
+
+
+struct	ieee80211_hdr_qos {
+	struct	ieee80211_hdr wlan_hdr;
+	u16	qc;
+};
+
+struct  ieee80211_hdr_3addr_qos {
+        struct  ieee80211_hdr_3addr wlan_hdr;
+        u16     qc;
+};
+
+struct eapol {
+	u8 snap[6];
+	u16 ethertype;
+	u8 version;
+	u8 type;
+	u16 length;
+};
+#pragma pack()
+
+#endif
+
+
+
+enum eap_type {
+	EAP_PACKET = 0,
+	EAPOL_START,
+	EAPOL_LOGOFF,
+	EAPOL_KEY,
+	EAPOL_ENCAP_ASF_ALERT
+};
+
+#define IEEE80211_3ADDR_LEN 24
+#define IEEE80211_4ADDR_LEN 30
+#define IEEE80211_FCS_LEN    4
+
+#define MIN_FRAG_THRESHOLD     256U
+#define	MAX_FRAG_THRESHOLD     2346U
+
+/* Frame control field constants */
+#define IEEE80211_FCTL_VERS		0x0002
+#define IEEE80211_FCTL_FTYPE		0x000c
+#define IEEE80211_FCTL_STYPE		0x00f0
+#define IEEE80211_FCTL_TODS		0x0100
+#define IEEE80211_FCTL_FROMDS		0x0200
+#define IEEE80211_FCTL_MOREFRAGS	0x0400
+#define IEEE80211_FCTL_RETRY		0x0800
+#define IEEE80211_FCTL_PM		0x1000
+#define IEEE80211_FCTL_MOREDATA	0x2000
+#define IEEE80211_FCTL_WEP		0x4000
+#define IEEE80211_FCTL_ORDER		0x8000
+
+#define IEEE80211_FTYPE_MGMT		0x0000
+#define IEEE80211_FTYPE_CTL		0x0004
+#define IEEE80211_FTYPE_DATA		0x0008
+
+/* management */
+#define IEEE80211_STYPE_ASSOC_REQ	0x0000
+#define IEEE80211_STYPE_ASSOC_RESP 	0x0010
+#define IEEE80211_STYPE_REASSOC_REQ	0x0020
+#define IEEE80211_STYPE_REASSOC_RESP	0x0030
+#define IEEE80211_STYPE_PROBE_REQ	0x0040
+#define IEEE80211_STYPE_PROBE_RESP	0x0050
+#define IEEE80211_STYPE_BEACON		0x0080
+#define IEEE80211_STYPE_ATIM		0x0090
+#define IEEE80211_STYPE_DISASSOC	0x00A0
+#define IEEE80211_STYPE_AUTH		0x00B0
+#define IEEE80211_STYPE_DEAUTH		0x00C0
+
+/* control */
+#define IEEE80211_STYPE_PSPOLL		0x00A0
+#define IEEE80211_STYPE_RTS		0x00B0
+#define IEEE80211_STYPE_CTS		0x00C0
+#define IEEE80211_STYPE_ACK		0x00D0
+#define IEEE80211_STYPE_CFEND		0x00E0
+#define IEEE80211_STYPE_CFENDACK	0x00F0
+
+/* data */
+#define IEEE80211_STYPE_DATA		0x0000
+#define IEEE80211_STYPE_DATA_CFACK	0x0010
+#define IEEE80211_STYPE_DATA_CFPOLL	0x0020
+#define IEEE80211_STYPE_DATA_CFACKPOLL	0x0030
+#define IEEE80211_STYPE_NULLFUNC	0x0040
+#define IEEE80211_STYPE_CFACK		0x0050
+#define IEEE80211_STYPE_CFPOLL		0x0060
+#define IEEE80211_STYPE_CFACKPOLL	0x0070
+#define IEEE80211_QOS_DATAGRP		0x0080
+#define IEEE80211_QoS_DATAGRP		IEEE80211_QOS_DATAGRP	
+
+#define IEEE80211_SCTL_FRAG		0x000F
+#define IEEE80211_SCTL_SEQ		0xFFF0
+
+/* QoS,QOS */
+#define NORMAL_ACK			0
+#define NO_ACK				1
+#define NON_EXPLICIT_ACK	2
+#define BLOCK_ACK			3
+
+#ifndef ETH_P_PAE
+#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */
+#endif /* ETH_P_PAE */
+
+#define ETH_P_PREAUTH 0x88C7 /* IEEE 802.11i pre-authentication */
+
+#define ETH_P_ECONET	0x0018
+
+#ifndef ETH_P_80211_RAW
+#define ETH_P_80211_RAW (ETH_P_ECONET + 1)
+#endif
+
+/* IEEE 802.11 defines */
+
+#define P80211_OUI_LEN 3
+
+#if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW)
+
+struct ieee80211_snap_hdr {
+
+        u8    dsap;   /* always 0xAA */
+        u8    ssap;   /* always 0xAA */
+        u8    ctrl;   /* always 0x03 */
+        u8    oui[P80211_OUI_LEN];    /* organizational universal id */
+
+} __attribute__ ((packed));
+
+#endif
+
+#ifdef PLATFORM_WINDOWS
+
+#pragma pack(1)
+struct ieee80211_snap_hdr {
+
+        u8    dsap;   /* always 0xAA */
+        u8    ssap;   /* always 0xAA */
+        u8    ctrl;   /* always 0x03 */
+        u8    oui[P80211_OUI_LEN];    /* organizational universal id */
+
+};
+#pragma pack()
+
+#endif
+
+
+#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr)
+
+#define WLAN_FC_GET_TYPE(fc) ((fc) & IEEE80211_FCTL_FTYPE)
+#define WLAN_FC_GET_STYPE(fc) ((fc) & IEEE80211_FCTL_STYPE)
+
+#define WLAN_QC_GET_TID(qc) ((qc) & 0x0f)
+
+#define WLAN_GET_SEQ_FRAG(seq) ((seq) & IEEE80211_SCTL_FRAG)
+#define WLAN_GET_SEQ_SEQ(seq)  ((seq) & IEEE80211_SCTL_SEQ)
+
+/* Authentication algorithms */
+#define WLAN_AUTH_OPEN 0
+#define WLAN_AUTH_SHARED_KEY 1
+
+#define WLAN_AUTH_CHALLENGE_LEN 128
+
+#define WLAN_CAPABILITY_BSS (1<<0)
+#define WLAN_CAPABILITY_IBSS (1<<1)
+#define WLAN_CAPABILITY_CF_POLLABLE (1<<2)
+#define WLAN_CAPABILITY_CF_POLL_REQUEST (1<<3)
+#define WLAN_CAPABILITY_PRIVACY (1<<4)
+#define WLAN_CAPABILITY_SHORT_PREAMBLE (1<<5)
+#define WLAN_CAPABILITY_PBCC (1<<6)
+#define WLAN_CAPABILITY_CHANNEL_AGILITY (1<<7)
+#define WLAN_CAPABILITY_SHORT_SLOT (1<<10)
+
+/* Status codes */
+#define WLAN_STATUS_SUCCESS 0
+#define WLAN_STATUS_UNSPECIFIED_FAILURE 1
+#define WLAN_STATUS_CAPS_UNSUPPORTED 10
+#define WLAN_STATUS_REASSOC_NO_ASSOC 11
+#define WLAN_STATUS_ASSOC_DENIED_UNSPEC 12
+#define WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG 13
+#define WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION 14
+#define WLAN_STATUS_CHALLENGE_FAIL 15
+#define WLAN_STATUS_AUTH_TIMEOUT 16
+#define WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA 17
+#define WLAN_STATUS_ASSOC_DENIED_RATES 18
+/* 802.11b */
+#define WLAN_STATUS_ASSOC_DENIED_NOSHORT 19
+#define WLAN_STATUS_ASSOC_DENIED_NOPBCC 20
+#define WLAN_STATUS_ASSOC_DENIED_NOAGILITY 21
+
+/* Reason codes */
+#define WLAN_REASON_UNSPECIFIED 1
+#define WLAN_REASON_PREV_AUTH_NOT_VALID 2
+#define WLAN_REASON_DEAUTH_LEAVING 3
+#define WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY 4
+#define WLAN_REASON_DISASSOC_AP_BUSY 5
+#define WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA 6
+#define WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA 7
+#define WLAN_REASON_DISASSOC_STA_HAS_LEFT 8
+#define WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH 9
+
+
+/* Information Element IDs */
+#define WLAN_EID_SSID 0
+#define WLAN_EID_SUPP_RATES 1
+#define WLAN_EID_FH_PARAMS 2
+#define WLAN_EID_DS_PARAMS 3
+#define WLAN_EID_CF_PARAMS 4
+#define WLAN_EID_TIM 5
+#define WLAN_EID_IBSS_PARAMS 6
+#define WLAN_EID_CHALLENGE 16
+/* EIDs defined by IEEE 802.11h - START */
+#define WLAN_EID_PWR_CONSTRAINT 32
+#define WLAN_EID_PWR_CAPABILITY 33
+#define WLAN_EID_TPC_REQUEST 34
+#define WLAN_EID_TPC_REPORT 35
+#define WLAN_EID_SUPPORTED_CHANNELS 36
+#define WLAN_EID_CHANNEL_SWITCH 37
+#define WLAN_EID_MEASURE_REQUEST 38
+#define WLAN_EID_MEASURE_REPORT 39
+#define WLAN_EID_QUITE 40
+#define WLAN_EID_IBSS_DFS 41
+/* EIDs defined by IEEE 802.11h - END */
+#define WLAN_EID_ERP_INFO 42
+#define WLAN_EID_HT_CAP 45
+#define WLAN_EID_RSN 48
+#define WLAN_EID_EXT_SUPP_RATES 50
+#define WLAN_EID_MOBILITY_DOMAIN 54
+#define WLAN_EID_FAST_BSS_TRANSITION 55
+#define WLAN_EID_TIMEOUT_INTERVAL 56
+#define WLAN_EID_RIC_DATA 57
+#define WLAN_EID_HT_OPERATION 61
+#define WLAN_EID_SECONDARY_CHANNEL_OFFSET 62
+#define WLAN_EID_20_40_BSS_COEXISTENCE 72
+#define WLAN_EID_20_40_BSS_INTOLERANT 73
+#define WLAN_EID_OVERLAPPING_BSS_SCAN_PARAMS 74
+#define WLAN_EID_MMIE 76
+#define WLAN_EID_VENDOR_SPECIFIC 221
+#define WLAN_EID_GENERIC (WLAN_EID_VENDOR_SPECIFIC)
+
+#define IEEE80211_MGMT_HDR_LEN 24
+#define IEEE80211_DATA_HDR3_LEN 24
+#define IEEE80211_DATA_HDR4_LEN 30
+
+
+#define IEEE80211_STATMASK_SIGNAL (1<<0)
+#define IEEE80211_STATMASK_RSSI (1<<1)
+#define IEEE80211_STATMASK_NOISE (1<<2)
+#define IEEE80211_STATMASK_RATE (1<<3)
+#define IEEE80211_STATMASK_WEMASK 0x7
+
+
+#define IEEE80211_CCK_MODULATION    (1<<0)
+#define IEEE80211_OFDM_MODULATION   (1<<1)
+
+#define IEEE80211_24GHZ_BAND     (1<<0)
+#define IEEE80211_52GHZ_BAND     (1<<1)
+
+#define IEEE80211_CCK_RATE_LEN  		4
+#define IEEE80211_NUM_OFDM_RATESLEN	8
+
+
+#define IEEE80211_CCK_RATE_1MB		        0x02
+#define IEEE80211_CCK_RATE_2MB		        0x04
+#define IEEE80211_CCK_RATE_5MB		        0x0B
+#define IEEE80211_CCK_RATE_11MB		        0x16
+#define IEEE80211_OFDM_RATE_LEN 		8
+#define IEEE80211_OFDM_RATE_6MB		        0x0C
+#define IEEE80211_OFDM_RATE_9MB		        0x12
+#define IEEE80211_OFDM_RATE_12MB		0x18
+#define IEEE80211_OFDM_RATE_18MB		0x24
+#define IEEE80211_OFDM_RATE_24MB		0x30
+#define IEEE80211_OFDM_RATE_36MB		0x48
+#define IEEE80211_OFDM_RATE_48MB		0x60
+#define IEEE80211_OFDM_RATE_54MB		0x6C
+#define IEEE80211_BASIC_RATE_MASK		0x80
+
+#define IEEE80211_CCK_RATE_1MB_MASK		(1<<0)
+#define IEEE80211_CCK_RATE_2MB_MASK		(1<<1)
+#define IEEE80211_CCK_RATE_5MB_MASK		(1<<2)
+#define IEEE80211_CCK_RATE_11MB_MASK		(1<<3)
+#define IEEE80211_OFDM_RATE_6MB_MASK		(1<<4)
+#define IEEE80211_OFDM_RATE_9MB_MASK		(1<<5)
+#define IEEE80211_OFDM_RATE_12MB_MASK		(1<<6)
+#define IEEE80211_OFDM_RATE_18MB_MASK		(1<<7)
+#define IEEE80211_OFDM_RATE_24MB_MASK		(1<<8)
+#define IEEE80211_OFDM_RATE_36MB_MASK		(1<<9)
+#define IEEE80211_OFDM_RATE_48MB_MASK		(1<<10)
+#define IEEE80211_OFDM_RATE_54MB_MASK		(1<<11)
+
+#define IEEE80211_CCK_RATES_MASK	        0x0000000F
+#define IEEE80211_CCK_BASIC_RATES_MASK	(IEEE80211_CCK_RATE_1MB_MASK | \
+	IEEE80211_CCK_RATE_2MB_MASK)
+#define IEEE80211_CCK_DEFAULT_RATES_MASK	(IEEE80211_CCK_BASIC_RATES_MASK | \
+        IEEE80211_CCK_RATE_5MB_MASK | \
+        IEEE80211_CCK_RATE_11MB_MASK)
+
+#define IEEE80211_OFDM_RATES_MASK		0x00000FF0
+#define IEEE80211_OFDM_BASIC_RATES_MASK	(IEEE80211_OFDM_RATE_6MB_MASK | \
+	IEEE80211_OFDM_RATE_12MB_MASK | \
+	IEEE80211_OFDM_RATE_24MB_MASK)
+#define IEEE80211_OFDM_DEFAULT_RATES_MASK	(IEEE80211_OFDM_BASIC_RATES_MASK | \
+	IEEE80211_OFDM_RATE_9MB_MASK  | \
+	IEEE80211_OFDM_RATE_18MB_MASK | \
+	IEEE80211_OFDM_RATE_36MB_MASK | \
+	IEEE80211_OFDM_RATE_48MB_MASK | \
+	IEEE80211_OFDM_RATE_54MB_MASK)
+#define IEEE80211_DEFAULT_RATES_MASK (IEEE80211_OFDM_DEFAULT_RATES_MASK | \
+                                IEEE80211_CCK_DEFAULT_RATES_MASK)
+
+#define IEEE80211_NUM_OFDM_RATES	    8
+#define IEEE80211_NUM_CCK_RATES	            4
+#define IEEE80211_OFDM_SHIFT_MASK_A         4
+
+
+
+
+/* NOTE: This data is for statistical purposes; not all hardware provides this
+ *       information for frames received.  Not setting these will not cause
+ *       any adverse affects. */
+struct ieee80211_rx_stats {
+	//u32 mac_time[2];
+	s8 rssi;
+	u8 signal;
+	u8 noise;
+	u8 received_channel;
+	u16 rate; /* in 100 kbps */
+	//u8 control;
+	u8 mask;
+	u8 freq;
+	u16 len;
+};
+
+/* IEEE 802.11 requires that STA supports concurrent reception of at least
+ * three fragmented frames. This define can be increased to support more
+ * concurrent frames, but it should be noted that each entry can consume about
+ * 2 kB of RAM and increasing cache size will slow down frame reassembly. */
+#define IEEE80211_FRAG_CACHE_LEN 4
+
+struct ieee80211_frag_entry {
+	u32 first_frag_time;
+	uint seq;
+	uint last_frag;
+	uint qos;   //jackson
+	uint tid;	//jackson
+	struct sk_buff *skb;
+	u8 src_addr[ETH_ALEN];
+	u8 dst_addr[ETH_ALEN];
+};
+
+struct ieee80211_stats {
+	uint tx_unicast_frames;
+	uint tx_multicast_frames;
+	uint tx_fragments;
+	uint tx_unicast_octets;
+	uint tx_multicast_octets;
+	uint tx_deferred_transmissions;
+	uint tx_single_retry_frames;
+	uint tx_multiple_retry_frames;
+	uint tx_retry_limit_exceeded;
+	uint tx_discards;
+	uint rx_unicast_frames;
+	uint rx_multicast_frames;
+	uint rx_fragments;
+	uint rx_unicast_octets;
+	uint rx_multicast_octets;
+	uint rx_fcs_errors;
+	uint rx_discards_no_buffer;
+	uint tx_discards_wrong_sa;
+	uint rx_discards_undecryptable;
+	uint rx_message_in_msg_fragments;
+	uint rx_message_in_bad_msg_fragments;
+};
+
+struct ieee80211_softmac_stats{
+	uint rx_ass_ok;
+	uint rx_ass_err;
+	uint rx_probe_rq;
+	uint tx_probe_rs;
+	uint tx_beacons;
+	uint rx_auth_rq;
+	uint rx_auth_rs_ok;
+	uint rx_auth_rs_err;
+	uint tx_auth_rq;
+	uint no_auth_rs;
+	uint no_ass_rs;
+	uint tx_ass_rq;
+	uint rx_ass_rq;
+	uint tx_probe_rq;
+	uint reassoc;
+	uint swtxstop;
+	uint swtxawake;
+};
+
+#define SEC_KEY_1         (1<<0)
+#define SEC_KEY_2         (1<<1)
+#define SEC_KEY_3         (1<<2)
+#define SEC_KEY_4         (1<<3)
+#define SEC_ACTIVE_KEY    (1<<4)
+#define SEC_AUTH_MODE     (1<<5)
+#define SEC_UNICAST_GROUP (1<<6)
+#define SEC_LEVEL         (1<<7)
+#define SEC_ENABLED       (1<<8)
+
+#define SEC_LEVEL_0      0 /* None */
+#define SEC_LEVEL_1      1 /* WEP 40 and 104 bit */
+#define SEC_LEVEL_2      2 /* Level 1 + TKIP */
+#define SEC_LEVEL_2_CKIP 3 /* Level 1 + CKIP */
+#define SEC_LEVEL_3      4 /* Level 2 + CCMP */
+
+#define WEP_KEYS 4
+#define WEP_KEY_LEN 13
+
+
+
+#if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW)
+
+struct ieee80211_security {
+	u16 active_key:2,
+            enabled:1,
+	    auth_mode:2,
+            auth_algo:4,
+            unicast_uses_group:1;
+	u8 key_sizes[WEP_KEYS];
+	u8 keys[WEP_KEYS][WEP_KEY_LEN];
+	u8 level;
+	u16 flags;
+} __attribute__ ((packed));
+
+#endif
+
+#ifdef PLATFORM_WINDOWS
+
+#pragma pack(1)
+struct ieee80211_security {
+	u16 active_key:2,
+            enabled:1,
+	    auth_mode:2,
+            auth_algo:4,
+            unicast_uses_group:1;
+	u8 key_sizes[WEP_KEYS];
+	u8 keys[WEP_KEYS][WEP_KEY_LEN];
+	u8 level;
+	u16 flags;
+} ;
+#pragma pack()
+
+#endif
+
+/*
+
+ 802.11 data frame from AP
+
+      ,-------------------------------------------------------------------.
+Bytes |  2   |  2   |    6    |    6    |    6    |  2   | 0..2312 |   4  |
+      |------|------|---------|---------|---------|------|---------|------|
+Desc. | ctrl | dura |  DA/RA  |   TA    |    SA   | Sequ |  frame  |  fcs |
+      |      | tion | (BSSID) |         |         | ence |  data   |      |
+      `-------------------------------------------------------------------'
+
+Total: 28-2340 bytes
+
+*/
+
+struct ieee80211_header_data {
+	u16 frame_ctl;
+	u16 duration_id;
+	u8 addr1[6];
+	u8 addr2[6];
+	u8 addr3[6];
+	u16 seq_ctrl;
+};
+
+#define BEACON_PROBE_SSID_ID_POSITION 12
+
+/* Management Frame Information Element Types */
+#define MFIE_TYPE_SSID       0
+#define MFIE_TYPE_RATES      1
+#define MFIE_TYPE_FH_SET     2
+#define MFIE_TYPE_DS_SET     3
+#define MFIE_TYPE_CF_SET     4
+#define MFIE_TYPE_TIM        5
+#define MFIE_TYPE_IBSS_SET   6
+#define MFIE_TYPE_CHALLENGE  16
+#define MFIE_TYPE_ERP        42
+#define MFIE_TYPE_RSN	     48
+#define MFIE_TYPE_RATES_EX   50
+#define MFIE_TYPE_GENERIC    221
+
+#if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW)
+
+struct ieee80211_info_element_hdr {
+	u8 id;
+	u8 len;
+} __attribute__ ((packed));
+
+struct ieee80211_info_element {
+	u8 id;
+	u8 len;
+	u8 data[0];
+} __attribute__ ((packed));
+#endif
+
+#ifdef CONFIG_TDLS
+/* TDLS */
+#define TDLS_MIC_LEN 16
+#define WPA_NONCE_LEN 32
+#define TDLS_TIMEOUT_LEN 4
+
+struct wpa_tdls_ftie {
+	u8 ie_type; /* FTIE */
+	u8 ie_len;
+	u8 mic_ctrl[2];
+	u8 mic[TDLS_MIC_LEN];
+	u8 Anonce[WPA_NONCE_LEN]; /* Responder Nonce in TDLS */
+	u8 Snonce[WPA_NONCE_LEN]; /* Initiator Nonce in TDLS */
+	/* followed by optional elements */
+} ;
+
+struct wpa_tdls_timeoutie {
+	u8 ie_type; /* Timeout IE */
+	u8 ie_len;
+	u8 interval_type;
+	u8 value[TDLS_TIMEOUT_LEN];
+} ;
+
+struct wpa_tdls_lnkid {
+	u8 ie_type; /* Link Identifier IE */
+	u8 ie_len;
+	u8 bssid[ETH_ALEN];
+	u8 init_sta[ETH_ALEN];
+	u8 resp_sta[ETH_ALEN];
+} ;
+#endif
+
+#ifdef PLATFORM_WINDOWS
+
+#pragma pack(1)
+struct ieee80211_info_element_hdr {
+	u8 id;
+	u8 len;
+} ;
+
+struct ieee80211_info_element {
+	u8 id;
+	u8 len;
+	u8 data[0];
+} ;
+#pragma pack()
+
+#endif
+
+
+/*
+ * These are the data types that can make up management packets
+ *
+	u16 auth_algorithm;
+	u16 auth_sequence;
+	u16 beacon_interval;
+	u16 capability;
+	u8 current_ap[ETH_ALEN];
+	u16 listen_interval;
+	struct {
+		u16 association_id:14, reserved:2;
+	} __attribute__ ((packed));
+	u32 time_stamp[2];
+	u16 reason;
+	u16 status;
+*/
+
+#define IEEE80211_DEFAULT_TX_ESSID "Penguin"
+#define IEEE80211_DEFAULT_BASIC_RATE 10
+
+
+#if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW)
+
+
+struct ieee80211_authentication {
+	struct ieee80211_header_data header;
+	u16 algorithm;
+	u16 transaction;
+	u16 status;
+	//struct ieee80211_info_element_hdr info_element;
+} __attribute__ ((packed));
+
+
+struct ieee80211_probe_response {
+	struct ieee80211_header_data header;
+	u32 time_stamp[2];
+	u16 beacon_interval;
+	u16 capability;
+	struct ieee80211_info_element info_element;
+} __attribute__ ((packed));
+
+struct ieee80211_probe_request {
+	struct ieee80211_header_data header;
+	/*struct ieee80211_info_element info_element;*/
+} __attribute__ ((packed));
+
+struct ieee80211_assoc_request_frame {
+	struct ieee80211_hdr_3addr header;
+	u16 capability;
+	u16 listen_interval;
+	//u8 current_ap[ETH_ALEN];
+	struct ieee80211_info_element_hdr info_element;
+} __attribute__ ((packed));
+
+struct ieee80211_assoc_response_frame {
+	struct ieee80211_hdr_3addr header;
+	u16 capability;
+	u16 status;
+	u16 aid;
+//	struct ieee80211_info_element info_element; /* supported rates */
+} __attribute__ ((packed));
+#endif
+
+
+
+#ifdef PLATFORM_WINDOWS
+
+#pragma pack(1)
+
+struct ieee80211_authentication {
+	struct ieee80211_header_data header;
+	u16 algorithm;
+	u16 transaction;
+	u16 status;
+	//struct ieee80211_info_element_hdr info_element;
+} ;
+
+
+struct ieee80211_probe_response {
+	struct ieee80211_header_data header;
+	u32 time_stamp[2];
+	u16 beacon_interval;
+	u16 capability;
+	struct ieee80211_info_element info_element;
+} ;
+
+struct ieee80211_probe_request {
+	struct ieee80211_header_data header;
+	/*struct ieee80211_info_element info_element;*/
+} ;
+
+struct ieee80211_assoc_request_frame {
+	struct ieee80211_hdr_3addr header;
+	u16 capability;
+	u16 listen_interval;
+	//u8 current_ap[ETH_ALEN];
+	struct ieee80211_info_element_hdr info_element;
+} ;
+
+struct ieee80211_assoc_response_frame {
+	struct ieee80211_hdr_3addr header;
+	u16 capability;
+	u16 status;
+	u16 aid;
+//	struct ieee80211_info_element info_element; /* supported rates */
+};
+
+#pragma pack()
+
+#endif
+
+
+
+
+struct ieee80211_txb {
+	u8 nr_frags;
+	u8 encrypted;
+	u16 reserved;
+	u16 frag_size;
+	u16 payload_size;
+	struct sk_buff *fragments[0];
+};
+
+
+/* SWEEP TABLE ENTRIES NUMBER*/
+#define MAX_SWEEP_TAB_ENTRIES		  42
+#define MAX_SWEEP_TAB_ENTRIES_PER_PACKET  7
+/* MAX_RATES_LENGTH needs to be 12.  The spec says 8, and many APs
+ * only use 8, and then use extended rates for the remaining supported
+ * rates.  Other APs, however, stick all of their supported rates on the
+ * main rates information element... */
+#define MAX_RATES_LENGTH                  ((u8)12)
+#define MAX_RATES_EX_LENGTH               ((u8)16)
+#define MAX_NETWORK_COUNT                  128
+#define MAX_CHANNEL_NUMBER                 161
+#define IEEE80211_SOFTMAC_SCAN_TIME	  400
+//(HZ / 2)
+#define IEEE80211_SOFTMAC_ASSOC_RETRY_TIME (HZ * 2)
+
+#define CRC_LENGTH                 4U
+
+#define MAX_WPA_IE_LEN (128)
+#define MAX_WPS_IE_LEN (512)
+#define MAX_P2P_IE_LEN (256)
+#define MAX_WFD_IE_LEN (128)
+
+#define NETWORK_EMPTY_ESSID (1<<0)
+#define NETWORK_HAS_OFDM    (1<<1)
+#define NETWORK_HAS_CCK     (1<<2)
+
+#define IEEE80211_DTIM_MBCAST 4
+#define IEEE80211_DTIM_UCAST 2
+#define IEEE80211_DTIM_VALID 1
+#define IEEE80211_DTIM_INVALID 0
+
+#define IEEE80211_PS_DISABLED 0
+#define IEEE80211_PS_UNICAST IEEE80211_DTIM_UCAST
+#define IEEE80211_PS_MBCAST IEEE80211_DTIM_MBCAST
+#define IW_ESSID_MAX_SIZE 32
+#if 0
+struct ieee80211_network {
+	/* These entries are used to identify a unique network */
+	u8 bssid[ETH_ALEN];
+	u8 channel;
+	/* Ensure null-terminated for any debug msgs */
+	u8 ssid[IW_ESSID_MAX_SIZE + 1];
+	u8 ssid_len;
+	u8	rssi;	//relative signal strength
+	u8	sq;		//signal quality
+
+	/* These are network statistics */
+	//struct ieee80211_rx_stats stats;
+	u16 capability;
+	u16	aid;
+	u8 rates[MAX_RATES_LENGTH];
+	u8 rates_len;
+	u8 rates_ex[MAX_RATES_EX_LENGTH];
+	u8 rates_ex_len;
+	
+	u8 edca_parmsets[18];
+		
+	u8 mode;
+	u8 flags;
+	u8 time_stamp[8];
+	u16 beacon_interval;
+	u16 listen_interval;
+	u16 atim_window;
+	u8 wpa_ie[MAX_WPA_IE_LEN];
+	size_t wpa_ie_len;
+	u8 rsn_ie[MAX_WPA_IE_LEN];
+	size_t rsn_ie_len;
+	u8 country[6];
+	u8 dtim_period;
+	u8 dtim_data;
+	u8 power_constraint;
+	u8 qosinfo;
+	u8 qbssload[5];
+	u8 network_type;
+	int join_res;
+	unsigned long	last_scanned;	
+};
+#endif
+/*
+join_res:
+-1: authentication fail
+-2: association fail
+> 0: TID
+*/
+
+enum ieee80211_state {
+
+	/* the card is not linked at all */
+	IEEE80211_NOLINK = 0,
+	
+	/* IEEE80211_ASSOCIATING* are for BSS client mode
+	 * the driver shall not perform RX filtering unless
+	 * the state is LINKED.
+	 * The driver shall just check for the state LINKED and
+	 * defaults to NOLINK for ALL the other states (including
+	 * LINKED_SCANNING)
+	 */
+	
+	/* the association procedure will start (wq scheduling)*/
+	IEEE80211_ASSOCIATING,
+	IEEE80211_ASSOCIATING_RETRY,
+	
+	/* the association procedure is sending AUTH request*/
+	IEEE80211_ASSOCIATING_AUTHENTICATING,
+	
+	/* the association procedure has successfully authentcated
+	 * and is sending association request
+	 */
+	IEEE80211_ASSOCIATING_AUTHENTICATED,
+	
+	/* the link is ok. the card associated to a BSS or linked
+	 * to a ibss cell or acting as an AP and creating the bss
+	 */
+	IEEE80211_LINKED,
+	
+	/* same as LINKED, but the driver shall apply RX filter
+	 * rules as we are in NO_LINK mode. As the card is still
+	 * logically linked, but it is doing a syncro site survey
+	 * then it will be back to LINKED state.
+	 */
+	IEEE80211_LINKED_SCANNING,
+	
+};
+
+#define DEFAULT_MAX_SCAN_AGE (15 * HZ)
+#define DEFAULT_FTS 2346
+#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x"
+#define MAC_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5]
+
+extern __inline int is_multicast_mac_addr(const u8 *addr)
+{
+        return ((addr[0] != 0xff) && (0x01 & addr[0]));
+}
+
+extern __inline int is_broadcast_mac_addr(const u8 *addr)
+{
+	return ((addr[0] == 0xff) && (addr[1] == 0xff) && (addr[2] == 0xff) &&   \
+		(addr[3] == 0xff) && (addr[4] == 0xff) && (addr[5] == 0xff));
+}
+
+#define CFG_IEEE80211_RESERVE_FCS (1<<0)
+#define CFG_IEEE80211_COMPUTE_FCS (1<<1)
+
+typedef struct tx_pending_t{
+	int frag;
+	struct ieee80211_txb *txb;
+}tx_pending_t;
+
+
+
+#define MAXTID	16
+
+#define IEEE_A            (1<<0)
+#define IEEE_B            (1<<1)
+#define IEEE_G            (1<<2)
+#define IEEE_MODE_MASK    (IEEE_A|IEEE_B|IEEE_G)
+
+extern __inline int ieee80211_is_empty_essid(const char *essid, int essid_len)
+{
+	/* Single white space is for Linksys APs */
+	if (essid_len == 1 && essid[0] == ' ')
+		return 1;
+
+	/* Otherwise, if the entire essid is 0, we assume it is hidden */
+	while (essid_len) {
+		essid_len--;
+		if (essid[essid_len] != '\0')
+			return 0;
+	}
+
+	return 1;
+}
+
+extern __inline int ieee80211_get_hdrlen(u16 fc)
+{
+	int hdrlen = 24;
+
+	switch (WLAN_FC_GET_TYPE(fc)) {
+	case IEEE80211_FTYPE_DATA:
+		if (fc & IEEE80211_QOS_DATAGRP)
+			hdrlen += 2;
+		if ((fc & IEEE80211_FCTL_FROMDS) && (fc & IEEE80211_FCTL_TODS))
+			hdrlen += 6; /* Addr4 */
+		break;
+	case IEEE80211_FTYPE_CTL:
+		switch (WLAN_FC_GET_STYPE(fc)) {
+		case IEEE80211_STYPE_CTS:
+		case IEEE80211_STYPE_ACK:
+			hdrlen = 10;
+			break;
+		default:
+			hdrlen = 16;
+			break;
+		}
+		break;
+	}
+
+	return hdrlen;
+}
+
+#if 0
+/* Action frame categories (IEEE 802.11-2007, 7.3.1.11, Table 7-24) */
+#define WLAN_ACTION_SPECTRUM_MGMT 0
+#define WLAN_ACTION_QOS 1
+#define WLAN_ACTION_DLS 2
+#define WLAN_ACTION_BLOCK_ACK 3
+#define WLAN_ACTION_RADIO_MEASUREMENT 5
+#define WLAN_ACTION_FT 6
+#define WLAN_ACTION_SA_QUERY 8
+#define WLAN_ACTION_WMM 17
+#endif
+
+
+/* Action category code */
+enum ieee80211_category {
+	WLAN_CATEGORY_SPECTRUM_MGMT = 0,
+	WLAN_CATEGORY_QOS = 1,
+	WLAN_CATEGORY_DLS = 2,
+	WLAN_CATEGORY_BACK = 3,
+	WLAN_CATEGORY_PUBLIC = 4, //IEEE 802.11 public action frames
+	WLAN_CATEGORY_RADIO_MEASUREMENT  = 5,
+	WLAN_CATEGORY_FT = 6,
+	WLAN_CATEGORY_HT = 7,
+	WLAN_CATEGORY_SA_QUERY = 8,
+	WLAN_CATEGORY_TDLS = 12,
+	WLAN_CATEGORY_WMM = 17,
+	WLAN_CATEGORY_P2P = 0x7f,//P2P action frames
+};
+
+/* SPECTRUM_MGMT action code */
+enum ieee80211_spectrum_mgmt_actioncode {
+	WLAN_ACTION_SPCT_MSR_REQ = 0,
+	WLAN_ACTION_SPCT_MSR_RPRT = 1,
+	WLAN_ACTION_SPCT_TPC_REQ = 2,
+	WLAN_ACTION_SPCT_TPC_RPRT = 3,
+	WLAN_ACTION_SPCT_CHL_SWITCH = 4,
+	WLAN_ACTION_SPCT_EXT_CHL_SWITCH = 5,
+};
+
+enum _PUBLIC_ACTION{
+	ACT_PUBLIC_BSSCOEXIST = 0, // 20/40 BSS Coexistence
+	ACT_PUBLIC_MP = 7, // Measurement Pilot
+	ACT_PUBLIC_P2P = 9, // WIFI_DIRECT
+};
+
+#ifdef CONFIG_TDLS
+enum TDLS_ACTION_FIELD{
+	TDLS_SETUP_REQUEST = 0,
+	TDLS_SETUP_RESPONSE = 1,
+	TDLS_SETUP_CONFIRM = 2,
+	TDLS_TEARDOWN = 3,
+	TDLS_PEER_TRAFFIC_INDICATION = 4,
+	TDLS_CHANNEL_SWITCH_REQUEST = 5,
+	TDLS_CHANNEL_SWITCH_RESPONSE = 6,
+	TDLS_PEER_PSM_REQUEST = 7,
+	TDLS_PEER_PSM_RESPONSE = 8,
+	TDLS_PEER_TRAFFIC_RESPONSE = 9,
+	TDLS_DISCOVERY_REQUEST = 10,
+	TDLS_DISCOVERY_RESPONSE = 14,	//it's used in public action frame
+};
+#endif
+
+/* BACK action code */
+enum ieee80211_back_actioncode {
+	WLAN_ACTION_ADDBA_REQ = 0,
+	WLAN_ACTION_ADDBA_RESP = 1,
+	WLAN_ACTION_DELBA = 2,
+};
+
+/* HT features action code */
+enum ieee80211_ht_actioncode {
+	WLAN_ACTION_NOTIFY_CH_WIDTH = 0,
+       WLAN_ACTION_SM_PS = 1,
+       WLAN_ACTION_PSPM = 2,
+       WLAN_ACTION_PCO_PHASE = 3,
+       WLAN_ACTION_MIMO_CSI_MX = 4,
+       WLAN_ACTION_MIMO_NONCP_BF = 5,
+       WLAN_ACTION_MIMP_CP_BF = 6,
+       WLAN_ACTION_ASEL_INDICATES_FB = 7,
+       WLAN_ACTION_HI_INFO_EXCHG = 8,
+};
+
+/* BACK (block-ack) parties */
+enum ieee80211_back_parties {
+	WLAN_BACK_RECIPIENT = 0,
+	WLAN_BACK_INITIATOR = 1,
+	WLAN_BACK_TIMER = 2,
+};
+
+
+#define OUI_MICROSOFT 0x0050f2 /* Microsoft (also used in Wi-Fi specs)
+				* 00:50:F2 */
+
+#define WME_OUI_TYPE 2
+#define WME_OUI_SUBTYPE_INFORMATION_ELEMENT 0
+#define WME_OUI_SUBTYPE_PARAMETER_ELEMENT 1
+#define WME_OUI_SUBTYPE_TSPEC_ELEMENT 2
+#define WME_VERSION 1
+
+#define WME_ACTION_CODE_SETUP_REQUEST 0
+#define WME_ACTION_CODE_SETUP_RESPONSE 1
+#define WME_ACTION_CODE_TEARDOWN 2
+
+#define WME_SETUP_RESPONSE_STATUS_ADMISSION_ACCEPTED 0
+#define WME_SETUP_RESPONSE_STATUS_INVALID_PARAMETERS 1
+#define WME_SETUP_RESPONSE_STATUS_REFUSED 3
+
+#define WME_TSPEC_DIRECTION_UPLINK 0
+#define WME_TSPEC_DIRECTION_DOWNLINK 1
+#define WME_TSPEC_DIRECTION_BI_DIRECTIONAL 3
+
+
+#define OUI_BROADCOM 0x00904c /* Broadcom (Epigram) */
+
+#define VENDOR_HT_CAPAB_OUI_TYPE 0x33 /* 00-90-4c:0x33 */
+
+/* Parsed Information Elements */
+struct ieee802_11_elems {
+	u8 *ssid;
+	u8 ssid_len;
+	u8 *supp_rates;
+	u8 supp_rates_len;
+	u8 *fh_params;
+	u8 fh_params_len;
+	u8 *ds_params;
+	u8 ds_params_len;
+	u8 *cf_params;
+	u8 cf_params_len;
+	u8 *tim;
+	u8 tim_len;
+	u8 *ibss_params;
+	u8 ibss_params_len;
+	u8 *challenge;
+	u8 challenge_len;
+	u8 *erp_info;
+	u8 erp_info_len;
+	u8 *ext_supp_rates;
+	u8 ext_supp_rates_len;
+	u8 *wpa_ie;
+	u8 wpa_ie_len;
+	u8 *rsn_ie;
+	u8 rsn_ie_len;
+	u8 *wme;
+	u8 wme_len;
+	u8 *wme_tspec;
+	u8 wme_tspec_len;
+	u8 *wps_ie;
+	u8 wps_ie_len;
+	u8 *power_cap;
+	u8 power_cap_len;
+	u8 *supp_channels;
+	u8 supp_channels_len;
+	u8 *mdie;
+	u8 mdie_len;
+	u8 *ftie;
+	u8 ftie_len;
+	u8 *timeout_int;
+	u8 timeout_int_len;
+	u8 *ht_capabilities;
+	u8 ht_capabilities_len;
+	u8 *ht_operation;
+	u8 ht_operation_len;
+	u8 *vendor_ht_cap;
+	u8 vendor_ht_cap_len;
+};
+
+typedef enum { ParseOK = 0, ParseUnknown = 1, ParseFailed = -1 } ParseRes;
+
+ParseRes rtw_ieee802_11_parse_elems(u8 *start, uint len,
+				struct ieee802_11_elems *elems,
+				int show_errors);
+
+u8 *rtw_set_fixed_ie(unsigned char *pbuf, unsigned int len, unsigned char *source, unsigned int *frlen);
+u8 *rtw_set_ie(u8 *pbuf, sint index, uint len, u8 *source, uint *frlen);
+u8 *rtw_get_ie(u8*pbuf, sint index, sint *len, sint limit);
+void rtw_set_supported_rate(u8* SupportedRates, uint mode) ;
+
+unsigned char *rtw_get_wpa_ie(unsigned char *pie, int *wpa_ie_len, int limit);
+unsigned char *rtw_get_wpa2_ie(unsigned char *pie, int *rsn_ie_len, int limit);
+int rtw_get_wpa_cipher_suite(u8 *s);
+int rtw_get_wpa2_cipher_suite(u8 *s);
+int rtw_parse_wpa_ie(u8* wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwise_cipher);
+int rtw_parse_wpa2_ie(u8* wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwise_cipher);
+
+int rtw_get_sec_ie(u8 *in_ie,uint in_len,u8 *rsn_ie,u16 *rsn_len,u8 *wpa_ie,u16 *wpa_len);
+u8 *rtw_get_wps_ie(u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps_ielen);
+u8 rtw_is_wps_ie(u8 *ie_ptr, uint *wps_ielen);
+
+int rtw_get_p2p_ie(u8 *in_ie, uint in_len, u8 *p2p_ie, uint *p2p_ielen);
+int rtw_get_p2p_attr_content(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id ,u8 *attr_content, uint *attr_contentlen);
+u32 rtw_set_p2p_attr_content(u8 *pbuf, u8 attr_id, u16 attr_len, u8 *pdata_attr);
+int rtw_get_wps_attr_content(u8 *wps_ie, uint wps_ielen, u16 target_attr_id ,u8 *attr_content, uint *attr_contentlen);
+int rtw_get_wps_ie_p2p(u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps_ielen);
+#ifdef CONFIG_WFD
+int rtw_get_wfd_ie(u8 *in_ie, uint in_len, u8 *wfd_ie, uint *wfd_ielen);
+int rtw_get_wfd_attr_content(u8 *wfd_ie, uint wfd_ielen, u8 target_attr_id ,u8 *attr_content, uint *attr_contentlen);
+#endif // CONFIG_WFD
+
+uint	rtw_get_rateset_len(u8	*rateset);
+
+struct registry_priv;
+int rtw_generate_ie(struct registry_priv *pregistrypriv);
+
+
+int rtw_get_bit_value_from_ieee_value(u8 val);
+
+uint	rtw_is_cckrates_included(u8 *rate);
+
+uint	rtw_is_cckratesonly_included(u8 *rate);
+
+int rtw_check_network_type(unsigned char *rate, int ratelen, int channel);
+
+void rtw_macaddr_cfg(u8 *mac_addr);
+#endif /* IEEE80211_H */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/if_ether.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/if_ether.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/if_ether.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/if_ether.h	2017-09-23 03:42:50.034675015 +0800
@@ -0,0 +1,112 @@
+/*
+ * INET		An implementation of the TCP/IP protocol suite for the LINUX
+ *		operating system.  INET is implemented using the  BSD Socket
+ *		interface as the means of communication with the user level.
+ *
+ *		Global definitions for the Ethernet IEEE 802.3 interface.
+ *
+ * Version:	@(#)if_ether.h	1.0.1a	02/08/94
+ *
+ * Author:	Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG>
+ *		Donald Becker, <becker@super.org>
+ *		Alan Cox, <alan@redhat.com>
+ *		Steve Whitehouse, <gw7rrm@eeshack3.swan.ac.uk>
+ *
+ *		This program is free software; you can redistribute it and/or
+ *		modify it under the terms of the GNU General Public License
+ *		as published by the Free Software Foundation; either version
+ *		2 of the License, or (at your option) any later version.
+ */
+ 
+#ifndef _LINUX_IF_ETHER_H
+#define _LINUX_IF_ETHER_H
+
+/*
+ *	IEEE 802.3 Ethernet magic constants.  The frame sizes omit the preamble
+ *	and FCS/CRC (frame check sequence). 
+ */
+
+#define ETH_ALEN	6		/* Octets in one ethernet addr	 */
+#define ETH_HLEN	14		/* Total octets in header.	 */
+#define ETH_ZLEN	60		/* Min. octets in frame sans FCS */
+#define ETH_DATA_LEN	1500		/* Max. octets in payload	 */
+#define ETH_FRAME_LEN	1514		/* Max. octets in frame sans FCS */
+
+/*
+ *	These are the defined Ethernet Protocol ID's.
+ */
+
+#define ETH_P_LOOP	0x0060		/* Ethernet Loopback packet	*/
+#define ETH_P_PUP	0x0200		/* Xerox PUP packet		*/
+#define ETH_P_PUPAT	0x0201		/* Xerox PUP Addr Trans packet	*/
+#define ETH_P_IP	0x0800		/* Internet Protocol packet	*/
+#define ETH_P_X25	0x0805		/* CCITT X.25			*/
+#define ETH_P_ARP	0x0806		/* Address Resolution packet	*/
+#define	ETH_P_BPQ	0x08FF		/* G8BPQ AX.25 Ethernet Packet	[ NOT AN OFFICIALLY REGISTERED ID ] */
+#define ETH_P_IEEEPUP	0x0a00		/* Xerox IEEE802.3 PUP packet */
+#define ETH_P_IEEEPUPAT	0x0a01		/* Xerox IEEE802.3 PUP Addr Trans packet */
+#define ETH_P_DEC       0x6000          /* DEC Assigned proto           */
+#define ETH_P_DNA_DL    0x6001          /* DEC DNA Dump/Load            */
+#define ETH_P_DNA_RC    0x6002          /* DEC DNA Remote Console       */
+#define ETH_P_DNA_RT    0x6003          /* DEC DNA Routing              */
+#define ETH_P_LAT       0x6004          /* DEC LAT                      */
+#define ETH_P_DIAG      0x6005          /* DEC Diagnostics              */
+#define ETH_P_CUST      0x6006          /* DEC Customer use             */
+#define ETH_P_SCA       0x6007          /* DEC Systems Comms Arch       */
+#define ETH_P_RARP      0x8035		/* Reverse Addr Res packet	*/
+#define ETH_P_ATALK	0x809B		/* Appletalk DDP		*/
+#define ETH_P_AARP	0x80F3		/* Appletalk AARP		*/
+#define ETH_P_8021Q	0x8100          /* 802.1Q VLAN Extended Header  */
+#define ETH_P_IPX	0x8137		/* IPX over DIX			*/
+#define ETH_P_IPV6	0x86DD		/* IPv6 over bluebook		*/
+#define ETH_P_PPP_DISC	0x8863		/* PPPoE discovery messages     */
+#define ETH_P_PPP_SES	0x8864		/* PPPoE session messages	*/
+#define ETH_P_ATMMPOA	0x884c		/* MultiProtocol Over ATM	*/
+#define ETH_P_ATMFATE	0x8884		/* Frame-based ATM Transport
+					 * over Ethernet
+					 */
+
+/*
+ *	Non DIX types. Won't clash for 1500 types.
+ */
+ 
+#define ETH_P_802_3	0x0001		/* Dummy type for 802.3 frames  */
+#define ETH_P_AX25	0x0002		/* Dummy protocol id for AX.25  */
+#define ETH_P_ALL	0x0003		/* Every packet (be careful!!!) */
+#define ETH_P_802_2	0x0004		/* 802.2 frames 		*/
+#define ETH_P_SNAP	0x0005		/* Internal only		*/
+#define ETH_P_DDCMP     0x0006          /* DEC DDCMP: Internal only     */
+#define ETH_P_WAN_PPP   0x0007          /* Dummy type for WAN PPP frames*/
+#define ETH_P_PPP_MP    0x0008          /* Dummy type for PPP MP frames */
+#define ETH_P_LOCALTALK 0x0009		/* Localtalk pseudo type 	*/
+#define ETH_P_PPPTALK	0x0010		/* Dummy type for Atalk over PPP*/
+#define ETH_P_TR_802_2	0x0011		/* 802.2 frames 		*/
+#define ETH_P_MOBITEX	0x0015		/* Mobitex (kaz@cafe.net)	*/
+#define ETH_P_CONTROL	0x0016		/* Card specific control frames */
+#define ETH_P_IRDA	0x0017		/* Linux-IrDA			*/
+#define ETH_P_ECONET	0x0018		/* Acorn Econet			*/
+
+/*
+ *	This is an Ethernet frame header.
+ */
+ 
+struct ethhdr 
+{
+	unsigned char	h_dest[ETH_ALEN];	/* destination eth addr	*/
+	unsigned char	h_source[ETH_ALEN];	/* source ether addr	*/
+	unsigned short	h_proto;		/* packet type ID field	*/
+};
+
+struct _vlan {
+   unsigned short       h_vlan_TCI;                // Encapsulates priority and VLAN ID
+   unsigned short       h_vlan_encapsulated_proto;
+};
+
+
+
+#define get_vlan_id(pvlan) ((ntohs((unsigned short )pvlan->h_vlan_TCI)) & 0xfff)
+#define get_vlan_priority(pvlan) ((ntohs((unsigned short )pvlan->h_vlan_TCI))>>13)
+#define get_vlan_encap_proto(pvlan) (ntohs((unsigned short )pvlan->h_vlan_encapsulated_proto))
+
+
+#endif	/* _LINUX_IF_ETHER_H */
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/ip.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/ip.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/ip.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/ip.h	2017-09-23 03:42:50.034675015 +0800
@@ -0,0 +1,138 @@
+/*
+ * INET		An implementation of the TCP/IP protocol suite for the LINUX
+ *		operating system.  INET is implemented using the  BSD Socket
+ *		interface as the means of communication with the user level.
+ *
+ *		Definitions for the IP protocol.
+ *
+ * Version:	@(#)ip.h	1.0.2	04/28/93
+ *
+ * Authors:	Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG>
+ *
+ *		This program is free software; you can redistribute it and/or
+ *		modify it under the terms of the GNU General Public License
+ *		as published by the Free Software Foundation; either version
+ *		2 of the License, or (at your option) any later version.
+ */
+#ifndef _LINUX_IP_H
+#define _LINUX_IP_H
+#include <rtw_byteorder.h>
+
+/* SOL_IP socket options */
+
+#define IPTOS_TOS_MASK		0x1E
+#define IPTOS_TOS(tos)		((tos)&IPTOS_TOS_MASK)
+#define	IPTOS_LOWDELAY		0x10
+#define	IPTOS_THROUGHPUT	0x08
+#define	IPTOS_RELIABILITY	0x04
+#define	IPTOS_MINCOST		0x02
+
+#define IPTOS_PREC_MASK		0xE0
+#define IPTOS_PREC(tos)		((tos)&IPTOS_PREC_MASK)
+#define IPTOS_PREC_NETCONTROL           0xe0
+#define IPTOS_PREC_INTERNETCONTROL      0xc0
+#define IPTOS_PREC_CRITIC_ECP           0xa0
+#define IPTOS_PREC_FLASHOVERRIDE        0x80
+#define IPTOS_PREC_FLASH                0x60
+#define IPTOS_PREC_IMMEDIATE            0x40
+#define IPTOS_PREC_PRIORITY             0x20
+#define IPTOS_PREC_ROUTINE              0x00
+
+
+/* IP options */
+#define IPOPT_COPY		0x80
+#define IPOPT_CLASS_MASK	0x60
+#define IPOPT_NUMBER_MASK	0x1f
+
+#define	IPOPT_COPIED(o)		((o)&IPOPT_COPY)
+#define	IPOPT_CLASS(o)		((o)&IPOPT_CLASS_MASK)
+#define	IPOPT_NUMBER(o)		((o)&IPOPT_NUMBER_MASK)
+
+#define	IPOPT_CONTROL		0x00
+#define	IPOPT_RESERVED1		0x20
+#define	IPOPT_MEASUREMENT	0x40
+#define	IPOPT_RESERVED2		0x60
+
+#define IPOPT_END	(0 |IPOPT_CONTROL)
+#define IPOPT_NOOP	(1 |IPOPT_CONTROL)
+#define IPOPT_SEC	(2 |IPOPT_CONTROL|IPOPT_COPY)
+#define IPOPT_LSRR	(3 |IPOPT_CONTROL|IPOPT_COPY)
+#define IPOPT_TIMESTAMP	(4 |IPOPT_MEASUREMENT)
+#define IPOPT_RR	(7 |IPOPT_CONTROL)
+#define IPOPT_SID	(8 |IPOPT_CONTROL|IPOPT_COPY)
+#define IPOPT_SSRR	(9 |IPOPT_CONTROL|IPOPT_COPY)
+#define IPOPT_RA	(20|IPOPT_CONTROL|IPOPT_COPY)
+
+#define IPVERSION	4
+#define MAXTTL		255
+#define IPDEFTTL	64
+
+/* struct timestamp, struct route and MAX_ROUTES are removed.
+
+   REASONS: it is clear that nobody used them because:
+   - MAX_ROUTES value was wrong.
+   - "struct route" was wrong.
+   - "struct timestamp" had fatally misaligned bitfields and was completely unusable.
+ */
+
+#define IPOPT_OPTVAL 0
+#define IPOPT_OLEN   1
+#define IPOPT_OFFSET 2
+#define IPOPT_MINOFF 4
+#define MAX_IPOPTLEN 40
+#define IPOPT_NOP IPOPT_NOOP
+#define IPOPT_EOL IPOPT_END
+#define IPOPT_TS  IPOPT_TIMESTAMP
+
+#define	IPOPT_TS_TSONLY		0		/* timestamps only */
+#define	IPOPT_TS_TSANDADDR	1		/* timestamps and addresses */
+#define	IPOPT_TS_PRESPEC	3		/* specified modules only */
+
+#ifdef PLATFORM_LINUX
+
+struct ip_options {
+  __u32		faddr;				/* Saved first hop address */
+  unsigned char	optlen;
+  unsigned char srr;
+  unsigned char rr;
+  unsigned char ts;
+  unsigned char is_setbyuser:1,			/* Set by setsockopt?			*/
+                is_data:1,			/* Options in __data, rather than skb	*/
+                is_strictroute:1,		/* Strict source route			*/
+                srr_is_hit:1,			/* Packet destination addr was our one	*/
+                is_changed:1,			/* IP checksum more not valid		*/	
+                rr_needaddr:1,			/* Need to record addr of outgoing dev	*/
+                ts_needtime:1,			/* Need to record timestamp		*/
+                ts_needaddr:1;			/* Need to record addr of outgoing dev  */
+  unsigned char router_alert;
+  unsigned char __pad1;
+  unsigned char __pad2;
+  unsigned char __data[0];
+};
+
+#define optlength(opt) (sizeof(struct ip_options) + opt->optlen)
+#endif
+
+struct iphdr {
+#if defined(__LITTLE_ENDIAN_BITFIELD)
+	__u8	ihl:4,
+		version:4;
+#elif defined (__BIG_ENDIAN_BITFIELD)
+	__u8	version:4,
+  		ihl:4;
+#else
+#error	"Please fix <asm/byteorder.h>"
+#endif
+	__u8	tos;
+	__u16	tot_len;
+	__u16	id;
+	__u16	frag_off;
+	__u8	ttl;
+	__u8	protocol;
+	__u16	check;
+	__u32	saddr;
+	__u32	daddr;
+	/*The options start here. */
+};
+
+#endif	/* _LINUX_IP_H */
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/mlme_osdep.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/mlme_osdep.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/mlme_osdep.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/mlme_osdep.h	2017-09-23 03:42:50.034675015 +0800
@@ -0,0 +1,43 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef	__MLME_OSDEP_H_
+#define __MLME_OSDEP_H_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+#if defined(PLATFORM_WINDOWS) || defined(PLATFORM_MPIXEL)
+extern int time_after(u32 now, u32 old);
+#endif
+
+extern void rtw_init_mlme_timer(_adapter *padapter);
+extern void rtw_os_indicate_disconnect( _adapter *adapter );
+extern void rtw_os_indicate_connect( _adapter *adapter );
+extern void rtw_report_sec_ie(_adapter *adapter,u8 authmode,u8 *sec_ie);
+
+#ifdef CONFIG_AP_MODE
+void rtw_indicate_sta_assoc_event(_adapter *padapter, struct sta_info *psta);
+void rtw_indicate_sta_disassoc_event(_adapter *padapter, struct sta_info *psta);
+#endif
+void rtw_reset_securitypriv( _adapter *adapter );
+
+#endif	//_MLME_OSDEP_H_
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/mp_custom_oid.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/mp_custom_oid.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/mp_custom_oid.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/mp_custom_oid.h	2017-09-23 03:42:50.034675015 +0800
@@ -0,0 +1,353 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef	__CUSTOM_OID_H
+#define __CUSTOM_OID_H
+
+// by Owen
+// 0xFF818000 - 0xFF81802F		RTL8180 Mass Production Kit
+// 0xFF818500 - 0xFF81850F		RTL8185 Setup Utility
+// 0xFF818580 - 0xFF81858F		RTL8185 Phy Status Utility
+
+//
+
+// by Owen for Production Kit
+// For Production Kit with Agilent Equipments
+// in order to make our custom oids hopefully somewhat unique
+// we will use 0xFF (indicating implementation specific OID)
+//               81(first byte of non zero Realtek unique identifier)
+//               80 (second byte of non zero Realtek unique identifier)
+//               XX (the custom OID number - providing 255 possible custom oids)
+
+#define OID_RT_PRO_RESET_DUT				0xFF818000
+#define OID_RT_PRO_SET_DATA_RATE			0xFF818001
+#define OID_RT_PRO_START_TEST				0xFF818002
+#define OID_RT_PRO_STOP_TEST    			0xFF818003
+#define OID_RT_PRO_SET_PREAMBLE				0xFF818004
+#define OID_RT_PRO_SET_SCRAMBLER			0xFF818005
+#define OID_RT_PRO_SET_FILTER_BB			0xFF818006
+#define OID_RT_PRO_SET_MANUAL_DIVERSITY_BB		0xFF818007
+#define OID_RT_PRO_SET_CHANNEL_DIRECT_CALL		0xFF818008
+#define OID_RT_PRO_SET_SLEEP_MODE_DIRECT_CALL		0xFF818009
+#define OID_RT_PRO_SET_WAKE_MODE_DIRECT_CALL		0xFF81800A
+
+#define OID_RT_PRO_SET_TX_ANTENNA_BB			0xFF81800D
+#define OID_RT_PRO_SET_ANTENNA_BB			0xFF81800E
+#define OID_RT_PRO_SET_CR_SCRAMBLER			0xFF81800F
+#define OID_RT_PRO_SET_CR_NEW_FILTER			0xFF818010
+#define OID_RT_PRO_SET_TX_POWER_CONTROL			0xFF818011
+#define OID_RT_PRO_SET_CR_TX_CONFIG			0xFF818012
+#define OID_RT_PRO_GET_TX_POWER_CONTROL			0xFF818013
+#define OID_RT_PRO_GET_CR_SIGNAL_QUALITY		0xFF818014
+#define OID_RT_PRO_SET_CR_SETPOINT			0xFF818015
+#define OID_RT_PRO_SET_INTEGRATOR			0xFF818016
+#define OID_RT_PRO_SET_SIGNAL_QUALITY			0xFF818017
+#define OID_RT_PRO_GET_INTEGRATOR			0xFF818018
+#define OID_RT_PRO_GET_SIGNAL_QUALITY			0xFF818019
+#define OID_RT_PRO_QUERY_EEPROM_TYPE			0xFF81801A
+#define OID_RT_PRO_WRITE_MAC_ADDRESS			0xFF81801B
+#define OID_RT_PRO_READ_MAC_ADDRESS			0xFF81801C
+#define OID_RT_PRO_WRITE_CIS_DATA			0xFF81801D
+#define OID_RT_PRO_READ_CIS_DATA			0xFF81801E
+#define OID_RT_PRO_WRITE_POWER_CONTROL			0xFF81801F
+#define OID_RT_PRO_READ_POWER_CONTROL			0xFF818020
+#define OID_RT_PRO_WRITE_EEPROM				0xFF818021
+#define OID_RT_PRO_READ_EEPROM				0xFF818022
+#define OID_RT_PRO_RESET_TX_PACKET_SENT			0xFF818023
+#define OID_RT_PRO_QUERY_TX_PACKET_SENT			0xFF818024
+#define OID_RT_PRO_RESET_RX_PACKET_RECEIVED		0xFF818025 
+#define OID_RT_PRO_QUERY_RX_PACKET_RECEIVED		0xFF818026
+#define OID_RT_PRO_QUERY_RX_PACKET_CRC32_ERROR		0xFF818027
+#define OID_RT_PRO_QUERY_CURRENT_ADDRESS		0xFF818028
+#define OID_RT_PRO_QUERY_PERMANENT_ADDRESS		0xFF818029
+#define OID_RT_PRO_SET_PHILIPS_RF_PARAMETERS		0xFF81802A
+#define OID_RT_PRO_RECEIVE_PACKET			0xFF81802C
+// added by Owen on 04/08/03 for Cameo's request
+#define OID_RT_PRO_WRITE_EEPROM_BYTE			0xFF81802D
+#define OID_RT_PRO_READ_EEPROM_BYTE			0xFF81802E
+#define OID_RT_PRO_SET_MODULATION			0xFF81802F
+//
+
+//Sean		
+#define OID_RT_DRIVER_OPTION				0xFF818080
+#define OID_RT_RF_OFF					0xFF818081
+#define OID_RT_AUTH_STATUS				0xFF818082
+
+//========================================================================
+#define OID_RT_PRO_SET_CONTINUOUS_TX			0xFF81800B
+#define OID_RT_PRO_SET_SINGLE_CARRIER_TX		0xFF81800C
+#define OID_RT_PRO_SET_CARRIER_SUPPRESSION_TX		0xFF81802B
+#define OID_RT_PRO_SET_SINGLE_TONE_TX			0xFF818043
+//========================================================================
+
+
+// by Owen for RTL8185 Phy Status Report Utility
+#define OID_RT_UTILITY_FALSE_ALARM_COUNTERS				0xFF818580
+#define OID_RT_UTILITY_SELECT_DEBUG_MODE				0xFF818581
+#define OID_RT_UTILITY_SELECT_SUBCARRIER_NUMBER				0xFF818582
+#define OID_RT_UTILITY_GET_RSSI_STATUS					0xFF818583
+#define OID_RT_UTILITY_GET_FRAME_DETECTION_STATUS			0xFF818584
+#define OID_RT_UTILITY_GET_AGC_AND_FREQUENCY_OFFSET_ESTIMATION_STATUS	0xFF818585
+#define OID_RT_UTILITY_GET_CHANNEL_ESTIMATION_STATUS			0xFF818586
+//
+
+// by Owen on 03/09/19-03/09/22 for RTL8185
+#define OID_RT_WIRELESS_MODE				0xFF818500
+#define OID_RT_SUPPORTED_RATES				0xFF818501
+#define OID_RT_DESIRED_RATES				0xFF818502
+#define OID_RT_WIRELESS_MODE_STARTING_ADHOC		0xFF818503
+//
+
+#define OID_RT_GET_CONNECT_STATE                	0xFF030001
+#define OID_RT_RESCAN	                        	0xFF030002
+#define OID_RT_SET_KEY_LENGTH				0xFF030003
+#define OID_RT_SET_DEFAULT_KEY_ID			0xFF030004
+
+#define OID_RT_SET_CHANNEL				0xFF010182
+#define OID_RT_SET_SNIFFER_MODE                 	0xFF010183
+#define OID_RT_GET_SIGNAL_QUALITY               	0xFF010184
+#define OID_RT_GET_SMALL_PACKET_CRC			0xFF010185		
+#define OID_RT_GET_MIDDLE_PACKET_CRC			0xFF010186
+#define OID_RT_GET_LARGE_PACKET_CRC			0xFF010187
+#define OID_RT_GET_TX_RETRY				0xFF010188
+#define OID_RT_GET_RX_RETRY				0xFF010189
+#define OID_RT_PRO_SET_FW_DIG_STATE			0xFF01018A//S
+#define OID_RT_PRO_SET_FW_RA_STATE			0xFF01018B//S
+
+#define OID_RT_GET_RX_TOTAL_PACKET			0xFF010190
+#define OID_RT_GET_TX_BEACON_OK				0xFF010191
+#define OID_RT_GET_TX_BEACON_ERR			0xFF010192
+#define OID_RT_GET_RX_ICV_ERR				0xFF010193
+#define OID_RT_SET_ENCRYPTION_ALGORITHM			0xFF010194
+#define OID_RT_SET_NO_AUTO_RESCAN			0xFF010195
+#define OID_RT_GET_PREAMBLE_MODE			0xFF010196
+#define OID_RT_GET_DRIVER_UP_DELTA_TIME			0xFF010197
+#define OID_RT_GET_AP_IP				0xFF010198
+#define OID_RT_GET_CHANNELPLAN				0xFF010199
+#define OID_RT_SET_PREAMBLE_MODE			0xFF01019A
+#define OID_RT_SET_BCN_INTVL				0xFF01019B
+#define OID_RT_GET_RF_VENDER				0xFF01019C
+#define OID_RT_DEDICATE_PROBE				0xFF01019D
+#define OID_RT_PRO_RX_FILTER_PATTERN			0xFF01019E
+
+#define OID_RT_GET_DCST_CURRENT_THRESHOLD		0xFF01019F
+
+#define OID_RT_GET_CCA_ERR				0xFF0101A0
+#define OID_RT_GET_CCA_UPGRADE_THRESHOLD		0xFF0101A1
+#define OID_RT_GET_CCA_FALLBACK_THRESHOLD		0xFF0101A2
+
+#define OID_RT_GET_CCA_UPGRADE_EVALUATE_TIMES		0xFF0101A3
+#define OID_RT_GET_CCA_FALLBACK_EVALUATE_TIMES		0xFF0101A4
+
+// by Owen on 03/31/03 for Cameo's request
+#define OID_RT_SET_RATE_ADAPTIVE			0xFF0101A5
+//
+#define OID_RT_GET_DCST_EVALUATE_PERIOD			0xFF0101A5
+#define OID_RT_GET_DCST_TIME_UNIT_INDEX			0xFF0101A6
+#define OID_RT_GET_TOTAL_TX_BYTES			0xFF0101A7
+#define OID_RT_GET_TOTAL_RX_BYTES			0xFF0101A8
+#define OID_RT_CURRENT_TX_POWER_LEVEL			0xFF0101A9
+#define OID_RT_GET_ENC_KEY_MISMATCH_COUNT		0xFF0101AA
+#define OID_RT_GET_ENC_KEY_MATCH_COUNT			0xFF0101AB
+#define OID_RT_GET_CHANNEL				0xFF0101AC
+
+#define OID_RT_SET_CHANNELPLAN				0xFF0101AD
+#define OID_RT_GET_HARDWARE_RADIO_OFF			0xFF0101AE
+#define OID_RT_CHANNELPLAN_BY_COUNTRY			0xFF0101AF
+#define OID_RT_SCAN_AVAILABLE_BSSID			0xFF0101B0
+#define OID_RT_GET_HARDWARE_VERSION			0xFF0101B1
+#define OID_RT_GET_IS_ROAMING				0xFF0101B2
+#define OID_RT_GET_IS_PRIVACY				0xFF0101B3
+#define OID_RT_GET_KEY_MISMATCH				0xFF0101B4
+#define OID_RT_SET_RSSI_ROAM_TRAFFIC_TH			0xFF0101B5
+#define OID_RT_SET_RSSI_ROAM_SIGNAL_TH			0xFF0101B6
+#define OID_RT_RESET_LOG				0xFF0101B7
+#define OID_RT_GET_LOG					0xFF0101B8
+#define OID_RT_SET_INDICATE_HIDDEN_AP			0xFF0101B9
+#define OID_RT_GET_HEADER_FAIL				0xFF0101BA
+#define OID_RT_SUPPORTED_WIRELESS_MODE			0xFF0101BB
+#define OID_RT_GET_CHANNEL_LIST				0xFF0101BC
+#define OID_RT_GET_SCAN_IN_PROGRESS			0xFF0101BD
+#define OID_RT_GET_TX_INFO				0xFF0101BE
+#define OID_RT_RF_READ_WRITE_OFFSET			0xFF0101BF
+#define OID_RT_RF_READ_WRITE				0xFF0101C0
+
+// For Netgear request. 2005.01.13, by rcnjko.
+#define OID_RT_FORCED_DATA_RATE				0xFF0101C1
+#define OID_RT_WIRELESS_MODE_FOR_SCAN_LIST		0xFF0101C2
+// For Netgear request. 2005.02.17, by rcnjko.
+#define OID_RT_GET_BSS_WIRELESS_MODE			0xFF0101C3
+// For AZ project. 2005.06.27, by rcnjko.
+#define OID_RT_SCAN_WITH_MAGIC_PACKET			0xFF0101C4
+
+// Vincent 8185MP
+#define OID_RT_PRO_RX_FILTER				0xFF0111C0
+
+//Andy TEST
+//#define OID_RT_PRO_WRITE_REGISTRY			0xFF0111C1
+//#define OID_RT_PRO_READ_REGISTRY			0xFF0111C2
+#define OID_CE_USB_WRITE_REGISTRY			0xFF0111C1
+#define OID_CE_USB_READ_REGISTRY			0xFF0111C2
+
+
+#define OID_RT_PRO_SET_INITIAL_GAIN			0xFF0111C3
+#define OID_RT_PRO_SET_BB_RF_STANDBY_MODE		0xFF0111C4
+#define OID_RT_PRO_SET_BB_RF_SHUTDOWN_MODE		0xFF0111C5
+#define OID_RT_PRO_SET_TX_CHARGE_PUMP			0xFF0111C6
+#define OID_RT_PRO_SET_RX_CHARGE_PUMP			0xFF0111C7
+#define OID_RT_PRO_RF_WRITE_REGISTRY			0xFF0111C8
+#define OID_RT_PRO_RF_READ_REGISTRY			0xFF0111C9
+#define OID_RT_PRO_QUERY_RF_TYPE			0xFF0111CA
+
+// AP OID
+#define OID_RT_AP_GET_ASSOCIATED_STATION_LIST		0xFF010300
+#define OID_RT_AP_GET_CURRENT_TIME_STAMP		0xFF010301
+#define OID_RT_AP_SWITCH_INTO_AP_MODE			0xFF010302
+#define OID_RT_AP_SET_DTIM_PERIOD			0xFF010303
+#define OID_RT_AP_SUPPORTED				0xFF010304	// Determine if driver supports AP mode. 2004.08.27, by rcnjko.
+#define OID_RT_AP_SET_PASSPHRASE			0xFF010305	// Set WPA-PSK passphrase into authenticator. 2005.07.08, byrcnjko.
+
+// 8187MP. 2004.09.06, by rcnjko.
+#define OID_RT_PRO8187_WI_POLL				0xFF818780
+#define OID_RT_PRO_WRITE_BB_REG				0xFF818781
+#define OID_RT_PRO_READ_BB_REG				0xFF818782
+#define OID_RT_PRO_WRITE_RF_REG				0xFF818783
+#define OID_RT_PRO_READ_RF_REG				0xFF818784
+
+// Meeting House. added by Annie, 2005-07-20.
+#define OID_RT_MH_VENDER_ID				0xFFEDC100
+
+//8711 MP OID added 20051230.
+#define OID_RT_PRO8711_JOIN_BSS				0xFF871100//S
+
+#define OID_RT_PRO_READ_REGISTER			0xFF871101 //Q
+#define OID_RT_PRO_WRITE_REGISTER			0xFF871102 //S
+
+#define OID_RT_PRO_BURST_READ_REGISTER			0xFF871103 //Q		
+#define OID_RT_PRO_BURST_WRITE_REGISTER 		0xFF871104 //S
+
+#define OID_RT_PRO_WRITE_TXCMD				0xFF871105 //S
+
+#define OID_RT_PRO_READ16_EEPROM			0xFF871106 //Q
+#define OID_RT_PRO_WRITE16_EEPROM			0xFF871107 //S
+
+#define OID_RT_PRO_H2C_SET_COMMAND			0xFF871108 //S
+#define OID_RT_PRO_H2C_QUERY_RESULT			0xFF871109 //Q
+
+#define OID_RT_PRO8711_WI_POLL				0xFF87110A //Q
+#define OID_RT_PRO8711_PKT_LOSS				0xFF87110B //Q
+#define OID_RT_RD_ATTRIB_MEM				0xFF87110C//Q
+#define OID_RT_WR_ATTRIB_MEM				0xFF87110D//S
+
+
+//Method 2 for H2C/C2H
+#define OID_RT_PRO_H2C_CMD_MODE				0xFF871110 //S
+#define OID_RT_PRO_H2C_CMD_RSP_MODE			0xFF871111 //Q
+#define OID_RT_PRO_H2C_CMD_EVENT_MODE			0xFF871112 //S
+#define OID_RT_PRO_WAIT_C2H_EVENT			0xFF871113 //Q
+#define OID_RT_PRO_RW_ACCESS_PROTOCOL_TEST		0xFF871114//Q
+
+#define OID_RT_PRO_SCSI_ACCESS_TEST			0xFF871115 //Q, S
+
+#define OID_RT_PRO_SCSI_TCPIPOFFLOAD_OUT		0xFF871116 //S
+#define OID_RT_PRO_SCSI_TCPIPOFFLOAD_IN			0xFF871117 //Q,S
+#define OID_RT_RRO_RX_PKT_VIA_IOCTRL			0xFF871118 //Q
+#define OID_RT_RRO_RX_PKTARRAY_VIA_IOCTRL		0xFF871119 //Q
+
+#define OID_RT_RPO_SET_PWRMGT_TEST			0xFF87111A //S
+#define OID_RT_PRO_QRY_PWRMGT_TEST			0XFF87111B //Q
+#define OID_RT_RPO_ASYNC_RWIO_TEST			0xFF87111C //S
+#define OID_RT_RPO_ASYNC_RWIO_POLL			0xFF87111D //Q
+#define OID_RT_PRO_SET_RF_INTFS				0xFF87111E //S
+#define OID_RT_POLL_RX_STATUS				0xFF87111F //Q
+
+#define OID_RT_PRO_CFG_DEBUG_MESSAGE			0xFF871120 //Q,S
+#define OID_RT_PRO_SET_DATA_RATE_EX			0xFF871121//S
+#define OID_RT_PRO_SET_BASIC_RATE			0xFF871122//S
+#define OID_RT_PRO_READ_TSSI				0xFF871123//S
+#define OID_RT_PRO_SET_POWER_TRACKING			0xFF871124//S
+
+ 
+#define OID_RT_PRO_QRY_PWRSTATE				0xFF871150 //Q
+#define OID_RT_PRO_SET_PWRSTATE				0xFF871151 //S 
+
+//Method 2 , using workitem
+#define OID_RT_SET_READ_REG				0xFF871181 //S
+#define OID_RT_SET_WRITE_REG				0xFF871182 //S
+#define OID_RT_SET_BURST_READ_REG			0xFF871183 //S
+#define OID_RT_SET_BURST_WRITE_REG			0xFF871184 //S
+#define OID_RT_SET_WRITE_TXCMD				0xFF871185 //S
+#define OID_RT_SET_READ16_EEPROM			0xFF871186 //S
+#define OID_RT_SET_WRITE16_EEPROM			0xFF871187 //S
+#define OID_RT_QRY_POLL_WKITEM				0xFF871188 //Q
+
+//For SDIO INTERFACE only
+#define OID_RT_PRO_SYNCPAGERW_SRAM			0xFF8711A0 //Q, S
+#define OID_RT_PRO_871X_DRV_EXT 			0xFF8711A1
+
+//For USB INTERFACE only
+#define OID_RT_PRO_USB_VENDOR_REQ			0xFF8711B0 //Q, S
+#define OID_RT_PRO_SCSI_AUTO_TEST			0xFF8711B1 //S
+#define OID_RT_PRO_USB_MAC_AC_FIFO_WRITE		0xFF8711B2 //S
+#define OID_RT_PRO_USB_MAC_RX_FIFO_READ			0xFF8711B3 //Q
+#define OID_RT_PRO_USB_MAC_RX_FIFO_POLLING		0xFF8711B4 //Q
+
+#define OID_RT_PRO_H2C_SET_RATE_TABLE			0xFF8711FB //S
+#define OID_RT_PRO_H2C_GET_RATE_TABLE			0xFF8711FC //S
+#define OID_RT_PRO_H2C_C2H_LBK_TEST			0xFF8711FE
+
+#define OID_RT_PRO_ENCRYPTION_CTRL			0xFF871200 //Q, S
+#define OID_RT_PRO_ADD_STA_INFO				0xFF871201 //S
+#define OID_RT_PRO_DELE_STA_INFO    			0xFF871202 //S
+#define OID_RT_PRO_QUERY_DR_VARIABLE   			0xFF871203 //Q
+
+#define OID_RT_PRO_RX_PACKET_TYPE			0xFF871204 //Q, S
+
+#define OID_RT_PRO_READ_EFUSE				0xFF871205 //Q
+#define OID_RT_PRO_WRITE_EFUSE				0xFF871206 //S
+#define OID_RT_PRO_RW_EFUSE_PGPKT			0xFF871207 //Q, S
+#define OID_RT_GET_EFUSE_CURRENT_SIZE			0xFF871208 //Q
+
+#define OID_RT_SET_BANDWIDTH				0xFF871209 //S
+#define OID_RT_SET_CRYSTAL_CAP				0xFF87120A //S
+
+#define OID_RT_SET_RX_PACKET_TYPE    			0xFF87120B //S
+
+#define OID_RT_GET_EFUSE_MAX_SIZE			0xFF87120C //Q
+
+#define OID_RT_PRO_SET_TX_AGC_OFFSET			0xFF87120D //S
+
+#define OID_RT_PRO_SET_PKT_TEST_MODE			0xFF87120E //S
+
+#define OID_RT_PRO_FOR_EVM_TEST_SETTING			0xFF87120F //S
+
+#define OID_RT_PRO_GET_THERMAL_METER			0xFF871210 //Q
+
+#define OID_RT_RESET_PHY_RX_PACKET_COUNT		0xFF871211 //S
+#define OID_RT_GET_PHY_RX_PACKET_RECEIVED		0xFF871212 //Q
+#define OID_RT_GET_PHY_RX_PACKET_CRC32_ERROR		0xFF871213 //Q
+
+#define OID_RT_SET_POWER_DOWN				0xFF871214 //S
+
+#define OID_RT_GET_POWER_MODE				0xFF871215 //Q
+
+#define OID_RT_PRO_EFUSE				0xFF871216 //Q, S
+#define OID_RT_PRO_EFUSE_MAP				0xFF871217 //Q, S
+
+#endif //#ifndef	__CUSTOM_OID_H
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/nic_spec.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/nic_spec.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/nic_spec.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/nic_spec.h	2017-09-23 03:42:50.034675015 +0800
@@ -0,0 +1,47 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/	
+
+
+#ifndef __NIC_SPEC_H__
+#define __NIC_SPEC_H__
+
+#include <drv_conf.h>
+
+#define RTL8711_MCTRL_		(0x20000)
+#define RTL8711_UART_		(0x30000)
+#define RTL8711_TIMER_		(0x40000)
+#define RTL8711_FINT_		(0x50000)
+#define RTL8711_HINT_		(0x50000)
+#define RTL8711_GPIO_		(0x60000)
+#define RTL8711_WLANCTRL_	(0x200000)
+#define RTL8711_WLANFF_		(0xe00000)
+#define RTL8711_HCICTRL_	(0x600000)
+#define RTL8711_SYSCFG_		(0x620000)
+#define RTL8711_SYSCTRL_	(0x620000)
+#define RTL8711_MCCTRL_		(0x020000)
+
+
+#include <rtl8711_regdef.h>
+
+#include <rtl8711_bitdef.h>
+
+
+#endif // __RTL8711_SPEC_H__
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/osdep_ce_service.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/osdep_ce_service.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/osdep_ce_service.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/osdep_ce_service.h	2017-09-23 03:42:50.034675015 +0800
@@ -0,0 +1,171 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+#ifndef __OSDEP_CE_SERVICE_H_
+#define __OSDEP_CE_SERVICE_H_
+
+
+#include <ndis.h>
+#include <ntddndis.h>
+
+#ifdef CONFIG_SDIO_HCI
+#include "SDCardDDK.h"
+#endif
+
+#ifdef CONFIG_USB_HCI
+#include <usbdi.h>
+#endif
+
+typedef HANDLE 	_sema;
+typedef	LIST_ENTRY	_list;
+typedef NDIS_STATUS _OS_STATUS;
+
+typedef NDIS_SPIN_LOCK	_lock;
+
+typedef HANDLE 		_rwlock; //Mutex
+
+typedef u32	_irqL;
+
+typedef NDIS_HANDLE  _nic_hdl;
+
+
+typedef NDIS_MINIPORT_TIMER    _timer;
+
+struct	__queue	{
+	LIST_ENTRY	queue;
+	_lock	lock;
+};
+
+typedef	NDIS_PACKET	_pkt;
+typedef NDIS_BUFFER	_buffer;
+typedef struct	__queue	_queue;
+
+typedef HANDLE 	_thread_hdl_;
+typedef DWORD thread_return;
+typedef void*	thread_context;
+typedef NDIS_WORK_ITEM _workitem;
+
+#define thread_exit() ExitThread(STATUS_SUCCESS); return 0;
+
+
+#define SEMA_UPBND	(0x7FFFFFFF)   //8192
+
+__inline static _list *get_prev(_list	*list)
+{
+	return list->Blink;
+}
+	
+__inline static _list *get_next(_list	*list)
+{
+	return list->Flink;
+}
+
+__inline static _list	*get_list_head(_queue	*queue)
+{
+	return (&(queue->queue));
+}
+
+#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member)
+
+__inline static void _enter_critical(_lock *plock, _irqL *pirqL)
+{
+	NdisAcquireSpinLock(plock);
+}
+
+__inline static void _exit_critical(_lock *plock, _irqL *pirqL)
+{
+	NdisReleaseSpinLock(plock);
+}
+
+__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL)
+{
+	NdisDprAcquireSpinLock(plock);	
+}
+
+__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL)
+{
+	NdisDprReleaseSpinLock(plock);	
+}
+
+
+__inline static void _enter_hwio_critical(_rwlock *prwlock, _irqL *pirqL)
+{
+	WaitForSingleObject(*prwlock, INFINITE );
+
+}
+
+__inline static void _exit_hwio_critical(_rwlock *prwlock, _irqL *pirqL)
+{
+	ReleaseMutex(*prwlock);
+}
+
+__inline static void rtw_list_delete(_list *plist)
+{
+	RemoveEntryList(plist);
+	InitializeListHead(plist);
+}
+
+__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,PVOID cntx)
+{
+	NdisMInitializeTimer(ptimer, nic_hdl, pfunc, cntx);
+}
+
+__inline static void _set_timer(_timer *ptimer,u32 delay_time)
+{
+ 	NdisMSetTimer(ptimer,delay_time);
+}
+
+__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled)
+{
+	NdisMCancelTimer(ptimer,bcancelled);
+}
+
+__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx)
+{
+
+	NdisInitializeWorkItem(pwork, pfunc, cntx);
+}
+
+__inline static void _set_workitem(_workitem *pwork)
+{
+	NdisScheduleWorkItem(pwork);
+}
+
+#define ATOMIC_INIT(i)  { (i) }
+
+//
+// Global Mutex: can only be used at PASSIVE level.
+//
+
+#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter)                              \
+{                                                               \
+    while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\
+    {                                                           \
+        NdisInterlockedDecrement((PULONG)&(_MutexCounter));        \
+        NdisMSleep(10000);                          \
+    }                                                           \
+}
+
+#define RELEASE_GLOBAL_MUTEX(_MutexCounter)                              \
+{                                                               \
+    NdisInterlockedDecrement((PULONG)&(_MutexCounter));              \
+}
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/osdep_intf.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/osdep_intf.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/osdep_intf.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/osdep_intf.h	2017-09-23 03:42:50.034675015 +0800
@@ -0,0 +1,128 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+#ifndef __OSDEP_INTF_H_
+#define __OSDEP_INTF_H_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+#define RND4(x)	(((x >> 2) + (((x & 3) == 0) ?  0: 1)) << 2)
+
+
+struct intf_priv {
+	
+	u8 *intf_dev;
+	u32	max_iosz; 	//USB2.0: 128, USB1.1: 64, SDIO:64
+	u32	max_xmitsz; //USB2.0: unlimited, SDIO:512
+	u32	max_recvsz; //USB2.0: unlimited, SDIO:512
+
+	volatile u8 *io_rwmem;
+	volatile u8 *allocated_io_rwmem;
+	u32	io_wsz; //unit: 4bytes
+	u32	io_rsz;//unit: 4bytes
+	u8 intf_status;	
+	
+	void (*_bus_io)(u8 *priv);	
+
+/*
+Under Sync. IRP (SDIO/USB)
+A protection mechanism is necessary for the io_rwmem(read/write protocol)
+
+Under Async. IRP (SDIO/USB)
+The protection mechanism is through the pending queue.
+*/
+
+	_mutex ioctl_mutex;
+
+	
+#ifdef PLATFORM_LINUX	
+	#ifdef CONFIG_USB_HCI	
+	// when in USB, IO is through interrupt in/out endpoints
+	struct usb_device 	*udev;
+	PURB	piorw_urb;
+	u8 io_irp_cnt;
+	u8 bio_irp_pending;
+	_sema io_retevt;
+	_timer	io_timer;
+	u8 bio_irp_timeout;
+	u8 bio_timer_cancel;
+	#endif
+#endif
+
+#ifdef PLATFORM_OS_XP
+	#ifdef CONFIG_SDIO_HCI
+		// below is for io_rwmem...	
+		PMDL pmdl;
+		PSDBUS_REQUEST_PACKET  sdrp;
+		PSDBUS_REQUEST_PACKET  recv_sdrp;
+		PSDBUS_REQUEST_PACKET  xmit_sdrp;
+
+			PIRP		piorw_irp;
+
+	#endif
+	#ifdef CONFIG_USB_HCI
+		PURB	piorw_urb;
+		PIRP		piorw_irp;
+		u8 io_irp_cnt;
+		u8 bio_irp_pending;
+		_sema io_retevt;	
+	#endif	
+#endif
+
+};	
+
+
+#ifdef CONFIG_R871X_TEST
+int rtw_start_pseudo_adhoc(_adapter *padapter);
+int rtw_stop_pseudo_adhoc(_adapter *padapter);
+#endif
+
+u8 rtw_init_drv_sw(_adapter *padapter);
+u8 rtw_free_drv_sw(_adapter *padapter);
+u8 rtw_reset_drv_sw(_adapter *padapter);
+
+u32 rtw_start_drv_threads(_adapter *padapter);
+void rtw_stop_drv_threads (_adapter *padapter);
+void rtw_cancel_all_timer(_adapter *padapter);
+
+#ifdef PLATFORM_LINUX
+int rtw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
+
+int rtw_init_netdev_name(struct net_device *pnetdev, const char *ifname);
+struct net_device *rtw_init_netdev(_adapter *padapter);
+
+#ifdef CONFIG_PROC_DEBUG
+void rtw_proc_init_one(struct net_device *dev);
+void rtw_proc_remove_one(struct net_device *dev);
+#endif
+#endif
+
+
+void rtw_ips_dev_unload(_adapter *padapter);
+#ifdef CONFIG_IPS
+int rtw_ips_pwr_up(_adapter *padapter);
+void rtw_ips_pwr_down(_adapter *padapter);
+#endif
+
+
+#endif	//_OSDEP_INTF_H_
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/osdep_service.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/osdep_service.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/osdep_service.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/osdep_service.h	2017-09-23 03:42:50.034675015 +0800
@@ -0,0 +1,824 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __OSDEP_SERVICE_H_
+#define __OSDEP_SERVICE_H_
+
+#include <drv_conf.h>
+#include <basic_types.h>
+//#include <rtl871x_byteorder.h>
+
+#define _SUCCESS	1
+#define _FAIL		0
+//#define RTW_STATUS_TIMEDOUT -110
+
+#undef _TRUE
+#define _TRUE		1
+
+#undef _FALSE
+#define _FALSE		0
+
+
+#ifdef PLATFORM_LINUX
+	#include <linux/version.h>
+	#include <linux/spinlock.h>
+	#include <linux/compiler.h>
+	#include <linux/kernel.h>
+	#include <linux/errno.h>
+	#include <linux/init.h>
+	#include <linux/slab.h>
+	#include <linux/module.h>
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,5))
+	#include <linux/kref.h>
+#endif
+	//#include <linux/smp_lock.h>
+	#include <linux/netdevice.h>
+	#include <linux/skbuff.h>
+	#include <linux/circ_buf.h>
+	#include <asm/uaccess.h>
+	#include <asm/byteorder.h>
+	#include <asm/atomic.h>
+	#include <asm/io.h>
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26))
+	#include <asm/semaphore.h>
+#else
+	#include <linux/semaphore.h>
+#endif
+	#include <linux/sem.h>
+	#include <linux/sched.h>
+	#include <linux/etherdevice.h>
+	#include <linux/wireless.h>
+	#include <net/iw_handler.h>
+	#include <linux/if_arp.h>
+	#include <linux/rtnetlink.h>
+	#include <linux/delay.h>
+	#include <linux/proc_fs.h>	// Necessary because we use the proc fs
+
+#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
+	#include <linux/in.h>
+	#include <linux/ip.h>
+	#include <linux/udp.h>
+#endif
+
+#ifdef CONFIG_USB_HCI
+	#include <linux/usb.h>
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
+	#include <linux/usb_ch9.h>
+#else
+	#include <linux/usb/ch9.h>
+#endif
+#endif
+
+#ifdef CONFIG_SDIO_HCI
+	#include <linux/mmc/sdio_func.h>
+	#include <linux/mmc/sdio_ids.h>
+#endif
+
+#ifdef CONFIG_PCI_HCI
+	#include <linux/pci.h>
+#endif
+
+	
+#ifdef CONFIG_USB_HCI
+	typedef struct urb *  PURB;
+#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22))
+#ifdef CONFIG_USB_SUSPEND
+#define CONFIG_AUTOSUSPEND	1
+#endif
+#endif
+#endif
+
+	typedef struct 	semaphore _sema;
+	typedef	spinlock_t	_lock;
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37))
+	typedef struct mutex 		_mutex;
+#else
+	typedef struct semaphore	_mutex;
+#endif
+	typedef struct timer_list _timer;
+
+	struct	__queue	{
+		struct	list_head	queue;	
+		_lock	lock;
+	};
+
+	typedef	struct sk_buff	_pkt;
+	typedef unsigned char	_buffer;
+	
+	typedef struct	__queue	_queue;
+	typedef struct	list_head	_list;
+	typedef	int	_OS_STATUS;
+	//typedef u32	_irqL;
+	typedef unsigned long _irqL;
+	typedef	struct	net_device * _nic_hdl;
+	
+	typedef pid_t		_thread_hdl_;
+	typedef int		thread_return;
+	typedef void*	thread_context;
+
+	#define thread_exit() complete_and_exit(NULL, 0)
+
+	typedef void timer_hdl_return;
+	typedef void* timer_hdl_context;
+	typedef struct work_struct _workitem;
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+	#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
+#endif
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22))
+	#define skb_tail_pointer(skb)	skb->tail
+#endif
+
+__inline static _list *get_next(_list	*list)
+{
+	return list->next;
+}	
+
+__inline static _list	*get_list_head(_queue	*queue)
+{
+	return (&(queue->queue));
+}
+
+	
+#define LIST_CONTAINOR(ptr, type, member) \
+        ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member)))	
+
+        
+__inline static void _enter_critical(_lock *plock, _irqL *pirqL)
+{
+	spin_lock_irqsave(plock, *pirqL);
+}
+
+__inline static void _exit_critical(_lock *plock, _irqL *pirqL)
+{
+	spin_unlock_irqrestore(plock, *pirqL);
+}
+
+__inline static void _enter_critical_ex(_lock *plock, _irqL *pirqL)
+{
+	spin_lock_irqsave(plock, *pirqL);
+}
+
+__inline static void _exit_critical_ex(_lock *plock, _irqL *pirqL)
+{
+	spin_unlock_irqrestore(plock, *pirqL);
+}
+
+__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL)
+{
+	spin_lock_bh(plock);
+}
+
+__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL)
+{
+	spin_unlock_bh(plock);
+}
+
+__inline static void _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL)
+{
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37))
+		mutex_lock(pmutex);
+#else
+		down(pmutex);
+#endif
+}
+
+
+__inline static void _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL)
+{
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37))
+		mutex_unlock(pmutex);
+#else
+		up(pmutex);
+#endif
+}
+
+__inline static void rtw_list_delete(_list *plist)
+{
+	list_del_init(plist);
+}
+
+__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,void* cntx)
+{
+	//setup_timer(ptimer, pfunc,(u32)cntx);	
+	ptimer->function = pfunc;
+	ptimer->data = (unsigned long)cntx;
+	init_timer(ptimer);
+}
+
+__inline static void _set_timer(_timer *ptimer,u32 delay_time)
+{	
+	mod_timer(ptimer , (jiffies+(delay_time*HZ/1000)));	
+}
+
+__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled)
+{
+	del_timer_sync(ptimer); 	
+	*bcancelled=  _TRUE;//TRUE ==1; FALSE==0
+}
+
+#ifdef PLATFORM_LINUX
+#define RTW_TIMER_HDL_ARGS void *FunctionContext
+#elif defined(PLATFORM_OS_CE) || defined(PLATFORM_WINDOWS)
+#define RTW_TIMER_HDL_ARGS IN PVOID SystemSpecific1, IN PVOID FunctionContext, IN PVOID SystemSpecific2, IN PVOID SystemSpecific3
+#endif
+
+#define RTW_TIMER_HDL_NAME(name) rtw_##name##_timer_hdl
+#define RTW_DECLARE_TIMER_HDL(name) void RTW_TIMER_HDL_NAME(name)(RTW_TIMER_HDL_ARGS)
+
+
+__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx)
+{
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
+	INIT_WORK(pwork, pfunc);
+#else
+	INIT_WORK(pwork, pfunc,pwork);
+#endif
+}
+
+__inline static void _set_workitem(_workitem *pwork)
+{
+	schedule_work(pwork);
+}
+
+//
+// Global Mutex: can only be used at PASSIVE level.
+//
+
+#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter)                              \
+{                                                               \
+	while (atomic_inc_return((atomic_t *)&(_MutexCounter)) != 1)\
+	{                                                           \
+		atomic_dec((atomic_t *)&(_MutexCounter));        \
+		msleep(10);                          \
+	}                                                           \
+}
+
+#define RELEASE_GLOBAL_MUTEX(_MutexCounter)                              \
+{                                                               \
+	atomic_dec((atomic_t *)&(_MutexCounter));        \
+}
+
+#endif	// PLATFORM_LINUX
+
+
+#ifdef PLATFORM_OS_XP
+
+	#include <ndis.h>
+	#include <ntddk.h>
+	#include <ntddsd.h>
+	#include <ntddndis.h>
+	#include <ntdef.h>
+
+#ifdef CONFIG_USB_HCI
+	#include <usb.h>
+	#include <usbioctl.h>
+	#include <usbdlib.h>
+#endif
+
+	typedef KSEMAPHORE 	_sema;
+	typedef	LIST_ENTRY	_list;
+	typedef NDIS_STATUS _OS_STATUS;
+	
+
+	typedef NDIS_SPIN_LOCK	_lock;
+
+	typedef KMUTEX 			_mutex;
+
+	typedef KIRQL	_irqL;
+
+	// USB_PIPE for WINCE , but handle can be use just integer under windows
+	typedef NDIS_HANDLE  _nic_hdl;
+
+
+	typedef NDIS_MINIPORT_TIMER    _timer;
+
+	struct	__queue	{
+		LIST_ENTRY	queue;	
+		_lock	lock;
+	};
+
+	typedef	NDIS_PACKET	_pkt;
+	typedef NDIS_BUFFER	_buffer;
+	typedef struct	__queue	_queue;
+	
+	typedef PKTHREAD _thread_hdl_;
+	typedef void	thread_return;
+	typedef void* thread_context;
+
+	typedef NDIS_WORK_ITEM _workitem;
+
+	#define thread_exit() PsTerminateSystemThread(STATUS_SUCCESS);
+
+	#define HZ			10000000
+	#define SEMA_UPBND	(0x7FFFFFFF)   //8192
+	
+__inline static _list *get_next(_list	*list)
+{
+	return list->Flink;
+}	
+
+__inline static _list	*get_list_head(_queue	*queue)
+{
+	return (&(queue->queue));
+}
+	
+
+#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member)
+     
+
+__inline static _enter_critical(_lock *plock, _irqL *pirqL)
+{
+	NdisAcquireSpinLock(plock);	
+}
+
+__inline static _exit_critical(_lock *plock, _irqL *pirqL)
+{
+	NdisReleaseSpinLock(plock);	
+}
+
+
+__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL)
+{
+	NdisDprAcquireSpinLock(plock);	
+}
+
+__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL)
+{
+	NdisDprReleaseSpinLock(plock);	
+}
+
+__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL)
+{
+	NdisDprAcquireSpinLock(plock);
+}
+
+__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL)
+{
+	NdisDprReleaseSpinLock(plock);
+}
+
+__inline static _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL)
+{
+	KeWaitForSingleObject(pmutex, Executive, KernelMode, FALSE, NULL);
+}
+
+
+__inline static _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL)
+{
+	KeReleaseMutex(pmutex, FALSE);
+}
+
+
+__inline static void rtw_list_delete(_list *plist)
+{
+	RemoveEntryList(plist);
+	InitializeListHead(plist);	
+}
+
+__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,PVOID cntx)
+{
+	NdisMInitializeTimer(ptimer, nic_hdl, pfunc, cntx);
+}
+
+__inline static void _set_timer(_timer *ptimer,u32 delay_time)
+{	
+ 	NdisMSetTimer(ptimer,delay_time);	
+}
+
+__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled)
+{
+	NdisMCancelTimer(ptimer,bcancelled);
+}
+
+__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx)
+{
+
+	NdisInitializeWorkItem(pwork, pfunc, cntx);
+}
+
+__inline static void _set_workitem(_workitem *pwork)
+{
+	NdisScheduleWorkItem(pwork);
+}
+
+
+#define ATOMIC_INIT(i)  { (i) }
+
+//
+// Global Mutex: can only be used at PASSIVE level.
+//
+
+#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter)                              \
+{                                                               \
+    while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\
+    {                                                           \
+        NdisInterlockedDecrement((PULONG)&(_MutexCounter));        \
+        NdisMSleep(10000);                          \
+    }                                                           \
+}
+
+#define RELEASE_GLOBAL_MUTEX(_MutexCounter)                              \
+{                                                               \
+    NdisInterlockedDecrement((PULONG)&(_MutexCounter));              \
+}
+
+#endif // PLATFORM_OS_XP
+
+
+#ifdef PLATFORM_OS_CE
+#include <osdep_ce_service.h>
+#endif
+
+#include <rtw_byteorder.h>
+
+#ifndef BIT
+	#define BIT(x)	( 1 << (x))
+#endif
+
+extern int RTW_STATUS_CODE(int error_code);
+
+#define CONFIG_USE_VMALLOC
+
+#ifdef DBG_MEM_ALLOC
+void rtw_dump_mem_stat (void);
+extern u8* dbg_rtw_vmalloc(u32 sz, const char *func, int line);
+extern u8* dbg_rtw_zvmalloc(u32 sz, const char *func, int line);
+extern void dbg_rtw_vmfree(u8 *pbuf, u32 sz, const char *func, int line);
+extern u8* dbg_rtw_malloc(u32 sz, const char *func, int line);
+extern u8* dbg_rtw_zmalloc(u32 sz, const char *func, int line);
+extern void dbg_rtw_mfree(u8 *pbuf, u32 sz, const char *func, int line);
+#ifdef CONFIG_USE_VMALLOC
+#define rtw_vmalloc(sz)			dbg_rtw_vmalloc((sz), __FUNCTION__, __LINE__)
+#define rtw_zvmalloc(sz)			dbg_rtw_zvmalloc((sz), __FUNCTION__, __LINE__)
+#define rtw_vmfree(pbuf, sz)		dbg_rtw_vmfree((pbuf), (sz), __FUNCTION__, __LINE__)
+#else //CONFIG_USE_VMALLOC
+#define rtw_vmalloc(sz)			dbg_rtw_malloc((sz), __FUNCTION__, __LINE__)
+#define rtw_zvmalloc(sz)			dbg_rtw_zmalloc((sz), __FUNCTION__, __LINE__)
+#define rtw_vmfree(pbuf, sz)		dbg_rtw_mfree((pbuf), (sz), __FUNCTION__, __LINE__)
+#endif //CONFIG_USE_VMALLOC
+#define rtw_malloc(sz)			dbg_rtw_malloc((sz), __FUNCTION__, __LINE__)
+#define rtw_zmalloc(sz)			dbg_rtw_zmalloc((sz), __FUNCTION__, __LINE__)
+#define rtw_mfree(pbuf, sz)		dbg_rtw_mfree((pbuf), (sz), __FUNCTION__, __LINE__)
+#else
+extern u8*	_rtw_vmalloc(u32 sz);
+extern u8*	_rtw_zvmalloc(u32 sz);
+extern void	_rtw_vmfree(u8 *pbuf, u32 sz);
+extern u8*	_rtw_zmalloc(u32 sz);
+extern u8*	_rtw_malloc(u32 sz);
+extern void	_rtw_mfree(u8 *pbuf, u32 sz);
+#ifdef CONFIG_USE_VMALLOC
+#define rtw_vmalloc(sz)			_rtw_vmalloc((sz))
+#define rtw_zvmalloc(sz)			_rtw_zvmalloc((sz))
+#define rtw_vmfree(pbuf, sz)		_rtw_vmfree((pbuf), (sz))
+#else //CONFIG_USE_VMALLOC
+#define rtw_vmalloc(sz)			_rtw_malloc((sz))
+#define rtw_zvmalloc(sz)			_rtw_zmalloc((sz))
+#define rtw_vmfree(pbuf, sz)		_rtw_mfree((pbuf), (sz))
+#endif //CONFIG_USE_VMALLOC
+#define rtw_malloc(sz)			_rtw_malloc((sz))
+#define rtw_zmalloc(sz)			_rtw_zmalloc((sz))
+#define rtw_mfree(pbuf, sz)		_rtw_mfree((pbuf), (sz))
+#endif
+
+extern void	_rtw_memcpy(void* dec, void* sour, u32 sz);
+extern int	_rtw_memcmp(void *dst, void *src, u32 sz);
+extern void	_rtw_memset(void *pbuf, int c, u32 sz);
+
+extern void	_rtw_init_listhead(_list *list);
+extern u32	rtw_is_list_empty(_list *phead);
+extern void	rtw_list_insert_tail(_list *plist, _list *phead);
+extern void	rtw_list_delete(_list *plist);
+
+extern void	_rtw_init_sema(_sema *sema, int init_val);
+extern void	_rtw_free_sema(_sema	*sema);
+extern void	_rtw_up_sema(_sema	*sema);
+extern u32	_rtw_down_sema(_sema *sema);
+extern void	_rtw_mutex_init(_mutex *pmutex);
+extern void	_rtw_mutex_free(_mutex *pmutex);
+extern void	_rtw_spinlock_init(_lock *plock);
+extern void	_rtw_spinlock_free(_lock *plock);
+extern void	_rtw_spinlock(_lock	*plock);
+extern void	_rtw_spinunlock(_lock	*plock);
+extern void	_rtw_spinlock_ex(_lock	*plock);
+extern void	_rtw_spinunlock_ex(_lock	*plock);
+
+extern void	_rtw_init_queue(_queue	*pqueue);
+extern u32	_rtw_queue_empty(_queue	*pqueue);
+extern u32	rtw_end_of_queue_search(_list *queue, _list *pelement);
+
+extern u32	rtw_get_current_time(void);
+extern u32	rtw_systime_to_ms(u32 systime);
+extern s32	rtw_get_passing_time_ms(u32 start);
+extern s32	rtw_get_time_interval_ms(u32 start, u32 end);
+
+extern void	rtw_sleep_schedulable(int ms);
+
+extern void	rtw_msleep_os(int ms);
+extern void	rtw_usleep_os(int us);
+
+#ifdef DBG_DELAY_OS
+#define rtw_mdelay_os(ms) _rtw_mdelay_os((ms), __FUNCTION__, __LINE__)
+#define rtw_udelay_os(ms) _rtw_udelay_os((ms), __FUNCTION__, __LINE__)
+extern void _rtw_mdelay_os(int ms, const char *func, const int line);
+extern void _rtw_udelay_os(int us, const char *func, const int line);
+#else
+extern void	rtw_mdelay_os(int ms);
+extern void	rtw_udelay_os(int us);
+#endif
+
+
+
+__inline static unsigned char _cancel_timer_ex(_timer *ptimer)
+{
+#ifdef PLATFORM_LINUX
+	return del_timer_sync(ptimer);
+#endif
+
+#ifdef PLATFORM_WINDOWS
+	u8 bcancelled;
+	
+	_cancel_timer(ptimer, &bcancelled);
+	
+	return bcancelled;
+#endif
+}
+
+__inline static void thread_enter(void *context)
+{
+#ifdef PLATFORM_LINUX
+	//struct net_device *pnetdev = (struct net_device *)context;
+	//daemonize("%s", pnetdev->name);
+	daemonize("%s", "RTKTHREAD");
+	allow_signal(SIGTERM);
+#endif
+}
+
+__inline static void flush_signals_thread(void) 
+{
+#ifdef PLATFORM_LINUX
+	if (signal_pending (current)) 
+	{
+		flush_signals(current);
+	}
+#endif
+}
+
+__inline static _OS_STATUS res_to_status(sint res)
+{
+
+
+#if defined (PLATFORM_LINUX) || defined (PLATFORM_MPIXEL)
+	return res;
+#endif
+
+#ifdef PLATFORM_WINDOWS
+
+	if (res == _SUCCESS)
+		return NDIS_STATUS_SUCCESS;
+	else
+		return NDIS_STATUS_FAILURE;
+
+#endif	
+	
+}
+
+__inline static u32 _RND4(u32 sz)
+{
+
+	u32	val;
+
+	val = ((sz >> 2) + ((sz & 3) ? 1: 0)) << 2;
+	
+	return val;
+
+}
+
+__inline static u32 _RND8(u32 sz)
+{
+
+	u32	val;
+
+	val = ((sz >> 3) + ((sz & 7) ? 1: 0)) << 3;
+	
+	return val;
+
+}
+
+__inline static u32 _RND128(u32 sz)
+{
+
+	u32	val;
+
+	val = ((sz >> 7) + ((sz & 127) ? 1: 0)) << 7;
+	
+	return val;
+
+}
+
+__inline static u32 _RND256(u32 sz)
+{
+
+	u32	val;
+
+	val = ((sz >> 8) + ((sz & 255) ? 1: 0)) << 8;
+	
+	return val;
+
+}
+
+__inline static u32 _RND512(u32 sz)
+{
+
+	u32	val;
+
+	val = ((sz >> 9) + ((sz & 511) ? 1: 0)) << 9;
+	
+	return val;
+
+}
+
+__inline static u32 bitshift(u32 bitmask)
+{
+	u32 i;
+
+	for (i = 0; i <= 31; i++)
+		if (((bitmask>>i) &  0x1) == 1) break;
+
+	return i;
+}
+
+#ifndef MAC_FMT
+#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x"
+#endif
+#ifndef MAC_ARG
+#define MAC_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5]
+#endif
+
+//#ifdef __GNUC__
+#ifdef PLATFORM_LINUX
+#define STRUCT_PACKED __attribute__ ((packed))
+#else
+#define STRUCT_PACKED
+#endif
+
+
+// limitation of path length
+#ifdef PLATFORM_LINUX
+	#define PATH_LENGTH_MAX PATH_MAX
+#elif defined(PLATFORM_WINDOWS)
+	#define PATH_LENGTH_MAX MAX_PATH
+#endif
+
+
+// Suspend lock prevent system from going suspend
+#ifdef CONFIG_WAKELOCK
+#include <linux/wakelock.h>
+#elif defined(CONFIG_ANDROID_POWER)
+#include <linux/android_power.h>
+#endif
+
+extern void rtw_suspend_lock_init(void);
+extern void rtw_suspend_lock_uninit(void);
+extern void rtw_lock_suspend(void);
+extern void rtw_unlock_suspend(void);
+
+
+//Atomic integer operations
+#ifdef PLATFORM_LINUX
+	#define ATOMIC_T atomic_t
+#elif defined(PLATFORM_WINDOWS)
+	#define ATOMIC_T LONG
+#endif
+
+extern void ATOMIC_SET(ATOMIC_T *v, int i);
+extern int ATOMIC_READ(ATOMIC_T *v);
+extern void ATOMIC_ADD(ATOMIC_T *v, int i);
+extern void ATOMIC_SUB(ATOMIC_T *v, int i);
+extern void ATOMIC_INC(ATOMIC_T *v);
+extern void ATOMIC_DEC(ATOMIC_T *v);
+extern int ATOMIC_ADD_RETURN(ATOMIC_T *v, int i);
+extern int ATOMIC_SUB_RETURN(ATOMIC_T *v, int i);
+extern int ATOMIC_INC_RETURN(ATOMIC_T *v);
+extern int ATOMIC_DEC_RETURN(ATOMIC_T *v);
+
+//File operation APIs, just for linux now
+extern int rtw_is_file_readable(char *path);
+extern int rtw_retrive_from_file(char *path, u8* buf, u32 sz);
+extern int rtw_store_to_file(char *path, u8* buf, u32 sz);
+
+
+
+#if 1 //#ifdef MEM_ALLOC_REFINE_ADAPTOR
+struct rtw_netdev_priv_indicator {
+	void *priv;
+	u32 sizeof_priv;
+};
+struct net_device *rtw_alloc_etherdev_with_old_priv(int sizeof_priv, void *old_priv);
+extern struct net_device * rtw_alloc_etherdev(int sizeof_priv);
+#define rtw_netdev_priv(netdev) ( ((struct rtw_netdev_priv_indicator *)netdev_priv(netdev))->priv )
+extern void rtw_free_netdev(struct net_device * netdev);
+#else
+#define rtw_alloc_etherdev(sizeof_priv) alloc_etherdev((sizeof_priv))
+#define rtw_netdev_priv(netdev) netdev_priv((netdev))
+#define rtw_free_netdev(netdev) free_netdev((netdev))
+#endif
+
+#ifdef PLATFORM_LINUX
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27))
+#define rtw_signal_process(pid, sig) kill_pid(find_vpid((pid)),(sig), 1)
+#else
+#define rtw_signal_process(pid, sig) kill_proc((pid), (sig), 1)
+#endif
+#endif //PLATFORM_LINUX
+
+extern u64 rtw_modular64(u64 x, u64 y);
+extern u64 rtw_division64(u64 x, u64 y);
+
+
+/* Macros for handling unaligned memory accesses */
+
+#define RTW_GET_BE16(a) ((u16) (((a)[0] << 8) | (a)[1]))
+#define RTW_PUT_BE16(a, val)			\
+	do {					\
+		(a)[0] = ((u16) (val)) >> 8;	\
+		(a)[1] = ((u16) (val)) & 0xff;	\
+	} while (0)
+
+#define RTW_GET_LE16(a) ((u16) (((a)[1] << 8) | (a)[0]))
+#define RTW_PUT_LE16(a, val)			\
+	do {					\
+		(a)[1] = ((u16) (val)) >> 8;	\
+		(a)[0] = ((u16) (val)) & 0xff;	\
+	} while (0)
+
+#define RTW_GET_BE24(a) ((((u32) (a)[0]) << 16) | (((u32) (a)[1]) << 8) | \
+			 ((u32) (a)[2]))			 
+#define RTW_PUT_BE24(a, val)					\
+	do {							\
+		(a)[0] = (u8) ((((u32) (val)) >> 16) & 0xff);	\
+		(a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff);	\
+		(a)[2] = (u8) (((u32) (val)) & 0xff);		\
+	} while (0)
+
+#define RTW_GET_BE32(a) ((((u32) (a)[0]) << 24) | (((u32) (a)[1]) << 16) | \
+			 (((u32) (a)[2]) << 8) | ((u32) (a)[3]))			 
+#define RTW_PUT_BE32(a, val)					\
+	do {							\
+		(a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff);	\
+		(a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff);	\
+		(a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff);	\
+		(a)[3] = (u8) (((u32) (val)) & 0xff);		\
+	} while (0)
+
+#define RTW_GET_LE32(a) ((((u32) (a)[3]) << 24) | (((u32) (a)[2]) << 16) | \
+			 (((u32) (a)[1]) << 8) | ((u32) (a)[0]))			 
+#define RTW_PUT_LE32(a, val)					\
+	do {							\
+		(a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff);	\
+		(a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff);	\
+		(a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff);	\
+		(a)[0] = (u8) (((u32) (val)) & 0xff);		\
+	} while (0)
+
+#define RTW_GET_BE64(a) ((((u64) (a)[0]) << 56) | (((u64) (a)[1]) << 48) | \
+			 (((u64) (a)[2]) << 40) | (((u64) (a)[3]) << 32) | \
+			 (((u64) (a)[4]) << 24) | (((u64) (a)[5]) << 16) | \
+			 (((u64) (a)[6]) << 8) | ((u64) (a)[7]))			 
+#define RTW_PUT_BE64(a, val)				\
+	do {						\
+		(a)[0] = (u8) (((u64) (val)) >> 56);	\
+		(a)[1] = (u8) (((u64) (val)) >> 48);	\
+		(a)[2] = (u8) (((u64) (val)) >> 40);	\
+		(a)[3] = (u8) (((u64) (val)) >> 32);	\
+		(a)[4] = (u8) (((u64) (val)) >> 24);	\
+		(a)[5] = (u8) (((u64) (val)) >> 16);	\
+		(a)[6] = (u8) (((u64) (val)) >> 8);	\
+		(a)[7] = (u8) (((u64) (val)) & 0xff);	\
+	} while (0)
+
+#define RTW_GET_LE64(a) ((((u64) (a)[7]) << 56) | (((u64) (a)[6]) << 48) | \
+			 (((u64) (a)[5]) << 40) | (((u64) (a)[4]) << 32) | \
+			 (((u64) (a)[3]) << 24) | (((u64) (a)[2]) << 16) | \
+			 (((u64) (a)[1]) << 8) | ((u64) (a)[0]))
+
+#endif
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/pci_hal.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/pci_hal.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/pci_hal.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/pci_hal.h	2017-09-23 03:42:50.034675015 +0800
@@ -0,0 +1,168 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __PCI_HAL_H__
+#define __PCI_HAL_H__
+
+
+#define	INTEL_VENDOR_ID				0x8086
+#define	SIS_VENDOR_ID					0x1039
+#define	ATI_VENDOR_ID					0x1002
+#define	ATI_DEVICE_ID					0x7914
+#define	AMD_VENDOR_ID					0x1022
+
+#define	PCI_MAX_BRIDGE_NUMBER			255
+#define	PCI_MAX_DEVICES				32
+#define	PCI_MAX_FUNCTION				8
+
+#define	PCI_CONF_ADDRESS   				0x0CF8   // PCI Configuration Space Address 
+#define	PCI_CONF_DATA					0x0CFC   // PCI Configuration Space Data 
+
+#define	PCI_CLASS_BRIDGE_DEV			0x06
+#define	PCI_SUBCLASS_BR_PCI_TO_PCI	0x04
+
+#define 	PCI_CAPABILITY_ID_PCI_EXPRESS	0x10
+
+#define	U1DONTCARE 					0xFF	
+#define	U2DONTCARE 					0xFFFF	
+#define	U4DONTCARE 					0xFFFFFFFF
+
+#define PCI_VENDER_ID_REALTEK		0x10ec
+
+#define HAL_HW_PCI_8180_DEVICE_ID           	0x8180
+#define HAL_HW_PCI_8185_DEVICE_ID           	0x8185	//8185 or 8185b
+#define HAL_HW_PCI_8188_DEVICE_ID           	0x8188	//8185b		
+#define HAL_HW_PCI_8198_DEVICE_ID           	0x8198	//8185b		
+#define HAL_HW_PCI_8190_DEVICE_ID           	0x8190	//8190
+#define HAL_HW_PCI_8723E_DEVICE_ID		0x8723	//8723E
+#define HAL_HW_PCI_8192_DEVICE_ID           	0x8192	//8192 PCI-E
+#define HAL_HW_PCI_8192SE_DEVICE_ID		0x8192	//8192 SE
+#define HAL_HW_PCI_8174_DEVICE_ID           	0x8174	//8192 SE 
+#define HAL_HW_PCI_8173_DEVICE_ID           	0x8173	//8191 SE Crab
+#define HAL_HW_PCI_8172_DEVICE_ID           	0x8172	//8191 SE RE
+#define HAL_HW_PCI_8171_DEVICE_ID           	0x8171	//8191 SE Unicron
+#define HAL_HW_PCI_0045_DEVICE_ID			0x0045	//8190 PCI for Ceraga
+#define HAL_HW_PCI_0046_DEVICE_ID			0x0046	//8190 Cardbus for Ceraga
+#define HAL_HW_PCI_0044_DEVICE_ID			0x0044	//8192e PCIE for Ceraga
+#define HAL_HW_PCI_0047_DEVICE_ID			0x0047	//8192e Express Card for Ceraga
+#define HAL_HW_PCI_700F_DEVICE_ID			0x700F
+#define HAL_HW_PCI_701F_DEVICE_ID			0x701F
+#define HAL_HW_PCI_DLINK_DEVICE_ID		0x3304
+#define HAL_HW_PCI_8192CET_DEVICE_ID		0x8191	//8192ce
+#define HAL_HW_PCI_8192CE_DEVICE_ID		0x8178	//8192ce
+#define HAL_HW_PCI_8191CE_DEVICE_ID		0x8177	//8192ce
+#define HAL_HW_PCI_8188CE_DEVICE_ID		0x8176	//8192ce
+#define HAL_HW_PCI_8192CU_DEVICE_ID      	0x8191	//8192ce
+#define HAL_HW_PCI_8192DE_DEVICE_ID		0x8193	//8192de
+#define HAL_HW_PCI_002B_DEVICE_ID			0x002B	//8192de, provided by HW SD
+
+#define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI 		0x1000     //8190 support 16 pages of IO registers
+#define HAL_HW_PCI_REVISION_ID_8190PCI			0x00
+#define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE	0x4000	//8192 support 16 pages of IO registers
+#define HAL_HW_PCI_REVISION_ID_8192PCIE			0x01
+#define HAL_MEMORY_MAPPED_IO_RANGE_8192SE		0x4000	//8192 support 16 pages of IO registers
+#define HAL_HW_PCI_REVISION_ID_8192SE			0x10
+#define HAL_HW_PCI_REVISION_ID_8192CE			0x1
+#define HAL_MEMORY_MAPPED_IO_RANGE_8192CE		0x4000	//8192 support 16 pages of IO registers
+#define HAL_HW_PCI_REVISION_ID_8192DE			0x0
+#define HAL_MEMORY_MAPPED_IO_RANGE_8192DE		0x4000	//8192 support 16 pages of IO registers
+
+enum pci_bridge_vendor {
+	PCI_BRIDGE_VENDOR_INTEL = 0x0,//0b'0000,0001
+	PCI_BRIDGE_VENDOR_ATI, //= 0x02,//0b'0000,0010
+	PCI_BRIDGE_VENDOR_AMD, //= 0x04,//0b'0000,0100
+	PCI_BRIDGE_VENDOR_SIS ,//= 0x08,//0b'0000,1000
+	PCI_BRIDGE_VENDOR_UNKNOWN, //= 0x40,//0b'0100,0000
+	PCI_BRIDGE_VENDOR_MAX ,//= 0x80
+} ;
+
+struct rt_pci_capabilities_header {
+	u8	capability_id;
+	u8	next;
+};
+
+struct pci_priv{
+	u8	linkctrl_reg;
+	
+	u8	busnumber;
+	u8	devnumber;	
+	u8	funcnumber;	
+
+	u8	pcibridge_busnum;
+	u8	pcibridge_devnum;
+	u8	pcibridge_funcnum;
+	u8	pcibridge_vendor;
+	u16	pcibridge_vendorid;
+	u16	pcibridge_deviceid;
+	u8	pcibridge_pciehdr_offset;
+	u8	pcibridge_linkctrlreg;	
+
+	u8	amd_l1_patch;
+};
+
+typedef struct _RT_ISR_CONTENT
+{
+	union{
+		u32			IntArray[2];
+		u32			IntReg4Byte;
+		u16			IntReg2Byte;
+	};
+}RT_ISR_CONTENT, *PRT_ISR_CONTENT;
+
+//#define RegAddr(addr)           (addr + 0xB2000000UL)
+//some platform macros will def here
+static inline void NdisRawWritePortUlong(u32 port,  u32 val) 		
+{
+	outl(val, port);
+	//writel(val, (u8 *)RegAddr(port));	
+}
+
+static inline void NdisRawWritePortUchar(u32 port,  u8 val)
+{
+	outb(val, port);
+	//writeb(val, (u8 *)RegAddr(port));
+}
+
+static inline void NdisRawReadPortUchar(u32 port, u8 *pval)
+{
+	*pval = inb(port);
+	//*pval = readb((u8 *)RegAddr(port));
+}
+
+static inline void NdisRawReadPortUshort(u32 port, u16 *pval)
+{
+	*pval = inw(port);
+	//*pval = readw((u8 *)RegAddr(port));
+}
+
+static inline void NdisRawReadPortUlong(u32 port, u32 *pval)
+{
+	*pval = inl(port);
+	//*pval = readl((u8 *)RegAddr(port));
+}
+
+#ifdef CONFIG_RTL8192C
+void rtl8192ce_set_hal_ops(_adapter * padapter);
+#endif
+#ifdef CONFIG_RTL8192D
+void rtl8192de_set_hal_ops(_adapter * padapter);
+#endif
+
+#endif //__PCIE_HAL_H__
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/pci_ops.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/pci_ops.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/pci_ops.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/pci_ops.h	2017-09-23 03:42:50.034675015 +0800
@@ -0,0 +1,58 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __PCI_OPS_H_
+#define __PCI_OPS_H_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <osdep_intf.h>
+
+#ifdef CONFIG_RTL8192C
+u32	rtl8192ce_init_desc_ring(_adapter * padapter);
+u32	rtl8192ce_free_desc_ring(_adapter * padapter);
+void	rtl8192ce_reset_desc_ring(_adapter * padapter);
+#ifdef CONFIG_64BIT_DMA
+u8	PlatformEnable92CEDMA64(PADAPTER Adapter);
+#endif
+int	rtl8192ce_interrupt(PADAPTER Adapter);
+void	rtl8192ce_xmit_tasklet(void *priv);
+void	rtl8192ce_recv_tasklet(void *priv);
+void	rtl8192ce_prepare_bcn_tasklet(void *priv);
+void	rtl8192ce_set_intf_ops(struct _io_ops	*pops);
+#endif
+
+#ifdef CONFIG_RTL8192D
+u32	rtl8192de_init_desc_ring(_adapter * padapter);
+u32	rtl8192de_free_desc_ring(_adapter * padapter);
+void	rtl8192de_reset_desc_ring(_adapter * padapter);
+#ifdef CONFIG_64BIT_DMA
+u8	PlatformEnable92DEDMA64(PADAPTER Adapter);
+#endif
+int	rtl8192de_interrupt(PADAPTER Adapter);
+void	rtl8192de_xmit_tasklet(void *priv);
+void	rtl8192de_recv_tasklet(void *priv);
+void	rtl8192de_prepare_bcn_tasklet(void *priv);
+void	rtl8192de_set_intf_ops(struct _io_ops	*pops);
+u32	MpReadPCIDwordDBI8192D(IN PADAPTER Adapter, IN u16 Offset, IN u8 Direct);
+void	MpWritePCIDwordDBI8192D(IN PADAPTER Adapter, IN u16 Offset, IN u32 Value, IN u8 Direct);
+#endif
+
+#endif
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/pci_osintf.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/pci_osintf.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/pci_osintf.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/pci_osintf.h	2017-09-23 03:42:50.038675003 +0800
@@ -0,0 +1,33 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __PCI_OSINTF_H
+#define __PCI_OSINTF_H
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+
+void rtw_pci_disable_aspm(_adapter *padapter);
+void rtw_pci_enable_aspm(_adapter *padapter);
+
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/recv_osdep.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/recv_osdep.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/recv_osdep.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/recv_osdep.h	2017-09-23 03:42:50.038675003 +0800
@@ -0,0 +1,58 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __RECV_OSDEP_H_
+#define __RECV_OSDEP_H_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+
+extern sint _rtw_init_recv_priv(struct recv_priv *precvpriv, _adapter *padapter);
+extern void _rtw_free_recv_priv (struct recv_priv *precvpriv);
+
+
+extern s32  rtw_recv_entry(union recv_frame *precv_frame);	
+extern int rtw_recv_indicatepkt(_adapter *adapter, union recv_frame *precv_frame);
+extern void rtw_recv_returnpacket(IN _nic_hdl cnxt, IN _pkt *preturnedpkt);
+
+extern void rtw_hostapd_mlme_rx(_adapter *padapter, union recv_frame *precv_frame);
+extern void rtw_handle_tkip_mic_err(_adapter *padapter,u8 bgroup);
+		
+
+int	rtw_init_recv_priv(struct recv_priv *precvpriv, _adapter *padapter);
+void rtw_free_recv_priv (struct recv_priv *precvpriv);
+
+
+int rtw_os_recv_resource_init(struct recv_priv *precvpriv, _adapter *padapter);
+int rtw_os_recv_resource_alloc(_adapter *padapter, union recv_frame *precvframe);
+void rtw_os_recv_resource_free(struct recv_priv *precvpriv);
+
+
+int rtw_os_recvbuf_resource_alloc(_adapter *padapter, struct recv_buf *precvbuf);
+int rtw_os_recvbuf_resource_free(_adapter *padapter, struct recv_buf *precvbuf);
+
+void rtw_os_read_port(_adapter *padapter, struct recv_buf *precvbuf);
+
+void rtw_init_recv_timer(struct recv_reorder_ctrl *preorder_ctrl);
+
+
+#endif //
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192c_cmd.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192c_cmd.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192c_cmd.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192c_cmd.h	2017-09-23 03:42:50.038675003 +0800
@@ -0,0 +1,105 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef __RTL8192C_CMD_H_
+#define __RTL8192C_CMD_H_
+
+
+enum cmd_msg_element_id
+{	
+	NONE_CMDMSG_EID,
+	AP_OFFLOAD_EID=0,
+	SET_PWRMODE_EID=1,
+	JOINBSS_RPT_EID=2,
+	RSVD_PAGE_EID=3,
+	RSSI_4_EID = 4,
+	RSSI_SETTING_EID=5,
+	MACID_CONFIG_EID=6,
+	MACID_PS_MODE_EID=7,
+	P2P_PS_OFFLOAD_EID=8,
+	SELECTIVE_SUSPEND_ROF_CMD=9,
+	P2P_PS_CTW_CMD_EID=32,
+	H2C_92C_IO_OFFLOAD=44,
+	H2C_92C_CMD_MAX
+};
+
+struct cmd_msg_parm {
+	u8 eid; //element id
+	u8 sz; // sz
+	u8 buf[6];
+};
+
+typedef struct _SETPWRMODE_PARM{
+	u8 	Mode;
+	u8 	SmartPS;
+	u8	BcnPassTime;	// unit: 100ms
+}SETPWRMODE_PARM, *PSETPWRMODE_PARM;
+
+struct H2C_SS_RFOFF_PARAM{
+	u8 	ROFOn; // 1: on, 0:off
+	u16	gpio_period; // unit: 1024 us
+}__attribute__ ((packed));
+
+
+typedef struct JOINBSSRPT_PARM{
+	u8	OpMode;	// RT_MEDIA_STATUS
+}JOINBSSRPT_PARM, *PJOINBSSRPT_PARM;
+
+typedef struct _RSVDPAGE_LOC{
+	u8 	LocProbeRsp;
+	u8 	LocPsPoll;
+	u8	LocNullData;
+}RSVDPAGE_LOC, *PRSVDPAGE_LOC;
+
+struct P2P_PS_Offload_t {
+ unsigned char Offload_En:1;
+ unsigned char role:1; // 1: Owner, 0: Client
+ unsigned char CTWindow_En:1;
+ unsigned char NoA0_En:1;
+ unsigned char NoA1_En:1;
+ unsigned char AllStaSleep:1; // Only valid in Owner
+ unsigned char discovery:1;
+ unsigned char rsvd:1;
+};
+
+struct P2P_PS_CTWPeriod_t {
+    unsigned char CTWPeriod;	//TU
+};
+
+// host message to firmware cmd
+void	rtl8192c_set_FwPwrMode_cmd(_adapter*padapter, u8 Mode);
+void	rtl8192c_set_FwJoinBssReport_cmd(_adapter* padapter, u8 mstatus);
+u8	rtl8192c_set_rssi_cmd(_adapter*padapter, u8 *param);
+u8	rtl8192c_set_raid_cmd(_adapter*padapter, u32 mask, u8 arg);
+void	rtl8192c_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg);
+u8	rtl8192c_set_FwSelectSuspend_cmd(_adapter*padapter,u8 bfwpoll, u16 period);
+#ifdef CONFIG_P2P
+void	rtl8192c_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state);
+#endif //CONFIG_P2P
+
+#ifdef CONFIG_IOL
+typedef struct _IO_OFFLOAD_LOC{
+	u8 	LocCmd;
+}IO_OFFLOAD_LOC, *PIO_OFFLOAD_LOC;
+int rtl8192c_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms);
+#endif //CONFIG_IOL
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192c_dm.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192c_dm.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192c_dm.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192c_dm.h	2017-09-23 03:42:50.038675003 +0800
@@ -0,0 +1,611 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef	__RTL8192C_DM_H__
+#define __RTL8192C_DM_H__
+//============================================================
+// Description:
+//
+// This file is for 92CE/92CU dynamic mechanism only
+//
+//
+//============================================================
+
+#define	RSSI_CCK	0
+#define	RSSI_OFDM	1
+#define	RSSI_DEFAULT	2
+
+#define	OFDM_TABLE_SIZE 	37
+#define	CCK_TABLE_SIZE		33
+
+static u32 OFDMSwingTable[OFDM_TABLE_SIZE] = {
+	0x7f8001fe, // 0, +6.0dB
+	0x788001e2, // 1, +5.5dB
+	0x71c001c7, // 2, +5.0dB
+	0x6b8001ae, // 3, +4.5dB
+	0x65400195, // 4, +4.0dB
+	0x5fc0017f, // 5, +3.5dB
+	0x5a400169, // 6, +3.0dB
+	0x55400155, // 7, +2.5dB
+	0x50800142, // 8, +2.0dB
+	0x4c000130, // 9, +1.5dB
+	0x47c0011f, // 10, +1.0dB
+	0x43c0010f, // 11, +0.5dB
+	0x40000100, // 12, +0dB
+	0x3c8000f2, // 13, -0.5dB
+	0x390000e4, // 14, -1.0dB
+	0x35c000d7, // 15, -1.5dB
+	0x32c000cb, // 16, -2.0dB
+	0x300000c0, // 17, -2.5dB
+	0x2d4000b5, // 18, -3.0dB
+	0x2ac000ab, // 19, -3.5dB
+	0x288000a2, // 20, -4.0dB
+	0x26000098, // 21, -4.5dB
+	0x24000090, // 22, -5.0dB
+	0x22000088, // 23, -5.5dB
+	0x20000080, // 24, -6.0dB
+	0x1e400079, // 25, -6.5dB
+	0x1c800072, // 26, -7.0dB
+	0x1b00006c, // 27. -7.5dB
+	0x19800066, // 28, -8.0dB
+	0x18000060, // 29, -8.5dB
+	0x16c0005b, // 30, -9.0dB
+	0x15800056, // 31, -9.5dB
+	0x14400051, // 32, -10.0dB
+	0x1300004c, // 33, -10.5dB
+	0x12000048, // 34, -11.0dB
+	0x11000044, // 35, -11.5dB
+	0x10000040, // 36, -12.0dB
+};
+
+static u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = {
+{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},	// 0, +0dB
+{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},	// 1, -0.5dB
+{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},	// 2, -1.0dB
+{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},	// 3, -1.5dB
+{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},	// 4, -2.0dB 
+{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},	// 5, -2.5dB
+{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},	// 6, -3.0dB
+{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},	// 7, -3.5dB
+{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},	// 8, -4.0dB 
+{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},	// 9, -4.5dB
+{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},	// 10, -5.0dB 
+{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},	// 11, -5.5dB
+{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},	// 12, -6.0dB 
+{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},	// 13, -6.5dB
+{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},	// 14, -7.0dB 
+{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},	// 15, -7.5dB
+{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},	// 16, -8.0dB 
+{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},	// 17, -8.5dB
+{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},	// 18, -9.0dB 
+{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},	// 19, -9.5dB
+{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},	// 20, -10.0dB
+{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},	// 21, -10.5dB
+{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01},	// 22, -11.0dB
+{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01},	// 23, -11.5dB
+{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01},	// 24, -12.0dB
+{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01},	// 25, -12.5dB
+{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01},	// 26, -13.0dB
+{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01},	// 27, -13.5dB
+{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01},	// 28, -14.0dB
+{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01},	// 29, -14.5dB
+{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01},	// 30, -15.0dB
+{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01},	// 31, -15.5dB
+{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}	// 32, -16.0dB
+};
+
+static u8 CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]= {
+{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},	// 0, +0dB	
+{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},	// 1, -0.5dB 
+{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},	// 2, -1.0dB  
+{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00},	// 3, -1.5dB
+{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},	// 4, -2.0dB  
+{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00},	// 5, -2.5dB
+{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},	// 6, -3.0dB  
+{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},	// 7, -3.5dB  
+{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},	// 8, -4.0dB  
+{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},	// 9, -4.5dB
+{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},	// 10, -5.0dB  
+{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},	// 11, -5.5dB
+{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},	// 12, -6.0dB  
+{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},	// 13, -6.5dB 
+{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},	// 14, -7.0dB  
+{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},	// 15, -7.5dB
+{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},	// 16, -8.0dB  
+{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},	// 17, -8.5dB
+{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},	// 18, -9.0dB  
+{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},	// 19, -9.5dB
+{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},	// 20, -10.0dB
+{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},	// 21, -10.5dB
+{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00},	// 22, -11.0dB
+{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},	// 23, -11.5dB
+{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},	// 24, -12.0dB
+{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00},	// 25, -12.5dB
+{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},	// 26, -13.0dB
+{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},	// 27, -13.5dB
+{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},	// 28, -14.0dB
+{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},	// 29, -14.5dB
+{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},	// 30, -15.0dB
+{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},	// 31, -15.5dB
+{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}	// 32, -16.0dB
+};	
+
+//============================================================
+// structure and define
+//============================================================
+
+typedef struct _FALSE_ALARM_STATISTICS{
+	u32	Cnt_Parity_Fail;
+	u32	Cnt_Rate_Illegal;
+	u32	Cnt_Crc8_fail;
+	u32	Cnt_Mcs_fail;
+	u32	Cnt_Ofdm_fail;
+	u32	Cnt_Cck_fail;
+	u32	Cnt_all;
+	u32	Cnt_Fast_Fsync;
+	u32	Cnt_SB_Search_fail;
+}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS;
+
+typedef struct _Dynamic_Power_Saving_
+{
+	u8		PreCCAState;
+	u8		CurCCAState;
+
+	u8		PreRFState;
+	u8		CurRFState;
+
+	s32		Rssi_val_min;
+	
+}PS_T;
+
+typedef struct _Dynamic_Initial_Gain_Threshold_
+{
+	u8		Dig_Enable_Flag;
+	u8		Dig_Ext_Port_Stage;
+
+	int		RssiLowThresh;
+	int		RssiHighThresh;
+
+	u32		FALowThresh;
+	u32		FAHighThresh;
+
+	u8		CurSTAConnectState;
+	u8		PreSTAConnectState;
+	u8		CurMultiSTAConnectState;
+
+	u8		PreIGValue;
+	u8		CurIGValue;
+	u8		BackupIGValue;
+
+	char		BackoffVal;
+	char		BackoffVal_range_max;
+	char		BackoffVal_range_min;
+	u8		rx_gain_range_max;
+	u8		rx_gain_range_min;
+	u8		Rssi_val_min;
+
+	u8		PreCCKPDState;
+	u8		CurCCKPDState;
+        u8		PreCCKFAState;
+	u8		CurCCKFAState;
+	u8		PreCCAState;
+	u8		CurCCAState;
+
+	u8		LargeFAHit;
+	u8		ForbiddenIGI;
+	u32		Recover_cnt;
+
+}DIG_T;
+
+typedef enum tag_Dynamic_Init_Gain_Operation_Type_Definition
+{
+	DIG_TYPE_THRESH_HIGH	= 0,
+	DIG_TYPE_THRESH_LOW	= 1,
+	DIG_TYPE_BACKOFF		= 2,
+	DIG_TYPE_RX_GAIN_MIN	= 3,
+	DIG_TYPE_RX_GAIN_MAX	= 4,
+	DIG_TYPE_ENABLE 		= 5,
+	DIG_TYPE_DISABLE 		= 6,
+	DIG_OP_TYPE_MAX
+}DM_DIG_OP_E;
+
+typedef enum tag_CCK_Packet_Detection_Threshold_Type_Definition
+{
+	CCK_PD_STAGE_LowRssi = 0,
+	CCK_PD_STAGE_HighRssi = 1,
+	CCK_PD_STAGE_MAX = 3,
+}DM_CCK_PDTH_E;
+
+typedef enum tag_1R_CCA_Type_Definition
+{
+	CCA_1R =0,
+	CCA_2R = 1,
+	CCA_MAX = 2,
+}DM_1R_CCA_E;
+
+typedef enum tag_RF_Type_Definition
+{
+	RF_Save =0,
+	RF_Normal = 1,
+	RF_MAX = 2,
+}DM_RF_E;
+
+typedef enum tag_DIG_EXT_PORT_ALGO_Definition
+{
+	DIG_EXT_PORT_STAGE_0 = 0,
+	DIG_EXT_PORT_STAGE_1 = 1,
+	DIG_EXT_PORT_STAGE_2 = 2,
+	DIG_EXT_PORT_STAGE_3 = 3,
+	DIG_EXT_PORT_STAGE_MAX = 4,
+}DM_DIG_EXT_PORT_ALG_E;
+
+
+typedef enum tag_DIG_Connect_Definition
+{
+	DIG_STA_DISCONNECT = 0,	
+	DIG_STA_CONNECT = 1,
+	DIG_STA_BEFORE_CONNECT = 2,
+	DIG_MultiSTA_DISCONNECT = 3,
+	DIG_MultiSTA_CONNECT = 4,
+	DIG_CONNECT_MAX
+}DM_DIG_CONNECT_E;
+
+
+
+typedef	enum _BT_Ant_NUM{
+	Ant_x2	= 0,		
+	Ant_x1	= 1
+} BT_Ant_NUM, *PBT_Ant_NUM;
+
+typedef	enum _BT_CoType{
+	BT_2Wire		= 0,		
+	BT_ISSC_3Wire	= 1,
+	BT_Accel		= 2,
+	BT_CSR_BC4		= 3,
+	BT_CSR_BC8		= 4,
+	BT_RTL8756		= 5,
+} BT_CoType, *PBT_CoType;
+
+typedef	enum _BT_CurState{
+	BT_OFF		= 0,	
+	BT_ON		= 1,
+} BT_CurState, *PBT_CurState;
+
+typedef	enum _BT_ServiceType{
+	BT_SCO		= 0,	
+	BT_A2DP		= 1,
+	BT_HID		= 2,
+	BT_HID_Idle	= 3,
+	BT_Scan		= 4,
+	BT_Idle		= 5,
+	BT_OtherAction	= 6,
+	BT_Busy			= 7,
+	BT_OtherBusy		= 8,
+	BT_PAN			= 9,
+} BT_ServiceType, *PBT_ServiceType;
+
+typedef	enum _BT_RadioShared{
+	BT_Radio_Shared 	= 0,	
+	BT_Radio_Individual	= 1,
+} BT_RadioShared, *PBT_RadioShared;
+
+struct btcoexist_priv	{
+	u8					BT_Coexist;
+	u8					BT_Ant_Num;
+	u8					BT_CoexistType;
+	u8					BT_State;
+	u8					BT_CUR_State;		//0:on, 1:off
+	u8					BT_Ant_isolation;	//0:good, 1:bad
+	u8					BT_PapeCtrl;		//0:SW, 1:SW/HW dynamic
+	u8					BT_Service;
+	u8					BT_Ampdu;	// 0:Disable BT control A-MPDU, 1:Enable BT control A-MPDU.
+	u8					BT_RadioSharedType;
+	u32					Ratio_Tx;
+	u32					Ratio_PRI;
+	u8					BtRfRegOrigin1E;
+	u8					BtRfRegOrigin1F;
+	u8					BtRssiState;
+	u32					BtEdcaUL;
+	u32					BtEdcaDL;
+	u32					BT_EDCA[2];
+	u8					bCOBT;
+
+	u8					bInitSet;
+	u8					bBTBusyTraffic;
+	u8					bBTTrafficModeSet;
+	u8					bBTNonTrafficModeSet;
+	//BTTraffic				BT21TrafficStatistics;
+	u32					CurrentState;
+	u32					PreviousState;
+	u8					BtPreRssiState;
+	u8					bFWCoexistAllOff;
+	u8					bSWCoexistAllOff;
+};
+
+#define		BW_AUTO_SWITCH_HIGH_LOW	25
+#define		BW_AUTO_SWITCH_LOW_HIGH	30
+
+#define		DM_DIG_THRESH_HIGH			40
+#define		DM_DIG_THRESH_LOW			35
+
+#define		DM_FALSEALARM_THRESH_LOW	400
+#define		DM_FALSEALARM_THRESH_HIGH	1000
+
+#define		DM_DIG_MAX					0x3e
+#define		DM_DIG_MIN					0x1e //0x22//0x1c
+
+#define		DM_DIG_FA_UPPER				0x32
+#define		DM_DIG_FA_LOWER				0x20
+#define		DM_DIG_FA_TH0					0x20
+#define		DM_DIG_FA_TH1					0x100
+#define		DM_DIG_FA_TH2					0x200
+
+#define		DM_DIG_BACKOFF_MAX			12
+#define		DM_DIG_BACKOFF_MIN			(-4)
+#define		DM_DIG_BACKOFF_DEFAULT		10
+
+#define		RxPathSelection_SS_TH_low		30
+#define		RxPathSelection_diff_TH			18
+
+#define		DM_RATR_STA_INIT			0
+#define		DM_RATR_STA_HIGH			1
+#define 		DM_RATR_STA_MIDDLE		2
+#define 		DM_RATR_STA_LOW			3
+
+#define		CTSToSelfTHVal					30
+#define		RegC38_TH						20
+
+#define		WAIotTHVal						25
+
+//Dynamic Tx Power Control Threshold
+#define		TX_POWER_NEAR_FIELD_THRESH_LVL2	74
+#define		TX_POWER_NEAR_FIELD_THRESH_LVL1	67
+
+#define		TxHighPwrLevel_Normal		0	
+#define		TxHighPwrLevel_Level1		1
+#define		TxHighPwrLevel_Level2		2
+#define		TxHighPwrLevel_BT1			3
+#define		TxHighPwrLevel_BT2			4
+
+#define		DM_Type_ByFW			0
+#define		DM_Type_ByDriver		1
+
+
+typedef struct _RATE_ADAPTIVE
+{
+	u8				RateAdaptiveDisabled;
+	u8				RATRState;
+	u16				reserve;	
+	
+	u32				HighRSSIThreshForRA;
+	u32				High2LowRSSIThreshForRA;
+	u8				Low2HighRSSIThreshForRA40M;
+	u32				LowRSSIThreshForRA40M;	
+	u8				Low2HighRSSIThreshForRA20M;
+	u32				LowRSSIThreshForRA20M;	
+	u32				UpperRSSIThresholdRATR;
+	u32				MiddleRSSIThresholdRATR;
+	u32				LowRSSIThresholdRATR;
+	u32				LowRSSIThresholdRATR40M;
+	u32				LowRSSIThresholdRATR20M;
+	u8				PingRSSIEnable;	//cosa add for Netcore long range ping issue
+	u32				PingRSSIRATR;	//cosa add for Netcore long range ping issue
+	u32				PingRSSIThreshForRA;//cosa add for Netcore long range ping issue
+	u32				LastRATR;
+	u8				PreRATRState;
+	
+} RATE_ADAPTIVE, *PRATE_ADAPTIVE;
+
+typedef enum tag_SW_Antenna_Switch_Definition
+{
+	Antenna_B = 1,
+	Antenna_A = 2,
+	Antenna_MAX = 3,
+}DM_SWAS_E;
+
+#ifdef CONFIG_ANTENNA_DIVERSITY
+// This indicates two different the steps. 
+// In SWAW_STEP_PEAK, driver needs to switch antenna and listen to the signal on the air.
+// In SWAW_STEP_DETERMINE, driver just compares the signal captured in SWAW_STEP_PEAK
+// with original RSSI to determine if it is necessary to switch antenna.
+#define SWAW_STEP_PEAK		0
+#define SWAW_STEP_DETERMINE	1
+
+#define	TP_MODE		0
+#define	RSSI_MODE		1
+#define	TRAFFIC_LOW	0
+#define	TRAFFIC_HIGH	1
+
+typedef struct _SW_Antenna_Switch_
+{
+	u8		try_flag;
+	s32		PreRSSI;
+	u8		CurAntenna;
+	u8		PreAntenna;
+	u8		RSSI_Trying;
+	u8		TestMode;
+	u8		bTriggerAntennaSwitch;
+	u8		SelectAntennaMap;
+	// Before link Antenna Switch check
+	u8		SWAS_NoLink_State;
+
+}SWAT_T;
+
+
+#endif
+
+
+struct 	dm_priv	
+{
+	u8	DM_Type;
+	u8	DMFlag, DMFlag_tmp;
+	
+
+	//for DIG
+	u8	bDMInitialGainEnable;
+	u8	binitialized; // for dm_initial_gain_Multi_STA use.
+	DIG_T	DM_DigTable;
+
+	PS_T	DM_PSTable;
+
+	FALSE_ALARM_STATISTICS FalseAlmCnt;
+	
+	//for rate adaptive, in fact,  88c/92c fw will handle this
+	u8 bUseRAMask;
+	RATE_ADAPTIVE RateAdaptive;
+
+	//* Upper and Lower Signal threshold for Rate Adaptive*/
+	int	UndecoratedSmoothedPWDB;
+	int	UndecoratedSmoothedCCK;
+	int	EntryMinUndecoratedSmoothedPWDB;
+	int	EntryMaxUndecoratedSmoothedPWDB;
+
+
+	//for High Power
+	u8 bDynamicTxPowerEnable;
+	u8 LastDTPLvl;
+	u8 DynamicTxHighPowerLvl;//Add by Jacken Tx Power Control for Near/Far Range 2008/03/06
+		
+	//for tx power tracking
+	//u8	bTXPowerTracking;
+	u8	TXPowercount;
+	u8	bTXPowerTrackingInit;	
+	u8	TxPowerTrackControl;	//for mp mode, turn off txpwrtracking as default
+	u8	TM_Trigger;
+
+	u8	ThermalMeter[2];				// ThermalMeter, index 0 for RFIC0, and 1 for RFIC1
+	u8	ThermalValue;
+	u8	ThermalValue_LCK;
+	u8	ThermalValue_IQK;
+	u8	ThermalValue_DPK;
+
+	u8	bRfPiEnable;
+
+	//for APK
+	u32	APKoutput[2][2];	//path A/B; output1_1a/output1_2a
+	u8	bAPKdone;
+	u8	bAPKThermalMeterIgnore;
+	u8	bDPdone;
+	u8	bDPPathAOK;
+	u8	bDPPathBOK;
+
+	//for IQK
+	u32	RegC04;
+	u32	Reg874;
+	u32	RegC08;
+	u32	RegB68;
+	u32	RegB6C;
+	u32	Reg870;
+	u32	Reg860;
+	u32	Reg864;
+	u32	ADDA_backup[IQK_ADDA_REG_NUM];
+	u32	IQK_MAC_backup[IQK_MAC_REG_NUM];
+	u32	IQK_BB_backup_recover[9];
+	u32	IQK_BB_backup[IQK_BB_REG_NUM];
+	u8	PowerIndex_backup[6];
+
+	u8	bCCKinCH14;
+
+	char	CCK_index;
+	char	OFDM_index[2];
+
+	BOOLEAN		bDoneTxpower;
+	char	CCK_index_HP;
+	char	OFDM_index_HP[2];
+	u8	ThermalValue_HP[HP_THERMAL_NUM];
+	u8	ThermalValue_HP_index;
+
+	//for TxPwrTracking
+	int	RegE94;
+	int 	RegE9C;
+	int	RegEB4;
+	int	RegEBC;
+
+	u32	TXPowerTrackingCallbackCnt;	//cosa add for debug
+
+	u32	prv_traffic_idx; // edca turbo
+
+	// for dm_RF_Saving
+	u8	initialize;
+	u32	rf_saving_Reg874;
+	u32	rf_saving_RegC70;
+	u32	rf_saving_Reg85C;
+	u32	rf_saving_RegA74;
+
+	//for Antenna diversity
+#ifdef CONFIG_ANTENNA_DIVERSITY
+	SWAT_T DM_SWAT_Table;
+#endif	
+#ifdef CONFIG_SW_ANTENNA_DIVERSITY
+	_timer SwAntennaSwitchTimer;
+	
+	u64	lastTxOkCnt;
+	u64	lastRxOkCnt;
+	u64	TXByteCnt_A;
+	u64	TXByteCnt_B;
+	u64	RXByteCnt_A;
+	u64	RXByteCnt_B;
+	u8	DoubleComfirm;
+	u8	TrafficLoad;
+#endif
+
+	s32	OFDM_Pkt_Cnt;
+	u8	RSSI_Select;
+	u8 	DIG_Dynamic_MIN ;
+
+	// Add for Reading Initial Data Rate SEL Register 0x484 during watchdog. Using for fill tx desc. 2011.3.21 by Thomas
+	u8	INIDATA_RATE[32];
+};
+
+
+/*------------------------Export global variable----------------------------*/
+/*------------------------Export global variable----------------------------*/
+/*------------------------Export Marco Definition---------------------------*/
+//#define DM_MultiSTA_InitGainChangeNotify(Event) {DM_DigTable.CurMultiSTAConnectState = Event;}
+
+
+//============================================================
+// function prototype
+//============================================================
+void rtl8192c_init_dm_priv(IN PADAPTER Adapter);
+void rtl8192c_deinit_dm_priv(IN PADAPTER Adapter);
+void rtl8192c_InitHalDm(IN PADAPTER Adapter);
+void rtl8192c_HalDmWatchDog(IN PADAPTER Adapter);
+
+VOID rtl8192c_dm_CheckTXPowerTracking(IN PADAPTER Adapter);
+
+void rtl8192c_dm_RF_Saving(IN PADAPTER pAdapter, IN u8 bForceInNormal);
+
+#ifdef CONFIG_BT_COEXIST
+void rtl8192c_set_dm_bt_coexist(_adapter *padapter, u8 bStart);
+void rtl8192c_issue_delete_ba(_adapter *padapter, u8 dir);
+#endif
+
+#ifdef CONFIG_SW_ANTENNA_DIVERSITY
+void SwAntDivRSSICheck8192C(_adapter *padapter ,u32 RxPWDBAll); 
+void SwAntDivRestAfterLink8192C(IN	PADAPTER Adapter);
+#endif
+#ifdef CONFIG_ANTENNA_DIVERSITY
+void	SwAntDivCompare8192C(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src);
+u8 SwAntDivBeforeLink8192C(IN PADAPTER Adapter);
+#endif
+
+#endif	//__HAL8190PCIDM_H__
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192c_event.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192c_event.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192c_event.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192c_event.h	2017-09-23 03:42:50.038675003 +0800
@@ -0,0 +1,29 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef _RTL8192C_EVENT_H_
+#define _RTL8192C_EVENT_H_
+
+
+
+
+#endif
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192c_hal.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192c_hal.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192c_hal.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192c_hal.h	2017-09-23 03:42:50.038675003 +0800
@@ -0,0 +1,875 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef __RTL8192C_HAL_H__
+#define __RTL8192C_HAL_H__
+
+#include "rtl8192c_spec.h"
+#include "Hal8192CPhyReg.h"
+#include "Hal8192CPhyCfg.h"
+#include "rtl8192c_rf.h"
+#include "rtl8192c_dm.h"
+#include "rtl8192c_recv.h"
+#include "rtl8192c_xmit.h"
+#include "rtl8192c_cmd.h"
+#ifdef DBG_CONFIG_ERROR_DETECT
+#include "rtl8192c_sreset.h"
+#endif
+
+#ifdef CONFIG_PCI_HCI
+
+	#include "Hal8192CEHWImg.h"
+
+	#define RTL819X_DEFAULT_RF_TYPE			RF_2T2R
+	//#define RTL819X_DEFAULT_RF_TYPE			RF_1T2R
+	#define RTL819X_TOTAL_RF_PATH				2
+
+	//2TODO:  The following need to check!!
+	#define RTL8192C_FW_TSMC_IMG				"rtl8192CE\\rtl8192cfwT.bin"
+	#define RTL8192C_FW_UMC_IMG				"rtl8192CE\\rtl8192cfwU.bin"
+	#define RTL8192C_FW_UMC_B_IMG				"rtl8192CE\\rtl8192cfwU_B.bin"
+
+	#define RTL8188C_PHY_REG					"rtl8192CE\\PHY_REG_1T.txt"
+	#define RTL8188C_PHY_RADIO_A				"rtl8192CE\\radio_a_1T.txt"
+	#define RTL8188C_PHY_RADIO_B				"rtl8192CE\\radio_b_1T.txt"
+	#define RTL8188C_AGC_TAB					"rtl8192CE\\AGC_TAB_1T.txt"
+	#define RTL8188C_PHY_MACREG				"rtl8192CE\\MACREG_1T.txt"
+
+	#define RTL8192C_PHY_REG					"rtl8192CE\\PHY_REG_2T.txt"
+	#define RTL8192C_PHY_RADIO_A				"rtl8192CE\\radio_a_2T.txt"
+	#define RTL8192C_PHY_RADIO_B				"rtl8192CE\\radio_b_2T.txt"
+	#define RTL8192C_AGC_TAB					"rtl8192CE\\AGC_TAB_2T.txt"
+	#define RTL8192C_PHY_MACREG				"rtl8192CE\\MACREG_2T.txt"
+
+	#define RTL819X_PHY_MACPHY_REG			"rtl8192CE\\MACPHY_reg.txt"
+	#define RTL819X_PHY_MACPHY_REG_PG		"rtl8192CE\\MACPHY_reg_PG.txt"
+	#define RTL819X_PHY_MACREG				"rtl8192CE\\MAC_REG.txt"
+	#define RTL819X_PHY_REG					"rtl8192CE\\PHY_REG.txt"
+	#define RTL819X_PHY_REG_1T2R				"rtl8192CE\\PHY_REG_1T2R.txt"
+	#define RTL819X_PHY_REG_to1T1R				"rtl8192CE\\phy_to1T1R_a.txt"
+	#define RTL819X_PHY_REG_to1T2R				"rtl8192CE\\phy_to1T2R.txt"
+	#define RTL819X_PHY_REG_to2T2R				"rtl8192CE\\phy_to2T2R.txt"
+	#define RTL819X_PHY_REG_PG					"rtl8192CE\\PHY_REG_PG.txt"
+	#define RTL819X_AGC_TAB					"rtl8192CE\\AGC_TAB.txt"
+	#define RTL819X_PHY_RADIO_A				"rtl8192CE\\radio_a.txt"
+	#define RTL819X_PHY_RADIO_A_1T			"rtl8192CE\\radio_a_1t.txt"
+	#define RTL819X_PHY_RADIO_A_2T			"rtl8192CE\\radio_a_2t.txt"
+	#define RTL819X_PHY_RADIO_B				"rtl8192CE\\radio_b.txt"
+	#define RTL819X_PHY_RADIO_B_GM			"rtl8192CE\\radio_b_gm.txt"
+	#define RTL819X_PHY_RADIO_C				"rtl8192CE\\radio_c.txt"
+	#define RTL819X_PHY_RADIO_D				"rtl8192CE\\radio_d.txt"
+	#define RTL819X_EEPROM_MAP				"rtl8192CE\\8192ce.map"
+	#define RTL819X_EFUSE_MAP					"rtl8192CE\\8192ce.map"
+
+//---------------------------------------------------------------------
+//		RTL8723E From file
+//---------------------------------------------------------------------
+	#define RTL8723_FW_UMC_IMG				"rtl8723E\\rtl8723fw.bin"
+	#define RTL8723_PHY_REG					"rtl8723E\\PHY_REG_1T.txt" 
+	#define RTL8723_PHY_RADIO_A				"rtl8723E\\radio_a_1T.txt"
+	#define RTL8723_PHY_RADIO_B				"rtl8723E\\radio_b_1T.txt" 
+	#define RTL8723_AGC_TAB					"rtl8723E\\AGC_TAB_1T.txt"
+	#define RTL8723_PHY_MACREG 				"rtl8723E\\MAC_REG.txt"
+	#define RTL8723_PHY_MACREG 				"rtl8723E\\MAC_REG.txt"
+	#define RTL8723_PHY_REG_PG					"rtl8723E\\PHY_REG_PG.txt"
+	#define RTL8723_PHY_REG_MP 				"rtl8723E\\PHY_REG_MP.txt" 	
+
+	// The file name "_2T" is for 92CE, "_1T"  is for 88CE. Modified by tynli. 2009.11.24.
+	#define Rtl819XFwTSMCImageArray			Rtl8192CEFwTSMCImgArray
+	#define Rtl819XFwUMCACutImageArray			Rtl8192CEFwUMCACutImgArray
+	#define Rtl819XFwUMCBCutImageArray			Rtl8192CEFwUMCBCutImgArray
+	
+	#define Rtl8723FwUMCImageArray				Rtl8192CEFwUMC8723ImgArray
+	#define Rtl819XMAC_Array					Rtl8192CEMAC_2T_Array
+	#define Rtl819XAGCTAB_2TArray				Rtl8192CEAGCTAB_2TArray
+	#define Rtl819XAGCTAB_1TArray				Rtl8192CEAGCTAB_1TArray
+	#define Rtl819XPHY_REG_2TArray				Rtl8192CEPHY_REG_2TArray
+	#define Rtl819XPHY_REG_1TArray				Rtl8192CEPHY_REG_1TArray
+	#define Rtl819XRadioA_2TArray				Rtl8192CERadioA_2TArray
+	#define Rtl819XRadioA_1TArray				Rtl8192CERadioA_1TArray
+	#define Rtl819XRadioB_2TArray				Rtl8192CERadioB_2TArray
+	#define Rtl819XRadioB_1TArray				Rtl8192CERadioB_1TArray
+	#define Rtl819XPHY_REG_Array_PG 			Rtl8192CEPHY_REG_Array_PG
+	#define Rtl819XPHY_REG_Array_MP 			Rtl8192CEPHY_REG_Array_MP
+
+#elif defined(CONFIG_USB_HCI)
+
+	#include "Hal8192CUHWImg.h"
+
+	//2TODO: We should define 8192S firmware related macro settings here!!
+	#define RTL819X_DEFAULT_RF_TYPE			RF_1T2R
+	#define RTL819X_TOTAL_RF_PATH				2
+
+	//TODO:  The following need to check!!
+	#define RTL8192C_FW_TSMC_IMG				"rtl8192CU\\rtl8192cfwT.bin"
+	#define RTL8192C_FW_UMC_IMG				"rtl8192CU\\rtl8192cfwU.bin"
+	#define RTL8192C_FW_UMC_B_IMG				"rtl8192CU\\rtl8192cfwU_B.bin"
+
+	//#define RTL819X_FW_BOOT_IMG   				"rtl8192CU\\boot.img"
+	//#define RTL819X_FW_MAIN_IMG				"rtl8192CU\\main.img"
+	//#define RTL819X_FW_DATA_IMG				"rtl8192CU\\data.img"
+
+	#define RTL8188C_PHY_REG					"rtl8188CU\\PHY_REG.txt"
+	#define RTL8188C_PHY_RADIO_A				"rtl8188CU\\radio_a.txt"
+	#define RTL8188C_PHY_RADIO_B				"rtl8188CU\\radio_b.txt"
+	#define RTL8188C_PHY_RADIO_A_mCard		"rtl8192CU\\radio_a_1T_mCard.txt"
+	#define RTL8188C_PHY_RADIO_B_mCard		"rtl8192CU\\radio_b_1T_mCard.txt" 
+	#define RTL8188C_PHY_RADIO_A_HP			"rtl8192CU\\radio_a_1T_HP.txt"
+	#define RTL8188C_AGC_TAB					"rtl8188CU\\AGC_TAB.txt"
+	#define RTL8188C_PHY_MACREG				"rtl8188CU\\MACREG.txt"
+
+	#define RTL8192C_PHY_REG					"rtl8192CU\\PHY_REG.txt"
+	#define RTL8192C_PHY_RADIO_A				"rtl8192CU\\radio_a.txt"
+	#define RTL8192C_PHY_RADIO_B				"rtl8192CU\\radio_b.txt"
+	#define RTL8192C_AGC_TAB					"rtl8192CU\\AGC_TAB.txt"
+	#define RTL8192C_PHY_MACREG				"rtl8192CU\\MACREG.txt"
+
+	#define RTL819X_PHY_REG_PG					"rtl8192CU\\PHY_REG_PG.txt"
+
+//---------------------------------------------------------------------
+//		RTL8723U From file
+//---------------------------------------------------------------------
+	#define RTL8723_FW_UMC_IMG				"rtl8723U\\rtl8723fw.bin"
+	#define RTL8723_PHY_REG					"rtl8723U\\PHY_REG_1T.txt" 
+	#define RTL8723_PHY_RADIO_A				"rtl8723U\\radio_a_1T.txt"
+	#define RTL8723_PHY_RADIO_B				"rtl8723U\\radio_b_1T.txt" 
+	#define RTL8723_AGC_TAB					"rtl8723U\\AGC_TAB_1T.txt"
+	#define RTL8723_PHY_MACREG 				"rtl8723U\\MAC_REG.txt"
+	#define RTL8723_PHY_MACREG 				"rtl8723U\\MAC_REG.txt"
+	#define RTL8723_PHY_REG_PG					"rtl8723U\\PHY_REG_PG.txt"
+	#define RTL8723_PHY_REG_MP					"rtl8723U\\PHY_REG_MP.txt"	
+
+	// The file name "_2T" is for 92CU, "_1T"  is for 88CU. Modified by tynli. 2009.11.24.
+	#define Rtl819XFwImageArray					Rtl8192CUFwTSMCImgArray
+	#define Rtl819XFwTSMCImageArray			Rtl8192CUFwTSMCImgArray
+	#define Rtl819XFwUMCACutImageArray			Rtl8192CUFwUMCACutImgArray
+	#define Rtl819XFwUMCBCutImageArray			Rtl8192CUFwUMCBCutImgArray
+
+	#define Rtl819XMAC_Array					Rtl8192CUMAC_2T_Array
+	#define Rtl819XAGCTAB_2TArray				Rtl8192CUAGCTAB_2TArray
+	#define Rtl819XAGCTAB_1TArray				Rtl8192CUAGCTAB_1TArray
+	#define Rtl819XAGCTAB_1T_HPArray			Rtl8192CUAGCTAB_1T_HPArray
+	#define Rtl819XPHY_REG_2TArray				Rtl8192CUPHY_REG_2TArray
+	#define Rtl819XPHY_REG_1TArray				Rtl8192CUPHY_REG_1TArray
+	#define Rtl819XPHY_REG_1T_mCardArray		Rtl8192CUPHY_REG_1T_mCardArray 					
+	#define Rtl819XPHY_REG_2T_mCardArray		Rtl8192CUPHY_REG_2T_mCardArray	
+	#define Rtl819XPHY_REG_1T_HPArray			Rtl8192CUPHY_REG_1T_HPArray
+	#define Rtl819XRadioA_2TArray				Rtl8192CURadioA_2TArray
+	#define Rtl819XRadioA_1TArray				Rtl8192CURadioA_1TArray
+	#define Rtl819XRadioA_1T_mCardArray		Rtl8192CURadioA_1T_mCardArray			
+	#define Rtl819XRadioB_2TArray				Rtl8192CURadioB_2TArray
+	#define Rtl819XRadioB_1TArray				Rtl8192CURadioB_1TArray	
+	#define Rtl819XRadioB_1T_mCardArray		Rtl8192CURadioB_1T_mCardArray
+	#define Rtl819XRadioA_1T_HPArray			Rtl8192CURadioA_1T_HPArray	
+	#define Rtl819XPHY_REG_Array_PG 			Rtl8192CUPHY_REG_Array_PG
+	#define Rtl819XPHY_REG_Array_PG_mCard 		Rtl8192CUPHY_REG_Array_PG_mCard			
+	#define Rtl819XPHY_REG_Array_PG_HP			Rtl8192CUPHY_REG_Array_PG_HP
+	#define Rtl819XPHY_REG_Array_MP 			Rtl8192CUPHY_REG_Array_MP
+#endif
+
+#define DRVINFO_SZ	4 // unit is 8bytes
+#define PageNum_128(_Len)		(u32)(((_Len)>>7) + ((_Len)&0x7F ? 1:0))
+
+#define FW_8192C_SIZE					16384+32//16k
+#define FW_8192C_START_ADDRESS		0x1000
+//#define FW_8192C_END_ADDRESS		0x3FFF //Filen said this is for test chip
+#define FW_8192C_END_ADDRESS		0x1FFF
+
+#define MAX_PAGE_SIZE			4096	// @ page : 4k bytes
+
+#define IS_FW_HEADER_EXIST(_pFwHdr)	((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x92C0 ||\
+									(le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88C0 ||\
+									(le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x2300)
+
+typedef enum _FIRMWARE_SOURCE{
+	FW_SOURCE_IMG_FILE = 0,
+	FW_SOURCE_HEADER_FILE = 1,		//from header file
+}FIRMWARE_SOURCE, *PFIRMWARE_SOURCE;
+
+typedef struct _RT_FIRMWARE{
+	FIRMWARE_SOURCE	eFWSource;
+	u8*			szFwBuffer;
+	u32			ulFwLength;
+}RT_FIRMWARE, *PRT_FIRMWARE, RT_FIRMWARE_92C, *PRT_FIRMWARE_92C;
+
+//
+// This structure must be cared byte-ordering
+//
+// Added by tynli. 2009.12.04.
+typedef struct _RT_8192C_FIRMWARE_HDR {//8-byte alinment required
+
+	//--- LONG WORD 0 ----
+	u16		Signature;	// 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut
+	u8		Category;	// AP/NIC and USB/PCI
+	u8		Function;	// Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions
+	u16		Version;		// FW Version
+	u8		Subversion;	// FW Subversion, default 0x00
+	u16		Rsvd1;
+
+
+	//--- LONG WORD 1 ----
+	u8		Month;	// Release time Month field
+	u8		Date;	// Release time Date field
+	u8		Hour;	// Release time Hour field
+	u8		Minute;	// Release time Minute field
+	u16		RamCodeSize;	// The size of RAM code
+	u16		Rsvd2;
+
+	//--- LONG WORD 2 ----
+	u32		SvnIdx;	// The SVN entry index
+	u32		Rsvd3;
+
+	//--- LONG WORD 3 ----
+	u32		Rsvd4;
+	u32		Rsvd5;
+
+}RT_8192C_FIRMWARE_HDR, *PRT_8192C_FIRMWARE_HDR;
+
+#define DRIVER_EARLY_INT_TIME		0x05
+#define BCN_DMA_ATIME_INT_TIME		0x02
+
+#ifdef CONFIG_USB_RX_AGGREGATION
+
+typedef enum _USB_RX_AGG_MODE{
+	USB_RX_AGG_DISABLE,
+	USB_RX_AGG_DMA,
+	USB_RX_AGG_USB,
+	USB_RX_AGG_MIX
+}USB_RX_AGG_MODE;
+
+#define MAX_RX_DMA_BUFFER_SIZE	10240		// 10K for 8192C RX DMA buffer
+
+#endif
+
+
+#define TX_SELE_HQ			BIT(0)		// High Queue
+#define TX_SELE_LQ			BIT(1)		// Low Queue
+#define TX_SELE_NQ			BIT(2)		// Normal Queue
+
+
+// Note: We will divide number of page equally for each queue other than public queue!
+
+#define TX_TOTAL_PAGE_NUMBER		0xF8
+#define TX_PAGE_BOUNDARY		(TX_TOTAL_PAGE_NUMBER + 1)
+
+// For Normal Chip Setting
+// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER
+#define NORMAL_PAGE_NUM_PUBQ			0xE7
+#define NORMAL_PAGE_NUM_HPQ			0x0C
+#define NORMAL_PAGE_NUM_LPQ			0x02
+#define NORMAL_PAGE_NUM_NPQ			0x02
+
+
+// For Test Chip Setting
+// (HPQ + LPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER
+#define TEST_PAGE_NUM_PUBQ		0x7E
+
+
+// For Test Chip Setting
+#define WMM_TEST_TX_TOTAL_PAGE_NUMBER	0xF5
+#define WMM_TEST_TX_PAGE_BOUNDARY	(WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6
+
+#define WMM_TEST_PAGE_NUM_PUBQ		0xA3
+#define WMM_TEST_PAGE_NUM_HPQ		0x29
+#define WMM_TEST_PAGE_NUM_LPQ		0x29
+
+
+//Note: For Normal Chip Setting ,modify later
+#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER	0xF5
+#define WMM_NORMAL_TX_PAGE_BOUNDARY	(WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6
+
+#define WMM_NORMAL_PAGE_NUM_PUBQ		0xB0
+#define WMM_NORMAL_PAGE_NUM_HPQ		0x29
+#define WMM_NORMAL_PAGE_NUM_LPQ			0x1C
+#define WMM_NORMAL_PAGE_NUM_NPQ		0x1C
+
+//-------------------------------------------------------------------------
+//	Chip specific
+//-------------------------------------------------------------------------
+#define CHIP_BONDING_IDENTIFIER(_value)	(((_value)>>22)&0x3)
+#define CHIP_BONDING_92C_1T2R	0x1
+#define CHIP_BONDING_88C_USB_MCARD	0x2
+#define CHIP_BONDING_88C_USB_HP	0x1
+
+//
+// 2011.01.06. Define new structure of chip version for RTL8723 and so on. Added by tynli.
+//
+/*
+     | BIT15:12           |  BIT11:8        | BIT 7              |  BIT6:4  |      BIT3          | BIT2:0  |
+     |-------------+-----------+-----------+-------+-----------+-------|
+     | IC version(CUT)  | ROM version  | Manufacturer  | RF type  |  Chip type       | IC Type |
+     |                           |                      | TSMC/UMC    |              | TEST/NORMAL|             |
+*/
+// [15:12] IC version(CUT): A-cut=0, B-cut=1, C-cut=2, D-cut=3
+// [7] Manufacturer: TSMC=0, UMC=1
+// [6:4] RF type: 1T1R=0, 1T2R=1, 2T2R=2
+// [3] Chip type: TEST=0, NORMAL=1
+// [2:0] IC type: 81xxC=0, 8723=1, 92D=2
+
+#define CHIP_8723						BIT(0)
+#define CHIP_92D						BIT(1)
+#define NORMAL_CHIP  					BIT(3)
+#define RF_TYPE_1T1R					(~(BIT(4)|BIT(5)|BIT(6)))
+#define RF_TYPE_1T2R					BIT(4)
+#define RF_TYPE_2T2R					BIT(5)
+#define CHIP_VENDOR_UMC				BIT(7)
+#define B_CUT_VERSION					BIT(12)
+#define C_CUT_VERSION					BIT(13)
+#define D_CUT_VERSION					((BIT(13)|BIT(14)))
+
+
+// MASK
+#define IC_TYPE_MASK					(BIT(0)|BIT(1)|BIT(2))
+#define CHIP_TYPE_MASK 				BIT(3)
+#define RF_TYPE_MASK					(BIT(4)|BIT(5)|BIT(6))
+#define MANUFACTUER_MASK			BIT(7)	
+#define ROM_VERSION_MASK				(BIT(11)|BIT(10)|BIT(9)|BIT(8))
+#define CUT_VERSION_MASK				(BIT(15)|BIT(14)|BIT(13)|BIT(12))
+
+// Get element
+#define GET_CVID_IC_TYPE(version)			((version) & IC_TYPE_MASK)
+#define GET_CVID_CHIP_TYPE(version)			((version) & CHIP_TYPE_MASK)
+#define GET_CVID_RF_TYPE(version)			((version) & RF_TYPE_MASK)
+#define GET_CVID_MANUFACTUER(version)		((version) & MANUFACTUER_MASK)
+#define GET_CVID_ROM_VERSION(version)		((version) & ROM_VERSION_MASK)
+#define GET_CVID_CUT_VERSION(version)		((version) & CUT_VERSION_MASK)
+
+#define IS_81XXC(version)					((GET_CVID_IC_TYPE(version) == 0)? _TRUE : _FALSE)
+#define IS_8723_SERIES(version)				((GET_CVID_IC_TYPE(version) == CHIP_8723)? _TRUE : _FALSE)
+#define IS_92D(version)						((GET_CVID_IC_TYPE(version) == CHIP_92D)? _TRUE : _FALSE)
+#define IS_1T1R(version)						((GET_CVID_RF_TYPE(version))? _FALSE : _TRUE)
+#define IS_1T2R(version)						((GET_CVID_RF_TYPE(version) == RF_TYPE_1T2R)? _TRUE : _FALSE)
+#define IS_2T2R(version)						((GET_CVID_RF_TYPE(version) == RF_TYPE_2T2R)? _TRUE : _FALSE)
+#define IS_NORMAL_CHIP(version)				((GET_CVID_CHIP_TYPE(version))? _TRUE: _FALSE)
+#define IS_CHIP_VENDOR_UMC(version)			((GET_CVID_MANUFACTUER(version))? _TRUE: _FALSE)
+
+#define IS_81XXC_TEST_CHIP(version)			((IS_81XXC(version) && (!IS_NORMAL_CHIP(version)))? _TRUE: _FALSE)
+#define IS_92D_TEST_CHIP(version)				((IS_92D(version) && (!IS_NORMAL_CHIP(version)))? _TRUE: _FALSE)
+#define IS_92C_SERIAL(version)   				((IS_81XXC(version) && IS_2T2R(version)) ? _TRUE : _FALSE)
+#define IS_VENDOR_UMC_A_CUT(version)		((IS_CHIP_VENDOR_UMC(version)) ? ((GET_CVID_CUT_VERSION(version)) ? _FALSE : _TRUE) : _FALSE)
+#define IS_VENDOR_8723_A_CUT(version)		((IS_8723_SERIES(version)) ? ((GET_CVID_CUT_VERSION(version)) ? _FALSE : _TRUE) : _FALSE)
+// <tynli_Note> 88/92C UMC B-cut vendor is set to TSMC so we need to check CHIP_VENDOR_UMC bit is not 1. 
+#define IS_81xxC_VENDOR_UMC_B_CUT(version)	((IS_CHIP_VENDOR_UMC(version)) ? ((GET_CVID_CUT_VERSION(version) == B_CUT_VERSION) ? _TRUE : _FALSE):_FALSE)
+#define IS_92D_SINGLEPHY(version)     			((IS_92D(version)) ? (IS_2T2R(version) ? _TRUE: _FALSE) : _FALSE)
+#define IS_92D_C_CUT(version)    				((IS_92D(version)) ? ((GET_CVID_CUT_VERSION(version) == 0x2) ? _TRUE : _FALSE) : _FALSE)
+#define IS_92D_D_CUT(version)    				((IS_92D(version)) ? ((GET_CVID_CUT_VERSION(version) == 0x3) ? _TRUE : _FALSE) : _FALSE)
+
+typedef enum _VERSION_8192C{
+	VERSION_TEST_CHIP_88C = 0x0000,
+	VERSION_TEST_CHIP_92C = 0x0020,
+	VERSION_TEST_UMC_CHIP_8723 = 0x0081,
+	VERSION_NORMAL_TSMC_CHIP_88C = 0x0008, 
+	VERSION_NORMAL_TSMC_CHIP_92C = 0x0028,
+	VERSION_NORMAL_TSMC_CHIP_92C_1T2R = 0x0018,
+	VERSION_NORMAL_UMC_CHIP_88C_A_CUT = 0x0088,
+	VERSION_NORMAL_UMC_CHIP_92C_A_CUT = 0x00a8,
+	VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT = 0x0098,		
+	VERSION_NORMAL_UMC_CHIP_8723_1T1R_A_CUT = 0x0089,
+	VERSION_NORMAL_UMC_CHIP_8723_1T1R_B_CUT = 0x1089,	
+	VERSION_NORMAL_UMC_CHIP_88C_B_CUT = 0x1088, 
+	VERSION_NORMAL_UMC_CHIP_92C_B_CUT = 0x10a8, 
+	VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT = 0x1090, 
+	VERSION_TEST_CHIP_92D_SINGLEPHY= 0x0022,
+	VERSION_TEST_CHIP_92D_DUALPHY = 0x0002,
+	VERSION_NORMAL_CHIP_92D_SINGLEPHY= 0x002a,
+	VERSION_NORMAL_CHIP_92D_DUALPHY = 0x000a,
+	VERSION_NORMAL_CHIP_92D_C_CUT_SINGLEPHY = 0x202a,
+	VERSION_NORMAL_CHIP_92D_C_CUT_DUALPHY = 0x200a,
+	VERSION_NORMAL_CHIP_92D_D_CUT_SINGLEPHY = 0x302a,
+	VERSION_NORMAL_CHIP_92D_D_CUT_DUALPHY = 0x300a,
+}VERSION_8192C,*PVERSION_8192C;
+
+
+
+//-------------------------------------------------------------------------
+//	Channel Plan
+//-------------------------------------------------------------------------
+enum ChannelPlan{
+	CHPL_FCC	= 0,
+	CHPL_IC		= 1,
+	CHPL_ETSI	= 2,
+	CHPL_SPAIN	= 3,
+	CHPL_FRANCE	= 4,
+	CHPL_MKK	= 5,
+	CHPL_MKK1	= 6,
+	CHPL_ISRAEL	= 7,
+	CHPL_TELEC	= 8,
+	CHPL_GLOBAL	= 9,
+	CHPL_WORLD	= 10,
+};
+
+typedef struct _TxPowerInfo{
+	u8 CCKIndex[RF90_PATH_MAX][CHANNEL_GROUP_MAX];
+	u8 HT40_1SIndex[RF90_PATH_MAX][CHANNEL_GROUP_MAX];
+	u8 HT40_2SIndexDiff[RF90_PATH_MAX][CHANNEL_GROUP_MAX];
+	u8 HT20IndexDiff[RF90_PATH_MAX][CHANNEL_GROUP_MAX];
+	u8 OFDMIndexDiff[RF90_PATH_MAX][CHANNEL_GROUP_MAX];
+	u8 HT40MaxOffset[RF90_PATH_MAX][CHANNEL_GROUP_MAX];
+	u8 HT20MaxOffset[RF90_PATH_MAX][CHANNEL_GROUP_MAX];
+	u8 TSSI_A;
+	u8 TSSI_B;
+}TxPowerInfo, *PTxPowerInfo;
+
+#define		EFUSE_REAL_CONTENT_LEN		512
+#define		EFUSE_MAP_LEN					128
+#define		EFUSE_MAX_SECTION			16
+#define		EFUSE_IC_ID_OFFSET			506	//For some inferiority IC purpose. added by Roger, 2009.09.02.
+#define 		AVAILABLE_EFUSE_ADDR(addr) 	(addr < EFUSE_REAL_CONTENT_LEN)
+//
+// <Roger_Notes> To prevent out of boundary programming case, leave 1byte and program full section
+// 9bytes + 1byt + 5bytes and pre 1byte.
+// For worst case:
+// | 1byte|----8bytes----|1byte|--5bytes--| 
+// |         |            Reserved(14bytes)	      |
+//
+#define		EFUSE_OOB_PROTECT_BYTES 		15	// PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte.
+
+
+#define		EFUSE_MAP_LEN_8723			256
+#define		EFUSE_MAX_SECTION_8723		32
+
+//========================================================
+//			EFUSE for BT definition
+//========================================================
+#define		EFUSE_BT_REAL_CONTENT_LEN		1536	// 512*3
+#define		EFUSE_BT_MAP_LEN					1024	// 1k bytes
+#define		EFUSE_BT_MAX_SECTION				128		// 1024/8
+
+#define		EFUSE_PROTECT_BYTES_BANK			16
+
+//
+// <Roger_Notes> For RTL8723 WiFi/BT/GPS multi-function configuration. 2010.10.06.
+//
+typedef enum _RT_MULTI_FUNC{
+	RT_MULTI_FUNC_NONE = 0x00,
+	RT_MULTI_FUNC_WIFI = 0x01,
+	RT_MULTI_FUNC_BT = 0x02,
+	RT_MULTI_FUNC_GPS = 0x04,
+}RT_MULTI_FUNC,*PRT_MULTI_FUNC;
+
+//
+// <Roger_Notes> For RTL8723 WiFi PDn/GPIO polarity control configuration. 2010.10.08.
+//
+typedef enum _RT_POLARITY_CTL{
+	RT_POLARITY_LOW_ACT = 0,
+	RT_POLARITY_HIGH_ACT = 1,	
+}RT_POLARITY_CTL,*PRT_POLARITY_CTL;
+
+// For RTL8723 regulator mode. by tynli. 2011.01.14.
+typedef enum _RT_REGULATOR_MODE{
+	RT_SWITCHING_REGULATOR = 0,
+	RT_LDO_REGULATOR = 1,	
+}RT_REGULATOR_MODE,*PRT_REGULATOR_MODE;
+
+#ifdef CONFIG_PCI_HCI
+struct hal_data_8192ce
+{
+	VERSION_8192C		VersionID;
+	RT_MULTI_FUNC		MultiFunc; // For multi-function consideration.
+	RT_POLARITY_CTL		PolarityCtl; // For Wifi PDn Polarity control.
+	RT_REGULATOR_MODE	RegulatorMode; // switching regulator or LDO
+	u16	CustomerID;
+
+	u16	FirmwareVersion;
+	u16	FirmwareVersionRev;
+	u16	FirmwareSubVersion;
+
+	u32	IntrMask[2];
+	u32	IntrMaskToSet[2];
+
+	u32	DisabledFunctions;
+	
+	//current WIFI_PHY values
+	u32	ReceiveConfig;
+	u32	TransmitConfig;
+	WIRELESS_MODE		CurrentWirelessMode;
+	HT_CHANNEL_WIDTH	CurrentChannelBW;
+	u8	CurrentChannel;
+	u8	nCur40MhzPrimeSC;// Control channel sub-carrier
+
+	u16	BasicRateSet;
+
+	//rf_ctrl
+	_lock	rf_lock;
+	u8	rf_chip;
+	u8	rf_type;
+	u8	NumTotalRFPath;
+
+	INTERFACE_SELECT_8192CPCIe	InterfaceSel;
+
+	//
+	// EEPROM setting.
+	//
+	u16	EEPROMVID;
+	u16	EEPROMDID;
+	u16	EEPROMSVID;
+	u16	EEPROMSMID;
+	u16	EEPROMChannelPlan;
+	u16	EEPROMVersion;
+
+	u8	EEPROMChnlAreaTxPwrCCK[2][3];	
+	u8	EEPROMChnlAreaTxPwrHT40_1S[2][3];	
+	u8	EEPROMChnlAreaTxPwrHT40_2SDiff[2][3];
+	u8	EEPROMPwrLimitHT20[3];
+	u8	EEPROMPwrLimitHT40[3];
+
+	u8	bTXPowerDataReadFromEEPORM;
+	u8	EEPROMThermalMeter;
+	u8	EEPROMTSSI[2];
+
+	u8	EEPROMCustomerID;
+	u8	EEPROMBoardType;
+	u8	EEPROMRegulatory;
+
+	u8	bDefaultAntenna;
+	u8	bIQKInitialized;
+
+	u8	TxPwrLevelCck[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];
+	u8	TxPwrLevelHT40_1S[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];	// For HT 40MHZ pwr
+	u8	TxPwrLevelHT40_2S[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];	// For HT 40MHZ pwr	
+	u8	TxPwrHt20Diff[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff
+	u8	TxPwrLegacyHtDiff[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];// For HT<->legacy pwr diff
+	// For power group
+	u8	PwrGroupHT20[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];
+	u8	PwrGroupHT40[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];
+
+	u8	LegacyHTTxPowerDiff;// Legacy to HT rate power diff
+
+#ifdef CONFIG_BT_COEXIST
+	struct btcoexist_priv	bt_coexist;
+#endif
+
+	// Read/write are allow for following hardware information variables
+	u8	framesync;
+	u32	framesyncC34;
+	u8	framesyncMonitor;
+	u8	DefaultInitialGain[4];
+	u8	pwrGroupCnt;
+	u32	MCSTxPowerLevelOriginalOffset[7][16];
+	u32	CCKTxPowerLevelOriginalOffset;
+
+	u32	AntennaTxPath;					// Antenna path Tx
+	u32	AntennaRxPath;					// Antenna path Rx
+	u8	BluetoothCoexist;
+	u8	ExternalPA;
+
+	//u32	LedControlNum;
+	//u32	LedControlMode;
+	u8	bLedOpenDrain; // Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16.
+	//u32	TxPowerTrackControl;
+	u8	b1x1RecvCombine;	// for 1T1R receive combining
+
+	u8	bCurrentTurboEDCA;
+	u32	AcParam_BE; //Original parameter for BE, use for EDCA turbo.
+
+	//vivi, for tx power tracking, 20080407
+	//u16	TSSI_13dBm;
+	//u32	Pwr_Track;
+	// The current Tx Power Level
+	u8	CurrentCckTxPwrIdx;
+	u8	CurrentOfdm24GTxPwrIdx;
+
+	BB_REGISTER_DEFINITION_T	PHYRegDef[4];	//Radio A/B/C/D
+
+	BOOLEAN		bRFPathRxEnable[4];	// We support 4 RF path now.
+
+	u32	RfRegChnlVal[2];
+
+	u8	bCckHighPower;
+
+	//RDG enable
+	BOOLEAN	 bRDGEnable;
+
+	//for host message to fw
+	u8	LastHMEBoxNum;
+
+	u8	fw_ractrl;
+	u8	RegTxPause;
+	// Beacon function related global variable.
+	u32	RegBcnCtrlVal;
+	u8	RegFwHwTxQCtrl;
+	u8	RegReg542;
+	u8	CurAntenna;	
+	u8	AntDivCfg;
+
+#ifdef CONFIG_SW_ANTENNA_DIVERSITY
+	//SW Antenna Switch
+	s32				RSSI_sum_A;
+	s32				RSSI_sum_B;
+	s32				RSSI_cnt_A;
+	s32				RSSI_cnt_B;
+	BOOLEAN		RSSI_test;
+#endif
+#ifdef CONFIG_HW_ANTENNA_DIVERSITY
+	//Hybrid Antenna Diversity
+	u32				CCK_Ant1_Cnt;
+	u32				CCK_Ant2_Cnt;
+	u32				OFDM_Ant1_Cnt;
+	u32				OFDM_Ant2_Cnt;
+#endif
+
+	struct dm_priv	dmpriv;
+	u8	bDumpRxPkt;//for debug
+#ifdef DBG_CONFIG_ERROR_DETECT
+	struct sreset_priv srestpriv;
+#endif
+	u8	bInterruptMigration;
+	u8	bDisableTxInt;
+	u8	bGpioHwWpsPbc;
+
+	u8	FwRsvdPageStartOffset; //2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ.
+
+	u16	EfuseUsedBytes;
+	
+#ifdef CONFIG_P2P
+	struct P2P_PS_Offload_t	p2p_ps_offload;
+#endif //CONFIG_P2P
+};
+
+typedef struct hal_data_8192ce HAL_DATA_TYPE, *PHAL_DATA_TYPE;
+
+//
+// Function disabled.
+//
+#define DF_TX_BIT		BIT0
+#define DF_RX_BIT		BIT1
+#define DF_IO_BIT		BIT2
+#define DF_IO_D3_BIT			BIT3
+
+#define RT_DF_TYPE		u32
+#define RT_DISABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions |= ((RT_DF_TYPE)(__FuncBits)))
+#define RT_ENABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions &= (~((RT_DF_TYPE)(__FuncBits))))
+#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) )
+#define IS_MULTI_FUNC_CHIP(_Adapter)	(((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE)
+
+void InterruptRecognized8192CE(PADAPTER Adapter, PRT_ISR_CONTENT pIsrContent);
+VOID UpdateInterruptMask8192CE(PADAPTER Adapter, u32 AddMSR, u32 RemoveMSR);
+#endif
+
+#ifdef CONFIG_USB_HCI
+struct hal_data_8192cu
+{
+	VERSION_8192C		VersionID;
+	RT_MULTI_FUNC		MultiFunc; // For multi-function consideration.
+	RT_POLARITY_CTL		PolarityCtl; // For Wifi PDn Polarity control.
+	RT_REGULATOR_MODE	RegulatorMode; // switching regulator or LDO
+	u16	CustomerID;
+
+	u16	FirmwareVersion;
+	u16	FirmwareVersionRev;
+	u16	FirmwareSubVersion;
+
+	//current WIFI_PHY values
+	u32	ReceiveConfig;
+	WIRELESS_MODE		CurrentWirelessMode;
+	HT_CHANNEL_WIDTH	CurrentChannelBW;
+	u8	CurrentChannel;
+	u8	nCur40MhzPrimeSC;// Control channel sub-carrier
+
+	u16	BasicRateSet;
+
+	//rf_ctrl
+	u8	rf_chip;
+	u8	rf_type;
+	u8	NumTotalRFPath;
+
+	u8	BoardType;
+	//INTERFACE_SELECT_8192CUSB	InterfaceSel;
+
+	//
+	// EEPROM setting.
+	//
+	u16	EEPROMVID;
+	u16	EEPROMPID;
+	u16	EEPROMSVID;
+	u16	EEPROMSDID;
+	u8	EEPROMCustomerID;
+	u8	EEPROMSubCustomerID;
+	u8	EEPROMVersion;
+	u8	EEPROMRegulatory;
+
+	u8	bTXPowerDataReadFromEEPORM;
+	u8	EEPROMThermalMeter;
+
+	u8	bIQKInitialized;
+
+	u8	TxPwrLevelCck[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];
+	u8	TxPwrLevelHT40_1S[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];	// For HT 40MHZ pwr
+	u8	TxPwrLevelHT40_2S[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];	// For HT 40MHZ pwr	
+	u8	TxPwrHt20Diff[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff
+	u8	TxPwrLegacyHtDiff[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];// For HT<->legacy pwr diff
+	// For power group
+	u8	PwrGroupHT20[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];
+	u8	PwrGroupHT40[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];
+
+	u8	LegacyHTTxPowerDiff;// Legacy to HT rate power diff
+
+	// Read/write are allow for following hardware information variables
+	u8	framesync;
+	u32	framesyncC34;
+	u8	framesyncMonitor;
+	u8	DefaultInitialGain[4];
+	u8	pwrGroupCnt;
+	u32	MCSTxPowerLevelOriginalOffset[7][16];
+	u32	CCKTxPowerLevelOriginalOffset;
+
+	u32	AntennaTxPath;					// Antenna path Tx
+	u32	AntennaRxPath;					// Antenna path Rx
+	u8	BluetoothCoexist;
+	u8	ExternalPA;
+
+	u8	bLedOpenDrain; // Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16.
+
+	//u32	LedControlNum;
+	//u32	LedControlMode;
+	//u32	TxPowerTrackControl;
+	u8	b1x1RecvCombine;	// for 1T1R receive combining
+
+	u8	bCurrentTurboEDCA;
+	u32	AcParam_BE; //Original parameter for BE, use for EDCA turbo.
+
+	//vivi, for tx power tracking, 20080407
+	//u16	TSSI_13dBm;
+	//u32	Pwr_Track;
+	// The current Tx Power Level
+	u8	CurrentCckTxPwrIdx;
+	u8	CurrentOfdm24GTxPwrIdx;
+
+	BB_REGISTER_DEFINITION_T	PHYRegDef[4];	//Radio A/B/C/D
+
+	BOOLEAN		bRFPathRxEnable[4];	// We support 4 RF path now.
+
+	u32	RfRegChnlVal[2];
+
+	u8	bCckHighPower;
+
+	//RDG enable
+	BOOLEAN	 bRDGEnable;
+
+	//for host message to fw
+	u8	LastHMEBoxNum;
+
+	u8	fw_ractrl;
+	u8	RegTxPause;
+	// Beacon function related global variable.
+	u32	RegBcnCtrlVal;
+	u8	RegFwHwTxQCtrl;
+	u8	RegReg542;
+
+	struct dm_priv	dmpriv;
+#ifdef DBG_CONFIG_ERROR_DETECT
+	struct sreset_priv srestpriv;
+#endif	
+
+#ifdef CONFIG_BT_COEXIST
+	struct btcoexist_priv	bt_coexist;
+#endif
+	u8	CurAntenna;	
+	u8	AntDivCfg;
+
+#ifdef CONFIG_SW_ANTENNA_DIVERSITY
+	//SW Antenna Switch
+	s32				RSSI_sum_A;
+	s32				RSSI_sum_B;
+	s32				RSSI_cnt_A;
+	s32				RSSI_cnt_B;
+	BOOLEAN		RSSI_test;
+#endif
+#ifdef CONFIG_HW_ANTENNA_DIVERSITY
+	//Hybrid Antenna Diversity
+	u32				CCK_Ant1_Cnt;
+	u32				CCK_Ant2_Cnt;
+	u32				OFDM_Ant1_Cnt;
+	u32				OFDM_Ant2_Cnt;
+#endif
+
+	u8	bDumpRxPkt;//for debug
+	u8	FwRsvdPageStartOffset; //2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ.
+
+	// 2010/08/09 MH Add CU power down mode.
+	BOOLEAN		pwrdown;
+
+	// For 92C USB endpoint setting
+	//
+
+	u32	UsbBulkOutSize;
+
+	int	RtBulkOutPipe[3];
+	int	RtBulkInPipe;
+	int	RtIntInPipe;
+	// Add for dual MAC  0--Mac0 1--Mac1
+	u32	interfaceIndex;
+
+	u8	OutEpQueueSel;
+	u8	OutEpNumber;
+
+	u8	Queue2EPNum[8];//for out endpoint number mapping
+
+#ifdef CONFIG_USB_TX_AGGREGATION
+	u8	UsbTxAggMode;
+	u8	UsbTxAggDescNum;
+#endif
+#ifdef CONFIG_USB_RX_AGGREGATION
+	u16	HwRxPageSize;				// Hardware setting
+	u32	MaxUsbRxAggBlock;
+
+	USB_RX_AGG_MODE	UsbRxAggMode;
+	u8	UsbRxAggBlockCount;			// USB Block count. Block size is 512-byte in hight speed and 64-byte in full speed
+	u8	UsbRxAggBlockTimeout;
+	u8	UsbRxAggPageCount;			// 8192C DMA page count
+	u8	UsbRxAggPageTimeout;
+#endif
+
+	// 2010/12/10 MH Add for USB aggreation mode dynamic shceme.
+	BOOLEAN		UsbRxHighSpeedMode;
+
+	// 2010/11/22 MH Add for slim combo debug mode selective.
+	// This is used for fix the drawback of CU TSMC-A/UMC-A cut. HW auto suspend ability. Close BT clock.
+	BOOLEAN		SlimComboDbg;
+
+	u16	EfuseUsedBytes;
+
+#ifdef CONFIG_P2P
+	struct P2P_PS_Offload_t	p2p_ps_offload;
+#endif //CONFIG_P2P
+};
+
+typedef struct hal_data_8192cu HAL_DATA_TYPE, *PHAL_DATA_TYPE;
+#endif
+
+#define GET_HAL_DATA(__pAdapter)	((HAL_DATA_TYPE *)((__pAdapter)->HalData))
+#define GET_RF_TYPE(priv)	(GET_HAL_DATA(priv)->rf_type)
+
+#define INCLUDE_MULTI_FUNC_BT(_Adapter)	(GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT)
+#define INCLUDE_MULTI_FUNC_GPS(_Adapter)	(GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS)
+
+VOID rtl8192c_FirmwareSelfReset(IN PADAPTER Adapter);
+int FirmwareDownload92C(IN PADAPTER Adapter);
+VOID InitializeFirmwareVars92C(PADAPTER Adapter);
+u8 GetEEPROMSize8192C(PADAPTER Adapter);
+RT_CHANNEL_DOMAIN _HalMapChannelPlan8192C(PADAPTER Adapter, u8 HalChannelPlan);
+VERSION_8192C rtl8192c_ReadChipVersion(IN PADAPTER Adapter);
+void rtl8192c_ReadBluetoothCoexistInfo(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail);
+void rtl8192c_HalSetBrateCfg(PADAPTER Adapter, u8 *mBratesOS, u16 *pBrateCfg);
+//void rtl8192c_free_hal_data(_adapter * padapter);
+VOID rtl8192c_EfuseParseIDCode(PADAPTER pAdapter, u8 *hwinfo);
+void rtl8192c_set_hal_ops(struct hal_ops *pHalFunc);
+
+#endif
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192c_led.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192c_led.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192c_led.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192c_led.h	2017-09-23 03:42:50.038675003 +0800
@@ -0,0 +1,43 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef __RTL8192C_LED_H_
+#define __RTL8192C_LED_H_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+
+//================================================================================
+// Interface to manipulate LED objects.
+//================================================================================
+#ifdef CONFIG_USB_HCI
+void rtl8192cu_InitSwLeds(_adapter *padapter);
+void rtl8192cu_DeInitSwLeds(_adapter *padapter);
+#endif
+#ifdef CONFIG_PCI_HCI
+void rtl8192ce_gen_RefreshLedState(PADAPTER Adapter);
+void rtl8192ce_InitSwLeds(_adapter *padapter);
+void rtl8192ce_DeInitSwLeds(_adapter *padapter);
+#endif
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192c_recv.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192c_recv.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192c_recv.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192c_recv.h	2017-09-23 03:42:50.038675003 +0800
@@ -0,0 +1,180 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef _RTL8192C_RECV_H_
+#define _RTL8192C_RECV_H_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+
+#ifdef PLATFORM_OS_XP
+	#define NR_RECVBUFF (16)
+#elif defined(PLATFORM_OS_CE)
+	#define NR_RECVBUFF (4)
+#else
+
+	#define NR_RECVBUFF (4)
+
+	#define NR_PREALLOC_RECV_SKB (8)
+#endif
+
+
+#define RECV_BLK_SZ 512
+#define RECV_BLK_CNT 16
+#define RECV_BLK_TH RECV_BLK_CNT
+
+#if defined(CONFIG_USB_HCI)
+
+#ifdef PLATFORM_OS_CE
+#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k
+#else
+	#ifndef CONFIG_MINIMAL_MEMORY_USAGE
+		//#define MAX_RECVBUF_SZ (32768) // 32k
+		//#define MAX_RECVBUF_SZ (16384) //16K
+		//#define MAX_RECVBUF_SZ (10240) //10K
+		#define MAX_RECVBUF_SZ (15360) // 15k < 16k
+		//#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k
+	#else
+		#define MAX_RECVBUF_SZ (4000) // about 4K
+	#endif
+#endif
+
+#elif defined(CONFIG_PCI_HCI)
+#ifndef CONFIG_MINIMAL_MEMORY_USAGE
+	#define MAX_RECVBUF_SZ (9100)
+#else
+	#define MAX_RECVBUF_SZ (4000) // about 4K
+#endif
+
+#define RX_MPDU_QUEUE				0
+#define RX_CMD_QUEUE				1
+#define RX_MAX_QUEUE				2
+#endif
+
+
+#define RECV_BULK_IN_ADDR		0x80
+#define RECV_INT_IN_ADDR		0x81
+
+#define PHY_RSSI_SLID_WIN_MAX				100
+#define PHY_LINKQUALITY_SLID_WIN_MAX		20
+
+
+struct phy_stat
+{
+	unsigned int phydw0;
+
+	unsigned int phydw1;
+
+	unsigned int phydw2;
+
+	unsigned int phydw3;
+
+	unsigned int phydw4;
+
+	unsigned int phydw5;
+
+	unsigned int phydw6;
+
+	unsigned int phydw7;
+};
+
+typedef struct _Phy_OFDM_Rx_Status_Report_8192cd
+{
+	unsigned char	trsw_gain_X[4];
+	unsigned char	pwdb_all;
+	unsigned char	cfosho_X[4];
+	unsigned char	cfotail_X[4];
+	unsigned char	rxevm_X[2];
+	unsigned char	rxsnr_X[4];
+	unsigned char	pdsnr_X[2];
+	unsigned char	csi_current_X[2];
+	unsigned char	csi_target_X[2];
+	unsigned char	sigevm;
+	unsigned char	max_ex_pwr;
+//#ifdef RTL8192SE
+#ifdef CONFIG_LITTLE_ENDIAN
+	unsigned char ex_intf_flg:1;
+	unsigned char sgi_en:1;
+	unsigned char rxsc:2;
+	//unsigned char rsvd:4;
+	unsigned char idle_long:1;
+	unsigned char r_ant_train_en:1;
+	unsigned char ANTSELB:1;
+	unsigned char ANTSEL:1;	
+#else	// _BIG_ENDIAN_
+	//unsigned char rsvd:4;
+	unsigned char ANTSEL:1;	
+	unsigned char ANTSELB:1;
+	unsigned char r_ant_train_en:1;
+	unsigned char idle_long:1;
+	unsigned char rxsc:2;
+	unsigned char sgi_en:1;
+	unsigned char ex_intf_flg:1;
+#endif
+//#else	// RTL8190, RTL8192E
+//	unsigned char	sgi_en;
+//	unsigned char	rxsc_sgien_exflg;
+//#endif
+} __attribute__ ((packed))PHY_STS_OFDM_8192CD_T,PHY_RX_DRIVER_INFO_8192CD;
+
+typedef struct _Phy_CCK_Rx_Status_Report_8192cd
+{
+	/* For CCK rate descriptor. This is a signed 8:1 variable. LSB bit presend
+		0.5. And MSB 7 bts presend a signed value. Range from -64~+63.5. */
+	u8	adc_pwdb_X[4];
+	u8	SQ_rpt;
+	u8	cck_agc_rpt;
+} PHY_STS_CCK_8192CD_T;
+
+
+// Rx smooth factor
+#define	Rx_Smooth_Factor (20)
+
+
+#ifdef CONFIG_USB_HCI
+typedef struct _INTERRUPT_MSG_FORMAT_EX{
+	unsigned int C2H_MSG0;
+	unsigned int C2H_MSG1;
+	unsigned int C2H_MSG2;
+	unsigned int C2H_MSG3;
+	unsigned int HISR; // from HISR Reg0x124, read to clear
+	unsigned int HISRE;// from HISRE Reg0x12c, read to clear
+	unsigned int  MSG_EX;
+}INTERRUPT_MSG_FORMAT_EX,*PINTERRUPT_MSG_FORMAT_EX;
+
+void rtl8192cu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf);
+int	rtl8192cu_init_recv_priv(_adapter * padapter);
+void rtl8192cu_free_recv_priv(_adapter * padapter);
+void rtl8192cu_update_recvframe_attrib_from_recvstat(union recv_frame *precvframe, struct recv_stat *prxstat);
+#endif
+
+#ifdef CONFIG_PCI_HCI
+int	rtl8192ce_init_recv_priv(_adapter * padapter);
+void rtl8192ce_free_recv_priv(_adapter * padapter);
+void rtl8192ce_update_recvframe_attrib_from_recvstat(union recv_frame *precvframe, struct recv_stat *prxstat);
+#endif
+
+void rtl8192c_query_rx_phy_status(union recv_frame *prframe, struct phy_stat *pphy_stat);
+void rtl8192c_process_phy_info(_adapter *padapter, void *prframe);
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192c_rf.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192c_rf.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192c_rf.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192c_rf.h	2017-09-23 03:42:50.038675003 +0800
@@ -0,0 +1,93 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+/******************************************************************************
+ * 
+ * 
+ * Module:	rtl8192c_rf.h	( Header File)
+ * 
+ * Note:	Collect every HAL RF type exter API or constant.	 
+ *
+ * Function:	
+ * 		 
+ * Export:	
+ * 
+ * Abbrev:	
+ * 
+ * History:
+ * Data			Who		Remark
+ * 
+ * 09/25/2008	MHC		Create initial version.
+ * 
+ * 
+******************************************************************************/
+#ifndef _RTL8192C_RF_H_
+#define _RTL8192C_RF_H_
+/* Check to see if the file has been included already.  */
+
+
+/*--------------------------Define Parameters-------------------------------*/
+
+//
+// For RF 6052 Series
+//
+#define		RF6052_MAX_TX_PWR			0x3F
+#define		RF6052_MAX_REG				0x3F
+#define		RF6052_MAX_PATH				2
+/*--------------------------Define Parameters-------------------------------*/
+
+
+/*------------------------------Define structure----------------------------*/ 
+
+/*------------------------------Define structure----------------------------*/ 
+
+
+/*------------------------Export global variable----------------------------*/
+/*------------------------Export global variable----------------------------*/
+
+/*------------------------Export Marco Definition---------------------------*/
+
+/*------------------------Export Marco Definition---------------------------*/
+
+
+/*--------------------------Exported Function prototype---------------------*/
+
+//
+// RF RL6052 Series API
+//
+void		rtl8192c_RF_ChangeTxPath(	IN	PADAPTER	Adapter, 
+										IN	u16		DataRate);
+void		rtl8192c_PHY_RF6052SetBandwidth(	
+										IN	PADAPTER				Adapter,
+										IN	HT_CHANNEL_WIDTH		Bandwidth);	
+VOID	rtl8192c_PHY_RF6052SetCckTxPower(
+										IN	PADAPTER	Adapter,
+										IN	u8*		pPowerlevel);
+VOID	rtl8192c_PHY_RF6052SetOFDMTxPower(
+										IN	PADAPTER	Adapter,
+										IN	u8*		pPowerLevel,
+										IN	u8		Channel);
+int	PHY_RF6052_Config8192C(	IN	PADAPTER		Adapter	);
+
+/*--------------------------Exported Function prototype---------------------*/
+
+
+#endif/* End of HalRf.h */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192c_spec.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192c_spec.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192c_spec.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192c_spec.h	2017-09-23 03:42:50.042674991 +0800
@@ -0,0 +1,1898 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef __RTL8192C_SPEC_H__
+#define __RTL8192C_SPEC_H__
+
+#include <drv_conf.h>
+
+#ifndef BIT
+#define BIT(x)		(1 << (x))
+#endif
+
+#define BIT0		0x00000001
+#define BIT1		0x00000002
+#define BIT2		0x00000004
+#define BIT3		0x00000008
+#define BIT4		0x00000010
+#define BIT5		0x00000020
+#define BIT6		0x00000040
+#define BIT7		0x00000080
+#define BIT8		0x00000100
+#define BIT9		0x00000200
+#define BIT10	0x00000400
+#define BIT11	0x00000800
+#define BIT12	0x00001000
+#define BIT13	0x00002000
+#define BIT14	0x00004000
+#define BIT15	0x00008000
+#define BIT16	0x00010000
+#define BIT17	0x00020000
+#define BIT18	0x00040000
+#define BIT19	0x00080000
+#define BIT20	0x00100000
+#define BIT21	0x00200000
+#define BIT22	0x00400000
+#define BIT23	0x00800000
+#define BIT24	0x01000000
+#define BIT25	0x02000000
+#define BIT26	0x04000000
+#define BIT27	0x08000000
+#define BIT28	0x10000000
+#define BIT29	0x20000000
+#define BIT30	0x40000000
+#define BIT31	0x80000000
+
+
+//============================================================
+//       8192C Regsiter offset definition
+//============================================================
+
+
+//============================================================
+//
+//============================================================
+
+//-----------------------------------------------------
+//
+//	0x0000h ~ 0x00FFh	System Configuration
+//
+//-----------------------------------------------------
+#define REG_SYS_ISO_CTRL			0x0000
+#define REG_SYS_FUNC_EN			0x0002
+#define REG_APS_FSMCO				0x0004
+#define REG_SYS_CLKR				0x0008
+#define REG_9346CR					0x000A
+#define REG_EE_VPD					0x000C
+#define REG_AFE_MISC				0x0010
+#define REG_SPS0_CTRL				0x0011
+#define REG_SPS_OCP_CFG			0x0018
+#define REG_RSV_CTRL				0x001C
+#define REG_RF_CTRL					0x001F
+#define REG_LDOA15_CTRL			0x0020
+#define REG_LDOV12D_CTRL			0x0021
+#define REG_LDOHCI12_CTRL			0x0022
+#define REG_LPLDO_CTRL				0x0023
+#define REG_AFE_XTAL_CTRL			0x0024
+#define REG_AFE_PLL_CTRL			0x0028
+#define REG_EFUSE_CTRL				0x0030
+#define REG_EFUSE_TEST				0x0034
+#define REG_PWR_DATA				0x0038
+#define REG_CAL_TIMER				0x003C
+#define REG_ACLK_MON				0x003E
+#define REG_GPIO_MUXCFG			0x0040
+#define REG_GPIO_IO_SEL				0x0042
+#define REG_MAC_PINMUX_CFG		0x0043
+#define REG_GPIO_PIN_CTRL			0x0044
+#define REG_GPIO_INTM				0x0048
+#define REG_LEDCFG0					0x004C
+#define REG_LEDCFG1					0x004D
+#define REG_LEDCFG2					0x004E
+#define REG_LEDCFG3					0x004F
+#define REG_LEDCFG					REG_LEDCFG2
+#define REG_FSIMR					0x0050
+#define REG_FSISR					0x0054
+#define REG_HSIMR					0x0058
+#define REG_HSISR					0x005c
+#define REG_GPIO_PIN_CTRL_2		0x0060 // RTL8723 WIFI/BT/GPS Multi-Function GPIO Pin Control.
+#define REG_GPIO_IO_SEL_2			0x0062 // RTL8723 WIFI/BT/GPS Multi-Function GPIO Select.
+#define REG_MULTI_FUNC_CTRL		0x0068 // RTL8723 WIFI/BT/GPS Multi-Function control source.
+#define REG_MCUFWDL				0x0080
+#define REG_HMEBOX_EXT_0			0x0088
+#define REG_HMEBOX_EXT_1			0x008A
+#define REG_HMEBOX_EXT_2			0x008C
+#define REG_HMEBOX_EXT_3			0x008E
+#define REG_HOST_SUSP_CNT			0x00BC	// Host suspend counter on FPGA platform
+#define REG_EFUSE_ACCESS			0x00CF	// Efuse access protection for RTL8723
+#define REG_BIST_SCAN				0x00D0
+#define REG_BIST_RPT				0x00D4
+#define REG_BIST_ROM_RPT			0x00D8
+#define REG_USB_SIE_INTF			0x00E0
+#define REG_PCIE_MIO_INTF			0x00E4
+#define REG_PCIE_MIO_INTD			0x00E8
+#define REG_HPON_FSM				0x00EC
+#define REG_SYS_CFG					0x00F0
+#define REG_GPIO_OUTSTS			0x00F4	// For RTL8723 only.
+
+//-----------------------------------------------------
+//
+//	0x0100h ~ 0x01FFh	MACTOP General Configuration
+//
+//-----------------------------------------------------
+#define REG_CR						0x0100
+#define REG_PBP						0x0104
+#define REG_TRXDMA_CTRL			0x010C
+#define REG_TRXFF_BNDY				0x0114
+#define REG_TRXFF_STATUS			0x0118
+#define REG_RXFF_PTR				0x011C
+#define REG_HIMR					0x0120
+#define REG_HISR					0x0124
+#define REG_HIMRE					0x0128
+#define REG_HISRE					0x012C
+#define REG_CPWM					0x012F
+#define REG_FWIMR					0x0130
+#define REG_FWISR					0x0134
+#define REG_PKTBUF_DBG_CTRL		0x0140
+#define REG_PKTBUF_DBG_DATA_L		0x0144
+#define REG_PKTBUF_DBG_DATA_H	0x0148
+
+#define REG_TC0_CTRL				0x0150
+#define REG_TC1_CTRL				0x0154
+#define REG_TC2_CTRL				0x0158
+#define REG_TC3_CTRL				0x015C
+#define REG_TC4_CTRL				0x0160
+#define REG_TCUNIT_BASE			0x0164
+#define REG_MBIST_START			0x0174
+#define REG_MBIST_DONE				0x0178
+#define REG_MBIST_FAIL				0x017C
+#define REG_C2HEVT_MSG_NORMAL	0x01A0
+#define REG_C2HEVT_CLEAR			0x01AF
+#define REG_C2HEVT_MSG_TEST		0x01B8
+#define REG_MCUTST_1				0x01c0
+#define REG_FMETHR					0x01C8
+#define REG_HMETFR					0x01CC
+#define REG_HMEBOX_0				0x01D0
+#define REG_HMEBOX_1				0x01D4
+#define REG_HMEBOX_2				0x01D8
+#define REG_HMEBOX_3				0x01DC
+
+#define REG_LLT_INIT				0x01E0
+#define REG_BB_ACCEESS_CTRL		0x01E8
+#define REG_BB_ACCESS_DATA		0x01EC
+
+
+//-----------------------------------------------------
+//
+//	0x0200h ~ 0x027Fh	TXDMA Configuration
+//
+//-----------------------------------------------------
+#define REG_RQPN					0x0200
+#define REG_FIFOPAGE				0x0204
+#define REG_TDECTRL					0x0208
+#define REG_TXDMA_OFFSET_CHK		0x020C
+#define REG_TXDMA_STATUS			0x0210
+#define REG_RQPN_NPQ				0x0214
+
+//-----------------------------------------------------
+//
+//	0x0280h ~ 0x02FFh	RXDMA Configuration
+//
+//-----------------------------------------------------
+#define REG_RXDMA_AGG_PG_TH		0x0280
+#define REG_RXPKT_NUM				0x0284
+#define REG_RXDMA_STATUS			0x0288
+
+
+//-----------------------------------------------------
+//
+//	0x0300h ~ 0x03FFh	PCIe
+//
+//-----------------------------------------------------
+#define	REG_PCIE_CTRL_REG			0x0300
+#define	REG_INT_MIG				0x0304	// Interrupt Migration 
+#define	REG_BCNQ_DESA				0x0308	// TX Beacon Descriptor Address
+#define	REG_HQ_DESA				0x0310	// TX High Queue Descriptor Address
+#define	REG_MGQ_DESA				0x0318	// TX Manage Queue Descriptor Address
+#define	REG_VOQ_DESA				0x0320	// TX VO Queue Descriptor Address
+#define	REG_VIQ_DESA				0x0328	// TX VI Queue Descriptor Address
+#define	REG_BEQ_DESA				0x0330	// TX BE Queue Descriptor Address
+#define	REG_BKQ_DESA				0x0338	// TX BK Queue Descriptor Address
+#define	REG_RX_DESA				0x0340	// RX Queue	Descriptor Address
+#define	REG_DBI					0x0348	// Backdoor REG for Access Configuration
+#define	REG_MDIO					0x0354	// MDIO for Access PCIE PHY
+#define	REG_DBG_SEL				0x0360	// Debug Selection Register
+#define	REG_PCIE_HRPWM			0x0361	//PCIe RPWM
+#define	REG_PCIE_HCPWM			0x0363	//PCIe CPWM
+#define	REG_UART_CTRL				0x0364	// UART	Control
+#define	REG_UART_TX_DESA			0x0370	// UART TX Descriptor Address
+#define	REG_UART_RX_DESA			0x0378	// UART Rx Descriptor Address
+
+
+// spec version 11
+//-----------------------------------------------------
+//
+//	0x0400h ~ 0x047Fh	Protocol Configuration
+//
+//-----------------------------------------------------
+#define REG_VOQ_INFORMATION			0x0400
+#define REG_VIQ_INFORMATION			0x0404
+#define REG_BEQ_INFORMATION			0x0408
+#define REG_BKQ_INFORMATION			0x040C
+#define REG_MGQ_INFORMATION			0x0410
+#define REG_HGQ_INFORMATION			0x0414
+#define REG_BCNQ_INFORMATION			0x0418
+
+
+#define REG_CPU_MGQ_INFORMATION		0x041C
+#define REG_FWHW_TXQ_CTRL				0x0420
+#define REG_HWSEQ_CTRL					0x0423
+#define REG_TXPKTBUF_BCNQ_BDNY		0x0424
+#define REG_TXPKTBUF_MGQ_BDNY		0x0425
+#define REG_LIFETIME_EN				0x0426
+#define REG_MULTI_BCNQ_OFFSET			0x0427
+#define REG_SPEC_SIFS					0x0428
+#define REG_RL							0x042A
+#define REG_DARFRC						0x0430
+#define REG_RARFRC						0x0438
+#define REG_RRSR						0x0440
+#define REG_ARFR0						0x0444
+#define REG_ARFR1						0x0448
+#define REG_ARFR2						0x044C
+#define REG_ARFR3						0x0450
+#define REG_AGGLEN_LMT					0x0458
+#define REG_AMPDU_MIN_SPACE			0x045C
+#define REG_TXPKTBUF_WMAC_LBK_BF_HD	0x045D
+#define REG_FAST_EDCA_CTRL				0x0460
+#define REG_RD_RESP_PKT_TH				0x0463
+#define REG_INIRTS_RATE_SEL			0x0480
+#define REG_INIDATA_RATE_SEL			0x0484
+#define REG_POWER_STATUS				0x04A4
+#define REG_POWER_STAGE1				0x04B4
+#define REG_POWER_STAGE2				0x04B8
+#define REG_PKT_VO_VI_LIFE_TIME		0x04C0
+#define REG_PKT_BE_BK_LIFE_TIME		0x04C2
+#define REG_STBC_SETTING				0x04C4
+#define REG_PROT_MODE_CTRL			0x04C8
+#define REG_MAX_AGGR_NUM				0x04CA
+#define REG_RTS_MAX_AGGR_NUM			0x04CB
+#define REG_BAR_MODE_CTRL				0x04CC
+#define REG_RA_TRY_RATE_AGG_LMT		0x04CF
+#define REG_NQOS_SEQ					0x04DC
+#define REG_QOS_SEQ					0x04DE
+#define REG_NEED_CPU_HANDLE			0x04E0
+#define REG_PKT_LOSE_RPT				0x04E1
+#define REG_PTCL_ERR_STATUS			0x04E2
+#define REG_DUMMY						0x04FC
+
+
+
+//-----------------------------------------------------
+//
+//	0x0500h ~ 0x05FFh	EDCA Configuration
+//
+//-----------------------------------------------------
+#define REG_EDCA_VO_PARAM			0x0500
+#define REG_EDCA_VI_PARAM			0x0504
+#define REG_EDCA_BE_PARAM			0x0508
+#define REG_EDCA_BK_PARAM			0x050C
+#define REG_BCNTCFG					0x0510
+#define REG_PIFS						0x0512
+#define REG_RDG_PIFS				0x0513
+#define REG_SIFS_CCK				0x0514
+#define REG_SIFS_OFDM				0x0516
+#define REG_SIFS_CTX				0x0514
+#define REG_SIFS_TRX				0x0516
+#define REG_AGGR_BREAK_TIME		0x051A
+#define REG_SLOT					0x051B
+#define REG_TX_PTCL_CTRL			0x0520
+#define REG_TXPAUSE					0x0522
+#define REG_DIS_TXREQ_CLR			0x0523
+#define REG_RD_CTRL					0x0524
+#define REG_TBTT_PROHIBIT			0x0540
+#define REG_RD_NAV_NXT				0x0544
+#define REG_NAV_PROT_LEN			0x0546
+#define REG_BCN_CTRL				0x0550
+#define REG_BCN_CTRL_1				0x0551
+#define REG_MBID_NUM				0x0552
+#define REG_DUAL_TSF_RST			0x0553
+#define REG_BCN_INTERVAL			0x0554	// The same as REG_MBSSID_BCN_SPACE
+#define REG_MBSSID_BCN_SPACE		0x0554
+#define REG_DRVERLYINT				0x0558
+#define REG_BCNDMATIM				0x0559
+#define REG_ATIMWND				0x055A
+#define REG_BCN_MAX_ERR			0x055D
+#define REG_RXTSF_OFFSET_CCK		0x055E
+#define REG_RXTSF_OFFSET_OFDM		0x055F	
+#define REG_TSFTR					0x0560
+#define REG_INIT_TSFTR				0x0564
+#define REG_PSTIMER					0x0580
+#define REG_TIMER0					0x0584
+#define REG_TIMER1					0x0588
+#define REG_ACMHWCTRL				0x05C0
+#define REG_ACMRSTCTRL				0x05C1
+#define REG_ACMAVG					0x05C2
+#define REG_VO_ADMTIME				0x05C4
+#define REG_VI_ADMTIME				0x05C6
+#define REG_BE_ADMTIME				0x05C8
+#define REG_EDCA_RANDOM_GEN		0x05CC
+#define REG_SCH_TXCMD				0x05D0
+
+
+//-----------------------------------------------------
+//
+//	0x0600h ~ 0x07FFh	WMAC Configuration
+//
+//-----------------------------------------------------
+#define REG_APSD_CTRL				0x0600
+#define REG_BWOPMODE				0x0603
+#define REG_TCR						0x0604
+#define REG_RCR						0x0608
+#define REG_RX_PKT_LIMIT			0x060C
+#define REG_RX_DLK_TIME			0x060D
+#define REG_RX_DRVINFO_SZ			0x060F
+
+#define REG_MACID					0x0610
+#define REG_BSSID					0x0618
+#define REG_MAR						0x0620
+#define REG_MBIDCAMCFG				0x0628
+
+#define REG_USTIME_EDCA			0x0638
+#define REG_MAC_SPEC_SIFS			0x063A
+
+// 20100719 Joseph: Hardware register definition change. (HW datasheet v54)
+#define REG_R2T_SIFS				0x063C	// [15:8]SIFS_R2T_OFDM, [7:0]SIFS_R2T_CCK
+#define REG_T2T_SIFS				0x063E	// [15:8]SIFS_T2T_OFDM, [7:0]SIFS_T2T_CCK
+#define REG_ACKTO					0x0640
+#define REG_CTS2TO					0x0641
+#define REG_EIFS						0x0642
+
+//WMA, BA, CCX
+#define REG_NAV_CTRL				0x0650
+#define REG_BACAMCMD				0x0654
+#define REG_BACAMCONTENT			0x0658
+#define REG_LBDLY					0x0660
+#define REG_FWDLY					0x0661
+#define REG_RXERR_RPT				0x0664
+#define REG_WMAC_TRXPTCL_CTL		0x0668
+
+
+// Security
+#define REG_CAMCMD					0x0670
+#define REG_CAMWRITE				0x0674
+#define REG_CAMREAD				0x0678
+#define REG_CAMDBG					0x067C
+#define REG_SECCFG					0x0680
+
+// Power
+#define REG_WOW_CTRL				0x0690
+#define REG_PSSTATUS				0x0691
+#define REG_PS_RX_INFO				0x0692
+#define REG_LPNAV_CTRL				0x0694
+#define REG_WKFMCAM_CMD			0x0698
+#define REG_WKFMCAM_RWD			0x069C
+#define REG_RXFLTMAP0				0x06A0
+#define REG_RXFLTMAP1				0x06A2
+#define REG_RXFLTMAP2				0x06A4
+#define REG_BCN_PSR_RPT			0x06A8
+#define REG_CALB32K_CTRL			0x06AC
+#define REG_PKT_MON_CTRL			0x06B4
+#define REG_BT_COEX_TABLE			0x06C0
+#define REG_WMAC_RESP_TXINFO		0x06D8
+
+
+//-----------------------------------------------------
+//
+//	0xFE00h ~ 0xFE55h	USB Configuration
+//
+//-----------------------------------------------------
+#define REG_USB_INFO				0xFE17
+#define REG_USB_SPECIAL_OPTION	0xFE55
+#define REG_USB_DMA_AGG_TO		0xFE5B
+#define REG_USB_AGG_TO				0xFE5C
+#define REG_USB_AGG_TH				0xFE5D
+
+// For test chip
+#define REG_TEST_USB_TXQS			0xFE48
+#define REG_TEST_SIE_VID			0xFE60		// 0xFE60~0xFE61
+#define REG_TEST_SIE_PID			0xFE62		// 0xFE62~0xFE63
+#define REG_TEST_SIE_OPTIONAL		0xFE64
+#define REG_TEST_SIE_CHIRP_K		0xFE65
+#define REG_TEST_SIE_PHY			0xFE66		// 0xFE66~0xFE6B
+#define REG_TEST_SIE_MAC_ADDR		0xFE70		// 0xFE70~0xFE75
+#define REG_TEST_SIE_STRING		0xFE80		// 0xFE80~0xFEB9
+
+
+// For normal chip
+#define REG_NORMAL_SIE_VID			0xFE60		// 0xFE60~0xFE61
+#define REG_NORMAL_SIE_PID			0xFE62		// 0xFE62~0xFE63
+#define REG_NORMAL_SIE_OPTIONAL	0xFE64
+#define REG_NORMAL_SIE_EP			0xFE65		// 0xFE65~0xFE67
+#define REG_NORMAL_SIE_PHY		0xFE68		// 0xFE68~0xFE6B
+#define REG_NORMAL_SIE_OPTIONAL2	0xFE6C
+#define REG_NORMAL_SIE_GPS_EP		0xFE6D		// 0xFE6D, for RTL8723 only.
+#define REG_NORMAL_SIE_MAC_ADDR	0xFE70		// 0xFE70~0xFE75
+#define REG_NORMAL_SIE_STRING		0xFE80		// 0xFE80~0xFEDF
+
+
+//-----------------------------------------------------
+//
+//	Redifine 8192C register definition for compatibility
+//
+//-----------------------------------------------------
+
+// TODO: use these definition when using REG_xxx naming rule.
+// NOTE: DO NOT Remove these definition. Use later.
+
+#define	SYS_ISO_CTRL				REG_SYS_ISO_CTRL	// System Isolation Interface Control.
+#define	SYS_FUNC_EN				REG_SYS_FUNC_EN		// System Function Enable.
+#define	SYS_CLK						REG_SYS_CLKR
+#define	CR9346						REG_9346CR			// 93C46/93C56 Command Register.
+#define	EFUSE_CTRL					REG_EFUSE_CTRL		// E-Fuse Control.
+#define	EFUSE_TEST					REG_EFUSE_TEST		// E-Fuse Test.
+#define	MSR							(REG_CR + 2)		// Media Status register
+#define	ISR							REG_HISR
+#define	TSFR						REG_TSFTR			// Timing Sync Function Timer Register.
+
+#define	MACIDR0					REG_MACID			// MAC ID Register, Offset 0x0050-0x0053
+#define	MACIDR4					(REG_MACID + 4)		// MAC ID Register, Offset 0x0054-0x0055
+
+#define	PBP							REG_PBP
+
+// Redifine MACID register, to compatible prior ICs.
+#define	IDR0						MACIDR0
+#define	IDR4						MACIDR4
+
+
+//
+// 9. Security Control Registers	(Offset: )
+//
+#define	RWCAM						REG_CAMCMD		//IN 8190 Data Sheet is called CAMcmd
+#define	WCAMI						REG_CAMWRITE	// Software write CAM input content
+#define	RCAMO						REG_CAMREAD		// Software read/write CAM config
+#define	CAMDBG						REG_CAMDBG
+#define	SECR						REG_SECCFG		//Security Configuration Register
+
+// Unused register
+#define	UnusedRegister				0x1BF
+#define	DCAM						UnusedRegister
+#define	PSR							UnusedRegister
+#define	BBAddr						UnusedRegister
+#define	PhyDataR					UnusedRegister
+
+#define	InvalidBBRFValue			0x12345678
+
+// Min Spacing related settings.
+#define	MAX_MSS_DENSITY_2T 			0x13
+#define	MAX_MSS_DENSITY_1T 			0x0A
+
+//----------------------------------------------------------------------------
+//       8192C Cmd9346CR bits					(Offset 0xA, 16bit)
+//----------------------------------------------------------------------------
+#define	CmdEEPROM_En				BIT5	 // EEPROM enable when set 1
+#define	CmdEERPOMSEL				BIT4 	// System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is 9346
+#define	Cmd9346CR_9356SEL			BIT4
+#define	AutoLoadEEPROM			(CmdEEPROM_En|CmdEERPOMSEL)
+#define	AutoLoadEFUSE				CmdEEPROM_En
+
+//----------------------------------------------------------------------------
+//       8192C GPIO MUX Configuration Register (offset 0x40, 4 byte)
+//----------------------------------------------------------------------------
+#define	GPIOSEL_GPIO				0
+#define	GPIOSEL_ENBT				BIT5
+
+//----------------------------------------------------------------------------
+//       8192C GPIO PIN Control Register (offset 0x44, 4 byte)
+//----------------------------------------------------------------------------
+#define	GPIO_IN						REG_GPIO_PIN_CTRL		// GPIO pins input value
+#define	GPIO_OUT					(REG_GPIO_PIN_CTRL+1)	// GPIO pins output value
+#define	GPIO_IO_SEL				(REG_GPIO_PIN_CTRL+2)	// GPIO pins output enable when a bit is set to "1"; otherwise, input is configured.
+#define	GPIO_MOD					(REG_GPIO_PIN_CTRL+3)
+
+//----------------------------------------------------------------------------
+//       8192C (MSR) Media Status Register	(Offset 0x4C, 8 bits)  
+//----------------------------------------------------------------------------
+/*
+Network Type
+00: No link
+01: Link in ad hoc network
+10: Link in infrastructure network
+11: AP mode
+Default: 00b.
+*/
+#define	MSR_NOLINK					0x00
+#define	MSR_ADHOC					0x01
+#define	MSR_INFRA					0x02
+#define	MSR_AP						0x03
+
+//
+// 6. Adaptive Control Registers  (Offset: 0x0160 - 0x01CF)
+//
+//----------------------------------------------------------------------------
+//       8192C Response Rate Set Register	(offset 0x181, 24bits)
+//----------------------------------------------------------------------------
+#define	RRSR_RSC_OFFSET			21
+#define	RRSR_SHORT_OFFSET			23
+#define	RRSR_RSC_BW_40M			0x600000
+#define	RRSR_RSC_UPSUBCHNL		0x400000
+#define	RRSR_RSC_LOWSUBCHNL		0x200000
+#define	RRSR_SHORT					0x800000
+#define	RRSR_1M					BIT0
+#define	RRSR_2M					BIT1 
+#define	RRSR_5_5M					BIT2 
+#define	RRSR_11M					BIT3 
+#define	RRSR_6M					BIT4 
+#define	RRSR_9M					BIT5 
+#define	RRSR_12M					BIT6 
+#define	RRSR_18M					BIT7 
+#define	RRSR_24M					BIT8 
+#define	RRSR_36M					BIT9 
+#define	RRSR_48M					BIT10 
+#define	RRSR_54M					BIT11
+#define	RRSR_MCS0					BIT12
+#define	RRSR_MCS1					BIT13
+#define	RRSR_MCS2					BIT14
+#define	RRSR_MCS3					BIT15
+#define	RRSR_MCS4					BIT16
+#define	RRSR_MCS5					BIT17
+#define	RRSR_MCS6					BIT18
+#define	RRSR_MCS7					BIT19
+#define	BRSR_AckShortPmb			BIT23	
+// CCK ACK: use Short Preamble or not
+
+
+//----------------------------------------------------------------------------
+//       8192C Rate Definition
+//----------------------------------------------------------------------------
+//CCK
+#define	RATR_1M					0x00000001
+#define	RATR_2M					0x00000002
+#define	RATR_55M					0x00000004
+#define	RATR_11M					0x00000008
+//OFDM 		
+#define	RATR_6M					0x00000010
+#define	RATR_9M					0x00000020
+#define	RATR_12M					0x00000040
+#define	RATR_18M					0x00000080
+#define	RATR_24M					0x00000100
+#define	RATR_36M					0x00000200
+#define	RATR_48M					0x00000400
+#define	RATR_54M					0x00000800
+//MCS 1 Spatial Stream	
+#define	RATR_MCS0					0x00001000
+#define	RATR_MCS1					0x00002000
+#define	RATR_MCS2					0x00004000
+#define	RATR_MCS3					0x00008000
+#define	RATR_MCS4					0x00010000
+#define	RATR_MCS5					0x00020000
+#define	RATR_MCS6					0x00040000
+#define	RATR_MCS7					0x00080000
+//MCS 2 Spatial Stream
+#define	RATR_MCS8					0x00100000
+#define	RATR_MCS9					0x00200000
+#define	RATR_MCS10					0x00400000
+#define	RATR_MCS11					0x00800000
+#define	RATR_MCS12					0x01000000
+#define	RATR_MCS13					0x02000000
+#define	RATR_MCS14					0x04000000
+#define	RATR_MCS15					0x08000000
+
+
+// NOTE: For 92CU - Ziv
+//CCK
+#define RATE_1M						BIT(0)
+#define RATE_2M						BIT(1)
+#define RATE_5_5M					BIT(2)
+#define RATE_11M					BIT(3)
+//OFDM 
+#define RATE_6M						BIT(4)
+#define RATE_9M						BIT(5)
+#define RATE_12M					BIT(6)
+#define RATE_18M					BIT(7)
+#define RATE_24M					BIT(8)
+#define RATE_36M					BIT(9)
+#define RATE_48M					BIT(10)
+#define RATE_54M					BIT(11)
+//MCS 1 Spatial Stream
+#define RATE_MCS0					BIT(12)
+#define RATE_MCS1					BIT(13)
+#define RATE_MCS2					BIT(14)
+#define RATE_MCS3					BIT(15)
+#define RATE_MCS4					BIT(16)
+#define RATE_MCS5					BIT(17)
+#define RATE_MCS6					BIT(18)
+#define RATE_MCS7					BIT(19)
+//MCS 2 Spatial Stream
+#define RATE_MCS8					BIT(20)
+#define RATE_MCS9					BIT(21)
+#define RATE_MCS10					BIT(22)
+#define RATE_MCS11					BIT(23)
+#define RATE_MCS12					BIT(24)
+#define RATE_MCS13					BIT(25)
+#define RATE_MCS14					BIT(26)
+#define RATE_MCS15					BIT(27)
+
+
+
+
+// ALL CCK Rate
+#define	RATE_ALL_CCK				RATR_1M|RATR_2M|RATR_55M|RATR_11M 
+#define	RATE_ALL_OFDM_AG			RATR_6M|RATR_9M|RATR_12M|RATR_18M|RATR_24M|\
+									RATR_36M|RATR_48M|RATR_54M	
+#define	RATE_ALL_OFDM_1SS			RATR_MCS0|RATR_MCS1|RATR_MCS2|RATR_MCS3 |\
+									RATR_MCS4|RATR_MCS5|RATR_MCS6	|RATR_MCS7	
+#define	RATE_ALL_OFDM_2SS			RATR_MCS8|RATR_MCS9	|RATR_MCS10|RATR_MCS11|\
+									RATR_MCS12|RATR_MCS13|RATR_MCS14|RATR_MCS15
+
+//----------------------------------------------------------------------------
+//       8192C BW_OPMODE bits					(Offset 0x203, 8bit)
+//----------------------------------------------------------------------------
+#define	BW_OPMODE_20MHZ			BIT2
+#define	BW_OPMODE_5G				BIT1
+#define	BW_OPMODE_11J				BIT0
+
+
+//----------------------------------------------------------------------------
+//       8192C CAM Config Setting (offset 0x250, 1 byte)
+//----------------------------------------------------------------------------
+#define	CAM_VALID					BIT15
+#define	CAM_NOTVALID				0x0000
+#define	CAM_USEDK					BIT5
+
+#define	CAM_CONTENT_COUNT 		8
+       	       		
+#define	CAM_NONE					0x0
+#define	CAM_WEP40					0x01
+#define	CAM_TKIP					0x02
+#define	CAM_AES					0x04
+#define	CAM_WEP104				0x05
+        		
+#define	TOTAL_CAM_ENTRY			32
+#define	HALF_CAM_ENTRY			16	
+       		
+#define	CAM_CONFIG_USEDK			_TRUE
+#define	CAM_CONFIG_NO_USEDK		_FALSE
+       		
+#define	CAM_WRITE					BIT16
+#define	CAM_READ					0x00000000
+#define	CAM_POLLINIG				BIT31
+
+#define	SCR_UseDK					0x01
+#define	SCR_TxSecEnable			0x02
+#define	SCR_RxSecEnable			0x04
+
+
+//
+// 12. Host Interrupt Status Registers	 (Offset: 0x0300 - 0x030F)
+//
+//----------------------------------------------------------------------------
+//       8190 IMR/ISR bits						(offset 0xfd,  8bits)
+//----------------------------------------------------------------------------
+#define	IMR8190_DISABLED				0x0
+// IMR DW0 Bit 0-31
+#define	IMR_BCNDMAINT6				BIT31		// Beacon DMA Interrupt 6
+#define	IMR_BCNDMAINT5				BIT30		// Beacon DMA Interrupt 5
+#define	IMR_BCNDMAINT4				BIT29		// Beacon DMA Interrupt 4
+#define	IMR_BCNDMAINT3				BIT28		// Beacon DMA Interrupt 3
+#define	IMR_BCNDMAINT2				BIT27		// Beacon DMA Interrupt 2
+#define	IMR_BCNDMAINT1				BIT26		// Beacon DMA Interrupt 1
+#define	IMR_BCNDOK8					BIT25		// Beacon Queue DMA OK Interrup 8
+#define	IMR_BCNDOK7					BIT24		// Beacon Queue DMA OK Interrup 7
+#define	IMR_BCNDOK6					BIT23		// Beacon Queue DMA OK Interrup 6
+#define	IMR_BCNDOK5					BIT22		// Beacon Queue DMA OK Interrup 5
+#define	IMR_BCNDOK4					BIT21		// Beacon Queue DMA OK Interrup 4
+#define	IMR_BCNDOK3					BIT20		// Beacon Queue DMA OK Interrup 3
+#define	IMR_BCNDOK2					BIT19		// Beacon Queue DMA OK Interrup 2
+#define	IMR_BCNDOK1					BIT18		// Beacon Queue DMA OK Interrup 1
+#define	IMR_TIMEOUT2					BIT17		// Timeout interrupt 2
+#define	IMR_TIMEOUT1					BIT16		// Timeout interrupt 1
+#define	IMR_TXFOVW					BIT15		// Transmit FIFO Overflow
+#define	IMR_PSTIMEOUT					BIT14		// Power save time out interrupt 
+#define	IMR_BcnInt						BIT13		// Beacon DMA Interrupt 0
+#define	IMR_RXFOVW					BIT12		// Receive FIFO Overflow
+#define	IMR_RDU						BIT11		// Receive Descriptor Unavailable
+#define	IMR_ATIMEND					BIT10		// For 92C,ATIM Window End Interrupt
+#define	IMR_BDOK						BIT9		// Beacon Queue DMA OK Interrup
+#define	IMR_HIGHDOK					BIT8		// High Queue DMA OK Interrupt
+#define	IMR_TBDOK						BIT7		// Transmit Beacon OK interrup
+#define	IMR_MGNTDOK					BIT6		// Management Queue DMA OK Interrupt
+#define	IMR_TBDER						BIT5		// For 92C,Transmit Beacon Error Interrupt
+#define	IMR_BKDOK						BIT4		// AC_BK DMA OK Interrupt
+#define	IMR_BEDOK						BIT3		// AC_BE DMA OK Interrupt
+#define	IMR_VIDOK						BIT2		// AC_VI DMA OK Interrupt
+#define	IMR_VODOK						BIT1		// AC_VO DMA Interrupt
+#define	IMR_ROK						BIT0		// Receive DMA OK Interrupt
+
+#define	IMR_RX_MASK		(IMR_ROK|IMR_RDU|IMR_RXFOVW)
+#define	IMR_TX_MASK		(IMR_VODOK|IMR_VIDOK|IMR_BEDOK|IMR_BKDOK|IMR_MGNTDOK|IMR_HIGHDOK|IMR_BDOK)
+
+// 13. Host Interrupt Status Extension Register	 (Offset: 0x012C-012Eh)
+#define	IMR_TXERR				BIT11
+#define	IMR_RXERR				BIT10
+#define	IMR_C2HCMD			BIT9
+#define	IMR_CPWM				BIT8
+//RSVD [2-7]
+#define	IMR_OCPINT				BIT1
+#define	IMR_WLANOFF			BIT0
+
+
+
+//----------------------------------------------------------------------------
+// 8192C EFUSE
+//----------------------------------------------------------------------------
+#define	HWSET_MAX_SIZE				128
+
+
+//----------------------------------------------------------------------------
+//       8192C EEPROM/EFUSE share register definition.
+//----------------------------------------------------------------------------
+
+//
+// Default Value for EEPROM or EFUSE!!!
+//
+#define EEPROM_Default_TSSI					0x0
+#define EEPROM_Default_TxPowerDiff			0x0
+#define EEPROM_Default_CrystalCap			0x5
+#define EEPROM_Default_BoardType			0x02 // Default: 2X2, RTL8192CE(QFPN68)
+#define EEPROM_Default_TxPower				0x1010
+#define EEPROM_Default_HT2T_TxPwr			0x10
+
+#define EEPROM_Default_LegacyHTTxPowerDiff	0x3
+#define EEPROM_Default_ThermalMeter			0x12
+
+#define EEPROM_Default_AntTxPowerDiff		0x0
+#define EEPROM_Default_TxPwDiff_CrystalCap	0x5
+#define EEPROM_Default_TxPowerLevel		0x22
+#define EEPROM_Default_HT40_2SDiff			0x0
+#define EEPROM_Default_HT20_Diff			2	// HT20<->40 default Tx Power Index Difference
+#define EEPROM_Default_LegacyHTTxPowerDiff	0x3
+#define EEPROM_Default_HT40_PwrMaxOffset	0
+#define EEPROM_Default_HT20_PwrMaxOffset	0
+
+// For debug
+#define EEPROM_Default_PID					0x1234
+#define EEPROM_Default_VID					0x5678
+#define EEPROM_Default_CustomerID			0xAB
+#define EEPROM_Default_SubCustomerID		0xCD
+#define EEPROM_Default_Version				0
+
+#define EEPROM_CHANNEL_PLAN_FCC				0x0
+#define EEPROM_CHANNEL_PLAN_IC				0x1
+#define EEPROM_CHANNEL_PLAN_ETSI				0x2
+#define EEPROM_CHANNEL_PLAN_SPAIN			0x3
+#define EEPROM_CHANNEL_PLAN_FRANCE			0x4
+#define EEPROM_CHANNEL_PLAN_MKK				0x5
+#define EEPROM_CHANNEL_PLAN_MKK1				0x6
+#define EEPROM_CHANNEL_PLAN_ISRAEL			0x7
+#define EEPROM_CHANNEL_PLAN_TELEC			0x8
+#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN	0x9
+#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13	0xA
+#define EEPROM_CHANNEL_PLAN_NCC				0xB
+#define EEPROM_USB_OPTIONAL1					0xE
+#define EEPROM_CHANNEL_PLAN_BY_HW_MASK		0x80
+
+
+#define EEPROM_CID_DEFAULT				0x0
+#define EEPROM_CID_TOSHIBA					0x4
+#define EEPROM_CID_CCX						0x10 // CCX test. By Bruce, 2009-02-25.
+#define EEPROM_CID_QMI						0x0D
+#define EEPROM_CID_WHQL 					0xFE // added by chiyoko for dtm, 20090108
+
+
+#define	RTL_EEPROM_ID						0x8129
+
+
+#ifdef CONFIG_PCI_HCI
+#define RT_IBSS_INT_MASKS				(IMR_BcnInt | IMR_TBDOK | IMR_TBDER)
+#define RT_AC_INT_MASKS				(IMR_VIDOK | IMR_VODOK | IMR_BEDOK|IMR_BKDOK)
+#define RT_BSS_INT_MASKS				(RT_IBSS_INT_MASKS)
+
+//
+// Interface type.
+//
+typedef	enum _INTERFACE_SELECT_8192CPCIe{
+	INTF_SEL0_SOLO_MINICARD			= 0,		// WiFi solo-mCard
+	INTF_SEL1_BT_COMBO_MINICARD		= 1,		// WiFi+BT combo-mCard
+	INTF_SEL2_PCIe					= 2,		// PCIe Card
+} INTERFACE_SELECT_8192CPCIe, *PINTERFACE_SELECT_8192CPCIe;
+
+#define RTL8190_EEPROM_ID					0x8129	// 0-1
+#define EEPROM_HPON						0x02 // LDO settings.2-5
+#define EEPROM_CLK							0x06 // Clock settings.6-7
+#define EEPROM_TESTR						0x08 // SE Test mode.8
+
+#define EEPROM_VID							0x0A // SE Vendor ID.A-B
+#define EEPROM_DID							0x0C // SE Device ID. C-D
+#define EEPROM_SVID							0x0E // SE Vendor ID.E-F
+#define EEPROM_SMID						0x10 // SE PCI Subsystem ID. 10-11
+
+#define EEPROM_MAC_ADDR					0x16 // SEMAC Address. 12-17
+
+//----------------------------------------------------------------
+// Ziv - Let PCIe and USB use the same define. Modify address mapping later.
+#define EEPROM_CCK_TX_PWR_INX					0x5A
+#define EEPROM_HT40_1S_TX_PWR_INX			0x60
+#define EEPROM_HT40_2S_TX_PWR_INX_DIFF		0x66
+#define EEPROM_HT20_TX_PWR_INX_DIFF			0x69
+#define EEPROM_OFDM_TX_PWR_INX_DIFF			0x6C
+#define EEPROM_HT40_MAX_PWR_OFFSET			0x6F
+#define EEPROM_HT20_MAX_PWR_OFFSET			0x72
+
+#define EEPROM_CHANNEL_PLAN 				0x75
+#define EEPROM_TSSI_A						0x76
+#define EEPROM_TSSI_B						0x77
+#define EEPROM_THERMAL_METER				0x78
+#define EEPROM_RF_OPT1						0x79
+#define EEPROM_RF_OPT2						0x7A
+#define EEPROM_RF_OPT3						0x7B
+#define EEPROM_RF_OPT4						0x7C
+#define EEPROM_VERSION						0x7E
+#define EEPROM_CUSTOMER_ID				0x7F
+
+#define EEPROM_NORMAL_BoardType			EEPROM_RF_OPT1	//[7:5]
+
+#endif 
+
+#ifdef CONFIG_USB_HCI
+
+//should be renamed and moved to another file
+typedef	enum _BOARD_TYPE_8192CUSB{
+	BOARD_USB_DONGLE 			= 0,		// USB dongle
+	BOARD_USB_High_PA 		= 1,		// USB dongle with high power PA
+	BOARD_MINICARD		  	= 2,		// Minicard
+	BOARD_USB_SOLO 		 	= 3,		// USB solo-Slim module
+	BOARD_USB_COMBO			= 4,		// USB Combo-Slim module
+} BOARD_TYPE_8192CUSB, *PBOARD_TYPE_8192CUSB;
+
+#define	SUPPORT_HW_RADIO_DETECT(pHalData)	(pHalData->BoardType == BOARD_MINICARD||\
+													pHalData->BoardType == BOARD_USB_SOLO||\
+													pHalData->BoardType == BOARD_USB_COMBO)
+
+//---------------------------------------------------------------
+// EEPROM address for Test chip
+//---------------------------------------------------------------
+#define EEPROM_TEST_USB_OPT						0x0E
+#define EEPROM_TEST_CHIRP_K						0x0F
+#define EEPROM_TEST_EP_SETTING					0x0E
+#define EEPROM_TEST_USB_PHY						0x10
+
+
+//---------------------------------------------------------------
+// EEPROM address for Normal chip
+//---------------------------------------------------------------
+#define EEPROM_NORMAL_USB_OPT					0x0E
+#define EEPROM_NORMAL_CHIRP_K						0x0E	// Changed
+#define EEPROM_NORMAL_EP_SETTING					0x0F	// Changed
+#define EEPROM_NORMAL_USB_PHY					0x12	// Changed
+
+
+// Test chip and normal chip common define
+//---------------------------------------------------------------
+// EEPROM address for both
+//---------------------------------------------------------------
+#define EEPROM_ID0								0x00
+#define EEPROM_ID1								0x01
+#define EEPROM_RTK_RSV1						0x02
+#define EEPROM_RTK_RSV2						0x03
+#define EEPROM_RTK_RSV3						0x04
+#define EEPROM_RTK_RSV4						0x05
+#define EEPROM_RTK_RSV5						0x06
+#define EEPROM_DBG_SEL							0x07
+#define EEPROM_RTK_RSV6						0x08
+#define EEPROM_VID								0x0A
+#define EEPROM_PID								0x0C
+
+#define EEPROM_MAC_ADDR						0x16
+#define EEPROM_STRING							0x1C
+#define EEPROM_SUBCUSTOMER_ID					0x59
+#define EEPROM_CCK_TX_PWR_INX					0x5A
+#define EEPROM_HT40_1S_TX_PWR_INX			0x60
+#define EEPROM_HT40_2S_TX_PWR_INX_DIFF		0x66
+#define EEPROM_HT20_TX_PWR_INX_DIFF			0x69
+#define EEPROM_OFDM_TX_PWR_INX_DIFF			0x6C
+#define EEPROM_HT40_MAX_PWR_OFFSET			0x6F
+#define EEPROM_HT20_MAX_PWR_OFFSET			0x72
+
+#define EEPROM_CHANNEL_PLAN					0x75
+#define EEPROM_TSSI_A							0x76
+#define EEPROM_TSSI_B							0x77
+#define EEPROM_THERMAL_METER					0x78
+#define EEPROM_RF_OPT1							0x79
+#define EEPROM_RF_OPT2							0x7A
+#define EEPROM_RF_OPT3							0x7B
+#define EEPROM_RF_OPT4							0x7C
+#define EEPROM_VERSION							0x7E
+#define EEPROM_CUSTOMER_ID					0x7F
+
+#define EEPROM_BoardType						0x54 //0x0: RTL8188SU, 0x1: RTL8191SU, 0x2: RTL8192SU, 0x3: RTL8191GU
+#define EEPROM_TxPwIndex						0x5C //0x5C-0x76, Tx Power index.
+#define EEPROM_PwDiff							0x67 // Difference of gain index between legacy and high throughput OFDM.
+
+#define EEPROM_TxPowerCCK						0x5A // CCK Tx Power
+
+// 2009/02/09 Cosa Add for SD3 requirement 
+#define EEPROM_TX_PWR_HT20_DIFF				0x6e// HT20 Tx Power Index Difference
+#define DEFAULT_HT20_TXPWR_DIFF				2	// HT20<->40 default Tx Power Index Difference
+#define EEPROM_TX_PWR_OFDM_DIFF				0x71// OFDM Tx Power Index Difference
+
+#define EEPROM_TxPWRGroup						0x73// Power diff for channel group
+#define EEPROM_Regulatory						0x79// Check if power safety is need
+
+#define EEPROM_BLUETOOTH_COEXIST				0x7E // 92cu, 0x7E[4]
+#define EEPROM_NORMAL_BoardType				EEPROM_RF_OPT1	//[7:5]
+#define BOARD_TYPE_NORMAL_MASK				0xE0
+#define BOARD_TYPE_TEST_MASK					0x0F
+#define EEPROM_EASY_REPLACEMENT				0x50//BIT0 1 for build-in module, 0 for external dongle
+//-------------------------------------------------------------
+//	EEPROM content definitions
+//-------------------------------------------------------------
+#define OS_LINK_SPEED							BIT(5)
+
+#define BOARD_TYPE_MASK						0xF
+
+#define BT_COEXISTENCE							BIT(4)
+#define BT_CO_SHIFT								4
+
+#define EP_NUMBER_MASK							0x30	//bit 4:5 0Eh
+#define EP_NUMBER_SHIFT						4
+
+
+#define USB_PHY_PARA_SIZE						5
+
+
+//-------------------------------------------------------------
+//	EEPROM default value definitions
+//-------------------------------------------------------------
+// Use 0xABCD instead of 0x8192 for debug
+#define EEPROM_DEF_ID_0						0xCD	// Byte 0x00
+#define EEPROM_DEF_ID_1						0xAB	// Byte 0x01
+
+#define EEPROM_DEF_RTK_RSV_A3					0x74	// Byte 0x03
+#define EEPROM_DEF_RTK_RSV_A4					0x6D	// Byte 0x04
+#define EEPROM_DEF_RTK_RSV_A8					0xFF	// Byte 0x08
+
+#define EEPROM_DEF_VID_0						0x0A	// Byte 0x0A
+#define EEPROM_DEF_VID_1						0x0B
+
+#define EEPROM_DEF_PID_0						0x92	// Byte 0x0C
+#define EEPROM_DEF_PID_1						0x81
+
+
+#define EEPROM_TEST_DEF_USB_OPT				0x80	// Byte 0x0E
+#define EEPROM_NORMAL_DEF_USB_OPT			0x00	// Byte 0x0E
+
+#define EEPROM_DEF_CHIRPK						0x15	// Byte 0x0F
+
+#define EEPROM_DEF_USB_PHY_0					0x85	// Byte 0x10
+#define EEPROM_DEF_USB_PHY_1					0x62	// Byte 0x11
+#define EEPROM_DEF_USB_PHY_2					0x9E	// Byte 0x12
+#define EEPROM_DEF_USB_PHY_3					0x06	// Byte 0x13
+
+#define EEPROM_DEF_TSSI_A						0x09	// Byte 0x78
+#define EEPROM_DEF_TSSI_B						0x09	// Byte 0x79
+
+
+#define EEPROM_DEF_THERMAL_METER				0x12	// Byte 0x7A
+
+#define RF_OPTION1					0x79// Check if power safety spec is need
+#define RF_OPTION2					0x7A
+#define RF_OPTION3					0x7B
+#define RF_OPTION4					0x7C
+
+
+#define	EEPROM_USB_SN							BIT(0)
+#define	EEPROM_USB_REMOTE_WAKEUP			BIT(1)
+#define	EEPROM_USB_DEVICE_PWR				BIT(2)
+#define	EEPROM_EP_NUMBER						(BIT(3)|BIT(4))
+
+#if 0
+#define	EEPROM_CHANNEL_PLAN_FCC					0x0
+#define	EEPROM_CHANNEL_PLAN_IC					0x1
+#define	EEPROM_CHANNEL_PLAN_ETSI				0x2
+#define	EEPROM_CHANNEL_PLAN_SPAIN				0x3
+#define	EEPROM_CHANNEL_PLAN_FRANCE				0x4
+#define	EEPROM_CHANNEL_PLAN_MKK					0x5
+#define	EEPROM_CHANNEL_PLAN_MKK1				0x6
+#define	EEPROM_CHANNEL_PLAN_ISRAEL				0x7
+#define	EEPROM_CHANNEL_PLAN_TELEC				0x8
+#define	EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN		0x9
+#define	EEPROM_CHANNEL_PLAN_WORLD_WIDE_13		0xA
+#define	EEPROM_CHANNEL_PLAN_BY_HW_MASK			0x80
+
+#define	EEPROM_CID_DEFAULT						0x0
+
+#define	EEPROM_CID_WHQL 						0xFE // added by chiyoko for dtm, 20090108
+
+
+#define	EEPROM_CID_CCX							0x10 // CCX test. By Bruce, 2009-02-25.
+#endif
+
+#endif
+
+
+/*===================================================================
+=====================================================================
+Here the register defines are for 92C. When the define is as same with 92C, 
+we will use the 92C's define for the consistency
+So the following defines for 92C is not entire!!!!!!
+=====================================================================
+=====================================================================*/
+/*
+Based on Datasheet V33---090401
+Register Summary
+Current IOREG MAP
+0x0000h ~ 0x00FFh   System Configuration (256 Bytes)
+0x0100h ~ 0x01FFh   MACTOP General Configuration (256 Bytes)
+0x0200h ~ 0x027Fh   TXDMA Configuration (128 Bytes)
+0x0280h ~ 0x02FFh   RXDMA Configuration (128 Bytes)
+0x0300h ~ 0x03FFh   PCIE EMAC Reserved Region (256 Bytes)
+0x0400h ~ 0x04FFh   Protocol Configuration (256 Bytes)
+0x0500h ~ 0x05FFh   EDCA Configuration (256 Bytes)
+0x0600h ~ 0x07FFh   WMAC Configuration (512 Bytes)
+0x2000h ~ 0x3FFFh   8051 FW Download Region (8196 Bytes)
+*/
+
+//----------------------------------------------------------------------------
+//       8192C (RCR) Receive Configuration Register	(Offset 0x608, 32 bits)
+//----------------------------------------------------------------------------
+#define	RCR_APPFCS					BIT31		//WMAC append FCS after pauload
+#define	RCR_APP_MIC				BIT30		//
+#define	RCR_APP_PHYSTS			BIT28//
+#define	RCR_APP_ICV				BIT29       //
+#define	RCR_APP_PHYST_RXFF		BIT28       //
+#define	RCR_APP_BA_SSN			BIT27		//Accept BA SSN
+#define	RCR_ENMBID					BIT24		//Enable Multiple BssId.
+#define	RCR_LSIGEN					BIT23
+#define	RCR_MFBEN					BIT22
+#define	RCR_HTC_LOC_CTRL			BIT14       //MFC<--HTC=1 MFC-->HTC=0
+#define	RCR_AMF					BIT13		//Accept management type frame
+#define	RCR_ACF					BIT12		//Accept control type frame
+#define	RCR_ADF					BIT11		//Accept data type frame
+#define	RCR_AICV					BIT9		//Accept ICV error packet
+#define	RCR_ACRC32					BIT8		//Accept CRC32 error packet 
+#define	RCR_CBSSID_BCN			BIT7		//Accept BSSID match packet (Rx beacon, probe rsp)
+#define	RCR_CBSSID_DATA			BIT6		//Accept BSSID match packet (Data)
+#define	RCR_CBSSID					RCR_CBSSID_DATA		//Accept BSSID match packet
+#define	RCR_APWRMGT				BIT5		//Accept power management packet
+#define	RCR_ADD3					BIT4		//Accept address 3 match packet
+#define	RCR_AB						BIT3		//Accept broadcast packet 
+#define	RCR_AM						BIT2		//Accept multicast packet 
+#define	RCR_APM					BIT1		//Accept physical match packet
+#define	RCR_AAP					BIT0		//Accept all unicast packet 
+#define	RCR_MXDMA_OFFSET			8
+#define	RCR_FIFO_OFFSET			13
+
+
+
+//============================================================================
+//       8192c USB specific Regsiter Offset and Content definition, 
+//       2009.08.18, added by vivi. for merge 92c and 92C into one driver
+//============================================================================
+//#define APS_FSMCO				0x0004  same with 92Ce
+#define RSV_CTRL					0x001C
+#define RD_CTRL					0x0524
+
+//-----------------------------------------------------
+//
+//	0xFE00h ~ 0xFE55h	USB Configuration
+//
+//-----------------------------------------------------
+#define REG_USB_INFO				0xFE17
+#define REG_USB_SPECIAL_OPTION	0xFE55
+#define REG_USB_DMA_AGG_TO		0xFE5B
+#define REG_USB_AGG_TO				0xFE5C
+#define REG_USB_AGG_TH				0xFE5D
+
+#define REG_USB_VID					0xFE60
+#define REG_USB_PID					0xFE62
+#define REG_USB_OPTIONAL			0xFE64
+#define REG_USB_CHIRP_K			0xFE65
+#define REG_USB_PHY					0xFE66
+#define REG_USB_MAC_ADDR			0xFE70
+
+#define REG_USB_HRPWM				0xFE58
+#define REG_USB_HCPWM				0xFE57
+
+#define	InvalidBBRFValue			0x12345678
+
+//============================================================================
+//       8192C Regsiter Bit and Content definition 
+//============================================================================
+//-----------------------------------------------------
+//
+//	0x0000h ~ 0x00FFh	System Configuration
+//
+//-----------------------------------------------------
+
+//2 SPS0_CTRL
+#define SW18_FPWM					BIT(3)
+
+
+//2 SYS_ISO_CTRL
+#define ISO_MD2PP					BIT(0)
+#define ISO_UA2USB					BIT(1)
+#define ISO_UD2CORE					BIT(2)
+#define ISO_PA2PCIE					BIT(3)
+#define ISO_PD2CORE					BIT(4)
+#define ISO_IP2MAC					BIT(5)
+#define ISO_DIOP						BIT(6)
+#define ISO_DIOE						BIT(7)
+#define ISO_EB2CORE					BIT(8)
+#define ISO_DIOR						BIT(9)
+
+#define PWC_EV25V					BIT(14)
+#define PWC_EV12V					BIT(15)
+
+
+//2 SYS_FUNC_EN
+#define FEN_BBRSTB					BIT(0)
+#define FEN_BB_GLB_RSTn			BIT(1)
+#define FEN_USBA					BIT(2)
+#define FEN_UPLL					BIT(3)
+#define FEN_USBD					BIT(4)
+#define FEN_DIO_PCIE				BIT(5)
+#define FEN_PCIEA					BIT(6)
+#define FEN_PPLL						BIT(7)
+#define FEN_PCIED					BIT(8)
+#define FEN_DIOE					BIT(9)
+#define FEN_CPUEN					BIT(10)
+#define FEN_DCORE					BIT(11)
+#define FEN_ELDR					BIT(12)
+#define FEN_DIO_RF					BIT(13)
+#define FEN_HWPDN					BIT(14)
+#define FEN_MREGEN					BIT(15)
+
+//2 APS_FSMCO
+#define PFM_LDALL					BIT(0)
+#define PFM_ALDN					BIT(1)
+#define PFM_LDKP					BIT(2)
+#define PFM_WOWL					BIT(3)
+#define EnPDN						BIT(4)
+#define PDN_PL						BIT(5)
+#define APFM_ONMAC					BIT(8)
+#define APFM_OFF					BIT(9)
+#define APFM_RSM					BIT(10)
+#define AFSM_HSUS					BIT(11)
+#define AFSM_PCIE					BIT(12)
+#define APDM_MAC					BIT(13)
+#define APDM_HOST					BIT(14)
+#define APDM_HPDN					BIT(15)
+#define RDY_MACON					BIT(16)
+#define SUS_HOST					BIT(17)
+#define ROP_ALD						BIT(20)
+#define ROP_PWR						BIT(21)
+#define ROP_SPS						BIT(22)
+#define SOP_MRST					BIT(25)
+#define SOP_FUSE					BIT(26)
+#define SOP_ABG						BIT(27)
+#define SOP_AMB						BIT(28)
+#define SOP_RCK						BIT(29)
+#define SOP_A8M						BIT(30)
+#define XOP_BTCK					BIT(31)
+
+//2 SYS_CLKR
+#define ANAD16V_EN					BIT(0)
+#define ANA8M						BIT(1)
+#define MACSLP						BIT(4)
+#define LOADER_CLK_EN				BIT(5)
+#define _80M_SSC_DIS				BIT(7)
+#define _80M_SSC_EN_HO				BIT(8)
+#define PHY_SSC_RSTB				BIT(9)
+#define SEC_CLK_EN					BIT(10)
+#define MAC_CLK_EN					BIT(11)
+#define SYS_CLK_EN					BIT(12)
+#define RING_CLK_EN					BIT(13)
+
+
+//2 9346CR
+
+
+#define 	EEDO					BIT(0)
+#define 	EEDI					BIT(1)
+#define 	EESK					BIT(2)
+#define 	EECS					BIT(3)
+//#define 	EERPROMSEL			BIT(4)
+//#define 	EEPROM_EN			BIT(5)
+#define		BOOT_FROM_EEPROM		BIT(4)
+#define		EEPROM_EN				BIT(5)
+#define 	EEM0					BIT(6)
+#define 	EEM1					BIT(7)
+
+
+//2 AFE_MISC
+#define AFE_BGEN					BIT(0)
+#define AFE_MBEN					BIT(1)
+#define MAC_ID_EN					BIT(7)
+
+
+//2 SPS0_CTRL
+
+
+//2 SPS_OCP_CFG
+
+
+//2 RSV_CTRL
+#define WLOCK_ALL					BIT(0)
+#define WLOCK_00					BIT(1)
+#define WLOCK_04					BIT(2)
+#define WLOCK_08					BIT(3)
+#define WLOCK_40					BIT(4)
+#define R_DIS_PRST_0				BIT(5)
+#define R_DIS_PRST_1				BIT(6)
+#define LOCK_ALL_EN					BIT(7)
+
+//2 RF_CTRL
+#define RF_EN						BIT(0)
+#define RF_RSTB						BIT(1)
+#define RF_SDMRSTB					BIT(2)
+
+
+
+//2 LDOA15_CTRL
+#define LDA15_EN					BIT(0)
+#define LDA15_STBY					BIT(1)
+#define LDA15_OBUF					BIT(2)
+#define LDA15_REG_VOS				BIT(3)
+#define _LDA15_VOADJ(x)				(((x) & 0x7) << 4)
+
+
+
+//2 LDOV12D_CTRL
+#define LDV12_EN					BIT(0)
+#define LDV12_SDBY					BIT(1)
+#define LPLDO_HSM					BIT(2)
+#define LPLDO_LSM_DIS				BIT(3)
+#define _LDV12_VADJ(x)				(((x) & 0xF) << 4)
+
+
+//2 AFE_XTAL_CTRL
+#define XTAL_EN						BIT(0)
+#define XTAL_BSEL					BIT(1)
+#define _XTAL_BOSC(x)				(((x) & 0x3) << 2)
+#define _XTAL_CADJ(x)				(((x) & 0xF) << 4)
+#define XTAL_GATE_USB				BIT(8)
+#define _XTAL_USB_DRV(x)			(((x) & 0x3) << 9)
+#define XTAL_GATE_AFE				BIT(11)
+#define _XTAL_AFE_DRV(x)			(((x) & 0x3) << 12)
+#define XTAL_RF_GATE				BIT(14)
+#define _XTAL_RF_DRV(x)				(((x) & 0x3) << 15)
+#define XTAL_GATE_DIG				BIT(17)
+#define _XTAL_DIG_DRV(x)			(((x) & 0x3) << 18)
+#define XTAL_BT_GATE				BIT(20)
+#define _XTAL_BT_DRV(x)				(((x) & 0x3) << 21)
+#define _XTAL_GPIO(x)				(((x) & 0x7) << 23)
+
+
+#define CKDLY_AFE					BIT(26)
+#define CKDLY_USB					BIT(27)
+#define CKDLY_DIG					BIT(28)
+#define CKDLY_BT					BIT(29)
+
+
+//2 AFE_PLL_CTRL
+#define APLL_EN						BIT(0)
+#define APLL_320_EN					BIT(1)
+#define APLL_FREF_SEL				BIT(2)
+#define APLL_EDGE_SEL				BIT(3)
+#define APLL_WDOGB					BIT(4)
+#define APLL_LPFEN					BIT(5)
+
+#define APLL_REF_CLK_13MHZ			0x1
+#define APLL_REF_CLK_19_2MHZ		0x2
+#define APLL_REF_CLK_20MHZ			0x3
+#define APLL_REF_CLK_25MHZ			0x4
+#define APLL_REF_CLK_26MHZ			0x5
+#define APLL_REF_CLK_38_4MHZ		0x6
+#define APLL_REF_CLK_40MHZ			0x7
+
+#define APLL_320EN					BIT(14)
+#define APLL_80EN					BIT(15)
+#define APLL_1MEN					BIT(24)
+
+
+//2 EFUSE_CTRL
+#define ALD_EN						BIT(18)
+#define EF_PD						BIT(19)
+#define EF_FLAG						BIT(31)
+
+//2 EFUSE_TEST (For RTL8723 partially)
+#define EF_TRPT						BIT(7)
+#define EF_CELL_SEL					(BIT(8)|BIT(9)) // 00: Wifi Efuse, 01: BT Efuse0, 10: BT Efuse1, 11: BT Efuse2
+#define LDOE25_EN					BIT(31)
+#define EFUSE_SEL(x)					(((x) & 0x3) << 8)
+#define EFUSE_SEL_MASK				0x300
+#define EFUSE_WIFI_SEL_0			0x0
+#define EFUSE_BT_SEL_0				0x1
+#define EFUSE_BT_SEL_1				0x2
+#define EFUSE_BT_SEL_2				0x3
+
+#define EFUSE_ACCESS_ON			0x69	// For RTL8723 only.
+#define EFUSE_ACCESS_OFF			0x00	// For RTL8723 only.
+
+//2 PWR_DATA 
+
+//2 CAL_TIMER
+
+//2 ACLK_MON
+#define RSM_EN						BIT(0)
+#define Timer_EN						BIT(4)
+
+
+//2 GPIO_MUXCFG
+#define TRSW0EN						BIT(2)
+#define TRSW1EN						BIT(3)
+#define EROM_EN						BIT(4)
+#define EnBT							BIT(5)
+#define EnUart						BIT(8)
+#define Uart_910						BIT(9)
+#define EnPMAC						BIT(10)
+#define SIC_SWRST					BIT(11)
+#define EnSIC						BIT(12)
+#define SIC_23						BIT(13)
+#define EnHDP						BIT(14)
+#define SIC_LBK						BIT(15)
+
+//2 GPIO_PIN_CTRL
+
+// GPIO BIT
+#define HAL_8192C_HW_GPIO_WPS_BIT		BIT(2)
+
+//2 GPIO_INTM
+
+//2 LEDCFG
+#define LED0PL 						BIT(4)  
+#define LED0DIS						BIT(7)
+#define LED1DIS						BIT(15)
+#define LED1PL 						BIT(12)
+
+#define  SECCAM_CLR					BIT(30)
+
+
+//2 FSIMR
+
+//2 FSISR
+
+
+//2 8051FWDL
+//2 MCUFWDL
+#define MCUFWDL_EN					BIT(0)
+#define MCUFWDL_RDY				BIT(1)
+#define FWDL_ChkSum_rpt			BIT(2)
+#define MACINI_RDY					BIT(3)
+#define BBINI_RDY					BIT(4)
+#define RFINI_RDY					BIT(5)
+#define WINTINI_RDY					BIT(6)
+#define CPRST						BIT(23)
+
+//2REG_HPON_FSM
+#define BOND92CE_1T2R_CFG			BIT(22)
+
+
+//2 REG_SYS_CFG
+#define XCLK_VLD						BIT(0)
+#define ACLK_VLD					BIT(1)
+#define UCLK_VLD					BIT(2)
+#define PCLK_VLD						BIT(3)
+#define PCIRSTB						BIT(4)
+#define V15_VLD						BIT(5)
+#define TRP_B15V_EN					BIT(7)
+#define SIC_IDLE						BIT(8)
+#define BD_MAC2						BIT(9)
+#define BD_MAC1						BIT(10)
+#define IC_MACPHY_MODE				BIT(11)
+#define CHIP_VER						(BIT(12)|BIT(13)|BIT(14)|BIT(15))
+#define BT_FUNC						BIT(16)
+#define VENDOR_ID					BIT(19)
+#define PAD_HWPD_IDN				BIT(22)
+#define TRP_VAUX_EN					BIT(23)
+#define TRP_BT_EN					BIT(24)
+#define BD_PKG_SEL					BIT(25)
+#define BD_HCI_SEL					BIT(26)
+#define TYPE_ID						BIT(27)
+
+#define CHIP_VER_RTL_MASK			0xF000	//Bit 12 ~ 15
+#define CHIP_VER_RTL_SHIFT			12
+
+//2REG_GPIO_OUTSTS (For RTL8723 only)
+#define	EFS_HCI_SEL				(BIT(0)|BIT(1))
+#define	PAD_HCI_SEL				(BIT(2)|BIT(3))
+#define	HCI_SEL						(BIT(4)|BIT(5)) 
+#define	PKG_SEL_HCI				BIT(6)
+#define	FEN_GPS					BIT(7)
+#define	FEN_BT						BIT(8)
+#define	FEN_WL						BIT(9)
+#define	FEN_PCI						BIT(10)
+#define	FEN_USB					BIT(11)
+#define	BTRF_HWPDN_N				BIT(12)
+#define	WLRF_HWPDN_N				BIT(13)
+#define	PDN_BT_N					BIT(14)
+#define	PDN_GPS_N					BIT(15)
+#define	BT_CTL_HWPDN				BIT(16)
+#define	GPS_CTL_HWPDN				BIT(17)
+#define	PPHY_SUSB					BIT(20)
+#define	UPHY_SUSB					BIT(21)
+#define	PCI_SUSEN					BIT(22)
+#define	USB_SUSEN					BIT(23)
+#define	RF_RL_ID					(BIT(31)|BIT(30)|BIT(29)|BIT(28))
+
+//-----------------------------------------------------
+//
+//	0x0100h ~ 0x01FFh	MACTOP General Configuration
+//
+//-----------------------------------------------------
+
+
+//2 Function Enable Registers
+//2 CR
+
+#define REG_LBMODE					(REG_CR + 3)
+
+
+#define HCI_TXDMA_EN				BIT(0)
+#define HCI_RXDMA_EN				BIT(1)
+#define TXDMA_EN					BIT(2)
+#define RXDMA_EN					BIT(3)
+#define PROTOCOL_EN					BIT(4)
+#define SCHEDULE_EN					BIT(5)
+#define MACTXEN						BIT(6)
+#define MACRXEN						BIT(7)
+#define ENSWBCN						BIT(8)
+#define ENSEC						BIT(9)
+
+// Network type
+#define _NETTYPE(x)					(((x) & 0x3) << 16)
+#define MASK_NETTYPE				0x30000
+#define NT_NO_LINK					0x0
+#define NT_LINK_AD_HOC				0x1
+#define NT_LINK_AP					0x2
+#define NT_AS_AP					0x3
+
+#define _LBMODE(x)					(((x) & 0xF) << 24)
+#define MASK_LBMODE				0xF000000
+#define LOOPBACK_NORMAL			0x0
+#define LOOPBACK_IMMEDIATELY		0xB
+#define LOOPBACK_MAC_DELAY		0x3
+#define LOOPBACK_PHY				0x1
+#define LOOPBACK_DMA				0x7
+
+
+//2 PBP - Page Size Register
+#define GET_RX_PAGE_SIZE(value)		((value) & 0xF)
+#define GET_TX_PAGE_SIZE(value)		(((value) & 0xF0) >> 4)
+#define _PSRX_MASK					0xF
+#define _PSTX_MASK					0xF0
+#define _PSRX(x)						(x)
+#define _PSTX(x)						((x) << 4)
+
+#define PBP_64						0x0
+#define PBP_128						0x1
+#define PBP_256						0x2
+#define PBP_512						0x3
+#define PBP_1024					0x4
+
+
+//2 TX/RXDMA
+#define RXDMA_ARBBW_EN			BIT(0)
+#define RXSHFT_EN					BIT(1)
+#define RXDMA_AGG_EN				BIT(2)
+#define QS_VO_QUEUE				BIT(8)
+#define QS_VI_QUEUE					BIT(9)
+#define QS_BE_QUEUE				BIT(10)
+#define QS_BK_QUEUE				BIT(11)
+#define QS_MANAGER_QUEUE			BIT(12)
+#define QS_HIGH_QUEUE				BIT(13)
+
+#define HQSEL_VOQ					BIT(0)
+#define HQSEL_VIQ					BIT(1)
+#define HQSEL_BEQ					BIT(2)
+#define HQSEL_BKQ					BIT(3)
+#define HQSEL_MGTQ					BIT(4)
+#define HQSEL_HIQ					BIT(5)
+
+// For normal driver, 0x10C
+#define _TXDMA_HIQ_MAP(x) 	 		(((x)&0x3) << 14)
+#define _TXDMA_MGQ_MAP(x) 	 		(((x)&0x3) << 12)
+#define _TXDMA_BKQ_MAP(x) 	 		(((x)&0x3) << 10)		
+#define _TXDMA_BEQ_MAP(x) 	 		(((x)&0x3) << 8 )
+#define _TXDMA_VIQ_MAP(x) 	 		(((x)&0x3) << 6 )
+#define _TXDMA_VOQ_MAP(x) 	 		(((x)&0x3) << 4 )
+
+#define QUEUE_LOW					1
+#define QUEUE_NORMAL				2
+#define QUEUE_HIGH					3
+
+
+
+//2 TRXFF_BNDY
+
+
+//2 LLT_INIT
+#define _LLT_NO_ACTIVE				0x0
+#define _LLT_WRITE_ACCESS			0x1
+#define _LLT_READ_ACCESS			0x2
+
+#define _LLT_INIT_DATA(x)			((x) & 0xFF)
+#define _LLT_INIT_ADDR(x)			(((x) & 0xFF) << 8)
+#define _LLT_OP(x)					(((x) & 0x3) << 30)
+#define _LLT_OP_VALUE(x)			(((x) >> 30) & 0x3)
+
+
+//2 BB_ACCESS_CTRL
+#define BB_WRITE_READ_MASK		(BIT(31) | BIT(30))
+#define BB_WRITE_EN					BIT(30)
+#define BB_READ_EN					BIT(31)
+//#define BB_ADDR_MASK				0xFFF
+//#define _BB_ADDR(x)					((x) & BB_ADDR_MASK)
+
+//-----------------------------------------------------
+//
+//	0x0200h ~ 0x027Fh	TXDMA Configuration
+//
+//-----------------------------------------------------
+//2 RQPN
+#define _HPQ(x)						((x) & 0xFF)
+#define _LPQ(x)						(((x) & 0xFF) << 8)
+#define _PUBQ(x)						(((x) & 0xFF) << 16)
+#define _NPQ(x)						((x) & 0xFF)			// NOTE: in RQPN_NPQ register
+
+
+#define HPQ_PUBLIC_DIS				BIT(24)
+#define LPQ_PUBLIC_DIS				BIT(25)
+#define LD_RQPN						BIT(31)
+
+
+//2 TDECTRL
+#define BCN_VALID					BIT(16)
+#define BCN_HEAD(x)					(((x) & 0xFF) << 8)
+#define	BCN_HEAD_MASK				0xFF00
+
+//2 TDECTL
+#define BLK_DESC_NUM_SHIFT			4
+#define BLK_DESC_NUM_MASK			0xF
+
+
+//2 TXDMA_OFFSET_CHK
+#define DROP_DATA_EN				BIT(9)
+
+//-----------------------------------------------------
+//
+//	0x0400h ~ 0x047Fh	Protocol Configuration
+//
+//-----------------------------------------------------
+//2 FWHW_TXQ_CTRL
+#define EN_AMPDU_RTY_NEW			BIT(7)
+
+//2 INIRTSMCS_SEL
+#define _INIRTSMCS_SEL(x)			((x) & 0x3F)
+
+
+//2 SPEC SIFS
+#define _SPEC_SIFS_CCK(x)			((x) & 0xFF)
+#define _SPEC_SIFS_OFDM(x)			(((x) & 0xFF) << 8)
+
+
+//2 RRSR
+
+#define RATE_REG_BITMAP_ALL			0xFFFFF
+
+#define _RRSC_BITMAP(x)					((x) & 0xFFFFF)
+
+#define _RRSR_RSC(x)						(((x) & 0x3) << 21)
+#define RRSR_RSC_RESERVED				0x0
+#define RRSR_RSC_UPPER_SUBCHANNEL	0x1
+#define RRSR_RSC_LOWER_SUBCHANNEL	0x2
+#define RRSR_RSC_DUPLICATE_MODE		0x3
+
+
+//2 ARFR
+#define USE_SHORT_G1				BIT(20)
+
+//2 AGGLEN_LMT_L
+#define _AGGLMT_MCS0(x)				((x) & 0xF)
+#define _AGGLMT_MCS1(x)				(((x) & 0xF) << 4)
+#define _AGGLMT_MCS2(x)				(((x) & 0xF) << 8)
+#define _AGGLMT_MCS3(x)				(((x) & 0xF) << 12)
+#define _AGGLMT_MCS4(x)				(((x) & 0xF) << 16)
+#define _AGGLMT_MCS5(x)				(((x) & 0xF) << 20)
+#define _AGGLMT_MCS6(x)				(((x) & 0xF) << 24)
+#define _AGGLMT_MCS7(x)				(((x) & 0xF) << 28)
+
+
+//2 RL
+#define	RETRY_LIMIT_SHORT_SHIFT		8
+#define	RETRY_LIMIT_LONG_SHIFT		0
+
+
+//2 DARFRC
+#define _DARF_RC1(x)				((x) & 0x1F)
+#define _DARF_RC2(x)				(((x) & 0x1F) << 8)
+#define _DARF_RC3(x)				(((x) & 0x1F) << 16)
+#define _DARF_RC4(x)				(((x) & 0x1F) << 24)
+// NOTE: shift starting from address (DARFRC + 4)
+#define _DARF_RC5(x)				((x) & 0x1F)
+#define _DARF_RC6(x)				(((x) & 0x1F) << 8)
+#define _DARF_RC7(x)				(((x) & 0x1F) << 16)
+#define _DARF_RC8(x)				(((x) & 0x1F) << 24)
+
+
+//2 RARFRC
+#define _RARF_RC1(x)				((x) & 0x1F)
+#define _RARF_RC2(x)				(((x) & 0x1F) << 8)
+#define _RARF_RC3(x)				(((x) & 0x1F) << 16)
+#define _RARF_RC4(x)				(((x) & 0x1F) << 24)
+// NOTE: shift starting from address (RARFRC + 4)
+#define _RARF_RC5(x)				((x) & 0x1F)
+#define _RARF_RC6(x)				(((x) & 0x1F) << 8)
+#define _RARF_RC7(x)				(((x) & 0x1F) << 16)
+#define _RARF_RC8(x)				(((x) & 0x1F) << 24)
+
+
+
+
+//-----------------------------------------------------
+//
+//	0x0500h ~ 0x05FFh	EDCA Configuration
+//
+//-----------------------------------------------------
+
+
+
+//2 EDCA setting
+#define AC_PARAM_TXOP_LIMIT_OFFSET	16
+#define AC_PARAM_ECW_MAX_OFFSET		12
+#define AC_PARAM_ECW_MIN_OFFSET		8
+#define AC_PARAM_AIFS_OFFSET			0
+
+
+//2 EDCA_VO_PARAM
+#define _AIFS(x)						(x)
+#define _ECW_MAX_MIN(x)			((x) << 8)
+#define _TXOP_LIMIT(x)				((x) << 16)
+
+
+#define _BCNIFS(x)					((x) & 0xFF)
+#define _BCNECW(x)					(((x) & 0xF))<< 8)
+
+
+#define _LRL(x)						((x) & 0x3F)
+#define _SRL(x)						(((x) & 0x3F) << 8)
+
+
+//2 SIFS_CCK
+#define _SIFS_CCK_CTX(x)			((x) & 0xFF)
+#define _SIFS_CCK_TRX(x)			(((x) & 0xFF) << 8);
+
+
+//2 SIFS_OFDM
+#define _SIFS_OFDM_CTX(x)			((x) & 0xFF)
+#define _SIFS_OFDM_TRX(x)			(((x) & 0xFF) << 8);
+
+
+//2 TBTT PROHIBIT
+#define _TBTT_PROHIBIT_HOLD(x)		(((x) & 0xFF) << 8)
+
+
+//2 REG_RD_CTRL
+#define DIS_EDCA_CNT_DWN			BIT(11)
+
+
+//2 BCN_CTRL
+#define EN_MBSSID						BIT(1)
+#define EN_TXBCN_RPT					BIT(2)
+#define	EN_BCN_FUNCTION				BIT(3)
+
+// The same function but different bit field.
+#define	DIS_TSF_UDT0_NORMAL_CHIP	BIT(4)
+#define	DIS_TSF_UDT0_TEST_CHIP		BIT(5)
+
+//2 ACMHWCTRL
+#define	AcmHw_HwEn					BIT(0)
+#define	AcmHw_BeqEn					BIT(1)
+#define	AcmHw_ViqEn					BIT(2)
+#define	AcmHw_VoqEn					BIT(3)
+#define	AcmHw_BeqStatus				BIT(4)
+#define	AcmHw_ViqStatus				BIT(5)
+#define	AcmHw_VoqStatus				BIT(6)
+
+
+
+//-----------------------------------------------------
+//
+//	0x0600h ~ 0x07FFh	WMAC Configuration
+//
+//-----------------------------------------------------
+
+//2 APSD_CTRL
+#define APSDOFF						BIT(6)
+#define APSDOFF_STATUS				BIT(7)
+
+
+//2 BWOPMODE
+#define BW_20MHZ					BIT(2)
+//#define BW_OPMODE_20MHZ				BIT(2)	// For compability
+
+
+#define RATE_BITMAP_ALL			0xFFFFF
+
+// Only use CCK 1M rate for ACK
+#define RATE_RRSR_CCK_ONLY_1M		0xFFFF1
+
+//2 TCR
+#define TSFRST						BIT(0)
+#define DIS_GCLK						BIT(1)
+#define PAD_SEL						BIT(2)
+#define PWR_ST						BIT(6)
+#define PWRBIT_OW_EN				BIT(7)
+#define ACRC							BIT(8)
+#define CFENDFORM					BIT(9)
+#define ICV							BIT(10)
+
+
+
+//2 RCR
+#define AAP							BIT(0)
+#define APM							BIT(1)
+#define AM							BIT(2)
+#define AB							BIT(3)
+#define ADD3							BIT(4)
+#define APWRMGT					BIT(5)
+#define CBSSID						BIT(6)
+#define CBSSID_BCN					BIT(7)
+#define ACRC32						BIT(8)
+#define AICV							BIT(9)
+#define ADF							BIT(11)
+#define ACF							BIT(12)
+#define AMF							BIT(13)
+#define HTC_LOC_CTRL				BIT(14)
+#define UC_DATA_EN					BIT(16)
+#define BM_DATA_EN					BIT(17)
+#define MFBEN						BIT(22)
+#define LSIGEN						BIT(23)
+#define EnMBID						BIT(24)
+#define APP_BASSN					BIT(27)
+#define APP_PHYSTS					BIT(28)
+#define APP_ICV						BIT(29)
+#define APP_MIC						BIT(30)
+#define APP_FCS						BIT(31)
+
+//2 RX_PKT_LIMIT
+
+//2 RX_DLK_TIME
+
+//2 MBIDCAMCFG
+
+
+
+//2 AMPDU_MIN_SPACE
+#define _MIN_SPACE(x)				((x) & 0x7)
+#define _SHORT_GI_PADDING(x)		(((x) & 0x1F) << 3)
+
+
+//2 RXERR_RPT
+#define RXERR_TYPE_OFDM_PPDU				0
+#define RXERR_TYPE_OFDM_FALSE_ALARM		1
+#define	RXERR_TYPE_OFDM_MPDU_OK			2
+#define RXERR_TYPE_OFDM_MPDU_FAIL		3
+#define RXERR_TYPE_CCK_PPDU				4
+#define RXERR_TYPE_CCK_FALSE_ALARM		5
+#define RXERR_TYPE_CCK_MPDU_OK			6
+#define RXERR_TYPE_CCK_MPDU_FAIL			7
+#define RXERR_TYPE_HT_PPDU					8
+#define RXERR_TYPE_HT_FALSE_ALARM		9
+#define RXERR_TYPE_HT_MPDU_TOTAL			10
+#define RXERR_TYPE_HT_MPDU_OK				11
+#define RXERR_TYPE_HT_MPDU_FAIL			12
+#define RXERR_TYPE_RX_FULL_DROP			15
+
+#define RXERR_COUNTER_MASK				0xFFFFF
+#define RXERR_RPT_RST						BIT(27)
+#define _RXERR_RPT_SEL(type)				((type) << 28)
+
+
+//2 SECCFG
+#define	SCR_TxUseDK						BIT(0)			//Force Tx Use Default Key
+#define	SCR_RxUseDK						BIT(1)			//Force Rx Use Default Key
+#define	SCR_TxEncEnable					BIT(2)			//Enable Tx Encryption
+#define	SCR_RxDecEnable					BIT(3)			//Enable Rx Decryption
+#define	SCR_SKByA2							BIT(4)			//Search kEY BY A2
+#define	SCR_NoSKMC							BIT(5)			//No Key Search Multicast
+
+
+
+//-----------------------------------------------------
+//
+//	0xFE00h ~ 0xFE55h	USB Configuration
+//
+//-----------------------------------------------------
+
+//2 USB Information (0xFE17)
+#define USB_IS_HIGH_SPEED				0
+#define USB_IS_FULL_SPEED				1
+#define USB_SPEED_MASK					BIT(5)
+
+#define USB_NORMAL_SIE_EP_MASK		0xF
+#define USB_NORMAL_SIE_EP_SHIFT		4
+
+#define USB_TEST_EP_MASK				0x30
+#define USB_TEST_EP_SHIFT				4
+
+//2 Special Option
+#define USB_AGG_EN						BIT(3)
+
+
+//2REG_C2HEVT_CLEAR
+#define		C2H_EVT_HOST_CLOSE		0x00	// Set by driver and notify FW that the driver has read the C2H command message
+#define		C2H_EVT_FW_CLOSE		0xFF	// Set by FW indicating that FW had set the C2H command message and it's not yet read by driver.
+
+
+//2REG_MULTI_FUNC_CTRL(For RTL8723 Only)
+#define	WL_HWPDN_EN				BIT0		// Enable GPIO[9] as WiFi HW PDn source
+#define	WL_HWPDN_SL				BIT1		// WiFi HW PDn polarity control
+#define	WL_FUNC_EN				BIT2		// WiFi function enable
+#define	WL_HWROF_EN				BIT3		// Enable GPIO[9] as WiFi RF HW PDn source
+#define	BT_HWPDN_EN				BIT16	// Enable GPIO[11] as BT HW PDn source
+#define	BT_HWPDN_SL				BIT17	// BT HW PDn polarity control
+#define	BT_FUNC_EN					BIT18	// BT function enable
+#define	BT_HWROF_EN				BIT19	// Enable GPIO[11] as BT/GPS RF HW PDn source
+#define	GPS_HWPDN_EN				BIT20	// Enable GPIO[10] as GPS HW PDn source
+#define	GPS_HWPDN_SL				BIT21	// GPS HW PDn polarity control
+#define	GPS_FUNC_EN				BIT22	// GPS function enable
+
+//3 REG_LIFECTRL_CTRL
+#define	HAL92C_EN_PKT_LIFE_TIME_BK		BIT3
+#define	HAL92C_EN_PKT_LIFE_TIME_BE		BIT2
+#define	HAL92C_EN_PKT_LIFE_TIME_VI		BIT1
+#define	HAL92C_EN_PKT_LIFE_TIME_VO		BIT0
+
+#define	HAL92C_MSDU_LIFE_TIME_UNIT		128		// in us, said by Tim.
+
+//========================================================
+// General definitions
+//========================================================
+
+#define MAC_ADDR_LEN					6
+#define LAST_ENTRY_OF_TX_PKT_BUFFER	255
+
+#define POLLING_LLT_THRESHOLD			20
+#define POLLING_READY_TIMEOUT_COUNT	1000
+
+// Min Spacing related settings.
+#define	MAX_MSS_DENSITY_2T				0x13
+#define	MAX_MSS_DENSITY_1T				0x0A
+
+//----------------------------------------------------------------------------
+//       8192C GPIO MUX Configuration Register (offset 0x40, 4 byte)
+//----------------------------------------------------------------------------
+#define	GPIOSEL_GPIO				0
+#define	GPIOSEL_ENBT				BIT5
+
+//----------------------------------------------------------------------------
+//       8192C GPIO PIN Control Register (offset 0x44, 4 byte)
+//----------------------------------------------------------------------------
+#define	GPIO_IN						REG_GPIO_PIN_CTRL		// GPIO pins input value
+#define	GPIO_OUT					(REG_GPIO_PIN_CTRL+1)	// GPIO pins output value
+#define	GPIO_IO_SEL				(REG_GPIO_PIN_CTRL+2)	// GPIO pins output enable when a bit is set to "1"; otherwise, input is configured.
+#define	GPIO_MOD					(REG_GPIO_PIN_CTRL+3)
+
+
+
+#include "basic_types.h"
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192c_sreset.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192c_sreset.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192c_sreset.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192c_sreset.h	2017-09-23 03:42:50.042674991 +0800
@@ -0,0 +1,54 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef _RTL8192C_SRESET_C_
+#define _RTL8192C_SRESET_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+#ifdef DBG_CONFIG_ERROR_DETECT
+#define	WIFI_STATUS_SUCCESS 		0
+#define	USB_VEN_REQ_CMD_FAIL 	BIT0
+#define	USB_READ_PORT_FAIL 		BIT1
+#define	USB_WRITE_PORT_FAIL		BIT2
+#define	WIFI_MAC_TXDMA_ERROR 	BIT3			
+#define   WIFI_TX_HANG				BIT4
+#define	WIFI_RX_HANG				BIT5
+#define 	WIFI_IF_NOT_EXIST			BIT6
+
+struct sreset_priv {
+	_mutex 	silentreset_mutex;
+	u8 	silent_reset_inprogress;
+	u8	Wifi_Error_Status;
+	unsigned long last_tx_time;
+	unsigned long last_tx_complete_time;
+};
+
+
+extern void rtl8192c_sreset_init_value(_adapter *padapter);
+extern void rtl8192c_sreset_reset_value(_adapter *padapter);
+extern void rtl8192c_silentreset_for_specific_platform(_adapter *padapter);
+extern void rtl8192c_sreset_xmit_status_check(_adapter *padapter);
+extern void rtl8192c_sreset_linked_status_check(_adapter *padapter);
+extern u8 rtl8192c_sreset_get_wifi_status(_adapter *padapter);
+#endif
+#endif
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192c_xmit.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192c_xmit.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192c_xmit.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192c_xmit.h	2017-09-23 03:42:50.042674991 +0800
@@ -0,0 +1,91 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef _RTL8192C_XMIT_H_
+#define _RTL8192C_XMIT_H_
+
+#define VO_QUEUE_INX		0
+#define VI_QUEUE_INX		1
+#define BE_QUEUE_INX		2
+#define BK_QUEUE_INX		3
+#define BCN_QUEUE_INX		4
+#define MGT_QUEUE_INX		5
+#define HIGH_QUEUE_INX		6
+#define TXCMD_QUEUE_INX	7
+
+#define HW_QUEUE_ENTRY	8
+
+//
+// Queue Select Value in TxDesc
+//
+#define QSLT_BK							0x2//0x01
+#define QSLT_BE							0x0
+#define QSLT_VI							0x5//0x4
+#define QSLT_VO							0x7//0x6
+#define QSLT_BEACON						0x10
+#define QSLT_HIGH						0x11
+#define QSLT_MGNT						0x12
+#define QSLT_CMD						0x13
+
+#ifdef CONFIG_USB_HCI
+
+#ifdef CONFIG_USB_TX_AGGREGATION
+#define MAX_TX_AGG_PACKET_NUMBER 0xFF
+#endif
+
+s32	rtl8192cu_init_xmit_priv(_adapter * padapter);
+
+void	rtl8192cu_free_xmit_priv(_adapter * padapter);
+
+void rtl8192cu_cal_txdesc_chksum(struct tx_desc	*ptxdesc);
+
+s32 rtl8192cu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
+
+void rtl8192cu_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe);
+
+s32 rtl8192cu_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe);
+
+#ifdef CONFIG_HOSTAPD_MLME
+s32 rtl8192cu_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt);
+#endif
+
+#endif
+
+#ifdef CONFIG_PCI_HCI
+s32	rtl8192ce_init_xmit_priv(_adapter * padapter);
+void	rtl8192ce_free_xmit_priv(_adapter * padapter);
+
+s32	rtl8192ce_enqueue_xmitbuf(struct rtw_tx_ring *ring, struct xmit_buf *pxmitbuf);
+struct xmit_buf *rtl8192ce_dequeue_xmitbuf(struct rtw_tx_ring *ring);
+
+void	rtl8192ce_xmitframe_resume(_adapter *padapter);
+
+void	rtl8192ce_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe);
+
+s32	rtl8192ce_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe);
+
+#ifdef CONFIG_HOSTAPD_MLME
+s32	rtl8192ce_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt);
+#endif
+
+#endif
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192d_cmd.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192d_cmd.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192d_cmd.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192d_cmd.h	2017-09-23 03:42:50.042674991 +0800
@@ -0,0 +1,104 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef __RTL8192D_CMD_H_
+#define __RTL8192D_CMD_H_
+
+
+//--------------------------------------------
+//3				Host Message Box 
+//--------------------------------------------
+
+// User Define Message [31:8]
+
+//_SETPWRMODE_PARM
+#define SET_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
+#define SET_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value)
+#define SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value)
+
+//JOINBSSRPT_PARM
+#define SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
+
+//_RSVDPAGE_LOC
+#define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
+#define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value)
+#define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value)
+
+//P2P_PS_OFFLOAD
+
+struct P2P_PS_Offload_t {
+ unsigned char Offload_En:1;
+ unsigned char role:1; // 1: Owner, 0: Client
+ unsigned char CTWindow_En:1;
+ unsigned char NoA0_En:1;
+ unsigned char NoA1_En:1;
+ unsigned char AllStaSleep:1; // Only valid in Owner
+ unsigned char discovery:1;
+ unsigned char rsvd:1;
+};
+
+#define SET_H2CCMD_P2P_PS_OFFLOAD_EN(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value)
+#define SET_H2CCMD_P2P_PS_OFFLOAD_ROLE(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value)
+#define SET_H2CCMD_P2P_PS_OFFLOAD_CTW(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value)
+#define SET_H2CCMD_P2P_PS_OFFLOAD_NOA0(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value)
+#define SET_H2CCMD_P2P_PS_OFFLOAD_NOA1(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value)
+#define SET_H2CCMD_P2P_PS_OFFLOAD_ALLSTASLEEP(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value)
+#define SET_H2CCMD_P2P_PS_OFFLOAD_DISCOVERY(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd, 6, 1, __Value)
+
+// Description: Determine the types of H2C commands that are the same in driver and Fw.
+// Fisrt constructed by tynli. 2009.10.09.
+typedef enum _RTL8192D_H2C_CMD 
+{
+	H2C_AP_OFFLOAD = 0,		/*0*/
+	H2C_SETPWRMODE = 1,		/*1*/
+	H2C_JOINBSSRPT = 2,		/*2*/
+	H2C_RSVDPAGE = 3,
+	H2C_RSSI_REPORT = 5,
+	H2C_RA_MASK = 6,
+	H2C_P2P_PS_OFFLOAD = 8,
+	H2C_MAC_MODE_SEL = 9,
+	H2C_PWRM=15,
+	H2C_P2P_PS_CTW_CMD = 24,
+	H2C_PathDiv = 26,                  //PathDiv--NeilChen--2011.07.15
+	H2C_CMD_MAX
+}RTL8192D_H2C_CMD;
+
+struct cmd_msg_parm {
+	u8 eid; //element id
+	u8 sz; // sz
+	u8 buf[6];
+};
+
+
+void	FillH2CCmd92D(_adapter* padapter, u8 ElementID, u32 CmdLen, u8* pCmdBuffer);
+
+// host message to firmware cmd
+void	rtl8192d_set_FwPwrMode_cmd(_adapter*padapter, u8 Mode);
+void	rtl8192d_set_FwJoinBssReport_cmd(_adapter* padapter, u8 mstatus);
+u8	rtl8192d_set_rssi_cmd(_adapter*padapter, u8 *param);
+u8	rtl8192d_set_raid_cmd(_adapter*padapter, u32 mask, u8 arg);
+void	rtl8192d_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg);
+#ifdef CONFIG_P2P
+void	rtl8192d_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state);
+#endif //CONFIG_P2P
+
+#endif
+
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192d_dm.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192d_dm.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192d_dm.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192d_dm.h	2017-09-23 03:42:50.042674991 +0800
@@ -0,0 +1,414 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+******************************************************************************/
+#ifndef	__RTL8192D_DM_H__
+#define __RTL8192D_DM_H__
+//============================================================
+// Description:
+//
+// This file is for 92CE/92CU dynamic mechanism only
+//
+//
+//============================================================
+//============================================================
+// Global var
+//============================================================
+
+extern u32 EDCAParam[maxAP][3] ;
+
+#define	OFDM_TABLE_SIZE 	37
+#define	OFDM_TABLE_SIZE_92D 	43
+#define	CCK_TABLE_SIZE		33
+extern u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D] ;
+
+extern u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8];
+
+extern u8 CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8];
+
+//============================================================
+// structure and define
+//============================================================
+
+typedef struct _FALSE_ALARM_STATISTICS{
+	u32	Cnt_Parity_Fail;
+	u32	Cnt_Rate_Illegal;
+	u32	Cnt_Crc8_fail;
+	u32	Cnt_Mcs_fail;
+	u32	Cnt_Ofdm_fail;
+	u32	Cnt_Cck_fail;
+	u32	Cnt_all;
+	u32	Cnt_Fast_Fsync;
+	u32	Cnt_SB_Search_fail;
+}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS;
+
+typedef struct _Dynamic_Power_Saving_
+{
+	u8		PreCCAState;
+	u8		CurCCAState;
+
+	u8		PreRFState;
+	u8		CurRFState;
+
+	//int		Rssi_val_min;
+	
+}PS_T,*pPS_T;
+
+typedef struct _Dynamic_Initial_Gain_Threshold_
+{
+	u8		Dig_Enable_Flag;
+	u8		Dig_Ext_Port_Stage;
+	
+	int		RssiLowThresh;
+	int		RssiHighThresh;
+
+	u32		FALowThresh;
+	u32		FAHighThresh;
+
+	u8		CurSTAConnectState;
+	u8		PreSTAConnectState;
+	u8		CurMultiSTAConnectState;
+
+	u8		PreIGValue;
+	u8		CurIGValue;
+	u8	       BackupIGValue;
+
+	char		BackoffVal;
+	char		BackoffVal_range_max;
+	char		BackoffVal_range_min;
+	u8		rx_gain_range_max;
+	u8		rx_gain_range_min;
+	u8		Rssi_val_min;
+
+	u8		PreCCKPDState;
+	u8		CurCCKPDState;
+
+	u8		LargeFAHit;
+	u8		ForbiddenIGI;
+	u32		Recover_cnt;
+}DIG_T,*pDIG_T;
+typedef enum tag_Dynamic_Init_Gain_Operation_Type_Definition
+{
+	DIG_TYPE_THRESH_HIGH	= 0,
+	DIG_TYPE_THRESH_LOW	= 1,
+	DIG_TYPE_BACKOFF		= 2,
+	DIG_TYPE_RX_GAIN_MIN	= 3,
+	DIG_TYPE_RX_GAIN_MAX	= 4,
+	DIG_TYPE_ENABLE 		= 5,
+	DIG_TYPE_DISABLE 		= 6,
+	DIG_OP_TYPE_MAX
+}DM_DIG_OP_E;
+
+typedef enum tag_CCK_Packet_Detection_Threshold_Type_Definition
+{
+	CCK_PD_STAGE_LowRssi = 0,
+	CCK_PD_STAGE_HighRssi = 1,
+	CCK_PD_STAGE_MAX = 3,
+}DM_CCK_PDTH_E;
+
+typedef enum tag_1R_CCA_Type_Definition
+{
+	CCA_MIN = 0,
+	CCA_1R =1,
+	CCA_2R = 2,
+	CCA_MAX = 3,
+}DM_1R_CCA_E;
+
+typedef enum tag_RF_Type_Definition
+{
+	RF_Save =0,
+	RF_Normal = 1,
+	RF_MAX = 2,
+}DM_RF_E;
+
+typedef enum tag_DIG_EXT_PORT_ALGO_Definition
+{
+	DIG_EXT_PORT_STAGE_0 = 0,
+	DIG_EXT_PORT_STAGE_1 = 1,
+	DIG_EXT_PORT_STAGE_2 = 2,
+	DIG_EXT_PORT_STAGE_3 = 3,
+	DIG_EXT_PORT_STAGE_MAX = 4,
+}DM_DIG_EXT_PORT_ALG_E;
+
+
+typedef enum tag_DIG_Connect_Definition
+{
+	DIG_STA_DISCONNECT = 0,	
+	DIG_STA_CONNECT = 1,
+	DIG_STA_BEFORE_CONNECT = 2,
+	DIG_MultiSTA_DISCONNECT = 3,
+	DIG_MultiSTA_CONNECT = 4,
+	DIG_CONNECT_MAX
+}DM_DIG_CONNECT_E;
+
+
+#define		DM_DIG_THRESH_HIGH			40
+#define		DM_DIG_THRESH_LOW			35
+
+#define		DM_FALSEALARM_THRESH_LOW	400
+#define		DM_FALSEALARM_THRESH_HIGH	1000
+
+#define		DM_DIG_MAX					0x3e
+#define		DM_DIG_MIN					0x1e //0x22//0x1c
+
+#define		DM_DIG_FA_UPPER				0x32
+#define		DM_DIG_FA_LOWER				0x20
+
+//vivi 92c&92d has different definition, 20110504
+//this is for 92c
+#define		DM_DIG_FA_TH0				0x200//0x20
+#define		DM_DIG_FA_TH1				0x300//0x100
+#define		DM_DIG_FA_TH2				0x400//0x200
+//this is for 92d
+#define		DM_DIG_FA_TH0_92D			0x100
+#define		DM_DIG_FA_TH1_92D			0x400
+#define		DM_DIG_FA_TH2_92D			0x600
+
+#define		DM_DIG_BACKOFF_MAX			12
+#define		DM_DIG_BACKOFF_MIN			(-4)
+#define		DM_DIG_BACKOFF_DEFAULT		10
+
+#define		RxPathSelection_SS_TH_low		30
+#define		RxPathSelection_diff_TH			18
+
+#define		DM_RATR_STA_INIT			0
+#define		DM_RATR_STA_HIGH			1
+#define 		DM_RATR_STA_MIDDLE		2
+#define 		DM_RATR_STA_LOW			3
+
+#define		CTSToSelfTHVal					30
+#define		RegC38_TH						20
+
+#define		WAIotTHVal						25
+
+//Dynamic Tx Power Control Threshold
+#define		TX_POWER_NEAR_FIELD_THRESH_LVL2	74
+#define		TX_POWER_NEAR_FIELD_THRESH_LVL1	67
+
+#define		TxHighPwrLevel_Normal		0	
+#define		TxHighPwrLevel_Level1		1
+#define		TxHighPwrLevel_Level2		2
+#define		TxHighPwrLevel_BT1			3
+#define		TxHighPwrLevel_BT2			4
+#define		TxHighPwrLevel_15			5
+#define		TxHighPwrLevel_35			6
+#define		TxHighPwrLevel_50			7
+#define		TxHighPwrLevel_70			8
+#define		TxHighPwrLevel_100			9
+
+#define		DM_Type_ByFW			0
+#define		DM_Type_ByDriver		1
+
+typedef struct _RATE_ADAPTIVE
+{
+	u8				RateAdaptiveDisabled;
+	u8				RATRState;
+	u16				reserve;	
+	
+	u32				HighRSSIThreshForRA;
+	u32				High2LowRSSIThreshForRA;
+	u8				Low2HighRSSIThreshForRA40M;
+	u32				LowRSSIThreshForRA40M;	
+	u8				Low2HighRSSIThreshForRA20M;
+	u32				LowRSSIThreshForRA20M;	
+	u32				UpperRSSIThresholdRATR;
+	u32				MiddleRSSIThresholdRATR;
+	u32				LowRSSIThresholdRATR;
+	u32				LowRSSIThresholdRATR40M;
+	u32				LowRSSIThresholdRATR20M;
+	u8				PingRSSIEnable;	//cosa add for Netcore long range ping issue
+	u32				PingRSSIRATR;	//cosa add for Netcore long range ping issue
+	u32				PingRSSIThreshForRA;//cosa add for Netcore long range ping issue
+	u32				LastRATR;
+	u8				PreRATRState;
+	
+} RATE_ADAPTIVE, *PRATE_ADAPTIVE;
+
+typedef enum tag_SW_Antenna_Switch_Definition
+{
+	Antenna_B = 1,
+	Antenna_A = 2,
+	Antenna_MAX = 3,
+}DM_SWAS_E;
+
+// 20100514 Joseph: Add definition for antenna switching test after link.
+// This indicates two different the steps. 
+// In SWAW_STEP_PEAK, driver needs to switch antenna and listen to the signal on the air.
+// In SWAW_STEP_DETERMINE, driver just compares the signal captured in SWAW_STEP_PEAK
+// with original RSSI to determine if it is necessary to switch antenna.
+#define SWAW_STEP_PEAK		0
+#define SWAW_STEP_DETERMINE	1
+
+#define	TP_MODE		0
+#define	RSSI_MODE		1
+#define	TRAFFIC_LOW	0
+#define	TRAFFIC_HIGH	1
+
+//=============================
+//Neil Chen---2011--06--15--
+//==============================
+//3 PathDiv 
+typedef struct _SW_Antenna_Switch_
+{
+	u8		try_flag;
+	s32		PreRSSI;
+	u8		CurAntenna;
+	u8		PreAntenna;
+	u8		RSSI_Trying;
+	u8		TestMode;
+	u8		bTriggerAntennaSwitch;
+	u8		SelectAntennaMap;
+
+	// Before link Antenna Switch check
+	u8		SWAS_NoLink_State;
+	u32		SWAS_NoLink_BK_Reg860;
+}SWAT_T, *pSWAT_T;
+//========================================
+
+struct 	dm_priv	
+{
+	u8	DM_Type;
+	u8	DMFlag, DMFlag_tmp;
+
+	//for DIG
+	u8	bDMInitialGainEnable;
+	//u8	binitialized; // for dm_initial_gain_Multi_STA use.
+	DIG_T	DM_DigTable;
+
+	PS_T	DM_PSTable;
+
+	FALSE_ALARM_STATISTICS	FalseAlmCnt;	
+	
+	//for rate adaptive, in fact,  88c/92c fw will handle this
+	u8	bUseRAMask;
+	RATE_ADAPTIVE	RateAdaptive;
+
+	//* Upper and Lower Signal threshold for Rate Adaptive*/
+	int	UndecoratedSmoothedPWDB;
+	int	EntryMinUndecoratedSmoothedPWDB;
+	int	EntryMaxUndecoratedSmoothedPWDB;
+	int	MinUndecoratedPWDBForDM;
+	int	LastMinUndecoratedPWDBForDM;
+
+	//for High Power
+	u8	bDynamicTxPowerEnable;
+	u8	LastDTPLvl;
+	u8	DynamicTxHighPowerLvl;//Add by Jacken Tx Power Control for Near/Far Range 2008/03/06
+		
+	//for tx power tracking
+	u8	bTXPowerTracking;
+	u8	TXPowercount;
+	u8	bTXPowerTrackingInit;	
+	u8	TxPowerTrackControl;	//for mp mode, turn off txpwrtracking as default
+	u8	TM_Trigger;
+
+	u8	ThermalMeter[2];	// ThermalMeter, index 0 for RFIC0, and 1 for RFIC1
+	u8	ThermalValue;
+	u8	ThermalValue_LCK;
+	u8	ThermalValue_IQK;
+	u8	ThermalValue_AVG[AVG_THERMAL_NUM];
+	u8	ThermalValue_AVG_index;
+	u8	ThermalValue_RxGain;
+	u8	ThermalValue_Crystal;
+	u8	Delta_IQK;
+	u8	Delta_LCK;
+	u8	bRfPiEnable;
+	u8	bReloadtxpowerindex;
+	u8	bDoneTxpower;
+
+	//for APK
+	u32	APKoutput[2][2];	//path A/B; output1_1a/output1_2a
+	u8	bAPKdone;
+	u8	bAPKThermalMeterIgnore;
+	BOOLEAN		bDPKdone[2];
+	BOOLEAN		bDPKstore;
+	BOOLEAN		bDPKworking;
+	u8	OFDM_min_index_internalPA_DPK[2];
+	u8	TxPowerLevelDPK[2];
+
+	u32	RegA24;
+
+	//for IQK
+	u32	Reg874;
+	u32	RegC08;
+	u32	Reg88C;
+	u8	Reg522;
+	u8	Reg550;
+	u8	Reg551;
+	u32	Reg870;
+	u32	ADDA_backup[IQK_ADDA_REG_NUM];
+	u32	IQK_MAC_backup[IQK_MAC_REG_NUM];
+	u32	IQK_BB_backup[IQK_BB_REG_NUM];
+
+	u8	bCCKinCH14;
+
+	char	CCK_index;
+	//u8 Record_CCK_20Mindex;
+	//u8 Record_CCK_40Mindex;
+	char	OFDM_index[2];
+
+	SWAT_T DM_SWAT_Table;
+
+       //Neil Chen----2011--06--23-----
+       //3 Path Diversity 
+	BOOLEAN		bPathDiv_Enable;	//For 92D Non-interrupt Antenna Diversity by Neil ,add by wl.2011.07.19
+	BOOLEAN		RSSI_test;
+	s32			RSSI_sum_A;
+	s32			RSSI_cnt_A;
+	s32			RSSI_sum_B;
+	s32			RSSI_cnt_B;
+	struct sta_info	*RSSI_target;
+	_timer		PathDivSwitchTimer;
+
+	//for TxPwrTracking
+	int	RegE94;
+	int 	RegE9C;
+	int	RegEB4;
+	int	RegEBC;
+#if MP_DRIVER == 1
+	u8	RegC04_MP;
+	u32	RegD04_MP;
+#endif
+	u32	TXPowerTrackingCallbackCnt;	//cosa add for debug
+
+	u32	prv_traffic_idx; // edca turbo
+
+	u32	RegRF3C[2];	//pathA / pathB
+
+	// Add for Reading Initial Data Rate SEL Register 0x484 during watchdog. Using for fill tx desc. 2011.3.21 by Thomas
+	u8	INIDATA_RATE[32];
+};
+
+
+/*------------------------Export global variable----------------------------*/
+/*------------------------Export global variable----------------------------*/
+/*------------------------Export Marco Definition---------------------------*/
+//#define DM_MultiSTA_InitGainChangeNotify(Event) {DM_DigTable.CurMultiSTAConnectState = Event;}
+
+
+//============================================================
+// function prototype
+//============================================================
+void rtl8192d_init_dm_priv(IN PADAPTER Adapter);
+void rtl8192d_deinit_dm_priv(IN PADAPTER Adapter);
+void	rtl8192d_InitHalDm(IN PADAPTER Adapter);
+void	rtl8192d_HalDmWatchDog(IN PADAPTER Adapter);
+
+VOID rtl8192d_dm_CheckTXPowerTracking(IN PADAPTER Adapter);
+
+#endif	//__HAL8190PCIDM_H__
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192d_hal.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192d_hal.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192d_hal.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192d_hal.h	2017-09-23 03:42:50.042674991 +0800
@@ -0,0 +1,975 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __RTL8192D_HAL_H__
+#define __RTL8192D_HAL_H__
+
+#include "rtl8192d_spec.h"
+#include "Hal8192DPhyReg.h"
+#include "Hal8192DPhyCfg.h"
+#include "rtl8192d_rf.h"
+#include "rtl8192d_dm.h"
+#include "rtl8192d_recv.h"
+#include "rtl8192d_xmit.h"
+#include "rtl8192d_cmd.h"
+
+#ifdef CONFIG_PCI_HCI
+	#include <pci_ops.h>
+	#include "Hal8192DEHWImg.h"
+
+	#define RTL819X_DEFAULT_RF_TYPE			RF_2T2R
+
+//---------------------------------------------------------------------
+//		RTL8192DE From file
+//---------------------------------------------------------------------
+	#define RTL8192D_FW_IMG 					"rtl8192DE\\rtl8192dfw.bin"
+
+	#define RTL8192D_PHY_REG					"rtl8192DE\\PHY_REG.txt"
+	#define RTL8192D_PHY_REG_PG				"rtl8192DE\\PHY_REG_PG.txt"
+	#define RTL8192D_PHY_REG_MP				"rtl8192DE\\PHY_REG_MP.txt"
+	
+	#define RTL8192D_AGC_TAB					"rtl8192DE\\AGC_TAB.txt"
+	#define RTL8192D_AGC_TAB_2G				"rtl8192DE\\AGC_TAB_2G.txt"
+	#define RTL8192D_AGC_TAB_5G				"rtl8192DE\\AGC_TAB_5G.txt"
+	#define RTL8192D_PHY_RADIO_A				"rtl8192DE\\radio_a.txt"
+	#define RTL8192D_PHY_RADIO_B				"rtl8192DE\\radio_b.txt"
+	#define RTL8192D_PHY_RADIO_A_intPA		"rtl8192DE\\radio_a_intPA.txt"
+	#define RTL8192D_PHY_RADIO_B_intPA		"rtl8192DE\\radio_b_intPA.txt"			
+	#define RTL8192D_PHY_MACREG				"rtl8192DE\\MAC_REG.txt"
+
+//---------------------------------------------------------------------
+//		RTL8192DE From header
+//---------------------------------------------------------------------
+
+	// Fw Array
+	#define Rtl8192D_FwImageArray 				Rtl8192DEFwImgArray
+
+	// MAC/BB/PHY Array
+	#define Rtl8192D_MAC_Array					Rtl8192DEMAC_2T_Array
+	#define Rtl8192D_AGCTAB_Array				Rtl8192DEAGCTAB_Array
+	#define Rtl8192D_AGCTAB_5GArray			Rtl8192DEAGCTAB_5GArray
+	#define Rtl8192D_AGCTAB_2GArray			Rtl8192DEAGCTAB_2GArray
+	#define Rtl8192D_AGCTAB_2TArray 			Rtl8192DEAGCTAB_2TArray
+	#define Rtl8192D_AGCTAB_1TArray 			Rtl8192DEAGCTAB_1TArray
+	#define Rtl8192D_PHY_REG_2TArray			Rtl8192DEPHY_REG_2TArray		
+	#define Rtl8192D_PHY_REG_1TArray			Rtl8192DEPHY_REG_1TArray
+	#define Rtl8192D_PHY_REG_Array_PG			Rtl8192DEPHY_REG_Array_PG
+	#define Rtl8192D_PHY_REG_Array_MP			Rtl8192DEPHY_REG_Array_MP
+	#define Rtl8192D_RadioA_2TArray				Rtl8192DERadioA_2TArray
+	#define Rtl8192D_RadioA_1TArray				Rtl8192DERadioA_1TArray
+	#define Rtl8192D_RadioB_2TArray				Rtl8192DERadioB_2TArray
+	#define Rtl8192D_RadioB_1TArray				Rtl8192DERadioB_1TArray
+	#define Rtl8192D_RadioA_2T_intPAArray		Rtl8192DERadioA_2T_intPAArray
+	#define Rtl8192D_RadioB_2T_intPAArray 		Rtl8192DERadioB_2T_intPAArray
+
+	// Array length
+	#define Rtl8192D_FwImageArrayLength			Rtl8192DEImgArrayLength
+	#define Rtl8192D_MAC_ArrayLength				Rtl8192DEMAC_2T_ArrayLength
+	#define Rtl8192D_AGCTAB_5GArrayLength			Rtl8192DEAGCTAB_5GArrayLength
+	#define Rtl8192D_AGCTAB_2GArrayLength			Rtl8192DEAGCTAB_2GArrayLength
+	#define Rtl8192D_AGCTAB_2TArrayLength			Rtl8192DEAGCTAB_2TArrayLength
+	#define Rtl8192D_AGCTAB_1TArrayLength			Rtl8192DEAGCTAB_1TArrayLength
+	#define Rtl8192D_AGCTAB_ArrayLength 			Rtl8192DEAGCTAB_ArrayLength
+	#define Rtl8192D_PHY_REG_2TArrayLength			Rtl8192DEPHY_REG_2TArrayLength
+	#define Rtl8192D_PHY_REG_1TArrayLength			Rtl8192DEPHY_REG_1TArrayLength
+	#define Rtl8192D_PHY_REG_Array_PGLength		Rtl8192DEPHY_REG_Array_PGLength
+	#define Rtl8192D_PHY_REG_Array_MPLength		Rtl8192DEPHY_REG_Array_MPLength
+	#define Rtl8192D_RadioA_2TArrayLength			Rtl8192DERadioA_2TArrayLength
+	#define Rtl8192D_RadioB_2TArrayLength			Rtl8192DERadioB_2TArrayLength
+	#define Rtl8192D_RadioA_2T_intPAArrayLength		Rtl8192DERadioA_2T_intPAArrayLength
+	#define Rtl8192D_RadioB_2T_intPAArrayLength		Rtl8192DERadioB_2T_intPAArrayLength
+
+#elif defined(CONFIG_USB_HCI)
+
+	#include "Hal8192DUHWImg.h"
+
+	#define RTL819X_DEFAULT_RF_TYPE		RF_1T2R
+
+//---------------------------------------------------------------------
+//		RTL8192DU From file
+//---------------------------------------------------------------------
+	#define RTL8192D_FW_IMG					"rtl8192DU\\rtl8192dfw.bin"
+
+	#define RTL8192D_PHY_REG					"rtl8192DU\\PHY_REG.txt"
+	#define RTL8192D_PHY_REG_PG				"rtl8192DU\\PHY_REG_PG.txt"
+	#define RTL8192D_PHY_REG_MP				"rtl8192DU\\PHY_REG_MP.txt"			
+	
+	#define RTL8192D_AGC_TAB					"rtl8192DU\\AGC_TAB.txt"
+	#define RTL8192D_AGC_TAB_2G				"rtl8192DU\\AGC_TAB_2G.txt"
+	#define RTL8192D_AGC_TAB_5G				"rtl8192DU\\AGC_TAB_5G.txt"
+	#define RTL8192D_PHY_RADIO_A				"rtl8192DU\\radio_a.txt"
+	#define RTL8192D_PHY_RADIO_B				"rtl8192DU\\radio_b.txt"
+	#define RTL8192D_PHY_RADIO_A_intPA		"rtl8192DU\\radio_a_intPA.txt"
+	#define RTL8192D_PHY_RADIO_B_intPA		"rtl8192DU\\radio_b_intPA.txt"
+	#define RTL8192D_PHY_MACREG				"rtl8192DU\\MAC_REG.txt"
+
+//---------------------------------------------------------------------
+//		RTL8192DU From header
+//---------------------------------------------------------------------
+		
+	// Fw Array
+	#define Rtl8192D_FwImageArray 					Rtl8192DUFwImgArray
+	
+	// MAC/BB/PHY Array
+	#define Rtl8192D_MAC_Array						Rtl8192DUMAC_2T_Array
+	#define Rtl8192D_AGCTAB_Array					Rtl8192DUAGCTAB_Array
+	#define Rtl8192D_AGCTAB_5GArray				Rtl8192DUAGCTAB_5GArray
+	#define Rtl8192D_AGCTAB_2GArray				Rtl8192DUAGCTAB_2GArray
+	#define Rtl8192D_AGCTAB_2TArray 				Rtl8192DUAGCTAB_2TArray
+	#define Rtl8192D_AGCTAB_1TArray 				Rtl8192DUAGCTAB_1TArray
+	#define Rtl8192D_PHY_REG_2TArray				Rtl8192DUPHY_REG_2TArray			
+	#define Rtl8192D_PHY_REG_1TArray				Rtl8192DUPHY_REG_1TArray
+	#define Rtl8192D_PHY_REG_Array_PG				Rtl8192DUPHY_REG_Array_PG
+	#define Rtl8192D_PHY_REG_Array_MP				Rtl8192DUPHY_REG_Array_MP
+	#define Rtl8192D_RadioA_2TArray					Rtl8192DURadioA_2TArray
+	#define Rtl8192D_RadioA_1TArray					Rtl8192DURadioA_1TArray
+	#define Rtl8192D_RadioB_2TArray					Rtl8192DURadioB_2TArray
+	#define Rtl8192D_RadioB_1TArray					Rtl8192DURadioB_1TArray
+	#define Rtl8192D_RadioA_2T_intPAArray			Rtl8192DURadioA_2T_intPAArray
+	#define Rtl8192D_RadioB_2T_intPAArray 			Rtl8192DURadioB_2T_intPAArray
+	
+	// Array length
+	#define Rtl8192D_FwImageArrayLength			Rtl8192DUImgArrayLength
+	#define Rtl8192D_MAC_ArrayLength				Rtl8192DUMAC_2T_ArrayLength
+	#define Rtl8192D_AGCTAB_5GArrayLength			Rtl8192DUAGCTAB_5GArrayLength
+	#define Rtl8192D_AGCTAB_2GArrayLength			Rtl8192DUAGCTAB_2GArrayLength
+	#define Rtl8192D_AGCTAB_2TArrayLength			Rtl8192DUAGCTAB_2TArrayLength
+	#define Rtl8192D_AGCTAB_1TArrayLength			Rtl8192DUAGCTAB_1TArrayLength
+	#define Rtl8192D_AGCTAB_ArrayLength 			Rtl8192DUAGCTAB_ArrayLength
+	#define Rtl8192D_PHY_REG_2TArrayLength			Rtl8192DUPHY_REG_2TArrayLength
+	#define Rtl8192D_PHY_REG_1TArrayLength			Rtl8192DUPHY_REG_1TArrayLength
+	#define Rtl8192D_PHY_REG_Array_PGLength		Rtl8192DUPHY_REG_Array_PGLength
+	#define Rtl8192D_PHY_REG_Array_MPLength		Rtl8192DUPHY_REG_Array_MPLength
+	#define Rtl8192D_RadioA_2TArrayLength			Rtl8192DURadioA_2TArrayLength
+	#define Rtl8192D_RadioB_2TArrayLength			Rtl8192DURadioB_2TArrayLength
+	#define Rtl8192D_RadioA_2T_intPAArrayLength		Rtl8192DURadioA_2T_intPAArrayLength			
+	#define Rtl8192D_RadioB_2T_intPAArrayLength		Rtl8192DURadioB_2T_intPAArrayLength
+
+	// The file name "_2T" is for 92CU, "_1T"  is for 88CU. Modified by tynli. 2009.11.24.
+/*	#define Rtl819XFwImageArray					Rtl8192DUFwImgArray
+	#define Rtl819XMAC_Array					Rtl8192DUMAC_2TArray
+	#define Rtl819XAGCTAB_Array					Rtl8192DUAGCTAB_Array
+	#define Rtl819XAGCTAB_5GArray				Rtl8192DUAGCTAB_5GArray
+	#define Rtl819XAGCTAB_2GArray				Rtl8192DUAGCTAB_2GArray
+	#define Rtl819XPHY_REG_2TArray				Rtl8192DUPHY_REG_2TArray
+	#define Rtl819XPHY_REG_1TArray				Rtl8192DUPHY_REG_1TArray
+	#define Rtl819XRadioA_2TArray				Rtl8192DURadioA_2TArray
+	#define Rtl819XRadioA_1TArray				Rtl8192DURadioA_1TArray
+	#define Rtl819XRadioA_2T_intPAArray 			Rtl8192DURadioA_2T_intPAArray
+	#define Rtl819XRadioB_2TArray				Rtl8192DURadioB_2TArray
+	#define Rtl819XRadioB_1TArray				Rtl8192DURadioB_1TArray
+	#define Rtl819XRadioB_2T_intPAArray 			Rtl8192DURadioB_2T_intPAArray
+	#define Rtl819XPHY_REG_Array_PG 			Rtl8192DUPHY_REG_Array_PG
+	#define Rtl819XPHY_REG_Array_MP 			Rtl8192DUPHY_REG_Array_MP
+
+	#define Rtl819XAGCTAB_2TArray				Rtl8192DUAGCTAB_2TArray
+	#define Rtl819XAGCTAB_1TArray				Rtl8192DUAGCTAB_1TArray*/
+
+#endif
+
+#define DRVINFO_SZ	4 // unit is 8bytes
+#define PageNum_128(_Len)		(u32)(((_Len)>>7) + ((_Len)&0x7F ? 1:0))
+
+//
+// Check if FW header exists. We do not consider the lower 4 bits in this case. 
+// By tynli. 2009.12.04.
+//
+#define IS_FW_HEADER_EXIST(_pFwHdr)	((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x92C0 ||\
+									(le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88C0 ||\
+									(le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D0 ||\
+									(le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D1 ||\
+									(le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D2 ||\
+									(le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D3 )
+
+#define FW_8192D_SIZE				0x8000
+#define FW_8192D_START_ADDRESS	0x1000
+
+#define MAX_PAGE_SIZE				4096	// @ page : 4k bytes
+
+typedef enum _FIRMWARE_SOURCE{
+	FW_SOURCE_IMG_FILE = 0,
+	FW_SOURCE_HEADER_FILE = 1,		//from header file
+}FIRMWARE_SOURCE, *PFIRMWARE_SOURCE;
+
+typedef struct _RT_FIRMWARE{
+	FIRMWARE_SOURCE	eFWSource;
+	u8*			szFwBuffer;
+	u32			ulFwLength;
+}RT_FIRMWARE, *PRT_FIRMWARE, RT_FIRMWARE_92D, *PRT_FIRMWARE_92D;
+
+//
+// This structure must be cared byte-ordering
+//
+// Added by tynli. 2009.12.04.
+typedef struct _RT_8192D_FIRMWARE_HDR {//8-byte alinment required
+
+	//--- LONG WORD 0 ----
+	u16		Signature;	// 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut
+	u8		Category;	// AP/NIC and USB/PCI
+	u8		Function;	// Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions
+	u16		Version;		// FW Version
+	u8		Subversion;	// FW Subversion, default 0x00
+	u8		Rsvd1;
+
+
+	//--- LONG WORD 1 ----
+	u8		Month;	// Release time Month field
+	u8		Date;	// Release time Date field
+	u8		Hour;	// Release time Hour field
+	u8		Minute;	// Release time Minute field
+	u16		RamCodeSize;	// The size of RAM code
+	u16		Rsvd2;
+
+	//--- LONG WORD 2 ----
+	u32		SvnIdx;	// The SVN entry index
+	u32		Rsvd3;
+
+	//--- LONG WORD 3 ----
+	u32		Rsvd4;
+	u32		Rsvd5;
+
+}RT_8192D_FIRMWARE_HDR, *PRT_8192D_FIRMWARE_HDR;
+
+#define DRIVER_EARLY_INT_TIME		0x05
+#define BCN_DMA_ATIME_INT_TIME		0x02
+
+typedef	enum _BT_CoType{
+	BT_2Wire			= 0,		
+	BT_ISSC_3Wire	= 1,
+	BT_Accel			= 2,
+	BT_CSR			= 3,
+	BT_CSR_ENHAN	= 4,
+	BT_RTL8756		= 5,
+} BT_CoType, *PBT_CoType;
+
+typedef	enum _BT_CurState{
+	BT_OFF		= 0,	
+	BT_ON		= 1,
+} BT_CurState, *PBT_CurState;
+
+typedef	enum _BT_ServiceType{
+	BT_SCO			= 0,	
+	BT_A2DP			= 1,
+	BT_HID			= 2,
+	BT_HID_Idle		= 3,
+	BT_Scan			= 4,
+	BT_Idle			= 5,
+	BT_OtherAction	= 6,
+	BT_Busy			= 7,
+	BT_OtherBusy		= 8,
+} BT_ServiceType, *PBT_ServiceType;
+
+typedef	enum _BT_RadioShared{
+	BT_Radio_Shared 	= 0,	
+	BT_Radio_Individual	= 1,
+} BT_RadioShared, *PBT_RadioShared;
+
+typedef struct _BT_COEXIST_STR{
+	u8					BluetoothCoexist;
+	u8					BT_Ant_Num;
+	u8					BT_CoexistType;
+	u8					BT_State;
+	u8					BT_CUR_State;		//0:on, 1:off
+	u8					BT_Ant_isolation;	//0:good, 1:bad
+	u8					BT_PapeCtrl;		//0:SW, 1:SW/HW dynamic
+	u8					BT_Service;			
+	u8					BT_RadioSharedType;
+	u8					Ratio_Tx;
+	u8					Ratio_PRI;
+}BT_COEXIST_STR, *PBT_COEXIST_STR;
+
+//Added for 92D IQK setting.
+typedef struct _IQK_MATRIX_REGS_SETTING{
+	BOOLEAN 	bIQKDone;
+#if 1
+	int		Value[1][IQK_Matrix_REG_NUM];
+#else	
+	u32		Mark[IQK_Matrix_REG_NUM];
+	u32		Value[IQK_Matrix_REG_NUM];
+#endif	
+}IQK_MATRIX_REGS_SETTING,*PIQK_MATRIX_REGS_SETTING;
+
+#ifdef CONFIG_USB_RX_AGGREGATION
+
+typedef enum _USB_RX_AGG_MODE{
+	USB_RX_AGG_DISABLE,
+	USB_RX_AGG_DMA,
+	USB_RX_AGG_USB,
+	USB_RX_AGG_DMA_USB
+}USB_RX_AGG_MODE;
+
+#define MAX_RX_DMA_BUFFER_SIZE	10240		// 10K for 8192C RX DMA buffer
+
+#endif
+
+
+#define TX_SELE_HQ			BIT(0)		// High Queue
+#define TX_SELE_LQ			BIT(1)		// Low Queue
+#define TX_SELE_NQ			BIT(2)		// Normal Queue
+
+
+// Note: We will divide number of page equally for each queue other than public queue!
+
+#define TX_TOTAL_PAGE_NUMBER		0xF8
+#define TX_PAGE_BOUNDARY			(TX_TOTAL_PAGE_NUMBER + 1)
+
+// For Normal Chip Setting
+// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER
+#define NORMAL_PAGE_NUM_PUBQ		0x56
+
+
+// For Test Chip Setting
+// (HPQ + LPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER
+#define TEST_PAGE_NUM_PUBQ			0x89
+#define TX_TOTAL_PAGE_NUMBER_92D_DUAL_MAC		0x7A
+#define NORMAL_PAGE_NUM_PUBQ_92D_DUAL_MAC			0x5A
+#define NORMAL_PAGE_NUM_HPQ_92D_DUAL_MAC			0x10
+#define NORMAL_PAGE_NUM_LPQ_92D_DUAL_MAC			0x10
+#define NORMAL_PAGE_NUM_NORMALQ_92D_DUAL_MAC		0
+
+#define TX_PAGE_BOUNDARY_DUAL_MAC			(TX_TOTAL_PAGE_NUMBER_92D_DUAL_MAC + 1)
+
+// For Test Chip Setting
+#define WMM_TEST_TX_TOTAL_PAGE_NUMBER	0xF5
+#define WMM_TEST_TX_PAGE_BOUNDARY	(WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6
+
+#define WMM_TEST_PAGE_NUM_PUBQ		0xA3
+#define WMM_TEST_PAGE_NUM_HPQ		0x29
+#define WMM_TEST_PAGE_NUM_LPQ		0x29
+
+
+//Note: For Normal Chip Setting ,modify later
+#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER	0xF5
+#define WMM_NORMAL_TX_PAGE_BOUNDARY	(WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6
+
+#define WMM_NORMAL_PAGE_NUM_PUBQ		0xB0
+#define WMM_NORMAL_PAGE_NUM_HPQ		0x29
+#define WMM_NORMAL_PAGE_NUM_LPQ			0x1C
+#define WMM_NORMAL_PAGE_NUM_NPQ		0x1C
+
+#define WMM_NORMAL_PAGE_NUM_PUBQ_92D		0X65//0x82
+#define WMM_NORMAL_PAGE_NUM_HPQ_92D		0X30//0x29
+#define WMM_NORMAL_PAGE_NUM_LPQ_92D		0X30
+#define WMM_NORMAL_PAGE_NUM_NPQ_92D		0X30
+
+//-------------------------------------------------------------------------
+//	Chip specific
+//-------------------------------------------------------------------------
+
+#define CHIP_BONDING_IDENTIFIER(_value)	(((_value)>>22)&0x3)
+#define CHIP_BONDING_92C_1T2R	0x1
+#define CHIP_BONDING_88C_USB_MCARD	0x2
+#define CHIP_BONDING_88C_USB_HP	0x1
+
+//
+// 2011.01.06. Define new structure of chip version for RTL8723 and so on. Added by tynli.
+//
+/*
+     | BIT15:12           |  BIT11:8        | BIT 7              |  BIT6:4  |      BIT3          | BIT2:0  |
+     |-------------+-----------+-----------+-------+-----------+-------|
+     | IC version(CUT)  | ROM version  | Manufacturer  | RF type  |  Chip type       | IC Type |
+     |                           |                      | TSMC/UMC    |              | TEST/NORMAL|             |
+*/
+// [15:12] IC version(CUT): A-cut=0, B-cut=1, C-cut=2, D-cut=3
+// [7] Manufacturer: TSMC=0, UMC=1
+// [6:4] RF type: 1T1R=0, 1T2R=1, 2T2R=2
+// [3] Chip type: TEST=0, NORMAL=1
+// [2:0] IC type: 81xxC=0, 8723=1, 92D=2
+
+#define CHIP_8723						BIT(0)
+#define CHIP_92D						BIT(1)
+#define NORMAL_CHIP  					BIT(3)
+#define RF_TYPE_1T1R					(~(BIT(4)|BIT(5)|BIT(6)))
+#define RF_TYPE_1T2R					BIT(4)
+#define RF_TYPE_2T2R					BIT(5)
+#define CHIP_VENDOR_UMC				BIT(7)
+#define B_CUT_VERSION					BIT(12)
+#define C_CUT_VERSION					BIT(13)
+#define D_CUT_VERSION					((BIT(12)|BIT(13)))
+#define E_CUT_VERSION					BIT(14)
+
+
+// MASK
+#define IC_TYPE_MASK					(BIT(0)|BIT(1)|BIT(2))
+#define CHIP_TYPE_MASK 				BIT(3)
+#define RF_TYPE_MASK					(BIT(4)|BIT(5)|BIT(6))
+#define MANUFACTUER_MASK			BIT(7)	
+#define ROM_VERSION_MASK				(BIT(11)|BIT(10)|BIT(9)|BIT(8))
+#define CUT_VERSION_MASK				(BIT(15)|BIT(14)|BIT(13)|BIT(12))
+
+// Get element
+#define GET_CVID_IC_TYPE(version)			((version) & IC_TYPE_MASK)
+#define GET_CVID_CHIP_TYPE(version)			((version) & CHIP_TYPE_MASK)
+#define GET_CVID_RF_TYPE(version)			((version) & RF_TYPE_MASK)
+#define GET_CVID_MANUFACTUER(version)		((version) & MANUFACTUER_MASK)
+#define GET_CVID_ROM_VERSION(version)		((version) & ROM_VERSION_MASK)
+#define GET_CVID_CUT_VERSION(version)		((version) & CUT_VERSION_MASK)
+
+#define IS_81XXC(version)					((GET_CVID_IC_TYPE(version) == 0)? _TRUE : _FALSE)
+#define IS_8723_SERIES(version)				((GET_CVID_IC_TYPE(version) == CHIP_8723)? _TRUE : _FALSE)
+#define IS_92D(version)						((GET_CVID_IC_TYPE(version) == CHIP_92D)? _TRUE : _FALSE)
+#define IS_1T1R(version)						((GET_CVID_RF_TYPE(version))? _FALSE : _TRUE)
+#define IS_1T2R(version)						((GET_CVID_RF_TYPE(version) == RF_TYPE_1T2R)? _TRUE : _FALSE)
+#define IS_2T2R(version)						((GET_CVID_RF_TYPE(version) == RF_TYPE_2T2R)? _TRUE : _FALSE)
+#define IS_CHIP_VENDOR_UMC(version)			((GET_CVID_MANUFACTUER(version))? _TRUE: _FALSE)
+
+#define IS_92C_SERIAL(version)   				((IS_81XXC(version) && IS_2T2R(version)) ? _TRUE : _FALSE)
+#define IS_VENDOR_UMC_A_CUT(version)		((IS_CHIP_VENDOR_UMC(version)) ? ((GET_CVID_CUT_VERSION(version)) ? _FALSE : _TRUE) : _FALSE)
+#define IS_VENDOR_8723_A_CUT(version)		((IS_8723_SERIES(version)) ? ((GET_CVID_CUT_VERSION(version)) ? _FALSE : _TRUE) : _FALSE)
+// <tynli_Note> 88/92C UMC B-cut vendor is set to TSMC so we need to check CHIP_VENDOR_UMC bit is not 1. 
+#define IS_81xxC_VENDOR_UMC_B_CUT(version)	((IS_CHIP_VENDOR_UMC(version)) ? ((GET_CVID_CUT_VERSION(version) == B_CUT_VERSION) ? _TRUE : _FALSE):_FALSE)
+#define IS_92D_SINGLEPHY(version)     			((IS_92D(version)) ? (IS_2T2R(version) ? _TRUE: _FALSE) : _FALSE)
+
+#define IS_92D_C_CUT(version)    			((IS_92D(version)) ? ((GET_CVID_CUT_VERSION(version) == C_CUT_VERSION) ? _TRUE : _FALSE) : _FALSE)
+#define IS_92D_D_CUT(version)    			((IS_92D(version)) ? ((GET_CVID_CUT_VERSION(version) == D_CUT_VERSION) ? _TRUE : _FALSE) : _FALSE)
+#define IS_92D_E_CUT(version)    			((IS_92D(version)) ? ((GET_CVID_CUT_VERSION(version) == E_CUT_VERSION) ? _TRUE : _FALSE) : _FALSE)
+#define IS_NORMAL_CHIP92D(version)		((GET_CVID_CHIP_TYPE(version))? _TRUE: _FALSE)
+
+typedef enum _VERSION_8192D{
+	VERSION_TEST_CHIP_88C = 0x0000,
+	VERSION_TEST_CHIP_92C = 0x0020,
+	VERSION_TEST_UMC_CHIP_8723 = 0x0081,
+	VERSION_NORMAL_TSMC_CHIP_88C = 0x0008, 
+	VERSION_NORMAL_TSMC_CHIP_92C = 0x0028,
+	VERSION_NORMAL_TSMC_CHIP_92C_1T2R = 0x0018,
+	VERSION_NORMAL_UMC_CHIP_88C_A_CUT = 0x0088,
+	VERSION_NORMAL_UMC_CHIP_92C_A_CUT = 0x00a8,
+	VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT = 0x0098,		
+	VERSION_NORMAL_UMC_CHIP_8723_1T1R_A_CUT = 0x0089,
+	VERSION_NORMAL_UMC_CHIP_8723_1T1R_B_CUT = 0x1089,	
+	VERSION_NORMAL_UMC_CHIP_88C_B_CUT = 0x1088, 
+	VERSION_NORMAL_UMC_CHIP_92C_B_CUT = 0x10a8, 
+	VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT = 0x1090, 
+	VERSION_TEST_CHIP_92D_SINGLEPHY= 0x0022,
+	VERSION_TEST_CHIP_92D_DUALPHY = 0x0002,
+	VERSION_NORMAL_CHIP_92D_SINGLEPHY= 0x002a,
+	VERSION_NORMAL_CHIP_92D_DUALPHY = 0x000a,
+	VERSION_NORMAL_CHIP_92D_C_CUT_SINGLEPHY = 0x202a,
+	VERSION_NORMAL_CHIP_92D_C_CUT_DUALPHY = 0x200a,
+	VERSION_NORMAL_CHIP_92D_D_CUT_SINGLEPHY = 0x302a,
+	VERSION_NORMAL_CHIP_92D_D_CUT_DUALPHY = 0x300a,
+	VERSION_NORMAL_CHIP_92D_E_CUT_SINGLEPHY = 0x402a,
+	VERSION_NORMAL_CHIP_92D_E_CUT_DUALPHY = 0x400a,
+}VERSION_8192D,*PVERSION_8192D;
+
+
+//-------------------------------------------------------------------------
+//	Channel Plan
+//-------------------------------------------------------------------------
+enum ChannelPlan{
+	CHPL_FCC	= 0,
+	CHPL_IC		= 1,
+	CHPL_ETSI	= 2,
+	CHPL_SPAIN	= 3,
+	CHPL_FRANCE	= 4,
+	CHPL_MKK	= 5,
+	CHPL_MKK1	= 6,
+	CHPL_ISRAEL	= 7,
+	CHPL_TELEC	= 8,
+	CHPL_GLOBAL	= 9,
+	CHPL_WORLD	= 10,
+};
+
+typedef struct _TxPowerInfo{
+	u8 CCKIndex[RF_PATH_MAX][CHANNEL_GROUP_MAX];
+	u8 HT40_1SIndex[RF_PATH_MAX][CHANNEL_GROUP_MAX];
+	u8 HT40_2SIndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX];
+	s8 HT20IndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX];
+	u8 OFDMIndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX];
+	u8 HT40MaxOffset[RF_PATH_MAX][CHANNEL_GROUP_MAX];
+	u8 HT20MaxOffset[RF_PATH_MAX][CHANNEL_GROUP_MAX];
+	u8 TSSI_A[3];
+	u8 TSSI_B[3];
+	u8 TSSI_A_5G[3];		//5GL/5GM/5GH
+	u8 TSSI_B_5G[3];
+}TxPowerInfo, *PTxPowerInfo;
+
+#define EFUSE_REAL_CONTENT_LEN	1024
+#define EFUSE_MAP_LEN				256
+#define EFUSE_MAX_SECTION			32
+#define EFUSE_MAX_SECTION_BASE	16
+// <Roger_Notes> To prevent out of boundary programming case, leave 1byte and program full section
+// 9bytes + 1byt + 5bytes and pre 1byte.
+// For worst case:
+// | 2byte|----8bytes----|1byte|--7bytes--| //92D
+#define EFUSE_OOB_PROTECT_BYTES 	18 // PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte.
+
+typedef enum _PA_MODE {
+	PA_MODE_EXTERNAL = 0x00,
+	PA_MODE_INTERNAL_SP3T = 0x01,
+	PA_MODE_INTERNAL_SPDT = 0x02	
+} PA_MODE;
+
+#ifdef CONFIG_PCI_HCI
+struct hal_data_8192de
+{
+	VERSION_8192D	VersionID;
+
+	// add for 92D Phy mode/mac/Band mode 
+	MACPHY_MODE_8192D	MacPhyMode92D;
+	BAND_TYPE	CurrentBandType92D;	//0:2.4G, 1:5G
+	BAND_TYPE	BandSet92D;
+	BOOLEAN		bIsVS;
+	BOOLEAN		bSupportRemoteWakeUp;
+	u8	AutoLoadStatusFor8192D;
+
+	BOOLEAN		bNOPG;
+
+	BOOLEAN       bMasterOfDMSP;
+	BOOLEAN       bSlaveOfDMSP;
+
+	u16	CustomerID;
+
+	u16	FirmwareVersion;
+	u16	FirmwareVersionRev;
+	u16	FirmwareSubVersion;
+
+	u32	IntrMask[2];
+	u32	IntrMaskToSet[2];
+
+	u32	DisabledFunctions;
+
+	//current WIFI_PHY values
+	u32	ReceiveConfig;
+	u32	TransmitConfig;
+	WIRELESS_MODE	CurrentWirelessMode;
+	HT_CHANNEL_WIDTH	CurrentChannelBW;
+	u8	CurrentChannel;
+	u8	nCur40MhzPrimeSC;// Control channel sub-carrier
+	u16	BasicRateSet;
+
+	//rf_ctrl
+	u8	rf_chip;
+	u8	rf_type;
+	u8	NumTotalRFPath;
+
+	//
+	// EEPROM setting.
+	//
+	u16	EEPROMVID;
+	u16	EEPROMDID;
+	u16	EEPROMSVID;
+	u16	EEPROMSMID;
+	u16	EEPROMChannelPlan;
+	u16	EEPROMVersion;
+
+	u8	EEPROMCustomerID;
+	u8	EEPROMBoardType;
+	u8	EEPROMRegulatory;
+
+	u8	EEPROMThermalMeter;
+
+	u8	EEPROMC9;
+	u8	EEPROMCC;
+	u8	PAMode;
+
+	u8	TxPwrLevelCck[RF_PATH_MAX][CHANNEL_MAX_NUMBER_2G];
+	u8	TxPwrLevelHT40_1S[RF_PATH_MAX][CHANNEL_MAX_NUMBER];	// For HT 40MHZ pwr
+	u8	TxPwrLevelHT40_2S[RF_PATH_MAX][CHANNEL_MAX_NUMBER];	// For HT 40MHZ pwr	
+	s8	TxPwrHt20Diff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff
+	u8	TxPwrLegacyHtDiff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// For HT<->legacy pwr diff
+	// For power group
+	u8	PwrGroupHT20[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
+	u8	PwrGroupHT40[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
+
+	u8	LegacyHTTxPowerDiff;// Legacy to HT rate power diff
+
+	u8	CrystalCap;	// CrystalCap.
+
+#ifdef CONFIG_BT_COEXIST
+	struct btcoexist_priv	bt_coexist;
+#endif
+
+	// Read/write are allow for following hardware information variables
+	u8	framesync;
+	u32	framesyncC34;
+	u8	framesyncMonitor;
+	u8	DefaultInitialGain[4];
+	u8	pwrGroupCnt;
+	u32	MCSTxPowerLevelOriginalOffset[MAX_PG_GROUP][16];
+	u32	CCKTxPowerLevelOriginalOffset;
+
+	u32	AntennaTxPath;					// Antenna path Tx
+	u32	AntennaRxPath;					// Antenna path Rx
+	u8	BluetoothCoexist;
+	u8	ExternalPA;
+	u8	InternalPA5G[2];	//pathA / pathB
+
+	//u32	LedControlNum;
+	//u32	LedControlMode;
+	//u32	TxPowerTrackControl;
+	u8	b1x1RecvCombine;	// for 1T1R receive combining
+
+	u8	bCurrentTurboEDCA;
+	u32	AcParam_BE; //Original parameter for BE, use for EDCA turbo.
+
+	//vivi, for tx power tracking, 20080407
+	//u16	TSSI_13dBm;
+	//u32	Pwr_Track;
+	// The current Tx Power Level
+	u8	CurrentCckTxPwrIdx;
+	u8	CurrentOfdm24GTxPwrIdx;
+
+	BB_REGISTER_DEFINITION_T	PHYRegDef[4];	//Radio A/B/C/D
+
+	BOOLEAN		bRFPathRxEnable[4];	// We support 4 RF path now.
+
+	u32	RfRegChnlVal[2];
+
+	u8	bCckHighPower;
+
+	BOOLEAN		bPhyValueInitReady;
+
+	BOOLEAN		bTXPowerDataReadFromEEPORM;
+
+	BOOLEAN		bInSetPower;
+
+	//RDG enable
+	BOOLEAN		bRDGEnable;
+
+	BOOLEAN		bLoadIMRandIQKSettingFor2G;// True if IMR or IQK  have done  for 2.4G in scan progress
+	BOOLEAN		bNeedIQK;
+
+	BOOLEAN		bLCKInProgress;
+
+	BOOLEAN		bEarlyModeEnable;
+
+	ATOMIC_T	IQKRdyForXmit;// Tx must wait for IQK done
+
+#if 1
+	IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM];
+#else
+	//regc80¡¢regc94¡¢regc4c¡¢regc88¡¢regc9c¡¢regc14¡¢regca0¡¢regc1c¡¢regc78
+	u4Byte				IQKMatrixReg[IQK_Matrix_REG_NUM];
+	IQK_MATRIX_REGS_SETTING			   IQKMatrixRegSetting[IQK_Matrix_Settings_NUM];	// 1->2G,24->5G 20M channel,21->5G 40M channel.													
+#endif
+
+	//for host message to fw
+	u8	LastHMEBoxNum;
+
+	u8	fw_ractrl;
+	// Beacon function related global variable.
+	u32	RegBcnCtrlVal;
+	u8	RegTxPause;
+	u8	RegFwHwTxQCtrl;
+	u8	RegReg542;
+	u8	RegCR_1;
+
+	struct dm_priv	dmpriv;
+
+	u8	bInterruptMigration;
+
+	u8	FwRsvdPageStartOffset; //2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ.
+
+	// Add for dual MAC  0--Mac0 1--Mac1
+	u32	interfaceIndex;
+
+	u16	RegRRSR;
+
+	u16	EfuseUsedBytes;
+	u8	RTSInitRate;	 // 2010.11.24.by tynli.
+#ifdef CONFIG_P2P
+	struct P2P_PS_Offload_t	p2p_ps_offload;
+#endif //CONFIG_P2P
+};
+
+typedef struct hal_data_8192de HAL_DATA_TYPE, *PHAL_DATA_TYPE;
+
+//
+// Function disabled.
+//
+#define DF_TX_BIT		BIT0
+#define DF_RX_BIT		BIT1
+#define DF_IO_BIT		BIT2
+#define DF_IO_D3_BIT			BIT3
+
+#define RT_DF_TYPE		u32
+#define RT_DISABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions |= ((RT_DF_TYPE)(__FuncBits)))
+#define RT_ENABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions &= (~((RT_DF_TYPE)(__FuncBits))))
+#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) )
+
+void InterruptRecognized8192DE(PADAPTER Adapter, PRT_ISR_CONTENT pIsrContent);
+VOID UpdateInterruptMask8192DE(PADAPTER Adapter, u32 AddMSR, u32 RemoveMSR);
+#endif
+
+#ifdef CONFIG_USB_HCI
+
+//should be renamed and moved to another file
+typedef	enum _INTERFACE_SELECT_8192DUSB{
+	INTF_SEL0_USB 			= 0,		// USB
+	INTF_SEL1_MINICARD	= 1,		// Minicard
+	INTF_SEL2_EKB_PRO		= 2,		// Eee keyboard proprietary
+	INTF_SEL3_PRO			= 3,		// Customized proprietary
+} INTERFACE_SELECT_8192DUSB, *PINTERFACE_SELECT_8192DUSB;
+
+typedef INTERFACE_SELECT_8192DUSB INTERFACE_SELECT_USB;
+
+struct hal_data_8192du
+{
+	VERSION_8192D	VersionID;
+
+	// add for 92D Phy mode/mac/Band mode 
+	MACPHY_MODE_8192D	MacPhyMode92D;
+	BAND_TYPE	CurrentBandType92D;	//0:2.4G, 1:5G
+	BAND_TYPE	BandSet92D;
+	BOOLEAN		bIsVS;
+
+	BOOLEAN		bNOPG;
+
+	BOOLEAN		bSupportRemoteWakeUp;
+	BOOLEAN		bMasterOfDMSP;
+	BOOLEAN		bSlaveOfDMSP;
+#ifdef CONFIG_DUALMAC_CONCURRENT
+	BOOLEAN		bInModeSwitchProcess;
+#endif
+
+	u16	CustomerID;
+
+	u16	FirmwareVersion;
+	u16	FirmwareVersionRev;
+	u16	FirmwareSubVersion;
+
+	//current WIFI_PHY values
+	u32	ReceiveConfig;
+	WIRELESS_MODE	CurrentWirelessMode;
+	HT_CHANNEL_WIDTH	CurrentChannelBW;
+	u8	CurrentChannel;
+	u8	nCur40MhzPrimeSC;// Control channel sub-carrier
+	u16	BasicRateSet;
+
+	INTERFACE_SELECT_8192DUSB	InterfaceSel;
+
+	//rf_ctrl
+	u8	rf_chip;
+	u8	rf_type;
+	u8	NumTotalRFPath;
+
+	//
+	// EEPROM setting.
+	//
+	u8	EEPROMVersion;
+	u16	EEPROMVID;
+	u16	EEPROMPID;
+	u16	EEPROMSVID;
+	u16	EEPROMSDID;
+	u8	EEPROMCustomerID;
+	u8	EEPROMSubCustomerID;	
+	u8	EEPROMRegulatory;
+
+	u8	EEPROMThermalMeter;
+
+	u8	EEPROMC9;
+	u8	EEPROMCC;
+	u8	PAMode;
+
+	u8	TxPwrLevelCck[RF_PATH_MAX][CHANNEL_MAX_NUMBER_2G];
+	u8	TxPwrLevelHT40_1S[RF_PATH_MAX][CHANNEL_MAX_NUMBER];	// For HT 40MHZ pwr
+	u8	TxPwrLevelHT40_2S[RF_PATH_MAX][CHANNEL_MAX_NUMBER];	// For HT 40MHZ pwr	
+	s8	TxPwrHt20Diff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff
+	u8	TxPwrLegacyHtDiff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// For HT<->legacy pwr diff
+	// For power group
+	u8	PwrGroupHT20[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
+	u8	PwrGroupHT40[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
+
+	u8	LegacyHTTxPowerDiff;// Legacy to HT rate power diff
+
+	u8	CrystalCap;	// CrystalCap.
+
+#ifdef CONFIG_BT_COEXIST
+	struct btcoexist_priv	bt_coexist;
+#endif
+
+	// Read/write are allow for following hardware information variables
+	u8	framesync;
+	u32	framesyncC34;
+	u8	framesyncMonitor;
+	u8	DefaultInitialGain[4];
+	u8	pwrGroupCnt;
+	u32	MCSTxPowerLevelOriginalOffset[MAX_PG_GROUP][16];
+	u32	CCKTxPowerLevelOriginalOffset;
+
+	u32	AntennaTxPath;					// Antenna path Tx
+	u32	AntennaRxPath;					// Antenna path Rx
+	u8	BluetoothCoexist;
+	u8	ExternalPA;
+	u8	InternalPA5G[2];	//pathA / pathB
+
+	//u32	LedControlNum;
+	//u32	LedControlMode;
+	//u32	TxPowerTrackControl;
+	u8	b1x1RecvCombine;	// for 1T1R receive combining
+
+	u8	bCurrentTurboEDCA;
+	u32	AcParam_BE; //Original parameter for BE, use for EDCA turbo.
+
+	//vivi, for tx power tracking, 20080407
+	//u16	TSSI_13dBm;
+	//u32	Pwr_Track;
+	// The current Tx Power Level
+	u8	CurrentCckTxPwrIdx;
+	u8	CurrentOfdm24GTxPwrIdx;
+
+	BB_REGISTER_DEFINITION_T	PHYRegDef[4];	//Radio A/B/C/D
+
+	BOOLEAN		bRFPathRxEnable[4];	// We support 4 RF path now.
+
+	u32	RfRegChnlVal[2];
+
+	u8	bCckHighPower;
+
+	BOOLEAN		bPhyValueInitReady;
+
+	BOOLEAN		bTXPowerDataReadFromEEPORM;
+
+	BOOLEAN		bInSetPower;
+
+	//RDG enable
+	BOOLEAN		bRDGEnable;
+
+	BOOLEAN		bLoadIMRandIQKSettingFor2G;// True if IMR or IQK  have done  for 2.4G in scan progress
+	BOOLEAN		bNeedIQK;
+
+	BOOLEAN		bLCKInProgress;
+
+	BOOLEAN		bEarlyModeEnable;
+
+	ATOMIC_T	IQKRdyForXmit;// Tx must wait for IQK done
+
+#if 1
+	IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM];
+#else
+	//regc80¡¢regc94¡¢regc4c¡¢regc88¡¢regc9c¡¢regc14¡¢regca0¡¢regc1c¡¢regc78
+	u4Byte				IQKMatrixReg[IQK_Matrix_REG_NUM];
+	IQK_MATRIX_REGS_SETTING			   IQKMatrixRegSetting[IQK_Matrix_Settings_NUM];	// 1->2G,24->5G 20M channel,21->5G 40M channel.													
+#endif
+
+	//for host message to fw
+	u8	LastHMEBoxNum;
+
+	u8	fw_ractrl;
+	// Beacon function related global variable.
+	u32	RegBcnCtrlVal;
+	u8	RegTxPause;
+	u8	RegFwHwTxQCtrl;
+	u8	RegReg542;
+	u8	RegCR_1;
+
+	struct dm_priv	dmpriv;
+
+	u8	FwRsvdPageStartOffset; //2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ.
+
+	//Query RF by FW
+	BOOLEAN		bReadRFbyFW;
+
+	// For 92C USB endpoint setting
+	//
+
+	u32	UsbBulkOutSize;
+
+	int	RtBulkOutPipe[3];
+	int	RtBulkInPipe;
+	int	RtIntInPipe;
+
+	// Add for dual MAC  0--Mac0 1--Mac1
+	u32	interfaceIndex;
+
+	u8	OutEpQueueSel;
+	u8	OutEpNumber;
+
+	u8	Queue2EPNum[8];//for out endpoint number mapping
+
+#ifdef CONFIG_USB_TX_AGGREGATION
+	u8	UsbTxAggMode;
+	u8	UsbTxAggDescNum;
+#endif
+#ifdef CONFIG_USB_RX_AGGREGATION
+	u16	HwRxPageSize;				// Hardware setting
+	u32	MaxUsbRxAggBlock;
+
+	USB_RX_AGG_MODE	UsbRxAggMode;
+	u8	UsbRxAggBlockCount;			// USB Block count. Block size is 512-byte in hight speed and 64-byte in full speed
+	u8	UsbRxAggBlockTimeout;
+	u8	UsbRxAggPageCount;			// 8192C DMA page count
+	u8	UsbRxAggPageTimeout;
+#endif
+
+	u16	RegRRSR;
+
+	u16	EfuseUsedBytes;
+	u8	RTSInitRate;	 // 2010.11.24.by tynli.
+#ifdef CONFIG_P2P
+	struct P2P_PS_Offload_t	p2p_ps_offload;
+#endif //CONFIG_P2P
+};
+
+typedef struct hal_data_8192du HAL_DATA_TYPE, *PHAL_DATA_TYPE;
+#endif
+
+#define GET_HAL_DATA(__pAdapter)	((HAL_DATA_TYPE *)((__pAdapter)->HalData))
+#define GET_RF_TYPE(priv)	(GET_HAL_DATA(priv)->rf_type)
+
+int FirmwareDownload92D(IN PADAPTER Adapter);
+VOID rtl8192d_FirmwareSelfReset(IN PADAPTER Adapter);
+void rtl8192d_ReadChipVersion(IN PADAPTER Adapter);
+VOID rtl8192d_ReadChannelPlan(PADAPTER Adapter, u8* PROMContent, BOOLEAN AutoLoadFail);
+VOID rtl8192d_ReadTxPowerInfo(PADAPTER Adapter, u8* PROMContent, BOOLEAN AutoLoadFail);
+VOID rtl8192d_ResetDualMacSwitchVariables(IN PADAPTER Adapter);
+u8 GetEEPROMSize8192D(PADAPTER Adapter);
+void rtl8192d_HalSetBrateCfg(PADAPTER Adapter, u8 *mBratesOS, u16 *pBrateCfg);
+BOOLEAN PHY_CheckPowerOffFor8192D(PADAPTER Adapter);
+VOID PHY_SetPowerOnFor8192D(PADAPTER Adapter);
+//void PHY_ConfigMacPhyMode92D(PADAPTER Adapter);
+void rtl8192d_free_hal_data(_adapter * padapter);
+void rtl8192d_set_hal_ops(struct hal_ops *pHalFunc);
+
+#endif
+
+#ifdef CONFIG_MP_INCLUDED
+
+
+extern void Hal_SetAntenna(PADAPTER pAdapter);
+extern void Hal_SetBandwidth(PADAPTER pAdapter);
+
+extern void Hal_SetTxPower(PADAPTER pAdapter);
+extern void Hal_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart);
+extern void Hal_SetSingleToneTx ( PADAPTER pAdapter , u8 bStart );
+extern void Hal_SetSingleCarrierTx (PADAPTER pAdapter, u8 bStart);
+extern void Hal_SetContinuousTx (PADAPTER pAdapter, u8 bStart);
+extern void Hal_SetBandwidth(PADAPTER pAdapter);
+
+extern void Hal_SetDataRate(PADAPTER pAdapter);
+extern void Hal_SetChannel(PADAPTER pAdapter);
+extern void Hal_SetAntennaPathPower(PADAPTER pAdapter);
+extern s32 Hal_SetThermalMeter(PADAPTER pAdapter, u8 target_ther);
+extern s32 Hal_SetPowerTracking(PADAPTER padapter, u8 enable);
+extern void Hal_GetPowerTracking(PADAPTER padapter, u8 * enable);
+extern void Hal_GetThermalMeter(PADAPTER pAdapter, u8 *value);
+extern void Hal_mpt_SwitchRfSetting(PADAPTER pAdapter);
+extern void Hal_MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14);
+extern void Hal_MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven);
+extern void Hal_SetCCKTxPower(PADAPTER pAdapter, u8 * TxPower);
+extern void Hal_SetOFDMTxPower(PADAPTER pAdapter, u8 * TxPower);
+extern void Hal_TriggerRFThermalMeter(PADAPTER pAdapter);
+extern u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter);
+extern void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart);
+extern void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart);
+
+
+#endif //end CONFIG_MP_INCLUDED
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192d_led.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192d_led.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192d_led.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192d_led.h	2017-09-23 03:42:50.042674991 +0800
@@ -0,0 +1,44 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef __RTL8192D_LED_H_
+#define __RTL8192D_LED_H_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+
+//================================================================================
+// Interface to manipulate LED objects.
+//================================================================================
+#ifdef CONFIG_USB_HCI
+void rtl8192du_InitSwLeds(_adapter *padapter);
+void rtl8192du_DeInitSwLeds(_adapter *padapter);
+#endif
+
+#ifdef CONFIG_PCI_HCI
+void rtl8192de_gen_RefreshLedState(PADAPTER Adapter);
+void rtl8192de_InitSwLeds(_adapter *padapter);
+void rtl8192de_DeInitSwLeds(_adapter *padapter);
+#endif
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192d_recv.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192d_recv.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192d_recv.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192d_recv.h	2017-09-23 03:42:50.042674991 +0800
@@ -0,0 +1,179 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef _RTL8192D_RECV_H_
+#define _RTL8192D_RECV_H_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+
+#ifdef PLATFORM_OS_XP
+	#ifdef CONFIG_SDIO_HCI
+		#define NR_RECVBUFF 1024//512//128
+	#else
+		#define NR_RECVBUFF (16)
+	#endif
+#elif defined(PLATFORM_OS_CE)
+	#ifdef CONFIG_SDIO_HCI
+		#define NR_RECVBUFF (128)
+	#else
+		#define NR_RECVBUFF (4)
+	#endif
+#else
+	#define NR_RECVBUFF (4)
+	#define NR_PREALLOC_RECV_SKB (8)
+#endif
+
+
+
+#define RECV_BLK_SZ 512
+#define RECV_BLK_CNT 16
+#define RECV_BLK_TH RECV_BLK_CNT
+
+#if defined(CONFIG_USB_HCI)
+
+#ifdef PLATFORM_OS_CE
+#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k
+#else
+	#ifndef CONFIG_MINIMAL_MEMORY_USAGE
+		//#define MAX_RECVBUF_SZ (32768) // 32k
+		//#define MAX_RECVBUF_SZ (16384) //16K
+		//#define MAX_RECVBUF_SZ (10240) //10K
+		#define MAX_RECVBUF_SZ (15360) // 15k < 16k
+	#else
+		#define MAX_RECVBUF_SZ (4000) // about 4K
+	#endif
+#endif
+
+#elif defined(CONFIG_PCI_HCI)
+//#ifndef CONFIG_MINIMAL_MEMORY_USAGE
+//	#define MAX_RECVBUF_SZ (9100)
+//#else
+	#define MAX_RECVBUF_SZ (4000) // about 4K
+//#endif
+
+#define RX_MPDU_QUEUE				0
+#define RX_CMD_QUEUE				1
+#define RX_MAX_QUEUE				2
+#endif
+
+#define RECV_BULK_IN_ADDR		0x80
+#define RECV_INT_IN_ADDR		0x81
+
+#define PHY_RSSI_SLID_WIN_MAX				100
+#define PHY_LINKQUALITY_SLID_WIN_MAX		20
+
+struct phy_stat
+{
+	unsigned int phydw0;
+
+	unsigned int phydw1;
+
+	unsigned int phydw2;
+
+	unsigned int phydw3;
+
+	unsigned int phydw4;
+
+	unsigned int phydw5;
+
+	unsigned int phydw6;
+
+	unsigned int phydw7;
+};
+
+typedef struct _Phy_OFDM_Rx_Status_Report_8192cd
+{
+	unsigned char	trsw_gain_X[4];
+	unsigned char	pwdb_all;
+	unsigned char	cfosho_X[4];
+	unsigned char	cfotail_X[4];
+	unsigned char	rxevm_X[2];
+	unsigned char	rxsnr_X[4];
+	unsigned char	pdsnr_X[2];
+	unsigned char	csi_current_X[2];
+	unsigned char	csi_target_X[2];
+	unsigned char	sigevm;
+	unsigned char	max_ex_pwr;
+//#ifdef RTL8192SE
+#ifdef CONFIG_LITTLE_ENDIAN
+	unsigned char ex_intf_flg:1;
+	unsigned char sgi_en:1;
+	unsigned char rxsc:2;
+	//unsigned char rsvd:4;
+	unsigned char idle_long:1;
+	unsigned char r_ant_train_en:1;
+	unsigned char ANTSELB:1;
+	unsigned char ANTSEL:1;	
+#else	// _BIG_ENDIAN_
+	//unsigned char rsvd:4;
+	unsigned char ANTSEL:1;	
+	unsigned char ANTSELB:1;
+	unsigned char r_ant_train_en:1;
+	unsigned char idle_long:1;
+	unsigned char rxsc:2;
+	unsigned char sgi_en:1;
+	unsigned char ex_intf_flg:1;
+#endif
+//#else	// RTL8190, RTL8192E
+//	unsigned char	sgi_en;
+//	unsigned char	rxsc_sgien_exflg;
+//#endif
+}__attribute__ ((packed)) PHY_STS_OFDM_8192CD_T,PHY_RX_DRIVER_INFO_8192CD;
+
+typedef struct _Phy_CCK_Rx_Status_Report_8192cd
+{
+	/* For CCK rate descriptor. This is a signed 8:1 variable. LSB bit presend
+		0.5. And MSB 7 bts presend a signed value. Range from -64~+63.5. */
+	u8	adc_pwdb_X[4];
+	u8	SQ_rpt;
+	u8	cck_agc_rpt;
+} PHY_STS_CCK_8192CD_T;
+
+// Rx smooth factor
+#define	Rx_Smooth_Factor (20)
+
+#ifdef CONFIG_USB_HCI
+typedef struct _INTERRUPT_MSG_FORMAT_EX{
+	unsigned int C2H_MSG0;
+	unsigned int C2H_MSG1;
+	unsigned int C2H_MSG2;
+	unsigned int C2H_MSG3;
+	unsigned int HISR; // from HISR Reg0x124, read to clear
+	unsigned int HISRE;// from HISRE Reg0x12c, read to clear
+	unsigned int  MSG_EX;
+}INTERRUPT_MSG_FORMAT_EX,*PINTERRUPT_MSG_FORMAT_EX;
+
+void rtl8192du_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf);
+int	rtl8192du_init_recv_priv(_adapter * padapter);
+void	rtl8192du_free_recv_priv(_adapter * padapter);
+#endif
+
+#ifdef CONFIG_PCI_HCI
+int	rtl8192de_init_recv_priv(_adapter * padapter);
+void rtl8192de_free_recv_priv(_adapter * padapter);
+#endif
+
+void rtl8192d_translate_rx_signal_stuff(union recv_frame *precvframe, struct phy_stat *pphy_info);
+void rtl8192d_query_rx_desc_status(union recv_frame *precvframe, struct recv_stat *pdesc);
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192d_rf.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192d_rf.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192d_rf.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192d_rf.h	2017-09-23 03:42:50.046674979 +0800
@@ -0,0 +1,98 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+/******************************************************************************
+ * 
+ * 
+ * Module:	rtl8192d_rf.h	( Header File)
+ * 
+ * Note:	Collect every HAL RF type exter API or constant.	 
+ *
+ * Function:	
+ * 		 
+ * Export:	
+ * 
+ * Abbrev:	
+ * 
+ * History:
+ * Data			Who		Remark
+ * 
+ * 09/25/2008	MHC		Create initial version.
+ * 
+ * 
+******************************************************************************/
+#ifndef _RTL8192D_RF_H_
+#define _RTL8192D_RF_H_
+/* Check to see if the file has been included already.  */
+
+
+/*--------------------------Define Parameters-------------------------------*/
+
+//
+// For RF 6052 Series
+//
+#define		RF6052_MAX_TX_PWR			0x3F
+#define		RF6052_MAX_REG				0x3F
+#define		RF6052_MAX_PATH				2
+/*--------------------------Define Parameters-------------------------------*/
+
+
+/*------------------------------Define structure----------------------------*/ 
+
+/*------------------------------Define structure----------------------------*/ 
+
+
+/*------------------------Export global variable----------------------------*/
+/*------------------------Export global variable----------------------------*/
+
+/*------------------------Export Marco Definition---------------------------*/
+
+/*------------------------Export Marco Definition---------------------------*/
+
+
+/*--------------------------Exported Function prototype---------------------*/
+
+//
+// RF RL6052 Series API
+//
+void		rtl8192d_RF_ChangeTxPath(	IN	PADAPTER	Adapter, 
+										IN	u16		DataRate);
+void		rtl8192d_PHY_RF6052SetBandwidth(	
+										IN	PADAPTER				Adapter,
+										IN	HT_CHANNEL_WIDTH		Bandwidth);	
+VOID	rtl8192d_PHY_RF6052SetCckTxPower(
+										IN	PADAPTER	Adapter,
+										IN	u8*		pPowerlevel);
+VOID	rtl8192d_PHY_RF6052SetOFDMTxPower(
+										IN	PADAPTER	Adapter,
+										IN	u8*		pPowerLevel,
+										IN	u8		Channel);
+int	PHY_RF6052_Config8192D(	IN	PADAPTER		Adapter	);
+
+BOOLEAN	rtl8192d_PHY_EnableAnotherPHY(IN	PADAPTER Adapter, IN	BOOLEAN	 bMac0);
+
+void	rtl8192d_PHY_PowerDownAnotherPHY(IN PADAPTER Adapter, IN BOOLEAN bMac0);
+
+
+/*--------------------------Exported Function prototype---------------------*/
+
+
+#endif/* End of HalRf.h */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192d_spec.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192d_spec.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192d_spec.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192d_spec.h	2017-09-23 03:42:50.046674979 +0800
@@ -0,0 +1,1878 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+#ifndef __RTL8192D_SPEC_H__
+#define __RTL8192D_SPEC_H__
+
+#include <drv_conf.h>
+
+#ifndef BIT
+#define BIT(x)		(1 << (x))
+#endif
+
+#define BIT0		0x00000001
+#define BIT1		0x00000002
+#define BIT2		0x00000004
+#define BIT3		0x00000008
+#define BIT4		0x00000010
+#define BIT5		0x00000020
+#define BIT6		0x00000040
+#define BIT7		0x00000080
+#define BIT8		0x00000100
+#define BIT9		0x00000200
+#define BIT10	0x00000400
+#define BIT11	0x00000800
+#define BIT12	0x00001000
+#define BIT13	0x00002000
+#define BIT14	0x00004000
+#define BIT15	0x00008000
+#define BIT16	0x00010000
+#define BIT17	0x00020000
+#define BIT18	0x00040000
+#define BIT19	0x00080000
+#define BIT20	0x00100000
+#define BIT21	0x00200000
+#define BIT22	0x00400000
+#define BIT23	0x00800000
+#define BIT24	0x01000000
+#define BIT25	0x02000000
+#define BIT26	0x04000000
+#define BIT27	0x08000000
+#define BIT28	0x10000000
+#define BIT29	0x20000000
+#define BIT30	0x40000000
+#define BIT31	0x80000000
+
+
+//============================================================
+//       8192D Regsiter offset definition
+//============================================================
+
+
+//============================================================
+//
+//============================================================
+
+//-----------------------------------------------------
+//
+//	0x0000h ~ 0x00FFh	System Configuration
+//
+//-----------------------------------------------------
+#define REG_SYS_ISO_CTRL			0x0000
+#define REG_SYS_FUNC_EN			0x0002
+#define REG_APS_FSMCO				0x0004
+#define REG_SYS_CLKR				0x0008
+#define REG_9346CR					0x000A
+#define REG_EE_VPD					0x000C
+#define REG_AFE_MISC				0x0010
+#define REG_SPS0_CTRL				0x0011
+#define REG_POWER_OFF_IN_PROCESS 0x0017
+#define REG_SPS_OCP_CFG			0x0018
+#define REG_RSV_CTRL				0x001C
+#define REG_RF_CTRL					0x001F
+#define REG_LDOA15_CTRL			0x0020
+#define REG_LDOV12D_CTRL			0x0021
+#define REG_LDOHCI12_CTRL			0x0022
+#define REG_LPLDO_CTRL				0x0023
+#define REG_AFE_XTAL_CTRL			0x0024
+#define REG_AFE_PLL_CTRL			0x0028
+#define REG_MAC_PHY_CTRL			0x002c //for 92d, DMDP,SMSP,DMSP contrl
+#define REG_EFUSE_CTRL				0x0030
+#define REG_EFUSE_TEST				0x0034
+#define REG_PWR_DATA				0x0038
+#define REG_CAL_TIMER				0x003C
+#define REG_ACLK_MON				0x003E
+#define REG_GPIO_MUXCFG			0x0040
+//#define REG_GPIO_MUXCFG				0x0041
+#define REG_GPIO_IO_SEL				0x0042
+#define REG_MAC_PINMUX_CFG		0x0043
+#define REG_GPIO_PIN_CTRL			0x0044
+#define REG_GPIO_INTM				0x0048
+#define REG_LEDCFG0					0x004C
+#define REG_LEDCFG1					0x004D
+#define REG_LEDCFG2					0x004E
+#define REG_LEDCFG3					0x004F
+#define REG_FSIMR					0x0050
+#define REG_FSISR					0x0054
+
+#define REG_MCUFWDL				0x0080
+
+#define REG_HMEBOX_EXT_0			0x0088
+#define REG_HMEBOX_EXT_1			0x008A
+#define REG_HMEBOX_EXT_2			0x008C
+#define REG_HMEBOX_EXT_3			0x008E
+
+#define REG_BIST_SCAN				0x00D0
+#define REG_BIST_RPT				0x00D4
+#define REG_BIST_ROM_RPT			0x00D8
+#define REG_USB_SIE_INTF			0x00E0
+#define REG_PCIE_MIO_INTF			0x00E4
+#define REG_PCIE_MIO_INTD			0x00E8
+#define REG_HPON_FSM				0x00EC
+#define REG_SYS_CFG					0x00F0
+#define REG_MAC_PHY_CTRL_NORMAL	0x00f8
+
+#define  REG_MAC0                                	0x0081
+#define  REG_MAC1                                	0x0053
+#define  FW_MAC0_ready                      	0x18
+#define  FW_MAC1_ready                      	0x1A
+#define  MAC0_ON                                  	BIT7
+#define  MAC1_ON                                  	BIT0
+#define  mac0_ready                             	BIT0
+#define  mac1_ready                             	BIT0
+
+
+//-----------------------------------------------------
+//
+//	0x0100h ~ 0x01FFh	MACTOP General Configuration
+//
+//-----------------------------------------------------
+#define REG_CR						0x0100
+#define REG_PBP						0x0104
+#define REG_TRXDMA_CTRL			0x010C
+#define REG_TRXFF_BNDY				0x0114
+#define REG_TRXFF_STATUS			0x0118
+#define REG_RXFF_PTR				0x011C
+#define REG_HIMR					0x0120
+#define REG_HISR					0x0124
+#define REG_HIMRE					0x0128
+#define REG_HISRE					0x012C
+#define REG_CPWM					0x012F
+#define REG_FWIMR					0x0130
+#define REG_FWISR					0x0134
+#define REG_FTIMR					0x0138
+#define REG_PKTBUF_DBG_CTRL		0x0140
+#define REG_PKTBUF_DBG_DATA_L		0x0144
+#define REG_PKTBUF_DBG_DATA_H	0x0148
+
+#define REG_TC0_CTRL				0x0150
+#define REG_TC1_CTRL				0x0154
+#define REG_TC2_CTRL				0x0158
+#define REG_TC3_CTRL				0x015C
+#define REG_TC4_CTRL				0x0160
+#define REG_TCUNIT_BASE			0x0164
+#define REG_MBIST_START			0x0174
+#define REG_MBIST_DONE				0x0178
+#define REG_MBIST_FAIL				0x017C
+#define REG_C2HEVT_MSG_NORMAL	0x01A0
+#define REG_C2HEVT_CLEAR			0x01AF
+#define REG_C2HEVT_MSG_TEST		0x01B8
+#define REG_MCUTST_1				0x01c0
+#define REG_FMETHR					0x01C8
+#define REG_HMETFR					0x01CC
+#define REG_HMEBOX_0				0x01D0
+#define REG_HMEBOX_1				0x01D4
+#define REG_HMEBOX_2				0x01D8
+#define REG_HMEBOX_3				0x01DC
+
+#define REG_LLT_INIT				0x01E0
+#define REG_BB_ACCEESS_CTRL		0x01E8
+#define REG_BB_ACCESS_DATA		0x01EC
+
+
+//-----------------------------------------------------
+//
+//	0x0200h ~ 0x027Fh	TXDMA Configuration
+//
+//-----------------------------------------------------
+#define REG_RQPN					0x0200
+#define REG_FIFOPAGE				0x0204
+#define REG_TDECTRL					0x0208
+#define REG_TXDMA_OFFSET_CHK		0x020C
+#define REG_TXDMA_STATUS			0x0210
+#define REG_RQPN_NPQ				0x0214
+
+//-----------------------------------------------------
+//
+//	0x0280h ~ 0x02FFh	RXDMA Configuration
+//
+//-----------------------------------------------------
+#define REG_RXDMA_AGG_PG_TH		0x0280
+#define REG_RXPKT_NUM				0x0284
+#define REG_RXDMA_STATUS			0x0288
+
+
+//-----------------------------------------------------
+//
+//	0x0300h ~ 0x03FFh	PCIe
+//
+//-----------------------------------------------------
+#define	REG_PCIE_CTRL_REG			0x0300
+#define	REG_INT_MIG				0x0304	// Interrupt Migration 
+#define	REG_BCNQ_DESA				0x0308	// TX Beacon Descriptor Address
+#define	REG_HQ_DESA				0x0310	// TX High Queue Descriptor Address
+#define	REG_MGQ_DESA				0x0318	// TX Manage Queue Descriptor Address
+#define	REG_VOQ_DESA				0x0320	// TX VO Queue Descriptor Address
+#define	REG_VIQ_DESA				0x0328	// TX VI Queue Descriptor Address
+#define	REG_BEQ_DESA				0x0330	// TX BE Queue Descriptor Address
+#define	REG_BKQ_DESA				0x0338	// TX BK Queue Descriptor Address
+#define	REG_RX_DESA				0x0340	// RX Queue	Descriptor Address
+#define	REG_DBI					0x0348	// Backdoor REG for Access Configuration
+//sherry added for DBI Read/Write  20091126
+#define	REG_DBI_WDATA				0x0348	// Backdoor REG for Access Configuration
+#define  	REG_DBI_RDATA				0x034C //Backdoor REG for Access Configuration
+#define	REG_DBI_CTRL				0x0350  //Backdoor REG for Access Configuration
+#define	REG_DBI_FLAG				0x0352 //Backdoor REG for Access Configuration#define	REG_MDIO					0x0354	// MDIO for Access PCIE PHY
+#define	REG_MDIO					0x0354	// MDIO for Access PCIE PHY
+#define	REG_DBG_SEL				0x0360	// Debug Selection Register
+#define	REG_PCIE_HRPWM			0x0361	//PCIe RPWM
+#define	REG_PCIE_HCPWM			0x0363	//PCIe CPWM
+#define	REG_UART_CTRL				0x0364	// UART	Control
+#define	REG_UART_TX_DESA			0x0370	// UART TX Descriptor Address
+#define	REG_UART_RX_DESA			0x0378	// UART Rx Descriptor Address
+
+
+// spec version 11
+//-----------------------------------------------------
+//
+//	0x0400h ~ 0x047Fh	Protocol Configuration
+//
+//-----------------------------------------------------
+#define REG_VOQ_INFORMATION			0x0400
+#define REG_VIQ_INFORMATION			0x0404
+#define REG_BEQ_INFORMATION			0x0408
+#define REG_BKQ_INFORMATION			0x040C
+#define REG_MGQ_INFORMATION			0x0410
+#define REG_HGQ_INFORMATION			0x0414
+#define REG_BCNQ_INFORMATION			0x0418
+
+
+#define REG_CPU_MGQ_INFORMATION		0x041C
+#define REG_FWHW_TXQ_CTRL				0x0420
+#define REG_HWSEQ_CTRL					0x0423
+#define REG_TXPKTBUF_BCNQ_BDNY		0x0424
+#define REG_TXPKTBUF_MGQ_BDNY		0x0425
+#define REG_LIFETIME_EN				0x0426
+#define REG_MULTI_BCNQ_OFFSET			0x0427
+#define REG_SPEC_SIFS					0x0428
+#define REG_RL							0x042A
+#define REG_DARFRC						0x0430
+#define REG_RARFRC						0x0438
+#define REG_RRSR						0x0440
+#define REG_ARFR0						0x0444
+#define REG_ARFR1						0x0448
+#define REG_ARFR2						0x044C
+#define REG_ARFR3						0x0450
+#define REG_AGGLEN_LMT					0x0458
+#define REG_AMPDU_MIN_SPACE			0x045C
+#define REG_TXPKTBUF_WMAC_LBK_BF_HD	0x045D
+#define REG_FAST_EDCA_CTRL				0x0460
+#define REG_RD_RESP_PKT_TH				0x0463
+#define REG_INIRTS_RATE_SEL			0x0480
+#define REG_INIDATA_RATE_SEL			0x0484
+#define REG_POWER_STATUS				0x04A4
+#define REG_POWER_STAGE1				0x04B4
+#define REG_POWER_STAGE2				0x04B8
+#define REG_PKT_VO_VI_LIFE_TIME			0x04C0
+#define REG_PKT_BE_BK_LIFE_TIME			0x04C2
+#define REG_STBC_SETTING				0x04C4
+#define REG_PROT_MODE_CTRL			0x04C8
+#define REG_MAX_AGGR_NUM				0x04CA
+#define REG_RTS_MAX_AGGR_NUM			0x04CB
+#define REG_BAR_MODE_CTRL				0x04CC
+#define REG_RA_TRY_RATE_AGG_LMT		0x04CF
+#define REG_EARLY_MODE_CONTROL		0x04D0
+#define REG_NQOS_SEQ					0x04DC
+#define REG_QOS_SEQ					0x04DE
+#define REG_NEED_CPU_HANDLE			0x04E0
+#define REG_PKT_LOSE_RPT				0x04E1
+#define REG_PTCL_ERR_STATUS			0x04E2
+#define REG_DUMMY						0x04FC
+
+
+
+//-----------------------------------------------------
+//
+//	0x0500h ~ 0x05FFh	EDCA Configuration
+//
+//-----------------------------------------------------
+#define REG_EDCA_VO_PARAM			0x0500
+#define REG_EDCA_VI_PARAM			0x0504
+#define REG_EDCA_BE_PARAM			0x0508
+#define REG_EDCA_BK_PARAM			0x050C
+#define REG_BCNTCFG					0x0510
+#define REG_PIFS						0x0512
+#define REG_RDG_PIFS				0x0513
+#define REG_SIFS_CTX				0x0514
+#define REG_SIFS_TRX				0x0516
+#define REG_TSFTR_SYN_OFFSET		0x0518
+#define REG_AGGR_BREAK_TIME		0x051A
+#define REG_SLOT					0x051B
+#define REG_TX_PTCL_CTRL			0x0520
+#define REG_TXPAUSE					0x0522
+#define REG_DIS_TXREQ_CLR			0x0523
+#define REG_RD_CTRL					0x0524
+#define REG_TBTT_PROHIBIT			0x0540
+#define REG_RD_NAV_NXT				0x0544
+#define REG_NAV_PROT_LEN			0x0546
+#define REG_BCN_CTRL				0x0550
+#define REG_BCN_CTRL_1				0x0551
+#define REG_MBID_NUM				0x0552
+#define REG_DUAL_TSF_RST			0x0553
+#define REG_BCN_INTERVAL			0x0554	// The same as REG_MBSSID_BCN_SPACE
+#define REG_MBSSID_BCN_SPACE		0x0554
+#define REG_DRVERLYINT				0x0558
+#define REG_BCNDMATIM				0x0559
+#define REG_ATIMWND				0x055A
+#define REG_USTIME_TSF				0x055C
+#define REG_BCN_MAX_ERR			0x055D
+#define REG_RXTSF_OFFSET_CCK		0x055E
+#define REG_RXTSF_OFFSET_OFDM		0x055F	
+#define REG_TSFTR					0x0560
+#define REG_TSFTR1					0x0568
+#define REG_INIT_TSFTR				0x0564
+#define REG_ATIMWND_1				0x0570
+#define REG_PSTIMER					0x0580
+#define REG_TIMER0					0x0584
+#define REG_TIMER1					0x0588
+#define REG_ACMHWCTRL				0x05C0
+#define REG_ACMRSTCTRL				0x05C1
+#define REG_ACMAVG					0x05C2
+#define REG_VO_ADMTIME				0x05C4
+#define REG_VI_ADMTIME				0x05C6
+#define REG_BE_ADMTIME				0x05C8
+#define REG_EDCA_RANDOM_GEN		0x05CC
+#define REG_SCH_TXCMD				0x05D0
+
+#define REG_DMC						0x05F0	//Dual MAC Co-Existence Register
+
+
+//-----------------------------------------------------
+//
+//	0x0600h ~ 0x07FFh	WMAC Configuration
+//
+//-----------------------------------------------------
+#define REG_APSD_CTRL				0x0600
+#define REG_BWOPMODE				0x0603
+#define REG_TCR						0x0604
+#define REG_RCR						0x0608
+#define REG_RX_PKT_LIMIT			0x060C
+#define REG_RX_DLK_TIME			0x060D
+#define REG_RX_DRVINFO_SZ			0x060F
+
+#define REG_MACID					0x0610
+#define REG_BSSID					0x0618
+#define REG_MAR						0x0620
+#define REG_MBIDCAMCFG				0x0628
+
+#define REG_USTIME_EDCA			0x0638
+#define REG_MAC_SPEC_SIFS			0x063A
+#define REG_RESP_SIFS_CCK			0x063C
+#define REG_RESP_SIFS_OFDM			0x063E
+#define REG_ACKTO					0x0640
+#define REG_CTS2TO					0x0641
+#define REG_EIFS						0x0642
+
+
+//WMA, BA, CCX
+#define REG_NAV_CTRL				0x0650
+#define REG_BACAMCMD				0x0654
+#define REG_BACAMCONTENT			0x0658
+#define REG_LBDLY					0x0660
+#define REG_FWDLY					0x0661
+#define REG_RXERR_RPT				0x0664
+#define REG_WMAC_TRXPTCL_CTL		0x0668
+
+
+// Security
+#define REG_CAMCMD					0x0670
+#define REG_CAMWRITE				0x0674
+#define REG_CAMREAD				0x0678
+#define REG_CAMDBG					0x067C
+#define REG_SECCFG					0x0680
+
+// Power
+#define REG_WOW_CTRL				0x0690
+#define REG_PSSTATUS				0x0691
+#define REG_PS_RX_INFO				0x0692
+#define REG_LPNAV_CTRL				0x0694
+#define REG_WKFMCAM_CMD			0x0698
+#define REG_WKFMCAM_RWD			0x069C
+#define REG_RXFLTMAP0				0x06A0
+#define REG_RXFLTMAP1				0x06A2
+#define REG_RXFLTMAP2				0x06A4
+#define REG_BCN_PSR_RPT			0x06A8
+#define REG_CALB32K_CTRL			0x06AC
+#define REG_PKT_MON_CTRL			0x06B4
+#define REG_BT_COEX_TABLE			0x06C0
+#define REG_WMAC_RESP_TXINFO		0x06D8
+
+#define REG_MACID1					0x0700
+#define REG_BSSID1					0x0708
+
+//-----------------------------------------------------
+//
+//	0xFE00h ~ 0xFE55h	USB Configuration
+//
+//-----------------------------------------------------
+#define REG_USB_INFO				0xFE17
+#define REG_USB_SPECIAL_OPTION	0xFE55
+#define REG_USB_DMA_AGG_TO		0xFE5B
+#define REG_USB_AGG_TO				0xFE5C
+#define REG_USB_AGG_TH				0xFE5D
+
+// for 92DU high_Queue low_Queue Normal_Queue select 
+#define REG_USB_High_NORMAL_Queue_Select_MAC0  0xFE44
+//#define REG_USB_LOW_Queue_Select_MAC0       0xFE45
+#define REG_USB_High_NORMAL_Queue_Select_MAC1  0xFE47
+//#define REG_USB_LOW_Queue_Select_MAC1       0xFE48
+
+// For test chip
+#define REG_TEST_USB_TXQS			0xFE48
+#define REG_TEST_SIE_VID			0xFE60		// 0xFE60~0xFE61
+#define REG_TEST_SIE_PID			0xFE62		// 0xFE62~0xFE63
+#define REG_TEST_SIE_OPTIONAL		0xFE64
+#define REG_TEST_SIE_CHIRP_K		0xFE65
+#define REG_TEST_SIE_PHY			0xFE66		// 0xFE66~0xFE6B
+#define REG_TEST_SIE_MAC_ADDR		0xFE70		// 0xFE70~0xFE75
+#define REG_TEST_SIE_STRING		0xFE80		// 0xFE80~0xFEB9
+
+
+// For normal chip
+#define REG_NORMAL_SIE_VID			0xFE60		// 0xFE60~0xFE61
+#define REG_NORMAL_SIE_PID			0xFE62		// 0xFE62~0xFE63
+#define REG_NORMAL_SIE_OPTIONAL	0xFE64
+#define REG_NORMAL_SIE_EP			0xFE65		// 0xFE65~0xFE67
+#define REG_NORMAL_SIE_PHY		0xFE68		// 0xFE68~0xFE6B
+#define REG_NORMAL_SIE_MAC_ADDR	0xFE70		// 0xFE70~0xFE75
+#define REG_NORMAL_SIE_STRING		0xFE80		// 0xFE80~0xFEDF
+
+
+//-----------------------------------------------------
+//
+//	Redifine 8192C register definition for compatibility
+//
+//-----------------------------------------------------
+
+// TODO: use these definition when using REG_xxx naming rule.
+// NOTE: DO NOT Remove these definition. Use later.
+
+#define	SYS_ISO_CTRL				REG_SYS_ISO_CTRL	// System Isolation Interface Control.
+#define	SYS_FUNC_EN				REG_SYS_FUNC_EN		// System Function Enable.
+#define	SYS_CLK						REG_SYS_CLKR
+#define	CR9346						REG_9346CR			// 93C46/93C56 Command Register.
+#define	EFUSE_CTRL					REG_EFUSE_CTRL		// E-Fuse Control.
+#define	EFUSE_TEST					REG_EFUSE_TEST		// E-Fuse Test.
+#define	MSR							(REG_CR + 2)		// Media Status register
+#define	ISR							REG_HISR
+#define	TSFR						REG_TSFTR			// Timing Sync Function Timer Register.
+
+#define	MACIDR0					REG_MACID			// MAC ID Register, Offset 0x0050-0x0053
+#define	MACIDR4					(REG_MACID + 4)		// MAC ID Register, Offset 0x0054-0x0055
+
+#define 	PBP							REG_PBP
+
+// Redifine MACID register, to compatible prior ICs.
+#define	IDR0						MACIDR0
+#define	IDR4						MACIDR4
+
+
+//
+// 9. Security Control Registers	(Offset: )
+//
+#define	RWCAM						REG_CAMCMD		//IN 8190 Data Sheet is called CAMcmd
+#define	WCAMI						REG_CAMWRITE	// Software write CAM input content
+#define	RCAMO						REG_CAMREAD		// Software read/write CAM config
+#define	CAMDBG						REG_CAMDBG
+#define	SECR						REG_SECCFG		//Security Configuration Register
+
+// Unused register
+#define	UnusedRegister				0x1BF
+#define	DCAM						UnusedRegister
+#define	PSR							UnusedRegister
+#define 	BBAddr						UnusedRegister
+#define	PhyDataR					UnusedRegister
+
+#define	InvalidBBRFValue			0x12345678
+
+// Min Spacing related settings.
+#define	MAX_MSS_DENSITY_2T 			0x13
+#define	MAX_MSS_DENSITY_1T 			0x0A
+
+//----------------------------------------------------------------------------
+//       8192C Cmd9346CR bits					(Offset 0xA, 16bit)
+//----------------------------------------------------------------------------
+#define	CmdEEPROM_En				BIT5	 // EEPROM enable when set 1
+#define	CmdEERPOMSEL				BIT4 	// System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is 9346
+#define	Cmd9346CR_9356SEL			BIT4
+#define	AutoLoadEEPROM			(CmdEEPROM_En|CmdEERPOMSEL)
+#define	AutoLoadEFUSE				CmdEEPROM_En
+
+//       8192C GPIO MUX Configuration Register (offset 0x40, 4 byte)
+//----------------------------------------------------------------------------
+#define	GPIOSEL_GPIO				0
+#define	GPIOSEL_ENBT				BIT5
+
+//----------------------------------------------------------------------------
+//       8192C GPIO PIN Control Register (offset 0x44, 4 byte)
+//----------------------------------------------------------------------------
+#define	GPIO_IN						REG_GPIO_PIN_CTRL		// GPIO pins input value
+#define	GPIO_OUT					(REG_GPIO_PIN_CTRL+1)	// GPIO pins output value
+#define	GPIO_IO_SEL				(REG_GPIO_PIN_CTRL+2)	// GPIO pins output enable when a bit is set to "1"; otherwise, input is configured.
+#define	GPIO_MOD					(REG_GPIO_PIN_CTRL+3)
+
+
+//----------------------------------------------------------------------------
+//       8192C (MSR) Media Status Register	(Offset 0x4C, 8 bits)  
+//----------------------------------------------------------------------------
+/*
+Network Type
+00: No link
+01: Link in ad hoc network
+10: Link in infrastructure network
+11: AP mode
+Default: 00b.
+*/
+#define	MSR_NOLINK					0x00
+#define	MSR_ADHOC					0x01
+#define	MSR_INFRA					0x02
+#define	MSR_AP						0x03
+
+//
+// 6. Adaptive Control Registers  (Offset: 0x0160 - 0x01CF)
+//
+//----------------------------------------------------------------------------
+//       8192C Response Rate Set Register	(offset 0x181, 24bits)
+//----------------------------------------------------------------------------
+#define	RRSR_RSC_OFFSET			21
+#define	RRSR_SHORT_OFFSET			23
+#define	RRSR_RSC_BW_40M			0x600000
+#define	RRSR_RSC_UPSUBCHNL		0x400000
+#define	RRSR_RSC_LOWSUBCHNL		0x200000
+#define	RRSR_SHORT					0x800000
+#define	RRSR_1M					BIT0
+#define	RRSR_2M					BIT1 
+#define	RRSR_5_5M					BIT2 
+#define	RRSR_11M					BIT3 
+#define	RRSR_6M					BIT4 
+#define	RRSR_9M					BIT5 
+#define	RRSR_12M					BIT6 
+#define	RRSR_18M					BIT7 
+#define	RRSR_24M					BIT8 
+#define	RRSR_36M					BIT9 
+#define	RRSR_48M					BIT10 
+#define	RRSR_54M					BIT11
+#define	RRSR_MCS0					BIT12
+#define	RRSR_MCS1					BIT13
+#define	RRSR_MCS2					BIT14
+#define	RRSR_MCS3					BIT15
+#define	RRSR_MCS4					BIT16
+#define	RRSR_MCS5					BIT17
+#define	RRSR_MCS6					BIT18
+#define	RRSR_MCS7					BIT19
+#define	BRSR_AckShortPmb			BIT23	
+// CCK ACK: use Short Preamble or not
+
+
+//----------------------------------------------------------------------------
+//       8192C Rate Definition
+//----------------------------------------------------------------------------
+//CCK
+#define	RATR_1M					0x00000001
+#define	RATR_2M					0x00000002
+#define	RATR_55M					0x00000004
+#define	RATR_11M					0x00000008
+//OFDM 		
+#define	RATR_6M					0x00000010
+#define	RATR_9M					0x00000020
+#define	RATR_12M					0x00000040
+#define	RATR_18M					0x00000080
+#define	RATR_24M					0x00000100
+#define	RATR_36M					0x00000200
+#define	RATR_48M					0x00000400
+#define	RATR_54M					0x00000800
+//MCS 1 Spatial Stream	
+#define	RATR_MCS0					0x00001000
+#define	RATR_MCS1					0x00002000
+#define	RATR_MCS2					0x00004000
+#define	RATR_MCS3					0x00008000
+#define	RATR_MCS4					0x00010000
+#define	RATR_MCS5					0x00020000
+#define	RATR_MCS6					0x00040000
+#define	RATR_MCS7					0x00080000
+//MCS 2 Spatial Stream
+#define	RATR_MCS8					0x00100000
+#define	RATR_MCS9					0x00200000
+#define	RATR_MCS10					0x00400000
+#define	RATR_MCS11					0x00800000
+#define	RATR_MCS12					0x01000000
+#define	RATR_MCS13					0x02000000
+#define	RATR_MCS14					0x04000000
+#define	RATR_MCS15					0x08000000
+
+
+// NOTE: For 92CU - Ziv
+//CCK
+#define RATE_1M						BIT(0)
+#define RATE_2M						BIT(1)
+#define RATE_5_5M					BIT(2)
+#define RATE_11M					BIT(3)
+//OFDM 
+#define RATE_6M						BIT(4)
+#define RATE_9M						BIT(5)
+#define RATE_12M					BIT(6)
+#define RATE_18M					BIT(7)
+#define RATE_24M					BIT(8)
+#define RATE_36M					BIT(9)
+#define RATE_48M					BIT(10)
+#define RATE_54M					BIT(11)
+//MCS 1 Spatial Stream
+#define RATE_MCS0					BIT(12)
+#define RATE_MCS1					BIT(13)
+#define RATE_MCS2					BIT(14)
+#define RATE_MCS3					BIT(15)
+#define RATE_MCS4					BIT(16)
+#define RATE_MCS5					BIT(17)
+#define RATE_MCS6					BIT(18)
+#define RATE_MCS7					BIT(19)
+//MCS 2 Spatial Stream
+#define RATE_MCS8					BIT(20)
+#define RATE_MCS9					BIT(21)
+#define RATE_MCS10					BIT(22)
+#define RATE_MCS11					BIT(23)
+#define RATE_MCS12					BIT(24)
+#define RATE_MCS13					BIT(25)
+#define RATE_MCS14					BIT(26)
+#define RATE_MCS15					BIT(27)
+
+
+
+
+// ALL CCK Rate
+#define	RATE_ALL_CCK				RATR_1M|RATR_2M|RATR_55M|RATR_11M 
+#define	RATE_ALL_OFDM_AG			RATR_6M|RATR_9M|RATR_12M|RATR_18M|RATR_24M|\
+									RATR_36M|RATR_48M|RATR_54M	
+#define	RATE_ALL_OFDM_1SS		RATR_MCS0|RATR_MCS1|RATR_MCS2|RATR_MCS3 |\
+									RATR_MCS4|RATR_MCS5|RATR_MCS6|RATR_MCS7	
+#define	RATE_ALL_OFDM_2SS		RATR_MCS8|RATR_MCS9|RATR_MCS10|RATR_MCS11|\
+									RATR_MCS12|RATR_MCS13|RATR_MCS14|RATR_MCS15
+
+//----------------------------------------------------------------------------
+//       8192C BW_OPMODE bits					(Offset 0x203, 8bit)
+//----------------------------------------------------------------------------
+#define	BW_OPMODE_20MHZ			BIT2
+#define	BW_OPMODE_5G				BIT1
+#define	BW_OPMODE_11J				BIT0
+
+
+//----------------------------------------------------------------------------
+//       8192C CAM Config Setting (offset 0x250, 1 byte)
+//----------------------------------------------------------------------------
+#define	CAM_VALID					BIT15
+#define	CAM_NOTVALID				0x0000
+#define	CAM_USEDK					BIT5
+
+#define	CAM_CONTENT_COUNT 		8
+
+#define	CAM_NONE					0x0
+#define	CAM_WEP40					0x01
+#define	CAM_TKIP					0x02
+#define	CAM_AES					0x04
+#define	CAM_WEP104				0x05
+#define	CAM_SMS4					0x6
+
+
+#define	TOTAL_CAM_ENTRY			32
+#define	HALF_CAM_ENTRY			16	
+       		
+#define	CAM_CONFIG_USEDK			_TRUE
+#define	CAM_CONFIG_NO_USEDK		_FALSE
+       		
+#define	CAM_WRITE					BIT16
+#define	CAM_READ					0x00000000
+#define	CAM_POLLINIG				BIT31
+
+#define	SCR_UseDK					0x01
+#define	SCR_TxSecEnable			0x02
+#define	SCR_RxSecEnable			0x04
+
+
+//
+// 12. Host Interrupt Status Registers	 (Offset: 0x0300 - 0x030F)
+//
+//----------------------------------------------------------------------------
+//       8190 IMR/ISR bits						(offset 0xfd,  8bits)
+//----------------------------------------------------------------------------
+#define	IMR8190_DISABLED			0x0
+// IMR DW0 Bit 0-31
+#define	IMR_BCNDMAINT6			BIT31		// Beacon DMA Interrupt 6
+#define	IMR_BCNDMAINT5			BIT30		// Beacon DMA Interrupt 5
+#define	IMR_BCNDMAINT4			BIT29		// Beacon DMA Interrupt 4
+#define	IMR_BCNDMAINT3			BIT28		// Beacon DMA Interrupt 3
+#define	IMR_BCNDMAINT2			BIT27		// Beacon DMA Interrupt 2
+#define	IMR_BCNDMAINT1			BIT26		// Beacon DMA Interrupt 1
+#define	IMR_BCNDOK8				BIT25		// Beacon Queue DMA OK Interrup 8
+#define	IMR_BCNDOK7				BIT24		// Beacon Queue DMA OK Interrup 7
+#define	IMR_BCNDOK6				BIT23		// Beacon Queue DMA OK Interrup 6
+#define	IMR_BCNDOK5				BIT22		// Beacon Queue DMA OK Interrup 5
+#define	IMR_BCNDOK4				BIT21		// Beacon Queue DMA OK Interrup 4
+#define	IMR_BCNDOK3				BIT20		// Beacon Queue DMA OK Interrup 3
+#define	IMR_BCNDOK2				BIT19		// Beacon Queue DMA OK Interrup 2
+#define	IMR_BCNDOK1				BIT18		// Beacon Queue DMA OK Interrup 1
+#define	IMR_TIMEOUT2				BIT17		// Timeout interrupt 2
+#define	IMR_TIMEOUT1				BIT16		// Timeout interrupt 1
+#define	IMR_TXFOVW				BIT15		// Transmit FIFO Overflow
+#define	IMR_PSTIMEOUT				BIT14		// Power save time out interrupt 
+#define	IMR_BcnInt					BIT13		// Beacon DMA Interrupt 0
+#define	IMR_RXFOVW				BIT12		// Receive FIFO Overflow
+#define	IMR_RDU					BIT11		// Receive Descriptor Unavailable
+#define	IMR_ATIMEND				BIT10		// For 92C,ATIM Window End Interrupt
+#define	IMR_BDOK					BIT9		// Beacon Queue DMA OK Interrup
+#define	IMR_HIGHDOK				BIT8		// High Queue DMA OK Interrupt
+#define	IMR_TBDOK					BIT7		// Transmit Beacon OK interrup
+#define	IMR_MGNTDOK				BIT6		// Management Queue DMA OK Interrupt
+#define	IMR_TBDER					BIT5		// For 92C,Transmit Beacon Error Interrupt
+#define	IMR_BKDOK					BIT4		// AC_BK DMA OK Interrupt
+#define	IMR_BEDOK					BIT3		// AC_BE DMA OK Interrupt
+#define	IMR_VIDOK					BIT2		// AC_VI DMA OK Interrupt
+#define	IMR_VODOK					BIT1		// AC_VO DMA Interrupt
+#define	IMR_ROK					BIT0		// Receive DMA OK Interrupt
+
+// 13. Host Interrupt Status Extension Register	 (Offset: 0x012C-012Eh)
+#define	IMR_TXERR					BIT11
+#define	IMR_RXERR					BIT10
+#define	IMR_C2HCMD				BIT9
+#define	IMR_CPWM					BIT8
+//RSVD [2-7]
+#define	IMR_OCPINT					BIT1
+#define	IMR_WLANOFF				BIT0
+
+
+
+//----------------------------------------------------------------------------
+// 8192D EFUSE
+//----------------------------------------------------------------------------
+#define	HWSET_MAX_SIZE				256
+
+//----------------------------------------------------------------------------
+//       8192C EEPROM/EFUSE share register definition.
+//----------------------------------------------------------------------------
+
+//
+// Default Value for EEPROM or EFUSE!!!
+//
+#define	EEPROM_Default_TSSI					0x0
+#define 	EEPROM_Default_TxPowerDiff				0x0
+#define 	EEPROM_Default_CrystalCap				0x0		//92D default 0x0
+#define 	EEPROM_Default_BoardType				0x02 // Default: 2X2, RTL8192CE(QFPN68)
+#define 	EEPROM_Default_TxPower				0x1010
+#define	EEPROM_Default_HT2T_TxPwr				0x10
+
+#define	EEPROM_Default_LegacyHTTxPowerDiff	0x4
+#define	EEPROM_Default_ThermalMeter			0x12
+
+#define	EEPROM_Default_AntTxPowerDiff			0x0
+//#define	EEPROM_Default_TxPwDiff_CrystalCap		0x5
+#define	EEPROM_Default_TxPowerLevel_2G		0x2C
+#define	EEPROM_Default_TxPowerLevel_5G		0x22
+
+#define	EEPROM_Default_HT40_2SDiff				0x0
+#define 	EEPROM_Default_HT20_Diff				2	// HT20<->40 default Tx Power Index Difference
+#define	EEPROM_Default_LegacyHTTxPowerDiff	0x4	//OFDM Tx Power index diff
+#define 	EEPROM_Default_HT40_PwrMaxOffset		0
+#define 	EEPROM_Default_HT20_PwrMaxOffset		0
+
+// For debug
+#define 	EEPROM_Default_PID						0x1234
+#define 	EEPROM_Default_VID						0x5678
+#define 	EEPROM_Default_CustomerID				0xAB
+#define 	EEPROM_Default_SubCustomerID			0xCD
+#define 	EEPROM_Default_Version					0
+
+#define	EEPROM_Default_externalPA_C9		0x00
+#define	EEPROM_Default_externalPA_CC		0xFF
+#define	EEPROM_Default_internalPA_SP3T_C9	0xAA
+#define	EEPROM_Default_internalPA_SP3T_CC	0xAF
+#define	EEPROM_Default_internalPA_SPDT_C9	0xAA
+#ifdef CONFIG_PCI_HCI
+#define	EEPROM_Default_internalPA_SPDT_CC	0xA0
+#else
+#define	EEPROM_Default_internalPA_SPDT_CC	0xFA
+#endif
+
+#define	EEPROM_CHANNEL_PLAN_FCC				0x0
+#define	EEPROM_CHANNEL_PLAN_IC				0x1
+#define	EEPROM_CHANNEL_PLAN_ETSI			0x2
+#define	EEPROM_CHANNEL_PLAN_SPAIN			0x3
+#define	EEPROM_CHANNEL_PLAN_FRANCE			0x4
+#define	EEPROM_CHANNEL_PLAN_MKK				0x5
+#define	EEPROM_CHANNEL_PLAN_MKK1			0x6
+#define	EEPROM_CHANNEL_PLAN_ISRAEL			0x7
+#define	EEPROM_CHANNEL_PLAN_TELEC			0x8
+#define	EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN	0x9
+#define	EEPROM_CHANNEL_PLAN_WORLD_WIDE_13	0xA
+#define	EEPROM_CHANNEL_PLAN_NCC				0xB
+#define	EEPROM_CHANNEL_PLAN_BY_HW_MASK	0x80
+
+
+#define 	EEPROM_CID_DEFAULT					0x0
+#define 	EEPROM_CID_TOSHIBA					0x4
+#define	EEPROM_CID_CCX						0x10 // CCX test. By Bruce, 2009-02-25.
+#define	EEPROM_CID_QMI						0x0D
+#define 	EEPROM_CID_WHQL 						0xFE // added by chiyoko for dtm, 20090108
+
+
+#define	RTL8192_EEPROM_ID						0x8129
+#define	EEPROM_WAPI_SUPPORT					0x78
+
+
+#ifdef CONFIG_PCI_HCI
+#define RT_IBSS_INT_MASKS				(IMR_BcnInt | IMR_TBDOK | IMR_TBDER)
+#define RT_AC_INT_MASKS				(IMR_VIDOK | IMR_VODOK | IMR_BEDOK|IMR_BKDOK)
+#define RT_BSS_INT_MASKS				(RT_IBSS_INT_MASKS)
+
+#define RTL8190_EEPROM_ID						0x8129	// 0-1
+#define EEPROM_HPON							0x02 // LDO settings.2-5
+#define EEPROM_CLK								0x06 // Clock settings.6-7
+#define EEPROM_MAC_FUNCTION					0x08 // SE Test mode.8
+
+#define EEPROM_VID								0x28 // SE Vendor ID.A-B
+#define EEPROM_DID								0x2A // SE Device ID. C-D
+#define EEPROM_SVID								0x2C // SE Vendor ID.E-F
+#define EEPROM_SMID							0x2E // SE PCI Subsystem ID. 10-11
+
+#define EEPROM_MAC_ADDR						0x16 // SEMAC Address. 12-17
+#define EEPROM_MAC_ADDR_MAC0_92D			0x55
+#define EEPROM_MAC_ADDR_MAC1_92D			0x5B
+//----------------------------------------------------------------
+// 2.4G band Tx power index setting
+#define EEPROM_CCK_TX_PWR_INX_2G				0x61
+#define EEPROM_HT40_1S_TX_PWR_INX_2G		0x67
+#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_2G	0x6D
+#define EEPROM_HT20_TX_PWR_INX_DIFF_2G		0x70
+#define EEPROM_OFDM_TX_PWR_INX_DIFF_2G		0x73
+#define EEPROM_HT40_MAX_PWR_OFFSET_2G		0x76
+#define EEPROM_HT20_MAX_PWR_OFFSET_2G		0x79
+
+//5GL channel 32-64
+#define EEPROM_HT40_1S_TX_PWR_INX_5GL		0x7C
+#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GL	0x82
+#define EEPROM_HT20_TX_PWR_INX_DIFF_5GL		0x85
+#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GL		0x88
+#define EEPROM_HT40_MAX_PWR_OFFSET_5GL		0x8B
+#define EEPROM_HT20_MAX_PWR_OFFSET_5GL		0x8E
+
+//5GM channel 100-140
+#define EEPROM_HT40_1S_TX_PWR_INX_5GM		0x91
+#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GM	0x97
+#define EEPROM_HT20_TX_PWR_INX_DIFF_5GM		0x9A
+#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GM	0x9D
+#define EEPROM_HT40_MAX_PWR_OFFSET_5GM		0xA0
+#define EEPROM_HT20_MAX_PWR_OFFSET_5GM		0xA3
+
+//5GH channel 149-165
+#define EEPROM_HT40_1S_TX_PWR_INX_5GH		0xA6
+#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GH	0xAC
+#define EEPROM_HT20_TX_PWR_INX_DIFF_5GH		0xAF
+#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GH		0xB2
+#define EEPROM_HT40_MAX_PWR_OFFSET_5GH		0xB5
+#define EEPROM_HT20_MAX_PWR_OFFSET_5GH		0xB8
+
+#define EEPROM_CHANNEL_PLAN					0xBB // Map of supported channels.	
+#define EEPROM_IQK_DELTA						0xBC
+#define EEPROM_LCK_DELTA						0xBC
+#define EEPROM_XTAL_K							0xBD	//[7:5]
+#define EEPROM_TSSI_A_5G						0xBE
+#define EEPROM_TSSI_B_5G						0xBF
+#define EEPROM_TSSI_AB_5G						0xC0
+#define EEPROM_THERMAL_METER					0xC3	//[4:0]
+#define EEPROM_PATHDIV							0xC4
+#define EEPROM_RF_OPT1							0xC4
+#define EEPROM_RF_OPT2							0xC5
+#define EEPROM_RF_OPT3							0xC6
+#define EEPROM_RF_OPT4							0xC7
+#define EEPROM_RF_OPT5							0xC8
+#define EEPROM_RF_OPT6							0xC9
+#define EEPROM_VERSION							0xCA
+#define EEPROM_CUSTOMER_ID					0xCB
+#define EEPROM_RF_OPT7							0xCC
+
+#define EEPROM_WIDIPAIRING_ADDR				0xF0
+#define EEPROM_WIDIPAIRING_KEY				0xF6
+
+#define EEPROM_DEF_PART_NO					0x3FD  //Byte
+#define EEPROME_CHIP_VERSION_L				0x3FF
+#define EEPROME_CHIP_VERSION_H				0x3FE
+#endif 
+
+#ifdef CONFIG_USB_HCI
+#define RTL8190_EEPROM_ID						0x8129	// 0-1
+#define EEPROM_HPON							0x02 // LDO settings.2-5
+#define EEPROM_CLK								0x06 // Clock settings.6-7
+#define EEPROM_MAC_FUNCTION					0x08 // SE Test mode.8
+
+#define EEPROM_VID								0xC // SE Vendor ID.A-B
+#define EEPROM_PID								0xE // SE Device ID. C-D
+#define EEPROM_ENDPOINT_SETTING				0x10
+#define EEPROM_CHIRP_K							0x12	// Changed
+#define EEPROM_USB_PHY							0x13	// Changed
+#define EEPROM_NORMAL_BoardType				EEPROM_RF_OPT1	//[7:5]
+#define EEPROM_MAC_ADDR						0x16 // SEMAC Address. 12-17
+#define EEPROM_STRING							0x1F
+#define EEPROM_SUBCUSTOMER_ID					0x59
+
+#define EEPROM_MAC_ADDR_MAC0_92D			0x19
+#define EEPROM_MAC_ADDR_MAC1_92D			0x5B
+//----------------------------------------------------------------
+// 2.4G band Tx power index setting
+#define EEPROM_CCK_TX_PWR_INX_2G				0x61
+#define EEPROM_HT40_1S_TX_PWR_INX_2G		0x67
+#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_2G	0x6D
+#define EEPROM_HT20_TX_PWR_INX_DIFF_2G		0x70
+#define EEPROM_OFDM_TX_PWR_INX_DIFF_2G		0x73
+#define EEPROM_HT40_MAX_PWR_OFFSET_2G		0x76
+#define EEPROM_HT20_MAX_PWR_OFFSET_2G		0x79
+
+//5GL channel 32-64
+#define EEPROM_HT40_1S_TX_PWR_INX_5GL		0x7C
+#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GL	0x82
+#define EEPROM_HT20_TX_PWR_INX_DIFF_5GL		0x85
+#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GL		0x88
+#define EEPROM_HT40_MAX_PWR_OFFSET_5GL		0x8B
+#define EEPROM_HT20_MAX_PWR_OFFSET_5GL		0x8E
+
+//5GM channel 100-140
+#define EEPROM_HT40_1S_TX_PWR_INX_5GM		0x91
+#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GM	0x97
+#define EEPROM_HT20_TX_PWR_INX_DIFF_5GM		0x9A
+#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GM	0x9D
+#define EEPROM_HT40_MAX_PWR_OFFSET_5GM		0xA0
+#define EEPROM_HT20_MAX_PWR_OFFSET_5GM		0xA3
+
+//5GH channel 149-165
+#define EEPROM_HT40_1S_TX_PWR_INX_5GH		0xA6
+#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GH	0xAC
+#define EEPROM_HT20_TX_PWR_INX_DIFF_5GH		0xAF
+#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GH		0xB2
+#define EEPROM_HT40_MAX_PWR_OFFSET_5GH		0xB5
+#define EEPROM_HT20_MAX_PWR_OFFSET_5GH		0xB8
+
+#define EEPROM_CHANNEL_PLAN					0xBB // Map of supported channels.	
+#define EEPROM_TEST_CHANNEL_PLAN				0xBB
+#define EEPROM_IQK_DELTA						0xBC
+#define EEPROM_LCK_DELTA						0xBC
+#define EEPROM_XTAL_K							0xBD	//[7:5]
+#define EEPROM_TSSI_A_5G						0xBE
+#define EEPROM_TSSI_B_5G						0xBF
+#define EEPROM_TSSI_AB_5G						0xC0
+#define EEPROM_THERMAL_METER					0xC3	//[4:0]
+#define EEPROM_RF_OPT1							0xC4
+#define EEPROM_RF_OPT2							0xC5
+#define EEPROM_RF_OPT3							0xC6
+#define EEPROM_RF_OPT4							0xC7
+#define EEPROM_RF_OPT5							0xC8
+#define EEPROM_RF_OPT6							0xC9
+#define EEPROM_VERSION							0xCA
+#define EEPROM_CUSTOMER_ID					0xCB
+#define EEPROM_RF_OPT7							0xCC
+
+#define EEPROM_DEF_PART_NO					0x3FD  //Byte
+#define EEPROME_CHIP_VERSION_L				0x3FF
+#define EEPROME_CHIP_VERSION_H				0x3FE
+
+//-------------------------------------------------------------
+//	EEPROM content definitions
+//-------------------------------------------------------------
+#define OS_LINK_SPEED_NORMAL_MASK			BIT3 | BIT2
+#define OS_LINK_SPEED_TEST_MASK				BIT3 | BIT4
+
+#define BOARD_TYPE_NORMAL_MASK				0xE0
+#define BOARD_TYPE_TEST_MASK					0xF
+
+#define BT_COEXISTENCE_TEST					BIT4
+#define BT_COEXISTENCE_NORMAL					BIT5
+
+#define BT_CO_SHIFT_TEST						4
+#define BT_CO_SHIFT_NORMAL					5
+
+#define EP_NUMBER_MASK_TEST					0x30	//bit 4:5 0Eh
+#define EP_NUMBER_SHIFT_TEST					4
+
+#define USB_PHY_PARA_SIZE_TEST				6
+#define USB_PHY_PARA_SIZE_NORMAL				4
+
+//-------------------------------------------------------------
+//	EEPROM default value definitions
+//-------------------------------------------------------------
+// Use 0xABCD instead of 0x8192 for debug
+#define	EEPROM_DEF_ID_0						0xCD	// Byte 0x00
+#define	EEPROM_DEF_ID_1						0xAB	// Byte 0x01
+
+#define EEPROM_DEF_RTK_RSV_A3					0x74	// Byte 0x03
+#define EEPROM_DEF_RTK_RSV_A4					0x6D	// Byte 0x04
+#define EEPROM_DEF_RTK_RSV_A8					0xFF	// Byte 0x08
+
+#define EEPROM_DEF_VID_0						0x0A	// Byte 0x0A
+#define EEPROM_DEF_VID_1						0x0B
+
+#define EEPROM_DEF_PID_0						0x92	// Byte 0x0C
+#define EEPROM_DEF_PID_1						0x81
+
+
+#define EEPROM_TEST_DEF_USB_OPT				0x80	// Byte 0x0E
+#define EEPROM_NORMAL_DEF_USB_OPT			0x00	// Byte 0x0E
+
+#define EEPROM_DEF_CHIRPK						0x15	// Byte 0x0F
+
+#define EEPROM_DEF_USB_PHY_0					0x85	// Byte 0x10
+#define EEPROM_DEF_USB_PHY_1					0x62	// Byte 0x11
+#define EEPROM_DEF_USB_PHY_2					0x9E	// Byte 0x12
+#define EEPROM_DEF_USB_PHY_3					0x06	// Byte 0x13
+
+#define EEPROM_DEF_TSSI_A						0x09	// Byte 0x78
+#define EEPROM_DEF_TSSI_B						0x09	// Byte 0x79
+
+
+#define EEPROM_DEF_THERMAL_METER				0x12	// Byte 0x7A
+
+
+#define	EEPROM_USB_SN							BIT(0)
+#define	EEPROM_USB_REMOTE_WAKEUP			BIT(1)
+#define	EEPROM_USB_DEVICE_PWR				BIT(2)
+#define	EEPROM_EP_NUMBER						(BIT(3)|BIT(4))
+
+#if 0
+#define	EEPROM_CHANNEL_PLAN_FCC					0x0
+#define	EEPROM_CHANNEL_PLAN_IC					0x1
+#define	EEPROM_CHANNEL_PLAN_ETSI				0x2
+#define	EEPROM_CHANNEL_PLAN_SPAIN				0x3
+#define	EEPROM_CHANNEL_PLAN_FRANCE				0x4
+#define	EEPROM_CHANNEL_PLAN_MKK					0x5
+#define	EEPROM_CHANNEL_PLAN_MKK1				0x6
+#define	EEPROM_CHANNEL_PLAN_ISRAEL				0x7
+#define	EEPROM_CHANNEL_PLAN_TELEC				0x8
+#define	EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN		0x9
+#define	EEPROM_CHANNEL_PLAN_WORLD_WIDE_13		0xA
+#define	EEPROM_CHANNEL_PLAN_BY_HW_MASK			0x80
+
+#define	EEPROM_CID_DEFAULT						0x0
+
+#define	EEPROM_CID_WHQL 						0xFE // added by chiyoko for dtm, 20090108
+
+
+#define	EEPROM_CID_CCX							0x10 // CCX test. By Bruce, 2009-02-25.
+
+#endif
+#endif
+
+
+/*===================================================================
+=====================================================================
+Here the register defines are for 92C. When the define is as same with 92C, 
+we will use the 92C's define for the consistency
+So the following defines for 92C is not entire!!!!!!
+=====================================================================
+=====================================================================*/
+/*
+Based on Datasheet V33---090401
+Register Summary
+Current IOREG MAP
+0x0000h ~ 0x00FFh   System Configuration (256 Bytes)
+0x0100h ~ 0x01FFh   MACTOP General Configuration (256 Bytes)
+0x0200h ~ 0x027Fh   TXDMA Configuration (128 Bytes)
+0x0280h ~ 0x02FFh   RXDMA Configuration (128 Bytes)
+0x0300h ~ 0x03FFh   PCIE EMAC Reserved Region (256 Bytes)
+0x0400h ~ 0x04FFh   Protocol Configuration (256 Bytes)
+0x0500h ~ 0x05FFh   EDCA Configuration (256 Bytes)
+0x0600h ~ 0x07FFh   WMAC Configuration (512 Bytes)
+0x2000h ~ 0x3FFFh   8051 FW Download Region (8196 Bytes)
+*/
+
+//----------------------------------------------------------------------------
+//       8192C (RCR) Receive Configuration Register	(Offset 0x608, 32 bits)
+//----------------------------------------------------------------------------
+#define	RCR_APPFCS					BIT31		//WMAC append FCS after pauload
+#define	RCR_APP_MIC				BIT30		//
+#define	RCR_APP_ICV				BIT29       //
+#define	RCR_APP_PHYST_RXFF		BIT28       //
+#define	RCR_APP_BA_SSN			BIT27		//Accept BA SSN
+#define	RCR_ENMBID					BIT24		//Enable Multiple BssId.
+#define	RCR_LSIGEN					BIT23
+#define	RCR_MFBEN					BIT22
+#define	RCR_HTC_LOC_CTRL			BIT14       //MFC<--HTC=1 MFC-->HTC=0
+#define	RCR_AMF					BIT13		//Accept management type frame
+#define	RCR_ACF					BIT12		//Accept control type frame
+#define	RCR_ADF					BIT11		//Accept data type frame
+#define	RCR_AICV					BIT9		//Accept ICV error packet
+#define	RCR_ACRC32					BIT8		//Accept CRC32 error packet 
+#define	RCR_CBSSID_BCN			BIT7		//Accept BSSID match packet (Rx beacon, probe rsp)
+#define	RCR_CBSSID_DATA			BIT6		//Accept BSSID match packet (Data)
+#define	RCR_CBSSID					RCR_CBSSID_DATA		//Accept BSSID match packet
+#define	RCR_APWRMGT				BIT5		//Accept power management packet
+#define	RCR_ADD3					BIT4		//Accept address 3 match packet
+#define	RCR_AB						BIT3		//Accept broadcast packet 
+#define	RCR_AM						BIT2		//Accept multicast packet 
+#define	RCR_APM					BIT1		//Accept physical match packet
+#define	RCR_AAP					BIT0		//Accept all unicast packet 
+#define	RCR_MXDMA_OFFSET			8
+#define	RCR_FIFO_OFFSET			13
+
+
+
+//============================================================================
+//       8192c USB specific Regsiter Offset and Content definition, 
+//       2009.08.18, added by vivi. for merge 92c and 92C into one driver
+//============================================================================
+//#define APS_FSMCO				0x0004  same with 92Ce
+#define RSV_CTRL					0x001C
+#define RD_CTRL					0x0524
+
+//-----------------------------------------------------
+//
+//	0xFE00h ~ 0xFE55h	USB Configuration
+//
+//-----------------------------------------------------
+#define REG_USB_INFO				0xFE17
+#define REG_USB_SPECIAL_OPTION	0xFE55
+#define REG_USB_DMA_AGG_TO		0xFE5B
+#define REG_USB_AGG_TO				0xFE5C
+#define REG_USB_AGG_TH				0xFE5D
+
+#define REG_USB_VID					0xFE60
+#define REG_USB_PID					0xFE62
+#define REG_USB_OPTIONAL			0xFE64
+#define REG_USB_CHIRP_K			0xFE65
+#define REG_USB_PHY					0xFE66
+#define REG_USB_MAC_ADDR			0xFE70
+
+#define REG_USB_HRPWM				0xFE58
+#define REG_USB_HCPWM				0xFE57
+
+#define InvalidBBRFValue			0x12345678
+
+//============================================================================
+//       8192C Regsiter Bit and Content definition 
+//============================================================================
+//-----------------------------------------------------
+//
+//	0x0000h ~ 0x00FFh	System Configuration
+//
+//-----------------------------------------------------
+
+//2 SPS0_CTRL
+#define SW18_FPWM					BIT(3)
+
+
+//2 SYS_ISO_CTRL
+#define ISO_MD2PP					BIT(0)
+#define ISO_UA2USB					BIT(1)
+#define ISO_UD2CORE					BIT(2)
+#define ISO_PA2PCIE					BIT(3)
+#define ISO_PD2CORE					BIT(4)
+#define ISO_IP2MAC					BIT(5)
+#define ISO_DIOP						BIT(6)
+#define ISO_DIOE						BIT(7)
+#define ISO_EB2CORE					BIT(8)
+#define ISO_DIOR						BIT(9)
+
+#define PWC_EV25V					BIT(14)
+#define PWC_EV12V					BIT(15)
+
+
+//2 SYS_FUNC_EN
+#define FEN_BBRSTB					BIT(0)
+#define FEN_BB_GLB_RSTn			BIT(1)
+#define FEN_USBA					BIT(2)
+#define FEN_UPLL					BIT(3)
+#define FEN_USBD					BIT(4)
+#define FEN_DIO_PCIE				BIT(5)
+#define FEN_PCIEA					BIT(6)
+#define FEN_PPLL						BIT(7)
+#define FEN_PCIED					BIT(8)
+#define FEN_DIOE					BIT(9)
+#define FEN_CPUEN					BIT(10)
+#define FEN_DCORE					BIT(11)
+#define FEN_ELDR					BIT(12)
+#define FEN_DIO_RF					BIT(13)
+#define FEN_HWPDN					BIT(14)
+#define FEN_MREGEN					BIT(15)
+
+//2 APS_FSMCO
+#define PFM_LDALL					BIT(0)
+#define PFM_ALDN					BIT(1)
+#define PFM_LDKP					BIT(2)
+#define PFM_WOWL					BIT(3)
+#define EnPDN						BIT(4)
+#define PDN_PL						BIT(5)
+#define APFM_ONMAC					BIT(8)
+#define APFM_OFF					BIT(9)
+#define APFM_RSM					BIT(10)
+#define AFSM_HSUS					BIT(11)
+#define AFSM_PCIE					BIT(12)
+#define APDM_MAC					BIT(13)
+#define APDM_HOST					BIT(14)
+#define APDM_HPDN					BIT(15)
+#define RDY_MACON					BIT(16)
+#define SUS_HOST					BIT(17)
+#define ROP_ALD						BIT(20)
+#define ROP_PWR						BIT(21)
+#define ROP_SPS						BIT(22)
+#define SOP_MRST					BIT(25)
+#define SOP_FUSE					BIT(26)
+#define SOP_ABG						BIT(27)
+#define SOP_AMB						BIT(28)
+#define SOP_RCK						BIT(29)
+#define SOP_A8M						BIT(30)
+#define XOP_BTCK					BIT(31)
+
+//2 SYS_CLKR
+#define ANAD16V_EN					BIT(0)
+#define ANA8M						BIT(1)
+#define MACSLP						BIT(4)
+#define LOADER_CLK_EN				BIT(5)
+#define _80M_SSC_DIS				BIT(7)
+#define _80M_SSC_EN_HO				BIT(8)
+#define PHY_SSC_RSTB				BIT(9)
+#define SEC_CLK_EN					BIT(10)
+#define MAC_CLK_EN					BIT(11)
+#define SYS_CLK_EN					BIT(12)
+#define RING_CLK_EN					BIT(13)
+
+
+//2 9346CR
+
+#define BOOT_FROM_EEPROM			BIT(4)
+#define EEPROM_EN					BIT(5)
+
+
+//2 AFE_MISC
+#define AFE_BGEN					BIT(0)
+#define AFE_MBEN					BIT(1)
+#define MAC_ID_EN					BIT(7)
+
+
+//2 SPS0_CTRL
+
+
+//2 SPS_OCP_CFG
+
+
+//2 RSV_CTRL
+#define WLOCK_ALL					BIT(0)
+#define WLOCK_00					BIT(1)
+#define WLOCK_04					BIT(2)
+#define WLOCK_08					BIT(3)
+#define WLOCK_40					BIT(4)
+#define R_DIS_PRST_0				BIT(5)
+#define R_DIS_PRST_1				BIT(6)
+#define LOCK_ALL_EN					BIT(7)
+
+//2 RF_CTRL
+#define RF_EN						BIT(0)
+#define RF_RSTB						BIT(1)
+#define RF_SDMRSTB					BIT(2)
+
+
+
+//2 LDOA15_CTRL
+#define LDA15_EN					BIT(0)
+#define LDA15_STBY					BIT(1)
+#define LDA15_OBUF					BIT(2)
+#define LDA15_REG_VOS				BIT(3)
+#define _LDA15_VOADJ(x)				(((x) & 0x7) << 4)
+
+
+
+//2 LDOV12D_CTRL
+#define LDV12_EN					BIT(0)
+#define LDV12_SDBY					BIT(1)
+#define LPLDO_HSM					BIT(2)
+#define LPLDO_LSM_DIS				BIT(3)
+#define _LDV12_VADJ(x)				(((x) & 0xF) << 4)
+
+
+//2 AFE_XTAL_CTRL
+#define XTAL_EN						BIT(0)
+#define XTAL_BSEL					BIT(1)
+#define _XTAL_BOSC(x)				(((x) & 0x3) << 2)
+#define _XTAL_CADJ(x)				(((x) & 0xF) << 4)
+#define XTAL_GATE_USB				BIT(8)
+#define _XTAL_USB_DRV(x)			(((x) & 0x3) << 9)
+#define XTAL_GATE_AFE				BIT(11)
+#define _XTAL_AFE_DRV(x)			(((x) & 0x3) << 12)
+#define XTAL_RF_GATE				BIT(14)
+#define _XTAL_RF_DRV(x)				(((x) & 0x3) << 15)
+#define XTAL_GATE_DIG				BIT(17)
+#define _XTAL_DIG_DRV(x)			(((x) & 0x3) << 18)
+#define XTAL_BT_GATE				BIT(20)
+#define _XTAL_BT_DRV(x)				(((x) & 0x3) << 21)
+#define _XTAL_GPIO(x)				(((x) & 0x7) << 23)
+
+
+#define CKDLY_AFE					BIT(26)
+#define CKDLY_USB					BIT(27)
+#define CKDLY_DIG					BIT(28)
+#define CKDLY_BT					BIT(29)
+
+
+//2 AFE_PLL_CTRL
+#define APLL_EN						BIT(0)
+#define APLL_320_EN					BIT(1)
+#define APLL_FREF_SEL				BIT(2)
+#define APLL_EDGE_SEL				BIT(3)
+#define APLL_WDOGB					BIT(4)
+#define APLL_LPFEN					BIT(5)
+
+#define APLL_REF_CLK_13MHZ			0x1
+#define APLL_REF_CLK_19_2MHZ		0x2
+#define APLL_REF_CLK_20MHZ			0x3
+#define APLL_REF_CLK_25MHZ			0x4
+#define APLL_REF_CLK_26MHZ			0x5
+#define APLL_REF_CLK_38_4MHZ		0x6
+#define APLL_REF_CLK_40MHZ			0x7
+
+#define APLL_320EN					BIT(14)
+#define APLL_80EN					BIT(15)
+#define APLL_1MEN					BIT(24)
+
+
+//2 EFUSE_CTRL
+#define ALD_EN						BIT(18)
+#define EF_PD						BIT(19)
+#define EF_FLAG						BIT(31)
+
+//2 EFUSE_TEST 
+#define EF_TRPT						BIT(7)
+#define LDOE25_EN					BIT(31)
+
+//2 PWR_DATA 
+
+//2 CAL_TIMER
+
+//2 ACLK_MON
+#define RSM_EN						BIT(0)
+#define Timer_EN						BIT(4)
+
+
+//2 GPIO_MUXCFG
+#define TRSW0EN						BIT(2)
+#define TRSW1EN						BIT(3)
+#define EROM_EN						BIT(4)
+#define EnBT							BIT(5)
+#define EnUart						BIT(8)
+#define Uart_910						BIT(9)
+#define EnPMAC						BIT(10)
+#define SIC_SWRST					BIT(11)
+#define EnSIC						BIT(12)
+#define SIC_23						BIT(13)
+#define EnHDP						BIT(14)
+#define SIC_LBK						BIT(15)
+
+//2 GPIO_PIN_CTRL
+
+
+
+//2 GPIO_INTM
+
+//2 LEDCFG
+#define LED0PL 					BIT(4)  
+#define LED1PL 					BIT(12)
+#define LED0DIS					BIT(7)
+
+#define  SECCAM_CLR				BIT(30)
+
+//2 FSIMR
+
+//2 FSISR
+
+
+//2 8051FWDL
+//2 MCUFWDL
+#define MCUFWDL_EN					BIT(0)
+#define MCUFWDL_RDY				BIT(1)
+#define FWDL_ChkSum_rpt			BIT(2)
+#define MACINI_RDY					BIT(3)
+#define BBINI_RDY					BIT(4)
+#define RFINI_RDY					BIT(5)
+#define WINTINI_RDY					BIT(6)
+#define MAC1_WINTINI_RDY			BIT(11)// 0X81 BIT3
+#define CPRST						BIT(23)
+
+
+
+
+//2 REG_SYS_CFG
+#define XCLK_VLD						BIT(0)
+#define ACLK_VLD					BIT(1)
+#define UCLK_VLD					BIT(2)
+#define PCLK_VLD						BIT(3)
+#define PCIRSTB						BIT(4)
+#define V15_VLD						BIT(5)
+#define TRP_B15V_EN					BIT(7)
+#define SIC_IDLE						BIT(8)
+#define BD_MAC2						BIT(9)
+#define BD_MAC1						BIT(10)
+#define IC_MACPHY_MODE				BIT(11)
+#define PAD_HWPD_IDN				BIT(22)
+#define TRP_VAUX_EN					BIT(23)
+#define TRP_BT_EN					BIT(24)
+#define BD_PKG_SEL					BIT(25)
+#define BD_HCI_SEL					BIT(26)
+#define TYPE_ID						BIT(27)
+
+#define CHIP_VER_RTL_MASK			0xF000	//Bit 12 ~ 15
+#define CHIP_VER_RTL_SHIFT			12
+
+//-----------------------------------------------------
+//
+//	0x0100h ~ 0x01FFh	MACTOP General Configuration
+//
+//-----------------------------------------------------
+
+
+//2 Function Enable Registers
+//2 CR
+
+#define REG_LBMODE					(REG_CR + 3)
+
+
+#define HCI_TXDMA_EN				BIT(0)
+#define HCI_RXDMA_EN				BIT(1)
+#define TXDMA_EN					BIT(2)
+#define RXDMA_EN					BIT(3)
+#define PROTOCOL_EN					BIT(4)
+#define SCHEDULE_EN					BIT(5)
+#define MACTXEN						BIT(6)
+#define MACRXEN						BIT(7)
+#define ENSWBCN						BIT(8)
+#define ENSEC						BIT(9)
+
+// Network type
+#define _NETTYPE(x)					(((x) & 0x3) << 16)
+#define MASK_NETTYPE				0x30000
+#define NT_NO_LINK					0x0
+#define NT_LINK_AD_HOC				0x1
+#define NT_LINK_AP					0x2
+#define NT_AS_AP					0x3
+
+#define _LBMODE(x)					(((x) & 0xF) << 24)
+#define MASK_LBMODE				0xF000000
+#define LOOPBACK_NORMAL			0x0
+#define LOOPBACK_IMMEDIATELY		0xB
+#define LOOPBACK_MAC_DELAY		0x3
+#define LOOPBACK_PHY				0x1
+#define LOOPBACK_DMA				0x7
+
+
+//2 PBP - Page Size Register
+#define GET_RX_PAGE_SIZE(value)		((value) & 0xF)
+#define GET_TX_PAGE_SIZE(value)		(((value) & 0xF0) >> 4)
+#define _PSRX_MASK					0xF
+#define _PSTX_MASK					0xF0
+#define _PSRX(x)						(x)
+#define _PSTX(x)						((x) << 4)
+
+#define PBP_64						0x0
+#define PBP_128						0x1
+#define PBP_256						0x2
+#define PBP_512						0x3
+#define PBP_1024					0x4
+
+
+//2 TX/RXDMA
+#define RXDMA_ARBBW_EN			BIT(0)
+#define RXSHFT_EN					BIT(1)
+#define RXDMA_AGG_EN				BIT(2)
+#define QS_VO_QUEUE				BIT(8)
+#define QS_VI_QUEUE					BIT(9)
+#define QS_BE_QUEUE				BIT(10)
+#define QS_BK_QUEUE				BIT(11)
+#define QS_MANAGER_QUEUE			BIT(12)
+#define QS_HIGH_QUEUE				BIT(13)
+
+#define HQSEL_VOQ					BIT(0)
+#define HQSEL_VIQ					BIT(1)
+#define HQSEL_BEQ					BIT(2)
+#define HQSEL_BKQ					BIT(3)
+#define HQSEL_MGTQ					BIT(4)
+#define HQSEL_HIQ					BIT(5)
+
+// For normal driver, 0x10C
+#define _TXDMA_HIQ_MAP(x) 	 		(((x)&0x3) << 14)
+#define _TXDMA_MGQ_MAP(x) 	 		(((x)&0x3) << 12)
+#define _TXDMA_BKQ_MAP(x) 	 		(((x)&0x3) << 10)		
+#define _TXDMA_BEQ_MAP(x) 	 		(((x)&0x3) << 8 )
+#define _TXDMA_VIQ_MAP(x) 	 		(((x)&0x3) << 6 )
+#define _TXDMA_VOQ_MAP(x) 	 		(((x)&0x3) << 4 )
+
+#define QUEUE_LOW					1
+#define QUEUE_NORMAL				2
+#define QUEUE_HIGH					3
+
+
+
+//2 TRXFF_BNDY
+
+
+//2 LLT_INIT
+#define _LLT_NO_ACTIVE				0x0
+#define _LLT_WRITE_ACCESS			0x1
+#define _LLT_READ_ACCESS			0x2
+
+#define _LLT_INIT_DATA(x)			((x) & 0xFF)
+#define _LLT_INIT_ADDR(x)			(((x) & 0xFF) << 8)
+#define _LLT_OP(x)					(((x) & 0x3) << 30)
+#define _LLT_OP_VALUE(x)			(((x) >> 30) & 0x3)
+
+
+//2 BB_ACCESS_CTRL
+#define BB_WRITE_READ_MASK		(BIT(31) | BIT(30))
+#define BB_WRITE_EN					BIT(30)
+#define BB_READ_EN					BIT(31)
+//#define BB_ADDR_MASK				0xFFF
+//#define _BB_ADDR(x)					((x) & BB_ADDR_MASK)
+
+//-----------------------------------------------------
+//
+//	0x0200h ~ 0x027Fh	TXDMA Configuration
+//
+//-----------------------------------------------------
+//2 RQPN
+#define _HPQ(x)						((x) & 0xFF)
+#define _LPQ(x)						(((x) & 0xFF) << 8)
+#define _PUBQ(x)						(((x) & 0xFF) << 16)
+#define _NPQ(x)						((x) & 0xFF)			// NOTE: in RQPN_NPQ register
+
+
+#define HPQ_PUBLIC_DIS				BIT(24)
+#define LPQ_PUBLIC_DIS				BIT(25)
+#define LD_RQPN						BIT(31)
+
+
+//2 TDECTRL
+#define BCN_VALID					BIT(16)
+#define BCN_HEAD(x)					(((x) & 0xFF) << 8)
+#define	BCN_HEAD_MASK				0xFF00
+
+//2 TDECTL
+#define BLK_DESC_NUM_SHIFT			4
+#define BLK_DESC_NUM_MASK			0xF
+
+
+//2 TXDMA_OFFSET_CHK
+#define DROP_DATA_EN				BIT(9)
+
+//-----------------------------------------------------
+//
+//	0x0400h ~ 0x047Fh	Protocol Configuration
+//
+//-----------------------------------------------------
+//2 FWHW_TXQ_CTRL
+#define EN_AMPDU_RTY_NEW			BIT(7)
+
+//2 INIRTSMCS_SEL
+#define _INIRTSMCS_SEL(x)			((x) & 0x3F)
+
+
+//2 SPEC SIFS
+#define _SPEC_SIFS_CCK(x)			((x) & 0xFF)
+#define _SPEC_SIFS_OFDM(x)			(((x) & 0xFF) << 8)
+
+
+//2 RRSR
+
+#define RATE_REG_BITMAP_ALL			0xFFFFF
+
+#define _RRSC_BITMAP(x)					((x) & 0xFFFFF)
+
+#define _RRSR_RSC(x)						(((x) & 0x3) << 21)
+#define RRSR_RSC_RESERVED				0x0
+#define RRSR_RSC_UPPER_SUBCHANNEL	0x1
+#define RRSR_RSC_LOWER_SUBCHANNEL	0x2
+#define RRSR_RSC_DUPLICATE_MODE		0x3
+
+
+//2 ARFR
+#define USE_SHORT_G1				BIT(20)
+
+//2 AGGLEN_LMT_L
+#define _AGGLMT_MCS0(x)				((x) & 0xF)
+#define _AGGLMT_MCS1(x)				(((x) & 0xF) << 4)
+#define _AGGLMT_MCS2(x)				(((x) & 0xF) << 8)
+#define _AGGLMT_MCS3(x)				(((x) & 0xF) << 12)
+#define _AGGLMT_MCS4(x)				(((x) & 0xF) << 16)
+#define _AGGLMT_MCS5(x)				(((x) & 0xF) << 20)
+#define _AGGLMT_MCS6(x)				(((x) & 0xF) << 24)
+#define _AGGLMT_MCS7(x)				(((x) & 0xF) << 28)
+
+
+//2 RL
+#define	RETRY_LIMIT_SHORT_SHIFT		8
+#define	RETRY_LIMIT_LONG_SHIFT		0
+
+
+//2 DARFRC
+#define _DARF_RC1(x)				((x) & 0x1F)
+#define _DARF_RC2(x)				(((x) & 0x1F) << 8)
+#define _DARF_RC3(x)				(((x) & 0x1F) << 16)
+#define _DARF_RC4(x)				(((x) & 0x1F) << 24)
+// NOTE: shift starting from address (DARFRC + 4)
+#define _DARF_RC5(x)				((x) & 0x1F)
+#define _DARF_RC6(x)				(((x) & 0x1F) << 8)
+#define _DARF_RC7(x)				(((x) & 0x1F) << 16)
+#define _DARF_RC8(x)				(((x) & 0x1F) << 24)
+
+
+//2 RARFRC
+#define _RARF_RC1(x)				((x) & 0x1F)
+#define _RARF_RC2(x)				(((x) & 0x1F) << 8)
+#define _RARF_RC3(x)				(((x) & 0x1F) << 16)
+#define _RARF_RC4(x)				(((x) & 0x1F) << 24)
+// NOTE: shift starting from address (RARFRC + 4)
+#define _RARF_RC5(x)				((x) & 0x1F)
+#define _RARF_RC6(x)				(((x) & 0x1F) << 8)
+#define _RARF_RC7(x)				(((x) & 0x1F) << 16)
+#define _RARF_RC8(x)				(((x) & 0x1F) << 24)
+
+
+
+
+//-----------------------------------------------------
+//
+//	0x0500h ~ 0x05FFh	EDCA Configuration
+//
+//-----------------------------------------------------
+
+
+
+//2 EDCA setting
+#define AC_PARAM_TXOP_LIMIT_OFFSET	16
+#define AC_PARAM_ECW_MAX_OFFSET		12
+#define AC_PARAM_ECW_MIN_OFFSET		8
+#define AC_PARAM_AIFS_OFFSET			0
+
+
+//2 EDCA_VO_PARAM
+#define _AIFS(x)						(x)
+#define _ECW_MAX_MIN(x)			((x) << 8)
+#define _TXOP_LIMIT(x)				((x) << 16)
+
+
+#define _BCNIFS(x)					((x) & 0xFF)
+#define _BCNECW(x)					(((x) & 0xF))<< 8)
+
+
+#define _LRL(x)						((x) & 0x3F)
+#define _SRL(x)						(((x) & 0x3F) << 8)
+
+
+//2 SIFS_CCK
+#define _SIFS_CCK_CTX(x)			((x) & 0xFF)
+#define _SIFS_CCK_TRX(x)			(((x) & 0xFF) << 8);
+
+
+//2 SIFS_OFDM
+#define _SIFS_OFDM_CTX(x)			((x) & 0xFF)
+#define _SIFS_OFDM_TRX(x)			(((x) & 0xFF) << 8);
+
+
+//2 TBTT PROHIBIT
+#define _TBTT_PROHIBIT_HOLD(x)		(((x) & 0xFF) << 8)
+
+
+//2 REG_RD_CTRL
+#define DIS_EDCA_CNT_DWN			BIT(11)
+
+
+//2 BCN_CTRL
+#define EN_MBSSID						BIT(1)
+#define EN_TXBCN_RPT					BIT(2)
+#define EN_BCN_FUNCTION				BIT(3)
+
+// The same function but different bit field.
+#define DIS_TSF_UDT0_NORMAL_CHIP		BIT(4)
+#define DIS_TSF_UDT0_TEST_CHIP		BIT(5)
+
+//2 ACMHWCTRL
+#define	AcmHw_HwEn					BIT(0)
+#define	AcmHw_BeqEn					BIT(1)
+#define	AcmHw_ViqEn					BIT(2)
+#define	AcmHw_VoqEn					BIT(3)
+#define	AcmHw_BeqStatus				BIT(4)
+#define	AcmHw_ViqStatus				BIT(5)
+#define	AcmHw_VoqStatus				BIT(6)
+
+
+
+//-----------------------------------------------------
+//
+//	0x0600h ~ 0x07FFh	WMAC Configuration
+//
+//-----------------------------------------------------
+
+//2 APSD_CTRL
+#define APSDOFF						BIT(6)
+#define APSDOFF_STATUS				BIT(7)
+
+
+//2 BWOPMODE
+#define BW_20MHZ					BIT(2)
+//#define BW_OPMODE_20MHZ				BIT(2)	// For compability
+
+
+#define RATE_BITMAP_ALL			0xFFFFF
+
+// Only use CCK 1M rate for ACK
+#define RATE_RRSR_CCK_ONLY_1M		0xFFFF1
+#define RATE_RRSR_WITHOUT_CCK		0xFFFF0
+
+//2 TCR
+#define TSFRST						BIT(0)
+#define DIS_GCLK						BIT(1)
+#define PAD_SEL						BIT(2)
+#define PWR_ST						BIT(6)
+#define PWRBIT_OW_EN				BIT(7)
+#define ACRC							BIT(8)
+#define CFENDFORM					BIT(9)
+#define ICV							BIT(10)
+
+
+
+//2 RCR
+#define AAP							BIT(0)
+#define APM							BIT(1)
+#define AM							BIT(2)
+#define AB							BIT(3)
+#define ADD3							BIT(4)
+#define APWRMGT					BIT(5)
+#define CBSSID						BIT(6)
+#define CBSSID_BCN					BIT(7)
+#define ACRC32						BIT(8)
+#define AICV							BIT(9)
+#define ADF							BIT(11)
+#define ACF							BIT(12)
+#define AMF							BIT(13)
+#define HTC_LOC_CTRL				BIT(14)
+#define UC_DATA_EN					BIT(16)
+#define BM_DATA_EN					BIT(17)
+#define MFBEN						BIT(22)
+#define LSIGEN						BIT(23)
+#define EnMBID						BIT(24)
+#define APP_BASSN					BIT(27)
+#define APP_PHYSTS					BIT(28)
+#define APP_ICV						BIT(29)
+#define APP_MIC						BIT(30)
+#define APP_FCS						BIT(31)
+
+//2 RX_PKT_LIMIT
+
+//2 RX_DLK_TIME
+
+//2 MBIDCAMCFG
+
+
+
+//2 AMPDU_MIN_SPACE
+#define _MIN_SPACE(x)				((x) & 0x7)
+#define _SHORT_GI_PADDING(x)		(((x) & 0x1F) << 3)
+
+
+//2 RXERR_RPT
+#define RXERR_TYPE_OFDM_PPDU			0
+#define RXERR_TYPE_OFDM_FALSE_ALARM	1
+#define RXERR_TYPE_OFDM_MPDU_OK		2
+#define RXERR_TYPE_OFDM_MPDU_FAIL	3
+#define RXERR_TYPE_CCK_PPDU			4
+#define RXERR_TYPE_CCK_FALSE_ALARM	5
+#define RXERR_TYPE_CCK_MPDU_OK		6
+#define RXERR_TYPE_CCK_MPDU_FAIL		7
+#define RXERR_TYPE_HT_PPDU				8
+#define RXERR_TYPE_HT_FALSE_ALARM	9
+#define RXERR_TYPE_HT_MPDU_TOTAL		10
+#define RXERR_TYPE_HT_MPDU_OK			11
+#define RXERR_TYPE_HT_MPDU_FAIL		12
+#define RXERR_TYPE_RX_FULL_DROP		15
+
+#define RXERR_COUNTER_MASK			0xFFFFF
+#define RXERR_RPT_RST					BIT(27)
+#define _RXERR_RPT_SEL(type)			((type) << 28)
+
+
+//2 SECCFG
+#define	SCR_TxUseDK					BIT(0)			//Force Tx Use Default Key
+#define	SCR_RxUseDK					BIT(1)			//Force Rx Use Default Key
+#define	SCR_TxEncEnable				BIT(2)			//Enable Tx Encryption
+#define	SCR_RxDecEnable				BIT(3)			//Enable Rx Decryption
+#define	SCR_SKByA2						BIT(4)			//Search kEY BY A2
+#define	SCR_NoSKMC						BIT(5)			//No Key Search Multicast
+#define 	SCR_TXBCUSEDK					BIT(6)			// Force Tx Broadcast packets Use Default Key
+#define 	SCR_RXBCUSEDK					BIT(7)			// Force Rx Broadcast packets Use Default Key
+
+//vivi added for new cam search flow, 20091028
+#ifdef HW_EN_DE_CRYPTION_FOR_NEW_CAM_SEARCH_FLOW
+#define	SCR_TxUseBroadcastDK			BIT6			//Force Tx Use Broadcast Default Key
+#define	SCR_RxUseBroadcastDK			BIT7			//Force Rx Use Broadcast Default Key
+#endif
+
+
+//-----------------------------------------------------
+//
+//	0xFE00h ~ 0xFE55h	USB Configuration
+//
+//-----------------------------------------------------
+
+//2 USB Information (0xFE17)
+#define USB_IS_HIGH_SPEED				0
+#define USB_IS_FULL_SPEED				1
+#define USB_SPEED_MASK					BIT(5)
+
+#define USB_NORMAL_SIE_EP_MASK		0xF
+#define USB_NORMAL_SIE_EP_SHIFT		4
+
+#define USB_TEST_EP_MASK				0x30
+#define USB_TEST_EP_SHIFT				4
+
+//2 Special Option
+#define USB_AGG_EN						BIT(3)
+
+
+//2REG_C2HEVT_CLEAR
+#define C2H_EVT_HOST_CLOSE				0x00	// Set by driver and notify FW that the driver has read the C2H command message
+#define C2H_EVT_FW_CLOSE				0xFF	// Set by FW indicating that FW had set the C2H command message and it's not yet read by driver.
+
+//2 8192D PartNo.
+#define		PARTNO_92D_NIC			(BIT7|BIT6)
+#define		PARTNO_92D_NIC_REMARK (BIT5|BIT4)
+#define		PARTNO_SINGLE_BAND_VS  BIT3
+#define		PARTNO_SINGLE_BAND_VS_REMARK BIT1
+#define		PARTNO_CONCURRENT_BAND_VC (BIT3|BIT2)
+#define		PARTNO_CONCURRENT_BAND_VC_REMARK (BIT1|BIT0)
+//========================================================
+// General definitions
+//========================================================
+
+#define MAC_ADDR_LEN						6
+#define LAST_ENTRY_OF_TX_PKT_BUFFER		255
+#define LAST_ENTRY_OF_TX_PKT_BUFFER_DUAL_MAC	127
+
+#define POLLING_LLT_THRESHOLD				20
+#define POLLING_READY_TIMEOUT_COUNT		1000
+
+// Min Spacing related settings.
+#define	MAX_MSS_DENSITY_2T				0x13
+#define	MAX_MSS_DENSITY_1T				0x0A
+// GPIO BIT
+#define	HAL_8192C_HW_GPIO_WPS_BIT		BIT2
+
+
+#include "basic_types.h"
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192d_xmit.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192d_xmit.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtl8192d_xmit.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtl8192d_xmit.h	2017-09-23 03:42:50.046674979 +0800
@@ -0,0 +1,106 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef _RTL8192D_XMIT_H_
+#define _RTL8192D_XMIT_H_
+
+#define VO_QUEUE_INX		0
+#define VI_QUEUE_INX		1
+#define BE_QUEUE_INX		2
+#define BK_QUEUE_INX		3
+#define BCN_QUEUE_INX		4
+#define MGT_QUEUE_INX		5
+#define HIGH_QUEUE_INX		6
+#define TXCMD_QUEUE_INX	7
+
+#define HW_QUEUE_ENTRY	8
+
+//
+// Queue Select Value in TxDesc
+//
+#define QSLT_BK							0x2//0x01
+#define QSLT_BE							0x0
+#define QSLT_VI							0x5//0x4
+#define QSLT_VO							0x7//0x6
+#define QSLT_BEACON						0x10
+#define QSLT_HIGH						0x11
+#define QSLT_MGNT						0x12
+#define QSLT_CMD						0x13
+
+//Because we open EM for normal case, we just always insert 2*8 bytes.by wl
+#define USB_92D_DUMMY_OFFSET		2
+#define USB_92D_DUMMY_LENGTH		(USB_92D_DUMMY_OFFSET * PACKET_OFFSET_SZ)
+#define USB_HWDESC_HEADER_LEN	(TXDESC_SIZE + USB_92D_DUMMY_LENGTH)
+
+//For 92D early mode
+#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value)
+#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value)
+#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value)
+#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value)
+#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value)
+#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value)
+#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value)
+
+#ifdef CONFIG_USB_HCI
+
+#ifdef CONFIG_USB_TX_AGGREGATION
+#define MAX_TX_AGG_PACKET_NUMBER 0xFF
+#endif
+
+s32	rtl8192du_init_xmit_priv(_adapter * padapter);
+
+void	rtl8192du_free_xmit_priv(_adapter * padapter);
+
+void rtl8192du_cal_txdesc_chksum(struct tx_desc	*ptxdesc);
+
+s32 rtl8192du_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
+
+void rtl8192du_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe);
+
+s32 rtl8192du_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe);
+
+#ifdef CONFIG_HOSTAPD_MLME
+s32	rtl8192du_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt);
+#endif
+
+#endif
+
+#ifdef CONFIG_PCI_HCI
+s32	rtl8192de_init_xmit_priv(_adapter * padapter);
+void	rtl8192de_free_xmit_priv(_adapter * padapter);
+
+s32	rtl8192de_enqueue_xmitbuf(struct rtw_tx_ring *ring, struct xmit_buf *pxmitbuf);
+struct xmit_buf *rtl8192de_dequeue_xmitbuf(struct rtw_tx_ring *ring);
+
+void	rtl8192de_xmitframe_resume(_adapter *padapter);
+
+void	rtl8192de_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe);
+
+s32	rtl8192de_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe);
+
+#ifdef CONFIG_HOSTAPD_MLME
+s32	rtl8192de_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt);
+#endif
+
+#endif
+
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_br_ext.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_br_ext.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_br_ext.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_br_ext.h	2017-09-23 03:42:50.046674979 +0800
@@ -0,0 +1,76 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef _RTW_BR_EXT_H_
+#define _RTW_BR_EXT_H_
+
+#if 1	// rtw_wifi_driver
+#define CL_IPV6_PASS    	1
+#define MACADDRLEN		6
+#define _DEBUG_ERR		printk
+#define _DEBUG_INFO		//printk
+#define DEBUG_WARN		printk
+#define DEBUG_INFO		//printk
+#define DEBUG_ERR		printk
+//#define GET_MY_HWADDR		((GET_MIB(priv))->dot11OperationEntry.hwaddr)
+#define GET_MY_HWADDR(padapter)		((padapter)->eeprompriv.mac_addr)
+#endif	// rtw_wifi_driver
+
+#define NAT25_HASH_BITS		4
+#define NAT25_HASH_SIZE		(1 << NAT25_HASH_BITS)
+#define NAT25_AGEING_TIME	300
+
+#ifdef CL_IPV6_PASS
+#define MAX_NETWORK_ADDR_LEN	17
+#else
+#define MAX_NETWORK_ADDR_LEN	11
+#endif
+
+struct nat25_network_db_entry
+{
+	struct nat25_network_db_entry	*next_hash;
+	struct nat25_network_db_entry	**pprev_hash;
+	atomic_t						use_count;
+	unsigned char					macAddr[6];
+	unsigned long					ageing_timer;
+	unsigned char    				networkAddr[MAX_NETWORK_ADDR_LEN];
+};
+
+enum NAT25_METHOD {
+	NAT25_MIN,
+	NAT25_CHECK,
+	NAT25_INSERT,
+	NAT25_LOOKUP,
+	NAT25_PARSE,
+	NAT25_MAX
+};
+
+struct br_ext_info {
+	unsigned int	nat25_disable;
+	unsigned int	macclone_enable;
+	unsigned int	dhcp_bcst_disable;
+	int		addPPPoETag;		// 1: Add PPPoE relay-SID, 0: disable
+	unsigned char	nat25_dmzMac[MACADDRLEN];
+	unsigned int	nat25sc_disable;
+};
+
+void nat25_db_cleanup(_adapter *priv);
+
+#endif // _RTW_BR_EXT_H_
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_byteorder.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_byteorder.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_byteorder.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_byteorder.h	2017-09-23 03:42:50.046674979 +0800
@@ -0,0 +1,41 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef _RTL871X_BYTEORDER_H_
+#define _RTL871X_BYTEORDER_H_
+
+#include <drv_conf.h>
+
+#if defined (CONFIG_LITTLE_ENDIAN) && defined (CONFIG_BIG_ENDIAN)
+#error "Shall be CONFIG_LITTLE_ENDIAN or CONFIG_BIG_ENDIAN, but not both!\n"
+#endif
+
+#if defined (CONFIG_LITTLE_ENDIAN)
+#ifndef CONFIG_PLATFORM_MSTAR389
+#  include <byteorder/little_endian.h>
+#endif
+#elif defined (CONFIG_BIG_ENDIAN)
+#  include <byteorder/big_endian.h>
+#else
+#  error "Must be LITTLE/BIG Endian Host"
+#endif
+
+#endif /* _RTL871X_BYTEORDER_H_ */
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_cmd.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_cmd.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_cmd.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_cmd.h	2017-09-23 03:42:50.046674979 +0800
@@ -0,0 +1,1122 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef __RTW_CMD_H_
+#define __RTW_CMD_H_
+
+#include <drv_conf.h>
+#include <wlan_bssdef.h>
+#include <rtw_rf.h>
+#include <rtw_led.h>
+
+#define C2H_MEM_SZ (16*1024)
+
+#ifndef CONFIG_RTL8711FW
+
+	#include <osdep_service.h>
+	#include <ieee80211.h> // <ieee80211/ieee80211.h>
+
+
+	#define FREE_CMDOBJ_SZ	128
+	
+	#define MAX_CMDSZ	1024
+	#define MAX_RSPSZ	512
+	#define MAX_EVTSZ	1024
+
+#ifdef PLATFORM_OS_CE
+	#define CMDBUFF_ALIGN_SZ 4
+#else
+	#define CMDBUFF_ALIGN_SZ 512
+#endif
+
+	struct cmd_obj {
+		u16	cmdcode;
+		u8	res;
+		u8	*parmbuf;
+		u32	cmdsz;
+		u8	*rsp;
+		u32	rspsz;
+		//_sema 	cmd_sem;
+		_list	list;
+	};
+
+	struct cmd_priv {
+		_sema	cmd_queue_sema;
+		//_sema	cmd_done_sema;
+		_sema	terminate_cmdthread_sema;		
+		_queue	cmd_queue;
+		u8	cmd_seq;
+		u8	*cmd_buf;	//shall be non-paged, and 4 bytes aligned
+		u8	*cmd_allocated_buf;
+		u8	*rsp_buf;	//shall be non-paged, and 4 bytes aligned		
+		u8	*rsp_allocated_buf;
+		u32	cmd_issued_cnt;
+		u32	cmd_done_cnt;
+		u32	rsp_cnt;
+		u8 cmdthd_running;
+		_adapter *padapter;
+	};
+
+#ifdef CONFIG_EVENT_THREAD_MODE
+	struct evt_obj {
+		u16	evtcode;
+		u8	res;
+		u8	*parmbuf;
+		u32	evtsz;		
+		_list	list;
+	};
+#endif
+
+	struct	evt_priv {
+#ifdef CONFIG_EVENT_THREAD_MODE
+		_sema	evt_notify;
+		_sema	terminate_evtthread_sema;
+		_queue	evt_queue;
+#endif		
+		
+#ifdef CONFIG_H2CLBK
+		_sema	lbkevt_done;
+		u8	lbkevt_limit;
+		u8	lbkevt_num;
+		u8	*cmdevt_parm;		
+#endif
+		ATOMIC_T event_seq;
+		u8	*evt_buf;	//shall be non-paged, and 4 bytes aligned		
+		u8	*evt_allocated_buf;
+		u32	evt_done_cnt;
+#ifdef CONFIG_SDIO_HCI
+		u8	*c2h_mem;
+		u8	*allocated_c2h_mem;
+#ifdef PLATFORM_OS_XP
+		PMDL	pc2h_mdl;
+#endif
+#endif
+
+	};
+
+#define init_h2fwcmd_w_parm_no_rsp(pcmd, pparm, code) \
+do {\
+	_rtw_init_listhead(&pcmd->list);\
+	pcmd->cmdcode = code;\
+	pcmd->parmbuf = (u8 *)(pparm);\
+	pcmd->cmdsz = sizeof (*pparm);\
+	pcmd->rsp = NULL;\
+	pcmd->rspsz = 0;\
+} while(0)
+
+extern u32 rtw_enqueue_cmd(struct cmd_priv *pcmdpriv, struct cmd_obj *obj);
+extern struct cmd_obj *rtw_dequeue_cmd(struct cmd_priv *pcmdpriv);
+extern void rtw_free_cmd_obj(struct cmd_obj *pcmd);
+
+#ifdef CONFIG_EVENT_THREAD_MODE
+extern u32 rtw_enqueue_evt(struct evt_priv *pevtpriv, struct evt_obj *obj);
+extern struct evt_obj *rtw_dequeue_evt(_queue *queue);
+extern void rtw_free_evt_obj(struct evt_obj *pcmd);
+#endif
+
+thread_return rtw_cmd_thread(thread_context context);
+
+extern u32 rtw_init_cmd_priv (struct cmd_priv *pcmdpriv);
+extern void rtw_free_cmd_priv (struct cmd_priv *pcmdpriv);
+
+extern u32 rtw_init_evt_priv (struct evt_priv *pevtpriv);
+extern void rtw_free_evt_priv (struct evt_priv *pevtpriv);
+extern void rtw_cmd_clr_isr(struct cmd_priv *pcmdpriv);
+extern void rtw_evt_notify_isr(struct evt_priv *pevtpriv);
+#ifdef CONFIG_P2P
+u8 p2p_protocol_wk_cmd(_adapter*padapter, int intCmdType );
+#endif //CONFIG_P2P
+
+#else
+	#include <ieee80211.h>
+#endif	/* CONFIG_RTL8711FW */
+
+enum rtw_drvextra_cmd_id
+{	
+	NONE_WK_CID,
+	DYNAMIC_CHK_WK_CID,
+	DM_CTRL_WK_CID,
+	PBC_POLLING_WK_CID,
+	POWER_SAVING_CTRL_WK_CID,//IPS,AUTOSuspend
+	LPS_CTRL_WK_CID,
+	ANT_SELECT_WK_CID,
+	P2P_PS_WK_CID,
+	P2P_PROTO_WK_CID,
+	CHECK_HIQ_WK_CID,//for softap mode, check hi queue if empty
+	MAX_WK_CID
+};
+
+enum LPS_CTRL_TYPE
+{
+	LPS_CTRL_SCAN=0,
+	LPS_CTRL_JOINBSS=1,
+	LPS_CTRL_CONNECT=2,
+	LPS_CTRL_DISCONNECT=3,
+	LPS_CTRL_SPECIAL_PACKET=4,
+};
+
+enum RFINTFS {
+	SWSI,
+	HWSI,
+	HWPI,
+};
+
+/*
+Caller Mode: Infra, Ad-HoC(C)
+
+Notes: To enter USB suspend mode
+
+Command Mode
+
+*/
+struct usb_suspend_parm {
+	u32 action;// 1: sleep, 0:resume
+};
+
+/*
+Caller Mode: Infra, Ad-HoC
+
+Notes: To join a known BSS.
+
+Command-Event Mode
+
+*/
+
+/*
+Caller Mode: Infra, Ad-Hoc
+
+Notes: To join the specified bss
+
+Command Event Mode
+
+*/
+struct joinbss_parm {
+	WLAN_BSSID_EX network;
+};
+
+/*
+Caller Mode: Infra, Ad-HoC(C)
+
+Notes: To disconnect the current associated BSS
+
+Command Mode
+
+*/
+struct disconnect_parm {
+	u32 rsvd;
+};
+
+/*
+Caller Mode: AP, Ad-HoC(M)
+
+Notes: To create a BSS
+
+Command Mode
+*/
+struct createbss_parm {
+	WLAN_BSSID_EX network;
+};
+
+/*
+Caller Mode: AP, Ad-HoC, Infra
+
+Notes: To set the NIC mode of RTL8711
+
+Command Mode
+
+The definition of mode:
+
+#define IW_MODE_AUTO	0	// Let the driver decides which AP to join
+#define IW_MODE_ADHOC	1	// Single cell network (Ad-Hoc Clients)
+#define IW_MODE_INFRA	2	// Multi cell network, roaming, ..
+#define IW_MODE_MASTER	3	// Synchronisation master or Access Point
+#define IW_MODE_REPEAT	4	// Wireless Repeater (forwarder)
+#define IW_MODE_SECOND	5	// Secondary master/repeater (backup)
+#define IW_MODE_MONITOR	6	// Passive monitor (listen only)
+
+*/
+struct	setopmode_parm {
+	u8	mode;
+	u8	rsvd[3];
+};
+
+/*
+Caller Mode: AP, Ad-HoC, Infra
+
+Notes: To ask RTL8711 performing site-survey
+
+Command-Event Mode 
+
+*/
+
+#define RTW_SSID_SCAN_AMOUNT 9 // for WEXT_CSCAN_AMOUNT 9
+struct sitesurvey_parm {
+	sint scan_mode;	//active: 1, passive: 0 
+	sint bsslimit;	// 1 ~ 48
+	// for up to 9 probreq with specific ssid
+	NDIS_802_11_SSID ssid[RTW_SSID_SCAN_AMOUNT];
+};
+
+/*
+Caller Mode: Any
+
+Notes: To set the auth type of RTL8711. open/shared/802.1x
+
+Command Mode
+
+*/
+struct setauth_parm {
+	u8 mode;  //0: legacy open, 1: legacy shared 2: 802.1x
+	u8 _1x;   //0: PSK, 1: TLS
+	u8 rsvd[2];
+};
+
+/*
+Caller Mode: Infra
+
+a. algorithm: wep40, wep104, tkip & aes
+b. keytype: grp key/unicast key
+c. key contents
+
+when shared key ==> keyid is the camid
+when 802.1x ==> keyid [0:1] ==> grp key
+when 802.1x ==> keyid > 2 ==> unicast key
+
+*/
+struct setkey_parm {
+	u8	algorithm;	// encryption algorithm, could be none, wep40, TKIP, CCMP, wep104
+	u8	keyid;		
+	u8 	grpkey;		// 1: this is the grpkey for 802.1x. 0: this is the unicast key for 802.1x
+	u8 	set_tx;		// 1: main tx key for wep. 0: other key.
+	u8	key[16];	// this could be 40 or 104
+};
+
+/*
+When in AP or Ad-Hoc mode, this is used to 
+allocate an sw/hw entry for a newly associated sta.
+
+Command
+
+when shared key ==> algorithm/keyid 
+
+*/
+struct set_stakey_parm {
+	u8	addr[ETH_ALEN];
+	u8	algorithm;
+	u8	key[16];
+};
+
+struct set_stakey_rsp {
+	u8	addr[ETH_ALEN];
+	u8	keyid;
+	u8	rsvd;
+};
+
+/*
+Caller Ad-Hoc/AP
+
+Command -Rsp(AID == CAMID) mode
+
+This is to force fw to add an sta_data entry per driver's request.
+
+FW will write an cam entry associated with it.
+
+*/
+struct set_assocsta_parm {
+	u8	addr[ETH_ALEN];
+};
+
+struct set_assocsta_rsp {
+	u8	cam_id;
+	u8	rsvd[3];
+};
+
+/*
+	Caller Ad-Hoc/AP
+	
+	Command mode
+	
+	This is to force fw to del an sta_data entry per driver's request
+	
+	FW will invalidate the cam entry associated with it.
+
+*/
+struct del_assocsta_parm {
+	u8  	addr[ETH_ALEN];
+};
+
+/*
+Caller Mode: AP/Ad-HoC(M)
+
+Notes: To notify fw that given staid has changed its power state
+
+Command Mode
+
+*/
+struct setstapwrstate_parm {
+	u8	staid;
+	u8	status;
+	u8	hwaddr[6];
+};
+
+/*
+Caller Mode: Any
+
+Notes: To setup the basic rate of RTL8711
+
+Command Mode
+
+*/
+struct	setbasicrate_parm {
+	u8	basicrates[NumRates];
+};
+
+/*
+Caller Mode: Any
+
+Notes: To read the current basic rate
+
+Command-Rsp Mode
+
+*/
+struct getbasicrate_parm {
+	u32 rsvd;
+};
+
+struct getbasicrate_rsp {
+	u8 basicrates[NumRates];
+};
+
+/*
+Caller Mode: Any
+
+Notes: To setup the data rate of RTL8711
+
+Command Mode
+
+*/
+struct setdatarate_parm {
+#ifdef MP_FIRMWARE_OFFLOAD
+	u32	curr_rateidx;
+#else
+	u8	mac_id;
+	u8	datarates[NumRates];
+#endif
+};
+
+/*
+Caller Mode: Any
+
+Notes: To read the current data rate
+
+Command-Rsp Mode
+
+*/
+struct getdatarate_parm {
+	u32 rsvd;
+	
+};
+struct getdatarate_rsp {
+	u8 datarates[NumRates];
+};
+
+
+/*
+Caller Mode: Any
+AP: AP can use the info for the contents of beacon frame
+Infra: STA can use the info when sitesurveying
+Ad-HoC(M): Like AP
+Ad-HoC(C): Like STA
+
+
+Notes: To set the phy capability of the NIC
+
+Command Mode
+
+*/
+
+struct	setphyinfo_parm {
+	struct regulatory_class class_sets[NUM_REGULATORYS];
+	u8	status;
+};
+
+struct	getphyinfo_parm {
+	u32 rsvd;
+};
+
+struct	getphyinfo_rsp {
+	struct regulatory_class class_sets[NUM_REGULATORYS];
+	u8	status;
+};
+
+/*
+Caller Mode: Any
+
+Notes: To set the channel/modem/band
+This command will be used when channel/modem/band is changed.
+
+Command Mode
+
+*/
+struct	setphy_parm {
+	u8	rfchannel;
+	u8	modem;
+};
+
+/*
+Caller Mode: Any
+
+Notes: To get the current setting of channel/modem/band
+
+Command-Rsp Mode
+
+*/
+struct	getphy_parm {
+	u32 rsvd;
+
+};
+struct	getphy_rsp {
+	u8	rfchannel;
+	u8	modem;
+};
+
+struct readBB_parm {
+	u8	offset;
+};
+struct readBB_rsp {
+	u8	value;
+};
+
+struct readTSSI_parm {
+	u8	offset;
+};
+struct readTSSI_rsp {
+	u8	value;
+};
+
+struct writeBB_parm {
+	u8	offset;
+	u8	value;
+};
+
+struct readRF_parm {
+	u8	offset;
+};
+struct readRF_rsp {
+	u32	value;
+};
+
+struct writeRF_parm {
+	u32	offset;
+	u32	value;
+};
+
+struct getrfintfs_parm {
+	u8	rfintfs;
+};
+
+
+struct Tx_Beacon_param
+{
+	WLAN_BSSID_EX network;
+};
+
+/*
+	Notes: This command is used for H2C/C2H loopback testing
+
+	mac[0] == 0 
+	==> CMD mode, return H2C_SUCCESS.
+	The following condition must be ture under CMD mode
+		mac[1] == mac[4], mac[2] == mac[3], mac[0]=mac[5]= 0;
+		s0 == 0x1234, s1 == 0xabcd, w0 == 0x78563412, w1 == 0x5aa5def7;
+		s2 == (b1 << 8 | b0);
+	
+	mac[0] == 1
+	==> CMD_RSP mode, return H2C_SUCCESS_RSP
+	
+	The rsp layout shall be:
+	rsp: 			parm:
+		mac[0]  =   mac[5];
+		mac[1]  =   mac[4];
+		mac[2]  =   mac[3];
+		mac[3]  =   mac[2];
+		mac[4]  =   mac[1];
+		mac[5]  =   mac[0];
+		s0		=   s1;
+		s1		=   swap16(s0);
+		w0		=  	swap32(w1);
+		b0		= 	b1
+		s2		= 	s0 + s1
+		b1		= 	b0
+		w1		=	w0
+		
+	mac[0] == 	2
+	==> CMD_EVENT mode, return 	H2C_SUCCESS
+	The event layout shall be:
+	event:			parm:
+		mac[0]  =   mac[5];
+		mac[1]  =   mac[4];
+		mac[2]  =   event's sequence number, starting from 1 to parm's marc[3]
+		mac[3]  =   mac[2];
+		mac[4]  =   mac[1];
+		mac[5]  =   mac[0];
+		s0		=   swap16(s0) - event.mac[2];
+		s1		=   s1 + event.mac[2];
+		w0		=  	swap32(w0);
+		b0		= 	b1
+		s2		= 	s0 + event.mac[2]
+		b1		= 	b0 
+		w1		=	swap32(w1) - event.mac[2];	
+	
+		parm->mac[3] is the total event counts that host requested.
+		
+	
+	event will be the same with the cmd's param.
+		
+*/
+
+#ifdef CONFIG_H2CLBK
+
+struct seth2clbk_parm {
+	u8 mac[6];
+	u16	s0;
+	u16	s1;
+	u32	w0;
+	u8	b0;
+	u16  s2;
+	u8	b1;
+	u32	w1;
+};
+
+struct geth2clbk_parm {
+	u32 rsv;	
+};
+
+struct geth2clbk_rsp {
+	u8	mac[6];
+	u16	s0;
+	u16	s1;
+	u32	w0;
+	u8	b0;
+	u16	s2;
+	u8	b1;
+	u32	w1;
+};
+
+#endif	/* CONFIG_H2CLBK */
+
+// CMD param Formart for driver extra cmd handler
+struct drvextra_cmd_parm {
+	int ec_id; //extra cmd id
+	int type_size; // Can use this field as the type id or command size
+	unsigned char *pbuf;
+};
+
+/*------------------- Below are used for RF/BB tunning ---------------------*/
+
+struct	setantenna_parm {
+	u8	tx_antset;		
+	u8	rx_antset;
+	u8	tx_antenna;		
+	u8	rx_antenna;		
+};
+
+struct	enrateadaptive_parm {
+	u32	en;
+};
+
+struct settxagctbl_parm {
+	u32	txagc[MAX_RATES_LENGTH];
+};
+
+struct gettxagctbl_parm {
+	u32 rsvd;
+};
+struct gettxagctbl_rsp {
+	u32	txagc[MAX_RATES_LENGTH];
+};
+
+struct setagcctrl_parm {
+	u32	agcctrl;		// 0: pure hw, 1: fw
+};
+
+
+struct setssup_parm	{
+	u32	ss_ForceUp[MAX_RATES_LENGTH];
+};
+
+struct getssup_parm	{
+	u32 rsvd;
+};
+struct getssup_rsp	{
+	u8	ss_ForceUp[MAX_RATES_LENGTH];
+};
+
+
+struct setssdlevel_parm	{
+	u8	ss_DLevel[MAX_RATES_LENGTH];
+};
+
+struct getssdlevel_parm	{
+	u32 rsvd;
+};
+struct getssdlevel_rsp	{
+	u8	ss_DLevel[MAX_RATES_LENGTH];
+};
+
+struct setssulevel_parm	{
+	u8	ss_ULevel[MAX_RATES_LENGTH];
+};
+
+struct getssulevel_parm	{
+	u32 rsvd;
+};
+struct getssulevel_rsp	{
+	u8	ss_ULevel[MAX_RATES_LENGTH];
+};
+
+
+struct	setcountjudge_parm {
+	u8	count_judge[MAX_RATES_LENGTH];
+};
+
+struct	getcountjudge_parm {
+	u32 rsvd;
+};
+struct	getcountjudge_rsp {
+	u8	count_judge[MAX_RATES_LENGTH];
+};
+
+
+struct setratable_parm {
+	u8 ss_ForceUp[NumRates];
+	u8 ss_ULevel[NumRates];
+	u8 ss_DLevel[NumRates];
+	u8 count_judge[NumRates];
+};
+
+struct getratable_parm {
+                uint rsvd;
+};
+struct getratable_rsp {
+        u8 ss_ForceUp[NumRates];
+        u8 ss_ULevel[NumRates];
+        u8 ss_DLevel[NumRates];
+        u8 count_judge[NumRates];
+};
+
+
+//to get TX,RX retry count
+struct gettxretrycnt_parm{
+	unsigned int rsvd;
+};
+struct gettxretrycnt_rsp{
+	unsigned long tx_retrycnt;
+};
+
+struct getrxretrycnt_parm{
+	unsigned int rsvd;
+};
+struct getrxretrycnt_rsp{
+	unsigned long rx_retrycnt;
+};
+
+//to get BCNOK,BCNERR count
+struct getbcnokcnt_parm{
+	unsigned int rsvd;
+};
+struct getbcnokcnt_rsp{
+	unsigned long  bcnokcnt;
+};
+
+struct getbcnerrcnt_parm{
+	unsigned int rsvd;
+};
+struct getbcnerrcnt_rsp{
+	unsigned long bcnerrcnt;
+};
+
+// to get current TX power level
+struct getcurtxpwrlevel_parm{
+	unsigned int rsvd;
+};
+struct getcurtxpwrlevel_rsp{
+	unsigned short tx_power;
+};
+
+struct setprobereqextraie_parm {
+	unsigned char e_id;
+	unsigned char ie_len;
+	unsigned char ie[0];
+};
+
+struct setassocreqextraie_parm {
+	unsigned char e_id;
+	unsigned char ie_len;
+	unsigned char ie[0];
+};
+
+struct setproberspextraie_parm {
+	unsigned char e_id;
+	unsigned char ie_len;
+	unsigned char ie[0];
+};
+
+struct setassocrspextraie_parm {
+	unsigned char e_id;
+	unsigned char ie_len;
+	unsigned char ie[0];
+};
+
+
+struct addBaReq_parm
+{
+ 	unsigned int tid;
+	u8	addr[ETH_ALEN];
+};
+
+/*H2C Handler index: 46 */
+struct SetChannel_parm
+{
+	u32 curr_ch;	
+};
+
+#ifdef MP_FIRMWARE_OFFLOAD
+/*H2C Handler index: 47 */
+struct SetTxPower_parm
+{
+	u8 TxPower;
+};
+
+/*H2C Handler index: 48 */
+struct SwitchAntenna_parm
+{
+	u16 antenna_tx;
+	u16 antenna_rx;
+//	R_ANTENNA_SELECT_CCK cck_txrx;
+	u8 cck_txrx;
+};
+
+/*H2C Handler index: 49 */
+struct SetCrystalCap_parm
+{
+	u32 curr_crystalcap;
+};
+
+/*H2C Handler index: 50 */
+struct SetSingleCarrierTx_parm
+{
+	u8 bStart;
+};
+
+/*H2C Handler index: 51 */
+struct SetSingleToneTx_parm
+{
+	u8 bStart;
+	u8 curr_rfpath;
+};
+
+/*H2C Handler index: 52 */
+struct SetCarrierSuppressionTx_parm
+{
+	u8 bStart;
+	u32 curr_rateidx;
+};
+
+/*H2C Handler index: 53 */
+struct SetContinuousTx_parm
+{
+	u8 bStart;
+	u8 CCK_flag; /*1:CCK 2:OFDM*/
+	u32 curr_rateidx;
+};
+
+/*H2C Handler index: 54 */
+struct SwitchBandwidth_parm
+{
+	u8 curr_bandwidth;
+};
+
+#endif	/* MP_FIRMWARE_OFFLOAD */
+
+/*H2C Handler index: 59 */ 
+struct SetChannelPlan_param
+{
+	u8 channel_plan;
+};
+
+/*H2C Handler index: 60 */ 
+struct LedBlink_param
+{
+	PLED_871x	 pLed;
+};
+
+/*H2C Handler index: 61 */ 
+struct SetChannelSwitch_param
+{
+	u8 new_ch_no;
+};
+
+#define GEN_CMD_CODE(cmd)	cmd ## _CMD_
+
+
+/*
+
+Result: 
+0x00: success
+0x01: sucess, and check Response.
+0x02: cmd ignored due to duplicated sequcne number
+0x03: cmd dropped due to invalid cmd code
+0x04: reserved.
+
+*/
+
+#define H2C_RSP_OFFSET			512
+
+#define H2C_SUCCESS			0x00
+#define H2C_SUCCESS_RSP			0x01
+#define H2C_DUPLICATED			0x02
+#define H2C_DROPPED			0x03
+#define H2C_PARAMETERS_ERROR		0x04
+#define H2C_REJECTED			0x05
+#define H2C_CMD_OVERFLOW		0x06
+#define H2C_RESERVED			0x07
+
+extern u8 rtw_setassocsta_cmd(_adapter  *padapter, u8 *mac_addr);
+extern u8 rtw_setstandby_cmd(_adapter *padapter, uint action);
+extern u8 rtw_sitesurvey_cmd(_adapter  *padapter, NDIS_802_11_SSID *pssid, int ssid_max_num);
+extern u8 rtw_createbss_cmd(_adapter  *padapter);
+extern u8 rtw_createbss_cmd_ex(_adapter  *padapter, unsigned char *pbss, unsigned int sz);
+extern u8 rtw_setphy_cmd(_adapter  *padapter, u8 modem, u8 ch);
+extern u8 rtw_setstakey_cmd(_adapter  *padapter, u8 *psta, u8 unicast_key);
+extern u8 rtw_joinbss_cmd(_adapter  *padapter, struct wlan_network* pnetwork);
+extern u8 rtw_disassoc_cmd(_adapter  *padapter);
+extern u8 rtw_setopmode_cmd(_adapter  *padapter, NDIS_802_11_NETWORK_INFRASTRUCTURE networktype);
+extern u8 rtw_setdatarate_cmd(_adapter  *padapter, u8 *rateset);
+extern u8 rtw_setbasicrate_cmd(_adapter  *padapter, u8 *rateset);
+extern u8 rtw_setbbreg_cmd(_adapter * padapter, u8 offset, u8 val);
+extern u8 rtw_setrfreg_cmd(_adapter * padapter, u8 offset, u32 val);
+extern u8 rtw_getbbreg_cmd(_adapter * padapter, u8 offset, u8 * pval);
+extern u8 rtw_getrfreg_cmd(_adapter * padapter, u8 offset, u8 * pval);
+extern u8 rtw_setrfintfs_cmd(_adapter  *padapter, u8 mode);
+extern u8 rtw_setrttbl_cmd(_adapter  *padapter, struct setratable_parm *prate_table);
+extern u8 rtw_getrttbl_cmd(_adapter  *padapter, struct getratable_rsp *pval);
+
+extern u8 rtw_gettssi_cmd(_adapter  *padapter, u8 offset,u8 *pval);
+extern u8 rtw_setfwdig_cmd(_adapter*padapter, u8 type);
+extern u8 rtw_setfwra_cmd(_adapter*padapter, u8 type);
+
+extern u8 rtw_addbareq_cmd(_adapter*padapter, u8 tid, u8 *addr);
+
+extern u8 rtw_dynamic_chk_wk_cmd(_adapter *adapter);
+
+u8 rtw_lps_ctrl_wk_cmd(_adapter*padapter, u8 lps_ctrl_type, u8 enqueue);
+
+#ifdef CONFIG_ANTENNA_DIVERSITY
+extern  u8 rtw_antenna_select_cmd(_adapter*padapter, u8 antenna,u8 enqueue);
+#endif
+
+extern u8 rtw_ps_cmd(_adapter*padapter);
+
+
+#ifdef CONFIG_AP_MODE
+u8 rtw_chk_hi_queue_cmd(_adapter*padapter);
+#endif
+
+extern u8 rtw_set_chplan_cmd(_adapter*padapter, u8 chplan, u8 enaueue);
+extern u8 rtw_led_blink_cmd(_adapter*padapter, PLED_871x pLed);
+extern u8 rtw_set_csa_cmd(_adapter*padapter, u8 new_ch_no);
+
+u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf);
+
+extern void rtw_survey_cmd_callback(_adapter  *padapter, struct cmd_obj *pcmd);
+extern void rtw_disassoc_cmd_callback(_adapter  *padapter, struct cmd_obj *pcmd);
+extern void rtw_joinbss_cmd_callback(_adapter  *padapter, struct cmd_obj *pcmd);	
+extern void rtw_createbss_cmd_callback(_adapter  *padapter, struct cmd_obj *pcmd);
+extern void rtw_getbbrfreg_cmdrsp_callback(_adapter  *padapter, struct cmd_obj *pcmd);
+extern void rtw_readtssi_cmdrsp_callback(_adapter*	padapter,  struct cmd_obj *pcmd);
+
+extern void rtw_setstaKey_cmdrsp_callback(_adapter  *padapter,  struct cmd_obj *pcmd);
+extern void rtw_setassocsta_cmdrsp_callback(_adapter  *padapter,  struct cmd_obj *pcmd);
+extern void rtw_getrttbl_cmdrsp_callback(_adapter  *padapter,  struct cmd_obj *pcmd);
+
+
+struct _cmd_callback {
+	u32	cmd_code;
+	void (*callback)(_adapter  *padapter, struct cmd_obj *cmd);
+};
+
+enum rtw_h2c_cmd
+{
+	GEN_CMD_CODE(_Read_MACREG) ,	/*0*/
+ 	GEN_CMD_CODE(_Write_MACREG) ,    
+ 	GEN_CMD_CODE(_Read_BBREG) ,  
+ 	GEN_CMD_CODE(_Write_BBREG) ,  
+ 	GEN_CMD_CODE(_Read_RFREG) ,  
+ 	GEN_CMD_CODE(_Write_RFREG) , /*5*/
+ 	GEN_CMD_CODE(_Read_EEPROM) ,  
+ 	GEN_CMD_CODE(_Write_EEPROM) ,  
+ 	GEN_CMD_CODE(_Read_EFUSE) ,  
+ 	GEN_CMD_CODE(_Write_EFUSE) , 
+ 	
+ 	GEN_CMD_CODE(_Read_CAM) ,	/*10*/
+ 	GEN_CMD_CODE(_Write_CAM) ,   
+ 	GEN_CMD_CODE(_setBCNITV),
+ 	GEN_CMD_CODE(_setMBIDCFG),
+ 	GEN_CMD_CODE(_JoinBss),   /*14*/
+ 	GEN_CMD_CODE(_DisConnect) , /*15*/
+ 	GEN_CMD_CODE(_CreateBss) ,
+	GEN_CMD_CODE(_SetOpMode) , 
+	GEN_CMD_CODE(_SiteSurvey),  /*18*/
+ 	GEN_CMD_CODE(_SetAuth) ,
+ 	
+ 	GEN_CMD_CODE(_SetKey) ,	/*20*/
+ 	GEN_CMD_CODE(_SetStaKey) ,
+ 	GEN_CMD_CODE(_SetAssocSta) ,
+ 	GEN_CMD_CODE(_DelAssocSta) ,
+ 	GEN_CMD_CODE(_SetStaPwrState) , 
+ 	GEN_CMD_CODE(_SetBasicRate) , /*25*/
+ 	GEN_CMD_CODE(_GetBasicRate) ,
+ 	GEN_CMD_CODE(_SetDataRate) ,
+ 	GEN_CMD_CODE(_GetDataRate) ,
+	GEN_CMD_CODE(_SetPhyInfo) ,
+	
+ 	GEN_CMD_CODE(_GetPhyInfo) ,	/*30*/
+	GEN_CMD_CODE(_SetPhy) ,
+ 	GEN_CMD_CODE(_GetPhy) ,
+ 	GEN_CMD_CODE(_readRssi) ,
+ 	GEN_CMD_CODE(_readGain) ,
+ 	GEN_CMD_CODE(_SetAtim) , /*35*/
+ 	GEN_CMD_CODE(_SetPwrMode) , 
+ 	GEN_CMD_CODE(_JoinbssRpt),
+ 	GEN_CMD_CODE(_SetRaTable) ,
+ 	GEN_CMD_CODE(_GetRaTable) ,  	
+ 	
+ 	GEN_CMD_CODE(_GetCCXReport), /*40*/
+ 	GEN_CMD_CODE(_GetDTMReport),
+ 	GEN_CMD_CODE(_GetTXRateStatistics),
+ 	GEN_CMD_CODE(_SetUsbSuspend),
+ 	GEN_CMD_CODE(_SetH2cLbk),
+ 	GEN_CMD_CODE(_AddBAReq) , /*45*/
+	GEN_CMD_CODE(_SetChannel), /*46*/
+	GEN_CMD_CODE(_SetTxPower), 
+	GEN_CMD_CODE(_SwitchAntenna),
+	GEN_CMD_CODE(_SetCrystalCap),
+	GEN_CMD_CODE(_SetSingleCarrierTx), /*50*/
+	
+	GEN_CMD_CODE(_SetSingleToneTx),/*51*/
+	GEN_CMD_CODE(_SetCarrierSuppressionTx),
+	GEN_CMD_CODE(_SetContinuousTx),
+	GEN_CMD_CODE(_SwitchBandwidth), /*54*/
+	GEN_CMD_CODE(_TX_Beacon), /*55*/
+	
+	GEN_CMD_CODE(_Set_MLME_EVT), /*56*/
+	GEN_CMD_CODE(_Set_Drv_Extra), /*57*/
+	GEN_CMD_CODE(_Set_H2C_MSG), /*58*/
+	
+	GEN_CMD_CODE(_SetChannelPlan), /*59*/
+	GEN_CMD_CODE(_LedBlink), /*60*/
+	
+	GEN_CMD_CODE(_SetChannelSwitch), /*61*/
+	
+	MAX_H2CCMD
+};
+
+#define _GetBBReg_CMD_		_Read_BBREG_CMD_
+#define _SetBBReg_CMD_ 		_Write_BBREG_CMD_
+#define _GetRFReg_CMD_ 		_Read_RFREG_CMD_
+#define _SetRFReg_CMD_ 		_Write_RFREG_CMD_
+
+#ifdef _RTW_CMD_C_
+struct _cmd_callback 	rtw_cmd_callback[] = 
+{
+	{GEN_CMD_CODE(_Read_MACREG), NULL}, /*0*/
+	{GEN_CMD_CODE(_Write_MACREG), NULL}, 
+	{GEN_CMD_CODE(_Read_BBREG), &rtw_getbbrfreg_cmdrsp_callback},
+	{GEN_CMD_CODE(_Write_BBREG), NULL},
+	{GEN_CMD_CODE(_Read_RFREG), &rtw_getbbrfreg_cmdrsp_callback},
+	{GEN_CMD_CODE(_Write_RFREG), NULL}, /*5*/
+	{GEN_CMD_CODE(_Read_EEPROM), NULL},
+	{GEN_CMD_CODE(_Write_EEPROM), NULL},
+	{GEN_CMD_CODE(_Read_EFUSE), NULL},
+	{GEN_CMD_CODE(_Write_EFUSE), NULL},
+	
+	{GEN_CMD_CODE(_Read_CAM),	NULL},	/*10*/
+	{GEN_CMD_CODE(_Write_CAM),	 NULL},	
+	{GEN_CMD_CODE(_setBCNITV), NULL},
+ 	{GEN_CMD_CODE(_setMBIDCFG), NULL},
+	{GEN_CMD_CODE(_JoinBss), &rtw_joinbss_cmd_callback},  /*14*/
+	{GEN_CMD_CODE(_DisConnect), &rtw_disassoc_cmd_callback}, /*15*/
+	{GEN_CMD_CODE(_CreateBss), &rtw_createbss_cmd_callback},
+	{GEN_CMD_CODE(_SetOpMode), NULL},
+	{GEN_CMD_CODE(_SiteSurvey), &rtw_survey_cmd_callback}, /*18*/
+	{GEN_CMD_CODE(_SetAuth), NULL},
+	
+	{GEN_CMD_CODE(_SetKey), NULL},	/*20*/
+	{GEN_CMD_CODE(_SetStaKey), &rtw_setstaKey_cmdrsp_callback},
+	{GEN_CMD_CODE(_SetAssocSta), &rtw_setassocsta_cmdrsp_callback},
+	{GEN_CMD_CODE(_DelAssocSta), NULL},	
+	{GEN_CMD_CODE(_SetStaPwrState), NULL},	
+	{GEN_CMD_CODE(_SetBasicRate), NULL}, /*25*/
+	{GEN_CMD_CODE(_GetBasicRate), NULL},
+	{GEN_CMD_CODE(_SetDataRate), NULL},
+	{GEN_CMD_CODE(_GetDataRate), NULL},
+	{GEN_CMD_CODE(_SetPhyInfo), NULL},
+	
+	{GEN_CMD_CODE(_GetPhyInfo), NULL}, /*30*/
+	{GEN_CMD_CODE(_SetPhy), NULL},
+	{GEN_CMD_CODE(_GetPhy), NULL},	
+	{GEN_CMD_CODE(_readRssi), NULL},
+	{GEN_CMD_CODE(_readGain), NULL},
+	{GEN_CMD_CODE(_SetAtim), NULL}, /*35*/
+	{GEN_CMD_CODE(_SetPwrMode), NULL},
+	{GEN_CMD_CODE(_JoinbssRpt), NULL},
+	{GEN_CMD_CODE(_SetRaTable), NULL},
+	{GEN_CMD_CODE(_GetRaTable) , NULL},
+ 	
+	{GEN_CMD_CODE(_GetCCXReport), NULL}, /*40*/
+ 	{GEN_CMD_CODE(_GetDTMReport),	NULL},
+ 	{GEN_CMD_CODE(_GetTXRateStatistics), NULL}, 
+ 	{GEN_CMD_CODE(_SetUsbSuspend), NULL}, 
+ 	{GEN_CMD_CODE(_SetH2cLbk), NULL},
+ 	{GEN_CMD_CODE(_AddBAReq), NULL}, /*45*/
+	{GEN_CMD_CODE(_SetChannel), NULL},		/*46*/
+	{GEN_CMD_CODE(_SetTxPower), NULL},
+	{GEN_CMD_CODE(_SwitchAntenna), NULL},
+	{GEN_CMD_CODE(_SetCrystalCap), NULL},
+	{GEN_CMD_CODE(_SetSingleCarrierTx), NULL},	/*50*/
+	
+	{GEN_CMD_CODE(_SetSingleToneTx), NULL}, /*51*/
+	{GEN_CMD_CODE(_SetCarrierSuppressionTx), NULL},
+	{GEN_CMD_CODE(_SetContinuousTx), NULL},
+	{GEN_CMD_CODE(_SwitchBandwidth), NULL},		/*54*/
+	{GEN_CMD_CODE(_TX_Beacon), NULL},/*55*/
+
+	{GEN_CMD_CODE(_Set_MLME_EVT), NULL},/*56*/
+	{GEN_CMD_CODE(_Set_Drv_Extra), NULL},/*57*/
+	{GEN_CMD_CODE(_Set_H2C_MSG), NULL},/*58*/
+	{GEN_CMD_CODE(_SetChannelPlan), NULL},/*59*/
+	{GEN_CMD_CODE(_LedBlink), NULL},/*60*/
+	{GEN_CMD_CODE(_SetChannelSwitch), NULL},/*61*/
+};
+#endif
+
+#endif // _CMD_H_
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_debug.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_debug.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_debug.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_debug.h	2017-09-23 03:42:50.050674966 +0800
@@ -0,0 +1,374 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __RTW_DEBUG_H__
+#define __RTW_DEBUG_H__
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+
+#define _drv_emerg_			1
+#define _drv_alert_			2
+#define _drv_crit_			3
+#define _drv_err_			4
+#define	_drv_warning_		5
+#define _drv_notice_			6
+#define _drv_info_			7
+#define _drv_dump_			8
+#define	_drv_debug_		9
+
+
+#define 	_module_rtl871x_xmit_c_ 		BIT(0)
+#define 	_module_xmit_osdep_c_ 		BIT(1)
+#define 	_module_rtl871x_recv_c_ 		BIT(2)
+#define 	_module_recv_osdep_c_ 		BIT(3)
+#define 	_module_rtl871x_mlme_c_ 		BIT(4)
+#define	_module_mlme_osdep_c_ 		BIT(5)
+#define 	_module_rtl871x_sta_mgt_c_ 	BIT(6)
+#define 	_module_rtl871x_cmd_c_ 			BIT(7)
+#define	_module_cmd_osdep_c_ 	BIT(8)
+#define 	_module_rtl871x_io_c_ 				BIT(9)
+#define	_module_io_osdep_c_ 		BIT(10)
+#define 	_module_os_intfs_c_			BIT(11)
+#define 	_module_rtl871x_security_c_		BIT(12)
+#define 	_module_rtl871x_eeprom_c_			BIT(13)
+#define 	_module_hal_init_c_		BIT(14)
+#define 	_module_hci_hal_init_c_		BIT(15)
+#define 	_module_rtl871x_ioctl_c_		BIT(16)
+#define 	_module_rtl871x_ioctl_set_c_		BIT(17)
+#define 	_module_rtl871x_ioctl_query_c_	BIT(18)
+#define 	_module_rtl871x_pwrctrl_c_			BIT(19)
+#define 	_module_hci_intfs_c_			BIT(20)
+#define 	_module_hci_ops_c_			BIT(21)
+#define 	_module_osdep_service_c_			BIT(22)
+#define _module_mp_			BIT(23)
+#define 	_module_hci_ops_os_c_			BIT(24)
+#define 	_module_rtl871x_ioctl_os_c			BIT(25)
+#define 	_module_rtl8712_cmd_c_ BIT(26)
+//#define _module_efuse_			BIT(27)
+#define	_module_rtl8192c_xmit_c_ BIT(28)
+#define _module_efuse_		BIT(29)
+#define   _module_rtl8712_recv_c_ BIT(30)
+#define   _module_rtl8712_led_c_ BIT(31)
+
+#undef _MODULE_DEFINE_
+
+#if defined _RTL871X_XMIT_C_
+	#define _MODULE_DEFINE_	_module_rtl871x_xmit_c_
+#elif defined _XMIT_OSDEP_C_
+	#define _MODULE_DEFINE_	_module_xmit_osdep_c_
+#elif defined _RTL871X_RECV_C_
+	#define _MODULE_DEFINE_	_module_rtl871x_recv_c_
+#elif defined _RECV_OSDEP_C_
+	#define _MODULE_DEFINE_	_module_recv_osdep_c_
+#elif defined _RTL871X_MLME_C_
+	#define _MODULE_DEFINE_	_module_rtl871x_mlme_c_
+#elif defined _MLME_OSDEP_C_
+	#define _MODULE_DEFINE_	_module_mlme_osdep_c_
+#elif defined _RTL871X_STA_MGT_C_
+	#define _MODULE_DEFINE_	_module_rtl871x_sta_mgt_c_
+#elif defined _RTL871X_CMD_C_
+	#define _MODULE_DEFINE_	_module_rtl871x_cmd_c_
+#elif defined _CMD_OSDEP_C_
+	#define _MODULE_DEFINE_	_module_cmd_osdep_c_
+#elif defined _RTL871X_IO_C_
+	#define _MODULE_DEFINE_	_module_rtl871x_io_c_
+#elif defined _IO_OSDEP_C_
+	#define _MODULE_DEFINE_	_module_io_osdep_c_
+#elif defined _OS_INTFS_C_
+	#define	_MODULE_DEFINE_	_module_os_intfs_c_
+#elif defined _RTL871X_SECURITY_C_
+	#define	_MODULE_DEFINE_	_module_rtl871x_security_c_
+#elif defined _RTL871X_EEPROM_C_
+	#define	_MODULE_DEFINE_	_module_rtl871x_eeprom_c_
+#elif defined _HAL_INIT_C_
+	#define	_MODULE_DEFINE_	_module_hal_init_c_
+#elif defined _HCI_HAL_INIT_C_
+	#define	_MODULE_DEFINE_	_module_hci_hal_init_c_
+#elif defined _RTL871X_IOCTL_C_
+	#define	_MODULE_DEFINE_	_module_rtl871x_ioctl_c_
+#elif defined _RTL871X_IOCTL_SET_C_
+	#define	_MODULE_DEFINE_	_module_rtl871x_ioctl_set_c_
+#elif defined _RTL871X_IOCTL_QUERY_C_
+	#define	_MODULE_DEFINE_	_module_rtl871x_ioctl_query_c_
+#elif defined _RTL871X_PWRCTRL_C_
+	#define	_MODULE_DEFINE_	_module_rtl871x_pwrctrl_c_
+#elif defined _HCI_INTF_C_
+	#define	_MODULE_DEFINE_	_module_hci_intfs_c_
+#elif defined _HCI_OPS_C_
+	#define	_MODULE_DEFINE_	_module_hci_ops_c_
+#elif defined _OSDEP_HCI_INTF_C_
+	#define	_MODULE_DEFINE_	_module_hci_intfs_c_
+#elif defined _OSDEP_SERVICE_C_
+	#define	_MODULE_DEFINE_	_module_osdep_service_c_
+#elif defined _HCI_OPS_OS_C_
+	#define	_MODULE_DEFINE_	_module_hci_ops_os_c_
+#elif defined _RTL871X_IOCTL_LINUX_C_
+	#define	_MODULE_DEFINE_	_module_rtl871x_ioctl_os_c
+#elif defined _RTL8712_CMD_C_
+	#define	_MODULE_DEFINE_	_module_rtl8712_cmd_c_
+#elif defined _RTL8192C_XMIT_C_
+	#define	_MODULE_DEFINE_	_module_rtl8192c_xmit_c_
+#elif defined _RTL8712_RECV_C_
+	#define	_MODULE_DEFINE_	_module_rtl8712_recv_c_
+#elif defined _RTL8192CU_RECV_C_
+	#define	_MODULE_DEFINE_	_module_rtl8712_recv_c_
+#elif defined _RTL871X_MLME_EXT_C_
+	#define _MODULE_DEFINE_	_module_mlme_osdep_c_
+#elif defined _RTW_MP_C_
+	#define	_MODULE_DEFINE_	_module_mp_
+#elif defined _RTW_MP_IOCTL_C_
+	#define	_MODULE_DEFINE_	_module_mp_
+#elif defined _RTW_EFUSE_C_
+	#define	_MODULE_DEFINE_	_module_efuse_
+#endif
+
+#ifdef PLATFORM_OS_CE
+extern void rtl871x_cedbg(const char *fmt, ...);
+#endif
+
+#define RT_TRACE(_Comp, _Level, Fmt) do{}while(0)
+#define _func_enter_ do{}while(0)
+#define _func_exit_ do{}while(0)
+#define RT_PRINT_DATA(_Comp, _Level, _TitleString, _HexData, _HexDataLen) do{}while(0)
+
+#undef	_dbgdump
+
+#ifdef CONFIG_DEBUG_RTL871X
+
+#ifndef _RTL871X_DEBUG_C_
+	extern u32 GlobalDebugLevel;
+	extern u64 GlobalDebugComponents;
+#endif
+
+#ifdef PLATFORM_WINDOWS
+
+		#ifdef PLATFORM_OS_XP
+
+		#define _dbgdump	DbgPrint
+
+		#elif defined PLATFORM_OS_CE
+
+		#define _dbgdump	rtl871x_cedbg
+
+		#endif
+
+	#elif defined PLATFORM_LINUX
+
+		#define _dbgdump	printk
+
+#endif
+
+#endif /* CONFIG_DEBUG_RTL871X */
+
+
+#if	defined (_dbgdump) && defined (_MODULE_DEFINE_)
+
+		#undef RT_TRACE
+		#define RT_TRACE(_Comp, _Level, Fmt)\
+		do {\
+			if((_Comp & GlobalDebugComponents) && (_Level <= GlobalDebugLevel)) {\
+			_dbgdump("%s [0x%08x,%d]", RTL871X_MODULE_NAME, (unsigned int)_Comp, _Level);\
+				_dbgdump Fmt;						\
+			}\
+		}while(0)
+
+#endif
+
+
+#if	defined (_dbgdump)
+
+		#undef  _func_enter_
+		#define _func_enter_ \
+		do {	\
+			if (GlobalDebugLevel >= _drv_debug_) \
+			{																	\
+				_dbgdump("\n %s : %s enters at %d\n", RTL871X_MODULE_NAME, __FUNCTION__, __LINE__);\
+			}		\
+		} while(0)
+
+		#undef  _func_exit_
+		#define _func_exit_ \
+		do {	\
+			if (GlobalDebugLevel >= _drv_debug_) \
+			{																	\
+				_dbgdump("\n %s : %s exits at %d\n", RTL871X_MODULE_NAME, __FUNCTION__, __LINE__); \
+			}	\
+		} while(0)
+
+		#undef RT_PRINT_DATA
+		#define RT_PRINT_DATA(_Comp, _Level, _TitleString, _HexData, _HexDataLen)			\
+			if(((_Comp) & GlobalDebugComponents) && (_Level <= GlobalDebugLevel))	\
+			{									\
+				int __i;								\
+				u8	*ptr = (u8 *)_HexData;				\
+				_dbgdump("Rtl871x: ");						\
+				_dbgdump(_TitleString);						\
+				for( __i=0; __i<(int)_HexDataLen; __i++ )				\
+				{								\
+					_dbgdump("%02X%s", ptr[__i], (((__i + 1) % 4) == 0)?"  ":" ");	\
+					if (((__i + 1) % 16) == 0)	_dbgdump("\n");			\
+				}								\
+				_dbgdump("\n");							\
+			}
+#endif
+
+
+#ifdef CONFIG_DEBUG_RTL819X
+	#ifdef PLATFORM_WINDOWS
+
+		#ifdef PLATFORM_OS_XP
+		#define _dbgdump	DbgPrint
+		
+		#elif defined PLATFORM_OS_CE
+		#define _dbgdump	rtl871x_cedbg
+
+		#endif
+
+	#elif defined PLATFORM_LINUX
+		#define _dbgdump	printk
+	#endif
+#endif
+
+#ifdef PLATFORM_WINDOWS
+	#define DBG_871X do {} while(0)
+	#define MSG_8192C do {} while(0)
+	#define DBG_8192C do {} while(0)
+	#define WRN_8192C do {} while(0)
+	#define ERR_8192C do {} while(0)
+#endif
+
+#ifdef PLATFORM_LINUX
+	#define DBG_871X(x, ...) do {} while(0)
+	#define MSG_8192C(x, ...) do {} while(0)
+	#define DBG_8192C(x,...) do {} while(0)
+	#define WRN_8192C(x,...) do {} while(0)
+	#define ERR_8192C(x,...) do {} while(0)
+#endif
+
+#if	defined (_dbgdump)
+	#undef DBG_871X
+	#define DBG_871X _dbgdump
+
+	#undef MSG_8192C
+	#define MSG_8192C _dbgdump
+
+	#undef DBG_8192C
+	#define DBG_8192C _dbgdump
+
+	#undef WRN_8192C
+	#define WRN_8192C _dbgdump
+
+	#undef ERR_8192C
+	#define ERR_8192C _dbgdump
+#endif
+
+
+
+#ifdef CONFIG_PROC_DEBUG
+
+	int proc_get_drv_version(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data);
+
+	int proc_get_write_reg(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data);
+
+ 	int proc_set_write_reg(struct file *file, const char *buffer,
+		unsigned long count, void *data);
+
+	int proc_get_read_reg(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data);
+
+	int proc_set_read_reg(struct file *file, const char *buffer,
+		unsigned long count, void *data);
+
+
+	int proc_get_fwstate(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data);
+
+	int proc_get_sec_info(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data);
+
+	int proc_get_mlmext_state(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data);
+
+	int proc_get_qos_option(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data);
+
+	int proc_get_ht_option(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data);
+
+	int proc_get_rf_info(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data);
+
+	int proc_get_ap_info(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data);
+
+	int proc_get_adapter_state(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data);
+
+	int proc_get_trx_info(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data);
+
+
+#ifdef CONFIG_AP_MODE
+
+	int proc_get_all_sta_info(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data);
+
+#endif
+
+#ifdef DBG_MEMORY_LEAK
+	int proc_get_malloc_cnt(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data);
+#endif
+
+#ifdef CONFIG_FIND_BEST_CHANNEL
+	int proc_get_best_channel(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data);
+#endif
+
+	int proc_get_rx_signal(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data);
+
+	int proc_set_rx_signal(struct file *file, const char *buffer,
+		unsigned long count, void *data);
+
+#endif //CONFIG_PROC_DEBUG
+
+#endif	//__RTW_DEBUG_H__
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_eeprom.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_eeprom.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_eeprom.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_eeprom.h	2017-09-23 03:42:50.050674966 +0800
@@ -0,0 +1,153 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef __RTW_EEPROM_H__
+#define __RTW_EEPROM_H__
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+#define	RTL8712_EEPROM_ID			0x8712
+#define	EEPROM_MAX_SIZE			256
+#define	CLOCK_RATE					50			//100us		
+
+//- EEPROM opcodes
+#define EEPROM_READ_OPCODE		06
+#define EEPROM_WRITE_OPCODE		05
+#define EEPROM_ERASE_OPCODE		07
+#define EEPROM_EWEN_OPCODE		19      // Erase/write enable
+#define EEPROM_EWDS_OPCODE		16      // Erase/write disable
+
+//Country codes
+#define USA							0x555320
+#define EUROPE						0x1 //temp, should be provided later	
+#define JAPAN						0x2 //temp, should be provided later
+
+#ifdef CONFIG_SDIO_HCI
+#define eeprom_cis0_sz	17
+#define eeprom_cis1_sz	50
+#endif
+
+#define	EEPROM_CID_DEFAULT			0x0
+#define	EEPROM_CID_ALPHA				0x1
+#define	EEPROM_CID_Senao				0x3
+#define	EEPROM_CID_NetCore				0x5
+#define	EEPROM_CID_CAMEO				0X8
+#define	EEPROM_CID_SITECOM				0x9
+#define	EEPROM_CID_COREGA				0xB
+#define	EEPROM_CID_EDIMAX_BELKIN		0xC
+#define	EEPROM_CID_SERCOMM_BELKIN		0xE
+#define	EEPROM_CID_CAMEO1				0xF
+#define	EEPROM_CID_WNC_COREGA		0x12
+#define	EEPROM_CID_CLEVO				0x13
+#define	EEPROM_CID_WHQL				0xFE // added by chiyoko for dtm, 20090108
+
+//
+// Customer ID, note that: 
+// This variable is initiailzed through EEPROM or registry, 
+// however, its definition may be different with that in EEPROM for 
+// EEPROM size consideration. So, we have to perform proper translation between them.
+// Besides, CustomerID of registry has precedence of that of EEPROM.
+// defined below. 060703, by rcnjko.
+//
+typedef enum _RT_CUSTOMER_ID
+{
+	RT_CID_DEFAULT = 0,
+	RT_CID_8187_ALPHA0 = 1,
+	RT_CID_8187_SERCOMM_PS = 2,
+	RT_CID_8187_HW_LED = 3,
+	RT_CID_8187_NETGEAR = 4,
+	RT_CID_WHQL = 5,
+	RT_CID_819x_CAMEO  = 6, 
+	RT_CID_819x_RUNTOP = 7,
+	RT_CID_819x_Senao = 8,
+	RT_CID_TOSHIBA = 9,	// Merge by Jacken, 2008/01/31.
+	RT_CID_819x_Netcore = 10,
+	RT_CID_Nettronix = 11,
+	RT_CID_DLINK = 12,
+	RT_CID_PRONET = 13,
+	RT_CID_COREGA = 14,
+	RT_CID_CHINA_MOBILE = 15,
+	RT_CID_819x_ALPHA = 16,
+	RT_CID_819x_Sitecom = 17,
+	RT_CID_CCX = 18, // It's set under CCX logo test and isn't demanded for CCX functions, but for test behavior like retry limit and tx report. By Bruce, 2009-02-17.
+	RT_CID_819x_Lenovo = 19,	
+	RT_CID_819x_QMI = 20,
+	RT_CID_819x_Edimax_Belkin = 21,		
+	RT_CID_819x_Sercomm_Belkin = 22,			
+	RT_CID_819x_CAMEO1 = 23,
+	RT_CID_819x_MSI = 24,
+	RT_CID_819x_Acer = 25,
+	RT_CID_819x_AzWave_ASUS = 26,
+	RT_CID_819x_AzWave = 27, // For AzWave in PCIe, The ID is AzWave use and not only Asus
+	RT_CID_819x_HP = 28,
+	RT_CID_819x_WNC_COREGA = 29,
+	RT_CID_819x_Arcadyan_Belkin = 30,
+	RT_CID_819x_SAMSUNG = 31,
+	RT_CID_819x_CLEVO = 32,
+	RT_CID_819x_DELL = 33,
+	RT_CID_819x_PRONETS = 34,
+	RT_CID_819x_Edimax_ASUS = 35,
+	RT_CID_819x_CAMEO_NETGEAR = 36,
+}RT_CUSTOMER_ID, *PRT_CUSTOMER_ID;
+
+struct eeprom_priv 
+{    
+	u8		bautoload_fail_flag;
+	//u8		bempty;
+	//u8		sys_config;
+	u8		mac_addr[6];	//PermanentAddress
+	//u8		config0;
+	u16		channel_plan;
+	//u8		country_string[3];	
+	//u8		tx_power_b[15];
+	//u8		tx_power_g[15];
+	//u8		tx_power_a[201];
+
+	u8		EepromOrEfuse;
+
+	u8		efuse_eeprom_data[EEPROM_MAX_SIZE];
+
+#ifdef CONFIG_SDIO_HCI
+	u8		sdio_setting;	
+	u32		ocr;
+	u8		cis0[eeprom_cis0_sz];
+	u8		cis1[eeprom_cis1_sz];	
+#endif
+};
+
+
+extern void eeprom_write16(_adapter *padapter, u16 reg, u16 data);
+extern u16 eeprom_read16(_adapter *padapter, u16 reg);
+extern void read_eeprom_content(_adapter *padapter);
+extern void eeprom_read_sz(_adapter * padapter, u16 reg,u8* data, u32 sz); 
+
+extern void read_eeprom_content_by_attrib(_adapter *	padapter	);
+
+#ifdef PLATFORM_LINUX
+#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE
+extern int isAdaptorInfoFileValid(void);
+extern int storeAdaptorInfoFile(char *path, struct eeprom_priv * eeprom_priv);
+extern int retriveAdaptorInfoFile(char *path, struct eeprom_priv * eeprom_priv);
+#endif //CONFIG_ADAPTOR_INFO_CACHING_FILE
+#endif //PLATFORM_LINUX
+
+#endif  //__RTL871X_EEPROM_H__
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_efuse.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_efuse.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_efuse.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_efuse.h	2017-09-23 03:42:50.050674966 +0800
@@ -0,0 +1,123 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __RTW_EFUSE_H__
+#define __RTW_EFUSE_H__
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+
+#define	EFUSE_ERROE_HANDLE		1
+
+#define	PG_STATE_HEADER 		0x01
+#define	PG_STATE_WORD_0		0x02
+#define	PG_STATE_WORD_1		0x04
+#define	PG_STATE_WORD_2		0x08
+#define	PG_STATE_WORD_3		0x10
+#define	PG_STATE_DATA			0x20
+
+#define	PG_SWBYTE_H			0x01
+#define	PG_SWBYTE_L			0x02
+
+#define	PGPKT_DATA_SIZE		8
+
+#define	EFUSE_WIFI				0
+#define	EFUSE_BT				1
+
+enum _EFUSE_DEF_TYPE {
+	TYPE_EFUSE_MAX_SECTION				= 0,
+	TYPE_EFUSE_REAL_CONTENT_LEN			= 1,
+	TYPE_AVAILABLE_EFUSE_BYTES_BANK		= 2,
+	TYPE_AVAILABLE_EFUSE_BYTES_TOTAL	= 3,
+	TYPE_EFUSE_MAP_LEN					= 4,
+	TYPE_EFUSE_PROTECT_BYTES_BANK		= 5,
+};
+
+#define		EFUSE_MAX_MAP_LEN		256
+#define		EFUSE_MAX_HW_SIZE		512
+#define		EFUSE_MAX_SECTION_BASE	16
+
+#define EXT_HEADER(header) ((header & 0x1F ) == 0x0F)
+#define ALL_WORDS_DISABLED(wde)	((wde & 0x0F) == 0x0F)
+#define GET_HDR_OFFSET_2_0(header) ( (header & 0xE0) >> 5)
+
+#define		EFUSE_REPEAT_THRESHOLD_			3
+
+//=============================================
+//	The following is for BT Efuse definition
+//=============================================
+#define		EFUSE_BT_MAX_MAP_LEN		1024
+#define		EFUSE_MAX_BANK			4
+#define		EFUSE_MAX_BT_BANK		(EFUSE_MAX_BANK-1)
+//=============================================
+/*--------------------------Define Parameters-------------------------------*/
+#define		EFUSE_MAX_WORD_UNIT			4
+
+/*------------------------------Define structure----------------------------*/ 
+typedef struct PG_PKT_STRUCT_A{
+	u8 offset;
+	u8 word_en;
+	u8 data[8];	
+	u8 word_cnts;
+}PGPKT_STRUCT,*PPGPKT_STRUCT;
+/*------------------------------Define structure----------------------------*/ 
+
+
+/*------------------------Export global variable----------------------------*/
+extern u8 fakeEfuseBank;
+extern u32 fakeEfuseUsedBytes;
+extern u8 fakeEfuseContent[];
+extern u8 fakeEfuseInitMap[];
+extern u8 fakeEfuseModifiedMap[];
+
+extern u32 BTEfuseUsedBytes;
+extern u8 BTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE];
+extern u8 BTEfuseInitMap[];
+extern u8 BTEfuseModifiedMap[];
+
+extern u32 fakeBTEfuseUsedBytes;
+extern u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE];
+extern u8 fakeBTEfuseInitMap[];
+extern u8 fakeBTEfuseModifiedMap[];
+/*------------------------Export global variable----------------------------*/
+
+u8	efuse_GetCurrentSize(PADAPTER padapter, u16 *size);
+u16	efuse_GetMaxSize(PADAPTER padapter);
+u8	rtw_efuse_access(PADAPTER padapter, u8 bRead, u16 start_addr, u16 cnts, u8 *data);
+u8	rtw_efuse_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data);
+u8	rtw_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data);
+
+u16	Efuse_GetCurrentSize(PADAPTER pAdapter, u8 efuseType, BOOLEAN bPseudoTest);
+u8	Efuse_CalculateWordCnts(u8 word_en);
+void	ReadEFuseByte(PADAPTER Adapter, u16 _offset, u8 *pbuf, BOOLEAN bPseudoTest) ;
+void	EFUSE_GetEfuseDefinition(PADAPTER pAdapter, u8 efuseType, u8 type, PVOID *pOut, BOOLEAN bPseudoTest);
+u8	efuse_OneByteRead(PADAPTER pAdapter, u16 addr, u8 *data, BOOLEAN	 bPseudoTest);
+u8	efuse_OneByteWrite(PADAPTER pAdapter, u16 addr, u8 data, BOOLEAN	 bPseudoTest);
+
+void	Efuse_PowerSwitch(PADAPTER pAdapter,u8	bWrite,u8	 PwrState);
+int 	Efuse_PgPacketRead(PADAPTER pAdapter, u8 offset, u8 *data, BOOLEAN bPseudoTest);
+int 	Efuse_PgPacketWrite(PADAPTER pAdapter, u8 offset, u8 word_en, u8 *data, BOOLEAN bPseudoTest);
+void	efuse_WordEnableDataRead(u8 word_en, u8 *sourdata, u8 *targetdata);
+u8	Efuse_WordEnableDataWrite(PADAPTER pAdapter, u16 efuse_addr, u8 word_en, u8 *data, BOOLEAN bPseudoTest);
+
+u8	EFUSE_Read1Byte(PADAPTER pAdapter, u16 Address);
+void	EFUSE_ShadowMapUpdate(PADAPTER pAdapter, u8 efuseType, BOOLEAN bPseudoTest);
+void	EFUSE_ShadowRead(PADAPTER pAdapter, u8 Type, u16 Offset, u32 *Value);
+
+#endif
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_event.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_event.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_event.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_event.h	2017-09-23 03:42:50.050674966 +0800
@@ -0,0 +1,154 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef _RTW_EVENT_H_
+#define _RTW_EVENT_H_
+#include <drv_conf.h>
+#include <osdep_service.h>
+
+#ifndef CONFIG_RTL8711FW
+#ifdef PLATFORM_LINUX
+#include <wlan_bssdef.h>
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26))
+#include <asm/semaphore.h>
+#else
+#include <linux/semaphore.h>
+#endif
+#include <linux/sem.h>
+#endif
+#else
+#include <wlan_bssdef.h>
+#endif//CONFIG_RTL8711FW
+
+
+
+#ifdef CONFIG_H2CLBK
+#include <h2clbk.h>
+#endif
+
+/*
+Used to report a bss has been scanned
+
+*/
+struct survey_event	{
+	WLAN_BSSID_EX bss;
+};
+
+/*
+Used to report that the requested site survey has been done.
+
+bss_cnt indicates the number of bss that has been reported.
+
+
+*/
+struct surveydone_event {
+	unsigned int	bss_cnt;	
+	
+};
+
+/*
+Used to report the link result of joinning the given bss
+
+
+join_res:
+-1: authentication fail
+-2: association fail
+> 0: TID
+
+*/
+struct joinbss_event {
+	struct	wlan_network	network;
+};
+
+/*
+Used to report a given STA has joinned the created BSS.
+It is used in AP/Ad-HoC(M) mode.
+
+
+*/
+struct stassoc_event {
+	unsigned char macaddr[6];
+	unsigned char rsvd[2];
+	int    cam_id;
+	
+};
+
+struct stadel_event {
+ unsigned char macaddr[6];
+ unsigned char rsvd[2]; 
+};
+
+struct addba_event
+{
+ 	unsigned int tid;
+};
+
+
+#ifdef CONFIG_H2CLBK
+struct c2hlbk_event{
+	unsigned char mac[6];
+	unsigned short	s0;
+	unsigned short	s1;
+	unsigned int	w0;
+	unsigned char	b0;
+	unsigned short  s2;
+	unsigned char	b1;
+	unsigned int	w1;	
+};
+#endif//CONFIG_H2CLBK
+
+#define GEN_EVT_CODE(event)	event ## _EVT_
+
+
+
+struct fwevent {
+	u32	parmsize;
+	void (*event_callback)(_adapter *dev, u8 *pbuf);
+};
+
+
+#define C2HEVENT_SZ			32	
+
+struct event_node{
+	unsigned char *node;
+	unsigned char evt_code;
+	unsigned short evt_sz;
+	volatile int	*caller_ff_tail;
+	int	caller_ff_sz;
+};
+
+struct c2hevent_queue {
+	volatile int	head;
+	volatile int	tail;
+	struct	event_node	nodes[C2HEVENT_SZ];
+	unsigned char	seq;
+};
+
+#define NETWORK_QUEUE_SZ	4
+
+struct network_queue {
+	volatile int	head;
+	volatile int	tail;
+	WLAN_BSSID_EX networks[NETWORK_QUEUE_SZ];	
+};
+
+
+#endif // _WLANEVENT_H_
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_ht.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_ht.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_ht.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_ht.h	2017-09-23 03:42:50.050674966 +0800
@@ -0,0 +1,51 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef _RTW_HT_H_
+#define _RTW_HT_H_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include "wifi.h"
+
+struct ht_priv
+{
+	u32	ht_option;	
+	u32	ampdu_enable;//for enable Tx A-MPDU
+	//u8	baddbareq_issued[16];
+	u32	tx_amsdu_enable;//for enable Tx A-MSDU
+	u32	tx_amdsu_maxlen; // 1: 8k, 0:4k ; default:8k, for tx
+	u32	rx_ampdu_maxlen; //for rx reordering ctrl win_sz, updated when join_callback.
+	
+	u8	bwmode;//
+	u8	ch_offset;//PRIME_CHNL_OFFSET
+	u8	sgi;//short GI
+
+	//for processing Tx A-MPDU
+	u8	agg_enable_bitmap;
+	//u8	ADDBA_retry_count;
+	u8	candidate_tid_bitmap;
+
+	struct ieee80211_ht_cap ht_cap;
+	
+};
+
+#endif	//_RTL871X_HT_H_
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_ioctl.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_ioctl.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_ioctl.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_ioctl.h	2017-09-23 03:42:50.050674966 +0800
@@ -0,0 +1,271 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef _RTW_IOCTL_H_
+#define _RTW_IOCTL_H_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+#ifndef OID_802_11_CAPABILITY
+	#define OID_802_11_CAPABILITY                   0x0d010122
+#endif
+
+#ifndef OID_802_11_PMKID
+	#define OID_802_11_PMKID                        0x0d010123
+#endif
+
+
+// For DDK-defined OIDs
+#define OID_NDIS_SEG1	0x00010100
+#define OID_NDIS_SEG2	0x00010200
+#define OID_NDIS_SEG3	0x00020100
+#define OID_NDIS_SEG4	0x01010100
+#define OID_NDIS_SEG5	0x01020100
+#define OID_NDIS_SEG6	0x01020200
+#define OID_NDIS_SEG7	0xFD010100
+#define OID_NDIS_SEG8	0x0D010100
+#define OID_NDIS_SEG9	0x0D010200
+#define OID_NDIS_SEG10	0x0D020200
+
+#define SZ_OID_NDIS_SEG1		  23
+#define SZ_OID_NDIS_SEG2		    3
+#define SZ_OID_NDIS_SEG3		    6
+#define SZ_OID_NDIS_SEG4		    6
+#define SZ_OID_NDIS_SEG5		    4
+#define SZ_OID_NDIS_SEG6		    8
+#define SZ_OID_NDIS_SEG7		    7
+#define SZ_OID_NDIS_SEG8		  36
+#define SZ_OID_NDIS_SEG9		  24
+#define SZ_OID_NDIS_SEG10		  19
+
+// For Realtek-defined OIDs
+#define OID_MP_SEG1		0xFF871100
+#define OID_MP_SEG2		0xFF818000
+
+#define OID_MP_SEG3		0xFF818700
+#define OID_MP_SEG4		0xFF011100
+
+#define DEBUG_OID(dbg, str)     		\
+       if((!dbg))				    			\
+      	{					    			\
+	   RT_TRACE(_module_rtl871x_ioctl_c_,_drv_info_,("%s(%d): %s", __FUNCTION__, __LINE__, str));	\
+      	}			
+
+
+enum oid_type
+{
+	QUERY_OID,
+	SET_OID
+};
+
+struct oid_funs_node {
+	unsigned int oid_start; //the starting number for OID
+	unsigned int oid_end; //the ending number for OID
+	struct oid_obj_priv *node_array; 
+	unsigned int array_sz; //the size of node_array
+	int query_counter; //count the number of query hits for this segment  
+	int set_counter; //count the number of set hits for this segment  
+};
+
+struct oid_par_priv
+{
+	void				*adapter_context;
+	NDIS_OID		oid;
+	void*			information_buf;
+	u32		information_buf_len;
+	u32*	bytes_rw;
+	u32*	bytes_needed;
+	enum oid_type	type_of_oid;
+	u32 		dbg;
+};
+
+struct oid_obj_priv {
+	unsigned char	dbg; // 0: without OID debug message  1: with OID debug message 
+	NDIS_STATUS (*oidfuns)(struct oid_par_priv *poid_par_priv);	
+};
+
+#ifdef CONFIG_MP_INCLUDED
+static NDIS_STATUS oid_null_function(struct oid_par_priv* poid_par_priv)
+{
+	_func_enter_;
+	_func_exit_;
+	return NDIS_STATUS_SUCCESS;
+}
+#endif
+
+#ifdef PLATFORM_WINDOWS
+
+int TranslateNdisPsToRtPs(IN NDIS_802_11_POWER_MODE	ndisPsMode);
+
+//OID Handler for Segment 1
+NDIS_STATUS oid_gen_supported_list_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_gen_hardware_status_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_gen_media_supported_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_gen_media_in_use_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_gen_maximum_lookahead_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_gen_maximum_frame_size_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_gen_link_speed_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_gen_transmit_buffer_space_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_gen_receive_buffer_space_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_gen_transmit_block_size_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_gen_receive_block_size_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_gen_vendor_id_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_gen_vendor_description_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_gen_current_packet_filter_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_gen_current_lookahead_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_gen_driver_version_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_gen_maximum_total_size_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_gen_protocol_options_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_gen_mac_options_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_gen_media_connect_status_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_gen_maximum_send_packets_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_gen_vendor_driver_version_hdl(struct oid_par_priv* poid_par_priv);
+
+
+//OID Handler for Segment 2
+NDIS_STATUS oid_gen_physical_medium_hdl(struct oid_par_priv* poid_par_priv);
+
+//OID Handler for Segment 3
+NDIS_STATUS oid_gen_xmit_ok_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_gen_rcv_ok_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_gen_xmit_error_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_gen_rcv_error_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_gen_rcv_no_buffer_hdl(struct oid_par_priv* poid_par_priv);
+
+
+//OID Handler for Segment 4
+NDIS_STATUS oid_802_3_permanent_address_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_3_current_address_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_3_multicast_list_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_3_maximum_list_size_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_3_mac_options_hdl(struct oid_par_priv* poid_par_priv);
+
+
+
+//OID Handler for Segment 5
+NDIS_STATUS oid_802_3_rcv_error_alignment_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_3_xmit_one_collision_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_3_xmit_more_collisions_hdl(struct oid_par_priv* poid_par_priv);
+
+
+//OID Handler for Segment 6
+NDIS_STATUS oid_802_3_xmit_deferred_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_3_xmit_max_collisions_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_3_rcv_overrun_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_3_xmit_underrun_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_3_xmit_heartbeat_failure_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_3_xmit_times_crs_lost_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_3_xmit_late_collisions_hdl(struct oid_par_priv* poid_par_priv);
+
+
+
+//OID Handler for Segment 7
+NDIS_STATUS oid_pnp_capabilities_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_pnp_set_power_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_pnp_query_power_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_pnp_add_wake_up_pattern_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_pnp_remove_wake_up_pattern_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_pnp_wake_up_pattern_list_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_pnp_enable_wake_up_hdl(struct oid_par_priv* poid_par_priv);
+
+
+
+//OID Handler for Segment 8
+NDIS_STATUS oid_802_11_bssid_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_ssid_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_infrastructure_mode_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_add_wep_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_remove_wep_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_disassociate_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_authentication_mode_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_privacy_filter_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_bssid_list_scan_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_encryption_status_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_reload_defaults_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_add_key_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_remove_key_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_association_information_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_test_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_media_stream_mode_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_capability_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_pmkid_hdl(struct oid_par_priv* poid_par_priv);
+
+
+
+
+
+//OID Handler for Segment 9
+NDIS_STATUS oid_802_11_network_types_supported_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_network_type_in_use_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_tx_power_level_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_rssi_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_rssi_trigger_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_fragmentation_threshold_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_rts_threshold_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_number_of_antennas_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_rx_antenna_selected_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_tx_antenna_selected_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_supported_rates_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_desired_rates_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_configuration_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_power_mode_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_802_11_bssid_list_hdl(struct oid_par_priv* poid_par_priv);
+
+
+//OID Handler for Segment 10
+NDIS_STATUS oid_802_11_statistics_hdl(struct oid_par_priv* poid_par_priv);
+
+
+//OID Handler for Segment ED 
+NDIS_STATUS oid_rt_mh_vender_id_hdl(struct oid_par_priv* poid_par_priv);
+
+void Set_802_3_MULTICAST_LIST(ADAPTER *pAdapter, UCHAR *MCListbuf, ULONG MCListlen, BOOLEAN bAcceptAllMulticast);
+
+#endif// end of PLATFORM_WINDOWS
+
+
+#ifdef PLATFORM_LINUX
+
+extern struct iw_handler_def  rtw_handlers_def;
+
+#endif
+
+extern	NDIS_STATUS drv_query_info(
+	IN	_nic_hdl		MiniportAdapterContext,
+	IN	NDIS_OID		Oid,
+	IN	void *			InformationBuffer,
+	IN	u32			InformationBufferLength,
+	OUT	u32*			BytesWritten,
+	OUT	u32*			BytesNeeded
+	);
+
+extern	NDIS_STATUS 	drv_set_info(
+	IN	_nic_hdl		MiniportAdapterContext,
+	IN	NDIS_OID		Oid,
+	IN	void *			InformationBuffer,
+	IN	u32			InformationBufferLength,
+	OUT	u32*			BytesRead,
+	OUT	u32*			BytesNeeded
+	);
+
+#endif // #ifndef __INC_CEINFO_
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_ioctl_query.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_ioctl_query.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_ioctl_query.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_ioctl_query.h	2017-09-23 03:42:50.050674966 +0800
@@ -0,0 +1,37 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef _RTW_IOCTL_QUERY_H_
+#define _RTW_IOCTL_QUERY_H_
+
+#include <drv_conf.h>
+#include <drv_types.h>
+
+
+#ifdef PLATFORM_WINDOWS
+
+u8 query_802_11_capability(_adapter*	padapter,u8*	pucBuf,u32 *	pulOutLen);
+u8 query_802_11_association_information (_adapter * padapter, PNDIS_802_11_ASSOCIATION_INFORMATION pAssocInfo);
+
+#endif
+
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_ioctl_rtl.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_ioctl_rtl.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_ioctl_rtl.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_ioctl_rtl.h	2017-09-23 03:42:50.050674966 +0800
@@ -0,0 +1,84 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef _RTW_IOCTL_RTL_H_
+#define _RTW_IOCTL_RTL_H_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+//************** oid_rtl_seg_01_01 ************** 
+NDIS_STATUS oid_rt_get_signal_quality_hdl(struct oid_par_priv* poid_par_priv);//84
+NDIS_STATUS oid_rt_get_small_packet_crc_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_get_middle_packet_crc_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_get_large_packet_crc_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_get_tx_retry_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_get_rx_retry_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_get_rx_total_packet_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_get_tx_beacon_ok_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_get_tx_beacon_err_hdl(struct oid_par_priv* poid_par_priv);
+
+NDIS_STATUS oid_rt_pro_set_fw_dig_state_hdl(struct oid_par_priv* poid_par_priv);	//8a
+NDIS_STATUS oid_rt_pro_set_fw_ra_state_hdl(struct oid_par_priv* poid_par_priv);	//8b
+
+NDIS_STATUS oid_rt_get_rx_icv_err_hdl(struct oid_par_priv* poid_par_priv);//93
+NDIS_STATUS oid_rt_set_encryption_algorithm_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_get_preamble_mode_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_get_ap_ip_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_get_channelplan_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_set_channelplan_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_set_preamble_mode_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_set_bcn_intvl_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_dedicate_probe_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_get_total_tx_bytes_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_get_total_rx_bytes_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_current_tx_power_level_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_get_enc_key_mismatch_count_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_get_enc_key_match_count_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_get_channel_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_get_hardware_radio_off_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_get_key_mismatch_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_supported_wireless_mode_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_get_channel_list_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_get_scan_in_progress_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_forced_data_rate_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_wireless_mode_for_scan_list_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_get_bss_wireless_mode_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_scan_with_magic_packet_hdl(struct oid_par_priv* poid_par_priv);
+
+//**************  oid_rtl_seg_01_03 section start ************** 
+NDIS_STATUS oid_rt_ap_get_associated_station_list_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_ap_switch_into_ap_mode_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_ap_supported_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_ap_set_passphrase_hdl(struct oid_par_priv* poid_par_priv);
+
+// oid_rtl_seg_01_11 
+NDIS_STATUS oid_rt_pro_rf_write_registry_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_rf_read_registry_hdl(struct oid_par_priv* poid_par_priv);
+
+//**************  oid_rtl_seg_03_00 section start **************  
+NDIS_STATUS oid_rt_get_connect_state_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_set_default_key_id_hdl(struct oid_par_priv* poid_par_priv);
+
+
+
+
+#endif
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_ioctl_set.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_ioctl_set.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_ioctl_set.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_ioctl_set.h	2017-09-23 03:42:50.050674966 +0800
@@ -0,0 +1,74 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef __RTW_IOCTL_SET_H_
+#define __RTW_IOCTL_SET_H_
+
+#include <drv_conf.h>
+#include <drv_types.h>
+
+
+typedef u8 NDIS_802_11_PMKID_VALUE[16];
+
+typedef struct _BSSIDInfo {
+	NDIS_802_11_MAC_ADDRESS  BSSID;
+	NDIS_802_11_PMKID_VALUE  PMKID;
+} BSSIDInfo, *PBSSIDInfo;
+
+
+#ifdef PLATFORM_OS_XP
+typedef struct _NDIS_802_11_PMKID {
+	u32	Length;
+	u32	BSSIDInfoCount;
+	BSSIDInfo BSSIDInfo[1];
+} NDIS_802_11_PMKID, *PNDIS_802_11_PMKID;
+#endif
+
+
+#ifdef PLATFORM_WINDOWS
+u8 rtw_set_802_11_reload_defaults(_adapter * padapter, NDIS_802_11_RELOAD_DEFAULTS reloadDefaults);
+u8 rtw_set_802_11_test(_adapter * padapter, NDIS_802_11_TEST * test);
+u8 rtw_set_802_11_pmkid(_adapter *pdapter, NDIS_802_11_PMKID *pmkid);
+
+u8 rtw_pnp_set_power_sleep(_adapter* padapter);
+u8 rtw_pnp_set_power_wakeup(_adapter* padapter);
+
+void rtw_pnp_resume_wk(void *context);
+void rtw_pnp_sleep_wk(void * context);
+
+#endif
+
+u8 rtw_set_802_11_add_key(_adapter * padapter, NDIS_802_11_KEY * key);
+u8 rtw_set_802_11_authentication_mode(_adapter *pdapter, NDIS_802_11_AUTHENTICATION_MODE authmode);
+u8 rtw_set_802_11_bssid(_adapter* padapter, u8 *bssid);
+u8 rtw_set_802_11_add_wep(_adapter * padapter, NDIS_802_11_WEP * wep);
+u8 rtw_set_802_11_disassociate(_adapter * padapter);
+u8 rtw_set_802_11_bssid_list_scan(_adapter* padapter);
+u8 rtw_set_802_11_infrastructure_mode(_adapter * padapter, NDIS_802_11_NETWORK_INFRASTRUCTURE networktype);
+u8 rtw_set_802_11_remove_wep(_adapter * padapter, u32 keyindex);
+u8 rtw_set_802_11_ssid(_adapter * padapter, NDIS_802_11_SSID * ssid);
+u8 rtw_set_802_11_remove_key(_adapter * padapter, NDIS_802_11_REMOVE_KEY * key);
+
+
+u8 rtw_validate_ssid(NDIS_802_11_SSID *ssid);
+
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_io.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_io.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_io.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_io.h	2017-09-23 03:42:50.050674966 +0800
@@ -0,0 +1,543 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef _RTW_IO_H_
+#define _RTW_IO_H_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <osdep_intf.h>
+
+#ifdef PLATFORM_LINUX
+#include <asm/byteorder.h>
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26))
+#include <asm/semaphore.h>
+#else
+#include <linux/semaphore.h>
+#endif
+#include <linux/list.h>
+//#include <linux/smp_lock.h>
+#include <linux/spinlock.h>
+#include <asm/atomic.h>
+
+#ifdef CONFIG_USB_HCI
+#include <linux/usb.h>
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
+#include <linux/usb_ch9.h>
+#else
+#include <linux/usb/ch9.h>
+#endif
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35))
+#define rtw_usb_buffer_alloc(dev, size, mem_flags, dma) usb_alloc_coherent((dev), (size), (mem_flags), (dma))
+#define rtw_usb_buffer_free(dev, size, addr, dma) usb_free_coherent((dev), (size), (addr), (dma))
+#else
+#define rtw_usb_buffer_alloc(dev, size, mem_flags, dma) usb_buffer_alloc((dev), (size), (mem_flags), (dma))
+#define rtw_usb_buffer_free(dev, size, addr, dma) usb_buffer_free((dev), (size), (addr), (dma))
+#endif
+
+
+#endif //CONFIG_USB_HCI
+
+#endif //PLATFORM_LINUX
+
+
+#define NUM_IOREQ		8
+
+#ifdef PLATFORM_WINDOWS
+#define MAX_PROT_SZ	64
+#endif
+#ifdef PLATFORM_LINUX
+#define MAX_PROT_SZ	(64-16)
+#endif
+
+#define _IOREADY			0
+#define _IO_WAIT_COMPLETE   1
+#define _IO_WAIT_RSP        2
+
+// IO COMMAND TYPE
+#define _IOSZ_MASK_		(0x7F)
+#define _IO_WRITE_		BIT(7)
+#define _IO_FIXED_		BIT(8)
+#define _IO_BURST_		BIT(9)
+#define _IO_BYTE_		BIT(10)
+#define _IO_HW_			BIT(11)
+#define _IO_WORD_		BIT(12)
+#define _IO_SYNC_		BIT(13)
+#define _IO_CMDMASK_	(0x1F80)
+
+
+/* 
+	For prompt mode accessing, caller shall free io_req
+	Otherwise, io_handler will free io_req
+*/
+
+
+
+// IO STATUS TYPE
+#define _IO_ERR_		BIT(2)
+#define _IO_SUCCESS_	BIT(1)
+#define _IO_DONE_		BIT(0)
+
+
+#define IO_RD32			(_IO_SYNC_ | _IO_WORD_)
+#define IO_RD16			(_IO_SYNC_ | _IO_HW_)
+#define IO_RD8			(_IO_SYNC_ | _IO_BYTE_)
+
+#define IO_RD32_ASYNC	(_IO_WORD_)
+#define IO_RD16_ASYNC	(_IO_HW_)
+#define IO_RD8_ASYNC	(_IO_BYTE_)
+
+#define IO_WR32			(_IO_WRITE_ | _IO_SYNC_ | _IO_WORD_)
+#define IO_WR16			(_IO_WRITE_ | _IO_SYNC_ | _IO_HW_)
+#define IO_WR8			(_IO_WRITE_ | _IO_SYNC_ | _IO_BYTE_)
+
+#define IO_WR32_ASYNC	(_IO_WRITE_ | _IO_WORD_)
+#define IO_WR16_ASYNC	(_IO_WRITE_ | _IO_HW_)
+#define IO_WR8_ASYNC	(_IO_WRITE_ | _IO_BYTE_)
+
+/*
+
+	Only Sync. burst accessing is provided.
+
+*/
+
+#define IO_WR_BURST(x)		(_IO_WRITE_ | _IO_SYNC_ | _IO_BURST_ | ( (x) & _IOSZ_MASK_))
+#define IO_RD_BURST(x)		(_IO_SYNC_ | _IO_BURST_ | ( (x) & _IOSZ_MASK_))
+
+
+
+//below is for the intf_option bit defition...
+
+#define _INTF_ASYNC_	BIT(0)	//support async io
+
+struct intf_priv;
+struct	intf_hdl;
+struct io_queue;
+
+struct	_io_ops {
+
+
+		uint (*_sdbus_read_bytes_to_membuf)(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf);
+		uint (*_sdbus_read_blocks_to_membuf)(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf);
+
+		void (*_attrib_read)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
+
+		u8 (*_read8)(struct intf_hdl *pintfhdl, u32 addr);
+		
+		u16 (*_read16)(struct intf_hdl *pintfhdl, u32 addr);
+		
+		u32 (*_read32)(struct intf_hdl *pintfhdl, u32 addr);
+
+
+		uint (*_sdbus_write_blocks_from_membuf)(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf,u8 async);
+
+		uint (*_sdbus_write_bytes_from_membuf)(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf);
+		u8 (*_cmd52r)(struct intf_priv *pintfpriv, u32 addr);
+		void (*_cmd52w)(struct intf_priv *pintfpriv, u32 addr, u8 val8);
+		u8 (*_cmdfunc152r)(struct intf_priv *pintfpriv, u32 addr);
+		void (*_cmdfunc152w)(struct intf_priv *pintfpriv, u32 addr, u8 val8);
+
+
+		void (*_attrib_write)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
+
+		int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
+		
+		int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
+		
+		int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
+
+		int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata);
+
+		int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
+		
+		int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
+		
+		int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
+		
+
+		void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
+		
+		void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
+		
+		void (*_sync_irp_protocol_rw)(struct io_queue *pio_q);
+
+
+		u32 (*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr);
+
+		u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
+		
+		u32 (*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
+
+		int (*_write_port_sync)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
+
+		u32 (*_write_scsi)(struct intf_hdl *pintfhdl,u32 cnt, u8 *pmem);
+
+
+		void (*_read_port_cancel)(struct intf_hdl *pintfhdl);
+		
+		void (*_write_port_cancel)(struct intf_hdl *pintfhdl);
+
+};
+
+struct io_req {	
+	_list	list;
+	u32	addr;	
+	volatile u32	val;
+	u32	command;
+	u32	status;
+	u8	*pbuf;	
+	_sema	sema;
+
+#ifdef PLATFORM_OS_CE
+#ifdef CONFIG_USB_HCI
+	// URB handler for rtw_write_mem
+	USB_TRANSFER usb_transfer_write_mem;
+#endif
+#endif
+	
+	void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt);
+	u8 *cnxt;	
+
+#ifdef PLATFORM_OS_XP	
+	PMDL pmdl;
+	PIRP  pirp; 
+
+#ifdef CONFIG_SDIO_HCI
+	PSDBUS_REQUEST_PACKET sdrp;
+#endif	
+
+#endif	
+
+
+};
+
+struct	intf_hdl {
+
+/*	
+	u32	intf_option;
+	u32	bus_status;
+	u32	do_flush;
+	u8	*adapter;
+	u8	*intf_dev;	
+	struct intf_priv	*pintfpriv;
+	u8	cnt;
+	void (*intf_hdl_init)(u8 *priv);
+	void (*intf_hdl_unload)(u8 *priv);
+	void (*intf_hdl_open)(u8 *priv);
+	void (*intf_hdl_close)(u8 *priv);
+	struct	_io_ops	io_ops;
+	//u8 intf_status;//moved to struct intf_priv
+	u16 len;
+	u16 done_len;	
+*/
+	_adapter *padapter;
+	struct dvobj_priv *pintf_dev;//	pointer to &(padapter->dvobjpriv);
+
+	struct _io_ops	io_ops;
+
+};
+
+struct reg_protocol_rd {
+
+#ifdef CONFIG_LITTLE_ENDIAN	
+
+	//DW1
+	u32		NumOfTrans:4;
+	u32		Reserved1:4;
+	u32		Reserved2:24;
+	//DW2
+	u32		ByteCount:7;
+	u32		WriteEnable:1;		//0:read, 1:write
+	u32		FixOrContinuous:1;	//0:continuous, 1: Fix
+	u32		BurstMode:1;
+	u32		Byte1Access:1;
+	u32		Byte2Access:1;
+	u32		Byte4Access:1;
+	u32		Reserved3:3;
+	u32		Reserved4:16;
+	//DW3
+	u32		BusAddress;
+	//DW4
+	//u32		Value;
+#else
+
+
+//DW1
+	u32 Reserved1  :4;
+	u32 NumOfTrans :4;	
+
+	u32 Reserved2  :24;	
+
+	//DW2
+	u32 WriteEnable : 1;
+	u32 ByteCount :7;	
+
+
+	u32 Reserved3 : 3;
+	u32 Byte4Access : 1;	
+
+	u32 Byte2Access : 1;
+	u32 Byte1Access : 1;	
+	u32 BurstMode :1 ;	
+	u32 FixOrContinuous : 1;	
+
+	u32 Reserved4 : 16;
+
+	//DW3
+	u32		BusAddress;
+
+	//DW4
+	//u32		Value;
+
+#endif
+	
+};
+
+
+struct reg_protocol_wt {
+	
+
+#ifdef CONFIG_LITTLE_ENDIAN
+
+	//DW1
+	u32		NumOfTrans:4;
+	u32		Reserved1:4;
+	u32		Reserved2:24;
+	//DW2
+	u32		ByteCount:7;
+	u32		WriteEnable:1;		//0:read, 1:write
+	u32		FixOrContinuous:1;	//0:continuous, 1: Fix
+	u32		BurstMode:1;
+	u32		Byte1Access:1;
+	u32		Byte2Access:1;
+	u32		Byte4Access:1;
+	u32		Reserved3:3;
+	u32		Reserved4:16;
+	//DW3
+	u32		BusAddress;
+	//DW4
+	u32		Value;
+
+#else
+	//DW1
+	u32 Reserved1  :4;
+	u32 NumOfTrans :4;	
+
+	u32 Reserved2  :24;	
+
+	//DW2
+	u32 WriteEnable : 1;
+	u32 ByteCount :7;	
+		
+	u32 Reserved3 : 3;
+	u32 Byte4Access : 1;	
+
+	u32 Byte2Access : 1;
+	u32 Byte1Access : 1;	
+	u32 BurstMode :1 ;	
+	u32 FixOrContinuous : 1;	
+
+	u32 Reserved4 : 16;
+
+	//DW3
+	u32		BusAddress;
+
+	//DW4
+	u32		Value;
+
+#endif
+
+};
+
+
+
+/*
+Below is the data structure used by _io_handler
+
+*/
+
+struct io_queue {	
+	_lock	lock;	
+	_list  	free_ioreqs;	
+	_list		pending;		//The io_req list that will be served in the single protocol read/write.	
+	_list		processing;
+	u8	*free_ioreqs_buf; // 4-byte aligned
+	u8	*pallocated_free_ioreqs_buf;
+	struct	intf_hdl	intf;
+};
+
+struct io_priv{
+	
+	_adapter *padapter;	
+		
+	struct intf_hdl intf;
+
+};
+
+extern uint ioreq_flush(_adapter *adapter, struct io_queue *ioqueue);
+extern void sync_ioreq_enqueue(struct io_req *preq,struct io_queue *ioqueue);
+extern uint sync_ioreq_flush(_adapter *adapter, struct io_queue *ioqueue);
+
+
+extern uint free_ioreq(struct io_req *preq, struct io_queue *pio_queue);
+extern struct io_req *alloc_ioreq(struct io_queue *pio_q);
+
+extern uint register_intf_hdl(u8 *dev, struct intf_hdl *pintfhdl);
+extern void unregister_intf_hdl(struct intf_hdl *pintfhdl);
+
+extern void _rtw_attrib_read(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
+extern void _rtw_attrib_write(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
+
+extern u8 _rtw_read8(_adapter *adapter, u32 addr);
+extern u16 _rtw_read16(_adapter *adapter, u32 addr);
+extern u32 _rtw_read32(_adapter *adapter, u32 addr);
+extern void _rtw_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
+extern void _rtw_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
+extern void _rtw_read_port_cancel(_adapter *adapter);
+
+
+extern int _rtw_write8(_adapter *adapter, u32 addr, u8 val);
+extern int _rtw_write16(_adapter *adapter, u32 addr, u16 val);
+extern int _rtw_write32(_adapter *adapter, u32 addr, u32 val);
+extern int _rtw_writeN(_adapter *adapter, u32 addr, u32 length, u8 *pdata);
+
+extern int _rtw_write8_async(_adapter *adapter, u32 addr, u8 val);
+extern int _rtw_write16_async(_adapter *adapter, u32 addr, u16 val);
+extern int _rtw_write32_async(_adapter *adapter, u32 addr, u32 val);
+
+extern void _rtw_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
+extern void _rtw_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
+extern int _rtw_write_port_sync(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
+extern void _rtw_write_port_cancel(_adapter *adapter);
+
+#ifdef DBG_IO
+extern int dbg_rtw_write8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line);
+extern int dbg_rtw_write16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line);
+extern int dbg_rtw_write32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line);
+extern int dbg_rtw_writeN(_adapter *adapter, u32 addr ,u32 length , u8 *data, const char *caller, const int line);
+
+#define rtw_read8(adapter, addr) _rtw_read8((adapter), (addr))
+#define rtw_read16(adapter, addr) _rtw_read16((adapter), (addr))
+#define rtw_read32(adapter, addr) _rtw_read32((adapter), (addr))
+#define rtw_read_mem(adapter, addr, cnt, mem) _rtw_read_mem((adapter), (addr), (cnt), (mem))
+#define rtw_read_port(adapter, addr, cnt, mem) _rtw_read_port((adapter), (addr), (cnt), (mem))
+#define rtw_read_port_cancel(adapter) _rtw_read_port_cancel((adapter))
+
+#define DBG_IO_WRITE_SNIFF_ADDR_START 0x24 //0x4c //0x4c // the starting address to sniff
+#define DBG_IO_WRITE_SNIFF_ADDR_END 0x27  //0x4c+ 1 // the ending address to sniff
+
+#define  rtw_write8(adapter, addr, val) dbg_rtw_write8((adapter), (addr), (val), __FUNCTION__, __LINE__)
+#define  rtw_write16(adapter, addr, val) dbg_rtw_write16((adapter), (addr), (val), __FUNCTION__, __LINE__)
+#define  rtw_write32(adapter, addr, val) dbg_rtw_write32((adapter), (addr), (val), __FUNCTION__, __LINE__)
+#define  rtw_writeN(adapter, addr, length, data) dbg_rtw_writeN((adapter), (addr), (length), (data), __FUNCTION__, __LINE__)
+
+#define rtw_write8_async(adapter, addr, val) _rtw_write8_async((adapter), (addr), (val))
+#define rtw_write16_async(adapter, addr, val) _rtw_write16_async((adapter), (addr), (val))
+#define rtw_write32_async(adapter, addr, val) _rtw_write32_async((adapter), (addr), (val))
+
+#define rtw_write_mem(adapter, addr, cnt, mem) _rtw_write_mem((adapter), addr, cnt, mem)
+#define rtw_write_port(adapter, addr, cnt, mem) _rtw_write_port(adapter, addr, cnt, mem)
+#define rtw_write_port_sync(adapter, addr, cnt, mem) _rtw_write_port_sync((adapter), (addr), (cnt), (mem))
+#define rtw_write_port_cancel(adapter) _rtw_write_port_cancel(adapter)
+#else //DBG_IO
+#define rtw_read8(adapter, addr) _rtw_read8((adapter), (addr))
+#define rtw_read16(adapter, addr) _rtw_read16((adapter), (addr))
+#define rtw_read32(adapter, addr) _rtw_read32((adapter), (addr))
+#define rtw_read_mem(adapter, addr, cnt, mem) _rtw_read_mem((adapter), (addr), (cnt), (mem))
+#define rtw_read_port(adapter, addr, cnt, mem) _rtw_read_port((adapter), (addr), (cnt), (mem))
+#define rtw_read_port_cancel(adapter) _rtw_read_port_cancel((adapter))
+
+#define  rtw_write8(adapter, addr, val) _rtw_write8((adapter), (addr), (val))
+#define  rtw_write16(adapter, addr, val) _rtw_write16((adapter), (addr), (val))
+#define  rtw_write32(adapter, addr, val) _rtw_write32((adapter), (addr), (val))
+#define  rtw_writeN(adapter, addr, length, data) _rtw_writeN((adapter), (addr), (length), (data))
+
+#define rtw_write8_async(adapter, addr, val) _rtw_write8_async((adapter), (addr), (val))
+#define rtw_write16_async(adapter, addr, val) _rtw_write16_async((adapter), (addr), (val))
+#define rtw_write32_async(adapter, addr, val) _rtw_write32_async((adapter), (addr), (val))
+
+#define rtw_write_mem(adapter, addr, cnt, mem) _rtw_write_mem((adapter), (addr), (cnt), (mem))
+#define rtw_write_port(adapter, addr, cnt, mem) _rtw_write_port((adapter), (addr), (cnt), (mem))
+#define rtw_write_port_sync(adapter, addr, cnt, mem) _rtw_write_port_sync((adapter), (addr), (cnt), (mem))
+#define rtw_write_port_cancel(adapter) _rtw_write_port_cancel((adapter))
+#endif //DBG_IO
+
+extern void rtw_write_scsi(_adapter *adapter, u32 cnt, u8 *pmem);
+
+//ioreq 
+extern void ioreq_read8(_adapter *adapter, u32 addr, u8 *pval);
+extern void ioreq_read16(_adapter *adapter, u32 addr, u16 *pval);	
+extern void ioreq_read32(_adapter *adapter, u32 addr, u32 *pval);
+extern void ioreq_write8(_adapter *adapter, u32 addr, u8 val);
+extern void ioreq_write16(_adapter *adapter, u32 addr, u16 val);
+extern void ioreq_write32(_adapter *adapter, u32 addr, u32 val);
+
+
+extern uint async_read8(_adapter *adapter, u32 addr, u8 *pbuff,
+	void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); 
+extern uint async_read16(_adapter *adapter, u32 addr,  u8 *pbuff,
+	void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); 
+extern uint async_read32(_adapter *adapter, u32 addr,  u8 *pbuff,
+	void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); 
+
+extern void async_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
+extern void async_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
+
+extern void async_write8(_adapter *adapter, u32 addr, u8 val,
+	void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt);
+extern void async_write16(_adapter *adapter, u32 addr, u16 val,
+	void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt);
+extern void async_write32(_adapter *adapter, u32 addr, u32 val,
+	void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt);
+
+extern void async_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
+extern void async_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
+
+
+int rtw_init_io_priv(_adapter *padapter);
+
+
+extern uint alloc_io_queue(_adapter *adapter);
+extern void free_io_queue(_adapter *adapter);
+extern void async_bus_io(struct io_queue *pio_q);
+extern void bus_sync_io(struct io_queue *pio_q);
+extern u32 _ioreq2rwmem(struct io_queue *pio_q);
+extern void dev_power_down(_adapter * Adapter, u8 bpwrup);
+
+/*
+#define RTL_R8(reg)		rtw_read8(padapter, reg)
+#define RTL_R16(reg)            rtw_read16(padapter, reg)
+#define RTL_R32(reg)            rtw_read32(padapter, reg)
+#define RTL_W8(reg, val8)       rtw_write8(padapter, reg, val8)
+#define RTL_W16(reg, val16)     rtw_write16(padapter, reg, val16)
+#define RTL_W32(reg, val32)     rtw_write32(padapter, reg, val32)
+*/
+
+/*
+#define RTL_W8_ASYNC(reg, val8) rtw_write32_async(padapter, reg, val8)
+#define RTL_W16_ASYNC(reg, val16) rtw_write32_async(padapter, reg, val16)
+#define RTL_W32_ASYNC(reg, val32) rtw_write32_async(padapter, reg, val32)
+
+#define RTL_WRITE_BB(reg, val32)	phy_SetUsbBBReg(padapter, reg, val32)
+#define RTL_READ_BB(reg)	phy_QueryUsbBBReg(padapter, reg)
+*/
+
+#endif	//_RTL8711_IO_H_
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_iol.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_iol.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_iol.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_iol.h	2017-09-23 03:42:50.050674966 +0800
@@ -0,0 +1,87 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __RTW_IOL_H_
+#define __RTW_IOL_H_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+typedef struct _io_offload_cmd {
+	u8 rsvd0;
+	u8 cmd;
+	u16 address;
+	u32 value;
+} IO_OFFLOAD_CMD, IOL_CMD;
+
+#define IOL_CMD_LLT			0x00
+//#define IOL_CMD_R_EFUSE	0x01
+#define IOL_CMD_WB_REG		0x02
+#define IOL_CMD_WW_REG 	0x03
+#define IOL_CMD_WD_REG		0x04
+//#define IOL_CMD_W_RF		0x05
+#define IOL_CMD_DELAY_US	0x80
+#define IOL_CMD_DELAY_MS	0x81
+//#define IOL_CMD_DELAY_S	0x82
+#define IOL_CMD_END			0x83
+
+/*****************************************************
+CMD					Address			Value
+(B1)					(B2/B3:H/L addr)	(B4:B7 : MSB:LSB)
+******************************************************
+IOL_CMD_LLT			-				B7: PGBNDY
+//IOL_CMD_R_EFUSE	-				-
+IOL_CMD_WB_REG		0x0~0xFFFF		B7
+IOL_CMD_WW_REG	0x0~0xFFFF		B6~B7
+IOL_CMD_WD_REG	0x0~0xFFFF		B4~B7
+//IOL_CMD_W_RF		RF Reg			B5~B7
+IOL_CMD_DELAY_US	-				B6~B7
+IOL_CMD_DELAY_MS	-				B6~B7
+//IOL_CMD_DELAY_S	-				B6~B7
+IOL_CMD_END		-				-
+******************************************************/
+
+struct xmit_frame	*rtw_IOL_accquire_xmit_frame(ADAPTER *adapter);
+int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds, u32 cmd_len);
+int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary);
+int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value);
+int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value);
+int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value);
+int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us);
+int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms);
+int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame);
+int rtw_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms);
+int rtw_IOL_exec_cmd_array_sync(PADAPTER adapter, u8 *IOL_cmds, u32 cmd_num, u32 max_wating_ms);
+int rtw_IOL_exec_empty_cmds_sync(ADAPTER *adapter, u32 max_wating_ms);
+
+#ifdef DBG_IO
+int dbg_rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, const char *caller, const int line);
+int dbg_rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, const char *caller, const int line);
+int dbg_rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, const char *caller, const int line);
+#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__)
+#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__)
+#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__)
+#else
+#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value) _rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value))
+#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value) _rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value))
+#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value) _rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value))
+#endif
+
+#endif //__RTW_IOL_H_
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_led.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_led.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_led.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_led.h	2017-09-23 03:42:50.054674955 +0800
@@ -0,0 +1,214 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef __RTW_LED_H_
+#define __RTW_LED_H_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+#define MSECS(t)        (HZ * ((t) / 1000) + (HZ * ((t) % 1000)) / 1000)
+
+typedef enum _LED_CTL_MODE{
+        LED_CTL_POWER_ON = 1,
+        LED_CTL_LINK = 2,
+        LED_CTL_NO_LINK = 3,
+        LED_CTL_TX = 4,
+        LED_CTL_RX = 5,
+        LED_CTL_SITE_SURVEY = 6,
+        LED_CTL_POWER_OFF = 7,
+        LED_CTL_START_TO_LINK = 8,
+        LED_CTL_START_WPS = 9,
+        LED_CTL_STOP_WPS = 10,
+        LED_CTL_START_WPS_BOTTON = 11, //added for runtop
+        LED_CTL_STOP_WPS_FAIL = 12, //added for ALPHA	
+	 LED_CTL_STOP_WPS_FAIL_OVERLAP = 13, //added for BELKIN
+}LED_CTL_MODE;
+
+
+#ifdef CONFIG_USB_HCI
+//================================================================================
+// LED object.
+//================================================================================
+
+typedef enum _LED_STATE_871x{
+	LED_UNKNOWN = 0,
+	LED_ON = 1,
+	LED_OFF = 2,
+	LED_BLINK_NORMAL = 3,
+	LED_BLINK_SLOWLY = 4,
+	LED_POWER_ON_BLINK = 5,
+	LED_SCAN_BLINK = 6, // LED is blinking during scanning period, the # of times to blink is depend on time for scanning.
+	LED_NO_LINK_BLINK = 7, // LED is blinking during no link state.
+	LED_BLINK_StartToBlink = 8,// Customzied for Sercomm Printer Server case
+	LED_BLINK_WPS = 9,	// LED is blinkg during WPS communication	
+	LED_TXRX_BLINK = 10,
+	LED_BLINK_WPS_STOP = 11,	//for ALPHA	
+	LED_BLINK_WPS_STOP_OVERLAP = 12,	//for BELKIN
+}LED_STATE_871x;
+
+#define IS_LED_WPS_BLINKING(_LED_871x)	(((PLED_871x)_LED_871x)->CurrLedState==LED_BLINK_WPS \
+					|| ((PLED_871x)_LED_871x)->CurrLedState==LED_BLINK_WPS_STOP \
+					|| ((PLED_871x)_LED_871x)->bLedWPSBlinkInProgress)
+
+#define IS_LED_BLINKING(_LED_871x) 	(((PLED_871x)_LED_871x)->bLedWPSBlinkInProgress \
+					||((PLED_871x)_LED_871x)->bLedScanBlinkInProgress)
+
+typedef enum _LED_PIN_871x{
+	LED_PIN_GPIO0,
+	LED_PIN_LED0,
+	LED_PIN_LED1
+}LED_PIN_871x;
+
+typedef struct _LED_871x{
+	_adapter				*padapter;
+	LED_PIN_871x		LedPin;	// Identify how to implement this SW led.
+	LED_STATE_871x		CurrLedState; // Current LED state.
+	u8					bLedOn; // true if LED is ON, false if LED is OFF.
+
+	u8					bSWLedCtrl;
+
+	u8					bLedBlinkInProgress; // true if it is blinking, false o.w..
+	// ALPHA, added by chiyoko, 20090106
+	u8					bLedNoLinkBlinkInProgress;
+	u8					bLedLinkBlinkInProgress;
+	u8					bLedStartToLinkBlinkInProgress;
+	u8					bLedScanBlinkInProgress;
+	u8					bLedWPSBlinkInProgress;
+	
+	u32					BlinkTimes; // Number of times to toggle led state for blinking.
+	LED_STATE_871x		BlinkingLedState; // Next state for blinking, either LED_ON or LED_OFF are.
+
+	_timer				BlinkTimer; // Timer object for led blinking.
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
+	_workitem			BlinkWorkItem; // Workitem used by BlinkTimer to manipulate H/W to blink LED.
+#endif
+} LED_871x, *PLED_871x;
+
+
+//================================================================================
+// LED customization.
+//================================================================================
+
+typedef	enum _LED_STRATEGY_871x{
+	SW_LED_MODE0, // SW control 1 LED via GPIO0. It is default option.
+	SW_LED_MODE1, // 2 LEDs, through LED0 and LED1. For ALPHA.
+	SW_LED_MODE2, // SW control 1 LED via GPIO0, customized for AzWave 8187 minicard.
+	SW_LED_MODE3, // SW control 1 LED via GPIO0, customized for Sercomm Printer Server case.
+	SW_LED_MODE4, //for Edimax / Belkin
+	SW_LED_MODE5, //for Sercomm / Belkin
+	SW_LED_MODE6, //for 88CU minicard, porting from ce SW_LED_MODE7
+	HW_LED, // HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes, see MAC.CONFIG1 for details.)
+}LED_STRATEGY_871x, *PLED_STRATEGY_871x;
+#endif //CONFIG_USB_HCI
+
+#ifdef CONFIG_PCI_HCI
+//================================================================================
+// LED object.
+//================================================================================
+
+typedef	enum _LED_STATE_871x{
+	LED_UNKNOWN = 0,
+	LED_ON = 1,
+	LED_OFF = 2,
+	LED_BLINK_NORMAL = 3,
+	LED_BLINK_SLOWLY = 4,
+	LED_POWER_ON_BLINK = 5,
+	LED_SCAN_BLINK = 6, // LED is blinking during scanning period, the # of times to blink is depend on time for scanning.
+	LED_NO_LINK_BLINK = 7, // LED is blinking during no link state.
+	LED_BLINK_StartToBlink = 8, 
+	LED_BLINK_TXRX = 9,
+	LED_BLINK_RUNTOP = 10, // Customized for RunTop
+	LED_BLINK_CAMEO = 11,
+}LED_STATE_871x;
+
+typedef enum _LED_PIN_871x{
+	LED_PIN_GPIO0,
+	LED_PIN_LED0,
+	LED_PIN_LED1,
+	LED_PIN_LED2
+}LED_PIN_871x;
+
+typedef struct _LED_871x{
+	_adapter				*padapter;
+
+	LED_PIN_871x		LedPin;	// Identify how to implement this SW led.
+
+	LED_STATE_871x		CurrLedState; // Current LED state.
+	u8					bLedOn; // TRUE if LED is ON, FALSE if LED is OFF.
+
+	u8					bLedBlinkInProgress; // TRUE if it is blinking, FALSE o.w..
+	u8					bLedWPSBlinkInProgress; // TRUE if it is blinking, FALSE o.w..
+
+	u8					bLedSlowBlinkInProgress;//added by vivi, for led new mode
+	u32					BlinkTimes; // Number of times to toggle led state for blinking.
+	LED_STATE_871x		BlinkingLedState; // Next state for blinking, either LED_ON or LED_OFF are.
+
+	_timer				BlinkTimer; // Timer object for led blinking.
+} LED_871x, *PLED_871x;
+
+
+//================================================================================
+// LED customization.
+//================================================================================
+
+typedef	enum _LED_STRATEGY_871x{
+	SW_LED_MODE0, // SW control 1 LED via GPIO0. It is default option.
+	SW_LED_MODE1, // SW control for PCI Express
+	SW_LED_MODE2, // SW control for Cameo.
+	SW_LED_MODE3, // SW contorl for RunTop.
+	SW_LED_MODE4, // SW control for Netcore
+	SW_LED_MODE5, //added by vivi, for led new mode, DLINK
+	SW_LED_MODE6, //added by vivi, for led new mode, PRONET
+	SW_LED_MODE7, //added by chiyokolin, for Lenovo, PCI Express Minicard Spec Rev.1.2 spec
+	SW_LED_MODE8, //added by chiyokolin, for QMI
+	SW_LED_MODE9, //added by chiyokolin, for BITLAND, PCI Express Minicard Spec Rev.1.1 
+	SW_LED_MODE10, //added by chiyokolin, for Edimax-ASUS
+	HW_LED, // HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes)
+}LED_STRATEGY_871x, *PLED_STRATEGY_871x;
+
+#define LED_CM8_BLINK_INTERVAL		500	//for QMI
+#endif //CONFIG_PCI_HCI
+
+struct led_priv{
+	/* add for led controll */
+	LED_871x			SwLed0;
+	LED_871x			SwLed1;
+	LED_STRATEGY_871x	LedStrategy;
+	u8					bRegUseLed;
+	void (*LedControlHandler)(_adapter *padapter, LED_CTL_MODE LedAction);
+	/* add for led controll */
+};
+
+#ifdef CONFIG_SW_LED
+#define rtw_led_control(adapter, LedAction) \
+	do { \
+		if((adapter)->ledpriv.LedControlHandler) \
+			(adapter)->ledpriv.LedControlHandler((adapter), (LedAction)); \
+	} while(0)
+#else //CONFIG_SW_LED
+#define rtw_led_control(adapter, LedAction)
+#endif //CONFIG_SW_LED
+
+extern void BlinkHandler(PLED_871x	 pLed);
+
+#endif //__RTW_LED_H_
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_mlme_ext.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_mlme_ext.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_mlme_ext.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_mlme_ext.h	2017-09-23 03:42:50.054674955 +0800
@@ -0,0 +1,763 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef __RTW_MLME_EXT_H_
+#define __RTW_MLME_EXT_H_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <wlan_bssdef.h>
+
+
+//	Commented by Albert 20101105
+//	Increase the SURVEY_TO value from 100 to 150  ( 100ms to 150ms )
+//	The Realtek 8188CE SoftAP will spend around 100ms to send the probe response after receiving the probe request.
+//	So, this driver tried to extend the dwell time for each scanning channel.
+//	This will increase the chance to receive the probe response from SoftAP.
+
+#define SURVEY_TO		(100)
+#define REAUTH_TO		(300) //(50)
+#define REASSOC_TO		(300) //(50)
+//#define DISCONNECT_TO	(3000)
+#define ADDBA_TO			(2000)
+
+#define LINKED_TO (1) //unit:2 sec, 1x2=2 sec
+
+#define REAUTH_LIMIT	(2)
+#define REASSOC_LIMIT	(2)
+#define READDBA_LIMIT	(2)
+
+//#define	IOCMD_REG0		0x10250370		 	
+//#define	IOCMD_REG1		0x10250374
+//#define	IOCMD_REG2		0x10250378
+
+//#define	FW_DYNAMIC_FUN_SWITCH	0x10250364
+
+//#define	WRITE_BB_CMD		0xF0000001
+//#define	SET_CHANNEL_CMD	0xF3000000
+//#define	UPDATE_RA_CMD	0xFD0000A2
+
+#define	DYNAMIC_FUNC_DISABLE		(0x0)
+#define	DYNAMIC_FUNC_DIG			BIT(0)
+#define	DYNAMIC_FUNC_HP			BIT(1)
+#define	DYNAMIC_FUNC_SS			BIT(2) //Tx Power Tracking
+#define DYNAMIC_FUNC_BT			BIT(3)
+#define DYNAMIC_FUNC_ANT_DIV		BIT(4)
+
+#define _HW_STATE_NOLINK_		0x00
+#define _HW_STATE_ADHOC_		0x01
+#define _HW_STATE_STATION_ 	0x02
+#define _HW_STATE_AP_			0x03
+
+
+#define		_1M_RATE_	0
+#define		_2M_RATE_	1
+#define		_5M_RATE_	2
+#define		_11M_RATE_	3
+#define		_6M_RATE_	4
+#define		_9M_RATE_	5
+#define		_12M_RATE_	6
+#define		_18M_RATE_	7
+#define		_24M_RATE_	8
+#define		_36M_RATE_	9
+#define		_48M_RATE_	10
+#define		_54M_RATE_	11
+
+
+//
+// Channel Plan Type.
+// Note: 
+//	We just add new channel plan when the new channel plan is different from any of the following 
+//	channel plan. 
+//	If you just wnat to customize the acitions(scan period or join actions) about one of the channel plan,
+//	customize them in RT_CHANNEL_INFO in the RT_CHANNEL_LIST.
+// 
+typedef enum _RT_CHANNEL_DOMAIN
+{
+	RT_CHANNEL_DOMAIN_FCC = 0,
+	RT_CHANNEL_DOMAIN_IC = 1,
+	RT_CHANNEL_DOMAIN_ETSI = 2,
+	RT_CHANNEL_DOMAIN_SPAIN = 3,
+	RT_CHANNEL_DOMAIN_FRANCE = 4,
+	RT_CHANNEL_DOMAIN_MKK = 5,
+	RT_CHANNEL_DOMAIN_MKK1 = 6,
+	RT_CHANNEL_DOMAIN_ISRAEL = 7,
+	RT_CHANNEL_DOMAIN_TELEC = 8,
+#if 0 /* Not using EEPROM_CHANNEL_PLAN directly */
+	RT_CHANNEL_DOMAIN_MIC = 9,				// Be compatible with old channel plan. No good!
+	RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN = 10,		// Be compatible with old channel plan. No good!
+	RT_CHANNEL_DOMAIN_WORLD_WIDE_13 = 11,		// Be compatible with old channel plan. No good!
+	RT_CHANNEL_DOMAIN_TELEC_NETGEAR = 12,		// Be compatible with old channel plan. No good!
+	RT_CHANNEL_DOMAIN_NCC = 13,
+#endif /* Not using EEPROM_CHANNEL_PLAN directly */
+	RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN = 0x09,
+	RT_CHANNEL_DOMAIN_WORLD_WIDE_13 = 0x0A,
+	RT_CHANNEL_DOMAIN_NCC = 0x0B,
+	RT_CHANNEL_DOMAIN_CHINA = 0x0C,
+	RT_CHANNEL_DOMAIN_SINGAPORE_INDIA_MEXICO = 0x0D,
+	RT_CHANNEL_DOMAIN_KOREA = 0x0E,
+	RT_CHANNEL_DOMAIN_TURKEY = 0x0F,
+	RT_CHANNEL_DOMAIN_JAPAN = 0x10,
+	RT_CHANNEL_DOMAIN_FCC_NO_DFS = 0x11,
+	RT_CHANNEL_DOMAIN_WORLD_WIDE37 = 0x12,
+	//===== Add new channel plan above this line===============//
+	RT_CHANNEL_DOMAIN_MAX,
+}RT_CHANNEL_DOMAIN, *PRT_CHANNEL_DOMAIN;
+
+#define rtw_is_channel_plan_valid(chplan) (chplan>=0 && chplan<RT_CHANNEL_DOMAIN_MAX)
+
+#define	MAX_SCAN_CHANNEL_NUM			54
+
+typedef struct _RT_CHANNEL_PLAN
+{
+	unsigned char	Channel[MAX_CHANNEL_NUM];
+	unsigned char	Len;
+}RT_CHANNEL_PLAN, *PRT_CHANNEL_PLAN;
+
+enum Associated_AP
+{
+	atherosAP	= 0,
+	broadcomAP	= 1,
+	ciscoAP		= 2,
+	marvellAP	= 3,
+	ralinkAP	= 4,
+	realtekAP	= 5,
+	airgocapAP 	= 6,
+	unknownAP	= 7,
+	maxAP,
+};
+
+enum SCAN_STATE
+{
+	SCAN_DISABLE = 0,
+	SCAN_START = 1,
+	SCAN_TXNULL = 2,
+	SCAN_PROCESS = 3,
+	SCAN_COMPLETE = 4,
+	SCAN_STATE_MAX,
+};
+
+struct mlme_handler {
+	unsigned int   num;
+	char* str;
+	unsigned int (*func)(_adapter *padapter, union recv_frame *precv_frame);
+};
+
+struct action_handler {
+	unsigned int   num;
+	char* str;
+	unsigned int (*func)(_adapter *padapter, union recv_frame *precv_frame);
+};
+
+struct	ss_res	
+{
+	int	state;
+	int	bss_cnt;
+	int	channel_idx;
+	int	scan_mode;
+	NDIS_802_11_SSID ssid[RTW_SSID_SCAN_AMOUNT];
+};
+
+//#define AP_MODE				0x0C
+//#define STATION_MODE	0x08
+//#define AD_HOC_MODE		0x04
+//#define NO_LINK_MODE	0x00
+
+#define 	WIFI_FW_NULL_STATE			_HW_STATE_NOLINK_
+#define	WIFI_FW_STATION_STATE		_HW_STATE_STATION_
+#define	WIFI_FW_AP_STATE				_HW_STATE_AP_
+#define	WIFI_FW_ADHOC_STATE			_HW_STATE_ADHOC_
+
+#define	WIFI_FW_AUTH_NULL			0x00000100
+#define	WIFI_FW_AUTH_STATE			0x00000200
+#define	WIFI_FW_AUTH_SUCCESS			0x00000400
+
+#define	WIFI_FW_ASSOC_STATE			0x00002000
+#define	WIFI_FW_ASSOC_SUCCESS		0x00004000
+
+#define	WIFI_FW_LINKING_STATE		(WIFI_FW_AUTH_NULL | WIFI_FW_AUTH_STATE | WIFI_FW_AUTH_SUCCESS |WIFI_FW_ASSOC_STATE)
+
+#ifdef CONFIG_TDLS
+/* TDLS STA state */
+#define	UN_TDLS_STATE					0x00000000	//default state
+#define	TDLS_INITIATOR_STATE			0x10000000
+#define	TDLS_RESPONDER_STATE			0x20000000
+#define	TDLS_LINKED_STATE				0x40000000
+#define	TDLS_CH_SWITCH_ON_STATE		0x01000000
+#define	TDLS_PEER_AT_OFF_STATE		0x02000000	//could send pkt on target ch
+#define	TDLS_AT_OFF_CH_STATE			0x04000000
+#define	TDLS_CH_SW_INITIATOR_STATE	0x08000000	//avoiding duplicated or unconditional ch. switch rsp.
+#define	TDLS_APSD_CHSW_STATE		0x00100000	//in APSD and want to setup channel switch
+#define	TDLS_PEER_SLEEP_STATE		0x00200000	//peer sta is sleeping
+#define	TDLS_SW_OFF_STATE			0x00400000	//terminate channel swithcing
+#define	TPK_RESEND_COUNT				301
+#define 	CH_SWITCH_TIME				10
+#define 	CH_SWITCH_TIMEOUT			30
+#endif
+
+struct FW_Sta_Info
+{
+	struct sta_info	*psta;
+	u32	status;
+	u32	rx_pkt;
+	u32	retry;
+	NDIS_802_11_RATES_EX  SupportedRates;
+};
+
+struct mlme_ext_info
+{
+	u32	state;
+	u32	reauth_count;
+	u32	reassoc_count;
+	u32	link_count;
+	u32	auth_seq;
+	u32	auth_algo;	// 802.11 auth, could be open, shared, auto
+	u32	authModeToggle;
+	u32	enc_algo;//encrypt algorithm;
+	u32	key_index;	// this is only valid for legendary wep, 0~3 for key id.
+	u32	iv;
+	u8	chg_txt[128];
+	u16	aid;
+	u16	bcn_interval;
+	u16	capability;
+	u8	assoc_AP_vendor;
+	u8	slotTime;
+	u8	preamble_mode;
+	u8	WMM_enable;
+	u8	ERP_enable;
+	u8	ERP_IE;
+	u8	HT_enable;
+	u8	HT_caps_enable;	
+	u8	HT_info_enable;
+	u8	HT_protection;
+	u8	turboMode_cts2self;
+	u8	turboMode_rtsen;
+	u8	SM_PS;
+	u8	agg_enable_bitmap;
+	u8	ADDBA_retry_count;
+	u8	candidate_tid_bitmap;
+	u8	dialogToken;
+	// Accept ADDBA Request
+	BOOLEAN bAcceptAddbaReq;
+	u8	bwmode_updated;
+
+#ifdef CONFIG_TDLS
+	uint				tdls_setup_state;
+	u8				tdls_sta_cnt;
+	u8				tdls_dis_req;
+	u8				tdls_cam_entry_to_write;	//cam entry that is empty to write
+	u8				tdls_cam_entry_to_clear;	//cam entry that is trying to clear, using in direct link teardown
+	u8				tdls_ch_sensing;
+	u8				tdls_cur_channel;
+	u8				tdls_candidate_ch;
+	u8				tdls_collect_pkt_num[14];
+#endif
+
+	struct ADDBA_request		ADDBA_req;
+	struct WMM_para_element	WMM_param;
+	struct HT_caps_element	HT_caps;
+	struct HT_info_element		HT_info;
+	WLAN_BSSID_EX			network;//join network or bss_network, if in ap mode, it is the same to cur_network.network
+	struct FW_Sta_Info		FW_sta_info[NUM_STA];
+};
+
+// The channel information about this channel including joining, scanning, and power constraints.
+typedef struct _RT_CHANNEL_INFO
+{
+	u8				ChannelNum;		// The channel number.
+	RT_SCAN_TYPE	ScanType;		// Scan type such as passive or active scan.
+	//u16				ScanPeriod;		// Listen time in millisecond in this channel.
+	//s32				MaxTxPwrDbm;	// Max allowed tx power.
+	//u32				ExInfo;			// Extended Information for this channel.
+#ifdef CONFIG_FIND_BEST_CHANNEL
+	u32				rx_count;
+#endif
+}RT_CHANNEL_INFO, *PRT_CHANNEL_INFO;
+
+extern int rtw_is_channel_set_contains_channel(RT_CHANNEL_INFO *channel_set, const u32 channel_num);
+
+struct mlme_ext_priv
+{
+	_adapter	*padapter;
+	u8	mlmeext_init;
+	ATOMIC_T		event_seq;
+	u16	mgnt_seq;
+	
+	//struct fw_priv 	fwpriv;
+	
+	unsigned char	cur_channel;
+	unsigned char	cur_bwmode;
+	unsigned char	cur_ch_offset;//PRIME_CHNL_OFFSET
+	unsigned char	cur_wireless_mode;	
+	unsigned char	max_chan_nums;
+	RT_CHANNEL_INFO		channel_set[MAX_CHANNEL_NUM];
+	unsigned char	basicrate[NumRates];
+	unsigned char	datarate[NumRates];
+	
+	struct ss_res		sitesurvey_res;		
+	struct mlme_ext_info	mlmext_info;//for sta/adhoc mode, including current scanning/connecting/connected related info.
+                                                     //for ap mode, network includes ap's cap_info
+	_timer		survey_timer;
+	_timer		link_timer;
+	//_timer		ADDBA_timer;
+	u16			chan_scan_time;
+
+	u32	linked_to;//linked timeout
+	u32	retry; //retry for issue probereq
+	
+	u64 TSFValue;
+
+#ifdef CONFIG_TDLS
+	_workitem TDLS_restore_workitem;
+#endif
+	
+#ifdef CONFIG_AP_MODE	
+	unsigned char bstart_bss;
+#endif
+
+};
+
+int init_mlme_ext_priv(_adapter* padapter);
+int init_hw_mlme_ext(_adapter *padapter);
+void free_mlme_ext_priv (struct mlme_ext_priv *pmlmeext);
+extern void init_mlme_ext_timer(_adapter *padapter);
+extern void init_addba_retry_timer(_adapter *padapter, struct sta_info *psta);
+
+extern struct xmit_frame *alloc_mgtxmitframe(struct xmit_priv *pxmitpriv);
+
+//void fill_fwpriv(_adapter * padapter, struct fw_priv *pfwpriv);
+
+unsigned char networktype_to_raid(unsigned char network_type);
+int judge_network_type(_adapter *padapter, unsigned char *rate, int ratelen);
+void get_rate_set(_adapter *padapter, unsigned char *pbssrate, int *bssrate_len);
+
+void Save_DM_Func_Flag(_adapter *padapter);
+void Restore_DM_Func_Flag(_adapter *padapter);
+void Switch_DM_Func(_adapter *padapter, u8 mode, u8 enable);
+
+void Set_NETYPE1_MSR(_adapter *padapter, u8 type);
+void Set_NETYPE0_MSR(_adapter *padapter, u8 type);
+
+void set_channel_bwmode(_adapter *padapter, unsigned char channel, unsigned char channel_offset, unsigned short bwmode);
+void SelectChannel(_adapter *padapter, unsigned char channel);
+void SetBWMode(_adapter *padapter, unsigned short bwmode, unsigned char channel_offset);
+
+unsigned int decide_wait_for_beacon_timeout(unsigned int bcn_interval);
+
+void write_cam(_adapter *padapter, u8 entry, u16 ctrl, u8 *mac, u8 *key);
+void clear_cam_entry(_adapter *padapter, u8 entry);
+
+void invalidate_cam_all(_adapter *padapter);
+void CAM_empty_entry(PADAPTER Adapter, u8 ucIndex);
+
+
+int allocate_fw_sta_entry(_adapter *padapter);
+void flush_all_cam_entry(_adapter *padapter);
+
+BOOLEAN IsLegal5GChannel(PADAPTER Adapter, u8 channel);
+
+void site_survey(_adapter *padapter);
+u8 collect_bss_info(_adapter *padapter, union recv_frame *precv_frame, WLAN_BSSID_EX *bssid);
+
+int get_bsstype(unsigned short capability);
+u8* get_my_bssid(WLAN_BSSID_EX *pnetwork);
+u16 get_beacon_interval(WLAN_BSSID_EX *bss);
+
+int is_client_associated_to_ap(_adapter *padapter);
+int is_client_associated_to_ibss(_adapter *padapter);
+int is_IBSS_empty(_adapter *padapter);
+
+unsigned char check_assoc_AP(u8 *pframe, uint len);
+
+int WMM_param_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs	pIE);
+void WMMOnAssocRsp(_adapter *padapter);
+
+void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE);
+void HT_info_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE);
+void HTOnAssocRsp(_adapter *padapter);
+
+void ERP_IE_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE);
+void VCS_update(_adapter *padapter, struct sta_info *psta);
+
+void update_beacon_info(_adapter *padapter, u8 *pframe, uint len, struct sta_info *psta);
+#ifdef CONFIG_DFS
+void process_csa_ie(_adapter *padapter, u8 *pframe, uint len);
+#endif //CONFIG_DFS
+void update_IOT_info(_adapter *padapter);
+void update_capinfo(PADAPTER Adapter, u16 updateCap);
+void update_wireless_mode(_adapter * padapter);
+void update_bmc_sta_support_rate(_adapter *padapter, u32 mac_id);
+int update_sta_support_rate(_adapter *padapter, u8* pvar_ie, uint var_ie_len, int cam_idx);
+
+//for sta/adhoc mode
+void update_sta_info(_adapter *padapter, struct sta_info *psta);
+unsigned int update_basic_rate(unsigned char *ptn, unsigned int ptn_sz);
+unsigned int update_supported_rate(unsigned char *ptn, unsigned int ptn_sz);
+unsigned int update_MSC_rate(struct HT_caps_element *pHT_caps);
+void Update_RA_Entry(_adapter *padapter, u32 mac_id);
+void set_sta_rate(_adapter *padapter, struct sta_info *psta);
+
+unsigned int receive_disconnect(_adapter *padapter, unsigned char *MacAddr, unsigned short reason);
+
+unsigned char get_highest_rate_idx(u32 mask);
+int support_short_GI(_adapter *padapter, struct HT_caps_element *pHT_caps);
+unsigned int is_ap_in_tkip(_adapter *padapter);
+
+
+void report_join_res(_adapter *padapter, int res);
+void report_survey_event(_adapter *padapter, union recv_frame *precv_frame);
+void report_surveydone_event(_adapter *padapter);
+void report_del_sta_event(_adapter *padapter, unsigned char* MacAddr, unsigned short reason);
+void report_add_sta_event(_adapter *padapter, unsigned char* MacAddr, int cam_idx);
+
+void beacon_timing_control(_adapter *padapter);
+extern u8 set_tx_beacon_cmd(_adapter*padapter);
+unsigned int setup_beacon_frame(_adapter *padapter, unsigned char *beacon_frame);
+void update_mgntframe_attrib(_adapter *padapter, struct pkt_attrib *pattrib);
+void dump_mgntframe(_adapter *padapter, struct xmit_frame *pmgntframe);
+
+#ifdef CONFIG_P2P
+void issue_probersp_p2p(_adapter *padapter, unsigned char *da);
+void issue_p2p_provision_request( _adapter *padapter, u8* pinterface_raddr, u8* pssid, u8 ussidlen, u8* pdev_raddr);
+void issue_p2p_GO_request(_adapter *padapter, u8* raddr);
+void issue_probereq_p2p(_adapter *padapter);
+void issue_p2p_invitation_response(_adapter *padapter, u8* raddr, u8 dialogToken, u8 success);
+void issue_p2p_invitation_request(_adapter *padapter, u8* raddr );
+#endif //CONFIG_P2P
+#ifdef CONFIG_TDLS
+void issue_nulldata_to_TDLS_peer_STA(_adapter *padapter, struct sta_info *ptdls_sta, unsigned int power_mode);
+extern void TDLS_restore_workitem_callback(struct work_struct *work);
+void init_TPK_timer(_adapter *padapter, struct sta_info *psta);
+extern void TDLS_option_workitem_callback(struct work_struct *work);
+void init_ch_switch_timer(_adapter *padapter, struct sta_info *psta);
+void init_base_ch_timer(_adapter *padapter, struct sta_info *psta);
+void init_off_ch_timer(_adapter *padapter, struct sta_info *psta);
+extern void base_channel_workitem_callback(struct work_struct *work);
+extern void off_channel_workitem_callback(struct work_struct *work);
+void issue_tdls_dis_req(_adapter *padapter);
+void issue_tdls_setup_req(_adapter *padapter, u8 *mac_addr);
+void issue_tdls_setup_rsp(_adapter *padapter, union recv_frame *precv_frame);
+void issue_tdls_setup_cfm(_adapter *padapter, union recv_frame *precv_frame);
+void issue_tdls_dis_rsp(_adapter * padapter, union recv_frame * precv_frame);
+void issue_tdls_teardown(_adapter *padapter, u8 *mac_addr);
+void issue_tdls_peer_traffic_indication(_adapter *padapter, struct sta_info *psta);
+void issue_tdls_ch_switch_req(_adapter *padapter, u8 *mac_addr);
+void issue_tdls_ch_switch_rsp(_adapter *padapter, u8 *mac_addr);
+sint On_TDLS_Dis_Rsp(_adapter *adapter, union recv_frame *precv_frame);
+#endif
+void issue_beacon(_adapter *padapter);
+void issue_probersp(_adapter *padapter, unsigned char *da, u8 is_valid_p2p_probereq);
+void issue_assocreq(_adapter *padapter);
+void issue_asocrsp(_adapter *padapter, unsigned short status, struct sta_info *pstat, int pkt_type);
+void issue_auth(_adapter *padapter, struct sta_info *psta, unsigned short status);
+//	Added by Albert 2010/07/26
+//	blnbc: 1 -> broadcast probe request
+//	blnbc: 0 -> unicast probe request. The address 1 will be the BSSID.
+void issue_probereq(_adapter *padapter, NDIS_802_11_SSID *pssid, u8 blnbc);
+void issue_nulldata(_adapter *padapter, unsigned int power_mode);
+void issue_qos_nulldata(_adapter *padapter, unsigned char *da, u16 tid);
+void issue_deauth(_adapter *padapter, unsigned char *da, unsigned short reason);
+void issue_action_BA(_adapter *padapter, unsigned char *raddr, unsigned char action, unsigned short status);
+unsigned int send_delba(_adapter *padapter, u8 initiator, u8 *addr);
+unsigned int send_beacon(_adapter *padapter);
+
+void start_clnt_assoc(_adapter *padapter);
+void start_clnt_auth(_adapter* padapter);
+void start_clnt_join(_adapter* padapter);
+void start_create_ibss(_adapter* padapter);
+
+unsigned int OnAssocReq(_adapter *padapter, union recv_frame *precv_frame);
+unsigned int OnAssocRsp(_adapter *padapter, union recv_frame *precv_frame);
+unsigned int OnProbeReq(_adapter *padapter, union recv_frame *precv_frame);
+unsigned int OnProbeRsp(_adapter *padapter, union recv_frame *precv_frame);
+unsigned int DoReserved(_adapter *padapter, union recv_frame *precv_frame);
+unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame);
+unsigned int OnAtim(_adapter *padapter, union recv_frame *precv_frame);
+unsigned int OnDisassoc(_adapter *padapter, union recv_frame *precv_frame);
+unsigned int OnAuth(_adapter *padapter, union recv_frame *precv_frame);
+unsigned int OnAuthClient(_adapter *padapter, union recv_frame *precv_frame);
+unsigned int OnDeAuth(_adapter *padapter, union recv_frame *precv_frame);
+unsigned int OnAction(_adapter *padapter, union recv_frame *precv_frame);
+
+unsigned int OnAction_qos(_adapter *padapter, union recv_frame *precv_frame);
+unsigned int OnAction_dls(_adapter *padapter, union recv_frame *precv_frame);
+unsigned int OnAction_back(_adapter *padapter, union recv_frame *precv_frame);
+unsigned int OnAction_public(_adapter *padapter, union recv_frame *precv_frame);
+unsigned int OnAction_ht(_adapter *padapter, union recv_frame *precv_frame);
+unsigned int OnAction_wmm(_adapter *padapter, union recv_frame *precv_frame);
+unsigned int OnAction_p2p(_adapter *padapter, union recv_frame *precv_frame);
+
+
+void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res);
+void mlmeext_sta_del_event_callback(_adapter *padapter);
+void mlmeext_sta_add_event_callback(_adapter *padapter, struct sta_info *psta);
+
+void linked_status_chk(_adapter *padapter);
+
+void survey_timer_hdl (_adapter *padapter);
+void link_timer_hdl (_adapter *padapter);
+void addba_timer_hdl(struct sta_info *psta);
+//void reauth_timer_hdl(_adapter *padapter);
+//void reassoc_timer_hdl(_adapter *padapter);
+
+#define set_survey_timer(mlmeext, ms) \
+	do { \
+		/*DBG_871X("%s set_survey_timer(%p, %d)\n", __FUNCTION__, (mlmeext), (ms));*/ \
+		_set_timer(&(mlmeext)->survey_timer, (ms)); \
+	} while(0)
+
+#define set_link_timer(mlmeext, ms) \
+	do { \
+		/*DBG_871X("%s set_link_timer(%p, %d)\n", __FUNCTION__, (mlmeext), (ms));*/ \
+		_set_timer(&(mlmeext)->link_timer, (ms)); \
+	} while(0)
+
+extern int cckrates_included(unsigned char *rate, int ratelen);
+extern int cckratesonly_included(unsigned char *rate, int ratelen);
+
+extern void process_addba_req(_adapter *padapter, u8 *paddba_req, u8 *addr);
+
+extern void update_TSF(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len);
+extern void correct_TSF(_adapter *padapter, struct mlme_ext_priv *pmlmeext);
+
+#ifdef CONFIG_AP_MODE
+void init_mlme_ap_info(_adapter *padapter);
+void free_mlme_ap_info(_adapter *padapter);
+//void update_BCNTIM(_adapter *padapter);
+void update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx);
+void expire_timeout_chk(_adapter *padapter);	
+void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta);
+int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf,  int len);
+#ifdef CONFIG_NATIVEAP_MLME
+void bss_cap_update(_adapter *padapter, struct sta_info *psta);
+void sta_info_update(_adapter *padapter, struct sta_info *psta);
+void ap_sta_info_defer_update(_adapter *padapter, struct sta_info *psta);
+void ap_free_sta(_adapter *padapter, struct sta_info *psta);
+int rtw_sta_flush(_adapter *padapter);
+void start_ap_mode(_adapter *padapter);
+void stop_ap_mode(_adapter *padapter);
+#endif
+#endif //end of CONFIG_AP_MODE
+
+struct cmd_hdl {
+	uint	parmsize;
+	u8 (*h2cfuns)(struct _ADAPTER *padapter, u8 *pbuf);	
+};
+
+
+u8 read_macreg_hdl(_adapter *padapter, u8 *pbuf);
+u8 write_macreg_hdl(_adapter *padapter, u8 *pbuf);
+u8 read_bbreg_hdl(_adapter *padapter, u8 *pbuf);
+u8 write_bbreg_hdl(_adapter *padapter, u8 *pbuf);
+u8 read_rfreg_hdl(_adapter *padapter, u8 *pbuf);
+u8 write_rfreg_hdl(_adapter *padapter, u8 *pbuf);
+
+
+u8 NULL_hdl(_adapter *padapter, u8 *pbuf);
+u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf);
+u8 disconnect_hdl(_adapter *padapter, u8 *pbuf);
+u8 createbss_hdl(_adapter *padapter, u8 *pbuf);
+u8 setopmode_hdl(_adapter *padapter, u8 *pbuf);
+u8 sitesurvey_cmd_hdl(_adapter *padapter, u8 *pbuf);	
+u8 setauth_hdl(_adapter *padapter, u8 *pbuf);
+u8 setkey_hdl(_adapter *padapter, u8 *pbuf);
+u8 set_stakey_hdl(_adapter *padapter, u8 *pbuf);
+u8 set_assocsta_hdl(_adapter *padapter, u8 *pbuf);
+u8 del_assocsta_hdl(_adapter *padapter, u8 *pbuf);
+u8 add_ba_hdl(_adapter *padapter, unsigned char *pbuf);
+
+u8 mlme_evt_hdl(_adapter *padapter, unsigned char *pbuf);
+u8 h2c_msg_hdl(_adapter *padapter, unsigned char *pbuf);
+u8 tx_beacon_hdl(_adapter *padapter, unsigned char *pbuf);
+u8 set_chplan_hdl(_adapter *padapter, unsigned char *pbuf);
+u8 led_blink_hdl(_adapter *padapter, unsigned char *pbuf);
+u8 set_csa_hdl(_adapter *padapter, unsigned char *pbuf);	//Kurt: Handling DFS channel switch announcement ie.
+
+#define GEN_DRV_CMD_HANDLER(size, cmd)	{size, &cmd ## _hdl},
+#define GEN_MLME_EXT_HANDLER(size, cmd)	{size, cmd},
+
+#ifdef _RTW_CMD_C_
+
+struct cmd_hdl wlancmds[] = 
+{
+	GEN_DRV_CMD_HANDLER(0, NULL) /*0*/
+	GEN_DRV_CMD_HANDLER(0, NULL)
+	GEN_DRV_CMD_HANDLER(0, NULL)
+	GEN_DRV_CMD_HANDLER(0, NULL)
+	GEN_DRV_CMD_HANDLER(0, NULL)
+	GEN_DRV_CMD_HANDLER(0, NULL)
+	GEN_MLME_EXT_HANDLER(0, NULL)
+	GEN_MLME_EXT_HANDLER(0, NULL)
+	GEN_MLME_EXT_HANDLER(0, NULL)
+	GEN_MLME_EXT_HANDLER(0, NULL)
+	GEN_MLME_EXT_HANDLER(0, NULL) /*10*/
+	GEN_MLME_EXT_HANDLER(0, NULL)
+	GEN_MLME_EXT_HANDLER(0, NULL)
+	GEN_MLME_EXT_HANDLER(0, NULL)		
+	GEN_MLME_EXT_HANDLER(sizeof (struct joinbss_parm), join_cmd_hdl) /*14*/
+	GEN_MLME_EXT_HANDLER(sizeof (struct disconnect_parm), disconnect_hdl)
+	GEN_MLME_EXT_HANDLER(sizeof (struct createbss_parm), createbss_hdl)
+	GEN_MLME_EXT_HANDLER(sizeof (struct setopmode_parm), setopmode_hdl)
+	GEN_MLME_EXT_HANDLER(sizeof (struct sitesurvey_parm), sitesurvey_cmd_hdl) /*18*/
+	GEN_MLME_EXT_HANDLER(sizeof (struct setauth_parm), setauth_hdl)
+	GEN_MLME_EXT_HANDLER(sizeof (struct setkey_parm), setkey_hdl) /*20*/
+	GEN_MLME_EXT_HANDLER(sizeof (struct set_stakey_parm), set_stakey_hdl)
+	GEN_MLME_EXT_HANDLER(sizeof (struct set_assocsta_parm), NULL)
+	GEN_MLME_EXT_HANDLER(sizeof (struct del_assocsta_parm), NULL)
+	GEN_MLME_EXT_HANDLER(sizeof (struct setstapwrstate_parm), NULL)
+	GEN_MLME_EXT_HANDLER(sizeof (struct setbasicrate_parm), NULL)
+	GEN_MLME_EXT_HANDLER(sizeof (struct getbasicrate_parm), NULL)
+	GEN_MLME_EXT_HANDLER(sizeof (struct setdatarate_parm), NULL)
+	GEN_MLME_EXT_HANDLER(sizeof (struct getdatarate_parm), NULL)
+	GEN_MLME_EXT_HANDLER(sizeof (struct setphyinfo_parm), NULL)
+	GEN_MLME_EXT_HANDLER(sizeof (struct getphyinfo_parm), NULL)  /*30*/
+	GEN_MLME_EXT_HANDLER(sizeof (struct setphy_parm), NULL)
+	GEN_MLME_EXT_HANDLER(sizeof (struct getphy_parm), NULL)
+	GEN_MLME_EXT_HANDLER(0, NULL)
+	GEN_MLME_EXT_HANDLER(0, NULL)
+	GEN_MLME_EXT_HANDLER(0, NULL)
+	GEN_MLME_EXT_HANDLER(0, NULL)
+	GEN_MLME_EXT_HANDLER(0, NULL)
+	GEN_MLME_EXT_HANDLER(0, NULL)
+	GEN_MLME_EXT_HANDLER(0, NULL)
+	GEN_MLME_EXT_HANDLER(0, NULL)	/*40*/
+	GEN_MLME_EXT_HANDLER(0, NULL)
+	GEN_MLME_EXT_HANDLER(0, NULL)
+	GEN_MLME_EXT_HANDLER(0, NULL)
+	GEN_MLME_EXT_HANDLER(0, NULL)
+	GEN_MLME_EXT_HANDLER(sizeof(struct addBaReq_parm), add_ba_hdl)	
+	GEN_MLME_EXT_HANDLER(0, NULL)
+	GEN_MLME_EXT_HANDLER(0, NULL)
+	GEN_MLME_EXT_HANDLER(0, NULL)
+	GEN_MLME_EXT_HANDLER(0, NULL)
+	GEN_MLME_EXT_HANDLER(0, NULL) /*50*/
+	GEN_MLME_EXT_HANDLER(0, NULL)
+	GEN_MLME_EXT_HANDLER(0, NULL)
+	GEN_MLME_EXT_HANDLER(0, NULL)
+	GEN_MLME_EXT_HANDLER(0, NULL) 
+	GEN_MLME_EXT_HANDLER(sizeof(struct Tx_Beacon_param), tx_beacon_hdl) /*55*/
+
+	GEN_MLME_EXT_HANDLER(0, mlme_evt_hdl) /*56*/
+	GEN_MLME_EXT_HANDLER(0, rtw_drvextra_cmd_hdl) /*57*/
+
+	GEN_MLME_EXT_HANDLER(0, h2c_msg_hdl) /*58*/
+	GEN_MLME_EXT_HANDLER(sizeof(struct SetChannelPlan_param), set_chplan_hdl) /*59*/
+	GEN_MLME_EXT_HANDLER(sizeof(struct LedBlink_param), led_blink_hdl) /*60*/
+	GEN_MLME_EXT_HANDLER(sizeof(struct SetChannelSwitch_param), set_csa_hdl) /*61*/
+};
+
+#endif
+
+struct C2HEvent_Header
+{
+
+#ifdef CONFIG_LITTLE_ENDIAN
+
+	unsigned int len:16;
+	unsigned int ID:8;
+	unsigned int seq:8;
+	
+#elif defined(CONFIG_BIG_ENDIAN)
+
+	unsigned int seq:8;
+	unsigned int ID:8;
+	unsigned int len:16;
+	
+#else
+
+#  error "Must be LITTLE or BIG Endian"
+
+#endif
+
+	unsigned int rsvd;
+
+};
+
+void rtw_dummy_event_callback(_adapter *adapter , u8 *pbuf);
+void rtw_fwdbg_event_callback(_adapter *adapter , u8 *pbuf);
+
+enum rtw_c2h_event
+{
+	GEN_EVT_CODE(_Read_MACREG)=0, /*0*/
+	GEN_EVT_CODE(_Read_BBREG),
+ 	GEN_EVT_CODE(_Read_RFREG),
+ 	GEN_EVT_CODE(_Read_EEPROM),
+ 	GEN_EVT_CODE(_Read_EFUSE),
+	GEN_EVT_CODE(_Read_CAM),			/*5*/
+ 	GEN_EVT_CODE(_Get_BasicRate),  
+ 	GEN_EVT_CODE(_Get_DataRate),   
+ 	GEN_EVT_CODE(_Survey),	 /*8*/
+ 	GEN_EVT_CODE(_SurveyDone),	 /*9*/
+ 	
+ 	GEN_EVT_CODE(_JoinBss) , /*10*/
+ 	GEN_EVT_CODE(_AddSTA),
+ 	GEN_EVT_CODE(_DelSTA),
+ 	GEN_EVT_CODE(_AtimDone) ,
+ 	GEN_EVT_CODE(_TX_Report),  
+	GEN_EVT_CODE(_CCX_Report),			/*15*/
+ 	GEN_EVT_CODE(_DTM_Report),
+ 	GEN_EVT_CODE(_TX_Rate_Statistics),
+ 	GEN_EVT_CODE(_C2HLBK), 
+ 	GEN_EVT_CODE(_FWDBG),
+	GEN_EVT_CODE(_C2HFEEDBACK),               /*20*/
+	GEN_EVT_CODE(_ADDBA),
+	GEN_EVT_CODE(_C2HBCN),
+	GEN_EVT_CODE(_ReportPwrState),		//filen: only for PCIE, USB	
+	GEN_EVT_CODE(_CloseRF),				//filen: only for PCIE, work around ASPM
+ 	MAX_C2HEVT
+};
+
+
+#ifdef _RTW_MLME_EXT_C_		
+
+static struct fwevent wlanevents[] = 
+{
+	{0, rtw_dummy_event_callback}, 	/*0*/
+	{0, NULL},
+	{0, NULL},
+	{0, NULL},
+	{0, NULL},
+	{0, NULL},
+	{0, NULL},
+	{0, NULL},
+	{0, &rtw_survey_event_callback},		/*8*/
+	{sizeof (struct surveydone_event), &rtw_surveydone_event_callback},	/*9*/
+		
+	{0, &rtw_joinbss_event_callback},		/*10*/
+	{sizeof(struct stassoc_event), &rtw_stassoc_event_callback},
+	{sizeof(struct stadel_event), &rtw_stadel_event_callback},	
+	{0, &rtw_atimdone_event_callback},
+	{0, rtw_dummy_event_callback},
+	{0, NULL},	/*15*/
+	{0, NULL},
+	{0, NULL},
+	{0, NULL},
+	{0, rtw_fwdbg_event_callback},
+	{0, NULL},	 /*20*/
+	{0, NULL},
+	{0, NULL},	
+	{0, &rtw_cpwm_event_callback},
+};
+
+#endif//_RTL8192C_CMD_C_
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_mlme.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_mlme.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_mlme.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_mlme.h	2017-09-23 03:42:50.054674955 +0800
@@ -0,0 +1,593 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef __RTW_MLME_H_
+#define __RTW_MLME_H_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <wlan_bssdef.h>
+
+
+#define	MAX_BSS_CNT	64
+//#define   MAX_JOIN_TIMEOUT	2000
+//#define   MAX_JOIN_TIMEOUT	2500
+#define   MAX_JOIN_TIMEOUT	6500
+
+//	Commented by Albert 20101105
+//	Increase the scanning timeout because of increasing the SURVEY_TO value.
+
+#define 	SCANNING_TIMEOUT 	8000
+
+#define	SCAN_INTERVAL	(30) // unit:2sec, 30*2=60sec
+
+#ifdef PALTFORM_OS_WINCE
+#define	SCANQUEUE_LIFETIME 12000000 // unit:us
+#else
+#define	SCANQUEUE_LIFETIME 20 // unit:sec
+#endif
+
+#define 	WIFI_NULL_STATE		0x00000000
+#define	WIFI_ASOC_STATE		0x00000001		// Under Linked state...
+#define 	WIFI_REASOC_STATE	       0x00000002
+#define	WIFI_SLEEP_STATE	       0x00000004
+#define	WIFI_STATION_STATE	0x00000008
+#define	WIFI_AP_STATE				0x00000010
+#define	WIFI_ADHOC_STATE			0x00000020
+#define   WIFI_ADHOC_MASTER_STATE 0x00000040
+#define   WIFI_UNDER_LINKING		0x00000080
+//#define WIFI_UNDER_CMD			0x00000200
+// ========== P2P Section Start ===============
+#define	WIFI_P2P_LISTEN_STATE		0x00010000
+#define	WIFI_P2P_GROUP_FORMATION_STATE		0x00020000
+// ========== P2P Section End ===============
+#define WIFI_SITE_MONITOR		0x00000800		//to indicate the station is under site surveying
+
+#ifdef WDS
+#define	WIFI_WDS				0x00001000
+#define	WIFI_WDS_RX_BEACON	0x00002000		// already rx WDS AP beacon
+#endif
+#ifdef AUTO_CONFIG
+#define	WIFI_AUTOCONF			0x00004000
+#define	WIFI_AUTOCONF_IND	0x00008000
+#endif
+
+//#ifdef UNDER_MPTEST
+#define	WIFI_MP_STATE						0x00010000
+#define	WIFI_MP_CTX_BACKGROUND			0x00020000	// in continous tx background
+#define	WIFI_MP_CTX_ST					0x00040000	// in continous tx with single-tone
+#define	WIFI_MP_CTX_BACKGROUND_PENDING	0x00080000	// pending in continous tx background due to out of skb
+#define	WIFI_MP_CTX_CCK_HW				0x00100000	// in continous tx
+#define	WIFI_MP_CTX_CCK_CS				0x00200000	// in continous tx with carrier suppression
+#define   WIFI_MP_LPBK_STATE				0x00400000
+//#endif
+
+//#define _FW_UNDER_CMD		WIFI_UNDER_CMD
+#define _FW_UNDER_LINKING	WIFI_UNDER_LINKING
+#define _FW_LINKED			WIFI_ASOC_STATE
+#define _FW_UNDER_SURVEY	WIFI_SITE_MONITOR
+
+enum dot11AuthAlgrthmNum {
+ dot11AuthAlgrthm_Open = 0,
+ dot11AuthAlgrthm_Shared,
+ dot11AuthAlgrthm_8021X,
+ dot11AuthAlgrthm_Auto,
+ dot11AuthAlgrthm_MaxNum
+};
+
+// Scan type including active and passive scan.
+typedef enum _RT_SCAN_TYPE
+{
+	SCAN_PASSIVE,
+	SCAN_ACTIVE,
+	SCAN_MIX,
+}RT_SCAN_TYPE, *PRT_SCAN_TYPE;
+
+/*
+
+there are several "locks" in mlme_priv,
+since mlme_priv is a shared resource between many threads,
+like ISR/Call-Back functions, the OID handlers, and even timer functions.
+
+
+Each _queue has its own locks, already.
+Other items are protected by mlme_priv.lock.
+
+To avoid possible dead lock, any thread trying to modifiying mlme_priv
+SHALL not lock up more than one locks at a time!
+
+*/
+
+
+#define traffic_threshold	10
+#define	traffic_scan_period	500
+
+struct sitesurvey_ctrl {
+	u64	last_tx_pkts;
+	uint	last_rx_pkts;
+	sint	traffic_busy;
+	_timer	sitesurvey_ctrl_timer;
+};
+
+typedef struct _RT_LINK_DETECT_T{
+	u32				NumTxOkInPeriod;
+	u32				NumRxOkInPeriod;
+	u32				NumRxUnicastOkInPeriod;
+	BOOLEAN			bBusyTraffic;
+	BOOLEAN			bTxBusyTraffic;
+	BOOLEAN			bRxBusyTraffic;
+	BOOLEAN			bHigherBusyTraffic; // For interrupt migration purpose.
+	BOOLEAN			bHigherBusyRxTraffic; // We may disable Tx interrupt according as Rx traffic.
+}RT_LINK_DETECT_T, *PRT_LINK_DETECT_T;
+
+struct profile_info {
+	u8	ssidlen;
+	u8	ssid[ WLAN_SSID_MAXLEN ];
+	u8	peermac[ ETH_ALEN ];
+};
+
+struct tx_invite_req_info{
+	u8					token;
+	u8					ssid[ WLAN_SSID_MAXLEN ];
+	u8					ssidlen;
+	u8					peer_operation_ch;
+};
+
+struct tx_invite_resp_info{
+	u8					token;	//	Used to record the dialog token of p2p invitation request frame.
+};
+
+#ifdef CONFIG_WFD
+
+struct wifi_display_info{
+	u16					rtsp_ctrlport;		//	TCP port number at which the this WFD device listens for RTSP messages
+	u16					peer_rtsp_ctrlport;	//	TCP port number at which the peer WFD device listens for RTSP messages
+											//	This filed should be filled when receiving the gropu negotiation request
+};
+#endif //CONFIG_WFD
+
+struct tx_provdisc_req_info{
+	u16					wps_config_method_request;	//	Used when sending the provisioning request frame
+	u16					peer_channel_num[2];		//	The channel number which the receiver stands.
+	NDIS_802_11_SSID	ssid;
+	u8					peerDevAddr[ ETH_ALEN ];		//	Peer device address
+	u8					peerIFAddr[ ETH_ALEN ];		//	Peer interface address
+	u8					benable;					//	This provision discovery request frame is trigger to send or not
+};
+
+struct rx_provdisc_req_info{	//When peer device issue prov_disc_req first, we should store the following informations
+	u8					peerDevAddr[ ETH_ALEN ];		//	Peer device address
+	u8					strconfig_method_desc_of_prov_disc_req[4];	//	description for the config method located in the provisioning discovery request frame.	
+																	//	The UI must know this information to know which config method the remote p2p device is requiring.
+};
+
+struct tx_nego_req_info{
+	u16					peer_channel_num[2];		//	The channel number which the receiver stands.
+	u8					peerDevAddr[ ETH_ALEN ];		//	Peer device address
+	u8					benable;					//	This negoitation request frame is trigger to send or not
+};
+
+struct group_id_info{
+	u8					go_device_addr[ ETH_ALEN ];	//	The GO's device address of this P2P group
+	u8					ssid[ WLAN_SSID_MAXLEN ];	//	The SSID of this P2P group
+};
+
+struct wifidirect_info{
+	_adapter*				padapter;
+	_timer					find_phase_timer;
+	_timer					restore_p2p_state_timer;
+	
+	//	Used to do the scanning. After confirming the peer is availalble, the driver transmits the P2P frame to peer.
+	_timer					pre_tx_scan_timer;
+	struct tx_provdisc_req_info	tx_prov_disc_info;
+	struct rx_provdisc_req_info rx_prov_disc_info;
+	struct tx_invite_req_info	invitereq_info;
+	struct profile_info			profileinfo[ P2P_MAX_PERSISTENT_GROUP_NUM ];	//	Store the profile information of persistent group
+	struct tx_invite_resp_info	inviteresp_info;
+	struct tx_nego_req_info	nego_req_info;
+	struct group_id_info		groupid_info;	//	Store the group id information when doing the group negotiation handshake.
+#ifdef CONFIG_WFD
+	struct wifi_display_info		wfd_info;
+#endif
+	enum P2P_ROLE			role;
+	enum P2P_STATE			pre_p2p_state;
+	enum P2P_STATE			p2p_state;
+	u8 						device_addr[ETH_ALEN];	//	The device address should be the mac address of this device.
+	u8						interface_addr[ETH_ALEN];
+	u8						social_chan[4];
+	u8						listen_channel;
+	u8						operating_channel;
+	u8						listen_dwell;		//	This value should be between 1 and 3
+	u8						support_rate[8];
+	u8						p2p_wildcard_ssid[P2P_WILDCARD_SSID_LEN];
+	u8						intent;		//	should only include the intent value.
+	u8						p2p_peer_interface_addr[ ETH_ALEN ];
+	u8						peer_intent;	//	Included the intent value and tie breaker value.
+	u8						device_name[ WPS_MAX_DEVICE_NAME_LEN ];	//	Device name for displaying on searching device screen
+	u8						device_name_len;
+	u8						profileindex;	//	Used to point to the index of profileinfo array
+	u8						peer_operating_ch;
+	u8						find_phase_state_exchange_cnt;
+	u16						device_password_id_for_nego;	//	The device password ID for group negotation
+	u8						negotiation_dialog_token;
+	u8						nego_ssid[ WLAN_SSID_MAXLEN ];	//	SSID information for group negotitation
+	u8						nego_ssidlen;
+	u8 						p2p_group_ssid[WLAN_SSID_MAXLEN];
+	u8 						p2p_group_ssid_len;
+
+	enum	P2P_WPSINFO		ui_got_wps_info;	//	This field will store the WPS value (PIN value or PBC) that UI had got from the user.
+	u16						supported_wps_cm;	//	This field describes the WPS config method which this driver supported.
+												//	The value should be the combination of config method defined in page104 of WPS v2.0 spec.												
+	u8						channel_cnt;		//	This field is the count number for P2P Channel List attribute of group negotitation response frame.
+	u8						channel_list[13];		//	This field will contain the channel number of P2P Channel List attribute of group negotitation response frame.
+												//	We will use the channel_cnt and channel_list fields when constructing the group negotitation confirm frame.
+	u8						p2p_ps_enable;
+	enum P2P_PS				p2p_ps; // indicate p2p ps state
+	u8						noa_index; // Identifies and instance of Notice of Absence timing.
+	u8						ctwindow; // Client traffic window. A period of time in TU after TBTT.
+	u8						opp_ps; // opportunistic power save.
+	u8						noa_num; // number of NoA descriptor in P2P IE.
+	u8						noa_count[P2P_MAX_NOA_NUM]; // Count for owner, Type of client.
+	u32						noa_duration[P2P_MAX_NOA_NUM]; // Max duration for owner, preferred or min acceptable duration for client.
+	u32						noa_interval[P2P_MAX_NOA_NUM]; // Length of interval for owner, preferred or max acceptable interval of client.
+	u32						noa_start_time[P2P_MAX_NOA_NUM]; // schedule expressed in terms of the lower 4 bytes of the TSF timer.
+};
+
+
+struct mlme_priv {
+
+	_lock	lock;
+	sint	fw_state;	//shall we protect this variable? maybe not necessarily...
+
+	u8	to_join; //flag
+	#ifdef CONFIG_LAYER2_ROAMING
+	u8 to_roaming; // roaming trying times
+	#endif
+
+	u8	*nic_hdl;
+
+	_list		*pscanned;
+	_queue	free_bss_pool;
+	_queue	scanned_queue;
+	u8		*free_bss_buf;
+	u32	num_of_scanned;
+
+	NDIS_802_11_SSID	assoc_ssid;
+	u8	assoc_bssid[6];
+
+	struct wlan_network	cur_network;
+
+	//uint wireless_mode; no used, remove it
+
+	u32	scan_interval;
+
+	_timer assoc_timer;
+
+	uint assoc_by_bssid;
+
+	_timer scan_to_timer; // driver itself handles scan_timeout status.
+	u32 scan_start_time; // used to evaluate the time spent in scanning
+
+	#ifdef CONFIG_SET_SCAN_DENY_TIMER
+	_timer set_scan_deny_timer;
+	ATOMIC_T set_scan_deny; //0: allowed, 1: deny
+	#endif
+
+	struct qos_priv qospriv;
+
+#ifdef CONFIG_80211N_HT
+
+	/* Number of non-HT AP/stations */
+	int num_sta_no_ht;
+
+	/* Number of HT AP/stations 20 MHz */
+	//int num_sta_ht_20mhz; 
+
+
+	int num_FortyMHzIntolerant;
+
+	struct ht_priv	htpriv;
+
+#endif
+
+	RT_LINK_DETECT_T	LinkDetectInfo;
+	_timer	dynamic_chk_timer; //dynamic/periodic check timer
+
+ 	u8 	key_mask; //use for ips to set wep key after ips_leave
+	u8	ChannelPlan;
+	u8 	scan_mode; // active: 1, passive: 0
+
+
+	u8 probereq_wpsie[MAX_WPS_IE_LEN];//added in probe req	
+	int probereq_wpsie_len;
+
+#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME)
+	/* Number of associated Non-ERP stations (i.e., stations using 802.11b
+	 * in 802.11g BSS) */
+	int num_sta_non_erp;
+
+	/* Number of associated stations that do not support Short Slot Time */
+	int num_sta_no_short_slot_time;
+
+	/* Number of associated stations that do not support Short Preamble */
+	int num_sta_no_short_preamble;
+
+	int olbc; /* Overlapping Legacy BSS Condition */
+
+	/* Number of HT associated stations that do not support greenfield */
+	int num_sta_ht_no_gf;
+
+	/* Number of associated non-HT stations */
+	//int num_sta_no_ht;
+
+	/* Number of HT associated stations 20 MHz */
+	int num_sta_ht_20mhz;
+
+	/* Overlapping BSS information */
+	int olbc_ht;
+	
+#ifdef CONFIG_80211N_HT
+	u16 ht_op_mode;
+#endif /* CONFIG_80211N_HT */	
+
+	u8 *wps_beacon_ie;	
+	u8 *wps_probe_resp_ie;
+	u8 *wps_assoc_resp_ie;
+	u32 wps_beacon_ie_len;
+	u32 wps_probe_resp_ie_len;
+	u32 wps_assoc_resp_ie_len;
+
+	
+	_lock	bcn_update_lock;
+	u8		update_bcn;
+	
+	
+#endif	
+
+#ifdef RTK_DMP_PLATFORM
+	// DMP kobject_hotplug function  signal need in passive level
+	_workitem	Linkup_workitem;
+	_workitem	Linkdown_workitem;
+#endif
+
+};
+
+#ifdef CONFIG_AP_MODE
+
+struct hostapd_priv
+{
+	_adapter *padapter;
+
+#ifdef CONFIG_HOSTAPD_MLME
+	struct net_device *pmgnt_netdev;
+	struct usb_anchor anchored;
+#endif	
+	
+};
+
+extern int hostapd_mode_init(_adapter *padapter);
+extern void hostapd_mode_unload(_adapter *padapter);
+#endif
+
+
+extern void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf);
+extern void rtw_survey_event_callback(_adapter *adapter, u8 *pbuf);
+extern void rtw_surveydone_event_callback(_adapter *adapter, u8 *pbuf);
+extern void rtw_joinbss_event_callback(_adapter *adapter, u8 *pbuf);
+extern void rtw_stassoc_event_callback(_adapter *adapter, u8 *pbuf);
+extern void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf);
+extern void rtw_atimdone_event_callback(_adapter *adapter, u8 *pbuf);
+extern void rtw_cpwm_event_callback(_adapter *adapter, u8 *pbuf);
+
+#ifdef PLATFORM_WINDOWS
+extern thread_return event_thread(void *context);
+
+extern void rtw_join_timeout_handler (
+	IN	PVOID					SystemSpecific1,
+	IN	PVOID					FunctionContext,
+	IN	PVOID					SystemSpecific2,
+	IN	PVOID					SystemSpecific3
+	);
+
+extern void _rtw_scan_timeout_handler (
+	IN	PVOID					SystemSpecific1,
+	IN	PVOID					FunctionContext,
+	IN	PVOID					SystemSpecific2,
+	IN	PVOID					SystemSpecific3
+	);
+
+#endif
+
+#ifdef PLATFORM_LINUX
+extern int event_thread(void *context);
+extern void rtw_join_timeout_handler(void* FunctionContext);
+extern void _rtw_scan_timeout_handler(void* FunctionContext);
+#endif
+
+extern void rtw_free_network_queue(_adapter *adapter,u8 isfreeall);
+extern int rtw_init_mlme_priv(_adapter *adapter);// (struct mlme_priv *pmlmepriv);
+
+extern void rtw_free_mlme_priv (struct mlme_priv *pmlmepriv);
+
+
+extern sint rtw_select_and_join_from_scanned_queue(struct mlme_priv *pmlmepriv);
+extern sint rtw_set_key(_adapter *adapter,struct security_priv *psecuritypriv,sint keyid, u8 set_tx);
+extern sint rtw_set_auth(_adapter *adapter,struct security_priv *psecuritypriv);
+
+__inline static u8 *get_bssid(struct mlme_priv *pmlmepriv)
+{	//if sta_mode:pmlmepriv->cur_network.network.MacAddress=> bssid
+	// if adhoc_mode:pmlmepriv->cur_network.network.MacAddress=> ibss mac address
+	return pmlmepriv->cur_network.network.MacAddress;
+}
+
+__inline static sint check_fwstate(struct mlme_priv *pmlmepriv, sint state)
+{
+	if (pmlmepriv->fw_state & state)
+		return _TRUE;
+
+	return _FALSE;
+}
+
+__inline static sint get_fwstate(struct mlme_priv *pmlmepriv)
+{
+	return pmlmepriv->fw_state;
+}
+
+/*
+ * No Limit on the calling context,
+ * therefore set it to be the critical section...
+ *
+ * ### NOTE:#### (!!!!)
+ * MUST TAKE CARE THAT BEFORE CALLING THIS FUNC, YOU SHOULD HAVE LOCKED pmlmepriv->lock
+ */
+__inline static void set_fwstate(struct mlme_priv *pmlmepriv, sint state)
+{
+	pmlmepriv->fw_state |= state;
+}
+
+__inline static void _clr_fwstate_(struct mlme_priv *pmlmepriv, sint state)
+{
+	pmlmepriv->fw_state &= ~state;
+}
+
+/*
+ * No Limit on the calling context,
+ * therefore set it to be the critical section...
+ */
+__inline static void clr_fwstate(struct mlme_priv *pmlmepriv, sint state)
+{
+	_irqL irqL;
+
+	_enter_critical_bh(&pmlmepriv->lock, &irqL);
+	if (check_fwstate(pmlmepriv, state) == _TRUE)
+		pmlmepriv->fw_state ^= state;
+	_exit_critical_bh(&pmlmepriv->lock, &irqL);
+}
+
+__inline static void clr_fwstate_ex(struct mlme_priv *pmlmepriv, sint state)
+{
+	_irqL irqL;
+
+	_enter_critical_bh(&pmlmepriv->lock, &irqL);
+	_clr_fwstate_(pmlmepriv, state);
+	_exit_critical_bh(&pmlmepriv->lock, &irqL);
+}
+
+__inline static void up_scanned_network(struct mlme_priv *pmlmepriv)
+{
+	_irqL irqL;
+
+	_enter_critical_bh(&pmlmepriv->lock, &irqL);
+	pmlmepriv->num_of_scanned++;
+	_exit_critical_bh(&pmlmepriv->lock, &irqL);
+}
+
+__inline static void down_scanned_network(struct mlme_priv *pmlmepriv)
+{
+	_irqL irqL;
+
+	_enter_critical_bh(&pmlmepriv->lock, &irqL);
+	pmlmepriv->num_of_scanned--;
+	_exit_critical_bh(&pmlmepriv->lock, &irqL);
+}
+
+__inline static void set_scanned_network_val(struct mlme_priv *pmlmepriv, sint val)
+{
+	_irqL irqL;
+
+	_enter_critical_bh(&pmlmepriv->lock, &irqL);
+	pmlmepriv->num_of_scanned = val;
+	_exit_critical_bh(&pmlmepriv->lock, &irqL);
+}
+
+extern u16 rtw_get_capability(WLAN_BSSID_EX *bss);
+extern void rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target);
+extern void rtw_disconnect_hdl_under_linked(_adapter* adapter, struct sta_info *psta, u8 free_assoc);
+extern void rtw_generate_random_ibss(u8 *pibss);
+extern struct wlan_network* rtw_find_network(_queue *scanned_queue, u8 *addr);
+extern struct wlan_network* rtw_get_oldest_wlan_network(_queue *scanned_queue);
+
+extern void rtw_free_assoc_resources(_adapter* adapter, int lock_scanned_queue);
+extern void rtw_indicate_disconnect(_adapter* adapter);
+extern void rtw_indicate_connect(_adapter* adapter);
+
+extern int rtw_restruct_sec_ie(_adapter *adapter,u8 *in_ie,u8 *out_ie,uint in_len);
+extern int rtw_restruct_wmm_ie(_adapter *adapter, u8 *in_ie, u8 *out_ie, uint in_len, uint initial_out_len);
+extern void rtw_init_registrypriv_dev_network(_adapter *adapter);
+
+extern void rtw_update_registrypriv_dev_network(_adapter *adapter);
+
+extern void rtw_get_encrypt_decrypt_from_registrypriv(_adapter *adapter);
+
+extern void _rtw_join_timeout_handler(_adapter *adapter);
+extern void rtw_scan_timeout_handler(_adapter *adapter);
+
+extern void rtw_dynamic_check_timer_handlder(_adapter *adapter);
+#ifdef CONFIG_SET_SCAN_DENY_TIMER
+extern void rtw_set_scan_deny_timer_hdl(_adapter *adapter);
+void rtw_set_scan_deny(struct mlme_priv *mlmepriv, u32 ms);
+#endif
+
+
+extern int _rtw_init_mlme_priv(_adapter *padapter);
+
+extern void _rtw_free_mlme_priv(struct mlme_priv *pmlmepriv);
+
+extern int _rtw_enqueue_network(_queue *queue, struct wlan_network *pnetwork);
+
+extern struct wlan_network* _rtw_dequeue_network(_queue *queue);
+
+extern struct wlan_network* _rtw_alloc_network(struct mlme_priv *pmlmepriv);
+
+
+extern void _rtw_free_network(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork, u8 isfreeall);
+extern void _rtw_free_network_nolock(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork);
+
+
+extern struct wlan_network* _rtw_find_network(_queue *scanned_queue, u8 *addr);
+
+extern void _rtw_free_network_queue(_adapter* padapter, u8 isfreeall);
+
+extern sint rtw_if_up(_adapter *padapter);
+
+
+u8 *rtw_get_capability_from_ie(u8 *ie);
+u8 *rtw_get_timestampe_from_ie(u8 *ie);
+u8 *rtw_get_beacon_interval_from_ie(u8 *ie);
+
+
+void rtw_joinbss_reset(_adapter *padapter);
+
+#ifdef CONFIG_80211N_HT
+unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len);
+void rtw_update_ht_cap(_adapter *padapter, u8 *pie, uint ie_len);
+void rtw_issue_addbareq_cmd(_adapter *padapter, struct xmit_frame *pxmitframe);
+#endif
+
+int rtw_is_same_ibss(_adapter *adapter, struct wlan_network *pnetwork);
+
+#ifdef CONFIG_LAYER2_ROAMING
+void rtw_roaming(_adapter *padapter, struct wlan_network *tgt_network);
+void _rtw_roaming(_adapter *padapter, struct wlan_network *tgt_network);
+#endif
+
+#endif //__RTL871X_MLME_H_
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_mp.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_mp.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_mp.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_mp.h	2017-09-23 03:42:50.054674955 +0800
@@ -0,0 +1,708 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef _RTW_MP_H_
+#define _RTW_MP_H_
+
+#ifndef PLATFORM_WINDOWS
+//	00 - Success
+//	11 - Error
+#define STATUS_SUCCESS				(0x00000000L)
+#define STATUS_PENDING				(0x00000103L)
+
+#define STATUS_UNSUCCESSFUL			(0xC0000001L)
+#define STATUS_INSUFFICIENT_RESOURCES		(0xC000009AL)
+#define STATUS_NOT_SUPPORTED			(0xC00000BBL)
+
+#define NDIS_STATUS_SUCCESS			((NDIS_STATUS)STATUS_SUCCESS)
+#define NDIS_STATUS_PENDING			((NDIS_STATUS)STATUS_PENDING)
+#define NDIS_STATUS_NOT_RECOGNIZED		((NDIS_STATUS)0x00010001L)
+#define NDIS_STATUS_NOT_COPIED			((NDIS_STATUS)0x00010002L)
+#define NDIS_STATUS_NOT_ACCEPTED		((NDIS_STATUS)0x00010003L)
+#define NDIS_STATUS_CALL_ACTIVE			((NDIS_STATUS)0x00010007L)
+
+#define NDIS_STATUS_FAILURE			((NDIS_STATUS)STATUS_UNSUCCESSFUL)
+#define NDIS_STATUS_RESOURCES			((NDIS_STATUS)STATUS_INSUFFICIENT_RESOURCES)
+#define NDIS_STATUS_CLOSING			((NDIS_STATUS)0xC0010002L)
+#define NDIS_STATUS_BAD_VERSION			((NDIS_STATUS)0xC0010004L)
+#define NDIS_STATUS_BAD_CHARACTERISTICS		((NDIS_STATUS)0xC0010005L)
+#define NDIS_STATUS_ADAPTER_NOT_FOUND		((NDIS_STATUS)0xC0010006L)
+#define NDIS_STATUS_OPEN_FAILED			((NDIS_STATUS)0xC0010007L)
+#define NDIS_STATUS_DEVICE_FAILED		((NDIS_STATUS)0xC0010008L)
+#define NDIS_STATUS_MULTICAST_FULL		((NDIS_STATUS)0xC0010009L)
+#define NDIS_STATUS_MULTICAST_EXISTS		((NDIS_STATUS)0xC001000AL)
+#define NDIS_STATUS_MULTICAST_NOT_FOUND		((NDIS_STATUS)0xC001000BL)
+#define NDIS_STATUS_REQUEST_ABORTED		((NDIS_STATUS)0xC001000CL)
+#define NDIS_STATUS_RESET_IN_PROGRESS		((NDIS_STATUS)0xC001000DL)
+#define NDIS_STATUS_CLOSING_INDICATING		((NDIS_STATUS)0xC001000EL)
+#define NDIS_STATUS_NOT_SUPPORTED		((NDIS_STATUS)STATUS_NOT_SUPPORTED)
+#define NDIS_STATUS_INVALID_PACKET		((NDIS_STATUS)0xC001000FL)
+#define NDIS_STATUS_OPEN_LIST_FULL		((NDIS_STATUS)0xC0010010L)
+#define NDIS_STATUS_ADAPTER_NOT_READY		((NDIS_STATUS)0xC0010011L)
+#define NDIS_STATUS_ADAPTER_NOT_OPEN		((NDIS_STATUS)0xC0010012L)
+#define NDIS_STATUS_NOT_INDICATING		((NDIS_STATUS)0xC0010013L)
+#define NDIS_STATUS_INVALID_LENGTH		((NDIS_STATUS)0xC0010014L)
+#define NDIS_STATUS_INVALID_DATA		((NDIS_STATUS)0xC0010015L)
+#define NDIS_STATUS_BUFFER_TOO_SHORT		((NDIS_STATUS)0xC0010016L)
+#define NDIS_STATUS_INVALID_OID			((NDIS_STATUS)0xC0010017L)
+#define NDIS_STATUS_ADAPTER_REMOVED		((NDIS_STATUS)0xC0010018L)
+#define NDIS_STATUS_UNSUPPORTED_MEDIA		((NDIS_STATUS)0xC0010019L)
+#define NDIS_STATUS_GROUP_ADDRESS_IN_USE	((NDIS_STATUS)0xC001001AL)
+#define NDIS_STATUS_FILE_NOT_FOUND		((NDIS_STATUS)0xC001001BL)
+#define NDIS_STATUS_ERROR_READING_FILE		((NDIS_STATUS)0xC001001CL)
+#define NDIS_STATUS_ALREADY_MAPPED		((NDIS_STATUS)0xC001001DL)
+#define NDIS_STATUS_RESOURCE_CONFLICT		((NDIS_STATUS)0xC001001EL)
+#define NDIS_STATUS_NO_CABLE			((NDIS_STATUS)0xC001001FL)
+
+#define NDIS_STATUS_INVALID_SAP			((NDIS_STATUS)0xC0010020L)
+#define NDIS_STATUS_SAP_IN_USE			((NDIS_STATUS)0xC0010021L)
+#define NDIS_STATUS_INVALID_ADDRESS		((NDIS_STATUS)0xC0010022L)
+#define NDIS_STATUS_VC_NOT_ACTIVATED		((NDIS_STATUS)0xC0010023L)
+#define NDIS_STATUS_DEST_OUT_OF_ORDER		((NDIS_STATUS)0xC0010024L)  // cause 27
+#define NDIS_STATUS_VC_NOT_AVAILABLE		((NDIS_STATUS)0xC0010025L)  // cause 35,45
+#define NDIS_STATUS_CELLRATE_NOT_AVAILABLE	((NDIS_STATUS)0xC0010026L)  // cause 37
+#define NDIS_STATUS_INCOMPATABLE_QOS		((NDIS_STATUS)0xC0010027L)  // cause 49
+#define NDIS_STATUS_AAL_PARAMS_UNSUPPORTED	((NDIS_STATUS)0xC0010028L)  // cause 93
+#define NDIS_STATUS_NO_ROUTE_TO_DESTINATION	((NDIS_STATUS)0xC0010029L)  // cause 3
+#endif /* #ifndef PLATFORM_WINDOWS */
+
+#if 0
+#define MPT_NOOP			0
+#define MPT_READ_MAC_1BYTE		1
+#define MPT_READ_MAC_2BYTE		2
+#define MPT_READ_MAC_4BYTE		3
+#define MPT_WRITE_MAC_1BYTE		4
+#define MPT_WRITE_MAC_2BYTE		5
+#define MPT_WRITE_MAC_4BYTE		6
+#define MPT_READ_BB_CCK			7
+#define MPT_WRITE_BB_CCK		8
+#define MPT_READ_BB_OFDM		9
+#define MPT_WRITE_BB_OFDM		10
+#define MPT_READ_RF			11
+#define MPT_WRITE_RF			12
+#define MPT_READ_EEPROM_1BYTE		13
+#define MPT_WRITE_EEPROM_1BYTE		14
+#define MPT_READ_EEPROM_2BYTE		15
+#define MPT_WRITE_EEPROM_2BYTE		16
+#define MPT_SET_CSTHRESHOLD		21
+#define MPT_SET_INITGAIN		22
+#define MPT_SWITCH_BAND			23
+#define MPT_SWITCH_CHANNEL		24
+#define MPT_SET_DATARATE		25
+#define MPT_SWITCH_ANTENNA		26
+#define MPT_SET_TX_POWER		27
+#define MPT_SET_CONT_TX			28
+#define MPT_SET_SINGLE_CARRIER		29
+#define MPT_SET_CARRIER_SUPPRESSION	30
+#define MPT_GET_RATE_TABLE		31
+#define MPT_READ_TSSI			32
+#define MPT_GET_THERMAL_METER		33
+#endif
+
+#define MAX_MP_XMITBUF_SZ 	2048
+#define NR_MP_XMITFRAME		8
+
+struct mp_xmit_frame
+{
+	_list	list;
+
+	struct pkt_attrib attrib;
+
+	_pkt *pkt;
+
+	int frame_tag;
+
+	_adapter *padapter;
+
+#ifdef CONFIG_USB_HCI
+
+	//insert urb, irp, and irpcnt info below...
+	//max frag_cnt = 8
+
+	u8 *mem_addr;
+	u32 sz[8];
+
+#if defined(PLATFORM_OS_XP) || defined(PLATFORM_LINUX)
+	PURB pxmit_urb[8];
+#endif
+
+#ifdef PLATFORM_OS_XP
+	PIRP pxmit_irp[8];
+#endif
+
+	u8 bpending[8];
+	sint ac_tag[8];
+	sint last[8];
+	uint irpcnt;
+	uint fragcnt;
+#endif /* CONFIG_USB_HCI */
+
+	uint mem[(MAX_MP_XMITBUF_SZ >> 2)];
+};
+
+struct mp_wiparam
+{
+	u32 bcompleted;
+	u32 act_type;
+	u32 io_offset;
+	u32 io_value;
+};
+
+typedef void(*wi_act_func)(void* padapter);
+
+#ifdef PLATFORM_WINDOWS
+struct mp_wi_cntx
+{
+	u8 bmpdrv_unload;
+
+	// Work Item
+	NDIS_WORK_ITEM mp_wi;
+	NDIS_EVENT mp_wi_evt;
+	_lock mp_wi_lock;
+	u8 bmp_wi_progress;
+	wi_act_func curractfunc;
+	// Variable needed in each implementation of CurrActFunc.
+	struct mp_wiparam param;
+};
+#endif
+
+struct mp_tx
+{
+	u8 stop;
+	u32 count, sended;
+	u8 payload;
+	struct pkt_attrib attrib;
+	struct tx_desc desc;
+	u8 *pallocated_buf;
+	u8 *buf;
+	u32 buf_size, write_size;
+	_thread_hdl_	PktTxThread;
+};
+
+//#if (MP_DRIVER == 1)
+#if defined(CONFIG_RTL8192C) || defined(CONFIG_RTL8192D) || defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8188E)
+#ifdef CONFIG_RTL8192C
+#include <Hal8192CPhyCfg.h>
+#endif
+#ifdef CONFIG_RTL8192D
+#include <Hal8192DPhyCfg.h>
+#endif
+#ifdef CONFIG_RTL8723A
+#include <Hal8723APhyCfg.h>
+#endif
+#ifdef CONFIG_RTL8188E
+#include <rtl8188e_hal.h>
+#endif
+#define MP_MAX_LINES		1000
+#define MP_MAX_LINES_BYTES	256
+#define u1Byte u8
+#define s1Byte s8
+#define u4Byte u32
+#define s4Byte s32
+typedef VOID (*MPT_WORK_ITEM_HANDLER)(IN PVOID Adapter);
+typedef struct _MPT_CONTEXT
+{
+	// Indicate if we have started Mass Production Test.
+	BOOLEAN			bMassProdTest;
+
+	// Indicate if the driver is unloading or unloaded.
+	BOOLEAN			bMptDrvUnload;
+
+	/* 8190 PCI does not support NDIS_WORK_ITEM. */
+	// Work Item for Mass Production Test.
+	//NDIS_WORK_ITEM	MptWorkItem;
+//	RT_WORK_ITEM		MptWorkItem;
+	// Event used to sync the case unloading driver and MptWorkItem is still in progress.
+//	NDIS_EVENT		MptWorkItemEvent;
+	// To protect the following variables.
+//	NDIS_SPIN_LOCK		MptWorkItemSpinLock;
+	// Indicate a MptWorkItem is scheduled and not yet finished.
+	BOOLEAN			bMptWorkItemInProgress;
+	// An instance which implements function and context of MptWorkItem.
+	MPT_WORK_ITEM_HANDLER	CurrMptAct;
+
+	// 1=Start, 0=Stop from UI.
+	ULONG			MptTestStart;
+	// _TEST_MODE, defined in MPT_Req2.h
+	ULONG			MptTestItem;
+	// Variable needed in each implementation of CurrMptAct.
+	ULONG			MptActType; 	// Type of action performed in CurrMptAct.
+	// The Offset of IO operation is depend of MptActType.
+	ULONG			MptIoOffset;
+	// The Value of IO operation is depend of MptActType.
+	ULONG			MptIoValue;
+	// The RfPath of IO operation is depend of MptActType.
+	ULONG			MptRfPath;
+
+	WIRELESS_MODE		MptWirelessModeToSw;	// Wireless mode to switch.
+	u8			MptChannelToSw; 	// Channel to switch.
+	u8			MptInitGainToSet; 	// Initial gain to set.
+	//ULONG			bMptAntennaA; 		// TRUE if we want to use antenna A.
+	ULONG			MptBandWidth;		// bandwidth to switch.
+	ULONG			MptRateIndex;		// rate index.
+	// Register value kept for Single Carrier Tx test.
+	u8			btMpCckTxPower;
+	// Register value kept for Single Carrier Tx test.
+	u8			btMpOfdmTxPower;
+	// For MP Tx Power index
+	u8			TxPwrLevel[2];	// rf-A, rf-B
+
+	// Content of RCR Regsiter for Mass Production Test.
+	ULONG			MptRCR;
+	// TRUE if we only receive packets with specific pattern.
+	BOOLEAN			bMptFilterPattern;
+ 	// Rx OK count, statistics used in Mass Production Test.
+ 	ULONG			MptRxOkCnt;
+ 	// Rx CRC32 error count, statistics used in Mass Production Test.
+ 	ULONG			MptRxCrcErrCnt;
+
+	BOOLEAN			bCckContTx;	// TRUE if we are in CCK Continuous Tx test.
+ 	BOOLEAN			bOfdmContTx;	// TRUE if we are in OFDM Continuous Tx test.
+	BOOLEAN			bStartContTx; 	// TRUE if we have start Continuous Tx test.
+	// TRUE if we are in Single Carrier Tx test.
+	BOOLEAN			bSingleCarrier;
+	// TRUE if we are in Carrier Suppression Tx Test.
+	BOOLEAN			bCarrierSuppression;
+	//TRUE if we are in Single Tone Tx test.
+	BOOLEAN			bSingleTone;
+
+	// ACK counter asked by K.Y..
+	BOOLEAN			bMptEnableAckCounter;
+	ULONG			MptAckCounter;
+
+	// SD3 Willis For 8192S to save 1T/2T RF table for ACUT	Only fro ACUT delete later ~~~!
+	//s1Byte		BufOfLines[2][MAX_LINES_HWCONFIG_TXT][MAX_BYTES_LINE_HWCONFIG_TXT];
+	//s1Byte			BufOfLines[2][MP_MAX_LINES][MP_MAX_LINES_BYTES];
+	//s4Byte			RfReadLine[2];
+
+	u8		APK_bound[2];	//for APK	path A/path B
+	BOOLEAN		bMptIndexEven;
+
+	u8		backup0xc50;
+	u8		backup0xc58;
+	u8		backup0xc30;
+}MPT_CONTEXT, *PMPT_CONTEXT;
+#endif
+//#endif
+
+/* E-Fuse */
+#ifdef CONFIG_RTL8192D
+#define EFUSE_MAP_SIZE		255
+#endif
+#ifdef CONFIG_RTL8192C
+#define EFUSE_MAP_SIZE		128
+#endif
+#ifdef CONFIG_RTL8723A
+#define EFUSE_MAP_SIZE		256
+#endif
+#ifdef CONFIG_RTL8188E
+#define EFUSE_MAP_SIZE		256
+#endif
+#define EFUSE_MAX_SIZE		512
+
+/* end of E-Fuse */
+
+//#define RTPRIV_IOCTL_MP 					( SIOCIWFIRSTPRIV + 0x17)
+enum {	  
+	WRITE_REG = 1,
+	READ_REG,
+	WRITE_RF,
+	READ_RF,
+	MP_START,
+	MP_STOP,
+	MP_RATE,
+	MP_CHANNEL,
+	MP_BANDWIDTH,
+	MP_TXPOWER,
+	MP_ANT_TX,
+	MP_ANT_RX,
+	MP_CTX,
+	MP_QUERY,
+	MP_ARX,
+	MP_PSD,
+	MP_PWRTRK,
+	MP_THER,
+	MP_IOCTL,
+	EFUSE_GET,
+	EFUSE_SET,
+	MP_RESET_STATS,
+	MP_DUMP,
+	MP_PHYPARA,
+	MP_NULL,
+};
+
+struct mp_priv
+{
+	_adapter *papdater;
+
+	//Testing Flag
+	u32 mode;//0 for normal type packet, 1 for loopback packet (16bytes TXCMD)
+
+	u32 prev_fw_state;
+
+	//OID cmd handler
+	struct mp_wiparam workparam;
+//	u8 act_in_progress;
+
+	//Tx Section
+	u8 TID;
+	u32 tx_pktcount;
+	struct mp_tx tx;
+
+	//Rx Section
+	u32 rx_pktcount;
+	u32 rx_crcerrpktcount;
+	u32 rx_pktloss;
+
+	struct recv_stat rxstat;
+
+	//RF/BB relative
+	u8 channel;
+	u8 bandwidth;
+	u8 prime_channel_offset;
+	u8 txpoweridx;
+	u8 txpoweridx_b;
+	u8 rateidx;
+	u32 preamble;
+//	u8 modem;
+	u32 CrystalCap;
+//	u32 curr_crystalcap;
+
+	u16 antenna_tx;
+	u16 antenna_rx;
+//	u8 curr_rfpath;
+
+	u8 check_mp_pkt;
+
+//	uint ForcedDataRate;
+
+	struct wlan_network mp_network;
+	NDIS_802_11_MAC_ADDRESS network_macaddr;
+
+#ifdef PLATFORM_WINDOWS
+	u32 rx_testcnt;
+	u32 rx_testcnt1;
+	u32 rx_testcnt2;
+	u32 tx_testcnt;
+	u32 tx_testcnt1;
+
+	struct mp_wi_cntx wi_cntx;
+
+	u8 h2c_result;
+	u8 h2c_seqnum;
+	u16 h2c_cmdcode;
+	u8 h2c_resp_parambuf[512];
+	_lock h2c_lock;
+	_lock wkitm_lock;
+	u32 h2c_cmdcnt;
+	NDIS_EVENT h2c_cmd_evt;
+	NDIS_EVENT c2h_set;
+	NDIS_EVENT h2c_clr;
+	NDIS_EVENT cpwm_int;
+
+	NDIS_EVENT scsir_full_evt;
+	NDIS_EVENT scsiw_empty_evt;
+#endif
+
+	u8 *pallocated_mp_xmitframe_buf;
+	u8 *pmp_xmtframe_buf;
+	_queue free_mp_xmitqueue;
+	u32 free_mp_xmitframe_cnt;
+
+	MPT_CONTEXT MptCtx;
+};
+
+typedef struct _IOCMD_STRUCT_ {
+	u8	cmdclass;
+	u16	value;
+	u8	index;
+}IOCMD_STRUCT;
+
+struct rf_reg_param {
+	u32 path;
+	u32 offset;
+	u32 value;
+};
+
+struct bb_reg_param {
+	u32 offset;
+	u32 value;
+};
+//=======================================================================
+
+#define LOWER 	_TRUE
+#define RAISE	_FALSE
+
+/* Hardware Registers */
+#if 0
+#if 0
+#define IOCMD_CTRL_REG			0x102502C0
+#define IOCMD_DATA_REG			0x102502C4
+#else
+#define IOCMD_CTRL_REG			0x10250370
+#define IOCMD_DATA_REG			0x10250374
+#endif
+
+#define IOCMD_GET_THERMAL_METER		0xFD000028
+
+#define IOCMD_CLASS_BB_RF		0xF0
+#define IOCMD_BB_READ_IDX		0x00
+#define IOCMD_BB_WRITE_IDX		0x01
+#define IOCMD_RF_READ_IDX		0x02
+#define IOCMD_RF_WRIT_IDX		0x03
+#endif
+#define BB_REG_BASE_ADDR		0x800
+
+/* MP variables */
+#if 0
+#define _2MAC_MODE_	0
+#define _LOOPBOOK_MODE_	1
+#endif
+typedef enum _MP_MODE_ {
+	MP_OFF,
+	MP_ON,
+	MP_ERR,
+	MP_CONTINUOUS_TX,
+	MP_SINGLE_CARRIER_TX,
+	MP_CARRIER_SUPPRISSION_TX,
+	MP_SINGLE_TONE_TX,
+	MP_PACKET_TX,
+	MP_PACKET_RX
+} MP_MODE;
+
+#ifdef CONFIG_RTL8192C
+#define RF_PATH_A 	RF_PATH_A
+#define RF_PATH_B 	RF_PATH_B
+#define RF_PATH_C 	RF_PATH_C
+#define RF_PATH_D 	RF_PATH_D
+
+#define MAX_RF_PATH_NUMS	RF_PATH_MAX
+#else
+#define RF_PATH_A 	0
+#define RF_PATH_B 	1
+#define RF_PATH_C 	2
+#define RF_PATH_D 	3
+
+#define MAX_RF_PATH_NUMS	2
+#endif
+
+extern u8 mpdatarate[NumRates];
+
+/* MP set force data rate base on the definition. */
+typedef enum _MPT_RATE_INDEX
+{
+	/* CCK rate. */
+	MPT_RATE_1M,	/* 0 */
+	MPT_RATE_2M,
+	MPT_RATE_55M,
+	MPT_RATE_11M,	/* 3 */
+
+	/* OFDM rate. */
+	MPT_RATE_6M,	/* 4 */
+	MPT_RATE_9M,
+	MPT_RATE_12M,
+	MPT_RATE_18M,
+	MPT_RATE_24M,
+	MPT_RATE_36M,
+	MPT_RATE_48M,
+	MPT_RATE_54M,	/* 11 */
+
+	/* HT rate. */
+	MPT_RATE_MCS0,	/* 12 */
+	MPT_RATE_MCS1,
+	MPT_RATE_MCS2,
+	MPT_RATE_MCS3,
+	MPT_RATE_MCS4,
+	MPT_RATE_MCS5,
+	MPT_RATE_MCS6,
+	MPT_RATE_MCS7,	/* 19 */
+	MPT_RATE_MCS8,
+	MPT_RATE_MCS9,
+	MPT_RATE_MCS10,
+	MPT_RATE_MCS11,
+	MPT_RATE_MCS12,
+	MPT_RATE_MCS13,
+	MPT_RATE_MCS14,
+	MPT_RATE_MCS15,	/* 27 */
+	MPT_RATE_LAST
+}MPT_RATE_E, *PMPT_RATE_E;
+
+#if 0
+// Represent Channel Width in HT Capabilities
+typedef enum _HT_CHANNEL_WIDTH {
+	HT_CHANNEL_WIDTH_20 = 0,
+	HT_CHANNEL_WIDTH_40 = 1,
+}HT_CHANNEL_WIDTH, *PHT_CHANNEL_WIDTH;
+#endif
+
+#define MAX_TX_PWR_INDEX_N_MODE 64	// 0x3F
+
+typedef enum _POWER_MODE_ {
+	POWER_LOW = 0,
+	POWER_NORMAL
+}POWER_MODE;
+
+
+#define RX_PKT_BROADCAST	1
+#define RX_PKT_DEST_ADDR	2
+#define RX_PKT_PHY_MATCH	3
+
+#if 0
+#define RPTMaxCount 0x000FFFFF;
+
+// parameter 1 : BitMask
+// 	bit 0  : OFDM PPDU
+//	bit 1  : OFDM False Alarm
+//	bit 2  : OFDM MPDU OK
+//	bit 3  : OFDM MPDU Fail
+//	bit 4  : CCK PPDU
+//	bit 5  : CCK False Alarm
+//	bit 6  : CCK MPDU ok
+//	bit 7  : CCK MPDU fail
+//	bit 8  : HT PPDU counter
+//	bit 9  : HT false alarm
+//	bit 10 : HT MPDU total
+//	bit 11 : HT MPDU OK
+//	bit 12 : HT MPDU fail
+//	bit 15 : RX full drop
+typedef enum _RXPHY_BITMASK_
+{
+	OFDM_PPDU_BIT = 0,
+	OFDM_FALSE_BIT,
+	OFDM_MPDU_OK_BIT,
+	OFDM_MPDU_FAIL_BIT,
+	CCK_PPDU_BIT,
+	CCK_FALSE_BIT,
+	CCK_MPDU_OK_BIT,
+	CCK_MPDU_FAIL_BIT,
+	HT_PPDU_BIT,
+	HT_FALSE_BIT,
+	HT_MPDU_BIT,
+	HT_MPDU_OK_BIT,
+	HT_MPDU_FAIL_BIT,
+} RXPHY_BITMASK;
+#endif
+
+typedef enum _ENCRY_CTRL_STATE_ {
+	HW_CONTROL,		//hw encryption& decryption
+	SW_CONTROL,		//sw encryption& decryption
+	HW_ENCRY_SW_DECRY,	//hw encryption & sw decryption
+	SW_ENCRY_HW_DECRY	//sw encryption & hw decryption
+}ENCRY_CTRL_STATE;
+
+
+//=======================================================================
+//extern struct mp_xmit_frame *alloc_mp_xmitframe(struct mp_priv *pmp_priv);
+//extern int free_mp_xmitframe(struct xmit_priv *pxmitpriv, struct mp_xmit_frame *pmp_xmitframe);
+
+extern s32 init_mp_priv(PADAPTER padapter);
+extern void free_mp_priv(struct mp_priv *pmp_priv);
+extern s32 MPT_InitializeAdapter(PADAPTER padapter, u8 Channel);
+extern void MPT_DeInitAdapter(PADAPTER padapter);
+extern s32 mp_start_test(PADAPTER padapter);
+extern void mp_stop_test(PADAPTER padapter);
+
+//=======================================================================
+//extern void	IQCalibrateBcut(PADAPTER pAdapter);
+
+//extern u32	bb_reg_read(PADAPTER Adapter, u16 offset);
+//extern u8	bb_reg_write(PADAPTER Adapter, u16 offset, u32 value);
+//extern u32	rf_reg_read(PADAPTER Adapter, u8 path, u8 offset);
+//extern u8	rf_reg_write(PADAPTER Adapter, u8 path, u8 offset, u32 value);
+
+//extern u32	get_bb_reg(PADAPTER Adapter, u16 offset, u32 bitmask);
+//extern u8	set_bb_reg(PADAPTER Adapter, u16 offset, u32 bitmask, u32 value);
+//extern u32	get_rf_reg(PADAPTER Adapter, u8 path, u8 offset, u32 bitmask);
+//extern u8	set_rf_reg(PADAPTER Adapter, u8 path, u8 offset, u32 bitmask, u32 value);
+
+extern u32 _read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask);
+extern void _write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask, u32 val);
+
+extern u32 read_macreg(_adapter *padapter, u32 addr, u32 sz);
+extern void write_macreg(_adapter *padapter, u32 addr, u32 val, u32 sz);
+extern u32 read_bbreg(_adapter *padapter, u32 addr, u32 bitmask);
+extern void write_bbreg(_adapter *padapter, u32 addr, u32 bitmask, u32 val);
+extern u32 read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr);
+extern void write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 val);
+
+extern void	SetChannel(PADAPTER pAdapter);
+extern void	SetBandwidth(PADAPTER pAdapter);
+extern void	SetTxPower(PADAPTER pAdapter);
+extern void	SetAntennaPathPower(PADAPTER pAdapter);
+//extern void	SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset);
+extern void	SetDataRate(PADAPTER pAdapter);
+
+extern void	SetAntenna(PADAPTER pAdapter);
+
+//extern void	SetCrystalCap(PADAPTER pAdapter);
+
+extern s32	SetThermalMeter(PADAPTER pAdapter, u8 target_ther);
+extern void	GetThermalMeter(PADAPTER pAdapter, u8 *value);
+
+extern void	SetContinuousTx(PADAPTER pAdapter, u8 bStart);
+extern void	SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart);
+extern void	SetSingleToneTx(PADAPTER pAdapter, u8 bStart);
+extern void	SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart);
+
+extern void	fill_txdesc_for_mp(PADAPTER padapter, struct tx_desc *ptxdesc);
+extern void	SetPacketTx(PADAPTER padapter);
+extern void	SetPacketRx(PADAPTER pAdapter, u8 bStartRx);
+
+extern void	ResetPhyRxPktCount(PADAPTER pAdapter);
+extern u32	GetPhyRxPktReceived(PADAPTER pAdapter);
+extern u32	GetPhyRxPktCRC32Error(PADAPTER pAdapter);
+
+extern s32	SetPowerTracking(PADAPTER padapter, u8 enable);
+extern void	GetPowerTracking(PADAPTER padapter, u8 *enable);
+
+extern u32	mp_query_psd(PADAPTER pAdapter, u8 *data);
+
+extern u32	rtw_atoi(u8 *s);
+
+
+extern void Hal_SetAntenna(PADAPTER pAdapter);
+extern void Hal_SetBandwidth(PADAPTER pAdapter);
+
+extern void Hal_SetTxPower(PADAPTER pAdapter);
+extern void Hal_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart);
+extern void Hal_SetSingleToneTx ( PADAPTER pAdapter , u8 bStart );
+extern void Hal_SetSingleCarrierTx (PADAPTER pAdapter, u8 bStart);
+extern void Hal_SetContinuousTx (PADAPTER pAdapter, u8 bStart);
+extern void Hal_SetBandwidth(PADAPTER pAdapter);
+
+extern void Hal_SetDataRate(PADAPTER pAdapter);
+extern void Hal_SetChannel(PADAPTER pAdapter);
+extern void Hal_SetAntennaPathPower(PADAPTER pAdapter);
+extern s32 Hal_SetThermalMeter(PADAPTER pAdapter, u8 target_ther);
+extern s32 Hal_SetPowerTracking(PADAPTER padapter, u8 enable);
+extern void Hal_GetPowerTracking(PADAPTER padapter, u8 * enable);
+extern void Hal_GetThermalMeter(PADAPTER pAdapter, u8 *value);
+extern void Hal_mpt_SwitchRfSetting(PADAPTER pAdapter);
+extern void Hal_MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14);
+extern void Hal_MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven);
+extern void Hal_SetCCKTxPower(PADAPTER pAdapter, u8 * TxPower);
+extern void Hal_SetOFDMTxPower(PADAPTER pAdapter, u8 * TxPower);
+extern void Hal_TriggerRFThermalMeter(PADAPTER pAdapter);
+extern u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter);
+extern void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart);
+extern void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart);
+extern void Hal_ProSetCrystalCap (PADAPTER pAdapter , u32 CrystalCapVal);
+
+#endif //_RTW_MP_H_
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_mp_ioctl.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_mp_ioctl.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_mp_ioctl.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_mp_ioctl.h	2017-09-23 03:42:50.054674955 +0800
@@ -0,0 +1,596 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef _RTW_MP_IOCTL_H_
+#define _RTW_MP_IOCTL_H_
+
+//#include <drv_conf.h>
+//#include <osdep_service.h>
+#include <drv_types.h>
+#include <mp_custom_oid.h>
+#include <rtw_ioctl.h>
+#include <rtw_ioctl_rtl.h>
+#include <rtw_efuse.h>
+#include <rtw_mp.h>
+
+#if 0
+#define TESTFWCMDNUMBER			1000000
+#define TEST_H2CINT_WAIT_TIME		500
+#define TEST_C2HINT_WAIT_TIME		500
+#define HCI_TEST_SYSCFG_HWMASK		1
+#define _BUSCLK_40M			(4 << 2)
+#endif
+//------------------------------------------------------------------------------
+typedef struct CFG_DBG_MSG_STRUCT {
+	u32 DebugLevel;
+	u32 DebugComponent_H32;
+	u32 DebugComponent_L32;
+}CFG_DBG_MSG_STRUCT,*PCFG_DBG_MSG_STRUCT;
+
+typedef struct _RW_REG {
+	u32 offset;
+	u32 width;
+	u32 value;
+}mp_rw_reg,RW_Reg, *pRW_Reg;
+
+//for OID_RT_PRO_READ16_EEPROM & OID_RT_PRO_WRITE16_EEPROM
+typedef struct _EEPROM_RW_PARAM {
+	u32 offset;
+	u16 value;
+}eeprom_rw_param,EEPROM_RWParam, *pEEPROM_RWParam;
+
+typedef struct _EFUSE_ACCESS_STRUCT_ {
+	u16	start_addr;
+	u16	cnts;
+	u8	data[0];
+}EFUSE_ACCESS_STRUCT, *PEFUSE_ACCESS_STRUCT;
+
+typedef struct _BURST_RW_REG {
+	u32 offset;
+	u32 len;
+	u8 Data[256];
+}burst_rw_reg,Burst_RW_Reg, *pBurst_RW_Reg;
+
+typedef struct _USB_VendorReq{
+	u8	bRequest;
+	u16	wValue;
+	u16	wIndex;
+	u16	wLength;
+	u8	u8Dir;//0:OUT, 1:IN
+	u8	u8InData;
+}usb_vendor_req, USB_VendorReq, *pUSB_VendorReq;
+
+typedef struct _DR_VARIABLE_STRUCT_ {
+	u8 offset;
+	u32 variable;
+}DR_VARIABLE_STRUCT;
+
+//int mp_start_joinbss(_adapter *padapter, NDIS_802_11_SSID *pssid);
+
+//void _irqlevel_changed_(_irqL *irqlevel, /*BOOLEAN*/unsigned char bLower);
+#ifdef PLATFORM_OS_XP
+static void _irqlevel_changed_(_irqL *irqlevel, u8 bLower)
+{
+
+	if (bLower == LOWER) {
+		*irqlevel = KeGetCurrentIrql();
+
+		if (*irqlevel > PASSIVE_LEVEL) {
+			KeLowerIrql(PASSIVE_LEVEL);
+		}
+	} else {
+		if (KeGetCurrentIrql() == PASSIVE_LEVEL) {
+			KeRaiseIrql(DISPATCH_LEVEL, irqlevel);
+		}
+	}
+
+}
+#else
+#define _irqlevel_changed_(a,b)
+#endif
+
+//oid_rtl_seg_81_80_00
+NDIS_STATUS oid_rt_pro_set_data_rate_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_start_test_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_stop_test_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_set_channel_direct_call_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_set_antenna_bb_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_set_tx_power_control_hdl(struct oid_par_priv* poid_par_priv);
+//oid_rtl_seg_81_80_20
+NDIS_STATUS oid_rt_pro_query_tx_packet_sent_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_query_rx_packet_received_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_query_rx_packet_crc32_error_hdl(struct oid_par_priv* poid_par_priv);
+
+NDIS_STATUS oid_rt_pro_reset_tx_packet_sent_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_reset_rx_packet_received_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_set_modulation_hdl(struct oid_par_priv* poid_par_priv);
+
+NDIS_STATUS oid_rt_pro_set_continuous_tx_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_set_single_carrier_tx_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_set_carrier_suppression_tx_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_set_single_tone_tx_hdl(struct oid_par_priv* poid_par_priv);
+
+
+//oid_rtl_seg_81_87
+NDIS_STATUS oid_rt_pro_write_bb_reg_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_read_bb_reg_hdl(struct oid_par_priv* poid_par_priv);
+
+NDIS_STATUS oid_rt_pro_write_rf_reg_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_read_rf_reg_hdl(struct oid_par_priv* poid_par_priv);
+
+
+//oid_rtl_seg_81_85
+NDIS_STATUS oid_rt_wireless_mode_hdl(struct oid_par_priv* poid_par_priv);
+
+
+// oid_rtl_seg_87_11_00
+NDIS_STATUS oid_rt_pro8711_join_bss_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_read_register_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_write_register_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_burst_read_register_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_burst_write_register_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_write_txcmd_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_read16_eeprom_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_write16_eeprom_hdl (struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro8711_wi_poll_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro8711_pkt_loss_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_rd_attrib_mem_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_wr_attrib_mem_hdl (struct oid_par_priv* poid_par_priv);
+NDIS_STATUS  oid_rt_pro_set_rf_intfs_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_poll_rx_status_hdl(struct oid_par_priv* poid_par_priv);
+// oid_rtl_seg_87_11_20
+NDIS_STATUS oid_rt_pro_cfg_debug_message_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_set_data_rate_ex_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_set_basic_rate_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_read_tssi_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_set_power_tracking_hdl(struct oid_par_priv* poid_par_priv);
+//oid_rtl_seg_87_11_50
+NDIS_STATUS oid_rt_pro_qry_pwrstate_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_set_pwrstate_hdl(struct oid_par_priv* poid_par_priv);
+//oid_rtl_seg_87_11_F0
+NDIS_STATUS oid_rt_pro_h2c_set_rate_table_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_h2c_get_rate_table_hdl(struct oid_par_priv* poid_par_priv);
+
+
+//oid_rtl_seg_87_12_00
+NDIS_STATUS oid_rt_pro_encryption_ctrl_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_add_sta_info_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_dele_sta_info_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_query_dr_variable_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_rx_packet_type_hdl(struct oid_par_priv* poid_par_priv);
+
+NDIS_STATUS oid_rt_pro_read_efuse_hdl(struct oid_par_priv *poid_par_priv);
+NDIS_STATUS oid_rt_pro_write_efuse_hdl(struct oid_par_priv *poid_par_priv);
+NDIS_STATUS oid_rt_pro_rw_efuse_pgpkt_hdl(struct oid_par_priv *poid_par_priv);
+NDIS_STATUS oid_rt_get_efuse_current_size_hdl(struct oid_par_priv *poid_par_priv);
+NDIS_STATUS oid_rt_pro_efuse_hdl(struct oid_par_priv *poid_par_priv);
+NDIS_STATUS oid_rt_pro_efuse_map_hdl(struct oid_par_priv *poid_par_priv);
+
+NDIS_STATUS oid_rt_set_bandwidth_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_set_crystal_cap_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_set_rx_packet_type_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_get_efuse_max_size_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_pro_set_tx_agc_offset_hdl(struct oid_par_priv* poid_par_priv);
+
+NDIS_STATUS oid_rt_pro_set_pkt_test_mode_hdl(struct oid_par_priv* poid_par_priv);
+
+NDIS_STATUS oid_rt_get_thermal_meter_hdl(struct oid_par_priv* poid_par_priv);
+
+NDIS_STATUS oid_rt_reset_phy_rx_packet_count_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_get_phy_rx_packet_received_hdl(struct oid_par_priv* poid_par_priv);
+NDIS_STATUS oid_rt_get_phy_rx_packet_crc32_error_hdl(struct oid_par_priv* poid_par_priv);
+
+NDIS_STATUS oid_rt_set_power_down_hdl(struct oid_par_priv* poid_par_priv);
+
+NDIS_STATUS oid_rt_get_power_mode_hdl(struct oid_par_priv* poid_par_priv);
+
+NDIS_STATUS oid_rt_pro_trigger_gpio_hdl(struct oid_par_priv *poid_par_priv);
+
+#ifdef _RTW_MP_IOCTL_C_
+
+const struct oid_obj_priv oid_rtl_seg_81_80_00[] =
+{
+	{1, &oid_null_function},			//0x00	OID_RT_PRO_RESET_DUT
+	{1, &oid_rt_pro_set_data_rate_hdl},		//0x01
+	{1, &oid_rt_pro_start_test_hdl},		//0x02
+	{1, &oid_rt_pro_stop_test_hdl},			//0x03
+	{1, &oid_null_function},			//0x04	OID_RT_PRO_SET_PREAMBLE
+	{1, &oid_null_function},			//0x05	OID_RT_PRO_SET_SCRAMBLER
+	{1, &oid_null_function},			//0x06	OID_RT_PRO_SET_FILTER_BB
+	{1, &oid_null_function},			//0x07	OID_RT_PRO_SET_MANUAL_DIVERSITY_BB
+	{1, &oid_rt_pro_set_channel_direct_call_hdl},	//0x08
+	{1, &oid_null_function},			//0x09	OID_RT_PRO_SET_SLEEP_MODE_DIRECT_CALL
+	{1, &oid_null_function},			//0x0A	OID_RT_PRO_SET_WAKE_MODE_DIRECT_CALL
+	{1, &oid_rt_pro_set_continuous_tx_hdl},		//0x0B	OID_RT_PRO_SET_TX_CONTINUOUS_DIRECT_CALL
+	{1, &oid_rt_pro_set_single_carrier_tx_hdl},	//0x0C	OID_RT_PRO_SET_SINGLE_CARRIER_TX_CONTINUOUS
+	{1, &oid_null_function},			//0x0D	OID_RT_PRO_SET_TX_ANTENNA_BB
+	{1, &oid_rt_pro_set_antenna_bb_hdl},		//0x0E
+	{1, &oid_null_function},			//0x0F	OID_RT_PRO_SET_CR_SCRAMBLER
+	{1, &oid_null_function},			//0x10	OID_RT_PRO_SET_CR_NEW_FILTER
+	{1, &oid_rt_pro_set_tx_power_control_hdl},	//0x11	OID_RT_PRO_SET_TX_POWER_CONTROL
+	{1, &oid_null_function},			//0x12	OID_RT_PRO_SET_CR_TX_CONFIG
+	{1, &oid_null_function},			//0x13	OID_RT_PRO_GET_TX_POWER_CONTROL
+	{1, &oid_null_function},			//0x14	OID_RT_PRO_GET_CR_SIGNAL_QUALITY
+	{1, &oid_null_function},			//0x15	OID_RT_PRO_SET_CR_SETPOINT
+	{1, &oid_null_function},			//0x16	OID_RT_PRO_SET_INTEGRATOR
+	{1, &oid_null_function},			//0x17	OID_RT_PRO_SET_SIGNAL_QUALITY
+	{1, &oid_null_function},			//0x18	OID_RT_PRO_GET_INTEGRATOR
+	{1, &oid_null_function},			//0x19	OID_RT_PRO_GET_SIGNAL_QUALITY
+	{1, &oid_null_function},			//0x1A	OID_RT_PRO_QUERY_EEPROM_TYPE
+	{1, &oid_null_function},			//0x1B	OID_RT_PRO_WRITE_MAC_ADDRESS
+	{1, &oid_null_function},			//0x1C	OID_RT_PRO_READ_MAC_ADDRESS
+	{1, &oid_null_function},			//0x1D	OID_RT_PRO_WRITE_CIS_DATA
+	{1, &oid_null_function},			//0x1E	OID_RT_PRO_READ_CIS_DATA
+	{1, &oid_null_function}				//0x1F	OID_RT_PRO_WRITE_POWER_CONTROL
+
+};
+
+const struct oid_obj_priv oid_rtl_seg_81_80_20[] =
+{
+	{1, &oid_null_function},			//0x20	OID_RT_PRO_READ_POWER_CONTROL
+	{1, &oid_null_function},			//0x21	OID_RT_PRO_WRITE_EEPROM
+	{1, &oid_null_function},			//0x22	OID_RT_PRO_READ_EEPROM
+	{1, &oid_rt_pro_reset_tx_packet_sent_hdl},	//0x23
+	{1, &oid_rt_pro_query_tx_packet_sent_hdl},	//0x24
+	{1, &oid_rt_pro_reset_rx_packet_received_hdl},	//0x25
+	{1, &oid_rt_pro_query_rx_packet_received_hdl},	//0x26
+	{1, &oid_rt_pro_query_rx_packet_crc32_error_hdl},	//0x27
+	{1, &oid_null_function},			//0x28	OID_RT_PRO_QUERY_CURRENT_ADDRESS
+	{1, &oid_null_function},			//0x29	OID_RT_PRO_QUERY_PERMANENT_ADDRESS
+	{1, &oid_null_function},			//0x2A	OID_RT_PRO_SET_PHILIPS_RF_PARAMETERS
+	{1, &oid_rt_pro_set_carrier_suppression_tx_hdl},//0x2B	OID_RT_PRO_SET_CARRIER_SUPPRESSION_TX
+	{1, &oid_null_function},			//0x2C	OID_RT_PRO_RECEIVE_PACKET
+	{1, &oid_null_function},			//0x2D	OID_RT_PRO_WRITE_EEPROM_BYTE
+	{1, &oid_null_function},			//0x2E	OID_RT_PRO_READ_EEPROM_BYTE
+	{1, &oid_rt_pro_set_modulation_hdl}		//0x2F
+
+};
+
+const struct oid_obj_priv oid_rtl_seg_81_80_40[] =
+{
+	{1, &oid_null_function},			//0x40
+	{1, &oid_null_function},			//0x41
+	{1, &oid_null_function},			//0x42
+	{1, &oid_rt_pro_set_single_tone_tx_hdl},	//0x43
+	{1, &oid_null_function},			//0x44
+	{1, &oid_null_function}				//0x45
+};
+
+const struct oid_obj_priv oid_rtl_seg_81_80_80[] =
+{
+	{1, &oid_null_function},			//0x80	OID_RT_DRIVER_OPTION
+	{1, &oid_null_function},			//0x81	OID_RT_RF_OFF
+	{1, &oid_null_function}				//0x82	OID_RT_AUTH_STATUS
+
+};
+
+const struct oid_obj_priv oid_rtl_seg_81_85[] =
+{
+	{1, &oid_rt_wireless_mode_hdl}			//0x00	OID_RT_WIRELESS_MODE
+};
+
+struct oid_obj_priv oid_rtl_seg_81_87[] =
+{
+	{1, &oid_null_function},			//0x80	OID_RT_PRO8187_WI_POLL
+	{1, &oid_rt_pro_write_bb_reg_hdl},		//0x81
+	{1, &oid_rt_pro_read_bb_reg_hdl},		//0x82
+	{1, &oid_rt_pro_write_rf_reg_hdl},		//0x82
+	{1, &oid_rt_pro_read_rf_reg_hdl}		//0x83
+};
+
+struct oid_obj_priv oid_rtl_seg_87_11_00[] =
+{
+	{1, &oid_rt_pro8711_join_bss_hdl},		//0x00  //S
+	{1, &oid_rt_pro_read_register_hdl},		//0x01
+	{1, &oid_rt_pro_write_register_hdl},		//0x02
+	{1, &oid_rt_pro_burst_read_register_hdl},	//0x03
+	{1, &oid_rt_pro_burst_write_register_hdl},	//0x04
+	{1, &oid_rt_pro_write_txcmd_hdl},		//0x05
+	{1, &oid_rt_pro_read16_eeprom_hdl},		//0x06
+	{1, &oid_rt_pro_write16_eeprom_hdl},		//0x07
+	{1, &oid_null_function},			//0x08	OID_RT_PRO_H2C_SET_COMMAND
+	{1, &oid_null_function},			//0x09	OID_RT_PRO_H2C_QUERY_RESULT
+	{1, &oid_rt_pro8711_wi_poll_hdl},		//0x0A
+	{1, &oid_rt_pro8711_pkt_loss_hdl},		//0x0B
+	{1, &oid_rt_rd_attrib_mem_hdl},			//0x0C
+	{1, &oid_rt_wr_attrib_mem_hdl},			//0x0D
+	{1, &oid_null_function},			//0x0E
+	{1, &oid_null_function},			//0x0F
+	{1, &oid_null_function},			//0x10	OID_RT_PRO_H2C_CMD_MODE
+	{1, &oid_null_function},			//0x11	OID_RT_PRO_H2C_CMD_RSP_MODE
+	{1, &oid_null_function},			//0X12	OID_RT_PRO_WAIT_C2H_EVENT
+	{1, &oid_null_function},			//0X13	OID_RT_PRO_RW_ACCESS_PROTOCOL_TEST
+	{1, &oid_null_function},			//0X14	OID_RT_PRO_SCSI_ACCESS_TEST
+	{1, &oid_null_function},			//0X15	OID_RT_PRO_SCSI_TCPIPOFFLOAD_OUT
+	{1, &oid_null_function},			//0X16	OID_RT_PRO_SCSI_TCPIPOFFLOAD_IN
+	{1, &oid_null_function},			//0X17	OID_RT_RRO_RX_PKT_VIA_IOCTRL
+	{1, &oid_null_function},			//0X18	OID_RT_RRO_RX_PKTARRAY_VIA_IOCTRL
+	{1, &oid_null_function},			//0X19	OID_RT_RPO_SET_PWRMGT_TEST
+	{1, &oid_null_function},			//0X1A
+	{1, &oid_null_function},			//0X1B	OID_RT_PRO_QRY_PWRMGT_TEST
+	{1, &oid_null_function},			//0X1C	OID_RT_RPO_ASYNC_RWIO_TEST
+	{1, &oid_null_function},			//0X1D	OID_RT_RPO_ASYNC_RWIO_POLL
+	{1, &oid_rt_pro_set_rf_intfs_hdl},		//0X1E
+	{1, &oid_rt_poll_rx_status_hdl}			//0X1F
+};
+
+struct oid_obj_priv oid_rtl_seg_87_11_20[] =
+{
+	{1, &oid_rt_pro_cfg_debug_message_hdl},		//0x20
+	{1, &oid_rt_pro_set_data_rate_ex_hdl},		//0x21
+	{1, &oid_rt_pro_set_basic_rate_hdl},		//0x22
+	{1, &oid_rt_pro_read_tssi_hdl},			//0x23
+	{1, &oid_rt_pro_set_power_tracking_hdl}		//0x24
+};
+
+
+struct oid_obj_priv oid_rtl_seg_87_11_50[] =
+{
+	{1, &oid_rt_pro_qry_pwrstate_hdl},		//0x50
+	{1, &oid_rt_pro_set_pwrstate_hdl}		//0x51
+};
+
+struct oid_obj_priv oid_rtl_seg_87_11_80[] =
+{
+	{1, &oid_null_function}				//0x80
+};
+
+struct oid_obj_priv oid_rtl_seg_87_11_B0[] =
+{
+	{1, &oid_null_function}				//0xB0
+};
+
+struct oid_obj_priv oid_rtl_seg_87_11_F0[] =
+{
+	{1, &oid_null_function},			//0xF0
+	{1, &oid_null_function},			//0xF1
+	{1, &oid_null_function},			//0xF2
+	{1, &oid_null_function},			//0xF3
+	{1, &oid_null_function},			//0xF4
+	{1, &oid_null_function},			//0xF5
+	{1, &oid_null_function},			//0xF6
+	{1, &oid_null_function},			//0xF7
+	{1, &oid_null_function},			//0xF8
+	{1, &oid_null_function},			//0xF9
+	{1, &oid_null_function},			//0xFA
+	{1, &oid_rt_pro_h2c_set_rate_table_hdl},	//0xFB
+	{1, &oid_rt_pro_h2c_get_rate_table_hdl},	//0xFC
+	{1, &oid_null_function},			//0xFD
+	{1, &oid_null_function},			//0xFE	OID_RT_PRO_H2C_C2H_LBK_TEST
+	{1, &oid_null_function}				//0xFF
+
+};
+
+struct oid_obj_priv oid_rtl_seg_87_12_00[]=
+{
+	{1, &oid_rt_pro_encryption_ctrl_hdl},		//0x00	Q&S
+	{1, &oid_rt_pro_add_sta_info_hdl},		//0x01	S
+	{1, &oid_rt_pro_dele_sta_info_hdl},		//0x02	S
+	{1, &oid_rt_pro_query_dr_variable_hdl},		//0x03	Q
+	{1, &oid_rt_pro_rx_packet_type_hdl},		//0x04	Q,S
+	{1, &oid_rt_pro_read_efuse_hdl},		//0x05	Q	OID_RT_PRO_READ_EFUSE
+	{1, &oid_rt_pro_write_efuse_hdl},		//0x06	S	OID_RT_PRO_WRITE_EFUSE
+	{1, &oid_rt_pro_rw_efuse_pgpkt_hdl},		//0x07	Q,S
+	{1, &oid_rt_get_efuse_current_size_hdl},	//0x08 	Q
+	{1, &oid_rt_set_bandwidth_hdl},			//0x09
+	{1, &oid_rt_set_crystal_cap_hdl},		//0x0a
+	{1, &oid_rt_set_rx_packet_type_hdl},		//0x0b	S
+	{1, &oid_rt_get_efuse_max_size_hdl},		//0x0c
+	{1, &oid_rt_pro_set_tx_agc_offset_hdl},		//0x0d
+	{1, &oid_rt_pro_set_pkt_test_mode_hdl},		//0x0e
+	{1, &oid_null_function},			//0x0f		OID_RT_PRO_FOR_EVM_TEST_SETTING
+	{1, &oid_rt_get_thermal_meter_hdl},		//0x10	Q	OID_RT_PRO_GET_THERMAL_METER
+	{1, &oid_rt_reset_phy_rx_packet_count_hdl},	//0x11	S	OID_RT_RESET_PHY_RX_PACKET_COUNT
+	{1, &oid_rt_get_phy_rx_packet_received_hdl},	//0x12	Q	OID_RT_GET_PHY_RX_PACKET_RECEIVED
+	{1, &oid_rt_get_phy_rx_packet_crc32_error_hdl},	//0x13	Q	OID_RT_GET_PHY_RX_PACKET_CRC32_ERROR
+	{1, &oid_rt_set_power_down_hdl},		//0x14	Q	OID_RT_SET_POWER_DOWN
+	{1, &oid_rt_get_power_mode_hdl}			//0x15	Q	OID_RT_GET_POWER_MODE
+};
+
+#else /* _RTL871X_MP_IOCTL_C_ */
+
+extern struct oid_obj_priv oid_rtl_seg_81_80_00[32];
+extern struct oid_obj_priv oid_rtl_seg_81_80_20[16];
+extern struct oid_obj_priv oid_rtl_seg_81_80_40[6];
+extern struct oid_obj_priv oid_rtl_seg_81_80_80[3];
+
+extern struct oid_obj_priv oid_rtl_seg_81_85[1];
+extern struct oid_obj_priv oid_rtl_seg_81_87[5];
+
+extern struct oid_obj_priv oid_rtl_seg_87_11_00[32];
+extern struct oid_obj_priv oid_rtl_seg_87_11_20[5];
+extern struct oid_obj_priv oid_rtl_seg_87_11_50[2];
+extern struct oid_obj_priv oid_rtl_seg_87_11_80[1];
+extern struct oid_obj_priv oid_rtl_seg_87_11_B0[1];
+extern struct oid_obj_priv oid_rtl_seg_87_11_F0[16];
+
+extern struct oid_obj_priv oid_rtl_seg_87_12_00[32];
+
+#endif /* _RTL871X_MP_IOCTL_C_ */
+
+struct rwreg_param{
+	u32 offset;
+	u32 width;
+	u32 value;
+};
+
+struct bbreg_param{
+	u32 offset;
+	u32 phymask;
+	u32 value;
+};
+/*
+struct rfchannel_param{
+	u32 ch;
+	u32 modem;
+};
+*/
+struct txpower_param{
+	u32 pwr_index;
+};
+
+
+struct datarate_param{
+	u32 rate_index;
+};
+
+
+struct rfintfs_parm {
+	u32 rfintfs;
+};
+
+typedef struct _mp_xmit_parm_ {
+	u8 enable;
+	u32 count;
+	u16 length;
+	u8 payload_type;
+	u8 da[ETH_ALEN];
+}MP_XMIT_PARM, *PMP_XMIT_PARM;
+
+struct mp_xmit_packet {
+	u32 len;
+	u32 mem[MAX_MP_XMITBUF_SZ >> 2];
+};
+
+struct psmode_param {
+	u32 ps_mode;
+	u32 smart_ps;
+};
+
+//for OID_RT_PRO_READ16_EEPROM & OID_RT_PRO_WRITE16_EEPROM
+struct eeprom_rw_param {
+	u32 offset;
+	u16 value;
+};
+
+struct mp_ioctl_handler {
+	u32 paramsize;
+	u32 (*handler)(struct oid_par_priv* poid_par_priv);
+	u32 oid;
+};
+
+struct mp_ioctl_param{
+	u32 subcode;
+	u32 len;
+	u8 data[0];
+};
+
+#define GEN_MP_IOCTL_SUBCODE(code) _MP_IOCTL_ ## code ## _CMD_
+
+enum RTL871X_MP_IOCTL_SUBCODE {
+	GEN_MP_IOCTL_SUBCODE(MP_START),			/*0*/
+	GEN_MP_IOCTL_SUBCODE(MP_STOP),
+	GEN_MP_IOCTL_SUBCODE(READ_REG),
+	GEN_MP_IOCTL_SUBCODE(WRITE_REG),
+	GEN_MP_IOCTL_SUBCODE(READ_BB_REG),
+	GEN_MP_IOCTL_SUBCODE(WRITE_BB_REG),		/*5*/
+	GEN_MP_IOCTL_SUBCODE(READ_RF_REG),
+	GEN_MP_IOCTL_SUBCODE(WRITE_RF_REG),
+	GEN_MP_IOCTL_SUBCODE(SET_CHANNEL),
+	GEN_MP_IOCTL_SUBCODE(SET_TXPOWER),
+	GEN_MP_IOCTL_SUBCODE(SET_DATARATE),		/*10*/
+	GEN_MP_IOCTL_SUBCODE(SET_BANDWIDTH),
+	GEN_MP_IOCTL_SUBCODE(SET_ANTENNA),
+	GEN_MP_IOCTL_SUBCODE(CNTU_TX),
+	GEN_MP_IOCTL_SUBCODE(SC_TX),
+	GEN_MP_IOCTL_SUBCODE(CS_TX),			/*15*/
+	GEN_MP_IOCTL_SUBCODE(ST_TX),
+	GEN_MP_IOCTL_SUBCODE(IOCTL_XMIT_PACKET),
+	GEN_MP_IOCTL_SUBCODE(SET_RX_PKT_TYPE),
+	GEN_MP_IOCTL_SUBCODE(RESET_PHY_RX_PKT_CNT),
+	GEN_MP_IOCTL_SUBCODE(GET_PHY_RX_PKT_RECV),	/*20*/
+	GEN_MP_IOCTL_SUBCODE(GET_PHY_RX_PKT_ERROR),
+	GEN_MP_IOCTL_SUBCODE(READ16_EEPROM),
+	GEN_MP_IOCTL_SUBCODE(WRITE16_EEPROM),
+	GEN_MP_IOCTL_SUBCODE(EFUSE),
+	GEN_MP_IOCTL_SUBCODE(EFUSE_MAP),		/*25*/
+	GEN_MP_IOCTL_SUBCODE(GET_EFUSE_MAX_SIZE),
+	GEN_MP_IOCTL_SUBCODE(GET_EFUSE_CURRENT_SIZE),
+	GEN_MP_IOCTL_SUBCODE(GET_THERMAL_METER),
+	GEN_MP_IOCTL_SUBCODE(SET_PTM),
+	GEN_MP_IOCTL_SUBCODE(SET_POWER_DOWN),		/*30*/
+	GEN_MP_IOCTL_SUBCODE(TRIGGER_GPIO),
+	GEN_MP_IOCTL_SUBCODE(SET_DM_BT),		/*35*/
+	GEN_MP_IOCTL_SUBCODE(DEL_BA),			/*36*/
+	GEN_MP_IOCTL_SUBCODE(GET_WIFI_STATUS),	/*37*/	
+	MAX_MP_IOCTL_SUBCODE,
+};
+
+u32 mp_ioctl_xmit_packet_hdl(struct oid_par_priv* poid_par_priv);
+
+#ifdef _RTW_MP_IOCTL_C_
+
+#define GEN_MP_IOCTL_HANDLER(sz, hdl, oid) {sz, hdl, oid},
+
+#define EXT_MP_IOCTL_HANDLER(sz, subcode, oid) {sz, mp_ioctl_ ## subcode ## _hdl, oid},
+
+
+struct mp_ioctl_handler mp_ioctl_hdl[] = {
+
+/*0*/	GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_start_test_hdl, OID_RT_PRO_START_TEST)
+	GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_stop_test_hdl, OID_RT_PRO_STOP_TEST)
+
+	GEN_MP_IOCTL_HANDLER(sizeof(struct rwreg_param), oid_rt_pro_read_register_hdl, OID_RT_PRO_READ_REGISTER)
+	GEN_MP_IOCTL_HANDLER(sizeof(struct rwreg_param), oid_rt_pro_write_register_hdl, OID_RT_PRO_WRITE_REGISTER)
+	GEN_MP_IOCTL_HANDLER(sizeof(struct bb_reg_param), oid_rt_pro_read_bb_reg_hdl, OID_RT_PRO_READ_BB_REG)
+/*5*/	GEN_MP_IOCTL_HANDLER(sizeof(struct bb_reg_param), oid_rt_pro_write_bb_reg_hdl, OID_RT_PRO_WRITE_BB_REG)
+	GEN_MP_IOCTL_HANDLER(sizeof(struct rf_reg_param), oid_rt_pro_read_rf_reg_hdl, OID_RT_PRO_RF_READ_REGISTRY)
+	GEN_MP_IOCTL_HANDLER(sizeof(struct rf_reg_param), oid_rt_pro_write_rf_reg_hdl, OID_RT_PRO_RF_WRITE_REGISTRY)
+
+	GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_channel_direct_call_hdl, OID_RT_PRO_SET_CHANNEL_DIRECT_CALL)
+	GEN_MP_IOCTL_HANDLER(sizeof(struct txpower_param), oid_rt_pro_set_tx_power_control_hdl, OID_RT_PRO_SET_TX_POWER_CONTROL)
+/*10*/	GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_data_rate_hdl, OID_RT_PRO_SET_DATA_RATE)
+	GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_set_bandwidth_hdl, OID_RT_SET_BANDWIDTH)
+	GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_antenna_bb_hdl, OID_RT_PRO_SET_ANTENNA_BB)
+
+	GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_continuous_tx_hdl, OID_RT_PRO_SET_CONTINUOUS_TX)
+	GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_single_carrier_tx_hdl, OID_RT_PRO_SET_SINGLE_CARRIER_TX)
+/*15*/	GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_carrier_suppression_tx_hdl, OID_RT_PRO_SET_CARRIER_SUPPRESSION_TX)
+	GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_single_tone_tx_hdl, OID_RT_PRO_SET_SINGLE_TONE_TX)
+
+	EXT_MP_IOCTL_HANDLER(0, xmit_packet, 0)
+
+	GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_set_rx_packet_type_hdl, OID_RT_SET_RX_PACKET_TYPE)
+	GEN_MP_IOCTL_HANDLER(0, oid_rt_reset_phy_rx_packet_count_hdl, OID_RT_RESET_PHY_RX_PACKET_COUNT)
+/*20*/	GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_get_phy_rx_packet_received_hdl, OID_RT_GET_PHY_RX_PACKET_RECEIVED)
+	GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_get_phy_rx_packet_crc32_error_hdl, OID_RT_GET_PHY_RX_PACKET_CRC32_ERROR)
+
+	GEN_MP_IOCTL_HANDLER(sizeof(struct eeprom_rw_param), NULL, 0)
+	GEN_MP_IOCTL_HANDLER(sizeof(struct eeprom_rw_param), NULL, 0)
+	GEN_MP_IOCTL_HANDLER(sizeof(EFUSE_ACCESS_STRUCT), oid_rt_pro_efuse_hdl, OID_RT_PRO_EFUSE)
+/*25*/	GEN_MP_IOCTL_HANDLER(0, oid_rt_pro_efuse_map_hdl, OID_RT_PRO_EFUSE_MAP)
+	GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_get_efuse_max_size_hdl, OID_RT_GET_EFUSE_MAX_SIZE)
+	GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_get_efuse_current_size_hdl, OID_RT_GET_EFUSE_CURRENT_SIZE)
+
+	GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_get_thermal_meter_hdl, OID_RT_PRO_GET_THERMAL_METER)
+	GEN_MP_IOCTL_HANDLER(sizeof(u8), oid_rt_pro_set_power_tracking_hdl, OID_RT_PRO_SET_POWER_TRACKING)
+/*30*/	GEN_MP_IOCTL_HANDLER(sizeof(u8), oid_rt_set_power_down_hdl, OID_RT_SET_POWER_DOWN)
+/*31*/	GEN_MP_IOCTL_HANDLER(0, oid_rt_pro_trigger_gpio_hdl, 0)
+
+
+};
+
+#else /* _RTW_MP_IOCTL_C_ */
+
+extern struct mp_ioctl_handler mp_ioctl_hdl[];
+
+#endif /* _RTW_MP_IOCTL_C_ */
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_mp_phy_regdef.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_mp_phy_regdef.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_mp_phy_regdef.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_mp_phy_regdef.h	2017-09-23 03:42:50.058674942 +0800
@@ -0,0 +1,1098 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+/*****************************************************************************
+ *
+ * Module:	__RTW_MP_PHY_REGDEF_H_
+ *
+ *
+ * Note:	1. Define PMAC/BB register map
+ *			2. Define RF register map
+ *			3. PMAC/BB register bit mask.
+ *			4. RF reg bit mask.
+ *			5. Other BB/RF relative definition.
+ *			
+ *
+ * Export:	Constants, macro, functions(API), global variables(None).
+ *
+ * Abbrev:	
+ *
+ * History:
+ *	Data			Who		Remark 
+ *	08/07/2007	MHC		1. Porting from 9x series PHYCFG.h.
+ *						2. Reorganize code architecture.
+ *	09/25/2008	MH		1. Add RL6052 register definition
+ * 
+ *****************************************************************************/
+#ifndef __RTW_MP_PHY_REGDEF_H_
+#define __RTW_MP_PHY_REGDEF_H_
+
+
+/*--------------------------Define Parameters-------------------------------*/
+
+//============================================================
+//       8192S Regsiter offset definition
+//============================================================
+
+//
+// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF
+// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF
+// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00
+// 3. RF register 0x00-2E
+// 4. Bit Mask for BB/RF register
+// 5. Other defintion for BB/RF R/W
+//
+
+
+//
+// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF
+// 1. Page1(0x100)
+//
+#define		rPMAC_Reset					0x100
+#define		rPMAC_TxStart					0x104
+#define		rPMAC_TxLegacySIG				0x108
+#define		rPMAC_TxHTSIG1				0x10c
+#define		rPMAC_TxHTSIG2				0x110
+#define		rPMAC_PHYDebug				0x114
+#define		rPMAC_TxPacketNum				0x118
+#define		rPMAC_TxIdle					0x11c
+#define		rPMAC_TxMACHeader0			0x120
+#define		rPMAC_TxMACHeader1			0x124
+#define		rPMAC_TxMACHeader2			0x128
+#define		rPMAC_TxMACHeader3			0x12c
+#define		rPMAC_TxMACHeader4			0x130
+#define		rPMAC_TxMACHeader5			0x134
+#define		rPMAC_TxDataType				0x138
+#define		rPMAC_TxRandomSeed			0x13c
+#define		rPMAC_CCKPLCPPreamble			0x140
+#define		rPMAC_CCKPLCPHeader			0x144
+#define		rPMAC_CCKCRC16				0x148
+#define		rPMAC_OFDMRxCRC32OK			0x170
+#define		rPMAC_OFDMRxCRC32Er			0x174
+#define		rPMAC_OFDMRxParityEr			0x178
+#define		rPMAC_OFDMRxCRC8Er			0x17c
+#define		rPMAC_CCKCRxRC16Er			0x180
+#define		rPMAC_CCKCRxRC32Er			0x184
+#define		rPMAC_CCKCRxRC32OK			0x188
+#define		rPMAC_TxStatus					0x18c
+
+//
+// 2. Page2(0x200)
+//
+// The following two definition are only used for USB interface.
+//#define		RF_BB_CMD_ADDR				0x02c0	// RF/BB read/write command address.
+//#define		RF_BB_CMD_DATA				0x02c4	// RF/BB read/write command data.
+
+//
+// 3. Page8(0x800)
+//
+#define		rFPGA0_RFMOD				0x800	//RF mode & CCK TxSC // RF BW Setting??
+
+#define		rFPGA0_TxInfo				0x804	// Status report??
+#define		rFPGA0_PSDFunction			0x808
+
+#define		rFPGA0_TxGainStage			0x80c	// Set TX PWR init gain?
+
+#define		rFPGA0_RFTiming1			0x810	// Useless now
+#define		rFPGA0_RFTiming2			0x814
+//#define rFPGA0_XC_RFTiming        		0x818
+//#define rFPGA0_XD_RFTiming        		0x81c
+
+#define		rFPGA0_XA_HSSIParameter1		0x820	// RF 3 wire register
+#define		rFPGA0_XA_HSSIParameter2		0x824
+#define		rFPGA0_XB_HSSIParameter1		0x828
+#define		rFPGA0_XB_HSSIParameter2		0x82c
+#define		rFPGA0_XC_HSSIParameter1		0x830
+#define		rFPGA0_XC_HSSIParameter2		0x834
+#define		rFPGA0_XD_HSSIParameter1		0x838
+#define		rFPGA0_XD_HSSIParameter2		0x83c
+#define		rFPGA0_XA_LSSIParameter		0x840
+#define		rFPGA0_XB_LSSIParameter		0x844
+#define		rFPGA0_XC_LSSIParameter		0x848
+#define		rFPGA0_XD_LSSIParameter		0x84c
+
+#define		rFPGA0_RFWakeUpParameter		0x850	// Useless now
+#define		rFPGA0_RFSleepUpParameter		0x854
+
+#define		rFPGA0_XAB_SwitchControl		0x858	// RF Channel switch
+#define		rFPGA0_XCD_SwitchControl		0x85c
+
+#define		rFPGA0_XA_RFInterfaceOE		0x860	// RF Channel switch
+#define		rFPGA0_XB_RFInterfaceOE		0x864
+#define		rFPGA0_XC_RFInterfaceOE		0x868
+#define		rFPGA0_XD_RFInterfaceOE		0x86c
+
+#define		rFPGA0_XAB_RFInterfaceSW		0x870	// RF Interface Software Control
+#define		rFPGA0_XCD_RFInterfaceSW		0x874
+
+#define		rFPGA0_XAB_RFParameter		0x878	// RF Parameter
+#define		rFPGA0_XCD_RFParameter		0x87c
+
+#define		rFPGA0_AnalogParameter1		0x880	// Crystal cap setting RF-R/W protection for parameter4??
+#define		rFPGA0_AnalogParameter2		0x884
+#define		rFPGA0_AnalogParameter3		0x888	// Useless now
+#define		rFPGA0_AnalogParameter4		0x88c
+
+#define		rFPGA0_XA_LSSIReadBack		0x8a0	// Tranceiver LSSI Readback
+#define		rFPGA0_XB_LSSIReadBack		0x8a4
+#define		rFPGA0_XC_LSSIReadBack		0x8a8
+#define		rFPGA0_XD_LSSIReadBack		0x8ac
+
+#define		rFPGA0_PSDReport				0x8b4	// Useless now
+#define		rFPGA0_XAB_RFInterfaceRB		0x8e0	// Useless now // RF Interface Readback Value
+#define		rFPGA0_XCD_RFInterfaceRB		0x8e4	// Useless now
+
+//
+// 4. Page9(0x900)
+//
+#define		rFPGA1_RFMOD				0x900	//RF mode & OFDM TxSC // RF BW Setting??
+
+#define		rFPGA1_TxBlock				0x904	// Useless now
+#define		rFPGA1_DebugSelect			0x908	// Useless now
+#define		rFPGA1_TxInfo				0x90c	// Useless now // Status report??
+
+//
+// 5. PageA(0xA00)
+//
+// Set Control channel to upper or lower. These settings are required only for 40MHz
+#define		rCCK0_System				0xa00
+
+#define		rCCK0_AFESetting			0xa04	// Disable init gain now // Select RX path by RSSI
+#define		rCCK0_CCA					0xa08	// Disable init gain now // Init gain
+
+#define		rCCK0_RxAGC1				0xa0c 	//AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series
+#define		rCCK0_RxAGC2				0xa10 	//AGC & DAGC
+
+#define		rCCK0_RxHP					0xa14
+
+#define		rCCK0_DSPParameter1		0xa18	//Timing recovery & Channel estimation threshold
+#define		rCCK0_DSPParameter2		0xa1c	//SQ threshold
+
+#define		rCCK0_TxFilter1				0xa20
+#define		rCCK0_TxFilter2				0xa24
+#define		rCCK0_DebugPort			0xa28	//debug port and Tx filter3
+#define		rCCK0_FalseAlarmReport		0xa2c	//0xa2d	useless now 0xa30-a4f channel report
+#define		rCCK0_TRSSIReport         		0xa50
+#define		rCCK0_RxReport            		0xa54  //0xa57
+#define		rCCK0_FACounterLower      	0xa5c  //0xa5b
+#define		rCCK0_FACounterUpper      	0xa58  //0xa5c
+
+//
+// 6. PageC(0xC00)
+//
+#define		rOFDM0_LSTF				0xc00
+
+#define		rOFDM0_TRxPathEnable		0xc04
+#define		rOFDM0_TRMuxPar			0xc08
+#define		rOFDM0_TRSWIsolation		0xc0c
+
+#define		rOFDM0_XARxAFE			0xc10  //RxIQ DC offset, Rx digital filter, DC notch filter
+#define		rOFDM0_XARxIQImbalance    	0xc14  //RxIQ imblance matrix
+#define		rOFDM0_XBRxAFE            		0xc18
+#define		rOFDM0_XBRxIQImbalance    	0xc1c
+#define		rOFDM0_XCRxAFE            		0xc20
+#define		rOFDM0_XCRxIQImbalance    	0xc24
+#define		rOFDM0_XDRxAFE            		0xc28
+#define		rOFDM0_XDRxIQImbalance    	0xc2c
+
+#define		rOFDM0_RxDetector1			0xc30  //PD,BW & SBD	// DM tune init gain
+#define		rOFDM0_RxDetector2			0xc34  //SBD & Fame Sync. 
+#define		rOFDM0_RxDetector3			0xc38  //Frame Sync.
+#define		rOFDM0_RxDetector4			0xc3c  //PD, SBD, Frame Sync & Short-GI
+
+#define		rOFDM0_RxDSP				0xc40  //Rx Sync Path
+#define		rOFDM0_CFOandDAGC		0xc44  //CFO & DAGC
+#define		rOFDM0_CCADropThreshold	0xc48 //CCA Drop threshold
+#define		rOFDM0_ECCAThreshold		0xc4c // energy CCA
+
+#define		rOFDM0_XAAGCCore1			0xc50	// DIG  
+#define		rOFDM0_XAAGCCore2			0xc54
+#define		rOFDM0_XBAGCCore1			0xc58
+#define		rOFDM0_XBAGCCore2			0xc5c
+#define		rOFDM0_XCAGCCore1			0xc60
+#define		rOFDM0_XCAGCCore2			0xc64
+#define		rOFDM0_XDAGCCore1			0xc68
+#define		rOFDM0_XDAGCCore2			0xc6c
+
+#define		rOFDM0_AGCParameter1			0xc70
+#define		rOFDM0_AGCParameter2			0xc74
+#define		rOFDM0_AGCRSSITable			0xc78
+#define		rOFDM0_HTSTFAGC				0xc7c
+
+#define		rOFDM0_XATxIQImbalance		0xc80	// TX PWR TRACK and DIG
+#define		rOFDM0_XATxAFE				0xc84
+#define		rOFDM0_XBTxIQImbalance		0xc88
+#define		rOFDM0_XBTxAFE				0xc8c
+#define		rOFDM0_XCTxIQImbalance		0xc90
+#define		rOFDM0_XCTxAFE            			0xc94
+#define		rOFDM0_XDTxIQImbalance		0xc98
+#define		rOFDM0_XDTxAFE				0xc9c
+#define		rOFDM0_RxIQExtAnta			0xca0
+
+#define		rOFDM0_RxHPParameter			0xce0
+#define		rOFDM0_TxPseudoNoiseWgt		0xce4
+#define		rOFDM0_FrameSync				0xcf0
+#define		rOFDM0_DFSReport				0xcf4
+#define		rOFDM0_TxCoeff1				0xca4
+#define		rOFDM0_TxCoeff2				0xca8
+#define		rOFDM0_TxCoeff3				0xcac
+#define		rOFDM0_TxCoeff4				0xcb0
+#define		rOFDM0_TxCoeff5				0xcb4
+#define		rOFDM0_TxCoeff6				0xcb8
+
+
+//
+// 7. PageD(0xD00)
+//
+#define		rOFDM1_LSTF					0xd00
+#define		rOFDM1_TRxPathEnable			0xd04
+
+#define		rOFDM1_CFO						0xd08	// No setting now
+#define		rOFDM1_CSI1					0xd10
+#define		rOFDM1_SBD						0xd14
+#define		rOFDM1_CSI2					0xd18
+#define		rOFDM1_CFOTracking			0xd2c
+#define		rOFDM1_TRxMesaure1			0xd34
+#define		rOFDM1_IntfDet					0xd3c
+#define		rOFDM1_PseudoNoiseStateAB		0xd50
+#define		rOFDM1_PseudoNoiseStateCD		0xd54
+#define		rOFDM1_RxPseudoNoiseWgt		0xd58
+
+#define		rOFDM_PHYCounter1				0xda0  //cca, parity fail
+#define		rOFDM_PHYCounter2				0xda4  //rate illegal, crc8 fail
+#define		rOFDM_PHYCounter3				0xda8  //MCS not support
+
+#define		rOFDM_ShortCFOAB				0xdac	// No setting now
+#define		rOFDM_ShortCFOCD				0xdb0
+#define		rOFDM_LongCFOAB				0xdb4
+#define		rOFDM_LongCFOCD				0xdb8
+#define		rOFDM_TailCFOAB				0xdbc
+#define		rOFDM_TailCFOCD				0xdc0
+#define		rOFDM_PWMeasure1          		0xdc4
+#define		rOFDM_PWMeasure2          		0xdc8
+#define		rOFDM_BWReport				0xdcc
+#define		rOFDM_AGCReport				0xdd0
+#define		rOFDM_RxSNR					0xdd4
+#define		rOFDM_RxEVMCSI				0xdd8
+#define		rOFDM_SIGReport				0xddc
+
+
+//
+// 8. PageE(0xE00)
+//
+#define		rTxAGC_Rate18_06				0xe00
+#define		rTxAGC_Rate54_24				0xe04
+#define		rTxAGC_CCK_Mcs32				0xe08
+#define		rTxAGC_Mcs03_Mcs00			0xe10
+#define		rTxAGC_Mcs07_Mcs04			0xe14
+#define		rTxAGC_Mcs11_Mcs08			0xe18
+#define		rTxAGC_Mcs15_Mcs12			0xe1c
+
+// Analog- control in RX_WAIT_CCA : REG: EE0 [Analog- Power & Control Register]
+#define 		rRx_Wait_CCCA					0xe70
+#define		rAnapar_Ctrl_BB					0xee0
+
+//
+// 7. RF Register 0x00-0x2E (RF 8256)
+//    RF-0222D 0x00-3F
+//
+//Zebra1
+#define RTL92SE_FPGA_VERIFY 0
+#define		rZebra1_HSSIEnable				0x0	// Useless now
+#define		rZebra1_TRxEnable1				0x1
+#define		rZebra1_TRxEnable2				0x2
+#define		rZebra1_AGC					0x4
+#define		rZebra1_ChargePump			0x5
+//#if (RTL92SE_FPGA_VERIFY == 1)
+#define		rZebra1_Channel				0x7	// RF channel switch
+//#else
+
+//#endif
+#define		rZebra1_TxGain					0x8	// Useless now
+#define		rZebra1_TxLPF					0x9
+#define		rZebra1_RxLPF					0xb
+#define		rZebra1_RxHPFCorner			0xc
+
+//Zebra4
+#define		rGlobalCtrl						0	// Useless now
+#define		rRTL8256_TxLPF					19
+#define		rRTL8256_RxLPF					11
+
+//RTL8258
+#define		rRTL8258_TxLPF					0x11	// Useless now
+#define		rRTL8258_RxLPF					0x13
+#define		rRTL8258_RSSILPF				0xa
+
+//
+// RL6052 Register definition
+//
+#define		RF_AC						0x00	// 
+
+#define		RF_IQADJ_G1				0x01	// 
+#define		RF_IQADJ_G2				0x02	// 
+#define		RF_POW_TRSW				0x05	// 
+
+#define		RF_GAIN_RX					0x06	// 
+#define		RF_GAIN_TX					0x07	// 
+
+#define		RF_TXM_IDAC				0x08	// 
+#define		RF_BS_IQGEN				0x0F	// 
+
+#define		RF_MODE1					0x10	// 
+#define		RF_MODE2					0x11	// 
+
+#define		RF_RX_AGC_HP				0x12	// 
+#define		RF_TX_AGC					0x13	// 
+#define		RF_BIAS						0x14	// 
+#define		RF_IPA						0x15	// 
+#define		RF_POW_ABILITY			0x17	// 
+#define		RF_MODE_AG				0x18	// 
+#define		rRfChannel					0x18	// RF channel and BW switch
+#define		RF_CHNLBW					0x18	// RF channel and BW switch
+#define		RF_TOP						0x19	// 
+
+#define		RF_RX_G1					0x1A	// 
+#define		RF_RX_G2					0x1B	// 
+
+#define		RF_RX_BB2					0x1C	// 
+#define		RF_RX_BB1					0x1D	// 
+
+#define		RF_RCK1					0x1E	// 
+#define		RF_RCK2					0x1F	// 
+
+#define		RF_TX_G1					0x20	// 
+#define		RF_TX_G2					0x21	// 
+#define		RF_TX_G3					0x22	// 
+
+#define		RF_TX_BB1					0x23	// 
+
+#define		RF_T_METER					0x24	// 
+
+#define		RF_SYN_G1					0x25	// RF TX Power control
+#define		RF_SYN_G2					0x26	// RF TX Power control
+#define		RF_SYN_G3					0x27	// RF TX Power control
+#define		RF_SYN_G4					0x28	// RF TX Power control
+#define		RF_SYN_G5					0x29	// RF TX Power control
+#define		RF_SYN_G6					0x2A	// RF TX Power control
+#define		RF_SYN_G7					0x2B	// RF TX Power control
+#define		RF_SYN_G8					0x2C	// RF TX Power control
+
+#define		RF_RCK_OS					0x30	// RF TX PA control
+
+#define		RF_TXPA_G1					0x31	// RF TX PA control
+#define		RF_TXPA_G2					0x32	// RF TX PA control
+#define		RF_TXPA_G3					0x33	// RF TX PA control
+
+//
+//Bit Mask
+//
+// 1. Page1(0x100)
+#define		bBBResetB						0x100	// Useless now?
+#define		bGlobalResetB					0x200
+#define		bOFDMTxStart					0x4
+#define		bCCKTxStart						0x8
+#define		bCRC32Debug					0x100
+#define		bPMACLoopback					0x10
+#define		bTxLSIG							0xffffff
+#define		bOFDMTxRate					0xf
+#define		bOFDMTxReserved				0x10
+#define		bOFDMTxLength					0x1ffe0
+#define		bOFDMTxParity					0x20000
+#define		bTxHTSIG1						0xffffff
+#define		bTxHTMCSRate					0x7f
+#define		bTxHTBW						0x80
+#define		bTxHTLength					0xffff00
+#define		bTxHTSIG2						0xffffff
+#define		bTxHTSmoothing					0x1
+#define		bTxHTSounding					0x2
+#define		bTxHTReserved					0x4
+#define		bTxHTAggreation				0x8
+#define		bTxHTSTBC						0x30
+#define		bTxHTAdvanceCoding			0x40
+#define		bTxHTShortGI					0x80
+#define		bTxHTNumberHT_LTF			0x300
+#define		bTxHTCRC8						0x3fc00
+#define		bCounterReset					0x10000
+#define		bNumOfOFDMTx					0xffff
+#define		bNumOfCCKTx					0xffff0000
+#define		bTxIdleInterval					0xffff
+#define		bOFDMService					0xffff0000
+#define		bTxMACHeader					0xffffffff
+#define		bTxDataInit						0xff
+#define		bTxHTMode						0x100
+#define		bTxDataType					0x30000
+#define		bTxRandomSeed					0xffffffff
+#define		bCCKTxPreamble					0x1
+#define		bCCKTxSFD						0xffff0000
+#define		bCCKTxSIG						0xff
+#define		bCCKTxService					0xff00
+#define		bCCKLengthExt					0x8000
+#define		bCCKTxLength					0xffff0000
+#define		bCCKTxCRC16					0xffff
+#define		bCCKTxStatus					0x1
+#define		bOFDMTxStatus					0x2
+
+#define 		IS_BB_REG_OFFSET_92S(_Offset)		((_Offset >= 0x800) && (_Offset <= 0xfff))
+
+// 2. Page8(0x800)
+#define		bRFMOD							0x1	// Reg 0x800 rFPGA0_RFMOD
+#define		bJapanMode						0x2
+#define		bCCKTxSC						0x30
+#define		bCCKEn							0x1000000
+#define		bOFDMEn						0x2000000
+
+#define		bOFDMRxADCPhase           		0x10000	// Useless now
+#define		bOFDMTxDACPhase           		0x40000
+#define		bXATxAGC                  			0x3f
+
+#define		bXBTxAGC                  			0xf00	// Reg 80c rFPGA0_TxGainStage
+#define		bXCTxAGC                  			0xf000
+#define		bXDTxAGC                  			0xf0000
+       		
+#define		bPAStart                  			0xf0000000	// Useless now
+#define		bTRStart                  			0x00f00000
+#define		bRFStart                  			0x0000f000
+#define		bBBStart                  			0x000000f0
+#define		bBBCCKStart               		0x0000000f
+#define		bPAEnd                    			0xf          //Reg0x814
+#define		bTREnd                    			0x0f000000
+#define		bRFEnd                    			0x000f0000
+#define		bCCAMask                  			0x000000f0   //T2R
+#define		bR2RCCAMask               		0x00000f00
+#define		bHSSI_R2TDelay            		0xf8000000
+#define		bHSSI_T2RDelay            		0xf80000
+#define		bContTxHSSI               		0x400     //chane gain at continue Tx
+#define		bIGFromCCK                		0x200
+#define		bAGCAddress               		0x3f
+#define		bRxHPTx                   			0x7000
+#define		bRxHPT2R                  			0x38000
+#define		bRxHPCCKIni               		0xc0000
+#define		bAGCTxCode                		0xc00000
+#define		bAGCRxCode                		0x300000
+
+#define		b3WireDataLength          		0x800	// Reg 0x820~84f rFPGA0_XA_HSSIParameter1
+#define		b3WireAddressLength       		0x400
+
+#define		b3WireRFPowerDown         		0x1	// Useless now
+//#define bHWSISelect               		0x8
+#define		b5GPAPEPolarity           		0x40000000
+#define		b2GPAPEPolarity           		0x80000000
+#define		bRFSW_TxDefaultAnt        		0x3
+#define		bRFSW_TxOptionAnt         		0x30
+#define		bRFSW_RxDefaultAnt        		0x300
+#define		bRFSW_RxOptionAnt         		0x3000
+#define		bRFSI_3WireData           		0x1
+#define		bRFSI_3WireClock          		0x2
+#define		bRFSI_3WireLoad           		0x4
+#define		bRFSI_3WireRW             		0x8
+#define		bRFSI_3Wire               			0xf
+
+#define		bRFSI_RFENV               		0x10	// Reg 0x870 rFPGA0_XAB_RFInterfaceSW
+
+#define		bRFSI_TRSW                		0x20	// Useless now
+#define		bRFSI_TRSWB               		0x40
+#define		bRFSI_ANTSW               		0x100
+#define		bRFSI_ANTSWB              		0x200
+#define		bRFSI_PAPE                			0x400
+#define		bRFSI_PAPE5G              		0x800 
+#define		bBandSelect               			0x1
+#define		bHTSIG2_GI                			0x80
+#define		bHTSIG2_Smoothing         		0x01
+#define		bHTSIG2_Sounding          		0x02
+#define		bHTSIG2_Aggreaton         		0x08
+#define		bHTSIG2_STBC              		0x30
+#define		bHTSIG2_AdvCoding         		0x40
+#define		bHTSIG2_NumOfHTLTF        	0x300
+#define		bHTSIG2_CRC8              		0x3fc
+#define		bHTSIG1_MCS               		0x7f
+#define		bHTSIG1_BandWidth         		0x80
+#define		bHTSIG1_HTLength          		0xffff
+#define		bLSIG_Rate                			0xf
+#define		bLSIG_Reserved            		0x10
+#define		bLSIG_Length              		0x1fffe
+#define		bLSIG_Parity              			0x20
+#define		bCCKRxPhase               		0x4
+#if (RTL92SE_FPGA_VERIFY == 1)
+#define		bLSSIReadAddress          		0x3f000000   //LSSI "Read" Address	// Reg 0x824 rFPGA0_XA_HSSIParameter2
+#else
+#define		bLSSIReadAddress          		0x7f800000   // T65 RF
+#endif
+#define		bLSSIReadEdge             		0x80000000   //LSSI "Read" edge signal
+#if (RTL92SE_FPGA_VERIFY == 1)
+#define		bLSSIReadBackData         		0xfff		// Reg 0x8a0 rFPGA0_XA_LSSIReadBack
+#else
+#define		bLSSIReadBackData         		0xfffff		// T65 RF
+#endif
+#define		bLSSIReadOKFlag           		0x1000	// Useless now
+#define		bCCKSampleRate            		0x8       //0: 44MHz, 1:88MHz       		
+#define		bRegulator0Standby        		0x1
+#define		bRegulatorPLLStandby      		0x2
+#define		bRegulator1Standby        		0x4
+#define		bPLLPowerUp               		0x8
+#define		bDPLLPowerUp              		0x10
+#define		bDA10PowerUp              		0x20
+#define		bAD7PowerUp               		0x200
+#define		bDA6PowerUp               		0x2000
+#define		bXtalPowerUp              		0x4000
+#define		b40MDClkPowerUP           		0x8000
+#define		bDA6DebugMode             		0x20000
+#define		bDA6Swing                 			0x380000
+
+#define		bADClkPhase               		0x4000000	// Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ
+
+#define		b80MClkDelay              		0x18000000	// Useless
+#define		bAFEWatchDogEnable        		0x20000000
+
+#define		bXtalCap01                			0xc0000000	// Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap
+#define		bXtalCap23                			0x3
+#define		bXtalCap92x					0x0f000000
+#define 		bXtalCap                			0x0f000000
+
+#define		bIntDifClkEnable          		0x400	// Useless
+#define		bExtSigClkEnable         	 	0x800
+#define		bBandgapMbiasPowerUp      	0x10000
+#define		bAD11SHGain               		0xc0000
+#define		bAD11InputRange           		0x700000
+#define		bAD11OPCurrent            		0x3800000
+#define		bIPathLoopback            		0x4000000
+#define		bQPathLoopback            		0x8000000
+#define		bAFELoopback              		0x10000000
+#define		bDA10Swing                		0x7e0
+#define		bDA10Reverse              		0x800
+#define		bDAClkSource              		0x1000
+#define		bAD7InputRange            		0x6000
+#define		bAD7Gain                  			0x38000
+#define		bAD7OutputCMMode          		0x40000
+#define		bAD7InputCMMode           		0x380000
+#define		bAD7Current               			0xc00000
+#define		bRegulatorAdjust          		0x7000000
+#define		bAD11PowerUpAtTx          		0x1
+#define		bDA10PSAtTx               		0x10
+#define		bAD11PowerUpAtRx          		0x100
+#define		bDA10PSAtRx               		0x1000       		
+#define		bCCKRxAGCFormat           		0x200       		
+#define		bPSDFFTSamplepPoint       		0xc000
+#define		bPSDAverageNum            		0x3000
+#define		bIQPathControl            		0xc00
+#define		bPSDFreq                  			0x3ff
+#define		bPSDAntennaPath           		0x30
+#define		bPSDIQSwitch              		0x40
+#define		bPSDRxTrigger             		0x400000
+#define		bPSDTxTrigger             		0x80000000
+#define		bPSDSineToneScale        		0x7f000000
+#define		bPSDReport                			0xffff
+
+// 3. Page9(0x900)
+#define		bOFDMTxSC                 		0x30000000	// Useless
+#define		bCCKTxOn                  			0x1
+#define		bOFDMTxOn                 		0x2
+#define		bDebugPage                		0xfff  //reset debug page and also HWord, LWord
+#define		bDebugItem                		0xff   //reset debug page and LWord
+#define		bAntL              	       		0x10
+#define		bAntNonHT           	      			0x100
+#define		bAntHT1               			0x1000
+#define		bAntHT2                   			0x10000
+#define		bAntHT1S1                 			0x100000
+#define		bAntNonHTS1               		0x1000000
+
+// 4. PageA(0xA00)
+#define		bCCKBBMode                		0x3	// Useless
+#define		bCCKTxPowerSaving         		0x80
+#define		bCCKRxPowerSaving         		0x40
+
+#define		bCCKSideBand              		0x10	// Reg 0xa00 rCCK0_System 20/40 switch
+
+#define		bCCKScramble              		0x8	// Useless
+#define		bCCKAntDiversity    		      	0x8000
+#define		bCCKCarrierRecovery   	    	0x4000
+#define		bCCKTxRate           		     	0x3000
+#define		bCCKDCCancel             	 	0x0800
+#define		bCCKISICancel             		0x0400
+#define		bCCKMatchFilter           		0x0200
+#define		bCCKEqualizer             		0x0100
+#define		bCCKPreambleDetect       	 	0x800000
+#define		bCCKFastFalseCCA          		0x400000
+#define		bCCKChEstStart            		0x300000
+#define		bCCKCCACount              		0x080000
+#define		bCCKcs_lim                			0x070000
+#define		bCCKBistMode              		0x80000000
+#define		bCCKCCAMask             	  	0x40000000
+#define		bCCKTxDACPhase         	   	0x4
+#define		bCCKRxADCPhase         	   	0x20000000   //r_rx_clk
+#define		bCCKr_cp_mode0         	   	0x0100
+#define		bCCKTxDCOffset           	 	0xf0
+#define		bCCKRxDCOffset           	 	0xf
+#define		bCCKCCAMode              	 	0xc000
+#define		bCCKFalseCS_lim           		0x3f00
+#define		bCCKCS_ratio              		0xc00000
+#define		bCCKCorgBit_sel           		0x300000
+#define		bCCKPD_lim                			0x0f0000
+#define		bCCKNewCCA                		0x80000000
+#define		bCCKRxHPofIG              		0x8000
+#define		bCCKRxIG                  			0x7f00
+#define		bCCKLNAPolarity           		0x800000
+#define		bCCKRx1stGain             		0x7f0000
+#define		bCCKRFExtend              		0x20000000 //CCK Rx Iinital gain polarity
+#define		bCCKRxAGCSatLevel        	 	0x1f000000
+#define		bCCKRxAGCSatCount       	  	0xe0
+#define		bCCKRxRFSettle            		0x1f       //AGCsamp_dly
+#define		bCCKFixedRxAGC           	 	0x8000
+//#define bCCKRxAGCFormat         	 	0x4000   //remove to HSSI register 0x824
+#define		bCCKAntennaPolarity      	 	0x2000
+#define		bCCKTxFilterType          		0x0c00
+#define		bCCKRxAGCReportType   	   	0x0300
+#define		bCCKRxDAGCEn              		0x80000000
+#define		bCCKRxDAGCPeriod        	  	0x20000000
+#define		bCCKRxDAGCSatLevel     	   	0x1f000000
+#define		bCCKTimingRecovery       	 	0x800000
+#define		bCCKTxC0                  			0x3f0000
+#define		bCCKTxC1                  			0x3f000000
+#define		bCCKTxC2                  			0x3f
+#define		bCCKTxC3                  			0x3f00
+#define		bCCKTxC4                  			0x3f0000
+#define		bCCKTxC5                  			0x3f000000
+#define		bCCKTxC6                  			0x3f
+#define		bCCKTxC7                  			0x3f00
+#define		bCCKDebugPort             		0xff0000
+#define		bCCKDACDebug              		0x0f000000
+#define		bCCKFalseAlarmEnable      		0x8000
+#define		bCCKFalseAlarmRead        		0x4000
+#define		bCCKTRSSI                 			0x7f
+#define		bCCKRxAGCReport           		0xfe
+#define		bCCKRxReport_AntSel       		0x80000000
+#define		bCCKRxReport_MFOff        		0x40000000
+#define		bCCKRxRxReport_SQLoss     	0x20000000
+#define		bCCKRxReport_Pktloss      		0x10000000
+#define		bCCKRxReport_Lockedbit    	0x08000000
+#define		bCCKRxReport_RateError    	0x04000000
+#define		bCCKRxReport_RxRate       		0x03000000
+#define		bCCKRxFACounterLower      	0xff
+#define		bCCKRxFACounterUpper      	0xff000000
+#define		bCCKRxHPAGCStart          		0xe000
+#define		bCCKRxHPAGCFinal          		0x1c00       		
+#define		bCCKRxFalseAlarmEnable    	0x8000
+#define		bCCKFACounterFreeze       		0x4000       		
+#define		bCCKTxPathSel             		0x10000000
+#define		bCCKDefaultRxPath         		0xc000000
+#define		bCCKOptionRxPath          		0x3000000
+
+// 5. PageC(0xC00)
+#define		bNumOfSTF                			0x3	// Useless
+#define		bShift_L                 			0xc0
+#define		bGI_TH                   			0xc
+#define		bRxPathA                 			0x1
+#define		bRxPathB                 			0x2
+#define		bRxPathC                 			0x4
+#define		bRxPathD                 			0x8
+#define		bTxPathA                 			0x1
+#define		bTxPathB                 			0x2
+#define		bTxPathC                 			0x4
+#define		bTxPathD                 			0x8
+#define		bTRSSIFreq               			0x200
+#define		bADCBackoff              			0x3000
+#define		bDFIRBackoff             			0xc000
+#define		bTRSSILatchPhase         		0x10000
+#define		bRxIDCOffset             			0xff
+#define		bRxQDCOffset             			0xff00
+#define		bRxDFIRMode              		0x1800000
+#define		bRxDCNFType              		0xe000000
+#define		bRXIQImb_A               			0x3ff
+#define		bRXIQImb_B               			0xfc00
+#define		bRXIQImb_C               			0x3f0000
+#define		bRXIQImb_D               			0xffc00000
+#define		bDC_dc_Notch             		0x60000
+#define		bRxNBINotch              			0x1f000000
+#define		bPD_TH                   			0xf
+#define		bPD_TH_Opt2              		0xc000
+#define		bPWED_TH                 			0x700
+#define		bIfMF_Win_L              			0x800
+#define		bPD_Option               			0x1000
+#define		bMF_Win_L                			0xe000
+#define		bBW_Search_L             		0x30000
+#define		bwin_enh_L               			0xc0000
+#define		bBW_TH                   			0x700000
+#define		bED_TH2                  			0x3800000
+#define		bBW_option               			0x4000000
+#define		bRatio_TH                			0x18000000
+#define		bWindow_L                			0xe0000000
+#define		bSBD_Option              			0x1
+#define		bFrame_TH                			0x1c
+#define		bFS_Option               			0x60
+#define		bDC_Slope_check          		0x80
+#define		bFGuard_Counter_DC_L     		0xe00
+#define		bFrame_Weight_Short      		0x7000
+#define		bSub_Tune                			0xe00000
+#define		bFrame_DC_Length         		0xe000000
+#define		bSBD_start_offset        		0x30000000
+#define		bFrame_TH_2              		0x7
+#define		bFrame_GI2_TH            		0x38
+#define		bGI2_Sync_en             		0x40
+#define		bSarch_Short_Early       		0x300
+#define		bSarch_Short_Late        		0xc00
+#define		bSarch_GI2_Late          		0x70000
+#define		bCFOAntSum               		0x1
+#define		bCFOAcc                  			0x2
+#define		bCFOStartOffset          		0xc
+#define		bCFOLookBack             		0x70
+#define		bCFOSumWeight            		0x80
+#define		bDAGCEnable              			0x10000
+#define		bTXIQImb_A               			0x3ff
+#define		bTXIQImb_B               			0xfc00
+#define		bTXIQImb_C               			0x3f0000
+#define		bTXIQImb_D               			0xffc00000
+#define		bTxIDCOffset             			0xff
+#define		bTxQDCOffset             			0xff00
+#define		bTxDFIRMode              		0x10000
+#define		bTxPesudoNoiseOn         		0x4000000
+#define		bTxPesudoNoise_A         		0xff
+#define		bTxPesudoNoise_B         		0xff00
+#define		bTxPesudoNoise_C         		0xff0000
+#define		bTxPesudoNoise_D         		0xff000000
+#define		bCCADropOption           		0x20000
+#define		bCCADropThres            		0xfff00000
+#define		bEDCCA_H                 			0xf
+#define		bEDCCA_L                 			0xf0
+#define		bLambda_ED               0x300
+#define		bRxInitialGain           0x7f
+#define		bRxAntDivEn              0x80
+#define		bRxAGCAddressForLNA      0x7f00
+#define		bRxHighPowerFlow         0x8000
+#define		bRxAGCFreezeThres        0xc0000
+#define		bRxFreezeStep_AGC1       0x300000
+#define		bRxFreezeStep_AGC2       0xc00000
+#define		bRxFreezeStep_AGC3       0x3000000
+#define		bRxFreezeStep_AGC0       0xc000000
+#define		bRxRssi_Cmp_En           0x10000000
+#define		bRxQuickAGCEn            0x20000000
+#define		bRxAGCFreezeThresMode    0x40000000
+#define		bRxOverFlowCheckType     0x80000000
+#define		bRxAGCShift              0x7f
+#define		bTRSW_Tri_Only           0x80
+#define		bPowerThres              0x300
+#define		bRxAGCEn                 0x1
+#define		bRxAGCTogetherEn         0x2
+#define		bRxAGCMin                0x4
+#define		bRxHP_Ini                0x7
+#define		bRxHP_TRLNA              0x70
+#define		bRxHP_RSSI               0x700
+#define		bRxHP_BBP1               0x7000
+#define		bRxHP_BBP2               0x70000
+#define		bRxHP_BBP3               0x700000
+#define		bRSSI_H                  0x7f0000     //the threshold for high power
+#define		bRSSI_Gen                0x7f000000   //the threshold for ant diversity
+#define		bRxSettle_TRSW           0x7
+#define		bRxSettle_LNA            0x38
+#define		bRxSettle_RSSI           0x1c0
+#define		bRxSettle_BBP            0xe00
+#define		bRxSettle_RxHP           0x7000
+#define		bRxSettle_AntSW_RSSI     0x38000
+#define		bRxSettle_AntSW          0xc0000
+#define		bRxProcessTime_DAGC      0x300000
+#define		bRxSettle_HSSI           0x400000
+#define		bRxProcessTime_BBPPW     0x800000
+#define		bRxAntennaPowerShift     0x3000000
+#define		bRSSITableSelect         0xc000000
+#define		bRxHP_Final              0x7000000
+#define		bRxHTSettle_BBP          0x7
+#define		bRxHTSettle_HSSI         0x8
+#define		bRxHTSettle_RxHP         0x70
+#define		bRxHTSettle_BBPPW        0x80
+#define		bRxHTSettle_Idle         0x300
+#define		bRxHTSettle_Reserved     0x1c00
+#define		bRxHTRxHPEn              0x8000
+#define		bRxHTAGCFreezeThres      0x30000
+#define		bRxHTAGCTogetherEn       0x40000
+#define		bRxHTAGCMin              0x80000
+#define		bRxHTAGCEn               0x100000
+#define		bRxHTDAGCEn              0x200000
+#define		bRxHTRxHP_BBP            0x1c00000
+#define		bRxHTRxHP_Final          0xe0000000
+#define		bRxPWRatioTH             0x3
+#define		bRxPWRatioEn             0x4
+#define		bRxMFHold                0x3800
+#define		bRxPD_Delay_TH1          0x38
+#define		bRxPD_Delay_TH2          0x1c0
+#define		bRxPD_DC_COUNT_MAX       0x600
+//#define bRxMF_Hold               0x3800
+#define		bRxPD_Delay_TH           0x8000
+#define		bRxProcess_Delay         0xf0000
+#define		bRxSearchrange_GI2_Early 0x700000
+#define		bRxFrame_Guard_Counter_L 0x3800000
+#define		bRxSGI_Guard_L           0xc000000
+#define		bRxSGI_Search_L          0x30000000
+#define		bRxSGI_TH                0xc0000000
+#define		bDFSCnt0                 0xff
+#define		bDFSCnt1                 0xff00
+#define		bDFSFlag                 0xf0000       		
+#define		bMFWeightSum             0x300000
+#define		bMinIdxTH                0x7f000000       		
+#define		bDAFormat                0x40000       		
+#define		bTxChEmuEnable           0x01000000       		
+#define		bTRSWIsolation_A         0x7f
+#define		bTRSWIsolation_B         0x7f00
+#define		bTRSWIsolation_C         0x7f0000
+#define		bTRSWIsolation_D         0x7f000000       		
+#define		bExtLNAGain              0x7c00          
+
+// 6. PageE(0xE00)
+#define		bSTBCEn                  0x4	// Useless
+#define		bAntennaMapping          0x10
+#define		bNss                     0x20
+#define		bCFOAntSumD              0x200
+#define		bPHYCounterReset         0x8000000
+#define		bCFOReportGet            0x4000000
+#define		bOFDMContinueTx          0x10000000
+#define		bOFDMSingleCarrier       0x20000000
+#define		bOFDMSingleTone          0x40000000
+//#define bRxPath1                 0x01
+//#define bRxPath2                 0x02
+//#define bRxPath3                 0x04
+//#define bRxPath4                 0x08
+//#define bTxPath1                 0x10
+//#define bTxPath2                 0x20
+#define		bHTDetect                0x100
+#define		bCFOEn                   0x10000
+#define		bCFOValue                0xfff00000
+#define		bSigTone_Re              0x3f
+#define		bSigTone_Im              0x7f00
+#define		bCounter_CCA             0xffff
+#define		bCounter_ParityFail      0xffff0000
+#define		bCounter_RateIllegal     0xffff
+#define		bCounter_CRC8Fail        0xffff0000
+#define		bCounter_MCSNoSupport    0xffff
+#define		bCounter_FastSync        0xffff
+#define		bShortCFO                0xfff
+#define		bShortCFOTLength         12   //total
+#define		bShortCFOFLength         11   //fraction
+#define		bLongCFO                 0x7ff
+#define		bLongCFOTLength          11
+#define		bLongCFOFLength          11
+#define		bTailCFO                 0x1fff
+#define		bTailCFOTLength          13
+#define		bTailCFOFLength          12       		
+#define		bmax_en_pwdB             0xffff
+#define		bCC_power_dB             0xffff0000
+#define		bnoise_pwdB              0xffff
+#define		bPowerMeasTLength        10
+#define		bPowerMeasFLength        3
+#define		bRx_HT_BW                0x1
+#define		bRxSC                    0x6
+#define		bRx_HT                   0x8       		
+#define		bNB_intf_det_on          0x1
+#define		bIntf_win_len_cfg        0x30
+#define		bNB_Intf_TH_cfg          0x1c0       		
+#define		bRFGain                  0x3f
+#define		bTableSel                0x40
+#define		bTRSW                    0x80       		
+#define		bRxSNR_A                 0xff
+#define		bRxSNR_B                 0xff00
+#define		bRxSNR_C                 0xff0000
+#define		bRxSNR_D                 0xff000000
+#define		bSNREVMTLength           8
+#define		bSNREVMFLength           1       		
+#define		bCSI1st                  0xff
+#define		bCSI2nd                  0xff00
+#define		bRxEVM1st                0xff0000
+#define		bRxEVM2nd                0xff000000       		
+#define		bSIGEVM                  0xff
+#define		bPWDB                    0xff00
+#define		bSGIEN                   0x10000
+       		
+#define		bSFactorQAM1             0xf	// Useless
+#define		bSFactorQAM2             0xf0
+#define		bSFactorQAM3             0xf00
+#define		bSFactorQAM4             0xf000
+#define		bSFactorQAM5             0xf0000
+#define		bSFactorQAM6             0xf0000
+#define		bSFactorQAM7             0xf00000
+#define		bSFactorQAM8             0xf000000
+#define		bSFactorQAM9             0xf0000000
+#define		bCSIScheme               0x100000
+       		
+#define		bNoiseLvlTopSet          0x3	// Useless
+#define		bChSmooth                0x4
+#define		bChSmoothCfg1            0x38
+#define		bChSmoothCfg2            0x1c0
+#define		bChSmoothCfg3            0xe00
+#define		bChSmoothCfg4            0x7000
+#define		bMRCMode                 0x800000
+#define		bTHEVMCfg                0x7000000
+       		
+#define		bLoopFitType             0x1	// Useless
+#define		bUpdCFO                  0x40
+#define		bUpdCFOOffData           0x80
+#define		bAdvUpdCFO               0x100
+#define		bAdvTimeCtrl             0x800
+#define		bUpdClko                 0x1000
+#define		bFC                      0x6000
+#define		bTrackingMode            0x8000
+#define		bPhCmpEnable             0x10000
+#define		bUpdClkoLTF              0x20000
+#define		bComChCFO                0x40000
+#define		bCSIEstiMode             0x80000
+#define		bAdvUpdEqz               0x100000
+#define		bUChCfg                  0x7000000
+#define		bUpdEqz                  0x8000000
+
+#define		bTxAGCRate18_06			0x7f7f7f7f	// Useless
+#define		bTxAGCRate54_24			0x7f7f7f7f
+#define		bTxAGCRateMCS32			0x7f
+#define		bTxAGCRateCCK			0x7f00
+#define		bTxAGCRateMCS3_MCS0		0x7f7f7f7f
+#define		bTxAGCRateMCS7_MCS4		0x7f7f7f7f
+#define		bTxAGCRateMCS11_MCS8	0x7f7f7f7f
+#define		bTxAGCRateMCS15_MCS12	0x7f7f7f7f
+
+//Rx Pseduo noise
+#define		bRxPesudoNoiseOn         0x20000000	// Useless
+#define		bRxPesudoNoise_A         0xff
+#define		bRxPesudoNoise_B         0xff00
+#define		bRxPesudoNoise_C         0xff0000
+#define		bRxPesudoNoise_D         0xff000000
+#define		bPesudoNoiseState_A      0xffff
+#define		bPesudoNoiseState_B      0xffff0000
+#define		bPesudoNoiseState_C      0xffff
+#define		bPesudoNoiseState_D      0xffff0000
+
+//7. RF Register
+//Zebra1
+#define		bZebra1_HSSIEnable        0x8		// Useless
+#define		bZebra1_TRxControl        0xc00
+#define		bZebra1_TRxGainSetting    0x07f
+#define		bZebra1_RxCorner          0xc00
+#define		bZebra1_TxChargePump      0x38
+#define		bZebra1_RxChargePump      0x7
+#define		bZebra1_ChannelNum        0xf80
+#define		bZebra1_TxLPFBW           0x400
+#define		bZebra1_RxLPFBW           0x600
+
+//Zebra4
+#define		bRTL8256RegModeCtrl1      0x100	// Useless
+#define		bRTL8256RegModeCtrl0      0x40
+#define		bRTL8256_TxLPFBW          0x18
+#define		bRTL8256_RxLPFBW          0x600
+
+//RTL8258
+#define		bRTL8258_TxLPFBW          0xc	// Useless
+#define		bRTL8258_RxLPFBW          0xc00
+#define		bRTL8258_RSSILPFBW        0xc0
+
+
+//
+// Other Definition
+//
+
+//byte endable for sb_write
+#define		bByte0                    0x1	// Useless
+#define		bByte1                    0x2
+#define		bByte2                    0x4
+#define		bByte3                    0x8
+#define		bWord0                    0x3
+#define		bWord1                    0xc
+#define		bDWord                    0xf
+
+//for PutRegsetting & GetRegSetting BitMask
+#define		bMaskByte0		0xff	// Reg 0xc50 rOFDM0_XAAGCCore~0xC6f
+#define		bMaskByte1		0xff00
+#define		bMaskByte2		0xff0000
+#define		bMaskByte3		0xff000000
+#define		bMaskHWord		0xffff0000
+#define		bMaskLWord		0x0000ffff
+#define		bMaskDWord		0xffffffff
+#define		bMaskH4Bits		0xf0000000	
+#define 	bMaskOFDM_D		0xffc00000
+#define		bMaskCCK		0x3f3f3f3f
+#define		bMask12Bits		0xfff
+
+//for PutRFRegsetting & GetRFRegSetting BitMask
+#if (RTL92SE_FPGA_VERIFY == 1)
+//#define		bMask12Bits               0xfff	// RF Reg mask bits
+//#define		bMask20Bits               0xfff	// RF Reg mask bits T65 RF
+#define 		bRFRegOffsetMask	0xfff		
+#else
+//#define		bMask12Bits               0xfffff	// RF Reg mask bits
+//#define		bMask20Bits               0xfffff	// RF Reg mask bits T65 RF
+#define 		bRFRegOffsetMask	0xfffff		
+#endif       		
+#define		bEnable                   0x1	// Useless
+#define		bDisable                  0x0
+       		
+#define		LeftAntenna               0x0	// Useless
+#define		RightAntenna              0x1
+       		
+#define		tCheckTxStatus            500   //500ms // Useless
+#define		tUpdateRxCounter          100   //100ms
+       		
+#define		rateCCK     0	// Useless
+#define		rateOFDM    1
+#define		rateHT      2
+
+//define Register-End
+#define		bPMAC_End                 0x1ff	// Useless
+#define		bFPGAPHY0_End             0x8ff
+#define		bFPGAPHY1_End             0x9ff
+#define		bCCKPHY0_End              0xaff
+#define		bOFDMPHY0_End             0xcff
+#define		bOFDMPHY1_End             0xdff
+
+//define max debug item in each debug page
+//#define bMaxItem_FPGA_PHY0        0x9
+//#define bMaxItem_FPGA_PHY1        0x3
+//#define bMaxItem_PHY_11B          0x16
+//#define bMaxItem_OFDM_PHY0        0x29
+//#define bMaxItem_OFDM_PHY1        0x0
+
+#define		bPMACControl	0x0		// Useless
+#define		bWMACControl	0x1
+#define		bWNICControl	0x2
+
+#if 0
+#define		ANTENNA_A	0x1	// Useless
+#define		ANTENNA_B	0x2
+#define		ANTENNA_AB	0x3	// ANTENNA_A|ANTENNA_B
+
+#define		ANTENNA_C	0x4
+#define		ANTENNA_D	0x8
+#endif
+
+#define RCR_AAP			BIT(0)				// accept all physical address
+#define RCR_APM			BIT(1)				// accept physical match
+#define RCR_AM			BIT(2)				// accept multicast
+#define RCR_AB			BIT(3)				// accept broadcast
+#define RCR_ACRC32		BIT(5)				// accept error packet
+#define RCR_9356SEL		BIT(6)
+#define RCR_AICV		BIT(12)				// Accept ICV error packet
+#define RCR_RXFTH0		(BIT(13)|BIT(14)|BIT(15))	// Rx FIFO threshold
+#define RCR_ADF			BIT(18)				// Accept Data(frame type) frame
+#define RCR_ACF			BIT(19)				// Accept control frame
+#define RCR_AMF			BIT(20)				// Accept management frame
+#define RCR_ADD3		BIT(21)
+#define RCR_APWRMGT		BIT(22)				// Accept power management packet
+#define RCR_CBSSID		BIT(23)				// Accept BSSID match packet
+#define RCR_ENMARP		BIT(28)				// enable mac auto reset phy
+#define RCR_EnCS1		BIT(29)				// enable carrier sense method 1
+#define RCR_EnCS2		BIT(30)				// enable carrier sense method 2
+#define RCR_OnlyErlPkt		BIT(31)				// Rx Early mode is performed for packet size greater than 1536
+
+/*--------------------------Define Parameters-------------------------------*/
+
+
+#endif	//__INC_HAL8192SPHYREG_H
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_p2p.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_p2p.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_p2p.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_p2p.h	2017-09-23 03:42:50.058674942 +0800
@@ -0,0 +1,60 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __RTW_P2P_H_
+#define __RTW_P2P_H_
+
+#include <drv_types.h>
+
+u32 build_beacon_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
+u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
+u32 build_prov_disc_request_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8* pssid, u8 ussidlen, u8* pdev_raddr );
+u32 build_assoc_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 status_code);
+u32 build_deauth_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
+#ifdef CONFIG_WFD
+u32 build_probe_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
+u32 build_probe_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
+u32 build_beacon_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
+u32 build_nego_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
+u32 build_nego_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
+u32 build_nego_confirm_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
+u32 build_assoc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
+u32 build_assoc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
+u32 build_provdisc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
+u32 build_provdisc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
+#endif //CONFIG_WFD
+
+u32 process_probe_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len);
+u32 process_assoc_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *p2p_ie, uint p2p_ielen, struct sta_info *psta);
+u32 process_p2p_devdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len);
+u32 process_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe, uint len);
+u8 process_p2p_provdisc_req(struct wifidirect_info *pwdinfo,  u8 *pframe, uint len);
+u8 process_p2p_provdisc_resp(struct wifidirect_info *pwdinfo,  u8 *pframe);
+u8 process_p2p_group_negotation_req( struct wifidirect_info *pwdinfo, u8 *pframe, uint len );
+u8 process_p2p_group_negotation_resp( struct wifidirect_info *pwdinfo, u8 *pframe, uint len );
+u8 process_p2p_group_negotation_confirm( struct wifidirect_info *pwdinfo, u8 *pframe, uint len );
+u8 process_p2p_presence_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len);
+
+void process_p2p_ps_ie(PADAPTER padapter, u8 *IEs, u32 IELength);
+void p2p_ps_wk_hdl(_adapter *padapter, u8 p2p_ps_state);
+void p2p_protocol_wk_hdl(_adapter *padapter, int intCmdType);
+u8 p2p_ps_wk_cmd(_adapter*padapter, u8 p2p_ps_state, u8 enqueue);
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_pwrctrl.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_pwrctrl.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_pwrctrl.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_pwrctrl.h	2017-09-23 03:42:50.058674942 +0800
@@ -0,0 +1,332 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef __RTW_PWRCTRL_H_
+#define __RTW_PWRCTRL_H_
+
+#include <drv_conf.h>
+#include <osdep_service.h>		
+#include <drv_types.h>
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+#include <linux/earlysuspend.h>
+#endif //CONFIG_HAS_EARLYSUSPEND
+
+
+#define FW_PWR0	0	
+#define FW_PWR1 	1
+#define FW_PWR2 	2
+#define FW_PWR3 	3
+
+
+#define HW_PWR0	7	
+#define HW_PWR1 	6
+#define HW_PWR2 	2
+#define HW_PWR3	0
+#define HW_PWR4	8
+
+#define FW_PWRMSK	0x7
+
+
+#define XMIT_ALIVE	BIT(0)
+#define RECV_ALIVE	BIT(1)
+#define CMD_ALIVE	BIT(2)
+#define EVT_ALIVE	BIT(3)
+
+
+enum Power_Mgnt
+{
+	PS_MODE_ACTIVE	= 0	,
+	PS_MODE_MIN			,
+	PS_MODE_MAX			,
+	PS_MODE_DTIM			,
+	PS_MODE_VOIP			,
+	PS_MODE_UAPSD_WMM	,
+	PS_MODE_UAPSD			,
+	PS_MODE_IBSS			,
+	PS_MODE_WWLAN		,
+	PM_Radio_Off			,
+	PM_Card_Disable		,
+	PS_MODE_NUM
+};
+
+
+/*
+	BIT[2:0] = HW state
+	BIT[3] = Protocol PS state,   0: register active state , 1: register sleep state
+	BIT[4] = sub-state
+*/
+
+#define 	PS_DPS				BIT(0)
+#define 	PS_LCLK				(PS_DPS)
+#define	PS_RF_OFF			BIT(1)
+#define	PS_ALL_ON			BIT(2)
+#define	PS_ST_ACTIVE		BIT(3)
+#define	PS_LP				BIT(4)	// low performance
+
+#define	PS_STATE_MASK		(0x0F)
+#define	PS_STATE_HW_MASK	(0x07)
+#define 	PS_SEQ_MASK		(0xc0)
+
+#define	PS_STATE(x)			(PS_STATE_MASK & (x))
+#define	PS_STATE_HW(x)	(PS_STATE_HW_MASK & (x))
+#define	PS_SEQ(x)			(PS_SEQ_MASK & (x))
+
+#define	PS_STATE_S0		(PS_DPS)
+#define 	PS_STATE_S1		(PS_LCLK)
+#define	PS_STATE_S2		(PS_RF_OFF)
+#define 	PS_STATE_S3		(PS_ALL_ON)
+#define	PS_STATE_S4		((PS_ST_ACTIVE) | (PS_ALL_ON))
+
+
+#define 	PS_IS_RF_ON(x)		((x) & (PS_ALL_ON))
+#define 	PS_IS_ACTIVE(x)		((x) & (PS_ST_ACTIVE))
+#define 	CLR_PS_STATE(x)	((x) = ((x) & (0xF0)))
+
+
+struct reportpwrstate_parm {
+	unsigned char mode;
+	unsigned char state; //the CPWM value
+	unsigned short rsvd;
+}; 
+
+
+typedef _sema _pwrlock;
+
+
+__inline static void _init_pwrlock(_pwrlock *plock)
+{
+	_rtw_init_sema(plock, 1);
+}
+
+__inline static void _free_pwrlock(_pwrlock *plock)
+{
+	_rtw_free_sema(plock);
+}
+
+
+__inline static void _enter_pwrlock(_pwrlock *plock)
+{
+	_rtw_down_sema(plock);
+}
+
+
+__inline static void _exit_pwrlock(_pwrlock *plock)
+{
+	_rtw_up_sema(plock);
+}
+
+#define LPS_DELAY_TIME	1*HZ // 1 sec
+
+#define EXE_PWR_NONE	0x01
+#define EXE_PWR_IPS		0x02
+#define EXE_PWR_LPS		0x04
+
+// RF state.
+typedef enum _rt_rf_power_state
+{
+	rf_on,		// RF is on after RFSleep or RFOff
+	rf_sleep,	// 802.11 Power Save mode
+	rf_off,		// HW/SW Radio OFF or Inactive Power Save
+	//=====Add the new RF state above this line=====//
+	rf_max
+}rt_rf_power_state;
+
+// RF Off Level for IPS or HW/SW radio off
+#define	RT_RF_OFF_LEVL_ASPM			BIT(0)	// PCI ASPM
+#define	RT_RF_OFF_LEVL_CLK_REQ		BIT(1)	// PCI clock request
+#define	RT_RF_OFF_LEVL_PCI_D3			BIT(2)	// PCI D3 mode
+#define	RT_RF_OFF_LEVL_HALT_NIC		BIT(3)	// NIC halt, re-initialize hw parameters
+#define	RT_RF_OFF_LEVL_FREE_FW		BIT(4)	// FW free, re-download the FW
+#define	RT_RF_OFF_LEVL_FW_32K		BIT(5)	// FW in 32k
+#define	RT_RF_PS_LEVEL_ALWAYS_ASPM	BIT(6)	// Always enable ASPM and Clock Req in initialization.
+#define	RT_RF_LPS_DISALBE_2R			BIT(30)	// When LPS is on, disable 2R if no packet is received or transmittd.
+#define	RT_RF_LPS_LEVEL_ASPM			BIT(31)	// LPS with ASPM
+
+#define	RT_IN_PS_LEVEL(ppsc, _PS_FLAG)		((ppsc->cur_ps_level & _PS_FLAG) ? _TRUE : _FALSE)
+#define	RT_CLEAR_PS_LEVEL(ppsc, _PS_FLAG)	(ppsc->cur_ps_level &= (~(_PS_FLAG)))
+#define	RT_SET_PS_LEVEL(ppsc, _PS_FLAG)		(ppsc->cur_ps_level |= _PS_FLAG)
+
+
+enum _PS_BBRegBackup_ {
+	PSBBREG_RF0 = 0,
+	PSBBREG_RF1,
+	PSBBREG_RF2,
+	PSBBREG_AFE0,
+	PSBBREG_TOTALCNT
+};
+
+enum { // for ips_mode
+	IPS_NORMAL = 0,
+	IPS_LEVEL_2,
+	IPS_NONE,
+};
+
+struct	pwrctrl_priv {
+	_pwrlock	lock;
+	volatile u8 rpwm; // requested power state for fw
+	volatile u8 cpwm; // fw current power state. updated when 1. read from HCPWM 2. driver lowers power level
+	volatile u8 tog; // toggling
+	volatile u8 cpwm_tog; // toggling
+	u8	pwr_mode;
+	u8	smart_ps;
+	uint	alives;
+
+	u8	b_hw_radio_off;
+	u8	reg_rfoff;
+	u8	reg_pdnmode; //powerdown mode
+	u32	rfoff_reason;
+
+	//RF OFF Level
+	u32	cur_ps_level;
+	u32	reg_rfps_level;
+
+	
+
+#ifdef CONFIG_PCI_HCI
+	//just for PCIE ASPM
+	u8	b_support_aspm; // If it supports ASPM, Offset[560h] = 0x40, otherwise Offset[560h] = 0x00. 
+	u8	b_support_backdoor;
+
+	//just for PCIE ASPM
+	u8	const_amdpci_aspm;
+#endif
+
+	//u8	ips_enable;//for dbg
+	//u8	lps_enable;//for dbg
+
+	uint 	ips_enter_cnts;
+	uint 	ips_leave_cnts;
+	
+	_timer 	ips_check_timer;
+
+	u8	ips_mode; 
+	u8	ips_mode_req; // used to accept the mode setting request, will update to ipsmode later
+
+	u8	bLeisurePs;
+	u8	LpsIdleCount;
+	u8	power_mgnt;
+	u8	bFwCurrentInPSMode;
+	u32	DelayLPSLastTimeStamp;
+
+	s32		pnp_current_pwr_state;
+	u8		pnp_bstop_trx;
+
+
+	u8		bInternalAutoSuspend;
+	u8		bInSuspend;
+	u8		bSupportRemoteWakeup;	
+	_timer 	pwr_state_check_timer;
+	int		pwr_state_check_interval;
+	u8		pwr_state_check_cnts;
+	uint 		bips_processing;
+
+	int 		ps_flag;
+	
+	rt_rf_power_state	rf_pwrstate;//cur power state
+	//rt_rf_power_state 	current_rfpwrstate;
+	rt_rf_power_state	change_rfpwrstate;
+
+	u8		wepkeymask;
+	u8		bHWPowerdown;//if support hw power down
+	u8		bHWPwrPindetect;
+	u8		bkeepfwalive;		
+	u8		brfoffbyhw;
+	unsigned long PS_BBRegBackup[PSBBREG_TOTALCNT];
+	
+	#ifdef CONFIG_RESUME_IN_WORKQUEUE
+	struct workqueue_struct *rtw_workqueue;
+	_workitem resume_work;
+	#endif
+
+	#ifdef CONFIG_HAS_EARLYSUSPEND
+	struct early_suspend early_suspend;
+	u8 do_late_resume;
+	#endif //CONFIG_HAS_EARLYSUSPEND
+
+	#ifdef CONFIG_ANDROID_POWER
+	android_early_suspend_t early_suspend;
+	u8 do_late_resume;
+	#endif
+	
+};
+
+#define rtw_get_ips_mode_req(pwrctrlpriv) \
+	(pwrctrlpriv)->ips_mode_req
+
+#define rtw_ips_mode_req(pwrctrlpriv, ips_mode) \
+	(pwrctrlpriv)->ips_mode_req = (ips_mode)
+
+#define _rtw_set_pwr_state_check_timer(pwrctrlpriv, ms) \
+	do { \
+		/*DBG_871X("%s _rtw_set_pwr_state_check_timer(%p, %d)\n", __FUNCTION__, (pwrctrlpriv), (ms));*/ \
+		_set_timer(&(pwrctrlpriv)->pwr_state_check_timer, (ms)); \
+	} while(0)
+	
+#define rtw_set_pwr_state_check_timer(pwrctrlpriv) \
+	_rtw_set_pwr_state_check_timer((pwrctrlpriv), (pwrctrlpriv)->pwr_state_check_interval)
+
+extern void rtw_init_pwrctrl_priv(_adapter *adapter);
+extern void rtw_free_pwrctrl_priv(_adapter * adapter);
+extern sint rtw_register_tx_alive(_adapter *padapter);
+extern void rtw_unregister_tx_alive(_adapter *padapter);
+extern sint rtw_register_rx_alive(_adapter *padapter);
+extern void rtw_unregister_rx_alive(_adapter *padapter);
+extern sint rtw_register_cmd_alive(_adapter *padapter);
+extern void rtw_unregister_cmd_alive(_adapter *padapter);
+extern sint rtw_register_evt_alive(_adapter *padapter);
+extern void rtw_unregister_evt_alive(_adapter *padapter);
+extern void cpwm_int_hdl(_adapter *padapter, struct reportpwrstate_parm *preportpwrstate);
+extern void rtw_set_ps_mode(_adapter * padapter, u8 ps_mode, u8 smart_ps);
+extern void rtw_set_rpwm(_adapter * padapter, u8 val8);
+extern void LeaveAllPowerSaveMode(PADAPTER Adapter);
+#ifdef CONFIG_IPS
+void ips_enter(_adapter * padapter);
+int ips_leave(_adapter * padapter);
+#endif
+
+void rtw_ps_processor(_adapter*padapter);
+
+#ifdef CONFIG_AUTOSUSPEND
+int autoresume_enter(_adapter* padapter);
+#endif
+#ifdef SUPPORT_HW_RFOFF_DETECTED
+rt_rf_power_state RfOnOffDetect(IN	PADAPTER pAdapter );
+#endif
+
+
+#ifdef CONFIG_LPS
+void LPS_Enter(PADAPTER padapter);
+void LPS_Leave(PADAPTER padapter);
+#endif
+
+#ifdef CONFIG_RESUME_IN_WORKQUEUE
+void rtw_resume_in_workqueue(struct pwrctrl_priv *pwrpriv);
+#endif //CONFIG_RESUME_IN_WORKQUEUE
+
+#if defined(CONFIG_HAS_EARLYSUSPEND ) || defined(CONFIG_ANDROID_POWER)
+#define rtw_is_earlysuspend_registered(pwrpriv) (pwrpriv)->early_suspend.suspend
+void rtw_register_early_suspend(struct pwrctrl_priv *pwrpriv);
+void rtw_unregister_early_suspend(struct pwrctrl_priv *pwrpriv);
+#endif //CONFIG_HAS_EARLYSUSPEND || CONFIG_ANDROID_POWER
+
+u8 rtw_interface_ps_func(_adapter *padapter,HAL_INTF_PS_FUNC efunc_id,u8* val);
+
+#endif  //__RTL871X_PWRCTRL_H_
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_qos.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_qos.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_qos.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_qos.h	2017-09-23 03:42:50.058674942 +0800
@@ -0,0 +1,41 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+
+
+#ifndef _RTW_QOS_H_
+#define _RTW_QOS_H_
+#include <drv_conf.h>
+#include <osdep_service.h>
+
+
+
+
+
+
+struct	qos_priv	{
+	
+	unsigned int	  qos_option;	//bit mask option: u-apsd, s-apsd, ts, block ack...		
+
+};
+
+
+#endif	//_RTL871X_QOS_H_
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_recv.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_recv.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_recv.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_recv.h	2017-09-23 03:42:50.058674942 +0800
@@ -0,0 +1,709 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef _RTW_RECV_H_
+#define _RTW_RECV_H_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+
+#define NR_RECVFRAME 256
+
+#define RXFRAME_ALIGN	8
+#define RXFRAME_ALIGN_SZ	(1<<RXFRAME_ALIGN)
+
+#define MAX_RXFRAME_CNT	512
+#define MAX_RX_NUMBLKS		(32)
+#define RECVFRAME_HDR_ALIGN 128
+
+#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr)
+
+static u8 SNAP_ETH_TYPE_IPX[2] = {0x81, 0x37};
+
+static u8 SNAP_ETH_TYPE_APPLETALK_AARP[2] = {0x80, 0xf3};
+static u8 SNAP_ETH_TYPE_APPLETALK_DDP[2] = {0x80, 0x9b};
+static u8 SNAP_ETH_TYPE_TDLS[2] = {0x89, 0x0d};
+static u8 SNAP_HDR_APPLETALK_DDP[3] = {0x08, 0x00, 0x07}; // Datagram Delivery Protocol
+
+static u8 oui_8021h[] = {0x00, 0x00, 0xf8};
+static u8 oui_rfc1042[]= {0x00,0x00,0x00};
+
+#define MAX_SUBFRAME_COUNT	64
+static u8 rfc1042_header[] =
+{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 };
+/* Bridge-Tunnel header (for EtherTypes ETH_P_AARP and ETH_P_IPX) */
+static u8 bridge_tunnel_header[] =
+{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8 };
+
+//for Rx reordering buffer control
+struct recv_reorder_ctrl
+{
+	_adapter	*padapter;
+	u8 enable;
+	u16 indicate_seq;//=wstart_b, init_value=0xffff
+	u16 wend_b;
+       u8 wsize_b;	
+	_queue pending_recvframe_queue;
+	_timer reordering_ctrl_timer;
+};
+
+struct	stainfo_rxcache	{
+	u16 	tid_rxseq[16];
+/*	
+	unsigned short 	tid0_rxseq;
+	unsigned short 	tid1_rxseq;
+	unsigned short 	tid2_rxseq;
+	unsigned short 	tid3_rxseq;
+	unsigned short 	tid4_rxseq;
+	unsigned short 	tid5_rxseq;
+	unsigned short 	tid6_rxseq;
+	unsigned short 	tid7_rxseq;
+	unsigned short 	tid8_rxseq;
+	unsigned short 	tid9_rxseq;
+	unsigned short 	tid10_rxseq;
+	unsigned short 	tid11_rxseq;
+	unsigned short 	tid12_rxseq;
+	unsigned short 	tid13_rxseq;
+	unsigned short 	tid14_rxseq;
+	unsigned short 	tid15_rxseq;
+*/
+};
+
+
+struct smooth_rssi_data {
+	u32	elements[100];	//array to store values
+	u32	index;			//index to current array to store
+	u32	total_num;		//num of valid elements
+	u32	total_val;		//sum of valid elements
+};
+
+struct signal_stat {
+	u8	update_req;		//used to indicate 
+	u8	avg_val;		//avg of valid elements
+	u32	total_num;		//num of valid elements
+	u32	total_val;		//sum of valid elements	
+};
+
+struct rx_pkt_attrib	{
+	u16	pkt_len;
+	u8	physt;
+	u8	drvinfo_sz;
+	u8	shift_sz;
+	u8 	amsdu;
+	u8	order;
+	u8	qos;
+	u8 	to_fr_ds;
+	u16	seq_num;
+	u8	frag_num;
+	u8	pw_save;
+	u8	mfrag;
+	u8	mdata;	
+	u8	privacy; //in frame_ctrl field
+	u8	bdecrypted;
+	int	hdrlen;		//the WLAN Header Len
+	int	iv_len;
+	int	icv_len;
+	u8	encrypt;		//when 0 indicate no encrypt. when non-zero, indicate the encrypt algorith
+	u8	priority;
+	u8	ack_policy;
+ 	u8	crc_err;
+	u8	icv_err;
+
+	u8 	dst[ETH_ALEN];
+	u8 	src[ETH_ALEN];
+	u8 	ta[ETH_ALEN];
+	u8 	ra[ETH_ALEN];
+	u8 	bssid[ETH_ALEN];
+#ifdef CONFIG_TCP_CSUM_OFFLOAD_RX
+	u8	tcpchk_valid; // 0: invalid, 1: valid
+	u8	ip_chkrpt; //0: incorrect, 1: correct
+	u8	tcp_chkrpt; //0: incorrect, 1: correct
+#endif
+
+	u8 	key_index;
+
+	u8	mcs_rate;
+	u8	rxht;
+	u8	signal_qual;
+	s8	rx_mimo_signal_qual[2];	
+	u8	signal_strength;
+
+	u32	RxPWDBAll;
+	s32	RecvSignalPower;
+};
+
+
+//These definition is used for Rx packet reordering.
+#define SN_LESS(a, b)		(((a-b)&0x800)!=0)
+#define SN_EQUAL(a, b)	(a == b)
+//#define REORDER_WIN_SIZE	128
+//#define REORDER_ENTRY_NUM	128
+#define REORDER_WAIT_TIME	(30) // (ms)
+
+#ifdef CONFIG_MINIMAL_MEMORY_USAGE
+#define RECVBUFF_ALIGN_SZ 512
+#else
+#define RECVBUFF_ALIGN_SZ 8
+#endif
+
+#define RXDESC_SIZE	24
+#define RXDESC_OFFSET RXDESC_SIZE
+
+struct recv_stat
+{
+	unsigned int rxdw0;
+
+	unsigned int rxdw1;
+
+	unsigned int rxdw2;
+
+	unsigned int rxdw3;
+
+	unsigned int rxdw4;
+
+	unsigned int rxdw5;
+
+#ifdef CONFIG_PCI_HCI
+	unsigned int rxdw6;
+
+	unsigned int rxdw7;
+#endif
+};
+
+#define EOR BIT(30)
+
+#ifdef CONFIG_PCI_HCI
+#define PCI_MAX_RX_QUEUE		2// MSDU packet queue, Rx Command Queue
+#define PCI_MAX_RX_COUNT		64
+
+struct rtw_rx_ring {
+	struct recv_stat	*desc;
+	dma_addr_t		dma;
+	unsigned int		idx;
+	struct sk_buff	*rx_buf[PCI_MAX_RX_COUNT];
+};
+#endif
+
+/*
+accesser of recv_priv: rtw_recv_entry(dispatch / passive level); recv_thread(passive) ; returnpkt(dispatch)
+; halt(passive) ;
+
+using enter_critical section to protect
+*/
+struct recv_priv {
+
+  	  _lock	lock;
+
+#ifdef CONFIG_RECV_THREAD_MODE	
+	_sema	recv_sema;
+	_sema	terminate_recvthread_sema;
+#endif
+	
+	//_queue	blk_strms[MAX_RX_NUMBLKS];    // keeping the block ack frame until return ack
+	_queue	free_recv_queue;
+	_queue	recv_pending_queue;
+	
+
+	u8 *pallocated_frame_buf;
+	u8 *precv_frame_buf; 
+	
+	uint free_recvframe_cnt;
+	
+	_adapter	*adapter;
+	
+#ifdef PLATFORM_WINDOWS
+	_nic_hdl  RxPktPoolHdl;
+	_nic_hdl  RxBufPoolHdl;
+
+#ifdef PLATFORM_OS_XP
+	PMDL	pbytecnt_mdl;
+#endif
+	uint	counter; //record the number that up-layer will return to drv; only when counter==0 can we  release recv_priv 
+	NDIS_EVENT 	recv_resource_evt ;
+#endif	
+
+	u32	bIsAnyNonBEPkts;
+	u64	rx_bytes;
+	u64	rx_pkts;
+	u64	rx_drop;
+	u64	last_rx_bytes;
+
+	uint  rx_icv_err;
+	uint  rx_largepacket_crcerr;
+	uint  rx_smallpacket_crcerr;
+	uint  rx_middlepacket_crcerr;
+
+#ifdef CONFIG_USB_HCI	
+	//u8 *pallocated_urb_buf;
+	_sema allrxreturnevt;
+	uint	ff_hwaddr;
+	u8	rx_pending_cnt;
+	
+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
+#ifdef PLATFORM_LINUX
+	PURB	int_in_urb;
+#endif
+
+	u8	*int_in_buf;
+#endif
+
+#endif	
+#ifdef PLATFORM_LINUX
+	struct tasklet_struct irq_prepare_beacon_tasklet;
+	struct tasklet_struct recv_tasklet;
+	struct sk_buff_head free_recv_skb_queue;
+	struct sk_buff_head rx_skb_queue;
+
+#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX
+	_queue	recv_buf_pending_queue;
+#endif	// CONFIG_USE_USB_BUFFER_ALLOC_RX
+#endif
+
+	u8 *pallocated_recv_buf;
+	u8 *precv_buf;    // 4 alignment	
+	_queue	free_recv_buf_queue;
+	u32	free_recv_buf_queue_cnt;
+
+#ifdef CONFIG_SDIO_HCI
+        u8 bytecnt_buf[512];
+	//u8 * recvbuf_drop_ori;
+	//u8 * recvbuf_drop;
+	struct recv_buf *recvbuf_drop;
+#endif
+
+#ifdef CONFIG_PCI_HCI
+	// Rx
+	struct rtw_rx_ring	rx_ring[PCI_MAX_RX_QUEUE];
+	int 	rxringcount;
+	u16	rxbuffersize;
+#endif
+
+	//For display the phy informatiom
+	u8 is_signal_dbg;	// for debug
+	u8 signal_strength_dbg;	// for debug
+	s8 rssi;
+	s8 rxpwdb;
+	u8 signal_strength;
+	u8 signal_qual;
+	u8 noise;
+	int RxSNRdB[2];
+	s8 RxRssi[2];
+	int FalseAlmCnt_all;
+
+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
+	_timer signal_stat_timer;
+	u32 signal_stat_sampling_interval;
+	//u32 signal_stat_converging_constant;
+	struct signal_stat signal_qual_data;
+	struct signal_stat signal_strength_data;
+#else //CONFIG_NEW_SIGNAL_STAT_PROCESS
+	struct smooth_rssi_data signal_qual_data;
+	struct smooth_rssi_data signal_strength_data;
+#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
+	
+};
+
+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
+#define rtw_set_signal_stat_timer(recvpriv) _set_timer(&(recvpriv)->signal_stat_timer, (recvpriv)->signal_stat_sampling_interval)
+#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
+
+struct sta_recv_priv {
+    
+    _lock	lock;
+	sint	option;	
+	
+	//_queue	blk_strms[MAX_RX_NUMBLKS];
+	_queue defrag_q;	 //keeping the fragment frame until defrag
+	
+	struct	stainfo_rxcache rxcache;  
+	
+	//uint	sta_rx_bytes;
+	//uint	sta_rx_pkts;
+	//uint	sta_rx_fail;
+
+};
+
+
+struct recv_buf{
+
+	_list list;
+
+	_lock recvbuf_lock;
+
+	u32	ref_cnt;
+
+	_adapter  *adapter;
+
+#ifdef CONFIG_SDIO_HCI
+#ifdef PLATFORM_OS_XP
+	PMDL mdl_ptr;
+#endif
+	u8	cmd_fail;
+#endif
+
+#ifdef CONFIG_USB_HCI
+
+	#if defined(PLATFORM_OS_XP)||defined(PLATFORM_LINUX)
+	PURB	purb;
+	dma_addr_t dma_transfer_addr;	/* (in) dma addr for transfer_buffer */
+	u32 alloc_sz;
+	#endif
+
+	#ifdef PLATFORM_OS_XP
+	PIRP		pirp;
+	#endif
+
+	#ifdef PLATFORM_OS_CE
+	USB_TRANSFER	usb_transfer_read_port;
+	#endif
+
+	u8  irp_pending;
+	int  transfer_len;
+
+#endif
+
+#ifdef PLATFORM_LINUX
+	_pkt *pskb;
+	u8	reuse;
+#endif
+
+	uint	len;
+	u8	*phead;
+	u8	*pdata;
+	u8	*ptail;
+	u8	*pend;
+
+	u8	*pbuf;
+	u8	*pallocated_buf;
+
+};
+
+
+/*
+	head  ----->
+
+		data  ----->
+
+			payload
+
+		tail  ----->
+
+
+	end   ----->
+
+	len = (unsigned int )(tail - data);
+
+*/
+struct recv_frame_hdr{
+
+	_list	list;
+	_pkt	*pkt;
+	_pkt *pkt_newalloc;
+
+	_adapter  *adapter;
+	
+	u8 fragcnt;
+
+	int frame_tag;
+
+	struct rx_pkt_attrib attrib;
+
+	uint  len;
+	u8 *rx_head;
+	u8 *rx_data;
+	u8 *rx_tail;
+	u8 *rx_end;
+
+	void *precvbuf;
+
+
+	//
+	struct sta_info *psta;
+
+	//for A-MPDU Rx reordering buffer control
+	struct recv_reorder_ctrl *preorder_ctrl;
+
+};
+
+
+union recv_frame{
+
+	union{
+		_list list;
+		struct recv_frame_hdr hdr;
+		uint mem[RECVFRAME_HDR_ALIGN>>2];
+	}u;
+
+	//uint mem[MAX_RXSZ>>2];
+
+};
+
+
+extern union recv_frame *rtw_alloc_recvframe (_queue *pfree_recv_queue);  //get a free recv_frame from pfree_recv_queue
+extern void rtw_init_recvframe(union recv_frame *precvframe ,struct recv_priv *precvpriv);
+extern int	 rtw_free_recvframe(union recv_frame *precvframe, _queue *pfree_recv_queue);  
+extern union recv_frame *rtw_dequeue_recvframe (_queue *queue);
+extern int	rtw_enqueue_recvframe(union recv_frame *precvframe, _queue *queue);
+extern void rtw_free_recvframe_queue(_queue *pframequeue,  _queue *pfree_recv_queue);  
+
+sint rtw_enqueue_recvbuf(struct recv_buf *precvbuf, _queue *queue);
+struct recv_buf *rtw_dequeue_recvbuf (_queue *queue);
+
+void rtw_reordering_ctrl_timeout_handler(void *pcontext);
+
+__inline static u8 *get_rxmem(union recv_frame *precvframe)
+{
+	//always return rx_head...
+	if(precvframe==NULL)
+		return NULL;
+
+	return precvframe->u.hdr.rx_head;
+}
+
+__inline static u8 *get_rx_status(union recv_frame *precvframe)
+{
+	
+	return get_rxmem(precvframe);
+	
+}
+
+__inline static u8 *get_recvframe_data(union recv_frame *precvframe)
+{
+	
+	//alwasy return rx_data	
+	if(precvframe==NULL)
+		return NULL;
+
+	return precvframe->u.hdr.rx_data;
+	
+}
+
+__inline static u8 *recvframe_push(union recv_frame *precvframe, sint sz)
+{	
+	// append data before rx_data 
+
+	/* add data to the start of recv_frame
+ *
+ *      This function extends the used data area of the recv_frame at the buffer
+ *      start. rx_data must be still larger than rx_head, after pushing.
+ */
+ 
+	if(precvframe==NULL)
+		return NULL;
+
+
+	precvframe->u.hdr.rx_data -= sz ;
+	if( precvframe->u.hdr.rx_data < precvframe->u.hdr.rx_head )
+	{
+		precvframe->u.hdr.rx_data += sz ;
+		return NULL;
+	}
+
+	precvframe->u.hdr.len +=sz;
+
+	return precvframe->u.hdr.rx_data;
+	
+}
+
+
+__inline static u8 *recvframe_pull(union recv_frame *precvframe, sint sz)
+{
+	// rx_data += sz; move rx_data sz bytes  hereafter
+
+	//used for extract sz bytes from rx_data, update rx_data and return the updated rx_data to the caller
+
+
+	if(precvframe==NULL)
+		return NULL;
+
+	
+	precvframe->u.hdr.rx_data += sz;
+
+	if(precvframe->u.hdr.rx_data > precvframe->u.hdr.rx_tail)
+	{
+		precvframe->u.hdr.rx_data -= sz;
+		return NULL;
+	}
+
+	precvframe->u.hdr.len -=sz;
+	
+	return precvframe->u.hdr.rx_data;
+	
+}
+
+__inline static u8 *recvframe_put(union recv_frame *precvframe, sint sz)
+{
+	// rx_tai += sz; move rx_tail sz bytes  hereafter
+
+	//used for append sz bytes from ptr to rx_tail, update rx_tail and return the updated rx_tail to the caller
+	//after putting, rx_tail must be still larger than rx_end. 
+ 	unsigned char * prev_rx_tail;
+
+	if(precvframe==NULL)
+		return NULL;
+
+	prev_rx_tail = precvframe->u.hdr.rx_tail;
+	
+	precvframe->u.hdr.rx_tail += sz;
+	
+	if(precvframe->u.hdr.rx_tail > precvframe->u.hdr.rx_end)
+	{
+		precvframe->u.hdr.rx_tail -= sz;
+		return NULL;
+	}
+
+	precvframe->u.hdr.len +=sz;
+
+	return precvframe->u.hdr.rx_tail;
+
+}
+
+
+
+__inline static u8 *recvframe_pull_tail(union recv_frame *precvframe, sint sz)
+{
+	// rmv data from rx_tail (by yitsen)
+	
+	//used for extract sz bytes from rx_end, update rx_end and return the updated rx_end to the caller
+	//after pulling, rx_end must be still larger than rx_data.
+
+	if(precvframe==NULL)
+		return NULL;
+
+	precvframe->u.hdr.rx_tail -= sz;
+
+	if(precvframe->u.hdr.rx_tail < precvframe->u.hdr.rx_data)
+	{
+		precvframe->u.hdr.rx_tail += sz;
+		return NULL;
+	}
+
+	precvframe->u.hdr.len -=sz;
+
+	return precvframe->u.hdr.rx_tail;
+
+}
+
+
+
+__inline static _buffer * get_rxbuf_desc(union recv_frame *precvframe)
+{
+	_buffer * buf_desc;
+	
+	if(precvframe==NULL)
+		return NULL;
+#ifdef PLATFORM_WINDOWS	
+	NdisQueryPacket(precvframe->u.hdr.pkt, NULL, NULL, &buf_desc, NULL);
+#endif
+
+	return buf_desc;
+}
+
+
+__inline static union recv_frame *rxmem_to_recvframe(u8 *rxmem)
+{
+	//due to the design of 2048 bytes alignment of recv_frame, we can reference the union recv_frame 
+	//from any given member of recv_frame.
+	// rxmem indicates the any member/address in recv_frame
+	
+	return (union recv_frame*)(((uint)rxmem>>RXFRAME_ALIGN) <<RXFRAME_ALIGN) ;
+	
+}
+
+__inline static union recv_frame *pkt_to_recvframe(_pkt *pkt)
+{
+	
+	u8 * buf_star;
+	union recv_frame * precv_frame;
+#ifdef PLATFORM_WINDOWS
+	_buffer * buf_desc;
+	uint len;
+
+	NdisQueryPacket(pkt, NULL, NULL, &buf_desc, &len);
+	NdisQueryBufferSafe(buf_desc, &buf_star, &len, HighPagePriority);
+#endif
+	precv_frame = rxmem_to_recvframe((unsigned char*)buf_star);
+
+	return precv_frame;
+}
+
+__inline static u8 *pkt_to_recvmem(_pkt *pkt)
+{
+	// return the rx_head
+	
+	union recv_frame * precv_frame = pkt_to_recvframe(pkt);
+
+	return 	precv_frame->u.hdr.rx_head;
+
+}
+
+__inline static u8 *pkt_to_recvdata(_pkt *pkt)
+{
+	// return the rx_data
+
+	union recv_frame * precv_frame =pkt_to_recvframe(pkt);
+
+	return 	precv_frame->u.hdr.rx_data;
+	
+}
+
+
+__inline static sint get_recvframe_len(union recv_frame *precvframe)
+{
+	return precvframe->u.hdr.len;
+}
+
+__inline static u8 query_rx_pwr_percentage(s8 antpower )
+{
+	if ((antpower <= -100) || (antpower >= 20))
+	{
+		return	0;
+	}
+	else if (antpower >= 0)
+	{
+		return	100;
+	}
+	else
+	{
+		return	(100+antpower);
+	}
+}
+__inline static s32 translate_percentage_to_dbm(u32 SignalStrengthIndex)
+{
+	s32	SignalPower; // in dBm.
+
+	// Translate to dBm (x=0.5y-95).
+	SignalPower = (s32)((SignalStrengthIndex + 1) >> 1); 
+	SignalPower -= 95; 
+
+	return SignalPower;
+}
+
+
+struct sta_info;
+
+extern void _rtw_init_sta_recv_priv(struct sta_recv_priv *psta_recvpriv);
+
+extern void  mgt_dispatcher(_adapter *padapter, union recv_frame *precv_frame);
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_rf.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_rf.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_rf.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_rf.h	2017-09-23 03:42:50.058674942 +0800
@@ -0,0 +1,150 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+******************************************************************************/
+#ifndef	__RTW_RF_H_ 
+#define __RTW_RF_H_
+
+#include <drv_conf.h>
+#include <rtw_cmd.h>
+
+#define OFDM_PHY		1
+#define MIXED_PHY		2
+#define CCK_PHY		3
+
+#define NumRates	(13)
+
+// slot time for 11g
+#define SHORT_SLOT_TIME					9
+#define NON_SHORT_SLOT_TIME				20
+
+#define RTL8711_RF_MAX_SENS 6
+#define RTL8711_RF_DEF_SENS 4
+
+//
+// We now define the following channels as the max channels in each channel plan.
+// 2G, total 14 chnls
+// {1,2,3,4,5,6,7,8,9,10,11,12,13,14}
+// 5G, total 24 chnls
+// {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165}
+#define	MAX_CHANNEL_NUM					38//14+24
+
+//#define NUM_REGULATORYS	21
+#define NUM_REGULATORYS	1
+
+//Country codes
+#define USA							0x555320
+#define EUROPE						0x1 //temp, should be provided later	
+#define JAPAN						0x2 //temp, should be provided later	
+
+struct	regulatory_class {
+	u32	starting_freq;					//MHz, 
+	u8	channel_set[MAX_CHANNEL_NUM];
+	u8	channel_cck_power[MAX_CHANNEL_NUM];//dbm
+	u8	channel_ofdm_power[MAX_CHANNEL_NUM];//dbm
+	u8	txpower_limit;  				//dbm
+	u8	channel_spacing;				//MHz
+	u8	modem;
+};
+
+typedef enum _CAPABILITY{
+	cESS			= 0x0001,
+	cIBSS			= 0x0002,
+	cPollable		= 0x0004,
+	cPollReq			= 0x0008,
+	cPrivacy		= 0x0010,
+	cShortPreamble	= 0x0020,
+	cPBCC			= 0x0040,
+	cChannelAgility	= 0x0080,
+	cSpectrumMgnt	= 0x0100,
+	cQos			= 0x0200,	// For HCCA, use with CF-Pollable and CF-PollReq
+	cShortSlotTime	= 0x0400,
+	cAPSD			= 0x0800,
+	cRM				= 0x1000,	// RRM (Radio Request Measurement)
+	cDSSS_OFDM	= 0x2000,
+	cDelayedBA		= 0x4000,
+	cImmediateBA	= 0x8000,
+}CAPABILITY, *PCAPABILITY;
+
+enum	_REG_PREAMBLE_MODE{
+	PREAMBLE_LONG	= 1,
+	PREAMBLE_AUTO	= 2,
+	PREAMBLE_SHORT	= 3,
+};
+
+
+enum _RTL8712_RF_MIMO_CONFIG_{
+ RTL8712_RFCONFIG_1T=0x10,
+ RTL8712_RFCONFIG_2T=0x20,
+ RTL8712_RFCONFIG_1R=0x01,
+ RTL8712_RFCONFIG_2R=0x02,
+ RTL8712_RFCONFIG_1T1R=0x11,
+ RTL8712_RFCONFIG_1T2R=0x12,
+ RTL8712_RFCONFIG_TURBO=0x92,
+ RTL8712_RFCONFIG_2T2R=0x22
+};
+
+
+// Bandwidth Offset
+#define HAL_PRIME_CHNL_OFFSET_DONT_CARE	0
+#define HAL_PRIME_CHNL_OFFSET_LOWER	1
+#define HAL_PRIME_CHNL_OFFSET_UPPER	2
+
+// Represent Channel Width in HT Capabilities
+//
+typedef enum _HT_CHANNEL_WIDTH {
+	HT_CHANNEL_WIDTH_20 = 0,
+	HT_CHANNEL_WIDTH_40 = 1,
+}HT_CHANNEL_WIDTH, *PHT_CHANNEL_WIDTH;
+
+//
+// Represent Extention Channel Offset in HT Capabilities
+// This is available only in 40Mhz mode.
+//
+typedef enum _HT_EXTCHNL_OFFSET{
+	HT_EXTCHNL_OFFSET_NO_EXT = 0,
+	HT_EXTCHNL_OFFSET_UPPER = 1,
+	HT_EXTCHNL_OFFSET_NO_DEF = 2,
+	HT_EXTCHNL_OFFSET_LOWER = 3,
+}HT_EXTCHNL_OFFSET, *PHT_EXTCHNL_OFFSET;
+
+/* 2007/11/15 MH Define different RF type. */
+typedef	enum _RT_RF_TYPE_DEFINITION
+{
+	RF_1T2R = 0,
+	RF_2T4R = 1,
+	RF_2T2R = 2,
+	RF_1T1R = 3,
+	RF_2T2R_GREEN = 4,
+	RF_819X_MAX_TYPE = 5,
+}RT_RF_TYPE_DEF_E;
+
+typedef enum _RF_RADIO_PATH{
+	RF_PATH_A = 0,			//Radio Path A
+	RF_PATH_B = 1,			//Radio Path B
+	RF_PATH_C = 2,			//Radio Path C
+	RF_PATH_D = 3,			//Radio Path D
+	//RF_PATH_MAX				//Max RF number 90 support 
+}RF_RADIO_PATH_E, *PRF_RADIO_PATH_E;
+
+u32 rtw_ch2freq(u32 ch);
+u32 rtw_freq2ch(u32 freq);
+
+
+#endif //_RTL8711_RF_H_
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_security.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_security.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_security.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_security.h	2017-09-23 03:42:50.058674942 +0800
@@ -0,0 +1,423 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef __RTW_SECURITY_H_
+#define __RTW_SECURITY_H_
+
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+
+#define _NO_PRIVACY_	0x0
+#define _WEP40_			0x1
+#define _TKIP_			0x2
+#define _TKIP_WTMIC_	0x3
+#define _AES_			0x4
+#define _WEP104_		0x5
+
+#define _WPA_IE_ID_	0xdd
+#define _WPA2_IE_ID_	0x30
+
+#define SHA256_MAC_LEN 32
+#define AES_BLOCK_SIZE 16
+#define AES_PRIV_SIZE (4 * 44)
+
+#ifndef Ndis802_11AuthModeWPA2
+#define Ndis802_11AuthModeWPA2 (Ndis802_11AuthModeWPANone + 1)
+#endif
+
+#ifndef Ndis802_11AuthModeWPA2PSK
+#define Ndis802_11AuthModeWPA2PSK (Ndis802_11AuthModeWPANone + 2)
+#endif
+
+union pn48	{
+	
+	u64	val;
+	
+#ifdef CONFIG_LITTLE_ENDIAN
+
+struct {
+  u8 TSC0;
+  u8 TSC1;
+  u8 TSC2;
+  u8 TSC3;
+  u8 TSC4;
+  u8 TSC5;
+  u8 TSC6;
+  u8 TSC7;
+} _byte_;
+ 
+#elif defined(CONFIG_BIG_ENDIAN)
+
+struct {
+  u8 TSC7;
+  u8 TSC6;
+  u8 TSC5;
+  u8 TSC4;
+  u8 TSC3;
+  u8 TSC2;
+  u8 TSC1;
+  u8 TSC0;
+} _byte_;
+ 
+#endif
+
+};
+
+union Keytype {
+        u8   skey[16];
+        u32    lkey[4];
+};
+
+
+typedef struct _RT_PMKID_LIST
+{
+	u8						bUsed;
+	u8 						Bssid[6];
+	u8						PMKID[16];
+	u8						SsidBuf[33];
+	u8*						ssid_octet;
+	u16 						ssid_length;
+} RT_PMKID_LIST, *PRT_PMKID_LIST;
+
+
+struct security_priv
+{
+	u32	  dot11AuthAlgrthm;		// 802.11 auth, could be open, shared, 8021x and authswitch 
+	u32	  dot11PrivacyAlgrthm;	// This specify the privacy for shared auth. algorithm.
+
+	/* WEP */
+	u32	  dot11PrivacyKeyIndex;	// this is only valid for legendary wep, 0~3 for key id. (tx key index)
+	union Keytype dot11DefKey[4];			// this is only valid for def. key	
+	u32 	dot11DefKeylen[4];
+
+	u32 dot118021XGrpPrivacy;	// This specify the privacy algthm. used for Grp key 
+	u32	dot118021XGrpKeyid;		// key id used for Grp Key ( tx key index)
+	union Keytype	dot118021XGrpKey[4];	// 802.1x Group Key, for inx0 and inx1	
+	union Keytype	dot118021XGrptxmickey[4];
+	union Keytype	dot118021XGrprxmickey[4];
+	union pn48		dot11Grptxpn;			// PN48 used for Grp Key xmit.
+	union pn48		dot11Grprxpn;			// PN48 used for Grp Key recv.
+
+#ifdef CONFIG_AP_MODE
+	//extend security capabilities for AP_MODE 
+	unsigned int dot8021xalg;//0:disable, 1:psk, 2:802.1x
+	unsigned int wpa_psk;//0:disable, bit(0): WPA, bit(1):WPA2
+	unsigned int wpa_group_cipher;
+	unsigned int wpa2_group_cipher;
+	unsigned int wpa_pairwise_cipher;
+	unsigned int wpa2_pairwise_cipher;	
+#endif
+
+	u8 wps_phase;//for wps
+	u8 wps_ie[MAX_WPS_IE_LEN];//added in assoc req
+	int wps_ie_len;
+	
+	
+	u8	binstallGrpkey;
+	u8	busetkipkey;
+	//_timer tkip_timer;
+	u8	bcheck_grpkey;
+	u8	bgrpkey_handshake;
+	
+	//u8	packet_cnt;//unused, removed
+	
+	s32	sw_encrypt;//from registry_priv
+	s32	sw_decrypt;//from registry_priv
+	
+	s32 	hw_decrypted;//if the rx packets is hw_decrypted==_FALSE, it means the hw has not been ready.
+
+
+	//keeps the auth_type & enc_status from upper layer ioctl(wpa_supplicant or wzc)
+	u32 ndisauthtype;	// NDIS_802_11_AUTHENTICATION_MODE
+	u32 ndisencryptstatus;	// NDIS_802_11_ENCRYPTION_STATUS
+
+	WLAN_BSSID_EX sec_bss;  //for joinbss (h2c buffer) usage
+
+	NDIS_802_11_WEP ndiswep;
+#ifdef PLATFORM_WINDOWS
+	u8 KeyMaterial[16];// variable length depending on above field.
+#endif
+
+	u8 assoc_info[600];
+	u8 szofcapability[256]; //for wpa2 usage
+	u8 oidassociation[512]; //for wpa/wpa2 usage
+	u8 authenticator_ie[256];  //store ap security information element
+	u8 supplicant_ie[256];  //store sta security information element
+
+
+	//for tkip countermeasure
+	u32 last_mic_err_time;	
+	u8	btkip_countermeasure;
+	u8	btkip_wait_report;
+	u32 btkip_countermeasure_time;
+
+	//---------------------------------------------------------------------------
+	// For WPA2 Pre-Authentication.
+	//---------------------------------------------------------------------------
+	//u8				RegEnablePreAuth;				// Default value: Pre-Authentication enabled or not, from registry "EnablePreAuth". Added by Annie, 2005-11-01.
+	//u8				EnablePreAuthentication;			// Current Value: Pre-Authentication enabled or not.
+	RT_PMKID_LIST		PMKIDList[NUM_PMKID_CACHE];	// Renamed from PreAuthKey[NUM_PRE_AUTH_KEY]. Annie, 2006-10-13.
+	u8				PMKIDIndex;
+	//u32				PMKIDCount;						// Added by Annie, 2006-10-13.
+	//u8				szCapability[256];				// For WPA2-PSK using zero-config, by Annie, 2005-09-20.
+
+};
+
+struct sha256_state {
+	u64 length;
+	u32 state[8], curlen;
+	u8 buf[64];
+};
+
+#define GET_ENCRY_ALGO(psecuritypriv, psta, encry_algo, bmcst)\
+do{\
+	switch(psecuritypriv->dot11AuthAlgrthm)\
+	{\
+		case dot11AuthAlgrthm_Open:\
+		case dot11AuthAlgrthm_Shared:\
+		case dot11AuthAlgrthm_Auto:\
+			encry_algo = (u8)psecuritypriv->dot11PrivacyAlgrthm;\
+			break;\
+		case dot11AuthAlgrthm_8021X:\
+			if(bmcst)\
+				encry_algo = (u8)psecuritypriv->dot118021XGrpPrivacy;\
+			else\
+				encry_algo =(u8) psta->dot118021XPrivacy;\
+			break;\
+	}\
+}while(0)
+
+
+#define SET_ICE_IV_LEN( iv_len, icv_len, encrypt)\
+do{\
+	switch(encrypt)\
+	{\
+		case _WEP40_:\
+		case _WEP104_:\
+			iv_len = 4;\
+			icv_len = 4;\
+			break;\
+		case _TKIP_:\
+			iv_len = 8;\
+			icv_len = 4;\
+			break;\
+		case _AES_:\
+			iv_len = 8;\
+			icv_len = 8;\
+			break;\
+		default:\
+			iv_len = 0;\
+			icv_len = 0;\
+			break;\
+	}\
+}while(0)
+
+
+#define GET_TKIP_PN(iv,dot11txpn)\
+do{\
+	dot11txpn._byte_.TSC0=iv[2];\
+	dot11txpn._byte_.TSC1=iv[0];\
+	dot11txpn._byte_.TSC2=iv[4];\
+	dot11txpn._byte_.TSC3=iv[5];\
+	dot11txpn._byte_.TSC4=iv[6];\
+	dot11txpn._byte_.TSC5=iv[7];\
+}while(0)
+
+
+#define ROL32( A, n )	( ((A) << (n)) | ( ((A)>>(32-(n)))  & ( (1UL << (n)) - 1 ) ) )
+#define ROR32( A, n ) 	ROL32( (A), 32-(n) )
+
+struct mic_data
+{
+	u32  K0, K1;         // Key
+	u32  L, R;           // Current state
+	u32  M;              // Message accumulator (single word)
+	u32     nBytesInM;      // # bytes in M
+};
+
+extern const u32 Te0[256];
+extern const u32 Te1[256];
+extern const u32 Te2[256];
+extern const u32 Te3[256];
+extern const u32 Te4[256];
+extern const u32 Td0[256];
+extern const u32 Td1[256];
+extern const u32 Td2[256];
+extern const u32 Td3[256];
+extern const u32 Td4[256];
+extern const u32 rcon[10];
+extern const u8 Td4s[256];
+extern const u8 rcons[10];
+
+#define RCON(i) (rcons[(i)] << 24)
+
+static inline u32 rotr(u32 val, int bits)
+{
+	return (val >> bits) | (val << (32 - bits));
+}
+
+#define TE0(i) Te0[((i) >> 24) & 0xff]
+#define TE1(i) rotr(Te0[((i) >> 16) & 0xff], 8)
+#define TE2(i) rotr(Te0[((i) >> 8) & 0xff], 16)
+#define TE3(i) rotr(Te0[(i) & 0xff], 24)
+#define TE41(i) ((Te0[((i) >> 24) & 0xff] << 8) & 0xff000000)
+#define TE42(i) (Te0[((i) >> 16) & 0xff] & 0x00ff0000)
+#define TE43(i) (Te0[((i) >> 8) & 0xff] & 0x0000ff00)
+#define TE44(i) ((Te0[(i) & 0xff] >> 8) & 0x000000ff)
+#define TE421(i) ((Te0[((i) >> 16) & 0xff] << 8) & 0xff000000)
+#define TE432(i) (Te0[((i) >> 8) & 0xff] & 0x00ff0000)
+#define TE443(i) (Te0[(i) & 0xff] & 0x0000ff00)
+#define TE414(i) ((Te0[((i) >> 24) & 0xff] >> 8) & 0x000000ff)
+#define TE4(i) ((Te0[(i)] >> 8) & 0x000000ff)
+
+#define TD0(i) Td0[((i) >> 24) & 0xff]
+#define TD1(i) rotr(Td0[((i) >> 16) & 0xff], 8)
+#define TD2(i) rotr(Td0[((i) >> 8) & 0xff], 16)
+#define TD3(i) rotr(Td0[(i) & 0xff], 24)
+#define TD41(i) (Td4s[((i) >> 24) & 0xff] << 24)
+#define TD42(i) (Td4s[((i) >> 16) & 0xff] << 16)
+#define TD43(i) (Td4s[((i) >> 8) & 0xff] << 8)
+#define TD44(i) (Td4s[(i) & 0xff])
+#define TD0_(i) Td0[(i) & 0xff]
+#define TD1_(i) rotr(Td0[(i) & 0xff], 8)
+#define TD2_(i) rotr(Td0[(i) & 0xff], 16)
+#define TD3_(i) rotr(Td0[(i) & 0xff], 24)
+
+#define GETU32(pt) (((u32)(pt)[0] << 24) ^ ((u32)(pt)[1] << 16) ^ \
+			((u32)(pt)[2] <<  8) ^ ((u32)(pt)[3]))
+
+#define PUTU32(ct, st) { \
+(ct)[0] = (u8)((st) >> 24); (ct)[1] = (u8)((st) >> 16); \
+(ct)[2] = (u8)((st) >>  8); (ct)[3] = (u8)(st); }
+
+#define WPA_GET_BE32(a) ((((u32) (a)[0]) << 24) | (((u32) (a)[1]) << 16) | \
+			 (((u32) (a)[2]) << 8) | ((u32) (a)[3]))
+
+#define WPA_PUT_LE16(a, val)			\
+	do {					\
+		(a)[1] = ((u16) (val)) >> 8;	\
+		(a)[0] = ((u16) (val)) & 0xff;	\
+	} while (0)
+
+#define WPA_PUT_BE32(a, val)					\
+	do {							\
+		(a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff);	\
+		(a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff);	\
+		(a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff);	\
+		(a)[3] = (u8) (((u32) (val)) & 0xff);		\
+	} while (0)
+
+#define WPA_PUT_BE64(a, val)				\
+	do {						\
+		(a)[0] = (u8) (((u64) (val)) >> 56);	\
+		(a)[1] = (u8) (((u64) (val)) >> 48);	\
+		(a)[2] = (u8) (((u64) (val)) >> 40);	\
+		(a)[3] = (u8) (((u64) (val)) >> 32);	\
+		(a)[4] = (u8) (((u64) (val)) >> 24);	\
+		(a)[5] = (u8) (((u64) (val)) >> 16);	\
+		(a)[6] = (u8) (((u64) (val)) >> 8);	\
+		(a)[7] = (u8) (((u64) (val)) & 0xff);	\
+	} while (0)
+	
+/* ===== start - public domain SHA256 implementation ===== */
+
+/* This is based on SHA256 implementation in LibTomCrypt that was released into
+ * public domain by Tom St Denis. */
+
+/* the K array */
+static const unsigned long K[64] = {
+	0x428a2f98UL, 0x71374491UL, 0xb5c0fbcfUL, 0xe9b5dba5UL, 0x3956c25bUL,
+	0x59f111f1UL, 0x923f82a4UL, 0xab1c5ed5UL, 0xd807aa98UL, 0x12835b01UL,
+	0x243185beUL, 0x550c7dc3UL, 0x72be5d74UL, 0x80deb1feUL, 0x9bdc06a7UL,
+	0xc19bf174UL, 0xe49b69c1UL, 0xefbe4786UL, 0x0fc19dc6UL, 0x240ca1ccUL,
+	0x2de92c6fUL, 0x4a7484aaUL, 0x5cb0a9dcUL, 0x76f988daUL, 0x983e5152UL,
+	0xa831c66dUL, 0xb00327c8UL, 0xbf597fc7UL, 0xc6e00bf3UL, 0xd5a79147UL,
+	0x06ca6351UL, 0x14292967UL, 0x27b70a85UL, 0x2e1b2138UL, 0x4d2c6dfcUL,
+	0x53380d13UL, 0x650a7354UL, 0x766a0abbUL, 0x81c2c92eUL, 0x92722c85UL,
+	0xa2bfe8a1UL, 0xa81a664bUL, 0xc24b8b70UL, 0xc76c51a3UL, 0xd192e819UL,
+	0xd6990624UL, 0xf40e3585UL, 0x106aa070UL, 0x19a4c116UL, 0x1e376c08UL,
+	0x2748774cUL, 0x34b0bcb5UL, 0x391c0cb3UL, 0x4ed8aa4aUL, 0x5b9cca4fUL,
+	0x682e6ff3UL, 0x748f82eeUL, 0x78a5636fUL, 0x84c87814UL, 0x8cc70208UL,
+	0x90befffaUL, 0xa4506cebUL, 0xbef9a3f7UL, 0xc67178f2UL
+};
+
+
+/* Various logical functions */
+#define RORc(x, y) \
+( ((((unsigned long) (x) & 0xFFFFFFFFUL) >> (unsigned long) ((y) & 31)) | \
+   ((unsigned long) (x) << (unsigned long) (32 - ((y) & 31)))) & 0xFFFFFFFFUL)
+#define Ch(x,y,z)       (z ^ (x & (y ^ z)))
+#define Maj(x,y,z)      (((x | y) & z) | (x & y)) 
+#define S(x, n)         RORc((x), (n))
+#define R(x, n)         (((x)&0xFFFFFFFFUL)>>(n))
+#define Sigma0(x)       (S(x, 2) ^ S(x, 13) ^ S(x, 22))
+#define Sigma1(x)       (S(x, 6) ^ S(x, 11) ^ S(x, 25))
+#define Gamma0(x)       (S(x, 7) ^ S(x, 18) ^ R(x, 3))
+#define Gamma1(x)       (S(x, 17) ^ S(x, 19) ^ R(x, 10))
+#ifndef MIN
+#define MIN(x, y) (((x) < (y)) ? (x) : (y))
+#endif
+
+void rtw_secmicsetkey(struct mic_data *pmicdata, u8 * key );
+void rtw_secmicappendbyte(struct mic_data *pmicdata, u8 b );
+void rtw_secmicappend(struct mic_data *pmicdata, u8 * src, u32 nBytes );
+void rtw_secgetmic(struct mic_data *pmicdata, u8 * dst );
+
+void rtw_seccalctkipmic(
+	u8 * key,
+	u8 *header,
+	u8 *data,
+	u32 data_len,
+	u8 *Miccode,
+	u8   priority);
+
+u32 rtw_aes_encrypt(_adapter *padapter, u8 *pxmitframe);
+u32 rtw_tkip_encrypt(_adapter *padapter, u8 *pxmitframe);
+void rtw_wep_encrypt(_adapter *padapter, u8  *pxmitframe);
+
+u32 rtw_aes_decrypt(_adapter *padapter, u8  *precvframe);
+u32 rtw_tkip_decrypt(_adapter *padapter, u8  *precvframe);
+void rtw_wep_decrypt(_adapter *padapter, u8  *precvframe);
+
+#ifdef CONFIG_TDLS
+void wpa_tdls_generate_tpk(_adapter *padapter, struct sta_info *psta);
+int wpa_tdls_ftie_mic(u8 *kck, u8 trans_seq, 
+						u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie,
+						u8 *mic);
+int tdls_verify_mic(u8 *kck, u8 trans_seq, 
+						u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie);
+#endif
+
+#ifdef PLATFORM_WINDOWS
+void rtw_use_tkipkey_handler (
+	IN	PVOID					SystemSpecific1,
+	IN	PVOID					FunctionContext,
+	IN	PVOID					SystemSpecific2,
+	IN	PVOID					SystemSpecific3
+	);
+#endif
+#ifdef PLATFORM_LINUX
+void rtw_use_tkipkey_handler(void* FunctionContext);
+#endif
+#endif	//__RTL871X_SECURITY_H_
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_version.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_version.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_version.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_version.h	2017-09-23 03:42:50.058674942 +0800
@@ -0,0 +1 @@
+#define DRIVERVERSION	"v3.3.2_3192.20120103"
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_xmit.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_xmit.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/rtw_xmit.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/rtw_xmit.h	2017-09-23 03:42:50.058674942 +0800
@@ -0,0 +1,665 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+******************************************************************************/
+#ifndef _RTW_XMIT_H_
+#define _RTW_XMIT_H_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <xmit_osdep.h>
+
+#ifdef CONFIG_SDIO_HCI
+#define MAX_XMITBUF_SZ (30720)//	(2048)
+#define NR_XMITBUFF	(16)
+
+#elif defined (CONFIG_USB_HCI)
+#ifdef CONFIG_USB_TX_AGGREGATION
+#define MAX_XMITBUF_SZ	20480	// 20k
+#else
+#define MAX_XMITBUF_SZ	(2048)
+#endif
+
+#define NR_XMITBUFF	(4)
+
+#elif defined (CONFIG_PCI_HCI)
+#define MAX_XMITBUF_SZ	(1664)
+#define NR_XMITBUFF	(128)
+#endif
+
+#ifdef PLATFORM_OS_CE
+#define XMITBUF_ALIGN_SZ 4
+#else
+#ifdef CONFIG_PCI_HCI
+#define XMITBUF_ALIGN_SZ 4
+#else
+#define XMITBUF_ALIGN_SZ 512
+#endif
+#endif
+
+// xmit extension buff defination
+#define MAX_XMIT_EXTBUF_SZ	(2048)
+
+#define NR_XMIT_EXTBUFF	(32)
+
+#define MAX_NUMBLKS		(1)
+
+#define XMIT_VO_QUEUE (0)
+#define XMIT_VI_QUEUE (1)
+#define XMIT_BE_QUEUE (2)
+#define XMIT_BK_QUEUE (3)
+
+#ifdef CONFIG_PCI_HCI
+#define TXDESC_NUM						64
+//#define TXDESC_NUM						128
+#define TXDESC_NUM_BE_QUEUE			128
+#endif
+
+#define WEP_IV(pattrib_iv, dot11txpn, keyidx)\
+do{\
+	pattrib_iv[0] = dot11txpn._byte_.TSC0;\
+	pattrib_iv[1] = dot11txpn._byte_.TSC1;\
+	pattrib_iv[2] = dot11txpn._byte_.TSC2;\
+	pattrib_iv[3] = ((keyidx & 0x3)<<6);\
+	dot11txpn.val = (dot11txpn.val == 0xffffff) ? 0: (dot11txpn.val+1);\
+}while(0)
+
+
+#define TKIP_IV(pattrib_iv, dot11txpn, keyidx)\
+do{\
+	pattrib_iv[0] = dot11txpn._byte_.TSC1;\
+	pattrib_iv[1] = (dot11txpn._byte_.TSC1 | 0x20) & 0x7f;\
+	pattrib_iv[2] = dot11txpn._byte_.TSC0;\
+	pattrib_iv[3] = BIT(5) | ((keyidx & 0x3)<<6);\
+	pattrib_iv[4] = dot11txpn._byte_.TSC2;\
+	pattrib_iv[5] = dot11txpn._byte_.TSC3;\
+	pattrib_iv[6] = dot11txpn._byte_.TSC4;\
+	pattrib_iv[7] = dot11txpn._byte_.TSC5;\
+	dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0: (dot11txpn.val+1);\
+}while(0)
+
+#define AES_IV(pattrib_iv, dot11txpn, keyidx)\
+do{\
+	pattrib_iv[0] = dot11txpn._byte_.TSC0;\
+	pattrib_iv[1] = dot11txpn._byte_.TSC1;\
+	pattrib_iv[2] = 0;\
+	pattrib_iv[3] = BIT(5) | ((keyidx & 0x3)<<6);\
+	pattrib_iv[4] = dot11txpn._byte_.TSC2;\
+	pattrib_iv[5] = dot11txpn._byte_.TSC3;\
+	pattrib_iv[6] = dot11txpn._byte_.TSC4;\
+	pattrib_iv[7] = dot11txpn._byte_.TSC5;\
+	dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0: (dot11txpn.val+1);\
+}while(0)
+
+
+#define HWXMIT_ENTRY	4
+
+#define TXDESC_SIZE 32
+#define PACKET_OFFSET_SZ (8)
+
+#ifdef CONFIG_USB_HCI
+#define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ)
+#endif
+
+#ifdef CONFIG_PCI_HCI
+#define TXDESC_OFFSET 0
+#define TX_DESC_NEXT_DESC_OFFSET	40
+#endif
+
+//
+//defined for TX DESC Operation
+//
+
+#define MAX_TID (15)
+
+//OFFSET 0
+#define OFFSET_SZ	0
+#define OFFSET_SHT	16
+#define BMC		BIT(24)
+#define LSG		BIT(26)
+#define FSG		BIT(27)
+#define OWN 		BIT(31)
+
+//OFFSET 4
+#define PKT_OFFSET_SZ	0
+#define BK		BIT(6)
+#define QSEL_SHT	8
+#define Rate_ID_SHT	16
+#define NAVUSEHDR	BIT(20)
+#define PKT_OFFSET_SHT	26
+#define HWPC		BIT(31)
+
+//OFFSET 8
+#define AGG_EN		BIT(29)
+
+//OFFSET 12
+#define SEQ_SHT		16
+
+//OFFSET 16
+#define QoS		BIT(6)
+#define HW_SEQ_EN	BIT(7)
+#define USERATE		BIT(8)
+#define DISDATAFB	BIT(10)
+#define DATA_SHORT	BIT(24)
+#define DATA_BW		BIT(25)
+
+//OFFSET 20
+#define SGI		BIT(6)
+
+struct tx_desc{
+
+	//DWORD 0
+	unsigned int txdw0;
+
+	unsigned int txdw1;
+
+	unsigned int txdw2;
+
+	unsigned int txdw3;
+
+	unsigned int txdw4;
+
+	unsigned int txdw5;
+
+	unsigned int txdw6;
+
+	unsigned int txdw7;
+#ifdef CONFIG_PCI_HCI
+	unsigned int txdw8;
+
+	unsigned int txdw9;
+
+	unsigned int txdw10;
+
+	unsigned int txdw11;
+
+	// 2008/05/15 MH Because PCIE HW memory R/W 4K limit. And now,  our descriptor
+	// size is 40 bytes. If you use more than 102 descriptor( 103*40>4096), HW will execute
+	// memoryR/W CRC error. And then all DMA fetch will fail. We must decrease descriptor
+	// number or enlarge descriptor size as 64 bytes.
+	unsigned int txdw12;
+
+	unsigned int txdw13;
+
+	unsigned int txdw14;
+
+	unsigned int txdw15;
+#endif
+};
+
+
+union txdesc {
+	struct tx_desc txdesc;
+	unsigned int value[TXDESC_SIZE>>2];	
+};
+
+#ifdef CONFIG_PCI_HCI
+#define PCI_MAX_TX_QUEUE_COUNT	8
+
+struct rtw_tx_ring {
+	struct tx_desc	*desc;
+	dma_addr_t		dma;
+	unsigned int		idx;
+	unsigned int		entries;
+	_queue			queue;
+	u32				qlen;
+};
+#endif
+
+struct	hw_xmit	{
+	//_lock xmit_lock;
+	//_list	pending;	
+	_queue *sta_queue;
+	//struct hw_txqueue *phwtxqueue;
+	//sint	txcmdcnt;		
+	int	accnt;
+};
+
+#if 0
+struct pkt_attrib
+{	
+	u8	type;
+	u8	subtype;
+	u8	bswenc;
+	u8	dhcp_pkt;
+	u16	ether_type;	
+	int	pktlen;		//the original 802.3 pkt raw_data len (not include ether_hdr data)
+	int	pkt_hdrlen;	//the original 802.3 pkt header len
+	int	hdrlen;		//the WLAN Header Len	
+	int	nr_frags;
+	int	last_txcmdsz;
+	int	encrypt;	//when 0 indicate no encrypt. when non-zero, indicate the encrypt algorith
+	u8	iv[8];
+	int	iv_len;
+	u8	icv[8];	
+	int	icv_len;
+	int	priority;
+	int	ack_policy;
+	int	mac_id;
+	int	vcs_mode;	//virtual carrier sense method	
+	
+	u8 	dst[ETH_ALEN];
+	u8	src[ETH_ALEN];
+	u8	ta[ETH_ALEN];
+	u8 	ra[ETH_ALEN];
+
+	u8	key_idx;
+
+	u8	qos_en;
+	u8	ht_en;	
+	u8	raid;//rate adpative id
+	u8	bwmode;
+	u8	ch_offset;//PRIME_CHNL_OFFSET
+	u8	sgi;//short GI
+	u8	ampdu_en;//tx ampdu enable
+	u8	mdata;//more data bit
+	u8	eosp;
+
+	u8	pctrl;//per packet txdesc control enable
+	u8	triggered;//for ap mode handling Power Saving sta
+	
+	u32	qsel;
+	u16	seqnum;
+
+	struct sta_info * psta;
+#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
+	u8	hw_tcp_csum;
+#endif	
+};
+#else
+//reduce size
+struct pkt_attrib
+{	
+	u8	type;
+	u8	subtype;
+	u8	bswenc;
+	u8	dhcp_pkt;
+	u16	ether_type;
+	u16	seqnum;
+	u16	pkt_hdrlen;	//the original 802.3 pkt header len
+	u16	hdrlen;		//the WLAN Header Len
+	u32	pktlen;		//the original 802.3 pkt raw_data len (not include ether_hdr data)
+	u32	last_txcmdsz;
+	u8	nr_frags;
+	u8	encrypt;	//when 0 indicate no encrypt. when non-zero, indicate the encrypt algorith
+	u8	iv_len;
+	u8	icv_len;
+	u8	iv[8];
+	u8	icv[8];
+	u8	priority;
+	u8	ack_policy;
+	u8	mac_id;
+	u8	vcs_mode;	//virtual carrier sense method
+	u8 	dst[ETH_ALEN];
+	u8	src[ETH_ALEN];
+	u8	ta[ETH_ALEN];
+	u8 	ra[ETH_ALEN];
+	u8	key_idx;
+	u8	qos_en;
+	u8	ht_en;	
+	u8	raid;//rate adpative id
+	u8	bwmode;
+	u8	ch_offset;//PRIME_CHNL_OFFSET
+	u8	sgi;//short GI
+	u8	ampdu_en;//tx ampdu enable
+	u8	mdata;//more data bit
+	u8	pctrl;//per packet txdesc control enable
+	u8	triggered;//for ap mode handling Power Saving sta
+	u8	qsel;
+	u8	eosp;
+
+	struct sta_info * psta;
+#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
+	u8	hw_tcp_csum;
+#endif	
+};
+#endif
+
+
+#define WLANHDR_OFFSET	64
+
+#define NULL_FRAMETAG		(0x0)
+#define DATA_FRAMETAG		0x01
+#define L2_FRAMETAG		0x02
+#define MGNT_FRAMETAG		0x03
+#define AMSDU_FRAMETAG	0x04
+
+#define EII_FRAMETAG		0x05
+#define IEEE8023_FRAMETAG  0x06
+
+#define MP_FRAMETAG		0x07
+
+#define TXAGG_FRAMETAG 	0x08
+
+
+struct xmit_buf
+{
+	_list	list;
+
+	_adapter *padapter;
+
+	u8 *pallocated_buf;
+
+	u8 *pbuf;
+
+	void *priv_data;
+
+	u16 ext_tag; // 0: Normal xmitbuf, 1: extension xmitbuf.
+	u16 flags;
+	u32 alloc_sz;
+
+#ifdef CONFIG_USB_HCI
+       
+       u32 sz[8];	   
+
+#if defined(PLATFORM_OS_XP)||defined(PLATFORM_LINUX)
+	PURB	pxmit_urb[8];
+	dma_addr_t dma_transfer_addr;	/* (in) dma addr for transfer_buffer */
+#endif
+
+#ifdef PLATFORM_OS_XP
+	PIRP		pxmit_irp[8];
+#endif
+
+#ifdef PLATFORM_OS_CE
+	USB_TRANSFER	usb_transfer_write_port;
+#endif
+
+#ifdef PLATFORM_LINUX
+	u8 isSync; //is this synchronous?
+	int status; // keeping urb status for synchronous call to access
+	struct completion done; // for wirte_port synchronously
+#endif
+
+	u8 bpending[8];
+	
+	sint last[8];
+ 
+#endif
+
+#ifdef CONFIG_SDIO_HCI
+	u32  len;	
+	u8 *phead;
+	u8 *pdata;
+	u8 *ptail;
+	u8 *pend;
+	u32 ff_hwaddr;
+#ifdef PLATFORM_OS_XP
+	PMDL pxmitbuf_mdl;
+	PIRP  pxmitbuf_irp; 
+	PSDBUS_REQUEST_PACKET pxmitbuf_sdrp;
+#endif	
+#endif
+
+#ifdef CONFIG_PCI_HCI
+	u32  len;
+#endif
+
+#ifdef DBG_XMIT_BUF
+	u8 no;
+#endif
+
+};
+
+struct xmit_frame
+{
+	_list	list;
+
+	struct pkt_attrib attrib;
+
+	_pkt *pkt;
+
+	int	frame_tag;
+
+	_adapter *padapter;
+
+	u8	*buf_addr;
+
+	struct xmit_buf *pxmitbuf;
+
+#ifdef CONFIG_SDIO_HCI
+	u8	pg_num;
+#endif
+
+#ifdef CONFIG_USB_HCI
+#ifdef CONFIG_USB_TX_AGGREGATION
+	u8	agg_num;
+#endif
+	u8	pkt_offset;
+#ifdef CONFIG_RTL8192D
+	u8	EMPktNum;
+	u16	EMPktLen[5];//The max value by HW
+#endif
+#endif
+};
+
+struct tx_servq {
+	_list	tx_pending;
+	_queue	sta_pending;	
+	int qcnt;		
+};
+
+
+
+struct sta_xmit_priv
+{
+	_lock	lock;
+	sint	option;
+	sint	apsd_setting;	//When bit mask is on, the associated edca queue supports APSD.
+
+
+	//struct tx_servq blk_q[MAX_NUMBLKS];
+	struct tx_servq	be_q;			//priority == 0,3 
+	struct tx_servq	bk_q;			//priority == 1,2
+	struct tx_servq	vi_q;			//priority == 4,5
+	struct tx_servq	vo_q;			//priority == 6,7
+	_list 	legacy_dz;
+	_list  apsd;
+
+	u16 txseq_tid[16];
+
+	//uint	sta_tx_bytes;
+	//u64	sta_tx_pkts;
+	//uint	sta_tx_fail;
+
+};
+
+
+struct	hw_txqueue	{
+	volatile sint	head;
+	volatile sint	tail;
+	volatile sint 	free_sz;	//in units of 64 bytes	
+	volatile sint      free_cmdsz;
+	volatile sint	 txsz[8];
+	uint	ff_hwaddr;
+	uint	cmd_hwaddr;
+	sint	ac_tag;
+};
+
+
+struct	xmit_priv	{
+	
+	_lock	lock;
+
+	_sema	xmit_sema;
+	_sema	terminate_xmitthread_sema;
+	
+	//_queue	blk_strms[MAX_NUMBLKS];
+	_queue	be_pending;
+	_queue	bk_pending;
+	_queue	vi_pending;
+	_queue	vo_pending;
+	_queue	bm_pending;
+	
+	//_queue	legacy_dz_queue;
+	//_queue	apsd_queue;
+	
+	u8 *pallocated_frame_buf;
+	u8 *pxmit_frame_buf;
+	uint free_xmitframe_cnt;
+
+	//uint mapping_addr;
+	//uint pkt_sz;	
+	
+	_queue	free_xmit_queue;	
+
+	//struct	hw_txqueue	be_txqueue;
+	//struct	hw_txqueue	bk_txqueue;
+	//struct	hw_txqueue	vi_txqueue;
+	//struct	hw_txqueue	vo_txqueue;
+	//struct	hw_txqueue	bmc_txqueue;
+
+	uint	frag_len;
+
+	_adapter	*adapter;
+	
+	u8   vcs_setting;
+	u8	vcs;
+	u8	vcs_type;
+	//u16  rts_thresh;
+	
+	u64	tx_bytes;
+	u64	tx_pkts;
+	u64	tx_drop;
+	u64	last_tx_bytes;
+	u64	last_tx_pkts;
+	
+	struct hw_xmit *hwxmits;
+	u8	hwxmit_entry;
+
+#ifdef CONFIG_USB_HCI
+	_sema	tx_retevt;//all tx return event;
+	u8		txirp_cnt;//
+	
+#ifdef PLATFORM_OS_CE
+	USB_TRANSFER	usb_transfer_write_port;
+//	USB_TRANSFER	usb_transfer_write_mem;
+#endif
+#ifdef PLATFORM_LINUX
+	struct tasklet_struct xmit_tasklet;
+#endif
+	//per AC pending irp
+	int beq_cnt;
+	int bkq_cnt;
+	int viq_cnt;
+	int voq_cnt;
+	
+#endif
+
+#ifdef CONFIG_SDIO_HCI
+	u8 free_pg[8];
+	u8	public_pgsz;
+	u8	required_pgsz;
+	u8	used_pgsz;
+	u8	init_pgsz;
+#ifdef PLATFORM_OS_XP
+	PMDL prd_freesz_mdl[2];
+	u8 brd_freesz_pending[2];
+	PIRP  prd_freesz_irp[2]; 
+	PSDBUS_REQUEST_PACKET prd_freesz_sdrp[2];
+	u8 rd_freesz_irp_idx;
+#endif
+
+#endif
+
+#ifdef CONFIG_PCI_HCI
+	// Tx
+	struct rtw_tx_ring	tx_ring[PCI_MAX_TX_QUEUE_COUNT];	
+	int	txringcount[PCI_MAX_TX_QUEUE_COUNT];
+#ifdef PLATFORM_LINUX
+	struct tasklet_struct xmit_tasklet;
+#endif
+#endif
+
+	_queue free_xmitbuf_queue;
+	_queue pending_xmitbuf_queue; // unused??
+	u8 *pallocated_xmitbuf;
+	u8 *pxmitbuf;
+	uint free_xmitbuf_cnt;
+	
+	_queue free_xmit_extbuf_queue;
+	u8 *pallocated_xmit_extbuf;
+	u8 *pxmit_extbuf;
+	uint free_xmit_extbuf_cnt;
+
+	u16	nqos_ssn;
+	ATOMIC_T	HwRdyXmitData; // driver should wait hw setting done for join event callback, only for Data Frame. 1:done 0:not yet.
+};
+
+extern struct xmit_buf *rtw_alloc_xmitbuf_ext(struct xmit_priv *pxmitpriv);
+extern s32 rtw_free_xmitbuf_ext(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
+
+extern struct xmit_buf *rtw_alloc_xmitbuf(struct xmit_priv *pxmitpriv);
+extern s32 rtw_free_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
+
+void rtw_count_tx_stats(_adapter *padapter, struct xmit_frame *pxmitframe, int sz);
+extern void rtw_update_protection(_adapter *padapter, u8 *ie, uint ie_len);
+extern s32 rtw_make_wlanhdr(_adapter *padapter, u8 *hdr, struct pkt_attrib *pattrib);
+extern s32 rtw_put_snap(u8 *data, u16 h_proto);
+
+extern struct xmit_frame *rtw_alloc_xmitframe(struct xmit_priv *pxmitpriv);
+extern s32 rtw_free_xmitframe(struct xmit_priv *pxmitpriv, struct xmit_frame *pxmitframe);
+extern void rtw_free_xmitframe_queue(struct xmit_priv *pxmitpriv, _queue *pframequeue);
+struct tx_servq *rtw_get_sta_pending(_adapter *padapter, struct sta_info *psta, sint up, u8 *ac);
+extern s32 rtw_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
+extern struct xmit_frame* rtw_dequeue_xframe(struct xmit_priv *pxmitpriv, struct hw_xmit *phwxmit_i, sint entry);
+
+extern s32 rtw_xmit_classifier(_adapter *padapter, struct xmit_frame *pxmitframe);
+extern thread_return rtw_xmit_thread(thread_context context);
+extern s32 rtw_xmitframe_coalesce(_adapter *padapter, _pkt *pkt, struct xmit_frame *pxmitframe);
+#ifdef CONFIG_TDLS
+extern void fill_tdls_dis_rsp_frbody(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe);
+extern s32 xmit_tdls_coalesce(_adapter *padapter, struct xmit_frame *pxmitframe, u8 action);
+void rtw_dump_xframe(_adapter *padapter, struct xmit_frame *pxmitframe);
+#endif
+#ifdef CONFIG_IOL
+void rtw_dump_xframe_sync(_adapter *padapter, struct xmit_frame *pxmitframe);
+#endif
+s32 _rtw_init_hw_txqueue(struct hw_txqueue* phw_txqueue, u8 ac_tag);
+void _rtw_init_sta_xmit_priv(struct sta_xmit_priv *psta_xmitpriv);
+
+
+s32 rtw_txframes_pending(_adapter *padapter);
+s32 rtw_txframes_sta_ac_pending(_adapter *padapter, struct pkt_attrib *pattrib);
+void rtw_init_hwxmits(struct hw_xmit *phwxmit, sint entry);
+
+
+s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, _adapter *padapter);
+void _rtw_free_xmit_priv (struct xmit_priv *pxmitpriv);
+
+
+void rtw_alloc_hwxmits(_adapter *padapter);
+void rtw_free_hwxmits(_adapter *padapter);
+
+s32 rtw_free_xmitframe_ex(struct xmit_priv *pxmitpriv, struct xmit_frame *pxmitframe);
+
+s32 rtw_xmit(_adapter *padapter, _pkt **pkt);
+
+#ifdef CONFIG_TDLS
+sint xmit_tdls_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe);
+#endif
+
+#ifdef CONFIG_AP_MODE
+sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe);
+void wakeup_sta_to_xmit(_adapter *padapter, struct sta_info *psta);
+void xmit_delivery_enabled_frames(_adapter *padapter, struct sta_info *psta);
+#endif
+
+#endif	//_RTL871X_XMIT_H_
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/sdio_hal.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/sdio_hal.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/sdio_hal.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/sdio_hal.h	2017-09-23 03:42:50.058674942 +0800
@@ -0,0 +1,34 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef __SDIO_HAL_H__
+
+#define __SDIO_HAL_H__
+
+extern u8 sd_hal_bus_init(_adapter * adapter);
+extern u8 sd_hal_bus_deinit(_adapter * adapter);
+
+
+u8  sd_int_isr (IN PADAPTER	padapter);
+void sd_int_dpc(PADAPTER padapter);
+
+
+#endif //__SDIO_HAL_H__
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/sdio_ops_ce.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/sdio_ops_ce.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/sdio_ops_ce.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/sdio_ops_ce.h	2017-09-23 03:42:50.062674930 +0800
@@ -0,0 +1,56 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef _SDIO_OPS_WINCE_H_
+#define _SDIO_OPS_WINCE_H_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <osdep_intf.h>
+
+
+#ifdef PLATFORM_OS_CE
+
+
+extern u8 sdbus_cmd52r_ce(struct intf_priv *pintfpriv, u32 addr);
+
+
+extern void sdbus_cmd52w_ce(struct intf_priv *pintfpriv, u32 addr,u8 val8);
+
+
+uint sdbus_read_blocks_to_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf);
+
+extern uint sdbus_read_bytes_to_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf);
+
+
+extern uint sdbus_write_blocks_from_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf,u8 async);
+
+extern uint sdbus_write_bytes_from_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf);
+extern u8 sdbus_func1cmd52r_ce(struct intf_priv *pintfpriv, u32 addr);
+extern void sdbus_func1cmd52w_ce(struct intf_priv *pintfpriv, u32 addr, u8 val8);
+extern uint sdbus_read_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata);
+extern uint sdbus_write_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata);
+extern void sdio_read_int(_adapter *padapter, u32 addr,u8 sz,void *pdata);
+
+#endif
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/sdio_ops.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/sdio_ops.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/sdio_ops.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/sdio_ops.h	2017-09-23 03:42:50.062674930 +0800
@@ -0,0 +1,80 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef __SDIO_OPS_H_
+#define __SDIO_OPS_H_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <osdep_intf.h>
+
+#ifdef PLATFORM_LINUX
+#include <sdio_ops_linux.h>
+#endif
+
+
+
+#ifdef PLATFORM_WINDOWS
+
+#ifdef PLATFORM_OS_XP
+#include <sdio_ops_xp.h>
+struct async_context
+{
+	PMDL pmdl;
+	PSDBUS_REQUEST_PACKET sdrp;
+	unsigned char* r_buf;
+	unsigned char* padapter;
+};
+#endif
+#ifdef PLATFORM_OS_CE
+#include <sdio_ops_ce.h>
+#endif
+#endif
+
+
+
+extern void sdio_set_intf_option(u32 *poption);
+
+extern void sdio_set_intf_funs(struct intf_hdl *pintf_hdl);
+
+extern uint sdio_init_intf_priv(struct intf_priv *pintfpriv);
+
+extern void sdio_unload_intf_priv(struct intf_priv *pintfpriv);
+
+extern void sdio_intf_hdl_init(u8 *priv);
+
+extern void sdio_intf_hdl_unload(u8 *priv);
+
+extern void sdio_intf_hdl_open(u8 *priv);
+
+extern void sdio_intf_hdl_close(u8 *priv);
+
+extern void sdio_set_intf_ops(struct _io_ops *pops);
+	
+//extern void sdio_set_intf_callbacks(struct _io_callbacks *pcallbacks);
+extern void sdio_func1cmd52_read(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem);
+extern void sdio_func1cmd52_write(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem);
+
+extern	uint __inline _cvrt2ftaddr(const u32 addr, u32 *pftaddr)  ;
+
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/sdio_ops_linux.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/sdio_ops_linux.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/sdio_ops_linux.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/sdio_ops_linux.h	2017-09-23 03:42:50.062674930 +0800
@@ -0,0 +1,55 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef _SDIO_OPS_LINUX_H_
+#define _SDIO_OPS_LINUX_H_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <osdep_intf.h>
+
+
+#ifdef PLATFORM_LINUX
+
+
+extern u8 sdbus_cmd52r(struct intf_priv *pintfpriv, u32 addr);
+
+
+extern void sdbus_cmd52w(struct intf_priv *pintfpriv, u32 addr,u8 val8);
+extern u8 sdbus_direct_read8(struct intf_priv *pintfpriv, u32 addr);
+extern void sdbus_direct_write8(struct intf_priv *pintfpriv, u32 addr, u8 val8);
+
+extern uint sdbus_read_bytes_to_recvbuf(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf);
+extern uint sdbus_read_blocks_to_recvbuf(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf);
+
+
+extern uint sdbus_write_blocks_from_xmitbuf(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf,u8 async);
+
+extern uint sdbus_write_bytes_from_xmitbuf(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf);
+
+
+extern uint sdbus_read_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata);
+extern uint sdbus_write_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata);
+extern void sdio_read_int(_adapter *padapter, u32 addr,u8 sz,void *pdata);
+#endif
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/sdio_ops_xp.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/sdio_ops_xp.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/sdio_ops_xp.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/sdio_ops_xp.h	2017-09-23 03:42:50.062674930 +0800
@@ -0,0 +1,56 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef _SDIO_OPS_XP_H_
+#define _SDIO_OPS_XP_H_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <osdep_intf.h>
+
+
+#ifdef PLATFORM_OS_XP
+
+
+extern u8 sdbus_cmd52r_xp(struct intf_priv *pintfpriv, u32 addr);
+
+
+extern void sdbus_cmd52w_xp(struct intf_priv *pintfpriv, u32 addr,u8 val8);
+
+
+uint sdbus_read_blocks_to_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf);
+
+extern uint sdbus_read_bytes_to_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf);
+
+
+extern uint sdbus_write_blocks_from_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf,u8 async);
+
+extern uint sdbus_write_bytes_from_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf);
+extern u8 sdbus_func1cmd52r_xp(struct intf_priv *pintfpriv, u32 addr);
+extern void sdbus_func1cmd52w_xp(struct intf_priv *pintfpriv, u32 addr, u8 val8);
+extern uint sdbus_read_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata);
+extern uint sdbus_write_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata);
+extern void sdio_read_int(_adapter *padapter, u32 addr,u8 sz,void *pdata);
+
+#endif
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/sdio_osintf.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/sdio_osintf.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/sdio_osintf.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/sdio_osintf.h	2017-09-23 03:42:50.062674930 +0800
@@ -0,0 +1,48 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef __SDIO_OSINTF_H
+#define __SDIO_OSINTF_H
+
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+
+extern unsigned int sd_dvobj_init(_adapter * adapter);
+extern void sd_dvobj_deinit(_adapter * adapter);
+
+void rtl871x_intf_stop(_adapter *padapter);
+
+u8 sd_hal_bus_init(_adapter * padapter);
+u8 sd_hal_bus_deinit(_adapter * padapter);
+void update_xmit_hw_res(_adapter * padapter);
+void sd_c2h_hdl( PADAPTER	padapter);
+
+#ifdef PLATFORM_OS_CE
+extern NDIS_STATUS ce_sd_get_dev_hdl(_adapter *padapter );
+SD_API_STATUS  
+ce_sd_int_callback(SD_DEVICE_HANDLE hDevice, _adapter* padapter);
+extern void sd_setup_irs(_adapter *padapter);
+#endif
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/sta_info.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/sta_info.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/sta_info.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/sta_info.h	2017-09-23 03:42:50.062674930 +0800
@@ -0,0 +1,301 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * 
+******************************************************************************/
+#ifndef __STA_INFO_H_
+#define __STA_INFO_H_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <wifi.h>
+
+#define IBSS_START_MAC_ID	2
+#define NUM_STA 32
+#define NUM_ACL 64
+
+
+//if mode ==0, then the sta is allowed once the addr is hit.
+//if mode ==1, then the sta is rejected once the addr is non-hit.
+struct rtw_wlan_acl_node {
+        _list		        list;
+        u8       addr[ETH_ALEN];
+        u8       mode;
+};
+
+struct wlan_acl_pool {
+        struct rtw_wlan_acl_node aclnode[NUM_ACL];
+};
+
+typedef struct _RSSI_STA{
+	int	UndecoratedSmoothedPWDB;
+	int	UndecoratedSmoothedCCK;
+}RSSI_STA, *PRSSI_STA;
+
+struct	stainfo_stats	{
+
+	u64	rx_pkts;
+	u64	rx_bytes;
+	u64	rx_drops;
+	u64	last_rx_pkts;
+	
+	u64	tx_pkts;
+	u64	tx_bytes;
+	u64  tx_drops;
+
+};
+
+#ifdef CONFIG_TDLS
+struct TDLS_PeerKey {
+	u8 kck[16]; /* TPK-KCK */
+	u8 tk[16]; /* TPK-TK; only CCMP will be used */
+} ;
+#endif
+
+struct sta_info {
+
+	_lock	lock;
+	_list	list; //free_sta_queue
+	_list	hash_list; //sta_hash
+	//_list asoc_list; //20061114
+	//_list sleep_list;//sleep_q
+	//_list wakeup_list;//wakeup_q
+	
+	struct sta_xmit_priv sta_xmitpriv;
+	struct sta_recv_priv sta_recvpriv;
+	
+	_queue sleep_q;
+	unsigned int sleepq_len;
+	
+	uint state;
+	uint aid;
+	uint mac_id;
+	uint qos_option;
+	u8	hwaddr[ETH_ALEN];
+
+	uint	ieee8021x_blocked;	//0: allowed, 1:blocked 
+	uint	dot118021XPrivacy; //aes, tkip...
+	union Keytype	dot11tkiptxmickey;
+	union Keytype	dot11tkiprxmickey;
+	union Keytype	dot118021x_UncstKey;	
+	union pn48		dot11txpn;			// PN48 used for Unicast xmit.
+	union pn48		dot11rxpn;			// PN48 used for Unicast recv.
+
+
+	u8	bssrateset[16];
+	u32	bssratelen;
+	s32  rssi;
+	s32	signal_quality;
+	
+	u8	cts2self;
+	u8	rtsen;
+
+	u8	raid;
+	u8 	init_rate;
+
+	struct stainfo_stats sta_stats;
+
+#ifdef CONFIG_TDLS
+	u8	SNonce[32];
+	u8	ANonce[32];
+	u32	TDLS_PeerKey_Lifetime;
+	u16	TPK_count;
+	_timer	TPK_timer;
+	struct TDLS_PeerKey	tpk;
+	_adapter *padapter;
+	u8	cam_entry;
+	u16	stat_code;
+	u8	off_ch;
+	u16	ch_switch_time;
+	u16	ch_switch_timeout;
+	u8	option;
+	_workitem	option_workitem;
+	_timer	option_timer;
+	_workitem	base_ch_workitem;
+	_timer	base_ch_timer;
+	_workitem	off_ch_workitem;
+	_timer	off_ch_timer;
+#endif
+
+	//for A-MPDU TX, ADDBA timeout check	
+	_timer addba_retry_timer;
+	
+	//for A-MPDU Rx reordering buffer control 
+	struct recv_reorder_ctrl recvreorder_ctrl[16];
+
+	//for A-MPDU Tx
+	//unsigned char		ampdu_txen_bitmap;
+	u16	BA_starting_seqctrl[16];
+	
+
+#ifdef CONFIG_80211N_HT
+	struct ht_priv	htpriv;	
+#endif
+	
+	//Notes:	
+	//STA_Mode:
+	//curr_network(mlme_priv/security_priv/qos/ht) + sta_info: (STA & AP) CAP/INFO	
+	//scan_q: AP CAP/INFO
+
+	//AP_Mode:
+	//curr_network(mlme_priv/security_priv/qos/ht) : AP CAP/INFO
+	//sta_info: (AP & STA) CAP/INFO
+		
+#ifdef CONFIG_AP_MODE
+
+	_list asoc_list;
+	_list auth_list;
+	 
+	unsigned int expire_to;
+	unsigned int auth_seq;
+	unsigned int authalg;
+	unsigned char chg_txt[128];
+
+	u16 capability;	
+	int flags;	
+
+	int dot8021xalg;//0:disable, 1:psk, 2:802.1x
+	int wpa_psk;//0:disable, bit(0): WPA, bit(1):WPA2
+	int wpa_group_cipher;
+	int wpa2_group_cipher;
+	int wpa_pairwise_cipher;
+	int wpa2_pairwise_cipher;	
+
+#ifdef CONFIG_NATIVEAP_MLME
+	u8 wpa_ie[32];
+
+	u8 nonerp_set;
+	u8 no_short_slot_time_set;
+	u8 no_short_preamble_set;
+	u8 no_ht_gf_set;
+	u8 no_ht_set;
+	u8 ht_20mhz_set;
+#endif	// CONFIG_NATIVEAP_MLME
+
+	unsigned int tx_ra_bitmap;
+	u8 qos_info;
+
+	u8 max_sp_len;
+	u8 uapsd_bk;//BIT(0): Delivery enabled, BIT(1): Trigger enabled
+	u8 uapsd_be;
+	u8 uapsd_vi;
+	u8 uapsd_vo;	
+
+	u8 has_legacy_ac;
+	unsigned int sleepq_ac_len;
+
+#ifdef CONFIG_P2P
+	//p2p priv data
+	u8 is_p2p_device;
+	u8 p2p_status_code;
+
+	//p2p client info
+	u8 dev_addr[ETH_ALEN];
+	//u8 iface_addr[ETH_ALEN];//= hwaddr[ETH_ALEN]
+	u8 dev_cap;
+	u16 config_methods;
+	u8 primary_dev_type[8];
+	u8 num_of_secdev_type;
+	u8 secdev_types_list[32];// 32/8 == 4;
+	u16 dev_name_len;
+	u8 dev_name[32];	
+#endif //CONFIG_P2P
+
+#ifdef CONFIG_TX_MCAST2UNI
+	u8 under_exist_checking;
+#endif	// CONFIG_TX_MCAST2UNI
+	
+#endif	// CONFIG_AP_MODE	
+
+	//for DM
+	RSSI_STA	 rssi_stat;
+	
+
+};
+
+
+
+struct	sta_priv {
+	
+	u8 *pallocated_stainfo_buf;
+	u8 *pstainfo_buf;
+	_queue	free_sta_queue;
+	
+	_lock sta_hash_lock;
+	_list   sta_hash[NUM_STA];
+	int asoc_sta_count;
+	_queue sleep_q;
+	_queue wakeup_q;
+	
+	_adapter *padapter;
+	
+
+#ifdef CONFIG_AP_MODE
+	_list asoc_list;
+	_list auth_list;
+	_lock asoc_list_lock;
+	_lock auth_list_lock;
+
+	unsigned int auth_to;  //sec, time to expire in authenticating.
+	unsigned int assoc_to; //sec, time to expire before associating.
+	unsigned int expire_to; //sec , time to expire after associated.
+	
+	/* pointers to STA info; based on allocated AID or NULL if AID free
+	 * AID is in the range 1-2007, so sta_aid[0] corresponders to AID 1
+	 * and so on
+	 */
+	struct sta_info *sta_aid[NUM_STA];
+
+	u16 sta_dz_bitmap;//only support 15 stations, staion aid bitmap for sleeping sta.
+	u16 tim_bitmap;//only support 15 stations, aid=0~15 mapping bit0~bit15	
+
+	u16 max_num_sta;
+#endif		
+	
+};
+
+
+__inline static u32 wifi_mac_hash(u8 *mac)
+{
+        u32 x;
+
+        x = mac[0];
+        x = (x << 2) ^ mac[1];
+        x = (x << 2) ^ mac[2];
+        x = (x << 2) ^ mac[3];
+        x = (x << 2) ^ mac[4];
+        x = (x << 2) ^ mac[5];
+
+        x ^= x >> 8;
+        x  = x & (NUM_STA - 1);
+		
+        return x;
+}
+
+
+extern u32	_rtw_init_sta_priv(struct sta_priv *pstapriv);
+extern u32	_rtw_free_sta_priv(struct sta_priv *pstapriv);
+extern struct sta_info *rtw_alloc_stainfo(struct	sta_priv *pstapriv, u8 *hwaddr);
+extern u32	rtw_free_stainfo(_adapter *padapter , struct sta_info *psta);
+extern void rtw_free_all_stainfo(_adapter *padapter);
+extern struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, u8 *hwaddr);
+extern u32 rtw_init_bcmc_stainfo(_adapter* padapter);
+extern struct sta_info* rtw_get_bcmc_stainfo(_adapter* padapter);
+extern u8 rtw_access_ctrl(struct wlan_acl_pool* pacl_list, u8 * mac_addr);
+
+#endif //_STA_INFO_H_
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/usb_hal.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/usb_hal.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/usb_hal.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/usb_hal.h	2017-09-23 03:42:50.062674930 +0800
@@ -0,0 +1,30 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef __USB_HAL_H__
+#define __USB_HAL_H__
+
+
+void rtl8192cu_set_hal_ops(_adapter * padapter);
+
+void rtl8192du_set_hal_ops(_adapter * padapter);
+
+#endif //__USB_HAL_H__
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/usb_ops.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/usb_ops.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/usb_ops.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/usb_ops.h	2017-09-23 03:42:50.062674930 +0800
@@ -0,0 +1,100 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef __USB_OPS_H_
+#define __USB_OPS_H_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <osdep_intf.h>
+
+#define REALTEK_USB_VENQT_READ		0xC0
+#define REALTEK_USB_VENQT_WRITE		0x40
+#define REALTEK_USB_VENQT_CMD_REQ	0x05
+#define REALTEK_USB_VENQT_CMD_IDX	0x00
+
+enum{
+	VENDOR_WRITE = 0x00,
+	VENDOR_READ = 0x01,
+};
+#define ALIGNMENT_UNIT				16
+#define MAX_VENDOR_REQ_CMD_SIZE	254		//8188cu SIE Support
+#define MAX_USB_IO_CTL_SIZE		(MAX_VENDOR_REQ_CMD_SIZE +ALIGNMENT_UNIT)
+
+#ifdef PLATFORM_LINUX
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12)) 
+#define rtw_usb_control_msg(dev, pipe, request, requesttype, value, index, data, size, timeout_ms) \
+	usb_control_msg((dev), (pipe), (request), (requesttype), (value), (index), (data), (size), (timeout_ms)) 
+#define rtw_usb_bulk_msg(usb_dev, pipe, data, len, actual_length, timeout_ms) \
+	usb_bulk_msg((usb_dev), (pipe), (data), (len), (actual_length), (timeout_ms))
+#else
+#define rtw_usb_control_msg(dev, pipe, request, requesttype, value, index, data, size,timeout_ms) \
+	usb_control_msg((dev), (pipe), (request), (requesttype), (value), (index), (data), (size), \
+		((timeout_ms) == 0) ||((timeout_ms)*HZ/1000>0)?((timeout_ms)*HZ/1000):1) 
+#define rtw_usb_bulk_msg(usb_dev, pipe, data, len, actual_length, timeout_ms) \
+	usb_bulk_msg((usb_dev), (pipe), (data), (len), (actual_length), \
+		((timeout_ms) == 0) ||((timeout_ms)*HZ/1000>0)?((timeout_ms)*HZ/1000):1) 
+#endif
+#endif //PLATFORM_LINUX
+
+#ifdef CONFIG_RTL8192C
+void rtl8192cu_set_intf_ops(struct _io_ops *pops);
+
+void rtl8192cu_recv_tasklet(void *priv);
+
+void rtl8192cu_xmit_tasklet(void *priv);
+#endif
+
+#ifdef CONFIG_RTL8192D
+void rtl8192du_set_intf_ops(struct _io_ops *pops);
+
+void rtl8192du_recv_tasklet(void *priv);
+
+void rtl8192du_xmit_tasklet(void *priv);
+#endif
+
+/*
+* Increase and check if the continual_urb_error of this @param dvobjprive is larger than MAX_CONTINUAL_URB_ERR
+* @return _TRUE:
+* @return _FALSE:
+*/
+static inline int rtw_inc_and_chk_continual_urb_error(struct dvobj_priv *dvobjpriv)
+{
+	int ret = _FALSE;
+	int value;
+	if( (value=ATOMIC_INC_RETURN(&dvobjpriv->continual_urb_error)) > MAX_CONTINUAL_URB_ERR) {
+		DBG_871X("[dvobjpriv:%p][ERROR] continual_urb_error:%d > %d\n", dvobjpriv, value, MAX_CONTINUAL_URB_ERR);
+		ret = _TRUE;
+	} else {
+		//DBG_871X("[dvobjpriv:%p] continual_urb_error:%d\n", dvobjpriv, value);
+	}
+	return ret;
+}
+
+/*
+* Set the continual_urb_error of this @param dvobjprive to 0
+*/
+static inline void rtw_reset_continual_urb_error(struct dvobj_priv *dvobjpriv)
+{
+	ATOMIC_SET(&dvobjpriv->continual_urb_error, 0);	
+}
+
+#endif //__USB_OPS_H_
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/usb_osintf.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/usb_osintf.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/usb_osintf.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/usb_osintf.h	2017-09-23 03:42:50.062674930 +0800
@@ -0,0 +1,39 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef __USB_OSINTF_H
+#define __USB_OSINTF_H
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <usb_vendor_req.h>
+
+#define USBD_HALTED(Status) ((ULONG)(Status) >> 30 == 3)
+
+
+//uint usb_dvobj_init(_adapter * adapter);
+//void usb_dvobj_deinit(_adapter * adapter);
+
+u8 usbvendorrequest(struct dvobj_priv *pdvobjpriv, RT_USB_BREQUEST brequest, RT_USB_WVALUE wvalue, u8 windex, void* data, u8 datalen, u8 isdirectionin);
+
+
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/usb_vendor_req.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/usb_vendor_req.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/usb_vendor_req.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/usb_vendor_req.h	2017-09-23 03:42:50.062674930 +0800
@@ -0,0 +1,60 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef _USB_VENDOR_REQUEST_H_
+#define _USB_VENDOR_REQUEST_H_
+
+//4	Set/Get Register related wIndex/Data
+#define	RT_USB_RESET_MASK_OFF		0
+#define	RT_USB_RESET_MASK_ON		1
+#define	RT_USB_SLEEP_MASK_OFF		0
+#define	RT_USB_SLEEP_MASK_ON		1
+#define	RT_USB_LDO_ON				1
+#define	RT_USB_LDO_OFF				0
+
+//4	Set/Get SYSCLK related	wValue or Data
+#define	RT_USB_SYSCLK_32KHZ		0
+#define	RT_USB_SYSCLK_40MHZ		1
+#define	RT_USB_SYSCLK_60MHZ		2
+
+
+typedef enum _RT_USB_BREQUEST {
+	RT_USB_SET_REGISTER		= 1,
+	RT_USB_SET_SYSCLK		= 2,
+	RT_USB_GET_SYSCLK		= 3,
+	RT_USB_GET_REGISTER		= 4
+} RT_USB_BREQUEST;
+
+
+typedef enum _RT_USB_WVALUE {
+	RT_USB_RESET_MASK	=	1,
+	RT_USB_SLEEP_MASK	=	2,
+	RT_USB_USB_HRCPWM	=	3,
+	RT_USB_LDO			=	4,
+	RT_USB_BOOT_TYPE	=	5
+} RT_USB_WVALUE;
+
+
+//BOOLEAN usbvendorrequest(PCE_USB_DEVICE	CEdevice, RT_USB_BREQUEST bRequest, RT_USB_WVALUE wValue, UCHAR wIndex, PVOID Data, UCHAR DataLength, BOOLEAN isDirectionIn);
+//BOOLEAN CEusbGetStatusRequest(PCE_USB_DEVICE CEdevice, IN USHORT Op, IN USHORT Index, PVOID Data);
+//BOOLEAN CEusbFeatureRequest(PCE_USB_DEVICE CEdevice, IN USHORT Op, IN USHORT FeatureSelector, IN USHORT Index);
+//BOOLEAN CEusbGetDescriptorRequest(PCE_USB_DEVICE CEdevice, IN short urbLength, IN UCHAR DescriptorType, IN UCHAR Index, IN USHORT LanguageId, IN PVOID  TransferBuffer, IN ULONG TransferBufferLength);
+
+#endif
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/wifi.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/wifi.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/wifi.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/wifi.h	2017-09-23 03:42:50.062674930 +0800
@@ -0,0 +1,1173 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef _WIFI_H_
+#define _WIFI_H_
+
+#include <rtw_byteorder.h>
+
+#ifdef BIT
+//#error	"BIT define occurred earlier elsewhere!\n"
+#undef BIT
+#endif
+#define BIT(x)	(1 << (x))
+
+
+#define WLAN_ETHHDR_LEN		14
+#define WLAN_ETHADDR_LEN	6
+#define WLAN_IEEE_OUI_LEN	3
+#define WLAN_ADDR_LEN		6
+#define WLAN_CRC_LEN		4
+#define WLAN_BSSID_LEN		6
+#define WLAN_BSS_TS_LEN		8
+#define WLAN_HDR_A3_LEN		24
+#define WLAN_HDR_A4_LEN		30
+#define WLAN_HDR_A3_QOS_LEN	26
+#define WLAN_HDR_A4_QOS_LEN	32
+#define WLAN_SSID_MAXLEN	32
+#define WLAN_DATA_MAXLEN	2312
+
+#define WLAN_A3_PN_OFFSET	24
+#define WLAN_A4_PN_OFFSET	30
+
+#define WLAN_MIN_ETHFRM_LEN	60
+#define WLAN_MAX_ETHFRM_LEN	1514
+#define WLAN_ETHHDR_LEN		14
+
+#define P80211CAPTURE_VERSION	0x80211001
+
+#ifdef GREEN_HILL
+#pragma pack(1)
+#endif
+
+enum WIFI_FRAME_TYPE {
+	WIFI_MGT_TYPE  =	(0),
+	WIFI_CTRL_TYPE =	(BIT(2)),
+	WIFI_DATA_TYPE =	(BIT(3)),
+	WIFI_QOS_DATA_TYPE	= (BIT(7)|BIT(3)),	//!< QoS Data	
+};
+
+enum WIFI_FRAME_SUBTYPE {
+
+    // below is for mgt frame
+    WIFI_ASSOCREQ       = (0 | WIFI_MGT_TYPE),
+    WIFI_ASSOCRSP       = (BIT(4) | WIFI_MGT_TYPE),
+    WIFI_REASSOCREQ     = (BIT(5) | WIFI_MGT_TYPE),
+    WIFI_REASSOCRSP     = (BIT(5) | BIT(4) | WIFI_MGT_TYPE),
+    WIFI_PROBEREQ       = (BIT(6) | WIFI_MGT_TYPE),
+    WIFI_PROBERSP       = (BIT(6) | BIT(4) | WIFI_MGT_TYPE),
+    WIFI_BEACON         = (BIT(7) | WIFI_MGT_TYPE),
+    WIFI_ATIM           = (BIT(7) | BIT(4) | WIFI_MGT_TYPE),
+    WIFI_DISASSOC       = (BIT(7) | BIT(5) | WIFI_MGT_TYPE),
+    WIFI_AUTH           = (BIT(7) | BIT(5) | BIT(4) | WIFI_MGT_TYPE),
+    WIFI_DEAUTH         = (BIT(7) | BIT(6) | WIFI_MGT_TYPE),
+    WIFI_ACTION         = (BIT(7) | BIT(6) | BIT(4) | WIFI_MGT_TYPE),
+
+    // below is for control frame
+    WIFI_PSPOLL         = (BIT(7) | BIT(5) | WIFI_CTRL_TYPE),
+    WIFI_RTS            = (BIT(7) | BIT(5) | BIT(4) | WIFI_CTRL_TYPE),
+    WIFI_CTS            = (BIT(7) | BIT(6) | WIFI_CTRL_TYPE),
+    WIFI_ACK            = (BIT(7) | BIT(6) | BIT(4) | WIFI_CTRL_TYPE),
+    WIFI_CFEND          = (BIT(7) | BIT(6) | BIT(5) | WIFI_CTRL_TYPE),
+    WIFI_CFEND_CFACK    = (BIT(7) | BIT(6) | BIT(5) | BIT(4) | WIFI_CTRL_TYPE),
+
+    // below is for data frame
+    WIFI_DATA           = (0 | WIFI_DATA_TYPE),
+    WIFI_DATA_CFACK     = (BIT(4) | WIFI_DATA_TYPE),
+    WIFI_DATA_CFPOLL    = (BIT(5) | WIFI_DATA_TYPE),
+    WIFI_DATA_CFACKPOLL = (BIT(5) | BIT(4) | WIFI_DATA_TYPE),
+    WIFI_DATA_NULL      = (BIT(6) | WIFI_DATA_TYPE),
+    WIFI_CF_ACK         = (BIT(6) | BIT(4) | WIFI_DATA_TYPE),
+    WIFI_CF_POLL        = (BIT(6) | BIT(5) | WIFI_DATA_TYPE),
+    WIFI_CF_ACKPOLL     = (BIT(6) | BIT(5) | BIT(4) | WIFI_DATA_TYPE),
+    WIFI_QOS_DATA_NULL	= (BIT(6) | WIFI_QOS_DATA_TYPE),
+};
+
+enum WIFI_REASON_CODE	{
+	_RSON_RESERVED_					= 0,
+	_RSON_UNSPECIFIED_				= 1,
+	_RSON_AUTH_NO_LONGER_VALID_		= 2,
+	_RSON_DEAUTH_STA_LEAVING_		= 3,
+	_RSON_INACTIVITY_				= 4,
+	_RSON_UNABLE_HANDLE_			= 5,
+	_RSON_CLS2_						= 6,
+	_RSON_CLS3_						= 7,
+	_RSON_DISAOC_STA_LEAVING_		= 8,
+	_RSON_ASOC_NOT_AUTH_			= 9,
+
+	// WPA reason
+	_RSON_INVALID_IE_				= 13,
+	_RSON_MIC_FAILURE_				= 14,
+	_RSON_4WAY_HNDSHK_TIMEOUT_		= 15,
+	_RSON_GROUP_KEY_UPDATE_TIMEOUT_	= 16,
+	_RSON_DIFF_IE_					= 17,
+	_RSON_MLTCST_CIPHER_NOT_VALID_	= 18,
+	_RSON_UNICST_CIPHER_NOT_VALID_	= 19,
+	_RSON_AKMP_NOT_VALID_			= 20,
+	_RSON_UNSUPPORT_RSNE_VER_		= 21,
+	_RSON_INVALID_RSNE_CAP_			= 22,
+	_RSON_IEEE_802DOT1X_AUTH_FAIL_	= 23,
+
+	//belowing are Realtek definition
+	_RSON_PMK_NOT_AVAILABLE_		= 24,
+	_RSON_TDLS_TEAR_TOOFAR_			= 25,
+	_RSON_TDLS_TEAR_UN_RSN_			= 26,
+};
+
+/* Reason codes (IEEE 802.11-2007, 7.3.1.7, Table 7-22) */
+#if 0
+#define WLAN_REASON_UNSPECIFIED 1
+#define WLAN_REASON_PREV_AUTH_NOT_VALID 2
+#define WLAN_REASON_DEAUTH_LEAVING 3
+#define WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY 4
+#define WLAN_REASON_DISASSOC_AP_BUSY 5
+#define WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA 6
+#define WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA 7
+#define WLAN_REASON_DISASSOC_STA_HAS_LEFT 8
+#define WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH 9
+#endif
+/* IEEE 802.11h */
+#define WLAN_REASON_PWR_CAPABILITY_NOT_VALID 10
+#define WLAN_REASON_SUPPORTED_CHANNEL_NOT_VALID 11
+#if 0
+/* IEEE 802.11i */
+#define WLAN_REASON_INVALID_IE 13
+#define WLAN_REASON_MICHAEL_MIC_FAILURE 14
+#define WLAN_REASON_4WAY_HANDSHAKE_TIMEOUT 15
+#define WLAN_REASON_GROUP_KEY_UPDATE_TIMEOUT 16
+#define WLAN_REASON_IE_IN_4WAY_DIFFERS 17
+#define WLAN_REASON_GROUP_CIPHER_NOT_VALID 18
+#define WLAN_REASON_PAIRWISE_CIPHER_NOT_VALID 19
+#define WLAN_REASON_AKMP_NOT_VALID 20
+#define WLAN_REASON_UNSUPPORTED_RSN_IE_VERSION 21
+#define WLAN_REASON_INVALID_RSN_IE_CAPAB 22
+#define WLAN_REASON_IEEE_802_1X_AUTH_FAILED 23
+#define WLAN_REASON_CIPHER_SUITE_REJECTED 24
+#endif
+
+enum WIFI_STATUS_CODE {
+	_STATS_SUCCESSFUL_			= 0,
+	_STATS_FAILURE_				= 1,
+	_STATS_CAP_FAIL_			= 10,
+	_STATS_NO_ASOC_				= 11,
+	_STATS_OTHER_				= 12,
+	_STATS_NO_SUPP_ALG_			= 13,
+	_STATS_OUT_OF_AUTH_SEQ_		= 14,
+	_STATS_CHALLENGE_FAIL_		= 15,
+	_STATS_AUTH_TIMEOUT_		= 16,
+	_STATS_UNABLE_HANDLE_STA_	= 17,
+	_STATS_RATE_FAIL_			= 18,
+};
+
+/* Status codes (IEEE 802.11-2007, 7.3.1.9, Table 7-23) */
+#if 0
+#define WLAN_STATUS_SUCCESS 0
+#define WLAN_STATUS_UNSPECIFIED_FAILURE 1
+#define WLAN_STATUS_CAPS_UNSUPPORTED 10
+#define WLAN_STATUS_REASSOC_NO_ASSOC 11
+#define WLAN_STATUS_ASSOC_DENIED_UNSPEC 12
+#define WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG 13
+#define WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION 14
+#define WLAN_STATUS_CHALLENGE_FAIL 15
+#define WLAN_STATUS_AUTH_TIMEOUT 16
+#define WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA 17
+#define WLAN_STATUS_ASSOC_DENIED_RATES 18
+#endif
+//entended 
+/* IEEE 802.11b */
+#define WLAN_STATUS_ASSOC_DENIED_NOSHORT 19
+#define WLAN_STATUS_ASSOC_DENIED_NOPBCC 20
+#define WLAN_STATUS_ASSOC_DENIED_NOAGILITY 21
+/* IEEE 802.11h */
+#define WLAN_STATUS_SPEC_MGMT_REQUIRED 22
+#define WLAN_STATUS_PWR_CAPABILITY_NOT_VALID 23
+#define WLAN_STATUS_SUPPORTED_CHANNEL_NOT_VALID 24
+/* IEEE 802.11g */
+#define WLAN_STATUS_ASSOC_DENIED_NO_SHORT_SLOT_TIME 25
+#define WLAN_STATUS_ASSOC_DENIED_NO_ER_PBCC 26
+#define WLAN_STATUS_ASSOC_DENIED_NO_DSSS_OFDM 27
+/* IEEE 802.11w */
+#define WLAN_STATUS_ASSOC_REJECTED_TEMPORARILY 30
+#define WLAN_STATUS_ROBUST_MGMT_FRAME_POLICY_VIOLATION 31
+/* IEEE 802.11i */
+#define WLAN_STATUS_INVALID_IE 40
+#define WLAN_STATUS_GROUP_CIPHER_NOT_VALID 41
+#define WLAN_STATUS_PAIRWISE_CIPHER_NOT_VALID 42
+#define WLAN_STATUS_AKMP_NOT_VALID 43
+#define WLAN_STATUS_UNSUPPORTED_RSN_IE_VERSION 44
+#define WLAN_STATUS_INVALID_RSN_IE_CAPAB 45
+#define WLAN_STATUS_CIPHER_REJECTED_PER_POLICY 46
+#define WLAN_STATUS_TS_NOT_CREATED 47
+#define WLAN_STATUS_DIRECT_LINK_NOT_ALLOWED 48
+#define WLAN_STATUS_DEST_STA_NOT_PRESENT 49
+#define WLAN_STATUS_DEST_STA_NOT_QOS_STA 50
+#define WLAN_STATUS_ASSOC_DENIED_LISTEN_INT_TOO_LARGE 51
+/* IEEE 802.11r */
+#define WLAN_STATUS_INVALID_FT_ACTION_FRAME_COUNT 52
+#define WLAN_STATUS_INVALID_PMKID 53
+#define WLAN_STATUS_INVALID_MDIE 54
+#define WLAN_STATUS_INVALID_FTIE 55
+
+
+enum WIFI_REG_DOMAIN {
+	DOMAIN_FCC		= 1,
+	DOMAIN_IC		= 2,
+	DOMAIN_ETSI		= 3,
+	DOMAIN_SPAIN	= 4,
+	DOMAIN_FRANCE	= 5,
+	DOMAIN_MKK		= 6,
+	DOMAIN_ISRAEL	= 7,
+	DOMAIN_MKK1		= 8,
+	DOMAIN_MKK2		= 9,
+	DOMAIN_MKK3		= 10,
+	DOMAIN_MAX
+};
+
+#define _TO_DS_		BIT(8)
+#define _FROM_DS_	BIT(9)
+#define _MORE_FRAG_	BIT(10)
+#define _RETRY_		BIT(11)
+#define _PWRMGT_	BIT(12)
+#define _MORE_DATA_	BIT(13)
+#define _PRIVACY_	BIT(14)
+#define _ORDER_			BIT(15)
+
+#define SetToDs(pbuf)	\
+	do	{	\
+		*(unsigned short *)(pbuf) |= cpu_to_le16(_TO_DS_); \
+	} while(0)
+
+#define GetToDs(pbuf)	(((*(unsigned short *)(pbuf)) & le16_to_cpu(_TO_DS_)) != 0)
+
+#define ClearToDs(pbuf)	\
+	do	{	\
+		*(unsigned short *)(pbuf) &= (~cpu_to_le16(_TO_DS_)); \
+	} while(0)
+
+#define SetFrDs(pbuf)	\
+	do	{	\
+		*(unsigned short *)(pbuf) |= cpu_to_le16(_FROM_DS_); \
+	} while(0)
+
+#define GetFrDs(pbuf)	(((*(unsigned short *)(pbuf)) & le16_to_cpu(_FROM_DS_)) != 0)
+
+#define ClearFrDs(pbuf)	\
+	do	{	\
+		*(unsigned short *)(pbuf) &= (~cpu_to_le16(_FROM_DS_)); \
+	} while(0)
+
+#define get_tofr_ds(pframe)	((GetToDs(pframe) << 1) | GetFrDs(pframe))
+
+
+#define SetMFrag(pbuf)	\
+	do	{	\
+		*(unsigned short *)(pbuf) |= cpu_to_le16(_MORE_FRAG_); \
+	} while(0)
+
+#define GetMFrag(pbuf)	(((*(unsigned short *)(pbuf)) & le16_to_cpu(_MORE_FRAG_)) != 0)
+
+#define ClearMFrag(pbuf)	\
+	do	{	\
+		*(unsigned short *)(pbuf) &= (~cpu_to_le16(_MORE_FRAG_)); \
+	} while(0)
+
+#define SetRetry(pbuf)	\
+	do	{	\
+		*(unsigned short *)(pbuf) |= cpu_to_le16(_RETRY_); \
+	} while(0)
+
+#define GetRetry(pbuf)	(((*(unsigned short *)(pbuf)) & le16_to_cpu(_RETRY_)) != 0)
+
+#define ClearRetry(pbuf)	\
+	do	{	\
+		*(unsigned short *)(pbuf) &= (~cpu_to_le16(_RETRY_)); \
+	} while(0)
+
+#define SetPwrMgt(pbuf)	\
+	do	{	\
+		*(unsigned short *)(pbuf) |= cpu_to_le16(_PWRMGT_); \
+	} while(0)
+
+#define GetPwrMgt(pbuf)	(((*(unsigned short *)(pbuf)) & le16_to_cpu(_PWRMGT_)) != 0)
+
+#define ClearPwrMgt(pbuf)	\
+	do	{	\
+		*(unsigned short *)(pbuf) &= (~cpu_to_le16(_PWRMGT_)); \
+	} while(0)
+
+#define SetMData(pbuf)	\
+	do	{	\
+		*(unsigned short *)(pbuf) |= cpu_to_le16(_MORE_DATA_); \
+	} while(0)
+
+#define GetMData(pbuf)	(((*(unsigned short *)(pbuf)) & le16_to_cpu(_MORE_DATA_)) != 0)
+
+#define ClearMData(pbuf)	\
+	do	{	\
+		*(unsigned short *)(pbuf) &= (~cpu_to_le16(_MORE_DATA_)); \
+	} while(0)
+
+#define SetPrivacy(pbuf)	\
+	do	{	\
+		*(unsigned short *)(pbuf) |= cpu_to_le16(_PRIVACY_); \
+	} while(0)
+
+#define GetPrivacy(pbuf)	(((*(unsigned short *)(pbuf)) & le16_to_cpu(_PRIVACY_)) != 0)
+
+#define ClearPrivacy(pbuf)	\
+	do	{	\
+		*(unsigned short *)(pbuf) &= (~cpu_to_le16(_PRIVACY_)); \
+	} while(0)
+
+
+#define GetOrder(pbuf)	(((*(unsigned short *)(pbuf)) & le16_to_cpu(_ORDER_)) != 0)
+
+#define GetFrameType(pbuf)	(le16_to_cpu(*(unsigned short *)(pbuf)) & (BIT(3) | BIT(2)))
+
+#define SetFrameType(pbuf,type)	\
+	do { 	\
+		*(unsigned short *)(pbuf) &= __constant_cpu_to_le16(~(BIT(3) | BIT(2))); \
+		*(unsigned short *)(pbuf) |= __constant_cpu_to_le16(type); \
+	} while(0)
+
+#define GetFrameSubType(pbuf)	(cpu_to_le16(*(unsigned short *)(pbuf)) & (BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2)))
+
+#define SetFrameSubType(pbuf,type) \
+	do {    \
+		*(unsigned short *)(pbuf) &= cpu_to_le16(~(BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2))); \
+		*(unsigned short *)(pbuf) |= cpu_to_le16(type); \
+	} while(0)
+
+#define GetSequence(pbuf)	(cpu_to_le16(*(unsigned short *)((SIZE_PTR)(pbuf) + 22)) >> 4)
+
+#define GetFragNum(pbuf)	(cpu_to_le16(*(unsigned short *)((SIZE_PTR)(pbuf) + 22)) & 0x0f)
+
+#define GetTupleCache(pbuf)	(cpu_to_le16(*(unsigned short *)((SIZE_PTR)(pbuf) + 22)))
+
+#define SetFragNum(pbuf, num) \
+	do {    \
+		*(unsigned short *)((SIZE_PTR)(pbuf) + 22) = \
+			((*(unsigned short *)((SIZE_PTR)(pbuf) + 22)) & le16_to_cpu(~(0x000f))) | \
+			cpu_to_le16(0x0f & (num));     \
+	} while(0)
+
+#define SetSeqNum(pbuf, num) \
+	do {    \
+		*(unsigned short *)((SIZE_PTR)(pbuf) + 22) = \
+			((*(unsigned short *)((SIZE_PTR)(pbuf) + 22)) & le16_to_cpu((unsigned short)~0xfff0)) | \
+			le16_to_cpu((unsigned short)(0xfff0 & (num << 4))); \
+	} while(0)
+
+#define SetDuration(pbuf, dur) \
+	do {    \
+		*(unsigned short *)((SIZE_PTR)(pbuf) + 2) = cpu_to_le16(0xffff & (dur)); \
+	} while(0)
+
+
+#define SetPriority(pbuf, tid)	\
+	do	{	\
+		*(unsigned short *)(pbuf) |= cpu_to_le16(tid & 0xf); \
+	} while(0)
+
+#define GetPriority(pbuf)	((le16_to_cpu(*(unsigned short *)(pbuf))) & 0xf)
+
+#define SetEOSP(pbuf, eosp)	\
+	do	{	\
+		*(unsigned short *)(pbuf) |= cpu_to_le16( (eosp & 1) << 4); \
+	} while(0)
+
+#define SetAckpolicy(pbuf, ack)	\
+	do	{	\
+		*(unsigned short *)(pbuf) |= cpu_to_le16( (ack & 3) << 5); \
+	} while(0)
+
+#define GetAckpolicy(pbuf) (((le16_to_cpu(*(unsigned short *)pbuf)) >> 5) & 0x3)
+
+#define GetAMsdu(pbuf) (((le16_to_cpu(*(unsigned short *)pbuf)) >> 7) & 0x1)
+
+#define SetAMsdu(pbuf, amsdu)	\
+	do	{	\
+		*(unsigned short *)(pbuf) |= cpu_to_le16( (amsdu & 1) << 7); \
+	} while(0)	
+
+#define GetAid(pbuf)	(cpu_to_le16(*(unsigned short *)((SIZE_PTR)(pbuf) + 2)) & 0x3fff)
+
+#define GetTid(pbuf)	(cpu_to_le16(*(unsigned short *)((SIZE_PTR)(pbuf) + (((GetToDs(pbuf)<<1)|GetFrDs(pbuf))==3?30:24))) & 0x000f)
+
+#define GetAddr1Ptr(pbuf)	((unsigned char *)((SIZE_PTR)(pbuf) + 4))
+
+#define GetAddr2Ptr(pbuf)	((unsigned char *)((SIZE_PTR)(pbuf) + 10))
+
+#define GetAddr3Ptr(pbuf)	((unsigned char *)((SIZE_PTR)(pbuf) + 16))
+
+#define GetAddr4Ptr(pbuf)	((unsigned char *)((SIZE_PTR)(pbuf) + 24))
+
+#define MacAddr_isBcst(addr) \
+( \
+	( (addr[0] == 0xff) && (addr[1] == 0xff) && \
+		(addr[2] == 0xff) && (addr[3] == 0xff) && \
+		(addr[4] == 0xff) && (addr[5] == 0xff) )  ? _TRUE : _FALSE \
+)
+
+__inline static int IS_MCAST(unsigned char *da)
+{
+	if ((*da) & 0x01)
+		return _TRUE;
+	else
+		return _FALSE;
+}
+
+
+__inline static unsigned char * get_da(unsigned char *pframe)
+{
+	unsigned char 	*da;
+	unsigned int	to_fr_ds	= (GetToDs(pframe) << 1) | GetFrDs(pframe);
+
+	switch (to_fr_ds) {
+		case 0x00:	// ToDs=0, FromDs=0
+			da = GetAddr1Ptr(pframe);
+			break;
+		case 0x01:	// ToDs=0, FromDs=1
+			da = GetAddr1Ptr(pframe);
+			break;
+		case 0x02:	// ToDs=1, FromDs=0
+			da = GetAddr3Ptr(pframe);
+			break;
+		default:	// ToDs=1, FromDs=1
+			da = GetAddr3Ptr(pframe);
+			break;
+	}
+
+	return da;
+}
+
+
+__inline static unsigned char * get_sa(unsigned char *pframe)
+{
+	unsigned char 	*sa;
+	unsigned int	to_fr_ds	= (GetToDs(pframe) << 1) | GetFrDs(pframe);
+
+	switch (to_fr_ds) {
+		case 0x00:	// ToDs=0, FromDs=0
+			sa = GetAddr2Ptr(pframe);
+			break;
+		case 0x01:	// ToDs=0, FromDs=1
+			sa = GetAddr3Ptr(pframe);
+			break;
+		case 0x02:	// ToDs=1, FromDs=0
+			sa = GetAddr2Ptr(pframe);
+			break;
+		default:	// ToDs=1, FromDs=1
+			sa = GetAddr4Ptr(pframe);
+			break;
+	}
+
+	return sa;
+}
+
+__inline static unsigned char * get_hdr_bssid(unsigned char *pframe)
+{
+	unsigned char 	*sa;
+	unsigned int	to_fr_ds	= (GetToDs(pframe) << 1) | GetFrDs(pframe);
+
+	switch (to_fr_ds) {
+		case 0x00:	// ToDs=0, FromDs=0
+			sa = GetAddr3Ptr(pframe);
+			break;
+		case 0x01:	// ToDs=0, FromDs=1
+			sa = GetAddr2Ptr(pframe);
+			break;
+		case 0x02:	// ToDs=1, FromDs=0
+			sa = GetAddr1Ptr(pframe);
+			break;
+		case 0x03:	// ToDs=1, FromDs=1
+			sa = GetAddr1Ptr(pframe);
+			break;
+		default:	
+			sa =NULL; //???????
+			break;
+	}
+
+	return sa;
+}
+
+
+__inline static int IsFrameTypeCtrl(unsigned char *pframe)
+{
+	if(WIFI_CTRL_TYPE == GetFrameType(pframe))
+		return _TRUE;
+	else
+		return _FALSE;
+}
+/*-----------------------------------------------------------------------------
+			Below is for the security related definition
+------------------------------------------------------------------------------*/
+#define _RESERVED_FRAME_TYPE_	0
+#define _SKB_FRAME_TYPE_		2
+#define _PRE_ALLOCMEM_			1
+#define _PRE_ALLOCHDR_			3
+#define _PRE_ALLOCLLCHDR_		4
+#define _PRE_ALLOCICVHDR_		5
+#define _PRE_ALLOCMICHDR_		6
+
+#define _SIFSTIME_				((priv->pmib->dot11BssType.net_work_type&WIRELESS_11A)?16:10)
+#define _ACKCTSLNG_				14	//14 bytes long, including crclng
+#define _CRCLNG_				4
+
+#define _ASOCREQ_IE_OFFSET_		4	// excluding wlan_hdr
+#define	_ASOCRSP_IE_OFFSET_		6
+#define _REASOCREQ_IE_OFFSET_	10
+#define _REASOCRSP_IE_OFFSET_	6
+#define _PROBEREQ_IE_OFFSET_	0
+#define	_PROBERSP_IE_OFFSET_	12
+#define _AUTH_IE_OFFSET_		6
+#define _DEAUTH_IE_OFFSET_		0
+#define _BEACON_IE_OFFSET_		12
+#define _PUBLIC_ACTION_IE_OFFSET_	8
+
+#define _FIXED_IE_LENGTH_			_BEACON_IE_OFFSET_
+
+#define _SSID_IE_				0
+#define _SUPPORTEDRATES_IE_	1
+#define _DSSET_IE_				3
+#define _TIM_IE_					5
+#define _IBSS_PARA_IE_			6
+#define _COUNTRY_IE_			7
+#define _CHLGETXT_IE_			16
+#define _SUPPORTED_CH_IE_		36
+#define _CH_SWTICH_ANNOUNCE_	37	//Secondary Channel Offset
+#define _RSN_IE_2_				48
+#define _SSN_IE_1_					221
+#define _ERPINFO_IE_			42
+#define _EXT_SUPPORTEDRATES_IE_	50
+
+#define _HT_CAPABILITY_IE_			45
+#define _FTIE_						55
+#define _TIMEOUT_ITVL_IE_			56
+#define _HT_EXTRA_INFO_IE_			61
+#define _HT_ADD_INFO_IE_			61 //_HT_EXTRA_INFO_IE_
+
+#define	EID_BSSCoexistence			72 // 20/40 BSS Coexistence
+#define	EID_BSSIntolerantChlReport	73
+#define _RIC_Descriptor_IE_			75
+
+#define _LINK_ID_IE_					101
+#define _CH_SWITCH_TIMING_		104
+#define _PTI_BUFFER_STATUS_		106
+#define _EXT_CAP_IE_				127
+#define _VENDOR_SPECIFIC_IE_		221
+
+#define	_RESERVED47_				47
+
+/* ---------------------------------------------------------------------------
+					Below is the fixed elements...
+-----------------------------------------------------------------------------*/
+#define _AUTH_ALGM_NUM_			2
+#define _AUTH_SEQ_NUM_			2
+#define _BEACON_ITERVAL_		2
+#define _CAPABILITY_			2
+#define _CURRENT_APADDR_		6
+#define _LISTEN_INTERVAL_		2
+#define _RSON_CODE_				2
+#define _ASOC_ID_				2
+#define _STATUS_CODE_			2
+#define _TIMESTAMP_				8
+
+#define AUTH_ODD_TO				0
+#define AUTH_EVEN_TO			1
+
+#define WLAN_ETHCONV_ENCAP		1
+#define WLAN_ETHCONV_RFC1042	2
+#define WLAN_ETHCONV_8021h		3
+
+#define cap_ESS BIT(0)
+#define cap_IBSS BIT(1)
+#define cap_CFPollable BIT(2)
+#define cap_CFRequest BIT(3)
+#define cap_Privacy BIT(4)
+#define cap_ShortPremble BIT(5)
+#define cap_PBCC	BIT(6)
+#define cap_ChAgility	BIT(7)
+#define cap_SpecMgmt	BIT(8)
+#define cap_QoS	BIT(9)
+#define cap_ShortSlot	BIT(10)
+
+/*-----------------------------------------------------------------------------
+				Below is the definition for 802.11i / 802.1x
+------------------------------------------------------------------------------*/
+#define _IEEE8021X_MGT_			1		// WPA
+#define _IEEE8021X_PSK_			2		// WPA with pre-shared key
+
+/*
+#define _NO_PRIVACY_			0
+#define _WEP_40_PRIVACY_		1
+#define _TKIP_PRIVACY_			2
+#define _WRAP_PRIVACY_			3
+#define _CCMP_PRIVACY_			4
+#define _WEP_104_PRIVACY_		5
+#define _WEP_WPA_MIXED_PRIVACY_ 6	// WEP + WPA
+*/
+				
+/*-----------------------------------------------------------------------------
+				Below is the definition for WMM
+------------------------------------------------------------------------------*/
+#define _WMM_IE_Length_				7  // for WMM STA
+#define _WMM_Para_Element_Length_		24
+
+
+/*-----------------------------------------------------------------------------
+				Below is the definition for 802.11n 
+------------------------------------------------------------------------------*/
+
+/* block-ack parameters */
+#define IEEE80211_ADDBA_PARAM_POLICY_MASK 0x0002
+#define IEEE80211_ADDBA_PARAM_TID_MASK 0x003C
+#define IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK 0xFFA0
+#define IEEE80211_DELBA_PARAM_TID_MASK 0xF000
+#define IEEE80211_DELBA_PARAM_INITIATOR_MASK 0x0800
+
+//#ifdef CONFIG_80211N_HT
+
+#define SetOrderBit(pbuf)	\
+	do	{	\
+		*(unsigned short *)(pbuf) |= cpu_to_le16(_ORDER_); \
+	} while(0)
+
+#define GetOrderBit(pbuf)	(((*(unsigned short *)(pbuf)) & le16_to_cpu(_ORDER_)) != 0)
+
+
+/**
+ * struct ieee80211_bar - HT Block Ack Request
+ *
+ * This structure refers to "HT BlockAckReq" as
+ * described in 802.11n draft section 7.2.1.7.1
+ */
+ #if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8712FW)
+struct ieee80211_bar {
+	unsigned short frame_control;
+	unsigned short duration;
+	unsigned char ra[6];
+	unsigned char ta[6];
+	unsigned short control;
+	unsigned short start_seq_num;
+} __attribute__((packed));
+ #endif
+
+/* 802.11 BAR control masks */
+#define IEEE80211_BAR_CTRL_ACK_POLICY_NORMAL     0x0000
+#define IEEE80211_BAR_CTRL_CBMTID_COMPRESSED_BA  0x0004
+
+
+ #if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8712FW)
+
+ /**
+ * struct ieee80211_ht_cap - HT capabilities
+ *
+ * This structure refers to "HT capabilities element" as
+ * described in 802.11n draft section 7.3.2.52
+ */
+ 
+struct ieee80211_ht_cap {
+	unsigned short 	cap_info;
+	unsigned char 	ampdu_params_info;
+	unsigned char 	supp_mcs_set[16];
+	unsigned short 	extended_ht_cap_info;
+	unsigned int		tx_BF_cap_info;
+	unsigned char	       antenna_selection_info;
+} __attribute__ ((packed));
+
+/**
+ * struct ieee80211_ht_cap - HT additional information
+ *
+ * This structure refers to "HT information element" as
+ * described in 802.11n draft section 7.3.2.53
+ */
+struct ieee80211_ht_addt_info {
+	unsigned char 	control_chan;
+	unsigned char		ht_param;
+	unsigned short	operation_mode;
+	unsigned short	stbc_param;
+	unsigned char		basic_set[16];
+} __attribute__ ((packed));
+
+
+struct HT_caps_element
+{
+	union
+	{ 
+		struct 
+		{ 	
+			unsigned short	HT_caps_info;
+			unsigned char	AMPDU_para;
+			unsigned char	MCS_rate[16];
+			unsigned short	HT_ext_caps;
+			unsigned int	Beamforming_caps;
+			unsigned char	ASEL_caps;
+		} HT_cap_element;
+		unsigned char HT_cap[26];
+	};
+} __attribute__ ((packed));
+
+struct HT_info_element
+{
+	unsigned char	primary_channel;
+	unsigned char	infos[5];
+	unsigned char	MCS_rate[16];
+}  __attribute__ ((packed));
+
+struct AC_param
+{
+	unsigned char		ACI_AIFSN;
+	unsigned char		CW;
+	unsigned short	TXOP_limit;
+}  __attribute__ ((packed));
+
+struct WMM_para_element
+{
+	unsigned char		QoS_info;
+	unsigned char		reserved;
+	struct AC_param	ac_param[4];
+}  __attribute__ ((packed));
+
+struct ADDBA_request
+{
+	unsigned char		dialog_token;
+	unsigned short	BA_para_set;
+	unsigned short	BA_timeout_value;
+	unsigned short	BA_starting_seqctrl;
+}  __attribute__ ((packed));
+
+
+
+#endif
+
+
+#ifdef PLATFORM_WINDOWS
+
+#pragma pack(1)
+
+struct ieee80211_ht_cap {
+	unsigned short 	cap_info;
+	unsigned char 	ampdu_params_info;
+	unsigned char 	supp_mcs_set[16];
+	unsigned short 	extended_ht_cap_info;
+	unsigned int		tx_BF_cap_info;
+	unsigned char	       antenna_selection_info;
+};
+
+
+struct ieee80211_ht_addt_info {
+	unsigned char 	control_chan;
+	unsigned char		ht_param;
+	unsigned short	operation_mode;
+	unsigned short	stbc_param;
+	unsigned char		basic_set[16];
+};
+
+struct HT_caps_element
+{
+	union
+	{ 
+		struct 
+		{ 	
+			unsigned short	HT_caps_info;
+			unsigned char	AMPDU_para;
+			unsigned char	MCS_rate[16];
+			unsigned short	HT_ext_caps;
+			unsigned int	Beamforming_caps;
+			unsigned char	ASEL_caps;
+		} HT_cap_element;
+		unsigned char HT_cap[26];
+	};
+};
+
+struct HT_info_element
+{
+	unsigned char	primary_channel;
+	unsigned char	infos[5];
+	unsigned char	MCS_rate[16];
+};
+
+struct AC_param
+{
+	unsigned char		ACI_AIFSN;
+	unsigned char		CW;
+	unsigned short	TXOP_limit;
+};
+
+struct WMM_para_element
+{
+	unsigned char		QoS_info;
+	unsigned char		reserved;
+	struct AC_param	ac_param[4];
+};
+
+struct ADDBA_request
+{
+	unsigned char		dialog_token;
+	unsigned short	BA_para_set;
+	unsigned short	BA_timeout_value;
+	unsigned short	BA_starting_seqctrl;
+};
+
+
+#pragma pack()
+
+#endif
+
+
+/* 802.11n HT capabilities masks */
+#define IEEE80211_HT_CAP_SUP_WIDTH		0x0002
+#define IEEE80211_HT_CAP_SM_PS			0x000C
+#define IEEE80211_HT_CAP_GRN_FLD		0x0010
+#define IEEE80211_HT_CAP_SGI_20			0x0020
+#define IEEE80211_HT_CAP_SGI_40			0x0040
+#define IEEE80211_HT_CAP_TX_STBC			0x0080
+#define IEEE80211_HT_CAP_RX_STBC		0x0300
+#define IEEE80211_HT_CAP_DELAY_BA		0x0400
+#define IEEE80211_HT_CAP_MAX_AMSDU		0x0800
+#define IEEE80211_HT_CAP_DSSSCCK40		0x1000
+/* 802.11n HT capability AMPDU settings */
+#define IEEE80211_HT_CAP_AMPDU_FACTOR		0x03
+#define IEEE80211_HT_CAP_AMPDU_DENSITY		0x1C
+/* 802.11n HT capability MSC set */
+#define IEEE80211_SUPP_MCS_SET_UEQM		4
+#define IEEE80211_HT_CAP_MAX_STREAMS		4
+#define IEEE80211_SUPP_MCS_SET_LEN		10
+/* maximum streams the spec allows */
+#define IEEE80211_HT_CAP_MCS_TX_DEFINED		0x01
+#define IEEE80211_HT_CAP_MCS_TX_RX_DIFF		0x02
+#define IEEE80211_HT_CAP_MCS_TX_STREAMS		0x0C
+#define IEEE80211_HT_CAP_MCS_TX_UEQM		0x10
+/* 802.11n HT IE masks */
+#define IEEE80211_HT_IE_CHA_SEC_OFFSET		0x03
+#define IEEE80211_HT_IE_CHA_SEC_NONE	 	0x00
+#define IEEE80211_HT_IE_CHA_SEC_ABOVE 		0x01
+#define IEEE80211_HT_IE_CHA_SEC_BELOW 		0x03
+#define IEEE80211_HT_IE_CHA_WIDTH		0x04
+#define IEEE80211_HT_IE_HT_PROTECTION		0x0003
+#define IEEE80211_HT_IE_NON_GF_STA_PRSNT	0x0004
+#define IEEE80211_HT_IE_NON_HT_STA_PRSNT	0x0010
+
+/* block-ack parameters */
+#define IEEE80211_ADDBA_PARAM_POLICY_MASK 0x0002
+#define IEEE80211_ADDBA_PARAM_TID_MASK 0x003C
+#define IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK 0xFFA0
+#define IEEE80211_DELBA_PARAM_TID_MASK 0xF000
+#define IEEE80211_DELBA_PARAM_INITIATOR_MASK 0x0800
+
+/*
+ * A-PMDU buffer sizes
+ * According to IEEE802.11n spec size varies from 8K to 64K (in powers of 2)
+ */
+#define IEEE80211_MIN_AMPDU_BUF 0x8
+#define IEEE80211_MAX_AMPDU_BUF 0x40
+
+
+/* Spatial Multiplexing Power Save Modes */
+#define WLAN_HT_CAP_SM_PS_STATIC		0
+#define WLAN_HT_CAP_SM_PS_DYNAMIC	1
+#define WLAN_HT_CAP_SM_PS_INVALID	2
+#define WLAN_HT_CAP_SM_PS_DISABLED	3
+
+#ifdef CONFIG_AP_MODE
+#define OP_MODE_PURE                    0
+#define OP_MODE_MAY_BE_LEGACY_STAS      1
+#define OP_MODE_20MHZ_HT_STA_ASSOCED    2
+#define OP_MODE_MIXED                   3
+
+#define HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK	((u8) BIT(0) | BIT(1))
+#define HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE		((u8) BIT(0))
+#define HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW		((u8) BIT(0) | BIT(1))
+#define HT_INFO_HT_PARAM_REC_TRANS_CHNL_WIDTH		((u8) BIT(2))
+#define HT_INFO_HT_PARAM_RIFS_MODE			((u8) BIT(3))
+#define HT_INFO_HT_PARAM_CTRL_ACCESS_ONLY		((u8) BIT(4))
+#define HT_INFO_HT_PARAM_SRV_INTERVAL_GRANULARITY	((u8) BIT(5))
+
+#define HT_INFO_OPERATION_MODE_OP_MODE_MASK	\
+		((u16) (0x0001 | 0x0002))
+#define HT_INFO_OPERATION_MODE_OP_MODE_OFFSET		0
+#define HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT	((u8) BIT(2))
+#define HT_INFO_OPERATION_MODE_TRANSMIT_BURST_LIMIT	((u8) BIT(3))
+#define HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT	((u8) BIT(4))
+
+#define HT_INFO_STBC_PARAM_DUAL_BEACON			((u16) BIT(6))
+#define HT_INFO_STBC_PARAM_DUAL_STBC_PROTECT		((u16) BIT(7))
+#define HT_INFO_STBC_PARAM_SECONDARY_BCN		((u16) BIT(8))
+#define HT_INFO_STBC_PARAM_LSIG_TXOP_PROTECT_ALLOWED	((u16) BIT(9))
+#define HT_INFO_STBC_PARAM_PCO_ACTIVE			((u16) BIT(10))
+#define HT_INFO_STBC_PARAM_PCO_PHASE			((u16) BIT(11))
+#endif
+
+
+//#endif
+
+//	===============WPS Section===============
+//	For WPSv1.0
+#define WPSOUI							0x0050f204
+//	WPS attribute ID
+#define WPS_ATTR_VER1					0x104A
+#define WPS_ATTR_SIMPLE_CONF_STATE	0x1044
+#define WPS_ATTR_RESP_TYPE			0x103B
+#define WPS_ATTR_UUID_E				0x1047
+#define WPS_ATTR_MANUFACTURER		0x1021
+#define WPS_ATTR_MODEL_NAME			0x1023
+#define WPS_ATTR_MODEL_NUMBER		0x1024
+#define WPS_ATTR_SERIAL_NUMBER		0x1042
+#define WPS_ATTR_PRIMARY_DEV_TYPE	0x1054
+#define WPS_ATTR_DEVICE_NAME			0x1011
+#define WPS_ATTR_CONF_METHOD			0x1008
+#define WPS_ATTR_RF_BANDS				0x103C
+#define WPS_ATTR_DEVICE_PWID			0x1012
+
+//	Value of WPS attribute "WPS_ATTR_DEVICE_NAME
+#define WPS_MAX_DEVICE_NAME_LEN		32
+
+//	Value of WPS Response Type Attribute
+#define WPS_RESPONSE_TYPE_INFO_ONLY	0x00
+#define WPS_RESPONSE_TYPE_8021X		0x01
+#define WPS_RESPONSE_TYPE_REGISTRAR	0x02
+#define WPS_RESPONSE_TYPE_AP			0x03
+
+//	Value of WPS WiFi Simple Configuration State Attribute
+#define WPS_WSC_STATE_NOT_CONFIG	0x01
+#define WPS_WSC_STATE_CONFIG			0x02
+
+//	Value of WPS Version Attribute
+#define WPS_VERSION_1					0x10
+
+//	Value of WPS Configuration Method Attribute
+#define WPS_CONFIG_METHOD_FLASH		0x0001
+#define WPS_CONFIG_METHOD_ETHERNET	0x0002
+#define WPS_CONFIG_METHOD_LABEL		0x0004
+#define WPS_CONFIG_METHOD_DISPLAY	0x0008
+#define WPS_CONFIG_METHOD_E_NFC		0x0010
+#define WPS_CONFIG_METHOD_I_NFC		0x0020
+#define WPS_CONFIG_METHOD_NFC		0x0040
+#define WPS_CONFIG_METHOD_PBC		0x0080
+#define WPS_CONFIG_METHOD_KEYPAD	0x0100
+#define WPS_CONFIG_METHOD_VPBC		0x0280
+#define WPS_CONFIG_METHOD_PPBC		0x0480
+#define WPS_CONFIG_METHOD_VDISPLAY	0x2008
+#define WPS_CONFIG_METHOD_PDISPLAY	0x4008
+
+//	Value of Category ID of WPS Primary Device Type Attribute
+#define WPS_PDT_CID_MULIT_MEDIA		0x0008
+#define WPS_PDT_CID_RTK_WIDI			0x001E
+
+//	Value of Sub Category ID of WPS Primary Device Type Attribute
+#define WPS_PDT_SCID_MEDIA_SERVER	0x0005
+#define WPS_PDT_SCID_RTK_DMP			0x0001
+
+//	Value of Device Password ID
+#define WPS_DPID_PIN					0x0000
+#define WPS_DPID_USER_SPEC			0x0001
+#define WPS_DPID_MACHINE_SPEC			0x0002
+#define WPS_DPID_REKEY					0x0003
+#define WPS_DPID_PBC					0x0004
+#define WPS_DPID_REGISTRAR_SPEC		0x0005
+
+
+//	=====================P2P Section=====================
+//	For P2P
+#define	P2POUI							0x506F9A09
+
+//	P2P Attribute ID
+#define	P2P_ATTR_STATUS					0x00
+#define	P2P_ATTR_MINOR_REASON_CODE		0x01
+#define	P2P_ATTR_CAPABILITY				0x02
+#define	P2P_ATTR_DEVICE_ID				0x03
+#define	P2P_ATTR_GO_INTENT				0x04
+#define	P2P_ATTR_CONF_TIMEOUT			0x05
+#define	P2P_ATTR_LISTEN_CH				0x06
+#define	P2P_ATTR_GROUP_BSSID				0x07
+#define	P2P_ATTR_EX_LISTEN_TIMING		0x08
+#define	P2P_ATTR_INTENTED_IF_ADDR		0x09
+#define	P2P_ATTR_MANAGEABILITY			0x0A
+#define	P2P_ATTR_CH_LIST					0x0B
+#define	P2P_ATTR_NOA						0x0C
+#define	P2P_ATTR_DEVICE_INFO				0x0D
+#define	P2P_ATTR_GROUP_INFO				0x0E
+#define	P2P_ATTR_GROUP_ID					0x0F
+#define	P2P_ATTR_INTERFACE				0x10
+#define	P2P_ATTR_OPERATING_CH			0x11
+#define	P2P_ATTR_INVITATION_FLAGS		0x12
+
+//	Value of Status Attribute
+#define	P2P_STATUS_SUCCESS						0x00
+#define	P2P_STATUS_FAIL_INFO_UNAVAILABLE		0x01
+#define	P2P_STATUS_FAIL_INCOMPATIBLE_PARAM		0x02
+#define	P2P_STATUS_FAIL_LIMIT_REACHED			0x03
+#define	P2P_STATUS_FAIL_INVALID_PARAM			0x04
+#define	P2P_STATUS_FAIL_REQUEST_UNABLE			0x05
+#define	P2P_STATUS_FAIL_PREVOUS_PROTO_ERR		0x06
+#define	P2P_STATUS_FAIL_NO_COMMON_CH			0x07
+#define	P2P_STATUS_FAIL_UNKNOWN_P2PGROUP		0x08
+#define	P2P_STATUS_FAIL_BOTH_GOINTENT_15		0x09
+#define	P2P_STATUS_FAIL_INCOMPATIBLE_PROVSION	0x0A
+#define	P2P_STATUS_FAIL_USER_REJECT				0x0B
+
+//	Value of Inviation Flags Attribute
+#define	P2P_INVITATION_FLAGS_PERSISTENT			BIT(0)
+
+
+//	Value of Device Capability Bitmap
+#define	P2P_DEVCAP_SERVICE_DISCOVERY		BIT(0)
+#define	P2P_DEVCAP_CLIENT_DISCOVERABILITY	BIT(1)
+#define	P2P_DEVCAP_CONCURRENT_OPERATION	BIT(2)
+#define	P2P_DEVCAP_INFRA_MANAGED			BIT(3)
+#define	P2P_DEVCAP_DEVICE_LIMIT				BIT(4)
+#define	P2P_DEVCAP_INVITATION_PROC			BIT(5)
+
+//	Value of Group Capability Bitmap
+#define	P2P_GRPCAP_GO							BIT(0)
+#define	P2P_GRPCAP_PERSISTENT_GROUP			BIT(1)
+#define	P2P_GRPCAP_GROUP_LIMIT				BIT(2)
+#define	P2P_GRPCAP_INTRABSS					BIT(3)
+#define	P2P_GRPCAP_CROSS_CONN				BIT(4)
+#define	P2P_GRPCAP_PERSISTENT_RECONN		BIT(5)
+#define	P2P_GRPCAP_GROUP_FORMATION			BIT(6)
+
+//	P2P Public Action Frame ( Management Frame )
+#define	P2P_PUB_ACTION_ACTION				0x09
+
+//	P2P Public Action Frame Type
+#define	P2P_GO_NEGO_REQ						0
+#define	P2P_GO_NEGO_RESP						1
+#define	P2P_GO_NEGO_CONF						2
+#define	P2P_INVIT_REQ							3
+#define	P2P_INVIT_RESP							4
+#define	P2P_DEVDISC_REQ						5
+#define	P2P_DEVDISC_RESP						6
+#define	P2P_PROVISION_DISC_REQ				7
+#define	P2P_PROVISION_DISC_RESP				8
+
+//	P2P Action Frame Type
+#define	P2P_NOTICE_OF_ABSENCE	0
+#define	P2P_PRESENCE_REQUEST		1
+#define	P2P_PRESENCE_RESPONSE	2
+#define	P2P_GO_DISC_REQUEST		3
+
+
+#define	P2P_MAX_PERSISTENT_GROUP_NUM		10
+
+#define	P2P_PROVISIONING_SCAN_CNT			3
+
+#define	P2P_WILDCARD_SSID_LEN				7
+#define	P2P_FINDPHASE_EX_CNT					3
+
+#define	P2P_PROVISION_TIMEOUT				5000	//	5 seconds timeout for sending the provision discovery request
+#define	P2P_GO_NEGO_TIMEOUT					5000	//	5 seconds timeout for receiving the group negotation response
+#define	P2P_TX_PRESCAN_TIMEOUT				100		//	100ms
+
+#define	P2P_MAX_INTENT						15
+
+#define	P2P_MAX_NOA_NUM						2
+
+//	WPS Configuration Method
+#define	WPS_CM_NONE							0x0000
+#define	WPS_CM_LABEL							0x0004
+#define	WPS_CM_DISPLYA						0x0008
+#define	WPS_CM_EXTERNAL_NFC_TOKEN			0x0010
+#define	WPS_CM_INTEGRATED_NFC_TOKEN		0x0020
+#define	WPS_CM_NFC_INTERFACE					0x0040
+#define	WPS_CM_PUSH_BUTTON					0x0080
+#define	WPS_CM_KEYPAD						0x0100
+#define	WPS_CM_SW_PUHS_BUTTON				0x0280
+#define	WPS_CM_HW_PUHS_BUTTON				0x0480
+#define	WPS_CM_SW_DISPLAY_PIN				0x2008
+#define	WPS_CM_LCD_DISPLAY_PIN				0x4008
+
+enum P2P_ROLE {
+	P2P_ROLE_DISABLE = 0,
+	P2P_ROLE_DEVICE = 1,
+	P2P_ROLE_CLIENT = 2,
+	P2P_ROLE_GO = 3	
+};
+
+enum P2P_STATE {
+	P2P_STATE_NONE = 0,					//	P2P disable
+	P2P_STATE_IDLE = 1,						//	P2P had enabled and do nothing
+	P2P_STATE_LISTEN = 2,					//	In pure listen state
+	P2P_STATE_SCAN = 3,					//	In scan phase
+	P2P_STATE_FIND_PHASE_LISTEN = 4,		//	In the listen state of find phase
+	P2P_STATE_FIND_PHASE_SEARCH = 5,		//	In the search state of find phase
+	P2P_STATE_TX_PROVISION_DIS_REQ = 6,	//	In P2P provisioning discovery
+	P2P_STATE_RX_PROVISION_DIS_RSP = 7,
+	P2P_STATE_RX_PROVISION_DIS_REQ = 8,	
+	P2P_STATE_GONEGO_ING = 9,				//	Doing the group owner negoitation handshake
+	P2P_STATE_GONEGO_OK = 10,				//	finish the group negoitation handshake with success
+	P2P_STATE_GONEGO_FAIL = 11,			//	finish the group negoitation handshake with failure
+	P2P_STATE_RECV_INVITE_REQ = 12,		//	receiving the P2P Inviation request
+	P2P_STATE_PROVISIONING_ING = 13,		//	Doing the P2P WPS
+	P2P_STATE_PROVISIONING_DONE = 14,	//	Finish the P2P WPS
+};
+
+enum P2P_WPSINFO {
+	P2P_NO_WPSINFO						= 0,
+	P2P_GOT_WPSINFO_PEER_DISPLAY_PIN	= 1,
+	P2P_GOT_WPSINFO_SELF_DISPLAY_PIN	= 2,
+	P2P_GOT_WPSINFO_PBC					= 3,
+};
+
+#define	P2P_PRIVATE_IOCTL_SET_LEN		64
+
+enum P2P_PROTO_WK_ID
+{
+	P2P_FIND_PHASE_WK = 0,
+	P2P_RESTORE_STATE_WK = 1,
+	P2P_PRE_TX_PROVDISC_PROCESS_WK = 2,
+	P2P_PRE_TX_NEGOREQ_PROCESS_WK = 3,
+};
+
+enum P2P_PS
+{
+	P2P_PS_DISABLE=0,
+	P2P_PS_ENABLE=1,
+	P2P_PS_SCAN=2,
+	P2P_PS_SCAN_DONE=3,
+	P2P_PS_ALLSTASLEEP=4, // for owner
+};
+
+//	=====================WFD Section=====================
+//	For Wi-Fi Display
+#define	WFD_ATTR_DEVICE_INFO			0x00
+#define	WFD_ATTR_ASSOC_BSSID			0x01
+#define	WFD_ATTR_COUPLED_SINK_INFO	0x06
+#define	WFD_ATTR_SESSION_INFO		0x09
+
+//	For WFD Device Information Attribute
+#define	WFD_DEVINFO_SOURCE					0
+#define	WFD_DEVINFO_PRIARY_SINK				1
+#define	WFD_DEVINFO_SECARY_SINK				2
+#define	WFD_DEVINFO_SOURCE_PRIARY_SINK		3
+
+#define	WFD_DEVINFO_NO_COUPLED_SINK		0
+#define	WFD_DEVINFO_COUPLED_SINK			4
+
+#ifdef  CONFIG_TX_MCAST2UNI
+#define IP_MCAST_MAC(mac)		((mac[0]==0x01)&&(mac[1]==0x00)&&(mac[2]==0x5e))
+#define ICMPV6_MCAST_MAC(mac)	((mac[0]==0x33)&&(mac[1]==0x33)&&(mac[2]!=0xff))
+#endif	// CONFIG_TX_MCAST2UNI
+
+
+
+#endif // _WIFI_H_
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/wlan_bssdef.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/wlan_bssdef.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/wlan_bssdef.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/wlan_bssdef.h	2017-09-23 03:42:50.066674917 +0800
@@ -0,0 +1,453 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef __WLAN_BSSDEF_H__
+#define __WLAN_BSSDEF_H__
+
+
+#define MAX_IE_SZ	768
+
+
+#ifdef PLATFORM_LINUX
+
+#define NDIS_802_11_LENGTH_SSID         32
+#define NDIS_802_11_LENGTH_RATES        8
+#define NDIS_802_11_LENGTH_RATES_EX     16
+
+typedef unsigned char   NDIS_802_11_MAC_ADDRESS[6];
+typedef long    		NDIS_802_11_RSSI;           // in dBm
+typedef unsigned char   NDIS_802_11_RATES[NDIS_802_11_LENGTH_RATES];        // Set of 8 data rates
+typedef unsigned char   NDIS_802_11_RATES_EX[NDIS_802_11_LENGTH_RATES_EX];  // Set of 16 data rates
+
+
+typedef  ULONG  NDIS_802_11_KEY_INDEX;
+typedef unsigned long long NDIS_802_11_KEY_RSC;
+
+
+typedef struct _NDIS_802_11_SSID
+{
+  ULONG  SsidLength;
+  UCHAR  Ssid[32];
+} NDIS_802_11_SSID, *PNDIS_802_11_SSID;
+
+typedef enum _NDIS_802_11_NETWORK_TYPE
+{
+    Ndis802_11FH,
+    Ndis802_11DS,
+    Ndis802_11OFDM5,
+    Ndis802_11OFDM24,
+    Ndis802_11NetworkTypeMax    // not a real type, defined as an upper bound
+} NDIS_802_11_NETWORK_TYPE, *PNDIS_802_11_NETWORK_TYPE;
+
+typedef struct _NDIS_802_11_CONFIGURATION_FH
+{
+    ULONG           Length;             // Length of structure
+    ULONG           HopPattern;         // As defined by 802.11, MSB set
+    ULONG           HopSet;             // to one if non-802.11
+    ULONG           DwellTime;          // units are Kusec
+} NDIS_802_11_CONFIGURATION_FH, *PNDIS_802_11_CONFIGURATION_FH;
+ 
+
+/*
+	FW will only save the channel number in DSConfig.
+	ODI Handler will convert the channel number to freq. number.	
+*/
+typedef struct _NDIS_802_11_CONFIGURATION
+{
+    ULONG           Length;             // Length of structure
+    ULONG           BeaconPeriod;       // units are Kusec
+    ULONG           ATIMWindow;         // units are Kusec
+    ULONG           DSConfig;           // Frequency, units are kHz
+    NDIS_802_11_CONFIGURATION_FH    FHConfig;
+} NDIS_802_11_CONFIGURATION, *PNDIS_802_11_CONFIGURATION;
+
+
+
+typedef enum _NDIS_802_11_NETWORK_INFRASTRUCTURE
+{
+    Ndis802_11IBSS,
+    Ndis802_11Infrastructure,
+    Ndis802_11AutoUnknown,
+    Ndis802_11InfrastructureMax,     // Not a real value, defined as upper bound
+    Ndis802_11APMode
+} NDIS_802_11_NETWORK_INFRASTRUCTURE, *PNDIS_802_11_NETWORK_INFRASTRUCTURE;
+
+
+
+
+
+typedef struct _NDIS_802_11_FIXED_IEs
+{
+  UCHAR  Timestamp[8];
+  USHORT  BeaconInterval;
+  USHORT  Capabilities;
+} NDIS_802_11_FIXED_IEs, *PNDIS_802_11_FIXED_IEs;
+
+
+
+typedef struct _NDIS_802_11_VARIABLE_IEs
+{
+  UCHAR  ElementID;
+  UCHAR  Length;
+  UCHAR  data[1];
+} NDIS_802_11_VARIABLE_IEs, *PNDIS_802_11_VARIABLE_IEs;
+
+
+
+/*
+
+
+
+Length is the 4 bytes multiples of the sume of
+	sizeof (NDIS_802_11_MAC_ADDRESS) + 2 + sizeof (NDIS_802_11_SSID) + sizeof (ULONG)
++   sizeof (NDIS_802_11_RSSI) + sizeof (NDIS_802_11_NETWORK_TYPE) + sizeof (NDIS_802_11_CONFIGURATION)
++   sizeof (NDIS_802_11_RATES_EX) + IELength
+
+Except the IELength, all other fields are fixed length. Therefore, we can define a marco to present the
+partial sum.
+
+*/
+#if 0
+typedef struct _NDIS_WLAN_BSSID_EX
+{
+  ULONG  Length;
+  NDIS_802_11_MAC_ADDRESS  MacAddress;
+  UCHAR  Reserved[2];//[0]: IS beacon frame, [1]:optimum_antenna=>For antenna diversity;
+  NDIS_802_11_SSID  Ssid;
+  ULONG  Privacy;
+  NDIS_802_11_RSSI  Rssi;
+  NDIS_802_11_NETWORK_TYPE  NetworkTypeInUse;
+  NDIS_802_11_CONFIGURATION  Configuration;
+  NDIS_802_11_NETWORK_INFRASTRUCTURE  InfrastructureMode;
+  NDIS_802_11_RATES_EX  SupportedRates;
+  ULONG  IELength;
+  UCHAR  IEs[MAX_IE_SZ];	//(timestamp, beacon interval, and capability information)
+} NDIS_WLAN_BSSID_EX, *PNDIS_WLAN_BSSID_EX;
+
+
+typedef struct _NDIS_802_11_BSSID_LIST_EX
+{
+  ULONG  NumberOfItems;
+  NDIS_WLAN_BSSID_EX  Bssid[1];
+} NDIS_802_11_BSSID_LIST_EX, *PNDIS_802_11_BSSID_LIST_EX;
+#endif
+
+typedef enum _NDIS_802_11_AUTHENTICATION_MODE
+{
+    Ndis802_11AuthModeOpen,
+    Ndis802_11AuthModeShared,
+    Ndis802_11AuthModeAutoSwitch,
+    Ndis802_11AuthModeWPA,
+    Ndis802_11AuthModeWPAPSK,
+    Ndis802_11AuthModeWPANone,
+    Ndis802_11AuthModeMax               // Not a real mode, defined as upper bound
+} NDIS_802_11_AUTHENTICATION_MODE, *PNDIS_802_11_AUTHENTICATION_MODE;
+
+typedef enum _NDIS_802_11_WEP_STATUS
+{
+    Ndis802_11WEPEnabled,
+    Ndis802_11Encryption1Enabled = Ndis802_11WEPEnabled,
+    Ndis802_11WEPDisabled,
+    Ndis802_11EncryptionDisabled = Ndis802_11WEPDisabled,
+    Ndis802_11WEPKeyAbsent,
+    Ndis802_11Encryption1KeyAbsent = Ndis802_11WEPKeyAbsent,
+    Ndis802_11WEPNotSupported,
+    Ndis802_11EncryptionNotSupported = Ndis802_11WEPNotSupported,
+    Ndis802_11Encryption2Enabled,
+    Ndis802_11Encryption2KeyAbsent,
+    Ndis802_11Encryption3Enabled,
+    Ndis802_11Encryption3KeyAbsent
+} NDIS_802_11_WEP_STATUS, *PNDIS_802_11_WEP_STATUS,
+  NDIS_802_11_ENCRYPTION_STATUS, *PNDIS_802_11_ENCRYPTION_STATUS;
+
+
+#define NDIS_802_11_AI_REQFI_CAPABILITIES      1
+#define NDIS_802_11_AI_REQFI_LISTENINTERVAL    2
+#define NDIS_802_11_AI_REQFI_CURRENTAPADDRESS  4
+
+#define NDIS_802_11_AI_RESFI_CAPABILITIES      1
+#define NDIS_802_11_AI_RESFI_STATUSCODE        2
+#define NDIS_802_11_AI_RESFI_ASSOCIATIONID     4
+
+typedef struct _NDIS_802_11_AI_REQFI
+{
+    USHORT Capabilities;
+    USHORT ListenInterval;
+    NDIS_802_11_MAC_ADDRESS  CurrentAPAddress;
+} NDIS_802_11_AI_REQFI, *PNDIS_802_11_AI_REQFI;
+
+typedef struct _NDIS_802_11_AI_RESFI
+{
+    USHORT Capabilities;
+    USHORT StatusCode;
+    USHORT AssociationId;
+} NDIS_802_11_AI_RESFI, *PNDIS_802_11_AI_RESFI;
+
+typedef struct _NDIS_802_11_ASSOCIATION_INFORMATION
+{
+    ULONG                   Length;
+    USHORT                  AvailableRequestFixedIEs;
+    NDIS_802_11_AI_REQFI    RequestFixedIEs;
+    ULONG                   RequestIELength;
+    ULONG                   OffsetRequestIEs;
+    USHORT                  AvailableResponseFixedIEs;
+    NDIS_802_11_AI_RESFI    ResponseFixedIEs;
+    ULONG                   ResponseIELength;
+    ULONG                   OffsetResponseIEs;
+} NDIS_802_11_ASSOCIATION_INFORMATION, *PNDIS_802_11_ASSOCIATION_INFORMATION;
+
+typedef enum _NDIS_802_11_RELOAD_DEFAULTS
+{
+   Ndis802_11ReloadWEPKeys
+} NDIS_802_11_RELOAD_DEFAULTS, *PNDIS_802_11_RELOAD_DEFAULTS;
+
+
+// Key mapping keys require a BSSID
+typedef struct _NDIS_802_11_KEY
+{
+    ULONG           Length;             // Length of this structure
+    ULONG           KeyIndex;           
+    ULONG           KeyLength;          // length of key in bytes
+    NDIS_802_11_MAC_ADDRESS BSSID;
+    NDIS_802_11_KEY_RSC KeyRSC;
+    UCHAR           KeyMaterial[32];     // variable length depending on above field
+} NDIS_802_11_KEY, *PNDIS_802_11_KEY;
+
+typedef struct _NDIS_802_11_REMOVE_KEY
+{
+    ULONG                   Length;        // Length of this structure
+    ULONG                   KeyIndex;           
+    NDIS_802_11_MAC_ADDRESS BSSID;      
+} NDIS_802_11_REMOVE_KEY, *PNDIS_802_11_REMOVE_KEY;
+
+typedef struct _NDIS_802_11_WEP
+{
+    ULONG     Length;        // Length of this structure
+    ULONG     KeyIndex;      // 0 is the per-client key, 1-N are the global keys
+    ULONG     KeyLength;     // length of key in bytes
+    UCHAR     KeyMaterial[16];// variable length depending on above field
+} NDIS_802_11_WEP, *PNDIS_802_11_WEP;
+
+typedef struct _NDIS_802_11_AUTHENTICATION_REQUEST
+{
+    ULONG Length;            // Length of structure
+    NDIS_802_11_MAC_ADDRESS Bssid;
+    ULONG Flags;
+} NDIS_802_11_AUTHENTICATION_REQUEST, *PNDIS_802_11_AUTHENTICATION_REQUEST;
+
+typedef enum _NDIS_802_11_STATUS_TYPE
+{
+	Ndis802_11StatusType_Authentication,
+	Ndis802_11StatusType_MediaStreamMode,
+	Ndis802_11StatusType_PMKID_CandidateList,		
+	Ndis802_11StatusTypeMax    // not a real type, defined as an upper bound
+} NDIS_802_11_STATUS_TYPE, *PNDIS_802_11_STATUS_TYPE;
+
+typedef struct _NDIS_802_11_STATUS_INDICATION
+{
+    NDIS_802_11_STATUS_TYPE StatusType;
+} NDIS_802_11_STATUS_INDICATION, *PNDIS_802_11_STATUS_INDICATION;
+
+// mask for authentication/integrity fields
+#define NDIS_802_11_AUTH_REQUEST_AUTH_FIELDS        0x0f
+#define NDIS_802_11_AUTH_REQUEST_REAUTH			0x01
+#define NDIS_802_11_AUTH_REQUEST_KEYUPDATE		0x02
+#define NDIS_802_11_AUTH_REQUEST_PAIRWISE_ERROR		0x06
+#define NDIS_802_11_AUTH_REQUEST_GROUP_ERROR		0x0E
+
+// MIC check time, 60 seconds.
+#define MIC_CHECK_TIME	60000000
+
+typedef struct _NDIS_802_11_AUTHENTICATION_EVENT
+{
+    NDIS_802_11_STATUS_INDICATION       Status;
+    NDIS_802_11_AUTHENTICATION_REQUEST  Request[1];
+} NDIS_802_11_AUTHENTICATION_EVENT, *PNDIS_802_11_AUTHENTICATION_EVENT;
+        
+typedef struct _NDIS_802_11_TEST
+{
+    ULONG Length;
+    ULONG Type;
+    union
+    {
+        NDIS_802_11_AUTHENTICATION_EVENT AuthenticationEvent;
+        NDIS_802_11_RSSI RssiTrigger;
+    }tt;
+} NDIS_802_11_TEST, *PNDIS_802_11_TEST;
+
+
+#endif //end of #ifdef PLATFORM_LINUX
+
+#ifndef Ndis802_11APMode
+#define Ndis802_11APMode (Ndis802_11InfrastructureMax+1)
+#endif
+
+typedef struct _WLAN_PHY_INFO
+{
+	u8	SignalStrength;//(in percentage)
+  	u8	SignalQuality;//(in percentage)
+  	u8	Optimum_antenna;  //for Antenna diversity
+  	u8  	Reserved_0;
+}WLAN_PHY_INFO,*PWLAN_PHY_INFO;
+
+/* temporally add #pragma pack for structure alignment issue of
+*   WLAN_BSSID_EX and get_WLAN_BSSID_EX_sz()
+*/
+#ifdef PLATFORM_WINDOWS
+#pragma pack(push)
+#pragma pack(1)
+#endif
+typedef struct _WLAN_BSSID_EX
+{
+  ULONG  Length;
+  NDIS_802_11_MAC_ADDRESS  MacAddress;
+  UCHAR  Reserved[2];//[0]: IS beacon frame
+  NDIS_802_11_SSID  Ssid;
+  ULONG  Privacy;
+  NDIS_802_11_RSSI  Rssi;//(in dBM,raw data ,get from PHY)
+  NDIS_802_11_NETWORK_TYPE  NetworkTypeInUse;
+  NDIS_802_11_CONFIGURATION  Configuration;
+  NDIS_802_11_NETWORK_INFRASTRUCTURE  InfrastructureMode;
+  NDIS_802_11_RATES_EX  SupportedRates;
+  WLAN_PHY_INFO	PhyInfo;
+  ULONG  IELength;
+  UCHAR  IEs[MAX_IE_SZ];	//(timestamp, beacon interval, and capability information)
+} 
+#ifndef PLATFORM_WINDOWS
+__attribute__((packed))
+#endif
+WLAN_BSSID_EX, *PWLAN_BSSID_EX;
+#ifdef PLATFORM_WINDOWS
+#pragma pack(pop)
+#endif
+
+__inline  static uint get_WLAN_BSSID_EX_sz(WLAN_BSSID_EX *bss)
+{
+	uint t_len;
+	
+	t_len = sizeof (ULONG) 
+		+ sizeof (NDIS_802_11_MAC_ADDRESS) 
+		+ 2 
+		+ sizeof (NDIS_802_11_SSID) 
+		+ sizeof (ULONG) 
+		+ sizeof (NDIS_802_11_RSSI) 
+		+ sizeof (NDIS_802_11_NETWORK_TYPE)
+		+ sizeof (NDIS_802_11_CONFIGURATION)
+		+ sizeof (NDIS_802_11_NETWORK_INFRASTRUCTURE)
+		+ sizeof (NDIS_802_11_RATES_EX)
+		//all new member add here
+		+ sizeof(WLAN_PHY_INFO)
+		//all new member add here
+		+ sizeof (ULONG)
+		+ bss->IELength;	
+	return t_len;
+	
+}
+
+struct	wlan_network {
+	_list	list;	
+	int	network_type;	//refer to ieee80211.h for WIRELESS_11A/B/G
+	int	fixed;			// set to fixed when not to be removed as site-surveying
+	unsigned long	last_scanned; //timestamp for the network
+	int	aid;			//will only be valid when a BSS is joinned.
+	int	join_res;
+	WLAN_BSSID_EX	network; //must be the last item
+#ifdef PLATFORM_WINDOWS	
+	unsigned char  iebuf[MAX_IE_SZ];
+#endif
+
+};
+
+enum VRTL_CARRIER_SENSE
+{
+    DISABLE_VCS,	
+    ENABLE_VCS,	
+    AUTO_VCS
+};
+
+enum VCS_TYPE
+{
+    NONE_VCS,	
+    RTS_CTS,
+    CTS_TO_SELF 
+};
+
+
+
+
+#define PWR_CAM 0
+#define PWR_MINPS 1
+#define PWR_MAXPS 2
+#define PWR_UAPSD 3
+#define PWR_VOIP 4
+
+
+enum UAPSD_MAX_SP
+{
+	NO_LIMIT,
+       TWO_MSDU,
+       FOUR_MSDU,
+       SIX_MSDU
+};
+
+
+//john
+#define NUM_PRE_AUTH_KEY 16
+#define NUM_PMKID_CACHE NUM_PRE_AUTH_KEY
+
+/*
+* 	WPA2
+*/
+
+#ifndef PLATFORM_OS_CE
+typedef struct _PMKID_CANDIDATE {
+    NDIS_802_11_MAC_ADDRESS BSSID;
+    ULONG Flags;
+} PMKID_CANDIDATE, *PPMKID_CANDIDATE;
+
+typedef struct _NDIS_802_11_PMKID_CANDIDATE_LIST
+{
+    ULONG Version;       // Version of the structure
+    ULONG NumCandidates; // No. of pmkid candidates
+    PMKID_CANDIDATE CandidateList[1];
+} NDIS_802_11_PMKID_CANDIDATE_LIST, *PNDIS_802_11_PMKID_CANDIDATE_LIST;
+
+
+typedef struct _NDIS_802_11_AUTHENTICATION_ENCRYPTION
+{
+	NDIS_802_11_AUTHENTICATION_MODE AuthModeSupported;
+	NDIS_802_11_ENCRYPTION_STATUS EncryptStatusSupported;
+	
+} NDIS_802_11_AUTHENTICATION_ENCRYPTION, *PNDIS_802_11_AUTHENTICATION_ENCRYPTION;
+
+typedef struct _NDIS_802_11_CAPABILITY 
+{
+	ULONG  Length;
+	ULONG  Version;
+	ULONG  NoOfPMKIDs;
+	ULONG  NoOfAuthEncryptPairsSupported;
+	NDIS_802_11_AUTHENTICATION_ENCRYPTION AuthenticationEncryptionSupported[1];
+	
+} NDIS_802_11_CAPABILITY, *PNDIS_802_11_CAPABILITY;
+#endif
+
+
+#endif //#ifndef WLAN_BSSDEF_H_
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/include/xmit_osdep.h linux-3.0.82x/drivers/net/wireless/rtl8188/include/xmit_osdep.h
--- linux-3.0.82/drivers/net/wireless/rtl8188/include/xmit_osdep.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/include/xmit_osdep.h	2017-09-23 03:42:50.066674917 +0800
@@ -0,0 +1,90 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#ifndef __XMIT_OSDEP_H_
+#define __XMIT_OSDEP_H_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+struct pkt_file {
+	_pkt *pkt;
+	SIZE_T pkt_len;	 //the remainder length of the open_file
+	_buffer *cur_buffer;
+	u8 *buf_start;
+	u8 *cur_addr;
+	SIZE_T buf_len;
+};
+
+#ifdef PLATFORM_WINDOWS
+
+#ifdef PLATFORM_OS_XP
+#ifdef CONFIG_USB_HCI
+#include <usb.h>
+#include <usbdlib.h>
+#include <usbioctl.h>
+#endif
+#endif
+
+#define NR_XMITFRAME     128
+
+#define ETH_ALEN	6
+
+extern NDIS_STATUS rtw_xmit_entry(
+IN _nic_hdl		cnxt,
+IN NDIS_PACKET		*pkt,
+IN UINT				flags
+);
+
+#endif
+
+
+#ifdef PLATFORM_LINUX
+
+#define NR_XMITFRAME	256
+
+struct xmit_priv;
+struct pkt_attrib;
+struct sta_xmit_priv;
+struct xmit_frame;
+struct xmit_buf;
+
+extern int rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev);
+
+#endif
+
+void rtw_os_xmit_schedule(_adapter *padapter);
+
+int rtw_os_xmit_resource_alloc(_adapter *padapter, struct xmit_buf *pxmitbuf,u32 alloc_sz);
+void rtw_os_xmit_resource_free(_adapter *padapter, struct xmit_buf *pxmitbuf,u32 free_sz);
+
+extern void rtw_set_tx_chksum_offload(_pkt *pkt, struct pkt_attrib *pattrib);
+
+extern uint rtw_remainder_len(struct pkt_file *pfile);
+extern void _rtw_open_pktfile(_pkt *pkt, struct pkt_file *pfile);
+extern uint _rtw_pktfile_read (struct pkt_file *pfile, u8 *rmem, uint rlen);
+extern sint rtw_endofpktfile (struct pkt_file *pfile);
+
+extern void rtw_os_pkt_complete(_adapter *padapter, _pkt *pkt);
+extern void rtw_os_xmit_complete(_adapter *padapter, struct xmit_frame *pxframe);
+
+#endif //
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/Kconfig linux-3.0.82x/drivers/net/wireless/rtl8188/Kconfig
--- linux-3.0.82/drivers/net/wireless/rtl8188/Kconfig	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/Kconfig	2017-09-23 03:42:50.066674917 +0800
@@ -0,0 +1,8 @@
+config RTL8192CU
+	tristate "Realtek 8192C USB WiFi"
+	depends on USB
+	select	WIRELESS_EXT
+	select	WEXT_PRIV
+	---help---
+	  Help message of RTL8192CU
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/make_drv linux-3.0.82x/drivers/net/wireless/rtl8188/make_drv
--- linux-3.0.82/drivers/net/wireless/rtl8188/make_drv	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/make_drv	2017-09-23 03:42:50.066674917 +0800
@@ -0,0 +1,145 @@
+#!/bin/bash
+#========================================
+# Common functions
+#========================================
+intf_usb()
+{
+	sed -i '/CONFIG_USB_HCI = /c\CONFIG_USB_HCI = y' Makefile
+	sed -i '/CONFIG_PCI_HCI = /c\CONFIG_PCI_HCI = n' Makefile
+	sed -i '/CONFIG_SDIO_HCI = /c\CONFIG_SDIO_HCI = n' Makefile
+}
+intf_pcie()
+{
+	sed -i '/CONFIG_USB_HCI = /c\CONFIG_USB_HCI = n' Makefile
+	sed -i '/CONFIG_PCI_HCI = /c\CONFIG_PCI_HCI = y' Makefile
+	sed -i '/CONFIG_SDIO_HCI = /c\CONFIG_SDIO_HCI = n' Makefile
+}
+intf_sdio()
+{
+	sed -i '/CONFIG_USB_HCI = /c\CONFIG_USB_HCI = n' Makefile
+	sed -i '/CONFIG_PCI_HCI = /c\CONFIG_PCI_HCI = n' Makefile
+	sed -i '/CONFIG_SDIO_HCI = /c\CONFIG_SDIO_HCI = y' Makefile
+}
+
+nic_8192c()
+{
+	sed -i '/CONFIG_RTL8192C = /c\CONFIG_RTL8192C = y' Makefile
+	sed -i '/CONFIG_RTL8192D = /c\CONFIG_RTL8192D = n' Makefile
+}
+nic_8192d()
+{
+	sed -i '/CONFIG_RTL8192C = /c\CONFIG_RTL8192C = n' Makefile
+	sed -i '/CONFIG_RTL8192D = /c\CONFIG_RTL8192D = y' Makefile
+}
+
+ch_obj_cu()
+{
+        sed -i '/obj-$(CONFIG_RTL/ c obj-$(CONFIG_RTL8192CU) := $(MODULE_NAME).o' Makefile
+        sed -i '/export CONFIG_RTL/ c export CONFIG_RTL8192CU = m' Makefile
+}
+
+ch_obj_ce()
+{
+        sed -i '/obj-$(CONFIG_RTL/ c obj-$(CONFIG_RTL8192CE) := $(MODULE_NAME).o' Makefile
+        sed -i '/export CONFIG_RTL/ c export CONFIG_RTL8192CE = m' Makefile
+}
+
+ch_obj_du()
+{
+        sed -i '/obj-$(CONFIG_RTL/ c obj-$(CONFIG_RTL8192DU) := $(MODULE_NAME).o' Makefile
+        sed -i '/export CONFIG_RTL/ c export CONFIG_RTL8192DU = m' Makefile
+}
+
+ch_obj_de()
+{
+        sed -i '/obj-$(CONFIG_RTL/ c obj-$(CONFIG_RTL8192DE) := $(MODULE_NAME).o' Makefile
+        sed -i '/export CONFIG_RTL/ c export CONFIG_RTL8192DE = m' Makefile
+}
+
+get_svn_revision()
+{
+	if [ -z "$svn_rev" ] && [ -f .svn/entries ]; then
+		svn_rev=`sed -n '11 s/^\([0-9][0-9]*\)$/\1/p' .svn/entries`
+	fi
+	if [ -z "$svn_rev" ]; then
+		svn_rev="xxxx"
+	fi
+}
+
+#========================================
+# Sub functions
+#========================================
+
+add_version_file()
+{
+	defversion="#define DRIVERVERSION\t\"$postfix\""
+	echo -e $defversion > include/rtw_version.h
+}
+
+conf_driver()
+{
+	sed -i '/CONFIG_AUTOCFG_CP = /c\CONFIG_AUTOCFG_CP = y' Makefile
+	if [ -f include/rtw_version.h ]; then	
+            echo "rtw_version.h has existed!"
+	else
+	add_version_file
+	fi
+}
+
+#========================================
+# Main Script Start From Here
+#========================================
+
+
+if [ ! -f include/rtw_version.h ]; then	
+	# Make Version string
+	if [ -z "$2" ]; then
+		get_svn_revision
+		version="v3.3.0_"$svn_rev
+		datestr=$(date +%Y%m%d)
+		postfix=$version.$datestr
+	else
+		postfix=$2
+	fi
+fi
+
+
+if [ $# -eq 1 ]; then
+	card=$1
+	echo "You have selected $card"
+else
+	# Select NIC type
+	echo "Please select card type(1/2):"
+	select card in RTL8192cu RTL8192du;
+	do
+		echo "You have selected $card"
+		break
+	done
+fi
+
+# Make
+case "$card" in
+	[Rr][Tt][Ll][8][1][9][2][Cc][Uu])
+	conf_driver;
+	nic_8192c;
+	intf_usb;
+	ch_obj_cu;;
+	[Rr][Tt][Ll][8][1][9][2][Cc][Ee])
+	conf_driver;
+	nic_8192c;
+	intf_pcie;
+	ch_obj_ce;;
+	[Rr][Tt][Ll][8][1][9][2][Dd][Uu])
+	conf_driver;
+	nic_8192d;
+	intf_usb;
+	ch_obj_du;;
+	[Rr][Tt][Ll][8][1][9][2][Dd][Ee])
+	conf_driver;
+	nic_8192d;
+	intf_pcie;
+	ch_obj_de;;
+	*)
+	echo "Unknown NIC type"
+	;;
+esac
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/Makefile linux-3.0.82x/drivers/net/wireless/rtl8188/Makefile
--- linux-3.0.82/drivers/net/wireless/rtl8188/Makefile	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/Makefile	2017-09-23 03:42:50.066674917 +0800
@@ -0,0 +1,502 @@
+EXTRA_CFLAGS += -O1 
+#EXTRA_CFLAGS += -O3
+#EXTRA_CFLAGS += -Wall 
+#EXTRA_CFLAGS += -Wextra 
+#EXTRA_CFLAGS += -Werror
+#EXTRA_CFLAGS += -pedantic
+#EXTRA_CFLAGS += -Wshadow -Wpointer-arith -Wcast-qual -Wstrict-prototypes -Wmissing-prototypes 
+
+EXTRA_CFLAGS += -Wno-unused-variable 
+EXTRA_CFLAGS += -Wno-unused-value 
+EXTRA_CFLAGS += -Wno-unused-label 
+EXTRA_CFLAGS += -Wno-unused-parameter
+EXTRA_CFLAGS += -Wno-unused-function
+EXTRA_CFLAGS += -Wno-unused
+
+EXTRA_CFLAGS += -Wno-uninitialized
+
+EXTRA_CFLAGS += -I$(src)/include
+
+CONFIG_AUTOCFG_CP = y
+
+CONFIG_RTL8192C = y
+CONFIG_RTL8192D = n
+
+CONFIG_USB_HCI = y
+CONFIG_PCI_HCI = n
+CONFIG_SDIO_HCI = n
+
+CONFIG_MP_INCLUDED = n
+CONFIG_POWER_SAVING			=	n
+CONFIG_USB_AUTOSUSPEND			=	n
+CONFIG_HW_PWRP_DETECTION		=	n
+CONFIG_WIFI_TEST						=	n
+CONFIG_BT_COEXISTENCE				= n
+CONFIG_RTL8192CU_REDEFINE_1X1 =n
+
+CONFIG_PLATFORM_I386_PC = n
+CONFIG_PLATFORM_TI_AM3517 = n
+CONFIG_PLATFORM_ANDROID_X86 = n
+CONFIG_PLATFORM_ARM_S3C2K4 = n
+CONFIG_PLATFORM_ARM_PXA2XX = n
+CONFIG_PLATFORM_ARM_S3C6K4 = n
+CONFIG_PLATFORM_MIPS_RMI = n
+CONFIG_PLATFORM_RTD2880B = n
+CONFIG_PLATFORM_MIPS_AR9132 = n
+CONFIG_PLATFORM_RTK_DMP = n
+CONFIG_PLATFORM_MIPS_PLM = n
+CONFIG_PLATFORM_MSTAR389 = n
+CONFIG_PLATFORM_MT53XX = n
+CONFIG_PLATFORM_ARM_MX51_241H = n
+CONFIG_PLATFORM_ACTIONS_ATJ227X = n
+CONFIG_PLATFORM_ARM_TEGRA3 = n
+CONFIG_PLATFORM_ARM_TCC8900 = n
+CONFIG_PLATFORM_ARM_RK2818 = n
+CONFIG_PLATFORM_MIPS_JZ4760 = y
+CONFIG_PLATFORM_DMP_PHILIPS = n
+CONFIG_PLATFORM_TI_DM365	=	n
+CONFIG_PLATFORM_MN10300 = n
+CONFIG_PLATFORM_MSTAR_TITANIA12 = n
+
+CONFIG_DRVEXT_MODULE = n
+
+export TopDIR ?= $(shell pwd)
+
+
+ifeq ($(CONFIG_RTL8712), y)
+
+RTL871X = rtl8712
+
+ifeq ($(CONFIG_SDIO_HCI), y)
+MODULE_NAME = 8712s
+endif
+ifeq ($(CONFIG_USB_HCI), y)
+MODULE_NAME = 8712u
+endif
+
+endif
+
+ifeq ($(CONFIG_RTL8192C), y)
+
+RTL871X = rtl8192c
+
+ifeq ($(CONFIG_SDIO_HCI), y)
+MODULE_NAME = 8192cs
+endif
+ifeq ($(CONFIG_USB_HCI), y)
+MODULE_NAME = 8192cu
+FW_FILES := hal/$(RTL871X)/usb/Hal8192CUHWImg.o
+endif
+ifeq ($(CONFIG_PCI_HCI), y)
+MODULE_NAME = 8192ce
+FW_FILES := hal/$(RTL871X)/pci/Hal8192CEHWImg.o
+endif
+
+CHIP_FILES := hal/$(RTL871X)/$(RTL871X)_sreset.o
+CHIP_FILES += $(FW_FILES)
+endif
+
+ifeq ($(CONFIG_RTL8192D), y)
+
+RTL871X = rtl8192d
+
+ifeq ($(CONFIG_SDIO_HCI), y)
+MODULE_NAME = 8192ds
+endif
+ifeq ($(CONFIG_USB_HCI), y)
+MODULE_NAME = 8192du
+FW_FILES := hal/$(RTL871X)/usb/Hal8192DUHWImg.o \
+			hal/$(RTL871X)/usb/Hal8192DUTestHWImg.o
+endif
+ifeq ($(CONFIG_PCI_HCI), y)
+MODULE_NAME = 8192de
+FW_FILES := hal/$(RTL871X)/pci/Hal8192DEHWImg.o \
+			hal/$(RTL871X)/pci/Hal8192DETestHWImg.o
+endif
+
+CHIP_FILES += $(FW_FILES)
+endif
+
+ifeq ($(CONFIG_SDIO_HCI), y)
+
+HCI_NAME = sdio
+
+_OS_INTFS_FILES :=	os_dep/osdep_service.o \
+			os_dep/linux/os_intfs.o \
+			os_dep/linux/sdio_intf.o \
+			os_dep/linux/ioctl_linux.o \
+			os_dep/linux/xmit_linux.o \
+			os_dep/linux/mlme_linux.o \
+			os_dep/linux/recv_linux.o
+
+_HAL_INTFS_FILES := hal/$(RTL871X)/hal_init.o \
+		    hal/$(RTL871X)/sdio_halinit.o \
+		    hal/$(RTL871X)/sdio_ops.o \
+		    hal/$(RTL871X)/sdio_ops_linux.o    	
+
+endif
+
+
+ifeq ($(CONFIG_USB_HCI), y)
+
+HCI_NAME = usb
+
+_OS_INTFS_FILES :=	os_dep/osdep_service.o \
+			os_dep/linux/os_intfs.o \
+			os_dep/linux/$(HCI_NAME)_intf.o \
+			os_dep/linux/ioctl_linux.o \
+			os_dep/linux/xmit_linux.o \
+			os_dep/linux/mlme_linux.o \
+			os_dep/linux/recv_linux.o
+
+_HAL_INTFS_FILES :=	hal/hal_init.o \
+                        hal/$(RTL871X)/$(RTL871X)_hal_init.o \
+			hal/$(RTL871X)/$(RTL871X)_phycfg.o \
+			hal/$(RTL871X)/$(RTL871X)_rf6052.o \
+			hal/$(RTL871X)/$(RTL871X)_dm.o \
+			hal/$(RTL871X)/$(RTL871X)_rxdesc.o \
+			hal/$(RTL871X)/$(RTL871X)_cmd.o \
+			hal/$(RTL871X)/$(RTL871X)_mp.o \
+			hal/$(RTL871X)/usb/usb_ops_linux.o \
+			hal/$(RTL871X)/usb/usb_halinit.o \
+			hal/$(RTL871X)/usb/rtl$(MODULE_NAME)_led.o \
+			hal/$(RTL871X)/usb/rtl$(MODULE_NAME)_xmit.o \
+			hal/$(RTL871X)/usb/rtl$(MODULE_NAME)_recv.o
+			
+_HAL_INTFS_FILES += $(CHIP_FILES)
+
+endif
+
+
+ifeq ($(CONFIG_PCI_HCI), y)
+ 
+HCI_NAME = pci
+
+_OS_INTFS_FILES :=	os_dep/osdep_service.o \
+			os_dep/linux/os_intfs.o \
+			os_dep/linux/$(HCI_NAME)_intf.o \
+			os_dep/linux/ioctl_linux.o \
+			os_dep/linux/xmit_linux.o \
+			os_dep/linux/mlme_linux.o \
+			os_dep/linux/recv_linux.o
+
+_HAL_INTFS_FILES :=	hal/hal_init.o \
+                        hal/$(RTL871X)/$(RTL871X)_hal_init.o \
+			hal/$(RTL871X)/$(RTL871X)_phycfg.o \
+			hal/$(RTL871X)/$(RTL871X)_rf6052.o \
+			hal/$(RTL871X)/$(RTL871X)_dm.o \
+			hal/$(RTL871X)/$(RTL871X)_rxdesc.o \
+			hal/$(RTL871X)/$(RTL871X)_cmd.o \
+			hal/$(RTL871X)/$(RTL871X)_mp.o \
+			hal/$(RTL871X)/pci/pci_ops_linux.o \
+			hal/$(RTL871X)/pci/pci_halinit.o \
+			hal/$(RTL871X)/pci/rtl$(MODULE_NAME)_led.o \
+			hal/$(RTL871X)/pci/rtl$(MODULE_NAME)_xmit.o \
+			hal/$(RTL871X)/pci/rtl$(MODULE_NAME)_recv.o
+
+_HAL_INTFS_FILES += $(CHIP_FILES)
+
+endif
+
+ifeq ($(CONFIG_AUTOCFG_CP), y)
+#$(shell cp $(TopDIR)/autoconf_$(RTL871X)_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h)
+endif
+
+
+ifeq ($(CONFIG_USB_HCI), y)
+ifeq ($(CONFIG_USB_AUTOSUSPEND), y)
+EXTRA_CFLAGS += -DCONFIG_USB_AUTOSUSPEND
+endif
+endif
+
+ifeq ($(CONFIG_POWER_SAVING), y)
+EXTRA_CFLAGS += -DCONFIG_POWER_SAVING
+endif
+
+ifeq ($(CONFIG_HW_PWRP_DETECTION), y)
+EXTRA_CFLAGS += -DCONFIG_HW_PWRP_DETECTION
+endif
+
+ifeq ($(CONFIG_WIFI_TEST), y)
+EXTRA_CFLAGS += -DCONFIG_WIFI_TEST
+endif
+
+ifeq ($(CONFIG_BT_COEXISTENCE), y)
+EXTRA_CFLAGS += -DCONFIG_BT_COEXISTENCE
+endif 
+
+ifeq ($(CONFIG_RTL8192CU_REDEFINE_1X1), y)
+EXTRA_CFLAGS += -DRTL8192C_RECONFIG_TO_1T1R
+endif 
+
+ifeq ($(CONFIG_PLATFORM_I386_PC), y)
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
+SUBARCH := $(shell uname -m | sed -e s/i.86/i386/)
+ARCH ?= $(SUBARCH)
+CROSS_COMPILE ?=
+KVER  := $(shell uname -r)
+KSRC := /lib/modules/$(KVER)/build
+MODDESTDIR := /lib/modules/$(KVER)/kernel/drivers/net/wireless/
+INSTALL_PREFIX :=
+endif
+
+ifeq ($(CONFIG_PLATFORM_TI_AM3517), y)
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID -DCONFIG_PLATFORM_SHUTTLE
+CROSS_COMPILE := arm-eabi-
+KSRC := $(shell pwd)/../../../Android/kernel
+ARCH := arm
+endif
+
+ifeq ($(CONFIG_PLATFORM_MSTAR_TITANIA12), y)
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MSTAR_TITANIA12
+ARCH:=mips
+CROSS_COMPILE:= /work/mstar/mips-4.3/bin/mips-linux-gnu-
+KVER:= 2.6.28.9
+KSRC:= /work/mstar/2.6.28.9/
+endif
+
+
+ifeq ($(CONFIG_PLATFORM_ANDROID_X86), y)
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID
+SUBARCH := $(shell uname -m | sed -e s/i.86/i386/)
+ARCH := $(SUBARCH)
+CROSS_COMPILE ?= /work/android-x86/prebuilt/linux-x86/toolchain/i686-unknown-linux-gnu-4.5.2/bin/i686-unknown-linux-gnu-
+KSRC := /work/android-x86/out/target/product/eeepc/obj/kernel
+endif
+
+ifeq ($(CONFIG_PLATFORM_ARM_PXA2XX), y)
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
+ARCH := arm
+CROSS_COMPILE := arm-none-linux-gnueabi-
+KVER  := 2.6.34.1
+KSRC ?= /usr/src/linux-2.6.34.1
+endif
+
+ifeq ($(CONFIG_PLATFORM_ARM_S3C2K4), y)
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
+ARCH := arm
+CROSS_COMPILE := arm-linux-
+KVER  := 2.6.24.7_$(ARCH)
+KSRC := /usr/src/kernels/linux-$(KVER)
+endif
+
+ifeq ($(CONFIG_PLATFORM_ARM_S3C6K4), y)
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
+ARCH := arm
+CROSS_COMPILE := arm-none-linux-gnueabi-
+KVER  := 2.6.34.1
+KSRC ?= /usr/src/linux-2.6.34.1
+endif
+
+ifeq ($(CONFIG_PLATFORM_RTD2880B), y)
+EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN -DCONFIG_PLATFORM_RTD2880B
+ARCH:=
+CROSS_COMPILE:=
+KVER:=
+KSRC:=
+endif
+
+ifeq ($(CONFIG_PLATFORM_MIPS_RMI), y)
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
+ARCH:=mips
+CROSS_COMPILE:=mipsel-linux-
+KVER:= 3.0.0
+KSRC:= ../../../../../../
+endif
+
+ifeq ($(CONFIG_PLATFORM_MIPS_PLM), y)
+EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN
+ARCH:=mips
+CROSS_COMPILE:=mipsisa32r2-uclibc-
+KVER:= 
+KSRC:= /root/work/kernel_realtek
+endif
+
+ifeq ($(CONFIG_PLATFORM_MSTAR389), y)
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MSTAR389
+ARCH:=mips
+CROSS_COMPILE:= mips-linux-gnu-
+KVER:= 2.6.28.10
+KSRC:= /home/mstar/mstar_linux/2.6.28.9/
+endif
+
+ifeq ($(CONFIG_PLATFORM_MIPS_AR9132), y)
+EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN
+ARCH := mips
+CROSS_COMPILE := mips-openwrt-linux-
+KSRC := /home/alex/test_openwrt/tmp/linux-2.6.30.9
+endif
+
+ifeq ($(CONFIG_PLATFORM_DMP_PHILIPS), y)
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DRTK_DMP_PLATFORM
+ARCH := mips
+#CROSS_COMPILE:=/usr/local/msdk-4.3.6-mips-EL-2.6.12.6-0.9.30.3/bin/mipsel-linux-
+CROSS_COMPILE:=/usr/local/toolchain_mipsel/bin/mipsel-linux-
+KSRC ?=/usr/local/Jupiter/linux-2.6.12
+endif
+
+ifeq ($(CONFIG_PLATFORM_RTK_DMP), y)
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DRTK_DMP_PLATFORM
+ARCH:=mips
+CROSS_COMPILE:=mipsel-linux-
+KVER:= 
+KSRC ?= /usr/src/work/DMP_Kernel/jupiter/linux-2.6.12
+endif
+
+ifeq ($(CONFIG_PLATFORM_MT53XX), y)
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MT53XX
+ARCH:= arm
+CROSS_COMPILE:= arm11_mtk_le-
+KVER:= 2.6.27
+KSRC?= /proj/mtk00802/BD_Compare/BDP/Dev/BDP_V301/BDP_Linux/linux-2.6.27
+endif
+
+ifeq ($(CONFIG_PLATFORM_ARM_MX51_241H), y)
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_WISTRON_PLATFORM
+ARCH := arm
+CROSS_COMPILE := /opt/freescale/usr/local/gcc-4.1.2-glibc-2.5-nptl-3/arm-none-linux-gnueabi/bin/arm-none-linux-gnueabi-
+KVER  := 2.6.31
+KSRC ?= /lib/modules/2.6.31-770-g0e46b52/source
+endif
+ 
+ifeq ($(CONFIG_PLATFORM_ACTIONS_ATJ227X), y)
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ACTIONS_ATJ227X
+ARCH := mips
+CROSS_COMPILE := /home/cnsd4/project/actions/tools-2.6.27/bin/mipsel-linux-gnu-
+KVER  := 2.6.27
+KSRC := /home/cnsd4/project/actions/linux-2.6.27.28
+endif
+
+ifeq ($(CONFIG_PLATFORM_TI_DM365), y)
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_TI_DM365
+ARCH := arm
+CROSS_COMPILE := /home/cnsd4/Appro/mv_pro_5.0/montavista/pro/devkit/arm/v5t_le/bin/arm_v5t_le-
+KVER  := 2.6.18
+KSRC := /home/cnsd4/Appro/mv_pro_5.0/montavista/pro/devkit/lsp/ti-davinci/linux-dm365
+endif
+
+ifeq ($(CONFIG_PLATFORM_ARM_TEGRA3), y)
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN #-DCONFIG_MINIMAL_MEMORY_USAGE
+ARCH ?= arm
+CROSS_COMPILE ?= /media/DATA-1/nvidia/gingerbread/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi-
+KSRC ?= /media/DATA-1/nvidia/gingerbread/out/debug/target/product/cardhu/obj/KERNEL
+MODULE_NAME := wlan
+endif
+
+ifeq ($(CONFIG_PLATFORM_ARM_TCC8900), y)
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_MINIMAL_MEMORY_USAGE
+ARCH ?= arm
+CROSS_COMPILE ?= /media/DATA-1/telechips/SDK_2302_20110425/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi-
+KSRC ?=/media/DATA-1/telechips/SDK_2302_20110425/kernel
+MODULE_NAME := wlan
+endif
+
+ifeq ($(CONFIG_PLATFORM_ARM_RK2818), y)
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID -DCONFIG_PLATFORM_ROCKCHIPS -DCONFIG_MINIMAL_MEMORY_USAGE
+ARCH := arm
+CROSS_COMPILE := /usr/src/release_fae_version/toolchain/arm-eabi-4.4.0/bin/arm-eabi-
+KSRC := /usr/src/release_fae_version/kernel25_A7_281x
+MODULE_NAME := wlan
+endif
+
+ifeq ($(CONFIG_PLATFORM_MIPS_JZ4760), y)
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_MINIMAL_MEMORY_USAGE
+ARCH ?= mips
+CROSS_COMPILE ?= mipsel-linux-
+KSRC ?= ../../../../../../
+endif
+
+#Add setting for MN10300
+ifeq ($(CONFIG_PLATFORM_MN10300), y)
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MN10300
+ARCH := mn10300
+CROSS_COMPILE := mn10300-linux-
+KVER := 2.6.32.2
+KSRC := /home/winuser/work/Plat_sLD2T_V3010/usr/src/linux-2.6.32.2
+INSTALL_PREFIX :=
+endif
+
+ifeq ($(CONFIG_MP_INCLUDED), y)
+MODULE_NAME := $(MODULE_NAME)_mp
+EXTRA_CFLAGS += -DCONFIG_MP_INCLUDED
+endif
+
+#ifneq ($(KERNELRELEASE),)
+
+
+rtk_core :=	core/rtw_cmd.o \
+		core/rtw_security.o \
+		core/rtw_debug.o \
+		core/rtw_io.o \
+		core/rtw_ioctl_query.o \
+		core/rtw_ioctl_set.o \
+		core/rtw_ieee80211.o \
+		core/rtw_mlme.o \
+		core/rtw_mlme_ext.o \
+		core/rtw_wlan_util.o \
+		core/rtw_pwrctrl.o \
+		core/rtw_rf.o \
+		core/rtw_recv.o \
+		core/rtw_sta_mgt.o \
+		core/rtw_xmit.o	\
+		core/rtw_p2p.o \
+		core/rtw_br_ext.o \
+		core/rtw_iol.o
+
+$(MODULE_NAME)-y += $(rtk_core)
+									
+$(MODULE_NAME)-y += core/efuse/rtw_efuse.o
+
+$(MODULE_NAME)-y += $(_HAL_INTFS_FILES)
+
+$(MODULE_NAME)-y += $(_OS_INTFS_FILES)
+
+
+$(MODULE_NAME)-$(CONFIG_MP_INCLUDED) += core/rtw_mp.o \
+					core/rtw_mp_ioctl.o \
+					core/rtw_ioctl_rtl.o
+
+#obj-$(CONFIG_RTL8192CU) := $(MODULE_NAME).o
+
+obj-$(CONFIG_RTL8192CU) += $(MODULE_NAME).o
+
+#else
+
+#export CONFIG_RTL8192CU = m
+
+#all: modules
+
+#modules:
+#	$(MAKE) ARCH=$(ARCH) CROSS_COMPILE=$(CROSS_COMPILE) -C $(KSRC) M=$(shell pwd)  modules
+
+#strip:
+#	$(CROSS_COMPILE)strip $(MODULE_NAME).ko --strip-unneeded
+
+#install:
+#	install -p -m 644 $(MODULE_NAME).ko  $(MODDESTDIR)
+#	/sbin/depmod -a ${KVER}
+
+#uninstall:
+#	rm -f $(MODDESTDIR)/$(MODULE_NAME).ko
+#	/sbin/depmod -a ${KVER}
+	
+	
+#config_r:
+#	@echo "make config"
+#	/bin/bash script/Configure script/config.in
+	
+.PHONY: modules clean
+
+clean:
+	rm -fr *.mod.c *.mod *.o .*.cmd *.ko *~
+	rm .tmp_versions -fr ; rm Module.symvers -fr
+	rm -fr Module.markers ; rm -fr modules.order
+	cd core/efuse ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko
+	cd core ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko 
+	cd hal/$(RTL871X)/$(HCI_NAME) ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko 
+	cd hal/$(RTL871X) ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko 
+	cd hal ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko 
+	cd os_dep/linux ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko 
+	cd os_dep ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko 
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/os_dep/linux/ioctl_linux.c linux-3.0.82x/drivers/net/wireless/rtl8188/os_dep/linux/ioctl_linux.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/os_dep/linux/ioctl_linux.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/os_dep/linux/ioctl_linux.c	2017-09-23 03:42:50.074674893 +0800
@@ -0,0 +1,9382 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define  _IOCTL_LINUX_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <wlan_bssdef.h>
+#include <rtw_debug.h>
+#include <wifi.h>
+#include <rtw_mlme.h>
+#include <rtw_mlme_ext.h>
+#include <rtw_ioctl.h>
+#include <rtw_ioctl_set.h>
+#include <rtw_ioctl_query.h>
+
+//#ifdef CONFIG_MP_INCLUDED
+#include <rtw_mp_ioctl.h>
+//#endif
+ 
+#ifdef CONFIG_USB_HCI
+#include <usb_ops.h>
+#endif //CONFIG_USB_HCI
+#include <rtw_version.h>
+
+#ifdef CONFIG_MP_INCLUDED
+#include <rtw_mp.h>
+#endif
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27))
+#define  iwe_stream_add_event(a, b, c, d, e)  iwe_stream_add_event(b, c, d, e)
+#define  iwe_stream_add_point(a, b, c, d, e)  iwe_stream_add_point(b, c, d, e)
+#endif
+
+
+#define RTL_IOCTL_WPA_SUPPLICANT	SIOCIWFIRSTPRIV+30
+
+#define SCAN_ITEM_SIZE 768
+#define MAX_CUSTOM_LEN 64
+#define RATE_COUNT 4
+
+#ifdef CONFIG_GLOBAL_UI_PID
+extern int ui_pid[3];
+#endif
+
+// combo scan
+#define WEXT_CSCAN_AMOUNT 9
+#define WEXT_CSCAN_BUF_LEN		360
+#define WEXT_CSCAN_HEADER		"CSCAN S\x01\x00\x00S\x00"
+#define WEXT_CSCAN_HEADER_SIZE		12
+#define WEXT_CSCAN_SSID_SECTION		'S'
+#define WEXT_CSCAN_CHANNEL_SECTION	'C'
+#define WEXT_CSCAN_NPROBE_SECTION	'N'
+#define WEXT_CSCAN_ACTV_DWELL_SECTION	'A'
+#define WEXT_CSCAN_PASV_DWELL_SECTION	'P'
+#define WEXT_CSCAN_HOME_DWELL_SECTION	'H'
+#define WEXT_CSCAN_TYPE_SECTION		'T'
+
+
+extern u8 key_2char2num(u8 hch, u8 lch);
+extern u8 str_2char2num(u8 hch, u8 lch);
+
+int rfpwrstate_check(_adapter *padapter);
+
+u32 rtw_rates[] = {1000000,2000000,5500000,11000000,
+	6000000,9000000,12000000,18000000,24000000,36000000,48000000,54000000};
+
+static const char * const iw_operation_mode[] = 
+{ 
+	"Auto", "Ad-Hoc", "Managed",  "Master", "Repeater", "Secondary", "Monitor" 
+};
+
+static int hex2num_i(char c)
+{
+	if (c >= '0' && c <= '9')
+		return c - '0';
+	if (c >= 'a' && c <= 'f')
+		return c - 'a' + 10;
+	if (c >= 'A' && c <= 'F')
+		return c - 'A' + 10;
+	return -1;
+}
+
+static int hex2byte_i(const char *hex)
+{
+	int a, b;
+	a = hex2num_i(*hex++);
+	if (a < 0)
+		return -1;
+	b = hex2num_i(*hex++);
+	if (b < 0)
+		return -1;
+	return (a << 4) | b;
+}
+
+/**
+ * hwaddr_aton - Convert ASCII string to MAC address
+ * @txt: MAC address as a string (e.g., "00:11:22:33:44:55")
+ * @addr: Buffer for the MAC address (ETH_ALEN = 6 bytes)
+ * Returns: 0 on success, -1 on failure (e.g., string not a MAC address)
+ */
+static int hwaddr_aton_i(const char *txt, u8 *addr)
+{
+	int i;
+
+	for (i = 0; i < 6; i++) {
+		int a, b;
+
+		a = hex2num_i(*txt++);
+		if (a < 0)
+			return -1;
+		b = hex2num_i(*txt++);
+		if (b < 0)
+			return -1;
+		*addr++ = (a << 4) | b;
+		if (i < 5 && *txt++ != ':')
+			return -1;
+	}
+
+	return 0;
+}
+
+static void indicate_wx_custom_event(_adapter *padapter, char *msg)
+{
+	u8 *buff, *p;
+	union iwreq_data wrqu;
+
+	if (strlen(msg) > IW_CUSTOM_MAX) {
+		DBG_871X("%s strlen(msg):%u > IW_CUSTOM_MAX:%u\n", __FUNCTION__ ,strlen(msg), IW_CUSTOM_MAX);
+		return;
+	}
+
+	buff = rtw_zmalloc(IW_CUSTOM_MAX+1);
+	if(!buff)
+		return;
+
+	_rtw_memcpy(buff, msg, strlen(msg));
+		
+	_rtw_memset(&wrqu,0,sizeof(wrqu));
+	wrqu.data.length = strlen(msg);
+
+	DBG_8192C("%s %s\n", __FUNCTION__, buff);	
+	wireless_send_event(padapter->pnetdev, IWEVCUSTOM, &wrqu, buff);
+
+	rtw_mfree(buff, IW_CUSTOM_MAX+1);
+
+}
+
+
+static void request_wps_pbc_event(_adapter *padapter)
+{
+	u8 *buff, *p;
+	union iwreq_data wrqu;
+
+
+	buff = rtw_malloc(IW_CUSTOM_MAX);
+	if(!buff)
+		return;
+		
+	_rtw_memset(buff, 0, IW_CUSTOM_MAX);
+		
+	p=buff;
+		
+	p+=sprintf(p, "WPS_PBC_START.request=TRUE");
+		
+	_rtw_memset(&wrqu,0,sizeof(wrqu));
+		
+	wrqu.data.length = p-buff;
+		
+	wrqu.data.length = (wrqu.data.length<IW_CUSTOM_MAX) ? wrqu.data.length:IW_CUSTOM_MAX;
+
+	DBG_8192C("%s\n", __FUNCTION__);
+		
+	wireless_send_event(padapter->pnetdev, IWEVCUSTOM, &wrqu, buff);
+
+	if(buff)
+	{
+		rtw_mfree(buff, IW_CUSTOM_MAX);
+	}
+
+}
+
+
+void indicate_wx_scan_complete_event(_adapter *padapter)
+{	
+	union iwreq_data wrqu;
+	struct	mlme_priv *pmlmepriv = &padapter->mlmepriv;	
+
+	_rtw_memset(&wrqu, 0, sizeof(union iwreq_data));
+
+	//DBG_8192C("+rtw_indicate_wx_scan_complete_event\n");
+	wireless_send_event(padapter->pnetdev, SIOCGIWSCAN, &wrqu, NULL);
+}
+
+
+void rtw_indicate_wx_assoc_event(_adapter *padapter)
+{	
+	union iwreq_data wrqu;
+	struct	mlme_priv *pmlmepriv = &padapter->mlmepriv;	
+
+	_rtw_memset(&wrqu, 0, sizeof(union iwreq_data));
+	
+	wrqu.ap_addr.sa_family = ARPHRD_ETHER;	
+	
+	_rtw_memcpy(wrqu.ap_addr.sa_data, pmlmepriv->cur_network.network.MacAddress, ETH_ALEN);
+
+	//DBG_8192C("+rtw_indicate_wx_assoc_event\n");
+	wireless_send_event(padapter->pnetdev, SIOCGIWAP, &wrqu, NULL);
+}
+
+void rtw_indicate_wx_disassoc_event(_adapter *padapter)
+{	
+	union iwreq_data wrqu;
+
+	_rtw_memset(&wrqu, 0, sizeof(union iwreq_data));
+
+	wrqu.ap_addr.sa_family = ARPHRD_ETHER;
+	_rtw_memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
+	
+	//DBG_8192C("+rtw_indicate_wx_disassoc_event\n");
+	wireless_send_event(padapter->pnetdev, SIOCGIWAP, &wrqu, NULL);
+}
+
+/*
+uint	rtw_is_cckrates_included(u8 *rate)
+{	
+		u32	i = 0;			
+
+		while(rate[i]!=0)
+		{		
+			if  (  (((rate[i]) & 0x7f) == 2)	|| (((rate[i]) & 0x7f) == 4) ||		
+			(((rate[i]) & 0x7f) == 11)  || (((rate[i]) & 0x7f) == 22) )		
+			return _TRUE;	
+			i++;
+		}
+		
+		return _FALSE;
+}
+
+uint	rtw_is_cckratesonly_included(u8 *rate)
+{
+	u32 i = 0;
+
+	while(rate[i]!=0)
+	{
+			if  (  (((rate[i]) & 0x7f) != 2) && (((rate[i]) & 0x7f) != 4) &&
+				(((rate[i]) & 0x7f) != 11)  && (((rate[i]) & 0x7f) != 22) )
+			return _FALSE;		
+			i++;
+	}
+	
+	return _TRUE;
+}
+*/
+
+static char *translate_scan(_adapter *padapter, 
+				struct iw_request_info* info, struct wlan_network *pnetwork,
+				char *start, char *stop)
+{
+	struct iw_event iwe;
+	u16 cap;
+	u32 ht_ielen = 0;
+	char custom[MAX_CUSTOM_LEN];
+	char *p;
+	u16 max_rate=0, rate, ht_cap=_FALSE;
+	u32 i = 0;	
+	char	*current_val;
+	long rssi;
+	u8 bw_40MHz=0, short_GI=0;
+	u16 mcs_rate=0;
+	struct registry_priv *pregpriv = &padapter->registrypriv;
+#ifdef CONFIG_P2P
+	struct wifidirect_info	*pwdinfo = &padapter->wdinfo;
+#endif //CONFIG_P2P
+
+#ifdef CONFIG_TDLS
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	
+	if(pnetwork->network.Reserved[1]!='T')
+		return start;
+#endif
+
+#ifdef CONFIG_P2P
+	if ( ( pwdinfo->p2p_state != P2P_STATE_NONE ) && ( pwdinfo->p2p_state != P2P_STATE_IDLE ) )
+	{
+		u32	blnGotP2PIE = _FALSE;
+		
+		//	User is doing the P2P device discovery
+		//	The prefix of SSID should be "DIRECT-" and the IE should contains the P2P IE.
+		//	If not, the driver should ignore this AP and go to the next AP.
+
+		//	Verifying the SSID
+		if ( _rtw_memcmp( pnetwork->network.Ssid.Ssid, pwdinfo->p2p_wildcard_ssid, P2P_WILDCARD_SSID_LEN ) )
+		{
+			u32	p2pielen = 0;
+
+			//	Verifying the P2P IE
+			if ( rtw_get_p2p_ie( &pnetwork->network.IEs[12], pnetwork->network.IELength - 12, NULL, &p2pielen) )
+			{
+				blnGotP2PIE = _TRUE;
+			}
+
+		}
+
+		if ( blnGotP2PIE == _FALSE )
+		{
+			return start;
+		}
+		
+	}
+
+#endif //CONFIG_P2P
+
+	/*  AP MAC address  */
+	iwe.cmd = SIOCGIWAP;
+	iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
+
+	_rtw_memcpy(iwe.u.ap_addr.sa_data, pnetwork->network.MacAddress, ETH_ALEN);
+	start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_ADDR_LEN);
+
+#ifdef CONFIG_TDLS
+	if(pmlmeinfo->tdls_dis_req==0){
+#endif
+
+	/* Add the ESSID */
+	iwe.cmd = SIOCGIWESSID;
+	iwe.u.data.flags = 1;	
+	iwe.u.data.length = min((u16)pnetwork->network.Ssid.SsidLength, (u16)32);
+	start = iwe_stream_add_point(info, start, stop, &iwe, pnetwork->network.Ssid.Ssid);
+
+#ifdef CONFIG_TDLS
+	}
+#endif
+
+	//parsing HT_CAP_IE
+#ifdef CONFIG_TDLS
+	if(pmlmeinfo->tdls_dis_req==0)
+		p = rtw_get_ie(&pnetwork->network.IEs[12], _HT_CAPABILITY_IE_, &ht_ielen, pnetwork->network.IELength-12);
+	else
+		//parsing TDLS discovery response frame, information elements start after fixed IE 5 bytes
+		p = rtw_get_ie(&pnetwork->network.IEs[5], _HT_CAPABILITY_IE_, &ht_ielen, pnetwork->network.IELength-5);
+#else
+	p = rtw_get_ie(&pnetwork->network.IEs[12], _HT_CAPABILITY_IE_, &ht_ielen, pnetwork->network.IELength-12);
+#endif
+	if(p && ht_ielen>0)
+	{
+		struct ieee80211_ht_cap *pht_capie;
+		ht_cap = _TRUE;			
+		pht_capie = (struct ieee80211_ht_cap *)(p+2);		
+		_rtw_memcpy(&mcs_rate , pht_capie->supp_mcs_set, 2);
+		bw_40MHz = (pht_capie->cap_info&IEEE80211_HT_CAP_SUP_WIDTH) ? 1:0;
+		short_GI = (pht_capie->cap_info&(IEEE80211_HT_CAP_SGI_20|IEEE80211_HT_CAP_SGI_40)) ? 1:0;
+	}
+
+	/* Add the protocol name */
+	iwe.cmd = SIOCGIWNAME;
+	if ((rtw_is_cckratesonly_included((u8*)&pnetwork->network.SupportedRates)) == _TRUE)		
+	{
+		if(ht_cap == _TRUE)
+			snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11bn");
+		else
+		snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11b");
+	}	
+	else if ((rtw_is_cckrates_included((u8*)&pnetwork->network.SupportedRates)) == _TRUE)	
+	{
+		if(ht_cap == _TRUE)
+			snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11bgn");
+		else
+		snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11bg");
+	}	
+	else
+	{
+		if(pnetwork->network.Configuration.DSConfig > 14)
+		{
+			if(ht_cap == _TRUE)
+				snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11an");
+			else
+				snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11a");
+		}
+		else
+		{
+			if(ht_cap == _TRUE)
+				snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11gn");
+			else
+				snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11g");
+		}
+	}	
+
+	start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_CHAR_LEN);
+
+#ifdef CONFIG_TDLS
+	if(pmlmeinfo->tdls_dis_req==0){
+#endif
+
+	  /* Add mode */
+        iwe.cmd = SIOCGIWMODE;
+	_rtw_memcpy((u8 *)&cap, rtw_get_capability_from_ie(pnetwork->network.IEs), 2);
+
+
+	cap = le16_to_cpu(cap);
+
+	if(cap & (WLAN_CAPABILITY_IBSS |WLAN_CAPABILITY_BSS)){
+		if (cap & WLAN_CAPABILITY_BSS)
+			iwe.u.mode = IW_MODE_MASTER;
+		else
+			iwe.u.mode = IW_MODE_ADHOC;
+
+		start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_UINT_LEN);
+	}
+
+	if(pnetwork->network.Configuration.DSConfig<1 /*|| pnetwork->network.Configuration.DSConfig>14*/)
+		pnetwork->network.Configuration.DSConfig = 1;
+
+	 /* Add frequency/channel */
+	iwe.cmd = SIOCGIWFREQ;
+	iwe.u.freq.m = rtw_ch2freq(pnetwork->network.Configuration.DSConfig) * 100000;
+	iwe.u.freq.e = 1;
+	iwe.u.freq.i = pnetwork->network.Configuration.DSConfig;
+	start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_FREQ_LEN);
+
+	/* Add encryption capability */
+	iwe.cmd = SIOCGIWENCODE;
+	if (cap & WLAN_CAPABILITY_PRIVACY)
+		iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
+	else
+		iwe.u.data.flags = IW_ENCODE_DISABLED;
+	iwe.u.data.length = 0;
+	start = iwe_stream_add_point(info, start, stop, &iwe, pnetwork->network.Ssid.Ssid);
+
+#ifdef CONFIG_TDLS
+	}
+#endif
+
+	/*Add basic and extended rates */
+	max_rate = 0;
+	p = custom;
+	p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), " Rates (Mb/s): ");
+	while(pnetwork->network.SupportedRates[i]!=0)
+	{
+		rate = pnetwork->network.SupportedRates[i]&0x7F; 
+		if (rate > max_rate)
+			max_rate = rate;
+		p += snprintf(p, MAX_CUSTOM_LEN - (p - custom),
+			      "%d%s ", rate >> 1, (rate & 1) ? ".5" : "");
+		i++;
+	}
+	
+	if(ht_cap == _TRUE)
+	{
+		if(mcs_rate&0x8000)//MCS15
+		{
+			max_rate = (bw_40MHz) ? ((short_GI)?300:270):((short_GI)?144:130);
+			
+		}
+		else if(mcs_rate&0x0080)//MCS7
+		{
+			max_rate = (bw_40MHz) ? ((short_GI)?150:135):((short_GI)?72:65);
+		}
+		else//default MCS7
+		{
+			DBG_8192C("wx_get_scan, mcs_rate_bitmap=0x%x\n", mcs_rate);
+			max_rate = (bw_40MHz) ? ((short_GI)?150:135):((short_GI)?72:65);
+		}
+
+		max_rate = max_rate*2;//Mbps/2;		
+	}
+
+	iwe.cmd = SIOCGIWRATE;
+	iwe.u.bitrate.fixed = iwe.u.bitrate.disabled = 0;
+	iwe.u.bitrate.value = max_rate * 500000;
+	start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_PARAM_LEN);
+
+#ifdef CONFIG_TDLS
+	if(pmlmeinfo->tdls_dis_req==0){
+#endif
+
+	//parsing WPA/WPA2 IE
+	{
+		u8 buf[MAX_WPA_IE_LEN];
+		u8 wpa_ie[255],rsn_ie[255];
+		u16 wpa_len=0,rsn_len=0;
+		u8 *p;
+		sint out_len=0;
+		out_len=rtw_get_sec_ie(pnetwork->network.IEs ,pnetwork->network.IELength,rsn_ie,&rsn_len,wpa_ie,&wpa_len);
+		RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_scan: ssid=%s\n",pnetwork->network.Ssid.Ssid));
+		RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_scan: wpa_len=%d rsn_len=%d\n",wpa_len,rsn_len));
+
+		if (wpa_len > 0)
+		{
+			p=buf;
+			_rtw_memset(buf, 0, MAX_WPA_IE_LEN);
+			p += sprintf(p, "wpa_ie=");
+			for (i = 0; i < wpa_len; i++) {
+				p += sprintf(p, "%02x", wpa_ie[i]);
+			}
+	
+			_rtw_memset(&iwe, 0, sizeof(iwe));
+			iwe.cmd = IWEVCUSTOM;
+			iwe.u.data.length = strlen(buf);
+			start = iwe_stream_add_point(info, start, stop, &iwe,buf);
+			
+			_rtw_memset(&iwe, 0, sizeof(iwe));
+			iwe.cmd =IWEVGENIE;
+			iwe.u.data.length = wpa_len;
+			start = iwe_stream_add_point(info, start, stop, &iwe, wpa_ie);			
+		}
+		if (rsn_len > 0)
+		{
+			p = buf;
+			_rtw_memset(buf, 0, MAX_WPA_IE_LEN);
+			p += sprintf(p, "rsn_ie=");
+			for (i = 0; i < rsn_len; i++) {
+				p += sprintf(p, "%02x", rsn_ie[i]);
+			}
+			_rtw_memset(&iwe, 0, sizeof(iwe));
+			iwe.cmd = IWEVCUSTOM;
+			iwe.u.data.length = strlen(buf);
+			start = iwe_stream_add_point(info, start, stop, &iwe,buf);
+		
+			_rtw_memset(&iwe, 0, sizeof(iwe));
+			iwe.cmd =IWEVGENIE;
+			iwe.u.data.length = rsn_len;
+			start = iwe_stream_add_point(info, start, stop, &iwe, rsn_ie);		
+		}
+	}
+
+	{ //parsing WPS IE
+		int cnt = 0,total_ielen=0;	
+		u8 *wpsie_ptr=NULL;
+		uint wps_ielen = 0;		
+
+		u8 *ie_ptr = pnetwork->network.IEs +_FIXED_IE_LENGTH_;
+		total_ielen= pnetwork->network.IELength - _FIXED_IE_LENGTH_;
+		if((ie_ptr) && (total_ielen>0))
+		{
+			while(cnt < total_ielen)
+			{
+				if(rtw_is_wps_ie(&ie_ptr[cnt], &wps_ielen) && (wps_ielen>2))			
+				{
+					wpsie_ptr = &ie_ptr[cnt];
+					iwe.cmd =IWEVGENIE;
+					iwe.u.data.length = (u16)wps_ielen;
+					start = iwe_stream_add_point(info, start, stop, &iwe, wpsie_ptr);						
+				}			
+				cnt+=ie_ptr[cnt+1]+2; //goto next		
+			}	
+		}
+	}
+
+#ifdef CONFIG_TDLS
+	}
+#endif
+
+	/* Add quality statistics */
+	iwe.cmd = IWEVQUAL;
+	rssi = pnetwork->network.Rssi;//dBM
+	
+#ifdef CONFIG_RTL8711	
+	rssi = (rssi*2) + 190;
+	if(rssi>100) rssi = 100;
+	if(rssi<0) rssi = 0;
+#endif	
+	
+	//DBG_8192C("RSSI=0x%X%%\n", rssi);
+
+	// we only update signal_level (signal strength) that is rssi.
+	iwe.u.qual.updated = IW_QUAL_QUAL_UPDATED | IW_QUAL_LEVEL_UPDATED | IW_QUAL_NOISE_INVALID
+	#ifdef CONFIG_SIGNAL_DISPLAY_DBM
+		| IW_QUAL_DBM
+	#endif
+	;
+
+	#ifdef CONFIG_SIGNAL_DISPLAY_DBM
+	iwe.u.qual.level = (u8) translate_percentage_to_dbm(pnetwork->network.PhyInfo.SignalStrength);//dbm
+	#else
+	iwe.u.qual.level = (u8)pnetwork->network.PhyInfo.SignalStrength;//%
+	#endif
+	
+	iwe.u.qual.qual = (u8)pnetwork->network.PhyInfo.SignalQuality;   // signal quality
+
+	#ifdef CONFIG_PLATFORM_ROCKCHIPS
+	iwe.u.qual.noise = -100; // noise level suggest by zhf@rockchips
+	#else 
+	iwe.u.qual.noise = 0; // noise level
+	#endif //CONFIG_PLATFORM_ROCKCHIPS
+	
+	//DBG_8192C("iqual=%d, ilevel=%d, inoise=%d, iupdated=%d\n", iwe.u.qual.qual, iwe.u.qual.level , iwe.u.qual.noise, iwe.u.qual.updated);
+
+	start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_QUAL_LEN);
+	
+	//how to translate rssi to ?%
+	//rssi = (iwe.u.qual.level*2) +  190;
+	//if(rssi>100) rssi = 100;
+	//if(rssi<0) rssi = 0;
+	
+	return start;	
+}
+
+static int wpa_set_auth_algs(struct net_device *dev, u32 value)
+{	
+	_adapter *padapter = (_adapter *) rtw_netdev_priv(dev);
+	int ret = 0;
+
+	if ((value & AUTH_ALG_SHARED_KEY)&&(value & AUTH_ALG_OPEN_SYSTEM))
+	{
+		DBG_8192C("wpa_set_auth_algs, AUTH_ALG_SHARED_KEY and  AUTH_ALG_OPEN_SYSTEM [value:0x%x]\n",value);
+		padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled;
+		padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeAutoSwitch;
+		padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Auto;
+	} 
+	else if (value & AUTH_ALG_SHARED_KEY)
+	{
+		DBG_8192C("wpa_set_auth_algs, AUTH_ALG_SHARED_KEY  [value:0x%x]\n",value);
+		padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled;
+
+#ifdef CONFIG_PLATFORM_MT53XX
+		padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeAutoSwitch;
+		padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Auto;
+#else
+		padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeShared;
+		padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Shared;
+#endif
+	} 
+	else if(value & AUTH_ALG_OPEN_SYSTEM)
+	{
+		DBG_8192C("wpa_set_auth_algs, AUTH_ALG_OPEN_SYSTEM\n");
+		//padapter->securitypriv.ndisencryptstatus = Ndis802_11EncryptionDisabled;
+		if(padapter->securitypriv.ndisauthtype < Ndis802_11AuthModeWPAPSK)
+		{
+#ifdef CONFIG_PLATFORM_MT53XX
+			padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeAutoSwitch;
+			padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Auto;
+#else
+			padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeOpen;
+ 			padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Open;
+#endif
+		}
+		
+	}
+	else if(value & AUTH_ALG_LEAP)
+	{
+		DBG_8192C("wpa_set_auth_algs, AUTH_ALG_LEAP\n");
+	}
+	else
+	{
+		DBG_8192C("wpa_set_auth_algs, error!\n");
+		ret = -EINVAL;
+	}
+
+	return ret;
+	
+}
+
+static int wpa_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len)
+{
+	int ret = 0;
+	u32 wep_key_idx, wep_key_len,wep_total_len;
+	NDIS_802_11_WEP	 *pwep = NULL;	
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv 	*pmlmepriv = &padapter->mlmepriv;		
+	struct security_priv *psecuritypriv = &padapter->securitypriv;
+#ifdef CONFIG_P2P
+	struct wifidirect_info* pwdinfo = &padapter->wdinfo;
+#endif //CONFIG_P2P
+
+_func_enter_;
+
+	param->u.crypt.err = 0;
+	param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0';
+
+	if (param_len < (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len)
+	{
+		ret =  -EINVAL;
+		goto exit;
+	}
+
+	if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff &&
+	    param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff &&
+	    param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) 
+	{
+		if (param->u.crypt.idx >= WEP_KEYS)
+		{
+			ret = -EINVAL;
+			goto exit;
+		}
+	} else {
+		ret = -EINVAL;
+		goto exit;
+	}
+
+	if (strcmp(param->u.crypt.alg, "WEP") == 0)
+	{
+		RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("wpa_set_encryption, crypt.alg = WEP\n"));
+		DBG_8192C("wpa_set_encryption, crypt.alg = WEP\n");
+
+		padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled;
+		padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_;
+		padapter->securitypriv.dot118021XGrpPrivacy=_WEP40_;
+
+		wep_key_idx = param->u.crypt.idx;
+		wep_key_len = param->u.crypt.key_len;
+
+		RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("(1)wep_key_idx=%d\n", wep_key_idx));
+		DBG_8192C("(1)wep_key_idx=%d\n", wep_key_idx);
+
+		if (wep_key_idx > WEP_KEYS)
+			return -EINVAL;
+
+		RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("(2)wep_key_idx=%d\n", wep_key_idx));
+
+		if (wep_key_len > 0) 
+		{
+		 	wep_key_len = wep_key_len <= 5 ? 5 : 13;
+			wep_total_len = wep_key_len + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial);
+		 	pwep =(NDIS_802_11_WEP	 *) rtw_malloc(wep_total_len);
+			if(pwep == NULL){
+				RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,(" wpa_set_encryption: pwep allocate fail !!!\n"));
+				goto exit;
+			}
+
+		 	_rtw_memset(pwep, 0, wep_total_len);
+
+		 	pwep->KeyLength = wep_key_len;
+			pwep->Length = wep_total_len;
+
+			if(wep_key_len==13)
+			{
+				padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_;
+				padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_;
+			}
+		}
+		else {		
+			ret = -EINVAL;
+			goto exit;
+		}
+
+		pwep->KeyIndex = wep_key_idx;
+		pwep->KeyIndex |= 0x80000000;
+
+		_rtw_memcpy(pwep->KeyMaterial,  param->u.crypt.key, pwep->KeyLength);
+
+		if(param->u.crypt.set_tx)
+		{
+			DBG_8192C("wep, set_tx=1\n");
+
+			if(rtw_set_802_11_add_wep(padapter, pwep) == (u8)_FAIL)
+			{
+				ret = -EOPNOTSUPP ;
+			}
+		}
+		else
+		{
+			DBG_8192C("wep, set_tx=0\n");
+			
+			//don't update "psecuritypriv->dot11PrivacyAlgrthm" and 
+			//"psecuritypriv->dot11PrivacyKeyIndex=keyid", but can rtw_set_key to fw/cam
+			
+			if (wep_key_idx >= WEP_KEYS) {
+				ret = -EOPNOTSUPP ;
+				goto exit;
+			}				
+			
+		      _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength);
+			psecuritypriv->dot11DefKeylen[wep_key_idx]=pwep->KeyLength;	
+			rtw_set_key(padapter, psecuritypriv, wep_key_idx, 0);
+		}
+
+		goto exit;		
+	}
+
+	if(padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) // 802_1x
+	{
+		struct sta_info * psta,*pbcmc_sta;
+		struct sta_priv * pstapriv = &padapter->stapriv;
+
+		if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_MP_STATE) == _TRUE) //sta mode
+		{
+			psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv));				
+			if (psta == NULL) {
+				//DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n"));
+			}
+			else
+			{
+				//Jeff: don't disable ieee8021x_blocked while clearing key
+				if (strcmp(param->u.crypt.alg, "none") != 0) 
+					psta->ieee8021x_blocked = _FALSE;
+				
+				if((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled)||
+						(padapter->securitypriv.ndisencryptstatus ==  Ndis802_11Encryption3Enabled))
+				{
+					psta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm;
+				}		
+
+				if(param->u.crypt.set_tx ==1)//pairwise key
+				{ 
+					_rtw_memcpy(psta->dot118021x_UncstKey.skey,  param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len));
+					
+					if(strcmp(param->u.crypt.alg, "TKIP") == 0)//set mic key
+					{						
+						//DEBUG_ERR(("\nset key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len));
+						_rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8);
+						_rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8);
+
+						padapter->securitypriv.busetkipkey=_FALSE;
+						//_set_timer(&padapter->securitypriv.tkip_timer, 50);						
+					}
+
+					//DEBUG_ERR(("\n param->u.crypt.key_len=%d\n",param->u.crypt.key_len));
+					//DEBUG_ERR(("\n ~~~~stastakey:unicastkey\n"));
+					DBG_871X("\n ~~~~stastakey:unicastkey\n");
+					
+					rtw_setstakey_cmd(padapter, (unsigned char *)psta, _TRUE);
+				}
+				else//group key
+				{ 					
+					_rtw_memcpy(padapter->securitypriv.dot118021XGrpKey[param->u.crypt.idx].skey,  param->u.crypt.key,(param->u.crypt.key_len>16 ?16:param->u.crypt.key_len));
+					_rtw_memcpy(padapter->securitypriv.dot118021XGrptxmickey[param->u.crypt.idx].skey,&(param->u.crypt.key[16]),8);
+					_rtw_memcpy(padapter->securitypriv.dot118021XGrprxmickey[param->u.crypt.idx].skey,&(param->u.crypt.key[24]),8);
+                                        padapter->securitypriv.binstallGrpkey = _TRUE;	
+					//DEBUG_ERR(("\n param->u.crypt.key_len=%d\n", param->u.crypt.key_len));
+					//DEBUG_ERR(("\n ~~~~stastakey:groupkey\n"));
+					DBG_871X("\n ~~~~stastakey:groupkey\n");
+
+					padapter->securitypriv.dot118021XGrpKeyid = param->u.crypt.idx;
+
+					rtw_set_key(padapter,&padapter->securitypriv,param->u.crypt.idx, 1);
+#ifdef CONFIG_P2P
+					if ( pwdinfo->p2p_state == P2P_STATE_PROVISIONING_ING )
+					{
+						pwdinfo->p2p_state = P2P_STATE_PROVISIONING_DONE;
+					}
+#endif //CONFIG_P2P
+					
+				}						
+			}
+
+			pbcmc_sta=rtw_get_bcmc_stainfo(padapter);
+			if(pbcmc_sta==NULL)
+			{
+				//DEBUG_ERR( ("Set OID_802_11_ADD_KEY: bcmc stainfo is null \n"));
+			}
+			else
+			{
+				//Jeff: don't disable ieee8021x_blocked while clearing key
+				if (strcmp(param->u.crypt.alg, "none") != 0) 
+					pbcmc_sta->ieee8021x_blocked = _FALSE;
+				
+				if((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled)||
+						(padapter->securitypriv.ndisencryptstatus ==  Ndis802_11Encryption3Enabled))
+				{							
+					pbcmc_sta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm;
+				}					
+			}				
+		}
+		else if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) //adhoc mode
+		{		
+		}			
+	}
+
+exit:
+	
+	if (pwep) {
+		rtw_mfree((u8 *)pwep,wep_total_len);		
+	}	
+	
+	_func_exit_;
+	
+	return ret;	
+}
+
+static int rtw_set_wpa_ie(_adapter *padapter, char *pie, unsigned short ielen)
+{
+	u8 *buf=NULL, *pos=NULL;	
+	u32 left; 	
+	int group_cipher = 0, pairwise_cipher = 0;
+	int ret = 0;
+#ifdef CONFIG_P2P
+	struct wifidirect_info* pwdinfo = &padapter->wdinfo;
+#endif //CONFIG_P2P
+
+	if((ielen > MAX_WPA_IE_LEN) || (pie == NULL)){
+		padapter->securitypriv.wps_phase = _FALSE;	
+		if(pie == NULL)	
+			return ret;
+		else
+			return -EINVAL;
+	}
+
+	if(ielen)
+	{		
+		buf = rtw_zmalloc(ielen);
+		if (buf == NULL){
+			ret =  -ENOMEM;
+			goto exit;
+		}
+	
+		_rtw_memcpy(buf, pie , ielen);
+
+		//dump
+		{
+			int i;
+			DBG_8192C("\n wpa_ie(length:%d):\n", ielen);
+			for(i=0;i<ielen;i=i+8)
+				DBG_8192C("0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x \n",buf[i],buf[i+1],buf[i+2],buf[i+3],buf[i+4],buf[i+5],buf[i+6],buf[i+7]);
+		}
+	
+		pos = buf;
+		if(ielen < RSN_HEADER_LEN){
+			RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("Ie len too short %d\n", ielen));
+			ret  = -1;
+			goto exit;
+		}
+
+#if 0
+		pos += RSN_HEADER_LEN;
+		left  = ielen - RSN_HEADER_LEN;
+		
+		if (left >= RSN_SELECTOR_LEN){
+			pos += RSN_SELECTOR_LEN;
+			left -= RSN_SELECTOR_LEN;
+		}		
+		else if (left > 0){
+			RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("Ie length mismatch, %u too much \n", left));
+			ret =-1;
+			goto exit;
+		}
+#endif		
+		
+		if(rtw_parse_wpa_ie(buf, ielen, &group_cipher, &pairwise_cipher) == _SUCCESS)
+		{
+			padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X;
+			padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeWPAPSK;
+			_rtw_memcpy(padapter->securitypriv.supplicant_ie, &buf[0], ielen);	
+		}
+	
+		if(rtw_parse_wpa2_ie(buf, ielen, &group_cipher, &pairwise_cipher) == _SUCCESS)
+		{
+			padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X;
+			padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeWPA2PSK;	
+			_rtw_memcpy(padapter->securitypriv.supplicant_ie, &buf[0], ielen);	
+		}
+			
+		switch(group_cipher)
+		{
+			case WPA_CIPHER_NONE:
+				padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_;
+				padapter->securitypriv.ndisencryptstatus=Ndis802_11EncryptionDisabled;
+				break;
+			case WPA_CIPHER_WEP40:
+				padapter->securitypriv.dot118021XGrpPrivacy=_WEP40_;
+				padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled;
+				break;
+			case WPA_CIPHER_TKIP:
+				padapter->securitypriv.dot118021XGrpPrivacy=_TKIP_;
+				padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled;
+				break;
+			case WPA_CIPHER_CCMP:
+				padapter->securitypriv.dot118021XGrpPrivacy=_AES_;
+				padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled;
+				break;
+			case WPA_CIPHER_WEP104:	
+				padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_;
+				padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled;
+				break;
+		}
+
+		switch(pairwise_cipher)
+		{
+			case WPA_CIPHER_NONE:
+				padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_;
+				padapter->securitypriv.ndisencryptstatus=Ndis802_11EncryptionDisabled;
+				break;
+			case WPA_CIPHER_WEP40:
+				padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_;
+				padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled;
+				break;
+			case WPA_CIPHER_TKIP:
+				padapter->securitypriv.dot11PrivacyAlgrthm=_TKIP_;
+				padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled;
+				break;
+			case WPA_CIPHER_CCMP:
+				padapter->securitypriv.dot11PrivacyAlgrthm=_AES_;
+				padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled;
+				break;
+			case WPA_CIPHER_WEP104:	
+				padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_;
+				padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled;
+				break;
+		}
+		
+		padapter->securitypriv.wps_phase = _FALSE;			
+		{//set wps_ie	
+			u16 cnt = 0;	
+			u8 eid, wps_oui[4]={0x0,0x50,0xf2,0x04};
+			 
+			while( cnt < ielen )
+			{
+				eid = buf[cnt];
+		
+				if((eid==_VENDOR_SPECIFIC_IE_)&&(_rtw_memcmp(&buf[cnt+2], wps_oui, 4)==_TRUE))
+				{
+					DBG_8192C("SET WPS_IE\n");
+
+					padapter->securitypriv.wps_ie_len = ( (buf[cnt+1]+2) < (MAX_WPA_IE_LEN<<2)) ? (buf[cnt+1]+2):(MAX_WPA_IE_LEN<<2);
+					
+					_rtw_memcpy(padapter->securitypriv.wps_ie, &buf[cnt], padapter->securitypriv.wps_ie_len);
+					
+					padapter->securitypriv.wps_phase = _TRUE;
+					
+#ifdef CONFIG_P2P
+					if ( pwdinfo->p2p_state == P2P_STATE_GONEGO_OK )
+					{
+						pwdinfo->p2p_state = P2P_STATE_PROVISIONING_ING;
+					}
+#endif //CONFIG_P2P
+					DBG_8192C("SET WPS_IE, wps_phase==_TRUE\n");
+
+					cnt += buf[cnt+1]+2;
+					
+					break;
+				} else {
+					cnt += buf[cnt+1]+2; //goto next	
+				}				
+			}			
+		}		
+	}
+	
+	RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_,
+		 ("rtw_set_wpa_ie: pairwise_cipher=0x%08x padapter->securitypriv.ndisencryptstatus=%d padapter->securitypriv.ndisauthtype=%d\n",
+		  pairwise_cipher, padapter->securitypriv.ndisencryptstatus, padapter->securitypriv.ndisauthtype));
+ 	
+exit:
+
+	if (buf) rtw_mfree(buf, ielen);
+	
+	return ret;	
+}
+
+static int rtw_wx_get_name(struct net_device *dev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	u16 cap;
+	u32 ht_ielen = 0;
+	char *p;
+	u8 ht_cap=_FALSE;
+	struct	mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	WLAN_BSSID_EX  *pcur_bss = &pmlmepriv->cur_network.network;
+	NDIS_802_11_RATES_EX* prates = NULL;
+
+	RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("cmd_code=%x\n", info->cmd));
+
+	_func_enter_;	
+
+	if (check_fwstate(pmlmepriv, _FW_LINKED|WIFI_ADHOC_MASTER_STATE) == _TRUE)
+	{
+		//parsing HT_CAP_IE
+		p = rtw_get_ie(&pcur_bss->IEs[12], _HT_CAPABILITY_IE_, &ht_ielen, pcur_bss->IELength-12);
+		if(p && ht_ielen>0)
+		{
+			ht_cap = _TRUE;
+		}
+
+		prates = &pcur_bss->SupportedRates;
+
+		if (rtw_is_cckratesonly_included((u8*)prates) == _TRUE)
+		{
+			if(ht_cap == _TRUE)
+				snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11bn");
+			else
+				snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11b");
+		}
+		else if ((rtw_is_cckrates_included((u8*)prates)) == _TRUE)
+		{
+			if(ht_cap == _TRUE)
+				snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11bgn");
+			else
+				snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11bg");
+		}
+		else
+		{
+			if(pcur_bss->Configuration.DSConfig > 14)
+			{
+				if(ht_cap == _TRUE)
+					snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11an");
+				else
+					snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11a");
+			}
+			else
+			{
+				if(ht_cap == _TRUE)
+					snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11gn");
+				else
+					snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11g");
+			}
+		}
+	}
+	else
+	{
+		//prates = &padapter->registrypriv.dev_network.SupportedRates;
+		//snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11g");
+		snprintf(wrqu->name, IFNAMSIZ, "unassociated");
+	}
+
+	_func_exit_;
+
+	return 0;
+}
+
+static int rtw_wx_set_freq(struct net_device *dev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{	
+	_func_enter_;
+
+	RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ("+rtw_wx_set_freq\n"));
+
+	_func_exit_;
+	
+	return 0;
+}
+
+static int rtw_wx_get_freq(struct net_device *dev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct	mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	WLAN_BSSID_EX  *pcur_bss = &pmlmepriv->cur_network.network;
+	
+	if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
+	{
+		//wrqu->freq.m = ieee80211_wlan_frequencies[pcur_bss->Configuration.DSConfig-1] * 100000;
+		wrqu->freq.m = rtw_ch2freq(pcur_bss->Configuration.DSConfig) * 100000;
+		wrqu->freq.e = 1;
+		wrqu->freq.i = pcur_bss->Configuration.DSConfig;
+
+	}
+	else{
+		wrqu->freq.m = rtw_ch2freq(padapter->mlmeextpriv.cur_channel) * 100000;
+		wrqu->freq.e = 1;
+		wrqu->freq.i = padapter->mlmeextpriv.cur_channel;
+	}
+
+	return 0;
+}
+
+static int rtw_wx_set_mode(struct net_device *dev, struct iw_request_info *a,
+			     union iwreq_data *wrqu, char *b)
+{
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	NDIS_802_11_NETWORK_INFRASTRUCTURE networkType ;
+	int ret = 0;
+	
+	_func_enter_;
+	
+	if(_FAIL == rfpwrstate_check(padapter)) {
+		ret= -EPERM;
+		goto exit;
+	}
+
+	if (padapter->hw_init_completed==_FALSE){
+		ret = -EPERM;
+		goto exit;
+	}
+	
+	switch(wrqu->mode)
+	{
+		case IW_MODE_AUTO:
+			networkType = Ndis802_11AutoUnknown;
+			DBG_8192C("set_mode = IW_MODE_AUTO\n");	
+			break;				
+		case IW_MODE_ADHOC:		
+			networkType = Ndis802_11IBSS;
+			DBG_8192C("set_mode = IW_MODE_ADHOC\n");			
+			break;
+		case IW_MODE_MASTER:		
+			networkType = Ndis802_11APMode;
+			DBG_8192C("set_mode = IW_MODE_MASTER\n");
+                        //rtw_setopmode_cmd(padapter, networkType);	
+			break;				
+		case IW_MODE_INFRA:
+			networkType = Ndis802_11Infrastructure;
+			DBG_8192C("set_mode = IW_MODE_INFRA\n");			
+			break;
+	
+		default :
+			ret = -EINVAL;;
+			RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("\n Mode: %s is not supported  \n", iw_operation_mode[wrqu->mode]));
+			goto exit;
+	}
+	
+/*	
+	if(Ndis802_11APMode == networkType)
+	{
+		rtw_setopmode_cmd(padapter, networkType);
+	}	
+	else
+	{
+		rtw_setopmode_cmd(padapter, Ndis802_11AutoUnknown);	
+	}
+*/
+	
+	if (rtw_set_802_11_infrastructure_mode(padapter, networkType) ==_FALSE){
+
+		ret = -EPERM;
+		goto exit;
+
+	}
+
+	rtw_setopmode_cmd(padapter, networkType);
+
+exit:
+	
+	_func_exit_;
+	
+	return ret;
+	
+}
+
+static int rtw_wx_get_mode(struct net_device *dev, struct iw_request_info *a,
+			     union iwreq_data *wrqu, char *b)
+{
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct	mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	
+	RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,(" rtw_wx_get_mode \n"));
+
+	_func_enter_;
+	
+	if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
+	{
+		wrqu->mode = IW_MODE_INFRA;
+	}
+	else if  ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) ||
+		       (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE))
+		
+	{
+		wrqu->mode = IW_MODE_ADHOC;
+	}
+	else if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)
+	{
+		wrqu->mode = IW_MODE_MASTER;
+	}
+	else
+	{
+		wrqu->mode = IW_MODE_AUTO;
+	}
+
+	_func_exit_;
+	
+	return 0;
+	
+}
+
+
+static int rtw_wx_set_pmkid(struct net_device *dev,
+	                     struct iw_request_info *a,
+			     union iwreq_data *wrqu, char *extra)
+{
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	u8          j,blInserted = _FALSE;
+	int         intReturn = _FALSE;
+	struct mlme_priv  *pmlmepriv = &padapter->mlmepriv;
+	struct security_priv *psecuritypriv = &padapter->securitypriv;
+        struct iw_pmksa*  pPMK = ( struct iw_pmksa* ) extra;
+        u8     strZeroMacAddress[ ETH_ALEN ] = { 0x00 };
+        u8     strIssueBssid[ ETH_ALEN ] = { 0x00 };
+        
+/*
+        struct iw_pmksa
+        {
+            __u32   cmd;
+            struct sockaddr bssid;
+            __u8    pmkid[IW_PMKID_LEN];   //IW_PMKID_LEN=16
+        }
+        There are the BSSID information in the bssid.sa_data array.
+        If cmd is IW_PMKSA_FLUSH, it means the wpa_suppplicant wants to clear all the PMKID information.
+        If cmd is IW_PMKSA_ADD, it means the wpa_supplicant wants to add a PMKID/BSSID to driver.
+        If cmd is IW_PMKSA_REMOVE, it means the wpa_supplicant wants to remove a PMKID/BSSID from driver.
+        */
+
+	_rtw_memcpy( strIssueBssid, pPMK->bssid.sa_data, ETH_ALEN);
+        if ( pPMK->cmd == IW_PMKSA_ADD )
+        {
+                DBG_8192C( "[rtw_wx_set_pmkid] IW_PMKSA_ADD!\n" );
+                if ( _rtw_memcmp( strIssueBssid, strZeroMacAddress, ETH_ALEN ) == _TRUE )
+                {
+                    return( intReturn );
+                }
+                else
+                {
+                    intReturn = _TRUE;
+                }
+		blInserted = _FALSE;
+		
+		//overwrite PMKID
+		for(j=0 ; j<NUM_PMKID_CACHE; j++)
+		{
+			if( _rtw_memcmp( psecuritypriv->PMKIDList[j].Bssid, strIssueBssid, ETH_ALEN) ==_TRUE )
+			{ // BSSID is matched, the same AP => rewrite with new PMKID.
+                                
+                                DBG_8192C( "[rtw_wx_set_pmkid] BSSID exists in the PMKList.\n" );
+
+				_rtw_memcpy( psecuritypriv->PMKIDList[j].PMKID, pPMK->pmkid, IW_PMKID_LEN);
+                                psecuritypriv->PMKIDList[ j ].bUsed = _TRUE;
+				psecuritypriv->PMKIDIndex = j+1;
+				blInserted = _TRUE;
+				break;
+			}	
+	        }
+
+	        if(!blInserted)
+                {
+		    // Find a new entry
+                    DBG_8192C( "[rtw_wx_set_pmkid] Use the new entry index = %d for this PMKID.\n",
+                            psecuritypriv->PMKIDIndex );
+
+	            _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].Bssid, strIssueBssid, ETH_ALEN);
+		    _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].PMKID, pPMK->pmkid, IW_PMKID_LEN);
+
+                    psecuritypriv->PMKIDList[ psecuritypriv->PMKIDIndex ].bUsed = _TRUE;
+		    psecuritypriv->PMKIDIndex++ ;
+		    if(psecuritypriv->PMKIDIndex==16)
+                    {
+		        psecuritypriv->PMKIDIndex =0;
+                    }
+		}
+        }
+        else if ( pPMK->cmd == IW_PMKSA_REMOVE )
+        {
+                DBG_8192C( "[rtw_wx_set_pmkid] IW_PMKSA_REMOVE!\n" );
+                intReturn = _TRUE;
+		for(j=0 ; j<NUM_PMKID_CACHE; j++)
+		{
+			if( _rtw_memcmp( psecuritypriv->PMKIDList[j].Bssid, strIssueBssid, ETH_ALEN) ==_TRUE )
+			{ // BSSID is matched, the same AP => Remove this PMKID information and reset it. 
+                                _rtw_memset( psecuritypriv->PMKIDList[ j ].Bssid, 0x00, ETH_ALEN );
+                                psecuritypriv->PMKIDList[ j ].bUsed = _FALSE;
+				break;
+			}	
+	        }
+        }
+        else if ( pPMK->cmd == IW_PMKSA_FLUSH ) 
+        {
+            DBG_8192C( "[rtw_wx_set_pmkid] IW_PMKSA_FLUSH!\n" );
+            _rtw_memset( &psecuritypriv->PMKIDList[ 0 ], 0x00, sizeof( RT_PMKID_LIST ) * NUM_PMKID_CACHE );
+            psecuritypriv->PMKIDIndex = 0;
+            intReturn = _TRUE;
+        }
+    return( intReturn );
+}
+
+static int rtw_wx_get_sens(struct net_device *dev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	#ifdef CONFIG_PLATFORM_ROCKCHIPS
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); 
+	
+	/*
+	*  20110311 Commented by Jeff
+	*  For rockchip platform's wpa_driver_wext_get_rssi
+	*/
+	if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) {
+		//wrqu->sens.value=-padapter->recvpriv.signal_strength;
+		wrqu->sens.value=-padapter->recvpriv.rssi;
+		//DBG_871X("%s: %d\n", __FUNCTION__, wrqu->sens.value);
+		wrqu->sens.fixed = 0; /* no auto select */ 
+	} else 
+	#endif
+	{
+		wrqu->sens.value = 0;
+		wrqu->sens.fixed = 0;	/* no auto select */
+		wrqu->sens.disabled = 1;
+	}
+	return 0;
+}
+
+static int rtw_wx_get_range(struct net_device *dev, 
+				struct iw_request_info *info, 
+				union iwreq_data *wrqu, char *extra)
+{
+	struct iw_range *range = (struct iw_range *)extra;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+
+	u16 val;
+	int i;
+	
+	_func_enter_;
+	
+	RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_range. cmd_code=%x\n", info->cmd));
+
+	wrqu->data.length = sizeof(*range);
+	_rtw_memset(range, 0, sizeof(*range));
+
+	/* Let's try to keep this struct in the same order as in
+	 * linux/include/wireless.h
+	 */
+
+	/* TODO: See what values we can set, and remove the ones we can't
+	 * set, or fill them with some default data.
+	 */
+
+	/* ~5 Mb/s real (802.11b) */
+	range->throughput = 5 * 1000 * 1000;     
+
+	// TODO: Not used in 802.11b?
+//	range->min_nwid;	/* Minimal NWID we are able to set */
+	// TODO: Not used in 802.11b?
+//	range->max_nwid;	/* Maximal NWID we are able to set */
+
+        /* Old Frequency (backward compat - moved lower ) */
+//	range->old_num_channels; 
+//	range->old_num_frequency;
+//	range->old_freq[6]; /* Filler to keep "version" at the same offset */
+
+	/* signal level threshold range */
+
+	//percent values between 0 and 100.
+	range->max_qual.qual = 100;	
+	range->max_qual.level = 100;
+	range->max_qual.noise = 100;
+	range->max_qual.updated = 7; /* Updated all three */
+
+
+	range->avg_qual.qual = 92; /* > 8% missed beacons is 'bad' */
+	/* TODO: Find real 'good' to 'bad' threshol value for RSSI */
+	range->avg_qual.level = 20 + -98;
+	range->avg_qual.noise = 0;
+	range->avg_qual.updated = 7; /* Updated all three */
+
+	range->num_bitrates = RATE_COUNT;
+
+	for (i = 0; i < RATE_COUNT && i < IW_MAX_BITRATES; i++) {
+		range->bitrate[i] = rtw_rates[i];
+	}
+
+	range->min_frag = MIN_FRAG_THRESHOLD;
+	range->max_frag = MAX_FRAG_THRESHOLD;
+
+	range->pm_capa = 0;
+
+	range->we_version_compiled = WIRELESS_EXT;
+	range->we_version_source = 16;
+
+//	range->retry_capa;	/* What retry options are supported */
+//	range->retry_flags;	/* How to decode max/min retry limit */
+//	range->r_time_flags;	/* How to decode max/min retry life */
+//	range->min_retry;	/* Minimal number of retries */
+//	range->max_retry;	/* Maximal number of retries */
+//	range->min_r_time;	/* Minimal retry lifetime */
+//	range->max_r_time;	/* Maximal retry lifetime */
+
+	for (i = 0, val = 0; i < MAX_CHANNEL_NUM; i++) {
+
+		// Include only legal frequencies for some countries
+		if(pmlmeext->channel_set[i].ChannelNum != 0)
+		{
+			range->freq[val].i = pmlmeext->channel_set[i].ChannelNum;
+			range->freq[val].m = rtw_ch2freq(pmlmeext->channel_set[i].ChannelNum) * 100000;
+			range->freq[val].e = 1;
+			val++;
+		}
+
+		if (val == IW_MAX_FREQUENCIES)
+			break;
+	}
+
+	range->num_channels = val;
+	range->num_frequency = val;
+
+// Commented by Albert 2009/10/13
+// The following code will proivde the security capability to network manager.
+// If the driver doesn't provide this capability to network manager,
+// the WPA/WPA2 routers can't be choosen in the network manager.
+
+/*
+#define IW_SCAN_CAPA_NONE		0x00
+#define IW_SCAN_CAPA_ESSID		0x01
+#define IW_SCAN_CAPA_BSSID		0x02
+#define IW_SCAN_CAPA_CHANNEL	0x04
+#define IW_SCAN_CAPA_MODE		0x08
+#define IW_SCAN_CAPA_RATE		0x10
+#define IW_SCAN_CAPA_TYPE		0x20
+#define IW_SCAN_CAPA_TIME		0x40
+*/
+
+#if WIRELESS_EXT > 17
+	range->enc_capa = IW_ENC_CAPA_WPA|IW_ENC_CAPA_WPA2|
+			  IW_ENC_CAPA_CIPHER_TKIP|IW_ENC_CAPA_CIPHER_CCMP;
+#endif
+
+#ifdef IW_SCAN_CAPA_ESSID //WIRELESS_EXT > 21
+	range->scan_capa = IW_SCAN_CAPA_ESSID | IW_SCAN_CAPA_TYPE |IW_SCAN_CAPA_BSSID|
+					IW_SCAN_CAPA_CHANNEL|IW_SCAN_CAPA_MODE|IW_SCAN_CAPA_RATE;
+#endif
+
+
+	_func_exit_;
+
+	return 0;
+
+}
+
+//set bssid flow
+//s1. rtw_set_802_11_infrastructure_mode()
+//s2. rtw_set_802_11_authentication_mode()
+//s3. set_802_11_encryption_mode()
+//s4. rtw_set_802_11_bssid()
+static int rtw_wx_set_wap(struct net_device *dev,
+			 struct iw_request_info *info,
+			 union iwreq_data *awrq,
+			 char *extra)
+{
+	_irqL	irqL;
+	uint ret = 0;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct sockaddr *temp = (struct sockaddr *)awrq;
+	struct	mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	_list	*phead;
+	u8 *dst_bssid, *src_bssid;
+	_queue	*queue	= &(pmlmepriv->scanned_queue);
+	struct	wlan_network	*pnetwork = NULL;
+	NDIS_802_11_AUTHENTICATION_MODE	authmode;
+
+	_func_enter_;
+	
+	if(_FAIL == rfpwrstate_check(padapter))
+	{
+		ret= -1;
+		goto exit;
+	}
+	
+	if(!padapter->bup){
+		ret = -1;
+		goto exit;
+	}
+
+	
+	if (temp->sa_family != ARPHRD_ETHER){
+		ret = -EINVAL;
+		goto exit;
+	}
+
+	authmode = padapter->securitypriv.ndisauthtype;
+	_enter_critical_bh(&queue->lock, &irqL);
+       phead = get_list_head(queue);
+       pmlmepriv->pscanned = get_next(phead);
+
+	while (1)
+	 {
+			
+		if ((rtw_end_of_queue_search(phead, pmlmepriv->pscanned)) == _TRUE)
+		{
+#if 0		
+			ret = -EINVAL;
+			goto exit;
+
+			if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)
+			{
+	            		rtw_set_802_11_bssid(padapter, temp->sa_data);
+	    			goto exit;                    
+			}
+			else
+			{
+				ret = -EINVAL;
+				goto exit;
+			}
+#endif
+
+			if (rtw_set_802_11_bssid(padapter, temp->sa_data) == _FALSE)
+				ret = -1;
+			_exit_critical_bh(&queue->lock, &irqL);
+	    		goto exit;   			
+		}
+	
+		pnetwork = LIST_CONTAINOR(pmlmepriv->pscanned, struct wlan_network, list);
+
+		pmlmepriv->pscanned = get_next(pmlmepriv->pscanned);
+
+		dst_bssid = pnetwork->network.MacAddress;
+
+		src_bssid = temp->sa_data;
+
+		if ((_rtw_memcmp(dst_bssid, src_bssid, ETH_ALEN)) == _TRUE)
+		{			
+			if(!rtw_set_802_11_infrastructure_mode(padapter, pnetwork->network.InfrastructureMode))
+			{
+				ret = -1;
+				_exit_critical_bh(&queue->lock, &irqL);
+				goto exit;
+			}
+
+				break;			
+		}
+
+	}		
+	_exit_critical_bh(&queue->lock, &irqL);
+	rtw_set_802_11_authentication_mode(padapter, authmode);
+
+	//set_802_11_encryption_mode(padapter, padapter->securitypriv.ndisencryptstatus);
+	
+	if (rtw_set_802_11_bssid(padapter, temp->sa_data) == _FALSE) {
+		ret = -1;
+		goto exit;		
+	}	
+	
+exit:
+	
+	_func_exit_;
+	
+	return ret;	
+}
+
+static int rtw_wx_get_wap(struct net_device *dev, 
+			    struct iw_request_info *info, 
+			    union iwreq_data *wrqu, char *extra)
+{
+
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);	
+	struct	mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	WLAN_BSSID_EX  *pcur_bss = &pmlmepriv->cur_network.network;	
+	
+	wrqu->ap_addr.sa_family = ARPHRD_ETHER;
+	
+	_rtw_memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN);
+	
+	RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_wap\n"));
+
+	_func_enter_;
+
+	if  ( ((check_fwstate(pmlmepriv, _FW_LINKED)) == _TRUE) || 
+			((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) == _TRUE) ||
+			((check_fwstate(pmlmepriv, WIFI_AP_STATE)) == _TRUE) )
+	{
+
+		_rtw_memcpy(wrqu->ap_addr.sa_data, pcur_bss->MacAddress, ETH_ALEN);
+	}
+	else
+	{
+	 	_rtw_memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN);
+	}		
+
+	_func_exit_;
+	
+	return 0;
+	
+}
+
+static int rtw_wx_set_mlme(struct net_device *dev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+#if 0
+/* SIOCSIWMLME data */
+struct	iw_mlme
+{
+	__u16		cmd; /* IW_MLME_* */
+	__u16		reason_code;
+	struct sockaddr	addr;
+};
+#endif
+
+	int ret=0;
+	u16 reason;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct iw_mlme *mlme = (struct iw_mlme *) extra;
+	
+
+	if(mlme==NULL)
+		return -1;
+
+	reason = cpu_to_le16(mlme->reason_code);
+
+	switch (mlme->cmd) 
+	{
+		case IW_MLME_DEAUTH:			
+				if(!rtw_set_802_11_disassociate(padapter))
+				ret = -1;						
+				break;
+				
+		case IW_MLME_DISASSOC:			
+				if(!rtw_set_802_11_disassociate(padapter))
+						ret = -1;		
+				
+				break;
+				
+		default:
+			return -EOPNOTSUPP;
+	}
+	
+	return ret;
+	
+}
+
+int rfpwrstate_check(_adapter *padapter)
+{
+	struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;	
+	int ret = _SUCCESS;
+
+	//block here for system suspend only
+	if((pwrpriv->bInternalAutoSuspend == _FALSE) && (_TRUE == pwrpriv->bInSuspend )){
+		ret = _FAIL;
+		goto exit;
+	}
+		
+	if( pwrpriv->power_mgnt == PS_MODE_ACTIVE ) {
+		goto exit;
+	}
+
+	if((pwrpriv->bInternalAutoSuspend == _TRUE)  && (padapter->net_closed == _TRUE)) {
+		ret = _FAIL;
+		goto exit;
+	}
+	if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
+	{
+		ret = _SUCCESS;
+		goto exit;
+	}
+		
+	if(rf_off == pwrpriv->rf_pwrstate )
+	{		
+#ifdef CONFIG_USB_HCI
+#ifdef CONFIG_AUTOSUSPEND
+		 if(pwrpriv->brfoffbyhw==_TRUE)
+		{
+			DBG_8192C("hw still in rf_off state ...........\n");
+			ret = _FAIL;
+			goto exit;
+		}
+		else if(padapter->registrypriv.usbss_enable)
+		{
+			DBG_8192C("\n %s call autoresume_enter....\n",__FUNCTION__);	
+			if(_FAIL ==  autoresume_enter(padapter))
+			{
+				DBG_8192C("======> autoresume fail.............\n");
+				ret = _FAIL;
+				goto exit;
+			}	
+		}
+		else
+#endif
+#endif
+		{
+#ifdef CONFIG_IPS
+			DBG_8192C("\n %s call ips_leave....\n",__FUNCTION__);				
+			if(_FAIL ==  ips_leave(padapter))
+			{
+				DBG_8192C("======> ips_leave fail.............\n");
+				ret = _FAIL;
+				goto exit;
+			}
+#endif
+		}
+	}else {
+		//Jeff: reset timer to avoid falling ips or selective suspend soon
+	if(pwrpriv->bips_processing == _FALSE)
+		rtw_set_pwr_state_check_timer(pwrpriv);
+	}
+
+exit:
+	return ret;
+
+}
+
+static int rtw_wx_set_scan(struct net_device *dev, struct iw_request_info *a,
+			     union iwreq_data *wrqu, char *extra)
+{
+	u8 _status = _FALSE;
+	int ret = 0;	
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv *pmlmepriv= &padapter->mlmepriv;
+	NDIS_802_11_SSID ssid[RTW_SSID_SCAN_AMOUNT];
+	_irqL	irqL;
+
+#ifdef CONFIG_P2P
+	struct wifidirect_info *pwdinfo= &(padapter->wdinfo);	
+#endif //CONFIG_P2P
+	RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_set_scan\n"));
+
+_func_enter_;
+
+	#ifdef DBG_IOCTL
+	DBG_871X("DBG_IOCTL %s:%d\n",__FUNCTION__, __LINE__);
+	#endif
+
+#ifdef CONFIG_MP_INCLUDED
+	if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE)
+	{
+		ret = -1;
+		goto exit;
+	}
+#endif
+
+	if(_FAIL == rfpwrstate_check(padapter))
+	{
+		ret= -1;
+		goto exit;
+	}
+
+	if(padapter->bDriverStopped){
+           DBG_8192C("bDriverStopped=%d\n", padapter->bDriverStopped);
+		ret= -1;
+		goto exit;
+	}
+	
+	if(!padapter->bup){
+		ret = -1;
+		goto exit;
+	}
+	
+	if (padapter->hw_init_completed==_FALSE){
+		ret = -1;
+		goto exit;
+	}
+
+	// When Busy Traffic, driver do not site survey. So driver return success.
+	// wpa_supplicant will not issue SIOCSIWSCAN cmd again after scan timeout.
+	// modify by thomas 2011-02-22.
+	if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE)
+	{
+		indicate_wx_scan_complete_event(padapter);
+		goto exit;
+	} 
+
+	if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE)
+	{
+		indicate_wx_scan_complete_event(padapter);
+		goto exit;
+	} 
+
+//	Mareded by Albert 20101103
+//	For the DMP WiFi Display project, the driver won't to scan because
+//	the pmlmepriv->scan_interval is always equal to 3.
+//	So, the wpa_supplicant won't find out the WPS SoftAP.
+
+/*
+	if(pmlmepriv->scan_interval>10)
+		pmlmepriv->scan_interval = 0;
+
+	if(pmlmepriv->scan_interval > 0)
+	{
+		DBG_8192C("scan done\n");
+		ret = 0;
+		goto exit;
+	}
+		
+*/
+#ifdef CONFIG_P2P
+	if ( ( pwdinfo->p2p_state != P2P_STATE_NONE ) && ( pwdinfo->p2p_state != P2P_STATE_IDLE ) )
+	{
+		pwdinfo->p2p_state = P2P_STATE_FIND_PHASE_SEARCH;
+		pwdinfo->find_phase_state_exchange_cnt = 0;
+		rtw_free_network_queue(padapter, _TRUE);
+	}
+#endif //CONFIG_P2P
+
+	_rtw_memset(ssid, 0, sizeof(NDIS_802_11_SSID)*RTW_SSID_SCAN_AMOUNT);
+
+#if WIRELESS_EXT >= 17
+	if (wrqu->data.length == sizeof(struct iw_scan_req)) 
+	{
+		struct iw_scan_req *req = (struct iw_scan_req *)extra;
+	
+		if (wrqu->data.flags & IW_SCAN_THIS_ESSID)
+		{
+			int len = min((int)req->essid_len, IW_ESSID_MAX_SIZE);
+
+			_rtw_memcpy(ssid[0].Ssid, req->essid, len);
+			ssid[0].SsidLength = len;	
+
+			DBG_8192C("IW_SCAN_THIS_ESSID, ssid=%s, len=%d\n", req->essid, req->essid_len);
+		
+			_enter_critical_bh(&pmlmepriv->lock, &irqL);				
+		
+			_status = rtw_sitesurvey_cmd(padapter, ssid, 1);
+		
+			_exit_critical_bh(&pmlmepriv->lock, &irqL);
+			
+		}
+		else if (req->scan_type == IW_SCAN_TYPE_PASSIVE)
+		{
+			DBG_8192C("rtw_wx_set_scan, req->scan_type == IW_SCAN_TYPE_PASSIVE\n");
+		}
+		
+	}
+	else
+#endif
+
+	if(	wrqu->data.length >= WEXT_CSCAN_HEADER_SIZE
+		&& _rtw_memcmp(extra, WEXT_CSCAN_HEADER, WEXT_CSCAN_HEADER_SIZE) == _TRUE
+	)
+	{
+		int len = wrqu->data.length -WEXT_CSCAN_HEADER_SIZE;
+		char *pos = extra+WEXT_CSCAN_HEADER_SIZE;
+		char section;
+		char sec_len;
+		int ssid_index = 0;
+
+		//DBG_871X("%s COMBO_SCAN header is recognized\n", __FUNCTION__);
+		
+		while(len >= 1) {
+			section = *(pos++); len-=1;
+
+			switch(section) {
+				case WEXT_CSCAN_SSID_SECTION:
+					//DBG_871X("WEXT_CSCAN_SSID_SECTION\n");
+					if(len < 1) {
+						len = 0;
+						break;
+					}
+					
+					sec_len = *(pos++); len-=1;
+
+					if(sec_len>0 && sec_len<=len) {
+						ssid[ssid_index].SsidLength = sec_len;
+						_rtw_memcpy(ssid[ssid_index].Ssid, pos, ssid[ssid_index].SsidLength);
+						//DBG_871X("%s COMBO_SCAN with specific ssid:%s, %d\n", __FUNCTION__
+						//	, ssid[ssid_index].Ssid, ssid[ssid_index].SsidLength);
+						ssid_index++;
+					}
+					
+					pos+=sec_len; len-=sec_len;
+					break;
+					
+				
+				case WEXT_CSCAN_CHANNEL_SECTION:
+					//DBG_871X("WEXT_CSCAN_CHANNEL_SECTION\n");
+					pos+=1; len-=1;
+					break;
+				case WEXT_CSCAN_ACTV_DWELL_SECTION:
+					//DBG_871X("WEXT_CSCAN_ACTV_DWELL_SECTION\n");
+					pos+=2; len-=2;
+					break;
+				case WEXT_CSCAN_PASV_DWELL_SECTION:
+					//DBG_871X("WEXT_CSCAN_PASV_DWELL_SECTION\n");
+					pos+=2; len-=2;					
+					break;
+				case WEXT_CSCAN_HOME_DWELL_SECTION:
+					//DBG_871X("WEXT_CSCAN_HOME_DWELL_SECTION\n");
+					pos+=2; len-=2;
+					break;
+				case WEXT_CSCAN_TYPE_SECTION:
+					//DBG_871X("WEXT_CSCAN_TYPE_SECTION\n");
+					pos+=1; len-=1;
+					break;
+				#if 0
+				case WEXT_CSCAN_NPROBE_SECTION:
+					DBG_871X("WEXT_CSCAN_NPROBE_SECTION\n");
+					break;
+				#endif
+				
+				default:
+					//DBG_871X("Unknown CSCAN section %c\n", section);
+					len = 0; // stop parsing
+			}
+			//DBG_871X("len:%d\n", len);
+			
+		}
+		
+		//jeff: it has still some scan paramater to parse, we only do this now...			
+		_enter_critical_bh(&pmlmepriv->lock, &irqL);				
+		_status = rtw_sitesurvey_cmd(padapter, ssid, RTW_SSID_SCAN_AMOUNT);	
+		_exit_critical_bh(&pmlmepriv->lock, &irqL);
+		
+	} else
+	
+	{
+		_status = rtw_set_802_11_bssid_list_scan(padapter);
+	}
+
+	if(_status == _FALSE)
+		ret = -1;
+
+exit:
+	#ifdef DBG_IOCTL
+	DBG_871X("DBG_IOCTL %s:%d return %d\n",__FUNCTION__, __LINE__, ret);
+	#endif
+
+_func_exit_;
+
+	return ret;	
+}
+
+static int rtw_wx_get_scan(struct net_device *dev, struct iw_request_info *a,
+			     union iwreq_data *wrqu, char *extra)
+{
+	_irqL	irqL;
+	_list					*plist, *phead;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct	mlme_priv	*pmlmepriv = &(padapter->mlmepriv);	
+	_queue				*queue	= &(pmlmepriv->scanned_queue);	
+	struct	wlan_network	*pnetwork = NULL;
+	char *ev = extra;
+	char *stop = ev + wrqu->data.length;
+	u32 ret = 0;	
+	u32 cnt=0;
+	u32 wait_for_surveydone;
+	sint wait_status;
+#ifdef CONFIG_P2P
+	struct	wifidirect_info*	pwdinfo = &padapter->wdinfo;
+#endif //CONFIG_P2P
+	RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_scan\n"));
+	RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_, (" Start of Query SIOCGIWSCAN .\n"));
+
+	_func_enter_;
+	
+	#ifdef DBG_IOCTL
+	DBG_871X("DBG_IOCTL %s:%d\n",__FUNCTION__, __LINE__);
+	#endif
+	
+	if(padapter->pwrctrlpriv.brfoffbyhw && padapter->bDriverStopped)
+	{
+		ret = -EINVAL;
+		goto exit;
+	}
+  
+#ifdef CONFIG_P2P
+	if ( pwdinfo->p2p_state != P2P_STATE_NONE )
+	{
+		//	P2P is enabled
+		wait_for_surveydone = 200;
+	}
+	else
+	{
+		//	P2P is disabled
+		wait_for_surveydone = 100;
+	}
+#else
+	{
+		wait_for_surveydone = 100;
+	}
+#endif //CONFIG_P2P
+
+	wait_status = _FW_UNDER_SURVEY
+		#ifndef CONFIG_ANDROID
+		|_FW_UNDER_LINKING
+		#endif
+	;
+
+ 	while(check_fwstate(pmlmepriv, wait_status) == _TRUE)
+	{	
+		rtw_msleep_os(30);
+		cnt++;
+		if(cnt > wait_for_surveydone )
+			break;
+	}
+
+	_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+
+	phead = get_list_head(queue);
+	plist = get_next(phead);
+       
+	while(1)
+	{
+		if (rtw_end_of_queue_search(phead,plist)== _TRUE)
+			break;
+
+		if((stop - ev) < SCAN_ITEM_SIZE) {
+			ret = -E2BIG;
+			break;
+		}
+
+		pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list);
+
+		//report network only if the current channel set contains the channel to which this network belongs
+		if( _TRUE == rtw_is_channel_set_contains_channel(padapter->mlmeextpriv.channel_set, pnetwork->network.Configuration.DSConfig)
+			#ifdef CONFIG_VALIDATE_SSID
+			&& _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid))
+			#endif
+		)
+		{
+			ev=translate_scan(padapter, a, pnetwork, ev, stop);
+		}
+
+		plist = get_next(plist);
+	
+	}        
+
+	_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+
+       wrqu->data.length = ev-extra;
+	wrqu->data.flags = 0;
+	
+exit:		
+	
+	_func_exit_;	
+	
+	#ifdef DBG_IOCTL
+	DBG_871X("DBG_IOCTL %s:%d return %d\n",__FUNCTION__, __LINE__, ret);
+	#endif
+	
+	return ret ;
+	
+}
+
+//set ssid flow
+//s1. rtw_set_802_11_infrastructure_mode()
+//s2. set_802_11_authenticaion_mode()
+//s3. set_802_11_encryption_mode()
+//s4. rtw_set_802_11_ssid()
+static int rtw_wx_set_essid(struct net_device *dev, 
+			      struct iw_request_info *a,
+			      union iwreq_data *wrqu, char *extra)
+{
+	_irqL irqL;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+	_queue *queue = &pmlmepriv->scanned_queue;
+	struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
+	_list *phead;
+	s8 status = _TRUE;
+	struct wlan_network *pnetwork = NULL;
+
+	NDIS_802_11_AUTHENTICATION_MODE authmode;	
+	NDIS_802_11_SSID ndis_ssid;	
+	u8 *dst_ssid, *src_ssid;
+
+	uint ret = 0, len;
+
+	_func_enter_;
+	
+	#ifdef DBG_IOCTL
+	DBG_871X("DBG_IOCTL %s:%d\n",__FUNCTION__, __LINE__);
+	#endif
+	
+	RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_,
+		 ("+rtw_wx_set_essid: fw_state=0x%08x\n", get_fwstate(pmlmepriv)));
+	if(_FAIL == rfpwrstate_check(padapter))
+	{		
+		ret = -1;
+		goto exit;
+	}
+
+	if(!padapter->bup){
+		ret = -1;
+		goto exit;
+	}
+
+#if WIRELESS_EXT <= 20
+	if ((wrqu->essid.length-1) > IW_ESSID_MAX_SIZE){
+#else
+	if (wrqu->essid.length > IW_ESSID_MAX_SIZE){
+#endif
+		ret= -E2BIG;
+		goto exit;
+	}
+	
+	if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) {
+		ret = -1;
+		goto exit;
+	}		
+	
+	authmode = padapter->securitypriv.ndisauthtype;
+	DBG_8192C("=>%s\n",__FUNCTION__);
+	if (wrqu->essid.flags && wrqu->essid.length)
+	{
+		// Commented by Albert 20100519
+		// We got the codes in "set_info" function of iwconfig source code.
+		//	=========================================
+		//	wrq.u.essid.length = strlen(essid) + 1;
+	  	//	if(we_kernel_version > 20)
+		//		wrq.u.essid.length--;
+		//	=========================================
+		//	That means, if the WIRELESS_EXT less than or equal to 20, the correct ssid len should subtract 1.
+#if WIRELESS_EXT <= 20
+		len = ((wrqu->essid.length-1) < IW_ESSID_MAX_SIZE) ? (wrqu->essid.length-1) : IW_ESSID_MAX_SIZE;
+#else
+		len = (wrqu->essid.length < IW_ESSID_MAX_SIZE) ? wrqu->essid.length : IW_ESSID_MAX_SIZE;
+#endif
+
+		DBG_8192C("ssid=%s, len=%d\n", extra, wrqu->essid.length);
+
+		_rtw_memset(&ndis_ssid, 0, sizeof(NDIS_802_11_SSID));
+		ndis_ssid.SsidLength = len;
+		_rtw_memcpy(ndis_ssid.Ssid, extra, len);		
+		src_ssid = ndis_ssid.Ssid;
+		
+		RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ("rtw_wx_set_essid: ssid=[%s]\n", src_ssid));
+		_enter_critical_bh(&queue->lock, &irqL);
+	       phead = get_list_head(queue);
+              pmlmepriv->pscanned = get_next(phead);
+
+		while (1)
+		{			
+			if (rtw_end_of_queue_search(phead, pmlmepriv->pscanned) == _TRUE)
+			{
+#if 0			
+				if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)
+				{
+	            			rtw_set_802_11_ssid(padapter, &ndis_ssid);
+
+		    			goto exit;                    
+				}
+				else
+				{
+					RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("rtw_wx_set_ssid(): scanned_queue is empty\n"));
+					ret = -EINVAL;
+					goto exit;
+				}
+#endif			
+			        RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_warning_,
+					 ("rtw_wx_set_essid: scan_q is empty, set ssid to check if scanning again!\n"));
+
+				break;
+			}
+	
+			pnetwork = LIST_CONTAINOR(pmlmepriv->pscanned, struct wlan_network, list);
+
+			pmlmepriv->pscanned = get_next(pmlmepriv->pscanned);
+
+			dst_ssid = pnetwork->network.Ssid.Ssid;
+
+			RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_,
+				 ("rtw_wx_set_essid: dst_ssid=%s\n",
+				  pnetwork->network.Ssid.Ssid));
+
+			if ((_rtw_memcmp(dst_ssid, src_ssid, ndis_ssid.SsidLength) == _TRUE) &&
+				(pnetwork->network.Ssid.SsidLength==ndis_ssid.SsidLength))
+			{
+				RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_,
+					 ("rtw_wx_set_essid: find match, set infra mode\n"));
+				
+				if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)
+				{
+					if(pnetwork->network.InfrastructureMode != pmlmepriv->cur_network.network.InfrastructureMode)
+						continue;
+				}	
+					
+				if (rtw_set_802_11_infrastructure_mode(padapter, pnetwork->network.InfrastructureMode) == _FALSE)
+				{
+					ret = -1;
+					_exit_critical_bh(&queue->lock, &irqL);
+					goto exit;
+				}
+
+				break;			
+			}
+		}
+		_exit_critical_bh(&queue->lock, &irqL);
+		RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_,
+			 ("set ssid: set_802_11_auth. mode=%d\n", authmode));
+		rtw_set_802_11_authentication_mode(padapter, authmode);
+		//set_802_11_encryption_mode(padapter, padapter->securitypriv.ndisencryptstatus);
+		if (rtw_set_802_11_ssid(padapter, &ndis_ssid) == _FALSE) {
+			ret = -1;
+			goto exit;
+		}	
+	}			
+	
+exit:
+
+	DBG_8192C("<=%s, ret %d\n",__FUNCTION__, ret);
+	
+	#ifdef DBG_IOCTL
+	DBG_871X("DBG_IOCTL %s:%d return %d\n",__FUNCTION__, __LINE__, ret);
+	#endif
+	
+	_func_exit_;
+	
+	return ret;	
+}
+
+static int rtw_wx_get_essid(struct net_device *dev, 
+			      struct iw_request_info *a,
+			      union iwreq_data *wrqu, char *extra)
+{
+	u32 len,ret = 0;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct	mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	WLAN_BSSID_EX  *pcur_bss = &pmlmepriv->cur_network.network;
+
+	RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_essid\n"));
+
+	_func_enter_;
+
+	if ( (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ||
+	      (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE))
+	{
+		len = pcur_bss->Ssid.SsidLength;
+
+		wrqu->essid.length = len;
+			
+		_rtw_memcpy(extra, pcur_bss->Ssid.Ssid, len);
+
+		wrqu->essid.flags = 1;
+	}
+	else
+	{
+		ret = -1;
+		goto exit;
+	}
+
+exit:
+	
+	_func_exit_;
+	
+	return ret;
+	
+}
+
+static int rtw_wx_set_rate(struct net_device *dev, 
+			      struct iw_request_info *a,
+			      union iwreq_data *wrqu, char *extra)
+{
+	int	i, ret = 0;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	u8	datarates[NumRates];
+	u32	target_rate = wrqu->bitrate.value;
+	u32	fixed = wrqu->bitrate.fixed;
+	u32	ratevalue = 0;
+	 u8 mpdatarate[NumRates]={11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0xff};
+
+_func_enter_;
+
+	RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,(" rtw_wx_set_rate \n"));
+	RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("target_rate = %d, fixed = %d\n",target_rate,fixed));
+	
+	if(target_rate == -1){
+		ratevalue = 11;
+		goto set_rate;
+	}
+	target_rate = target_rate/100000;
+
+	switch(target_rate){
+		case 10:
+			ratevalue = 0;
+			break;
+		case 20:
+			ratevalue = 1;
+			break;
+		case 55:
+			ratevalue = 2;
+			break;
+		case 60:
+			ratevalue = 3;
+			break;
+		case 90:
+			ratevalue = 4;
+			break;
+		case 110:
+			ratevalue = 5;
+			break;
+		case 120:
+			ratevalue = 6;
+			break;
+		case 180:
+			ratevalue = 7;
+			break;
+		case 240:
+			ratevalue = 8;
+			break;
+		case 360:
+			ratevalue = 9;
+			break;
+		case 480:
+			ratevalue = 10;
+			break;
+		case 540:
+			ratevalue = 11;
+			break;
+		default:
+			ratevalue = 11;
+			break;
+	}
+
+set_rate:
+
+	for(i=0; i<NumRates; i++)
+	{
+		if(ratevalue==mpdatarate[i])
+		{
+			datarates[i] = mpdatarate[i];
+			if(fixed == 0)
+				break;
+		}
+		else{
+			datarates[i] = 0xff;
+		}
+
+		RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("datarate_inx=%d\n",datarates[i]));
+	}
+
+	if( rtw_setdatarate_cmd(padapter, datarates) !=_SUCCESS){
+		RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("rtw_wx_set_rate Fail!!!\n"));
+		ret = -1;
+	}
+
+_func_exit_;
+
+	return ret;
+}
+
+static int rtw_wx_get_rate(struct net_device *dev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{	
+	int i;
+	u8 *p;
+	u16 rate = 0, max_rate = 0, ht_cap=_FALSE;
+	u32 ht_ielen = 0;	
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	WLAN_BSSID_EX  *pcur_bss = &pmlmepriv->cur_network.network;
+	struct ieee80211_ht_cap *pht_capie;
+	u8	bw_40MHz=0, short_GI=0;
+	u16	mcs_rate=0;
+	u8	rf_type = 0;
+	struct registry_priv *pregpriv = &padapter->registrypriv;
+
+
+	i=0;
+#ifdef CONFIG_MP_INCLUDED
+	if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE)
+		return -1;
+#endif
+	if((check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) || (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE))
+	{
+		p = rtw_get_ie(&pcur_bss->IEs[12], _HT_CAPABILITY_IE_, &ht_ielen, pcur_bss->IELength-12);
+		if(p && ht_ielen>0)
+		{
+			ht_cap = _TRUE;	
+
+			pht_capie = (struct ieee80211_ht_cap *)(p+2);
+		
+			_rtw_memcpy(&mcs_rate , pht_capie->supp_mcs_set, 2);
+
+			bw_40MHz = (pht_capie->cap_info&IEEE80211_HT_CAP_SUP_WIDTH) ? 1:0;
+
+			short_GI = (pht_capie->cap_info&(IEEE80211_HT_CAP_SGI_20|IEEE80211_HT_CAP_SGI_40)) ? 1:0;
+		}
+
+		while( (pcur_bss->SupportedRates[i]!=0) && (pcur_bss->SupportedRates[i]!=0xFF))
+		{
+			rate = pcur_bss->SupportedRates[i]&0x7F;
+			if(rate>max_rate)
+				max_rate = rate;
+
+			wrqu->bitrate.fixed = 0;	/* no auto select */
+			//wrqu->bitrate.disabled = 1/;
+		
+			i++;
+		}
+	
+		if(ht_cap == _TRUE)
+		{
+#if 0 //have some issue,neet to debug - 20101008-georgia
+			if(mcs_rate&0x8000)//MCS15
+			{
+				max_rate = (bw_40MHz) ? ((short_GI)?300:270):((short_GI)?144:130);
+			
+			}
+			else if(mcs_rate&0x0080)//MCS7
+			{
+				max_rate = (bw_40MHz) ? ((short_GI)?150:135):((short_GI)?72:65);
+			}
+			else//default MCS7
+			{
+				//DBG_8192C("wx_get_rate, mcs_rate_bitmap=0x%x\n", mcs_rate);
+				max_rate = (bw_40MHz) ? ((short_GI)?150:135):((short_GI)?72:65);
+			}
+#else
+			padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
+			if(rf_type == RF_1T1R)
+				max_rate = (bw_40MHz) ? ((short_GI)?150:135):((short_GI)?72:65);				
+			else
+				max_rate = (bw_40MHz) ? ((short_GI)?300:270):((short_GI)?144:130);
+#endif
+			max_rate = max_rate*2;//Mbps/2			
+			wrqu->bitrate.value = max_rate*500000;
+			
+		}
+		else
+		{
+			wrqu->bitrate.value = max_rate*500000;
+		}
+
+	}
+	else
+	{
+		return -1;
+	}
+
+	return 0;
+	
+}
+
+static int rtw_wx_get_rts(struct net_device *dev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	
+	_func_enter_;
+	RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,(" rtw_wx_get_rts \n"));
+	
+	wrqu->rts.value = padapter->registrypriv.rts_thresh;
+	wrqu->rts.fixed = 0;	/* no auto select */
+	//wrqu->rts.disabled = (wrqu->rts.value == DEFAULT_RTS_THRESHOLD);
+	
+	_func_exit_;
+	
+	return 0;
+}
+
+static int rtw_wx_set_frag(struct net_device *dev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+
+	_func_enter_;
+	
+	if (wrqu->frag.disabled)
+		padapter->xmitpriv.frag_len = MAX_FRAG_THRESHOLD;
+	else {
+		if (wrqu->frag.value < MIN_FRAG_THRESHOLD ||
+		    wrqu->frag.value > MAX_FRAG_THRESHOLD)
+			return -EINVAL;
+		
+		padapter->xmitpriv.frag_len = wrqu->frag.value & ~0x1;
+	}
+	
+	_func_exit_;
+	
+	return 0;
+	
+}
+
+
+static int rtw_wx_get_frag(struct net_device *dev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	
+	_func_enter_;
+	
+	wrqu->frag.value = padapter->xmitpriv.frag_len;
+	wrqu->frag.fixed = 0;	/* no auto select */
+	//wrqu->frag.disabled = (wrqu->frag.value == DEFAULT_FRAG_THRESHOLD);
+	
+	_func_exit_;
+	
+	return 0;
+}
+
+static int rtw_wx_get_retry(struct net_device *dev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	//_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+
+	
+	wrqu->retry.value = 7;
+	wrqu->retry.fixed = 0;	/* no auto select */
+	wrqu->retry.disabled = 1;
+	
+	return 0;
+
+}	
+
+#if 0
+#define IW_ENCODE_INDEX		0x00FF	/* Token index (if needed) */
+#define IW_ENCODE_FLAGS		0xFF00	/* Flags defined below */
+#define IW_ENCODE_MODE		0xF000	/* Modes defined below */
+#define IW_ENCODE_DISABLED	0x8000	/* Encoding disabled */
+#define IW_ENCODE_ENABLED	0x0000	/* Encoding enabled */
+#define IW_ENCODE_RESTRICTED	0x4000	/* Refuse non-encoded packets */
+#define IW_ENCODE_OPEN		0x2000	/* Accept non-encoded packets */
+#define IW_ENCODE_NOKEY		0x0800  /* Key is write only, so not present */
+#define IW_ENCODE_TEMP		0x0400  /* Temporary key */
+/*
+iwconfig wlan0 key on -> flags = 0x6001 -> maybe it means auto
+iwconfig wlan0 key off -> flags = 0x8800
+iwconfig wlan0 key open -> flags = 0x2800
+iwconfig wlan0 key open 1234567890 -> flags = 0x2000
+iwconfig wlan0 key restricted -> flags = 0x4800
+iwconfig wlan0 key open [3] 1234567890 -> flags = 0x2003
+iwconfig wlan0 key restricted [2] 1234567890 -> flags = 0x4002
+iwconfig wlan0 key open [3] -> flags = 0x2803
+iwconfig wlan0 key restricted [2] -> flags = 0x4802
+*/
+#endif
+
+static int rtw_wx_set_enc(struct net_device *dev, 
+			    struct iw_request_info *info, 
+			    union iwreq_data *wrqu, char *keybuf)
+{	
+	u32 key, ret = 0;
+	u32 keyindex_provided;
+	NDIS_802_11_WEP	 wep;	
+	NDIS_802_11_AUTHENTICATION_MODE authmode;
+
+	struct iw_point *erq = &(wrqu->encoding);
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
+	DBG_8192C("+rtw_wx_set_enc, flags=0x%x\n", erq->flags);
+
+	_rtw_memset(&wep, 0, sizeof(NDIS_802_11_WEP));
+	
+	key = erq->flags & IW_ENCODE_INDEX;
+	
+	_func_enter_;	
+
+	if (erq->flags & IW_ENCODE_DISABLED)
+	{
+		DBG_8192C("EncryptionDisabled\n");
+		padapter->securitypriv.ndisencryptstatus = Ndis802_11EncryptionDisabled;
+		padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_;
+		padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_;
+		padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_Open; //open system
+  		authmode = Ndis802_11AuthModeOpen;
+		padapter->securitypriv.ndisauthtype=authmode;
+     		
+		goto exit;
+	}
+
+	if (key) {
+		if (key > WEP_KEYS)
+			return -EINVAL;
+		key--;
+		keyindex_provided = 1;
+	} 
+	else
+	{
+		keyindex_provided = 0;
+		key = padapter->securitypriv.dot11PrivacyKeyIndex;
+		DBG_8192C("rtw_wx_set_enc, key=%d\n", key);
+	}
+	
+	//set authentication mode	
+	if(erq->flags & IW_ENCODE_OPEN)
+	{
+		DBG_8192C("rtw_wx_set_enc():IW_ENCODE_OPEN\n");
+		padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled;//Ndis802_11EncryptionDisabled;
+
+#ifdef CONFIG_PLATFORM_MT53XX
+		padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Auto;
+#else
+		padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_Open;
+#endif
+
+		padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_;
+		padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_;
+  		authmode = Ndis802_11AuthModeOpen;
+		padapter->securitypriv.ndisauthtype=authmode;
+	}	
+	else if(erq->flags & IW_ENCODE_RESTRICTED)
+	{		
+		DBG_8192C("rtw_wx_set_enc():IW_ENCODE_RESTRICTED\n");
+		padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled;
+
+#ifdef CONFIG_PLATFORM_MT53XX
+		padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Auto;
+#else
+		padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_Shared;
+#endif
+
+		padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_;
+		padapter->securitypriv.dot118021XGrpPrivacy=_WEP40_;			
+		authmode = Ndis802_11AuthModeShared;
+		padapter->securitypriv.ndisauthtype=authmode;
+	}
+	else
+	{
+		DBG_8192C("rtw_wx_set_enc():erq->flags=0x%x\n", erq->flags);
+
+		padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled;//Ndis802_11EncryptionDisabled;
+		padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_Open; //open system
+		padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_;
+		padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_;
+  		authmode = Ndis802_11AuthModeOpen;
+		padapter->securitypriv.ndisauthtype=authmode;
+	}
+	
+	wep.KeyIndex = key;
+	if (erq->length > 0)
+	{
+		wep.KeyLength = erq->length <= 5 ? 5 : 13;
+
+		wep.Length = wep.KeyLength + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial);
+	}
+	else
+	{
+		wep.KeyLength = 0 ;
+		
+		if(keyindex_provided == 1)// set key_id only, no given KeyMaterial(erq->length==0).
+		{
+			padapter->securitypriv.dot11PrivacyKeyIndex = key;
+
+			DBG_8192C("(keyindex_provided == 1), keyid=%d, key_len=%d\n", key, padapter->securitypriv.dot11DefKeylen[key]);
+
+			switch(padapter->securitypriv.dot11DefKeylen[key])
+			{
+				case 5:
+					padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_;					
+					break;
+				case 13:
+					padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_;					
+					break;
+				default:
+					padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_;					
+					break;
+			}
+				
+			goto exit;
+			
+		}
+		
+	}
+
+	wep.KeyIndex |= 0x80000000;
+
+	_rtw_memcpy(wep.KeyMaterial, keybuf, wep.KeyLength);
+	
+	if (rtw_set_802_11_add_wep(padapter, &wep) == _FALSE) {
+		if(rf_on == pwrpriv->rf_pwrstate )
+			ret = -EOPNOTSUPP;
+		goto exit;
+	}	
+
+exit:
+	
+	_func_exit_;
+	
+	return ret;
+	
+}
+
+static int rtw_wx_get_enc(struct net_device *dev, 
+			    struct iw_request_info *info, 
+			    union iwreq_data *wrqu, char *keybuf)
+{
+	uint key, ret =0;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct iw_point *erq = &(wrqu->encoding);
+	struct	mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+
+	_func_enter_;
+	
+	if(check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE)
+	{
+		 if(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) != _TRUE)
+		 {
+		erq->length = 0;
+		erq->flags |= IW_ENCODE_DISABLED;
+		return 0;
+	}	
+	}	
+
+	
+	key = erq->flags & IW_ENCODE_INDEX;
+
+	if (key) {
+		if (key > WEP_KEYS)
+			return -EINVAL;
+		key--;
+	} else
+	{
+		key = padapter->securitypriv.dot11PrivacyKeyIndex;
+	}	
+
+	erq->flags = key + 1;
+
+	//if(padapter->securitypriv.ndisauthtype == Ndis802_11AuthModeOpen)
+	//{
+	//      erq->flags |= IW_ENCODE_OPEN;
+	//}	  
+	
+	switch(padapter->securitypriv.ndisencryptstatus)
+	{
+		case Ndis802_11EncryptionNotSupported:
+		case Ndis802_11EncryptionDisabled:
+
+		erq->length = 0;
+		erq->flags |= IW_ENCODE_DISABLED;
+	
+		break;
+		
+		case Ndis802_11Encryption1Enabled:					
+		
+		erq->length = padapter->securitypriv.dot11DefKeylen[key];		
+
+		if(erq->length)
+		{
+			_rtw_memcpy(keybuf, padapter->securitypriv.dot11DefKey[key].skey, padapter->securitypriv.dot11DefKeylen[key]);
+		
+		erq->flags |= IW_ENCODE_ENABLED;
+
+			if(padapter->securitypriv.ndisauthtype == Ndis802_11AuthModeOpen)
+			{
+	     			erq->flags |= IW_ENCODE_OPEN;
+			}
+			else if(padapter->securitypriv.ndisauthtype == Ndis802_11AuthModeShared)
+			{
+		erq->flags |= IW_ENCODE_RESTRICTED;
+			}	
+		}	
+		else
+		{
+			erq->length = 0;
+			erq->flags |= IW_ENCODE_DISABLED;
+		}
+
+		break;
+
+		case Ndis802_11Encryption2Enabled:
+		case Ndis802_11Encryption3Enabled:
+
+		erq->length = 16;
+		erq->flags |= (IW_ENCODE_ENABLED | IW_ENCODE_OPEN | IW_ENCODE_NOKEY);
+
+		break;
+	
+		default:
+		erq->length = 0;
+		erq->flags |= IW_ENCODE_DISABLED;
+
+		break;
+		
+	}
+	
+	_func_exit_;
+	
+	return ret;
+	
+}				     
+
+static int rtw_wx_get_power(struct net_device *dev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	//_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	
+	wrqu->power.value = 0;
+	wrqu->power.fixed = 0;	/* no auto select */
+	wrqu->power.disabled = 1;
+	
+	return 0;
+
+}
+
+static int rtw_wx_set_gen_ie(struct net_device *dev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	int ret;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	
+       ret = rtw_set_wpa_ie(padapter, extra, wrqu->data.length);
+	   
+	return ret;
+}	
+
+static int rtw_wx_set_auth(struct net_device *dev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct iw_param *param = (struct iw_param*)&(wrqu->param);
+	int ret = 0;
+	
+	switch (param->flags & IW_AUTH_INDEX) {
+	case IW_AUTH_WPA_VERSION:
+		break;
+	case IW_AUTH_CIPHER_PAIRWISE:
+		
+		break;
+	case IW_AUTH_CIPHER_GROUP:
+		
+		break;
+	case IW_AUTH_KEY_MGMT:
+		/*
+		 *  ??? does not use these parameters
+		 */
+		break;
+
+	case IW_AUTH_TKIP_COUNTERMEASURES:
+        {
+	    if ( param->value )
+            {  // wpa_supplicant is enabling the tkip countermeasure.
+               padapter->securitypriv.btkip_countermeasure = _TRUE; 
+            }
+            else
+            {  // wpa_supplicant is disabling the tkip countermeasure.
+               padapter->securitypriv.btkip_countermeasure = _FALSE; 
+            }
+		break;
+        }
+	case IW_AUTH_DROP_UNENCRYPTED:
+		{
+			/* HACK:
+			 *
+			 * wpa_supplicant calls set_wpa_enabled when the driver
+			 * is loaded and unloaded, regardless of if WPA is being
+			 * used.  No other calls are made which can be used to
+			 * determine if encryption will be used or not prior to
+			 * association being expected.  If encryption is not being
+			 * used, drop_unencrypted is set to false, else true -- we
+			 * can use this to determine if the CAP_PRIVACY_ON bit should
+			 * be set.
+			 */
+
+			if(padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption1Enabled)
+			{
+				break;//it means init value, or using wep, ndisencryptstatus = Ndis802_11Encryption1Enabled, 
+						// then it needn't reset it;
+			}
+			
+			if(param->value){
+				padapter->securitypriv.ndisencryptstatus = Ndis802_11EncryptionDisabled;
+				padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_;
+				padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_;
+				padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_Open; //open system
+				padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeOpen;
+			}
+			
+			break;
+		}
+
+	case IW_AUTH_80211_AUTH_ALG:
+
+		#if defined(CONFIG_ANDROID) || 1
+		/*
+		 *  It's the starting point of a link layer connection using wpa_supplicant
+		*/
+		if(check_fwstate(&padapter->mlmepriv, _FW_LINKED)) {
+			rtw_disassoc_cmd(padapter);
+			DBG_871X("%s...call rtw_indicate_disconnect\n ",__FUNCTION__);
+			rtw_indicate_disconnect(padapter);
+			rtw_free_assoc_resources(padapter, 1);
+		}
+		#endif
+
+
+		ret = wpa_set_auth_algs(dev, (u32)param->value);		
+	
+		break;
+
+	case IW_AUTH_WPA_ENABLED:
+
+		//if(param->value)
+		//	padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; //802.1x
+		//else
+		//	padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Open;//open system
+		
+		//_disassociate(priv);
+		
+		break;
+
+	case IW_AUTH_RX_UNENCRYPTED_EAPOL:
+		//ieee->ieee802_1x = param->value;
+		break;
+
+	case IW_AUTH_PRIVACY_INVOKED:
+		//ieee->privacy_invoked = param->value;
+		break;
+
+	default:
+		return -EOPNOTSUPP;
+		
+	}
+	
+	return ret;
+	
+}
+
+static int rtw_wx_set_enc_ext(struct net_device *dev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	char *alg_name;
+	u32 param_len;
+	struct ieee_param *param = NULL;
+	struct iw_point *pencoding = &wrqu->encoding;
+ 	struct iw_encode_ext *pext = (struct iw_encode_ext *)extra;
+	int ret=0;
+
+	param_len = sizeof(struct ieee_param) + pext->key_len;
+	param = (struct ieee_param *)rtw_malloc(param_len);
+	if (param == NULL)
+		return -1;
+	
+	_rtw_memset(param, 0, param_len);
+
+	param->cmd = IEEE_CMD_SET_ENCRYPTION;
+	_rtw_memset(param->sta_addr, 0xff, ETH_ALEN);
+
+
+	switch (pext->alg) {
+	case IW_ENCODE_ALG_NONE:
+		//todo: remove key 
+		//remove = 1;	
+		alg_name = "none";
+		break;
+	case IW_ENCODE_ALG_WEP:
+		alg_name = "WEP";
+		break;
+	case IW_ENCODE_ALG_TKIP:
+		alg_name = "TKIP";
+		break;
+	case IW_ENCODE_ALG_CCMP:
+		alg_name = "CCMP";
+		break;
+	default:	
+		return -1;
+	}
+	
+	strncpy((char *)param->u.crypt.alg, alg_name, IEEE_CRYPT_ALG_NAME_LEN);
+
+	
+	if(pext->ext_flags & IW_ENCODE_EXT_GROUP_KEY)//?
+	{
+		param->u.crypt.set_tx = 0;
+	}
+
+	if (pext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY)//?
+	{
+		param->u.crypt.set_tx = 1;
+	}
+
+	param->u.crypt.idx = (pencoding->flags&0x00FF) -1 ;
+	
+	if (pext->ext_flags & IW_ENCODE_EXT_RX_SEQ_VALID) 
+	{	
+		_rtw_memcpy(param->u.crypt.seq, pext->rx_seq, 8);
+	}
+
+	if(pext->key_len)
+	{
+		param->u.crypt.key_len = pext->key_len;
+		//_rtw_memcpy(param + 1, pext + 1, pext->key_len);
+		_rtw_memcpy(param->u.crypt.key, pext + 1, pext->key_len);
+	}	
+
+	
+	if (pencoding->flags & IW_ENCODE_DISABLED)
+	{		
+		//todo: remove key 
+		//remove = 1;		
+	}	
+	
+	ret =  wpa_set_encryption(dev, param, param_len);	
+	
+
+	if(param)
+	{
+		rtw_mfree((u8*)param, param_len);
+	}
+		
+	
+	return ret;		
+
+}
+
+
+static int rtw_wx_get_nick(struct net_device *dev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{	
+	//_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	 //struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	 //struct security_priv *psecuritypriv = &padapter->securitypriv;
+
+	if(extra)
+	{
+		wrqu->data.length = 14;
+		wrqu->data.flags = 1;
+		_rtw_memcpy(extra, "<WIFI@REALTEK>", 14);
+	}
+
+	//rtw_signal_process(pid, SIGUSR1); //for test
+
+	//dump debug info here	
+/*
+	u32 dot11AuthAlgrthm;		// 802.11 auth, could be open, shared, and 8021x
+	u32 dot11PrivacyAlgrthm;	// This specify the privacy for shared auth. algorithm.
+	u32 dot118021XGrpPrivacy;	// This specify the privacy algthm. used for Grp key 
+	u32 ndisauthtype;
+	u32 ndisencryptstatus;
+*/
+
+	//DBG_8192C("auth_alg=0x%x, enc_alg=0x%x, auth_type=0x%x, enc_type=0x%x\n", 
+	//		psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm,
+	//		psecuritypriv->ndisauthtype, psecuritypriv->ndisencryptstatus);
+	
+	//DBG_8192C("enc_alg=0x%x\n", psecuritypriv->dot11PrivacyAlgrthm);
+	//DBG_8192C("auth_type=0x%x\n", psecuritypriv->ndisauthtype);
+	//DBG_8192C("enc_type=0x%x\n", psecuritypriv->ndisencryptstatus);
+
+#if 0
+	DBG_8192C("dbg(0x210)=0x%x\n", rtw_read32(padapter, 0x210));
+	DBG_8192C("dbg(0x608)=0x%x\n", rtw_read32(padapter, 0x608));
+	DBG_8192C("dbg(0x280)=0x%x\n", rtw_read32(padapter, 0x280));
+	DBG_8192C("dbg(0x284)=0x%x\n", rtw_read32(padapter, 0x284));
+	DBG_8192C("dbg(0x288)=0x%x\n", rtw_read32(padapter, 0x288));
+	
+	DBG_8192C("dbg(0x664)=0x%x\n", rtw_read32(padapter, 0x664));
+
+
+	DBG_8192C("\n");
+
+	DBG_8192C("dbg(0x430)=0x%x\n", rtw_read32(padapter, 0x430));
+	DBG_8192C("dbg(0x438)=0x%x\n", rtw_read32(padapter, 0x438));
+
+	DBG_8192C("dbg(0x440)=0x%x\n", rtw_read32(padapter, 0x440));
+	
+	DBG_8192C("dbg(0x458)=0x%x\n", rtw_read32(padapter, 0x458));
+	
+	DBG_8192C("dbg(0x484)=0x%x\n", rtw_read32(padapter, 0x484));
+	DBG_8192C("dbg(0x488)=0x%x\n", rtw_read32(padapter, 0x488));
+	
+	DBG_8192C("dbg(0x444)=0x%x\n", rtw_read32(padapter, 0x444));
+	DBG_8192C("dbg(0x448)=0x%x\n", rtw_read32(padapter, 0x448));
+	DBG_8192C("dbg(0x44c)=0x%x\n", rtw_read32(padapter, 0x44c));
+	DBG_8192C("dbg(0x450)=0x%x\n", rtw_read32(padapter, 0x450));
+#endif
+	
+	return 0;
+
+}
+
+static int rtw_wx_read32(struct net_device *dev,
+                            struct iw_request_info *info,
+                            union iwreq_data *wrqu, char *extra)
+{
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+
+	u32 addr;
+	u32 data32;
+
+
+	addr = *(u32*)extra;
+	data32 = rtw_read32(padapter, addr);
+	sprintf(extra, "0x%08x", data32);
+
+	return 0;
+}
+
+static int rtw_wx_write32(struct net_device *dev,
+                            struct iw_request_info *info,
+                            union iwreq_data *wrqu, char *extra)
+{
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+
+	u32 addr;
+	u32 data32;
+
+
+	addr = *(u32*)extra;
+	data32 = *((u32*)extra + 1);
+	rtw_write32(padapter, addr, data32);
+
+	return 0;
+}
+
+static int rtw_wx_read_rf(struct net_device *dev,
+                            struct iw_request_info *info,
+                            union iwreq_data *wrqu, char *extra)
+{
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	u32 path, addr, data32;
+
+
+	path = *(u32*)extra;
+	addr = *((u32*)extra + 1);
+	data32 = padapter->HalFunc.read_rfreg(padapter, path, addr, 0xFFFFF);
+//	DBG_8192C("%s: path=%d addr=0x%02x data=0x%05x\n", __func__, path, addr, data32);
+	/*
+	 * IMPORTANT!!
+	 * Only when wireless private ioctl is at odd order,
+	 * "extra" would be copied to user space.
+	 */
+	sprintf(extra, "0x%05x", data32);
+
+	return 0;
+}
+
+static int rtw_wx_write_rf(struct net_device *dev,
+                            struct iw_request_info *info,
+                            union iwreq_data *wrqu, char *extra)
+{
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	u32 path, addr, data32;
+
+
+	path = *(u32*)extra;
+	addr = *((u32*)extra + 1);
+	data32 = *((u32*)extra + 2);
+//	DBG_8192C("%s: path=%d addr=0x%02x data=0x%05x\n", __func__, path, addr, data32);
+	padapter->HalFunc.write_rfreg(padapter, path, addr, 0xFFFFF, data32);
+
+	return 0;
+}
+
+static int rtw_wx_priv_null(struct net_device *dev, struct iw_request_info *a,
+		 union iwreq_data *wrqu, char *b)
+{
+	return -1;
+}
+
+static int dummy(struct net_device *dev, struct iw_request_info *a,
+		 union iwreq_data *wrqu, char *b)
+{
+	//_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);	
+	//struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+
+	//DBG_8192C("cmd_code=%x, fwstate=0x%x\n", a->cmd, get_fwstate(pmlmepriv));
+	
+	return -1;
+	
+}
+
+static int rtw_wx_set_channel_plan(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct registry_priv *pregistrypriv = &padapter->registrypriv;
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+	extern int rtw_channel_plan;
+	u8 channel_plan_req = (u8) (*((int *)wrqu));
+
+	#if 0
+	rtw_channel_plan = (int)wrqu->data.pointer;
+	pregistrypriv->channel_plan = rtw_channel_plan;
+	pmlmepriv->ChannelPlan = pregistrypriv->channel_plan;
+	#endif
+
+	if( _SUCCESS == rtw_set_chplan_cmd(padapter, channel_plan_req, 1) ) {
+		DBG_871X("\n======== Set channel_plan = 0x%02X ========\n", pmlmepriv->ChannelPlan);
+	} else 
+		return -EPERM;
+
+	return 0;
+}
+
+static int rtw_wx_set_mtk_wps_probe_ie(struct net_device *dev,
+		struct iw_request_info *a,
+		union iwreq_data *wrqu, char *b)
+{
+#ifdef CONFIG_PLATFORM_MT53XX
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+
+	RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_notice_,
+		 ("WLAN IOCTL: cmd_code=%x, fwstate=0x%x\n",
+		  a->cmd, get_fwstate(pmlmepriv)));
+#endif
+	return 0;
+}
+
+static int rtw_wx_get_sensitivity(struct net_device *dev,
+				struct iw_request_info *info,
+				union iwreq_data *wrqu, char *buf)
+{
+#ifdef CONFIG_PLATFORM_MT53XX
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+
+	//	Modified by Albert 20110914
+	//	This is in dbm format for MTK platform.
+	wrqu->qual.level = padapter->recvpriv.rssi;
+	DBG_8192C(" level = %u\n",  wrqu->qual.level );
+#endif
+	return 0;
+}
+
+static int rtw_wx_set_mtk_wps_ie(struct net_device *dev,
+				struct iw_request_info *info,
+				union iwreq_data *wrqu, char *extra)
+{
+#ifdef CONFIG_PLATFORM_MT53XX
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+
+	return rtw_set_wpa_ie(padapter, wrqu->data.pointer, wrqu->data.length);
+#else
+	return 0;
+#endif
+}
+
+/*
+typedef int (*iw_handler)(struct net_device *dev, struct iw_request_info *info,
+			  union iwreq_data *wrqu, char *extra);
+*/
+/*
+ *	For all data larger than 16 octets, we need to use a
+ *	pointer to memory allocated in user space.
+ */
+static  int rtw_drvext_hdl(struct net_device *dev, struct iw_request_info *info,
+						union iwreq_data *wrqu, char *extra)
+{
+
+ #if 0
+struct	iw_point
+{
+  void __user	*pointer;	/* Pointer to the data  (in user space) */
+  __u16		length;		/* number of fields or size in bytes */
+  __u16		flags;		/* Optional params */
+};
+ #endif
+
+#ifdef CONFIG_DRVEXT_MODULE
+	u8 res;
+	struct drvext_handler *phandler;	
+	struct drvext_oidparam *poidparam;		
+	int ret;
+	u16 len;
+	u8 *pparmbuf, bset;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct iw_point *p = &wrqu->data;
+
+	if( (!p->length) || (!p->pointer)){
+		ret = -EINVAL;
+		goto _rtw_drvext_hdl_exit;
+	}
+	
+	
+	bset = (u8)(p->flags&0xFFFF);
+	len = p->length;
+	pparmbuf = (u8*)rtw_malloc(len);
+	if (pparmbuf == NULL){
+		ret = -ENOMEM;
+		goto _rtw_drvext_hdl_exit;
+	}
+	
+	if(bset)//set info
+	{
+		if (copy_from_user(pparmbuf, p->pointer,len)) {
+			rtw_mfree(pparmbuf, len);
+			ret = -EFAULT;
+			goto _rtw_drvext_hdl_exit;
+		}		
+	}
+	else//query info
+	{
+	
+	}
+
+	
+	//
+	poidparam = (struct drvext_oidparam *)pparmbuf;	
+	
+	RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("drvext set oid subcode [%d], len[%d], InformationBufferLength[%d]\r\n",
+        					 poidparam->subcode, poidparam->len, len));
+
+
+	//check subcode	
+	if ( poidparam->subcode >= MAX_DRVEXT_HANDLERS)
+	{
+		RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("no matching drvext handlers\r\n"));		
+		ret = -EINVAL;
+		goto _rtw_drvext_hdl_exit;
+	}
+
+
+	if ( poidparam->subcode >= MAX_DRVEXT_OID_SUBCODES)
+	{
+		RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("no matching drvext subcodes\r\n"));		
+		ret = -EINVAL;
+		goto _rtw_drvext_hdl_exit;
+	}
+
+
+	phandler = drvextoidhandlers + poidparam->subcode;
+
+	if (poidparam->len != phandler->parmsize)
+	{
+		RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("no matching drvext param size %d vs %d\r\n",			
+						poidparam->len , phandler->parmsize));		
+		ret = -EINVAL;		
+		goto _rtw_drvext_hdl_exit;
+	}
+
+
+	res = phandler->handler(&padapter->drvextpriv, bset, poidparam->data);
+
+	if(res==0)
+	{
+		ret = 0;
+			
+		if (bset == 0x00) {//query info
+			//_rtw_memcpy(p->pointer, pparmbuf, len);
+			if (copy_to_user(p->pointer, pparmbuf, len))
+				ret = -EFAULT;
+		}		
+	}		
+	else
+		ret = -EFAULT;
+
+	
+_rtw_drvext_hdl_exit:	
+	
+	return ret;	
+	
+#endif
+
+	return 0;
+
+}
+
+static void rtw_dbg_mode_hdl(_adapter *padapter, u32 id, u8 *pdata, u32 len)
+{
+	pRW_Reg 	RegRWStruct;
+	struct rf_reg_param *prfreg;
+	u8 path;
+	u8 offset;
+	u32 value;
+
+	DBG_8192C("%s\n", __FUNCTION__);
+
+	switch(id)
+	{
+		case GEN_MP_IOCTL_SUBCODE(MP_START):
+			DBG_8192C("871x_driver is only for normal mode, can't enter mp mode\n");
+			break;
+		case GEN_MP_IOCTL_SUBCODE(READ_REG):
+			RegRWStruct = (pRW_Reg)pdata;
+			switch (RegRWStruct->width)
+			{
+				case 1:
+					RegRWStruct->value = rtw_read8(padapter, RegRWStruct->offset);
+					break;
+				case 2:
+					RegRWStruct->value = rtw_read16(padapter, RegRWStruct->offset);
+					break;
+				case 4:
+					RegRWStruct->value = rtw_read32(padapter, RegRWStruct->offset);
+					break;
+				default:
+					break;
+			}
+		
+			break;
+		case GEN_MP_IOCTL_SUBCODE(WRITE_REG):
+			RegRWStruct = (pRW_Reg)pdata;
+			switch (RegRWStruct->width)
+			{
+				case 1:
+					rtw_write8(padapter, RegRWStruct->offset, (u8)RegRWStruct->value);
+					break;
+				case 2:
+					rtw_write16(padapter, RegRWStruct->offset, (u16)RegRWStruct->value);
+					break;
+				case 4:
+					rtw_write32(padapter, RegRWStruct->offset, (u32)RegRWStruct->value);
+					break;
+				default:					
+				break;
+			}
+				
+			break;
+		case GEN_MP_IOCTL_SUBCODE(READ_RF_REG):
+
+			prfreg = (struct rf_reg_param *)pdata;
+
+			path = (u8)prfreg->path;		
+			offset = (u8)prfreg->offset;	
+
+			value = padapter->HalFunc.read_rfreg(padapter, path, offset, 0xffffffff);
+
+			prfreg->value = value;
+
+			break;			
+		case GEN_MP_IOCTL_SUBCODE(WRITE_RF_REG):
+
+			prfreg = (struct rf_reg_param *)pdata;
+
+			path = (u8)prfreg->path;
+			offset = (u8)prfreg->offset;	
+			value = prfreg->value;
+
+			padapter->HalFunc.write_rfreg(padapter, path, offset, 0xffffffff, value);
+			
+			break;			
+                case GEN_MP_IOCTL_SUBCODE(TRIGGER_GPIO):
+			DBG_8192C("==> trigger gpio 0\n");
+			padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_TRIGGER_GPIO_0, 0);
+			break;	
+#ifdef CONFIG_BT_COEXIST
+		case GEN_MP_IOCTL_SUBCODE(SET_DM_BT):			
+			DBG_8192C("==> set dm_bt_coexist:%x\n",*(u8 *)pdata);
+			padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BT_SET_COEXIST, pdata);
+			break;
+		case GEN_MP_IOCTL_SUBCODE(DEL_BA):
+			DBG_8192C("==> delete ba:%x\n",*(u8 *)pdata);
+			padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BT_ISSUE_DELBA, pdata);
+			break;
+#endif
+#ifdef DBG_CONFIG_ERROR_DETECT
+		case GEN_MP_IOCTL_SUBCODE(GET_WIFI_STATUS):	
+			if(padapter->HalFunc.sreset_get_wifi_status)				
+				*pdata = padapter->HalFunc.sreset_get_wifi_status(padapter);                   
+			break;
+#endif
+	
+		default:
+			break;
+	}
+	
+}
+
+static int rtw_mp_ioctl_hdl(struct net_device *dev, struct iw_request_info *info,
+						union iwreq_data *wrqu, char *extra)
+{
+	int ret = 0;
+	u32 BytesRead, BytesWritten, BytesNeeded;
+	struct oid_par_priv	oid_par;
+	struct mp_ioctl_handler	*phandler;
+	struct mp_ioctl_param	*poidparam;
+	uint status=0;
+	u16 len;
+	u8 *pparmbuf = NULL, bset;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct iw_point *p = &wrqu->data;
+
+	//DBG_8192C("+rtw_mp_ioctl_hdl\n");
+
+	//mutex_lock(&ioctl_mutex);
+
+	if ((!p->length) || (!p->pointer)) {
+		ret = -EINVAL;
+		goto _rtw_mp_ioctl_hdl_exit;
+	}
+
+	pparmbuf = NULL;
+	bset = (u8)(p->flags & 0xFFFF);
+	len = p->length;
+	pparmbuf = (u8*)rtw_malloc(len);
+	if (pparmbuf == NULL){
+		ret = -ENOMEM;
+		goto _rtw_mp_ioctl_hdl_exit;
+	}
+
+	if (copy_from_user(pparmbuf, p->pointer, len)) {
+		ret = -EFAULT;
+		goto _rtw_mp_ioctl_hdl_exit;
+	}
+
+	poidparam = (struct mp_ioctl_param *)pparmbuf;
+	RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_,
+		 ("rtw_mp_ioctl_hdl: subcode [%d], len[%d], buffer_len[%d]\r\n",
+		  poidparam->subcode, poidparam->len, len));
+
+	if (poidparam->subcode >= MAX_MP_IOCTL_SUBCODE) {
+		RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_err_, ("no matching drvext subcodes\r\n"));
+		ret = -EINVAL;
+		goto _rtw_mp_ioctl_hdl_exit;
+	}
+
+	//DBG_8192C("%s: %d\n", __func__, poidparam->subcode);
+
+#ifdef CONFIG_MP_INCLUDED 
+	phandler = mp_ioctl_hdl + poidparam->subcode;
+
+	if ((phandler->paramsize != 0) && (poidparam->len < phandler->paramsize))
+	{
+		RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_err_,
+			 ("no matching drvext param size %d vs %d\r\n",
+			  poidparam->len, phandler->paramsize));
+		ret = -EINVAL;
+		goto _rtw_mp_ioctl_hdl_exit;
+	}
+
+	if (phandler->handler)
+	{
+		oid_par.adapter_context = padapter;
+		oid_par.oid = phandler->oid;
+		oid_par.information_buf = poidparam->data;
+		oid_par.information_buf_len = poidparam->len;
+		oid_par.dbg = 0;
+
+		BytesWritten = 0;
+		BytesNeeded = 0;
+
+		if (bset) {
+			oid_par.bytes_rw = &BytesRead;
+			oid_par.bytes_needed = &BytesNeeded;
+			oid_par.type_of_oid = SET_OID;
+		} else {
+			oid_par.bytes_rw = &BytesWritten;
+			oid_par.bytes_needed = &BytesNeeded;
+			oid_par.type_of_oid = QUERY_OID;
+		}
+
+		status = phandler->handler(&oid_par);
+
+		//todo:check status, BytesNeeded, etc.
+	}
+	else {
+		DBG_8192C("rtw_mp_ioctl_hdl(): err!, subcode=%d, oid=%d, handler=%p\n", 
+			poidparam->subcode, phandler->oid, phandler->handler);
+		ret = -EFAULT;
+		goto _rtw_mp_ioctl_hdl_exit;
+	}
+#else
+
+	rtw_dbg_mode_hdl(padapter, poidparam->subcode, poidparam->data, poidparam->len);
+	
+#endif
+
+	if (bset == 0x00) {//query info
+		if (copy_to_user(p->pointer, pparmbuf, len))
+			ret = -EFAULT;
+	}
+
+	if (status) {
+		ret = -EFAULT;
+		goto _rtw_mp_ioctl_hdl_exit;
+	}
+
+_rtw_mp_ioctl_hdl_exit:
+
+	if (pparmbuf)
+		rtw_mfree(pparmbuf, len);
+
+	//mutex_unlock(&ioctl_mutex);
+
+	return ret;
+}
+
+static int rtw_get_ap_info(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	int bssid_match, ret = 0;
+	u32 cnt=0, wpa_ielen;
+	_irqL	irqL;
+	_list	*plist, *phead;
+	unsigned char *pbuf;
+	u8 bssid[ETH_ALEN];
+	char data[32];
+	struct wlan_network *pnetwork = NULL;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);	
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);	
+	_queue *queue = &(pmlmepriv->scanned_queue);
+	struct iw_point *pdata = &wrqu->data;	
+
+	DBG_8192C("+rtw_get_aplist_info\n");
+
+	if((padapter->bDriverStopped) || (pdata==NULL))
+	{                
+		ret= -EINVAL;
+		goto exit;
+	}		
+  
+ 	while((check_fwstate(pmlmepriv, (_FW_UNDER_SURVEY|_FW_UNDER_LINKING))) == _TRUE)
+	{	
+		rtw_msleep_os(30);
+		cnt++;
+		if(cnt > 100)
+			break;
+	}
+	
+
+	//pdata->length = 0;//?	
+	pdata->flags = 0;
+	if(pdata->length>=32)
+	{
+		if(copy_from_user(data, pdata->pointer, 32))
+		{
+			ret= -EINVAL;
+			goto exit;
+		}
+	}	
+	else
+	{
+		ret= -EINVAL;
+		goto exit;
+	}	
+
+	_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+	
+	phead = get_list_head(queue);
+	plist = get_next(phead);
+       
+	while(1)
+	{
+		if (rtw_end_of_queue_search(phead,plist)== _TRUE)
+			break;
+
+
+		pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list);
+
+		//if(hwaddr_aton_i(pdata->pointer, bssid)) 
+		if(hwaddr_aton_i(data, bssid)) 
+		{			
+			DBG_8192C("Invalid BSSID '%s'.\n", (u8*)data);
+			_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+			return -EINVAL;
+		}		
+		
+	
+		if(_rtw_memcmp(bssid, pnetwork->network.MacAddress, ETH_ALEN) == _TRUE)//BSSID match, then check if supporting wpa/wpa2
+		{
+			DBG_8192C("BSSID:" MAC_FMT "\n", MAC_ARG(bssid));
+			
+			pbuf = rtw_get_wpa_ie(&pnetwork->network.IEs[12], &wpa_ielen, pnetwork->network.IELength-12);				
+			if(pbuf && (wpa_ielen>0))
+			{
+				pdata->flags = 1;
+				break;
+			}
+
+			pbuf = rtw_get_wpa2_ie(&pnetwork->network.IEs[12], &wpa_ielen, pnetwork->network.IELength-12);
+			if(pbuf && (wpa_ielen>0))
+			{
+				pdata->flags = 2;
+				break;
+			}
+			
+		}
+
+		plist = get_next(plist);		
+	
+	}        
+
+	_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+
+	if(pdata->length>=34)
+	{
+		if(copy_to_user((u8*)pdata->pointer+32, (u8*)&pdata->flags, 1))
+		{
+			ret= -EINVAL;
+			goto exit;
+		}
+	}	
+	
+exit:
+	
+	return ret;
+		
+}
+
+static int rtw_set_pid(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	
+	int ret = 0;	
+	_adapter *padapter = rtw_netdev_priv(dev);	
+	int *pdata = (int *)wrqu;
+	int selector;
+
+	if((padapter->bDriverStopped) || (pdata==NULL))
+	{                
+		ret= -EINVAL;
+		goto exit;
+	}		
+  
+	selector = *pdata;
+	if(selector < 3 && selector >=0) {
+		padapter->pid[selector] = *(pdata+1);
+		#ifdef CONFIG_GLOBAL_UI_PID
+		ui_pid[selector] = *(pdata+1);
+		#endif
+		DBG_871X("%s set pid[%d]=%d\n", __FUNCTION__, selector ,padapter->pid[selector]);
+	}
+	else
+		DBG_871X("%s selector %d error\n", __FUNCTION__, selector);
+
+exit:
+	
+	return ret;
+		
+}
+
+static int rtw_wps_start(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	
+	int ret = 0;	
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);	
+	struct iw_point *pdata = &wrqu->data;
+	u32   u32wps_start = 0;
+        unsigned int uintRet = 0;
+
+        uintRet = copy_from_user( ( void* ) &u32wps_start, pdata->pointer, 4 );
+
+	if((padapter->bDriverStopped) || (pdata==NULL))
+	{                
+		ret= -EINVAL;
+		goto exit;
+	}		
+
+       if ( u32wps_start == 0 )
+       {
+           u32wps_start = *extra;
+       }
+
+       DBG_8192C( "[%s] wps_start = %d\n", __FUNCTION__, u32wps_start );
+
+       if ( u32wps_start == 1 ) // WPS Start
+       {
+		rtw_led_control(padapter, LED_CTL_START_WPS);
+       }
+	else if ( u32wps_start == 2 ) // WPS Stop because of wps success
+	{
+		rtw_led_control(padapter, LED_CTL_STOP_WPS);
+	}
+	else if ( u32wps_start == 3 ) // WPS Stop because of wps fail
+	{
+		rtw_led_control(padapter, LED_CTL_STOP_WPS_FAIL);
+	}
+exit:
+	
+	return ret;
+		
+}
+
+#ifdef CONFIG_P2P
+
+void restore_p2p_state_timer_process (void *FunctionContext)
+{
+	_adapter *adapter = (_adapter *)FunctionContext;
+	struct	wifidirect_info		*pwdinfo = &adapter->wdinfo;
+
+	if( pwdinfo->p2p_state == P2P_STATE_NONE )
+		return; 
+	
+	p2p_protocol_wk_cmd( adapter, P2P_RESTORE_STATE_WK );
+}
+
+void pre_tx_scan_timer_process (void *FunctionContext)
+{
+	_adapter 							*adapter = (_adapter *) FunctionContext;
+	struct	wifidirect_info				*pwdinfo = &adapter->wdinfo;
+	_irqL							irqL;
+	struct mlme_priv					*pmlmepriv = &adapter->mlmepriv;
+	u8								_status = 0;
+
+	if( pwdinfo->p2p_state == P2P_STATE_NONE )
+		return;
+	
+	_enter_critical_bh(&pmlmepriv->lock, &irqL);
+
+	//	Commented by Albert 20110805
+	//	Todo: Use the issuing probe request directly instead of using the rtw_sitesurvey_cmd!!
+	
+	if ( P2P_STATE_TX_PROVISION_DIS_REQ == pwdinfo->p2p_state )
+	{
+		if ( _TRUE == pwdinfo->tx_prov_disc_info.benable )	//	the provision discovery request frame is trigger to send or not
+		{
+			p2p_protocol_wk_cmd( adapter, P2P_PRE_TX_PROVDISC_PROCESS_WK );			
+			//issue_probereq_p2p( adapter );
+			//_set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT );
+		}
+	}
+	else if ( P2P_STATE_GONEGO_ING == pwdinfo->p2p_state )
+	{
+		if ( _TRUE == pwdinfo->nego_req_info.benable )
+		{
+			p2p_protocol_wk_cmd( adapter, P2P_PRE_TX_NEGOREQ_PROCESS_WK );
+			//issue_probereq_p2p( adapter );
+			//_set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT );
+		}
+	}
+	else
+	{
+		DBG_8192C( "[%s] p2p_state is %d, ignore!!\n", __FUNCTION__, pwdinfo->p2p_state );
+	}
+	
+	_exit_critical_bh(&pmlmepriv->lock, &irqL);
+}
+
+void find_phase_timer_process (void *FunctionContext)
+{
+	_adapter *adapter = (_adapter *)FunctionContext;
+	struct	wifidirect_info		*pwdinfo = &adapter->wdinfo;
+
+	if( pwdinfo->p2p_state == P2P_STATE_NONE )
+		return;
+
+	adapter->wdinfo.find_phase_state_exchange_cnt++;
+
+	p2p_protocol_wk_cmd( adapter, P2P_FIND_PHASE_WK );
+}
+
+static void init_wifidirect_info( _adapter*	padapter, char* pinitValue)
+{
+	struct wifidirect_info	*pwdinfo;
+
+	pwdinfo = &padapter->wdinfo;
+
+	pwdinfo->padapter = padapter;
+
+	//init device&interface address
+	_rtw_memcpy(pwdinfo->device_addr, myid(&(padapter->eeprompriv)), ETH_ALEN);
+	_rtw_memcpy(pwdinfo->interface_addr, myid(&(padapter->eeprompriv)), ETH_ALEN);
+	
+	//	1, 6, 11 are the social channel defined in the WiFi Direct specification.
+	pwdinfo->social_chan[0] = 1;
+	pwdinfo->social_chan[1] = 6;
+	pwdinfo->social_chan[2] = 11;
+	pwdinfo->social_chan[3] = 0;	//	channel 0 for scanning ending in site survey function.
+	
+	//	Use the channel 11 as the listen channel
+	pwdinfo->listen_channel = 11;
+
+	if ( *pinitValue == '1' )
+	{
+		pwdinfo->role = P2P_ROLE_DEVICE;
+		pwdinfo->p2p_state = P2P_STATE_LISTEN;
+		pwdinfo->intent = 1;
+	}
+	else if ( *pinitValue == '2' )
+	{
+		pwdinfo->role = P2P_ROLE_CLIENT;
+		pwdinfo->p2p_state = P2P_STATE_GONEGO_OK;
+		pwdinfo->intent = 1;
+	}	
+	else if ( *pinitValue == '3' )
+	{
+		pwdinfo->role = P2P_ROLE_GO;
+		pwdinfo->p2p_state = P2P_STATE_GONEGO_OK;
+		pwdinfo->intent = 15;
+	}
+
+	
+	pwdinfo->pre_p2p_state = P2P_STATE_NONE;
+
+//	Use the OFDM rate in the P2P probe response frame. ( 6(B), 9(B), 12, 18, 24, 36, 48, 54 )	
+	pwdinfo->support_rate[0] = 0x8c;	//	6(B)
+	pwdinfo->support_rate[1] = 0x92;	//	9(B)
+	pwdinfo->support_rate[2] = 0x18;	//	12
+	pwdinfo->support_rate[3] = 0x24;	//	18
+	pwdinfo->support_rate[4] = 0x30;	//	24
+	pwdinfo->support_rate[5] = 0x48;	//	36
+	pwdinfo->support_rate[6] = 0x60;	//	48
+	pwdinfo->support_rate[7] = 0x6c;	//	54
+
+	_rtw_memcpy( ( void* ) pwdinfo->p2p_wildcard_ssid, "DIRECT-", 7 );
+
+	_rtw_memset( pwdinfo->device_name, 0x00, WPS_MAX_DEVICE_NAME_LEN );
+	_rtw_memcpy( pwdinfo->device_name, "Realtek DMP Device", 18 );
+	pwdinfo->device_name_len = 18;
+
+	_rtw_memset( &pwdinfo->invitereq_info, 0x00, sizeof( struct tx_invite_req_info ) );
+	pwdinfo->invitereq_info.token = 3;	//	Token used for P2P invitation request frame.
+	pwdinfo->invitereq_info.peer_operation_ch = pwdinfo->listen_channel;
+	
+	_rtw_memset( &pwdinfo->inviteresp_info, 0x00, sizeof( struct tx_invite_resp_info ) );
+	pwdinfo->inviteresp_info.token = 0;
+
+	pwdinfo->profileindex = 0;
+	_rtw_memset( &pwdinfo->profileinfo[ 0 ], 0x00, sizeof( struct profile_info ) * P2P_MAX_PERSISTENT_GROUP_NUM );
+
+	_init_timer( &pwdinfo->find_phase_timer, padapter->pnetdev, find_phase_timer_process, padapter );
+	_init_timer( &pwdinfo->restore_p2p_state_timer, padapter->pnetdev, restore_p2p_state_timer_process, padapter );
+	_init_timer( &pwdinfo->pre_tx_scan_timer, padapter->pnetdev, pre_tx_scan_timer_process, padapter );	
+		
+	pwdinfo->find_phase_state_exchange_cnt = 0;
+
+	pwdinfo->listen_dwell = ( u8 ) (( rtw_get_current_time() % 3 ) + 1);
+	DBG_8192C( "[%s] listen_dwell time is %d00ms\n", __FUNCTION__, pwdinfo->listen_dwell );
+
+	_rtw_memset( &pwdinfo->tx_prov_disc_info, 0x00, sizeof( struct tx_provdisc_req_info ) );
+	pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_NONE;
+
+	_rtw_memset( &pwdinfo->nego_req_info, 0x00, sizeof( struct tx_nego_req_info ) );
+
+	pwdinfo->device_password_id_for_nego = WPS_DPID_PBC;
+	pwdinfo->negotiation_dialog_token = 1;
+
+	_rtw_memset( pwdinfo->nego_ssid, 0x00, WLAN_SSID_MAXLEN );
+	pwdinfo->nego_ssidlen = 0;
+
+	pwdinfo->ui_got_wps_info = P2P_NO_WPSINFO;
+#ifdef CONFIG_WFD
+	pwdinfo->supported_wps_cm = WPS_CONFIG_METHOD_DISPLAY;
+	_rtw_memset( &pwdinfo->wfd_info, 0x00, sizeof( struct wifi_display_info ) );
+	pwdinfo->wfd_info.rtsp_ctrlport = 554;
+	pwdinfo->wfd_info.peer_rtsp_ctrlport = 0;	//	Reset to 0
+#else
+	pwdinfo->supported_wps_cm = WPS_CONFIG_METHOD_DISPLAY | WPS_CONFIG_METHOD_PBC | WPS_CONFIG_METHOD_KEYPAD;
+#endif //CONFIG_WFD
+	pwdinfo->channel_cnt = 0;
+	_rtw_memset( pwdinfo->channel_list, 0x00, 13 );
+
+	_rtw_memset( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, 0x00, 4 );
+	_rtw_memset( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, '0', 3 );
+	_rtw_memset( &pwdinfo->groupid_info, 0x00, sizeof( struct group_id_info ) );
+	
+}
+
+static int rtw_p2p_enable(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	
+	int ret = 0;	
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);	
+	struct iw_point *pdata = &wrqu->data;
+	struct wifidirect_info *pwdinfo= &(padapter->wdinfo);
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
+
+	if ( ( *extra == '1' ) || ( *extra == '2' ) || ( *extra == '3' ) )
+	{
+		u8 channel, ch_offset;
+		u16 bwmode;
+
+//Sometimes dongle would difficult to receive p2p_probe_req caused by platform noise. Kurt
+#ifdef CONFIG_P2P_AGAINST_NOISE
+		rtw_write8(padapter, 0xc41, 0x42);
+		DBG_8192C("rtw_write8(0x%x)=0x%02x\n", 0xc41, rtw_read8(padapter, 0xc41));
+#endif //CONFIG_P2P_AGAINST_NOISE
+
+		//	Enable P2P function
+		init_wifidirect_info(padapter,  extra );
+
+		//leave IPS/Autosuspend
+		if(_FAIL == rfpwrstate_check(padapter))
+		{
+			return -EFAULT;
+		}
+		
+		if(pwdinfo->p2p_state == P2P_STATE_LISTEN)
+		{
+			//	Stay at the listen state and wait for discovery.
+			channel = pwdinfo->listen_channel;
+			ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+			bwmode = HT_CHANNEL_WIDTH_20;			
+		}
+		else
+		{
+			pwdinfo->operating_channel = pmlmeext->cur_channel;
+		
+			channel = pwdinfo->operating_channel;
+			ch_offset = pmlmeext->cur_ch_offset;
+			bwmode = pmlmeext->cur_bwmode;						
+		}
+
+		set_channel_bwmode(padapter, channel, ch_offset, bwmode);
+	
+	}
+	else if ( *extra == '0' )
+	{	
+
+#ifdef CONFIG_P2P_AGAINST_NOISE
+		rtw_write8(padapter, 0xc41, 0x40);
+		DBG_8192C("rtw_write8(0x%x)=0x%02x\n", 0xc41, rtw_read8(padapter, 0xc41));
+#endif //CONFIG_P2P_AGAINST_NOISE
+
+		//	Disable P2P Listen State
+		if ( pwdinfo->p2p_state != P2P_STATE_NONE )
+		{
+			_cancel_timer_ex( &pwdinfo->find_phase_timer );
+			_cancel_timer_ex( &pwdinfo->restore_p2p_state_timer );
+			_cancel_timer_ex( &pwdinfo->pre_tx_scan_timer);
+			pwdinfo->p2p_state = P2P_STATE_NONE;
+		}
+		if(pwrpriv->bips_processing == _FALSE){
+			rtw_set_pwr_state_check_timer(pwrpriv);
+		}
+	}
+	
+	return ret;
+		
+}
+
+static int rtw_p2p_set_go_nego_ssid(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	
+	int ret = 0;	
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);	
+	struct iw_point *pdata = &wrqu->data;
+	struct wifidirect_info *pwdinfo= &(padapter->wdinfo);
+
+	DBG_8192C( "[%s] ssid = %s, len = %d\n", __FUNCTION__, extra, strlen( extra ) );
+	_rtw_memcpy( pwdinfo->nego_ssid, extra, strlen( extra ) );
+	pwdinfo->nego_ssidlen = strlen( extra );
+	
+	return ret;
+		
+}
+
+
+static int rtw_p2p_set_intent(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	
+	int ret = 0;	
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);	
+	struct iw_point *pdata = &wrqu->data;
+	struct wifidirect_info *pwdinfo= &(padapter->wdinfo);
+	u8	intent = pwdinfo->intent;
+
+	switch( wrqu->data.length )
+	{
+		case 1:
+		{
+			intent = extra[ 0 ] - '0';
+			break;
+		}
+		case 2:
+		{
+			intent = str_2char2num( extra[ 0 ], extra[ 1 ]);
+			break;
+		}
+	}
+
+	if ( intent <= 15 )
+	{
+		pwdinfo->intent= intent;
+	}
+	else
+	{
+		ret = -1;
+	}
+	
+	DBG_8192C( "[%s] intent = %d\n", __FUNCTION__, intent);
+	
+	return ret;
+		
+}
+
+static int rtw_p2p_set_listen_ch(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	
+	int ret = 0;	
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);	
+	struct iw_point *pdata = &wrqu->data;
+	struct wifidirect_info *pwdinfo= &(padapter->wdinfo);
+	u8	listen_ch = pwdinfo->listen_channel;	//	Listen channel number
+
+	switch( wrqu->data.length )
+	{
+		case 1:
+		{
+			listen_ch = extra[ 0 ] - '0';
+			break;
+		}
+		case 2:
+		{
+			listen_ch = str_2char2num( extra[ 0 ], extra[ 1 ]);
+			break;
+		}
+	}
+
+	if ( listen_ch > 0 && listen_ch <= 13 )
+	{
+		pwdinfo->listen_channel = listen_ch;
+		set_channel_bwmode(padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20);
+	}
+	else
+	{
+		ret = -1;
+	}
+	
+	DBG_8192C( "[%s] listen_ch = %d\n", __FUNCTION__, pwdinfo->listen_channel );
+	
+	return ret;
+		
+}
+
+static int rtw_p2p_set_op_ch(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+//	Commented by Albert 20110524
+//	This function is used to set the operating channel if the driver will become the group owner
+
+	int ret = 0;	
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);	
+	struct iw_point *pdata = &wrqu->data;
+	struct wifidirect_info *pwdinfo= &(padapter->wdinfo);
+	u8	op_ch = pwdinfo->operating_channel;	//	Operating channel number
+
+	switch( wrqu->data.length )
+	{
+		case 1:
+		{
+			op_ch = extra[ 0 ] - '0';
+			break;
+		}
+		case 2:
+		{
+			op_ch = str_2char2num( extra[ 0 ], extra[ 1 ]);
+			break;
+		}
+	}
+
+	if ( op_ch > 0 && op_ch <= 13 )
+	{
+		pwdinfo->operating_channel = op_ch;
+	}
+	else
+	{
+		ret = -1;
+	}
+	
+	DBG_8192C( "[%s] op_ch = %d\n", __FUNCTION__, pwdinfo->operating_channel );
+	
+	return ret;
+		
+}
+
+
+static int rtw_p2p_profilefound(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	
+	int ret = 0;	
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);	
+	struct iw_point *pdata = &wrqu->data;
+	struct wifidirect_info *pwdinfo= &(padapter->wdinfo);
+
+	//	Comment by Albert 2010/10/13
+	//	Input data format:
+	//	Ex:  0
+	//	Ex:  1XX:XX:XX:XX:XX:XXYYSSID
+	//	0 => Reflush the profile record list.
+	//	1 => Add the profile list
+	//	XX:XX:XX:XX:XX:XX => peer's MAC Address ( ex: 00:E0:4C:00:00:01 )
+	//	YY => SSID Length
+	//	SSID => SSID for persistence group
+
+	DBG_8192C( "[%s] In value = %s, len = %d \n", __FUNCTION__, extra, wrqu->data.length -1);
+
+	
+	//	The upper application should pass the SSID to driver by using this rtw_p2p_profilefound function.
+	if ( pwdinfo->p2p_state != P2P_STATE_NONE )
+	{
+		if ( extra[ 0 ] == '0' )
+		{
+			//	Remove all the profile information of wifidirect_info structure.
+			_rtw_memset( &pwdinfo->profileinfo[ 0 ], 0x00, sizeof( struct profile_info ) * P2P_MAX_PERSISTENT_GROUP_NUM );
+			pwdinfo->profileindex = 0;
+		}
+		else
+		{
+			if ( pwdinfo->profileindex >= P2P_MAX_PERSISTENT_GROUP_NUM )
+		{
+				ret = -1;
+		}
+		else
+		{
+				int jj, kk;
+				
+				//	Add this profile information into pwdinfo->profileinfo
+				//	Ex:  1XX:XX:XX:XX:XX:XXYYSSID
+				for( jj = 0, kk = 1; jj < ETH_ALEN; jj++, kk += 3 )
+				{
+					pwdinfo->profileinfo[ pwdinfo->profileindex ].peermac[ jj ] = key_2char2num(extra[ kk ], extra[ kk+ 1 ]);
+				}
+
+				pwdinfo->profileinfo[ pwdinfo->profileindex ].ssidlen = ( extra[18] - '0' ) * 10 + ( extra[ 19 ] - '0' );
+				_rtw_memcpy( pwdinfo->profileinfo[ pwdinfo->profileindex ].ssid, &extra[ 20 ], pwdinfo->profileinfo[ pwdinfo->profileindex ].ssidlen );
+				pwdinfo->profileindex++;
+			}
+		}
+	}	
+	
+	return ret;
+		
+}
+
+static int rtw_p2p_setDN(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	
+	int ret = 0;	
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);	
+	struct iw_point *pdata = &wrqu->data;
+	struct wifidirect_info *pwdinfo= &(padapter->wdinfo);
+
+
+	DBG_8192C( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1  );
+	pwdinfo->device_name_len = wrqu->data.length - 1;
+	_rtw_memset( pwdinfo->device_name, 0x00, WPS_MAX_DEVICE_NAME_LEN );
+	_rtw_memcpy( pwdinfo->device_name, extra, pwdinfo->device_name_len );
+	
+	return ret;
+		
+}
+
+
+static int rtw_p2p_get_status(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	
+	int ret = 0;	
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);	
+	struct iw_point *pdata = &wrqu->data;
+	struct wifidirect_info	*pwdinfo = &( padapter->wdinfo );
+
+	
+	DBG_8192C( "[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, pwdinfo->role, pwdinfo->p2p_state,
+			pwdinfo->p2p_peer_interface_addr[ 0 ], pwdinfo->p2p_peer_interface_addr[ 1 ], pwdinfo->p2p_peer_interface_addr[ 2 ],
+			pwdinfo->p2p_peer_interface_addr[ 3 ], pwdinfo->p2p_peer_interface_addr[ 4 ], pwdinfo->p2p_peer_interface_addr[ 5 ]);
+
+	//	Commented by Albert 2010/10/12
+	//	Because of the output size limitation, I had removed the "Role" information.
+	//	About the "Role" information, we will use the new private IOCTL to get the "Role" information.
+	sprintf( extra, "\n\nStatus=%.2d\n", pwdinfo->p2p_state );
+	wrqu->data.length = strlen( extra );
+
+	if ( pwdinfo->p2p_state == P2P_STATE_LISTEN )
+	{
+		//	Stay at the listen state and wait for discovery.			
+		set_channel_bwmode(padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20);
+	}
+	
+	return ret;
+		
+}
+
+//	Commented by Albert 20110520
+//	This function will return the config method description 
+//	This config method description will show us which config method the remote P2P device is intented to use
+//	by sending the provisioning discovery request frame.
+
+static int rtw_p2p_get_req_cm(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	
+	int ret = 0;	
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct iw_point *pdata = &wrqu->data;
+	struct wifidirect_info	*pwdinfo = &( padapter->wdinfo );
+
+	sprintf( extra, "\n\nCM=%s\n", pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req );
+	wrqu->data.length = strlen( extra );
+	return ret;
+		
+}
+
+
+static int rtw_p2p_get_role(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	
+	int ret = 0;	
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);	
+	struct iw_point *pdata = &wrqu->data;
+	struct wifidirect_info	*pwdinfo = &( padapter->wdinfo );
+
+	
+	DBG_8192C( "[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, pwdinfo->role, pwdinfo->p2p_state,
+			pwdinfo->p2p_peer_interface_addr[ 0 ], pwdinfo->p2p_peer_interface_addr[ 1 ], pwdinfo->p2p_peer_interface_addr[ 2 ],
+			pwdinfo->p2p_peer_interface_addr[ 3 ], pwdinfo->p2p_peer_interface_addr[ 4 ], pwdinfo->p2p_peer_interface_addr[ 5 ]);
+
+	sprintf( extra, "\n\nRole=%.2d\n", pwdinfo->role );
+	wrqu->data.length = strlen( extra );
+	return ret;
+		
+}
+
+
+static int rtw_p2p_get_peer_ifaddr(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	
+	int ret = 0;	
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);	
+	struct iw_point *pdata = &wrqu->data;
+	struct wifidirect_info	*pwdinfo = &( padapter->wdinfo );
+
+
+	DBG_8192C( "[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, pwdinfo->role, pwdinfo->p2p_state,
+			pwdinfo->p2p_peer_interface_addr[ 0 ], pwdinfo->p2p_peer_interface_addr[ 1 ], pwdinfo->p2p_peer_interface_addr[ 2 ],
+			pwdinfo->p2p_peer_interface_addr[ 3 ], pwdinfo->p2p_peer_interface_addr[ 4 ], pwdinfo->p2p_peer_interface_addr[ 5 ]);
+
+	sprintf( extra, "\nMAC %.2X:%.2X:%.2X:%.2X:%.2X:%.2X",
+			pwdinfo->p2p_peer_interface_addr[ 0 ], pwdinfo->p2p_peer_interface_addr[ 1 ], pwdinfo->p2p_peer_interface_addr[ 2 ],
+			pwdinfo->p2p_peer_interface_addr[ 3 ], pwdinfo->p2p_peer_interface_addr[ 4 ], pwdinfo->p2p_peer_interface_addr[ 5 ]);
+	wrqu->data.length = strlen( extra );
+	return ret;
+		
+}
+
+static int rtw_p2p_get_peer_devaddr(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+
+{
+	
+	int ret = 0;	
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);	
+	struct iw_point *pdata = &wrqu->data;
+	struct wifidirect_info	*pwdinfo = &( padapter->wdinfo );
+
+	DBG_8192C( "[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, pwdinfo->role, pwdinfo->p2p_state,
+			pwdinfo->rx_prov_disc_info.peerDevAddr[ 0 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 1 ], 
+			pwdinfo->rx_prov_disc_info.peerDevAddr[ 2 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 3 ],
+			pwdinfo->rx_prov_disc_info.peerDevAddr[ 4 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 5 ]);
+	sprintf( extra, "\n%.2X%.2X%.2X%.2X%.2X%.2X",
+			pwdinfo->rx_prov_disc_info.peerDevAddr[ 0 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 1 ], 
+			pwdinfo->rx_prov_disc_info.peerDevAddr[ 2 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 3 ],
+			pwdinfo->rx_prov_disc_info.peerDevAddr[ 4 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 5 ]);
+	wrqu->data.length = strlen( extra );	
+	return ret;
+		
+}
+
+static int rtw_p2p_get_groupid(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+
+{
+	
+	int ret = 0;	
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);	
+	struct iw_point *pdata = &wrqu->data;
+	struct wifidirect_info	*pwdinfo = &( padapter->wdinfo );
+
+	sprintf( extra, "\n%.2X:%.2X:%.2X:%.2X:%.2X:%.2X-%s",
+			pwdinfo->groupid_info.go_device_addr[ 0 ], pwdinfo->groupid_info.go_device_addr[ 1 ], 
+			pwdinfo->groupid_info.go_device_addr[ 2 ], pwdinfo->groupid_info.go_device_addr[ 3 ],
+			pwdinfo->groupid_info.go_device_addr[ 4 ], pwdinfo->groupid_info.go_device_addr[ 5 ],
+			pwdinfo->groupid_info.ssid);
+	wrqu->data.length = strlen( extra );	
+	return ret;
+		
+}
+
+
+static int rtw_p2p_get_wps_configmethod(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	
+	int ret = 0;	
+	_adapter 				*padapter = (_adapter *)rtw_netdev_priv(dev);	
+	struct iw_point 		*pdata = &wrqu->data;
+	struct wifidirect_info	*pwdinfo = &( padapter->wdinfo );
+	u8					peerMAC[ ETH_ALEN ] = { 0x00 };
+	int 					jj,kk;
+	u8   					peerMACStr[ 17 ] = { 0x00 };
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	_irqL				irqL;
+	_list					*plist, *phead;
+	_queue				*queue	= &(pmlmepriv->scanned_queue);
+	struct	wlan_network	*pnetwork = NULL;
+	u8					blnMatch = 0;
+
+
+	//	Commented by Albert 20110727
+	//	The input data is the MAC address which the application wants to know its WPS config method.
+	//	After knowing its WPS config method, the application can decide the config method for provisioning discovery.
+	//	Format: iwpriv wlanx p2p_get_wpsCM 00:E0:4C:00:00:05
+
+	DBG_8192C( "[%s] data = %s\n", __FUNCTION__, ( char* ) extra );
+	_rtw_memcpy( peerMACStr , extra , 17 );
+
+
+	for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3 )
+	{
+		peerMAC[ jj ] = key_2char2num( peerMACStr[kk], peerMACStr[kk+ 1] );
+	}
+
+	_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+
+	phead = get_list_head(queue);
+	plist = get_next(phead);
+       
+	while(1)
+	{
+		if (rtw_end_of_queue_search(phead,plist)== _TRUE)
+			break;
+
+		pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list);
+		if ( _rtw_memcmp( pnetwork->network.MacAddress, peerMAC, ETH_ALEN ) )
+		{
+			u8	wpsie[ 200 ] = { 0x00 };
+			uint	wpsie_len = 0;
+			u16	attr_content = 0;
+			uint	attr_contentlen = 0;
+			
+              	//	The mac address is matched.
+
+			if ( rtw_get_wps_ie_p2p( &pnetwork->network.IEs[ 12 ], pnetwork->network.IELength - 12, wpsie,  &wpsie_len ) )
+			{
+				rtw_get_wps_attr_content( wpsie, wpsie_len, WPS_ATTR_CONF_METHOD, ( u8* ) &attr_content, &attr_contentlen);
+				if ( attr_contentlen )
+				{
+					attr_content = be16_to_cpu( attr_content );
+					sprintf( extra, "\n\nM=%.4d", attr_content );
+					_rtw_memcpy( wrqu->data.pointer, extra, 4 + 4 );
+					*( (u8*) wrqu->data.pointer + 4 + 4 ) = 0x00;
+					blnMatch = 1;
+				}
+			}
+			
+			break;
+              }
+
+		plist = get_next(plist);
+	
+	}        
+
+	_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+
+	if ( !blnMatch )
+	{
+		sprintf( extra, "\n\nM=0000" );	
+		_rtw_memcpy( wrqu->data.pointer, extra, 4 + 4 );
+		*( (u8*) wrqu->data.pointer + 4 + 4 ) = 0x00;
+	}
+	
+	return ret;
+		
+}
+
+#ifdef CONFIG_WFD
+static int rtw_p2p_get_peer_WFD_port(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	
+	int ret = 0;	
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);	
+	struct iw_point *pdata = &wrqu->data;
+	struct wifidirect_info	*pwdinfo = &( padapter->wdinfo );
+
+	DBG_8192C( "[%s] p2p_state = %d\n", __FUNCTION__, pwdinfo->p2p_state );
+
+	sprintf( extra, "\n\nPort=%d\n", pwdinfo->wfd_info.peer_rtsp_ctrlport );
+	DBG_8192C( "[%s] remote port = %d\n", __FUNCTION__, pwdinfo->wfd_info.peer_rtsp_ctrlport );
+	
+	wrqu->data.length = strlen( extra );
+	return ret;
+		
+}
+#endif // CONFIG_WFD
+
+static int rtw_p2p_get_device_name(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	
+	int ret = 0;	
+	_adapter 				*padapter = (_adapter *)rtw_netdev_priv(dev);	
+	struct iw_point 		*pdata = &wrqu->data;
+	struct wifidirect_info	*pwdinfo = &( padapter->wdinfo );
+	u8					peerMAC[ ETH_ALEN ] = { 0x00 };
+	int 					jj,kk;
+	u8   					peerMACStr[ 17 ] = { 0x00 };
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	_irqL				irqL;
+	_list					*plist, *phead;
+	_queue				*queue	= &(pmlmepriv->scanned_queue);
+	struct	wlan_network	*pnetwork = NULL;
+	u8					blnMatch = 0;
+
+
+	//	Commented by Kurt 20110727
+	//	The input data is the MAC address which the application wants to know its device name.
+	//	Such user interface could show peer device's device name instead of ssid.
+	//	Format: iwpriv wlanx p2p_get_wpsCM 00:E0:4C:00:00:05
+
+	DBG_8192C( "[%s] data = %s\n", __FUNCTION__, ( char* ) extra );
+	_rtw_memcpy( peerMACStr , extra , 17 );
+
+
+	for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3 )
+	{
+		peerMAC[ jj ] = key_2char2num( peerMACStr[kk], peerMACStr[kk+ 1] );
+	}
+
+	_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+
+	phead = get_list_head(queue);
+	plist = get_next(phead);
+       
+	while(1)
+	{
+		if (rtw_end_of_queue_search(phead,plist)== _TRUE)
+			break;
+
+		pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list);
+		if ( _rtw_memcmp( pnetwork->network.MacAddress, peerMAC, ETH_ALEN ) )
+		{
+			u8	wpsie[ 200 ] = { 0x00 };
+			uint	wpsie_len = 0;
+			u8	dev_name[ WPS_MAX_DEVICE_NAME_LEN ] = { 0x00 };
+			uint	dev_len = 0;	
+
+			
+              	//	The mac address is matched.
+
+			if ( rtw_get_wps_ie_p2p( &pnetwork->network.IEs[ 12 ], pnetwork->network.IELength - 12, wpsie,  &wpsie_len ) )
+			{
+				rtw_get_wps_attr_content( wpsie, wpsie_len, WPS_ATTR_DEVICE_NAME, dev_name, &dev_len);
+				if ( dev_len )
+				{
+					sprintf( extra, "\n\nN=%s", dev_name );
+					_rtw_memcpy( wrqu->data.pointer, extra, dev_len + 4 );
+					*( (u8*) wrqu->data.pointer + dev_len + 4 ) = 0x00;
+					blnMatch = 1;
+				}
+			}			
+			break;
+              }
+
+		plist = get_next(plist);
+	
+	}        
+
+	_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+
+	if ( !blnMatch )
+	{
+		sprintf( extra, "\n\nN=0000" );	
+		_rtw_memcpy( wrqu->data.pointer, extra, 4 + 4 );
+		*( (u8*) wrqu->data.pointer + 4 + 4 ) = 0x00;
+	}
+	
+	return ret;
+		
+}
+
+static int rtw_p2p_connect(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	
+	int ret = 0;	
+	_adapter 				*padapter = (_adapter *)rtw_netdev_priv(dev);	
+	struct iw_point 		*pdata = &wrqu->data;
+	struct wifidirect_info	*pwdinfo = &( padapter->wdinfo );
+	u8					peerMAC[ ETH_ALEN ] = { 0x00 };
+	int 					jj,kk;
+	u8   					peerMACStr[ ETH_ALEN * 2 ] = { 0x00 };
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	_irqL				irqL;
+	_list					*plist, *phead;
+	_queue				*queue	= &(pmlmepriv->scanned_queue);
+	struct	wlan_network	*pnetwork = NULL;
+	uint					uintPeerChannel = 0;
+	
+	//	Commented by Albert 20110304
+	//	The input data contains two informations.
+	//	1. First information is the MAC address which wants to formate with
+	//	2. Second information is the WPS PINCode or "pbc" string for push button method
+	//	Format: 00:E0:4C:00:00:05
+	//	Format: 00:E0:4C:00:00:05
+
+	DBG_8192C( "[%s] data = %s\n", __FUNCTION__, extra );
+
+	if ( ( pwdinfo->p2p_state == P2P_STATE_NONE ) || ( pwdinfo->p2p_state == P2P_STATE_IDLE ) )
+	{
+		DBG_8192C( "[%s] WiFi Direct is disable!\n", __FUNCTION__ );
+		return ret;
+	}
+	
+	if ( pwdinfo->ui_got_wps_info == P2P_NO_WPSINFO )
+	{
+		return -1;
+	}
+	
+	for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3 )
+	{
+		peerMAC[ jj ] = key_2char2num( extra[kk], extra[kk+ 1] );
+	}
+
+	_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+
+	phead = get_list_head(queue);
+	plist = get_next(phead);
+       
+	while(1)
+	{
+		if (rtw_end_of_queue_search(phead,plist)== _TRUE)
+			break;
+
+		pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list);
+		if ( _rtw_memcmp( pnetwork->network.MacAddress, peerMAC, ETH_ALEN ) )
+		{
+			uintPeerChannel = pnetwork->network.Configuration.DSConfig;
+			break;
+              }
+
+		plist = get_next(plist);
+	
+	}        
+
+	_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+
+	if ( uintPeerChannel )
+	{
+		_rtw_memset( &pwdinfo->nego_req_info, 0x00, sizeof( struct tx_nego_req_info ) );
+		_rtw_memset( &pwdinfo->groupid_info, 0x00, sizeof( struct group_id_info ) );
+		
+		pwdinfo->nego_req_info.peer_channel_num[ 0 ] = uintPeerChannel;
+		_rtw_memcpy( pwdinfo->nego_req_info.peerDevAddr, pnetwork->network.MacAddress, ETH_ALEN );
+		pwdinfo->nego_req_info.benable = _TRUE;
+		
+		pwdinfo->pre_p2p_state = pwdinfo->p2p_state;
+		pwdinfo->p2p_state = P2P_STATE_GONEGO_ING;
+		
+		DBG_8192C( "[%s] Start PreTx Procedure!\n", __FUNCTION__ );
+		_set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT );
+		_set_timer( &pwdinfo->restore_p2p_state_timer, P2P_GO_NEGO_TIMEOUT );
+	}
+	else
+	{
+		DBG_8192C( "[%s] Not Found in Scanning Queue~\n", __FUNCTION__ );
+		ret = -1;
+	}
+exit:
+	
+	return ret;		
+}
+
+static int rtw_p2p_prov_disc(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	
+	int ret = 0;	
+	_adapter 				*padapter = (_adapter *)rtw_netdev_priv(dev);	
+	struct iw_point 		*pdata = &wrqu->data;
+	struct wifidirect_info	*pwdinfo = &( padapter->wdinfo );
+	u8					peerMAC[ ETH_ALEN ] = { 0x00 };
+	int 					jj,kk;
+	u8   					peerMACStr[ ETH_ALEN * 2 ] = { 0x00 };
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	_list					*plist, *phead;
+	_queue				*queue	= &(pmlmepriv->scanned_queue);
+	struct	wlan_network	*pnetwork = NULL;
+	uint					uintPeerChannel = 0;
+	u8					p2pie[255] = { 0x00 }, attr_content[50] = { 0x00 }, _status = 0;
+	uint					p2pielen = 0, attr_contentlen = 0;
+	_irqL				irqL;
+	
+	//	Commented by Albert 20110301
+	//	The input data contains two informations.
+	//	1. First information is the MAC address which wants to issue the provisioning discovery request frame.
+	//	2. Second information is the WPS configuration method which wants to discovery
+	//	Format: 00:E0:4C:00:00:05_display
+	//	Format: 00:E0:4C:00:00:05_keypad
+	//	Format: 00:E0:4C:00:00:05_pbc
+	//	Format: 00:E0:4C:00:00:05_label
+
+	DBG_8192C( "[%s] data = %s\n", __FUNCTION__, extra );
+
+	if ( ( pwdinfo->p2p_state == P2P_STATE_NONE ) || ( pwdinfo->p2p_state == P2P_STATE_IDLE ) )
+	{
+		DBG_8192C( "[%s] WiFi Direct is disable!\n", __FUNCTION__ );
+		return ret;
+	}
+	else
+	{
+		//	Reset the content of struct tx_provdisc_req_info excluded the wps_config_method_request.
+		_rtw_memset( pwdinfo->tx_prov_disc_info.peerDevAddr, 0x00, ETH_ALEN );
+		_rtw_memset( pwdinfo->tx_prov_disc_info.peerIFAddr, 0x00, ETH_ALEN );
+		_rtw_memset( &pwdinfo->tx_prov_disc_info.ssid, 0x00, sizeof( NDIS_802_11_SSID ) );		
+		pwdinfo->tx_prov_disc_info.peer_channel_num[ 0 ] = 0;
+		pwdinfo->tx_prov_disc_info.peer_channel_num[ 1 ] = 0;		
+		pwdinfo->tx_prov_disc_info.benable = _FALSE;
+	}
+	
+	for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3 )
+	{
+		peerMAC[ jj ] = key_2char2num( extra[kk], extra[kk+ 1] );
+	}
+
+	if ( _rtw_memcmp( &extra[ 18 ], "display", 7 ) )
+	{
+		pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_DISPLYA;
+	}
+	else if ( _rtw_memcmp( &extra[ 18 ], "keypad", 7 ) )
+	{
+		pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_KEYPAD;
+	}
+	else if ( _rtw_memcmp( &extra[ 18 ], "pbc", 3 ) )
+	{
+		pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_PUSH_BUTTON;
+	}
+	else if ( _rtw_memcmp( &extra[ 18 ], "label", 5 ) )
+	{
+		pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_LABEL;
+	}
+	else
+	{
+		DBG_8192C( "[%s] Unknown WPS config methodn", __FUNCTION__ );
+		return( ret );
+	}
+
+	_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+
+	phead = get_list_head(queue);
+	plist = get_next(phead);
+       
+	while(1)
+	{
+		if (rtw_end_of_queue_search(phead,plist)== _TRUE)
+			break;
+
+		pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list);
+
+		//	Commented by Albert 2011/05/18
+		//	Match the device address located in the P2P IE
+		//	This is for the case that the P2P device address is not the same as the P2P interface address.
+
+		if ( rtw_get_p2p_ie( &pnetwork->network.IEs[12], pnetwork->network.IELength - 12, p2pie, &p2pielen) )
+		{
+			//	The P2P Device ID attribute is included in the Beacon frame.
+			//	The P2P Device Info attribute is included in the probe response frame.
+
+			if ( rtw_get_p2p_attr_content( p2pie, p2pielen, P2P_ATTR_DEVICE_ID, attr_content, &attr_contentlen) )
+			{
+				//	Handle the P2P Device ID attribute of Beacon first
+				if ( _rtw_memcmp( attr_content, peerMAC, ETH_ALEN ) )
+				{
+					uintPeerChannel = pnetwork->network.Configuration.DSConfig;
+					break;
+				}
+			}
+			else if ( rtw_get_p2p_attr_content( p2pie, p2pielen, P2P_ATTR_DEVICE_INFO, attr_content, &attr_contentlen) )
+			{
+				//	Handle the P2P Device Info attribute of probe response
+				if ( _rtw_memcmp( attr_content, peerMAC, ETH_ALEN ) )
+				{
+					uintPeerChannel = pnetwork->network.Configuration.DSConfig;
+					break;
+				}					
+			}
+
+		}
+
+		plist = get_next(plist);
+	
+	}
+
+	_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
+
+	if ( uintPeerChannel )
+	{
+		_rtw_memcpy( pwdinfo->tx_prov_disc_info.peerIFAddr, pnetwork->network.MacAddress, ETH_ALEN );
+		_rtw_memcpy( pwdinfo->tx_prov_disc_info.peerDevAddr, peerMAC, ETH_ALEN );
+		pwdinfo->tx_prov_disc_info.peer_channel_num[0] = ( u16 ) uintPeerChannel;
+		pwdinfo->tx_prov_disc_info.benable = _TRUE;
+		pwdinfo->pre_p2p_state = pwdinfo->p2p_state;
+		pwdinfo->p2p_state = P2P_STATE_TX_PROVISION_DIS_REQ;
+
+		if ( P2P_ROLE_CLIENT == pwdinfo->role )
+		{
+			_rtw_memcpy( &pwdinfo->tx_prov_disc_info.ssid, &pnetwork->network.Ssid, sizeof( NDIS_802_11_SSID ) );
+		}
+		else if ( ( P2P_ROLE_DEVICE == pwdinfo->role ) || ( P2P_ROLE_GO == pwdinfo->role ) )
+		{
+			_rtw_memcpy( pwdinfo->tx_prov_disc_info.ssid.Ssid, pwdinfo->p2p_wildcard_ssid, P2P_WILDCARD_SSID_LEN );
+			pwdinfo->tx_prov_disc_info.ssid.SsidLength= P2P_WILDCARD_SSID_LEN;
+		}
+
+		set_channel_bwmode(padapter, uintPeerChannel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20);
+		_set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT );
+		_set_timer( &pwdinfo->restore_p2p_state_timer, P2P_PROVISION_TIMEOUT );
+		
+	}
+	else
+	{
+		DBG_8192C( "[%s] NOT Found in the Scanning Queue!\n", __FUNCTION__ );
+	}
+exit:
+	
+	return ret;
+		
+}
+
+//	Added by Albert 20110328
+//	This function is used to inform the driver the user had specified the pin code value or pbc
+//	to application.
+
+static int rtw_p2p_got_wpsinfo(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	
+	int ret = 0;	
+	_adapter 				*padapter = (_adapter *)rtw_netdev_priv(dev);	
+	struct iw_point 		*pdata = &wrqu->data;
+	struct wifidirect_info	*pwdinfo = &( padapter->wdinfo );
+	
+
+	DBG_8192C( "[%s] data = %s\n", __FUNCTION__, extra );
+	//	Added by Albert 20110328
+	//	if the input data is P2P_NO_WPSINFO -> reset the wpsinfo
+	//	if the input data is P2P_GOT_WPSINFO_PEER_DISPLAY_PIN -> the utility just input the PIN code got from the peer P2P device.
+	//	if the input data is P2P_GOT_WPSINFO_SELF_DISPLAY_PIN -> the utility just got the PIN code from itself.
+	//	if the input data is P2P_GOT_WPSINFO_PBC -> the utility just determine to use the PBC
+	
+	if ( *extra == '0' )
+	{
+		pwdinfo->ui_got_wps_info = P2P_NO_WPSINFO;
+	}
+	else if ( *extra == '1' )
+	{
+		pwdinfo->ui_got_wps_info = P2P_GOT_WPSINFO_PEER_DISPLAY_PIN;
+	}
+	else if ( *extra == '2' )
+	{
+		pwdinfo->ui_got_wps_info = P2P_GOT_WPSINFO_SELF_DISPLAY_PIN;
+	}
+	else if ( *extra == '3' )
+	{
+		pwdinfo->ui_got_wps_info = P2P_GOT_WPSINFO_PBC;
+	}
+	else
+	{
+		pwdinfo->ui_got_wps_info = P2P_NO_WPSINFO;
+	}
+	
+	return ret;
+		
+}
+
+#endif //CONFIG_P2P
+
+static int rtw_p2p_set(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	
+	int ret = 0;
+#ifdef CONFIG_P2P
+
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);	
+	struct iw_point *pdata = &wrqu->data;
+	struct wifidirect_info *pwdinfo= &(padapter->wdinfo);
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+
+	DBG_8192C( "[%s] extra = %s\n", __FUNCTION__, extra );
+
+	if ( _rtw_memcmp( extra, "enable=", 7 ) )
+	{
+		rtw_p2p_enable( dev, info, wrqu, &extra[7] );
+	}
+	else if ( _rtw_memcmp( extra, "setDN=", 6 ) )
+	{
+		wrqu->data.length -= 6;
+		rtw_p2p_setDN( dev, info, wrqu, &extra[6] );
+	}
+	else if ( _rtw_memcmp( extra, "profilefound=", 13 ) )
+	{
+		wrqu->data.length -= 13;
+		rtw_p2p_profilefound( dev, info, wrqu, &extra[13] );
+	}
+	else if ( _rtw_memcmp( extra, "prov_disc=", 10 ) )
+	{
+		wrqu->data.length -= 10;
+		rtw_p2p_prov_disc( dev, info, wrqu, &extra[10] );
+	}
+	else if ( _rtw_memcmp( extra, "nego=", 5 ) )
+	{
+		wrqu->data.length -= 5;
+		rtw_p2p_connect( dev, info, wrqu, &extra[5] );
+	}
+	else if ( _rtw_memcmp( extra, "intent=", 7 ) )
+	{
+		//	Commented by Albert 2011/03/23
+		//	The wrqu->data.length will include the null character
+		//	So, we will decrease 7 + 1
+		wrqu->data.length -= 8;
+		rtw_p2p_set_intent( dev, info, wrqu, &extra[7] );
+	}
+	else if ( _rtw_memcmp( extra, "ssid=", 5 ) )
+	{
+		wrqu->data.length -= 5;
+		rtw_p2p_set_go_nego_ssid( dev, info, wrqu, &extra[5] );
+	}
+	else if ( _rtw_memcmp( extra, "got_wpsinfo=", 12 ) )
+	{
+		wrqu->data.length -= 12;
+		rtw_p2p_got_wpsinfo( dev, info, wrqu, &extra[12] );
+	}
+	else if ( _rtw_memcmp( extra, "listen_ch=", 10 ) )
+	{
+		//	Commented by Albert 2011/05/24
+		//	The wrqu->data.length will include the null character
+		//	So, we will decrease (10 + 1)	
+		wrqu->data.length -= 11;
+		rtw_p2p_set_listen_ch( dev, info, wrqu, &extra[10] );
+	}
+	else if ( _rtw_memcmp( extra, "op_ch=", 6 ) )
+	{
+		//	Commented by Albert 2011/05/24
+		//	The wrqu->data.length will include the null character
+		//	So, we will decrease (6 + 1)	
+		wrqu->data.length -= 7;
+		rtw_p2p_set_op_ch( dev, info, wrqu, &extra[6] );
+	}
+
+	
+#endif //CONFIG_P2P
+
+	return ret;
+		
+}
+
+static int rtw_p2p_get(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	
+	int ret = 0;	
+	
+#ifdef CONFIG_P2P
+
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);	
+	struct iw_point *pdata = &wrqu->data;
+	struct wifidirect_info *pwdinfo= &(padapter->wdinfo);
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+
+	DBG_8192C( "[%s] extra = %s\n", __FUNCTION__, (char*) wrqu->data.pointer );
+	
+	if ( _rtw_memcmp( wrqu->data.pointer, "status", 6 ) )
+	{
+		rtw_p2p_get_status( dev, info, wrqu, extra );
+	}
+	else if ( _rtw_memcmp( wrqu->data.pointer, "role", 4 ) )
+	{
+		rtw_p2p_get_role( dev, info, wrqu, extra);
+	}
+	else if ( _rtw_memcmp( wrqu->data.pointer, "peer_ifa", 8 ) )
+	{
+		rtw_p2p_get_peer_ifaddr( dev, info, wrqu, extra);
+	}
+	else if ( _rtw_memcmp( wrqu->data.pointer, "req_cm", 6 ) )
+	{
+		rtw_p2p_get_req_cm( dev, info, wrqu, extra);
+	}
+	else if ( _rtw_memcmp( wrqu->data.pointer, "peer_deva", 9 ) )
+	{
+		rtw_p2p_get_peer_devaddr( dev, info, wrqu, extra);
+	}
+	else if ( _rtw_memcmp( wrqu->data.pointer, "group_id", 8 ) )
+	{
+		rtw_p2p_get_groupid( dev, info, wrqu, extra);
+	}
+#ifdef CONFIG_WFD
+	else if ( _rtw_memcmp( wrqu->data.pointer, "peer_port", 9 ) )
+	{
+		rtw_p2p_get_peer_WFD_port( dev, info, wrqu, extra );
+	}
+#endif // CONFIG_WFD	
+	
+#endif //CONFIG_P2P
+
+	return ret;
+		
+}
+
+static int rtw_p2p_get2(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	
+	int ret = 0;	
+	
+#ifdef CONFIG_P2P
+
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);	
+	struct iw_point *pdata = &wrqu->data;
+	struct wifidirect_info *pwdinfo= &(padapter->wdinfo);
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+
+	DBG_8192C( "[%s] extra = %s\n", __FUNCTION__, (char*) wrqu->data.pointer );
+	
+	if ( _rtw_memcmp( extra, "wpsCM=", 6 ) )
+	{
+		wrqu->data.length -= 6;
+		rtw_p2p_get_wps_configmethod( dev, info, wrqu,  &extra[6]);
+	}
+	else if ( _rtw_memcmp( extra, "devN=", 5 ) )
+	{
+		wrqu->data.length -= 5;
+		rtw_p2p_get_device_name( dev, info, wrqu, &extra[5] );
+	}
+	
+#endif //CONFIG_P2P
+
+	return ret;
+		
+}
+
+extern char *ifname;
+extern int rtw_change_ifname(_adapter *padapter, const char *ifname);
+static int rtw_rereg_nd_name(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	int ret = 0;	
+	_adapter *padapter = rtw_netdev_priv(dev);
+	struct rereg_nd_name_data *rereg_priv = &padapter->rereg_nd_name_priv;
+	char new_ifname[IFNAMSIZ];
+
+	if(rereg_priv->old_ifname[0] == 0) {
+		strncpy(rereg_priv->old_ifname, ifname, IFNAMSIZ);
+		rereg_priv->old_ifname[IFNAMSIZ-1] = 0;
+	}
+
+	//DBG_871X("%s wrqu->data.length:%d\n", __FUNCTION__, wrqu->data.length);
+	if(wrqu->data.length > IFNAMSIZ)
+		return -EFAULT;
+
+	if ( copy_from_user(new_ifname, wrqu->data.pointer, IFNAMSIZ) ) {
+		return -EFAULT;
+	}
+
+	if( 0 == strcmp(rereg_priv->old_ifname, new_ifname) ) {
+		return ret;
+	}
+
+	DBG_871X("%s new_ifname:%s\n", __FUNCTION__, new_ifname);
+	if( 0 != (ret = rtw_change_ifname(padapter, new_ifname)) ) {
+		goto exit;
+	}
+
+	if(_rtw_memcmp(rereg_priv->old_ifname, "disable%d", 9) == _TRUE) {
+		padapter->ledpriv.bRegUseLed= rereg_priv->old_bRegUseLed;
+		rtw_sw_led_init(padapter);
+		rtw_ips_mode_req(&padapter->pwrctrlpriv, rereg_priv->old_ips_mode);
+	}
+
+	strncpy(rereg_priv->old_ifname, new_ifname, IFNAMSIZ);
+	rereg_priv->old_ifname[IFNAMSIZ-1] = 0;
+	
+	if(_rtw_memcmp(new_ifname, "disable%d", 9) == _TRUE) {
+
+		DBG_871X("%s disable\n", __FUNCTION__);
+		// free network queue for Android's timming issue
+		rtw_free_network_queue(padapter, _TRUE);
+		
+		// close led
+		rtw_led_control(padapter, LED_CTL_POWER_OFF);
+		rereg_priv->old_bRegUseLed = padapter->ledpriv.bRegUseLed;
+		padapter->ledpriv.bRegUseLed= _FALSE;
+		rtw_sw_led_deinit(padapter);
+		
+		// the interface is being "disabled", we can do deeper IPS
+		rereg_priv->old_ips_mode = rtw_get_ips_mode_req(&padapter->pwrctrlpriv);
+		rtw_ips_mode_req(&padapter->pwrctrlpriv, IPS_NORMAL);
+	}
+exit:
+	return ret;
+
+}
+
+#if 0
+void mac_reg_dump(_adapter *padapter)
+{
+	int i,j=1;		
+	DBG_8192C("\n======= MAC REG =======\n");
+	for(i=0x0;i<0x300;i+=4)
+	{	
+		if(j%4==1)	DBG_8192C("0x%02x",i);
+		DBG_8192C(" 0x%08x ",rtw_read32(padapter,i));		
+		if((j++)%4 == 0)	DBG_8192C("\n");	
+	}
+	for(i=0x400;i<0x800;i+=4)
+	{	
+		if(j%4==1)	DBG_8192C("0x%02x",i);
+		DBG_8192C(" 0x%08x ",rtw_read32(padapter,i));		
+		if((j++)%4 == 0)	DBG_8192C("\n");	
+	}									
+}
+void bb_reg_dump(_adapter *padapter)
+{
+	int i,j=1;		
+	DBG_8192C("\n======= BB REG =======\n");
+	for(i=0x800;i<0x1000;i+=4)
+	{
+		if(j%4==1) DBG_8192C("0x%02x",i);
+				
+		DBG_8192C(" 0x%08x ",rtw_read32(padapter,i));		
+		if((j++)%4 == 0)	DBG_8192C("\n");	
+	}		
+}
+void rf_reg_dump(_adapter *padapter)
+{	
+	int i,j=1,path;
+	u32 value;			
+	DBG_8192C("\n======= RF REG =======\n");
+	for(path=0;path<2;path++)
+	{
+		DBG_8192C("\nRF_Path(%x)\n",path);
+		for(i=0;i<0x100;i++)
+		{								
+			value = PHY_QueryRFReg(padapter, (RF90_RADIO_PATH_E)path,i, bMaskDWord);
+			if(j%4==1)	DBG_8192C("0x%02x ",i);
+			DBG_8192C(" 0x%08x ",value);
+			if((j++)%4==0)	DBG_8192C("\n");	
+		}	
+	}
+}
+
+#endif
+
+void mac_reg_dump(_adapter *padapter)
+{
+	int i,j=1;		
+	DBG_8192C("\n======= MAC REG =======\n");
+	for(i=0x0;i<0x300;i+=4)
+	{	
+		if(j%4==1)	DBG_8192C("0x%02x",i);
+		DBG_8192C(" 0x%08x ",rtw_read32(padapter,i));		
+		if((j++)%4 == 0)	DBG_8192C("\n");	
+	}
+	for(i=0x400;i<0x800;i+=4)
+	{	
+		if(j%4==1)	DBG_8192C("0x%02x",i);
+		DBG_8192C(" 0x%08x ",rtw_read32(padapter,i));		
+		if((j++)%4 == 0)	DBG_8192C("\n");	
+	}									
+}
+void bb_reg_dump(_adapter *padapter)
+{
+	int i,j=1;		
+	DBG_8192C("\n======= BB REG =======\n");
+	for(i=0x800;i<0x1000;i+=4)
+	{
+		if(j%4==1) DBG_8192C("0x%02x",i);
+				
+		DBG_8192C(" 0x%08x ",rtw_read32(padapter,i));		
+		if((j++)%4 == 0)	DBG_8192C("\n");	
+	}		
+}
+void rf_reg_dump(_adapter *padapter)
+{	
+	int i,j=1,path;
+	u32 value;	
+	u8 rf_type,path_nums = 0;
+	padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
+		
+	DBG_8192C("\n======= RF REG =======\n");
+	if((RF_1T2R == rf_type) ||(RF_1T1R ==rf_type ))	
+		path_nums = 1;
+	else	
+		path_nums = 2;
+		
+	for(path=0;path<path_nums;path++)
+	{
+		DBG_8192C("\nRF_Path(%x)\n",path);
+		for(i=0;i<0x100;i++)
+		{								
+			//value = PHY_QueryRFReg(padapter, (RF90_RADIO_PATH_E)path,i, bMaskDWord);
+			value =padapter->HalFunc.read_rfreg(padapter, path, i, 0xffffffff);
+			if(j%4==1)	DBG_8192C("0x%02x ",i);
+			DBG_8192C(" 0x%08x ",value);
+			if((j++)%4==0)	DBG_8192C("\n");	
+		}	
+	}
+}
+
+#ifdef CONFIG_IOL
+#include <rtw_iol.h>
+#endif
+static int rtw_dbg_port(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{	
+	_irqL irqL;
+	int ret = 0;
+	u8 major_cmd, minor_cmd;
+	u16 arg;
+	u32 extra_arg, *pdata, val32;
+	struct sta_info *psta;						
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct security_priv *psecuritypriv = &padapter->securitypriv;
+	struct wlan_network *cur_network = &(pmlmepriv->cur_network);
+	struct sta_priv *pstapriv = &padapter->stapriv;
+	
+
+	pdata = (u32*)&wrqu->data;	
+
+	val32 = *pdata;
+	arg = (u16)(val32&0x0000ffff);
+	major_cmd = (u8)(val32>>24);
+	minor_cmd = (u8)((val32>>16)&0x00ff);
+
+	extra_arg = *(pdata+1);
+	
+	switch(major_cmd)
+	{
+		case 0x70://read_reg
+			switch(minor_cmd)
+			{
+				case 1:
+					DBG_8192C("rtw_read8(0x%x)=0x%02x\n", arg, rtw_read8(padapter, arg));
+					break;
+				case 2:
+					DBG_8192C("rtw_read16(0x%x)=0x%04x\n", arg, rtw_read16(padapter, arg));
+					break;
+				case 4:
+					DBG_8192C("rtw_read32(0x%x)=0x%08x\n", arg, rtw_read32(padapter, arg));
+					break;
+			}			
+			break;
+		case 0x71://write_reg
+			switch(minor_cmd)
+			{
+				case 1:
+					rtw_write8(padapter, arg, extra_arg);
+					DBG_8192C("rtw_write8(0x%x)=0x%02x\n", arg, rtw_read8(padapter, arg));
+					break;
+				case 2:
+					rtw_write16(padapter, arg, extra_arg);
+					DBG_8192C("rtw_write16(0x%x)=0x%04x\n", arg, rtw_read16(padapter, arg));
+					break;
+				case 4:
+					rtw_write32(padapter, arg, extra_arg);
+					DBG_8192C("rtw_write32(0x%x)=0x%08x\n", arg, rtw_read32(padapter, arg));
+					break;
+			}			
+			break;
+		case 0x72://read_bb
+			DBG_8192C("read_bbreg(0x%x)=0x%x\n", arg, padapter->HalFunc.read_bbreg(padapter, arg, 0xffffffff));
+			break;
+		case 0x73://write_bb
+			padapter->HalFunc.write_bbreg(padapter, arg, 0xffffffff, extra_arg);
+			DBG_8192C("write_bbreg(0x%x)=0x%x\n", arg, padapter->HalFunc.read_bbreg(padapter, arg, 0xffffffff));
+			break;
+		case 0x74://read_rf
+			DBG_8192C("read RF_reg path(0x%02x),offset(0x%x),value(0x%08x)\n",minor_cmd,arg,padapter->HalFunc.read_rfreg(padapter, minor_cmd, arg, 0xffffffff));	
+			break;
+		case 0x75://write_rf
+			padapter->HalFunc.write_rfreg(padapter, minor_cmd, arg, 0xffffffff, extra_arg);
+			DBG_8192C("write RF_reg path(0x%02x),offset(0x%x),value(0x%08x)\n",minor_cmd,arg, padapter->HalFunc.read_rfreg(padapter, minor_cmd, arg, 0xffffffff));
+			break;	
+
+		case 0x76:
+			switch(minor_cmd)
+			{
+				case 0x00: //normal mode, 
+					padapter->recvpriv.is_signal_dbg = 0;
+					break;
+				case 0x01: //dbg mode
+					padapter->recvpriv.is_signal_dbg = 1;
+					extra_arg = extra_arg>100?100:extra_arg;
+					extra_arg = extra_arg<0?0:extra_arg;
+					padapter->recvpriv.signal_strength_dbg=extra_arg;
+					break;
+			}
+			break;
+		case 0x78: //IOL test
+			switch(minor_cmd)
+			{
+				#ifdef CONFIG_IOL
+				case 0x04: //LLT table initialization test
+				{
+					u8 page_boundary = 0xf9;
+					{
+						struct xmit_frame	*xmit_frame;
+
+						if((xmit_frame=rtw_IOL_accquire_xmit_frame(padapter)) == NULL) {
+							ret = -ENOMEM;	
+							break;
+						}
+						
+						rtw_IOL_append_LLT_cmd(xmit_frame, page_boundary);
+
+
+						if(_SUCCESS != rtw_IOL_exec_cmds_sync(padapter, xmit_frame, 500) )
+							ret = -EPERM;
+					}
+				}
+					break;
+				case 0x05: //blink LED test
+				{
+					u16 reg = 0x4c;
+					u32 blink_num = 50;
+					u32 blink_delay_ms = 200;
+					int i;
+					
+					{
+						struct xmit_frame	*xmit_frame;
+
+						if((xmit_frame=rtw_IOL_accquire_xmit_frame(padapter)) == NULL) {
+							ret = -ENOMEM;	
+							break;
+						}
+
+						for(i=0;i<blink_num;i++){
+							rtw_IOL_append_WB_cmd(xmit_frame, reg, 0x00);
+							rtw_IOL_append_DELAY_MS_cmd(xmit_frame, blink_delay_ms);
+							rtw_IOL_append_WB_cmd(xmit_frame, reg, 0x08);
+							rtw_IOL_append_DELAY_MS_cmd(xmit_frame, blink_delay_ms);
+						}
+						if(_SUCCESS != rtw_IOL_exec_cmds_sync(padapter, xmit_frame, (blink_delay_ms*blink_num*2)+200) )
+							ret = -EPERM;
+					}
+				}
+					break;
+					
+				case 0x06: //continuous wirte byte test
+				{
+					u16 reg = arg;
+					u16 start_value = 0;
+					u32 write_num = extra_arg;
+					int i;
+					u8 final;
+					
+					{
+						struct xmit_frame	*xmit_frame;
+
+						if((xmit_frame=rtw_IOL_accquire_xmit_frame(padapter)) == NULL) {
+							ret = -ENOMEM;	
+							break;
+						}
+
+						for(i=0;i<write_num;i++){
+							rtw_IOL_append_WB_cmd(xmit_frame, reg, i+start_value);
+						}
+						if(_SUCCESS != rtw_IOL_exec_cmds_sync(padapter, xmit_frame, 5000))
+							ret = -EPERM;
+					}
+
+					if(start_value+write_num-1 == (final=rtw_read8(padapter, reg)) ) {
+						DBG_871X("continuous IOL_CMD_WB_REG to 0x%x %u times Success, start:%u, final:%u\n", reg, write_num, start_value, final);
+					} else {
+						DBG_871X("continuous IOL_CMD_WB_REG to 0x%x %u times Fail, start:%u, final:%u\n", reg, write_num, start_value, final);
+					}
+				}
+					break;
+					
+				case 0x07: //continuous wirte word test
+				{
+					u16 reg = arg;
+					u16 start_value = 200;
+					u32 write_num = extra_arg;
+				
+					int i;
+					u16 final;
+
+					{
+						struct xmit_frame	*xmit_frame;
+
+						if((xmit_frame=rtw_IOL_accquire_xmit_frame(padapter)) == NULL) {
+							ret = -ENOMEM;	
+							break;
+						}
+
+						for(i=0;i<write_num;i++){
+							rtw_IOL_append_WW_cmd(xmit_frame, reg, i+start_value);
+						}
+						if(_SUCCESS !=rtw_IOL_exec_cmds_sync(padapter, xmit_frame, 5000))
+							ret = -EPERM;
+					}
+
+					if(start_value+write_num-1 == (final=rtw_read16(padapter, reg)) ) {
+						DBG_871X("continuous IOL_CMD_WW_REG to 0x%x %u times Success, start:%u, final:%u\n", reg, write_num, start_value, final);
+					} else {
+						DBG_871X("continuous IOL_CMD_WW_REG to 0x%x %u times Fail, start:%u, final:%u\n", reg, write_num, start_value, final);
+					}
+				}
+					break;
+					
+				case 0x08: //continuous wirte dword test
+				{
+					u16 reg = arg;
+					u32 start_value = 0x110000c7;
+					u32 write_num = extra_arg;
+				
+					int i;
+					u32 final;
+
+					{
+						struct xmit_frame	*xmit_frame;
+
+						if((xmit_frame=rtw_IOL_accquire_xmit_frame(padapter)) == NULL) {
+							ret = -ENOMEM;	
+							break;
+						}
+
+						for(i=0;i<write_num;i++){
+							rtw_IOL_append_WD_cmd(xmit_frame, reg, i+start_value);
+						}
+						if(_SUCCESS !=rtw_IOL_exec_cmds_sync(padapter, xmit_frame, 5000))
+							ret = -EPERM;
+							
+					}
+
+					if(start_value+write_num-1 == (final=rtw_read32(padapter, reg)) ) {
+						DBG_871X("continuous IOL_CMD_WD_REG to 0x%x %u times Success, start:%u, final:%u\n", reg, write_num, start_value, final);
+					} else {
+						DBG_871X("continuous IOL_CMD_WD_REG to 0x%x %u times Fail, start:%u, final:%u\n", reg, write_num, start_value, final);
+					}
+				}
+					break;
+				#endif //CONFIG_IOL
+			}
+			break;
+
+		case 0x7F:
+			switch(minor_cmd)
+			{
+				case 0x0:
+					DBG_8192C("fwstate=0x%x\n", get_fwstate(pmlmepriv));
+					break;
+				case 0x01:
+					DBG_8192C("auth_alg=0x%x, enc_alg=0x%x, auth_type=0x%x, enc_type=0x%x\n", 
+						psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm,
+						psecuritypriv->ndisauthtype, psecuritypriv->ndisencryptstatus);
+					break;
+				case 0x02:
+					DBG_8192C("pmlmeinfo->state=0x%x\n", pmlmeinfo->state);
+					break;
+				case 0x03:
+					DBG_8192C("qos_option=%d\n", pmlmepriv->qospriv.qos_option);
+					DBG_8192C("ht_option=%d\n", pmlmepriv->htpriv.ht_option);
+					break;
+				case 0x04:
+					DBG_8192C("cur_ch=%d\n", pmlmeext->cur_channel);
+					DBG_8192C("cur_bw=%d\n", pmlmeext->cur_bwmode);
+					DBG_8192C("cur_ch_off=%d\n", pmlmeext->cur_ch_offset);
+					break;
+				case 0x05:
+					psta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress);
+					if(psta)
+					{
+						int i;
+						struct recv_reorder_ctrl *preorder_ctrl;
+					
+						DBG_8192C("sta's macaddr:" MAC_FMT "\n", MAC_ARG(psta->hwaddr));
+						DBG_8192C("rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self);
+						DBG_8192C("qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate);	
+						DBG_8192C("state=0x%x, aid=%d, macid=%d, raid=%d\n", psta->state, psta->aid, psta->mac_id, psta->raid);	
+						DBG_8192C("bwmode=%d, ch_offset=%d, sgi=%d\n", psta->htpriv.bwmode, psta->htpriv.ch_offset, psta->htpriv.sgi);						
+						DBG_8192C("ampdu_enable = %d\n", psta->htpriv.ampdu_enable);	
+						DBG_8192C("agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap);
+						
+						for(i=0;i<16;i++)
+						{							
+							preorder_ctrl = &psta->recvreorder_ctrl[i];
+							if(preorder_ctrl->enable)
+							{
+								DBG_8192C("tid=%d, indicate_seq=%d\n", i, preorder_ctrl->indicate_seq);
+							}
+						}	
+							
+					}
+					else
+					{							
+						DBG_8192C("can't get sta's macaddr, cur_network's macaddr:" MAC_FMT "\n", MAC_ARG(cur_network->network.MacAddress));
+					}					
+					break;
+				case 0x06:
+					{
+						u8	DMFlag;
+						padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_DM_FLAG, (u8 *)(&DMFlag));
+						DBG_8192C("(B)DMFlag=0x%x, arg=0x%x\n", DMFlag, arg);
+						DMFlag = (u8)(0x0f&arg);
+						DBG_8192C("(A)DMFlag=0x%x\n", DMFlag);
+						padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_DM_FLAG, (u8 *)(&DMFlag));
+					}
+					break;
+				case 0x07:
+					DBG_8192C("bSurpriseRemoved=%d, bDriverStopped=%d\n", 
+						padapter->bSurpriseRemoved, padapter->bDriverStopped);
+					break;
+                                case 0x08:
+					{
+						struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
+						struct recv_priv  *precvpriv = &padapter->recvpriv;
+						
+						DBG_8192C("free_xmitbuf_cnt=%d, free_xmitframe_cnt=%d\n", 
+							pxmitpriv->free_xmitbuf_cnt, pxmitpriv->free_xmitframe_cnt);
+						#ifdef CONFIG_USB_HCI
+						DBG_8192C("rx_urb_pending_cn=%d\n", precvpriv->rx_pending_cnt);
+						#endif
+					}
+					break;	
+				case 0x09:
+					{
+						int i, j;
+						_list	*plist, *phead;
+						struct recv_reorder_ctrl *preorder_ctrl;
+						
+#ifdef CONFIG_AP_MODE
+						DBG_8192C("sta_dz_bitmap=0x%x, tim_bitmap=0x%x\n", pstapriv->sta_dz_bitmap, pstapriv->tim_bitmap);
+#endif						
+						_enter_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+
+						for(i=0; i< NUM_STA; i++)
+						{
+							phead = &(pstapriv->sta_hash[i]);
+							plist = get_next(phead);
+		
+							while ((rtw_end_of_queue_search(phead, plist)) == _FALSE)
+							{
+								psta = LIST_CONTAINOR(plist, struct sta_info, hash_list);
+
+								plist = get_next(plist);
+
+								if(extra_arg == psta->aid)
+								{
+									DBG_8192C("sta's macaddr:" MAC_FMT "\n", MAC_ARG(psta->hwaddr));
+									DBG_8192C("rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self);
+									DBG_8192C("qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate);	
+									DBG_8192C("state=0x%x, aid=%d, macid=%d, raid=%d\n", psta->state, psta->aid, psta->mac_id, psta->raid);	
+									DBG_8192C("bwmode=%d, ch_offset=%d, sgi=%d\n", psta->htpriv.bwmode, psta->htpriv.ch_offset, psta->htpriv.sgi);						
+									DBG_8192C("ampdu_enable = %d\n", psta->htpriv.ampdu_enable);									
+									DBG_8192C("agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap);
+									DBG_8192C("capability=0x%x\n", psta->capability);
+									DBG_8192C("flags=0x%x\n", psta->flags);
+									DBG_8192C("wpa_psk=0x%x\n", psta->wpa_psk);
+									DBG_8192C("wpa2_group_cipher=0x%x\n", psta->wpa2_group_cipher);
+									DBG_8192C("wpa2_pairwise_cipher=0x%x\n", psta->wpa2_pairwise_cipher);
+									DBG_8192C("qos_info=0x%x\n", psta->qos_info);
+									DBG_8192C("dot118021XPrivacy=0x%x\n", psta->dot118021XPrivacy);
+									
+									
+						
+									for(j=0;j<16;j++)
+									{							
+										preorder_ctrl = &psta->recvreorder_ctrl[j];
+										if(preorder_ctrl->enable)
+										{
+											DBG_8192C("tid=%d, indicate_seq=%d\n", j, preorder_ctrl->indicate_seq);
+										}
+									}		
+									
+								}							
+			
+							}
+						}
+	
+						_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+
+					}
+					break;
+
+                                case 0x0c://dump rx packet
+					{
+						DBG_8192C("dump rx packet (%d)\n",extra_arg);						
+						//pHalData->bDumpRxPkt =extra_arg;						
+						padapter->HalFunc.SetHalDefVarHandler(padapter, HAL_DEF_DBG_DUMP_RXPKT, &(extra_arg));
+					}
+					break;
+#if 0				
+					case 0x0d://dump cam
+					{
+						//u8 entry = (u8) extra_arg;
+						u8 entry=0;
+						//dump cam
+						for(entry=0;entry<32;entry++)
+							read_cam(padapter,entry);
+					}				
+					break;
+#endif
+		#ifdef DBG_CONFIG_ERROR_DETECT
+				case 0x0f:
+						{
+							if(extra_arg == 0){	
+								DBG_8192C("###### silent reset test.......#####\n");
+								if(padapter->HalFunc.silentreset)
+									padapter->HalFunc.silentreset(padapter);						
+							}
+							
+						}
+				break;
+				case 0x12:
+					{
+						struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;	
+						DBG_8192C("==>silent resete cnts:%d\n",pwrpriv->ips_enter_cnts);
+					}
+					break;	
+					
+		#endif	
+
+				case 0x10:// driver version display
+					DBG_8192C("rtw driver version=%s\n", DRIVERVERSION);
+					break;
+				case 0x11:
+					{
+						DBG_8192C("turn %s Rx RSSI display function\n",(extra_arg==1)?"on":"off");
+						padapter->bRxRSSIDisplay = extra_arg ;						
+					}
+					break;
+#if 1
+				case 0xdd://registers dump , 0 for mac reg,1 for bb reg, 2 for rf reg
+					{						
+						if(extra_arg==0){
+							mac_reg_dump(padapter);
+						}
+						else if(extra_arg==1){
+							bb_reg_dump(padapter);
+						}
+						else if(extra_arg==2){
+							rf_reg_dump(padapter);
+						}
+																				
+					}
+					break;		
+#endif
+				case 0xee://turn on/off dynamic funcs
+					{
+						u8 dm_flag;
+
+						if(0xf==extra_arg){
+							padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_DBG_DM_FUNC,&dm_flag);							
+							DBG_8192C(" === DMFlag(0x%02x) === \n",dm_flag);
+							DBG_8192C("extra_arg = 0  - disable all dynamic func \n");
+							DBG_8192C("extra_arg = 1  - disable DIG- BIT(0)\n");
+							DBG_8192C("extra_arg = 2  - disable High power - BIT(1)\n");
+							DBG_8192C("extra_arg = 3  - disable tx power tracking - BIT(2)\n");
+							DBG_8192C("extra_arg = 4  - disable BT coexistence - BIT(3)\n");
+							DBG_8192C("extra_arg = 5  - disable antenna diversity - BIT(4)\n");
+							DBG_8192C("extra_arg = 6  - enable all dynamic func \n");							
+						}
+						else{
+							/*	extra_arg = 0  - disable all dynamic func
+								extra_arg = 1  - disable DIG
+								extra_arg = 2  - disable tx power tracking
+								extra_arg = 3  - turn on all dynamic func
+							*/			
+							padapter->HalFunc.SetHalDefVarHandler(padapter, HAL_DEF_DBG_DM_FUNC, &(extra_arg));
+							padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_DBG_DM_FUNC,&dm_flag);							
+							DBG_8192C(" === DMFlag(0x%02x) === \n",dm_flag);
+						}
+					}
+					break;
+
+				case 0xfd:
+					rtw_write8(padapter, 0xc50, arg);
+					DBG_8192C("wr(0xc50)=0x%x\n", rtw_read8(padapter, 0xc50));
+					rtw_write8(padapter, 0xc58, arg);
+					DBG_8192C("wr(0xc58)=0x%x\n", rtw_read8(padapter, 0xc58));
+					break;
+				case 0xfe:
+					DBG_8192C("rd(0xc50)=0x%x\n", rtw_read8(padapter, 0xc50));
+					DBG_8192C("rd(0xc58)=0x%x\n", rtw_read8(padapter, 0xc58));
+					break;
+				case 0xff:
+					{
+						DBG_8192C("dbg(0x210)=0x%x\n", rtw_read32(padapter, 0x210));
+						DBG_8192C("dbg(0x608)=0x%x\n", rtw_read32(padapter, 0x608));
+						DBG_8192C("dbg(0x280)=0x%x\n", rtw_read32(padapter, 0x280));
+						DBG_8192C("dbg(0x284)=0x%x\n", rtw_read32(padapter, 0x284));
+						DBG_8192C("dbg(0x288)=0x%x\n", rtw_read32(padapter, 0x288));
+	
+						DBG_8192C("dbg(0x664)=0x%x\n", rtw_read32(padapter, 0x664));
+
+
+						DBG_8192C("\n");
+		
+						DBG_8192C("dbg(0x430)=0x%x\n", rtw_read32(padapter, 0x430));
+						DBG_8192C("dbg(0x438)=0x%x\n", rtw_read32(padapter, 0x438));
+
+						DBG_8192C("dbg(0x440)=0x%x\n", rtw_read32(padapter, 0x440));
+	
+						DBG_8192C("dbg(0x458)=0x%x\n", rtw_read32(padapter, 0x458));
+	
+						DBG_8192C("dbg(0x484)=0x%x\n", rtw_read32(padapter, 0x484));
+						DBG_8192C("dbg(0x488)=0x%x\n", rtw_read32(padapter, 0x488));
+	
+						DBG_8192C("dbg(0x444)=0x%x\n", rtw_read32(padapter, 0x444));
+						DBG_8192C("dbg(0x448)=0x%x\n", rtw_read32(padapter, 0x448));
+						DBG_8192C("dbg(0x44c)=0x%x\n", rtw_read32(padapter, 0x44c));
+						DBG_8192C("dbg(0x450)=0x%x\n", rtw_read32(padapter, 0x450));
+					}
+					break;
+			}			
+			break;
+		default:
+			DBG_8192C("error dbg cmd!\n");
+			break;	
+	}
+	
+
+	return ret;
+
+}
+
+static int wpa_set_param(struct net_device *dev, u8 name, u32 value)
+{
+	uint ret=0;
+	u32 flags;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	
+	switch (name){
+	case IEEE_PARAM_WPA_ENABLED:
+
+		padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; //802.1x
+		
+		//ret = ieee80211_wpa_enable(ieee, value);
+		
+		switch((value)&0xff)
+		{
+			case 1 : //WPA
+			padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeWPAPSK; //WPA_PSK
+			padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled;
+				break;
+			case 2: //WPA2
+			padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeWPA2PSK; //WPA2_PSK
+			padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled;
+				break;
+		}
+		
+		RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("wpa_set_param:padapter->securitypriv.ndisauthtype=%d\n", padapter->securitypriv.ndisauthtype));
+		
+		break;
+
+	case IEEE_PARAM_TKIP_COUNTERMEASURES:
+		//ieee->tkip_countermeasures=value;
+		break;
+
+	case IEEE_PARAM_DROP_UNENCRYPTED: 
+	{
+		/* HACK:
+		 *
+		 * wpa_supplicant calls set_wpa_enabled when the driver
+		 * is loaded and unloaded, regardless of if WPA is being
+		 * used.  No other calls are made which can be used to
+		 * determine if encryption will be used or not prior to
+		 * association being expected.  If encryption is not being
+		 * used, drop_unencrypted is set to false, else true -- we
+		 * can use this to determine if the CAP_PRIVACY_ON bit should
+		 * be set.
+		 */
+		 
+#if 0	 
+		struct ieee80211_security sec = {
+			.flags = SEC_ENABLED,
+			.enabled = value,
+		};
+ 		ieee->drop_unencrypted = value;
+		/* We only change SEC_LEVEL for open mode. Others
+		 * are set by ipw_wpa_set_encryption.
+		 */
+		if (!value) {
+			sec.flags |= SEC_LEVEL;
+			sec.level = SEC_LEVEL_0;
+		}
+		else {
+			sec.flags |= SEC_LEVEL;
+			sec.level = SEC_LEVEL_1;
+		}
+		if (ieee->set_security)
+			ieee->set_security(ieee->dev, &sec);
+#endif		
+		break;
+
+	}
+	case IEEE_PARAM_PRIVACY_INVOKED:	
+		
+		//ieee->privacy_invoked=value;
+		
+		break;
+
+	case IEEE_PARAM_AUTH_ALGS:
+		
+		ret = wpa_set_auth_algs(dev, value);
+		
+		break;
+
+	case IEEE_PARAM_IEEE_802_1X:
+		
+		//ieee->ieee802_1x=value;		
+		
+		break;
+		
+	case IEEE_PARAM_WPAX_SELECT:
+		
+		// added for WPA2 mixed mode
+		//DBG_8192C(KERN_WARNING "------------------------>wpax value = %x\n", value);
+		/*
+		spin_lock_irqsave(&ieee->wpax_suitlist_lock,flags);
+		ieee->wpax_type_set = 1;
+		ieee->wpax_type_notify = value;
+		spin_unlock_irqrestore(&ieee->wpax_suitlist_lock,flags);
+		*/
+		
+		break;
+
+	default:		
+
+
+		
+		ret = -EOPNOTSUPP;
+
+		
+		break;
+	
+	}
+
+	return ret;
+	
+}
+
+static int wpa_mlme(struct net_device *dev, u32 command, u32 reason)
+{	
+	int ret = 0;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+
+	switch (command)
+	{
+		case IEEE_MLME_STA_DEAUTH:
+
+			if(!rtw_set_802_11_disassociate(padapter))
+				ret = -1;		
+			
+			break;
+
+		case IEEE_MLME_STA_DISASSOC:
+		
+			if(!rtw_set_802_11_disassociate(padapter))
+				ret = -1;		
+	
+			break;
+
+		default:
+			ret = -EOPNOTSUPP;
+			break;
+	}
+
+	return ret;
+	
+}
+
+static int wpa_supplicant_ioctl(struct net_device *dev, struct iw_point *p)
+{
+	struct ieee_param *param;
+	uint ret=0;
+
+	//down(&ieee->wx_sem);	
+
+	if (p->length < sizeof(struct ieee_param) || !p->pointer){
+		ret = -EINVAL;
+		goto out;
+	}
+	
+	param = (struct ieee_param *)rtw_malloc(p->length);
+	if (param == NULL)
+	{
+		ret = -ENOMEM;
+		goto out;
+	}
+	
+	if (copy_from_user(param, p->pointer, p->length))
+	{
+		rtw_mfree((u8*)param, p->length);
+		ret = -EFAULT;
+		goto out;
+	}
+
+	switch (param->cmd) {
+
+	case IEEE_CMD_SET_WPA_PARAM:
+		ret = wpa_set_param(dev, param->u.wpa_param.name, param->u.wpa_param.value);
+		break;
+
+	case IEEE_CMD_SET_WPA_IE:
+		//ret = wpa_set_wpa_ie(dev, param, p->length);
+		ret =  rtw_set_wpa_ie((_adapter *)rtw_netdev_priv(dev), (char*)param->u.wpa_ie.data, (u16)param->u.wpa_ie.len);
+		break;
+
+	case IEEE_CMD_SET_ENCRYPTION:
+		ret = wpa_set_encryption(dev, param, p->length);
+		break;
+
+	case IEEE_CMD_MLME:
+		ret = wpa_mlme(dev, param->u.mlme.command, param->u.mlme.reason_code);
+		break;
+
+	default:
+		DBG_8192C("Unknown WPA supplicant request: %d\n", param->cmd);
+		ret = -EOPNOTSUPP;
+		break;
+		
+	}
+
+	if (ret == 0 && copy_to_user(p->pointer, param, p->length))
+		ret = -EFAULT;
+
+	rtw_mfree((u8 *)param, p->length);
+	
+out:
+	
+	//up(&ieee->wx_sem);
+	
+	return ret;
+	
+}
+
+#ifdef CONFIG_AP_MODE
+static u8 set_pairwise_key(_adapter *padapter, struct sta_info *psta)
+{
+	struct cmd_obj*			ph2c;
+	struct set_stakey_parm	*psetstakey_para;
+	struct cmd_priv 			*pcmdpriv=&padapter->cmdpriv;	
+	u8	res=_SUCCESS;
+
+	ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));
+	if ( ph2c == NULL){
+		res= _FAIL;
+		goto exit;
+	}
+
+	psetstakey_para = (struct set_stakey_parm*)rtw_zmalloc(sizeof(struct set_stakey_parm));
+	if(psetstakey_para==NULL){
+		rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj));
+		res=_FAIL;
+		goto exit;
+	}
+
+	init_h2fwcmd_w_parm_no_rsp(ph2c, psetstakey_para, _SetStaKey_CMD_);
+
+
+	psetstakey_para->algorithm = (u8)psta->dot118021XPrivacy;
+
+	_rtw_memcpy(psetstakey_para->addr, psta->hwaddr, ETH_ALEN);	
+	
+	_rtw_memcpy(psetstakey_para->key, &psta->dot118021x_UncstKey, 16);
+
+	
+	res = rtw_enqueue_cmd(pcmdpriv, ph2c);	
+
+exit:
+
+	return res;
+	
+}
+
+static int set_group_key(_adapter *padapter, u8 *key, u8 alg, int keyid)
+{
+	u8 keylen;
+	struct cmd_obj* pcmd;
+	struct setkey_parm *psetkeyparm;
+	struct cmd_priv	*pcmdpriv=&(padapter->cmdpriv);	
+	int res=_SUCCESS;
+
+	DBG_8192C("%s\n", __FUNCTION__);
+	
+	pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct	cmd_obj));
+	if(pcmd==NULL){
+		res= _FAIL;
+		goto exit;
+	}
+	psetkeyparm=(struct setkey_parm*)rtw_zmalloc(sizeof(struct setkey_parm));
+	if(psetkeyparm==NULL){
+		rtw_mfree((unsigned char *)pcmd, sizeof(struct cmd_obj));
+		res= _FAIL;
+		goto exit;
+	}
+
+	_rtw_memset(psetkeyparm, 0, sizeof(struct setkey_parm));
+		
+	psetkeyparm->keyid=(u8)keyid;
+
+	psetkeyparm->algorithm = alg;
+
+	psetkeyparm->set_tx = 1;
+
+	switch(alg)
+	{
+		case _WEP40_:					
+			keylen = 5;
+			break;
+		case _WEP104_:
+			keylen = 13;			
+			break;
+		case _TKIP_:
+		case _TKIP_WTMIC_:		
+		case _AES_:
+			keylen = 16;		
+		default:
+			keylen = 16;		
+	}
+
+	_rtw_memcpy(&(psetkeyparm->key[0]), key, keylen);
+	
+	pcmd->cmdcode = _SetKey_CMD_;
+	pcmd->parmbuf = (u8 *)psetkeyparm;   
+	pcmd->cmdsz =  (sizeof(struct setkey_parm));  
+	pcmd->rsp = NULL;
+	pcmd->rspsz = 0;
+
+
+	_rtw_init_listhead(&pcmd->list);
+
+	res = rtw_enqueue_cmd(pcmdpriv, pcmd);
+
+exit:
+
+	return res;
+	
+
+}
+
+static int set_wep_key(_adapter *padapter, u8 *key, u8 keylen, int keyid)
+{	
+	u8 alg;
+
+	switch(keylen)
+	{
+		case 5:
+			alg =_WEP40_;			
+			break;
+		case 13:
+			alg =_WEP104_;			
+			break;
+		default:
+			alg =_NO_PRIVACY_;			
+	}
+
+	return set_group_key(padapter, key, alg, keyid);
+
+}
+
+
+static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len)
+{
+	int ret = 0;
+	u32 wep_key_idx, wep_key_len,wep_total_len;
+	NDIS_802_11_WEP	 *pwep = NULL;
+	struct sta_info *psta = NULL, *pbcmc_sta = NULL;	
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv 	*pmlmepriv = &padapter->mlmepriv;
+	struct security_priv* psecuritypriv=&(padapter->securitypriv);
+	struct sta_priv *pstapriv = &padapter->stapriv;
+
+	DBG_8192C("%s\n", __FUNCTION__);
+
+	param->u.crypt.err = 0;
+	param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0';
+
+	//sizeof(struct ieee_param) = 64 bytes;
+	//if (param_len !=  (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len)
+	if (param_len !=  sizeof(struct ieee_param) + param->u.crypt.key_len)
+	{
+		ret =  -EINVAL;
+		goto exit;
+	}
+
+	if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff &&
+	    param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff &&
+	    param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) 
+	{
+		if (param->u.crypt.idx >= WEP_KEYS)
+		{
+			ret = -EINVAL;
+			goto exit;
+		}	
+	}
+	else 
+	{		
+		psta = rtw_get_stainfo(pstapriv, param->sta_addr);
+		if(!psta)
+		{
+			//ret = -EINVAL;
+			DBG_8192C("rtw_set_encryption(), sta has already been removed or never been added\n");
+			goto exit;
+		}			
+	}
+
+	if (strcmp(param->u.crypt.alg, "none") == 0 && (psta==NULL))
+	{
+		//todo:clear default encryption keys
+
+		DBG_8192C("clear default encryption keys, keyid=%d\n", param->u.crypt.idx);
+		
+		goto exit;
+	}
+
+
+	if (strcmp(param->u.crypt.alg, "WEP") == 0 && (psta==NULL))
+	{		
+		DBG_8192C("r871x_set_encryption, crypt.alg = WEP\n");
+		
+		wep_key_idx = param->u.crypt.idx;
+		wep_key_len = param->u.crypt.key_len;
+					
+		DBG_8192C("r871x_set_encryption, wep_key_idx=%d, len=%d\n", wep_key_idx, wep_key_len);
+
+		if((wep_key_idx >= WEP_KEYS) || (wep_key_len<=0))
+		{
+			ret = -EINVAL;
+			goto exit;
+		}
+			
+
+		if (wep_key_len > 0) 
+		{			
+		 	wep_key_len = wep_key_len <= 5 ? 5 : 13;
+			wep_total_len = wep_key_len + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial);
+		 	pwep =(NDIS_802_11_WEP *)rtw_malloc(wep_total_len);
+			if(pwep == NULL){
+				DBG_8192C(" r871x_set_encryption: pwep allocate fail !!!\n");
+				goto exit;
+			}
+			
+		 	_rtw_memset(pwep, 0, wep_total_len);
+		
+		 	pwep->KeyLength = wep_key_len;
+			pwep->Length = wep_total_len;
+			
+		}
+		
+		pwep->KeyIndex = wep_key_idx;
+
+		_rtw_memcpy(pwep->KeyMaterial,  param->u.crypt.key, pwep->KeyLength);
+
+		if(param->u.crypt.set_tx)
+		{
+			DBG_8192C("wep, set_tx=1\n");
+
+			psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled;
+			psecuritypriv->dot11PrivacyAlgrthm=_WEP40_;
+			psecuritypriv->dot118021XGrpPrivacy=_WEP40_;
+			
+			if(pwep->KeyLength==13)
+			{
+				psecuritypriv->dot11PrivacyAlgrthm=_WEP104_;
+				psecuritypriv->dot118021XGrpPrivacy=_WEP104_;
+			}
+
+		
+			psecuritypriv->dot11PrivacyKeyIndex = wep_key_idx;
+			
+			_rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength);
+
+			psecuritypriv->dot11DefKeylen[wep_key_idx]=pwep->KeyLength;
+
+			set_wep_key(padapter, pwep->KeyMaterial, pwep->KeyLength, wep_key_idx);		
+
+			
+		}
+		else
+		{
+			DBG_8192C("wep, set_tx=0\n");
+			
+			//don't update "psecuritypriv->dot11PrivacyAlgrthm" and 
+			//"psecuritypriv->dot11PrivacyKeyIndex=keyid", but can rtw_set_key to cam
+					
+		      _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength);
+
+			psecuritypriv->dot11DefKeylen[wep_key_idx] = pwep->KeyLength;			
+
+			set_wep_key(padapter, pwep->KeyMaterial, pwep->KeyLength, wep_key_idx);
+			
+		}
+
+		goto exit;
+		
+	}
+
+	
+	if(!psta && check_fwstate(pmlmepriv, WIFI_AP_STATE)) // //group key
+	{
+		if(param->u.crypt.set_tx ==1)
+		{
+			if(strcmp(param->u.crypt.alg, "WEP") == 0)
+			{
+				DBG_8192C("%s, set group_key, WEP\n", __FUNCTION__);
+				
+				_rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey,  param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len));
+					
+				psecuritypriv->dot118021XGrpPrivacy = _WEP40_;
+				if(param->u.crypt.key_len==13)
+				{						
+						psecuritypriv->dot118021XGrpPrivacy = _WEP104_;
+				}
+				
+			}
+			else if(strcmp(param->u.crypt.alg, "TKIP") == 0)
+			{						
+				DBG_8192C("%s, set group_key, TKIP\n", __FUNCTION__);
+				
+				psecuritypriv->dot118021XGrpPrivacy = _TKIP_;
+
+				_rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey,  param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len));
+				
+				//DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len);
+				//set mic key
+				_rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8);
+				_rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8);
+
+				psecuritypriv->busetkipkey = _TRUE;
+											
+			}
+			else if(strcmp(param->u.crypt.alg, "CCMP") == 0)
+			{
+				DBG_8192C("%s, set group_key, CCMP\n", __FUNCTION__);
+			
+				psecuritypriv->dot118021XGrpPrivacy = _AES_;
+
+				_rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey,  param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len));
+			}
+			else
+			{
+				DBG_8192C("%s, set group_key, none\n", __FUNCTION__);
+				
+				psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_;
+			}
+
+			psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx;
+
+			psecuritypriv->binstallGrpkey = _TRUE;
+
+			psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;//!!!
+								
+			set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx);
+			
+			pbcmc_sta=rtw_get_bcmc_stainfo(padapter);
+			if(pbcmc_sta)
+			{
+				pbcmc_sta->ieee8021x_blocked = _FALSE;
+				pbcmc_sta->dot118021XPrivacy= psecuritypriv->dot118021XGrpPrivacy;//rx will use bmc_sta's dot118021XPrivacy			
+			}	
+						
+		}
+
+		goto exit;
+		
+	}	
+
+	if(psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X && psta) // psk/802_1x
+	{
+		if(check_fwstate(pmlmepriv, WIFI_AP_STATE))
+		{
+			if(param->u.crypt.set_tx ==1)
+			{ 
+				_rtw_memcpy(psta->dot118021x_UncstKey.skey,  param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len));
+				
+				if(strcmp(param->u.crypt.alg, "WEP") == 0)
+				{
+					DBG_8192C("%s, set pairwise key, WEP\n", __FUNCTION__);
+					
+					psta->dot118021XPrivacy = _WEP40_;
+					if(param->u.crypt.key_len==13)
+					{						
+						psta->dot118021XPrivacy = _WEP104_;
+					}
+				}
+				else if(strcmp(param->u.crypt.alg, "TKIP") == 0)
+				{						
+					DBG_8192C("%s, set pairwise key, TKIP\n", __FUNCTION__);
+					
+					psta->dot118021XPrivacy = _TKIP_;
+				
+					//DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len);
+					//set mic key
+					_rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8);
+					_rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8);
+
+					psecuritypriv->busetkipkey = _TRUE;
+											
+				}
+				else if(strcmp(param->u.crypt.alg, "CCMP") == 0)
+				{
+
+					DBG_8192C("%s, set pairwise key, CCMP\n", __FUNCTION__);
+					
+					psta->dot118021XPrivacy = _AES_;
+				}
+				else
+				{
+					DBG_8192C("%s, set pairwise key, none\n", __FUNCTION__);
+					
+					psta->dot118021XPrivacy = _NO_PRIVACY_;
+				}
+						
+				set_pairwise_key(padapter, psta);
+					
+				psta->ieee8021x_blocked = _FALSE;
+					
+			}			
+			else//group key???
+			{ 
+				if(strcmp(param->u.crypt.alg, "WEP") == 0)
+				{
+					_rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey,  param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len));
+					
+					psecuritypriv->dot118021XGrpPrivacy = _WEP40_;
+					if(param->u.crypt.key_len==13)
+					{						
+						psecuritypriv->dot118021XGrpPrivacy = _WEP104_;
+					}
+				}
+				else if(strcmp(param->u.crypt.alg, "TKIP") == 0)
+				{						
+					psecuritypriv->dot118021XGrpPrivacy = _TKIP_;
+
+					_rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey,  param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len));
+				
+					//DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len);
+					//set mic key
+					_rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8);
+					_rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8);
+
+					psecuritypriv->busetkipkey = _TRUE;
+											
+				}
+				else if(strcmp(param->u.crypt.alg, "CCMP") == 0)
+				{
+					psecuritypriv->dot118021XGrpPrivacy = _AES_;
+
+					_rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey,  param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len));
+				}
+				else
+				{
+					psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_;
+				}
+
+				psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx;
+
+				psecuritypriv->binstallGrpkey = _TRUE;	
+								
+				psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;//!!!
+								
+				set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx);
+			
+				pbcmc_sta=rtw_get_bcmc_stainfo(padapter);
+				if(pbcmc_sta)
+				{
+					pbcmc_sta->ieee8021x_blocked = _FALSE;
+					pbcmc_sta->dot118021XPrivacy= psecuritypriv->dot118021XGrpPrivacy;//rx will use bmc_sta's dot118021XPrivacy			
+				}					
+
+			}
+			
+		}
+				
+	}
+
+exit:
+
+	if(pwep)
+	{
+		rtw_mfree((u8 *)pwep, wep_total_len);		
+	}	
+	
+	return ret;
+	
+}
+
+static int rtw_set_beacon(struct net_device *dev, struct ieee_param *param, int len)
+{
+	int ret=0;	
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	struct sta_priv *pstapriv = &padapter->stapriv;
+	unsigned char *pbuf = param->u.bcn_ie.buf;
+
+
+	DBG_8192C("%s, len=%d\n", __FUNCTION__, len);
+
+	if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE)
+		return -EINVAL;
+
+	_rtw_memcpy(&pstapriv->max_num_sta, param->u.bcn_ie.reserved, 2);
+
+	if((pstapriv->max_num_sta>NUM_STA) || (pstapriv->max_num_sta<=0))
+		pstapriv->max_num_sta = NUM_STA;
+
+
+	if(rtw_check_beacon_data(padapter, pbuf,  (len-12-2)) == _SUCCESS)// 12 = param header, 2:no packed
+		ret = 0;
+	else
+		ret = -EINVAL;
+	
+	
+	return ret;
+	
+}
+
+static int rtw_hostapd_sta_flush(struct net_device *dev)
+{
+	//_irqL irqL;
+	//_list	*phead, *plist;
+	int ret=0;	
+	//struct sta_info *psta = NULL;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);	
+	//struct sta_priv *pstapriv = &padapter->stapriv;
+
+	DBG_8192C("%s\n", __FUNCTION__);
+
+	flush_all_cam_entry(padapter);	//clear CAM
+
+#if 0
+	phead = &pstapriv->asoc_list;
+	plist = get_next(phead);
+	
+	//free sta asoc_queue
+	while ((rtw_end_of_queue_search(phead, plist)) == _FALSE)	
+	{		
+		psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list);
+		
+		plist = get_next(plist);
+
+		rtw_list_delete(&psta->asoc_list);		
+
+		//tear down Rx AMPDU
+		send_delba(padapter, 0, psta->hwaddr);// recipient
+	
+		//tear down TX AMPDU
+		send_delba(padapter, 1, psta->hwaddr);// // originator
+		psta->htpriv.agg_enable_bitmap = 0x0;//reset
+		psta->htpriv.candidate_tid_bitmap = 0x0;//reset
+
+		issue_deauth(padapter, psta->hwaddr, WLAN_REASON_DEAUTH_LEAVING);
+
+		_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);					
+		rtw_free_stainfo(padapter, psta);
+		_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
+		
+	}
+#endif
+
+	ret = rtw_sta_flush(padapter);	
+
+	return ret;
+
+}
+
+static int rtw_add_sta(struct net_device *dev, struct ieee_param *param)
+{
+	_irqL irqL;
+	int ret=0;	
+	struct sta_info *psta = NULL;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	struct sta_priv *pstapriv = &padapter->stapriv;
+
+	DBG_8192C("rtw_add_sta(aid=%d)=" MAC_FMT "\n", param->u.add_sta.aid, MAC_ARG(param->sta_addr));
+	
+	if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != _TRUE)	
+	{
+		return -EINVAL;		
+	}
+
+	if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff &&
+	    param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff &&
+	    param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) 
+	{
+		return -EINVAL;	
+	}
+
+/*
+	psta = rtw_get_stainfo(pstapriv, param->sta_addr);
+	if(psta)
+	{
+		DBG_8192C("rtw_add_sta(), free has been added psta=%p\n", psta);
+		_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);		
+		rtw_free_stainfo(padapter,  psta);		
+		_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
+
+		psta = NULL;
+	}	
+*/
+	//psta = rtw_alloc_stainfo(pstapriv, param->sta_addr);
+	psta = rtw_get_stainfo(pstapriv, param->sta_addr);
+	if(psta)
+	{
+		int flags = param->u.add_sta.flags;			
+		
+		//DBG_8192C("rtw_add_sta(), init sta's variables, psta=%p\n", psta);
+		
+		psta->aid = param->u.add_sta.aid;//aid=1~2007
+
+		_rtw_memcpy(psta->bssrateset, param->u.add_sta.tx_supp_rates, 16);
+		
+		
+		//check wmm cap.
+		if(WLAN_STA_WME&flags)
+			psta->qos_option = 1;
+		else
+			psta->qos_option = 0;
+
+		if(pmlmepriv->qospriv.qos_option == 0)	
+			psta->qos_option = 0;
+
+		
+#ifdef CONFIG_80211N_HT		
+		//chec 802.11n ht cap.
+		if(WLAN_STA_HT&flags)
+		{
+			psta->htpriv.ht_option = _TRUE;
+			psta->qos_option = 1;
+			_rtw_memcpy((void*)&psta->htpriv.ht_cap, (void*)&param->u.add_sta.ht_cap, sizeof(struct ieee80211_ht_cap));
+		}
+		else		
+		{
+			psta->htpriv.ht_option = _FALSE;
+		}
+		
+		if(pmlmepriv->htpriv.ht_option == _FALSE)	
+			psta->htpriv.ht_option = _FALSE;
+#endif		
+
+
+		update_sta_info_apmode(padapter, psta);
+		
+		
+	}
+	else
+	{
+		ret = -ENOMEM;
+	}	
+	
+	return ret;
+	
+}
+
+static int rtw_del_sta(struct net_device *dev, struct ieee_param *param)
+{
+	_irqL irqL;
+	int ret=0;	
+	struct sta_info *psta = NULL;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	struct sta_priv *pstapriv = &padapter->stapriv;
+
+	DBG_8192C("rtw_del_sta=" MAC_FMT "\n", MAC_ARG(param->sta_addr));
+		
+	if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != _TRUE)		
+	{
+		return -EINVAL;		
+	}
+
+	if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff &&
+	    param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff &&
+	    param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) 
+	{
+		return -EINVAL;	
+	}
+
+	psta = rtw_get_stainfo(pstapriv, param->sta_addr);
+	if(psta)
+	{
+		//DBG_8192C("free psta=%p, aid=%d\n", psta, psta->aid);
+		
+#if 0		
+		//tear down Rx AMPDU
+		send_delba(padapter, 0, psta->hwaddr);// recipient
+	
+		//tear down TX AMPDU
+		send_delba(padapter, 1, psta->hwaddr);// // originator
+		psta->htpriv.agg_enable_bitmap = 0x0;//reset
+		psta->htpriv.candidate_tid_bitmap = 0x0;//reset
+		
+		issue_deauth(padapter, psta->hwaddr, WLAN_REASON_DEAUTH_LEAVING);
+		
+		_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);		
+		rtw_free_stainfo(padapter,  psta);		
+		_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
+
+		pstapriv->sta_dz_bitmap &=~BIT(psta->aid);
+		pstapriv->tim_bitmap &=~BIT(psta->aid);		
+#endif
+
+		ap_free_sta(padapter, psta);
+
+		psta = NULL;
+		
+	}
+	else
+	{
+		DBG_8192C("rtw_del_sta(), sta has already been removed or never been added\n");
+		
+		//ret = -1;
+	}
+	
+	
+	return ret;
+	
+}
+
+static int rtw_get_sta_wpaie(struct net_device *dev, struct ieee_param *param)
+{
+	int ret=0;	
+	struct sta_info *psta = NULL;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	struct sta_priv *pstapriv = &padapter->stapriv;
+
+	DBG_8192C("rtw_get_sta_wpaie, sta_addr: " MAC_FMT "\n", MAC_ARG(param->sta_addr));
+
+	if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != _TRUE)		
+	{
+		return -EINVAL;		
+	}
+
+	if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff &&
+	    param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff &&
+	    param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) 
+	{
+		return -EINVAL;	
+	}
+
+	psta = rtw_get_stainfo(pstapriv, param->sta_addr);
+	if(psta)
+	{
+		if((psta->wpa_ie[0] == WLAN_EID_RSN) || (psta->wpa_ie[0] == WLAN_EID_GENERIC))
+		{
+			int wpa_ie_len;
+			int copy_len;
+
+			wpa_ie_len = psta->wpa_ie[1];
+			
+			copy_len = ((wpa_ie_len+2) > sizeof(psta->wpa_ie)) ? (sizeof(psta->wpa_ie)):(wpa_ie_len+2);
+				
+			param->u.wpa_ie.len = copy_len;
+
+			_rtw_memcpy(param->u.wpa_ie.reserved, psta->wpa_ie, copy_len);
+		}
+		else
+		{
+			//ret = -1;
+			DBG_8192C("sta's wpa_ie is NONE\n");
+		}		
+	}
+	else
+	{
+		ret = -1;
+	}
+
+	return ret;
+
+}
+
+static int rtw_set_wps_beacon(struct net_device *dev, struct ieee_param *param, int len)
+{
+	int ret=0;
+	unsigned char wps_oui[4]={0x0,0x50,0xf2,0x04};
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);	
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	int ie_len;
+
+	DBG_8192C("%s, len=%d\n", __FUNCTION__, len);
+
+	if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE)
+		return -EINVAL;
+
+	ie_len = len-12-2;// 12 = param header, 2:no packed
+
+
+	if(pmlmepriv->wps_beacon_ie)
+	{
+		rtw_mfree(pmlmepriv->wps_beacon_ie, pmlmepriv->wps_beacon_ie_len);
+		pmlmepriv->wps_beacon_ie = NULL;			
+	}	
+
+	if(ie_len>0)
+	{
+		pmlmepriv->wps_beacon_ie = rtw_malloc(ie_len);
+		pmlmepriv->wps_beacon_ie_len = ie_len;
+		if ( pmlmepriv->wps_beacon_ie == NULL) {
+			DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__);
+			return -EINVAL;
+		}
+
+		_rtw_memcpy(pmlmepriv->wps_beacon_ie, param->u.bcn_ie.buf, ie_len);
+
+		update_beacon(padapter, _VENDOR_SPECIFIC_IE_, wps_oui, _TRUE);
+		
+		pmlmeext->bstart_bss = _TRUE;
+		
+	}
+	
+	
+	return ret;		
+
+}
+
+static int rtw_set_wps_probe_resp(struct net_device *dev, struct ieee_param *param, int len)
+{
+	int ret=0;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);	
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	int ie_len;
+
+	DBG_8192C("%s, len=%d\n", __FUNCTION__, len);
+
+	if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE)
+		return -EINVAL;
+
+	ie_len = len-12-2;// 12 = param header, 2:no packed
+
+
+	if(pmlmepriv->wps_probe_resp_ie)
+	{
+		rtw_mfree(pmlmepriv->wps_probe_resp_ie, pmlmepriv->wps_probe_resp_ie_len);
+		pmlmepriv->wps_probe_resp_ie = NULL;			
+	}	
+
+	if(ie_len>0)
+	{
+		pmlmepriv->wps_probe_resp_ie = rtw_malloc(ie_len);
+		pmlmepriv->wps_probe_resp_ie_len = ie_len;
+		if ( pmlmepriv->wps_probe_resp_ie == NULL) {
+			DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__);
+			return -EINVAL;
+		}
+		_rtw_memcpy(pmlmepriv->wps_probe_resp_ie, param->u.bcn_ie.buf, ie_len);		
+	}
+	
+	
+	return ret;
+
+}
+
+static int rtw_set_wps_assoc_resp(struct net_device *dev, struct ieee_param *param, int len)
+{
+	int ret=0;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);	
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	int ie_len;
+
+	DBG_8192C("%s, len=%d\n", __FUNCTION__, len);
+
+	if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE)
+		return -EINVAL;
+
+	ie_len = len-12-2;// 12 = param header, 2:no packed
+
+
+	if(pmlmepriv->wps_assoc_resp_ie)
+	{
+		rtw_mfree(pmlmepriv->wps_assoc_resp_ie, pmlmepriv->wps_assoc_resp_ie_len);
+		pmlmepriv->wps_assoc_resp_ie = NULL;			
+	}	
+
+	if(ie_len>0)
+	{
+		pmlmepriv->wps_assoc_resp_ie = rtw_malloc(ie_len);
+		pmlmepriv->wps_assoc_resp_ie_len = ie_len;
+		if ( pmlmepriv->wps_assoc_resp_ie == NULL) {
+			DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__);
+			return -EINVAL;
+		}
+		
+		_rtw_memcpy(pmlmepriv->wps_assoc_resp_ie, param->u.bcn_ie.buf, ie_len);		
+	}
+	
+	
+	return ret;
+
+}
+
+static int rtw_hostapd_ioctl(struct net_device *dev, struct iw_point *p)
+{
+	struct ieee_param *param;
+	int ret=0;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+
+	//DBG_8192C("%s\n", __FUNCTION__);
+
+	/*
+	* this function is expect to call in master mode, which allows no power saving
+	* so, we just check hw_init_completed instead of call rfpwrstate_check()
+	*/
+
+	if (padapter->hw_init_completed==_FALSE){
+		ret = -EPERM;
+		goto out;
+	}
+
+
+	//if (p->length < sizeof(struct ieee_param) || !p->pointer){
+	if(!p->pointer){
+		ret = -EINVAL;
+		goto out;
+	}
+	
+	param = (struct ieee_param *)rtw_malloc(p->length);
+	if (param == NULL)
+	{
+		ret = -ENOMEM;
+		goto out;
+	}
+	
+	if (copy_from_user(param, p->pointer, p->length))
+	{
+		rtw_mfree((u8*)param, p->length);
+		ret = -EFAULT;
+		goto out;
+	}
+
+	//DBG_8192C("%s, cmd=%d\n", __FUNCTION__, param->cmd);
+
+	switch (param->cmd) 
+	{	
+		case RTL871X_HOSTAPD_FLUSH:
+
+			ret = rtw_hostapd_sta_flush(dev);
+
+			break;
+	
+		case RTL871X_HOSTAPD_ADD_STA:	
+			
+			ret = rtw_add_sta(dev, param);					
+			
+			break;
+
+		case RTL871X_HOSTAPD_REMOVE_STA:
+
+			ret = rtw_del_sta(dev, param);
+
+			break;
+	
+		case RTL871X_HOSTAPD_SET_BEACON:
+
+			ret = rtw_set_beacon(dev, param, p->length);
+
+			break;
+			
+		case RTL871X_SET_ENCRYPTION:
+
+			ret = rtw_set_encryption(dev, param, p->length);
+			
+			break;
+			
+		case RTL871X_HOSTAPD_GET_WPAIE_STA:
+
+			ret = rtw_get_sta_wpaie(dev, param);
+	
+			break;
+			
+		case RTL871X_HOSTAPD_SET_WPS_BEACON:
+
+			ret = rtw_set_wps_beacon(dev, param, p->length);
+
+			break;
+
+		case RTL871X_HOSTAPD_SET_WPS_PROBE_RESP:
+
+			ret = rtw_set_wps_probe_resp(dev, param, p->length);
+			
+	 		break;
+			
+		case RTL871X_HOSTAPD_SET_WPS_ASSOC_RESP:
+
+			ret = rtw_set_wps_assoc_resp(dev, param, p->length);
+			
+	 		break;
+			
+		default:
+			DBG_8192C("Unknown hostapd request: %d\n", param->cmd);
+			ret = -EOPNOTSUPP;
+			break;
+		
+	}
+
+	if (ret == 0 && copy_to_user(p->pointer, param, p->length))
+		ret = -EFAULT;
+
+
+	rtw_mfree((u8 *)param, p->length);
+	
+out:
+		
+	return ret;
+	
+}
+#endif
+
+enum ANDROID_WIFI_CMD {
+	ANDROID_WIFI_CMD_START = 0,	//Turn on Wi-Fi hardware	//OK if successful
+	ANDROID_WIFI_CMD_STOP,		//Turn off Wi-Fi hardwoare	//OK if successful
+	ANDROID_WIFI_CMD_RSSI,		//Return received signal strength indicator in dbm for current AP	//<ssid> rssi xx 
+	ANDROID_WIFI_CMD_LINKSPEED,	//Return link speed in MBPS	//LinkSpeed xx 
+	ANDROID_WIFI_CMD_MACADDR,	//Return mac address of the station	//Macaddr = xx:xx:xx:xx:xx:xx 
+	ANDROID_WIFI_CMD_SCAN_ACTIVE,	//Set scan type to active	//OK if successful
+	ANDROID_WIFI_CMD_SCAN_PASSIVE,	//Set scan type to passive	//OK if successfu
+	ANDROID_WIFI_CMD_COUNTRY,
+	ANDROID_WIFI_CMD_MAX
+};
+
+const char *android_wifi_cmd_str[ANDROID_WIFI_CMD_MAX] = {
+	"START",
+	"STOP",
+	"RSSI",
+	"LINKSPEED",
+	"MACADDR",
+	"SCAN-ACTIVE",
+	"SCAN-PASSIVE",
+	"COUNTRY"
+};
+
+static int rtw_wx_set_priv(struct net_device *dev,
+				struct iw_request_info *info,
+				union iwreq_data *awrq,
+				char *extra)
+{
+
+#ifdef CONFIG_DEBUG_RTW_WX_SET_PRIV
+	char *ext_dbg;
+#endif
+
+	int ret = 0;
+	int len = 0;
+	char *ext;
+	int i;
+
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct iw_point *dwrq = (struct iw_point*)awrq;
+
+	//RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_notice_, ("+rtw_wx_set_priv\n"));
+
+	len = dwrq->length;
+	if (!(ext = rtw_vmalloc(len)))
+		return -ENOMEM;
+
+	if (copy_from_user(ext, dwrq->pointer, len)) {
+		rtw_vmfree(ext, len);
+		return -EFAULT;
+	}
+
+
+	//RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_notice_,
+	//	 ("rtw_wx_set_priv: %s req=%s\n",
+	//	  dev->name, ext));
+
+	#ifdef CONFIG_DEBUG_RTW_WX_SET_PRIV	
+	if (!(ext_dbg = rtw_vmalloc(len)))
+	{
+		rtw_vmfree(ext, len);
+		return -ENOMEM;
+	}	
+	
+	_rtw_memcpy(ext_dbg, ext, len);
+	#endif
+
+	//added for wps2.0 @20110524
+	if(dwrq->flags == 0x8766 && len > 8)
+	{
+		u32 cp_sz;		
+		struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+		u8 *probereq_wpsie = ext;
+		int probereq_wpsie_len = len;
+		u8 wps_oui[4]={0x0,0x50,0xf2,0x04};		
+	
+		if((_VENDOR_SPECIFIC_IE_ == probereq_wpsie[0]) &&
+			(_rtw_memcmp(&probereq_wpsie[2], wps_oui, 4) ==_TRUE))
+		{
+
+			cp_sz = probereq_wpsie_len>MAX_WPS_IE_LEN ? MAX_WPS_IE_LEN:probereq_wpsie_len;
+
+			_rtw_memcpy(pmlmepriv->probereq_wpsie, probereq_wpsie, cp_sz);
+			pmlmepriv->probereq_wpsie_len = cp_sz;
+			
+		}	
+		
+		goto FREE_EXT;
+		
+	}
+
+	if(	len >= WEXT_CSCAN_HEADER_SIZE
+		&& _rtw_memcmp(ext, WEXT_CSCAN_HEADER, WEXT_CSCAN_HEADER_SIZE) == _TRUE
+	){
+		ret = rtw_wx_set_scan(dev, info, awrq, ext);
+		goto FREE_EXT;
+	}
+	
+#ifdef CONFIG_ANDROID
+	//DBG_871X("rtw_wx_set_priv: %s req=%s\n", dev->name, ext);
+
+	for(i=0; i<len; i++) {
+		if(*(ext+i)>='a' && *(ext+i)<='z' ) {
+			*(ext+i)+= 'A'-'a';
+		}
+	}
+
+	for(i=0 ; i<ANDROID_WIFI_CMD_MAX; i++)
+		if(0 == strncmp(ext , android_wifi_cmd_str[i], strlen(android_wifi_cmd_str[i])) )
+			break;
+
+	switch(i) {
+		case ANDROID_WIFI_CMD_START :
+			indicate_wx_custom_event(padapter, "START");
+			break;
+		case ANDROID_WIFI_CMD_STOP :
+			indicate_wx_custom_event(padapter, "STOP");
+			break;
+		case ANDROID_WIFI_CMD_RSSI :
+			{
+				struct	mlme_priv	*pmlmepriv = &(padapter->mlmepriv);	
+				struct	wlan_network	*pcur_network = &pmlmepriv->cur_network;
+
+				if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) {
+					sprintf(ext, "%s rssi %d", pcur_network->network.Ssid.Ssid, padapter->recvpriv.rssi);
+				} else {
+					sprintf(ext, "OK");
+				}
+			}
+			break;
+		case ANDROID_WIFI_CMD_LINKSPEED :
+			{
+				union iwreq_data wrqd;
+				int ret_inner;
+				int mbps;
+		
+				if( 0!=(ret_inner=rtw_wx_get_rate(dev, info, &wrqd, extra)) ){
+					mbps=0;
+				} else {
+					mbps=wrqd.bitrate.value / 1000000;
+				}
+
+				sprintf(ext, "LINKSPEED %d", mbps);
+			}
+			break;
+		case ANDROID_WIFI_CMD_MACADDR :
+			sprintf(ext, "MACADDR = " MAC_FMT, MAC_ARG(dev->dev_addr));
+			break;
+		case ANDROID_WIFI_CMD_SCAN_ACTIVE :
+			{
+				struct	mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+				pmlmepriv->scan_mode=SCAN_ACTIVE;
+				sprintf(ext, "OK");
+			}
+			break;
+		case ANDROID_WIFI_CMD_SCAN_PASSIVE :
+			{
+				struct	mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+				pmlmepriv->scan_mode=SCAN_PASSIVE;
+				sprintf(ext, "OK");
+			}
+			break;
+
+		case ANDROID_WIFI_CMD_COUNTRY :
+			{
+				char country_code[10];
+				int channel_plan = RT_CHANNEL_DOMAIN_FCC;
+				union iwreq_data wrqd;
+				int ret_inner;
+					
+				sscanf(ext,"%*s %s",country_code);
+		
+				if(0 == strcmp(country_code, "US"))
+					channel_plan = RT_CHANNEL_DOMAIN_FCC;
+				else if(0 == strcmp(country_code, "EU"))
+					channel_plan = RT_CHANNEL_DOMAIN_ETSI;
+				else if(0 == strcmp(country_code, "JP"))
+					channel_plan = RT_CHANNEL_DOMAIN_MKK;
+				else if(0 == strcmp(country_code, "CN"))
+					channel_plan = RT_CHANNEL_DOMAIN_CHINA;
+				else
+					DBG_871X("%s unknown country_code:%s, set to RT_CHANNEL_DOMAIN_FCC\n", __FUNCTION__, country_code);
+				
+				_rtw_memcpy(&wrqd, &channel_plan, sizeof(int));
+				
+				if( 0!=(ret_inner=rtw_wx_set_channel_plan(dev, info, &wrqd, extra)) ){
+					DBG_871X("%s rtw_wx_set_channel_plan error\n", __FUNCTION__);
+				}
+				
+				sprintf(ext, "OK");
+			}
+			break;
+			
+		default :
+			#ifdef  CONFIG_DEBUG_RTW_WX_SET_PRIV
+			DBG_871X("%s: %s unknowned req=%s\n", __FUNCTION__,
+				dev->name, ext_dbg);
+			#endif
+
+			sprintf(ext, "OK");
+		
+	}
+
+	if (copy_to_user(dwrq->pointer, ext, min(dwrq->length, (u16)(strlen(ext)+1)) ) )
+		ret = -EFAULT;
+
+	#ifdef CONFIG_DEBUG_RTW_WX_SET_PRIV
+	DBG_871X("%s: %s req=%s rep=%s dwrq->length=%d, strlen(ext)+1=%d\n", __FUNCTION__,
+		dev->name, ext_dbg ,ext, dwrq->length, (u16)(strlen(ext)+1));
+	#endif
+#endif //end of CONFIG_ANDROID
+
+
+FREE_EXT:
+
+	rtw_vmfree(ext, len);
+	#ifdef CONFIG_DEBUG_RTW_WX_SET_PRIV
+	rtw_vmfree(ext_dbg, len);
+	#endif
+
+	//DBG_871X("rtw_wx_set_priv: (SIOCSIWPRIV) %s ret=%d\n", 
+	//		dev->name, ret);
+
+	return ret;
+	
+}
+
+static int rtw_mp_efuse_get(struct net_device *dev,
+			struct iw_request_info *info,
+			union iwreq_data *wdata, char *extra)
+{
+	struct iw_point *wrqu = (struct iw_point *)wdata;
+	PADAPTER padapter = rtw_netdev_priv(dev);
+	struct mp_priv *pmp_priv;	
+	
+	int i,j =0;
+	u8 data[EFUSE_MAP_SIZE];
+	u8 rawdata[EFUSE_MAX_SIZE];
+	u16 mapLen=0;
+	char *pch, *ptmp, *token, *tmp[3]={0x00,0x00,0x00};
+	u16 addr = 0, cnts = 0, max_available_size = 0,raw_cursize = 0 ,raw_maxsize = 0;
+	
+	_rtw_memset(data, '\0', sizeof(data));
+	_rtw_memset(rawdata, '\0', sizeof(rawdata));
+	
+	if (copy_from_user(extra, wrqu->pointer, wrqu->length))
+		return -EFAULT;
+
+	pch = extra;
+	DBG_8192C("%s: in=%s\n", __func__, extra);
+	
+	i=0;
+	//mac 16 "00e04c871200" rmap,00,2
+	while ( (token = strsep (&pch,",") )!=NULL )
+	{
+			if(i>2) break;
+			tmp[i] = token; 	  
+			i++;
+	}
+	
+	if ( strcmp(tmp[0],"realmap") == 0 ) {
+		
+		DBG_8192C("strcmp OK =	%s \n" ,tmp[0]);
+
+		mapLen = EFUSE_MAP_SIZE;
+		 
+		if (rtw_efuse_map_read(padapter, 0, mapLen, data) == _SUCCESS){
+			DBG_8192C("\t  rtw_efuse_map_read \n"); 
+		}else {
+			DBG_8192C("\t  rtw_efuse_map_read : Fail \n");
+			return -EFAULT;
+		} 
+		_rtw_memset(extra, '\0', sizeof(extra));
+		DBG_8192C("\tOFFSET\tVALUE(hex)\n");
+		sprintf(extra, "%s \n", extra);
+		for ( i = 0; i < EFUSE_MAP_SIZE; i += 16 )
+		{
+			DBG_8192C("\t0x%02x\t", i);
+			sprintf(extra, "%s \t0x%02x\t", extra,i);
+			for (j = 0; j < 8; j++)
+			{	  
+				DBG_8192C("%02X ", data[i+j]);
+				sprintf(extra, "%s %02X", extra, data[i+j]);
+			}
+			DBG_8192C("\t");
+			sprintf(extra,"%s\t",extra);
+			for (; j < 16; j++){
+				DBG_8192C("%02X ", data[i+j]);
+				sprintf(extra, "%s %02X", extra, data[i+j]);
+			}
+			DBG_8192C("\n");
+			sprintf(extra,"%s\n",extra);	
+		}
+		DBG_8192C("\n");
+		wrqu->length = strlen(extra);
+	
+		return 0;
+	}
+	else if ( strcmp(tmp[0],"rmap") == 0 ) {
+		if ( tmp[1]==NULL || tmp[2]==NULL ) return	-EINVAL;
+		// rmap addr cnts
+		addr = simple_strtoul(tmp[1], &ptmp, 16);
+
+		DBG_8192C("addr = %x \n" ,addr);
+
+		cnts=simple_strtoul(tmp[2], &ptmp,10);
+		if(cnts==0) return -EINVAL;
+
+		DBG_8192C("cnts = %d \n" ,cnts);
+		//_rtw_memset(extra, '\0', wrqu->data.length);
+
+		EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE);
+		if ((addr + cnts) > max_available_size) {
+			DBG_8192C("(addr + cnts parameter error \n");
+			return -EFAULT;
+		}
+				
+		if (rtw_efuse_map_read(padapter, addr, cnts, data) == _FAIL) 
+		{
+			DBG_8192C("rtw_efuse_access error \n"); 		
+		}
+		else{
+			DBG_8192C("rtw_efuse_access ok \n");
+		}	
+
+		_rtw_memset(extra, '\0', sizeof(extra));	 
+		for ( i = 0; i < cnts; i ++) {
+			DBG_8192C("0x%02x", data[i]);
+			sprintf(extra, "%s 0x%02X", extra, data[i]);
+			DBG_8192C(" ");
+			sprintf(extra,"%s ",extra);
+		}
+
+		wrqu->length = strlen(extra)+1;
+
+		DBG_8192C("extra = %s ", extra);
+
+		return 0;	
+	}
+	else if ( strcmp(tmp[0],"realraw") == 0 ) {
+		addr=0;
+		mapLen = EFUSE_MAX_SIZE;
+
+		if (rtw_efuse_access(padapter, _FALSE, addr, mapLen, rawdata) == _FAIL)
+		{
+			DBG_8192C("\t  rtw_efuse_map_read : Fail \n");
+			return -EFAULT;
+		} else
+		{
+			DBG_8192C("\t  rtw_efuse_access raw ok \n");	
+		}
+				
+		_rtw_memset(extra, '\0', sizeof(extra));
+		for ( i=0; i<mapLen; i++ ) {
+			DBG_8192C(" %02x", rawdata[i]);
+			sprintf(extra, "%s %02x", extra, rawdata[i] );
+
+			if ((i & 0xF) == 0xF){ 
+				DBG_8192C("\n\t");
+				sprintf(extra, "%s\n\t", extra);
+			}
+			else if ((i & 0x7) == 0x7){ 
+				DBG_8192C("\t");
+				sprintf(extra, "%s\t", extra);
+			}
+		}
+		wrqu->length = strlen(extra);
+		return 0;
+	}
+	else if ( strcmp(tmp[0],"mac") == 0 ) {
+		if ( tmp[1]==NULL || tmp[2]==NULL ) return	-EINVAL;
+		#ifdef CONFIG_RTL8192C
+		addr = 0x16;
+		cnts = 6;
+		#endif
+		#ifdef CONFIG_RTL8192D
+		addr = 0x19;
+		cnts = 6;
+		#endif
+		EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE);
+		if ((addr + mapLen) > max_available_size) {
+			DBG_8192C("(addr + cnts parameter error \n");
+			return -EFAULT;
+		}
+		if (rtw_efuse_map_read(padapter, addr, cnts, data) == _FAIL)
+		{
+			DBG_8192C("rtw_efuse_access error \n"); 		
+		}
+		else{
+			DBG_8192C("rtw_efuse_access ok \n");
+		}	
+		_rtw_memset(extra, '\0', sizeof(extra));		 
+		for ( i = 0; i < cnts; i ++) {
+			DBG_8192C("0x%02x", data[i]);
+			sprintf(extra, "%s 0x%02X", extra, data[i+j]);
+			DBG_8192C(" ");
+			sprintf(extra,"%s ",extra);
+		}
+		wrqu->length = strlen(extra);
+		return 0;
+	}
+	else if ( strcmp(tmp[0],"vidpid") == 0 ) {
+		if ( tmp[1]==NULL || tmp[2]==NULL ) return	-EINVAL;
+		#ifdef CONFIG_RTL8192C
+		addr=0x0a;
+		#endif
+		#ifdef CONFIG_RTL8192D
+		addr = 0x0c;
+		#endif
+		cnts = 4;
+		EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE);
+		if ((addr + mapLen) > max_available_size) {
+			DBG_8192C("(addr + cnts parameter error \n");
+			return -EFAULT;
+		}
+		if (rtw_efuse_map_read(padapter, addr, cnts, data) == _FAIL) 
+		{
+			DBG_8192C("rtw_efuse_access error \n"); 		
+		}
+		else{
+			DBG_8192C("rtw_efuse_access ok \n");
+		}	
+		_rtw_memset(extra, '\0', sizeof(extra));		 
+		for ( i = 0; i < cnts; i ++) {
+			DBG_8192C("0x%02x", data[i]);
+			sprintf(extra, "%s 0x%02X", extra, data[i+j]);
+			DBG_8192C(" ");
+			sprintf(extra,"%s ",extra);
+		}
+		wrqu->length = strlen(extra);
+		return 0;
+	}
+	else if ( strcmp(tmp[0],"ableraw") == 0 ) {
+		efuse_GetCurrentSize(padapter,&raw_cursize);
+		raw_maxsize = efuse_GetMaxSize(padapter);
+		sprintf(extra, "%s : [ available raw size] = %d",extra,raw_maxsize-raw_cursize);
+		wrqu->length = strlen(extra);
+
+		return 0;
+	}else
+	{
+		 sprintf(extra, "%s : Command not found\n",extra);
+		  wrqu->length = strlen(extra);
+		  return 0;
+	}
+	
+	return 0;
+}
+
+static int rtw_mp_efuse_set(struct net_device *dev,
+			struct iw_request_info *info,
+				union iwreq_data *wdata, char *extra)
+{
+	struct iw_point *wrqu = (struct iw_point *)wdata;
+	PADAPTER padapter = rtw_netdev_priv(dev);
+	
+	u8 buffer[40];
+	u32 i,jj,kk;
+	u8 setdata[EFUSE_MAP_SIZE];
+	u8 setrawdata[EFUSE_MAX_SIZE];
+	char *pch, *ptmp, *token, *edata,*tmp[3]={0x00,0x00,0x00};
+
+	u16 addr = 0, max_available_size = 0;
+	u32  cnts = 0;
+	
+	pch = extra;
+	DBG_8192C("%s: in=%s\n", __func__, extra);
+	
+	i=0;
+	while ( (token = strsep (&pch,",") )!=NULL )
+	{
+		if(i>2) break;
+		tmp[i] = token;
+		i++;
+	}
+
+	// tmp[0],[1],[2]
+	// wmap,addr,00e04c871200
+	if ( strcmp(tmp[0],"wmap") == 0 ) {
+		 if ( tmp[1]==NULL || tmp[2]==NULL ) return 	-EINVAL;
+			if ( ! strlen( tmp[2] )/2 > 1 ) return -EFAULT; 			
+				  
+			addr = simple_strtoul( tmp[1], &ptmp, 16 );
+			addr = addr & 0xFF;
+			DBG_8192C("addr = %x \n" ,addr);
+					
+			cnts = strlen( tmp[2] )/2;	
+			if ( cnts == 0) return -EFAULT;
+					
+			DBG_8192C("cnts = %d \n" ,cnts);
+			DBG_8192C("target data = %s \n" ,tmp[2]);
+					
+			for( jj = 0, kk = 0; jj < cnts; jj++, kk += 2 )
+			{
+				setdata[jj] = key_2char2num( tmp[2][kk], tmp[2][kk+ 1] );
+			}
+	
+			EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE);
+			
+			if ((addr + cnts) > max_available_size) {
+						DBG_8192C("parameter error \n");
+						return -EFAULT;
+			}	
+			if (rtw_efuse_map_write(padapter, addr, cnts, setdata) == _FAIL) {			
+					DBG_8192C("rtw_efuse_map_write error \n");
+					return -EFAULT;
+			} else
+			   DBG_8192C("rtw_efuse_map_write ok \n");
+		
+		return 0;
+	}
+	else if ( strcmp(tmp[0],"wraw") == 0 ) {
+			 if ( tmp[1]==NULL || tmp[2]==NULL ) return 	-EINVAL;
+			 if ( ! strlen( tmp[2] )/2 > 1 ) return -EFAULT;			 
+			addr = simple_strtoul( tmp[1], &ptmp, 16 );
+			addr = addr & 0xFF;
+			DBG_8192C("addr = %x \n" ,addr);
+				
+			cnts=strlen( tmp[2] )/2;
+			if ( cnts == 0) return -EFAULT;
+
+			DBG_8192C(" cnts = %d \n" ,cnts );		
+			DBG_8192C("target data = %s \n" ,tmp[2] );
+			
+			for( jj = 0, kk = 0; jj < cnts; jj++, kk += 2 )
+			{
+					setrawdata[jj] = key_2char2num( tmp[2][kk], tmp[2][kk+ 1] );
+			}
+					
+			if ( rtw_efuse_access( padapter, _TRUE, addr, cnts, setrawdata ) == _FAIL ){
+					DBG_8192C("\t  rtw_efuse_map_read : Fail \n");
+						return -EFAULT;
+			} else
+			  DBG_8192C("\t  rtw_efuse_access raw ok \n");	
+			
+					return 0;
+		}
+	else if ( strcmp(tmp[0],"mac") == 0 ) { 
+			 if ( tmp[1]==NULL || tmp[2]==NULL ) return 	-EINVAL;
+			//mac,00e04c871200
+			#ifdef CONFIG_RTL8192C
+				addr = 0x16;
+			#endif
+			#ifdef CONFIG_RTL8192D
+				addr = 0x19;
+			#endif
+				cnts = strlen( tmp[1] )/2;
+				if ( cnts == 0) return -EFAULT;
+				if ( cnts > 6 ){
+						DBG_8192C("error data for mac addr = %s \n" ,tmp[1]);
+						return -EFAULT;
+				}
+				
+				DBG_8192C("target data = %s \n" ,tmp[1]);
+				
+				for( jj = 0, kk = 0; jj < cnts; jj++, kk += 2 )
+				{
+					setdata[jj] = key_2char2num(tmp[1][kk], tmp[1][kk+ 1]);
+				}
+				
+				EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE);
+		
+				if ((addr + cnts) > max_available_size) {
+						DBG_8192C("parameter error \n");
+						return -EFAULT;
+					}	
+				if ( rtw_efuse_map_write(padapter, addr, cnts, setdata) == _FAIL ) {
+					DBG_8192C("rtw_efuse_map_write error \n");
+					return -EFAULT;
+				} else
+					DBG_8192C("rtw_efuse_map_write ok \n");
+				
+			return 0;
+		}
+		else if ( strcmp(tmp[0],"vidpid") == 0 ) { 
+			 if ( tmp[1]==NULL || tmp[2]==NULL ) return 	-EINVAL;
+				// pidvid,da0b7881
+				#ifdef CONFIG_RTL8192C
+					   addr=0x0a;
+				#endif
+				#ifdef CONFIG_RTL8192D
+					addr = 0x0c;
+				#endif
+				
+				cnts=strlen( tmp[1] )/2;
+				if ( cnts == 0) return -EFAULT;
+				DBG_8192C("target data = %s \n" ,tmp[1]);
+				
+				for( jj = 0, kk = 0; jj < cnts; jj++, kk += 2 )
+				{
+					setdata[jj] = key_2char2num(tmp[1][kk], tmp[1][kk+ 1]);
+				}
+
+				EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE);
+				
+				if ((addr + cnts) > max_available_size) {
+						DBG_8192C("parameter error \n");
+						return -EFAULT;
+					}	
+				
+				if ( rtw_efuse_map_write(padapter, addr, cnts, setdata) == _FAIL ) {
+					DBG_8192C("rtw_efuse_map_write error \n");
+					return -EFAULT;
+				} else
+					DBG_8192C("rtw_efuse_map_write ok \n");
+			
+				return 0;
+		}
+		else{
+				 DBG_8192C("Command not found\n");
+			   return 0;
+		}
+		
+	  return 0;
+}
+
+
+
+#if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_MP_IWPRIV_SUPPORT)
+
+/*
+ * Input Format: %s,%d,%d
+ *	%s is width, could be
+ *		"b" for 1 byte
+ *		"w" for WORD (2 bytes)
+ *		"dw" for DWORD (4 bytes)
+ *	1st %d is address(offset)
+ *	2st %d is data to write
+ */
+static int rtw_mp_write_reg(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_point *wrqu, char *extra)
+{
+	char *pch, *pnext, *ptmp;
+	char *width_str;
+	char width;
+	u32 addr, data;
+	int ret;
+	PADAPTER padapter = rtw_netdev_priv(dev);
+
+
+	pch = extra;
+	pnext = strpbrk(pch, " ,.-");
+	if (pnext == NULL) return -EINVAL;
+	*pnext = 0;
+	width_str = pch;
+
+	pch = pnext + 1;
+	pnext = strpbrk(pch, " ,.-");
+	if (pnext == NULL) return -EINVAL;
+	*pnext = 0;
+	addr = simple_strtoul(pch, &ptmp, 16);
+	if (addr > 0x3FFF) return -EINVAL;
+
+	pch = pnext + 1;
+	if ((pch - extra) >= wrqu->length) return -EINVAL;
+	data = simple_strtoul(pch, &ptmp, 16);
+
+	ret = 0;
+	width = width_str[0];
+	switch (width) {
+		case 'b':
+			// 1 byte
+			if (data > 0xFF) {
+				ret = -EINVAL;
+				break;
+			}
+			rtw_write8(padapter, addr, data);
+			break;
+		case 'w':
+			// 2 bytes
+			if (data > 0xFFFF) {
+				ret = -EINVAL;
+				break;
+			}
+			rtw_write16(padapter, addr, data);
+			break;
+		case 'd':
+			// 4 bytes
+			rtw_write32(padapter, addr, data);
+			break;
+		default:
+			ret = -EINVAL;
+			break;
+	}
+
+	return ret;
+}
+
+/*
+ * Input Format: %s,%d
+ *	%s is width, could be
+ *		"b" for 1 byte
+ *		"w" for WORD (2 bytes)
+ *		"dw" for DWORD (4 bytes)
+ *	%d is address(offset)
+ *
+ * Return:
+ *	%d for data readed
+ */
+static int rtw_mp_read_reg(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_point *wrqu, char *extra)
+{
+	char input[wrqu->length];
+	char *pch, *pnext, *ptmp;
+	char *width_str;
+	char width;
+	char data[20],tmp[20];
+	u32 addr;
+	//u32 *data = (u32*)extra;
+	u32 ret, i=0, j=0, strtout=0;
+	PADAPTER padapter = rtw_netdev_priv(dev);
+
+
+	if (wrqu->length > 128) return -EFAULT;
+
+	if (copy_from_user(input, wrqu->pointer, wrqu->length))
+		return -EFAULT;
+
+	pch = input;
+	pnext = strpbrk(pch, " ,.-");
+	if (pnext == NULL) return -EINVAL;
+	*pnext = 0;
+	width_str = pch;
+
+	pch = pnext + 1;
+	if ((pch - input) >= wrqu->length) return -EINVAL;
+	
+	addr = simple_strtoul(pch, &ptmp, 16);
+	if (addr > 0x3FFF) return -EINVAL;
+
+	ret = 0;
+	width = width_str[0];
+	switch (width) {
+		case 'b':
+			// 1 byte
+			// *(u8*)data = rtw_read8(padapter, addr);
+			sprintf(extra, "%d\n",  rtw_read8(padapter, addr));
+			wrqu->length = 4;
+			break;
+		case 'w':
+			// 2 bytes
+			//*(u16*)data = rtw_read16(padapter, addr);
+			sprintf(data, "%04d\n", rtw_read16(padapter, addr));
+			for( i=0 ; i <= strlen(data) ; i++)
+				{
+					  if( i%2==0 )
+					  {
+						   tmp[j]=' ';
+						   j++;
+					  }
+					  if ( data[i] != '\0' )
+					 	 tmp[j] = data[i];
+					 	
+					  	 j++;
+				}
+				pch = tmp;		
+				DBG_8192C("pch=%s",pch);
+				
+				while( *pch != '\0' )
+				{
+					pnext = strpbrk(pch, " ");
+					pnext++;
+					if ( *pnext != '\0' )
+					{
+						  strtout = simple_strtoul (pnext , &ptmp, 16);
+						  sprintf( extra, "%s %d" ,extra ,strtout );
+					}
+					else{
+						  break;
+					}
+					pch = pnext;
+				}
+			wrqu->length = 8;
+			break;
+		case 'd':
+			// 4 bytes
+			//*data = rtw_read32(padapter, addr);
+			sprintf(data, "%08x", rtw_read32(padapter, addr));
+				//add read data format blank
+				for( i=0 ; i <= strlen(data) ; i++)
+				{
+					  if( i%2==0 )
+					  {
+						   tmp[j]=' ';
+						   j++;
+					  }
+					  tmp[j] = data[i];
+					  j++;
+				}
+				pch = tmp;		
+				DBG_8192C("pch=%s",pch);
+				
+				while( *pch != '\0' )
+				{
+					pnext = strpbrk(pch, " ");
+					pnext++;
+					if ( *pnext != '\0' )
+					{
+						  strtout = simple_strtoul (pnext , &ptmp, 16);
+						  sprintf( extra, "%s %d" ,extra ,strtout );
+					}
+					else{
+			break;
+					}
+					pch = pnext;
+				}
+			wrqu->length = 20;	
+			break;
+			
+		default:
+			wrqu->length = 0;
+			ret = -EINVAL;
+			break;
+			
+	}
+
+	return ret;
+}
+
+/*
+ * Input Format: %d,%x,%x
+ *	%d is RF path, should be smaller than MAX_RF_PATH_NUMS
+ *	1st %x is address(offset)
+ *	2st %x is data to write
+ */
+ static int rtw_mp_write_rf(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_point *wrqu, char *extra)
+{			
+/*static int rtw_mp_write_rf(struct net_device *dev,
+			struct iw_request_info *info,
+			union iwreq_data *wrqu, char *extra)
+*/
+	u32 path, addr, data;
+	int ret;
+	PADAPTER padapter = rtw_netdev_priv(dev);
+
+
+	ret = sscanf(extra, "%d,%x,%x", &path, &addr, &data);
+	if (ret < 3) return -EINVAL;
+
+	if (path >= MAX_RF_PATH_NUMS) return -EINVAL;
+	if (addr > 0xFF) return -EINVAL;
+	if (data > 0xFFFFF) return -EINVAL;
+
+	write_rfreg(padapter, path, addr, data);
+
+	return 0;
+}
+
+/*
+ * Input Format: %d,%x
+ *	%d is RF path, should be smaller than MAX_RF_PATH_NUMS
+ *	%x is address(offset)
+ *
+ * Return:
+ *	%d for data readed
+ */
+static int rtw_mp_read_rf(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_point *wrqu, char *extra)
+{
+	char input[wrqu->length];
+	char *pch, *pnext, *ptmp;
+	char data[20],tmp[20];
+	//u32 *data = (u32*)extra;
+	u32 path, addr;
+	u32 ret,i=0 ,j=0,strtou=0;
+	PADAPTER padapter = rtw_netdev_priv(dev);
+
+
+	if (wrqu->length > 128) return -EFAULT;
+	if (copy_from_user(input, wrqu->pointer, wrqu->length))
+		return -EFAULT;
+
+	ret = sscanf(extra, "%d,%x", &path, &addr);
+	if (ret < 2) return -EINVAL;
+
+	if (path >= MAX_RF_PATH_NUMS) return -EINVAL;
+	if (addr > 0xFF) return -EINVAL;
+
+	//*data = read_rfreg(padapter, path, addr);
+	sprintf(data, "%08x", read_rfreg(padapter, path, addr));
+				//add read data format blank
+				for( i=0 ; i <= strlen(data) ; i++)
+				{
+					  if( i%2==0 )
+					  {
+						   tmp[j]=' ';
+						   j++;
+					  }
+					  tmp[j] = data[i];
+					  j++;
+				}
+				pch = tmp;		
+				DBG_8192C("pch=%s",pch);
+				
+				while( *pch != '\0' )
+				{
+					pnext = strpbrk(pch, " ");
+					pnext++;
+					if ( *pnext != '\0' )
+					{
+						  strtou = simple_strtoul (pnext , &ptmp, 16);
+						  sprintf( extra, "%s %d" ,extra ,strtou );
+					}
+					else{
+						  break;
+					}
+					pch = pnext;
+				}
+			wrqu->length = 10;	
+
+	return 0;
+}
+
+static int rtw_mp_start(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_point *wrqu, char *extra)
+{
+	u8 val8;
+	PADAPTER padapter = rtw_netdev_priv(dev);
+
+
+	if (padapter->registrypriv.mp_mode == 0)
+		return -EPERM;
+
+	if (padapter->mppriv.mode == MP_OFF) {
+		if (mp_start_test(padapter) == _FAIL)
+			return -EPERM;
+		padapter->mppriv.mode = MP_ON;
+	}
+
+	return 0;
+}
+
+static int rtw_mp_stop(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_point *wrqu, char *extra)
+{
+	PADAPTER padapter = rtw_netdev_priv(dev);
+
+
+	if (padapter->mppriv.mode != MP_OFF) {
+		mp_stop_test(padapter);
+		padapter->mppriv.mode = MP_OFF;
+	}
+
+	return 0;
+}
+
+extern int wifirate2_ratetbl_inx(unsigned char rate);
+
+static int rtw_mp_rate(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_point *wrqu, char *extra)
+{
+	u32 rate = MPT_RATE_1M;
+	u8 		input[wrqu->length];
+	PADAPTER padapter = rtw_netdev_priv(dev);
+
+	if (copy_from_user(input, wrqu->pointer, wrqu->length))
+			return -EFAULT;
+			
+	rate = rtw_atoi(input);
+	sprintf( extra, "Set data rate to %d" , rate );
+		
+	if(rate <= 0x7f)
+		rate = wifirate2_ratetbl_inx( (u8)rate);	
+	else 
+		rate =(rate-0x80+MPT_RATE_MCS0);
+
+	//DBG_8192C("%s: rate=%d\n", __func__, rate);
+	
+	if (rate >= MPT_RATE_LAST )	
+	return -EINVAL;
+
+	padapter->mppriv.rateidx = rate;
+	Hal_SetDataRate(padapter);
+
+	wrqu->length = strlen(extra) + 1;
+	return 0;
+}
+
+static int rtw_mp_channel(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_point *wrqu, char *extra)
+{
+
+	PADAPTER padapter = rtw_netdev_priv(dev);
+	u8 		input[wrqu->length];
+	u32 	channel = 1;
+
+	if (copy_from_user(input, wrqu->pointer, wrqu->length))
+			return -EFAULT;
+	
+	channel = rtw_atoi(input);
+	//DBG_8192C("%s: channel=%d\n", __func__, channel);
+	sprintf( extra, "Change channel %d to channel %d", padapter->mppriv.channel , channel );
+
+	padapter->mppriv.channel = channel;
+	Hal_SetChannel(padapter);
+
+	wrqu->length = strlen(extra) + 1;
+	return 0;
+}
+
+static int rtw_mp_bandwidth(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_point *wrqu, char *extra)
+{
+	u32 bandwidth=0, sg=0;
+	//u8 buffer[40];
+	PADAPTER padapter = rtw_netdev_priv(dev);
+	//if (copy_from_user(buffer, (void*)wrqu->data.pointer, wrqu->data.length))
+    //            return -EFAULT;
+                
+	//DBG_8192C("%s:iwpriv in=%s\n", __func__, extra);
+	
+	sscanf(extra, "40M=%d,shortGI=%d", &bandwidth, &sg);
+	
+	if (bandwidth != HT_CHANNEL_WIDTH_40)
+		bandwidth = HT_CHANNEL_WIDTH_20;
+
+	//DBG_8192C("%s: bw=%d sg=%d \n", __func__, bandwidth , sg);
+	
+	padapter->mppriv.bandwidth = (u8)bandwidth;
+	padapter->mppriv.preamble = sg;
+	
+	SetBandwidth(padapter);
+
+	return 0;
+}
+
+static int rtw_mp_txpower(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_point *wrqu, char *extra)
+{
+	u32		idx_a=0,idx_b=0;
+	u8 		input[wrqu->length];
+
+	PADAPTER padapter = rtw_netdev_priv(dev);
+
+	if (copy_from_user(input, wrqu->pointer, wrqu->length))
+			return -EFAULT;
+
+	sscanf(input,"patha=%d,pathb=%d",&idx_a,&idx_b);
+	//DBG_8192C("%s: tx_pwr_idx_a=%x b=%x\n", __func__, idx_a, idx_b);
+
+	sprintf( extra, "Set power level path_A:%d path_B:%d", idx_a , idx_b );
+	padapter->mppriv.txpoweridx = (u8)idx_a;
+	padapter->mppriv.txpoweridx_b = (u8)idx_b;
+	
+	Hal_SetAntennaPathPower(padapter);
+	
+	wrqu->length = strlen(extra) + 1;
+	return 0;
+}
+
+static int rtw_mp_ant_tx(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_point *wrqu, char *extra)
+{
+	u8 i;
+	u8 		input[wrqu->length];
+	u16 antenna = 0;
+	PADAPTER padapter = rtw_netdev_priv(dev);
+
+	if (copy_from_user(input, wrqu->pointer, wrqu->length))
+			return -EFAULT;
+			
+	DBG_8192C("%s: input=%s\n", __func__, input);	
+	
+	sprintf( extra, "switch Tx antenna to %s", input );
+	
+	for (i=0; i < strlen(input); i++)
+	{
+		switch(input[i])
+			{
+				case 'a' :
+								antenna|=ANTENNA_A;
+								break;
+				case 'b':
+								antenna|=ANTENNA_B;
+								break;
+			}
+	}
+	//antenna |= BIT(extra[i]-'a');
+	DBG_8192C("%s: antenna=0x%x\n", __func__, antenna);		
+	padapter->mppriv.antenna_tx = antenna;
+	DBG_8192C("%s:mppriv.antenna_rx=%d\n", __func__, padapter->mppriv.antenna_tx);
+	
+	Hal_SetAntenna(padapter);
+
+	wrqu->length = strlen(extra) + 1;
+	return 0;
+}
+
+static int rtw_mp_ant_rx(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_point *wrqu, char *extra)
+{
+	u8 i;
+	u16 antenna = 0;
+	u8 		input[wrqu->length];
+	PADAPTER padapter = rtw_netdev_priv(dev);
+
+	if (copy_from_user(input, wrqu->pointer, wrqu->length))
+			return -EFAULT;
+	//DBG_8192C("%s: input=%s\n", __func__, input);
+
+	for (i=0; i < strlen(input); i++) {
+	
+	switch( input[i] )
+			{
+				case 'a' :
+								antenna|=ANTENNA_A;
+								break;
+				case 'b':
+								antenna|=ANTENNA_B;
+								break;
+			}
+	}
+	
+	//DBG_8192C("%s: antenna=0x%x\n", __func__, antenna);		
+	padapter->mppriv.antenna_rx = antenna;
+	//DBG_8192C("%s:mppriv.antenna_rx=%d\n", __func__, padapter->mppriv.antenna_rx);
+	Hal_SetAntenna(padapter);
+	wrqu->length = strlen(extra) + 1;
+	
+	return 0;
+}
+
+static int rtw_mp_ctx(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_point *wrqu, char *extra)
+{
+	u32 pkTx = 1, countPkTx = 1, cotuTx = 1, CarrSprTx = 1, scTx = 1, sgleTx = 1, stop = 1;
+	u32 bStartTest = 1;
+	u32 count = 0;
+	struct mp_priv *pmp_priv;
+	struct pkt_attrib *pattrib;
+
+	PADAPTER padapter = rtw_netdev_priv(dev);
+
+
+	pmp_priv = &padapter->mppriv;
+
+	if (copy_from_user(extra, wrqu->pointer, wrqu->length))
+			return -EFAULT;
+			
+	DBG_8192C("%s: in=%s\n", __func__, extra);
+
+	countPkTx = strncmp(extra, "count=", 5); // strncmp TRUE is 0
+	cotuTx = strncmp(extra, "background", 20);
+	CarrSprTx = strncmp(extra, "background,cs", 20);
+	scTx = strncmp(extra, "background,sc", 20);
+	sgleTx = strncmp(extra, "background,stone", 20);
+	pkTx = strncmp(extra, "background,pkt", 20);
+	stop = strncmp(extra, "stop", 5);
+	sscanf(extra, "count=%d,pkt", &count);
+	
+	//DBG_8192C("%s: count=%d countPkTx=%d cotuTx=%d CarrSprTx=%d scTx=%d sgleTx=%d pkTx=%d stop=%d\n", __func__, count, countPkTx, cotuTx, CarrSprTx, pkTx, sgleTx, scTx, stop);
+	_rtw_memset(extra, '\0', sizeof(extra));
+
+	if (stop == 0) {
+		bStartTest = 0; // To set Stop
+		pmp_priv->tx.stop = 1;
+		sprintf( extra, "Stop continuous Tx");
+	} else {
+		bStartTest = 1;
+		if (pmp_priv->mode != MP_ON) {
+			if (pmp_priv->tx.stop != 1) {
+				DBG_8192C("%s: MP_MODE != ON %d\n", __func__, pmp_priv->mode);
+				return  -EFAULT;
+			}
+		}
+	}
+
+	if (pkTx == 0 || countPkTx == 0)
+		pmp_priv->mode = MP_PACKET_TX;
+	if (sgleTx == 0)
+		pmp_priv->mode = MP_SINGLE_TONE_TX;
+	if (cotuTx == 0)
+		pmp_priv->mode = MP_CONTINUOUS_TX;
+	if (CarrSprTx == 0)
+		pmp_priv->mode = MP_CARRIER_SUPPRISSION_TX;
+	if (scTx == 0)
+		pmp_priv->mode = MP_SINGLE_CARRIER_TX;
+
+	switch (pmp_priv->mode)
+	{
+		case MP_PACKET_TX:
+		
+			//DBG_8192C("%s:pkTx %d\n", __func__,bStartTest);
+			if (bStartTest == 0)
+			{
+				pmp_priv->tx.stop = 1;
+				pmp_priv->mode = MP_ON;
+				sprintf( extra, "Stop continuous Tx");
+			}
+			else if (pmp_priv->tx.stop == 1)
+			{
+				sprintf( extra, "Start continuous DA=ffffffffffff len=1500 count=%u,\n",count);
+				//DBG_8192C("%s:countPkTx %d\n", __func__,count);
+				pmp_priv->tx.stop = 0;
+				pmp_priv->tx.count = count;
+				pmp_priv->tx.payload = 2;
+				pattrib = &pmp_priv->tx.attrib;
+				pattrib->pktlen = 1460;
+				_rtw_memset(pattrib->dst, 0xFF, ETH_ALEN);
+				SetPacketTx(padapter);
+			} 
+			else {
+				//DBG_8192C("%s: pkTx not stop\n", __func__);
+				return -EFAULT;
+			}
+				wrqu->length = strlen(extra);
+			return 0;
+
+		case MP_SINGLE_TONE_TX:
+			//DBG_8192C("%s: sgleTx %d \n", __func__, bStartTest);
+			if (bStartTest != 0){
+				sprintf( extra, "Start continuous DA=ffffffffffff len=1500 \n infinite=yes.");
+            Hal_SetSingleToneTx(padapter, (u8)bStartTest);
+            }
+			break;
+
+		case MP_CONTINUOUS_TX:
+			//DBG_8192C("%s: cotuTx %d\n", __func__, bStartTest);
+			if (bStartTest != 0){
+				sprintf( extra, "Start continuous DA=ffffffffffff len=1500 \n infinite=yes.");
+            Hal_SetContinuousTx(padapter, (u8)bStartTest);
+           		 }
+			break;
+
+		case MP_CARRIER_SUPPRISSION_TX:
+			//DBG_8192C("%s: CarrSprTx %d\n", __func__, bStartTest);
+			if (bStartTest != 0){
+				if( pmp_priv->rateidx <= MPT_RATE_11M ) 
+				{
+					sprintf( extra, "Start continuous DA=ffffffffffff len=1500 \n infinite=yes.");
+			Hal_SetCarrierSuppressionTx(padapter, (u8)bStartTest);
+				}else
+					sprintf( extra, "Specify carrier suppression but not CCK rate");
+			}
+			break;
+
+		case MP_SINGLE_CARRIER_TX:
+			//DBG_8192C("%s: scTx %d\n", __func__, bStartTest);
+			if (bStartTest != 0){
+				sprintf( extra, "Start continuous DA=ffffffffffff len=1500 \n infinite=yes.");
+			Hal_SetSingleCarrierTx(padapter, (u8)bStartTest);
+			}
+			break;
+
+		default:
+			//DBG_8192C("%s:No Match MP_MODE\n", __func__);
+			sprintf( extra, "Error! Continuous-Tx is not on-going.");
+			return -EFAULT;
+	}
+
+	if (bStartTest) {
+		struct mp_priv *pmp_priv = &padapter->mppriv;
+		if (pmp_priv->tx.stop == 0) {
+			pmp_priv->tx.stop = 1;
+			//DBG_8192C("%s: pkt tx is running...\n", __func__);
+			rtw_msleep_os(5);
+		}
+		pmp_priv->tx.stop = 0;
+		pmp_priv->tx.count = 1;
+		SetPacketTx(padapter);
+	} else {
+		pmp_priv->mode = MP_ON;
+	}
+
+	wrqu->length = strlen(extra);
+	return 0;
+}
+
+static int rtw_mp_arx(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_point *wrqu, char *extra)
+{
+	u8 bStartRx=0,bStopRx=0;
+	PADAPTER padapter = rtw_netdev_priv(dev);
+	u8 		input[wrqu->length];
+
+	if (copy_from_user(input, wrqu->pointer, wrqu->length))
+			return -EFAULT;
+
+	DBG_8192C("%s: %s\n", __func__, input);
+
+	bStartRx = (strncmp(input, "start", 5)==0)?1:0; // strncmp TRUE is 0
+	bStopRx = (strncmp(input, "stop", 5)==0)?1:0; // strncmp TRUE is 0
+	SetPacketRx(padapter, bStartRx);
+
+	if(bStartRx)
+	{
+		sprintf( extra, "start");
+		wrqu->length = strlen(extra) + 1;
+	}
+	else if(bStopRx)
+	{
+		sprintf( extra, "Received packet OK:%d CRC error:%d",padapter->mppriv.rx_pktcount,
+														padapter->mppriv.rx_crcerrpktcount);
+		wrqu->length = strlen(extra) + 1;
+	}
+	
+
+	return 0;
+}
+
+static int rtw_mp_trx_query(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_point *wrqu, char *extra)
+{
+	u32 txok,txfail,rxok,rxfail;
+	PADAPTER padapter = rtw_netdev_priv(dev);
+	//if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length))
+	//	return -EFAULT;
+
+	txok=padapter->mppriv.tx.sended;
+	txfail=0;
+	rxok = padapter->mppriv.rx_pktcount;
+	rxfail = padapter->mppriv.rx_crcerrpktcount;
+
+	_rtw_memset(extra, '\0', 128);
+
+	sprintf(extra, "Tx OK:%d, Tx Fail:%d, Rx OK:%d, CRC error:%d ", txok, txfail,rxok,rxfail);
+
+	wrqu->length=strlen(extra)+1;
+
+	return 0;
+}
+
+static int rtw_mp_pwrtrk(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_point *wrqu, char *extra)
+{
+	u8 enable;
+	u32 thermal;
+	s32 ret;
+	PADAPTER padapter = rtw_netdev_priv(dev);
+
+
+	enable = 1;
+	if (wrqu->length > 1) { // not empty string
+		if (strncmp(extra, "stop", 4) == 0)
+			enable = 0;
+		else {
+			if (sscanf(extra, "ther=%d", &thermal)) {
+				ret = Hal_SetThermalMeter(padapter, (u8)thermal);
+				if (ret == _FAIL) return -EPERM;
+			} else
+				return -EINVAL;
+		}
+	}
+
+	ret = Hal_SetPowerTracking(padapter, enable);
+	if (ret == _FAIL) return -EPERM;
+
+	return 0;
+}
+
+static int rtw_mp_psd(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_point *wrqu, char *extra)
+{
+	PADAPTER padapter = rtw_netdev_priv(dev);
+
+
+	if (copy_from_user(extra, wrqu->pointer, wrqu->length))
+		return -EFAULT;
+	
+	wrqu->length = mp_query_psd(padapter, extra);
+
+	return 0;
+}
+
+static int rtw_mp_thermal(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_point *wrqu, char *extra)
+{
+	u8 val; 
+	u16 bwrite=1;
+	#ifdef CONFIG_RTL8192C
+		u16 addr=0x78;
+	#endif
+	#ifdef CONFIG_RTL8192D
+		u16 addr=0xc3;
+	#endif
+	u16 cnt=1;
+	u16 max_available_size=0;
+	PADAPTER padapter = rtw_netdev_priv(dev);	
+
+	if (copy_from_user(extra, wrqu->pointer, wrqu->length))
+		return -EFAULT;
+
+	//DBG_8192C("print extra %s \n",extra); 
+	 
+	 bwrite = strncmp(extra, "write", 6); // strncmp TRUE is 0
+	 
+	 Hal_GetThermalMeter(padapter, &val);
+	 
+	 if( bwrite == 0 )	
+	 {
+		 //DBG_8192C("to write val:%d",val);
+			EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE);
+			if( 2 > max_available_size )
+			{			
+				DBG_8192C("no available efuse!\n");
+				return -EFAULT;
+			}	
+			if ( rtw_efuse_map_write(padapter, addr, cnt, &val) == _FAIL )
+			{
+				DBG_8192C("rtw_efuse_map_write error \n");			
+				return -EFAULT;
+			} 
+			else
+			{
+				 sprintf(extra, " efuse write ok :%d", val);	
+			}
+	  }
+	  else
+	  {
+	  		 sprintf(extra, "%d", val);
+	  }
+	wrqu->length = strlen(extra);
+	
+	return 0;
+}
+
+static int rtw_mp_reset_stats(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_point *wrqu, char *extra)
+{
+	struct mp_priv *pmp_priv;
+	struct pkt_attrib *pattrib;
+	PADAPTER padapter = rtw_netdev_priv(dev);
+	
+	pmp_priv = &padapter->mppriv;
+	
+	pmp_priv->tx.sended = 0;
+	padapter->mppriv.rx_pktcount = 0;
+	padapter->mppriv.rx_crcerrpktcount = 0;
+
+	return 0;
+}
+
+static int rtw_mp_dump(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_point *wrqu, char *extra)
+{
+	struct mp_priv *pmp_priv;
+	struct pkt_attrib *pattrib;
+        u32 value;
+	u8 rf_type,path_nums = 0;
+	u32 i,j=1,path;
+	PADAPTER padapter = rtw_netdev_priv(dev);
+	
+	pmp_priv = &padapter->mppriv;
+
+	
+	//if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length))
+	//	return -EFAULT;
+	
+	if ( strncmp(extra, "all", 4)==0 )
+	{
+			DBG_8192C("\n======= MAC REG =======\n");
+			for ( i=0x0;i<0x300;i+=4 )
+			{	
+				if(j%4==1)	DBG_8192C("0x%02x",i);
+				DBG_8192C(" 0x%08x ",rtw_read32(padapter,i));		
+				if((j++)%4 == 0)	DBG_8192C("\n");	
+			}
+			for( i=0x400;i<0x800;i+=4 )
+			{	
+				if(j%4==1)	DBG_8192C("0x%02x",i);
+				DBG_8192C(" 0x%08x ",rtw_read32(padapter,i));		
+				if((j++)%4 == 0)	DBG_8192C("\n");	
+			}
+			
+			i,j=1;
+			padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
+				
+			DBG_8192C("\n======= RF REG =======\n");
+			if(( RF_1T2R == rf_type ) ||( RF_1T1R ==rf_type ))	
+				path_nums = 1;
+			else	
+				path_nums = 2;
+				
+			for(path=0;path<path_nums;path++)
+			{
+#ifdef CONFIG_RTL8192D
+			  for (i = 0; i < 0x50; i++)
+#else
+	   		 for (i = 0; i < 0x34; i++)
+#endif
+				{								
+					//value = PHY_QueryRFReg(padapter, (RF90_RADIO_PATH_E)path,i, bMaskDWord);
+					value =padapter->HalFunc.read_rfreg(padapter, path, i, 0xffffffff);
+					if(j%4==1)	DBG_8192C("0x%02x ",i);
+					DBG_8192C(" 0x%08x ",value);
+					if((j++)%4==0)	DBG_8192C("\n");	
+				}	
+			}
+	}
+	return 0;
+}
+
+static int rtw_mp_phypara(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_point *wrqu, char *extra)
+{
+
+	PADAPTER padapter = rtw_netdev_priv(dev);
+	char 	input[wrqu->length];
+	u32		valxcap;
+	
+	if (copy_from_user(input, wrqu->pointer, wrqu->length))
+			return -EFAULT;
+	
+	DBG_8192C("%s:iwpriv in=%s\n", __func__, input);
+	
+	sscanf(input, "xcap=%d", &valxcap);
+
+	if (!IS_HARDWARE_TYPE_8192D(padapter))
+			return 0;
+#ifdef CONFIG_RTL8192D
+	Hal_ProSetCrystalCap( padapter , valxcap );
+#endif
+
+	sprintf( extra, "Set xcap=%d",valxcap );
+	wrqu->length = strlen(extra) + 1;
+	
+return 0;
+
+}
+
+
+/* update Tx AGC offset */
+static int rtw_mp_antBdiff(struct net_device *dev,
+			struct iw_request_info *info,
+			struct iw_point *wrqu, char *extra)
+{
+
+
+	// MPT_ProSetTxAGCOffset
+	return 0;
+}
+
+
+static int rtw_mp_set(struct net_device *dev,
+			struct iw_request_info *info,
+			union iwreq_data *wdata, char *extra)
+{
+	struct iw_point *wrqu = (struct iw_point *)wdata;
+	u32 subcmd = wrqu->flags;
+	PADAPTER padapter = rtw_netdev_priv(dev);
+
+	if (padapter == NULL)
+	{
+		return -ENETDOWN;
+	}
+
+	//_rtw_memset(extra, 0x00, IW_PRIV_SIZE_MASK);
+
+	if (extra == NULL)
+	{
+		wrqu->length = 0;
+		return -EIO;
+	}
+
+	switch(subcmd)
+	{
+	case WRITE_REG :
+			rtw_mp_write_reg (dev,info,wrqu,extra);
+			 break;
+			 
+	case WRITE_RF:
+			rtw_mp_write_rf (dev,info,wrqu,extra);
+			 break; 
+			 
+	case MP_START:
+			DBG_8192C("set case mp_start \n");
+			rtw_mp_start (dev,info,wrqu,extra);
+			 break; 
+			 
+	case MP_STOP:
+			DBG_8192C("set case mp_stop \n");
+			rtw_mp_stop (dev,info,wrqu,extra);
+			 break; 
+			 
+	case MP_BANDWIDTH:
+			DBG_8192C("set case mp_bandwidth \n");
+			rtw_mp_bandwidth (dev,info,wrqu,extra);
+			break;
+	case MP_PWRTRK:
+			DBG_8192C("set case MP_PWRTRK \n");
+			rtw_mp_pwrtrk (dev,info,wrqu,extra);
+			break;
+			
+	case MP_RESET_STATS:
+			DBG_8192C("set case MP_RESET_STATS \n");
+			rtw_mp_reset_stats	(dev,info,wrqu,extra);
+			break;
+			
+	case EFUSE_SET:
+			DBG_8192C("efuse set \n");
+			rtw_mp_efuse_set (dev,info,wdata,extra);
+			break;	
+		 		
+	}
+
+	  
+	return 0;		
+}
+
+
+static int rtw_mp_get(struct net_device *dev,
+			struct iw_request_info *info,
+			union iwreq_data *wdata, char *extra)
+{
+	struct iw_point *wrqu = (struct iw_point *)wdata;
+	u32 subcmd = wrqu->flags;
+	PADAPTER padapter = rtw_netdev_priv(dev);
+
+	DBG_8192C("in mp_get extra= %s \n",extra);
+
+	if (padapter == NULL)
+	{
+		return -ENETDOWN;
+	}
+	if (extra == NULL)
+	{
+		wrqu->length = 0;
+		return -EIO;
+	}
+	
+	switch(subcmd)
+	{
+	case MP_PHYPARA:
+			DBG_8192C("mp_get  MP_PHYPARA \n");
+			rtw_mp_phypara(dev,info,wrqu,extra);	
+			break;
+
+	case MP_CHANNEL:
+			DBG_8192C("set case mp_channel \n");
+			rtw_mp_channel (dev,info,wrqu,extra);
+			break;
+			
+	case READ_REG:
+			DBG_8192C("mp_get  READ_REG \n");
+			rtw_mp_read_reg (dev,info,wrqu,extra);
+			 break; 
+	case READ_RF:
+			DBG_8192C("mp_get  READ_RF \n");
+			rtw_mp_read_rf (dev,info,wrqu,extra);
+			break; 
+			
+	case MP_RATE:
+			DBG_8192C("set case mp_rate \n");
+			rtw_mp_rate (dev,info,wrqu,extra);
+			break;
+			
+	case MP_TXPOWER:
+			DBG_8192C("set case MP_TXPOWER \n");
+			rtw_mp_txpower (dev,info,wrqu,extra);
+			break;
+			
+	case MP_ANT_TX:
+			DBG_8192C("set case MP_ANT_TX \n");
+			rtw_mp_ant_tx (dev,info,wrqu,extra);
+			break;
+			
+	case MP_ANT_RX:
+			DBG_8192C("set case MP_ANT_RX \n");
+			rtw_mp_ant_rx (dev,info,wrqu,extra);
+			break;
+			
+	case MP_QUERY:
+			DBG_8192C("mp_get mp_query MP_QUERY \n");
+			rtw_mp_trx_query(dev,info,wrqu,extra);
+			break;
+					
+	case MP_CTX:
+			DBG_8192C("set case MP_CTX \n");
+			rtw_mp_ctx (dev,info,wrqu,extra);
+			break;
+			
+	case MP_ARX:
+			DBG_8192C("set case MP_ARX \n");
+			rtw_mp_arx (dev,info,wrqu,extra);
+			break;
+			
+	case EFUSE_GET:
+			DBG_8192C("efuse get EFUSE_GET \n");
+			rtw_mp_efuse_get(dev,info,wdata,extra);
+		 break; 
+		 
+	case MP_DUMP:
+			DBG_8192C("set case MP_DUMP \n");
+			rtw_mp_dump (dev,info,wrqu,extra);
+		 break; 
+	case MP_PSD:
+			DBG_8192C("set case MP_PSD \n");
+			rtw_mp_psd (dev,info,wrqu,extra);
+		 break; 
+			
+	case MP_THER:
+			DBG_8192C("set case MP_THER \n");
+			rtw_mp_thermal (dev,info,wrqu,extra);
+			break;
+			
+	}
+
+return 0;	
+}
+
+#endif //#if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_MP_IWPRIV_SUPPORT)
+
+
+
+static int rtw_tdls_setup(struct net_device *dev,
+				struct iw_request_info *info,
+				union iwreq_data *wrqu, char *extra)
+{
+	int ret = 0;
+
+#ifdef CONFIG_TDLS
+
+	u8 i;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	u8 mac_addr[ETH_ALEN];
+
+	DBG_8192C( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1  );
+
+	for(i=0; i < ETH_ALEN; i++){
+		mac_addr[i]=key_2char2num(*(extra+2*i), *(extra+2*i+1));
+	}
+
+	issue_tdls_setup_req(padapter, mac_addr);
+
+#endif
+	
+	return ret;
+}
+
+
+static int rtw_tdls_teardown(struct net_device *dev,
+				struct iw_request_info *info,
+				union iwreq_data *wrqu, char *extra)
+{
+	int ret = 0;
+
+#ifdef CONFIG_TDLS
+
+	u8 i;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	u8 mac_addr[ETH_ALEN];
+
+	DBG_8192C( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1  );
+
+	for(i=0; i < ETH_ALEN; i++){
+		mac_addr[i]=key_2char2num(*(extra+2*i), *(extra+2*i+1));
+
+	}
+	
+	issue_tdls_teardown(padapter, mac_addr);
+
+#endif
+	
+	return ret;
+}
+
+
+static int rtw_tdls_discovery(struct net_device *dev,
+				struct iw_request_info *info,
+				union iwreq_data *wrqu, char *extra)
+{
+	int ret = 0;
+
+#ifdef CONFIG_TDLS
+	
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	DBG_8192C( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1  );
+
+	if(*extra=='0')
+		pmlmeinfo->tdls_dis_req=0;
+	else if(*extra=='1')
+		pmlmeinfo->tdls_dis_req=1;
+
+#endif
+
+	return ret;
+}
+
+static int rtw_tdls_ch_switch(struct net_device *dev,
+				struct iw_request_info *info,
+				union iwreq_data *wrqu, char *extra)
+{
+	int ret = 0;
+
+#ifdef CONFIG_TDLS
+	
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	u8 i, mac_addr[ETH_ALEN];
+	struct sta_info *ptdls_sta = NULL;
+
+	DBG_8192C( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1  );
+
+	if(*extra=='o' && *(extra+1)=='n'){
+		pmlmeinfo->tdls_ch_sensing=1;
+		return ret;
+	}
+	
+	for(i=0; i < ETH_ALEN; i++){
+		mac_addr[i]=key_2char2num(*(extra+2*i), *(extra+2*i+1));
+
+	}
+	pmlmeinfo->tdls_ch_sensing=1;
+	ptdls_sta = rtw_get_stainfo(&padapter->stapriv, mac_addr);
+	ptdls_sta->option=4;
+	_set_workitem(&ptdls_sta->option_workitem);
+	
+#endif
+
+	return ret;
+}
+static int rtw_tdls_ch_switch_off(struct net_device *dev,
+				struct iw_request_info *info,
+				union iwreq_data *wrqu, char *extra)
+{
+	int ret = 0;
+
+#ifdef CONFIG_TDLS
+	
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	u8 i, mac_addr[ETH_ALEN];
+	struct sta_info *ptdls_sta = NULL;
+	
+	DBG_8192C( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1  );
+
+	for(i=0; i < ETH_ALEN; i++){
+		mac_addr[i]=key_2char2num(*(extra+2*i), *(extra+2*i+1));
+
+	}
+
+	ptdls_sta = rtw_get_stainfo(&padapter->stapriv, mac_addr);
+
+	ptdls_sta->state |= TDLS_SW_OFF_STATE;
+/*
+	if((ptdls_sta->state & TDLS_AT_OFF_CH_STATE) && (ptdls_sta->state & TDLS_PEER_AT_OFF_STATE)){
+		pmlmeinfo->tdls_candidate_ch= pmlmeext->cur_channel;
+		issue_tdls_ch_switch_req(padapter, mac_addr);
+		DBG_8192C("issue tdls ch switch req back to base channel\n");
+	}
+*/
+	
+#endif
+
+	return ret;
+}
+
+static int rtw_tdls(struct net_device *dev,
+				struct iw_request_info *info,
+				union iwreq_data *wrqu, char *extra)
+{
+	int ret = 0;
+
+#ifdef CONFIG_TDLS
+
+	DBG_8192C( "[%s] extra = %s\n", __FUNCTION__, extra );
+
+	if ( _rtw_memcmp( extra, "setup=", 6 ) )
+	{
+		wrqu->data.length -=6;
+		rtw_tdls_setup( dev, info, wrqu, &extra[6] );
+	}
+	else if (_rtw_memcmp( extra, "tear=", 5 ) )
+	{
+		wrqu->data.length -= 5;
+		rtw_tdls_teardown( dev, info, wrqu, &extra[5] );
+	}
+	else if (_rtw_memcmp( extra, "dis=", 4 ) )
+	{
+		wrqu->data.length -= 4;
+		rtw_tdls_discovery( dev, info, wrqu, &extra[4] );
+	}
+	else if (_rtw_memcmp( extra, "sw=", 3 ) )
+	{
+		wrqu->data.length -= 3;
+		rtw_tdls_ch_switch( dev, info, wrqu, &extra[3] );
+	}
+	else if (_rtw_memcmp( extra, "swoff=", 6 ) )
+	{
+		wrqu->data.length -= 6;
+		rtw_tdls_ch_switch_off( dev, info, wrqu, &extra[6] );
+	}	
+#endif
+	
+	return ret;
+}
+
+
+static int rtw_pm_set_lps(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	
+	int	ret = 0;	
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv;
+	u8	mode = 0;
+
+	switch( wrqu->data.length -1 )
+	{
+		case 1:
+		{
+			mode = extra[ 0 ] - '0';
+			break;
+		}
+		case 2:
+		{
+			mode = str_2char2num( extra[ 0 ], extra[ 1 ]);
+			break;
+		}
+	}
+
+	if ( mode < PS_MODE_NUM )
+	{
+		if(pwrctrlpriv->power_mgnt !=mode)
+		{
+			if(PS_MODE_ACTIVE == mode)
+			{
+				LeaveAllPowerSaveMode(padapter);
+			}
+			else
+			{
+				pwrctrlpriv->LpsIdleCount = 2;
+			}
+			pwrctrlpriv->power_mgnt = mode;
+			pwrctrlpriv->bLeisurePs = (PS_MODE_ACTIVE != pwrctrlpriv->power_mgnt)?_TRUE:_FALSE;
+		}
+	}
+	else
+	{
+		ret = -1;
+	}
+
+	return ret;
+		
+}
+
+static int rtw_pm_set_ips(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	_adapter *padapter = rtw_netdev_priv(dev);
+	struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv;
+	unsigned	mode = 0;
+
+	sscanf(extra, "%u", &mode);
+
+	if( mode == IPS_NORMAL || mode == IPS_LEVEL_2 ) {
+		rtw_ips_mode_req(pwrctrlpriv, mode);
+		pwrctrlpriv->power_mgnt = PS_MODE_MIN;
+		rtw_set_pwr_state_check_timer(pwrctrlpriv);
+		DBG_871X("%s %s\n", __FUNCTION__, mode == IPS_NORMAL?"IPS_NORMAL":"IPS_LEVEL_2");
+		return 0;
+	} 
+	else if(mode ==IPS_NONE){
+		if(_FAIL == rfpwrstate_check(padapter))
+		{
+			return -EFAULT;
+		}
+		pwrctrlpriv->power_mgnt = PS_MODE_ACTIVE;
+	}
+	else {
+		return -EFAULT;
+	}
+	return 0;
+}
+
+static int rtw_pm_set(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	int ret = 0;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+
+	DBG_8192C( "[%s] extra = %s\n", __FUNCTION__, extra );
+
+	if ( _rtw_memcmp( extra, "lps=", 4 ) )
+	{
+		wrqu->data.length -= 4;
+		rtw_pm_set_lps( dev, info, wrqu, &extra[4] );
+	}
+	if ( _rtw_memcmp( extra, "ips=", 4 ) )
+	{
+		wrqu->data.length -= 4;
+		rtw_pm_set_ips(dev, info, wrqu, &extra[4]);
+	}
+
+	return ret;
+}
+
+
+//based on "driver_ipw" and for hostapd
+int rtw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
+{
+	//_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct iwreq *wrq = (struct iwreq *)rq;
+	int ret=0;
+
+	//down(&priv->wx_sem);
+
+	switch (cmd)
+	{
+	    case RTL_IOCTL_WPA_SUPPLICANT:	
+			ret = wpa_supplicant_ioctl(dev, &wrq->u.data);
+			break;
+#ifdef CONFIG_AP_MODE
+		case RTL_IOCTL_HOSTAPD:
+			ret = rtw_hostapd_ioctl(dev, &wrq->u.data);			
+			break;
+#endif
+	    default:
+			ret = -EOPNOTSUPP;
+			break;
+	}
+
+	//up(&priv->wx_sem);
+	
+	return ret;
+	
+}
+
+static iw_handler rtw_handlers[] =
+{
+	NULL,					/* SIOCSIWCOMMIT */
+	rtw_wx_get_name,		/* SIOCGIWNAME */
+	dummy,					/* SIOCSIWNWID */
+	dummy,					/* SIOCGIWNWID */
+	rtw_wx_set_freq,		/* SIOCSIWFREQ */
+	rtw_wx_get_freq,		/* SIOCGIWFREQ */
+	rtw_wx_set_mode,		/* SIOCSIWMODE */
+	rtw_wx_get_mode,		/* SIOCGIWMODE */
+	dummy,					/* SIOCSIWSENS */
+	rtw_wx_get_sens,		/* SIOCGIWSENS */
+	NULL,					/* SIOCSIWRANGE */
+	rtw_wx_get_range,		/* SIOCGIWRANGE */
+	rtw_wx_set_priv,		/* SIOCSIWPRIV */
+	NULL,					/* SIOCGIWPRIV */
+	NULL,					/* SIOCSIWSTATS */
+	NULL,					/* SIOCGIWSTATS */
+	dummy,					/* SIOCSIWSPY */
+	dummy,					/* SIOCGIWSPY */
+	NULL,					/* SIOCGIWTHRSPY */
+	NULL,					/* SIOCWIWTHRSPY */
+	rtw_wx_set_wap,		/* SIOCSIWAP */
+	rtw_wx_get_wap,		/* SIOCGIWAP */
+	rtw_wx_set_mlme,		/* request MLME operation; uses struct iw_mlme */
+	dummy,					/* SIOCGIWAPLIST -- depricated */
+	rtw_wx_set_scan,		/* SIOCSIWSCAN */
+	rtw_wx_get_scan,		/* SIOCGIWSCAN */
+	rtw_wx_set_essid,		/* SIOCSIWESSID */
+	rtw_wx_get_essid,		/* SIOCGIWESSID */
+	dummy,					/* SIOCSIWNICKN */
+	rtw_wx_get_nick,		/* SIOCGIWNICKN */
+	NULL,					/* -- hole -- */
+	NULL,					/* -- hole -- */
+	rtw_wx_set_rate,		/* SIOCSIWRATE */
+	rtw_wx_get_rate,		/* SIOCGIWRATE */
+	dummy,					/* SIOCSIWRTS */
+	rtw_wx_get_rts,			/* SIOCGIWRTS */
+	rtw_wx_set_frag,		/* SIOCSIWFRAG */
+	rtw_wx_get_frag,		/* SIOCGIWFRAG */
+	dummy,					/* SIOCSIWTXPOW */
+	dummy,					/* SIOCGIWTXPOW */
+	dummy,					/* SIOCSIWRETRY */
+	rtw_wx_get_retry,		/* SIOCGIWRETRY */
+	rtw_wx_set_enc,			/* SIOCSIWENCODE */
+	rtw_wx_get_enc,			/* SIOCGIWENCODE */
+	dummy,					/* SIOCSIWPOWER */
+	rtw_wx_get_power,		/* SIOCGIWPOWER */
+	NULL,					/*---hole---*/
+	NULL,					/*---hole---*/
+	rtw_wx_set_gen_ie,		/* SIOCSIWGENIE */
+	NULL,					/* SIOCGWGENIE */
+	rtw_wx_set_auth,		/* SIOCSIWAUTH */
+	NULL,					/* SIOCGIWAUTH */
+	rtw_wx_set_enc_ext,		/* SIOCSIWENCODEEXT */
+	NULL,					/* SIOCGIWENCODEEXT */
+	rtw_wx_set_pmkid,		/* SIOCSIWPMKSA */
+	NULL,					/*---hole---*/
+}; 
+
+#if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_MP_IWPRIV_SUPPORT)
+
+static const struct iw_priv_args rtw_private_args[] =
+{	
+	{ SIOCIWFIRSTPRIV + 0x00, IW_PRIV_TYPE_CHAR | 1024, 0 , ""},  //set 
+	{ SIOCIWFIRSTPRIV + 0x01, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK , ""},//get
+/* --- sub-ioctls definitions --- */   
+	{ MP_START , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_start" }, //set
+		{ MP_PHYPARA, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_phypara" },//get
+		{ MP_STOP , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_stop" }, //set
+		{ MP_CHANNEL , IW_PRIV_TYPE_CHAR | 1024 , IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_channel" },//get
+		{ MP_BANDWIDTH , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_bandwidth"}, //set
+		{ MP_RATE , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_rate" },//get
+		{ MP_RESET_STATS , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_reset_stats"},
+	{ MP_QUERY , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK , "mp_query"}, //get
+		{ MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set
+	{ READ_REG , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "read_reg" },
+		{ MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set
+	{ MP_RATE , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_rate" },
+		{ MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set
+	{ READ_RF , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "read_rf" },
+		{ MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set
+	{ MP_PSD , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_psd"}, 
+		{ MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set
+	{ MP_DUMP, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_dump" },
+		{ MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set
+	{ MP_TXPOWER , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_txpower"},
+		{ MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set
+	{ MP_ANT_TX , IW_PRIV_TYPE_CHAR | 1024,  IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_ant_tx"},
+		{ MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set
+	{ MP_ANT_RX , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_ant_rx"},
+		{ MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set
+	{ WRITE_REG , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "write_reg" },
+		{ MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set
+	{ WRITE_RF , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "write_rf" },
+		{ MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set
+	{ MP_CTX , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_ctx"},
+		{ MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set
+	{ MP_ARX , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_arx"},
+	{ MP_ANT_RX , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_ant_rx"},
+	{ MP_THER , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_ther"},
+	{ EFUSE_SET, IW_PRIV_TYPE_CHAR | 1024, 0, "efuse_set" },
+	{ EFUSE_GET, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "efuse_get" },
+	{ MP_PWRTRK , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_pwrtrk"},
+	{ MP_IOCTL, IW_PRIV_TYPE_CHAR | 1024, 0, "mp_ioctl"}, // mp_ioctl	
+		
+	
+	{ SIOCIWFIRSTPRIV + 0x02, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK , "test"},//set
+};
+
+
+static iw_handler rtw_private_handler[] = 
+{
+	rtw_mp_set,
+	rtw_mp_get,
+};
+
+
+#else // not inlucde MP
+
+static const struct iw_priv_args rtw_private_args[] = {
+	{
+		SIOCIWFIRSTPRIV + 0x0,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, 0, "rtw_write32"
+	},
+	{
+		SIOCIWFIRSTPRIV + 0x1,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | IFNAMSIZ, "rtw_read32"
+	},
+	{
+		SIOCIWFIRSTPRIV + 0x2, 0, 0, "driver_ext"
+	},
+	{
+		SIOCIWFIRSTPRIV + 0x3, 0, 0, "" // mp_ioctl
+	},
+	{
+		SIOCIWFIRSTPRIV + 0x4,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "apinfo"
+	},
+	{
+		SIOCIWFIRSTPRIV + 0x5,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, 0, "setpid"
+	},
+	{
+		SIOCIWFIRSTPRIV + 0x6,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "wps_start"
+	},
+//for PLATFORM_MT53XX	
+	{
+		SIOCIWFIRSTPRIV + 0x7,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "get_sensitivity"
+	},
+	{
+		SIOCIWFIRSTPRIV + 0x8,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "wps_prob_req_ie"
+	},
+	{
+		SIOCIWFIRSTPRIV + 0x9,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "wps_assoc_req_ie"
+	},
+
+//for RTK_DMP_PLATFORM	
+	{
+		SIOCIWFIRSTPRIV + 0xA,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "channel_plan"
+	},
+
+	{
+		SIOCIWFIRSTPRIV + 0xB,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, 0, "dbg"
+	},	
+	{
+		SIOCIWFIRSTPRIV + 0xC,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 3, 0, "rfw"
+	},
+	{
+		SIOCIWFIRSTPRIV + 0xD,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | IFNAMSIZ, "rfr"
+	},
+#if 0
+	{
+		SIOCIWFIRSTPRIV + 0xE,0,0, "wowlan_ctrl"
+	},
+#endif
+	{
+		SIOCIWFIRSTPRIV + 0x10,
+		IW_PRIV_TYPE_CHAR | P2P_PRIVATE_IOCTL_SET_LEN, 0, "p2p_set"
+	},
+	{
+		SIOCIWFIRSTPRIV + 0x11,
+		IW_PRIV_TYPE_CHAR | P2P_PRIVATE_IOCTL_SET_LEN, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | P2P_PRIVATE_IOCTL_SET_LEN , "p2p_get"
+	},
+	{
+		SIOCIWFIRSTPRIV + 0x12,
+		IW_PRIV_TYPE_CHAR | P2P_PRIVATE_IOCTL_SET_LEN, IW_PRIV_TYPE_CHAR | IFNAMSIZ , "p2p_get2"
+	},	
+#ifdef CONFIG_TDLS
+	{SIOCIWFIRSTPRIV + 0x13, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},
+	{
+		SIOCIWFIRSTPRIV + 0x14,
+		IW_PRIV_TYPE_CHAR  | 64, 0, "tdls"
+	},
+#endif
+	{
+		SIOCIWFIRSTPRIV + 0x16,
+		IW_PRIV_TYPE_CHAR | P2P_PRIVATE_IOCTL_SET_LEN, 0, "pm_set"
+	},
+
+	{SIOCIWFIRSTPRIV + 0x18, IW_PRIV_TYPE_CHAR | IFNAMSIZ , 0 , "rereg_nd_name"},
+
+	{SIOCIWFIRSTPRIV + 0x1A, IW_PRIV_TYPE_CHAR | 128, 0, "efuse_set"},
+	{SIOCIWFIRSTPRIV + 0x1B, IW_PRIV_TYPE_CHAR | 128, IW_PRIV_TYPE_CHAR |IW_PRIV_SIZE_FIXED |0x700 ,"efuse_get"},
+
+};
+
+static iw_handler rtw_private_handler[] = 
+{
+	rtw_wx_write32,					//0x00
+	rtw_wx_read32,					//0x01
+	rtw_drvext_hdl,					//0x02
+	rtw_mp_ioctl_hdl,				//0x03
+
+// for MM DTV platform
+	rtw_get_ap_info,					//0x04
+
+	rtw_set_pid,						//0x05
+	rtw_wps_start,					//0x06
+
+// for PLATFORM_MT53XX
+	rtw_wx_get_sensitivity,			//0x07
+	rtw_wx_set_mtk_wps_probe_ie,	//0x08
+	rtw_wx_set_mtk_wps_ie,			//0x09
+
+// for RTK_DMP_PLATFORM
+// Set Channel depend on the country code
+	rtw_wx_set_channel_plan,		//0x0A
+
+	rtw_dbg_port,					//0x0B
+	rtw_wx_write_rf,					//0x0C
+	rtw_wx_read_rf,					//0x0D
+
+#if 0
+	rtw_wowlan_ctrl,					//0x0E
+#else
+	rtw_wx_priv_null,				//0x0E
+#endif
+	rtw_wx_priv_null,				//0x0F
+
+	rtw_p2p_set,					//0x10
+	rtw_p2p_get,					//0x11
+	rtw_p2p_get2,					//0x12
+
+	NULL,							//0x13
+	rtw_tdls,						//0x14
+	rtw_wx_priv_null,				//0x15
+
+	rtw_pm_set,						//0x16
+	rtw_wx_priv_null,				//0x17
+	rtw_rereg_nd_name,				//0x18
+	rtw_wx_priv_null,				//0x19
+
+	rtw_mp_efuse_set,				//0x1A
+	rtw_mp_efuse_get,				//0x1B
+	// 0x1C is reserved for hostapd
+};
+
+#endif // #if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_MP_IWPRIV_SUPPORT)
+
+#if WIRELESS_EXT >= 17	
+static struct iw_statistics *rtw_get_wireless_stats(struct net_device *dev)
+{
+       _adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	   struct iw_statistics *piwstats=&padapter->iwstats;
+	int tmp_level = 0;
+	int tmp_qual = 0;
+	int tmp_noise = 0;
+
+	if (check_fwstate(&padapter->mlmepriv, _FW_LINKED) != _TRUE)
+	{
+		piwstats->qual.qual = 0;
+		piwstats->qual.level = 0;
+		piwstats->qual.noise = 0;
+		//DBG_8192C("No link  level:%d, qual:%d, noise:%d\n", tmp_level, tmp_qual, tmp_noise);
+	}
+	else{
+		#ifdef CONFIG_SIGNAL_DISPLAY_DBM
+		tmp_level = translate_percentage_to_dbm(padapter->recvpriv.signal_strength); 
+		#else
+		tmp_level = padapter->recvpriv.signal_strength;
+		#endif
+		
+		tmp_qual = padapter->recvpriv.signal_qual;
+		tmp_noise =padapter->recvpriv.noise;		
+		//DBG_8192C("level:%d, qual:%d, noise:%d, rssi (%d)\n", tmp_level, tmp_qual, tmp_noise,padapter->recvpriv.rssi);
+
+		piwstats->qual.level = tmp_level;
+		piwstats->qual.qual = tmp_qual;
+		piwstats->qual.noise = tmp_noise;
+	}
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,14))
+	piwstats->qual.updated = IW_QUAL_ALL_UPDATED ;//|IW_QUAL_DBM;
+#else
+#ifdef RTK_DMP_PLATFORM
+	//IW_QUAL_DBM= 0x8, if driver use this flag, wireless extension will show value of dbm.
+	//remove this flag for show percentage 0~100
+	piwstats->qual.updated = 0x07;
+#else
+	piwstats->qual.updated = 0x0f;
+#endif
+#endif
+
+	#ifdef CONFIG_SIGNAL_DISPLAY_DBM
+	piwstats->qual.updated = piwstats->qual.updated | IW_QUAL_DBM;
+	#endif
+
+	return &padapter->iwstats;
+}
+#endif
+
+struct iw_handler_def rtw_handlers_def =
+{
+	.standard = rtw_handlers,
+	.num_standard = sizeof(rtw_handlers) / sizeof(iw_handler),
+	.private = rtw_private_handler,
+	.private_args = (struct iw_priv_args *)rtw_private_args,
+	.num_private = sizeof(rtw_private_handler) / sizeof(iw_handler),
+ 	.num_private_args = sizeof(rtw_private_args) / sizeof(struct iw_priv_args),
+#if WIRELESS_EXT >= 17
+	.get_wireless_stats = rtw_get_wireless_stats,
+#endif
+};
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/os_dep/linux/mlme_linux.c linux-3.0.82x/drivers/net/wireless/rtl8188/os_dep/linux/mlme_linux.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/os_dep/linux/mlme_linux.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/os_dep/linux/mlme_linux.c	2017-09-23 03:42:50.074674893 +0800
@@ -0,0 +1,784 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+
+#define _MLME_OSDEP_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <mlme_osdep.h>
+
+
+#ifdef RTK_DMP_PLATFORM
+void Linkup_workitem_callback(struct work_struct *work)
+{
+	struct mlme_priv *pmlmepriv = container_of(work, struct mlme_priv, Linkup_workitem);
+	_adapter *padapter = container_of(pmlmepriv, _adapter, mlmepriv);
+
+_func_enter_;
+
+	RT_TRACE(_module_mlme_osdep_c_,_drv_info_,("+ Linkup_workitem_callback\n"));
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12))
+	kobject_uevent(&padapter->pnetdev->dev.kobj, KOBJ_LINKUP);
+#else
+	kobject_hotplug(&padapter->pnetdev->class_dev.kobj, KOBJ_LINKUP);
+#endif
+
+_func_exit_;
+}
+
+void Linkdown_workitem_callback(struct work_struct *work)
+{
+	struct mlme_priv *pmlmepriv = container_of(work, struct mlme_priv, Linkdown_workitem);
+	_adapter *padapter = container_of(pmlmepriv, _adapter, mlmepriv);
+
+_func_enter_;
+
+	RT_TRACE(_module_mlme_osdep_c_,_drv_info_,("+ Linkdown_workitem_callback\n"));
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12))
+	kobject_uevent(&padapter->pnetdev->dev.kobj, KOBJ_LINKDOWN);
+#else
+	kobject_hotplug(&padapter->pnetdev->class_dev.kobj, KOBJ_LINKDOWN);
+#endif
+
+_func_exit_;
+}
+#endif
+
+
+/*
+void sitesurvey_ctrl_handler(void *FunctionContext)
+{
+	_adapter *adapter = (_adapter *)FunctionContext;
+
+	_sitesurvey_ctrl_handler(adapter);
+
+	_set_timer(&adapter->mlmepriv.sitesurveyctrl.sitesurvey_ctrl_timer, 3000);
+}
+*/
+
+void rtw_join_timeout_handler (void *FunctionContext)
+{
+	_adapter *adapter = (_adapter *)FunctionContext;
+	_rtw_join_timeout_handler(adapter);
+}
+
+
+void _rtw_scan_timeout_handler (void *FunctionContext)
+{
+	_adapter *adapter = (_adapter *)FunctionContext;
+	rtw_scan_timeout_handler(adapter);
+}
+
+
+void _dynamic_check_timer_handlder (void *FunctionContext)
+{
+	_adapter *adapter = (_adapter *)FunctionContext;
+		 
+	rtw_dynamic_check_timer_handlder(adapter);
+	
+	_set_timer(&adapter->mlmepriv.dynamic_chk_timer, 2000);
+}
+
+#ifdef CONFIG_SET_SCAN_DENY_TIMER
+void _rtw_set_scan_deny_timer_hdl(void *FunctionContext)
+{
+	_adapter *adapter = (_adapter *)FunctionContext;	 
+	rtw_set_scan_deny_timer_hdl(adapter);
+}
+#endif
+
+
+void rtw_init_mlme_timer(_adapter *padapter)
+{
+	struct	mlme_priv *pmlmepriv = &padapter->mlmepriv;
+
+	_init_timer(&(pmlmepriv->assoc_timer), padapter->pnetdev, rtw_join_timeout_handler, padapter);
+	//_init_timer(&(pmlmepriv->sitesurveyctrl.sitesurvey_ctrl_timer), padapter->pnetdev, sitesurvey_ctrl_handler, padapter);
+	_init_timer(&(pmlmepriv->scan_to_timer), padapter->pnetdev, _rtw_scan_timeout_handler, padapter);
+
+	_init_timer(&(pmlmepriv->dynamic_chk_timer), padapter->pnetdev, _dynamic_check_timer_handlder, padapter);
+
+	#ifdef CONFIG_SET_SCAN_DENY_TIMER
+	_init_timer(&(pmlmepriv->set_scan_deny_timer), padapter->pnetdev, _rtw_set_scan_deny_timer_hdl, padapter);
+	#endif
+
+#ifdef RTK_DMP_PLATFORM
+	_init_workitem(&(pmlmepriv->Linkup_workitem), Linkup_workitem_callback, padapter);
+	_init_workitem(&(pmlmepriv->Linkdown_workitem), Linkdown_workitem_callback, padapter);
+#endif
+
+}
+
+extern void rtw_indicate_wx_assoc_event(_adapter *padapter);
+extern void rtw_indicate_wx_disassoc_event(_adapter *padapter);
+
+void rtw_os_indicate_connect(_adapter *adapter)
+{
+
+_func_enter_;	
+
+	rtw_indicate_wx_assoc_event(adapter);
+	netif_carrier_on(adapter->pnetdev);
+
+	if(adapter->pid[2] !=0)
+		rtw_signal_process(adapter->pid[2], SIGALRM);
+
+#ifdef RTK_DMP_PLATFORM
+	_set_workitem(&adapter->mlmepriv.Linkup_workitem);
+#endif
+
+_func_exit_;	
+
+}
+
+static RT_PMKID_LIST   backupPMKIDList[ NUM_PMKID_CACHE ];
+void rtw_reset_securitypriv( _adapter *adapter )
+{
+	u8	backupPMKIDIndex = 0;
+	u8	backupTKIPCountermeasure = 0x00;
+	u32	backupTKIPcountermeasure_time = 0;
+
+	if(adapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X)//802.1x
+	{		 
+		// Added by Albert 2009/02/18
+		// We have to backup the PMK information for WiFi PMK Caching test item.
+		//
+		// Backup the btkip_countermeasure information.
+		// When the countermeasure is trigger, the driver have to disconnect with AP for 60 seconds.
+
+		_rtw_memset( &backupPMKIDList[ 0 ], 0x00, sizeof( RT_PMKID_LIST ) * NUM_PMKID_CACHE );
+
+		_rtw_memcpy( &backupPMKIDList[ 0 ], &adapter->securitypriv.PMKIDList[ 0 ], sizeof( RT_PMKID_LIST ) * NUM_PMKID_CACHE );
+		backupPMKIDIndex = adapter->securitypriv.PMKIDIndex;
+		backupTKIPCountermeasure = adapter->securitypriv.btkip_countermeasure;
+		backupTKIPcountermeasure_time = adapter->securitypriv.btkip_countermeasure_time;
+
+		_rtw_memset((unsigned char *)&adapter->securitypriv, 0, sizeof (struct security_priv));
+		//_init_timer(&(adapter->securitypriv.tkip_timer),adapter->pnetdev, rtw_use_tkipkey_handler, adapter);
+
+		// Added by Albert 2009/02/18
+		// Restore the PMK information to securitypriv structure for the following connection.
+		_rtw_memcpy( &adapter->securitypriv.PMKIDList[ 0 ], &backupPMKIDList[ 0 ], sizeof( RT_PMKID_LIST ) * NUM_PMKID_CACHE );
+		adapter->securitypriv.PMKIDIndex = backupPMKIDIndex;
+		adapter->securitypriv.btkip_countermeasure = backupTKIPCountermeasure;
+		adapter->securitypriv.btkip_countermeasure_time = backupTKIPcountermeasure_time;
+
+		adapter->securitypriv.ndisauthtype = Ndis802_11AuthModeOpen;
+		adapter->securitypriv.ndisencryptstatus = Ndis802_11WEPDisabled;
+
+	}
+	else //reset values in securitypriv 
+	{
+		//if(adapter->mlmepriv.fw_state & WIFI_STATION_STATE)
+		//{
+		struct security_priv *psec_priv=&adapter->securitypriv;
+
+		psec_priv->dot11AuthAlgrthm =dot11AuthAlgrthm_Open;  //open system
+		psec_priv->dot11PrivacyAlgrthm = _NO_PRIVACY_;
+		psec_priv->dot11PrivacyKeyIndex = 0;
+
+		psec_priv->dot118021XGrpPrivacy = _NO_PRIVACY_;
+		psec_priv->dot118021XGrpKeyid = 1;
+
+		psec_priv->ndisauthtype = Ndis802_11AuthModeOpen;
+		psec_priv->ndisencryptstatus = Ndis802_11WEPDisabled;
+		psec_priv->wps_phase = _FALSE;
+		//}
+	}
+}
+
+void rtw_os_indicate_disconnect( _adapter *adapter )
+{
+   //RT_PMKID_LIST   backupPMKIDList[ NUM_PMKID_CACHE ];
+  
+_func_enter_;
+
+	rtw_indicate_wx_disassoc_event(adapter);	
+	netif_carrier_off(adapter->pnetdev);
+
+#ifdef RTK_DMP_PLATFORM
+	_set_workitem(&adapter->mlmepriv.Linkdown_workitem);
+#endif
+	 rtw_reset_securitypriv( adapter );
+
+_func_exit_;
+
+}
+
+void rtw_report_sec_ie(_adapter *adapter,u8 authmode,u8 *sec_ie)
+{
+	uint	len;
+	u8	*buff,*p,i;
+	union iwreq_data wrqu;
+
+_func_enter_;
+
+	RT_TRACE(_module_mlme_osdep_c_,_drv_info_,("+rtw_report_sec_ie, authmode=%d\n", authmode));
+
+	buff = NULL;
+	if(authmode==_WPA_IE_ID_)
+	{
+		RT_TRACE(_module_mlme_osdep_c_,_drv_info_,("rtw_report_sec_ie, authmode=%d\n", authmode));
+		
+		buff = rtw_malloc(IW_CUSTOM_MAX);
+		
+		_rtw_memset(buff,0,IW_CUSTOM_MAX);
+		
+		p=buff;
+		
+		p+=sprintf(p,"ASSOCINFO(ReqIEs=");
+
+		len = sec_ie[1]+2;
+		len =  (len < IW_CUSTOM_MAX) ? len:IW_CUSTOM_MAX;
+			
+		for(i=0;i<len;i++){
+			p+=sprintf(p,"%02x",sec_ie[i]);
+		}
+
+		p+=sprintf(p,")");
+		
+		_rtw_memset(&wrqu,0,sizeof(wrqu));
+		
+		wrqu.data.length=p-buff;
+		
+		wrqu.data.length = (wrqu.data.length<IW_CUSTOM_MAX) ? wrqu.data.length:IW_CUSTOM_MAX;
+		
+		wireless_send_event(adapter->pnetdev,IWEVCUSTOM,&wrqu,buff);
+
+		if(buff)
+		    rtw_mfree(buff, IW_CUSTOM_MAX);
+		
+	}
+
+_func_exit_;
+
+}
+
+void _survey_timer_hdl (void *FunctionContext)
+{
+	_adapter *padapter = (_adapter *)FunctionContext;
+	
+	survey_timer_hdl(padapter);
+}
+
+void _link_timer_hdl (void *FunctionContext)
+{
+	_adapter *padapter = (_adapter *)FunctionContext;
+	link_timer_hdl(padapter);
+}
+
+void _addba_timer_hdl(void *FunctionContext)
+{
+	struct sta_info *psta = (struct sta_info *)FunctionContext;
+	addba_timer_hdl(psta);
+}
+
+void init_addba_retry_timer(_adapter *padapter, struct sta_info *psta)
+{
+
+	_init_timer(&psta->addba_retry_timer, padapter->pnetdev, _addba_timer_hdl, psta);
+}
+
+#ifdef CONFIG_TDLS
+void TDLS_restore_workitem_callback(struct work_struct *work)
+{
+	struct mlme_ext_priv*pmlmeext = container_of(work, struct mlme_ext_priv, TDLS_restore_workitem);
+	_adapter *padapter = pmlmeext->padapter;
+	u32 bit_6=1<<6;
+	
+	rtw_write32(padapter, 0x0608, rtw_read32(padapter, 0x0608)|(bit_6));
+	DBG_8192C("wirte 0x0608, set bit6 on\n");
+}
+
+
+void _TPK_timer_hdl(void *FunctionContext)
+{
+	struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext;
+
+	ptdls_sta->TPK_count++;
+	//TPK_timer set 1000 as default
+	//retry timer should set at least 301 sec.
+	if(ptdls_sta->TPK_count==TPK_RESEND_COUNT){
+		ptdls_sta->TPK_count=0;
+		issue_tdls_setup_req(ptdls_sta->padapter, ptdls_sta->hwaddr);
+	}
+	
+	_set_timer(&ptdls_sta->TPK_timer, ptdls_sta->TDLS_PeerKey_Lifetime/TPK_RESEND_COUNT);
+}
+
+void init_TPK_timer(_adapter *padapter, struct sta_info *psta)
+{
+	psta->padapter=padapter;
+
+	_init_timer(&psta->TPK_timer, padapter->pnetdev, _TPK_timer_hdl, psta);
+}
+
+// 1: write RCR DATA BIT
+// 2: issue peer traffic indication
+// 3: go back to the channel linked with AP, terminating channel switch procedure
+// 4: init channel sensing, receive all data and mgnt frame
+// 5: channel sensing and report candidate channel
+// 6: first time set channel to off channel
+// 7: go back tp the channel linked with AP when set base channel as target channel
+void TDLS_option_workitem_callback(struct work_struct *work)
+{
+	struct sta_info *ptdls_sta = container_of(work, struct sta_info, option_workitem);
+	_adapter *padapter = ptdls_sta->padapter;
+	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
+	u32 bit_6=1<<6, bit_7=1<<7, bit_4=1<<4;
+	u8 survey_channel, i, min;
+	
+	switch(ptdls_sta->option){
+		case 1:
+			//As long as TDLS handshake success, we should set RCR_CBSSID_DATA bit to 0
+			//such we can receive all kinds of data frames.
+			rtw_write32(padapter, 0x0608, rtw_read32(padapter, 0x0608)&(~bit_6));
+			DBG_8192C("wirte 0x0608, set bit6 off\n");
+			break;
+		case 2:
+			issue_tdls_peer_traffic_indication(padapter, ptdls_sta);
+			break;
+		case 3:
+			_cancel_timer_ex(&ptdls_sta->base_ch_timer);
+			_cancel_timer_ex(&ptdls_sta->off_ch_timer);
+			SelectChannel(padapter, pmlmeext->cur_channel);
+			ptdls_sta->state &= ~(TDLS_CH_SWITCH_ON_STATE | 
+								TDLS_PEER_AT_OFF_STATE | 
+								TDLS_AT_OFF_CH_STATE);
+			DBG_8192C("go back to base channel\n ");
+			issue_nulldata(padapter, 0);
+			break;
+		case 4:
+			rtw_write32(padapter, 0x0608, rtw_read32(padapter, 0x0608)&(~bit_6)&(~bit_7));
+			rtw_write16(padapter, 0x06A4,0xffff);	//maybe don't need to write here
+
+			//disable update TSF
+			rtw_write8(padapter, 0x0550, rtw_read8(padapter, 0x0550)|bit_4);
+
+			pmlmeext->sitesurvey_res.channel_idx = 0;
+			ptdls_sta->option = 5;
+			_set_workitem(&ptdls_sta->option_workitem);
+			break;
+		case 5:
+			survey_channel = pmlmeext->channel_set[pmlmeext->sitesurvey_res.channel_idx].ChannelNum;
+			if(survey_channel){
+				SelectChannel(padapter, survey_channel);
+				pmlmeinfo->tdls_cur_channel = survey_channel;
+				pmlmeext->sitesurvey_res.channel_idx++;
+				_set_timer(&ptdls_sta->option_timer, SURVEY_TO);
+			}else{
+				SelectChannel(padapter, pmlmeext->cur_channel);
+
+				//enable update TSF
+				rtw_write8(padapter, 0x0550, rtw_read8(padapter, 0x0550)&(~bit_4));
+				rtw_write32(padapter, 0x0608, rtw_read32(padapter, 0x0608)|(bit_7));
+
+				if(pmlmeinfo->tdls_ch_sensing==1){
+					pmlmeinfo->tdls_ch_sensing=0;
+					pmlmeinfo->tdls_cur_channel=1;
+					min=pmlmeinfo->tdls_collect_pkt_num[0];
+					for(i=1; i<14-1; i++){
+						if(min > pmlmeinfo->tdls_collect_pkt_num[i]){
+							pmlmeinfo->tdls_cur_channel=i+1;
+							min=pmlmeinfo->tdls_collect_pkt_num[i];
+						}
+						pmlmeinfo->tdls_collect_pkt_num[i]=0;
+					}
+					pmlmeinfo->tdls_collect_pkt_num[0]=0;
+					pmlmeinfo->tdls_candidate_ch=pmlmeinfo->tdls_cur_channel;
+					DBG_8192C("TDLS channel sensing done, candidate channel: %02x\n", pmlmeinfo->tdls_candidate_ch);
+					pmlmeinfo->tdls_cur_channel=0;
+
+				}
+
+				if(ptdls_sta->state & TDLS_PEER_SLEEP_STATE){
+					ptdls_sta->state |= TDLS_APSD_CHSW_STATE;
+				}else{
+					//send null data with pwrbit==1 before send ch_switching_req to peer STA.
+					issue_nulldata(padapter, 1);
+
+					ptdls_sta->state |= TDLS_CH_SW_INITIATOR_STATE;
+
+					issue_tdls_ch_switch_req(padapter, ptdls_sta->hwaddr);
+					DBG_8192C("issue tdls ch switch req\n");
+				}
+			}
+			break;
+		case 6:
+			issue_nulldata(padapter, 1);
+			SelectChannel(padapter, ptdls_sta->off_ch);
+
+			DBG_8192C("change channel to tar ch:%02x\n", ptdls_sta->off_ch);
+			ptdls_sta->state |= TDLS_AT_OFF_CH_STATE;
+			ptdls_sta->state &= ~(TDLS_PEER_AT_OFF_STATE);
+			_set_timer(&ptdls_sta->option_timer, (u32)ptdls_sta->ch_switch_time);
+			break;
+		case 7:
+			_cancel_timer_ex(&ptdls_sta->base_ch_timer);
+			_cancel_timer_ex(&ptdls_sta->off_ch_timer);
+			SelectChannel(padapter, pmlmeext->cur_channel);
+			ptdls_sta->state &= ~(TDLS_CH_SWITCH_ON_STATE | 
+								TDLS_PEER_AT_OFF_STATE | 
+								TDLS_AT_OFF_CH_STATE);
+			DBG_8192C("go back to base channel\n ");
+			issue_nulldata(padapter, 0);
+			_set_timer(&ptdls_sta->option_timer, (u32)ptdls_sta->ch_switch_time);
+			break;			
+	}
+	
+}
+
+// 5: channel sensing and report candidate channel
+// 6: first time set channel to off channel
+// 7: whab go back tp the channel linked with AP, send null data to peer STA as an indication
+void _ch_switch_timer_hdl(void *FunctionContext)
+{
+	struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext;
+
+	if(ptdls_sta->option==5){
+		_set_workitem(&ptdls_sta->option_workitem);
+	}else if(ptdls_sta->option==6){
+		issue_nulldata_to_TDLS_peer_STA(ptdls_sta->padapter, ptdls_sta, 0);
+		_set_timer(&ptdls_sta->base_ch_timer, 500);
+	}else if(ptdls_sta->option==7){
+		issue_nulldata_to_TDLS_peer_STA(ptdls_sta->padapter, ptdls_sta, 0);
+	}
+}
+
+void init_ch_switch_timer(_adapter *padapter, struct sta_info *psta)
+{
+	psta->padapter=padapter;
+	_init_timer(&psta->option_timer, padapter->pnetdev, _ch_switch_timer_hdl, psta);
+}
+
+//Set channel back to base channel
+void base_channel_workitem_callback(struct work_struct *work)
+{
+	struct sta_info *ptdls_sta = container_of(work, struct sta_info, base_ch_workitem);
+	_adapter *padapter = ptdls_sta->padapter;
+	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+	
+	SelectChannel(ptdls_sta->padapter, pmlmeext->cur_channel);
+	issue_nulldata(ptdls_sta->padapter, 0);
+
+	DBG_8192C("change channel to base ch:%02x\n", pmlmeext->cur_channel);
+
+	ptdls_sta->state &= ~(TDLS_PEER_AT_OFF_STATE| TDLS_AT_OFF_CH_STATE);
+
+	_set_timer(&ptdls_sta->off_ch_timer, 500);	
+
+}
+
+void _base_ch_timer_hdl(void *FunctionContext)
+{
+	struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext;
+	_set_workitem(&ptdls_sta->base_ch_workitem);
+}
+
+void init_base_ch_timer(_adapter *padapter, struct sta_info *psta)
+{
+	psta->padapter=padapter;
+	_init_timer(&psta->base_ch_timer, padapter->pnetdev, _base_ch_timer_hdl, psta);
+}
+
+//Set channel back to off channel
+void off_channel_workitem_callback(struct work_struct *work)
+{
+	struct sta_info *ptdls_sta = container_of(work, struct sta_info, off_ch_workitem);
+	_adapter *padapter = ptdls_sta->padapter;
+	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+	
+	issue_nulldata(ptdls_sta->padapter, 1);
+
+	SelectChannel(ptdls_sta->padapter, ptdls_sta->off_ch);
+
+	DBG_8192C("change channel to off ch:%02x\n", ptdls_sta->off_ch);
+	ptdls_sta->state |= TDLS_AT_OFF_CH_STATE;
+
+	if((ptdls_sta->state & TDLS_PEER_AT_OFF_STATE) != TDLS_PEER_AT_OFF_STATE){
+		issue_nulldata_to_TDLS_peer_STA(ptdls_sta->padapter, ptdls_sta, 0);
+	}
+
+	_set_timer(&ptdls_sta->base_ch_timer, 500);	
+}
+
+void _off_ch_timer_hdl(void *FunctionContext)
+{
+	struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext;
+	_set_workitem(&ptdls_sta->off_ch_workitem);
+}
+
+void init_off_ch_timer(_adapter *padapter, struct sta_info *psta)
+{
+	psta->padapter=padapter;
+	_init_timer(&psta->off_ch_timer, padapter->pnetdev, _off_ch_timer_hdl, psta);
+}
+#endif
+
+/*
+void _reauth_timer_hdl(void *FunctionContext)
+{
+	_adapter *padapter = (_adapter *)FunctionContext;
+	reauth_timer_hdl(padapter);
+}
+
+void _reassoc_timer_hdl(void *FunctionContext)
+{
+	_adapter *padapter = (_adapter *)FunctionContext;
+	reassoc_timer_hdl(padapter);
+}
+*/
+
+void init_mlme_ext_timer(_adapter *padapter)
+{	
+	struct	mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+
+	_init_timer(&pmlmeext->survey_timer, padapter->pnetdev, _survey_timer_hdl, padapter);
+	_init_timer(&pmlmeext->link_timer, padapter->pnetdev, _link_timer_hdl, padapter);
+	//_init_timer(&pmlmeext->ADDBA_timer, padapter->pnetdev, _addba_timer_hdl, padapter);
+
+	//_init_timer(&pmlmeext->reauth_timer, padapter->pnetdev, _reauth_timer_hdl, padapter);
+	//_init_timer(&pmlmeext->reassoc_timer, padapter->pnetdev, _reassoc_timer_hdl, padapter);
+}
+
+#ifdef CONFIG_AP_MODE
+
+void rtw_indicate_sta_assoc_event(_adapter *padapter, struct sta_info *psta)
+{
+	union iwreq_data wrqu;
+	struct sta_priv *pstapriv = &padapter->stapriv;
+
+	if(psta==NULL)
+		return;
+
+	if(psta->aid > NUM_STA)
+		return;
+
+	if(pstapriv->sta_aid[psta->aid - 1] != psta)
+		return;
+	
+	
+	wrqu.addr.sa_family = ARPHRD_ETHER;	
+	
+	_rtw_memcpy(wrqu.addr.sa_data, psta->hwaddr, ETH_ALEN);
+
+	DBG_871X("+rtw_indicate_sta_assoc_event\n");
+	
+	wireless_send_event(padapter->pnetdev, IWEVREGISTERED, &wrqu, NULL);
+
+}
+
+void rtw_indicate_sta_disassoc_event(_adapter *padapter, struct sta_info *psta)
+{
+	union iwreq_data wrqu;
+	struct sta_priv *pstapriv = &padapter->stapriv;
+
+	if(psta==NULL)
+		return;
+
+	if(psta->aid > NUM_STA)
+		return;
+
+	if(pstapriv->sta_aid[psta->aid - 1] != psta)
+		return;
+	
+	
+	wrqu.addr.sa_family = ARPHRD_ETHER;	
+	
+	_rtw_memcpy(wrqu.addr.sa_data, psta->hwaddr, ETH_ALEN);
+
+	DBG_871X("+rtw_indicate_sta_disassoc_event\n");
+	
+	wireless_send_event(padapter->pnetdev, IWEVEXPIRED, &wrqu, NULL);
+	
+}
+
+
+#ifdef CONFIG_HOSTAPD_MLME
+
+static int mgnt_xmit_entry(struct sk_buff *skb, struct net_device *pnetdev)
+{
+	struct hostapd_priv *phostapdpriv = rtw_netdev_priv(pnetdev);
+	_adapter *padapter = (_adapter *)phostapdpriv->padapter;
+
+	//DBG_8192C("%s\n", __FUNCTION__);
+
+	return padapter->HalFunc.hostap_mgnt_xmit_entry(padapter, skb);
+}
+
+static int mgnt_netdev_open(struct net_device *pnetdev)
+{
+	struct hostapd_priv *phostapdpriv = rtw_netdev_priv(pnetdev);
+
+	DBG_8192C("mgnt_netdev_open: MAC Address:" MAC_FMT "\n", MAC_ARG(pnetdev->dev_addr));
+
+
+	init_usb_anchor(&phostapdpriv->anchored);
+	
+ 	if(!netif_queue_stopped(pnetdev))
+      		netif_start_queue(pnetdev);
+	else
+		netif_wake_queue(pnetdev);
+
+
+	netif_carrier_on(pnetdev);
+		
+	//rtw_write16(phostapdpriv->padapter, 0x0116, 0x0100);//only excluding beacon 
+		
+	return 0;	
+}
+static int mgnt_netdev_close(struct net_device *pnetdev)
+{
+	struct hostapd_priv *phostapdpriv = rtw_netdev_priv(pnetdev);
+
+	DBG_8192C("%s\n", __FUNCTION__);
+
+	usb_kill_anchored_urbs(&phostapdpriv->anchored);
+
+	netif_carrier_off(pnetdev);
+
+	if (!netif_queue_stopped(pnetdev))
+		netif_stop_queue(pnetdev);
+	
+	//rtw_write16(phostapdpriv->padapter, 0x0116, 0x3f3f);
+	
+	return 0;	
+}
+
+#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29))
+static const struct net_device_ops rtl871x_mgnt_netdev_ops = {
+	.ndo_open = mgnt_netdev_open,
+       .ndo_stop = mgnt_netdev_close,
+       .ndo_start_xmit = mgnt_xmit_entry,
+       //.ndo_set_mac_address = r871x_net_set_mac_address,
+       //.ndo_get_stats = r871x_net_get_stats,
+       //.ndo_do_ioctl = r871x_mp_ioctl,
+};
+#endif
+
+int hostapd_mode_init(_adapter *padapter)
+{
+	unsigned char mac[ETH_ALEN];
+	struct hostapd_priv *phostapdpriv;
+	struct net_device *pnetdev;
+	
+	pnetdev = rtw_alloc_etherdev(sizeof(struct hostapd_priv));	
+	if (!pnetdev)
+	   return -ENOMEM;
+
+	//SET_MODULE_OWNER(pnetdev);
+       ether_setup(pnetdev);
+
+	//pnetdev->type = ARPHRD_IEEE80211;
+	
+	phostapdpriv = rtw_netdev_priv(pnetdev);
+	phostapdpriv->pmgnt_netdev = pnetdev;
+	phostapdpriv->padapter= padapter;
+	padapter->phostapdpriv = phostapdpriv;
+	
+	//pnetdev->init = NULL;
+	
+#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29))
+
+	DBG_8192C("register rtl871x_mgnt_netdev_ops to netdev_ops\n");
+
+	pnetdev->netdev_ops = &rtl871x_mgnt_netdev_ops;
+	
+#else
+
+	pnetdev->open = mgnt_netdev_open;
+
+	pnetdev->stop = mgnt_netdev_close;	
+	
+	pnetdev->hard_start_xmit = mgnt_xmit_entry;
+	
+	//pnetdev->set_mac_address = r871x_net_set_mac_address;
+	
+	//pnetdev->get_stats = r871x_net_get_stats;
+
+	//pnetdev->do_ioctl = r871x_mp_ioctl;
+	
+#endif
+
+	pnetdev->watchdog_timeo = HZ; /* 1 second timeout */	
+
+	//pnetdev->wireless_handlers = NULL;
+
+#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
+	pnetdev->features |= NETIF_F_IP_CSUM;
+#endif	
+
+	
+	
+	if(dev_alloc_name(pnetdev,"mgnt.wlan%d") < 0)
+	{
+		DBG_8192C("hostapd_mode_init(): dev_alloc_name, fail! \n");		
+	}
+
+
+	//SET_NETDEV_DEV(pnetdev, pintfpriv->udev);
+
+
+	mac[0]=0x00;
+	mac[1]=0xe0;
+	mac[2]=0x4c;
+	mac[3]=0x87;
+	mac[4]=0x11;
+	mac[5]=0x12;
+				
+	_rtw_memcpy(pnetdev->dev_addr, mac, ETH_ALEN);
+	
+
+	netif_carrier_off(pnetdev);
+
+
+	/* Tell the network stack we exist */
+	if (register_netdev(pnetdev) != 0)
+	{
+		DBG_8192C("hostapd_mode_init(): register_netdev fail!\n");
+		
+		if(pnetdev)
+      		{	 
+			rtw_free_netdev(pnetdev);
+      		}
+	}
+	
+	return 0;
+	
+}
+
+void hostapd_mode_unload(_adapter *padapter)
+{
+	struct hostapd_priv *phostapdpriv = padapter->phostapdpriv;
+	struct net_device *pnetdev = phostapdpriv->pmgnt_netdev;
+
+	unregister_netdev(pnetdev);
+	rtw_free_netdev(pnetdev);
+	
+}
+
+#endif
+#endif
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/os_dep/linux/os_intfs.c linux-3.0.82x/drivers/net/wireless/rtl8188/os_dep/linux/os_intfs.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/os_dep/linux/os_intfs.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/os_dep/linux/os_intfs.c	2017-09-23 03:42:50.074674893 +0800
@@ -0,0 +1,1450 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _OS_INTFS_C_
+
+#include <drv_conf.h>
+
+#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
+
+#error "Shall be Linux or Windows, but not both!\n"
+
+#endif
+
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <xmit_osdep.h>
+#include <recv_osdep.h>
+#include <hal_init.h>
+#include <rtw_ioctl.h>
+#include <rtw_version.h>
+
+#ifdef CONFIG_SDIO_HCI
+#include <sdio_osintf.h>
+#endif
+
+#ifdef CONFIG_USB_HCI
+#include <usb_osintf.h>
+#endif
+
+#ifdef CONFIG_PCI_HCI
+#include <pci_osintf.h>
+#endif
+
+#ifdef CONFIG_BR_EXT
+#include <rtw_br_ext.h>
+#endif //CONFIG_BR_EXT
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Realtek Wireless Lan Driver");
+MODULE_AUTHOR("Realtek Semiconductor Corp.");
+MODULE_VERSION(DRIVERVERSION);
+
+/* module param defaults */
+int rtw_chip_version = 0x00;
+int rtw_rfintfs = HWPI;
+int rtw_lbkmode = 0;//RTL8712_AIR_TRX;
+
+
+int rtw_network_mode = Ndis802_11IBSS;//Ndis802_11Infrastructure;//infra, ad-hoc, auto	  
+//NDIS_802_11_SSID	ssid;
+int rtw_channel = 1;//ad-hoc support requirement 
+int rtw_wireless_mode = WIRELESS_11BG_24N;
+int rtw_vrtl_carrier_sense = AUTO_VCS;
+int rtw_vcs_type = RTS_CTS;//*
+int rtw_rts_thresh = 2347;//*
+int rtw_frag_thresh = 2346;//*
+int rtw_preamble = PREAMBLE_LONG;//long, short, auto
+int rtw_scan_mode = 1;//active, passive
+int rtw_adhoc_tx_pwr = 1;
+int rtw_soft_ap = 0;
+//int smart_ps = 1;  
+#ifdef CONFIG_POWER_SAVING
+int rtw_power_mgnt = 1;
+#else
+int rtw_power_mgnt = PS_MODE_ACTIVE;
+#endif	
+
+#ifdef CONFIG_IPS_LEVEL_2
+int rtw_ips_mode = IPS_LEVEL_2;
+#else
+int rtw_ips_mode = IPS_NORMAL;
+#endif
+module_param(rtw_ips_mode, int, 0644);
+MODULE_PARM_DESC(rtw_ips_mode,"The default IPS mode");
+
+int rtw_radio_enable = 1;
+int rtw_long_retry_lmt = 7;
+int rtw_short_retry_lmt = 7;
+int rtw_busy_thresh = 40;
+//int qos_enable = 0; //*
+int rtw_ack_policy = NORMAL_ACK;
+#ifdef CONFIG_MP_INCLUDED
+int rtw_mp_mode = 1;
+#else
+int rtw_mp_mode = 0;
+#endif
+int rtw_software_encrypt = 0;
+int rtw_software_decrypt = 0;	  
+ 
+int rtw_wmm_enable = 1;// default is set to enable the wmm.
+int rtw_uapsd_enable = 0;	  
+int rtw_uapsd_max_sp = NO_LIMIT;
+int rtw_uapsd_acbk_en = 0;
+int rtw_uapsd_acbe_en = 0;
+int rtw_uapsd_acvi_en = 0;
+int rtw_uapsd_acvo_en = 0;
+	
+#ifdef CONFIG_80211N_HT
+int rtw_ht_enable = 1;
+int rtw_cbw40_enable = 1;
+int rtw_ampdu_enable = 1;//for enable tx_ampdu
+int rtw_rx_stbc = 1;// 0: disable, bit(0):enable 2.4g, bit(1):enable 5g, default is set to enable 2.4GHZ for IOT issue with bufflao's AP at 5GHZ
+int rtw_ampdu_amsdu = 0;// 0: disabled, 1:enabled, 2:auto
+#endif
+
+int rtw_lowrate_two_xmit = 1;//Use 2 path Tx to transmit MCS0~7 and legacy mode
+
+//int rf_config = RF_1T2R;  // 1T2R	
+int rtw_rf_config = RF_819X_MAX_TYPE;  //auto
+int rtw_low_power = 0;
+#ifdef CONFIG_WIFI_TEST
+int rtw_wifi_spec = 1;//for wifi test
+#else
+int rtw_wifi_spec = 0;
+#endif
+int rtw_channel_plan = RT_CHANNEL_DOMAIN_MAX;
+
+#ifdef CONFIG_BT_COEXIST
+int rtw_bt_iso = 2;// 0:Low, 1:High, 2:From Efuse
+int rtw_bt_sco = 3;// 0:Idle, 1:None-SCO, 2:SCO, 3:From Counter, 4.Busy, 5.OtherBusy
+int rtw_bt_ampdu =1 ;// 0:Disable BT control A-MPDU, 1:Enable BT control A-MPDU.
+#endif
+int rtw_AcceptAddbaReq = _TRUE;// 0:Reject AP's Add BA req, 1:Accept AP's Add BA req.
+
+int  rtw_antdiv_cfg = 2; // 0:OFF , 1:ON, 2:decide by Efuse config
+
+#ifdef CONFIG_USB_AUTOSUSPEND
+int rtw_enusbss = 1;//0:disable,1:enable
+#else
+int rtw_enusbss = 0;//0:disable,1:enable
+#endif
+
+int rtw_hwpdn_mode=2;//0:disable,1:enable,2: by EFUSE config
+
+#ifdef CONFIG_HW_PWRP_DETECTION
+int rtw_hwpwrp_detect = 1; 
+#else
+int rtw_hwpwrp_detect = 0; //HW power  ping detect 0:disable , 1:enable
+#endif
+
+#ifdef CONFIG_USB_HCI
+int rtw_hw_wps_pbc = 1;
+#else
+int rtw_hw_wps_pbc = 0;
+#endif
+
+#ifdef CONFIG_TX_MCAST2UNI
+int rtw_mc2u_disable = 0;
+#endif	// CONFIG_TX_MCAST2UNI
+
+char* ifname = "wlan%d";
+
+char* rtw_initmac = 0;  // temp mac address if users want to use instead of the mac address in Efuse
+
+module_param(ifname, charp, 0644);
+module_param(rtw_initmac, charp, 0644);
+module_param(rtw_channel_plan, int, 0644);
+module_param(rtw_chip_version, int, 0644);
+module_param(rtw_rfintfs, int, 0644);
+module_param(rtw_lbkmode, int, 0644);
+module_param(rtw_network_mode, int, 0644);
+module_param(rtw_channel, int, 0644);
+module_param(rtw_mp_mode, int, 0644);
+module_param(rtw_wmm_enable, int, 0644);
+module_param(rtw_vrtl_carrier_sense, int, 0644);
+module_param(rtw_vcs_type, int, 0644);
+module_param(rtw_busy_thresh, int, 0644);
+#ifdef CONFIG_80211N_HT
+module_param(rtw_ht_enable, int, 0644);
+module_param(rtw_cbw40_enable, int, 0644);
+module_param(rtw_ampdu_enable, int, 0644);
+module_param(rtw_rx_stbc, int, 0644);
+module_param(rtw_ampdu_amsdu, int, 0644);
+#endif
+
+module_param(rtw_lowrate_two_xmit, int, 0644);
+
+module_param(rtw_rf_config, int, 0644);
+module_param(rtw_power_mgnt, int, 0644);
+module_param(rtw_low_power, int, 0644);
+module_param(rtw_wifi_spec, int, 0644);
+
+module_param(rtw_antdiv_cfg, int, 0644);
+
+
+module_param(rtw_enusbss, int, 0644);
+module_param(rtw_hwpdn_mode, int, 0644);
+module_param(rtw_hwpwrp_detect, int, 0644);
+
+#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE
+char *rtw_adaptor_info_caching_file_path= "/data/misc/wifi/rtw_cache";
+module_param(rtw_adaptor_info_caching_file_path, charp, 0644);
+MODULE_PARM_DESC(rtw_adaptor_info_caching_file_path, "The path of adapter info cache file");
+#endif //CONFIG_ADAPTOR_INFO_CACHING_FILE
+
+#ifdef CONFIG_LAYER2_ROAMING
+uint rtw_max_roaming_times=2;
+module_param(rtw_max_roaming_times, uint, 0644);
+MODULE_PARM_DESC(rtw_max_roaming_times,"The max roaming times to try");
+#endif //CONFIG_LAYER2_ROAMING
+
+#ifdef CONFIG_FILE_FWIMG
+char *rtw_fw_file_path= "";
+module_param(rtw_fw_file_path, charp, 0644);
+MODULE_PARM_DESC(rtw_fw_file_path, "The path of fw image");
+#endif //CONFIG_FILE_FWIMG
+
+#ifdef CONFIG_TX_MCAST2UNI
+module_param(rtw_mc2u_disable, int, 0644);
+#endif	// CONFIG_TX_MCAST2UNI
+
+static uint loadparam( _adapter *padapter,  _nic_hdl	pnetdev);
+static int netdev_open (struct net_device *pnetdev);
+static int netdev_close (struct net_device *pnetdev);
+
+//#ifdef RTK_DMP_PLATFORM
+#ifdef CONFIG_PROC_DEBUG
+#define RTL8192C_PROC_NAME "rtl819xC"
+#define RTL8192D_PROC_NAME "rtl819xD"
+static char rtw_proc_name[IFNAMSIZ];
+static struct proc_dir_entry *rtw_proc = NULL;
+static int	rtw_proc_cnt = 0;
+
+void rtw_proc_init_one(struct net_device *dev)
+{
+	struct proc_dir_entry *dir_dev = NULL;
+	struct proc_dir_entry *entry=NULL;
+	_adapter	*padapter = rtw_netdev_priv(dev);
+
+	if(rtw_proc == NULL)
+	{
+		if(padapter->chip_type == RTL8188C_8192C)
+		{
+			_rtw_memcpy(rtw_proc_name, RTL8192C_PROC_NAME, sizeof(RTL8192C_PROC_NAME));
+		}
+		else if(padapter->chip_type == RTL8192D)
+		{
+			_rtw_memcpy(rtw_proc_name, RTL8192D_PROC_NAME, sizeof(RTL8192D_PROC_NAME));
+		}
+
+#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+		rtw_proc=create_proc_entry(rtw_proc_name, S_IFDIR, proc_net);
+#else
+		rtw_proc=create_proc_entry(rtw_proc_name, S_IFDIR, init_net.proc_net);
+#endif
+		if (rtw_proc == NULL) {
+			DBG_8192C(KERN_ERR "Unable to create rtw_proc directory\n");
+			return;
+		}
+
+		entry = create_proc_read_entry("ver_info", S_IFREG | S_IRUGO, rtw_proc, proc_get_drv_version, dev);				   
+		if (!entry) {
+			DBG_871X("Unable to create_proc_read_entry!\n"); 
+			return;
+		}
+	}
+
+	
+
+	if(padapter->dir_dev == NULL)
+	{
+		padapter->dir_dev = create_proc_entry(dev->name, 
+					  S_IFDIR | S_IRUGO | S_IXUGO, 
+					  rtw_proc);
+
+		dir_dev = padapter->dir_dev;
+
+		if(dir_dev==NULL)
+		{
+			if(rtw_proc_cnt == 0)
+			{
+				if(rtw_proc){
+#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+					remove_proc_entry(rtw_proc_name, proc_net);
+#else
+					remove_proc_entry(rtw_proc_name, init_net.proc_net);
+#endif		
+					rtw_proc = NULL;
+				}
+			}
+
+			DBG_8192C("Unable to create dir_dev directory\n");
+			return;
+		}
+	}
+	else
+	{
+		return;
+	}
+
+	rtw_proc_cnt++;
+
+	entry = create_proc_read_entry("write_reg", S_IFREG | S_IRUGO,
+				   dir_dev, proc_get_write_reg, dev);				   
+	if (!entry) {
+		DBG_871X("Unable to create_proc_read_entry!\n"); 
+		return;
+	}
+	entry->write_proc = proc_set_write_reg;
+
+	entry = create_proc_read_entry("read_reg", S_IFREG | S_IRUGO,
+				   dir_dev, proc_get_read_reg, dev);				   
+	if (!entry) {
+		DBG_871X("Unable to create_proc_read_entry!\n"); 
+		return;
+	}
+	entry->write_proc = proc_set_read_reg;
+
+	
+	entry = create_proc_read_entry("fwstate", S_IFREG | S_IRUGO,
+				   dir_dev, proc_get_fwstate, dev);				   
+	if (!entry) {
+		DBG_871X("Unable to create_proc_read_entry!\n"); 
+		return;
+	}
+
+
+	entry = create_proc_read_entry("sec_info", S_IFREG | S_IRUGO,
+				   dir_dev, proc_get_sec_info, dev);				   
+	if (!entry) {
+		DBG_871X("Unable to create_proc_read_entry!\n"); 
+		return;
+	}
+
+
+	entry = create_proc_read_entry("mlmext_state", S_IFREG | S_IRUGO,
+				   dir_dev, proc_get_mlmext_state, dev);				   
+	if (!entry) {
+		DBG_871X("Unable to create_proc_read_entry!\n"); 
+		return;
+	}
+
+
+	entry = create_proc_read_entry("qos_option", S_IFREG | S_IRUGO,
+				   dir_dev, proc_get_qos_option, dev);				   
+	if (!entry) {
+		DBG_871X("Unable to create_proc_read_entry!\n"); 
+		return;
+	}
+
+	entry = create_proc_read_entry("ht_option", S_IFREG | S_IRUGO,
+				   dir_dev, proc_get_ht_option, dev);				   
+	if (!entry) {
+		DBG_871X("Unable to create_proc_read_entry!\n"); 
+		return;
+	}
+
+	entry = create_proc_read_entry("rf_info", S_IFREG | S_IRUGO,
+				   dir_dev, proc_get_rf_info, dev);				   
+	if (!entry) {
+		DBG_871X("Unable to create_proc_read_entry!\n"); 
+		return;
+	}
+	
+	entry = create_proc_read_entry("ap_info", S_IFREG | S_IRUGO,
+				   dir_dev, proc_get_ap_info, dev);				   
+	if (!entry) {
+		DBG_871X("Unable to create_proc_read_entry!\n"); 
+		return;
+	}
+
+	entry = create_proc_read_entry("adapter_state", S_IFREG | S_IRUGO,
+				   dir_dev, proc_get_adapter_state, dev);				   
+	if (!entry) {
+		DBG_871X("Unable to create_proc_read_entry!\n"); 
+		return;
+	}
+
+	entry = create_proc_read_entry("trx_info", S_IFREG | S_IRUGO,
+				   dir_dev, proc_get_trx_info, dev);				   
+	if (!entry) {
+		DBG_871X("Unable to create_proc_read_entry!\n"); 
+		return;
+	}
+
+#ifdef CONFIG_AP_MODE
+
+	entry = create_proc_read_entry("all_sta_info", S_IFREG | S_IRUGO,
+				   dir_dev, proc_get_all_sta_info, dev);				   
+	if (!entry) {
+		DBG_871X("Unable to create_proc_read_entry!\n"); 
+		return;
+	}
+#endif
+
+#ifdef DBG_MEMORY_LEAK
+	entry = create_proc_read_entry("_malloc_cnt", S_IFREG | S_IRUGO,
+				   dir_dev, proc_get_malloc_cnt, dev);				   
+	if (!entry) {
+		DBG_871X("Unable to create_proc_read_entry!\n"); 
+		return;
+	}
+#endif
+
+#ifdef CONFIG_FIND_BEST_CHANNEL
+	entry = create_proc_read_entry("best_channel", S_IFREG | S_IRUGO,
+				   dir_dev, proc_get_best_channel, dev);				   
+	if (!entry) {
+		DBG_871X("Unable to create_proc_read_entry!\n"); 
+		return;
+	}
+#endif
+
+	entry = create_proc_read_entry("rx_signal", S_IFREG | S_IRUGO,
+				   dir_dev, proc_get_rx_signal, dev);				   
+	if (!entry) {
+		DBG_871X("Unable to create_proc_read_entry!\n"); 
+		return;
+	}
+	entry->write_proc = proc_set_rx_signal;
+
+}
+
+void rtw_proc_remove_one(struct net_device *dev)
+{
+	struct proc_dir_entry *dir_dev = NULL;
+	_adapter	*padapter = rtw_netdev_priv(dev);
+
+
+	dir_dev = padapter->dir_dev;
+	padapter->dir_dev = NULL;
+
+	if (dir_dev) {
+
+		remove_proc_entry("write_reg", dir_dev);
+		remove_proc_entry("read_reg", dir_dev);
+		remove_proc_entry("fwstate", dir_dev);
+		remove_proc_entry("sec_info", dir_dev);
+		remove_proc_entry("mlmext_state", dir_dev);
+		remove_proc_entry("qos_option", dir_dev);
+		remove_proc_entry("ht_option", dir_dev);
+		remove_proc_entry("rf_info", dir_dev);		
+		remove_proc_entry("ap_info", dir_dev);
+		remove_proc_entry("adapter_state", dir_dev);
+		remove_proc_entry("trx_info", dir_dev);
+
+#ifdef CONFIG_AP_MODE	
+		remove_proc_entry("all_sta_info", dir_dev);
+#endif		
+
+#ifdef DBG_MEMORY_LEAK
+		remove_proc_entry("_malloc_cnt", dir_dev);
+#endif 
+
+#ifdef CONFIG_FIND_BEST_CHANNEL
+		remove_proc_entry("best_channel", dir_dev);
+#endif 
+		remove_proc_entry("rx_signal", dir_dev);
+
+		remove_proc_entry(dev->name, rtw_proc);
+		dir_dev = NULL;
+		
+	}
+	else
+	{
+		return;
+	}
+
+	rtw_proc_cnt--;
+
+	if(rtw_proc_cnt == 0)
+	{
+		if(rtw_proc){
+			remove_proc_entry("ver_info", rtw_proc);
+			
+#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+			remove_proc_entry(rtw_proc_name, proc_net);
+#else
+			remove_proc_entry(rtw_proc_name, init_net.proc_net);
+#endif		
+			rtw_proc = NULL;
+		}
+	}
+}
+#endif
+
+uint loadparam( _adapter *padapter,  _nic_hdl	pnetdev)
+{
+       
+	uint status = _SUCCESS;
+	struct registry_priv  *registry_par = &padapter->registrypriv;
+
+_func_enter_;
+
+	registry_par->chip_version = (u8)rtw_chip_version;
+	registry_par->rfintfs = (u8)rtw_rfintfs;
+	registry_par->lbkmode = (u8)rtw_lbkmode;	
+	//registry_par->hci = (u8)hci;
+	registry_par->network_mode  = (u8)rtw_network_mode;	
+
+     	_rtw_memcpy(registry_par->ssid.Ssid, "ANY", 3);
+	registry_par->ssid.SsidLength = 3;
+	
+	registry_par->channel = (u8)rtw_channel;
+	registry_par->wireless_mode = (u8)rtw_wireless_mode;
+	registry_par->vrtl_carrier_sense = (u8)rtw_vrtl_carrier_sense ;
+	registry_par->vcs_type = (u8)rtw_vcs_type;
+	registry_par->rts_thresh=(u16)rtw_rts_thresh;
+	registry_par->frag_thresh=(u16)rtw_frag_thresh;
+	registry_par->preamble = (u8)rtw_preamble;
+	registry_par->scan_mode = (u8)rtw_scan_mode;
+	registry_par->adhoc_tx_pwr = (u8)rtw_adhoc_tx_pwr;
+	registry_par->soft_ap=  (u8)rtw_soft_ap;
+	//registry_par->smart_ps =  (u8)rtw_smart_ps;  
+	registry_par->power_mgnt = (u8)rtw_power_mgnt;
+	registry_par->ips_mode = (u8)rtw_ips_mode;
+	registry_par->radio_enable = (u8)rtw_radio_enable;
+	registry_par->long_retry_lmt = (u8)rtw_long_retry_lmt;
+	registry_par->short_retry_lmt = (u8)rtw_short_retry_lmt;
+  	registry_par->busy_thresh = (u16)rtw_busy_thresh;
+  	//registry_par->qos_enable = (u8)rtw_qos_enable;
+    	registry_par->ack_policy = (u8)rtw_ack_policy;
+	registry_par->mp_mode = (u8)rtw_mp_mode;	
+	registry_par->software_encrypt = (u8)rtw_software_encrypt;
+	registry_par->software_decrypt = (u8)rtw_software_decrypt;	  
+
+	 //UAPSD
+	registry_par->wmm_enable = (u8)rtw_wmm_enable;
+	registry_par->uapsd_enable = (u8)rtw_uapsd_enable;	  
+	registry_par->uapsd_max_sp = (u8)rtw_uapsd_max_sp;
+	registry_par->uapsd_acbk_en = (u8)rtw_uapsd_acbk_en;
+	registry_par->uapsd_acbe_en = (u8)rtw_uapsd_acbe_en;
+	registry_par->uapsd_acvi_en = (u8)rtw_uapsd_acvi_en;
+	registry_par->uapsd_acvo_en = (u8)rtw_uapsd_acvo_en;
+
+#ifdef CONFIG_80211N_HT
+	registry_par->ht_enable = (u8)rtw_ht_enable;
+	registry_par->cbw40_enable = (u8)rtw_cbw40_enable;
+	registry_par->ampdu_enable = (u8)rtw_ampdu_enable;
+	registry_par->rx_stbc = (u8)rtw_rx_stbc;	
+	registry_par->ampdu_amsdu = (u8)rtw_ampdu_amsdu;
+#endif
+
+	registry_par->lowrate_two_xmit = (u8)rtw_lowrate_two_xmit;
+	registry_par->rf_config = (u8)rtw_rf_config;
+	registry_par->low_power = (u8)rtw_low_power;
+
+	
+	registry_par->wifi_spec = (u8)rtw_wifi_spec;
+
+	registry_par->channel_plan = (u8)rtw_channel_plan;
+
+#ifdef CONFIG_BT_COEXIST
+	registry_par->bt_iso = (u8)rtw_bt_iso;
+	registry_par->bt_sco = (u8)rtw_bt_sco;
+	registry_par->bt_ampdu = (u8)rtw_bt_ampdu;
+#endif
+	registry_par->bAcceptAddbaReq = (u8)rtw_AcceptAddbaReq;
+
+	registry_par->antdiv_cfg = (u8)rtw_antdiv_cfg;
+
+#ifdef CONFIG_AUTOSUSPEND
+	registry_par->usbss_enable = (u8)rtw_enusbss;//0:disable,1:enable
+#endif
+#ifdef SUPPORT_HW_RFOFF_DETECTED
+	registry_par->hwpdn_mode = (u8)rtw_hwpdn_mode;//0:disable,1:enable,2:by EFUSE config
+	registry_par->hwpwrp_detect = (u8)rtw_hwpwrp_detect;//0:disable,1:enable
+#endif
+
+	registry_par->hw_wps_pbc = (u8)rtw_hw_wps_pbc;
+
+#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE
+	snprintf(registry_par->adaptor_info_caching_file_path, PATH_LENGTH_MAX, "%s",rtw_adaptor_info_caching_file_path);
+	registry_par->adaptor_info_caching_file_path[PATH_LENGTH_MAX-1]=0;
+#endif
+
+#ifdef CONFIG_LAYER2_ROAMING
+	registry_par->max_roaming_times = (u8)rtw_max_roaming_times;
+#endif
+
+_func_exit_;
+
+	return status;
+
+}
+
+static int rtw_net_set_mac_address(struct net_device *pnetdev, void *p)
+{
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev);
+	struct sockaddr *addr = p;
+	
+	if(padapter->bup == _FALSE)
+	{
+		//DBG_8192C("r8711_net_set_mac_address(), MAC=%x:%x:%x:%x:%x:%x\n", addr->sa_data[0], addr->sa_data[1], addr->sa_data[2], addr->sa_data[3],
+		//addr->sa_data[4], addr->sa_data[5]);
+		_rtw_memcpy(padapter->eeprompriv.mac_addr, addr->sa_data, ETH_ALEN);
+		//_rtw_memcpy(pnetdev->dev_addr, addr->sa_data, ETH_ALEN);
+		//padapter->bset_hwaddr = _TRUE;
+	}
+
+	return 0;
+}
+
+static struct net_device_stats *rtw_net_get_stats(struct net_device *pnetdev)
+{
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev);
+	struct xmit_priv *pxmitpriv = &(padapter->xmitpriv);
+	struct recv_priv *precvpriv = &(padapter->recvpriv);
+
+	padapter->stats.tx_packets = pxmitpriv->tx_pkts;//pxmitpriv->tx_pkts++;
+	padapter->stats.rx_packets = precvpriv->rx_pkts;//precvpriv->rx_pkts++; 		
+	padapter->stats.tx_dropped = pxmitpriv->tx_drop;
+	padapter->stats.rx_dropped = precvpriv->rx_drop;
+	padapter->stats.tx_bytes = pxmitpriv->tx_bytes;
+	padapter->stats.rx_bytes = precvpriv->rx_bytes;
+	
+	return &padapter->stats;	
+}
+
+#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29))
+static const struct net_device_ops rtw_netdev_ops = {
+	.ndo_open = netdev_open,
+        .ndo_stop = netdev_close,
+        .ndo_start_xmit = rtw_xmit_entry,
+        .ndo_set_mac_address = rtw_net_set_mac_address,
+        .ndo_get_stats = rtw_net_get_stats,
+        .ndo_do_ioctl = rtw_ioctl,
+};
+#endif
+
+int rtw_init_netdev_name(struct net_device *pnetdev, const char *ifname)
+{
+	_adapter *padapter = rtw_netdev_priv(pnetdev);
+
+#ifdef CONFIG_EASY_REPLACEMENT
+	struct net_device	*TargetNetdev = NULL;
+	_adapter			*TargetAdapter = NULL;
+	struct net 		*devnet = NULL;
+
+	if(padapter->bDongle == 1)
+	{
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+		TargetNetdev = dev_get_by_name("wlan0");
+#else
+	#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26))
+		devnet = pnetdev->nd_net;
+	#else
+		devnet = dev_net(pnetdev);
+	#endif
+		TargetNetdev = dev_get_by_name(devnet, "wlan0");
+#endif
+		if(TargetNetdev) {
+			DBG_8192C("Force onboard module driver disappear !!!\n");
+			TargetAdapter = rtw_netdev_priv(TargetNetdev);
+			TargetAdapter->DriverState = DRIVER_DISAPPEAR;
+
+			padapter->pid[0] = TargetAdapter->pid[0];
+			padapter->pid[1] = TargetAdapter->pid[1];
+			padapter->pid[2] = TargetAdapter->pid[2];
+			
+			dev_put(TargetNetdev);
+			unregister_netdev(TargetNetdev);
+#ifdef CONFIG_PROC_DEBUG
+			if(TargetAdapter->chip_type == padapter->chip_type)
+				rtw_proc_remove_one(TargetNetdev);
+#endif
+			padapter->DriverState = DRIVER_REPLACE_DONGLE;
+		}
+	}
+#endif
+
+	if(dev_alloc_name(pnetdev, ifname) < 0)
+	{
+		RT_TRACE(_module_os_intfs_c_,_drv_err_,("dev_alloc_name, fail! \n"));
+	}
+
+	netif_carrier_off(pnetdev);
+	//netif_stop_queue(pnetdev);
+
+	return 0;
+}
+
+struct net_device *rtw_init_netdev(_adapter *old_padapter)	
+{
+	_adapter *padapter;
+	struct net_device *pnetdev;
+
+	RT_TRACE(_module_os_intfs_c_,_drv_info_,("+init_net_dev\n"));
+
+	if(old_padapter != NULL) 
+		pnetdev = rtw_alloc_etherdev_with_old_priv(sizeof(_adapter), (void *)old_padapter);
+	else 
+		pnetdev = rtw_alloc_etherdev(sizeof(_adapter));
+	
+	if (!pnetdev)
+		return NULL;
+
+	padapter = rtw_netdev_priv(pnetdev);
+	padapter->pnetdev = pnetdev;	
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
+	SET_MODULE_OWNER(pnetdev);
+#endif
+	
+	//pnetdev->init = NULL;
+#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29))
+
+	DBG_8192C("register rtw_netdev_ops to netdev_ops\n");
+	pnetdev->netdev_ops = &rtw_netdev_ops;
+
+#else
+	pnetdev->open = netdev_open;
+	pnetdev->stop = netdev_close;	
+	
+	pnetdev->hard_start_xmit = rtw_xmit_entry;
+
+	pnetdev->set_mac_address = rtw_net_set_mac_address;
+	pnetdev->get_stats = rtw_net_get_stats;
+
+	pnetdev->do_ioctl = rtw_ioctl;
+
+#endif
+
+
+#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
+	pnetdev->features |= NETIF_F_IP_CSUM;
+#endif	
+	//pnetdev->tx_timeout = NULL;
+	pnetdev->watchdog_timeo = HZ*3; /* 3 second timeout */
+	
+	pnetdev->wireless_handlers = (struct iw_handler_def *)&rtw_handlers_def;  
+	
+#ifdef WIRELESS_SPY
+	//priv->wireless_data.spy_data = &priv->spy_data;
+	//pnetdev->wireless_data = &priv->wireless_data;
+#endif
+
+	//step 2.
+   	loadparam(padapter, pnetdev);
+	
+	return pnetdev;
+
+}
+
+u32 rtw_start_drv_threads(_adapter *padapter)
+{
+
+	u32 _status = _SUCCESS;
+
+	RT_TRACE(_module_os_intfs_c_,_drv_info_,("+rtw_start_drv_threads\n"));
+
+#ifdef CONFIG_SDIO_HCI
+	padapter->xmitThread = kernel_thread(rtw_xmit_thread, padapter, CLONE_FS|CLONE_FILES);
+	if(padapter->xmitThread < 0)
+		_status = _FAIL;
+#endif
+
+#ifdef CONFIG_RECV_THREAD_MODE
+	padapter->recvThread = kernel_thread(recv_thread, padapter, CLONE_FS|CLONE_FILES);
+	if(padapter->recvThread < 0)
+		_status = _FAIL;	
+#endif
+
+	padapter->cmdThread = kernel_thread(rtw_cmd_thread, padapter, CLONE_FS|CLONE_FILES);
+	if(padapter->cmdThread < 0)
+		_status = _FAIL;
+	else
+		_rtw_down_sema(&padapter->cmdpriv.terminate_cmdthread_sema); //wait for cmd_thread to run
+		
+
+#ifdef CONFIG_EVENT_THREAD_MODE
+	padapter->evtThread = kernel_thread(event_thread, padapter, CLONE_FS|CLONE_FILES);
+	if(padapter->evtThread < 0)
+		_status = _FAIL;		
+#endif
+
+	return _status;
+
+}
+
+void rtw_stop_drv_threads (_adapter *padapter)
+{
+	RT_TRACE(_module_os_intfs_c_,_drv_info_,("+rtw_stop_drv_threads\n"));	
+
+	//Below is to termindate rtw_cmd_thread & event_thread...
+	_rtw_up_sema(&padapter->cmdpriv.cmd_queue_sema);
+	//_rtw_up_sema(&padapter->cmdpriv.cmd_done_sema);
+	if(padapter->cmdThread){
+		_rtw_down_sema(&padapter->cmdpriv.terminate_cmdthread_sema);
+	}
+
+#ifdef CONFIG_EVENT_THREAD_MODE
+        _rtw_up_sema(&padapter->evtpriv.evt_notify);
+	if(padapter->evtThread){
+		_rtw_down_sema(&padapter->evtpriv.terminate_evtthread_sema);
+	}
+#endif
+
+#ifdef CONFIG_XMIT_THREAD_MODE
+	// Below is to termindate tx_thread...
+	_rtw_up_sema(&padapter->xmitpriv.xmit_sema);	
+	_rtw_down_sema(&padapter->xmitpriv.terminate_xmitthread_sema);
+	RT_TRACE(_module_os_intfs_c_,_drv_info_,("\n drv_halt: rtw_xmit_thread can be terminated ! \n"));
+#endif
+	 
+#ifdef CONFIG_RECV_THREAD_MODE	
+	// Below is to termindate rx_thread...
+	_rtw_up_sema(&padapter->recvpriv.recv_sema);
+	_rtw_down_sema(&padapter->recvpriv.terminate_recvthread_sema);
+	RT_TRACE(_module_os_intfs_c_,_drv_info_,("\n drv_halt:recv_thread can be terminated! \n"));
+#endif
+
+
+}
+
+u8 rtw_init_default_value(_adapter *padapter)
+{
+	u8 ret  = _SUCCESS;
+	struct registry_priv* pregistrypriv = &padapter->registrypriv;
+	struct xmit_priv	*pxmitpriv = &padapter->xmitpriv;
+	struct recv_priv	*precvpriv = &padapter->recvpriv;
+	struct mlme_priv *pmlmepriv= &padapter->mlmepriv;
+	struct security_priv *psecuritypriv = &padapter->securitypriv;
+
+	//xmit_priv
+	pxmitpriv->vcs_setting = pregistrypriv->vrtl_carrier_sense;
+	pxmitpriv->vcs = pregistrypriv->vcs_type;
+	pxmitpriv->vcs_type = pregistrypriv->vcs_type;
+	//pxmitpriv->rts_thresh = pregistrypriv->rts_thresh;
+	pxmitpriv->frag_len = pregistrypriv->frag_thresh;
+	
+		
+
+	//recv_priv
+	
+
+	//mlme_priv
+	pmlmepriv->scan_interval = SCAN_INTERVAL;// 30*2 sec = 60sec
+	pmlmepriv->scan_mode = SCAN_ACTIVE;
+	
+	//qos_priv
+	//pmlmepriv->qospriv.qos_option = pregistrypriv->wmm_enable;
+	
+	//ht_priv
+#ifdef CONFIG_80211N_HT		
+	pmlmepriv->htpriv.ampdu_enable = _FALSE;//set to disabled
+#endif	
+
+	//security_priv
+	//rtw_get_encrypt_decrypt_from_registrypriv(padapter);
+	psecuritypriv->binstallGrpkey = _FAIL;
+	psecuritypriv->sw_encrypt=pregistrypriv->software_encrypt;
+	psecuritypriv->sw_decrypt=pregistrypriv->software_decrypt;
+	
+	psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; //open system
+	psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_;
+
+	psecuritypriv->dot11PrivacyKeyIndex = 0;
+
+	psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_;
+	psecuritypriv->dot118021XGrpKeyid = 1;
+
+	psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen;
+	psecuritypriv->ndisencryptstatus = Ndis802_11WEPDisabled;
+	
+
+	//pwrctrl_priv
+
+
+	//registry_priv
+	rtw_init_registrypriv_dev_network(padapter);		
+	rtw_update_registrypriv_dev_network(padapter);
+
+
+	//hal_priv
+	padapter->HalFunc.init_default_value(padapter);
+
+	//misc.
+	padapter->bReadPortCancel = _FALSE;
+	padapter->bWritePortCancel = _FALSE;
+	padapter->bRxRSSIDisplay = 0;
+	
+	return ret;
+}
+
+u8 rtw_reset_drv_sw(_adapter *padapter)
+{
+	u8	ret8=_SUCCESS;	
+	struct mlme_priv *pmlmepriv= &padapter->mlmepriv;
+	struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv;
+
+	//hal_priv
+	padapter->HalFunc.init_default_value(padapter);
+	padapter->bReadPortCancel = _FALSE;
+	padapter->bWritePortCancel = _FALSE;
+	padapter->bRxRSSIDisplay = 0;
+	pmlmepriv->scan_interval = SCAN_INTERVAL;// 30*2 sec = 60sec
+	pmlmepriv->scan_mode = SCAN_ACTIVE; // 1: active scan ,0 passive scan
+
+	pwrctrlpriv->bips_processing = _FALSE;		
+	pwrctrlpriv->rf_pwrstate = rf_on;
+	pwrctrlpriv->bInSuspend = _FALSE;
+	
+	padapter->xmitpriv.tx_pkts = 0;
+	padapter->recvpriv.rx_pkts = 0;
+
+	pmlmepriv->LinkDetectInfo.bBusyTraffic = _FALSE;
+
+	_clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY |_FW_UNDER_LINKING);
+
+#ifdef CONFIG_AUTOSUSPEND	
+	#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,34))
+		padapter->dvobjpriv.pusbdev->autosuspend_disabled = 1;//autosuspend disabled by the user
+	#endif
+#endif
+
+#ifdef DBG_CONFIG_ERROR_DETECT
+	if(padapter->HalFunc.sreset_reset_value)
+		padapter->HalFunc.sreset_reset_value(padapter);
+#endif
+	pwrctrlpriv->pwr_state_check_cnts = 0;
+
+	//mlmeextpriv
+	padapter->mlmeextpriv.sitesurvey_res.state= SCAN_DISABLE;
+
+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
+	rtw_set_signal_stat_timer(&padapter->recvpriv);
+#endif
+
+	return ret8;
+}
+
+
+u8 rtw_init_drv_sw(_adapter *padapter)
+{
+
+	u8	ret8=_SUCCESS;
+
+_func_enter_;
+
+	RT_TRACE(_module_os_intfs_c_,_drv_info_,("+rtw_init_drv_sw\n"));
+
+	if ((rtw_init_cmd_priv(&padapter->cmdpriv)) == _FAIL)
+	{
+		RT_TRACE(_module_os_intfs_c_,_drv_err_,("\n Can't init cmd_priv\n"));
+		ret8=_FAIL;
+		goto exit;
+	}
+	
+	padapter->cmdpriv.padapter=padapter;
+	
+	if ((rtw_init_evt_priv(&padapter->evtpriv)) == _FAIL)
+	{
+		RT_TRACE(_module_os_intfs_c_,_drv_err_,("\n Can't init evt_priv\n"));
+		ret8=_FAIL;
+		goto exit;
+	}
+	
+	
+	if (rtw_init_mlme_priv(padapter) == _FAIL)
+	{
+		RT_TRACE(_module_os_intfs_c_,_drv_err_,("\n Can't init mlme_priv\n"));
+		ret8=_FAIL;
+		goto exit;
+	}
+
+	if(init_mlme_ext_priv(padapter) == _FAIL)
+	{
+		RT_TRACE(_module_os_intfs_c_,_drv_err_,("\n Can't init mlme_ext_priv\n"));
+		ret8=_FAIL;
+		goto exit;
+	}
+
+	if(_rtw_init_xmit_priv(&padapter->xmitpriv, padapter) == _FAIL)
+	{
+		DBG_871X("Can't _rtw_init_xmit_priv\n");
+		ret8=_FAIL;
+		goto exit;
+	}
+		
+	if(_rtw_init_recv_priv(&padapter->recvpriv, padapter) == _FAIL)
+	{
+		DBG_871X("Can't _rtw_init_recv_priv\n");
+		ret8=_FAIL;
+		goto exit;
+	}
+
+	// We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc().
+	//_rtw_memset((unsigned char *)&padapter->securitypriv, 0, sizeof (struct security_priv));	
+	
+	//_init_timer(&(padapter->securitypriv.tkip_timer), padapter->pnetdev, rtw_use_tkipkey_handler, padapter);
+
+	if(_rtw_init_sta_priv(&padapter->stapriv) == _FAIL)
+	{
+		DBG_871X("Can't _rtw_init_sta_priv\n");
+		ret8=_FAIL;
+		goto exit;
+	}
+	
+	padapter->stapriv.padapter = padapter;	
+
+	rtw_init_bcmc_stainfo(padapter);
+
+	rtw_init_pwrctrl_priv(padapter);	
+
+	//_rtw_memset((u8 *)&padapter->qospriv, 0, sizeof (struct qos_priv));//move to mlme_priv
+	
+#ifdef CONFIG_MP_INCLUDED
+	if (init_mp_priv(padapter) == _FAIL) {
+		ERR_8192C("%s: initialize MP private data Fail!\n", __func__);
+	}
+#endif
+
+	ret8 = rtw_init_default_value(padapter);
+
+	rtw_dm_init(padapter);
+	rtw_sw_led_init(padapter);
+
+#ifdef DBG_CONFIG_ERROR_DETECT
+	rtw_sreset_init(padapter);
+#endif
+
+
+#ifdef CONFIG_BR_EXT
+	_rtw_spinlock_init(&padapter->br_ext_lock);
+#endif	// CONFIG_BR_EXT
+
+exit:
+	
+	RT_TRACE(_module_os_intfs_c_,_drv_info_,("-rtw_init_drv_sw\n"));
+
+	_func_exit_;	
+	
+	return ret8;
+	
+}
+
+void rtw_cancel_all_timer(_adapter *padapter)
+{
+	RT_TRACE(_module_os_intfs_c_,_drv_info_,("+rtw_cancel_all_timer\n"));
+
+	_cancel_timer_ex(&padapter->mlmepriv.assoc_timer);
+	RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel association timer complete! \n"));
+
+	//_cancel_timer_ex(&padapter->securitypriv.tkip_timer);
+	//RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel tkip_timer! \n"));
+
+	_cancel_timer_ex(&padapter->mlmepriv.scan_to_timer);
+	RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel scan_to_timer! \n"));	
+	
+	_cancel_timer_ex(&padapter->mlmepriv.dynamic_chk_timer);
+	RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel dynamic_chk_timer! \n"));
+
+	// cancel sw led timer
+	rtw_sw_led_deinit(padapter);
+	RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel DeInitSwLeds! \n"));
+
+	_cancel_timer_ex(&padapter->pwrctrlpriv.pwr_state_check_timer);
+
+
+#ifdef CONFIG_SET_SCAN_DENY_TIMER
+	_cancel_timer_ex(&padapter->mlmepriv.set_scan_deny_timer);
+	RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel set_scan_deny_timer! \n"));
+#endif
+
+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
+	_cancel_timer_ex(&padapter->recvpriv.signal_stat_timer);
+#endif
+
+	// cancel dm  timer
+	padapter->HalFunc.dm_deinit(padapter);
+
+}
+
+u8 rtw_free_drv_sw(_adapter *padapter)
+{
+	struct net_device *pnetdev = (struct net_device*)padapter->pnetdev;
+
+	RT_TRACE(_module_os_intfs_c_,_drv_info_,("==>rtw_free_drv_sw"));	
+
+#ifdef CONFIG_BR_EXT
+	_rtw_spinlock_free(&padapter->br_ext_lock);
+#endif	// CONFIG_BR_EXT
+
+
+	free_mlme_ext_priv(&padapter->mlmeextpriv);
+	
+	rtw_free_cmd_priv(&padapter->cmdpriv);
+	
+	rtw_free_evt_priv(&padapter->evtpriv);
+
+	rtw_free_mlme_priv(&padapter->mlmepriv);
+	
+	//free_io_queue(padapter);
+	
+	_rtw_free_xmit_priv(&padapter->xmitpriv);
+	
+	_rtw_free_sta_priv(&padapter->stapriv); //will free bcmc_stainfo here
+	
+	_rtw_free_recv_priv(&padapter->recvpriv);	
+
+	rtw_free_pwrctrl_priv(padapter);
+
+	//rtw_mfree((void *)padapter, sizeof (padapter));
+
+#ifdef CONFIG_DRVEXT_MODULE
+	free_drvext(&padapter->drvextpriv);
+#endif
+
+	padapter->HalFunc.free_hal_data(padapter);
+
+	RT_TRACE(_module_os_intfs_c_,_drv_info_,("<==rtw_free_drv_sw\n"));
+
+	//free the old_pnetdev
+	if(padapter->rereg_nd_name_priv.old_pnetdev) {
+		free_netdev(padapter->rereg_nd_name_priv.old_pnetdev);
+		padapter->rereg_nd_name_priv.old_pnetdev = NULL;
+	}	
+
+	if(pnetdev)
+	{
+		rtw_free_netdev(pnetdev);
+	}
+
+	RT_TRACE(_module_os_intfs_c_,_drv_info_,("-rtw_free_drv_sw\n"));
+
+	return _SUCCESS;
+	
+}
+
+static int netdev_open(struct net_device *pnetdev)
+{
+	uint status;	
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev);
+	struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv;
+
+	RT_TRACE(_module_os_intfs_c_,_drv_info_,("+871x_drv - dev_open\n"));
+	DBG_8192C("+871x_drv - drv_open, bup=%d\n", padapter->bup);
+
+	if(pwrctrlpriv->ps_flag == _TRUE){
+		padapter->net_closed = _FALSE;
+		goto netdev_open_normal_process;
+	}
+		
+	if(padapter->bup == _FALSE)
+    	{    
+		padapter->bDriverStopped = _FALSE;
+	 	padapter->bSurpriseRemoved = _FALSE;	 
+		padapter->bCardDisableWOHSM = _FALSE;        	
+	
+		status = rtw_hal_init(padapter);		
+		if (status ==_FAIL)
+		{			
+			RT_TRACE(_module_os_intfs_c_,_drv_err_,("rtl871x_hal_init(): Can't init h/w!\n"));
+			goto netdev_open_error;
+		}
+		
+		DBG_8192C("MAC Address = "MAC_FMT"\n", MAC_ARG(pnetdev->dev_addr));
+
+		
+		status=rtw_start_drv_threads(padapter);
+		if(status ==_FAIL)
+		{			
+			RT_TRACE(_module_os_intfs_c_,_drv_err_,("Initialize driver software resource Failed!\n"));			
+			goto netdev_open_error;			
+		}
+
+
+		if (init_hw_mlme_ext(padapter) == _FAIL)
+		{
+			RT_TRACE(_module_os_intfs_c_,_drv_err_,("can't init mlme_ext_priv\n"));
+			goto netdev_open_error;
+		}
+
+
+#ifdef CONFIG_DRVEXT_MODULE
+		init_drvext(padapter);
+#endif
+
+		if(padapter->intf_start)
+		{
+			padapter->intf_start(padapter);
+		}
+
+#ifdef CONFIG_PROC_DEBUG
+#ifndef RTK_DMP_PLATFORM
+		rtw_proc_init_one(pnetdev);
+#endif
+#endif
+
+		rtw_led_control(padapter, LED_CTL_NO_LINK);
+
+		padapter->bup = _TRUE;
+	}
+	padapter->net_closed = _FALSE;
+
+	_set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000);
+
+	if(( pwrctrlpriv->power_mgnt != PS_MODE_ACTIVE ) ||(padapter->pwrctrlpriv.bHWPwrPindetect))
+	{
+		padapter->pwrctrlpriv.bips_processing = _FALSE;	
+		rtw_set_pwr_state_check_timer(&padapter->pwrctrlpriv);
+ 	}
+
+	//netif_carrier_on(pnetdev);//call this func when rtw_joinbss_event_callback return success       
+ 	if(!netif_queue_stopped(pnetdev))
+      		netif_start_queue(pnetdev);
+	else
+		netif_wake_queue(pnetdev);
+
+#ifdef CONFIG_BR_EXT
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35))
+	rcu_read_lock();
+#endif	// (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35))
+
+	//if(check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE)
+	{
+		//struct net_bridge	*br = pnetdev->br_port->br;//->dev->dev_addr;
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35))
+		if (pnetdev->br_port) 
+#else   // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35))
+		if (rcu_dereference(padapter->pnetdev->rx_handler_data))
+#endif  // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) 
+		{
+			struct net_device *br_netdev;
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+			br_netdev = dev_get_by_name(CONFIG_BR_EXT_BRNAME);
+#else	// (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+			struct net *devnet = NULL;
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26))
+			devnet = pnetdev->nd_net;
+#else	// (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26))
+			devnet = dev_net(pnetdev);
+#endif	// (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26))
+
+			br_netdev = dev_get_by_name(devnet, CONFIG_BR_EXT_BRNAME);
+#endif	// (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+
+			if (br_netdev) {
+				memcpy(padapter->br_mac, br_netdev->dev_addr, ETH_ALEN);
+				dev_put(br_netdev);
+			} else
+				printk("%s()-%d: dev_get_by_name(%s) failed!", __FUNCTION__, __LINE__, CONFIG_BR_EXT_BRNAME);
+		}
+		
+		padapter->ethBrExtInfo.addPPPoETag = 1;
+	}
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35))
+	rcu_read_unlock();
+#endif	// (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35))
+
+#endif	// CONFIG_BR_EXT
+
+netdev_open_normal_process:
+
+	RT_TRACE(_module_os_intfs_c_,_drv_info_,("-871x_drv - dev_open\n"));
+	DBG_8192C("-871x_drv - drv_open, bup=%d\n", padapter->bup);
+		
+	return 0;
+	
+netdev_open_error:
+
+	padapter->bup = _FALSE;
+	
+	netif_carrier_off(pnetdev);	
+	netif_stop_queue(pnetdev);
+	
+	RT_TRACE(_module_os_intfs_c_,_drv_err_,("-871x_drv - dev_open, fail!\n"));
+	DBG_8192C("-871x_drv - drv_open fail, bup=%d\n", padapter->bup);
+	
+	return (-1);
+	
+}
+
+
+
+#ifdef CONFIG_IPS
+int  ips_netdrv_open(_adapter *padapter)
+{
+	int status = _SUCCESS;
+	padapter->net_closed = _FALSE;
+	DBG_8192C("===> %s.........\n",__FUNCTION__);
+
+
+	padapter->bDriverStopped = _FALSE;
+	padapter->bSurpriseRemoved = _FALSE;
+	padapter->bCardDisableWOHSM = _FALSE;
+	padapter->bup = _TRUE;
+
+	status = rtw_hal_init(padapter);
+	if (status ==_FAIL)
+	{
+		RT_TRACE(_module_os_intfs_c_,_drv_err_,("ips_netdrv_open(): Can't init h/w!\n"));
+		goto netdev_open_error;
+	}
+
+	if(padapter->intf_start)
+	{
+		padapter->intf_start(padapter);
+	}
+
+	rtw_set_pwr_state_check_timer(&padapter->pwrctrlpriv);
+  	_set_timer(&padapter->mlmepriv.dynamic_chk_timer,5000);
+
+	 return _SUCCESS;
+
+netdev_open_error:
+	padapter->bup = _FALSE;
+	DBG_8192C("-ips_netdrv_open - drv_open failure, bup=%d\n", padapter->bup);
+
+	return _FAIL;
+}
+
+
+int rtw_ips_pwr_up(_adapter *padapter)
+{	
+	int result;
+	u32 start_time = rtw_get_current_time();
+	DBG_8192C("===>  rtw_ips_pwr_up..............\n");
+	rtw_reset_drv_sw(padapter);
+	result = ips_netdrv_open(padapter);
+
+	rtw_led_control(padapter, LED_CTL_NO_LINK);
+	
+ 	DBG_8192C("<===  rtw_ips_pwr_up.............. in %dms\n", rtw_get_passing_time_ms(start_time));
+	return result;
+
+}
+
+void rtw_ips_pwr_down(_adapter *padapter)
+{
+	u32 start_time = rtw_get_current_time();
+	DBG_8192C("===> rtw_ips_pwr_down...................\n");
+
+	padapter->bCardDisableWOHSM = _TRUE;
+	padapter->net_closed = _TRUE;
+
+	rtw_led_control(padapter, LED_CTL_POWER_OFF);
+	
+	rtw_ips_dev_unload(padapter);
+	padapter->bCardDisableWOHSM = _FALSE;
+	DBG_8192C("<=== rtw_ips_pwr_down..................... in %dms\n", rtw_get_passing_time_ms(start_time));
+}
+#endif
+void rtw_ips_dev_unload(_adapter *padapter)
+{
+	struct net_device *pnetdev= (struct net_device*)padapter->pnetdev;
+	struct xmit_priv	*pxmitpriv = &(padapter->xmitpriv);
+	DBG_8192C("====> %s...\n",__FUNCTION__);
+
+	padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_FIFO_CLEARN_UP, 0);
+
+	if(padapter->intf_stop)
+	{
+		padapter->intf_stop(padapter);
+	}
+
+	//s5.
+	if(padapter->bSurpriseRemoved == _FALSE)
+	{
+		rtw_hal_deinit(padapter);
+	}
+
+}
+
+int pm_netdev_open(struct net_device *pnetdev,u8 bnormal)
+{
+	int status;
+	if(bnormal)
+		status = netdev_open(pnetdev);
+#ifdef CONFIG_IPS
+	else
+		status =  (_SUCCESS == ips_netdrv_open((_adapter *)rtw_netdev_priv(pnetdev)))?(0):(-1);
+#endif
+
+	return status;
+}
+//extern int rfpwrstate_check(_adapter *padapter);
+static int netdev_close(struct net_device *pnetdev)
+{
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev);
+
+	RT_TRACE(_module_os_intfs_c_,_drv_info_,("+871x_drv - drv_close\n"));	
+
+	if(padapter->pwrctrlpriv.bInternalAutoSuspend == _TRUE)
+	{
+		//rfpwrstate_check(padapter);
+		if(padapter->pwrctrlpriv.rf_pwrstate == rf_off)
+			padapter->pwrctrlpriv.ps_flag = _TRUE;
+	}
+	padapter->net_closed = _TRUE;
+
+/*	if(!padapter->hw_init_completed)
+	{
+		DBG_8192C("(1)871x_drv - drv_close, bup=%d, hw_init_completed=%d\n", padapter->bup, padapter->hw_init_completed);
+
+		padapter->bDriverStopped = _TRUE;
+
+		rtw_dev_unload(padapter);
+	}
+	else*/
+	if(padapter->pwrctrlpriv.rf_pwrstate == rf_on){
+		DBG_8192C("(2)871x_drv - drv_close, bup=%d, hw_init_completed=%d\n", padapter->bup, padapter->hw_init_completed);
+
+		//s1.
+		if(pnetdev)   
+     		{
+			if (!netif_queue_stopped(pnetdev))
+				netif_stop_queue(pnetdev);
+     		}
+
+#ifndef CONFIG_ANDROID
+		//s2.	
+		//s2-1.  issue rtw_disassoc_cmd to fw
+		rtw_disassoc_cmd(padapter);	
+		//s2-2.  indicate disconnect to os
+		rtw_indicate_disconnect(padapter);
+		//s2-3. 
+		rtw_free_assoc_resources(padapter, 1);
+		//s2-4.
+		rtw_free_network_queue(padapter,_TRUE);
+#endif
+		// Close LED
+	rtw_led_control(padapter, LED_CTL_POWER_OFF);
+	}
+
+#ifdef CONFIG_BR_EXT
+	//if (OPMODE & (WIFI_STATION_STATE | WIFI_ADHOC_STATE)) 
+	{
+		//void nat25_db_cleanup(_adapter *priv);
+		nat25_db_cleanup(padapter);
+	}
+#endif	// CONFIG_BR_EXT
+
+	RT_TRACE(_module_os_intfs_c_,_drv_info_,("-871x_drv - drv_close\n"));
+	DBG_8192C("-871x_drv - drv_close, bup=%d\n", padapter->bup);
+	   
+	return 0;
+	
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/os_dep/linux/pci_intf.c linux-3.0.82x/drivers/net/wireless/rtl8188/os_dep/linux/pci_intf.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/os_dep/linux/pci_intf.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/os_dep/linux/pci_intf.c	2017-09-23 03:42:50.078674881 +0800
@@ -0,0 +1,1884 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _HCI_INTF_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <recv_osdep.h>
+#include <xmit_osdep.h>
+#include <hal_init.h>
+#include <rtw_version.h>
+
+#ifndef CONFIG_PCI_HCI
+
+#error "CONFIG_PCI_HCI shall be on!\n"
+
+#endif
+
+#include <pci_ops.h>
+#include <pci_osintf.h>
+#include <pci_hal.h>
+
+#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
+
+#error "Shall be Linux or Windows, but not both!\n"
+
+#endif
+
+#ifdef CONFIG_80211N_HT
+extern int rtw_ht_enable;
+extern int rtw_cbw40_enable;
+extern int rtw_ampdu_enable;//for enable tx_ampdu
+#endif
+
+#ifdef CONFIG_PM
+extern int pm_netdev_open(struct net_device *pnetdev);
+static int rtw_suspend(struct pci_dev *pdev, pm_message_t state);
+static int rtw_resume(struct pci_dev *pdev);
+#endif
+
+
+static int rtw_drv_init(struct pci_dev *pdev, const struct pci_device_id *pdid);
+static void rtw_dev_remove(struct pci_dev *pdev);
+
+static struct specific_device_id specific_device_id_tbl[] = {
+	{.idVendor=0x0b05, .idProduct=0x1791, .flags=SPEC_DEV_ID_DISABLE_HT},
+	{.idVendor=0x13D3, .idProduct=0x3311, .flags=SPEC_DEV_ID_DISABLE_HT},
+	{}
+};
+
+struct pci_device_id rtw_pci_id_tbl[] = {
+#ifdef CONFIG_RTL8192C
+	{PCI_DEVICE(PCI_VENDER_ID_REALTEK, 0x8191)},
+	{PCI_DEVICE(PCI_VENDER_ID_REALTEK, 0x8178)},
+	{PCI_DEVICE(PCI_VENDER_ID_REALTEK, 0x8177)},
+	{PCI_DEVICE(PCI_VENDER_ID_REALTEK, 0x8176)},
+#endif
+#ifdef CONFIG_RTL8192D
+	{PCI_DEVICE(PCI_VENDER_ID_REALTEK, 0x8193)},
+	{PCI_DEVICE(PCI_VENDER_ID_REALTEK, 0x002B)},
+#endif
+	{},
+};
+
+typedef struct _driver_priv{
+
+	struct pci_driver rtw_pci_drv;
+	int drv_registered;
+
+}drv_priv, *pdrv_priv;
+
+
+static drv_priv drvpriv = {
+	.rtw_pci_drv.name = (char*)DRV_NAME,
+	.rtw_pci_drv.probe = rtw_drv_init,
+	.rtw_pci_drv.remove = rtw_dev_remove,
+	.rtw_pci_drv.id_table = rtw_pci_id_tbl,
+#ifdef CONFIG_PM	
+	.rtw_pci_drv.suspend = rtw_suspend,
+	.rtw_pci_drv.resume = rtw_resume,
+#else	
+	.rtw_pci_drv.suspend = NULL,
+	.rtw_pci_drv.resume = NULL,
+#endif
+};
+
+
+MODULE_DEVICE_TABLE(pci, rtw_pci_id_tbl);
+
+
+static u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
+	INTEL_VENDOR_ID,
+	ATI_VENDOR_ID,
+	AMD_VENDOR_ID,
+	SIS_VENDOR_ID
+};
+
+static u8 rtw_pci_platform_switch_device_pci_aspm(_adapter *padapter, u8 value)
+{
+	struct dvobj_priv	*pdvobjpriv = &padapter->dvobjpriv;
+	u8	bresult = _SUCCESS;
+	int	error;
+
+	value |= 0x40;
+
+	error = pci_write_config_byte(pdvobjpriv->ppcidev, 0x80, value);
+
+	if(error != 0)
+	{
+		bresult = _FALSE;
+		DBG_8192C("rtw_pci_platform_switch_device_pci_aspm error (%d)\n",error);
+	}
+
+	return bresult;
+}
+
+// 
+// When we set 0x01 to enable clk request. Set 0x0 to disable clk req.  
+// 
+static u8 rtw_pci_switch_clk_req(_adapter *padapter, u8 value)
+{
+	struct dvobj_priv	*pdvobjpriv = &padapter->dvobjpriv;
+	u8	buffer, bresult = _SUCCESS;
+	int	error;
+
+	buffer = value;
+
+	if(!padapter->hw_init_completed)
+		return bresult;
+
+	error = pci_write_config_byte(pdvobjpriv->ppcidev, 0x81, value);
+
+	if(error != 0)
+	{
+		bresult = _FALSE;
+		DBG_8192C("rtw_pci_switch_clk_req error (%d)\n",error);
+	}
+
+	return bresult;
+}
+
+#if 0
+//Description: 
+//Disable RTL8192SE ASPM & Disable Pci Bridge ASPM
+void rtw_pci_disable_aspm(_adapter *padapter)
+{
+	struct dvobj_priv	*pdvobjpriv = &padapter->dvobjpriv;
+	struct pwrctrl_priv	*pwrpriv = &padapter->pwrctrlpriv;
+	struct pci_priv	*pcipriv = &(pdvobjpriv->pcipriv);
+	u32	pcicfg_addrport = 0;
+	u8	num4bytes;
+	u8	linkctrl_reg;
+	u16	pcibridge_linkctrlreg, aspmlevel = 0;
+
+	// When there exists anyone's busnum, devnum, and funcnum that are set to 0xff,
+	// we do not execute any action and return. 
+	// if it is not intel bus then don't enable ASPM. 
+	if ((pcipriv->busnumber == 0xff
+		&& pcipriv->devnumber == 0xff
+		&& pcipriv->funcnumber == 0xff)
+		|| (pcipriv->pcibridge_busnum == 0xff
+		&& pcipriv->pcibridge_devnum == 0xff
+		&& pcipriv->pcibridge_funcnum == 0xff))
+	{
+		DBG_8192C("PlatformEnableASPM(): Fail to enable ASPM. Cannot find the Bus of PCI(Bridge).\n");
+		return;
+	}
+
+	if (pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
+		DBG_8192C("%s(): Disable ASPM. Recognize the Bus of PCI(Bridge) as UNKNOWN.\n", __func__);
+	}
+
+	if (pwrpriv->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
+		RT_CLEAR_PS_LEVEL(pwrpriv, RT_RF_OFF_LEVL_CLK_REQ);
+		rtw_pci_switch_clk_req(padapter, 0x0);
+	}
+
+	{
+		// Suggested by SD1 for promising device will in L0 state after an I/O.
+		u8 tmp_u1b;
+
+		pci_read_config_byte(pdvobjpriv->ppcidev, 0x80, &tmp_u1b);
+	}
+
+	// Retrieve original configuration settings.
+	linkctrl_reg = pcipriv->linkctrl_reg;
+	pcibridge_linkctrlreg = pcipriv->pcibridge_linkctrlreg;
+
+	// Set corresponding value.
+	aspmlevel |= BIT(0) | BIT(1);
+	linkctrl_reg &= ~aspmlevel;
+	pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1));
+
+	rtw_pci_platform_switch_device_pci_aspm(padapter, linkctrl_reg);
+	rtw_udelay_os(50);
+
+	//When there exists anyone's busnum, devnum, and funcnum that are set to 0xff,
+	// we do not execute any action and return.
+	if ((pcipriv->busnumber == 0xff &&
+		pcipriv->devnumber == 0xff &&
+		pcipriv->funcnumber == 0xff) ||
+		(pcipriv->pcibridge_busnum == 0xff &&
+		pcipriv->pcibridge_devnum == 0xff
+		&& pcipriv->pcibridge_funcnum == 0xff))
+	{
+		//Do Nothing!!
+	}
+	else
+	{
+		//4 //Disable Pci Bridge ASPM 
+		pcicfg_addrport = (pcipriv->pcibridge_busnum << 16) |
+						(pcipriv->pcibridge_devnum << 11) |
+						(pcipriv->pcibridge_funcnum << 8) | (1 << 31);
+		num4bytes = (pcipriv->pcibridge_pciehdr_offset + 0x10) / 4;
+
+		// set up address port at 0xCF8 offset field= 0 (dev|vend)
+		NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (num4bytes << 2));
+
+		// now grab data port with device|vendor 4 byte dword
+		NdisRawWritePortUchar(PCI_CONF_DATA, pcibridge_linkctrlreg);
+
+		DBG_8192C("rtw_pci_disable_aspm():PciBridge busnumber[%x], DevNumbe[%x], funcnumber[%x], Write reg[%x] = %x\n",
+			pcipriv->pcibridge_busnum, pcipriv->pcibridge_devnum, 
+			pcipriv->pcibridge_funcnum, 
+			(pcipriv->pcibridge_pciehdr_offset+0x10), pcibridge_linkctrlreg);
+
+		rtw_udelay_os(50);
+	}
+}
+
+//[ASPM]
+//Description: 
+//              Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for power saving
+//              We should follow the sequence to enable RTL8192SE first then enable Pci Bridge ASPM
+//              or the system will show bluescreen.
+void rtw_pci_enable_aspm(_adapter *padapter)
+{
+	struct dvobj_priv	*pdvobjpriv = &padapter->dvobjpriv;
+	struct pwrctrl_priv	*pwrpriv = &padapter->pwrctrlpriv;
+	struct pci_priv	*pcipriv = &(pdvobjpriv->pcipriv);
+	u16	aspmlevel = 0;
+	u32	pcicfg_addrport = 0;
+	u8	num4bytes;
+	u8	u_pcibridge_aspmsetting = 0;
+	u8	u_device_aspmsetting = 0;
+
+	// When there exists anyone's busnum, devnum, and funcnum that are set to 0xff,
+	// we do not execute any action and return. 
+	// if it is not intel bus then don't enable ASPM. 
+
+	if ((pcipriv->busnumber == 0xff
+		&& pcipriv->devnumber == 0xff
+		&& pcipriv->funcnumber == 0xff)
+		|| (pcipriv->pcibridge_busnum == 0xff
+		&& pcipriv->pcibridge_devnum == 0xff
+		&& pcipriv->pcibridge_funcnum == 0xff))
+	{
+		DBG_8192C("PlatformEnableASPM(): Fail to enable ASPM. Cannot find the Bus of PCI(Bridge).\n");
+		return;
+	}
+
+	//4 Enable Pci Bridge ASPM 
+	pcicfg_addrport = (pcipriv->pcibridge_busnum << 16) 
+					| (pcipriv->pcibridge_devnum << 11)
+					| (pcipriv->pcibridge_funcnum << 8) | (1 << 31);
+	num4bytes = (pcipriv->pcibridge_pciehdr_offset + 0x10) / 4;
+	// set up address port at 0xCF8 offset field= 0 (dev|vend)
+	NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (num4bytes << 2));
+	// now grab data port with device|vendor 4 byte dword
+
+	u_pcibridge_aspmsetting = pcipriv->pcibridge_linkctrlreg | pdvobjpriv->const_hostpci_aspm_setting;
+
+	if (pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL ||
+		pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_SIS)
+		u_pcibridge_aspmsetting &= ~BIT(0);
+
+	NdisRawWritePortUchar(PCI_CONF_DATA, u_pcibridge_aspmsetting);
+
+	DBG_8192C("PlatformEnableASPM():PciBridge busnumber[%x], DevNumbe[%x], funcnumber[%x], Write reg[%x] = %x\n",
+		pcipriv->pcibridge_busnum, 
+		pcipriv->pcibridge_devnum, 
+		pcipriv->pcibridge_funcnum, 
+		(pcipriv->pcibridge_pciehdr_offset+0x10), 
+		u_pcibridge_aspmsetting);
+
+	rtw_udelay_os(50);
+
+	// Get ASPM level (with/without Clock Req)
+	aspmlevel |= pdvobjpriv->const_devicepci_aspm_setting;
+	u_device_aspmsetting = pcipriv->linkctrl_reg;
+	u_device_aspmsetting |= aspmlevel;
+
+	rtw_pci_platform_switch_device_pci_aspm(padapter, u_device_aspmsetting);	//(priv->linkctrl_reg | ASPMLevel));
+
+	if (pwrpriv->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
+		rtw_pci_switch_clk_req(padapter, (pwrpriv->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
+		RT_SET_PS_LEVEL(pwrpriv, RT_RF_OFF_LEVL_CLK_REQ);
+	}
+
+	rtw_udelay_os(50);
+}
+
+//
+//Description: 
+//To get link control field by searching from PCIe capability lists.
+//
+static u8
+rtw_get_link_control_field(_adapter *padapter, u8 busnum, u8 devnum,
+				u8 funcnum)
+{
+	struct dvobj_priv	*pdvobjpriv = &padapter->dvobjpriv;
+	struct pci_priv	*pcipriv = &(pdvobjpriv->pcipriv);
+	struct rt_pci_capabilities_header capability_hdr;
+	u8	capability_offset, num4bytes;
+	u32	pcicfg_addrport = 0;
+	u8	linkctrl_reg;
+	u8	status = _FALSE;
+
+	//If busnum, devnum, funcnum are set to 0xff.
+	if (busnum == 0xff && devnum == 0xff && funcnum == 0xff) {
+		DBG_8192C("GetLinkControlField(): Fail to find PCIe Capability\n");
+		return _FALSE;
+	}
+
+	pcicfg_addrport = (busnum << 16) | (devnum << 11) | (funcnum << 8) | (1 << 31);
+
+	//2PCIeCap
+
+	// The device supports capability lists. Find the capabilities.
+	num4bytes = 0x34 / 4;
+	//get capability_offset
+	// set up address port at 0xCF8 offset field= 0 (dev|vend)
+	NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (num4bytes << 2));
+	// now grab data port with device|vendor 4 byte dword
+	NdisRawReadPortUchar(PCI_CONF_DATA, &capability_offset);
+
+	// Loop through the capabilities in search of the power management capability. 
+	// The list is NULL-terminated, so the last offset will always be zero.
+
+	while (capability_offset != 0) {
+		// First find the number of 4 Byte. 
+		num4bytes = capability_offset / 4;
+
+		// Read the header of the capability at  this offset. If the retrieved capability is not
+		// the power management capability that we are looking for, follow the link to the 
+		// next capability and continue looping.
+
+		//4 get capability_hdr
+		// set up address port at 0xCF8 offset field= 0 (dev|vend)
+		NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (num4bytes << 2));
+		// now grab data port with device|vendor 4 byte dword
+		NdisRawReadPortUshort(PCI_CONF_DATA, (u16 *) & capability_hdr);
+
+		// Found the PCI express capability
+		if (capability_hdr.capability_id == PCI_CAPABILITY_ID_PCI_EXPRESS)
+		{
+			break;
+		}
+		else
+		{
+			// This is some other capability. Keep looking for the PCI express capability.
+			capability_offset = capability_hdr.next;
+		}
+	}
+
+	if (capability_hdr.capability_id == PCI_CAPABILITY_ID_PCI_EXPRESS)	//
+	{
+		num4bytes = (capability_offset + 0x10) / 4;
+
+		//4 Read  Link Control Register
+		// set up address port at 0xCF8 offset field= 0 (dev|vend)
+		NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (num4bytes << 2));
+		// now grab data port with device|vendor 4 byte dword
+		NdisRawReadPortUchar(PCI_CONF_DATA, &linkctrl_reg);
+
+		pcipriv->pcibridge_pciehdr_offset = capability_offset;
+		pcipriv->pcibridge_linkctrlreg = linkctrl_reg;
+
+		status = _TRUE;
+	}
+	else
+	{
+		// We didn't find a PCIe capability. 
+		DBG_8192C("GetLinkControlField(): Cannot Find PCIe Capability\n");
+	}
+
+	return status;
+}
+
+//
+//Description: 
+//To get PCI bus infomation and return busnum, devnum, and funcnum about 
+//the bus(bridge) which the device binds.
+//
+static u8
+rtw_get_pci_bus_info(_adapter *padapter,
+			  u16 vendorid,
+			  u16 deviceid,
+			  u8 irql, u8 basecode, u8 subclass, u8 filed19val,
+			  u8 * busnum, u8 * devnum, u8 * funcnum)
+{
+	struct dvobj_priv	*pdvobjpriv = &padapter->dvobjpriv;
+	struct pci_dev	*pdev = pdvobjpriv->ppcidev;
+	u8	busnum_idx, devicenum_idx, functionnum_idx;
+	u32	pcicfg_addrport = 0;
+	u32	dev_venid = 0, classcode, field19, headertype;
+	u16	venId, devId;
+	u8	basec, subc, irqline;
+	u16	regoffset;
+	u8	b_singlefunc = _FALSE;
+	u8	b_bridgechk = _FALSE;
+
+	*busnum = 0xFF;
+	*devnum = 0xFF;
+	*funcnum = 0xFF;
+
+	//DBG_8192C("==============>vendorid:%x,deviceid:%x,irql:%x\n", vendorid,deviceid,irql);
+	if ((basecode == PCI_CLASS_BRIDGE_DEV) &&
+		(subclass == PCI_SUBCLASS_BR_PCI_TO_PCI)
+		&& (filed19val == U1DONTCARE))
+		b_bridgechk = _TRUE;
+
+	// perform a complete pci bus scan operation
+	for (busnum_idx = 0; busnum_idx < PCI_MAX_BRIDGE_NUMBER; busnum_idx++)	//255
+	{
+		for (devicenum_idx = 0; devicenum_idx < PCI_MAX_DEVICES; devicenum_idx++)	//32
+		{
+			b_singlefunc = _FALSE;
+			for (functionnum_idx = 0; functionnum_idx < PCI_MAX_FUNCTION; functionnum_idx++)	//8
+			{
+				//
+				// <Roger_Notes> We have to skip redundant Bus scan to prevent unexpected system hang
+				// if single function is present in this device.
+				// 2009.02.26.
+				//                              
+				if (functionnum_idx == 0) {
+					//4 get header type (DWORD #3)
+					pcicfg_addrport = (busnum_idx << 16) | (devicenum_idx << 11) | (functionnum_idx << 8) | (1 << 31);
+					NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (3 << 2));
+					NdisRawReadPortUlong(PCI_CONF_DATA, &headertype);
+					headertype = ((headertype >> 16) & 0x0080) >> 7;	// address 0x0e[7].
+					if (headertype == 0)	//Single function                                                                                  
+						b_singlefunc = _TRUE;
+				}
+				else
+				{//By pass the following scan process.
+					if (b_singlefunc == _TRUE)
+						break;
+				}
+
+				// Set access enable control.
+				pcicfg_addrport = (busnum_idx << 16) | (devicenum_idx << 11) | (functionnum_idx << 8) | (1 << 31);
+
+				//4 // Get vendorid/ deviceid
+				// set up address port at 0xCF8 offset field= 0 (dev|vend)
+				NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport);
+				// now grab data port with device|vendor 4 byte dword
+				NdisRawReadPortUlong(PCI_CONF_DATA, &dev_venid);
+
+				// if data port is full of 1s, no device is present
+				// some broken boards return 0 if a slot is empty:
+				if (dev_venid == 0xFFFFFFFF || dev_venid == 0)
+					continue;	//PCI_INVALID_VENDORID
+
+				// 4 // Get irql
+				regoffset = 0x3C;
+				pcicfg_addrport = (busnum_idx << 16) | (devicenum_idx << 11) | (functionnum_idx << 8) | (1 << 31) | (regoffset & 0xFFFFFFFC);
+				NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport);
+				NdisRawReadPortUchar((PCI_CONF_DATA +(regoffset & 0x3)), &irqline);
+
+				venId = (u16) (dev_venid >> 0) & 0xFFFF;
+				devId = (u16) (dev_venid >> 16) & 0xFFFF;
+
+				// Check Vendor ID
+				if (!b_bridgechk && (venId != vendorid) && (vendorid != U2DONTCARE))
+					continue;
+
+				// Check Device ID
+				if (!b_bridgechk && (devId != deviceid) && (deviceid != U2DONTCARE))
+					continue;
+
+				// Check irql
+				if (!b_bridgechk && (irqline != irql) && (irql != U1DONTCARE))
+					continue;
+
+				//4 get Class Code
+				pcicfg_addrport = (busnum_idx << 16) | (devicenum_idx << 11) | (functionnum_idx << 8) | (1 << 31);
+				NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (2 << 2));
+				NdisRawReadPortUlong(PCI_CONF_DATA, &classcode);
+				classcode = classcode >> 8;
+
+				basec = (u8) (classcode >> 16) & 0xFF;
+				subc = (u8) (classcode >> 8) & 0xFF;
+				if (b_bridgechk && (venId != vendorid) && (basec == basecode) && (subc == subclass))
+					return _TRUE;
+
+				// Check Vendor ID
+				if (b_bridgechk && (venId != vendorid) && (vendorid != U2DONTCARE))
+					continue;
+
+				// Check Device ID
+				if (b_bridgechk && (devId != deviceid) && (deviceid != U2DONTCARE))
+					continue;
+
+				// Check irql
+				if (b_bridgechk && (irqline != irql) && (irql != U1DONTCARE))
+					continue;
+
+				//4 get field 0x19 value  (DWORD #6)
+				NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (6 << 2));
+				NdisRawReadPortUlong(PCI_CONF_DATA, &field19);
+				field19 = (field19 >> 8) & 0xFF;
+
+				//4 Matching Class Code and filed19.
+				if ((basec == basecode) && (subc == subclass) && ((field19 == filed19val) || (filed19val == U1DONTCARE))) {
+					*busnum = busnum_idx;
+					*devnum = devicenum_idx;
+					*funcnum = functionnum_idx;
+
+					DBG_8192C("GetPciBusInfo(): Find Device(%X:%X)  bus=%d dev=%d, func=%d\n",
+						vendorid, deviceid, busnum_idx, devicenum_idx, functionnum_idx);
+					return _TRUE;
+				}
+			}
+		}
+	}
+
+	DBG_8192C("GetPciBusInfo(): Cannot Find Device(%X:%X:%X)\n", vendorid, deviceid, dev_venid);
+
+	return _FALSE;
+}
+
+static u8
+rtw_get_pci_brideg_info(_adapter *padapter,
+			     u8 basecode,
+			     u8 subclass,
+			     u8 filed19val, u8 * busnum, u8 * devnum,
+			     u8 * funcnum, u16 * vendorid, u16 * deviceid)
+{
+	u8	busnum_idx, devicenum_idx, functionnum_idx;
+	u32	pcicfg_addrport = 0;
+	u32	dev_venid, classcode, field19, headertype;
+	u16	venId, devId;
+	u8	basec, subc, irqline;
+	u16	regoffset;
+	u8	b_singlefunc = _FALSE;
+
+	*busnum = 0xFF;
+	*devnum = 0xFF;
+	*funcnum = 0xFF;
+
+	// perform a complete pci bus scan operation
+	for (busnum_idx = 0; busnum_idx < PCI_MAX_BRIDGE_NUMBER; busnum_idx++)	//255
+	{
+		for (devicenum_idx = 0; devicenum_idx < PCI_MAX_DEVICES; devicenum_idx++)	//32
+		{
+			b_singlefunc = _FALSE;
+			for (functionnum_idx = 0; functionnum_idx < PCI_MAX_FUNCTION; functionnum_idx++)	//8
+			{
+				//
+				// <Roger_Notes> We have to skip redundant Bus scan to prevent unexpected system hang
+				// if single function is present in this device.
+				// 2009.02.26.
+				//
+				if (functionnum_idx == 0)
+				{
+					//4 get header type (DWORD #3)
+					pcicfg_addrport = (busnum_idx << 16) | (devicenum_idx << 11) | (functionnum_idx << 8) | (1 << 31);
+					//NdisRawWritePortUlong((ULONG_PTR)PCI_CONF_ADDRESS ,  pcicfg_addrport + (3 << 2));
+					//NdisRawReadPortUlong((ULONG_PTR)PCI_CONF_DATA, &headertype);
+					NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (3 << 2));
+					NdisRawReadPortUlong(PCI_CONF_DATA, &headertype);
+					headertype = ((headertype >> 16) & 0x0080) >> 7;	// address 0x0e[7].
+					if (headertype == 0)	//Single function                                                                                  
+						b_singlefunc = _TRUE;
+				}
+				else
+				{//By pass the following scan process.
+					if (b_singlefunc == _TRUE)
+						break;
+				}
+
+				pcicfg_addrport = (busnum_idx << 16) | (devicenum_idx << 11) | (functionnum_idx << 8) | (1 << 31);
+
+				//4 // Get vendorid/ deviceid
+				// set up address port at 0xCF8 offset field= 0 (dev|vend)
+				NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport);
+				// now grab data port with device|vendor 4 byte dword
+				NdisRawReadPortUlong(PCI_CONF_DATA, &dev_venid);
+
+				//4 Get irql
+				regoffset = 0x3C;
+				pcicfg_addrport = (busnum_idx << 16) | (devicenum_idx << 11) | (functionnum_idx << 8) | (1 << 31) | (regoffset & 0xFFFFFFFC);
+				NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport);
+				NdisRawReadPortUchar((PCI_CONF_DATA + (regoffset & 0x3)), &irqline);
+
+				venId = (u16) (dev_venid >> 0) & 0xFFFF;
+				devId = (u16) (dev_venid >> 16) & 0xFFFF;
+
+				//4 get Class Code
+				pcicfg_addrport = (busnum_idx << 16) | (devicenum_idx << 11) | (functionnum_idx << 8) | (1 << 31);
+				NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (2 << 2));
+				NdisRawReadPortUlong(PCI_CONF_DATA, &classcode);
+				classcode = classcode >> 8;
+
+				basec = (u8) (classcode >> 16) & 0xFF;
+				subc = (u8) (classcode >> 8) & 0xFF;
+
+				//4 get field 0x19 value  (DWORD #6)
+				NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (6 << 2));
+				NdisRawReadPortUlong(PCI_CONF_DATA, &field19);
+				field19 = (field19 >> 8) & 0xFF;
+
+				//4 Matching Class Code and filed19.
+				if ((basec == basecode) && (subc == subclass) && ((field19 == filed19val) || (filed19val == U1DONTCARE))) {
+					*busnum = busnum_idx;
+					*devnum = devicenum_idx;
+					*funcnum = functionnum_idx;
+					*vendorid = venId;
+					*deviceid = devId;
+
+					DBG_8192C("GetPciBridegInfo : Find Device(%X:%X)  bus=%d dev=%d, func=%d\n",
+						venId, devId, busnum_idx, devicenum_idx, functionnum_idx);
+
+					return _TRUE;
+				}
+			}
+		}
+	}
+
+	DBG_8192C("GetPciBridegInfo(): Cannot Find PciBridge for Device\n");
+
+	return _FALSE;
+}				// end of GetPciBridegInfo
+
+//
+//Description: 
+//To find specific bridge information.
+//
+static void rtw_find_bridge_info(_adapter *padapter)
+{
+	struct dvobj_priv	*pdvobjpriv = &padapter->dvobjpriv;
+	struct pci_priv	*pcipriv = &(pdvobjpriv->pcipriv);
+	u8	pcibridge_busnum = 0xff;
+	u8	pcibridge_devnum = 0xff;
+	u8	pcibridge_funcnum = 0xff;
+	u16	pcibridge_vendorid = 0xff;
+	u16	pcibridge_deviceid = 0xff;
+	u8	tmp = 0;
+
+	rtw_get_pci_brideg_info(padapter,
+				     PCI_CLASS_BRIDGE_DEV,
+				     PCI_SUBCLASS_BR_PCI_TO_PCI,
+				     pcipriv->busnumber,
+				     &pcibridge_busnum,
+				     &pcibridge_devnum, &pcibridge_funcnum,
+				     &pcibridge_vendorid, &pcibridge_deviceid);
+
+	// match the array of vendor id and regonize which chipset is used.
+	pcipriv->pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
+
+	for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
+		if (pcibridge_vendorid == pcibridge_vendors[tmp]) {
+			pcipriv->pcibridge_vendor = tmp;
+			DBG_8192C("Pci Bridge Vendor is found index: %d\n", tmp);
+			break;
+		}
+	}
+	DBG_8192C("Pci Bridge Vendor is %x\n", pcibridge_vendors[tmp]);
+
+	// Update corresponding PCI bus info.
+	pcipriv->pcibridge_busnum = pcibridge_busnum;
+	pcipriv->pcibridge_devnum = pcibridge_devnum;
+	pcipriv->pcibridge_funcnum = pcibridge_funcnum;
+	pcipriv->pcibridge_vendorid = pcibridge_vendorid;
+	pcipriv->pcibridge_deviceid = pcibridge_deviceid;
+
+}
+
+static u8
+rtw_get_amd_l1_patch(_adapter *padapter, u8 busnum, u8 devnum,
+			  u8 funcnum)
+{
+	u8	status = _FALSE;
+	u8	offset_e0;
+	unsigned	offset_e4;
+	u32	pcicfg_addrport = 0;
+
+	pcicfg_addrport = (busnum << 16) | (devnum << 11) | (funcnum << 8) | (1 << 31);
+
+	NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + 0xE0);
+	NdisRawWritePortUchar(PCI_CONF_DATA, 0xA0);
+
+	NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + 0xE0);
+	NdisRawReadPortUchar(PCI_CONF_DATA, &offset_e0);
+
+	if (offset_e0 == 0xA0)
+	{
+		NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + 0xE4);
+		NdisRawReadPortUlong(PCI_CONF_DATA, &offset_e4);
+		//DbgPrint("Offset E4 %x\n", offset_e4);
+		if (offset_e4 & BIT(23))
+			status = _TRUE;
+	}
+
+	return status;
+}
+#else
+/*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
+void rtw_pci_disable_aspm(_adapter *padapter)
+{
+	struct dvobj_priv	*pdvobjpriv = &padapter->dvobjpriv;
+	struct pwrctrl_priv	*pwrpriv = &padapter->pwrctrlpriv;
+	struct pci_dev	*pdev = pdvobjpriv->ppcidev;
+	struct pci_dev	*bridge_pdev = pdev->bus->self;
+	struct pci_priv	*pcipriv = &(pdvobjpriv->pcipriv);
+	u8	linkctrl_reg;
+	u16	pcibridge_linkctrlreg;
+	u16	aspmlevel = 0;
+
+	// We do not diable/enable ASPM by driver, in the future, the BIOS will enable host and NIC ASPM.
+	// Advertised by SD1 victorh. Added by tynli. 2009.11.23.
+	if(pdvobjpriv->const_pci_aspm == 0)
+		return;
+
+	if(!padapter->hw_init_completed)
+		return;
+
+	if (pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
+		RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("%s(): PCI(Bridge) UNKNOWN.\n", __FUNCTION__));
+		return;
+	}
+
+	linkctrl_reg = pcipriv->linkctrl_reg;
+	pcibridge_linkctrlreg = pcipriv->pcibridge_linkctrlreg;
+
+	// Set corresponding value.
+	aspmlevel |= BIT(0) | BIT(1);
+	linkctrl_reg &=~aspmlevel;
+	pcibridge_linkctrlreg &=~aspmlevel;
+
+	if (pwrpriv->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
+		RT_CLEAR_PS_LEVEL(pwrpriv, RT_RF_OFF_LEVL_CLK_REQ);
+		rtw_pci_switch_clk_req(padapter, 0x0);
+	}
+
+	{
+		/*for promising device will in L0 state after an I/O.*/ 
+		u8 tmp_u1b;
+		pci_read_config_byte(pdev, 0x80, &tmp_u1b);
+	}
+
+	rtw_pci_platform_switch_device_pci_aspm(padapter, linkctrl_reg);
+	rtw_udelay_os(50);
+
+	//When there exists anyone's BusNum, DevNum, and FuncNum that are set to 0xff,
+	// we do not execute any action and return. Added by tynli.
+	if( (pcipriv->busnumber == 0xff && pcipriv->devnumber == 0xff && pcipriv->funcnumber == 0xff) ||
+		(pcipriv->pcibridge_busnum == 0xff && pcipriv->pcibridge_devnum == 0xff && pcipriv->pcibridge_funcnum == 0xff) )
+	{
+		// Do Nothing!!
+	}
+	else
+	{
+		/*Disable Pci Bridge ASPM*/ 
+		//NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (num4bytes << 2));
+		//NdisRawWritePortUchar(PCI_CONF_DATA, pcibridge_linkctrlreg);
+		pci_write_config_byte(bridge_pdev, pcipriv->pcibridge_pciehdr_offset + 0x10, pcibridge_linkctrlreg);
+
+		DBG_8192C("rtw_pci_disable_aspm():PciBridge busnumber[%x], DevNumbe[%x], funcnumber[%x], Write reg[%x] = %x\n",
+			pcipriv->pcibridge_busnum, pcipriv->pcibridge_devnum, 
+			pcipriv->pcibridge_funcnum, 
+			(pcipriv->pcibridge_pciehdr_offset+0x10), pcibridge_linkctrlreg);
+
+		rtw_udelay_os(50);
+	}
+
+}
+
+/*Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for 
+power saving We should follow the sequence to enable 
+RTL8192SE first then enable Pci Bridge ASPM
+or the system will show bluescreen.*/
+void rtw_pci_enable_aspm(_adapter *padapter)
+{
+	struct dvobj_priv	*pdvobjpriv = &padapter->dvobjpriv;
+	struct pwrctrl_priv	*pwrpriv = &padapter->pwrctrlpriv;
+	struct pci_dev	*pdev = pdvobjpriv->ppcidev;
+	struct pci_dev	*bridge_pdev = pdev->bus->self;
+	struct pci_priv	*pcipriv = &(pdvobjpriv->pcipriv);
+	u16	aspmlevel = 0;		
+	u8	u_pcibridge_aspmsetting = 0;
+	u8	u_device_aspmsetting = 0;
+	u32	u_device_aspmsupportsetting = 0;
+
+	// We do not diable/enable ASPM by driver, in the future, the BIOS will enable host and NIC ASPM.
+	// Advertised by SD1 victorh. Added by tynli. 2009.11.23.
+	if(pdvobjpriv->const_pci_aspm == 0)
+		return;
+
+	//When there exists anyone's BusNum, DevNum, and FuncNum that are set to 0xff,
+	// we do not execute any action and return. Added by tynli. 
+	if( (pcipriv->busnumber == 0xff && pcipriv->devnumber == 0xff && pcipriv->funcnumber == 0xff) ||
+		(pcipriv->pcibridge_busnum == 0xff && pcipriv->pcibridge_devnum == 0xff && pcipriv->pcibridge_funcnum == 0xff) )
+	{
+		DBG_8192C("rtw_pci_enable_aspm(): Fail to enable ASPM. Cannot find the Bus of PCI(Bridge).\n");
+		return;
+	}
+
+//Get Bridge ASPM Support
+//not to enable bridge aspm if bridge does not support
+//Added by sherry 20100803
+	if (IS_HARDWARE_TYPE_8192DE(padapter))
+	{
+		//PciCfgAddrPort = (pcipriv->pcibridge_busnum << 16)|(pcipriv->pcibridge_devnum<< 11)|(pcipriv->pcibridge_funcnum <<  8)|(1 << 31);
+		//Num4Bytes = (pcipriv->pcibridge_pciehdr_offset+0x0C)/4;
+		//NdisRawWritePortUlong((ULONG_PTR)PCI_CONF_ADDRESS , PciCfgAddrPort+(Num4Bytes << 2));
+		//NdisRawReadPortUlong((ULONG_PTR)PCI_CONF_DATA,&uDeviceASPMSupportSetting);
+		pci_read_config_dword(bridge_pdev, (pcipriv->pcibridge_pciehdr_offset+0x0C), &u_device_aspmsupportsetting);
+		DBG_8192C("rtw_pci_enable_aspm(): Bridge ASPM support %x \n",u_device_aspmsupportsetting);
+		if(((u_device_aspmsupportsetting & BIT(11)) != BIT(11)) || ((u_device_aspmsupportsetting & BIT(10)) != BIT(10)))
+		{
+			if(pdvobjpriv->const_devicepci_aspm_setting == 3)
+			{
+				DBG_8192C("rtw_pci_enable_aspm(): Bridge not support L0S or L1\n");
+				return;
+			}
+			else if(pdvobjpriv->const_devicepci_aspm_setting == 2)
+			{
+				if((u_device_aspmsupportsetting & BIT(11)) != BIT(11))
+				{
+					DBG_8192C("rtw_pci_enable_aspm(): Bridge not support L1 \n");
+					return;
+				}
+			}
+			else if(pdvobjpriv->const_devicepci_aspm_setting == 1)
+			{
+				if((u_device_aspmsupportsetting & BIT(10)) != BIT(10))
+				{
+					DBG_8192C("rtw_pci_enable_aspm(): Bridge not support L0s \n");
+					return;
+				}
+
+			}
+		}
+		else
+		{
+			DBG_8192C("rtw_pci_enable_aspm(): Bridge support L0s and L1 \n");
+		}
+	}
+
+
+	/*Enable Pci Bridge ASPM*/  
+	//PciCfgAddrPort = (pcipriv->pcibridge_busnum << 16)|(pcipriv->pcibridge_devnum<< 11) |(pcipriv->pcibridge_funcnum <<  8)|(1 << 31);
+	//Num4Bytes = (pcipriv->pcibridge_pciehdr_offset+0x10)/4;
+	// set up address port at 0xCF8 offset field= 0 (dev|vend)
+	//NdisRawWritePortUlong(PCI_CONF_ADDRESS, PciCfgAddrPort + (Num4Bytes << 2));
+	// now grab data port with device|vendor 4 byte dword
+
+	u_pcibridge_aspmsetting = pcipriv->pcibridge_linkctrlreg;
+	u_pcibridge_aspmsetting |= pdvobjpriv->const_hostpci_aspm_setting;
+
+	if (pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL ||
+		pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_SIS )
+		u_pcibridge_aspmsetting &= ~BIT(0); // for intel host 42 device 43
+
+	//NdisRawWritePortUchar(PCI_CONF_DATA, u_pcibridge_aspmsetting);
+	pci_write_config_byte(bridge_pdev, (pcipriv->pcibridge_pciehdr_offset+0x10), u_pcibridge_aspmsetting);
+
+	DBG_8192C("PlatformEnableASPM():PciBridge busnumber[%x], DevNumbe[%x], funcnumber[%x], Write reg[%x] = %x\n",
+		pcipriv->pcibridge_busnum, pcipriv->pcibridge_devnum, pcipriv->pcibridge_funcnum, 
+		(pcipriv->pcibridge_pciehdr_offset+0x10), 
+		u_pcibridge_aspmsetting);
+
+	rtw_udelay_os(50);
+
+	/*Get ASPM level (with/without Clock Req)*/ 
+	aspmlevel |= pdvobjpriv->const_devicepci_aspm_setting;
+	u_device_aspmsetting = pcipriv->linkctrl_reg;
+	u_device_aspmsetting |= aspmlevel; // device 43
+
+	rtw_pci_platform_switch_device_pci_aspm(padapter, u_device_aspmsetting);
+
+	if (pwrpriv->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
+		rtw_pci_switch_clk_req(padapter, (pwrpriv->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
+		RT_SET_PS_LEVEL(pwrpriv, RT_RF_OFF_LEVL_CLK_REQ);
+	}
+
+	rtw_udelay_os(50);
+}
+
+static u8 rtw_pci_get_amd_l1_patch(_adapter *padapter)
+{
+	struct dvobj_priv	*pdvobjpriv = &padapter->dvobjpriv;
+	struct pci_dev	*pdev = pdvobjpriv->ppcidev;
+	struct pci_dev	*bridge_pdev = pdev->bus->self;
+	u8	status = _FALSE;
+	u8	offset_e0;
+	u32	offset_e4;
+
+	//NdisRawWritePortUlong(PCI_CONF_ADDRESS,pcicfg_addrport + 0xE0);
+	//NdisRawWritePortUchar(PCI_CONF_DATA, 0xA0);
+	pci_write_config_byte(bridge_pdev, 0xE0, 0xA0);
+
+	//NdisRawWritePortUlong(PCI_CONF_ADDRESS,pcicfg_addrport + 0xE0);
+	//NdisRawReadPortUchar(PCI_CONF_DATA, &offset_e0);
+	pci_read_config_byte(bridge_pdev, 0xE0, &offset_e0);
+
+	if (offset_e0 == 0xA0) {
+		//NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + 0xE4);
+		//NdisRawReadPortUlong(PCI_CONF_DATA, &offset_e4);
+		pci_read_config_dword(bridge_pdev, 0xE4, &offset_e4);
+		if (offset_e4 & BIT(23))
+			status = _TRUE;
+	}
+
+	return status;
+}
+
+static void rtw_pci_get_linkcontrol_field(_adapter *padapter)
+{
+	struct dvobj_priv	*pdvobjpriv = &padapter->dvobjpriv;
+	struct pci_priv	*pcipriv = &(pdvobjpriv->pcipriv);
+	struct pci_dev	*pdev = pdvobjpriv->ppcidev;
+	struct pci_dev	*bridge_pdev = pdev->bus->self;
+	u8	capabilityoffset = pcipriv->pcibridge_pciehdr_offset;
+	u8	linkctrl_reg;	
+			
+	/*Read  Link Control Register*/
+	pci_read_config_byte(bridge_pdev, capabilityoffset + PCI_EXP_LNKCTL, &linkctrl_reg);
+
+	pcipriv->pcibridge_linkctrlreg = linkctrl_reg;
+}
+#endif
+
+static void rtw_pci_parse_configuration(struct pci_dev *pdev, _adapter *padapter)
+{
+	struct dvobj_priv	*pdvobjpriv = &padapter->dvobjpriv;
+	struct pci_priv	*pcipriv = &(pdvobjpriv->pcipriv);
+	u8 tmp;
+	int pos;
+	u8 linkctrl_reg;
+
+	//Link Control Register
+	pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
+	pci_read_config_byte(pdev, pos + PCI_EXP_LNKCTL, &linkctrl_reg);
+	pcipriv->linkctrl_reg = linkctrl_reg;
+
+	//DBG_8192C("Link Control Register = %x\n", pcipriv->linkctrl_reg);
+
+	pci_read_config_byte(pdev, 0x98, &tmp);
+	tmp |= BIT(4);
+	pci_write_config_byte(pdev, 0x98, tmp);
+
+	//tmp = 0x17;
+	//pci_write_config_byte(pdev, 0x70f, tmp);
+}
+
+//
+// Update PCI dependent default settings.
+//
+static void rtw_pci_update_default_setting(_adapter *padapter)
+{
+	struct dvobj_priv	*pdvobjpriv = &padapter->dvobjpriv;
+	struct pci_priv	*pcipriv = &(pdvobjpriv->pcipriv);
+	struct pwrctrl_priv	*pwrpriv = &padapter->pwrctrlpriv;
+
+	//reset pPSC->reg_rfps_level & priv->b_support_aspm
+	pwrpriv->reg_rfps_level = 0;
+	pwrpriv->b_support_aspm = 0;
+
+	// Dynamic Mechanism, 
+	//pAdapter->HalFunc.SetHalDefVarHandler(pAdapter, HAL_DEF_INIT_GAIN, &(pDevice->InitGainState));
+
+	// Update PCI ASPM setting
+	pwrpriv->const_amdpci_aspm = pdvobjpriv->const_amdpci_aspm;
+	switch (pdvobjpriv->const_pci_aspm) {
+		case 0:		// No ASPM
+			break;
+
+		case 1:		// ASPM dynamically enabled/disable.
+			pwrpriv->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM;
+			break;
+
+		case 2:		// ASPM with Clock Req dynamically enabled/disable.
+			pwrpriv->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM | RT_RF_OFF_LEVL_CLK_REQ);
+			break;
+
+		case 3:		// Always enable ASPM and Clock Req from initialization to halt.
+			pwrpriv->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM);
+			pwrpriv->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM | RT_RF_OFF_LEVL_CLK_REQ);
+			break;
+
+		case 4:		// Always enable ASPM without Clock Req from initialization to halt.
+			pwrpriv->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM | RT_RF_OFF_LEVL_CLK_REQ);
+			pwrpriv->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
+			break;
+	}
+
+	pwrpriv->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
+
+	// Update Radio OFF setting
+	switch (pdvobjpriv->const_hwsw_rfoff_d3) {
+		case 1:
+			if (pwrpriv->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
+				pwrpriv->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
+			break;
+
+		case 2:
+			if (pwrpriv->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
+				pwrpriv->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
+			pwrpriv->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
+			break;
+
+		case 3:
+			pwrpriv->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3;
+			break;
+	}
+
+	// Update Rx 2R setting
+	//pPSC->reg_rfps_level |= ((pDevice->RegLPS2RDisable) ? RT_RF_LPS_DISALBE_2R : 0);
+
+	//
+	// Set HW definition to determine if it supports ASPM.
+	//
+	switch (pdvobjpriv->const_support_pciaspm) {
+		case 0:	// Not support ASPM.
+			{
+				u8	b_support_aspm = _FALSE;
+				pwrpriv->b_support_aspm = b_support_aspm;
+			}
+			break;
+
+		case 1:	// Support ASPM.
+			{
+				u8	b_support_aspm = _TRUE;
+				u8	b_support_backdoor = _TRUE;
+
+				pwrpriv->b_support_aspm = b_support_aspm;
+
+				/*if(pAdapter->MgntInfo.CustomerID == RT_CID_TOSHIBA &&
+					pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_AMD && 
+					!pcipriv->amd_l1_patch)
+					b_support_backdoor = _FALSE;*/
+
+				pwrpriv->b_support_backdoor = b_support_backdoor;
+			}
+			break;
+
+		case 2:	// Set by Chipset.
+			// ASPM value set by chipset. 
+			if (pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) {
+				u8	b_support_aspm = _TRUE;
+				pwrpriv->b_support_aspm = b_support_aspm;
+			}
+			break;
+
+		default:
+			// Do nothing. Set when finding the chipset.
+			break;
+	}
+}
+
+static void rtw_pci_initialize_adapter_common(_adapter *padapter)
+{
+	struct pwrctrl_priv	*pwrpriv = &padapter->pwrctrlpriv;
+
+	rtw_pci_update_default_setting(padapter);
+
+	if (pwrpriv->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) {
+		// Always enable ASPM & Clock Req.
+		rtw_pci_enable_aspm(padapter);
+		RT_SET_PS_LEVEL(pwrpriv, RT_RF_PS_LEVEL_ALWAYS_ASPM);
+	}
+
+}
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)) || (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18))
+#define rtw_pci_interrupt(x,y,z) rtw_pci_interrupt(x,y)
+#endif
+
+static irqreturn_t rtw_pci_interrupt(int irq, void *priv, struct pt_regs *regs)
+{
+	_adapter			*padapter = (_adapter *)priv;
+	struct dvobj_priv	*pdvobjpriv = &padapter->dvobjpriv;
+
+
+	if (pdvobjpriv->irq_enabled == 0) {
+		return IRQ_HANDLED;
+	}
+
+	if(padapter->HalFunc.interrupt_handler(padapter) == _FAIL)
+		return IRQ_HANDLED;
+		//return IRQ_NONE;
+
+	return IRQ_HANDLED;
+}
+
+static u32 pci_dvobj_init(_adapter *padapter)
+{
+	u32	status = _SUCCESS;
+	struct dvobj_priv	*pdvobjpriv = &padapter->dvobjpriv;
+	struct pci_priv	*pcipriv = &(pdvobjpriv->pcipriv);
+	struct pci_dev	*pdev = pdvobjpriv->ppcidev;
+	struct pci_dev	*bridge_pdev = pdev->bus->self;
+	u8	tmp;
+
+_func_enter_;
+
+#if 1
+	/*find bus info*/
+	pcipriv->busnumber = pdev->bus->number;
+	pcipriv->devnumber = PCI_SLOT(pdev->devfn);
+	pcipriv->funcnumber = PCI_FUNC(pdev->devfn);
+
+	/*find bridge info*/
+	pcipriv->pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
+	if(bridge_pdev){
+		pcipriv->pcibridge_vendorid = bridge_pdev->vendor;
+		for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
+			if (bridge_pdev->vendor == pcibridge_vendors[tmp]) {
+				pcipriv->pcibridge_vendor = tmp;
+				DBG_8192C("Pci Bridge Vendor is found index: %d, %x\n", tmp, pcibridge_vendors[tmp]);
+				break;
+			}
+		}
+	}
+
+	//if (pcipriv->pcibridge_vendor != PCI_BRIDGE_VENDOR_UNKNOWN) {
+	if(bridge_pdev){
+		pcipriv->pcibridge_busnum = bridge_pdev->bus->number;
+		pcipriv->pcibridge_devnum = PCI_SLOT(bridge_pdev->devfn);
+		pcipriv->pcibridge_funcnum = PCI_FUNC(bridge_pdev->devfn);
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34))
+		pcipriv->pcibridge_pciehdr_offset = pci_find_capability(bridge_pdev, PCI_CAP_ID_EXP);
+#else
+		pcipriv->pcibridge_pciehdr_offset = bridge_pdev->pcie_cap;
+#endif
+
+		rtw_pci_get_linkcontrol_field(padapter);
+		
+		if (pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_AMD) {
+			pcipriv->amd_l1_patch = rtw_pci_get_amd_l1_patch(padapter);
+		}
+	}
+#else
+	//
+	// Find bridge related info. 
+	//
+	rtw_get_pci_bus_info(padapter,
+				  pdev->vendor,
+				  pdev->device,
+				  (u8) pdvobjpriv->irqline,
+				  0x02, 0x80, U1DONTCARE,
+				  &pcipriv->busnumber,
+				  &pcipriv->devnumber,
+				  &pcipriv->funcnumber);
+
+	rtw_find_bridge_info(padapter);
+
+	if (pcipriv->pcibridge_vendor != PCI_BRIDGE_VENDOR_UNKNOWN) {
+		rtw_get_link_control_field(padapter,
+						pcipriv->pcibridge_busnum,
+						pcipriv->pcibridge_devnum,
+						pcipriv->pcibridge_funcnum);
+
+		if (pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_AMD) {
+			pcipriv->amd_l1_patch =
+				rtw_get_amd_l1_patch(padapter,
+							pcipriv->pcibridge_busnum,
+							pcipriv->pcibridge_devnum,
+							pcipriv->pcibridge_funcnum);
+		}
+	}
+#endif
+
+	//
+	// Allow the hardware to look at PCI config information.
+	//
+	rtw_pci_parse_configuration(pdev, padapter);
+
+	DBG_8192C("pcidev busnumber:devnumber:funcnumber:"
+		"vendor:link_ctl %d:%d:%d:%x:%x\n",
+		pcipriv->busnumber,
+		pcipriv->devnumber,
+		pcipriv->funcnumber,
+		pdev->vendor,
+		pcipriv->linkctrl_reg);
+
+	DBG_8192C("pci_bridge busnumber:devnumber:funcnumber:vendor:"
+		"pcie_cap:link_ctl_reg: %d:%d:%d:%x:%x:%x:%x\n", 
+		pcipriv->pcibridge_busnum,
+		pcipriv->pcibridge_devnum,
+		pcipriv->pcibridge_funcnum,
+		pcibridge_vendors[pcipriv->pcibridge_vendor],
+		pcipriv->pcibridge_pciehdr_offset,
+		pcipriv->pcibridge_linkctrlreg,
+		pcipriv->amd_l1_patch);
+
+	//.2
+	if ((rtw_init_io_priv(padapter)) == _FAIL)
+	{
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" \n Can't init io_reqs\n"));
+		status = _FAIL;
+	}
+
+	//.3
+	intf_read_chip_version(padapter);
+	//.4
+	intf_chip_configure(padapter);
+
+_func_exit_;
+
+	return status;
+}
+
+static void pci_dvobj_deinit(_adapter * padapter)
+{
+	//struct dvobj_priv *pdvobjpriv=&padapter->dvobjpriv;
+
+_func_enter_;
+
+_func_exit_;
+}
+
+
+static void decide_chip_type_by_pci_device_id(_adapter *padapter, struct pci_dev *pdev)
+{
+	u16	venderid, deviceid, irqline;
+	u8	revisionid;
+	struct dvobj_priv	*pdvobjpriv=&padapter->dvobjpriv;
+
+
+	venderid = pdev->vendor;
+	deviceid = pdev->device;
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23))
+	pci_read_config_byte(pdev, PCI_REVISION_ID, &revisionid); // PCI_REVISION_ID 0x08
+#else
+	revisionid = pdev->revision;
+#endif
+	pci_read_config_word(pdev, PCI_INTERRUPT_LINE, &irqline); // PCI_INTERRUPT_LINE 0x3c
+	pdvobjpriv->irqline = irqline;
+
+
+	//
+	// Decide hardware type here. 
+	//
+	if( deviceid == HAL_HW_PCI_8185_DEVICE_ID ||
+	    deviceid == HAL_HW_PCI_8188_DEVICE_ID ||
+	    deviceid == HAL_HW_PCI_8198_DEVICE_ID)
+	{
+		DBG_8192C("Adapter (8185/8185B) is found- VendorID/DeviceID=%x/%x\n", venderid, deviceid);
+		padapter->HardwareType=HARDWARE_TYPE_RTL8185;
+	}
+	else if (deviceid == HAL_HW_PCI_8190_DEVICE_ID ||
+		deviceid == HAL_HW_PCI_0045_DEVICE_ID ||
+		deviceid == HAL_HW_PCI_0046_DEVICE_ID ||
+		deviceid == HAL_HW_PCI_DLINK_DEVICE_ID)
+	{
+		DBG_8192C("Adapter(8190 PCI) is found - vendorid/deviceid=%x/%x\n", venderid, deviceid);
+		padapter->HardwareType = HARDWARE_TYPE_RTL8190P;
+	}
+	else if (deviceid == HAL_HW_PCI_8192_DEVICE_ID ||
+		deviceid == HAL_HW_PCI_0044_DEVICE_ID ||
+		deviceid == HAL_HW_PCI_0047_DEVICE_ID ||
+		deviceid == HAL_HW_PCI_8192SE_DEVICE_ID ||
+		deviceid == HAL_HW_PCI_8174_DEVICE_ID ||
+		deviceid == HAL_HW_PCI_8173_DEVICE_ID ||
+		deviceid == HAL_HW_PCI_8172_DEVICE_ID ||
+		deviceid == HAL_HW_PCI_8171_DEVICE_ID)
+	{
+		// 8192e and and 8192se may have the same device ID 8192. However, their Revision
+		// ID is different
+		// Added for 92DE. We deferentiate it from SVID,SDID.
+		if( pdev->subsystem_vendor == 0x10EC && pdev->subsystem_device == 0xE020){
+			padapter->HardwareType = HARDWARE_TYPE_RTL8192DE;
+			DBG_8192C("Adapter(8192DE) is found - VendorID/DeviceID/RID=%X/%X/%X\n", venderid, deviceid, revisionid);
+		}else{
+			switch (revisionid) {
+				case HAL_HW_PCI_REVISION_ID_8192PCIE:
+					DBG_8192C("Adapter(8192 PCI-E) is found - vendorid/deviceid=%x/%x\n", venderid, deviceid);
+					padapter->HardwareType = HARDWARE_TYPE_RTL8192E;
+					break;
+				case HAL_HW_PCI_REVISION_ID_8192SE:
+					DBG_8192C("Adapter(8192SE) is found - vendorid/deviceid=%x/%x\n", venderid, deviceid);
+					padapter->HardwareType = HARDWARE_TYPE_RTL8192SE;
+					break;
+				default:
+					DBG_8192C("Err: Unknown device - vendorid/deviceid=%x/%x\n", venderid, deviceid);
+					padapter->HardwareType = HARDWARE_TYPE_RTL8192SE;
+					break;
+			}
+		}
+	}
+	else if(deviceid==HAL_HW_PCI_8723E_DEVICE_ID )
+	{//RTL8723E may have the same device ID with RTL8192CET
+		padapter->HardwareType = HARDWARE_TYPE_RTL8723E;
+		DBG_8192C("Adapter(8723 PCI-E) is found - VendorID/DeviceID=%x/%x\n", venderid, deviceid);
+	}
+	else if (deviceid == HAL_HW_PCI_8192CET_DEVICE_ID ||
+		deviceid == HAL_HW_PCI_8192CE_DEVICE_ID ||
+		deviceid == HAL_HW_PCI_8191CE_DEVICE_ID ||
+		deviceid == HAL_HW_PCI_8188CE_DEVICE_ID) 
+	{
+		DBG_8192C("Adapter(8192C PCI-E) is found - vendorid/deviceid=%x/%x\n", venderid, deviceid);
+		padapter->HardwareType = HARDWARE_TYPE_RTL8192CE;
+	}
+	else if (deviceid == HAL_HW_PCI_8192DE_DEVICE_ID ||
+		deviceid == HAL_HW_PCI_002B_DEVICE_ID ){
+		padapter->HardwareType = HARDWARE_TYPE_RTL8192DE;
+		DBG_8192C("Adapter(8192DE) is found - VendorID/DeviceID/RID=%X/%X/%X\n", venderid, deviceid, revisionid);
+	}
+	else
+	{
+		DBG_8192C("Err: Unknown device - vendorid/deviceid=%x/%x\n", venderid, deviceid);
+		//padapter->HardwareType = HAL_DEFAULT_HARDWARE_TYPE;
+	}
+
+
+	padapter->chip_type = NULL_CHIP_TYPE;
+
+	//TODO:
+#ifdef CONFIG_RTL8192C
+	padapter->chip_type = RTL8188C_8192C;
+	padapter->HardwareType = HARDWARE_TYPE_RTL8192CE;
+#endif
+#ifdef CONFIG_RTL8192D
+	pdvobjpriv->InterfaceNumber = revisionid;
+
+	padapter->chip_type = RTL8192D;
+	padapter->HardwareType = HARDWARE_TYPE_RTL8192DE;
+#endif
+
+}
+
+static void pci_intf_start(_adapter *padapter)
+{
+
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+pci_intf_start\n"));
+	DBG_8192C("+pci_intf_start\n");
+
+	//Enable hw interrupt
+	padapter->HalFunc.enable_interrupt(padapter);
+
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-pci_intf_start\n"));
+	DBG_8192C("-pci_intf_start\n");
+}
+
+static void pci_intf_stop(_adapter *padapter)
+{
+
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+pci_intf_stop\n"));
+
+	//Disable hw interrupt
+	if(padapter->bSurpriseRemoved == _FALSE)
+	{
+		//device still exists, so driver can do i/o operation
+		padapter->HalFunc.disable_interrupt(padapter);
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("pci_intf_stop: SurpriseRemoved==_FALSE\n"));
+	}
+	else
+	{
+		// Clear irq_enabled to prevent handle interrupt function.
+		padapter->dvobjpriv.irq_enabled = 0;
+	}
+
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-pci_intf_stop\n"));
+
+}
+
+
+static void rtw_dev_unload(_adapter *padapter)
+{
+	struct net_device *pnetdev= (struct net_device*)padapter->pnetdev;
+
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+rtw_dev_unload\n"));
+
+	if(padapter->bup == _TRUE)
+	{
+		DBG_8192C("+rtw_dev_unload\n");
+		//s1.
+/*		if(pnetdev)
+		{
+			netif_carrier_off(pnetdev);
+			netif_stop_queue(pnetdev);
+		}
+
+		//s2.
+		//s2-1.  issue rtw_disassoc_cmd to fw
+		rtw_disassoc_cmd(padapter);
+		//s2-2.  indicate disconnect to os
+		rtw_indicate_disconnect(padapter);
+		//s2-3.
+		rtw_free_assoc_resources(padapter, 1);
+		//s2-4.
+		rtw_free_network_queue(padapter, _TRUE);*/
+
+		padapter->bDriverStopped = _TRUE;
+
+		//s3.
+		if(padapter->intf_stop)
+		{
+			padapter->intf_stop(padapter);
+		}
+
+		//s4.
+		rtw_stop_drv_threads(padapter);
+
+
+		//s5.
+		if(padapter->bSurpriseRemoved == _FALSE)
+		{
+			DBG_8192C("r871x_dev_unload()->rtl871x_hal_deinit()\n");
+			rtw_hal_deinit(padapter);
+
+			padapter->bSurpriseRemoved = _TRUE;
+		}
+
+		padapter->bup = _FALSE;
+
+	}
+	else
+	{
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("r871x_dev_unload():padapter->bup == _FALSE\n" ));
+	}
+
+	DBG_8192C("-rtw_dev_unload\n");
+
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-rtw_dev_unload\n"));
+
+}
+
+static void disable_ht_for_spec_devid(const struct pci_device_id *pdid)
+{
+#ifdef CONFIG_80211N_HT
+	u16 vid, pid;
+	u32 flags;
+	int i;
+	int num = sizeof(specific_device_id_tbl)/sizeof(struct specific_device_id);
+
+	for(i=0; i<num; i++)
+	{
+		vid = specific_device_id_tbl[i].idVendor;
+		pid = specific_device_id_tbl[i].idProduct;
+		flags = specific_device_id_tbl[i].flags;
+
+		if((pdid->vendor==vid) && (pdid->device==pid) && (flags&SPEC_DEV_ID_DISABLE_HT))
+		{
+			 rtw_ht_enable = 0;
+			 rtw_cbw40_enable = 0;
+			 rtw_ampdu_enable = 0;
+		}
+
+	}
+#endif
+}
+
+#ifdef CONFIG_PM
+static int rtw_suspend(struct pci_dev *pdev, pm_message_t state)
+{	
+	_func_enter_;
+
+
+	_func_exit_;
+	return 0;
+}
+
+static int rtw_resume(struct pci_dev *pdev)
+{
+	_func_enter_;
+
+
+	_func_exit_;
+	
+	return 0;
+}
+#endif
+
+#ifdef RTK_DMP_PLATFORM
+#define pci_iounmap(x,y) iounmap(y)
+#endif
+
+extern char* ifname;
+
+/*
+ * drv_init() - a device potentially for us
+ *
+ * notes: drv_init() is called when the bus driver has located a card for us to support.
+ *        We accept the new device by returning 0.
+*/
+static int rtw_drv_init(struct pci_dev *pdev, const struct pci_device_id *pdid)
+{
+	int i, err = -ENODEV;
+
+	uint status;
+	_adapter *padapter = NULL;
+	struct dvobj_priv *pdvobjpriv;
+	struct net_device *pnetdev;
+	unsigned long pmem_start, pmem_len, pmem_flags;
+	u8	bdma64 = _FALSE;
+
+	RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("+rtw_drv_init\n"));
+	//DBG_8192C("+rtw_drv_init\n");
+
+	err = pci_enable_device(pdev);
+	if (err) {
+		DBG_8192C(KERN_ERR "%s : Cannot enable new PCI device\n", pci_name(pdev));
+		return err;
+	}
+
+#ifdef CONFIG_64BIT_DMA
+	if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
+		DBG_8192C("RTL819xCE: Using 64bit DMA\n");
+		if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
+			DBG_8192C(KERN_ERR "Unable to obtain 64bit DMA for consistent allocations\n");
+			err = -ENOMEM;
+			pci_disable_device(pdev);
+			return err;
+		}
+		bdma64 = _TRUE;
+	} else 
+#endif
+	{
+		if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
+			if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
+				DBG_8192C(KERN_ERR "Unable to obtain 32bit DMA for consistent allocations\n");
+				err = -ENOMEM;
+				pci_disable_device(pdev);
+				return err;
+			}
+		}
+	}
+
+	pci_set_master(pdev);
+
+	//step 0.
+	disable_ht_for_spec_devid(pdid);
+
+
+	//step 1. set USB interface data
+	// init data
+	pnetdev = rtw_init_netdev(NULL);
+	if (!pnetdev){
+		err = -ENOMEM;
+		goto fail1;
+	}
+	rtw_init_netdev_name(pnetdev,ifname);
+
+	if(bdma64){
+		pnetdev->features |= NETIF_F_HIGHDMA;
+	}
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
+	SET_NETDEV_DEV(pnetdev, &pdev->dev);
+#endif
+
+	padapter = rtw_netdev_priv(pnetdev);
+	pdvobjpriv = &padapter->dvobjpriv;
+	pdvobjpriv->padapter = padapter;
+	pdvobjpriv->ppcidev = pdev;
+
+	// set data
+	pci_set_drvdata(pdev, pnetdev);
+
+	err = pci_request_regions(pdev, DRV_NAME);
+	if (err) {
+		DBG_8192C(KERN_ERR "Can't obtain PCI resources\n");
+		goto fail1;
+	}
+	//MEM map
+	pmem_start = pci_resource_start(pdev, 2);
+	pmem_len = pci_resource_len(pdev, 2);
+	pmem_flags = pci_resource_flags(pdev, 2);
+
+#ifdef RTK_DMP_PLATFORM
+	pdvobjpriv->pci_mem_start = (unsigned long)ioremap_nocache( pmem_start, pmem_len);
+#else
+	pdvobjpriv->pci_mem_start = (unsigned long)pci_iomap(pdev, 2, pmem_len);	// shared mem start
+#endif
+	if (pdvobjpriv->pci_mem_start == 0) {
+		DBG_8192C(KERN_ERR "Can't map PCI mem\n");
+		goto fail2;
+	}
+
+	DBG_8192C("Memory mapped space start: 0x%08lx len:%08lx flags:%08lx, after map:0x%08lx\n",
+		pmem_start, pmem_len, pmem_flags, pdvobjpriv->pci_mem_start);
+
+	// Disable Clk Request */
+	pci_write_config_byte(pdev, 0x81, 0);
+	// leave D3 mode */
+	pci_write_config_byte(pdev, 0x44, 0);
+	pci_write_config_byte(pdev, 0x04, 0x06);
+	pci_write_config_byte(pdev, 0x04, 0x07);
+
+
+	//set interface_type to usb
+	padapter->interface_type = RTW_PCIE;
+
+	//step 1-1., decide the chip_type via vid/pid
+	decide_chip_type_by_pci_device_id(padapter, pdev);
+
+	//step 2.	
+	if(padapter->chip_type== RTL8188C_8192C)
+	{
+#ifdef CONFIG_RTL8192C
+		rtl8192ce_set_hal_ops(padapter);
+#endif
+	}
+	else if(padapter->chip_type == RTL8192D)
+	{
+#ifdef CONFIG_RTL8192D
+		rtl8192de_set_hal_ops(padapter);
+#endif
+	}
+	else
+	{
+		status = _FAIL;
+		goto error;
+	}
+
+	//step 3.	initialize the dvobj_priv 
+	padapter->dvobj_init=&pci_dvobj_init;
+	padapter->dvobj_deinit=&pci_dvobj_deinit;
+	padapter->intf_start=&pci_intf_start;
+	padapter->intf_stop=&pci_intf_stop;
+
+	if (padapter->dvobj_init == NULL){
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("\n Initialize dvobjpriv.dvobj_init error!!!\n"));
+		goto error;
+	}
+
+	status = padapter->dvobj_init(padapter);	
+	if (status != _SUCCESS) {
+		RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("initialize device object priv Failed!\n"));
+		goto error;
+	}
+
+	pnetdev->irq = pdev->irq;
+
+	//step 4. read efuse/eeprom data and get mac_addr
+	intf_read_chip_info(padapter);	
+
+	//step 5. 
+	status = rtw_init_drv_sw(padapter);
+	if(status ==_FAIL){
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("Initialize driver software resource Failed!\n"));
+		goto error;
+	}
+
+	status = padapter->HalFunc.inirp_init(padapter);
+	if(status ==_FAIL){
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("Initialize PCI desc ring Failed!\n"));
+		goto error;
+	}
+
+	rtw_macaddr_cfg(padapter->eeprompriv.mac_addr);
+
+	_rtw_memcpy(pnetdev->dev_addr, padapter->eeprompriv.mac_addr, ETH_ALEN);
+	DBG_8192C("MAC Address from pnetdev->dev_addr= "MAC_FMT"\n", MAC_ARG(pnetdev->dev_addr));	
+
+
+	padapter->HalFunc.disable_interrupt(padapter);
+
+#if defined(IRQF_SHARED)
+	err = request_irq(pdev->irq, &rtw_pci_interrupt, IRQF_SHARED, DRV_NAME, padapter);
+#else
+	err = request_irq(pdev->irq, &rtw_pci_interrupt, SA_SHIRQ, DRV_NAME, padapter);
+#endif
+	if (err) {
+		DBG_8192C("Error allocating IRQ %d",pdev->irq);
+		goto error;
+	} else {
+		pdvobjpriv->irq_alloc = 1;
+		DBG_8192C("Request_irq OK, IRQ %d\n",pdev->irq);
+	}
+
+	//step 6. Init pci related configuration
+	rtw_pci_initialize_adapter_common(padapter);
+
+	//step 7.
+	/* Tell the network stack we exist */
+	if (register_netdev(pnetdev) != 0) {
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("register_netdev() failed\n"));
+		goto error;
+	}
+
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-drv_init - Adapter->bDriverStopped=%d, Adapter->bSurpriseRemoved=%d\n",padapter->bDriverStopped, padapter->bSurpriseRemoved));
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-871x_drv - drv_init, success!\n"));
+	//DBG_8192C("-871x_drv - drv_init, success!\n");
+
+#ifdef CONFIG_PROC_DEBUG
+#ifdef RTK_DMP_PLATFORM
+	rtw_proc_init_one(pnetdev);
+#endif
+#endif
+
+#ifdef CONFIG_HOSTAPD_MLME
+	hostapd_mode_init(padapter);
+#endif
+
+#ifdef CONFIG_PLATFORM_RTD2880B
+	DBG_8192C("wlan link up\n");
+	rtd2885_wlan_netlink_sendMsg("linkup", "8712");
+#endif
+
+	return 0;
+
+error:
+
+	pci_set_drvdata(pdev, NULL);
+
+	if (pdvobjpriv->irq_alloc) {
+		free_irq(pdev->irq, padapter);
+		pdvobjpriv->irq_alloc = 0;
+	}
+
+	if (pdvobjpriv->pci_mem_start != 0) {
+		pci_iounmap(pdev, (void *)pdvobjpriv->pci_mem_start);
+	}
+
+	pci_dvobj_deinit(padapter);
+
+	if (pnetdev)
+	{
+		//unregister_netdev(pnetdev);
+		rtw_free_netdev(pnetdev);
+	}
+
+fail2:
+	pci_release_regions(pdev);
+
+fail1:
+	pci_disable_device(pdev);
+
+	DBG_8192C("-871x_pci - drv_init, fail!\n");
+
+	return err;
+}
+
+/*
+ * dev_remove() - our device is being removed
+*/
+//rmmod module & unplug(SurpriseRemoved) will call r871xu_dev_remove() => how to recognize both
+static void rtw_dev_remove(struct pci_dev *pdev)
+{
+	struct net_device *pnetdev=pci_get_drvdata(pdev);
+	_adapter *padapter = (_adapter*)rtw_netdev_priv(pnetdev);
+	struct dvobj_priv *pdvobjpriv = &padapter->dvobjpriv;
+
+_func_exit_;
+
+	if (unlikely(!padapter)) {
+		return;
+	}
+
+	DBG_8192C("+rtw_dev_remove\n");
+
+	LeaveAllPowerSaveMode(padapter);
+
+#ifdef RTK_DMP_PLATFORM    
+	padapter->bSurpriseRemoved = _FALSE;	// always trate as device exists
+                                                // this will let the driver to disable it's interrupt
+#else	
+	if(drvpriv.drv_registered == _TRUE)
+	{
+		//DBG_8192C("r871xu_dev_remove():padapter->bSurpriseRemoved == _TRUE\n");
+		padapter->bSurpriseRemoved = _TRUE;
+	}
+	/*else
+	{
+		//DBG_8192C("r871xu_dev_remove():module removed\n");
+		padapter->hw_init_completed = _FALSE;
+	}*/
+#endif
+
+
+#ifdef CONFIG_AP_MODE
+		free_mlme_ap_info(padapter);
+#ifdef CONFIG_HOSTAPD_MLME
+		hostapd_mode_unload(padapter);
+#endif //CONFIG_HOSTAPD_MLME
+#endif //CONFIG_AP_MODE
+
+	if(pnetdev){
+		unregister_netdev(pnetdev); //will call netdev_close()
+#ifdef CONFIG_PROC_DEBUG
+		rtw_proc_remove_one(pnetdev);
+#endif
+	}
+
+	rtw_cancel_all_timer(padapter);
+
+	rtw_dev_unload(padapter);
+
+	DBG_8192C("+r871xu_dev_remove, hw_init_completed=%d\n", padapter->hw_init_completed);
+
+	if (pdvobjpriv->irq_alloc) {
+		free_irq(pdev->irq, padapter);
+		pdvobjpriv->irq_alloc = 0;
+	}
+
+	if (pdvobjpriv->pci_mem_start != 0) {
+		pci_iounmap(pdev, (void *)pdvobjpriv->pci_mem_start);
+		pci_release_regions(pdev);
+	}
+
+	pci_disable_device(pdev);
+	pci_set_drvdata(pdev, NULL);
+
+	padapter->HalFunc.inirp_deinit(padapter);
+	//s6.
+	if(padapter->dvobj_deinit)
+	{
+		padapter->dvobj_deinit(padapter);
+	}
+	else
+	{
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("Initialize hcipriv.hci_priv_init error!!!\n"));
+	}
+	
+	rtw_free_drv_sw(padapter);
+
+	//after rtw_free_drv_sw(), padapter has beed freed, don't refer to it.
+
+	DBG_8192C("-r871xu_dev_remove, done\n");
+
+#ifdef CONFIG_PLATFORM_RTD2880B
+	DBG_8192C("wlan link down\n");
+	rtd2885_wlan_netlink_sendMsg("linkdown", "8712");
+#endif
+
+_func_exit_;
+
+	return;
+
+}
+
+
+static int __init rtw_drv_entry(void)
+{
+	int ret = 0;
+
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+rtw_drv_entry\n"));
+	DBG_8192C("rtw driver version=%s\n", DRIVERVERSION);
+	drvpriv.drv_registered = _TRUE;
+	ret = pci_register_driver(&drvpriv.rtw_pci_drv);
+	if (ret) {
+		RT_TRACE(_module_hci_intfs_c_, _drv_err_, (": No device found\n"));
+	}
+
+	return ret;
+}
+
+static void __exit rtw_drv_halt(void)
+{
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+rtw_drv_halt\n"));
+	DBG_8192C("+rtw_drv_halt\n");
+	drvpriv.drv_registered = _FALSE;
+	pci_unregister_driver(&drvpriv.rtw_pci_drv);
+	DBG_8192C("-rtw_drv_halt\n");
+}
+
+
+module_init(rtw_drv_entry);
+module_exit(rtw_drv_halt);
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/os_dep/linux/recv_linux.c linux-3.0.82x/drivers/net/wireless/rtl8188/os_dep/linux/recv_linux.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/os_dep/linux/recv_linux.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/os_dep/linux/recv_linux.c	2017-09-23 03:42:50.078674881 +0800
@@ -0,0 +1,445 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _RECV_OSDEP_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+#include <wifi.h>
+#include <recv_osdep.h>
+
+#include <osdep_intf.h>
+#include <ethernet.h>
+
+#ifdef CONFIG_USB_HCI
+#include <usb_ops.h>
+#endif
+
+//init os related resource in struct recv_priv
+int rtw_os_recv_resource_init(struct recv_priv *precvpriv, _adapter *padapter)
+{	
+	int	res=_SUCCESS;
+
+	return res;
+}
+
+//alloc os related resource in union recv_frame
+int rtw_os_recv_resource_alloc(_adapter *padapter, union recv_frame *precvframe)
+{	
+	int	res=_SUCCESS;
+	
+	precvframe->u.hdr.pkt_newalloc = precvframe->u.hdr.pkt = NULL;
+
+	return res;
+
+}
+
+//free os related resource in union recv_frame
+void rtw_os_recv_resource_free(struct recv_priv *precvpriv)
+{
+
+}
+
+
+//alloc os related resource in struct recv_buf
+int rtw_os_recvbuf_resource_alloc(_adapter *padapter, struct recv_buf *precvbuf)
+{
+	int res=_SUCCESS;
+
+#ifdef CONFIG_USB_HCI	
+	struct dvobj_priv	*pdvobjpriv = &padapter->dvobjpriv;
+	struct usb_device	*pusbd = pdvobjpriv->pusbdev;
+
+	precvbuf->irp_pending = _FALSE;
+	precvbuf->purb = usb_alloc_urb(0, GFP_KERNEL);
+	if(precvbuf->purb == NULL){
+		res = _FAIL;
+	}
+
+	precvbuf->pskb = NULL;
+
+	precvbuf->reuse = _FALSE;
+
+	precvbuf->pallocated_buf  = precvbuf->pbuf = NULL;
+
+	precvbuf->pdata = precvbuf->phead = precvbuf->ptail = precvbuf->pend = NULL;
+
+	precvbuf->transfer_len = 0;
+
+	precvbuf->len = 0;
+	
+	#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX
+	precvbuf->pallocated_buf = rtw_usb_buffer_alloc(pusbd, (size_t)precvbuf->alloc_sz, GFP_ATOMIC, &precvbuf->dma_transfer_addr);
+	precvbuf->pbuf = precvbuf->pallocated_buf;
+	if(precvbuf->pallocated_buf == NULL)
+		return _FAIL;
+	#endif //CONFIG_USE_USB_BUFFER_ALLOC_RX
+	
+#endif //CONFIG_USB_HCI
+
+	
+#ifdef CONFIG_SDIO_HCI
+	precvbuf->pskb = NULL;
+
+	precvbuf->pallocated_buf  = precvbuf->pbuf = NULL;
+
+	precvbuf->pdata = precvbuf->phead = precvbuf->ptail = precvbuf->pend = NULL;
+
+	precvbuf->len = 0;
+#endif
+	return res;
+	
+}
+
+//free os related resource in struct recv_buf
+int rtw_os_recvbuf_resource_free(_adapter *padapter, struct recv_buf *precvbuf)
+{
+	int ret = _SUCCESS;
+
+#ifdef CONFIG_USB_HCI
+
+#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX
+
+	struct dvobj_priv	*pdvobjpriv = &padapter->dvobjpriv;
+	struct usb_device	*pusbd = pdvobjpriv->pusbdev;
+
+	rtw_usb_buffer_free(pusbd, (size_t)precvbuf->alloc_sz, precvbuf->pallocated_buf, precvbuf->dma_transfer_addr);
+	precvbuf->pallocated_buf =  NULL;
+	precvbuf->dma_transfer_addr = 0;
+
+#endif //CONFIG_USE_USB_BUFFER_ALLOC_RX
+
+	if(precvbuf->purb)
+	{
+		//usb_kill_urb(precvbuf->purb);
+		usb_free_urb(precvbuf->purb);
+	}
+	
+#endif //CONFIG_USB_HCI
+
+
+	if(precvbuf->pskb)
+		dev_kfree_skb_any(precvbuf->pskb);
+	
+
+	return ret;
+
+}
+
+void rtw_handle_tkip_mic_err(_adapter *padapter,u8 bgroup)
+{
+	union iwreq_data wrqu;
+	struct iw_michaelmicfailure    ev;
+	struct mlme_priv		*pmlmepriv  = &padapter->mlmepriv;
+	struct security_priv	*psecuritypriv = &padapter->securitypriv;
+	u32 cur_time = 0;
+	
+	if( psecuritypriv->last_mic_err_time == 0 )
+	{
+		psecuritypriv->last_mic_err_time = rtw_get_current_time();
+	}
+	else
+	{
+		cur_time = rtw_get_current_time();
+
+		if( cur_time - psecuritypriv->last_mic_err_time < 60*HZ )
+		{
+			psecuritypriv->btkip_countermeasure = _TRUE;
+			psecuritypriv->last_mic_err_time = 0;
+			psecuritypriv->btkip_countermeasure_time = cur_time;
+		}
+		else
+		{
+			psecuritypriv->last_mic_err_time = rtw_get_current_time();
+		}
+	}
+
+	_rtw_memset( &ev, 0x00, sizeof( ev ) );
+	if ( bgroup )
+	{
+		ev.flags |= IW_MICFAILURE_GROUP;
+	}
+	else
+	{
+		ev.flags |= IW_MICFAILURE_PAIRWISE;
+	}
+
+	ev.src_addr.sa_family = ARPHRD_ETHER;
+	_rtw_memcpy( ev.src_addr.sa_data, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN );
+
+	_rtw_memset( &wrqu, 0x00, sizeof( wrqu ) );
+	wrqu.data.length = sizeof( ev );
+
+	wireless_send_event( padapter->pnetdev, IWEVMICHAELMICFAILURE, &wrqu, (char*) &ev );
+}
+
+void rtw_hostapd_mlme_rx(_adapter *padapter, union recv_frame *precv_frame)
+{
+#ifdef CONFIG_HOSTAPD_MLME	
+	_pkt *skb;
+	struct hostapd_priv *phostapdpriv  = padapter->phostapdpriv;
+	struct net_device *pmgnt_netdev = phostapdpriv->pmgnt_netdev;
+	
+	RT_TRACE(_module_recv_osdep_c_, _drv_info_, ("+rtw_hostapd_mlme_rx\n"));
+	
+	skb = precv_frame->u.hdr.pkt;	       
+	
+	if (skb == NULL) 
+		return;
+	
+	skb->data = precv_frame->u.hdr.rx_data;
+	skb->tail = precv_frame->u.hdr.rx_tail;	
+	skb->len = precv_frame->u.hdr.len;
+
+	//pskb_copy = skb_copy(skb, GFP_ATOMIC);	
+//	if(skb == NULL) goto _exit;
+
+	skb->dev = pmgnt_netdev;
+	skb->ip_summed = CHECKSUM_NONE;	
+	skb->pkt_type = PACKET_OTHERHOST;
+	//skb->protocol = __constant_htons(0x0019); /*ETH_P_80211_RAW*/
+	skb->protocol = __constant_htons(0x0003); /*ETH_P_80211_RAW*/
+	
+	//DBG_8192C("(1)data=0x%x, head=0x%x, tail=0x%x, mac_header=0x%x, len=%d\n", skb->data, skb->head, skb->tail, skb->mac_header, skb->len);
+
+	//skb->mac.raw = skb->data;
+	skb_reset_mac_header(skb);
+
+       //skb_pull(skb, 24);
+       _rtw_memset(skb->cb, 0, sizeof(skb->cb));        
+
+	netif_rx(skb);
+
+	precv_frame->u.hdr.pkt = NULL; // set pointer to NULL before rtw_free_recvframe() if call netif_rx()
+#endif	
+}
+
+int rtw_recv_indicatepkt(_adapter *padapter, union recv_frame *precv_frame)
+{	
+	struct recv_priv *precvpriv;
+	_queue	*pfree_recv_queue;
+	_pkt *skb;
+	struct mlme_priv*pmlmepriv = &padapter->mlmepriv;
+#ifdef CONFIG_TCP_CSUM_OFFLOAD_RX
+	struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib;
+#endif
+
+#ifdef CONFIG_BR_EXT
+	void *br_port = NULL;
+#endif
+
+_func_enter_;
+
+	precvpriv = &(padapter->recvpriv);	
+	pfree_recv_queue = &(precvpriv->free_recv_queue);	
+
+#ifdef CONFIG_DRVEXT_MODULE		
+	if (drvext_rx_handler(padapter, precv_frame->u.hdr.rx_data, precv_frame->u.hdr.len) == _SUCCESS)
+	{		
+		goto _recv_indicatepkt_drop;
+	}
+#endif
+
+	skb = precv_frame->u.hdr.pkt;	       
+	if(skb == NULL)
+	{        
+		RT_TRACE(_module_recv_osdep_c_,_drv_err_,("rtw_recv_indicatepkt():skb==NULL something wrong!!!!\n"));		   
+		goto _recv_indicatepkt_drop;
+	}
+
+	RT_TRACE(_module_recv_osdep_c_,_drv_info_,("rtw_recv_indicatepkt():skb != NULL !!!\n"));		
+	RT_TRACE(_module_recv_osdep_c_,_drv_info_,("rtw_recv_indicatepkt():precv_frame->u.hdr.rx_head=%p  precv_frame->hdr.rx_data=%p\n", precv_frame->u.hdr.rx_head, precv_frame->u.hdr.rx_data));
+	RT_TRACE(_module_recv_osdep_c_,_drv_info_,("precv_frame->hdr.rx_tail=%p precv_frame->u.hdr.rx_end=%p precv_frame->hdr.len=%d \n", precv_frame->u.hdr.rx_tail, precv_frame->u.hdr.rx_end, precv_frame->u.hdr.len));
+
+	skb->data = precv_frame->u.hdr.rx_data;
+
+#ifdef NET_SKBUFF_DATA_USES_OFFSET	
+	skb_set_tail_pointer(skb, precv_frame->u.hdr.len);
+#else
+	skb->tail = precv_frame->u.hdr.rx_tail;
+#endif
+
+	skb->len = precv_frame->u.hdr.len;
+
+	RT_TRACE(_module_recv_osdep_c_,_drv_info_,("\n skb->head=%p skb->data=%p skb->tail=%p skb->end=%p skb->len=%d\n", skb->head, skb->data, skb->tail, skb->end, skb->len));
+
+	if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)	 	
+	{
+	 	_pkt *pskb2=NULL;
+	 	struct sta_info *psta = NULL;
+	 	struct sta_priv *pstapriv = &padapter->stapriv;
+		struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib;
+		int bmcast = IS_MCAST(pattrib->dst);
+
+		//DBG_871X("bmcast=%d\n", bmcast);
+
+		if(_rtw_memcmp(pattrib->dst, myid(&padapter->eeprompriv), ETH_ALEN)==_FALSE)
+		{
+			//DBG_871X("not ap psta=%p, addr=%pM\n", psta, pattrib->dst);
+
+			if(bmcast)
+			{
+				psta = rtw_get_bcmc_stainfo(padapter);
+				pskb2 = skb_clone(skb, GFP_ATOMIC);
+			} else {
+				psta = rtw_get_stainfo(pstapriv, pattrib->dst);
+			}
+
+			if(psta)
+			{
+				//DBG_871X("directly forwarding to the rtw_xmit_entry\n");
+
+				//skb->ip_summed = CHECKSUM_NONE;
+				//skb->protocol = eth_type_trans(skb, pnetdev);
+
+				skb->dev = padapter->pnetdev;
+				rtw_xmit_entry(skb, padapter->pnetdev);
+
+				if(bmcast)
+					skb = pskb2;
+				else
+					goto _recv_indicatepkt_end;
+			}
+
+
+		}
+		else// to APself
+		{
+			//DBG_871X("to APSelf\n");
+		}
+	}
+	
+
+#ifdef CONFIG_BR_EXT
+
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35))
+	br_port = padapter->pnetdev->br_port;
+#else   // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35))
+	rcu_read_lock();
+	br_port = rcu_dereference(padapter->pnetdev->rx_handler_data);
+	rcu_read_unlock();
+#endif  // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35))
+
+	if( br_port && (check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE) )	 	
+	{
+		int nat25_handle_frame(_adapter *priv, struct sk_buff *skb);
+		if (nat25_handle_frame(padapter, skb) == -1) {
+			//priv->ext_stats.rx_data_drops++;
+			//DEBUG_ERR("RX DROP: nat25_handle_frame fail!\n");
+			//return FAIL;
+#if 1			
+			// bypass this frame to upper layer!!
+#else
+			goto _recv_indicatepkt_drop;
+#endif
+		}	
+	}
+
+#endif	// CONFIG_BR_EXT
+
+
+#ifdef CONFIG_TCP_CSUM_OFFLOAD_RX
+	if ( (pattrib->tcpchk_valid == 1) && (pattrib->tcp_chkrpt == 1) ) {
+		skb->ip_summed = CHECKSUM_UNNECESSARY;
+		//DBG_8192C("CHECKSUM_UNNECESSARY \n");
+	} else {
+		skb->ip_summed = CHECKSUM_NONE;
+		//DBG_8192C("CHECKSUM_NONE(%d, %d) \n", pattrib->tcpchk_valid, pattrib->tcp_chkrpt);
+	}
+#else /* !CONFIG_TCP_CSUM_OFFLOAD_RX */
+
+	skb->ip_summed = CHECKSUM_NONE;
+
+#endif
+
+	skb->dev = padapter->pnetdev;
+	skb->protocol = eth_type_trans(skb, padapter->pnetdev);
+
+	netif_rx(skb);
+
+_recv_indicatepkt_end:
+
+	precv_frame->u.hdr.pkt = NULL; // pointers to NULL before rtw_free_recvframe()
+
+	rtw_free_recvframe(precv_frame, pfree_recv_queue);
+
+	RT_TRACE(_module_recv_osdep_c_,_drv_info_,("\n rtw_recv_indicatepkt :after netif_rx!!!!\n"));
+
+_func_exit_;		
+
+        return _SUCCESS;		
+
+_recv_indicatepkt_drop:
+
+	 //enqueue back to free_recv_queue	
+	 if(precv_frame)
+		 rtw_free_recvframe(precv_frame, pfree_recv_queue);
+
+	 
+ 	 precvpriv->rx_drop++;	
+
+	 return _FAIL;
+
+_func_exit_;
+
+}
+
+void rtw_os_read_port(_adapter *padapter, struct recv_buf *precvbuf)
+{	
+	struct recv_priv *precvpriv = &padapter->recvpriv;
+
+#ifdef CONFIG_USB_HCI
+
+	precvbuf->ref_cnt--;
+
+	//free skb in recv_buf
+	dev_kfree_skb_any(precvbuf->pskb);
+
+	precvbuf->pskb = NULL;
+	precvbuf->reuse = _FALSE;
+
+	if(precvbuf->irp_pending == _FALSE)
+	{
+		rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
+	}	
+		
+
+#endif
+#ifdef CONFIG_SDIO_HCI
+		precvbuf->pskb = NULL;
+#endif
+
+}
+void _rtw_reordering_ctrl_timeout_handler (void *FunctionContext);
+void _rtw_reordering_ctrl_timeout_handler (void *FunctionContext)
+{
+	struct recv_reorder_ctrl *preorder_ctrl = (struct recv_reorder_ctrl *)FunctionContext;
+	rtw_reordering_ctrl_timeout_handler(preorder_ctrl);
+}
+
+void rtw_init_recv_timer(struct recv_reorder_ctrl *preorder_ctrl)
+{
+	_adapter *padapter = preorder_ctrl->padapter;
+
+	_init_timer(&(preorder_ctrl->reordering_ctrl_timer), padapter->pnetdev, _rtw_reordering_ctrl_timeout_handler, preorder_ctrl);
+	
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/os_dep/linux/sdio_intf.c linux-3.0.82x/drivers/net/wireless/rtl8188/os_dep/linux/sdio_intf.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/os_dep/linux/sdio_intf.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/os_dep/linux/sdio_intf.c	2017-09-23 03:42:50.078674881 +0800
@@ -0,0 +1,922 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#define _HCI_INTF_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <recv_osdep.h>
+#include <xmit_osdep.h>
+
+#include <hal_init.h>
+#include <sdio_hal.h>
+#include <sdio_ops.h>
+#include <linux/mmc/sdio_func.h> 
+#include <linux/mmc/sdio_ids.h>
+extern u32 rtw_start_drv_threads(_adapter *padapter);
+extern void rtw_stop_drv_threads (_adapter *padapter);
+extern u8 rtw_init_drv_sw(_adapter *padapter);
+extern u8 rtw_free_drv_sw(_adapter *padapter);
+extern void rtw_cancel_all_timer(_adapter *padapter);
+extern struct net_device *rtw_init_netdev(_adapter *old_padapter);
+extern void update_recvframe_attrib_from_recvstat(struct rx_pkt_attrib
+*pattrib, struct recv_stat *prxstat);
+static const struct sdio_device_id sdio_ids[] = {
+	{ SDIO_DEVICE(0x024c, 0x8712)		},
+//	{ SDIO_DEVICE_CLASS(SDIO_CLASS_WLAN)		},
+//	{ /* end: all zeroes */				},
+};
+
+typedef struct _driver_priv{
+		struct sdio_driver r871xs_drv;
+}drv_priv, *pdrv_priv;
+
+void	sd_sync_int_hdl(struct sdio_func *func);
+
+extern unsigned int sd_dvobj_init(_adapter * padapter){
+
+	struct dvobj_priv *psddev=&padapter->dvobjpriv;
+	struct sdio_func *func=psddev->func;
+	int ret;
+	_func_enter_;
+	//_rtw_init_sema(&psddev->init_finish,0);
+	sdio_claim_host(func);
+	 ret=sdio_enable_func(func);
+	if(ret){	
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("sd_dvobj_init: sdio_enable_func fail!!!!!\n"));
+		return _FAIL;
+	}
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("sd_dvobj_init: sdio_enable_func success!!!!!\n"));
+	padapter->EepromAddressSize = 6;
+	psddev->tx_block_mode=1;
+	psddev->rx_block_mode=1;
+	sdio_set_block_size(func, 512);
+	psddev->block_transfer_len=512;
+	psddev->blk_shiftbits=9;
+	ret=sdio_claim_irq(func,sd_sync_int_hdl);
+	sdio_release_host(func);
+	psddev->sdio_himr=0xff;
+	if(ret)	
+		return _FAIL;
+	_func_exit_;
+	return _SUCCESS;
+}
+
+extern void sd_dvobj_deinit(_adapter * padapter)
+{
+       unsigned char data;    
+	struct dvobj_priv *psddev=&padapter->dvobjpriv;
+	struct sdio_func *func=psddev->func;
+
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+SDIO deinit\n"));
+	if(func !=0){
+        sdio_claim_host(func);
+       RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" in sd_dvobj_deinit():sdio_claim_host !\n"));
+//        sdio_release_irq(func);
+        RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" in  sd_dvobj_deinit():sdio_release_irq !\n"));
+        sdio_disable_func(func);
+      RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" in  sd_dvobj_deinit():sdio_disable_func !\n"));
+        sdio_release_host(func);
+      RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" in  sd_dvobj_deinit():sdio_release_host !\n"));
+
+
+	}
+	return;
+}
+
+uint sdbus_read_reg_int(struct intf_priv *pintfpriv, u32 addr, u32 cnt, void *pdata)
+{
+	struct dvobj_priv *pdvobjpriv = (struct dvobj_priv*)pintfpriv->intf_dev;
+	struct sdio_func *func = pdvobjpriv->func;
+	u8 *mem = NULL;
+	int status;
+
+#ifdef CONFIG_IO_4B
+	u32 addr_org = addr, addr_offset = 0;
+	u32 cnt_org = cnt;
+#endif
+
+_func_enter_;
+
+#ifdef CONFIG_IO_4B
+	addr_offset = addr % 4;
+	if (addr_offset) {
+		addr = addr - addr_offset;
+		cnt = cnt + addr_offset;
+	}
+	if (cnt % 4)
+		cnt = ((cnt + 4) >> 2) << 2;
+#endif
+
+	mem = rtw_malloc(cnt);
+	if (mem == NULL) {
+		RT_TRACE(_module_hci_ops_os_c_, _drv_emerg_,
+			 ("SDIO_STATUS_NO_RESOURCES - memory alloc fail\n"));
+		return _FAIL;
+	}
+
+	status = sdio_memcpy_fromio(func, mem, addr&0x1FFFF, cnt);
+	if (status) {
+		//error
+		RT_TRACE(_module_hci_ops_os_c_, _drv_emerg_,
+			 ("sdbus_read_reg_int error 0x%x\n"
+			  "***** Addr = %x *****\n"
+			  "***** Length = %d *****\n", status, addr, cnt));
+		status = _FAIL;
+	} else {
+#ifdef CONFIG_IO_4B
+		if (cnt != cnt_org)
+			_rtw_memcpy(pdata, mem + addr_offset, cnt_org);
+		else
+#endif
+		_rtw_memcpy(pdata, mem, cnt);
+		status = _SUCCESS;
+	}
+
+	rtw_mfree(mem, cnt);
+
+_func_exit_;
+
+	return status;
+}
+
+void sdio_read_int(_adapter *padapter, u32 addr, u8 sz, void *pdata)
+{
+	struct io_queue	*pio_queue = (struct io_queue*)padapter->pio_queue;
+	struct intf_hdl	*pintfhdl = &pio_queue->intf;
+	struct intf_priv *pintfpriv = pintfhdl->pintfpriv;
+	u32 ftaddr = 0, res;
+
+_func_enter_;
+
+//	RT_TRACE(_module_hci_ops_c_,_drv_err_,("sdio_read_int\n"));
+
+	if ((_cvrt2ftaddr(addr, &ftaddr)) == _SUCCESS) {
+		res = sdbus_read_reg_int(pintfpriv, ftaddr, sz, pdata);
+		if (res != _SUCCESS) {
+			RT_TRACE(_module_hci_ops_c_, _drv_emerg_, ("sdio_read_int fail!!!\n"));
+		}
+	} else {
+		RT_TRACE(_module_hci_ops_c_, _drv_emerg_, (" sdio_read_int address translate error!!!\n"));
+	}
+
+_func_exit_;
+}
+
+uint sdbus_write_reg_int(struct intf_priv *pintfpriv, u32 addr, u32 cnt, void *pdata)
+{
+	struct dvobj_priv *pdvobjpriv = (struct dvobj_priv*)pintfpriv->intf_dev;
+	struct sdio_func *func = pdvobjpriv->func;
+	int status;
+#ifdef CONFIG_IO_4B
+	u32 addr_org = addr, addr_offset = 0;
+	u32 cnt_org = cnt;
+	void *pdata_org = pdata;
+#endif
+
+_func_enter_;
+
+#ifdef CONFIG_IO_4B
+	addr_offset = addr % 4;
+	if (addr_offset) {
+		addr = addr - addr_offset;
+		cnt = cnt + addr_offset;
+	}
+	if (cnt % 4)
+		cnt = ((cnt + 4) >> 2) << 2;
+	if (cnt != cnt_org) {
+		pdata = rtw_malloc(cnt);
+		if (pdata == NULL) {
+			RT_TRACE(_module_hci_ops_os_c_, _drv_emerg_,
+				 ("SDIO_STATUS_NO_RESOURCES - rtw_malloc fail\n"));
+			return _FAIL;
+		}
+		status = sdio_memcpy_fromio(func, pdata, addr&0x1FFFF, cnt);
+		if (status) {
+			RT_TRACE(_module_hci_ops_os_c_,_drv_emerg_,
+				 ("sdbus_write_reg_int read failed 0x%x\n "
+				  "***** Addr = %x *****\n"
+				  "***** Length = %d *****\n", status, addr, cnt));
+			rtw_mfree(pdata, cnt);
+			return _FAIL;
+		}
+		_rtw_memcpy(pdata + addr_offset, pdata_org, cnt_org);
+		/* if data been modify between this read and write, may cause a problem */
+	}
+#endif
+	status = sdio_memcpy_toio(func, addr&0x1FFFF, pdata, cnt);
+	if (status) {
+		//error
+		RT_TRACE(_module_hci_ops_os_c_, _drv_emerg_,
+			 ("sdbus_write_reg_int failed 0x%x\n"
+			  "***** Addr = %x *****\n"
+			  "***** Length = %d *****\n", status, addr, cnt));
+
+		status = _FAIL;
+	} else
+		status = _SUCCESS;
+
+#ifdef CONFIG_IO_4B
+	if (cnt != cnt_org)
+		rtw_mfree(pdata, cnt);
+#endif
+
+_func_exit_;
+
+	return status;
+}
+
+void sdio_write_int(_adapter *padapter, u32 addr, u32 val, u8 sz)
+{
+	struct io_queue	*pio_queue = (struct io_queue*)padapter->pio_queue;
+	struct intf_hdl	*pintfhdl = &pio_queue->intf;
+	struct intf_priv *pintfpriv = pintfhdl->pintfpriv;
+
+	u32 ftaddr = 0, res;
+
+_func_enter_;
+
+//	RT_TRACE(_module_hci_ops_c_,_drv_err_,("sdio_write_int\n"));
+
+	val = cpu_to_le32(val);
+
+	if ((_cvrt2ftaddr(addr, &ftaddr)) == _SUCCESS) {
+		res = sdbus_write_reg_int(pintfpriv, ftaddr, sz, &val);
+		if (res != _SUCCESS) {
+			RT_TRACE(_module_hci_ops_c_, _drv_emerg_, ("sdio_write_int fail!!!\n"));
+		}
+	} else {
+		RT_TRACE(_module_hci_ops_c_, _drv_emerg_, ("sdio_write_int address translate error!!!\n"));
+	}
+
+_func_exit_;
+}
+
+int recvbuf2recvframe_s(_adapter *padapter, struct recv_buf *precvbuf)
+{
+//	_irqL irql;
+	u8 *pbuf;
+//	u8 bsumbit = _FALSE;
+	uint pkt_len, pkt_offset;
+	int transfer_len;
+	struct recv_stat *prxstat;
+	u16 pkt_cnt, drvinfo_sz;
+	_queue *pfree_recv_queue;
+	union recv_frame *precvframe = NULL,*plast_recvframe = NULL;
+	struct recv_priv *precvpriv = &padapter->recvpriv;
+//	struct intf_hdl *pintfhdl = &padapter->pio_queue->intf;
+
+	RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("+recvbuf2recvframe()\n"));
+
+	pfree_recv_queue = &(precvpriv->free_recv_queue);
+
+	pbuf = (u8*)precvbuf->pbuf;
+
+	prxstat = (struct recv_stat *)pbuf;
+/*	{
+		u8 i;
+		DBG_8192C("\n-----recvbuf-----\n");
+		for (i=0;i<64;i=i+8) {
+			DBG_8192C("0x%.2x:0x%.2x:0x%.2x:0x%.2x:0x%.2x:0x%.2x:0x%.2x:0x%.2x\n",pbuf[i],pbuf[i+1],pbuf[i+2],pbuf[i+3],pbuf[i+4],pbuf[i+5],pbuf[i+6],pbuf[i+7]);
+		}
+		DBG_8192C("\n-----recvbuf end-----\n");
+	}*/
+	transfer_len = precvbuf->len;
+	precvbuf->ref_cnt = 1;
+	do {
+		precvframe = NULL;
+		precvframe = rtw_alloc_recvframe(pfree_recv_queue);
+		if (precvframe == NULL){
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe(), precvframe==NULL\n"));
+			break;
+		}
+		if (plast_recvframe != NULL) {
+			if (rtw_recv_entry(plast_recvframe) != _SUCCESS) {
+				RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe(), rtw_recv_entry(precvframe) != _SUCCESS\n"));
+			}
+		}
+		prxstat = (struct recv_stat*)pbuf;
+		pkt_len = le32_to_cpu(prxstat->rxdw0&0x00003fff); //pkt_len = prxstat->frame_length;             
+
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("rxdesc: offsset0:0x%08x, offsset4:0x%08x, offsset8:0x%08x, offssetc:0x%08x\n",prxstat->rxdw0, prxstat->rxdw1, prxstat->rxdw2, prxstat->rxdw4));
+
+		drvinfo_sz = le16_to_cpu((prxstat->rxdw0&0x000f0000)>>16);//uint 2^3 = 8 bytes
+		drvinfo_sz = drvinfo_sz << 3;
+		RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("pkt_len=%d[0x%x] drvinfo_sz=%d[0x%x]\n", pkt_len, pkt_len, drvinfo_sz, drvinfo_sz));
+		precvframe->u.hdr.precvbuf = precvbuf;
+		precvframe->u.hdr.adapter = padapter;
+		rtw_init_recvframe(precvframe, precvpriv);
+
+		precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pbuf;
+		precvframe->u.hdr.rx_end = precvbuf->pend;
+		update_recvframe_attrib_from_recvstat(&precvframe->u.hdr.attrib, prxstat);
+		pkt_offset = pkt_len + drvinfo_sz + RXDESC_SIZE;
+
+		recvframe_put(precvframe, pkt_len + drvinfo_sz + RXDESC_SIZE);
+		recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE);
+/*		{
+			u8 i;
+			DBG_8192C("\n-----packet-----\n");
+			for(i=0;i<32;i++){
+			DBG_8192C("0x%.2x:0x%.2x:0x%.2x:0x%.2x:0x%.2x:0x%.2x:0x%.2x:0x%.2x\n",precvframe->u.hdr.rx_data[i],precvframe->u.hdr.rx_data[i+1],precvframe->u.hdr.rx_data[i+2],precvframe->u.hdr.rx_data[i+3],precvframe->u.hdr.rx_data[i+4],precvframe->u.hdr.rx_data[i+5],precvframe->u.hdr.rx_data[i+6],precvframe->u.hdr.rx_data[i+7]);
+			}
+			DBG_8192C("\n-----packet end-----\n");
+		}*/
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n precvframe->u.hdr.rx_head=%p precvframe->u.hdr.rx_data=%p precvframe->u.hdr.rx_tail=%p precvframe->u.hdr.rx_end=%p\n",precvframe->u.hdr.rx_head,precvframe->u.hdr.rx_data,precvframe->u.hdr.rx_tail,precvframe->u.hdr.rx_end));
+
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\npkt_offset=%d [1]\n",pkt_offset));
+		pkt_offset = _RND512(pkt_offset);
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\npkt_offset=%d [2] transfer_len=%d\n",pkt_offset,transfer_len));
+		transfer_len -= pkt_offset;
+		RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n transfer_len=%d \n",transfer_len));
+		pbuf += pkt_offset;
+		if (transfer_len > 0)
+			precvbuf->ref_cnt++;
+		plast_recvframe = precvframe;
+		precvframe = NULL;
+	} while (transfer_len > 0);
+
+	if (plast_recvframe != NULL) {
+		if (rtw_recv_entry(plast_recvframe) != _SUCCESS) {
+			RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe(), rtw_recv_entry(precvframe) != _SUCCESS\n"));
+		}
+	}
+
+	dev_kfree_skb_any(precvbuf->pskb);
+	precvbuf->pskb = NULL;
+	return _SUCCESS;
+}
+
+u32 read_pkt2recvbuf(PADAPTER padapter, u32 rd_cnt, struct recv_buf *precvbuf)
+{
+	struct recv_priv *precvpriv = &padapter->recvpriv;
+	u32 skb_buf_sz;
+	if (rd_cnt < 1600)
+		skb_buf_sz = 1600;
+	else
+		skb_buf_sz = rd_cnt;
+	RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n read_pkt2recvbuf------skb_buf_sz=%d rd_cnt=%d\n",skb_buf_sz,rd_cnt));
+//	if (precvbuf->pskb != NULL) {
+//		dev_kfree_skb_any(precvbuf->pskb );
+//	}
+
+	//alloc skb
+	{
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html
+		precvbuf->pskb = dev_alloc_skb(skb_buf_sz);
+#else
+		precvbuf->pskb = netdev_alloc_skb(padapter->pnetdev, skb_buf_sz);
+#endif
+		if (precvbuf->pskb == NULL) {
+			RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("==================init_recvbuf(): alloc_skb fail!\n"));
+			return _FAIL;
+		}
+
+		precvbuf->phead = precvbuf->pskb->head;
+		precvbuf->pdata = precvbuf->pskb->data;
+		precvbuf->ptail = precvbuf->pskb->tail;
+		precvbuf->pend = precvbuf->pskb->end;
+		precvbuf->pbuf = precvbuf->pskb->data;
+	}
+//	else {
+//               RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("after init_recvbuf(): skb !=NULL!\n"));
+//	}
+
+	rtw_read_port(padapter, RTL8712_DMA_RX0FF, rd_cnt, (u8*)precvbuf);
+	precvbuf->ptail = precvbuf->ptail + rd_cnt;
+	precvbuf->len = rd_cnt;
+	/*{
+		u32 i;
+		DBG_8192C("-----After read port[%d]-----\n",skb_buf_sz);
+		for (i = 0; i < skb_buf_sz; i = i + 8) {
+			DBG_8192C("0x%x:0x%x:0x%x:0x%x:0x%x:0x%x:0x%x:0x%x\n",precvbuf->pbuf[i],precvbuf->pbuf[i+1],precvbuf->pbuf[i+2],precvbuf->pbuf[i+3],precvbuf->pbuf[i+4],precvbuf->pbuf[i+5],precvbuf->pbuf[i+6],precvbuf->pbuf[i+7]);
+		}
+
+		DBG_8192C("-----------\n");
+	}*/
+#if 1
+	recvbuf2recvframe_s(padapter, precvbuf);
+#else
+{
+	dev_kfree_skb_any(precvbuf->pskb);
+	precvbuf->pskb = NULL;
+	rtw_list_delete(&(precvbuf->list));
+	rtw_list_insert_tail(&precvbuf->list, get_list_head(&precvpriv->free_recv_buf_queue));
+	precvpriv->free_recv_buf_queue_cnt++;
+}
+#endif
+
+	return _SUCCESS;
+}
+
+void sd_recv_rxfifo(PADAPTER padapter);
+#if 0
+void sd_recv_rxfifo(PADAPTER padapter)
+{
+//	u8 *pdata, *ptail, *pfixed_tail,*pfixed_head,*pfixed_end,blk_shift_bit;
+	u16 rx_blknum;
+	u32 blk_sz, cnt;//,remain,tmp_cnt;
+	struct recv_priv *precvpriv;
+//	struct recv_stat *prxstat;
+	//union recv_frame *precvframe, *ppreframe = NULL; 
+//	_queue *pfree_recv_queue, *ppending_recv_queue;
+//	u8 tmp[2048];
+	struct recv_buf *precvbuf;
+	_list *precvbuf_head, *precvbuf_list;
+	_irqL irql, rx_proc_irq;
+//	uint pkt_len;
+//	u16 drvinfo_sz;
+
+	precvpriv = &padapter->recvpriv;
+	blk_sz = padapter->dvobjpriv.block_transfer_len;
+//	blk_shift_bit= (u8)padapter->dvobjpriv.blk_shiftbits;
+//	pfree_recv_queue = &(precvpriv->free_recv_queue);
+//	ppending_recv_queue = &(precvpriv->recv_pending_queue);
+
+	rx_blknum = padapter->dvobjpriv.rxblknum;
+//	_enter_hwio_critical(&padapter->dvobjpriv.rx_protect, &rx_proc_irq);
+//	padapter->dvobjpriv.rxblknum=rtw_read16(padapter, SDIO_RX0_RDYBLK_NUM);
+	sdio_read_int(padapter, SDIO_RX0_RDYBLK_NUM, 2, &padapter->dvobjpriv.rxblknum);
+	if (rx_blknum>padapter->dvobjpriv.rxblknum) {
+		cnt = (0x10000 - rx_blknum + padapter->dvobjpriv.rxblknum) * blk_sz;
+	} else {
+		cnt = (padapter->dvobjpriv.rxblknum-rx_blknum) * blk_sz;
+	}
+	RT_TRACE(_module_hci_intfs_c_,_drv_notice_,("=====================sd_recv_rxfifo  padapter->dvobjpriv.rxblknum=%x Blk_Num = %x   cnt=%d",padapter->dvobjpriv.rxblknum, rx_blknum,cnt));
+        
+	if (cnt == 0) {
+//		remain = 0;
+		precvbuf = NULL;
+		RT_TRACE(_module_hci_intfs_c_,_drv_info_,("---===============sd_recv_rxfifo padapter->dvobjpriv.rxblknum=0x%x padapter->dvobjpriv.rxblknum_rd=0x%x", padapter->dvobjpriv.rxblknum,padapter->dvobjpriv.rxblknum_rd));
+		goto drop_pkt;
+	}
+
+	if(_rtw_queue_empty(&precvpriv->free_recv_buf_queue) == _TRUE)
+	{
+		precvbuf = NULL;
+		RT_TRACE(_module_hci_intfs_c_,_drv_emerg_,("\n sd_recv_rxfifo : precvbuf= NULL precvpriv->free_recv_buf_queue_cnt=%d \n",precvpriv->free_recv_buf_queue_cnt));
+		goto drop_pkt;
+	}
+	else
+	{
+		_enter_critical(&precvpriv->free_recv_buf_queue.lock, &irql);
+		precvbuf_head = get_list_head(&precvpriv->free_recv_buf_queue);
+		precvbuf_list = get_next(precvbuf_head);
+		precvbuf = LIST_CONTAINOR(precvbuf_list, struct recv_buf, list);
+		rtw_list_delete(&precvbuf->list);
+		precvpriv->free_recv_buf_queue_cnt--;
+
+		RT_TRACE(_module_hci_intfs_c_,_drv_notice_,("\n sd_recv_rxfifo : precvbuf= 0x%p  dequeue: free_recv_buf_queue_cnt=%d\n",precvbuf,precvpriv->free_recv_buf_queue_cnt));
+		_exit_critical(&precvpriv->free_recv_buf_queue.lock, &irql);
+	}
+	read_pkt2recvbuf(padapter, cnt, precvbuf);
+
+	return;	
+
+drop_pkt:
+
+	if (cnt >0) {
+		do{
+			if (cnt > MAX_RECVBUF_SZ) {
+				rtw_read_port(padapter, 0x10380000, MAX_RECVBUF_SZ, (u8 *)precvpriv->recvbuf_drop);
+				RT_TRACE(_module_hci_intfs_c_,_drv_notice_,("=========sd_recv_rxfifo precvbuf= NULL  no recvbuf    cnt=%d  tmp read %d",cnt,MAX_RECVBUF_SZ));
+				cnt=cnt-MAX_RECVBUF_SZ;
+			} else {
+				rtw_read_port(padapter, 0x10380000, cnt, (u8 *)precvpriv->recvbuf_drop);
+				RT_TRACE(_module_hci_intfs_c_,_drv_notice_,("=========sd_recv_rxfifo precvbuf= NULL  no recvbuf    cnt=%d  tmp read(@) %d",cnt,cnt));
+				cnt=0;
+			}
+		} while(cnt > 0);
+	}
+
+	return;
+}
+#endif
+#if 0
+void sd_c2h_hdl(PADAPTER padapter)
+{
+	u8 cmd_seq, pkt_num = 0;
+	u16 tmp16, sz, cmd_len = 0;
+	u32 rd_sz=0, cmd_sz = 0;//,ptr;
+	struct evt_priv *pevtpriv = &padapter->evtpriv;
+	pkt_num = rtw_read8(padapter, 0x102500BF);
+//	RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("@ sd_c2h_hdl:pkt_num=%d",pkt_num));
+get_next:
+//	ptr=rtw_read32(padapter,0x102500e8);
+//	RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("@ sd_c2h_hdl:C2H fifo RDPTR=0x%x",ptr));
+//	ptr=rtw_read32(padapter,0x102500ec);
+//	RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("@ sd_c2h_hdl:C2H fifo WTPTR=0x%x",ptr));
+//	if(pkt_num==0x0 ){
+//	RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("@ sd_c2h_hdl:cmd_pkt num=0x%x!",pkt_num));
+//		return;
+//	}
+	RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("@ sd_c2h_hdl:pkt_num=%d",pkt_num));
+	//memset(pevtpriv->c2h_mem,0,512);
+	rtw_read_port(padapter, RTL8712_DMA_C2HCMD, 512, pevtpriv->c2h_mem);
+	cmd_sz = *(u16 *)&pevtpriv->c2h_mem[0];
+	cmd_sz &= 0x3fff;
+	RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("sd_c2h_hdl: cmd_sz=%d[0x%x]!",cmd_sz,cmd_sz));
+	tmp16 = *(u16 *)&pevtpriv->c2h_mem[4];
+	tmp16 &= 0x01ff;
+	if (tmp16 !=0x1ff) {
+		RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("sd_c2h_hdl: 0x1ff error[0x%x]!",pevtpriv->c2h_mem[4]));
+		goto exit;
+	}
+	if((cmd_sz+24) >512){
+		rtw_read_port(padapter, RTL8712_DMA_C2HCMD, (cmd_sz+24-512), pevtpriv->c2h_mem+512);
+		RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("sd_c2h_hdl: read the second part of c2h event!"));
+	}
+	cmd_seq = pevtpriv->c2h_mem[27];
+	cmd_seq &= 0x7f;
+	if (pevtpriv->event_seq != cmd_seq) {
+		RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("sd_c2h_hdl: pevtpriv->event_seq (%d) != c2hbuf seq(%d)",pevtpriv->event_seq,cmd_seq));
+	} else {
+		RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("sd_c2h_hdl: pevtpriv->event_seq (%d) == c2hbuf seq(%d)",pevtpriv->event_seq,cmd_seq));
+	}
+	cmd_len = *(u16 *)&pevtpriv->c2h_mem[0];	
+	cmd_len &= 0x3ff;
+	RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("@sd_c2h_hdl: cmd_len=%d",cmd_len));
+//	if(cmd_len){
+//		memset(pevtpriv->c2h_mem+cmd_len,0,cmd_len);
+//	rtw_read_port(padapter, RTL8712_DMA_C2HCMD, cmd_len, pevtpriv->c2h_mem+cmd_len);
+//	}
+//	pevtpriv->event_seq=pevtpriv->event_seq++;
+//	if(pevtpriv->event_seq>127)
+//		pevtpriv->event_seq=0;
+
+	RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("sd_c2h_hdl:!"));
+	rxcmd_event_hdl(padapter,pevtpriv->c2h_mem);
+	if (pkt_num > 1) {
+		pkt_num--;
+		RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("sd_c2h_hdl: pkt_num=%d",pkt_num));
+		goto get_next;
+	}
+
+exit:
+
+	return;
+}
+#endif
+void update_free_ffsz_int(_adapter *padapter )
+{
+	struct xmit_priv *pxmitpriv=&padapter->xmitpriv;
+	RT_TRACE(_module_hci_ops_c_,_drv_err_,("\n====(before)=padapter->xmitpriv.public_pgsz=0x%x====update_free_ffsz:  free_pg=0x%x:0x%x:0x%x:0x%x:0x%x:0x%x:0x%x:0x%x \n",
+			padapter->xmitpriv.public_pgsz,
+			pxmitpriv->free_pg[0],pxmitpriv->free_pg[1],pxmitpriv->free_pg[2],pxmitpriv->free_pg[3],
+			pxmitpriv->free_pg[4],pxmitpriv->free_pg[5],pxmitpriv->free_pg[6],pxmitpriv->free_pg[7]));
+//	rtw_read_mem(padapter,SDIO_BCNQ_FREEPG,8,pxmitpriv->free_pg);
+	sdio_read_int(padapter, SDIO_BCNQ_FREEPG, 8, pxmitpriv->free_pg);
+	padapter->xmitpriv.public_pgsz = pxmitpriv->free_pg[0];
+	if (pxmitpriv->public_pgsz > pxmitpriv->init_pgsz) {
+		pxmitpriv->init_pgsz = pxmitpriv->public_pgsz;
+	}
+
+	{
+		u8 diff;
+		if (pxmitpriv->public_pgsz > (pxmitpriv->init_pgsz - pxmitpriv->used_pgsz)) {
+			RT_TRACE(_module_hci_ops_c_,_drv_err_,("\n====(0)=====update_free_ffsz: pxmitpriv->public_pgsz=0x%x pxmitpriv->init_pgsz=0x%x  pxmitpriv->used_pgsz=0x%x \n",pxmitpriv->public_pgsz ,pxmitpriv->init_pgsz, pxmitpriv->used_pgsz));
+			diff = pxmitpriv->public_pgsz - (pxmitpriv->init_pgsz - pxmitpriv->used_pgsz);
+			pxmitpriv->used_pgsz = pxmitpriv->used_pgsz - diff;
+//			pxmitpriv->required_pgsz = pxmitpriv->required_pgsz - diff;
+			RT_TRACE(_module_hci_ops_c_,_drv_err_,("\n====(1)=====update_free_ffsz: pxmitpriv->public_pgsz =0x%x diff=0x%x pxmitpriv->used_pgsz=0x%x pxmitpriv->required_pgsz=0x%x\n",pxmitpriv->public_pgsz,diff,pxmitpriv->used_pgsz,pxmitpriv->required_pgsz) );
+		} else {
+
+		}
+	}
+
+	RT_TRACE(_module_hci_ops_c_,_drv_err_,("\n====(after)=====update_free_ffsz:  free_pg=0x%x:0x%x:0x%x:0x%x:0x%x:0x%x:0x%x:0x%x \n",
+		pxmitpriv->free_pg[0],pxmitpriv->free_pg[1],pxmitpriv->free_pg[2],pxmitpriv->free_pg[3],
+		pxmitpriv->free_pg[4],pxmitpriv->free_pg[5],pxmitpriv->free_pg[6],pxmitpriv->free_pg[7]));
+
+	return;
+}
+
+void sd_int_dpc(PADAPTER padapter);
+#if 0
+void sd_int_dpc(PADAPTER padapter)
+{
+	uint 	tasks= (padapter->IsrContent /*& padapter->ImrContent*/);
+//	rtw_write16(padapter,SDIO_HIMR,0);
+
+	RT_TRACE(_module_hci_intfs_c_,_drv_notice_,(" sd_int_dpc[0x%x] ",padapter->IsrContent));
+
+	if ((tasks & _VOQ_AVAL_IND) || (tasks & _VIQ_AVAL_IND) || (tasks & _BEQ_AVAL_IND) || (tasks & _BKQ_AVAL_IND) || (tasks & _BMCQ_AVAL_IND)) {
+		RT_TRACE(_module_hci_intfs_c_,_drv_notice_,("==============INT : _TXDONE"));
+		update_free_ffsz_int(padapter);
+	} else {
+		if (((padapter->xmitpriv.init_pgsz - padapter->xmitpriv.used_pgsz) > 0 && (padapter->xmitpriv.init_pgsz - padapter->xmitpriv.used_pgsz) < 0x2f) || padapter->xmitpriv.required_pgsz > 0) {
+			RT_TRACE(_module_hci_intfs_c_,_drv_notice_,("==============padapter->xmitpriv.public_pgsz[0x%x] <30 ",padapter->xmitpriv.public_pgsz));
+			update_free_ffsz_int(padapter);
+		}
+	}
+
+	if(tasks & _C2HCMD)
+	{
+//		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("======C2H_CMD========"));
+		padapter->IsrContent  ^= _C2HCMD;
+		sd_c2h_hdl(padapter);
+//		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("======C2H_CMD[end]========"));
+	}
+
+	if(tasks & _RXDONE)
+	{
+		RT_TRACE(_module_hci_intfs_c_,_drv_notice_,("==============INT : _RXDONE"));
+		padapter->IsrContent  ^= _RXDONE;
+		sd_recv_rxfifo(padapter);
+	}
+
+}
+#endif
+void sd_sync_int_hdl(struct sdio_func *func)
+{
+	struct dvobj_priv *psdpriv = sdio_get_drvdata(func);
+	_adapter *padapter = (_adapter*)psdpriv->padapter;
+	u16 tmp16;
+//	uint tasks;
+
+_func_enter_;
+
+	if ((padapter->bDriverStopped ==_TRUE) || (padapter->bSurpriseRemoved == _TRUE)) {
+		goto exit;
+	}
+
+	//padapter->IsrContent=rtw_read16(padapter, SDIO_HISR);
+	sdio_read_int(padapter, SDIO_HISR, 2, &psdpriv->sdio_hisr);
+
+	if (psdpriv->sdio_hisr & psdpriv->sdio_himr)
+	{
+		sdio_write_int(padapter, SDIO_HIMR, 0, 2);
+		sd_int_dpc(padapter);
+		sdio_write_int(padapter, SDIO_HIMR, psdpriv->sdio_himr, 2);
+
+		sdio_read_int(padapter, SDIO_HIMR, 2, &tmp16);
+		if (tmp16 != psdpriv->sdio_himr)
+			sdio_write_int(padapter, SDIO_HIMR, psdpriv->sdio_himr, 2);
+	} else {
+		RT_TRACE(_module_hci_intfs_c_, _drv_info_, ("<=========== sd_sync_int_hdl(): not our INT"));
+	}
+exit:
+
+_func_exit_;
+
+	return;
+}
+
+static int r871xs_drv_init(struct sdio_func *func, const struct sdio_device_id *id)
+{
+	_adapter *padapter = NULL;
+	struct dvobj_priv *pdvobjpriv;
+	struct net_device *pnetdev;
+
+	RT_TRACE(_module_hci_intfs_c_,_drv_alert_,("+871x - drv_init:id=0x%p func->vendor=0x%x func->device=0x%x\n",id,func->vendor,func->device));
+
+	//step 1.
+	pnetdev = rtw_init_netdev(NULL);
+	if (!pnetdev)
+		goto error;	
+
+	padapter = rtw_netdev_priv(pnetdev);
+	pdvobjpriv = &padapter->dvobjpriv;
+	pdvobjpriv->padapter = padapter;
+	pdvobjpriv->func = func;
+	sdio_set_drvdata(func, pdvobjpriv);
+	SET_NETDEV_DEV(pnetdev, &func->dev);
+
+
+	//step 2.
+	if (alloc_io_queue(padapter) == _FAIL) {
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("Can't init io_reqs\n"));
+		goto error;
+	}
+
+
+#if 0  //temp remove
+	//step 3.
+	if (loadparam(padapter, pnetdev) == _FAIL) {
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("Read Parameter Failed!\n"));
+		goto error;
+	}
+#endif
+
+	//step 4.
+	//dvobj_init(padapter);
+	padapter->dvobj_init = &sd_dvobj_init;
+	padapter->dvobj_deinit = &sd_dvobj_deinit;
+	padapter->halpriv.hal_bus_init = &sd_hal_bus_init;
+	padapter->halpriv.hal_bus_deinit = &sd_hal_bus_deinit;
+
+	if (padapter->dvobj_init == NULL) {
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("\n Initialize dvobjpriv.dvobj_init error!!!\n"));
+		goto error;
+	}
+
+	if (padapter->dvobj_init(padapter) == _FAIL) {
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("\n initialize device object priv Failed!\n"));			
+		goto error;
+	}
+
+
+	//step 6.
+	if (rtw_init_drv_sw(padapter) == _FAIL) {
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("Initialize driver software resource Failed!\n"));			
+		goto error;
+	}
+
+#if 1
+{
+	//step 7.
+	u8 mac[6];
+	mac[0]=0x00;
+	mac[1]=0xe0;
+	mac[2]=0x4c;
+	mac[3]=0x87;
+	mac[4]=0x66;
+	mac[5]=0x55;
+
+	_rtw_memcpy(pnetdev->dev_addr, mac/*padapter->eeprompriv.mac_addr*/, ETH_ALEN);
+	RT_TRACE(_module_hci_intfs_c_,_drv_info_,("pnetdev->dev_addr=0x%x:0x%x:0x%x:0x%x:0x%x:0x%x\n",pnetdev->dev_addr[0],pnetdev->dev_addr[1],pnetdev->dev_addr[2],pnetdev->dev_addr[3],pnetdev->dev_addr[4],pnetdev->dev_addr[5]));
+}
+#endif
+	//step 8.
+	/* Tell the network stack we exist */
+	if (register_netdev(pnetdev) != 0) {
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("register_netdev() failed\n"));
+		goto error;
+	}
+	RT_TRACE(_module_hci_intfs_c_,_drv_info_,("register_netdev() success\n"));
+	RT_TRACE(_module_hci_intfs_c_,_drv_notice_,("-drv_init - Adapter->bDriverStopped=%d, Adapter->bSurpriseRemoved=%d\n",padapter->bDriverStopped, padapter->bSurpriseRemoved));
+	RT_TRACE(_module_hci_intfs_c_,_drv_info_,("-871xs_drv - drv_init, success!\n"));
+
+	return 0;
+
+error:
+
+	if (padapter->dvobj_deinit == NULL) {
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("\n Initialize dvobjpriv.dvobj_deinit error!!!\n"));
+	} else {
+		padapter->dvobj_deinit(padapter);
+	} 	  
+
+	if (pnetdev) {
+		unregister_netdev(pnetdev);
+		rtw_free_netdev(pnetdev);
+	}
+
+	RT_TRACE(_module_hci_intfs_c_, _drv_emerg_, ("-871x_sdio - drv_init, fail!\n"));
+
+	return -1;
+}
+
+void rtl871x_intf_stop(_adapter *padapter)
+{
+	// Disable interrupt, also done in rtl8712_hal_deinit
+//	rtw_write16(padapter, SDIO_HIMR, 0x00);
+}
+
+void r871x_dev_unload(_adapter *padapter)
+{
+	struct net_device *pnetdev = (struct net_device*)padapter->pnetdev;
+
+	RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("+r871x_dev_unload\n"));
+
+	if (padapter->bup == _TRUE)
+	{
+#if 0
+		//s1.
+		if (pnetdev) {
+			netif_carrier_off(pnetdev);
+			netif_stop_queue(pnetdev);
+		}
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("@ r871x_dev_unload:complelte s1!\n"));
+
+		//s2.
+		// indicate-disconnect if necssary (free all assoc-resources)
+		// dis-assoc from assoc_sta (optional)
+		rtw_indicate_disconnect(padapter);
+		rtw_free_network_queue(padapter, _TRUE);
+#endif
+
+		padapter->bDriverStopped = _TRUE;
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("@ r871x_dev_unload:complete s2!\n"));
+
+		//s3.
+		rtl871x_intf_stop(padapter);
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("@ r871x_dev_unload:complete s3!\n"));
+
+		//s4.
+		rtw_stop_drv_threads(padapter);
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("@ r871x_dev_unload:complete s4!\n"));
+
+		//s5.
+		if (padapter->bSurpriseRemoved == _FALSE) {
+			rtl871x_hal_deinit(padapter);
+			padapter->bSurpriseRemoved = _TRUE;
+		}
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("@ r871x_dev_unload:complelt s5!\n"));
+
+
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("@ r871x_dev_unload:complete s6!\n"));
+
+		padapter->bup = _FALSE;
+	}
+	else {
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("r871x_dev_unload():padapter->bup == _FALSE\n" ));
+	}
+
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-r871x_dev_unload\n"));
+}
+
+static void r8712s_dev_remove(struct sdio_func *func)
+{
+	_adapter *padapter = (_adapter*) (((struct dvobj_priv*)sdio_get_drvdata(func))->padapter);
+	struct net_device *pnetdev = (struct net_device *)padapter->pnetdev;
+
+_func_exit_;
+
+	if (padapter)
+	{
+		RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("+dev_remove()\n"));
+
+//		padapter->bSurpriseRemoved = _TRUE;
+
+		if (pnetdev)
+			unregister_netdev(pnetdev); //will call netdev_close()
+
+		rtw_cancel_all_timer(padapter);
+		
+		r871x_dev_unload(padapter);
+		//s6.
+		if (padapter->dvobj_deinit) {
+			padapter->dvobj_deinit(padapter); // call sd_dvobj_deinit()
+		} else {
+			RT_TRACE(_module_hci_intfs_c_,_drv_err_,("Initialize hcipriv.hci_priv_init error!!!\n"));
+		}
+
+		rtw_free_drv_sw(padapter);
+		//after rtw_free_drv_sw(), padapter has beed freed, don't refer to it.
+		
+		sdio_claim_host(func);
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" in dev_remove():sdio_claim_host !\n"));
+		sdio_release_irq(func);
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" in dev_remove():sdio_release_irq !\n"));
+		sdio_disable_func(func);
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" in dev_remove():sdio_disable_func !\n"));
+		sdio_release_host(func);
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" in dev_remove():sdio_release_host !\n"));
+	}
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-dev_remove()\n"));
+
+_func_exit_;
+
+	return;
+}
+
+static drv_priv drvpriv = {	
+		.r871xs_drv.probe		= r871xs_drv_init,
+		.r871xs_drv.remove		= r8712s_dev_remove,
+		.r871xs_drv.name		= "rtl871x_sdio_wlan",
+		.r871xs_drv.id_table	= sdio_ids,
+};	
+
+
+static int __init r8712s_drv_entry(void)
+{
+	int status;
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+8712s_sdio - drv_entry\n"));
+	status = sdio_register_driver(&drvpriv.r871xs_drv);
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-8712_sdio - drv_entry, status=%d\n", status));	
+
+	return status;
+}
+
+static void __exit r8712s_drv_halt(void)
+{
+	int ret;
+
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+8712_sdio - drv_halt\n"));
+	sdio_unregister_driver(&drvpriv.r871xs_drv);	// call r8712s_dev_remove()
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-8712_sdio - drv_halt\n"));
+
+}
+
+
+module_init(r8712s_drv_entry);
+module_exit(r8712s_drv_halt);
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/os_dep/linux/usb_intf.c linux-3.0.82x/drivers/net/wireless/rtl8188/os_dep/linux/usb_intf.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/os_dep/linux/usb_intf.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/os_dep/linux/usb_intf.c	2017-09-23 03:42:50.078674881 +0800
@@ -0,0 +1,1472 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ 
+******************************************************************************/
+#define _HCI_INTF_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <recv_osdep.h>
+#include <xmit_osdep.h>
+#include <hal_init.h>
+#include <rtw_version.h>
+
+#ifndef CONFIG_USB_HCI
+
+#error "CONFIG_USB_HCI shall be on!\n"
+
+#endif
+
+#include <usb_vendor_req.h>
+#include <usb_ops.h>
+#include <usb_osintf.h>
+#include <usb_hal.h>
+#ifdef CONFIG_PLATFORM_RTK_DMP
+#include <asm/io.h>
+#endif
+
+#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
+
+#error "Shall be Linux or Windows, but not both!\n"
+
+#endif
+
+#ifdef CONFIG_80211N_HT
+extern int rtw_ht_enable;
+extern int rtw_cbw40_enable;
+extern int rtw_ampdu_enable;//for enable tx_ampdu
+#endif
+
+#ifdef CONFIG_GLOBAL_UI_PID
+int ui_pid[3] = {0, 0, 0};
+#endif
+
+
+extern int pm_netdev_open(struct net_device *pnetdev,u8 bnormal);
+static int rtw_suspend(struct usb_interface *intf, pm_message_t message);
+static int rtw_resume(struct usb_interface *intf);
+int rtw_resume_process(struct usb_interface *pusb_intf);
+
+
+static int rtw_drv_init(struct usb_interface *pusb_intf,const struct usb_device_id *pdid);
+static void rtw_dev_remove(struct usb_interface *pusb_intf);
+
+#define USB_VENDER_ID_REALTEK		0x0BDA
+
+//DID_USB_v82_20110808
+static struct usb_device_id rtw_usb_id_tbl[] ={
+#ifdef CONFIG_RTL8192C
+	/*=== Realtek demoboard ===*/		
+	{USB_DEVICE(0x0BDA, 0x8191)},//Default ID
+
+	/****** 8188CUS ********/
+	{USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8176)},//8188cu 1*1 dongole
+	{USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8170)},//8188CE-VAU USB minCard
+	{USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817E)},//8188CE-VAU USB minCard
+	{USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817A)},//8188cu Slim Solo
+	{USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817B)},//8188cu Slim Combo
+	{USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817D)},//8188RU High-power USB Dongle
+	{USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8754)},//8188 Combo for BC4
+	{USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817F)},//8188RU
+	{USB_DEVICE(USB_VENDER_ID_REALTEK, 0x818A)},//RTL8188CUS-VL
+	{USB_DEVICE(USB_VENDER_ID_REALTEK, 0x018A)},//RTL8188CTV
+	
+	/****** 8192CUS ********/
+	{USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8177)},//8191cu 1*2
+	{USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8178)},//8192cu 2*2
+	{USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817C)},//8192CE-VAU USB minCard
+	
+
+	/*=== Customer ID ===*/	
+	/****** 8188CUS Dongle ********/
+	{USB_DEVICE(0x2019, 0xED17)},//PCI - Edimax
+	{USB_DEVICE(0x0DF6, 0x0052)},//Sitecom - Edimax
+	{USB_DEVICE(0x7392, 0x7811)},//Edimax - Edimax
+	{USB_DEVICE(0x07B8, 0x8189)},//Abocom - Abocom
+	{USB_DEVICE(0x0EB0, 0x9071)},//NO Brand - Etop
+	{USB_DEVICE(0x06F8, 0xE033)},//Hercules - Edimax
+	{USB_DEVICE(0x103C, 0x1629)},//HP - Lite-On ,8188CUS Slim Combo
+	{USB_DEVICE(0x2001, 0x3308)},//D-Link - Alpha
+	{USB_DEVICE(0x050D, 0x1102)},//Belkin - Edimax
+	{USB_DEVICE(0x2019, 0xAB2A)},//Planex - Abocom
+	{USB_DEVICE(0x20F4, 0x648B)},//TRENDnet - Cameo
+	{USB_DEVICE(0x4855, 0x0090)},// - Feixun
+	{USB_DEVICE(0x13D3, 0x3357)},// - AzureWave
+	{USB_DEVICE(0x0DF6, 0x005C)},//Sitecom - Edimax
+	{USB_DEVICE(0x0BDA, 0x5088)},//Thinkware - CC&C
+	{USB_DEVICE(0x4856, 0x0091)},//NetweeN - Feixun
+	{USB_DEVICE(0x2019, 0x4902)},//Planex - Etop
+	{USB_DEVICE(0x2019, 0xAB2E)},//SW-WF02-AD15 -Abocom
+
+	/****** 8188 RU ********/
+	{USB_DEVICE(0x0BDA, 0x317F)},//Netcore,Netcore
+	
+	/****** 8188CE-VAU ********/
+	{USB_DEVICE(0x13D3, 0x3359)},// - Azwave
+	{USB_DEVICE(0x13D3, 0x3358)},// - Azwave
+
+	/****** 8188CUS Slim Solo********/
+	{USB_DEVICE(0x04F2, 0xAFF7)},//XAVI - XAVI
+	{USB_DEVICE(0x04F2, 0xAFF9)},//XAVI - XAVI
+	{USB_DEVICE(0x04F2, 0xAFFA)},//XAVI - XAVI
+
+	/****** 8188CUS Slim Combo ********/
+	{USB_DEVICE(0x04F2, 0xAFF8)},//XAVI - XAVI
+	{USB_DEVICE(0x04F2, 0xAFFB)},//XAVI - XAVI
+	{USB_DEVICE(0x04F2, 0xAFFC)},//XAVI - XAVI
+	{USB_DEVICE(0x2019, 0x1201)},//Planex - Vencer
+	
+	/****** 8192CUS Dongle ********/
+	{USB_DEVICE(0x2001, 0x3307)},//D-Link - Cameo
+	{USB_DEVICE(0x2001, 0x330A)},//D-Link - Alpha
+	{USB_DEVICE(0x2001, 0x3309)},//D-Link - Alpha
+	{USB_DEVICE(0x0586, 0x341F)},//Zyxel - Abocom
+	{USB_DEVICE(0x7392, 0x7822)},//Edimax - Edimax
+	{USB_DEVICE(0x2019, 0xAB2B)},//Planex - Abocom
+	{USB_DEVICE(0x07B8, 0x8178)},//Abocom - Abocom
+	{USB_DEVICE(0x07AA, 0x0056)},//ATKK - Gemtek
+	{USB_DEVICE(0x4855, 0x0091)},// - Feixun
+	{USB_DEVICE(0x2001, 0x3307)},//D-Link-Cameo
+	{USB_DEVICE(0x050D, 0x2102)},//Belkin - Sercomm
+	{USB_DEVICE(0x050D, 0x2103)},//Belkin - Edimax
+	{USB_DEVICE(0x20F4, 0x624D)},//TRENDnet
+	{USB_DEVICE(0x0DF6, 0x0061)},//Sitecom - Edimax
+	{USB_DEVICE(0x0B05, 0x17AB)},//ASUS - Edimax
+	{USB_DEVICE(0x0846, 0x9021)},//Netgear - Sercomm
+	{USB_DEVICE(0x0E66, 0x0019)},//Hawking,Edimax 
+
+	/****** 8192CE-VAU  ********/
+	{USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8186)},//Intel-Xavi( Azwave)
+#endif
+#ifdef CONFIG_RTL8192D
+	/*=== Realtek demoboard ===*/
+	/****** 8192DU ********/
+	{USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8193)},//8192DU-VC
+	{USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8194)},//8192DU-VS
+	{USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8111)},//Realtek 5G dongle for WiFi Display
+	{USB_DEVICE(USB_VENDER_ID_REALTEK, 0x0193)},//8192DE-VAU
+	
+	/*=== Customer ID ===*/
+	/****** 8192DU-VC ********/
+	{USB_DEVICE(0x2019, 0xAB2C)},//PCI - Abocm
+	{USB_DEVICE(0x2019, 0x4903)},//PCI - ETOP
+	{USB_DEVICE(0x2019, 0x4904)},//PCI - ETOP
+	{USB_DEVICE(0x07B8, 0x8193)},//Abocom - Abocom
+	
+	/****** 8192DU-VS ********/
+	{USB_DEVICE(0x20F4, 0x664B)},//TRENDnet
+
+	/****** 8192DU-WiFi Display Dongle ********/
+	{USB_DEVICE(0x2019, 0xAB2D)},//Planex - Abocom ,5G dongle for WiFi Display
+#endif
+	{}	/* Terminating entry */
+};
+
+int const rtw_usb_id_len = sizeof(rtw_usb_id_tbl) / sizeof(struct usb_device_id);
+
+static struct specific_device_id specific_device_id_tbl[] = {
+	{.idVendor=USB_VENDER_ID_REALTEK, .idProduct=0x8177, .flags=SPEC_DEV_ID_DISABLE_HT},//8188cu 1*1 dongole, (b/g mode only)
+	{.idVendor=USB_VENDER_ID_REALTEK, .idProduct=0x817E, .flags=SPEC_DEV_ID_DISABLE_HT},//8188CE-VAU USB minCard (b/g mode only)
+	{.idVendor=0x0b05, .idProduct=0x1791, .flags=SPEC_DEV_ID_DISABLE_HT},
+	{.idVendor=0x13D3, .idProduct=0x3311, .flags=SPEC_DEV_ID_DISABLE_HT},
+	{.idVendor=0x13D3, .idProduct=0x3359, .flags=SPEC_DEV_ID_DISABLE_HT},//Russian customer -Azwave (8188CE-VAU  g mode)	
+#ifdef RTK_DMP_PLATFORM
+	{.idVendor=USB_VENDER_ID_REALTEK, .idProduct=0x8111, .flags=SPEC_DEV_ID_ASSIGN_IFNAME}, // Realtek 5G dongle for WiFi Display
+	{.idVendor=0x2019, .idProduct=0xAB2D, .flags=SPEC_DEV_ID_ASSIGN_IFNAME}, // PCI-Abocom 5G dongle for WiFi Display
+#endif /* RTK_DMP_PLATFORM */
+	{}
+};
+
+typedef struct _driver_priv{
+
+	struct usb_driver rtw_usb_drv;
+	int drv_registered;
+
+}drv_priv, *pdrv_priv;
+
+
+static drv_priv drvpriv = {
+	.rtw_usb_drv.name = (char*)DRV_NAME,
+	.rtw_usb_drv.probe = rtw_drv_init,
+	.rtw_usb_drv.disconnect = rtw_dev_remove,
+	.rtw_usb_drv.id_table = rtw_usb_id_tbl,
+	.rtw_usb_drv.suspend =  rtw_suspend,
+	.rtw_usb_drv.resume = rtw_resume,
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 22))
+  	.rtw_usb_drv.reset_resume   = rtw_resume,
+#endif
+#ifdef CONFIG_AUTOSUSPEND	
+	.rtw_usb_drv.supports_autosuspend = 1,	
+#endif
+};
+
+MODULE_DEVICE_TABLE(usb, rtw_usb_id_tbl);
+
+
+static inline int RT_usb_endpoint_dir_in(const struct usb_endpoint_descriptor *epd)
+{
+	return ((epd->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN);
+}
+
+static inline int RT_usb_endpoint_dir_out(const struct usb_endpoint_descriptor *epd)
+{
+	return ((epd->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT);
+}
+
+static inline int RT_usb_endpoint_xfer_int(const struct usb_endpoint_descriptor *epd)
+{
+	return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_INT);
+}
+
+static inline int RT_usb_endpoint_xfer_bulk(const struct usb_endpoint_descriptor *epd)
+{
+ 	return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK);
+}
+
+static inline int RT_usb_endpoint_is_bulk_in(const struct usb_endpoint_descriptor *epd)
+{
+	return (RT_usb_endpoint_xfer_bulk(epd) && RT_usb_endpoint_dir_in(epd));
+}
+
+static inline int RT_usb_endpoint_is_bulk_out(const struct usb_endpoint_descriptor *epd)
+{
+	return (RT_usb_endpoint_xfer_bulk(epd) && RT_usb_endpoint_dir_out(epd));
+}
+
+static inline int RT_usb_endpoint_is_int_in(const struct usb_endpoint_descriptor *epd)
+{
+	return (RT_usb_endpoint_xfer_int(epd) && RT_usb_endpoint_dir_in(epd));
+}
+
+static inline int RT_usb_endpoint_num(const struct usb_endpoint_descriptor *epd)
+{
+	return epd->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
+}
+
+u8 rtw_init_intf_priv(_adapter * padapter)
+{
+	u8 rst = _SUCCESS; 
+	
+	#ifdef CONFIG_USB_VENDOR_REQ_MUTEX
+	_rtw_mutex_init(&padapter->dvobjpriv.usb_vendor_req_mutex);
+	#endif
+
+
+#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC
+	padapter->dvobjpriv.usb_alloc_vendor_req_buf = rtw_zmalloc(MAX_USB_IO_CTL_SIZE);
+
+	if (padapter->dvobjpriv.usb_alloc_vendor_req_buf   == NULL){
+		padapter->dvobjpriv.usb_alloc_vendor_req_buf  =NULL;
+		printk("alloc usb_vendor_req_buf failed... /n");
+		rst = _FAIL;
+		goto exit;
+	}
+	padapter->dvobjpriv.usb_vendor_req_buf  = 
+		(u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(padapter->dvobjpriv.usb_alloc_vendor_req_buf ), ALIGNMENT_UNIT);
+exit:
+#endif //CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC
+
+	return rst;
+	
+}
+
+u8 rtw_deinit_intf_priv(_adapter * padapter)
+{
+	u8 rst = _SUCCESS; 
+
+	#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC
+	if(padapter->dvobjpriv.usb_vendor_req_buf)
+	{
+		rtw_mfree(padapter->dvobjpriv.usb_alloc_vendor_req_buf,MAX_USB_IO_CTL_SIZE);
+	}
+	#endif //CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC
+
+
+	#ifdef CONFIG_USB_VENDOR_REQ_MUTEX
+	_rtw_mutex_free(&padapter->dvobjpriv.usb_vendor_req_mutex);
+	#endif
+	
+	return rst;
+	
+}
+
+static u32 usb_dvobj_init(_adapter *padapter)
+{
+	int	i;
+	u8	val8;
+	int	status = _SUCCESS;
+	struct usb_device_descriptor 	*pdev_desc;
+	struct usb_host_config			*phost_conf;
+	struct usb_config_descriptor		*pconf_desc;
+	struct usb_host_interface		*phost_iface;
+	struct usb_interface_descriptor	*piface_desc;
+	struct usb_host_endpoint		*phost_endp;
+	struct usb_endpoint_descriptor	*pendp_desc;
+	struct dvobj_priv				*pdvobjpriv = &padapter->dvobjpriv;
+	struct usb_device				*pusbd = pdvobjpriv->pusbdev;
+	struct usb_interface			*pusb_interface = pdvobjpriv->pusbintf;
+
+_func_enter_;
+
+	pdvobjpriv->padapter = padapter;
+
+	pdvobjpriv->RtNumInPipes = 0;
+	pdvobjpriv->RtNumOutPipes = 0;
+
+	//padapter->EepromAddressSize = 6;
+	//pdvobjpriv->nr_endpoint = 6;
+
+	pdev_desc = &pusbd->descriptor;
+
+#if 0
+	DBG_8192C("\n8712_usb_device_descriptor:\n");
+	DBG_8192C("bLength=%x\n", pdev_desc->bLength);
+	DBG_8192C("bDescriptorType=%x\n", pdev_desc->bDescriptorType);
+	DBG_8192C("bcdUSB=%x\n", pdev_desc->bcdUSB);
+	DBG_8192C("bDeviceClass=%x\n", pdev_desc->bDeviceClass);
+	DBG_8192C("bDeviceSubClass=%x\n", pdev_desc->bDeviceSubClass);
+	DBG_8192C("bDeviceProtocol=%x\n", pdev_desc->bDeviceProtocol);
+	DBG_8192C("bMaxPacketSize0=%x\n", pdev_desc->bMaxPacketSize0);
+	DBG_8192C("idVendor=%x\n", pdev_desc->idVendor);
+	DBG_8192C("idProduct=%x\n", pdev_desc->idProduct);
+	DBG_8192C("bcdDevice=%x\n", pdev_desc->bcdDevice);
+	DBG_8192C("iManufacturer=%x\n", pdev_desc->iManufacturer);
+	DBG_8192C("iProduct=%x\n", pdev_desc->iProduct);
+	DBG_8192C("iSerialNumber=%x\n", pdev_desc->iSerialNumber);
+	DBG_8192C("bNumConfigurations=%x\n", pdev_desc->bNumConfigurations);
+#endif
+
+	phost_conf = pusbd->actconfig;
+	pconf_desc = &phost_conf->desc;
+
+#if 0
+	DBG_8192C("\n8712_usb_configuration_descriptor:\n");
+	DBG_8192C("bLength=%x\n", pconf_desc->bLength);
+	DBG_8192C("bDescriptorType=%x\n", pconf_desc->bDescriptorType);
+	DBG_8192C("wTotalLength=%x\n", pconf_desc->wTotalLength);
+	DBG_8192C("bNumInterfaces=%x\n", pconf_desc->bNumInterfaces);
+	DBG_8192C("bConfigurationValue=%x\n", pconf_desc->bConfigurationValue);
+	DBG_8192C("iConfiguration=%x\n", pconf_desc->iConfiguration);
+	DBG_8192C("bmAttributes=%x\n", pconf_desc->bmAttributes);
+	DBG_8192C("bMaxPower=%x\n", pconf_desc->bMaxPower);
+#endif
+
+	//DBG_8192C("\n/****** num of altsetting = (%d) ******/\n", pusb_interface->num_altsetting);
+
+	phost_iface = &pusb_interface->altsetting[0];
+	piface_desc = &phost_iface->desc;
+
+#if 0
+	DBG_8192C("\n8712_usb_interface_descriptor:\n");
+	DBG_8192C("bLength=%x\n", piface_desc->bLength);
+	DBG_8192C("bDescriptorType=%x\n", piface_desc->bDescriptorType);
+	DBG_8192C("bInterfaceNumber=%x\n", piface_desc->bInterfaceNumber);
+	DBG_8192C("bAlternateSetting=%x\n", piface_desc->bAlternateSetting);
+	DBG_8192C("bNumEndpoints=%x\n", piface_desc->bNumEndpoints);
+	DBG_8192C("bInterfaceClass=%x\n", piface_desc->bInterfaceClass);
+	DBG_8192C("bInterfaceSubClass=%x\n", piface_desc->bInterfaceSubClass);
+	DBG_8192C("bInterfaceProtocol=%x\n", piface_desc->bInterfaceProtocol);
+	DBG_8192C("iInterface=%x\n", piface_desc->iInterface);
+#endif
+
+	pdvobjpriv->NumInterfaces = pconf_desc->bNumInterfaces;
+	pdvobjpriv->InterfaceNumber = piface_desc->bInterfaceNumber;
+	pdvobjpriv->nr_endpoint = piface_desc->bNumEndpoints;
+
+	//DBG_8192C("\ndump usb_endpoint_descriptor:\n");
+
+	for (i = 0; i < pdvobjpriv->nr_endpoint; i++)
+	{
+		phost_endp = phost_iface->endpoint + i;
+		if (phost_endp)
+		{
+			pendp_desc = &phost_endp->desc;
+
+			DBG_8192C("\nusb_endpoint_descriptor(%d):\n", i);
+			DBG_8192C("bLength=%x\n",pendp_desc->bLength);
+			DBG_8192C("bDescriptorType=%x\n",pendp_desc->bDescriptorType);
+			DBG_8192C("bEndpointAddress=%x\n",pendp_desc->bEndpointAddress);
+			//DBG_8192C("bmAttributes=%x\n",pendp_desc->bmAttributes);
+			//DBG_8192C("wMaxPacketSize=%x\n",pendp_desc->wMaxPacketSize);
+			DBG_8192C("wMaxPacketSize=%x\n",le16_to_cpu(pendp_desc->wMaxPacketSize));
+			DBG_8192C("bInterval=%x\n",pendp_desc->bInterval);
+			//DBG_8192C("bRefresh=%x\n",pendp_desc->bRefresh);
+			//DBG_8192C("bSynchAddress=%x\n",pendp_desc->bSynchAddress);
+
+			if (RT_usb_endpoint_is_bulk_in(pendp_desc))
+			{
+				DBG_8192C("RT_usb_endpoint_is_bulk_in = %x\n", RT_usb_endpoint_num(pendp_desc));
+				pdvobjpriv->RtNumInPipes++;
+			}
+			else if (RT_usb_endpoint_is_int_in(pendp_desc))
+			{
+				DBG_8192C("RT_usb_endpoint_is_int_in = %x, Interval = %x\n", RT_usb_endpoint_num(pendp_desc),pendp_desc->bInterval);
+				pdvobjpriv->RtNumInPipes++;
+			}
+			else if (RT_usb_endpoint_is_bulk_out(pendp_desc))
+			{
+				DBG_8192C("RT_usb_endpoint_is_bulk_out = %x\n", RT_usb_endpoint_num(pendp_desc));
+				pdvobjpriv->RtNumOutPipes++;
+			}
+			pdvobjpriv->ep_num[i] = RT_usb_endpoint_num(pendp_desc);
+		}
+	}
+	
+	DBG_8192C("nr_endpoint=%d, in_num=%d, out_num=%d\n\n", pdvobjpriv->nr_endpoint, pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes);
+
+	if (pusbd->speed == USB_SPEED_HIGH)
+	{
+		pdvobjpriv->ishighspeed = _TRUE;
+		DBG_8192C("USB_SPEED_HIGH\n");
+	}
+	else
+	{
+		pdvobjpriv->ishighspeed = _FALSE;
+		DBG_8192C("NON USB_SPEED_HIGH\n");
+	}
+
+	//.2
+	if ((rtw_init_io_priv(padapter)) == _FAIL)
+	{
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" \n Can't init io_reqs\n"));
+		status = _FAIL;
+	}
+	
+	if((rtw_init_intf_priv(padapter) )== _FAIL)
+	{
+		RT_TRACE(_module_os_intfs_c_,_drv_err_,("\n Can't INIT rtw_init_intf_priv\n"));
+		status = _FAIL;
+	}
+
+	//.3 misc
+	_rtw_init_sema(&(padapter->dvobjpriv.usb_suspend_sema), 0);	
+
+	intf_read_chip_version(padapter);
+
+	//.4 usb endpoint mapping
+	intf_chip_configure(padapter);
+
+	rtw_reset_continual_urb_error(pdvobjpriv);
+	
+_func_exit_;
+
+	return status;
+}
+
+static void usb_dvobj_deinit(_adapter * padapter){
+
+	struct dvobj_priv *pdvobjpriv=&padapter->dvobjpriv;
+
+	_func_enter_;
+
+	rtw_deinit_intf_priv(padapter);
+
+	_func_exit_;
+}
+
+static void decide_chip_type_by_usb_device_id(_adapter *padapter, const struct usb_device_id *pdid)
+{
+	//u32	i;
+	//u16	vid, pid;
+
+	padapter->chip_type = NULL_CHIP_TYPE;
+
+	//vid = pdid->idVendor;
+	//pid = pdid->idProduct;
+
+	//TODO: dynamic judge 92c or 92d according to usb vid and pid.
+#ifdef CONFIG_RTL8192C
+	padapter->chip_type = RTL8188C_8192C;
+	padapter->HardwareType = HARDWARE_TYPE_RTL8192CU;
+	DBG_8192C("CHIP TYPE: RTL8188C_8192C\n");
+#endif
+
+#ifdef CONFIG_RTL8192D
+	padapter->chip_type = RTL8192D;
+	padapter->HardwareType = HARDWARE_TYPE_RTL8192DU;
+	DBG_8192C("CHIP TYPE: RTL8192D\n");
+#endif
+
+}
+
+static void usb_intf_start(_adapter *padapter)
+{
+
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+usb_intf_start\n"));
+
+	if(padapter->HalFunc.inirp_init == NULL)
+	{
+		RT_TRACE(_module_os_intfs_c_,_drv_err_,("Initialize dvobjpriv.inirp_init error!!!\n"));
+	}
+	else
+	{	
+		padapter->HalFunc.inirp_init(padapter);
+	}			
+
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-usb_intf_start\n"));
+
+}
+
+static void usb_intf_stop(_adapter *padapter)
+{
+
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+usb_intf_stop\n"));
+
+	//disabel_hw_interrupt
+	if(padapter->bSurpriseRemoved == _FALSE)
+	{
+		//device still exists, so driver can do i/o operation
+		//TODO:
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("SurpriseRemoved==_FALSE\n"));
+	}
+
+	//cancel in irp
+	if(padapter->HalFunc.inirp_deinit !=NULL)
+	{
+		padapter->HalFunc.inirp_deinit(padapter);
+	}
+
+	//cancel out irp
+	rtw_write_port_cancel(padapter);
+
+	//todo:cancel other irps
+
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-usb_intf_stop\n"));
+
+}
+
+static void rtw_dev_unload(_adapter *padapter)
+{
+	struct net_device *pnetdev= (struct net_device*)padapter->pnetdev;
+	u8 val8;
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+rtw_dev_unload\n"));
+
+	if(padapter->bup == _TRUE)
+	{
+		DBG_8192C("===> rtw_dev_unload\n");
+
+		padapter->bDriverStopped = _TRUE;
+
+		//s3.
+		if(padapter->intf_stop)
+		{
+			padapter->intf_stop(padapter);
+		}
+
+		//s4.
+		if(!padapter->pwrctrlpriv.bInternalAutoSuspend )			
+			rtw_stop_drv_threads(padapter);
+
+
+		//s5.
+		if(padapter->bSurpriseRemoved == _FALSE)
+		{
+			//DBG_8192C("r871x_dev_unload()->rtl871x_hal_deinit()\n");
+			#ifdef CONFIG_WOWLAN
+			if(padapter->pwrctrlpriv.bSupportWakeOnWlan==_TRUE){
+				DBG_8192C("%s bSupportWakeOnWlan==_TRUE  do not run rtw_hal_deinit()\n",__FUNCTION__);
+			}
+			else
+			#endif
+			{
+				rtw_hal_deinit(padapter);
+			}
+			padapter->bSurpriseRemoved = _TRUE;
+		}
+
+		padapter->bup = _FALSE;
+
+	}
+	else
+	{
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("r871x_dev_unload():padapter->bup == _FALSE\n" ));
+	}
+
+	DBG_8192C("<=== rtw_dev_unload\n");
+
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-rtw_dev_unload\n"));
+
+}
+
+static void process_spec_devid(const struct usb_device_id *pdid)
+{
+	u16 vid, pid;
+	u32 flags;
+	int i;
+	int num = sizeof(specific_device_id_tbl)/sizeof(struct specific_device_id);
+
+	for(i=0; i<num; i++)
+	{
+		vid = specific_device_id_tbl[i].idVendor;
+		pid = specific_device_id_tbl[i].idProduct;
+		flags = specific_device_id_tbl[i].flags;
+
+#ifdef CONFIG_80211N_HT
+		if((pdid->idVendor==vid) && (pdid->idProduct==pid) && (flags&SPEC_DEV_ID_DISABLE_HT))
+		{
+			 rtw_ht_enable = 0;
+			 rtw_cbw40_enable = 0;
+			 rtw_ampdu_enable = 0;
+		}
+#endif
+
+#ifdef RTK_DMP_PLATFORM
+		// Change the ifname to wlan10 when PC side WFD dongle plugin on DMP platform.
+		// It is used to distinguish between normal and PC-side wifi dongle/module.
+		if((pdid->idVendor==vid) && (pdid->idProduct==pid) && (flags&SPEC_DEV_ID_ASSIGN_IFNAME))
+		{
+			extern char* ifname;
+			strncpy(ifname, "wlan10", 6); 
+			//DBG_8192C("%s()-%d: ifname=%s, vid=%04X, pid=%04X\n", __FUNCTION__, __LINE__, ifname, vid, pid);
+		}
+#endif /* RTK_DMP_PLATFORM */
+
+	}
+}
+
+#ifdef SUPPORT_HW_RFOFF_DETECTED
+extern u8 disconnect_hdl(_adapter *padapter, u8 *pbuf);
+extern void rtw_os_indicate_disconnect( _adapter *adapter );
+
+int rtw_hw_suspend(_adapter *padapter )
+{
+	struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
+	struct usb_interface *pusb_intf = padapter->dvobjpriv.pusbintf;	
+	struct net_device *pnetdev=usb_get_intfdata(pusb_intf);
+	
+	_func_enter_;
+
+	if((!padapter->bup) || (padapter->bDriverStopped)||(padapter->bSurpriseRemoved))
+	{
+		DBG_8192C("padapter->bup=%d bDriverStopped=%d bSurpriseRemoved = %d\n",
+			padapter->bup, padapter->bDriverStopped,padapter->bSurpriseRemoved);		
+		goto error_exit;
+	}
+	
+	if(padapter)//system suspend
+	{		
+		LeaveAllPowerSaveMode(padapter);
+		
+		DBG_8192C("==> rtw_hw_suspend\n");	
+		_enter_pwrlock(&pwrpriv->lock);
+		pwrpriv->bips_processing = _TRUE;
+		//padapter->net_closed = _TRUE;
+		//s1.
+		if(pnetdev)
+		{
+			netif_carrier_off(pnetdev);
+			netif_stop_queue(pnetdev);
+		}
+
+		//s2.
+		//s2-1.  issue rtw_disassoc_cmd to fw
+		//rtw_disassoc_cmd(padapter);//donnot enqueue cmd
+		disconnect_hdl(padapter, NULL);
+		
+		//s2-2.  indicate disconnect to os
+		//rtw_indicate_disconnect(padapter);
+		{
+			struct	mlme_priv *pmlmepriv = &padapter->mlmepriv;		
+
+			if(check_fwstate(pmlmepriv, _FW_LINKED))
+			{
+				_clr_fwstate_(pmlmepriv, _FW_LINKED);
+
+				rtw_led_control(padapter, LED_CTL_NO_LINK);
+
+				rtw_os_indicate_disconnect(padapter);
+				
+				#ifdef CONFIG_LPS
+				//donnot enqueue cmd
+				rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_DISCONNECT, 0);
+				#endif
+			}
+
+		}
+		//s2-3.
+		rtw_free_assoc_resources(padapter, 1);
+
+		//s2-4.
+		rtw_free_network_queue(padapter,_TRUE);
+		#ifdef CONFIG_IPS
+		rtw_ips_dev_unload(padapter);			
+		#endif 
+		pwrpriv->rf_pwrstate = rf_off;
+		pwrpriv->bips_processing = _FALSE;		
+
+		_exit_pwrlock(&pwrpriv->lock);
+	}
+	else
+		goto error_exit;
+	
+	_func_exit_;
+	return 0;
+	
+error_exit:
+	DBG_8192C("%s, failed \n",__FUNCTION__);
+	return (-1);
+
+}
+
+int rtw_hw_resume(_adapter *padapter)
+{
+	struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
+	struct usb_interface *pusb_intf = padapter->dvobjpriv.pusbintf;
+	struct net_device *pnetdev=usb_get_intfdata(pusb_intf);	
+
+	_func_enter_;
+
+	if(padapter)//system resume
+	{	
+		DBG_8192C("==> rtw_hw_resume\n");
+		_enter_pwrlock(&pwrpriv->lock);
+		pwrpriv->bips_processing = _TRUE;
+		rtw_reset_drv_sw(padapter);
+	
+		if(pm_netdev_open(pnetdev,_FALSE) != 0)
+		{
+			_exit_pwrlock(&pwrpriv->lock);
+			goto error_exit;
+		}
+
+		netif_device_attach(pnetdev);	
+		netif_carrier_on(pnetdev);
+
+		if(!netif_queue_stopped(pnetdev))
+      			netif_start_queue(pnetdev);
+		else
+			netif_wake_queue(pnetdev);
+		
+		pwrpriv->bkeepfwalive = _FALSE;
+		pwrpriv->brfoffbyhw = _FALSE;
+		
+		pwrpriv->rf_pwrstate = rf_on;
+		pwrpriv->bips_processing = _FALSE;	
+	
+		_exit_pwrlock(&pwrpriv->lock);
+	}
+	else
+	{
+		goto error_exit;	
+	}
+
+	_func_exit_;
+	
+	return 0;
+error_exit:
+	DBG_8192C("%s, Open net dev failed \n",__FUNCTION__);
+	return (-1);
+}
+#endif
+
+static int rtw_suspend(struct usb_interface *pusb_intf, pm_message_t message)
+{
+	struct net_device *pnetdev=usb_get_intfdata(pusb_intf);
+	_adapter *padapter = (_adapter*)rtw_netdev_priv(pnetdev);
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+	struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
+	struct usb_device *usb_dev = interface_to_usbdev(pusb_intf);
+	
+	_func_enter_;
+
+	if((!padapter->bup) || (padapter->bDriverStopped)||(padapter->bSurpriseRemoved))
+	{
+		DBG_8192C("padapter->bup=%d bDriverStopped=%d bSurpriseRemoved = %d\n",
+			padapter->bup, padapter->bDriverStopped,padapter->bSurpriseRemoved);				
+		return 0;
+	}	
+
+	DBG_8192C("###########  rtw_suspend  #################\n");
+	
+	if(padapter)//system suspend
+	{	
+		if(pwrpriv->bInternalAutoSuspend )
+		{
+		#ifdef CONFIG_AUTOSUSPEND	
+		#ifdef SUPPORT_HW_RFOFF_DETECTED
+			// The FW command register update must after MAC and FW init ready.
+			if((padapter->bFWReady) && ( padapter->pwrctrlpriv.bHWPwrPindetect ) && (padapter->registrypriv.usbss_enable ))
+			{
+				u8 bOpen = _TRUE;
+				rtw_interface_ps_func(padapter,HAL_USB_SELECT_SUSPEND,&bOpen);
+				//rtl8192c_set_FwSelectSuspend_cmd(padapter,_TRUE ,500);//note fw to support hw power down ping detect
+			}
+		#endif
+		#endif
+		}
+		pwrpriv->bInSuspend = _TRUE;		
+		rtw_cancel_all_timer(padapter);		
+		LeaveAllPowerSaveMode(padapter);
+
+		_enter_pwrlock(&pwrpriv->lock);
+		//padapter->net_closed = _TRUE;
+		//s1.
+		if(pnetdev)
+		{
+			netif_carrier_off(pnetdev);
+			netif_stop_queue(pnetdev);
+		}
+#ifdef CONFIG_WOWLAN
+		padapter->pwrctrlpriv.bSupportWakeOnWlan=_TRUE;
+#else		
+		//s2.
+		//s2-1.  issue rtw_disassoc_cmd to fw
+		disconnect_hdl(padapter, NULL);
+		//rtw_disassoc_cmd(padapter);
+#endif
+
+#ifdef CONFIG_LAYER2_ROAMING_RESUME
+		if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) && check_fwstate(pmlmepriv, _FW_LINKED) )
+		{
+			//printk("%s:%d assoc_ssid:%s\n", __FUNCTION__, __LINE__, pmlmepriv->assoc_ssid.Ssid);
+			DBG_871X("%s:%d %s(" MAC_FMT "), length:%d assoc_ssid.length:%d\n",__FUNCTION__, __LINE__,
+					pmlmepriv->cur_network.network.Ssid.Ssid,
+					MAC_ARG(pmlmepriv->cur_network.network.MacAddress),
+					pmlmepriv->cur_network.network.Ssid.SsidLength,
+					pmlmepriv->assoc_ssid.SsidLength);
+			
+			pmlmepriv->to_roaming = 1;
+		}
+#endif
+		//s2-2.  indicate disconnect to os
+		rtw_indicate_disconnect(padapter);
+		//s2-3.
+		rtw_free_assoc_resources(padapter, 1);
+#ifdef CONFIG_AUTOSUSPEND
+		if(!pwrpriv->bInternalAutoSuspend )
+#endif
+		//s2-4.
+		rtw_free_network_queue(padapter, _TRUE);
+
+		rtw_dev_unload(padapter);
+#ifdef CONFIG_AUTOSUSPEND
+		pwrpriv->rf_pwrstate = rf_off;
+		pwrpriv->bips_processing = _FALSE;
+#endif
+		_exit_pwrlock(&pwrpriv->lock);
+	}
+	else
+		goto error_exit;
+	
+	DBG_871X("###########  rtw_suspend  done #################\n");
+
+	_func_exit_;
+	return 0;
+	
+error_exit:
+	DBG_871X("###########  rtw_suspend  fail !! #################\n");
+	return (-1);
+
+}
+
+static int rtw_resume(struct usb_interface *pusb_intf)
+{
+	struct net_device *pnetdev=usb_get_intfdata(pusb_intf);
+	_adapter *padapter = (_adapter*)rtw_netdev_priv(pnetdev);
+	struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
+	 int ret = 0;
+ 
+	if(pwrpriv->bInternalAutoSuspend ){
+ 		ret = rtw_resume_process(pusb_intf);
+	} else {
+#ifdef CONFIG_RESUME_IN_WORKQUEUE
+		rtw_resume_in_workqueue(pwrpriv);
+#elif defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER)
+		if(rtw_is_earlysuspend_registered(pwrpriv)) {
+			//jeff: bypass resume here, do in late_resume
+			pwrpriv->do_late_resume = _TRUE;
+		} else {
+			ret = rtw_resume_process(pusb_intf);
+		}
+#else // Normal resume process
+		ret = rtw_resume_process(pusb_intf);
+#endif //CONFIG_RESUME_IN_WORKQUEUE
+	}
+	
+	return ret;
+
+}
+
+
+int rtw_resume_process(struct usb_interface *pusb_intf)
+{
+	struct net_device *pnetdev;
+	struct usb_device *usb_dev;
+	_adapter *padapter;
+	struct pwrctrl_priv *pwrpriv;
+	
+	_func_enter_;
+
+	DBG_8192C("###########  rtw_resume  #################\n");
+
+	if(pusb_intf) {
+		pnetdev=usb_get_intfdata(pusb_intf);
+		usb_dev = interface_to_usbdev(pusb_intf);
+	} else {
+		goto error_exit;
+	}
+
+	padapter = (_adapter*)rtw_netdev_priv(pnetdev);
+	pwrpriv = &padapter->pwrctrlpriv;	
+	
+	if(padapter)//system resume
+	{
+		_enter_pwrlock(&pwrpriv->lock);
+		rtw_reset_drv_sw(padapter);
+		pwrpriv->bkeepfwalive = _FALSE;
+		
+		DBG_8192C("bkeepfwalive(%x)\n",pwrpriv->bkeepfwalive);
+		if(pm_netdev_open(pnetdev,_TRUE) != 0)
+			goto error_exit;
+
+		netif_device_attach(pnetdev);	
+		netif_carrier_on(pnetdev);		
+		
+#ifdef CONFIG_AUTOSUSPEND
+		if(pwrpriv->bInternalAutoSuspend )
+		{			
+			#ifdef CONFIG_AUTOSUSPEND	
+			#ifdef SUPPORT_HW_RFOFF_DETECTED
+				// The FW command register update must after MAC and FW init ready.
+			if((padapter->bFWReady) && ( padapter->pwrctrlpriv.bHWPwrPindetect ) && (padapter->registrypriv.usbss_enable ))
+			{
+				//rtl8192c_set_FwSelectSuspend_cmd(padapter,_FALSE ,500);//note fw to support hw power down ping detect
+				u8 bOpen = _FALSE;
+				rtw_interface_ps_func(padapter,HAL_USB_SELECT_SUSPEND,&bOpen);
+			}
+			#endif
+			#endif
+		
+			pwrpriv->bInternalAutoSuspend = _FALSE;
+			pwrpriv->brfoffbyhw = _FALSE;
+			{
+				DBG_8192C("enc_algorithm(%x),wepkeymask(%x)\n",
+					padapter->securitypriv.dot11PrivacyAlgrthm,pwrpriv->wepkeymask);
+				if(	(_WEP40_ == padapter->securitypriv.dot11PrivacyAlgrthm) ||
+					(_WEP104_ == padapter->securitypriv.dot11PrivacyAlgrthm))
+				{
+					sint keyid;	
+			
+					for(keyid=0;keyid<4;keyid++){				
+						if(pwrpriv->wepkeymask & BIT(keyid)) {
+							if(keyid == padapter->securitypriv.dot11PrivacyKeyIndex)
+								rtw_set_key(padapter,&padapter->securitypriv, keyid, 1);
+							else
+								rtw_set_key(padapter,&padapter->securitypriv, keyid, 0);
+						}
+					}
+				}
+			}
+		}
+#endif
+		_exit_pwrlock(&pwrpriv->lock);
+	}
+	else
+	{
+		goto error_exit;
+	}
+
+	if( padapter->pid[1]!=0) {
+		DBG_871X("pid[1]:%d\n",padapter->pid[1]);
+		rtw_signal_process(padapter->pid[1], SIGUSR2);
+	}	
+
+	#ifdef CONFIG_LAYER2_ROAMING_RESUME
+	rtw_roaming(padapter, NULL);
+	#endif	
+	
+	DBG_871X("###########  rtw_resume  done#################\n");
+	
+	#ifdef CONFIG_RESUME_IN_WORKQUEUE
+	rtw_unlock_suspend();
+	#endif //CONFIG_RESUME_IN_WORKQUEUE
+	
+	_func_exit_;
+	
+	return 0;
+error_exit:
+	DBG_8192C("%s, Open net dev failed \n",__FUNCTION__);
+
+	DBG_871X("###########  rtw_resume  done with error#################\n");
+	
+	#ifdef CONFIG_RESUME_IN_WORKQUEUE
+	rtw_unlock_suspend();
+	#endif //CONFIG_RESUME_IN_WORKQUEUE
+	
+	_func_exit_;
+	
+	return (-1);
+}
+
+#ifdef CONFIG_AUTOSUSPEND
+void autosuspend_enter(_adapter* padapter)	
+{
+	struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
+	pwrpriv->bInternalAutoSuspend = _TRUE;
+	pwrpriv->bips_processing = _TRUE;	
+	
+	DBG_8192C("==>autosuspend_enter...........\n");	
+	
+	if(rf_off == pwrpriv->change_rfpwrstate )
+	{	
+		#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35))
+		usb_enable_autosuspend(padapter->dvobjpriv.pusbdev);
+		#else
+		padapter->dvobjpriv.pusbdev->autosuspend_disabled = 0;//autosuspend disabled by the user	
+		#endif
+	
+		#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,33))
+			usb_autopm_put_interface(padapter->dvobjpriv.pusbintf);	
+		#elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,20))		
+			usb_autopm_enable(padapter->dvobjpriv.pusbintf);
+		#else
+			usb_autosuspend_device(padapter->dvobjpriv.pusbdev, 1);
+		#endif
+	}
+	#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,32))
+	DBG_8192C("...pm_usage_cnt(%d).....\n",atomic_read(&(padapter->dvobjpriv.pusbintf->pm_usage_cnt)));
+	#else
+	DBG_8192C("...pm_usage_cnt(%d).....\n",padapter->dvobjpriv.pusbintf->pm_usage_cnt);
+	#endif
+	
+}
+int autoresume_enter(_adapter* padapter)
+{
+	int result = _SUCCESS;
+	struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
+	struct security_priv* psecuritypriv=&(padapter->securitypriv);
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	
+	
+	DBG_8192C("====> autoresume_enter \n");
+	
+	if(rf_off == pwrpriv->rf_pwrstate )
+	{
+		pwrpriv->ps_flag = _FALSE;
+		#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,33))				
+			if (usb_autopm_get_interface( padapter->dvobjpriv.pusbintf) < 0) 
+			{
+				DBG_8192C( "can't get autopm: %d\n", result);
+				result = _FAIL;
+				goto error_exit;
+			}			
+		#elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,20))				
+			usb_autopm_disable(padapter->dvobjpriv.pusbintf);
+		#else
+			usb_autoresume_device(padapter->dvobjpriv.pusbdev, 1);
+		#endif
+
+		#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,32))
+		DBG_8192C("...pm_usage_cnt(%d).....\n",atomic_read(&(padapter->dvobjpriv.pusbintf->pm_usage_cnt)));
+		#else
+		DBG_8192C("...pm_usage_cnt(%d).....\n",padapter->dvobjpriv.pusbintf->pm_usage_cnt);
+		#endif	
+	}
+	DBG_8192C("<==== autoresume_enter \n");
+error_exit:	
+
+	return result;
+}
+#endif
+
+extern char* ifname;
+/*
+ * drv_init() - a device potentially for us
+ *
+ * notes: drv_init() is called when the bus driver has located a card for us to support.
+ *        We accept the new device by returning 0.
+*/
+static int rtw_drv_init(struct usb_interface *pusb_intf, const struct usb_device_id *pdid)
+{
+	int i;
+
+	uint status;
+	_adapter *padapter = NULL;
+	struct dvobj_priv *pdvobjpriv;
+	struct net_device *pnetdev;
+
+	RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("+rtw_drv_init\n"));
+	//DBG_8192C("+rtw_drv_init\n");
+
+	//2009.8.13, by Thomas
+	// In this probe function, O.S. will provide the usb interface pointer to driver.
+	// We have to increase the reference count of the usb device structure by using the usb_get_dev function.
+	usb_get_dev(interface_to_usbdev(pusb_intf));
+
+	//step 0.
+	process_spec_devid(pdid);
+
+	//step 1. set USB interface data
+	// init data
+	pnetdev = rtw_init_netdev(NULL);
+	if (!pnetdev) 
+		goto error;
+	
+	SET_NETDEV_DEV(pnetdev, &pusb_intf->dev);
+
+	padapter = rtw_netdev_priv(pnetdev);
+	padapter->bDriverStopped=_TRUE;
+	pdvobjpriv = &padapter->dvobjpriv;
+	pdvobjpriv->padapter = padapter;
+	pdvobjpriv->pusbintf = pusb_intf ;
+	pdvobjpriv->pusbdev = interface_to_usbdev(pusb_intf);
+
+	// set data
+	usb_set_intfdata(pusb_intf, pnetdev);
+
+	//set interface_type to usb
+	padapter->interface_type = RTW_USB;
+
+	//step 1-1., decide the chip_type via vid/pid
+	decide_chip_type_by_usb_device_id(padapter, pdid);
+
+	//step 2.	
+	if(padapter->chip_type == RTL8188C_8192C)
+	{
+#ifdef CONFIG_RTL8192C
+		rtl8192cu_set_hal_ops(padapter);
+#endif
+	}
+	else if(padapter->chip_type == RTL8192D)
+	{
+#ifdef CONFIG_RTL8192D
+		rtl8192du_set_hal_ops(padapter);
+#endif
+	}
+	else
+	{
+		DBG_8192C("Detect NULL_CHIP_TYPE\n");
+		status = _FAIL;
+		goto error;
+	}
+
+	//step 3.	initialize the dvobj_priv 
+	padapter->dvobj_init=&usb_dvobj_init;
+	padapter->dvobj_deinit=&usb_dvobj_deinit;
+	padapter->intf_start=&usb_intf_start;
+	padapter->intf_stop=&usb_intf_stop;
+
+	//step 3.
+	//initialize the dvobj_priv ,include Chip version		
+	if (padapter->dvobj_init == NULL){
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("\n Initialize dvobjpriv.dvobj_init error!!!\n"));
+		goto error;
+	}
+
+	status = padapter->dvobj_init(padapter);	
+	if (status != _SUCCESS) {
+		RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("initialize device object priv Failed!\n"));
+		goto error;
+	}
+
+	//step 4. read efuse/eeprom data and get mac_addr
+	intf_read_chip_info(padapter);	
+
+	//step 5.
+	status = rtw_init_drv_sw(padapter);
+	if(status ==_FAIL){
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("Initialize driver software resource Failed!\n"));
+		goto error;
+	}
+
+#ifdef CONFIG_PM
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18))
+	if(padapter->pwrctrlpriv.bSupportRemoteWakeup)
+	{
+		pdvobjpriv->pusbdev->do_remote_wakeup=1;
+		pusb_intf->needs_remote_wakeup = 1;		
+		device_init_wakeup(&pusb_intf->dev, 1);
+		DBG_8192C("\n  padapter->pwrctrlpriv.bSupportRemoteWakeup~~~~~~\n");
+		DBG_8192C("\n  padapter->pwrctrlpriv.bSupportRemoteWakeup~~~[%d]~~~\n",device_may_wakeup(&pusb_intf->dev));
+	}
+#endif
+#endif
+
+#ifdef CONFIG_AUTOSUSPEND
+	if( padapter->registrypriv.power_mgnt != PS_MODE_ACTIVE )
+	{
+		if(padapter->registrypriv.usbss_enable ){ 	/* autosuspend (2s delay) */
+			#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,38))
+			pdvobjpriv->pusbdev->dev.power.autosuspend_delay = 0 * HZ;//15 * HZ; idle-delay time		
+			#else
+			pdvobjpriv->pusbdev->autosuspend_delay = 0 * HZ;//15 * HZ; idle-delay time		 	
+			#endif
+
+			#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35))
+			usb_enable_autosuspend(padapter->dvobjpriv.pusbdev);
+			#elif  (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,34))
+			padapter->bDisableAutosuspend = padapter->dvobjpriv.pusbdev->autosuspend_disabled ;
+			padapter->dvobjpriv.pusbdev->autosuspend_disabled = 0;//autosuspend disabled by the user
+			#endif
+
+			usb_autopm_get_interface(padapter->dvobjpriv.pusbintf );//init pm_usage_cnt ,let it start from 1
+
+			#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,32))
+			DBG_8192C("%s...pm_usage_cnt(%d).....\n",__FUNCTION__,atomic_read(&(pdvobjpriv->pusbintf ->pm_usage_cnt)));
+			#else
+			DBG_8192C("%s...pm_usage_cnt(%d).....\n",__FUNCTION__,pdvobjpriv->pusbintf ->pm_usage_cnt);
+			#endif							
+		}
+	}	
+#endif
+	// alloc dev name after read efuse.
+	rtw_init_netdev_name(pnetdev, ifname);
+
+	rtw_macaddr_cfg(padapter->eeprompriv.mac_addr);
+
+	_rtw_memcpy(pnetdev->dev_addr, padapter->eeprompriv.mac_addr, ETH_ALEN);
+	DBG_8192C("MAC Address from pnetdev->dev_addr= " MAC_FMT "\n", MAC_ARG(pnetdev->dev_addr));	
+
+
+	//step 6.
+	/* Tell the network stack we exist */
+	if (register_netdev(pnetdev) != 0) {
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("register_netdev() failed\n"));
+		goto error;
+	}
+
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-drv_init - Adapter->bDriverStopped=%d, Adapter->bSurpriseRemoved=%d\n",padapter->bDriverStopped, padapter->bSurpriseRemoved));
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-871x_drv - drv_init, success!\n"));
+	//DBG_8192C("-871x_drv - drv_init, success!\n");
+
+#ifdef CONFIG_PROC_DEBUG
+#ifdef RTK_DMP_PLATFORM
+	rtw_proc_init_one(pnetdev);
+#endif
+#endif
+
+#ifdef CONFIG_HOSTAPD_MLME
+	hostapd_mode_init(padapter);
+#endif
+
+#ifdef CONFIG_PLATFORM_RTD2880B
+	DBG_8192C("wlan link up\n");
+	rtd2885_wlan_netlink_sendMsg("linkup", "8712");
+#endif
+
+
+#ifdef CONFIG_GLOBAL_UI_PID
+	if(ui_pid[1]!=0) {
+		DBG_871X("ui_pid[1]:%d\n",ui_pid[1]);
+		rtw_signal_process(ui_pid[1], SIGUSR2);
+	}
+#endif
+
+	DBG_8192C("bDriverStopped:%d, bSurpriseRemoved:%d, bup:%d, hw_init_completed:%d\n"
+		,padapter->bDriverStopped
+		,padapter->bSurpriseRemoved
+		,padapter->bup
+		,padapter->hw_init_completed
+	);
+
+	return 0;
+
+error:
+
+	usb_put_dev(interface_to_usbdev(pusb_intf));//decrease the reference count of the usb device structure if driver fail on initialzation
+
+	usb_set_intfdata(pusb_intf, NULL);
+
+	usb_dvobj_deinit(padapter);
+	
+	if (pnetdev)
+	{
+		//unregister_netdev(pnetdev);
+		rtw_free_netdev(pnetdev);
+	}
+
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-871x_usb - drv_init, fail!\n"));
+	//DBG_8192C("-871x_usb - drv_init, fail!\n");
+
+	return -ENODEV;
+}
+
+/*
+ * dev_remove() - our device is being removed
+*/
+//rmmod module & unplug(SurpriseRemoved) will call r871xu_dev_remove() => how to recognize both
+static void rtw_dev_remove(struct usb_interface *pusb_intf)
+{
+	struct net_device *pnetdev=usb_get_intfdata(pusb_intf);
+	_adapter *padapter = (_adapter*)rtw_netdev_priv(pnetdev);
+	struct mlme_priv *pmlmepriv= &padapter->mlmepriv;
+	struct dvobj_priv *pdvobjpriv = &padapter->dvobjpriv;
+	u8	bResetDevice = _FALSE;
+
+_func_exit_;
+
+	usb_set_intfdata(pusb_intf, NULL);
+
+	if(padapter)
+	{
+		DBG_8192C("+rtw_dev_remove\n");
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+dev_remove()\n"));
+
+		LeaveAllPowerSaveMode(padapter);
+
+		if(check_fwstate(pmlmepriv, _FW_LINKED))
+			disconnect_hdl(padapter, NULL);
+
+		if(drvpriv.drv_registered == _TRUE)
+		{
+			//DBG_8192C("r871xu_dev_remove():padapter->bSurpriseRemoved == _TRUE\n");
+			padapter->bSurpriseRemoved = _TRUE;
+		}
+		/*else
+		{
+			//DBG_8192C("r871xu_dev_remove():module removed\n");
+			padapter->hw_init_completed = _FALSE;
+		}*/
+
+#ifdef CONFIG_AP_MODE
+		free_mlme_ap_info(padapter);
+#ifdef CONFIG_HOSTAPD_MLME
+		hostapd_mode_unload(padapter);
+#endif //CONFIG_HOSTAPD_MLME
+#endif //CONFIG_AP_MODE
+
+		if(padapter->DriverState != DRIVER_DISAPPEAR)
+		{
+			if(pnetdev) {
+				unregister_netdev(pnetdev); //will call netdev_close()
+#ifdef CONFIG_PROC_DEBUG
+				rtw_proc_remove_one(pnetdev);
+#endif
+			}
+		}
+
+		rtw_cancel_all_timer(padapter);
+
+		rtw_dev_unload(padapter);
+
+		DBG_8192C("+r871xu_dev_remove, hw_init_completed=%d\n", padapter->hw_init_completed);
+
+		//Modify condition for 92DU DMDP 2010.11.18, by Thomas
+		//move code to here, avoid access null pointer. 2011.05.25.
+		if((pdvobjpriv->NumInterfaces != 2) || (pdvobjpriv->InterfaceNumber == 1))
+			bResetDevice = _TRUE;
+
+		//s6.
+		if(padapter->dvobj_deinit)
+		{
+			padapter->dvobj_deinit(padapter);
+		}
+		else
+		{
+			RT_TRACE(_module_hci_intfs_c_,_drv_err_,("Initialize hcipriv.hci_priv_init error!!!\n"));
+		}
+
+		//after rtw_free_drv_sw(), padapter has beed freed, don't refer to it.
+		rtw_free_drv_sw(padapter);	
+		
+	}
+
+	usb_put_dev(interface_to_usbdev(pusb_intf));//decrease the reference count of the usb device structure when disconnect
+
+	//If we didn't unplug usb dongle and remove/insert modlue, driver fails on sitesurvey for the first time when device is up . 
+	//Reset usb port for sitesurvey fail issue. 2009.8.13, by Thomas
+	if(_TRUE == bResetDevice)
+	{
+		if(interface_to_usbdev(pusb_intf)->state != USB_STATE_NOTATTACHED)
+		{
+			DBG_8192C("usb attached..., try to reset usb device\n");
+			usb_reset_device(interface_to_usbdev(pusb_intf));
+		}
+	}
+	
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-dev_remove()\n"));
+	DBG_8192C("-r871xu_dev_remove, done\n");
+
+#ifdef CONFIG_PLATFORM_RTD2880B
+	DBG_8192C("wlan link down\n");
+	rtd2885_wlan_netlink_sendMsg("linkdown", "8712");
+#endif
+
+	#ifdef DBG_MEM_ALLOC
+	rtw_dump_mem_stat ();
+	#endif
+_func_exit_;
+
+	return;
+
+}
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)) 
+extern int console_suspend_enabled;
+#endif
+
+static int __init rtw_drv_entry(void)
+{
+#ifdef CONFIG_PLATFORM_RTK_DMP
+	u32 tmp;
+	tmp=readl((volatile unsigned int*)0xb801a608);
+	tmp &= 0xffffff00;
+	tmp |= 0x55;
+	writel(tmp,(volatile unsigned int*)0xb801a608);//write dummy register for 1055
+#endif
+
+
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+rtw_drv_entry\n"));
+
+	DBG_8192C("\nrtw driver version=%s\n", DRIVERVERSION);		
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)) 
+	//console_suspend_enabled=0;
+#endif	
+
+	rtw_suspend_lock_init();
+
+	drvpriv.drv_registered = _TRUE;
+	return usb_register(&drvpriv.rtw_usb_drv);
+}
+
+static void __exit rtw_drv_halt(void)
+{
+	RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+rtw_drv_halt\n"));
+	DBG_8192C("+rtw_drv_halt\n");
+
+	rtw_suspend_lock_uninit();
+
+	drvpriv.drv_registered = _FALSE;
+	usb_deregister(&drvpriv.rtw_usb_drv);
+	DBG_8192C("-rtw_drv_halt\n");
+}
+
+
+module_init(rtw_drv_entry);
+module_exit(rtw_drv_halt);
+
+
+/*
+init (driver module)-> r8712u_drv_entry
+probe (sd device)-> r871xu_drv_init(dev_init)
+open (net_device) ->netdev_open
+close (net_device) ->netdev_close
+remove (sd device) ->r871xu_dev_remove
+exit (driver module)-> r8712u_drv_halt
+*/
+
+
+/*
+r8711s_drv_entry()
+r8711u_drv_entry()
+r8712s_drv_entry()
+r8712u_drv_entry()
+*/
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/os_dep/linux/xmit_linux.c linux-3.0.82x/drivers/net/wireless/rtl8188/os_dep/linux/xmit_linux.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/os_dep/linux/xmit_linux.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/os_dep/linux/xmit_linux.c	2017-09-23 03:42:50.082674869 +0800
@@ -0,0 +1,367 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+******************************************************************************/
+#define _XMIT_OSDEP_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+#include <if_ether.h>
+#include <ip.h>
+#include <rtw_byteorder.h>
+#include <wifi.h>
+#include <mlme_osdep.h>
+#include <xmit_osdep.h>
+#include <osdep_intf.h>
+#include <circ_buf.h>
+
+
+uint rtw_remainder_len(struct pkt_file *pfile)
+{
+	return (pfile->buf_len - ((SIZE_PTR)(pfile->cur_addr) - (SIZE_PTR)(pfile->buf_start)));
+}
+
+void _rtw_open_pktfile (_pkt *pktptr, struct pkt_file *pfile)
+{
+_func_enter_;
+
+	pfile->pkt = pktptr;
+	pfile->cur_addr = pfile->buf_start = pktptr->data;
+	pfile->pkt_len = pfile->buf_len = pktptr->len;
+
+	pfile->cur_buffer = pfile->buf_start ;
+	
+_func_exit_;
+}
+
+uint _rtw_pktfile_read (struct pkt_file *pfile, u8 *rmem, uint rlen)
+{	
+	uint	len = 0;
+	
+_func_enter_;
+
+       len =  rtw_remainder_len(pfile);
+      	len = (rlen > len)? len: rlen;
+
+       if(rmem)
+	  skb_copy_bits(pfile->pkt, pfile->buf_len-pfile->pkt_len, rmem, len);
+
+       pfile->cur_addr += len;
+       pfile->pkt_len -= len;
+	   
+_func_exit_;	       		
+
+	return len;	
+}
+
+sint rtw_endofpktfile(struct pkt_file *pfile)
+{
+_func_enter_;
+
+	if (pfile->pkt_len == 0) {
+_func_exit_;
+		return _TRUE;
+	}
+
+_func_exit_;
+
+	return _FALSE;
+}
+
+void rtw_set_tx_chksum_offload(_pkt *pkt, struct pkt_attrib *pattrib)
+{
+
+#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
+	struct sk_buff *skb = (struct sk_buff *)pkt;
+	pattrib->hw_tcp_csum = 0;
+	
+	if (skb->ip_summed == CHECKSUM_PARTIAL) {
+		if (skb_shinfo(skb)->nr_frags == 0)
+		{	
+                        const struct iphdr *ip = ip_hdr(skb);
+                        if (ip->protocol == IPPROTO_TCP) {
+                                // TCP checksum offload by HW
+                                DBG_8192C("CHECKSUM_PARTIAL TCP\n");
+                                pattrib->hw_tcp_csum = 1;
+                                //skb_checksum_help(skb);
+                        } else if (ip->protocol == IPPROTO_UDP) {
+                                //DBG_8192C("CHECKSUM_PARTIAL UDP\n");
+#if 1                       
+                                skb_checksum_help(skb);
+#else
+                                // Set UDP checksum = 0 to skip checksum check
+                                struct udphdr *udp = skb_transport_header(skb);
+                                udp->check = 0;
+#endif
+                        } else {
+				DBG_8192C("%s-%d TCP CSUM offload Error!!\n", __FUNCTION__, __LINE__);
+                                WARN_ON(1);     /* we need a WARN() */
+			    }
+		}
+		else { // IP fragmentation case
+			DBG_8192C("%s-%d nr_frags != 0, using skb_checksum_help(skb);!!\n", __FUNCTION__, __LINE__);
+                	skb_checksum_help(skb);
+		}		
+	}
+#endif	
+	
+}
+
+int rtw_os_xmit_resource_alloc(_adapter *padapter, struct xmit_buf *pxmitbuf,u32 alloc_sz)
+{
+#ifdef CONFIG_USB_HCI
+	int i;
+	struct dvobj_priv	*pdvobjpriv = &padapter->dvobjpriv;
+	struct usb_device	*pusbd = pdvobjpriv->pusbdev;
+
+#ifdef CONFIG_USE_USB_BUFFER_ALLOC_TX
+	pxmitbuf->pallocated_buf = rtw_usb_buffer_alloc(pusbd, (size_t)alloc_sz, GFP_ATOMIC, &pxmitbuf->dma_transfer_addr);
+	pxmitbuf->pbuf = pxmitbuf->pallocated_buf;
+	if(pxmitbuf->pallocated_buf == NULL)
+		return _FAIL;
+#else // CONFIG_USE_USB_BUFFER_ALLOC_TX
+	
+	pxmitbuf->pallocated_buf = rtw_zmalloc(alloc_sz);
+	if (pxmitbuf->pallocated_buf == NULL)
+	{
+		return _FAIL;
+	}
+
+	pxmitbuf->pbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitbuf->pallocated_buf), XMITBUF_ALIGN_SZ);
+	pxmitbuf->dma_transfer_addr = 0;
+
+#endif // CONFIG_USE_USB_BUFFER_ALLOC_TX
+
+	for(i=0; i<8; i++)
+      	{
+      		pxmitbuf->pxmit_urb[i] = usb_alloc_urb(0, GFP_KERNEL);
+             	if(pxmitbuf->pxmit_urb[i] == NULL) 
+             	{
+             		DBG_8192C("pxmitbuf->pxmit_urb[i]==NULL");
+	        	return _FAIL;	 
+             	}      		  	
+	
+      	}
+#endif
+#ifdef CONFIG_PCI_HCI
+	pxmitbuf->pallocated_buf = rtw_zmalloc(alloc_sz);
+	if (pxmitbuf->pallocated_buf == NULL)
+	{
+		return _FAIL;
+	}
+
+	pxmitbuf->pbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitbuf->pallocated_buf), XMITBUF_ALIGN_SZ);
+#endif
+
+	return _SUCCESS;	
+}
+
+void rtw_os_xmit_resource_free(_adapter *padapter, struct xmit_buf *pxmitbuf,u32 free_sz)
+{
+#ifdef CONFIG_USB_HCI
+	int i;
+	struct dvobj_priv	*pdvobjpriv = &padapter->dvobjpriv;
+	struct usb_device	*pusbd = pdvobjpriv->pusbdev;
+
+
+	for(i=0; i<8; i++)
+	{
+		if(pxmitbuf->pxmit_urb[i])
+		{
+			//usb_kill_urb(pxmitbuf->pxmit_urb[i]);
+			usb_free_urb(pxmitbuf->pxmit_urb[i]);
+		}
+	}
+
+#ifdef CONFIG_USE_USB_BUFFER_ALLOC_TX
+	rtw_usb_buffer_free(pusbd, (size_t)free_sz, pxmitbuf->pallocated_buf, pxmitbuf->dma_transfer_addr);
+	pxmitbuf->pallocated_buf =  NULL;
+	pxmitbuf->dma_transfer_addr = 0;	
+#else	// CONFIG_USE_USB_BUFFER_ALLOC_TX
+	if(pxmitbuf->pallocated_buf)
+		rtw_mfree(pxmitbuf->pallocated_buf, free_sz);
+#endif	// CONFIG_USE_USB_BUFFER_ALLOC_TX
+
+#endif
+#ifdef CONFIG_PCI_HCI
+	if(pxmitbuf->pallocated_buf)
+		rtw_mfree(pxmitbuf->pallocated_buf, free_sz);
+#endif
+}
+
+void rtw_os_pkt_complete(_adapter *padapter, _pkt *pkt)
+{
+	if (netif_queue_stopped(padapter->pnetdev))
+		netif_wake_queue(padapter->pnetdev);
+
+	dev_kfree_skb_any(pkt);
+}
+
+void rtw_os_xmit_complete(_adapter *padapter, struct xmit_frame *pxframe)
+{
+	if(pxframe->pkt)
+	{
+		//RT_TRACE(_module_xmit_osdep_c_,_drv_err_,("linux : rtw_os_xmit_complete, dev_kfree_skb()\n"));	
+
+		//dev_kfree_skb_any(pxframe->pkt);	
+		rtw_os_pkt_complete(padapter, pxframe->pkt);
+		
+	}	
+
+	pxframe->pkt = NULL;
+}
+
+void rtw_os_xmit_schedule(_adapter *padapter)
+{
+	_irqL  irqL;
+	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
+
+	_enter_critical_bh(&pxmitpriv->lock, &irqL);
+	
+	if(rtw_txframes_pending(padapter))	
+	{
+		tasklet_hi_schedule(&pxmitpriv->xmit_tasklet);
+	}
+
+	_exit_critical_bh(&pxmitpriv->lock, &irqL);
+}
+
+
+
+#ifdef CONFIG_TX_MCAST2UNI
+int rtw_mlcst2unicst(_adapter *padapter, struct sk_buff *skb)
+{
+	struct	sta_priv *pstapriv = &padapter->stapriv;
+	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
+	_irqL	irqL;
+	_list	*phead, *plist;
+	struct sk_buff *newskb;
+	struct sta_info *psta = NULL;
+	s32	res;
+
+	_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL);
+	phead = &pstapriv->asoc_list;
+	plist = get_next(phead);
+	
+	//free sta asoc_queue
+	while ((rtw_end_of_queue_search(phead, plist)) == _FALSE)	
+	{		
+		psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list);
+		
+		plist = get_next(plist);
+
+		/* avoid   come from STA1 and send back STA1 */ 
+		if (!memcmp(psta->hwaddr, &skb->data[6], 6))	
+			continue; 
+
+		newskb = skb_copy(skb, GFP_ATOMIC);
+		
+		if (newskb) {
+			memcpy(newskb->data, psta->hwaddr, 6);
+			res = rtw_xmit(padapter, &newskb);
+			if (res < 0) {
+				DBG_871X("%s()-%d: rtw_xmit() return error!\n", __FUNCTION__, __LINE__);
+				pxmitpriv->tx_drop++;
+				dev_kfree_skb_any(newskb);			
+			} else
+				pxmitpriv->tx_pkts++;
+		} else {
+			DBG_871X("%s-%d: skb_copy() failed!\n", __FUNCTION__, __LINE__);
+			pxmitpriv->tx_drop++;
+
+			_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL);
+			//dev_kfree_skb_any(skb);
+			return _FALSE;	// Caller shall tx this multicast frame via normal way.
+		}
+	}
+
+	_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL);
+	dev_kfree_skb_any(skb);
+	return _TRUE;
+}
+#endif	// CONFIG_TX_MCAST2UNI
+
+
+int rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev)
+{
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev);
+	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
+#ifdef CONFIG_TX_MCAST2UNI
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	extern int rtw_mc2u_disable;
+#endif	// CONFIG_TX_MCAST2UNI	
+	s32 res = 0;
+	int ret = 0;
+
+_func_enter_;
+
+	RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("+xmit_enry\n"));
+
+	if (rtw_if_up(padapter) == _FALSE) {
+		RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("rtw_xmit_entry: rtw_if_up fail\n"));
+		#ifdef DBG_TX_DROP_FRAME
+		DBG_871X("DBG_TX_DROP_FRAME %s if_up fail\n", __FUNCTION__);
+		#endif
+		goto drop_packet;
+	}
+
+#ifdef CONFIG_TX_MCAST2UNI
+	if ( !rtw_mc2u_disable
+		&& check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE
+		&& ( IP_MCAST_MAC(pkt->data)
+			|| ICMPV6_MCAST_MAC(pkt->data) )
+		)
+	{
+		if ( pxmitpriv->free_xmitframe_cnt > (NR_XMITFRAME/4) ) {
+			res = rtw_mlcst2unicst(padapter, pkt);
+			if (res == _TRUE) {
+				goto exit;
+			}
+		} else {
+			//DBG_871X("Stop M2U(%d, %d)! ", pxmitpriv->free_xmitframe_cnt, pxmitpriv->free_xmitbuf_cnt);
+			//DBG_871X("!m2u );
+		}
+	}	
+#endif	// CONFIG_TX_MCAST2UNI	
+
+	res = rtw_xmit(padapter, &pkt);
+	if (res < 0) {
+		#ifdef DBG_TX_DROP_FRAME
+		DBG_871X("DBG_TX_DROP_FRAME %s rtw_xmit fail\n", __FUNCTION__);
+		#endif
+		goto drop_packet;
+	}
+	pxmitpriv->tx_pkts++;
+
+	RT_TRACE(_module_xmit_osdep_c_, _drv_info_, ("rtw_xmit_entry: tx_pkts=%d\n", (u32)pxmitpriv->tx_pkts));
+	goto exit;
+
+drop_packet:
+	pxmitpriv->tx_drop++;
+	dev_kfree_skb_any(pkt);
+	RT_TRACE(_module_xmit_osdep_c_, _drv_notice_, ("rtw_xmit_entry: drop, tx_drop=%d\n", (u32)pxmitpriv->tx_drop));
+
+exit:
+
+_func_exit_;
+
+	return 0;
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/os_dep/osdep_service.c linux-3.0.82x/drivers/net/wireless/rtl8188/os_dep/osdep_service.c
--- linux-3.0.82/drivers/net/wireless/rtl8188/os_dep/osdep_service.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/os_dep/osdep_service.c	2017-09-23 03:42:50.082674869 +0800
@@ -0,0 +1,1555 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *                                        
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+
+#define _OSDEP_SERVICE_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <recv_osdep.h>
+#include <linux/vmalloc.h>
+
+#ifdef RTK_DMP_PLATFORM
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12))
+#include <linux/pageremap.h>
+#endif
+#endif
+
+#define RT_TAG	'1178'
+
+#ifdef DBG_MEMORY_LEAK
+#ifdef PLATFORM_LINUX
+#include <asm/atomic.h>
+atomic_t _malloc_cnt = ATOMIC_INIT(0);
+atomic_t _malloc_size = ATOMIC_INIT(0);
+#endif
+#endif /* DBG_MEMORY_LEAK */
+
+
+#if defined(PLATFORM_LINUX)
+/*
+* Translate the OS dependent @param error_code to OS independent RTW_STATUS_CODE
+* @return: one of RTW_STATUS_CODE
+*/
+inline int RTW_STATUS_CODE(int error_code){
+	if(error_code >=0)
+		return _SUCCESS;
+
+	switch(error_code) {
+		//case -ETIMEDOUT:
+		//	return RTW_STATUS_TIMEDOUT;
+		default:
+			return _FAIL;
+	}
+}
+#else
+inline int RTW_STATUS_CODE(int error_code){
+	return error_code;
+}
+#endif
+
+
+inline u8* _rtw_vmalloc(u32 sz)
+{
+	u8 	*pbuf;
+#ifdef PLATFORM_LINUX	
+	pbuf = vmalloc(sz);
+#endif	
+	
+#ifdef PLATFORM_WINDOWS
+	NdisAllocateMemoryWithTag(&pbuf,sz, RT_TAG);	
+#endif
+
+#ifdef DBG_MEMORY_LEAK
+#ifdef PLATFORM_LINUX
+	if ( pbuf != NULL) {
+		atomic_inc(&_malloc_cnt);
+		atomic_add(sz, &_malloc_size);
+	}
+#endif
+#endif /* DBG_MEMORY_LEAK */
+
+	return pbuf;	
+}
+
+inline u8* _rtw_zvmalloc(u32 sz)
+{
+	u8 	*pbuf;
+#ifdef PLATFORM_LINUX
+	pbuf = _rtw_vmalloc(sz);
+	if (pbuf != NULL)
+		memset(pbuf, 0, sz);
+#endif	
+	
+#ifdef PLATFORM_WINDOWS
+	NdisAllocateMemoryWithTag(&pbuf,sz, RT_TAG);
+	if (pbuf != NULL)
+		NdisFillMemory(pbuf, sz, 0);
+#endif
+
+	return pbuf;	
+}
+
+inline void _rtw_vmfree(u8 *pbuf, u32 sz)
+{
+#ifdef	PLATFORM_LINUX
+	vfree(pbuf);
+#endif	
+	
+#ifdef PLATFORM_WINDOWS
+	NdisFreeMemory(pbuf,sz, 0);
+#endif
+
+#ifdef DBG_MEMORY_LEAK
+#ifdef PLATFORM_LINUX
+	atomic_dec(&_malloc_cnt);
+	atomic_sub(sz, &_malloc_size);
+#endif
+#endif /* DBG_MEMORY_LEAK */
+}
+
+u8* _rtw_malloc(u32 sz)
+{
+
+	u8 	*pbuf=NULL;
+
+#ifdef PLATFORM_LINUX
+#ifdef RTK_DMP_PLATFORM
+	if(sz > 0x4000)
+		pbuf = (u8 *)dvr_malloc(sz);
+	else
+#endif
+		pbuf = kmalloc(sz, /*GFP_KERNEL*/GFP_ATOMIC);
+
+#endif	
+	
+#ifdef PLATFORM_WINDOWS
+
+	NdisAllocateMemoryWithTag(&pbuf,sz, RT_TAG);
+
+#endif
+
+#ifdef DBG_MEMORY_LEAK
+#ifdef PLATFORM_LINUX
+	if ( pbuf != NULL) {
+		atomic_inc(&_malloc_cnt);
+		atomic_add(sz, &_malloc_size);
+	}
+#endif
+#endif /* DBG_MEMORY_LEAK */
+
+	return pbuf;	
+	
+}
+
+
+u8* _rtw_zmalloc(u32 sz)
+{
+	u8 	*pbuf = _rtw_malloc(sz);
+
+	if (pbuf != NULL) {
+
+#ifdef PLATFORM_LINUX
+		memset(pbuf, 0, sz);
+#endif	
+	
+#ifdef PLATFORM_WINDOWS
+		NdisFillMemory(pbuf, sz, 0);
+#endif
+
+	}
+
+	return pbuf;	
+	
+}
+
+void	_rtw_mfree(u8 *pbuf, u32 sz)
+{
+
+#ifdef	PLATFORM_LINUX
+#ifdef RTK_DMP_PLATFORM
+	if(sz > 0x4000)
+		dvr_free(pbuf);
+	else
+#endif
+		kfree(pbuf);
+
+#endif	
+	
+#ifdef PLATFORM_WINDOWS
+
+	NdisFreeMemory(pbuf,sz, 0);
+
+#endif
+	
+#ifdef DBG_MEMORY_LEAK
+#ifdef PLATFORM_LINUX
+	atomic_dec(&_malloc_cnt);
+	atomic_sub(sz, &_malloc_size);
+#endif
+#endif /* DBG_MEMORY_LEAK */
+	
+}
+
+
+#ifdef DBG_MEM_ALLOC
+
+struct rtw_dbg_mem_stat {
+	ATOMIC_T vir_alloc; // the memory bytes we allocate now
+	ATOMIC_T vir_peak; // the peak memory bytes we allocate 
+	ATOMIC_T vir_alloc_err; // the error times we fail to allocate memory
+	
+	ATOMIC_T phy_alloc;
+	ATOMIC_T phy_peak;
+	ATOMIC_T phy_alloc_err;
+} rtw_dbg_mem_stat;
+
+enum {
+	MEM_STAT_VIR_ALLOC_SUCCESS,
+	MEM_STAT_VIR_ALLOC_FAIL,
+	MEM_STAT_VIR_FREE,
+	MEM_STAT_PHY_ALLOC_SUCCESS,
+	MEM_STAT_PHY_ALLOC_FAIL,
+	MEM_STAT_PHY_FREE
+};
+
+void rtw_dump_mem_stat (void)
+{
+	int vir_alloc, vir_peak, vir_alloc_err, phy_alloc, phy_peak, phy_alloc_err;
+	
+	vir_alloc=ATOMIC_READ(&rtw_dbg_mem_stat.vir_alloc);
+	vir_peak=ATOMIC_READ(&rtw_dbg_mem_stat.vir_peak);
+	vir_alloc_err=ATOMIC_READ(&rtw_dbg_mem_stat.vir_alloc_err);
+
+	phy_alloc=ATOMIC_READ(&rtw_dbg_mem_stat.phy_alloc);
+	phy_peak=ATOMIC_READ(&rtw_dbg_mem_stat.phy_peak);
+	phy_alloc_err=ATOMIC_READ(&rtw_dbg_mem_stat.phy_alloc_err);
+
+	DBG_871X("vir_alloc:%d, vir_peak:%d,vir_alloc_err:%d, phy_alloc:%d, phy_peak:%d, phy_alloc_err:%d\n"
+		, vir_alloc, vir_peak, vir_alloc_err
+		, phy_alloc, phy_peak, phy_alloc_err
+	);
+}
+
+void rtw_update_mem_stat(u8 flag, u32 sz)
+{
+	static u32 update_time = 0;
+	int peak, alloc;
+
+	if(!update_time) {
+		ATOMIC_SET(&rtw_dbg_mem_stat.vir_alloc,0);
+		ATOMIC_SET(&rtw_dbg_mem_stat.vir_peak,0);
+		ATOMIC_SET(&rtw_dbg_mem_stat.vir_alloc_err,0);
+		ATOMIC_SET(&rtw_dbg_mem_stat.phy_alloc,0);
+		ATOMIC_SET(&rtw_dbg_mem_stat.phy_peak,0);
+		ATOMIC_SET(&rtw_dbg_mem_stat.phy_alloc_err,0);
+	}
+		
+	switch(flag) {
+		case MEM_STAT_VIR_ALLOC_SUCCESS:
+			alloc = ATOMIC_ADD_RETURN(&rtw_dbg_mem_stat.vir_alloc, sz);
+			peak=ATOMIC_READ(&rtw_dbg_mem_stat.vir_peak);
+			if (peak<alloc)
+				ATOMIC_SET(&rtw_dbg_mem_stat.vir_peak, alloc);
+			break;
+			
+		case MEM_STAT_VIR_ALLOC_FAIL:
+			ATOMIC_INC(&rtw_dbg_mem_stat.vir_alloc_err);
+			break;
+			
+		case MEM_STAT_VIR_FREE:
+			alloc = ATOMIC_SUB_RETURN(&rtw_dbg_mem_stat.vir_alloc, sz);
+			break;
+			
+		case MEM_STAT_PHY_ALLOC_SUCCESS:
+			alloc = ATOMIC_ADD_RETURN(&rtw_dbg_mem_stat.phy_alloc, sz);
+			peak=ATOMIC_READ(&rtw_dbg_mem_stat.phy_peak);
+			if (peak<alloc)
+				ATOMIC_SET(&rtw_dbg_mem_stat.phy_peak, alloc);
+			break;
+
+		case MEM_STAT_PHY_ALLOC_FAIL:
+			ATOMIC_INC(&rtw_dbg_mem_stat.phy_alloc_err);
+			break;
+		
+		case MEM_STAT_PHY_FREE:
+			alloc = ATOMIC_SUB_RETURN(&rtw_dbg_mem_stat.phy_alloc, sz);
+			
+	};
+
+	if (rtw_get_passing_time_ms(update_time) > 5000) {
+		rtw_dump_mem_stat();
+		update_time=rtw_get_current_time();
+	}
+	
+	
+}
+
+
+inline u8* dbg_rtw_vmalloc(u32 sz, const char *func, int line)
+{
+	u8  *p;
+	DBG_871X("DBG_MEM_ALLOC %s:%d %s(%d)\n", func,  line, __FUNCTION__, (sz));
+	
+	p=_rtw_vmalloc((sz));
+
+	rtw_update_mem_stat(
+		p ? MEM_STAT_VIR_ALLOC_SUCCESS : MEM_STAT_VIR_ALLOC_FAIL
+		, sz
+	);
+	
+	return p;
+}
+
+inline u8* dbg_rtw_zvmalloc(u32 sz, const char *func, int line)
+{
+	u8 *p;
+	DBG_871X("DBG_MEM_ALLOC %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz)); 
+	
+	p=_rtw_zvmalloc((sz)); 
+
+	rtw_update_mem_stat(
+		p ? MEM_STAT_VIR_ALLOC_SUCCESS : MEM_STAT_VIR_ALLOC_FAIL
+		, sz
+	);
+
+	return p;
+}
+
+inline void dbg_rtw_vmfree(u8 *pbuf, u32 sz, const char *func, int line)
+{
+	DBG_871X("DBG_MEM_ALLOC %s:%d %s(%p,%d)\n",  func, line, __FUNCTION__, (pbuf), (sz));
+	
+	_rtw_vmfree((pbuf), (sz)); 
+
+	rtw_update_mem_stat(
+		MEM_STAT_VIR_FREE
+		, sz
+	);
+
+}
+
+inline u8* dbg_rtw_malloc(u32 sz, const char *func, int line) 
+{
+	u8 *p;
+	
+	if((sz)>4096) 
+		DBG_871X("DBG_MEM_ALLOC !!!!!!!!!!!!!! %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz)); 
+
+	p=_rtw_malloc((sz));
+	
+	rtw_update_mem_stat(
+		p ? MEM_STAT_PHY_ALLOC_SUCCESS : MEM_STAT_PHY_ALLOC_FAIL
+		, sz
+	);
+
+	return p;
+}
+
+inline u8* dbg_rtw_zmalloc(u32 sz, const char *func, int line)
+{
+	u8 *p;
+
+	if((sz)>4096)
+		DBG_871X("DBG_MEM_ALLOC !!!!!!!!!!!!!! %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz));
+
+	p = _rtw_zmalloc((sz));
+
+	rtw_update_mem_stat(
+		p ? MEM_STAT_PHY_ALLOC_SUCCESS : MEM_STAT_PHY_ALLOC_FAIL
+		, sz
+	);
+
+	return p;
+		
+}
+
+inline void dbg_rtw_mfree(u8 *pbuf, u32 sz, const char *func, int line)
+{
+	if((sz)>4096)
+		DBG_871X("DBG_MEM_ALLOC !!!!!!!!!!!!!! %s:%d %s(%p,%d)\n", func, line, __FUNCTION__, (pbuf), (sz));
+	
+	_rtw_mfree((pbuf), (sz));
+
+	rtw_update_mem_stat(
+		MEM_STAT_PHY_FREE
+		, sz
+	);
+}
+#endif
+
+
+void _rtw_memcpy(void* dst, void* src, u32 sz)
+{
+
+#ifdef PLATFORM_LINUX
+
+	memcpy(dst, src, sz);
+
+#endif	
+	
+#ifdef PLATFORM_WINDOWS
+
+	NdisMoveMemory(dst, src, sz);
+
+#endif
+
+}
+
+int	_rtw_memcmp(void *dst, void *src, u32 sz)
+{
+
+#ifdef PLATFORM_LINUX
+//under Linux/GNU/GLibc, the return value of memcmp for two same mem. chunk is 0
+
+	if (!(memcmp(dst, src, sz)))
+		return _TRUE;
+	else
+		return _FALSE;
+#endif
+
+
+#ifdef PLATFORM_WINDOWS
+//under Windows, the return value of NdisEqualMemory for two same mem. chunk is 1
+	
+	if (NdisEqualMemory (dst, src, sz))
+		return _TRUE;
+	else
+		return _FALSE;
+
+#endif	
+	
+	
+	
+}
+
+void _rtw_memset(void *pbuf, int c, u32 sz)
+{
+
+#ifdef PLATFORM_LINUX
+
+        memset(pbuf, c, sz);
+
+#endif
+
+#ifdef PLATFORM_WINDOWS
+#if 0
+	NdisZeroMemory(pbuf, sz);
+	if (c != 0) memset(pbuf, c, sz);
+#else
+	NdisFillMemory(pbuf, sz, c);
+#endif
+#endif
+
+}
+
+void _rtw_init_listhead(_list *list)
+{
+
+#ifdef PLATFORM_LINUX
+
+        INIT_LIST_HEAD(list);
+
+#endif
+
+#ifdef PLATFORM_WINDOWS
+
+        NdisInitializeListHead(list);
+
+#endif
+
+}
+
+
+/*
+For the following list_xxx operations, 
+caller must guarantee the atomic context.
+Otherwise, there will be racing condition.
+*/
+u32	rtw_is_list_empty(_list *phead)
+{
+
+#ifdef PLATFORM_LINUX
+
+	if (list_empty(phead))
+		return _TRUE;
+	else
+		return _FALSE;
+
+#endif
+	
+
+#ifdef PLATFORM_WINDOWS
+
+	if (IsListEmpty(phead))
+		return _TRUE;
+	else
+		return _FALSE;
+
+#endif
+
+	
+}
+
+
+void rtw_list_insert_tail(_list *plist, _list *phead)
+{
+
+#ifdef PLATFORM_LINUX	
+	
+	list_add_tail(plist, phead);
+	
+#endif
+	
+#ifdef PLATFORM_WINDOWS
+
+  InsertTailList(phead, plist);
+
+#endif		
+	
+}
+
+
+/*
+
+Caller must check if the list is empty before calling rtw_list_delete
+
+*/
+
+
+void _rtw_init_sema(_sema	*sema, int init_val)
+{
+
+#ifdef PLATFORM_LINUX
+
+	sema_init(sema, init_val);
+
+#endif
+
+#ifdef PLATFORM_OS_XP
+
+	KeInitializeSemaphore(sema, init_val,  SEMA_UPBND); // count=0;
+
+#endif
+	
+#ifdef PLATFORM_OS_CE
+	if(*sema == NULL)
+		*sema = CreateSemaphore(NULL, init_val, SEMA_UPBND, NULL);
+#endif
+
+}
+
+void _rtw_free_sema(_sema	*sema)
+{
+
+#ifdef PLATFORM_OS_CE
+	CloseHandle(*sema);
+#endif
+
+}
+
+void _rtw_up_sema(_sema	*sema)
+{
+
+#ifdef PLATFORM_LINUX
+
+	up(sema);
+
+#endif	
+
+#ifdef PLATFORM_OS_XP
+
+	KeReleaseSemaphore(sema, IO_NETWORK_INCREMENT, 1,  FALSE );
+
+#endif
+
+#ifdef PLATFORM_OS_CE
+	ReleaseSemaphore(*sema,  1,  NULL );
+#endif
+}
+
+u32 _rtw_down_sema(_sema *sema)
+{
+
+#ifdef PLATFORM_LINUX
+	
+	if (down_interruptible(sema))
+		return _FAIL;
+	else
+		return _SUCCESS;
+
+#endif    	
+
+#ifdef PLATFORM_OS_XP
+
+	if(STATUS_SUCCESS == KeWaitForSingleObject(sema, Executive, KernelMode, TRUE, NULL))
+		return  _SUCCESS;
+	else
+		return _FAIL;
+#endif
+
+#ifdef PLATFORM_OS_CE
+	if(WAIT_OBJECT_0 == WaitForSingleObject(*sema, INFINITE ))
+		return _SUCCESS; 
+	else
+		return _FAIL;
+#endif
+}
+
+
+
+void	_rtw_mutex_init(_mutex *pmutex)
+{
+#ifdef PLATFORM_LINUX
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37))
+	mutex_init(pmutex);
+#else
+	init_MUTEX(pmutex);
+#endif
+
+#endif
+
+#ifdef PLATFORM_OS_XP
+
+	KeInitializeMutex(pmutex, 0);
+
+#endif
+
+#ifdef PLATFORM_OS_CE
+	*pmutex =  CreateMutex( NULL, _FALSE, NULL);
+#endif
+}
+
+
+void	_rtw_mutex_free(_mutex *pmutex)
+{
+#ifdef PLATFORM_LINUX
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37))
+	mutex_destroy(pmutex);
+#else	
+#endif
+
+#endif
+
+#ifdef PLATFORM_OS_XP
+
+#endif
+
+#ifdef PLATFORM_OS_CE
+
+#endif
+}
+
+void	_rtw_spinlock_init(_lock *plock)
+{
+
+#ifdef PLATFORM_LINUX
+
+	spin_lock_init(plock);
+
+#endif	
+	
+#ifdef PLATFORM_WINDOWS
+
+	NdisAllocateSpinLock(plock);
+
+#endif
+	
+}
+
+void	_rtw_spinlock_free(_lock *plock)
+{
+
+	
+#ifdef PLATFORM_WINDOWS
+
+	NdisFreeSpinLock(plock);
+
+#endif
+	
+}
+
+
+void	_rtw_spinlock(_lock	*plock)
+{
+
+#ifdef PLATFORM_LINUX
+
+	spin_lock(plock);
+
+#endif
+	
+#ifdef PLATFORM_WINDOWS
+
+	NdisAcquireSpinLock(plock);
+
+#endif
+	
+}
+
+void	_rtw_spinunlock(_lock *plock)
+{
+
+#ifdef PLATFORM_LINUX
+
+	spin_unlock(plock);
+
+#endif
+	
+#ifdef PLATFORM_WINDOWS
+
+	NdisReleaseSpinLock(plock);
+
+#endif
+}
+
+
+void	_rtw_spinlock_ex(_lock	*plock)
+{
+
+#ifdef PLATFORM_LINUX
+
+	spin_lock(plock);
+
+#endif
+	
+#ifdef PLATFORM_WINDOWS
+
+	NdisDprAcquireSpinLock(plock);
+
+#endif
+	
+}
+
+void	_rtw_spinunlock_ex(_lock *plock)
+{
+
+#ifdef PLATFORM_LINUX
+
+	spin_unlock(plock);
+
+#endif
+	
+#ifdef PLATFORM_WINDOWS
+
+	NdisDprReleaseSpinLock(plock);
+
+#endif
+}
+
+
+
+void	_rtw_init_queue(_queue	*pqueue)
+{
+
+	_rtw_init_listhead(&(pqueue->queue));
+
+	_rtw_spinlock_init(&(pqueue->lock));
+
+}
+
+u32	  _rtw_queue_empty(_queue	*pqueue)
+{
+	return (rtw_is_list_empty(&(pqueue->queue)));
+}
+
+
+u32 rtw_end_of_queue_search(_list *head, _list *plist)
+{
+	if (head == plist)
+		return _TRUE;
+	else
+		return _FALSE;
+}
+
+
+u32	rtw_get_current_time(void)
+{
+	
+#ifdef PLATFORM_LINUX
+	return jiffies;
+#endif	
+
+#ifdef PLATFORM_WINDOWS
+	LARGE_INTEGER	SystemTime;
+	NdisGetCurrentSystemTime(&SystemTime);
+	return (u32)(SystemTime.LowPart);// count of 100-nanosecond intervals 
+#endif
+}
+
+inline u32 rtw_systime_to_ms(u32 systime)
+{
+#ifdef PLATFORM_LINUX
+	return systime*1000/HZ;
+#endif	
+	
+#ifdef PLATFORM_WINDOWS
+	return systime /10000 ; 
+#endif
+}
+
+// the input parameter start use the same unit as returned by rtw_get_current_time
+inline s32 rtw_get_passing_time_ms(u32 start)
+{
+#ifdef PLATFORM_LINUX
+	return rtw_systime_to_ms(jiffies-start);
+#endif
+
+#ifdef PLATFORM_WINDOWS
+	LARGE_INTEGER	SystemTime;
+	NdisGetCurrentSystemTime(&SystemTime);
+	return rtw_systime_to_ms((u32)(SystemTime.LowPart) - start) ;
+#endif
+}
+
+inline s32 rtw_get_time_interval_ms(u32 start, u32 end)
+{
+#ifdef PLATFORM_LINUX
+	return rtw_systime_to_ms(end-start);
+#endif
+	
+#ifdef PLATFORM_WINDOWS
+	return rtw_systime_to_ms(end-start);
+#endif
+}
+	
+
+void rtw_sleep_schedulable(int ms)	
+{
+
+#ifdef PLATFORM_LINUX
+
+    u32 delta;
+    
+    delta = (ms * HZ)/1000;//(ms)
+    if (delta == 0) {
+        delta = 1;// 1 ms
+    }
+    set_current_state(TASK_INTERRUPTIBLE);
+    if (schedule_timeout(delta) != 0) {
+        return ;
+    }
+    return;
+
+#endif	
+	
+#ifdef PLATFORM_WINDOWS
+
+	NdisMSleep(ms*1000); //(us)*1000=(ms)
+
+#endif
+
+}
+
+
+void rtw_msleep_os(int ms)
+{
+
+#ifdef PLATFORM_LINUX
+
+  	msleep((unsigned int)ms);
+
+#endif	
+	
+#ifdef PLATFORM_WINDOWS
+
+	NdisMSleep(ms*1000); //(us)*1000=(ms)
+
+#endif
+
+
+}
+void rtw_usleep_os(int us)
+{
+
+#ifdef PLATFORM_LINUX
+  	
+      // msleep((unsigned int)us);
+      if ( 1 < (us/1000) )
+                msleep(1);
+      else
+		msleep( (us/1000) + 1);
+
+#endif	
+	
+#ifdef PLATFORM_WINDOWS
+
+	NdisMSleep(us); //(us)
+
+#endif
+
+
+}
+
+
+#ifdef DBG_DELAY_OS
+void _rtw_mdelay_os(int ms, const char *func, const int line)
+{
+	#if 0
+	if(ms>10)
+		DBG_871X("%s:%d %s(%d)\n", func, line, __FUNCTION__, ms);
+		rtw_msleep_os(ms);
+	return;
+	#endif
+
+
+	DBG_871X("%s:%d %s(%d)\n", func, line, __FUNCTION__, ms);
+
+#if defined(PLATFORM_LINUX)
+
+   	mdelay((unsigned long)ms); 
+
+#elif defined(PLATFORM_WINDOWS)
+
+	NdisStallExecution(ms*1000); //(us)*1000=(ms)
+
+#endif
+
+
+}
+void _rtw_udelay_os(int us, const char *func, const int line)
+{
+
+	#if 0
+	if(us > 1000) {
+	DBG_871X("%s:%d %s(%d)\n", func, line, __FUNCTION__, us);
+		rtw_usleep_os(us);
+		return;
+	}
+	#endif 
+
+
+	DBG_871X("%s:%d %s(%d)\n", func, line, __FUNCTION__, us);
+	
+	
+#if defined(PLATFORM_LINUX)
+
+      udelay((unsigned long)us); 
+
+#elif defined(PLATFORM_WINDOWS)
+
+	NdisStallExecution(us); //(us)
+
+#endif
+
+}
+#else
+void rtw_mdelay_os(int ms)
+{
+
+#ifdef PLATFORM_LINUX
+
+   	mdelay((unsigned long)ms); 
+
+#endif	
+	
+#ifdef PLATFORM_WINDOWS
+
+	NdisStallExecution(ms*1000); //(us)*1000=(ms)
+
+#endif
+
+
+}
+void rtw_udelay_os(int us)
+{
+
+#ifdef PLATFORM_LINUX
+
+      udelay((unsigned long)us); 
+
+#endif	
+	
+#ifdef PLATFORM_WINDOWS
+
+	NdisStallExecution(us); //(us)
+
+#endif
+
+}
+#endif
+
+#define RTW_SUSPEND_LOCK_NAME "rtw_wifi"
+
+#ifdef CONFIG_WAKELOCK
+static struct wake_lock rtw_suspend_lock;
+#elif defined(CONFIG_ANDROID_POWER)
+static android_suspend_lock_t rtw_suspend_lock ={
+	.name = RTW_SUSPEND_LOCK_NAME
+};
+#endif
+
+inline void rtw_suspend_lock_init()
+{
+	#if  defined(CONFIG_WAKELOCK) || defined(CONFIG_ANDROID_POWER)
+	DBG_871X("##########%s ###########\n", __FUNCTION__);
+	#endif
+
+	#ifdef CONFIG_WAKELOCK
+	wake_lock_init(&rtw_suspend_lock, WAKE_LOCK_SUSPEND, RTW_SUSPEND_LOCK_NAME);
+	#elif defined(CONFIG_ANDROID_POWER)
+	android_init_suspend_lock(&rtw_suspend_lock);
+	#endif
+	
+}
+
+inline void rtw_suspend_lock_uninit()
+{
+
+	#if  defined(CONFIG_WAKELOCK) || defined(CONFIG_ANDROID_POWER)
+	DBG_871X("##########%s###########\n", __FUNCTION__);
+	if(rtw_suspend_lock.link.next == LIST_POISON1 || rtw_suspend_lock.link.prev == LIST_POISON2) {
+		DBG_871X("##########%s########### list poison!!\n", __FUNCTION__);
+		return;	
+	}
+	#endif
+	
+	#ifdef CONFIG_WAKELOCK
+	wake_lock_destroy(&rtw_suspend_lock);
+	#elif defined(CONFIG_ANDROID_POWER)
+	android_uninit_suspend_lock(&rtw_suspend_lock);
+	#endif
+}
+
+
+inline void rtw_lock_suspend()
+{
+
+	#if  defined(CONFIG_WAKELOCK) || defined(CONFIG_ANDROID_POWER)
+	//DBG_871X("##########%s###########\n", __FUNCTION__);
+	if(rtw_suspend_lock.link.next == LIST_POISON1 || rtw_suspend_lock.link.prev == LIST_POISON2) {
+		DBG_871X("##########%s########### list poison!!\n", __FUNCTION__);
+		return;	
+	}
+	#endif
+	
+	#ifdef CONFIG_WAKELOCK
+	wake_lock(&rtw_suspend_lock);
+	#elif defined(CONFIG_ANDROID_POWER)
+	android_lock_suspend(&rtw_suspend_lock);
+	#endif
+}
+
+inline void rtw_unlock_suspend()
+{
+	#if  defined(CONFIG_WAKELOCK) || defined(CONFIG_ANDROID_POWER)
+	//DBG_871X("##########%s###########\n", __FUNCTION__);
+	if(rtw_suspend_lock.link.next == LIST_POISON1 || rtw_suspend_lock.link.prev == LIST_POISON2) {
+		DBG_871X("##########%s########### list poison!!\n", __FUNCTION__);
+		return;	
+	}
+	#endif
+	
+	#ifdef CONFIG_WAKELOCK
+	wake_unlock(&rtw_suspend_lock);
+	#elif defined(CONFIG_ANDROID_POWER)
+	android_unlock_suspend(&rtw_suspend_lock);
+	#endif
+}
+
+
+inline void ATOMIC_SET(ATOMIC_T *v, int i)
+{
+	#ifdef PLATFORM_LINUX
+	atomic_set(v,i);
+	#elif defined(PLATFORM_WINDOWS)
+	*v=i;// other choice????
+	#endif
+}
+
+inline int ATOMIC_READ(ATOMIC_T *v)
+{
+	#ifdef PLATFORM_LINUX
+	return atomic_read(v);
+	#elif defined(PLATFORM_WINDOWS)
+	return *v; // other choice????
+	#endif
+}
+
+inline void ATOMIC_ADD(ATOMIC_T *v, int i)
+{
+	#ifdef PLATFORM_LINUX
+	atomic_add(i,v);
+	#elif defined(PLATFORM_WINDOWS)
+	InterlockedAdd(v,i);
+	#endif
+}
+inline void ATOMIC_SUB(ATOMIC_T *v, int i)
+{
+	#ifdef PLATFORM_LINUX
+	atomic_sub(i,v);
+	#elif defined(PLATFORM_WINDOWS)
+	InterlockedAdd(v,-i);
+	#endif
+}
+
+inline void ATOMIC_INC(ATOMIC_T *v)
+{
+	#ifdef PLATFORM_LINUX
+	atomic_inc(v);
+	#elif defined(PLATFORM_WINDOWS)
+	InterlockedIncrement(v);
+	#endif
+}
+
+inline void ATOMIC_DEC(ATOMIC_T *v)
+{
+	#ifdef PLATFORM_LINUX
+	atomic_dec(v);
+	#elif defined(PLATFORM_WINDOWS)
+	InterlockedDecrement(v);
+	#endif
+}
+
+inline int ATOMIC_ADD_RETURN(ATOMIC_T *v, int i)
+{
+	#ifdef PLATFORM_LINUX
+	return atomic_add_return(i,v);
+	#elif defined(PLATFORM_WINDOWS)
+	return InterlockedAdd(v,i);
+	#endif
+}
+
+inline int ATOMIC_SUB_RETURN(ATOMIC_T *v, int i)
+{
+	#ifdef PLATFORM_LINUX
+	return atomic_sub_return(i,v);
+	#elif defined(PLATFORM_WINDOWS)
+	return InterlockedAdd(v,-i);
+	#endif
+}
+
+inline int ATOMIC_INC_RETURN(ATOMIC_T *v)
+{
+	#ifdef PLATFORM_LINUX
+	return atomic_inc_return(v);
+	#elif defined(PLATFORM_WINDOWS)
+	return InterlockedIncrement(v);
+	#endif
+}
+
+inline int ATOMIC_DEC_RETURN(ATOMIC_T *v)
+{
+	#ifdef PLATFORM_LINUX
+	return atomic_dec_return(v);
+	#elif defined(PLATFORM_WINDOWS)
+	return InterlockedDecrement(v);
+	#endif
+}
+
+
+#ifdef PLATFORM_LINUX
+/*
+* Open a file with the specific @param path, @param flag, @param mode
+* @param fpp the pointer of struct file pointer to get struct file pointer while file opening is success
+* @param path the path of the file to open
+* @param flag file operation flags, please refer to linux document
+* @param mode please refer to linux document
+* @return Linux specific error code
+*/
+static int openFile(struct file **fpp, char *path, int flag, int mode) 
+{ 
+	struct file *fp; 
+ 
+	fp=filp_open(path, flag, mode); 
+	if(IS_ERR(fp)) {
+		*fpp=NULL;
+		return PTR_ERR(fp);
+	}
+	else {
+		*fpp=fp; 
+		return 0;
+	}	
+}
+
+/*
+* Close the file with the specific @param fp
+* @param fp the pointer of struct file to close
+* @return always 0
+*/
+static int closeFile(struct file *fp) 
+{ 
+	filp_close(fp,NULL);
+	return 0; 
+}
+
+static int readFile(struct file *fp,char *buf,int len) 
+{ 
+	int rlen=0, sum=0;
+	
+	if (!fp->f_op || !fp->f_op->read) 
+		return -EPERM;
+
+	while(sum<len) {
+		rlen=fp->f_op->read(fp,buf+sum,len-sum, &fp->f_pos);
+		if(rlen>0)
+			sum+=rlen;
+		else if(0 != rlen)
+			return rlen;
+		else
+			break;
+	}
+	
+	return  sum;
+
+}
+
+static int writeFile(struct file *fp,char *buf,int len) 
+{ 
+	int wlen=0, sum=0;
+	
+	if (!fp->f_op || !fp->f_op->write) 
+		return -EPERM; 
+
+	while(sum<len) {
+		wlen=fp->f_op->write(fp,buf+sum,len-sum, &fp->f_pos);
+		if(wlen>0)
+			sum+=wlen;
+		else if(0 != wlen)
+			return wlen;
+		else
+			break;
+	}
+
+	return sum;
+
+}
+
+/*
+* Test if the specifi @param path is a file and readable
+* @param path the path of the file to test
+* @return Linux specific error code
+*/
+static int isFileReadable(char *path)
+{ 
+	struct file *fp;
+	int ret = 0;
+	mm_segment_t oldfs;
+	char buf;
+ 
+	fp=filp_open(path, O_RDONLY, 0); 
+	if(IS_ERR(fp)) {
+		ret = PTR_ERR(fp);
+	}
+	else {
+		oldfs = get_fs(); set_fs(get_ds());
+		
+		if(1!=readFile(fp, &buf, 1))
+			ret = PTR_ERR(fp);
+		
+		set_fs(oldfs);
+		filp_close(fp,NULL);
+	}	
+	return ret;
+}
+
+/*
+* Open the file with @param path and retrive the file content into memory starting from @param buf for @param sz at most
+* @param path the path of the file to open and read
+* @param buf the starting address of the buffer to store file content
+* @param sz how many bytes to read at most
+* @return the byte we've read, or Linux specific error code
+*/
+static int retriveFromFile(char *path, u8* buf, u32 sz)
+{
+	int ret =-1;
+	mm_segment_t oldfs;
+	struct file *fp;
+
+	if(path && buf) {
+		if( 0 == (ret=openFile(&fp,path, O_RDONLY, 0)) ){
+			DBG_8192C("%s openFile path:%s fp=%p\n",__FUNCTION__, path ,fp);
+
+			oldfs = get_fs(); set_fs(get_ds());
+			ret=readFile(fp, buf, sz);
+			set_fs(oldfs);
+			closeFile(fp);
+			
+			DBG_8192C("%s readFile, ret:%d\n",__FUNCTION__, ret);
+			
+		} else {
+			DBG_8192C("%s openFile path:%s Fail, ret:%d\n",__FUNCTION__, path, ret);
+		}
+	} else {
+		DBG_8192C("%s NULL pointer\n",__FUNCTION__);
+		ret =  -EINVAL;
+	}
+	return ret;
+}
+
+/*
+* Open the file with @param path and wirte @param sz byte of data starting from @param buf into the file
+* @param path the path of the file to open and write
+* @param buf the starting address of the data to write into file
+* @param sz how many bytes to write at most
+* @return the byte we've written, or Linux specific error code
+*/
+static int storeToFile(char *path, u8* buf, u32 sz)
+{
+	int ret =0;
+	mm_segment_t oldfs;
+	struct file *fp;
+	
+	if(path && buf) {
+		if( 0 == (ret=openFile(&fp, path, O_CREAT|O_WRONLY, 0666)) ) {
+			DBG_8192C("%s openFile path:%s fp=%p\n",__FUNCTION__, path ,fp);
+
+			oldfs = get_fs(); set_fs(get_ds());
+			ret=writeFile(fp, buf, sz);
+			set_fs(oldfs);
+			closeFile(fp);
+
+			DBG_8192C("%s writeFile, ret:%d\n",__FUNCTION__, ret);
+			
+		} else {
+			DBG_8192C("%s openFile path:%s Fail, ret:%d\n",__FUNCTION__, path, ret);
+		}	
+	} else {
+		DBG_8192C("%s NULL pointer\n",__FUNCTION__);
+		ret =  -EINVAL;
+	}
+	return ret;
+}
+#endif //PLATFORM_LINUX
+
+/*
+* Test if the specifi @param path is a file and readable
+* @param path the path of the file to test
+* @return _TRUE or _FALSE
+*/
+int rtw_is_file_readable(char *path)
+{
+#ifdef PLATFORM_LINUX
+	if(isFileReadable(path) == 0)
+		return _TRUE;
+	else
+		return _FALSE;
+#else
+	//Todo...
+	return _FALSE;
+#endif
+}
+
+/*
+* Open the file with @param path and retrive the file content into memory starting from @param buf for @param sz at most
+* @param path the path of the file to open and read
+* @param buf the starting address of the buffer to store file content
+* @param sz how many bytes to read at most
+* @return the byte we've read
+*/
+int rtw_retrive_from_file(char *path, u8* buf, u32 sz)
+{
+#ifdef PLATFORM_LINUX
+	int ret =retriveFromFile(path, buf, sz);
+	return ret>=0?ret:0;
+#else
+	//Todo...
+	return 0;
+#endif
+}
+
+/*
+* Open the file with @param path and wirte @param sz byte of data starting from @param buf into the file
+* @param path the path of the file to open and write
+* @param buf the starting address of the data to write into file
+* @param sz how many bytes to write at most
+* @return the byte we've written
+*/
+int rtw_store_to_file(char *path, u8* buf, u32 sz)
+{
+#ifdef PLATFORM_LINUX
+	int ret =storeToFile(path, buf, sz);
+	return ret>=0?ret:0;
+#else
+	//Todo...
+	return 0;
+#endif
+}
+
+#if 1 //#ifdef MEM_ALLOC_REFINE_ADAPTOR
+#ifdef PLATFORM_LINUX
+struct net_device *rtw_alloc_etherdev_with_old_priv(int sizeof_priv, void *old_priv)
+{
+	struct net_device *pnetdev;
+	struct rtw_netdev_priv_indicator *pnpi;
+	
+	pnetdev = alloc_etherdev(sizeof(struct rtw_netdev_priv_indicator));
+	if (!pnetdev)
+		goto RETURN;
+	
+	pnpi = netdev_priv(pnetdev);
+	pnpi->priv=old_priv;
+	pnpi->sizeof_priv=sizeof_priv;
+
+RETURN:
+	return pnetdev;
+}
+
+struct net_device *rtw_alloc_etherdev(int sizeof_priv)
+{
+	struct net_device *pnetdev;
+	struct rtw_netdev_priv_indicator *pnpi;
+	
+	pnetdev = alloc_etherdev(sizeof(struct rtw_netdev_priv_indicator));
+	if (!pnetdev)
+		goto RETURN;
+	
+	pnpi = netdev_priv(pnetdev);
+	
+	pnpi->priv = rtw_zvmalloc(sizeof_priv);
+	if (!pnpi->priv) {
+		free_netdev(pnetdev);
+		pnetdev = NULL;
+		goto RETURN;
+	}
+	
+	pnpi->sizeof_priv=sizeof_priv;
+RETURN:
+	return pnetdev;
+}
+
+void rtw_free_netdev(struct net_device * netdev)
+{
+	struct rtw_netdev_priv_indicator *pnpi;
+	
+	if(!netdev)
+		goto RETURN;
+	
+	pnpi = netdev_priv(netdev);
+
+	if(!pnpi->priv)
+		goto RETURN;
+
+	rtw_vmfree(pnpi->priv, pnpi->sizeof_priv);
+	free_netdev(netdev);
+
+RETURN:
+	return;
+}
+
+/*
+* Jeff: this function should be called under ioctl (rtnl_lock is accquired) while 
+* LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)
+*/
+int rtw_change_ifname(_adapter *padapter, const char *ifname)
+{
+	struct net_device *pnetdev;
+	struct net_device *cur_pnetdev = padapter->pnetdev;
+	struct rereg_nd_name_data *rereg_priv;
+	int ret;
+
+	if(!padapter)
+		goto error;
+
+	rereg_priv = &padapter->rereg_nd_name_priv;
+	
+	//free the old_pnetdev
+	if(rereg_priv->old_pnetdev) {
+		free_netdev(rereg_priv->old_pnetdev);
+		rereg_priv->old_pnetdev = NULL;
+	}
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26))
+	if(!rtnl_is_locked())
+		unregister_netdev(cur_pnetdev);
+	else
+#endif
+		unregister_netdevice(cur_pnetdev);
+
+	#ifdef CONFIG_PROC_DEBUG
+	rtw_proc_remove_one(cur_pnetdev);
+	#endif //CONFIG_PROC_DEBUG
+
+	rereg_priv->old_pnetdev=cur_pnetdev;
+
+	pnetdev = rtw_init_netdev(padapter);
+	if (!pnetdev)  {
+		ret = -1;
+		goto error;
+	}
+
+#ifdef CONFIG_USB_HCI
+
+	SET_NETDEV_DEV(pnetdev, &padapter->dvobjpriv.pusbintf->dev);
+
+	usb_set_intfdata(padapter->dvobjpriv.pusbintf, pnetdev);
+
+#elif defined(CONFIG_PCI_HCI)
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
+	SET_NETDEV_DEV(pnetdev, &padapter->dvobjpriv.ppcidev->dev);
+#endif
+
+	pci_set_drvdata(padapter->dvobjpriv.ppcidev, pnetdev);
+
+#endif
+
+	rtw_init_netdev_name(pnetdev, ifname);
+
+	_rtw_memcpy(pnetdev->dev_addr, padapter->eeprompriv.mac_addr, ETH_ALEN);
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26))
+	if(!rtnl_is_locked())
+		ret = register_netdev(pnetdev);
+	else
+#endif
+		ret = register_netdevice(pnetdev);
+
+	if ( ret != 0) {
+		RT_TRACE(_module_hci_intfs_c_,_drv_err_,("register_netdev() failed\n"));
+		goto error;
+	}
+
+	#ifdef CONFIG_PROC_DEBUG
+	rtw_proc_init_one(pnetdev);
+	#endif //CONFIG_PROC_DEBUG
+
+	return 0;
+
+error:
+	
+	return -1;
+	
+}
+#endif
+#endif //MEM_ALLOC_REFINE_ADAPTOR
+
+u64 rtw_modular64(u64 x, u64 y)
+{
+#ifdef PLATFORM_LINUX
+	return do_div(x, y);
+#elif defined(PLATFORM_WINDOWS)
+	return (x % y);
+#endif
+}
+
+u64 rtw_division64(u64 x, u64 y)
+{
+#ifdef PLATFORM_LINUX
+	do_div(x, y);
+	return x;
+#elif defined(PLATFORM_WINDOWS)
+	return (x / y);
+#endif
+}
+
diff -uNra linux-3.0.82/drivers/net/wireless/rtl8188/wlan0dhcp linux-3.0.82x/drivers/net/wireless/rtl8188/wlan0dhcp
--- linux-3.0.82/drivers/net/wireless/rtl8188/wlan0dhcp	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/rtl8188/wlan0dhcp	2017-09-23 03:42:50.082674869 +0800
@@ -0,0 +1,16 @@
+#!/bin/bash
+
+var0=`ps aux|awk '/dhclient wlan0/'|awk '$11!="awk"{print $2}'`
+
+kill $var0
+cp ifcfg-wlan0 /etc/sysconfig/network-scripts/
+
+dhclient wlan0
+
+var1=`ifconfig wlan0 |awk '/inet/{print $2}'|awk -F: '{print $2}'`
+
+
+rm -f /etc/sysconfig/network-scripts/ifcfg-wlan0
+
+echo "get ip: $var1"
+
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/firmware/mrvl/usb8782_uapsta.bin linux-3.0.82x/drivers/net/wireless/wm8782/firmware/mrvl/usb8782_uapsta.bin
--- linux-3.0.82/drivers/net/wireless/wm8782/firmware/mrvl/usb8782_uapsta.bin	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/firmware/mrvl/usb8782_uapsta.bin	2017-09-23 03:42:50.086674856 +0800
@@ -0,0 +1,1485 @@
+GºðŸåðŸåðŸåðŸåðŸåðŸåðŸåðŸå>ÍÄœœœ œ¤œ¨œ¬œ°œ½œê¦ê(�â�è Šà°‹àpJâZá¦
+ºèàOâãðGÿ/áÀ´pµÀ�âÿ/áŠx0œ¤Ñx0Ñx0<Ðx0p1<ùÑ-Ðx0›+Ñx0äk&x4p1;ùÕ‘BÖÓpG Râx°(x¡(ûÿÿŠ‚.°á0°(0¡(@�E@�Eÿ/á0 ã@ ãP ã` ã Râx¡(üÿÿŠ‚.°á0¡(0�Eÿ/á0Ÿå0�àÿ/á1šøµðÁú'ÿC(Ñð[ý(-Ð2‰�Ayy		C2ˆ-0ð�ú(Ña}"}5C--à`{!{Cðnú(Ð"¡05�ðÃþ(Ð0ðÖú ø½8ø½ pG;Hµh@h+ÑLaà+ÑLa)ð6î ½pµ3M+Ñ ‰Áx‚xCÑ¸i©EüÀ’e# ð±úà ÿ÷Ÿÿ(Ð2!(h#
à+Ñ ðHú2!#à+Ñ¨h2!)ðî p½pµð¶øL h(Ñð;ú `J ! `)ðúíJ`h !)ðöí(ð¦øp½! µ)ððíL``ÿ÷Þÿÿ÷žÿ h(Ð"
!)ðàí ½pµðˆø  s )ðÜí(ð„øp½ôµÅãwlanµ)ðNí)ðÌí ½÷H!IAaöIaöIAa!apGôHµh+ÕïJòK Á	Qai�\P$TaiÉ€(L`ðÛÿ!êK-1à@ˆBüÛx(ùÐãHà0PaåHa @PaäHaÞHPa a ½þçÝIµH`)ðŒí½µðÿÜH€!)ðˆíÛHÜ!)ð„íÙH!Ü0)ð~íÖHP!ð0)ðzí ½ (ÓþçÐJ€X+ÐþçP pGÌJ!€PpG€ µ)ðfí½µ)ðbí½hƒhÁhGpµ(ÒÁM„Ü5+Y+Ð p½,#CC¼N›+Q5ð5(Q`Â`�`ž<zø4zÛž!A`·IaXa p½þµ(Ò±Ið1°KUihÜ3„)
Ñ"—–’YCii)ð*í(Ñ h`þ½Y)ð$í(Y:1)ð$í(Y)ð$íþ½µ)ð$í `½pµ�MljàÐ)ðíð®ø¨hb™N Õ¨j!ˆC¨b  ð`Iib±hC±`ð”ø`Õ¨j!ˆC¨bðø 
+Õ¨j!ˆC¨b€ ð`ÉCib±hC±` p½†Hpµh€N¡Õ!a²m �G „C Ðà „C C%
+ààÐ¨2X*Ð!(�Gdm,òÑ p½pµÿ$rMdì`rHh(Ð!)ðÆì¨h C¨` p½pµ$jM„@ì`ðÿ¨h C¨` p½eH!ÉµÁ`dJjcL#@<#`b‚h
+C‚` ½\H!	µÁ`\JSj[L#@<c`Sb‚h
+C‚` ½ðµ$LORN7àÅhhÿ÷òþih ˆ@°`dà9X)òÑMI ÿ÷åþÿ÷‰þ À°` ð½øµHMìhàÐ¨è`@ Õ€ ÀCè`€ „Cð-þ ÕxÒ	6ô-‚î&ö0ð&þðCè`´C`@Ð !@ÉCé`„C Õ&ö0ð³ýðCè`´Cà@	Ð'¿&>@0ðDýðCè`¼CàÕ ÀCè` „Cðæþ(Ðð}ý(Ð ðŽü`Õ"Hè`ÀC„C Õ Hè`ÀC„C,Ú ÀðGýHè`H�h"’C�`ø½K"’µÚ`ÿ÷�ÿ ½€)€ÿ 1€€×À¶ÿ€ÿÌtÖÁ4€0€ôµ€è€í€"€ÿÿÿ¿ÿÿÿßÿÿÿµ*Ð )ðØëà$ ½|µIy#y		C�ˆBi$3`)Ù`9 2�€Q}ÉÊ’*©)ð¾ë q
+àq˜ q
+`q |½ |½(µÐi)ÑA‰Àˆ"ðµý½)ðpë½þµ �� ‰%¸x.€(Ð& ˆ(gÐðhú(dÐ8)ðŽë(WÑ.Ð" iFðfü(Ð˜(Ð (HÐ!O ðûø�à ©ðPû(Ð vŽùðÙj»S(9Ðð!ú(EÐÿO=að^ø
ð-ÿ(Ñð<ú(ÑúI`úI€ ½p
ðÿÿ™ÿ ð3úöM(ˆ(ÐõI V@	Ð% ðýmÐ8z(÷Ñàðáù (€8r 
ðàÿ ø`àkFy(Ñ €   sþ½.üÐ" iFðüà.ôÐ
ðýþ(ðÐ ˆ(íÐð•ù(éÑð{ù(åÑ ‰ÁxÊÑ€à0ÕJ}+ÐŠ	*ÑxÀÐˆÕðNøþ½ 
ð¢ÿþ½ð[ù(úÐðøþ½÷µ"˜AxxC 6020ÃH	)ðæê)Ð00 €  ga% �!()ðÜê¸y(pøyhp (q hq˜¨q
+èq0
+®pèp2  �™ 2)ðÊê ÿ÷ÿ ˆ(Ñ ÿ÷ÿþ þ½   �
ð¡þ(Ð 
ðSÿÿ÷ý¦K¤H!h"h# G(ÿ÷ý þ½ÿµ �@ƒ°Ÿ$ÿ7a78 B/Ñÿ"‘2F#©¨ðåÿ(&Ð8! C8wœ4 )ð‚ê˜(Ñ à
 `r%rè�òì	s¹ bz™
+0)ðxê1"1 )ðrê`z™
+0ˆr
+Èr™˜ðˆÿ°ð½|æ‚ˆ`*Ù`:‚€Hy
+yC$0q
+Hqæ ˆq Èq pG pGµª’ª«ðaü˜˜	 ðõý ™À0Á�™‚™A‚ ð]þ½ñµ$&%†°ð¬ù¨)ð*ê(»ÐkFX}ÁÔ€µÕkF}(¯Ñ�8©)ðê/¨Ð™ V/ÑkF™}
-QO9hˆBÚyhˆBÝ¸h&(”Ð$)ðêø`à)ðêùh)ðêHIˆBØ¸h(„Ð$¸h B!Ð.Ñ¼`)ðøé(Ð@IÉi`1É{)	ÐkFÙzA@ÙrYzA@Yr|A@tkF}™’+"¨ð¤ý]çóµ‘°
+ � ���˜(~Ð(‰niA "¨)ð´é¨�˜0)ðÆé«™xÄ
+ ’*Ñ			Õ Ÿ C 7(Ðÿ÷üû�8~JA˜I0)ð¬é,�	Ð˜
+(Ò˜I@ÁhIÁ`˜ÿ÷èûÜ@ºèê›³˜ÿ÷Lÿ !(‰l 8)� qàäé¬¹X¹H¹T¸�é`øµü¶8@KLL8
+kF`q�	 r
+`r°y pðy`p¨ˆ(Ñ({ (?Ñ«Øx€Õ �«˜x‰)3Ñ	à«à ÕÿHx(Ððµù(Ð8~ÀÕúHh(ÐùHh(
Ðð~þ(	ÐðÕü(ÐôHh(Ñ �
ðüü(	Ð˜)ðé(Ñ ðwû
+ðý™0ÿ÷¸þ1À1 ‘^ðû s™ ^ðû«`s˜x	Õ8~@@àÿ  r¨ˆ(Ð˜)ðÜè(8Ð'§pçp¨ˆ(Ñ({ (+Ñ zðÜý(	Ð˜(Ð!0ð1ýàÎHp«˜x™	0ðÁþ˜(ÑÉHˆ(ÐÈH"hF!)ðnè(ÐÅI pà 
ðMý(ÿ÷ëüà8~À	Ðš!(ÿ÷@þ(~Ðà›š!(ÿ÷5þ(
Ñ pàpÿ÷øú(ÿ÷Ïü ÿ÷öú °ð½¨ˆ p
+"2àp˜Ñ)ðÑä
ócÙÃ¢èpy(~Ñ0ðÄù!I�@{ «�˜|ÀÐ �øuÐ¸sÔà¨€ðÿ(�kÐpy(hÑ˜@zÀdÕ™ðyÉyˆB~Ñ˜
+(\ÓxÔøXÐàø~Ðx|Ô�H"ˆ�H#ðxý(�FÐ˜©ˆ�€ð(ü™�™"
+s™G!8)ð*è 8q xqày¡yC¸q
+àTàøq˜€j(Ñ˜(ÐpzÕ z8s`y!yC8ªˆ0)ð
+è™ðhHaðyxp°y8p¨ˆ¸p
+ààøp˜!ðÓû˜((Ð
ðÚû(Ð 
ðŒüÿ÷PúdKbH)h"h#¨G8ÿ÷Iú zðáü(Ð˜(Ñ!àà0ð4ü
à8ÙÕ˜
+(ÖÓ  pàpç˜(ÑIIp«˜x™	0ð¸ý˜(ÑDHˆ(ÐCH"hF!(ðdï(Ð@H!pà 
ðDü çÿµ�°7h!‘™|i)Ð@0�(ð®ï ™AÀx 1@Ô¸ˆ!°ð½(ˆh(Ø øçª‘’âí²#à‹g~™˜ª«(ð¢ï((ð¤ï(nÐ+H!ª«Ã«)J’}8+©(ð–ïIÑ ÿ0a0	#Õ,Ð!Éa‰j)Ð«’`2‹X[‹PIIw˜(ðdï«™*RR2’}* ÿ÷˜ü 0`±ç†¸˜¸”¸à¸…¸¤ëôµ�¸b¹Løµü¶¸èÄÀ5`(‰™@(ðHïˆ¨€ ÿ0a0«&2š@‘Cwà«}‘•*ˆ™˜d:	«(ð2ïÐ «ÿ0a0#“@™Cw(ˆ8(€¸ˆ8¸€,Ð À €j(ÐÁmIÁe0Pç,Ð À �j)Ð«’`2‹X[‹P�j
+iR
+a€jÁhIÁ`˜(ðÞî«šš2’«} ÿ÷üÓç(Ð!ÉAˆj(ÐiRaˆjÁlIÁdpG÷µ�°˜h �|i@0�(ð°î�$0
+� ð'ú(Ð
+˜)	ª«(ðÂî(Ð,à¦ÏÜy�ÀÎÐ À €j(øÐmIe‚à˜ˆh(~Ù*L2h8’‘’:�988’ 6‘�0~Fv
+™˜3(ð˜î˜(ð€î(9Ðª©’ ‘�
+š™;0(ðŠî(NÐÿJ’ÿJÿK™8(ð„î(Ñ™`Aà™`‰™(ðbî�˜(?Ðª’
+™˜+:(ðnî5Ñà˜€yÁÉ ðªþ"à."Ð0€Ð,Ð À!ˆj(ÐÂlRÂdˆjiIa
à°Õ,ÞÐ À €j(ØÐhI`Ôç hå˜™ˆ8€¸ˆ8¸€kF™Œš((ð4î.
+Ñ,Ð À €j(ÐÁmIÁe Kå÷µ‚°h��˜%@0(ðæí˜ñx@iIÔ 0€}@.Ô%,à,Ñ °ð½¡zÉÐày(Ñ™"hFÿ÷ÿà™"#hFÿ÷þ˜8`°yÀÑ-
Ð y€
+Õ ðÛüà!É@€j�hI�`(Óçðµ&—°–*á!‘™	ÉÌÍ
+¬Ø�x~sÉ‘‰©ðüù˜(Ð˜0ð-ü™ð3ÿ(Ñ,Ñ˜!�€ÿ÷«ù	á™La`y(Ñ ðjý0�`zšÀ™À(ð¬íà yš(Ñ#˜3(ð¦í ðsøà#˜3 (ð¢í˜‰	ÊxÒÑ�à7"Ò¥ªj*Ðk[c:xÒÐªj*ÐSk[Sc‚ˆ*OÐš*&Ñ:xÒÑ#
+"ÿ3{3’™š(ðxí˜€ˆ(Ñ ©ÿ÷Åú˜ÿ÷Nù¨j(ŸÐjIb¦à·"’¢(ðdí˜€ˆ(ÔÐ`y('Ñ ©	ðÔÿ™˜Éx}ÉÉˆBÐ 	ðÀü ð¹ÿ ð¢ø(Ñ™ 	ð
+ù˜@0{(Ð™ ˆ€[à˜€ˆ(WÐ˜(ð6í(Ð˜CJ�ˆDK@9�€’‰@J	(ðí(_Ð�‰�?à˜€yÀÐ(jàhj(Ð6.BÐðy(Ð(Ñÿ4a4b‹™ *Ð (ð
+í˜;2©ð‹þà(Ð('Ñ ð¯ü(úÑ2©¨ÿ÷³þ(Ñ)¹nÔ”€ ˜($Ð!�€˜(Ððy(Ð(Ð˜ÿ÷Çø˜©ÿ÷°úðø(Ð ð5øàþç¨j�hI�`˜¿!Àx@™Èp„ç! ªð™ú(�ÐËæI€ ÀCaðåþ(Ð ðøI È`a°ð½ÜÄÀäÄÀ¸¥€äéIH`IH`pGJ ‘BÐ pG;`;ˆŽ!µs
H"h#(ðÌë½@iÀhpGµ@ið„ü½° pG µ(ðÄë½µ@iðÿ½øµusbóµ$%(�°Ðpy(Ðà ð¤ý(m(Ò"ÿH(ðäëñÐ
+à,Ñ"üH#ðùÑþ½faÿ÷Çÿ �'!('s(ðÌëð.û(s (q hq8
+¯qèq°y(pðyhp˜5` þ½µ‰1‘p	
+Ñp!ÿ÷�ÿ½
+ãIµð!ø½ pG|µš’
+“ÝH#(ðì|½ÿµƒ°‰Bi©ÿ÷‘ÿÑ °ð½ÑJ˜¹+Å,Ð`h¾9“–(ðøë˜�|)
Ð"’ËJq0’‘#ÿ÷Ðÿ™`1Ès
+t™˜#"(ðäë(ÿ÷®ÿ Øç¿Hµ(ðÜë½µŽ°hF(ðÚë iFðéø°½·Ipµò1P8("(ðÎë ÿ÷áÿ+" ÿ÷áÿp½µ@iÿ÷èÿ«I 1Èg€0h(Ð�zý"@�r ½µDi ÿ÷Âÿ¡KÊ3" ÿ÷Áÿ�H!0Ag‚o*Ñ�g(ðžë ½ðµ)‰@iI…°‘©ÿ÷
+ÿÑ °ð½"’�J™˜“(ðpë1˜"@1#(ðlë�po(
+Ð`{!C/`sÐƒHàƒH aà/Ð(ð•úà(ÿ÷�ÿ™ ÿ÷ÿ Ðç|µ
‰Bi©ÿ÷ÏþÑ |½"’pJ˜1“(ð6ë)˜"@1#(ð2ëa{"CaskI¡a ÿ÷÷þ |½÷µˆ°%cL˜4!(ð2ëÐ_Ox(ð0ë"@1 2(’‘(Ðx(ð(ë(Ð @8Ax€
ðÿàRH9-ÆÌ§qã(ð ëÑ °ð½x(ðë! Ô1P0«Ã#™š’‘	š
+™((ðë%š™˜#ÿ÷Îþ(Ð%à-Ñ1	1 (ðë  g(Óçpµ9M5)(ðúêÑ p½ y"(Ð")0ÿ÷1ÿ(Ð p½!	1((ðàêêçpµ*M5)(ðàê
+Ð)0ÿ÷Xÿ(Ñ!	1((ðÌê p½øµ‰@�y$	Õ@yÀ	Ð(ÿ÷¼ÿø½ ðÅûd$$:1(ÿ÷[ÿ(ñÑ,ðÓø½(ÿ÷Æÿø½óµ�°L4àù0h(.Ðü ]ðø˜2!ðªùN
àL_¶Ö×Kc‰ö/Ð/Ñ°xðJ@°p!8#(ð~ê˜haìJíI #(ðzêþ½èJ!8#(ðpêpx@ppþ½pµ
äLÿ"2QãH"(ð´éáH")€(ð®éßJàI #(ð\êp½øµØH8xÀÐÕH(ðRê9ÓO*@?¸(ð”é}pš1$=©ßÈS™¢^ ÿ÷Îÿø½ÐH@hpGËH!
8µ(ð~éÇH!8(ðxéÄH"8AxCAp½ÁHµ 8ÁxkFpyXp˜½¼H8xÀÀpG¹H8xIIpÖçµH"8xCppGpµ†°
+™š)Ñ ©�‘¬I«H“’#*
+98–(ðüé°p½pµ¤H@8Ax€Ž°
ðºý(Ð#2hF(ðêé(iFð¶þ™H(ðÜé˜I ˆg°p½pµ”L< xÀÐ`xÀ
Õàx"Á(ÿ÷Ðÿàx"Á(ÿ÷Éÿp½µkF‰Hx
8ÁpYxqyAqz�q½ƒKµ
;ÜxpyDpXyp˜yp½|Kµ ;ÜxpyDpXyp˜yp½µÿ÷VÿvHÿ"!
+8'ðˆívH"!`A` 8wà8(ð’é½µpL h(Ð(ðŽé  `½ôçgI€1(`Ðž9	xÉÐbIÉo)Ð�zý"@�rpGÿµƒ°Ÿ
ž"Jp "
+pjx©T)5(ðjé(xkFrhxXr‰ª��˜	Úzæ†ÄJa|.(ð`é(xkFqhx­Xq•˜ˆ±€E˜(ð~èkF˜ˆ°BÓ0‚™˜(ðxè¥BÒ(­/Ðx9p@xxp¥BÒ(­¥BÒˆE¥BÒ˜)(Ð˜"(ð\è Èä9I7H`9I8H`:I8H`pGµÿ÷ý ÿ÷ý ½þµo@Ñàn@Ñ (ðþèþ½þ÷™úà!þ÷ú*H(ðé(÷Ñ(þ÷‘ú0©ÿ÷#üéÐJ˜’9“”(ðôèN>p(ð®è0yÃpx€Á˜(ðèèánI)áfÑ o@ g!˜"@1#(ðrè(ÿ÷<üþ½Ùâð@œãðô×e¶€–˜-ãðôØ‘<>…@>‹>(pµ%‰Di^x.Ð.Ñcy+Ñð�ûàÿ÷Ÿý%
+à`y(Ð(Ñy(Ñ(ðœè(p½µ
ð`üÿ÷Ôþ ½÷çµ0 ðZýðOúàÕð€þ½ðåý½ îçpG µðø ðJø! <‡[dÀ¾‰Â“ðø½(Ò[I€\pGÿ pG
+ µÿ÷óÿ�BÑÿ÷Ýÿ½
+ µÿ÷éÿ�BÑÿ÷Õÿ½)µÑðñø½ÿ(ÐJJ!‹Ó\ƒBÑpGI)õÓÿ pGÿ(ÐBJ!‹›[xƒBÑˆ\pGI)ôÓÿ pG(Ò:I€@@xpGÿ pGÿ(Ð5J!‹Ó\ƒBÑˆ€@xpGI)ôÓÿ pGÿ(Ð-J!‹Ó\ƒBÑˆ€€xpGI)ôÓÿ pGpµðtù ðÊø(ÿ÷¸ÿ(Ñ ðcøp½µÀÕ" ÿ÷äÿ Õ"Ò ÿ÷Üÿ`Õ"’
+ ÿ÷Ôÿ½ ÀµðBù Àð”øHÁh€"CÁ`½ Àµð9ù ÀðŽøIÈh€"�CÈ`½è¹(€pµÿ÷`ÿ(ÿ÷†ÿ(ÿ÷”ÿ.Ñ ðù°ðoø,Ð,Ð	,Ñ! 'ð˜ïÿ")ÿ÷'ÿp½µÕ ÿ÷Õÿ"ŒBÐ #ÛœBÐ!C!‰ŒBÐì¨Úû¼!¶V3N"CÐÿ ‚¡Ð‰ÐÂ‰Ñ à à
+ ÿ÷%ÿ(Ñÿ÷­ÿ½øµÿ÷Dÿ-
+Ñ/Ñ ðÁø ðÊø¨ðø,Ð,Ð	,Ñ! 'ðDïÿ"1ÿ÷Üþø½I
+hC
+`ŠhCŠ` pGI
+h‚C
+`Šh‚CŠ` pG€"€»Hh�h"C�`�hÿ" 2C"R‘C�`AhCA`AhÒCA`pG¯HhAh"R‘CA`pG«HhAh"RCA`pG§Hh�k)Ú�k		ûÑpG€kpG	C Hh�apGžI	hŠiCŠapGšI	hÊhCÊ`pG–I	hJiCJapG	C‘HhÁcpG�I	hJh
+CJ`pG‹Hh€kÀÀpGˆHhAh"Ò‘CA`pG„Hh�kÉüÐAh"Ò‘CA`pGI	h
+kcHh"ÒCH`pGzHh@jpGxI	h€1Jj	CJbpGrHhÀjpGpI	hÊi‚CÊapGmI	hÊiCÊapGjI	h
+jC
+bpGgI	h
+j‚C&*J/¸#B¾�ó
+bpGdHh€0AhIIA`pG`Hh€0Ah"CA`pGpµ\M(h€0h"C`hYLIÕh¡C`
+ 'ð®ì(h€0h!C`p½PHh€1
+hRR
+`�kÉüÔpGJHh€0hÀÀpGGHh€0hFJ‘C`pGCHh€0Ah"‘CA`pG?Jh€2Sj			CSbj@ÉÉ@Cbh!	ˆC!	@`hIC`pG0Hh€0ÀhpGpµ-M)hi!	C&a!€1iaHiKaˆið ˆaÈiÊa h!C ` h "�C `(hAkCk‹BüÐÿ÷Øÿ(öÑ(h�hC�`Ah"RCA`p½Hh€0ipGHh�h "C�`pGHh�h "‘C�`pGI	h€1
+h#ÛÀšC	C
+`h"C`pGHh€0hÿ"RC`pGl¶@´I"(ÈhÐCà�CÈ`pG°I µ`ðºø½ðµ%-ªH¬LÀ0Â
“‡)§Nj
+ÐCbj™Cb h(C `0h8C	à‘CbjCb—º;–´%[FSƒ h¨C `0h¸C0`ð½8µ$hF'ð’ì(Ð-ÑkFXxÁÐ@Õ˜xà$à-	ÑkFXx�ÕÀ	Ð˜x	(ñÐ 8½sµkF\y`Õ†Hh)Ñ!`(ÿ÷Íÿ	(ÿ÷¤ÿ`ÔkFy	Ð ÿ÷Šÿ|½3µkF(yÑà(Ñ	vJsIÔC€1(
ÐtKuM(
Ð	(Ð(ÑÈÈ`aÈab<½Ê`
+aÌaàË`
+aÍab<½Ë`jHaÍajHîçðµ(zExyGy&Ð)Ñ™)	Ñ*Ñe@ÙÐf@™Õg@,x*	
+C!
+CTI"CÀ1Jb‚yÃxC2CŠbÂy€x;CCÊbð½8µ$hF'ðÖì(Ñ(ðø8½kFxÐ(Ñ™(ðAø 8½ðµ&‡°kF}740u-–
+Ñ!Yu™}!™u!rYr™"˜r
+à!kFYu™}!™u!rYr"˜rkFÚr�t™(ÿ÷@ÿkF™}(‘ÿ÷Xÿ˜#’:1¨ÿ÷|ÿ °ð½0{¬°'¯®í>óµ…°%.,©'ðœë(òÐ™8ÿ÷ÿkF™~8‘ÿ÷6ÿkFX~ÁÔ€Õ%'ð’ë(ÐIÉi`1É{)	ÐkFÙzA@ÙrYzA@Yr|A@tkF~#’2)¨ÿ÷>ÿ Àç§€p¶(€ÝUÝß_ßï/¯/ñýõýþòúòL!	 `!A`pGÿHk€"CcpGýIµÉh'ðè‰€
+CÐ'ðnê½øHj"Cb ìçôHj			b åçòIpµh"�C`ðJPh@@P`i!CaìI“iÛÔ@úÒ�i€ÔIúÒý÷kýæI
+h$d¢C
+`ãJ€2hãM+@`híC+C`
+h"C
+`ý÷[ý ÿ÷±ÿÿ÷»ÿÿ÷.þp½pµ€ 'ð´êÑI
+x*ÑŠiRŠaÔþç'ð¨êp½Ji*ÐþçHa pÎM ˆa¬ˆ€@¨ˆk& Cö°BëÐ ðóû(æÐ4C¬€p½½Iµˆi@ˆaÑHi"Jaÿ"
+p'ð~ê½(üÚ€ 'ðxêþçpµ²Npi(Ðý÷ýþçý÷ýµMpa¬ˆ	žÿú¬)h·ïc €@¨ˆ C‚(Ð(ˆð€ ðÁû(Ð¨ˆ0�‚ C¬€p½¢Iµ¨J‰Hi“€Ëˆ€"Jaÿ"
+pý÷äü½µšL`i(Ðý÷×üþçý÷Ôü�I`aˆˆ"’@Šˆ‚C*Ð
+ˆâ€"
+€Šˆ"�"Cˆ€½ŒIµ’J‰Hi“€Ëˆ€"Jaÿ"
+pý÷·ü½pµ'ð6ë‰L 4%�'ð0ë¦€'ð.ëp½pµ'ð(ë‚L 4%�'ð"ë¦€'ð ëp½pµ'ðë{L 4%�'ðë yp½pµ
ÿ÷ðÿ(C ÿ÷Ýÿp½pµ
ÿ÷åÿ¨C ÿ÷Òÿp½pGµÿ÷Áþÿ÷Æþÿ÷äþ½aHAx)	ÑgI	h"ÉBp	2Q\�p€xpGbKYh8"‘C@CX`pG^KYh"’‘C@CX`pGµÿ÷óÿ ÿ÷èÿ½ÿ#pµÁ3 %ÿ÷Ñÿ,(Ðÿ÷Ìÿ(Ñ#)ÿ÷æÿMH�hO"Ò‘C�`�h"R‘C"’C�`Bh!ÉŠCB`ÂhC#ÛšCÂ`BhŠCB`@I
+h@#C
+`
+h"C
+`
+h#C
+`h "C`9I vù({¨+œ_QÞ`5Hh@@(Ñ/H€8hÀ	Õ3L À`` ÿ÷Nþ @``p½"HÁx)Ñ!ÁpypGIµHi"Jaÿ"
+pý÷àû½pµL`i(Ðý÷Óûþçý÷ÐûM`a¬ˆ €@¨ˆµ& C6°BÐ ð�ú(Ð4C¬€p½µÿ÷Þÿ& ÿ÷ ÿÀ	aÀIC& ÿ÷
+ÿÿ÷Çÿ½@�0¤À€¡€£€@¦€ˆ!€ÿïÿï� €)€#€$€(€µÿ÷�ÿûI
(ˆhÐCˆ` à˜Cˆ`ÿ÷¿ÿÎçµðNú(ÈÑòHÁh			!CÁ`�h			!C�`‚h
+C‚`i	"Cai
+Ca‚i
+C‚aæI XåIÈ`¨çµáL hãI	C `àh"	Cà` i	C a iÉC a	 ÿ÷Àÿ hØI@ ` h!IC `ÕHh@@(ÑÍH€8hÉÕ ha
àhÀÔ`h!IC``à(Ñ h!	C ` hÇI@ ``h€	€``P ÿ÷{ÿ[ç»H€8ú«¢þ¤-…§�®ˆpG¸H€8h¾Iˆr¼H 8…¼IIicpG¹H 8Ai)Ð!AapçpG´I 9Jiˆi�BÐHagçpG¯I 9HhˆaJi‚BÐHa]çpGªI 9ˆhˆaJi‚BÐHaSçpG¥I 9ÈhˆaJi‚BÐHaIçpG I 9iˆaJi‚BÐHa?çpG”H�JhC`pG‘IšJh�C`pGpGpG pGµŽL`y@(Ñ `q'ð.éÕ�‰@aqÕHB`q  Vèæøµ$%N°h@!ˆC°`°h€!C°`~O!øh&ðí‰€
+CÐ&ðTï°hÿ!IC°`øh!&ðòì‰€
+CÐ&ðFï}!É°hdÔŒBùÓà°hÿ!IˆC°`°h@!C°`°h€!ˆC°`ÿ÷¬ÿ(ø½µÿ÷ºÿ ÿ÷©üÿ÷µÿœæpGpGpµdL j!ˆC!C b jM¨C b j(C bUH!ÀhIA‰€
+CÐ&ðï j¨C bp½µÿ÷Kþ!S ÿ÷—ý!/ ÿ÷zý !0 ÿ÷výÿ÷3þjæµÿ÷9þ!S ÿ÷�ý@!/ ÿ÷hý(!0 ÿ÷dýN:GZ /qO1ÿ÷!þXæµÿ÷'þ€!9 ÿ÷~ý!< ÿ÷Vý€!9 ÿ÷ký ÿ÷]ýÀúÕS!: ÿ÷Iýÿ÷þ=æµÿ÷þú!  ÿ÷?ý!= ÿ÷;ýÿ÷qý(Ðÿ÷mý(Ñ!R ÿ÷/ý¬!1 ÿ÷+ýõ!3 ÿ÷'ýÿ÷äýÿ÷Âÿð?ùæµÿ÷åýT ÿ÷'ý,Ñ!Càï!@T ÿ÷ýÿ÷ËýæpGHipGIH`pGøµ �hx)x
+OC,7(LÑhy)yC(Ð ø½€(€!€¤²0¤À€ÿ÷ßG €ÿß¿ÿl¨€ ˆ#€k(h:¬ áx"x	
+C¡xcx	C
+CÁ{XhÉIhŽC@1C`@$(èÛL j&6°C b j0C b ÿ÷®û j°C b¨"ÓùX	hÛ[hR@
+pCp	ƒpÁp*îÛ˜(q
+hq˜ ç!
+(ÒI@	ZH€ pG#€Œ¤À�þµ"¨&´I–ðÊø(AÑ²I p˜ðÌø°Lÿ%õ5¥") &ðXë"!§nä™œ1T–£’‘˜"
+!+ð½ù(Ð þ½˜(Ñþç45"!80ð”ùÐþç	 (, 4†`!Ä`à*Ðþç L0I	`d	)óÓ@<¦c.` þ½þµ
Ÿ
+š	™(Ñþçh,Ñþç’‘2) —ðŠøþ½µ&ðNï½µ&ðLï½(µÐ&ðHï½8µjF&ðFï˜ p 8½µ&ðBï ` ½µ&ð@ï½ÿµ…°"¨oIðAø�45(h(Ñ 	°ð½!ÉC(ð1ù	 .ôh',Ð`lð`gd§d°h(Ñ´`gdà„d°h`d´`(h@(`(ðùš™‘©’É ðù(�
+Ñ˜`c˜ c˜àc˜ d˜`à!ÉC(ðúø l(ÐalAdà`l°``l(Ð¡l�d§dgd(h@(`gdðh`d(ô`ðéø˜¦çøµ"=IhFðÛÿ�45,Ñþçak ðöø!ÑA(ðÉø l	!	(ÐblBdà`lj�``l(Ð¢l‚d  d‡J�˜3û¼(`d*hR*``dhÁhadÄ`(ð³ø0ø½|µš(Ñþçh(Ñþç!’‘*!ðñÿ|½µðø½µðø½(µÑþçh(Ñþçðø½µðø½8µš’"ð:ø8½(µÑþçh(Ñþçðcø½µðiø(Ñ ½µðjø½D	t¶4Ù;HÁi)üÐ�j"C�bpG9I7H`9I8H`9I `8I ÀC`8I7H`9I7H`pGpµ !/H&ðòì-!+H	&ðîì+J(L !AC•h	@Ma(‘`öÓp½øµ àOhih(&ðî,Ð90 G )h)ÐŠh*íÐø½pµM(i(ÐIh@`p½&ðî&ðî&ðîéh¡BÙdhh!&ðî(ÿ÷Íÿhh(
+Ð&ðôíjh&ðøíhh€h&ðøíè`p½4€€´:P :¸:¤:'¨:Q4¬:°:H!ÉCA`HA`i°"Ca�j"C�bH�h "CÒ%f”5âDön�`pGpµ€ &ðpìI�iI&Jhh•BØàd&ðdìmhB1€aAp½HhI`!ÉCA`pGH€iIJh�BØH`pG|¶4€0€"f!µÿHh&ð*ì(Ð ½µðœú(Ððòú(Ð ½ ½µð]ÿ½µ‰hÊÕ"‘C¡`!x"IIðîþ n‹
+Cƒ½µÿ÷äÿ ðíÿ½ãHµ@hÿ÷åý½àHµ€h"ÿ÷¿þ ½øµÛL j@ bÿ÷�ÿ
!"10&ðFí&(Ð k@ cÒH€i`bÿ÷nÿÇ`k©A
B kak#HC!ÀiA&ð0í c`k@`càj!À©AÓçjçbài!jˆBÙàià j b¢káj ðûø½øµºMÿ÷Bÿ¹I8&ðíÿ÷:ÿèk±A!™AÓìkìcø½²Hˆ(Ð±I 	x)Ð pG  �çøµü÷*þ§K�˜i'$=(Ð% 9�@šiBÑ
+Cša@,Ñ(ñÝ-Ð&ðQ}v¼�7¬HÓÜìžHÿ÷wÿ9 ÿ÷µÿ˜ü÷	þ ø½pµü÷þý‘I"hˆi�Cˆa!(!`Ño ÿ÷Ÿÿ&ðÀì ÿ÷Oÿ(ü÷îýp½µAiHy(Ñ ðíü(Ñ ÿ÷ÿ(Ñ &ð.ë½8µ"{L! hÿ÷öý~H"h!ÿ÷ðýà˜&ðëàh"#iFÿ÷×ý(ôÑvH%pvH!&ðëuH%p` 8½pµ‰(o(
ÐÀy(Ñ(nˆ9€à(Ñ ðõüp½fi.Ðpy(Ñ1 ðžü(òÐ*!0ÿ÷Ýþ(ëÑ $ðpû! ü÷ôüp½p#YJXCà:µ„ ˆâˆ‚BÑ ½‚¢’h
+`!@&ð@ì¡€ n@ f ½pµAy)
+Ñð"ý(Ñ08!ðaø(Ðp!CHaCà8åˆ!h&ð ì ˆˆBÑ p½¨ †`á€ n@ f p½ÿµ�°$)�šUÐ(Ð(ûÑ+`3“s�@6p -KpCà;�Àÿ#[³@
+�!H“@i@	“#³@žF@œF›?„û�Œ9ÑµJŽC“›˜C�
+˜l0)�~Ñ	˜K(–OÑ`F(vFmÑH™à8@\(7Ñ(x"A
˜Ið+ýkF™ˆ		C‘y	q™˜ðÇù˜{˜àWàôµ„¶@¢€ÿÿ¤ëE¹ÿºHº&ðžëùHAiCFa/à˜öICNa™
˜ÿ÷Sÿ(	Ñ
+™˜HpRàaF)pFÐ™Và8!ü÷üJà™p&CXa˜éOFCà˜©x�p¹]8I¹Uÿ÷çþ˜©ÿ÷ÿ(ðÐ,\Ð˜p#XCÝJ\ààITRà)PÑ	˜×I(#Ñ`F(uF@ÐÕH™@\(Ñ™˜&ðNëÏIHi¨CHa2à˜ÌI¨CHa
˜1ÿ÷ÿþ(µÑ
+˜™Ap˜ü÷²ü$(àcF+pFÑ1
˜ÿ÷íþ(óÑ¢çšp'‚CwCJa	à˜©x�p»I8Ê]RÊUÿ÷�þ0©ÿ÷¼þ(ïÐ,Ðp pC²I
+\R
+T °ð½¯Hp!µ&ðŽé«I Ha½ðµ%Å°,••ÿ÷ïÿ¦Hè0D�"ÒC£O’¤I¸h"ÿnèˆ;%]ô3<«ÿ÷=ü<˜(òÐ@Õ ð¯ÿžHAhBCA`<˜À
+ÕðÅÿšH"h!ÿ÷!ü( 
+ð/þ<˜ÕðVù<˜ÀÕðGù<˜�Õ�J!p€Õà˜ð*û(Ð˜ð½ú8i"#©ÿ÷îû(ïÑ<˜@Õý÷Øû<˜€'Õà
™"
+�Li°0ŠÁxû#@ÁpA~~	C		v	
+Av~			vf `2s
˜ÿ÷Âýøh"#
©ÿ÷¾û(ØÑ<˜	!BxÐ �ðµù(‰Ð¸i(Ðyçÿ÷Xý(úÑ
+ðîý(öÐ ðùÐpy(Ð0© ðþ(Ñ0ðUú! 0Ár ð£þ™0 ðêþVçxi€€uÐ&ÿ LJ@°@QiBiÐp'wCIKÛ]+cÑ�C °@BQa>ÐIIIHð§þBI HJyC‘!ACS\+%ÐC›‰‰x[x™BÑ#XC€B�ð�ÿB˜"AxðpûkF‹		C‘~	vC˜™@xðøàNã@(ÑÓpC˜	@x&ðôéà,I*Hðhþô®F„=<¥*Cp!H	8@x&ðêéà'I#Hð[þ?˜8ÿ÷UýIÈ]@ÈU0?©ÿ÷}ý(íÐv.ŠÛ-tÐ �(‰"FH1à0&ðˆèpy1yOC€à7�8x($ÑyxðÒøy(fÑ˜ð&ÿ(aÐ_à„¶ ÿ@¥€$¾E¹»»»»""""3333( Ñ™	xÉ5Ðyxð§øð•ù� ðNø,8Ð˜(:Ð˜	!‰@@i(3Ñ$,à@0~(ùÑ,à(#Ñyxðˆø Ð  ðþ( Ð˜xÀÐ ðkù� ð$øÖçªâ˜ðÌþð_ù� ðø,ÕÑà,Ñ!(ü÷àù–âÿI lapð9ýxˆ}!‰ˆBÓþç¨t!�%ðÀïx{ÀÐð¯ûð`þ(ÐóHx(
ÑðHÿ"!’‘y{	Ë! ð�üð4þ(ÊÐ	ðÌýÇç y(Ð`y(Ñ™ ð_úà#ðàþ�˜&–0.�™/‘š4¨’�¹ˆ‹ÚI ð¦ûøˆæ(‡s»B€?ÈM”þÑ à ÕI0«Jˆš€Šˆ00� Øq{(ÓÎH!s`y(Ð(	Ñ#ð°þ(ÐÈN0{#ðƒÿ0sà y(Ñ#ð£þ(Ñ`y(	Ñ™ ðú(Ð½H{0«Øq& 60}'þ(
+Ð" «ˆÒ@‘C€
C'€à ÿ0™0&ðªè «ˆ"@Ò€
‘CC€˜€yÀ+Ð˜!	C�˜€yÀ"Ð˜	C !ˆC�`y(Ñ˜ 0@x(Ð&ðˆèà ðüà/Ñ ðóû@ «ˆ€
"Ò‘CC€ «ˆ�I)Ø’I	‰Õ!ÉˆC(0€�I  1	~É
+Ôay)Ñ™	"’‰		Ô 	� y(Ñ°}Ô «ˆ€@&ðLè &ðHè‡BØ°}€Â!à°}	™€Â.˜&ð>è™tOuK8{‰
+ª&ð:è(Ð «ˆ€@ðßÿ(ÐnIÈCðŽü&àkHlIÀCð‡ü&/˜!€h	C/™ˆ`àdHfIÀCðyü˜&(Ð0«Ùy" ðVù0«™‰¡E�|A-Éù		C™� (�(>�˜š©=�‘–’øˆ™’‘)ª/¨«ð[ü«?�A�X�X�˜(Ð„æA˜(ûÐ˜(Ð	˜(Ð «ˆ�I)
+Ù!ÉˆC0€˜€!ˆC !ˆC�D˜%ðŽîB	 «ˆ!€@@�CRD™C%ð˜î˜(Ð-�A˜)� («‘t@˜«˜q)˜0«‹™‰			C)™ƒ)˜€x	(ÑD˜%ð`îùˆ"æ)Ð"’0«Ûy=™.˜%ð’ï`y(Ð(	Ñ¹{:{K=™ #ð&þ(˜Ðà!y)Ð(Ñ˜(Ð.Ð=™«Jzl1%ðvïà8{%ðvï%ðxï(«t˜(Ñ y(Ð`y(ÑàH„¸øDDDDUUUUffffðµû(	ÐÝH«.�Ð˜!%ðTï�.™=˜ð7ù.ÑÖI×Hð–û«ÖIz%ðHï˜qC�
+ «v	àÎIÎHÉCð„û.š=™ ð­ÿx{Õð�ù˜!ÉC�™˜«C�˜Œ˜‚ªO£ xCÙòwDØŒØ‚.š=™ ðßø˜«	�˜ˆ‡>˜=™t"'�%ð$î·O¹I8ðUû™8ðQû(«|8ðLû=™>š‘(«’|«z1 ÿ÷±ú(Ð(ÿ÷9ú%ðø(Ðÿ÷ù(
+Ñ ÿ÷?ùð¥û(Ð ÿ÷8ùà<˜!BÐðFûà�H%ð<î(ÑœH%ð6î(Ð!sÐÈä˜I p$ä>µ •Ip–L”Hà`80 aðwû( Ñ�H 8 ` 0þ÷Äÿð¹ùŽMŽHÁ")%ðìé‰HŒI´8``"‹ kFÃ*‡I #þ÷»þ(Ð >½ >½@µ$,Òp `C‚I@p!%ðâìyJ Qi @C!¡@Cÿ @ @�CQa½øµD,$Òû÷iÿoMÿ @ii @B
+Ðà˜8ÿ÷­ù iFÿ÷Ùù(õÐÿ!1hi¡@ˆChap `ChI@p!%ð®ì0û÷Kÿø½øµD,%Òû÷?ÿZMÿ @ii @BÐà˜!8û÷¥þ iFÿ÷®ù(ôÐÿ!1hi¡@ˆChap `CRI@p!%ð„ì0sÏ HtEÀ
+©4û÷ ÿø½øµ$%LNÿ'p `CDI5T8Ii @BÐ ÿ÷kød,ðÛø½øµ
&(Ð,4Ñ9J`!Wi�@9B-Ðp!AC:JS\+Ð[STÿ#[ƒ@;BÐP\(Ñ ÿ÷Eø-Ð(i(Ð0I#J ƒ_#CC›Ûx£BÑ(hn‹	@&8€à@(ìÛ0ø½øµû÷Áþ#IHðúÿ÷�ø�(ðåü$ )ðÉúd,÷ÛhFÿ÷¨ø0û÷¬þø½Hˆ(ÐHx)Ñ!ppGÿwwww»»»»™™™™<(H å„¶lXGe;MAC Tx È¶ÿÿ¤ëE¹ÿµƒ°‘˜"‘iFÁ"ùy»y	Cé)Ð"y{ÉÉ%ðhíøy¹yCê(Ñy{"Cys·!‰b#y!ÿO˜1+Ñ™0%ðRí&à 'àcy+Ñ›
+™›0%ðDí @C°yÀÑ! ð–ÿ(Ñ@Càæ(Ñà›0þÍpG4â‰0%ð.íÿ @C8hy(ÔÑC˜"€00iF%ðªë°ð½àI H`pGÞI ˆ`pGøµÛM¨h(EÑÿ!ÙH"-1%ðŒë=Ð !¨`!sfaa{CÓHas a°  �ÿ …0‚[ÌH’h2y· €1˜2 %ðîì % �t!(%ð6ë0/fð'ø¨pÄH¨`ÄH~€Ô¨x(ÐÁH¨` `5(s ð!ÿ(Ñ %ðë ø½ ø½ÿµ…°˜(Ð±H@h(~Ñÿ$-4à þ÷ïü!8ðJûöÐ(‰F#ðMú(Ð à �· :€˜29’‘š!0%ðžìðx!Cï!@™,ÉÉCðpÿ À0q
+pq 0ppp (� 4(st! %ðÎê `0™�As&f˜(
+Ð ÀŠI ` H`i{C�His¨a  €˜(Ñ˜#ðÛúA xIÀÀCA pI8#ðÚû n‹
+Cƒ n~			v xŸ!@ pš!8##ðÀútNàPà˜(Ñ™ s81]†àlIóûÔðyÿà!8ðÃû( pÙ0~ÀÕiH`0€z@Õxy(Ñ €8€j	!‰@	Õ!8ðÿ p h!	C `0~€Ô x(Ð h!‰C `8 ðø(Ð8ð¿û™ 0As(ðEþ(Ñ(#ðÆú(%ð0ê	°ð½ÿµ…°ÿ$-4à þ÷ü!(ðtúöÐ(ÿ0)y0)�Ðhy(Ñ™(ðéüà#ðjùkF~ó"@1(vÐÀ0à@0kFv0‰*„· €˜2)’‘~›8	9�‰ %ðªëÿ À q"J
+`qPˆkF@P€`~"~CC v
+`v§pX~àphy(
Ñ!(ðßýáxŠÒCÀß"€@Cáp 0�70ôg™|0As™s˜(ÑkF˜‹8€!(ðýú¸p0ð¶ý(Ð0àì£Àà¤Àˆ£G@›G%ð’é`çµ"’–H"#‘¡þ÷2ü(	Ñ"’˜H"#‘¡þ÷(ü(ÐÆÛ55hK«i ½ŒHµh!#þ÷/ü(Ñ þ÷wý ½ ½ŒI	hq‹IHapG‰HhypGµ	ðqý(Ñ ½ ½„Hpµ$k@Õðù�M!.
+àÊSh’h“BÐ$I,Ñ�BòÙàyH�jÀj�BÐ$ p½µÿ÷Ûÿ(ÐsH 0Š€Š�BÑ%ðìê½ ½nHpµx(KÑmH"h!%ðé(CÑÿ÷áÿ(?ÐhH%ðØêfH!%ðØêcH!%ðÒê(„B/ÑaH%ðÈê_H!%ðÈê\H!%ðÂê(„BÑZH%ð¸êXH!%ð¸êUH!%ð²ê(„BÑSH%ð¨êQH!%ð¨êNH!%ð¢ê(„BÐ p½ p½pµ ð]ù(^ÑGL@MANà x@ p þ÷Éü þ÷°ú(x(óÑ0h"!%ð¬è(ìÑà þ÷¢úÿ÷xÿ(øÐ3H%ðpê1H!%ðnê/H!%ðjê(„BèÑ,H%ð`ê*H!%ð^ê(H!%ðZê(„BØÑ%H%ðPê#H!%ðNê!H!%ðÓ~ÓdMëuJê(„BÈÑH%ð@êH!%ð>êH!%ð:ê(„B¸Ñp½TxMgmt80211MsgQ�¶UapGrpRekeyTimeOutMsgQ”¶ì£À@¦€@£€4©€ €HôµLˆ|à¤Àÿ0™0"µ%ðê½þI `ýI
+ `þIüH`þIýH`ÿIýH`ÿIþH`pGµ#XCüI@!
+À %ðæé %ðæé %ðèé½÷µ„°óJ ’�˜)ª«%ðÜékF{(Ð(LÑ.60%ð–é%ð˜éay)Ð)ÑkFz)0ð‹ÿû÷ˆúþ÷XüÞIkF�ßJ{89%ðºékF{z%ðºékF{ÿ÷ûkF{2)#ð•ùkFz(%ð®ékF{)ð¸þ¨þ÷^ü8û÷búkFzš ðŽÿkFzÿ÷Žÿ °ð½ ûçðµ…°ÂJ ’�!8ª«%ðxé¿M¾I(
+ð�ýkF{(Ð(:Ñ»I(
+ðƒý %ð*é%ð,éû÷(úm¨”D`OêË¤þ÷øû®IkF�¯J{89%ðZékF{z%ðZékF{ÿ÷Ïú0ð@økFz%ðVékF{!ð!þ¨þ÷ü û÷úkFz:0ð3ÿ °ð½ ûçøµ
$û÷ñù•J)	(20$ð¢ï
+(
Ò�J!(2T€Á`)0ðOüð
ÿ$8û÷Ûù ø½ðµx…°@Ñ%ðé(Ð�H%ðé@Ð8)	� ‘%ðé(Ñ ·ç· €90ðnþ"™20ðÉþpy(Ð(Ñ $ðTïš™ðšþ˜%ððè(%ððèeJ ©8:PPÈ:’›š!0%ðèè`J! HC\+
Ð€Àx¨B	Ñˆ[I"	Cšp"
+RàI)éÓ˜ÿ÷áù $ðï%ðbè%ðdèû÷_ùþ÷/û� $ðï™3(ðyø $ðï3ÿ3˜3)ðÉý¨þ÷@û8û÷Dù Açþµ$ `C9I
+\*3ÐE(ð�ý-Ðix"0ðdùkFh»\Q”l™ˆ		C‘y	q¨x™ðþ+H¡‡kF�˜ˆjx	)0ðÛü(Ð 8p˜€à 8p˜€d$$,ÀÓþ½pµ%ð(è"jCK™XA™P h!`p½pµ%ðè"jCIR‘hA‘` h!`p½ð:ô:>ø:C’ü:ñM;%E;Ä¶ffÿÿ»»»»wwÿÿpµ$ðìï"jCIRQhAQ` h!`Íçµ
+hþK*Ñh@`½Šj‚BÐXh@X`½øH$j*ÐŠBÐšhRš`"
+qÂj*ÐQcà�bÁbLc½"b
+qj"„bìH@!hþ÷¢ø½µ
+h*ÐæJSkƒBÑj(	ÐˆBÑ PcáH"h€!þ÷Œø½ðµ…°ðàû ð
ü~Ð(k c×H�AjIAb!`ðÙû$ð²ï‘� h'.9 6(Ñš Pb `##q0z`q yqz€‰€‰Có! q@±z‰	CÏ! q†ÆYæXS`ðÒ©@ñz‰‰C qii(iY@C
Ð*i˜ki™‹A
+Óš(i›ii€™Aà¨i(Ðš›!¸YAá` `èi a(j`ahj a(hàahh b¨h`b  0A{2{I’IÒCý"As@2{RÒRCAs!�s1{	Õ!�s2{!ÒÑ!s‚{#à
+à’™H(3:!$ð:ï(Ñ `àðVû °ð½ hûçøµ%ðtûŒHj¡BÑ j(Ð$ðî  b.faÐ"#’…H(32!$ðï%(Ñ%(ø½øµ&ðQû{L!j�BÑ`k(Ð$ðúí `c/ÐtK"’uH43:)$ððî&(Ñ&0ø½pµ%ð0ûjL!j�BÑ`k(Ð$ðÚí `c%(p½8µ þ÷ÎøaL, #jÁ\ZjhÛi˜G
+ðÛúðâúú÷]ÿ!j `ðâúðæú b(ú÷Vÿ$ð¼î!j)Ð. B\’TJQH(3$ð¬î 8½øµ%ðïú<Ð j&(Ð$ðší¦bEM(j B/Ñð°ú¶éJTUyÙ y(Ð(%Ñ&qð°ú(j 0/sÐ(j/kÑ"!ðÆý& 	ðOùà(j"k!ð¼ý% ôç$ð|î(j"k!ð²ý$ êçð‹úà&`%(ø½pµ%ú÷öþ&Hj BÐ!y h%)Ñ!!qãibj!˜G
à j$ðHí(Ñãibj h!˜G!¡b!`!q0ú÷Ùþ(p½pµ$ðPú(ð}ú(Ðÿ÷ËÿðNú p½øµð?ú	O$8 `CÀ�i)Ð-ÐE!	\‰Ô.ÐE!	\à°åðè$¾]R¿R †ÉÐ0ÿ÷�ÿd,ÚÓðúø½! Íçµ$ðî(Ñ ½ ½8µ$ðüíúL" j!kð*ý j"k!ð$ý jAy)Ð�y‘Ay˜"ÿ÷Üÿ!j q j€i(Ð$ðÈí%jªhëh€™A©i`!jËiJjh!˜G!jHi(	ÐŠj*Ñ’ßH(3$ð°í 8½pµ$ð¾íÙM, +jÁ\ZjhÛi˜G(Ñ(j.kÐ"!ðt=¶PW�à²dÜü" à"!ðÖü# 	ð_øà$ p½øµ 
 `ú÷þÅI
+j*Ðy+Ñj*	Ð"`
+jh*`
+jRj2`	j	k9`ú÷þø½ðµ…°%ª©¨ÿ÷Õÿœ,Ðš’2!˜— G(æðµ‡°%ª©¨«ÿ÷¼ÿœ,
+Ðš’3"—˜ G(Ð%(°ð½pµ†°%ª©¨«ÿ÷¡ÿœ,	Ðš!’
+‘1˜# G(°p½’H 0~Iv�I	j)ÐB~RBvËiJjh	!GpGµˆL j(Ð 0{(Ñ
+ðù j! 0sƒH"h@!ý÷´ý½pµ }L#j+JÐ,!É\h%)Ñ
+ð	ú(6Ð 
à j 0s9à
+ðìø-à)	Ñ
+ðúù('Ð ÿ÷#ÿ(ñÑìç)	Ñ ð‘ù j! 0sÿ÷Ôþà)Ñ à)Ñ! ÿ÷Žþ ÿ÷Ýýà)Ñ øçZjÛi˜Gà ý÷�ü[H"h@!ý÷cý p½UI 	j)Ð
+y*âHfÞLYJù°9ÑËiJjh!GpG!PHÉµ$ðŠêNHJI 8cIH"!00ý÷Oý! $ð˜ì! $ð˜ì! $ð˜ì! $ð˜ì½(Ò(Ñ pG>JÀ€ÉÀ pGóµ‡°%˜BxxC(6ÑŸ‰¿0àøx¹x<C°B*Ü`x!xCÿ8d8Ñ $ð’ê@� 0$ðŒê}#ÛXC� 0$ð„ê}#ÛXC�˜©ÿ÷»ÿàx¡xC1?Ç)ÌÒÿ d0kF˜� Ø�Ÿ¿$Há`}!�0hÉ$ð~ë}!�phÉ$ðxë�"8©$ð:ê75d,äÛ(	°ð½Hj(Ð pGðè]R$¾°åÐ¶$Hj(ïÐ íç!H!µkÉCý÷¶ü½Hµký÷·ü½0µ M
!‰iàèh@è`RkŠb*ÑËby*Ñ*iR*aƒb`q ,ÑŠj*çÑ0½0µ	M 8"JCR“i£BÑ0I(Ñ)òÓ0½ðè°åPHµ!½X	H[¾„h"e!$ð€é(Ð ½@!�pGøµ$%(”%Ñ0iFðÌý
ÐkF%aˆd*Óáˆ ððûà ðü`�kFˆ(Ð@  �ˆ €à,Ð1 ¥€ú÷Òÿ$ ø½pµ
&+Ð0L+Ð+Ñ/H)àðlý(Ð ðìûðôý)H)8$ðnë h"!ý÷üà#H)0$ðdëhi!	ð"ÿ0p½µ$ )Ðe)ÑH8$ðXë(ÑH$ðRë(Ð$ ½HB`úçpµ$MH!8l`$ðéH!$ðéH!0$ðé	H)h(0aDa„aÄa�`IbIAb$ð.ëp½øµŒ¶<ø¶¿[\pµ$ðë¨C $ðëp½pµ$%(ÿ0Ÿ0!$ðëèþ0@!$ðë " !ÿ÷Üÿÿ5¿5(€!$ðëd,ßÛp½pµ$ððê(C $ðîêp½óµ�°ü÷ùý$%(ÿ0¿0€!$ðæê(ÿ0Ÿ0$ðÒê;ÖaPD]§éÐôú!@/Ð!C™)Ð!C!C0$ðÆêÿ5­(@!$ðÈê " !ÿ÷Àÿd,ÎÛü÷ñýþ½(ÑûH@\ûI@àHúIZpGpµøJ(Ñ`�pÔp÷JÑß%+@à(Ñ %+Cw"ðxûñH",Ð,Ñ�kCà�k‘C�c p½èHÀhpGæH€xpGåHÀxpGæH}!µhI#ðRí‰€
+CâIà@
+h*Û(ùÜ(ÑÙIHh@H`½pGµü÷pý $ðXêÓL p $ðTê`pÕH$ð`êÿ÷5ÿü÷Œý½µðuùÿ÷çÿ ðƒþ ½ÇH@xpGÆHxpGpGÿ0pµ¼0
$ü÷Eý) $ð0êü÷kýp½ÿ0¼0µ$ü÷6ý $ðêü÷\ý ½µ$d ü÷Õü´H}!hI#ðîì‰€
+C±Ià@
+h*Û(ùÜ©I(Ñˆh"$€àˆh@ˆ` ½øµžI¨N\žI@ZžH¤I¥M 0ŒBÙ¢I0–9ŒBÙ0´BÙžI0¯1ŒB	Ù�I0È9ŒBÙ ¬Bèæy@_SnIØ‘H¬0$ðàé�H•O@x‘? (Óÿ ¡0¼BØ!à´BØ!à�IÈ9ŒBØ!à¬BØ!$ð¸éü÷ªý(Ðü÷¦ý(
+Ñ¼BØÂ!à¬BØ	à4 $ð¦éø½ü÷—ý(úÑ¼BØÄ!óç¬BôØÆ!ïçøµ$ð¦é(Ð,Ò!aCÿ&
$´6ÿ'Å7`0$ð„é)]8$ð€éd$$,ñÓø½÷µÐ"à"$'&)Ð<)Ð)Ð4)Ð$)Ð$WI�1XaÑ$àRJÈ2‰¢ŒX$ð`é $ð\éJH™@\JI@	Z-Ñ àOJ8–:‘B	ÙMJ0‘BÙLJ È:‘BÙ ÿ÷œÿü÷'ý(Ðü÷#ý(Ñ0!3 $ð*éÂ!àü÷ý(Ñ0!3 $ð éÄ!4 $ðé3L`x(Òÿ  !§0$ðé`x (Óÿ @!µ0$ð
+éÿ !¡0$ðéÿ "!£0$ðé! $ðéÿ !@$ðøè! $ðøè-Ñ˜ÿ÷õþþ½pGpGpµ
ü÷Úü!I@Z) ÿ÷,þ"$ððèp½‚qÊ<a[ÞŸ”I `pGøµ$ðäè(JÐM$5!aC
+)]Nó›[[×\É!Ð9	CÖTàNÆÌò°ò·ø¡€<¤À+€€»ˆÈä²$;9	C6[6	àVTI		)ùÓQyd		$$,Qq·Óø½ÿHµh"’C`ýIh"C`ûH$ðŽèûH!Ap!p ½ µ$ð†èõIÉHp½ µ$ð~èñIÉˆp½ pG@B)Ñ!ìJ‰%2‰ëJh*ÑŠVà"ŠV"ŠV‚BÛ"ŠV‚BÝpGáIßJ	h@B’)ÑQVà!QV!QV�BÛ!QV�BÝpGÔIx‰
+pyJp‚x#1
+p‚yJpBx
+qByJqÂx
+rÀyHrpGÊI ÀC‰pHp#1pHpqHqrHrpG(Ý àd!ÉCˆBÚ@BpG(Ý àe!ÉCˆBÚ@BpGf(Ýf à(Ú pG pG|µkF$š“¯8c¯6!)®NpöXp˜©#ðôï(Ð¥kFYyp[#ððï¨kFy@ˆ#ðêïd,êÛ|½|µkF$ Np6Xp˜©#ðàï(Ð¥kFYyp[#ðÔï¨kFy@ˆ#ðÎïd,êÛ|½|µkF$‘Np6Xp˜©#ðÆï(Ð¥kFYyp[#ð¶ï¨kFy@ˆ#ð°ïd,êÛ|½µkFpXp˜©#ð°ï(Ð¨ÿ÷Tÿ½ÿ÷eÿ½(µÑ*Ñ	)ØH½ ½*Ñ)ÓÈ½ ½H½*Ð*@Ñp)8ÐÜˆ€8Ñ‹	;#ðˆï''))55++55555555//15ˆ)
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Ð™)Ð�)Ð¡)ÑŸ ½& ½. ½> ½— ½f ½n ½~ ½6 ½½þµ
NO¸jNI@¸bxjMICxbðÔø�€! #ð@ï ü÷Áù€! #ð<ï ü÷ºù) ðýÿ<H#ðï*1 ’ðõü,Ñ.Ð.Ð-Ñ9Hà#ð$ï(Ñ7Hà7H”>|4e¶ÎÿY#ðôîðbý˜ð¨ø) ðñû(Ð1H€!#ðï2!(ÿ÷#ÿ2!(ÿ÷ÿ2!(ÿ÷ßþ2!(ÿ÷1ÿxj IÉC@xbü÷Ãù*1 ÿ÷3ýðÝú™2 ÿ÷/ÿ ÿ÷µý ü÷ø ð,ý ü÷ø ÿ÷¦ý! #ð”îðKý û÷óÿ(Ð! à€!€-€žÃë·@¨€üýÿÿÀ€òÇNÇRÇ/#ðnîà! #ðnî1 ÿ÷vý1 ÿ÷@üð+ý û÷Áÿ�N(Ð�Hh(Û #ðJî€	(Ñði@ða
+à(Ñ0j@0bà(Ñpj@pb°i@°a! #ð>îü÷pùO 9i@,Ñ�C9a8i!IC8ayHà�C9a8i!IC8avH8a0x BÐ 4pü÷ø ðòø ðóø(Ñ) ðù8i!C8a þ½dIÿ ppGøµ€aK"[˜V(ÜBB&(Ò )Ð@)Ð€)Ð$à$à $à0$·wÃ]0gB&Aä)	Í #ðî)
+Î #ðüíÒ #ððíA	I1C/Ñ@ Cà¿ @Ò #ðìí!€ CÌ #ðæíø½óµÒ �°#ðØí@!BÐDH	&�àBH	0&�˜1#ð¤ë%,••(àÌ #ðÀí	@@ C	Ì #ð¾íÑ #ð´í§©ÈQÐ #ð¬í©ÉYC©ÈQÏ #ð¤í©ÉYC©ÈQ™@d�´BÔÛ˜(Ð$¯à 8X™#ð¤ì™UA
™-	WAC˜d�´BèÛ	àšÿ!p
T™V�˜šxÿ @	pš!QVAC˜™)Ð™€0°ð½I `I`pGè·+€À¢€¨h*³t;p;pµüMiiüHAeüI	h�eûH$„aû÷‰ý û÷lý û÷iý,`p½µòLak k#ðPí}"Ò#ðLíãj¢j#ð(ì½øµ}"éLÒak k#ð>íáj j:#ð8í3*#ðìø½µàLak k#ð,í}"Ò#ð(íãj]}Ï,i…?C¹¢j#ðì½µð²ÿ!"ð´ïØJ##ðøë½pµÑM hrÔHh‚C`ü÷ºøÑI@Zd#XC¨a`Cû÷îüp½ÍHµû÷uÿû÷Îüû÷Ñü ½pµû÷éüû÷õü¿L%&cec¡iåbAC¿H¡bh‚‘C` y(Ñ ÿ÷ªÿû÷Õüerp½pµ³L iÿ÷|ÿa‰#ðÀëàaµH¡i#ðºë¨BØàiàáa}!É#ð°ë bp½
+ µÿ÷£ÿÿ÷·ÿÐÿ÷¾ÿÿ÷Ùÿ Hj
+)Ùÿ÷”ÿÿ÷¨ÿÿ÷±ÿÿ÷Ìÿ ½pµ—M hršHh‚C`ü÷Fø—I@Zd!AC,©aÐ`CàèiHC}!É#ðvëû÷püp½ˆI
+j‚BØJz*ÑIy)ÑÔçpGóµƒ°'�I
kk*k9#ðpì�éj¨jš#ðfì"#ð`ì;"#ð<ë‘ª±C�¨;"#ð2ëš#‹AÓhFÈ€¡AÓ"1(#ðDìš€aAgLJÀCck"kÉ#ðëáb b˜gc c°ð½pµ_L`y(Ñû÷üû÷È(kq×ýüû÷*ü]Jh“˜C` iHC)ÿ÷£ÿ y(Ñ ÿ÷áþû÷ü `rp½pµÿ$MMZ4+hÃÿ;Ã;+ÜQIˆj@ˆbà�BØ‚BÒ p½ÿ÷®þ ÿ÷Ïþ(hÿ÷¦þ‚#!0û÷wü p½µðù8L(Ðû÷�ÿ?I@Z ` y(Ñ hÿ÷Œþû÷}û½8µhFü÷@û6H™h�BÐü÷û3H™h�BÐü÷û1H1M€ÿ(Ñðý(Ð,Ð+J(h2
!ü÷û™(h�BÐü÷û'H™h�BÐü÷ùú8½H8µhü÷ùúHhü÷õúM(hü÷ñúHhü÷íúL¡ÿ)Ð(hjFü÷ñúÿ  w8½Hµ 8ÀÐû÷Eþÿ÷¶øû÷mþ½¥€0é€"€@¦€@B!€ä²PÃ-1 ¸ø²ˆ¶º˜ ¾x¹øµ%ÿNu`ÿ÷°ÿþHk"CcýHýOýLÀ Ðù÷Zû� i!ˆC a iñhC a¥aû÷]ûû÷üûñH€8Ç`òHÀ0h"ói”6$mh/#tC`ðHhC`˜ù÷Aûà¥aû÷Gûû÷æûæH€8Ç`#ðêèHéI@mHa i!ˆC a!
ðÈù(Ñ àðrÿðNÿ#ðëø½ÛHµi"‘CaiÓJ’hCa!�aû÷½ýÿ÷.øû÷åýÑJÀ2h!C`ÏJhC`lçÿµƒ°&ÎMð@ü(Ð 
ðøú(Ð@zÀÀÿ÷ÿù÷çú"�ÅH’h"!«ü÷
+û˜ü'(ÑÀH"hJ!#ð$è#(Ð˜(
+Ð¶I»JnIn#@9@Y@X@CÐ±HµKnBn@:@Bff àÿ÷·þ,(Ð#ðê˜"hch!‹A3:‹A	Ò hahÀ±Aš™ÿ÷uþ(Ñ˜H�iI�aÿ÷)ÿëàšHbh!h€0Baaðhù•Jh!ˆC`‘JÀ2hˆC`�O8iŠJ!@Ð`8iˆC8a8i!C8aBà„IHj@Hbh8Ñj
@bð¼û(¸iÐ¸i8i!ˆC8a~Hh"C`8ivIÉhC8a#ð@ê¨à€€(Ñ(i@(aÿ÷/ÿðþ–ð©² oœÇ�ÉrJh!ˆC`oJÀ2hˆC`8i!ˆC8a8i!C8alM û÷�ü¸i€€(·Ñ,
Ððù™ˆBØ˜†BÒZHÁiIÁanà_HAi]JQe!AaaHû÷Xù#ðÞèSIk"�Cc8i!C8að¹ýMO8x(Ñ%à@%,ÐðÖø.Ð ð&þ Cà ð þû÷ÿèÀÐû÷ïùB @ðùþ(!Ð-ÐhÕ û÷Êù û÷Óù Àû÷ù û÷ˆúû÷—ú¨Õ%-(û÷·ù(û÷Æù û÷yúû÷ˆúðÖþ x`,Ðð“ø™ˆBØ™ˆBÒøi!	@øaÿ÷>þÿ÷þ˜ù÷«ù °ð½!H!€0Ar0 ðæû˜ù÷žù"ÒCH’h"!«ü÷¼ù ççµðßú(ÐH@h(Ðÿ÷þñåøµJHh&±C`JÀ2h±C`L!iM'9@©`!i¹C!aà ¸#€øïÿÿÿ@¦€£€0é¥€ˆpÂôµ!i"C!a@Ñÿ÷/þÛÊ25qâÜ:yðý i8@¨` i¸C aIh°C`Ih°C` i€€(Ñhi@haH¡i‰‰)¾Ñø½ pG
H@zpGµû÷Æùû÷�ù ÕIÈj@Èb ‡åÿ÷£û„å£€§€ˆ0é ¸$#XCÿI@Ái	É
�a@iÉ@@hpG$#ðµXCøI'@ÁiBi	É
ËÒ#?þhi<@m�B
+ÑÁh	1C`Âi!	‘CÁa!	àÅi5ííÅa…h-5CI`,ÑBiÌ�ai[œBÚÒÀið½$!ACÞJµŒ#ð°èâiÒÉ ÒÉŠBÑ ½µà û÷üÿ ÿ÷æÿ(÷Ñà û÷óÿ ÿ÷Ýÿ(÷Ñà û÷êÿ ÿ÷Ôÿ(÷ÑÉLà
+ðÿ(Ð h"b!"ðÞí û÷×ÿ ÿ÷Áÿ(îÑ½ÀH€!µ"ðäí½	0µÌ
$!QC¸JÀ
�¸J!	àT+i[ƒBÑ à@ BóÑ0½÷µ‚°$#˜¬IXCFù÷[ø�¬Hiš(Ä
™8ÿ÷Óÿ'¦Kÿàpiáÿ{^Ys4„Ä@Bh!`U1iI¡B	Ññh	9C`(%-…C$	à±h5	9Cídí$$`](ÝÑ(™#ðè˜ù÷(ø°ð½$#XC‹I0µ@ÁiiÜ
#m¥BÐ
+ä	ÉÉÁaÑÁià1ÉÉÁa
+)$
$¢BÙ‹CÃaÀi0½$#XCxIðµ@ÁiDi	É
Êi£"uh'?;@�BÑÁi?�C!ÇaàÇi7ÿÿIÇa+ÑËãR–B�aåÒÀið½dJgI l2@1µ	kÒi	
$
£BÑ#@@ŠBÑ ½ðµ$#ŽF!XCŒFVI@Ái	Ê
‚aAiÓË!	$àh¥Õä.Ñid”BÑÂh$ä"C`Ãi
+šCÂa"à„h%$í,C`Ãi3ÛÛRÃaCiÔ‚aÄij&/6
?
¾BÒÑ@
@¬BÎÐaF)ÑÀiqF€Xhð½ ð½pµ*Ð% 5(}!}ÀË	‚Ià~I*	Ð*
+Ð*Ð*	Ñ"ðNïà"ðPïà"ðPïàÿ Ó¨uÌZ´àv(}À�  Vþ÷Šþàr  Vþ÷¢þàqp½pµ
@"("ðÔì(ÿ÷Æÿ(@0"ðäì!@1 ""ðÆì2ˆ(! 0`:d1"ð¾ìp½ðµ$ ÿ÷þAˆK™BÑ@1(`1`	ˆ@9		Ð#›	à”ôµD€£€ï¾™BØd0 9`$9€ ð½8µø÷ðþÄH€iÄIHa iFÿ÷,ÿ(
+ÐAˆÀJ‘BÑÀIA€!ÿ÷�ÿ$à$(ø÷Úþ 8½8µµHiµI@9c iFÿ÷
ÿ(Ð!ÿ÷„ÿ 8½8µ¬Hj¬Iˆc iFÿ÷ûþ(Ð!ÿ÷rÿ 8½¥I£HT9
+ðµl2@8k0Ä`žHj'�H?
ƒcÎi 1	
¹BÑ%'?>@<@¦BÐ!Òi)C-
6
µBÑ$C:@;@šBÐ  Cð½ŠHµT8Ái	É
�aBiÉRÁij
$
£BÑ#@@�BÑPhIhˆBÐ~Ih@` ðûù ½ ½øµá÷+¶wû$ä	
sH&@8€krI@9È`ÿ÷Éÿ(Ð iFÿ÷‚þÐ@"!8"ðÒë8ÿ÷ÅþkFˆá€ 9@0&a@1"ðôë0ˆ(€ ø½ ø½øµ"'\H?@8a^JBa!‡a�b]MÇa"EbbÒcÂbXJYNË\b`ÒI)îP÷ÓTKÉÌb`^PLI"ŠaRJÊa"ÿ#[ŠbMN"b 6
+cÎbKbŠcJKKOJc"Ô¥k`ÿ3[R*7QöÓBLÒ 4k`§P"Bc"H2‚c"J`"#›%Ê`=Ãc�``Jaš
+a"9NH2!Ë\b`$¤I)îPõÓ.KÉ3Ìb`^P&I"À9Êf.J
+gS"Êg%ÿ"RE`JgŠg*IÅ`(N,‚``!0"ð0ëàÁN`ÿ6IvdR,9PñÓ!0"ð"ëàÁKN`I@;9P`I
H1Áa$„a
+JÁ€:QbNFaab 6Fbb‘b_cS ca"ðníHÀ0…`ø½¤€Tï¾º«ì¤ÀãÀ˜ÚÀ0€éÀ€‘‰‘øy<=æT@€ëÀØÀ€‰H!µ"ðªê½pµÑ p½0‰„`z!zC(
Ñ`{!{C(Ñ-Ð(ðàø(Ðà-Ðèy s¨yàs`z!zC(	Ñ1 ð‰ù(Ñ0"ðlêÑç p½pµ
kH""ðœê( `Ð!s!h  � h! 0(`r!Ar(h1
+sAs)h ˆrÈr p½µd"iF¨ÿ÷Öÿ(Ð˜!t,AtÐ™#J{CJsŒa!�r!Ár˜½µÿ÷Þÿ(Ð ÿ÷‚ÿ½"ðç|µd"iF¨ÿ÷ªÿ(Ð˜!
+tAt!�r!Ár™(ÿ÷hÿ|½|µÿ"‘2iF¨ÿ÷‘ÿ(Ð˜!tAt")0"ð2ê™ ˆr Èr™ ÿ÷Iÿ|½|µÿ"‘2iF¨ÿ÷qÿ(
Ð˜"10"ðê˜!
+„rÁr™(ÿ÷-ÿ|½|µd"iF¨ÿ÷Vÿ(Ð˜!
+tAt"10"ðøé™ ˆr Èr™(Qa»„{ÈÕXéÿ÷ÿ|½pµ‰„""t bt"0"ðàéàz¡zC0 r
+àr)0ÿ÷ôþp½ÐéÌpµ‰Dð®ý(Ð`{!{C(Ð ðZþþKüHh")h# Gp½úH`úH!Ap!ppGöI 	`õIHpppGóHAx)Ð!ppGµðH"ðlê(Ðÿ÷Æÿ÷ç½pµø÷òûéL`x(	ÐåI VAÐ�Ð!"ðdêãHx(Ñ ðþ  r û÷:ýÞH"h!"ð"éÿ÷Ðÿ(ø÷Ñûp½µÿ÷ÓÿÔI pHpÖI`½ÐHz)Ð!rpGÌI 		h)ÐÊI	x)Ð pGÿ(Ð@pGÊIµ	h!ð"î}"Ò"ð†ë‰€
+CÐ"ðrè½¼I 		h)ÐºIIx)Ð pGøµ%*)Ð ‰ÿ÷Éÿ(~Ð°Iz({Ð(üÐx"Õ, ÐP{{
C!8ˆC-ÐÜ-Ð-	Ð	-Ð
+-Ñ¨I©J	ˆxCÐÿ'à-ûÐ-ùÐ5-ÑšN/NCÓ}Ñ-†™60h"ðé8ÿ÷Ÿÿ(tÐ(˜OœM"Ð(ˆ(Ð1 V@Ñ0h@yÿ÷‘ÿÿ÷nÿ (€8hD!"ð„èÈ ú÷�ýSàø÷,û�†H!"ð¸ê˜ø÷)û1h V€J!rAÐ�Ð!"ð˜éà8h"D!"ðbè0h@yÿ(
Ñ8h"C!"ðZè(.Ð0h@yÿ(à ààÐ0h@yÿ÷Qÿ(ˆ(Ðÿ÷<ÿ(Ðÿ÷'ÿ (€à(ˆ(Ñÿ÷)ÿàxÕ,
ÐcH!"ðrêàxÕ,Ðÿ÷Ûþ ÿ÷¦þ ø½ZHT!µ"ð6è½øµ"VOº‚2àhx)xCÿ88!Ñéxªx	CÌ(â‘BÑ	±BÜ!,Ò!ÊFH0"ðFèààÀ!0
+Àd,öÛéxªxC1	6-E.ÊÜø½óµ$2%‰.‰ŽFáx/Éƒ°Ñ¡à!1£x”F’*Ñ	)PÐàcF›Ñ@%àˆ1M«BÑKˆ«BÑ‹ˆ«BÑ%.à	xÉÐ%&à%.*Ñ™"
+p8ïh—%Å8$@iwF¿�ù÷ƒþ(Ð˜(Ð˜z@ÕH�"8©!ðcü(Ñ˜!p^àHh!ðìï(BWÐ x€(UÑH�Š)QÐÁ!É%‘CàKàøµü¶T¸äéÐé¾ôµ¬¹<¤À¤ëD¹H¹ÿÿˆŽ°BÐIˆBÑàŠIˆBÐ!1"8!ðü(Ñ i@Ð"8©!ðü(Ñ8!01"!ð	ü(Ðm-ÚHé Š(ÒÑ °ð½ ûçÿÿäéˆI ˆ€	`pGøµø÷Éù� !ðzï�I!ð�ï`y!y~OC(¸€Ù˜ø÷¼ù ø½¤zN%àh hC!x1Tax€Ap€¡ð­øàx¡xC$m¸ˆ¨BêÜ˜ø÷žù ø½µiH!ðHï @Ð ½÷µ‚°eO$€àø÷†ùh!aCx\š‚CÐ(ø÷�ùrà]JÉÐ2pHxPp‰�ðxø(ø÷sù0ð{ø(`ÐTM$Ð5hx'	(Ñpi�ðËþ(�>Ð˜;•ã5ü€¢ãWðÓþ™·"’Š0"ðXé(Ñ˜ð:ÿ-à˜"1$#ðÂþ%à(#Ñ1‰piŒð¨þ(�Ñ<à˜ð®þ9K0ª"ð:é(Ñ˜ðÿîç!kF›ˆ˜"1ðžþ$,ÑhxÀÐ˜,`Ñà™ `hx€Ô °€ °ð½d"H€ˆ BÝyç õç"Id €!I €pGµJxxC’!ðŽî½µ‰$0	Š°9"¨!ð‚îH!ð˜î ª"ðîè(Ð"ðîèL©Ð4 "ðìè(Ð ©"ðêèœà$˜"©!ðbî 
+°½`¸8êLˆ;Š;µsÐc! !ðJî  p `pÿ @ p
+àp! !q`qÿ € r
+`r ¡ràrÿ À s
+às !t`tÿ 0 u
+`u
+¡uàu<  vÿ 0 v
+àv
+!w`wÿ" 2 0p
+Bp
+
+�pÂpÿ"'2‚q
+Âq
+
+rBrÿ"(2s
+Bs
+
+�sÂsÿ")20‚p
+Âp
+
+qBqÿ"*2r°Æíßø‚Vý]ê
+Br
+
+�rÂrÿ"%2‚s
+Âs0"p"Bpÿ J0P4 p
+àp
+!q2!`q™u½pµ þIÿMpH€ˆ€È€�È`Hpc `C@ÿ÷wÿd,÷Ûp½!I@Š(Ð pGÿµ�°Èx‰xC˜!ÉAÌj,ÑêHÈbÿ÷Wÿ`x!xC-Ñøx¹xà-Ñùxºx	CCà-Ñùxºx	CˆC p
+`p˜?—˜?@0�Îà/sÓ™ÈxŠxCJxxCÿ#%3Ê™BsÐ%ÜÌKÊ™B^ÐÜÿ9IDÐ)LÐ)gÑ-Ð-;Ñq9Õ"`2!1ˆà*[Ð*ïÑ-Ð-ïÑ±ïÕ"[2!$1yà*bÐÜ*TÐ*ÝÑ-Ð-Ñ1}Õ"^2!01gà*[Ð%*sÑ-Ð-pÑ1nÕ!˜"V1!ð®ïšV!	]‘ucà-Ð-_Ññ]Ð"X2¡Hà-Ð-UÑ±SÕ"Z2!1=àZà-Ð-IÑ1GÕ!˜"1!ð†ïš!~Qu=à/à:à-Ð¼Eô„Oƒš-7Ññ5Õ"Y2!1à-Ð-,Ñq*Õ"\2!*1à-Ð-!ÑñÕ"]2!61	à-Ð-Ñ±Õ"_2!<1˜!ðRïà-Ð-ÑqÕ!˜B1!ðJïà8‡BÓ9?à'™�/Ð-ç°ð½
+!É@µÁj�)ÐX"!ð¦ìV ½ ½pµžœ )ÐQx)Ñ!pp½x)ûÐI		pöÑPx(Ðpà°A ÀÀj(ÐAxx	C¡Cp	
+Ap p½ñµ„°˜ð*ÿ˜?ðÿ&�™°@!É@Äj,{Ð`x!x%C€Õ!{ ¹BÝ !‘#"˜Z32–ÿ÷¦ÿ(Ð%`x!xC€Õ$!	] ¹BÚ  !‘#"˜[3$2–ÿ÷Œÿ(Ð  C`x!xCÀÐ¡yš IB‘BÝ !‘#˜X3¢–ÿ÷qÿ(Ð C`x!xCÀÕ¡š IB‘BÚ !‘#"5B^ið†»í='˜Y32–ÿ÷Uÿ(Ð C-
Ð.Ñ™ @Š)C‚!˜Éð™ùv66.ÒtçŒÃp!çñµa ÀC„°'��˜¹	 À	Ìj,~Ðax"x!C‰@öÐBÐ˜b0Ñ˜ðœþ�ÿ A0BÐ˜b0Ñ˜ðVþ�%0Õ0!
+]™ ŠBÝ €!‘#"˜^302—ÿ÷ïþ(Ð€%°Õ<!	]š ‘BÚ !I‘#"˜_3<2—ÿ÷×þ(Ð @CpÕ*!	]š IB‘BÝ @!‘#"˜\3*2—ÿ÷½þ(Ð@ CðÕ6!	]š IB‘BÚ ÿ&v#]3"62—–àà˜ÿ÷¡þ(Ð5C-
Ð/Ñ˜!I@Š)C‚!˜Éðæø??/ÒZçtæóµ$&�° !@É@Àj(KÐAxx	CIEÕ™	i)Ñ`13
+Np‹pÀ|
+!(Ðp4à`1ŠxKxCðYCìˆ|ô?zR
+Jp‹px+%Ð‡|ºB"Ó[
+pÑ2
+NpŠpÂ|*Ð
+pàAxx	C"‘Cp	
+Ap,
+Ñ @(Š"C‚Q(ð†ød$$,¦Óþ½§IÈh@È`pG¤H"Áh)ÑAxIApàBpÂ`pGøµ À0Äj,5Ð`x!xC@/Õ0ðaý@4áx¢x	”OC%ˆB$Üxˆ@	y€`y"yCˆBØyxˆBÙ8‰(Ñ}€÷÷íü}p÷÷ïü @0=�Š"’C‚Q0ð1øø½}€=�ø½"Ò€µÄj,Ð`x"xC@ÕH}!ðòì@4áy¢yCsI"˜BØˆˆ@ˆ€cz$z#CƒBØ �Š€½
+�ûçðµ´ ÀC„°��˜!É@Äj,BÐ`x!xC@'(:Ú!ðüëš+‹A�Òš˜1€©Aàš˜™€š©A€qA 
J0!ð0ê+2»AÓLNðˆ@- N0õ€!ð"ê¨B
Ø÷€˜!I@Š"’\ÏèŠˆ�ÇC‚˜Qð±ÿ	°ð½>HÇ€úçµ÷÷Tü!IaŠ"
+‚÷÷Qü ½!ÉQÉj )ÐJxxC	Õ pG!É@Àj(Ð!`0Ap�ppG µð¶ù!É@Àj(ÐAxx	C"Ò‘Cp	
+ApHxIIp½!ÉAµÉj)ÐJxxC	ÕI	xÉ
+Ð!IA
+Š#ÛC
+‚ðMÿ½!IAµ
+Š
+‚!ÉðBÿ½!ÉBÑj)ÑIÑb
+~@0@1Bu‰}�upGŒÃp8µ!hF!ðìkFx€Ñ ðþ,Ñ	$à$!ðöë !ðøë$à ðùýñç ð"ú !ð>ëd$$,óÓ8½pµ· 
€! ˜0!ðÞë!ðàë€4!}(!ðàë(!ðàëp½ µ!ðàë! ðûú!ðÞë! ðÇú!ðÜë!ðÞë½µ!ðÞë½øµ!ðÚëÿHÀiÀi(Ð:1(ð³ü BÚ:1(ð¬ü
à:1(ðuü¼/›äŒ‘ä_· BÚ:1(ðnüà ðJhˆBÛQhˆBÛø½µý÷kø½µý÷hø½µý÷føÏ"ó!(Ð(Ð( xÐ@à x@@ pý÷Qø( xÐ€€à x@@0ñç@0!Cíç€€@ p½µÿ÷Éÿ"ðû½ÌJhƒBÐ)`ÐîçpGÈJShƒBÐ)P`ÐåçpGÃH@hpGµhŠBÑÿ)	Ñ`ð9ü¼IIhˆBÐ!ÿ÷áÿ½øµ!‘izÿ$ÉÐiFð¬þ(ÑkF±Hx@@0yhz€Õ €(| BÚ$à$µ €2!(ÿ÷Æÿø½µx››p!ðë½ŸH€hpG�Iˆ`pGþµ!‘ª©ÿ÷æÿkFyz0ðeûð7û!ðë‘M/Ð’HiFð¾ü(Ñèh@è`˜€Ô 	ð4þ˜ÀÔ	ðOþ!ðìê iFð¨ükF¬`yz1ü÷tÿÿ÷[ÿð¨ü!ðÞê,ÑkFyz0ðbûþ½pµwH„hü÷ÑÊ2ÿàŽeá
+‚ÿ#")ÿ÷«ÿp½µ!ðÈê½µü÷sÿ½pµ6mH"1 ðàïÑjH"1 ðÚï
+Ð  s ea � t! ðÒï°  � p½óµÿ!-1�°ÿ÷Úÿ(Ð° '% �7 !( ð¼ï¨xó!€€@˜	C· €©p1("0 ð¬ï1ÿ1"1¨ ð¦ï`i™ðù¸p þ½ÿµƒ°‰ŸEi	‘!D�t!  ðXï@H™h;y’‘™˜2!ðXê1ˆ:H':�BÑqˆ�BÑ±ˆ�BÑ"™(ðù p(y(Ñ˜&(Ð(Ð
(Ñàhy(	Ð˜ð9û(Ð§pàhy(Ñ¦p °ð½µû÷’ý(Ñ  ðï ÀC½ ½ÿµÿ!�°]1Ÿÿ÷MÿÑ@°ð½ ‰š
+#/’Ñ#· €1š ÿ÷Œÿ (p hp˜ 5(p
+hp!‰!�
+™‰ U àLh¸zñ Nˆì£Àÿÿÿ÷´ÿËç|µÔ€_gÜ�Fº™"’‘*!ÿ÷¶ÿ|½|µ™"’‘*!ÿ÷ªÿ|½ðµ
+…°%!hF!ð¼é(Ñ%,ÐÜ,Ð,Ð ,Ð",Ðà(,Ð),	Ð.,Ð/,Ð%íCà0xkFs8iFðÌù(†çµŠx£+Ñ(*ÑÈxÁ'Ñ€%Ô"à¤Ñ	!ðèè  
+  ½(Ð(Ñ 1x(
Ñ
+à+
+Ñ	;!ðÎè ½ ½pµ
+Œx2% ®“.ÑÌxåÑ Ôp½p½¢üÔˆp½­õÐ.úÑ"	
+*öÐ*ðÐ*îÐp½µ	ðkþay)Ñ@0~(Òà)Ð)Ð y(Ñ ½ ½(µ	Ð	ð–ÿ(Ð!	@y(Ð ½øµ
&'	ð…ÿ¨yÀÑ,Ð`zÀÕ ø½(ÿ÷¢ÿ("Ðð%úÑ 
+ðþÐ y(Ñ ÿ÷Ìÿ(Ð y(Ñ`y(Ðà ÿ÷©ÿ(Ð'à'({ÀÐ&àÚ°{8Ø’ïÿø y)ÿ÷Bÿ¸BÙ&"(Ð"`y)1(Ñ ð§üà #!ðÌè0ø½pµ÷÷Møáy y	ð=þà ðGÿ! ð2øây¡y 	ðòþðÑ(÷÷:øp½µ	ðÿ�l)ÐµIAh3L2 !ð¢è½pµ¯H
 !ðžè @! p�p«H© ðèî	!@‰aHbp½pµ	ðîþ 	ð§ýz�!‰iƒ›
+ 2y
Ð+Ñ%1!ðxè ðtý(zÁ yð«ýp½µ	ðËþ�!‰@"-!
+T%0!ðfè ÿ÷Íÿ½pµ	ðºþ	!‰A~ß"ï#,Ñ$@wà$d@zÀÑˆ~(Ð$à$@ãÛC,wÑ| "Cà|@t(ð-ý(ð¬ý !ð0èp½µ	ð„þ	"’!€�v ÿ÷¾ÿ½øµ	ðwþ(	ð0ý)€1ÉŠeH4 ðZî!hˆB
Ó½ €(ð�ú(Ñÿ …0A["(ðþøL ](Ù!} *÷þ¦Ô”ö&wÀ)Ñ0@hà0h `ø½(üÑx}@@÷çµ	ð?þ	!‰@~û#)Ñ!à)Ñ!àBt )Ð ÿ÷lû ðHý½Á~)Ð!)ÑB|#CêçB|@ççµ	ðþ	"’!€Áv ÿ÷Ëÿ½6I5H`7I5H`7I6H`pG6Jƒ�BÐÜ5J€
+Ð(Ñà3HÐ}"Ò€Ñà pG pG pG)ùØöç(
+Ð(
+Ð)Ð)Ñ$HpG#HÀpGHpG} @pGµÿ÷èÿ p
+`p+âpÑ
+ à+Ñ( à  p½µðNø(Ý à ,Ð,Ð,Ñ ðï½ðü½ðü½Y@KLˆ—“ä;
“¤;G“ì;n	`	Îùÿÿpµ	ðHü(	ð‡ýÿ1ÿ1‰‰‹4 )Ñ!o)Ñ p½øµ	ðtý0	ð-ü40ÿ÷Üÿ(Ð`4 ‰(Ð @(ˆ8BÐ ø½ ø½÷µ‚°˜	ðUýÏõn¼Ð–ï˜Ê�!‰Fö÷iþ˜(
+Ð,Ñ˜!ÿ÷Ìÿ(Ð$à$2À2’ 5«x™˜" ðâî8ö÷Rþ°ð½ðµ‡°ö÷Fþ,�cÐ ÿ÷‹ý(^Ð– [ùH ðí& 	ð×ûÀh1(HÐ@`+Ñ@1{(ÙÎ�!ÿ1"1 ðoú8à(ÑÊ‰!ÿ11 ð=øçO
+!8hªù÷cý ðæùkF}8hªù÷Zý`z@Ô 
+ðíùà¨BÑ}(
ÑkF�Y{1CYs��™ 5#û÷ùàÿ …0[" ÿ÷qÿây¡y 	ð™ü§Ñ˜ö÷áý°ð½pµœ°‰Fi
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+ð¤ü ðÖí	ðdú– [›’213L2h10ÿ÷…ÿ 	ð´ú(Ðö÷$ýþç y(Ñ 	ð{ú(Ðö÷ýþçµ €"ÿ! ÿ÷ú	ð4ú(Ð ð¬í! 
+ðpü	à ð;û! 
+ð:ü\I b ðdíþ½þµ �ö÷òü� 	ðÔûÿ &~0!	UhqPHˆ(ÐðQúð¹ø ðcø/Ð ð®øà8ðªø8
+ðºøây¡y 	ð�ûòÑ"BI˜2 #–ÿ÷Uû˜ö÷Áü @,à ù÷üàx(ùÑ˜þ½pµ$ÿ÷öû(Ñ4"!(ÿ÷«ÿ(Ñ!(ÿ÷ÿà(Ñ$ p½þçµ ð:í½þµ	ðuû(	ð.ú 0!� ð.í˜! ð,í8z¬'ƒH]"� €› /5ŒžÈš1$*PÐ'+Ð+Ñ)IÑ#
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+ðÔù(Ñ$à$ 
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+ðõù(Ð(ÿ÷ºþ(
+Ñ()y˜0)�Ñ(	ðwø(Ð 
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+ÿ ð’ë! 
+ð‘ú ðÄëñHAj"CAbkFYz"(ÿ÷/ø(ð¼þ(ð­û(Ð# ]Ô€Õ(ðiú!(ð×þ# ]1Àô1 ð¼ë
+ð/øÝIh "C`(ðþ(Ðyz¸h"àõàkFYz˜" ð\ê ðbê 0!� ð ë*W2’	"˜
+‘ ðšë
+š™( ð˜ë(€0	�ÂŠ’";L2!3h1 ’ÿ÷ý @ �z(ÑN ]€Õ `0Áz"CÁr:z‰‰’’Cà `0Ázû"@‰‰ÁrðÅÿ'¤ GU(	ðø(Ðþç	˜°!@k�!(ðwþ	˜°!Àk�!(ðoþ(ÿ÷˜ú(ÿ÷Üú(ÿ÷Gû™ 
+ðTù¿ÍëÌÀžÜDç	˜}(t0 ð²ê ð¦ø`h�(Ðÿ õ0[}!À ð8éšd#ZC€@ ð0éÿ!Q1ˆQàÿ Q0‡Q h�(Ðÿ õ0[}!À ðéšd#ZC€@ ðéÿ6A6ð`àÿ6A6÷` j(Ð
+ðvø(Ñ
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+ðŽù ðŒêÿ"‘2.#©¨ý÷
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+2© ðÜê j(Ñš 
+2,0© ðÖêš™(ý÷¨ý&0µæµ‰	 4"x@i*Ð*Ð*Ñ(Ðy*Ñ"ðrù½
+!ðbý½bx*Ð	*ùÑ(÷Ðy*ôÑ	"ëç
+!ð›ü½þµ	ð©ø8ðbÿ� €, @(z(Ð(@0�€{€Õö÷®ù.�Ñ k(	Ñ 4 {(Ñ z€Õ y(Ð˜ö÷ ùþ½.Ñ8	ð{ø�!‰Dÿ0ÿ0€�‰@ŠAC&HHC–!É[‰ ðZè@ c˜ö÷…ù`5èz@À°BÞÐ˜Œ‹Ô²¼ ÔÑµ:€{€ÚÕùy¸yðgÿðÿèzû"@òRC.èrÑ	z€€‰‰Cà€€èr8ð@ÿà`zÀÕ ðrÿ ðzÿây¡y 	ðø,îÑþ½¤ë¨€§€@Bµx(Ð@p
+ÑÐxß!@Ðp ÿ÷øø! ÿ÷`ÿ½ÿµ™°"�˜	ðø�!‰D>810	jFðåýêx™“˜Û)Ñ$!	])Ñà‰xÉÑ(ÐyÀÕ  C�À˜BêpÐ˜ÿ÷Âø˜øK�$˜XCðÄï#™@ 4p y(Ð˜!ÿ÷ÿ°ð½>µ‰Ei(ðÁÿ� €‰l)Ð".1%0kFÃ– C[`x!x
+C! 1(ÿ÷œÿ>½pµð¤ÿ�!‰Dö÷¹ø!k)ÐI!cÑ!0ÿ÷æþ(ö÷°øp½µð�ÿ�!‰@ 0Á{IIÁs½øµ&0–	ðåü! ](Ð”!J]�B?Ñ) t1"0ð¨ú(7Ñ&/
+ÐxzÀÔ¨y¹yˆBY¤Ž¸¢ 9‡ÑèyùyˆBÑ �	à(ðVÿ!I@@z€Õ&) ˜10"
ð‚ú(Ð®H"9ð{ú(Ð&à"¡(ðrú(Ñ �ðÍù(	Ð˜(Ñ.Ñ 
+ðHøðPú0ø½pµ �04@! ð˜í€5(k(Ði a(k@i`a(kÀx`€p½óµƒ° �0ðÿ7€7�ük"fa`{@@`søk™°5¶0ð¨íéx— @épùk0ÿ÷Çÿ˜!IEèx!Cèp þ÷Aþ(Ñ�°ð½èx@@èp˜÷çøµ%‰D0y(
Ð(	Ñpy(Ð(Ñ!0ð¿ø%(ø½0ðºþ�!‰A 1È{(òÑ!0ÿ÷*ÿ(ìÑ!10ÿ÷�ÿåÑÿ7 xÿ7¿	 yj�@BÛÐå"!0ö÷PúÕçpµ	ð4ýà`y(Ñ*! þ÷Nþ1 	ð<ýñÑp½øµð{þL68ð0þ8ð.ýEJ¬#QyArÙUzyÏ#@‰’‰’Cö¡á´¤9ÁÕ÷r©l)
Ñ±x‰
+Õáx‰‰IápBz18 ðHè ø½0µ“°ðJþH!hFðÄìkFxó @p «w+H’€y’Ã@ÿ0a0E|kF]p|ÿ1€€Cp q1���ˆyIyC€�J iF ðè°0½øµ
Hi�‰D˜ðþà|d#XCÿ!ðøí$!	]
+#YCN@1h�BÙ0``|pq |0q(ðjì°y€7@°q9zˆB˜Òÿ÷œÿà@BÈòx¸K¥ÿ÷`ÿ˜%"!þ÷¢ý ø½µðÔý�!‰#¬"AU"À1
+tˆ!	\)Ñ%"! þ÷Šý½íJ)Ñÿ0a0A|Qqy|‰€‰€C qÿ÷0ÿæç ÀC`Sq “qÿ÷Wÿ½µð¡ý�!‰@!À0t" þ÷_ý½øµðOü0ðŽýpz4À'Õõ÷¡þ o(Ð `0€‰(Ð@ˆ�Ñ @(ˆÀ
Ð ðšùÿ%…5©[(Ñ"à"0ÿ÷»¸ °¦Í)kJ	ø8õ÷€þø½øµ%@zÀ)Õ0ðü70ðRý`7¸‰(Ñ%õ÷dþ³I�	[ )Ó-¸�Ñ @ ˆÀÐÿ …0�["0þ÷Øÿ˜õ÷Oþø½µðéû4õ÷Bþ!!g`4¡�õ÷Aþ½‰x
+’*Ñ	+Ð+Ð*Ñ		
+)Ð°çpG‰x
+“+Ñ	+Ð+Ð’Ñ		)ÐŸçpGpµð¸û ðøüÿ0ÿ0€À‹(Ðõ÷
+þ þ÷]ÿ(Ð ÿ÷Qÿ(õ÷þây¡y ð±üêÑp½pµðØü� €. ð±ý# @]Ô€Õø @Y(ÐÀ6ðjðBì @(z(Ð (@kð6ì ðqû*!	\)Ð)Ð)Ð)Ñ@kð&ìây¡y ðtüèÑ @({(Ð	 €(€jðìðÑúðÛú„BÑUHˆ(Ððûðîð:îðmú ðÐû! 	ðÏüMI b! 	ðöüðôíp½|µðlüð¨úðn€¥¬¨
+0i²ú†B!Ñðâí! 	ðáüðîð-ú ð©ûð<î! 	ð¦üð
+î! 	ðÎüðÌí3Hˆ(Ð(ðØú(ð:ý(©ÿ÷jùkFYy˜"ðÄìðÊì# ]Ô€Õ(ðÜý(Ð(ðjü @ z(	ÐÍ "€#’JH)ð˜ì(ðÏúª @[(	ÑM À"#’JH)ð†ì 6°z(Ð(Ñÿ a0Yà(Ð(Ñÿ e0Y)Ð(ð;úêy©y(ðºûÐÑ|½x¸¤ëÀ €‡“]e ¡1ì�h)Ñi!	\ÉC	Ñ@m(Ð pG pGpµ%Hx
+xúLC(ÑÈx(Ù `pÈpà`pˆx p`x(Ø à¡x)Ð@ð¨íàpà`xÈp xˆp(p½"!€�`Á`aAapGæHµð–íãH8ð”í½AiIhà�BÑi(ÐÊhÂ`àJiÈhP`Èh(Ð	iaàiIiˆ`àÉh)çÑ pGµ
Ð`ihIVz59¨ªþØ×ª` h!õ÷òû ÿ÷Õÿ ÿ÷Çÿ½µðZû�!‰DÀ4àÿ÷äÿài(úÑ½µð	ú0!Ae�eÁe!d0ðÂé½µðûù0!u�`Á`a ÿ÷æÿ½µHpµ8ð:í²Hð8í²N$% `C�5P­HM`8ð(íd,óÓ p½µðÕùàÿ÷¥ÿ`n(úÑ½óµ�°
˜ðÇù˜ðû4õ÷ü-�!Ð`}%(Ð—Neu°x@	±pÐpx(Øõpà@ðêìðp }(	Ñ 8%u�hI�`àÿ÷nÿàh(úÑ˜ÿ÷¼ÿ˜"ÿ0�0�ˆ˜þ÷tý˜õ÷ëûþ½>µð„ù0Bm�hkF‰ÿ"•2€"Z€`0€z˜rÙr!ÿ1"1¨ðjéU! #jFü÷;ÿ>½pµðdù(ð£ú4am h@iIÉxI�BÓ`4 z(Ñ  r(ÿ÷Äÿp½÷µ„°
Nh˜ðDù0$.”�fÐ°h�‰(h<n@(` yÀ	Ñ˜!þ÷ùü(Ð �(hà˜Ø2>8¤¬ç 	Ú(Ñ˜(Ð˜`0€z(Ðàx !Cààxß!@àpl À](Ñ x€˜ÑðÂûàðåû(h( Ñ"à˜ÿ÷–ÿ x€Ñ˜ðíûà™˜:ø÷¢ü˜ÿ÷[þ(Ñ˜ÿ0�0�ˆ"˜þ÷Ëü,Ñ˜!õ÷®ú0ÿ÷‘þ0ÿ÷ƒþ °ð½pµà"!(ÿ÷€ÿ h(÷Ñp½óµ$…°˜'”ðü�˜ðýùÃ!‰E.�<Ð˜ð÷ûðŽü(Ð 	ðû™ˆB
Ñ ˆ(
+Ñ˜À0~(Ñù÷.ÿ(Ð à (Ð`hÀÐ˜	!‰@@i(
+Ð'àìµhÖÜÔ �˜ 0@{ðïú �.à ðÒéùçhh€h‰@`0™.sÐ)h)Ð,Ñ™)Ð!As(h"(Ø/Ð,Ù"à(h"(Ø"˜)ÿ÷ÿ(Ñ.Ðd(h(Ð.ÏÐ,ÍÑ/	Ð,Ð˜€0Àk˜	ð
+þ]çøµ
ð/ø8ðnù9*á> ®È·g4õ÷„ú#-�Ñ 0�h)ÐI�`#u€h(Ñ!8ÿ÷Lÿ8ð}þ!T18ÿ÷7ÿ!18ÿ÷2ÿà-Ñ`}'(ÑýH�xI		�pguBx*ØÃpàPð2ëõIÈp 0'u�hI�`%u˜õ÷Eúø½øµ$‰E(n€x€=ÑêOëH9ˆ"#ðýÑ9ˆæH"#ðøüÑáHAhIA`(n�yÉ
Ñ€x	(	Ñ0ð¸ÿ€6q}0`!@0s ø½  s'faæt")0'�ðè°  � 0f)n
+ˆ 2ð–ï'� ø½)ÑAiJh*ÑH`Aiˆ`pG‰hÊh*ÐaàJi�`aÊhÂ`È`pG *Ð*Ð*Ð*ÑŠBÓàŠBÐ)Ñ pGpµ@i%Dh,Ð h‰@à%äh h‰@,	Ðx@@ð²è1ÿ÷Óÿ(îÐ(p½µ È@kFx@Ð ½pµ$õ÷ ù¡Hð’ê(ÐžH0ð‚ê(õ÷–ù p½ðµ
…°ÿ÷åÿã[œ°mÓ×Ñ °ð½õ÷‚ù� �à`¥` a(‰F0n€yÀ
+Ð8ðYøÃ!‰@`a #�.à8ðÿÿ …0À[�0x5@@ðZè„F €8€i(Ñ.`6pzaF�ÿ÷¢ÿ(
ÐT5 aFeaÿ÷|ÿ�pz#ÀCÐ#à#5ea™ ÿ÷Cÿ`ihI+`Ñ™"8þ÷¸ú˜õ÷/ù ¡çµðÈþ0�h@m_IÉxˆBÓ ½ ½pµðµþ(ðôÿ4(ÿ÷âÿ(ÑSHx(Ñ0ðü(
+Ð`4 z(Ñ  r(ÿ÷ý p½ p½óµƒ°7‰%� �˜‘ðˆþ˜ðÇÿa!4É@™¤Fn¡x
+“Ñ		)Ñ �và¡yÉÐh(öÐàxÀ	óÑ�	Ñ˜1ÿ÷‚þÐ x€Ð!0ðÂû(Ñ˜1ÿ÷"ÿ(UÐ%Uà`F}(ÕÑ˜"ÿ0¡0ðÄú(ÌÑ x‰Ñ	(Ñ˜ÿ÷lü˜1ÿ÷{ÿ(àÐ x€	Ñ˜êÊü‡˜²™;®j1ÿ÷IþÖÐ x€Ð!0ð‰û(ÐI0iˆBÈÑ0ð{û(ÃÑ˜1ÿ÷àþ(Ð%ðíù(Ð 	ðmøðuú
+àìµb¹L\Ö¾BÐ/
Ð x€Ð˜!`0{ù÷Gù!8ô÷»ÿ-Ð.Ð¾BÐ!0ô÷±ÿ˜´æ(µÐðÙý(Ð0}(Ð ½pµðÍýõ÷'ø`i(Ð!"10ÿ÷uüà"0	ðIý(õ÷ø p½óµ…° $�˜”ð¬ý5`6õ÷ø�(`0�Ày@�Ð1h€@ˆBÓ™‰y@-]Ðph€h‰@`0{à0hóçph(Ð€hd‰$@2!`0As{$¸BÐ!‘˜"1ÿ÷'üm---ãØph€h‰@™)"Ñ`1
+{ºBÑnd’x$$’Ñ!‘x@@�	à1"Jsx1#Cpˆ„˜"1ÿ÷øû˜Dq˜Ày@€Ð˜™€yˆq˜(Ñ1hš˜	ðL”Ü”´€Ãp¾ü˜ô÷ŽÿTäóµ�°
˜ð%ý8 @]4Fv0ðvî™)*Ð™"’‰‰i)#Ð"`2y)Ð nÿ÷¸ý(Ð }(Ñ(@0ðíÁxÉ
Õ€x‰)Ñ	Õ 8q˜1ÿ÷9ÿþ½øµ
ðèü. Ð,Ðô÷>ÿm @]41(Ð2(Ñ`4 y(
Ñ`y(Ð@`qÑ(xAI0ÿ÷ÿ8ô÷&ÿø½ `4 q`q qõçûHpGy(Ð(ÑùHpGøH8pG pG|µ ð�ü"h4À4*-Ð	Ü’3Ð*1Ñ110ðîï+à *)Ð!*'Ñà~(Ð("Ñ A(!wÒ-ÐhzÀÕ	ðÜû"!’‘á~)Ð!(#ù÷ ùà `wàØH"h@!÷÷ñþ |½pµh!"1€2"+HÐÜ›Ð+Ð+4Ð+Ñ ð;ü(Ð!Iðþùà#+,Ð$+Ð%+Ð&+ÑÂH"ðšï p½ø÷iø ð“û ð“û¼H%`�·‡�¶t+Î§(ù÷|úÀ4`(Ð ð¿øew ðãúãç oðþü!1à‘c!d1 ðnïÖç‘c!X1÷çµoÿ÷SÿðÎí¨I`! À1aˆv ð˜ø½øµ�Mÿ÷Bÿô÷Vþ,À4 i(Ðð´ì  að°í™J+Ñ`�`"’—H²iÐ3)ð¨í  v8ô÷>þø½ðµÀ0‡°�o€6�ÿ÷ÿðŽí�2lsl‹AÒ2l˜sl9€™Aà0lqlšÀCÉC€yA�(iš'3»AÒ(iš9€"±A’#wHÔ3!ðfí™ v°ð½˜Gav(ˆ(÷Ñ˜ÿ÷’ÿóçþµeNÿ÷Óþ7€78k(&Ð ˆ5À5(Ñ(i(Ðð@ì!)aô÷Öý�ð8íyd8dhi(Ñ"3’[H"iÔ31ð.í (v˜ô÷Åý ð÷ÿþ½pµt0ð(ë è0ð$ëÀ4 iðì%%a`iðìeap½óµ‡°o�ÿ÷Šþ� ð(û˜!h @0(1&%�40À6„,é€Œ¸³2Ìú€5	+‘jÐ	Ü›ð^í+<ÿÿZ—£‚…Îÿ!1"+nÐ!Ü
++lÐ+kÐ+jÐ+iÑpiðØë'wa7v0iðÒë7aèj(Ñ!h˜�BÑ™ ðZî (c 	°ð½#+qÐ$+Ð%+Ð&+ÜÑH"ðLîîç ðKú ðEúH'`p(Ð ðxÿ pwIÿ ñ0/bHc˜ÿ÷Fÿ¦à ð*îÐçû÷âøû÷žû ÿ÷lÿ˜ð¦û!1îçRàÈ
+$¾0
+œ¸ð¤ÀÑ¶?·¦€;àOà_à*àà hbzà pv¥ç /pv
Ð· ›€9"ðÿ(ÑúIh@`˜ˆ(aÑ0~(^Ñ˜ÿ÷‹þZàà (b ðLýSà ðhú(ŒÐ!Ið+øwç©c!d1žç©c!X1šç!ébð<ê¨j(–Ñ!h˜�B’Ñ0j(�Ñ!41‰ç!)céj)Ñ™	h)Ñð$ê (b ðùà/ÐxzÀÕ˜ÿ÷¶þ	ðŸù"!’8‘ø÷çþ è0ðê"ût
+ÖˆºGÚrGd!(ðê(ðê™Vç˜*çóµ…°˜ÿ÷lý�˜ðeûÿ!�˜-1ý÷%úSÐ(‰t!F ,(� ðÔé˜ðÅþ pàh¡x@	@C!Cà` &f' ` `7xs˜·!‰A‘‘ªK"!0ðhëðx!Cðp˜0q
+pq˜ˆ(	Ñ 8s˜!ðAý(ð¹üà˜€j(Ððçø(Ð ð.ë8s(ð�ý(Ñ!(ô÷—û'æðµ ‹°� ¼0� ð ù(pÐAzÿ4Éd)jÚ€0	�ÀŠ)€�¢iãiÆ¸™AÓ¢iãi)¿™A
à iáiÀ©AÇCÍC jajÀiA‘�š3)8ð®ê	™I}‘ð¸ê jD,Ü˜š™˜3ðœêšá3 ð¸ë@¹A}%�š˜-1ðªëš'9¨¡AÒšp>#»AÒš#Pš³Ah³A	Ò™WJ
`UI	h‰�BØ �˜°ð½ðµ´‚°#o�€0ÀŠ™Å¶…U„¼^"¬7„˜"ðVêKIMk¦<ú5€4®BÙàk@†BÒpàcàkš›€š!YAÂ k(8ÐàkAŽB6Ó<À4a~)1Ñ8I8J	h‰ˆB+Ó˜ðLü(&Ñ ~(#Ñ i( Ñ	ðù(Ñ	ðù(Ñ.H"hF!ð è(Ñû÷zû(Ñ›š8ÿ÷"ÿ(Ñø÷uÿ(Ð Aå ?åóµ�°o�ðú�˜ÿ÷ü� ð¶ø˜1h41‘1‘41
+‘t154À5€4(	‘wÐ"Ü€uÐ(-Ð(rÐ(qÑ'obè(jÑ
+˜ðzè`j(Ñ'b™«àœ¸>³0é/¦€ôµ(~Ð(}Ð(ÝÑ
+˜ð^è`j(äÑ  báçðJê� ‘�� b dàd(bhb¨w ø÷Æþ˜ÀhàcðTü(ÊÐ˜y(ÆÑª’›š0ÿ÷%ÿ(½Ð/"ÐxzÀÕÿHh(Ðð´ÿ"!’‘!8#ø÷ûü	˜ðè	˜"d!ðè	˜ðèàaàKàRà–à (b`j(Ñ 
w™€¾ªÊŠ`b!àb0oIðäý
+˜ðþï}!
+˜"	ðüï
+˜ðþï k(Ñ˜ˆ(Ð˜@hÀÐÞIàkˆBØàVàà™	"’‰Ii)Ð0o	ÿ÷Þýà  bàj(VÑ j(SÑ(j(PÑ
+˜ðÈïà0ðLëHà  bàj(CÑ(jà	˜ðºï (bÄH!`3à(6Ñ™çç¨(1Òhj(.Ñè(+Ñø÷hþ('Ð/%ÐxzÀ"Õð'ÿ"!’‘!8#ø÷nü¨@¨wà' ïwð¢ÿ(Ðyðfý/b	˜ð€ïàj(Ñ jÆç °ð½˜ûçðµ
£Io	h‡°ÿ1Z1		‘ÿ÷ßúðZé!‘‘�(h€XÐ4€4(VÑál l#Y@X@C%Ð¢l˜ãl9€™AÓ¢l˜ãl€9™A
�àš lál€ÀC¹AÍC�àkš!+‹AÒàkš€©Aà àcú÷nýð¸êð8û(Ð k(Ñª’š;0ÿ÷
+þ(
+Ð"’}"ãk™Ò¨ú÷¢þ(Ñðˆé l·Áâ|ÀO�O�1 c@10ðŒê må(kåóµƒ°o�ÿ÷qú ðÿ˜,hÀ4(^Ð
+Ü€XÐ(Ð(ZÑ(è0ðäîOà(*Ð("Ð(OÑ à ø÷Vý(ðÎù÷÷2û`%(Ð ð”ûeweb¥w8ˆ(Ñ ~(Ñ˜ÿ÷ñú ÷÷®ú(à)(1(ð>ê"à (Ò`j(Ñà(Ñø÷ný(Ð.ÐpzÀÕ˜ÿ÷Aûð*þ"!’0‘ø÷rû @ w °ð½ `bùç˜øçµ
+ho’Ð*Ð€4*Ð*Ñ0à à0 cð„ÿà ðþ ½½óµ…° �ðþ˜:h´2><!€6À4$(’rÐÜ€Ð(Ð"(XÐ#(hÑà%(WÐ&(UÐ((÷Ñà~(4Ñ B("w!Ùáv‹à8ÿ÷û àv w÷÷˜ú-pc|ÐhzÀ}Õàœ¸ð0éø÷«ü(qÑ ø÷ ü àvà-oÐhzÀlÕð£ý"!’‘!à(aÑ BU)ÅLxÂ»uñ0("wÈØ-ZÐhzÀWÕðŽý"!’‘(#ø÷ÖúKàà~(´ÐGà ðâü%(åvø÷kü˜÷÷vúew+àà/à±k80�BÑà~(Ñ ø÷Yü�I `�I` w -àvÐhzÀÕðWý"!’‘!(ø÷žú˜÷÷Kú ð¬ü±k8ð@é	àà˜�à~H"h@!÷÷dø˜äøµ �h.,'€6À4$( ÐÜ€Ð("Ñ(ÿ÷iú ø÷ü'wnH"h@!÷÷Dø˜ø½%(Ð&(Ñ çvø÷üú÷Äûú÷€þgw±k(ðéëççv÷ç‘ççóµÀ4 i&(�°Ðð^î&a`i(ÐðXîfaÿ!11(ðRí(ðgø)1(ðèè!(€0bAbLI`‡cLIævÁc˜(gþ½!€A`HIÁ`�`GIa}!	�aAapGEHµÿ÷ïÿCH0ÿ÷ëÿ½µÿ÷ôÿ@H!ÿ÷µÿ} "�<H’’;Jt0#;¡ðíd "�5H’’:JH8#:¡ðí½÷‚õtÄ¢�/@’x 	*Ñ"
+ppGµ ú÷óú €0j)Ñ!b!Ab o	ð×ú½pµ.J!ð„è ,J!0ð~è 0)J!ðxè L0'J!ðpè %J)(0ðjè #J)40ðdè !J)@0ð^è J1X0ðXè J1d0ðRèp½˜¸œ¸$¾hB@
ø	ÈËëSleepConfirmTmr«èAP_NullPktDoneTmr™µ#¶_¸}Á;½§¿‘À¹Á=Ã8µÿH
@kðpíýI"41’"(ðjî8½µ÷L`kð`í `c½ôI µaòHI!hð@ì½pµïMhˆ(Ð ðeÿhˆ!|1(€&à ÿ0A0†kú÷Žúú÷JýãI Èa fð!Sð4îâù2Qee ð)ûðˆù ðÐï!"	0ðÿhˆ!X1(€ ð®ïp½ µðêø½µø÷áú(Ð ð`ü(Ñð\ü(Ñù÷úÞånpÆVe‘ý(
ÑÇH"hF!ðèë(Ñð¿ù(Ñ ½ ½ÀHµ 8@Š(Ð¾H»I@kIiˆB#Ñ»H€0€i(Ñ·L" h!ðÈë(Ñ h"F!ðÀë(Ñù÷×ù(Ñð ü(Ñðü(Ñð‹ù(Ð (Ñø÷�ú(Ñ ½ ½øµ%,ŸN¢O°‰¢I@7ˆBÒym8ma@CÐð¦í:m{m€™A}'ÿ#:ðüì¶‰#:ðøì€¡AÓ%(ø½0µ‡°©¨ð(ù"!hFð2ï	Ð¬BÒ ð{ú˜™‘�à ðsú,kF˜‰ ð ï(Ð ðhú °0½"’kF™‰}"Ò#¨ú÷ýúòç|µsM
+hªfÿ2A2h–ktI 4!+=ÐÜ++ÐÜ›WÐ+Ð+SÑià +#Ð+LÑ pJà";ðªí
+H%H41ðÄî=àh@`üçHh@H`üçˆh@ˆ`üç@aüçHi@Haüçàp ðúèj@èb"à¨j@¨b x(Ð(Ñ`xA(apÒðþó~¸lÈ‘|“ �ú"!’‘!x)Ð!0#÷÷áÿàGH"h@!ö÷µý |½pµÿ4A4
+h%£k& 5*ÐÜ’Ð*Ñ à*Ð'*Ñ.qà40àX0.qàaðëûà ðjú p½p½pµÿ0A0…kú÷ùú÷Ìûø÷Mù(Ñ!(ð¿ý ÿ0%0ð¼ê"d! ð¼ê ð¼êp½ðµ4ÿ4 A4…°� k�h7%47 5$(=ÐÜ€Ð(`Ñ hpH"h@!ö÷Mý˜°ð½%(Ð&(QÑ0ÿ0%0ðŠêài¸BÐ"!˜	à€¸ôµ°éð
+ÿÿpë$¾ð`ýça'8/pø÷éøú÷¬øú÷hû¯p"àài¸BÑ0ÿ÷‹ÿàø÷àø(Ñhp (pø÷ÓøðÞù"!’‘˜!#÷÷%ÿÙ €](Ð	 ð
+ÿái0ðÆí¦ç‘¤çðµ5ÿ5A5 …°�¨k�h/,"(7 4$(~ÐÜ€Ð(Ð"(RÐ#(vÑ	à%(XÐ&(VÐ((÷ÑøHAjIAb^6cNhÊe”- x(-Ñ`xA(apÙ"p‡à  p`pö÷gþ¨b˜@zÀ}Õ˜@y(Ð(wÑø÷}ø(sÑ ø÷røæIÈi‰iCkÐ  pðvù"!’‘!à(dÑ`xA(apÙ"pLàðdù"!’‘˜#÷÷¬þQà x(¾Ð(LÑ:àéi0ðLíFà0ÿ0%0ð¾é ð¬øðÿ040èa  pø÷1øù÷ôÿú÷°ú8ö÷8þ àà"à pÜç¿I ˆaÈa x(Ñ ø÷øø÷]ø(Ñðœý(Ý `p  p³ç
+à8ö÷þ ðxøð×þ»ç‘à®H"h@!ö÷4ü˜åæµ©L4ðTý(Ð¨Hˆ(Ð xÑ¢Hy(Ñ ½ ½µžL4ð£ø(Ð xÑ™Hy(Ð™Hˆ(Ð ½ ½þµ&ÿ6A6%±kà5*‘hD2)’~Ð3Üâù2`7)’DÐ&Ü‰?Ð)>Ñö÷�ý ð¹ø!)‚˜eAe÷÷£ÿ À4pc ~(Ð  vø÷	þ¸x(Ð QÁü±dÌ|lómðÝý ¸p ð¬ìà)ZÐ
)Ñià"42")mÐ	Ü)VÐ)
Ñ!˜IðÞþà#)\Ð')ÑiHAˆ€ þ½˜ðþùÿ÷ˆÿ(Ñÿ÷nÿ(Ð ðü ð|ì!|1'à[N ða ðÈÿ ðpì (‚ðÄêšQee0x(Ñ˜!ðÃû˜ðÄè"˜d!ààðÀè˜ðÂè0x!X18t ð:ì½ç˜ð¾ù¹ç (‚˜@zÀÕ(Š(Ñ˜!ð�û«ç˜ðœèéç!(1òaáç!1òaÝçøµÿ0A0%€kÿ5a5�h&/46<?(?ÐÜ€hÐ(jÑ ðø ðø¨x(Ð ð;ý ¨p ð^ÿRà(Ð'(TÑ (qKàù÷§þú÷cù ÷÷Ýþ8ð\è ø0ðXèI cÿ÷áû˜ð_ù!˜"	ð9û!˜Ið'þ%àù÷…þú÷Aù÷÷Âþ(Ð
+HÀi(Ñ˜!ð0û8ð0è"d!8ð0è8ð0è	àà€¸$¾°é˜ð-ù1 ð¢ë ’©õ[`Îˆ„MÐø½ ð¤ÿùçø½þµ%ÿ5A5©k‘h&þOX6)gÐ$Ü)EÐÜ‰aÐ)`Ñ% ýaÿ0}aa0½a|(Ñ ÷÷lþù÷/þÚ Søx(Ð ðÔþ%à)DÐ)CÑAà)?ÐÜ)<Ð);Ñ9à")9Ð#)6Ñ!(1îa9àÿ÷.ü(-ÑàH"n)@i@C%Ñ ð¯þðý1&àÙH�€ÿ(Ð×Hªhö÷‘ù™ÿ ˆw˜!ðÒü(Ð hcè ](ãÐ(áÑøn@øf þ½8o!@8g1îa ðëóçµÁL4ðiû(Ð xÑ½Hy(Ñ¼H€0ˆ(Ñ¼H|(Ñ÷÷ÿý(Ñ ½ ½µ÷÷úû(Ñð^é¯J€2Qaa½µ«Hy(
+Ñðèþ"!’ ‘÷÷0ü½µ£L4ð‘þ(Ð xÑžHy(Ð�H€0ˆ(ÑžH|(Ñ÷÷Âý(Ñ ½ ½µðký(ÐðÞû½ðµ*ÿ2A2‘k�K‡°‘h€3“+d3“|3b-ä×\ÐöŸê`“D3,…O 6À4)“pÐGÜ)nÐ(Ü‰lÐ)kÐ)jÐ
)iÑ�M(z(7Ñàj(sÐú÷Ðý(Ðèh(÷Ð0|(jÑ÷÷vý(eÑÿ÷›ÿ(~Ð`j¹iˆBÑ˜ÿ÷€ÿ,á
)uÐ)tÐ)Ð)@Ñ÷÷�ý(Ð˜!ðÐù˜ðÐî˜"d!ðÐî˜ðÐîâá)~Ð*Ü)Ð[J)RixÐ)wÐ)Ñ*ïÐú÷—ú(ëÑ`j¹iˆBçÑ`‹(äÑðÃûðü(ÞÑ÷÷*ý(~Ñøx(|ÑáÝà)á¸ààÆàyà)tÐ+X3")qÐ#)pÐ')oÑ 0q(ÿ÷,ú¤áíàÓàö÷åúðx(Ð ðpý ðp°x(Ð ð@û °p0y(Ð 0q(ÿ÷úà°àáá˜ˆ(œÑ ù÷Tü%¥ƒ%beb ½qøp(H€0…`Å`aEa*H…p*H`*H€*H`˜'z(Ð"àÉàáá%H!hðî(
+Ð˜!r˜"	ð$ù ÷÷°üÿ÷üþ(Ð	'˜û÷Žø(Ð!Éà#á÷à›à5á0á:á˜ð³4èèXÒwTÝþûHh)Ñ`H"h!ö÷Èø0|(Ñ÷÷Šüà€¸0é˜ ¾�äé¬¹X¹´¹ôµ°¹$¾8ö÷áù`‹(Ðð6û ~(Ð%vø÷Óúþàðùú÷÷dü(øÑyi¸iCôÐðÌïûJQeeîà˜z(êÑ˜$!r˜"	ð¶ø ö÷µùòH`Ûàð
+û ö÷­ùÕà˜!ÿ÷Fþ øpà¸i(Ñ�˜iFðÕú(Ñ˜!ð¢ø˜ð¢í˜"d!ð¢í˜ð¢íà ‹!C ƒ ö÷„ùxi b¸i`bàj(ÐðÕú£àð÷ú à™ r!˜	ðlø–à˜ðxíËH!@0Ábà÷÷öû(ÑøpÈHz(…Ñ ö÷Yùxi b¸i`bðÖú(zÑÿ÷=ù(vÐ™qà˜ðVíðHïêù2zç÷÷Ôû(hÐ¸HÀh(Ð ö÷8ù ‹!C ƒ˜ð@íYà¸i(VÐ*TÐ¸y(QÑÿ÷ù(MÐú÷ù(ÒÑHà ¸qEàÿ÷™ý(&Ð¥N'qi0iy@x@CÐ\DaTÔ�Š­00È€™AÒð
+ï�žJ0iqi€šyA#‹A
+Òš0iqi€–J¡A€yAðcúàÿ÷Ýø(ÑnçŽHz)úÑi(÷Ñ˜@zÀ“Ðbç)(1Óaà)1Óa(ðlè °ð½ðµ/!ÿ7�°A7‘¹k*‘hX2’:’´2
+’`2	’€:’yJ’*ø2rN’,2,@6À4)’uÐ&Ü
+)sÐÜ‰qÐnJ€:Ri)2Ð)kÐ)jÑ˜ð¬ì ‹!C( ƒÑò÷2ÿ˜ÿ÷¡ø(oÑËà)Ð)üÐ)RÑèà)~ÐÜ)|Ð)òÐ)ðÐ)FÑsá")tÐ#)sÐ')?Ñ	™ qOà ¸a™‚PIbc€9 ƒ	i"R‘BÑKI€9a÷÷òú� ÷÷èúGI€9ˆiÉiCÐ˜(Ñ˜!ðYÿ˜ðZì˜"d!ðXì˜ðZìàÿ÷‹ø(	Ðxk(Ñ¸aæçñàá{à=á-á ‹!C ƒú÷û(Ð �¡‹ C¡ƒ:à˜z(Ñ™#áîà+H"hJ!ðì(Ñ$H!€8in{ƒøPÖïg4	ˆB Ñ ‹ÀÑ˜@Š(ÑðjàµàSàáýà(Ñ!˜"Iðøþ˜ðìI˜"ðì˜ðìà ‹!C ƒ ‹(+Ñò÷‚þ˜(Ð÷÷±ú(Ñà˜þ÷éÿ(Ð ò÷vþÇà0´¹äé¹˜:�éôµ¸™(ðTï ò÷]þ²à ðb˜ðÄëÿH@nð´ì¨à˜þ÷½ÿ(Ð˜ð¶ë›à˜Š(Ñ˜!ðªþ–à˜ðªëðœí
+šQee ‹Á×Ñ!C( ƒÑò÷)þ˜þ÷˜ÿ(ÃÐ ò÷%þæI Èasàðj(ÐãHAkáH@i�BÑ !ðb˜Iðlþ˜ðzëÜI˜"ðxë˜1à"’ØJ	à˜@Š(TÐ™"’	‰HCÏKÓH!d3ðVíGàðj(ÕÑ˜þ÷Yÿ(ÐÐ:à÷÷ú(Ð™ ‚˜ðFþ˜ðFë˜"d!ðFë˜ðFë'à ò÷ÎýºH!Áaà½H@x(Ðú÷¹ù!ÿ ú÷-ú	˜|(Ñ˜!ð!þ˜ðåž™LØ(~6M"ë˜"d!ð ë˜ð"ë ðúåæ 
°ð½˜)(1øaà˜)1øa(ðŽîïç™	z)ìÑžN$ôa°iCÐðîì
+šQeeta´a˜ðòêÀæµÿ÷ºûÑðæþ(Ðþ÷"ÿ(Ð$ ½µ�L4ÿ÷wù(Ñ xÀCÐ ½ ½pµ…L4ÿ÷ëÿ(Ñ(ðnî!�@ xBÐ p½ p½µkF{HxryAr½xIµJk‚BÑ Hc ðtÿ½rIµJk‚BÑ cHc ð_ù ðeÿ½øµ”%+"ðæë;°«AiAø½|µ
hFð`ÿš›«AÒ™˜|½ |½µ÷÷+ù(Ð^Hi@i�BÑ\H"h!ðJê(Ñ
+ðîý(
Ñðªú(	Ñð¦ú(ÑSHx(Ñ ½ ½GIµJk‚BÑ Hcðø½pµÿ÷Íÿ(?ÑIHðòëGH!ðòëDH!ðìë(„B/ÑBHðâë@H!ðâë=H!ðÜë(„BÑ;Hi©ÁìHÚÜ–ˆððÒë9H!ðÒë6H!ðÌë(„BÑ4HðÂë2H!ðÂë/H!ð¼ë(„BÐ L n(Ñày(Ñ ðÄþp½ õ÷éýày%I@àqÿ õ0þ÷mýp½µÿ÷\ú(	Ð÷÷pø(ÑðØëJ€2Ñ`�`½ µð£þ½÷µ
÷÷]ø(hÑÿ÷Aú(dÐðÈø(`ÐH'ˆH€0à€¸ð
+¸ˆGÆäé €ôµHLˆ|éÙ°éþL)Ð!n)6ÑûH€0Aiiy@C/ÐøH€00È‹A(Òù÷qý($Ð-Ð˜!ÿ÷ú
àðH"hF!ðbé(Ð  pà ðBþþ÷ýÿ(Ñ -Ð .àpÐ.Ð'bðµþþ½ j@ bþ½ðµ.ÿ6 A6…°�°k�h*4'42 4$(Ð
+Ü€À5(8Ð(Ð(>Ñ hv8à%(Ð&(7Ñòa 'pö÷¼ÿø÷ÿù÷;ú§pàgp!àði�BÑ(þ÷\þàö÷±ÿ(Ñ gp pö÷à—DÜÅnV€¤ÿð¯ø"!’‘˜!#ö÷öýñi(ðžìàov·H"h@!õ÷Åû˜°ð½‘úçþµ% ÿ5A5�¨k�h&À6!(nÐÜ€cÐ(Ð(BÐ"(eÐfà"ÿ2i2'47$(’:Ð%(Ð&(
+Ð((XÑœHAjIAbQàõ÷=ý¨bGàø÷ÿù÷×ù ÿ0%0ðÐè ð¾ÿ ÿ0a0!pö÷Cÿ˜õ÷Nýèi¸BÐ!˜"	ð¨û °p9 ïað:ìà pv!à 0v˜õ÷5ýèi¸BÑ ö÷!ÿ þ÷Ìýàp~(Ð	 ðaýéi ðìà pvvH"h@!õ÷Cû˜þ½‘ûçðµ)ÿ1A1Œk
++h|3iO‰°)“ÐÜ)uÐÜ‰7Ð)+Ð)oÑ(þ÷—ý!"	 ðTû)41^à)æÐ)äÐ)]Ñá#)ûÐ	Ü,&€4)~Ð)Ð)OÑõà")xÐ#)JÑ˜) 1Ða@àþ÷Øûþ÷Îûøm@øe
+ øqÝàù÷9ùßàGH"h!ðè(Ðø÷pþ'à k(Ñh@oY@Þ1†è=?Iàj€1(
ÑÃi‚i lál€™AÓ9H€0†aÆa&cæbøk(Ñø÷Tþþcðêùg¸g¢kãk€™AÒ8n(Ð™(ðˆë§à�à¦àºo kûoák€™A¸eò÷‚ú� k(&Ð&I¸mˆB"Ó%I‘	ˆ‰�BÓþ÷þ(Ñ¹ixlˆBÑÿ÷ûü(Ðxy(
Ñøy(
+ÐànàwàH"hF!ðªï(Ð˜ò÷Yú 8c ð€þ¸mIþ÷8û¾a~d`à
Hˆ(ÐH!ðdé(Ð˜ò÷>ú¥ç€¸ôµ$¾|°é=Ù¤ëÌþH¢k€kãk³A�“¾a ~dð|þðë˜"’ˆ}"ƒôHÒh0	¨ø÷
ÿ(˜Ñò÷	úððénçò÷úàëL ÿ(ÀÐéHªhõ÷Gùÿ  w^çãb8k(Ñ>cþ÷êúÿ÷ýàÀ5+v 	°ð½ðµ)ÿ1A1
+‰k‡°‘h.,ˆ6€4)~Ð~ÜÖJ)’i{Ð{Ü‰zÐ)yÑõ÷–û(ÿ0ÌNa0y'€6)Ðq(þ÷W0pH<à9YàËú0ˆ(hÐÈH'Ga‡aÇaGd‡q€1Çp�`Ï`aOa‡pGpfðé¿J€2Â2ˆÿ÷rü c�ác·H‘€o}#¸IÛXC€1É9€šYA›€™AÓ0ˆ¢k€ãkÁ€YAác cªH}'€oÿGC«Hák€0È‘ k�€™AÀ#¥O™A¥I¸eˆB�
Ò0ˆš€›Á€YAác c0ˆ�˜¸e›HœI€mþ÷BúàÇàoàÎà`àŒàÉàŽà�H}#ÀoÛXC"mcm�O!€YA€7:h{h€™AÒyh8hae e ø÷–ü‡H�kI�c!Ác2ˆák kÿ÷üùa¸a&ãk¢kq@p@cdC"dÐ  càj(
+Ñºi lûiál€™AÓ¾aþa&cæb"˜ðiùà5(z(Ñ.r˜ú÷Öø(Ð!˜ÉðMüþ÷îü(Ð˜!þ÷òþ õ÷Qúià)/Ð)fÑþ÷çùaHnIf�iAd?à)BÐÜ)WÐ)VÑZL y(QÑõ÷™ú(MÑ qþ÷Åü(HÐàx=à")AÐ#)CÑ(|0) 1Ða àNHBdþ÷¼ù7àÌÉ8âÍ±§]KL*4Ð`i(1Ð y(.Ñÿ÷§û(*Ñù÷þù(&Ð y(#Ñþ÷¥ù`m@`e i`d1(ð–éàþ÷�ü(Ðù÷çù(Ñ7HAi)Ð!Áp€y(éÑà àbà À5(v °ð½(þ÷û!˜"	ðØø)41Ôçµ"	hÿ2A2‰Ð)ÑØ ](Ð ˆ0!”1ÐaàI ˆrH"h!ð¨í(Ð!|1à!p1 ðFé ½µHðùIH41ðFéH"�H’’Jø0#¡ð¢í"d ’’�JH#¡ð˜í½0é˜ ¾€¸ˆ'Ùôµ0
+¸ËëSleepConfirmTmr«èNullPktDoneTmrTpµ�HA‹IAƒðeù(Ð1(ð*ý	!@"@,Ð(Ð!(#ðÏúp½€Hµhõ÷$ø|IŒ948ðÜè{H!Aa�aÁa!��½xHµÁx‚x	CÐ)ÙuJ‘BÓtJ`Axx	CB;Ú4äÔIy-nJÐ‘�Áy„yoI#CƒA{{	CmK€mI	x)	ÑÁzƒzC(Ñ à p½pµ^M)iŒBÑ*Ð!ðèú,ap½|µö÷|û$ð†ü"’1(#”ö÷Îù|½pµÿ0A0…k ðÙûKI dfˆcˆdÈdeˆqö÷bû(Ñ!(ÿ÷ÔÿðÊî€4 dadae e ðjè!"	(ÿ÷·ÿp½µ:I dfˆcˆdÈdeˆq ÿ0A0€k!ÿ÷±ÿð¦î€4 dadae e½pµ3J!ð>è 1J!40ð8è @0/J!ð0è 0,J!ð*è *J10ð$è (J1(0ðè &J)L0ðè $J)X0ðè "J)d0ðè  J1”0ðè J1 0ðè J)p0ðúï J)|0ðôï J)ˆ0ðîïp½ð
+8¹€¸¦ëýÿ,¹°éJ¹¾¿ÇõËkÍ›ÈÊ+ÉoÎ;ÐÏÔUkD"0æ ¡Ç��ÜÉÛƒÝëßÇâ µðÀþ½ µð»þ½ µð¶þ½ýHhpGüHµˆ(Ðþ÷©ú(Ñþ÷�ú(Ð ½ ½óHh(Ñ pG pGµÿ÷Üÿ(Ðÿ÷ñÿ(Ð ½ ½µÿ÷Åÿ(Ðÿ÷äÿ(Ð ½ ½µãH$!qâH�h
‘C�`áHô÷ÁøàIÈiÊCÈaø÷„ù ½pµÿ!ÜMÖHõ1)€&
+!€„‚  p fp p æp qfqðbï q
+àq  r `r  r àr(ˆ s
+`sËHpp½øµø÷¨øÉH%€ÉHÁLpÈH€ÈH`ÿ Z0 cô÷µùÆI@Z `!er!bec}#¥bÛåbãa!c!q2&á€¾Hæ` a¾H`�aq%f½H"ef€2`a¯O 8U`Ç�F�…�E‚�‚€ãg¡grÿ÷þý÷)þÿ÷•ÿÿ÷}ÿ ø½ŸI¯Hµˆa�H"!0ô÷þÿ÷•ýý÷þÿ÷©ÿ½µÿ÷!ÿ(Ð ðÙýü÷¶þ"!à¡H"!ðÄî½ñµñ÷Ãý�N„l8{,èç¸ÅÍun4nš! ðÜî)C Cqf0f8ñ÷¸ý#) Y@X@C
+Ñÿ÷õþ(Ð ð­ý!‰ðõøø½µÿ÷íþ(ÐˆHhd2‘BÐ:‘BÐsJ„KÒhšBÐˆ2‘BÐp0�BÑ ½ ½ ¹çjIÊi�BÑ Èa ±çpGµeLàiðØë àa½øµ}$äñ÷iýÿ÷ïÿnI 
+hX1ŠBÐ (ÐZI`1.Ð‹‰+ÑK‰‰(Ð"’QKbCcH!3ð°ì(ñ÷Iýø½MH!`0uÍçHHµÀi(
+ÑHH"EK`0’Â‰VH!3ð–ì½@IµÉi)Ñ"=K’NH3ðˆì½;H`0}ªç7HÀi(Ð pGÿµ…°%ÿ÷Xþÿ÷Zþ@I(Ð
+hX0‚BÑ à � ,�Ñ8H	h40�B)Ðþ÷ù(Ðþ÷æø(#Ñ,!Ññ÷éü.ÑðJì-J€2Ñd�d ÿ÷ÿþ÷lÿ(
+Ñ*M/Ñ à˜!õ÷Îþ (p ñ÷Ðü	°ð½˜#I C‘wÐ :Ë±¿(êP{p,ÑIà1	z)Ð IšÀ1*‘Ð™Ïb™u91C.Ñ%_à ¹¤ë0é€(€ˆ!€J¹€¸X¹D¹H¹L¹ø² Nƒ
+ˆë0
+ÿÿ¯è…¸�é%(/Ð.Ð	 à /Ð!à!C‘ù÷´ø(Ð¹Hhðê!C˜ù÷µø(Ñ˜ù÷Çú(
+Ñ,�Ñ%,Ñ˜Ábà,Ñ«I È`˜(Ð,Ñ™˜‚-Ñuç(ÿ÷xþqçpµ¢Hhy(Ð¡H¡Ih	hC I	hC/Ñþ÷8ø(+Ñþ÷ø('Ñþ÷¤þÿ÷qý™L(!Ðÿ÷Šý(Ðù÷^ø(Ñÿ÷qý(Ð“Hh(Ð’Hˆ(
Ð‘Hˆ(	Ðô÷ù`‹!@`ƒ(ðQÿp½`‹"@`ƒ(#ÿ÷ßþp½
+ )æpµö÷jÿ(FÑ‚HƒIÀhˆB?Ðÿ÷Rý(5Ð%ÿ÷*ý$(Ð ðáûü÷¾üh!@0‚BÐ!p½ÿ÷ý(ÐnInJÀ9	h h:~1$ì
+¨¥‘BÐ (
+ÑiJ€2Òj*ÐfJ \:‘BÐ cJD:‘BÐ$C%(p½ZHz(Ð(Ñ p½ p½ZH 0zpGXI 1
+z*ÑYJRh*ÐrpGpµÿ÷àü$(Ðý÷˜ÿNMÀ=(Ñý÷|ÿ(ÐJI *hD9àHI*h h9ŠBÐ p½ÿ÷¿ü(Ð ðwûü÷Tüh!@0‚BÐ!p½ p½pGµ ðfû(
+Ð@zÀÕÿ÷§ü(Ðý÷'ý°½"!¨ð^ìÐ ÿ÷©ÿ"’1J!¨à ÿ÷ ÿ"’ø÷;øâç(HiÁ`pGøµ$ðú!MðÕ(ˆ!ˆC(€ÿ÷nü(Ñ$°€&(
Ð8ü÷ü)ˆ"‘C)€€ÿ÷“ü(Ð$(ˆ1!	BÑH€H` ø½I`pGIH`pGIˆ`pGP¸äéì£Àœ¸˜¸”¸ð
+¬¹¤ëX¹ ¹ÿÿˆL¹ýHˆ(ÐüI ˆ` pGµ ðnþ(Ñ ðUøay)Ð†˜ja îþ@½"y*ÑbzÒ.Õ(Ðÿ0a0@('Ð y($Ð)Ñÿ÷þû(Ðÿ ~0](Ñ`zÀ	Õ`y(Ð y(ÑàHˆÀÕñ÷�úßI
+x*Ñ"
+pñ÷šú ÿ÷Ìü½ñ÷”ú½µÖL i(Ððìè  a½8µÿ÷Ëû(ÐÎHˆ€€Ðÿ÷éÿ"ËH’Àˆ}"ÒÈKBCÉH!3ðÔé8½µð5û(Ð ½8µ
ÀLáhˆBÑ à`ÿ÷ïÿ( xÐ(ÑðÄø(Ñö÷¹ý(Ð"’`ˆ}"Ò³KBCµH)3ð¨é8½ ! pI(ð‹ý8½(üÐ(
+Ñÿ÷{û(Ð ð3ú!	ð{ý  p8½µ¡Làh(Ðð‚è à`½pµñ÷ú›L x(Ð(Ðÿ÷êÿ  p(ñ÷úp½øµñ÷ú’L!x)Ð)Ð)Ð)Ð)Ð)
Ðÿ÷Ïÿ"’`ˆ}"ÒBC#‰H13ðPé(ñ÷éùø½pµñ÷ßùL x(Ñÿ÷oÿ(Ð  p(ÿ÷Éÿ0ñ÷Óùp½µñ÷Êùj¸çÁð€[¼
ÿ÷£ÿsIx(Ð(Ñ à p ñ÷¿ù½µÿ÷û(ÐnH	àÿ÷ûú(Ð ð³ùü÷�út0ðï
+ ÿ÷Ýû½øµ'_NEi·`ý÷¢ú\Hˆ(Ðÿ÷îú(Ð0x(Ð(=Ñ[H"hF!ðØî(%Ñø÷²ù(!ÑOHˆ(Ðhy(Ð)y)ÑizÉÔ(Ñÿ÷óú(Ð	 ÿ÷¥û2à0x(Ñ !‰0p('à7p"à>Hˆ(Ð ÿ÷Ÿÿ0x(Ñ 0pà(îÐà(Ð(Ðÿ÷àþ(
+Ð0x(Ñÿ÷Ùþ(Ðÿ÷˜ú(Ð!`i	ð‹ü ø½µÿ÷µú(Ñ'H'Iˆ(Ð+Hˆ(Ð Hp
+àx(Ð(Ñÿ÷“ú(Ñÿ÷Üû ½µ‰Dið6ê(Ðÿ÷gú(
+ÐHx(Ð(Ñ!‰ ðTüÿ÷Nú(Ñÿ÷Eú(Ðÿ÷dú(Ð ÿ÷û½µL ˆ(Ðø÷/ý(Ðø÷ý  €½¤ëD¹¾îëî(ôµ°é
+IKµ
+h`
+J$©`¦òt³°
+`ð%þ!Éðüßçµ÷÷SýHIh`×ç,¹0¹ÿÿ#YC	ð1	| )Ò pGøµ#YCð4 |(Ò@ t`h `¦hf`¢`%h¨€!ðzé©É)	ØñÉ)ØyÉ)Øà`ø½®BÚæ`àå`áh hˆBôÛø½ "µAŒ@!	‹BÓ@
+(óÙ
+ ½0µ%Dh•@h¬BÚYdÀ0½AQ`0½
+µAh)	Ð#“@h™BÚð4é½A½a ÀC½øµš’ ð~ÿ'Ðù~ )Ó ˜)hh"„F ÿ0-0ÿ÷Àÿ/Ð "ÿ050aFà ÿ0"=0aFÿ÷±ÿÿ u0[ ÿ0e0aFÿ÷¨ÿ0ø½µª’ª«ðJÿ!"À1Jb#ì"(UÐ˜H�˜�˜ˆ� ðáùø÷;ü(	ÐúHhð¤í ø÷=ü(Ð ù÷ù ù÷Èú½pµ
("Ð&"®WªV! ÿ÷*ÿ! ð4ÿ ÿ0"u�Ë,ômKÜÀE0ÿ÷_ÿè~(Ò "1ÿ0M0à ÿ0"1U0ÿ÷Oÿp½!ÿ0-0Zçÿ!u1	Zÿ0e0Tçÿ!w1	Zÿ0m0Nçpµÿ÷öÿ(ÿ÷èÿ p½pµÿ0!50ÿ÷>ÿ ÿ÷Ûÿ(p½pµÿ0!=0ÿ÷1ÿ ÿ÷Îÿ(p½ÿ1A1	h )Ú pGpµÿ÷Ãÿ(ÿ÷»ÿ p½µÿ0@!ðÐì ÿ0!E0
+ÀÀÄ½À1"J‚a"ÒCÊ�ÿ0
+‚e0!
+ÀpGµ!À0��a!ÉC�A�¨H"¥¡ðâì ÿ0!m0
+À ð%ù½pµð÷6ÿ ð0!ð–ì ð"ù(ð÷/ÿp½pµð÷%ÿ(ÿ÷çÿ(ÿ÷Ìÿ(ÿ÷»ÿ ð÷ÿp½µÿ0!a0Á‚�‚ ÿ00!ðpì ÿ0!]0
+À ÿ÷�ÿ ÿ0!e0
+ÀÀ ðìø½ÿ1I‰k )Ú pGpµÿ0@‚lAlcÁbmÂlBc�cƒmBmd)ÂcÑ !ÿ0U0à ÿ0!M0ÿ÷vþ%–·`ýö™£b}À5h�(!¬0
+À ð¯ø(!„0ÿ÷fþ(�i‰¨� ÿ÷Gÿp½)	Ðy)Ð"À1Jb!à0spG"À1Jb!à0spG
+À2µj™BÑ!bð�ú½PHhI`½þµ �ð²ø4À4�`j7à7(Ð `bLà j5€5(Ñ  bð ï?à0ð ï(4Ðð˜ïªmëm€™A™ð>í(�.Ù¨ðÌùkFz!
+ ðû5@5¨}(ÐkFzˆBØ.I"xCp0ù÷4úkFh}zˆBØ 8s"0ù÷ëüà˜ªmëm!€YAée¨e  b"’Hš;1ð”íþ½µy(Ð À0jð„ì !Ø0ð€ë ÿ÷†ÿ½ÿ!w1µ
+ZÊ#^ÿ0m0ÿ÷¡ý½ÿ1"-1Áÿ0Áe0ÁÀpGP¸®\¹ŒÃiö|µ#ðbîkF"1hFÜ€ð~ë"(iFù÷Šü|½pµ$ðï(Ð 4Yá)ñø^º` àHx(Ð"1(ðüî1(ðôî 3J1(ðôî p½¥!H‰µðLëH@!ðHëI p½¥!
H‰µð>ëI p½
+I
+ `
+IH`	IH`
+IH`
+I	H`pGJî¶ëØ:Ü:à:ì:.ä:>è:‘BÙbK€P:P pGøµ
$ð÷lý�0ð¦îXKYN? ;¨BÑ�qXà‚±XšX‘BØ	@$(ìÓLJ©RXqX8Q�BØ˜$ð÷Dý ø½EJi‘BÑBIÀ{1\9€
+XR
+P pGÿµ�°$;H†BÐš90ð¶ê°ð½ð÷ý�)0ÿ÷¥ÿ(Ðš90ð¦êÐ-Ià{1
T¨9
+XR
+P`{!C`s(H a˜ð÷ý Ùç#IÀ{1\pGþµ �I iˆBÐ þ½Há{0F\¾BÑ þ½ð÷àü�HJ½AYRY‘BÒI¶9€Y‰YÐNúªRÞ�ˆBØ i9ÿ÷[ÿ(ÐI �ˆY(Ñþç@ˆQHâ{0‡THY@HQ˜ð÷½ü˜þ½ÀX1L5ùpGøµ"ÿHð:êÐ ‰!(ð6ê)0ðfê)8ðbê÷H"j!#ó÷£ü(Ð ðâé ø½ðHµ@jó÷Èü½µ@iÿ÷tú ½pµÑéLçM(x()Ðð&ûþ÷ðý(Ðèh !� 0AxxáIC@Ð(Ð(Ð(Ñ ð_üû÷gþéh"H{ÙKCHsŒah"ðh# G (pp½Bxx
+CÎI*ÑÂxƒxCH�H‰pGÍHµhó÷tûËHhó÷pûÊHhó÷lû½µðÞøðfí½µ$ÿ÷’ùÄHx)Ñ!p þ÷=þ$ ðþù(Ð½Hh(Ñ à 
ð9ø ½þµ �þ÷Ký(Ð ðü ð–ÿÑ ð}ùþ÷?ý­O(Ð8ˆÀÔ`zÀÕpy1yC(Ù§IˆBÒþ÷0ý(Ð`zÀÕþ÷GWIü³ªíý(FÐ8ˆ€€BÐð÷Ìû�py1yCÐ›I`ðy±yCÐ˜I€ðx±xCÐ–I€�N0x(#Ñþ÷ý(Ð`zÀ	Õ8ˆÀÕ-Ðÿ5a5h(Ñþ÷êü(Ð8ˆ€€
+Ðÿ4a4`(Ñ 0pþ÷¶ý �˜ð÷�û˜þ½!(Ðæ(Ðk(Ð+(
+Ð,(ÐP(Ðç(Ð$(Ð±(Ð!pGfHµ@j!ó÷­û(Ñ ½ ½ðµq!É_H�°�kHÒ1‘"9‘�9‘hIÎ0‘�ðcþfHðæê‰	Hx
+xCBR’Êx‹xC94±(‘ÐÜo(ÐÜ+(Ð,(Ð@(Ñà©(Ðª(Ð¯(Ñ
àÏ(ÐÜ²(Ðµ(ÐÎ(ÑàÐ(ÐÙ(Ñ à (Ðÿ÷£ÿ(kÐ 6IHp �	� �CHðzé�‰
•@i�˜ðFì(Ð ð
+û(Ñþ÷Bü(Ð ðúú,Ñ˜÷(Ñ#x!š‘’‘hy	àhy		ðÑøèçoy>	.Ñ›¡ªþGB¾P#à.Ñ#à#š!’:‘‘1#ðˆû˜OFaà ó÷	úIH"ðLè(ø`ôÐH !ÀhJ�A‘bFa‘èx©x(àõã@`¹¯ú2ÿÿü¶ˆ¶ ¾º¾¸¹¤ëýÿ,¹@¹Œ¸Ø°éPl¸
+C™˜ðÂëÿH'p@i(Ñ˜ª(Ðö÷TÿúHGaúHÁh"CÁ` �˜À Ñ˜ÿ÷Õþ(Ð˜!ÉC(p
+hp ¨q èqèx©x
+C™˜ð’ë˜ð ï!0ÿ÷Èýðýÿ÷ø›ƒ+ÑðÆú~Ü@+}Ð}Ü+|ÐJÜ+Ñðý3Ü
++uÐ$Ü+sÐ+Ðð+ý×H`0y(	Ñpy(Ð @0z)Ðr˜!"0ðZë(sÐ �ð¾øðóü+Ñðù+ØÑÂI 	ðLëÈç;
++ÏÒ[{D›ˆ[ŸD*÷÷÷k÷÷`tƒ(+oÐÜ;	+ºÒ[{D›ˆ[ŸD½î¶-8Þüÿƒ—a{âââ—â—.+Ñð×øÜ++~Ð,+£Ñ ðøý™ ð�ï§H€k§I `)0ðëOâäàïãàîã
ãƒâ6+Ñð¼ø7+†Ñ À0j2! ðþêrçm+~Ð~Ü]+Ñðlù&ÜN+Ñð·ùËâÜE+rÐM+�Ñ!0ð¶ø(�Ðð\üP+gÐ[+„Ñ`x!xCÑðHù(ðÑš¡0ðHþðFüÞâh+qÐRÜ^+Ñðùf+ŸÑ`x!xC(uÑàx¡xCÐxHÁh¹B
ÐÇ`vH9ð,èsIa9sHd1ð&èpIHaàòã`y!yCÐkIˆc z(ÐiI@Hq`z(ÐfJ@y�BÐqày¡yCÐ`I`àz¡zCÐ]IÈ€þ÷¶ú¨q
+ð-ùõãàôãWâk+Ñðùl+…Ñ ¨p èp!x ðnêéxªx	C@ð~ûu+ÑðùÜn;+ÓÙæüã[{D›ˆ[ŸDÒÜáÍjx+Ñð&ùìã+qÐ�+ÑðÔø‚+äÑ`x!xC(ÐðÖù˜(Ð‹ÆAÁø±üÄðÉù ðfû�ðÉùÏ+ÑðHûxÜ®+wÐwÜ—+Ñðþù$Ü�+qÐ	ÜŠ+oÐ�+½Ñ ðêÿ !0­ç”+ÑðÍù–+±Ñ`x!xC(ÐðÞùàx¡xCÐðÎùò÷öýpæ©+Ñð9úKÜš+Ñð›ø¤+”Ñ ˆ(sÑ0ÿ0a0�‡ŠÀŠ¤�`x!xCÐÿ÷ø™ˆ‚àx¡xCÐþ÷þÿàðã`¹§€à¹¨€¸¹0é@B™È‚& ¨p èp˜€Š¸BÐ0ÿ÷þø˜™ÀŠˆB¶Ð0ÿ÷ù$æ6àÌààýãvãª+Ñð�ù­+‰Ñ`x!xC(ÐðUù!y x
+ðÇýæµ+qÐÜ¯;ðèõ¹ÒèýäÅ+Ñð%úÇ+pÐÍ+ÑðŽúÎ+�Ñ™ 	ðªø(Ðð“úþã³àê+lÐ_ÜÝ+Ñðú<ÜÖ+ÑðúÜÐ+ÑðŠúÑ+¾Ñ`x!xC(Ñ!0ðZø(Ñ— ð¼ø0ìæÙ+Ñð*úÚ+¦Ñ`x!xC(Ððòùàx¡xùOC¸BÐð†û`y!yCs5ï­ô‘˜eG¸B„ÐðÊû§åä+oÐÜß+ÑðUúã+¦Ñ™ õ÷Ïú0½æYàå+qÐé+›Ñš!0	ðiù(Ð0æáPà÷+Ñð\úÜí+oÐÜë+Ðì+…Ñ)0ðÿüÊãò+Ñðløô+—Ñè|	(ÆÑ)0ðäüjåû+ÑðUúÿ;›Ñð?ú+ZÐþ+šÑ ¨p èp ð9üuæ! ð„ø ðäè²çhz)zC(Ñ)0
ð´üÈç)0
ðšÿÃç)0ðœù*à �^åþã)0ð˜ú(Ð(}Ð(Ñðú(™Ñðþ
àíãíãààà)0ðÙù(Ð(‰Ñêç �ççéá)0ðÂù(�ÑÐ	å)0ðÂúŠç!0ú÷Qú #æðŸý "0ðÄì˜ðÚìÀx�‰’‘BÑ€Ô8
+'tàð€è(Ñ à  t
+`t@  q àq˜ð¼ì 0AxxC s
+àsðÝø!1ðÆì 
�ðbè(Ð 
�˜ð¤ìÀx€€��ðƒÿ
š;’š àþJÇ)ð\ìf	•âðNè˜�yByC p
+àp  p `p
+  4`s  s™äkI `:åpzÀÔ#"!0ðÞøeH!†c˜0ð*è(Ð¥äòã#å ¨p èp!0ð è•å0ðHüõ÷¼û˜	:ÃÛ ðèdä0!x 0Auax�u0ðÀüð½ûð?ûðÈïTä`x"x™C(]Ñàx¡xC	(Ð
+(Ð("ÑBI y	hÈa y(Ð0ð¹þàpz¡y@É@ÉCprø÷ü"0ø÷nûà yqzý"À@€Cqr0áx¢x	C)Ð)Ð)Ð)Ñ+IÉˆ)Ðáˆ)J‘BÒ¢y 1
+pâyJp
à¢y€1ŠwâyÊwà¢y¢!
+Tà¢y£!
+TÂy�yðÛü(ÐÑ%ä(‡Ñ‰¤'‘ƒàxx9xC(/Ð
+Ü(Ð($Ð(/Ð(DÑ£ €],à	(0Ð
+(2Ð((Ð"(9Ñò÷¬û"©�Uà• €]àÿÿà¹pì£À`¹î0€0�!qÀà0 0ñ‡tËìÑP¢Ax!q@x`q;à¢ €] q7àýHhÀiùçpzÀÀõç!yrzII’ÒC!q&àœà+á9)Ù!ÉC:
*ØQ‘IÐ0ð)ü(Ð!0ð0ï À™0€j‰Aøx»xC ð>ëøx¹xC™?		Ç<‘˜(Ýwçíä`x!xC(Ñaˆ"Ò`h‰`àä`ˆ!É@h``Ùä`x!xC(Ñ!y`ˆð8íÎä`ˆð,íúãò÷ø`x!xC(Ñ!y`ˆðíà`ˆðúì qò÷8ø¶äàò÷|ù`x!xC(Ñ!y`ˆò÷©øà`ˆò÷³ø qò÷aù¡ä˜!0ðÂî‰æ ðjù™ ðë¬H€k¬I `)0ð¶îÁåÅà`ã0ð´î(’Ðþ÷”ú¥H$€¤H`ÿ÷÷ø£HyIIq0ð¤î™ ðÜêšHß"`0 0�}@�u0zû!@0r˜å1àÿç—O}"øh p
+àp¸k q
+`qxyÒ@ r8y@`r8h q
+àqøˆ�ùj¸jðÊì{k:k¢Vè	oÚéð¦ëš#ð¢ë r
+àr6äƒJ r2“’:‘ðfî,ä`x!xC(#Ñàx¡xCÿ(ÐyJ!p™H€àvH
+!p˜A€˜9@ˆ(Ð!šˆ*Ð'¹BÐ' ý÷Îþä™þãjHx(Ðÿ à˜ˆ p
+àpBä`x!xC()Ñàx¡xC˜Ð™8CwàáA˜Iw˜ÀÐö÷cù%äðOú(Ððî(Ñô÷üøö÷ïúä˜™8Cw«äMHÀŽ@@Æçï÷bü
+�`x!x`yC!yàx§x
+C9C ààðîí
+˜`ààx¡xC(Ñ ›ä(Ñ`x!xC(õÑ`y"yC ðØí 
+ðÁùˆä(Ñ`x!xC(âÑ`y!yC¡ðÊí(·Ðï÷ ü1à§à(1Ñ`x!xCÑ ©ð¼í�˜ q
+`qhx)xC!ÉC(p
+kFhpŽ¨q
+èq˜:àï÷ûû`x!x`yC!y
+CI ðŒí8ï÷ðûä(üÑ`x!x (öäOy¹jC(Ñ ò÷9úÝãÝãì£À¨€¸¹X¹L¹@¦€0é„¸Ùÿÿ(‡Ñ ò÷ú(žÐ0�ä`x!xC(Ñàx¡xC!ø÷žøpzÀÕ¨ðZí˜kF{ÁzC p
+àp}�X}‰ø÷økF`q}"�X}‰ø÷øà  pàp ðæë`q! ðäë q Sä0ª©ð~ù
+ ¨p kFèp~ p}ýã2ÿ2a2“Š9™@¡p	
+ápÑŠ�@9
+'q& aqàAáxâëã¨p ¤èp þI"0ðöè7À7ø‰ p
+àp8Š p
+`p0þ÷—û
+ qb0aqÑ¸Š q
+`q8‰ r
+àrx‰ r
+`r0þ÷‡û s
+`s0þ÷wû
+ qáq
+ sb0ásiÑøŠ q
+áq s
+àsRä ¨p èp0À0!�A^õ÷»ú p
+àp˜!A^õ÷¿ú p
+`p0þ÷Jûõ÷ªú q
+àq0þ÷Rûõ÷¯ú q
+`qpy(Ð(ÑÑpzÀÎÔ%äÆH"xÃi`xn3‘fÙà
‚
º$C ªð”ì(ÀÑ`x!xC(Ð(QÐ(¶Ñàx¡xCºIˆB}Ñ˜ð‚èÀx‰‰ØÕ€ÖÕðxì±HÀi`0tGt&äñã¬áàx¡xC¬IˆBÑ˜ðfèÀx€€½Õðdì¥HÀi`0�{à@¡H$Ài`0�@|(¬Ñ˜ðNèÀx�‰Ô€ B¡Ñ˜„s™ t! ðÆþdäàx¡xC’IˆBÑ˜ð2èÀx€ŠÕŒLài`0|(„Ðð&ìài`0®ç@˜$ðèÀx�Ô€€ BÄÑ€O!øi`0Äs ð˜þðìøi!`0At0äÿç@˜$ðèÀx�Ô�‰¡B§Ñ�‰Ô€ B ÑnO!øi`0Äs ðtþøi!`0Atðìëøi!`0„s ðgþøi!`0t‘ä”`x!xC~Ð(HÐþ({Ðÿ(�Ñ˜]LÁx‚x!ˆCJ@@’‚’ÐŠ’Ð"@@ˆB�Ñèx©xC8™	0ð¦ù(~Ð˜!ˆÂxƒxCC!€˜ÖÏïÜPÁ,M€€
+Ð0ú÷Ìú˜ÂxƒxC
+
+€˜ÀÐð¥ú(Ð 
à<H�˜ˆ(§Ñðßþ(£Ðö÷Àý3ä 6Ip˜1!	B˜Ðhx)xC!ÉC(p
+kFhpŽ¨q
+èqèx©x
+C™˜¤ðîê ðAý(Ñ à�àFàð%ÿ1y)Ð)	Ñ(Ðÿ0a0@(Ñ0ðÆø`x!xCkFX�àx¡xC˜�`y!yCØ�ày¡yC‚`z!zàdá†âCX‚ 	�˜ðÂîý÷Ùþ™ª¨þ÷\ýQà®Lÿÿ¤ëkðD¹˜Áx€xCÿHˆ@àÐý÷|ÿûHˆII€1 B1Ðhx)xC!ÉC(p
+kFhpŽ¨q
+èqèx©x
+C™˜ðrê!0ý÷óý 	�˜ðxî0ð§ü(Ð0ðñÿ	!É@‡c,ÏÐþ÷ëü�àãÝH™ˆˆp
+Èp™0	ð$ùáL ¨p èp!0ðzêËã! ðÂîÆã À0Bj!2þ÷DÿýÂ'íØþ£)`x!xC(!Ð(ÔÑ˜ˆ(ÐÑö÷×üax"xC(ÈÑ �ðˆî@4ÐÀH™"ðjî¿Hˆ(Ð™ 09	àû÷Îü(áÑ¸H€Þç™ ‰		ö÷æýö÷œü±L  VAŸÐ��Ð!ð*ï®JÐjàà!y�@8CÐb y!ð^êoã ¥IÀCðdîö÷‡ü¥I r¢I€bã`x!xC(Ñàx¡xCÑ:ä(Ð(qÑ›Ip	ðØý	ðêý™H"h	!ðÄí”I rBã“Hxä À7`x!xC(%Ñèx©xC™B¡0ðRþðŠýxj1Ð€|ÀÐðýðŽé}Hˆ(ªÐý÷–ù(¦Ð0zÀ£Ð0ý÷ºýã(¶Ñ¡0ð�þwá¡0ð®üþ÷ ÿ ððúà!0ð–ûàš!0ð÷û(Ñÿ÷µøðâ™ ðŽúëâ ðÕûà ðÜû(Ðÿ÷BøÞâÝâ x(ËÑ›ax›¢0ðÆé@Ïâ�Ðâ!0ö÷,þ(†Ñ8
+¯qèqÆâ`x!xCÑ!=m…Ô(šÀª0÷÷Öø0\â˜!0ö÷¿ÿ³â`x!xC(
+Ñèx©xC8	 ð&ü¢â(�Ñ ðSüÞç ���!ª¨«ðˆé˜(¯Ñ<Hh<I@�Ññ÷ûüàx¡xCkF�y0#XC5IA˜ÀBh*Ð©¨�Gà—˜(Ññ÷æü˜(‰Ñ! kF‘V(Ðêx«xC¨p
+èp‘˜(„Ñ`x!xCèx©xÑC8ìáƒà|âCcç`x!xC(0y
+Ñ(ˆÑàx¡x
+Cñy°yð0é4â(¡Ñ0ð.é" ðôì ¨p èp à¤ëT¸H¹#€äé ¸ôµ!€HÈÀ@0À}Ëæª’`x"x›C
+3¢0ðé(“Ñ`x!xCÃÑ™"˜ÒCp	
+Apéxªx	C�p	
+Áp!�qÁq˜ðjìá ð�ù¨q
+à |á(Ñ ðÆù¨q
+èq`y!yCÑ à0¨p
+èp  p`pÄá8
+¯qwÀóTÐåîÃäèqâç x	ðtü q»á`x!xC(Ñ ðßý(ÑWæ®á© ð˜ý©áøHh(Ð	ð\üñ÷!ü áñ÷ ü\æâ xd(ÚaðÃÿ`ð$è
+00á ð^ú ð§úý÷çü ð<ü(ÐAy)Ð!I@z)	Ð!r ð®ï ðxèðzè ðrèðxèhx)xC!ÉC(p
+kFhpŽ¨q
+èqèx©x
+C™˜ðÊï˜ðÖë!0þ÷ÿù �	�ÉHð”í(úÑþ÷7úõ÷ìüÅI HaÅIÈh"�CÈ`7á(y�hy"		¿H‘h!ð¨ë˜ð®ë¹Mèhðªëð)úðèù(Ð—¶I €¶I}'€µI?`à ñ÷‰ý¬H"9ðÌë(è`ôÐèh !�Fa 0¨b™"ÒCp	
+Ap™kF1�p	
+ÁpŽ�q	
+Áq™qAy"		Cš			CAq!0þ÷‘ùá˜ª�`x!xC!ðPýáš!0ðÞïøå ðúÇà`x!x996ÌhR¬C(Ñ–˜@zÀÕ˜!ðÓúà'˜Ây�yð•ü/�Ð—˜(èÑ€Hh ðºï4à{¡{C(0>à`x!xC(Ñ ðÀÿðûú0ÿ0™0ðœì0ðeÿð]øpI0ðžï‚à(·ÑeHmI@ˆˆBÓlH8ålIˆBÓkH3å}!ÉˆBpÓiH-å`x!xC(Ñ!0ð ÿcà ð¸ÿ_à ¨p
+èpZà™ ð¦þUà™ ðÐþþ÷½ý`x!xC(Ñàx¡xCUI`ðªú0ÿ0™0ðJì0ðÿNHh p
+àpMHˆ q
+`q-à"!x0ðuÿà`x!xCÑ þ÷ù p
+àp ¨p èp Bå`x!x"C(3Ñ˜�PxxC0«ðlü(Ñ—˜(Ðhx)xC!ÉC(p
+kFhpŽ¨q
+èqèx©x
+C™˜ð\î	˜(Ð˜ðfê˜(Ð™øæ(×Ñ0«ð<ü(Ñ—kF‹å2!¨ðæîkFÚ(ÿoÈÖŽCæHx(*ÑHð~ì(%Ðþ÷’ùè½¸`¹§€ôµ¤ëX¹L¹|X¸ˆDthP °ð½ùIµ
+x*Ð"
+pöJ
+!õ÷âÿ ð¾íôHôIh`½ðµ‡°'—ô÷Íÿðøü �õ÷ûíKîJ_aÐh!ˆCÐ`nâ˜�‰
(ðFê(ðBê(Ñ˜]â!IBˆBoÐ%Ü€(mÐÜ(kÐ(jÐ(iÑðžøJâÁÿ9ú9oÐ"R‰óÑ"ÖH’h"!«ñ÷’üÏHÓIhˆBQÑ0ÿ÷ŸÿRàÐISŠByÐÜÎIQvÐ"Ò‰ÕÑÅHÃJh`ÇI`ö÷Bøðýúðø ðNíý÷Ýø(ÅÑ0ÿ÷|ÿ2à!IY3Ð?"’‰¶Ñ0ö÷ü(´Ðý÷:ø(°Ð0ö÷Íÿ0ðî Õö÷íÿ,¢Ú±JB!0#õ÷‰ÿçáŽá:áÄájáÞá¢J
+!0õ÷8ÿ ñ÷iý0ý÷ûùÖá$àî÷ÿû¤INn
nfOfî÷ýû$à9³'¿¹Äö{‡èÀy@CÐ ü÷þðdm$Cv$),ÏÒ1(y@CèÑ²áHá�ápy(Ð(Ñ‘L!x)
+Ð)Ð	)Ñ�Kbˆ0õ÷Zÿàbˆ0õ÷ÿà"!øç'pà 
+ðìÿ!0õ÷óþ0ý÷Ñù‡áàh‰
˜‰Fi(y q`y±y	C`qñy			C`q`x"xCsJˆ‘BZÐ-ÜqJˆ‘BÐÜpJˆ‘BPÐÜnHWÐ(TÑƒà(~Ð(ùÑð4øð¼ìàx¡x
+C!(ð¼ì!(ðhí’à(2Ð4(0Ð5(.Ð6(àÑ+àU()ÐÜA(ÐC($ÐD("ÐG(ÔÑTHG0(p
+hpày¡yC¨q
+èqqà`(Ðb(aÐ{(
Ð�(kÑ
+àðü(Ð!ÿ ÷÷'ø0ðCûàx¡x
+C!(Tà0ý÷µþTà"!(ðrì ¨p èp(0� 	0ðÔè˜ðíéxªx	C@¨p
+èp0y(
+Ñpy(Ð @0z)Ð!r-Hàà`#à"!(ðDì ¨p €ë‚
+À;Éèp(0ðôìèxªxC¨p
+!Ièp´ç("!ð,ì(!0"1ð$ì!¦ç˜ð0è	L"ài#©ñ÷éú('ÐçD¹Eñ0¹,¹`¹§€pÂÿÿàÿàh0é*ÏÀn€,€$€úÿÿà¹#&Àìæ˜ý÷:ÿ(sÑ i@ a ñ÷æù!0ý÷éýhàõ÷Øþ(ÐþLà ñ÷Øù z(ùÑ!0õ÷ÀýWàøM(x(Ð(Ðî÷{ú(x(Ñ (pòJ!0õ÷Ÿýà(Ñ/p î÷nú<àíHˆ(8Ð x(ÑêHðôé(Ñü÷´û(Ð ý÷œø(àâJ!0õ÷~ý"àü÷êþààHh)ÑÜI	ˆ)ÐÝI	ˆ)Ð`ÛH€ü÷Øþ(Ñ ü÷—þü÷öü ü÷jüà0ð0ì˜ð‚ïÑL" jS©ñ÷;ú(öÐ†å>µðãþ(2ÑÉLÊHàa" ’"0#Ç¡ñ÷úÄH"80 b ’" 0
+#Å¡ñ÷úÆMÇH±")ðHì»HÅIeŸÙ¼W#-â°8 a"Ä kFÃ ÀI*0#ñ÷ù(Ñü÷ýû >½ >½µ®L iñ÷&ù­H"8`b !$0ñ÷ú½pµ@y
(Ñ ðÓúp½-Ð
!à! õ÷ÿüï÷óý(òÐ!-Ð! ï÷Qýp½pµ�H¥L@x(Ð h"C!ðüî h"D!ðöî1(ý÷õüp½Axx	CÊú:Ñ0AxxC(Ð pG…H@‰pGƒIˆj	x)ÐAxxC@@pG pGµ{Hƒjÿ÷ìÿä(	ÑXxxC(Ð! ý÷óü½sHxpG�I€H`‚I€H`‚I�H`ƒI�H`ƒI‚H`„I‚H`pGƒHgIIiÀÀ@BBÑ pG pGaHµAx)Ð!Apý÷ºü½pµwIJiSwJÓZƒp
+ÃpCyy+CÑ#ƒq#ÃqKh[ÓZr
+Cr‹h[ÓZƒr
+ÃrËh[ÓZs
+Cs	iIQZ�s	
+Ás!!€Ayy	C)
+Ñ !�q!Áq^I0 "ð î0  €p½pµ!YLWKBz­è”¸!Ç8P©zJ¢Z5C•BÑY`Åz†z-5C•BÑ™`E{{-5C•BÑÙ`Å{†{-5C•BÑaI)ÞÓðþ p½þµ �Hx	xC·!‰%g(Ð(Ñ y(zÐ(xÐ%!ÿ5˜1a5(‘	Ð(Ð%~à"9°ðNîxàh(ôÑ˜"±ðDî �^à ð,ü(Ñ`y(SÑh(áÑ˜"±ð2îMàäéD¹õí¤ëP¬¹X¹`¹<ïCBProcSMEMsgQCBProcMsgQ¤œYCB ProcôµÇ(À(<ÿ(À,<÷(À0<'z4<9VÀ8<="<<øL–¤Àÿç`zÀ�Ô"±8ðÞí @ ‚x›9 	ðœü(þ½pµ$ÿMà@@hî÷ødà)X)öÑp½úH!!I�`�h"’C�`pGpµ$óMà@@hî÷
ødà)X)öÑp½ðµ%“°ð÷ýíN4iìO@78h(Ú ð÷\úéHh¥�´#ç\3*Àk(ÐäH08�hI�`@ ñ÷Uùxh@@x`àáH8`áI @áI	xÚOC0?yjCxbü÷Lù(Ðxj(ÑÚH"h!ð$íyjCxbxj(ÑÔH"h!ðíyjCxbðÌéàÕÏH0a ÕÎIh@`ü÷Æû(Ð ñ÷ùû÷2û ÕÇH0a,Ú¿H%m0a Õ CÂH0aÂHa�}Õ ��ª©¨«õ÷sø(�Ð C„CÀC0a˜0ðÕû(�Ñ�™˜ðŠéü÷Ðø(Ð°I Èa¯H !@0`˜(~Ð˜ðšè(zÐ˜y(!Ñ™)DÐ˜1ðaý(>Ð™ ð&í–HÀ8€k¸j(4ÑžHh@0Ð!˜‰ý÷žú ¸b 
+ðvû%à ðZø�ü÷‰ø(Ð˜ù÷ ø�ðœîšÿ2R’Ña�a™šKhhSbkFb‹1: ð4éš€x�bö÷÷ùàÇàû÷›ù�˜Á~‘Áz
+‘Áy	‘ô÷¡ÿ™˜ðƒü˜™Áv
+™Ár	™Áqü÷Qø(uÐÕr°%*(0dü÷kø(qÐ˜(nÐ˜(kÑü÷>ø(gÑà˜à‡àõ÷2û(Ñü÷Eø(\Ðøi(ÐgHˆ(RÐfHˆ(NÐkF‹™:1 ðäè˜ðü�_Hh(Ðð~ì!C™B4ÑOH"h!ðì(,Ñ˜õ÷Žþ('ÑTHðhì™B!ÑOHˆ(ÐPI˜BÑkF‹™˜ð¸è(Ð …Cðßÿ ô÷�ý!ðŠî˜!ý÷äùàà 8b xbàøi(Ð9Hˆ(Ð8Hˆ(Ð 8b˜ð.ú(Ð˜(Ðû÷àÿ(
+Ðú÷{ú(Ñú÷aú(Ñ 8bà ð÷Åÿ8j(Ñ øa%I€ …C ü÷�ø&H0a ~Õ0h€Õ! ð½û�à0hÀsÐ8xðùÿ�ö÷‹ý(kÐ˜(hÐ˜€0k@h 0�˜ð@ú)àÀ¹0€¥€À¨€ÿÿÿ€ˆHôµÿÿÿþ”¸ÿÿýÿÿ÷ÿÿª¦€Œ¹¤ëX¹P¸`¸€ÿÿÿû˜€zÀ.Ð˜@y®š¾±¬'§”ô,(*Ñ˜ö÷Gý(%Ñ˜ðÝü�!‰
+�@	� 0y(Ð	š	™%2˜-1’ðè
+˜€l(
Ð	™š˜.1÷÷Ÿü
+˜@0€{€Õ˜÷÷ýàjà.à˜€z€*ÕÿH€k
�˜ðäï˜ðRï(ÐûHh�@Ð˜ðpë
™@™ð‚ë™ˆBÓ¸j(Ð™ ðxë!˜Iý÷úø ¸bðÄïû÷#ÿ(4Ð ð£ý
+�ø÷þ	�
+˜ðzü�
+˜ø÷yþ� û÷ÆÿáHij˜ˆ(Ñ)Ð*Ñ	˜À0~(Ñ˜@hÀÐ˜	!‰@@i(Ñàò÷qù(Ð û÷£ÿÐH0a ÕÏH0a-ÐÎH"h)ð÷„ýàQÕ0hÀLÐÊH€j8pðÿ(Ð( 0�yI		�qBy‘B~Ñ!�qy)ùÑ¾IIkB{#“@ÿ"RCºJCQc´I@{@1ˆ`²Hij)Ð(Ñ!(ø÷ú(y(Ñ(ðøû	!É@�€k(Ð!(ð¾ø™ ˆcû÷‘þ(Ð û÷Cÿ¤H0aàÕ£H0aâ 2M¨)ÙŒ„àÐ ÀC0a Õxh@x`žHz(
+Ð ð÷Uþ ÀC0a À„CÀC0a Õ—H"h!ð÷ý`Õøh@ø` ÀC0a Õ8i@8a ÀC0aàÕxi@xa ÀC0a Õ¸i@¸aàà  ÀC0aøi(Ñð÷Ñù�H�hB
C�`°ð½yKXk9x"Š@�CÙ
CXc…çpµ
 ðø(ÑuI €È`) ÿ÷�ü p½øµjHDiAi0"CAaaMÀ5hj&0ChbjOÿ 8a @
+(üÛð¨î @<(úÓWI`bH@8Bh`Âh‚`BiaÂi‚aBjbÂj‚bBkcÂk‚cYH€8BkciBa` 8ahj°ChbMHDaø½pµðºìð|î ï÷®þ,Ñô÷˜ûí÷Jüð�ûô÷Áûðpî,Ñð¨ìðnî(í÷?üp½BHµÂjRÂbAh ðáøí÷.üðù í÷-ü½7I È` pGøµ ü÷øð0ù4O/L%(	Ð`z(C`r8h"D!ð`éð@û z(Ðô÷šø
+ð ø‡#6¤+9½ïû÷Sý&(Ðû÷lý(Ðõ÷@ø(Ñû÷Sý(Ðû÷uý(Ñõ÷4øI(ÐÎaH€Mb z(VÐðSù8h"!ð.éõ÷!ø(1ÐO=rõ÷
+øHˆ)'Ð€>r&à¨€Œ¹¦€ÿÿÿ÷ÿÿÿý$¾À¢€ÿÿÿïÿÿïÿ°éº0€€ €�¹ôµX¹äéH¹ô÷æÿ\H]IhˆBÑû÷ëü(Ð ð£û!	ü÷ëþàû÷ßü(Ð à û÷Çý%rð’øø½øµOL`z€!C`r ðˆû(Ð ð”üô÷ø ð~û(Ð ðŠüû÷¿üCN%(0Ðû÷×ü(,Ðô÷«ÿ(Ñû÷¾ü($Ðû÷àü( Ñpj:O(
Ñð]ûõ÷)û(Ñ6H"h!ðœè(Ð ða8€à1Hˆ(Ð=€ô÷„ÿ(Ðõaàû÷»ü(Ðpj(Ð pb'Hˆ(Ð à û÷bý%rð-øø½øµðœý L ÀÑô÷øhFõ÷Ïÿó÷xøö÷Yøõ÷¾ÿ3"iFö÷WøðÛþð<í‚Âéø -ôÉìIð^üò÷Æùñ÷çû(ð•ý ÀÑô÷xùø½µó÷ZÿH"h!ð÷û½,¹ÿÿ°é�¹X¹ôµ¤ëøpÂûH€hpGúIˆh@ˆ`pG÷Iˆh@ˆ`pGõHÀhpG€0pµ@k%(Ñàk(ÑïH"d!ðRè`cíH"d!ðLè(àcÐ!�àk01¡c!�s`k(Ðàk(Ñ%(p½pµ€4ák )Ðbk*Ð%�sàkðìïåc¥c`kðèï ecp½ÓIµx +Ñ¬#›\py)Ð)Ð)Ð)Ñð0ü½µy(Ð(Ð(Ð(	Ñ ð ì !€0cÿ  4`s ½!(
+Ðy*Ñ]!Éà*Ñ/!	ApGµÑ ½ÿ÷èÿXz@Õ`h(Ðð®þ `` ` ½pµ@z%@#Õ y(Ð(Ñ ÿ÷‡ÿ!If²x ÿ*Ð! ð€þ(ÑšK´x!Zh¡@ŠCÿ!Z`±p(Ñ%(p½pµºÿüPœ/&z í÷ú”ILh
+à¡y©BÑáy±BÑí÷ú p½$h,òÑí÷ùù p½pµ@z@Õ(ÿ÷�ÿ@h(ÑðNþ(``Ñ p½0 `(ðìàéy¨yÿ÷Êÿ(ÿ÷tÿ ÿ÷pÿAhY`h` p½pµ@z$@Õ(ðì(y(Ð(Ñ(ÿ÷êþ(Ñ$
+à,Ñ(y(Ð(Ñ(ÿ÷µÿ p½pµ<!80ðï%” U  !t0ðüî !˜0ðöî`zï!@`r zý!@@@ rÿ ~0Uþ!4 U 	ðŒþp½µŸ € ð¼ë 	ð.ÿ ÿ0!0ðï½9"µ\ÒÐµ"’„)
+Ðy(Ñð¦ë" õ÷Zþ½"ÿ!øçµ!ÿ÷ãÿ ÿ÷Ïÿ ÿ÷¥ÿ½pµ
í÷Bù2IIhà¡BÑhà	h)øÑà¡y©BÑáy±BÑí÷4ù p½$h,òÑí÷-ù p½(Ðy)Ð pG!‰@ÀjpG )Ð#
+y›É*ÑˆjpG*üÑkZÓ~˜1~:õDpGpµÿ÷©þ ÿ÷éÿ`z@Õ	 €(Ä`HàbH c  @] 4(ÐðÖïàþ €5 u(h("ÑðÁý((`Ñþç\ThÀÄÀ{Ò'Ò4T! ð6î!¡q!áq!H U zAI¡rp½pµû÷úûM(Ð(iÿ0a0@(Ñ p½ y(Ñèh(+Ñì`)à&(Ð(Ñ`y(Ñ ø÷Šù!ù÷�ø,aà(Ðì`àì` y(Ð(Ñ à!(Ñ`y(Ð(Ð.pà(Ñ)pà (p p½pµ `q ÿ÷þ ÿ÷\ÿ`z@
Õ	 €(Ä``z@Õû÷¹ù(Ñ ÿ÷ŸÿÎHàbÎH c  @] 4(Ðð>ïàþ €5 u(h(Ñð*ý((`Ñþç4T! ð¬í!¡q!áq!H U zAI¡rp½µÿ÷ÿí÷4ø¸J¸KÑhIÑ`" 4"qa{œj¡BÑ\kŠ@”CÙ
C\cí÷%ø½µÿ÷ÿí÷øªJ! 4!qÑhIÑ`í÷ø½!(VS”3^^–Ç
+Ðy*Ñ]!Éà*Ñ7!	ApGpµÐ y(Ñ ÿ÷çÿÐ ¤bð>ê ÿ÷(ÿ–Hàb–H c–H(`–Hh`–Hè` õ÷óûp½pµÿ÷ÌÿÐ hq(­bÿ÷ÿ‰Hèb‰H(c‰H `‰H``‰Hà`(õ÷Ùûp½µ `q`z@Õ ÿ÷öþ] Àx! ðí @! Áu!u õ÷¾û½µðøé(Ñ ½ ½øµ%jN°h(Ðì÷™ÿ´hà ÿ÷éÿ(
Ð°h„BÑh°`à h(` $h8ðÞìà%$h,èÑ8ì÷�ÿø½[J!8µpQpQ`aƒ@›(Ya÷ÓZL\I"h’YJ[H[Kð¸é(Ðþç"h’XJYIYHZKð¬é(Ðþç"h’WJWIXHXKð¢é(ÐþçðžûðÀû=ITH1H`ð˜é 8½ÿµ ƒ°�0ÿ÷'ý(�Ñ �">Hð¾ì
+Ñ"EH#ü÷òùÑ °ð½(‰q!DÉ ðzì™!q¦qçq™Så®�5“*•‰'á`
™ 79sazû @˜"À@Cara! ÉCÀ0�‚’Á‚ÿ!¦qa˜(~Ð˜([Ðpj(Ñ ðxû(pbÑþçpj!0Éaˆb$H"h· € ðöì!ÿ Iaxsˆp ÿ÷	ý(>Ñ(ð$ì«çÀÄÀ{Ò'Ò\À¢€ÝÐ­Ô oÀñÄÀ8oÀø¹x8,Èœ`T€QÀ¤thÀYÀm4Lè£À™· "€	²ç˜(Ð ÿ0™"0ð"ì %@ ‚ iÿ0a0ƒEƒþ!Ew4 Uà8à`zï!@`r À b…aÅaEb <!80ðÊë ˜0!�ðÄë  !t0ð¾ë €0uEuÅ‚˜(Ð™˜"ðêë z¿!@@@ r û÷,ÿ ð{ý! 
ðMûüH!h€1ÂˆÊƒB‰:€zºp@zøpd È‚ Huÿ!}1U˜(Ð(Ð(Ð(ÑïHðb ÿ÷þ ÿ÷
ýìHàbìH cà 2Ã¤eŒ7–QÁ¤bð\è ÿ÷,þà ÿ÷‡ýà ÿ÷>þpj(Ð`z@Õ À €jp!ð\ë ð•úì÷ñýÛIHh(Ðàh)ûÑ`àL`ì÷æý Áæpµy%(Ð!qà
+Ð ÿ0"0ðjë !@ ‚ ÿ0Ja0ƒAƒAwþ!4 U`zï!@`r <!80ðë.Ð "1˜0ðJë û÷’þ ðáü! 
ð³ú y(Ð(Ð("Ñ-Ñ ÿ÷Ðü
 €­I c­IAc­IÁc§Hàb§H c õ÷˜ùà ÿ÷¢ýà ÿ÷¸ýà-Ñ ÿ÷mü`z@Õ À €j(Ðp!ðÐê p½>µ#Êh!‘’‘ây¡y yÿ÷ þ! "t1t0ðrë!€1(
+}€0uJ}BuÉŠÁ‚ayiq!I`zhrˆIébˆI()c>½>µ#Êh!‘’‘ây¡y yÿ÷ôý! "t1t0ðFëay€4(iq!}€0ua}AuáŠÁ‚(>½óµƒ°
 Êh!‘’‘sxˆ9 Û)iêy©y#ÿ÷Òý~Ðhy`q(y q 0ðbï i¤b$0 a) <"8180ðë) "˜1˜0ðë)  "t1t0ðë.€6'0}€78up}xuðŠø‚ð‹øƒ) 1 
+ˆ 0€Šx‚pÉxÁp™"Þ0ðnê· €)" ðæê ÿ0ð!�0ð(êèjàb  0‚}ï!
+@) 1‹}ÛÛC‚uB}÷#@K}ÛÛCï#Bu@K}ÛÛCBurkzcòkúc	}u z¿!@)zIÉ‰CA r(zIÀ	ÀCà3à!r`zjz@Ò@ÒCý"`r@jz’ÒRC`r €*| tû @(z@À€C @!r)É} Áu(z@Ô!Éh‚iaŠaÂiÊaj
+b@jHb °ð½µ	y )%Ð)Ð)4Ñay)1Ñ!ÿ÷Úþàè£ÀPúÝÐ­ÔÀÄÀ oÀñÄÀ8oÀ{Ò'Ò!ÿ÷ìþà!ÿ÷ÿ(Ð"’¡Ij‚)QbÐ"1Ò‚‘bØˆ|•„;€¿Jê½øµ@z@Õ ð/þ(XÐà y(
+Ð(Ð(	Ñ`y(Ñ ÿ÷¯ùà ÿ÷¤úì÷öû,Ñþç`z!‰@e(Úhj(Ððø& ÀnbúM †bhh BÑhh`à(Ñþç)Ñþçh¡BøÑh	h`ì÷Êûhhà¬"\*Ðì÷Åûàh(ôÑì÷¾ûæHp¨h `8¬`ì÷¶ûø½pµì÷¬ûÞHDhà ÿ0"10ðÃý(Ñ(ì÷¡û p½$h,îÑ(ì÷™û p½øµì÷�ûÏHDhà y¨BÑ "9˜0ð¢ý(Ñ0ì÷€û ø½$h,ìÑ0ì÷xû ø½pµ@x(Ñ p½ì÷hû¼HDhà y(Ñ” jx]‚BÑ ©t0ðyý(Ñ0ì÷Wû p½$h,èÑ0ì÷OûÜçµì÷Fû¬IIhà5"R\Õì÷Bû ½	h)ôÑì÷;û ½µì÷1û¡IIhà
+zRÕì÷.û ½	h)õÑì÷'û ½µì÷û—IIhà
+zÒÕ•ÖÃ¥€=MËI¤ì÷û ½	h)õÑì÷û ½µì÷	û�IIhàÿ"~2R\*ÐJzÒÐì÷û ½	h)ðÑì÷úú ½µì÷ðú�I#IhÛà
+y*Ñ
+zRÔÊj*Ð2Ôy,Ñ*Ð’zÒÐì÷Ûú ½	h)åÑì÷Ôú ½µÿ÷�ÿ(Ñÿ÷’ÿ(Ñÿ÷¢ÿ(Ñÿ÷Ëÿ(Ð$à$gIhHðí,Ð(Ðî÷ìÿ½î÷Õÿ½(Ðî÷Úÿ½î÷Ãÿ½pµì÷ŸúXILhàáh©BÑì÷œú p½$h,õÑì÷•ú p½pµì÷‰úMILh
+à!y©BÑáy±BÑì÷ƒú p½$h,òÑì÷|ú p½pµì÷qúAILhà!y©BÑì÷nú p½$h,õÑì÷gú p½pµ%ì÷Zú6IIhà¡BÑhà	h)øÑàazIÕ!y±BÑ%$h,Ð-óÐì÷Fú(p½µì÷<ú'IIhàJzÒÕì÷9ú ½	h)õÑì÷2ú ½µì÷(úIIh	àÿ"~2R\*Ðì÷#ú ½	h)óÑbÑ
+A|?Xç.¼ì÷ú ½µì÷úIIh)Ñà	h)Ñì÷ú ½
+y¢BõÑì÷ú ½"˜0µðü(Ñ ½ ½ 0@}ÀÀpGÀÄÀ\8pµì÷âùúHDhà$h,	Ð ð>ì(÷Ñ(ì÷Øù p½(ì÷Óù p½ 0€}@!ÂïH*hÐ
+CàŠC`Ïçµðqþ('Ñ ÿ÷Bÿà ÿ÷™øÿ!~1	])Ð€j(Ñ! ÿ÷GÿîÑ ÿ÷-ÿÿ÷…ø,Ðay)	Ñÿ4a4a)Ð€j(Ð ½ ½ÓHh›çøµ$ì÷†ù-Ñ ø½(y(Ð(Ð&6(Ð(Ñhy(Ñ(ÿ÷Vø€y(	Ñ$àhzÀúÔà(ððê8ì÷dù ø½óµ$�°ì÷Wù�˜ÿ÷Þþ'?$à˜(Ð(Ð(Ð(Ñhy°BÑ.Ñ(ÿ÷$øÀy(Ñ$à(ðÂê÷çhzÀöÔ™(ÿ÷Íþ,Ñ-ØÑ˜ì÷*ù þ½øµ$
ì÷ù; 2¨exA\tªðîè'&&&& ð®ü(Ñÿ÷–þ(ÐAzÉÕÿ55à! ÿ÷¡ÿ(Ñ$! ÿ÷šÿ(Ñ$àþç,Ñ(ðVë0ì÷ïø ø½pµ$ì÷ãø-Ð-Ñ! ÿ÷}ÿ(Ñ$! ÿ÷vÿ(Ñ$àþç,Ñð8ë0ì÷Ìø p½øµ$ì÷¿ø+ð�è
+
+
+
+
+
+
+
+
+! ÿ÷Pÿ(Ñ$! ÿ÷Iÿ(Ñ$àþç,Ñ0ðë8ì÷žø ø½øµ$ì÷‘ø;ðbè!!!!! ÿ÷'ÿ(Ñ$! ÿ÷ ÿ(Ñ$à ðü(Ñÿ÷ýý(Ð@zÀñÔà,Ñ0ðÜê(ì÷iø ø½ðµ …°�ì÷Zø'-�%Ð-RÐ-Ð-NÑ ÿ÷Øý(IÐ@zÀFÕðpéa` `ð¨ï=à ðÝû(Ñÿ÷Åý(6Ð@zÀ3Õð\éa` `.à%H€h(Ð �*àæh¥i h�ðœê‘�˜1y@C·ŽiˆtC|É�
Ðš9¨š›qA€™AÓhFÈ€±AÒ˜*;1ðÎî@yA*ðèïá` ` ð|ê˜ì÷ø˜°ð½I(ÑiæÈhæI	xˆB	Ñ ûåÀÄÀ£€è£À\ ñåµÿ0�0ðVþ ðþ½Bz÷#É@	
+CBrßå	xÉÐ Úå@zÀÖåµYy)	Ñ*ÐðSþ½ðBþ½@Á €	ˆ*öÑB
+€½µ@z@Ô ÿ÷�û½)Ð þ÷Gþ½! þ÷*þ þ÷þ½pµë÷ŽÿôH@hàyh)Ñ1ÿ÷Úÿ (õÑ(ë÷‚ÿp½þµ!
+hFÀéHDhðí',à y((Ñ ÿ00"iF�ð†ù(Ð €%)k0ðíÜIˆBÓàA}I		)AuÓ!Auš!! ó÷Ÿú! ÿ÷œÿà.c$h,ÐÑþ½µðäì!‰ac! IaHu½µë÷.ÿÅIIh)Ñà	h)Ñë÷)ÿ ½ÿ"~2R\QÈ|pE±dÊÓ*óÐë÷ ÿ ½øµ$Åy†yë÷ÿ·HCh
àØy¨B	Ñ˜y°BÑþ÷©ü(Ð@ih+ïÑ8ë÷ÿ ø½pµ)Ð "˜0ðŽì-Ð ÿ0")0ð„ìp½pµ$ÿ÷Tüÿ00
ðRÿ(Ñ$àd$$êy©y(þ÷‰ýõÑ p½µþ÷¯ýay)Ñ(Ðÿ0a0z(Ð ½ ½µÿ$ë÷·þ‰I#Ih›àÊRi¢BÚ	h)÷Ñë÷­þ ½ "µðû(Ñ~I#JhCJ`½" #µðõú(ÑwJ#Qh™CQ`½pµë÷…þpIIh)Ñë÷„þ p½"&
y-Ò3«@BÑdC	h)òÑë÷pþ p½øµ%ë÷dþ_HDhà`z@Õ "9˜0ðyø(Ñ%$h,Ð-îÐ0ë÷Qþ(ø½UI€@@iUäþµ&ë÷@þ% 5�h{ÿ(.ÑMO yx#‚@
+B,Ñƒ@Chsyp�ÉLa0!ACEH0!0ðˆë 1ù«ÿélG<Ø›€0c y(Ð¸h(ÑðÏúr} @’ �xh{"ðòú&˜ë÷þ0þ½@(ÉÓôçµÀ0jð^ì !Ø0ðZëŸ € ð4è½µÀ0jðNì !Ø0ðHëŸ € ð$è½pµÁy€y$þ÷Ëûêy©yþ÷Šü(Ñ$(y(Ð(Ð(Ð(Ñhy(Ñ(ÿ÷Áÿà(ÿ÷Îÿà(þ÷dü,Ð(þ÷|û$
+à(þ÷aûà(ùÐ,Ð(þ÷oû p½ÀÄÀ€„\8ƒÀûI ppGøµ !aC�öH60x@€ðŠì1x	Õ±‰)Ð1|)Ðà!‘™w|)Ð=1 ðöïà$ €@hÿ-Ðÿ/Ð@0Á}©B
Ðš*ÐB}à‚}‘BÑÝJi‰Åu	]v!yCØJÀ}‰	ðÐïàÿ!@0Áuvd$$,ÔÓÐJ `!AC‰ 1ËzIz‹BÑÍIÈvø½@òÕø½øµð¶ï(>ÐÅM$ Áˆz@€ð&ì#XCÖ/ªhI‚•v31@
+1ð¦ïd$$,êÓ$ `CByÔ!àÿ! 	à#CC[yÔ@ BóÙQu�h@0�uÐh@0�u ÿ÷_ÿd$$,ÙÓ ø½óµ8!' �°ð€ê ðæëKà hCžIFÿ 0 p
+`p
+  p àp6(%qð^ï�˜@zÀ-Õð~ù($Ð0xÀ r°‰(Ð `r°‰ q
+àq0xÕ°‰(Ñ `q‰H› 8‚{!˜@BÐ¡r„JxBÐárà ð ë¨BÐ `q47m---±Ù8þ½pµ
ÿ÷ŸÿwII(ðïp½µÿ"‘2#iF¨ò÷nÿ(Ð™ 1ÿ÷äÿ™ˆr
+Èr™ ò÷+ÿ½pµ
ðù(Ð`I,Ð zJx�BÐI ÿ÷#ÿ(Ð[H"!@ðîé0ÿ÷Çÿp½-üÐ(zIxˆBöÐ0ðÖîp½!µ‘OIjFÉi41ðÐî˜½JJLI2µðÌî½ µð,ëHK"àÁZP3»óÕdK¢ñ°É@
+q(øÝ½pµ
ð¼î^  u `u/  v -`vÑàz`0àr |	@ t }	@ up½µˆ°¨ÿ÷Ûÿ©"‰ ð’é°½ðµ…°!hFÿ÷ìÿ*N$' ðèêðˆî9©@°iBüÐ¡hF	¨ðbî(©ðVî(ðzîd$$,âÓ°ð½pµHÀiKbz)†°*Ñ÷!
+@br!p
+"!40«Ãª
+K’[	:	9	8ðXîÿ÷éù(Ðÿ÷²ÿàìB£ÀŒFLØF¸F@¢€ C brp-Ð ÿ÷ÿðgþÿ÷Yÿ°p½ÿµ�°$
i“O(Ñ˜ðÈú(	Ñš˜!ÿ÷¨ÿ! ø÷"þ ç(i(Ñ8ðîˆHðî‡H(a ð`êà ðÎød$$,÷Ù.ÐðJþ|H	"90ðèèyH	"9	0ðâèvH	"90ðÜèsHÀ�{‘j˜ø÷ëýqI(iÿ÷þý(ÐlH)i"$0ðÈèš˜!ÿ÷R0„`Mo…þ\ÿXçfH8@(Ð pG8µkFx 0pXx@0	
+0Xp X€ iFðˆíd,÷Ù8½UH#0À~pGpµ`"TMBCmR 2Ñr”tððéðòéÿ÷Xý !@‰A ð÷ûùp½IHó!‰@µðDèFH€!ð@è½(Ð)zÑ€"CàIIrpGþµkF&–Xz#CkFXr #C)Ñß!@kF\r–yQÀÀIC!Cqðªéð¬é’š™(1#ï÷Ìýþ½pG'Iÿ õ0`'I&H`pG(Ñ pG(Ñ pG(ûÒpG"IBCðµIT&$&tftK¦�2Aæ�Ï&`½\`!KiC[Ë‘T3	K`@3XuKhR@3ØuKh@3^ƒKh@3žƒKh@3vKh@3˜uIh@1*ŽwÜÓð½iFoÀíBØF@<oN<=£ÀûI€XpGpµ„øM(Y(Ñí÷‚ÿ (Qp½pGpG"ÒC#ÀÁpGµh$"S)ÐJvÞÎÞ\O½I€—AhŠBÑ"à$"JC#2S)ÐKC`½0µ$
+h#*Ð*Ð#*ÐS[Mh«BÑ 0½#*ÐSš`Qˆ` 0½h#)ÐJAhŠBÑ"àŠ’h)ÐKC`pGµà!ë÷Wù ÿ÷ãÿ(÷Ñ½µàhð	û ÿ÷¤ÿ(÷Ñ½ñµ‚°&ë÷Ìù�½H!8h(ÑºHš8iCi“BÑAa·HDh”%à ‡¸h›Ai™BÑv!ë÷!ù ¸`à©‰ˆ` -•Ðh ,Ð`§J h)ÐH BÛÑ.Ð¢HAh©BÑD`à™`�H8@h(ÑœH™hBiŠBÑ!Aa—H\0Dh”%'(à$ `C›†ðhAi™BÑð�ú00$!ðÌîà$!iC‹Ø`0ia110"ðvï S-•Ðh S,Ð`J \2hS)ÐH BÍÑ/ÐzH\0Ah©BÑD`à™`˜ë÷;ùþ½øµ$ë÷0ùpI9
+h*Ñ—{XQåvó	iIi©BÑ$lO&;hyhàŠÒ’hRiªBÑ$2)ÐJ,Ñ2+ÐZŠBëÑë÷ù ø½ÿµ�°'\HhDh!àZH¡€h‰
(x™@@ˆBÑ™(nÿ1€"1ðû(Ñ™l AU˜)î÷"ú8,Ð`8.Ðp B×Ñ°ð½ÿµ�°BH8h)Ñi‰ x@@¸BÑ n)ÿ1€"1ðàú(Ñl U!(î÷óù4J h)ÐHQhˆBÒÐ˜+:1ÿ÷žÿËçpµë÷¢ø(H$h(Ñ0ë÷žø$H8a$H\0ðµù(Ñ!Ih(ÐDHh„BÐ€@€h(Ðþç(ðøp½I(ÿ÷aþ(Ñþç0ë÷yøp½ÿµ�°
ë÷møH$h((Ñ8ë÷iøH\0ðƒù(ÑIh(ÐDHh„BÐ€@€h(Ðþçä¤È|12)¨ðø(Ñ˜ðqùcçåK˜2)ðù(Ñþç8ë÷7øVçðµ#!ÞN›Ùþ0TSÅlpÞJ0h77(…°_Ñh˜C`1`9`0i‰Ei±h-Jˆ’Ñ!ê÷ˆÿÑàkFZyRÔiy)Ñ)õ÷ÿ(òÑkFy€(Ñ1i"(î÷Pù(åÑ0iàç0iî÷
ú²à
+ˆ 0#oÀ†Øy¶(Ñhy(ÑˆyÀ	Ð(ý÷Æþ
!‰@À‹à"0ˆ!80€’#o"h0ð#ÿ’à(~Ñ"h!0
ð‡ýŠàph(­ÑhhœC`q`9`§Ih1‘ñieiIñaÕ1jI1b-Ð HÕ±iI±aðZí€x€(Ñ À)ˆj(ÐBhRB`ˆjiIa ðÂøMà�ðBí€yÀÑðh�y‰Õiy)Ðì÷\üðhÀy(Ñ˜ð.íˆ9à(Ñ˜ð&íˆ"9€ ˆ@8 €˜ðí€x€(Ñ|J’ ‰|J|K ð<í(Ð À(€j(ÐÁmIÁe ààë÷3ù™ ë÷ûà ð{ûfIgJ2\8ðvø8h(Ñí÷‚üYæhI2 `hIgHPUfo>`iIgH`pGøµh&1S-ÐR-Ð1S-ÐiIch™BÑ ø½S-Ðn$!qC&`	È` h$#XC9a h"XC0ðžì h$#XC8 0~w@~Hw h$#XC} 0ÁxÒç#’@ÒCÁp8@0ðšì!h$#YC	Èb ø½h!S*ÐQBh‘BÑ pG$!QC0pGµi)Ñë÷£ø½ð
+û½÷µ‚°(H05à˜ÿ÷Œü6Ðgh/*Ð˜%�h56‘")0ðHì1(z 1vhzHv}ç"@ê{Ò’ÒCu(0ðNì1@1ðbì™:1 ðKþ(Ñ hÿ÷»ÿH0h(ÄÐ¨åH0h(ùÑ˜ÿ÷~ü(ôÐ™`ðþ™åÉÐ �|1Ä1ÜÄÀäÄÀ¸ <?O€<AO|<µðû ½pGpG(Ð 0@}ÀpG(Ð 0B}÷#É@	
+CBupG(Ð 0‚}û#É@I
+C‚upG(ÐzÉU|>üLW…Ú«vRRÉ
+CrpG(Ðzý#É@‰
+CrpG(Ðzï#É@É
+CrpGøµ!(Ð#ÛÅkj+Ð1+j+Ð4’3"ð´èø½pµh(Ð€m%(Ð
ðÝú h…e h
ðØú%`p½ÿµ‰°ú¦¨ŽÎ�ŽÀ!
+¨NÀ˜ CÑ 
°ð½èx©x®CÀÐœ,Ð zÀ
Ð m(Ñ
ðŸú( eÐ mT"0!ðÚëèx©xC€Õ
+˜(ÐãJ	˜h!�GkF}@u™'" ðBëÝJ	˜h!�GÛJ	˜h!�G!- Uèx©xCÀÐ'! ðòê!- Uhx)xCàq  qhy)yC1 �"1"
¨çrð—ÿ(Ñ ".0©ð
+ë ">0©ðëà ").0ðè ")>0ðè0x s "±0ððê1 "1
0ðèê z!C r kçþµ'+]Ðhx*xC(Ñ•‘py!ªíÃÛHY;—ÓÞ(Ð!2ÿ2#20ÿ÷=ÿhx)xC
Ð(Ð(Ð(=Ñ+à
++!0ðÔïëç0ÿ0a0«y"š@‘Cw+àpy(Ð(&Ñèx©xC€Õ,
Ð zÀ
+Ð  †@àbð¶ï(Ñ`c  ‡py(Ð(Ñì÷ù(Ñèx©xCÀÐðëþ÷ú,Ð zÀÐ0ú÷«ø8þ½óµ�°uN.Ð À,`j(Ñ
ð ù`b(ý÷¨ûiy)Ñ#!	\Ê	Ñ
+Ô‰Õ€0@h(Ñ
ðŠù(x`
Ðxhà j(Ñ
ð€ù baj)Ð"j*Ñ0þ½›12(ÿ÷Rÿþ½pµ +Ð%í[*ÐXj(Ð0Ñàj)Ð1Ñ p½"ð>ïp½KIIHµ`KIIH`KIJH`LIJH`LIKH`@IKH`=IKH`;IJH`ì÷¡ù½pµý÷ûù ý÷;û! 1K}÷"@Ku%zû"@#"%r\–Õ€0"Òh¢bhPb CKuàÔ�Õ CÀD[ó°]%r ú÷ø p½óµ‹°ý÷Íù� ý÷û#!	\
+Ô‰cÕ!z"C!r!šÉe*
+Ñg!ÉG(j(Ñ
ðçø(b-jàmj(")41¨ð ê¯-Ñ $æ˜)1(/Ñ 2ì2p4à6\6\6\6\6\6\6\6\ä<Ü<Ø<ÿÿÿÿWÈ<	Wà<WÐ<WÌ</WÔ<EWYWmWÿ 0]p z"C rš(2˜;ð„î ù÷Žÿ Üåµ€4bh*ÐÑ{ 3)
+Ð)Ð)ÑÙxÉ	Ñ„0ÿ÷£ý½ØxûÔ€ùÔ
ð‚ø ``½ pG pGÿ1a1
+€#C(
+wÐ!É@�j)
+Ð
+iR
+a�jÊhRÊ`€j�mI�epGpGIH`IH`IH`IH`IH`IH`IH`HI@h`IH`I `IH`IH`pGH!µð°èH!p!�`Á`½WúD<™zH<årL<zPòÁ@]Ö‡³P<[[T<�\X<Ã\\<ÜÄÀ`<`d<p<…\€?‰\ˆ?¸pµý÷±ø0ý÷ðù,Ñ!	@jàhkðfép½pµ
ý÷àù(ý÷™ø$4áy0I
+âq¡yì0)Ð)Ñ`0@|‚BÙ"à)Ð)
Ñ`0€|‚B	Ù")ÿ11(ð"ÿ  qp½(ðOùp½8µ
ý÷jø"’}"ÒjC43!ÿHð&ê8½óµ�°ý÷Yø(ý÷˜ù(iFë÷Hü'Ðèh`a ‰!s˜r!ð:è· €)*ÿ1˜1ðfí$60y#Ôà78{Ô#°x"€Á˜ðé˜™` þ½ðµ…°©ÿ÷ÁÿÑ °ð½0ý÷ø0ý÷Vù$4 ðü!àhIr� h’� x1€ÀÂì1˜€2«ð(íg!Ér˜;¡ð$í!˜"$1ð"í˜"}K![1ðRè(ë÷ü Àçðµíº¼<_º«�8 ‡°�0©ÿ÷uÿÑ °ð½0ü÷Ëÿ0ý÷
+ù� À0@j$40� ðÇûàh� hš�’ x!€ÀÀÉB˜!«ðØì€6pk‰@¡x
+Õ"’ K"Ý!ðÖì�	à‰Õ"’"0!#ðÌìš˜+¡ðÈì(Ð x€Õ˜g!šÉA˜ì2ð¾ì!˜"$1ð¬ì(Ñ8ð(ïžç˜"}K![1ðÖï8ë÷ û �çµü÷]ÿ0©ÿ÷úþÑ °p½ À0Fj$46 ðUûàh� h� !0ðˆì"˜Ò!«–ðhìš`0|Ã{C_0 �s	 Ðs
+Ct
+Pt(ë÷`û Ëçøµü÷ÿ(ý÷[ø* ì6,ÄUÑ(ÿ÷®ÿà,Ñ(ÿ÷,ÿqoà,Ð,	Ñ(ÿ÷Úþ±o(ÿ÷‹þ ø½ ø½pµê÷Oùà ü÷íþaz$0ÉÕ€y(Ñ! ÿ÷Áÿây¡y ü÷ÜúÑ8a*°üsòÿ,éÑ(ê÷9ùp½µý÷ø�!‰@·!‰bÿ1ÿ0-1@ðì! ÿ÷ïü½µÿ÷æÿ ÿ÷Ãÿ½þµ'ÿC)‘8Ð˜ü÷òÿ�!‰E,À4 k(!Ñ#Hšh!#í÷ù!O(Ñ @í÷XúÀ6°k9ðnë!c‘°k9ðhë!ÉCÑ˜@ cà@ c"+’H™ì3:ð@èþ½ñµ‚°˜ü÷¶ÿ�!‰DÀ0€k(%ÐIðBë%À5)cI	à±]fò”¶@B…a¸kð0ë!ÉC(Ñv.c"’#úH™ì3ðèþ½øµü÷ƒÿ· ü7€!g#>*IÛA6aàðzë!	dài(	Ñ” A](3:t0ð¸é àa(ÿ÷¥ÿø½ðµ¥°Ei(ü÷þ(ü÷Tÿ	� À(Gj0‰$4†	˜#�0c0Ax7‰
+ªð-ý#˜"à0„F€{�#˜€3o�˜™’�`F‘AŠ¢’‘Øn�›š!(ðèú(ÑÍ¹Ù§4c
+ÔŸð!(ðÙùà	›"’9" 12‘$’ 1’ÿ3$01*>3˜2�‘æ1;ðë$™0ðë(Ñ %°ð½ iðxî!(ÿ÷�þõçþµ
¨ÈoFÇ2) ðúêþ½ðµ…°ÿ"‘2Q#©¨ñ÷ãú((Ð8ü÷Óþœì0‰ÁˆkFÃ4°x%€
+4Á52 #ÿ÷Îÿ x(p
+hp`x¨p
+ép™ˆr
+Èr9ÿ1š18ñ÷wûLåøµGi8ü÷cý À8Fj(‰$4!6@1ð¨ê(Ñ ø½!D �S 0d8ÿ÷wû(Ð!8ð@ùíç iðî x€Õ!8ÿ÷˜ÿ  q ø½!8ÿ÷þø½pµ‰Ei(ü÷(ý$4810ðtê(Ñ!(ðù p½ iðØí y(Ñ!(ÿ÷oÿ  q p½µü÷Jþ(Ðayì0)
Ñ!zI
+ÕP!	\)Ð@‰ÁÑ€Ô ½ ½>µÿ"!¨ð”é"’ #ª©ò÷áýI¦à+0eÇ œ¾é÷=ÿáy yü÷-ýà ð¿ýây¡y ü÷çýõÑ(é÷/ÿ>½øµé÷%ÿ.�%Ð0ü÷þ Ð @%(z'(Ð(Ñì ]@Õ0ÿ÷¥ÿ(Ð0ÿ÷3þ  /rc90ð“ø˜é÷ÿø½/rùçñµ‚°˜ü÷Úý!	Eèj(:Ðé÷ëþ� @&0z'(7Ð(+Ñ /c0rhkð@íÍ "€#’JH™ð:î˜é÷Óþ˜ÿ÷}ÿà4 {@Õ˜ÿ÷\ÿ(Ð˜!ÿ÷«û˜ÿ÷ˆý(k˜	ðIø˜é÷·þþ½…a‡“]eÍ "€#’FJFH™ð
+î7réçpµFi0ü÷<üpzÀÕ(‰AHy@Õ0ÿ÷”ÿp½ 	1$0ð=ø(÷Ð 4 z(Ñ(ÿ÷þà(Ñ(ÿ÷²þà(Ð(åÑ(ÿ÷äþ(àÑàrp½µü÷Ný)K hL!#ª G½pµ
!ÿ÷Gû!ÿ1*1 ð¢úp½�hI�`ÑÁhIÁ`pG|µ
"¨ðàë")]ª›F,gJXöhFðÜë˜ÿ!	
+@�
+@
+ëãh˜BÑ˜@	[@	
+Y¡hˆBÑ |½ |½‡“]eH<µð%û(Ðë÷…ýÂI €ˆ`Àë÷Jýë÷„ýð®êë÷pý½øµ$%&'é÷÷ý�¸Hh�ÕÁÐ$ÕAÕ%�ÕÁÕ&Õ@Õ'.
Ð,Ð-	Ð/Ð¨L¥hàà`ÿ÷¿ÿ¥`àð|ê˜é÷Ðýø½Êçµé÷ÆýðŒùðŽù é÷Ãý½›H!r!ArpGpµé÷²ý•H$h)C`èÔ¨ÕÈÕˆÕë÷¹ý�Hÿ!IÁ`BhÒÕ�`à$d‰Iha"C C`‡Iˆh‡J@ˆ`0é÷�ýp½µì÷ùƒI@Z‚KIXCÉhðNí		@½€½À½	½µÿ÷âÿwIˆBÑwH½wIˆBÑvH½vJwI�BÐvJ�BÑvH½vJ�BÑsHÒ8½tJ�BÑsH½sJ�BÑsH½sJ�BÑOœgK(iôQ ^rH½½øµ$[H`ë÷’üì÷ÌømI
\ÿ÷¬ÿ)ð®ïkN#2ððë@aA-ì÷ºøfI@Zì÷sû9ðšï#2ðÞë@aA)ë÷Ÿüì÷¥ø]I
\ÿ÷…ÿ)ð†ï#2ðÊë@aA-ì÷”øUI\ÿ÷tÿ9ðvï#2ðºë@aA)ë÷˜ü ë÷…üÿ÷aÿ1ðºë@ë÷ƒüÿ÷Wÿ!ðXïDJ#ðœë"€aAë÷�ü`ë÷Âü ÿ÷ÿ ÿ÷ÿë÷ýë÷Òü9Lÿ÷Tÿ!ë÷ýÀ ÿ÷ÿÿ÷ûþðžøø½pµé÷±üHh¡C`àÔ ÕÈÕˆÔIha"C`È
+Iˆ`ë÷ÈüIˆhJÒCCˆ`(é÷•üp½Jh ‘CÑ pG0€ä¹!€(€ÿßÿä² †·T@]Æ°ø$T
6nª
+€ºŒðIªuë|’ª³@Bø² ³³ÀÆ-„µð_ù"/KQ(
Y&™$kÔ5CÝhChÐ“CC`BhŠCà“CC`Bh
+CB`½µðø½ µë÷<ú ë÷9ú ë÷6ú ë÷uú ë÷rú ë÷oú! #ð@ø½pGIµˆh@"Cˆ`H€8hJ@`�hJ@�`AhJ@A`�h"‘C�`IHhJ@H`ì÷øHÀi(Û@! ë÷fÿ! ë÷bÿì÷ø½l¶€(€ÏÿÏï{û«µªþ¿"€@üÿÿ!€
+*µÐ*Ð*
Ñ+Ñ! ðŽíHBi!ŠCBa‚iŠC‚a½�µðø½ðµ$…°'%¨ðVé(+Ðï÷ÏøkFY|(ÑÉà‰)Ú$©ðHé(ÑðPé.Ð(	ÐkFÙyA@ÙqYyA@Yq{A@skF|+’:!¨ë÷ý°ð½üHhII` pGþµ&øH-Ñ†`ÿ÷ðÿàöL-ÐþçòO!@7�`à ë÷ÄýdÐøk€÷ÕïIîH`ðIîH`ðIïH`ñIïH`ðHxðHpðHñIxpñHðI`àH@8AjphÌ( mA@“ÉÉ)Ù à@jÀÀëL!P9àp˜0ðé!çH(9ðþè!æH9ðúè!äH9ðôè!9$0ðîè!9@0ðèèÉI"1) kFÃ"ÚI`:()#ðîÂIÿ H0æqˆ`þ½¿Hµ@0Ah"ÒCA` ë÷[ýÏHAhIIA`AhCA`
+ ë÷OýÊHAhIIA`½±HhpGÅH@hÀÀÐ­Hh(ÐÕçpGøµ'©H€h(Ð¦H‡`ÿ÷PÿµI `9ðœè³L²! 8'q%�€
+à.6!0ðÂí!0ð¾ímàx¨BñØ—NpiÀÀ	pa”H@0ÁjÁbÁkÁck)üÑIAcAk)üÑŽM¨h((hgÐ(Ñ¢Hb¢HGa¢Hë÷åùë÷Gýî÷Ñÿë÷oý} Àë÷ëüðÅùû÷ñý·`šN·b•Ið€1È`(h(Ñ“Ha•HÁh’JÒC@Á`‡H,8ð(è!%�#ÛàŠƒP•`IâxRŠBöØŠL h'¸C ` h8C ` ë÷¸ü ha
ˆC ` hC ` ë÷®ü h¹ˆC ` hC `þ
+&ÌoË�Öú ë÷¤ü|Hh9C`ë÷fþ! ë÷½ýë÷Vþucø½(Ðø÷qù"’WL"áyð0í" ’áyð*íø½þµLHDhD`÷÷‹ûZNhM>(LÐXOàÕFI `øqYHAhCA`ð÷þþ½ 5Õ?Hh(1Ðð”úhz@@hrhz!Chr7J�h€!ˆC�`KJPh	ˆCP`3I `ø÷'ù° °€ (r ì÷Fûð÷'þ(Ðøy(ÑIHz(Ðð÷þ øq ÷÷ü(z(Ñ`ÁÔ‡à`Õÿ÷êþþ½à9ÕIh(|Ñ ` (rHÂhJ`�h€"C�`ÿ÷«þ ü÷;ÿ ü÷7ÿ ü÷3ÿ/ÐyzÉÔ-ÐizÉÔ(Ðÿ0a0@(Ñê÷“ÿzà&H"hI!ðàî$Hø÷ºøpàEà@€TÃ †©ÈÀ=»ÈÀ=ÅÈÀ=ÉÀ =¨ÈÀò<2ÊÀó<4ÊÀ$=ÜàƒÀ�P�À€€/€¨€¥€4€€"€€!€€.€ºŒ|1q“²Yž°éäéôµ< 'Õà%ÔjO8h(!ÐiHÀhyhˆBÐ"gH’h"!«ì÷ZùdI `hz@@hrhz!Chr]I 8`ˆh€"�Cˆ`ø÷Vø`Õðì Õ°‰@°�àÑEçðšøðìð–øþ½RJ`RH` pGLHh"C` pGøµ
é÷óø2) ðþë8é÷ïø ø½øµ
é÷âø2) ðòë8é÷Þø ø½<H<I€ˆ1´(Ñ"à"ÊqpG2HAh
+€!*ÚA`‚h
+C‚`pG2Hµh(Ñ ½é÷¸ø-I.JÉˆ‰ÔQh	ÕQh*#™C@#CQ`é÷­øÿ÷Úÿ ½&Hpµz(ÐHh(Ð"HAh%)CA`
+ ë÷ñúL`h!ˆC``IHhê�CH` ë÷äú`h(C``È ë÷Þúp½pµé÷zø1(ðvë é÷wøp½Hµz(Ððtê½TÃ@€pÂ€Ã=0=Ì|Ã€€°é€/€€™J˜I``!yþs³Ö:˜Hx(Ð pG–IµðÜí½(Ð
+(Ð(Ñ pG pG pGðµ‡°„F
�œ"›–’�’‘�*!`Fð:ë(Ðÿ÷Ûÿ°ð½
+)µÑð2ëàð4ë(Ðÿ÷Ìÿ½pµš
+,Ñ*ð(ëàð(ë(Ðÿ÷¹ÿp½ÿµƒ°ZC˜(«Ñ"iM’(h2
+!ÿ÷ÜÿÐš(h
+!ÿ÷Çÿ Áç›™"8–ðë(¸Ðþçµ"©ðë(Ðÿ÷Šÿ°½µðüê(Ðÿ÷€ÿ½TIµIhðöê(Ðÿ÷vÿ½*µÐ*Ð*Ð*Ñ"à"ðæê(Ðÿ÷cÿ½µ‡°ª©’‘©«ðÚê(Ðÿ÷Rÿ°½|µ#š(“Ð(Ð(Ð(Ñ à à à ’0«ð¼ê˜,(`Ð,Ñ)0ÿ÷Çÿ ,Ð! |½,Ñ |½ ÿ÷ÿ|½
+#¡µð¢ê(Ðÿ÷ÿ½µðžê(Ðbz¬Nu~¢9Sÿ÷ÿ½µðšê(Ðÿ÷ÿ½8µ�
+)ÑI"ðŽêà’I#*ðŒê(Ðÿ÷ìþ8½
+)µÑð†êàð†ê(Ðÿ÷ßþ½(Ûx¶t¶D	ü¹OSA_Semaµð·ù½pµ	ðçø p(ðâø`pp½øµ&(uÐwÜ-tÐ-Ñ ðVèl¡ðAù ðNèë÷ßû9ÿ÷Öÿ ðDèf¡ð/ù ð<èd¡ð(ù ð6èî÷þ9ÿ÷¿ÿ ð,è(!pFp ð&èî÷øý9ÿ÷¯ÿ ðè.!pFp ðèî÷ðý9ÿ÷Ÿÿ ðèM¡ðøø ðèî÷ýû9ÿ÷�ÿ ðüï(!pFp ðöïî÷êû9ÿ÷ÿ ðìï)!pFpà%ààà
+-ZÐc-Ñ9HxX(Ñ8I ðÈø5Hpø½5I (9ðÀø ðÎï 8†w0Hh(íÐ ðÄï-¡åç 0¡ð¬ø ðºï.H@x7–î2wóýÿ÷Dÿ ð²ï.'pFp ðªï'Hxÿ÷5ÿ ð¢ï$¡ðŽø ðœï#H@xÿ÷&ÿ ð”ïpFp ðŽïHxÿ÷ÿ®çI©çHpG
+(Ò00àW0pGChipRev:, BB:), RF:º�³|Ã Remote WakeupO.R.:ë·  Cal O.R.:Ì£À¶>Í*JpµP4#”`0S`Ð` ‰
=�`H` 5@(Í`ôÓ PdH00�d00Ðd£`â` 9Ã`�`I0`H"!ë÷ñý p½øµM!(hÉCë÷ñýIP1Ìh0„BÐàhÈ`�`  `à`(hë÷èý`h:1è÷ªý ø½(hë÷Þý ø½µè÷¾ý½¬ïºðµ…°"hFð"ë™ C�€ ðèêÿ$M!4ÿ&06 ª©ðØè›™š˜+@Y@P@CÑ" ðÎèà¤$$´BæÓ8ðÆê °ð½ÿÿðÿµ“° ªfdºçyMS…³�@� ž!™œ–‘™˜’ªÂ;˜KM�-h¨È¨G(WÑ%,��$Ð˜x€ Õ`x(Ò °ð½`z!zC(3Ñà{¡{C(-Ñ" ©«—Ã	ª’ ª©«ð€èà.Ð˜xÕp{1{C(Ñð|±|C(Ñ˜"	©’‘�0ª©«ðdèà•«xÔ@Ô•«Ô@Ô•3à«z(/Ñ!˜(Ñ™˜ðLè(ðÑ™˜ðFè(êÑ™	¨ðDè(äÐ«ÚyL’$hkFŒ˜ª© Gà˜�kFŒ«Ùy‘’›š™˜ð,è�«z|ç Èà;µð&è½ÿµß° \�hh'Z� Y—6—X�ÿ È>—4’3�‰@	�Hi
+�û÷pû�,hi˜4æ(ÑX— �
��`h€yÁôH
+™Ðj(Ðà@j(Ðk™0``h€yÀÑ
+˜zÀÐk˜h(Ñ
+˜z@Ô
+˜ 0@}Õa˜!`c³È5{m7æ0Lâ(0Xª3©kF^�Ãªa›Z™i˜ðÌïb™`k˜!h(Ð‚zÒÐ!bh’y”FÒÑ
+šz’+Õhš*(Ð
+š 2R}Ò’!Ñ
+šzWÕÇy/Ñ"à"
’"/Ð"’àÒÕ)Ð&
+à
+šy*Ñ)ÐÂy*Ñ"ìç
+Ÿ" 7}?Ô)Ð(Ð€z€Ô"h˜(Ð+
+Ñ
+˜z€Ô`FÀÑa™ `àá*Ð ��
�k˜`.Ðb˜h(Ðk˜&`a™ `5ª6©’‘š
™˜3ðRï™
˜C™0CCÐ`h@"ÁxCÁpk˜h(ÌÐ€zÀÉÐi˜æ(Ðj˜(Ð 
à
+˜Xš 0ˆY�’.‰0«}l™3Y¨ð.ï¨ràiÀÕ ¨r-à¨z('Ù`h"ÁxCÁpH~À
+Ô
+˜@y(Ñ˜	!‰@Õ �€@(ÙuI`1‰zI	Ôî÷6û@!�€
"Ò‘CC!…¨z(XÑ«{Z˜0«AX˜Y}@ 8�	˜‰t0�B[‘Ó[˜à[�ÉÓ×} Cå~\�¨P«è`™Œ«{Zª®Æ5©^šX˜®Æ[ª’¨zHª©8«ðÒî©zèhIðÐîXž.Ðèh0ðêè€23©ðÌèghH˜``i˜æ(Ðj˜(Ð8˜º
+˜	ðØú(Ðàið´îàaài!‰ˆC&àaá	˜t0€€´ç
™)Ð@°BÑ°8©
+X2
+P°8©]�X:€¨z@°BFÑøxû!@øpài�Ð!à!	Q		a„lš*Ð‰a„AÕ �€A
+˜ð‚ø¸€ài�Õlš]™’8ªQX»ˆ
+ �€	@ðøàÕlš]™’8ªQX»ˆ
+ �€	@ðRîà à�SààiAÕlš]™’8ª‰Ih �€A
+˜ðLø¸€.=Ñài�àªª€Õ �€A
+˜ð/ølš8˜’ài �	€@ð1øàÕ �€A
+˜ðølš8˜’ài �	€@ðüíà  �(ŠH©	ðîKšü~ú8êw0C8ƒ]˜ "X9ðîï0«~(	Ñk˜8©h]˜H«	XXðäí5à(3Ñ]˜H©	X7‘8©X0«}@7™€©zI±BÑ7™8€
+˜@y(Ñ7˜€yÀÐ˜
!‰@À‹à#k˜ézh7˜ÿ÷ný¨z@°BÑ7˜7™ˆ0€v¨z°BÙùæ\˜c°ð½pµˆx%	(.ÐÜ(Ð(DÑ ú÷–ÿ6 þ÷†ú(:Ð`zÀ7Õ°~Ô€2Õ! þ÷bø-à(Ð()Ñ‰ ð£þ`6p{3(Ð4(Ñ &3(Ð"&à y(Ñ ò÷ù%à 1Hy	yCÐ ð²þà ë÷ù1 ð"ü(öÐ(p½ðµ&›°––"ÒC’"!ÿH«Àhë÷Íù˜(òÐÀðÐ �2â˜Di,Ñ	˜`0@{!(Ðè÷�ùþç	Ÿ,	Ð y(Ñ8n€yÀÑ ü÷@úè÷}ù/Ð˜ð¸ú(Ð à �(è÷sù «�X
™C™=nH�˜(;Ð,Ð¨yÀÑ`y`Žø€Ó{€°(Ñ¨x€(	Ñ	™ ó÷ú
˜(Ñ ñ÷µù ñ÷žú(Ð) ò÷ûö÷Âú(Ð	˜`0@{(Ð(Ð5(Ð
˜(Ñ¨x‰Ñ	(Ð ü÷/ùó÷7û¸h€˜.Õ(+Ð	˜	©`0{ì÷ú(Ñ�ö÷‚ú(ÐèxÀÀ@ C
+Ñ y(Ðô÷&ÿ(Ñô÷åþ(Ð®HhI`ö÷¸û˜!è÷kø 	©ð˜ì†á(}Ð	¨í÷!û,Ð y¸h(Úõ÷xü¨xŠ*nÑ 	©ð÷Qû	˜	©`0{ì÷Òù(Ñ� 	©ðPþ–IÈr
+s 	©ðlì 	©ð÷êû`y(Ð(Ñ 	©ðÄþö÷&ú(ÐèxÀ
+Õ y(Ðô÷Íþ(Ñô÷Œþ(Ð‚Ih@`ö÷_ûö÷#ú(Ð	˜`0@{(Ñ ó÷ù
™ˆ)Ñ(Ñ&
à ó÷rùðîï€6ñd°d&à(Ð&¨x	(Ð(Ñ`7x{((ÐÜ(Ñàá:à(Ð5(	Ñ
˜(Ðÿ …0[" ñ÷íù	˜`0@{0(Ñ
�…ÿô‚óã3˜	ðJþíà
˜(ÑèxÀÕ&îç
&ìç&êç
˜(Ñ &åç!&ãç©x		)Ð)ÐZ(Ñ˜ð”íÎà™˜ç÷ªÿÉà‰TÑay)Ñ	š) ÿ÷(þ�¨x	
(AÑ
˜'9(Ð!˜ðÀú¨x	
(4Ñ y(1Ñ9)à!*à	ðäï+++++++++++++	˜`0@{!(Ñ˜ðXí «�˜~
™ðùà
˜%)(Ð!˜ð‘ú y(Ñ)
˜(ÒÑ˜ð²ù �˜( Ñrà*pÑ	(!Ð
+(kÑç÷Õÿ˜ð*í
˜(Ð˜
+(
Òì÷Ãû(	Ñ˜!@� ô÷¿ýà �(ç÷½ÿKà•ç÷´ÿ%�	I¨@�� hC‘I
+\*/Ð	àº˜¸ˆÈ¶G˜yx 0@x	�BÑ™8"‰ð¯ù(Ñ™p˜ˆ �BÐzx ðMû(Ð™ €™ pm-ÀÓ˜ç÷uÿ0ç(HhI`.Ð0ö÷ ù&	¨ðþø(�ÐQ¬§ð„>kà}Åå˜(Ð ðhûIHaHi@i�BÑ¤åH"AhIA`Àh!ê÷oÿšå>µLHà` 0ê÷[ÿK%-HÑ")ð„éHI”8 `" kFÃ I*0#ê÷Rþ(Ð >½Hµ€hê÷eþ½ºÿÿÿ¥€ €ÌðÄNQ€MAC Tx Notify„HxpGÿ!ƒH1µðdì€I p½Á{iJ�BÑ à}J�BÑ 
à|J�BÑ àzJ�BÑ àyJ�BÑ ÿ)Ñ! !@pG8µÿ÷ÚÿlIÀD hiM(Ð¨ˆ@¨€8½hF#`ç÷ÿ˜``(x@(p8½µÿ÷Áÿ_IÀ@h\IšBÐÈˆ@È€ ½"Àx@p ½þµ �ç÷¢þ%�RHéDX',1Ð ‰0n€x€(Ñ ð{ü0`0�@{0(Ñ 	ðvü˜@{!(Ñ �0n€x‰	Ñ	(Ñ`iy)Ññ÷Èý'`i1ò÷#ÿ/Ð ðÂëm#-ÄÓÿ÷_ÿ˜(m™Ë€ì†³×$5ÐðÌþ˜ç÷`þþ½þµç÷Wþ�é÷�þ+L(Ñ0Hi@i�BÐ˜ç÷Nþ h"@ `+H!hê÷iþþ½¨ç÷’þ›àh!x) Ð
+(Ó"Oã`àÅ~Y.Ðímhÿ&]IK6µBÙeˆmRe€@#(Ò)êÜ*Ð ê÷xÿ˜ç÷þþ½µ	L Ê¢X*ÐRišBÑ I#)Ò(òÐ½ºÈ1Lˆ|h €ºµ×L ‚"BC
+@‘s(ÓsöÓ½ðµ&4ÏO‹°‚7ð:í	‘�"9hFðlëš˜›	™€™AÓ"9¨ð`ëš˜›	™€™Aà"9¨ðTë˜™š	›ÀCÉC€YA}"#Òðnì
�‚!aC´H
+�Á{‚{C!Ð
+™"¨ð6ë¨È+‹AÒ
+™"¨ð*ë¨È€©A‘�
+˜"©ð ëà
+˜"¢¡ðë&d,ÐÓ"8©ðë0°ð½µ(™LÑ! s‚1às#àÁx‚x	C<èˆ
š\�
+ÿ::ÑAyy
+C ’0ðòêà{¡{}#CÛXC�Á‘" iFðäê…I„H‚1ðë ½ ½€I(µÑ ½Ê{‹{C
+Ñ!ÿ"p2Ap‚p
+ÂpqAqàJ{{C’1ð¼ê ½øµ
 û÷¢ú,~Ð-|Ð.zÐÿ!lH"-1ð ê((`}ÐFa)h s)h �(hZ!|0As)h° �-h °5(p°y(pðy/7hpù ð¸ê (q hqàz¡zC
+¨p(épÒàz¡zC!	Àðnê ¨p èpð„ù(Ð z(sh{ñ!@@@hsàz¡z
+C!18ðZê {(Ñ`{(Ñ {(Ñà{(Ñ |(Ñ`|(Ñ1"˜18ðBê |(Ñà|(Ñ }(Ñ`}(Ñ }(à
+à	Ñà}(Ñ· €1"¸ð&êø½þµ'%N<—‚ `C…è{©{C!Ð")hFðê™˜y@CÑ‚ `C©€0ÿ÷Mÿè{©{}#C*ýäŠ-þ?ÛXC�Á‘"(iFðøé˜þ½d,ÒÓ þ½Hµ‚0ðê(Ð ½µH‚0ðúé(Ð`zÀÕ ½ ½ìðˆ0µ"šLãx+
+Ðà¥-y…BÑ 
+p0½R“BõØ 0½@zÀÐ�HÀx(Ð pG pGŒH!µðªéŠH!Áp@!ð¢é†H"@!D0ðPî ½óµ‡° €O�øxM(pÐ p Œ(p"9 ðŠé(xäÀ(p”py(Ñ0ú÷…ùz
+à0y(Ð(Ñ!¨ðìkFy€€à � ��-à‡8@0yš‘BÐ™KY9y!py! pap�˜‘@�à`x@`p9y‘™˜ð
ÿ™@yy�BÐ �v66PHÁx±BÍØ˜*xA	P(pš‰ÀÐ p(x@(p(x€	°ð½µ"
+p"Jp‰ÿ÷zÿ(Ð�¡p	
+€áp½pµx%(Ñÿ÷Tÿd&x×(jàŒàŠ<P.Ñ p½d3H"!ðúèäö2/N#à xÉ(Ò(Ð à@-Óÿ÷7ÿåç!xqqm@1-@£x-qax�BêØñx`xðpÒä*ÙØ p½pµ*Ñû÷ø(Ñÿ÷ÿ%à`x!xC(Ñáx x
+Cÿ*Ù p½-!åp ¡pÿ÷œÿ(Ñ(
+¥pàpïçð÷«ø"0ð÷ø(
+¥pàp p½zñÿµƒ°ŸÈ"P#©¨î÷Þý(Ð˜!tEt†tÇt�r!Ár™˜î÷›ý°ð½8µCx$ð¨êðvîàðxî
+à�x%)Ñ‚y’Cyy"(ÿ÷Äÿ 8½©IµŠh‚BÑ ˆ`€ ê÷ü½¤IµÊh‚BÑ È`ÿ @ê÷ü½žHµ€i(Ð›H0ê÷™ü½þµ˜M¨h(lÑè‹&(hÐ„ðôé�*iki˜¢sA€™A.Ò�J(isii€šYA;‹A#Óèh( Ñ¨i(Ñê÷Dü¨aðÔé�*iki 
+(6VÜŽ2Fª91šYA„¹A"3‹AÛ4{K"’{H3"!ð¾éh()Ð(Ù (wðsüi*iHCki1€YAia(að¦é*iki‹AkJ#„ÛCYA"3‹AÚ&dK"’fH32!ð’éþ½øµ^M¨h(Ðay#yê‹	CŠB
Ñiâx‘B	Ñây£y)ŒC‘BÑ))AÐ¡x)>Ð&
+);Øðjè.w`y!yCèƒàxhwày¡yC(„GH0ðüðü¡x*iIHCki‚(ŒsA1€YAia(aðHé*iki‹A<Js„YA"3‹AÚ&5K"’7H32!ð4éø½pµ�ÿ $+Ð0ð-ý-Ð¬x„BÚp½ p½8µš’›*ÿ÷âÿµ €" ï÷¦þ8½8µ)
ÐJ 2z+Ñ#r
+y’Ëx‰x"ÿ÷˜þ,Ð ÿ÷eÿ8½L hðìïàhðêïÿ÷Þþ  !0ðâî8½µ	L hðÜïàhðÚïÿ÷Îþ  !0ðÒî! €*ÕEØ�jy%] 0r½òxìÿÿOŽ9Žpµ$ú÷@ø(ú÷Gù)y)Ð)
Ð)Ð)Ñiy)Ñ4h4à)ÐhàÃ €, p½ç÷<ùþçpµ$ú÷'ù)y)Ð)Ð)Ñiy)Ð)ÑDhàÉ €, p½ç÷!ùþçpµ$ú÷ù)y)Ð)Ð)
+Ñiy)Ð)ÑÄhàùH, p½ç÷ùþçy)ÑôI1@pGW0pGpµñHxÀÄ(ÿ÷•ÿ(ù÷Öÿiy)Ñ@0€{ÀÄ,Ð(1W0ð”ì(Ð p½ p½pµ
ù÷½ÿay)Ñ@0€{àÜHx�@ÃÊ )W0ð|ìp½µAy)Ñÿ÷`ÿÀx@àÒHx€À@½@0À~€€pGz@ÀpG	z JÕÉ	Ð pG÷µ„°$ÿ÷>ÿ0ÿ÷^ÿ�0ÿ÷uÿ0ÿ÷‹ÿ0z@À
+Ð˜!nFÆ™8+ð<ì °ð½µhƒj)
+Ñ"`°J’¯J°K1ð,ì½�UÎ+Ô’JFÞøµ
ÿ!-1ï÷þ((`Ð‰"F˜2·!‰’:a
#ï÷Uþ  60p)h° �ø½÷µÿ!ÿ66-1‚°ï÷ñýÐ ‰*˜2·!'‰’ 2i
#ï÷5þ  78p°  �š™ ðû ï÷rþ°ð½ ÀCúçÿµ…° �‡H@h(Ð…Hð\êƒO˜7()Ñ yáxC$Ñ0y(Ðpy(Ñ`y"€0û÷:øà`y€ðŒþ`ykFs yXs˜oInJ‘�’z‰›)0ðªë0ðªë`yÃ!@9z#‰	‰C`qš’š™(ðœë(ðžë	°ð½|µæ÷ÊÿYIIˆhkF@ˆ`ày˜p zØp zazC˜€àhc"iFð†ë(æ÷¶ÿ|½µæ÷¬ÿJJR!¨ðzë(Ð"’ ib!«ÿ÷wÿ(æ÷�ÿ½øµ
$Ay)Ñ!‰A‰i)Ñù÷,ý(ð‚îu!‰]‘˜ñ÷Ñý(Ð$ ø½þµ@ú÷Äû3OTÐ(z@¦naÐ”‡iE�ÀPÐ z€(ÿ÷Ðÿ(HÐ z€�iy)Ð)
+Ñðèü!zÃ @0€C!ràI2 ð$ëASÐb(©ÿ÷×þ˜($Ð(y(Ðhy(Ñ"1(ú÷pÿà0ðÄý˜"ð
+ë zÃ!@™	‰C rHáy@p˜ï÷gý@Ñ8"à-íÄÀ³’8¬qÀÿÿÿÿ"!ÿHð¤ìþHa8ðâêûHd"’ûJùK!8ðÞê AÑa{"{	Cá�áz¢z	C!s	
+as!z¡razár!"!rbr!píI
+pþ½|µ@ú÷(ûêNÐ(z@ÀÐb(©ÿ÷_þ˜(Ð!ð°ê˜ï÷ýpÑ  pà`z!zCÑÛJ’ÛJ!+ ð¶ù0|½þµ@ú÷ùúÒNÐ(z@ÀÑ0þ½hy(Ð(	Ñ z	ð%ü!z		C!ràykFr zXr˜� zazCb(iFÿ÷þ˜(Ñ0à™:ðfê˜ï÷¾üAÑ!!p?}uÆÌ–
+Õ�Øþ½(üÑ²H"!,0ðì¯H,0Å`8ðDê¬Hd"0’¯J!3ð>ê þ½µÿ÷þ(Ñ ½÷µ‚°OkŒkÿ÷èü)zIÉÐ)y)	Ñ¢J+’¡Hš˜31ð(êæiy)Ð)ùÑ,÷Ð/õÐyJÓ"yRÒ“BÐû#@’CqyÊÓ"yÒÒ“BÐï#@CqÁx
+ÓâxÒ“BÐ÷#@ÒCÁpy"y‹’›’“BÐ‰‰Cq(ÿ÷úü!(ðåýÇåµtHŠxBpÊx‚p
+yÂpIyq ÿ÷ý! ððú ÿ÷Þü! ðÉý½gIJx‚pŠxÂpÊxq	yAqpGøµ$cK1 jFð¶é(Ñ!0ë÷Äû"!0ð°é_J1 ð®é(	Ñ"1(ë÷\û"!0ðžéd$$,ØÓø½8µz¿!@@@" rFH48’ð�é y(Ñ"JH ’ð†éHJ’>JFI R9W0#ðzé!ÿ11 ÿ÷¨ÿ"%}È˜´˜ùp" ðaý>Iˆk"�Cˆc8½1H!�pÁpqA  p pGôçøµ‰Ei	n' 78ðXé(Ð#J£2’*90ðPéÐ#29(ðéø½8ðFé(ùÐ(y(öÐ29(ð@éø½ÿµƒ°˜ù÷ü� �`x!xC(~Ù@˜$@�˜Áyyú÷†úù÷µú	&†Wz75€€àÄqÀO”ìÄÀÿÿÿÿ³’8”@KL0=8oÀ¡€!(Ñò*Ýð-ñ)Úð
à(9Ñ ò*Ýð-ñ)Úð6*à˜"I!ð£ÿ*ÐJx�„F R–FàÚxªBÛ²BÜ{x“BÐ �à@†EîØ˜"`F$`F�,Ð˜àà(ÍÐ˜@0€{€Õ˜y@€Ñ˜(Ñ˜!ð÷Äú˜	!yBÐH kFp Xp ˜p˜"iFÿ÷,ü °ð½þµ—�‚Äš”üšóHx'6(Ð(#Ð(5ÑhzÀ3Õ"1(ðxè-à)z0IÉÑ(iFÿ÷ëû˜( Ð!ðlè˜ï÷˜úà*!ðhèàæ÷Gü�XH¡xx‘BÑ!p#2(‘ÿ÷ü˜æ÷;üà'8þ½pµ&!ï÷öù(6Ð"�IKCb°1#ˆ"ÁgT"#
+pKp 1xý&[[3@CpJxxC>K@
+p
+JpJx+CJpŠx	ŠpÊx‹xC#CŠp
+ÊpðYý0p½þµæ÷ìû$�-H¡°'gC�*HÀ](1Ð0ˆ!	ˆB,Ð˜x((Ñ$H-Ð9(ÿ0	"0ðíýà8ú÷øÐhy(Ñ(ñ÷ƒû(ÑH1ˆ8Bx(ÿ÷ƒÿ(Ð 0€˜!pd,¿Ó˜æ÷¬ûþ½
I p
IH`IH`I
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H`pGìÄÀðÿÿÈ¶;HoÀ;MN;ÁO;P ;¸ìÀœYˆ™½pµðþÿL ÿI�iàÿ!11ACcZ“BØ	Iˆ‘BÒ@¨BðÓp½|(Ð(Ñ pG pG 9*Ñ@à@ÿ(Ýÿ pG(Ú pGpG(
+ÑèH@\èI@Z¯!IˆBÓ pG pGþµ@lF6 ƒÍX/-?
-}oåPÕÜO=CåP@(ïÛ#^CÕH�$0ƒY0]C´F›FhsC&ë�6­[›]mphµC
C`›…hÇhkC�}C[›]mqUhµC
CU`›ikC›]mr•hµC
C#•`�LY&6$6$4nFgtQÕµO<CtQ[+íÛ¯LcF$4ãX™DhYC›cChÉ››É‰#MmœC-,C`‘p™„hÅhaCœlC	‰ThMmœC-,CT`‘q™iACˆ‘h™CC[C‘`�r þ½þµ"!’H’LT8 `0à`0 a 0é÷¿ú"! é÷ºú "!0é÷´ú!†HIðàï&|Ýì|¼ž5¤«–ƒO %5¦a"BCÿ!11AC¬Z|RRÉRˆ@°BJ€ñÓzH!l8`"Æ`B`�`‚ÿ!%1A‚yIlF,É,Ä™Aað›ûvH!ð´ïtI  pþ½µlLd!àhé÷„ú!(aaÑ ½ ½µ}!	$ˆBÚhH"!ðÆï(ÑfH"!ð¾ï½óµ‰°&	˜ààv66àWIô1Š] �@šBóÐ�]SIèœ1�@�@h�ÿ÷Ðÿ~Ðë÷$ÿë÷$ÿ9ÿ÷Áþ(_Ð
+˜@�€|(1ÑDHIJ)l8ð&üð·ü) ðý"9ÿ÷—þ!ðºè)BÙx@?ð¢ü"8ÿ÷†þ'�š)8ðýü??/õÓ™˜ˆt'à) ðéü'�š)8ðéü??/õÓ˜™€|
+š!iC�(7:9ÿ÷wþH:)l8ðÕû˜!�t  s `a!°1 ‘' �t!8ðøî™9f!8`0sàKà!!As¿e™¹a
+J›L8œ2¹�Ò\IÒIÒ‹X8�¸ ¥¿ÖÝC"¹‡‘CšRxÒRCàœò,ºNÆÌòøÿÿ°³üô|"Ò…‘CšRˆR’
C…A�*			CA…ÿI
+h™ð;ü ð�ú!˜©@ˆC(�Ðç™	˜H@°ð½õHµÀhé÷{ù½÷µ‚°ë÷Oþ�ë÷Iþë÷Cþ™8ðìû0@BÐ ðüù ÿ÷¾ý"!à+BÐcžt^wIR�BôÛå€&�f�¦�ë÷ þà�gt˜ t  €˜(ÐÖI×HHa×Hð>ú ð˜ëàˆ!ÿ÷Æþ-ðSúÏH©CŠ(@CðTú ‰(C � ð†ë°ð½ÆHµié÷ù½þµ
ÿ!11ÃJACl2Œ¿N£ˆri!ðœèŸ³Ô¬(x(Ñ ð.ú à(üÑ¡€œà(x(sÑhˆ?/òÒ!�@
-8ð#ú(Ñ¯IÈ]@ÈUàˆ@ ‰)B0Ñ(C � áˆtà xC9¤H(2ð úà�€|(Ð ð,ë!(ÿ÷Zþ5àðDû�9B¿ƒG´¢…Ûµ^ ðŸû™"ÿ÷$ý™HwðÛù“H@Š(@CðÝùáˆ`‰)@C`�áˆˆBÐ%‰M@EÐ ðë!(ÿ÷1þ-ð¾ù…I¨C	Š)@CðÀù ‰(C � ðòê,à  € ð"ùGàÿç(Ñ &à(ÑàˆiˆCà€ ‰iˆˆC �`‰iˆˆC`�à(Ñ*4Ñáˆ	à)x)4Ð)Ñ1xˆBÑjxiˆ ÿ÷çþ ˆþ½  €øç(x(âÑhˆ*ðÒ
+‚@ãˆ`‰@C`�"‰‚BäÑ ¡€ðÛøÿ÷ÿpi(ÛÐ€GÙç"Èç(x(ÔÑ ð^ùËçøµ&MM4*xÿ*Ð)Ñji*Ð ø½"kFpYpX€¨hQé÷ø(xiFÿ÷üþhi(Ð$¨hé÷ø,Ðÿ÷{ý0ø½8µ kFp 7LXpAX€ hè÷õÿ(iF pÿ÷Ûþ hè÷óÿ8½pµ$-Mà ÿ÷âÿd¨i„BøÓ-H!ÿ÷±ÿp½+H!µh"‰è÷¼ÿ½µ!L! hÉCè÷Ëÿ xÿ#13IXCl1@€ˆ(ÐH!Ba‘>°¤H¯¶h"	è÷£ÿ hè÷¾ÿ½Hµi
+!è÷°ÿ(Ñ ½ ½pµ
M(xÿ(%Ðÿ#13IXCl1D!¨hÉCè÷šÿ ðÉø !0ðìì¨hàè£À,º=¡0òrÀÿÿ$¾è÷†ÿp½øµ$ûM(xÿ(+Ðf¨h1è÷sÿ kFp XpX€(xiFÿ÷Uþ(Ñ$¨hè÷jÿ,Ðÿ÷©ÿ(Ðø÷âú¨h1è÷Wÿ)xÿ#13YCçJ ‰ˆ€¨hè÷Sÿø½øµ$áN3xÿ+Ðÿ÷Šû°haè÷>ÿ!kF5pp!Yp‰Y€(iFÿ÷þpi(Ð$°hè÷2ÿ,Ðÿ÷�üø½8µÏL!xÿ)Ñ 8½!kFp!YpX€ hIè÷ÿ xiFÿ÷ýý hè÷ÿ(8½8µÂM(xÿ(Ð kFp Xp@X€¨hè÷ûþ$à iFÿ÷àýd¨i„BöÓ¨hè÷ôþ8½þµ"!³Hð<ìÑ²H"!ð4ìNÐ (s ha° /(�¬H!h’’"8ð¦í .(�t!0ðêë0!`07fÎå±¬¦ÅrXs!!As ¶e!0c41u4·a �&C!ˆCC!ˆC …0ðŠê!�"@Ò€
‘CC À�C À …0ðeùa�			C(a…ð—ÿþ½÷µ ˆ°€�Jxÿ(Ð›‹BÑy(Ð q˜þäÿ#13XCyI@�ÿ÷×ú$�˜”%�\à˜@F.TÐ) ðGù™"ÿ÷Ìú°B�˜Ù€à0�!0ðæì�˜!ðàìš‚B˜(Ð`J“x˜BØyÒx�BÒ"›¨@C�à#Ñ˜C°BÙ˜@@à @™�à!8ˆ©@C8€ àLIIxˆBÓ!8ˆ©@C8€ à Cm--˜…BŸÓ,Ó8ˆ™C8€à,Ñ>I q�ç<Iy@q˜|ä8µ÷÷^ü(Ð6L! hÉCè÷ìýÿ÷þþ kFp Xp]€ xiFÿ÷Ìü hè÷äý8½8µ*L xÿ(Ð kFp XpAX€ hè÷Íý xiFÿ÷µü hè÷Íý8½pµL®dl¨¨{^
+ð xÿ(Ñ p½! hÉCè÷¹ý xÿ!11ACH�ˆ
!�€ h-è÷²ý(p½pµL xÿ(Ð! hÉCè÷žý xÿ#13XCI@…€ hè÷›ýp½µ	 ë÷tý ë÷4ú½,ºœòˆè£À µë÷«úïç÷µ‚°˜(Ð˜(Ñÿ%%5 à$% �˜(Ñ …C$%à!,Ð™š˜ÿ÷Åÿ!#KCJŸš{¾BÑ–hO¦BÑûXƒB	ØRh‚BÓ#YC8i@àI)ãÓd˜„BÖÙ(ä0»tI\pGsIÀ1@@µðžê½µmIÀ1AI ðªê ½hJÉ2‰@ypGKYÿ1Ñ1pµ@$ç÷zÿ) ðfìç÷ ÿp½KYÿ1Ò1pµ@$ç÷gÿ) ðRìç÷�ÿp½KYÿ1Ó1pµ@$ç÷Tÿ) ð@ìç÷zÿp½ñµ„°˜(fÒ˜EIÀ1Eë÷®ùkFsë÷§ùkFXshð<êkFÉ�Ž¤ª[:isr˜$8(Øë÷Ÿù(Ðë÷›ù(GÑë÷—ùkF˜ràkFœr(x'(Ñ kFXrà(kFÑ\rà_r$™˜ªð‚è(ÐkF™y(Aqy�qYyÁqàë÷nù(ÑL!àë÷hù(ÑQ!(Aq‡qÇq.ry™ ÿ÷hÿ²y™ ÿ÷vÿòy™ ÿ÷„ÿd,ÍÛ°ð½µ$ ÿ÷�ÿd$$,÷Ó½Iµÿ$I°4(Ñpç÷‰þ! ðºë½(üÑpç÷xþ! ð´ë½q½pµ
Dl&>,	Ð0ý÷>ý(Ð`40%sð?ýp½µDl<Ð ý÷/ý(Ð! å÷\û½óµƒ°%å÷áû�˜‚I‡ÈYh�HÀYh�˜�à˜!	C{I	hChwI$ÉYää
`Al9-Ð.ÐIi±BÑÿ÷Ãÿà™ÿ÷­ÿ%˜„BÞÑ˜å÷²û°ð½óµ�°%˜fI†ˆYheH€YhfJ�˜àaI 	h8CCh\I$‰Yää
`-Ð[J™hN5”– ¬–Nj=�GàXJ™h�G%˜„BãÑþ½ÿµ�°&˜‡NHÀYhNHÀYh�)à˜!	CJI	hChFH$ÀYää
`  @]™@@ˆBÑhh™€"ðuý(Ñ.Ð™(ÿ÷Dÿà™(ÿ÷?ÿ&˜„BÒÑ“ç7HpG|µMÿ55(ªiFðšî xkF˜p`xØp"¡¨ðÈèš™(ð�î|½µðLï)Hk"’Cc½3µƒ°™‘#IkF€9ŠQb‰	R-C•z	r‰JbEÿ55(jF©ð`î˜!		Cš(‘ðXî°0½IH`I `I  `IH`IH`IH`pGô, €P;(È@Àª€8�ÀD;H;L;¡«Å«T;-­X;#µLƒ@`i)ÑCà˜C`aH@8Ai*ÑCà™CAa�iC�a½Hµx(
ÑHÁj"CÁb! ðVì" ÿ÷Õÿ½Hx(
+ÑH@8HX_œ®D‚üTj"‘CbH�hÂC�`pG@� ¸#€0€pG pGpG pGþKµ 84�ZXhaX
+`@(÷ÓùK ÁÊh	
+`@(÷Ó ½À0µhð€î½8µš’À0h"ðzî8½8µš’"ðvî8½pµæHˆ¡BÐ€ù÷vø(ÑâI,Ð-Ñ&à&
$1 ð¦é) ð¦éd,ôÝp½ ?"ðRîp½ðµ ‡°ø÷þÿ(Ñ ø÷ùÿ(Ð!à! ‘ø÷ðÿ� ø÷ìÿÎI‘L™ÈJÉKÉNÊO%)“’Ð™C!Ð 	ð‹ý(Ð˜™@˜@@à 	ðý(Ð5@<@à 	ðwý(Ð™˜
@@˜(Ð5@<@µHÅbc°ð½pµðî²L%.Ð±I bÿ÷£ÿ`j!C`bàh(Cààh¨Cà`p½µŸJ!¸2Hðèí(	ÐšJÿ #¨2!A0ðÞí(Ñ ½ ½“J!(2 µðÖí(Ð�J!2½’ï@˜°½s0@ ðÎí(Ñ ½ ½µÿ÷èÿ‡H!Àhÿ÷Èÿ½ŒJ€@2€h	Cÿ#šC
+C`pGpµ$…M )hˆG ÿ÷èÿd$$,óÙp½µ
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ð<ýKHh"		R‰`HIhŠ�C`ç÷‚ù3It9h"ÒC`=I@1i
+
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ð	ý 8½3I µ` ç÷û8Hh@kì÷šú½øµå÷³ø/Ðxy(	Ðé÷¡ü0ðí-I
+h€`J¨82IX*J	XX(Ñ)0ðúìàJ02’
+)’"n•”²<Ù³ðôì(Ñ å÷‹ø ø½ å÷†ø ø½µ 0Ãx‚x 0ðâì½ô4©€øÄÀÿëïëÿèîêÿúþúÿøìêÿÿÿþÿ@¤€¨€À €ô;L€¢€¦€®€!€hÂœ¸Øpµx
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ˆ‚40ÿ÷Òÿ)n ð†ì(ˆ „0y(Ð(Ð(Ñ`h€x	(Ñài!ICàa!(!p!0ðpìà")0ÿ÷uÿái"¨x‘Cáaðfì%dàbp½ÊùI Q	h÷KÒhÒÒà	@ÛÛ“BøÑpGøµ%ä÷Íÿ/#ÑëIãZhéO?ÛhÿÛÿÛŸBÑ%àäKh'¿;CÏÿd'C;C`	‰‰`ä÷®ÿ(ø½þçøµ‰niD n(Ð.Ñä÷šÿþç'7!0ÿ÷nÿ(ý÷¸ø 6Z ñd�´ñ­ý`4r{!{8ÿ÷µÿ(Ñ(ý÷Åø ø½ ø½øµ&‰oiD(ý÷Ÿøl ] 7 z{0ÿ÷›ÿ(Ñ(ý÷«ø&0ø½øµ‰oiD/Ñä÷^ÿþç n&6(Ð!8ÿ÷/ÿph€x		(Ñ$à`4${(ý÷pø"18ÿ÷Šþ(Ñ(ý÷ø ç÷ˆþîç ø½¤HÀhpGøµÐi�xÀÔˆh€Á8ðXÿàbø½8ý÷&þ)8ý÷Bþ˜I3	~‰Ê’) ð�ëø½8µ
ðrî"`f¢^’(ð†ë ˆ(Ðhˆ!ÉCh€8½pµ
5L!(ðXìld n(5Ð!h`)�!ˆ)„(�!ÉˆC¡xI‰
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+(Ñ !0ð>ë*!0ÿ÷Dþ*!0ÿ÷‰ÿ!Š©�aŠé� ,dp½pµ‰ ü÷Øÿ5`56à ü÷êÿ ç÷óý ü÷Ëÿ*{`i1ÿ÷åý(ïÐ p½øµ‰niD.Ñä÷‘þTQ
+“Œ¶|×µþç n'7(%Ðä÷‰þ�(ü÷­ÿ!0ÿ÷†ÿ`4à(ü÷½ÿ˜ä÷~þ ç÷Ãýä÷tþ�(ü÷˜ÿ"{90ÿ÷²ý(éÐ˜ä÷kþ ø½þµ! !a `ä÷[þ�4HhiGiÐúÀ
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Ha˜ä÷þ0þ½µÇ2Q’KŠ‘!À0ð~ê½0©€ €øÄÀÀ0µÃy‚yhðrêmå
+À0µhðnêeåpGúJµi#@øKZaøJðfêYåôHi‰‰aiòJRiCapG(Ñ pG pG		@€
+CìJ	CÐkëK@CÐcpGµÿ÷¸ø ÿ÷éÿ0åÀ0µ‚yÀy‚BÒ
+yHy‚BÒð2ê(Ñ å å}ÃÈˆ¸Â\¯À0µy@y‚BÓåˆyÉyˆBúÒðê(Ñ 
+å	 åµðêå8µiFðêÍL
+%(Ñ kFp Xp˜pàkFx(Ñ
ðþkF™xXxê÷ú k(C cç÷Eûà(
+Ñç÷øê÷Ùùç÷0ø k¨C cç÷%ûkFx8½µkFpYp˜©ðèé(Ð¨
ðþ 
ðóý½µÿ÷Kÿÿ÷…ÿ­H~€Õ à ðÔé´ä	 ;µðúì		 " àà"àÿ"á2 
+à"Rà?"Rà"Ràÿ"R
+@Q	Ð @IüÑ½øµ$‘N!(ÿ÷ÿ0U ðžéd$$,ñÙ‰N$6À57�?)h ÿ÷·ÿ!€€É@8ÿ9IdÀj$$Hb,bìÙ$)h ÿ÷£ÿ!€€É@8ÿ9�9dÀj$$Èa,ˆaìÙmH!Àhÿ÷ûø½µÿ÷ÿlH~€Õ à ðTé3ä pGhI(ÐhJhC`gJh�Càh#"RC`cJhØsï6„ºâ8Ìž�C`h
+"	C`h"ÒC`h"ÒC`hC`h’C` pGþµ}$äðÚìOI@9Hi0"CHaPHAj%)@‘Aj)CAb@HAhIIA`EHÀ8Ai‘AiHJCAaEOGNÀ7à1h ˆG¸iÀÔ¸i@Ô¸iÀÕdñÒ?K ÉŠkÊc
+kJc@(öÓ;Hh€G(Ð þ½8Ih„Fh@@`0L¢j ‚C¢bcj€"Ccb `cj@&3Ccb£j[[£b£j';C£b£j»C£bcj³CcbcjCcb£jƒC£b£jC£b£jƒC£b`j�C`b`F``j�C`bI˜À9Haðbì˜(`jÐ(Cà¨C`bIHh8CH`J@:Qi0 �CQa­ç@¦€øÄÀk(¡€üð#€0ÆÀ£€^±�·™¨€ÿh:@ª€(;®€¢I¡H`£I¡H`£I¢H`¤I¢H`pG£Ih"�C`pG I@9Hi"CHapG�Iˆj"RCˆbpG›H€ipGÿµƒ°;Ä¨‘€¼/LÏÐ
*Ó °ð½ �ä÷�û��Hh�ðìë .Ñ!à)\ŒKÙU‡IÒÊ@1ËaÊbÊKbhŠbš‹
CCÊb@(ãÓ~K  @€3.Ñh�C`à,Ñ|Lªˆ)h¡bâb™)ÑhC`rI @1cpI˜`˜ä÷Nû ³çlH0!@8µAbAi"RCAa ðìïgH@8Aj"CAbcIhŠC`Iå`K @;µXbXi!IˆCXa[I @1cÿ÷jÿXkÿ!CXc½ðµ%,Œ@SNSI…@Ÿ€6@9*Ð2h"C2`Jk*CJcNI@1ˆ`MHbaD `ð½0h C0`Hk¨CHcð½DI€€@9bpGAH@8j€€pGpµðNê
ÿ÷Dÿ‚Ó) ð¤é+¢‹Aÿ÷7ÿ„ ä!€YAð„ï0I@1k"Cc-I@9HkŠ
CHcp½)I @1c'I@9HcpG%I(hÐ@@"à€€"C`pGI(hÐ"�C
+"àÀÀ"C`pGI"µU Çý|¾:`¨ÈŠ`	#Ê`K`
+a"‹aJa`Ht2
+b2ÈaJbI`IQ`ð ÿHœäIˆ`pGÍ®(;]º,;aº¨>½º¸>£€@¨€¦€rÀ¥€LŒ'%ù$ €øµ(Ð"à"!,Ð,Ð!,Ð!,ÐÉDK�XKÑ'à#ZC?K‰3ÒWXðîé8ðêé,Ñ, ðêé€!Cà, ðäéAI, ðæé"1(ê÷Fú-
+Ñ0I@Z,+Ñ.I@('Ø{!"à-#Ñ+I\+I@Z,
Ñ*IA¥)Ø¾!à(I@ÿ!21ˆBØÇ!à,Ð,
+Ñ"I
+1@ÿ!1ˆBØŒ!û ð®éæ÷|ý(Ðæ÷xý(ÑH!ð¢éH!@ðžéø½µð%þ(ÑH€!ð¬é½(µÑH)ÑHà(ÑH)ÑHðvé½ì½°ògöÿÿNÆÌòÍìÿÿpêÿÿþ±òÄöÄúÄþÄÿIiÿ"’�C]"àñ}OxÀ>ó,jÒCaûIÀ1j"	CbpGöIiÿ"’�CaóIÀ1j
+bpG!µðBé€!Z ðRé� €!€ðRéêL! ðLéd æ÷Êû! ðBéÀ!- ð*é!. ð&é½ñµÿ À†°ðöèÿ'V7�8ððè~�0ðìè´� ðæèÿ%²5�(ðàè�ÿ !ÀðÞèÏH[!ðþè¡!O ðúèÿ!8ðÒè8!0ðÎè! ðÊè!(ðÆèÿ !|0ðæèÿ à!z0ðàèÿ÷—ÿA!J ð¶è»H!8ðÖè¹H!8ðÐèw$ä! ðÊè³H€!F8ðÞèÿ €!0ðÔè æ÷Vûe€!(ð¸èeà
+ æ÷Lû(ð¨èÀÔ ð¤èòÕ£H8ðžèJ ð~è!(ðžè æ÷3û!(ð–è ðŒèÝÕ—L< ð„è™pJ ðbè! ð‚è! ð~è!`ðzèÿ €!0ðŽè‰H€!F8ð„èÿ ™ÀðHè™8ðDè™0ð@èÿ ¥1J¬tÂ—Oé™Y0ð:èÿ ™²0ð6è°ð½µzL9 !xðPèvHax:8ðLè½øµuIh"C`9%-!(ð>èn!0ð:è¥ !€ð4èÿ !A0ð0èeO78ð"èdL p(ð$è!¸ð èÿ !A0ðè8ðè`p0ðèÿ !A0ðè!¸ð
+èø½VJÛüÑTJ 2�‘€pGQJÛüÑOJ 2�‘€pGMI
+ÒüÑKI 1�ypG µÿ÷òÿ€™€	C ÿ÷áÿ½µÿ÷äÿ Cÿ÷Öÿ½µÿ÷Ùÿ˜C ÿ÷Ëÿ½pµ(ÿ÷Íÿ BÑ
+ æ÷Xúöç p½pµ² ÿ÷ìÿÑ)² ÿ÷°ÿ² ÿ÷¶ÿ p½ðµ!ŒFAxxC$I…hA"C`"	 €!�€L ˆ“@k#ÛÀ €"€O 79‚!° ÿ÷§ÿ!@ ÿ÷ƒÿ!A ÿ÷ÿ ÿ÷Žÿ!³ ÿ÷xÿ ÀüÑIˆˆ"’Cˆ€ 8‚1	Pÿ÷_ÿ$à§€—Ì!pÄÓãL§†Ë¾-€�!€(@x(]C À ÿ÷Cÿ¤´BðÛ(@x(]C Àÿ÷7ÿ]HÉüÑ�ˆ"’‘C�€ 8‚² ÿ÷;ÿ€úÕ ÿ÷6ÿ€Õþç!@ ÿ÷&ÿø!A ÿ÷"ÿ`Fð½Çæpµ
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+ÿ!G ÿ÷ÿ@! ÿ÷ÿ ÿ÷ÿ p½"! µÿ÷®üæ÷·ù"! é÷'ý! ÿ÷ìþÿ÷Yý! é÷¬ý ÿ÷Êþ€! ÿ÷Ôþ! ÿ÷Ðþ@ ÿ÷ñþ!ÿ÷ÉþHh"‘C`hJC`I" ÿ÷{ÿ€! 
ðªî æ÷,ù€! 
ð¨î æ÷%ù ÿ÷›þÿ÷3ýæ÷žù½�(€0 ¾ùIh	h*Ð*Ð*Ñx››’Cpà
+x’’€2
+pÀh{°&ôlÆ^_ˆï(|Ð"Càý"@tpGéHh�h@hCpGåI
+	hJ`ˆ` pGàIµ	h#€1(Ò	|ƒ@@½(Ò{$¢C“@@½ ½ðµÔMDi+hÿ0A0,zÐ &4Càß&4@rz	$	$	Crz€$!Crc!IýÒ{É	üÐ€3˜kp(h 0#h˜CC`)h 1				 CC`(hÀ0h�p)h
À0Ahqz	Qh™C1CQ`z¡C6	61CQ`Áh‘qir}	‘h™C1C‘`}¡C6	61C‘`�i‘rÁis)à1x67ÖhžC>CÖ`x¦C?	?>CÖ`Fj–s†jt{67ižC>Ca{¦C?	?>Cak–tFku~67VižC>CVa	~¦C			CVaÀk)ÿ1A1�uz@@r ð½ðµhƒK-hãù3`yh-	-665Cqyh-6-665Cqh--�`Uh--Ý`|Vh-	-665Ct|ÇýÇ±hÈàðGVh-6-665CtUh--]a•h--�a–h-	-665Cw–h-6-665Cw•h--bÕh--]b 5.z×h6	6??>C.r.z×h6?6??>C.rÖh66Þbi66c.}i6	6??>C.u.}i6?6??>C.ui--�cUi--Ýcÿ4A4#xUi	--+C#p#xUi---+C#pRib`@i( zÐ "Càß"@ r z			C r z@!C rc @ýÒ {À	üÐ z¿!@ r ð½pµDh"@#âp£p!€¢€"1 
ðœê "10
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+`p p½zŠ¤œdÊÀv“ÄfI H`€È`ˆ`apGøµã÷šüaM¨h$(
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ðÖë¬`
+àì`ú÷äø å÷Âþú÷bûø½ÿ÷ºÿ0ã÷aüø½øµã÷Wü?MihÐ
ð¶êÿ÷©ÿ,Ð<H,€`C"(a7K’7H!
ð¨ë0ã÷Aüø½1I ÈaH€HaˆapG8µã÷1ü,L`ˆ(	Ð"#’+Hbi!3
ðŒëàÿ÷åÿ i(Ñë÷aø(Ñ!Éò÷iÿ  a(ã÷ü8½øµã÷üMéiÐ
ðjêÿ÷Çÿ,ÐHl€`C"haK’H!3
ð\ë0ã÷õûø½Jˆ�p	
+ÁpQˆq	
+AqpGµã÷âûIŠhRŠ`ŠiRŠaã÷Þû½dÆÀuÊ †GËøµ$/O†$ `CÀ€Ax)Ò‚xÃx*H`*Hhðtèd$$,ëÓ-Ð-Ð-Ñ$H`ø½"HhpGpµ"ôžºñ`Ì
�Š‚p"	$Âp!à,%Óhx)xCÿ8	8Ð(
Ñ!J	(ð*úàJK!(ðCúà „BÓ!$à$-,ÛÑHhÿ÷©ÿp½!µ�p!ÁpIðkú½\£ÀT£ÀP£ÀX£Àß2ñÿ1Á1	h	#A›É
+~ÿ1�1
+rJrÿ"­2\‚Ò~ÀŠq~Èq pGµÿ0�0!à0s ðÉý ÿ÷Ùÿ½pµÿ4�4%À5hh¯I
+0ˆBh`Ò h0ð½ú(
+Ó0ð®ý
ðØì à4h` s p½ p½pµ @ÿ50~�5(H0ð³ú0ÿ÷Ðÿ(Ñ,Ð,	Ñ0
ðÀïÑ—H€z@Ôà,Ñ0ðçþà5,sp½yÿ1�1*Ð@y(	Ñ"J`Š`
+`À1ˆh(Ð`Š`pGyÿ2�2+Ð+Ñ@y(Ðà+Ñ )ÑP`pG�`pGyÿ2�2+Ð+Ñ@y(Ðà+
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+ÀpGñµ„°&˜Ÿ0H754�–ã÷—ú�˜@h(ÐaI è÷“ù_I	 è÷Íù\I1 è÷–ù �˜€h(ÐUI 1è÷{ùSIE1 è÷µùPI1 è÷~ù†à˜(Ðxi€xa¸i@,¸aÙ$üa˜@hA˜.A`Ð˜!€0�c˜ã÷Rú°ð½"!Ò€upG"!Ò€upG!µÉ@}(
+Ð ÿ0�0ÿ÷Žÿ ÿ÷ÿ ÿ÷Éþ½µ
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ðÒî8½#ÛÀµ}ÿ2�2(Ð0ðyþ½þµ
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ð²î(Ð'à' jF©ðù(ÐkFx(py@@¹Cà ,p0pþ½‰æ'xõ1Ïóµƒ°±˜x�˜„xÅx*Hÿ0@�ðpï((Ò&K!2ÒàÖ\Ÿ¾BÑÓžx¦Bs¡�8XÐ‡ñ‰‡Øßx§BÒ®BØÛx«BÒIˆBëØ™"ð6ï˜ðLï™@ð`ï °ð½ ûçÿ!HIµð ï½µ
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+Ar2 & �"©0ðzî!1sqsñ÷[ú(Ð ñ÷
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€(Ñ0ì÷ø(Ññ÷7ú(Ð ÷÷·øî÷¿ú__}ÎTÒ§•ê x	(	Ð
+(Ñ!0î÷uø(ðúíp½) ÿ÷„ÿp½óµ&�°Gi‰8ë÷Ûÿ(1Ð¨x	
ð`è..)....$.8í÷#ü)8ð¸øà ðMüà™ ð[þà ðwýà ì÷�ú ì÷…ÿ	à™ ì÷mþàš!8í÷oø0þ½pµ‰D(ÿ00ðÅø(Ð!"10ðæí(ÿ÷Sý(ÿ0ð!�0ð¤íà )0ö÷äû(p½÷µGiö÷ºýààj(Ð.Ð.Ñlaâj™(�G1 ö÷¾ýíÑoaþ½óµƒ°'‰…¨x‰8Ñ	(yÐ(WÐ(tÑ)1 ‘ö÷qüÐ ë÷Iÿ(Ñ™ ö÷füÐ ð~û(Ñ$ ë÷8ÿ(gÐ(0�ö÷6ü(Ð"à™ ð7ÿ(Ñ"™ ðþùRà õ÷¹þáy y÷÷èø 5©x�BÙš1 ÿ÷kÿ?Ðš) 
ð¼ìèj(7Ðuaêj™0�G1à"×ç)1 ö÷(ÞPÔjáéJü(Ñ(
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+à™"0ÿ÷Xÿ™"0ÿ÷Sÿà™0ÿ÷þ8gæµšx‰)Ñ	)Ñÿ÷[þ½ðÈì½µšx‰)Ñ	)Ñÿ÷Hþ½ð¶ì½µÑH°p½ ���(”õ÷2þhy(Ñ� €!hjFà)y)Ñ(Ñ(!h0jF
ð4è Þçµ(Ñ Ùç‰Ei ��� 	0�(õ÷	þ!x )ÐÜ)ÐÜ)Ð
)Ñ(0jFà)
+Ð)Ñà!)Ð")Ð#)Ð$)Ñ�#›ÀjFðþïà |â{C(ðŒûà!(ÿ÷™ÿ ›çøµü¶µÈþLÄ þIp
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+(ïÑ˜€TÕ}!ÁH"	ðúë	ÑºH!h"hIå÷„þ&Bàx ! �%\15 ‘ðì(é÷Œÿ,Ð˜ðüë0ö÷“ú�`a é÷Bý!ð.î˜9ë÷�ý(Ñ �àtá˜(Ðk˜/ÐðÜë!¸GàðÖë!ÿ÷°þà ðtë.Ñ-ªÑ˜ÀÐ }!�”H	ð ëÑ�H"h!hå÷+þ&›à 0
�@0�$0�
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ð¾ë˜é÷ÿ(}Ð(ðžë é÷èü!ðÔí-oÐhx)xCjÐ`8(p
+hp¨x€^Ñâ÷Îý)1�ˆ
ðÖê�(`aÐAy)Ñõ÷bû¨x7	Ð(Ð(Ð
(	Ñèx'HØYUª9}ÀÀ�BÐ˜í÷û@78{(Ñ  €˜â÷¦ý ˆ(Ðð÷ÿ(Ð �(©î÷öýkFy(Ð ö÷”ýí÷œÿ/ÑRHh"Ò‘C`˜( ˆÐ(
+Ð”àà(Ðš) #ÿ÷�þ˜(Ñsç˜(Ð ˆ(Ñ ð¾ê˜€]Õ}!=H"	ððêÑ5H"h!hå÷{ý&Là(/\07
+�$0	�€ (�
+™	˜ðë8é÷Kþ(6Ð é÷>ü!ð*í ðèê)Ð`x!xC$Ð 0ö÷wù�ha`x!xC`8
+ p(apÏÐ:!(#ÿ÷2þ �"9(ÿ÷Öü"9(ÿ÷Ñü¼ç(ð\ê˜€Õ	M$à˜„`Ai)ÐiˆGèh"h#©å÷	ý(àtø¾ÿÿ`ð´¹âÑ˜@Õü÷þ˜ÀÕü÷:ÿ˜Õà˜(
Ðy)Ñö÷NýàAy)Ñì÷«þ˜ë÷vþˆH"©ðòï
+(çÑ.Ñæ&å÷;„œÿDÚyt6)üþå>µ"#€H€L¬8~M`a’t5èh"}¡å÷§üHà`" ’"0#|¡å÷œüyH"80 a’hh"#{¡å÷‘ü("è8’"!83ð²ïjH"’"!83ð¨ïjH 8 `(hå÷“üqMrH¡")ð¼îdHpI´8``"o kFÃ*kI #å÷Œû(Ð >½WHµ@hå÷Ÿû½µ!gH"Iðäé(Ð°!Da�½MHµ"€h!å÷küILt4à˜ð–é`h"h#©å÷Oü(óÑàh"h#iFå÷Fü(öÑ!ÿ ë÷ù!ÿ ë÷ùë÷ù ½µ6Lt4`h!h#å÷*ü(Ñ h"h!å÷5ü ½ ½µ�+H"t8iFð2ï(	Ñ'H"t0h!hå÷ü ½ ½µ� H"iFðï(
+ÑH!t0h"hÉå÷	ü ½ ½µL!t4�`áhh!#å÷åû(Ñ h"h !å÷ðû½Hµt0h!h"‰å÷åû½Hµt0hÿ£H©@Ü´5g!h"Éå÷Úû½ø¾TimerCbMsgQäöMacMgmt80211MsgQMacMgmtSMEMsgQ¤tS=ÖMAC MgmttøµŒF†F và`FExxh-5C~¶`5€Exx-5C.ÿ>3>Ð	.(Ð.
Ð_.QÑÆx‡x6>CLÑh~¶`5€EàÅx†x-5C	ž÷çÆx‡x6>CíÐ�&-h¦@µCž5`y¦@5Cžd5`,àÆx‡x6>CÐy.Óh~¶`5€Exxh-5C~¶`5€Exx-5CÂç�'.hM¯@•�¾C.`�y¯@�7CI/`Æx…x6.CuF­-®FeF-u¬FuF-…Òø½÷µ‚°&)Ð&�.Ðõ÷Eÿ0Ðÿ ˜0kF˜€ Ø€`zÀÕ õ÷Šø7"(©ð~è8okF�x-(pXx!hp­ÿ1"1(ðnè­ây¡y õ÷‚ùÐ.ØÐ˜(°ð½ðµ¡° 
�üI¼3\À<ÞØ,L"¨ðÒè �8õ÷Sø�8õ÷’ù�èxªx ÿ0Ó0C �
+�˜Ç"’€	�
+58 0•�· 
+9€8�±âž 	‘�ðx±xC™5ˆB„FwØ˜!	@y�(Ð †F«àqx2x	CBšZ‘B	Ð@™ˆBóÛpF(Ñ �{âpx2xCÿ"72ˆ‘BxÐÜÍH�BVÐÜÌJˆ‘BsÐÜ-)mÐ=)lÑàá*(jÐ-(ùÑ9àðêeòeÝ´ýÅe3(tÐ(Ü(rÐÜ(pÐ(çÑ!ì1‘hx)xC™È€ð<ï™�ðx±xC(Ù™ªxŠrèxÈr)â'(#Ð((ÊÑ) ð¡û�á`(}ÐÜ:({Ð](¾Ñ  á-âa(uÐb(·Ñ!I(xarâ(x!ê÷çþ)x8ð$úâ
+˜)x 0�s)xÁs8*x 1Šp*xÊpÂy�yõ÷žø(óÑïáƒáà†áÛáOá!`Fð°è €0�rðx±x 
+Cÿ0)q0ðhï -à™à‡à°á˜ó"Ã�ÿ0a0|@t¼o0¾8àH7z�|"C�t˜z} ð†èn(Ùn ™ÿ1q1‘Èp
+q˜z} ðvè™Hq
+ˆq˜@�˜™zˆBÎÜ á‚àáÙà
+˜*0�8*x€1ŠwjxÊwÂy�yõ÷;ø(óÑŒá(x !(UÐð^èàþ ™u8à™
+}4!
+TÂy�yõ÷#ø(õÑtá(x(UHÑ �zBz	Cÿ"Á2‘CjxRÒ
CAr	
+�r`á
+àéà AzÇ"@jxR’CArTáFHû" Az@*xÒRóç
+˜,0�8*x 1
+pjxJpÂy�yô÷éÿ(óÑ:áñx°x	
+C)8ð:î(`Ñ8y(ŠÑèx©xC1IˆB—Ñ!8ðý!8ðüüáàÿ0ú0�€‹�â÷ù�(ˆ(Ð(Ð(
+Ñà‡ €") ð”î ™ˆƒ˜(+Ñ˜€‹('ÑH ˆÀ"Ð—˜ô÷†þ0o)Ñ™IzÉÕ"l!
+Rì÷çû(Ñ˜"ÿ0�0�ˆ˜ë÷Wú˜Ây�yô÷ÿ(�ÝÑ˜0àUà¼³/oISŒ4âhS„ ÿÿ¨õ÷ý(�ŸÐ˜ô÷Qþ(šÐ0�â÷¨ø�)x˜)gÑ˜`0��˜ì÷­û(Ñ˜"ÿ0�0�ˆ˜ë÷ú˜â÷”øšà˜")ð&î
+˜")$0ð î8y#(Ñ# @8‚x™ ý÷Ûü(äÐà‰ €") ð
+îwà �tà @ Azý"@*xÒ’ç!I(xaÈr˜"0� )N0ðîí `0Ázû"@"@2’“{šÒ’CšÁr
Ô™Ï"	x@špÂz‰‰’’
+CÂràŠ
Ñšx’	Ñ"CÁr˜"Axh2#ðÜè˜@|(Ñ˜@}€Õ à  d!à`F(Ñ#à`F(¡Ñ#€ Y*10ðíà©‘	™˜ªkF—•Ã!› š30ðí˜(Ðñx³x
+C)ð†íðx±xC™š	€�)ÓJå ÷÷#ü«Š!°ð½óµ Í°d"K�øI2¨ðêí .�!)¨ð,í!
+'¨À �¨wÇ±M0ä¥'ÊÀ¨ÀM˜ô÷\ý�M˜ô÷›þ!‘�!‰@%�2 1� 0�ä /� «�x !C�É÷"É@CpN˜NžÁx€xC
+;
+6+Ð 1��ª©/¨­Å0ª’12ª1«ÿ÷þûK�N™
+ ˆp Èp’áy2¨)�  «ªw*’")­Xwƒ)­êP'«T@(÷Ó �2¨EZÿ!V1h�ByÐ.Ü¾Ih�BuÐÜ=-sÐ(ÿ808AÐ(nÐ(mÑ0™ �ÈÀ&�µHwÐ @z€Ÿà(rÐ(qÐ
(ìÑ«˜ˆò!�	[�ö!	[Y�©+‘ «˜wá>(qÐÜ	(7Ð( Ð(ÕÑ  «�˜w‰ €àA(<ÐB(AÐC(ÈÑ  «�˜wE À ^à �ð%ÿ�¨«+�ˆÔç˜2(Ñ �pÐpM˜1ðì6�  «*�)�Xwwàà" 
+©
+ðßÿ «(˜wÐ
+©+‘�Óà˜àUà1àJà¡à  «�˜w‡ €Åç"©¨ðóø(Ñ2!à$àIàZà2©M˜ÿ÷Ãû“ÐƒFö‡,æ(›Þ‚! «*‘)‘wYwÔçÿç  «�˜wM˜ê÷üý�¨+�žà  «�˜w j0öç ‚zCzCÀ@�&¨+�  «ª˜w,’ØwH0�„à  «�˜wYH @z€à  «�˜wUH @z@Àà  «�˜w%˜À0|(NHÑ Àzà {�¨¾ç€!
Y(«5Š‰’w‰IKx0+Ñ
#à#“ 5p+“BÑ"à"Bpš‰€ðêë˜€�ç" ]kF˜‡ ðãúkFØ‡¨+� ðçª©!¨
«Ãª©¨
+«Ã&ªK˜«Áx€x	C/¨Ã0ª%˜«À0|%˜€ÀÃ"˜ÿ20Ó2©’‘�#('ª)©–ð4ë%¨)ªL�X)Ð'¨B]0ð ëL™ )ªPP'©H](Ð† HUm-æÓN˜«Áx€x	CˆN™ˆp
+Èp1˜‡BÒhæ.˜O°ð½Ø³4 µRRäÑ,!é÷`ù½øµ0
&�õ÷ú(Ðœí¨{(è–Ö¦*�y¢y‘BÑÁyây‘BÐ ø½ÿ÷`ù Ð8‰#!Ä !p™"	0ðHëèx©xC(Ñ àè{©{Càs
+ t8ÿ÷{ù(Ñ8ðîê&0ø½pµ
&ÿ÷5ùÐ ‰p ÿ÷fù(Ñ ðØê0p½µ$!!ÿ÷æÿ(Ñ$ ½pµ$ô÷Sü!	@y(Ñ p½!(ÿ÷Ðÿ(Ñ$ p½ÿµ�°%o *Ð"*?Ñ“Nà’Nöõ÷�û(Ñö÷,úï÷“þ(Ð ðâøÑõ÷Êú	Ð ô÷uü‡Hˆ(Ð ð÷¯ú˜ð÷Mû˜(Ð˜ððèÐ ‰1
+pAp!�qÁq!�p!Áp ðæè(Ñ ðnê=(°/ç÷µ
'ô÷ðû-Ð){)Ñÿ!"~1
+U"!€&qð÷ßúfHˆ(	Ð ô÷-ü ð÷kúà'ÿC&˜(Ñ ðªèÐ ‰ZI‰p	
+Ap1
+†qÁq!�p!Áp){r ðžè(Ñ ð$ê8þ½þµ'ô÷AÎš$ê¶²Å©ªû�!‰DKI@�(ô÷]ú� �ÿ ~0@](Ð þ½(y(Ñhy(Ð þ½"(ð é 6ðxÀ Ðï!@à!C whz€`Õ!Cà@@`w˜™€xÈp˜z€	(Ñ(ë÷lø(Ñ$ '�™(ÿ÷èþ(Ñ'8þ½þµ -�=Ð �0rprðx±xC€°p7
+74
+4ðp(ô÷ýù0�hzÀÕxx9xC@8p
+*ÿ2xp2! ðpé˜} r(ð÷‹üàrðx±xC0°p
+4ðpêy©y(ô÷éúÑÑ˜þ½¯€¤ë)ñµ˜ô÷ÆùÿIÿHð÷qÿ˜ð¦ú˜ô÷þú!I�G9{ 5&)	Ði‰)Ñ	!‰@€jðlê>s h�˜ð‹ÿ(Ðám˜)Ððþæeàô÷Îú 0Az)ÓIAr t!0ðNé@4&v˜!ÿ00ðzé˜þ÷ìøø½pµ
ô÷¾ú ô÷xù!@0v!ÿ1"1 ÿ÷òý-Ñ ÿ÷œtR ì{ÆÆçŸÿ`z@Ô ô÷¬ÿp½µô÷ ú	"’!€�b ÿ÷Õÿ½÷µ‚°˜&ô÷Mù˜™ÿ05"0
+ðÃý(
Ñ(@0{&)Ñ °ð½Ä‰,Ð,Ð8ð¼è"’š™˜;˜2ê÷ú˜xÀÑ/Ð ÀCà.Ñ!L AU˜ê÷Üû@5ì�8Ôçøµô÷ù!@0Aƒ!ÿ11: ‘ÿ÷¬ÿ ðïÐ(‰DšH p
+.`pÑ à  q
+àq  p àp ™"0ðÜè8
+§sàs(ðïà&öC0ø½pµô÷ÒøˆI…Hð÷}þ0xÀÑZ [1(ÿ÷Hý(ÿ0"10
+ð<ý(Ñ@4 ~(Ñ(ÿ÷êþhz@Ô(ô÷÷þ p½µô÷¨ø@0~(Ñ ÿ÷×þ`z@Ô ô÷äþ½pµ‰ei 0AxxCðèci)ÿ11ÿ÷
+ý(ÿ÷¹þhz@Ô(ô÷Æþ p½ÿµ�°ÿ!]1
+�(ê÷{øÑ@2ç ‰*>˜3î©
+PŽ· ˜2€)’æ2 #ê÷½øš’š™38ðèï ê÷üøçøµ 5êx¯x$:CŠBÐ$à*ÑÀx@Ô$àðÐï(Ðhx)xCÐhx)xÿ.ÑCÐ(ÐàC°BÐ
$ ø½‰Ai
+€2“k 1
+‰I‰Æçøµ‰Gi
8ô÷ø8ô÷Tù  7	!‰x�`€jðÊè"R! .s
+Ñ› )€€"(1 
+ðwü(Ð&0ø½øµ
ó÷îÿ0ô÷.ù!IA
+{*Ð ÀCø½#ª"“SM"Ò„€(` s hð–è"’	J
+H#1ð’é(hð`ï ø½ÌÌÌÌµ€"""" ¡1ìóµ…°$˜””‰Fi
0ó÷®ÿ�0ð’øèx@Õ À78j(WÐ1TÐ€|ÀQÐ˜@0
+ðªïˆ#`1€:j™2¨á÷âÿ(Ñ$ 5hx)xèxC©x
C,Ñ˜ÿ÷Vÿª €[(	Ñ˜!ÿ÷Wÿ'%(Ñþ¯€ðñ5ßêà,Ñ/Ñ˜!@0và0©ÿ÷mÿ�˜@
+Ðm)›	"8–ÿ÷Øþ@Ñ!à,Ð!0ÿ÷Éý°ð½pµô÷…ø	!‰F"!	\riŠBÓ p½/" !€ðÌî%ÿ5!�5ÿ(©€Ð@¨€`z!C`rpi@(paÑD! è÷³ü¨ˆp½þµ@zÀ~Õ ó÷ÿ zÿO€QÕ &ÿ00�üK™0jFðRí(Ñ˜1å÷`ÿ˜"1ðLíõJ™0ðJí(	Ñ™2 å÷øþ˜"1ð:ív66.ØÓ @0A~‰Ô)hÉÊRÊwA~ÉÔ)hÉŠRŠw€~@
Õ)h @xI		pÑ! ê÷Qÿ z€Ô(hÀAIAw ê÷Úø zß!@ r !W0
+ðžî ë÷¹ú! ë÷Ôü`zï!@`r ÿ0�0‚ˆ*	ÐRà‹à(h/!	@ !ð*î °€(hÀAiIAa(!@0v@~(
+Ñ(hÀA~I		AvÑ ê÷Äø  0Ïº\ÕòÑQ¼i~€
+Ô(hÀ�~I		�vÑ ê÷çøp~@
+Ô(hÀÁ~I		ÁvÑ ê÷Tù(h! 0ÀxÉf*Û€Õpj(Ðð‹ý pb(h 0ÀxÀ	
Ðpj(
+Ð© € ö÷”ú zï!@ r 0b zý!@@@ rŸ € ðÆê ý÷9þ ÷÷ù(Ð! ö÷bý($04!
+ðÖí(hÀ@i(ÑC! è÷£û å÷Ÿùþ½pµEi‰(ÿ÷æþ)ÿ1"1(ÿ÷{ú2!(#ð”í é÷”þp½ÿµ�°
+žó÷æý8ó÷%ÿ8÷÷Ôø(Ð!8ö÷#ý$44! 
+ð–íš™+ –ðtí°ð½ÿµ‰°- %žíC0€	˜ó÷Àý�	˜ó÷ÿþ	˜€0€kðHí(Ñ/IÑà/Ñ™˜CÑ 
°ð½LI`|À#Õ# ]Ô�Õ'à7¸{#�€3o"ž�’™˜‘�yŠ"#2’‘Øn$6�›š	˜1ø÷†úà%à�Õ˜(øÐ˜(õÐàÀ		ÐTGÙáô%¿'™2 
+ð¡ù(Ð 0€èç(»çóµµ°'=
+—ó÷^ý� ó÷�þ� €0�˜ÿ!0�‘1 é÷Vý!ÿ11(4‘,�Ñ4™" ÿ÷Åùx7°ð½,˜"‰,™˜2’@-�· €!4š,˜#é÷Šý-˜! 03��pÁp,™° �6™-˜*ª+«ðÊì+™*˜ªðHü”!+�
+]’#-˜t3©ð¾ìà@8(0Ñ6š(˜©kFÃ ›š'™ÿ÷0ÿ@ÑkF˜�$à˜À0Àk(~Ñª
+©’‘2-˜2©«ð˜ì(Ñ›°l3(Ð2L2’6™-˜ªðŽì(Ð,˜ÿ÷Ìþ�ç3™ˆp
+Èpöç«x+Ð-˜2!
ªð~ì°l(	Ñ˜(Ð2-˜j2=!#ðpì0 02�ÀxÀ	Ð(˜(šCx-˜’D!ðbì°l(Ñ˜(Ð˜ 0y(ÐN €]€ÕA À2-˜J!#ðLìC À2-˜!#ðDì°j(	Ñ˜(Ð2-˜.2Ý!#ð6ì)˜(3Ð ð^ú(.ÐÅWè­ö‘™{o à^àó÷¦ý)!
+\	!É*Ò"à"AJuI"‚!Ñp!qÀ0x
+€À‘-™[ ð“ú-˜	BxxC@-™p
+Hp'ÿ7�7¸ˆ(Ñ ÿ÷öü¸ˆ%(%Ð3˜Áx‚xC!Ñ ðú(Ð ó÷aý)™)
+Ð 0@z(Ò6™ ðø™eà 0AzI		)ArÙIAr >ç-š! #ð¬ë zAIý @!r2˜ÀxÂ	Ñ‚Õ€ €Y2Ð€|ÀÐ C!ràÔ€Õ ö÷àþ(Ð À 1�@j(Ñðû1™Hbà0T!
+ðœë°j(+Ñ˜(Ñ°l(%Ñ˜("Ð! ô÷Oþ˜(Ð˜™`0	zÁq™	zr™	zArÿ m0�Y € )Ñ™	z	Ð!à!�aà! ô÷,þ¸ˆ!‰C3™'q
+Hq˜!@00�s˜u é÷[þ3˜9
+‡pÁp!°lW1'@7(/‘~Ñ˜(Ñ-Ð-AÑ z€Õ˜ 0AzIAr˜(6ò¡Aø/ÔÇ
+Ð- Ñ z€Ô˜ 0AzIArà-Ñx~ÀÔ z€Õ˜(Ð¨ðë(Ð˜ 0�zI�r˜(Ð¨ðë(Ñ-Ð-
+Ñx~ÀÔ z€Ô˜ 0�zI�rx~€Ô z€Õ-Ñ˜(Ð¨ðòê(Ð˜ 0ÁzIÁr˜(7Ð¨ðæê(Ñ-Ð-
+Ñ z€Õx~€Õ˜ 0ÁzIÁr˜( Ð˜Àx@Õ-	ÐàPà-9Ñ z€6Õ¸~@3Ô˜ 0{Is˜!hI@x(Ñ! ê÷ƒû-Ñ z€Õ¸~@Õ˜(,Ð˜Àx@Ô˜ 0{Is˜!hI@x(Ñ! ê÷cû˜(Ð1L1¨ðŒê¨ð†ê!zÀIIC` C!r™/˜"
+ð°ê z"€Õ/š’«z"¨
+ðÌí«	�z¸s"8©
+ðë	™ ðoû ý÷"û ý÷Òú ý÷¥úŸ  79y 0).�Ñ0˜Astà¨ðPê(Ð-Ñ0˜@{(Ñxy@xqáê`ú°`DÑ é÷Åü0˜!Asà-Ð-
Ñ0˜@{(	Ðxy@(xqÑ é÷¯ü0™ Hs6˜ð&ê(Ð-Ñ.˜~€Ô¸y@¸qÑà-Ð-
Ñ.˜~€	Õ¸y@(¸qÑ é÷¼ü6˜ðê(Ð-Ñ.˜@~@Ôøy@øqÑà-Ð-
Ñ.˜@~@	Õøy@(øqÑ é÷ý ù÷pû! ð[ü é÷1ü6™.˜ 1
+xvIxAv™3˜
+pIApÿ"‘2-#©¨ç÷Bÿ( Ð�05)	ðóýF6˜Axx
+C6™0ð¸é†-™"0ð²é™€@ˆr
+Èrš4™ ç÷Þÿ,˜é÷túŒäµDi ÿ÷°ú!ÿ1"1 ÿ÷mø½IH`pGóà;ðµ�° �8ó÷òú�8ó÷«ù˜�!‰E(À0�	�8ð‡ÿ(Ð à8û÷Oþ�8€0.
�Ñ
˜k�
˜@kà.}Ñ
˜€k�
˜Àk(vÐ™)sÐ°1‘”9.‘e²¿üÂÄc
+Ñ°!�!IaIz:t2‰É’$2‘3ðBé
™ÊŠ™ 1
+r
+Jr*ŠrjÊr¬!Ë] 5•*y!*Ñ!
+!1‘ð,é.Ñ˜"!Å`
˜	]B} )Ù	›(ðé8ø÷uÿ(Ð)8ø÷ŽÿExz€Õ €8|(ðéE.Ñ™(ð
+éE˜	!‰@~(ÑâI˜@ÀxÁËÊ@Á(àÉàðøèE l(Ñ!L1(ðòèE  0
+�Àx€Õ8ö÷ëû(Ð#à3šŠYŠ ì0’‘�[|!(ö÷5ûE˜")ðÖèE l(Ñ!h1(ðÐèE
+˜ÀxÀ	Ð) 	ðÊüE l(ÑN ]€Õ˜y(Ð·H"S8!(
+ð´è5³H"C8!(
+ð¬è­
+˜ÀxÕ8ö÷Ÿû(Ð#à3šŠYŠ ì0’‘�‚Û{!(ö÷éúE j(Ñ!,1(ðŽèE.ÑžH`p�àœH`˜ð†è˜™Áa™˜ˆp˜Ép�üý¼!!Ài	ˆC™Èa˜
+ðJï™#Èb˜™( 8p
+Hpš!8ðè8y(Ñxy(Ð.Ñ™8ð~ýà.Ñ™8ð]ýxy(Ñ.Ñ™8ðwÿ˜šÃh˜1ðHè°ð½µó÷~ùtI@ÀxÁËÊ@Á ð:è½pµó÷mù,€4!k(ÿ÷åÿ¡k(ÿ÷áÿp½µó÷^ù ÿ÷êÿ½pµEhà÷oúhx*xC8),1= 
+ðtì(%Ð!yÊC’
+Ð‰‰)Ðâx!
+CâpÂx
+Càâx÷!
+@âpÂx
+@ÂpÁxû"@âxRÒ’CÁpâx‰‰’’CÁp0à÷<úp½pµ
ó÷ùh4!(
+ðÞï!(ÿ÷´ÿp½pµó÷	ù,€4!k(ÿ÷çÿ¡k(ÿ÷ãÿp½µó÷úø ÿ÷êÿ½µkFIhˆH…QhH…½µó÷êøÿ0€4ÿ0€¢k!kmÿ÷ëÿ½µó÷Üø ÿ÷ëÿ½pµIh# 
+ðžïih#* 
+ð˜ïp½µó÷Äø�!‰AC]Ä“øÿòùœÀ1JxÈh’	ðrï½µó÷¶ø ÿ÷ìÿ½µó÷®ø€4¢k!k,0ÿ÷Ðÿ½µó÷£ø ÿ÷îÿ½IH`	IH`	IH`pGY¼;À;-8=ÿ¨;è;*Ò)	Ñ@(Ò#XCÿKà)Ð)ÑýI\&(Ò#XCùKš3À�T pG pGþµ"’>àðx±x5C¸B8Üix*x	Cÿ9Š9(Ñ(&Ýèy�iy*y™Cé÷@ú�éxªxC@$„FàaHz
+)ÒI
+Cz™˜ÿ÷©ÿ(Ð �ddEëÛèx©xC96†)¾Ò˜þ½óµ�°!˜€˜(Ð˜(Ñ þ½œ'%&nCÈH!‚]ÿ Š0 p
+`p é÷'úÂH!
+6PsrI	[x	R
+)CróÓPÀ
+ pâp$m-ÕÛ%&³HnCš0‚]ÿ Š0 p
+·*`pÓ!à! #é÷÷ùªJ! š2¶Bsr!ý}ô"N¢íI	[x	@
+)SróÓ@À
+ pâp$m&-ÏÛ˜™ € þ½0´ ,Ñ	ˆ0¼<ç,Ñ0¼ç0¼pGpµ$‘M `C@	ð`î ú÷¿û ú÷üd$$,îÓp½÷µ ˆ°�…Hš"8x“BÑ)Ñ™p à 
+™`¨è÷?ýª©¨è÷¿ýzH'yI„0à/ÑkFy€Ñz{™æ÷œø@�kFy:�˜‰è÷ãükFy�˜‰è÷×ü…BÚ% eIxC„1�@�	ðî BÚ&à®BÝ.]H™�	ðøí°BÐ™0	ð
+î
+˜!`˜	ðìí BÚ&à®BÝ.˜	ðàí°BÐ™0		ððí
+™ `˜	ðÒí˜	ðÎí$˜0	ðÈí„BÚ ™1	ðÚí??/‰Ó˜°ð½8µjFÿ÷aÿ˜(Ðÿ÷Fÿ 8½µ4I p/I„"„9ˆ	ðˆí"! ÿ÷âÿ½pµ$%(ú÷ïú¥ú»ðÖ¦P„BÛ m---óÓ p½óµ�°å÷ìü!N?$„6 `C…˜)	ð’í)	ðŽí)1 	ðŠíd$$,ëÓ˜"9ÿ÷®ÿþ½µå÷Éü	" ÿ÷£ÿ½óµƒ°å÷¾ü�˜(Ð˜Áz‚zCÀ(�Ù àâ¿NÆV¾=Ã°ð½˜	ð8íuJ!(p3Ñ'-à˜ù4ex#à y( xÐ)
+ð(íà)
+ð(íú÷vú!AChH  V1	ð.í  V1	ð(í1  V1	ð"ím-- x¨BØÒ˜‡BÎÓàZI„"„1ˆ	ðâì™˜"ÿ÷;ÿ«çñµ ™		ðíPHœx4'(Ð%à%LJiI¥:P\Š pQxap’x-¢pÛ"¢q
+ðÖìà"¢q
+ðÖìú÷#ú!AC?H„80	ðÄì`q0	ðÀì q00	ðºì?àp4?m-ÎÛ˜ÿ!U1r	
+Ar™ø
+ˆrÊrø½*µÓ",K›\[*K$3š\R³W”ìb†eë)Ð)
+Ñ%I\&(Ó 0y!AC"H	à@(Ó !ACHš8	]*Ð‰\ˆBÛ½pµ)Ñ-Ø-Ñ,Ð,Ñ p½ p½ p½,Ð,ùÑöç*1 ÿ÷±ÿ(Ú*1 ÿ÷ªÿp½ p½=ÃÚ¾ÂNÆ|Àðµ(Ò#2à"(Ø"þIŽx=m°BüNËˆ‰O‰‰ˆu[Ù÷N’ 6¶XµBØôK(3šX•BÙ#à;™BÝàïN’86¶XµBÒ;àëN06²X•BÒ#™BÚæIˆpð½øµãO8i(Ð(ø÷–ý(ÐhzÀÕhy(Ð(Ñxx°BÐ0ÿ÷ªÿ¹ˆˆBÐ(è÷8ú~p¼€ø½þµÿ0�0†j8ÿ0™0ÿ5À0$™5.�?ÐpÀÐð¿üð˜üÉI@†CÈHBÐ@ †C˜!�p ÄK"‚@V2BÐ*À2xšVŠBÚd$$à,Ðd$$ïç)À1p(Òðjü(àÙ˜x(Ñp+Õ,y÷Ó_è–nÛV)Òd$$ à˜! à)¿"R\À1@
+p(÷Ü˜!pà(Ñ°Õ,Òd$$ à)¿"R\À1@
+p(÷Ü˜!p,u8y(Ð–Hx(
+Ð™LÀ5(x pú÷ÏÿÀ7!x8h
+ðfë þ½pµÿ÷rÿ,ÿ4™4!!b }àa`b bÿ Æ0AU´ U 	ðpì"(ð%ý 
+ðJë! 
+ðJë‚I(	ðjï1(ÿ÷(ÿ p½Òçpµÿ4™4 }!É``¡`´! `U! 
+ð.ë%€5èk(ÑsH
+!
+ð*ëèc0ÿ÷µÿp½øµoH	ð�îÁ%@íEClNmO$ 0X/#[XC}!É	ðìÀ¨BÙ(a:hd,PRìÓø½pµÿ4™4
 ¡b
+ðë`À0x"0ðÄüUI0	ðï(p½pµÿ4™4ái`jˆBÒ!
+ðêêà!À1A\)Ð)
+Ñ  0@{(Ð(ø÷(ü(Ñÿ p½ ps`j(ÿ÷Áÿp½µÿ0™0
+ðÌê ÿ÷¶ÿ½ÿ1�1Ék¯çpµÿ4²ÿ-ä	ü¯~À™4% 5.}!)uÿ÷¼ÿÿ(Ñ.u h
+(Ñd à} À ` `` `p½ÿ1™1" 1
+uÎçµÿ0™0)Ø)Ñ}"Òà)Ñ
+"àd"‚`
+ð’ê ÿ÷Äÿ½ðµÿ4™4¡j À0\…°�  0�@{%(Ð™8ø÷¾û(Ñ%8ÿ0�0i)Ñ@i(Ð˜ð)û(Ð#àd4òï@<´`ÆÀ(|ÀLtò\# <0ª©ð®ü(Ñ-TÐ 
+ð(ê ©
+ð@ê>kFyÿ6™6(C 6(Ð5}-Ñ%à0}"!
+ð2ê \0ðåûÿ(
Ð™ˆB
+Ð" 
+ð&ê") 
+ðê-Ð-Ð-Ð-Ñ)à˜{(Ó!8ÿ÷^ÿ °ð½0}(Ñ 
+ð
+ê(Ð8ÿ÷/ÿ0}(êÑà(çÐ êçþµ¶Hÿ4€z™4@	Õ(ÿ÷`þ `` `} À `nà h'
+0. 7ÿ6 `8}™6À6(LÑ j€]& 6�p{(Ð™j8*fàGÀ}(ø÷û(Ñps(ÿ0�0i)Ñ@i(Ð˜ðsú(Ð#à# <0ª©ðü(1Ð 
+ðŠé.Ñ ©
+ð é!j`jˆBÙ(ÿ÷éþ à 
+ð é(Ð(ÿ÷Æþà 
+ð˜é(Ð ©
+ð†éñç(ÿ÷ðþ(Ñ! 
+ðdé`j�](ÿ÷Dý8}(Ñ¡h} À�BÑ þ½ þ½µtHÀi`0@|(ÑpH€z@	Ô <0
+ðjéah@`` €4 c½ pGpµ	ð é4ð³ûðøû-Ð-Ñÿ%S5#ààx¡xC†%à¨1ðyûmvàx¡xC€¨BðÜp½áx¢x	C ‰ðgû!(
+ð0é,ðÑp½pµÐ 	ðæèðÁú(Ð 	ðÜè(Ð(
Ð(Ð(Ñ ÿ÷¬ÿ(ð/ûp½ðbûøç
+ðéõçøµÈx‰xCÐ ø½6N µi
+ðé°a8ðÒù(Ðµaø½!18ÿ÷¿ÿ8ðù8ü÷ù ø½µ(HCi“Bw#“‚Ü
ãëçÑ)ÐBa ðù ü÷ù½"!1µ	ðtè½HJ!‚apÁpÂapGµÿ÷õÿI ˆ�ðû½H!A�IK	ˆJ™BÓQ�àK™BÓ�Â€àI�Á€!ÉC�€!�pAppGIH`H
I@0`pGxLdïßÿb¹Xˆ¸D¸ò\\µî÷rú ÿ÷ÿ½pµ
+ðzè }ù÷†ý hn€yÀÑ!(ü÷\ø0p½ÿ0�0µ‚jÛK $!�@BÑ\(øÑ½µAzÉÕÿ÷ëÿà	ðìî(Ñ à	ðæî(Ñ à 
+ðJè}#ÛXC½ÿ20µ�2“j +Ðÿ$ä¢CT"B	Ñ"
+p ",”@BÐ
+p0½RõÑ0½µ	ð¸î(Ð à  p ½ðµÿ4�4¤jx ,Ñð½®OV%!7.Ñ*š@"BÐ pð½§JÓ\š¾X¦J²C.ž@2C@+òÐ,êÑð½*üÑŸN>*”Ý¯‡ØÿUZš@"BåÑó\šºX@+ðÒ,óÑð½þµ %�`yÿ5–N”O™5(	Ñ ø÷ù(Ð7èh@/a<à ø÷ù(Ñ>ŒHðvï(Ð'ŠIèh	h>@@@ˆHƒJx!2�QX"@…I`.a� iFÿ÷‘ÿ(ÑhFÿ÷€ÿ �HˆH)ÑkFxà!p!41 ÿ÷Pÿ(Ñþ  4 u˜þ½ÿ2�2Qb¥ç�aÁapGiI9\pGgI€!1XpGÿ0µ�0�jbK $;"‚@
+BÑ\(øÓ(Ñ"’
+BÑ ½!�@aHBÐ pG pG pGpµÿ0Á0	"h’)Ñ(€~p½@ÿ!­1I]�BÚ(Ú (€~(ÿ÷Áÿ(ÿ÷Ìþ„BÙà´BÒ4 p½pµAyÿ4>M=N�4)Ñø÷]ø(Ð.`j5àø÷Uø(Ñ56HðÊî(Ð&4I`j	h5@@@2H-Ix€!1XBÑ p½ p½)Ð
+)Ñ!¡ç pGÿ pGµ@y(Ð'Hˆ(	éûÔ›LÐH�0@\þ(
Ñ	ðºèú÷3û½!ÿ÷}ÿ½ ½*µÐú÷&û½ÿ÷Ôÿ½#(µÓ(Ø$8p	à$(Ñ  pà(Ø8ppà#½{´ïßÿÿÿ?€J|d€pg?ðµ  "�I�Lð7`œKQ Ë
�~X^P™N@vX(nPôÓR
+*êÓ’M“N "BCAK·P’@	S`
+(‘`ñÓð½(ÒŠIp pG pG÷µ‚°ß÷]ø�¼ Y™‡hEh0ÿ0™0	ðíyHšh(	ðTî#i"8	ðRîÀ4 xuI€ 1X!h	ðLî©xPsIHi"CHa˜ß÷5ø°ð½pµlNpx‚BÑ)ÐfH!L8tp	ð4îdH2x!x0	ð2î(ÿ0™0ðôî"(ÿ÷«ÿp½pµ[N°x‚BÑ)ÐSI"	D0´p	ðîSH2x!x0	ðî(ÿ0™0ðÒî<­X¢Ðo¤¹½"(ÿ÷ˆÿp½µ÷÷éþ! ÿ÷ÔÿHH!~€Â ÿ÷«ÿ½AJ?Kx2 3µ	ðöí½By*Ð*Ñ)Ð7HpG5HpG*Ðy*	Ñ	"’€@i)Ð@hpG€hpG pG.JpµL: !l4›…›@(cQ÷Ù"a#J !ˆ2›…›@(cQ÷ÙbcJ !H2›…›@(cQ÷ÙJ !›…›@(cQ÷ÙH(0% e® Y!h	ð†ím¡Y---`òÙp½HIx0µðÌì½HI 0`
IH`pGˆÆÀèzÀ¨yÀ˜ÇÀ(|ÀÆ€¡€\ð;É©ô;øµð¨îþMé`¨`èù0kI@4c |�(Ð(h&.`ð”í&t |ôN(#Ðâ÷ø2nsn‡™A²m¨hóméh…™A#è™AÚhB’A‘à(: ðÀû8åJ'3(»AÓf�f§t˜ø½ßHµh)ÐÝL!`àj!@àb`k@`cðÈí)ÑO&M‘ÌÛ„À k@ c ò÷óþakí÷«ú½µ$(Ð(
+Ð(Ð(Ñð²úàÿ÷“ÿàí÷2û(ÑÇH!@0tá÷ÁÿÄJÑd�dàðcú ½ÀIÂx 1Šq€xÈqpG¼H!AcpGºI 1ˆ€�¸HbpGÿµ…°&
"¨–ðDìhz)zCÿ÷èÿ53­Nñn°nY@CÐ˜î÷møµfõf¨H 0�@‰¸BÐ˜G� 7™ø�™)ÑÀ0à!ðTí0™�,Ð˜áx�q˜¡xÁq˜L™"j˜#ð2í |A’H‚ |@€( tÙ  t |@cÑ‹K3!"U^[à@R8ˆBÛG}][µBõÜ@R€*RìÛHÐI)æÜà)Ð!áçzKŠ`‚  ‚à‚AÍ*ŠaŠŠBÓ
+b‚)Š¢Š‘BØ@€(¡‚ìÓnH€0Š!ƒâ‰bƒ ˆ ƒcŠ›
+›c‚ã‹+
Ñ›‰Àÿ0õ0ÿ#õ3˜BàƒÓãƒ
 ð³ú¡‹š ð®úâ‹aŠ ð©ú¢kák	 ð¤ú¦GìÈ/l~»ðVí jš›@!€YA@±AÒPH@0A|IAt 	°ð½ÿ÷ÿ ùçJHjpGøµ&GMFH*jÁh‘€h3ðŽì™¸™Aa` `(j"hch1€YAa` `ð í"hch‹AðÓø½þµ7N6O 6ðí�3H
Áhš€h‹AÓ.J8jÓh’h€š!YA€©AÒðúì'JÑ`�` ðq%H:jÁh‘€h%+�ðLì˜™‚™AxŠ)€YAa` `õy-Ñµy8j"hhCch!€YAa` `µyðÐì"hch‹AîÓþ½óµ…° �ðÄì
HL‹2(Ò!jHCà€€!YA�H‘hIˆB
Ñ˜h@ àˆøˆù°é,¹ýÿ(Ü*h˜kh™‹AÓ(ÿ÷Yÿ`Š*hkh!€YAi`(`™ j`&4�´BÝ�HxIp°ð½kh*h˜™„™A,’ÚdB˜„BïÙ˜šh!€yAi`(`˜&(ÝÐâçóµ�°O> >¸y1jHCÞaŸ!ÄE­Û-� ÿ÷=ÿ{H%h�)	Ø™@HC"hch)€YAa` `tH‹(Ð iFÿ÷tÿpk(Ð(Ø¸y(ØkHh(Ý ÿ÷ôþðk@ðcpk"hch€«Ac` `cH™€8hÿ0Z0€à˜"hch)€YAa` `ðì"hch‹A0©AíÛþ½TH 0€|(ÑQH# 8Án€nY@X@CÐ pGpµMJJI‹Œy -
+Ð2-Ò(à‰ˆ(ðXëCI	hŠ*ØLC$$à@J‘BÐR‘BÑ-Ð BÒ0x BÓà 0pp½8µí÷¾ø(3Ñá÷Qý0L <ád dð¼ëadáù9 dh(Ð"
+`ð°ê+H*Iˆ‰ˆBÐ$L! <`k@ðë)Ñ jàà‹(Ñ"HbŠÉ€"’H K!ð”ë8½pµÞ÷&üÿ!Hq1ð†éH% 0…tð€ëL <áe eá÷	ýaf fHd!Š�€!
+b…qHâm¡mÂ`�`0Þ÷ü¢mám ð¯øp½4Â¨ù,¹'"�À±Ee�°éýÿ@¹'§ˆøµá÷—ùILà`pá÷’ùax"x‹ƒB÷Ü‰�BôÓ`p½øµÿ÷ëÿ@N?M$6 2X*Ð©h8�Gd$$,óÓð(ëia(a ¨`ø½ãç8µð ë2Laa a1Hð–ï`h
+!ð†ê’-J,H!#	ðhè8½(H!Ap!�`pGpµ(%Ð#K!$3¢šX‚BÐ*Ñ)Ñ!d,óÛ,
Ñ)ÐM‰XP¨x(Ñÿ÷Ãÿ¨x@¨p,Úÿ÷Óÿÿ÷žÿp½pµ(ÐL£x+Ð!"2�UY…BÑ ‰[PP pÑHð¢íp½I		)êÓp½8Âøù3pG pG8µV¡	h‘$"iFðdý(Ñ$ 8½8µP¡	h‘$"iFðVý(Ñ$ 8½pµd!ðŒè6à`x€°B4Ü x((ÐÜ (
Ð%(
Ñ¬d#à)(ÐD(Ñìeàìdà,eàleà) 	ð2é(Ñ xÝ(Ñ ÿ÷Ãÿ(Ð¬e xÝ(Ñ ŠašS¼äõêHÿ÷¬ÿ(Ð,f`x¤6¶.ÆÑ0p½pµ
D!ðHèà`x€¨BÜ x (Ð3(
Ð6(Ð1 	ðé`x¤-­-éÑp½ô`õç4aóç|µ 
)��Ñ|½(ÿ÷öûÿ6�6±ˆ(ªkF	ðäè(Ð˜(Ð	H™)ÐLäà$C |½IH`pGPoš	Pò	€Q<pGµ!BH"	ð è(Ð!Da�½‰”0pGÿµ�°˜‰Fi
,t4(,f`0#€0!�As!0ðè xó!@™0	C p €09x‘BÑyxB‘BÑ¹x‚‘BÑùxÀ�B
+Ñ @09yx‘BÑyy@x�BÐàx!C1àp"˜1 ðØï"9à"9 ðÐï"1˜1 0ðÈï· €1 "0ðÀï™ s!©p¨`èh!	ˆC!	Cè`˜ù÷xû°ð½(µÐðdï½÷µ„° ��`x!xCÁ“?j™¸Tõù9<Ñpy(0Ñáx x	C ù È%‘�˜‡BÒyx8x	Cÿ8!8ÑùxºxC(Ñ?5"8iFðõû(Ð8ñ÷þà5(Ð!ó÷óüà!0ùç˜@�àáIˆBÑ �áx¢xC$˜„BÒ˜(ªÐ˜°ð½øµÿ&v0
+pHp"	8ó÷ý
+ páp$0
+&p`p"!8ó÷÷ü
+ p-ápE$ðºï@ø½BxxC *Ð pGÂxƒxCÑ p pGBy
+pÁx‚xCpGµÁxƒx	C)Ñy	)
ÒDyc+	Ò$#cC‰šQ‚y$9ŠpÂyÊpÁx‚xC½ÿµ�°�ÂxƒxCÑ °ð½	?$àxE)Ò)Ð$ HC™D$<`x(Ð)x)ÐˆBÐ™ˆG )x@ap$	(÷Ó¿h?¶?66/Ó.ÖÒ˜Áx‚xCÆçŒFøµÿ!	1p	
+ÐJ›æ´!TŠô€Ap!�p!Áp"$%MCI		cFpë[x@¤$p@$)îÓ&ÿ!
+1$#sCeF_v"66
+pEp%…p%Åp“qûFq�x…qÛx4R$Ãq0$	*çÓ.ÝÓðòîø½µððî(Ñß÷êüí÷û½þµŒF$%._/†Fàˆ`DXxxCÿ9A9Ð)Ñ^àÙx›x	C`$,åÜpF(Ñ-Ð.Ð/Ð8x�0x�(xkFphxXphFÈß÷ýþ½ˆaFD	@%!¥pápÿ!A1!p	
+ap¤¥p%åpÿ%C5%p-
+epˆƒ4€ÁrF*Ñß÷øüþ½ß÷ýþ½÷µ ‚°�˜
é÷-ù_àhx)xCÿ8k8$Ð(5Ð(
Ð(EÑÿ J)s0#ðlî˜ì÷[ø@àJÿ 2)r0#ð^îI‰	Š
+ 
+)ÓI€-àIJ	h¨h‰ˆBÓ:)ÿ k0#ðFîà �à:2)ÿ V?‰°# bJ=l0ñçÿÿÿÿÿÿÿÿ¦ëF¹0é/éxªxC$,Ð06-.�Ñ˜¡æpµé÷Ãøÿ r0 p
+`p  pI àp| qH|`qÿ ¤s0 p
+`p  p àp"‰ ðZíÿ 4k0 p
+&`p ¦pàp2) ðJíÿ 4l0 p
+`p0
+¦p)àp"1 ð<í8 p½IH`IH`pG¤ë-<ù÷<µ"iFÁ"iFð¤ù(Ñ ½ ½µ¡É’‘"iFð•ù(Ñ ½ ½ÿÿÿÿÿÿµö÷ùð¦í½øH€hpGöIˆ`pGôI µð*ï	
ðH½h½ïH½ïH½ïH½Hh½pGpµß!ìHðØìëH! 0ÁuéH.1ðíæM!°5 ir¨r "èr*s"js"ªsés,
+!4*tap¢pàp "q`q ¢qàq "r`r  r àr  s  8"Cw 0~ "Cv ð�ïÏH8‘Â¬%B3†ˆhq
+¨qÿ  wp½µÿ÷´ÿà÷ôû ù÷VüÀIa ½"µð„èà÷ûû¹L iBkAj¿Hhø÷‘ýàh(Ñ à`ù÷Éÿã÷ñýã÷%üðíø÷+üø÷=ü·IµHHaµH@0Bh€#CB`BhCCB`
+i"
+a‚`h`Ý÷·þï÷™þï÷þï÷‹þ Ý÷²þðìï ðòìðôì ½µ$†°å÷Vùö÷ˆú"! ðîðîðJèò÷¬û›H�›H�›H�›H�¨ú÷šÿå÷°ûö÷˜øå÷Bþú÷Tüÿ÷êûå÷¨ü“I”Hò÷Aü‘I“Hˆ`ðÄìðpýè÷ úðÂì"|H’€i"!«à÷�þ °½µvL‡H a 0à÷uþÿ÷±ÿã÷)ùðªìð¬ìð®ì€H!õ÷�øI(`Ð"@hõ÷«øyH"8`aeH!0à÷lþÝ÷•ýß÷ü÷÷ÓøtHð”ìþ÷‘ý÷÷‘û\IqH1H`ð|èð¨ÿ ½µá÷bþ(Ñõ÷Óþ(Ñû÷aù(Ñï÷òû(Ð ½µû÷¬ùï÷#üà÷bÿõ÷àþfeƒ¨'àª�; ½þµ"$ˆ‘BÑ[I
+$à"R‘BÑXI$à"Ò‘BÑVI$€ˆUO°08€à à÷.ýRHðíPH!ðþìNH!ðúì0…BìÑKHððìIH!ðîìGH!ðêì0…BÜÑDHðàìBH!ðÞì@H!ðÚì0…BÌÑ=HðÐì;H!ðÎì9H!ðÊì0…B¼Ñ6M"(hA!ðìêõ÷•þ3I.Hðþë2H9ˆ�€,„qÑ"à ,Ù`! í÷ø*H)Ih’)J!H)KðÐï �(hB!ªðÄêþ½XÂÀÛÀãÀëÀØ�À€ €L¿¨ž¥€$¾,¾|¹0¾É¤È|1,úïˆñDÈÀÄ¶Ý$ˆDb¹Lˆ|ôµI3Xø¹°MÀøµ%‚Hù÷<ý‚LƒI"h’�J‚HƒKðnï"h’�J‚I‚HzKðfï"h’€J�I�H‚Kð^ï"h’€J�IÄÿ;Õ¤)Šk(­�H‚KðVï"h’€J�I�H‚KðNï"h’€J�I�H‚KðFï"h’€J�I�H‚Kð>ï"h’€J�I�H‚Kð6ï"h’€J�I�H‚Kð.ï"h’€J�I�H‚Kð&ï"h’€J�I�H‚Kðï"h’€J�I�H‚Kðï(Ðþçð÷Aý(Ðþçã÷ùð"ëð$ëzN$ 0X€G(Ð%d,öÓ(ø½uI]Hµ`ð�ýðbøðiüó÷%ùâ÷ÀùðÎûì÷óþÿ÷öüð�þó÷øðëðµùå÷ˆûø÷™ùò÷åù÷÷Üøï÷ûþ÷ýðÒüðôêù÷·øþ÷Îùý÷Wøý÷¹úðôûæ÷GýÞ÷Ëýÿ÷Èùã÷/ûã÷Éþ ½øµ%TO>hTH@÷÷×þ�8h!	ˆC8`8hOIC8`ðRí$HI 1X€G(Ð%d,ôÓð0ìGHhà÷…ûFHhà÷�ûEHhà÷}û8h>IÉC@0C8`˜÷÷Äþ÷÷�ü(ø½=H	pG<Hµhðžê½¥Àø¹°XLMÀl`l$8Ép^ +~ƒ– 7À˜üð$/À€t`ìÀ ”ˆ`ùÀ\@�°¤lÀ”Ä¸\À<ØÌ`À¬ˆ|bÀ L@ðNÀ|Â¤<(€000 ˆ¶ ¾ºVšÀè£À9!qHIµðénI9"9’kK"8ð’ø ½hIµ98ð¡ø½dI98µð¬ø½ÿ!`Hu1µðäè]I|"9’[K"8ðoø ½WIµ98ð}ø(Ð„`½QI98µð…ø½pµÝ÷ZûKI9‰h		ÐI		
+"Q$-ÐBM!*:’hà9#KC[ 3IœrŠBöØÝ÷?û p½s!:H	µð˜è8I\"9’5K"8ð"ø ½2Iµ98ð1øÐ T!0ð~è ½µÐ T!0ðtè&I"98}	8dœ-•Ó½Šð-ø½ÿµ�°
+Ÿ˜ðîë ðìë$à˜)ðâëíd´B÷Û°ð½pµ
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Hm`0ðDï ñ÷aÿ
+I `	I˜`™"(ÿ÷ÿàçØÐ”È|1ÔÜpµð÷aø! ñ÷½ø§!ÿHÉðâîL!
+°ðÞî  !t0ðØî%” U`y(Ñ ðàë @ eqr 6òHurµr`ñH` p½pµ
"˜0ðòî· €) "ðêî @ ‚x) #ø÷©ýp½pµ ð÷Êþð÷ø ð÷Äþ%(Ð@zÀÔ ð÷»þæ÷yø(Ñ 4 %tp½ p½ðµ…°ð÷ø0ï÷Àþ� € �0©æ÷)ýkFYy"0å÷"þkFÇuüR”1íˆQmYy˜"ð~è 0!�ðÄé2W2’-"˜)ð¼é™*0ðºé0æ÷ù0æ÷Iù0æ÷´ù5€5êŠ’;"!3L2h1 æ÷5û @ z(ÑN ]€Õ`4àz!Càr9z€€‰‰Cà`4àzû!@€€àrék ˆsék° �!0ü÷Ÿü˜! 0Ás°ð½øµ%$•ð$îð6ï>'ð8ï9ð„é©BÒA11Uà˜(ˆBÙHa0à¹BÒ000Ud$$,äÓø½pµ 0!ðæíŒ  t `t  t$ àt0  uH `u`  ul àuzH"h)@ðî
 àw ÿ0uIá0�ƒIÁƒá À `  4 p `pp½ñµ‚°˜ï÷õý˜ï÷4ÿ˜ï÷$ÿ=ÿ5Ó5("Í1$0ðÜí˜9ÿ÷³ÿ	!‰ yv	!É`@k(Ñ !(ðÆíZH€hðŽéWH�h(ðÀí!  AUÚ ]pr( 0�x˜)t0ð°í˜x˜€09Ÿw8�3`ïÐuÿ!ô1É]Au%!Iapzwpz`7¸rþ½ðµ!™°
+¨À(ï÷šý(ï÷Úþ�!‰@�(ï÷Æþ :I"i€ ‘C/Ñh),ÐAh))Ð�h)&ÐÁh)#Ði) ÐAi)ÐÁi)Ðj)ÐAj)Ð�j)ÐÁj)Ðk)ÐAk)Ð�k)ÐÁk)Ðl(Ñ °ð½ð,íð>îð@îÀÀàw `ƒ " 2 ƒ!	#’ÛQrã‘r“˜bÿ'ØbŸvÐsv™uc!	a
+b"ÈaJbˆbÿ÷Dþ(Ð™ t
àPúÈÂÌÂì£À+	ÐÂü«!Í1"¨‘ð
+í¨ðî¨å÷ü À0€~"#©å÷©ü !Ihq ir¹~¬ AU˜ñ÷¹ø™(ÿ÷ðý(t0 !�ð¬ì(€0'�u˜"÷¡ðZí˜!u(ÿ÷ßþðšï(ÿ÷þ�À5èj(Ðð�íïbîM(hîIC(`(híI@(`íHh "C`ëJPj!ˆCPb! ð°í!›XqšŒ5­@–k ð¬í ÷÷Cý! ð÷Bþðnïð¤íðNï÷÷çü(h©C(`ã÷ßû !hFðZì˜@k(
+Ñ"Ð¡hFð
+í¨Àÿ÷:þ	%
+à! @ EŠÐH­!*hFðxì--2ü2)hF«ðè)ªhFðè)hFðúïàd 0Ça çðµ…°ï÷`ü�(ï÷Ÿý(ï÷�ýhy(HÐ! Iihqr À0x"Cû"@p 8�À{(/Ðàl&6(
Ñ«H" £¡ð0ì¨HÀ ÿ÷àý	 !àðîï£Hál ð ìál8ÿ0 1 ">0ðìàlðÞï!ºÑa!!€IaH‚˜!ÿ7Ó7ÁsÑ µå	 À @k(Ñ	&à! @ @Š€6ŠH"R0! Í0‘�ðoø(Ñ˜ð÷¢ÿ™(ÿ÷èü !8ðÚëH2!8ðØë2> 6(9t02pðÎë1x” AUâ ]%!I(Ðbw`™Jr 5(sÿ÷Úü(Ð™ t˜"Az€hðB[‘�ˆ7Y¨(Öˆí÷÷øû ]åþµ!
+¨À ï÷ëü ï÷Ûü`y(Ñ þ½[IHj"CHbhFå÷«ú% @/8"#iFå÷6û9¬ U!I ar `qOH"R0)0ÿ0÷0ðtë"9¨ðîë¨ðhì(Í0"9ðéÿ(Ñ(ð÷ÿ9 ÿ÷bü?H` ï÷ôü÷÷Ÿû þ½)µÑ ½JxxCp
+BpÊx‹xC‚p
+ÂpÊx‹xC
+C$"	ð2ë ½þµï÷gü!‰@�qx2x	0C 0
Ý (ph� I"¨ðë­$  @¸BØ8B	Ð™ 	X)Ð(ÿ÷´ÿE-d$$,êÓ˜™(@pqx2x	C€0p
+ppþ½
+J¼çDIRECT-£€F^N^ÿÿ§€¨€:ðÂ'òƒùJ¤çùJ¢ç!ApÝ!pP!�po!Ápš!q	!AqpGµQxx	 0Cÿ÷èÿPxxCYx@€pµ²FE„93i�@
+Pp½pµ p"éàð¤ê¨y q `p  pp½pµp
"Éàð”ê¨y q `p  pp½ÿµ�°$ï÷ÄûP10‘ÿ÷Òÿ!àš Rà7z?z»BÑz*@2d$$và@
+›˜BìÓI		˜�BâÓ@5ìu˜�xBx™CHp
+ˆpäþµ#ºx|x"CÐ(Ñ þ½(xÝ(
Ñhxø(Ó­Eöç)Ñhxü!$à(ÿ÷`ÿ›ø$ix¨	‘:x
+pºx~x2CJp
+Šp¹x~x
+Û2C	8”B‘ÓÁ˜Àðê¸xyxC™Aix$Àhp¸xyxC™É@!ðöé þ½ÀŸ�hxÿÀhp à™"8ðìé0hx6?.hp	Ð8ÿ÷
ÿ˜=€¿�˜�˜û$�¦BÜØ.Ð™28ðÆé˜€�hx€hp¸!ð¶é˜þ½ÿµƒ°'ój‹º€;Ç�3ý<—ï÷íú˜ÿ÷çþ�!˜¹@�BÙ˜�BkØš˜CBaÐ˜@Ðš
+BÐ ÀC°ð½#[Ê™BrÐÜ)jÐÜ)SÐ)XÐ)ZÐ):Ñ(]Ð4Ê45à )bÐ@)gÐ€)lÐÿ9I,Ñ(nÐJHšà!ISŠB{ÐÜÿ:ÿ:’8Ð!‰QiÐ"Ò‰ÐR‰Ñ(gÐ=HŠ8€à!‰YjÐ"Ò‰uÐR‰yÐPÑ¬l xaxCÐ˜!ÿ÷ëþ™@�??/‹Ó˜žç(Ð*H+0Yà¬håç `p píç(Ð4¼4Üç,hÚç¬kØç(Ð4ã4ÓçàlhÐç(ÐH0=à,lÉç(Ð4Ó4ÄçìhÂç(ÐH
8/à¬j»çlk¹ç(ÐH"0&àll²ç	àÿç(Ð4ç4«çli©ç,j§ç(Ð4ÿ44¡çìiŸç(
+ÐH68ààµ»ùgàlj�ç(ÐþH4‹çìk‰ç(Ð4Û4„ç,i‚ç8µï÷ú"#!(’ÿ÷ÿax"x	C	!p	
+û!àõ|=ë1éap8½þµ'ï÷ëùpy(ÑGèI;C(Ñ(€0l� À5(p�!0ÿ÷ßþkFy)pà"!0’ÿ÷Óþax"x	C	!p	
+apþ½ÿµ�°$%Bxx‚xC	ð¬ê	
++++ 0
à)Ñ%,0à)Ñ%$0à)Ñ
+%*0 xÝ(Ñš9 ðÙü(Ñ Kä`x€$(-µBëÓ Aäpµ�xBx1ˆCÉÀ1€à1ˆ¡BÒb
¯I$"¨ð´ü(Ð p½1ˆ	1€p½hx0€¨,äÑp½à‚xCxCÓ‹BØx+Ñ pGÀ‰É		)ëÑ pGÝ!µp!@p
+–I@ðþï½øµ3hˆ™˜p
+ˆ+ˆÒ’
+€‹I:ðnü( hÑÿ÷ýàÿ÷Ùÿ h@0`˜)ˆˆ@™€/€ h¿À `ø½µ xÝ(Ñ{I" ðMü(Ðd xÝ(ñÑ ½ÿµ�°$(Ð'¼Fx?ÙW«(ÿ÷ãÿ@1h)Ð7`™IÐ™ˆBÛš)8ð¤ïLå(
Ñ(x8p­¨xixhx8p¨xCxp¿à(
+Ñ")8ðŒï©xhxC­à")8ð€ï©xhxCÿ˜@Ð˜À°BÚ6íà(]8U(AxÝ)ÑIIÀ"ðêû(Ñ­d$$´BìÓåÿµ ‰°Ý!�	˜p@�@
+™	�ðLï	˜á'¿”	�
+™"¨ðÆû(lÑ.°�2I"¨ð¼û(~Ñhx˜	ÿ÷ÿ(uÐhxµ�‰à¨xjxC«‰kFŒ‚ÛÒºBÓ™kFŒpŒ
°ð½*x*mÐÂŠB;ÒÀÿ(
+ÓJ©¨nFÆ#ª©	¨ÿ÷ÿ©xhx
+C	˜Ò)ðöî©xhx	C	˜kFÀ	�©xjxŒCÉ@�©xjxŠCíEÀ�<àn £À'òhàÀÿ(
+ÓÿJ©¨nFÆ#ª©	¨ÿ÷Çþ©xjxCÀû(Ø"ÒCdkœ0tAÏÆ7(	™#ààÿ÷óþ¨xixCkFŒÉ@�¨xixC	™É@	�(©ÿ÷XþkFŠ)ÐpçPç«‰kFŒBhxÒºB$Ú@ÿ(Û
+š©¨’‘�#ª©	¨ÿ÷�þhx±	˜ðxîhxkFŒ@�hx	™@	�hx­E!ç™kFŒp˜‹Œ@€Gçÿµƒ°!žš‘`(!`HÐÀI"¨ðÐú(hxÑ�­‘�Ÿà€9?-/pÝ¡à•+x!hðnè/Ybl3P]pT7<FAKfuz-5` h"àu` h"C `˜‚xCxCÀkF‰�BmÙ˜h hH@C˜©`˜ÿ÷ÄýQÑ oäµ` h"Þçõ` h@"Úç"ua hÒÕç"µa hÐç"õa h’Ëç"5b hRÆç"ub hÒÁçµb h€"½ç"õb h’¸ç5c h"´çÿ"uc hR¯çµc h"«ç"õc h¦ç3à5d h "¡ç"ud hRœç"5a hRñß¯„pC;.°Š—ç"µd h’’ç˜kF(8‰?(Ð/Ðoç �	àkF‰-�kF‰(òÑ˜8?/Ý-ÐDç0\äþµ )��Ð,(4à\J!(#ÿ÷ý,Ñ þ½hx)xCa@ 0˜L!ð6íš’+ ª©ÿ÷	ÿ.Ð™1`/âÐ™9`þ½ðµ©°!.Ÿ&‘î÷�þ  p 1`p"1 ðJí`x!xC€ p
+`p(
+¥pàp8
+'q`q`x!xC p
+`p 0'�px1xC (~Ù-&Ø5(586àhx­1‰6E&I"¨ð›ù(Ð.ïÑ`x!x
+C’I'˜+"ÿ÷«ýax"x	C@·àJ!0#ÿ÷{üJ!0#ÿ÷tü(�`x!x
+C’I'˜+"ÿ÷‹ýax"x	C@
+ pÀ?-ap{Ð°x	(wÑ ª’�0à£À'ò«ÿ÷4ÿ˜€Õ+(j 3	"©X°OXlE�É1ÿ÷üü˜@Õ(h+"©ÿ÷óü-RÐ(h(OÐyÀàcàJÐ «p(j(ÐÁ"Øðžì0 0B{1
+¨.1@ð”ìh{«€
+Xp™pax"x	Cá"’‘B'ØÀ&�'˜Àÿ÷¬ù`x!xC€ p
+¿`p'˜??Å&š(©ðlì`x"x&˜C p
+`p =é~&˜èvax&˜
+#x8'™C’úI(›"ÿ÷òüax"x	C p
+`p)°ð½µî÷~ýðìð0íð2ía‹$‹	Ið|ïd#XC½éJ!#µÿ÷ªû(Ð ½ 0Ax )Ð pGµî÷YýÁÉÉIÁw½§!ÝHÉµðØë ½óµ ±°0���1˜î÷Aýª’�2˜!ª«ÿ÷hþÐ h(Ð j(Ñ 3°ð½™ËM‰Õ# 3*©ÿ÷&ü˜@Õ h#*©ÿ÷ü�žÿ55 6à!j"ÉhðVø(Ñ(Úç(xmE??°z¸BìØÛ÷%þ�Y!4ÞÞUhG{æwŒ(ðºë h"Àxhs0Ÿ!jÉhð²ë2™¿"1èð¬ë!j¿ˆxKxC(’	10ð ë j¿�xBxCÁ)p˜"ÿ0@‚t˜Iÿ00yÃxCQÁp	
+q°z@°rpz@pr˜Û÷åý1˜!û÷Çù¨çóµ…°%)HÐ˜î÷¬üÿ11‘
+yÉx
+C9xIŠB9Ó		ÿ44 6‘à"y`ðÚÿ(Ð xdm--°z¨BïØÛ÷«ý�°z@¨B&Ý!x`à8x@¼B�Ðš9 ð4ë`ï÷ãù(Ðî÷2ûÁm)Ñ åÄe˜$?m--°z@¨BÜÜ˜yÂx™C@™Èp
+q°z@°rpz@pr˜Û÷pý˜!û÷Rù úäóµ…°
Ð (`˜(@Ð˜î÷3üùÐ& 60{Á7Ð˜@y(xÑ¡ ]Á	tÐ@Çð¬ì�˜‘€0ÀŠ¢h†˜ãh€™AÓáh h#Y@X@CÐ¢h˜ãh™€™A#2ðîë8È8‚BÓžJO$dI'Ò-Ð°(` ´ä-GÐ¸(`Dà€BÕ˜'@y(Ñ'¢7xðÄê�xðÀê�8	0ðºêðhì¢hãh€™AÌ€YA¸B#Ó$À£A™ðÆë˜J�BÓ˜@–(ÙhI-`Ð(` °sàPh@-P`Ð˜@(`´s°{jä häpµ$M& ðrï1¡@¨iBüÐd$$,òÙp½'ò£ÀPúÿÿÿÿÐÂ@¢€µ$ ðZïd$$,÷Ù½pµî÷û@k¨BÞÑ é÷Øþ 4àz(×Ñ àrÿ÷áÿ Þ÷öýÏçµî÷iû@kððê!ac½øµ
î÷]û0ÿ÷íÿ"#’)H43*1ðàëø½y(ÑIy )Ð pGy(ÑIy )Ð pGµ ï÷çù(ÐAy¡BÐ ½øµy(%Ñ(€0kJDh#`x!x'C 7! ÿ÷]ùAxÂ‰Rcx²&x3C[#p
+*cpÐAðÌé!(ÿ÷üøø½[J–^æ"`KåÏl§£Àµî÷ûú	"Ò!€�u!I ar ð"í½þµŸÈ"+Ñá"’©¨â÷ôþ(Ðš#21(—ÿ÷9ü˜Š�r	
+Ár™(â÷­þ þ½ þ½8µ“I"ÿ÷Óÿ8½0µ‰°
¨ä÷—ø(î÷¶ú"R ©r hq "AI¡wÚ ]#©ä÷ùûI  kF€"a¨ðÞé"(#iFÿ÷Îÿ(ÿ÷’ÿ	"!Ò �u	°0½µî÷…ú,	Ñ	!ÉD k(Ðä÷êù  c½µî÷uú	!É@k(Ðä÷Üù(Ð ½îçµî÷bú	"Ò!€�u ÿ÷[ÿ½µî÷Uú	"!Ò€v½pµ!²°‘‘î÷Gú.GÐª’!0ª«ÿ÷lû=Ðpx2xC09,0ªý÷'ø˜(0Ð j(-Ð™‰Õ# 3	"©ÿ÷$ù! @.pŠ
(Ñ˜"€·¡ð]ý(Ñ³I jØ9À"iðSý(Ñ˜™Bx­H‰Ò8¦CÀ÷\MŸG=(ðÄè˜@x€p‚2°p½µî÷÷ù	!É@€}½(ÐBy*Ñ"R€rpG(Ð@h(ÐÂxPÒÒˆBÓˆBØ(Ñ)Ñ pG*Ð pG pG pG÷µ„°
˜î÷Óù˜î÷Ãù‹O˜Ò?(>Ñ˜!Aq À0x%)Cp 8Á"CÁwál)Ñ"à€¡ðjèø þ÷ú!!I aH‚ 0Åaà	"àðXèál0ÿ0 1 ">0ðPè! @! A‚! 	qÈa  4às°ð½˜(úÑ˜!AqfH)jØ8É" ð4è"àb¡ð.è! @
! ]NA‚¨j²>(Ð	")(1à kFq Xq ˜q!Øðè	"© ðèËçóµ ƒ°�˜î÷Eù!‰Fõj'MJ?-ÐàÁi)Ð)ykFqiyYq@jC‘z(qXzhq™˜þ÷¸üðj(ÐàÀi(ÐkFy(qXyhq°ð½óµ�°
&˜î÷ùhi	'!ÿ(ÑàAuþ½L¤4XOúwù€(i(ÐàAuki„FÚy
à)i00\ÉyˆBÑ!`FAuàv66²BïØà@}(áÑ&à6²{’ii˜Êyóþ÷ý @0†FÀ}(„FÑ áHuþ½!
+à+i+Ð'@7?~ÛyŸBÑ"#@3~·x»BÑ!@„EéØ%#[*Ñ(iÀyà)Ñ°xáwþ½DIRECT-pF~áw°pïçÿµ·°$&'7˜”””î÷’ø8˜(Ð#ª’8˜!ª«ÿ÷¶ù:˜(Ñ hÀx(Ð ÀC;°ð½˜ÀÕ`h#"©þ÷tÿ˜€Õ# i3"©þ÷jÿ˜Õ#`i3+"©þ÷`ÿ˜ÀÐ# h3"©þ÷Vÿ	 À(!6�AuI!	 iÈp qî÷õþ� î÷ñþ�˜(Ð˜@zÀÕ(ç0©þ÷Hü©hFð‚é˜«p «Øw˜~Y~C@Xv
+˜v �˜ä÷�ø(Ð˜(Ð7˜í÷Ýþ)Û1 !ªþ÷3üpz «Ør&!¨v/Ÿ#3TQvÄ«Ú a:˜(Ñ(P0�xCx
+C’!ðlë7˜ÿ÷šú(à0�yêIÒIÒC�q˜(Ð¨`a ÀCþà (€j(Ñ à6˜@}(Ñ˜(Ðci©Úy«’Úàî B]’`i+Âyç37˜þ÷öûW @](Ñ 6™Hu:˜#(Ñ,1Ð l(+Ð`i((Ð h(%Ðàh("Ð`l(Ð j(Ð ià`h(Ñà:˜(Ñ,Ð l(Ð`i(Ð h(Ð h(Ð`l(Ð j(äÑ6˜Cuà6˜@}(Ñæ @]A ÿ÷�ý(Ñ6˜	!Auà(êÐ6™I})Ñ7˜!ÿ÷˜ýah)Ð:˜(	Ñ(à0‚yÉxR#R‹CC‚q8˜ 0Áy9˜ 0Áq˜(Ð(@0Á})Ð%!I~iwâ!HU(P0`a ÀCà7˜@y(Ñ7˜!ÿ÷þ6˜@}(Ð7™ Hq7˜"R!€r ðTé7˜@y(Ñ)Û1 !ªþ÷=ûV @] «˜r% @(Ør!¨ aA ÀCøŽýìPS‚,g:™ À)
+Ñ7™A&Iyö)Ð !Cà:˜(Ñ7˜þO@y(Ð°ÔüO0Ô ÀàúOà:˜(ÑùO0ÔøO°Ô @C–9™7˜;"þ÷ßû9˜	BxxC@9™p
+Hp:˜(Ð9™7˜ÿ÷uý Bæÿµ…°ç È'�0‘í÷´þÿ!�‘10ã÷€ýÑ ÀC	°ð½py(Ñ˜î÷üÐ í÷©þ í÷cý@0~na(‰DÑÕIh@`âçpy2˜2(Ðª·!‰q(’Ñ/Ð™Í1š(
#ã÷Ÿý° (�˜	'	(Ñ & 60pÃI°wpð.í˜°q`x!xC0à˜(Ñ& 60pºI"pðí7q˜pq`x!xCÀ p
+`p˜` �çþµ¨ã÷!ü0í÷@þ!I u(r ðjè	!É`€~ÿ(Ð"#©ã÷žü (r¢H"’"0	#©ÿ÷bÿ%íC(Ñ˜‰!:0ÿ÷wý  @~ 7øq˜ã÷zýò¨¢åLU6lÜ(Ð(Yåàk(ÐðŽí àc"#’ŒJ�H<31ð†î Gåðµ £°��(í÷ëý @("�z(}Ñxx9x> 6
+C!0ðØù
+�xx9x
+C2!0ðÏù	�
+˜(Ð
+˜Ax€ð–ï(	Ñ	˜(\Ð	˜Ax€ðŒï(UÐª’!8ª«þ÷ãþ9�hy1(!‘nÑ˜(CÐ˜Õ˜›€k83	"©þ÷¡ü˜€k(Ð!À"Í1ðÜø(Ñ8XI"0ðÔø(wÑUI"¸ðÍø(Ð!"Í1¸ðÅø(hÑ î÷)ü� î÷%ü™)Ð™IzÉÔã÷Üý(
+Ð"EI°àQàðªø(Ðpxàpx(HÐ>I"°ðžø(AÑ ÀÐ5H"!!˜ð“ø(Ñ(ÿ÷þþ @@ w"˜z(+Ðà(Ñ(í÷Dý�px(Ð+I"°ðwø(Ð˜™ÿ0á0‚|ÿ1Ó1°ðkø(Ñ¯!‰(ã÷îûIÐ0‰€�Ñh@`#°ð½*· ˜2…¼+2HWÂäÒa€ua)’!š0#ã÷)ü° 0�(€0Àk°0�Axx
+C˜à5"5"5¢t#t+ÿÿÿÿÿÿäÂ£À€–˜åKÜÂP˜ 1 0 �ð˜ë˜BxxC™p
+Hp"˜z(Ð(
+Ñhy(Ñ ˜ý!€z@@@ ™ˆr˜(Ð™(þ÷Âú1(ä÷™ýš!(#ðë0ã÷ü(‘Ñ	 À €j(‹Ðhy(ˆÑ"’I"9(#ÿ÷¦ùçóµ ƒ°� î÷<ûí÷ˆü î÷5û î÷1û,Ð`zÀÕ©¨ðÊí8ã÷äü(Ñ8í÷7û@z� @0z(Ð,À4 ~™ˆB	Ñ˜!ÿ÷jú˜!ß÷=þ°ð½˜!ÿ÷`ú% @(@(Ð# @(�‰@‰à0þ÷Áþ}%íEC¨ã÷ú ~"#©ã÷¨ú¡~˜"ß÷Èþ˜)ß÷�ýÓçµí÷)ü 0|½þµ
þ÷ø kFp Xp ˜p")ØðØê0iFþ÷øaxª’_ˆDY¨%w÷"x	C@ p
+`pþåpµí÷ü	 À(A~' U ý÷÷ÿûIiþ÷døax"x	C@ p
+`pp½óµ ÿ°Ò°Ë�Ê�Ñ˜í÷áûÑ˜@y(~Ñ8 0Ð�x(rÑ·ª’!8ËªÊ«þ÷þü€k(ÐÊ™	Õ+83	"©þ÷ÄúÊ˜@Õ+"èi3ÒC©þ÷¹úÚH9	0"10ðrêÐ˜7Áy	 À0Ï�Av!ÿ77AuxÎ�4à©k8É@"ðàþ(%Ñ8A{‰ÕÏ™"ÊuÏ™$Lu"À’Ñ˜#Ì©ÿ÷Äü(6ÑÌ˜‰	 1Ìqã÷éú(<ÐÏ˜!Au)àÏ™ Hu4à8]dÎ˜$yÂxC¡ˆBÃØ°H"	0’2ààÑ˜	#Í©ÿ÷˜ü(
+ÑÍ˜‰	Ñ˜ÿ÷HÿÍ˜ã÷»ú(Ð ÀC°T°ð½(Ñ¡Hˆ(Ðé÷Õùê÷=ø ðçµ”°í÷4ûª’"! þ÷\ü!ÉC(Ð€h(ÐÀx(Ð°½øµí÷û!‰@i,Ð ykF(ª[ÿ@[\ÍÉJp`yXp(x qhx`q"90ý÷™þkFx qXx`qø½ðµ
•°í÷øú}K.Ð"Ò
+–¨’à"’)8ý÷òÿix*x	C(p
+hp  jªC‘)8ÿ÷°ÿ°ð½þµ
í÷Èú"’*0	#©ÿ÷ü%íC(Ñ˜‰[H€0!8ÿ÷Œþ  @~ 7øq˜ã÷ú(Ð(œä"’#}"RHD31ð*ë �ä÷µ‚°
˜í÷’ú"’˜*	#©ÿ÷Êû%íC(Ñ˜2‰˜9ÿ÷~ÿ  @~ 7øq˜ã÷ãù(Ð˜þ÷pÿ(æ k(Ððôé  c"#’4J5H™83ðìê æóµ‹°í÷Vúpy(Ð 
°ð½˜™0
+�"0#þ÷€ÿ"’
+š0	#	©ÿ÷û(%Ñ	˜‰!I u(r ðdì™:0#ÿ÷Žù(Ð (r ðXìà	 À'x}(Ñ (r	˜ã÷‡ù(Ð ÀCÁçóñäú<]	}F’(z(Ð  kF˜€
+™"¨ðÌè{}	"0©þ÷<ÿ×ç’¤ë ±L@
•Làk(Ðð|é àc"#’ÿJ<31ÿHðtê‘çóµ$—°””í÷ÜùÀk(Ððbéìcª’˜!ª«þ÷ýú!Iw(Ð h(Ð™ÉÐ#3"©þ÷¾ø hÀx(Ð 8r ðæë ÀC°ð½ i(Ð%!IiÀyà5w¨p!9rpy#(Ð(Ð#™"0þ÷Ïþ âçµí÷�ù!Ia
+z`1Êvby
+wby*Ð*Ñ%"R€àÀ0€~Hw½óµ™°%˜••í÷pùÀk(Ððöèåcª’˜!ª«þ÷‘ú`Ð¨h(]Ðš!ÀxI	'Vÿ(Ñ˜!Aq 0r¨â÷)ÿÚ ]"#©â÷¶ÿÿ áˆv"’#«J©H™<3ðÈé¨hÀx(Ð".à˜"0’˜	#©ÿ÷iú('Ñ˜#‰
+™˜ÿ÷�ø(çÑ˜ã÷ˆø(Ð áwí�8_ý•ø/Huàä`}(Ñ 0r™˜"#þ÷Aþ`}(Ð"™˜#þ÷8þ ÀC°ð½óµ ›°��˜í÷ñø�8"0’˜	#©ÿ÷'ú(
+Ð˜@y(Ð˜þ÷Þý ÀC°ð½˜<‰(4�' Á]˜ 0Áqxx9xC>L!¨ðPï`xoI€-" ðü(Ñ¨	 ªðZþvd.Ý,çÑ˜(3Ð˜«yp@yXp˜!‰@i(Ðy«w@yXw«Œ™‹BÐ�
+C˜"		€)b
Ð)Ð€)Ðÿ9IÑ!à!Abà!ûç!ùç �™˜ªÿ÷Pý˜â÷Ûÿ(…Ñ˜@y(Ð˜þ÷dý«‹"
+C˜9þ÷‘ý yçóµ •°�˜í÷Nø˜œAxxC(4>L!¨ðÌî`x-I€-" ð€û(Ñ¨	 ªðÖývd.Ý,çÑ˜(Ð˜«yt@yXt¸k(Ðð¦ï ¸c	!ÉhÃEá4a¹XZ yˆu˜þ÷ý«Š"
+C™˜þ÷?ý °ð½ðµ
‰°ì÷ýÿ(ý÷÷û	!É`I&Fua8ý÷]ü-	à€–˜åK''ò’, ]€
+Ô kFq Xq ˜qÞqz r8©ý÷=ü@	°ð½ÿµ…°&�˜–ì÷Àÿ*’#š˜©ÿ÷öø(;Ñ˜‰-Ð-%Ð-Ñ˜!ÿ÷¤ÿ™& U`x!xC€ p
+`p˜©þ÷Wû(Ñ"’üHš™«ðè	!É˜ycà ý÷�û9~1ý÷îû6Öç˜â÷èþ(Ð ÀC¨ç ¦çþµì÷mÿ  0ƒy@y'7(Ñ( ](Ù( 0{ÂÐ@@s"	!’‘"90ÿ÷…ÿ	! Éiˆc  ä÷µ„°
(Ñ í÷ïý.Ðà y(*Ñ ì÷5ÿ`y('Ñ('0í÷¢ü(�	Ð˜ì÷2ÿ˜ì÷ìý@0~/	Ð0"©Í0ðaúíÆ•0cMêæç(	Ñ/Ñ¾H"©0ðWú(Ð ÀC°ð½¨â÷äü¡i"i	 H1ÀŠB5Ñ7! ¹uðÄî @ !�r`zÀÕ à ðéâ÷µý"}!¸v¨HÒC	#é÷Øú(°d	Ñ¸uÿ ¸v˜!r ðéwà‰}"@Ò)ð�íðÎémà7¸}(Ð°l(	Ð‰E °d  @](Ð(IÐ˜	(?Ñ& C]ð¬ï	 VVM-27V¸~ÿ(Ð"#©â÷ý) ÿ÷Dü	à @ z(<Ñ) ÿ÷ý ¸u5à @ z(/Ñ) ÿ÷£ü!¹uxç) ÿ÷Gû÷ç) ÿ÷�ýnç) ÿ÷!þiç˜(Ñ  @](Ñ% @](Ð(Ð(Ð(Ñ) ÿ÷túSç) ÿ÷éþ Mç "µR\*Ð	*Ð*Ñà	"ÿ÷ÿ ½øµì÷Eþ,Ð,	Ð,Ð,Ñ pq0þ÷8ûø½èk(Ðð¼í èc"+’LJLH<31ð¶îø½pµì÷ þ,Ð,Ð,ôY¨Á,eùÊŸ\
+Ð,Ñ	"Ò!€Au!(ÿ÷#úp½pµˆ°ì÷þ& €](Ñàk(ÐðŠí àc  kF€"±¨ð¸ìhy#(Ð#(Ð#"(iFþ÷!û°p½øµ‰  0x)Ñ@x	(Ñ" #I"0à)Ñ  I"!0ðù(Ñ í÷xüÐhy(Ñ ø½(ì÷½ý x	
(Ñ· €"¡(ðùø(ÐH"¡ðòø(	Ð.	Ð0"¡Í0ðèø(Ñ 8`(ø½OLŒL€–˜åK£ÀÈò÷µ†°öHÈ� �8‘ì÷~ýóK”™"Àð:ì¤ÿ!”‘18”â÷@üÐoa(‰DÑ šåÿ!‘1 ð ìxy(Ñ8€0Ái€i‘�à(Ñ™"à(
Ñ˜@x
+(öÐ(Ñ "1Í1�¨ðì· €ª9’š(
#â÷]ü˜@x
+(Ð(#Ñš ™’ 0ðîë`x!xC™‰@ p
+`p˜(Ð(‚-ýx(g
"!áâ÷Šü(
+Ñ Kå	 À0c°!C°wôç @åpµ
‰Fi	n.Ð0y(Ñ0ì÷þü-1Ð% 5(x(Ñhy(Ñ	"Ò ‰Hu!0ÿ÷þøp½(üÑpy(ùÐhx(Ñhy)yCÑ0þ÷Úù ¡I""0ðø(æÑhy	(ãÑ!0ÿ÷¼þp½ 4 x(Ñ¡y0ÿ÷wþ x(óÑay0ÿ÷•þp½ðµ	 Àÿ°¶°´�~(	Ð)j‹HÉhÿ÷Ùù°û!@°w-2Ðèi(/Ð)j),Ð$yÕ+3biFý÷”ûïi|Hÿ€0³�$à8³™@"ðÌÿ(Ñ)jvHÉhÿ÷¯ù°û!@°wpH)j 0É"0ð4ë´˜!v°6°ð½8]d$èi�xBxC BÓÒïç÷µ¢°cHhì÷Vü.fÐª’"#˜«ý÷{ý˜€Õ+(j 3	"©ý÷CûTH!(j(MÐÀ"ð~ÿ(GÑâ÷þú	!Éaˆv ˆu0(Õ#ž",6-Ð(hyÀÐ(j(\I$igã„wÐ kFppx"€Xp
+˜p)jØÉðÔê¨rx±@ðÎêjF:H9hÿ÷kù ÷!àð	Ð"˜ðÈë"˜þ÷±ý @@àðÕ"˜þ÷xù ï!@ w%°ð½pûÕ™"(ÿ÷*ÿõçøµ
(Ðy)"Ñ#L( `Ð hà í÷ƒú `ì÷Ïû(ý÷^þ(Ð h)þ÷vù"’ hI")#þ÷Ðø² h)ÿ÷[ÿæµÑ í÷búÐ y(Ñ ì÷©û @ z(Ð(Ð`y(Ñ ½ ½ˆW£ÀèÂøµ
ì÷Œû�à¨xixCÀ+x? ›ðzì	6UKZPr,jrF_er:) Ê0à:ÿH)Pàð.êVà:) ¼0÷ç :)Ó0ð"ê :)Û0ðê i!IC a?à :)ç0ðê!ì U5à :)ã0ðê à0‚yéxÒÒI
+C‚q%àäH:)T0àáH:)}0àßH:)¬0
àÜH:)§0àÚH:)vÄ‚  k“:ÊŠ0à×H:)‘0 ¬ç:) Û0§ç(Ð*x !i�@C!aíð6.Ðzçø½÷µˆ°
$ì÷þú­' 1i¸@BTÐ»ðîë	:�b���-��Sw†�1	"Ê1(ð¨é	5	4{à1"¼1(ðžémdrà"1Ó1ià €0�Â‹¯HÒ1(ðŒé˜À‹
+à0à0�‰ÁÒ(ð€é˜‰íà0à0�€y1@�˜ã1‚ˆ(Òðné˜í(p˜€ˆäE$<à! @0�BŠ•HÒT01(ðXé˜@ŠÕçE 0�{Àz
+CŒHÒ}01(ðFé˜{ÂzCÀç	 À0�B‰ƒHÒ¬01(ð4é˜@‰±ç"1Û1(ð*é54$$??/Òaç
+˜€°ð½ðµ&>àkx,x#C
+CpO$$ã¼B?ÐÜnOã¼BHÐ
+ÜlKã@Ð+8Ð+>Ð+Ñcà+<Ð+<Ð+Ñ�c	à
++"ÐÜ+#Ð+'Ð+Ñdëx¬xÜxþÆmx[P#C
+C#ô$&6Àà
+Ð+Ð+èÑÐaæç`äçP`âç�`àçÐ`ÞçaÜçPaÚçbØçPbÖç�bÔçÐbÒçPcÐçÐcÎçŽBœÓð½µ
+}4*	Ð*Ñáz‘’c{¢y!ÿ÷ú ½øµ
ì÷Ûù5#){Àj{Bv5H6OðÊê:::: :-:¡"C¡w`")àð‚èàk(ÐðFé àc"#’(J)H<31ð>êà`#H"€) ðjè !C wà¡"C¡w`0ÿ÷ø")àðXè ø½µŠ{*Ñÿ÷¬ÿà*Ñÿ÷•ÿ ½óµƒ°'˜ì÷ù˜�Áx€x
+Chx+x:	CàÝ:þïÿÿèÂ€–˜åK5ê(Ðë(tÐì(sÑ˜)ÿ÷Èû2âhx*x‰C6(~Ñ­Ýà•hx)xCÿ;};ð:ê$3<DPÊÊÊ\~ÊÊÊÊÊÊ‹›ÂÊhy)yC ƒèy©yC`ƒ`i!àÂÅ>°oŒ³¯íhy)yC !U`i!C`a¥à ")Ä0ðØï !À0Ap!A€`i!íç ")!0ðÈï`i!äçhy)yC ƒ`i!Üç !à0Áp�y*yÉÉRC�qyà ! 0w)yÁwiyÀ UoàSáÅá À0!�Átèx©x
+C )Ú0ð˜ï˜ì÷Ýø˜ë÷—ÿ˜€~àcàHr™ 1s˜!ø÷ÒýKà!Û Uèx©x
+C )â0ðxï>à# @! Áqiy*y	CA�éyªy	C��.àèy©yCÂIˆBÑjz(zCŠBÑ " Âabàiy(y	C  Áaêy©y
+Cbjz+zCAbàhy)yC!	aˆb˜-Áx‚xCE06.ÐçEá(üÑ•­.tÐix(xCÿ;};ðRé#0=GP–––[c––––––n{‹–!©p!ép ~-(p`~hp ~¨pà~èp-zà!©p!ép- 4 xFà!©p!ép-!"Ä1(ðìî­eà¼†*Ïqý·!©p!ép-!"!1(ðàî5Xà!©p!ép -(p`hpMà!©p!ép-à4 y@à!©p!ép¿ ]-À4(p xéç!©p!ép-À4 ~à!©p!ép-à4 x(pm(à/à!©p!# @ép A‰-)€€‰­à!©p! ép Ái-)€j­)€@j­à!©p! ép- €j(€­˜™(0ˆp
+Èp™àÿ!~1)p	
+ip!©p!ép  ]-(pÿ m}0(p
+hp ¨pép ~-(p`~hp ~¨pà~èp-ÿ �0(p
+hp ¨p èpxçhx)xC(bÑèx©xC(	Ñ˜ü÷£øà'[à ðxêWà(Ñ˜û÷
ÿ
+à(Ñ˜ü÷Ðùà(Ñ˜ü÷~ú(èÑåç™"R‰(Ñ˜@y(ÛÐ r ðTê ð„é0à(	Ñ˜@y(ÌÐ r ðxéÈç%!I(Ñ à(Ð(Ð	(Ñ aHwà
+(Ñ	! ÉaHcà(
+Ñ	IeÈ’sôèC
+ H`à(Ñ˜@y¨p
+èp8°ð½ ûçÿÿèÂ0µ øL`"JC€2Óz+Ñ“zUz*CI		)îÓ0½pµ íL!AC@	Šh02“yRyCÊh02•yVy*2Cš(
+‚éÓp½pµ àM
&¶‹[›[i+Ð 3Û}+Ð@+ÑRI		)èÓ,Ð"pp½µ“ÏKT2’	:1ð„îÊH8�{‘j˜æ÷†ú½�ÄHµ	
 €`i7!ð`í`i!90ðZíai  1vai@1uai 1Èu`a½øµ&47!aC³H
(Š(Ð(}&(Ð /uí÷úd$$,o‚êÓ.	ÐªK"’©JªH13!ðúîø½¥H)0‡`ø½óµ‰°ÿ÷Lÿ�	˜xÀ	˜@x€@� ÿ÷oÿ%.�|Ò˜H8�{‘j/�Ð/\Ñ	˜©ðî˜ðbîðdî#XCŒI$@�¡@€hT!kF	\~BÐx…IÀ½Áôyu@È:±¨@
!‰@@i!ÿ÷_ÿ(ÿ÷sÿ%d$$,Ò˜ÞçzH±	
 €`i(Ð!ÿ÷Hÿ0ÿ÷\ÿ%˜`!ACpH7"T0`a	™ð¾ì`ikF~@0u`i9ÿ÷0ÿ/Ñ!à!`i 0ÁuàcI°A
 €@i(Ð9ÿ÷ÿ0ÿ÷/ÿÿ÷Ãþ™ˆBÐ&à5à&XI"	9¨ðùUI?"	1¨ðù.�Ðÿ÷½þ$ í÷Gùd$$,÷ÓIH)0€h(Ñ!ÿ÷ÿ ÿ÷Âþ™ˆBÑ˜5C=CCÐ °ð½ ûçøµÿ!>M-1(lá÷dü( `Ð‰·#F)l›
+˜2É’æ2
#á÷§ü  60p!h° �ø½ÿµ�°hFÿ÷Úÿ˜(Ñ@°ð½‰)J
y'I		)qÑqyš!ð4í.Ð˜™ 02ðìhx)xC€(p
+hpHx€Ô`{€@ð‚ïI9‡@‰{`{9BÐ!Càû!@`s˜á÷¡üÀçµ$ ð°äÑSw´ „äú(Ð ½d$$,óÙ ½ìBƒF@BEtˆÿ4Ãñµ%$`!aCÿHT67 7ø}(ÑüHx€Ô ðÃú(Ð2;~927!0ÿ÷|ÿ øu˜m…BÚdÜÕ(ø½ µÿ÷Óÿ(Ñ Áç ¿çóµ�°}%-çH")ð”ë Û÷Gý,ôÐãOi!8l`a° % �(ðˆëš1(ðžìÜH"€h!h#Û÷÷ý(Ñ8l€!è÷/ùà ð0ë þ½ÿµƒ°¨
ÿ"‘2#©à÷ºø(9Ð™˜1í÷Óøœ r
+àrH4-Ð") ðTë.Ð "1
+0ðLë/Ðÿ �0 p
+`pÿ P0 p
+àpÿ" D290ð8ë˜Áz‚z	Cÿ1T1�r	
+Ár™˜à÷Jø°ð½øµ%)0ÿ÷øý©N  p0l@zÀÕð0ú(Ð§xåhFÿ÷´þ˜(Ñ@à:)ð$ì˜á÷±ûÑ p"0lÿ÷Šÿ(ø½øµ Ix“N0j¥yÞá!š7)Ð)Ñ!àáx)Ñ1q!ÿ÷»ý(Ð0l#ª9ÿ÷jÿ ø½µx�JIÉ‰
"’‰Ii)
+Ð7"R\#*Ð#
+T2ðäëÝæ"øçðµ 
%sL­&�	IIi)	Ð
+ 2×}/Ñ01Öu
+KqŠq@(ìÓð½
#gJ ›0µ$�‰ÉIi)Ð 1Í}-ÑÌu@(ñÓ0½øµ&\O4 Á
 €@i(
+Ð 5é})Ñ&1ÿ÷õü èud,éÓÿ÷±ü0ø½ µ�OHl@zÀÕðù(ÐhFÿ÷ºükFx(Ð ½ ½pµ‰DM$ðŠì:':2:(y@(q Ý÷›ø(y(Ñ (qhy(	Ð8H7!@0yB¨ÿ÷úýlqà ÿ÷[þ(Ñ!0Ý÷Oý,`à(h°BÐ p½*òÐ!�Gîçÿ÷�ÿ"(lÿ÷¦þ p½øµ ž*/Ð‰Œ¡x		
))Ñ% 5)x)$Ñix)!Ñèx(Ñ(0ÿ÷Òü(ÐH¢l+‘H‹{*	Ÿ'ÿ÷€þ.Ð`x"xC(°G(ÐL! hÝ÷ý  ` /Ð9h	n‰x
+’Ñ		
)Ñ	àìB4Ãˆÿtø ø½÷µ�°%È{ÀbHíCh(Ð à.Ó  p(°ð½xzÁ 0)�CÚðÁø(?ÐWHx€Ô |€@ðžø(4Ð8!hFð`éPH�PH�PH�`ð¨é}#ÛXC«�{!CFNs—7d™7"°ð~é˜F8EHqÐ!F1@ðré'hFwqÝ÷nû(0`Ñ/8à˜!ÿ÷:ü(
Ð9J°€
"’€@i! 0Áu  p à  p(A™Ñ!!p–ç0µ ‘°�`zÀ*ÕðYø(&Ðÿ÷Iý(Ñ!Hx€Õ¨ÿ÷ŒûkFy-Ð8!¨ðôèH`!ððèH�H�H�H”hC
+�¨Ý÷ûId`°0½ÿ÷…þ(ùÐ" ÿ÷šýòçµðlê#XCI@yÀåµð^êÿ÷ðÿåˆÿ4Ãƒážü|Iî-Ý5z½zŸwÈÿìB‹w�ÐùHxpGùI@
+ZR
+R@AˆIA€pGÿµƒ°ÈñI� 9G8y(ÐíHx(Ð4à$Ø÷)û8y@8qhn(Ñ ÿ÷×ÿØ÷!û°ð½Ø÷û©hFðÔé(`0€z(ÐinàÚI˜ 9	XØOš˜ ?¸Pš 7*!ÐˆBÒÔJàBin�BÙà@‰}#ÛYCÎIËiq41YZ‹ƒBØ“BØcØð¾ùà ÿ÷‘ÿaÈ‚ˆ™Q�€Âˆ™QÁ€±çóµ‰°
&h !n�hFð(è(iFø÷áÿ$oFà²Hx˜ˆ(h€h	 ðvé†(h!€h	˜ó÷Qø†8]@8U8](äÑd$$,÷Ó0°ð½øµ`#hnx�I@@XC@ 0€|‚Q"’‰Ý÷˜ù!hÿ6‰h™6°jÀ6	€]*ˆ	#ð<é8HCø½`#XCŒI@ 0{pGøµ!`#SC¡€…I&Y 1Oz+yÉz+ûÜÎFø~½“`Ñ!à€Kx+Ðÿ*Ñ&J{Òi43ÒZ~KšB
Ð‚B	Ø8ÿ÷üþ¡x"(ðé ø½"¢€."Ð%`5)s!n‰x		Ð)Ð)Ñ.Ð(�Ø÷)úiIú 9Q"ŠV*Ü"
+q"à"ªr
+yR
+qØ÷ú0ø½µAiIy)Ð‰`#xYJIIYC‰n 1’xIz	Ð*Ð*Ñ"’ÿ÷¹þ½óµ …°
�h�nðRé(h`#xHI@@XC&@ 0Bz’"‹7	‚ x	/Ð(Ð(<Ñ˜#XCD y$Õ˜€h€Õ˜)ÿ÷-ÿà˜)ÿ÷óþ!ŠÀ)Ð"}*ÑbŠˆB`‚Ù@6  u�à–(i"(Ð"(h™;ÿ÷`þ˜(Ð˜ì÷üzæµ$(ÒHx)Ð!iCy	àë÷Çÿ(Ð!hFì÷€ý(ì÷æþ€iF\$ °p½`#XC
I@ 0À‰pG`#XC
+I@ 0ŠpG`"JCpµIT 4å‰ñ÷¬ølxÁô€@É$™(
Ðà‰@à�5àìBØFˆLÿÿ3ð é).HÁ‰IÁ�ÿ0!0à+H`0Á‰IÁ�`0à(HÁ‰IÁ�%H! 8Éà$HÀ0Á‰IÁ� H
! 8‰@Á‰IÁ�(p½ˆ[€ÃhšÂ`‚hR‚`J‘BØŠI‚pGJ‘BØAŠIA‚pGJ‘BØ�ŠI�‚pGJ‘BØÁŠIÁ‚pGJ‘BØ‹IƒpGJ‘BØA‹IAƒpG�‹I�ƒpGŒCEˆ' N0u@œPÃ
H!µhÉCÛ÷ù ½	HµhÛ÷ù½IH`IH`	IH`I€ `pGlÂ‚À<‚Ä<¸<¼<µ‚°3lH
+ž` ì÷]þjI `àx@!Càp¨� „ ! 0�p± 1Áp¨j`bØ÷ŒøkF|#BR’!ˆ(3* ðLï ˆ0 €0Ø÷~ø¨�@¨…Ñ¨j@¨b°p½øµ‰%o@iéy&n)ÑAy)Ñ±yÉÐg¯jð‚´!š$ê÷Cÿ
!‰@À‹à"’"h+!0ÿ÷£ÿà)Ñ"h+!0ú÷þ ø½µÓy +Ñ hðø½+üÑ hú÷#þ½µí÷üø3I `2I `2I `1I`½÷µ†°Fi@0ðÐí�$0�Àx€Õ ˆ8-¥€`=-Ü 	°ð½0ì÷:ù(Ð™˜ª«ðÔí(
+Ð.Ð À0€j(ÐAmIAeHD"`90ðˆí ì÷¥ýI `I˜` 78~›BR’*™˜3ð¦îkF™‰š˜ð¸í ÀçØÐh<l<t<x<|1ÔÜøµ$úN(Ñ}!ùH"	ðDíà-!Ñ"1ˆõHç÷xúÐ  s° ñO- �Ñ!2ˆ(î÷°þøh@ø`	à!9"°1R(î÷¥þ8i@8a ø½ µ�äH!hjFðÐì½âHpG µ�ÞH!hjFðÄì½µç÷2úÛH½ØHµh"J!ð¸ì(
+ÑÓI ˆan•Óì„ãŸÙ÷šÿ(ÐÙ÷þÙ÷Tý½pµ×÷UÿËM)jèi@(Òé÷¼ý(ÑÊHð¸í(Ð‰	ÈxŠxCJyyCëi€[ ëaî÷8þ ×÷3ÿp½øµ
ÿ8	&@-(Ðÿ8@*Ñô÷8û&°>æ÷)þÿ÷ªÿ/Ð/GÑ-Ð0à¨K!j89":[(Ð(Ñ-qÐ-
+Ñ¥H#hƒBÑà 8ðNìdà-bÑ™Hbÿ÷•ÿ8ôç-
ÑšH#hƒBÑ  �æ÷Èýà >à-Ñ�H>bÿ÷|ÿæ÷âý0Ø÷ªø Û÷/ø<à‹H"h!‚B#Ñ0‰$0� 0sp{Cps…H°a é÷ý(Ð 0ç÷lú(Ñÿ÷Vÿ|HwL"¥h108#¨G i@ aà 0sp{pLCpsvH°arH¥h"108#¨Gàh@à`Õþç ø½ µî÷ûmImHî÷~ý ÿ÷Æþ ÿ÷Ãþ(úÑ_IbÈa½µEÐ[I +-Ð+Ð+=Ñˆa   � Áx‚xCÑ Qfá}è†ôé]"Ø÷<ø ½ˆa ‰TJ
+`ÂxƒxCàé÷Áü(ÐLH!ðÜíàJH!ðØíÿ÷ìþàˆa ‰Âz€zCHH1Ò`�€0 î÷6ý ½7HµÁij�BÑ8Hðºí(Ð ½pµ%0LB)uÐ"Ü)3ÐÜ)pÐ
)qÐ)Ð)Ñh×÷þ,<Ñ ÿ÷Kþ(<Ñ5à)uÐ )qÐA)ìÑ! î÷zýå`˜àI)hÐÜC)yÐD)xÐF))Ñÿ÷¿ÿ(oÑ!H!ðí(ÐhàJ)jÐb)Ðf)~Ñÿ÷®ÿp½×÷Øýà×÷¯ÿHðBì(øÑ àþç,'Ñ ÿ÷þ(×÷Éýdàb¹¤LhÃôµŸ„·„lÎú
ð³„Ë„ÿU…Îúï¾Ì0àààþç x(?Ðai0H1J)Ð !à€!ÁqÑq! ß÷Ìø%p/ààà+à)H!ð¬ìp½(H!ð¨ì(Ñ%H!ð¢ì(òÐ p½	à
àà¢`à ÿ÷µý(úÑàî÷”ü°(îÐ	àî÷{ú(@7rÆäˆž(ø´Ðî÷¾üî÷Ÿüà¥a âç iàçµî÷4û ½pµ$MH!¬`ð²ê
Hih08�`Da„aIÄaaIbIAbI�bðÖìÁçÅÈÀÉÀÌLhÃl—†¿†o‡ûˆàx‹BÐCx€CxÒ’*ôÚ pGpµ‰!! U "1"0ð¨êñ -ÙJx 
’%0ðžêhxÀ p
+`pp½ðµ �°�)¨ðÄë˜
+©;ª‘ðÚè(+Ñ,Ð©¨ð¶ë(!Ñà˜˜	î÷GÿkF|:¨ð¬ë,Ðð¬ëh{){CÐš!’‘™š0ðžë
°ð½,ÐkF{¨ðšë˜"˜	ð¢èÝç 1Ix)ÑxÀÐ pG pG"(Ó pG(Ó)ùÑ pGÿµ�°„FÑ °ð½px%À�(,à`‡zyÈ*Ø{x
àbEÑ¸xà[8x™ÿ÷Óÿ€+ïÑ ídÛe—ÐàŠjÀF	(ØÑ™�BÞÛÔçµ ì÷ú(úÑì÷ú(öÑAHhÚ÷’üÚ÷—ù ½µÚ÷˜ùHhÚ÷Žü½ µÙ÷ þ½ µÙ÷›þ½
+IH`
+I	H`I	H`I
+H`I `pGlÂíŠ0;‹4;#‹8;-‹<;@;'I"(HiÑ�CàCHapG#Iˆk"C"�CˆcpGpµMèkDHd„Cò÷ÄüÀ Cèc ò÷Gþp½µÿ÷åÿÿ÷ëÿ½pµ$% ðÖê ðÖê ðØê ðŒèò÷¤ü	" ðÐê) ðÐêd$$,àÙIHj
+�CHbp½À¢€¡€œÀ¨€pµIð¼êI(ð¶êp½”òôÂ!HhpGpµ
L(ÐN @paðøIˆ`5aHAi@"CAa  `p½µkFx!Cý!@û!@pˆ"Ò�C€Xx@ç!@0Ÿ!@€!CXp ñ÷‡þkF˜x		C¯!@@@˜p˜½0Ãž1üÜŒ��m“À­€€ €À¤€J 1µ`JK`P2`ÿ"p"B€q#J"R`"
+aZÊ`ÿ"õ2‚†Â†‡B‡	JÊ€	"
+r"JrJRJ�ðPý ½è£Àì£Àð£À+	øµ
&‰Gi*Ñ x	
(
Ñ· €"¡8ð@ý(Ð ù÷�û(Ñ ø½! 1x	(ÐÜ(Ð(&Ð(ÑHx&(&Ð	(Ñ	"!8ý÷‘ú	à(Ð(Ñ"!8ý÷‡ú&0ø½+"8ð÷øà+"8þ÷‰ýðç+"8ð÷gþ÷çJy’yÊx‰x8ï÷ÝÿáçIH`I} `pG`Ì;Ð;)	Ð)
+Ð)Ñ€Ñ*Ð pGÀûÐà€øÕ pGÿµ …°�˜Ã@@zÁ 0)�3Ñ x‰/Ñ&	 6(Ñ"’6K"Ý! ðní( Ðÿ ç0@](^Ð!r{ à# 3›{+Ð!à@‚BõÜ)NÐ
+à(Ñ°zÀÐ!˜"1ðè˜ý÷Žýv-ÂØŽuxÓ.¢“j)xÿ÷�ÿ(6Ð˜iðdé(0Ð) ªð`é˜!ý÷Ký˜($Ð`x!xCÐ-Ð @@Yðúï(Ð !8VyV@Ý÷ñù 8V6Ý÷Ñù’›*9 –ð8é	°ð½9Ãµ	hIÑ�h1ðë ½pµIh¦iÍh,YÐ(WÐ.UÐh"+AÐÜ+#ÐÜ[Ð+LÐ+IÑ×÷úJà+%Ð!+BÑ0à÷Jý(<Ð""à$;ðÈé0488778888778 ðöê+à0à÷sþ(Ñ"!à"!0à÷*üà")0õ÷Äü(Ñ¡h01 ðÆêà0à÷2ý"")0#õ÷güà0á÷Íúà0á÷üú p½¡h<1åçþçpµIh¦iÍh,cÐ(aÐh&+^ÐÜ +LÐÜ["Ð+VÐ +UÑ3"!0à÷ ü(MÐ "0à÷âûGà!+Ð"+DÑ0à÷óü""4à';ðZé	<<====<= ðŠê1à0à÷Èü(,Ð""Ýç ðjê&à0á÷wûEkÚ³Ô�ùË�tà"!0à÷nü(Ñ!0à÷àû ")0#õ÷ÿû¡hH1ãç!0à÷Óû ")0#õ÷òû(Ñ¡h1Ôç p½pµ,$Ð("Ðh¥i(*ÐÜ’Ð*Ð*Ð*Ñà)*Ð.*Ð/*Ñ(à÷¸ý(Ñ"(õ÷ü¡h01 ðê p½(á÷Žûôç¡h1óçµ
+h’Ð*	Ð*Ð*Ñà™hH1ðüé ½JH!µðêIJ0ðþéIJ00ðøéIJH0ðòéIJ<0ðìé½�!J‰µ
+P�"’1€ðÚé½ñça�èÿu�E�!‘‡‘!€0Ar�rpGpµ"pJCYp) ðTîp½pµx*pZx
+pYx"JC¡ðFîp½óµ�°&é÷ˆÿ€0@z(Ð$à `C™@‹0"ð´ú(Ñ&àd¸z BïØxz(Ñ.Ñà(Ñ.Ñ þ½ þ½IH`IH`pG+’@=C’­,z˜Ð’
#?ÉD=€x(Ó pG(Ó pG pGIxx)Òÿ pGi}"Ò‘BÒ
+1apGJiÉi€hŠBÙQpGµx[[+
+ÓÄiCi£BÙ`€iƒBÙ`½þµ
x@@� ��×÷+ø0jF©ÿ÷Ûÿ°h™@�ðh™@�8×÷ø™)XÐ˜d#XCðèî(`2 ,Ñ˜"ÿ!ðï™ˆBØ ,Ñ˜"ÿ!ðï)hˆB:Øà  ,Ñ˜"ÿ!ðï™ˆBØK ,Ñ˜"ÿ!ðï)hˆB%Ø þ½!,Ñ˜"ÿ!ðüîšd ‘BØ,ëÑ˜"ÿ!ðôîåç1i}"Ò‘B	Ó,ÇÑ˜"ÿ!ðæîÁç þ½ þ½pµ 0ÿ÷Hÿ((pÐd ` p½ ÿ÷sÿp½pGøµFMéxªxC(€xR@*Û “BÝà$“BÚ®y)ypCðpèfCiy0ðjèéyÀÕ à?(Ý? ø½8µ.L<)Ðÿ!!p¡hÚ§¥Ì”¹Fr)Ñÿ÷Äÿ!xÿ)	Ñ%p$) Ü÷Çüd,øÛ8½(jFñ÷ù!x�BöÐ%p$) Ü÷µüd,øÛkFˆ(éÐñ÷�ù8½µL<ah(Ð)ÑHø÷œû ``½)üÐHø÷¾û `` ! Ü÷‘üd,øÛ½(µÐH"ð¾ì½I9ˆ`pGLÃ½”µô÷8û½IH`pG�•<øµˆ¢h ’1Ð"R�j{*+Ð))Óð’ìD!!p!ap¨{ p'¦"0iF'qðˆìè{ö0pv7p¶"0iFð|ì(|ö0pv"0iFðtìi|°ñp‰apø½kJ!€µð`ì½ðµ
+xD*DÑ$NxŠ'%!+ðŽî ,3!+àxAp)Ù$’öç’àÒx)Ð)Ð$à�pRéçx)ïÙ$íçÒx)Ð)Ð$àÁpR!àÑx)Ð)Ñqà/Ñs6,Ñ.Ü ð½m--ºç ð½pµ¤ã¶È–MëøÏ>H(ÿ÷©ÿ(Ñ(ÿ÷œÿà! IiHs p½#"Ò\ Ò	Ðÿ"KçpGµ
#!	\É	#Ðÿ!h1!p	
+ap!¡p!€0áp@h(Ñ!(ðØë
+à61"hFððè"(iFðÐëàx¡xC°p½ ûç|µ(%)ÐhFÿ÷[ÿ(Ñ%€à @0kFYx‚{‘BÙ1 àkFÁ{šx‘BÐ+ àkFÙx|‘BÐ0 àkFy@|�BÐ/  € |½  € |½r-pG(µÐP0ðí½µÐ! 1`ðí ÿ÷îÿ ½´*ÓC›
+ÑÈÉ£BÑ*øÒ£BÐ	*Ñ ¼pGÓÐRàxx@I£BÑxx@I£BÑ’ñÑéçÿ0â$ƒá(‚ámêCp´›ÑLåàÂÉžC.BùÐ	pR)
Ð
+÷çxIS,pÐxIZ,póÑp¼pG  á’�àÿ/á á$ë-é„ë”‘–áÄ˜'*]Y½èLú-éƒë½èÀŸåÀŒàã
à�à ÿ/áÀ�âÿ/áðøåiýÿ@-é ákú@½èêàãêÿ/áŸå ãV4ïÿ/áìÿÿÿ&µÀFÀFÀFÀF ÿ÷Üï¼¼G@ áfëà á@-é{ë@ á@½è@-é ã ã„å„å@½è á„åð á@-é-émë@ á½è ”å
0 áà‚à^á �åŠ0“àŽâc0 á�â0ÃãÁãQá �„å@½èAàÿ/á  á ã á@½èÿ/áðµ…°ÀFÀFð>ì •”ÀFÀF�¨Ö÷Œë¨
“ÈÀFÀFÀFÀFððë!ÀFÀFðŽè�!`ÀFÀFA˜A`!ÀFÀF˜�`!ÀFÀF˜Á`!ÀFÀF˜aÀFÀFÀFÀFÀFÀFÀFÀFÀFÀFÀFÀFÀFÀFÀFÀFÀFÀF›° œ)2¦Fð¼°pGµÀFæÑd¦ÀšÓÂãäÀF ÀFÀFÀFÀFÀFÀF¼¼Gàãàãÿ/á@-é á@½èÿ/áP á(ëà áP áÀã
 á
+0 áÐ á`Ð�â @-éú @½è` ãp ã€ ã° ãÁãÀ áÀ	¬èÀ	¬èÀ	¬èÀ	¬èÐ áÿ/áŸåÿ/áÿ/áLŸåÿ/áÿ/á\´¼pGµ!
+hFÀH�ø÷åÿ�hFÈ°½ )Ÿåÿ/á<Ÿåÿ/áÿ/á@‘0‚à á áÿ/á GŸåÜ!ŸåÛ ãð!á�àÁãAâÐ á  ã° ã¼!ŸåÒ ãð!á�àÁãAâÐ áÓ ãð!á�1ŸåƒåˆŸå‘å€â�Ÿå�1Ÿå€!Ÿå�å ƒå€à€Ÿå  ã �åh!Ÿå‚åŒ!ŸåŒŸå,‚å ã0‚å	 ã‚å ã‚å0 ã$0‚å(0‚åd!Ÿå0 ã0‚åÿ/áð°áð°áþÿÿêþÿÿêþÿÿêZêÖ÷	üPHG‚Õy¼œ†rl<óFÖ÷û4Ÿå4Ÿåàã€å�å(Ÿå�å$1ŸåÁá0 ã�áaŸå5 ã1†åŸåîñŸå�îÿ/áŸåàã€åøŸåøŸå€åôŸå�å�ã€å�åâüÿÿ
+�îÿ/áîÿ/áîÿ/áPâýÿÿÿ/á¸Ÿå¸Ÿå÷  ã�ä Bâ ã�ä RâüÿÿœŸåœŸå€å˜Ÿå˜Ÿå€å”Ÿå”Ÿå€åÿ/á\^à]4]8]<]À^åSá0Þ70Þ'ƒÀŽàÿ/áÌ4€?0€\ð €!€D €<Æ|D0€0€@Ä €ðððð$\Ø\Í›Ü\Qà\µœðåÿÂððåÃððåyÂððå˜ððå=;ððåÍÀðå<ùñðåý^ððå-Qððå�Oððå
Qððå
NððååQððå™]ðÿÐ!¸žršÒ�ðå%ÃððåðåÝñððåóððå¥™ððå�ùñðå0÷ñðåÀðåoÀðåŸñðåÿSñðå3Àðåˆúñðåõäððå›ñððå‡òððåûòððåWÌñðå¨úñðå×ñðå'ðððåñðåqïððå{Êñðåßïððåðððå{ðððå�ðððåÕðððå?ñððåñððåÿðððåÕòððåS×ððå}ÞððåMÜððå	ÚððåÛððåØøñðåƒÀðå£áððåÁÖððåëÖððå/ÐððåµßððåÑàððå¿ÚððåÕáððå[âððåµãððå�ãððåUãððåäððåÍÔððåqÙððåÍâððå_ËððåQÓððå·Óððå9Ãððå!ßððå{áððåÛ&ÀðåRÃÐÐ´ 6
rôë¸ððå9Àðå½ððåU)ÀðåÑVððåQUððåYWððåTððå¹Pððå�Uððå³Éððå]Éððå5ÉððåAÉððåÉÉððåuÉððåCóððåìòñðå'óððåëñðåÛñðå$òðå�#ñðå¯#ñðåG…ñðå#ñðå™ñðåMîððåèððåñíððå3éððåé�ñðåžñðå;îððå—äððåKïððåíîððå�îððåïððåuíððå9šððåË˜ððå›„ñðå¯ñðå»ñðå£ñðåUéððå©èððå·!ñðå1 ñðå#!ñðåñðåéððåyñðåO#ñðå1#ñðåµæððå™ñðå¡Êððåu6Àðå7WÀðå3UÀðå-VÀðåVÀÌíV�°¢ÂåÌIðåñðåñðå9ñðå!ñðå{ÃððåëÃððåýÁððåiñðå»ñðåóñðåÝñðå½ñðå[)Àðå9ñðå�*ñðåA*ñðå…Àðå{*ñðå]Àðå­ÀðåÀðå<üñðå¹*ñðåÓ*ñðå¥Àðå4üñðåþñðåÌððå¥ñðåËñðåY+ñðå+ñðåí*ñðå-ñðå©/ñðåm0ñðå›1ñðåC-ñðåg.ñðåù,ñðåƒ�ñðåµŽñðåñðå9VÀðå?	ñðå7	ñðåHñðå™	ñðåHñðå•HñðåyIñðå©	ñðå¹	ñðå­ñðå‡ÀðåcÀðå›Iñðåõñðåéñðå¡ñðåÃIñðåIJñðåÅNÀðå	Ãú¬¤vÅµò�Lñðå)Mñðå½JñðåëJñðåñðå«yñðå-yñðå«‡ÀðåeÀðåoÀðå9ŽÀðåÛKñðåLñðåS“Àðå-™ñðå•Vñðå
zñðåOÇððå™SñðåÃVÀðå]	ñðå_zñðå¡zñðåÕzñðåUÀðå'3ÀðåÈúñðå'Èððå»ÇððåkÇððåyÇððåsÆððå5ÆððåÅËððåSÆððå[Æððåe{ÀðåcÌððååÌððåKœñðå[&ÀðåÄòñðå%’ñðå«Jñðå/_ÀðåÓÏððå�Ðððå
Ñððå_šððåñðåÅ‘ñðå%ðå7zÀðå““ñðå—dÀðå£•ñðåß�Àðå™>ÀðåAúñðåÀðå±Àðå›˜ñðå%Àðå¡MÀÁ
‚G¨¦‚-Oðåg”ñðå±>Àðå»IÀðåÙbÀðågqÀðåkgÀðåU—ñðåA‚Àðå¿Àðå÷Èððå�5ÀðååÀðå“VÀðå·—ñðå+‹Àðå
Àðå	‹Àðå]¸ððåŸ�ÀðåkÝñðåAÀðå½jÀðå#‰ÀðåI‚ÀðåU‚Àðå5‚Àðåß4ÀðåÓ…ñðå{èððåÛ•ñðå
˜ñðåÙiñðåOwÀðåa&Àðå�’ñðåå	ñðå#rÀðåK‹ñðåµZÀðå	yñðå�qÀðåMYÀðåÃíððåqñðåUñðåeñðåãñðåÀðå-‘Àðå•Àðå•ˆñðågÀðåK]Àðå™Àðå™ððåy1Àðå+TÀðåEäððå_ÀðåÃGñðå%ñðåMñðå�ñðå‚ç
+z¤¨èì®ÙCñðå·ñðå™žñðå™ŸñðåïŸñðå}žñðåÙ¡ñðå¯KÀðåC ñðå‡ ñðåÿžñðåÇñðå×ñðå
¢ñðå×žñðåæñðåý›ñðåuæñðå{ÀðåIéñðåqëñðåÕÛððå[ìñðå½ïñðåîñðåQMñðå=ïñðåIíñðå�Ñððå?ðñðåãîñðåõÛððåQðñðå�¢ððå“©ððå¹ ððåƒ¶ððåÑ´ððå¬ððås«ððå™NððåÉ&ððå#ððå™#ððå ððåÅAððåÅHððåÕFððåÑ-ððåÉ/ððå•/ððåÕ.ððåaKððåeLððå-Mððåõ$ððå9!ððåu%ððåÁ!ððå“ñðå_ñðåÔððå!Òððå	wñ#%4Õ ªdðå9wñðåswñðåEÆñðåýêððå¥êððå�ëððåëëððåÝìððåÇìððåñðå1êððå¥?Àðå-Àðå1Àðå	ôððå%ôððåSôððåAõððåSøððåÕKÀðåõ÷ððåÇLÀðåOÀðå}üððå‹ùððå;ùððåÙ‡ñðåCˆñðå¿ùððåOöððåáúððåeçððå¿õððåÁçððå[ûððåüððå¡ûððå+üððå-OÀðåq÷ððå¯öððåéöððåyñðåiÀðåÝñðå‡
ñðåµ
ñðåå
ñðå	ñðå]ñðå_ñðå#ñðåŸñðå‰ñðåÁñðå©ñðåë"ñðåyñðåAñðå}ñðåíñðå…ñðåÉñðå’ä×kœ¬÷T;þgñðåµ€ñðåñðå
ñðåãñðåGñðå³ñðåS
ñðå‰ñðå�VÀðåÉÀðåÕÀðå3ÀðåÑñðåÅ
+ñðåÝñðå§ñðå3ñðå�ÀðåmˆñðåO…ñðåk5ñðå‹5ñðå©5ñðåÉ5ñðåë5ñðå
6ñðå/6ñðå“6ñðå7ñðå8ñðåù8ñðå%GÀðå«CÀðåY‘Àðå=rÀðåO_Àðå	DÀðå÷Àðå­ÈððåeˆÀðå‰lñðåmñðå£†Àðåƒrñðå—vñðåçlñðåcDÀðå‘Kñðå?dñðå½vñðåñvñðåå‡ÀðåÃwñðåûeñðåñdñðåeñðåµdñðå/QñðåEfñðåUfñðå�eñðåËeñðå}eñ_ó_ž˜®¼…Cðå�eñðå?Lñðå]bñðå¥bñðåËbñðå5ÀðåCÀðå§NñðåmfñðåíNñðåyfñðå…fñðåÛ[ñðå
cñðåEcñðåcñðå5[ñðåó|ñðå}ñðåññðå©ƒñðåI„ñðå…€ñðå‹„ñðå„ñðå»„ñðåë„ñðåñƒñðå…ñðå-„ñðåÕ„ñðåƒƒñðå¯…ñðåÍ|ñðåo…ñðå‚ñðå«3ñðå�|ñðå|ñðå�{ñðå‹}ñðå3}ñðå¯}ñðåí}ñðåE~ñðåÉ‰ñðå­Šñðås‹ñðå�ñðå‘ñðåõ‹ñðås6Àðåq6Àðå»ñðåÇñðåÝ‡Àðå}ÀðåßzÀðåë%Àðå3‚Àðå×èððå•™ððåŸ”Àðå•tÕ&”°�×+ÀðåÇ`ÀðågÀðåzñðåišñðåÑ™ñðå�›ñðå¿›ñðåaöñðå�öñðåmñðå9ñðå1ñðå»zÀðåmœñðå)œñðåÿœñðå7�ñðåy�ñðåžñðå�ñðå¥ñðå@Àðå!ÐñðåÏñðåÿùððå#"ñðå?æððå#ñðåëôððå§"ñðåy+ñðå�
+ñðåß	ñðåY
+ñðåÛ
+ñðå�&ñðåoañðå·]ñðå/_ñðåá3ñðå¹3ñðåï3ñðåÅ3ñðåý3ñðåÓ3ñðå™+ñðå»+ñðå”ùñðå‹öñðå$]ððåe‹Àÿµ�°'ÏW%ÿ÷ôï(
+Ð˜:!ä÷ø˜!ðø%'`
+™ 0V`!hA˜`(°ð½#YCð0|)ÐÀhpGa ÀCpG@-étÁÌ³�²{çi¤Eúÿë ã€å@½èÿ/á4gÍšš  43@@VUgfÇq€€x‚ÀÈð€�¸  ¬
¬
¬
¸¸¸¸
(


(((¤§¬±¶»ÀÅÇ¤¦©¬¯³¸½ÂÆÉÿÿÿÿÿÿ$Id: w8782-B0, RF878X, FP62, 14.62.12.p205 $RC: , yhou, 2012/02/01, 21:56:25/]3b524F–—dÝip+,-/0122463F59{;;;;8@^U]*bA‘‘’G<uvwx–—d-Ýi“p˜=
+

		
+		Ðt�;Œ´ÏÇ
+ïßÿîßÿìßÿÈŸ¿?èßÿÀŸ¿€Ÿ¿??><~<~xÈß¿Ÿ¿?><~8|0x xÈßÿ¿<8~0|xp`@þþþþþþþþþþþþþwlanOSADIRECT-usbìµ¤È0ä¤Èìµ¸„8¤Èä¤È8”„£À¤ÈÜä¤È£À`'„¾¤È(WDÌLWÀÀø²À|ÊÀ„¾’À’Àl
ðp2.3.1.0PgR( Oq7¡-e<€ðà“ ¡0uÀÔ&µ£Ð�»€¼ ¢=F�p�4Æ5"Ðÿÿÿ€#8ƒp8È6ìÍõˆ¶;/®¢!8…P8ÊRR	²@`¬d°x´|P½Thl&ÿññÿˆÀÁ¾¿ÄÅ8#b’%1|Ðÿÿ
+Q	�–Ò)0
+Š&D´
+1<è-¨!„$[*sa+”±O}2+Ø�
pl	öüø9oê3wìRõÛ(ä(!,-Ò ´Ý8Rú Ì0:ÖMÿÿ$É0Ð_-œ!4È-ˆö6Ü� ôR
+2ÎY¬¨ABè² €A2ˆ	
+
v	{	!í”Ò£l(!¥‚ž(ÿ´	*½Q	0n23nmX;êPO"€m„-zØ›€ œ��¯¥,‰Aœ€KTMNÔO SV<X([\`]:` b–üžŸpMä2jf¶9„¸Qî4¦H§‚¨ü©qªR¬1¯(²´
+µdÂEÃ¨xÇl<]>”º@ˆPÑð’`ðMAð’Cð!pðƒðÒPðð,ðRðRbð`ðð#ðVðRÿðiðrðÒ%ð/gðÿ.ÿeÿ
+(		tSÆQ--Œ¢ÃÅÚÄü:Æ°0í
à¶p	2^Öÿ}	


b"PRPP€
‚!‚	B‚
+!"n!pp‚
cC$™5ƒ
+(‚,‚0‚4‚8‚<‚@‚d‚h‚l‚p‚t‚x‚|‚€‚„‚ˆ‚Œ‚•‚™‚�‚¡‚¥‚·‚¸‚¹‚»‚¼‚½‚À†ÄU†`†k†v†�†Œ‚"Bæ€
+	ÿ-f-Bô
+8ƒÀ˜
@
+»%Ó
+ñ&q'm0't€º¥µ‰—agÛ‚Àwß˜½F8ýVKçØ@À€/àÿ_=.xÉ	`›	@$Õ
+úÿÿ'ðA	Liÿ@ÿ\áÔ!ò¡üM*
!PòÔ
+­H
+Þ7t
\^
+"#�EâGJj&iækÙlØàƒøfú8ûyê,Y
+e$vwæ2xyî|LÖ-Æ	Ì
+Ð
 $å0ãZ‰n
+�f®)¯ ±™Â…ÄÎ€Ï`Õàþ¦&
+ ¦&ÃCf9’“.û€þ„ÿÀ !>#$?%j&' (¸)*9+,/X01ÿ2GOJ¬
LKNvQÈR*Y‚
Òdó sþM‚V `!`1PÖÂ`
+```Î`VN`Ö` `(`výü)|¼¨>:y
"`Å`-
+`E
+`E`(æƒ\-­, !ÿÿ"#¶âÿ%
+&ÿÿ'ÿÿ(ÿÊ,ÿ)ÿÒ ÿ*ÿÿ,ÿ+ÿ	aÿ,ÿþÿ-ÿ
,ÿ.ÿÿ/ÿ*bsÿ0ÿOÿ1ÿWò•ÿÿÿŠ;ÿ/¯>	Þ±â²æ³ý´÷µí¶á·°,
+¸Õ¹ðº
¼„½7¾à¿h×|Á‰jŽÃRÄ«Å8|@Ç žºŸ ¡¢£¤¥¦§¨©ªO«¯ü û ý       ì è Ý î ö    < W k r    ä !ð ÿ Òý €¯1ÉðÌZÜLrÖˆX
+I
+H@9BhRüÔJh*ùÑpGIH`pGµ	÷·ÿ½µ	÷ÿ½@è€@:âÿÿÿÎ’ÃðôðìÐ<(0àÔ0ìÒD0ÜDC š¤Ltò<¤
+Ì#ó
ñÒÒ"D €LT\dlt|4 <$,4@8H8P8X8`8h8p8x808888 8(8ÿÿDD�C(#C”€p¸ñã	ÕÆª�'~,p1�2ÇD	T;OýXábK¥ Ðà_ÀÛ©Ýþµ �ðÆë-�Ð­ @]ÿ(Ñþç)y´O)*Ð•!J]!I’i‰x"ð²ë¸h BÐà À…iEa­ 0"DUbC¨H€5)k0"0ð¢ëd$$.c¸h BèØ¸h(Ñðšë!xx¡@ˆC¡xp ÉHa˜ð’ë˜þ½µð�ë(Ñ ð�ë(Ð ½þµ ŽN0a¨€@i(Ð€0ÀŠ4ià!ð~ë ,øÑ0am---éÓ0i�±hðpë%I¨@Fi."Ð4€4àŠ™ðbë0 0Aq!�qB{#kzC’a"k€#Qa!kÊxCÊpb}!’Iq‰x@{"ð,ëm---ÑÓ8ð@ëfH€h@ð@ëþ½µð@ë ½µÿ÷Ÿÿð<ë ½øµ%ð
+ë]HDh-à`z@(Õ y(Ð(Ñ ðKÿàVH"h· € ðúê @ ‚x9 #ðë € @j(Ð À €jp!ðëà%$h,ÏÑ0ðäê(ø½óµ�°¸·üÀÇvöðÌê>H%Dhà ÿ0"90ðøê(	Ñ ™"˜0ððê(Ñ%à$h,éÑ0ð¾ê(þ½÷µ‚° �+HDhð¢ê™#
+[à!y)Ñ¡y±BÑáy¹BÑá%Êu$h,ðÑðšê-Ñ˜°ð½ �úç"øµRŠ’’x ÿ*Ñ
+y*Ñ%·"$'’Ž
J9Rh¡@BÑ"+1 ð’ê(Ñ™JŒpQh§@9CQ`ø½d,åÓø½\8ƒÀÀÄÀè£Àpµ#  p `pH
{ÂzC p ð$øézàpp½ pG pG "p"Bp�p pGµ#"p"Bpð^êð`ê! páp`x€½ˆpµ$ð…úI(Ð(	ÐI(Ñà\¨BÐd$$`BRx*ôÑà\¨BÑ`@@xp½d$$`BRx*ðÑ p½PÊÀjÊÀpµ$?Mà€Gd (X(ùÑp½µð¾þ ðêðê ðê˜î'YøÀGøù’ðêð êð"êð$êð&êð(êð*ê ½µð*êð,êð.êð…ÿ(Ð ½ð›ÿ ½µð$ê$H!I`#IA`#I�`#HAk"‘CAc"Hh"J@` ½ J!H!µð$øH"!ðøa"IHÒðøW"IHÒðøðüéðþéðê ½0µ”"à“ÍXRÅP¢BùÓ0½“"µà”RQšBúÓ½¸¤À€)€€€€€€
+€€@¨€(€ÿÏÿÏ„¼1\xò@:{òH=ÿHx(ÐþH€|	pG pGúHx(ÐùH€|pG pGõHµx!(ÐóJx
(Ñ}Õÿ÷æÿ(Ñÿ÷Øÿ(ÑÑz½µ‡°ðœé©ðžé(ÐkFØz°½ ûçµ‡°ðŠé©ðŒé(ïÐkF˜zìçÙHx@|€€pG×HxpG×Hpµð|éÕJÀxÔi€!`4(Ú#ctÿ÷¢ÿ(ÑÐi`0Ásp½(ÑÐi`0Ãsp½(óÐPžNôÀgœš(ñÐp½(atð\éÀxÀÀàsp½ÁHpµðRéÀx¿JÔi€€!`4(Ú##tÿ÷kÿ(ÑÐi`0�sp½(ÑÐi`0ƒsp½(óÐ(ñÐp½(!tð.éÀx@À sp½µÿ÷¥ÿÿ÷Îÿ½1(Ð	Ü(
Ð(Ð!(Ð"(Ñ pG2(
Ð3(Ðw(øÐ pG pG pG
+ pG pG	 pG8µiFðé(ÐkFx p 8½8µ ��Hx(Ððöè(ÑŠIx
(ÑH|ÀÑ iFÿ÷Ýÿ(ÐkFx(ÑP �kFxðâè8½(Ð|I	x)Ð{I
+x
*ÑJ{p
+}BpI}�p pG pGpµÐrHx(ÐqL x
(
Ñ!(ðÂè`{Ð(Ñ(ÿ÷Ôÿp½ p½µÐdI	x)ÐcI	x
)Ñ*Ñ`I	"1à*Ñ]I	"1ð è ½ ½ µðœè! jFðœè ½øµ
ð–ø;2) ð­û(Ñÿ÷äÿ ø½µðiú½ðµ$œ|îvðÀªè™_NŸà]•BÑ]p8p˜pà´BÚ•BÒmx•BÙ]p@x8p˜pd˜p ð½d$$ŒBÝÓ ð½pµ#yàÄ¦|ŽBØ¤{ŒBÓ pp½[�BðØ p½÷µ”°«|\}-Ñ,~Ð«Y|(‘ðè©�ðè(òÐ«}«Ù|ˆBØ™|ˆBÒ«u,
+”Ñ 
+�«}
+™˜	«ðè(ØÐ«˜},�Ñ˜(Ð˜(Ñš™(ðè«-XtÑ@Xtª©¨mFÅ«]|	àÈ£ÀÜÎÀÉ£À¦L«Y|*
¨ÿ÷bÿ(_Ð9ª¨ÿ÷„ÿ(XÐª’kF~|
+™˜;ðÞï(LÐkF~}¸B&Ðª’|
+™˜;ðÎï(=Ð!kF•YVà7à V«x;ðÂïkFs•	!
 YVV«x+ð¶ïkFXs«YykFX{«	Yq™y˜qØykF{«AIÀ	IÀC,Ùq!Ñ˜ðžï˜ªðœï(ÑwªîmìÀ'T] °ð½«YykFz«	Yq™y˜qØykFYz«AIIÀ	ÀCÙq«Xy0p˜yppØy@@°p Ýçµ‚°kFYzzð4ïiFðpï(Ð" iFðFï °½µ‚°kFYzzðï©ð`ï(ðÐkFy pXy`p éçµ‚°kFYzzð
+ï©ðPï(ÜÐkFy pXy`p Õçµ‚°kFYzzðöî©ð@ï(ÈÐkFy pXy`p Áç8µiFð6ï(
ÐkFxÀÀ px€À`px@À p 8½µ‚°kFYzzðÌî©ðï(žÐkF !VYVˆBÑYyqkF pXy`pØy pØyàp˜y qy`q˜yàq˜y q ƒç>µ!
+hFÀ"ÿIhFð¼îýI%Û9H}"(Ð(Ð(Ñ€ kF˜qà,ÐkFšqàkF�qkF
+u˜yˆuðHiF@Àjð®ý>½0µ‘°@!¨ð&îêI"¨ð�îçH%0Bx¨9€ðˆîãHkF%0Áx™ryØràHßLˆ˜�ãUyüèÀ™%¿ û<ú!
]ª
+à!à1	{K 1[@‹r…BòØÔH!Û8uà5éj{Jzï#À@ÀC(Jr8©ð’î«€èjAzÉÔ)€9‰k)Ð"#©ðÁûà©ðŒû(Ñèj"AzCAr°0½»H!;8�`pG¹H;8€hpG8µðlîµM;=¨h,@4(*Ñ ¨`àj!ð^þàj@!ð`îàjð`î(h(Ðáù9Hl(	Ð}"ÒBC’àj"	#ðÝþ¤Hˆ(ÐðLî(ÐàjðLî8½àj@!ð:î8½øµ"˜H!@Åj(˜0ðêí(t0 !ðtí& 6²y¡8ðÞí±y” AU! ð*î ð,î±y ð,î"!(ð*îø½ðµ“°‚Mû=(kð&î.  6/ 70u<uèxð îð"î‘�8}ìù4(Ð(~ÑuH©8ðäí˜rJ‰	€	«:ðî8}(ìÑÿ÷`ÿkIàj÷9ðîð
+îhHgO{8{?€k=@5(Ð 	àºm˜ûm™€™AbJ#'%LÇäÀ¹}F<ðøí(bàj"AzCAràj!ÿ0a0AwðÌì�¨ðìí:m˜{m€™�YA ‘'	�8©ðàí˜ðÄì ðÞíàjðÞíHH%0�yÀÐ˜"AzàjðÖíðØíàjðÚí@Iàj%1Êx 0v	yAvàjû"€0Gu>Hpàj8Oz@»?àLà:{ÒRCï"r@z{àjÒÒCrhh($ÑàjBzÒÕÊÔI	Ô 1
+~ÒÕI}	Õ!i`9{z{Cð—ÿ8{(
+Ðàj·!‰B™K’Jx™ð”íO!û?8kð’íåj")˜18ðNì)8t1 "
+0ðäì€5(}°r7à0{(Ð(ÿ÷äþà(!(ðdìàj!ÿ0a0Awàjï"Az@2{ÒÒCArIR"H51àÓœÃ¤ë@B¾0ð²ìàjðñÿàj!ðêü(k!ðHíðJíàjzJÔ"Cr°ð½þµ"ýN’2k‚BÐ*Ð ÿ÷Çþ þ½÷HAxJÄ 5ù4*}àj?ð(í]Zn£àÀt	Er
+{{&meww{ {±xI±p@zÀÕðí(Ððí(fÑðí(bÑàjÿ÷Aø(]Ð �Zà*XÐ*9Øwp:à!ð–üðíðp ðºìÙOàj:Azû2É€7)’
+Ú™ðí!(øcÐ!ÐHÀ0`ÎHÎIà0‚~àjì1#ð$ü˜ÿ÷;þàj@zÀÀ(spx@ppøk(Ñh}(Ñÿ÷…ýà ÿ÷Týà)Ð)ÒwpðÔìóç*Ð*Ù à
+ ÿ÷Aþà 0cðü˜þ½ÿµ�°%°L˜ 4(AÐ˜"‰1 1Û0ð„ë(4Ñ°x!à1	
+(‘Ð
Ü(Ð()Ñ¡HkðBì }(LÐ(HÐà(	Ð(ÑšM(kð4ìhx(UÑà–Hkð,ì }(Ð(	Ñð‚ì˜
+™Àjð€ì˜ðwû%/aÐ8hn8Fiˆx‰YÑ	EÐ(CÐ(SÑ }(ÐƒM(kðì(l(Ð}!ÉAC(kð`ì8i( }&Ñ(<Ñ 0àðNì˜
+™ÀjðNìuHä0ðPìpx1x­Ü�ñÜÀ¦ÅÓ
+C1 1(ðLì˜ð)ù½ç(»Ò@hpð2ì ÿ÷¦ü³ç(ÑpzÀÔ à8i( }Ñ(
+Ñ  uà(ÑpzÀÔ ÿ÷Œý%(°ð½óµ ¯°!���
+$¨À	!TH.�ðÒêSH!ð:ëOH!ì0-�ðÈê/˜
0&�/˜AzzCÐJI€FO$@78@0<se€5Deèj!‰@t(à8|s!,�AuÄ0+�ðèë/™"hðë( 0*�/™ŠyÂpÉyq/™*˜Šz‚qÉzÁq/™*˜	{r*˜„r-L0˜áú1
8ÿ4!4)‘á&ž'�ðx±x'˜
+C‚B~Ø’px1xCÝ(xÐÜ!(ÐÜ(CÐ(KÐ(VÐ (Ñèj-!	A&˜ð¦ëØà-(}Ð0(ÐH(Ð(öÑËàÿ#K3Á˜BsÐÜÿ8€pÐ	(Ð(9Ð(æÑ,™0yHu¼à)yÐ)xÐ)ÜÑ xsðx±x
+C+˜1ðpë«àØ`FtqÀœÃ   *Øbp)˜1	à *ÒùH‚v´Ø!À6Þ®P-˜1ð€ê‹à0y`rˆà11"hF(‘ðvê™˜#Y@X@CzÐ"1¨ðjêà~à?à™˜#Y@X@CkÐ"1¨ðZê(™"hFðVêhFÈ€ÞJ™A`:QeeXà—àà�àà 8sð ë(JÐ™" «Ãª’°ª©«ðë@à�à�à&˜"$©ðë «X|`r*˜|�r2à0ðë(Ñpx2xÅHCuñx²x	CAuðx±xÀH
+C10ðê0ðöê(Ñ 8sðàê(
+Ð"
+©’‘°ª©«ðèêà+˜1ðèê™'˜š@&™‰	&‘(Óöæ yÁÔÀÐ! kFs Xs z�`z‰ÿ÷+økF˜s z�`z‰ÿ÷økFØs+˜"©ðšêð¤ê(`Ð8{(]Ðð¸ê(!Ð 1°ð½ °p ðp- 0p pp‘I- wðx²xCHwðx±x‹H
+C10 çH à 0p
+pp¤ç/™0˜d6,!0ð�é«€Õ™"‘’˜ª©«à«@_DÔ#ÀºÍÓx	Õ"™’‘˜ª©
+«ðvê"’èj·!‰B/™0#ðnê(Ð 8srx+˜’1ð4êhH.™	"0ð^é8!¨ðêèèjeI‘eI`N‘!`>"�±c@zbOÀÔ0bx)™v8ðÚè(Ñð®é2Óm’m€™A}"#Òð´é¹l�BÓ °cèjð4êèjð~ü`z «p z�‰€Yp˜p ØpéjIzÉ	Õ¹k}#ÛYC «‘y"Càùk}#ÛYC «‘yII «q9I?J 9`ðc™‰‘y"Cq�ðBù¨ðþé(8cÑ4ç 2ç÷µ‚°1M)x)Ð “å)L' 4àb (p @8G` 8opu*Iÿ0¯pR"0‘ðÔè™0ÿ÷~ý(Ñ!˜&R"01ðÆèàjðü 8ðÌé /pð¹øààj!ÿ0a0&Aw0^åJµ@:Ñ‚#€:(uÑÿ÷ú½(Ñ
)	ÑQ})Ñ‘})Ñ ÿ÷Ñù½ÿ÷Íú½¸LFXqÀ©ÀÛÀØŒéf'Ð%ÀÛÎÎ�'0|J#µu€2Ñ‚ÿ÷³úäçxHÿ!11 8µðètHÈ! 8�c}!ÉÁc2!d}!	AdoI�dðÐèlJ`2Ñe�eÈçpµiH€0}(Ñ`iðféeM 5hh(Ðÿ÷ú h``i!ð‡ø`iðZé p½^HˆpGZIøµ€1}D6(Ð(
+Ñ0iFðnè™ ð,èàRH q
+bq}%ÛÂðÈè

+
+ ÀCà ÀC €ÈŠà "€à "€ p
+àp0ðé(ø½ ÀCìçpGµ/$ðé(Ð)$! ðé! ðé Zç3Hpµ 8%Äù4pàjðaú(
+Ð‰0J	
+p
+Jp*
+�qÊqðÍú'H€0}(Ñ%H$I`0Âkàj01#ðìèàj 0@~@Àðêè ÿ÷Àÿp½(µÐH
+hH!ðàè ç8µðàè(%Ð($hFðÞèðàèIJz�BÑkFx‰z‚‰’‰ŠB	ÑI
+*Ð‰‰Õ€€Ð.$! ð¬è! ð¨è 8½{²y¶Ì'ÀVr
+Õø0uœÃÿÿ€ôµøXqÀ1µkFxXx™x$*Ð*
+ÑCJpCHpð¢èð²ýð¢è 8½?Jp?Hpðžèðéýðœèñçøµ&:O4= @hÿ÷Óÿ(Ð 9h@hˆ` ø½d,îÛ.Ñ8h!"�rrAr ø½+H"hz)Ð)Ñ#KAzp&IÁ`&Ia&IAa&IÂaB`�a!BpppGKAzpK�zp IÁ` Ia IAa Iéç pGI} µ`Id `HIL` hx(Ñÿ÷¤ÿÿ÷Âÿ hÀh€G½
+HhiGµI	hIiˆG ` ½D:E:H:X:£Àó)/*=ºðÑ¹ð“)Õ)7»ð‡»ðL:P:'T:úHÀxpGúHx)Ñ pG€pGøµ$&óO¥(ðîý(
+Ð(ðÚýðJ1q@P@CÑ<pdìÕø½pµèNà¥(ðÖý(Ð(ðÂý²x5iÓ[Ã`Rpp²pd.¼¸/È)Àè?r}$$0x„BçÓp½ðµÚKXi�xÀx!x„F\àÔHÔi#]ˆ.Ð[à]±>.Øz÷C0	??8C²(Ñ[z
C(@Ð(Ñíèà(Ð(ÑRI		'à»N#ui
+àŸï[‡BÑI		à[‹BòÓ›èRui](ªpÑ à0i @ˆÀÀtiàppiÀx€I		¥KbEŸÓð½ðµ'¢Ji\S�ÓÞÔ	-
+Ñ",Ð"››
Ð+Ð	à:-Ð",Ñ\bC[ŸÒRS.Ñ‰€ÿ÷Ôÿð½øµ$	!‹HŠNp4a‹H'"Étað$ï(p`wÐ‰!‰0a@pa¥(ðùü(ðý(ðõü(ðýd€,ïÓÿ÷ÿ ÿ÷ÿ0i=Aiiy@C0iÑ~pip!Ep�p1iI~ÉÉÁpVà@ioJ)i@P@C@Ñ0i$0°`h)€€
i@`@CÐ°hh„¤
°h+B½\ÝÄ+ÀÈ[þh@h¿
+€C¸€
"«AÒ°hh@h‰
+€CŒ¤
°h+h@h?
C¸€
"«AÒ°hh@h
C„¤
! ÿ÷LÿÀÀà6à 1iÂ‹\qipMpˆp0i@xÀÀÈppix)Ñ�x3iÊÒIRx		òp�p2iÉR\p2i‰IxÉÉÁpx)Ð!pÅpà€x1iÀA/H "ð*íÿ÷¢þø½+K Zi*Ðà)Ñ€€€xiÀAÉpG@ (Ú�Q\)îÑ ÀCpGpµ
ÿ÷àÿðPî0` ðJî(` p½|µ ,6ÐKZi*2Ð-à
)(Ñ€€€xiÀ@BˆÑà	K’3Ò	@:ÕkjF«¨GkFy™ ðÒì |½4£ÀœËÀ	L¬@ (Ú�Q\)ÍÑ ëçµxL`hðî  a`a½#µƒpà„\ãRŠBøÓ!É�p½ÿµÅ°kNpi(Ñ I°ð½¨ÿ÷�ÿ(-ÐkFÜˆF˜„B(Ø%KoïWÀ-À/°¯àxYðØíE™HQ-¥B÷ÓG˜ ðÎíE™H`E˜!ÿ÷Èÿ']à	XÕD›VI‚x
iÒQIˆF›
+6
¡™BB’Ùÿ÷©ÿÆç*Ñ€xÀ@C�àIK€x’31ÀÒ	@@:ÕkAªB«¨GA˜@«C�zh€!ˆCð”íE™%Q	àC™¨€XðŠíEša-PPµBóÓ6JD™Ri ‰	yÀC)Ð/ÐG™ @ðtíE˜A`1ÿ÷lÿ¤ /Ò(J¹D‘PiA\)šÑH˜€ÿ÷Tÿ qçÿµÿ!$I H�°ðìJ(h!` )à+\ã@¤›$›$,Ñ@$+Ñ+\,Ñ@STà@ã@'ST.\?¾@Càÿ&+ÐVTI		›˜BÒÓ˜p˜`˜xP€°ð½4£ÀœÊÀfI
+ÒüÑdI 1‚pGøµ ÀCbL ```aH%E`aI€âh€ˆBûÓ 
!‰h€ˆBûÓ €hðöì ÿ÷ÙÿÇ ðôì&0CÇ ðòìÇ ðìì'Ð1æ¼/Ài ›8CÇ ðêìÈ ðâìÀúÐÇ ðÞì¸CÇ ðÜìÇ ðÖì'8CÇ ðÔìÈ ðÌì€úÕÇ ðÈì¸CAIÇ ðÆì ÿ÷ ÿ ð¼ì€'8C	 ð¼ì ð²ì ÿ÷�ÿ ð¬ì¸C	 ð®ì ð¢ìð¬ì+Ih0C`*Hs*I	x{*I})J8C :Pc}@üÕ}¸CPcðšì!S ðšì@! ðšì€! ð–ì!S ðŽìd ð’ì!S ðŠì‚! ð†ì€!' ð‚ì!J ð~ìð„ìàiàaàiICàaài!ICàa iIC a ø½�!€#€ À-€à*� � $�â6pµð`ì!M,hà`h(Ð€G$h,øÑðXìóçµI ‡°` «ÃHÿ!Í1kFÃ”8J#¡ðDìÐ °½
Hµ”8ð>ì½µðêKh
+à	h)Ð¡BúÑà"``ðê½L£À”’À1ÀIdleµ à¦+¸1À1<¯ÿðM¨iðìlaðìðöêlj"hch€™Aá` `0ãh¢h€!ðøê!àt
+¨ÀiF¨ðìljkF uˆ ‚ 0"©ðhêhj÷"�|@�thh!ðþê½ÕIµ
+hj*Ðz�G½ð ë½pµÍLbh‚B
+Ð*Ð ÿ÷®ÿ`h!ðàê p½%ðâê<	.<9<9<0<%a2à  a/ààh(Ñ ÿ÷’ÿ`h!ðÄê$àðŽêbjÂð¶ëð¸ëµI aCð¢ëð¤ëàh"	@!ð®ë
à ßç ÿ÷qÿ j(ÐðRë%be`ÿ÷¡ÿ p½pµ$*Ð‰„( CÐð”ëžI"Hjƒ|CƒtHj"�|C�t-Ð¨x€ p½ðµ“Oxh�°(nÑ8!hFð`é0!8ð\é ¾bx`à ðnë‹I‹H"ðë(õÐ!sFa8b‰8!xbðDé=` iø`< ]8wxjaxAt|"x‰’‰’Có"t@"x«’’CtwH�wH�\
Çª´3ÀXÌ|`xr!xvN‰‰Yr"x’šr#i“#i›“ch“«{#C«s#l$+Ðübð-ù(«{Ð@@à C«s¸j�hFðpê(x`Ñ!¨G°ð½þµ["T#‰DiF¨ðë(QÐ˜5) ðþê"!(ðHé) h1ðôêÿ!Z1)t	
+it!©t!étá|ÿ )u[0hu
+¨u }.€èu
+(v Šhv
+¨v6!¢}1°ð"éðx±xC6†ÿ \00p
+pp °p ðp |0qv8ð^ê™pˆr
+Èr*H™€jð¸ê þ½ðµ%H@h“°(Ð °ð½H!hFð‚èkFxó!@¡x%‰	Cp«wàxkFXp`x"xáxCð”êkFx€‰€‰C p��� ð¸è}#ÛXC/�Ð4`x!xCÿ9\9Ñ yÕ•
+J0iFÿ÷×þ ºçxÊb€†ˆE2Àé2À'!4Àµ)EÐ)H'JxpCxSp
+xQx²Â°5ÀÜ,Ï2pIxAp$I x	xˆB5Ñ#M#N y#3@@Ð(Ð(,Ð(*Ð&à ‰°B&Ñ("€À’’J�’JK!ð*êà ‰°BÑ("€À’’J�’JK!ðê(Ð °p½àˆ°BÐáxÂÑ õç¸ë··øÿÿ€¼€»�»ÅžÃ¢ÃpGpG µðöé(
+Ð!ðôé(
+Ððôéðöé½Hh(Ñ öç ôç¸¹8µ!øJ‘xý%û$)kFÑR|xRÒ)@RCñJ‘{(Ñ!@ÐÀà!@ÐÀ€C�àx(@ @�8½èIçH`éIçH`éIèH`pGpµ
œ°X!¨ðrï* X#©ð°ékFX‹X!X(Ò¨ð¬é(	Ð!ðªéiFð²ï(Ñ °p½!¨mFàŠ@2zkžs{RI		štkFyŠBïØy¨@
+\R
+T iFð†é Ýçpµ
˜°H!¨ð,ï* âaþä¬7ÀQ�zH#©ðjékFX‹H!H(Ò¨ðfé(
+Ð«Yx ðbéiFðjï(Ñ °p½!¨mFàŠ 2~kžsRI		štkFyŠBïØy©IB\RBT iFð@é Ýçpµÿ$
4Ä°!¨ðäî2(#©ð"ékFØˆ BÒ!¨ðé(Ð&4­à A10ðédkF˜{ BôÜ D°p½„H}€Á…H€BxCAp pGHpµ 0À}€I‚	‰€Jpp€HðïwJ 0|p	
+Ap�|ý÷Öý ðöîÅpý÷ÉýwLài`0�{ ðèèài`0Á{ ðâè p½þµ
iN$¶˜à*8#iFð¾è˜@wÐkFXˆ™@�BqÓ/Ð!IˆBkØkFx*+BÐÜ+0ÐÜ+Ð+Ð+$Ð+pÑ)8ð´èTà+%Ð +(Ð%+eÑ)8ð¬èIà/;ð`ï)4^JOT^^Y^)8ð¢èqxCqpMà)8ðœè1à)8ðœè,à)8Ù:²�¨9ÀïÝsÒðšè'à)8ðšè"à)8ð˜èà)8ð˜è.Ð)8ÿ÷›þà.H}€%Õ)8ðŒèqxC(qpÐ)8ÿ÷Îþ Càà)8ð~è÷ç)8ð~èòç)8ð|èíç)8ÿ÷þþèç�,ÐhÐcç ,Ð þ½H@!µðÚí½pµ
+I$@#ðè
H@!ðè(&Ð
+Mèz(Ð¨|3 ¨t(x(Ð
(Ñÿ÷ýþÿ÷ÿih C1`p½ÜÎÀ¼ËÀ”;Î£À˜;­6Àœ;¦L êçpµ½H
AyyCºH8€x(Ð¸I"0ðî¶I"°ðüí¤à³I"0ðôí ,`ÉçBÑ¯K
+šBÐ
+CÑ¬Hÿ!ÿ1«J�bÑb«Jh`‘€pG!µÿ÷æÿ ½pµ†°H ©þ÷Þþ˜©�L þ÷Öþ˜&v°BÙ °—ç–M$	à˜©þ÷Æþ˜ðï(Q$˜„BòÓ˜© à©þ÷¸þ˜™�°BØ$à˜©ÖaØ¤;ÀÏ¹Qþ÷ªþ˜ðäî™	$hP˜„BðÓ™˜@�˜©þ÷—þ˜AØÑxI˜q
+Hq 9p˜È€ ·çµ†°þ÷hþ ©þ÷€þL ©þ÷|þrI˜ˆBÑ˜AÑ ð„ïÿ÷…ÿ%à©þ÷lþ˜(Ð
(ïÑ ©þ÷aþ ©þ÷]þ™˜ÿ÷Yÿÿ÷sÿ(Ð™ ªÿ÷÷þ™ ÿ÷Dþ Cþ÷Bþ °½>µ©hFÿ÷#ø™˜ÿ÷:ÿKK!KH€"Iÿ÷ø(ÑFH!8p€!Á€ ªÿ÷Îþ™ ÿ÷þ C>½øµ<Nx'>(Ð(Ñhx(Ñ6H")·pðüì¤­à °p1H!ððì"R”BÒ",H
+qAq+H)ðæì 7pð€(jFÿ÷•þ™(ÿ÷âý Cø½µM=(Ð+Ñ ©ÿ÷¸þ° æð!øš1 ÿ÷±ÿàèx(Ñ ðçðøÿ÷ƒÿ(Ðÿ÷:ÿ(ÐJ!pQp‘pÑpqQqÝç!épÚç!HIµð›U�› =ÀÍ0ìðÂîÿ÷LþðÂîI 9Hp½Ð£À¼ËÀÿÿPC¥€è£ÀX038óµ‰°	˜(1Ð }(.Ò&FCžM !¨Y@¨Q¨ðì ©ðœîg}`~�@ i!(Ð!	˜ð’î i©(Ñ/Ò xC@BhRB`˜(Ñp�hI�`°ð½ #SCŠ\[œh@¢(š`óÓïçà}(ÐpiRaàpÂhRÂ` #SCŠ\[œh@¢(š`óÓÕçµÿ$4qI"ð‚ëoH!ðªë½pµ
(Ð!É@„j,Ñ-ÐD!(ðìp½eJÑheHhYbK`@;!bYkFhqA`abkƒhY�`¡bhÂhQÁ`-¡cäÐ l)ðší`i)ð–í) i1ð�í)ài1ðŒí) j1ð†í)`j1ð‚í) j1ð|í)àj1ðxí) k 1ðrí)`k$1ðní) k(1ðhí)àk,1ðdí) n41ð^í)`n81ðZí) n<1ðTí)ànèÐôœ?ÀÐ…v@1ðPíp½(0´2Ð"Ò‚’j*,ÐK~ÔjäÔbi, Ñh$nåxíÐ¥x-­-Ñ¥|íÑ¤yäÐ”ld”dÔkd+ÔcÐ”id+”aÙÓi[ÓaàSi[Sa0¼áæ0¼pG(µÐ#ÛÃ˜j(ÐDidDa˜jÃk[Ãc)Ò HC	KXI*PÐÀiIa½ÿ!H1µðÒê ½¨@¨€Ø£ÀµkFšˆ‡ÿ"…2Rÿ0"0ð*ë ð\í½ÿµ�°#Ei° 40�`x"xCš ðNíÞJ’"˜!ðJíÛIH`ðJí(ÐÙHƒA2 ðDíÓH8)ÐC2 ð:í
+˜(	Ð˜(Ð9
+›š	 ð0í;"!(ðdû-Ð(y(Ñ(ð&íhy#[(Ð# C"!(’ðíax"x	C@ p
+`p0ðí@Ñ! ðWù ÀC°ð½ ûçþµÿ!õ1ðíÑ! ðDùhþ½(‰"•^¦Â˜AÀÔ’ÔF· €9(#”ðøì¢Iàˆ€�"‰™0#ðòì¡�"’‘"!£k*2
+1(ÿ÷_ÿþ½ÿµƒ°ÿ!˜õ1ðÔìÑ! ðùh°ð½(‰·!F˜‰A"(#”ðÂì‡Iàˆ€�"‰™;0ð¼ì¡�š’‘"!£k*2
+1(ÿ÷*ÿÚçðµ!›°‘‰Di
. 6,Ñ! ¡à ð¢ì� ð¢ì� ð¢ì�ðx'²xW7CÐ Œàðšìix*x	C‰	°	
+ªð”ìcH8("Ð`I"ˆðêš’›š9
+¨ð†ì(Ð z@!CY! r	]‰ÕUI	‰~‰Õ™ÉxIÕ€!C r;ª©
+¨ðnì ðÌùKIIh@	� ðfì! ðfìðhì ðhì(Ð˜ðQùðnùðdì	™"0ð;û ð^ì ð`ì'kF|@7¸s|8©ð"éº{	›9 ð¨ù ðPì.Hh‘py3yC+3 ÿ÷pþð²ý‘ÀEÑ”CÀôöbW ðDìðFì!ð9ø°ð½|µ‰Eiÿ! ~1I] 0)ÑAxx	C ð$ø`x!xC(Ò ÀC|½px1xCkF!Ø€1"hFðté	"(iFðì |½
+H!µ€ÿ ðì½(µÐ(Ñ þ÷Øø½ úçtqÀô£ÀLF(µ	Ð(Ð(Ñ þ÷”ø½	 úç øç öçøµ
™& 0&p)fp
+Ð*Ñæx@'>Cæp&&p&fpp-
+Epex&x-5C­%p-
+ep‚p
+Âpbx%x*C’"p
+bp
+qBqbx#xC’"p
+)bpÐ"‚q€"Âqbx#xC’"p
+bp€"0ðøè`x!xC€0 p
+`pø½þµzÉy&CÐÿ!]18ð8ëÑ y"!#ÿ÷…ÿhþ½(‰"@�· €9(#”ð&ë y 78�px�"’¡y˜2#ÿ÷}ÿ(ðë@Ñ y"!#ÿ÷_ÿ þ½8µ’Š{L{#C~Dã�EÀ9‚a
+ðVë@Ñ-Ð ðù 8½øµ‰Ei  0AyyCÐ"2! àÿ!]1(ðÞêÑ"!2#ÿ÷+ÿ4à0‰"‡· €2)0#’ðÌê!ª AS"(2’"!8#ÿ÷%ÿ¸yÁdHÐ(jà(Bj*Ð2Ñ0ð¤éàxx;xC8ðë0ðžê@Ñ ÀCø½ ø½øµ$Bi‰äC@ 6ux3x-C*Ñ+2!#@à-Ð-Ð€-/Ñ 2‰”F�BÑ÷x²x;CbFR‰“BÐ$-à-Ñ+Ð+'Ñqy2yC	Ð2! àÿ÷hÿà!2 ÿ÷¨þ$àð9øñçqy2yC	Ð--2!(ÿ÷–þ ø½+2!
#óçµ‰Di	Hx
+xC(Ò ÀC½ 0BxxCkFØ€"1hFðÄï" iFðhê ½ 1µÊxŒxHx#Cx C2+Ð!#DÎÕ£ŒGÀ´>¥Qÿ÷Vþ ÀC½Ky	yCÑ!à!ÿ÷Hþ ½€µ‰L �`i!ðLè( iÐ!à!ð(è`‰ðòþ½8µL"i‚BÐ*Ð ÿ÷ãÿ 8½%ðè-----(-(-%- ÿ÷Óÿ!à`iAzÉÕáh)	ÑoIðè(Ð i!ðøïà"’iJãˆ`iðêàeI àdI ð¿ø%a 8½ )µÐ
+hn›x¤Ñ	+Ð
++
+Ñ`2R{*Ñi(Ð ÿ÷•ÿ ½ÿµ‘°PN0i(Ð,>Ð9 :à8!¨ð¨îiF¨ð¿þIH�IH�(˜0•ua/�Ð8ð¾é(Ð@H™"ðbîà8ð¶é(	Ð"!(ðœé,Ð™ 
à5H"9ðêî3Hðžé(Ð,Ð/I  G°ð½š«	tkFy«…­]t�€«€�tØt› $+Ñp�à#s�‘B«Ñ}@@uà}«CuH	�˜«�}!Cu˜ð€M´3éˆIÀ
+sÝù¨ô`ð°ï(0aÅÑI ðøÀçµkF˜q"hFðšîHiF@iðžù½"µ’Êy‹yCKÿ÷`ÿ½JÒh*ÐGpGÀÛGÀYHÀ N¡IÀpµ
uH!ðnî"-Ò*qI à#\[[T@�BöÓp½ÿµ‡° �ðé(Ñðˆï®�w!É(ð¦è~Ð ‰š*Ñ^J· €) #’ðšè 8pxpWJ	™38ðlè(y(QÑ(ðzè @(z(Ð(Ðhy(BÑ ��9(ðàè0À0�@ˆ(Ð™0Á0ˆc �hy#[(Ð#ÿ!E1C(Ñ€60l�˜!pš’
+9(ðHè™kFz
+pàš’š9(ð:èyx:x	C8p
+xp˜(Ð
+˜(Ð›
+š!8ðè˜"(Ð`{Cà+à`s˜ a ‰ �™‰ U˜&6 (Ñ˜(Ð"!(ð~è	à(y(Ððpè(Ñjã1ã„KÀ*¾z à °p:!(#ð&þ ðöï@Ñ ÀC°ð½ ûçµ" !’’‘t2˜1#ÿ÷,ÿ½ÏÀÈòpµK&öà ð&ïÚH"1ðÂîõÐ° ea � i!ðlí p½pµ À(@j$(Ð4. 6)Ñ0~ÀÔ"(ð$è0~À	Ô(z!C,(rÐ zý!@ rðìí(ðÞíp½8µÿ0!a0Aw`zï!@`r ÿ0!0ð0í y(Ñ"’ðTúðøï ðöî5 ]Ôð|ì«Hððï«Hððï(ð‚ì" ðÜïðêï8½µ¤H"€h!h#ðäï(Ñ`i€!ðâï ½ ðHî ½pµÿ÷kÿ$Ð ‰"•Hp
+Xp ˜qØq ˜p Øp10ðÜì(˜0ð�ï(Ñ1(ðŽí(Ð(ÿ÷‰ÿ ÿ÷½ÿp½pµ„L
Ðb€" ð¾ìà!a€! ð´ì0%pÿ÷oÿ ð˜ïê‡kþ€MÀçc½4p½µW À ð�üuH!"˜1 ð¢ì½þµ!0ð–ìnH4)4"°ð’ìhzÀ}Õ)"˜10ðˆì( 0~1s@~psðlïkF�x°sXxðs'(€0'pgp} p
+àp
+})t1 ðjìàx¡xC$ÿ +0 p
+`p  p àp©¨ðükFy q˜`qàx¡xC$  p `p  p )àp"@1 ð>ìàx¡xC$>H�y)Ð!pd'pÀyd pd9I'pd"1 ð&ìä5H~)Ð!pd'p@~d pd0I'pd"1 ðì4 þ½ðµ‡°¨ðÞû"9¨ðìkF 
+\v˜v¨"€©ðöë2(©ÿ÷Bû°ð½ÿµ�°ÿ÷bþ	Ðš+1 —ðÐî ÿ÷Ïþ°ð½øµÿ÷NþÐ+:1 ðÀî ÿ÷¼þø½t¤ÈÉtø$€*ÏÀ²lFxqÀµ	hIÑ0¨eL|OÀòOÚ,�h1ð¦î ½µ	hIÑ‘h1ðšî ½øµKh…i0hŸhÙh"
(dÐÜ
+(}ÐÜ€oÐ(-Ð(Ñ-ÐYh(ð€î‚à(cÐ(~Ñ(ðUûjà(mÐÜ(uÐ(sÑ  qfà(nÐ*(lÑ-jÐ(y(gÑhy(dÑhYh(ð`î ø½("uð®þ! ðZî(y(Ñ(ðœí(ðTî(Ð l(Ð	 À$ ~ÿ(ÐhFðnì ~"#iFðDî"(ðDî ðrýÎç9(ðþ	(ð™ûÄç¡h$1 ðî¾ç
+àà9(ð1ý	(ð€û²ç(ð
+û(èÐ¬çàÿç"q¡h<1ãç!ðî hà`Ÿç0ø½øµMhhéh¦i	+qÐ	Ü›ðšë "£££o££ui}£+qÐÜ+oÐ+mÑ ‹à+iÐ*+gÑ.eÐ1y)bÑqy)_Ñ*hih0ðÐíà €ðàí0ðàí0ðâí ðâí0y($Ñ0ðí0ðÀí(Ð¨l(å"K5xQÀªpUHÐ	 À-¨~ÿ(ÐhFðÚë¨~"#iFð°í!I qr"0ðªí ðÙü!})DÐ3âŠ˜3(àÿ÷Åý¡h1 ð‚í8à"!0òçà*hih0ðvü,à*hih0ðýû&àà%à1
0ð,ë(Ðèy©y
+C+!0Ôç1
0ðë(Ðèy©y
+C	!0+Åç  q¡h<1Äç hà` ø½øµhMh¦i'+ÐÜ›ðèê
+^]]]E]]K4]+SÐ+FÐ+KÐ+NÑLà ðpü ðLíðNíðPíAà0ðPí0ðPíyH`yH`yH`yH` ðJí¡h 1ðí0ðAú'à!ð@í! ðí"!0ÿ÷5ý¡h1à*hih0ðïûà*hih0ðvû
+à  qà ðâìà'q¡h<1÷ç ø½ hà`úçpµHh
+Åh	h i	)$ÐÜ‰+Ð)Ð	)Ð
+)'Ñ)1ð†ê(Ð à)Ñ¡h H1ð¶ìàðøì ðØì ð'AUtSÀŠ6Ëöìà  u	à)1ðjê(Ð	  uhŠà‚ p½p½pµIhhÍh¢i+ÐÜ+,ÐÜ›5Ð+Ñà+'Ð	+Ñ)1ðDê(Ð	  uhŠà‚ p½;!ð$êõçáhà!u¡h01 ðhìëç!u¡h1÷ç  uäç)1ðê(ÝÐ Øç hà`ØçIµ�`JH!ð˜ìIJ0ð�ìHJ!0ðŠìHJ!00ð„ì
HJ!$0ð~ì
+HJ!<0ðxìHJ!H0ðrì½ÀÂÄÂÈÂÌÂ4ÏÀuOÀ‰OÀ£OÀåPÀGRÀ#SÀ›SÀøµ
(#ÐI ]ÀÐ ð^é ðLì"!(ðþè ! ðFì¡8ðDì) 5pðLé ð@ì ð*ìø½øµ
ðHë iFð6ì"1(ð4ìø½wµƒ°
üN0i�B'Ñ"ñ¨ð^è( Ñð&ì(	Ð,,Ñ ð$ìóH!ð$ì$à,"Ñöó±pUÀG`5…ª©¨ð ìkFyz(ðìð ì ðìà#"(©ð®ëkF{ðp5añh)Ñ0põ`ðöë°p °p½ÛI8µÌx”	i˜		ÿ÷°ÿ8½8µÔHáxÀx‰€€‰ˆBÐ iFðÎëÍI	iÌH		"ÀðÈëÈHÀðàë8½µÅLàx p ià`ðÜë`pð¼ë p½µðÔë¾IHp½¼J(Ðxp)ÐÐh`pGpµðÄë(Ñ³HÀh°BÑ±Hx�‰¡BÑ€¨BÑ p½ p½ªHÀx€Ñ pG pG¦I
+xpÉhAppGpµð¨ê(Ñ¡Hà(ðšë(ÑŸH@ p½øµ0ÿ÷Žù90ðŠë	 ðŠë ðŠë ðŒëðŽë) ðŽëø½µð4ë,Ð ð>è‰Hh€Gà ð8è ðë ðxëðzë½øµ!{Mhxðzê y(Ñ ðÐê(Ñ(h�éhªx		ÿ÷çþ y'(ÑÞ®ÍKlWÀÊÜñÍ`zÀÕ'!˜18ÿ÷Áÿ"W2&’@6"±{0ðâé/Ñ ÿ÷ÿ²{1 ÿ÷‹ÿð0é ¨`ø½þµ'
—ðòé iFðâê©x*¨ðàêèx�ðx‰‚’ŠBmÐ€€C�ðpRHxÑý"@p— z@@à"Cp �Y ]€ÕIH€~€Õ z€!C r ðë! ðþêðx;NÁC‰öó")ÑkFz�0x‰ƒ›C€@€C0 C‘ð˜ê¨x"©à€€(ÑkFz�0x‰ƒ›C€@€CÏ @1‘ð|ê­x"(©ð"êÿ÷¬þH! #ªð¾êþ½pµL ~!€Â(ð¶ê ~ÀÕ1(ð²êp½(ðŠêð°êp½Hµ0ð®êð‚ÿ½pµH
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ÐðRé ÿ÷Òÿÿ÷^¯uWhYÀt‘‰eÈÿÿ ‰0] ÿ÷©ÿ½øµIxx	C&49*,0ðïèi(ÐDx†jk’¨i#Ax€2ðÔè8ÿ÷rþø½|µÿHx‚þHÐðVêðÿ|½üJ’‘3")ðPê|½ðµ1³°ð0ï(XÐ18ªÿ÷¸ÿ�8y(4Ñ ��8ð®è€@*Õª’!0ª«ð.ê˜€Õ# j 3	"©ð(ê j(ÐßIÀ"iðÖí(Ñðrï	!Éiˆv ˆu™* ðêðÂè8ÿ÷Aÿ0"š™#*0ÿ÷“ÿÿ÷0ÿÿ ‰0Á]8ÿ÷ÿš™8ðüé3°ð½µÈz$ÀÐ:1% ðôé(Ð$ ½÷µ¼°y1$(;‘Ð(Ñ;™(ð´î(~Ð9("ªÿ÷<ÿ!�ð~è(ÿ÷ýþ8*š!™3*0ÿ÷Oÿÿ÷ìþÿ ‰0A](ÿ÷Íþ;š("©ðÀé"’"!8#ð¼é(€0)ÐÉxAu> 6qz2z	Cvnñ‰d[ÀTõêæÁ‚—H#x‚’’xx9x
+C1(ð¤é ��H"1~0ð¨í(y(yÑ ��(ðìï"1ðšíðîá` `
ª’!8ª«ðfé˜ÀÕ3"°i3ÒC©ð^é.>Ð±i);ÐyFvÀ	�ˆxà„àKx C’Ò�0ðlí˜(Ð.ÐpHqA�!à˜(Ù&¢6pðFí(ÐpðBí(Ð!, U+ ]( Ð^H"AhIA`aH!hð:éà !�0ð8í!, U 4àz(	ÐSH"AhIA`UH!hð$é(y(Ñ!š’>š9("«ð ùDà(ð¨ï(Ð/˜(Ð0™(ÿ÷~ý š#™(ð
+é&š%™(ðîè'œ&,Ðð8î¡xˆBÐ&.Ð7L h@( `Ó"!(ðšï  `?°ð½/I ˆ`/H!™8 )~Ó÷"@ÉÉ‰à"CÉÉv9 @]ÁÔÀãÐ7š’,›6š4™(ðÌèÚçpµ0ÿ÷jû¡i(1ðÄè°ôŸN`]À™�é¨ áåµL<!~‰Ê!ðjè ~€Õ à ð¶è½þµ ðí €ð¸ï 80ð¬è y%&€5( Ñ @ z(Ñ! ˜0àü£À0@KL,�éŒ¶ðì  !t0ðì.unuî‚ ð†è ð†è ÿ0!0ðhìÿ!…170Sðšî! ð¶ì ðvè ðtè!ð�ï! ðXï ðŒï ðjè¬Nði`0@|(ÑðYþàðgþ ðÔîði!@ð†ï�ðXè"’ði™@ðlîñišI ÿ÷ü ðÂî" ðDè ðBí zï!@d!oué‚û!@ rÿ }0Ua! ÉCÀ0�‚Á‚ŒHR!ðìŠH "8~Cv ÿ÷@ÿð îµ €"ÿ! ðèþ½�I ˆ`pGµAy)Ñ@zÀ
Ô
+ài€iH0�BÑðíxIÉhˆBÐ ½ ½i€i02‘BÐ:‘BÐ<0�BÑ pG pGlI µˆ`ð9ù½¨’dš\_ÀKMÁ µðBì½ðµÏ%×xx¾,@¶.Ð&ÿC¿Ð&64C¦¶pbÐ§0&/Ñ)Ð)Ð)Ð)Ñ,@4p
+)Ð)Ð)Ð
)Ñx4Cp+>Ñ)Ð	):Ñx1Cp6à£›+2Ñt):ÐÜ‹›,Ñ‹	;ðì36363636))))))))3636)Œ)ÐÜ€)%ÐÜx)"Ð|)Ñà„)Ðˆ)Ñà�)ÐÜ•)Ð™)Ñà¡)Ð¥)Ñ,@pÑxx‰‰€€CÑp ð½,@4ñç4Cïçÿµ�°xGxà x¨B
+ÑbxºBÑÝ-Ñ± ðÀê(Ð`x¤˜„BëÓ˜„BÒ˜¿Å*á ðë9(ðëà'˜` °ð½I €µ€
I€I
H`I
H`IH`ðrøI
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+ùIøHðôî(Ðhx)x êW‡XaÀÛVŠC-(ÑòH"h W0ðºê z@!C!Ia rÉ‰Õ€!C rp½éH2)ðÖîp½øµäHðªë"’ÿ÷Áÿ þ÷ýÐ3y") ðÀî þ÷|ýø½ØHµDi @Ñð¸îð>ë,Ñ ð¶î½ðµ‹°ªdÊCÐ*Ñª%%ppp(UpÐ.Ð€"’’ª ’�(#©ð6ë°ð½)ûÐ.Ðˆà"©’‘#©ð4ëìçðµ‰°
œ™(C%Ð .pÐ18ð$ë-Ð)8ðëðë(Ð"©¨oFÇ#š)0ÿ÷£ÿ"’’š˜!«ðë	°ð½!"‘‘’š#)0ÿ÷�ÿñçóµ‹° 	�����ð8î(Ñÿ÷lÿÿ ~0@](Ñ˜ !0ð6í(Ñ 	�ˆH"+É €’*Ã €)ƒH0(ÿ÷ÿ	˜(~Ñ}Hð¦ê €(tzHÿ!`(ð
+îžö·ÝTcÀû2a	(
+�mÐ
+˜«‰– B[uH’h0™R	0ðüí
!1p™"pð®é˜M0Fà˜	‘ÂxƒxC�B?Øax"x	C)ÐÜ )Ð!)(Ð0) Ñ”$àÝ)Ðÿ9P9Ñ  p `pVH!ðvêà-!	iðTêà ðdê(Ñ”àMH!ðdê2N2!(ÿ÷™þkF˜ŠÀ�˜ÀkF�˜Š(³ÒDHkF48*@)¨Ãà'à=Kš™(ÿ÷ÿ(zû!@kF|ÉIC(r6H©ð~é1P1Hr
+ˆr˜Iðèê
+˜ð‚í(Ñ
+˜ð€êà	˜(Ð-J™(ÿ÷‚þ
°ð½óµ‹° 	�����ðZí(Ñÿ÷�þ(ÿ0a0
+�@(Ð 	�H"+É €’*Ã €)H0(ÿ÷'þ	˜(~ÑHðÌé(ð8í(�uÐ˜ª‰0™	0ð8í €I(tÿ 	`!1p˜e0PàˆÏÀ¤ÀÀ¢€-ì£À+€˜	‘Âx}ÈíCPeÀ6FbGƒxC�B<Øax"x	C)ÐÜ )Ð!)%Ð0)Ñ”!àÝ)
Ðÿ9P9Ñ  p `pà-!	ið|éà ðŒé(Ñ”
+àH!ðŒéà2b2!(ÿ÷ÀýkF˜‹À�˜ÀkF�˜‹(¶ÒuHkF*@)¨Ã(pKà(àš™ÿ÷4þ(zû!@kF{ÉIC(rhH©ð¦è1`1Hs
+ˆs˜	1ðê˜ðªì(Ñ˜ð¨éà
+˜!Aw	˜(Ð\J™(ÿ÷§ý#çµðÀè z@Õðé(Ñ!à! þ÷Ìú ðŒì`z!C`rÿ !~0ULHˆ(Ð ðxè½pµDHð.é {(Ñ(ÿ÷Ðÿ&à&öC(þ÷Žú	Ð<I#z"{I(ð@ì(þ÷ûú0p½pµ&3HöCð
+é {(Ñ(ÿ÷­ÿ&à(þ÷¯ú(þ÷júÐ#z"{)I(ðì(þ÷Øú0p½pG"HhpGpµ"ðhèH,Ð!‰iIiàÿ!`p½µÁÝŽLgÀ»ú¦þ÷„ú þ÷?úÐ! ðì þ÷¯ú½pµ%íCðúë
Ð ‰!p ðøë(Ñ ðøèà%mÑ0ÿ÷Õú0ÿ÷Ñÿp½¤Àù,€¤ëµ‘
+"iFð6ê½µ‘"iFð0ê½0µ
! ™°ðJëðàé`x"xC 9,0jFðâïÿJ+ÿIhFðÈë°0½ µð*é(ÐùH8~@Ô÷H"0ðHï(Ý$à$óH!hÿ÷ËÿòH!hÿ÷Æÿ½ÿµ�° ��¨þ÷ìþ8ðžë�˜š‰›æHhy· €‘9’š0ð�ë			‘1�ðŒë1"$1�
+�ðï˜kF�0 0A}v€}XvˆÕ à ð0è8ðtë(Ñ™8ðrë™@�kFX~ÀÐ €8|˜ú÷ü™@™�ú÷ü™@�kF}€0Ñ»H8~@+Ô˜� ���µH"0ðÄî(Ð ��6 À]€Ô¯H
+0ðãÔÄRHiÀ·Þ§¸î(Ð �«H*0ð°î(Ð �›š™˜ð.ë™@�š-!8ð*ë™@��8z1L1
‘	@(‘Ú
˜ðŽî˜#BxxC	˜’‘�š™0 ðë™@�0™"70ðë™B=!8’ðúê™BH!8’ðòê™BJ!8’ðìê™@�8ðúè(Ð¨ðìêðîê
˜ðPî˜nFBxxC	˜#ÆÝ š™ðÐê™@�(ðÚê˜èa˜ðÚêl`èb˜" 860
+&p`p!8#ð»þ`x!xC™€@
+™�	9)s9isax"x	C1é�™)Ñ\I`à[I`(ð®êÿ"! ð¬ê°ð½¿!‰@pGpµ¿ €,! ðî6 @]!€(à{¢{ÚCCàCˆC s
+)às"˜1 ðìí0
+¦ràrp½óµ �°!ðªï(
+Ñ! ð¤ï(Ñ˜ðrê(Ð °ð½©¨þ÷¼�`DkÀ%Ó½$yý¨ð0ü-H.Ih	hC~Ñ!	 ðøè!	 ðÀè=@5¨~> 6(Ðh~�¬~à˜�4 ð4î!	˜"‘þ÷Íüþ÷;ý˜9ð­û9¨ð:ê«˜}Y}œC€4«à‚˜zÀÐ™˜"ÿ÷«ý˜ð*ê(ÐþçHak`° J�`H"k`’:‘#©à oÀ0ÌÂÈÂì£À¼;À;ÀÂXÂ˜ÿ÷þÿHák`° þJ�`ýH¢k`’‘˜:#©ÿ÷ÿý«˜}Y}ààCðêé!	 ðvèòHh "C`!	 ð8è(yéx0z
+Cóy˜Cÿ÷ÿ Sç Qçóµ! ‰°ðæî(
+Ñ! ðàî(Ñ(ð°é(Ð °ð½©¨þ÷¶ü
+Ÿ
+œ@7¸y 4(ÐxykFu¸yàkFzu {kFXu¨ð[ûÏHËIh	hC~Ñ x(ûÑ xaxC(uÓ ðlí xax.C€6ð‚¸y(ÐxykFu¸yàkFzu {é]-[@mÀè§¾jkFXuZ}(©þ÷áûkFY}˜"þ÷ìûþ÷Zü+”3*t2
+˜’‘ðdé
+˜!70�ðþï(@0‡s™:ðªìªH9*’"˜ðÜî�›™:(þ÷Šü(ð2ï (q
+™(ð@éðjí(Ð(z@	Õ· €*’2}›™(ðí }ÀÐkFY}"(ÿ÷˜ü˜ð(éÀAàVàŽH¿#~@
+Cv(ð
+é(Ðþç‰Hqk°'`„JÈ�`†H2k`’‘š
+™(#ÿ÷ýxHñk`xJÈ�`wH²k`’‘š
+™(#ÿ÷óü xaxCðàè(a} 0v¡}Av! ðfïjIh "C`! ð*ïày¡y x
+CcxC(ÿ÷þ ç çÿµ…°]H!h¿ €, ðì1(1˜0"‘�ðìðZë�™
+ ðNì8™"0ðôëKH™h"0ðìë™" ðèë 60z rpzàràz¡zCð„è'.'s 6gs°}€Ô˜(oéX<oÀ„‹ŒAÐ˜€x€Õ":H’h"*!#ð´ï(Ð±} "C±u�x"C�p˜(Ð˜y@Õ0I2HJ1ð^í1Ih"�C`0H`G`ãz¦z3CÛƒ`Ç`ãz¦z3Cƒa(K)H@3`hC`˜ðüê!I iu`{!{CÐ!(ð:è	°ð½ðµÿ0�0Aj @&80…°)�~Ñ`z!C`rH"’ @0"�{ðží
+™@ àÄÂÈÂ\Â§€ÌÂ=ÀÂXÂ@KL£€¦€ÿðþï ðXî ðXî(i(Ð!à! ðôï z!C r+ À]ÀÐ!‰ÿ aHa¨j(Ðhm(Ð©¨þ÷Èújm©jkF’‘{‚˜‹’	 ðÐï"ÿ22 ! ðÎïð}(0Ð™ ðºë(*Ñ €0Ái€i‘�ªk9 ’àà+jjjÿ÷Öþà™"˜0ðæê ©ð®ï(ôÑ!É ðÀíàð}(Ð™ ðèZ1_8qÀÜ´%�ë(Ð ðžï
+˜(Ø§H"~CÉÉv¤H21ðpì°ð½i€i$2‘BÐ<0�BÑ pG pGpµy(Ñ @%(}(Ð–I ðù”I 	ðù (up½! µðÌíŽHh "C`! ð�í½pG‹I‰H`pGpµ‰z‰Õ0ðPïÐ @ À}(Ðhx)x
+C:1 ðRîÐðšë©xˆBÑ p½ p½µÿ÷×ÿÐðÄê"Ò¢Ñf�f½ðµ 1‰°ÿ÷ÅÿTÐ] À%"1¨ð@êgJ˜™€#*hYAkh€™A?Ó°zÀÁ8 ]ÂÒ‘B6ÑÀ6Õxx9xC81?1:0 ðî�:1Ý ðþíðþê(Ð&"’’’˜1ª«þ÷�ÿ)"1¨ð”é(Ñ)"1¨ðŒé(Ð pæ næøµ@1N28ð¾îðlì:H"’"±{0ðì²{1 À0’4sÀüÐ`¦þ÷Åù(ð†îÀA)H¿#~@
+Cv ðbì9 @1Jz 0v‰z#Av”3"t2
8þ÷ øðŽê(
Ð z@
+Õ· €"” ’]+1 ð>êI p  qðìø½xJ�‰¼2)Ð)Ñ à€Ñ? bpG¿!‰QµÐÊz‹zCðZî½@KL €§€¯qÀ¸;ˆ=¾8µûM(iy)$ÑAy)!Ñðhì(Ðhhÿ0Á0k#àð6î(Ðhhðÿ(Ðhhÿ0á0{ðÿ(Ñhhÿ0Á0k(ið$î8½ihÿ0á0{@{‚BÓÿ1Á1k!ðÒé8½ (rhrèr¨r(shs¨sÐ€À x� xaxÂ˜Òðî(»Ð yayC}!ÉAChhÿ0Á0kðøí(¬Ñ xÀÐ ¨r8½ð7ø¨røÑhz(�Ð8½pµðûÂMiz)"Ð(zˆBÒ@(r¨z(Ñàðø¨rÑhz BÐlz(z (ñÛðöú(Ð£m»0uÀ1¤cèhhÿ0á0{Isÿ÷fÿðäúp½®HpGµ#«L“bhe{ÿ0á0†ˆ�yµBÑ)Ð {(Ñ  sà {@ scsi …\žH£{@hÿ0õ0«BÓ)"Ð!{)"Ñà)Ð!{)Ñ©ðØè–J!kFÃ" i›#à`{@`s`z@`r!àK[j3Ó\+ÐI¡s¡{©BôÓ °p½¡{KYk1U©ð²èƒJ!kFÃ* i›!ý÷ú(ÖÐ ççøµ �Vi*Ð ‰ˆx	(Ð(Ð(ÑrHChÿ í0Â\’*0ð>í ø½ � iFð:í(Ðš) ð6í ø½pµcMðÞèQ)Q;QQQQ;Q(iy)Ñð&í!( ðBé!( ð>é(iy(7ÑXIhŠC`1àð#úÿ -0l`ð$ëðíàðú èrð#ú(Ðÿ4á4 {@ sÿ÷”þðúàÿ !ñ0Q @Y(þ0ðÜï(ˆG ðú ÿ0õ0ðòè p½pµ7Hiý÷WúÐ(‰<—Ë,wÀ¼§ D7H p
+!`p	10ð€é  qàq(ý÷½úp½øµ%)hÐ0ð¬ï(cÐ0ð¨ï(^Ð1{)[Ð p
+`p0{ p0ðšï0ð–ï*àð¦ï0ðŽïÁÿ g08p
+xp x	À
+¸p@úp%�
+à(@�èÀ1"ðˆïm x¨BñÜ˜'ÿ +08p
+xp x@
+¸pùp™	E!à|”ÀítÀGuÀ£€€
+RH’ÀÓ~qIBq xˆBòÜà  p`p p(ø½ðµA!É‡°ðÚî!
+¨À ÿ0õ0�ðèÿ !å0S"1 ð8ïí--ösàðx²xC„Fpx2xÿ#CÛ1?Â˜BGÐÜ(QÐÜ(Ð(6Ð-(SÑIàÝ(GÐÿ8€MÑ�á0ªðîï ©ý÷²þBà!*ÐÜ*8Ð*;Ñ"i!’	]KY
+#j2i31ðöë-àH*ÐM*)Ñ p
+Hpà"	`ðâîà"ÿ2Ö21 ¢Èß(yÀUß#ðâëà!ÿ1å10ðÞëà ˆp Èp- ßç˜ð¼ïà˜	bFð’ïè-ö-‰Ñ"`©ðLî(Ñÿ"!`ðHë °ð½÷µŽ° ÿ1á1Hsà@(HsÒH{Âz*òÑH{(<Ði ]"j2 %àCÓ\+Ñ@°B÷Û.Ñ�q ÿ0!Ö0ý÷øXH8!ahFðîVH�VH�˜—�UH”«�{!C!ÿ1ý1(C	‘shFðhïÿ4Á4( cÑð‚ø k°ð½øµ
CLÿ 4ñ0Y'(2Ñ#(ÿ÷ðþ(,Ðÿ!?HÉðÎíàÿ0ú0q;M`}!ÿ0	0ð.î)Èû0ðÜï)ã 1ÀðÖï )hs1Hþ1ðÐï"!0ÿ÷mÿ(Ð'à'8ø½y)
Ñi€iH0�BÑ I
+zHz‚BÒr ˆrÈrpGH!µðŒíHI8`"!0ðë½H!µhÉCðë½Hµhðþê½I Šz*ÐJz”ý¿ž${À"1¼‹zšBÑÉz)Ð pG!) µðîî!) ðêî ½|”ÀivÀvÀ †˜–ÀwÀøµ"RþOþNÿMÿ!1IYŒ*xðXî	7BEILUX)Ðy(Ñ z(Ñ*GÑAàðÊî(BÑðÚé(>Ñ(x(;Ð 7à)Ðy(ÑHy(Ð z(.Ñð²î(ÑðÂé(Ððªî("Ñ(xà*Ñ)Ðy(ÑHy(Ñà 7`àÙH0` à 7`	à*7`Ð*Ð*Ñ à ðzùø½øµ%ÌLËOe`8hx)tÐ!z‚x‰		"	’€!rÀ}�BÒàhà%ràh!ÉCà`¿IÀÀ 1à`	x)4Ð!Cà`!0ðFê€0!ðDê9h	"’‰	"ð@ê(Ðàh!Cà`!0ð.ê€0!ð*ê9h	"’‰I"ð&ê(Ðàh!Cà`8h�h)Ðàh�CÑ a i(Ð�H€iy)ÑAy)Ð•I
p—I
p!Ið&í#xz€šž }ÀïE¿Åð†íð"øø½8hx(Ðð’íðøðöéø½‹Hx(Ððòéðôé(Ð ðôéðöéø½ ÿ÷ûþðäéø½þµ|O|I=hHh*x*Ð
+x*Ð(Ð ÀCþ½wLA!4 ÿ0Á0�ÆkÉ ð*ìix!pÿ"!`ð,é¨x'(ÒiHx(Ð	 €(Á}eHz¸BÜ??eH"h ÿ0IÖ0ðvì_M¨iy)Ñðªé(ÐWH!hàUH	!hUJ‰AÉ}z‰�pQHúÒzNOÃ9hAÿ1x1àðPì9hÿ" l21j0ðHì	 €8�~i UDIGH1ðìí@H!0I�Q¸h€Õ˜!�b˜A‹ÿ å0S¨iy)7Ñ@y(4Ñðé(,Ñ¨iðhî¨i!ðé%!Ix@(Ð# @8�‰@‰à¨iðHé}"ÒBC.ÚpB�BÒ¨i!ÿ÷MýI(H`	Ñ˜ÿ÷œþHçHh@hæçxhäç þ½I 
+ 2ˆapHaÈaÐ@ÅÀ=‰)¬PpaÈ`pGpµM(x,pÑhhðép½(Ð,Ð(øÑ(i(Ñÿ÷ßÿhh&(Ð.pðé,p	HÆcàœÏÀ¤À\ÔÀüÑÀ\ÕÀD¹ì£À3|À8×Àÿ÷ôþp½ðµ(‡°ÑÄMàÄM!I(ð,ë	!‰ l`ƒ w0x(~Ð(ppxhp°x¨p°ðvëh`00ðrë¨`00�ð�´H�˜Íà™ÿ#Hx
+xC[Â˜B~Ð
Ü( Ðÿ8€+Ð(wÑªH)˜ðpè¯à*oÐ*Ð*ñÑÿ ™0#ªð^èkF‰(Ð  wšà"’!~KYJK!Ék™2ðDèÚçÈx‰xCà(Ù ÀC°ð½)ÿ1˜"x1ðìqÐ0Ð!ðžêàu˜€iy)nÑðjí%!IAI)fÐ'#!Iàhà@�‰@‰� `ƒá}˜ð~ê("Ùà˜ðvêøÀ@ÿ0q0��r	
+Árà)à6ààá}˜ðdê˜s	
+Asv½
+^�ÀÊCkà}¸BÞÜ-à'8iF—ý÷†úÿ çu™y0AU#à iFÁ	˜ðèkFy`wà iFÁ	˜ðèkFy wààÈx‰xC6.Ð˜€�™ˆBÒ-ç oç!I(ð2êgçpµCIÿ(ŽaÑ*! ÿ÷êþ*! ÿ÷äþ0Cà*!ÿ÷ÞþÑÿ÷Íý p½pµ6L
 i1ð*ì!10ÿ÷«ú - aÐÿ÷ƒþp½µ,I(H$d`!ðòé#H!ðîéÿ!%H1ðêé ½êç!Hµ@hð–ï½HhxpGI	h)ÐppGµL!`hðàêHI€i"1ÿ÷Œû``½J 2ŠBÐ pGµJ
Ih	$“x	z¤Ò}É(Ð‘BÐ‘BØ ½ ½üÑÀœÏÀ\ÕÀZ\ÔÀ¤Àþµÿ!Q1úHð˜é5!ùH	ð”éE!÷HÉðŽéöH(!ðŠéôN$H>7$7%eC¨ð<ïèð:ïd,ôÛéN$%T f7šƒÀ4® è`C�M`5PèHMtH8ð.ïd,òÛäH$'áN<8�Ô `C�M`5POt˜ðïd,óÛÛH$'ÙN08�ÿ 0`C�M`5POt˜ðïd,òÛÓH€ þ½pµ
$@)	ØÍHH8ðüîÐÊH!$8
+àÀ-ØÇH<8ððîÐÄH!8ðäî
àÿ @…B	Ø¿H08ðàîÐ¼H!8îçºI°P p½#µ¶LCC$<àX"›hàÄ‰ŒBÙhR“BøØ ½pµ%(FÐ`|(CÒá‰@)
+Ò(Ñ@! ÿ÷ÜÿÑ@! àÀ)Ò(ÑÀ! ÿ÷Ïÿ!|žN ‰-pPÐ¨h `¨‰ �è‰à�(| t) ê‰10ðœè |€4P,`|#�IXC$9@!ð„îa|#ŒJYCH:Šðrîp½ðµ ‡M…O(€$? PCÁŽh.
+Ð9X à‹‰,ˆ#C+€	h@†B÷ØR*ëÛð½pµHy	yC@(Ø!àÀ(Ø!à!(hB|ŠBÐÿ÷�ÿ`y"y`xC"x%Ø_€…ÀùÚ#¦Cÿ÷1ÿ(`p½øµ)~ÑUà`x"xC
+)OÒby#yÿ"CR�BGØˆ\IX�(Ñay"yC!Ðùy8yð!ú˜(Ðby!y
+CÑ�h©C�`Â‰%!0ðî(Ð™ ˆ`à˜€h(pÑ˜ÿ÷1ÿlà(Ð€h¨BÑ!hFÿ÷�ÿ˜àay y	bxC xCÿ÷Õþ�(Ñ ø½…`âx£xC��bx#xCtby#yCÁ�by!y
+C¡0ðjè˜%!Â‰0ðÀí(Ð ð¾í(M à3àð¸í(Ðð¸í(Ð#M˜…`™"Jˆ‰�BÑ|(ÑÊ‰18ðªíà(Ñ8ðˆê˜Á‰"’‚0ðœíay"yC1‰6¤.ÓIçÿ÷ÿ ø½÷µ„°&)Ñ °ð½prÀÀsÀwÀ€yÀ„ÆÀÿÿÿÿ*ÐÓx”x"CÑ%
+'àBxxC@-?˜‘ÁyyðPù�ãå-¤‡Àtfçî9à(
+%p©I`p¨X(AÐ�hšB*Ð‚‰¢p
+âp�‰¢J‘BÑ-Ñ �˜!ªð<íkF™ˆ!q	
+aq	àÂ‰"q
+bqÂ‰1 ð¼ïay"yC¶�6¤m--½BÃÓ˜ÿ!j1p	
+Ap˜1
+†p6Áp0…ç!¡pápÐçpµ%�@À…@€N$ 0X(Ð�h©C�`Ñÿ÷þd$$
+,ðÓÿ÷cþp½µÿ÷qý½ÿµ�°Ñ °^çÁyyðØø¨x'	8ˆ@nI	ˆB(Ð˜$�gH¡BX*Ð�h0BÐ�‰dIˆBÐ©x;		‹@BÐ˜Ó‰(Ð™2(ð’éà™2(ð¸ìd
+,ÛÓ Äç÷µ‚°€0@k%‰/€�Èk°0� y(Ð(+Ñÿ!~1	])&Ð%(Ñ ð˜ìðzî!I~ñx"Cñpð€îà ð¸èðxÀùÑ-Ðš! #ÿ÷‡ÿš! #ÿ÷�ÿš™ ÿ÷þ-Ðš! #ÿ÷sÿš! #ÿ÷ôs°Ö‰ÀÊ+ŸFmÿ y(Ñ @8Áxý"@Áp0eçÿµ�°'
+�˜.ˆ
+>(5Ñ
+ .(€1Ñ™˜"ÿ÷­þ)ˆ@(€ Mç`x!xCÿ8j8Ñ˜(
+Ñáx x	
+C˜!ÿ÷vÿC
+à™˜"ÿ÷Žþ™	‘)ˆ(€áx¢xC66$.ÕÜ8!ç"Š@Áˆ@pG€yÀÿÿ„ÆÀµýLài`0�{ ðnèài`0�{ ðhè÷I Hp½µ$ø÷–üòI(ÑÈi`0À{(Ð(Ñà(ÑÈi`0À{(Ñà(ÑÈi`0À{(
+Ñà(ÑÈi`0À{(Ð(Ñ$Èi`0Äs„s½$øçÞJˆ9€H€zrPhH`²çµÿ÷Âÿÿ÷®ÿ½pµÕL!zd)Ñah).Ñ!ð¬ëÐM=(
+Ó (^(Ð!a^)ÐÀ�BÜü÷ïý(
+Ð (^(Ð!a^)ÐÀ�B
+Ü`hd(
+Óhhd(Ó z)z@ˆBÒÿ÷¹ÿp½ÿ÷Áÿp½¸I¹JÈh�BØ
+0È`Hh}"Ò�BØ
+0H`´Jˆh�BØ
+0I”‹ÀêOüÅˆ`pG­K±H­IØ` €d"H€
+rH`9€H€
+rH`ppGµÿ÷ìÿ¨HðÂíÀx‰‰Õ€Õ�HÀi`0A|)Ð|(Ðø÷Yüø÷,üÿ÷1ÿ½–IHx(Ð@Hp pG pG)µÑ�I}"IhÒ‘BÒŽLahd)Ó!z)
+Ò!ð"ë(Ð ˆ(Ñ`ˆ(Ð ½ ½ÿµ�°H€LÀi`0@|([Ð˜ðë|M'(Ð˜ð
+ë(€à/€˜ðë(Ð˜ðëh€ào€.r˜h`#xðî?AVXcmIàhˆBYÓ ç`Eà Cà™˜ÿ÷§ÿ(NÑeNg`fI h>ˆBÒ (^"ÒC(Ý!q^@�B
+Û (^(Ý!q^@�BÛ'pà§`ÿ÷½þ  p(z0r(ˆ0€hˆp€hhp`#à à™˜ÿ÷tÿ(Ñg`˜ÿ÷çþø÷>û(Ñÿ÷ þ  pà'pà ùç™˜ÿ÷]ÿ(Ñg`˜ÿ÷Ðþðç x°ð½pµð˜ê,À4 ‚(ð–êà‚Ø4ÿ÷kþ ð’ê(Ù(ð’êàvú[ä�À';ÿ‹(ð’ê(ð’ê"(ÿ÷Oÿ)Ipp½þµÿ7™7ÿ÷Ùþ< 4 }#N(ÑhzÀ;Õ"(ÿ÷6ÿ(0p/Ñ �8iFðnê  uà($Ñ8<0#ªiFðfê(Ð8ðdê™	kFy	(ÿ÷ÿ(0pÐ(Ñ(ÿ÷˜ÿà(Ñ!(ðPê }(Ñ þ½L4ÈÀ�Àp Nˆ¦ íçµ!ðzì  p `p x!C p½J!p!Ap!"�pÂp
+"q"Bqÿ"-2‚q
+ÂqÈ"r"Br
+
+�rÂr"s"Bs�s	
+ÁspGðµ‹°ðÈé8ðê,~Ð.|Ð%ÿ5 á5¨t( "8÷¡ðüéd ¨‚ ètùH¨ƒ@èƒ( 0!
+�pAp!
+1"

+8	‘ð&ì· €)8"ðì8y#(Ñ# @8‚x) ðœë @ �AzJR!
+C!sÁrÇ!
+@Br�zBz	Cÿ"Á2‘CAr	
+�r €0!�rÎšüŽÀ}@ð‚b!ð0ð~ë%ó Ï!.àè@�ÿ0ia0At|Ã"‰‰@t�|"C�t˜z} ðJën(Ùn ™ÿ1q1‘Èpàëà
+q˜z} ð8ë™Hq
+mˆq˜z¨BÌØºH	™h"ð²ë 0ðré % 5 w•(php ðlé (q èpá À `ÿ ‘0`` ðbé%  ðbé	 € |ß"@šRzÒÒRÒ’Ctùy8yðRé˜h-Ð5T!(ðë ¨q èq!H AU¨z@@¨r ð@é˜ÀxÀ	Ð˜@h(Ð „0ð8é  d™r L0�ð2é @0�{ï"@�s…H ÿ÷ÔþƒH0 ÿ÷Áþ  b ,0!�ð é% ÿ5A5èb˜ðé €!ì0ð¾ê "à0!B‚�‚ÁŠII‘CÁ‚ hw¨wd (bhbnIø Qÿ %i0U ðFè¸BÑ8ðúè9ðúè pr0zÃ!€€@€€0r0h!ÿ0ÿ0€…ƒ0h"ÿ0ÿ0€Áƒa[õÉø�À%æ0hR!€€
+˜3Eb– Â[!’š3h1 ðÖèxzý!@@@xr°ð½pµðNèIH"h 
+0ðÎê(ÿ÷wþ ðÀè ðÂèp½þµ €.,Ð ÿ0"0ð¶ê(À0!hÀ1
+`y
+q‚yŠqByJqÀyÈqÿ ~0A]U  0B}÷!
+@5!I]	ÉÉ
+C!ÉBuh„Fjcb zû!@)zIÉ‰Cï! r@)zÉÉ	C r(€0!Gk€1OcÇkÏckc€kˆc`ziz@@ÉÉCý!`r@iz‰ÉIC`r €1| tÕ`F@jXb ðè�(ðè™‰�àMarvell Micro AP+	è£À€Qÿç,(ðôï� 0t ðªï z¿!@Ÿ@@ r) 7"1@0ð†é&¨ 60� p�  0�A}"CAuÿ0!A0ƒAƒÿ …0S˜)@z0sÿ1 "÷1˜0ðê)ÿ1  "Ó1t0ðºï(ÿ0á0�sùœô’Àe!‚|€1
+u‚ŠÊ‚Â|Ju‚‹ÊƒÀ‹0€èÿ0ú0x±p@xðp`zï!@!É`rhh8`!L ÁU9g`7  ¹�@](ÐðÎï™uþ½˜þ!uþ½Œ!p!Ap˜!�p$!Áp°!qH!Aq`!�ql!ÁqpGðµ I	x)Ð ð½IN	x#3tJ $ 2q$)Ñqà)Ñ!qøç3t¡!q#!'à)Ñ#3trjÌ=Lì@$$¢BÐ àI)ëÝ+ÎÑ!1tqjð½E:D:�X038pµ$M(x(Ð(Ð p½ ðjïIˆBÑ$(x(Ñ,ÑHI�`«!Ab!AbAb!Ab@j-ðVïÿ-Ñ$à	HpðRï ðRïðTï p½X:X038Â�Y:CJÿ!ˆ@1#›C€ˆSCC€ˆC€pG;H!ÉCA`!`9Hh"’C`4I6H$1€	€Ùç1JSh˜B
+ÐP`.K’
;€+J€€2€(I@	€&I9ûÔ kð”ÀÈo+ˆüÕpGpµ$%ÿ÷áÿ"Hh(ÑH$8ˆâˆÝˆˆ-5CCC
CC )p½!Ýç!µÿ÷ÀÿH8ˆ@Õ ½ ½!µÿ÷³ÿ
+H8ˆ€Õ ½ ½!µÿ÷¦ÿH8ˆÀÐ ½,� ¤À!€ÿÿðå¯ðå}½ðåØøñðåS½ðå¹ðå�‡ðåEQðå$òðå#	ñðåÁ½ðå-¾ðåÙ½ðåy¼ðå<ùñðåó—ðåÉ©ðåÏ©ðå)0ðå-ðåÇ*ðåÉ*ðå++ðå/ðåÝ/ðåS0ðå!/ðå#/ðå‘uðå‹4ðåq5ðå1iðåc4ðåðå[0ðå	:ñðåe6ñðåˆúñðå�5ñðå×+ðå•,ðå�ùñðå0÷ñðåPçì–ÀEÓÛcÃðåuðå™7ñðådðå‹8ñðåo9ñðåC:ñðåÓ6ñðå%6ñðå¡5ñðå¿5ñðåá5ñðåc5ñðå6ñðågiñðåQðåA ðåS|ðåOæðå§îðåiAðåû•ðåHñðå»Eðå­Tðå�Kðå™ñðåQðå˜ðå{ïðåìòñðåñðåëBðåáðå]÷ðå×�ðås�ðå[ûðå›ðå-Uðå>ðå<üñðå‹æðåÉËðå�Ëðå›Kðå³?ðå=+ðåëóðåiTðåsiñðå¹hñðå�iñðå¯ ðåðåÔððå;ŒñðåQ‰ñðå«‰ñðå!ÒððåûhñðåÑðå;ðå•¬Ñ8}è˜Àûž£ËðåËôðåëRðåyiñðå£JðåŸïðå.ðåQ¤ðå¥Lðåý‹ðåÃððåù-ðå�ðåûŽðåó)ðå/*ðå“)ðåÕ)ðå¥™ððåÛÈððå˜ððå)ðå…*ðåM*ðåi*ðåk)ðåû+ðå±*ðå›*ðåk(ðåç+ðåhðåhðå™NððåQUððå{ñðåÁñðåqgðå¡ñðå�ñðåõfðåí]ðåI2ðå‘yðå¨úñðå)yðåu•ðå}$ñðåu%ñðå…?ðåõ@ðåUÌðåÌðåA9ñðå!9ñðåù9ñðå=6ñðåÐðå-lðåÝ>ñðå[:ñðåC<ñðåÉ=ñðå/?ñðå‘•*òäšÀÛúÀH‡?ñðåã?ñðåC@ñðåAñðåoCñðå{EñðåñEñðågFñðåó$ðå£Ððåm%ðåó
ðå?öðå»GñðåGhñðå™SñðåeMðå/Qñðå›Qñðåc1ðåy;ðåA�ðå�ðå­�ðåSgñðåñ�ðå9‘ðåo‘ðåóŽðåÙðå•gñðåßgñðåµ‘ðå•ðå'ðåM’ðåŸñðå]õðåÕõðåÐðå;‹ðå·�ðå‘ðå—�ðåÛ�ðå1êððå™$ðå·$ðå�ðå=9ðå
ðå�Wðå‹VðåÝOðåõOðåeðåÛ3ðåWúðå#èðåÿðåëøððå?üððåsÆððå±d"‹_ÿàœÀŽÃðåyUðå�BðåoMðåGŽðåÕbðåûñðåmÏðåÏðå³JñðåS¼ðåa¼ðåÇ.ðåk.ðå‹Dðå%Bðå%ÏðåyIñðå[ÆððåÃGñðåOÇððåÐùñðåIñðåI‹ðå•Vñðå;ŽðåAŽðåÙ£ðå)Žðå3¥ðåÛ¤ðå×Žðå©�ðåMEðåU’ðåáRñðå­·ðåµ¹ðå‰¸ðåQ¸ðå›ðåÓñðåå	ñðå%’ðåÓ
ðå™zðåSðå=¹ðåCºðå±Wñðå-Yñðå
Xñðå“>ðåOZñðå—ZñðåÃCðåi?ðåñgðåÕJðåK‹ñðå—ðåQMñðåKðå4ðåð0è˜ÜžÀÄBUo­ãðåi�ðåSÆððåñðåËRñðå%Fðåq˜ðåßAðåËÍðåðåLðå³�ðåykñðå)lñðåjñðåUñðåañðå1?ðåÛðåÁjñðåsÛðå'kñðå­ðå[kñðå…Wñðåc¸ðåTñðå‰Tñðåo‹ðå­‹ðå§Nñðåg’ðå�PñðåíNñðåWñðåyHðåÛ[ñðåµ€ñðå­¾ðåH˜ðå.ðåeUñðå™.ðå=ðåCUñðåQŒðå)[ñðåéìðåíCðåDðåC�ðå[zðå‹<ðå1EðåÍ<ðåUñðåYVñðå)1ðå?Xðå‘Vðå#TðåGŽðå™eðåM�oTd[Ø ÀTY($ðåMðå{Œðå¯añðåõ‹ñðå©Œñðå4ðå/4ðå=4ðåMbñðå—^ñðå©^ñðåëìðåCíðåEæðå¿CðåéïðåYðåaFðåVðåƒ�ñðåkÇððå»ÇððåyÇððå'Èððåa‰ðåÅ>ðåÅJðåAjðå±lðå[kðåmRñðå{1ðåðåEòðåÃõðåqôðå¥ôðå‹ôðåEôðå=ôðåG…ñðåm	ðåÕ	ðå;õðåÕƒñðå7”ðå	“ðå!
+ðåõ.ðåÇððå-™ñðåó,ðå!’ðå_™ñðå[˜ðå–ðå³Wðåi™ñðåqKðåûMðå}µðå©Ãðåc˜ðå·í­]Ô¢Àt=K§’ðå;ªðå#ñðå7»ððå¥ºððå¹ºððåçºððå%»ðPoš	 |ÊÀ€�Ã.À£
DAá
h1á$$AáE’ÿÜÃœÏÜq R@! %‚€0	(#€/,ÿ!�ÿR"RZE@a (@PjmŽ iÀ]4c*áwãÀ“
+a);¼ð0	Š6
R2a
$u�4 å‚`ü 	6äxöØýÂ@S;€þu4ÂzÂ	Â
+u,ÿu-ÿu0Éu1ÿu.Yu/ÿu*u+u2€ÂÂÂÂÂu&�ð²àûD ðuŽu†uˆu‰�ðtð"@ðå°T0`€�ð±äð€ñåñû$Ü@ùë$	ƒÀàë$'P"û‚Ÿ h½å.‹Ì—Åâÿ7ƒ¾
+Å»(©»8Ve.	Ð¤À¹IHéÿzP			
+
+
 7
+uÞuäuÛuãuæuÜuÚuÝuÙ�ðàûS » €uÙ02�ð{0»¬Tß´±þ¼ ÒuòÿuôÒ¯�ðOÀ»@€
�ðUàûuñd 
+UëðuñuÙoP
+�üàÀEÐuñ‰ »uÙŒa- €»€CÙ �ðª"üt\K`uÚ·)P	Ú³uÝ�ÿØL�ƒuñŸuñ#à�ÿ!€!2!õTŸÂ¹"@ˆ»3�ü3wÐÒ u#u$u%u·uUT
Q’·ÐÂ ÂŽÂ�úPñ�ð[¶ÀÒÂUÝ`3�ú$U�¡u#u$U‚SU¢¡U‚U`ÒÂuÜuÞuäÒÃuã±»\bÊ\�¢u#u$?±‚V\¢¢\&ADóß u'uéuê…ëí…ìîà uñÒ-$	t÷%'@SÒ£O4ZÐ’Â£0;Â�ðK¡T»(�þ³mƒÂ‚t¢–r‚Ptr'[%‚9£EAÁÉö4ýe_ÂÃ50Ü[?Ì¦À4õŒ¡2TÜÂÂÂ˜¥fÄ¤u# Â‚TT¢¤TT	�ðA%c… 	WÒ¥Ò°�ðråõð�ÿù0ª‚0àû»P.
+,t+ð+0«‚ÐÃê›P‹Ò
+€ràüD
+ðÂ
+€Â
+Ò	 00
+N¼B28
+1BÂ,B#‹–5üaDuñ
+Â°å>¥5�1Dƒ`8mIa­K1*~A…¡Ì³u#€d†qM¦³MVMGh’UTB¦Q\�ð?0u#u¸_~mÃ/€‹ñƒÂ¦v�ððöW>
W‚"Ë=/�ËPÆu#Ë 	Auñ�ñœË2áË¢ÆË
ÂƒÂ�%Pñxàû0àuÜuæß.@F<Pû# ä 	uÞÒÀu$[,'u& ™AudÈ®›NcÀbbÊäuÀArÉAò ArË]>6R«-î«_®š�P€\Kp@»õÉ"à)ðCÜ~,`Cæíæ
+`\uè[$'u&¸QèbŽÌcèfr’Âåq>r�"b§‰9úÈ¨ÀŠ¸ô	q>r“ZuèAr�Aò Ar”@>r‘"ò€>‚•}¥ÀÆ:o.«6æ~'Ü0ÈãZ^G–õuñuÜnp&upupÞP€uÛ8ž818%èZÁ„r¾IcÜn„â!„4;!‡^GÌ†Eçsä
+%"ÃÜ~TQ)®AµÂðm |CÜC Yõ%£õÿ£õ	õEq|Ò¡Â¡�ÿLÏ	
+0ü
¶Šäb	–Cj�ñ
+0âuÜ5_Ü1*
+]Î\	juè�ÿöLLÒ²Â²�ñµ
 àü»
+¼Ò·€€ëpìp
ìð%a1ýt]û#22"“2‚ÿ<CàýS@½Â
·!¦ý0ãd·äÄ<S½
uÀ0¦ ýtuÉ§uÉuƒÀ §"2ËÙ2"Ë2�}5-ä'"B“”
½HÒ£…0‚…1ƒ6)tU�ü¼åí`í€#åî`îuí€¼tá%í@í€
+î@P<ñÄªÀªÜ—ŠÂ£S½5Ò¢%~ð·MMðVMd
+¼?‡»,
+ðVìðÂ¢Sä" –J
+Â�ñˆ S|�ñàüS€¼€{p»7t[ü¼-uÛÏ.A =”üýt€]Líã4t444"4NqQ4p4!rÒ]J
æ#"‘p¼Ð!¼à-¼0€9¼
+
E¼P€Q¼î
 ]¼p€i:!qnd
+`€puÛ§
`€_uÛÎ0€NuÛR|=uÛ€uÜ ¨
+,€,uÛ@þ=Ÿ!!

1Ý<guæ6,uå;oýD
!¹”t|\ûS)µÜ{p�˜
…

+“
?uå�MvE‘ý~E]MÁ--Ò,äÒ¨uñ u‡Â¨±m®ÿ/ðLM|
+�þœ<=<ƒ-b,"ÀÐuÐÂ¯Û@ÒÒ¯ÐÐ2ÀàÀ‚ÀƒrŽMOÛ0‡uñS€HÒþ¢€rƒPcuñ¶>Sô,Tt„
!ñÈt?2É2Ê2Ë2Ž2�2�$2‘*2F.‹¿À¬Àg¨”Ä’62“62”<•0 S€Ài,	‚r�@a~
<úS
+ äº $ÿ’¢r�PÂaúDð‹0È	… SÈÉ SÈ† S€¿ƒ„@’0!ó4Ï€68-…
+=wL
ût€[B
+ä¢3ûJŸ
+$ºõÂ¨ô<ÐƒÐ‚Ðà2øÿû� 'Ò±0•ý…ó‚Â±"ª‚«ƒC‰ŠŠ‹ŒÒŒ0�ýÂŒÂ�"….‚…/ƒ)3 Â²0‘ª2{åéÃšõéåê›õê€0�	ê%éõéë5êLt$ÿ"]å2Ãõ2äª1@ÄÊÄTjÊTÊjÊû\,ÀÀNd0
�êµ*ëµ+Ò—J¬&}ì*úí;û€êµ+¢, -êÃœúë�û u3å3%3üä¢�3ý,õ3S3ŠéëÄTðÅéÄÅéeéÅéPeéõê�	3´t€  ’
¢
rä3õ‚¬|u,ÿ%ý	€ö®¯0A/ÝëpŽ‚�ƒàøå#Rèµ#ED0íµ$@
+å&-ý€íµ%€9íÃ•&ýì,øä¢3(Tü´ä3øŠ‚‹ƒ‚vä¼®À„¦ïíðä¸õøä¼
+ÓHpÃ’¢r’jä��=$ÀÀÀ7$Ð; ®¯œ?—iA  ÀÀ$`Ð(º!0º º0¢ºcº$	¬­å'`<7Œ‚�ƒàþ} îµ#ý &.þM@ð€oAå&>p&'€À<ü<0ìµ#
+'ü@Cìðh­hòDh0®¯[$øå&(ø€ð€™Aqpò¸p@¬­/#ú]BêtÿC‰Š‹‹�Ò¯Ò«ÒŽ"œÚÿÿÿÿÿÿÿÿÿ
AÌ -L  Nè ÿ´!Uu3u¥¥±¹u{	¥ˆ¥Ø	wÜw½§D�wèw)§Ø§ìin^™"Hiôi”™lvY7/‰0øY
0ò‰Å!Ú0(URHQ08HwB HH™áSHE	#O 0		  0f„ @ˆl€Q¹¸°ÀS»)‹
*PªX»`Ì|"
+?H=H5-%H	H
+
"I;91)!	´¼ÄüÔdä(#!l@XÇÀTPRL,($ RðÆÀìèäàÜØÔ°¬¨¤ œ˜” �ÆX#,™âñî#@ŸßC“àR•œ«äñ¤!0!CSßCàR‘·ã- %-{$†@ 1†@
+	<M% ú	†$Z$ƒ@�BB‚B"ƒ<â$!<1BB‚B"ƒñ$MarvelÒ0 Wi!es D
+vc"06BLANJConfbgufatn!.6I4tŽr:2a†#*vºlLd¶SJrL@ÌA´²ÀL$bW\nZA2d¶
+x>ÉÀBR‚¤Ú0'®°²´®¯±³	¶
+º¾¿­‡OÛŒ
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/gpl-2.0.txt linux-3.0.82x/drivers/net/wireless/wm8782/gpl-2.0.txt
--- linux-3.0.82/drivers/net/wireless/wm8782/gpl-2.0.txt	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/gpl-2.0.txt	2017-09-23 03:42:50.090674844 +0800
@@ -0,0 +1,339 @@
+              GNU GENERAL PUBLIC LICENSE
+ 		       Version 2, June 1991
+ 
+  Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
+  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+  Everyone is permitted to copy and distribute verbatim copies
+  of this license document, but changing it is not allowed.
+ 
+ 			    Preamble
+ 
+   The licenses for most software are designed to take away your
+ freedom to share and change it.  By contrast, the GNU General Public
+ License is intended to guarantee your freedom to share and change free
+ software--to make sure the software is free for all its users.  This
+ General Public License applies to most of the Free Software
+ Foundation's software and to any other program whose authors commit to
+ using it.  (Some other Free Software Foundation software is covered by
+ the GNU Lesser General Public License instead.)  You can apply it to
+ your programs, too.
+ 
+   When we speak of free software, we are referring to freedom, not
+ price.  Our General Public Licenses are designed to make sure that you
+ have the freedom to distribute copies of free software (and charge for
+ this service if you wish), that you receive source code or can get it
+ if you want it, that you can change the software or use pieces of it
+ in new free programs; and that you know you can do these things.
+ 
+   To protect your rights, we need to make restrictions that forbid
+ anyone to deny you these rights or to ask you to surrender the rights.
+ These restrictions translate to certain responsibilities for you if you
+ distribute copies of the software, or if you modify it.
+ 
+   For example, if you distribute copies of such a program, whether
+ gratis or for a fee, you must give the recipients all the rights that
+ you have.  You must make sure that they, too, receive or can get the
+ source code.  And you must show them these terms so they know their
+ rights.
+ 
+   We protect your rights with two steps: (1) copyright the software, and
+ (2) offer you this license which gives you legal permission to copy,
+ distribute and/or modify the software.
+ 
+   Also, for each author's protection and ours, we want to make certain
+ that everyone understands that there is no warranty for this free
+ software.  If the software is modified by someone else and passed on, we
+ want its recipients to know that what they have is not the original, so
+ that any problems introduced by others will not reflect on the original
+ authors' reputations.
+ 
+   Finally, any free program is threatened constantly by software
+ patents.  We wish to avoid the danger that redistributors of a free
+ program will individually obtain patent licenses, in effect making the
+ program proprietary.  To prevent this, we have made it clear that any
+ patent must be licensed for everyone's free use or not licensed at all.
+ 
+   The precise terms and conditions for copying, distribution and
+ modification follow.
+ 
+ 		    GNU GENERAL PUBLIC LICENSE
+    TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+ 
+   0. This License applies to any program or other work which contains
+ a notice placed by the copyright holder saying it may be distributed
+ under the terms of this General Public License.  The "Program", below,
+ refers to any such program or work, and a "work based on the Program"
+ means either the Program or any derivative work under copyright law:
+ that is to say, a work containing the Program or a portion of it,
+ either verbatim or with modifications and/or translated into another
+ language.  (Hereinafter, translation is included without limitation in
+ the term "modification".)  Each licensee is addressed as "you".
+ 
+ Activities other than copying, distribution and modification are not
+ covered by this License; they are outside its scope.  The act of
+ running the Program is not restricted, and the output from the Program
+ is covered only if its contents constitute a work based on the
+ Program (independent of having been made by running the Program).
+ Whether that is true depends on what the Program does.
+ 
+   1. You may copy and distribute verbatim copies of the Program's
+ source code as you receive it, in any medium, provided that you
+ conspicuously and appropriately publish on each copy an appropriate
+ copyright notice and disclaimer of warranty; keep intact all the
+ notices that refer to this License and to the absence of any warranty;
+ and give any other recipients of the Program a copy of this License
+ along with the Program.
+ 
+ You may charge a fee for the physical act of transferring a copy, and
+ you may at your option offer warranty protection in exchange for a fee.
+ 
+   2. You may modify your copy or copies of the Program or any portion
+ of it, thus forming a work based on the Program, and copy and
+ distribute such modifications or work under the terms of Section 1
+ above, provided that you also meet all of these conditions:
+ 
+     a) You must cause the modified files to carry prominent notices
+     stating that you changed the files and the date of any change.
+ 
+     b) You must cause any work that you distribute or publish, that in
+     whole or in part contains or is derived from the Program or any
+     part thereof, to be licensed as a whole at no charge to all third
+     parties under the terms of this License.
+ 
+     c) If the modified program normally reads commands interactively
+     when run, you must cause it, when started running for such
+     interactive use in the most ordinary way, to print or display an
+     announcement including an appropriate copyright notice and a
+     notice that there is no warranty (or else, saying that you provide
+     a warranty) and that users may redistribute the program under
+     these conditions, and telling the user how to view a copy of this
+     License.  (Exception: if the Program itself is interactive but
+     does not normally print such an announcement, your work based on
+     the Program is not required to print an announcement.)
+ 
+ These requirements apply to the modified work as a whole.  If
+ identifiable sections of that work are not derived from the Program,
+ and can be reasonably considered independent and separate works in
+ themselves, then this License, and its terms, do not apply to those
+ sections when you distribute them as separate works.  But when you
+ distribute the same sections as part of a whole which is a work based
+ on the Program, the distribution of the whole must be on the terms of
+ this License, whose permissions for other licensees extend to the
+ entire whole, and thus to each and every part regardless of who wrote it.
+ 
+ Thus, it is not the intent of this section to claim rights or contest
+ your rights to work written entirely by you; rather, the intent is to
+ exercise the right to control the distribution of derivative or
+ collective works based on the Program.
+ 
+ In addition, mere aggregation of another work not based on the Program
+ with the Program (or with a work based on the Program) on a volume of
+ a storage or distribution medium does not bring the other work under
+ the scope of this License.
+ 
+   3. You may copy and distribute the Program (or a work based on it,
+ under Section 2) in object code or executable form under the terms of
+ Sections 1 and 2 above provided that you also do one of the following:
+ 
+     a) Accompany it with the complete corresponding machine-readable
+     source code, which must be distributed under the terms of Sections
+     1 and 2 above on a medium customarily used for software interchange; or,
+ 
+     b) Accompany it with a written offer, valid for at least three
+     years, to give any third party, for a charge no more than your
+     cost of physically performing source distribution, a complete
+     machine-readable copy of the corresponding source code, to be
+     distributed under the terms of Sections 1 and 2 above on a medium
+     customarily used for software interchange; or,
+ 
+     c) Accompany it with the information you received as to the offer
+     to distribute corresponding source code.  (This alternative is
+     allowed only for noncommercial distribution and only if you
+     received the program in object code or executable form with such
+     an offer, in accord with Subsection b above.)
+ 
+ The source code for a work means the preferred form of the work for
+ making modifications to it.  For an executable work, complete source
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+ operating system on which the executable runs, unless that component
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+ 
+ If distribution of executable or object code is made by offering
+ access to copy from a designated place, then offering equivalent
+ access to copy the source code from the same place counts as
+ distribution of the source code, even though third parties are not
+ compelled to copy the source along with the object code.
+ 
+   4. You may not copy, modify, sublicense, or distribute the Program
+ except as expressly provided under this License.  Any attempt
+ otherwise to copy, modify, sublicense or distribute the Program is
+ void, and will automatically terminate your rights under this License.
+ However, parties who have received copies, or rights, from you under
+ this License will not have their licenses terminated so long as such
+ parties remain in full compliance.
+ 
+   5. You are not required to accept this License, since you have not
+ signed it.  However, nothing else grants you permission to modify or
+ distribute the Program or its derivative works.  These actions are
+ prohibited by law if you do not accept this License.  Therefore, by
+ modifying or distributing the Program (or any work based on the
+ Program), you indicate your acceptance of this License to do so, and
+ all its terms and conditions for copying, distributing or modifying
+ the Program or works based on it.
+ 
+   6. Each time you redistribute the Program (or any work based on the
+ Program), the recipient automatically receives a license from the
+ original licensor to copy, distribute or modify the Program subject to
+ these terms and conditions.  You may not impose any further
+ restrictions on the recipients' exercise of the rights granted herein.
+ You are not responsible for enforcing compliance by third parties to
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+ 
+   7. If, as a consequence of a court judgment or allegation of patent
+ infringement or for any other reason (not limited to patent issues),
+ conditions are imposed on you (whether by court order, agreement or
+ otherwise) that contradict the conditions of this License, they do not
+ excuse you from the conditions of this License.  If you cannot
+ distribute so as to satisfy simultaneously your obligations under this
+ License and any other pertinent obligations, then as a consequence you
+ may not distribute the Program at all.  For example, if a patent
+ license would not permit royalty-free redistribution of the Program by
+ all those who receive copies directly or indirectly through you, then
+ the only way you could satisfy both it and this License would be to
+ refrain entirely from distribution of the Program.
+ 
+ If any portion of this section is held invalid or unenforceable under
+ any particular circumstance, the balance of the section is intended to
+ apply and the section as a whole is intended to apply in other
+ circumstances.
+ 
+ It is not the purpose of this section to induce you to infringe any
+ patents or other property right claims or to contest validity of any
+ such claims; this section has the sole purpose of protecting the
+ integrity of the free software distribution system, which is
+ implemented by public license practices.  Many people have made
+ generous contributions to the wide range of software distributed
+ through that system in reliance on consistent application of that
+ system; it is up to the author/donor to decide if he or she is willing
+ to distribute software through any other system and a licensee cannot
+ impose that choice.
+ 
+ This section is intended to make thoroughly clear what is believed to
+ be a consequence of the rest of this License.
+ 
+   8. If the distribution and/or use of the Program is restricted in
+ certain countries either by patents or by copyrighted interfaces, the
+ original copyright holder who places the Program under this License
+ may add an explicit geographical distribution limitation excluding
+ those countries, so that distribution is permitted only in or among
+ countries not thus excluded.  In such case, this License incorporates
+ the limitation as if written in the body of this License.
+ 
+   9. The Free Software Foundation may publish revised and/or new versions
+ of the General Public License from time to time.  Such new versions will
+ be similar in spirit to the present version, but may differ in detail to
+ address new problems or concerns.
+ 
+ Each version is given a distinguishing version number.  If the Program
+ specifies a version number of this License which applies to it and "any
+ later version", you have the option of following the terms and conditions
+ either of that version or of any later version published by the Free
+ Software Foundation.  If the Program does not specify a version number of
+ this License, you may choose any version ever published by the Free Software
+ Foundation.
+ 
+   10. If you wish to incorporate parts of the Program into other free
+ programs whose distribution conditions are different, write to the author
+ to ask for permission.  For software which is copyrighted by the Free
+ Software Foundation, write to the Free Software Foundation; we sometimes
+ make exceptions for this.  Our decision will be guided by the two goals
+ of preserving the free status of all derivatives of our free software and
+ of promoting the sharing and reuse of software generally.
+ 
+ 			    NO WARRANTY
+ 
+   11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+ FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW.  EXCEPT WHEN
+ OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
+ PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
+ OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE ENTIRE RISK AS
+ TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU.  SHOULD THE
+ PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
+ REPAIR OR CORRECTION.
+ 
+   12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+ WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
+ REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
+ INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
+ OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
+ TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
+ YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+ PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGES.
+ 
+ 		     END OF TERMS AND CONDITIONS
+ 
+ 	    How to Apply These Terms to Your New Programs
+ 
+   If you develop a new program, and you want it to be of the greatest
+ possible use to the public, the best way to achieve this is to make it
+ free software which everyone can redistribute and change under these terms.
+ 
+   To do so, attach the following notices to the program.  It is safest
+ to attach them to the start of each source file to most effectively
+ convey the exclusion of warranty; and each file should have at least
+ the "copyright" line and a pointer to where the full notice is found.
+ 
+     <one line to give the program's name and a brief idea of what it does.>
+     Copyright (C) <year>  <name of author>
+ 
+     This program is free software; you can redistribute it and/or modify
+     it under the terms of the GNU General Public License as published by
+     the Free Software Foundation; either version 2 of the License, or
+     (at your option) any later version.
+ 
+     This program is distributed in the hope that it will be useful,
+     but WITHOUT ANY WARRANTY; without even the implied warranty of
+     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+     GNU General Public License for more details.
+ 
+     You should have received a copy of the GNU General Public License along
+     with this program; if not, write to the Free Software Foundation, Inc.,
+     51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ 
+ Also add information on how to contact you by electronic and paper mail.
+ 
+ If the program is interactive, make it output a short notice like this
+ when it starts in an interactive mode:
+ 
+     Gnomovision version 69, Copyright (C) year name of author
+     Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+     This is free software, and you are welcome to redistribute it
+     under certain conditions; type `show c' for details.
+ 
+ The hypothetical commands `show w' and `show c' should show the appropriate
+ parts of the General Public License.  Of course, the commands you use may
+ be called something other than `show w' and `show c'; they could even be
+ mouse-clicks or menu items--whatever suits your program.
+ 
+ You should also get your employer (if you work as a programmer) or your
+ school, if any, to sign a "copyright disclaimer" for the program, if
+ necessary.  Here is a sample; alter the names:
+ 
+   Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+   `Gnomovision' (which makes passes at compilers) written by James Hacker.
+ 
+   <signature of Ty Coon>, 1 April 1989
+   Ty Coon, President of Vice
+ 
+ This General Public License does not permit incorporating your program into
+ proprietary programs.  If your program is a subroutine library, you may
+ consider it more useful to permit linking proprietary applications with the
+ library.  If this is what you want to do, use the GNU Lesser General
+ Public License instead of this License.
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/Kconfig linux-3.0.82x/drivers/net/wireless/wm8782/Kconfig
--- linux-3.0.82/drivers/net/wireless/wm8782/Kconfig	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/Kconfig	2017-09-23 03:42:50.090674844 +0800
@@ -0,0 +1,7 @@
+config WM8782_LS1X
+	tristate "loongson-1x of WM8782 Wireless module support"
+	depends on MAC80211
+	select CRC_CCITT
+	select WIRELESS_EXT
+	select WEXT_PRIV
+	select WEXT_SPY
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/Makefile linux-3.0.82x/drivers/net/wireless/wm8782/Makefile
--- linux-3.0.82/drivers/net/wireless/wm8782/Makefile	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/Makefile	2017-09-23 03:42:50.090674844 +0800
@@ -0,0 +1,272 @@
+# File: Makefile
+#
+# Copyright (C) 2008-2011, Marvell International Ltd. 
+#
+# This software file (the "File") is distributed by Marvell International 
+# Ltd. under the terms of the GNU General Public License Version 2, June 1991 
+# (the "License").  You may use, redistribute and/or modify this File in 
+# accordance with the terms and conditions of the License, a copy of which 
+# is available by writing to the Free Software Foundation, Inc.,
+# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
+# worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
+#
+# A copy of the GPL is available in file gpl-2.0.txt accompanying in this 
+# deliverables.
+#
+# THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 
+# IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 
+# ARE EXPRESSLY DISCLAIMED.  The License provides additional details about 
+# this warranty disclaimer.
+
+#CROSS_COMPILE=	mipsel-linux-
+#CC=		$(CROSS_COMPILE)gcc
+#LD=		$(CROSS_COMPILE)ld
+#BACKUP=		/root/backup
+#YMD=		`date +%Y%m%d%H%M`
+
+#############################################################################
+# Configuration Options
+#############################################################################
+
+# Debug Option
+# DEBUG LEVEL n/1/2:
+# n: NO DEBUG
+# 1: Only PRINTM(MMSG,...), PRINTM(MFATAL,...), ...
+# 2: All PRINTM()
+CONFIG_DEBUG=1
+
+# Proc debug file
+CONFIG_PROC_DEBUG=y
+
+# Enable STA mode support
+CONFIG_STA_SUPPORT=y
+
+# Enable uAP mode support
+CONFIG_UAP_SUPPORT=y
+
+# Enable WFD support
+CONFIG_WFD_SUPPORT=y
+
+# Re-association in driver
+CONFIG_REASSOCIATION=y
+
+# Manufacturing firmware support
+CONFIG_MFG_CMD_SUPPORT=y
+
+# Big-endian platform
+CONFIG_BIG_ENDIAN=n
+
+
+
+
+
+
+
+#############################################################################
+# Select Platform Tools
+#############################################################################
+
+#MODEXT = ko
+#EXTRA_CFLAGS += -I$(M)/mlan
+#EXTRA_CFLAGS += -DLINUX
+
+#LD += -S
+#BINDIR = ../bin_usb8782
+
+#ifeq ($(CROSS_COMPILE),)
+#KERNELVERSION_X86 := 	$(shell uname -r)
+#KERNELDIR=/lib/modules/$(KERNELVERSION_X86)/build
+#INSTALLDIR=/lib/modules/$(KERNELVERSION_X86)/kernel/drivers/usb
+#else
+#KERNELDIR=/home/22/1b-linux-3.0
+#INSTALLDIR=$(BINDIR)
+#endif
+
+#############################################################################
+# Compiler Flags
+#############################################################################
+
+#	EXTRA_CFLAGS += -I$(KERNELDIR)/include
+#ifeq ($(CROSS_COMPILE),)
+#	EXTRA_CFLAGS += -DFPNUM='"62"'
+#endif
+
+obj-$(CONFIG_WM8782_LS1X):=mlan.o usb8xxx.o
+ifeq ($(CONFIG_DEBUG),1)
+	EXTRA_CFLAGS += -DDEBUG_LEVEL1
+endif
+
+ifeq ($(CONFIG_DEBUG),2)
+	EXTRA_CFLAGS += -DDEBUG_LEVEL1
+	EXTRA_CFLAGS += -DDEBUG_LEVEL2
+	DBG=	-dbg
+endif
+
+ifeq ($(CONFIG_PROC_DEBUG),y)
+	EXTRA_CFLAGS += -DPROC_DEBUG
+	export CONFIG_PROC_DEBUG
+endif
+
+ifeq ($(CONFIG_STA_SUPPORT),y)
+	EXTRA_CFLAGS += -DSTA_SUPPORT
+ifeq ($(CONFIG_REASSOCIATION),y)
+	EXTRA_CFLAGS += -DREASSOCIATION
+endif
+endif
+
+ifeq ($(CONFIG_UAP_SUPPORT),y)
+	EXTRA_CFLAGS += -DUAP_SUPPORT
+endif
+
+ifeq ($(CONFIG_WFD_SUPPORT),y)
+	EXTRA_CFLAGS += -DWFD_SUPPORT
+endif
+
+ifeq ($(CONFIG_MFG_CMD_SUPPORT),y)
+	EXTRA_CFLAGS += -DMFG_CMD_SUPPORT
+endif
+
+ifeq ($(CONFIG_BIG_ENDIAN),y)
+	EXTRA_CFLAGS += -DBIG_ENDIAN_SUPPORT
+endif
+
+
+
+
+
+#############################################################################
+# Make Targets
+#############################################################################
+
+#ifneq ($(KERNELRELEASE),)
+
+MOALOBJS =	mlinux/moal_main.o \
+		mlinux/moal_ioctl.o \
+		mlinux/moal_shim.o
+
+MLANOBJS =	mlan/mlan_shim.o mlan/mlan_init.o \
+		mlan/mlan_txrx.o \
+		mlan/mlan_cmdevt.o mlan/mlan_misc.o \
+		mlan/mlan_cfp.o \
+		mlan/mlan_module.o
+
+MLANOBJS += mlan/mlan_wmm.o
+MLANOBJS += mlan/mlan_usb.o
+MLANOBJS += mlan/mlan_11n_aggr.o
+MLANOBJS += mlan/mlan_11n_rxreorder.o
+MLANOBJS += mlan/mlan_11n.o
+MLANOBJS += mlan/mlan_11d.o
+MLANOBJS += mlan/mlan_11h.o
+ifeq ($(CONFIG_STA_SUPPORT),y)
+MLANOBJS += mlan/mlan_meas.o
+MLANOBJS += mlan/mlan_scan.o \
+			mlan/mlan_sta_ioctl.o \
+			mlan/mlan_sta_rx.o \
+			mlan/mlan_sta_tx.o \
+			mlan/mlan_sta_event.o \
+			mlan/mlan_sta_cmd.o \
+			mlan/mlan_sta_cmdresp.o \
+			mlan/mlan_join.o
+MOALOBJS += mlinux/moal_priv.o \
+            mlinux/moal_wext.o
+endif
+ifeq ($(CONFIG_UAP_SUPPORT),y)
+MLANOBJS += mlan/mlan_uap_ioctl.o
+MLANOBJS += mlan/mlan_uap_cmdevent.o
+MLANOBJS += mlan/mlan_uap_txrx.o
+MOALOBJS += mlinux/moal_uap.o
+MOALOBJS += mlinux/moal_uap_priv.o
+MOALOBJS += mlinux/moal_uap_wext.o
+endif
+
+ifdef CONFIG_PROC_FS
+MOALOBJS += mlinux/moal_proc.o
+ifeq ($(CONFIG_PROC_DEBUG),y)
+MOALOBJS += mlinux/moal_debug.o
+endif
+endif
+
+#obj-m := mlan.o
+mlan-objs := $(MLANOBJS)
+MOALOBJS += mlinux/moal_usb.o
+#obj-m += usb8xxx.o
+usb8xxx-objs := $(MOALOBJS)
+
+# Otherwise we were called directly from the command line; invoke the kernel build system.
+#else
+
+#default:
+#	$(MAKE) -C $(KERNELDIR) M=$(PWD) modules
+
+#endif
+
+###############################################################
+
+#export		CC LD EXTRA_CFLAGS KERNELDIR
+
+#ifeq ($(CONFIG_STA_SUPPORT),y)
+#ifeq ($(CONFIG_UAP_SUPPORT),y)
+#.PHONY: mapp/mlanconfig mapp/mlan2040coex mapp/mlanevent mapp/uaputl clean distclean
+#else
+#.PHONY: mapp/mlanconfig mapp/mlanevent mapp/mlan2040coex clean distclean
+#endif
+#else
+#ifeq ($(CONFIG_UAP_SUPPORT),y)
+#.PHONY: mapp/mlanevent mapp/uaputl clean distclean
+#endif
+#endif
+#	@echo "Finished Making Marvell Wlan Linux Driver"
+
+#ifeq ($(CONFIG_STA_SUPPORT),y)
+#mapp/mlanconfig:
+#	$(MAKE) -C $@
+#mapp/mlan2040coex:
+#	$(MAKE) -C $@
+#endif
+#ifeq ($(CONFIG_UAP_SUPPORT),y)
+#mapp/uaputl:
+#	$(MAKE) -C $@
+#endif
+#ifeq ($(CONFIG_WFD_SUPPORT),y)
+#mapp/wifidirectutl:
+#	$(MAKE) -C $@
+#endif
+#mapp/mlanevent:
+#	$(MAKE) -C $@
+#
+#echo:
+#
+#build:		echo default
+#
+#	@if [ ! -d $(BINDIR) ]; then \
+#		mkdir $(BINDIR); \
+#	fi 
+#	cp -f mlan.$(MODEXT) $(BINDIR)/mlan$(DBG).$(MODEXT)
+#	mv usb8xxx.$(MODEXT) $(BINDIR)/usb8782$(DBG).$(MODEXT)
+#
+#ifeq ($(CONFIG_STA_SUPPORT),y)
+#	cp -f README $(BINDIR)
+#	$(MAKE) -C mapp/mlanconfig $@ INSTALLDIR=$(BINDIR)
+#	$(MAKE) -C mapp/mlan2040coex $@ INSTALLDIR=$(BINDIR)
+#endif
+#ifeq ($(CONFIG_UAP_SUPPORT),y)
+#	cp -f README_UAP $(BINDIR)
+#	$(MAKE) -C mapp/uaputl $@ INSTALLDIR=$(BINDIR)
+#endif
+#ifeq ($(CONFIG_WFD_SUPPORT),y)
+#	cp -f README_WIFIDIRECT $(BINDIR)
+#	cp -rpf script/wifidirect $(BINDIR)
+#	$(MAKE) -C mapp/wifidirectutl $@ INSTALLDIR=$(BINDIR)
+#endif
+#	$(MAKE) -C mapp/mlanevent $@ INSTALLDIR=$(BINDIR)
+#
+#
+#install: default
+#
+#	cp -f mlan.$(MODEXT) $(INSTALLDIR)/mlan$(DBG).$(MODEXT)
+#	cp -f usb8xxx.$(MODEXT) $(INSTALLDIR)/usb8782$(DBG).$(MODEXT)
+#	echo $(INSTALLDIR)
+#	echo "usb8782 Driver Installed"
+
+
+# End of file
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_11d.c linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_11d.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_11d.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_11d.c	2017-09-23 03:42:50.090674844 +0800
@@ -0,0 +1,1477 @@
+/** @file mlan_11d.c
+ *
+ *  @brief This file contains functions for 802.11D.
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+/********************************************************
+Change log:
+    10/21/2008: initial version
+********************************************************/
+
+#include "mlan.h"
+#include "mlan_join.h"
+#include "mlan_util.h"
+#include "mlan_fw.h"
+#include "mlan_main.h"
+#include "mlan_11h.h"
+
+/********************************************************
+                Local Variables
+********************************************************/
+
+#if defined(STA_SUPPORT)
+/** Region code mapping */
+typedef struct _region_code_mapping
+{
+    /** Region */
+    t_u8 region[COUNTRY_CODE_LEN];
+    /** Code */
+    t_u8 code;
+} region_code_mapping_t;
+
+/** Region code mapping table */
+static region_code_mapping_t region_code_mapping[] = {
+    {"US ", 0x10},              /* US FCC */
+    {"CA ", 0x20},              /* IC Canada */
+    {"SG ", 0x10},              /* Singapore */
+    {"EU ", 0x30},              /* ETSI */
+    {"AU ", 0x30},              /* Australia */
+    {"KR ", 0x30},              /* Republic Of Korea */
+    {"FR ", 0x32},              /* France */
+    {"JP ", 0x40},              /* Japan */
+    {"JP ", 0x41},              /* Japan */
+    {"CN ", 0x50},              /* China */
+    {"JP ", 0xFF},              /* Japan special */
+};
+#endif
+
+#ifdef STA_SUPPORT
+/** Default Tx power */
+#define TX_PWR_DEFAULT  10
+
+/** Universal region code */
+#define UNIVERSAL_REGION_CODE   0xff
+
+/* Following two structures define the supported channels */
+/** Channels for 802.11b/g */
+static chan_freq_power_t channel_freq_power_UN_BG[] = {
+    {1, 2412, TX_PWR_DEFAULT},
+    {2, 2417, TX_PWR_DEFAULT},
+    {3, 2422, TX_PWR_DEFAULT},
+    {4, 2427, TX_PWR_DEFAULT},
+    {5, 2432, TX_PWR_DEFAULT},
+    {6, 2437, TX_PWR_DEFAULT},
+    {7, 2442, TX_PWR_DEFAULT},
+    {8, 2447, TX_PWR_DEFAULT},
+    {9, 2452, TX_PWR_DEFAULT},
+    {10, 2457, TX_PWR_DEFAULT},
+    {11, 2462, TX_PWR_DEFAULT},
+    {12, 2467, TX_PWR_DEFAULT},
+    {13, 2472, TX_PWR_DEFAULT},
+    {14, 2484, TX_PWR_DEFAULT}
+};
+
+/** Channels for 802.11a/j */
+static chan_freq_power_t channel_freq_power_UN_AJ[] = {
+    {8, 5040, TX_PWR_DEFAULT},
+    {12, 5060, TX_PWR_DEFAULT},
+    {16, 5080, TX_PWR_DEFAULT},
+    {34, 5170, TX_PWR_DEFAULT},
+    {38, 5190, TX_PWR_DEFAULT},
+    {42, 5210, TX_PWR_DEFAULT},
+    {46, 5230, TX_PWR_DEFAULT},
+    {36, 5180, TX_PWR_DEFAULT},
+    {40, 5200, TX_PWR_DEFAULT},
+    {44, 5220, TX_PWR_DEFAULT},
+    {48, 5240, TX_PWR_DEFAULT},
+    {52, 5260, TX_PWR_DEFAULT},
+    {56, 5280, TX_PWR_DEFAULT},
+    {60, 5300, TX_PWR_DEFAULT},
+    {64, 5320, TX_PWR_DEFAULT},
+    {100, 5500, TX_PWR_DEFAULT},
+    {104, 5520, TX_PWR_DEFAULT},
+    {108, 5540, TX_PWR_DEFAULT},
+    {112, 5560, TX_PWR_DEFAULT},
+    {116, 5580, TX_PWR_DEFAULT},
+    {120, 5600, TX_PWR_DEFAULT},
+    {124, 5620, TX_PWR_DEFAULT},
+    {128, 5640, TX_PWR_DEFAULT},
+    {132, 5660, TX_PWR_DEFAULT},
+    {136, 5680, TX_PWR_DEFAULT},
+    {140, 5700, TX_PWR_DEFAULT},
+    {149, 5745, TX_PWR_DEFAULT},
+    {153, 5765, TX_PWR_DEFAULT},
+    {157, 5785, TX_PWR_DEFAULT},
+    {161, 5805, TX_PWR_DEFAULT},
+    {165, 5825, TX_PWR_DEFAULT},
+/*  {240, 4920, TX_PWR_DEFAULT},
+    {244, 4940, TX_PWR_DEFAULT},
+    {248, 4960, TX_PWR_DEFAULT},
+    {252, 4980, TX_PWR_DEFAULT},
+channels for 11J JP 10M channel gap */
+};
+#endif /* STA_SUPPORT */
+
+/********************************************************
+                Global Variables
+********************************************************/
+
+/********************************************************
+                Local Functions
+********************************************************/
+
+#if defined(STA_SUPPORT)
+/**
+ *  @brief This function converts region string to integer code
+ *
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param region       Region string
+ *  @param code         [output] Region code
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_11d_region_2_code(pmlan_adapter pmadapter, t_u8 * region, OUT t_u8 * code)
+{
+    t_u8 i;
+    t_u8 size = sizeof(region_code_mapping) / sizeof(region_code_mapping_t);
+
+    ENTER();
+
+    /* Look for code in mapping table */
+    for (i = 0; i < size; i++) {
+        if (!memcmp(pmadapter, region_code_mapping[i].region,
+                    region, COUNTRY_CODE_LEN)) {
+            *code = region_code_mapping[i].code;
+            LEAVE();
+            return MLAN_STATUS_SUCCESS;
+        }
+    }
+
+    LEAVE();
+    return MLAN_STATUS_FAILURE;
+}
+#endif
+
+#ifdef STA_SUPPORT
+/**
+ *  @brief This function converts integer code to region string
+ *
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param code         Region code
+ *
+ *  @return             Region string
+ */
+static t_u8 *
+wlan_11d_code_2_region(pmlan_adapter pmadapter, t_u8 code)
+{
+    t_u8 i;
+    t_u8 size = sizeof(region_code_mapping) / sizeof(region_code_mapping_t);
+
+    ENTER();
+
+    /* Look for code in mapping table */
+    for (i = 0; i < size; i++) {
+        if (region_code_mapping[i].code == code) {
+            LEAVE();
+            return (region_code_mapping[i].region);
+        }
+    }
+
+    LEAVE();
+    /* Default is US */
+    return (region_code_mapping[0].region);
+}
+
+/**
+ *  @brief This function Checks if channel txpwr is learned from AP/IBSS
+ *
+ *  @param pmadapter            A pointer to mlan_adapter structure
+ *  @param band                 Band number
+ *  @param chan                 Channel number
+ *  @param parsed_region_chan   Pointer to parsed_region_chan_11d_t
+ *
+ *  @return                     MTRUE or MFALSE
+ */
+static t_u8
+wlan_11d_channel_known(pmlan_adapter pmadapter,
+                       t_u8 band,
+                       t_u8 chan, parsed_region_chan_11d_t * parsed_region_chan)
+{
+    chan_power_11d_t *pchan_pwr = parsed_region_chan->chan_pwr;
+    t_u8 no_of_chan = parsed_region_chan->no_of_chan;
+    t_u8 i = 0;
+    t_u8 ret = MFALSE;
+    mlan_private *pmpriv;
+
+    ENTER();
+
+    HEXDUMP("11D: parsed_region_chan", (t_u8 *) pchan_pwr,
+            sizeof(chan_power_11d_t) * no_of_chan);
+
+    /* Search channel */
+    for (i = 0; i < no_of_chan; i++) {
+        if (chan == pchan_pwr[i].chan && band == pchan_pwr[i].band) {
+            PRINTM(MINFO, "11D: Found channel:%d (band:%d)\n", chan, band);
+            ret = MTRUE;
+
+            if (band & BAND_A) {
+                /* If chan is a DFS channel, we need to see an AP on it */
+                if ((pmpriv = wlan_get_priv(pmadapter, MLAN_BSS_ROLE_STA))
+                    && wlan_11h_radar_detect_required(pmpriv, chan)) {
+                    PRINTM(MINFO, "11H: DFS channel %d, and ap_seen=%d\n",
+                           chan, pchan_pwr[i].ap_seen);
+                    ret = pchan_pwr[i].ap_seen;
+                }
+            }
+
+            LEAVE();
+            return ret;
+        }
+    }
+
+    PRINTM(MINFO, "11D: Could not find channel:%d (band:%d)\n", chan, band);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function generates parsed_region_chan from Domain Info
+ *           learned from AP/IBSS
+ *
+ *  @param pmadapter            Pointer to mlan_adapter structure
+ *  @param region_chan          Pointer to region_chan_t
+ *  @param parsed_region_chan   Pointer to parsed_region_chan_11d_t
+ *
+ *  @return                     N/A
+ */
+static t_void
+wlan_11d_generate_parsed_region_chan(pmlan_adapter pmadapter,
+                                     region_chan_t * region_chan,
+                                     parsed_region_chan_11d_t *
+                                     parsed_region_chan)
+{
+    chan_freq_power_t *cfp;
+    t_u8 i;
+
+    ENTER();
+
+    /* Region channel must be provided */
+    if (!region_chan) {
+        PRINTM(MWARN, "11D: region_chan is MNULL\n");
+        LEAVE();
+        return;
+    }
+
+    /* Get channel-frequency-power trio */
+    cfp = region_chan->pcfp;
+    if (!cfp) {
+        PRINTM(MWARN, "11D: cfp equal MNULL\n");
+        LEAVE();
+        return;
+    }
+
+    /* Set channel, band and power */
+    for (i = 0; i < region_chan->num_cfp; i++, cfp++) {
+        parsed_region_chan->chan_pwr[i].chan = (t_u8) cfp->channel;
+        parsed_region_chan->chan_pwr[i].band = region_chan->band;
+        parsed_region_chan->chan_pwr[i].pwr = (t_u8) cfp->max_tx_power;
+        PRINTM(MINFO, "11D: Chan[%d] Band[%d] Pwr[%d]\n",
+               parsed_region_chan->chan_pwr[i].chan,
+               parsed_region_chan->chan_pwr[i].band,
+               parsed_region_chan->chan_pwr[i].pwr);
+    }
+    parsed_region_chan->no_of_chan = region_chan->num_cfp;
+
+    PRINTM(MINFO, "11D: no_of_chan[%d]\n", parsed_region_chan->no_of_chan);
+
+    LEAVE();
+    return;
+}
+
+/**
+ *  @brief This function generates domain_info from parsed_region_chan
+ *
+ *  @param pmadapter            Pointer to mlan_adapter structure
+ *  @param parsed_region_chan   Pointer to parsed_region_chan_11d_t
+ *
+ *  @return                     MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_11d_generate_domain_info(pmlan_adapter pmadapter,
+                              parsed_region_chan_11d_t * parsed_region_chan)
+{
+    t_u8 no_of_sub_band = 0;
+    t_u8 no_of_chan = parsed_region_chan->no_of_chan;
+    t_u8 no_of_parsed_chan = 0;
+    t_u8 first_chan = 0, next_chan = 0, max_pwr = 0;
+    t_u8 i, flag = MFALSE;
+    wlan_802_11d_domain_reg_t *domain_info = &pmadapter->domain_reg;
+
+    ENTER();
+
+    /* Should be only place that clear domain_reg (besides init) */
+    memset(pmadapter, domain_info, 0, sizeof(wlan_802_11d_domain_reg_t));
+
+    /* Set country code */
+    memcpy(pmadapter, domain_info->country_code,
+           wlan_11d_code_2_region(pmadapter, (t_u8) pmadapter->region_code),
+           COUNTRY_CODE_LEN);
+
+    PRINTM(MINFO, "11D: Number of channel = %d\n", no_of_chan);
+    HEXDUMP("11D: parsed_region_chan", (t_u8 *) parsed_region_chan,
+            sizeof(parsed_region_chan_11d_t));
+
+    /* Set channel and power */
+    for (i = 0; i < no_of_chan; i++) {
+        if (!flag) {
+            flag = MTRUE;
+            next_chan = first_chan = parsed_region_chan->chan_pwr[i].chan;
+            max_pwr = parsed_region_chan->chan_pwr[i].pwr;
+            no_of_parsed_chan = 1;
+            continue;
+        }
+
+        if (parsed_region_chan->chan_pwr[i].chan == next_chan + 1 &&
+            parsed_region_chan->chan_pwr[i].pwr == max_pwr) {
+            next_chan++;
+            no_of_parsed_chan++;
+        } else {
+            domain_info->sub_band[no_of_sub_band].first_chan = first_chan;
+            domain_info->sub_band[no_of_sub_band].no_of_chan =
+                no_of_parsed_chan;
+            domain_info->sub_band[no_of_sub_band].max_tx_pwr = max_pwr;
+            no_of_sub_band++;
+            no_of_parsed_chan = 1;
+            next_chan = first_chan = parsed_region_chan->chan_pwr[i].chan;
+            max_pwr = parsed_region_chan->chan_pwr[i].pwr;
+        }
+    }
+
+    if (flag) {
+        domain_info->sub_band[no_of_sub_band].first_chan = first_chan;
+        domain_info->sub_band[no_of_sub_band].no_of_chan = no_of_parsed_chan;
+        domain_info->sub_band[no_of_sub_band].max_tx_pwr = max_pwr;
+        no_of_sub_band++;
+    }
+    domain_info->no_of_sub_band = no_of_sub_band;
+
+    PRINTM(MINFO, "11D: Number of sub-band =0x%x\n",
+           domain_info->no_of_sub_band);
+    HEXDUMP("11D: domain_info", (t_u8 *) domain_info,
+            COUNTRY_CODE_LEN + 1 +
+            sizeof(IEEEtypes_SubbandSet_t) * no_of_sub_band);
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function updates the channel power table with the channel
+ *            present in BSSDescriptor.
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param pbss_desc    A pointer to BSSDescriptor_t
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_11d_update_chan_pwr_table(mlan_private * pmpriv,
+                               BSSDescriptor_t * pbss_desc)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    parsed_region_chan_11d_t *parsed_region_chan =
+        &pmadapter->parsed_region_chan;
+    t_u16 i;
+    t_u8 tx_power = 0;
+    t_u8 chan;
+
+    ENTER();
+
+    chan = pbss_desc->phy_param_set.ds_param_set.current_chan;
+
+    tx_power = wlan_get_txpwr_of_chan_from_cfp(pmpriv, chan);
+
+    if (!tx_power) {
+        PRINTM(MMSG, "11D: Invalid channel\n");
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+
+    /* Check whether the channel already exists in channel power table of
+       parsed region */
+    for (i = 0; ((i < parsed_region_chan->no_of_chan) &&
+                 (i < MAX_NO_OF_CHAN)); i++) {
+        if (parsed_region_chan->chan_pwr[i].chan == chan
+            && parsed_region_chan->chan_pwr[i].band == pbss_desc->bss_band) {
+            /* Channel already exists, use minimum of existing and tx_power */
+            parsed_region_chan->chan_pwr[i].pwr =
+                MIN(parsed_region_chan->chan_pwr[i].pwr, tx_power);
+            parsed_region_chan->chan_pwr[i].ap_seen = MTRUE;
+            break;
+        }
+    }
+
+    if (i == parsed_region_chan->no_of_chan && i < MAX_NO_OF_CHAN) {
+        /* Channel not found. Update the channel in the channel-power table */
+        parsed_region_chan->chan_pwr[i].chan = chan;
+        parsed_region_chan->chan_pwr[i].band = (t_u8) pbss_desc->bss_band;
+        parsed_region_chan->chan_pwr[i].pwr = tx_power;
+        parsed_region_chan->chan_pwr[i].ap_seen = MTRUE;
+        parsed_region_chan->no_of_chan++;
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function finds the no_of_chan-th chan after the first_chan
+ *
+ *  @param pmadapter  A pointer to mlan_adapter structure
+ *  @param band       Band
+ *  @param first_chan First channel number
+ *  @param no_of_chan Number of channels
+ *  @param chan       Pointer to the returned no_of_chan-th chan number
+ *
+ *  @return           MTRUE or MFALSE
+ */
+static t_u8
+wlan_11d_get_chan(pmlan_adapter pmadapter, t_u8 band, t_u8 first_chan,
+                  t_u8 no_of_chan, t_u8 * chan)
+{
+    chan_freq_power_t *cfp = MNULL;
+    t_u8 i;
+    t_u8 cfp_no = 0;
+
+    ENTER();
+    if (band & (BAND_B | BAND_G | BAND_GN)) {
+        cfp = channel_freq_power_UN_BG;
+        cfp_no = sizeof(channel_freq_power_UN_BG) / sizeof(chan_freq_power_t);
+    } else if (band & (BAND_A | BAND_AN)) {
+        cfp = channel_freq_power_UN_AJ;
+        cfp_no = sizeof(channel_freq_power_UN_AJ) / sizeof(chan_freq_power_t);
+    } else {
+        PRINTM(MERROR, "11D: Wrong Band[%d]\n", band);
+        LEAVE();
+        return MFALSE;
+    }
+    /* Locate the first_chan */
+    for (i = 0; i < cfp_no; i++) {
+        if (cfp && ((cfp + i)->channel == first_chan)) {
+            PRINTM(MINFO, "11D: first_chan found\n");
+            break;
+        }
+    }
+
+    if (i < cfp_no) {
+        /* Check if beyond the boundary */
+        if (i + no_of_chan < cfp_no) {
+            /* Get first_chan + no_of_chan */
+            *chan = (t_u8) (cfp + i + no_of_chan)->channel;
+            LEAVE();
+            return MTRUE;
+        }
+    }
+
+    LEAVE();
+    return MFALSE;
+}
+
+/**
+ *  @brief This function processes the country info present in BSSDescriptor.
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param pbss_desc     A pointer to BSSDescriptor_t
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_11d_process_country_info(mlan_private * pmpriv,
+                              BSSDescriptor_t * pbss_desc)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    parsed_region_chan_11d_t region_chan;
+    parsed_region_chan_11d_t *parsed_region_chan =
+        &pmadapter->parsed_region_chan;
+    t_u16 i, j, num_chan_added = 0;
+
+    ENTER();
+
+    memset(pmadapter, &region_chan, 0, sizeof(parsed_region_chan_11d_t));
+
+    /* Parse 11D country info */
+    if (wlan_11d_parse_domain_info(pmadapter, &pbss_desc->country_info,
+                                   (t_u8) pbss_desc->bss_band,
+                                   &region_chan) != MLAN_STATUS_SUCCESS)
+        return MLAN_STATUS_FAILURE;
+
+    if (parsed_region_chan->no_of_chan != 0) {
+        /* 
+         * Check if the channel number already exists in the
+         * chan-power table of parsed_region_chan
+         */
+        for (i = 0; (i < region_chan.no_of_chan && i < MAX_NO_OF_CHAN); i++) {
+            for (j = 0; (j < parsed_region_chan->no_of_chan &&
+                         j < MAX_NO_OF_CHAN); j++) {
+                /* 
+                 * Channel already exists, update the tx power with new tx
+                 * power, since country IE is valid here.
+                 */
+                if (region_chan.chan_pwr[i].chan ==
+                    parsed_region_chan->chan_pwr[j].chan &&
+                    region_chan.chan_pwr[i].band ==
+                    parsed_region_chan->chan_pwr[j].band) {
+                    parsed_region_chan->chan_pwr[j].pwr =
+                        region_chan.chan_pwr[i].pwr;
+                    break;
+                }
+            }
+
+            if (j == parsed_region_chan->no_of_chan && j < MAX_NO_OF_CHAN) {
+                /* 
+                 * Channel does not exist in the channel power table,
+                 * update this new chan and tx_power to the channel power table
+                 */
+                parsed_region_chan->chan_pwr[parsed_region_chan->no_of_chan +
+                                             num_chan_added].chan =
+                    region_chan.chan_pwr[i].chan;
+                parsed_region_chan->chan_pwr[parsed_region_chan->no_of_chan +
+                                             num_chan_added].band =
+                    region_chan.chan_pwr[i].band;
+                parsed_region_chan->chan_pwr[parsed_region_chan->no_of_chan +
+                                             num_chan_added].pwr =
+                    region_chan.chan_pwr[i].pwr;
+                parsed_region_chan->chan_pwr[parsed_region_chan->no_of_chan +
+                                             num_chan_added].ap_seen = MFALSE;
+                num_chan_added++;
+            }
+        }
+        parsed_region_chan->no_of_chan += num_chan_added;
+    } else {
+        /* Parsed region is empty, copy the first one */
+        memcpy(pmadapter, parsed_region_chan,
+               &region_chan, sizeof(parsed_region_chan_11d_t));
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This helper function copies chan_power_11d_t element
+ *
+ *  @param chan_dst   Pointer to destination of chan_power
+ *  @param chan_src   Pointer to source of chan_power
+ *
+ *  @return           N/A
+ */
+static t_void
+wlan_11d_copy_chan_power(chan_power_11d_t * chan_dst,
+                         chan_power_11d_t * chan_src)
+{
+    ENTER();
+
+    chan_dst->chan = chan_src->chan;
+    chan_dst->band = chan_src->band;
+    chan_dst->pwr = chan_src->pwr;
+    chan_dst->ap_seen = chan_src->ap_seen;
+
+    LEAVE();
+    return;
+}
+
+/**
+ *  @brief This function sorts parsed_region_chan in ascending
+ *  channel number.
+ *
+ *  @param parsed_region_chan   Pointer to parsed_region_chan_11d_t
+ *
+ *  @return                     N/A
+ */
+static t_void
+wlan_11d_sort_parsed_region_chan(parsed_region_chan_11d_t * parsed_region_chan)
+{
+    int i, j;
+    chan_power_11d_t temp;
+    chan_power_11d_t *pchan_power = parsed_region_chan->chan_pwr;
+
+    ENTER();
+
+    PRINTM(MINFO, "11D: Number of channel = %d\n",
+           parsed_region_chan->no_of_chan);
+
+    // Use insertion sort method
+    for (i = 1; i < parsed_region_chan->no_of_chan; i++) {
+        wlan_11d_copy_chan_power(&temp, pchan_power + i);
+        for (j = i; j > 0 && (pchan_power + j - 1)->chan > temp.chan; j--)
+            wlan_11d_copy_chan_power(pchan_power + j, pchan_power + j - 1);
+        wlan_11d_copy_chan_power(pchan_power + j, &temp);
+    }
+
+    HEXDUMP("11D: parsed_region_chan", (t_u8 *) parsed_region_chan,
+            sizeof(parsed_region_chan_11d_t));
+
+    LEAVE();
+    return;
+}
+#endif /* STA_SUPPORT */
+
+#if defined(STA_SUPPORT)
+/**
+ *  @brief This function sends domain info to FW
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param pioctl_buf   A pointer to MLAN IOCTL Request buffer
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_11d_send_domain_info(mlan_private * pmpriv, t_void * pioctl_buf)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    /* Send cmd to FW to set domain info */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_802_11D_DOMAIN_INFO,
+                           HostCmd_ACT_GEN_SET,
+                           0, (t_void *) pioctl_buf, MNULL);
+    if (ret)
+        PRINTM(MERROR, "11D: Failed to download domain Info\n");
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function overwrites domain_info
+ *
+ *  @param pmadapter        Pointer to mlan_adapter structure
+ *  @param band             Intended operating band
+ *  @param country_code     Intended country code
+ *  @param num_sub_band     Count of tuples in list below
+ *  @param sub_band_list    List of sub_band tuples
+ *
+ *  @return                 MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_11d_set_domain_info(mlan_private * pmpriv,
+                         t_u8 band,
+                         t_u8 country_code[COUNTRY_CODE_LEN],
+                         t_u8 num_sub_band,
+                         IEEEtypes_SubbandSet_t * sub_band_list)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    wlan_802_11d_domain_reg_t *pdomain = &pmadapter->domain_reg;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    memset(pmadapter, pdomain, 0, sizeof(wlan_802_11d_domain_reg_t));
+    memcpy(pmadapter, pdomain->country_code, country_code, COUNTRY_CODE_LEN);
+    pdomain->band = band;
+    pdomain->no_of_sub_band = num_sub_band;
+    memcpy(pmadapter, pdomain->sub_band, sub_band_list,
+           num_sub_band * sizeof(IEEEtypes_SubbandSet_t));
+
+    LEAVE();
+    return ret;
+}
+#endif /* STA_SUPPORT || DFS_SUPPORT */
+
+/********************************************************
+                Global functions
+********************************************************/
+
+/**
+ *  @brief This function gets if priv is a station (STA)
+ *
+ *  @param pmpriv       Pointer to mlan_private structure
+ *
+ *  @return             MTRUE or MFALSE
+ */
+t_bool
+wlan_is_station(mlan_private * pmpriv)
+{
+    ENTER();
+    LEAVE();
+    return (GET_BSS_ROLE(pmpriv) == MLAN_BSS_ROLE_STA) ? MTRUE : MFALSE;
+}
+
+/**
+ *  @brief This function gets if 11D is enabled
+ *
+ *  @param pmpriv       Pointer to mlan_private structure
+ *
+ *  @return             MTRUE or MFALSE
+ */
+t_bool
+wlan_11d_is_enabled(mlan_private * pmpriv)
+{
+    ENTER();
+    LEAVE();
+    return (pmpriv->state_11d.enable_11d == ENABLE_11D) ? MTRUE : MFALSE;
+}
+
+/**
+ *  @brief Initialize interface variable for 11D
+ *
+ *  @param pmpriv       Pointer to mlan_private structure
+ *
+ *  @return             N/A
+ */
+t_void
+wlan_11d_priv_init(mlan_private * pmpriv)
+{
+    wlan_802_11d_state_t *state = &pmpriv->state_11d;
+
+    ENTER();
+
+    /* Start in disabled mode */
+    state->enable_11d = DISABLE_11D;
+    if (!pmpriv->adapter->init_para.cfg_11d)
+        state->user_enable_11d = DEFAULT_11D_STATE;
+    else
+        state->user_enable_11d =
+            (pmpriv->adapter->init_para.cfg_11d == MLAN_INIT_PARA_DISABLED) ?
+            DISABLE_11D : ENABLE_11D;
+
+    LEAVE();
+    return;
+}
+
+/**
+ *  @brief Initialize device variable for 11D
+ *
+ *  @param pmadapter    Pointer to mlan_adapter structure
+ *
+ *  @return             N/A
+ */
+t_void
+wlan_11d_init(mlan_adapter * pmadapter)
+{
+    ENTER();
+
+#ifdef STA_SUPPORT
+    memset(pmadapter, &(pmadapter->parsed_region_chan), 0,
+           sizeof(parsed_region_chan_11d_t));
+    memset(pmadapter, &(pmadapter->universal_channel), 0,
+           sizeof(region_chan_t));
+#endif
+    memset(pmadapter, &(pmadapter->domain_reg), 0,
+           sizeof(wlan_802_11d_domain_reg_t));
+
+    LEAVE();
+    return;
+}
+
+/**
+ *  @brief This function enable/disable 11D
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param pioctl_buf   A pointer to MLAN IOCTL Request buffer
+ *  @param flag         11D status
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_11d_enable(mlan_private * pmpriv, t_void * pioctl_buf, state_11d_t flag)
+{
+#ifdef STA_SUPPORT
+    mlan_adapter *pmadapter = pmpriv->adapter;
+#endif
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    state_11d_t enable = flag;
+
+    ENTER();
+
+    /* Send cmd to FW to enable/disable 11D function */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_802_11_SNMP_MIB,
+                           HostCmd_ACT_GEN_SET,
+                           Dot11D_i, (t_void *) pioctl_buf, &enable);
+
+    if (ret) {
+        PRINTM(MERROR, "11D: Failed to %s 11D\n",
+               (flag) ? "enable" : "disable");
+    }
+#ifdef STA_SUPPORT
+    else {
+        /* clear parsed table regardless of flag */
+        memset(pmadapter, &(pmadapter->parsed_region_chan), 0,
+               sizeof(parsed_region_chan_11d_t));
+    }
+#endif
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function implements command CMD_802_11D_DOMAIN_INFO
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param pcmd         A pointer to HostCmd_DS_COMMAND structure of
+ *                        command buffer
+ *  @param cmd_action   Command action
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_cmd_802_11d_domain_info(mlan_private * pmpriv,
+                             HostCmd_DS_COMMAND * pcmd, t_u16 cmd_action)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    HostCmd_DS_802_11D_DOMAIN_INFO *pdomain_info = &pcmd->params.domain_info;
+    MrvlIEtypes_DomainParamSet_t *domain = &pdomain_info->domain;
+    t_u8 no_of_sub_band = pmadapter->domain_reg.no_of_sub_band;
+
+    ENTER();
+
+    PRINTM(MINFO, "11D: number of sub-band=0x%x\n", no_of_sub_band);
+
+    pcmd->command = wlan_cpu_to_le16(HostCmd_CMD_802_11D_DOMAIN_INFO);
+    pdomain_info->action = wlan_cpu_to_le16(cmd_action);
+    if (cmd_action == HostCmd_ACT_GEN_GET) {
+        /* Dump domain info */
+        pcmd->size = wlan_cpu_to_le16(sizeof(pdomain_info->action) + S_DS_GEN);
+        HEXDUMP("11D: 802_11D_DOMAIN_INFO", (t_u8 *) pcmd,
+                wlan_le16_to_cpu(pcmd->size));
+        LEAVE();
+        return MLAN_STATUS_SUCCESS;
+    }
+
+    /* Set domain info fields */
+    domain->header.type = wlan_cpu_to_le16(TLV_TYPE_DOMAIN);
+    memcpy(pmadapter, domain->country_code,
+           pmadapter->domain_reg.country_code, sizeof(domain->country_code));
+
+    domain->header.len = ((no_of_sub_band * sizeof(IEEEtypes_SubbandSet_t)) +
+                          sizeof(domain->country_code));
+
+    if (no_of_sub_band) {
+        memcpy(pmadapter, domain->sub_band,
+               pmadapter->domain_reg.sub_band,
+               no_of_sub_band * sizeof(IEEEtypes_SubbandSet_t));
+
+        pcmd->size = wlan_cpu_to_le16(sizeof(pdomain_info->action) +
+                                      domain->header.len +
+                                      sizeof(MrvlIEtypesHeader_t) + S_DS_GEN);
+    } else {
+        pcmd->size = wlan_cpu_to_le16(sizeof(pdomain_info->action) + S_DS_GEN);
+    }
+    domain->header.len = wlan_cpu_to_le16(domain->header.len);
+
+    HEXDUMP("11D: 802_11D_DOMAIN_INFO", (t_u8 *) pcmd,
+            wlan_le16_to_cpu(pcmd->size));
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function handle response of CMD_802_11D_DOMAIN_INFO
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         Pointer to command response buffer
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_ret_802_11d_domain_info(mlan_private * pmpriv, HostCmd_DS_COMMAND * resp)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    HostCmd_DS_802_11D_DOMAIN_INFO_RSP *domain_info =
+        &resp->params.domain_info_resp;
+    MrvlIEtypes_DomainParamSet_t *domain = &domain_info->domain;
+    t_u16 action = wlan_le16_to_cpu(domain_info->action);
+    t_u8 no_of_sub_band = 0;
+
+    ENTER();
+
+    /* Dump domain info response data */
+    HEXDUMP("11D: DOMAIN Info Rsp Data", (t_u8 *) resp, resp->size);
+
+    no_of_sub_band =
+        (t_u8) ((wlan_le16_to_cpu(domain->header.len) - COUNTRY_CODE_LEN)
+                / sizeof(IEEEtypes_SubbandSet_t));
+
+    PRINTM(MINFO, "11D Domain Info Resp: number of sub-band=%d\n",
+           no_of_sub_band);
+
+    if (no_of_sub_band > MRVDRV_MAX_SUBBAND_802_11D) {
+        PRINTM(MWARN, "11D: Invalid number of subbands %d returned!!\n",
+               no_of_sub_band);
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+
+    switch (action) {
+    case HostCmd_ACT_GEN_SET:  /* Proc Set Action */
+        break;
+    case HostCmd_ACT_GEN_GET:
+        break;
+    default:
+        PRINTM(MERROR, "11D: Invalid Action:%d\n", domain_info->action);
+        ret = MLAN_STATUS_FAILURE;
+        break;
+    }
+
+    LEAVE();
+    return ret;
+}
+
+#ifdef STA_SUPPORT
+/**
+ *  @brief This function parses country information for region channel
+ *
+ *  @param pmadapter            Pointer to mlan_adapter structure
+ *  @param country_info         Country information
+ *  @param band                 Chan band
+ *  @param parsed_region_chan   Pointer to parsed_region_chan_11d_t
+ *
+ *  @return                     MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_11d_parse_domain_info(pmlan_adapter pmadapter,
+                           IEEEtypes_CountryInfoFullSet_t * country_info,
+                           t_u8 band,
+                           parsed_region_chan_11d_t * parsed_region_chan)
+{
+    t_u8 no_of_sub_band, no_of_chan;
+    t_u8 last_chan, first_chan, cur_chan = 0;
+    t_u8 idx = 0;
+    t_u8 j, i;
+
+    ENTER();
+
+    /* 
+     * Validation Rules:
+     *    1. Valid Region Code
+     *    2. First Chan increment
+     *    3. Channel range no overlap
+     *    4. Channel is valid?
+     *    5. Channel is supported by Region?
+     *    6. Others
+     */
+
+    HEXDUMP("country_info", (t_u8 *) country_info, 30);
+
+    /* Step 1: Check region_code */
+    if (!(*(country_info->country_code)) ||
+        (country_info->len <= COUNTRY_CODE_LEN)) {
+        /* No region info or wrong region info: treat as no 11D info */
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+
+    no_of_sub_band = (country_info->len - COUNTRY_CODE_LEN) /
+        sizeof(IEEEtypes_SubbandSet_t);
+
+    for (j = 0, last_chan = 0; j < no_of_sub_band; j++) {
+
+        if (country_info->sub_band[j].first_chan <= last_chan) {
+            /* Step2&3: Check First Chan Num increment and no overlap */
+            PRINTM(MINFO, "11D: Chan[%d>%d] Overlap\n",
+                   country_info->sub_band[j].first_chan, last_chan);
+            continue;
+        }
+
+        first_chan = country_info->sub_band[j].first_chan;
+        no_of_chan = country_info->sub_band[j].no_of_chan;
+
+        for (i = 0; idx < MAX_NO_OF_CHAN && i < no_of_chan; i++) {
+            /* Step 4 : Channel is supported? */
+            if (wlan_11d_get_chan(pmadapter, band, first_chan, i, &cur_chan) ==
+                MFALSE) {
+                /* Chan is not found in UN table */
+                PRINTM(MWARN, "11D: channel is not supported: %d\n", i);
+                break;
+            }
+
+            last_chan = cur_chan;
+
+            /* Step 5: We don't need to check if cur_chan is supported by mrvl
+               in region */
+            parsed_region_chan->chan_pwr[idx].chan = cur_chan;
+            parsed_region_chan->chan_pwr[idx].band = band;
+            parsed_region_chan->chan_pwr[idx].pwr =
+                country_info->sub_band[j].max_tx_pwr;
+            idx++;
+        }
+
+        /* Step 6: Add other checking if any */
+    }
+
+    parsed_region_chan->no_of_chan = idx;
+
+    PRINTM(MINFO, "11D: number of channel=0x%x\n",
+           parsed_region_chan->no_of_chan);
+    HEXDUMP("11D: parsed_region_chan", (t_u8 *) parsed_region_chan->chan_pwr,
+            sizeof(chan_power_11d_t) * idx);
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function converts channel to frequency
+ *
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param chan         Channel number
+ *  @param band         Band
+ *
+ *  @return             Channel frequency
+ */
+t_u32
+wlan_11d_chan_2_freq(pmlan_adapter pmadapter, t_u8 chan, t_u8 band)
+{
+    chan_freq_power_t *cf;
+    t_u16 cnt;
+    t_u16 i;
+    t_u32 freq = 0;
+
+    ENTER();
+
+    /* Get channel-frequency-power trios */
+    if (band & (BAND_A | BAND_AN)) {
+        cf = channel_freq_power_UN_AJ;
+        cnt = sizeof(channel_freq_power_UN_AJ) / sizeof(chan_freq_power_t);
+    } else {
+        cf = channel_freq_power_UN_BG;
+        cnt = sizeof(channel_freq_power_UN_BG) / sizeof(chan_freq_power_t);
+    }
+
+    /* Locate channel and return corresponding frequency */
+    for (i = 0; i < cnt; i++) {
+        if (chan == cf[i].channel)
+            freq = cf[i].freq;
+    }
+
+    LEAVE();
+    return freq;
+}
+
+/**
+ *  @brief This function setups scan channels
+ *
+ *  @param pmpriv       Pointer to mlan_private structure
+ *  @param band         Band
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_11d_set_universaltable(mlan_private * pmpriv, t_u8 band)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    t_u16 size = sizeof(chan_freq_power_t);
+    t_u16 i = 0;
+
+    ENTER();
+
+    memset(pmadapter, pmadapter->universal_channel, 0,
+           sizeof(pmadapter->universal_channel));
+
+    if (band & (BAND_B | BAND_G | BAND_GN))
+        /* If band B, G or N */
+    {
+        /* Set channel-frequency-power */
+        pmadapter->universal_channel[i].num_cfp =
+            (t_u8) (sizeof(channel_freq_power_UN_BG) / size);
+        PRINTM(MINFO, "11D: BG-band num_cfp=%d\n",
+               pmadapter->universal_channel[i].num_cfp);
+
+        pmadapter->universal_channel[i].pcfp = channel_freq_power_UN_BG;
+        pmadapter->universal_channel[i].valid = MTRUE;
+
+        /* Set region code */
+        pmadapter->universal_channel[i].region = UNIVERSAL_REGION_CODE;
+
+        /* Set band */
+        if (band & BAND_GN)
+            pmadapter->universal_channel[i].band = BAND_G;
+        else
+            pmadapter->universal_channel[i].band =
+                (band & BAND_G) ? BAND_G : BAND_B;
+        i++;
+    }
+
+    if (band & (BAND_A | BAND_AN)) {
+        /* If band A */
+
+        /* Set channel-frequency-power */
+        pmadapter->universal_channel[i].num_cfp =
+            sizeof(channel_freq_power_UN_AJ) / size;
+        PRINTM(MINFO, "11D: AJ-band num_cfp=%d\n",
+               pmadapter->universal_channel[i].num_cfp);
+
+        pmadapter->universal_channel[i].pcfp = channel_freq_power_UN_AJ;
+
+        pmadapter->universal_channel[i].valid = MTRUE;
+
+        /* Set region code */
+        pmadapter->universal_channel[i].region = UNIVERSAL_REGION_CODE;
+
+        /* Set band */
+        pmadapter->universal_channel[i].band = BAND_A;
+        i++;
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function calculates the scan type for channels
+ *
+ *  @param pmadapter            A pointer to mlan_adapter structure
+ *  @param band                 Band number
+ *  @param chan                 Chan number
+ *  @param parsed_region_chan   Pointer to parsed_region_chan_11d_t
+ *
+ *  @return                     PASSIVE if chan is unknown; ACTIVE if chan is known
+ */
+t_u8
+wlan_11d_get_scan_type(pmlan_adapter pmadapter,
+                       t_u8 band,
+                       t_u8 chan, parsed_region_chan_11d_t * parsed_region_chan)
+{
+    t_u8 scan_type = MLAN_SCAN_TYPE_PASSIVE;
+
+    ENTER();
+
+    if (wlan_11d_channel_known(pmadapter, band, chan, parsed_region_chan)) {
+        /* Channel found */
+        PRINTM(MINFO, "11D: Channel found and doing Active Scan\n");
+        scan_type = MLAN_SCAN_TYPE_ACTIVE;
+    } else
+        PRINTM(MINFO, "11D: Channel not found and doing Passive Scan\n");
+
+    LEAVE();
+    return scan_type;
+}
+
+/**
+ *  @brief This function clears the parsed region table, if 11D is enabled
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_11d_clear_parsedtable(mlan_private * pmpriv)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    if (wlan_11d_is_enabled(pmpriv))
+        memset(pmadapter, &(pmadapter->parsed_region_chan), 0,
+               sizeof(parsed_region_chan_11d_t));
+    else
+        ret = MLAN_STATUS_FAILURE;
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function generates 11D info from user specified regioncode
+ *         and download to FW
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param band         Band to create
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_11d_create_dnld_countryinfo(mlan_private * pmpriv, t_u8 band)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    region_chan_t *region_chan;
+    parsed_region_chan_11d_t parsed_region_chan;
+    t_u8 j;
+
+    ENTER();
+
+    /* Only valid if 11D is enabled */
+    if (wlan_11d_is_enabled(pmpriv)) {
+
+        PRINTM(MINFO, "11D: Band[%d]\n", band);
+
+        /* Update parsed_region_chan; download domain info to FW */
+
+        /* Find region channel */
+        for (j = 0;
+             j <
+             sizeof(pmadapter->region_channel) /
+             sizeof(pmadapter->region_channel[0]); j++) {
+            region_chan = &pmadapter->region_channel[j];
+
+            PRINTM(MINFO, "11D: [%d] region_chan->Band[%d]\n", j,
+                   region_chan->band);
+
+            if (!region_chan || !region_chan->valid || !region_chan->pcfp)
+                continue;
+            switch (region_chan->band) {
+            case BAND_A:
+                switch (band) {
+                case BAND_A:
+                case BAND_AN:
+                case BAND_A | BAND_AN:
+                    break;
+                default:
+                    continue;
+                }
+                break;
+            case BAND_B:
+            case BAND_G:
+                switch (band) {
+                case BAND_B:
+                case BAND_G:
+                case BAND_G | BAND_B:
+                case BAND_GN:
+                case BAND_G | BAND_GN:
+                case BAND_B | BAND_G | BAND_GN:
+                    break;
+                default:
+                    continue;
+                }
+                break;
+            default:
+                continue;
+            }
+            break;
+        }
+
+        /* Check if region channel found */
+        if (j >= sizeof(pmadapter->region_channel) /
+            sizeof(pmadapter->region_channel[0])) {
+            PRINTM(MERROR, "11D: region_chan not found. Band[%d]\n", band);
+            LEAVE();
+            return MLAN_STATUS_FAILURE;
+        }
+
+        /* Generate parsed region channel info from region channel */
+        memset(pmadapter, &parsed_region_chan, 0,
+               sizeof(parsed_region_chan_11d_t));
+        wlan_11d_generate_parsed_region_chan(pmadapter, region_chan,
+                                             &parsed_region_chan);
+
+        /* Generate domain info from parsed region channel info */
+        wlan_11d_generate_domain_info(pmadapter, &parsed_region_chan);
+
+        /* Set domain info */
+        ret = wlan_11d_send_domain_info(pmpriv, MNULL);
+        if (ret) {
+            PRINTM(MERROR, "11D: Error sending domain info to FW\n");
+        }
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function parses country info from AP and
+ *           download country info to FW
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param pbss_desc     A pointer to BSS descriptor
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_11d_parse_dnld_countryinfo(mlan_private * pmpriv,
+                                BSSDescriptor_t * pbss_desc)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    parsed_region_chan_11d_t region_chan;
+    parsed_region_chan_11d_t bssdesc_region_chan;
+    t_u32 i, j;
+
+    ENTER();
+
+    /* Only valid if 11D is enabled */
+    if (wlan_11d_is_enabled(pmpriv)) {
+
+        memset(pmadapter, &region_chan, 0, sizeof(parsed_region_chan_11d_t));
+        memset(pmadapter, &bssdesc_region_chan, 0,
+               sizeof(parsed_region_chan_11d_t));
+
+        memcpy(pmadapter, &region_chan,
+               &pmadapter->parsed_region_chan,
+               sizeof(parsed_region_chan_11d_t));
+
+        if (pbss_desc) {
+            /* Parse domain info if available */
+            ret =
+                wlan_11d_parse_domain_info(pmadapter, &pbss_desc->country_info,
+                                           (t_u8) pbss_desc->bss_band,
+                                           &bssdesc_region_chan);
+
+            if (ret == MLAN_STATUS_SUCCESS) {
+                /* Update the channel-power table */
+                for (i = 0; ((i < bssdesc_region_chan.no_of_chan)
+                             && (i < MAX_NO_OF_CHAN)); i++) {
+
+                    for (j = 0; ((j < region_chan.no_of_chan)
+                                 && (j < MAX_NO_OF_CHAN)); j++) {
+                        /* 
+                         * Channel already exists, use minimum of existing
+                         * tx power and tx_power received from
+                         * country info of the current AP
+                         */
+                        if (region_chan.chan_pwr[i].chan ==
+                            bssdesc_region_chan.chan_pwr[j].chan &&
+                            region_chan.chan_pwr[i].band ==
+                            bssdesc_region_chan.chan_pwr[j].band) {
+                            region_chan.chan_pwr[j].pwr =
+                                MIN(region_chan.chan_pwr[j].pwr,
+                                    bssdesc_region_chan.chan_pwr[i].pwr);
+                            break;
+                        }
+                    }
+                }
+            }
+        }
+
+        /* Generate domain info */
+        wlan_11d_generate_domain_info(pmadapter, &region_chan);
+
+        /* Set domain info */
+        ret = wlan_11d_send_domain_info(pmpriv, MNULL);
+        if (ret) {
+            PRINTM(MERROR, "11D: Error sending domain info to FW\n");
+        }
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function prepares domain info from scan table and
+ *         downloads the domain info command to the FW.
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_11d_prepare_dnld_domain_info_cmd(mlan_private * pmpriv)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    IEEEtypes_CountryInfoFullSet_t *pcountry_full = MNULL;
+    t_u32 idx;
+
+    ENTER();
+
+    /* Only valid if 11D is enabled */
+    if (wlan_11d_is_enabled(pmpriv) && pmadapter->num_in_scan_table != 0) {
+        for (idx = 0; idx < pmadapter->num_in_scan_table; idx++) {
+            pcountry_full = &pmadapter->pscan_table[idx].country_info;
+
+            ret =
+                wlan_11d_update_chan_pwr_table(pmpriv,
+                                               &pmadapter->pscan_table[idx]);
+
+            if (*(pcountry_full->country_code) != 0 &&
+                (pcountry_full->len > COUNTRY_CODE_LEN)) {
+                /* Country info found in the BSS Descriptor */
+                ret =
+                    wlan_11d_process_country_info(pmpriv,
+                                                  &pmadapter->pscan_table[idx]);
+            }
+        }
+
+        /* Sort parsed_region_chan in ascending channel number */
+        wlan_11d_sort_parsed_region_chan(&pmadapter->parsed_region_chan);
+
+        /* Check if connected */
+        if (pmpriv->media_connected == MTRUE) {
+            ret =
+                wlan_11d_parse_dnld_countryinfo(pmpriv,
+                                                &pmpriv->curr_bss_params.
+                                                bss_descriptor);
+        } else {
+            ret = wlan_11d_parse_dnld_countryinfo(pmpriv, MNULL);
+        }
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function sets up domain_reg and downloads CMD to FW
+ *
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param pioctl_req   Pointer to the IOCTL request buffer
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_11d_cfg_domain_info(IN pmlan_adapter pmadapter,
+                         IN mlan_ioctl_req * pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_11d_domain_info *domain_info = MNULL;
+    mlan_ds_11d_cfg *cfg_11d = MNULL;
+    t_u8 region_code = 0;
+
+    ENTER();
+
+    cfg_11d = (mlan_ds_11d_cfg *) pioctl_req->pbuf;
+    domain_info = &cfg_11d->param.domain_info;
+
+    /* Update region code and table based on country code */
+    if (wlan_11d_region_2_code(pmadapter, domain_info->country_code,
+                               &region_code) == MLAN_STATUS_SUCCESS) {
+        pmadapter->region_code = region_code;
+        ret = wlan_set_regiontable(pmpriv, region_code, pmadapter->fw_bands);
+        if (ret != MLAN_STATUS_SUCCESS)
+            goto done;
+    }
+
+    wlan_11d_set_domain_info(pmpriv, domain_info->band,
+                             domain_info->country_code,
+                             domain_info->no_of_sub_band,
+                             (IEEEtypes_SubbandSet_t *) domain_info->sub_band);
+    ret = wlan_11d_send_domain_info(pmpriv, pioctl_req);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+  done:
+    LEAVE();
+    return ret;
+}
+#endif /* STA_SUPPORT */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_11h.c linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_11h.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_11h.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_11h.c	2017-09-23 03:42:50.094674832 +0800
@@ -0,0 +1,1440 @@
+/** @file mlan_11h.c
+ *
+ *  @brief This file contains functions for 802.11H.
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/*************************************************************
+Change Log:
+    03/26/2009: initial version
+************************************************************/
+
+#include "mlan.h"
+#include "mlan_join.h"
+#include "mlan_util.h"
+#include "mlan_fw.h"
+#include "mlan_main.h"
+#include "mlan_ioctl.h"
+#include "mlan_11h.h"
+#include "mlan_meas.h"
+
+/********************************************************
+                Local Variables
+********************************************************/
+
+/** Default IBSS DFS recovery interval (in TBTTs); used for adhoc start */
+#define WLAN_11H_DEFAULT_DFS_RECOVERY_INTERVAL   100
+
+/** Default 11h power constraint used to offset the maximum transmit power */
+#define WLAN_11H_TPC_POWERCONSTRAINT  0
+
+/** 11h TPC Power capability minimum setting, sent in TPC_INFO command to fw */
+#define WLAN_11H_TPC_POWERCAPABILITY_MIN     5
+
+/** 11h TPC Power capability maximum setting, sent in TPC_INFO command to fw */
+#define WLAN_11H_TPC_POWERCAPABILITY_MAX     20
+
+/** Regulatory requirement for the duration of a channel availability check */
+#define WLAN_11H_CHANNEL_AVAIL_CHECK_DURATION    60000  /* in ms */
+
+/** Starting Frequency for 11A band */
+#define START_FREQ_11A_BAND     5000    /* in MHz */
+
+/** Region codes 0x10, 0x20:  channels 1 thru 11 supported */
+static const
+    IEEEtypes_SupportChan_Subband_t wlan_11h_2_4G_region_FCC = { 1, 11 };
+
+/** Region codes 0x30, 0x32, 0x41, 0x50:  channels 1 thru 13 supported */
+static const
+    IEEEtypes_SupportChan_Subband_t wlan_11h_2_4G_region_EU = { 1, 13 };
+
+/** Region code 0x40:  only channel 14 supported */
+static const
+    IEEEtypes_SupportChan_Subband_t wlan_11h_2_4G_region_JPN40 = { 14, 1 };
+
+/** JPN sub-band config : Start Channel = 8, NumChans = 3 */
+static const
+    IEEEtypes_SupportChan_Subband_t wlan_11h_JPN_bottom_band = { 8, 3 };
+
+/** U-NII sub-band config : Start Channel = 36, NumChans = 4 */
+static const
+    IEEEtypes_SupportChan_Subband_t wlan_11h_unii_lower_band = { 36, 4 };
+
+/** U-NII sub-band config : Start Channel = 52, NumChans = 4 */
+static const
+    IEEEtypes_SupportChan_Subband_t wlan_11h_unii_middle_band = { 52, 4 };
+
+/** U-NII sub-band config : Start Channel = 100, NumChans = 11 */
+static const
+    IEEEtypes_SupportChan_Subband_t wlan_11h_unii_mid_upper_band = { 100, 11 };
+
+/** U-NII sub-band config : Start Channel = 149, NumChans = 5 */
+static const
+    IEEEtypes_SupportChan_Subband_t wlan_11h_unii_upper_band = { 149, 5 };
+
+/** Internally passed structure used to send a CMD_802_11_TPC_INFO command */
+typedef struct
+{
+    t_u8 chan;                  /**< Channel to which the power constraint applies */
+    t_u8 power_constraint;      /**< Local power constraint to send to firmware */
+} wlan_11h_tpc_info_param_t;
+
+/********************************************************
+                Global Variables
+********************************************************/
+
+/********************************************************
+                Local Functions
+********************************************************/
+
+/**
+ *  @brief Utility function to get a random number based on the underlying OS
+ *
+ *  @param pmadapter Pointer to mlan_adapter
+ *  @return random integer
+ */
+static t_u32
+wlan_11h_get_random_num(pmlan_adapter pmadapter)
+{
+    t_u32 sec, usec;
+
+    ENTER();
+    pmadapter->callbacks.moal_get_system_time(pmadapter->pmoal_handle, &sec,
+                                              &usec);
+    sec = (sec & 0xFFFF) + (sec >> 16);
+    usec = (usec & 0xFFFF) + (usec >> 16);
+
+    LEAVE();
+    return ((usec << 16) | sec);
+}
+
+/**
+ *  @brief Convert an IEEE formatted IE to 16-bit ID/Len Marvell
+ *         proprietary format
+ *
+ *  @param pmadapter Pointer to mlan_adapter
+ *  @param pout_buf Output parameter: Buffer to output Marvell formatted IE
+ *  @param pin_ie   Pointer to IEEE IE to be converted to Marvell format
+ *
+ *  @return         Number of bytes output to pout_buf parameter return
+ */
+static t_u32
+wlan_11h_convert_ieee_to_mrvl_ie(mlan_adapter * pmadapter,
+                                 t_u8 * pout_buf, const t_u8 * pin_ie)
+{
+    MrvlIEtypesHeader_t mrvl_ie_hdr;
+    t_u8 *ptmp_buf = pout_buf;
+
+    ENTER();
+    /* Assign the Element Id and Len to the Marvell struct attributes */
+    mrvl_ie_hdr.type = wlan_cpu_to_le16(pin_ie[0]);
+    mrvl_ie_hdr.len = wlan_cpu_to_le16(pin_ie[1]);
+
+    /* If the element ID is zero, return without doing any copying */
+    if (!mrvl_ie_hdr.type) {
+        LEAVE();
+        return 0;
+    }
+
+    /* Copy the header to the buffer pointer */
+    memcpy(pmadapter, ptmp_buf, &mrvl_ie_hdr, sizeof(mrvl_ie_hdr));
+
+    /* Increment the temp buffer pointer by the size appended */
+    ptmp_buf += sizeof(mrvl_ie_hdr);
+
+    /* Append the data section of the IE; length given by the IEEE IE length */
+    memcpy(pmadapter, ptmp_buf, pin_ie + 2, pin_ie[1]);
+
+    LEAVE();
+    /* Return the number of bytes appended to pout_buf */
+    return (sizeof(mrvl_ie_hdr) + pin_ie[1]);
+}
+
+#ifdef STA_SUPPORT
+/**
+ *  @brief Setup the IBSS DFS element passed to the firmware in adhoc start
+ *         and join commands
+ *
+ *  The DFS Owner and recovery fields are set to be our MAC address and
+ *    a predetermined constant recovery value.  If we are joining an adhoc
+ *    network, these values are replaced with the existing IBSS values.
+ *    They are valid only when starting a new IBSS.
+ *
+ *  The IBSS DFS Element is variable in size based on the number of
+ *    channels supported in our current region.
+ *
+ *  @param priv Private driver information structure
+ *  @param pdfs Output parameter: Pointer to the IBSS DFS element setup by
+ *              this function.
+ *
+ *  @return
+ *    - Length of the returned element in pdfs output parameter
+ *    - 0 if returned element is not setup
+ */
+static t_u32
+wlan_11h_set_ibss_dfs_ie(mlan_private * priv, IEEEtypes_IBSS_DFS_t * pdfs)
+{
+    t_u8 num_chans = 0;
+    MeasRptBasicMap_t initial_map;
+    mlan_adapter *adapter = priv->adapter;
+
+    ENTER();
+
+    memset(adapter, pdfs, 0x00, sizeof(IEEEtypes_IBSS_DFS_t));
+
+    /* 
+     * A basic measurement report is included with each channel in the
+     *   map field.  Initial value for the map for each supported channel
+     *   is with only the unmeasured bit set.
+     */
+    memset(adapter, &initial_map, 0x00, sizeof(initial_map));
+    initial_map.unmeasured = 1;
+
+    /* Set the DFS Owner and recovery interval fields */
+    memcpy(adapter, pdfs->dfs_owner, priv->curr_addr, sizeof(pdfs->dfs_owner));
+    pdfs->dfs_recovery_interval = WLAN_11H_DEFAULT_DFS_RECOVERY_INTERVAL;
+
+    for (; (num_chans < adapter->parsed_region_chan.no_of_chan)
+         && (num_chans < WLAN_11H_MAX_IBSS_DFS_CHANNELS); num_chans++) {
+        pdfs->channel_map[num_chans].channel_number =
+            adapter->parsed_region_chan.chan_pwr[num_chans].chan;
+
+        /* 
+         * Set the initial map field with a basic measurement
+         */
+        pdfs->channel_map[num_chans].rpt_map = initial_map;
+    }
+
+    /* 
+     * If we have an established channel map, include it and return
+     *   a valid DFS element
+     */
+    if (num_chans) {
+        PRINTM(MINFO, "11h: Added %d channels to IBSS DFS Map\n", num_chans);
+
+        pdfs->element_id = IBSS_DFS;
+        pdfs->len =
+            (sizeof(pdfs->dfs_owner) + sizeof(pdfs->dfs_recovery_interval)
+             + num_chans * sizeof(IEEEtypes_ChannelMap_t));
+
+        LEAVE();
+        return (pdfs->len + sizeof(pdfs->len) + sizeof(pdfs->element_id));
+    }
+
+    /* Ensure the element is zeroed out for an invalid return */
+    memset(adapter, pdfs, 0x00, sizeof(IEEEtypes_IBSS_DFS_t));
+
+    LEAVE();
+    return 0;
+}
+#endif
+
+/**
+ *  @brief Setup the Supported Channel IE sent in association requests
+ *
+ *  The Supported Channels IE is required to be sent when the spectrum
+ *    management capability (11h) is enabled.  The element contains a
+ *    starting channel and number of channels tuple for each sub-band
+ *    the STA supports.  This information is based on the operating region.
+ *
+ *  @param priv      Private driver information structure
+ *  @param band      Band in use
+ *  @param psup_chan Output parameter: Pointer to the Supported Chan element
+ *                   setup by this function.
+ *
+ *  @return
+ *    - Length of the returned element in psup_chan output parameter
+ *    - 0 if returned element is not setup
+ */
+static t_u16
+wlan_11h_set_supp_channels_ie(mlan_private * priv,
+                              t_u8 band,
+                              IEEEtypes_SupportedChannels_t * psup_chan)
+{
+    t_u16 num_subbands = 0;
+    t_u16 ret_len = 0;
+
+    ENTER();
+    memset(priv->adapter, psup_chan, 0x00,
+           sizeof(IEEEtypes_SupportedChannels_t));
+
+    if ((band & BAND_B) || (band & BAND_G)) {
+        /* 
+         * Channels are contiguous in 2.4GHz, usually only one subband.
+         */
+        switch (priv->adapter->region_code) {
+        case 0x10:             /* USA FCC */
+        case 0x20:             /* Canada IC */
+        default:
+            psup_chan->subband[num_subbands++] = wlan_11h_2_4G_region_FCC;
+            break;
+        case 0x30:             /* Europe ETSI */
+        case 0x32:             /* France */
+        case 0x41:             /* Japan */
+        case 0x50:             /* China */
+            psup_chan->subband[num_subbands++] = wlan_11h_2_4G_region_EU;
+            break;
+        case 0x40:             /* Japan */
+            psup_chan->subband[num_subbands++] = wlan_11h_2_4G_region_JPN40;
+            break;
+        case 0xff:             /* Japan special */
+            psup_chan->subband[num_subbands++] = wlan_11h_2_4G_region_EU;
+            psup_chan->subband[num_subbands++] = wlan_11h_2_4G_region_JPN40;
+            break;
+        }
+    } else if (band & BAND_A) {
+        /* 
+         * Set the supported channel elements based on the region code,
+         *   incrementing num_subbands for each sub-band we append to the
+         *   element.
+         */
+        switch (priv->adapter->region_code) {
+        case 0x10:             /* USA FCC */
+        case 0x20:             /* Canada IC */
+        case 0x32:             /* France */
+            psup_chan->subband[num_subbands++] = wlan_11h_unii_lower_band;
+            psup_chan->subband[num_subbands++] = wlan_11h_unii_middle_band;
+            psup_chan->subband[num_subbands++] = wlan_11h_unii_mid_upper_band;
+            psup_chan->subband[num_subbands++] = wlan_11h_unii_upper_band;
+            break;
+        case 0x30:             /* Europe ETSI */
+        default:
+            psup_chan->subband[num_subbands++] = wlan_11h_unii_lower_band;
+            psup_chan->subband[num_subbands++] = wlan_11h_unii_middle_band;
+            psup_chan->subband[num_subbands++] = wlan_11h_unii_mid_upper_band;
+            break;
+        case 0x50:             /* China */
+            psup_chan->subband[num_subbands++] = wlan_11h_unii_upper_band;
+            break;
+        case 0x40:             /* Japan */
+        case 0x41:             /* Japan */
+        case 0xff:             /* Japan special */
+            psup_chan->subband[num_subbands++] = wlan_11h_JPN_bottom_band;
+            psup_chan->subband[num_subbands++] = wlan_11h_unii_lower_band;
+            psup_chan->subband[num_subbands++] = wlan_11h_unii_middle_band;
+            psup_chan->subband[num_subbands++] = wlan_11h_unii_mid_upper_band;
+            break;
+        }
+    }
+
+    /* 
+     * If we have setup any supported subbands in the element, return a
+     *    valid IE along with its size, else return 0.
+     */
+    if (num_subbands) {
+        psup_chan->element_id = SUPPORTED_CHANNELS;
+        psup_chan->len = num_subbands * sizeof(IEEEtypes_SupportChan_Subband_t);
+
+        ret_len = (t_u16) (psup_chan->len
+                           + sizeof(psup_chan->len) +
+                           sizeof(psup_chan->element_id));
+
+        HEXDUMP("11h: SupChan", (t_u8 *) psup_chan, ret_len);
+    }
+
+    LEAVE();
+    return ret_len;
+}
+
+/**
+ *  @brief Prepare CMD_802_11_TPC_ADAPT_REQ firmware command
+ *
+ *  @param priv      Private driver information structure
+ *  @param pcmd_ptr  Output parameter: Pointer to the command being prepared
+ *                   for the firmware
+ *  @param pinfo_buf HostCmd_DS_802_11_TPC_ADAPT_REQ passed as void data block
+ *
+ *  @return          MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_11h_cmd_tpc_request(mlan_private * priv,
+                         HostCmd_DS_COMMAND * pcmd_ptr,
+                         const t_void * pinfo_buf)
+{
+    ENTER();
+
+    memcpy(priv->adapter, &pcmd_ptr->params.tpc_req, pinfo_buf,
+           sizeof(HostCmd_DS_802_11_TPC_ADAPT_REQ));
+
+    pcmd_ptr->params.tpc_req.req.timeout =
+        wlan_cpu_to_le16(pcmd_ptr->params.tpc_req.req.timeout);
+
+    /* Converted to little endian in wlan_11h_cmd_process */
+    pcmd_ptr->size = sizeof(HostCmd_DS_802_11_TPC_ADAPT_REQ) + S_DS_GEN;
+
+    HEXDUMP("11h: 11_TPC_ADAPT_REQ:", (t_u8 *) pcmd_ptr,
+            (t_u32) pcmd_ptr->size);
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief Prepare CMD_802_11_TPC_INFO firmware command
+ *
+ *  @param priv      Private driver information structure
+ *  @param pcmd_ptr  Output parameter: Pointer to the command being prepared
+ *                   for the firmware
+ *  @param pinfo_buf wlan_11h_tpc_info_param_t passed as void data block
+ *
+ *  @return          MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_11h_cmd_tpc_info(mlan_private * priv,
+                      HostCmd_DS_COMMAND * pcmd_ptr, const t_void * pinfo_buf)
+{
+    HostCmd_DS_802_11_TPC_INFO *ptpc_info = &pcmd_ptr->params.tpc_info;
+    MrvlIEtypes_LocalPowerConstraint_t *pconstraint =
+        &ptpc_info->local_constraint;
+    MrvlIEtypes_PowerCapability_t *pcap = &ptpc_info->power_cap;
+
+    wlan_11h_device_state_t *pstate = &priv->adapter->state_11h;
+    const wlan_11h_tpc_info_param_t *ptpc_info_param =
+        (wlan_11h_tpc_info_param_t *) pinfo_buf;
+
+    ENTER();
+
+    pcap->min_power = pstate->min_tx_power_capability;
+    pcap->max_power = pstate->max_tx_power_capability;
+    pcap->header.len = wlan_cpu_to_le16(2);
+    pcap->header.type = wlan_cpu_to_le16(TLV_TYPE_POWER_CAPABILITY);
+
+    pconstraint->chan = ptpc_info_param->chan;
+    pconstraint->constraint = ptpc_info_param->power_constraint;
+    pconstraint->header.type = wlan_cpu_to_le16(TLV_TYPE_POWER_CONSTRAINT);
+    pconstraint->header.len = wlan_cpu_to_le16(2);
+
+    /* Converted to little endian in wlan_11h_cmd_process */
+    pcmd_ptr->size = sizeof(HostCmd_DS_802_11_TPC_INFO) + S_DS_GEN;
+
+    HEXDUMP("11h: TPC INFO", (t_u8 *) pcmd_ptr, (t_u32) pcmd_ptr->size);
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief  Prepare CMD_802_11_CHAN_SW_ANN firmware command
+ *
+ *  @param priv      Private driver information structure
+ *  @param pcmd_ptr  Output parameter: Pointer to the command being
+ *                   prepared to for firmware
+ *  @param pinfo_buf HostCmd_DS_802_11_CHAN_SW_ANN passed as void data block
+ *
+ *  @return          MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_11h_cmd_chan_sw_ann(mlan_private * priv,
+                         HostCmd_DS_COMMAND * pcmd_ptr,
+                         const t_void * pinfo_buf)
+{
+    const HostCmd_DS_802_11_CHAN_SW_ANN *pch_sw_ann =
+        (HostCmd_DS_802_11_CHAN_SW_ANN *) pinfo_buf;
+
+    ENTER();
+
+    /* Converted to little endian in wlan_11h_cmd_process */
+    pcmd_ptr->size = sizeof(HostCmd_DS_802_11_CHAN_SW_ANN) + S_DS_GEN;
+
+    memcpy(priv->adapter, &pcmd_ptr->params.chan_sw_ann, pch_sw_ann,
+           sizeof(HostCmd_DS_802_11_CHAN_SW_ANN));
+
+    PRINTM(MINFO, "11h: ChSwAnn: %#x-%u, Seq=%u, Ret=%u\n",
+           pcmd_ptr->command, pcmd_ptr->size, pcmd_ptr->seq_num,
+           pcmd_ptr->result);
+    PRINTM(MINFO, "11h: ChSwAnn: Ch=%d, Cnt=%d, Mode=%d\n",
+           pch_sw_ann->new_chan, pch_sw_ann->switch_count,
+           pch_sw_ann->switch_mode);
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief Set the local power capability and constraint TLV
+ *
+ *  @param ppbuffer                The buffer to add these two TLVs
+ *  @param channel                 Channel to which the power constraint applies
+ *  @param power_constraint        Power constraint to be applied on the channel
+ *  @param min_tx_power_capability Min. Tx Power in Power Capability IE
+ *  @param max_tx_power_capability Max. Tx Power in Power Capability IE
+ *
+ *  @return                        The len increased
+ */
+static t_u32
+wlan_11h_set_local_power_constraint_tlv(t_u8 ** ppbuffer,
+                                        t_u8 channel,
+                                        t_u8 power_constraint,
+                                        t_u8 min_tx_power_capability,
+                                        t_u8 max_tx_power_capability)
+{
+    MrvlIEtypes_PowerCapability_t *pcap;
+    MrvlIEtypes_LocalPowerConstraint_t *pconstraint;
+    t_u8 *startPtr = MNULL;
+
+    ENTER();
+
+    /* Null Checks */
+    if ((ppbuffer == MNULL) || (((t_u8 *) (*ppbuffer)) == MNULL)) {
+        LEAVE();
+        return 0;
+    }
+
+    startPtr = (t_u8 *) (*ppbuffer);
+
+    PRINTM(MINFO,
+           "11h: Set local power constraint = %d channel=%d min_tx_pwr=%d max_tx_pwr=%d\n",
+           power_constraint, channel, min_tx_power_capability,
+           max_tx_power_capability);
+
+    pcap = (MrvlIEtypes_PowerCapability_t *) * ppbuffer;
+    pcap->header.type = wlan_cpu_to_le16(TLV_TYPE_POWER_CAPABILITY);
+    pcap->header.len = wlan_cpu_to_le16(2);
+    pcap->min_power = min_tx_power_capability;
+    pcap->max_power = max_tx_power_capability;
+    *ppbuffer += sizeof(MrvlIEtypesHeader_t) + 2;
+
+    pconstraint = (MrvlIEtypes_LocalPowerConstraint_t *) * ppbuffer;
+    pconstraint->header.type = wlan_cpu_to_le16(TLV_TYPE_POWER_CONSTRAINT);
+    pconstraint->header.len = wlan_cpu_to_le16(2);
+    pconstraint->chan = channel;
+    pconstraint->constraint = power_constraint;
+    *ppbuffer += sizeof(MrvlIEtypesHeader_t) + 2;
+
+    LEAVE();
+    return (t_u32) (*ppbuffer - startPtr);
+}
+
+/**
+ *  @brief  Utility function to process a join to an infrastructure BSS
+ *
+ *  @param priv          Private driver information structure
+ *  @param ppbuffer      Output parameter: Pointer to the TLV output buffer,
+ *                       modified on return to point after the appended 11h TLVs
+ *  @param band          Band on which we are joining the BSS
+ *  @param channel       Channel on which we are joining the BSS
+ *  @param p11h_bss_info Pointer to the 11h BSS information for this network
+ *                       that was parsed out of the scan response.
+ *
+ *  @return              Integer number of bytes appended to the TLV output
+ *                       buffer (ppbuffer)
+ */
+static t_u32
+wlan_11h_process_infra_join(mlan_private * priv,
+                            t_u8 ** ppbuffer,
+                            t_u8 band,
+                            t_u32 channel, wlan_11h_bss_info_t * p11h_bss_info)
+{
+    MrvlIEtypesHeader_t ie_header;
+    IEEEtypes_SupportedChannels_t sup_chan_ie;
+    t_u32 ret_len = 0;
+    t_u16 sup_chan_len = 0;
+
+    ENTER();
+
+    /* Null Checks */
+    if ((ppbuffer == MNULL) || (((t_u8 *) (*ppbuffer)) == MNULL)) {
+        LEAVE();
+        return 0;
+    }
+
+    ret_len += wlan_11h_set_local_power_constraint_tlv(ppbuffer, (t_u8) channel,
+                                                       (t_u8) p11h_bss_info->
+                                                       power_constraint.
+                                                       local_constraint,
+                                                       (t_u8) priv->adapter->
+                                                       state_11h.
+                                                       min_tx_power_capability,
+                                                       (t_u8) priv->adapter->
+                                                       state_11h.
+                                                       max_tx_power_capability);
+
+    /* Setup the Supported Channels IE */
+    sup_chan_len = wlan_11h_set_supp_channels_ie(priv, band, &sup_chan_ie);
+
+    /* 
+     * If we returned a valid Supported Channels IE, wrap and append it
+     */
+    if (sup_chan_len) {
+        /* Wrap the supported channels IE with a passthrough TLV type */
+        ie_header.type = wlan_cpu_to_le16(TLV_TYPE_PASSTHROUGH);
+        ie_header.len = sup_chan_len;
+        memcpy(priv->adapter, *ppbuffer, &ie_header, sizeof(ie_header));
+
+        /* Increment the return size and the return buffer pointer param */
+        *ppbuffer += sizeof(ie_header);
+        ret_len += sizeof(ie_header);
+
+        /* Copy the supported channels IE to the output buf, advance pointer */
+        memcpy(priv->adapter, *ppbuffer, &sup_chan_ie, sup_chan_len);
+        *ppbuffer += sup_chan_len;
+        ret_len += sup_chan_len;
+    }
+
+    LEAVE();
+    return ret_len;
+}
+
+/**
+ *  @brief Utility function to process a start or join to an adhoc network
+ *
+ *  Add the elements to the TLV buffer needed in the start/join adhoc commands:
+ *       - IBSS DFS IE
+ *       - Quiet IE
+ *
+ *  Also send the local constraint to the firmware in a TPC_INFO command.
+ *
+ *  @param priv          Private driver information structure
+ *  @param ppbuffer      Output parameter: Pointer to the TLV output buffer,
+ *                       modified on return to point after the appended 11h TLVs
+ *  @param channel       Channel on which we are starting/joining the IBSS
+ *  @param p11h_bss_info Pointer to the 11h BSS information for this network
+ *                       that was parsed out of the scan response.  NULL
+ *                       indicates we are starting the adhoc network
+ *
+ *  @return              Integer number of bytes appended to the TLV output
+ *                       buffer (ppbuffer)
+ */
+static t_u32
+wlan_11h_process_adhoc(mlan_private * priv,
+                       t_u8 ** ppbuffer,
+                       t_u32 channel, wlan_11h_bss_info_t * p11h_bss_info)
+{
+    IEEEtypes_IBSS_DFS_t dfs_elem;
+    t_u32 size_appended;
+    t_u32 ret_len = 0;
+    t_s8 local_constraint = 0;
+    mlan_adapter *adapter = priv->adapter;
+
+    ENTER();
+
+#ifdef STA_SUPPORT
+    /* Format our own IBSS DFS Element.  Include our channel map fields */
+    wlan_11h_set_ibss_dfs_ie(priv, &dfs_elem);
+#endif
+
+    if (p11h_bss_info) {
+        /* 
+         * Copy the DFS Owner/Recovery Interval from the BSS we are joining
+         */
+        memcpy(adapter, dfs_elem.dfs_owner,
+               p11h_bss_info->ibss_dfs.dfs_owner, sizeof(dfs_elem.dfs_owner));
+        dfs_elem.dfs_recovery_interval =
+            p11h_bss_info->ibss_dfs.dfs_recovery_interval;
+    }
+
+    /* Append the dfs element to the TLV buffer */
+    size_appended =
+        wlan_11h_convert_ieee_to_mrvl_ie(adapter, (t_u8 *) * ppbuffer,
+                                         (t_u8 *) & dfs_elem);
+
+    HEXDUMP("11h: IBSS-DFS", (t_u8 *) * ppbuffer, size_appended);
+    *ppbuffer += size_appended;
+    ret_len += size_appended;
+
+    /* 
+     * Check to see if we are joining a network.  Join is indicated by the
+     *   BSS Info pointer being valid (not NULL)
+     */
+    if (p11h_bss_info) {
+        /* 
+         * If there was a quiet element, include it in adhoc join command
+         */
+        if (p11h_bss_info->quiet.element_id == QUIET) {
+            size_appended
+                = wlan_11h_convert_ieee_to_mrvl_ie(adapter, (t_u8 *) * ppbuffer,
+                                                   (t_u8 *) & p11h_bss_info->
+                                                   quiet);
+            HEXDUMP("11h: Quiet", (t_u8 *) * ppbuffer, size_appended);
+            *ppbuffer += size_appended;
+            ret_len += size_appended;
+        }
+
+        /* Copy the local constraint from the network */
+        local_constraint = p11h_bss_info->power_constraint.local_constraint;
+    } else {
+        /* 
+         * If we are the adhoc starter, we can add a quiet element
+         */
+        if (adapter->state_11h.quiet_ie.quiet_period) {
+            size_appended =
+                wlan_11h_convert_ieee_to_mrvl_ie(adapter, (t_u8 *) * ppbuffer,
+                                                 (t_u8 *) & adapter->state_11h.
+                                                 quiet_ie);
+            HEXDUMP("11h: Quiet", (t_u8 *) * ppbuffer, size_appended);
+            *ppbuffer += size_appended;
+            ret_len += size_appended;
+        }
+        /* Use the local_constraint configured in the driver state */
+        local_constraint = adapter->state_11h.usr_def_power_constraint;
+    }
+
+    PRINTM(MINFO, "WEILIE 1: ppbuffer = %p\n", *ppbuffer);
+
+    ret_len +=
+        wlan_11h_set_local_power_constraint_tlv(ppbuffer, (t_u8) channel,
+                                                (t_u8) local_constraint,
+                                                (t_u8) priv->adapter->state_11h.
+                                                min_tx_power_capability,
+                                                (t_u8) priv->adapter->state_11h.
+                                                max_tx_power_capability);
+    PRINTM(MINFO, "WEILIE 2: ppbuffer = %p\n", *ppbuffer);
+
+    LEAVE();
+    return ret_len;
+}
+
+/**
+ *  @brief Return whether the driver has enabled 11h for the interface
+ *
+ *  Association/Join commands are dynamic in that they enable 11h in the
+ *    driver/firmware when they are detected in the existing BSS.
+ *
+ *  @param priv  Private driver information structure
+ *
+ *  @return
+ *    - MTRUE if 11h is enabled
+ *    - MFALSE otherwise
+ */
+static t_bool
+wlan_11h_is_enabled(mlan_private * priv)
+{
+    ENTER();
+    LEAVE();
+    return (priv->intf_state_11h.is_11h_enabled);
+}
+
+/********************************************************
+                Global functions
+********************************************************/
+
+/**
+ *  @brief Query 11h firmware enabled state.
+ *
+ *  Return whether the firmware currently has 11h extensions enabled
+ *
+ *  @param priv  Private driver information structure
+ *
+ *  @return
+ *    - MTRUE if 11h has been activated in the firmware
+ *    - MFALSE otherwise
+ *
+ *  @sa wlan_11h_activate
+ */
+t_bool
+wlan_11h_is_active(mlan_private * priv)
+{
+    ENTER();
+    LEAVE();
+    return (priv->intf_state_11h.is_11h_active);
+}
+
+/**
+ *  @brief Enable the transmit interface and record the state.
+ *
+ *  @param priv  Private driver information structure
+ *
+ *  @return      N/A
+ */
+t_void
+wlan_11h_tx_enable(mlan_private * priv)
+{
+    ENTER();
+    if (priv->intf_state_11h.tx_disabled) {
+        wlan_recv_event(priv, MLAN_EVENT_ID_FW_START_TX, MNULL);
+        priv->intf_state_11h.tx_disabled = MFALSE;
+    }
+    LEAVE();
+}
+
+/**
+ *  @brief Disable the transmit interface and record the state.
+ *
+ *  @param priv  Private driver information structure
+ *
+ *  @return      N/A
+ */
+t_void
+wlan_11h_tx_disable(mlan_private * priv)
+{
+    ENTER();
+    if (!priv->intf_state_11h.tx_disabled) {
+        priv->intf_state_11h.tx_disabled = MTRUE;
+        wlan_recv_event(priv, MLAN_EVENT_ID_FW_STOP_TX, MNULL);
+    }
+    LEAVE();
+}
+
+/**
+ *  @brief Enable or Disable the 11h extensions in the firmware
+ *
+ *  @param priv         Private driver information structure
+ *  @param pioctl_buf   A pointer to MLAN IOCTL Request buffer
+ *  @param flag         Enable 11h if MTRUE, disable otherwise
+ *
+ *  @return      MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_11h_activate(mlan_private * priv, t_void * pioctl_buf, t_bool flag)
+{
+    t_u32 enable = flag & ENABLE_11H_MASK;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    /* 
+     * Send cmd to FW to enable/disable 11h function in firmware
+     */
+    ret = wlan_prepare_cmd(priv,
+                           HostCmd_CMD_802_11_SNMP_MIB,
+                           HostCmd_ACT_GEN_SET,
+                           Dot11H_i, (t_void *) pioctl_buf, &enable);
+    if (ret)
+        ret = MLAN_STATUS_FAILURE;
+    else
+        /* Set boolean flag in driver 11h state */
+        priv->intf_state_11h.is_11h_active = flag;
+
+    PRINTM(MINFO, "11h: %s\n", flag ? "Activate" : "Deactivate");
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Initialize the 11h parameters and enable 11h when starting an IBSS
+ *
+ *  @param adapter mlan_adapter structure
+ *
+ *  @return      N/A
+ */
+t_void
+wlan_11h_init(mlan_adapter * adapter)
+{
+    wlan_11h_device_state_t *pstate_11h = &adapter->state_11h;
+    IEEEtypes_Quiet_t *pquiet = &adapter->state_11h.quiet_ie;
+
+    ENTER();
+
+    /* Initialize 11H struct */
+    pstate_11h->usr_def_power_constraint = WLAN_11H_TPC_POWERCONSTRAINT;
+    pstate_11h->min_tx_power_capability = WLAN_11H_TPC_POWERCAPABILITY_MIN;
+    pstate_11h->max_tx_power_capability = WLAN_11H_TPC_POWERCAPABILITY_MAX;
+
+    pstate_11h->recvd_chanswann_event = MFALSE;
+
+    /* Initialize quiet_ie */
+    memset(adapter, pquiet, 0, sizeof(IEEEtypes_Quiet_t));
+    pquiet->element_id = QUIET;
+    pquiet->len = (sizeof(pquiet->quiet_count) + sizeof(pquiet->quiet_period)
+                   + sizeof(pquiet->quiet_duration)
+                   + sizeof(pquiet->quiet_offset));
+
+    LEAVE();
+}
+
+/**
+ *  @brief Cleanup for the 11h parameters that allocated memory, etc.
+ *
+ *  @param adapter mlan_adapter structure
+ *
+ *  @return      N/A
+ */
+t_void
+wlan_11h_cleanup(mlan_adapter * adapter)
+{
+
+    ENTER();
+
+    LEAVE();
+}
+
+/**
+ *  @brief Initialize the 11h parameters and enable 11h when starting an IBSS
+ *
+ *  @param pmpriv Pointer to mlan_private structure
+ *
+ *  @return      N/A
+ */
+t_void
+wlan_11h_priv_init(mlan_private * pmpriv)
+{
+    wlan_11h_interface_state_t *pistate_11h = &pmpriv->intf_state_11h;
+
+    ENTER();
+
+    pistate_11h->is_11h_enabled = MTRUE;
+    pistate_11h->is_11h_active = MFALSE;
+    pistate_11h->adhoc_auto_sel_chan = MTRUE;
+    pistate_11h->tx_disabled = MFALSE;
+
+    LEAVE();
+}
+
+/**
+ *  @brief Retrieve a randomly selected starting channel if needed for 11h
+ *
+ *  If 11h is enabled and an A-Band channel start band preference
+ *    configured in the driver, the start channel must be random in order
+ *    to meet with
+ *
+ *  @param priv  Private driver information structure
+ *
+ *  @return      Starting channel
+ */
+t_u8
+wlan_11h_get_adhoc_start_channel(mlan_private * priv)
+{
+    t_u8 start_chn;
+    mlan_adapter *adapter = priv->adapter;
+    t_u32 region;
+    t_u32 rand_entry;
+    region_chan_t *chn_tbl;
+
+    ENTER();
+
+    /* 
+     * Set start_chn to the Default.  Used if 11h is disabled or the band
+     *   does not require 11h support.
+     */
+    start_chn = DEFAULT_AD_HOC_CHANNEL;
+
+    /* 
+     * Check that we are looking for a channel in the A Band
+     */
+    if ((adapter->adhoc_start_band & BAND_A)
+        || (adapter->adhoc_start_band & BAND_AN)
+        ) {
+        /* 
+         * Set default to the A Band default. Used if random selection fails
+         *   or if 11h is not enabled
+         */
+        start_chn = DEFAULT_AD_HOC_CHANNEL_A;
+
+        /* 
+         * Check that 11h is enabled in the driver
+         */
+        if (wlan_11h_is_enabled(priv)) {
+            /* 
+             * Search the region_channel tables for a channel table
+             *   that is marked for the A Band.
+             */
+            for (region = 0; (region < MAX_REGION_CHANNEL_NUM); region++) {
+                chn_tbl = &adapter->region_channel[region];
+
+                /* Check if table is valid and marked for A Band */
+                if (chn_tbl->valid
+                    && chn_tbl->region == adapter->region_code
+                    && chn_tbl->band & BAND_A) {
+                    /* 
+                     * Set the start channel.  Get a random number and
+                     *   use it to pick an entry in the table between 0
+                     *   and the number of channels in the table (NumCFP).
+                     */
+                    rand_entry =
+                        wlan_11h_get_random_num(adapter) % chn_tbl->num_cfp;
+                    start_chn = (t_u8) chn_tbl->pcfp[rand_entry].channel;
+                }
+            }
+        }
+    }
+
+    PRINTM(MINFO, "11h: %s: AdHoc Channel set to %u\n",
+           wlan_11h_is_enabled(priv) ? "Enabled" : "Disabled", start_chn);
+
+    LEAVE();
+    return start_chn;
+}
+
+#if defined(STA_SUPPORT)
+/**
+ *  @brief Check if the current region's regulations require the input channel
+ *         to be scanned for radar.
+ *
+ *  Based on statically defined requirements for sub-bands per regulatory
+ *    agency requirements.
+ *
+ *  Used in adhoc start to determine if channel availability check is required
+ *
+ *  @param priv    Private driver information structure
+ *  @param channel Channel to determine radar detection requirements
+ *
+ *  @return
+ *    - MTRUE if radar detection is required
+ *    - MFALSE otherwise
+ */
+/**  @sa wlan_11h_radar_detected
+ */
+t_bool
+wlan_11h_radar_detect_required(mlan_private * priv, t_u8 channel)
+{
+    t_bool required = MFALSE;
+
+    ENTER();
+
+    /* 
+     *   No checks for 11h or measurement code being enabled is placed here
+     *   since regulatory requirements exist whether we support them or not.
+     */
+
+    required = wlan_get_cfp_radar_detect(priv, channel);
+
+    PRINTM(MINFO, "11h: Radar detection in region %#02x "
+           "is %srequired for channel %d\n",
+           priv->adapter->region_code, (required ? "" : "not "), channel);
+
+    if (required == MTRUE && priv->media_connected == MTRUE
+        && priv->curr_bss_params.bss_descriptor.channel == channel) {
+        required = MFALSE;
+
+        PRINTM(MINFO, "11h: Radar detection not required. "
+               "Already operating on the channel\n");
+    }
+
+    LEAVE();
+    return required;
+}
+#endif
+
+#ifdef STA_SUPPORT
+/**
+ *  @brief Perform a radar measurement and report the result if required on
+ *         given channel
+ *
+ *  Check to see if the provided channel requires a channel availability
+ *    check (60 second radar detection measurement).  If required, perform
+ *    measurement, stalling calling thread until the measurement completes
+ *    and then report result.
+ *
+ *  Used when starting an adhoc network.
+ *
+ *  @param priv         Private driver information structure
+ *  @param pioctl_req   Pointer to IOCTL request buffer
+ *  @param channel      Channel on which to perform radar measurement
+ *
+ *  @return
+ *    - MTRUE if radar has been detected
+ *    - MFALSE if radar detection is not required or radar has not been detected
+ *    - < 0 for error during radar detection (if required)
+ *
+ *  @sa wlan_11h_radar_detect_required
+ */
+t_s32
+wlan_11h_radar_detected(mlan_private * priv, pmlan_ioctl_req pioctl_req,
+                        t_u8 channel)
+{
+    t_s32 ret;
+    HostCmd_DS_MEASUREMENT_REQUEST meas_req;
+    HostCmd_DS_MEASUREMENT_REPORT meas_rpt;
+
+    ENTER();
+
+    /* 
+     * If the channel requires radar, default the return value to it being
+     *   detected.
+     */
+    ret = wlan_11h_radar_detect_required(priv, channel);
+
+    memset(priv->adapter, &meas_req, 0x00, sizeof(meas_req));
+    memset(priv->adapter, &meas_rpt, 0x00, sizeof(meas_rpt));
+
+    /* 
+     * Send a basic measurement request on the indicated channel for the
+     *   required channel availability check time.
+     */
+    meas_req.meas_type = WLAN_MEAS_BASIC;
+    meas_req.req.basic.channel = channel;
+    meas_req.req.basic.duration = WLAN_11H_CHANNEL_AVAIL_CHECK_DURATION;
+
+    /* 
+     * Set the STA that we are requesting the measurement from to our own
+     *   mac address, causing our firmware to perform the measurement itself
+     */
+    memcpy(priv->adapter, meas_req.mac_addr, priv->curr_addr,
+           sizeof(meas_req.mac_addr));
+
+    /* 
+     * Send the measurement request and timeout duration to wait for
+     *   the command to spend until the measurement report is received
+     *   from the firmware.  If the command fails, the default ret value set
+     *   above will be returned.
+     */
+    ret = wlan_meas_util_send_req(priv, &meas_req, meas_req.req.basic.duration,
+                                  pioctl_req, &meas_rpt);
+
+    LEAVE();
+    return ret;
+}
+#endif /* STA_SUPPORT */
+
+/**
+ *  @brief Process an TLV buffer for a pending BSS Adhoc start command.
+ *
+ *  Activate 11h functionality in the firmware if driver has is enabled
+ *    for 11h (configured by the application via IOCTL).
+ *
+ *  @param priv          Private driver information structure
+ *  @param ppbuffer      Output parameter: Pointer to the TLV output buffer,
+ *                       modified on return to point after the appended 11h TLVs
+ *  @param pcap_info     Pointer to the capability info for the BSS to join
+ *  @param channel       Channel on which we are starting the IBSS
+ *  @param p11h_bss_info Input/Output parameter: Pointer to the 11h BSS
+ *                       information for this network that we are establishing.
+ *                       11h sensed flag set on output if warranted.
+ *
+ *  @return
+ *      - MLAN_STATUS_SUCCESS if 11h is disabled
+ *      - Integer number of bytes appended to the TLV output buffer (ppbuffer)
+ *      - < 0 for error (e.g. radar detected on channel)
+ */
+t_s32
+wlan_11h_process_start(mlan_private * priv,
+                       t_u8 ** ppbuffer,
+                       IEEEtypes_CapInfo_t * pcap_info,
+                       t_u32 channel, wlan_11h_bss_info_t * p11h_bss_info)
+{
+    mlan_adapter *adapter = priv->adapter;
+    t_s32 ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+    if (wlan_11h_is_enabled(priv)
+        && ((adapter->adhoc_start_band & BAND_A)
+            || (adapter->adhoc_start_band & BAND_AN)
+        )
+        ) {
+        if (!wlan_11d_is_enabled(priv)) {
+            /* No use having 11h enabled without 11d enabled */
+            wlan_11d_enable(priv, MNULL, ENABLE_11D);
+#ifdef STA_SUPPORT
+            wlan_11d_create_dnld_countryinfo(priv, adapter->adhoc_start_band);
+#endif
+        }
+
+        /* Activate 11h functions in firmware, turns on capability bit */
+        wlan_11h_activate(priv, MNULL, MTRUE);
+        pcap_info->spectrum_mgmt = MTRUE;
+
+        /* Set flag indicating this BSS we are starting is using 11h */
+        p11h_bss_info->sensed_11h = MTRUE;
+
+        ret = wlan_11h_process_adhoc(priv, ppbuffer, channel, MNULL);
+    } else {
+        /* Deactivate 11h functions in the firmware */
+        wlan_11h_activate(priv, MNULL, MFALSE);
+        pcap_info->spectrum_mgmt = MFALSE;
+    }
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Process an TLV buffer for a pending BSS Join command for
+ *         both adhoc and infra networks
+ *
+ *  The TLV command processing for a BSS join for either adhoc or
+ *    infrastructure network is performed with this function.  The
+ *    capability bits are inspected for the IBSS flag and the appropriate
+ *    local routines are called to setup the necessary TLVs.
+ *
+ *  Activate 11h functionality in the firmware if the spectrum management
+ *    capability bit is found in the network information for the BSS we are
+ *    joining.
+ *
+ *  @param priv          Private driver information structure
+ *  @param ppbuffer      Output parameter: Pointer to the TLV output buffer,
+ *                       modified on return to point after the appended 11h TLVs
+ *  @param pcap_info     Pointer to the capability info for the BSS to join
+ *  @param band          Band on which we are joining the BSS
+ *  @param channel       Channel on which we are joining the BSS
+ *  @param p11h_bss_info Pointer to the 11h BSS information for this
+ *                       network that was parsed out of the scan response.
+ *
+ *  @return              Integer number of bytes appended to the TLV output
+ *                       buffer (ppbuffer), MLAN_STATUS_FAILURE (-1),
+ *                       or MLAN_STATUS_SUCCESS (0)
+ */
+t_s32
+wlan_11h_process_join(mlan_private * priv,
+                      t_u8 ** ppbuffer,
+                      IEEEtypes_CapInfo_t * pcap_info,
+                      t_u8 band,
+                      t_u32 channel, wlan_11h_bss_info_t * p11h_bss_info)
+{
+    t_s32 ret = 0;
+
+    ENTER();
+
+    if (priv->media_connected == MTRUE) {
+        if (wlan_11h_is_active(priv) == p11h_bss_info->sensed_11h) {
+            /* Assume DFS parameters are the same for roaming as long as the
+               current & next APs have the same spectrum mgmt capability bit
+               setting */
+            ret = MLAN_STATUS_SUCCESS;
+
+        } else {
+            /* No support for roaming between DFS/non-DFS yet */
+            ret = MLAN_STATUS_FAILURE;
+        }
+
+        LEAVE();
+        return ret;
+    }
+
+    if (p11h_bss_info->sensed_11h) {
+        if (!wlan_11d_is_enabled(priv)) {
+            /* No use having 11h enabled without 11d enabled */
+            wlan_11d_enable(priv, MNULL, ENABLE_11D);
+#ifdef STA_SUPPORT
+            wlan_11d_parse_dnld_countryinfo(priv, priv->pattempted_bss_desc);
+#endif
+        }
+        /* Activate 11h functions in firmware, turns on capability bit */
+        wlan_11h_activate(priv, MNULL, MTRUE);
+        pcap_info->spectrum_mgmt = MTRUE;
+
+        if (pcap_info->ibss) {
+            PRINTM(MINFO, "11h: Adhoc join: Sensed\n");
+            ret = wlan_11h_process_adhoc(priv, ppbuffer, channel,
+                                         p11h_bss_info);
+        } else {
+            PRINTM(MINFO, "11h: Infra join: Sensed\n");
+            ret = wlan_11h_process_infra_join(priv, ppbuffer, band,
+                                              channel, p11h_bss_info);
+        }
+    } else {
+        /* Deactivate 11h functions in the firmware */
+        wlan_11h_activate(priv, MNULL, MFALSE);
+        pcap_info->spectrum_mgmt = MFALSE;
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *
+ *  @brief  Prepare the HostCmd_DS_Command structure for an 11h command.
+ *
+ *  Use the Command field to determine if the command being set up is for
+ *     11h and call one of the local command handlers accordingly for:
+ *
+ *        - HostCmd_CMD_802_11_TPC_ADAPT_REQ
+ *        - HostCmd_CMD_802_11_TPC_INFO
+ *        - HostCmd_CMD_802_11_CHAN_SW_ANN
+ */
+/**
+ *  @param priv      Private driver information structure
+ *  @param pcmd_ptr  Output parameter: Pointer to the command being prepared
+ *                   for the firmware
+ *  @param pinfo_buf Void buffer pass through with data necessary for a
+ *                   specific command type
+ */
+/**  @return          MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+/**  @sa wlan_11h_cmd_tpc_request
+ *  @sa wlan_11h_cmd_tpc_info
+ *  @sa wlan_11h_cmd_chan_sw_ann
+ */
+mlan_status
+wlan_11h_cmd_process(mlan_private * priv,
+                     HostCmd_DS_COMMAND * pcmd_ptr, const t_void * pinfo_buf)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+    switch (pcmd_ptr->command) {
+    case HostCmd_CMD_802_11_TPC_ADAPT_REQ:
+        ret = wlan_11h_cmd_tpc_request(priv, pcmd_ptr, pinfo_buf);
+        break;
+    case HostCmd_CMD_802_11_TPC_INFO:
+        ret = wlan_11h_cmd_tpc_info(priv, pcmd_ptr, pinfo_buf);
+        break;
+    case HostCmd_CMD_802_11_CHAN_SW_ANN:
+        ret = wlan_11h_cmd_chan_sw_ann(priv, pcmd_ptr, pinfo_buf);
+        break;
+    default:
+        ret = MLAN_STATUS_FAILURE;
+    }
+
+    pcmd_ptr->command = wlan_cpu_to_le16(pcmd_ptr->command);
+    pcmd_ptr->size = wlan_cpu_to_le16(pcmd_ptr->size);
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Handle the command response from the firmware if from an 11h command
+ *
+ *  Use the Command field to determine if the command response being
+ *    is for 11h.  Call the local command response handler accordingly for:
+ *
+ *        - HostCmd_CMD_802_11_TPC_ADAPT_REQ
+ *        - HostCmd_CMD_802_11_TPC_INFO
+ *        - HostCmd_CMD_802_11_CHAN_SW_ANN
+ */
+/**
+ *  @param priv  Private driver information structure
+ *  @param resp  HostCmd_DS_COMMAND struct returned from the firmware
+ *               command
+ *
+ *  @return      MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_11h_cmdresp_process(mlan_private * priv, const HostCmd_DS_COMMAND * resp)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+    switch (resp->command) {
+    case HostCmd_CMD_802_11_TPC_ADAPT_REQ:
+        HEXDUMP("11h: TPC REQUEST Rsp:", (t_u8 *) resp, (t_u32) resp->size);
+        memcpy(priv->adapter, priv->adapter->curr_cmd->pdata_buf,
+               &resp->params.tpc_req, sizeof(HostCmd_DS_802_11_TPC_ADAPT_REQ));
+        break;
+
+    case HostCmd_CMD_802_11_TPC_INFO:
+        HEXDUMP("11h: TPC INFO Rsp Data:", (t_u8 *) resp, (t_u32) resp->size);
+        break;
+
+    case HostCmd_CMD_802_11_CHAN_SW_ANN:
+        PRINTM(MINFO, "11h: Ret ChSwAnn: Sz=%u, Seq=%u, Ret=%u\n",
+               resp->size, resp->seq_num, resp->result);
+        break;
+
+    default:
+        ret = MLAN_STATUS_FAILURE;
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Process an element from a scan response, copy relevant info for 11h
+ *
+ *  @param pmadapter Pointer to mlan_adapter
+ *  @param p11h_bss_info Output parameter: Pointer to the 11h BSS information
+ *                       for the network that is being processed
+ *  @param pelement      Pointer to the current IE we are inspecting for 11h
+ *                       relevance
+ *
+ *  @return              MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_11h_process_bss_elem(mlan_adapter * pmadapter,
+                          wlan_11h_bss_info_t * p11h_bss_info,
+                          const t_u8 * pelement)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+    switch (*pelement) {
+    case POWER_CONSTRAINT:
+        PRINTM(MINFO, "11h: Power Constraint IE Found\n");
+        p11h_bss_info->sensed_11h = MTRUE;
+        memcpy(pmadapter, &p11h_bss_info->power_constraint, pelement,
+               sizeof(IEEEtypes_PowerConstraint_t));
+        break;
+
+    case POWER_CAPABILITY:
+        PRINTM(MINFO, "11h: Power Capability IE Found\n");
+        p11h_bss_info->sensed_11h = MTRUE;
+        memcpy(pmadapter, &p11h_bss_info->power_capability, pelement,
+               sizeof(IEEEtypes_PowerCapability_t));
+        break;
+
+    case TPC_REPORT:
+        PRINTM(MINFO, "11h: Tpc Report IE Found\n");
+        p11h_bss_info->sensed_11h = MTRUE;
+        memcpy(pmadapter, &p11h_bss_info->tpc_report, pelement,
+               sizeof(IEEEtypes_TPCReport_t));
+        break;
+
+    case CHANNEL_SWITCH_ANN:
+        PRINTM(MINFO, "11h: Channel Switch Ann IE Found\n");
+        p11h_bss_info->sensed_11h = MTRUE;
+        memcpy(pmadapter, &p11h_bss_info->chan_switch_ann, pelement,
+               sizeof(IEEEtypes_ChanSwitchAnn_t));
+        break;
+
+    case QUIET:
+        PRINTM(MINFO, "11h: Quiet IE Found\n");
+        p11h_bss_info->sensed_11h = MTRUE;
+        memcpy(pmadapter, &p11h_bss_info->quiet, pelement,
+               sizeof(IEEEtypes_Quiet_t));
+        break;
+
+    case IBSS_DFS:
+        PRINTM(MINFO, "11h: Ibss Dfs IE Found\n");
+        p11h_bss_info->sensed_11h = MTRUE;
+        memcpy(pmadapter, &p11h_bss_info->ibss_dfs, pelement,
+               sizeof(IEEEtypes_IBSS_DFS_t));
+        break;
+
+    case SUPPORTED_CHANNELS:
+    case TPC_REQUEST:
+        /* 
+         * These elements are not in beacons/probe responses.  Included here
+         *   to cover set of enumerated 11h elements.
+         */
+        break;
+
+    default:
+        ret = MLAN_STATUS_FAILURE;
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Driver handling for CHANNEL_SWITCH_ANN event
+ *
+ *  @param priv Pointer to mlan_private
+ *
+ *  @return MLAN_STATUS_SUCCESS, MLAN_STATUS_FAILURE or MLAN_STATUS_PENDING
+ */
+mlan_status
+wlan_11h_handle_event_chanswann(mlan_private * priv)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    ENTER();
+    priv->adapter->state_11h.recvd_chanswann_event = MTRUE;
+
+#ifdef STA_SUPPORT
+    /* do directed deauth.  priv flag above will cause different reason code */
+    PRINTM(MINFO, "11h: handle_event_chanswann() - sending deauth\n");
+    ret = wlan_disconnect(priv, MNULL,
+                          &priv->curr_bss_params.bss_descriptor.mac_address);
+
+    /* clear region table so next scan will be all passive */
+    PRINTM(MINFO, "11h: handle_event_chanswann() - clear region table\n");
+    wlan_11d_clear_parsedtable(priv);
+#endif
+
+    priv->adapter->state_11h.recvd_chanswann_event = MFALSE;
+    LEAVE();
+    return ret;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_11h.h linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_11h.h
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_11h.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_11h.h	2017-09-23 03:42:50.094674832 +0800
@@ -0,0 +1,112 @@
+/** @file mlan_11h.h
+ *
+ *  @brief This header file contains data structures and
+ *  function declarations of 802.11h
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/*************************************************************
+Change Log:
+    03/26/2009: initial creation
+*************************************************************/
+
+#ifndef _MLAN_11H_
+#define _MLAN_11H_
+
+/** 11H OID bitmasks */
+#define ENABLE_11H_MASK         MBIT(0)
+
+/**
+ *  11H APIs
+ */
+
+/** Return 1 if 11h is active in the firmware, 0 if it is inactive */
+extern t_bool wlan_11h_is_active(mlan_private * priv);
+
+/** Enable the tx interface and record the new transmit state */
+extern void wlan_11h_tx_enable(mlan_private * priv);
+
+/** Disable the tx interface and record the new transmit state */
+extern void wlan_11h_tx_disable(mlan_private * priv);
+
+/** Activate 11h extensions in the firmware */
+extern mlan_status wlan_11h_activate(mlan_private * priv, t_void * pioctl_buf,
+                                     t_bool flag);
+
+/** Initialize the 11h device structure */
+extern void wlan_11h_init(mlan_adapter * pmadapter);
+
+/** Cleanup for the 11h device structure */
+extern void wlan_11h_cleanup(mlan_adapter * pmadapter);
+
+/** Initialize the 11h interface structure */
+extern void wlan_11h_priv_init(mlan_private * pmpriv);
+
+/** Get an initial random channel to start an adhoc network on */
+extern t_u8 wlan_11h_get_adhoc_start_channel(mlan_private * priv);
+
+/** Check if radar detection is required on the specified channel */
+extern t_bool wlan_11h_radar_detect_required(mlan_private * priv, t_u8 channel);
+
+/** Perform a standard availibility check on the specified channel */
+extern t_s32 wlan_11h_radar_detected(mlan_private * priv,
+                                     pmlan_ioctl_req pioctl_req, t_u8 channel);
+
+/** Check previously issued radar report for a channel */
+extern mlan_status wlan_11h_check_chan_report(mlan_private * priv, t_u8 chan);
+
+/** Add any 11h TLVs necessary to complete an adhoc start command */
+extern t_s32 wlan_11h_process_start(mlan_private * priv,
+                                    t_u8 ** ppbuffer,
+                                    IEEEtypes_CapInfo_t * pcap_info,
+                                    t_u32 channel,
+                                    wlan_11h_bss_info_t * p11h_bss_info);
+
+/** Add any 11h TLVs necessary to complete a join command (adhoc or infra) */
+extern t_s32 wlan_11h_process_join(mlan_private * priv,
+                                   t_u8 ** ppbuffer,
+                                   IEEEtypes_CapInfo_t * pcap_info,
+                                   t_u8 band,
+                                   t_u32 channel,
+                                   wlan_11h_bss_info_t * p11h_bss_info);
+
+/** Complete the firmware command preparation for an 11h command function */
+extern mlan_status wlan_11h_cmd_process(mlan_private * priv,
+                                        HostCmd_DS_COMMAND * pcmd_ptr,
+                                        const t_void * pinfo_buf);
+
+/** Process the response of an 11h firmware command */
+extern mlan_status wlan_11h_cmdresp_process(mlan_private * priv,
+                                            const HostCmd_DS_COMMAND * resp);
+
+/** Receive IEs from scan processing and record any needed info for 11h */
+extern mlan_status wlan_11h_process_bss_elem(mlan_adapter * pmadapter,
+                                             wlan_11h_bss_info_t *
+                                             p11h_bss_info,
+                                             const t_u8 * pelement);
+
+/** Handler for EVENT_CHANNEL_SWITCH_ANN */
+extern mlan_status wlan_11h_handle_event_chanswann(mlan_private * priv);
+
+#endif /*_MLAN_11H_ */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_11n_aggr.c linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_11n_aggr.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_11n_aggr.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_11n_aggr.c	2017-09-23 03:42:50.094674832 +0800
@@ -0,0 +1,507 @@
+/** @file mlan_11n_aggr.c
+ *
+ *  @brief This file contains functions for 11n Aggregation.
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/********************************************************
+Change log:
+    11/10/2008: initial version
+********************************************************/
+
+#include "mlan.h"
+#include "mlan_join.h"
+#include "mlan_util.h"
+#include "mlan_fw.h"
+#include "mlan_main.h"
+#include "mlan_wmm.h"
+#include "mlan_11n.h"
+#include "mlan_11n_aggr.h"
+
+/********************************************************
+    Local Variables
+********************************************************/
+
+/********************************************************
+    Global Variables
+********************************************************/
+
+/********************************************************
+    Local Functions
+********************************************************/
+
+/**
+ *  @brief Aggregate individual packets into one AMSDU packet
+ *
+ *  @param pmadapter A pointer to mlan_adapter structure
+ *  @param amsdu_buf A pointer to packet buffer
+ *  @param data      A pointer to aggregated data packet being formed
+ *  @param pkt_len   Length of current packet to aggregate
+ *  @param pad       Pad
+ *
+ *  @return         Final packet size
+ */
+static int
+wlan_11n_form_amsdu_pkt(pmlan_adapter pmadapter, t_u8 * amsdu_buf, t_u8 * data,
+                        int pkt_len, int *pad)
+{
+    int dt_offset, amsdu_buf_offset;
+    Rfc1042Hdr_t snap = {
+        0xaa,                   /* LLC DSAP */
+        0xaa,                   /* LLC SSAP */
+        0x03,                   /* LLC CTRL */
+        {0x00, 0x00, 0x00},     /* SNAP OUI */
+        0x0000                  /* SNAP type */
+            /* 
+             * This field will be overwritten
+             * later with ethertype
+             */
+    };
+
+    ENTER();
+
+    memcpy(pmadapter, amsdu_buf, data, (MLAN_MAC_ADDR_LENGTH) * 2);
+    dt_offset = amsdu_buf_offset = (MLAN_MAC_ADDR_LENGTH) * 2;
+
+    snap.snap_type = *(t_u16 *) (data + dt_offset);
+    dt_offset += sizeof(t_u16);
+    *(t_u16 *) (amsdu_buf + amsdu_buf_offset) = mlan_htons(pkt_len +
+                                                           LLC_SNAP_LEN -
+                                                           ((2 *
+                                                             MLAN_MAC_ADDR_LENGTH)
+                                                            + sizeof(t_u16)));
+    amsdu_buf_offset += sizeof(t_u16);
+    memcpy(pmadapter, amsdu_buf + amsdu_buf_offset, &snap, LLC_SNAP_LEN);
+    amsdu_buf_offset += LLC_SNAP_LEN;
+
+    memcpy(pmadapter, amsdu_buf + amsdu_buf_offset, data + dt_offset,
+           pkt_len - dt_offset);
+    *pad =
+        (((pkt_len + LLC_SNAP_LEN) & 3)) ? (4 -
+                                            (((pkt_len +
+                                               LLC_SNAP_LEN)) & 3)) : 0;
+
+    LEAVE();
+    return (pkt_len + LLC_SNAP_LEN + *pad);
+}
+
+/**
+ *  @brief Add TxPD to AMSDU header
+ *
+ *  @param priv     A pointer to mlan_private structure
+ *  @param mbuf		Pointer to buffer where the TxPD will be formed 
+ *
+ *  @return		N/A
+ */
+static void
+wlan_11n_form_amsdu_txpd(mlan_private * priv, mlan_buffer * mbuf)
+{
+    TxPD *ptx_pd;
+    mlan_adapter *pmadapter = priv->adapter;
+
+    ENTER();
+
+    ptx_pd = (TxPD *) mbuf->pbuf;
+    memset(pmadapter, ptx_pd, 0, sizeof(TxPD));
+
+    /* 
+     * Original priority has been overwritten 
+     */
+    ptx_pd->priority = (t_u8) mbuf->priority;
+    ptx_pd->pkt_delay_2ms = wlan_wmm_compute_driver_packet_delay(priv, mbuf);
+    ptx_pd->bss_num = GET_BSS_NUM(priv);
+    ptx_pd->bss_type = priv->bss_type;
+    /* Always zero as the data is followed by TxPD */
+    ptx_pd->tx_pkt_offset = sizeof(TxPD);
+    ptx_pd->tx_pkt_type = PKT_TYPE_AMSDU;
+
+    if (ptx_pd->tx_control == 0)
+        /* TxCtrl set by user or default */
+        ptx_pd->tx_control = priv->pkt_tx_ctrl;
+
+    endian_convert_TxPD(ptx_pd);
+
+    LEAVE();
+}
+
+/**
+ *  @brief Update the TxPktLength field in TxPD after the complete AMSDU
+ *  packet is formed
+ *
+ *  @param priv     A pointer to mlan_private structure
+ *  @param mbuf     	TxPD buffer
+ *
+ *  @return		N/A
+ */
+static INLINE void
+wlan_11n_update_pktlen_amsdu_txpd(mlan_private * priv, pmlan_buffer mbuf)
+{
+    TxPD *ptx_pd;
+    ENTER();
+
+    ptx_pd = (TxPD *) mbuf->pbuf;
+    ptx_pd->tx_pkt_length =
+        (t_u16) wlan_cpu_to_le16(mbuf->data_len - sizeof(TxPD));
+#ifdef STA_SUPPORT
+    if ((GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_STA) &&
+        (priv->adapter->pps_uapsd_mode)) {
+        if (MTRUE == wlan_check_last_packet_indication(priv)) {
+            priv->adapter->tx_lock_flag = MTRUE;
+            ptx_pd->flags = MRVDRV_TxPD_POWER_MGMT_LAST_PACKET;
+        }
+    }
+#endif /* STA_SUPPORT */
+    LEAVE();
+}
+
+/**
+ *  @brief Get number of aggregated packets
+ *
+ *  @param data			A pointer to packet data
+ *  @param total_pkt_len	Total packet length
+ *
+ *  @return			Number of packets
+ */
+static int
+wlan_11n_get_num_aggrpkts(t_u8 * data, int total_pkt_len)
+{
+    int pkt_count = 0, pkt_len, pad;
+
+    while (total_pkt_len > 0) {
+        /* Length will be in network format, change it to host */
+        pkt_len = mlan_ntohs((*(t_u16 *) (data + (2 * MLAN_MAC_ADDR_LENGTH))));
+        pad = (((pkt_len + sizeof(Eth803Hdr_t)) & 3)) ?
+            (4 - ((pkt_len + sizeof(Eth803Hdr_t)) & 3)) : 0;
+        data += pkt_len + pad + sizeof(Eth803Hdr_t);
+        total_pkt_len -= pkt_len + pad + sizeof(Eth803Hdr_t);
+        ++pkt_count;
+    }
+
+    return pkt_count;
+}
+
+/********************************************************
+    Global Functions
+********************************************************/
+
+/**
+ *  @brief Deaggregate the received AMSDU packet 
+ *
+ *  @param priv		A pointer to mlan_private structure
+ *  @param pmbuf	A pointer to aggregated data packet
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+mlan_status
+wlan_11n_deaggregate_pkt(mlan_private * priv, pmlan_buffer pmbuf)
+{
+    t_u16 pkt_len;
+    int total_pkt_len;
+    t_u8 *data;
+    int pad;
+    mlan_status ret = MLAN_STATUS_FAILURE;
+    RxPacketHdr_t *prx_pkt;
+    mlan_buffer *daggr_mbuf = MNULL;
+    mlan_adapter *pmadapter = priv->adapter;
+    t_u8 rfc1042_eth_hdr[MLAN_MAC_ADDR_LENGTH] = { 0xaa, 0xaa, 0x03,
+        0x00, 0x00, 0x00
+    };
+
+    ENTER();
+
+    data = (t_u8 *) (pmbuf->pbuf + pmbuf->data_offset);
+    total_pkt_len = pmbuf->data_len;
+
+    /* Sanity test */
+    if (total_pkt_len > MLAN_RX_DATA_BUF_SIZE) {
+        PRINTM(MERROR, "Total packet length greater than tx buffer"
+               " size %d\n", total_pkt_len);
+        goto done;
+    }
+
+    pmbuf->use_count = wlan_11n_get_num_aggrpkts(data, total_pkt_len);
+
+    while (total_pkt_len > 0) {
+        prx_pkt = (RxPacketHdr_t *) data;
+        /* Length will be in network format, change it to host */
+        pkt_len = mlan_ntohs((*(t_u16 *) (data + (2 * MLAN_MAC_ADDR_LENGTH))));
+        if (pkt_len > total_pkt_len) {
+            PRINTM(MERROR,
+                   "Error in packet length: total_pkt_len = %d, pkt_len = %d\n",
+                   total_pkt_len, pkt_len);
+            break;
+        }
+
+        pad = (((pkt_len + sizeof(Eth803Hdr_t)) & 3)) ?
+            (4 - ((pkt_len + sizeof(Eth803Hdr_t)) & 3)) : 0;
+
+        total_pkt_len -= pkt_len + pad + sizeof(Eth803Hdr_t);
+
+        if (memcmp(pmadapter, &prx_pkt->rfc1042_hdr,
+                   rfc1042_eth_hdr, sizeof(rfc1042_eth_hdr)) == 0) {
+            memmove(pmadapter, data + LLC_SNAP_LEN, data, (2 *
+                                                           MLAN_MAC_ADDR_LENGTH));
+            data += LLC_SNAP_LEN;
+            pkt_len += sizeof(Eth803Hdr_t) - LLC_SNAP_LEN;
+        } else {
+            *(t_u16 *) (data + (2 * MLAN_MAC_ADDR_LENGTH))
+                = (t_u16) 0;
+            pkt_len += sizeof(Eth803Hdr_t);
+        }
+        daggr_mbuf = wlan_alloc_mlan_buffer(pmadapter, pkt_len, 0, MFALSE);
+        if (daggr_mbuf == MNULL) {
+            PRINTM(MERROR, "Error allocating daggr mlan_buffer\n");
+            return MLAN_STATUS_FAILURE;
+        }
+        daggr_mbuf->bss_index = pmbuf->bss_index;
+        daggr_mbuf->buf_type = pmbuf->buf_type;
+        daggr_mbuf->data_len = pkt_len;
+        daggr_mbuf->in_ts_sec = pmbuf->in_ts_sec;
+        daggr_mbuf->in_ts_usec = pmbuf->in_ts_usec;
+        daggr_mbuf->pparent = pmbuf;
+        daggr_mbuf->priority = pmbuf->priority;
+        memcpy(pmadapter, daggr_mbuf->pbuf + daggr_mbuf->data_offset, data,
+               pkt_len);
+
+#ifdef UAP_SUPPORT
+        if (GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_UAP)
+            ret = wlan_uap_recv_packet(priv, daggr_mbuf);
+        else
+#endif /* UAP_SUPPORT */
+            ret =
+                pmadapter->callbacks.moal_recv_packet(pmadapter->pmoal_handle,
+                                                      daggr_mbuf);
+
+        switch (ret) {
+        case MLAN_STATUS_PENDING:
+            break;
+        case MLAN_STATUS_FAILURE:
+            PRINTM(MERROR, "Deaggr, send to moal failed\n");
+            daggr_mbuf->status_code = MLAN_ERROR_PKT_INVALID;
+        case MLAN_STATUS_SUCCESS:
+            wlan_recv_packet_complete(pmadapter, daggr_mbuf, ret);
+            break;
+        default:
+            break;
+        }
+
+        data += pkt_len + pad;
+    }
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Aggregate multiple packets into one single AMSDU packet
+ *
+ *  @param priv 	A pointer to mlan_private structure
+ *  @param pra_list	Pointer to the RA List table containing the pointers
+ *  			    to packets.
+ *  @param headroom	Any interface specific headroom that may be need. TxPD 
+ *  				will be formed leaving this headroom.
+ *  @param ptrindex	Pointer index
+ *
+ *  @return		Final packet size or MLAN_STATUS_FAILURE
+ */
+int
+wlan_11n_aggregate_pkt(mlan_private * priv, raListTbl * pra_list,
+                       int headroom, int ptrindex)
+{
+    int pkt_size = 0;
+    pmlan_adapter pmadapter = priv->adapter;
+    mlan_buffer *pmbuf_aggr, *pmbuf_src;
+    t_u8 *data;
+    int pad = 0;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    t_u32 sec, usec;
+#ifdef STA_SUPPORT
+    TxPD *ptx_pd = MNULL;
+#endif
+    ENTER();
+
+    PRINTM(MDAT_D, "Handling Aggr packet\n");
+
+    if ((pmbuf_src =
+         (pmlan_buffer) util_peek_list(pmadapter->pmoal_handle,
+                                       &pra_list->buf_head, MNULL, MNULL))) {
+
+        if (!(pmbuf_aggr = wlan_alloc_mlan_buffer(pmadapter,
+                                                  pmadapter->tx_buf_size, 0,
+                                                  MTRUE))) {
+            PRINTM(MERROR, "Error allocating mlan_buffer\n");
+            pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                                  priv->wmm.ra_list_spinlock);
+            return MLAN_STATUS_FAILURE;
+        }
+
+        data = pmbuf_aggr->pbuf + headroom;
+        pmbuf_aggr->bss_index = pmbuf_src->bss_index;
+        pmbuf_aggr->buf_type = pmbuf_src->buf_type;
+        pmbuf_aggr->priority = pmbuf_src->priority;
+        pmbuf_aggr->pbuf = data;
+        pmbuf_aggr->data_offset = 0;
+
+        /* Form AMSDU */
+        wlan_11n_form_amsdu_txpd(priv, pmbuf_aggr);
+        pkt_size = sizeof(TxPD);
+#ifdef STA_SUPPORT
+        if (GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_STA)
+            ptx_pd = (TxPD *) pmbuf_aggr->pbuf;
+#endif
+    } else {
+        pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                              priv->wmm.ra_list_spinlock);
+        goto exit;
+    }
+
+    while (pmbuf_src && ((pkt_size + (pmbuf_src->data_len + LLC_SNAP_LEN)
+                          + headroom)
+                         <= pmadapter->tx_buf_size)) {
+
+        pmbuf_src = (pmlan_buffer)
+            util_dequeue_list(pmadapter->pmoal_handle, &pra_list->buf_head,
+                              MNULL, MNULL);
+
+        pra_list->total_pkts--;
+
+        /* decrement for every PDU taken from the list */
+        priv->wmm.pkts_queued[ptrindex]--;
+        util_scalar_decrement(pmadapter->pmoal_handle,
+                              &priv->wmm.tx_pkts_queued, MNULL, MNULL);
+
+        pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                              priv->wmm.ra_list_spinlock);
+
+        pkt_size += wlan_11n_form_amsdu_pkt(pmadapter,
+                                            (data + pkt_size),
+                                            pmbuf_src->pbuf +
+                                            pmbuf_src->data_offset,
+                                            pmbuf_src->data_len, &pad);
+
+        DBG_HEXDUMP(MDAT_D, "pmbuf_src", pmbuf_src, sizeof(mlan_buffer));
+        wlan_write_data_complete(pmadapter, pmbuf_src, MLAN_STATUS_SUCCESS);
+
+        pmadapter->callbacks.moal_spin_lock(pmadapter->pmoal_handle,
+                                            priv->wmm.ra_list_spinlock);
+
+        if (!wlan_is_ralist_valid(priv, pra_list, ptrindex)) {
+            pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                                  priv->wmm.ra_list_spinlock);
+            LEAVE();
+            return MLAN_STATUS_FAILURE;
+        }
+
+        pmbuf_src =
+            (pmlan_buffer) util_peek_list(pmadapter->pmoal_handle,
+                                          &pra_list->buf_head, MNULL, MNULL);
+    }
+
+    pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                          priv->wmm.ra_list_spinlock);
+
+    /* Last AMSDU packet does not need padding */
+    pkt_size -= pad;
+    pmbuf_aggr->data_len = pkt_size;
+    wlan_11n_update_pktlen_amsdu_txpd(priv, pmbuf_aggr);
+    pmbuf_aggr->data_len += headroom;
+    pmbuf_aggr->pbuf = data - headroom;
+    pmadapter->data_sent = MTRUE;
+    ret = pmadapter->callbacks.moal_write_data_async(pmadapter->pmoal_handle,
+                                                     pmbuf_aggr,
+                                                     MLAN_USB_EP_DATA);
+    switch (ret) {
+    case MLAN_STATUS_RESOURCE:
+        pmadapter->callbacks.moal_spin_lock(pmadapter->pmoal_handle,
+                                            priv->wmm.ra_list_spinlock);
+
+        if (!wlan_is_ralist_valid(priv, pra_list, ptrindex)) {
+            pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                                  priv->wmm.ra_list_spinlock);
+            pmbuf_aggr->status_code = MLAN_ERROR_PKT_INVALID;
+            wlan_write_data_complete(pmadapter, pmbuf_aggr,
+                                     MLAN_STATUS_FAILURE);
+            LEAVE();
+            return MLAN_STATUS_FAILURE;
+        }
+#ifdef STA_SUPPORT
+        /* reset tx_lock_flag */
+        if ((GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_STA) &&
+            pmadapter->pps_uapsd_mode && (pmadapter->tx_lock_flag == MTRUE)) {
+            pmadapter->tx_lock_flag = MFALSE;
+            ptx_pd->flags = 0;
+        }
+#endif
+        util_enqueue_list_head(pmadapter->pmoal_handle, &pra_list->buf_head,
+                               (pmlan_linked_list) pmbuf_aggr, MNULL, MNULL);
+
+        pra_list->total_pkts++;
+
+        /* add back only one: aggregated packet is requeued as one */
+        priv->wmm.pkts_queued[ptrindex]++;
+        util_scalar_increment(pmadapter->pmoal_handle,
+                              &priv->wmm.tx_pkts_queued, MNULL, MNULL);
+        pmbuf_aggr->flags |= MLAN_BUF_FLAG_REQUEUED_PKT;
+        pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                              priv->wmm.ra_list_spinlock);
+        PRINTM(MINFO, "MLAN_STATUS_RESOURCE is returned\n");
+        pmbuf_aggr->status_code = MLAN_ERROR_PKT_INVALID;
+        break;
+    case MLAN_STATUS_FAILURE:
+        pmadapter->data_sent = MFALSE;
+        PRINTM(MERROR, "Error: moal_write_data_async failed: 0x%X\n", ret);
+        pmbuf_aggr->status_code = MLAN_ERROR_DATA_TX_FAIL;
+        pmadapter->dbg.num_tx_host_to_card_failure++;
+        wlan_write_data_complete(pmadapter, pmbuf_aggr, ret);
+        goto exit;
+    case MLAN_STATUS_PENDING:
+        pmadapter->data_sent = MFALSE;
+        break;
+    case MLAN_STATUS_SUCCESS:
+        wlan_write_data_complete(pmadapter, pmbuf_aggr, ret);
+        break;
+    default:
+        break;
+    }
+    if (ret != MLAN_STATUS_RESOURCE) {
+        pmadapter->callbacks.moal_spin_lock(pmadapter->pmoal_handle,
+                                            priv->wmm.ra_list_spinlock);
+        if (wlan_is_ralist_valid(priv, pra_list, ptrindex)) {
+            priv->wmm.packets_out[ptrindex]++;
+            priv->wmm.tid_tbl_ptr[ptrindex].ra_list_curr = pra_list;
+        }
+        pmadapter->bssprio_tbl[priv->bss_priority].bssprio_cur =
+            pmadapter->bssprio_tbl[priv->bss_priority].bssprio_cur->pnext;
+        pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                              priv->wmm.ra_list_spinlock);
+    }
+    pmadapter->callbacks.moal_get_system_time(pmadapter->pmoal_handle, &sec,
+                                              &usec);
+    PRINTM(MDATA, "%lu.%06lu : Data => FW\n", sec, usec);
+
+  exit:
+    LEAVE();
+    return (pkt_size + headroom);
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_11n_aggr.h linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_11n_aggr.h
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_11n_aggr.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_11n_aggr.h	2017-09-23 03:42:50.094674832 +0800
@@ -0,0 +1,43 @@
+/** @file mlan_11n_aggr.h
+ *
+ *  @brief This file contains related macros, enum, and struct
+ *  of 11n aggregation functionalities
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/********************************************************
+Change log:
+    11/10/2008: initial version
+********************************************************/
+
+#ifndef _MLAN_11N_AGGR_H_
+#define _MLAN_11N_AGGR_H_
+
+/** Aggregate 11N packets */
+mlan_status wlan_11n_deaggregate_pkt(pmlan_private priv, pmlan_buffer pmbuf);
+/** Deaggregate 11N packets */
+int wlan_11n_aggregate_pkt(mlan_private * priv, raListTbl * ptr,
+                           int headroom, int ptrindex);
+
+#endif /* !_MLAN_11N_AGGR_H_ */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_11n.c linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_11n.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_11n.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_11n.c	2017-09-23 03:42:50.094674832 +0800
@@ -0,0 +1,1675 @@
+/** @file mlan_11n.c
+ *
+ *  @brief This file contains functions for 11n handling.
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/********************************************************
+Change log:
+    11/10/2008: initial version
+********************************************************/
+
+#include "mlan.h"
+#include "mlan_join.h"
+#include "mlan_util.h"
+#include "mlan_fw.h"
+#include "mlan_main.h"
+#include "mlan_wmm.h"
+#include "mlan_11n.h"
+
+/********************************************************
+    Local Variables
+********************************************************/
+
+/********************************************************
+    Global Variables
+********************************************************/
+
+/********************************************************
+    Local Functions
+********************************************************/
+
+/** 
+ *
+ *  @brief set/get max tx buf size
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return				MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static mlan_status
+wlan_11n_ioctl_max_tx_buf_size(IN pmlan_adapter pmadapter,
+                               IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ds_11n_cfg *cfg = MNULL;
+
+    ENTER();
+
+    cfg = (mlan_ds_11n_cfg *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_SET) {
+        if ((cfg->param.tx_buf_size == MLAN_TX_DATA_BUF_SIZE_2K) ||
+            (cfg->param.tx_buf_size == MLAN_TX_DATA_BUF_SIZE_4K) ||
+            (cfg->param.tx_buf_size == MLAN_TX_DATA_BUF_SIZE_8K))
+            pmadapter->max_tx_buf_size = (t_u16) cfg->param.tx_buf_size;
+        else {
+            pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+            ret = MLAN_STATUS_FAILURE;
+        }
+    } else
+        cfg->param.tx_buf_size = (t_u32) pmadapter->max_tx_buf_size;
+    pioctl_req->data_read_written = sizeof(t_u32) + MLAN_SUB_COMMAND_SIZE;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/get htcapinfo configuration 
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return				MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static mlan_status
+wlan_11n_ioctl_htusrcfg(IN pmlan_adapter pmadapter,
+                        IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_11n_cfg *cfg = MNULL;
+
+    ENTER();
+
+    cfg = (mlan_ds_11n_cfg *) pioctl_req->pbuf;
+
+    if (pioctl_req->action == MLAN_ACT_SET) {
+        if (((cfg->param.htcap_cfg & ~IGN_HW_DEV_CAP) &
+             pmpriv->adapter->hw_dot_11n_dev_cap)
+            != (cfg->param.htcap_cfg & ~IGN_HW_DEV_CAP)) {
+            pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+            ret = MLAN_STATUS_FAILURE;
+        } else
+            pmadapter->usr_dot_11n_dev_cap = cfg->param.htcap_cfg;
+        PRINTM(MINFO, "Set: UsrDot11nCap 0x%x\n",
+               pmadapter->usr_dot_11n_dev_cap);
+    } else {
+        /* Hardware 11N device capability required */
+        if (cfg->param.hw_cap_req)
+            cfg->param.htcap_cfg = pmadapter->hw_dot_11n_dev_cap;
+        else
+            cfg->param.htcap_cfg = pmadapter->usr_dot_11n_dev_cap;
+        PRINTM(MINFO, "Get: UsrDot11nCap 0x%x\n", cfg->param.htcap_cfg);
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Enable/Disable AMSDU AGGR CTRL
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_11n_ioctl_amsdu_aggr_ctrl(IN pmlan_adapter pmadapter,
+                               IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_11n_cfg *cfg = MNULL;
+    t_u16 cmd_action = 0;
+
+    ENTER();
+
+    cfg = (mlan_ds_11n_cfg *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_SET)
+        cmd_action = HostCmd_ACT_GEN_SET;
+    else
+        cmd_action = HostCmd_ACT_GEN_GET;
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_AMSDU_AGGR_CTRL,
+                           cmd_action,
+                           0,
+                           (t_void *) pioctl_req,
+                           (t_void *) & cfg->param.amsdu_aggr_ctrl);
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/get 11n configuration 
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_11n_ioctl_httxcfg(IN pmlan_adapter pmadapter,
+                       IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_11n_cfg *cfg = MNULL;
+    t_u16 cmd_action = 0;
+
+    ENTER();
+
+    cfg = (mlan_ds_11n_cfg *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_SET)
+        cmd_action = HostCmd_ACT_GEN_SET;
+    else
+        cmd_action = HostCmd_ACT_GEN_GET;
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_11N_CFG,
+                           cmd_action,
+                           0,
+                           (t_void *) pioctl_req,
+                           (t_void *) & cfg->param.tx_cfg);
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/get TX beamforming capabilities
+ *
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param pioctl_req   A pointer to ioctl request buffer
+ *
+ *  @return             MLAN_STATUS_SUCCESS --success
+ */
+static mlan_status
+wlan_11n_ioctl_tx_bf_cap(IN pmlan_adapter pmadapter,
+                         IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_11n_cfg *cfg = MNULL;
+
+    ENTER();
+
+    cfg = (mlan_ds_11n_cfg *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_SET)
+        pmpriv->tx_bf_cap = cfg->param.tx_bf_cap;
+    else
+        cfg->param.tx_bf_cap = pmpriv->tx_bf_cap;
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function will resend addba request to all 
+ *          the peer in the TxBAStreamTbl 
+ *  
+ *  @param priv     A pointer to mlan_private
+ *
+ *  @return         N/A	       
+ */
+static void
+wlan_11n_update_addba_request(mlan_private * priv)
+{
+
+    TxBAStreamTbl *ptx_tbl;
+
+    ENTER();
+
+    if (!
+        (ptx_tbl =
+         (TxBAStreamTbl *) util_peek_list(priv->adapter->pmoal_handle,
+                                          &priv->tx_ba_stream_tbl_ptr,
+                                          priv->adapter->callbacks.
+                                          moal_spin_lock,
+                                          priv->adapter->callbacks.
+                                          moal_spin_unlock))) {
+        LEAVE();
+        return;
+    }
+
+    while (ptx_tbl != (TxBAStreamTbl *) & priv->tx_ba_stream_tbl_ptr) {
+        wlan_send_addba(priv, ptx_tbl->tid, ptx_tbl->ra);
+        ptx_tbl = ptx_tbl->pnext;
+    }
+
+    mlan_main_process(priv->adapter);
+    LEAVE();
+    return;
+}
+
+/** 
+ *  @brief Set/get addba parameter 
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success
+ */
+static mlan_status
+wlan_11n_ioctl_addba_param(IN pmlan_adapter pmadapter,
+                           IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_11n_cfg *cfg = MNULL;
+    t_u32 timeout;
+
+    ENTER();
+
+    cfg = (mlan_ds_11n_cfg *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_GET) {
+        cfg->param.addba_param.timeout = pmpriv->add_ba_param.timeout;
+        cfg->param.addba_param.txwinsize = pmpriv->add_ba_param.tx_win_size;
+        cfg->param.addba_param.rxwinsize = pmpriv->add_ba_param.rx_win_size;
+    } else {
+        timeout = pmpriv->add_ba_param.timeout;
+        pmpriv->add_ba_param.timeout = cfg->param.addba_param.timeout;
+        pmpriv->add_ba_param.tx_win_size = cfg->param.addba_param.txwinsize;
+        pmpriv->add_ba_param.rx_win_size = cfg->param.addba_param.rxwinsize;
+        if (timeout != pmpriv->add_ba_param.timeout) {
+            wlan_11n_update_addba_request(pmpriv);
+        }
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/get addba reject set 
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static mlan_status
+wlan_11n_ioctl_addba_reject(IN pmlan_adapter pmadapter,
+                            IN pmlan_ioctl_req pioctl_req)
+{
+    int i = 0;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_11n_cfg *cfg = MNULL;
+
+    ENTER();
+
+    cfg = (mlan_ds_11n_cfg *) pioctl_req->pbuf;
+
+    if (pioctl_req->action == MLAN_ACT_GET) {
+        PRINTM(MINFO, "Get Addba reject\n");
+        memcpy(pmadapter, cfg->param.addba_reject, pmpriv->addba_reject,
+               MAX_NUM_TID);
+    } else {
+        if (pmpriv->media_connected == MTRUE) {
+            PRINTM(MERROR, "Can not set aggr priority table in connected"
+                   " state\n");
+            pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+            LEAVE();
+            return MLAN_STATUS_FAILURE;
+        }
+
+        for (i = 0; i < MAX_NUM_TID; i++) {
+            /* For AMPDU */
+            if (cfg->param.addba_reject[i] > ADDBA_RSP_STATUS_REJECT) {
+                pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+                ret = MLAN_STATUS_FAILURE;
+                break;
+            }
+
+            pmpriv->addba_reject[i] = cfg->param.addba_reject[i];
+        }
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/get aggr_prio_tbl 
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static mlan_status
+wlan_11n_ioctl_aggr_prio_tbl(IN pmlan_adapter pmadapter,
+                             IN pmlan_ioctl_req pioctl_req)
+{
+    int i = 0;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_11n_cfg *cfg = MNULL;
+
+    ENTER();
+
+    cfg = (mlan_ds_11n_cfg *) pioctl_req->pbuf;
+
+    if (pioctl_req->action == MLAN_ACT_GET) {
+        for (i = 0; i < MAX_NUM_TID; i++) {
+            cfg->param.aggr_prio_tbl.ampdu[i] =
+                pmpriv->aggr_prio_tbl[i].ampdu_user;
+            cfg->param.aggr_prio_tbl.amsdu[i] = pmpriv->aggr_prio_tbl[i].amsdu;
+        }
+    } else {
+        if (pmpriv->media_connected == MTRUE) {
+            PRINTM(MERROR, "Can not set aggr priority table in connected"
+                   " state\n");
+            pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+            LEAVE();
+            return MLAN_STATUS_FAILURE;
+        }
+
+        for (i = 0; i < MAX_NUM_TID; i++) {
+            /* For AMPDU */
+            if ((cfg->param.aggr_prio_tbl.ampdu[i] > HIGH_PRIO_TID) &&
+                (cfg->param.aggr_prio_tbl.ampdu[i] != BA_STREAM_NOT_ALLOWED)) {
+                pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+                ret = MLAN_STATUS_FAILURE;
+                break;
+            }
+
+            pmpriv->aggr_prio_tbl[i].ampdu_ap =
+                pmpriv->aggr_prio_tbl[i].ampdu_user =
+                cfg->param.aggr_prio_tbl.ampdu[i];
+
+            /* For AMSDU */
+            if ((cfg->param.aggr_prio_tbl.amsdu[i] > HIGH_PRIO_TID &&
+                 cfg->param.aggr_prio_tbl.amsdu[i] != BA_STREAM_NOT_ALLOWED)) {
+                pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+                ret = MLAN_STATUS_FAILURE;
+                break;
+            } else {
+                pmpriv->aggr_prio_tbl[i].amsdu =
+                    cfg->param.aggr_prio_tbl.amsdu[i];
+            }
+        }
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Get supported MCS set
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static mlan_status
+wlan_11n_ioctl_supported_mcs_set(IN pmlan_adapter pmadapter,
+                                 IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_ds_11n_cfg *cfg = MNULL;
+    int rx_mcs_supp;
+    t_u8 mcs_set[NUM_MCS_FIELD];
+
+    ENTER();
+
+    if (pioctl_req->action == MLAN_ACT_SET) {
+        PRINTM(MERROR, "Set operation is not supported\n");
+        pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+    rx_mcs_supp = GET_RXMCSSUPP(pmadapter->usr_dev_mcs_support);
+    /* Set MCS for 1x1/2x2 */
+    memset(pmadapter, (t_u8 *) mcs_set, 0xff, rx_mcs_supp);
+    /* Clear all the other values */
+    memset(pmadapter, (t_u8 *) & mcs_set[rx_mcs_supp], 0,
+           NUM_MCS_FIELD - rx_mcs_supp);
+    /* Set MCS32 with 40MHz support */
+    if (ISSUPP_CHANWIDTH40(pmadapter->usr_dot_11n_dev_cap))
+        SETHT_MCS32(mcs_set);
+
+    cfg = (mlan_ds_11n_cfg *) pioctl_req->pbuf;
+    memcpy(pmadapter, cfg->param.supported_mcs_set, mcs_set, NUM_MCS_FIELD);
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function checks if the given pointer is valid entry of 
+ *         Tx BA Stream table
+ *  
+ *  @param priv         Pointer to mlan_private
+ *  @param ptxtblptr    Pointer to tx ba stream entry
+ *
+ *  @return             MTRUE or MFALSE
+ */
+static int
+wlan_is_txbastreamptr_valid(mlan_private * priv, TxBAStreamTbl * ptxtblptr)
+{
+    TxBAStreamTbl *ptx_tbl;
+
+    ENTER();
+
+    if (!
+        (ptx_tbl =
+         (TxBAStreamTbl *) util_peek_list(priv->adapter->pmoal_handle,
+                                          &priv->tx_ba_stream_tbl_ptr, MNULL,
+                                          MNULL))) {
+        LEAVE();
+        return MFALSE;
+    }
+
+    while (ptx_tbl != (TxBAStreamTbl *) & priv->tx_ba_stream_tbl_ptr) {
+        if (ptx_tbl == ptxtblptr) {
+            LEAVE();
+            return MTRUE;
+        }
+
+        ptx_tbl = ptx_tbl->pnext;
+    }
+
+    LEAVE();
+    return MFALSE;
+}
+
+/**
+ *  @brief This function will return the pointer to a entry in BA Stream 
+ *  		table which matches the ba_status requested
+ *  
+ *  @param priv    	    A pointer to mlan_private
+ *  @param ba_status	Current status of the BA stream
+ *
+ *  @return 	        A pointer to first entry matching status in BA stream
+ *                      NULL if not found
+ */
+static TxBAStreamTbl *
+wlan_11n_get_txbastream_status(mlan_private * priv, baStatus_e ba_status)
+{
+    TxBAStreamTbl *ptx_tbl;
+
+    ENTER();
+
+    if (!
+        (ptx_tbl =
+         (TxBAStreamTbl *) util_peek_list(priv->adapter->pmoal_handle,
+                                          &priv->tx_ba_stream_tbl_ptr,
+                                          priv->adapter->callbacks.
+                                          moal_spin_lock,
+                                          priv->adapter->callbacks.
+                                          moal_spin_unlock))) {
+        LEAVE();
+        return MNULL;
+    }
+
+    while (ptx_tbl != (TxBAStreamTbl *) & priv->tx_ba_stream_tbl_ptr) {
+        if (ptx_tbl->ba_status == ba_status) {
+            LEAVE();
+            return ptx_tbl;
+        }
+
+        ptx_tbl = ptx_tbl->pnext;
+    }
+
+    LEAVE();
+    return MNULL;
+}
+
+/********************************************************
+    Global Functions
+********************************************************/
+
+#ifdef STA_SUPPORT
+/**
+ *  @brief This function fills the cap info
+ *
+ *  @param priv         A pointer to mlan_private structure
+ *  @param pht_cap      A pointer to MrvlIETypes_HTCap_t structure
+ *
+ *  @return             N/A
+ */
+static void
+wlan_fill_cap_info(mlan_private * priv, MrvlIETypes_HTCap_t * pht_cap)
+{
+    mlan_adapter *pmadapter = priv->adapter;
+
+    ENTER();
+
+    if (ISSUPP_CHANWIDTH40(pmadapter->usr_dot_11n_dev_cap))
+        SETHT_SUPPCHANWIDTH(pht_cap->ht_cap.ht_cap_info);
+    else
+        RESETHT_SUPPCHANWIDTH(pht_cap->ht_cap.ht_cap_info);
+
+    if (ISSUPP_GREENFIELD(pmadapter->usr_dot_11n_dev_cap))
+        SETHT_GREENFIELD(pht_cap->ht_cap.ht_cap_info);
+    else
+        RESETHT_GREENFIELD(pht_cap->ht_cap.ht_cap_info);
+
+    if (ISSUPP_SHORTGI20(pmadapter->usr_dot_11n_dev_cap))
+        SETHT_SHORTGI20(pht_cap->ht_cap.ht_cap_info);
+    else
+        RESETHT_SHORTGI20(pht_cap->ht_cap.ht_cap_info);
+
+    if (ISSUPP_SHORTGI40(pmadapter->usr_dot_11n_dev_cap))
+        SETHT_SHORTGI40(pht_cap->ht_cap.ht_cap_info);
+    else
+        RESETHT_SHORTGI40(pht_cap->ht_cap.ht_cap_info);
+
+    if (ISSUPP_RXSTBC(pmadapter->usr_dot_11n_dev_cap))
+        SETHT_RXSTBC(pht_cap->ht_cap.ht_cap_info, 1);
+    else
+        RESETHT_RXSTBC(pht_cap->ht_cap.ht_cap_info);
+
+    if (ISENABLED_40MHZ_INTOLARENT(pmadapter->usr_dot_11n_dev_cap))
+        SETHT_40MHZ_INTOLARANT(pht_cap->ht_cap.ht_cap_info);
+    else
+        RESETHT_40MHZ_INTOLARANT(pht_cap->ht_cap.ht_cap_info);
+
+    /* No user config for LDPC coding capability yet */
+    if (ISSUPP_RXLDPC(pmadapter->hw_dot_11n_dev_cap))
+        SETHT_LDPCCODINGCAP(pht_cap->ht_cap.ht_cap_info);
+    else
+        RESETHT_LDPCCODINGCAP(pht_cap->ht_cap.ht_cap_info);
+
+    /* No user config for TX STBC yet */
+    if (ISSUPP_TXSTBC(pmadapter->hw_dot_11n_dev_cap))
+        SETHT_TXSTBC(pht_cap->ht_cap.ht_cap_info);
+    else
+        RESETHT_TXSTBC(pht_cap->ht_cap.ht_cap_info);
+
+    /* No user config for Delayed BACK yet */
+    if (GET_DELAYEDBACK(pmadapter->hw_dot_11n_dev_cap))
+        SETHT_DELAYEDBACK(pht_cap->ht_cap.ht_cap_info);
+    else
+        RESETHT_DELAYEDBACK(pht_cap->ht_cap.ht_cap_info);
+
+    /* Need change to support 8k AMSDU receive */
+    RESETHT_MAXAMSDU(pht_cap->ht_cap.ht_cap_info);
+
+    LEAVE();
+}
+
+/**
+ *  @brief This function fills the HT cap tlv
+ *
+ *  @param priv         A pointer to mlan_private structure
+ *  @param pht_cap      A pointer to MrvlIETypes_HTCap_t structure
+ *
+ *  @return             N/A
+ */
+void
+wlan_fill_ht_cap_tlv(mlan_private * priv, MrvlIETypes_HTCap_t * pht_cap)
+{
+    mlan_adapter *pmadapter = priv->adapter;
+    int rx_mcs_supp;
+
+    ENTER();
+
+    /* Fill HT cap info */
+    wlan_fill_cap_info(priv, pht_cap);
+    pht_cap->ht_cap.ht_cap_info = wlan_cpu_to_le16(pht_cap->ht_cap.ht_cap_info);
+
+    /* Set ampdu param */
+    SETAMPDU_SIZE(pht_cap->ht_cap.ampdu_param, AMPDU_FACTOR_64K);
+    SETAMPDU_SPACING(pht_cap->ht_cap.ampdu_param, 0);
+
+    rx_mcs_supp = GET_RXMCSSUPP(pmadapter->usr_dev_mcs_support);
+    /* Set MCS for 1x1/2x2 */
+    memset(pmadapter, (t_u8 *) pht_cap->ht_cap.supported_mcs_set, 0xff,
+           rx_mcs_supp);
+    /* Clear all the other values */
+    memset(pmadapter, (t_u8 *) & pht_cap->ht_cap.supported_mcs_set[rx_mcs_supp],
+           0, NUM_MCS_FIELD - rx_mcs_supp);
+    /* Set MCS32 with 40MHz support */
+    if (ISSUPP_CHANWIDTH40(pmadapter->usr_dot_11n_dev_cap))
+        SETHT_MCS32(pht_cap->ht_cap.supported_mcs_set);
+
+    /* Clear RD responder bit */
+    RESETHT_EXTCAP_RDG(pht_cap->ht_cap.ht_ext_cap);
+    pht_cap->ht_cap.ht_ext_cap = wlan_cpu_to_le16(pht_cap->ht_cap.ht_ext_cap);
+
+    /* Set Tx BF cap */
+    pht_cap->ht_cap.tx_bf_cap = wlan_cpu_to_le32(priv->tx_bf_cap);
+
+    LEAVE();
+    return;
+}
+#endif /* STA_SUPPORT */
+
+/** 
+ *  @brief This function prints the 802.11n device capability
+ *  
+ *  @param pmadapter     A pointer to mlan_adapter structure
+ *  @param cap           Capability value
+ *
+ *  @return        N/A
+ */
+void
+wlan_show_dot11ndevcap(pmlan_adapter pmadapter, t_u32 cap)
+{
+    ENTER();
+
+    PRINTM(MINFO, "GET_HW_SPEC: Maximum MSDU length = %s octets\n",
+           (ISSUPP_MAXAMSDU(cap) ? "7935" : "3839"));
+    PRINTM(MINFO, "GET_HW_SPEC: Beam forming %s\n",
+           (ISSUPP_BEAMFORMING(cap) ? "supported" : "not supported"));
+    PRINTM(MINFO, "GET_HW_SPEC: Greenfield preamble %s\n",
+           (ISSUPP_GREENFIELD(cap) ? "supported" : "not supported"));
+    PRINTM(MINFO, "GET_HW_SPEC: AMPDU %s\n",
+           (ISSUPP_AMPDU(cap) ? "supported" : "not supported"));
+    PRINTM(MINFO, "GET_HW_SPEC: MIMO Power Save %s\n",
+           (ISSUPP_MIMOPS(cap) ? "supported" : "not supported"));
+    PRINTM(MINFO, "GET_HW_SPEC: Rx STBC %s\n",
+           (ISSUPP_RXSTBC(cap) ? "supported" : "not supported"));
+    PRINTM(MINFO, "GET_HW_SPEC: Tx STBC %s\n",
+           (ISSUPP_TXSTBC(cap) ? "supported" : "not supported"));
+    PRINTM(MINFO, "GET_HW_SPEC: Short GI for 40 Mhz %s\n",
+           (ISSUPP_SHORTGI40(cap) ? "supported" : "not supported"));
+    PRINTM(MINFO, "GET_HW_SPEC: Short GI for 20 Mhz %s\n",
+           (ISSUPP_SHORTGI20(cap) ? "supported" : "not supported"));
+    PRINTM(MINFO, "GET_HW_SPEC: LDPC coded packet receive %s\n",
+           (ISSUPP_RXLDPC(cap) ? "supported" : "not supported"));
+    PRINTM(MINFO, "GET_HW_SPEC: Number of Delayed Block Ack streams = %d\n",
+           GET_DELAYEDBACK(cap));
+    PRINTM(MINFO, "GET_HW_SPEC: Number of Immediate Block Ack streams = %d\n",
+           GET_IMMEDIATEBACK(cap));
+    PRINTM(MINFO, "GET_HW_SPEC: 40 Mhz channel width %s\n",
+           (ISSUPP_CHANWIDTH40(cap) ? "supported" : "not supported"));
+    PRINTM(MINFO, "GET_HW_SPEC: 20 Mhz channel width %s\n",
+           (ISSUPP_CHANWIDTH20(cap) ? "supported" : "not supported"));
+    PRINTM(MINFO, "GET_HW_SPEC: 10 Mhz channel width %s\n",
+           (ISSUPP_CHANWIDTH10(cap) ? "supported" : "not supported"));
+
+    if (ISSUPP_RXANTENNAA(cap)) {
+        PRINTM(MINFO, "GET_HW_SPEC: Presence of Rx antenna A\n");
+    }
+    if (ISSUPP_RXANTENNAB(cap)) {
+        PRINTM(MINFO, "GET_HW_SPEC: Presence of Rx antenna B\n");
+    }
+    if (ISSUPP_RXANTENNAC(cap)) {
+        PRINTM(MINFO, "GET_HW_SPEC: Presence of Rx antenna C\n");
+    }
+    if (ISSUPP_RXANTENNAD(cap)) {
+        PRINTM(MINFO, "GET_HW_SPEC: Presence of Rx antenna D\n");
+    }
+    if (ISSUPP_TXANTENNAA(cap)) {
+        PRINTM(MINFO, "GET_HW_SPEC: Presence of Tx antenna A\n");
+    }
+    if (ISSUPP_TXANTENNAB(cap)) {
+        PRINTM(MINFO, "GET_HW_SPEC: Presence of Tx antenna B\n");
+    }
+    if (ISSUPP_TXANTENNAC(cap)) {
+        PRINTM(MINFO, "GET_HW_SPEC: Presence of Tx antenna C\n");
+    }
+    if (ISSUPP_TXANTENNAD(cap)) {
+        PRINTM(MINFO, "GET_HW_SPEC: Presence of Tx antenna D\n");
+    }
+
+    LEAVE();
+    return;
+}
+
+/** 
+ *  @brief This function prints the 802.11n device MCS
+ *  
+ *  @param pmadapter A pointer to mlan_adapter structure
+ *  @param support   Support value
+ *
+ *  @return        N/A
+ */
+void
+wlan_show_devmcssupport(pmlan_adapter pmadapter, t_u8 support)
+{
+    ENTER();
+
+    PRINTM(MINFO, "GET_HW_SPEC: MCSs for %dx%d MIMO\n", GET_RXMCSSUPP(support),
+           GET_TXMCSSUPP(support));
+
+    LEAVE();
+    return;
+}
+
+/** 
+ *  @brief This function handles the command response of
+ *              delete a block ack request
+ *  
+ *  @param priv    A pointer to mlan_private structure
+ *  @param resp    A pointer to HostCmd_DS_COMMAND
+ *
+ *  @return        MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_ret_11n_delba(mlan_private * priv, HostCmd_DS_COMMAND * resp)
+{
+    int tid;
+    TxBAStreamTbl *ptx_ba_tbl;
+    HostCmd_DS_11N_DELBA *pdel_ba =
+        (HostCmd_DS_11N_DELBA *) & resp->params.del_ba;
+
+    ENTER();
+
+    pdel_ba->del_ba_param_set = wlan_le16_to_cpu(pdel_ba->del_ba_param_set);
+    pdel_ba->reason_code = wlan_le16_to_cpu(pdel_ba->reason_code);
+
+    tid = pdel_ba->del_ba_param_set >> DELBA_TID_POS;
+    if (pdel_ba->del_result == BA_RESULT_SUCCESS) {
+        mlan_11n_delete_bastream_tbl(priv, tid, pdel_ba->peer_mac_addr,
+                                     TYPE_DELBA_SENT,
+                                     INITIATOR_BIT(pdel_ba->del_ba_param_set));
+
+        if ((ptx_ba_tbl = wlan_11n_get_txbastream_status(priv,
+                                                         BA_STREAM_SETUP_INPROGRESS)))
+        {
+            wlan_send_addba(priv, ptx_ba_tbl->tid, ptx_ba_tbl->ra);
+        }
+    } else {                    /* 
+                                 * In case of failure, recreate the deleted stream in
+                                 * case we initiated the ADDBA
+                                 */
+        if (INITIATOR_BIT(pdel_ba->del_ba_param_set)) {
+            wlan_11n_create_txbastream_tbl(priv, pdel_ba->peer_mac_addr, tid,
+                                           BA_STREAM_SETUP_INPROGRESS);
+            if ((ptx_ba_tbl = wlan_11n_get_txbastream_status(priv,
+                                                             BA_STREAM_SETUP_INPROGRESS)))
+            {
+                mlan_11n_delete_bastream_tbl(priv, ptx_ba_tbl->tid,
+                                             ptx_ba_tbl->ra, TYPE_DELBA_SENT,
+                                             MTRUE);
+            }
+        }
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function handles the command response of
+ *              add a block ack request
+ *  
+ *  @param priv    A pointer to mlan_private structure
+ *  @param resp    A pointer to HostCmd_DS_COMMAND
+ *
+ *  @return        MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_ret_11n_addba_req(mlan_private * priv, HostCmd_DS_COMMAND * resp)
+{
+    t_u8 tid;
+    HostCmd_DS_11N_ADDBA_RSP *padd_ba_rsp =
+        (HostCmd_DS_11N_ADDBA_RSP *) & resp->params.add_ba_rsp;
+    TxBAStreamTbl *ptx_ba_tbl;
+    raListTbl *ra_list = MNULL;
+
+    ENTER();
+
+    padd_ba_rsp->block_ack_param_set =
+        wlan_le16_to_cpu(padd_ba_rsp->block_ack_param_set);
+    padd_ba_rsp->block_ack_tmo = wlan_le16_to_cpu(padd_ba_rsp->block_ack_tmo);
+    padd_ba_rsp->ssn = (wlan_le16_to_cpu(padd_ba_rsp->ssn)) & SSN_MASK;
+    padd_ba_rsp->status_code = wlan_le16_to_cpu(padd_ba_rsp->status_code);
+
+    tid = (padd_ba_rsp->block_ack_param_set & BLOCKACKPARAM_TID_MASK)
+        >> BLOCKACKPARAM_TID_POS;
+    if (padd_ba_rsp->status_code == BA_RESULT_SUCCESS) {
+        if ((ptx_ba_tbl = wlan_11n_get_txbastream_tbl(priv, tid,
+                                                      padd_ba_rsp->
+                                                      peer_mac_addr))) {
+            PRINTM(MCMND,
+                   "ADDBA REQ: %02x:%02x:%02x:%02x:%02x:%02x tid=%d ssn=%d win_size=%d,amsdu=%d\n",
+                   padd_ba_rsp->peer_mac_addr[0], padd_ba_rsp->peer_mac_addr[1],
+                   padd_ba_rsp->peer_mac_addr[2], padd_ba_rsp->peer_mac_addr[3],
+                   padd_ba_rsp->peer_mac_addr[4], padd_ba_rsp->peer_mac_addr[5],
+                   tid, padd_ba_rsp->ssn,
+                   ((padd_ba_rsp->
+                     block_ack_param_set & BLOCKACKPARAM_WINSIZE_MASK) >>
+                    BLOCKACKPARAM_WINSIZE_POS),
+                   padd_ba_rsp->
+                   block_ack_param_set & BLOCKACKPARAM_AMSDU_SUPP_MASK);
+            ptx_ba_tbl->ba_status = BA_STREAM_SETUP_COMPLETE;
+        } else {
+            PRINTM(MERROR, "BA stream not created\n");
+        }
+    } else {
+        mlan_11n_delete_bastream_tbl(priv, tid, padd_ba_rsp->peer_mac_addr,
+                                     TYPE_DELBA_SENT, MTRUE);
+        if (padd_ba_rsp->add_rsp_result != BA_RESULT_TIMEOUT) {
+#ifdef UAP_SUPPORT
+            if (GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_UAP)
+                disable_station_ampdu(priv, tid, padd_ba_rsp->peer_mac_addr);
+#endif /* UAP_SUPPORT */
+            priv->aggr_prio_tbl[tid].ampdu_ap = BA_STREAM_NOT_ALLOWED;
+
+        } else {
+            /* reset packet threshold */
+            ra_list =
+                wlan_wmm_get_ralist_node(priv, tid, padd_ba_rsp->peer_mac_addr);
+            if (ra_list) {
+                ra_list->packet_count = 0;
+                ra_list->ba_packet_threshold =
+                    wlan_get_random_ba_threshold(priv->adapter);
+            }
+        }
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function prepares command of reconfigure tx buf
+ *  
+ *  @param priv         A pointer to mlan_private structure
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action   The action: GET or SET
+ *  @param pdata_buf    A pointer to data buffer
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_cmd_recfg_tx_buf(mlan_private * priv,
+                      HostCmd_DS_COMMAND * cmd, int cmd_action, void *pdata_buf)
+{
+    HostCmd_DS_TXBUF_CFG *ptx_buf = &cmd->params.tx_buf;
+    t_u16 action = (t_u16) cmd_action;
+    t_u16 buf_size = *((t_u16 *) pdata_buf);
+
+    ENTER();
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_RECONFIGURE_TX_BUFF);
+    cmd->size = wlan_cpu_to_le16(sizeof(HostCmd_DS_TXBUF_CFG)
+                                 + S_DS_GEN);
+    ptx_buf->action = wlan_cpu_to_le16(action);
+    switch (action) {
+    case HostCmd_ACT_GEN_SET:
+        PRINTM(MCMND, "set tx_buf = %d\n", buf_size);
+        ptx_buf->buff_size = wlan_cpu_to_le16(buf_size);
+        break;
+    case HostCmd_ACT_GEN_GET:
+    default:
+        ptx_buf->buff_size = 0;
+        break;
+    }
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function prepares command of amsdu aggr control
+ *  
+ *  @param priv         A pointer to mlan_private structure
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action   The action: GET or SET
+ *  @param pdata_buf    A pointer to data buffer
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_cmd_amsdu_aggr_ctrl(mlan_private * priv,
+                         HostCmd_DS_COMMAND * cmd,
+                         int cmd_action, void *pdata_buf)
+{
+    HostCmd_DS_AMSDU_AGGR_CTRL *pamsdu_ctrl = &cmd->params.amsdu_aggr_ctrl;
+    t_u16 action = (t_u16) cmd_action;
+    mlan_ds_11n_amsdu_aggr_ctrl *aa_ctrl = (mlan_ds_11n_amsdu_aggr_ctrl *)
+        pdata_buf;
+
+    ENTER();
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_AMSDU_AGGR_CTRL);
+    cmd->size = wlan_cpu_to_le16(sizeof(HostCmd_DS_AMSDU_AGGR_CTRL)
+                                 + S_DS_GEN);
+    pamsdu_ctrl->action = wlan_cpu_to_le16(action);
+    switch (action) {
+    case HostCmd_ACT_GEN_SET:
+        pamsdu_ctrl->enable = wlan_cpu_to_le16(aa_ctrl->enable);
+        pamsdu_ctrl->curr_buf_size = 0;
+        break;
+    case HostCmd_ACT_GEN_GET:
+    default:
+        pamsdu_ctrl->curr_buf_size = 0;
+        break;
+    }
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function handles the command response of amsdu aggr ctrl
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return        MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_ret_amsdu_aggr_ctrl(IN pmlan_private pmpriv,
+                         IN HostCmd_DS_COMMAND * resp,
+                         IN mlan_ioctl_req * pioctl_buf)
+{
+    mlan_ds_11n_cfg *cfg = MNULL;
+    HostCmd_DS_AMSDU_AGGR_CTRL *amsdu_ctrl = &resp->params.amsdu_aggr_ctrl;
+
+    ENTER();
+
+    if (pioctl_buf) {
+        cfg = (mlan_ds_11n_cfg *) pioctl_buf->pbuf;
+        cfg->param.amsdu_aggr_ctrl.enable =
+            wlan_le16_to_cpu(amsdu_ctrl->enable);
+        cfg->param.amsdu_aggr_ctrl.curr_buf_size =
+            wlan_le16_to_cpu(amsdu_ctrl->curr_buf_size);
+    }
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function prepares 11n cfg command
+ *  
+ *  @param pmpriv    	A pointer to mlan_private structure
+ *  @param cmd	   	A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action 	the action: GET or SET
+ *  @param pdata_buf 	A pointer to data buffer
+ *  @return 	   	MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_cmd_11n_cfg(IN pmlan_private pmpriv,
+                 IN HostCmd_DS_COMMAND * cmd,
+                 IN t_u16 cmd_action, IN t_void * pdata_buf)
+{
+    HostCmd_DS_11N_CFG *htcfg = &cmd->params.htcfg;
+    mlan_ds_11n_tx_cfg *txcfg = (mlan_ds_11n_tx_cfg *) pdata_buf;
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_11N_CFG);
+    cmd->size = wlan_cpu_to_le16(sizeof(HostCmd_DS_11N_CFG) + S_DS_GEN);
+    htcfg->action = wlan_cpu_to_le16(cmd_action);
+    htcfg->ht_tx_cap = wlan_cpu_to_le16(txcfg->httxcap);
+    htcfg->ht_tx_info = wlan_cpu_to_le16(txcfg->httxinfo);
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function handles the command response of 11ncfg
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return        MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_ret_11n_cfg(IN pmlan_private pmpriv,
+                 IN HostCmd_DS_COMMAND * resp, IN mlan_ioctl_req * pioctl_buf)
+{
+    mlan_ds_11n_cfg *cfg = MNULL;
+    HostCmd_DS_11N_CFG *htcfg = &resp->params.htcfg;
+
+    ENTER();
+    if (pioctl_buf) {
+        cfg = (mlan_ds_11n_cfg *) pioctl_buf->pbuf;
+        cfg->param.tx_cfg.httxcap = wlan_le16_to_cpu(htcfg->ht_tx_cap);
+        cfg->param.tx_cfg.httxinfo = wlan_le16_to_cpu(htcfg->ht_tx_info);
+    }
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+#ifdef STA_SUPPORT
+/**
+ *  @brief This function append the 802_11N tlv
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param pbss_desc    A pointer to BSSDescriptor_t structure
+ *  @param ppbuffer     A Pointer to command buffer pointer
+ *
+ *  @return bytes added to the buffer       
+ */
+int
+wlan_cmd_append_11n_tlv(IN mlan_private * pmpriv,
+                        IN BSSDescriptor_t * pbss_desc, OUT t_u8 ** ppbuffer)
+{
+    pmlan_adapter pmadapter = pmpriv->adapter;
+    MrvlIETypes_HTCap_t *pht_cap;
+    MrvlIETypes_HTInfo_t *pht_info;
+    MrvlIEtypes_ChanListParamSet_t *pchan_list;
+    MrvlIETypes_2040BSSCo_t *p2040_bss_co;
+    MrvlIETypes_ExtCap_t *pext_cap;
+    int ret_len = 0;
+
+    ENTER();
+
+    /* Null Checks */
+    if (ppbuffer == MNULL) {
+        LEAVE();
+        return 0;
+    }
+    if (*ppbuffer == MNULL) {
+        LEAVE();
+        return 0;
+    }
+
+    if (pbss_desc->pht_cap) {
+        pht_cap = (MrvlIETypes_HTCap_t *) * ppbuffer;
+        memset(pmadapter, pht_cap, 0, sizeof(MrvlIETypes_HTCap_t));
+        pht_cap->header.type = wlan_cpu_to_le16(HT_CAPABILITY);
+        pht_cap->header.len = sizeof(HTCap_t);
+        memcpy(pmadapter, (t_u8 *) pht_cap + sizeof(MrvlIEtypesHeader_t),
+               (t_u8 *) pbss_desc->pht_cap + sizeof(IEEEtypes_Header_t),
+               pht_cap->header.len);
+
+        pht_cap->ht_cap.ht_cap_info =
+            wlan_le16_to_cpu(pht_cap->ht_cap.ht_cap_info);
+        pht_cap->ht_cap.ht_ext_cap =
+            wlan_le16_to_cpu(pht_cap->ht_cap.ht_ext_cap);
+        wlan_fill_ht_cap_tlv(pmpriv, pht_cap);
+
+        HEXDUMP("HT_CAPABILITIES IE", (t_u8 *) pht_cap,
+                sizeof(MrvlIETypes_HTCap_t));
+        *ppbuffer += sizeof(MrvlIETypes_HTCap_t);
+        ret_len += sizeof(MrvlIETypes_HTCap_t);
+        pht_cap->header.len = wlan_cpu_to_le16(pht_cap->header.len);
+    }
+
+    if (pbss_desc->pht_info) {
+        if (pmpriv->bss_mode == MLAN_BSS_MODE_IBSS) {
+            pht_info = (MrvlIETypes_HTInfo_t *) * ppbuffer;
+            memset(pmadapter, pht_info, 0, sizeof(MrvlIETypes_HTInfo_t));
+            pht_info->header.type = wlan_cpu_to_le16(HT_OPERATION);
+            pht_info->header.len = sizeof(HTInfo_t);
+
+            memcpy(pmadapter, (t_u8 *) pht_info + sizeof(MrvlIEtypesHeader_t),
+                   (t_u8 *) pbss_desc->pht_info + sizeof(IEEEtypes_Header_t),
+                   pht_info->header.len);
+
+            if (!ISSUPP_CHANWIDTH40(pmadapter->usr_dot_11n_dev_cap)) {
+                RESET_CHANWIDTH40(pht_info->ht_info.field2);
+            }
+
+            *ppbuffer += sizeof(MrvlIETypes_HTInfo_t);
+            ret_len += sizeof(MrvlIETypes_HTInfo_t);
+            pht_info->header.len = wlan_cpu_to_le16(pht_info->header.len);
+        }
+
+        pchan_list = (MrvlIEtypes_ChanListParamSet_t *) * ppbuffer;
+        memset(pmadapter, pchan_list, 0,
+               sizeof(MrvlIEtypes_ChanListParamSet_t));
+        pchan_list->header.type = wlan_cpu_to_le16(TLV_TYPE_CHANLIST);
+        pchan_list->header.len = sizeof(MrvlIEtypes_ChanListParamSet_t) -
+            sizeof(MrvlIEtypesHeader_t);
+        pchan_list->chan_scan_param[0].chan_number =
+            pbss_desc->pht_info->ht_info.pri_chan;
+        pchan_list->chan_scan_param[0].radio_type =
+            wlan_band_to_radio_type((t_u8) pbss_desc->bss_band);
+
+        if (ISSUPP_CHANWIDTH40(pmadapter->usr_dot_11n_dev_cap) &&
+            ISALLOWED_CHANWIDTH40(pbss_desc->pht_info->ht_info.field2))
+            SET_SECONDARYCHAN(pchan_list->chan_scan_param[0].radio_type,
+                              GET_SECONDARYCHAN(pbss_desc->pht_info->ht_info.
+                                                field2));
+
+        HEXDUMP("ChanList", (t_u8 *) pchan_list,
+                sizeof(MrvlIEtypes_ChanListParamSet_t));
+        HEXDUMP("pht_info", (t_u8 *) pbss_desc->pht_info,
+                sizeof(MrvlIETypes_HTInfo_t) - 2);
+        *ppbuffer += sizeof(MrvlIEtypes_ChanListParamSet_t);
+        ret_len += sizeof(MrvlIEtypes_ChanListParamSet_t);
+        pchan_list->header.len = wlan_cpu_to_le16(pchan_list->header.len);
+    }
+
+    if (pbss_desc->pbss_co_2040) {
+        p2040_bss_co = (MrvlIETypes_2040BSSCo_t *) * ppbuffer;
+        memset(pmadapter, p2040_bss_co, 0, sizeof(MrvlIETypes_2040BSSCo_t));
+        p2040_bss_co->header.type = wlan_cpu_to_le16(BSSCO_2040);
+        p2040_bss_co->header.len = sizeof(BSSCo2040_t);
+
+        memcpy(pmadapter, (t_u8 *) p2040_bss_co + sizeof(MrvlIEtypesHeader_t),
+               (t_u8 *) pbss_desc->pbss_co_2040 + sizeof(IEEEtypes_Header_t),
+               p2040_bss_co->header.len);
+
+        HEXDUMP("20/40 BSS Coexistence IE", (t_u8 *) p2040_bss_co,
+                sizeof(MrvlIETypes_2040BSSCo_t));
+        *ppbuffer += sizeof(MrvlIETypes_2040BSSCo_t);
+        ret_len += sizeof(MrvlIETypes_2040BSSCo_t);
+        p2040_bss_co->header.len = wlan_cpu_to_le16(p2040_bss_co->header.len);
+    }
+
+    if (pbss_desc->pext_cap) {
+        pext_cap = (MrvlIETypes_ExtCap_t *) * ppbuffer;
+        memset(pmadapter, pext_cap, 0, sizeof(MrvlIETypes_ExtCap_t));
+        pext_cap->header.type = wlan_cpu_to_le16(EXT_CAPABILITY);
+        pext_cap->header.len = sizeof(ExtCap_t);
+
+        memcpy(pmadapter, (t_u8 *) pext_cap + sizeof(MrvlIEtypesHeader_t),
+               (t_u8 *) pbss_desc->pext_cap + sizeof(IEEEtypes_Header_t),
+               pext_cap->header.len);
+
+        HEXDUMP("Extended Capabilities IE", (t_u8 *) pext_cap,
+                sizeof(MrvlIETypes_ExtCap_t));
+        *ppbuffer += sizeof(MrvlIETypes_ExtCap_t);
+        ret_len += sizeof(MrvlIETypes_ExtCap_t);
+        pext_cap->header.len = wlan_cpu_to_le16(pext_cap->header.len);
+    }
+
+    LEAVE();
+    return ret_len;
+}
+
+/**
+ *  @brief This function reconfigure the tx buf size in firmware.
+ *
+ *  @param pmpriv    A pointer to mlan_private structure
+ *  @param pbss_desc  BSSDescriptor_t from the scan table to assoc
+ *
+ *  @return          N/A
+ */
+void
+wlan_cfg_tx_buf(mlan_private * pmpriv, BSSDescriptor_t * pbss_desc)
+{
+    t_u16 max_amsdu = MLAN_TX_DATA_BUF_SIZE_2K;
+    t_u16 tx_buf = 0;
+    t_u16 curr_tx_buf_size = 0;
+
+    ENTER();
+
+    if (pbss_desc->pht_cap) {
+        if (GETHT_MAXAMSDU(pbss_desc->pht_cap->ht_cap.ht_cap_info))
+            max_amsdu = MLAN_TX_DATA_BUF_SIZE_8K;
+        else
+            max_amsdu = MLAN_TX_DATA_BUF_SIZE_4K;
+    }
+
+    tx_buf = MIN(pmpriv->adapter->max_tx_buf_size, max_amsdu);
+
+    PRINTM(MINFO, "max_amsdu=%d, maxTxBuf=%d\n", max_amsdu,
+           pmpriv->adapter->max_tx_buf_size);
+    if (pmpriv->adapter->curr_tx_buf_size <= MLAN_TX_DATA_BUF_SIZE_2K)
+        curr_tx_buf_size = MLAN_TX_DATA_BUF_SIZE_2K;
+    else if (pmpriv->adapter->curr_tx_buf_size <= MLAN_TX_DATA_BUF_SIZE_4K)
+        curr_tx_buf_size = MLAN_TX_DATA_BUF_SIZE_4K;
+    else if (pmpriv->adapter->curr_tx_buf_size <= MLAN_TX_DATA_BUF_SIZE_8K)
+        curr_tx_buf_size = MLAN_TX_DATA_BUF_SIZE_8K;
+    if (curr_tx_buf_size != tx_buf) {
+        wlan_prepare_cmd(pmpriv, HostCmd_CMD_RECONFIGURE_TX_BUFF,
+                         HostCmd_ACT_GEN_SET, 0, MNULL, &tx_buf);
+    }
+    LEAVE();
+    return;
+}
+#endif /* STA_SUPPORT */
+
+/** 
+ *  @brief 11n configuration handler
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+mlan_status
+wlan_11n_cfg_ioctl(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    mlan_ds_11n_cfg *cfg = MNULL;
+
+    ENTER();
+
+    if (pioctl_req->buf_len < sizeof(mlan_ds_11n_cfg)) {
+        PRINTM(MINFO, "MLAN bss IOCTL length is too short.\n");
+        pioctl_req->data_read_written = 0;
+        pioctl_req->buf_len_needed = sizeof(mlan_ds_11n_cfg);
+        pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        LEAVE();
+        return MLAN_STATUS_RESOURCE;
+    }
+    cfg = (mlan_ds_11n_cfg *) pioctl_req->pbuf;
+    switch (cfg->sub_command) {
+    case MLAN_OID_11N_CFG_TX:
+        status = wlan_11n_ioctl_httxcfg(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_11N_HTCAP_CFG:
+        status = wlan_11n_ioctl_htusrcfg(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_11N_CFG_AGGR_PRIO_TBL:
+        status = wlan_11n_ioctl_aggr_prio_tbl(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_11N_CFG_ADDBA_REJECT:
+        status = wlan_11n_ioctl_addba_reject(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_11N_CFG_ADDBA_PARAM:
+        status = wlan_11n_ioctl_addba_param(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_11N_CFG_MAX_TX_BUF_SIZE:
+        status = wlan_11n_ioctl_max_tx_buf_size(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_11N_CFG_AMSDU_AGGR_CTRL:
+        status = wlan_11n_ioctl_amsdu_aggr_ctrl(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_11N_CFG_SUPPORTED_MCS_SET:
+        status = wlan_11n_ioctl_supported_mcs_set(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_11N_CFG_TX_BF_CAP:
+        status = wlan_11n_ioctl_tx_bf_cap(pmadapter, pioctl_req);
+        break;
+    default:
+        pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        status = MLAN_STATUS_FAILURE;
+        break;
+    }
+    LEAVE();
+    return status;
+}
+
+/**
+ *  @brief This function will delete the given entry in Tx BA Stream table
+ *  
+ *  @param priv    	Pointer to mlan_private
+ *  @param ptx_tbl	Pointer to tx ba stream entry to delete
+ *
+ *  @return 	        N/A
+ */
+void
+wlan_11n_delete_txbastream_tbl_entry(mlan_private * priv,
+                                     TxBAStreamTbl * ptx_tbl)
+{
+    pmlan_adapter pmadapter = priv->adapter;
+
+    ENTER();
+
+    pmadapter->callbacks.moal_spin_lock(pmadapter->pmoal_handle,
+                                        priv->tx_ba_stream_tbl_ptr.plock);
+
+    if (!ptx_tbl || !wlan_is_txbastreamptr_valid(priv, ptx_tbl)) {
+        goto exit;
+    }
+
+    PRINTM(MINFO, "Delete BA stream table entry: %p\n", ptx_tbl);
+
+    util_unlink_list(pmadapter->pmoal_handle, &priv->tx_ba_stream_tbl_ptr,
+                     (pmlan_linked_list) ptx_tbl, MNULL, MNULL);
+
+    pmadapter->callbacks.moal_mfree(pmadapter->pmoal_handle, (t_u8 *) ptx_tbl);
+
+  exit:
+    pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                          priv->tx_ba_stream_tbl_ptr.plock);
+    LEAVE();
+}
+
+/**
+ *  @brief This function will delete all the entries in Tx BA Stream table
+ *  
+ *  @param priv         A pointer to mlan_private
+ *
+ *  @return             N/A
+ */
+void
+wlan_11n_deleteall_txbastream_tbl(mlan_private * priv)
+{
+    int i;
+    TxBAStreamTbl *del_tbl_ptr = MNULL;
+
+    ENTER();
+
+    while ((del_tbl_ptr = (TxBAStreamTbl *)
+            util_peek_list(priv->adapter->pmoal_handle,
+                           &priv->tx_ba_stream_tbl_ptr,
+                           priv->adapter->callbacks.moal_spin_lock,
+                           priv->adapter->callbacks.moal_spin_unlock))) {
+        wlan_11n_delete_txbastream_tbl_entry(priv, del_tbl_ptr);
+    }
+
+    util_init_list((pmlan_linked_list) & priv->tx_ba_stream_tbl_ptr);
+
+    for (i = 0; i < MAX_NUM_TID; ++i) {
+        priv->aggr_prio_tbl[i].ampdu_ap = priv->aggr_prio_tbl[i].ampdu_user;
+    }
+
+    LEAVE();
+}
+
+/**
+ *  @brief This function will return the pointer to a entry in BA Stream 
+ *  		table which matches the give RA/TID pair
+ *  
+ *  @param priv    A pointer to mlan_private
+ *  @param tid	   TID to find in reordering table
+ *  @param ra      RA to find in reordering table
+ *
+ *  @return 	   A pointer to first entry matching RA/TID in BA stream
+ *                 NULL if not found
+ */
+TxBAStreamTbl *
+wlan_11n_get_txbastream_tbl(mlan_private * priv, int tid, t_u8 * ra)
+{
+    TxBAStreamTbl *ptx_tbl;
+    pmlan_adapter pmadapter = priv->adapter;
+
+    ENTER();
+
+    if (!(ptx_tbl = (TxBAStreamTbl *) util_peek_list(pmadapter->pmoal_handle,
+                                                     &priv->
+                                                     tx_ba_stream_tbl_ptr,
+                                                     pmadapter->callbacks.
+                                                     moal_spin_lock,
+                                                     pmadapter->callbacks.
+                                                     moal_spin_unlock))) {
+        LEAVE();
+        return MNULL;
+    }
+
+    while (ptx_tbl != (TxBAStreamTbl *) & priv->tx_ba_stream_tbl_ptr) {
+
+        PRINTM(MDAT_D, "get_txbastream_tbl TID %d\n", ptx_tbl->tid);
+        DBG_HEXDUMP(MDAT_D, "RA", ptx_tbl->ra, MLAN_MAC_ADDR_LENGTH);
+
+        if ((!memcmp(pmadapter, ptx_tbl->ra, ra, MLAN_MAC_ADDR_LENGTH))
+            && (ptx_tbl->tid == tid)) {
+            LEAVE();
+            return ptx_tbl;
+        }
+
+        ptx_tbl = ptx_tbl->pnext;
+    }
+
+    LEAVE();
+    return MNULL;
+}
+
+/**
+ *  @brief This function will create a entry in tx ba stream table for the 
+ *  		given RA/TID.
+ *  
+ *  @param priv      A pointer to mlan_private
+ *  @param ra        RA to find in reordering table
+ *  @param tid	     TID to find in reordering table
+ *  @param ba_status BA stream status to create the stream with
+ *
+ *  @return 	    N/A
+ */
+void
+wlan_11n_create_txbastream_tbl(mlan_private * priv,
+                               t_u8 * ra, int tid, baStatus_e ba_status)
+{
+    TxBAStreamTbl *newNode = MNULL;
+    pmlan_adapter pmadapter = priv->adapter;
+
+    ENTER();
+
+    if (!wlan_11n_get_txbastream_tbl(priv, tid, ra)) {
+        PRINTM(MDAT_D, "get_txbastream_tbl TID %d\n", tid);
+        DBG_HEXDUMP(MDAT_D, "RA", ra, MLAN_MAC_ADDR_LENGTH);
+
+        pmadapter->callbacks.moal_malloc(pmadapter->pmoal_handle,
+                                         sizeof(TxBAStreamTbl), MLAN_MEM_DEF,
+                                         (t_u8 **) & newNode);
+        util_init_list((pmlan_linked_list) newNode);
+
+        newNode->tid = tid;
+        newNode->ba_status = ba_status;
+        memcpy(pmadapter, newNode->ra, ra, MLAN_MAC_ADDR_LENGTH);
+
+        util_enqueue_list_tail(pmadapter->pmoal_handle,
+                               &priv->tx_ba_stream_tbl_ptr,
+                               (pmlan_linked_list) newNode,
+                               pmadapter->callbacks.moal_spin_lock,
+                               pmadapter->callbacks.moal_spin_unlock);
+    }
+
+    LEAVE();
+}
+
+/**
+ *  @brief This function will send a block ack to given tid/ra
+ *  
+ *  @param priv     A pointer to mlan_private
+ *  @param tid	    TID to send the ADDBA
+ *  @param peer_mac MAC address to send the ADDBA
+ *
+ *  @return 	    MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+int
+wlan_send_addba(mlan_private * priv, int tid, t_u8 * peer_mac)
+{
+    HostCmd_DS_11N_ADDBA_REQ add_ba_req;
+    static t_u8 dialog_tok;
+    mlan_status ret;
+
+    ENTER();
+
+    PRINTM(MCMND, "Send addba: TID %d\n", tid);
+    DBG_HEXDUMP(MCMD_D, "Send addba RA", peer_mac, MLAN_MAC_ADDR_LENGTH);
+
+    add_ba_req.block_ack_param_set = (t_u16) ((tid << BLOCKACKPARAM_TID_POS) |
+                                              (priv->add_ba_param.tx_win_size
+                                               << BLOCKACKPARAM_WINSIZE_POS) |
+                                              IMMEDIATE_BLOCK_ACK);
+    add_ba_req.block_ack_tmo = (t_u16) priv->add_ba_param.timeout;
+
+    ++dialog_tok;
+
+    if (dialog_tok == 0)
+        dialog_tok = 1;
+
+    add_ba_req.dialog_token = dialog_tok;
+    memcpy(priv->adapter, &add_ba_req.peer_mac_addr, peer_mac,
+           MLAN_MAC_ADDR_LENGTH);
+
+    /* We don't wait for the response of this command */
+    ret = wlan_prepare_cmd(priv, HostCmd_CMD_11N_ADDBA_REQ,
+                           0, 0, MNULL, &add_ba_req);
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function will delete a block ack to given tid/ra
+ *  
+ *  @param priv    		A pointer to mlan_private
+ *  @param tid	   		TID to send the ADDBA
+ *  @param peer_mac 	MAC address to send the ADDBA
+ *  @param initiator 	MTRUE if we have initiated ADDBA, MFALSE otherwise
+ *
+ *  @return 	        MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+int
+wlan_send_delba(mlan_private * priv, int tid, t_u8 * peer_mac, int initiator)
+{
+    HostCmd_DS_11N_DELBA delba;
+    mlan_status ret;
+
+    ENTER();
+
+    memset(priv->adapter, &delba, 0, sizeof(delba));
+    delba.del_ba_param_set = (tid << DELBA_TID_POS);
+
+    if (initiator)
+        DELBA_INITIATOR(delba.del_ba_param_set);
+    else
+        DELBA_RECIPIENT(delba.del_ba_param_set);
+
+    memcpy(priv->adapter, &delba.peer_mac_addr, peer_mac, MLAN_MAC_ADDR_LENGTH);
+
+    /* We don't wait for the response of this command */
+    ret = wlan_prepare_cmd(priv, HostCmd_CMD_11N_DELBA,
+                           HostCmd_ACT_GEN_SET, 0, MNULL, &delba);
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief This function handles the command response of
+ *  		delete a block ack request
+ *  
+ *  @param priv		A pointer to mlan_private structure
+ *  @param del_ba	A pointer to command response buffer
+ *
+ *  @return        N/A
+ */
+void
+wlan_11n_delete_bastream(mlan_private * priv, t_u8 * del_ba)
+{
+    HostCmd_DS_11N_DELBA *pdel_ba = (HostCmd_DS_11N_DELBA *) del_ba;
+    int tid;
+
+    ENTER();
+
+    DBG_HEXDUMP(MCMD_D, "Delba:", (t_u8 *) pdel_ba, 20);
+    pdel_ba->del_ba_param_set = wlan_le16_to_cpu(pdel_ba->del_ba_param_set);
+    pdel_ba->reason_code = wlan_le16_to_cpu(pdel_ba->reason_code);
+
+    tid = pdel_ba->del_ba_param_set >> DELBA_TID_POS;
+
+    mlan_11n_delete_bastream_tbl(priv, tid, pdel_ba->peer_mac_addr,
+                                 TYPE_DELBA_RECEIVE,
+                                 INITIATOR_BIT(pdel_ba->del_ba_param_set));
+
+    LEAVE();
+}
+
+/** 
+ *  @brief Get Rx reordering table
+ *   
+ *  @param priv         A pointer to mlan_private structure
+ *  @param buf          A pointer to rx_reorder_tbl structure
+ *  @return             number of rx reorder table entry
+ */
+int
+wlan_get_rxreorder_tbl(mlan_private * priv, rx_reorder_tbl * buf)
+{
+    int i;
+    rx_reorder_tbl *ptbl = buf;
+    RxReorderTbl *rxReorderTblPtr;
+    int count = 0;
+    ENTER();
+    if (!
+        (rxReorderTblPtr =
+         (RxReorderTbl *) util_peek_list(priv->adapter->pmoal_handle,
+                                         &priv->rx_reorder_tbl_ptr,
+                                         priv->adapter->callbacks.
+                                         moal_spin_lock,
+                                         priv->adapter->callbacks.
+                                         moal_spin_unlock))) {
+        LEAVE();
+        return count;
+    }
+    while (rxReorderTblPtr != (RxReorderTbl *) & priv->rx_reorder_tbl_ptr) {
+        ptbl->tid = (t_u16) rxReorderTblPtr->tid;
+        memcpy(priv->adapter, ptbl->ta, rxReorderTblPtr->ta,
+               MLAN_MAC_ADDR_LENGTH);
+        ptbl->start_win = rxReorderTblPtr->start_win;
+        ptbl->win_size = rxReorderTblPtr->win_size;
+        ptbl->amsdu = MFALSE;
+        for (i = 0; i < rxReorderTblPtr->win_size; ++i) {
+            if (rxReorderTblPtr->rx_reorder_ptr[i])
+                ptbl->buffer[i] = MTRUE;
+            else
+                ptbl->buffer[i] = MFALSE;
+        }
+        rxReorderTblPtr = rxReorderTblPtr->pnext;
+        ptbl++;
+        count++;
+        if (count >= MLAN_MAX_RX_BASTREAM_SUPPORTED)
+            break;
+    }
+    LEAVE();
+    return count;
+}
+
+/** 
+ *  @brief Get transmit BA stream table
+ *   
+ *  @param priv         A pointer to mlan_private structure
+ *  @param buf          A pointer to tx_ba_stream_tbl structure
+ *  @return             number of ba stream table entry
+ */
+int
+wlan_get_txbastream_tbl(mlan_private * priv, tx_ba_stream_tbl * buf)
+{
+    TxBAStreamTbl *ptxtbl;
+    tx_ba_stream_tbl *ptbl = buf;
+    int count = 0;
+
+    ENTER();
+
+    if (!(ptxtbl = (TxBAStreamTbl *) util_peek_list(priv->adapter->pmoal_handle,
+                                                    &priv->tx_ba_stream_tbl_ptr,
+                                                    priv->adapter->callbacks.
+                                                    moal_spin_lock,
+                                                    priv->adapter->callbacks.
+                                                    moal_spin_unlock))) {
+        LEAVE();
+        return count;
+    }
+
+    while (ptxtbl != (TxBAStreamTbl *) & priv->tx_ba_stream_tbl_ptr) {
+        ptbl->tid = (t_u16) ptxtbl->tid;
+        PRINTM(MINFO, "tid=%d\n", ptbl->tid);
+        memcpy(priv->adapter, ptbl->ra, ptxtbl->ra, MLAN_MAC_ADDR_LENGTH);
+        ptbl->amsdu = MFALSE;
+        ptxtbl = ptxtbl->pnext;
+        ptbl++;
+        count++;
+        if (count >= MLAN_MAX_TX_BASTREAM_SUPPORTED)
+            break;
+    }
+
+    LEAVE();
+    return count;
+}
+
+/**
+ *  @brief This function cleans up txbastream_tbl for specific station
+ *  
+ *  @param priv    	A pointer to mlan_private
+ *  @param ra       RA to find in txbastream_tbl       
+ *  @return 	   	N/A
+ */
+void
+wlan_11n_cleanup_txbastream_tbl(mlan_private * priv, t_u8 * ra)
+{
+    TxBAStreamTbl *ptx_tbl = MNULL;
+    t_u8 i;
+    ENTER();
+    for (i = 0; i < MAX_NUM_TID; ++i) {
+        if ((ptx_tbl = wlan_11n_get_txbastream_tbl(priv, i, ra))) {
+            wlan_11n_delete_txbastream_tbl_entry(priv, ptx_tbl);
+        }
+    }
+    LEAVE();
+    return;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_11n.h linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_11n.h
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_11n.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_11n.h	2017-09-23 03:42:50.098674820 +0800
@@ -0,0 +1,388 @@
+/** @file mlan_11n.h
+ *
+ *  @brief Interface for the 802.11n mlan_11n module implemented in mlan_11n.c
+ *
+ *  Driver interface functions and type declarations for the 11n module
+ *    implemented in mlan_11n.c.
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/********************************************************
+Change log:
+    12/01/2008: initial version
+********************************************************/
+
+#ifndef _MLAN_11N_H_
+#define _MLAN_11N_H_
+
+#include "mlan_11n_aggr.h"
+#include "mlan_11n_rxreorder.h"
+#include "mlan_wmm.h"
+
+/** Print the 802.11n device capability */
+void wlan_show_dot11ndevcap(pmlan_adapter pmadapter, t_u32 cap);
+/** Print the 802.11n device MCS */
+void wlan_show_devmcssupport(pmlan_adapter pmadapter, t_u8 support);
+/** Handle the command response of a delete block ack request */
+mlan_status wlan_ret_11n_delba(mlan_private * priv, HostCmd_DS_COMMAND * resp);
+/** Handle the command response of an add block ack request */
+mlan_status wlan_ret_11n_addba_req(mlan_private * priv,
+                                   HostCmd_DS_COMMAND * resp);
+/** Handle the command response of 11ncfg command */
+mlan_status wlan_ret_11n_cfg(IN pmlan_private pmpriv,
+                             IN HostCmd_DS_COMMAND * resp,
+                             IN mlan_ioctl_req * pioctl_buf);
+/** Prepare 11ncfg command */
+mlan_status wlan_cmd_11n_cfg(IN pmlan_private pmpriv,
+                             IN HostCmd_DS_COMMAND * cmd, IN t_u16 cmd_action,
+                             IN t_void * pdata_buf);
+/** Prepare TX BF configuration command */
+mlan_status wlan_cmd_tx_bf_cfg(IN pmlan_private pmpriv,
+                               IN HostCmd_DS_COMMAND * cmd,
+                               IN t_u16 cmd_action, IN t_void * pdata_buf);
+/** Handle the command response TX BF configuration */
+mlan_status wlan_ret_tx_bf_cfg(IN pmlan_private pmpriv,
+                               IN HostCmd_DS_COMMAND * resp,
+                               IN mlan_ioctl_req * pioctl_buf);
+#ifdef STA_SUPPORT
+/** Append the 802_11N tlv */
+int wlan_cmd_append_11n_tlv(IN mlan_private * pmpriv,
+                            IN BSSDescriptor_t * pbss_desc,
+                            OUT t_u8 ** ppbuffer);
+/** Reconfigure the tx buf size in firmware */
+void wlan_cfg_tx_buf(mlan_private * pmpriv, BSSDescriptor_t * pbss_desc);
+/** wlan fill HT cap tlv */
+void wlan_fill_ht_cap_tlv(mlan_private * priv, MrvlIETypes_HTCap_t * pht_cap);
+#endif /* STA_SUPPORT */
+/** Miscellaneous configuration handler */
+mlan_status wlan_11n_cfg_ioctl(IN pmlan_adapter pmadapter,
+                               IN pmlan_ioctl_req pioctl_req);
+/** Delete Tx BA stream table entry */
+void wlan_11n_delete_txbastream_tbl_entry(mlan_private * priv,
+                                          TxBAStreamTbl * ptx_tbl);
+/** Delete all Tx BA stream table entries */
+void wlan_11n_deleteall_txbastream_tbl(mlan_private * priv);
+/** Get Tx BA stream table */
+TxBAStreamTbl *wlan_11n_get_txbastream_tbl(mlan_private * priv, int tid,
+                                           t_u8 * ra);
+/** Create Tx BA stream table */
+void wlan_11n_create_txbastream_tbl(mlan_private * priv, t_u8 * ra, int tid,
+                                    baStatus_e ba_status);
+/** Send ADD BA request */
+int wlan_send_addba(mlan_private * priv, int tid, t_u8 * peer_mac);
+/** Send DEL BA request */
+int wlan_send_delba(mlan_private * priv, int tid, t_u8 * peer_mac,
+                    int initiator);
+/** This function handles the command response of delete a block ack request*/
+void wlan_11n_delete_bastream(mlan_private * priv, t_u8 * del_ba);
+/** get rx reorder table */
+int wlan_get_rxreorder_tbl(mlan_private * priv, rx_reorder_tbl * buf);
+/** get tx ba stream table */
+int wlan_get_txbastream_tbl(mlan_private * priv, tx_ba_stream_tbl * buf);
+/** Minimum number of AMSDU */
+#define MIN_NUM_AMSDU 2
+/** AMSDU Aggr control cmd resp */
+mlan_status wlan_ret_amsdu_aggr_ctrl(pmlan_private pmpriv,
+                                     HostCmd_DS_COMMAND * resp,
+                                     mlan_ioctl_req * pioctl_buf);
+/** reconfigure tx buf size */
+mlan_status wlan_cmd_recfg_tx_buf(mlan_private * priv,
+                                  HostCmd_DS_COMMAND * cmd,
+                                  int cmd_action, void *pdata_buf);
+/** AMSDU aggr control cmd */
+mlan_status wlan_cmd_amsdu_aggr_ctrl(mlan_private * priv,
+                                     HostCmd_DS_COMMAND * cmd,
+                                     int cmd_action, void *pdata_buf);
+
+/** clean up txbastream_tbl */
+void wlan_11n_cleanup_txbastream_tbl(mlan_private * priv, t_u8 * ra);
+/**
+ *  @brief This function checks whether a station has 11N enabled or not
+ *  
+ *  @param priv     A pointer to mlan_private
+ *  @param mac      station mac address
+ *  @return 	    MTRUE or MFALSE
+ */
+static INLINE t_u8
+is_station_11n_enabled(mlan_private * priv, t_u8 * mac)
+{
+    sta_node *sta_ptr = MNULL;
+    if ((sta_ptr = wlan_get_station_entry(priv, mac))) {
+        return (sta_ptr->is_11n_enabled) ? MTRUE : MFALSE;
+    }
+    return MFALSE;
+}
+
+/**
+ *  @brief This function checks whether a station allows AMPDU or not
+ *  
+ *  @param priv     A pointer to mlan_private
+ *  @param ptr      A pointer to RA list table
+ *  @param tid      TID value for ptr
+ *  @return 	    MTRUE or MFALSE
+ */
+static INLINE t_u8
+is_station_ampdu_allowed(mlan_private * priv, raListTbl * ptr, int tid)
+{
+    sta_node *sta_ptr = MNULL;
+    if ((sta_ptr = wlan_get_station_entry(priv, ptr->ra))) {
+        if (GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_UAP) {
+            if (priv->sec_info.wapi_enabled && !sta_ptr->wapi_key_on)
+                return MFALSE;
+        }
+        return ((sta_ptr->ampdu_sta[tid] != BA_STREAM_NOT_ALLOWED)
+                ? MTRUE : MFALSE);
+    }
+    return MFALSE;
+}
+
+/**
+ *  @brief This function disable station ampdu for specific tid 
+ *  
+ *  @param priv     A pointer to mlan_private
+ *  @param tid     tid index
+ *  @param ra      station mac address
+ *  @return 	   N/A
+ */
+static INLINE void
+disable_station_ampdu(mlan_private * priv, t_u8 tid, t_u8 * ra)
+{
+    sta_node *sta_ptr = MNULL;
+    if ((sta_ptr = wlan_get_station_entry(priv, ra))) {
+        sta_ptr->ampdu_sta[tid] = BA_STREAM_NOT_ALLOWED;
+    }
+    return;
+}
+
+/**
+ *  @brief This function checks whether current BA stream is high priority or not
+ *  
+ *  @param priv     A pointer to mlan_private
+ *  @param tid	    TID
+ *
+ *  @return 	    MTRUE or MFALSE
+ */
+static INLINE t_u8
+wlan_is_cur_bastream_high_prio(mlan_private * priv, int tid)
+{
+    TxBAStreamTbl *ptx_tbl;
+
+    ENTER();
+
+    if (!
+        (ptx_tbl =
+         (TxBAStreamTbl *) util_peek_list(priv->adapter->pmoal_handle,
+                                          &priv->tx_ba_stream_tbl_ptr,
+                                          priv->adapter->callbacks.
+                                          moal_spin_lock,
+                                          priv->adapter->callbacks.
+                                          moal_spin_unlock)))
+        return MFALSE;
+
+    while (ptx_tbl != (TxBAStreamTbl *) & priv->tx_ba_stream_tbl_ptr) {
+        if (priv->aggr_prio_tbl[tid].ampdu_user >
+            priv->aggr_prio_tbl[ptx_tbl->tid].ampdu_user) {
+            LEAVE();
+            return MTRUE;
+        }
+
+        ptx_tbl = ptx_tbl->pnext;
+    }
+
+    LEAVE();
+    return MFALSE;
+}
+
+/**
+ *  @brief This function checks whether AMPDU is allowed or not
+ *  
+ *  @param priv     A pointer to mlan_private
+ *  @param ptr      A pointer to RA list table
+ *  @param tid      TID value for ptr
+ *
+ *  @return 	    MTRUE or MFALSE
+ */
+static INLINE t_u8
+wlan_is_ampdu_allowed(mlan_private * priv, raListTbl * ptr, int tid)
+{
+#ifdef UAP_SUPPORT
+    if (GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_UAP)
+        return is_station_ampdu_allowed(priv, ptr, tid);
+#endif /* UAP_SUPPORT */
+    if (priv->sec_info.wapi_enabled && !priv->sec_info.wapi_key_on)
+        return MFALSE;
+
+    return ((priv->aggr_prio_tbl[tid].ampdu_ap != BA_STREAM_NOT_ALLOWED)
+            ? MTRUE : MFALSE);
+}
+
+/**
+ *  @brief This function checks whether AMSDU is allowed or not
+ *  
+ *  @param priv     A pointer to mlan_private
+ *  @param ptr      A pointer to RA list table
+ *  @param tid      TID value for ptr
+ *
+ *  @return 	    MTRUE or MFALSE
+ */
+static INLINE t_u8
+wlan_is_amsdu_allowed(mlan_private * priv, raListTbl * ptr, int tid)
+{
+#ifdef UAP_SUPPORT
+    sta_node *sta_ptr = MNULL;
+    if (GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_UAP) {
+        if ((sta_ptr = wlan_get_station_entry(priv, ptr->ra))) {
+            if (priv->sec_info.wapi_enabled && !sta_ptr->wapi_key_on)
+                return MFALSE;
+        }
+    }
+#endif /* UAP_SUPPORT */
+#define TXRATE_BITMAP_INDEX_MCS0_7 2
+    return (((priv->aggr_prio_tbl[tid].amsdu != BA_STREAM_NOT_ALLOWED)
+             && ((priv->is_data_rate_auto)
+                 || !((priv->bitmap_rates[TXRATE_BITMAP_INDEX_MCS0_7]) & 0x03)))
+            ? MTRUE : MFALSE);
+}
+
+/**
+ *  @brief This function checks whether a BA stream is available or not
+ *  
+ *  @param priv     A pointer to mlan_private
+ *
+ *  @return 	    MTRUE or MFALSE
+ */
+static INLINE t_u8
+wlan_is_bastream_avail(mlan_private * priv)
+{
+    mlan_private *pmpriv = MNULL;
+    t_u8 i = 0;
+    t_u32 bastream_num = 0;
+    for (i = 0; i < priv->adapter->priv_num; i++) {
+        if ((pmpriv = priv->adapter->priv[i]))
+            bastream_num +=
+                wlan_wmm_list_len(priv->adapter,
+                                  (pmlan_list_head) & pmpriv->
+                                  tx_ba_stream_tbl_ptr);
+    }
+    return ((bastream_num < MLAN_MAX_TX_BASTREAM_SUPPORTED) ? MTRUE : MFALSE);
+}
+
+/**
+ *  @brief This function finds the stream to delete
+ *  
+ *  @param priv     A pointer to mlan_private
+ *  @param ptr      A pointer to RA list table
+ *  @param ptr_tid  TID value of ptr
+ *  @param ptid     A pointer to TID of stream to delete, if return MTRUE
+ *  @param ra       RA of stream to delete, if return MTRUE
+ *
+ *  @return 	    MTRUE or MFALSE
+ */
+static INLINE t_u8
+wlan_find_stream_to_delete(mlan_private * priv,
+                           raListTbl * ptr, int ptr_tid, int *ptid, t_u8 * ra)
+{
+    int tid;
+    t_u8 ret = MFALSE;
+    TxBAStreamTbl *ptx_tbl;
+
+    ENTER();
+
+    if (!
+        (ptx_tbl =
+         (TxBAStreamTbl *) util_peek_list(priv->adapter->pmoal_handle,
+                                          &priv->tx_ba_stream_tbl_ptr,
+                                          priv->adapter->callbacks.
+                                          moal_spin_lock,
+                                          priv->adapter->callbacks.
+                                          moal_spin_unlock))) {
+        LEAVE();
+        return ret;
+    }
+
+    tid = priv->aggr_prio_tbl[ptr_tid].ampdu_user;
+
+    while (ptx_tbl != (TxBAStreamTbl *) & priv->tx_ba_stream_tbl_ptr) {
+        if (tid > priv->aggr_prio_tbl[ptx_tbl->tid].ampdu_user) {
+            tid = priv->aggr_prio_tbl[ptx_tbl->tid].ampdu_user;
+            *ptid = ptx_tbl->tid;
+            memcpy(priv->adapter, ra, ptx_tbl->ra, MLAN_MAC_ADDR_LENGTH);
+            ret = MTRUE;
+        }
+
+        ptx_tbl = ptx_tbl->pnext;
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function checks whether BA stream is setup
+ *  
+ *  @param priv     A pointer to mlan_private
+ *  @param ptr      A pointer to RA list table
+ *  @param tid	    TID value for ptr
+ *
+ *  @return 	    MTRUE or MFALSE
+ */
+static int INLINE
+wlan_is_bastream_setup(mlan_private * priv, raListTbl * ptr, int tid)
+{
+    TxBAStreamTbl *ptx_tbl;
+
+    ENTER();
+
+    if ((ptx_tbl = wlan_11n_get_txbastream_tbl(priv, tid, ptr->ra))) {
+        LEAVE();
+        return IS_BASTREAM_SETUP(ptx_tbl) ? MTRUE : MFALSE;
+    }
+
+    LEAVE();
+    return MFALSE;
+}
+
+/**
+ *  @brief This function checks whether 11n is supported
+ *  
+ *  @param priv     A pointer to mlan_private
+ *  @param ra       Address of the receiver STA
+ *
+ *  @return 	    MTRUE or MFALSE
+ */
+static int INLINE
+wlan_is_11n_enabled(mlan_private * priv, t_u8 * ra)
+{
+    int ret = MFALSE;
+    ENTER();
+#ifdef UAP_SUPPORT
+    if (GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_UAP) {
+        if ((!(ra[0] & 0x01)) && (priv->is_11n_enabled))
+            ret = is_station_11n_enabled(priv, ra);
+    }
+#endif /* UAP_SUPPORT */
+    LEAVE();
+    return ret;
+}
+#endif /* !_MLAN_11N_H_ */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_11n_rxreorder.c linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_11n_rxreorder.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_11n_rxreorder.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_11n_rxreorder.c	2017-09-23 03:42:50.098674820 +0800
@@ -0,0 +1,1073 @@
+/** @file mlan_11n_rxreorder.c
+ *
+ *  @brief This file contains the handling of RxReordering in wlan
+ *  driver.
+ * 
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/********************************************************
+Change log:
+    11/10/2008: initial version
+********************************************************/
+
+#include "mlan.h"
+#include "mlan_join.h"
+#include "mlan_util.h"
+#include "mlan_fw.h"
+#include "mlan_main.h"
+#include "mlan_wmm.h"
+#include "mlan_11n.h"
+#include "mlan_11n_rxreorder.h"
+
+/********************************************************
+    Local Variables
+********************************************************/
+
+/********************************************************
+    Global Variables
+********************************************************/
+
+/********************************************************
+    Local Functions
+********************************************************/
+
+/**
+ *  @brief This function will process the rx packet and 
+ *  		forward it to kernel/upper layer
+ *  
+ *  @param priv    	A pointer to mlan_private
+ *  @param payload  A pointer to rx packet payload
+ *
+ *  @return 	   	MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_11n_dispatch_pkt(t_void * priv, t_void * payload)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+#ifdef STA_SUPPORT
+    pmlan_adapter pmadapter = ((pmlan_private) priv)->adapter;
+#endif
+    if (payload == (t_void *) RX_PKT_DROPPED_IN_FW)
+        return ret;
+#ifdef UAP_SUPPORT
+    if (GET_BSS_ROLE((mlan_private *) priv) == MLAN_BSS_ROLE_UAP) {
+        return wlan_process_uap_rx_packet(priv, (pmlan_buffer) payload);
+    }
+#endif /* UAP_SUPPORT */
+
+#ifdef STA_SUPPORT
+    ret = wlan_process_rx_packet(pmadapter, (pmlan_buffer) payload);
+#endif /* STA_SUPPORT */
+    return ret;
+}
+
+/**
+ *  @brief This function restarts the reordering timeout timer
+ *    
+ *  @param pmadapter    	A pointer to mlan_adapter
+ *  @param rx_reor_tbl_ptr  A pointer to structure RxReorderTbl
+ */
+static void
+mlan_11n_rxreorder_timer_restart(pmlan_adapter pmadapter,
+                                 RxReorderTbl * rx_reor_tbl_ptr)
+{
+    if (rx_reor_tbl_ptr->timer_context.timer_is_set)
+        pmadapter->callbacks.moal_stop_timer(pmadapter->pmoal_handle,
+                                             rx_reor_tbl_ptr->timer_context.
+                                             timer);
+
+    pmadapter->callbacks.moal_start_timer(pmadapter->pmoal_handle,
+                                          rx_reor_tbl_ptr->timer_context.timer,
+                                          MFALSE,
+                                          (rx_reor_tbl_ptr->win_size
+                                           * MIN_FLUSH_TIMER_MS));
+
+    rx_reor_tbl_ptr->timer_context.timer_is_set = MTRUE;
+}
+
+/**
+ *  @brief This function dispatches all the packets in the buffer.
+ *  		There could be holes in the buffer.
+ *    
+ *  @param priv    	        A pointer to mlan_private
+ *  @param rx_reor_tbl_ptr  A pointer to structure RxReorderTbl
+ *  @param start_win        Start window
+ *
+ *  @return 	   	        MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_11n_dispatch_pkt_until_start_win(t_void * priv,
+                                      RxReorderTbl * rx_reor_tbl_ptr,
+                                      int start_win)
+{
+    int no_pkt_to_send, i, xchg;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    void *rx_tmp_ptr = MNULL;
+    mlan_private *pmpriv = (mlan_private *) priv;
+
+    ENTER();
+
+    no_pkt_to_send = (start_win > rx_reor_tbl_ptr->start_win) ?
+        MIN((start_win - rx_reor_tbl_ptr->start_win),
+            rx_reor_tbl_ptr->win_size) : rx_reor_tbl_ptr->win_size;
+
+    for (i = 0; i < no_pkt_to_send; ++i) {
+        pmpriv->adapter->callbacks.moal_spin_lock(pmpriv->adapter->pmoal_handle,
+                                                  pmpriv->rx_pkt_lock);
+        rx_tmp_ptr = MNULL;
+        if (rx_reor_tbl_ptr->rx_reorder_ptr[i]) {
+            rx_tmp_ptr = rx_reor_tbl_ptr->rx_reorder_ptr[i];
+            rx_reor_tbl_ptr->rx_reorder_ptr[i] = MNULL;
+        }
+        pmpriv->adapter->callbacks.moal_spin_unlock(pmpriv->adapter->
+                                                    pmoal_handle,
+                                                    pmpriv->rx_pkt_lock);
+        if (rx_tmp_ptr)
+            wlan_11n_dispatch_pkt(priv, rx_tmp_ptr);
+    }
+
+    pmpriv->adapter->callbacks.moal_spin_lock(pmpriv->adapter->pmoal_handle,
+                                              pmpriv->rx_pkt_lock);
+    /* 
+     * We don't have a circular buffer, hence use rotation to simulate
+     * circular buffer
+     */
+    xchg = rx_reor_tbl_ptr->win_size - no_pkt_to_send;
+    for (i = 0; i < xchg; ++i) {
+        rx_reor_tbl_ptr->rx_reorder_ptr[i] =
+            rx_reor_tbl_ptr->rx_reorder_ptr[no_pkt_to_send + i];
+        rx_reor_tbl_ptr->rx_reorder_ptr[no_pkt_to_send + i] = MNULL;
+    }
+
+    rx_reor_tbl_ptr->start_win = start_win;
+    pmpriv->adapter->callbacks.moal_spin_unlock(pmpriv->adapter->pmoal_handle,
+                                                pmpriv->rx_pkt_lock);
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function will display the rxReorder table
+ *      
+ *  @param pmadapter          A pointer to mlan_adapter structure
+ *  @param rx_reor_tbl_ptr    A pointer to structure RxReorderTbl
+ *
+ *  @return 	   	N/A
+ */
+static t_void
+wlan_11n_display_tbl_ptr(pmlan_adapter pmadapter,
+                         RxReorderTbl * rx_reor_tbl_ptr)
+{
+    ENTER();
+
+    DBG_HEXDUMP(MDAT_D, "Reorder ptr", rx_reor_tbl_ptr->rx_reorder_ptr,
+                sizeof(t_void *) * rx_reor_tbl_ptr->win_size);
+
+    LEAVE();
+}
+
+/**
+ *  @brief This function will dispatch all packets sequentially 
+ *  		from start_win until a hole is found and adjust the 
+ *  		start_win appropriately
+ *
+ *  @param priv    	        A pointer to mlan_private
+ *  @param rx_reor_tbl_ptr  A pointer to structure RxReorderTbl
+ *
+ *  @return 	   	        MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_11n_scan_and_dispatch(t_void * priv, RxReorderTbl * rx_reor_tbl_ptr)
+{
+    int i, j, xchg;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    void *rx_tmp_ptr = MNULL;
+    mlan_private *pmpriv = (mlan_private *) priv;
+
+    ENTER();
+
+    for (i = 0; i < rx_reor_tbl_ptr->win_size; ++i) {
+        pmpriv->adapter->callbacks.moal_spin_lock(pmpriv->adapter->pmoal_handle,
+                                                  pmpriv->rx_pkt_lock);
+        if (!rx_reor_tbl_ptr->rx_reorder_ptr[i]) {
+            pmpriv->adapter->callbacks.moal_spin_unlock(pmpriv->adapter->
+                                                        pmoal_handle,
+                                                        pmpriv->rx_pkt_lock);
+            break;
+        }
+        rx_tmp_ptr = rx_reor_tbl_ptr->rx_reorder_ptr[i];
+        rx_reor_tbl_ptr->rx_reorder_ptr[i] = MNULL;
+        pmpriv->adapter->callbacks.moal_spin_unlock(pmpriv->adapter->
+                                                    pmoal_handle,
+                                                    pmpriv->rx_pkt_lock);
+        wlan_11n_dispatch_pkt(priv, rx_tmp_ptr);
+    }
+
+    pmpriv->adapter->callbacks.moal_spin_lock(pmpriv->adapter->pmoal_handle,
+                                              pmpriv->rx_pkt_lock);
+    /* 
+     * We don't have a circular buffer, hence use rotation to simulate
+     * circular buffer
+     */
+    if (i > 0) {
+        xchg = rx_reor_tbl_ptr->win_size - i;
+        for (j = 0; j < xchg; ++j) {
+            rx_reor_tbl_ptr->rx_reorder_ptr[j] =
+                rx_reor_tbl_ptr->rx_reorder_ptr[i + j];
+            rx_reor_tbl_ptr->rx_reorder_ptr[i + j] = MNULL;
+        }
+    }
+
+    rx_reor_tbl_ptr->start_win = (rx_reor_tbl_ptr->start_win + i)
+        & (MAX_TID_VALUE - 1);
+
+    pmpriv->adapter->callbacks.moal_spin_unlock(pmpriv->adapter->pmoal_handle,
+                                                pmpriv->rx_pkt_lock);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function delete rxreorder table's entry 
+ *         	and free the memory
+ *
+ *  @param priv    	        A pointer to mlan_private
+ *  @param rx_reor_tbl_ptr  A pointer to structure RxReorderTbl
+ *
+ *  @return 	   	        N/A
+ */
+static t_void
+wlan_11n_delete_rxreorder_tbl_entry(mlan_private * priv,
+                                    RxReorderTbl * rx_reor_tbl_ptr)
+{
+    pmlan_adapter pmadapter = priv->adapter;
+
+    ENTER();
+
+    if (!rx_reor_tbl_ptr) {
+        LEAVE();
+        return;
+    }
+
+    wlan_11n_dispatch_pkt_until_start_win(priv, rx_reor_tbl_ptr,
+                                          (rx_reor_tbl_ptr->start_win +
+                                           rx_reor_tbl_ptr->win_size)
+                                          & (MAX_TID_VALUE - 1));
+
+    if (rx_reor_tbl_ptr->timer_context.timer) {
+        if (rx_reor_tbl_ptr->timer_context.timer_is_set)
+            priv->adapter->callbacks.moal_stop_timer(pmadapter->pmoal_handle,
+                                                     rx_reor_tbl_ptr->timer_context.
+                                                     timer);
+        priv->adapter->callbacks.moal_free_timer(pmadapter->pmoal_handle,
+                                                 rx_reor_tbl_ptr->timer_context.
+                                                 timer);
+    }
+
+    PRINTM(MDAT_D, "Delete rx_reor_tbl_ptr: %p\n", rx_reor_tbl_ptr);
+    util_unlink_list(pmadapter->pmoal_handle,
+                     &priv->rx_reorder_tbl_ptr,
+                     (pmlan_linked_list) rx_reor_tbl_ptr,
+                     pmadapter->callbacks.moal_spin_lock,
+                     pmadapter->callbacks.moal_spin_unlock);
+
+    pmadapter->callbacks.moal_mfree(pmadapter->pmoal_handle,
+                                    (t_u8 *) rx_reor_tbl_ptr->rx_reorder_ptr);
+    pmadapter->callbacks.moal_mfree(pmadapter->pmoal_handle,
+                                    (t_u8 *) rx_reor_tbl_ptr);
+
+    LEAVE();
+}
+
+/**
+ *  @brief This function returns the last used sequence number 
+ *
+ *  @param rx_reorder_tbl_ptr   A pointer to structure RxReorderTbl
+ *
+ *  @return 	   	            Last used sequence number
+ */
+static int
+wlan_11n_find_last_seqnum(RxReorderTbl * rx_reorder_tbl_ptr)
+{
+    int i;
+
+    for (i = (rx_reorder_tbl_ptr->win_size - 1); i >= 0; --i) {
+        if (rx_reorder_tbl_ptr->rx_reorder_ptr[i]) {
+            return i;
+        }
+    }
+
+    return -1;
+}
+
+/**
+ *  @brief This function flushes all data
+ *
+ *  @param context      Reorder context pointer
+ *
+ *  @return 	   	    N/A
+ */
+static t_void
+wlan_flush_data(t_void * context)
+{
+    reorder_tmr_cnxt_t *reorder_cnxt = (reorder_tmr_cnxt_t *) context;
+    int startWin;
+
+    reorder_cnxt->timer_is_set = MFALSE;
+    wlan_11n_display_tbl_ptr(reorder_cnxt->priv->adapter, reorder_cnxt->ptr);
+
+    if ((startWin = wlan_11n_find_last_seqnum(reorder_cnxt->ptr)) >= 0) {
+        PRINTM(MINFO, "Flush data %d\n", startWin);
+        wlan_11n_dispatch_pkt_until_start_win(reorder_cnxt->priv,
+                                              reorder_cnxt->ptr,
+                                              ((reorder_cnxt->ptr->start_win +
+                                                startWin + 1) & (MAX_TID_VALUE -
+                                                                 1)));
+    }
+
+    wlan_11n_display_tbl_ptr(reorder_cnxt->priv->adapter, reorder_cnxt->ptr);
+}
+
+/**
+ *  @brief This function will create a entry in rx reordering table for the 
+ *  		given ta/tid and will initialize it with seq_num, win_size
+ *  
+ *  @param priv     A pointer to mlan_private
+ *  @param ta       ta to find in reordering table
+ *  @param tid	    tid to find in reordering table
+ *  @param win_size win_size for the give ta/tid pair.
+ *  @param seq_num  Starting sequence number for current entry.
+ *
+ *  @return 	    N/A
+ */
+static t_void
+wlan_11n_create_rxreorder_tbl(mlan_private * priv, t_u8 * ta, int tid,
+                              int win_size, int seq_num)
+{
+    int i;
+    pmlan_adapter pmadapter = priv->adapter;
+    RxReorderTbl *rx_reor_tbl_ptr, *new_node;
+    sta_node *sta_ptr = MNULL;
+    t_u16 last_seq = 0;
+    ENTER();
+
+    /* 
+     * If we get a TID, ta pair which is already present dispatch all the
+     * the packets and move the window size until the ssn
+     */
+    if ((rx_reor_tbl_ptr = wlan_11n_get_rxreorder_tbl(priv, tid, ta))) {
+        wlan_11n_dispatch_pkt_until_start_win(priv, rx_reor_tbl_ptr, seq_num);
+    } else {
+        PRINTM(MDAT_D, "%s: seq_num %d, tid %d, ta %02x:%02x:%02x:%02x:"
+               "%02x:%02x, win_size %d\n", __FUNCTION__,
+               seq_num, tid, ta[0], ta[1], ta[2], ta[3],
+               ta[4], ta[5], win_size);
+        if (pmadapter->callbacks.
+            moal_malloc(pmadapter->pmoal_handle, sizeof(RxReorderTbl),
+                        MLAN_MEM_DEF, (t_u8 **) & new_node)) {
+            PRINTM(MERROR, "Rx reorder memory allocation failed\n");
+            return;
+        }
+
+        util_init_list((pmlan_linked_list) new_node);
+        new_node->tid = tid;
+        memcpy(pmadapter, new_node->ta, ta, MLAN_MAC_ADDR_LENGTH);
+        new_node->start_win = seq_num;
+        if (queuing_ra_based(priv)) {
+            // TODO for adhoc
+            if (GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_UAP) {
+                if ((sta_ptr = wlan_get_station_entry(priv, ta)))
+                    last_seq = sta_ptr->rx_seq[tid];
+            }
+            PRINTM(MINFO, "UAP/ADHOC:last_seq=%d start_win=%d\n", last_seq,
+                   new_node->start_win);
+        } else {
+            last_seq = priv->rx_seq[tid];
+        }
+        if ((last_seq != DEFAULT_SEQ_NUM) && (last_seq >= new_node->start_win)) {
+            PRINTM(MDAT_D, "Update start_win: last_seq=%d, start_win=%d\n",
+                   last_seq, new_node->start_win);
+            new_node->start_win = last_seq + 1;
+        }
+        new_node->win_size = win_size;
+
+        if (pmadapter->callbacks.
+            moal_malloc(pmadapter->pmoal_handle, sizeof(t_void *) * win_size,
+                        MLAN_MEM_DEF, (t_u8 **) & new_node->rx_reorder_ptr)) {
+            PRINTM(MERROR, "Rx reorder table memory allocation" "failed\n");
+            pmadapter->callbacks.moal_mfree(pmadapter->pmoal_handle,
+                                            (t_u8 *) new_node);
+            return;
+        }
+
+        PRINTM(MDAT_D, "Create ReorderPtr: %p\n", new_node);
+        new_node->timer_context.ptr = new_node;
+        new_node->timer_context.priv = priv;
+        new_node->timer_context.timer_is_set = MFALSE;
+        new_node->ba_status = BA_STREAM_SETUP_INPROGRESS;
+
+        pmadapter->callbacks.moal_init_timer(pmadapter->pmoal_handle,
+                                             &new_node->timer_context.timer,
+                                             wlan_flush_data,
+                                             &new_node->timer_context);
+
+        for (i = 0; i < win_size; ++i)
+            new_node->rx_reorder_ptr[i] = MNULL;
+
+        util_enqueue_list_tail(pmadapter->pmoal_handle,
+                               &priv->rx_reorder_tbl_ptr,
+                               (pmlan_linked_list) new_node,
+                               pmadapter->callbacks.moal_spin_lock,
+                               pmadapter->callbacks.moal_spin_unlock);
+    }
+
+    LEAVE();
+}
+
+/********************************************************
+    Global Functions
+********************************************************/
+
+/**
+ *  @brief This function will return the pointer to a entry in rx reordering 
+ *  		table which matches the give TA/TID pair
+ *  
+ *  @param priv    A pointer to mlan_private
+ *  @param ta      ta to find in reordering table
+ *  @param tid	   tid to find in reordering table
+ *
+ *  @return	   A pointer to structure RxReorderTbl
+ */
+RxReorderTbl *
+wlan_11n_get_rxreorder_tbl(mlan_private * priv, int tid, t_u8 * ta)
+{
+    RxReorderTbl *rx_reor_tbl_ptr;
+
+    ENTER();
+
+    if (!
+        (rx_reor_tbl_ptr =
+         (RxReorderTbl *) util_peek_list(priv->adapter->pmoal_handle,
+                                         &priv->rx_reorder_tbl_ptr,
+                                         priv->adapter->callbacks.
+                                         moal_spin_lock,
+                                         priv->adapter->callbacks.
+                                         moal_spin_unlock))) {
+        LEAVE();
+        return MNULL;
+    }
+
+    while (rx_reor_tbl_ptr != (RxReorderTbl *) & priv->rx_reorder_tbl_ptr) {
+        if ((!memcmp
+             (priv->adapter, rx_reor_tbl_ptr->ta, ta, MLAN_MAC_ADDR_LENGTH)) &&
+            (rx_reor_tbl_ptr->tid == tid)) {
+            LEAVE();
+            return rx_reor_tbl_ptr;
+        }
+
+        rx_reor_tbl_ptr = rx_reor_tbl_ptr->pnext;
+    }
+
+    LEAVE();
+    return MNULL;
+}
+
+/** 
+  *  @brief This function prepares command for adding a block ack
+  *  		request.
+  *  
+  *  @param priv        A pointer to mlan_private structure
+  *  @param cmd         A pointer to HostCmd_DS_COMMAND structure
+  *  @param pdata_buf   A pointer to data buffer
+  *
+  *  @return            MLAN_STATUS_SUCCESS
+  */
+mlan_status
+wlan_cmd_11n_addba_req(mlan_private * priv,
+                       HostCmd_DS_COMMAND * cmd, t_void * pdata_buf)
+{
+    HostCmd_DS_11N_ADDBA_REQ *padd_ba_req = (HostCmd_DS_11N_ADDBA_REQ *)
+        & cmd->params.add_ba_req;
+    ENTER();
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_11N_ADDBA_REQ);
+    cmd->size = wlan_cpu_to_le16(sizeof(HostCmd_DS_11N_ADDBA_REQ) + S_DS_GEN);
+
+    memcpy(priv->adapter, padd_ba_req, pdata_buf,
+           sizeof(HostCmd_DS_11N_ADDBA_REQ));
+    padd_ba_req->block_ack_param_set =
+        wlan_cpu_to_le16(padd_ba_req->block_ack_param_set);
+    padd_ba_req->block_ack_tmo = wlan_cpu_to_le16(padd_ba_req->block_ack_tmo);
+    padd_ba_req->ssn = wlan_cpu_to_le16(padd_ba_req->ssn);
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+  *  @brief This function prepares command for adding a block ack
+  *  		response.
+  *  
+  *  @param priv        A pointer to mlan_private structure
+  *  @param cmd         A pointer to HostCmd_DS_COMMAND structure
+  *  @param pdata_buf   A pointer to data buffer
+  *
+  *  @return            MLAN_STATUS_SUCCESS
+  */
+mlan_status
+wlan_cmd_11n_addba_rspgen(mlan_private * priv,
+                          HostCmd_DS_COMMAND * cmd, void *pdata_buf)
+{
+    HostCmd_DS_11N_ADDBA_RSP *padd_ba_rsp = (HostCmd_DS_11N_ADDBA_RSP *)
+        & cmd->params.add_ba_rsp;
+    HostCmd_DS_11N_ADDBA_REQ *pevt_addba_req =
+        (HostCmd_DS_11N_ADDBA_REQ *) pdata_buf;
+    t_u8 tid = 0;
+    int win_size = 0;
+
+    ENTER();
+
+    pevt_addba_req->block_ack_param_set =
+        wlan_le16_to_cpu(pevt_addba_req->block_ack_param_set);
+    pevt_addba_req->block_ack_tmo =
+        wlan_le16_to_cpu(pevt_addba_req->block_ack_tmo);
+    pevt_addba_req->ssn = wlan_le16_to_cpu(pevt_addba_req->ssn);
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_11N_ADDBA_RSP);
+    cmd->size = wlan_cpu_to_le16(sizeof(HostCmd_DS_11N_ADDBA_RSP) + S_DS_GEN);
+
+    memcpy(priv->adapter, padd_ba_rsp->peer_mac_addr,
+           pevt_addba_req->peer_mac_addr, MLAN_MAC_ADDR_LENGTH);
+    padd_ba_rsp->dialog_token = pevt_addba_req->dialog_token;
+    padd_ba_rsp->block_ack_tmo =
+        wlan_cpu_to_le16(pevt_addba_req->block_ack_tmo);
+    padd_ba_rsp->ssn = wlan_cpu_to_le16(pevt_addba_req->ssn);
+
+    padd_ba_rsp->block_ack_param_set = pevt_addba_req->block_ack_param_set;
+    tid = (padd_ba_rsp->block_ack_param_set & BLOCKACKPARAM_TID_MASK)
+        >> BLOCKACKPARAM_TID_POS;
+    if (priv->addba_reject[tid]
+#ifdef STA_SUPPORT
+        || ((GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_STA)
+            && priv->wps.session_enable)
+#endif
+#ifdef UAP_SUPPORT
+        || ((GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_UAP)
+            && (priv->adapter->pending_bridge_pkts > RX_LOW_THRESHOLD))
+#endif
+        )
+        padd_ba_rsp->status_code = wlan_cpu_to_le16(ADDBA_RSP_STATUS_DECLINED);
+    else
+        padd_ba_rsp->status_code = wlan_cpu_to_le16(ADDBA_RSP_STATUS_ACCEPT);
+    padd_ba_rsp->block_ack_param_set &= ~BLOCKACKPARAM_WINSIZE_MASK;
+    /* We do not support AMSDU inside AMPDU, hence reset the bit */
+    padd_ba_rsp->block_ack_param_set &= ~BLOCKACKPARAM_AMSDU_SUPP_MASK;
+
+    padd_ba_rsp->block_ack_param_set |= (priv->add_ba_param.rx_win_size <<
+                                         BLOCKACKPARAM_WINSIZE_POS);
+    win_size = (padd_ba_rsp->block_ack_param_set & BLOCKACKPARAM_WINSIZE_MASK)
+        >> BLOCKACKPARAM_WINSIZE_POS;
+    padd_ba_rsp->block_ack_param_set =
+        wlan_cpu_to_le16(padd_ba_rsp->block_ack_param_set);
+
+    if (padd_ba_rsp->status_code == wlan_cpu_to_le16(ADDBA_RSP_STATUS_ACCEPT))
+        wlan_11n_create_rxreorder_tbl(priv, pevt_addba_req->peer_mac_addr, tid,
+                                      win_size, pevt_addba_req->ssn);
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+  *  @brief This function prepares command for deleting a block ack
+  *  		request.
+  *  
+  *  @param priv       A pointer to mlan_private structure
+  *  @param cmd        A pointer to HostCmd_DS_COMMAND structure
+  *  @param pdata_buf  A pointer to data buffer
+  *
+  *  @return           MLAN_STATUS_SUCCESS
+  */
+mlan_status
+wlan_cmd_11n_delba(mlan_private * priv,
+                   HostCmd_DS_COMMAND * cmd, void *pdata_buf)
+{
+    HostCmd_DS_11N_DELBA *pdel_ba = (HostCmd_DS_11N_DELBA *)
+        & cmd->params.del_ba;
+
+    ENTER();
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_11N_DELBA);
+    cmd->size = wlan_cpu_to_le16(sizeof(HostCmd_DS_11N_DELBA) + S_DS_GEN);
+
+    memcpy(priv->adapter, pdel_ba, pdata_buf, sizeof(HostCmd_DS_11N_DELBA));
+    pdel_ba->del_ba_param_set = wlan_cpu_to_le16(pdel_ba->del_ba_param_set);
+    pdel_ba->reason_code = wlan_cpu_to_le16(pdel_ba->reason_code);
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function will identify if RxReodering is needed for the packet
+ *  		and will do the reordering if required before sending it to kernel
+ *  
+ *  @param priv     A pointer to mlan_private
+ *  @param seq_num  Seqence number of the current packet
+ *  @param tid	    Tid of the current packet
+ *  @param ta	    Transmiter address of the current packet
+ *  @param pkt_type Packetype for the current packet (to identify if its a BAR)
+ *  @param payload  Pointer to the payload
+ *
+ *  @return 	    MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+mlan_11n_rxreorder_pkt(void *priv, t_u16 seq_num, t_u16 tid,
+                       t_u8 * ta, t_u8 pkt_type, void *payload)
+{
+    RxReorderTbl *rx_reor_tbl_ptr;
+    int prev_start_win, start_win, end_win, win_size;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_adapter pmadapter = ((mlan_private *) priv)->adapter;
+
+    ENTER();
+
+    if (!
+        (rx_reor_tbl_ptr =
+         wlan_11n_get_rxreorder_tbl((mlan_private *) priv, tid, ta))) {
+        if (pkt_type != PKT_TYPE_BAR)
+            wlan_11n_dispatch_pkt(priv, payload);
+
+        LEAVE();
+        return ret;
+
+    } else {
+        if (pkt_type == PKT_TYPE_BAR)
+            PRINTM(MDAT_D, "BAR ");
+        if (pkt_type == PKT_TYPE_AMSDU)
+            PRINTM(MDAT_D, "AMSDU ");
+
+        prev_start_win = start_win = rx_reor_tbl_ptr->start_win;
+        win_size = rx_reor_tbl_ptr->win_size;
+        end_win = ((start_win + win_size) - 1) & (MAX_TID_VALUE - 1);
+
+        PRINTM(MDAT_D,
+               "TID %d, TA %02x:%02x:%02x:%02x:%02x:%02x\n",
+               tid, ta[0], ta[1], ta[2], ta[3], ta[4], ta[5]);
+        PRINTM(MDAT_D,
+               "1:seq_num %d start_win %d win_size %d end_win %d\n",
+               seq_num, start_win, win_size, end_win);
+        /* 
+         * If seq_num is less then starting win then ignore and drop
+         * the packet
+         */
+        if ((start_win + TWOPOW11) > (MAX_TID_VALUE - 1)) {     /* Wrap */
+            if (seq_num >= ((start_win + (TWOPOW11)) &
+                            (MAX_TID_VALUE - 1)) && (seq_num < start_win)) {
+                ret = MLAN_STATUS_FAILURE;
+                goto done;
+            }
+        } else if ((seq_num < start_win) ||
+                   (seq_num > (start_win + (TWOPOW11)))) {
+            ret = MLAN_STATUS_FAILURE;
+            goto done;
+        }
+
+        /* 
+         * If this packet is a BAR we adjust seq_num as
+         * WinStart = seq_num
+         */
+        if (pkt_type == PKT_TYPE_BAR)
+            seq_num = ((seq_num + win_size) - 1) & (MAX_TID_VALUE - 1);
+
+        PRINTM(MDAT_D,
+               "2:seq_num %d start_win %d win_size %d end_win %d\n",
+               seq_num, start_win, win_size, end_win);
+
+        if (((end_win < start_win) &&
+             (seq_num < (TWOPOW11 - (MAX_TID_VALUE - start_win))) &&
+             (seq_num > end_win))
+            || ((end_win > start_win) &&
+                ((seq_num > end_win) || (seq_num < start_win)))) {
+
+            end_win = seq_num;
+            if (((seq_num - win_size) + 1) >= 0)
+                start_win = (end_win - win_size) + 1;
+            else
+                start_win = (MAX_TID_VALUE - (win_size - seq_num)) + 1;
+
+            if ((ret = wlan_11n_dispatch_pkt_until_start_win(priv,
+                                                             rx_reor_tbl_ptr,
+                                                             start_win))) {
+                goto done;
+            }
+        }
+
+        PRINTM(MDAT_D, "3:seq_num %d start_win %d win_size %d"
+               " end_win %d\n", seq_num, start_win, win_size, end_win);
+        if (pkt_type != PKT_TYPE_BAR) {
+            if (seq_num >= start_win) {
+                if (rx_reor_tbl_ptr->rx_reorder_ptr[seq_num - start_win]) {
+                    PRINTM(MDAT_D, "Drop Duplicate Pkt\n");
+                    ret = MLAN_STATUS_FAILURE;
+                    goto done;
+                }
+                rx_reor_tbl_ptr->rx_reorder_ptr[seq_num - start_win] = payload;
+            } else {            /* Wrap condition */
+                if (rx_reor_tbl_ptr->rx_reorder_ptr[(seq_num
+                                                     + (MAX_TID_VALUE)) -
+                                                    start_win]) {
+                    PRINTM(MDAT_D, "Drop Duplicate Pkt\n");
+                    ret = MLAN_STATUS_FAILURE;
+                    goto done;
+                }
+                rx_reor_tbl_ptr->rx_reorder_ptr[(seq_num
+                                                 + (MAX_TID_VALUE)) -
+                                                start_win] = payload;
+            }
+        }
+
+        wlan_11n_display_tbl_ptr(pmadapter, rx_reor_tbl_ptr);
+
+        /* 
+         * Dispatch all packets sequentially from start_win until a
+         * hole is found and adjust the start_win appropriately
+         */
+        ret = wlan_11n_scan_and_dispatch(priv, rx_reor_tbl_ptr);
+
+        wlan_11n_display_tbl_ptr(pmadapter, rx_reor_tbl_ptr);
+    }
+
+  done:
+    if (!rx_reor_tbl_ptr->timer_context.timer_is_set ||
+        (prev_start_win != rx_reor_tbl_ptr->start_win)) {
+
+        mlan_11n_rxreorder_timer_restart(pmadapter, rx_reor_tbl_ptr);
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function will delete an entry for a given tid/ta pair. tid/ta
+ *  		are taken from delba_event body
+ *  
+ *  @param priv    	    A pointer to mlan_private
+ *  @param tid		    tid to send delba
+ *  @param peer_mac	    MAC address to send delba
+ *  @param type 	    TYPE_DELBA_SENT	or TYPE_DELBA_RECEIVE	
+ *  @param initiator    MTRUE if we are initiator of ADDBA, MFALSE otherwise
+ *
+ *  @return 	   	    N/A
+ */
+void
+mlan_11n_delete_bastream_tbl(mlan_private * priv, int tid,
+                             t_u8 * peer_mac, t_u8 type, int initiator)
+{
+    RxReorderTbl *rx_reor_tbl_ptr;
+    TxBAStreamTbl *ptxtbl;
+    t_u8 cleanup_rx_reorder_tbl;
+
+    ENTER();
+
+    if (type == TYPE_DELBA_RECEIVE)
+        cleanup_rx_reorder_tbl = (initiator) ? MTRUE : MFALSE;
+    else
+        cleanup_rx_reorder_tbl = (initiator) ? MFALSE : MTRUE;
+
+    PRINTM(MEVENT, "DELBA: %02x:%02x:%02x:%02x:%02x:%02x tid=%d,"
+           "initiator=%d\n", peer_mac[0],
+           peer_mac[1], peer_mac[2],
+           peer_mac[3], peer_mac[4], peer_mac[5], tid, initiator);
+
+    if (cleanup_rx_reorder_tbl) {
+        if (!(rx_reor_tbl_ptr = wlan_11n_get_rxreorder_tbl(priv, tid,
+                                                           peer_mac))) {
+            PRINTM(MWARN, "TID, TA not found in table!\n");
+            LEAVE();
+            return;
+        }
+        wlan_11n_delete_rxreorder_tbl_entry(priv, rx_reor_tbl_ptr);
+    } else {
+        if (!(ptxtbl = wlan_11n_get_txbastream_tbl(priv, tid, peer_mac))) {
+            PRINTM(MWARN, "TID, RA not found in table!\n");
+            LEAVE();
+            return;
+        }
+
+        wlan_11n_delete_txbastream_tbl_entry(priv, ptxtbl);
+    }
+
+    LEAVE();
+}
+
+/** 
+ *  @brief This function handles the command response of
+ *  		a block ack response
+ *  
+ *  @param priv    A pointer to mlan_private structure
+ *  @param resp    A pointer to HostCmd_DS_COMMAND
+ *
+ *  @return        MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_ret_11n_addba_resp(mlan_private * priv, HostCmd_DS_COMMAND * resp)
+{
+    HostCmd_DS_11N_ADDBA_RSP *padd_ba_rsp = (HostCmd_DS_11N_ADDBA_RSP *)
+        & resp->params.add_ba_rsp;
+    int tid;
+    RxReorderTbl *rx_reor_tbl_ptr = MNULL;
+
+    ENTER();
+
+    padd_ba_rsp->status_code = wlan_le16_to_cpu(padd_ba_rsp->status_code);
+    padd_ba_rsp->block_ack_param_set =
+        wlan_le16_to_cpu(padd_ba_rsp->block_ack_param_set);
+    padd_ba_rsp->block_ack_tmo = wlan_le16_to_cpu(padd_ba_rsp->block_ack_tmo);
+    padd_ba_rsp->ssn = wlan_le16_to_cpu(padd_ba_rsp->ssn);
+
+    tid = (padd_ba_rsp->block_ack_param_set & BLOCKACKPARAM_TID_MASK)
+        >> BLOCKACKPARAM_TID_POS;
+    /* Check if we had rejected the ADDBA, if yes then do not create the stream */
+    if (padd_ba_rsp->status_code == BA_RESULT_SUCCESS) {
+        PRINTM(MCMND,
+               "ADDBA RSP: %02x:%02x:%02x:%02x:%02x:%02x tid=%d ssn=%d win_size=%d,amsdu=%d\n",
+               padd_ba_rsp->peer_mac_addr[0], padd_ba_rsp->peer_mac_addr[1],
+               padd_ba_rsp->peer_mac_addr[2], padd_ba_rsp->peer_mac_addr[3],
+               padd_ba_rsp->peer_mac_addr[4], padd_ba_rsp->peer_mac_addr[5],
+               tid, padd_ba_rsp->ssn,
+               ((padd_ba_rsp->block_ack_param_set & BLOCKACKPARAM_WINSIZE_MASK)
+                >> BLOCKACKPARAM_WINSIZE_POS),
+               padd_ba_rsp->
+               block_ack_param_set & BLOCKACKPARAM_AMSDU_SUPP_MASK);
+
+        if ((rx_reor_tbl_ptr =
+             wlan_11n_get_rxreorder_tbl(priv, tid,
+                                        padd_ba_rsp->peer_mac_addr))) {
+            rx_reor_tbl_ptr->ba_status = BA_STREAM_SETUP_COMPLETE;
+        }
+    } else {
+        PRINTM(MERROR,
+               "ADDBA RSP: Failed(%02x:%02x:%02x:%02x:%02x:%02x tid=%d)\n",
+               padd_ba_rsp->peer_mac_addr[0], padd_ba_rsp->peer_mac_addr[1],
+               padd_ba_rsp->peer_mac_addr[2], padd_ba_rsp->peer_mac_addr[3],
+               padd_ba_rsp->peer_mac_addr[4], padd_ba_rsp->peer_mac_addr[5],
+               tid);
+        if ((rx_reor_tbl_ptr =
+             wlan_11n_get_rxreorder_tbl(priv, tid,
+                                        padd_ba_rsp->peer_mac_addr))) {
+            wlan_11n_delete_rxreorder_tbl_entry(priv, rx_reor_tbl_ptr);
+        }
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function handles ba_stream_timeout event
+ *  
+ *  @param priv    	A pointer to mlan_private
+ *  @param event    A pointer to structure HostCmd_DS_11N_BATIMEOUT
+ *
+ *  @return 	   	N/A
+ */
+void
+wlan_11n_ba_stream_timeout(mlan_private * priv,
+                           HostCmd_DS_11N_BATIMEOUT * event)
+{
+    HostCmd_DS_11N_DELBA delba;
+
+    ENTER();
+
+    DBG_HEXDUMP(MCMD_D, "Event:", (t_u8 *) event, 20);
+
+    memset(priv->adapter, &delba, 0, sizeof(HostCmd_DS_11N_DELBA));
+    memcpy(priv->adapter, delba.peer_mac_addr, event->peer_mac_addr,
+           MLAN_MAC_ADDR_LENGTH);
+
+    delba.del_ba_param_set |= (t_u16) event->tid << DELBA_TID_POS;
+    delba.del_ba_param_set |= (t_u16) event->origninator << DELBA_INITIATOR_POS;
+    delba.reason_code = REASON_CODE_STA_TIMEOUT;
+    wlan_prepare_cmd(priv, HostCmd_CMD_11N_DELBA, 0, 0, MNULL, &delba);
+
+    LEAVE();
+    return;
+}
+
+/**
+ *  @brief This function cleans up reorder tbl
+ *  
+ *  @param priv    	A pointer to mlan_private
+ *
+ *  @return 	   	N/A
+ */
+void
+wlan_11n_cleanup_reorder_tbl(mlan_private * priv)
+{
+    RxReorderTbl *del_tbl_ptr;
+
+    ENTER();
+
+    while ((del_tbl_ptr = (RxReorderTbl *)
+            util_peek_list(priv->adapter->pmoal_handle,
+                           &priv->rx_reorder_tbl_ptr,
+                           priv->adapter->callbacks.moal_spin_lock,
+                           priv->adapter->callbacks.moal_spin_unlock))) {
+        wlan_11n_delete_rxreorder_tbl_entry(priv, del_tbl_ptr);
+    }
+
+    util_init_list((pmlan_linked_list) & priv->rx_reorder_tbl_ptr);
+
+    memset(priv->adapter, priv->rx_seq, 0xff, sizeof(priv->rx_seq));
+    LEAVE();
+}
+
+/**
+ *  @brief This function handle the rxba_sync event 
+ *  
+ *  @param priv    	  A pointer to mlan_private
+ *  @param event_buf  A pointer to event buf        
+ *  @param len        event_buf length
+ *  @return 	   	N/A
+ */
+void
+wlan_11n_rxba_sync_event(mlan_private * priv, t_u8 * event_buf, t_u16 len)
+{
+    MrvlIEtypes_RxBaSync_t *tlv_rxba = (MrvlIEtypes_RxBaSync_t *) event_buf;
+    t_u16 tlv_type, tlv_len;
+    RxReorderTbl *rx_reor_tbl_ptr = MNULL;
+    t_u8 i, j;
+    t_u16 seq_num = 0;
+    int tlv_buf_left = len;
+    ENTER();
+    DBG_HEXDUMP(MEVT_D, "RXBA_SYNC_EVT", event_buf, len);
+    while (tlv_buf_left >= sizeof(MrvlIEtypes_RxBaSync_t)) {
+        tlv_type = wlan_le16_to_cpu(tlv_rxba->header.type);
+        tlv_len = wlan_le16_to_cpu(tlv_rxba->header.len);
+        if (tlv_type != TLV_TYPE_RXBA_SYNC) {
+            PRINTM(MERROR, "Wrong TLV id=0x%x\n", tlv_type);
+            goto done;
+        }
+        tlv_rxba->seq_num = wlan_le16_to_cpu(tlv_rxba->seq_num);
+        tlv_rxba->bitmap_len = wlan_le16_to_cpu(tlv_rxba->bitmap_len);
+        PRINTM(MEVENT,
+               "%02x:%02x:%02x:%02x:%02x:%02x tid=%d seq_num=%d bitmap_len=%d\n",
+               tlv_rxba->mac[0], tlv_rxba->mac[1], tlv_rxba->mac[2],
+               tlv_rxba->mac[3], tlv_rxba->mac[4], tlv_rxba->mac[5],
+               tlv_rxba->tid, tlv_rxba->seq_num, tlv_rxba->bitmap_len);
+        rx_reor_tbl_ptr =
+            wlan_11n_get_rxreorder_tbl(priv, tlv_rxba->tid, tlv_rxba->mac);
+        if (!rx_reor_tbl_ptr) {
+            PRINTM(MEVENT, "Can not find rx_reorder_tbl\n");
+            goto done;
+        }
+        for (i = 0; i < tlv_rxba->bitmap_len; i++) {
+            for (j = 0; j < 8; j++) {
+                if (tlv_rxba->bitmap[i] & (1 << j)) {
+                    seq_num =
+                        (tlv_rxba->seq_num + i * 8 + j) & (MAX_TID_VALUE - 1);
+                    PRINTM(MEVENT,
+                           "Fw dropped packet, seq=%d start_win=%d, win_size=%d\n",
+                           seq_num, rx_reor_tbl_ptr->start_win,
+                           rx_reor_tbl_ptr->win_size);
+                    if (MLAN_STATUS_SUCCESS !=
+                        mlan_11n_rxreorder_pkt(priv, seq_num, tlv_rxba->tid,
+                                               tlv_rxba->mac, 0,
+                                               (t_void *) RX_PKT_DROPPED_IN_FW))
+                    {
+                        PRINTM(MERROR,
+                               "Fail to handle dropped packet, seq=%d\n",
+                               seq_num);
+                    }
+                }
+            }
+        }
+        tlv_buf_left -= (sizeof(MrvlIEtypesHeader_t) + tlv_len);
+        tlv_rxba =
+            (MrvlIEtypes_RxBaSync_t *) ((t_u8 *) tlv_rxba + tlv_len +
+                                        sizeof(MrvlIEtypesHeader_t));
+    }
+  done:
+    LEAVE();
+    return;
+}
+
+/**
+ *  @brief This function will send a DELBA for each entry in the priv's
+ *          rx reordering table
+ *  
+ *  @param priv    A pointer to mlan_private
+ */
+t_void
+wlan_send_delba_to_all_in_reorder_tbl(pmlan_private priv)
+{
+    RxReorderTbl *rx_reor_tbl_ptr;
+
+    ENTER();
+
+    if (!
+        (rx_reor_tbl_ptr =
+         (RxReorderTbl *) util_peek_list(priv->adapter->pmoal_handle,
+                                         &priv->rx_reorder_tbl_ptr,
+                                         priv->adapter->callbacks.
+                                         moal_spin_lock,
+                                         priv->adapter->callbacks.
+                                         moal_spin_unlock))) {
+        LEAVE();
+        return;
+    }
+
+    while (rx_reor_tbl_ptr != (RxReorderTbl *) & priv->rx_reorder_tbl_ptr) {
+        if (rx_reor_tbl_ptr->ba_status == BA_STREAM_SETUP_COMPLETE) {
+            rx_reor_tbl_ptr->ba_status = BA_STREAM_SETUP_INPROGRESS;
+            wlan_send_delba(priv, rx_reor_tbl_ptr->tid, rx_reor_tbl_ptr->ta, 0);
+        }
+        rx_reor_tbl_ptr = rx_reor_tbl_ptr->pnext;
+    }
+    LEAVE();
+}
+
+/**
+ *  @brief This function cleans up reorder tbl for specific station
+ *  
+ *  @param priv    	A pointer to mlan_private
+ *  @param ta      ta to find in reordering table        
+ *  @return 	   	N/A
+ */
+void
+wlan_cleanup_reorder_tbl(mlan_private * priv, t_u8 * ta)
+{
+    RxReorderTbl *rx_reor_tbl_ptr = MNULL;
+    t_u8 i;
+    ENTER();
+    for (i = 0; i < MAX_NUM_TID; ++i) {
+        if ((rx_reor_tbl_ptr = wlan_11n_get_rxreorder_tbl(priv, i, ta))) {
+            wlan_11n_delete_rxreorder_tbl_entry(priv, rx_reor_tbl_ptr);
+        }
+    }
+    LEAVE();
+    return;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_11n_rxreorder.h linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_11n_rxreorder.h
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_11n_rxreorder.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_11n_rxreorder.h	2017-09-23 03:42:50.098674820 +0800
@@ -0,0 +1,109 @@
+/** @file mlan_11n_rxreorder.h
+ *
+ *  @brief This file contains related macros, enum, and struct
+ *  of 11n RxReordering functionalities
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/********************************************************
+Change log:
+    11/10/2008: initial version
+********************************************************/
+
+#ifndef _MLAN_11N_RXREORDER_H_
+#define _MLAN_11N_RXREORDER_H_
+
+/** Max value a TID can take = 2^12 = 4096 */
+#define MAX_TID_VALUE			(2 << 11)
+/** 2^11 = 2048 */
+#define TWOPOW11			(2 << 10)
+
+/** Tid Mask used for extracting TID from BlockAckParamSet */
+#define BLOCKACKPARAM_TID_MASK		0x3C
+/** Tid position in BlockAckParamSet */
+#define BLOCKACKPARAM_TID_POS		2
+/** WinSize Mask used for extracting WinSize from BlockAckParamSet */
+#define BLOCKACKPARAM_WINSIZE_MASK	0xffc0
+/** WinSize Mask used for extracting WinSize from BlockAckParamSet */
+#define BLOCKACKPARAM_AMSDU_SUPP_MASK	0x1
+/** WinSize position in BlockAckParamSet */
+#define BLOCKACKPARAM_WINSIZE_POS	6
+/** Position of TID in DelBA Param set */
+#define DELBA_TID_POS			12
+/** Position of INITIATOR in DelBA Param set */
+#define DELBA_INITIATOR_POS		11
+/** Reason code: Requested from peer STA as it does not want to use the mechanism */
+#define REASON_CODE_STA_DONT_WANT	37
+/** Reason code: Requested from peer STA due to timeout*/
+#define REASON_CODE_STA_TIMEOUT		39
+/** Type: send delba command */
+#define TYPE_DELBA_SENT			1
+/** Type: recieve delba command */
+#define TYPE_DELBA_RECEIVE		2
+/** Set Initiator Bit */
+#define DELBA_INITIATOR(paramset)	(paramset = (paramset | (1 << 11)))
+/** Reset Initiator Bit for recipient */
+#define DELBA_RECIPIENT(paramset)	(paramset = (paramset & ~(1 << 11)))
+/** Immediate block ack */
+#define IMMEDIATE_BLOCK_ACK		0x2
+
+/** The request has been declined */
+#define ADDBA_RSP_STATUS_DECLINED  37
+/** ADDBA response status : Reject */
+#define ADDBA_RSP_STATUS_REJECT 1
+/** ADDBA response status : Accept */
+#define ADDBA_RSP_STATUS_ACCEPT 0
+
+/** DEFAULT SEQ NUM */
+#define DEFAULT_SEQ_NUM            0xffff
+
+/** Indicate packet has been dropped in FW */
+#define RX_PKT_DROPPED_IN_FW             0xffffffff
+
+mlan_status mlan_11n_rxreorder_pkt(void *priv, t_u16 seqNum, t_u16 tid,
+                                   t_u8 * ta, t_u8 pkttype, void *payload);
+void mlan_11n_delete_bastream_tbl(mlan_private * priv, int Tid,
+                                  t_u8 * PeerMACAddr, t_u8 type, int initiator);
+void wlan_11n_ba_stream_timeout(mlan_private * priv,
+                                HostCmd_DS_11N_BATIMEOUT * event);
+mlan_status wlan_ret_11n_addba_resp(mlan_private * priv,
+                                    HostCmd_DS_COMMAND * resp);
+mlan_status wlan_cmd_11n_delba(mlan_private * priv, HostCmd_DS_COMMAND * cmd,
+                               void *pdata_buf);
+mlan_status wlan_cmd_11n_addba_rspgen(mlan_private * priv,
+                                      HostCmd_DS_COMMAND * cmd,
+                                      void *pdata_buf);
+mlan_status wlan_cmd_11n_addba_req(mlan_private * priv,
+                                   HostCmd_DS_COMMAND * cmd, void *pdata_buf);
+void wlan_11n_cleanup_reorder_tbl(mlan_private * priv);
+RxReorderTbl *wlan_11n_get_rxreorder_tbl(mlan_private * priv, int tid,
+                                         t_u8 * ta);
+void wlan_11n_rxba_sync_event(mlan_private * priv, t_u8 * event_buf, t_u16 len);
+
+/** send delba for all entries in reorder_tbl */
+t_void wlan_send_delba_to_all_in_reorder_tbl(pmlan_private priv);
+
+/** clean up reorder_tbl */
+void wlan_cleanup_reorder_tbl(mlan_private * priv, t_u8 * ta);
+#endif /* _MLAN_11N_RXREORDER_H_ */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_cfp.c linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_cfp.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_cfp.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_cfp.c	2017-09-23 03:42:50.098674820 +0800
@@ -0,0 +1,1106 @@
+/**
+ * @file mlan_cfp.c
+ *
+ *  @brief This file contains WLAN client mode channel, frequency and power
+ *  related code
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2009 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *   
+ */
+
+/*************************************************************
+Change Log:
+    04/16/2009: initial version
+************************************************************/
+
+#include "mlan.h"
+#include "mlan_util.h"
+#include "mlan_fw.h"
+#include "mlan_join.h"
+#include "mlan_main.h"
+
+/********************************************************
+    Local Variables
+********************************************************/
+
+/** 100mW */
+#define WLAN_TX_PWR_DEFAULT     20
+/** 100mW */
+#define WLAN_TX_PWR_US_DEFAULT      20
+/** 100mW */
+#define WLAN_TX_PWR_JP_BG_DEFAULT   20
+/** 200mW */
+#define WLAN_TX_PWR_JP_A_DEFAULT    23
+/** 100mW */
+#define WLAN_TX_PWR_FR_100MW        20
+/** 10mW */
+#define WLAN_TX_PWR_FR_10MW         10
+/** 100mW */
+#define WLAN_TX_PWR_EMEA_DEFAULT    20
+/** 2000mW */
+#define WLAN_TX_PWR_CN_2000MW       33
+
+/* Format { Channel, Frequency (MHz), MaxTxPower } */
+/** Band: 'B/G', Region: USA FCC/Canada IC */
+static chan_freq_power_t channel_freq_power_US_BG[] = {
+    {1, 2412, WLAN_TX_PWR_US_DEFAULT},
+    {2, 2417, WLAN_TX_PWR_US_DEFAULT},
+    {3, 2422, WLAN_TX_PWR_US_DEFAULT},
+    {4, 2427, WLAN_TX_PWR_US_DEFAULT},
+    {5, 2432, WLAN_TX_PWR_US_DEFAULT},
+    {6, 2437, WLAN_TX_PWR_US_DEFAULT},
+    {7, 2442, WLAN_TX_PWR_US_DEFAULT},
+    {8, 2447, WLAN_TX_PWR_US_DEFAULT},
+    {9, 2452, WLAN_TX_PWR_US_DEFAULT},
+    {10, 2457, WLAN_TX_PWR_US_DEFAULT},
+    {11, 2462, WLAN_TX_PWR_US_DEFAULT}
+};
+
+/** Band: 'B/G', Region: Europe ETSI/China */
+static chan_freq_power_t channel_freq_power_EU_BG[] = {
+    {1, 2412, WLAN_TX_PWR_EMEA_DEFAULT},
+    {2, 2417, WLAN_TX_PWR_EMEA_DEFAULT},
+    {3, 2422, WLAN_TX_PWR_EMEA_DEFAULT},
+    {4, 2427, WLAN_TX_PWR_EMEA_DEFAULT},
+    {5, 2432, WLAN_TX_PWR_EMEA_DEFAULT},
+    {6, 2437, WLAN_TX_PWR_EMEA_DEFAULT},
+    {7, 2442, WLAN_TX_PWR_EMEA_DEFAULT},
+    {8, 2447, WLAN_TX_PWR_EMEA_DEFAULT},
+    {9, 2452, WLAN_TX_PWR_EMEA_DEFAULT},
+    {10, 2457, WLAN_TX_PWR_EMEA_DEFAULT},
+    {11, 2462, WLAN_TX_PWR_EMEA_DEFAULT},
+    {12, 2467, WLAN_TX_PWR_EMEA_DEFAULT},
+    {13, 2472, WLAN_TX_PWR_EMEA_DEFAULT}
+};
+
+/** Band: 'B/G', Region: France */
+static chan_freq_power_t channel_freq_power_FR_BG[] = {
+    {1, 2412, WLAN_TX_PWR_FR_100MW},
+    {2, 2417, WLAN_TX_PWR_FR_100MW},
+    {3, 2422, WLAN_TX_PWR_FR_100MW},
+    {4, 2427, WLAN_TX_PWR_FR_100MW},
+    {5, 2432, WLAN_TX_PWR_FR_100MW},
+    {6, 2437, WLAN_TX_PWR_FR_100MW},
+    {7, 2442, WLAN_TX_PWR_FR_100MW},
+    {8, 2447, WLAN_TX_PWR_FR_100MW},
+    {9, 2452, WLAN_TX_PWR_FR_100MW},
+    {10, 2457, WLAN_TX_PWR_FR_10MW},
+    {11, 2462, WLAN_TX_PWR_FR_10MW},
+    {12, 2467, WLAN_TX_PWR_FR_10MW},
+    {13, 2472, WLAN_TX_PWR_FR_10MW}
+};
+
+/** Band: 'B/G', Region: Japan */
+static chan_freq_power_t channel_freq_power_JPN41_BG[] = {
+    {1, 2412, WLAN_TX_PWR_JP_BG_DEFAULT},
+    {2, 2417, WLAN_TX_PWR_JP_BG_DEFAULT},
+    {3, 2422, WLAN_TX_PWR_JP_BG_DEFAULT},
+    {4, 2427, WLAN_TX_PWR_JP_BG_DEFAULT},
+    {5, 2432, WLAN_TX_PWR_JP_BG_DEFAULT},
+    {6, 2437, WLAN_TX_PWR_JP_BG_DEFAULT},
+    {7, 2442, WLAN_TX_PWR_JP_BG_DEFAULT},
+    {8, 2447, WLAN_TX_PWR_JP_BG_DEFAULT},
+    {9, 2452, WLAN_TX_PWR_JP_BG_DEFAULT},
+    {10, 2457, WLAN_TX_PWR_JP_BG_DEFAULT},
+    {11, 2462, WLAN_TX_PWR_JP_BG_DEFAULT},
+    {12, 2467, WLAN_TX_PWR_JP_BG_DEFAULT},
+    {13, 2472, WLAN_TX_PWR_JP_BG_DEFAULT}
+};
+
+/** Band: 'B/G', Region: Japan */
+static chan_freq_power_t channel_freq_power_JPN40_BG[] = {
+    {14, 2484, WLAN_TX_PWR_JP_BG_DEFAULT}
+};
+
+/** Band : 'B/G', Region: Special */
+static chan_freq_power_t channel_freq_power_SPECIAL_BG[] = {
+    {1, 2412, WLAN_TX_PWR_JP_BG_DEFAULT},
+    {2, 2417, WLAN_TX_PWR_JP_BG_DEFAULT},
+    {3, 2422, WLAN_TX_PWR_JP_BG_DEFAULT},
+    {4, 2427, WLAN_TX_PWR_JP_BG_DEFAULT},
+    {5, 2432, WLAN_TX_PWR_JP_BG_DEFAULT},
+    {6, 2437, WLAN_TX_PWR_JP_BG_DEFAULT},
+    {7, 2442, WLAN_TX_PWR_JP_BG_DEFAULT},
+    {8, 2447, WLAN_TX_PWR_JP_BG_DEFAULT},
+    {9, 2452, WLAN_TX_PWR_JP_BG_DEFAULT},
+    {10, 2457, WLAN_TX_PWR_JP_BG_DEFAULT},
+    {11, 2462, WLAN_TX_PWR_JP_BG_DEFAULT},
+    {12, 2467, WLAN_TX_PWR_JP_BG_DEFAULT},
+    {13, 2472, WLAN_TX_PWR_JP_BG_DEFAULT},
+    {14, 2484, WLAN_TX_PWR_JP_BG_DEFAULT}
+};
+
+/** Band: 'A', Region: USA FCC, Spain, France */
+static chan_freq_power_t channel_freq_power_A[] = {
+    {36, 5180, WLAN_TX_PWR_US_DEFAULT, MFALSE},
+    {40, 5200, WLAN_TX_PWR_US_DEFAULT, MFALSE},
+    {44, 5220, WLAN_TX_PWR_US_DEFAULT, MFALSE},
+    {48, 5240, WLAN_TX_PWR_US_DEFAULT, MFALSE},
+    {52, 5260, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {56, 5280, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {60, 5300, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {64, 5320, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {100, 5500, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {104, 5520, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {108, 5540, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {112, 5560, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {116, 5580, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {120, 5600, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {124, 5620, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {128, 5640, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {132, 5660, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {136, 5680, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {140, 5700, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {149, 5745, WLAN_TX_PWR_US_DEFAULT, MFALSE},
+    {153, 5765, WLAN_TX_PWR_US_DEFAULT, MFALSE},
+    {157, 5785, WLAN_TX_PWR_US_DEFAULT, MFALSE},
+    {161, 5805, WLAN_TX_PWR_US_DEFAULT, MFALSE},
+    {165, 5825, WLAN_TX_PWR_US_DEFAULT, MFALSE}
+};
+
+/** Band: 'A', Region: Canada IC */
+static chan_freq_power_t channel_freq_power_CAN_A[] = {
+    {36, 5180, WLAN_TX_PWR_US_DEFAULT, MFALSE},
+    {40, 5200, WLAN_TX_PWR_US_DEFAULT, MFALSE},
+    {44, 5220, WLAN_TX_PWR_US_DEFAULT, MFALSE},
+    {48, 5240, WLAN_TX_PWR_US_DEFAULT, MFALSE},
+    {52, 5260, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {56, 5280, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {60, 5300, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {64, 5320, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {100, 5500, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {104, 5520, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {108, 5540, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {112, 5560, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {116, 5580, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {132, 5660, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {136, 5680, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {140, 5700, WLAN_TX_PWR_US_DEFAULT, MTRUE},
+    {149, 5745, WLAN_TX_PWR_US_DEFAULT, MFALSE},
+    {153, 5765, WLAN_TX_PWR_US_DEFAULT, MFALSE},
+    {157, 5785, WLAN_TX_PWR_US_DEFAULT, MFALSE},
+    {161, 5805, WLAN_TX_PWR_US_DEFAULT, MFALSE},
+    {165, 5825, WLAN_TX_PWR_US_DEFAULT, MFALSE}
+};
+
+/** Band: 'A', Region: Europe ETSI */
+static chan_freq_power_t channel_freq_power_EU_A[] = {
+    {36, 5180, WLAN_TX_PWR_EMEA_DEFAULT, MFALSE},
+    {40, 5200, WLAN_TX_PWR_EMEA_DEFAULT, MFALSE},
+    {44, 5220, WLAN_TX_PWR_EMEA_DEFAULT, MFALSE},
+    {48, 5240, WLAN_TX_PWR_EMEA_DEFAULT, MFALSE},
+    {52, 5260, WLAN_TX_PWR_EMEA_DEFAULT, MTRUE},
+    {56, 5280, WLAN_TX_PWR_EMEA_DEFAULT, MTRUE},
+    {60, 5300, WLAN_TX_PWR_EMEA_DEFAULT, MTRUE},
+    {64, 5320, WLAN_TX_PWR_EMEA_DEFAULT, MTRUE},
+    {100, 5500, WLAN_TX_PWR_EMEA_DEFAULT, MTRUE},
+    {104, 5520, WLAN_TX_PWR_EMEA_DEFAULT, MTRUE},
+    {108, 5540, WLAN_TX_PWR_EMEA_DEFAULT, MTRUE},
+    {112, 5560, WLAN_TX_PWR_EMEA_DEFAULT, MTRUE},
+    {116, 5580, WLAN_TX_PWR_EMEA_DEFAULT, MTRUE},
+    {120, 5600, WLAN_TX_PWR_EMEA_DEFAULT, MTRUE},
+    {124, 5620, WLAN_TX_PWR_EMEA_DEFAULT, MTRUE},
+    {128, 5640, WLAN_TX_PWR_EMEA_DEFAULT, MTRUE},
+    {132, 5660, WLAN_TX_PWR_EMEA_DEFAULT, MTRUE},
+    {136, 5680, WLAN_TX_PWR_EMEA_DEFAULT, MTRUE},
+    {140, 5700, WLAN_TX_PWR_EMEA_DEFAULT, MTRUE}
+};
+
+/** Band: 'A', Region: Japan */
+static chan_freq_power_t channel_freq_power_JPN_A[] = {
+    {8, 5040, WLAN_TX_PWR_JP_A_DEFAULT, MFALSE},
+    {12, 5060, WLAN_TX_PWR_JP_A_DEFAULT, MFALSE},
+    {16, 5080, WLAN_TX_PWR_JP_A_DEFAULT, MFALSE},
+    {36, 5180, WLAN_TX_PWR_JP_A_DEFAULT, MFALSE},
+    {40, 5200, WLAN_TX_PWR_JP_A_DEFAULT, MFALSE},
+    {44, 5220, WLAN_TX_PWR_JP_A_DEFAULT, MFALSE},
+    {48, 5240, WLAN_TX_PWR_JP_A_DEFAULT, MFALSE},
+    {52, 5260, WLAN_TX_PWR_JP_A_DEFAULT, MTRUE},
+    {56, 5280, WLAN_TX_PWR_JP_A_DEFAULT, MTRUE},
+    {60, 5300, WLAN_TX_PWR_JP_A_DEFAULT, MTRUE},
+    {64, 5320, WLAN_TX_PWR_JP_A_DEFAULT, MTRUE},
+    {100, 5500, WLAN_TX_PWR_JP_A_DEFAULT, MTRUE},
+    {104, 5520, WLAN_TX_PWR_JP_A_DEFAULT, MTRUE},
+    {108, 5540, WLAN_TX_PWR_JP_A_DEFAULT, MTRUE},
+    {112, 5560, WLAN_TX_PWR_JP_A_DEFAULT, MTRUE},
+    {116, 5580, WLAN_TX_PWR_JP_A_DEFAULT, MTRUE},
+    {120, 5600, WLAN_TX_PWR_JP_A_DEFAULT, MTRUE},
+    {124, 5620, WLAN_TX_PWR_JP_A_DEFAULT, MTRUE},
+    {128, 5640, WLAN_TX_PWR_JP_A_DEFAULT, MTRUE},
+    {132, 5660, WLAN_TX_PWR_JP_A_DEFAULT, MTRUE},
+    {136, 5680, WLAN_TX_PWR_JP_A_DEFAULT, MTRUE},
+    {140, 5700, WLAN_TX_PWR_JP_A_DEFAULT, MTRUE}
+};
+
+/** Band: 'A', Region: China */
+static chan_freq_power_t channel_freq_power_CN_A[] = {
+    {149, 5745, WLAN_TX_PWR_CN_2000MW, MFALSE},
+    {153, 5765, WLAN_TX_PWR_CN_2000MW, MFALSE},
+    {157, 5785, WLAN_TX_PWR_CN_2000MW, MFALSE},
+    {161, 5805, WLAN_TX_PWR_CN_2000MW, MFALSE},
+    {165, 5825, WLAN_TX_PWR_CN_2000MW, MFALSE}
+};
+
+/**
+ * The structure for channel, frequency and power
+ */
+typedef struct _region_cfp_table
+{
+    /** Region */
+    t_u8 region;
+    /** Frequency/Power */
+    chan_freq_power_t *cfp_BG;
+    /** No BG flag */
+    int cfp_no_BG;
+    /** Frequency/Power for band A */
+    chan_freq_power_t *cfp_A;
+    /** No A flag */
+    int cfp_no_A;
+} region_cfp_table_t;
+
+/**
+ * The structure for the mapping between region and CFP
+ */
+static region_cfp_table_t region_cfp_table[] = {
+    {0x10,                      /* US FCC */
+     channel_freq_power_US_BG,
+     sizeof(channel_freq_power_US_BG) / sizeof(chan_freq_power_t),
+     channel_freq_power_A,
+     sizeof(channel_freq_power_A) / sizeof(chan_freq_power_t),
+     }
+    ,
+    {0x20,                      /* CANADA IC */
+     channel_freq_power_US_BG,
+     sizeof(channel_freq_power_US_BG) / sizeof(chan_freq_power_t),
+     channel_freq_power_CAN_A,
+     sizeof(channel_freq_power_CAN_A) / sizeof(chan_freq_power_t),
+     }
+    ,
+    {0x30,                      /* EU */
+     channel_freq_power_EU_BG,
+     sizeof(channel_freq_power_EU_BG) / sizeof(chan_freq_power_t),
+     channel_freq_power_EU_A,
+     sizeof(channel_freq_power_EU_A) / sizeof(chan_freq_power_t),
+     }
+    ,
+    {0x32,                      /* FRANCE */
+     channel_freq_power_FR_BG,
+     sizeof(channel_freq_power_FR_BG) / sizeof(chan_freq_power_t),
+     channel_freq_power_A,
+     sizeof(channel_freq_power_A) / sizeof(chan_freq_power_t),
+     }
+    ,
+    {0x40,                      /* JAPAN */
+     channel_freq_power_JPN40_BG,
+     sizeof(channel_freq_power_JPN40_BG) / sizeof(chan_freq_power_t),
+     channel_freq_power_JPN_A,
+     sizeof(channel_freq_power_JPN_A) / sizeof(chan_freq_power_t),
+     }
+    ,
+    {0x41,                      /* JAPAN */
+     channel_freq_power_JPN41_BG,
+     sizeof(channel_freq_power_JPN41_BG) / sizeof(chan_freq_power_t),
+     channel_freq_power_JPN_A,
+     sizeof(channel_freq_power_JPN_A) / sizeof(chan_freq_power_t),
+     }
+    ,
+    {0x50,                      /* China */
+     channel_freq_power_EU_BG,
+     sizeof(channel_freq_power_EU_BG) / sizeof(chan_freq_power_t),
+     channel_freq_power_CN_A,
+     sizeof(channel_freq_power_CN_A) / sizeof(chan_freq_power_t),
+     }
+    ,
+    {0xff,                      /* Special */
+     channel_freq_power_SPECIAL_BG,
+     sizeof(channel_freq_power_SPECIAL_BG) / sizeof(chan_freq_power_t),
+     channel_freq_power_JPN_A,
+     sizeof(channel_freq_power_JPN_A) / sizeof(chan_freq_power_t),
+     }
+    ,
+/* Add new region here */
+};
+
+/********************************************************
+    Global Variables
+********************************************************/
+/**
+ * The table to keep region code
+ */
+t_u16 region_code_index[MRVDRV_MAX_REGION_CODE] =
+    { 0x10, 0x20, 0x30, 0x32, 0x40, 0x41, 0x50, 0xff };
+
+/**
+ * The rates supported for ad-hoc B mode
+ */
+t_u8 AdhocRates_B[B_SUPPORTED_RATES] = { 0x82, 0x84, 0x8b, 0x96, 0 };
+
+/**
+ * The rates supported for ad-hoc G mode
+ */
+t_u8 AdhocRates_G[G_SUPPORTED_RATES] =
+    { 0x8c, 0x12, 0x98, 0x24, 0xb0, 0x48, 0x60, 0x6c, 0 };
+
+/**
+ * The rates supported for ad-hoc BG mode
+ */
+t_u8 AdhocRates_BG[BG_SUPPORTED_RATES] =
+    { 0x82, 0x84, 0x8b, 0x96, 0x0c, 0x12, 0x18, 0x24, 0x30, 0x48,
+    0x60, 0x6c, 0
+};
+
+/**
+ * The rates supported in A mode for ad-hoc
+ */
+t_u8 AdhocRates_A[A_SUPPORTED_RATES] =
+    { 0x8c, 0x12, 0x98, 0x24, 0xb0, 0x48, 0x60, 0x6c, 0 };
+
+/**
+ * The rates supported in A mode (used for BAND_A)
+ */
+t_u8 SupportedRates_A[A_SUPPORTED_RATES] =
+    { 0x0c, 0x12, 0x18, 0x24, 0xb0, 0x48, 0x60, 0x6c, 0 };
+
+/**
+ * The rates supported by the card
+ */
+t_u16 WlanDataRates[WLAN_SUPPORTED_RATES_EXT] =
+    { 0x02, 0x04, 0x0B, 0x16, 0x00, 0x0C, 0x12,
+    0x18, 0x24, 0x30, 0x48, 0x60, 0x6C, 0x90,
+    0x0D, 0x1A, 0x27, 0x34, 0x4E, 0x68, 0x75,
+    0x82, 0x0C, 0x1B, 0x36, 0x51, 0x6C, 0xA2,
+    0xD8, 0xF3, 0x10E, 0x00
+};
+
+/**
+ * The rates supported in B mode
+ */
+t_u8 SupportedRates_B[B_SUPPORTED_RATES] = { 0x02, 0x04, 0x0b, 0x16, 0 };
+
+/**
+ * The rates supported in G mode (BAND_G, BAND_G|BAND_GN)
+ */
+t_u8 SupportedRates_G[G_SUPPORTED_RATES] =
+    { 0x0c, 0x12, 0x18, 0x24, 0x30, 0x48, 0x60, 0x6c, 0 };
+
+/**
+ * The rates supported in BG mode (BAND_B|BAND_G, BAND_B|BAND_G|BAND_GN)
+ */
+t_u8 SupportedRates_BG[BG_SUPPORTED_RATES] =
+    { 0x02, 0x04, 0x0b, 0x0c, 0x12, 0x16, 0x18, 0x24, 0x30, 0x48,
+    0x60, 0x6c, 0
+};
+
+/**
+ * The rates supported in N mode
+ */
+t_u8 SupportedRates_N[N_SUPPORTED_RATES] = { 0x02, 0x04, 0 };
+
+/********************************************************
+    Local Functions
+********************************************************/
+/** 
+ *  @brief Find a character in a string.
+ *   
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param s            A pointer to string
+ *  @param c            Character to be located 
+ *  @param n            The length of string
+ *
+ *  @return        A pointer to the first occurrence of c in string, or MNULL if c is not found.
+ */
+static void *
+wlan_memchr(pmlan_adapter pmadapter, void *s, int c, int n)
+{
+    const t_u8 *p = (t_u8 *) s;
+
+    ENTER();
+
+    while (n--) {
+        if ((t_u8) c == *p++) {
+            LEAVE();
+            return (void *) (p - 1);
+        }
+    }
+
+    LEAVE();
+    return MNULL;
+}
+
+/** 
+ *  @brief This function finds the CFP in 
+ *  		region_cfp_table based on region and band parameter.
+ *  
+ *  @param pmadapter  A pointer to mlan_adapter structure
+ *  @param region     The region code
+ *  @param band       The band
+ *  @param cfp_no     A pointer to CFP number
+ *
+ *  @return           A pointer to CFP
+ */
+static chan_freq_power_t *
+wlan_get_region_cfp_table(pmlan_adapter pmadapter, t_u8 region, t_u8 band,
+                          int *cfp_no)
+{
+    t_u32 i;
+
+    ENTER();
+
+    for (i = 0; i < sizeof(region_cfp_table) / sizeof(region_cfp_table_t); i++) {
+        PRINTM(MINFO, "region_cfp_table[i].region=%d\n",
+               region_cfp_table[i].region);
+        /* Check if region matches */
+        if (region_cfp_table[i].region == region) {
+            /* Select by band */
+            if (band & (BAND_B | BAND_G | BAND_GN)) {
+                *cfp_no = region_cfp_table[i].cfp_no_BG;
+                LEAVE();
+                return region_cfp_table[i].cfp_BG;
+            } else if (band & (BAND_A | BAND_AN)) {
+                *cfp_no = region_cfp_table[i].cfp_no_A;
+                LEAVE();
+                return region_cfp_table[i].cfp_A;
+            } else {
+                PRINTM(MERROR, "Error Band[0x%x]\n", band);
+                LEAVE();
+                return MNULL;
+
+            }
+        }
+    }
+
+    LEAVE();
+    return MNULL;
+}
+
+/********************************************************
+    Global Functions
+********************************************************/
+
+#ifdef STA_SUPPORT
+#endif /* STA_SUPPORT */
+
+/** 
+ *  @brief Use index to get the data rate
+ *   
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param index        The index of data rate
+ *  @param ht_info      ht info
+ *
+ *  @return                     Data rate or 0 
+ */
+t_u32
+wlan_index_to_data_rate(pmlan_adapter pmadapter, t_u8 index, t_u8 ht_info)
+{
+#define MCS_NUM_SUPP    8
+    t_u16 mcs_rate[4][MCS_NUM_SUPP] =
+        { {0x1b, 0x36, 0x51, 0x6c, 0xa2, 0xd8, 0xf3, 0x10e}
+    ,                           /* LG 40M */
+    {0x1e, 0x3c, 0x5a, 0x78, 0xb4, 0xf0, 0x10e, 0x12c}
+    ,                           /* SG 40M */
+    {0x0d, 0x1a, 0x27, 0x34, 0x4e, 0x68, 0x75, 0x82}
+    ,                           /* LG 20M */
+    {0x0e, 0x1c, 0x2b, 0x39, 0x56, 0x73, 0x82, 0x90}
+    };                          /* SG 20M */
+    t_u32 rate;
+    ENTER();
+
+    if (ht_info & MBIT(0)) {
+        if (index == MLAN_RATE_BITMAP_MCS0) {
+            if (ht_info & MBIT(2))
+                rate = 0x0D;    /* MCS 32 SGI rate */
+            else
+                rate = 0x0C;    /* MCS 32 LGI rate */
+        } else if (index < MCS_NUM_SUPP) {
+            if (ht_info & MBIT(1)) {
+                if (ht_info & MBIT(2))
+                    rate = mcs_rate[1][index];  /* SGI, 40M */
+                else
+                    rate = mcs_rate[0][index];  /* LGI, 40M */
+            } else {
+                if (ht_info & MBIT(2))
+                    rate = mcs_rate[3][index];  /* SGI, 20M */
+                else
+                    rate = mcs_rate[2][index];  /* LGI, 20M */
+            }
+        } else
+            rate = WlanDataRates[0];
+    } else {
+        if (index >= WLAN_SUPPORTED_RATES_EXT)
+            index = 0;
+        rate = WlanDataRates[index];
+    }
+    LEAVE();
+    return rate;
+}
+
+/** 
+ *  @brief Use rate to get the index
+ *   
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param rate         Data rate
+ *
+ *  @return                     Index or 0 
+ */
+t_u8
+wlan_data_rate_to_index(pmlan_adapter pmadapter, t_u32 rate)
+{
+    t_u16 *ptr;
+
+    ENTER();
+    if (rate)
+        if ((ptr = wlan_memchr(pmadapter, WlanDataRates, (t_u8) rate,
+                               sizeof(WlanDataRates)))) {
+            LEAVE();
+            return (t_u8) (ptr - WlanDataRates);
+        }
+    LEAVE();
+    return 0;
+}
+
+/** 
+ *  @brief Get active data rates
+ *   
+ *  @param pmpriv           A pointer to mlan_private structure
+ *  @param bss_mode         The specified BSS mode (Infra/IBSS)
+ *  @param config_bands     The specified band configuration
+ *  @param rates            The buf to return the active rates
+ *
+ *  @return                 The number of Rates
+ */
+t_u32
+wlan_get_active_data_rates(mlan_private * pmpriv, t_u32 bss_mode,
+                           t_u8 config_bands, WLAN_802_11_RATES rates)
+{
+    t_u32 k;
+
+    ENTER();
+
+    if (pmpriv->media_connected != MTRUE) {
+        k = wlan_get_supported_rates(pmpriv, bss_mode, config_bands, rates);
+    } else {
+        k = wlan_copy_rates(rates, 0, pmpriv->curr_bss_params.data_rates,
+                            pmpriv->curr_bss_params.num_of_rates);
+    }
+
+    LEAVE();
+    return k;
+}
+
+#ifdef STA_SUPPORT
+/** 
+ *  @brief This function search through all the regions cfp table to find the channel, 
+ *            if the channel is found then gets the MIN txpower of the channel 
+ *            present in all the regions.
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param channel      Channel number.
+ *
+ *  @return             The Tx power
+ */
+t_u8
+wlan_get_txpwr_of_chan_from_cfp(mlan_private * pmpriv, t_u8 channel)
+{
+    t_u8 i = 0;
+    t_u8 j = 0;
+    t_u8 tx_power = 0;
+    t_u32 cfp_no;
+    chan_freq_power_t *cfp = MNULL;
+    chan_freq_power_t *cfp_a = MNULL;
+    t_u32 cfp_no_a;
+
+    ENTER();
+
+    for (i = 0; i < NELEMENTS(region_cfp_table); i++) {
+        /* Get CFP */
+        cfp = region_cfp_table[i].cfp_BG;
+        cfp_no = region_cfp_table[i].cfp_no_BG;
+
+        cfp_a = region_cfp_table[i].cfp_A;
+        cfp_no_a = region_cfp_table[i].cfp_no_A;
+        /* Find matching channel and get Tx power */
+        for (j = 0; j < cfp_no; j++) {
+            if ((cfp + j)->channel == channel) {
+                if (tx_power != 0)
+                    tx_power = MIN(tx_power, (cfp + j)->max_tx_power);
+                else
+                    tx_power = (t_u8) (cfp + j)->max_tx_power;
+                break;
+            }
+        }
+
+        for (j = 0; j < cfp_no_a; j++) {
+            if ((cfp_a + j)->channel == channel) {
+                if (tx_power != 0)
+                    tx_power = MIN(tx_power, (cfp_a + j)->max_tx_power);
+                else
+                    tx_power = (t_u8) ((cfp_a + j)->max_tx_power);
+                break;
+            }
+        }
+    }
+
+    LEAVE();
+    return tx_power;
+}
+
+/** 
+ *  @brief Get the channel frequency power info for a specific channel
+ *   
+ *  @param pmadapter            A pointer to mlan_adapter structure
+ *  @param band                 It can be BAND_A, BAND_G or BAND_B
+ *  @param channel              The channel to search for
+ *  @param region_channel       A pointer to region_chan_t structure
+ *
+ *  @return                     A pointer to chan_freq_power_t structure or MNULL if not found.
+ */
+
+chan_freq_power_t *
+wlan_get_cfp_by_band_and_channel(pmlan_adapter pmadapter,
+                                 t_u8 band,
+                                 t_u16 channel, region_chan_t * region_channel)
+{
+    region_chan_t *rc;
+    chan_freq_power_t *cfp = MNULL;
+    int i, j;
+
+    ENTER();
+
+    for (j = 0; !cfp && (j < MAX_REGION_CHANNEL_NUM); j++) {
+        rc = &region_channel[j];
+
+        if (!rc->valid || !rc->pcfp)
+            continue;
+        switch (rc->band) {
+        case BAND_A:
+            switch (band) {
+            case BAND_AN:
+            case BAND_A | BAND_AN:
+            case BAND_A:       /* Matching BAND_A */
+                break;
+
+            default:
+                continue;
+            }
+            break;
+        case BAND_B:
+        case BAND_G:
+            switch (band) {
+            case BAND_GN:
+            case BAND_B | BAND_G | BAND_GN:
+            case BAND_G | BAND_GN:
+            case BAND_B | BAND_G:
+            case BAND_B:       /* Matching BAND_B/G */
+            case BAND_G:
+            case 0:
+                break;
+            default:
+                continue;
+            }
+            break;
+        default:
+            continue;
+        }
+        if (channel == FIRST_VALID_CHANNEL)
+            cfp = &rc->pcfp[0];
+        else {
+            for (i = 0; i < rc->num_cfp; i++) {
+                if (rc->pcfp[i].channel == channel) {
+                    cfp = &rc->pcfp[i];
+                    break;
+                }
+            }
+        }
+    }
+
+    if (!cfp && channel)
+        PRINTM(MERROR, "wlan_get_cfp_by_band_and_channel(): cannot find "
+               "cfp by band %d & channel %d\n", band, channel);
+
+    LEAVE();
+    return cfp;
+}
+
+/** 
+ *  @brief Find the channel frequency power info for a specific channel
+ *   
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param band         It can be BAND_A, BAND_G or BAND_B
+ *  @param channel      The channel to search for
+ *
+ *  @return             A pointer to chan_freq_power_t structure or MNULL if not found.
+ */
+chan_freq_power_t *
+wlan_find_cfp_by_band_and_channel(mlan_adapter * pmadapter,
+                                  t_u8 band, t_u16 channel)
+{
+    chan_freq_power_t *cfp = MNULL;
+
+    ENTER();
+
+    /* Any station(s) with 11D enabled */
+    if (wlan_count_priv_cond(pmadapter, wlan_11d_is_enabled,
+                             wlan_is_station) > 0)
+        cfp = wlan_get_cfp_by_band_and_channel(pmadapter, band, channel,
+                                               pmadapter->universal_channel);
+    else
+        cfp = wlan_get_cfp_by_band_and_channel(pmadapter, band, channel,
+                                               pmadapter->region_channel);
+
+    LEAVE();
+    return cfp;
+}
+
+/** 
+ *  @brief Find the channel frequency power info for a specific frequency
+ *   
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param band         It can be BAND_A, BAND_G or BAND_B
+ *  @param freq         The frequency to search for
+ *
+ *  @return         Pointer to chan_freq_power_t structure; MNULL if not found
+ */
+chan_freq_power_t *
+wlan_find_cfp_by_band_and_freq(mlan_adapter * pmadapter, t_u8 band, t_u32 freq)
+{
+    chan_freq_power_t *cfp = MNULL;
+    region_chan_t *rc;
+    int count = sizeof(pmadapter->region_channel) /
+        sizeof(pmadapter->region_channel[0]);
+    int i, j;
+
+    ENTER();
+
+    for (j = 0; !cfp && (j < count); j++) {
+        rc = &pmadapter->region_channel[j];
+
+        /* Any station(s) with 11D enabled */
+        if (wlan_count_priv_cond(pmadapter, wlan_11d_is_enabled,
+                                 wlan_is_station) > 0)
+            rc = &pmadapter->universal_channel[j];
+
+        if (!rc->valid || !rc->pcfp)
+            continue;
+        switch (rc->band) {
+        case BAND_A:
+            switch (band) {
+            case BAND_AN:
+            case BAND_A | BAND_AN:
+            case BAND_A:       /* Matching BAND_A */
+                break;
+            default:
+                continue;
+            }
+            break;
+        case BAND_B:
+        case BAND_G:
+            switch (band) {
+            case BAND_GN:
+            case BAND_B | BAND_G | BAND_GN:
+            case BAND_G | BAND_GN:
+            case BAND_B | BAND_G:
+            case BAND_B:
+            case BAND_G:
+            case 0:
+                break;
+            default:
+                continue;
+            }
+            break;
+        default:
+            continue;
+        }
+        for (i = 0; i < rc->num_cfp; i++) {
+            if (rc->pcfp[i].freq == freq) {
+                cfp = &rc->pcfp[i];
+                break;
+            }
+        }
+    }
+
+    if (!cfp && freq)
+        PRINTM(MERROR, "wlan_find_cfp_by_band_and_freq(): cannot find cfp by "
+               "band %d & freq %d\n", band, freq);
+
+    LEAVE();
+    return cfp;
+}
+#endif /* STA_SUPPORT */
+
+/** 
+ *  @brief Check if Rate Auto
+ *   
+ *  @param pmpriv               A pointer to mlan_private structure
+ *
+ *  @return                     MTRUE or MFALSE
+ */
+t_u8
+wlan_is_rate_auto(mlan_private * pmpriv)
+{
+    t_u32 i;
+    int rate_num = 0;
+
+    ENTER();
+
+    for (i = 0; i < NELEMENTS(pmpriv->bitmap_rates); i++)
+        if (pmpriv->bitmap_rates[i])
+            rate_num++;
+
+    LEAVE();
+    if (rate_num > 1)
+        return MTRUE;
+    else
+        return MFALSE;
+}
+
+/** 
+ *  @brief Covert Rate Bitmap to Rate index
+ *   
+ *  @param pmadapter    Pointer to mlan_adapter structure
+ *  @param rate_bitmap  Pointer to rate bitmap
+ *  @param size         Size of the bitmap array
+ *
+ *  @return             Rate index
+ */
+int
+wlan_get_rate_index(pmlan_adapter pmadapter, t_u16 * rate_bitmap, int size)
+{
+    int i;
+
+    ENTER();
+
+    for (i = 0; i < size * 8; i++) {
+        if (rate_bitmap[i / 16] & (1 << (i % 16))) {
+            LEAVE();
+            return i;
+        }
+    }
+
+    LEAVE();
+    return 0;
+}
+
+/** 
+ *  @brief Get supported data rates
+ *   
+ *  @param pmpriv           A pointer to mlan_private structure
+ *  @param bss_mode         The specified BSS mode (Infra/IBSS)
+ *  @param config_bands     The specified band configuration
+ *  @param rates            The buf to return the supported rates
+ *
+ *  @return                 The number of Rates
+ */
+t_u32
+wlan_get_supported_rates(mlan_private * pmpriv, t_u32 bss_mode,
+                         t_u8 config_bands, WLAN_802_11_RATES rates)
+{
+    t_u32 k = 0;
+
+    ENTER();
+
+    if (bss_mode == MLAN_BSS_MODE_INFRA) {
+        /* Infra. mode */
+        switch (config_bands) {
+        case BAND_B:
+            PRINTM(MINFO, "Infra Band=%d SupportedRates_B\n", config_bands);
+            k = wlan_copy_rates(rates, k, SupportedRates_B,
+                                sizeof(SupportedRates_B));
+            break;
+        case BAND_G:
+        case BAND_G | BAND_GN:
+            PRINTM(MINFO, "Infra band=%d SupportedRates_G\n", config_bands);
+            k = wlan_copy_rates(rates, k, SupportedRates_G,
+                                sizeof(SupportedRates_G));
+            break;
+        case BAND_B | BAND_G:
+        case BAND_A | BAND_B | BAND_G:
+        case BAND_A | BAND_B:
+        case BAND_A | BAND_B | BAND_G | BAND_GN | BAND_AN:
+        case BAND_B | BAND_G | BAND_GN:
+            PRINTM(MINFO, "Infra band=%d SupportedRates_BG\n", config_bands);
+#ifdef WFD_SUPPORT
+            if (pmpriv->bss_type == MLAN_BSS_TYPE_WFD)
+                k = wlan_copy_rates(rates, k, SupportedRates_G,
+                                    sizeof(SupportedRates_G));
+            else
+                k = wlan_copy_rates(rates, k, SupportedRates_BG,
+                                    sizeof(SupportedRates_BG));
+#else
+            k = wlan_copy_rates(rates, k, SupportedRates_BG,
+                                sizeof(SupportedRates_BG));
+#endif
+            break;
+        case BAND_A:
+        case BAND_A | BAND_G:
+            PRINTM(MINFO, "Infra band=%d SupportedRates_A\n", config_bands);
+            k = wlan_copy_rates(rates, k, SupportedRates_A,
+                                sizeof(SupportedRates_A));
+            break;
+        case BAND_AN:
+        case BAND_A | BAND_AN:
+        case BAND_A | BAND_G | BAND_AN | BAND_GN:
+            PRINTM(MINFO, "Infra band=%d SupportedRates_A\n", config_bands);
+            k = wlan_copy_rates(rates, k, SupportedRates_A,
+                                sizeof(SupportedRates_A));
+            break;
+        case BAND_GN:
+            PRINTM(MINFO, "Infra band=%d SupportedRates_N\n", config_bands);
+            k = wlan_copy_rates(rates, k, SupportedRates_N,
+                                sizeof(SupportedRates_N));
+            break;
+        }
+    } else {
+        /* Ad-hoc mode */
+        switch (config_bands) {
+        case BAND_B:
+            PRINTM(MINFO, "Band: Adhoc B\n");
+            k = wlan_copy_rates(rates, k, AdhocRates_B, sizeof(AdhocRates_B));
+            break;
+        case BAND_G:
+        case BAND_G | BAND_GN:
+            PRINTM(MINFO, "Band: Adhoc G only\n");
+            k = wlan_copy_rates(rates, k, AdhocRates_G, sizeof(AdhocRates_G));
+            break;
+        case BAND_B | BAND_G:
+        case BAND_B | BAND_G | BAND_GN:
+            PRINTM(MINFO, "Band: Adhoc BG\n");
+            k = wlan_copy_rates(rates, k, AdhocRates_BG, sizeof(AdhocRates_BG));
+            break;
+        case BAND_A:
+        case BAND_AN:
+        case BAND_A | BAND_AN:
+            PRINTM(MINFO, "Band: Adhoc A\n");
+            k = wlan_copy_rates(rates, k, AdhocRates_A, sizeof(AdhocRates_A));
+            break;
+        }
+    }
+
+    LEAVE();
+    return k;
+}
+
+/** 
+ *  @brief This function sets region table. 
+ *  
+ *  @param pmpriv  A pointer to mlan_private structure
+ *  @param region  The region code
+ *  @param band    The band
+ *
+ *  @return        MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_set_regiontable(mlan_private * pmpriv, t_u8 region, t_u8 band)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    int i = 0;
+    chan_freq_power_t *cfp;
+    int cfp_no;
+
+    ENTER();
+
+    memset(pmadapter, pmadapter->region_channel, 0,
+           sizeof(pmadapter->region_channel));
+
+    if (band & (BAND_B | BAND_G | BAND_GN)) {
+        cfp =
+            wlan_get_region_cfp_table(pmadapter, region,
+                                      BAND_G | BAND_B | BAND_GN, &cfp_no);
+        if (cfp) {
+            pmadapter->region_channel[i].num_cfp = (t_u8) cfp_no;
+            pmadapter->region_channel[i].pcfp = cfp;
+        } else {
+            PRINTM(MERROR, "wrong region code %#x in Band B-G\n", region);
+            LEAVE();
+            return MLAN_STATUS_FAILURE;
+        }
+        pmadapter->region_channel[i].valid = MTRUE;
+        pmadapter->region_channel[i].region = region;
+        if (band & BAND_GN)
+            pmadapter->region_channel[i].band = BAND_G;
+        else
+            pmadapter->region_channel[i].band =
+                (band & BAND_G) ? BAND_G : BAND_B;
+        i++;
+    }
+    if (band & (BAND_A | BAND_AN)) {
+        cfp = wlan_get_region_cfp_table(pmadapter, region, BAND_A, &cfp_no);
+        if (cfp) {
+            pmadapter->region_channel[i].num_cfp = (t_u8) cfp_no;
+            pmadapter->region_channel[i].pcfp = cfp;
+        } else {
+            PRINTM(MERROR, "wrong region code %#x in Band A\n", region);
+            LEAVE();
+            return MLAN_STATUS_FAILURE;
+        }
+        pmadapter->region_channel[i].valid = MTRUE;
+        pmadapter->region_channel[i].region = region;
+        pmadapter->region_channel[i].band = BAND_A;
+    }
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief Get if radar detection is enabled or not on a certain channel
+ *
+ *  @param priv    Private driver information structure
+ *  @param chnl Channel to determine radar detection requirements
+ *
+ *  @return 
+ *    - MTRUE if radar detection is required
+ *    - MFALSE otherwise
+ */
+t_bool
+wlan_get_cfp_radar_detect(mlan_private * priv, t_u8 chnl)
+{
+    int i, j;
+    t_bool required = MFALSE;
+    chan_freq_power_t *pcfp = MNULL;
+
+    ENTER();
+
+    /* get the cfp table first */
+    for (i = 0; i < MAX_REGION_CHANNEL_NUM; i++) {
+        if (priv->adapter->region_channel[i].band == BAND_A) {
+            pcfp = priv->adapter->region_channel[i].pcfp;
+            break;
+        }
+    }
+
+    if (!pcfp) {
+        /* This means operation in BAND-A is not support, we can just return
+           false here, it's harmless */
+        goto done;
+    }
+
+    /* get the radar detection requirements according to chan num */
+    for (j = 0; j < priv->adapter->region_channel[i].num_cfp; j++) {
+        if (pcfp[j].channel == chnl) {
+            required = pcfp[j].radar_detect;
+            break;
+        }
+    }
+
+  done:
+    LEAVE();
+    return required;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_cmdevt.c linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_cmdevt.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_cmdevt.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_cmdevt.c	2017-09-23 03:42:50.102674807 +0800
@@ -0,0 +1,2641 @@
+/**
+ * @file mlan_cmdevt.c
+ *
+ *  @brief This file contains the handling of CMD/EVENT in MLAN
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2009 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/*************************************************************
+Change Log:
+    05/12/2009: initial version
+************************************************************/
+#include "mlan.h"
+#ifdef STA_SUPPORT
+#include "mlan_join.h"
+#endif
+#include "mlan_util.h"
+#include "mlan_fw.h"
+#include "mlan_main.h"
+#include "mlan_wmm.h"
+#include "mlan_11n.h"
+#include "mlan_11h.h"
+/********************************************************
+                Local Variables
+********************************************************/
+
+/*******************************************************
+                Global Variables
+********************************************************/
+
+/********************************************************
+                Local Functions
+********************************************************/
+
+/** 
+ *  @brief This function convert a given character to hex
+ *
+ *  @param chr        Character to be converted
+ *
+ *  @return           The converted hex if chr is a valid hex, else 0
+ */
+static t_u32
+wlan_hexval(t_u8 chr)
+{
+    ENTER();
+
+    if (chr >= '0' && chr <= '9')
+        return chr - '0';
+    if (chr >= 'A' && chr <= 'F')
+        return chr - 'A' + 10;
+    if (chr >= 'a' && chr <= 'f')
+        return chr - 'a' + 10;
+
+    LEAVE();
+    return 0;
+}
+
+/**
+ *  @brief This function convert a given string to hex
+ *
+ *  @param a            A pointer to string to be converted
+ *
+ *  @return             The converted hex value if param a is a valid hex, else 0
+ */
+int
+wlan_atox(t_u8 * a)
+{
+    int i = 0;
+
+    ENTER();
+
+    while (wlan_isxdigit(*a))
+        i = i * 16 + wlan_hexval(*a++);
+
+    LEAVE();
+    return i;
+}
+
+/**
+ *  @brief This function parse cal data from ASCII to hex
+ *
+ *  @param src          A pointer to source data
+ *  @param len          Source dara length
+ *  @param dst          A pointer to a buf to store the parsed data
+ *
+ *  @return             The parsed hex data length
+ */
+static t_u32
+wlan_parse_cal_cfg(t_u8 * src, t_size len, t_u8 * dst)
+{
+    t_u8 *ptr;
+    t_u8 *dptr;
+
+    ptr = src;
+    dptr = dst;
+
+    while (ptr - src < len) {
+        while (*ptr && (wlan_isspace(*ptr) || *ptr == '\t')) {
+            ptr++;
+        }
+
+        if (wlan_isxdigit(*ptr)) {
+            *dptr++ = wlan_atox(ptr);
+            ptr += 2;
+        } else {
+            ptr++;
+        }
+    }
+
+    return (dptr - dst);
+}
+
+/** 
+ *  @brief This function initializes the command node.
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param pcmd_node    A pointer to cmd_ctrl_node structure
+ *  @param cmd_oid      Cmd oid: treated as sub command
+ *  @param pioctl_buf   A pointer to MLAN IOCTL Request buffer
+ *  @param pdata_buf    A pointer to information buffer
+ *
+ *  @return             N/A
+ */
+static void
+wlan_init_cmd_node(IN pmlan_private pmpriv,
+                   IN cmd_ctrl_node * pcmd_node,
+                   IN t_u32 cmd_oid,
+                   IN t_void * pioctl_buf, IN t_void * pdata_buf)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+
+    ENTER();
+
+    if (pcmd_node == MNULL) {
+        LEAVE();
+        return;
+    }
+    pcmd_node->priv = pmpriv;
+    pcmd_node->cmd_oid = cmd_oid;
+    pcmd_node->pioctl_buf = pioctl_buf;
+    pcmd_node->pdata_buf = pdata_buf;
+
+    if (!(pcmd_node->cmdbuf = wlan_alloc_mlan_buffer(pmadapter,
+                                                     MRVDRV_SIZE_OF_CMD_BUFFER,
+                                                     0, MTRUE))) {
+        PRINTM(MERROR, "Failed to allocate cmd_buffer\n");
+        LEAVE();
+        return;
+    }
+
+    /* Make sure head_ptr for cmd buf is Align */
+    pcmd_node->cmdbuf->data_offset = 0;
+    memset(pmadapter, pcmd_node->cmdbuf->pbuf, 0, MRVDRV_SIZE_OF_CMD_BUFFER);
+
+    /* Prepare mlan_buffer for command sending */
+    pcmd_node->cmdbuf->buf_type = MLAN_BUF_TYPE_CMD;
+    pcmd_node->cmdbuf->data_offset += MLAN_TYPE_LEN;
+
+    LEAVE();
+}
+
+/** 
+ *  @brief This function gets a free command node if available in
+ *              command free queue.
+ *  
+ *  @param pmadapter        A pointer to mlan_adapter structure
+ *
+ *  @return cmd_ctrl_node   A pointer to cmd_ctrl_node structure or MNULL
+ */
+static cmd_ctrl_node *
+wlan_get_cmd_node(mlan_adapter * pmadapter)
+{
+    cmd_ctrl_node *pcmd_node;
+
+    ENTER();
+
+    if (pmadapter == MNULL) {
+        LEAVE();
+        return MNULL;
+    }
+
+    if (util_peek_list(pmadapter->pmoal_handle, &pmadapter->cmd_free_q,
+                       pmadapter->callbacks.moal_spin_lock,
+                       pmadapter->callbacks.moal_spin_unlock)) {
+        pcmd_node = (cmd_ctrl_node *) util_dequeue_list(pmadapter->pmoal_handle,
+                                                        &pmadapter->cmd_free_q,
+                                                        pmadapter->callbacks.
+                                                        moal_spin_lock,
+                                                        pmadapter->callbacks.
+                                                        moal_spin_unlock);
+    } else {
+        PRINTM(MERROR, "GET_CMD_NODE: cmd_ctrl_node is not available\n");
+        pcmd_node = MNULL;
+    }
+
+    LEAVE();
+    return pcmd_node;
+}
+
+/** 
+ *  @brief This function cleans command node.
+ *  
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param pcmd_node    A pointer to cmd_ctrl_node structure
+ *
+ *  @return             N/A
+ */
+static t_void
+wlan_clean_cmd_node(pmlan_adapter pmadapter, cmd_ctrl_node * pcmd_node)
+{
+    ENTER();
+
+    if (pcmd_node == MNULL) {
+        LEAVE();
+        return;
+    }
+    pcmd_node->cmd_oid = 0;
+    pcmd_node->cmd_flag = 0;
+    pcmd_node->pioctl_buf = MNULL;
+    pcmd_node->pdata_buf = MNULL;
+
+    if (pcmd_node->cmdbuf) {
+        wlan_free_mlan_buffer(pmadapter, pcmd_node->cmdbuf);
+        pcmd_node->cmdbuf = MNULL;
+    }
+
+    if (pcmd_node->respbuf) {
+        pmadapter->callbacks.moal_recv_complete(pmadapter->pmoal_handle,
+                                                pcmd_node->respbuf,
+                                                MLAN_USB_EP_CMD_EVENT,
+                                                MLAN_STATUS_SUCCESS);
+        pcmd_node->respbuf = MNULL;
+    }
+
+    LEAVE();
+    return;
+}
+
+/**
+ *  @brief This function will return the pointer to the first entry in 
+ *  		pending cmd which matches the given pioctl_req
+ *  
+ *  @param pmadapter    A pointer to mlan_adapter
+ *  @param pioctl_req   A pointer to mlan_ioctl_req buf
+ *
+ *  @return 	   A pointer to first entry match pioctl_req
+ */
+static cmd_ctrl_node *
+wlan_get_pending_ioctl_cmd(pmlan_adapter pmadapter, pmlan_ioctl_req pioctl_req)
+{
+    cmd_ctrl_node *pcmd_node = MNULL;
+
+    ENTER();
+
+    if (!
+        (pcmd_node =
+         (cmd_ctrl_node *) util_peek_list(pmadapter->pmoal_handle,
+                                          &pmadapter->cmd_pending_q,
+                                          pmadapter->callbacks.moal_spin_lock,
+                                          pmadapter->callbacks.
+                                          moal_spin_unlock))) {
+        LEAVE();
+        return MNULL;
+    }
+    while (pcmd_node != (cmd_ctrl_node *) & pmadapter->cmd_pending_q) {
+        if (pcmd_node->pioctl_buf == pioctl_req) {
+            LEAVE();
+            return pcmd_node;
+        }
+        pcmd_node = pcmd_node->pnext;
+    }
+    LEAVE();
+    return MNULL;
+}
+
+/** 
+ *  @brief This function handles the command response of host_cmd
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return        MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_ret_host_cmd(IN pmlan_private pmpriv,
+                  IN HostCmd_DS_COMMAND * resp, IN mlan_ioctl_req * pioctl_buf)
+{
+    mlan_ds_misc_cfg *misc;
+    t_u16 size = wlan_le16_to_cpu(resp->size);
+
+    ENTER();
+
+    PRINTM(MINFO, "host command response size = %d\n", size);
+    size = MIN(size, MRVDRV_SIZE_OF_CMD_BUFFER);
+    if (pioctl_buf) {
+        misc = (mlan_ds_misc_cfg *) pioctl_buf->pbuf;
+        misc->param.hostcmd.len = size;
+        memcpy(pmpriv->adapter, misc->param.hostcmd.cmd, (void *) resp, size);
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function sends host command to firmware.
+ *  
+ *  @param pmpriv     	A pointer to mlan_private structure
+ *  @param cmd      	A pointer to HostCmd_DS_COMMAND structure
+ *  @param pdata_buf	A pointer to data buffer
+ *  @return         	MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_cmd_host_cmd(IN pmlan_private pmpriv,
+                  IN HostCmd_DS_COMMAND * cmd, IN t_void * pdata_buf)
+{
+    mlan_ds_misc_cmd *pcmd_ptr = (mlan_ds_misc_cmd *) pdata_buf;
+
+    ENTER();
+
+    /* Copy the HOST command to command buffer */
+    memcpy(pmpriv->adapter, (void *) cmd, pcmd_ptr->cmd, pcmd_ptr->len);
+    PRINTM(MINFO, "Host command size = %d\n", pcmd_ptr->len);
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function downloads a command to firmware.
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param pcmd_node    A pointer to cmd_ctrl_node structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_dnld_cmd_to_fw(IN mlan_private * pmpriv, IN cmd_ctrl_node * pcmd_node)
+{
+
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    mlan_callbacks *pcb = (mlan_callbacks *) & pmadapter->callbacks;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    HostCmd_DS_COMMAND *pcmd;
+    mlan_ioctl_req *pioctl_buf = MNULL;
+    t_u16 cmd_code;
+    t_u16 cmd_size;
+    t_u32 tmp;
+    t_u32 sec, usec;
+
+    ENTER();
+
+    if (pcmd_node)
+        if (pcmd_node->pioctl_buf != MNULL)
+            pioctl_buf = (mlan_ioctl_req *) pcmd_node->pioctl_buf;
+    if (!pmadapter || !pcmd_node) {
+        if (pioctl_buf)
+            pioctl_buf->status_code = MLAN_ERROR_CMD_DNLD_FAIL;
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    pcmd =
+        (HostCmd_DS_COMMAND *) (pcmd_node->cmdbuf->pbuf +
+                                pcmd_node->cmdbuf->data_offset);
+
+    /* Sanity test */
+    if (pcmd == MNULL || pcmd->size == 0) {
+        PRINTM(MERROR, "DNLD_CMD: pcmd is null or command size is zero, "
+               "Not sending\n");
+        if (pioctl_buf)
+            pioctl_buf->status_code = MLAN_ERROR_CMD_DNLD_FAIL;
+        wlan_insert_cmd_to_free_q(pmadapter, pcmd_node);
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* Set command sequence number */
+    pmadapter->seq_num++;
+    pcmd->seq_num =
+        wlan_cpu_to_le16(HostCmd_SET_SEQ_NO_BSS_INFO
+                         (pmadapter->seq_num, pcmd_node->priv->bss_num,
+                          pcmd_node->priv->bss_type));
+
+    wlan_request_cmd_lock(pmadapter);
+    pmadapter->curr_cmd = pcmd_node;
+    wlan_release_cmd_lock(pmadapter);
+
+    cmd_code = wlan_le16_to_cpu(pcmd->command);
+    cmd_size = wlan_le16_to_cpu(pcmd->size);
+
+    pcmd_node->cmdbuf->data_len = cmd_size;
+    /* Add extra header for USB */
+    if (pcmd_node->cmdbuf->data_offset < MLAN_TYPE_LEN) {
+        PRINTM(MERROR, "DNLD_CMD: data_offset is too small=%d\n",
+               pcmd_node->cmdbuf->data_offset);
+        if (pioctl_buf)
+            pioctl_buf->status_code = MLAN_ERROR_CMD_DNLD_FAIL;
+        wlan_insert_cmd_to_free_q(pmadapter, pcmd_node);
+        wlan_request_cmd_lock(pmadapter);
+        pmadapter->curr_cmd = MNULL;
+        wlan_release_cmd_lock(pmadapter);
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+    tmp = wlan_cpu_to_le32(MLAN_USB_TYPE_CMD);
+    memcpy(pmadapter, (t_u8 *) pcmd - MLAN_TYPE_LEN, (t_u8 *) & tmp,
+           MLAN_TYPE_LEN);
+    pcmd_node->cmdbuf->data_offset -= MLAN_TYPE_LEN;
+    pcmd_node->cmdbuf->data_len += MLAN_TYPE_LEN;
+
+    pmadapter->callbacks.moal_get_system_time(pmadapter->pmoal_handle, &sec,
+                                              &usec);
+    PRINTM(MCMND, "DNLD_CMD (%lu.%06lu): 0x%x, act 0x%x, len %d, seqno 0x%x\n",
+           sec, usec, cmd_code,
+           wlan_le16_to_cpu(*(t_u16 *) ((t_u8 *) pcmd + S_DS_GEN)), cmd_size,
+           wlan_le16_to_cpu(pcmd->seq_num));
+    DBG_HEXDUMP(MCMD_D, "DNLD_CMD", (t_u8 *) pcmd, cmd_size);
+
+    /* Send the command to lower layer */
+    pmadapter->cmd_sent = MTRUE;
+    ret = pcb->moal_write_data_async(pmadapter->pmoal_handle,
+                                     pcmd_node->cmdbuf, MLAN_USB_EP_CMD_EVENT);
+    if (ret == MLAN_STATUS_PENDING)
+        pcmd_node->cmdbuf = MNULL;
+
+    if (ret == MLAN_STATUS_FAILURE) {
+        PRINTM(MERROR, "DNLD_CMD: Host to Card Failed\n");
+        pmadapter->cmd_sent = MFALSE;
+        if (pioctl_buf)
+            pioctl_buf->status_code = MLAN_ERROR_CMD_DNLD_FAIL;
+        wlan_insert_cmd_to_free_q(pmadapter, pmadapter->curr_cmd);
+
+        wlan_request_cmd_lock(pmadapter);
+        pmadapter->curr_cmd = MNULL;
+        wlan_release_cmd_lock(pmadapter);
+
+        pmadapter->dbg.num_cmd_host_to_card_failure++;
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* Save the last command id and action to debug log */
+    pmadapter->dbg.last_cmd_index =
+        (pmadapter->dbg.last_cmd_index + 1) % DBG_CMD_NUM;
+    pmadapter->dbg.last_cmd_id[pmadapter->dbg.last_cmd_index] = cmd_code;
+    pmadapter->dbg.last_cmd_act[pmadapter->dbg.last_cmd_index] =
+        wlan_le16_to_cpu(*(t_u16 *) ((t_u8 *) pcmd + S_DS_GEN));
+
+    /* Clear BSS_NO_BITS from HostCmd */
+    cmd_code &= HostCmd_CMD_ID_MASK;
+    /* soft_reset command has no command response, we should return here */
+    if (cmd_code == HostCmd_CMD_SOFT_RESET) {
+        PRINTM(MCMND, "DNLD_CMD: SoftReset\n");
+        if (pioctl_buf) {
+            wlan_request_cmd_lock(pmadapter);
+            pmadapter->curr_cmd->pioctl_buf = MNULL;
+            wlan_release_cmd_lock(pmadapter);
+            pcb->moal_ioctl_complete(pmadapter->pmoal_handle, pioctl_buf,
+                                     MLAN_STATUS_SUCCESS);
+        }
+        goto done;
+    }
+
+    /* Setup the timer after transmit command */
+    pcb->moal_start_timer(pmadapter->pmoal_handle, pmadapter->pmlan_cmd_timer,
+                          MFALSE, MRVDRV_TIMER_60S);
+
+    pmadapter->cmd_timer_is_set = MTRUE;
+
+    ret = MLAN_STATUS_SUCCESS;
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function sends sleep confirm command to firmware.
+ * 
+ *  @param pmadapter  A pointer to mlan_adapter structure
+ *
+ *  @return        MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_dnld_sleep_confirm_cmd(mlan_adapter * pmadapter)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    static t_u32 i = 0;
+    opt_sleep_confirm_buffer *sleep_cfm_buf =
+        (opt_sleep_confirm_buffer *) (pmadapter->psleep_cfm->pbuf +
+                                      pmadapter->psleep_cfm->data_offset);
+    mlan_buffer *pmbuf = MNULL;
+
+    ENTER();
+
+    pmadapter->seq_num++;
+    sleep_cfm_buf->ps_cfm_sleep.seq_num =
+        wlan_cpu_to_le16(HostCmd_SET_SEQ_NO_BSS_INFO
+                         (pmadapter->seq_num,
+                          (wlan_get_priv(pmadapter, MLAN_BSS_ROLE_ANY))->
+                          bss_num,
+                          (wlan_get_priv(pmadapter, MLAN_BSS_ROLE_ANY))->
+                          bss_type));
+    DBG_HEXDUMP(MCMD_D, "SLEEP_CFM", &sleep_cfm_buf->ps_cfm_sleep,
+                sizeof(OPT_Confirm_Sleep));
+
+    /* Send sleep confirm command to firmware */
+    pmbuf =
+        wlan_alloc_mlan_buffer(pmadapter, sizeof(opt_sleep_confirm_buffer), 0,
+                               MTRUE);
+
+    if (!pmbuf) {
+        PRINTM(MERROR, "Failed to allocate sleep confirm buffers\n");
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+    memcpy(pmadapter, pmbuf, pmadapter->psleep_cfm, sizeof(mlan_buffer));
+    memcpy(pmadapter, pmbuf->pbuf + pmbuf->data_offset,
+           pmadapter->psleep_cfm->pbuf + pmadapter->psleep_cfm->data_offset,
+           pmadapter->psleep_cfm->data_len);
+    ret = pmadapter->callbacks.moal_write_data_async(pmadapter->pmoal_handle,
+                                                     pmbuf,
+                                                     MLAN_USB_EP_CMD_EVENT);
+    if (ret != MLAN_STATUS_PENDING)
+        wlan_free_mlan_buffer(pmadapter, pmbuf);
+
+    if (ret == MLAN_STATUS_FAILURE) {
+        PRINTM(MERROR, "SLEEP_CFM: failed\n");
+        pmadapter->dbg.num_cmd_sleep_cfm_host_to_card_failure++;
+        goto done;
+    } else {
+        if (GET_BSS_ROLE(wlan_get_priv(pmadapter, MLAN_BSS_ROLE_ANY)) ==
+            MLAN_BSS_ROLE_UAP)
+            pmadapter->ps_state = PS_STATE_SLEEP_CFM;
+#ifdef STA_SUPPORT
+        if (GET_BSS_ROLE(wlan_get_priv(pmadapter, MLAN_BSS_ROLE_ANY)) ==
+            MLAN_BSS_ROLE_STA) {
+            if (!sleep_cfm_buf->ps_cfm_sleep.sleep_cfm.resp_ctrl) {
+                /* Response is not needed for sleep confirm command */
+                pmadapter->ps_state = PS_STATE_SLEEP;
+            } else {
+                pmadapter->ps_state = PS_STATE_SLEEP_CFM;
+            }
+
+            if (!sleep_cfm_buf->ps_cfm_sleep.sleep_cfm.resp_ctrl
+                && (pmadapter->is_hs_configured &&
+                    !pmadapter->sleep_period.period)) {
+                pmadapter->pm_wakeup_card_req = MTRUE;
+                wlan_host_sleep_activated_event(wlan_get_priv
+                                                (pmadapter, MLAN_BSS_ROLE_STA),
+                                                MTRUE);
+            }
+        }
+#endif /* STA_SUPPORT */
+
+#define NUM_SC_PER_LINE         16
+        if (++i % NUM_SC_PER_LINE == 0)
+            PRINTM(MEVENT, "+\n");
+        else
+            PRINTM(MEVENT, "+");
+    }
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/********************************************************
+                Global Functions
+********************************************************/
+
+/** 
+ *  @brief Event handler
+ *  
+ *  @param priv		A pointer to mlan_private structure
+ *  @param event_id	Event ID
+ *  @param pmevent	Event buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_recv_event(pmlan_private priv, mlan_event_id event_id, t_void * pmevent)
+{
+    pmlan_callbacks pcb = &priv->adapter->callbacks;
+
+    ENTER();
+
+    if (pmevent)
+        /* The caller has provided the event. */
+        pcb->moal_recv_event(priv->adapter->pmoal_handle,
+                             (pmlan_event) pmevent);
+    else {
+        mlan_event mevent;
+
+        memset(priv->adapter, &mevent, 0, sizeof(mlan_event));
+        mevent.bss_index = priv->bss_index;
+        mevent.event_id = event_id;
+        mevent.event_len = 0;
+
+        pcb->moal_recv_event(priv->adapter->pmoal_handle, &mevent);
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function allocates the command buffer and links
+ *              it to command free queue.
+ *  
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_alloc_cmd_buffer(IN mlan_adapter * pmadapter)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_callbacks *pcb = (mlan_callbacks *) & pmadapter->callbacks;
+    cmd_ctrl_node *pcmd_array = MNULL;
+    t_u32 buf_size;
+    t_u32 i;
+
+    ENTER();
+
+    /* Allocate and initialize cmd_ctrl_node */
+    buf_size = sizeof(cmd_ctrl_node) * MRVDRV_NUM_OF_CMD_BUFFER;
+    ret =
+        pcb->moal_malloc(pmadapter->pmoal_handle, buf_size,
+                         MLAN_MEM_DEF | MLAN_MEM_DMA, (t_u8 **) & pcmd_array);
+    if (ret != MLAN_STATUS_SUCCESS || !pcmd_array) {
+        PRINTM(MERROR, "ALLOC_CMD_BUF: Failed to allocate pcmd_array\n");
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    pmadapter->cmd_pool = pcmd_array;
+    memset(pmadapter, pmadapter->cmd_pool, 0, buf_size);
+
+    for (i = 0; i < MRVDRV_NUM_OF_CMD_BUFFER; i++) {
+        wlan_insert_cmd_to_free_q(pmadapter, &pcmd_array[i]);
+    }
+    ret = MLAN_STATUS_SUCCESS;
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function frees the command buffer.
+ *  
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_free_cmd_buffer(IN mlan_adapter * pmadapter)
+{
+    mlan_callbacks *pcb = (mlan_callbacks *) & pmadapter->callbacks;
+    cmd_ctrl_node *pcmd_array;
+    t_u32 i;
+
+    ENTER();
+
+    /* Need to check if cmd pool is allocated or not */
+    if (pmadapter->cmd_pool == MNULL) {
+        PRINTM(MINFO, "FREE_CMD_BUF: cmd_pool is Null\n");
+        goto done;
+    }
+
+    pcmd_array = pmadapter->cmd_pool;
+
+    /* Release shared memory buffers */
+    for (i = 0; i < MRVDRV_NUM_OF_CMD_BUFFER; i++) {
+        if (pcmd_array[i].cmdbuf) {
+            PRINTM(MINFO, "Free all the USB command buffer.\n");
+            wlan_free_mlan_buffer(pmadapter, pcmd_array[i].cmdbuf);
+            pcmd_array[i].cmdbuf = MNULL;
+
+        }
+        if (pcmd_array[i].respbuf) {
+            pmadapter->callbacks.moal_recv_complete(pmadapter->pmoal_handle,
+                                                    pcmd_array[i].respbuf,
+                                                    MLAN_USB_EP_CMD_EVENT,
+                                                    MLAN_STATUS_SUCCESS);
+            pcmd_array[i].respbuf = MNULL;
+        }
+    }
+    /* Release cmd_ctrl_node */
+    if (pmadapter->cmd_pool) {
+        PRINTM(MINFO, "Free command pool.\n");
+        pcb->moal_mfree(pmadapter->pmoal_handle, (t_u8 *) pmadapter->cmd_pool);
+        pmadapter->cmd_pool = MNULL;
+    }
+
+  done:
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function handles events generated by firmware
+ *  
+ *  @param pmadapter		A pointer to mlan_adapter structure
+ *
+ *  @return		MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_process_event(pmlan_adapter pmadapter)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_private priv = wlan_get_priv(pmadapter, MLAN_BSS_ROLE_ANY);
+    pmlan_buffer pmbuf = pmadapter->pmlan_buffer_event;
+    t_u32 eventcause = pmadapter->event_cause;
+    t_u32 in_ts_sec;
+    t_u32 in_ts_usec;
+    ENTER();
+
+    /* Save the last event to debug log */
+    pmadapter->dbg.last_event_index =
+        (pmadapter->dbg.last_event_index + 1) % DBG_CMD_NUM;
+    pmadapter->dbg.last_event[pmadapter->dbg.last_event_index] =
+        (t_u16) eventcause;
+
+    /* Get BSS number and corresponding priv */
+    priv =
+        wlan_get_priv_by_id(pmadapter, EVENT_GET_BSS_NUM(eventcause),
+                            EVENT_GET_BSS_TYPE(eventcause));
+    if (!priv)
+        priv = wlan_get_priv(pmadapter, MLAN_BSS_ROLE_ANY);
+
+    /* Clear BSS_NO_BITS from event */
+    eventcause &= EVENT_ID_MASK;
+    pmadapter->event_cause = eventcause;
+
+    if (pmbuf) {
+        pmbuf->bss_index = priv->bss_index;
+        memcpy(pmadapter,
+               pmbuf->pbuf + pmbuf->data_offset,
+               (t_u8 *) & eventcause, sizeof(eventcause));
+    }
+
+    if (eventcause != EVENT_PS_SLEEP && eventcause != EVENT_PS_AWAKE) {
+        pmadapter->callbacks.moal_get_system_time(pmadapter->pmoal_handle,
+                                                  &in_ts_sec, &in_ts_usec);
+        PRINTM(MEVENT, "%lu.%06lu : Event: 0x%x\n", in_ts_sec, in_ts_usec,
+               eventcause);
+    }
+
+    ret = priv->ops.process_event(priv);
+
+    pmadapter->event_cause = 0;
+    pmadapter->pmlan_buffer_event = MNULL;
+    if (pmbuf) {
+        pmadapter->callbacks.moal_recv_complete(pmadapter->pmoal_handle, pmbuf,
+                                                MLAN_USB_EP_CMD_EVENT,
+                                                MLAN_STATUS_SUCCESS);
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief This function requests a lock on command queue.
+ *  
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *
+ *  @return             N/A
+ */
+t_void
+wlan_request_cmd_lock(IN mlan_adapter * pmadapter)
+{
+    mlan_callbacks *pcb = (mlan_callbacks *) & pmadapter->callbacks;
+
+    ENTER();
+
+    /* Call MOAL spin lock callback function */
+    pcb->moal_spin_lock(pmadapter->pmoal_handle, pmadapter->pmlan_cmd_lock);
+
+    LEAVE();
+    return;
+}
+
+/** 
+ *  @brief This function releases a lock on command queue.
+ *  
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *
+ *  @return             N/A
+ */
+t_void
+wlan_release_cmd_lock(IN mlan_adapter * pmadapter)
+{
+    mlan_callbacks *pcb = (mlan_callbacks *) & pmadapter->callbacks;
+
+    ENTER();
+
+    /* Call MOAL spin unlock callback function */
+    pcb->moal_spin_unlock(pmadapter->pmoal_handle, pmadapter->pmlan_cmd_lock);
+
+    LEAVE();
+    return;
+}
+
+/** 
+ *  @brief This function prepare the command before sending to firmware.
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param cmd_no       Command number
+ *  @param cmd_action   Command action: GET or SET
+ *  @param cmd_oid      Cmd oid: treated as sub command
+ *  @param pioctl_buf   A pointer to MLAN IOCTL Request buffer
+ *  @param pdata_buf    A pointer to information buffer
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_prepare_cmd(IN mlan_private * pmpriv,
+                 IN t_u16 cmd_no,
+                 IN t_u16 cmd_action,
+                 IN t_u32 cmd_oid,
+                 IN t_void * pioctl_buf, IN t_void * pdata_buf)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    cmd_ctrl_node *pcmd_node = MNULL;
+    HostCmd_DS_COMMAND *cmd_ptr = MNULL;
+    pmlan_ioctl_req pioctl_req = (mlan_ioctl_req *) pioctl_buf;
+
+    ENTER();
+
+    /* Sanity test */
+    if (!pmadapter || pmadapter->surprise_removed) {
+        PRINTM(MERROR, "PREP_CMD: Card is Removed\n");
+        if (pioctl_req)
+            pioctl_req->status_code = MLAN_ERROR_FW_NOT_READY;
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    if (pmadapter->hw_status == WlanHardwareStatusReset) {
+        if (cmd_no != HostCmd_CMD_FUNC_INIT) {
+            PRINTM(MERROR, "PREP_CMD: FW is in reset state\n");
+            if (pioctl_req)
+                pioctl_req->status_code = MLAN_ERROR_FW_NOT_READY;
+            ret = MLAN_STATUS_FAILURE;
+            goto done;
+        }
+    }
+
+    /* Get a new command node */
+    pcmd_node = wlan_get_cmd_node(pmadapter);
+
+    if (pcmd_node == MNULL) {
+        PRINTM(MERROR, "PREP_CMD: No free cmd node\n");
+        if (pioctl_req)
+            pioctl_req->status_code = MLAN_ERROR_NO_MEM;
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* Initialize the command node */
+    wlan_init_cmd_node(pmpriv, pcmd_node, cmd_oid, pioctl_buf, pdata_buf);
+
+    if (pcmd_node->cmdbuf == MNULL) {
+        PRINTM(MERROR, "PREP_CMD: No free cmd buf\n");
+        if (pioctl_req)
+            pioctl_req->status_code = MLAN_ERROR_NO_MEM;
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    cmd_ptr =
+        (HostCmd_DS_COMMAND *) (pcmd_node->cmdbuf->pbuf +
+                                pcmd_node->cmdbuf->data_offset);
+    cmd_ptr->command = cmd_no;
+    cmd_ptr->result = 0;
+
+    /* Prepare command */
+    if (cmd_no)
+        ret =
+            pmpriv->ops.prepare_cmd(pmpriv, cmd_no, cmd_action, cmd_oid,
+                                    pioctl_buf, pdata_buf, cmd_ptr);
+    else {
+        ret = wlan_cmd_host_cmd(pmpriv, cmd_ptr, pdata_buf);
+        pcmd_node->cmd_flag |= CMD_F_HOSTCMD;
+    }
+
+    /* Return error, since the command preparation failed */
+    if (ret != MLAN_STATUS_SUCCESS) {
+        PRINTM(MERROR, "PREP_CMD: Command 0x%x preparation failed\n", cmd_no);
+        pcmd_node->pioctl_buf = MNULL;
+        wlan_insert_cmd_to_free_q(pmadapter, pcmd_node);
+        if (pioctl_req)
+            pioctl_req->status_code = MLAN_ERROR_CMD_DNLD_FAIL;
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* Send command */
+#ifdef STA_SUPPORT
+    if (cmd_no == HostCmd_CMD_802_11_SCAN)
+        wlan_queue_scan_cmd(pmpriv, pcmd_node);
+    else {
+#endif
+        if ((cmd_no == HostCmd_CMD_802_11_HS_CFG_ENH) &&
+            (cmd_action == HostCmd_ACT_GEN_SET) &&
+            (pmadapter->hs_cfg.conditions == HOST_SLEEP_CFG_CANCEL))
+            wlan_insert_cmd_to_pending_q(pmadapter, pcmd_node, MFALSE);
+        else
+            wlan_insert_cmd_to_pending_q(pmadapter, pcmd_node, MTRUE);
+#ifdef STA_SUPPORT
+    }
+#endif
+  done:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief This function inserts command node to cmd_free_q
+ *              after cleaning it.
+ *  
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param pcmd_node    A pointer to cmd_ctrl_node structure
+ *
+ *  @return             N/A
+ */
+t_void
+wlan_insert_cmd_to_free_q(IN mlan_adapter * pmadapter,
+                          IN cmd_ctrl_node * pcmd_node)
+{
+    mlan_callbacks *pcb = (mlan_callbacks *) & pmadapter->callbacks;
+    mlan_ioctl_req *pioctl_req = MNULL;
+    ENTER();
+
+    if (pcmd_node == MNULL)
+        goto done;
+    if (pcmd_node->pioctl_buf) {
+        pioctl_req = (mlan_ioctl_req *) pcmd_node->pioctl_buf;
+        if (pioctl_req->status_code != MLAN_ERROR_NO_ERROR)
+            pcb->moal_ioctl_complete(pmadapter->pmoal_handle,
+                                     pioctl_req, MLAN_STATUS_FAILURE);
+        else
+            pcb->moal_ioctl_complete(pmadapter->pmoal_handle,
+                                     pioctl_req, MLAN_STATUS_SUCCESS);
+    }
+    /* Clean the node */
+    wlan_clean_cmd_node(pmadapter, pcmd_node);
+
+    /* Insert node into cmd_free_q */
+    util_enqueue_list_tail(pmadapter->pmoal_handle, &pmadapter->cmd_free_q,
+                           (pmlan_linked_list) pcmd_node,
+                           pmadapter->callbacks.moal_spin_lock,
+                           pmadapter->callbacks.moal_spin_unlock);
+  done:
+    LEAVE();
+}
+
+/** 
+ *  @brief This function queues the command to cmd list.
+ *  
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param pcmd_node    A pointer to cmd_ctrl_node structure
+ *  @param add_tail      Specify if the cmd needs to be queued in the header or tail
+ *
+ *  @return             N/A
+ */
+t_void
+wlan_insert_cmd_to_pending_q(IN mlan_adapter * pmadapter,
+                             IN cmd_ctrl_node * pcmd_node, IN t_u32 add_tail)
+{
+    HostCmd_DS_COMMAND *pcmd = MNULL;
+    t_u16 command;
+
+    ENTER();
+
+    if (pcmd_node == MNULL) {
+        PRINTM(MERROR, "QUEUE_CMD: pcmd_node is MNULL\n");
+        goto done;
+    }
+
+    pcmd =
+        (HostCmd_DS_COMMAND *) (pcmd_node->cmdbuf->pbuf +
+                                pcmd_node->cmdbuf->data_offset);
+    if (pcmd == MNULL) {
+        PRINTM(MERROR, "QUEUE_CMD: pcmd is MNULL\n");
+        goto done;
+    }
+
+    command = wlan_le16_to_cpu(pcmd->command);
+
+    /* Exit_PS command needs to be queued in the header always. */
+    if (command == HostCmd_CMD_802_11_PS_MODE_ENH) {
+        HostCmd_DS_802_11_PS_MODE_ENH *pm = &pcmd->params.psmode_enh;
+        if (wlan_le16_to_cpu(pm->action) == DIS_AUTO_PS) {
+            if (pmadapter->ps_state != PS_STATE_AWAKE)
+                add_tail = MFALSE;
+        }
+    }
+
+    if (add_tail) {
+        util_enqueue_list_tail(pmadapter->pmoal_handle,
+                               &pmadapter->cmd_pending_q,
+                               (pmlan_linked_list) pcmd_node,
+                               pmadapter->callbacks.moal_spin_lock,
+                               pmadapter->callbacks.moal_spin_unlock);
+    } else {
+        util_enqueue_list_head(pmadapter->pmoal_handle,
+                               &pmadapter->cmd_pending_q,
+                               (pmlan_linked_list) pcmd_node,
+                               pmadapter->callbacks.moal_spin_lock,
+                               pmadapter->callbacks.moal_spin_unlock);
+    }
+
+    PRINTM(MCMND, "QUEUE_CMD: cmd=0x%x is queued\n", command);
+
+  done:
+    LEAVE();
+    return;
+}
+
+/** 
+ *  @brief This function executes next command in command
+ *      pending queue. It will put firmware back to PS mode
+ *      if applicable.
+ * 
+ *  @param pmadapter     A pointer to mlan_adapter structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE 
+ */
+mlan_status
+wlan_exec_next_cmd(mlan_adapter * pmadapter)
+{
+    mlan_private *priv = MNULL;
+    cmd_ctrl_node *pcmd_node = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    HostCmd_DS_COMMAND *pcmd;
+
+    ENTER();
+
+    /* Sanity test */
+    if (pmadapter == MNULL) {
+        PRINTM(MERROR, "EXEC_NEXT_CMD: pmadapter is MNULL\n");
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+    /* Check if already in processing */
+    if (pmadapter->curr_cmd) {
+        PRINTM(MERROR, "EXEC_NEXT_CMD: there is command in processing!\n");
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    wlan_request_cmd_lock(pmadapter);
+    /* Check if any command is pending */
+    pcmd_node =
+        (cmd_ctrl_node *) util_peek_list(pmadapter->pmoal_handle,
+                                         &pmadapter->cmd_pending_q,
+                                         pmadapter->callbacks.moal_spin_lock,
+                                         pmadapter->callbacks.moal_spin_unlock);
+
+    if (pcmd_node) {
+        pcmd =
+            (HostCmd_DS_COMMAND *) (pcmd_node->cmdbuf->pbuf +
+                                    pcmd_node->cmdbuf->data_offset);
+        priv = pcmd_node->priv;
+
+        if (pmadapter->ps_state != PS_STATE_AWAKE) {
+            PRINTM(MERROR,
+                   "Cannot send command in sleep state, this should not happen\n");
+            wlan_release_cmd_lock(pmadapter);
+            goto done;
+        }
+
+        util_unlink_list(pmadapter->pmoal_handle,
+                         &pmadapter->cmd_pending_q,
+                         (pmlan_linked_list) pcmd_node,
+                         pmadapter->callbacks.moal_spin_lock,
+                         pmadapter->callbacks.moal_spin_unlock);
+        wlan_release_cmd_lock(pmadapter);
+        ret = wlan_dnld_cmd_to_fw(priv, pcmd_node);
+        priv = wlan_get_priv(pmadapter, MLAN_BSS_ROLE_ANY);
+        /* Any command sent to the firmware when host is in sleep mode, should
+           de-configure host sleep */
+        /* We should skip the host sleep configuration command itself though */
+        if (priv &&
+            (pcmd->command !=
+             wlan_cpu_to_le16(HostCmd_CMD_802_11_HS_CFG_ENH))) {
+            if (pmadapter->hs_activated == MTRUE) {
+                pmadapter->is_hs_configured = MFALSE;
+                wlan_host_sleep_activated_event(priv, MFALSE);
+            }
+        }
+        goto done;
+    } else {
+        wlan_release_cmd_lock(pmadapter);
+    }
+    ret = MLAN_STATUS_SUCCESS;
+  done:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief This function handles the command response
+ *  
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_process_cmdresp(mlan_adapter * pmadapter)
+{
+    HostCmd_DS_COMMAND *resp = MNULL;
+    mlan_private *pmpriv = wlan_get_priv(pmadapter, MLAN_BSS_ROLE_ANY);
+    mlan_private *pmpriv_next = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    t_u16 orig_cmdresp_no;
+    t_u16 cmdresp_no;
+    t_u16 cmdresp_result;
+    mlan_ioctl_req *pioctl_buf = MNULL;
+    mlan_callbacks *pcb = (mlan_callbacks *) & pmadapter->callbacks;
+    t_u32 sec, usec, i;
+
+    ENTER();
+
+    /* Now we got response from FW, cancel the command timer */
+    if (pmadapter->cmd_timer_is_set) {
+        /* Cancel command timeout timer */
+        pcb->moal_stop_timer(pmadapter->pmoal_handle,
+                             pmadapter->pmlan_cmd_timer);
+        /* Cancel command timeout timer */
+        pmadapter->cmd_timer_is_set = MFALSE;
+    }
+
+    if (pmadapter->curr_cmd)
+        if (pmadapter->curr_cmd->pioctl_buf != MNULL) {
+            pioctl_buf = (mlan_ioctl_req *) pmadapter->curr_cmd->pioctl_buf;
+        }
+
+    if (!pmadapter->curr_cmd || !pmadapter->curr_cmd->respbuf) {
+        resp = (HostCmd_DS_COMMAND *) pmadapter->upld_buf;
+        resp->command = wlan_le16_to_cpu(resp->command);
+        PRINTM(MERROR, "CMD_RESP: No curr_cmd, 0x%x\n", resp->command);
+        if (pioctl_buf)
+            pioctl_buf->status_code = MLAN_ERROR_CMD_RESP_FAIL;
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    pmadapter->num_cmd_timeout = 0;
+
+    DBG_HEXDUMP(MCMD_D, "CMD_RESP",
+                pmadapter->curr_cmd->respbuf->pbuf +
+                pmadapter->curr_cmd->respbuf->data_offset,
+                pmadapter->curr_cmd->respbuf->data_len);
+
+    resp =
+        (HostCmd_DS_COMMAND *) (pmadapter->curr_cmd->respbuf->pbuf +
+                                pmadapter->curr_cmd->respbuf->data_offset);
+    if (pmadapter->curr_cmd->cmd_flag & CMD_F_CANCELED) {
+        PRINTM(MERROR, "CMD_RESP: 0x%x been canceled!\n",
+               wlan_le16_to_cpu(resp->command));
+        wlan_insert_cmd_to_free_q(pmadapter, pmadapter->curr_cmd);
+        wlan_request_cmd_lock(pmadapter);
+        pmadapter->curr_cmd = MNULL;
+        wlan_release_cmd_lock(pmadapter);
+        if (pioctl_buf)
+            pioctl_buf->status_code = MLAN_ERROR_CMD_CANCEL;
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+    if (pmadapter->curr_cmd->cmd_flag & CMD_F_HOSTCMD) {
+        /* Copy original response back to response buffer */
+        wlan_ret_host_cmd(pmpriv, resp, pioctl_buf);
+    }
+    orig_cmdresp_no = wlan_le16_to_cpu(resp->command);
+    resp->size = wlan_le16_to_cpu(resp->size);
+    resp->seq_num = wlan_le16_to_cpu(resp->seq_num);
+    resp->result = wlan_le16_to_cpu(resp->result);
+
+    /* Get BSS number and corresponding priv */
+    pmpriv =
+        wlan_get_priv_by_id(pmadapter, HostCmd_GET_BSS_NO(resp->seq_num),
+                            HostCmd_GET_BSS_TYPE(resp->seq_num));
+    if (!pmpriv)
+        pmpriv = wlan_get_priv(pmadapter, MLAN_BSS_ROLE_ANY);
+    /* Clear RET_BIT from HostCmd */
+    resp->command = (orig_cmdresp_no & HostCmd_CMD_ID_MASK);
+    cmdresp_no = resp->command;
+
+    cmdresp_result = resp->result;
+
+    /* Save the last command response to debug log */
+    pmadapter->dbg.last_cmd_resp_index =
+        (pmadapter->dbg.last_cmd_resp_index + 1) % DBG_CMD_NUM;
+    pmadapter->dbg.last_cmd_resp_id[pmadapter->dbg.last_cmd_resp_index] =
+        orig_cmdresp_no;
+
+    pmadapter->callbacks.moal_get_system_time(pmadapter->pmoal_handle, &sec,
+                                              &usec);
+    PRINTM(MCMND, "CMD_RESP (%lu.%06lu): 0x%x, result %d, len %d, seqno 0x%x\n",
+           sec, usec, orig_cmdresp_no, cmdresp_result, resp->size,
+           resp->seq_num);
+
+    if (!(orig_cmdresp_no & HostCmd_RET_BIT)) {
+        PRINTM(MERROR, "CMD_RESP: Invalid response to command!\n");
+        if (pioctl_buf) {
+            pioctl_buf->status_code = MLAN_ERROR_FW_CMDRESP;
+        }
+        wlan_insert_cmd_to_free_q(pmadapter, pmadapter->curr_cmd);
+        wlan_request_cmd_lock(pmadapter);
+        pmadapter->curr_cmd = MNULL;
+        wlan_release_cmd_lock(pmadapter);
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    if (pmadapter->curr_cmd->cmd_flag & CMD_F_HOSTCMD) {
+        pmadapter->curr_cmd->cmd_flag &= ~CMD_F_HOSTCMD;
+        if ((cmdresp_result == HostCmd_RESULT_OK)
+            && (cmdresp_no == HostCmd_CMD_802_11_HS_CFG_ENH))
+            ret = wlan_ret_802_11_hs_cfg(pmpriv, resp, pioctl_buf);
+    } else {
+        /* handle response */
+        ret = pmpriv->ops.process_cmdresp(pmpriv, cmdresp_no, resp, pioctl_buf);
+    }
+
+    /* Check init command response */
+    if (pmadapter->hw_status == WlanHardwareStatusInitializing) {
+        if (ret == MLAN_STATUS_FAILURE) {
+#if defined(STA_SUPPORT)
+            if (pmadapter->pwarm_reset_ioctl_req) {
+                /* warm reset failure */
+                pmadapter->pwarm_reset_ioctl_req->status_code =
+                    MLAN_ERROR_CMD_RESP_FAIL;
+                pcb->moal_ioctl_complete(pmadapter->pmoal_handle,
+                                         pmadapter->pwarm_reset_ioctl_req,
+                                         MLAN_STATUS_FAILURE);
+                pmadapter->pwarm_reset_ioctl_req = MNULL;
+                goto done;
+            }
+#endif
+            PRINTM(MERROR, "cmd 0x%02x failed during initialization\n",
+                   cmdresp_no);
+            wlan_init_fw_complete(pmadapter);
+            goto done;
+        }
+    }
+
+    if (pmadapter->curr_cmd) {
+        pioctl_buf = (mlan_ioctl_req *) pmadapter->curr_cmd->pioctl_buf;
+        if (pioctl_buf && (ret == MLAN_STATUS_SUCCESS))
+            pioctl_buf->status_code = MLAN_ERROR_NO_ERROR;
+        else if (pioctl_buf && (ret == MLAN_STATUS_FAILURE))
+            pioctl_buf->status_code = MLAN_ERROR_CMD_RESP_FAIL;
+
+        /* Clean up and put current command back to cmd_free_q */
+        wlan_insert_cmd_to_free_q(pmadapter, pmadapter->curr_cmd);
+
+        wlan_request_cmd_lock(pmadapter);
+        pmadapter->curr_cmd = MNULL;
+        wlan_release_cmd_lock(pmadapter);
+    }
+
+    if ((pmadapter->hw_status == WlanHardwareStatusInitializing) &&
+        (pmadapter->last_init_cmd == cmdresp_no)) {
+        i = pmpriv->bss_index + 1;
+        while (!(pmpriv_next = pmadapter->priv[i]) && i < pmadapter->priv_num)
+            i++;
+        if (!pmpriv_next || i >= pmadapter->priv_num) {
+#if defined(STA_SUPPORT)
+            if (pmadapter->pwarm_reset_ioctl_req) {
+                /* warm reset complete */
+                pmadapter->hw_status = WlanHardwareStatusReady;
+                pcb->moal_ioctl_complete(pmadapter->pmoal_handle,
+                                         pmadapter->pwarm_reset_ioctl_req,
+                                         MLAN_STATUS_SUCCESS);
+                pmadapter->pwarm_reset_ioctl_req = MNULL;
+                goto done;
+            }
+#endif
+            pmadapter->hw_status = WlanHardwareStatusInitdone;
+        } else {
+            /* Issue init commands for the next interface */
+            ret = pmpriv_next->ops.init_cmd(pmpriv_next, MFALSE);
+        }
+    }
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief This function handles the timeout of command sending.
+ *  It will re-send the same command again.
+ *  
+ *  @param function_context   A pointer to function_context
+ *  @return 	   N/A
+ */
+t_void
+wlan_cmd_timeout_func(t_void * function_context)
+{
+    mlan_adapter *pmadapter = (mlan_adapter *) function_context;
+    cmd_ctrl_node *pcmd_node = MNULL;
+    mlan_ioctl_req *pioctl_buf = MNULL;
+    t_u32 sec, usec;
+    t_u8 i;
+
+    ENTER();
+
+    pmadapter->cmd_timer_is_set = MFALSE;
+    pmadapter->num_cmd_timeout++;
+    pmadapter->dbg.num_cmd_timeout++;
+    if (!pmadapter->curr_cmd) {
+        PRINTM(MWARN, "CurCmd Empty\n");
+        goto exit;
+    }
+    pcmd_node = pmadapter->curr_cmd;
+    if (pcmd_node->pioctl_buf != MNULL) {
+        pioctl_buf = (mlan_ioctl_req *) pcmd_node->pioctl_buf;
+        pioctl_buf->status_code = MLAN_ERROR_CMD_TIMEOUT;
+    }
+
+    if (pcmd_node) {
+        pmadapter->dbg.timeout_cmd_id =
+            pmadapter->dbg.last_cmd_id[pmadapter->dbg.last_cmd_index];
+        pmadapter->dbg.timeout_cmd_act =
+            pmadapter->dbg.last_cmd_act[pmadapter->dbg.last_cmd_index];
+        pmadapter->callbacks.moal_get_system_time(pmadapter->pmoal_handle, &sec,
+                                                  &usec);
+        PRINTM(MERROR, "Timeout cmd id (%lu.%06lu) = 0x%x, act = 0x%x \n", sec,
+               usec, pmadapter->dbg.timeout_cmd_id,
+               pmadapter->dbg.timeout_cmd_act);
+
+        PRINTM(MERROR, "num_cmd_timeout = %d\n",
+               pmadapter->dbg.num_cmd_timeout);
+        PRINTM(MERROR, "num_tx_timeout = %d\n", pmadapter->dbg.num_tx_timeout);
+
+        PRINTM(MERROR, "last_cmd_index = %d\n", pmadapter->dbg.last_cmd_index);
+        PRINTM(MERROR, "last_cmd_id = ");
+        for (i = 0; i < DBG_CMD_NUM; i++) {
+            PRINTM(MERROR, "0x%x ", pmadapter->dbg.last_cmd_id[i]);
+        }
+        PRINTM(MERROR, "\n");
+        PRINTM(MERROR, "last_cmd_act = ");
+        for (i = 0; i < DBG_CMD_NUM; i++) {
+            PRINTM(MERROR, "0x%x ", pmadapter->dbg.last_cmd_act[i]);
+        }
+        PRINTM(MERROR, "\n");
+        PRINTM(MERROR, "last_cmd_resp_index = %d\n",
+               pmadapter->dbg.last_cmd_resp_index);
+        PRINTM(MERROR, "last_cmd_resp_id = ");
+        for (i = 0; i < DBG_CMD_NUM; i++) {
+            PRINTM(MERROR, "0x%x ", pmadapter->dbg.last_cmd_resp_id[i]);
+        }
+        PRINTM(MERROR, "\n");
+        PRINTM(MERROR, "last_event_index = %d\n",
+               pmadapter->dbg.last_event_index);
+        PRINTM(MERROR, "last_event = ");
+        for (i = 0; i < DBG_CMD_NUM; i++) {
+            PRINTM(MERROR, "0x%x ", pmadapter->dbg.last_event[i]);
+        }
+        PRINTM(MERROR, "\n");
+
+        PRINTM(MERROR, "num_data_h2c_failure = %d\n",
+               pmadapter->dbg.num_tx_host_to_card_failure);
+        PRINTM(MERROR, "num_cmd_h2c_failure = %d\n",
+               pmadapter->dbg.num_cmd_host_to_card_failure);
+
+        PRINTM(MERROR, "data_sent=%d cmd_sent=%d\n", pmadapter->data_sent,
+               pmadapter->cmd_sent);
+
+        PRINTM(MERROR, "ps_mode=%d ps_state=%d\n", pmadapter->ps_mode,
+               pmadapter->ps_state);
+        PRINTM(MERROR, "wakeup_dev_req=%d wakeup_tries=%d\n",
+               pmadapter->pm_wakeup_card_req, pmadapter->pm_wakeup_fw_try);
+        PRINTM(MERROR, "hs_configured=%d hs_activated=%d\n",
+               pmadapter->is_hs_configured, pmadapter->hs_activated);
+        PRINTM(MERROR, "pps_uapsd_mode=%d sleep_pd=%d\n",
+               pmadapter->pps_uapsd_mode, pmadapter->sleep_period.period);
+        PRINTM(MERROR, "tx_lock_flag = %d\n", pmadapter->tx_lock_flag);
+        PRINTM(MERROR, "scan_processing = %ld\n", pmadapter->scan_processing);
+
+    }
+    if (pmadapter->hw_status == WlanHardwareStatusInitializing)
+        wlan_init_fw_complete(pmadapter);
+
+  exit:
+    LEAVE();
+    return;
+}
+
+#ifdef STA_SUPPORT
+/**
+ *  @brief Internal function used to flush the scan pending queue
+ *
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *
+ *  @return             N/A
+ */
+t_void
+wlan_flush_scan_queue(IN pmlan_adapter pmadapter)
+{
+    mlan_callbacks *pcb = (pmlan_callbacks) & pmadapter->callbacks;
+    cmd_ctrl_node *pcmd_node = MNULL;
+
+    ENTER();
+
+    while ((pcmd_node =
+            (cmd_ctrl_node *) util_peek_list(pmadapter->pmoal_handle,
+                                             &pmadapter->scan_pending_q,
+                                             pcb->moal_spin_lock,
+                                             pcb->moal_spin_unlock))) {
+        util_unlink_list(pmadapter->pmoal_handle, &pmadapter->scan_pending_q,
+                         (pmlan_linked_list) pcmd_node, pcb->moal_spin_lock,
+                         pcb->moal_spin_unlock);
+        pcmd_node->pioctl_buf = MNULL;
+        wlan_insert_cmd_to_free_q(pmadapter, pcmd_node);
+    }
+    wlan_request_cmd_lock(pmadapter);
+    pmadapter->scan_processing = MFALSE;
+    wlan_release_cmd_lock(pmadapter);
+
+    LEAVE();
+}
+#endif
+
+/**
+ *  @brief Cancel all pending cmd.
+ *  
+ *  @param pmadapter	A pointer to mlan_adapter
+ *
+ *  @return		N/A
+ */
+t_void
+wlan_cancel_all_pending_cmd(pmlan_adapter pmadapter)
+{
+    cmd_ctrl_node *pcmd_node = MNULL;
+    pmlan_callbacks pcb = &pmadapter->callbacks;
+    mlan_ioctl_req *pioctl_buf = MNULL;
+
+    /* Cancel current cmd */
+    if ((pmadapter->curr_cmd) && (pmadapter->curr_cmd->pioctl_buf)) {
+        pioctl_buf = (mlan_ioctl_req *) pmadapter->curr_cmd->pioctl_buf;
+        wlan_request_cmd_lock(pmadapter);
+        pmadapter->curr_cmd->pioctl_buf = MNULL;
+        wlan_release_cmd_lock(pmadapter);
+        pioctl_buf->status_code = MLAN_ERROR_CMD_CANCEL;
+        pcb->moal_ioctl_complete(pmadapter->pmoal_handle, pioctl_buf,
+                                 MLAN_STATUS_FAILURE);
+    }
+    /* Cancel all pending command */
+    while ((pcmd_node =
+            (cmd_ctrl_node *) util_peek_list(pmadapter->pmoal_handle,
+                                             &pmadapter->cmd_pending_q,
+                                             pcb->moal_spin_lock,
+                                             pcb->moal_spin_unlock))) {
+        util_unlink_list(pmadapter->pmoal_handle, &pmadapter->cmd_pending_q,
+                         (pmlan_linked_list) pcmd_node, pcb->moal_spin_lock,
+                         pcb->moal_spin_unlock);
+        if (pcmd_node->pioctl_buf) {
+            pioctl_buf = (mlan_ioctl_req *) pcmd_node->pioctl_buf;
+            pioctl_buf->status_code = MLAN_ERROR_CMD_CANCEL;
+            pcb->moal_ioctl_complete(pmadapter->pmoal_handle, pioctl_buf,
+                                     MLAN_STATUS_FAILURE);
+            pcmd_node->pioctl_buf = MNULL;
+        }
+        wlan_insert_cmd_to_free_q(pmadapter, pcmd_node);
+    }
+#ifdef STA_SUPPORT
+    /* Cancel all pending scan command */
+    wlan_flush_scan_queue(pmadapter);
+#endif
+}
+
+/**
+ *  @brief Cancel pending ioctl cmd.
+ *  
+ *  @param pmadapter	A pointer to mlan_adapter
+ *  @param pioctl_req	A pointer to mlan_ioctl_req buf
+ *
+ *  @return		N/A
+ */
+t_void
+wlan_cancel_pending_ioctl(pmlan_adapter pmadapter, pmlan_ioctl_req pioctl_req)
+{
+    pmlan_callbacks pcb = &pmadapter->callbacks;
+    cmd_ctrl_node *pcmd_node = MNULL;
+
+    ENTER();
+
+    PRINTM(MIOCTL, "MOAL Cancel IOCTL: 0x%x sub_id=0x%x action=%d\n",
+           pioctl_req->req_id, *((t_u32 *) pioctl_req->pbuf),
+           (int) pioctl_req->action);
+
+    if ((pmadapter->curr_cmd) &&
+        (pmadapter->curr_cmd->pioctl_buf == pioctl_req)) {
+        wlan_request_cmd_lock(pmadapter);
+        pcmd_node = pmadapter->curr_cmd;
+        pcmd_node->pioctl_buf = MNULL;
+        pcmd_node->cmd_flag |= CMD_F_CANCELED;
+        wlan_release_cmd_lock(pmadapter);
+    }
+
+    wlan_request_cmd_lock(pmadapter);
+    while ((pcmd_node =
+            wlan_get_pending_ioctl_cmd(pmadapter, pioctl_req)) != MNULL) {
+        util_unlink_list(pmadapter->pmoal_handle, &pmadapter->cmd_pending_q,
+                         (pmlan_linked_list) pcmd_node,
+                         pmadapter->callbacks.moal_spin_lock,
+                         pmadapter->callbacks.moal_spin_unlock);
+        pcmd_node->pioctl_buf = MNULL;
+        wlan_insert_cmd_to_free_q(pmadapter, pcmd_node);
+    }
+    wlan_release_cmd_lock(pmadapter);
+#ifdef STA_SUPPORT
+    if (pioctl_req->req_id == MLAN_IOCTL_SCAN) {
+        /* Cancel all pending scan command */
+        wlan_flush_scan_queue(pmadapter);
+    }
+#endif
+    pioctl_req->status_code = MLAN_ERROR_CMD_CANCEL;
+    pcb->moal_ioctl_complete(pmadapter->pmoal_handle, pioctl_req,
+                             MLAN_STATUS_FAILURE);
+
+    LEAVE();
+    return;
+}
+
+/**
+ *  @brief Handle the version_ext resp
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_ret_ver_ext(IN pmlan_private pmpriv,
+                 IN HostCmd_DS_COMMAND * resp, IN mlan_ioctl_req * pioctl_buf)
+{
+    HostCmd_DS_VERSION_EXT *ver_ext = &resp->params.verext;
+    mlan_ds_get_info *info;
+    ENTER();
+    if (pioctl_buf) {
+        info = (mlan_ds_get_info *) pioctl_buf->pbuf;
+        info->param.ver_ext.version_str_sel = ver_ext->version_str_sel;
+        memcpy(pmpriv->adapter, info->param.ver_ext.version_str,
+               ver_ext->version_str, sizeof(char) * 128);
+    }
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function checks conditions and prepares to
+ *              send sleep confirm command to firmware if OK.
+ * 
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *
+ *  @return             N/A
+ */
+t_void
+wlan_check_ps_cond(mlan_adapter * pmadapter)
+{
+    ENTER();
+
+    if (!pmadapter->cmd_sent &&
+        !pmadapter->curr_cmd && !IS_CARD_RX_RCVD(pmadapter)) {
+        wlan_dnld_sleep_confirm_cmd(pmadapter);
+    } else {
+        PRINTM(MCMND, "Delay Sleep Confirm (%s%s%s)\n",
+               (pmadapter->cmd_sent) ? "D" : "",
+               (pmadapter->curr_cmd) ? "C" : "",
+               (IS_CARD_RX_RCVD(pmadapter)) ? "R" : "");
+    }
+
+    LEAVE();
+}
+
+/** 
+ *  @brief This function sends the HS_ACTIVATED event to the application
+ *   
+ *  @param priv         A pointer to mlan_private structure
+ *  @param activated    MTRUE if activated, MFALSE if de-activated
+ *
+ *  @return             N/A
+ */
+t_void
+wlan_host_sleep_activated_event(pmlan_private priv, t_u8 activated)
+{
+    ENTER();
+
+    if (activated) {
+        if (priv->adapter->is_hs_configured) {
+            priv->adapter->hs_activated = MTRUE;
+            PRINTM(MEVENT, "hs_activated\n");
+            wlan_recv_event(priv, MLAN_EVENT_ID_DRV_HS_ACTIVATED, MNULL);
+        } else
+            PRINTM(MWARN, "hs_activated: HS not configured !!!\n");
+    } else {
+        PRINTM(MEVENT, "hs_deactived\n");
+        priv->adapter->hs_activated = MFALSE;
+        wlan_recv_event(priv, MLAN_EVENT_ID_DRV_HS_DEACTIVATED, MNULL);
+    }
+
+    LEAVE();
+}
+
+/** 
+ *  @brief This function sends the HS_WAKEUP event to the application
+ *   
+ *  @param priv         A pointer to mlan_private structure
+ *
+ *  @return             N/A
+ */
+t_void
+wlan_host_sleep_wakeup_event(pmlan_private priv)
+{
+    ENTER();
+
+    if (priv->adapter->is_hs_configured) {
+        wlan_recv_event(priv, MLAN_EVENT_ID_FW_HS_WAKEUP, MNULL);
+    } else {
+        PRINTM(MWARN, "hs_wakeup: Host Sleep not configured !!!\n");
+    }
+
+    LEAVE();
+}
+
+/** 
+ *  @brief This function handles the command response of hs_cfg
+ * 
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_ret_802_11_hs_cfg(IN pmlan_private pmpriv,
+                       IN HostCmd_DS_COMMAND * resp,
+                       IN mlan_ioctl_req * pioctl_buf)
+{
+    pmlan_adapter pmadapter = pmpriv->adapter;
+    HostCmd_DS_802_11_HS_CFG_ENH *phs_cfg = &resp->params.opt_hs_cfg;
+    ENTER();
+
+    if (wlan_le16_to_cpu(phs_cfg->action) == HS_ACTIVATE) {
+        /* clean up curr_cmd to allow suspend */
+        if (pioctl_buf)
+            pioctl_buf->status_code = MLAN_ERROR_NO_ERROR;
+        /* Clean up and put current command back to cmd_free_q */
+        wlan_insert_cmd_to_free_q(pmadapter, pmadapter->curr_cmd);
+        wlan_request_cmd_lock(pmadapter);
+        pmadapter->curr_cmd = MNULL;
+        wlan_release_cmd_lock(pmadapter);
+        wlan_host_sleep_activated_event(pmpriv, MTRUE);
+        goto done;
+    } else {
+        phs_cfg->params.hs_config.conditions =
+            wlan_le32_to_cpu(phs_cfg->params.hs_config.conditions);
+        PRINTM(MCMND,
+               "CMD_RESP: HS_CFG cmd reply result=%#x,"
+               " conditions=0x%x gpio=0x%x gap=0x%x\n", resp->result,
+               phs_cfg->params.hs_config.conditions,
+               phs_cfg->params.hs_config.gpio, phs_cfg->params.hs_config.gap);
+    }
+    if (phs_cfg->params.hs_config.conditions != HOST_SLEEP_CFG_CANCEL) {
+        pmadapter->is_hs_configured = MTRUE;
+    } else {
+        pmadapter->is_hs_configured = MFALSE;
+        if (pmadapter->hs_activated)
+            wlan_host_sleep_activated_event(pmpriv, MFALSE);
+    }
+  done:
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief Perform hs related activities on receiving the power up interrupt
+ *  
+ *  @param pmadapter  A pointer to the adapter structure
+ *  @return           N/A
+ */
+t_void
+wlan_process_hs_config(pmlan_adapter pmadapter)
+{
+    PRINTM(MINFO, "Recevie interrupt/data in HS mode\n");
+    if (pmadapter->hs_cfg.gap == HOST_SLEEP_CFG_GAP_FF)
+        wlan_pm_wakeup_card(pmadapter);
+    return;
+}
+
+/** 
+ *  @brief Check sleep confirm command response and set the state to ASLEEP
+ *  
+ *  @param pmadapter  A pointer to the adapter structure
+ *  @param pbuf       A pointer to the command response buffer
+ *  @param upld_len   Command response buffer length
+ *  @return           N/A
+ */
+void
+wlan_process_sleep_confirm_resp(pmlan_adapter pmadapter, t_u8 * pbuf,
+                                t_u32 upld_len)
+{
+    HostCmd_DS_COMMAND *cmd;
+
+    ENTER();
+
+    if (!upld_len) {
+        PRINTM(MERROR, "Command size is 0\n");
+        LEAVE();
+        return;
+    }
+    cmd = (HostCmd_DS_COMMAND *) pbuf;
+    cmd->result = wlan_le16_to_cpu(cmd->result);
+    cmd->command = wlan_le16_to_cpu(cmd->command);
+    cmd->seq_num = wlan_le16_to_cpu(cmd->seq_num);
+
+    /* Update sequence number */
+    cmd->seq_num = HostCmd_GET_SEQ_NO(cmd->seq_num);
+    /* Clear RET_BIT from HostCmd */
+    cmd->command &= HostCmd_CMD_ID_MASK;
+
+    if (cmd->command != HostCmd_CMD_802_11_PS_MODE_ENH) {
+        PRINTM(MERROR,
+               "Received unexpected response for command %x, result = %x\n",
+               cmd->command, cmd->result);
+        return;
+    }
+    PRINTM(MEVENT, "#\n");
+    if (cmd->result != MLAN_STATUS_SUCCESS) {
+        PRINTM(MERROR, "Sleep confirm command failed\n");
+        pmadapter->pm_wakeup_card_req = MFALSE;
+        pmadapter->ps_state = PS_STATE_AWAKE;
+        LEAVE();
+        return;
+    }
+    pmadapter->pm_wakeup_card_req = MTRUE;
+
+    if (pmadapter->is_hs_configured) {
+        wlan_host_sleep_activated_event(wlan_get_priv
+                                        (pmadapter, MLAN_BSS_ROLE_ANY), MTRUE);
+    }
+    pmadapter->ps_state = PS_STATE_SLEEP;
+    LEAVE();
+}
+
+/**
+ *  @brief This function prepares command of power mode
+ *  
+ *  @param pmpriv		A pointer to mlan_private structure
+ *  @param cmd	   		A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action   the action: GET or SET
+ *  @param ps_bitmap    PS bitmap
+ *  @param pdata_buf    A pointer to data buffer
+ *  @return         MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_cmd_enh_power_mode(pmlan_private pmpriv,
+                        IN HostCmd_DS_COMMAND * cmd,
+                        IN t_u16 cmd_action,
+                        IN t_u16 ps_bitmap, IN t_void * pdata_buf)
+{
+    HostCmd_DS_802_11_PS_MODE_ENH *psmode_enh = &cmd->params.psmode_enh;
+    t_u8 *tlv = MNULL;
+    t_u16 cmd_size = 0;
+
+    PRINTM(MCMND, "PS Command: action = 0x%x, bitmap = 0x%x\n", cmd_action,
+           ps_bitmap);
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_802_11_PS_MODE_ENH);
+    if (cmd_action == DIS_AUTO_PS) {
+        psmode_enh->action = wlan_cpu_to_le16(DIS_AUTO_PS);
+        psmode_enh->params.ps_bitmap = wlan_cpu_to_le16(ps_bitmap);
+        cmd->size = wlan_cpu_to_le16(S_DS_GEN + AUTO_PS_FIX_SIZE);
+    } else if (cmd_action == GET_PS) {
+        psmode_enh->action = wlan_cpu_to_le16(GET_PS);
+        psmode_enh->params.ps_bitmap = wlan_cpu_to_le16(ps_bitmap);
+        cmd->size = wlan_cpu_to_le16(S_DS_GEN + AUTO_PS_FIX_SIZE);
+    } else if (cmd_action == EN_AUTO_PS) {
+        psmode_enh->action = wlan_cpu_to_le16(EN_AUTO_PS);
+        psmode_enh->params.auto_ps.ps_bitmap = wlan_cpu_to_le16(ps_bitmap);
+        cmd_size = S_DS_GEN + AUTO_PS_FIX_SIZE;
+        tlv = (t_u8 *) cmd + cmd_size;
+        if (ps_bitmap & BITMAP_STA_PS) {
+            pmlan_adapter pmadapter = pmpriv->adapter;
+            MrvlIEtypes_ps_param_t *ps_tlv = (MrvlIEtypes_ps_param_t *) tlv;
+            ps_param *ps_mode = &ps_tlv->param;
+            ps_tlv->header.type = wlan_cpu_to_le16(TLV_TYPE_PS_PARAM);
+            ps_tlv->header.len =
+                wlan_cpu_to_le16(sizeof(MrvlIEtypes_ps_param_t) -
+                                 sizeof(MrvlIEtypesHeader_t));
+            cmd_size += sizeof(MrvlIEtypes_ps_param_t);
+            tlv += sizeof(MrvlIEtypes_ps_param_t);
+            ps_mode->null_pkt_interval =
+                wlan_cpu_to_le16(pmadapter->null_pkt_interval);
+            ps_mode->multiple_dtims =
+                wlan_cpu_to_le16(pmadapter->multiple_dtim);
+            ps_mode->bcn_miss_timeout =
+                wlan_cpu_to_le16(pmadapter->bcn_miss_time_out);
+            ps_mode->local_listen_interval =
+                wlan_cpu_to_le16(pmadapter->local_listen_interval);
+            ps_mode->adhoc_wake_period =
+                wlan_cpu_to_le16(pmadapter->adhoc_awake_period);
+            ps_mode->delay_to_ps = wlan_cpu_to_le16(pmadapter->delay_to_ps);
+            ps_mode->mode = wlan_cpu_to_le16(pmadapter->enhanced_ps_mode);
+        }
+#if defined(UAP_SUPPORT)
+        if (pdata_buf &&
+            (ps_bitmap & (BITMAP_UAP_INACT_PS | BITMAP_UAP_DTIM_PS))) {
+            mlan_ds_ps_mgmt *ps_mgmt = (mlan_ds_ps_mgmt *) pdata_buf;
+            MrvlIEtypes_sleep_param_t *sleep_tlv = MNULL;
+            MrvlIEtypes_inact_sleep_param_t *inact_tlv = MNULL;
+            if (ps_mgmt->flags & PS_FLAG_SLEEP_PARAM) {
+                sleep_tlv = (MrvlIEtypes_sleep_param_t *) tlv;
+                sleep_tlv->header.type =
+                    wlan_cpu_to_le16(TLV_TYPE_AP_SLEEP_PARAM);
+                sleep_tlv->header.len =
+                    wlan_cpu_to_le16(sizeof(MrvlIEtypes_sleep_param_t) -
+                                     sizeof(MrvlIEtypesHeader_t));
+                sleep_tlv->ctrl_bitmap =
+                    wlan_cpu_to_le32(ps_mgmt->sleep_param.ctrl_bitmap);
+                sleep_tlv->min_sleep =
+                    wlan_cpu_to_le32(ps_mgmt->sleep_param.min_sleep);
+                sleep_tlv->max_sleep =
+                    wlan_cpu_to_le32(ps_mgmt->sleep_param.max_sleep);
+                cmd_size += sizeof(MrvlIEtypes_sleep_param_t);
+                tlv += sizeof(MrvlIEtypes_sleep_param_t);
+            }
+            if (ps_mgmt->flags & PS_FLAG_INACT_SLEEP_PARAM) {
+                inact_tlv = (MrvlIEtypes_inact_sleep_param_t *) tlv;
+                inact_tlv->header.type =
+                    wlan_cpu_to_le16(TLV_TYPE_AP_INACT_SLEEP_PARAM);
+                inact_tlv->header.len =
+                    wlan_cpu_to_le16(sizeof(MrvlIEtypes_inact_sleep_param_t)
+                                     - sizeof(MrvlIEtypesHeader_t));
+                inact_tlv->inactivity_to =
+                    wlan_cpu_to_le32(ps_mgmt->inact_param.inactivity_to);
+                inact_tlv->min_awake =
+                    wlan_cpu_to_le32(ps_mgmt->inact_param.min_awake);
+                inact_tlv->max_awake =
+                    wlan_cpu_to_le32(ps_mgmt->inact_param.max_awake);
+                cmd_size += sizeof(MrvlIEtypes_inact_sleep_param_t);
+                tlv += sizeof(MrvlIEtypes_inact_sleep_param_t);
+            }
+        }
+#endif
+        cmd->size = wlan_cpu_to_le16(cmd_size);
+    }
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function handles the command response of ps_mode_enh
+ * 
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_ret_enh_power_mode(IN pmlan_private pmpriv,
+                        IN HostCmd_DS_COMMAND * resp,
+                        IN mlan_ioctl_req * pioctl_buf)
+{
+    pmlan_adapter pmadapter = pmpriv->adapter;
+    HostCmd_DS_802_11_PS_MODE_ENH *ps_mode = &resp->params.psmode_enh;
+    ps_mode->action = wlan_le16_to_cpu(ps_mode->action);
+    PRINTM(MINFO, "CMD_RESP: PS_MODE cmd reply result=%#x action=0x%X\n",
+           resp->result, ps_mode->action);
+    if (ps_mode->action == EN_AUTO_PS) {
+        ps_mode->params.auto_ps.ps_bitmap =
+            wlan_le16_to_cpu(ps_mode->params.auto_ps.ps_bitmap);
+        if (ps_mode->params.auto_ps.ps_bitmap & BITMAP_STA_PS) {
+            PRINTM(MCMND, "Enabled STA power save\n");
+            if (pmadapter->sleep_period.period) {
+                PRINTM(MCMND, "Setting uapsd/pps mode to TRUE\n");
+            }
+        }
+#if defined(UAP_SUPPORT)
+        if (ps_mode->params.auto_ps.
+            ps_bitmap & (BITMAP_UAP_INACT_PS | BITMAP_UAP_DTIM_PS)) {
+            pmadapter->ps_mode = Wlan802_11PowerModePSP;
+            PRINTM(MCMND, "Enabled uAP power save\n");
+        }
+#endif
+    } else if (ps_mode->action == DIS_AUTO_PS) {
+        ps_mode->params.ps_bitmap = wlan_cpu_to_le16(ps_mode->params.ps_bitmap);
+        if (ps_mode->params.ps_bitmap & BITMAP_STA_PS) {
+            PRINTM(MCMND, "Disabled STA power save\n");
+            if (pmadapter->sleep_period.period) {
+                pmadapter->delay_null_pkt = MFALSE;
+                pmadapter->tx_lock_flag = MFALSE;
+                pmadapter->pps_uapsd_mode = MFALSE;
+            }
+        }
+#if defined(UAP_SUPPORT)
+        if (ps_mode->params.
+            ps_bitmap & (BITMAP_UAP_INACT_PS | BITMAP_UAP_DTIM_PS)) {
+            pmadapter->ps_mode = Wlan802_11PowerModeCAM;
+            PRINTM(MCMND, "Disabled uAP power save\n");
+        }
+#endif
+    } else if (ps_mode->action == GET_PS) {
+        ps_mode->params.ps_bitmap = wlan_le16_to_cpu(ps_mode->params.ps_bitmap);
+        if (ps_mode->params.auto_ps.
+            ps_bitmap & (BITMAP_STA_PS | BITMAP_UAP_INACT_PS |
+                         BITMAP_UAP_DTIM_PS))
+            pmadapter->ps_mode = Wlan802_11PowerModePSP;
+        else
+            pmadapter->ps_mode = Wlan802_11PowerModeCAM;
+        PRINTM(MCMND, "ps_bitmap=0x%x\n", ps_mode->params.ps_bitmap);
+        if (pioctl_buf) {
+            mlan_ds_pm_cfg *pm_cfg = (mlan_ds_pm_cfg *) pioctl_buf->pbuf;
+            if (pm_cfg->sub_command == MLAN_OID_PM_CFG_IEEE_PS) {
+                if (ps_mode->params.auto_ps.ps_bitmap & BITMAP_STA_PS)
+                    pm_cfg->param.ps_mode = 1;
+                else
+                    pm_cfg->param.ps_mode = 0;
+            }
+#if defined(UAP_SUPPORT)
+            if (pm_cfg->sub_command == MLAN_OID_PM_CFG_PS_MODE) {
+                MrvlIEtypes_sleep_param_t *sleep_tlv = MNULL;
+                MrvlIEtypes_inact_sleep_param_t *inact_tlv = MNULL;
+                MrvlIEtypesHeader_t *tlv = MNULL;
+                t_u16 tlv_type = 0;
+                t_u16 tlv_len = 0;
+                t_u16 tlv_buf_left = 0;
+                pm_cfg->param.ps_mgmt.flags = PS_FLAG_PS_MODE;
+                if (ps_mode->params.ps_bitmap & BITMAP_UAP_INACT_PS)
+                    pm_cfg->param.ps_mgmt.ps_mode = PS_MODE_INACTIVITY;
+                else if (ps_mode->params.ps_bitmap & BITMAP_UAP_DTIM_PS)
+                    pm_cfg->param.ps_mgmt.ps_mode = PS_MODE_PERIODIC_DTIM;
+                else
+                    pm_cfg->param.ps_mgmt.ps_mode = PS_MODE_DISABLE;
+                tlv_buf_left = resp->size - (S_DS_GEN + AUTO_PS_FIX_SIZE);
+                tlv =
+                    (MrvlIEtypesHeader_t *) ((t_u8 *) ps_mode +
+                                             AUTO_PS_FIX_SIZE);
+                while (tlv_buf_left >= sizeof(MrvlIEtypesHeader_t)) {
+                    tlv_type = wlan_le16_to_cpu(tlv->type);
+                    tlv_len = wlan_le16_to_cpu(tlv->len);
+                    switch (tlv_type) {
+                    case TLV_TYPE_AP_SLEEP_PARAM:
+                        sleep_tlv = (MrvlIEtypes_sleep_param_t *) tlv;
+                        pm_cfg->param.ps_mgmt.flags |= PS_FLAG_SLEEP_PARAM;
+                        pm_cfg->param.ps_mgmt.sleep_param.ctrl_bitmap =
+                            wlan_le32_to_cpu(sleep_tlv->ctrl_bitmap);
+                        pm_cfg->param.ps_mgmt.sleep_param.min_sleep =
+                            wlan_le32_to_cpu(sleep_tlv->min_sleep);
+                        pm_cfg->param.ps_mgmt.sleep_param.max_sleep =
+                            wlan_le32_to_cpu(sleep_tlv->max_sleep);
+                        break;
+                    case TLV_TYPE_AP_INACT_SLEEP_PARAM:
+                        inact_tlv = (MrvlIEtypes_inact_sleep_param_t *) tlv;
+                        pm_cfg->param.ps_mgmt.flags |=
+                            PS_FLAG_INACT_SLEEP_PARAM;
+                        pm_cfg->param.ps_mgmt.inact_param.inactivity_to =
+                            wlan_le32_to_cpu(inact_tlv->inactivity_to);
+                        pm_cfg->param.ps_mgmt.inact_param.min_awake =
+                            wlan_le32_to_cpu(inact_tlv->min_awake);
+                        pm_cfg->param.ps_mgmt.inact_param.max_awake =
+                            wlan_le32_to_cpu(inact_tlv->max_awake);
+                        break;
+                    }
+                    tlv_buf_left -= tlv_len + sizeof(MrvlIEtypesHeader_t);
+                    tlv =
+                        (MrvlIEtypesHeader_t *) ((t_u8 *) tlv + tlv_len +
+                                                 sizeof(MrvlIEtypesHeader_t));
+                }
+            }
+#endif
+        }
+    }
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function handles the command response of tx rate query
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_ret_802_11_tx_rate_query(IN pmlan_private pmpriv,
+                              IN HostCmd_DS_COMMAND * resp,
+                              IN mlan_ioctl_req * pioctl_buf)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    mlan_ds_rate *rate = MNULL;
+    ENTER();
+
+    pmpriv->tx_rate = resp->params.tx_rate.tx_rate;
+    pmpriv->tx_htinfo = resp->params.tx_rate.ht_info;
+    if (!pmpriv->is_data_rate_auto) {
+        pmpriv->data_rate =
+            wlan_index_to_data_rate(pmadapter, pmpriv->tx_rate,
+                                    pmpriv->tx_htinfo);
+    }
+
+    if (pioctl_buf) {
+        rate = (mlan_ds_rate *) pioctl_buf->pbuf;
+        if (rate->sub_command == MLAN_OID_RATE_CFG) {
+            if (rate->param.rate_cfg.rate_type == MLAN_RATE_INDEX) {
+                if (pmpriv->tx_htinfo & MBIT(0))
+                    rate->param.rate_cfg.rate =
+                        pmpriv->tx_rate + MLAN_RATE_INDEX_MCS0;
+                else
+                    /* For HostCmd_CMD_802_11_TX_RATE_QUERY, there is a hole in 
+                       rate table between HR/DSSS and OFDM rates, so minus 1
+                       for OFDM rate index */
+                    rate->param.rate_cfg.rate =
+                        (pmpriv->tx_rate >
+                         MLAN_RATE_INDEX_OFDM0) ? pmpriv->tx_rate -
+                        1 : pmpriv->tx_rate;
+            } else {
+                rate->param.rate_cfg.rate =
+                    wlan_index_to_data_rate(pmadapter, pmpriv->tx_rate,
+                                            pmpriv->tx_htinfo);
+            }
+        } else if (rate->sub_command == MLAN_OID_GET_DATA_RATE) {
+            if (pmpriv->tx_htinfo & MBIT(0)) {
+                rate->param.data_rate.tx_data_rate =
+                    pmpriv->tx_rate + MLAN_RATE_INDEX_MCS0;
+                if (pmpriv->tx_htinfo & MBIT(1))
+                    rate->param.data_rate.tx_ht_bw = MLAN_HT_BW40;
+                else
+                    rate->param.data_rate.tx_ht_bw = MLAN_HT_BW20;
+                if (pmpriv->tx_htinfo & MBIT(2))
+                    rate->param.data_rate.tx_ht_gi = MLAN_HT_SGI;
+                else
+                    rate->param.data_rate.tx_ht_gi = MLAN_HT_LGI;
+            } else
+                /* For HostCmd_CMD_802_11_TX_RATE_QUERY, there is a hole in
+                   rate table between HR/DSSS and OFDM rates, so minus 1 for
+                   OFDM rate index */
+                rate->param.data_rate.tx_data_rate =
+                    (pmpriv->tx_rate >
+                     MLAN_RATE_INDEX_OFDM0) ? pmpriv->tx_rate -
+                    1 : pmpriv->tx_rate;
+            if (pmpriv->rxpd_htinfo & MBIT(0)) {
+                rate->param.data_rate.rx_data_rate =
+                    pmpriv->rxpd_rate + MLAN_RATE_INDEX_MCS0;
+                if (pmpriv->rxpd_htinfo & MBIT(1))
+                    rate->param.data_rate.rx_ht_bw = MLAN_HT_BW40;
+                else
+                    rate->param.data_rate.rx_ht_bw = MLAN_HT_BW20;
+                if (pmpriv->tx_htinfo & MBIT(2))
+                    rate->param.data_rate.rx_ht_gi = MLAN_HT_SGI;
+                else
+                    rate->param.data_rate.rx_ht_gi = MLAN_HT_LGI;
+            } else
+                /* For rate index in RxPD, there is a hole in rate table
+                   between HR/DSSS and OFDM rates, so minus 1 for OFDM rate
+                   index */
+                rate->param.data_rate.rx_data_rate =
+                    (pmpriv->rxpd_rate >
+                     MLAN_RATE_INDEX_OFDM0) ? pmpriv->rxpd_rate -
+                    1 : pmpriv->rxpd_rate;
+        }
+        pioctl_buf->data_read_written =
+            sizeof(mlan_multicast_list) + MLAN_SUB_COMMAND_SIZE;
+    }
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function prepares command of tx_rate_cfg.
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action   The action: GET or SET
+ *  @param pdata_buf    A pointer to data buffer
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_cmd_tx_rate_cfg(IN pmlan_private pmpriv,
+                     IN HostCmd_DS_COMMAND * cmd,
+                     IN t_u16 cmd_action, IN t_void * pdata_buf)
+{
+    HostCmd_DS_TX_RATE_CFG *rate_cfg = &cmd->params.tx_rate_cfg;
+    MrvlRateScope_t *rate_scope;
+    MrvlRateDropPattern_t *rate_drop;
+    t_u16 *pbitmap_rates = (t_u16 *) pdata_buf;
+
+    t_u32 i;
+
+    ENTER();
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_TX_RATE_CFG);
+
+    rate_cfg->action = wlan_cpu_to_le16(cmd_action);
+    rate_cfg->cfg_index = 0;
+
+    rate_scope = (MrvlRateScope_t *) ((t_u8 *) rate_cfg +
+                                      sizeof(HostCmd_DS_TX_RATE_CFG));
+    rate_scope->type = wlan_cpu_to_le16(TLV_TYPE_RATE_SCOPE);
+    rate_scope->length = wlan_cpu_to_le16(sizeof(MrvlRateScope_t) -
+                                          sizeof(MrvlIEtypesHeader_t));
+    if (pbitmap_rates != MNULL) {
+        rate_scope->hr_dsss_rate_bitmap = wlan_cpu_to_le16(pbitmap_rates[0]);
+        rate_scope->ofdm_rate_bitmap = wlan_cpu_to_le16(pbitmap_rates[1]);
+        for (i = 0; i < sizeof(rate_scope->ht_mcs_rate_bitmap) / sizeof(t_u16);
+             i++)
+            rate_scope->ht_mcs_rate_bitmap[i] =
+                wlan_cpu_to_le16(pbitmap_rates[2 + i]);
+    } else {
+        rate_scope->hr_dsss_rate_bitmap =
+            wlan_cpu_to_le16(pmpriv->bitmap_rates[0]);
+        rate_scope->ofdm_rate_bitmap =
+            wlan_cpu_to_le16(pmpriv->bitmap_rates[1]);
+        for (i = 0; i < sizeof(rate_scope->ht_mcs_rate_bitmap) / sizeof(t_u16);
+             i++)
+            rate_scope->ht_mcs_rate_bitmap[i] =
+                wlan_cpu_to_le16(pmpriv->bitmap_rates[2 + i]);
+    }
+
+    rate_drop = (MrvlRateDropPattern_t *) ((t_u8 *) rate_scope +
+                                           sizeof(MrvlRateScope_t));
+    rate_drop->type = wlan_cpu_to_le16(TLV_TYPE_RATE_DROP_PATTERN);
+    rate_drop->length = wlan_cpu_to_le16(sizeof(rate_drop->rate_drop_mode));
+    rate_drop->rate_drop_mode = 0;
+
+    cmd->size = wlan_cpu_to_le16(S_DS_GEN + sizeof(HostCmd_DS_TX_RATE_CFG) +
+                                 sizeof(MrvlRateScope_t) +
+                                 sizeof(MrvlRateDropPattern_t));
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function handles the command response of tx_rate_cfg
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure 
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_ret_tx_rate_cfg(IN pmlan_private pmpriv,
+                     IN HostCmd_DS_COMMAND * resp,
+                     IN mlan_ioctl_req * pioctl_buf)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    mlan_ds_rate *ds_rate = MNULL;
+    HostCmd_DS_TX_RATE_CFG *prate_cfg = &resp->params.tx_rate_cfg;
+    MrvlRateScope_t *prate_scope;
+    MrvlIEtypesHeader_t *head = MNULL;
+    t_u16 tlv, tlv_buf_len;
+    t_u8 *tlv_buf;
+    t_u32 i;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    tlv_buf = (t_u8 *) ((t_u8 *) prate_cfg) + sizeof(HostCmd_DS_TX_RATE_CFG);
+    tlv_buf_len = *(t_u16 *) (tlv_buf + sizeof(t_u16));
+    tlv_buf_len = wlan_le16_to_cpu(tlv_buf_len);
+
+    while (tlv_buf && tlv_buf_len > 0) {
+        tlv = (*tlv_buf);
+        tlv = tlv | (*(tlv_buf + 1) << 8);
+
+        switch (tlv) {
+        case TLV_TYPE_RATE_SCOPE:
+            prate_scope = (MrvlRateScope_t *) tlv_buf;
+            pmpriv->bitmap_rates[0] =
+                wlan_le16_to_cpu(prate_scope->hr_dsss_rate_bitmap);
+            pmpriv->bitmap_rates[1] =
+                wlan_le16_to_cpu(prate_scope->ofdm_rate_bitmap);
+            for (i = 0;
+                 i < sizeof(prate_scope->ht_mcs_rate_bitmap) / sizeof(t_u16);
+                 i++)
+                pmpriv->bitmap_rates[2 + i] =
+                    wlan_le16_to_cpu(prate_scope->ht_mcs_rate_bitmap[i]);
+            break;
+            /* Add RATE_DROP tlv here */
+        }
+
+        head = (MrvlIEtypesHeader_t *) tlv_buf;
+        head->len = wlan_le16_to_cpu(head->len);
+        tlv_buf += head->len + sizeof(MrvlIEtypesHeader_t);
+        tlv_buf_len -= head->len;
+    }
+
+    pmpriv->is_data_rate_auto = wlan_is_rate_auto(pmpriv);
+
+    if (pmpriv->is_data_rate_auto) {
+        pmpriv->data_rate = 0;
+    } else {
+        ret = wlan_prepare_cmd(pmpriv,
+                               HostCmd_CMD_802_11_TX_RATE_QUERY,
+                               HostCmd_ACT_GEN_GET, 0, MNULL, MNULL);
+
+    }
+
+    if (pioctl_buf) {
+        ds_rate = (mlan_ds_rate *) pioctl_buf->pbuf;
+        if (wlan_le16_to_cpu(prate_cfg->action) == HostCmd_ACT_GEN_GET) {
+            if (pmpriv->is_data_rate_auto)
+                ds_rate->param.rate_cfg.is_rate_auto = MTRUE;
+            else {
+                ds_rate->param.rate_cfg.rate =
+                    wlan_get_rate_index(pmadapter, pmpriv->bitmap_rates,
+                                        sizeof(pmpriv->bitmap_rates));
+                if (ds_rate->param.rate_cfg.rate >= MLAN_RATE_BITMAP_OFDM0 &&
+                    ds_rate->param.rate_cfg.rate <= MLAN_RATE_BITMAP_OFDM7)
+                    ds_rate->param.rate_cfg.rate -=
+                        (MLAN_RATE_BITMAP_OFDM0 - MLAN_RATE_INDEX_OFDM0);
+                if (ds_rate->param.rate_cfg.rate >= MLAN_RATE_BITMAP_MCS0 &&
+                    ds_rate->param.rate_cfg.rate <= MLAN_RATE_BITMAP_MCS127)
+                    ds_rate->param.rate_cfg.rate -=
+                        (MLAN_RATE_BITMAP_MCS0 - MLAN_RATE_INDEX_MCS0);
+            }
+        }
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief  This function issues adapter specific commands 
+ *  		to initialize firmware
+ *
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *
+ *  @return             MLAN_STATUS_PENDING or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_adapter_init_cmd(IN pmlan_adapter pmadapter)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_private pmpriv = MNULL;
+#ifdef STA_SUPPORT
+    pmlan_private pmpriv_sta = MNULL;
+#endif
+
+    ENTER();
+
+    pmpriv = wlan_get_priv(pmadapter, MLAN_BSS_ROLE_ANY);
+#ifdef STA_SUPPORT
+    pmpriv_sta = wlan_get_priv(pmadapter, MLAN_BSS_ROLE_STA);
+#endif
+
+    ret = wlan_prepare_cmd(pmpriv, HostCmd_CMD_FUNC_INIT,
+                           HostCmd_ACT_GEN_SET, 0, MNULL, MNULL);
+    if (ret) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /** Cal data dnld cmd prepare */
+    if ((pmadapter->pcal_data) && (pmadapter->cal_data_len > 0)) {
+        ret =
+            wlan_prepare_cmd(pmpriv, HostCmd_CMD_CFG_DATA, HostCmd_ACT_GEN_SET,
+                             0, MNULL, MNULL);
+        if (ret) {
+            ret = MLAN_STATUS_FAILURE;
+            goto done;
+        }
+        pmadapter->pcal_data = MNULL;
+        pmadapter->cal_data_len = 0;
+    }
+
+    /* 
+     * Get HW spec
+     */
+    ret = wlan_prepare_cmd(pmpriv, HostCmd_CMD_GET_HW_SPEC,
+                           HostCmd_ACT_GEN_GET, 0, MNULL, MNULL);
+    if (ret) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* Reconfigure tx buf size */
+    ret = wlan_prepare_cmd(pmpriv, HostCmd_CMD_RECONFIGURE_TX_BUFF,
+                           HostCmd_ACT_GEN_SET, 0, MNULL,
+                           &pmadapter->max_tx_buf_size);
+    if (ret) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+#if defined(STA_SUPPORT)
+    if (pmpriv_sta && (pmpriv_sta->state_11d.user_enable_11d == ENABLE_11D)) {
+        /* Send command to FW to enable 11d */
+        ret = wlan_prepare_cmd(pmpriv_sta,
+                               HostCmd_CMD_802_11_SNMP_MIB,
+                               HostCmd_ACT_GEN_SET,
+                               Dot11D_i,
+                               MNULL, &pmpriv_sta->state_11d.user_enable_11d);
+        if (ret) {
+            ret = MLAN_STATUS_FAILURE;
+            goto done;
+        }
+    }
+#endif
+
+#if defined(STA_SUPPORT)
+    if (pmpriv_sta && (pmadapter->ps_mode == Wlan802_11PowerModePSP)) {
+        ret = wlan_prepare_cmd(pmpriv_sta, HostCmd_CMD_802_11_PS_MODE_ENH,
+                               EN_AUTO_PS, BITMAP_STA_PS, MNULL, MNULL);
+        if (ret) {
+            ret = MLAN_STATUS_FAILURE;
+            goto done;
+        }
+    }
+#endif
+
+    ret = MLAN_STATUS_PENDING;
+  done:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief This function prepares command of get_hw_spec.
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param pcmd         A pointer to HostCmd_DS_COMMAND structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_cmd_get_hw_spec(IN pmlan_private pmpriv, IN HostCmd_DS_COMMAND * pcmd)
+{
+    HostCmd_DS_GET_HW_SPEC *hw_spec = &pcmd->params.hw_spec;
+
+    ENTER();
+
+    pcmd->command = wlan_cpu_to_le16(HostCmd_CMD_GET_HW_SPEC);
+    pcmd->size = wlan_cpu_to_le16(sizeof(HostCmd_DS_GET_HW_SPEC) + S_DS_GEN);
+    memcpy(pmpriv->adapter, hw_spec->permanent_addr, pmpriv->curr_addr,
+           MLAN_MAC_ADDR_LENGTH);
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function prepares command of set_cfg_data.
+ *
+ *  @param pmpriv       A pointer to mlan_private strcture
+ *  @param pcmd         A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action   Command action: GET or SET
+ *  @param pdata_buf    A pointer to cal_data buf
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_cmd_cfg_data(IN pmlan_private pmpriv,
+                  IN HostCmd_DS_COMMAND * pcmd,
+                  IN t_u16 cmd_action, IN t_void * pdata_buf)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    HostCmd_DS_802_11_CFG_DATA *pcfg_data = &(pcmd->params.cfg_data);
+    pmlan_adapter pmadapter = pmpriv->adapter;
+    t_u32 len;
+    t_u32 cal_data_offset;
+    t_u8 *temp_pcmd = (t_u8 *) pcmd;
+
+    ENTER();
+
+    cal_data_offset = S_DS_GEN + sizeof(HostCmd_DS_802_11_CFG_DATA);
+    if ((pmadapter->pcal_data) && (pmadapter->cal_data_len > 0)) {
+        len = wlan_parse_cal_cfg((t_u8 *) pmadapter->pcal_data,
+                                 pmadapter->cal_data_len,
+                                 (t_u8 *) (temp_pcmd + cal_data_offset));
+    } else {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    pcfg_data->action = cmd_action;
+    pcfg_data->type = 2;        /* cal data type */
+    pcfg_data->data_len = len;
+
+    pcmd->command = HostCmd_CMD_CFG_DATA;
+    pcmd->size = pcfg_data->data_len + cal_data_offset;
+
+    pcmd->command = wlan_cpu_to_le16(pcmd->command);
+    pcmd->size = wlan_cpu_to_le16(pcmd->size);
+
+    pcfg_data->action = wlan_cpu_to_le16(pcfg_data->action);
+    pcfg_data->type = wlan_cpu_to_le16(pcfg_data->type);
+    pcfg_data->data_len = wlan_cpu_to_le16(pcfg_data->data_len);
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function handles the command response of set_cfg_data
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to A pointer to mlan_ioctl_req
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_ret_cfg_data(IN pmlan_private pmpriv,
+                  IN HostCmd_DS_COMMAND * resp, IN t_void * pioctl_buf)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    if (resp->result != HostCmd_RESULT_OK) {
+        PRINTM(MERROR, "Cal data cmd resp failed\n");
+        ret = MLAN_STATUS_FAILURE;
+    }
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief This function handles the command response of get_hw_spec
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to command buffer
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_ret_get_hw_spec(IN pmlan_private pmpriv,
+                     IN HostCmd_DS_COMMAND * resp, IN t_void * pioctl_buf)
+{
+    HostCmd_DS_GET_HW_SPEC *hw_spec = &resp->params.hw_spec;
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+#if defined(STA_SUPPORT)
+    t_u32 i;
+#endif
+#if defined(STA_SUPPORT)
+    pmlan_ioctl_req pioctl_req = (mlan_ioctl_req *) pioctl_buf;
+#endif
+
+    ENTER();
+
+    pmadapter->fw_cap_info = wlan_le32_to_cpu(hw_spec->fw_cap_info);
+#ifdef STA_SUPPORT
+    if (IS_SUPPORT_MULTI_BANDS(pmadapter)) {
+        pmadapter->fw_bands = (t_u8) GET_FW_DEFAULT_BANDS(pmadapter);
+    } else {
+        pmadapter->fw_bands = BAND_B;
+    }
+
+    pmadapter->config_bands = pmadapter->fw_bands;
+
+    if (pmadapter->fw_bands & BAND_A) {
+        if (pmadapter->fw_bands & BAND_GN) {
+            pmadapter->config_bands |= BAND_AN;
+            pmadapter->fw_bands |= BAND_AN;
+        }
+        if ((pmadapter->fw_bands & BAND_AN)
+            ) {
+            pmadapter->adhoc_start_band = BAND_A | BAND_AN;
+            pmadapter->adhoc_11n_enabled = MTRUE;
+        } else
+            pmadapter->adhoc_start_band = BAND_A;
+        pmpriv->adhoc_channel = DEFAULT_AD_HOC_CHANNEL_A;
+    } else if ((pmadapter->fw_bands & BAND_GN)
+        ) {
+        pmadapter->adhoc_start_band = BAND_G | BAND_B | BAND_GN;
+        pmpriv->adhoc_channel = DEFAULT_AD_HOC_CHANNEL;
+        pmadapter->adhoc_11n_enabled = MTRUE;
+    } else if (pmadapter->fw_bands & BAND_G) {
+        pmadapter->adhoc_start_band = BAND_G | BAND_B;
+        pmpriv->adhoc_channel = DEFAULT_AD_HOC_CHANNEL;
+    } else if (pmadapter->fw_bands & BAND_B) {
+        pmadapter->adhoc_start_band = BAND_B;
+        pmpriv->adhoc_channel = DEFAULT_AD_HOC_CHANNEL;
+    }
+#endif /* STA_SUPPORT */
+
+    pmadapter->fw_release_number = hw_spec->fw_release_number;
+    pmadapter->number_of_antenna = wlan_le16_to_cpu(hw_spec->number_of_antenna);
+
+    PRINTM(MINFO, "GET_HW_SPEC: fw_release_number- 0x%X\n",
+           wlan_le32_to_cpu(pmadapter->fw_release_number));
+    PRINTM(MINFO, "GET_HW_SPEC: Permanent addr- %2x:%2x:%2x:%2x:%2x:%2x\n",
+           hw_spec->permanent_addr[0], hw_spec->permanent_addr[1],
+           hw_spec->permanent_addr[2], hw_spec->permanent_addr[3],
+           hw_spec->permanent_addr[4], hw_spec->permanent_addr[5]);
+    PRINTM(MINFO, "GET_HW_SPEC: hw_if_version=0x%X  version=0x%X\n",
+           wlan_le16_to_cpu(hw_spec->hw_if_version),
+           wlan_le16_to_cpu(hw_spec->version));
+
+    if (pmpriv->curr_addr[0] == 0xff)
+        memmove(pmadapter, pmpriv->curr_addr, hw_spec->permanent_addr,
+                MLAN_MAC_ADDR_LENGTH);
+
+    pmadapter->hw_dot_11n_dev_cap = wlan_le32_to_cpu(hw_spec->dot_11n_dev_cap);
+    pmadapter->usr_dot_11n_dev_cap = pmadapter->hw_dot_11n_dev_cap &
+        DEFAULT_11N_CAP_MASK;
+    pmadapter->usr_dev_mcs_support = pmadapter->hw_dev_mcs_support =
+        hw_spec->dev_mcs_support;
+    wlan_show_dot11ndevcap(pmadapter, pmadapter->hw_dot_11n_dev_cap);
+    wlan_show_devmcssupport(pmadapter, pmadapter->hw_dev_mcs_support);
+
+    pmadapter->max_mgmt_ie_index = wlan_le16_to_cpu(hw_spec->mgmt_buf_count);
+    PRINTM(MINFO, "GET_HW_SPEC: mgmt IE count=%d\n",
+           pmadapter->max_mgmt_ie_index);
+    if (!pmadapter->max_mgmt_ie_index)
+        pmadapter->max_mgmt_ie_index = MAX_MGMT_IE_INDEX;
+
+#if defined(STA_SUPPORT)
+    pmadapter->region_code = wlan_le16_to_cpu(hw_spec->region_code);
+    for (i = 0; i < MRVDRV_MAX_REGION_CODE; i++) {
+        /* Use the region code to search for the index */
+        if (pmadapter->region_code == region_code_index[i])
+            break;
+    }
+    /* If it's unidentified region code, use the default */
+    if (i >= MRVDRV_MAX_REGION_CODE) {
+        pmadapter->region_code = MRVDRV_DEFAULT_REGION_CODE;
+        PRINTM(MWARN, "unidentified region code, use the default (0x%02x)\n",
+               MRVDRV_DEFAULT_REGION_CODE);
+    }
+
+    if (wlan_set_regiontable(pmpriv, (t_u8) pmadapter->region_code,
+                             pmadapter->fw_bands)) {
+        if (pioctl_req)
+            pioctl_req->status_code = MLAN_ERROR_CMD_SCAN_FAIL;
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+#endif
+#ifdef STA_SUPPORT
+    if (wlan_11d_set_universaltable(pmpriv, pmadapter->fw_bands)) {
+        if (pioctl_req)
+            pioctl_req->status_code = MLAN_ERROR_CMD_SCAN_FAIL;
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+#endif /* STA_SUPPORT */
+
+#if defined(STA_SUPPORT)
+  done:
+#endif
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief This function prepares command of radio_control.
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action   The action: GET or SET
+ *  @param pdata_buf    A pointer to data buffer
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_cmd_802_11_radio_control(IN pmlan_private pmpriv,
+                              IN HostCmd_DS_COMMAND * cmd,
+                              IN t_u16 cmd_action, IN t_void * pdata_buf)
+{
+    HostCmd_DS_802_11_RADIO_CONTROL *pradio_control = &cmd->params.radio;
+    t_u32 radio_ctl;
+    ENTER();
+    cmd->size = wlan_cpu_to_le16((sizeof(HostCmd_DS_802_11_RADIO_CONTROL))
+                                 + S_DS_GEN);
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_802_11_RADIO_CONTROL);
+    pradio_control->action = wlan_cpu_to_le16(cmd_action);
+    memcpy(pmpriv->adapter, &radio_ctl, pdata_buf, sizeof(t_u32));
+    pradio_control->control = wlan_cpu_to_le16((t_u16) radio_ctl);
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function handles the command response of radio_control
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure 
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_ret_802_11_radio_control(IN pmlan_private pmpriv,
+                              IN HostCmd_DS_COMMAND * resp,
+                              IN mlan_ioctl_req * pioctl_buf)
+{
+    HostCmd_DS_802_11_RADIO_CONTROL *pradio_ctrl =
+        (HostCmd_DS_802_11_RADIO_CONTROL *) & resp->params.radio;
+    mlan_ds_radio_cfg *radio_cfg = MNULL;
+    mlan_adapter *pmadapter = pmpriv->adapter;
+
+    ENTER();
+    pmadapter->radio_on = wlan_le16_to_cpu(pradio_ctrl->control);
+    if (pioctl_buf) {
+        radio_cfg = (mlan_ds_radio_cfg *) pioctl_buf->pbuf;
+        radio_cfg->param.radio_on_off = (t_u32) pmadapter->radio_on;
+        pioctl_buf->data_read_written = sizeof(mlan_ds_radio_cfg);
+    }
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_decl.h linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_decl.h
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_decl.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_decl.h	2017-09-23 03:42:50.102674807 +0800
@@ -0,0 +1,812 @@
+/** @file mlan_decl.h
+ *
+ *  @brief This file declares the generic data structures and APIs.
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/******************************************************
+Change log:
+    11/07/2008: initial version
+******************************************************/
+
+#ifndef _MLAN_DECL_H_
+#define _MLAN_DECL_H_
+
+/** MLAN release version */
+#define MLAN_RELEASE_VERSION		"205.p5"
+
+/** Re-define generic data types for MLAN/MOAL */
+/** Signed char (1-byte) */
+typedef char t_s8;
+/** Unsigned char (1-byte) */
+typedef unsigned char t_u8;
+/** Signed short (2-bytes) */
+typedef short t_s16;
+/** Unsigned short (2-bytes) */
+typedef unsigned short t_u16;
+/** Signed long (4-bytes) */
+typedef long t_s32;
+/** Unsigned long (4-bytes) */
+typedef unsigned long t_u32;
+/** Signed long long 8-bytes) */
+typedef long long t_s64;
+/** Unsigned long long 8-bytes) */
+typedef unsigned long long t_u64;
+/** Void pointer (4-bytes) */
+typedef void t_void;
+/** Size type */
+typedef t_u32 t_size;
+/** Boolean type */
+typedef t_u8 t_bool;
+
+#ifdef MLAN_64BIT
+/** Pointer type (64-bit) */
+typedef t_u64 t_ptr;
+/** Signed value (64-bit) */
+typedef t_s64 t_sval;
+#else
+/** Pointer type (32-bit) */
+typedef t_u32 t_ptr;
+/** Signed value (32-bit) */
+typedef t_s32 t_sval;
+#endif
+
+/** Constants below */
+
+#ifdef __GNUC__
+/** Structure packing begins */
+#define MLAN_PACK_START
+/** Structure packeing end */
+#define MLAN_PACK_END  __attribute__ ((packed))
+#else /* !__GNUC__ */
+#ifdef PRAGMA_PACK
+/** Structure packing begins */
+#define MLAN_PACK_START
+/** Structure packeing end */
+#define MLAN_PACK_END
+#else /* !PRAGMA_PACK */
+/** Structure packing begins */
+#define MLAN_PACK_START   __packed
+/** Structure packing end */
+#define MLAN_PACK_END
+#endif /* PRAGMA_PACK */
+#endif /* __GNUC__ */
+
+#ifndef INLINE
+#ifdef __GNUC__
+/** inline directive */
+#define	INLINE	inline
+#else
+/** inline directive */
+#define	INLINE	__inline
+#endif
+#endif
+
+/** MLAN TRUE */
+#define MTRUE                    (1)
+/** MLAN FALSE */
+#define MFALSE                   (0)
+
+/** Macros for Data Alignment : size */
+#define ALIGN_SZ(p, a)	\
+	(((p) + ((a) - 1)) & ~((a) - 1))
+
+/** Macros for Data Alignment : address */
+#define ALIGN_ADDR(p, a)    \
+    ((((t_ptr)(p)) + (((t_ptr)(a)) - 1)) & ~(((t_ptr)(a)) - 1))
+
+/** Return the byte offset of a field in the given structure */
+#define MLAN_FIELD_OFFSET(type, field) ((t_u32)(t_ptr)&(((type *)0)->field))
+/** Return aligned offset */
+#define OFFSET_ALIGN_ADDR(p, a) (t_u32)(ALIGN_ADDR(p, a) - (t_ptr)p)
+
+#if defined(WFD_SUPPORT)
+/** Maximum BSS numbers */
+#define MLAN_MAX_BSS_NUM         (16)
+#else
+/** Maximum BSS numbers */
+#define MLAN_MAX_BSS_NUM         (2)
+#endif
+
+/** NET IP alignment */
+#define MLAN_NET_IP_ALIGN        0
+
+/** DMA alignment */
+#define DMA_ALIGNMENT            64
+/** max size of TxPD */
+#define MAX_TXPD_SIZE            32
+
+/** Minimum data header length */
+#define MLAN_MIN_DATA_HEADER_LEN (DMA_ALIGNMENT+MAX_TXPD_SIZE)
+
+/** rx data header length */
+#define MLAN_RX_HEADER_LEN       MLAN_MIN_DATA_HEADER_LEN
+
+/** This is current limit on Maximum Tx AMPDU allowed */
+#define MLAN_MAX_TX_BASTREAM_SUPPORTED     2
+/** This is current limit on Maximum Rx AMPDU allowed */
+#define MLAN_MAX_RX_BASTREAM_SUPPORTED     16
+
+/** Default Win size attached during ADDBA request */
+#define MLAN_AMPDU_DEF_TXWINSIZE        32
+/** Default Win size attached during ADDBA response */
+#define MLAN_AMPDU_DEF_RXWINSIZE        16
+/** Block ack timeout value */
+#define MLAN_DEFAULT_BLOCK_ACK_TIMEOUT  0xffff
+/** Maximum Tx Win size configured for ADDBA request [10 bits] */
+#define MLAN_AMPDU_MAX_TXWINSIZE        0x3ff
+/** Maximum Rx Win size configured for ADDBA request [10 bits] */
+#define MLAN_AMPDU_MAX_RXWINSIZE        0x3ff
+
+/** Rate index for HR/DSSS 0 */
+#define MLAN_RATE_INDEX_HRDSSS0 0
+/** Rate index for HR/DSSS 3 */
+#define MLAN_RATE_INDEX_HRDSSS3 3
+/** Rate index for OFDM 0 */
+#define MLAN_RATE_INDEX_OFDM0   4
+/** Rate index for OFDM 7 */
+#define MLAN_RATE_INDEX_OFDM7   11
+/** Rate index for MCS 0 */
+#define MLAN_RATE_INDEX_MCS0    12
+/** Rate index for MCS 7 */
+#define MLAN_RATE_INDEX_MCS7    19
+/** Rate index for MCS 32 */
+#define MLAN_RATE_INDEX_MCS32   44
+/** Rate index for MCS 127 */
+#define MLAN_RATE_INDEX_MCS127  139
+
+/** Rate bitmap for OFDM 0 */
+#define MLAN_RATE_BITMAP_OFDM0  16
+/** Rate bitmap for OFDM 7 */
+#define MLAN_RATE_BITMAP_OFDM7  23
+/** Rate bitmap for MCS 0 */
+#define MLAN_RATE_BITMAP_MCS0   32
+/** Rate bitmap for MCS 127 */
+#define MLAN_RATE_BITMAP_MCS127 159
+
+/** Size of rx data buffer */
+#define MLAN_RX_DATA_BUF_SIZE     (4 * 1024)
+/** Size of rx command buffer */
+#define MLAN_RX_CMD_BUF_SIZE      (2 * 1024)
+
+/** MLAN MAC Address Length */
+#define MLAN_MAC_ADDR_LENGTH     (6)
+/** MLAN 802.11 MAC Address */
+typedef t_u8 mlan_802_11_mac_addr[MLAN_MAC_ADDR_LENGTH];
+
+/** MLAN Maximum SSID Length */
+#define MLAN_MAX_SSID_LENGTH     (32)
+
+/** RTS/FRAG related defines */
+/** Minimum RTS value */
+#define MLAN_RTS_MIN_VALUE              (0)
+/** Maximum RTS value */
+#define MLAN_RTS_MAX_VALUE              (2347)
+/** Minimum FRAG value */
+#define MLAN_FRAG_MIN_VALUE             (256)
+/** Maximum FRAG value */
+#define MLAN_FRAG_MAX_VALUE             (2346)
+
+/** Minimum tx retry count */
+#define MLAN_TX_RETRY_MIN 		(0)
+/** Maximum tx retry count */
+#define MLAN_TX_RETRY_MAX 		(14)
+
+/** IN parameter */
+#define IN
+/** OUT parameter */
+#define OUT
+
+/** BIT value */
+#define MBIT(x)    (((t_u32)1) << (x))
+
+/** Buffer flag for requeued packet */
+#define MLAN_BUF_FLAG_REQUEUED_PKT      MBIT(0)
+/** Buffer flag for transmit buf from moal */
+#define MLAN_BUF_FLAG_MOAL_TX_BUF        MBIT(1)
+/** Buffer flag for malloc mlan_buffer */
+#define MLAN_BUF_FLAG_MALLOC_BUF        MBIT(2)
+
+/** Buffer flag for bridge packet */
+#define MLAN_BUF_FLAG_BRIDGE_BUF        MBIT(3)
+
+#ifdef DEBUG_LEVEL1
+/** Debug level bit definition */
+#define	MMSG        MBIT(0)
+#define MFATAL      MBIT(1)
+#define MERROR      MBIT(2)
+#define MDATA       MBIT(3)
+#define MCMND       MBIT(4)
+#define MEVENT      MBIT(5)
+#define MINTR       MBIT(6)
+#define MIOCTL      MBIT(7)
+
+#define MDAT_D      MBIT(16)
+#define MCMD_D      MBIT(17)
+#define MEVT_D      MBIT(18)
+#define MFW_D       MBIT(19)
+#define MIF_D       MBIT(20)
+
+#define MENTRY      MBIT(28)
+#define MWARN       MBIT(29)
+#define MINFO       MBIT(30)
+#define MHEX_DUMP   MBIT(31)
+#endif /* DEBUG_LEVEL1 */
+
+/** Memory allocation type: DMA */
+#define	MLAN_MEM_DMA    MBIT(0)
+
+/** Default memory allocation flag */
+#define MLAN_MEM_DEF    0
+
+/** mlan_status */
+typedef enum _mlan_status
+{
+    MLAN_STATUS_FAILURE = 0xffffffff,
+    MLAN_STATUS_SUCCESS = 0,
+    MLAN_STATUS_PENDING,
+    MLAN_STATUS_RESOURCE,
+    /* Status pending and no resource */
+    MLAN_STATUS_PRESOURCE,
+} mlan_status;
+
+/** mlan_error_code */
+typedef enum _mlan_error_code
+{
+    /** No error */
+    MLAN_ERROR_NO_ERROR = 0,
+    /** Firmware/device errors below (MSB=0) */
+    MLAN_ERROR_FW_NOT_READY = 0x00000001,
+    MLAN_ERROR_FW_BUSY,
+    MLAN_ERROR_FW_CMDRESP,
+    MLAN_ERROR_DATA_TX_FAIL,
+    MLAN_ERROR_DATA_RX_FAIL,
+    /** Driver errors below (MSB=1) */
+    MLAN_ERROR_PKT_SIZE_INVALID = 0x80000001,
+    MLAN_ERROR_PKT_TIMEOUT,
+    MLAN_ERROR_PKT_INVALID,
+    MLAN_ERROR_CMD_INVALID,
+    MLAN_ERROR_CMD_TIMEOUT,
+    MLAN_ERROR_CMD_DNLD_FAIL,
+    MLAN_ERROR_CMD_CANCEL,
+    MLAN_ERROR_CMD_RESP_FAIL,
+    MLAN_ERROR_CMD_ASSOC_FAIL,
+    MLAN_ERROR_CMD_SCAN_FAIL,
+    MLAN_ERROR_IOCTL_INVALID,
+    MLAN_ERROR_IOCTL_FAIL,
+    MLAN_ERROR_EVENT_UNKNOWN,
+    MLAN_ERROR_INVALID_PARAMETER,
+    MLAN_ERROR_NO_MEM,
+    /** More to add */
+} mlan_error_code;
+
+/** mlan_buf_type */
+typedef enum _mlan_buf_type
+{
+    MLAN_BUF_TYPE_CMD = 1,
+    MLAN_BUF_TYPE_DATA,
+    MLAN_BUF_TYPE_EVENT,
+} mlan_buf_type;
+
+/** mlan_usb_ep */
+typedef enum _mlan_usb_ep
+{
+    MLAN_USB_EP_CTRL = 0,
+    MLAN_USB_EP_CMD_EVENT = 1,
+    MLAN_USB_EP_DATA = 2,
+} mlan_usb_ep;
+
+/** MLAN BSS type */
+typedef enum _mlan_bss_type
+{
+    MLAN_BSS_TYPE_STA = 0,
+    MLAN_BSS_TYPE_UAP = 1,
+#ifdef WFD_SUPPORT
+    MLAN_BSS_TYPE_WFD = 2,
+#endif
+    MLAN_BSS_TYPE_ANY = 0xff,
+} mlan_bss_type;
+
+/** MLAN BSS role */
+typedef enum _mlan_bss_role
+{
+    MLAN_BSS_ROLE_STA = 0,
+    MLAN_BSS_ROLE_UAP = 1,
+    MLAN_BSS_ROLE_ANY = 0xff,
+} mlan_bss_role;
+
+/** BSS role bit mask */
+#define BSS_ROLE_BIT_MASK    MBIT(0)
+
+/** Get BSS role */
+#define GET_BSS_ROLE(priv)   ((priv)->bss_role & BSS_ROLE_BIT_MASK)
+
+/** mlan_data_frame_type */
+typedef enum _mlan_data_frame_type
+{
+    MLAN_DATA_FRAME_TYPE_ETH_II = 0,
+    MLAN_DATA_FRAME_TYPE_802_11,
+} mlan_data_frame_type;
+
+/** mlan_event_id */
+typedef enum _mlan_event_id
+{
+    /* Event generated by firmware (MSB=0) */
+    MLAN_EVENT_ID_FW_UNKNOWN = 0x00000001,
+    MLAN_EVENT_ID_FW_ADHOC_LINK_SENSED,
+    MLAN_EVENT_ID_FW_ADHOC_LINK_LOST,
+    MLAN_EVENT_ID_FW_DISCONNECTED,
+    MLAN_EVENT_ID_FW_MIC_ERR_UNI,
+    MLAN_EVENT_ID_FW_MIC_ERR_MUL,
+    MLAN_EVENT_ID_FW_BCN_RSSI_LOW,
+    MLAN_EVENT_ID_FW_BCN_RSSI_HIGH,
+    MLAN_EVENT_ID_FW_BCN_SNR_LOW,
+    MLAN_EVENT_ID_FW_BCN_SNR_HIGH,
+    MLAN_EVENT_ID_FW_MAX_FAIL,
+    MLAN_EVENT_ID_FW_DATA_RSSI_LOW,
+    MLAN_EVENT_ID_FW_DATA_RSSI_HIGH,
+    MLAN_EVENT_ID_FW_DATA_SNR_LOW,
+    MLAN_EVENT_ID_FW_DATA_SNR_HIGH,
+    MLAN_EVENT_ID_FW_LINK_QUALITY,
+    MLAN_EVENT_ID_FW_PORT_RELEASE,
+    MLAN_EVENT_ID_FW_PRE_BCN_LOST,
+    MLAN_EVENT_ID_FW_WMM_CONFIG_CHANGE,
+    MLAN_EVENT_ID_FW_HS_WAKEUP,
+    MLAN_EVENT_ID_FW_HEART_BEAT,
+    MLAN_EVENT_ID_FW_WEP_ICV_ERR,
+    MLAN_EVENT_ID_FW_STOP_TX,
+    MLAN_EVENT_ID_FW_START_TX,
+    MLAN_EVENT_ID_FW_CHANNEL_SWITCH_ANN,
+    MLAN_EVENT_ID_FW_BW_CHANGED,
+#ifdef UAP_SUPPORT
+    MLAN_EVENT_ID_UAP_FW_BSS_START,
+    MLAN_EVENT_ID_UAP_FW_BSS_ACTIVE,
+    MLAN_EVENT_ID_UAP_FW_BSS_IDLE,
+    MLAN_EVENT_ID_UAP_FW_STA_CONNECT,
+    MLAN_EVENT_ID_UAP_FW_STA_DISCONNECT,
+#endif
+    /* Event generated by MLAN driver (MSB=1) */
+    MLAN_EVENT_ID_DRV_CONNECTED = 0x80000001,
+    MLAN_EVENT_ID_DRV_DEFER_HANDLING,
+    MLAN_EVENT_ID_DRV_HS_ACTIVATED,
+    MLAN_EVENT_ID_DRV_HS_DEACTIVATED,
+#ifdef UAP_SUPPORT
+    MLAN_EVENT_ID_DRV_MGMT_FRAME,
+#endif
+    MLAN_EVENT_ID_DRV_OBSS_SCAN_PARAM,
+    MLAN_EVENT_ID_DRV_PASSTHRU,
+    MLAN_EVENT_ID_DRV_SCAN_REPORT,
+    MLAN_EVENT_ID_DRV_MEAS_REPORT,
+    MLAN_EVENT_ID_DRV_REPORT_STRING,
+} mlan_event_id;
+
+/** Data Structures */
+/** mlan_image data structure */
+typedef struct _mlan_fw_image
+{
+    /** Helper image buffer pointer */
+    t_u8 *phelper_buf;
+    /** Helper image length */
+    t_u32 helper_len;
+    /** Firmware image buffer pointer */
+    t_u8 *pfw_buf;
+    /** Firmware image length */
+    t_u32 fw_len;
+} mlan_fw_image, *pmlan_fw_image;
+
+/** Custom data structure */
+typedef struct _mlan_init_param
+{
+    /** Cal data buffer pointer */
+    t_u8 *pcal_data_buf;
+    /** Cal data length */
+    t_u32 cal_data_len;
+    /** Other custom data */
+} mlan_init_param, *pmlan_init_param;
+
+/** mlan_event data structure */
+typedef struct _mlan_event
+{
+    /** BSS index number for multiple BSS support */
+    t_u32 bss_index;
+    /** Event ID */
+    mlan_event_id event_id;
+    /** Event length */
+    t_u32 event_len;
+    /** Event buffer */
+    t_u8 event_buf[1];
+} mlan_event, *pmlan_event;
+
+/** mlan_ioctl_req data structure */
+typedef struct _mlan_ioctl_req
+{
+    /** Status code from firmware/driver */
+    t_u32 status_code;
+    /** BSS index number for multiple BSS support */
+    t_u32 bss_index;
+    /** Request id */
+    t_u32 req_id;
+    /** Action: set or get */
+    t_u32 action;
+    /** Pointer to buffer */
+    t_u8 *pbuf;
+    /** Length of buffer */
+    t_u32 buf_len;
+    /** Length of the data read/written in buffer */
+    t_u32 data_read_written;
+    /** Length of buffer needed */
+    t_u32 buf_len_needed;
+    /** Reserved for MOAL module */
+    t_ptr reserved_1;
+} mlan_ioctl_req, *pmlan_ioctl_req;
+
+/** mlan_buffer data structure */
+typedef struct _mlan_buffer
+{
+    /** Pointer to previous mlan_buffer */
+    struct _mlan_buffer *pprev;
+    /** Pointer to next mlan_buffer */
+    struct _mlan_buffer *pnext;
+    /** Status code from firmware/driver */
+    t_u32 status_code;
+    /** Flags for this buffer */
+    t_u32 flags;
+    /** BSS index number for multiple BSS support */
+    t_u32 bss_index;
+    /** Buffer descriptor, e.g. skb in Linux */
+    t_void *pdesc;
+    /** Pointer to buffer */
+    t_u8 *pbuf;
+    /** Offset to data */
+    t_u32 data_offset;
+    /** Data length */
+    t_u32 data_len;
+    /** Buffer type: data, cmd, event etc. */
+    mlan_buf_type buf_type;
+
+    /** Fields below are valid for data packet only */
+    /** QoS priority */
+    t_u32 priority;
+    /** Time stamp when packet is received (seconds) */
+    t_u32 in_ts_sec;
+    /** Time stamp when packet is received (micro seconds) */
+    t_u32 in_ts_usec;
+    /** Time stamp when packet is processed (seconds) */
+    t_u32 out_ts_sec;
+    /** Time stamp when packet is processed (micro seconds) */
+    t_u32 out_ts_usec;
+
+    /** Fields below are valid for MLAN module only */
+    /** Pointer to parent mlan_buffer */
+    struct _mlan_buffer *pparent;
+    /** Use count for this buffer */
+    t_u32 use_count;
+} mlan_buffer, *pmlan_buffer;
+
+/** mlan_bss_attr data structure */
+typedef struct _mlan_bss_attr
+{
+    /** BSS type */
+    t_u32 bss_type;
+    /** Data frame type: Ethernet II, 802.11, etc. */
+    t_u32 frame_type;
+    /** The BSS is active (non-0) or not (0). */
+    t_u32 active;
+    /** BSS Priority */
+    t_u32 bss_priority;
+    /** BSS number */
+    t_u32 bss_num;
+} mlan_bss_attr, *pmlan_bss_attr;
+
+#ifdef PRAGMA_PACK
+#pragma pack(push, 1)
+#endif
+
+/** Type enumeration for the command result */
+typedef MLAN_PACK_START enum _mlan_cmd_result_e
+{
+    MLAN_CMD_RESULT_SUCCESS = 0,
+    MLAN_CMD_RESULT_FAILURE = 1,
+    MLAN_CMD_RESULT_TIMEOUT = 2,
+    MLAN_CMD_RESULT_INVALID_DATA = 3
+} MLAN_PACK_END mlan_cmd_result_e;
+
+/** Type enumeration of WMM AC_QUEUES */
+typedef MLAN_PACK_START enum _mlan_wmm_ac_e
+{
+    WMM_AC_BK,
+    WMM_AC_BE,
+    WMM_AC_VI,
+    WMM_AC_VO
+} MLAN_PACK_END mlan_wmm_ac_e;
+
+/** Type enumeration for the action field in the Queue Config command */
+typedef MLAN_PACK_START enum _mlan_wmm_queue_config_action_e
+{
+    MLAN_WMM_QUEUE_CONFIG_ACTION_GET = 0,
+    MLAN_WMM_QUEUE_CONFIG_ACTION_SET = 1,
+    MLAN_WMM_QUEUE_CONFIG_ACTION_DEFAULT = 2,
+    MLAN_WMM_QUEUE_CONFIG_ACTION_MAX
+} MLAN_PACK_END mlan_wmm_queue_config_action_e;
+
+/** Type enumeration for the action field in the queue stats command */
+typedef MLAN_PACK_START enum _mlan_wmm_queue_stats_action_e
+{
+    MLAN_WMM_STATS_ACTION_START = 0,
+    MLAN_WMM_STATS_ACTION_STOP = 1,
+    MLAN_WMM_STATS_ACTION_GET_CLR = 2,
+    MLAN_WMM_STATS_ACTION_SET_CFG = 3,  /* Not currently used */
+    MLAN_WMM_STATS_ACTION_GET_CFG = 4,  /* Not currently used */
+    MLAN_WMM_STATS_ACTION_MAX
+} MLAN_PACK_END mlan_wmm_queue_stats_action_e;
+
+/**
+ *  @brief IOCTL structure for a Traffic stream status.
+ *
+ */
+typedef MLAN_PACK_START struct
+{
+    /** TSID: Range: 0->7 */
+    t_u8 tid;
+    /** TSID specified is valid */
+    t_u8 valid;
+    /** AC TSID is active on */
+    t_u8 access_category;
+    /** UP specified for the TSID */
+    t_u8 user_priority;
+    /** Power save mode for TSID: 0 (legacy), 1 (UAPSD) */
+    t_u8 psb;
+    /** Upstream(0), Downlink(1), Bidirectional(3) */
+    t_u8 flow_dir;
+    /** Medium time granted for the TSID */
+    t_u16 medium_time;
+} MLAN_PACK_END wlan_ioctl_wmm_ts_status_t,
+/** Type definition of mlan_ds_wmm_ts_status for MLAN_OID_WMM_CFG_TS_STATUS */
+  mlan_ds_wmm_ts_status, *pmlan_ds_wmm_ts_status;
+
+/** Max Ie length */
+#define MAX_IE_SIZE             256
+
+/** custom IE */
+typedef MLAN_PACK_START struct _custom_ie
+{
+    /** IE Index */
+    t_u16 ie_index;
+    /** Mgmt Subtype Mask */
+    t_u16 mgmt_subtype_mask;
+    /** IE Length */
+    t_u16 ie_length;
+    /** IE buffer */
+    t_u8 ie_buffer[MAX_IE_SIZE];
+} MLAN_PACK_END custom_ie;
+
+/** Max IE index per BSS */
+#define MAX_MGMT_IE_INDEX               12
+
+/** TLV buffer : custom IE */
+typedef MLAN_PACK_START struct _tlvbuf_custom_ie
+{
+    /** Type */
+    t_u16 type;
+    /** Length */
+    t_u16 len;
+    /** IE data */
+    custom_ie ie_data_list[MAX_MGMT_IE_INDEX];
+} MLAN_PACK_END mlan_ds_misc_custom_ie;
+
+#ifdef PRAGMA_PACK
+#pragma pack(pop)
+#endif
+
+/** mlan_callbacks data structure */
+typedef struct _mlan_callbacks
+{
+    /** moal_get_fw_data */
+    mlan_status(*moal_get_fw_data) (IN t_void * pmoal_handle,
+                                    IN t_u32 offset,
+                                    IN t_u32 len, OUT t_u8 * pbuf);
+    /** moal_init_fw_complete */
+    mlan_status(*moal_init_fw_complete) (IN t_void * pmoal_handle,
+                                         IN mlan_status status);
+    /** moal_shutdown_fw_complete */
+    mlan_status(*moal_shutdown_fw_complete) (IN t_void * pmoal_handle,
+                                             IN mlan_status status);
+    /** moal_send_packet_complete */
+    mlan_status(*moal_send_packet_complete) (IN t_void * pmoal_handle,
+                                             IN pmlan_buffer pmbuf,
+                                             IN mlan_status status);
+    /** moal_recv_complete */
+    mlan_status(*moal_recv_complete) (IN t_void * pmoal_handle,
+                                      IN pmlan_buffer pmbuf,
+                                      IN t_u32 port, IN mlan_status status);
+    /** moal_recv_packet */
+    mlan_status(*moal_recv_packet) (IN t_void * pmoal_handle,
+                                    IN pmlan_buffer pmbuf);
+    /** moal_recv_event */
+    mlan_status(*moal_recv_event) (IN t_void * pmoal_handle,
+                                   IN pmlan_event pmevent);
+    /** moal_ioctl_complete */
+    mlan_status(*moal_ioctl_complete) (IN t_void * pmoal_handle,
+                                       IN pmlan_ioctl_req pioctl_req,
+                                       IN mlan_status status);
+    /** moal_alloc_mlan_buffer */
+    mlan_status(*moal_alloc_mlan_buffer) (IN t_void * pmoal_handle,
+                                          IN t_u32 size,
+                                          OUT pmlan_buffer * pmbuf);
+    /** moal_free_mlan_buffer */
+    mlan_status(*moal_free_mlan_buffer) (IN t_void * pmoal_handle,
+                                         IN pmlan_buffer pmbuf);
+    /** moal_write_data_async */
+    mlan_status(*moal_write_data_async) (IN t_void * pmoal_handle,
+                                         IN pmlan_buffer pmbuf, IN t_u32 port);
+    /** moal_write_data_sync */
+    mlan_status(*moal_write_data_sync) (IN t_void * pmoal_handle,
+                                        IN pmlan_buffer pmbuf,
+                                        IN t_u32 port, IN t_u32 timeout);
+    /** moal_read_data_sync */
+    mlan_status(*moal_read_data_sync) (IN t_void * pmoal_handle,
+                                       IN OUT pmlan_buffer pmbuf,
+                                       IN t_u32 port, IN t_u32 timeout);
+    /** moal_malloc */
+    mlan_status(*moal_malloc) (IN t_void * pmoal_handle,
+                               IN t_u32 size, IN t_u32 flag, OUT t_u8 ** ppbuf);
+    /** moal_mfree */
+    mlan_status(*moal_mfree) (IN t_void * pmoal_handle, IN t_u8 * pbuf);
+    /** moal_memset */
+    t_void *(*moal_memset) (IN t_void * pmoal_handle,
+                            IN t_void * pmem, IN t_u8 byte, IN t_u32 num);
+    /** moal_memcpy */
+    t_void *(*moal_memcpy) (IN t_void * pmoal_handle,
+                            IN t_void * pdest,
+                            IN const t_void * psrc, IN t_u32 num);
+    /** moal_memmove */
+    t_void *(*moal_memmove) (IN t_void * pmoal_handle,
+                             IN t_void * pdest,
+                             IN const t_void * psrc, IN t_u32 num);
+    /** moal_memcmp */
+      t_s32(*moal_memcmp) (IN t_void * pmoal_handle,
+                           IN const t_void * pmem1,
+                           IN const t_void * pmem2, IN t_u32 num);
+    /** moal_udelay */
+      t_void(*moal_udelay) (IN t_void * pmoal_handle, IN t_u32 udelay);
+    /** moal_get_system_time */
+      mlan_status(*moal_get_system_time) (IN t_void * pmoal_handle,
+                                          OUT t_u32 * psec, OUT t_u32 * pusec);
+    /** moal_init_timer*/
+      mlan_status(*moal_init_timer) (IN t_void * pmoal_handle,
+                                     OUT t_void ** pptimer,
+                                     IN t_void(*callback) (t_void * pcontext),
+                                     IN t_void * pcontext);
+    /** moal_free_timer */
+      mlan_status(*moal_free_timer) (IN t_void * pmoal_handle,
+                                     IN t_void * ptimer);
+    /** moal_start_timer*/
+      mlan_status(*moal_start_timer) (IN t_void * pmoal_handle,
+                                      IN t_void * ptimer,
+                                      IN t_u8 periodic, IN t_u32 msec);
+    /** moal_stop_timer*/
+      mlan_status(*moal_stop_timer) (IN t_void * pmoal_handle,
+                                     IN t_void * ptimer);
+    /** moal_init_lock */
+      mlan_status(*moal_init_lock) (IN t_void * pmoal_handle,
+                                    OUT t_void ** pplock);
+    /** moal_free_lock */
+      mlan_status(*moal_free_lock) (IN t_void * pmoal_handle,
+                                    IN t_void * plock);
+    /** moal_spin_lock */
+      mlan_status(*moal_spin_lock) (IN t_void * pmoal_handle,
+                                    IN t_void * plock);
+    /** moal_spin_unlock */
+      mlan_status(*moal_spin_unlock) (IN t_void * pmoal_handle,
+                                      IN t_void * plock);
+    /** moal_print */
+      t_void(*moal_print) (IN t_void * pmoal_handle,
+                           IN t_u32 level, IN t_s8 * pformat, IN ...);
+    /** moal_assert */
+      t_void(*moal_assert) (IN t_void * pmoal_handle, IN t_u32 cond);
+} mlan_callbacks, *pmlan_callbacks;
+
+/** Parameter unchanged, use MLAN default setting */
+#define MLAN_INIT_PARA_UNCHANGED     0
+/** Parameter enabled, override MLAN default setting */
+#define MLAN_INIT_PARA_ENABLED       1
+/** Parameter disabled, override MLAN default setting */
+#define MLAN_INIT_PARA_DISABLED      2
+
+/** mlan_device data structure */
+typedef struct _mlan_device
+{
+    /** MOAL Handle */
+    t_void *pmoal_handle;
+    /** BSS Attributes */
+    mlan_bss_attr bss_attr[MLAN_MAX_BSS_NUM];
+    /** Callbacks */
+    mlan_callbacks callbacks;
+#ifdef MFG_CMD_SUPPORT
+    /** MFG mode */
+    t_u32 mfg_mode;
+#endif
+    /** IEEE PS mode */
+    t_u32 ps_mode;
+    /** Max Tx buffer size */
+    t_u32 max_tx_buf;
+#if defined(STA_SUPPORT)
+    /** 802.11d configuration */
+    t_u32 cfg_11d;
+#endif
+} mlan_device, *pmlan_device;
+
+/** MLAN API function prototype */
+#define MLAN_API
+
+/** Registration */
+MLAN_API mlan_status mlan_register(IN pmlan_device pmdevice,
+                                   OUT t_void ** ppmlan_adapter);
+
+/** Un-registration */
+MLAN_API mlan_status mlan_unregister(IN t_void * pmlan_adapter);
+
+/** Firmware Downloading */
+MLAN_API mlan_status mlan_dnld_fw(IN t_void * pmlan_adapter,
+                                  IN pmlan_fw_image pmfw);
+
+/** Custom data pass API */
+MLAN_API mlan_status mlan_set_init_param(IN t_void * pmlan_adapter,
+                                         IN pmlan_init_param pparam);
+
+/** Firmware Initialization */
+MLAN_API mlan_status mlan_init_fw(IN t_void * pmlan_adapter);
+
+/** Firmware Shutdown */
+MLAN_API mlan_status mlan_shutdown_fw(IN t_void * pmlan_adapter);
+
+/** Main Process */
+MLAN_API mlan_status mlan_main_process(IN t_void * pmlan_adapter);
+
+/** Packet Transmission */
+MLAN_API mlan_status mlan_send_packet(IN t_void * pmlan_adapter,
+                                      IN pmlan_buffer pmbuf);
+
+/** mlan_write_data_async_complete */
+MLAN_API mlan_status mlan_write_data_async_complete(IN t_void * pmlan_adapter,
+                                                    IN pmlan_buffer pmbuf,
+                                                    IN t_u32 port,
+                                                    IN mlan_status status);
+
+/** Packet Reception */
+MLAN_API mlan_status mlan_recv(IN t_void * pmlan_adapter,
+                               IN pmlan_buffer pmbuf, IN t_u32 port);
+
+/** Packet Reception complete callback */
+MLAN_API mlan_status mlan_recv_packet_complete(IN t_void * pmlan_adapter,
+                                               IN pmlan_buffer pmbuf,
+                                               IN mlan_status status);
+
+/** mlan ioctl */
+MLAN_API mlan_status mlan_ioctl(IN t_void * pmlan_adapter,
+                                IN pmlan_ioctl_req pioctl_req);
+/** mlan select wmm queue */
+MLAN_API t_u8 mlan_select_wmm_queue(IN t_void * pmlan_adapter,
+                                    IN t_u8 bss_num, IN t_u8 tid);
+#endif /* !_MLAN_DECL_H_ */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_fw.h linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_fw.h
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_fw.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_fw.h	2017-09-23 03:42:50.110674783 +0800
@@ -0,0 +1,4226 @@
+/** @file mlan_fw.h
+ *
+ *  @brief This file contains firmware specific defines.
+ *  structures and declares global function prototypes used
+ *  in MLAN module.
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/******************************************************
+Change log:
+    10/27/2008: initial version
+******************************************************/
+
+#ifndef _MLAN_FW_H_
+#define _MLAN_FW_H_
+
+/** Interface header length */
+#define INTF_HEADER_LEN      0
+
+/** Ethernet header */
+typedef struct
+{
+    /** Ethernet header destination address */
+    t_u8 dest_addr[MLAN_MAC_ADDR_LENGTH];
+    /** Ethernet header source address */
+    t_u8 src_addr[MLAN_MAC_ADDR_LENGTH];
+    /** Ethernet header length */
+    t_u16 h803_len;
+
+} Eth803Hdr_t;
+
+/** RFC 1042 header */
+typedef struct
+{
+    /** LLC DSAP */
+    t_u8 llc_dsap;
+    /** LLC SSAP */
+    t_u8 llc_ssap;
+    /** LLC CTRL */
+    t_u8 llc_ctrl;
+    /** SNAP OUI */
+    t_u8 snap_oui[3];
+    /** SNAP type */
+    t_u16 snap_type;
+
+} Rfc1042Hdr_t;
+
+#ifdef PRAGMA_PACK
+#pragma pack(push, 1)
+#endif
+
+/** Rx packet header */
+typedef MLAN_PACK_START struct
+{
+    /** Etherner header */
+    Eth803Hdr_t eth803_hdr;
+    /** RFC 1042 header */
+    Rfc1042Hdr_t rfc1042_hdr;
+
+} MLAN_PACK_END RxPacketHdr_t;
+
+/** Rates supported in band B */
+#define B_SUPPORTED_RATES               5
+/** Rates supported in band G */
+#define G_SUPPORTED_RATES               9
+/** Rates supported in band BG */
+#define BG_SUPPORTED_RATES              13
+
+/** Setup the number of rates passed in the driver/firmware API */
+#define A_SUPPORTED_RATES               9
+
+/** CapInfo Short Slot Time Disabled */
+//#define SHORT_SLOT_TIME_DISABLED(CapInfo) ((IEEEtypes_CapInfo_t)(CapInfo).short_slot_time = 0)
+#define SHORT_SLOT_TIME_DISABLED(CapInfo) (CapInfo &= ~MBIT(10))
+/** CapInfo Short Slot Time Enabled */
+#define SHORT_SLOT_TIME_ENABLED(CapInfo)  (CapInfo |= MBIT(10))
+
+/** Setup the number of rates passed in the driver/firmware API */
+#define HOSTCMD_SUPPORTED_RATES         14
+
+/** Rates supported in band N */
+#define N_SUPPORTED_RATES               3
+#ifdef STA_SUPPORT
+/** All bands (B, G, N) */
+#define ALL_802_11_BANDS           (BAND_A | BAND_B | BAND_G | BAND_GN)
+#else
+/** All bands (B, G, A) */
+#define ALL_802_11_BANDS        (BAND_B | BAND_G | BAND_A)
+#endif /* STA_SUPPORT */
+
+#ifdef STA_SUPPORT
+/** Firmware multiple bands support */
+#define FW_MULTI_BANDS_SUPPORT  (MBIT(8) | MBIT(9) | MBIT(10) | MBIT(11))
+#else
+/** Firmware multiple bands support */
+#define FW_MULTI_BANDS_SUPPORT  (MBIT(8) | MBIT(9) | MBIT(10))
+#endif /* STA_SUPPORT */
+/** Check if multiple bands support is enabled in firmware */
+#define IS_SUPPORT_MULTI_BANDS(_adapter)        \
+        (_adapter->fw_cap_info & FW_MULTI_BANDS_SUPPORT)
+/** Get default bands of the firmware */
+#define GET_FW_DEFAULT_BANDS(_adapter)  \
+        ((_adapter->fw_cap_info >> 8) & ALL_802_11_BANDS)
+
+extern t_u8 SupportedRates_B[B_SUPPORTED_RATES];
+extern t_u8 SupportedRates_G[G_SUPPORTED_RATES];
+extern t_u8 SupportedRates_BG[BG_SUPPORTED_RATES];
+extern t_u8 SupportedRates_A[A_SUPPORTED_RATES];
+extern t_u8 SupportedRates_N[N_SUPPORTED_RATES];
+extern t_u8 AdhocRates_G[G_SUPPORTED_RATES];
+extern t_u8 AdhocRates_B[B_SUPPORTED_RATES];
+extern t_u8 AdhocRates_BG[BG_SUPPORTED_RATES];
+extern t_u8 AdhocRates_A[A_SUPPORTED_RATES];
+
+/** Default power save mode */
+#define DEFAULT_PS_MODE                 Wlan802_11PowerModePSP
+
+/** WEP Key index mask */
+#define HostCmd_WEP_KEY_INDEX_MASK              0x3fff
+
+/** Key information enabled */
+#define KEY_INFO_ENABLED        0x01
+/** KEY_TYPE_ID */
+typedef enum _KEY_TYPE_ID
+{
+    /** Key type : WEP */
+    KEY_TYPE_ID_WEP = 0,
+    /** Key type : TKIP */
+    KEY_TYPE_ID_TKIP,
+    /** Key type : AES */
+    KEY_TYPE_ID_AES,
+    KEY_TYPE_ID_WAPI,
+} KEY_TYPE_ID;
+
+/** KEY_INFO_WEP*/
+typedef enum _KEY_INFO_WEP
+{
+    KEY_INFO_WEP_MCAST = 0x01,
+    KEY_INFO_WEP_UNICAST = 0x02,
+    KEY_INFO_WEP_ENABLED = 0x04
+} KEY_INFO_WEP;
+
+/** KEY_INFO_TKIP */
+typedef enum _KEY_INFO_TKIP
+{
+    KEY_INFO_TKIP_MCAST = 0x01,
+    KEY_INFO_TKIP_UNICAST = 0x02,
+    KEY_INFO_TKIP_ENABLED = 0x04
+} KEY_INFO_TKIP;
+
+/** KEY_INFO_AES*/
+typedef enum _KEY_INFO_AES
+{
+    KEY_INFO_AES_MCAST = 0x01,
+    KEY_INFO_AES_UNICAST = 0x02,
+    KEY_INFO_AES_ENABLED = 0x04
+} KEY_INFO_AES;
+
+/** WPA AES key length */
+#define WPA_AES_KEY_LEN                 16
+/** WPA TKIP key length */
+#define WPA_TKIP_KEY_LEN                32
+
+/** WAPI key length */
+#define WAPI_KEY_LEN            50
+/** KEY_INFO_WAPI*/
+typedef enum _KEY_INFO_WAPI
+{
+    KEY_INFO_WAPI_MCAST = 0x01,
+    KEY_INFO_WAPI_UNICAST = 0x02,
+    KEY_INFO_WAPI_ENABLED = 0x04
+} KEY_INFO_WAPI;
+
+/** Maximum ethernet frame length sans FCS */
+#define MV_ETH_FRAME_LEN   1514
+
+/** Enumeration definition*/
+/** WLAN_802_11_PRIVACY_FILTER */
+typedef enum _WLAN_802_11_PRIVACY_FILTER
+{
+    Wlan802_11PrivFilterAcceptAll,
+    Wlan802_11PrivFilter8021xWEP
+} WLAN_802_11_PRIVACY_FILTER;
+
+/** WLAN_802_11_WEP_STATUS */
+typedef enum _WLAN_802_11_WEP_STATUS
+{
+    Wlan802_11WEPEnabled,
+    Wlan802_11WEPDisabled,
+    Wlan802_11WEPKeyAbsent,
+    Wlan802_11WEPNotSupported
+} WLAN_802_11_WEP_STATUS;
+
+/** SNR calculation */
+#define CAL_SNR(RSSI, NF)		((t_s16)((t_s16)(RSSI)-(t_s16)(NF)))
+
+/** 2K buf size */
+#define MLAN_TX_DATA_BUF_SIZE_2K        2048
+
+/** TLV  type ID definition */
+#define PROPRIETARY_TLV_BASE_ID                 0x0100
+
+/** Terminating TLV Type */
+#define MRVL_TERMINATE_TLV_ID                   0xffff
+
+/** TLV type : SSID */
+#define TLV_TYPE_SSID                           0x0000
+/** TLV type : Rates */
+#define TLV_TYPE_RATES                          0x0001
+/** TLV type : PHY FH */
+#define TLV_TYPE_PHY_FH                         0x0002
+/** TLV type : PHY DS */
+#define TLV_TYPE_PHY_DS                         0x0003
+/** TLV type : CF */
+#define TLV_TYPE_CF                             0x0004
+/** TLV type : IBSS */
+#define TLV_TYPE_IBSS                           0x0006
+
+/** TLV type : Domain */
+#define TLV_TYPE_DOMAIN                         0x0007
+
+/** TLV type : Power constraint */
+#define TLV_TYPE_POWER_CONSTRAINT               0x0020
+
+/** TLV type : Power capability */
+#define TLV_TYPE_POWER_CAPABILITY               0x0021
+
+/** TLV type : Vendor Specific IE */
+#define TLV_TYPE_VENDOR_SPECIFIC_IE             0xdd
+
+/** TLV type : Key material */
+#define TLV_TYPE_KEY_MATERIAL       (PROPRIETARY_TLV_BASE_ID + 0x00)    // 0x0100
+/** TLV type : Channel list */
+#define TLV_TYPE_CHANLIST           (PROPRIETARY_TLV_BASE_ID + 0x01)    // 0x0101
+/** TLV type : Number of probes */
+#define TLV_TYPE_NUMPROBES          (PROPRIETARY_TLV_BASE_ID + 0x02)    // 0x0102
+/** TLV type : Beacon RSSI low */
+#define TLV_TYPE_RSSI_LOW           (PROPRIETARY_TLV_BASE_ID + 0x04)    // 0x0104
+/** TLV type : Beacon SNR low */
+#define TLV_TYPE_SNR_LOW            (PROPRIETARY_TLV_BASE_ID + 0x05)    // 0x0105
+/** TLV type : Fail count */
+#define TLV_TYPE_FAILCOUNT          (PROPRIETARY_TLV_BASE_ID + 0x06)    // 0x0106
+/** TLV type : BCN miss */
+#define TLV_TYPE_BCNMISS            (PROPRIETARY_TLV_BASE_ID + 0x07)    // 0x0107
+/** TLV type : LED behavior */
+#define TLV_TYPE_LEDBEHAVIOR        (PROPRIETARY_TLV_BASE_ID + 0x09)    // 0x0109
+/** TLV type : Passthrough */
+#define TLV_TYPE_PASSTHROUGH        (PROPRIETARY_TLV_BASE_ID + 0x0a)    // 0x010a
+/** TLV type : Power TBL 2.4 Ghz */
+#define TLV_TYPE_POWER_TBL_2_4GHZ   (PROPRIETARY_TLV_BASE_ID + 0x0c)    // 0x010c
+/** TLV type : Power TBL 5 GHz */
+#define TLV_TYPE_POWER_TBL_5GHZ     (PROPRIETARY_TLV_BASE_ID + 0x0d)    // 0x010d
+/** TLV type : WMM queue status */
+#define TLV_TYPE_WMMQSTATUS         (PROPRIETARY_TLV_BASE_ID + 0x10)    // 0x0110
+/** TLV type : Wildcard SSID */
+#define TLV_TYPE_WILDCARDSSID       (PROPRIETARY_TLV_BASE_ID + 0x12)    // 0x0112
+/** TLV type : TSF timestamp */
+#define TLV_TYPE_TSFTIMESTAMP       (PROPRIETARY_TLV_BASE_ID + 0x13)    // 0x0113
+/** TLV type : ARP filter */
+#define TLV_TYPE_ARP_FILTER         (PROPRIETARY_TLV_BASE_ID + 0x15)    // 0x0115
+/** TLV type : Beacon RSSI high */
+#define TLV_TYPE_RSSI_HIGH          (PROPRIETARY_TLV_BASE_ID + 0x16)    // 0x0116
+/** TLV type : Beacon SNR high */
+#define TLV_TYPE_SNR_HIGH           (PROPRIETARY_TLV_BASE_ID + 0x17)    // 0x0117
+
+/** TLV type : Start BG scan later */
+#define TLV_TYPE_STARTBGSCANLATER   (PROPRIETARY_TLV_BASE_ID + 0x1e)    // 0x011e
+/** TLV type : Authentication type */
+#define TLV_TYPE_AUTH_TYPE          (PROPRIETARY_TLV_BASE_ID + 0x1f)    // 0x011f
+/** TLV type : BSSID */
+#define TLV_TYPE_BSSID              (PROPRIETARY_TLV_BASE_ID + 0x23)    // 0x0123
+
+/** TLV type : Link Quality */
+#define TLV_TYPE_LINK_QUALITY       (PROPRIETARY_TLV_BASE_ID + 0x24)    // 0x0124
+
+/** TLV type : Data RSSI low */
+#define TLV_TYPE_RSSI_LOW_DATA      (PROPRIETARY_TLV_BASE_ID + 0x26)    // 0x0126
+/** TLV type : Data SNR low */
+#define TLV_TYPE_SNR_LOW_DATA       (PROPRIETARY_TLV_BASE_ID + 0x27)    // 0x0127
+/** TLV type : Data RSSI high */
+#define TLV_TYPE_RSSI_HIGH_DATA     (PROPRIETARY_TLV_BASE_ID + 0x28)    // 0x0128
+/** TLV type : Data SNR high */
+#define TLV_TYPE_SNR_HIGH_DATA      (PROPRIETARY_TLV_BASE_ID + 0x29)    // 0x0129
+
+/** TLV type : Channel band list */
+#define TLV_TYPE_CHANNELBANDLIST    (PROPRIETARY_TLV_BASE_ID + 0x2a)    // 0x012a
+
+/** TLV type : Passphrase */
+#define TLV_TYPE_PASSPHRASE         (PROPRIETARY_TLV_BASE_ID + 0x3c)    // 0x013c
+
+/** TLV type : Encryption Protocol TLV */
+#define TLV_TYPE_ENCRYPTION_PROTO   (PROPRIETARY_TLV_BASE_ID + 0x40)    // 0x0140
+/** TLV type : Cipher TLV */
+#define TLV_TYPE_CIPHER             (PROPRIETARY_TLV_BASE_ID + 0x42)    // 0x0142
+/** TLV type : PMK */
+#define TLV_TYPE_PMK                (PROPRIETARY_TLV_BASE_ID + 0x44)    // 0x0144
+
+/** TLV type: WAPI IE */
+#define TLV_TYPE_WAPI_IE             (PROPRIETARY_TLV_BASE_ID + 0x5e)   // 0x015e
+
+/** TLV type: MGMT IE */
+#define TLV_TYPE_MGMT_IE             (PROPRIETARY_TLV_BASE_ID + 0x69)   // 0x0169
+
+/** TLV type : HT Capabilities */
+#define TLV_TYPE_HT_CAP                  (PROPRIETARY_TLV_BASE_ID + 0x4a)       // 0x014a
+/** TLV type : HT Information */
+#define TLV_TYPE_HT_INFO                 (PROPRIETARY_TLV_BASE_ID + 0x4b)       // 0x014b
+/** TLV type : Secondary Channel Offset */
+#define TLV_SECONDARY_CHANNEL_OFFSET     (PROPRIETARY_TLV_BASE_ID + 0x4c)       // 0x014c
+/** TLV type : 20/40 BSS Coexistence */
+#define TLV_TYPE_2040BSS_COEXISTENCE     (PROPRIETARY_TLV_BASE_ID + 0x4d)       // 0x014d
+/** TLV type : Overlapping BSS Scan Parameters */
+#define TLV_TYPE_OVERLAP_BSS_SCAN_PARAM  (PROPRIETARY_TLV_BASE_ID + 0x4e)       // 0x014e
+/** TLV type : Extended capabilities */
+#define TLV_TYPE_EXTCAP                  (PROPRIETARY_TLV_BASE_ID + 0x4f)       // 0x014f
+/** TLV type : Set of MCS values that STA desires to use within the BSS */
+#define TLV_TYPE_HT_OPERATIONAL_MCS_SET  (PROPRIETARY_TLV_BASE_ID + 0x50)       // 0x0150
+/** TLV type : RXBA_SYNC */
+#define TLV_TYPE_RXBA_SYNC               (PROPRIETARY_TLV_BASE_ID + 0x99)       // 0x0199
+/** ADDBA TID mask */
+#define ADDBA_TID_MASK   (MBIT(2) | MBIT(3) | MBIT(4) | MBIT(5))
+/** DELBA TID mask */
+#define DELBA_TID_MASK   (MBIT(12) | MBIT(13) | MBIT(14) | MBIT(15))
+/** ADDBA Starting Sequence Number Mask */
+#define SSN_MASK         0xfff0
+
+/** Block Ack result status */
+/** Block Ack Result : Success */
+#define BA_RESULT_SUCCESS        0x0
+/** Block Ack Result : Execution failure */
+#define BA_RESULT_FAILURE        0x1
+/** Block Ack Result : Timeout */
+#define BA_RESULT_TIMEOUT        0x2
+/** Block Ack Result : Data invalid */
+#define BA_RESULT_DATA_INVALID   0x3
+
+/** Get the baStatus (NOT_SETUP, COMPLETE, IN_PROGRESS)
+ *  in Tx BA stream table */
+#define IS_BASTREAM_SETUP(ptr)  (ptr->ba_status)
+
+/** An AMPDU/AMSDU could be disallowed for certain TID. 0xff means
+ *  no aggregation is enabled for the assigned TID */
+#define BA_STREAM_NOT_ALLOWED   0xff
+
+/** Test if 11n is enabled by checking the HTCap IE */
+#define IS_11N_ENABLED(priv) ((priv->adapter->config_bands & BAND_GN ||priv->adapter->config_bands & BAND_AN) \
+        && priv->curr_bss_params.bss_descriptor.pht_cap)
+/** Find out if we are the initiator or not */
+#define INITIATOR_BIT(DelBAParamSet) (((DelBAParamSet) & \
+                        MBIT(DELBA_INITIATOR_POS)) >> DELBA_INITIATOR_POS)
+
+/** 4K buf size */
+#define MLAN_TX_DATA_BUF_SIZE_4K        4096
+/** 8K buf size */
+#define MLAN_TX_DATA_BUF_SIZE_8K        8192
+/** Max Rx AMPDU Size */
+#define MAX_RX_AMPDU_SIZE_64K   0x03
+/** Non green field station */
+#define NON_GREENFIELD_STAS     0x04
+
+/** Greenfield support */
+#define HWSPEC_GREENFIELD_SUPP	 MBIT(29)
+/** Channel width 40Mhz support */
+#define HWSPEC_RXSTBC_SUPP	 MBIT(26)
+/** ShortGI @ 40Mhz support */
+#define HWSPEC_SHORTGI40_SUPP	 MBIT(24)
+/** ShortGI @ 20Mhz support */
+#define HWSPEC_SHORTGI20_SUPP	 MBIT(23)
+/** Channel width 40Mhz support */
+#define HWSPEC_CHANBW40_SUPP	 MBIT(17)
+/** 40Mhz intolarent enable */
+#define CAPINFO_40MHZ_INTOLARENT MBIT(8)
+
+/** Default 11n capability mask */
+#define DEFAULT_11N_CAP_MASK	(HWSPEC_SHORTGI20_SUPP | HWSPEC_RXSTBC_SUPP)
+/** Bits to ignore in hw_dev_cap as these bits are set in get_hw_spec */
+#define IGN_HW_DEV_CAP		(CAPINFO_40MHZ_INTOLARENT)
+
+/** HW_SPEC FwCapInfo */
+#define ISSUPP_11NENABLED(FwCapInfo) (FwCapInfo & MBIT(11))
+
+/** HW_SPEC Dot11nDevCap : MAX AMSDU supported */
+#define ISSUPP_MAXAMSDU(Dot11nDevCap) (Dot11nDevCap & MBIT(31))
+/** HW_SPEC Dot11nDevCap : Beamforming support */
+#define ISSUPP_BEAMFORMING(Dot11nDevCap) (Dot11nDevCap & MBIT(30))
+/** HW_SPEC Dot11nDevCap : Green field support */
+#define ISSUPP_GREENFIELD(Dot11nDevCap) (Dot11nDevCap & MBIT(29))
+/** HW_SPEC Dot11nDevCap : AMPDU support */
+#define ISSUPP_AMPDU(Dot11nDevCap) (Dot11nDevCap & MBIT(28))
+/** HW_SPEC Dot11nDevCap : MIMO PS support  */
+#define ISSUPP_MIMOPS(Dot11nDevCap) (Dot11nDevCap & MBIT(27))
+/** HW_SPEC Dot11nDevCap : Rx STBC support */
+#define ISSUPP_RXSTBC(Dot11nDevCap) (Dot11nDevCap & MBIT(26))
+/** HW_SPEC Dot11nDevCap : Tx STBC support */
+#define ISSUPP_TXSTBC(Dot11nDevCap) (Dot11nDevCap & MBIT(25))
+/** HW_SPEC Dot11nDevCap : Short GI @ 40Mhz support */
+#define ISSUPP_SHORTGI40(Dot11nDevCap) (Dot11nDevCap & MBIT(24))
+/** HW_SPEC Dot11nDevCap : Short GI @ 20Mhz support */
+#define ISSUPP_SHORTGI20(Dot11nDevCap) (Dot11nDevCap & MBIT(23))
+/** HW_SPEC Dot11nDevCap : Rx LDPC support */
+#define ISSUPP_RXLDPC(Dot11nDevCap) (Dot11nDevCap & MBIT(22))
+/** HW_SPEC Dot11nDevCap : Delayed ACK */
+#define GET_DELAYEDBACK(Dot11nDevCap) (((Dot11nDevCap >> 20) & 0x03))
+/** HW_SPEC Dot11nDevCap : Immediate ACK */
+#define GET_IMMEDIATEBACK(Dot11nDevCap) (((Dot11nDevCap >> 18) & 0x03))
+/** HW_SPEC Dot11nDevCap : Channel BW support @ 40Mhz  support */
+#define ISSUPP_CHANWIDTH40(Dot11nDevCap) (Dot11nDevCap & MBIT(17))
+/** HW_SPEC Dot11nDevCap : Channel BW support @ 20Mhz  support */
+#define ISSUPP_CHANWIDTH20(Dot11nDevCap) (Dot11nDevCap & MBIT(16))
+/** HW_SPEC Dot11nDevCap : Channel BW support @ 10Mhz  support */
+#define ISSUPP_CHANWIDTH10(Dot11nDevCap) (Dot11nDevCap & MBIT(15))
+/** Dot11nUsrCap : 40Mhz intolarance enabled */
+#define ISENABLED_40MHZ_INTOLARENT(Dot11nDevCap) (Dot11nDevCap & MBIT(8))
+/** HW_SPEC Dot11nDevCap : Rx AntennaD support */
+#define ISSUPP_RXANTENNAD(Dot11nDevCap) (Dot11nDevCap & MBIT(7))
+/** HW_SPEC Dot11nDevCap : Rx AntennaC support */
+#define ISSUPP_RXANTENNAC(Dot11nDevCap) (Dot11nDevCap & MBIT(6))
+/** HW_SPEC Dot11nDevCap : Rx AntennaB support */
+#define ISSUPP_RXANTENNAB(Dot11nDevCap) (Dot11nDevCap & MBIT(5))
+/** HW_SPEC Dot11nDevCap : Rx AntennaA support */
+#define ISSUPP_RXANTENNAA(Dot11nDevCap) (Dot11nDevCap & MBIT(4))
+/** HW_SPEC Dot11nDevCap : Tx AntennaD support */
+#define ISSUPP_TXANTENNAD(Dot11nDevCap) (Dot11nDevCap & MBIT(3))
+/** HW_SPEC Dot11nDevCap : Tx AntennaC support */
+#define ISSUPP_TXANTENNAC(Dot11nDevCap) (Dot11nDevCap & MBIT(2))
+/** HW_SPEC Dot11nDevCap : Tx AntennaB support */
+#define ISSUPP_TXANTENNAB(Dot11nDevCap) (Dot11nDevCap & MBIT(1))
+/** HW_SPEC Dot11nDevCap : Tx AntennaA support */
+#define ISSUPP_TXANTENNAA(Dot11nDevCap) (Dot11nDevCap & MBIT(0))
+
+/** HW_SPEC Dot11nDevCap : Set support of channel bw @ 40Mhz */
+#define SETSUPP_CHANWIDTH40(Dot11nDevCap) (Dot11nDevCap |= MBIT(17))
+/** HW_SPEC Dot11nDevCap : Reset support of channel bw @ 40Mhz */
+#define RESETSUPP_CHANWIDTH40(Dot11nDevCap) (Dot11nDevCap &= ~MBIT(17))
+
+/** DevMCSSupported : Tx MCS supported */
+#define GET_TXMCSSUPP(DevMCSSupported) (DevMCSSupported >> 4)
+/** DevMCSSupported : Rx MCS supported */
+#define GET_RXMCSSUPP(DevMCSSupported) (DevMCSSupported & 0x0f)
+
+/** GET HTCapInfo : Supported Channel BW */
+#define GETHT_SUPPCHANWIDTH(HTCapInfo) (HTCapInfo & MBIT(1))
+/** GET HTCapInfo : Support for Greenfield */
+#define GETHT_GREENFIELD(HTCapInfo) (HTCapInfo & MBIT(4))
+/** GET HTCapInfo : Support for Short GI @ 20Mhz */
+#define GETHT_SHORTGI20(HTCapInfo) (HTCapInfo & MBIT(5))
+/** GET HTCapInfo : Support for Short GI @ 40Mhz */
+#define GETHT_SHORTGI40(HTCapInfo) (HTCapInfo & MBIT(6))
+/** GET HTCapInfo : Support for Tx STBC */
+#define GETHT_TXSTBC(HTCapInfo) (HTCapInfo & MBIT(7))
+
+/** GET HTCapInfo : Support for Rx STBC */
+#define GETHT_RXSTBC(HTCapInfo) ((HTCapInfo >> 8) & 0x03)
+/** GET HTCapInfo : Support for Delayed ACK */
+#define GETHT_DELAYEDBACK(HTCapInfo) (HTCapInfo & MBIT(10))
+/** GET HTCapInfo : Support for Max AMSDU */
+#define GETHT_MAXAMSDU(HTCapInfo) (HTCapInfo & MBIT(11))
+
+/** SET HTCapInfo : Set support for LDPC coding capability */
+#define SETHT_LDPCCODINGCAP(HTCapInfo) (HTCapInfo |= MBIT(0))
+/** SET HTCapInfo : Set support for Channel BW */
+#define SETHT_SUPPCHANWIDTH(HTCapInfo) (HTCapInfo |= MBIT(1))
+/** SET HTCapInfo : Set support for Greenfield */
+#define SETHT_GREENFIELD(HTCapInfo) (HTCapInfo |= MBIT(4))
+/** SET HTCapInfo : Set support for Short GI @ 20Mhz */
+#define SETHT_SHORTGI20(HTCapInfo) (HTCapInfo |= MBIT(5))
+/** SET HTCapInfo : Set support for Short GI @ 40Mhz */
+#define SETHT_SHORTGI40(HTCapInfo) (HTCapInfo |= MBIT(6))
+/** SET HTCapInfo : Set support for Tx STBC */
+#define SETHT_TXSTBC(HTCapInfo) (HTCapInfo |= MBIT(7))
+/** SET HTCapInfo : Set support for Rx STBC */
+#define SETHT_RXSTBC(HTCapInfo, value) (HTCapInfo |= (value << 8))
+/** SET HTCapInfo : Set support for delayed block ack */
+#define SETHT_DELAYEDBACK(HTCapInfo) (HTCapInfo |= MBIT(10))
+/** SET HTCapInfo : Set support for Max size AMSDU */
+#define SETHT_MAXAMSDU(HTCapInfo) (HTCapInfo |= MBIT(11))
+/** SET HTCapInfo : Set support for DSSS/CCK Rates @ 40Mhz */
+#define SETHT_DSSSCCK40(HTCapInfo) (HTCapInfo |= MBIT(12))
+/** SET HTCapInfo : Enable 40Mhz Intolarence */
+#define SETHT_40MHZ_INTOLARANT(HTCapInfo) (HTCapInfo |= MBIT(14))
+
+/** RESET HTCapInfo : Set support for LDPC coding capability */
+#define RESETHT_LDPCCODINGCAP(HTCapInfo) (HTCapInfo &= ~MBIT(0))
+/** RESET HTCapInfo : Set support for Channel BW */
+#define RESETHT_SUPPCHANWIDTH(HTCapInfo) (HTCapInfo &= ~MBIT(1))
+/** RESET HTCapInfo : Set support for Greenfield */
+#define RESETHT_GREENFIELD(HTCapInfo) (HTCapInfo &= ~MBIT(4))
+/** RESET HTCapInfo : Set support for Short GI @ 20Mhz */
+#define RESETHT_SHORTGI20(HTCapInfo) (HTCapInfo &= ~MBIT(5))
+/** RESET HTCapInfo : Set support for Short GI @ 40Mhz */
+#define RESETHT_SHORTGI40(HTCapInfo) (HTCapInfo &= ~MBIT(6))
+/** RESET HTCapInfo : Set support for Tx STBC */
+#define RESETHT_TXSTBC(HTCapInfo) (HTCapInfo &= ~MBIT(7))
+/** RESET HTCapInfo : Set support for Rx STBC */
+#define RESETHT_RXSTBC(HTCapInfo) (HTCapInfo &= ~(0x03 << 8))
+/** RESET HTCapInfo : Set support for delayed block ack */
+#define RESETHT_DELAYEDBACK(HTCapInfo) (HTCapInfo &= ~MBIT(10))
+/** RESET HTCapInfo : Set support for Max size AMSDU */
+#define RESETHT_MAXAMSDU(HTCapInfo) (HTCapInfo &= ~MBIT(11))
+/** RESET HTCapInfo : Disable 40Mhz Intolarence */
+#define RESETHT_40MHZ_INTOLARANT(HTCapInfo) (HTCapInfo &= ~MBIT(14))
+/** RESET HTExtCap : Clear RD Responder bit */
+#define RESETHT_EXTCAP_RDG(HTExtCap) (HTExtCap &= ~MBIT(11))
+/** SET MCS32 */
+#define SETHT_MCS32(x) (x[4] |= 1)
+/** Set mcs set defined bit */
+#define SETHT_MCS_SET_DEFINED(x) (x[12] |= 1)
+/** Set the highest Rx data rate */
+#define SETHT_RX_HIGHEST_DT_SUPP(x, y) ((*(t_u16 *) (x + 10)) = y)
+/** AMPDU factor size */
+#define AMPDU_FACTOR_64K	0x03
+/** Set AMPDU size in A-MPDU paramter field */
+#define SETAMPDU_SIZE(x, y) do { \
+	x = x & ~0x03; \
+	x |= y & 0x03; \
+} while (0) \
+/** Set AMPDU spacing in A-MPDU paramter field */
+#define SETAMPDU_SPACING(x, y) do { \
+	x = x & ~0x1c; \
+	x |= (y & 0x07) << 2; \
+} while (0) \
+
+/** RadioType : Support for Band A */
+#define ISSUPP_BANDA(FwCapInfo) (FwCapInfo & MBIT(10))
+/** RadioType : Support for 40Mhz channel BW */
+#define ISALLOWED_CHANWIDTH40(Field2) (Field2 & MBIT(2))
+/** RadioType : Set support 40Mhz channel */
+#define SET_CHANWIDTH40(Field2) (Field2 |= MBIT(2))
+/** RadioType : Reset support 40Mhz channel */
+#define RESET_CHANWIDTH40(Field2) (Field2 &= ~(MBIT(0) | MBIT(1) | MBIT(2)))
+/** RadioType : Get secondary channel */
+#define GET_SECONDARYCHAN(Field2) (Field2 & (MBIT(0) | MBIT(1)))
+/** RadioType : Set secondary channel */
+#define SET_SECONDARYCHAN(RadioType, SECCHAN) (RadioType |= (SECCHAN << 4))
+
+/** LLC/SNAP header len   */
+#define LLC_SNAP_LEN    8
+
+/** TLV type : Rate scope */
+#define TLV_TYPE_RATE_DROP_PATTERN  (PROPRIETARY_TLV_BASE_ID + 0x51)    // 0x0151
+/** TLV type : Rate drop pattern */
+#define TLV_TYPE_RATE_DROP_CONTROL  (PROPRIETARY_TLV_BASE_ID + 0x52)    // 0x0152
+/** TLV type : Rate scope */
+#define TLV_TYPE_RATE_SCOPE         (PROPRIETARY_TLV_BASE_ID + 0x53)    // 0x0153
+
+/** TLV type : Power group */
+#define TLV_TYPE_POWER_GROUP        (PROPRIETARY_TLV_BASE_ID + 0x54)    // 0x0154
+
+/** Modulation class for DSSS Rates */
+#define MOD_CLASS_HR_DSSS       0x03
+/** Modulation class for OFDM Rates */
+#define MOD_CLASS_OFDM          0x07
+/** Modulation class for HT Rates */
+#define MOD_CLASS_HT            0x08
+/** HT bandwidth 20 MHz */
+#define HT_BW_20    0
+/** HT bandwidth 40 MHz */
+#define HT_BW_40    1
+
+/** TLV type : 11h Basic Rpt */
+#define TLV_TYPE_CHANRPT_11H_BASIC   (PROPRIETARY_TLV_BASE_ID + 0x5b)   // 0x015b
+
+/** TLV type : Action frame */
+#define TLV_TYPE_IEEE_ACTION_FRAME   (PROPRIETARY_TLV_BASE_ID + 0x8c)   // 0x018c
+
+/** Firmware Host Command ID Constants */
+/** Host Command ID : Get hardware specifications */
+#define HostCmd_CMD_GET_HW_SPEC               0x0003
+/** Host Command ID : 802.11 scan */
+#define HostCmd_CMD_802_11_SCAN               0x0006
+/** Host Command ID : 802.11 get log */
+#define HostCmd_CMD_802_11_GET_LOG            0x000b
+/** Host Command ID : MAC multicast address */
+#define HostCmd_CMD_MAC_MULTICAST_ADR         0x0010
+/** Host Command ID : 802.11 EEPROM access */
+#define HostCmd_CMD_802_11_EEPROM_ACCESS      0x0059
+/** Host Command ID : 802.11 associate */
+#define HostCmd_CMD_802_11_ASSOCIATE          0x0012
+
+/** Host Command ID : 802.11 SNMP MIB */
+#define HostCmd_CMD_802_11_SNMP_MIB           0x0016
+/** Host Command ID : MAC register access */
+#define HostCmd_CMD_MAC_REG_ACCESS            0x0019
+/** Host Command ID : BBP register access */
+#define HostCmd_CMD_BBP_REG_ACCESS            0x001a
+/** Host Command ID : RF register access */
+#define HostCmd_CMD_RF_REG_ACCESS             0x001b
+
+/** Host Command ID : PMIC register access */
+#define HostCmd_CMD_PMIC_REG_ACCESS           0x00ad
+
+/** Host Command ID : 802.11 radio control */
+#define HostCmd_CMD_802_11_RADIO_CONTROL      0x001c
+/** Host Command ID : 802.11 RF channel */
+#define HostCmd_CMD_802_11_RF_CHANNEL         0x001d
+/** Host Command ID : 802.11 RF Tx power */
+#define HostCmd_CMD_802_11_RF_TX_POWER        0x001e
+
+/** Host Command ID : 802.11 RF antenna */
+#define HostCmd_CMD_802_11_RF_ANTENNA         0x0020
+
+/** Host Command ID : 802.11 deauthenticate */
+#define HostCmd_CMD_802_11_DEAUTHENTICATE     0x0024
+/** Host Command ID : MAC control */
+#define HostCmd_CMD_MAC_CONTROL               0x0028
+/** Host Command ID : 802.11 Ad-Hoc start */
+#define HostCmd_CMD_802_11_AD_HOC_START       0x002b
+/** Host Command ID : 802.11 Ad-Hoc join */
+#define HostCmd_CMD_802_11_AD_HOC_JOIN        0x002c
+
+/** Host Command ID : 802.11 key material */
+#define HostCmd_CMD_802_11_KEY_MATERIAL       0x005e
+
+/** Host Command ID : 802.11 Ad-Hoc stop */
+#define HostCmd_CMD_802_11_AD_HOC_STOP        0x0040
+
+/** Host Command ID : 802.22 MAC address */
+#define HostCmd_CMD_802_11_MAC_ADDRESS        0x004D
+
+/** Host Command ID : WMM Traffic Stream Status */
+#define HostCmd_CMD_WMM_TS_STATUS             0x005d
+
+/** Host Command ID : 802.11 D domain information */
+#define HostCmd_CMD_802_11D_DOMAIN_INFO       0x005b
+
+/** Host Command ID : 802.11 TPC information */
+#define HostCmd_CMD_802_11_TPC_INFO           0x005f
+/** Host Command ID : 802.11 TPC adapt req */
+#define HostCmd_CMD_802_11_TPC_ADAPT_REQ      0x0060
+/** Host Command ID : 802.11 channel SW ann */
+#define HostCmd_CMD_802_11_CHAN_SW_ANN        0x0061
+
+/** Host Command ID : Measurement request */
+#define HostCmd_CMD_MEASUREMENT_REQUEST       0x0062
+/** Host Command ID : Measurement report */
+#define HostCmd_CMD_MEASUREMENT_REPORT        0x0063
+
+/** Host Command ID : 802.11 sleep parameters */
+#define HostCmd_CMD_802_11_SLEEP_PARAMS       0x0066
+
+/** Host Command ID : 802.11 sleep period */
+#define HostCmd_CMD_802_11_SLEEP_PERIOD       0x0068
+
+/** Host Command ID : WMM ADDTS req */
+#define HostCmd_CMD_WMM_ADDTS_REQ             0x006E
+/** Host Command ID : WMM DELTS req */
+#define HostCmd_CMD_WMM_DELTS_REQ             0x006F
+/** Host Command ID : WMM queue configuration */
+#define HostCmd_CMD_WMM_QUEUE_CONFIG          0x0070
+/** Host Command ID : 802.11 get status */
+#define HostCmd_CMD_WMM_GET_STATUS            0x0071
+
+/** Host Command ID : 802.11 Tx rate query */
+#define HostCmd_CMD_802_11_TX_RATE_QUERY      0x007f
+
+/** Host Command ID : WMM queue stats */
+#define HostCmd_CMD_WMM_QUEUE_STATS           0x0081
+
+/** Host Command ID : 802.11 IBSS coalescing status */
+#define HostCmd_CMD_802_11_IBSS_COALESCING_STATUS 0x0083
+
+/** Host Command ID : Memory access */
+#define HostCmd_CMD_MEM_ACCESS                0x0086
+
+#ifdef MFG_CMD_SUPPORT
+/** Host Command ID : Mfg command */
+#define HostCmd_CMD_MFG_COMMAND               0x0089
+#endif
+/** Host Command ID : Inactivity timeout ext */
+#define HostCmd_CMD_INACTIVITY_TIMEOUT_EXT    0x008a
+
+/** Host Command ID : DBGS configuration */
+#define HostCmd_CMD_DBGS_CFG                  0x008b
+/** Host Command ID : Get memory */
+#define HostCmd_CMD_GET_MEM                   0x008c
+
+/** Host Command ID : Cal data dnld */
+#define HostCmd_CMD_CFG_DATA                  0x008f
+
+/** Host Command ID : ECL system clock configuration */
+#define HostCmd_CMD_ECL_SYSTEM_CLOCK_CONFIG   0x0094
+
+/** Host Command ID : Extended version */
+#define HostCmd_CMD_VERSION_EXT               0x0097
+
+/** Host Command ID : MEF configuration */
+#define HostCmd_CMD_MEF_CFG                   0x009a
+
+/** Host Command ID : 802.11 RSSI INFO*/
+#define HostCmd_CMD_RSSI_INFO                 0x00a4
+
+/** Host Command ID : Function initialization */
+#define HostCmd_CMD_FUNC_INIT                 0x00a9
+/** Host Command ID : Function shutdown */
+#define HostCmd_CMD_FUNC_SHUTDOWN             0x00aa
+
+/** Host Command ID : Channel report request */
+#define HostCmd_CMD_CHAN_REPORT_REQUEST              0x00dd
+
+/** Host Command ID: SUPPLICANT_PMK */
+#define HostCmd_CMD_SUPPLICANT_PMK            0x00c4
+/** Host Command ID: SUPPLICANT_PROFILE */
+#define HostCmd_CMD_SUPPLICANT_PROFILE        0x00c5
+
+/** Host Command ID : Add Block Ack Request */
+#define HostCmd_CMD_11N_ADDBA_REQ             0x00ce
+/** Host Command ID : Delete a Block Ack Request */
+#define HostCmd_CMD_11N_CFG                   0x00cd
+/** Host Command ID : Add Block Ack Response */
+#define HostCmd_CMD_11N_ADDBA_RSP             0x00cf
+/** Host Command ID : Delete a Block Ack Request */
+#define HostCmd_CMD_11N_DELBA                 0x00d0
+/** Host Command ID: Configure Tx Buf size */
+#define HostCmd_CMD_RECONFIGURE_TX_BUFF       0x00d9
+/** Host Command ID: AMSDU Aggr Ctrl */
+#define HostCmd_CMD_AMSDU_AGGR_CTRL	      	  0x00df
+
+/** Host Command ID : 802.11 TX power configuration */
+#define HostCmd_CMD_TXPWR_CFG                 0x00d1
+
+/** Host Command ID : Soft Reset */
+#define  HostCmd_CMD_SOFT_RESET		          0x00d5
+
+/** Host Command ID : 802.11 b/g/n rate configration */
+#define HostCmd_CMD_TX_RATE_CFG               0x00d6
+
+/** Host Command ID : Heart Beat Configuration */
+#define HostCmd_CMD_HEART_BEAT                0x00da
+
+/** Host Command ID : Enhanced PS mode */
+#define HostCmd_CMD_802_11_PS_MODE_ENH        0x00e4
+
+/** Host command action : Host sleep configuration */
+#define HostCmd_CMD_802_11_HS_CFG_ENH         0x00e5
+
+/** Host Command ID : CAU register access */
+#define HostCmd_CMD_CAU_REG_ACCESS            0x00ed
+
+/** Host Command ID : mgmt IE list */
+#define  HostCmd_CMD_MGMT_IE_LIST             0x00f2
+
+/** Host Command ID : Set BSS_MODE */
+#define HostCmd_CMD_SET_BSS_MODE               0x00f7
+
+#ifdef UAP_SUPPORT
+/**  Host Command id: SYS_INFO */
+#define HOST_CMD_APCMD_SYS_INFO                0x00ae
+/** Host Command id: sys_reset */
+#define HOST_CMD_APCMD_SYS_RESET               0x00af
+/** Host Command id: SYS_CONFIGURE  */
+#define HOST_CMD_APCMD_SYS_CONFIGURE           0x00b0
+/** Host Command id: BSS_START */
+#define HOST_CMD_APCMD_BSS_START               0x00b1
+/** Host Command id: BSS_STOP  */
+#define HOST_CMD_APCMD_BSS_STOP                0x00b2
+/** Host Command id: sta_list */
+#define HOST_CMD_APCMD_STA_LIST                0x00b3
+/** Host Command id: STA_DEAUTH */
+#define HOST_CMD_APCMD_STA_DEAUTH              0x00b5
+
+#endif /* UAP_SUPPORT */
+
+/** Host Command ID: Tx data pause */
+#define HostCmd_CMD_CFG_TX_DATA_PAUSE           0x0103
+
+/** Enhanced PS modes */
+typedef enum _ENH_PS_MODES
+{
+    GET_PS = 0,
+    SLEEP_CONFIRM = 5,
+    DIS_AUTO_PS = 0xfe,
+    EN_AUTO_PS = 0xff,
+} ENH_PS_MODES;
+
+/** Command RET code, MSB is set to 1 */
+#define HostCmd_RET_BIT                       0x8000
+
+/** General purpose action : Get */
+#define HostCmd_ACT_GEN_GET                   0x0000
+/** General purpose action : Set */
+#define HostCmd_ACT_GEN_SET                   0x0001
+/** General purpose action : Get_Current */
+#define HostCmd_ACT_GEN_GET_CURRENT           0x0003
+/** General purpose action : Remove */
+#define HostCmd_ACT_GEN_REMOVE                0x0004
+
+/** Host command action : Set both Rx and Tx */
+#define HostCmd_ACT_SET_BOTH                  0x0003
+/** Host command action : Get both Rx and Tx */
+#define HostCmd_ACT_GET_BOTH                  0x000c
+
+/** General Result Code*/
+/** General result code OK */
+#define HostCmd_RESULT_OK                     0x0000
+/** Genenral error */
+#define HostCmd_RESULT_ERROR                  0x0001
+/** Command is not valid */
+#define HostCmd_RESULT_NOT_SUPPORT            0x0002
+/** Command is pending */
+#define HostCmd_RESULT_PENDING                0x0003
+/** System is busy (command ignored) */
+#define HostCmd_RESULT_BUSY                   0x0004
+/** Data buffer is not big enough */
+#define HostCmd_RESULT_PARTIAL_DATA           0x0005
+
+/* Define action or option for HostCmd_CMD_MAC_CONTROL */
+/** MAC action : Rx on */
+#define HostCmd_ACT_MAC_RX_ON                 0x0001
+/** MAC action : Tx on */
+#define HostCmd_ACT_MAC_TX_ON                 0x0002
+/** MAC action : WEP enable */
+#define HostCmd_ACT_MAC_WEP_ENABLE            0x0008
+/** MAC action : EthernetII enable */
+#define HostCmd_ACT_MAC_ETHERNETII_ENABLE     0x0010
+/** MAC action : Promiscous mode enable */
+#define HostCmd_ACT_MAC_PROMISCUOUS_ENABLE    0x0080
+/** MAC action : All multicast enable */
+#define HostCmd_ACT_MAC_ALL_MULTICAST_ENABLE  0x0100
+/** MAC action : RTS/CTS enable */
+#define HostCmd_ACT_MAC_RTS_CTS_ENABLE        0x0200
+/** MAC action : Strict protection enable */
+#define HostCmd_ACT_MAC_STRICT_PROTECTION_ENABLE  0x0400
+/** MAC action : Force 11n protection disable */
+#define HostCmd_ACT_MAC_FORCE_11N_PROTECTION_OFF  0x0800
+/** MAC action : Ad-Hoc G protection on */
+#define HostCmd_ACT_MAC_ADHOC_G_PROTECTION_ON     0x2000
+
+/* Define action or option for HostCmd_CMD_802_11_SCAN */
+/** Scan type : BSS */
+#define HostCmd_BSS_MODE_BSS                0x0001
+/** Scan type : IBSS */
+#define HostCmd_BSS_MODE_IBSS               0x0002
+/** Scan type : Any */
+#define HostCmd_BSS_MODE_ANY                0x0003
+
+/* Radio type definitions for the channel TLV */
+/** Radio type BG */
+#define HostCmd_SCAN_RADIO_TYPE_BG          0
+/** Radio type A */
+#define HostCmd_SCAN_RADIO_TYPE_A           1
+
+/** Define bitmap conditions for HOST_SLEEP_CFG : GPIO FF */
+#define HOST_SLEEP_CFG_GPIO_FF              0xff
+/** Define bitmap conditions for HOST_SLEEP_CFG : GAP FF */
+#define HOST_SLEEP_CFG_GAP_FF               0xff
+
+/** Buffer Constants */
+/** Number of command buffers */
+#define MRVDRV_NUM_OF_CMD_BUFFER        20
+/** Size of command buffer */
+#define MRVDRV_SIZE_OF_CMD_BUFFER       (2 * 1024)
+
+/** Maximum number of BSS Descriptors */
+#define MRVDRV_MAX_BSSID_LIST           64
+
+/** Host command flag in command */
+#define CMD_F_HOSTCMD           (1 << 0)
+/** command cancel flag in command */
+#define CMD_F_CANCELED          (1 << 1)
+
+/** Host Command ID bit mask (bit 11:0) */
+#define HostCmd_CMD_ID_MASK             0x0fff
+
+/** Host Command Sequence number mask (bit 7:0) */
+#define HostCmd_SEQ_NUM_MASK            0x00ff
+
+/** Host Command BSS number mask (bit 11:8) */
+#define HostCmd_BSS_NUM_MASK            0x0f00
+
+/** Host Command BSS type mask (bit 15:12) */
+#define HostCmd_BSS_TYPE_MASK           0xf000
+
+/** Set BSS information to Host Command */
+#define HostCmd_SET_SEQ_NO_BSS_INFO(seq, num, type)    \
+    (((seq) & 0x00ff) |         \
+     (((num) & 0x000f) << 8)) | \
+     (((type) & 0x000f) << 12)
+
+/** Get Sequence Number from Host Command (bit 7:0) */
+#define HostCmd_GET_SEQ_NO(seq)       \
+        ((seq) & HostCmd_SEQ_NUM_MASK)
+
+/** Get BSS number from Host Command (bit 11:8) */
+#define HostCmd_GET_BSS_NO(seq)         \
+        (((seq) & HostCmd_BSS_NUM_MASK) >> 8)
+
+/** Get BSS type from Host Command (bit 15:12) */
+#define HostCmd_GET_BSS_TYPE(seq)       \
+        (((seq) & HostCmd_BSS_TYPE_MASK) >> 12)
+
+/** Card Event definition : Dummy host wakeup signal */
+#define EVENT_DUMMY_HOST_WAKEUP_SIGNAL  0x00000001
+/** Card Event definition : Link lost */
+#define EVENT_LINK_LOST                 0x00000003
+/** Card Event definition : Link sensed */
+#define EVENT_LINK_SENSED               0x00000004
+/** Card Event definition : MIB changed */
+#define EVENT_MIB_CHANGED               0x00000006
+/** Card Event definition : Init done */
+#define EVENT_INIT_DONE                 0x00000007
+/** Card Event definition : Deauthenticated */
+#define EVENT_DEAUTHENTICATED           0x00000008
+/** Card Event definition : Disassociated */
+#define EVENT_DISASSOCIATED             0x00000009
+/** Card Event definition : Power save awake */
+#define EVENT_PS_AWAKE                  0x0000000a
+/** Card Event definition : Power save sleep */
+#define EVENT_PS_SLEEP                  0x0000000b
+/** Card Event definition : MIC error multicast */
+#define EVENT_MIC_ERR_MULTICAST         0x0000000d
+/** Card Event definition : MIC error unicast */
+#define EVENT_MIC_ERR_UNICAST           0x0000000e
+
+/** Card Event definition : Ad-Hoc BCN lost */
+#define EVENT_ADHOC_BCN_LOST            0x00000011
+
+/** Card Event definition : Stop Tx */
+#define EVENT_STOP_TX                   0x00000013
+/** Card Event definition : Start Tx */
+#define EVENT_START_TX                  0x00000014
+/** Card Event definition : Channel switch */
+#define EVENT_CHANNEL_SWITCH            0x00000015
+
+/** Card Event definition : MEAS report ready */
+#define EVENT_MEAS_REPORT_RDY           0x00000016
+
+/** Card Event definition : WMM status change */
+#define EVENT_WMM_STATUS_CHANGE         0x00000017
+
+/** Card Event definition : Beacon RSSI low */
+#define EVENT_RSSI_LOW                  0x00000019
+/** Card Event definition : Beacon SNR low */
+#define EVENT_SNR_LOW                   0x0000001a
+/** Card Event definition : Maximum fail */
+#define EVENT_MAX_FAIL                  0x0000001b
+/** Card Event definition : Beacon RSSI high */
+#define EVENT_RSSI_HIGH                 0x0000001c
+/** Card Event definition : Beacon SNR high */
+#define EVENT_SNR_HIGH                  0x0000001d
+
+/** Card Event definition : IBSS coalsced */
+#define EVENT_IBSS_COALESCED            0x0000001e
+
+/** Card Event definition : Data RSSI low */
+#define EVENT_DATA_RSSI_LOW             0x00000024
+/** Card Event definition : Data SNR low */
+#define EVENT_DATA_SNR_LOW              0x00000025
+/** Card Event definition : Data RSSI high */
+#define EVENT_DATA_RSSI_HIGH            0x00000026
+/** Card Event definition : Data SNR high */
+#define EVENT_DATA_SNR_HIGH             0x00000027
+
+/** Card Event definition : Link Quality */
+#define EVENT_LINK_QUALITY              0x00000028
+
+/** Card Event definition : Port release event */
+#define EVENT_PORT_RELEASE              0x0000002b
+
+/** Card Event definition : Pre-Beacon Lost */
+#define EVENT_PRE_BEACON_LOST           0x00000031
+
+/** Card Event definition : Add BA event */
+#define EVENT_ADDBA                     0x00000033
+/** Card Event definition : Del BA event */
+#define EVENT_DELBA                     0x00000034
+/** Card Event definition: BA stream timeout*/
+#define EVENT_BA_STREAM_TIMEOUT         0x00000037
+
+/** Card Event definition : Heart Beat event */
+#define EVENT_HEART_BEAT                0x00000035
+
+/** Card Event definition : AMSDU aggr control */
+#define EVENT_AMSDU_AGGR_CTRL           0x00000042
+
+/** Card Event definition: WEP ICV error */
+#define EVENT_WEP_ICV_ERR               0x00000046
+
+/** Card Event definition : Host sleep enable */
+#define EVENT_HS_ACT_REQ                0x00000047
+
+/** Card Event definition : BW changed */
+#define EVENT_BW_CHANGE                 0x00000048
+
+#ifdef WFD_SUPPORT
+/** WFD generic event */
+#define EVENT_WFD_GENERIC_EVENT         0x00000049
+/** WFD service discovery event */
+#define EVENT_WFD_SERVICE_DISCOVERY     0x0000004a
+#endif
+
+/** Card Event definition: Channel switch pending announcment */
+#define EVENT_CHANNEL_SWITCH_ANN        0x00000050
+
+/** Event definition: RXBA_SYNC */
+#define EVENT_RXBA_SYNC                 0x00000059
+
+#ifdef UAP_SUPPORT
+/** Event ID: STA deauth */
+#define EVENT_MICRO_AP_STA_DEAUTH       0x0000002c
+/** Event ID: STA assoicated */
+#define EVENT_MICRO_AP_STA_ASSOC        0x0000002d
+/** Event ID: BSS started */
+#define EVENT_MICRO_AP_BSS_START        0x0000002e
+/** Event ID: BSS idle event */
+#define EVENT_MICRO_AP_BSS_IDLE         0x00000043
+/** Event ID: BSS active event */
+#define EVENT_MICRO_AP_BSS_ACTIVE       0x00000044
+
+#endif /* UAP_SUPPORT */
+
+/** Event ID: TX data pause event */
+#define EVENT_TX_DATA_PAUSE                  0x00000055
+
+/** Event ID mask */
+#define EVENT_ID_MASK                   0xffff
+
+/** BSS number mask */
+#define BSS_NUM_MASK                    0xf
+
+/** Get BSS number from event cause (bit 23:16) */
+#define EVENT_GET_BSS_NUM(event_cause)          \
+    (((event_cause) >> 16) & BSS_NUM_MASK)
+
+/** Get BSS type from event cause (bit 31:24) */
+#define EVENT_GET_BSS_TYPE(event_cause)         \
+    (((event_cause) >> 24) & 0x00ff)
+
+/** Event_WEP_ICV_ERR structure */
+typedef MLAN_PACK_START struct _Event_WEP_ICV_ERR
+{
+    /** Reason code */
+    t_u16 reason_code;
+    /** Source MAC address */
+    t_u8 src_mac_addr[MLAN_MAC_ADDR_LENGTH];
+    /** WEP decryption used key */
+    t_u8 wep_key_index;
+    /** WEP key length */
+    t_u8 wep_key_length;
+    /** WEP key */
+    t_u8 key[MAX_WEP_KEY_SIZE];
+} MLAN_PACK_END Event_WEP_ICV_ERR;
+
+/** WLAN_802_11_FIXED_IEs */
+typedef MLAN_PACK_START struct _WLAN_802_11_FIXED_IEs
+{
+    /** Timestamp */
+    t_u8 time_stamp[8];
+    /** Beacon interval */
+    t_u16 beacon_interval;
+    /** Capabilities*/
+    t_u16 capabilities;
+} MLAN_PACK_END WLAN_802_11_FIXED_IEs;
+
+/** WLAN_802_11_VARIABLE_IEs */
+typedef MLAN_PACK_START struct _WLAN_802_11_VARIABLE_IEs
+{
+    /** Element ID */
+    t_u8 element_id;
+    /** Length */
+    t_u8 length;
+    /** IE data */
+    t_u8 data[1];
+} MLAN_PACK_END WLAN_802_11_VARIABLE_IEs;
+
+/** TLV related data structures*/
+/** MrvlIEtypesHeader_t */
+typedef MLAN_PACK_START struct _MrvlIEtypesHeader
+{
+    /** Header type */
+    t_u16 type;
+    /** Header length */
+    t_u16 len;
+} MLAN_PACK_END MrvlIEtypesHeader_t;
+
+/** MrvlIEtypes_Data_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_Data_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** Data */
+    t_u8 data[1];
+} MLAN_PACK_END MrvlIEtypes_Data_t;
+
+/** Bit mask for TxPD status field for null packet */
+#define MRVDRV_TxPD_POWER_MGMT_NULL_PACKET 0x01
+/** Bit mask for TxPD status field for last packet */
+#define MRVDRV_TxPD_POWER_MGMT_LAST_PACKET 0x08
+
+/** Packet type: 802.11 */
+#define PKT_TYPE_802DOT11   0x05
+#ifdef UAP_SUPPORT
+#define PKT_TYPE_MGMT_FRAME 0xE5
+#endif
+/** Packet type: AMSDU */
+#define PKT_TYPE_AMSDU      0xE6
+/** Packet type: BAR */
+#define PKT_TYPE_BAR        0xE7
+/** Packet type: debugging */
+#define PKT_TYPE_DEBUG      0xEF
+
+/** TxPD descriptor */
+typedef MLAN_PACK_START struct _TxPD
+{
+    /** BSS type */
+    t_u8 bss_type;
+    /** BSS number */
+    t_u8 bss_num;
+    /** Tx packet length */
+    t_u16 tx_pkt_length;
+    /** Tx packet offset */
+    t_u16 tx_pkt_offset;
+    /** Tx packet type */
+    t_u16 tx_pkt_type;
+    /** Tx Control */
+    t_u32 tx_control;
+    /** Pkt Priority */
+    t_u8 priority;
+    /** Transmit Pkt Flags*/
+    t_u8 flags;
+    /** Amount of time the packet has been queued in the driver (units = 2ms)*/
+    t_u8 pkt_delay_2ms;
+    /** Reserved */
+    t_u8 reserved1;
+} MLAN_PACK_END TxPD, *PTxPD;
+
+/** RxPD Descriptor */
+typedef MLAN_PACK_START struct _RxPD
+{
+    /** BSS type */
+    t_u8 bss_type;
+    /** BSS number */
+    t_u8 bss_num;
+    /** Rx Packet Length */
+    t_u16 rx_pkt_length;
+    /** Rx Pkt offset */
+    t_u16 rx_pkt_offset;
+    /** Rx packet type */
+    t_u16 rx_pkt_type;
+    /** Sequence number */
+    t_u16 seq_num;
+    /** Packet Priority */
+    t_u8 priority;
+    /** Rx Packet Rate */
+    t_u8 rx_rate;
+    /** SNR */
+    t_s8 snr;
+    /** Noise Floor */
+    t_s8 nf;
+    /** Ht Info [Bit 0] RxRate format: LG=0, HT=1
+     * [Bit 1]  HT Bandwidth: BW20 = 0, BW40 = 1
+     * [Bit 2]  HT Guard Interval: LGI = 0, SGI = 1 */
+    t_u8 ht_info;
+    /** Reserved */
+    t_u8 reserved;
+} MLAN_PACK_END RxPD, *PRxPD;
+
+#ifdef UAP_SUPPORT
+/** TxPD descriptor */
+typedef MLAN_PACK_START struct _UapTxPD
+{
+        /** BSS type */
+    t_u8 bss_type;
+        /** BSS number */
+    t_u8 bss_num;
+        /** Tx packet length */
+    t_u16 tx_pkt_length;
+        /** Tx packet offset */
+    t_u16 tx_pkt_offset;
+        /** Tx packet type */
+    t_u16 tx_pkt_type;
+        /** Tx Control */
+    t_u32 tx_control;
+        /** Pkt Priority */
+    t_u8 priority;
+        /** Transmit Pkt Flags*/
+    t_u8 flags;
+        /** Amount of time the packet has been queued in the driver (units = 2ms)*/
+    t_u8 pkt_delay_2ms;
+        /** Reserved */
+    t_u8 reserved1;
+        /** Reserved */
+    t_u32 reserved;
+} MLAN_PACK_END UapTxPD, *PUapTxPD;
+
+/** RxPD Descriptor */
+typedef MLAN_PACK_START struct _UapRxPD
+{
+        /** BSS Type */
+    t_u8 bss_type;
+        /** BSS number*/
+    t_u8 bss_num;
+        /** Rx packet length */
+    t_u16 rx_pkt_length;
+        /** Rx packet offset */
+    t_u16 rx_pkt_offset;
+        /** Rx packet type */
+    t_u16 rx_pkt_type;
+    /** Sequence number */
+    t_u16 seq_num;
+    /** Packet Priority */
+    t_u8 priority;
+    /** reserved */
+    t_u8 reserved1;
+} MLAN_PACK_END UapRxPD, *PUapRxPD;
+
+/** Fixed size of station association event */
+#define ASSOC_EVENT_FIX_SIZE    12
+
+/** IEEEtypes_FrameCtl_t*/
+#ifdef BIG_ENDIAN_SUPPORT
+typedef MLAN_PACK_START struct _IEEEtypes_FrameCtl_t
+{
+    /** Order */
+    t_u8 order:1;
+    /** Wep */
+    t_u8 wep:1;
+    /** More Data */
+    t_u8 more_data:1;
+    /** Power Mgmt */
+    t_u8 pwr_mgmt:1;
+    /** Retry */
+    t_u8 retry:1;
+    /** More Frag */
+    t_u8 more_frag:1;
+    /** From DS */
+    t_u8 from_ds:1;
+    /** To DS */
+    t_u8 to_ds:1;
+    /** Sub Type */
+    t_u8 sub_type:4;
+    /** Type */
+    t_u8 type:2;
+    /** Protocol Version */
+    t_u8 protocol_version:2;
+} MLAN_PACK_END IEEEtypes_FrameCtl_t;
+#else
+typedef MLAN_PACK_START struct _IEEEtypes_FrameCtl_t
+{
+    /** Protocol Version */
+    t_u8 protocol_version:2;
+    /** Type */
+    t_u8 type:2;
+    /** Sub Type */
+    t_u8 sub_type:4;
+    /** To DS */
+    t_u8 to_ds:1;
+    /** From DS */
+    t_u8 from_ds:1;
+    /** More Frag */
+    t_u8 more_frag:1;
+    /** Retry */
+    t_u8 retry:1;
+    /** Power Mgmt */
+    t_u8 pwr_mgmt:1;
+    /** More Data */
+    t_u8 more_data:1;
+    /** Wep */
+    t_u8 wep:1;
+    /** Order */
+    t_u8 order:1;
+} MLAN_PACK_END IEEEtypes_FrameCtl_t;
+#endif
+
+/** MrvlIETypes_MgmtFrameSet_t */
+typedef MLAN_PACK_START struct _MrvlIETypes_MgmtFrameSet_t
+{
+    /** Type */
+    t_u16 type;
+    /** Length */
+    t_u16 len;
+    /** Frame Control */
+    IEEEtypes_FrameCtl_t frame_control;
+    /* t_u8 frame_contents[0]; */
+} MLAN_PACK_END MrvlIETypes_MgmtFrameSet_t;
+
+/** IEEEtypes_AssocRqst_t */
+typedef MLAN_PACK_START struct _IEEEtypes_AssocRqst_t
+{
+    /** Capability Info */
+    t_u16 cap_info;
+    /** Listen Interval */
+    t_u16 listen_interval;
+    /* t_u8 ie_buffer[0]; */
+} MLAN_PACK_END IEEEtypes_AssocRqst_t;
+
+/** IEEEtypes_ReAssocRqst_t */
+typedef MLAN_PACK_START struct _IEEEtypes_ReAssocRqst_t
+{
+    /** Capability Info */
+    t_u16 cap_info;
+    /** Listen Interval */
+    t_u16 listen_interval;
+    /** Current AP Address */
+    t_u8 current_ap_addr[MLAN_MAC_ADDR_LENGTH];
+    /* t_u8 ie_buffer[0]; */
+} MLAN_PACK_END IEEEtypes_ReAssocRqst_t;
+#endif /* UAP_SUPPORT */
+
+/** wlan_802_11_header */
+typedef MLAN_PACK_START struct _wlan_802_11_header
+{
+    /** Frame Control */
+    t_u16 frm_ctl;
+    /** Duration ID */
+    t_u16 duration_id;
+    /** Address1 */
+    mlan_802_11_mac_addr addr1;
+    /** Address2 */
+    mlan_802_11_mac_addr addr2;
+    /** Address3 */
+    mlan_802_11_mac_addr addr3;
+    /** Sequence Control */
+    t_u16 seq_ctl;
+    /** Address4 */
+    mlan_802_11_mac_addr addr4;
+} MLAN_PACK_END wlan_802_11_header;
+
+#ifdef UAP_SUPPORT
+/** wlan_802_11_header packet from FW with length */
+typedef MLAN_PACK_START struct _wlan_mgmt_pkt
+{
+    /** Packet Length */
+    t_u16 frm_len;
+    /** wlan_802_11_header */
+    wlan_802_11_header wlan_header;
+} MLAN_PACK_END wlan_mgmt_pkt;
+#endif /* UAP_SUPPORT */
+
+#ifdef STA_SUPPORT
+/** (Beaconsize(256)-5(IEId,len,contrystr(3))/3(FirstChan,NoOfChan,MaxPwr) */
+#define MAX_NO_OF_CHAN          40
+
+/** Channel-power table entries */
+typedef MLAN_PACK_START struct _chan_power_11d
+{
+    /** 11D channel */
+    t_u8 chan;
+    /** Band for channel */
+    t_u8 band;
+    /** 11D channel power */
+    t_u8 pwr;
+    /** AP seen on channel */
+    t_u8 ap_seen;
+} MLAN_PACK_END chan_power_11d_t;
+
+/** Region channel info */
+typedef MLAN_PACK_START struct _parsed_region_chan_11d
+{
+    /** 11D channel power per channel */
+    chan_power_11d_t chan_pwr[MAX_NO_OF_CHAN];
+    /** 11D number of channels */
+    t_u8 no_of_chan;
+} MLAN_PACK_END parsed_region_chan_11d_t;
+#endif /* STA_SUPPORT */
+
+/** ChanScanMode_t */
+typedef MLAN_PACK_START struct _ChanScanMode_t
+{
+#ifdef BIG_ENDIAN_SUPPORT
+    /** Reserved */
+    t_u8 reserved_2_7:6;
+    /** Disble channel filtering flag */
+    t_u8 disable_chan_filt:1;
+    /** Channel scan mode passive flag */
+    t_u8 passive_scan:1;
+#else
+    /** Channel scan mode passive flag */
+    t_u8 passive_scan:1;
+    /** Disble channel filtering flag */
+    t_u8 disable_chan_filt:1;
+    /** Reserved */
+    t_u8 reserved_2_7:6;
+#endif
+} MLAN_PACK_END ChanScanMode_t;
+
+/** secondary channel is below */
+#define SECOND_CHANNEL_BELOW    0x30
+/** secondary channel is above */
+#define SECOND_CHANNEL_ABOVE    0x10
+/** ChanScanParamSet_t */
+typedef MLAN_PACK_START struct _ChanScanParamSet_t
+{
+    /** Channel scan parameter : Radio type */
+    t_u8 radio_type;
+    /** Channel scan parameter : Channel number */
+    t_u8 chan_number;
+    /** Channel scan parameter : Channel scan mode */
+    ChanScanMode_t chan_scan_mode;
+    /** Channel scan parameter : Minimum scan time */
+    t_u16 min_scan_time;
+    /** Channel scan parameter : Maximum scan time */
+    t_u16 max_scan_time;
+} MLAN_PACK_END ChanScanParamSet_t;
+
+/** MrvlIEtypes_ChanListParamSet_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_ChanListParamSet_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** Channel scan parameters */
+    ChanScanParamSet_t chan_scan_param[1];
+} MLAN_PACK_END MrvlIEtypes_ChanListParamSet_t;
+
+/** ChanBandParamSet_t */
+typedef struct _ChanBandParamSet_t
+{
+    /** Channel scan parameter : Radio type */
+    t_u8 radio_type;
+    /** Channel number */
+    t_u8 chan_number;
+} ChanBandParamSet_t;
+
+/** MrvlIEtypes_ChanBandListParamSet_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_ChanBandListParamSet_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** Channel Band parameters */
+    ChanBandParamSet_t chan_band_param[1];
+} MLAN_PACK_END MrvlIEtypes_ChanBandListParamSet_t;
+
+/** MrvlIEtypes_RatesParamSet_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_RatesParamSet_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** Rates */
+    t_u8 rates[1];
+} MLAN_PACK_END MrvlIEtypes_RatesParamSet_t;
+
+/** MrvlIEtypes_SsIdParamSet_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_SsIdParamSet_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** SSID */
+    t_u8 ssid[1];
+} MLAN_PACK_END MrvlIEtypes_SsIdParamSet_t;
+
+/** MrvlIEtypes_NumProbes_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_NumProbes_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** Number of probes */
+    t_u16 num_probes;
+} MLAN_PACK_END MrvlIEtypes_NumProbes_t;
+
+/** MrvlIEtypes_WildCardSsIdParamSet_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_WildCardSsIdParamSet_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** Maximum SSID length */
+    t_u8 max_ssid_length;
+    /** SSID */
+    t_u8 ssid[1];
+} MLAN_PACK_END MrvlIEtypes_WildCardSsIdParamSet_t;
+
+/**TSF data size */
+#define TSF_DATA_SIZE            8
+/** Table of TSF values returned in the scan result */
+typedef MLAN_PACK_START struct _MrvlIEtypes_TsfTimestamp_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** the length of each TSF data is 8 bytes, could be multiple TSF here */
+    t_u8 tsf_data[1];
+} MLAN_PACK_END MrvlIEtypes_TsfTimestamp_t;
+
+/** CfParamSet_t */
+typedef MLAN_PACK_START struct _CfParamSet_t
+{
+    /** CF parameter : Count */
+    t_u8 cfp_cnt;
+    /** CF parameter : Period */
+    t_u8 cfp_period;
+    /** CF parameter : Duration */
+    t_u16 cfp_max_duration;
+    /** CF parameter : Duration remaining */
+    t_u16 cfp_duration_remaining;
+} MLAN_PACK_END CfParamSet_t;
+
+/** IbssParamSet_t */
+typedef MLAN_PACK_START struct _IbssParamSet_t
+{
+    /** ATIM window value */
+    t_u16 atim_window;
+} MLAN_PACK_END IbssParamSet_t;
+
+/** MrvlIEtypes_SsParamSet_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_SsParamSet_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** CF/IBSS parameters sets */
+    union
+    {
+        /** CF parameter set */
+        CfParamSet_t cf_param_set[1];
+        /** IBSS parameter set */
+        IbssParamSet_t ibss_param_set[1];
+    } cf_ibss;
+} MLAN_PACK_END MrvlIEtypes_SsParamSet_t;
+
+/** FhParamSet_t */
+typedef MLAN_PACK_START struct _FhParamSet_t
+{
+    /** FH parameter : Dwell time */
+    t_u16 dwell_time;
+    /** FH parameter : Hop set */
+    t_u8 hop_set;
+    /** FH parameter : Hop pattern */
+    t_u8 hop_pattern;
+    /** FH parameter : Hop index */
+    t_u8 hop_index;
+} MLAN_PACK_END FhParamSet_t;
+
+/** DsParamSet_t */
+typedef MLAN_PACK_START struct _DsParamSet_t
+{
+    /** Current channel number */
+    t_u8 current_chan;
+} MLAN_PACK_END DsParamSet_t;
+
+/** MrvlIEtypes_PhyParamSet_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_PhyParamSet_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** FH/DS parameters */
+    union
+    {
+        /** FH parameter set */
+        FhParamSet_t fh_param_set[1];
+        /** DS parameter set */
+        DsParamSet_t ds_param_set[1];
+    } fh_ds;
+} MLAN_PACK_END MrvlIEtypes_PhyParamSet_t;
+
+/* Auth type to be used in the Authentication portion of an Assoc seq */
+/** MrvlIEtypes_AuthType_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_AuthType_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** Authentication type */
+    t_u16 auth_type;
+} MLAN_PACK_END MrvlIEtypes_AuthType_t;
+
+/** MrvlIETypes_ActionFrame_t */
+typedef MLAN_PACK_START struct
+{
+    MrvlIEtypesHeader_t header;   /**< Header */
+
+    t_u8 srcAddr[MLAN_MAC_ADDR_LENGTH];
+    t_u8 dstAddr[MLAN_MAC_ADDR_LENGTH];
+
+    IEEEtypes_ActionFrame_t actionFrame;
+
+} MLAN_PACK_END MrvlIETypes_ActionFrame_t;
+
+/** MrvlIEtypes_RxBaSync_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_RxBaSync_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** mac address */
+    t_u8 mac[MLAN_MAC_ADDR_LENGTH];
+    /** tid */
+    t_u8 tid;
+    /** reserved field */
+    t_u8 reserved;
+    /** start seq num */
+    t_u16 seq_num;
+    /** bitmap len */
+    t_u16 bitmap_len;
+    /** bitmap */
+    t_u8 bitmap[1];
+} MLAN_PACK_END MrvlIEtypes_RxBaSync_t;
+
+/** MrvlIEtypes_RsnParamSet_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_RsnParamSet_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** RSN IE */
+    t_u8 rsn_ie[1];
+} MLAN_PACK_END MrvlIEtypes_RsnParamSet_t;
+
+/** Key_param_set fixed length */
+#define KEYPARAMSET_FIXED_LEN 6
+
+/** MrvlIEtype_KeyParamSet_t */
+typedef MLAN_PACK_START struct _MrvlIEtype_KeyParamSet_t
+{
+    /** Type ID */
+    t_u16 type;
+    /** Length of Payload */
+    t_u16 length;
+    /** Type of Key: WEP=0, TKIP=1, AES=2 */
+    t_u16 key_type_id;
+    /** Key Control Info specific to a key_type_id */
+    t_u16 key_info;
+    /** Length of key */
+    t_u16 key_len;
+    /** Key material of size key_len */
+    t_u8 key[50];
+} MLAN_PACK_END MrvlIEtype_KeyParamSet_t;
+
+/** HostCmd_DS_802_11_KEY_MATERIAL */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_KEY_MATERIAL
+{
+    /** Action */
+    t_u16 action;
+    /** Key parameter set */
+    MrvlIEtype_KeyParamSet_t key_param_set;
+} MLAN_PACK_END HostCmd_DS_802_11_KEY_MATERIAL;
+
+/** Data structure of WMM QoS information */
+typedef MLAN_PACK_START struct _WmmQosInfo_t
+{
+#ifdef BIG_ENDIAN_SUPPORT
+    /** QoS UAPSD */
+    t_u8 qos_uapsd:1;
+    /** Reserved */
+    t_u8 reserved:3;
+    /** Parameter set count */
+    t_u8 para_set_count:4;
+#else
+    /** Parameter set count */
+    t_u8 para_set_count:4;
+    /** Reserved */
+    t_u8 reserved:3;
+    /** QoS UAPSD */
+    t_u8 qos_uapsd:1;
+#endif                          /* BIG_ENDIAN_SUPPORT */
+} MLAN_PACK_END WmmQosInfo_t, *pWmmQosInfo_t;
+
+/** Data structure of WMM ECW */
+typedef MLAN_PACK_START struct _WmmEcw_t
+{
+#ifdef BIG_ENDIAN_SUPPORT
+    /** Maximum Ecw */
+    t_u8 ecw_max:4;
+    /** Minimum Ecw */
+    t_u8 ecw_min:4;
+#else
+    /** Minimum Ecw */
+    t_u8 ecw_min:4;
+    /** Maximum Ecw */
+    t_u8 ecw_max:4;
+#endif                          /* BIG_ENDIAN_SUPPORT */
+} MLAN_PACK_END WmmEcw_t, *pWmmEcw_t;
+
+/** Data structure of WMM Aci/Aifsn */
+typedef MLAN_PACK_START struct _WmmAciAifsn_t
+{
+#ifdef BIG_ENDIAN_SUPPORT
+    /** Reserved */
+    t_u8 reserved:1;
+    /** Aci */
+    t_u8 aci:2;
+    /** Acm */
+    t_u8 acm:1;
+    /** Aifsn */
+    t_u8 aifsn:4;
+#else
+    /** Aifsn */
+    t_u8 aifsn:4;
+    /** Acm */
+    t_u8 acm:1;
+    /** Aci */
+    t_u8 aci:2;
+    /** Reserved */
+    t_u8 reserved:1;
+#endif                          /* BIG_ENDIAN_SUPPORT */
+} MLAN_PACK_END WmmAciAifsn_t, *pWmmAciAifsn_t;
+
+/** Data structure of WMM AC parameters  */
+typedef MLAN_PACK_START struct _WmmAcParameters_t
+{
+    WmmAciAifsn_t aci_aifsn;       /**< AciAifSn */
+    WmmEcw_t ecw;                 /**< Ecw */
+    t_u16 tx_op_limit;                        /**< Tx op limit */
+} MLAN_PACK_END WmmAcParameters_t, *pWmmAcParameters_t;
+
+/** Data structure of WMM parameter  */
+typedef MLAN_PACK_START struct _WmmParameter_t
+{
+    /** OuiType:  00:50:f2:02 */
+    t_u8 ouitype[4];
+    /** Oui subtype: 01 */
+    t_u8 ouisubtype;
+    /** version: 01 */
+    t_u8 version;
+    /** QoS information */
+    t_u8 qos_info;
+    /** Reserved */
+    t_u8 reserved;
+    /** AC Parameters Record WMM_AC_BE, WMM_AC_BK, WMM_AC_VI, WMM_AC_VO */
+    WmmAcParameters_t ac_params[MAX_AC_QUEUES];
+} MLAN_PACK_END WmmParameter_t, *pWmmParameter_t;
+
+/* Definition of firmware host command */
+/** HostCmd_DS_GEN */
+typedef MLAN_PACK_START struct _HostCmd_DS_GEN
+{
+    /** Command */
+    t_u16 command;
+    /** Size */
+    t_u16 size;
+    /** Sequence number */
+    t_u16 seq_num;
+    /** Result */
+    t_u16 result;
+} MLAN_PACK_END HostCmd_DS_GEN;
+
+/** Size of HostCmd_DS_GEN */
+#define S_DS_GEN        sizeof(HostCmd_DS_GEN)
+
+/** Address type: broadcast */
+#define ADDR_TYPE_BROADCAST		1
+/* Address type: unicast */
+#define ADDR_TYPE_UNICAST		2
+/* Address type: multicast */
+#define ADDR_TYPE_MULTICAST		3
+
+/** Ether type: any */
+#define ETHER_TYPE_ANY			0xffff
+/** Ether type: ARP */
+#define ETHER_TYPE_ARP			0x0608
+
+/** IPv4 address any */
+#define IPV4_ADDR_ANY			0xffffffff
+
+/** Header structure for ARP filter */
+typedef MLAN_PACK_START struct _arpfilter_header
+{
+        /** Type */
+    t_u16 type;
+        /** TLV length */
+    t_u16 len;
+} MLAN_PACK_END arpfilter_header;
+
+/** Filter entry structure */
+typedef MLAN_PACK_START struct _filter_entry
+{
+        /** Address type */
+    t_u16 addr_type;
+        /** Ether type */
+    t_u16 eth_type;
+        /** IPv4 address */
+    t_u32 ipv4_addr;
+} MLAN_PACK_END filter_entry;
+
+typedef MLAN_PACK_START struct _HostCmd_DS_MEF_CFG
+{
+    /** Criteria */
+    t_u32 criteria;
+    /** Number of entries */
+    t_u16 nentries;
+} MLAN_PACK_END HostCmd_DS_MEF_CFG;
+
+/* HostCmd_DS_802_11_SLEEP_PERIOD */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_SLEEP_PERIOD
+{
+    /** ACT_GET/ACT_SET */
+    t_u16 action;
+
+    /** Sleep Period in msec */
+    t_u16 sleep_pd;
+} MLAN_PACK_END HostCmd_DS_802_11_SLEEP_PERIOD;
+
+/* HostCmd_DS_802_11_SLEEP_PARAMS */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_SLEEP_PARAMS
+{
+    /** ACT_GET/ACT_SET */
+    t_u16 action;
+    /** Sleep clock error in ppm */
+    t_u16 error;
+    /** Wakeup offset in usec */
+    t_u16 offset;
+    /** Clock stabilization time in usec */
+    t_u16 stable_time;
+    /** Control periodic calibration */
+    t_u8 cal_control;
+    /** Control the use of external sleep clock */
+    t_u8 external_sleep_clk;
+    /** Reserved field, should be set to zero */
+    t_u16 reserved;
+} MLAN_PACK_END HostCmd_DS_802_11_SLEEP_PARAMS;
+
+/** Sleep response control */
+typedef enum _sleep_resp_ctrl
+{
+    RESP_NOT_NEEDED = 0,
+    RESP_NEEDED,
+} sleep_resp_ctrl;
+
+/** Structure definition for the new ieee power save parameters*/
+typedef struct __ps_param
+{
+      /** Null packet interval */
+    t_u16 null_pkt_interval;
+      /** Num dtims */
+    t_u16 multiple_dtims;
+      /** becaon miss interval */
+    t_u16 bcn_miss_timeout;
+      /** local listen interval */
+    t_u16 local_listen_interval;
+     /** Adhoc awake period */
+    t_u16 adhoc_wake_period;
+     /** mode - (0x01 - firmware to automatically choose PS_POLL or NULL mode, 0x02 - PS_POLL, 0x03 - NULL mode ) */
+    t_u16 mode;
+     /** Delay to PS in milliseconds */
+    t_u16 delay_to_ps;
+} ps_param;
+
+/** Structure definition for the new auto deep sleep command */
+typedef struct __auto_ds_param
+{
+     /** Deep sleep inactivity timeout */
+    t_u16 deep_sleep_timeout;
+} auto_ds_param;
+
+/** Structure definition for sleep confirmation in the new ps command */
+typedef struct __sleep_confirm_param
+{
+     /** response control 0x00 - response not needed, 0x01 - response needed */
+    t_u16 resp_ctrl;
+} sleep_confirm_param;
+
+/** bitmap for get auto deepsleep */
+#define BITMAP_AUTO_DS         0x01
+/** bitmap for sta power save */
+#define BITMAP_STA_PS          0x10
+/** bitmap for uap inactivity based PS */
+#define BITMAP_UAP_INACT_PS    0x100
+/** bitmap for uap DTIM PS */
+#define BITMAP_UAP_DTIM_PS     0x200
+/** Structure definition for the new ieee power save parameters*/
+typedef struct _auto_ps_param
+{
+    /** bitmap for enable power save mode */
+    t_u16 ps_bitmap;
+    /* auto deep sleep parameter, sta power save parameter uap inactivity
+       parameter uap DTIM parameter */
+} auto_ps_param;
+
+/** fix size for auto ps */
+#define AUTO_PS_FIX_SIZE    4
+
+/** TLV type : auto ds param */
+#define TLV_TYPE_AUTO_DS_PARAM        (PROPRIETARY_TLV_BASE_ID + 0x71)  // 0x0171
+/** TLV type : ps param */
+#define TLV_TYPE_PS_PARAM             (PROPRIETARY_TLV_BASE_ID + 0x72)  // 0x0172
+
+/** MrvlIEtypes_auto_ds_param_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_auto_ds_param_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** auto ds param */
+    auto_ds_param param;
+} MLAN_PACK_END MrvlIEtypes_auto_ds_param_t;
+
+/** MrvlIEtypes_ps_param_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_ps_param_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** ps param */
+    ps_param param;
+} MLAN_PACK_END MrvlIEtypes_ps_param_t;
+
+/** Structure definition for new power save command */
+typedef MLAN_PACK_START struct _HostCmd_DS_PS_MODE_ENH
+{
+    /** Action */
+    t_u16 action;
+    /** Data speciifc to action */
+    /* For IEEE power save data will be as UINT16 mode (0x01 - firmware to
+       automatically choose PS_POLL or NULL mode, 0x02 - PS_POLL, 0x03 - NULL
+       mode ) UINT16 NullpacketInterval UINT16 NumDtims UINT16
+       BeaconMissInterval UINT16 locallisteninterval UINT16 adhocawakeperiod */
+
+    /* For auto deep sleep */
+    /* UINT16 Deep sleep inactivity timeout */
+
+    /* For PS sleep confirm UINT16 responeCtrl - 0x00 - reponse from fw not
+       needed, 0x01 - response from fw is needed */
+
+    union
+    {
+    /** PS param definition */
+        ps_param opt_ps;
+    /** Auto ds param definition */
+        auto_ds_param auto_ds;
+    /** Sleep comfirm param definition */
+        sleep_confirm_param sleep_cfm;
+    /** bitmap for get PS info and Disable PS mode */
+        t_u16 ps_bitmap;
+    /** auto ps param */
+        auto_ps_param auto_ps;
+    } params;
+} MLAN_PACK_END HostCmd_DS_802_11_PS_MODE_ENH;
+
+/** HostCmd_DS_GET_HW_SPEC */
+typedef MLAN_PACK_START struct _HostCmd_DS_GET_HW_SPEC
+{
+    /** HW Interface version number */
+    t_u16 hw_if_version;
+    /** HW version number */
+    t_u16 version;
+    /** Reserved field */
+    t_u16 reserved;
+    /** Max no of Multicast address  */
+    t_u16 num_of_mcast_adr;
+    /** MAC address */
+    t_u8 permanent_addr[MLAN_MAC_ADDR_LENGTH];
+    /** Region Code */
+    t_u16 region_code;
+    /** Number of antenna used */
+    t_u16 number_of_antenna;
+    /** FW release number, example 0x1234=1.2.3.4 */
+    t_u32 fw_release_number;
+    /** Reserved field */
+    t_u32 reserved_1;
+    /** Reserved field */
+    t_u32 reserved_2;
+    /** Reserved field */
+    t_u32 reserved_3;
+    /** FW/HW Capability */
+    t_u32 fw_cap_info;
+    /** 802.11n Device Capabilities */
+    t_u32 dot_11n_dev_cap;
+    /** MIMO abstraction of MCSs supported by device */
+    t_u8 dev_mcs_support;
+        /** Reserved */
+    t_u16 reserved_7;
+        /** mgmt IE buffer count */
+    t_u16 mgmt_buf_count;
+} MLAN_PACK_END HostCmd_DS_GET_HW_SPEC;
+
+/**  HostCmd_DS_802_11_CFG_DATA */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_CFG_DATA
+{
+    /** Action */
+    t_u16 action;
+    /** Type */
+    t_u16 type;
+    /** Data length */
+    t_u16 data_len;
+    /** Data */
+} MLAN_PACK_END HostCmd_DS_802_11_CFG_DATA;
+
+/**  HostCmd_DS_CMD_802_11_RSSI_INFO */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_RSSI_INFO
+{
+    /** Action */
+    t_u16 action;
+    /** Parameter used for exponential averaging for Data */
+    t_u16 ndata;
+    /** Parameter used for exponential averaging for Beacon */
+    t_u16 nbcn;
+    /** Reserved field 0 */
+    t_u16 reserved[9];
+    /** Reserved field 1 */
+    t_u64 reserved_1;
+} MLAN_PACK_END HostCmd_DS_802_11_RSSI_INFO;
+
+/** HostCmd_DS_802_11_RSSI_INFO_RSP */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_RSSI_INFO_RSP
+{
+    /** Action */
+    t_u16 action;
+    /** Parameter used for exponential averaging for Data */
+    t_u16 ndata;
+    /** Parameter used for exponential averaging for beacon */
+    t_u16 nbcn;
+    /** Last Data RSSI in dBm */
+    t_s16 data_rssi_last;
+    /** Last Data NF in dBm */
+    t_s16 data_nf_last;
+    /** AVG DATA RSSI in dBm */
+    t_s16 data_rssi_avg;
+    /** AVG DATA NF in dBm */
+    t_s16 data_nf_avg;
+    /** Last BEACON RSSI in dBm */
+    t_s16 bcn_rssi_last;
+    /** Last BEACON NF in dBm */
+    t_s16 bcn_nf_last;
+    /** AVG BEACON RSSI in dBm */
+    t_s16 bcn_rssi_avg;
+    /** AVG BEACON NF in dBm */
+    t_s16 bcn_nf_avg;
+    /** Last RSSI Beacon TSF */
+    t_u64 tsf_bcn;
+} MLAN_PACK_END HostCmd_DS_802_11_RSSI_INFO_RSP;
+
+/** HostCmd_DS_802_11_MAC_ADDRESS */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_MAC_ADDRESS
+{
+    /** Action */
+    t_u16 action;
+    /** MAC address */
+    t_u8 mac_addr[MLAN_MAC_ADDR_LENGTH];
+} MLAN_PACK_END HostCmd_DS_802_11_MAC_ADDRESS;
+
+/** HostCmd_DS_MAC_CONTROL */
+typedef MLAN_PACK_START struct _HostCmd_DS_MAC_CONTROL
+{
+    /** Action */
+    t_u16 action;
+    /** Reserved field */
+    t_u16 reserved;
+} MLAN_PACK_END HostCmd_DS_MAC_CONTROL;
+
+/** HostCmd_DS_CMD_TX_DATA_PAUSE */
+typedef MLAN_PACK_START struct _HostCmd_DS_CMD_TX_DATA_PAUSE
+{
+    /** Action */
+    t_u16 action;
+    /** Enable/disable Tx data pause */
+    t_u8 enable_tx_pause;
+    /** Max number of TX buffers allowed for all PS clients*/
+    t_u8 pause_tx_count;
+} MLAN_PACK_END HostCmd_DS_CMD_TX_DATA_PAUSE;
+
+/** TLV type : TX pause TLV */
+#define TLV_TYPE_TX_PAUSE      (PROPRIETARY_TLV_BASE_ID + 0x94) // 0x0194
+/** MrvlIEtypes_SsIdParamSet_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_tx_pause_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** peer mac address */
+    t_u8 peermac[MLAN_MAC_ADDR_LENGTH];
+    /** Tx pause state, 1--pause, 0--free flowing */
+    t_u8 tx_pause;
+    /** total packets queued for the client */
+    t_u8 pkt_cnt;
+} MLAN_PACK_END MrvlIEtypes_tx_pause_t;
+
+/**  HostCmd_CMD_MAC_MULTICAST_ADR */
+typedef MLAN_PACK_START struct _HostCmd_DS_MAC_MULTICAST_ADR
+{
+    /** Action */
+    t_u16 action;
+    /** Number of addresses */
+    t_u16 num_of_adrs;
+    /** List of MAC */
+    t_u8 mac_list[MLAN_MAC_ADDR_LENGTH * MLAN_MAX_MULTICAST_LIST_SIZE];
+} MLAN_PACK_END HostCmd_DS_MAC_MULTICAST_ADR;
+
+/**  HostCmd_CMD_802_11_DEAUTHENTICATE */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_DEAUTHENTICATE
+{
+    /** MAC address */
+    t_u8 mac_addr[MLAN_MAC_ADDR_LENGTH];
+    /** Deauthentication resaon code */
+    t_u16 reason_code;
+} MLAN_PACK_END HostCmd_DS_802_11_DEAUTHENTICATE;
+
+/** HostCmd_DS_802_11_ASSOCIATE */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_ASSOCIATE
+{
+    /** Peer STA address */
+    t_u8 peer_sta_addr[MLAN_MAC_ADDR_LENGTH];
+    /** Capability information */
+    IEEEtypes_CapInfo_t cap_info;
+    /** Listen interval */
+    t_u16 listen_interval;
+    /** Beacon period */
+    t_u16 beacon_period;
+    /** DTIM period */
+    t_u8 dtim_period;
+
+    /**
+     *  MrvlIEtypes_SsIdParamSet_t  SsIdParamSet;
+     *  MrvlIEtypes_PhyParamSet_t   PhyParamSet;
+     *  MrvlIEtypes_SsParamSet_t    SsParamSet;
+     *  MrvlIEtypes_RatesParamSet_t RatesParamSet;
+     */
+} MLAN_PACK_END HostCmd_DS_802_11_ASSOCIATE;
+
+/** HostCmd_CMD_802_11_ASSOCIATE response */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_ASSOCIATE_RSP
+{
+    /** Association response structure */
+    IEEEtypes_AssocRsp_t assoc_rsp;
+} MLAN_PACK_END HostCmd_DS_802_11_ASSOCIATE_RSP;
+
+/** HostCmd_DS_802_11_AD_HOC_START*/
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_AD_HOC_START
+{
+    /** AdHoc SSID */
+    t_u8 ssid[MLAN_MAX_SSID_LENGTH];
+    /** BSS mode */
+    t_u8 bss_mode;
+    /** Beacon period */
+    t_u16 beacon_period;
+    /** DTIM period */
+    t_u8 dtim_period;
+    /** SS parameter set */
+    IEEEtypes_SsParamSet_t ss_param_set;
+    /** PHY parameter set */
+    IEEEtypes_PhyParamSet_t phy_param_set;
+    /** Reserved field */
+    t_u16 reserved1;
+    /** Capability information */
+    IEEEtypes_CapInfo_t cap;
+    /** Supported data rates */
+    t_u8 DataRate[HOSTCMD_SUPPORTED_RATES];
+} MLAN_PACK_END HostCmd_DS_802_11_AD_HOC_START;
+
+/**  HostCmd_CMD_802_11_AD_HOC_START response */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_AD_HOC_START_RESULT
+{
+    /** Padding */
+    t_u8 pad[3];
+    /** AdHoc BSSID */
+    t_u8 bssid[MLAN_MAC_ADDR_LENGTH];
+    /** Padding to sync with FW structure*/
+    t_u8 pad2[2];
+    /** Result */
+    t_u8 result;
+} MLAN_PACK_END HostCmd_DS_802_11_AD_HOC_START_RESULT;
+
+/**  HostCmd_CMD_802_11_AD_HOC_START response */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_AD_HOC_JOIN_RESULT
+{
+    /** Result */
+    t_u8 result;
+} MLAN_PACK_END HostCmd_DS_802_11_AD_HOC_JOIN_RESULT;
+
+/** AdHoc_BssDesc_t */
+typedef MLAN_PACK_START struct _AdHoc_BssDesc_t
+{
+    /** BSSID */
+    t_u8 bssid[MLAN_MAC_ADDR_LENGTH];
+    /** SSID */
+    t_u8 ssid[MLAN_MAX_SSID_LENGTH];
+    /** BSS mode */
+    t_u8 bss_mode;
+    /** Beacon period */
+    t_u16 beacon_period;
+    /** DTIM period */
+    t_u8 dtim_period;
+    /** Timestamp */
+    t_u8 time_stamp[8];
+    /** Local time */
+    t_u8 local_time[8];
+    /** PHY parameter set */
+    IEEEtypes_PhyParamSet_t phy_param_set;
+    /** SS parameter set */
+    IEEEtypes_SsParamSet_t ss_param_set;
+    /** Capability information */
+    IEEEtypes_CapInfo_t cap;
+    /** Supported data rates */
+    t_u8 data_rates[HOSTCMD_SUPPORTED_RATES];
+
+    /* 
+     *  DO NOT ADD ANY FIELDS TO THIS STRUCTURE.
+     *  It is used in the Adhoc join command and will cause a 
+     *  binary layout mismatch with the firmware 
+     */
+} MLAN_PACK_END AdHoc_BssDesc_t;
+
+/** HostCmd_DS_802_11_AD_HOC_JOIN */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_AD_HOC_JOIN
+{
+    /** AdHoc BSS descriptor */
+    AdHoc_BssDesc_t bss_descriptor;
+    /** Reserved field */
+    t_u16 reserved1;
+    /** Reserved field */
+    t_u16 reserved2;
+} MLAN_PACK_END HostCmd_DS_802_11_AD_HOC_JOIN;
+
+/** HostCmd_DS_802_11_GET_LOG */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_GET_LOG
+{
+    /** Number of multicast transmitted frames */
+    t_u32 mcast_tx_frame;
+    /** Number of failures */
+    t_u32 failed;
+    /** Number of retries */
+    t_u32 retry;
+    /** Number of multiretries */
+    t_u32 multiretry;
+    /** Number of duplicate frames */
+    t_u32 frame_dup;
+    /** Number of RTS success */
+    t_u32 rts_success;
+    /** Number of RTS failure */
+    t_u32 rts_failure;
+    /** Number of acknowledgement failure */
+    t_u32 ack_failure;
+    /** Number of fragmented packets received */
+    t_u32 rx_frag;
+    /** Number of multicast frames received */
+    t_u32 mcast_rx_frame;
+    /** FCS error */
+    t_u32 fcs_error;
+    /** Number of transmitted frames */
+    t_u32 tx_frame;
+    /** Reserved field */
+    t_u32 reserved;
+    /** Number of WEP icv error for each key */
+    t_u32 wep_icv_err_cnt[4];
+} MLAN_PACK_END HostCmd_DS_802_11_GET_LOG;
+
+/**_HostCmd_TX_RATE_QUERY */
+typedef MLAN_PACK_START struct _HostCmd_TX_RATE_QUERY
+{
+    /** Tx rate */
+    t_u8 tx_rate;
+    /** Ht Info [Bit 0] RxRate format: LG=0, HT=1
+     * [Bit 1]  HT Bandwidth: BW20 = 0, BW40 = 1
+     * [Bit 2]  HT Guard Interval: LGI = 0, SGI = 1 */
+    t_u8 ht_info;
+} MLAN_PACK_END HostCmd_TX_RATE_QUERY;
+
+typedef MLAN_PACK_START struct _hs_config_param
+{
+    /** bit0=1: broadcast data
+      * bit1=1: unicast data
+      * bit2=1: mac events
+      * bit3=1: multicast data
+      */
+    t_u32 conditions;
+    /** GPIO pin or 0xff for interface */
+    t_u8 gpio;
+    /** gap in milliseconds or or 0xff for special setting when GPIO is used to wakeup host */
+    t_u8 gap;
+} MLAN_PACK_END hs_config_param;
+
+/** HS Action 0x0001 - Configure enhanced host sleep mode, 0x0002 - Activate enhanced host sleep mode */
+typedef enum _Host_Sleep_Action
+{
+    HS_CONFIGURE = 0x0001,
+    HS_ACTIVATE = 0x0002,
+} Host_Sleep_Action;
+
+/** Structure definition for activating enhanced hs */
+typedef MLAN_PACK_START struct __hs_activate_param
+{
+     /** response control 0x00 - response not needed, 0x01 - response needed */
+    t_u16 resp_ctrl;
+} MLAN_PACK_END hs_activate_param;
+
+/** HostCmd_DS_802_11_HS_CFG_ENH */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_HS_CFG_ENH
+{
+    /** Action 0x0001 - Configure enhanced host sleep mode, 0x0002 - Activate enhanced host sleep mode */
+    t_u16 action;
+
+    union
+    {
+    /** Configure enhanced hs */
+        hs_config_param hs_config;
+    /** Activate enhanced hs */
+        hs_activate_param hs_activate;
+    } params;
+} MLAN_PACK_END HostCmd_DS_802_11_HS_CFG_ENH;
+
+/** SNMP_MIB_INDEX */
+typedef enum _SNMP_MIB_INDEX
+{
+    OpRateSet_i = 1,
+    DtimPeriod_i = 3,
+    RtsThresh_i = 5,
+    ShortRetryLim_i = 6,
+    LongRetryLim_i = 7,
+    FragThresh_i = 8,
+    Dot11D_i = 9,
+    Dot11H_i = 10,
+    WwsMode_i = 17,
+    Thermal_i = 34
+} SNMP_MIB_INDEX;
+
+/** max SNMP buf size */
+#define MAX_SNMP_BUF_SIZE   128
+
+/**  HostCmd_CMD_802_11_SNMP_MIB */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_SNMP_MIB
+{
+    /** SNMP query type */
+    t_u16 query_type;
+    /** SNMP object ID */
+    t_u16 oid;
+    /** SNMP buffer size */
+    t_u16 buf_size;
+    /** Value */
+    t_u8 value[1];
+} MLAN_PACK_END HostCmd_DS_802_11_SNMP_MIB;
+
+/** Radio on */
+#define RADIO_ON                                0x01
+/** Radio off */
+#define RADIO_OFF                               0x00
+
+/** HostCmd_CMD_802_11_RADIO_CONTROL */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_RADIO_CONTROL
+{
+    /** Action */
+    t_u16 action;
+    /** Control */
+    t_u16 control;
+} MLAN_PACK_END HostCmd_DS_802_11_RADIO_CONTROL;
+
+/** MrvlRateScope_t */
+typedef MLAN_PACK_START struct _MrvlRateScope_t
+{
+    /** Header Type */
+    t_u16 type;
+    /** Header Length */
+    t_u16 length;
+    /** Bitmap of HR/DSSS rates */
+    t_u16 hr_dsss_rate_bitmap;
+    /** Bitmap of OFDM rates */
+    t_u16 ofdm_rate_bitmap;
+    /** Bitmap of HT-MCSs allowed for initial rate */
+    t_u16 ht_mcs_rate_bitmap[8];
+} MLAN_PACK_END MrvlRateScope_t;
+
+/** MrvlRateDropControl_t */
+typedef MLAN_PACK_START struct _MrvlRateDropControl_t
+{
+    /** Header Length */
+    t_u16 length;
+    /** Rate Information */
+    t_u32 rate_info[1];
+} MLAN_PACK_END MrvlRateDropControl_t;
+
+/** MrvlRateDropPattern_t */
+typedef MLAN_PACK_START struct _MrvlRateDropPattern_t
+{
+    /** Header Type */
+    t_u16 type;
+    /** Header Length */
+    t_u16 length;
+    /** Rate Drop Mode */
+    t_u32 rate_drop_mode;
+    /* MrvlRateDropControl_t RateDropControl[0]; */
+} MLAN_PACK_END MrvlRateDropPattern_t;
+
+/** HostCmd_DS_TX_RATE_CFG */
+typedef MLAN_PACK_START struct _HostCmd_DS_TX_RATE_CFG
+{
+    /** Action */
+    t_u16 action;
+    /** Tx Rate Configuration Index */
+    t_u16 cfg_index;
+    /* MrvlRateScope_t RateScope; MrvlRateDropPattern_t RateDrop; */
+} MLAN_PACK_END HostCmd_DS_TX_RATE_CFG;
+
+/** Power_Group_t */
+typedef MLAN_PACK_START struct _Power_Group_t
+{
+    /** Modulation Class */
+    t_u8 modulation_class;
+    /** MCS Code or Legacy RateID */
+    t_u8 first_rate_code;
+    /** MCS Code or Legacy RateID */
+    t_u8 last_rate_code;
+    /** Power Adjustment Step */
+    t_s8 power_step;
+    /** Minimal Tx Power Level [dBm] */
+    t_s8 power_min;
+    /** Maximal Tx Power Level [dBm] */
+    t_s8 power_max;
+    /** 0: HTBW20, 1: HTBW40 */
+    t_u8 ht_bandwidth;
+    /** Reserved */
+    t_u8 reserved;
+} MLAN_PACK_END Power_Group_t;
+
+/** MrvlTypes_Power_Group_t */
+typedef MLAN_PACK_START struct _MrvlTypes_Power_Group_t
+{
+    /** Header Type */
+    t_u16 type;
+    /** Header Length */
+    t_u16 length;
+    /* Power_Group_t PowerGroups */
+} MLAN_PACK_END MrvlTypes_Power_Group_t;
+
+/** HostCmd_CMD_TXPWR_CFG */
+typedef MLAN_PACK_START struct _HostCmd_DS_TXPWR_CFG
+{
+    /** Action */
+    t_u16 action;
+    /** Power group configuration index */
+    t_u16 cfg_index;
+    /** Power group configuration mode */
+    t_u32 mode;
+    /* MrvlTypes_Power_Group_t PowerGrpCfg[0] */
+} MLAN_PACK_END HostCmd_DS_TXPWR_CFG;
+
+/** HostCmd_CMD_802_11_RF_TX_POWER */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_RF_TX_POWER
+{
+    /** Action */
+    t_u16 action;
+    /** Current power level */
+    t_u16 current_level;
+    /** Maximum power */
+    t_u8 max_power;
+    /** Minimum power */
+    t_u8 min_power;
+} MLAN_PACK_END HostCmd_DS_802_11_RF_TX_POWER;
+
+/** Connection type infra */
+#define CONNECTION_TYPE_INFRA 	0
+/** Connection type adhoc */
+#define CONNECTION_TYPE_ADHOC	1
+#ifdef WFD_SUPPORT
+/** BSS Mode: WFD Client */
+#define BSS_MODE_WFD_CLIENT 	0
+/** BSS Mode: WFD GO */
+#define BSS_MODE_WFD_GO     	2
+#endif
+/** HostCmd_DS_SET_BSS_MODE */
+typedef MLAN_PACK_START struct _HostCmd_DS_SET_BSS_MODE
+{
+    /** connection type */
+    t_u8 con_type;
+} MLAN_PACK_END HostCmd_DS_SET_BSS_MODE;
+
+#ifdef STA_SUPPORT
+
+/**
+ * @brief Structure used internally in the wlan driver to configure a scan.
+ *
+ * Sent to the command process module to configure the firmware
+ *   scan command prepared by wlan_cmd_802_11_scan.
+ *
+ * @sa wlan_scan_networks
+ *
+ */
+typedef MLAN_PACK_START struct _wlan_scan_cmd_config
+{
+    /**
+     *  BSS Type to be sent in the firmware command
+     *
+     *  Field can be used to restrict the types of networks returned in the
+     *    scan.  Valid settings are:
+     *
+     *   - MLAN_SCAN_MODE_BSS  (infrastructure)
+     *   - MLAN_SCAN_MODE_IBSS (adhoc)
+     *   - MLAN_SCAN_MODE_ANY  (unrestricted, adhoc and infrastructure)
+     */
+    t_u8 bss_mode;
+
+    /**
+     *  Specific BSSID used to filter scan results in the firmware
+     */
+    t_u8 specific_bssid[MLAN_MAC_ADDR_LENGTH];
+
+    /**
+     *  Length of TLVs sent in command starting at tlvBuffer
+     */
+    t_u32 tlv_buf_len;
+
+    /**
+     *  SSID TLV(s) and ChanList TLVs to be sent in the firmware command
+     *
+     *  TLV_TYPE_CHANLIST, MrvlIEtypes_ChanListParamSet_t
+     *  TLV_TYPE_SSID, MrvlIEtypes_SsIdParamSet_t
+     */
+    t_u8 tlv_buf[1];            /* SSID TLV(s) and ChanList TLVs are stored
+                                   here */
+} MLAN_PACK_END wlan_scan_cmd_config;
+
+/**
+ *  Sructure to retrieve the scan table
+ */
+typedef MLAN_PACK_START struct
+{
+    /**
+     *  - Zero based scan entry to start retrieval in command request
+     *  - Number of scans entries returned in command response
+     */
+    t_u32 scan_number;
+    /**
+     * Buffer marker for multiple wlan_ioctl_get_scan_table_entry structures.
+     *   Each struct is padded to the nearest 32 bit boundary.
+     */
+    t_u8 scan_table_entry_buf[1];
+} MLAN_PACK_END wlan_get_scan_table_info;
+
+/** Generic structure defined for parsing WPA/RSN IEs for GTK/PTK OUIs */
+typedef MLAN_PACK_START struct
+{
+        /** Group key oui */
+    t_u8 GrpKeyOui[4];
+        /** Number of PTKs */
+    t_u8 PtkCnt[2];
+        /** Ptk body starts here */
+    t_u8 PtkBody[4];
+} MLAN_PACK_END IEBody;
+#endif /* STA_SUPPORT */
+
+/* 
+ * This scan handle Country Information IE(802.11d compliant) 
+ * Define data structure for HostCmd_CMD_802_11_SCAN 
+ */
+/** HostCmd_DS_802_11_SCAN */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_SCAN
+{
+    /** BSS mode */
+    t_u8 bss_mode;
+    /** BSSID */
+    t_u8 bssid[MLAN_MAC_ADDR_LENGTH];
+    /** TLV buffer */
+    t_u8 tlv_buffer[1];
+    /** MrvlIEtypes_SsIdParamSet_t      SsIdParamSet; 
+     *  MrvlIEtypes_ChanListParamSet_t  ChanListParamSet;
+     *  MrvlIEtypes_RatesParamSet_t     OpRateSet; 
+     */
+} MLAN_PACK_END HostCmd_DS_802_11_SCAN;
+
+/** HostCmd_DS_802_11_SCAN_RSP */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_SCAN_RSP
+{
+    /** Size of BSS descriptor */
+    t_u16 bss_descript_size;
+    /** Numner of sets */
+    t_u8 number_of_sets;
+    /** BSS descriptor and TLV buffer */
+    t_u8 bss_desc_and_tlv_buffer[1];
+} MLAN_PACK_END HostCmd_DS_802_11_SCAN_RSP;
+
+/** MrvlIEtypes_DomainParamSet_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_DomainParamSet
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** Country code */
+    t_u8 country_code[COUNTRY_CODE_LEN];
+    /** Set of subbands */
+    IEEEtypes_SubbandSet_t sub_band[1];
+} MLAN_PACK_END MrvlIEtypes_DomainParamSet_t;
+
+/** HostCmd_DS_802_11D_DOMAIN_INFO */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11D_DOMAIN_INFO
+{
+    /** Action */
+    t_u16 action;
+    /** Domain parameter set */
+    MrvlIEtypes_DomainParamSet_t domain;
+} MLAN_PACK_END HostCmd_DS_802_11D_DOMAIN_INFO;
+
+/** HostCmd_DS_802_11D_DOMAIN_INFO_RSP */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11D_DOMAIN_INFO_RSP
+{
+    /** Action */
+    t_u16 action;
+    /** Domain parameter set */
+    MrvlIEtypes_DomainParamSet_t domain;
+} MLAN_PACK_END HostCmd_DS_802_11D_DOMAIN_INFO_RSP;
+
+/** HostCmd_DS_11N_ADDBA_REQ */
+typedef MLAN_PACK_START struct _HostCmd_DS_11N_ADDBA_REQ
+{
+    /** Result of the ADDBA Request Operation */
+    t_u8 add_req_result;
+    /** Peer MAC address */
+    t_u8 peer_mac_addr[MLAN_MAC_ADDR_LENGTH];
+    /** Dialog Token */
+    t_u8 dialog_token;
+    /** Block Ack Parameter Set */
+    t_u16 block_ack_param_set;
+    /** Block Act Timeout Value */
+    t_u16 block_ack_tmo;
+    /** Starting Sequence Number */
+    t_u16 ssn;
+} MLAN_PACK_END HostCmd_DS_11N_ADDBA_REQ;
+
+/** HostCmd_DS_11N_ADDBA_RSP */
+typedef MLAN_PACK_START struct _HostCmd_DS_11N_ADDBA_RSP
+{
+    /** Result of the ADDBA Response Operation */
+    t_u8 add_rsp_result;
+    /** Peer MAC address */
+    t_u8 peer_mac_addr[MLAN_MAC_ADDR_LENGTH];
+    /** Dialog Token */
+    t_u8 dialog_token;
+    /** Status Code */
+    t_u16 status_code;
+    /** Block Ack Parameter Set */
+    t_u16 block_ack_param_set;
+    /** Block Act Timeout Value */
+    t_u16 block_ack_tmo;
+    /** Starting Sequence Number */
+    t_u16 ssn;
+} MLAN_PACK_END HostCmd_DS_11N_ADDBA_RSP;
+
+/** HostCmd_DS_11N_DELBA */
+typedef MLAN_PACK_START struct _HostCmd_DS_11N_DELBA
+{
+    /** Result of the ADDBA Request Operation */
+    t_u8 del_result;
+    /** Peer MAC address */
+    t_u8 peer_mac_addr[MLAN_MAC_ADDR_LENGTH];
+    /** Delete Block Ack Parameter Set */
+    t_u16 del_ba_param_set;
+    /** Reason Code sent for DELBA */
+    t_u16 reason_code;
+    /** Reserved */
+    t_u8 reserved;
+} MLAN_PACK_END HostCmd_DS_11N_DELBA;
+
+/** HostCmd_DS_11N_BATIMEOUT */
+typedef MLAN_PACK_START struct _HostCmd_DS_11N_BATIMEOUT
+{
+    /** TID */
+    t_u8 tid;
+    /** Peer MAC address */
+    t_u8 peer_mac_addr[MLAN_MAC_ADDR_LENGTH];
+    /** Delete Block Ack Parameter Set */
+    t_u8 origninator;
+} MLAN_PACK_END HostCmd_DS_11N_BATIMEOUT;
+
+/** HostCmd_DS_11N_CFG */
+typedef MLAN_PACK_START struct _HostCmd_DS_11N_CFG
+{
+    /** Action */
+    t_u16 action;
+    /** HTTxCap */
+    t_u16 ht_tx_cap;
+    /** HTTxInfo */
+    t_u16 ht_tx_info;
+} MLAN_PACK_END HostCmd_DS_11N_CFG;
+
+/** HostCmd_DS_TXBUF_CFG*/
+typedef MLAN_PACK_START struct _HostCmd_DS_TXBUF_CFG
+{
+    /** Action */
+    t_u16 action;
+    /** Buffer Size */
+    t_u16 buff_size;
+} MLAN_PACK_END HostCmd_DS_TXBUF_CFG;
+
+/** HostCmd_DS_AMSDU_AGGR_CTRL */
+typedef MLAN_PACK_START struct _HostCmd_DS_AMSDU_AGGR_CTRL
+{
+    /** Action */
+    t_u16 action;
+    /** Enable */
+    t_u16 enable;
+    /** Get the current Buffer Size valid */
+    t_u16 curr_buf_size;
+} MLAN_PACK_END HostCmd_DS_AMSDU_AGGR_CTRL;
+
+/** HostCmd_DS_ECL_SYSTEM_CLOCK_CONFIG */
+typedef MLAN_PACK_START struct _HostCmd_DS_ECL_SYSTEM_CLOCK_CONFIG
+{
+    /** Action */
+    t_u16 action;
+    /** Current system clock */
+    t_u16 cur_sys_clk;
+    /** Clock type */
+    t_u16 sys_clk_type;
+    /** Length of clocks */
+    t_u16 sys_clk_len;
+    /** System clocks */
+    t_u16 sys_clk[16];
+} MLAN_PACK_END HostCmd_DS_ECL_SYSTEM_CLOCK_CONFIG;
+
+/** MrvlIEtypes_WmmParamSet_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_WmmParamSet_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** WMM IE */
+    t_u8 wmm_ie[1];
+} MLAN_PACK_END MrvlIEtypes_WmmParamSet_t;
+
+/** MrvlIEtypes_WmmQueueStatus_t */
+typedef MLAN_PACK_START struct
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** Queue index */
+    t_u8 queue_index;
+    /** Disabled flag */
+    t_u8 disabled;
+    /** Medium time allocation in 32us units*/
+    t_u16 medium_time;
+    /** Flow required flag */
+    t_u8 flow_required;
+    /** Flow created flag */
+    t_u8 flow_created;
+    /** Reserved */
+    t_u32 reserved;
+} MLAN_PACK_END MrvlIEtypes_WmmQueueStatus_t;
+
+/** Size of a TSPEC.  Used to allocate necessary buffer space in commands */
+#define WMM_TSPEC_SIZE              63
+
+/** Maximum number of AC QOS queues available in the driver/firmware */
+#define MAX_AC_QUEUES               4
+
+/** Extra IE bytes allocated in messages for appended IEs after a TSPEC */
+#define WMM_ADDTS_EXTRA_IE_BYTES    256
+
+/** Extra TLV bytes allocated in messages for configuring WMM Queues */
+#define WMM_QUEUE_CONFIG_EXTRA_TLV_BYTES 64
+
+/** Number of bins in the histogram for the HostCmd_DS_WMM_QUEUE_STATS */
+#define WMM_STATS_PKTS_HIST_BINS  7
+
+/**
+ *  @brief Firmware command structure to retrieve the firmware WMM status.
+ *
+ *  Used to retrieve the status of each WMM AC Queue in TLV 
+ *    format (MrvlIEtypes_WmmQueueStatus_t) as well as the current WMM
+ *    parameter IE advertised by the AP.  
+ *  
+ *  Used in response to a EVENT_WMM_STATUS_CHANGE event signaling
+ *    a QOS change on one of the ACs or a change in the WMM Parameter in
+ *    the Beacon.
+ *
+ *  TLV based command, byte arrays used for max sizing purpose. There are no 
+ *    arguments sent in the command, the TLVs are returned by the firmware.
+ */
+typedef MLAN_PACK_START struct
+{
+    /** Queue status TLV */
+    t_u8 queue_status_tlv[sizeof(MrvlIEtypes_WmmQueueStatus_t)
+                          * MAX_AC_QUEUES];
+    /** WMM parameter TLV */
+    t_u8 wmm_param_tlv[sizeof(IEEEtypes_WmmParameter_t) + 2];
+}
+MLAN_PACK_END HostCmd_DS_WMM_GET_STATUS;
+
+/**
+ *  @brief Command structure for the HostCmd_CMD_WMM_ADDTS_REQ firmware command
+ */
+typedef MLAN_PACK_START struct
+{
+    mlan_cmd_result_e command_result;    /**< Command result */
+    t_u32 timeout_ms;                    /**< Timeout value in milliseconds */
+    t_u8 dialog_token;                   /**< Dialog token */
+    t_u8 ieee_status_code;               /**< IEEE status code */
+    t_u8 tspec_data[WMM_TSPEC_SIZE];     /**< TSPEC data */
+    t_u8 addts_extra_ie_buf[WMM_ADDTS_EXTRA_IE_BYTES];  /**< Extra IE buffer */
+} MLAN_PACK_END HostCmd_DS_WMM_ADDTS_REQ;
+
+/**
+ *  @brief Command structure for the HostCmd_CMD_WMM_DELTS_REQ firmware command
+ */
+typedef MLAN_PACK_START struct
+{
+    mlan_cmd_result_e command_result;   /**< Command result */
+    t_u8 dialog_token;                  /**< Dialog token */
+    t_u8 ieee_reason_code;              /**< IEEE reason code */
+    t_u8 tspec_data[WMM_TSPEC_SIZE];    /**< TSPEC data */
+} MLAN_PACK_END HostCmd_DS_WMM_DELTS_REQ;
+
+/**
+ *  @brief Command structure for the HostCmd_CMD_WMM_QUEUE_CONFIG firmware cmd
+ *
+ *  Set/Get/Default the Queue parameters for a specific AC in the firmware.
+ */
+typedef MLAN_PACK_START struct
+{
+    mlan_wmm_queue_config_action_e action; /**< Set, Get, or Default */
+    mlan_wmm_ac_e access_category;         /**< WMM_AC_BK(0) to WMM_AC_VO(3) */
+    /** @brief MSDU lifetime expiry per 802.11e
+     *
+     *   - Ignored if 0 on a set command 
+     *   - Set to the 802.11e specified 500 TUs when defaulted
+     */
+    t_u16 msdu_lifetime_expiry;
+    t_u8 tlv_buffer[WMM_QUEUE_CONFIG_EXTRA_TLV_BYTES];  /**< Not supported */
+} MLAN_PACK_END HostCmd_DS_WMM_QUEUE_CONFIG;
+
+/**
+ *  @brief Command structure for the HostCmd_CMD_WMM_QUEUE_STATS firmware cmd
+ *
+ *  Turn statistical collection on/off for a given AC or retrieve the
+ *    accumulated stats for an AC and clear them in the firmware.
+ */
+typedef MLAN_PACK_START struct
+{
+    mlan_wmm_queue_stats_action_e action;  /**< Start, Stop, or Get */
+#ifdef BIG_ENDIAN_SUPPORT
+    t_u8 select_bin:7;          /**< WMM_AC_BK(0) to WMM_AC_VO(3), or TID */
+    t_u8 select_is_userpri:1;   /**< Set if select_bin is UP, Clear for AC */
+#else
+    t_u8 select_is_userpri:1;   /**< Set if select_bin is UP, Clear for AC */
+    t_u8 select_bin:7;          /**< WMM_AC_BK(0) to WMM_AC_VO(3), or TID */
+#endif
+    t_u16 pkt_count;        /**< Number of successful packets transmitted */
+    t_u16 pkt_loss;         /**< Packets lost; not included in pktCount */
+    t_u32 avg_queue_delay;  /**< Average Queue delay in microsec */
+    t_u32 avg_tx_delay;     /**< Average Transmission delay in microsec */
+    t_u16 used_time;        /**< Calc used time - units of 32 microsec */
+    t_u16 policed_time;     /**< Calc policed time - units of 32 microsec */
+    /** @brief Queue Delay Histogram; number of packets per queue delay range
+     *
+     *  [0] -  0ms <= delay < 5ms
+     *  [1] -  5ms <= delay < 10ms
+     *  [2] - 10ms <= delay < 20ms
+     *  [3] - 20ms <= delay < 30ms
+     *  [4] - 30ms <= delay < 40ms
+     *  [5] - 40ms <= delay < 50ms
+     *  [6] - 50ms <= delay < msduLifetime (TUs)
+     */
+    t_u16 delay_histogram[WMM_STATS_PKTS_HIST_BINS];
+    /** Reserved */
+    t_u16 reserved_1;
+} MLAN_PACK_END HostCmd_DS_WMM_QUEUE_STATS;
+
+/**
+ *  @brief Command structure for the HostCmd_CMD_WMM_TS_STATUS firmware cmd
+ *
+ *  Query the firmware to get the status of the WMM Traffic Streams
+ */
+typedef MLAN_PACK_START struct
+{
+    /** TSID: Range: 0->7 */
+    t_u8 tid;
+    /** TSID specified is valid */
+    t_u8 valid;
+    /** AC TSID is active on */
+    t_u8 access_category;
+    /** UP specified for the TSID */
+    t_u8 user_priority;
+    /** Power save mode for TSID: 0 (legacy), 1 (UAPSD) */
+    t_u8 psb;
+    /** Uplink(1), Downlink(2), Bidirectional(3) */
+    t_u8 flow_dir;
+    /** Medium time granted for the TSID */
+    t_u16 medium_time;
+} MLAN_PACK_END HostCmd_DS_WMM_TS_STATUS;
+
+/** Firmware status for a specific AC */
+typedef MLAN_PACK_START struct
+{
+    /** Disabled flag */
+    t_u8 disabled;
+    /** Flow required flag */
+    t_u8 flow_required;
+    /** Flow created flag */
+    t_u8 flow_created;
+} MLAN_PACK_END WmmAcStatus_t;
+
+/**  Local Power Capability */
+typedef MLAN_PACK_START struct _MrvlIEtypes_PowerCapability_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** Minmum power */
+    t_s8 min_power;
+    /** Maximum power */
+    t_s8 max_power;
+} MLAN_PACK_END MrvlIEtypes_PowerCapability_t;
+
+/** HT Capabilities element */
+typedef MLAN_PACK_START struct _MrvlIETypes_HTCap_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+
+    /** HTCap struct */
+    HTCap_t ht_cap;
+} MLAN_PACK_END MrvlIETypes_HTCap_t;
+
+/** HT Information element */
+typedef MLAN_PACK_START struct _MrvlIETypes_HTInfo_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+
+    /** HTInfo struct */
+    HTInfo_t ht_info;
+} MLAN_PACK_END MrvlIETypes_HTInfo_t;
+
+/** 20/40 BSS Coexistence element */
+typedef MLAN_PACK_START struct _MrvlIETypes_2040BSSCo_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+
+    /** BSSCo2040_t struct */
+    BSSCo2040_t bss_co_2040;
+} MLAN_PACK_END MrvlIETypes_2040BSSCo_t;
+
+/** Extended Capabilities element */
+typedef MLAN_PACK_START struct _MrvlIETypes_ExtCap_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+
+    /** ExtCap_t struct */
+    ExtCap_t ext_cap;
+} MLAN_PACK_END MrvlIETypes_ExtCap_t;
+
+/** Overlapping BSS Scan Parameters element */
+typedef MLAN_PACK_START struct _MrvlIETypes_OverlapBSSScanParam_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+
+    /** OBSSScanParam_t struct */
+    OBSSScanParam_t obss_scan_param;
+} MLAN_PACK_END MrvlIETypes_OverlapBSSScanParam_t;
+
+/** Set of MCS values that STA desires to use within the BSS */
+typedef MLAN_PACK_START struct _MrvlIETypes_HTOperationalMCSSet_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+
+    /** Bitmap indicating MCSs that STA desires to use within the BSS */
+    t_u8 ht_operational_mcs_bitmap[16];
+} MLAN_PACK_END MrvlIETypes_HTOperationalMCSSet_t;
+
+/** MrvlIEtypes_PMK_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_PMK_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** PMK */
+    t_u8 pmk[1];
+} MLAN_PACK_END MrvlIEtypes_PMK_t;
+
+/** MrvlIEtypes_Passphrase_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_Passphrase_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** Passphrase */
+    char passphrase[1];
+} MLAN_PACK_END MrvlIEtypes_Passphrase_t;
+
+/* unicastCipher -
+ *      Bit 0   : RFU
+ *      Bit 1   : RFU
+ *      Bit 2   : TKIP
+ *      Bit 3   : AES CCKM
+ *      Bit 2-7 : RFU
+ * multicastCipher -
+ *      Bit 0   : WEP40
+ *      Bit 1   : WEP104
+ *      Bit 2   : TKIP
+ *      Bit 3   : AES
+ *      Bit 4-7 : Reserved for now
+ */
+/** MrvlIEtypes_Cipher_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_Cipher_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** PairCipher */
+    t_u8 pair_cipher;
+    /** GroupCipher */
+    t_u8 group_cipher;
+} MLAN_PACK_END MrvlIEtypes_Cipher_t;
+
+/* rsnMode -    
+ *      Bit 0    : No RSN
+ *      Bit 1-2  : RFU
+ *      Bit 3    : WPA
+ *      Bit 4    : WPA-NONE
+ *      Bit 5    : WPA2
+ *      Bit 6    : AES CCKM
+ *      Bit 7-15 : RFU
+ */
+/** MrvlIEtypes_EncrProto_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_EncrProto_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** EncrProto */
+    t_u16 rsn_mode;
+} MLAN_PACK_END MrvlIEtypes_EncrProto_t;
+
+/** MrvlIEtypes_Bssid_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_Bssid_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** Bssid */
+    t_u8 bssid[MLAN_MAC_ADDR_LENGTH];
+} MLAN_PACK_END MrvlIEtypes_Bssid_t;
+
+/*
+ * This struct will handle GET,SET,CLEAR function for embedded
+ * supplicant.
+ * Define data structure for HostCmd_CMD_802_11_SUPPLICANT_PMK
+ */
+/** HostCmd_DS_802_11_SUPPLICANT_PMK */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_SUPPLICANT_PMK
+{
+    /** CMD Action GET/SET/CLEAR */
+    t_u16 action;
+    /** CacheResult initialized to 0 */
+    t_u16 cache_result;
+    /** TLV Buffer */
+    t_u8 tlv_buffer[1];
+    /** MrvlIEtypes_SsidParamSet_t  SsidParamSet;
+      * MrvlIEtypes_PMK_t           Pmk;
+      * MrvlIEtypes_Passphrase_t    Passphrase;
+      * MrvlIEtypes_Bssid_t         Bssid;
+      **/
+} MLAN_PACK_END HostCmd_DS_802_11_SUPPLICANT_PMK;
+
+/*
+ * This struct will GET the Supplicant supported bitmaps
+ * The GET_CURRENT action will get the network profile used
+ * for the current assocation.
+ * Define data structure for HostCmd_CMD_802_11_SUPPLICANT_PROFILE
+ */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_SUPPLICANT_PROFILE
+{
+    /** GET/SET/GET_CURRENT */
+    t_u16 action;
+    /** Reserved */
+    t_u16 reserved;
+    /** TLVBuffer */
+    t_u8 tlv_buf[1];
+    /* MrvlIEtypes_EncrProto_t */
+} MLAN_PACK_END HostCmd_DS_802_11_SUPPLICANT_PROFILE;
+
+/** HostCmd_CMD_802_11_RF_CHANNEL */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_RF_CHANNEL
+{
+    /** Action */
+    t_u16 action;
+    /** Current channel */
+    t_u16 current_channel;
+    /** RF type */
+    t_u16 rf_type;
+    /** Reserved field */
+    t_u16 reserved;
+#ifdef STA_SUPPORT
+    /** Reserved */
+    t_u8 reserved_1[32];
+#else                           /* STA_SUPPORT */
+    /** List of channels */
+    t_u8 channel_list[32];
+#endif                          /* !STA_SUPPORT */
+} MLAN_PACK_END HostCmd_DS_802_11_RF_CHANNEL;
+
+/** HostCmd_DS_VERSION_EXT */
+typedef MLAN_PACK_START struct _HostCmd_DS_VERSION_EXT
+{
+    /** Selected version string */
+    t_u8 version_str_sel;
+    /** Version string */
+    char version_str[128];
+} MLAN_PACK_END HostCmd_DS_VERSION_EXT;
+
+/** HostCmd_CMD_802_11_RF_ANTENNA */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_RF_ANTENNA
+{
+    /** Action */
+    t_u16 action;
+    /**  Number of antennas or 0xffff(diversity) */
+    t_u16 antenna_mode;
+} MLAN_PACK_END HostCmd_DS_802_11_RF_ANTENNA;
+
+/** HostCmd_DS_802_11_IBSS_STATUS */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_IBSS_STATUS
+{
+    /** Action */
+    t_u16 action;
+    /** Enable */
+    t_u16 enable;
+    /** BSSID */
+    t_u8 bssid[MLAN_MAC_ADDR_LENGTH];
+    /** Beacon interval */
+    t_u16 beacon_interval;
+    /** ATIM window interval */
+    t_u16 atim_window;
+    /** User G rate protection */
+    t_u16 use_g_rate_protect;
+} MLAN_PACK_END HostCmd_DS_802_11_IBSS_STATUS;
+
+/** HostCmd_DS_MGMT_IE_LIST_CFG */
+typedef MLAN_PACK_START struct _HostCmd_DS_MGMT_IE_LIST
+{
+    /** Action */
+    t_u16 action;
+    /** Get/Set mgmt IE */
+    mlan_ds_misc_custom_ie ds_mgmt_ie;
+} MLAN_PACK_END HostCmd_DS_MGMT_IE_LIST_CFG;
+
+/** HostCmd_DS_HEART_BEAT */
+typedef MLAN_PACK_START struct _HostCmd_DS_HEART_BEAT
+{
+    /** Action */
+    t_u16 action;
+    /** Timer for the host */
+    t_u16 h2d_timer;
+    /** Timer for the device */
+    t_u16 d2h_timer;
+    /** Delay for re-attach */
+    t_u16 reconnect_delay;
+} MLAN_PACK_END HostCmd_DS_HEART_BEAT;
+
+/** HostCmd_CMD_MAC_REG_ACCESS */
+typedef MLAN_PACK_START struct _HostCmd_DS_MAC_REG_ACCESS
+{
+    /** Action */
+    t_u16 action;
+    /** MAC register offset */
+    t_u16 offset;
+    /** MAC register value */
+    t_u32 value;
+} MLAN_PACK_END HostCmd_DS_MAC_REG_ACCESS;
+
+/** HostCmd_CMD_BBP_REG_ACCESS */
+typedef MLAN_PACK_START struct _HostCmd_DS_BBP_REG_ACCESS
+{
+    /** Acion */
+    t_u16 action;
+    /** BBP register offset */
+    t_u16 offset;
+    /** BBP register value */
+    t_u8 value;
+    /** Reserved field */
+    t_u8 reserved[3];
+} MLAN_PACK_END HostCmd_DS_BBP_REG_ACCESS;
+
+/**  HostCmd_CMD_RF_REG_ACCESS */
+typedef MLAN_PACK_START struct _HostCmd_DS_RF_REG_ACCESS
+{
+    /** Action */
+    t_u16 action;
+    /** RF register offset */
+    t_u16 offset;
+    /** RF register value */
+    t_u8 value;
+    /** Reserved field */
+    t_u8 reserved[3];
+} MLAN_PACK_END HostCmd_DS_RF_REG_ACCESS;
+
+/**  HostCmd_CMD_PMIC_REG_ACCESS */
+typedef MLAN_PACK_START struct _HostCmd_DS_PMIC_REG_ACCESS
+{
+    /** Action */
+    t_u16 action;
+    /** PMIC register offset */
+    t_u16 offset;
+    /** PMIC register value */
+    t_u8 value;
+    /** Reserved field */
+    t_u8 reserved[3];
+} MLAN_PACK_END HostCmd_DS_PMIC_REG_ACCESS;
+
+/** HostCmd_DS_802_11_EEPROM_ACCESS */
+typedef MLAN_PACK_START struct _HostCmd_DS_802_11_EEPROM_ACCESS
+{
+        /** Action */
+    t_u16 action;
+
+        /** multiple 4 */
+    t_u16 offset;
+        /** Number of bytes */
+    t_u16 byte_count;
+        /** Value */
+    t_u8 value;
+} MLAN_PACK_END HostCmd_DS_802_11_EEPROM_ACCESS;
+
+/** HostCmd_DS_MEM_ACCESS */
+typedef MLAN_PACK_START struct _HostCmd_DS_MEM_ACCESS
+{
+        /** Action */
+    t_u16 action;
+        /** Reserved field */
+    t_u16 reserved;
+        /** Address */
+    t_u32 addr;
+        /** Value */
+    t_u32 value;
+} MLAN_PACK_END HostCmd_DS_MEM_ACCESS;
+
+/** HostCmd_DS_INACTIVITY_TIMEOUT_EXT */
+typedef MLAN_PACK_START struct _HostCmd_DS_INACTIVITY_TIMEOUT_EXT
+{
+    /** ACT_GET/ACT_SET */
+    t_u16 action;
+    /** uS, 0 means 1000uS(1ms) */
+    t_u16 timeout_unit;
+    /** Inactivity timeout for unicast data */
+    t_u16 unicast_timeout;
+    /** Inactivity timeout for multicast data */
+    t_u16 mcast_timeout;
+    /** Timeout for additional RX traffic after Null PM1 packet exchange */
+    t_u16 ps_entry_timeout;
+    /** Reserved to further expansion */
+    t_u16 reserved;
+} MLAN_PACK_END HostCmd_DS_INACTIVITY_TIMEOUT_EXT;
+
+/** TLV type : STA Mac address */
+#define TLV_TYPE_STA_MAC_ADDRESS      (PROPRIETARY_TLV_BASE_ID + 0x20)  // 0x0120
+
+/** MrvlIEtypes_MacAddr_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_MacAddr_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** mac address */
+    t_u8 mac[MLAN_MAC_ADDR_LENGTH];
+} MLAN_PACK_END MrvlIEtypes_MacAddr_t;
+
+#ifdef UAP_SUPPORT
+/** TLV type : AP Channel band Config */
+#define TLV_TYPE_UAP_CHAN_BAND_CONFIG (PROPRIETARY_TLV_BASE_ID + 0x2a)  // 0x012a
+/** TLV type : AP Mac address */
+#define TLV_TYPE_UAP_MAC_ADDRESS      (PROPRIETARY_TLV_BASE_ID + 0x2b)  // 0x012b
+/** TLV type : AP Beacon period */
+#define TLV_TYPE_UAP_BEACON_PERIOD    (PROPRIETARY_TLV_BASE_ID + 0x2c)  // 0x012c
+/** TLV type : AP DTIM period */
+#define TLV_TYPE_UAP_DTIM_PERIOD      (PROPRIETARY_TLV_BASE_ID + 0x2d)  // 0x012d
+/** TLV type : AP Tx power */
+#define TLV_TYPE_UAP_TX_POWER         (PROPRIETARY_TLV_BASE_ID + 0x2f)  // 0x012f
+/** TLV type : AP SSID broadcast control */
+#define TLV_TYPE_UAP_BCAST_SSID_CTL   (PROPRIETARY_TLV_BASE_ID + 0x30)  // 0x0130
+/** TLV type : AP Preamble control */
+#define TLV_TYPE_UAP_PREAMBLE_CTL     (PROPRIETARY_TLV_BASE_ID + 0x31)  // 0x0131
+/** TLV type : AP Antenna control */
+#define TLV_TYPE_UAP_ANTENNA_CTL      (PROPRIETARY_TLV_BASE_ID + 0x32)  // 0x0132
+/** TLV type : AP RTS threshold */
+#define TLV_TYPE_UAP_RTS_THRESHOLD    (PROPRIETARY_TLV_BASE_ID + 0x33)  // 0x0133
+/** TLV type : AP Tx data rate */
+#define TLV_TYPE_UAP_TX_DATA_RATE     (PROPRIETARY_TLV_BASE_ID + 0x35)  // 0x0135
+/** TLV type: AP Packet forwarding control */
+#define TLV_TYPE_UAP_PKT_FWD_CTL      (PROPRIETARY_TLV_BASE_ID + 0x36)  // 0x0136
+/** TLV type: STA information */
+#define TLV_TYPE_UAP_STA_INFO         (PROPRIETARY_TLV_BASE_ID + 0x37)  // 0x0137
+/** TLV type: AP STA MAC address filter */
+#define TLV_TYPE_UAP_STA_MAC_ADDR_FILTER (PROPRIETARY_TLV_BASE_ID + 0x38)       // 0x0138
+/** TLV type: AP STA ageout timer */
+#define TLV_TYPE_UAP_STA_AGEOUT_TIMER (PROPRIETARY_TLV_BASE_ID + 0x39)  // 0x0139
+/** TLV type: AP WEP keys */
+#define TLV_TYPE_UAP_WEP_KEY          (PROPRIETARY_TLV_BASE_ID + 0x3b)  // 0x013b
+/** TLV type: AP WPA passphrase */
+#define TLV_TYPE_UAP_WPA_PASSPHRASE   (PROPRIETARY_TLV_BASE_ID + 0x3c)  // 0x013c
+/** TLV type: AP protocol */
+#define TLV_TYPE_UAP_ENCRYPT_PROTOCOL (PROPRIETARY_TLV_BASE_ID + 0x40)  // 0x0140
+/** TLV type: AP AKMP */
+#define TLV_TYPE_UAP_AKMP             (PROPRIETARY_TLV_BASE_ID + 0x41)  // 0x0141
+/** TLV type: AP Fragment threshold */
+#define TLV_TYPE_UAP_FRAG_THRESHOLD   (PROPRIETARY_TLV_BASE_ID + 0x46)  // 0x0146
+/** TLV type: AP Group rekey timer */
+#define TLV_TYPE_UAP_GRP_REKEY_TIME   (PROPRIETARY_TLV_BASE_ID + 0x47)  // 0x0147
+/**TLV type : AP Max Station number */
+#define TLV_TYPE_UAP_MAX_STA_CNT      (PROPRIETARY_TLV_BASE_ID + 0x55)  // 0x0155
+/**TLV type : AP Retry limit */
+#define TLV_TYPE_UAP_RETRY_LIMIT      (PROPRIETARY_TLV_BASE_ID + 0x5d)  // 0x015d
+/** TLV type : AP MCBC data rate */
+#define TLV_TYPE_UAP_MCBC_DATA_RATE   (PROPRIETARY_TLV_BASE_ID + 0x62)  // 0x0162
+/**TLV type: AP RSN replay protection */
+#define TLV_TYPE_UAP_RSN_REPLAY_PROTECT  (PROPRIETARY_TLV_BASE_ID + 0x64)       // 0x0164
+/** TLV ID : Management Frame */
+#define TLV_TYPE_UAP_MGMT_FRAME          (PROPRIETARY_TLV_BASE_ID + 0x68)       // 0x0168
+#ifdef UAP_SUPPORT
+/**TLV type: AP mgmt IE passthru mask */
+#define TLV_TYPE_UAP_MGMT_IE_PASSTHRU_MASK  (PROPRIETARY_TLV_BASE_ID + 0x70)    // 0x0170
+#endif
+/** TLV : 20/40 coex config */
+#define TLV_TYPE_2040_BSS_COEX_CONTROL      (PROPRIETARY_TLV_BASE_ID + 0x98)    // 0x0198
+/**TLV type: AP pairwise handshake timeout */
+#define TLV_TYPE_UAP_EAPOL_PWK_HSK_TIMEOUT  (PROPRIETARY_TLV_BASE_ID + 0x75)    // 0x0175
+/**TLV type: AP pairwise handshake retries */
+#define TLV_TYPE_UAP_EAPOL_PWK_HSK_RETRIES  (PROPRIETARY_TLV_BASE_ID + 0x76)    // 0x0176
+/**TLV type: AP groupwise handshake timeout */
+#define TLV_TYPE_UAP_EAPOL_GWK_HSK_TIMEOUT  (PROPRIETARY_TLV_BASE_ID + 0x77)    // 0x0177
+/**TLV type: AP groupwise handshake retries */
+#define TLV_TYPE_UAP_EAPOL_GWK_HSK_RETRIES  (PROPRIETARY_TLV_BASE_ID + 0x78)    // 0x0178
+/** TLV type: AP PS STA ageout timer */
+#define TLV_TYPE_UAP_PS_STA_AGEOUT_TIMER (PROPRIETARY_TLV_BASE_ID + 0x7b)       // 0x017b
+/** TLV type : Pairwise Cipher */
+#define TLV_TYPE_PWK_CIPHER              (PROPRIETARY_TLV_BASE_ID + 0x91)       // 0x0191
+/** TLV type : Group Cipher */
+#define TLV_TYPE_GWK_CIPHER              (PROPRIETARY_TLV_BASE_ID + 0x92)       // 0x0192
+/** TLV type : BSS Status */
+#define TLV_TYPE_BSS_STATUS              (PROPRIETARY_TLV_BASE_ID + 0x93)       // 0x0193
+
+/** Assoc Request */
+#define SUBTYPE_ASSOC_REQUEST        0
+/** ReAssoc Request */
+#define SUBTYPE_REASSOC_REQUEST      2
+
+/** MrvlIEtypes_beacon_period_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_beacon_period_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** beacon period */
+    t_u16 beacon_period;
+} MLAN_PACK_END MrvlIEtypes_beacon_period_t;
+
+/** MrvlIEtypes_dtim_period_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_dtim_period_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** DTIM period */
+    t_u8 dtim_period;
+} MLAN_PACK_END MrvlIEtypes_dtim_period_t;
+
+/** MrvlIEtypes_tx_rate_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_tx_rate_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** tx data rate */
+    t_u16 tx_data_rate;
+} MLAN_PACK_END MrvlIEtypes_tx_rate_t;
+
+/** MrvlIEtypes_mcbc_rate_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_mcbc_rate_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** mcbc data rate */
+    t_u16 mcbc_data_rate;
+} MLAN_PACK_END MrvlIEtypes_mcbc_rate_t;
+
+/** MrvlIEtypes_tx_power_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_tx_power_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** tx power */
+    t_u8 tx_power;
+} MLAN_PACK_END MrvlIEtypes_tx_power_t;
+
+/** MrvlIEtypes_bcast_ssid_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_bcast_ssid_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** bcast ssid control*/
+    t_u8 bcast_ssid_ctl;
+} MLAN_PACK_END MrvlIEtypes_bcast_ssid_t;
+
+/** MrvlIEtypes_antenna_mode_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_antenna_mode_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** which antenna */
+    t_u8 which_antenna;
+    /** antenna mode*/
+    t_u8 antenna_mode;
+} MLAN_PACK_END MrvlIEtypes_antenna_mode_t;
+
+/** MrvlIEtypes_pkt_forward_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_pkt_forward_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** pkt foward control */
+    t_u8 pkt_forward_ctl;
+} MLAN_PACK_END MrvlIEtypes_pkt_forward_t;
+
+/** MrvlIEtypes_max_sta_count_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_max_sta_count_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** max station count */
+    t_u16 max_sta_count;
+} MLAN_PACK_END MrvlIEtypes_max_sta_count_t;
+
+/** MrvlIEtypes_sta_ageout_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_sta_ageout_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** station age out timer */
+    t_u32 sta_ageout_timer;
+} MLAN_PACK_END MrvlIEtypes_sta_ageout_t;
+
+/** MrvlIEtypes_rts_threshold_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_rts_threshold_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** rts threshold */
+    t_u16 rts_threshold;
+} MLAN_PACK_END MrvlIEtypes_rts_threshold_t;
+
+/** MrvlIEtypes_frag_threshold_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_frag_threshold_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** frag threshold */
+    t_u16 frag_threshold;
+} MLAN_PACK_END MrvlIEtypes_frag_threshold_t;
+
+/** MrvlIEtypes_retry_limit_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_retry_limit_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** retry limit */
+    t_u8 retry_limit;
+} MLAN_PACK_END MrvlIEtypes_retry_limit_t;
+
+/** MrvlIEtypes_eapol_pwk_hsk_timeout_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_eapol_pwk_hsk_timeout_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** pairwise update timeout */
+    t_u32 pairwise_update_timeout;
+} MLAN_PACK_END MrvlIEtypes_eapol_pwk_hsk_timeout_t;
+
+/** MrvlIEtypes_eapol_pwk_hsk_retries_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_eapol_pwk_hsk_retries_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** pairwise handshake retries */
+    t_u32 pwk_retries;
+} MLAN_PACK_END MrvlIEtypes_eapol_pwk_hsk_retries_t;
+
+/** MrvlIEtypes_eapol_gwk_hsk_timeout_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_eapol_gwk_hsk_timeout_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** groupwise update timeout */
+    t_u32 groupwise_update_timeout;
+} MLAN_PACK_END MrvlIEtypes_eapol_gwk_hsk_timeout_t;
+
+/** MrvlIEtypes_eapol_gwk_hsk_retries_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_eapol_gwk_hsk_retries_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** groupwise handshake retries */
+    t_u32 gwk_retries;
+} MLAN_PACK_END MrvlIEtypes_eapol_gwk_hsk_retries_t;
+
+#ifdef UAP_SUPPORT
+/** MrvlIEtypes_mgmt_ie_passthru_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_mgmt_ie_passthru_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** mgmt IE mask value */
+    t_u32 mgmt_ie_mask;
+} MLAN_PACK_END MrvlIEtypes_mgmt_ie_passthru_t;
+#endif
+
+/** TLV buffer : 2040 coex config */
+typedef MLAN_PACK_START struct _MrvlIEtypes_2040_coex_enable_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** Enable */
+    t_u8 enable_2040coex;
+} MLAN_PACK_END MrvlIEtypes_2040_coex_enable_t;
+
+/** MrvlIEtypes_mac_filter_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_mac_filter_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** Filter mode */
+    t_u8 filter_mode;
+    /** Number of STA MACs */
+    t_u8 count;
+    /** STA MAC addresses buffer */
+    t_u8 mac_address[1];
+} MLAN_PACK_END MrvlIEtypes_mac_filter_t;
+
+/** setting for band_config - band=5GHZ */
+#define BAND_CONFIG_5GHZ        0x01
+
+/** MrvlIEtypes_retry_limit_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_channel_band_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** Band Configuration
+     *
+     * [7-6] Channel Selection Mode; 00 manual, 01 ACS
+     * [3-2] Channel Width; 00 20 MHz
+     * [1-0] Band Info; 00 2.4 GHz
+     */
+    t_u8 band_config;
+    /** channel */
+    t_u8 channel;
+} MLAN_PACK_END MrvlIEtypes_channel_band_t;
+
+/** MrvlIEtypes_auth_type_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_auth_type_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** Authentication type */
+    t_u8 auth_type;
+} MLAN_PACK_END MrvlIEtypes_auth_type_t;
+
+/** MrvlIEtypes_encrypt_protocol_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_encrypt_protocol_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** encryption protocol */
+    t_u16 protocol;
+} MLAN_PACK_END MrvlIEtypes_encrypt_protocol_t;
+
+/** MrvlIEtypes_pwk_cipher_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_pwk_cipher_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** protocol */
+    t_u16 protocol;
+    /** pairwise cipher */
+    t_u8 pairwise_cipher;
+    /** reserved */
+    t_u8 reserved;
+} MLAN_PACK_END MrvlIEtypes_pwk_cipher_t;
+
+/** MrvlIEtypes_gwk_cipher_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_gwk_cipher_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** group cipher */
+    t_u8 group_cipher;
+    /** reserved */
+    t_u8 reserved;
+} MLAN_PACK_END MrvlIEtypes_gwk_cipher_t;
+
+/** MrvlIEtypes_akmp_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_akmp_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** key management */
+    t_u16 key_mgmt;
+    /** key management operation */
+    t_u16 key_mgmt_operation;
+} MLAN_PACK_END MrvlIEtypes_akmp_t;
+
+/** MrvlIEtypes_passphrase_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_passphrase_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** passphrase */
+    t_u8 passphrase[1];
+} MLAN_PACK_END MrvlIEtypes_passphrase_t;
+
+/** MrvlIEtypes_rsn_replay_prot_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_rsn_replay_prot_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** rsn replay proection */
+    t_u8 rsn_replay_prot;
+} MLAN_PACK_END MrvlIEtypes_rsn_replay_prot_t;
+
+/** MrvlIEtypes_group_rekey_time_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_group_rekey_time_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** group key rekey time */
+    t_u32 gk_rekey_time;
+} MLAN_PACK_END MrvlIEtypes_group_rekey_time_t;
+
+/** MrvlIEtypes_wep_key_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_wep_key_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** key index */
+    t_u8 key_index;
+    /** is default */
+    t_u8 is_default;
+    /** key data */
+    t_u8 key[1];
+} MLAN_PACK_END MrvlIEtypes_wep_key_t;
+
+/** MrvlIEtypes_bss_status_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_bss_status_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** BSS status, READ only */
+    t_u16 bss_status;
+} MLAN_PACK_END MrvlIEtypes_bss_status_t;
+
+/** MrvlIEtypes_preamble_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_preamble_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** preamble type, READ only */
+    t_u8 preamble_type;
+} MLAN_PACK_END MrvlIEtypes_preamble_t;
+
+/** MrvlIEtypes_wmm_parameter_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_wmm_parameter_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** WMM parameter */
+    WmmParameter_t wmm_para;
+} MLAN_PACK_END MrvlIEtypes_wmm_parameter_t;
+
+/** SNMP_MIB_UAP_INDEX */
+typedef enum _SNMP_MIB_UAP_INDEX
+{
+    tkip_mic_failures = 0x0b,
+    ccmp_decrypt_errors = 0x0c,
+    wep_undecryptable_count = 0x0d,
+    wep_icv_error_count = 0x0e,
+    decrypt_failure_count = 0xf,
+    dot11_failed_count = 0x12,
+    dot11_retry_count = 0x13,
+    dot11_multi_retry_count = 0x14,
+    dot11_frame_dup_count = 0x15,
+    dot11_rts_success_count = 0x16,
+    dot11_rts_failure_count = 0x17,
+    dot11_ack_failure_count = 0x18,
+    dot11_rx_fragment_count = 0x19,
+    dot11_mcast_rx_frame_count = 0x1a,
+    dot11_fcs_error_count = 0x1b,
+    dot11_tx_frame_count = 0x1c,
+    dot11_rsna_tkip_cm_invoked = 0x1d,
+    dot11_rsna_4way_hshk_failures = 0x1e,
+    dot11_mcast_tx_count = 0x1f,
+} SNMP_MIB_UAP_INDEX;
+
+/** MrvlIEtypes_snmp_oid_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_snmp_oid_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** data */
+    t_u32 data;
+} MLAN_PACK_END MrvlIEtypes_snmp_oid_t;
+
+/** HostCmd_SYS_CONFIG */
+typedef MLAN_PACK_START struct _HostCmd_DS_SYS_CONFIG
+{
+        /** CMD Action GET/SET*/
+    t_u16 action;
+        /** Tlv buffer */
+    t_u8 tlv_buffer[1];
+} MLAN_PACK_END HostCmd_DS_SYS_CONFIG;
+
+/** HostCmd_SYS_CONFIG */
+typedef MLAN_PACK_START struct _HostCmd_DS_SYS_INFO
+{
+    /** sys info */
+    t_u8 sys_info[64];
+} MLAN_PACK_END HostCmd_DS_SYS_INFO;
+
+/** HostCmd_DS_STA_DEAUTH */
+typedef MLAN_PACK_START struct _HostCmd_DS_STA_DEAUTH
+{
+    /** mac address */
+    t_u8 mac[MLAN_MAC_ADDR_LENGTH];
+    /** reason code */
+    t_u16 reason;
+} MLAN_PACK_END HostCmd_DS_STA_DEAUTH;
+
+/** Host Command id: POWER_MGMT  */
+#define HOST_CMD_POWER_MGMT_EXT                   0x00ef
+/** TLV type: AP Sleep param */
+#define TLV_TYPE_AP_SLEEP_PARAM         (PROPRIETARY_TLV_BASE_ID + 0x6a)        // 0x016a
+/** TLV type: AP Inactivity Sleep param */
+#define TLV_TYPE_AP_INACT_SLEEP_PARAM   (PROPRIETARY_TLV_BASE_ID + 0x6b)        // 0x016b
+
+/** MrvlIEtypes_sleep_param_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_sleep_param_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** control bitmap */
+    t_u32 ctrl_bitmap;
+    /** min_sleep */
+    t_u32 min_sleep;
+    /** max_sleep */
+    t_u32 max_sleep;
+} MLAN_PACK_END MrvlIEtypes_sleep_param_t;
+
+/** MrvlIEtypes_inact_sleep_param_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_inact_sleep_param_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** inactivity timeout */
+    t_u32 inactivity_to;
+
+    /** min_awake */
+    t_u32 min_awake;
+    /** max_awake */
+    t_u32 max_awake;
+} MLAN_PACK_END MrvlIEtypes_inact_sleep_param_t;
+
+/** HostCmd_DS_POWER_MGMT */
+typedef MLAN_PACK_START struct _HostCmd_DS_POWER_MGMT_EXT
+{
+    /** CMD Action Get/Set*/
+    t_u16 action;
+    /** power mode */
+    t_u16 power_mode;
+} MLAN_PACK_END HostCmd_DS_POWER_MGMT_EXT;
+
+/** MrvlIEtypes_ps_sta_ageout_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_ps_sta_ageout_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** station age out timer */
+    t_u32 ps_sta_ageout_timer;
+} MLAN_PACK_END MrvlIEtypes_ps_sta_ageout_t;
+
+/** MrvlIEtypes_sta_info_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_sta_info_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** STA MAC address */
+    t_u8 mac_address[MLAN_MAC_ADDR_LENGTH];
+    /** Power mfg status */
+    t_u8 power_mfg_status;
+    /** RSSI */
+    t_s8 rssi;
+} MLAN_PACK_END MrvlIEtypes_sta_info_t;
+
+/** HostCmd_DS_STA_LIST */
+typedef MLAN_PACK_START struct _HostCmd_DS_STA_LIST
+{
+    /** Number of STAs */
+    t_u16 sta_count;
+    /* MrvlIEtypes_sta_info_t sta_info[0]; */
+} MLAN_PACK_END HostCmd_DS_STA_LIST;
+
+/** TLV ID : WAPI Information */
+#define TLV_TYPE_AP_WAPI_INFO         (PROPRIETARY_TLV_BASE_ID + 0x67)  // 0x0167
+
+/** MrvlIEtypes_sta_info_t */
+typedef MLAN_PACK_START struct _MrvlIEtypes_wapi_info_t
+{
+    /** Header */
+    MrvlIEtypesHeader_t header;
+    /** Multicast PN */
+    t_u8 multicast_PN[16];
+} MLAN_PACK_END MrvlIEtypes_wapi_info_t;
+#endif /* UAP_SUPPORT */
+
+/**
+ * @brief 802.11h Local Power Constraint Marvell extended TLV
+ */
+typedef MLAN_PACK_START struct
+{
+    MrvlIEtypesHeader_t header; /**< Marvell TLV header: ID/Len */
+    t_u8 chan;                  /**< Channel local constraint applies to */
+
+    /** Power constraint included in beacons and used by fw to offset 11d info */
+    t_u8 constraint;
+
+} MLAN_PACK_END MrvlIEtypes_LocalPowerConstraint_t;
+
+/*
+ *
+ * Data structures for driver/firmware command processing
+ *
+ */
+
+/**  TPC Info structure sent in CMD_802_11_TPC_INFO command to firmware */
+typedef MLAN_PACK_START struct
+{
+    MrvlIEtypes_LocalPowerConstraint_t local_constraint;  /**< Local constraint */
+    MrvlIEtypes_PowerCapability_t power_cap;              /**< Power Capability */
+
+} MLAN_PACK_END HostCmd_DS_802_11_TPC_INFO;
+
+/**  TPC Request structure sent in CMD_802_11_TPC_ADAPT_REQ command to firmware */
+typedef MLAN_PACK_START struct
+{
+    t_u8 dest_mac[MLAN_MAC_ADDR_LENGTH];        /**< Destination STA address  */
+    t_u16 timeout;                              /**< Response timeout in ms */
+    t_u8 rate_index;                            /**< IEEE Rate index to send request */
+
+} MLAN_PACK_END HostCmd_TpcRequest;
+
+/**  TPC Response structure received from the CMD_802_11_TPC_ADAPT_REQ command */
+typedef MLAN_PACK_START struct
+{
+    t_u8 tpc_ret_code;      /**< Firmware command result status code */
+    t_s8 tx_power;          /**< Reported TX Power from the TPC Report element */
+    t_s8 link_margin;       /**< Reported link margin from the TPC Report element */
+    t_s8 rssi;              /**< RSSI of the received TPC Report frame */
+
+} MLAN_PACK_END HostCmd_TpcResponse;
+
+/**  CMD_802_11_TPC_ADAPT_REQ substruct. Union of the TPC request and response */
+typedef MLAN_PACK_START union
+{
+    HostCmd_TpcRequest req;   /**< Request struct sent to firmware */
+    HostCmd_TpcResponse resp; /**< Response struct received from firmware */
+
+} MLAN_PACK_END HostCmd_DS_802_11_TPC_ADAPT_REQ;
+
+/**  CMD_802_11_CHAN_SW_ANN firmware command substructure */
+typedef MLAN_PACK_START struct
+{
+    t_u8 switch_mode;   /**< Set to 1 for a quiet switch request, no STA tx */
+    t_u8 new_chan;      /**< Requested new channel */
+    t_u8 switch_count;  /**< Number of TBTTs until the switch is to occur */
+} MLAN_PACK_END HostCmd_DS_802_11_CHAN_SW_ANN;
+
+/**        
+ * @brief Enumeration of measurement types, including max supported 
+ *        enum for 11h/11k
+ */
+typedef MLAN_PACK_START enum _MeasType_t
+{
+    WLAN_MEAS_BASIC = 0,              /**< 11h: Basic */
+    WLAN_MEAS_NUM_TYPES,              /**< Number of enumerated measurements */
+    WLAN_MEAS_11H_MAX_TYPE = WLAN_MEAS_BASIC,          /**< Max 11h measurement */
+
+} MLAN_PACK_END MeasType_t;
+
+/**        
+ * @brief Mode octet of the measurement request element (7.3.2.21)
+ */
+typedef MLAN_PACK_START struct
+{
+#ifdef BIG_ENDIAN_SUPPORT
+    t_u8 rsvd5_7:3;               /**< Reserved */
+    t_u8 duration_mandatory:1;    /**< 11k: duration spec. for meas. is mandatory */
+    t_u8 report:1;                /**< 11h: en/disable report rcpt. of spec. type */
+    t_u8 request:1;               /**< 11h: en/disable requests of specified type */
+    t_u8 enable:1;                /**< 11h: enable report/request bits */
+    t_u8 parallel:1;              /**< 11k: series or parallel with previous meas */
+#else
+    t_u8 parallel:1;              /**< 11k: series or parallel with previous meas */
+    t_u8 enable:1;                /**< 11h: enable report/request bits */
+    t_u8 request:1;               /**< 11h: en/disable requests of specified type */
+    t_u8 report:1;                /**< 11h: en/disable report rcpt. of spec. type */
+    t_u8 duration_mandatory:1;    /**< 11k: duration spec. for meas. is mandatory */
+    t_u8 rsvd5_7:3;               /**< Reserved */
+#endif                          /* BIG_ENDIAN_SUPPORT */
+
+} MLAN_PACK_END MeasReqMode_t;
+
+/**        
+ * @brief Common measurement request structure (7.3.2.21.1 to 7.3.2.21.3)
+ */
+typedef MLAN_PACK_START struct
+{
+    t_u8 channel;      /**< Channel to measure */
+    t_u64 start_time;  /**< TSF Start time of measurement (0 for immediate) */
+    t_u16 duration;    /**< TU duration of the measurement */
+
+} MLAN_PACK_END MeasReqCommonFormat_t;
+
+/**        
+ * @brief Basic measurement request structure (7.3.2.21.1)
+ */
+typedef MeasReqCommonFormat_t MeasReqBasic_t;
+
+/**        
+ * @brief CCA measurement request structure (7.3.2.21.2)
+ */
+typedef MeasReqCommonFormat_t MeasReqCCA_t;
+
+/**        
+ * @brief RPI measurement request structure (7.3.2.21.3)
+ */
+typedef MeasReqCommonFormat_t MeasReqRPI_t;
+
+/**        
+ * @brief Union of the availble measurement request types.  Passed in the 
+ *        driver/firmware interface.
+ */
+typedef union
+{
+    MeasReqBasic_t basic; /**< Basic measurement request */
+    MeasReqCCA_t cca;     /**< CCA measurement request */
+    MeasReqRPI_t rpi;     /**< RPI measurement request */
+
+} MeasRequest_t;
+
+/**        
+ * @brief Mode octet of the measurement report element (7.3.2.22)
+ */
+typedef MLAN_PACK_START struct
+{
+#ifdef BIG_ENDIAN_SUPPORT
+    t_u8 rsvd3_7:5;        /**< Reserved */
+    t_u8 refused:1;        /**< Measurement refused */
+    t_u8 incapable:1;      /**< Incapable of performing measurement */
+    t_u8 late:1;           /**< Start TSF time missed for measurement */
+#else
+    t_u8 late:1;           /**< Start TSF time missed for measurement */
+    t_u8 incapable:1;      /**< Incapable of performing measurement */
+    t_u8 refused:1;        /**< Measurement refused */
+    t_u8 rsvd3_7:5;        /**< Reserved */
+#endif                          /* BIG_ENDIAN_SUPPORT */
+
+} MLAN_PACK_END MeasRptMode_t;
+
+/**        
+ * @brief Basic measurement report (7.3.2.22.1)
+ */
+typedef MLAN_PACK_START struct
+{
+    t_u8 channel;              /**< Channel to measured */
+    t_u64 start_time;          /**< Start time (TSF) of measurement */
+    t_u16 duration;            /**< Duration of measurement in TUs */
+    MeasRptBasicMap_t map;     /**< Basic measurement report */
+
+} MLAN_PACK_END MeasRptBasic_t;
+
+/**        
+ * @brief CCA measurement report (7.3.2.22.2)
+ */
+typedef MLAN_PACK_START struct
+{
+    t_u8 channel;                /**< Channel to measured */
+    t_u64 start_time;            /**< Start time (TSF) of measurement */
+    t_u16 duration;              /**< Duration of measurement in TUs  */
+    t_u8 busy_fraction;          /**< Fractional duration CCA indicated chan busy */
+
+} MLAN_PACK_END MeasRptCCA_t;
+
+/**        
+ * @brief RPI measurement report (7.3.2.22.3)
+ */
+typedef MLAN_PACK_START struct
+{
+    t_u8 channel;              /**< Channel to measured  */
+    t_u64 start_time;          /**< Start time (TSF) of measurement */
+    t_u16 duration;            /**< Duration of measurement in TUs  */
+    t_u8 density[8];           /**< RPI Density histogram report */
+
+} MLAN_PACK_END MeasRptRPI_t;
+
+/**        
+ * @brief Union of the availble measurement report types.  Passed in the 
+ *        driver/firmware interface.
+ */
+typedef union
+{
+    MeasRptBasic_t basic;    /**< Basic measurement report */
+    MeasRptCCA_t cca;        /**< CCA measurement report */
+    MeasRptRPI_t rpi;        /**< RPI measurement report */
+
+} MeasReport_t;
+
+/**        
+ * @brief Structure passed to firmware to perform a measurement
+ */
+typedef MLAN_PACK_START struct
+{
+    t_u8 mac_addr[MLAN_MAC_ADDR_LENGTH];          /**< Reporting STA address */
+    t_u8 dialog_token;                   /**< Measurement dialog toke */
+    MeasReqMode_t req_mode;              /**< Report mode  */
+    MeasType_t meas_type;                /**< Measurement type */
+    MeasRequest_t req;                   /**< Measurement request data */
+
+} MLAN_PACK_END HostCmd_DS_MEASUREMENT_REQUEST;
+
+/**        
+ * @brief Structure passed back from firmware with a measurement report,
+ *        also can be to send a measurement report to another STA
+ */
+typedef MLAN_PACK_START struct
+{
+    t_u8 mac_addr[MLAN_MAC_ADDR_LENGTH];          /**< Reporting STA address */
+    t_u8 dialog_token;                   /**< Measurement dialog token */
+    MeasRptMode_t rpt_mode;              /**< Report mode */
+    MeasType_t meas_type;                /**< Measurement type */
+    MeasReport_t rpt;                    /**< Measurement report data */
+
+} MLAN_PACK_END HostCmd_DS_MEASUREMENT_REPORT;
+
+typedef MLAN_PACK_START struct
+{
+    t_u16 startFreq;
+    t_u8 chanWidth;
+    t_u8 chanNum;
+
+} MLAN_PACK_END MrvlChannelDesc_t;
+
+typedef MLAN_PACK_START struct
+{
+    MrvlIEtypesHeader_t Header;      /**< Header */
+
+    MeasRptBasicMap_t map;           /**< IEEE 802.11h basic meas report */
+} MLAN_PACK_END MrvlIEtypes_ChanRpt11hBasic_t;
+
+typedef MLAN_PACK_START struct
+{
+    MrvlChannelDesc_t chan_desc;  /**< Channel band, number */
+    t_u32 millisec_dwell_time; /**< Channel dwell time in milliseconds */
+} MLAN_PACK_END HostCmd_DS_CHAN_RPT_REQ;
+
+typedef MLAN_PACK_START struct
+{
+    t_u32 cmd_result;     /**< Rpt request command result (0 == SUCCESS) */
+    t_u64 start_tsf;      /**< TSF Measurement started */
+    t_u32 duration;       /**< Duration of measurement in microsecs */
+    t_u8 tlv_buffer[1];   /**< TLV Buffer */
+} MLAN_PACK_END HostCmd_DS_CHAN_RPT_RSP;
+
+/** HostCmd_DS_COMMAND */
+typedef struct MLAN_PACK_START _HostCmd_DS_COMMAND
+{
+    /** Command Header : Command */
+    t_u16 command;
+    /** Command Header : Size */
+    t_u16 size;
+    /** Command Header : Sequence number */
+    t_u16 seq_num;
+    /** Command Header : Result */
+    t_u16 result;
+    /** Command Body */
+    union
+    {
+        /** Hardware specifications */
+        HostCmd_DS_GET_HW_SPEC hw_spec;
+        /** Cfg data */
+        HostCmd_DS_802_11_CFG_DATA cfg_data;
+        /** MAC control */
+        HostCmd_DS_MAC_CONTROL mac_ctrl;
+        /** MAC address */
+        HostCmd_DS_802_11_MAC_ADDRESS mac_addr;
+        /** MAC muticast address */
+        HostCmd_DS_MAC_MULTICAST_ADR mc_addr;
+        /** Get log */
+        HostCmd_DS_802_11_GET_LOG get_log;
+        /** RSSI information */
+        HostCmd_DS_802_11_RSSI_INFO rssi_info;
+        /** RSSI information response */
+        HostCmd_DS_802_11_RSSI_INFO_RSP rssi_info_rsp;
+        /** SNMP MIB */
+        HostCmd_DS_802_11_SNMP_MIB smib;
+        /** Radio control */
+        HostCmd_DS_802_11_RADIO_CONTROL radio;
+        /** RF channel */
+        HostCmd_DS_802_11_RF_CHANNEL rf_channel;
+        /** Tx rate query */
+        HostCmd_TX_RATE_QUERY tx_rate;
+        /** Tx rate configuration */
+        HostCmd_DS_TX_RATE_CFG tx_rate_cfg;
+        /** Tx power configuration */
+        HostCmd_DS_TXPWR_CFG txp_cfg;
+        /** RF Tx power configuration */
+        HostCmd_DS_802_11_RF_TX_POWER txp;
+
+        /** RF antenna */
+        HostCmd_DS_802_11_RF_ANTENNA antenna;
+        /** Enhanced power save command */
+        HostCmd_DS_802_11_PS_MODE_ENH psmode_enh;
+        HostCmd_DS_802_11_HS_CFG_ENH opt_hs_cfg;
+        /** Scan */
+        HostCmd_DS_802_11_SCAN scan;
+        /** Scan response */
+        HostCmd_DS_802_11_SCAN_RSP scan_resp;
+
+        /** Associate */
+        HostCmd_DS_802_11_ASSOCIATE associate;
+
+        /** Associate response */
+        HostCmd_DS_802_11_ASSOCIATE_RSP associate_rsp;
+        /** Deauthenticate */
+        HostCmd_DS_802_11_DEAUTHENTICATE deauth;
+        /** Ad-Hoc start */
+        HostCmd_DS_802_11_AD_HOC_START adhoc_start;
+        /** Ad-Hoc start result */
+        HostCmd_DS_802_11_AD_HOC_START_RESULT adhoc_start_result;
+        /** Ad-Hoc join result */
+        HostCmd_DS_802_11_AD_HOC_JOIN_RESULT adhoc_join_result;
+        /** Ad-Hoc join */
+        HostCmd_DS_802_11_AD_HOC_JOIN adhoc_join;
+        /** Domain information */
+        HostCmd_DS_802_11D_DOMAIN_INFO domain_info;
+        /** Domain information response */
+        HostCmd_DS_802_11D_DOMAIN_INFO_RSP domain_info_resp;
+        HostCmd_DS_802_11_TPC_ADAPT_REQ tpc_req;
+        HostCmd_DS_802_11_TPC_INFO tpc_info;
+        HostCmd_DS_802_11_CHAN_SW_ANN chan_sw_ann;
+        HostCmd_DS_CHAN_RPT_REQ chan_rpt_req;
+        HostCmd_DS_MEASUREMENT_REQUEST meas_req;
+        HostCmd_DS_MEASUREMENT_REPORT meas_rpt;
+        /** Add BA request */
+        HostCmd_DS_11N_ADDBA_REQ add_ba_req;
+        /** Add BA response */
+        HostCmd_DS_11N_ADDBA_RSP add_ba_rsp;
+        /** Delete BA entry */
+        HostCmd_DS_11N_DELBA del_ba;
+        /** Tx buffer configuration */
+        HostCmd_DS_TXBUF_CFG tx_buf;
+        /** AMSDU Aggr Ctrl configuration */
+        HostCmd_DS_AMSDU_AGGR_CTRL amsdu_aggr_ctrl;
+        /** 11n configuration */
+        HostCmd_DS_11N_CFG htcfg;
+        /** WMM status get */
+        HostCmd_DS_WMM_GET_STATUS get_wmm_status;
+        /** WMM ADDTS */
+        HostCmd_DS_WMM_ADDTS_REQ add_ts;
+        /** WMM DELTS */
+        HostCmd_DS_WMM_DELTS_REQ del_ts;
+        /** WMM set/get queue config */
+        HostCmd_DS_WMM_QUEUE_CONFIG queue_config;
+        /** WMM on/of/get queue statistics */
+        HostCmd_DS_WMM_QUEUE_STATS queue_stats;
+        /** WMM get traffic stream status */
+        HostCmd_DS_WMM_TS_STATUS ts_status;
+        /** Key material */
+        HostCmd_DS_802_11_KEY_MATERIAL key_material;
+        /** E-Supplicant PSK */
+        HostCmd_DS_802_11_SUPPLICANT_PMK esupplicant_psk;
+        /** E-Supplicant profile */
+        HostCmd_DS_802_11_SUPPLICANT_PROFILE esupplicant_profile;
+        /** Extended version */
+        HostCmd_DS_VERSION_EXT verext;
+        /** Adhoc Coalescing */
+        HostCmd_DS_802_11_IBSS_STATUS ibss_coalescing;
+        /** Mgmt IE list configuration */
+        HostCmd_DS_MGMT_IE_LIST_CFG mgmt_ie_list;
+        /** System clock configuration */
+        HostCmd_DS_ECL_SYSTEM_CLOCK_CONFIG sys_clock_cfg;
+        /** Heart Beat configuration */
+        HostCmd_DS_HEART_BEAT heart_beat;
+        /** MAC register access */
+        HostCmd_DS_MAC_REG_ACCESS mac_reg;
+        /** BBP register access */
+        HostCmd_DS_BBP_REG_ACCESS bbp_reg;
+        /** RF register access */
+        HostCmd_DS_RF_REG_ACCESS rf_reg;
+        /** PMIC register access */
+        HostCmd_DS_PMIC_REG_ACCESS pmic_reg;
+        /** EEPROM register access */
+        HostCmd_DS_802_11_EEPROM_ACCESS eeprom;
+        /** Memory access */
+        HostCmd_DS_MEM_ACCESS mem;
+
+        /** Inactivity timeout extend */
+        HostCmd_DS_INACTIVITY_TIMEOUT_EXT inactivity_to;
+#ifdef UAP_SUPPORT
+        HostCmd_DS_SYS_CONFIG sys_config;
+        HostCmd_DS_SYS_INFO sys_info;
+        HostCmd_DS_STA_DEAUTH sta_deauth;
+        HostCmd_DS_STA_LIST sta_list;
+        HostCmd_DS_POWER_MGMT_EXT pm_cfg;
+#endif                          /* UAP_SUPPORT */
+
+       /** Sleep period command */
+        HostCmd_DS_802_11_SLEEP_PERIOD sleep_pd;
+       /** Sleep params command */
+        HostCmd_DS_802_11_SLEEP_PARAMS sleep_param;
+
+        HostCmd_DS_SET_BSS_MODE bss_mode;
+        HostCmd_DS_CMD_TX_DATA_PAUSE tx_data_pause;
+    } params;
+} MLAN_PACK_END HostCmd_DS_COMMAND;
+
+/** PS_CMD_ConfirmSleep */
+typedef MLAN_PACK_START struct _OPT_Confirm_Sleep
+{
+    /** Command */
+    t_u16 command;
+    /** Size */
+    t_u16 size;
+    /** Sequence number */
+    t_u16 seq_num;
+    /** Result */
+    t_u16 result;
+    /** Action */
+    t_u16 action;
+    /** Sleep comfirm param definition */
+    sleep_confirm_param sleep_cfm;
+} MLAN_PACK_END OPT_Confirm_Sleep;
+
+typedef struct MLAN_PACK_START _opt_sleep_confirm_buffer
+{
+    /** Header for interface */
+    t_u32 hdr;
+    /** New power save command used to send sleep confirmation to the firmware */
+    OPT_Confirm_Sleep ps_cfm_sleep;
+} MLAN_PACK_END opt_sleep_confirm_buffer;
+
+#ifdef PRAGMA_PACK
+#pragma pack(pop)
+#endif
+
+#endif /* !_MLAN_FW_H_ */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan.h linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan.h
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan.h	2017-09-23 03:42:50.110674783 +0800
@@ -0,0 +1,42 @@
+/** @file mlan.h
+ *
+ *  @brief This file declares all APIs that will be called from MOAL module.
+ *  It also defines the data structures used for APIs between MLAN and MOAL.
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/******************************************************
+Change log:
+    10/13/2008: initial version
+    11/07/2008: split mlan.h into mlan_decl.h & mlan_ioctl.h
+******************************************************/
+
+#ifndef _MLAN_H_
+#define _MLAN_H_
+
+#include "mlan_decl.h"
+#include "mlan_ioctl.h"
+#include "mlan_ieee.h"
+
+#endif /* !_MLAN_H_ */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_ieee.h linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_ieee.h
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_ieee.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_ieee.h	2017-09-23 03:42:50.110674783 +0800
@@ -0,0 +1,1206 @@
+/** @file mlan_ieee.h
+ *
+ *  @brief This file contains IEEE information element related 
+ *  definitions used in MLAN and MOAL module.
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/******************************************************
+Change log:
+    11/03/2008: initial version
+******************************************************/
+
+#ifndef _MLAN_IEEE_H_
+#define _MLAN_IEEE_H_
+
+/** WLAN supported rates */
+#define WLAN_SUPPORTED_RATES            	14
+
+/** WLAN supported rates extension*/
+#define WLAN_SUPPORTED_RATES_EXT            32
+
+/** Enumeration definition*/
+/** WLAN_802_11_NETWORK_TYPE */
+typedef enum _WLAN_802_11_NETWORK_TYPE
+{
+    Wlan802_11FH,
+    Wlan802_11DS,
+    /* Defined as upper bound */
+    Wlan802_11NetworkTypeMax
+} WLAN_802_11_NETWORK_TYPE;
+
+/** Maximum size of IEEE Information Elements */
+#define IEEE_MAX_IE_SIZE      256
+
+#ifdef UAP_SUPPORT
+#ifdef BIG_ENDIAN_SUPPORT
+/** Frame control: Type Mgmt frame */
+#define IEEE80211_FC_MGMT_FRAME_TYPE_MASK    0x3000
+/** Frame control: SubType Mgmt frame */
+#define IEEE80211_GET_FC_MGMT_FRAME_SUBTYPE(fc) (((fc) & 0xF000) >> 12)
+#else
+/** Frame control: Type Mgmt frame */
+#define IEEE80211_FC_MGMT_FRAME_TYPE_MASK    0x000C
+/** Frame control: SubType Mgmt frame */
+#define IEEE80211_GET_FC_MGMT_FRAME_SUBTYPE(fc) (((fc) & 0x00F0) >> 4)
+#endif
+#endif
+
+#ifdef PRAGMA_PACK
+#pragma pack(push, 1)
+#endif
+
+/** IEEE Type definitions  */
+typedef MLAN_PACK_START enum _IEEEtypes_ElementId_e
+{
+    SSID = 0,
+    SUPPORTED_RATES = 1,
+
+    FH_PARAM_SET = 2,
+    DS_PARAM_SET = 3,
+    CF_PARAM_SET = 4,
+
+    IBSS_PARAM_SET = 6,
+
+#ifdef STA_SUPPORT
+    COUNTRY_INFO = 7,
+#endif /* STA_SUPPORT */
+
+    POWER_CONSTRAINT = 32,
+    POWER_CAPABILITY = 33,
+    TPC_REQUEST = 34,
+    TPC_REPORT = 35,
+    SUPPORTED_CHANNELS = 36,
+    CHANNEL_SWITCH_ANN = 37,
+    QUIET = 40,
+    IBSS_DFS = 41,
+    HT_CAPABILITY = 45,
+    HT_OPERATION = 61,
+    BSSCO_2040 = 72,
+    OVERLAPBSSSCANPARAM = 74,
+    EXT_CAPABILITY = 127,
+
+    ERP_INFO = 42,
+
+    EXTENDED_SUPPORTED_RATES = 50,
+
+    VENDOR_SPECIFIC_221 = 221,
+    WMM_IE = VENDOR_SPECIFIC_221,
+
+    WPS_IE = VENDOR_SPECIFIC_221,
+
+    WPA_IE = VENDOR_SPECIFIC_221,
+    RSN_IE = 48,
+    VS_IE = VENDOR_SPECIFIC_221,
+    WAPI_IE = 68,
+} MLAN_PACK_END IEEEtypes_ElementId_e;
+
+/** IEEE IE header */
+typedef MLAN_PACK_START struct _IEEEtypes_Header_t
+{
+    /** Element ID */
+    t_u8 element_id;
+    /** Length */
+    t_u8 len;
+} MLAN_PACK_END IEEEtypes_Header_t, *pIEEEtypes_Header_t;
+
+/** Vendor specific IE header */
+typedef MLAN_PACK_START struct _IEEEtypes_VendorHeader_t
+{
+    /** Element ID */
+    t_u8 element_id;
+    /** Length */
+    t_u8 len;
+    /** OUI */
+    t_u8 oui[3];
+    /** OUI type */
+    t_u8 oui_type;
+    /** OUI subtype */
+    t_u8 oui_subtype;
+    /** Version */
+    t_u8 version;
+} MLAN_PACK_END IEEEtypes_VendorHeader_t, *pIEEEtypes_VendorHeader_t;
+
+/** Vendor specific IE */
+typedef MLAN_PACK_START struct _IEEEtypes_VendorSpecific_t
+{
+    /** Vendor specific IE header */
+    IEEEtypes_VendorHeader_t vend_hdr;
+    /** IE Max - size of previous fields */
+    t_u8 data[IEEE_MAX_IE_SIZE - sizeof(IEEEtypes_VendorHeader_t)];
+}
+MLAN_PACK_END IEEEtypes_VendorSpecific_t, *pIEEEtypes_VendorSpecific_t;
+
+/** IEEE IE */
+typedef MLAN_PACK_START struct _IEEEtypes_Generic_t
+{
+    /** Generic IE header */
+    IEEEtypes_Header_t ieee_hdr;
+    /** IE Max - size of previous fields */
+    t_u8 data[IEEE_MAX_IE_SIZE - sizeof(IEEEtypes_Header_t)];
+}
+MLAN_PACK_END IEEEtypes_Generic_t, *pIEEEtypes_Generic_t;
+
+/** Capability information mask */
+#define CAPINFO_MASK    (~(MBIT(15) | MBIT(14) |            \
+                           MBIT(12) | MBIT(11) | MBIT(9)))
+
+/** Capability Bit Map*/
+#ifdef BIG_ENDIAN_SUPPORT
+typedef MLAN_PACK_START struct _IEEEtypes_CapInfo_t
+{
+    t_u8 rsrvd1:2;
+    t_u8 dsss_ofdm:1;
+    t_u8 rsvrd2:2;
+    t_u8 short_slot_time:1;
+    t_u8 rsrvd3:1;
+    t_u8 spectrum_mgmt:1;
+    t_u8 chan_agility:1;
+    t_u8 pbcc:1;
+    t_u8 short_preamble:1;
+    t_u8 privacy:1;
+    t_u8 cf_poll_rqst:1;
+    t_u8 cf_pollable:1;
+    t_u8 ibss:1;
+    t_u8 ess:1;
+} MLAN_PACK_END IEEEtypes_CapInfo_t, *pIEEEtypes_CapInfo_t;
+#else
+typedef MLAN_PACK_START struct _IEEEtypes_CapInfo_t
+{
+    /** Capability Bit Map : ESS */
+    t_u8 ess:1;
+    /** Capability Bit Map : IBSS */
+    t_u8 ibss:1;
+    /** Capability Bit Map : CF pollable */
+    t_u8 cf_pollable:1;
+    /** Capability Bit Map : CF poll request */
+    t_u8 cf_poll_rqst:1;
+    /** Capability Bit Map : privacy */
+    t_u8 privacy:1;
+    /** Capability Bit Map : Short preamble */
+    t_u8 short_preamble:1;
+    /** Capability Bit Map : PBCC */
+    t_u8 pbcc:1;
+    /** Capability Bit Map : Channel agility */
+    t_u8 chan_agility:1;
+    /** Capability Bit Map : Spectrum management */
+    t_u8 spectrum_mgmt:1;
+    /** Capability Bit Map : Reserved */
+    t_u8 rsrvd3:1;
+    /** Capability Bit Map : Short slot time */
+    t_u8 short_slot_time:1;
+    /** Capability Bit Map : APSD */
+    t_u8 Apsd:1;
+    /** Capability Bit Map : Reserved */
+    t_u8 rsvrd2:1;
+    /** Capability Bit Map : DSS OFDM */
+    t_u8 dsss_ofdm:1;
+    /** Capability Bit Map : Reserved */
+    t_u8 rsrvd1:2;
+} MLAN_PACK_END IEEEtypes_CapInfo_t, *pIEEEtypes_CapInfo_t;
+#endif /* BIG_ENDIAN_SUPPORT */
+
+/** IEEEtypes_CfParamSet_t */
+typedef MLAN_PACK_START struct _IEEEtypes_CfParamSet_t
+{
+    /** CF peremeter : Element ID */
+    t_u8 element_id;
+    /** CF peremeter : Length */
+    t_u8 len;
+    /** CF peremeter : Count */
+    t_u8 cfp_cnt;
+    /** CF peremeter : Period */
+    t_u8 cfp_period;
+    /** CF peremeter : Maximum duration */
+    t_u16 cfp_max_duration;
+    /** CF peremeter : Remaining duration */
+    t_u16 cfp_duration_remaining;
+} MLAN_PACK_END IEEEtypes_CfParamSet_t, *pIEEEtypes_CfParamSet_t;
+
+/** IEEEtypes_IbssParamSet_t */
+typedef MLAN_PACK_START struct _IEEEtypes_IbssParamSet_t
+{
+    /** Element ID */
+    t_u8 element_id;
+    /** Length */
+    t_u8 len;
+    /** ATIM window value */
+    t_u16 atim_window;
+} MLAN_PACK_END IEEEtypes_IbssParamSet_t, *pIEEEtypes_IbssParamSet_t;
+
+/** IEEEtypes_SsParamSet_t */
+typedef MLAN_PACK_START union _IEEEtypes_SsParamSet_t
+{
+    /** SS parameter : CF parameter set */
+    IEEEtypes_CfParamSet_t cf_param_set;
+    /** SS parameter : IBSS parameter set */
+    IEEEtypes_IbssParamSet_t ibss_param_set;
+} MLAN_PACK_END IEEEtypes_SsParamSet_t, *pIEEEtypes_SsParamSet_t;
+
+/** IEEEtypes_FhParamSet_t */
+typedef MLAN_PACK_START struct _IEEEtypes_FhParamSet_t
+{
+    /** FH parameter : Element ID */
+    t_u8 element_id;
+    /** FH parameter : Length */
+    t_u8 len;
+    /** FH parameter : Dwell time */
+    t_u16 dwell_time;
+    /** FH parameter : Hop set */
+    t_u8 hop_set;
+    /** FH parameter : Hop pattern */
+    t_u8 hop_pattern;
+    /** FH parameter : Hop index */
+    t_u8 hop_index;
+} MLAN_PACK_END IEEEtypes_FhParamSet_t, *pIEEEtypes_FhParamSet_t;
+
+/** IEEEtypes_DsParamSet_t */
+typedef MLAN_PACK_START struct _IEEEtypes_DsParamSet_t
+{
+    /** DS parameter : Element ID */
+    t_u8 element_id;
+    /** DS parameter : Length */
+    t_u8 len;
+    /** DS parameter : Current channel */
+    t_u8 current_chan;
+} MLAN_PACK_END IEEEtypes_DsParamSet_t, *pIEEEtypes_DsParamSet_t;
+
+/** IEEEtypes_PhyParamSet_t */
+typedef MLAN_PACK_START union _IEEEtypes_PhyParamSet_t
+{
+    /** FH parameter set */
+    IEEEtypes_FhParamSet_t fh_param_set;
+    /** DS parameter set */
+    IEEEtypes_DsParamSet_t ds_param_set;
+} MLAN_PACK_END IEEEtypes_PhyParamSet_t, *pIEEEtypes_PhyParamSet_t;
+
+/** IEEEtypes_ERPInfo_t */
+typedef MLAN_PACK_START struct _IEEEtypes_ERPInfo_t
+{
+    /** Element ID */
+    t_u8 element_id;
+    /** Length */
+    t_u8 len;
+    /** ERP flags */
+    t_u8 erp_flags;
+} MLAN_PACK_END IEEEtypes_ERPInfo_t, *pIEEEtypes_ERPInfo_t;
+
+/** IEEEtypes_AId_t */
+typedef t_u16 IEEEtypes_AId_t;
+
+/** IEEEtypes_StatusCode_t */
+typedef t_u16 IEEEtypes_StatusCode_t;
+
+/** IEEEtypes_AssocRsp_t */
+typedef MLAN_PACK_START struct _IEEEtypes_AssocRsp_t
+{
+    /** Capability information */
+    IEEEtypes_CapInfo_t capability;
+    /** Association response status code */
+    IEEEtypes_StatusCode_t status_code;
+    /** Association ID */
+    IEEEtypes_AId_t a_id;
+    /** IE data buffer */
+    t_u8 ie_buffer[1];
+} MLAN_PACK_END IEEEtypes_AssocRsp_t, *pIEEEtypes_AssocRsp_t;
+
+/** 802.11 supported rates */
+typedef t_u8 WLAN_802_11_RATES[WLAN_SUPPORTED_RATES];
+
+/** Maximum number of AC QOS queues available in the driver/firmware */
+#define MAX_AC_QUEUES 4
+
+/** Data structure of WMM QoS information */
+typedef MLAN_PACK_START struct _IEEEtypes_WmmQosInfo_t
+{
+#ifdef BIG_ENDIAN_SUPPORT
+    /** QoS UAPSD */
+    t_u8 qos_uapsd:1;
+    /** Reserved */
+    t_u8 reserved:3;
+    /** Parameter set count */
+    t_u8 para_set_count:4;
+#else
+    /** Parameter set count */
+    t_u8 para_set_count:4;
+    /** Reserved */
+    t_u8 reserved:3;
+    /** QoS UAPSD */
+    t_u8 qos_uapsd:1;
+#endif                          /* BIG_ENDIAN_SUPPORT */
+} MLAN_PACK_END IEEEtypes_WmmQosInfo_t, *pIEEEtypes_WmmQosInfo_t;
+
+/** Data structure of WMM Aci/Aifsn */
+typedef MLAN_PACK_START struct _IEEEtypes_WmmAciAifsn_t
+{
+#ifdef BIG_ENDIAN_SUPPORT
+    /** Reserved */
+    t_u8 reserved:1;
+    /** Aci */
+    t_u8 aci:2;
+    /** Acm */
+    t_u8 acm:1;
+    /** Aifsn */
+    t_u8 aifsn:4;
+#else
+    /** Aifsn */
+    t_u8 aifsn:4;
+    /** Acm */
+    t_u8 acm:1;
+    /** Aci */
+    t_u8 aci:2;
+    /** Reserved */
+    t_u8 reserved:1;
+#endif                          /* BIG_ENDIAN_SUPPORT */
+} MLAN_PACK_END IEEEtypes_WmmAciAifsn_t, *pIEEEtypes_WmmAciAifsn_t;
+
+/** Data structure of WMM ECW */
+typedef MLAN_PACK_START struct _IEEEtypes_WmmEcw_t
+{
+#ifdef BIG_ENDIAN_SUPPORT
+    /** Maximum Ecw */
+    t_u8 ecw_max:4;
+    /** Minimum Ecw */
+    t_u8 ecw_min:4;
+#else
+    /** Minimum Ecw */
+    t_u8 ecw_min:4;
+    /** Maximum Ecw */
+    t_u8 ecw_max:4;
+#endif                          /* BIG_ENDIAN_SUPPORT */
+} MLAN_PACK_END IEEEtypes_WmmEcw_t, *pIEEEtypes_WmmEcw_t;
+
+/** Data structure of WMM AC parameters  */
+typedef MLAN_PACK_START struct _IEEEtypes_WmmAcParameters_t
+{
+    IEEEtypes_WmmAciAifsn_t aci_aifsn;       /**< AciAifSn */
+    IEEEtypes_WmmEcw_t ecw;                 /**< Ecw */
+    t_u16 tx_op_limit;                        /**< Tx op limit */
+} MLAN_PACK_END IEEEtypes_WmmAcParameters_t, *pIEEEtypes_WmmAcParameters_t;
+
+/** Data structure of WMM Info IE  */
+typedef MLAN_PACK_START struct _IEEEtypes_WmmInfo_t
+{
+
+    /**
+     * WMM Info IE - Vendor Specific Header:
+     *   element_id  [221/0xdd]
+     *   Len         [7] 
+     *   Oui         [00:50:f2]
+     *   OuiType     [2]
+     *   OuiSubType  [0]
+     *   Version     [1]
+     */
+    IEEEtypes_VendorHeader_t vend_hdr;
+
+    /** QoS information */
+    IEEEtypes_WmmQosInfo_t qos_info;
+
+} MLAN_PACK_END IEEEtypes_WmmInfo_t, *pIEEEtypes_WmmInfo_t;
+
+/** Data structure of WMM parameter IE  */
+typedef MLAN_PACK_START struct _IEEEtypes_WmmParameter_t
+{
+    /**
+     * WMM Parameter IE - Vendor Specific Header:
+     *   element_id  [221/0xdd]
+     *   Len         [24] 
+     *   Oui         [00:50:f2]
+     *   OuiType     [2]
+     *   OuiSubType  [1]
+     *   Version     [1]
+     */
+    IEEEtypes_VendorHeader_t vend_hdr;
+
+    /** QoS information */
+    IEEEtypes_WmmQosInfo_t qos_info;
+    /** Reserved */
+    t_u8 reserved;
+
+    /** AC Parameters Record WMM_AC_BE, WMM_AC_BK, WMM_AC_VI, WMM_AC_VO */
+    IEEEtypes_WmmAcParameters_t ac_params[MAX_AC_QUEUES];
+} MLAN_PACK_END IEEEtypes_WmmParameter_t, *pIEEEtypes_WmmParameter_t;
+
+/** Enumerator for TSPEC direction */
+typedef MLAN_PACK_START enum _IEEEtypes_WMM_TSPEC_TS_Info_Direction_e
+{
+
+    TSPEC_DIR_UPLINK = 0,
+    TSPEC_DIR_DOWNLINK = 1,
+    /* 2 is a reserved value */
+    TSPEC_DIR_BIDIRECT = 3,
+
+} MLAN_PACK_END IEEEtypes_WMM_TSPEC_TS_Info_Direction_e;
+
+/** Enumerator for TSPEC PSB */
+typedef MLAN_PACK_START enum _IEEEtypes_WMM_TSPEC_TS_Info_PSB_e
+{
+
+    TSPEC_PSB_LEGACY = 0,
+    TSPEC_PSB_TRIG = 1,
+
+} MLAN_PACK_END IEEEtypes_WMM_TSPEC_TS_Info_PSB_e;
+
+/** Enumerator for TSPEC Ack Policy */
+typedef MLAN_PACK_START enum _IEEEtypes_WMM_TSPEC_TS_Info_AckPolicy_e
+{
+
+    TSPEC_ACKPOLICY_NORMAL = 0,
+    TSPEC_ACKPOLICY_NOACK = 1,
+    /* 2 is reserved */
+    TSPEC_ACKPOLICY_BLOCKACK = 3,
+
+} MLAN_PACK_END IEEEtypes_WMM_TSPEC_TS_Info_AckPolicy_e;
+
+/** Enumerator for TSPEC Trafffice type */
+typedef MLAN_PACK_START enum _IEEEtypes_WMM_TSPEC_TS_TRAFFIC_TYPE_e
+{
+
+    TSPEC_TRAFFIC_APERIODIC = 0,
+    TSPEC_TRAFFIC_PERIODIC = 1,
+
+} MLAN_PACK_END IEEEtypes_WMM_TSPEC_TS_TRAFFIC_TYPE_e;
+
+/** Data structure of WMM TSPEC information */
+typedef MLAN_PACK_START struct
+{
+#ifdef BIG_ENDIAN_SUPPORT
+    t_u8 Reserved17_23:7;       // ! Reserved
+    t_u8 Schedule:1;
+    IEEEtypes_WMM_TSPEC_TS_Info_AckPolicy_e AckPolicy:2;
+    t_u8 UserPri:3;             // ! 802.1d User Priority
+    IEEEtypes_WMM_TSPEC_TS_Info_PSB_e PowerSaveBehavior:1;      // !
+                                                                // Legacy/Trigg
+    t_u8 Aggregation:1;         // ! Reserved
+    t_u8 AccessPolicy2:1;       // ! 
+    t_u8 AccessPolicy1:1;       // ! 
+    IEEEtypes_WMM_TSPEC_TS_Info_Direction_e Direction:2;
+    t_u8 TID:4;                 // ! Unique identifier
+    IEEEtypes_WMM_TSPEC_TS_TRAFFIC_TYPE_e TrafficType:1;
+#else
+    IEEEtypes_WMM_TSPEC_TS_TRAFFIC_TYPE_e TrafficType:1;
+    t_u8 TID:4;                 // ! Unique identifier
+    IEEEtypes_WMM_TSPEC_TS_Info_Direction_e Direction:2;
+    t_u8 AccessPolicy1:1;       // ! 
+    t_u8 AccessPolicy2:1;       // ! 
+    t_u8 Aggregation:1;         // ! Reserved
+    IEEEtypes_WMM_TSPEC_TS_Info_PSB_e PowerSaveBehavior:1;      // !
+                                                                // Legacy/Trigg
+    t_u8 UserPri:3;             // ! 802.1d User Priority
+    IEEEtypes_WMM_TSPEC_TS_Info_AckPolicy_e AckPolicy:2;
+    t_u8 Schedule:1;
+    t_u8 Reserved17_23:7;       // ! Reserved
+#endif
+} MLAN_PACK_END IEEEtypes_WMM_TSPEC_TS_Info_t;
+
+/** Data structure of WMM TSPEC Nominal Size */
+typedef MLAN_PACK_START struct
+{
+#ifdef BIG_ENDIAN_SUPPORT
+    t_u16 Fixed:1;              // ! 1: Fixed size given in Size, 0: Var, size
+                                // is nominal
+    t_u16 Size:15;              // ! Nominal size in octets
+#else
+    t_u16 Size:15;              // ! Nominal size in octets
+    t_u16 Fixed:1;              // ! 1: Fixed size given in Size, 0: Var, size
+                                // is nominal
+#endif
+} MLAN_PACK_END IEEEtypes_WMM_TSPEC_NomMSDUSize_t;
+
+/** Data structure of WMM TSPEC SBWA */
+typedef MLAN_PACK_START struct
+{
+#ifdef BIG_ENDIAN_SUPPORT
+    t_u16 Whole:3;              // ! Whole portion
+    t_u16 Fractional:13;        // ! Fractional portion
+#else
+    t_u16 Fractional:13;        // ! Fractional portion
+    t_u16 Whole:3;              // ! Whole portion
+#endif
+} MLAN_PACK_END IEEEtypes_WMM_TSPEC_SBWA;
+
+/** Data structure of WMM TSPEC Body */
+typedef MLAN_PACK_START struct
+{
+
+    IEEEtypes_WMM_TSPEC_TS_Info_t TSInfo;
+    IEEEtypes_WMM_TSPEC_NomMSDUSize_t NomMSDUSize;
+    t_u16 MaximumMSDUSize;
+    t_u32 MinServiceInterval;
+    t_u32 MaxServiceInterval;
+    t_u32 InactivityInterval;
+    t_u32 SuspensionInterval;
+    t_u32 ServiceStartTime;
+    t_u32 MinimumDataRate;
+    t_u32 MeanDataRate;
+    t_u32 PeakDataRate;
+    t_u32 MaxBurstSize;
+    t_u32 DelayBound;
+    t_u32 MinPHYRate;
+    IEEEtypes_WMM_TSPEC_SBWA SurplusBWAllowance;
+    t_u16 MediumTime;
+} MLAN_PACK_END IEEEtypes_WMM_TSPEC_Body_t;
+
+/** Data structure of WMM TSPEC all elements */
+typedef MLAN_PACK_START struct
+{
+    t_u8 ElementId;
+    t_u8 Len;
+    t_u8 OuiType[4];            /* 00:50:f2:02 */
+    t_u8 OuiSubType;            /* 01 */
+    t_u8 Version;
+
+    IEEEtypes_WMM_TSPEC_Body_t TspecBody;
+
+} MLAN_PACK_END IEEEtypes_WMM_TSPEC_t;
+
+/** WMM Action Category values */
+typedef MLAN_PACK_START enum _IEEEtypes_ActionCategory_e
+{
+
+    IEEE_MGMT_ACTION_CATEGORY_SPECTRUM_MGMT = 0,
+    IEEE_MGMT_ACTION_CATEGORY_QOS = 1,
+    IEEE_MGMT_ACTION_CATEGORY_DLS = 2,
+    IEEE_MGMT_ACTION_CATEGORY_BLOCK_ACK = 3,
+    IEEE_MGMT_ACTION_CATEGORY_PUBLIC = 4,
+    IEEE_MGMT_ACTION_CATEGORY_RADIO_RSRC = 5,
+    IEEE_MGMT_ACTION_CATEGORY_FAST_BSS_TRANS = 6,
+    IEEE_MGMT_ACTION_CATEGORY_HT = 7,
+
+    IEEE_MGMT_ACTION_CATEGORY_WNM = 10,
+    IEEE_MGMT_ACTION_CATEGORY_UNPROTECT_WNM = 11,
+
+    IEEE_MGMT_ACTION_CATEGORY_WMM_TSPEC = 17
+} MLAN_PACK_END IEEEtypes_ActionCategory_e;
+
+/** WMM TSPEC operations */
+typedef MLAN_PACK_START enum _IEEEtypes_WMM_Tspec_Action_e
+{
+
+    TSPEC_ACTION_CODE_ADDTS_REQ = 0,
+    TSPEC_ACTION_CODE_ADDTS_RSP = 1,
+    TSPEC_ACTION_CODE_DELTS = 2,
+
+} MLAN_PACK_END IEEEtypes_WMM_Tspec_Action_e;
+
+/** WMM TSPEC Category Action Base */
+typedef MLAN_PACK_START struct
+{
+
+    IEEEtypes_ActionCategory_e category;
+    IEEEtypes_WMM_Tspec_Action_e action;
+    t_u8 dialogToken;
+
+} MLAN_PACK_END IEEEtypes_WMM_Tspec_Action_Base_Tspec_t;
+
+/** WMM TSPEC AddTS request structure */
+typedef MLAN_PACK_START struct
+{
+
+    IEEEtypes_WMM_Tspec_Action_Base_Tspec_t tspecAct;
+    t_u8 statusCode;
+    IEEEtypes_WMM_TSPEC_t tspecIE;
+
+    /* Place holder for additional elements after the TSPEC */
+    t_u8 subElem[256];
+
+} MLAN_PACK_END IEEEtypes_Action_WMM_AddTsReq_t;
+
+/** WMM TSPEC AddTS response structure */
+typedef MLAN_PACK_START struct
+{
+    IEEEtypes_WMM_Tspec_Action_Base_Tspec_t tspecAct;
+    t_u8 statusCode;
+    IEEEtypes_WMM_TSPEC_t tspecIE;
+
+    /* Place holder for additional elements after the TSPEC */
+    t_u8 subElem[256];
+
+} MLAN_PACK_END IEEEtypes_Action_WMM_AddTsRsp_t;
+
+/** WMM TSPEC DelTS structure */
+typedef MLAN_PACK_START struct
+{
+    IEEEtypes_WMM_Tspec_Action_Base_Tspec_t tspecAct;
+    t_u8 reasonCode;
+    IEEEtypes_WMM_TSPEC_t tspecIE;
+
+} MLAN_PACK_END IEEEtypes_Action_WMM_DelTs_t;
+
+/** union of WMM TSPEC structures */
+typedef MLAN_PACK_START union
+{
+    IEEEtypes_WMM_Tspec_Action_Base_Tspec_t tspecAct;
+
+    IEEEtypes_Action_WMM_AddTsReq_t addTsReq;
+    IEEEtypes_Action_WMM_AddTsRsp_t addTsRsp;
+    IEEEtypes_Action_WMM_DelTs_t delTs;
+
+} MLAN_PACK_END IEEEtypes_Action_WMMAC_t;
+
+/** union of WMM TSPEC & Action category */
+typedef MLAN_PACK_START union
+{
+    IEEEtypes_ActionCategory_e category;
+
+    IEEEtypes_Action_WMMAC_t wmmAc;
+
+} MLAN_PACK_END IEEEtypes_ActionFrame_t;
+
+/** Data structure for subband set */
+typedef MLAN_PACK_START struct _IEEEtypes_SubbandSet_t
+{
+    /** First channel */
+    t_u8 first_chan;
+    /** Number of channels */
+    t_u8 no_of_chan;
+    /** Maximum Tx power */
+    t_u8 max_tx_pwr;
+} MLAN_PACK_END IEEEtypes_SubbandSet_t, *pIEEEtypes_SubbandSet_t;
+
+#ifdef STA_SUPPORT
+/** Data structure for Country IE */
+typedef MLAN_PACK_START struct _IEEEtypes_CountryInfoSet_t
+{
+    /** Element ID */
+    t_u8 element_id;
+    /** Length */
+    t_u8 len;
+    /** Country code */
+    t_u8 country_code[COUNTRY_CODE_LEN];
+    /** Set of subbands */
+    IEEEtypes_SubbandSet_t sub_band[1];
+} MLAN_PACK_END IEEEtypes_CountryInfoSet_t, *pIEEEtypes_CountryInfoSet_t;
+
+/** Data structure for Country IE full set */
+typedef MLAN_PACK_START struct _IEEEtypes_CountryInfoFullSet_t
+{
+    /** Element ID */
+    t_u8 element_id;
+    /** Length */
+    t_u8 len;
+    /** Country code */
+    t_u8 country_code[COUNTRY_CODE_LEN];
+    /** Set of subbands */
+    IEEEtypes_SubbandSet_t sub_band[MRVDRV_MAX_SUBBAND_802_11D];
+} MLAN_PACK_END IEEEtypes_CountryInfoFullSet_t,
+    *pIEEEtypes_CountryInfoFullSet_t;
+
+#endif /* STA_SUPPORT */
+
+/** HT Capabilities Data */
+typedef struct MLAN_PACK_START _HTCap_t
+{
+    /** HT Capabilities Info field */
+    t_u16 ht_cap_info;
+    /** A-MPDU Parameters field */
+    t_u8 ampdu_param;
+    /** Supported MCS Set field */
+    t_u8 supported_mcs_set[16];
+    /** HT Extended Capabilities field */
+    t_u16 ht_ext_cap;
+    /** Transmit Beamforming Capabilities field */
+    t_u32 tx_bf_cap;
+    /** Antenna Selection Capability field */
+    t_u8 asel;
+} MLAN_PACK_END HTCap_t, *pHTCap_t;
+
+/** HT Information Data */
+typedef struct MLAN_PACK_START _HTInfo_t
+{
+    /** Primary channel */
+    t_u8 pri_chan;
+    /** Field 2 */
+    t_u8 field2;
+    /** Field 3 */
+    t_u16 field3;
+    /** Field 4 */
+    t_u16 field4;
+    /** Bitmap indicating MCSs supported by all HT STAs in the BSS */
+    t_u8 basic_mcs_set[16];
+} MLAN_PACK_END HTInfo_t, *pHTInfo_t;
+
+/** 20/40 BSS Coexistence Data */
+typedef struct MLAN_PACK_START _BSSCo2040_t
+{
+    /** 20/40 BSS Coexistence value */
+    t_u8 bss_co_2040_value;
+} MLAN_PACK_END BSSCo2040_t, *pBSSCo2040_t;
+
+/** Extended Capabilities Data */
+typedef struct MLAN_PACK_START _ExtCap_t
+{
+    /** Extended Capabilities value */
+    t_u8 ext_cap_value;
+} MLAN_PACK_END ExtCap_t, *pExtCap_t;
+
+/** Overlapping BSS Scan Parameters Data */
+typedef struct MLAN_PACK_START _OverlapBSSScanParam_t
+{
+    /** OBSS Scan Passive Dwell */
+    t_u16 obss_scan_passive_dwell;
+    /** OBSS Scan Active Dwell */
+    t_u16 obss_scan_active_dwell;
+    /** BSS Channel Width Trigger Scan Interval */
+    t_u16 bss_chan_width_trigger_scan_int;
+    /** OBSS Scan Passive Total Per Channel */
+    t_u16 obss_scan_passive_total;
+    /** OBSS Scan Active Total Per Channel */
+    t_u16 obss_scan_active_total;
+    /** BSS Width Channel Transition Delay Factor */
+    t_u16 bss_width_chan_trans_delay;
+    /** OBSS Scan Activity Threshold */
+    t_u16 obss_scan_active_threshold;
+} MLAN_PACK_END OBSSScanParam_t, *pOBSSScanParam_t;
+
+/** HT Capabilities IE */
+typedef MLAN_PACK_START struct _IEEEtypes_HTCap_t
+{
+    /** Generic IE header */
+    IEEEtypes_Header_t ieee_hdr;
+    /** HTCap struct */
+    HTCap_t ht_cap;
+} MLAN_PACK_END IEEEtypes_HTCap_t, *pIEEEtypes_HTCap_t;
+
+/** HT Information IE */
+typedef MLAN_PACK_START struct _IEEEtypes_HTInfo_t
+{
+    /** Generic IE header */
+    IEEEtypes_Header_t ieee_hdr;
+    /** HTInfo struct */
+    HTInfo_t ht_info;
+} MLAN_PACK_END IEEEtypes_HTInfo_t, *pIEEEtypes_HTInfo_t;
+
+/** 20/40 BSS Coexistence IE */
+typedef MLAN_PACK_START struct _IEEEtypes_2040BSSCo_t
+{
+    /** Generic IE header */
+    IEEEtypes_Header_t ieee_hdr;
+    /** BSSCo2040_t struct */
+    BSSCo2040_t bss_co_2040;
+} MLAN_PACK_END IEEEtypes_2040BSSCo_t, *pIEEEtypes_2040BSSCo_t;
+
+/** Extended Capabilities IE */
+typedef MLAN_PACK_START struct _IEEEtypes_ExtCap_t
+{
+    /** Generic IE header */
+    IEEEtypes_Header_t ieee_hdr;
+    /** ExtCap_t struct */
+    ExtCap_t ext_cap;
+} MLAN_PACK_END IEEEtypes_ExtCap_t, *pIEEEtypes_ExtCap_t;
+
+/** Overlapping BSS Scan Parameters IE */
+typedef MLAN_PACK_START struct _IEEEtypes_OverlapBSSScanParam_t
+{
+    /** Generic IE header */
+    IEEEtypes_Header_t ieee_hdr;
+    /** OBSSScanParam_t struct */
+    OBSSScanParam_t obss_scan_param;
+} MLAN_PACK_END IEEEtypes_OverlapBSSScanParam_t,
+    *pIEEEtypes_OverlapBSSScanParam_t;
+
+/** Maximum number of subbands in the IEEEtypes_SupportedChannels_t structure */
+#define WLAN_11H_MAX_SUBBANDS  5
+
+/** Maximum number of DFS channels configured in IEEEtypes_IBSS_DFS_t */
+#define WLAN_11H_MAX_IBSS_DFS_CHANNELS 25
+
+/**  IEEE Power Constraint element (7.3.2.15) */
+typedef MLAN_PACK_START struct
+{
+    t_u8 element_id;        /**< IEEE Element ID = 32 */
+    t_u8 len;               /**< Element length after id and len */
+    t_u8 local_constraint;  /**< Local power constraint applied to 11d chan info */
+} MLAN_PACK_END IEEEtypes_PowerConstraint_t;
+
+/**  IEEE Power Capability element (7.3.2.16) */
+typedef MLAN_PACK_START struct
+{
+    t_u8 element_id;                /**< IEEE Element ID = 33 */
+    t_u8 len;                       /**< Element length after id and len */
+    t_s8 min_tx_power_capability;   /**< Minimum Transmit power (dBm) */
+    t_s8 max_tx_power_capability;   /**< Maximum Transmit power (dBm) */
+} MLAN_PACK_END IEEEtypes_PowerCapability_t;
+
+/**  IEEE TPC Report element (7.3.2.18) */
+typedef MLAN_PACK_START struct
+{
+    t_u8 element_id;    /**< IEEE Element ID = 35 */
+    t_u8 len;           /**< Element length after id and len */
+    t_s8 tx_power;      /**< Max power used to transmit the TPC Report frame (dBm) */
+    t_s8 link_margin;   /**< Link margin when TPC Request received (dB) */
+} MLAN_PACK_END IEEEtypes_TPCReport_t;
+
+/*  IEEE Supported Channel sub-band description (7.3.2.19) */
+/**  
+ *  Sub-band description used in the supported channels element. 
+ */
+typedef MLAN_PACK_START struct
+{
+    t_u8 start_chan;    /**< Starting channel in the subband */
+    t_u8 num_chans;     /**< Number of channels in the subband */
+
+} MLAN_PACK_END IEEEtypes_SupportChan_Subband_t;
+
+/*  IEEE Supported Channel element (7.3.2.19) */
+/**
+ *  Sent in association requests. Details the sub-bands and number
+ *    of channels supported in each subband
+ */
+typedef MLAN_PACK_START struct
+{
+    t_u8 element_id;    /**< IEEE Element ID = 36 */
+    t_u8 len;           /**< Element length after id and len */
+
+    /** Configured sub-bands information in the element */
+    IEEEtypes_SupportChan_Subband_t subband[WLAN_11H_MAX_SUBBANDS];
+
+} MLAN_PACK_END IEEEtypes_SupportedChannels_t;
+
+/*  IEEE Channel Switch Announcement Element (7.3.2.20) */
+/**
+ *  Provided in beacons and probe responses.  Used to advertise when
+ *    and to which channel it is changing to.  Only starting STAs in
+ *    an IBSS and APs are allowed to originate a chan switch element. 
+ */
+typedef MLAN_PACK_START struct
+{
+    t_u8 element_id;            /**< IEEE Element ID = 37 */
+    t_u8 len;                   /**< Element length after id and len */
+    t_u8 chan_switch_mode;      /**< STA should not transmit any frames if 1 */
+    t_u8 new_channel_num;       /**< Channel # that AP/IBSS is moving to */
+    t_u8 chan_switch_count;     /**< # of TBTTs before channel switch */
+
+} MLAN_PACK_END IEEEtypes_ChanSwitchAnn_t;
+
+/*  IEEE Quiet Period Element (7.3.2.23) */
+/**
+ *  Provided in beacons and probe responses.  Indicates times during 
+ *    which the STA should not be transmitting data.  Only starting STAs in
+ *    an IBSS and APs are allowed to originate a quiet element. 
+ */
+typedef MLAN_PACK_START struct
+{
+    t_u8 element_id;        /**< IEEE Element ID = 40 */
+    t_u8 len;               /**< Element length after id and len */
+    t_u8 quiet_count;       /**< Number of TBTTs until beacon with the quiet period */
+    t_u8 quiet_period;      /**< Regular quiet period, # of TBTTS between periods */
+    t_u16 quiet_duration;   /**< Duration of the quiet period in TUs */
+    t_u16 quiet_offset;     /**< Offset in TUs from the TBTT for the quiet period */
+
+} MLAN_PACK_END IEEEtypes_Quiet_t;
+
+/**
+***  @brief Map octet of the basic measurement report (7.3.2.22.1)
+**/
+typedef MLAN_PACK_START struct
+{
+#ifdef BIG_ENDIAN_SUPPORT
+    t_u8 rsvd5_7:3;                /**< Reserved */
+    t_u8 unmeasured:1;             /**< Channel is unmeasured */
+    t_u8 radar:1;                  /**< Radar detected on channel */
+    t_u8 unidentified_sig:1;       /**< Unidentified signal found on channel */
+    t_u8 ofdm_preamble:1;          /**< OFDM preamble detected on channel */
+    t_u8 bss:1;                    /**< At least one valid MPDU received on channel */
+#else
+    t_u8 bss:1;                    /**< At least one valid MPDU received on channel */
+    t_u8 ofdm_preamble:1;          /**< OFDM preamble detected on channel */
+    t_u8 unidentified_sig:1;       /**< Unidentified signal found on channel */
+    t_u8 radar:1;                  /**< Radar detected on channel */
+    t_u8 unmeasured:1;             /**< Channel is unmeasured */
+    t_u8 rsvd5_7:3;                /**< Reserved */
+#endif                          /* BIG_ENDIAN_SUPPORT */
+
+} MLAN_PACK_END MeasRptBasicMap_t;
+
+/*  IEEE DFS Channel Map field (7.3.2.24) */
+/**
+ *  Used to list supported channels and provide a octet "map" field which 
+ *    contains a basic measurement report for that channel in the 
+ *    IEEEtypes_IBSS_DFS_t element
+ */
+typedef MLAN_PACK_START struct
+{
+    t_u8 channel_number;        /**< Channel number */
+    MeasRptBasicMap_t rpt_map;  /**< Basic measurement report for the channel */
+
+} MLAN_PACK_END IEEEtypes_ChannelMap_t;
+
+/*  IEEE IBSS DFS Element (7.3.2.24) */
+/**
+ *  IBSS DFS element included in ad hoc beacons and probe responses.  
+ *    Provides information regarding the IBSS DFS Owner as well as the
+ *    originating STAs supported channels and basic measurement results.
+ */
+typedef MLAN_PACK_START struct
+{
+    t_u8 element_id;                        /**< IEEE Element ID = 41 */
+    t_u8 len;                               /**< Element length after id and len */
+    t_u8 dfs_owner[MLAN_MAC_ADDR_LENGTH];   /**< DFS Owner STA Address */
+    t_u8 dfs_recovery_interval;             /**< DFS Recovery time in TBTTs */
+
+    /** Variable length map field, one Map entry for each supported channel */
+    IEEEtypes_ChannelMap_t channel_map[WLAN_11H_MAX_IBSS_DFS_CHANNELS];
+
+} MLAN_PACK_END IEEEtypes_IBSS_DFS_t;
+
+/* 802.11h BSS information kept for each BSSID received in scan results */
+/**
+ * IEEE BSS information needed from scan results for later processing in
+ *    join commands 
+ */
+typedef struct
+{
+    t_u8 sensed_11h;  /**< Capability bit set or 11h IE found in this BSS */
+
+    IEEEtypes_PowerConstraint_t power_constraint; /**< Power Constraint IE */
+    IEEEtypes_PowerCapability_t power_capability; /**< Power Capability IE */
+    IEEEtypes_TPCReport_t tpc_report;             /**< TPC Report IE */
+    IEEEtypes_ChanSwitchAnn_t chan_switch_ann;    /**< Channel Switch Announcement IE */
+    IEEEtypes_Quiet_t quiet;                      /**< Quiet IE */
+    IEEEtypes_IBSS_DFS_t ibss_dfs;                /**< IBSS DFS Element IE */
+
+} wlan_11h_bss_info_t;
+
+#ifdef STA_SUPPORT
+/** Maximum number of channels that can be sent in user scan config */
+#define WLAN_USER_SCAN_CHAN_MAX             50
+
+/** Maximum length of SSID list */
+#define MRVDRV_MAX_SSID_LIST_LENGTH         10
+
+/**
+ *  IOCTL SSID List sub-structure sent in wlan_ioctl_user_scan_cfg
+ * 
+ *  Used to specify SSID specific filters as well as SSID pattern matching
+ *    filters for scan result processing in firmware.
+ */
+typedef MLAN_PACK_START struct _wlan_user_scan_ssid
+{
+    /** SSID */
+    t_u8 ssid[MLAN_MAX_SSID_LENGTH + 1];
+    /** Maximum length of SSID */
+    t_u8 max_len;
+} MLAN_PACK_END wlan_user_scan_ssid;
+
+/**
+ *  @brief IOCTL channel sub-structure sent in wlan_ioctl_user_scan_cfg
+ *
+ *  Multiple instances of this structure are included in the IOCTL command
+ *   to configure a instance of a scan on the specific channel.
+ */
+typedef MLAN_PACK_START struct _wlan_user_scan_chan
+{
+    /** Channel Number to scan */
+    t_u8 chan_number;
+    /** Radio type: 'B/G' Band = 0, 'A' Band = 1 */
+    t_u8 radio_type;
+    /** Scan type: Active = 1, Passive = 2 */
+    t_u8 scan_type;
+    /** Reserved */
+    t_u8 reserved;
+    /** Scan duration in milliseconds; if 0 default used */
+    t_u32 scan_time;
+} MLAN_PACK_END wlan_user_scan_chan;
+
+/**
+ *  Input structure to configure an immediate scan cmd to firmware
+ *
+ *  Specifies a number of parameters to be used in general for the scan 
+ *    as well as a channel list (wlan_user_scan_chan) for each scan period
+ *    desired.
+ */
+typedef MLAN_PACK_START struct
+{
+    /**
+     *  Flag set to keep the previous scan table intact
+     *
+     *  If set, the scan results will accumulate, replacing any previous
+     *   matched entries for a BSS with the new scan data
+     */
+    t_u8 keep_previous_scan;
+    /**
+     *  BSS mode to be sent in the firmware command
+     *
+     *  Field can be used to restrict the types of networks returned in the
+     *    scan.  Valid settings are:
+     *
+     *   - MLAN_SCAN_MODE_BSS  (infrastructure)
+     *   - MLAN_SCAN_MODE_IBSS (adhoc)
+     *   - MLAN_SCAN_MODE_ANY  (unrestricted, adhoc and infrastructure)        
+     */
+    t_u8 bss_mode;
+    /**
+     *  Configure the number of probe requests for active chan scans
+     */
+    t_u8 num_probes;
+    /**
+     *  @brief Reserved
+     */
+    t_u8 reserved;
+    /**
+     *  @brief BSSID filter sent in the firmware command to limit the results
+     */
+    t_u8 specific_bssid[MLAN_MAC_ADDR_LENGTH];
+    /**
+     *  SSID filter list used in the to limit the scan results
+     */
+    wlan_user_scan_ssid ssid_list[MRVDRV_MAX_SSID_LIST_LENGTH];
+    /**
+     *  Variable number (fixed maximum) of channels to scan up
+     */
+    wlan_user_scan_chan chan_list[WLAN_USER_SCAN_CHAN_MAX];
+} MLAN_PACK_END wlan_user_scan_cfg;
+#endif /* STA_SUPPORT */
+
+#ifdef PRAGMA_PACK
+#pragma pack(pop)
+#endif
+
+/** BSSDescriptor_t
+ *    Structure used to store information for beacon/probe response
+ */
+typedef struct _BSSDescriptor_t
+{
+    /** MAC address */
+    mlan_802_11_mac_addr mac_address;
+
+    /** SSID */
+    mlan_802_11_ssid ssid;
+
+    /** WEP encryption requirement */
+    t_u32 privacy;
+
+    /** Receive signal strength in dBm */
+    t_s32 rssi;
+
+    /** Channel */
+    t_u32 channel;
+
+    /** Freq */
+    t_u32 freq;
+
+    /** Beacon period */
+    t_u16 beacon_period;
+
+    /** ATIM window */
+    t_u32 atim_window;
+
+    /** ERP flags */
+    t_u8 erp_flags;
+
+    /** Type of network in use */
+    WLAN_802_11_NETWORK_TYPE network_type_use;
+
+    /** Network infrastructure mode */
+    t_u32 bss_mode;
+
+    /** Network supported rates */
+    WLAN_802_11_RATES supported_rates;
+
+    /** Supported data rates */
+    t_u8 data_rates[WLAN_SUPPORTED_RATES];
+
+    /** Network band.
+     * BAND_B(0x01): 'b' band
+     * BAND_G(0x02): 'g' band
+     * BAND_A(0X04): 'a' band
+     */
+    t_u16 bss_band;
+
+    /** TSF timestamp from the current firmware TSF */
+    t_u64 network_tsf;
+
+    /** TSF value included in the beacon/probe response */
+    t_u8 time_stamp[8];
+
+    /** PHY parameter set */
+    IEEEtypes_PhyParamSet_t phy_param_set;
+
+    /** SS parameter set */
+    IEEEtypes_SsParamSet_t ss_param_set;
+
+    /** Capability information */
+    IEEEtypes_CapInfo_t cap_info;
+
+    /** WMM IE */
+    IEEEtypes_WmmParameter_t wmm_ie;
+
+    /** 802.11h BSS information */
+    wlan_11h_bss_info_t wlan_11h_bss_info;
+
+    /** Indicate disabling 11n when associate with AP */
+    t_u8 disable_11n;
+    /** 802.11n BSS information */
+    /** HT Capabilities IE */
+    IEEEtypes_HTCap_t *pht_cap;
+    /** HT Capabilities Offset */
+    t_u16 ht_cap_offset;
+    /** HT Information IE */
+    IEEEtypes_HTInfo_t *pht_info;
+    /** HT Information Offset */
+    t_u16 ht_info_offset;
+    /** 20/40 BSS Coexistence IE */
+    IEEEtypes_2040BSSCo_t *pbss_co_2040;
+    /** 20/40 BSS Coexistence Offset */
+    t_u16 bss_co_2040_offset;
+    /** Extended Capabilities IE */
+    IEEEtypes_ExtCap_t *pext_cap;
+    /** Extended Capabilities Offset */
+    t_u16 ext_cap_offset;
+    /** Overlapping BSS Scan Parameters IE */
+    IEEEtypes_OverlapBSSScanParam_t *poverlap_bss_scan_param;
+    /** Overlapping BSS Scan Parameters Offset */
+    t_u16 overlap_bss_offset;
+
+#ifdef STA_SUPPORT
+    /** Country information set */
+    IEEEtypes_CountryInfoFullSet_t country_info;
+#endif                          /* STA_SUPPORT */
+
+    /** WPA IE */
+    IEEEtypes_VendorSpecific_t *pwpa_ie;
+    /** WPA IE offset in the beacon buffer */
+    t_u16 wpa_offset;
+    /** RSN IE */
+    IEEEtypes_Generic_t *prsn_ie;
+    /** RSN IE offset in the beacon buffer */
+    t_u16 rsn_offset;
+#ifdef STA_SUPPORT
+    /** WAPI IE */
+    IEEEtypes_Generic_t *pwapi_ie;
+    /** WAPI IE offset in the beacon buffer */
+    t_u16 wapi_offset;
+#endif
+
+    /** Pointer to the returned scan response */
+    t_u8 *pbeacon_buf;
+    /** Length of the stored scan response */
+    t_u32 beacon_buf_size;
+    /** Max allocated size for updated scan response */
+    t_u32 beacon_buf_size_max;
+
+} BSSDescriptor_t, *pBSSDescriptor_t;
+
+#endif /* !_MLAN_IEEE_H_ */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_init.c linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_init.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_init.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_init.c	2017-09-23 03:42:50.110674783 +0800
@@ -0,0 +1,968 @@
+/** @file mlan_init.c
+ *  
+ *  @brief This file contains the initialization for FW
+ *  and HW. 
+ * 
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/********************************************************
+Change log:
+    10/13/2008: initial version
+********************************************************/
+
+#include "mlan.h"
+#ifdef STA_SUPPORT
+#include "mlan_join.h"
+#endif
+#include "mlan_util.h"
+#include "mlan_fw.h"
+#include "mlan_main.h"
+#include "mlan_init.h"
+#include "mlan_wmm.h"
+#include "mlan_11n.h"
+#include "mlan_11h.h"
+#include "mlan_meas.h"
+
+/********************************************************
+        Global Variables
+********************************************************/
+
+/********************************************************
+        Local Functions
+********************************************************/
+
+/**
+ *  @brief This function adds a BSS priority table
+ *  
+ *  @param priv		A pointer to mlan_private structure
+ *
+ *  @return		MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_add_bsspriotbl(pmlan_private priv)
+{
+    pmlan_adapter pmadapter = priv->adapter;
+    mlan_bssprio_node *pbssprio = MNULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    if ((status =
+         pmadapter->callbacks.moal_malloc(pmadapter->pmoal_handle,
+                                          sizeof(mlan_bssprio_node),
+                                          MLAN_MEM_DEF,
+                                          (t_u8 **) & pbssprio))) {
+        PRINTM(MERROR, "Failed to allocate bsspriotbl\n");
+        return status;
+    }
+
+    pbssprio->priv = priv;
+
+    util_init_list((pmlan_linked_list) pbssprio);
+
+    if (!pmadapter->bssprio_tbl[priv->bss_priority].bssprio_cur)
+        pmadapter->bssprio_tbl[priv->bss_priority].bssprio_cur = pbssprio;
+
+    util_enqueue_list_tail(pmadapter->pmoal_handle,
+                           &pmadapter->bssprio_tbl[priv->
+                                                   bss_priority].bssprio_head,
+                           (pmlan_linked_list) pbssprio,
+                           pmadapter->callbacks.moal_spin_lock,
+                           pmadapter->callbacks.moal_spin_unlock);
+
+    LEAVE();
+    return status;
+}
+
+/**
+ *  @brief This function deletes the BSS priority table
+ *  
+ *  @param priv		A pointer to mlan_private structure
+ *
+ *  @return		N/A
+ */
+static t_void
+wlan_delete_bsspriotbl(pmlan_private priv)
+{
+    int i;
+    pmlan_adapter pmadapter = priv->adapter;
+    mlan_bssprio_node *pbssprio_node = MNULL, *ptmp_node = MNULL, **ppcur =
+        MNULL;
+    pmlan_list_head phead;
+
+    ENTER();
+
+    for (i = 0; i < pmadapter->priv_num; ++i) {
+        phead = &pmadapter->bssprio_tbl[i].bssprio_head;
+        ppcur = &pmadapter->bssprio_tbl[i].bssprio_cur;
+        PRINTM(MINFO,
+               "Delete BSS priority table, index = %d, i = %d, phead = %p, pcur = %p\n",
+               priv->bss_index, i, phead, *ppcur);
+        if (*ppcur) {
+            pbssprio_node =
+                (mlan_bssprio_node *) util_peek_list(pmadapter->pmoal_handle,
+                                                     phead,
+                                                     pmadapter->callbacks.
+                                                     moal_spin_lock,
+                                                     pmadapter->callbacks.
+                                                     moal_spin_unlock);
+            while (pbssprio_node && ((pmlan_list_head) pbssprio_node != phead)) {
+                ptmp_node = pbssprio_node->pnext;
+                if (pbssprio_node->priv == priv) {
+                    PRINTM(MINFO, "Delete node, pnode = %p, pnext = %p\n",
+                           pbssprio_node, ptmp_node);
+                    util_unlink_list(pmadapter->pmoal_handle, phead,
+                                     (pmlan_linked_list) pbssprio_node,
+                                     pmadapter->callbacks.moal_spin_lock,
+                                     pmadapter->callbacks.moal_spin_unlock);
+                    pmadapter->callbacks.moal_mfree(pmadapter->pmoal_handle,
+                                                    (t_u8 *) pbssprio_node);
+                }
+                pbssprio_node = ptmp_node;
+            }
+            *ppcur = (mlan_bssprio_node *) phead;
+        }
+    }
+
+    LEAVE();
+}
+
+/********************************************************
+        Global Functions
+********************************************************/
+
+/** 
+ *  @brief This function allocates buffer for the members of adapter
+ *  		structure like command buffer and BSSID list.
+ *  
+ *  @param pmadapter A pointer to mlan_adapter structure
+ *
+ *  @return        MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_allocate_adapter(pmlan_adapter pmadapter)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+#ifdef STA_SUPPORT
+    t_u32 buf_size;
+    BSSDescriptor_t *ptemp_scan_table = MNULL;
+#endif
+
+    ENTER();
+
+#ifdef STA_SUPPORT
+    /* Allocate buffer to store the BSSID list */
+    buf_size = sizeof(BSSDescriptor_t) * MRVDRV_MAX_BSSID_LIST;
+    ret =
+        pmadapter->callbacks.moal_malloc(pmadapter->pmoal_handle, buf_size,
+                                         MLAN_MEM_DEF,
+                                         (t_u8 **) & ptemp_scan_table);
+    if (ret != MLAN_STATUS_SUCCESS || !ptemp_scan_table) {
+        PRINTM(MERROR, "Failed to allocate scan table\n");
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+    pmadapter->pscan_table = ptemp_scan_table;
+    ret =
+        pmadapter->callbacks.moal_malloc(pmadapter->pmoal_handle,
+                                         DEFAULT_SCAN_BEACON_BUFFER,
+                                         MLAN_MEM_DEF,
+                                         (t_u8 **) & pmadapter->bcn_buf);
+    if (ret != MLAN_STATUS_SUCCESS || !pmadapter->bcn_buf) {
+        PRINTM(MERROR, "Failed to allocate bcn buf\n");
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+    pmadapter->bcn_buf_size = DEFAULT_SCAN_BEACON_BUFFER;
+#endif
+
+    /* Allocate command buffer */
+    ret = wlan_alloc_cmd_buffer(pmadapter);
+    if (ret != MLAN_STATUS_SUCCESS) {
+        PRINTM(MERROR, "Failed to allocate command buffer\n");
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+
+    pmadapter->psleep_cfm =
+        wlan_alloc_mlan_buffer(pmadapter, sizeof(opt_sleep_confirm_buffer), 0,
+                               MTRUE);
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function initializes the private structure
+ *  		and sets default values to the members of mlan_private.
+ *  
+ *  @param priv    A pointer to mlan_private structure
+ *
+ *  @return        MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_init_priv(pmlan_private priv)
+{
+    t_u32 i;
+    pmlan_adapter pmadapter = priv->adapter;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    priv->media_connected = MFALSE;
+    memset(pmadapter, priv->curr_addr, 0xff, MLAN_MAC_ADDR_LENGTH);
+
+#ifdef STA_SUPPORT
+    priv->pkt_tx_ctrl = 0;
+    priv->bss_mode = MLAN_BSS_MODE_INFRA;
+    priv->data_rate = 0;        /* Initially indicate the rate as auto */
+    priv->is_data_rate_auto = MTRUE;
+    priv->bcn_avg_factor = DEFAULT_BCN_AVG_FACTOR;
+    priv->data_avg_factor = DEFAULT_DATA_AVG_FACTOR;
+
+    priv->sec_info.wep_status = Wlan802_11WEPDisabled;
+    priv->sec_info.authentication_mode = MLAN_AUTH_MODE_AUTO;
+    priv->sec_info.encryption_mode = MLAN_ENCRYPTION_MODE_NONE;
+    for (i = 0; i < sizeof(priv->wep_key) / sizeof(priv->wep_key[0]); i++)
+        memset(pmadapter, &priv->wep_key[i], 0, sizeof(mrvl_wep_key_t));
+    priv->wep_key_curr_index = 0;
+    priv->ewpa_query = MFALSE;
+    priv->adhoc_aes_enabled = MFALSE;
+    priv->curr_pkt_filter =
+        HostCmd_ACT_MAC_RX_ON | HostCmd_ACT_MAC_TX_ON |
+        HostCmd_ACT_MAC_ETHERNETII_ENABLE;
+
+    priv->beacon_period = MLAN_BEACON_INTERVAL;
+    priv->pattempted_bss_desc = MNULL;
+    memset(pmadapter, &priv->curr_bss_params, 0, sizeof(priv->curr_bss_params));
+    priv->listen_interval = MLAN_DEFAULT_LISTEN_INTERVAL;
+
+    memset(pmadapter, &priv->assoc_rsp_buf, 0, sizeof(priv->assoc_rsp_buf));
+    priv->assoc_rsp_size = 0;
+
+    wlan_11d_priv_init(priv);
+    wlan_11h_priv_init(priv);
+#if defined(UAP_SUPPORT)
+    priv->num_drop_pkts = 0;
+#endif
+    priv->adhoc_channel = DEFAULT_AD_HOC_CHANNEL;
+    priv->atim_window = 0;
+    priv->adhoc_state = ADHOC_IDLE;
+    priv->tx_power_level = 0;
+    priv->max_tx_power_level = 0;
+    priv->min_tx_power_level = 0;
+    priv->tx_rate = 0;
+    priv->rxpd_htinfo = 0;
+    priv->rxpd_rate = 0;
+    priv->rate_bitmap = 0;
+    priv->data_rssi_last = 0;
+    priv->data_rssi_avg = 0;
+    priv->data_nf_avg = 0;
+    priv->data_nf_last = 0;
+    priv->bcn_rssi_last = 0;
+    priv->bcn_rssi_avg = 0;
+    priv->bcn_nf_avg = 0;
+    priv->bcn_nf_last = 0;
+    memset(pmadapter, &priv->wpa_ie, 0, sizeof(priv->wpa_ie));
+    memset(pmadapter, &priv->aes_key, 0, sizeof(priv->aes_key));
+    priv->wpa_ie_len = 0;
+    priv->wpa_is_gtk_set = MFALSE;
+
+    memset(pmadapter, &priv->wps, 0, sizeof(priv->wps));
+    memset(pmadapter, &priv->gen_ie_buf, 0, sizeof(priv->gen_ie_buf));
+    priv->gen_ie_buf_len = 0;
+#endif /* STA_SUPPORT */
+
+    priv->tx_bf_cap = 0;
+    priv->wmm_required = MTRUE;
+    priv->wmm_enabled = MFALSE;
+    priv->wmm_qosinfo = 0;
+#ifdef STA_SUPPORT
+    priv->pcurr_bcn_buf = MNULL;
+    priv->curr_bcn_size = 0;
+#endif /* STA_SUPPORT */
+
+    for (i = 0; i < MAX_NUM_TID; i++)
+        priv->addba_reject[i] = ADDBA_RSP_STATUS_ACCEPT;
+
+    priv->scan_block = MFALSE;
+
+    priv->port_ctrl_mode = MFALSE;
+    priv->port_open = MFALSE;
+
+    if (!ret)
+        ret = wlan_add_bsspriotbl(priv);
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function initializes the adapter structure
+ *  		and sets default values to the members of adapter.
+ *  
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *
+ *  @return		N/A
+ */
+t_void
+wlan_init_adapter(pmlan_adapter pmadapter)
+{
+    opt_sleep_confirm_buffer *sleep_cfm_buf = MNULL;
+
+    ENTER();
+
+    sleep_cfm_buf = (opt_sleep_confirm_buffer *) (pmadapter->psleep_cfm->pbuf +
+                                                  pmadapter->psleep_cfm->
+                                                  data_offset);
+
+#ifdef MFG_CMD_SUPPORT
+    if (pmadapter->init_para.mfg_mode == MLAN_INIT_PARA_DISABLED) {
+        pmadapter->mfg_mode = MFALSE;
+    } else {
+        pmadapter->mfg_mode = pmadapter->init_para.mfg_mode;
+    }
+#endif
+
+#if defined(STA_SUPPORT)
+    pmadapter->pwarm_reset_ioctl_req = MNULL;
+#endif
+    pmadapter->cmd_sent = MFALSE;
+    pmadapter->data_sent = MFALSE;
+    pmadapter->cmd_resp_received = MFALSE;
+    pmadapter->event_received = MFALSE;
+    pmadapter->data_received = MFALSE;
+
+    pmadapter->cmd_timer_is_set = MFALSE;
+
+    /* PnP and power profile */
+    pmadapter->surprise_removed = MFALSE;
+
+    /* Status variables */
+    pmadapter->hw_status = WlanHardwareStatusInitializing;
+
+    if (!pmadapter->init_para.ps_mode) {
+        pmadapter->ps_mode = DEFAULT_PS_MODE;
+    } else if (pmadapter->init_para.ps_mode == MLAN_INIT_PARA_DISABLED) {
+        pmadapter->ps_mode = Wlan802_11PowerModeCAM;
+    } else {
+        pmadapter->ps_mode = Wlan802_11PowerModePSP;
+    }
+    pmadapter->ps_state = PS_STATE_AWAKE;
+    pmadapter->need_to_wakeup = MFALSE;
+
+#ifdef STA_SUPPORT
+    /* Scan type */
+    pmadapter->scan_type = MLAN_SCAN_TYPE_ACTIVE;
+    /* Scan mode */
+    pmadapter->scan_mode = HostCmd_BSS_MODE_ANY;
+    /* Scan time */
+    pmadapter->specific_scan_time = MRVDRV_SPECIFIC_SCAN_CHAN_TIME;
+    pmadapter->active_scan_time = MRVDRV_ACTIVE_SCAN_CHAN_TIME;
+    pmadapter->passive_scan_time = MRVDRV_PASSIVE_SCAN_CHAN_TIME;
+
+    pmadapter->num_in_scan_table = 0;
+    memset(pmadapter, pmadapter->pscan_table, 0,
+           (sizeof(BSSDescriptor_t) * MRVDRV_MAX_BSSID_LIST));
+    pmadapter->scan_probes = DEFAULT_PROBES;
+
+    memset(pmadapter, pmadapter->bcn_buf, 0, pmadapter->bcn_buf_size);
+    pmadapter->pbcn_buf_end = pmadapter->bcn_buf;
+
+    pmadapter->radio_on = RADIO_ON;
+    pmadapter->multiple_dtim = MRVDRV_DEFAULT_MULTIPLE_DTIM;
+
+    pmadapter->local_listen_interval = 0;       /* default value in firmware
+                                                   will be used */
+#endif /* STA_SUPPORT */
+
+    pmadapter->delay_null_pkt = MFALSE;
+    pmadapter->delay_to_ps = DELAY_TO_PS_DEFAULT;
+    pmadapter->enhanced_ps_mode = PS_MODE_AUTO;
+
+    pmadapter->gen_null_pkt = MFALSE;   /* Disable NULL Pkt generation-default */
+    pmadapter->pps_uapsd_mode = MFALSE; /* Disable pps/uapsd mode -default */
+
+    pmadapter->pm_wakeup_card_req = MFALSE;
+
+    pmadapter->pm_wakeup_fw_try = MFALSE;
+
+    if (!pmadapter->init_para.max_tx_buf)
+        pmadapter->max_tx_buf_size = MLAN_TX_DATA_BUF_SIZE_2K;
+    else
+        pmadapter->max_tx_buf_size = (t_u16) pmadapter->init_para.max_tx_buf;
+    pmadapter->tx_buf_size = MLAN_TX_DATA_BUF_SIZE_2K;
+    pmadapter->curr_tx_buf_size = MLAN_TX_DATA_BUF_SIZE_2K;
+
+    pmadapter->is_hs_configured = MFALSE;
+    pmadapter->hs_cfg.conditions = HOST_SLEEP_DEF_COND;
+    pmadapter->hs_cfg.gpio = HOST_SLEEP_DEF_GPIO;
+    pmadapter->hs_cfg.gap = HOST_SLEEP_DEF_GAP;
+    pmadapter->hs_activated = MFALSE;
+
+    memset(pmadapter, pmadapter->event_body, 0, sizeof(pmadapter->event_body));
+    pmadapter->hw_dot_11n_dev_cap = 0;
+    pmadapter->hw_dev_mcs_support = 0;
+    pmadapter->usr_dot_11n_dev_cap = 0;
+    pmadapter->usr_dev_mcs_support = 0;
+#ifdef STA_SUPPORT
+    pmadapter->chan_offset = 0;
+    pmadapter->adhoc_11n_enabled = MFALSE;
+#endif /* STA_SUPPORT */
+
+    /* Initialize 802.11d */
+    wlan_11d_init(pmadapter);
+
+    wlan_11h_init(pmadapter);
+
+    wlan_wmm_init(pmadapter);
+
+    if (pmadapter->psleep_cfm) {
+        pmadapter->psleep_cfm->buf_type = MLAN_BUF_TYPE_CMD;
+        pmadapter->psleep_cfm->data_len = sizeof(OPT_Confirm_Sleep);
+        memset(pmadapter, &sleep_cfm_buf->ps_cfm_sleep, 0,
+               sizeof(OPT_Confirm_Sleep));
+        sleep_cfm_buf->ps_cfm_sleep.command =
+            wlan_cpu_to_le16(HostCmd_CMD_802_11_PS_MODE_ENH);
+        sleep_cfm_buf->ps_cfm_sleep.size =
+            wlan_cpu_to_le16(sizeof(OPT_Confirm_Sleep));
+        sleep_cfm_buf->ps_cfm_sleep.result = 0;
+        sleep_cfm_buf->ps_cfm_sleep.action = wlan_cpu_to_le16(SLEEP_CONFIRM);
+        sleep_cfm_buf->ps_cfm_sleep.sleep_cfm.resp_ctrl =
+            wlan_cpu_to_le16(RESP_NEEDED);
+        sleep_cfm_buf->hdr = wlan_cpu_to_le32(MLAN_USB_TYPE_CMD);
+        pmadapter->psleep_cfm->data_len += MLAN_TYPE_LEN;
+    }
+    memset(pmadapter, &pmadapter->sleep_params, 0,
+           sizeof(pmadapter->sleep_params));
+    memset(pmadapter, &pmadapter->sleep_period, 0,
+           sizeof(pmadapter->sleep_period));
+    pmadapter->tx_lock_flag = MFALSE;
+    pmadapter->null_pkt_interval = 0;
+    pmadapter->fw_bands = 0;
+    pmadapter->config_bands = 0;
+    pmadapter->adhoc_start_band = 0;
+    pmadapter->pscan_channels = MNULL;
+    pmadapter->fw_release_number = 0;
+    pmadapter->fw_cap_info = 0;
+    memset(pmadapter, &pmadapter->upld_buf, 0, sizeof(pmadapter->upld_buf));
+    pmadapter->upld_len = 0;
+    pmadapter->event_cause = 0;
+    pmadapter->pmlan_buffer_event = MNULL;
+    memset(pmadapter, &pmadapter->region_channel, 0,
+           sizeof(pmadapter->region_channel));
+    pmadapter->region_code = 0;
+    pmadapter->bcn_miss_time_out = DEFAULT_BCN_MISS_TIMEOUT;
+    pmadapter->adhoc_awake_period = 0;
+#ifdef STA_SUPPORT
+    memset(pmadapter, &pmadapter->arp_filter, 0, sizeof(pmadapter->arp_filter));
+    pmadapter->arp_filter_size = 0;
+#endif /* STA_SUPPORT */
+
+    LEAVE();
+    return;
+}
+
+/**
+ *  @brief This function intializes the lock variables and 
+ *  the list heads.
+ *  
+ *  @param pmadapter  A pointer to a mlan_adapter structure
+ *
+ *  @return           MLAN_STATUS_SUCCESS -- on success,
+ *                    otherwise MLAN_STATUS_FAILURE
+ *
+ */
+mlan_status
+wlan_init_lock_list(IN pmlan_adapter pmadapter)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_private priv = MNULL;
+    pmlan_callbacks pcb = &pmadapter->callbacks;
+    t_s32 i = 0;
+    t_u32 j = 0;
+
+    ENTER();
+
+    if (pcb->moal_init_lock(pmadapter->pmoal_handle, &pmadapter->pmlan_lock)
+        != MLAN_STATUS_SUCCESS) {
+        ret = MLAN_STATUS_FAILURE;
+        goto error;
+    }
+    if (pcb->
+        moal_init_lock(pmadapter->pmoal_handle, &pmadapter->pmain_proc_lock)
+        != MLAN_STATUS_SUCCESS) {
+        ret = MLAN_STATUS_FAILURE;
+        goto error;
+    }
+    if (pcb->moal_init_lock(pmadapter->pmoal_handle, &pmadapter->pmlan_cmd_lock)
+        != MLAN_STATUS_SUCCESS) {
+        ret = MLAN_STATUS_FAILURE;
+        goto error;
+    }
+    for (i = 0; i < pmadapter->priv_num; i++) {
+        if (pmadapter->priv[i]) {
+            priv = pmadapter->priv[i];
+            if (pcb->moal_init_lock(pmadapter->pmoal_handle, &priv->rx_pkt_lock)
+                != MLAN_STATUS_SUCCESS) {
+                ret = MLAN_STATUS_FAILURE;
+                goto error;
+            }
+            if (pcb->
+                moal_init_lock(pmadapter->pmoal_handle,
+                               &priv->wmm.ra_list_spinlock)
+                != MLAN_STATUS_SUCCESS) {
+                ret = MLAN_STATUS_FAILURE;
+                goto error;
+            }
+#ifdef STA_SUPPORT
+            if (pcb->
+                moal_init_lock(pmadapter->pmoal_handle,
+                               &priv->curr_bcn_buf_lock)
+                != MLAN_STATUS_SUCCESS) {
+                ret = MLAN_STATUS_FAILURE;
+                goto error;
+            }
+#endif
+        }
+    }
+
+    util_init_list_head((t_void *) pmadapter->pmoal_handle,
+                        &pmadapter->rx_data_queue, MTRUE,
+                        pmadapter->callbacks.moal_init_lock);
+    /* Initialize bypass_txq */
+    util_init_list_head((t_void *) pmadapter->pmoal_handle,
+                        &pmadapter->bypass_txq, MTRUE,
+                        pmadapter->callbacks.moal_init_lock);
+    /* Initialize cmd_free_q */
+    util_init_list_head((t_void *) pmadapter->pmoal_handle,
+                        &pmadapter->cmd_free_q, MTRUE,
+                        pmadapter->callbacks.moal_init_lock);
+    /* Initialize cmd_pending_q */
+    util_init_list_head((t_void *) pmadapter->pmoal_handle,
+                        &pmadapter->cmd_pending_q, MTRUE,
+                        pmadapter->callbacks.moal_init_lock);
+    /* Initialize scan_pending_q */
+    util_init_list_head((t_void *) pmadapter->pmoal_handle,
+                        &pmadapter->scan_pending_q, MTRUE,
+                        pmadapter->callbacks.moal_init_lock);
+
+    for (i = 0; i < pmadapter->priv_num; ++i) {
+        util_init_list_head((t_void *) pmadapter->pmoal_handle,
+                            &pmadapter->bssprio_tbl[i].bssprio_head,
+                            MTRUE, pmadapter->callbacks.moal_init_lock);
+        pmadapter->bssprio_tbl[i].bssprio_cur = MNULL;
+    }
+
+    for (i = 0; i < pmadapter->priv_num; i++) {
+        if (pmadapter->priv[i]) {
+            priv = pmadapter->priv[i];
+            for (j = 0; j < MAX_NUM_TID; ++j) {
+                util_init_list_head((t_void *) pmadapter->pmoal_handle,
+                                    &priv->wmm.tid_tbl_ptr[j].ra_list, MTRUE,
+                                    priv->adapter->callbacks.moal_init_lock);
+            }
+            util_init_list_head((t_void *) pmadapter->pmoal_handle,
+                                &priv->tx_ba_stream_tbl_ptr, MTRUE,
+                                pmadapter->callbacks.moal_init_lock);
+            util_init_list_head((t_void *) pmadapter->pmoal_handle,
+                                &priv->rx_reorder_tbl_ptr, MTRUE,
+                                pmadapter->callbacks.moal_init_lock);
+            util_scalar_init((t_void *) pmadapter->pmoal_handle,
+                             &priv->wmm.tx_pkts_queued, 0,
+                             priv->wmm.ra_list_spinlock,
+                             pmadapter->callbacks.moal_init_lock);
+            util_scalar_init((t_void *) pmadapter->pmoal_handle,
+                             &priv->wmm.highest_queued_prio, HIGH_PRIO_TID,
+                             priv->wmm.ra_list_spinlock,
+                             pmadapter->callbacks.moal_init_lock);
+            util_init_list_head((t_void *) pmadapter->pmoal_handle,
+                                &priv->sta_list, MTRUE,
+                                pmadapter->callbacks.moal_init_lock);
+        }
+    }
+
+  error:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function releases the lock variables
+ *  
+ *  @param pmadapter  A pointer to a mlan_adapter structure
+ *
+ *  @return           None 
+ *
+ */
+t_void
+wlan_free_lock_list(IN pmlan_adapter pmadapter)
+{
+    pmlan_private priv = MNULL;
+    pmlan_callbacks pcb = &pmadapter->callbacks;
+    t_s32 i = 0;
+    t_s32 j = 0;
+
+    ENTER();
+
+    if (pmadapter->pmlan_lock)
+        pcb->moal_free_lock(pmadapter->pmoal_handle, pmadapter->pmlan_lock);
+    if (pmadapter->pmain_proc_lock)
+        pcb->moal_free_lock(pmadapter->pmoal_handle,
+                            pmadapter->pmain_proc_lock);
+    if (pmadapter->pmlan_cmd_lock)
+        pcb->moal_free_lock(pmadapter->pmoal_handle, pmadapter->pmlan_cmd_lock);
+
+    for (i = 0; i < pmadapter->priv_num; i++) {
+        if (pmadapter->priv[i]) {
+            priv = pmadapter->priv[i];
+            if (priv->rx_pkt_lock)
+                pcb->moal_free_lock(pmadapter->pmoal_handle, priv->rx_pkt_lock);
+            if (priv->wmm.ra_list_spinlock)
+                pcb->moal_free_lock(pmadapter->pmoal_handle,
+                                    priv->wmm.ra_list_spinlock);
+#ifdef STA_SUPPORT
+            if (priv->curr_bcn_buf_lock)
+                pcb->moal_free_lock(pmadapter->pmoal_handle,
+                                    priv->curr_bcn_buf_lock);
+#endif
+        }
+    }
+
+    /* Free lists */
+    util_free_list_head((t_void *) pmadapter->pmoal_handle,
+                        &pmadapter->rx_data_queue, pcb->moal_free_lock);
+    util_free_list_head((t_void *) pmadapter->pmoal_handle,
+                        &pmadapter->bypass_txq,
+                        pmadapter->callbacks.moal_free_lock);
+    util_free_list_head((t_void *) pmadapter->pmoal_handle,
+                        &pmadapter->cmd_free_q,
+                        pmadapter->callbacks.moal_free_lock);
+
+    util_free_list_head((t_void *) pmadapter->pmoal_handle,
+                        &pmadapter->cmd_pending_q,
+                        pmadapter->callbacks.moal_free_lock);
+
+    util_free_list_head((t_void *) pmadapter->pmoal_handle,
+                        &pmadapter->scan_pending_q,
+                        pmadapter->callbacks.moal_free_lock);
+
+    for (i = 0; i < pmadapter->priv_num; i++)
+        util_free_list_head((t_void *) pmadapter->pmoal_handle,
+                            &pmadapter->bssprio_tbl[i].bssprio_head,
+                            pcb->moal_free_lock);
+
+    for (i = 0; i < pmadapter->priv_num; i++) {
+        if (pmadapter->priv[i]) {
+            priv = pmadapter->priv[i];
+            util_free_list_head((t_void *) pmadapter->pmoal_handle,
+                                &priv->sta_list,
+                                priv->adapter->callbacks.moal_free_lock);
+
+            for (j = 0; j < MAX_NUM_TID; ++j)
+                util_free_list_head((t_void *) priv->adapter->pmoal_handle,
+                                    &priv->wmm.tid_tbl_ptr[j].ra_list,
+                                    priv->adapter->callbacks.moal_free_lock);
+            util_free_list_head((t_void *) priv->adapter->pmoal_handle,
+                                &priv->tx_ba_stream_tbl_ptr,
+                                priv->adapter->callbacks.moal_free_lock);
+            util_free_list_head((t_void *) priv->adapter->pmoal_handle,
+                                &priv->rx_reorder_tbl_ptr,
+                                priv->adapter->callbacks.moal_free_lock);
+            util_scalar_free((t_void *) priv->adapter->pmoal_handle,
+                             &priv->wmm.tx_pkts_queued,
+                             priv->adapter->callbacks.moal_free_lock);
+            util_scalar_free((t_void *) priv->adapter->pmoal_handle,
+                             &priv->wmm.highest_queued_prio,
+                             priv->adapter->callbacks.moal_free_lock);
+        }
+    }
+
+    LEAVE();
+    return;
+}
+
+/**
+ *  @brief This function intializes the timers
+ *  
+ *  @param pmadapter  A pointer to a mlan_adapter structure
+ *
+ *  @return           MLAN_STATUS_SUCCESS -- on success,
+ *                    otherwise MLAN_STATUS_FAILURE
+ *
+ */
+mlan_status
+wlan_init_timer(IN pmlan_adapter pmadapter)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_callbacks pcb = &pmadapter->callbacks;
+
+    ENTER();
+
+    /* Initializing device to host Heart Beat timer */
+    if (pcb->
+        moal_init_timer(pmadapter->pmoal_handle, &pmadapter->hb_device_timer,
+                        wlan_device_heart_beat, pmadapter)
+        != MLAN_STATUS_SUCCESS) {
+        ret = MLAN_STATUS_FAILURE;
+        goto error;
+    }
+    pmadapter->hb_dev_timer_is_set = MFALSE;
+
+    /* Initializing host to device Heart Beat timer */
+    if (pcb->
+        moal_init_timer(pmadapter->pmoal_handle, &pmadapter->hb_host_timer,
+                        wlan_host_heart_beat, pmadapter)
+        != MLAN_STATUS_SUCCESS) {
+        ret = MLAN_STATUS_FAILURE;
+        goto error;
+    }
+    pmadapter->hb_host_timer_is_set = MFALSE;
+    if (pcb->
+        moal_init_timer(pmadapter->pmoal_handle, &pmadapter->pmlan_cmd_timer,
+                        wlan_cmd_timeout_func, pmadapter)
+        != MLAN_STATUS_SUCCESS) {
+        ret = MLAN_STATUS_FAILURE;
+        goto error;
+    }
+  error:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function releases the timers
+ *  
+ *  @param pmadapter  A pointer to a mlan_adapter structure
+ *
+ *  @return           None 
+ *
+ */
+t_void
+wlan_free_timer(IN pmlan_adapter pmadapter)
+{
+    pmlan_callbacks pcb = &pmadapter->callbacks;
+
+    ENTER();
+
+    if (pmadapter->hb_device_timer)
+        pcb->moal_free_timer(pmadapter->pmoal_handle,
+                             pmadapter->hb_device_timer);
+    if (pmadapter->hb_host_timer)
+        pcb->moal_free_timer(pmadapter->pmoal_handle, pmadapter->hb_host_timer);
+    if (pmadapter->pmlan_cmd_timer)
+        pcb->moal_free_timer(pmadapter->pmoal_handle,
+                             pmadapter->pmlan_cmd_timer);
+
+    LEAVE();
+    return;
+}
+
+/**
+ *  @brief  This function initializes firmware
+ *
+ *  @param pmadapter		A pointer to mlan_adapter
+ *
+ *  @return		MLAN_STATUS_SUCCESS, MLAN_STATUS_PENDING or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_init_fw(IN pmlan_adapter pmadapter)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_private priv = MNULL;
+    t_u8 i = 0;
+
+    ENTER();
+
+    /* Initialize adapter structure */
+    wlan_init_adapter(pmadapter);
+
+    for (i = 0; i < pmadapter->priv_num; i++) {
+        if (pmadapter->priv[i]) {
+            priv = pmadapter->priv[i];
+
+            /* Initialize private structure */
+            if ((ret = wlan_init_priv(priv))) {
+                ret = MLAN_STATUS_FAILURE;
+                goto done;
+            }
+        }
+    }
+#ifdef MFG_CMD_SUPPORT
+    if (pmadapter->mfg_mode != MTRUE) {
+#endif
+        /* Issue firmware initialize commands for first BSS, for other
+           interfaces it will be called after getting the last init command
+           response of previous interface */
+        priv = wlan_get_priv(pmadapter, MLAN_BSS_ROLE_ANY);
+        ret = priv->ops.init_cmd(priv, MTRUE);
+        if (ret == MLAN_STATUS_FAILURE)
+            goto done;
+#ifdef MFG_CMD_SUPPORT
+    }
+#endif
+
+    if (util_peek_list(pmadapter->pmoal_handle, &pmadapter->cmd_pending_q,
+                       pmadapter->callbacks.moal_spin_lock,
+                       pmadapter->callbacks.moal_spin_unlock)) {
+        /* Send the first command in queue and return */
+        if (mlan_main_process(pmadapter) == MLAN_STATUS_FAILURE)
+            ret = MLAN_STATUS_FAILURE;
+        else
+            ret = MLAN_STATUS_PENDING;
+    } else {
+        pmadapter->hw_status = WlanHardwareStatusReady;
+    }
+  done:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief This function frees the structure of adapter
+ *    
+ *  @param pmadapter      A pointer to mlan_adapter structure
+ *
+ *  @return             N/A
+ */
+t_void
+wlan_free_adapter(pmlan_adapter pmadapter)
+{
+    mlan_callbacks *pcb = (mlan_callbacks *) & pmadapter->callbacks;
+
+    ENTER();
+
+    if (!pmadapter) {
+        PRINTM(MERROR, "The adapter is NULL\n");
+        LEAVE();
+        return;
+    }
+
+    wlan_cancel_all_pending_cmd(pmadapter);
+    /* Free command buffer */
+    PRINTM(MINFO, "Free Command buffer\n");
+    wlan_free_cmd_buffer(pmadapter);
+
+    if (pmadapter->cmd_timer_is_set) {
+        /* Cancel command timeout timer */
+        pcb->moal_stop_timer(pmadapter->pmoal_handle,
+                             pmadapter->pmlan_cmd_timer);
+        pmadapter->cmd_timer_is_set = MFALSE;
+    }
+    if (pmadapter->hb_host_timer_is_set) {
+        pcb->moal_stop_timer(pmadapter->pmoal_handle, pmadapter->hb_host_timer);
+        pmadapter->hb_host_timer_is_set = MFALSE;
+    }
+    if (pmadapter->hb_dev_timer_is_set) {
+        pcb->moal_stop_timer(pmadapter->pmoal_handle,
+                             pmadapter->hb_device_timer);
+        pmadapter->hb_dev_timer_is_set = MFALSE;
+    }
+#ifdef STA_SUPPORT
+    PRINTM(MINFO, "Free ScanTable\n");
+    if (pmadapter->pscan_table) {
+        pcb->moal_mfree(pmadapter->pmoal_handle,
+                        (t_u8 *) pmadapter->pscan_table);
+        pmadapter->pscan_table = MNULL;
+    }
+    if (pmadapter->bcn_buf) {
+        pcb->moal_mfree(pmadapter->pmoal_handle, (t_u8 *) pmadapter->bcn_buf);
+        pmadapter->bcn_buf = MNULL;
+    }
+#endif
+
+    wlan_11h_cleanup(pmadapter);
+
+    wlan_free_mlan_buffer(pmadapter, pmadapter->psleep_cfm);
+    pmadapter->psleep_cfm = MNULL;
+
+    LEAVE();
+    return;
+}
+
+/** 
+ *  @brief This function frees the structure of priv
+ *    
+ *  @param pmpriv  A pointer to mlan_private structure
+ *
+ *  @return        N/A
+ */
+t_void
+wlan_free_priv(mlan_private * pmpriv)
+{
+    wlan_clean_txrx(pmpriv);
+    wlan_delete_bsspriotbl(pmpriv);
+
+#ifdef STA_SUPPORT
+    wlan_free_curr_bcn(pmpriv);
+#endif /* STA_SUPPORT */
+
+    wlan_delete_station_list(pmpriv);
+}
+
+/**
+ *  @brief The cmdresp handler calls this function for init_fw_complete callback
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *
+ *  @return		MLAN_STATUS_SUCCESS
+ *                      	The firmware initialization callback succeeded.
+ */
+mlan_status
+wlan_init_fw_complete(IN pmlan_adapter pmadapter)
+{
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_callbacks pcb = &pmadapter->callbacks;
+
+    ENTER();
+
+    /* Check if hardware is ready */
+    if (pmadapter->hw_status != WlanHardwareStatusReady)
+        status = MLAN_STATUS_FAILURE;
+
+    /* Invoke callback */
+    ret = pcb->moal_init_fw_complete(pmadapter->pmoal_handle, status);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief The cmdresp handler calls this function for shutdown_fw_complete callback
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *
+ *  @return		MLAN_STATUS_SUCCESS
+ *                      	The firmware shutdown callback succeeded.
+ */
+mlan_status
+wlan_shutdown_fw_complete(IN pmlan_adapter pmadapter)
+{
+    pmlan_callbacks pcb = &pmadapter->callbacks;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+
+    pmadapter->hw_status = WlanHardwareStatusNotReady;
+    /* Invoke callback */
+    return pcb->moal_shutdown_fw_complete(pmadapter->pmoal_handle, status);
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_init.h linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_init.h
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_init.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_init.h	2017-09-23 03:42:50.114674771 +0800
@@ -0,0 +1,95 @@
+/** @file mlan_init.h
+ *
+ *  @brief This file defines the FW initialization data
+ *  structures.
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/******************************************************
+Change log:
+    10/13/2008: initial version
+******************************************************/
+
+#ifndef _MLAN_INIT_H_
+#define _MLAN_INIT_H_
+
+/** Tx buffer size for firmware download*/
+#define FW_DNLD_TX_BUF_SIZE	620
+/** Rx buffer size for firmware download*/
+#define FW_DNLD_RX_BUF_SIZE       2048
+/** Max firmware retry */
+#define MAX_FW_RETRY        	3
+
+/** Firmware has last block */
+#define FW_HAS_LAST_BLOCK		0x00000004
+
+/** Firmware data transmit size */
+#define FW_DATA_XMIT_SIZE \
+	sizeof(FWHeader) + DataLength + sizeof(t_u32)
+
+/** FWHeader */
+typedef struct _FWHeader
+{
+    /** FW download command */
+    t_u32 dnld_cmd;
+    /** FW base address */
+    t_u32 base_addr;
+    /** FW data length */
+    t_u32 data_length;
+    /** FW CRC */
+    t_u32 crc;
+} FWHeader;
+
+/** FWData */
+typedef struct _FWData
+{
+    /** FW data header */
+    FWHeader fw_header;
+    /** FW data sequence number */
+    t_u32 seq_num;
+    /** FW data buffer */
+    t_u8 data[1];
+} FWData;
+
+/** FWSyncHeader */
+typedef struct _FWSyncHeader
+{
+    /** FW sync header command */
+    t_u32 cmd;
+    /** FW sync header sequence number */
+    t_u32 seq_num;
+} FWSyncHeader;
+
+#ifdef BIG_ENDIAN_SUPPORT
+/** Convert sequence number and command fields of fwheader to correct endian format */
+#define endian_convert_syncfwheader(x)  { \
+		(x)->cmd = wlan_le32_to_cpu((x)->cmd); \
+		(x)->seq_num = wlan_le32_to_cpu((x)->seq_num); \
+	}
+#else
+/** Convert sequence number and command fields of fwheader to correct endian format */
+#define endian_convert_syncfwheader(x)
+#endif /* BIG_ENDIAN_SUPPORT */
+
+#endif /* _MLAN_INIT_H_ */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_ioctl.h linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_ioctl.h
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_ioctl.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_ioctl.h	2017-09-23 03:42:50.114674771 +0800
@@ -0,0 +1,2537 @@
+/** @file mlan_ioctl.h
+ *
+ *  @brief This file declares the IOCTL data structures and APIs.
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/******************************************************
+Change log:
+    11/07/2008: initial version
+******************************************************/
+
+#ifndef _MLAN_IOCTL_H_
+#define _MLAN_IOCTL_H_
+
+/** mlan_802_11_ssid data structure */
+typedef struct _mlan_802_11_ssid
+{
+    /** SSID Length */
+    t_u32 ssid_len;
+    /** SSID information field */
+    t_u8 ssid[MLAN_MAX_SSID_LENGTH];
+} mlan_802_11_ssid, *pmlan_802_11_ssid;
+
+/** Enumeration for IOCTL request ID */
+enum _mlan_ioctl_req_id
+{
+    /* Scan Group */
+    MLAN_IOCTL_SCAN = 0x00010000,
+    MLAN_OID_SCAN_NORMAL,
+    MLAN_OID_SCAN_SPECIFIC_SSID,
+    MLAN_OID_SCAN_USER_CONFIG,
+    MLAN_OID_SCAN_CONFIG,
+    MLAN_OID_SCAN_GET_CURRENT_BSS,
+    MLAN_OID_SCAN_CANCEL,
+    MLAN_OID_SCAN_TABLE_FLUSH,
+
+    /* BSS Configuration Group */
+    MLAN_IOCTL_BSS = 0x00020000,
+    MLAN_OID_BSS_START,
+    MLAN_OID_BSS_STOP,
+    MLAN_OID_BSS_MODE,
+    MLAN_OID_BSS_CHANNEL,
+    MLAN_OID_BSS_CHANNEL_LIST,
+    MLAN_OID_BSS_MAC_ADDR,
+    MLAN_OID_BSS_MULTICAST_LIST,
+    MLAN_OID_BSS_FIND_BSS,
+    MLAN_OID_IBSS_BCN_INTERVAL,
+    MLAN_OID_IBSS_ATIM_WINDOW,
+    MLAN_OID_IBSS_CHANNEL,
+#ifdef UAP_SUPPORT
+    MLAN_OID_UAP_BSS_CONFIG,
+    MLAN_OID_UAP_DEAUTH_STA,
+    MLAN_OID_UAP_BSS_RESET,
+#endif
+#if defined(STA_SUPPORT) && defined(UAP_SUPPORT)
+    MLAN_OID_BSS_ROLE,
+#endif
+
+    /* Radio Configuration Group */
+    MLAN_IOCTL_RADIO_CFG = 0x00030000,
+    MLAN_OID_RADIO_CTRL,
+    MLAN_OID_BAND_CFG,
+    MLAN_OID_ANT_CFG,
+
+    /* SNMP MIB Group */
+    MLAN_IOCTL_SNMP_MIB = 0x00040000,
+    MLAN_OID_SNMP_MIB_RTS_THRESHOLD,
+    MLAN_OID_SNMP_MIB_FRAG_THRESHOLD,
+    MLAN_OID_SNMP_MIB_RETRY_COUNT,
+
+    /* Status Information Group */
+    MLAN_IOCTL_GET_INFO = 0x00050000,
+    MLAN_OID_GET_STATS,
+    MLAN_OID_GET_SIGNAL,
+    MLAN_OID_GET_FW_INFO,
+    MLAN_OID_GET_VER_EXT,
+    MLAN_OID_GET_BSS_INFO,
+    MLAN_OID_GET_DEBUG_INFO,
+#ifdef UAP_SUPPORT
+    MLAN_OID_UAP_STA_LIST,
+#endif
+
+    /* Security Configuration Group */
+    MLAN_IOCTL_SEC_CFG = 0x00060000,
+    MLAN_OID_SEC_CFG_AUTH_MODE,
+    MLAN_OID_SEC_CFG_ENCRYPT_MODE,
+    MLAN_OID_SEC_CFG_WPA_ENABLED,
+    MLAN_OID_SEC_CFG_ENCRYPT_KEY,
+    MLAN_OID_SEC_CFG_PASSPHRASE,
+    MLAN_OID_SEC_CFG_EWPA_ENABLED,
+    MLAN_OID_SEC_CFG_ESUPP_MODE,
+    MLAN_OID_SEC_CFG_WAPI_ENABLED,
+    MLAN_OID_SEC_CFG_PORT_CTRL_ENABLED,
+
+    /* Rate Group */
+    MLAN_IOCTL_RATE = 0x00070000,
+    MLAN_OID_RATE_CFG,
+    MLAN_OID_GET_DATA_RATE,
+    MLAN_OID_SUPPORTED_RATES,
+
+    /* Power Configuration Group */
+    MLAN_IOCTL_POWER_CFG = 0x00080000,
+    MLAN_OID_POWER_CFG,
+    MLAN_OID_POWER_CFG_EXT,
+
+    /* Power Management Configuration Group */
+    MLAN_IOCTL_PM_CFG = 0x00090000,
+    MLAN_OID_PM_CFG_IEEE_PS,
+    MLAN_OID_PM_CFG_HS_CFG,
+    MLAN_OID_PM_CFG_INACTIVITY_TO,
+    MLAN_OID_PM_CFG_SLEEP_PD,
+    MLAN_OID_PM_CFG_PS_CFG,
+    MLAN_OID_PM_CFG_SLEEP_PARAMS,
+#ifdef UAP_SUPPORT
+    MLAN_OID_PM_CFG_PS_MODE,
+#endif /* UAP_SUPPORT */
+    MLAN_OID_PM_INFO,
+
+    /* WMM Configuration Group */
+    MLAN_IOCTL_WMM_CFG = 0x000A0000,
+    MLAN_OID_WMM_CFG_ENABLE,
+    MLAN_OID_WMM_CFG_QOS,
+    MLAN_OID_WMM_CFG_ADDTS,
+    MLAN_OID_WMM_CFG_DELTS,
+    MLAN_OID_WMM_CFG_QUEUE_CONFIG,
+    MLAN_OID_WMM_CFG_QUEUE_STATS,
+    MLAN_OID_WMM_CFG_QUEUE_STATUS,
+    MLAN_OID_WMM_CFG_TS_STATUS,
+
+    /* WPS Configuration Group */
+    MLAN_IOCTL_WPS_CFG = 0x000B0000,
+    MLAN_OID_WPS_CFG_SESSION,
+
+    /* 802.11n Configuration Group */
+    MLAN_IOCTL_11N_CFG = 0x000C0000,
+    MLAN_OID_11N_CFG_TX,
+    MLAN_OID_11N_HTCAP_CFG,
+    MLAN_OID_11N_CFG_ADDBA_REJECT,
+    MLAN_OID_11N_CFG_AGGR_PRIO_TBL,
+    MLAN_OID_11N_CFG_ADDBA_PARAM,
+    MLAN_OID_11N_CFG_MAX_TX_BUF_SIZE,
+    MLAN_OID_11N_CFG_AMSDU_AGGR_CTRL,
+    MLAN_OID_11N_CFG_SUPPORTED_MCS_SET,
+    MLAN_OID_11N_CFG_TX_BF_CAP,
+
+    /* 802.11d Configuration Group */
+    MLAN_IOCTL_11D_CFG = 0x000D0000,
+#ifdef STA_SUPPORT
+    MLAN_OID_11D_CFG_ENABLE,
+    MLAN_OID_11D_CLR_CHAN_TABLE,
+#endif /* STA_SUPPORT */
+#if defined(STA_SUPPORT)
+    MLAN_OID_11D_DOMAIN_INFO,
+#endif /* STA_SUPPORT || DFS_SUPPORT */
+
+    /* Register Memory Access Group */
+    MLAN_IOCTL_REG_MEM = 0x000E0000,
+    MLAN_OID_REG_RW,
+    MLAN_OID_EEPROM_RD,
+    MLAN_OID_MEM_RW,
+
+    /* 802.11h Configuration Group */
+    MLAN_IOCTL_11H_CFG = 0x00110000,
+    MLAN_OID_11H_CHANNEL_CHECK,
+    MLAN_OID_11H_LOCAL_POWER_CONSTRAINT,
+
+    /* Miscellaneous Configuration Group */
+    MLAN_IOCTL_MISC_CFG = 0x00200000,
+    MLAN_OID_MISC_GEN_IE,
+    MLAN_OID_MISC_REGION,
+    MLAN_OID_MISC_WARM_RESET,
+    MLAN_OID_MISC_HEART_BEAT,
+    MLAN_OID_MISC_HOST_CMD,
+    MLAN_OID_MISC_SYS_CLOCK,
+    MLAN_OID_MISC_SOFT_RESET,
+    MLAN_OID_MISC_WWS,
+    MLAN_OID_MISC_INIT_SHUTDOWN,
+    MLAN_OID_MISC_CUSTOM_IE,
+    MLAN_OID_MISC_TX_DATAPAUSE,
+    MLAN_OID_MISC_IP_ADDR,
+    MLAN_OID_MISC_MAC_CONTROL,
+    MLAN_OID_MISC_MEF_CFG,
+    MLAN_OID_MISC_THERMAL,
+};
+
+/** Sub command size */
+#define MLAN_SUB_COMMAND_SIZE	4
+
+/** Enumeration for the action of IOCTL request */
+enum _mlan_act_ioctl
+{
+    MLAN_ACT_SET = 1,
+    MLAN_ACT_GET,
+    MLAN_ACT_CANCEL
+};
+
+/** Enumeration for generic enable/disable */
+enum _mlan_act_generic
+{
+    MLAN_ACT_DISABLE = 0,
+    MLAN_ACT_ENABLE = 1
+};
+
+/** Enumeration for scan mode */
+enum _mlan_scan_mode
+{
+    MLAN_SCAN_MODE_UNCHANGED = 0,
+    MLAN_SCAN_MODE_BSS,
+    MLAN_SCAN_MODE_IBSS,
+    MLAN_SCAN_MODE_ANY
+};
+
+/** Enumeration for scan type */
+enum _mlan_scan_type
+{
+    MLAN_SCAN_TYPE_UNCHANGED = 0,
+    MLAN_SCAN_TYPE_ACTIVE,
+    MLAN_SCAN_TYPE_PASSIVE
+};
+
+/** Max number of supported rates */
+#define MLAN_SUPPORTED_RATES	32
+
+/** RSSI scan */
+#define SCAN_RSSI(RSSI)			(0x100 - ((t_u8)(RSSI)))
+
+/** Max passive scan time for each channel in milliseconds */
+#define MRVDRV_MAX_PASSIVE_SCAN_CHAN_TIME   2000
+
+/** Max active scan time for each channel in milliseconds  */
+#define MRVDRV_MAX_ACTIVE_SCAN_CHAN_TIME    500
+
+/** Maximum number of probes to send on each channel */
+#define MAX_PROBES      4
+
+/** Default number of probes to send on each channel */
+#define DEFAULT_PROBES  4
+
+/**
+ *  @brief Sub-structure passed in wlan_ioctl_get_scan_table_entry for each BSS
+ *
+ *  Fixed field information returned for the scan response in the IOCTL
+ *    response.
+ */
+typedef struct _wlan_get_scan_table_fixed
+{
+    /** BSSID of this network */
+    t_u8 bssid[MLAN_MAC_ADDR_LENGTH];
+    /** Channel this beacon/probe response was detected */
+    t_u8 channel;
+    /** RSSI for the received packet */
+    t_u8 rssi;
+    /** TSF value from the firmware at packet reception */
+    t_u64 network_tsf;
+} wlan_get_scan_table_fixed;
+
+/**
+ *  Sructure to retrieve the scan table
+ */
+typedef struct
+{
+    /**
+     *  - Zero based scan entry to start retrieval in command request
+     *  - Number of scans entries returned in command response
+     */
+    t_u32 scan_number;
+    /**
+     * Buffer marker for multiple wlan_ioctl_get_scan_table_entry structures.
+     *   Each struct is padded to the nearest 32 bit boundary.
+     */
+    t_u8 scan_table_entry_buf[1];
+} wlan_ioctl_get_scan_table_info;
+
+/**
+ *  Structure passed in the wlan_ioctl_get_scan_table_info for each
+ *    BSS returned in the WLAN_GET_SCAN_RESP IOCTL
+ */
+typedef struct _wlan_ioctl_get_scan_table_entry
+{
+    /**
+     *  Fixed field length included in the response.
+     *
+     *  Length value is included so future fixed fields can be added to the
+     *   response without breaking backwards compatibility.  Use the length
+     *   to find the offset for the bssInfoLength field, not a sizeof() calc.
+     */
+    t_u32 fixed_field_length;
+
+    /**
+     *  Length of the BSS Information (probe resp or beacon) that
+     *    follows after the fixed_field_length
+     */
+    t_u32 bss_info_length;
+
+    /**
+     *  Always present, fixed length data fields for the BSS
+     */
+    wlan_get_scan_table_fixed fixed_fields;
+
+    /* 
+     *  Probe response or beacon scanned for the BSS.
+     *
+     *  Field layout:
+     *   - TSF              8 octets
+     *   - Beacon Interval  2 octets
+     *   - Capability Info  2 octets
+     *
+     *   - IEEE Infomation Elements; variable number & length per 802.11 spec
+     */
+    /* t_u8 bss_info_buffer[0]; */
+} wlan_ioctl_get_scan_table_entry;
+
+/** Type definition of mlan_scan_time_params */
+typedef struct _mlan_scan_time_params
+{
+    /** Scan channel time for specific scan */
+    t_u32 specific_scan_time;
+    /** Scan channel time for active scan */
+    t_u32 active_scan_time;
+    /** Scan channel time for passive scan */
+    t_u32 passive_scan_time;
+} mlan_scan_time_params, *pmlan_scan_time_params;
+
+/** Type definition of mlan_user_scan */
+typedef struct _mlan_user_scan
+{
+    /** Length of scan_cfg_buf */
+    t_u32 scan_cfg_len;
+    /** Buffer of scan config */
+    t_u8 scan_cfg_buf[1];
+} mlan_user_scan, *pmlan_user_scan;
+
+/** Type definition of mlan_scan_req */
+typedef struct _mlan_scan_req
+{
+    /** BSS mode for scanning */
+    t_u32 scan_mode;
+    /** Scan type */
+    t_u32 scan_type;
+    /** SSID */
+    mlan_802_11_ssid scan_ssid;
+    /** Scan time parameters */
+    mlan_scan_time_params scan_time;
+    /** Scan config parameters in user scan */
+    mlan_user_scan user_scan;
+} mlan_scan_req, *pmlan_scan_req;
+
+/** Type defnition of mlan_scan_resp */
+typedef struct _mlan_scan_resp
+{
+    /** Number of scan result */
+    t_u32 num_in_scan_table;
+    /** Scan table */
+    t_u8 *pscan_table;
+    /* Age */
+    t_u32 age_in_secs;
+} mlan_scan_resp, *pmlan_scan_resp;
+
+/** Type definition of mlan_scan_cfg */
+typedef struct _mlan_scan_cfg
+{
+    /** Scan type */
+    t_u32 scan_type;
+    /** BSS mode for scanning */
+    t_u32 scan_mode;
+    /** Scan probe */
+    t_u32 scan_probe;
+    /** Scan time parameters */
+    mlan_scan_time_params scan_time;
+} mlan_scan_cfg, *pmlan_scan_cfg;
+
+/** Type defnition of mlan_ds_scan for MLAN_IOCTL_SCAN */
+typedef struct _mlan_ds_scan
+{
+    /** Sub-command */
+    t_u32 sub_command;
+    /** Scan request/response */
+    union
+    {
+        /** Scan request */
+        mlan_scan_req scan_req;
+        /** Scan response */
+        mlan_scan_resp scan_resp;
+        /** Scan config parameters in user scan */
+        mlan_user_scan user_scan;
+        /** Scan config parameters */
+        mlan_scan_cfg scan_cfg;
+    } param;
+} mlan_ds_scan, *pmlan_ds_scan;
+
+/*-----------------------------------------------------------------*/
+/** BSS Configuration Group */
+/*-----------------------------------------------------------------*/
+/** Enumeration for BSS mode */
+enum _mlan_bss_mode
+{
+    MLAN_BSS_MODE_INFRA = 1,
+    MLAN_BSS_MODE_IBSS,
+    MLAN_BSS_MODE_AUTO
+};
+
+/** max Wmm AC queues */
+#define MAX_AC_QUEUES                   4
+
+/** Maximum atim window */
+#define MLAN_MAX_ATIM_WINDOW		50
+
+/** Minimum beacon interval */
+#define MLAN_MIN_BEACON_INTERVAL        20
+/** Maximum beacon interval */
+#define MLAN_MAX_BEACON_INTERVAL        1000
+/** Default beacon interval */
+#define MLAN_BEACON_INTERVAL            100
+
+/** Receive all packets */
+#define MLAN_PROMISC_MODE     	1
+/** Receive multicast packets in multicast list */
+#define MLAN_MULTICAST_MODE		2
+/** Receive all multicast packets */
+#define	MLAN_ALL_MULTI_MODE		4
+
+/** Maximum size of multicast list */
+#define MLAN_MAX_MULTICAST_LIST_SIZE	32
+
+/** mlan_multicast_list data structure for MLAN_OID_BSS_MULTICAST_LIST */
+typedef struct _mlan_multicast_list
+{
+    /** Multicast mode */
+    t_u32 mode;
+    /** Number of multicast addresses in the list */
+    t_u32 num_multicast_addr;
+    /** Multicast address list */
+    mlan_802_11_mac_addr mac_list[MLAN_MAX_MULTICAST_LIST_SIZE];
+} mlan_multicast_list, *pmlan_multicast_list;
+
+/** Max channel */
+#define MLAN_MAX_CHANNEL    165
+
+/** Maximum number of channels in table */
+#define MLAN_MAX_CHANNEL_NUM	128
+
+/** Channel/frequence for MLAN_OID_BSS_CHANNEL */
+typedef struct _chan_freq
+{
+    /** Channel Number */
+    t_u32 channel;
+    /** Frequency of this Channel */
+    t_u32 freq;
+} chan_freq;
+
+/** mlan_chan_list data structure for MLAN_OID_BSS_CHANNEL_LIST */
+typedef struct _mlan_chan_list
+{
+    /** Number of channel */
+    t_u32 num_of_chan;
+    /** Channel-Frequency table */
+    chan_freq cf[MLAN_MAX_CHANNEL_NUM];
+} mlan_chan_list;
+
+/** mlan_ssid_bssid  data structure for MLAN_OID_BSS_START and MLAN_OID_BSS_FIND_BSS */
+typedef struct _mlan_ssid_bssid
+{
+    /** SSID */
+    mlan_802_11_ssid ssid;
+    /** BSSID */
+    mlan_802_11_mac_addr bssid;
+    /** index in BSSID list, start from 1 */
+    t_u32 idx;
+} mlan_ssid_bssid;
+
+#ifdef UAP_SUPPORT
+/** Maximum BEACON period */
+#define MAX_BEACON_PERIOD 4000
+/** Minimum BEACON period */
+#define MIN_BEACON_PERIOD 50
+/** Maximum DTIM period */
+#define MAX_DTIM_PERIOD 100
+/** Minimum DTIM period */
+#define MIN_DTIM_PERIOD 1
+/** Maximum TX Power Limit */
+#define MAX_TX_POWER    20
+/** Minimum TX Power Limit */
+#define MIN_TX_POWER    0
+/** MAX station count */
+#define MAX_STA_COUNT   10
+/** Maximum RTS threshold */
+#define MAX_RTS_THRESHOLD   2347
+/** Maximum fragmentation threshold */
+#define MAX_FRAG_THRESHOLD 2346
+/** Minimum fragmentation threshold */
+#define MIN_FRAG_THRESHOLD 256
+/** data rate 54 M */
+#define DATA_RATE_54M   108
+/** antenna A */
+#define ANTENNA_MODE_A      0
+/** antenna B */
+#define ANTENNA_MODE_B      1
+/** transmit antenna */
+#define TX_ANTENNA          1
+/** receive antenna */
+#define RX_ANTENNA          0
+/** Maximum stage out time */
+#define MAX_STAGE_OUT_TIME  864000
+/** Minimum stage out time */
+#define MIN_STAGE_OUT_TIME  300
+/** Maximum Retry Limit */
+#define MAX_RETRY_LIMIT         14
+
+/** Maximum group key timer */
+#define MAX_GRP_TIMER           86400
+
+/** Maximum value of 4 byte configuration */
+#define MAX_VALID_DWORD         0x7FFFFFFF      /* (1 << 31) - 1 */
+
+/** Band config ACS mode */
+#define BAND_CONFIG_ACS_MODE    0x40
+/** Band config manual */
+#define BAND_CONFIG_MANUAL      0x00
+
+/** Maximum data rates */
+#define MAX_DATA_RATES          14
+
+/** auto data rate */
+#define DATA_RATE_AUTO       0
+
+/**filter mode: disable */
+#define MAC_FILTER_MODE_DISABLE         0
+/**filter mode: block mac address */
+#define MAC_FILTER_MODE_ALLOW_MAC       1
+/**filter mode: block mac address */
+#define MAC_FILTER_MODE_BLOCK_MAC       2
+/** Maximum mac filter num */
+#define MAX_MAC_FILTER_NUM           16
+
+/* Bitmap for protocol to use */
+/** No security */
+#define PROTOCOL_NO_SECURITY        0x01
+/** Static WEP */
+#define PROTOCOL_STATIC_WEP         0x02
+/** WPA */
+#define PROTOCOL_WPA                0x08
+/** WPA2 */
+#define PROTOCOL_WPA2               0x20
+/** WP2 Mixed */
+#define PROTOCOL_WPA2_MIXED         0x28
+/** EAP */
+#define PROTOCOL_EAP                0x40
+/** WAPI */
+#define PROTOCOL_WAPI               0x80
+
+/** Key_mgmt_psk */
+#define KEY_MGMT_NONE   0x04
+/** Key_mgmt_none */
+#define KEY_MGMT_PSK    0x02
+/** Key_mgmt_eap  */
+#define KEY_MGMT_EAP    0x01
+
+/** TKIP */
+#define CIPHER_TKIP                 0x04
+/** AES CCMP */
+#define CIPHER_AES_CCMP             0x08
+
+/** Valid cipher bitmap */
+#define VALID_CIPHER_BITMAP         0x0c
+
+/** Channel List Entry */
+typedef struct _channel_list
+{
+    /** Channel Number */
+    t_u8 chan_number;
+    /** Band Config */
+    t_u8 band_config_type;
+} scan_chan_list;
+
+/** mac_filter data structure */
+typedef struct _mac_filter
+{
+    /** mac filter mode */
+    t_u16 filter_mode;
+    /** mac adress count */
+    t_u16 mac_count;
+    /** mac address list */
+    mlan_802_11_mac_addr mac_list[MAX_MAC_FILTER_NUM];
+} mac_filter;
+
+/** wpa parameter */
+typedef struct _wpa_param
+{
+    /** Pairwise cipher WPA */
+    t_u8 pairwise_cipher_wpa;
+    /** Pairwise cipher WPA2 */
+    t_u8 pairwise_cipher_wpa2;
+    /** group cipher */
+    t_u8 group_cipher;
+    /** RSN replay protection */
+    t_u8 rsn_protection;
+    /** passphrase length */
+    t_u32 length;
+    /** passphrase */
+    t_u8 passphrase[64];
+    /**group key rekey time */
+    t_u32 gk_rekey_time;
+} wpa_param;
+
+/** wep key */
+typedef struct _wep_key
+{
+    /** key index 0-3 */
+    t_u8 key_index;
+    /** is default */
+    t_u8 is_default;
+    /** length */
+    t_u16 length;
+    /** key data */
+    t_u8 key[26];
+} wep_key;
+
+/** wep param */
+typedef struct _wep_param
+{
+    /** key 0 */
+    wep_key key0;
+    /** key 1 */
+    wep_key key1;
+    /** key 2 */
+    wep_key key2;
+    /** key 3 */
+    wep_key key3;
+} wep_param;
+
+/** Data structure of WMM QoS information */
+typedef struct _wmm_qos_info_t
+{
+#ifdef BIG_ENDIAN_SUPPORT
+    /** QoS UAPSD */
+    t_u8 qos_uapsd:1;
+    /** Reserved */
+    t_u8 reserved:3;
+    /** Parameter set count */
+    t_u8 para_set_count:4;
+#else
+    /** Parameter set count */
+    t_u8 para_set_count:4;
+    /** Reserved */
+    t_u8 reserved:3;
+    /** QoS UAPSD */
+    t_u8 qos_uapsd:1;
+#endif                          /* BIG_ENDIAN_SUPPORT */
+} wmm_qos_info_t, *pwmm_qos_info_t;
+
+/** Data structure of WMM ECW */
+typedef struct _wmm_ecw_t
+{
+#ifdef BIG_ENDIAN_SUPPORT
+    /** Maximum Ecw */
+    t_u8 ecw_max:4;
+    /** Minimum Ecw */
+    t_u8 ecw_min:4;
+#else
+    /** Minimum Ecw */
+    t_u8 ecw_min:4;
+    /** Maximum Ecw */
+    t_u8 ecw_max:4;
+#endif                          /* BIG_ENDIAN_SUPPORT */
+} wmm_ecw_t, *pwmm_ecw_t;
+
+/** Data structure of WMM Aci/Aifsn */
+typedef struct _wmm_aci_aifsn_t
+{
+#ifdef BIG_ENDIAN_SUPPORT
+    /** Reserved */
+    t_u8 reserved:1;
+    /** Aci */
+    t_u8 aci:2;
+    /** Acm */
+    t_u8 acm:1;
+    /** Aifsn */
+    t_u8 aifsn:4;
+#else
+    /** Aifsn */
+    t_u8 aifsn:4;
+    /** Acm */
+    t_u8 acm:1;
+    /** Aci */
+    t_u8 aci:2;
+    /** Reserved */
+    t_u8 reserved:1;
+#endif                          /* BIG_ENDIAN_SUPPORT */
+} wmm_aci_aifsn_t, *pwmm_aci_aifsn_t;
+
+/** Data structure of WMM AC parameters  */
+typedef struct _wmm_ac_parameters_t
+{
+    wmm_aci_aifsn_t aci_aifsn;       /**< AciAifSn */
+    wmm_ecw_t ecw;                 /**< Ecw */
+    t_u16 tx_op_limit;                        /**< Tx op limit */
+} wmm_ac_parameters_t, *pwmm_ac_parameters_t;
+
+/** Data structure of WMM parameter IE  */
+typedef struct _wmm_parameter_t
+{
+    /** OuiType:  00:50:f2:02 */
+    t_u8 ouitype[4];
+    /** Oui subtype: 01 */
+    t_u8 ouisubtype;
+    /** version: 01 */
+    t_u8 version;
+    /** QoS information */
+    t_u8 qos_info;
+    /** Reserved */
+    t_u8 reserved;
+    /** AC Parameters Record WMM_AC_BE, WMM_AC_BK, WMM_AC_VI, WMM_AC_VO */
+    wmm_ac_parameters_t ac_params[MAX_AC_QUEUES];
+} wmm_parameter_t, *pwmm_parameter_t;
+
+/** mlan_bss_param
+ * Note: For each entry you must enter an invalid value
+ * in the MOAL function woal_set_sys_config_invalid_data().
+ * Otherwise for a valid data an unwanted TLV will be
+ * added to that command.
+ */
+typedef struct _mlan_uap_bss_param
+{
+    /** AP mac addr */
+    mlan_802_11_mac_addr mac_addr;
+    /** SSID */
+    mlan_802_11_ssid ssid;
+    /** Broadcast ssid control */
+    t_u8 bcast_ssid_ctl;
+    /** Radio control: on/off */
+    t_u8 radio_ctl;
+    /** dtim period */
+    t_u8 dtim_period;
+    /** beacon period */
+    t_u16 beacon_period;
+    /** rates */
+    t_u8 rates[MAX_DATA_RATES];
+    /** Tx data rate */
+    t_u16 tx_data_rate;
+    /** multicast/broadcast data rate */
+    t_u16 mcbc_data_rate;
+    /** Tx power level */
+    t_u8 tx_power_level;
+    /** Tx antenna */
+    t_u8 tx_antenna;
+    /** Rx anteena */
+    t_u8 rx_antenna;
+    /** packet forward control */
+    t_u8 pkt_forward_ctl;
+    /** max station count */
+    t_u16 max_sta_count;
+    /** mac filter */
+    mac_filter filter;
+    /** station ageout timer in the unit of 100ms  */
+    t_u32 sta_ageout_timer;
+    /** PS station ageout timer in the unit of 100ms  */
+    t_u32 ps_sta_ageout_timer;
+    /** RTS threshold */
+    t_u16 rts_threshold;
+    /** fragmentation threshold */
+    t_u16 frag_threshold;
+    /**  retry_limit */
+    t_u16 retry_limit;
+    /**  pairwise update timeout */
+    t_u32 pairwise_update_timeout;
+    /** pairwise handshake retries */
+    t_u32 pwk_retries;
+    /**  groupwise update timeout */
+    t_u32 groupwise_update_timeout;
+    /** groupwise handshake retries */
+    t_u32 gwk_retries;
+    /** preamble type */
+    t_u8 preamble_type;
+    /** band cfg */
+    t_u8 band_cfg;
+    /** channel */
+    t_u8 channel;
+    /** auth mode */
+    t_u16 auth_mode;
+    /** encryption protocol */
+    t_u16 protocol;
+    /** key managment type */
+    t_u16 key_mgmt;
+    /** wep param */
+    wep_param wep_cfg;
+    /** wpa param */
+    wpa_param wpa_cfg;
+#ifdef UAP_SUPPORT
+    /** Mgmt IE passthru mask */
+    t_u32 mgmt_ie_passthru_mask;
+#endif
+    /* 
+     * 11n HT Cap  HTCap_t  ht_cap
+     */
+    /** HT Capabilities Info field */
+    t_u16 ht_cap_info;
+    /** A-MPDU Parameters field */
+    t_u8 ampdu_param;
+    /** Supported MCS Set field */
+    t_u8 supported_mcs_set[16];
+    /** HT Extended Capabilities field */
+    t_u16 ht_ext_cap;
+    /** Transmit Beamforming Capabilities field */
+    t_u32 tx_bf_cap;
+    /** Antenna Selection Capability field */
+    t_u8 asel;
+    /** Enable 2040 Coex */
+    t_u8 enable_2040coex;
+    /** key management operation */
+    t_u16 key_mgmt_operation;
+    /** BSS status */
+    t_u16 bss_status;
+    /** Number of channels in scan_channel_list */
+    t_u32 num_of_chan;
+    /** scan channel list in ACS mode */
+    scan_chan_list chan_list[MLAN_MAX_CHANNEL];
+    /** Wmm parameters */
+    wmm_parameter_t wmm_para;
+} mlan_uap_bss_param;
+
+/** mlan_deauth_param */
+typedef struct _mlan_deauth_param
+{
+    /** STA mac addr */
+    t_u8 mac_addr[MLAN_MAC_ADDR_LENGTH];
+    /** deauth reason */
+    t_u16 reason_code;
+} mlan_deauth_param;
+#endif
+
+/** Type definition of mlan_ds_bss for MLAN_IOCTL_BSS */
+typedef struct _mlan_ds_bss
+{
+    /** Sub-command */
+    t_u32 sub_command;
+    /** BSS parameter */
+    union
+    {
+        /** SSID-BSSID for MLAN_OID_BSS_START */
+        mlan_ssid_bssid ssid_bssid;
+        /** BSSID for MLAN_OID_BSS_STOP */
+        mlan_802_11_mac_addr bssid;
+        /** BSS mode for MLAN_OID_BSS_MODE */
+        t_u32 bss_mode;
+        /** BSS channel/frequency for MLAN_OID_BSS_CHANNEL */
+        chan_freq bss_chan;
+        /** BSS channel list for MLAN_OID_BSS_CHANNEL_LIST */
+        mlan_chan_list chanlist;
+        /** MAC address for MLAN_OID_BSS_MAC_ADDR */
+        mlan_802_11_mac_addr mac_addr;
+        /** Multicast list for MLAN_OID_BSS_MULTICAST_LIST */
+        mlan_multicast_list multicast_list;
+        /** Beacon interval for MLAN_OID_IBSS_BCN_INTERVAL */
+        t_u32 bcn_interval;
+        /** ATIM window for MLAN_OID_IBSS_ATIM_WINDOW */
+        t_u32 atim_window;
+#ifdef UAP_SUPPORT
+        /** BSS param for AP mode */
+        mlan_uap_bss_param bss_config;
+        /** deauth param for MLAN_OID_UAP_DEAUTH_STA */
+        mlan_deauth_param deauth_param;
+#endif
+#if defined(STA_SUPPORT) && defined(UAP_SUPPORT)
+        /** BSS role */
+        t_u8 bss_role;
+#endif
+    } param;
+} mlan_ds_bss, *pmlan_ds_bss;
+
+/** Enumeration for band */
+enum _mlan_band_def
+{
+    BAND_B = 1,
+    BAND_G = 2,
+    BAND_A = 4,
+    BAND_GN = 8,
+    BAND_AN = 16,
+};
+
+/*-----------------------------------------------------------------*/
+/** Radio Control Group */
+/*-----------------------------------------------------------------*/
+/** NO secondary channel */
+#define NO_SEC_CHANNEL               0
+/** secondary channel is above primary channel */
+#define SEC_CHANNEL_ABOVE            1
+/** secondary channel is below primary channel */
+#define SEC_CHANNEL_BELOW            3
+
+/** Type definition of mlan_ds_band_cfg for MLAN_OID_BAND_CFG */
+typedef struct _mlan_ds_band_cfg
+{
+    /** Infra band */
+    t_u32 config_bands;
+    /** Ad-hoc start band */
+    t_u32 adhoc_start_band;
+    /** Ad-hoc start channel */
+    t_u32 adhoc_channel;
+    /** Ad-hoc secondary channel offset */
+    t_u32 sec_chan_offset;
+    /** fw supportedd band */
+    t_u32 fw_bands;
+} mlan_ds_band_cfg;
+
+/** Type definition of mlan_ds_radio_cfg for MLAN_IOCTL_RADIO_CFG */
+typedef struct _mlan_ds_radio_cfg
+{
+    /** Sub-command */
+    t_u32 sub_command;
+    /** Radio control parameter */
+    union
+    {
+        /** Radio on/off for MLAN_OID_RADIO_CTRL */
+        t_u32 radio_on_off;
+        /** Band info for MLAN_OID_BAND_CFG */
+        mlan_ds_band_cfg band_cfg;
+        /** Antenna info for MLAN_OID_ANT_CFG */
+        t_u32 antenna;
+    } param;
+} mlan_ds_radio_cfg, *pmlan_ds_radio_cfg;
+
+/*-----------------------------------------------------------------*/
+/** SNMP MIB Group */
+/*-----------------------------------------------------------------*/
+/** Type definition of mlan_ds_snmp_mib for MLAN_IOCTL_SNMP_MIB */
+typedef struct _mlan_ds_snmp_mib
+{
+    /** Sub-command */
+    t_u32 sub_command;
+    /** SNMP MIB parameter */
+    union
+    {
+        /** RTS threshold for MLAN_OID_SNMP_MIB_RTS_THRESHOLD */
+        t_u32 rts_threshold;
+        /** Fragment threshold for MLAN_OID_SNMP_MIB_FRAG_THRESHOLD */
+        t_u32 frag_threshold;
+        /** Retry count for MLAN_OID_SNMP_MIB_RETRY_COUNT */
+        t_u32 retry_count;
+    } param;
+} mlan_ds_snmp_mib, *pmlan_ds_snmp_mib;
+
+/*-----------------------------------------------------------------*/
+/** Status Information Group */
+/*-----------------------------------------------------------------*/
+/** Enumeration for ad-hoc status */
+enum _mlan_adhoc_status
+{
+    ADHOC_IDLE,
+    ADHOC_STARTED,
+    ADHOC_JOINED,
+    ADHOC_COALESCED
+};
+
+/** Type definition of mlan_ds_get_stats for MLAN_OID_GET_STATS */
+typedef struct _mlan_ds_get_stats
+{
+    /** Statistics counter */
+    /** Multicast transmitted frame count */
+    t_u32 mcast_tx_frame;
+    /** Failure count */
+    t_u32 failed;
+    /** Retry count */
+    t_u32 retry;
+    /** Multi entry count */
+    t_u32 multi_retry;
+    /** Duplicate frame count */
+    t_u32 frame_dup;
+    /** RTS success count */
+    t_u32 rts_success;
+    /** RTS failure count */
+    t_u32 rts_failure;
+    /** Ack failure count */
+    t_u32 ack_failure;
+    /** Rx fragmentation count */
+    t_u32 rx_frag;
+    /** Multicast Tx frame count */
+    t_u32 mcast_rx_frame;
+    /** FCS error count */
+    t_u32 fcs_error;
+    /** Tx frame count */
+    t_u32 tx_frame;
+    /** WEP ICV error count */
+    t_u32 wep_icv_error[4];
+} mlan_ds_get_stats, *pmlan_ds_get_stats;
+
+/** Type definition of mlan_ds_uap_stats for MLAN_OID_GET_STATS */
+typedef struct _mlan_ds_uap_stats
+{
+    /** tkip mic failures */
+    t_u32 tkip_mic_failures;
+    /** ccmp decrypt errors */
+    t_u32 ccmp_decrypt_errors;
+    /** wep undecryptable count */
+    t_u32 wep_undecryptable_count;
+    /** wep icv error count */
+    t_u32 wep_icv_error_count;
+    /** decrypt failure count */
+    t_u32 decrypt_failure_count;
+    /** dot11 multicast tx count */
+    t_u32 mcast_tx_count;
+    /** dot11 failed count */
+    t_u32 failed_count;
+    /** dot11 retry count */
+    t_u32 retry_count;
+    /** dot11 multi retry count */
+    t_u32 multi_retry_count;
+    /** dot11 frame duplicate count */
+    t_u32 frame_dup_count;
+    /** dot11 rts success count */
+    t_u32 rts_success_count;
+    /** dot11 rts failure count */
+    t_u32 rts_failure_count;
+    /** dot11 ack failure count */
+    t_u32 ack_failure_count;
+    /** dot11 rx ragment count */
+    t_u32 rx_fragment_count;
+    /** dot11 mcast rx frame count */
+    t_u32 mcast_rx_frame_count;
+    /** dot11 fcs error count */
+    t_u32 fcs_error_count;
+    /** dot11 tx frame count */
+    t_u32 tx_frame_count;
+    /** dot11 rsna tkip cm invoked */
+    t_u32 rsna_tkip_cm_invoked;
+    /** dot11 rsna 4way handshake failures */
+    t_u32 rsna_4way_hshk_failures;
+} mlan_ds_uap_stats, *pmlan_ds_uap_stats;
+
+/** Mask of last beacon RSSI */
+#define BCN_RSSI_LAST_MASK              0x00000001
+/** Mask of average beacon RSSI */
+#define BCN_RSSI_AVG_MASK               0x00000002
+/** Mask of last data RSSI */
+#define DATA_RSSI_LAST_MASK             0x00000004
+/** Mask of average data RSSI */
+#define DATA_RSSI_AVG_MASK              0x00000008
+/** Mask of last beacon SNR */
+#define BCN_SNR_LAST_MASK               0x00000010
+/** Mask of average beacon SNR */
+#define BCN_SNR_AVG_MASK                0x00000020
+/** Mask of last data SNR */
+#define DATA_SNR_LAST_MASK              0x00000040
+/** Mask of average data SNR */
+#define DATA_SNR_AVG_MASK               0x00000080
+/** Mask of last beacon NF */
+#define BCN_NF_LAST_MASK                0x00000100
+/** Mask of average beacon NF */
+#define BCN_NF_AVG_MASK                 0x00000200
+/** Mask of last data NF */
+#define DATA_NF_LAST_MASK               0x00000400
+/** Mask of average data NF */
+#define DATA_NF_AVG_MASK                0x00000800
+/** Mask of all RSSI_INFO */
+#define ALL_RSSI_INFO_MASK              0x00000fff
+
+/** Type definition of mlan_ds_get_signal for MLAN_OID_GET_SIGNAL */
+typedef struct _mlan_ds_get_signal
+{
+    /** Selector of get operation */
+    /* 
+     * Bit0:  Last Beacon RSSI,  Bit1:  Average Beacon RSSI,
+     * Bit2:  Last Data RSSI,    Bit3:  Average Data RSSI,
+     * Bit4:  Last Beacon SNR,   Bit5:  Average Beacon SNR,
+     * Bit6:  Last Data SNR,     Bit7:  Average Data SNR,
+     * Bit8:  Last Beacon NF,    Bit9:  Average Beacon NF,
+     * Bit10: Last Data NF,      Bit11: Average Data NF
+     */
+    t_u16 selector;
+
+    /** RSSI */
+    /** RSSI of last beacon */
+    t_s16 bcn_rssi_last;
+    /** RSSI of beacon average */
+    t_s16 bcn_rssi_avg;
+    /** RSSI of last data packet */
+    t_s16 data_rssi_last;
+    /** RSSI of data packet average */
+    t_s16 data_rssi_avg;
+
+    /** SNR */
+    /** SNR of last beacon */
+    t_s16 bcn_snr_last;
+    /** SNR of beacon average */
+    t_s16 bcn_snr_avg;
+    /** SNR of last data packet */
+    t_s16 data_snr_last;
+    /** SNR of data packet average */
+    t_s16 data_snr_avg;
+
+    /** NF */
+    /** NF of last beacon */
+    t_s16 bcn_nf_last;
+    /** NF of beacon average */
+    t_s16 bcn_nf_avg;
+    /** NF of last data packet */
+    t_s16 data_nf_last;
+    /** NF of data packet average */
+    t_s16 data_nf_avg;
+} mlan_ds_get_signal, *pmlan_ds_get_signal;
+
+/** mlan_fw_info data structure for MLAN_OID_GET_FW_INFO */
+typedef struct _mlan_fw_info
+{
+    /** Firmware version */
+    t_u32 fw_ver;
+    /** MAC address */
+    mlan_802_11_mac_addr mac_addr;
+    /** Device support for MIMO abstraction of MCSs */
+    t_u8 hw_dev_mcs_support;
+} mlan_fw_info, *pmlan_fw_info;
+
+/** Version string buffer length */
+#define MLAN_MAX_VER_STR_LEN    128
+
+/** mlan_ver_ext data structure for MLAN_OID_GET_VER_EXT */
+typedef struct _mlan_ver_ext
+{
+    /** Selected version string */
+    t_u32 version_str_sel;
+    /** Version string */
+    char version_str[MLAN_MAX_VER_STR_LEN];
+} mlan_ver_ext, *pmlan_ver_ext;
+
+/** mlan_bss_info data structure for MLAN_OID_GET_BSS_INFO */
+typedef struct _mlan_bss_info
+{
+    /** BSS mode */
+    t_u32 bss_mode;
+    /** SSID */
+    mlan_802_11_ssid ssid;
+    /** Table index */
+    t_u32 scan_table_idx;
+    /** Channel */
+    t_u32 bss_chan;
+    /** Band */
+    t_u8 bss_band;
+    /** Region code */
+    t_u32 region_code;
+    /** Connection status */
+    t_u32 media_connected;
+    /** Radio on */
+    t_u32 radio_on;
+    /** Max power level */
+    t_u32 max_power_level;
+    /** Min power level */
+    t_u32 min_power_level;
+    /** Adhoc state */
+    t_u32 adhoc_state;
+    /** NF of last beacon */
+    t_s32 bcn_nf_last;
+    /** wep status */
+    t_u32 wep_status;
+     /** Host Sleep configured flag */
+    t_u32 is_hs_configured;
+    /** BSSID */
+    mlan_802_11_mac_addr bssid;
+#ifdef STA_SUPPORT
+    /** Capability Info */
+    t_u16 capability_info;
+    /** Listen Interval */
+    t_u16 listen_interval;
+    /** Association Id  */
+    t_u16 assoc_id;
+    /** AP/Peer supported rates */
+    t_u8 peer_supp_rates[MLAN_SUPPORTED_RATES];
+#endif                          /* STA_SUPPORT */
+} mlan_bss_info, *pmlan_bss_info;
+
+/** MAXIMUM number of TID */
+#define MAX_NUM_TID     8
+
+/** Max RX Win size */
+#define MAX_RX_WINSIZE 		64
+
+/** rx_reorder_tbl */
+typedef struct
+{
+    /** TID */
+    t_u16 tid;
+    /** TA */
+    t_u8 ta[MLAN_MAC_ADDR_LENGTH];
+    /** Start window */
+    t_u32 start_win;
+    /** Window size */
+    t_u32 win_size;
+    /** amsdu flag */
+    t_u8 amsdu;
+    /** buffer status */
+    t_u32 buffer[MAX_RX_WINSIZE];
+} rx_reorder_tbl;
+
+/** tx_ba_stream_tbl */
+typedef struct
+{
+    /** TID */
+    t_u16 tid;
+    /** RA */
+    t_u8 ra[MLAN_MAC_ADDR_LENGTH];
+    /** amsdu flag */
+    t_u8 amsdu;
+} tx_ba_stream_tbl;
+
+/** Debug command number */
+#define DBG_CMD_NUM	5
+
+/** mlan_debug_info data structure for MLAN_OID_GET_DEBUG_INFO */
+typedef struct _mlan_debug_info
+{
+    /* WMM AC_BK count */
+    t_u32 wmm_ac_bk;
+    /* WMM AC_BE count */
+    t_u32 wmm_ac_be;
+    /* WMM AC_VI count */
+    t_u32 wmm_ac_vi;
+    /* WMM AC_VO count */
+    t_u32 wmm_ac_vo;
+    /** Corresponds to max_tx_buf_size member of mlan_adapter*/
+    t_u32 max_tx_buf_size;
+     /** Corresponds to tx_buf_size member of mlan_adapter*/
+    t_u32 tx_buf_size;
+    /** Corresponds to curr_tx_buf_size member of mlan_adapter*/
+    t_u32 curr_tx_buf_size;
+    /** Tx table num */
+    t_u32 tx_tbl_num;
+    /** Tx ba stream table */
+    tx_ba_stream_tbl tx_tbl[MLAN_MAX_TX_BASTREAM_SUPPORTED];
+    /** Rx table num */
+    t_u32 rx_tbl_num;
+    /** Rx reorder table*/
+    rx_reorder_tbl rx_tbl[MLAN_MAX_RX_BASTREAM_SUPPORTED];
+    /** Corresponds to ps_mode member of mlan_adapter */
+    t_u16 ps_mode;
+    /** Corresponds to ps_state member of mlan_adapter */
+    t_u32 ps_state;
+    /** Corresponds to pm_wakeup_card_req member of mlan_adapter */
+    t_u8 pm_wakeup_card_req;
+    /** Corresponds to pm_wakeup_fw_try member of mlan_adapter */
+    t_u32 pm_wakeup_fw_try;
+    /** Corresponds to is_hs_configured member of mlan_adapter */
+    t_u8 is_hs_configured;
+    /** Corresponds to hs_activated member of mlan_adapter */
+    t_u8 hs_activated;
+    /** Corresponds to pps_uapsd_mode member of mlan_adapter */
+    t_u16 pps_uapsd_mode;
+    /** Corresponds to sleep_period.period member of mlan_adapter */
+    t_u16 sleep_pd;
+    /** Corresponds to wmm_qosinfo member of mlan_private */
+    t_u8 qos_cfg;
+    /** Corresponds to tx_lock_flag member of mlan_adapter */
+    t_u8 tx_lock_flag;
+    /** Corresponds to port_open member of mlan_private */
+    t_u8 port_open;
+    /** Corresponds to scan_processing member of mlan_adapter */
+    t_u32 scan_processing;
+    /** Number of host to card command failures */
+    t_u32 num_cmd_host_to_card_failure;
+    /** Number of host to card sleep confirm failures */
+    t_u32 num_cmd_sleep_cfm_host_to_card_failure;
+    /** Number of host to card Tx failures */
+    t_u32 num_tx_host_to_card_failure;
+    /** Number of card to host failures */
+    t_u32 num_card_to_host_failure;
+    /** Number of deauthentication events */
+    t_u32 num_event_deauth;
+    /** Number of disassosiation events */
+    t_u32 num_event_disassoc;
+    /** Number of link lost events */
+    t_u32 num_event_link_lost;
+    /** Number of deauthentication commands */
+    t_u32 num_cmd_deauth;
+    /** Number of association comamnd successes */
+    t_u32 num_cmd_assoc_success;
+    /** Number of association command failures */
+    t_u32 num_cmd_assoc_failure;
+    /** Number of Tx timeouts */
+    t_u32 num_tx_timeout;
+    /** Number of command timeouts */
+    t_u32 num_cmd_timeout;
+    /** Timeout command ID */
+    t_u16 timeout_cmd_id;
+    /** Timeout command action */
+    t_u16 timeout_cmd_act;
+    /** List of last command IDs */
+    t_u16 last_cmd_id[DBG_CMD_NUM];
+    /** List of last command actions */
+    t_u16 last_cmd_act[DBG_CMD_NUM];
+    /** Last command index */
+    t_u16 last_cmd_index;
+    /** List of last command response IDs */
+    t_u16 last_cmd_resp_id[DBG_CMD_NUM];
+    /** Last command response index */
+    t_u16 last_cmd_resp_index;
+    /** List of last events */
+    t_u16 last_event[DBG_CMD_NUM];
+    /** Last event index */
+    t_u16 last_event_index;
+
+    /** Corresponds to data_sent member of mlan_adapter */
+    t_u8 data_sent;
+    /** Corresponds to cmd_sent member of mlan_adapter */
+    t_u8 cmd_sent;
+    /** Corresponds to cmdresp_received member of mlan_adapter */
+    t_u8 cmd_resp_received;
+    /** Corresponds to event_received member of mlan_adapter */
+    t_u8 event_received;
+    /**  pendig tx pkts */
+    t_u32 tx_pkts_queued;
+#ifdef UAP_SUPPORT
+    /**  pending bridge pkts */
+    t_u16 num_bridge_pkts;
+    /**  dropped pkts */
+    t_u32 num_drop_pkts;
+#endif
+} mlan_debug_info, *pmlan_debug_info;
+
+#ifdef UAP_SUPPORT
+/** Maximum number of clients supported by AP */
+#define MAX_NUM_CLIENTS         16
+
+/** station info */
+typedef struct _sta_info
+{
+    /** STA MAC address */
+    t_u8 mac_address[MLAN_MAC_ADDR_LENGTH];
+    /** Power mfg status */
+    t_u8 power_mfg_status;
+    /** RSSI */
+    t_s8 rssi;
+} sta_info;
+
+/** mlan_ds_sta_list structure for MLAN_OID_UAP_STA_LIST */
+typedef struct _mlan_ds_sta_list
+{
+    /** station count */
+    t_u16 sta_count;
+    /** station list */
+    sta_info info[MAX_NUM_CLIENTS];
+} mlan_ds_sta_list, *pmlan_ds_sta_list;
+#endif
+
+/** Type definition of mlan_ds_get_info for MLAN_IOCTL_GET_INFO */
+typedef struct _mlan_ds_get_info
+{
+    /** Sub-command */
+    t_u32 sub_command;
+
+    /** Status information parameter */
+    union
+    {
+        /** Signal information for MLAN_OID_GET_SIGNAL */
+        mlan_ds_get_signal signal;
+        /** Statistics information for MLAN_OID_GET_STATS */
+        mlan_ds_get_stats stats;
+        /** Firmware information for MLAN_OID_GET_FW_INFO */
+        mlan_fw_info fw_info;
+        /** Extended version information for MLAN_OID_GET_VER_EXT */
+        mlan_ver_ext ver_ext;
+        /** BSS information for MLAN_OID_GET_BSS_INFO */
+        mlan_bss_info bss_info;
+        /** Debug information for MLAN_OID_GET_DEBUG_INFO */
+        mlan_debug_info debug_info;
+#ifdef UAP_SUPPORT
+        /** UAP Statistics information for MLAN_OID_GET_STATS */
+        mlan_ds_uap_stats ustats;
+        /** UAP station list for MLAN_OID_UAP_STA_LIST */
+        mlan_ds_sta_list sta_list;
+#endif
+    } param;
+} mlan_ds_get_info, *pmlan_ds_get_info;
+
+/*-----------------------------------------------------------------*/
+/** Security Configuration Group */
+/*-----------------------------------------------------------------*/
+/** Enumeration for authentication mode */
+enum _mlan_auth_mode
+{
+    MLAN_AUTH_MODE_OPEN = 0x00,
+    MLAN_AUTH_MODE_SHARED = 0x01,
+    MLAN_AUTH_MODE_NETWORKEAP = 0x80,
+    MLAN_AUTH_MODE_AUTO = 0xFF,
+};
+
+/** Enumeration for encryption mode */
+enum _mlan_encryption_mode
+{
+    MLAN_ENCRYPTION_MODE_NONE = 0,
+    MLAN_ENCRYPTION_MODE_WEP40 = 1,
+    MLAN_ENCRYPTION_MODE_TKIP = 2,
+    MLAN_ENCRYPTION_MODE_CCMP = 3,
+    MLAN_ENCRYPTION_MODE_WEP104 = 4,
+};
+
+/** Enumeration for PSK */
+enum _mlan_psk_type
+{
+    MLAN_PSK_PASSPHRASE = 1,
+    MLAN_PSK_PMK,
+    MLAN_PSK_CLEAR,
+    MLAN_PSK_QUERY,
+};
+
+/** The bit to indicate the key is for unicast */
+#define MLAN_KEY_INDEX_UNICAST        0x40000000
+/** The key index to indicate default key */
+#define MLAN_KEY_INDEX_DEFAULT        0x000000ff
+/** Maximum key length */
+#define MLAN_MAX_KEY_LENGTH           32
+/** Minimum passphrase length */
+#define MLAN_MIN_PASSPHRASE_LENGTH    8
+/** Maximum passphrase length */
+#define MLAN_MAX_PASSPHRASE_LENGTH    63
+/** PMK length */
+#define MLAN_PMK_HEXSTR_LENGTH        64
+/* A few details needed for WEP (Wireless Equivalent Privacy) */
+/** 104 bits */
+#define MAX_WEP_KEY_SIZE	13
+/** 40 bits RC4 - WEP */
+#define MIN_WEP_KEY_SIZE	5
+/** packet number size */
+#define PN_SIZE			16
+/** max seq size of wpa/wpa2 key */
+#define SEQ_MAX_SIZE        8
+
+/** key flag for tx_seq */
+#define KEY_FLAG_TX_SEQ_VALID	0x00000001
+/** key flag for rx_seq */
+#define KEY_FLAG_RX_SEQ_VALID	0x00000002
+/** key flag for group key */
+#define KEY_FLAG_GROUP_KEY	0x00000004
+/** key flag for tx and rx */
+#define KEY_FLAG_SET_TX_KEY	    0x00000008
+/** key flag for remove key */
+#define KEY_FLAG_REMOVE_KEY	    0x80000000
+
+/** Type definition of mlan_ds_encrypt_key for MLAN_OID_SEC_CFG_ENCRYPT_KEY */
+typedef struct _mlan_ds_encrypt_key
+{
+    /** Key disabled, all other fields will be ignore when this flag set to MTRUE */
+    t_u32 key_disable;
+    /** key removed flag, when this flag is set to MTRUE, only key_index will be check */
+    t_u32 key_remove;
+    /** Key index, used as current tx key index when is_current_wep_key is set to MTRUE */
+    t_u32 key_index;
+    /** Current Tx key flag */
+    t_u32 is_current_wep_key;
+    /** Key length */
+    t_u32 key_len;
+    /** Key */
+    t_u8 key_material[MLAN_MAX_KEY_LENGTH];
+    /** mac address */
+    t_u8 mac_addr[MLAN_MAC_ADDR_LENGTH];
+    /** wapi key flag */
+    t_u32 is_wapi_key;
+    /** Initial packet number */
+    t_u8 pn[PN_SIZE];
+    /** key flags */
+    t_u32 key_flags;
+} mlan_ds_encrypt_key, *pmlan_ds_encrypt_key;
+
+/** Type definition of mlan_passphrase_t */
+typedef struct _mlan_passphrase_t
+{
+    /** Length of passphrase */
+    t_u32 passphrase_len;
+    /** Passphrase */
+    t_u8 passphrase[MLAN_MAX_PASSPHRASE_LENGTH];
+} mlan_passphrase_t;
+
+/** Type defnition of mlan_pmk_t */
+typedef struct _mlan_pmk_t
+{
+    /** PMK */
+    t_u8 pmk[MLAN_MAX_KEY_LENGTH];
+} mlan_pmk_t;
+
+/** Type definition of mlan_ds_passphrase for MLAN_OID_SEC_CFG_PASSPHRASE */
+typedef struct _mlan_ds_passphrase
+{
+    /** SSID may be used */
+    mlan_802_11_ssid ssid;
+    /** BSSID may be used */
+    mlan_802_11_mac_addr bssid;
+    /** Flag for passphrase or pmk used */
+    t_u16 psk_type;
+    /** Passphrase or PMK */
+    union
+    {
+        /** Passphrase */
+        mlan_passphrase_t passphrase;
+        /** PMK */
+        mlan_pmk_t pmk;
+    } psk;
+} mlan_ds_passphrase, *pmlan_ds_passphrase;
+
+/** Type definition of mlan_ds_esupp_mode for MLAN_OID_SEC_CFG_ESUPP_MODE */
+typedef struct _mlan_ds_ewpa_mode
+{
+    /** RSN mode */
+    t_u32 rsn_mode;
+    /** Active pairwise cipher */
+    t_u32 act_paircipher;
+    /** Active pairwise cipher */
+    t_u32 act_groupcipher;
+} mlan_ds_esupp_mode, *pmlan_ds_esupp_mode;
+
+/** Type definition of mlan_ds_sec_cfg for MLAN_IOCTL_SEC_CFG */
+typedef struct _mlan_ds_sec_cfg
+{
+    /** Sub-command */
+    t_u32 sub_command;
+    /** Security configuration parameter */
+    union
+    {
+        /** Authentication mode for MLAN_OID_SEC_CFG_AUTH_MODE */
+        t_u32 auth_mode;
+        /** Encryption mode for MLAN_OID_SEC_CFG_ENCRYPT_MODE */
+        t_u32 encrypt_mode;
+        /** WPA enabled flag for MLAN_OID_SEC_CFG_WPA_ENABLED */
+        t_u32 wpa_enabled;
+        /** WAPI enabled flag for MLAN_OID_SEC_CFG_WAPI_ENABLED */
+        t_u32 wapi_enabled;
+        /** Port Control enabled flag for MLAN_OID_SEC_CFG_PORT_CTRL */
+        t_u32 port_ctrl_enabled;
+        /** Encryption key for MLAN_OID_SEC_CFG_ENCRYPT_KEY */
+        mlan_ds_encrypt_key encrypt_key;
+        /** Passphrase for MLAN_OID_SEC_CFG_PASSPHRASE */
+        mlan_ds_passphrase passphrase;
+        /** Embedded supplicant WPA enabled flag for MLAN_OID_SEC_CFG_EWPA_ENABLED */
+        t_u32 ewpa_enabled;
+        /** Embedded supplicant mode for MLAN_OID_SEC_CFG_ESUPP_MODE */
+        mlan_ds_esupp_mode esupp_mode;
+    } param;
+} mlan_ds_sec_cfg, *pmlan_ds_sec_cfg;
+
+/*-----------------------------------------------------------------*/
+/** Rate Configuration Group */
+/*-----------------------------------------------------------------*/
+/** Enumeration for rate type */
+enum _mlan_rate_type
+{
+    MLAN_RATE_INDEX,
+    MLAN_RATE_VALUE
+};
+
+/** Type definition of mlan_rate_cfg_t for MLAN_OID_RATE_CFG */
+typedef struct _mlan_rate_cfg_t
+{
+    /** Fixed rate: 0, auto rate: 1 */
+    t_u32 is_rate_auto;
+    /** Rate type */
+    t_u32 rate_type;
+    /** Rate index or rate value if fixed rate */
+    t_u32 rate;
+} mlan_rate_cfg_t;
+
+/** HT channel bandwidth */
+typedef enum _mlan_ht_bw
+{
+    MLAN_HT_BW20,
+    MLAN_HT_BW40,
+} mlan_ht_bw;
+
+/** HT guard interval */
+typedef enum _mlan_ht_gi
+{
+    MLAN_HT_LGI,
+    MLAN_HT_SGI,
+} mlan_ht_gi;
+
+/** Band and BSS mode */
+typedef struct _mlan_band_data_rate
+{
+    /** Band configuration */
+    t_u8 config_bands;
+    /** BSS mode (Infra or IBSS) */
+    t_u8 bss_mode;
+} mlan_band_data_rate;
+
+/** Type definition of mlan_data_rate for MLAN_OID_GET_DATA_RATE */
+typedef struct _mlan_data_rate
+{
+    /** Tx data rate */
+    t_u32 tx_data_rate;
+    /** Rx data rate */
+    t_u32 rx_data_rate;
+
+    /** Tx channel bandwidth */
+    t_u32 tx_ht_bw;
+    /** Tx guard interval */
+    t_u32 tx_ht_gi;
+    /** Rx channel bandwidth */
+    t_u32 rx_ht_bw;
+    /** Rx guard interval */
+    t_u32 rx_ht_gi;
+} mlan_data_rate;
+
+/** Type definition of mlan_ds_rate for MLAN_IOCTL_RATE */
+typedef struct _mlan_ds_rate
+{
+    /** Sub-command */
+    t_u32 sub_command;
+    /** Rate configuration parameter */
+    union
+    {
+        /** Rate configuration for MLAN_OID_RATE_CFG */
+        mlan_rate_cfg_t rate_cfg;
+        /** Data rate for MLAN_OID_GET_DATA_RATE */
+        mlan_data_rate data_rate;
+        /** Supported rates for MLAN_OID_SUPPORTED_RATES */
+        t_u8 rates[MLAN_SUPPORTED_RATES];
+        /** Band/BSS mode for getting supported rates */
+        mlan_band_data_rate rate_band_cfg;
+    } param;
+} mlan_ds_rate, *pmlan_ds_rate;
+
+/*-----------------------------------------------------------------*/
+/** Power Configuration Group */
+/*-----------------------------------------------------------------*/
+
+/** Type definition of mlan_power_cfg_t for MLAN_OID_POWER_CFG */
+typedef struct _mlan_power_cfg_t
+{
+    /** Is power auto */
+    t_u32 is_power_auto;
+    /** Power level */
+    t_u32 power_level;
+} mlan_power_cfg_t;
+
+/** max power table size */
+#define MAX_POWER_TABLE_SIZE 	128
+
+/** The HT BW40 bit in Tx rate index */
+#define TX_RATE_HT_BW40_BIT 	MBIT(7)
+
+/** Type definition of mlan_power_cfg_ext for MLAN_OID_POWER_CFG_EXT */
+typedef struct _mlan_power_cfg_ext
+{
+    /** Length of power_data */
+    t_u32 len;
+    /** Buffer of power configuration data */
+    t_u32 power_data[MAX_POWER_TABLE_SIZE];
+} mlan_power_cfg_ext;
+
+/** Type definition of mlan_ds_power_cfg for MLAN_IOCTL_POWER_CFG */
+typedef struct _mlan_ds_power_cfg
+{
+    /** Sub-command */
+    t_u32 sub_command;
+    /** Power configuration parameter */
+    union
+    {
+        /** Power configuration for MLAN_OID_POWER_CFG */
+        mlan_power_cfg_t power_cfg;
+        /** Extended power configuration for MLAN_OID_POWER_CFG_EXT */
+        mlan_power_cfg_ext power_ext;
+    } param;
+} mlan_ds_power_cfg, *pmlan_ds_power_cfg;
+
+/*-----------------------------------------------------------------*/
+/** Power Management Configuration Group */
+/*-----------------------------------------------------------------*/
+/** Host sleep config conditions : Cancel */
+#define HOST_SLEEP_CFG_CANCEL   0xffffffff
+
+/** Host sleep config conditions: Default */
+#define HOST_SLEEP_DEF_COND     0x7
+/** Host sleep config GPIO : Default */
+#define HOST_SLEEP_DEF_GPIO     0xff
+/** Host sleep config gap : Default */
+#define HOST_SLEEP_DEF_GAP      200
+
+/** Type definition of mlan_ds_hs_cfg for MLAN_OID_PM_CFG_HS_CFG */
+typedef struct _mlan_ds_hs_cfg
+{
+    /** MTRUE to invoke the HostCmd, MFALSE otherwise */
+    t_u32 is_invoke_hostcmd;
+    /** Host sleep config condition */
+    /** Bit0: broadcast data
+     *  Bit1: unicast data
+     *  Bit2: mac event
+     *  Bit3: multicast data 
+     */
+    t_u32 conditions;
+    /** GPIO pin or 0xff for interface */
+    t_u32 gpio;
+    /** Gap in milliseconds or or 0xff for special setting when GPIO is used to wakeup host */
+    t_u32 gap;
+} mlan_ds_hs_cfg, *pmlan_ds_hs_cfg;
+
+/** Default idle time for auto deep sleep */
+#define DEEP_SLEEP_IDLE_TIME	100
+
+typedef struct _mlan_ds_auto_ds
+{
+    /** auto ds mode, 0 - disable, 1 - enable */
+    t_u16 auto_ds;
+    /** auto ds idle time */
+    t_u16 idletime;
+} mlan_ds_auto_ds;
+
+/** Type definition of mlan_ds_inactivity_to for MLAN_OID_PM_CFG_INACTIVITY_TO */
+typedef struct _mlan_ds_inactivity_to
+{
+    /** Timeout unit in microsecond, 0 means 1000us (1ms) */
+    t_u32 timeout_unit;
+    /** Inactivity timeout for unicast data */
+    t_u32 unicast_timeout;
+    /** Inactivity timeout for multicast data */
+    t_u32 mcast_timeout;
+    /** Timeout for additional Rx traffic after Null PM1 packet exchange */
+    t_u32 ps_entry_timeout;
+} mlan_ds_inactivity_to, *pmlan_ds_inactivity_to;
+
+/** Minimum sleep period */
+#define MIN_SLEEP_PERIOD    10
+/** Maximum sleep period */
+#define MAX_SLEEP_PERIOD    60
+/** Special setting for UPSD certification tests */
+#define SLEEP_PERIOD_RESERVED_FF    0xFF
+
+/** PS null interval disable */
+#define PS_NULL_DISABLE         (-1)
+
+/** Local listen interval disable */
+#define MRVDRV_LISTEN_INTERVAL_DISABLE   (-1)
+/** Minimum listen interval */
+#define MRVDRV_MIN_LISTEN_INTERVAL       0
+
+/** Minimum multiple DTIM */
+#define MRVDRV_MIN_MULTIPLE_DTIM                0
+/** Maximum multiple DTIM */
+#define MRVDRV_MAX_MULTIPLE_DTIM                5
+/** Ignore multiple DTIM */
+#define MRVDRV_IGNORE_MULTIPLE_DTIM             0xfffe
+/** Match listen interval to closest DTIM */
+#define MRVDRV_MATCH_CLOSEST_DTIM               0xfffd
+
+/** Minimum adhoc awake period */
+#define MIN_ADHOC_AWAKE_PD      0
+/** Maximum adhoc awake period */
+#define MAX_ADHOC_AWAKE_PD      31
+/** Special adhoc awake period */
+#define SPECIAL_ADHOC_AWAKE_PD  255
+
+/** Minimum beacon miss timeout */
+#define MIN_BCN_MISS_TO         0
+/** Maximum beacon miss timeout */
+#define MAX_BCN_MISS_TO         50
+/** Disable beacon miss timeout */
+#define DISABLE_BCN_MISS_TO     65535
+
+/** Minimum delay to PS */
+#define MIN_DELAY_TO_PS         0
+/** Maximum delay to PS */
+#define MAX_DELAY_TO_PS         65535
+/** Delay to PS unchanged */
+#define DELAY_TO_PS_UNCHANGED   (-1)
+/** Default delay to PS */
+#define DELAY_TO_PS_DEFAULT     1000
+
+/** PS mode: Unchanged */
+#define PS_MODE_UNCHANGED       0
+/** PS mode: Auto */
+#define PS_MODE_AUTO            1
+/** PS mode: Poll */
+#define PS_MODE_POLL            2
+/** PS mode: Null */
+#define PS_MODE_NULL            3
+
+/** Type definition of mlan_ds_ps_cfg for MLAN_OID_PM_CFG_PS_CFG */
+typedef struct _mlan_ds_ps_cfg
+{
+    /** PS null interval in seconds */
+    t_u32 ps_null_interval;
+    /** Multiple DTIM interval */
+    t_u32 multiple_dtim_interval;
+    /** Listen interval */
+    t_u32 listen_interval;
+    /** Adhoc awake period */
+    t_u32 adhoc_awake_period;
+    /** Beacon miss timeout */
+    t_u32 bcn_miss_timeout;
+    /** Delay to PS */
+    t_s32 delay_to_ps;
+    /** PS mode */
+    t_u32 ps_mode;
+} mlan_ds_ps_cfg, *pmlan_ds_ps_cfg;
+
+/** Type definition of mlan_ds_sleep_params for MLAN_OID_PM_CFG_SLEEP_PARAMS */
+typedef struct _mlan_ds_sleep_params
+{
+    /** Error */
+    t_u32 error;
+    /** Offset */
+    t_u32 offset;
+    /** Stable time */
+    t_u32 stable_time;
+    /** Calibration control */
+    t_u32 cal_control;
+    /** External sleep clock */
+    t_u32 ext_sleep_clk;
+    /** Reserved */
+    t_u32 reserved;
+} mlan_ds_sleep_params, *pmlan_ds_sleep_params;
+
+/** sleep_param */
+typedef struct _ps_sleep_param
+{
+    /** control bitmap */
+    t_u32 ctrl_bitmap;
+    /** minimum sleep period (micro second) */
+    t_u32 min_sleep;
+    /** maximum sleep period (micro second) */
+    t_u32 max_sleep;
+} ps_sleep_param;
+
+/** inactivity sleep_param */
+typedef struct _inact_sleep_param
+{
+    /** inactivity timeout (micro second) */
+    t_u32 inactivity_to;
+    /** miniumu awake period (micro second) */
+    t_u32 min_awake;
+    /** maximum awake period (micro second) */
+    t_u32 max_awake;
+} inact_sleep_param;
+
+/** flag for ps mode */
+#define PS_FLAG_PS_MODE                 1
+/** flag for sleep param */
+#define PS_FLAG_SLEEP_PARAM             2
+/** flag for inactivity sleep param */
+#define PS_FLAG_INACT_SLEEP_PARAM       4
+
+/** Disable power mode */
+#define PS_MODE_DISABLE                      0
+/** Enable periodic dtim ps */
+#define PS_MODE_PERIODIC_DTIM                1
+/** Enable inactivity ps */
+#define PS_MODE_INACTIVITY                   2
+
+/** mlan_ds_ps_mgmt */
+typedef struct _mlan_ds_ps_mgmt
+{
+    /** flags for valid field */
+    t_u16 flags;
+    /** power mode */
+    t_u16 ps_mode;
+    /** sleep param */
+    ps_sleep_param sleep_param;
+    /** inactivity sleep param */
+    inact_sleep_param inact_param;
+} mlan_ds_ps_mgmt;
+
+/** mlan_ds_ps_info */
+typedef struct _mlan_ds_ps_info
+{
+    /** suspend allowed flag */
+    t_u32 is_suspend_allowed;
+} mlan_ds_ps_info;
+
+/** Type definition of mlan_ds_pm_cfg for MLAN_IOCTL_PM_CFG */
+typedef struct _mlan_ds_pm_cfg
+{
+    /** Sub-command */
+    t_u32 sub_command;
+    /** Power management parameter */
+    union
+    {
+        /** Power saving mode for MLAN_OID_PM_CFG_IEEE_PS */
+        t_u32 ps_mode;
+        /** Host Sleep configuration for MLAN_OID_PM_CFG_HS_CFG */
+        mlan_ds_hs_cfg hs_cfg;
+        /** Inactivity timeout for MLAN_OID_PM_CFG_INACTIVITY_TO */
+        mlan_ds_inactivity_to inactivity_to;
+        /** Sleep period for MLAN_OID_PM_CFG_SLEEP_PD */
+        t_u32 sleep_period;
+        /** PS configuration parameters for MLAN_OID_PM_CFG_PS_CFG */
+        mlan_ds_ps_cfg ps_cfg;
+        /** PS configuration parameters for MLAN_OID_PM_CFG_SLEEP_PARAMS */
+        mlan_ds_sleep_params sleep_params;
+        /** PS configuration parameters for MLAN_OID_PM_CFG_PS_MODE */
+        mlan_ds_ps_mgmt ps_mgmt;
+        /** power info for MLAN_OID_PM_INFO */
+        mlan_ds_ps_info ps_info;
+    } param;
+} mlan_ds_pm_cfg, *pmlan_ds_pm_cfg;
+
+/*-----------------------------------------------------------------*/
+/** WMM Configuration Group */
+/*-----------------------------------------------------------------*/
+
+/** WMM TSpec size */
+#define MLAN_WMM_TSPEC_SIZE             63
+/** WMM Add TS extra IE bytes */
+#define MLAN_WMM_ADDTS_EXTRA_IE_BYTES   256
+/** WMM statistics for packets hist bins */
+#define MLAN_WMM_STATS_PKTS_HIST_BINS   7
+/** Maximum number of AC QOS queues available */
+#define MLAN_WMM_MAX_AC_QUEUES          4
+
+/**
+ *  @brief IOCTL structure to send an ADDTS request and retrieve the response.
+ *
+ *  IOCTL structure from the application layer relayed to firmware to 
+ *    instigate an ADDTS management frame with an appropriate TSPEC IE as well
+ *    as any additional IEs appended in the ADDTS Action frame.
+ *
+ *  @sa woal_wmm_addts_req_ioctl
+ */
+typedef struct
+{
+    mlan_cmd_result_e cmd_result;     /**< Firmware execution result */
+
+    t_u32 timeout_ms;                 /**< Timeout value in milliseconds */
+    t_u8 ieee_status_code;            /**< IEEE status code */
+
+    t_u32 ie_data_len;                /**< Length of ie block in ie_data */
+    t_u8 ie_data[MLAN_WMM_TSPEC_SIZE  /**< TSPEC to send in the ADDTS */
+                 + MLAN_WMM_ADDTS_EXTRA_IE_BYTES];  /**< Extra IE buf*/
+} wlan_ioctl_wmm_addts_req_t;
+
+/**
+ *  @brief IOCTL structure to send a DELTS request.
+ *
+ *  IOCTL structure from the application layer relayed to firmware to 
+ *    instigate an DELTS management frame with an appropriate TSPEC IE.
+ *
+ *  @sa woal_wmm_delts_req_ioctl
+ */
+typedef struct
+{
+    mlan_cmd_result_e cmd_result; /**< Firmware execution result */
+    t_u8 ieee_reason_code;        /**< IEEE reason code sent, unused for WMM */
+    t_u32 ie_data_len;            /**< Length of ie block in ie_data */
+    t_u8 ie_data[MLAN_WMM_TSPEC_SIZE]; /**< TSPEC to send in the DELTS */
+} wlan_ioctl_wmm_delts_req_t;
+
+/**
+ *  @brief IOCTL structure to configure a specific AC Queue's parameters
+ *
+ *  IOCTL structure from the application layer relayed to firmware to 
+ *    get, set, or default the WMM AC queue parameters.
+ *
+ *  - msdu_lifetime_expiry is ignored if set to 0 on a set command
+ *
+ *  @sa woal_wmm_queue_config_ioctl
+ */
+typedef struct
+{
+    mlan_wmm_queue_config_action_e action;    /**< Set, Get, or Default */
+    mlan_wmm_ac_e access_category;            /**< WMM_AC_BK(0) to WMM_AC_VO(3) */
+    t_u16 msdu_lifetime_expiry;               /**< lifetime expiry in TUs */
+    t_u8 supported_rates[10];                 /**< Not supported yet */
+} wlan_ioctl_wmm_queue_config_t;
+
+/**
+ *  @brief IOCTL structure to start, stop, and get statistics for a WMM AC
+ *
+ *  IOCTL structure from the application layer relayed to firmware to
+ *    start or stop statistical collection for a given AC.  Also used to
+ *    retrieve and clear the collected stats on a given AC.
+ *
+ *  @sa woal_wmm_queue_stats_ioctl
+ */
+typedef struct
+{
+    /** Action of Queue Config : Start, Stop, or Get */
+    mlan_wmm_queue_stats_action_e action;
+    /** User Priority */
+    t_u8 user_priority;
+    /** Number of successful packets transmitted */
+    t_u16 pkt_count;
+    /** Packets lost; not included in pkt_count */
+    t_u16 pkt_loss;
+    /** Average Queue delay in microseconds */
+    t_u32 avg_queue_delay;
+    /** Average Transmission delay in microseconds */
+    t_u32 avg_tx_delay;
+    /** Calculated used time in units of 32 microseconds */
+    t_u16 used_time;
+    /** Calculated policed time in units of 32 microseconds */
+    t_u16 policed_time;
+    /** Queue Delay Histogram; number of packets per queue delay range
+     *
+     *  [0] -  0ms <= delay < 5ms
+     *  [1] -  5ms <= delay < 10ms
+     *  [2] - 10ms <= delay < 20ms
+     *  [3] - 20ms <= delay < 30ms
+     *  [4] - 30ms <= delay < 40ms
+     *  [5] - 40ms <= delay < 50ms
+     *  [6] - 50ms <= delay < msduLifetime (TUs)
+     */
+    t_u16 delay_histogram[MLAN_WMM_STATS_PKTS_HIST_BINS];
+} wlan_ioctl_wmm_queue_stats_t,
+/** Type definition of mlan_ds_wmm_queue_stats for MLAN_OID_WMM_CFG_QUEUE_STATS */
+  mlan_ds_wmm_queue_stats, *pmlan_ds_wmm_queue_stats;
+
+/** 
+ *  @brief IOCTL sub structure for a specific WMM AC Status
+ */
+typedef struct
+{
+    /** WMM Acm */
+    t_u8 wmm_acm;
+    /** Flow required flag */
+    t_u8 flow_required;
+    /** Flow created flag */
+    t_u8 flow_created;
+    /** Disabled flag */
+    t_u8 disabled;
+} wlan_ioctl_wmm_queue_status_ac_t;
+
+/**
+ *  @brief IOCTL structure to retrieve the WMM AC Queue status
+ *
+ *  IOCTL structure from the application layer to retrieve:
+ *     - ACM bit setting for the AC
+ *     - Firmware status (flow required, flow created, flow disabled)
+ *
+ *  @sa woal_wmm_queue_status_ioctl
+ */
+typedef struct
+{
+    /** WMM AC queue status */
+    wlan_ioctl_wmm_queue_status_ac_t ac_status[MLAN_WMM_MAX_AC_QUEUES];
+} wlan_ioctl_wmm_queue_status_t,
+/** Type definition of mlan_ds_wmm_queue_status for MLAN_OID_WMM_CFG_QUEUE_STATUS */
+  mlan_ds_wmm_queue_status, *pmlan_ds_wmm_queue_status;
+
+/** Type definition of mlan_ds_wmm_addts for MLAN_OID_WMM_CFG_ADDTS */
+typedef struct _mlan_ds_wmm_addts
+{
+    /** Result of ADDTS request */
+    mlan_cmd_result_e result;
+    /** Timeout value in milliseconds */
+    t_u32 timeout;
+    /** IEEE status code */
+    t_u32 status_code;
+    /** Dialog token */
+    t_u8 dialog_tok;
+    /** TSPEC data length */
+    t_u8 ie_data_len;
+    /** TSPEC to send in the ADDTS + buffering for any extra IEs */
+    t_u8 ie_data[MLAN_WMM_TSPEC_SIZE + MLAN_WMM_ADDTS_EXTRA_IE_BYTES];
+} mlan_ds_wmm_addts, *pmlan_ds_wmm_addts;
+
+/** Type definition of mlan_ds_wmm_delts for MLAN_OID_WMM_CFG_DELTS */
+typedef struct _mlan_ds_wmm_delts
+{
+    /** Result of DELTS request */
+    mlan_cmd_result_e result;
+    /** IEEE status code */
+    t_u32 status_code;
+    /** TSPEC data length */
+    t_u8 ie_data_len;
+    /** TSPEC to send in the DELTS */
+    t_u8 ie_data[MLAN_WMM_TSPEC_SIZE];
+} mlan_ds_wmm_delts, *pmlan_ds_wmm_delts;
+
+/** Type definition of mlan_ds_wmm_queue_config for MLAN_OID_WMM_CFG_QUEUE_CONFIG */
+typedef struct _mlan_ds_wmm_queue_config
+{
+    /** Action of Queue Config : Set, Get, or Default */
+    mlan_wmm_queue_config_action_e action;
+    /** WMM Access Category: WMM_AC_BK(0) to WMM_AC_VO(3) */
+    mlan_wmm_ac_e access_category;
+    /** Lifetime expiry in TUs */
+    t_u16 msdu_lifetime_expiry;
+    /** Reserve for future use */
+    t_u8 reserved[10];
+} mlan_ds_wmm_queue_config, *pmlan_ds_wmm_queue_config;
+
+/** Type definition of mlan_ds_wmm_cfg for MLAN_IOCTL_WMM_CFG */
+typedef struct _mlan_ds_wmm_cfg
+{
+    /** Sub-command */
+    t_u32 sub_command;
+    /** WMM configuration parameter */
+    union
+    {
+        /** WMM enable for MLAN_OID_WMM_CFG_ENABLE */
+        t_u32 wmm_enable;
+        /** QoS configuration for MLAN_OID_WMM_CFG_QOS */
+        t_u8 qos_cfg;
+        /** WMM add TS for MLAN_OID_WMM_CFG_ADDTS */
+        mlan_ds_wmm_addts addts;
+        /** WMM delete TS for MLAN_OID_WMM_CFG_DELTS */
+        mlan_ds_wmm_delts delts;
+        /** WMM queue configuration for MLAN_OID_WMM_CFG_QUEUE_CONFIG */
+        mlan_ds_wmm_queue_config q_cfg;
+        /** WMM queue status for MLAN_OID_WMM_CFG_QUEUE_STATS */
+        mlan_ds_wmm_queue_stats q_stats;
+        /** WMM queue status for MLAN_OID_WMM_CFG_QUEUE_STATUS */
+        mlan_ds_wmm_queue_status q_status;
+        /** WMM TS status for MLAN_OID_WMM_CFG_TS_STATUS */
+        mlan_ds_wmm_ts_status ts_status;
+    } param;
+} mlan_ds_wmm_cfg, *pmlan_ds_wmm_cfg;
+
+/*-----------------------------------------------------------------*/
+/** WPS Configuration Group */
+/*-----------------------------------------------------------------*/
+/** Enumeration for WPS session */
+enum _mlan_wps_status
+{
+    MLAN_WPS_CFG_SESSION_START = 1,
+    MLAN_WPS_CFG_SESSION_END = 0
+};
+
+/** Type definition of mlan_ds_wps_cfg for MLAN_IOCTL_WPS_CFG */
+typedef struct _mlan_ds_wps_cfg
+{
+    /** Sub-command */
+    t_u32 sub_command;
+    /** WPS configuration parameter */
+    union
+    {
+        /** WPS session for MLAN_OID_WPS_CFG_SESSION */
+        t_u32 wps_session;
+    } param;
+} mlan_ds_wps_cfg, *pmlan_ds_wps_cfg;
+
+/*-----------------------------------------------------------------*/
+/** 802.11n Configuration Group */
+/*-----------------------------------------------------------------*/
+/** Maximum MCS */
+#define NUM_MCS_FIELD      16
+
+/** Type definition of mlan_ds_11n_addba_param for MLAN_OID_11N_CFG_ADDBA_PARAM */
+typedef struct _mlan_ds_11n_addba_param
+{
+    /** Timeout */
+    t_u32 timeout;
+    /** Buffer size for ADDBA request */
+    t_u32 txwinsize;
+    /** Buffer size for ADDBA response */
+    t_u32 rxwinsize;
+} mlan_ds_11n_addba_param, *pmlan_ds_11n_addba_param;
+
+/** Type definition of mlan_ds_11n_tx_cfg for MLAN_OID_11N_CFG_TX */
+typedef struct _mlan_ds_11n_tx_cfg
+{
+    /** HTTxCap */
+    t_u16 httxcap;
+    /** HTTxInfo */
+    t_u16 httxinfo;
+} mlan_ds_11n_tx_cfg, *pmlan_ds_11n_tx_cfg;
+
+/** Type definition of mlan_ds_11n_amsdu_aggr_ctrl for 
+ * MLAN_OID_11N_AMSDU_AGGR_CTRL*/
+typedef struct _mlan_ds_11n_amsdu_aggr_ctrl
+{
+    /** Enable/Disable */
+    t_u16 enable;
+    /** Current AMSDU size valid */
+    t_u16 curr_buf_size;
+} mlan_ds_11n_amsdu_aggr_ctrl, *pmlan_ds_11n_amsdu_aggr_ctrl;
+
+/** Type definition of mlan_ds_11n_aggr_prio_tbl for MLAN_OID_11N_CFG_AGGR_PRIO_TBL */
+typedef struct _mlan_ds_11n_aggr_prio_tbl
+{
+    /** ampdu priority table */
+    t_u8 ampdu[MAX_NUM_TID];
+    /** amsdu priority table */
+    t_u8 amsdu[MAX_NUM_TID];
+} mlan_ds_11n_aggr_prio_tbl, *pmlan_ds_11n_aggr_prio_tbl;
+
+/** Type definition of mlan_ds_11n_cfg for MLAN_IOCTL_11N_CFG */
+typedef struct _mlan_ds_11n_cfg
+{
+    /** Sub-command */
+    t_u32 sub_command;
+    /** 802.11n configuration parameter */
+    union
+    {
+        /** Tx param for 11n for MLAN_OID_11N_CFG_TX */
+        mlan_ds_11n_tx_cfg tx_cfg;
+        /** Aggr priority table for MLAN_OID_11N_CFG_AGGR_PRIO_TBL */
+        mlan_ds_11n_aggr_prio_tbl aggr_prio_tbl;
+        /** Add BA param for MLAN_OID_11N_CFG_ADDBA_PARAM */
+        mlan_ds_11n_addba_param addba_param;
+        /** Add BA Reject paramters for MLAN_OID_11N_CFG_ADDBA_REJECT */
+        t_u8 addba_reject[MAX_NUM_TID];
+        /** Tx buf size for MLAN_OID_11N_CFG_MAX_TX_BUF_SIZE */
+        t_u32 tx_buf_size;
+        /** HT cap info configuration for MLAN_OID_11N_HTCAP_CFG */
+        t_u32 htcap_cfg;
+        /** Hardware HT cap info required for MLAN_OID_11N_HTCAP_CFG */
+        t_u32 hw_cap_req;
+        /** Tx param for 11n for MLAN_OID_11N_AMSDU_AGGR_CTRL */
+        mlan_ds_11n_amsdu_aggr_ctrl amsdu_aggr_ctrl;
+        /** Supported MCS Set field */
+        t_u8 supported_mcs_set[NUM_MCS_FIELD];
+        /** Transmit Beamforming Capabilities field */
+        t_u32 tx_bf_cap;
+    } param;
+} mlan_ds_11n_cfg, *pmlan_ds_11n_cfg;
+
+/*-----------------------------------------------------------------*/
+/** 802.11d Configuration Group */
+/*-----------------------------------------------------------------*/
+/** Maximum subbands for 11d */
+#define MRVDRV_MAX_SUBBAND_802_11D              83
+/** Country code length */
+#define COUNTRY_CODE_LEN                        3
+
+#ifdef STA_SUPPORT
+/** Data structure for subband set */
+typedef struct _mlan_ds_subband_set_t
+{
+    /** First channel */
+    t_u8 first_chan;
+    /** Number of channels */
+    t_u8 no_of_chan;
+    /** Maximum Tx power */
+    t_u8 max_tx_pwr;
+} mlan_ds_subband_set_t;
+
+/** Domain regulatory information */
+typedef struct _mlan_ds_11d_domain_info
+{
+    /** Country Code */
+    t_u8 country_code[COUNTRY_CODE_LEN];
+    /** Band that channels in sub_band belong to */
+    t_u8 band;
+    /** No. of subband in below */
+    t_u8 no_of_sub_band;
+    /** Subband data to send/last sent */
+    mlan_ds_subband_set_t sub_band[MRVDRV_MAX_SUBBAND_802_11D];
+} mlan_ds_11d_domain_info;
+#endif
+
+/** Type definition of mlan_ds_11d_cfg for MLAN_IOCTL_11D_CFG */
+typedef struct _mlan_ds_11d_cfg
+{
+    /** Sub-command */
+    t_u32 sub_command;
+    /** 802.11d configuration parameter */
+    union
+    {
+#ifdef STA_SUPPORT
+        /** Enable for MLAN_OID_11D_CFG_ENABLE */
+        t_u32 enable_11d;
+        /** Domain info for MLAN_OID_11D_DOMAIN_INFO */
+        mlan_ds_11d_domain_info domain_info;
+#endif                          /* STA_SUPPORT */
+#ifdef UAP_SUPPORT
+#endif                          /* UAP_SUPPORT */
+    } param;
+} mlan_ds_11d_cfg, *pmlan_ds_11d_cfg;
+
+/*-----------------------------------------------------------------*/
+/** Register Memory Access Group */
+/*-----------------------------------------------------------------*/
+/** Enumeration for register type */
+enum _mlan_reg_type
+{
+    MLAN_REG_MAC = 1,
+    MLAN_REG_BBP,
+    MLAN_REG_RF,
+    MLAN_REG_PMIC,
+    MLAN_REG_CAU,
+};
+
+/** Type definition of mlan_ds_reg_rw for MLAN_OID_REG_RW */
+typedef struct _mlan_ds_reg_rw
+{
+    /** Register type */
+    t_u32 type;
+    /** Offset */
+    t_u32 offset;
+    /** Value */
+    t_u32 value;
+} mlan_ds_reg_rw;
+
+/** Maximum EEPROM data */
+#define MAX_EEPROM_DATA 256
+
+/** Type definition of mlan_ds_read_eeprom for MLAN_OID_EEPROM_RD */
+typedef struct _mlan_ds_read_eeprom
+{
+    /** Multiples of 4 */
+    t_u16 offset;
+    /** Number of bytes */
+    t_u16 byte_count;
+    /** Value */
+    t_u8 value[MAX_EEPROM_DATA];
+} mlan_ds_read_eeprom;
+
+/** Type definition of mlan_ds_mem_rw for MLAN_OID_MEM_RW */
+typedef struct _mlan_ds_mem_rw
+{
+    /** Address */
+    t_u32 addr;
+    /** Value */
+    t_u32 value;
+} mlan_ds_mem_rw;
+
+/** Type definition of mlan_ds_reg_mem for MLAN_IOCTL_REG_MEM */
+typedef struct _mlan_ds_reg_mem
+{
+    /** Sub-command */
+    t_u32 sub_command;
+    /** Register memory access parameter */
+    union
+    {
+        /** Register access for MLAN_OID_REG_RW */
+        mlan_ds_reg_rw reg_rw;
+        /** EEPROM access for MLAN_OID_EEPROM_RD */
+        mlan_ds_read_eeprom rd_eeprom;
+        /** Memory access for MLAN_OID_MEM_RW */
+        mlan_ds_mem_rw mem_rw;
+    } param;
+} mlan_ds_reg_mem, *pmlan_ds_reg_mem;
+
+/*-----------------------------------------------------------------*/
+/** 802.11h Configuration Group */
+/*-----------------------------------------------------------------*/
+
+/** Type definition of mlan_ds_11h_cfg for MLAN_IOCTL_11H_CFG */
+typedef struct _mlan_ds_11h_cfg
+{
+    /** Sub-command */
+    t_u32 sub_command;
+    union
+    {
+        /** Local power constraint for MLAN_OID_11H_LOCAL_POWER_CONSTRAINT */
+        t_s8 usr_local_power_constraint;
+    } param;
+} mlan_ds_11h_cfg, *pmlan_ds_11h_cfg;
+
+/*-----------------------------------------------------------------*/
+/** Miscellaneous Configuration Group */
+/*-----------------------------------------------------------------*/
+
+/** CMD buffer size */
+#define MLAN_SIZE_OF_CMD_BUFFER 2048
+
+/** LDO Internal */
+#define LDO_INTERNAL            0
+/** LDO External */
+#define LDO_EXTERNAL            1
+
+/** Enumeration for IE type */
+enum _mlan_ie_type
+{
+    MLAN_IE_TYPE_GEN_IE = 0,
+#ifdef STA_SUPPORT
+    MLAN_IE_TYPE_ARP_FILTER,
+#endif /* STA_SUPPORT */
+};
+
+/** Type definition of mlan_ds_misc_gen_ie for MLAN_OID_MISC_GEN_IE */
+typedef struct _mlan_ds_misc_gen_ie
+{
+    /** IE type */
+    t_u32 type;
+    /** IE length */
+    t_u32 len;
+    /** IE buffer */
+    t_u8 ie_data[MAX_IE_SIZE];
+} mlan_ds_misc_gen_ie;
+
+/** Heart Beat Configuration: Disable */
+#define HB_CFG_DISABLE          0x0000
+/** Heart Beat Configuration: No change */
+#define HB_CFG_NO_CHANGE        0xFFFF
+
+/** Type definition of mlan_ds_misc_hb for MLAN_OID_MISC_HEART_BEAT */
+typedef struct _mlan_ds_misc_heart_beat
+{
+    /** HeartBeat timer for the host */
+    t_u16 h2d_timer;
+    /** Debug mode for host */
+    t_u16 debug_for_host;
+    /** HeartBeat timer for the device */
+    t_u16 d2h_timer;
+    /** Delay time for reconnect */
+    t_u16 reconnect_delay;
+    /** Debug mode for device */
+    t_u16 debug_for_device;
+} mlan_ds_misc_heart_beat;
+
+/** Type definition of mlan_ds_misc_cmd for MLAN_OID_MISC_HOST_CMD */
+typedef struct _mlan_ds_misc_cmd
+{
+    /** Command length */
+    t_u32 len;
+    /** Command buffer */
+    t_u8 cmd[MLAN_SIZE_OF_CMD_BUFFER];
+} mlan_ds_misc_cmd;
+
+/** Maximum number of system clocks */
+#define MLAN_MAX_CLK_NUM     	16
+
+/** Clock type : Configurable */
+#define MLAN_CLK_CONFIGURABLE	0
+/** Clock type : Supported */
+#define MLAN_CLK_SUPPORTED   	1
+
+/** Type definition of mlan_ds_misc_sys_clock for MLAN_OID_MISC_SYS_CLOCK */
+typedef struct _mlan_ds_misc_sys_clock
+{
+    /** Current system clock */
+    t_u16 cur_sys_clk;
+    /** Clock type */
+    t_u16 sys_clk_type;
+    /** Number of clocks */
+    t_u16 sys_clk_num;
+    /** System clocks */
+    t_u16 sys_clk[MLAN_MAX_CLK_NUM];
+} mlan_ds_misc_sys_clock;
+
+/** Enumeration for function init/shutdown */
+enum _mlan_func_cmd
+{
+    MLAN_FUNC_INIT = 1,
+    MLAN_FUNC_SHUTDOWN,
+};
+
+/** Type definition of mlan_ds_misc_tx_datapause for MLAN_OID_MISC_TX_DATAPAUSE */
+typedef struct _mlan_ds_misc_tx_datapause
+{
+    /** Tx data pause flag */
+    t_u16 tx_pause;
+    /** Max number of Tx buffers for all PS clients */
+    t_u16 tx_buf_cnt;
+} mlan_ds_misc_tx_datapause;
+
+/** IP address length */
+#define IPADDR_LEN                  (16)
+/** Max number of ip */
+#define MAX_IPADDR                  (4)
+/** IP address type - IPv4*/
+#define IPADDR_TYPE_IPV4            (1)
+/** IP operation remove */
+#define MLAN_IPADDR_OP_IP_REMOVE    (0)
+/** IP operation ARP filter */
+#define MLAN_IPADDR_OP_ARP_FILTER   MBIT(0)
+/** IP operation ARP response */
+#define MLAN_IPADDR_OP_AUTO_ARP_RESP    MBIT(1)
+
+/** Type definition of mlan_ds_misc_ipaddr_cfg for MLAN_OID_MISC_IP_ADDR */
+typedef struct _mlan_ds_misc_ipaddr_cfg
+{
+    /** Operation code */
+    t_u32 op_code;
+    /** IP address type */
+    t_u32 ip_addr_type;
+    /** Number of IP */
+    t_u32 ip_addr_num;
+    /** IP address */
+    t_u8 ip_addr[MAX_IPADDR][IPADDR_LEN];
+} mlan_ds_misc_ipaddr_cfg;
+
+/* MEF configuration disable */
+#define MEF_CFG_DISABLE             0
+/* MEF configuration Rx filter enable */
+#define MEF_CFG_RX_FILTER_ENABLE    1
+/* MEF configuration auto ARP response */
+#define MEF_CFG_AUTO_ARP_RESP       2
+/* MEF configuration host command */
+#define MEF_CFG_HOSTCMD             0xFFFF
+
+/** Type definition of mlan_ds_misc_mef_cfg for MLAN_OID_MISC_MEF_CFG */
+typedef struct _mlan_ds_misc_mef_cfg
+{
+    /** Sub-ID for operation */
+    t_u32 sub_id;
+    /** Parameter according to sub-ID */
+    union
+    {
+        /** MEF command buffer for MEF_CFG_HOSTCMD */
+        mlan_ds_misc_cmd cmd_buf;
+    } param;
+} mlan_ds_misc_mef_cfg;
+
+/** Type definition of mlan_ds_misc_cfg for MLAN_IOCTL_MISC_CFG */
+typedef struct _mlan_ds_misc_cfg
+{
+    /** Sub-command */
+    t_u32 sub_command;
+    /** Miscellaneous configuration parameter */
+    union
+    {
+        /** Generic IE for MLAN_OID_MISC_GEN_IE */
+        mlan_ds_misc_gen_ie gen_ie;
+        /** Region code for MLAN_OID_MISC_REGION */
+        t_u32 region_code;
+        /** HeartBeat for MLAN_OID_MISC_HEART_BEAT */
+        mlan_ds_misc_heart_beat heart_beat;
+        /** Hostcmd for MLAN_OID_MISC_HOST_CMD */
+        mlan_ds_misc_cmd hostcmd;
+        /** System clock for MLAN_OID_MISC_SYS_CLOCK */
+        mlan_ds_misc_sys_clock sys_clock;
+        /** WWS set/get for MLAN_OID_MISC_WWS */
+        t_u32 wws_cfg;
+        /** Function init/shutdown for MLAN_OID_MISC_INIT_SHUTDOWN */
+        t_u32 func_init_shutdown;
+        /** Custom IE for MLAN_OID_MISC_CUSTOM_IE */
+        mlan_ds_misc_custom_ie cust_ie;
+        /** Tx data pause for MLAN_OID_MISC_TX_DATAPAUSE */
+        mlan_ds_misc_tx_datapause tx_datapause;
+        /** IP address configuration */
+        mlan_ds_misc_ipaddr_cfg ipaddr_cfg;
+        /** MAC control for MLAN_OID_MISC_MAC_CONTROL */
+        t_u32 mac_ctrl;
+        /** MEF configuration for MLAN_OID_MISC_MEF_CFG */
+        mlan_ds_misc_mef_cfg mef_cfg;
+        /** Thermal reading for MLAN_OID_MISC_THERMAL */
+        t_u32 thermal;
+    } param;
+} mlan_ds_misc_cfg, *pmlan_ds_misc_cfg;
+
+#endif /* !_MLAN_IOCTL_H_ */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_join.c linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_join.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_join.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_join.c	2017-09-23 03:42:50.118674758 +0800
@@ -0,0 +1,1822 @@
+/** @file mlan_join.c
+ *
+ *  @brief Functions implementing wlan infrastructure and adhoc join routines
+ *
+ *  IOCTL handlers as well as command preparation and response routines
+ *  for sending adhoc start, adhoc join, and association commands
+ *  to the firmware.
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ *  @sa mlan_join.h
+ */
+
+/******************************************************
+Change log:
+    10/30/2008: initial version
+******************************************************/
+
+#include "mlan.h"
+#include "mlan_join.h"
+#include "mlan_util.h"
+#include "mlan_fw.h"
+#include "mlan_main.h"
+#include "mlan_wmm.h"
+#include "mlan_11n.h"
+#include "mlan_11h.h"
+
+/********************************************************
+                Local Constants
+********************************************************/
+
+/********************************************************
+                Local Variables
+********************************************************/
+
+/********************************************************
+                Global Variables
+********************************************************/
+
+/********************************************************
+                Local Functions
+********************************************************/
+/**
+ *  @brief Append a generic IE as a pass through TLV to a TLV buffer.
+ *
+ *  This function is called from the network join command prep. routine. 
+ *    If the IE buffer has been setup by the application, this routine appends
+ *    the buffer as a pass through TLV type to the request.
+ *
+ *  @param priv     A pointer to mlan_private structure
+ *  @param ppbuffer pointer to command buffer pointer
+ *
+ *  @return         bytes added to the buffer
+ */
+static int
+wlan_cmd_append_generic_ie(mlan_private * priv, t_u8 ** ppbuffer)
+{
+    int ret_len = 0;
+    MrvlIEtypesHeader_t ie_header;
+
+    /* Null Checks */
+    if (ppbuffer == MNULL)
+        return 0;
+    if (*ppbuffer == MNULL)
+        return 0;
+
+    /* 
+     * If there is a generic ie buffer setup, append it to the return
+     *   parameter buffer pointer.
+     */
+    if (priv->gen_ie_buf_len) {
+        PRINTM(MINFO, "append generic IE %d to %p\n", priv->gen_ie_buf_len,
+               *ppbuffer);
+
+        /* Wrap the generic IE buffer with a pass through TLV type */
+        ie_header.type = wlan_cpu_to_le16(TLV_TYPE_PASSTHROUGH);
+        ie_header.len = wlan_cpu_to_le16(priv->gen_ie_buf_len);
+        memcpy(priv->adapter, *ppbuffer, &ie_header, sizeof(ie_header));
+
+        /* Increment the return size and the return buffer pointer param */
+        *ppbuffer += sizeof(ie_header);
+        ret_len += sizeof(ie_header);
+
+        /* Copy the generic IE buffer to the output buffer, advance pointer */
+        memcpy(priv->adapter, *ppbuffer, priv->gen_ie_buf,
+               priv->gen_ie_buf_len);
+
+        /* Increment the return size and the return buffer pointer param */
+        *ppbuffer += priv->gen_ie_buf_len;
+        ret_len += priv->gen_ie_buf_len;
+
+        /* Reset the generic IE buffer */
+        priv->gen_ie_buf_len = 0;
+    }
+
+    /* return the length appended to the buffer */
+    return ret_len;
+}
+
+/**
+  *  @brief Append TSF tracking info from the scan table for the target AP
+  *  
+  *  This function is called from the network join command prep. routine. 
+  *     The TSF table TSF sent to the firmware contains two TSF values:
+  *        - the TSF of the target AP from its previous beacon/probe response
+  *        - the TSF timestamp of our local MAC at the time we observed the
+  *          beacon/probe response.
+  *  
+  *     The firmware uses the timestamp values to set an initial TSF value
+  *        in the MAC for the new association after a reassociation attempt.
+  *  
+  *    @param pmpriv     A pointer to mlan_private structure
+  *    @param ppbuffer   A pointer to command buffer pointer
+  *    @param pbss_desc  A pointer to the BSS Descriptor from the scan table of
+  *                      the AP we are trying to join
+  *  
+  *    @return         bytes added to the buffer
+  */
+static int
+wlan_cmd_append_tsf_tlv(mlan_private * pmriv, t_u8 ** ppbuffer,
+                        BSSDescriptor_t * pbss_desc)
+{
+    MrvlIEtypes_TsfTimestamp_t tsf_tlv;
+    t_u64 tsf_val;
+
+    /* Null Checks */
+    if (ppbuffer == MNULL)
+        return 0;
+    if (*ppbuffer == MNULL)
+        return 0;
+
+    memset(pmriv->adapter, &tsf_tlv, 0x00, sizeof(MrvlIEtypes_TsfTimestamp_t));
+
+    tsf_tlv.header.type = wlan_cpu_to_le16(TLV_TYPE_TSFTIMESTAMP);
+    tsf_tlv.header.len = wlan_cpu_to_le16(2 * sizeof(tsf_val));
+
+    memcpy(pmriv->adapter, *ppbuffer, &tsf_tlv, sizeof(tsf_tlv.header));
+    *ppbuffer += sizeof(tsf_tlv.header);
+
+    /* TSF timestamp from the firmware TSF when the bcn/prb rsp was received */
+    tsf_val = wlan_cpu_to_le64(pbss_desc->network_tsf);
+    memcpy(pmriv->adapter, *ppbuffer, &tsf_val, sizeof(tsf_val));
+    *ppbuffer += sizeof(tsf_val);
+
+    memcpy(pmriv->adapter, &tsf_val, pbss_desc->time_stamp, sizeof(tsf_val));
+
+    PRINTM(MINFO, "ASSOC: TSF offset calc: %016llx - %016llx\n",
+           tsf_val, pbss_desc->network_tsf);
+
+    memcpy(pmriv->adapter, *ppbuffer, &tsf_val, sizeof(tsf_val));
+    *ppbuffer += sizeof(tsf_val);
+
+    return (sizeof(tsf_tlv.header) + (2 * sizeof(tsf_val)));
+}
+
+/**
+ *  @brief This function finds out the common rates between rate1 and rate2.
+ *
+ *  It will fill common rates in rate1 as output if found.
+ *
+ *  NOTE: Setting the MSB of the basic rates needs to be taken
+ *   care of, either before or after calling this function
+ *
+ *  @param pmpriv      A pointer to mlan_private structure
+ *  @param rate1       the buffer which keeps input and output
+ *  @param rate1_size  the size of rate1 buffer
+ *  @param rate2       the buffer which keeps rate2
+ *  @param rate2_size  the size of rate2 buffer.
+ *
+ *  @return            MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_get_common_rates(IN mlan_private * pmpriv,
+                      IN t_u8 * rate1,
+                      IN t_u32 rate1_size, IN t_u8 * rate2, IN t_u32 rate2_size)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_callbacks *pcb = (mlan_callbacks *) & pmpriv->adapter->callbacks;
+    t_u8 *ptr = rate1;
+    t_u8 *tmp = MNULL;
+    t_u32 i, j;
+
+    ENTER();
+
+    ret =
+        pcb->moal_malloc(pmpriv->adapter->pmoal_handle, rate1_size,
+                         MLAN_MEM_DEF, &tmp);
+    if (ret != MLAN_STATUS_SUCCESS || !tmp) {
+        PRINTM(MERROR, "Failed to allocate buffer\n");
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    memcpy(pmpriv->adapter, tmp, rate1, rate1_size);
+    memset(pmpriv->adapter, rate1, 0, rate1_size);
+
+    for (i = 0; rate2[i] && i < rate2_size; i++) {
+        for (j = 0; tmp[j] && j < rate1_size; j++) {
+            /* Check common rate, excluding the bit for basic rate */
+            if ((rate2[i] & 0x7F) == (tmp[j] & 0x7F)) {
+                *rate1++ = tmp[j];
+                break;
+            }
+        }
+    }
+
+    HEXDUMP("rate1 (AP) Rates", tmp, rate1_size);
+    HEXDUMP("rate2 (Card) Rates", rate2, rate2_size);
+    HEXDUMP("Common Rates", ptr, rate1 - ptr);
+    PRINTM(MINFO, "Tx DataRate is set to 0x%X\n", pmpriv->data_rate);
+
+    if (!pmpriv->is_data_rate_auto) {
+        while (*ptr) {
+            if ((*ptr & 0x7f) == pmpriv->data_rate) {
+                ret = MLAN_STATUS_SUCCESS;
+                goto done;
+            }
+            ptr++;
+        }
+        PRINTM(MMSG, "Previously set fixed data rate %#x is not "
+               "compatible with the network\n", pmpriv->data_rate);
+
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    ret = MLAN_STATUS_SUCCESS;
+  done:
+    if (tmp)
+        pcb->moal_mfree(pmpriv->adapter->pmoal_handle, tmp);
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Create the intersection of the rates supported by a target BSS and
+ *         our pmadapter settings for use in an assoc/join command.
+ *
+ *  @param pmpriv           A pointer to mlan_private structure
+ *  @param pbss_desc        BSS Descriptor whose rates are used in the setup
+ *  @param pout_rates       Output: Octet array of rates common between the BSS
+ *                          and the pmadapter supported rates settings
+ *  @param pout_rates_size  Output: Number of rates/octets set in pout_rates
+ *
+ *  @return                 MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_setup_rates_from_bssdesc(IN mlan_private * pmpriv,
+                              IN BSSDescriptor_t * pbss_desc,
+                              OUT t_u8 * pout_rates,
+                              OUT t_u32 * pout_rates_size)
+{
+    t_u8 card_rates[WLAN_SUPPORTED_RATES];
+    t_u32 card_rates_size = 0;
+    ENTER();
+    /* Copy AP supported rates */
+    memcpy(pmpriv->adapter, pout_rates, pbss_desc->supported_rates,
+           WLAN_SUPPORTED_RATES);
+    /* Get the STA supported rates */
+    card_rates_size = wlan_get_active_data_rates(pmpriv, pmpriv->bss_mode,
+                                                 pmpriv->adapter->config_bands,
+                                                 card_rates);
+    /* Get the common rates between AP and STA supported rates */
+    if (wlan_get_common_rates(pmpriv, pout_rates, WLAN_SUPPORTED_RATES,
+                              card_rates, card_rates_size)) {
+        *pout_rates_size = 0;
+        PRINTM(MERROR, "wlan_get_common_rates failed\n");
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+
+    *pout_rates_size =
+        MIN(wlan_strlen((char *) pout_rates), WLAN_SUPPORTED_RATES);
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief Update the scan entry TSF timestamps to reflect a new association
+ *
+ *  @param pmpriv        A pointer to mlan_private structure
+ *  @param pnew_bss_desc A pointer to the newly associated AP's scan table entry
+ *
+ *  @return              N/A
+ */
+static t_void
+wlan_update_tsf_timestamps(IN mlan_private * pmpriv,
+                           IN BSSDescriptor_t * pnew_bss_desc)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    t_u32 table_idx;
+    t_u64 new_tsf_base;
+    t_s64 tsf_delta;
+
+    ENTER();
+
+    memcpy(pmpriv->adapter, &new_tsf_base, pnew_bss_desc->time_stamp,
+           sizeof(new_tsf_base));
+
+    tsf_delta = new_tsf_base - pnew_bss_desc->network_tsf;
+
+    PRINTM(MINFO, "TSF: Update TSF timestamps, 0x%016llx -> 0x%016llx\n",
+           pnew_bss_desc->network_tsf, new_tsf_base);
+
+    for (table_idx = 0; table_idx < pmadapter->num_in_scan_table; table_idx++) {
+        pmadapter->pscan_table[table_idx].network_tsf += tsf_delta;
+    }
+
+    LEAVE();
+}
+
+/**
+ *  @brief Append a wapi IE 
+ *
+ *  This function is called from the network join command prep. routine. 
+ *    If the IE buffer has been setup by the application, this routine appends
+ *    the buffer as a wapi TLV type to the request.
+ *
+ *  @param priv     A pointer to mlan_private structure
+ *  @param ppBuffer pointer to command buffer pointer
+ *
+ *  @return         bytes added to the buffer
+ */
+static int
+wlan_cmd_append_wapi_ie(mlan_private * priv, t_u8 ** ppBuffer)
+{
+    int retLen = 0;
+    MrvlIEtypesHeader_t ie_header;
+
+    /* Null Checks */
+    if (ppBuffer == MNULL)
+        return 0;
+    if (*ppBuffer == MNULL)
+        return 0;
+
+    /* 
+     * If there is a wapi ie buffer setup, append it to the return
+     *   parameter buffer pointer.
+     */
+    if (priv->wapi_ie_len) {
+        PRINTM(MCMND, "append wapi ie %d to %p\n", priv->wapi_ie_len,
+               *ppBuffer);
+
+        /* Wrap the generic IE buffer with a pass through TLV type */
+        ie_header.type = wlan_cpu_to_le16(TLV_TYPE_WAPI_IE);
+        ie_header.len = wlan_cpu_to_le16(priv->wapi_ie_len);
+        memcpy(priv->adapter, *ppBuffer, &ie_header, sizeof(ie_header));
+
+        /* Increment the return size and the return buffer pointer param */
+        *ppBuffer += sizeof(ie_header);
+        retLen += sizeof(ie_header);
+
+        /* Copy the wapi IE buffer to the output buffer, advance pointer */
+        memcpy(priv->adapter, *ppBuffer, priv->wapi_ie, priv->wapi_ie_len);
+
+        /* Increment the return size and the return buffer pointer param */
+        *ppBuffer += priv->wapi_ie_len;
+        retLen += priv->wapi_ie_len;
+
+    }
+    /* return the length appended to the buffer */
+    return retLen;
+}
+
+/********************************************************
+                Global Functions
+********************************************************/
+/**
+ *  @brief This function prepares command of association.
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *  @param pdata_buf    A pointer cast of BSSDescriptor_t from the 
+ *                        scan table to assoc
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_cmd_802_11_associate(IN mlan_private * pmpriv,
+                          IN HostCmd_DS_COMMAND * cmd, IN t_void * pdata_buf)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    HostCmd_DS_802_11_ASSOCIATE *passo = &cmd->params.associate;
+    BSSDescriptor_t *pbss_desc;
+    MrvlIEtypes_SsIdParamSet_t *pssid_tlv;
+    MrvlIEtypes_PhyParamSet_t *pphy_tlv;
+    MrvlIEtypes_SsParamSet_t *pss_tlv;
+    MrvlIEtypes_RatesParamSet_t *prates_tlv;
+    MrvlIEtypes_AuthType_t *pauth_tlv;
+    MrvlIEtypes_RsnParamSet_t *prsn_ie_tlv;
+    MrvlIEtypes_ChanListParamSet_t *pchan_tlv;
+    WLAN_802_11_RATES rates;
+    t_u32 rates_size;
+    t_u16 tmp_cap;
+    t_u8 *pos;
+
+    ENTER();
+
+    pbss_desc = (BSSDescriptor_t *) pdata_buf;
+    pos = (t_u8 *) passo;
+
+    wlan_cfg_tx_buf(pmpriv, pbss_desc);
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_802_11_ASSOCIATE);
+
+    /* Save so we know which BSS Desc to use in the response handler */
+    pmpriv->pattempted_bss_desc = pbss_desc;
+
+    memcpy(pmadapter, passo->peer_sta_addr,
+           pbss_desc->mac_address, sizeof(passo->peer_sta_addr));
+    pos += sizeof(passo->peer_sta_addr);
+
+    /* Set the listen interval */
+    passo->listen_interval = wlan_cpu_to_le16(pmpriv->listen_interval);
+    /* Set the beacon period */
+    passo->beacon_period = wlan_cpu_to_le16(pbss_desc->beacon_period);
+
+    pos += sizeof(passo->cap_info);
+    pos += sizeof(passo->listen_interval);
+    pos += sizeof(passo->beacon_period);
+    pos += sizeof(passo->dtim_period);
+
+    pssid_tlv = (MrvlIEtypes_SsIdParamSet_t *) pos;
+    pssid_tlv->header.type = wlan_cpu_to_le16(TLV_TYPE_SSID);
+    pssid_tlv->header.len = (t_u16) pbss_desc->ssid.ssid_len;
+    memcpy(pmadapter, pssid_tlv->ssid, pbss_desc->ssid.ssid,
+           pssid_tlv->header.len);
+    pos += sizeof(pssid_tlv->header) + pssid_tlv->header.len;
+    pssid_tlv->header.len = wlan_cpu_to_le16(pssid_tlv->header.len);
+
+    pphy_tlv = (MrvlIEtypes_PhyParamSet_t *) pos;
+    pphy_tlv->header.type = wlan_cpu_to_le16(TLV_TYPE_PHY_DS);
+    pphy_tlv->header.len = sizeof(pphy_tlv->fh_ds.ds_param_set);
+    memcpy(pmadapter, &pphy_tlv->fh_ds.ds_param_set,
+           &pbss_desc->phy_param_set.ds_param_set.current_chan,
+           sizeof(pphy_tlv->fh_ds.ds_param_set));
+    pos += sizeof(pphy_tlv->header) + pphy_tlv->header.len;
+    pphy_tlv->header.len = wlan_cpu_to_le16(pphy_tlv->header.len);
+
+    pss_tlv = (MrvlIEtypes_SsParamSet_t *) pos;
+    pss_tlv->header.type = wlan_cpu_to_le16(TLV_TYPE_CF);
+    pss_tlv->header.len = sizeof(pss_tlv->cf_ibss.cf_param_set);
+    pos += sizeof(pss_tlv->header) + pss_tlv->header.len;
+    pss_tlv->header.len = wlan_cpu_to_le16(pss_tlv->header.len);
+
+    /* Get the common rates supported between the driver and the BSS Desc */
+    if (wlan_setup_rates_from_bssdesc(pmpriv, pbss_desc, rates, &rates_size)) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* Save the data rates into Current BSS state structure */
+    pmpriv->curr_bss_params.num_of_rates = rates_size;
+    memcpy(pmadapter, &pmpriv->curr_bss_params.data_rates, rates, rates_size);
+
+    /* Setup the Rates TLV in the association command */
+    prates_tlv = (MrvlIEtypes_RatesParamSet_t *) pos;
+    prates_tlv->header.type = wlan_cpu_to_le16(TLV_TYPE_RATES);
+    prates_tlv->header.len = wlan_cpu_to_le16((t_u16) rates_size);
+    memcpy(pmadapter, prates_tlv->rates, rates, rates_size);
+    pos += sizeof(prates_tlv->header) + rates_size;
+    PRINTM(MINFO, "ASSOC_CMD: Rates size = %d\n", rates_size);
+
+    /* Add the Authentication type to be used for Auth frames if needed */
+    if (pmpriv->sec_info.authentication_mode != MLAN_AUTH_MODE_AUTO) {
+        pauth_tlv = (MrvlIEtypes_AuthType_t *) pos;
+        pauth_tlv->header.type = wlan_cpu_to_le16(TLV_TYPE_AUTH_TYPE);
+        pauth_tlv->header.len = sizeof(pauth_tlv->auth_type);
+        if (pmpriv->sec_info.wep_status == Wlan802_11WEPEnabled)
+            pauth_tlv->auth_type =
+                wlan_cpu_to_le16((t_u16) pmpriv->sec_info.authentication_mode);
+        else
+            pauth_tlv->auth_type = wlan_cpu_to_le16(MLAN_AUTH_MODE_OPEN);
+        pos += sizeof(pauth_tlv->header) + pauth_tlv->header.len;
+        pauth_tlv->header.len = wlan_cpu_to_le16(pauth_tlv->header.len);
+    }
+
+    if (IS_SUPPORT_MULTI_BANDS(pmadapter)
+        && (pbss_desc->bss_band & pmadapter->config_bands)
+        && !(ISSUPP_11NENABLED(pmadapter->fw_cap_info)
+             && (!pbss_desc->disable_11n)
+             && (pmadapter->config_bands & BAND_GN
+                 || pmadapter->config_bands & BAND_AN)
+             && (pbss_desc->pht_cap)
+        )
+        ) {
+        /* Append a channel TLV for the channel the attempted AP was found on */
+        pchan_tlv = (MrvlIEtypes_ChanListParamSet_t *) pos;
+        pchan_tlv->header.type = wlan_cpu_to_le16(TLV_TYPE_CHANLIST);
+        pchan_tlv->header.len = wlan_cpu_to_le16(sizeof(ChanScanParamSet_t));
+
+        memset(pmadapter, pchan_tlv->chan_scan_param, 0x00,
+               sizeof(ChanScanParamSet_t));
+        pchan_tlv->chan_scan_param[0].chan_number =
+            (pbss_desc->phy_param_set.ds_param_set.current_chan);
+        PRINTM(MINFO, "Assoc: TLV Chan = %d\n",
+               pchan_tlv->chan_scan_param[0].chan_number);
+
+        pchan_tlv->chan_scan_param[0].radio_type =
+            wlan_band_to_radio_type((t_u8) pbss_desc->bss_band);
+
+        PRINTM(MINFO, "Assoc: TLV Band = %d\n",
+               pchan_tlv->chan_scan_param[0].radio_type);
+        pos += sizeof(pchan_tlv->header) + sizeof(ChanScanParamSet_t);
+    }
+    if (!pmpriv->wps.session_enable) {
+        if ((pmpriv->sec_info.wpa_enabled || pmpriv->sec_info.wpa2_enabled)) {
+            prsn_ie_tlv = (MrvlIEtypes_RsnParamSet_t *) pos;
+            prsn_ie_tlv->header.type = (t_u16) pmpriv->wpa_ie[0];       /* WPA_IE 
+                                                                           or
+                                                                           RSN_IE 
+                                                                         */
+            prsn_ie_tlv->header.type = prsn_ie_tlv->header.type & 0x00FF;
+            prsn_ie_tlv->header.type =
+                wlan_cpu_to_le16(prsn_ie_tlv->header.type);
+            prsn_ie_tlv->header.len = (t_u16) pmpriv->wpa_ie[1];
+            prsn_ie_tlv->header.len = prsn_ie_tlv->header.len & 0x00FF;
+            if (prsn_ie_tlv->header.len <= (sizeof(pmpriv->wpa_ie) - 2))
+                memcpy(pmadapter, prsn_ie_tlv->rsn_ie, &pmpriv->wpa_ie[2],
+                       prsn_ie_tlv->header.len);
+            else {
+                ret = MLAN_STATUS_FAILURE;
+                goto done;
+            }
+            HEXDUMP("ASSOC_CMD: RSN IE", (t_u8 *) prsn_ie_tlv,
+                    sizeof(prsn_ie_tlv->header) + prsn_ie_tlv->header.len);
+            pos += sizeof(prsn_ie_tlv->header) + prsn_ie_tlv->header.len;
+            prsn_ie_tlv->header.len = wlan_cpu_to_le16(prsn_ie_tlv->header.len);
+        } else if (pmpriv->sec_info.ewpa_enabled) {
+            prsn_ie_tlv = (MrvlIEtypes_RsnParamSet_t *) pos;
+            if (pbss_desc->pwpa_ie) {
+                prsn_ie_tlv->header.type =
+                    (t_u16) (*(pbss_desc->pwpa_ie)).vend_hdr.element_id;
+                prsn_ie_tlv->header.type = prsn_ie_tlv->header.type & 0x00FF;
+                prsn_ie_tlv->header.type =
+                    wlan_cpu_to_le16(prsn_ie_tlv->header.type);
+                prsn_ie_tlv->header.len =
+                    (t_u16) (*(pbss_desc->pwpa_ie)).vend_hdr.len;
+                prsn_ie_tlv->header.len = prsn_ie_tlv->header.len & 0x00FF;
+                if (prsn_ie_tlv->header.len <= (sizeof(pmpriv->wpa_ie))) {
+                    memcpy(pmadapter, prsn_ie_tlv->rsn_ie,
+                           &((*(pbss_desc->pwpa_ie)).vend_hdr.oui[0]),
+                           prsn_ie_tlv->header.len);
+                } else {
+                    ret = MLAN_STATUS_FAILURE;
+                    goto done;
+                }
+
+                HEXDUMP("ASSOC_CMD: RSN IE", (t_u8 *) prsn_ie_tlv,
+                        sizeof(prsn_ie_tlv->header) + prsn_ie_tlv->header.len);
+                pos += sizeof(prsn_ie_tlv->header) + prsn_ie_tlv->header.len;
+                prsn_ie_tlv->header.len =
+                    wlan_cpu_to_le16(prsn_ie_tlv->header.len);
+            }
+            if (pbss_desc->prsn_ie) {
+                prsn_ie_tlv = (MrvlIEtypes_RsnParamSet_t *) pos;
+                prsn_ie_tlv->header.type =
+                    (t_u16) (*(pbss_desc->prsn_ie)).ieee_hdr.element_id;
+                prsn_ie_tlv->header.type = prsn_ie_tlv->header.type & 0x00FF;
+                prsn_ie_tlv->header.type =
+                    wlan_cpu_to_le16(prsn_ie_tlv->header.type);
+                prsn_ie_tlv->header.len =
+                    (t_u16) (*(pbss_desc->prsn_ie)).ieee_hdr.len;
+                prsn_ie_tlv->header.len = prsn_ie_tlv->header.len & 0x00FF;
+                if (prsn_ie_tlv->header.len <= (sizeof(pmpriv->wpa_ie))) {
+                    memcpy(pmadapter, prsn_ie_tlv->rsn_ie,
+                           &((*(pbss_desc->prsn_ie)).data[0])
+                           , prsn_ie_tlv->header.len);
+                } else {
+                    ret = MLAN_STATUS_FAILURE;
+                    goto done;
+                }
+
+                HEXDUMP("ASSOC_CMD: RSN IE", (t_u8 *) prsn_ie_tlv,
+                        sizeof(prsn_ie_tlv->header) + prsn_ie_tlv->header.len);
+                pos += sizeof(prsn_ie_tlv->header) + prsn_ie_tlv->header.len;
+                prsn_ie_tlv->header.len =
+                    wlan_cpu_to_le16(prsn_ie_tlv->header.len);
+            }
+        }
+    }
+
+    if (ISSUPP_11NENABLED(pmadapter->fw_cap_info)
+        && (!pbss_desc->disable_11n)
+        && (pmadapter->config_bands & BAND_GN
+            || pmadapter->config_bands & BAND_AN))
+        wlan_cmd_append_11n_tlv(pmpriv, pbss_desc, &pos);
+
+    wlan_wmm_process_association_req(pmpriv, &pos, &pbss_desc->wmm_ie,
+                                     pbss_desc->pht_cap);
+    if (pmpriv->sec_info.wapi_enabled && pmpriv->wapi_ie_len) {
+        wlan_cmd_append_wapi_ie(pmpriv, &pos);
+    }
+
+    wlan_cmd_append_generic_ie(pmpriv, &pos);
+
+    wlan_cmd_append_tsf_tlv(pmpriv, &pos, pbss_desc);
+
+    if (wlan_11d_create_dnld_countryinfo(pmpriv, (t_u8) pbss_desc->bss_band)) {
+        PRINTM(MERROR, "Dnld_countryinfo_11d failed\n");
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+    if (wlan_11d_parse_dnld_countryinfo(pmpriv, pmpriv->pattempted_bss_desc)) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* 
+     * Call 11h join API after capability bits are set so adhoc/infra 11h
+     * behavior can be properly triggered.  pos modified if data is appended
+     */
+    wlan_11h_process_join(pmpriv, &pos, &passo->cap_info,
+                          (t_u8) pbss_desc->bss_band,
+                          pbss_desc->phy_param_set.ds_param_set.current_chan,
+                          &pbss_desc->wlan_11h_bss_info);
+
+    cmd->size = wlan_cpu_to_le16((t_u16) (pos - (t_u8 *) passo) + S_DS_GEN);
+
+    /* Set the Capability info at last */
+    memcpy(pmadapter, &tmp_cap, &pbss_desc->cap_info, sizeof(passo->cap_info));
+
+    if (pmadapter->config_bands == BAND_B) {
+        SHORT_SLOT_TIME_DISABLED(tmp_cap);
+    }
+
+    tmp_cap &= CAPINFO_MASK;
+    PRINTM(MINFO, "ASSOC_CMD: tmp_cap=%4X CAPINFO_MASK=%4lX\n",
+           tmp_cap, CAPINFO_MASK);
+    tmp_cap = wlan_cpu_to_le16(tmp_cap);
+    memcpy(pmadapter, &passo->cap_info, &tmp_cap, sizeof(passo->cap_info));
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Association firmware command response handler
+ *
+ *   The response buffer for the association command has the following
+ *      memory layout.
+ *
+ *   For cases where an association response was not received (indicated
+ *      by the CapInfo and AId field):
+ *
+ *     .------------------------------------------------------------.
+ *     |  Header(4 * sizeof(t_u16)):  Standard command response hdr |
+ *     .------------------------------------------------------------.
+ *     |  cap_info/Error Return(t_u16):                             |
+ *     |           0xFFFF(-1): Internal error for association       |
+ *     |           0xFFFE(-2): Authentication unhandled message     |
+ *     |           0xFFFD(-3): Authentication refused               |
+ *     |           0xFFFC(-4): Timeout waiting for AP response      |
+ *     |           0xFFFB(-5): Internal error for authentication    |
+ *     .------------------------------------------------------------.
+ *     |  status_code(t_u16):                                       |
+ *     |        If cap_info is -1:                                  |
+ *     |           An internal firmware failure prevented the       |
+ *     |           command from being processed. The status code    |
+ *     |           is 6 if associate response parameter invlaid,    |
+ *     |           1 otherwise.                                     |
+ *     |                                                            |
+ *     |        If cap_info is -2:                                  |
+ *     |           An authentication frame was received but was     |
+ *     |           not handled by the firmware. IEEE Status code    |
+ *     |           for the failure is returned.                     |
+ *     |                                                            |
+ *     |        If cap_info is -3:                                  |
+ *     |           An authentication frame was received and the     |
+ *     |           status_code is the IEEE Status reported in the   |
+ *     |           response.                                        |
+ *     |                                                            |
+ *     |        If cap_info is -4:                                  |
+ *     |           (1) Association response timeout                 |
+ *     |           (2) Authentication response timeout              |
+ *     |                                                            |
+ *     |        If cap_info is -5:                                  |
+ *     |           An internal firmware failure prevented the       |
+ *     |           command from being processed. The status code    |
+ *     |           is 6 if authentication parameter invlaid,        |
+ *     |           1 otherwise.                                     |
+ *     .------------------------------------------------------------.
+ *     |  a_id(t_u16): 0xFFFF                                       |
+ *     .------------------------------------------------------------.
+ *
+ *
+ *   For cases where an association response was received, the IEEE 
+ *     standard association response frame is returned:
+ *
+ *     .------------------------------------------------------------.
+ *     |  Header(4 * sizeof(t_u16)):  Standard command response hdr |
+ *     .------------------------------------------------------------.
+ *     |  cap_info(t_u16): IEEE Capability                          |
+ *     .------------------------------------------------------------.
+ *     |  status_code(t_u16): IEEE Status Code                      |
+ *     .------------------------------------------------------------.
+ *     |  a_id(t_u16): IEEE Association ID                          |
+ *     .------------------------------------------------------------.
+ *     |  IEEE IEs(variable): Any received IEs comprising the       |
+ *     |                      remaining portion of a received       |
+ *     |                      association response frame.           |
+ *     .------------------------------------------------------------.
+ *
+ *  For simplistic handling, the status_code field can be used to determine
+ *    an association success (0) or failure (non-zero).
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_ret_802_11_associate(IN mlan_private * pmpriv,
+                          IN HostCmd_DS_COMMAND * resp, IN t_void * pioctl_buf)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ioctl_req *pioctl_req = (mlan_ioctl_req *) pioctl_buf;
+    IEEEtypes_AssocRsp_t *passoc_rsp;
+    BSSDescriptor_t *pbss_desc;
+    t_u8 enable_data = MTRUE;
+    t_u8 event_buf[100];
+    mlan_event *pevent = (mlan_event *) event_buf;
+
+    ENTER();
+
+    passoc_rsp = (IEEEtypes_AssocRsp_t *) & resp->params;
+    passoc_rsp->status_code = wlan_le16_to_cpu(passoc_rsp->status_code);
+
+    HEXDUMP("ASSOC_RESP:", (t_u8 *) & resp->params, (resp->size - S_DS_GEN));
+
+    pmpriv->assoc_rsp_size = MIN(resp->size - S_DS_GEN,
+                                 sizeof(pmpriv->assoc_rsp_buf));
+
+    memcpy(pmpriv->adapter, pmpriv->assoc_rsp_buf, &resp->params,
+           pmpriv->assoc_rsp_size);
+
+    if (passoc_rsp->status_code) {
+        pmpriv->adapter->dbg.num_cmd_assoc_failure++;
+        PRINTM(MERROR, "ASSOC_RESP: Association Failed, "
+               "status code = %d, error = 0x%x, a_id = 0x%x\n",
+               wlan_le16_to_cpu(passoc_rsp->status_code),
+               wlan_le16_to_cpu(*(t_u16 *) & passoc_rsp->capability),
+               wlan_le16_to_cpu(passoc_rsp->a_id));
+
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* Send a Media Connected event, according to the Spec */
+    pmpriv->media_connected = MTRUE;
+
+    pmpriv->adapter->pps_uapsd_mode = MFALSE;
+    pmpriv->adapter->tx_lock_flag = MFALSE;
+    pmpriv->adapter->delay_null_pkt = MFALSE;
+
+    /* Set the attempted BSSID Index to current */
+    pbss_desc = pmpriv->pattempted_bss_desc;
+
+    PRINTM(MINFO, "ASSOC_RESP: %s\n", pbss_desc->ssid.ssid);
+
+    /* Make a copy of current BSSID descriptor */
+    memcpy(pmpriv->adapter, &pmpriv->curr_bss_params.bss_descriptor,
+           pbss_desc, sizeof(BSSDescriptor_t));
+
+    /* Update curr_bss_params */
+    pmpriv->curr_bss_params.bss_descriptor.channel
+        = pbss_desc->phy_param_set.ds_param_set.current_chan;
+
+    pmpriv->curr_bss_params.band = (t_u8) pbss_desc->bss_band;
+
+    /* 
+     * Adjust the timestamps in the scan table to be relative to the newly
+     * associated AP's TSF
+     */
+    wlan_update_tsf_timestamps(pmpriv, pbss_desc);
+
+    if (pbss_desc->wmm_ie.vend_hdr.element_id == WMM_IE)
+        pmpriv->curr_bss_params.wmm_enabled = MTRUE;
+    else
+        pmpriv->curr_bss_params.wmm_enabled = MFALSE;
+
+    if ((pmpriv->wmm_required
+         || (pbss_desc->pht_cap &&
+             (pbss_desc->pht_cap->ieee_hdr.element_id == HT_CAPABILITY))
+        ) && pmpriv->curr_bss_params.wmm_enabled)
+        pmpriv->wmm_enabled = MTRUE;
+    else
+        pmpriv->wmm_enabled = MFALSE;
+
+    pmpriv->curr_bss_params.wmm_uapsd_enabled = MFALSE;
+
+    if (pmpriv->wmm_enabled == MTRUE)
+        pmpriv->curr_bss_params.wmm_uapsd_enabled
+            = pbss_desc->wmm_ie.qos_info.qos_uapsd;
+
+    PRINTM(MINFO, "ASSOC_RESP: curr_pkt_filter is 0x%x\n",
+           pmpriv->curr_pkt_filter);
+    if (pmpriv->sec_info.wpa_enabled || pmpriv->sec_info.wpa2_enabled)
+        pmpriv->wpa_is_gtk_set = MFALSE;
+
+    if (pmpriv->wmm_enabled)
+        /* Don't re-enable carrier until we get the WMM_GET_STATUS event */
+        enable_data = MFALSE;
+    else
+        /* Since WMM is not enabled, setup the queues with the defaults */
+        wlan_wmm_setup_queues(pmpriv);
+
+    if (enable_data) {
+        PRINTM(MINFO, "Post association, re-enabling data flow\n");
+    }
+
+    /* Reset SNR/NF/RSSI values */
+    pmpriv->data_rssi_last = 0;
+    pmpriv->data_nf_last = 0;
+    pmpriv->data_rssi_avg = 0;
+    pmpriv->data_nf_avg = 0;
+    pmpriv->bcn_rssi_last = 0;
+    pmpriv->bcn_nf_last = 0;
+    pmpriv->bcn_rssi_avg = 0;
+    pmpriv->bcn_nf_avg = 0;
+    pmpriv->rxpd_rate = 0;
+    pmpriv->rxpd_htinfo = 0;
+
+    wlan_save_curr_bcn(pmpriv);
+
+    pmpriv->adapter->dbg.num_cmd_assoc_success++;
+
+    PRINTM(MINFO, "ASSOC_RESP: Associated\n");
+    pevent->bss_index = pmpriv->bss_index;
+    pevent->event_id = MLAN_EVENT_ID_DRV_CONNECTED;
+    pevent->event_len = MLAN_MAC_ADDR_LENGTH;
+    memcpy(pmpriv->adapter, (t_u8 *) pevent->event_buf,
+           (t_u8 *) pmpriv->curr_bss_params.bss_descriptor.mac_address,
+           MLAN_MAC_ADDR_LENGTH);
+
+    /* Add the ra_list here for infra mode as there will be only 1 ra always */
+    wlan_ralist_add(pmpriv, pmpriv->curr_bss_params.bss_descriptor.mac_address);
+
+    wlan_recv_event(pmpriv, MLAN_EVENT_ID_DRV_CONNECTED, pevent);
+
+    /* Send OBSS scan param to the application if available */
+    wlan_2040_coex_event(pmpriv);
+
+    if (!pmpriv->sec_info.wpa_enabled
+        && !pmpriv->sec_info.wpa2_enabled
+        && !pmpriv->sec_info.ewpa_enabled && !pmpriv->sec_info.wapi_enabled) {
+        /* We are in Open/WEP mode, open port immediately */
+        if (pmpriv->port_ctrl_mode == MTRUE) {
+            pmpriv->port_open = MTRUE;
+            PRINTM(MINFO, "ASSOC_RESP: port_status = OPEN\n");
+        }
+    }
+
+    if (pmpriv->sec_info.wpa_enabled
+        || pmpriv->sec_info.wpa2_enabled
+        || pmpriv->sec_info.ewpa_enabled || pmpriv->sec_info.wapi_enabled)
+        pmpriv->scan_block = MTRUE;
+
+  done:
+    /* Need to indicate IOCTL complete */
+    if (pioctl_req != MNULL) {
+        if (ret != MLAN_STATUS_SUCCESS) {
+            if (passoc_rsp->status_code)
+                pioctl_req->status_code =
+                    wlan_le16_to_cpu(passoc_rsp->status_code);
+            else
+                pioctl_req->status_code = MLAN_ERROR_CMD_ASSOC_FAIL;
+        } else {
+            pioctl_req->status_code = MLAN_ERROR_NO_ERROR;
+        }
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function prepares command of ad_hoc_start.
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *  @param pdata_buf    A pointer cast of mlan_802_11_ssid structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_cmd_802_11_ad_hoc_start(IN mlan_private * pmpriv,
+                             IN HostCmd_DS_COMMAND * cmd, IN t_void * pdata_buf)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    HostCmd_DS_802_11_AD_HOC_START *padhoc_start = &cmd->params.adhoc_start;
+    BSSDescriptor_t *pbss_desc;
+    t_u32 cmd_append_size = 0;
+    t_u32 i;
+    t_u16 tmp_cap;
+    MrvlIEtypes_ChanListParamSet_t *pchan_tlv;
+
+    MrvlIEtypes_RsnParamSet_t *prsn_ie_tlv;
+    MrvlIETypes_HTCap_t *pht_cap;
+    MrvlIETypes_HTInfo_t *pht_info;
+    /* wpa ie for WPA_NONE AES */
+    const t_u8 wpa_ie[24] = { 0xdd, 0x16, 0x00, 0x50, 0xf2, 0x01, 0x01, 0x00,
+        0x00, 0x50, 0xf2, 0x04, 0x01, 0x00, 0x00, 0x50,
+        0xf2, 0x00, 0x01, 0x00, 0x00, 0x50, 0xf2, 0x00
+    };
+    t_s32 append_size_11h = 0;
+    t_u8 *pos = (t_u8 *) padhoc_start + sizeof(HostCmd_DS_802_11_AD_HOC_START);
+
+    ENTER();
+
+    if (!pmadapter) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_802_11_AD_HOC_START);
+
+    pbss_desc = &pmpriv->curr_bss_params.bss_descriptor;
+    pmpriv->pattempted_bss_desc = pbss_desc;
+
+    /* 
+     * Fill in the parameters for 2 data structures:
+     *   1. HostCmd_DS_802_11_AD_HOC_START command
+     *   2. pbss_desc
+     * Driver will fill up SSID, bss_mode,IBSS param, Physical Param,
+     * probe delay, and Cap info.
+     * Firmware will fill up beacon period, Basic rates
+     * and operational rates.
+     */
+
+    memset(pmadapter, padhoc_start->ssid, 0, MLAN_MAX_SSID_LENGTH);
+
+    memcpy(pmadapter, padhoc_start->ssid,
+           ((mlan_802_11_ssid *) pdata_buf)->ssid,
+           ((mlan_802_11_ssid *) pdata_buf)->ssid_len);
+
+    PRINTM(MINFO, "ADHOC_S_CMD: SSID = %s\n", padhoc_start->ssid);
+
+    memset(pmadapter, pbss_desc->ssid.ssid, 0, MLAN_MAX_SSID_LENGTH);
+    memcpy(pmadapter, pbss_desc->ssid.ssid,
+           ((mlan_802_11_ssid *) pdata_buf)->ssid,
+           ((mlan_802_11_ssid *) pdata_buf)->ssid_len);
+
+    pbss_desc->ssid.ssid_len = ((mlan_802_11_ssid *) pdata_buf)->ssid_len;
+
+    /* Set the BSS mode */
+    padhoc_start->bss_mode = HostCmd_BSS_MODE_IBSS;
+    pbss_desc->bss_mode = MLAN_BSS_MODE_IBSS;
+    padhoc_start->beacon_period = wlan_cpu_to_le16(pmpriv->beacon_period);
+    pbss_desc->beacon_period = pmpriv->beacon_period;
+
+    /* Set Physical param set */
+/** Parameter IE Id */
+#define DS_PARA_IE_ID   3
+/** Parameter IE length */
+#define DS_PARA_IE_LEN  1
+
+    padhoc_start->phy_param_set.ds_param_set.element_id = DS_PARA_IE_ID;
+    padhoc_start->phy_param_set.ds_param_set.len = DS_PARA_IE_LEN;
+
+    if (!wlan_get_cfp_by_band_and_channel
+        (pmadapter, pmadapter->adhoc_start_band, (t_u16) pmpriv->adhoc_channel,
+         pmadapter->region_channel)) {
+
+        chan_freq_power_t *cfp;
+        cfp =
+            wlan_get_cfp_by_band_and_channel(pmadapter,
+                                             pmadapter->adhoc_start_band,
+                                             FIRST_VALID_CHANNEL,
+                                             pmadapter->region_channel);
+        if (cfp)
+            pmpriv->adhoc_channel = (t_u8) cfp->channel;
+    }
+
+    MASSERT(pmpriv->adhoc_channel);
+
+    PRINTM(MINFO, "ADHOC_S_CMD: Creating ADHOC on Channel %d\n",
+           pmpriv->adhoc_channel);
+
+    pmpriv->curr_bss_params.bss_descriptor.channel = pmpriv->adhoc_channel;
+    pmpriv->curr_bss_params.band = pmadapter->adhoc_start_band;
+
+    pbss_desc->channel = pmpriv->adhoc_channel;
+    padhoc_start->phy_param_set.ds_param_set.current_chan =
+        pmpriv->adhoc_channel;
+
+    memcpy(pmadapter, &pbss_desc->phy_param_set,
+           &padhoc_start->phy_param_set, sizeof(IEEEtypes_PhyParamSet_t));
+
+    pbss_desc->network_type_use = Wlan802_11DS;
+
+    /* Set IBSS param set */
+/** IBSS parameter IE Id */
+#define IBSS_PARA_IE_ID   6
+/** IBSS parameter IE length */
+#define IBSS_PARA_IE_LEN  2
+
+    padhoc_start->ss_param_set.ibss_param_set.element_id = IBSS_PARA_IE_ID;
+    padhoc_start->ss_param_set.ibss_param_set.len = IBSS_PARA_IE_LEN;
+    padhoc_start->ss_param_set.ibss_param_set.atim_window
+        = wlan_cpu_to_le16(pmpriv->atim_window);
+    pbss_desc->atim_window = pmpriv->atim_window;
+    memcpy(pmadapter, &pbss_desc->ss_param_set,
+           &padhoc_start->ss_param_set, sizeof(IEEEtypes_SsParamSet_t));
+
+    /* Set Capability info */
+    padhoc_start->cap.ess = 0;
+    padhoc_start->cap.ibss = 1;
+    pbss_desc->cap_info.ibss = 1;
+
+    /* Set up privacy in pbss_desc */
+    if (pmpriv->sec_info.wep_status == Wlan802_11WEPEnabled
+        || pmpriv->adhoc_aes_enabled
+        || pmpriv->sec_info.wpa_enabled || pmpriv->sec_info.ewpa_enabled) {
+/** Ad-Hoc capability privacy on */
+#define AD_HOC_CAP_PRIVACY_ON   1
+        PRINTM(MINFO, "ADHOC_S_CMD: wep_status set, Privacy to WEP\n");
+        pbss_desc->privacy = Wlan802_11PrivFilter8021xWEP;
+        padhoc_start->cap.privacy = AD_HOC_CAP_PRIVACY_ON;
+    } else {
+        PRINTM(MWARN, "ADHOC_S_CMD: wep_status NOT set, Setting "
+               "Privacy to ACCEPT ALL\n");
+        pbss_desc->privacy = Wlan802_11PrivFilterAcceptAll;
+    }
+
+    memset(pmadapter, padhoc_start->DataRate, 0,
+           sizeof(padhoc_start->DataRate));
+    wlan_get_active_data_rates(pmpriv, pmpriv->bss_mode,
+                               pmadapter->adhoc_start_band,
+                               padhoc_start->DataRate);
+    if ((pmadapter->adhoc_start_band & BAND_G) &&
+        (pmpriv->curr_pkt_filter & HostCmd_ACT_MAC_ADHOC_G_PROTECTION_ON)) {
+        ret =
+            wlan_prepare_cmd(pmpriv, HostCmd_CMD_MAC_CONTROL,
+                             HostCmd_ACT_GEN_SET, 0, MNULL,
+                             &pmpriv->curr_pkt_filter);
+
+        if (ret) {
+            PRINTM(MERROR, "ADHOC_S_CMD: G Protection config failed\n");
+            ret = MLAN_STATUS_FAILURE;
+            goto done;
+        }
+    }
+    /* Find the last non zero */
+    for (i = 0; i < sizeof(padhoc_start->DataRate) && padhoc_start->DataRate[i];
+         i++);
+
+    pmpriv->curr_bss_params.num_of_rates = i;
+
+    /* Copy the ad-hoc creating rates into Current BSS rate structure */
+    memcpy(pmadapter, &pmpriv->curr_bss_params.data_rates,
+           &padhoc_start->DataRate, pmpriv->curr_bss_params.num_of_rates);
+
+    PRINTM(MINFO, "ADHOC_S_CMD: Rates=%02x %02x %02x %02x \n",
+           padhoc_start->DataRate[0], padhoc_start->DataRate[1],
+           padhoc_start->DataRate[2], padhoc_start->DataRate[3]);
+
+    PRINTM(MINFO, "ADHOC_S_CMD: AD HOC Start command is ready\n");
+
+    if (IS_SUPPORT_MULTI_BANDS(pmadapter)) {
+        /* Append a channel TLV */
+        pchan_tlv = (MrvlIEtypes_ChanListParamSet_t *) pos;
+        pchan_tlv->header.type = wlan_cpu_to_le16(TLV_TYPE_CHANLIST);
+        pchan_tlv->header.len = wlan_cpu_to_le16(sizeof(ChanScanParamSet_t));
+
+        memset(pmadapter, pchan_tlv->chan_scan_param, 0x00,
+               sizeof(ChanScanParamSet_t));
+        pchan_tlv->chan_scan_param[0].chan_number =
+            (t_u8) pmpriv->curr_bss_params.bss_descriptor.channel;
+
+        PRINTM(MINFO, "ADHOC_S_CMD: TLV Chan = %d\n",
+               pchan_tlv->chan_scan_param[0].chan_number);
+
+        pchan_tlv->chan_scan_param[0].radio_type
+            = wlan_band_to_radio_type(pmpriv->curr_bss_params.band);
+        if (pmadapter->adhoc_start_band & BAND_GN
+            || pmadapter->adhoc_start_band & BAND_AN) {
+            if (pmadapter->chan_offset == SEC_CHANNEL_ABOVE)
+                pchan_tlv->chan_scan_param[0].radio_type |=
+                    SECOND_CHANNEL_ABOVE;
+            else if (pmadapter->chan_offset == SEC_CHANNEL_BELOW)
+                pchan_tlv->chan_scan_param[0].radio_type |=
+                    SECOND_CHANNEL_BELOW;
+        }
+        PRINTM(MINFO, "ADHOC_S_CMD: TLV Band = %d\n",
+               pchan_tlv->chan_scan_param[0].radio_type);
+        pos += sizeof(pchan_tlv->header) + sizeof(ChanScanParamSet_t);
+        cmd_append_size +=
+            sizeof(pchan_tlv->header) + sizeof(ChanScanParamSet_t);
+    }
+
+    if (wlan_11d_create_dnld_countryinfo(pmpriv, pmpriv->curr_bss_params.band)) {
+        PRINTM(MERROR, "ADHOC_S_CMD: dnld_countryinfo_11d failed\n");
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* 
+     * Call 11h start API to add any 11h flags/elements as TLV parameters
+     */
+    append_size_11h = wlan_11h_process_start(pmpriv, &pos, &padhoc_start->cap,
+                                             pmpriv->adhoc_channel,
+                                             &pbss_desc->wlan_11h_bss_info);
+    if (append_size_11h >= 0)
+        cmd_append_size += append_size_11h;
+    else {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    if (pmpriv->sec_info.ewpa_enabled) {
+        memcpy(pmadapter, pmpriv->wpa_ie, wpa_ie, sizeof(wpa_ie));
+        pmpriv->wpa_ie_len = sizeof(wpa_ie);
+    }
+
+    if (pmpriv->sec_info.wpa_enabled || pmpriv->sec_info.ewpa_enabled) {
+        prsn_ie_tlv = (MrvlIEtypes_RsnParamSet_t *) pos;
+        prsn_ie_tlv->header.type = (t_u16) pmpriv->wpa_ie[0];   /* WPA_IE or
+                                                                   RSN_IE */
+        prsn_ie_tlv->header.type = prsn_ie_tlv->header.type & 0x00FF;
+        prsn_ie_tlv->header.type = wlan_cpu_to_le16(prsn_ie_tlv->header.type);
+        prsn_ie_tlv->header.len = (t_u16) pmpriv->wpa_ie[1];
+        prsn_ie_tlv->header.len = prsn_ie_tlv->header.len & 0x00FF;
+        if (prsn_ie_tlv->header.len <= (sizeof(pmpriv->wpa_ie) - 2))
+            memcpy(pmadapter, prsn_ie_tlv->rsn_ie, &pmpriv->wpa_ie[2],
+                   prsn_ie_tlv->header.len);
+        else {
+            ret = MLAN_STATUS_FAILURE;
+            goto done;
+        }
+
+        DBG_HEXDUMP(MCMD_D, "ADHOC_S_CMD: RSN IE", (t_u8 *) prsn_ie_tlv,
+                    sizeof(prsn_ie_tlv->header) + prsn_ie_tlv->header.len);
+        pos += sizeof(prsn_ie_tlv->header) + prsn_ie_tlv->header.len;
+        cmd_append_size +=
+            sizeof(prsn_ie_tlv->header) + prsn_ie_tlv->header.len;
+        prsn_ie_tlv->header.len = wlan_cpu_to_le16(prsn_ie_tlv->header.len);
+    }
+
+    if (pmadapter->adhoc_11n_enabled == MTRUE) {
+        {
+            pht_cap = (MrvlIETypes_HTCap_t *) pos;
+            memset(pmadapter, pht_cap, 0, sizeof(MrvlIETypes_HTCap_t));
+            pht_cap->header.type = wlan_cpu_to_le16(HT_CAPABILITY);
+            pht_cap->header.len = sizeof(HTCap_t);
+            wlan_fill_ht_cap_tlv(pmpriv, pht_cap);
+            HEXDUMP("ADHOC_START: HT_CAPABILITIES IE", (t_u8 *) pht_cap,
+                    sizeof(MrvlIETypes_HTCap_t));
+            pos += sizeof(MrvlIETypes_HTCap_t);
+            cmd_append_size += sizeof(MrvlIETypes_HTCap_t);
+            pht_cap->header.len = wlan_cpu_to_le16(pht_cap->header.len);
+        }
+        {
+            pht_info = (MrvlIETypes_HTInfo_t *) pos;
+            memset(pmadapter, pht_info, 0, sizeof(MrvlIETypes_HTInfo_t));
+            pht_info->header.type = wlan_cpu_to_le16(HT_OPERATION);
+            pht_info->header.len = sizeof(HTInfo_t);
+            pht_info->ht_info.pri_chan =
+                (t_u8) pmpriv->curr_bss_params.bss_descriptor.channel;
+            if (pmadapter->chan_offset) {
+                pht_info->ht_info.field2 = pmadapter->chan_offset;
+                SET_CHANWIDTH40(pht_info->ht_info.field2);
+            }
+            pht_info->ht_info.field3 = NON_GREENFIELD_STAS;
+            pht_info->ht_info.basic_mcs_set[0] = 0xff;
+            HEXDUMP("ADHOC_START: HT_INFORMATION IE", (t_u8 *) pht_info,
+                    sizeof(MrvlIETypes_HTInfo_t));
+            pos += sizeof(MrvlIETypes_HTInfo_t);
+            cmd_append_size += sizeof(MrvlIETypes_HTInfo_t);
+            pht_info->header.len = wlan_cpu_to_le16(pht_info->header.len);
+        }
+    }
+
+    cmd->size =
+        (t_u16) wlan_cpu_to_le16((t_u16) (sizeof(HostCmd_DS_802_11_AD_HOC_START)
+                                          + S_DS_GEN + cmd_append_size));
+
+    memcpy(pmadapter, &tmp_cap, &padhoc_start->cap, sizeof(t_u16));
+
+    if (pmadapter->adhoc_start_band == BAND_B) {
+        SHORT_SLOT_TIME_DISABLED(tmp_cap);
+    } else {
+        SHORT_SLOT_TIME_ENABLED(tmp_cap);
+    }
+
+    tmp_cap = wlan_cpu_to_le16(tmp_cap);
+    memcpy(pmadapter, &padhoc_start->cap, &tmp_cap, sizeof(t_u16));
+
+    ret = MLAN_STATUS_SUCCESS;
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function prepares command of ad_hoc_join.
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *  @param pdata_buf    Void cast of BSSDescriptor_t from the 
+ *                        scan table to join
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_cmd_802_11_ad_hoc_join(IN mlan_private * pmpriv,
+                            IN HostCmd_DS_COMMAND * cmd, IN t_void * pdata_buf)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    HostCmd_DS_802_11_AD_HOC_JOIN *padhoc_join = &cmd->params.adhoc_join;
+    BSSDescriptor_t *pbss_desc = (BSSDescriptor_t *) pdata_buf;
+    MrvlIEtypes_ChanListParamSet_t *pchan_tlv;
+    MrvlIEtypes_RsnParamSet_t *prsn_ie_tlv;
+    t_u32 cmd_append_size = 0;
+    t_u16 tmp_cap;
+    t_u32 i, rates_size = 0;
+    t_u16 curr_pkt_filter;
+    t_u8 *pos = (t_u8 *) padhoc_join + sizeof(HostCmd_DS_802_11_AD_HOC_JOIN);
+
+    ENTER();
+
+/** Use G protection */
+#define USE_G_PROTECTION        0x02
+    if (pbss_desc->erp_flags & USE_G_PROTECTION) {
+        curr_pkt_filter =
+            pmpriv->curr_pkt_filter | HostCmd_ACT_MAC_ADHOC_G_PROTECTION_ON;
+
+        ret = wlan_prepare_cmd(pmpriv,
+                               HostCmd_CMD_MAC_CONTROL,
+                               HostCmd_ACT_GEN_SET, 0, MNULL, &curr_pkt_filter);
+        if (ret) {
+            PRINTM(MERROR, "ADHOC_J_CMD: G Protection config failed\n");
+            ret = MLAN_STATUS_FAILURE;
+            goto done;
+        }
+    }
+
+    pmpriv->pattempted_bss_desc = pbss_desc;
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_802_11_AD_HOC_JOIN);
+
+    padhoc_join->bss_descriptor.bss_mode = HostCmd_BSS_MODE_IBSS;
+
+    padhoc_join->bss_descriptor.beacon_period
+        = wlan_cpu_to_le16(pbss_desc->beacon_period);
+
+    memcpy(pmadapter, &padhoc_join->bss_descriptor.bssid,
+           &pbss_desc->mac_address, MLAN_MAC_ADDR_LENGTH);
+
+    memcpy(pmadapter, &padhoc_join->bss_descriptor.ssid,
+           &pbss_desc->ssid.ssid, pbss_desc->ssid.ssid_len);
+
+    memcpy(pmadapter, &padhoc_join->bss_descriptor.phy_param_set,
+           &pbss_desc->phy_param_set, sizeof(IEEEtypes_PhyParamSet_t));
+
+    memcpy(pmadapter, &padhoc_join->bss_descriptor.ss_param_set,
+           &pbss_desc->ss_param_set, sizeof(IEEEtypes_SsParamSet_t));
+    padhoc_join->bss_descriptor.ss_param_set.ibss_param_set.atim_window = 0;
+
+    memcpy(pmadapter, &tmp_cap, &pbss_desc->cap_info,
+           sizeof(IEEEtypes_CapInfo_t));
+
+    tmp_cap &= CAPINFO_MASK;
+
+    PRINTM(MINFO, "ADHOC_J_CMD: tmp_cap=%4X CAPINFO_MASK=%4lX\n",
+           tmp_cap, CAPINFO_MASK);
+    memcpy(pmadapter, &padhoc_join->bss_descriptor.cap, &tmp_cap,
+           sizeof(IEEEtypes_CapInfo_t));
+
+    /* Information on BSSID descriptor passed to FW */
+    PRINTM(MINFO,
+           "ADHOC_J_CMD: BSSID = %02x-%02x-%02x-%02x-%02x-%02x, SSID = %s\n",
+           padhoc_join->bss_descriptor.bssid[0],
+           padhoc_join->bss_descriptor.bssid[1],
+           padhoc_join->bss_descriptor.bssid[2],
+           padhoc_join->bss_descriptor.bssid[3],
+           padhoc_join->bss_descriptor.bssid[4],
+           padhoc_join->bss_descriptor.bssid[5],
+           padhoc_join->bss_descriptor.ssid);
+
+    for (i = 0; i < WLAN_SUPPORTED_RATES && pbss_desc->supported_rates[i]; i++);
+    rates_size = i;
+
+    /* Copy Data Rates from the Rates recorded in scan response */
+    memset(pmadapter, padhoc_join->bss_descriptor.data_rates, 0,
+           sizeof(padhoc_join->bss_descriptor.data_rates));
+    memcpy(pmadapter, padhoc_join->bss_descriptor.data_rates,
+           pbss_desc->supported_rates, rates_size);
+
+    HEXDUMP("Adapted Rates:", padhoc_join->bss_descriptor.data_rates,
+            rates_size);
+
+    /* Copy the adhoc join rates into Current BSS state structure */
+    pmpriv->curr_bss_params.num_of_rates = rates_size;
+    memcpy(pmadapter, &pmpriv->curr_bss_params.data_rates,
+           pbss_desc->supported_rates, rates_size);
+
+    /* Copy the channel information */
+    pmpriv->curr_bss_params.bss_descriptor.channel = pbss_desc->channel;
+    pmpriv->curr_bss_params.band = (t_u8) pbss_desc->bss_band;
+
+    if (pmpriv->sec_info.wep_status == Wlan802_11WEPEnabled
+        || pmpriv->adhoc_aes_enabled
+        || pmpriv->sec_info.wpa_enabled || pmpriv->sec_info.ewpa_enabled)
+        padhoc_join->bss_descriptor.cap.privacy = AD_HOC_CAP_PRIVACY_ON;
+
+    if (IS_SUPPORT_MULTI_BANDS(pmadapter)) {
+        /* Append a channel TLV */
+        pchan_tlv = (MrvlIEtypes_ChanListParamSet_t *) pos;
+        pchan_tlv->header.type = wlan_cpu_to_le16(TLV_TYPE_CHANLIST);
+        pchan_tlv->header.len = wlan_cpu_to_le16(sizeof(ChanScanParamSet_t));
+
+        memset(pmadapter, pchan_tlv->chan_scan_param, 0x00,
+               sizeof(ChanScanParamSet_t));
+        pchan_tlv->chan_scan_param[0].chan_number =
+            (pbss_desc->phy_param_set.ds_param_set.current_chan);
+        PRINTM(MINFO, "ADHOC_J_CMD: TLV Chan = %d\n",
+               pchan_tlv->chan_scan_param[0].chan_number);
+
+        pchan_tlv->chan_scan_param[0].radio_type
+            = wlan_band_to_radio_type((t_u8) pbss_desc->bss_band);
+
+        PRINTM(MINFO, "ADHOC_J_CMD: TLV Band = %d\n",
+               pchan_tlv->chan_scan_param[0].radio_type);
+        pos += sizeof(pchan_tlv->header) + sizeof(ChanScanParamSet_t);
+        cmd_append_size +=
+            sizeof(pchan_tlv->header) + sizeof(ChanScanParamSet_t);
+    }
+
+    if (wlan_11d_create_dnld_countryinfo(pmpriv, (t_u8) pbss_desc->bss_band)) {
+        PRINTM(MERROR, "Dnld_countryinfo_11d failed\n");
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+    if (wlan_11d_parse_dnld_countryinfo(pmpriv, pmpriv->pattempted_bss_desc)) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* 
+     * Call 11h join API after capability bits are set so
+     *   adhoc/infra 11h behavior can be properly triggered.
+     *   pos modified if data is appended
+     */
+    cmd_append_size += wlan_11h_process_join(pmpriv, &pos,
+                                             &padhoc_join->bss_descriptor.cap,
+                                             (t_u8) pbss_desc->bss_band,
+                                             pbss_desc->channel,
+                                             &pbss_desc->wlan_11h_bss_info);
+
+    if (pmpriv->sec_info.wpa_enabled) {
+        prsn_ie_tlv = (MrvlIEtypes_RsnParamSet_t *) pos;
+        prsn_ie_tlv->header.type = (t_u16) pmpriv->wpa_ie[0];   /* WPA_IE or
+                                                                   RSN_IE */
+        prsn_ie_tlv->header.type = prsn_ie_tlv->header.type & 0x00FF;
+        prsn_ie_tlv->header.type = wlan_cpu_to_le16(prsn_ie_tlv->header.type);
+        prsn_ie_tlv->header.len = (t_u16) pmpriv->wpa_ie[1];
+        prsn_ie_tlv->header.len = prsn_ie_tlv->header.len & 0x00FF;
+        if (prsn_ie_tlv->header.len <= (sizeof(pmpriv->wpa_ie) - 2))
+            memcpy(pmadapter, prsn_ie_tlv->rsn_ie, &pmpriv->wpa_ie[2],
+                   prsn_ie_tlv->header.len);
+        else {
+            ret = MLAN_STATUS_FAILURE;
+            goto done;
+        }
+
+        HEXDUMP("ADHOC_JOIN: RSN IE", (t_u8 *) prsn_ie_tlv,
+                sizeof(prsn_ie_tlv->header) + prsn_ie_tlv->header.len);
+        pos += sizeof(prsn_ie_tlv->header) + prsn_ie_tlv->header.len;
+        cmd_append_size +=
+            sizeof(prsn_ie_tlv->header) + prsn_ie_tlv->header.len;
+        prsn_ie_tlv->header.len = wlan_cpu_to_le16(prsn_ie_tlv->header.len);
+    } else if (pmpriv->sec_info.ewpa_enabled) {
+        prsn_ie_tlv = (MrvlIEtypes_RsnParamSet_t *) pos;
+        if (pbss_desc->pwpa_ie) {
+            prsn_ie_tlv->header.type =
+                (t_u16) (*(pbss_desc->pwpa_ie)).vend_hdr.element_id;
+            prsn_ie_tlv->header.type = prsn_ie_tlv->header.type & 0x00FF;
+            prsn_ie_tlv->header.type =
+                wlan_cpu_to_le16(prsn_ie_tlv->header.type);
+            prsn_ie_tlv->header.len =
+                (t_u16) (*(pbss_desc->pwpa_ie)).vend_hdr.len;
+            prsn_ie_tlv->header.len = prsn_ie_tlv->header.len & 0x00FF;
+            if (prsn_ie_tlv->header.len <= (sizeof(pmpriv->wpa_ie))) {
+                memcpy(pmadapter, prsn_ie_tlv->rsn_ie,
+                       &((*(pbss_desc->pwpa_ie)).vend_hdr.oui[0]),
+                       prsn_ie_tlv->header.len);
+            } else {
+                ret = MLAN_STATUS_FAILURE;
+                goto done;
+            }
+
+            HEXDUMP("ADHOC_JOIN: RSN IE", (t_u8 *) prsn_ie_tlv,
+                    sizeof(prsn_ie_tlv->header) + prsn_ie_tlv->header.len);
+            pos += sizeof(prsn_ie_tlv->header) + prsn_ie_tlv->header.len;
+            cmd_append_size +=
+                sizeof(prsn_ie_tlv->header) + prsn_ie_tlv->header.len;
+            prsn_ie_tlv->header.len = wlan_cpu_to_le16(prsn_ie_tlv->header.len);
+        }
+        if (pbss_desc->prsn_ie) {
+            prsn_ie_tlv = (MrvlIEtypes_RsnParamSet_t *) pos;
+            prsn_ie_tlv->header.type =
+                (t_u16) (*(pbss_desc->prsn_ie)).ieee_hdr.element_id;
+            prsn_ie_tlv->header.type = prsn_ie_tlv->header.type & 0x00FF;
+            prsn_ie_tlv->header.type =
+                wlan_cpu_to_le16(prsn_ie_tlv->header.type);
+            prsn_ie_tlv->header.len =
+                (t_u16) (*(pbss_desc->prsn_ie)).ieee_hdr.len;
+            prsn_ie_tlv->header.len = prsn_ie_tlv->header.len & 0x00FF;
+            if (prsn_ie_tlv->header.len <= (sizeof(pmpriv->wpa_ie))) {
+                memcpy(pmadapter, prsn_ie_tlv->rsn_ie,
+                       &((*(pbss_desc->prsn_ie)).data[0])
+                       , prsn_ie_tlv->header.len);
+            } else {
+                ret = MLAN_STATUS_FAILURE;
+                goto done;
+            }
+
+            HEXDUMP("ADHOC_JOIN: RSN IE", (t_u8 *) prsn_ie_tlv,
+                    sizeof(prsn_ie_tlv->header) + prsn_ie_tlv->header.len);
+            pos += sizeof(prsn_ie_tlv->header) + prsn_ie_tlv->header.len;
+            cmd_append_size +=
+                sizeof(prsn_ie_tlv->header) + prsn_ie_tlv->header.len;
+            prsn_ie_tlv->header.len = wlan_cpu_to_le16(prsn_ie_tlv->header.len);
+        }
+    }
+
+    if (ISSUPP_11NENABLED(pmadapter->fw_cap_info)
+        )
+        cmd_append_size += wlan_cmd_append_11n_tlv(pmpriv, pbss_desc, &pos);
+
+    cmd->size =
+        (t_u16) wlan_cpu_to_le16((t_u16) (sizeof(HostCmd_DS_802_11_AD_HOC_JOIN)
+                                          + S_DS_GEN + cmd_append_size));
+
+    memcpy(pmadapter, &tmp_cap, &padhoc_join->bss_descriptor.cap,
+           sizeof(IEEEtypes_CapInfo_t));
+    tmp_cap = wlan_cpu_to_le16(tmp_cap);
+
+    memcpy(pmadapter, &padhoc_join->bss_descriptor.cap,
+           &tmp_cap, sizeof(IEEEtypes_CapInfo_t));
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function handles the command response of ad_hoc_start and
+ *  		ad_hoc_join
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_ret_802_11_ad_hoc(IN mlan_private * pmpriv,
+                       IN HostCmd_DS_COMMAND * resp, IN t_void * pioctl_buf)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ioctl_req *pioctl_req = (mlan_ioctl_req *) pioctl_buf;
+    HostCmd_DS_802_11_AD_HOC_START_RESULT *padhoc_start_result =
+        &resp->params.adhoc_start_result;
+    HostCmd_DS_802_11_AD_HOC_JOIN_RESULT *padhoc_join_result =
+        &resp->params.adhoc_join_result;
+    BSSDescriptor_t *pbss_desc;
+    t_u16 command = resp->command;
+    t_u8 result = 0;
+    t_u8 event_buf[100];
+    mlan_event *pevent = (mlan_event *) event_buf;
+
+    ENTER();
+
+    if (command == HostCmd_CMD_802_11_AD_HOC_START)
+        result = padhoc_start_result->result;
+    else
+        result = padhoc_join_result->result;
+
+    pbss_desc = pmpriv->pattempted_bss_desc;
+
+    /* 
+     * Join result code 0 --> SUCCESS
+     */
+    if (result) {
+        PRINTM(MERROR, "ADHOC_RESP Failed 0x%x\n", result);
+        if (pmpriv->media_connected == MTRUE)
+            wlan_reset_connect_state(pmpriv, MTRUE);
+
+        memset(pmpriv->adapter, &pmpriv->curr_bss_params.bss_descriptor,
+               0x00, sizeof(BSSDescriptor_t));
+
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* Send a Media Connected event, according to the Spec */
+    pmpriv->media_connected = MTRUE;
+
+    if (command == HostCmd_CMD_802_11_AD_HOC_START) {
+        PRINTM(MINFO, "ADHOC_S_RESP  %s\n", pbss_desc->ssid.ssid);
+
+        /* Update the created network descriptor with the new BSSID */
+        memcpy(pmpriv->adapter, pbss_desc->mac_address,
+               padhoc_start_result->bssid, MLAN_MAC_ADDR_LENGTH);
+
+        pmpriv->adhoc_state = ADHOC_STARTED;
+    } else {
+        /* 
+         * Now the join cmd should be successful.
+         * If BSSID has changed use SSID to compare instead of BSSID
+         */
+        PRINTM(MINFO, "ADHOC_J_RESP  %s\n", pbss_desc->ssid.ssid);
+
+        /* 
+         * Make a copy of current BSSID descriptor, only needed for join since
+         * the current descriptor is already being used for adhoc start
+         */
+        memcpy(pmpriv->adapter, &pmpriv->curr_bss_params.bss_descriptor,
+               pbss_desc, sizeof(BSSDescriptor_t));
+
+        pmpriv->adhoc_state = ADHOC_JOINED;
+    }
+
+    PRINTM(MINFO, "ADHOC_RESP: Channel = %d\n", pmpriv->adhoc_channel);
+    PRINTM(MINFO, "ADHOC_RESP: BSSID = %02x:%02x:%02x:%02x:%02x:%02x\n",
+           pmpriv->curr_bss_params.bss_descriptor.mac_address[0],
+           pmpriv->curr_bss_params.bss_descriptor.mac_address[1],
+           pmpriv->curr_bss_params.bss_descriptor.mac_address[2],
+           pmpriv->curr_bss_params.bss_descriptor.mac_address[3],
+           pmpriv->curr_bss_params.bss_descriptor.mac_address[4],
+           pmpriv->curr_bss_params.bss_descriptor.mac_address[5]);
+
+    pevent->bss_index = pmpriv->bss_index;
+    pevent->event_id = MLAN_EVENT_ID_DRV_CONNECTED;
+    pevent->event_len = MLAN_MAC_ADDR_LENGTH;
+    memcpy(pmpriv->adapter, (t_u8 *) pevent->event_buf,
+           (t_u8 *) pmpriv->curr_bss_params.bss_descriptor.mac_address,
+           MLAN_MAC_ADDR_LENGTH);
+    wlan_recv_event(pmpriv, MLAN_EVENT_ID_DRV_CONNECTED, pevent);
+    wlan_save_curr_bcn(pmpriv);
+
+  done:
+    /* Need to indicate IOCTL complete */
+    if (pioctl_req != MNULL) {
+        if (ret != MLAN_STATUS_SUCCESS) {
+            pioctl_req->status_code = MLAN_ERROR_CMD_ASSOC_FAIL;
+        } else {
+            pioctl_req->status_code = MLAN_ERROR_NO_ERROR;
+        }
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Associated to a specific BSS discovered in a scan
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param pioctl_buf   A pointer to MLAN IOCTL Request buffer
+ *  @param pbss_desc     A pointer to the BSS descriptor to associate with.
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_associate(IN mlan_private * pmpriv,
+               IN t_void * pioctl_buf, IN BSSDescriptor_t * pbss_desc)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    t_u8 current_bssid[MLAN_MAC_ADDR_LENGTH];
+    pmlan_ioctl_req pioctl_req = (mlan_ioctl_req *) pioctl_buf;
+
+    ENTER();
+
+    /* Return error if the pmadapter or table entry is not marked as infra */
+    if ((pmpriv->bss_mode != MLAN_BSS_MODE_INFRA) ||
+        (pbss_desc->bss_mode != MLAN_BSS_MODE_INFRA)) {
+        if (pioctl_req)
+            pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+
+    memcpy(pmpriv->adapter, &current_bssid,
+           &pmpriv->curr_bss_params.bss_descriptor.mac_address,
+           sizeof(current_bssid));
+
+    /* Clear any past association response stored for application retrieval */
+    pmpriv->assoc_rsp_size = 0;
+
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_802_11_ASSOCIATE,
+                           HostCmd_ACT_GEN_SET, 0, pioctl_buf, pbss_desc);
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Start an Adhoc Network
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param pioctl_buf   A pointer to MLAN IOCTL Request buffer
+ *  @param padhoc_ssid  The ssid of the Adhoc Network
+ *
+ *  @return             MLAN_STATUS_SUCCESS--success, MLAN_STATUS_FAILURE--fail
+ */
+mlan_status
+wlan_adhoc_start(IN mlan_private * pmpriv,
+                 IN t_void * pioctl_buf, IN mlan_802_11_ssid * padhoc_ssid)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    wlan_meas_state_t *pmeas_state = &pmpriv->adapter->state_meas;
+    t_u8 radar = MFALSE;
+    pmlan_ioctl_req pioctl_req = (mlan_ioctl_req *) pioctl_buf;
+
+    ENTER();
+
+    /* 
+     * If the report indicates no measurement was done, leave the default
+     * return value alone.
+     */
+    if (!pmeas_state->meas_rpt_returned.rpt.basic.map.unmeasured) {
+        radar =
+            pmeas_state->meas_rpt_returned.rpt.basic.map.radar ? MTRUE : MFALSE;
+    }
+
+    if (radar) {
+        if (pioctl_req)
+            pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        ret = MLAN_STATUS_FAILURE;
+        LEAVE();
+        return ret;
+    }
+
+    PRINTM(MINFO, "Adhoc Channel = %d\n", pmpriv->adhoc_channel);
+    PRINTM(MINFO, "curr_bss_params.channel = %d\n",
+           pmpriv->curr_bss_params.bss_descriptor.channel);
+    PRINTM(MINFO, "curr_bss_params.band = %d\n", pmpriv->curr_bss_params.band);
+
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_802_11_AD_HOC_START,
+                           HostCmd_ACT_GEN_SET, 0, pioctl_buf, padhoc_ssid);
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Join an adhoc network found in a previous scan
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param pioctl_buf   A pointer to MLAN IOCTL Request buffer
+ *  @param pbss_desc     A pointer to the BSS descriptor found in a previous scan
+ *                      to attempt to join
+ *
+ *  @return             MLAN_STATUS_SUCCESS--success, MLAN_STATUS_FAILURE--fail
+ */
+mlan_status
+wlan_adhoc_join(IN mlan_private * pmpriv,
+                IN t_void * pioctl_buf, IN BSSDescriptor_t * pbss_desc)
+{
+    pmlan_adapter pmadapter = pmpriv->adapter;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_ioctl_req pioctl_req = (mlan_ioctl_req *) pioctl_buf;
+
+    ENTER();
+
+    PRINTM(MINFO, "wlan_adhoc_join: CurBss.ssid =%s\n",
+           pmpriv->curr_bss_params.bss_descriptor.ssid.ssid);
+    PRINTM(MINFO, "wlan_adhoc_join: CurBss.ssid_len =%u\n",
+           pmpriv->curr_bss_params.bss_descriptor.ssid.ssid_len);
+    PRINTM(MINFO, "wlan_adhoc_join: ssid =%s\n", pbss_desc->ssid.ssid);
+    PRINTM(MINFO, "wlan_adhoc_join: ssid len =%u\n", pbss_desc->ssid.ssid_len);
+
+    /* Check if the requested SSID is already joined */
+    if (pmpriv->curr_bss_params.bss_descriptor.ssid.ssid_len &&
+        !wlan_ssid_cmp(pmadapter, &pbss_desc->ssid,
+                       &pmpriv->curr_bss_params.bss_descriptor.ssid) &&
+        (pmpriv->curr_bss_params.bss_descriptor.bss_mode ==
+         MLAN_BSS_MODE_IBSS)) {
+
+        PRINTM(MINFO,
+               "ADHOC_J_CMD: New ad-hoc SSID is the same as current, "
+               "not attempting to re-join\n");
+
+        if (pioctl_req)
+            pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+
+    PRINTM(MINFO, "curr_bss_params.channel = %d\n",
+           pmpriv->curr_bss_params.bss_descriptor.channel);
+    PRINTM(MINFO, "curr_bss_params.band = %d\n", pmpriv->curr_bss_params.band);
+
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_802_11_AD_HOC_JOIN,
+                           HostCmd_ACT_GEN_SET, 0, pioctl_buf, pbss_desc);
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Send Deauthentication Request or Stop the AdHoc network depending on mode
+ *
+ *  @param pmpriv    A pointer to mlan_private structure
+ *  @param pioctl_req A pointer to mlan_ioctl_req structure
+ *  @param mac       A pointer to mlan_802_11_mac_addr structure
+ *
+ *  @return          MLAN_STATUS_SUCCESS--success, MLAN_STATUS_FAILURE--fail, MLAN_STATUS_PENDING--pending
+ */
+mlan_status
+wlan_disconnect(IN mlan_private * pmpriv,
+                IN mlan_ioctl_req * pioctl_req, IN mlan_802_11_mac_addr * mac)
+{
+    mlan_802_11_mac_addr mac_address;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    t_u8 zero_mac[] = { 0, 0, 0, 0, 0, 0 };
+
+    ENTER();
+
+    if (pmpriv->media_connected == MTRUE) {
+        if (pmpriv->bss_mode == MLAN_BSS_MODE_INFRA) {
+            if (mac) {
+                if (!memcmp(pmpriv->adapter, mac, zero_mac, sizeof(zero_mac)))
+                    memcpy(pmpriv->adapter, (t_u8 *) & mac_address,
+                           (t_u8 *) & pmpriv->curr_bss_params.bss_descriptor.
+                           mac_address, MLAN_MAC_ADDR_LENGTH);
+                else {
+                    memcpy(pmpriv->adapter, (t_u8 *) & mac_address,
+                           (t_u8 *) mac, MLAN_MAC_ADDR_LENGTH);
+                }
+            } else {
+                memcpy(pmpriv->adapter, (t_u8 *) & mac_address,
+                       (t_u8 *) & pmpriv->curr_bss_params.bss_descriptor.
+                       mac_address, MLAN_MAC_ADDR_LENGTH);
+            }
+
+            ret = wlan_prepare_cmd(pmpriv,
+                                   HostCmd_CMD_802_11_DEAUTHENTICATE,
+                                   HostCmd_ACT_GEN_SET,
+                                   0, (t_void *) pioctl_req, &mac_address);
+
+            if (ret == MLAN_STATUS_SUCCESS && pioctl_req)
+                ret = MLAN_STATUS_PENDING;
+
+        } else if (pmpriv->bss_mode == MLAN_BSS_MODE_IBSS) {
+            ret = wlan_prepare_cmd(pmpriv,
+                                   HostCmd_CMD_802_11_AD_HOC_STOP,
+                                   HostCmd_ACT_GEN_SET,
+                                   0, (t_void *) pioctl_req, MNULL);
+
+            if (ret == MLAN_STATUS_SUCCESS && pioctl_req)
+                ret = MLAN_STATUS_PENDING;
+        }
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Convert band to radio type used in channel TLV
+ *
+ *  @param band		Band enumeration to convert to a channel TLV radio type
+ *
+ *  @return		Radio type designator for use in a channel TLV
+ */
+t_u8
+wlan_band_to_radio_type(IN t_u8 band)
+{
+    t_u8 ret_radio_type;
+
+    ENTER();
+
+    switch (band) {
+    case BAND_A:
+    case BAND_AN:
+    case BAND_A | BAND_AN:
+        ret_radio_type = HostCmd_SCAN_RADIO_TYPE_A;
+        break;
+    case BAND_B:
+    case BAND_G:
+    case BAND_B | BAND_G:
+    default:
+        ret_radio_type = HostCmd_SCAN_RADIO_TYPE_BG;
+        break;
+    }
+
+    LEAVE();
+    return ret_radio_type;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_join.h linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_join.h
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_join.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_join.h	2017-09-23 03:42:50.118674758 +0800
@@ -0,0 +1,48 @@
+/** @file mlan_join.h
+ *
+ *  @brief This file defines the interface for the WLAN infrastructure
+ *  and adhoc join routines.
+ *
+ *  Driver interface functions and type declarations for the join module
+ *  implemented in mlan_join.c.  Process all start/join requests for
+ *  both adhoc and infrastructure networks
+ *    
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ *  @sa mlan_join.c
+ */
+
+/******************************************************
+Change log:
+    10/13/2008: initial version
+******************************************************/
+
+#ifndef _MLAN_JOIN_H_
+#define _MLAN_JOIN_H_
+
+/** Size of buffer allocated to store the association response from firmware */
+#define MRVDRV_ASSOC_RSP_BUF_SIZE  500
+
+/** Size of buffer allocated to store IEs passed to firmware in the assoc req */
+#define MRVDRV_GENIE_BUF_SIZE      256
+
+#endif /* _MLAN_JOIN_H_ */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_main.h linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_main.h
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_main.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_main.h	2017-09-23 03:42:50.122674747 +0800
@@ -0,0 +1,2195 @@
+/** @file mlan_main.h
+ *
+ *  @brief This file defines the private and adapter data
+ *  structures and declares global function prototypes used
+ *  in MLAN module.
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/******************************************************
+Change log:
+    10/13/2008: initial version
+******************************************************/
+
+#ifndef _MLAN_MAIN_H_
+#define _MLAN_MAIN_H_
+
+#ifdef DEBUG_LEVEL1
+extern t_void(*print_callback) (IN t_void * pmoal_handle,
+                                IN t_u32 level, IN t_s8 * pformat, IN ...);
+/** Log debug message */
+#ifdef __GNUC__
+#ifdef DEBUG_LEVEL2
+#define PRINTM(level, pformat, args...) \
+do {                                    \
+    if (print_callback) \
+        print_callback(MNULL, level, pformat, ## args); \
+} while (0)
+#else
+#define PRINTM(level, pformat, args...) \
+do {                                    \
+    if ((print_callback) && (level != MINFO) && (level != MWARN)) \
+        print_callback(MNULL, level, pformat, ## args); \
+} while (0)
+#endif
+#else
+#ifdef DEBUG_LEVEL2
+#define PRINTM(level, pformat, ...) \
+do {                                    \
+    if (print_callback)  \
+        print_callback(MNULL, level, pformat, __VA_ARGS__); \
+} while (0)
+#else
+#define PRINTM(level, pformat, ...) \
+do {                                    \
+    if ((print_callback) && (level != MINFO) && (level != MWARN)) \
+        print_callback(MNULL, level, pformat, __VA_ARGS__); \
+} while (0)
+#endif
+#endif /* __GNUC__ */
+
+/** Max hex dump data length */
+#define MAX_DATA_DUMP_LEN	64
+
+/** Debug hexdump for level-1 debugging */
+#define DBG_HEXDUMP(level,x,y,z)   \
+do {                \
+    if (print_callback)  \
+        print_callback(MNULL, MHEX_DUMP | level, x, y, z); \
+} while (0)
+#else
+/** Log debug message */
+#define PRINTM(level, pformat, args...) do {} while (0)
+
+/** Debug hexdump for level-1 debugging */
+#define DBG_HEXDUMP(level,x,y,z) do {} while (0)
+#endif /* DEBUG_LEVEL1 */
+
+#ifdef DEBUG_LEVEL2
+/** Log entry point for debugging */
+#define ENTER()     \
+do {                \
+        PRINTM(MENTRY, "Enter: %s\n", __FUNCTION__);   \
+} while (0)
+
+/** Log exit point for debugging */
+#define LEAVE()     \
+do {                \
+        PRINTM(MENTRY, "Leave: %s\n", __FUNCTION__);   \
+} while (0)
+
+/** Hexdump for level-2 debugging */
+#define HEXDUMP(x,y,z)   \
+do {                \
+    if (print_callback)  \
+        print_callback(MNULL, MHEX_DUMP | MINFO, x, y, z); \
+} while (0)
+#else
+/** Log entry point for debugging */
+#define ENTER() do {} while (0)
+
+/** Log exit point for debugging */
+#define LEAVE() do {} while (0)
+
+/** Hexdump for debugging */
+#define HEXDUMP(x,y,z) do {} while (0)
+#endif /* DEBUG_LEVEL2 */
+
+/** Find minimum */
+#ifndef MIN
+#define MIN(a,b)		((a) < (b) ? (a) : (b))
+#endif
+
+/** Find maximum */
+#ifndef MAX
+#define MAX(a,b)		((a) > (b) ? (a) : (b))
+#endif
+
+#ifdef memset
+#undef memset
+#endif
+/** Memset routine */
+#define memset(adapter, s, c, len) \
+  adapter->callbacks.moal_memset(adapter->pmoal_handle, s, c, len)
+
+#ifdef memmove
+#undef memmove
+#endif
+/** Memmove routine */
+#define memmove(adapter, dest, src, len) \
+  adapter->callbacks.moal_memmove(adapter->pmoal_handle, dest, src, len)
+
+#ifdef memcpy
+#undef memcpy
+#endif
+/** Memcpy routine */
+#define memcpy(adapter, to, from, len) \
+  adapter->callbacks.moal_memcpy(adapter->pmoal_handle, to, from, len)
+
+#ifdef memcmp
+#undef memcmp
+#endif
+/** Memcmp routine */
+#define memcmp(adapter, s1, s2, len) \
+  adapter->callbacks.moal_memcmp(adapter->pmoal_handle, s1, s2, len)
+
+/** Find number of elements */
+#ifndef NELEMENTS
+#define NELEMENTS(x)    (sizeof(x)/sizeof(x[0]))
+#endif
+
+/** SWAP: swap t_u8 */
+#define SWAP_U8(a,b)	{t_u8 t; t=a; a=b; b=t;}
+
+/** SWAP: swap t_u8 */
+#define SWAP_U16(a,b)	{t_u16 t; t=a; a=b; b=t;}
+
+/** MLAN MNULL pointer */
+#define MNULL                           (0)
+
+/** 16 bits byte swap */
+#define swap_byte_16(x) \
+((t_u16)((((t_u16)(x) & 0x00ffU) << 8) | \
+         (((t_u16)(x) & 0xff00U) >> 8)))
+
+/** 32 bits byte swap */
+#define swap_byte_32(x) \
+((t_u32)((((t_u32)(x) & 0x000000ffUL) << 24) | \
+         (((t_u32)(x) & 0x0000ff00UL) <<  8) | \
+         (((t_u32)(x) & 0x00ff0000UL) >>  8) | \
+         (((t_u32)(x) & 0xff000000UL) >> 24)))
+
+/** 64 bits byte swap */
+#define swap_byte_64(x) \
+((t_u64)((t_u64)(((t_u64)(x) & 0x00000000000000ffULL) << 56) | \
+         (t_u64)(((t_u64)(x) & 0x000000000000ff00ULL) << 40) | \
+         (t_u64)(((t_u64)(x) & 0x0000000000ff0000ULL) << 24) | \
+         (t_u64)(((t_u64)(x) & 0x00000000ff000000ULL) <<  8) | \
+         (t_u64)(((t_u64)(x) & 0x000000ff00000000ULL) >>  8) | \
+         (t_u64)(((t_u64)(x) & 0x0000ff0000000000ULL) >> 24) | \
+         (t_u64)(((t_u64)(x) & 0x00ff000000000000ULL) >> 40) | \
+         (t_u64)(((t_u64)(x) & 0xff00000000000000ULL) >> 56) ))
+
+#ifdef BIG_ENDIAN_SUPPORT
+/** Convert ulong n/w to host */
+#define mlan_ntohl(x) x
+/** Convert host ulong to n/w */
+#define mlan_htonl(x) x
+/** Convert n/w to host */
+#define mlan_ntohs(x)  x
+/** Convert host to n/w */
+#define mlan_htons(x)  x
+/** Convert from 16 bit little endian format to CPU format */
+#define wlan_le16_to_cpu(x) swap_byte_16(x)
+/** Convert from 32 bit little endian format to CPU format */
+#define wlan_le32_to_cpu(x) swap_byte_32(x)
+/** Convert from 64 bit little endian format to CPU format */
+#define wlan_le64_to_cpu(x) swap_byte_64(x)
+/** Convert to 16 bit little endian format from CPU format */
+#define wlan_cpu_to_le16(x) swap_byte_16(x)
+/** Convert to 32 bit little endian format from CPU format */
+#define wlan_cpu_to_le32(x) swap_byte_32(x)
+/** Convert to 64 bit little endian format from CPU format */
+#define wlan_cpu_to_le64(x) swap_byte_64(x)
+
+/** Convert TxPD to little endian format from CPU format */
+#define endian_convert_TxPD(x)                                          \
+    {                                                                   \
+        (x)->tx_pkt_length = wlan_cpu_to_le16((x)->tx_pkt_length);      \
+        (x)->tx_pkt_offset = wlan_cpu_to_le16((x)->tx_pkt_offset);      \
+        (x)->tx_pkt_type   = wlan_cpu_to_le16((x)->tx_pkt_type);        \
+        (x)->tx_control    = wlan_cpu_to_le32((x)->tx_control);         \
+    }
+
+/** Convert RxPD from little endian format to CPU format */
+#define endian_convert_RxPD(x)                                          \
+    {                                                                   \
+        (x)->rx_pkt_length = wlan_le16_to_cpu((x)->rx_pkt_length);      \
+        (x)->rx_pkt_offset = wlan_le16_to_cpu((x)->rx_pkt_offset);      \
+        (x)->rx_pkt_type   = wlan_le16_to_cpu((x)->rx_pkt_type);        \
+        (x)->seq_num       = wlan_le16_to_cpu((x)->seq_num);            \
+    }
+#else
+/** Convert ulong n/w to host */
+#define mlan_ntohl(x) swap_byte_32(x)
+/** Convert host ulong to n/w */
+#define mlan_htonl(x) swap_byte_32(x)
+/** Convert n/w to host */
+#define mlan_ntohs(x) swap_byte_16(x)
+/** Convert host to n/w */
+#define mlan_htons(x) swap_byte_16(x)
+/** Do nothing */
+#define wlan_le16_to_cpu(x) x
+/** Do nothing */
+#define wlan_le32_to_cpu(x) x
+/** Do nothing */
+#define wlan_le64_to_cpu(x) x
+/** Do nothing */
+#define wlan_cpu_to_le16(x) x
+/** Do nothing */
+#define wlan_cpu_to_le32(x) x
+/** Do nothing */
+#define wlan_cpu_to_le64(x) x
+
+/** Convert TxPD to little endian format from CPU format */
+#define endian_convert_TxPD(x)  do {} while (0)
+/** Convert RxPD from little endian format to CPU format */
+#define endian_convert_RxPD(x)  do {} while (0)
+#endif /* BIG_ENDIAN_SUPPORT */
+
+/** Global moal_assert_callback */
+extern t_void(*assert_callback) (IN t_void * pmoal_handle, IN t_u32 cond);
+
+/** Assertion */
+#define MASSERT(cond)                   \
+do {                                    \
+    if (!(cond)) {                      \
+        PRINTM(MFATAL, "ASSERT: %s: %i\n", __FUNCTION__, __LINE__); \
+        if (assert_callback) {          \
+            assert_callback(MNULL, (t_u32)(cond)); \
+        } else {                        \
+            do {} while(1);             \
+        }                               \
+    }                                   \
+} while(0)
+
+/** Upload size */
+#define WLAN_UPLD_SIZE                  (2312)
+
+/** Maximum event buffer size */
+#define MAX_EVENT_SIZE                  1024
+
+#ifdef STA_SUPPORT
+/** Maximum buffer size for ARP filter */
+#define ARP_FILTER_MAX_BUF_SIZE     	68
+#endif /* STA_SUPPORT */
+
+/** 60 seconds */
+#define MRVDRV_TIMER_60S                60000
+/** 10 seconds */
+#define MRVDRV_TIMER_10S                10000
+/** 5 seconds */
+#define MRVDRV_TIMER_5S                 5000
+/** 1 second */
+#define MRVDRV_TIMER_1S                 1000
+
+/** Maximum size of multicast list */
+#define MRVDRV_MAX_MULTICAST_LIST_SIZE  32
+/** Maximum size of channel */
+#define MRVDRV_MAX_CHANNEL_SIZE         14
+/** Maximum length of SSID */
+#define MRVDRV_MAX_SSID_LENGTH          32
+/** WEP list macros & data structures */
+/** Size of key buffer in bytes */
+#define MRVL_KEY_BUFFER_SIZE_IN_BYTE    16
+/** Maximum length of WPA key */
+#define MRVL_MAX_KEY_WPA_KEY_LENGTH     32
+
+/** Default listen interval */
+#define MLAN_DEFAULT_LISTEN_INTERVAL    10
+
+/** Maximum number of region codes */
+#define MRVDRV_MAX_REGION_CODE          8
+
+/** Default region code */
+#define MRVDRV_DEFAULT_REGION_CODE      0x10
+
+/** Default factor for calculating beacon average */
+#define DEFAULT_BCN_AVG_FACTOR          8
+/** Default factor for calculating data average */
+#define DEFAULT_DATA_AVG_FACTOR         8
+
+/** The first valid channel for use */
+#define FIRST_VALID_CHANNEL          0xff
+/** Default Ad-Hoc channel */
+#define DEFAULT_AD_HOC_CHANNEL       6
+/** Default Ad-Hoc channel A */
+#define DEFAULT_AD_HOC_CHANNEL_A     36
+
+/** Number of WEP keys */
+#define MRVL_NUM_WEP_KEY                (4)
+
+/** Default multiple DTIM */
+#define MRVDRV_DEFAULT_MULTIPLE_DTIM        1
+
+/** Default beacon missing timeout */
+#define DEFAULT_BCN_MISS_TIMEOUT            5
+
+/** Maximum buffer space for beacons retrieved from scan responses */
+#define MAX_SCAN_BEACON_BUFFER          16384
+/** Default buffer space for beacons retrieved from scan responses */
+#define DEFAULT_SCAN_BEACON_BUFFER      4096
+
+/**
+ * @brief Buffer pad space for newly allocated beacons/probe responses
+ *
+ * Beacons are typically 6 bytes longer than an equivalent probe response.
+ *  For each scan response stored, allocate an extra byte pad at the end to
+ *  allow easy expansion to store a beacon in the same memory a probe response
+ *  previously contained
+ */
+#define SCAN_BEACON_ENTRY_PAD          6
+
+/** Scan time specified in the channel TLV for each channel for passive scans */
+#define MRVDRV_PASSIVE_SCAN_CHAN_TIME       200
+
+/** Scan time specified in the channel TLV for each channel for active scans */
+#define MRVDRV_ACTIVE_SCAN_CHAN_TIME        200
+
+/** Scan time specified in the channel TLV for each channel for specific scans */
+#define MRVDRV_SPECIFIC_SCAN_CHAN_TIME      110
+
+/**
+ * Max total scan time in milliseconds
+ * The total scan time should be less than scan command timeout value (10s)
+ */
+#define MRVDRV_MAX_TOTAL_SCAN_TIME     (MRVDRV_TIMER_10S - MRVDRV_TIMER_1S)
+
+/** Offset for GTK as it has version to skip past for GTK */
+#define RSN_GTK_OUI_OFFSET 2
+
+/** If OUI is not found */
+#define MLAN_OUI_NOT_PRESENT 0
+/** If OUI is found */
+#define MLAN_OUI_PRESENT 1
+
+/** RF antenna selection */
+#define RF_ANTENNA_MASK(n)	((1<<(n))-1)
+/** RF antenna auto select */
+#define RF_ANTENNA_AUTO		0xFFFF
+
+/** Type length */
+#define MLAN_TYPE_LEN			4
+
+/** Is cmd_resp or event received? */
+/** Do not check for data_received as data_received is handled 
+    in mlan_recv for USB */
+#define IS_CARD_RX_RCVD(adapter) (adapter->cmd_resp_received || \
+                                  adapter->event_received || \
+				  				  util_peek_list(adapter->pmoal_handle, \
+                                    &adapter->rx_data_queue, \
+									pmadapter->callbacks.moal_spin_lock, \
+                                	pmadapter->callbacks.moal_spin_unlock))
+/** Type Command */
+#define MLAN_USB_TYPE_CMD              0xF00DFACE
+/** Type Data */
+#define MLAN_USB_TYPE_DATA             0xBEADC0DE
+/** Type Event */
+#define MLAN_USB_TYPE_EVENT            0xBEEFFACE
+/** Timeout in milliseconds for usb_bulk_msg function */
+#define MLAN_USB_BULK_MSG_TIMEOUT      100
+
+/** High threshold at which to start drop packets */
+#define  RX_HIGH_THRESHOLD           512
+/** Medium threshold at which to disable Rx BA */
+#define  RX_MED_THRESHOLD            256
+/** Low threshold to allow Rx BA */
+#define  RX_LOW_THRESHOLD            128
+
+/** Debug command number */
+#define DBG_CMD_NUM	5
+
+/** Max bitmap rate size */
+#define MAX_BITMAP_RATES_SIZE 10
+
+/** Info for debug purpose */
+typedef struct _wlan_dbg
+{
+    /** Number of host to card command failures */
+    t_u32 num_cmd_host_to_card_failure;
+    /** Number of host to card sleep confirm failures */
+    t_u32 num_cmd_sleep_cfm_host_to_card_failure;
+    /** Number of host to card Tx failures */
+    t_u32 num_tx_host_to_card_failure;
+    /** Number of card to host failures */
+    t_u32 num_card_to_host_failure;
+    /** Number of deauthentication events */
+    t_u32 num_event_deauth;
+    /** Number of disassosiation events */
+    t_u32 num_event_disassoc;
+    /** Number of link lost events */
+    t_u32 num_event_link_lost;
+    /** Number of deauthentication commands */
+    t_u32 num_cmd_deauth;
+    /** Number of association comamnd successes */
+    t_u32 num_cmd_assoc_success;
+    /** Number of association command failures */
+    t_u32 num_cmd_assoc_failure;
+    /** Number of Tx timeouts */
+    t_u32 num_tx_timeout;
+    /** Number of command timeouts */
+    t_u32 num_cmd_timeout;
+    /** Timeout command ID */
+    t_u16 timeout_cmd_id;
+    /** Timeout command action */
+    t_u16 timeout_cmd_act;
+    /** List of last command IDs */
+    t_u16 last_cmd_id[DBG_CMD_NUM];
+    /** List of last command actions */
+    t_u16 last_cmd_act[DBG_CMD_NUM];
+    /** Last command index */
+    t_u16 last_cmd_index;
+    /** List of last command response IDs */
+    t_u16 last_cmd_resp_id[DBG_CMD_NUM];
+    /** Last command response index */
+    t_u16 last_cmd_resp_index;
+    /** List of last events */
+    t_u16 last_event[DBG_CMD_NUM];
+    /** Last event index */
+    t_u16 last_event_index;
+} wlan_dbg;
+
+/** Hardware status codes */
+typedef enum _WLAN_HARDWARE_STATUS
+{
+    WlanHardwareStatusReady,
+    WlanHardwareStatusInitializing,
+    WlanHardwareStatusInitdone,
+    WlanHardwareStatusReset,
+    WlanHardwareStatusClosing,
+    WlanHardwareStatusNotReady
+} WLAN_HARDWARE_STATUS;
+
+/** WLAN_802_11_POWER_MODE */
+typedef enum _WLAN_802_11_POWER_MODE
+{
+    Wlan802_11PowerModeCAM,
+    Wlan802_11PowerModePSP
+} WLAN_802_11_POWER_MODE;
+
+/** tx param */
+typedef struct _mlan_tx_param
+{
+    /** next packet length */
+    t_u32 next_pkt_len;
+} mlan_tx_param;
+
+/** PS_STATE */
+typedef enum _PS_STATE
+{
+    PS_STATE_AWAKE,
+    PS_STATE_PRE_SLEEP,
+    PS_STATE_SLEEP_CFM,
+    PS_STATE_SLEEP
+} PS_STATE;
+
+/** Minimum flush timer for win size of 1 is 50 ms */
+#define MIN_FLUSH_TIMER_MS 50
+/** Tx BA stream table */
+typedef struct _TxBAStreamTbl TxBAStreamTbl;
+
+/** Add BA parameter data structure */
+typedef struct
+{
+    /** Window size for initiator */
+    t_u32 tx_win_size;
+    /** Window size for receiver */
+    t_u32 rx_win_size;
+    /** Block ack timeout */
+    t_u32 timeout;
+} add_ba_param_t;
+
+/** Tx aggregation data structure */
+typedef struct _txAggr_t
+{
+    /** AMPDU user */
+    t_u8 ampdu_user;
+    /** AMPDU AP */
+    t_u8 ampdu_ap;
+    /** AMSDU */
+    t_u8 amsdu;
+} tx_aggr_t;
+
+/** RA list table */
+typedef struct _raListTbl raListTbl;
+
+/** RA list table */
+struct _raListTbl
+{
+    /** Pointer to previous node */
+    raListTbl *pprev;
+    /** Pointer to next node */
+    raListTbl *pnext;
+    /** Buffer list head */
+    mlan_list_head buf_head;
+    /** RA list buffer */
+    t_u8 ra[MLAN_MAC_ADDR_LENGTH];
+    /** total packets in RA list */
+    t_u16 total_pkts;
+        /** packets received */
+    t_u16 packet_count;
+        /** packet count threshold to setup BA */
+    t_u8 ba_packet_threshold;
+        /** is 11n enabled */
+    t_u8 is_11n_enabled;
+        /** tx_pause flag */
+    t_u8 tx_pause;
+};
+
+/** TID table */
+typedef struct _tidTbl
+{
+    /** RA list head */
+    mlan_list_head ra_list;
+    /** Current RA list */
+    raListTbl *ra_list_curr;
+} tid_tbl_t;
+
+/** Highest priority setting for a packet (uses voice AC) */
+#define WMM_HIGHEST_PRIORITY  7
+/** Highest priority TID  */
+#define HIGH_PRIO_TID   7
+/** Lowest priority TID  */
+#define LOW_PRIO_TID    0
+/** No packet priority (< lowest) */
+#define NO_PKT_PRIO_TID    -1
+
+/** Struct of WMM DESC */
+typedef struct _wmm_desc
+{
+    /** TID table */
+    tid_tbl_t tid_tbl_ptr[MAX_NUM_TID];
+    /** Packets out */
+    t_u32 packets_out[MAX_NUM_TID];
+    /** Packets queued */
+    t_u32 pkts_queued[MAX_NUM_TID];
+    /** Spin lock to protect ra_list */
+    t_void *ra_list_spinlock;
+
+    /** AC status */
+    WmmAcStatus_t ac_status[MAX_AC_QUEUES];
+    /** AC downgraded values */
+    mlan_wmm_ac_e ac_down_graded_vals[MAX_AC_QUEUES];
+
+    /** Max driver packet delay sent to the firmware for expiry eval */
+    t_u32 drv_pkt_delay_max;
+
+    /** WMM queue priority table */
+    t_u8 queue_priority[MAX_AC_QUEUES];
+    /** User priority packet transmission control */
+    t_u32 user_pri_pkt_tx_ctrl[WMM_HIGHEST_PRIORITY + 1];       /* UP: 0 to 7 */
+
+    /** Number of transmit packets queued */
+    mlan_scalar tx_pkts_queued;
+    /** Tracks highest priority with a packet queued */
+    mlan_scalar highest_queued_prio;
+} wmm_desc_t;
+
+/** Security structure */
+typedef struct _wlan_802_11_security_t
+{
+    /** WPA enabled flag */
+    t_u8 wpa_enabled;
+    /** E-Supplicant enabled flag */
+    t_u8 ewpa_enabled;
+    /** WPA2 enabled flag */
+    t_u8 wpa2_enabled;
+    /** WAPI enabled flag */
+    t_u8 wapi_enabled;
+    /** WAPI key on flag */
+    t_u8 wapi_key_on;
+    /** WEP status */
+    WLAN_802_11_WEP_STATUS wep_status;
+    /** Authentication mode */
+    t_u32 authentication_mode;
+    /** Encryption mode */
+    t_u32 encryption_mode;
+} wlan_802_11_security_t;
+
+/** Current Basic Service Set State Structure */
+typedef struct
+{
+    /** BSS descriptor */
+    BSSDescriptor_t bss_descriptor;
+    /** WMM enable? */
+    t_u8 wmm_enabled;
+    /** Uapsd enable?*/
+    t_u8 wmm_uapsd_enabled;
+    /** Band */
+    t_u8 band;
+    /** Number of rates supported */
+    t_u32 num_of_rates;
+    /** Supported rates*/
+    t_u8 data_rates[WLAN_SUPPORTED_RATES];
+} current_bss_params_t;
+
+/** Sleep_params */
+typedef struct _sleep_params_t
+{
+    /** Sleep parameter error */
+    t_u16 sp_error;
+    /** Sleep parameter offset */
+    t_u16 sp_offset;
+    /** Sleep parameter stable time */
+    t_u16 sp_stable_time;
+    /** Sleep parameter calibration control */
+    t_u8 sp_cal_control;
+    /** Sleep parameter external sleep clock */
+    t_u8 sp_ext_sleep_clk;
+    /** Sleep parameter reserved */
+    t_u16 sp_reserved;
+} sleep_params_t;
+
+/** Sleep_period */
+typedef struct sleep_period_t
+{
+    /** Sleep period */
+    t_u16 period;
+    /** Reserved */
+    t_u16 reserved;
+} sleep_period_t;
+
+/** mrvl_wep_key_t */
+typedef struct _mrvl_wep_key_t
+{
+    /** Length */
+    t_u32 length;
+    /** WEP key index */
+    t_u32 key_index;
+    /** WEP key length */
+    t_u32 key_length;
+    /** WEP keys */
+    t_u8 key_material[MRVL_KEY_BUFFER_SIZE_IN_BYTE];
+} mrvl_wep_key_t;
+
+/** Maximum number of region channel */
+#define MAX_REGION_CHANNEL_NUM  2
+
+/** Chan-Freq-TxPower mapping table*/
+typedef struct _chan_freq_power_t
+{
+    /** Channel Number */
+    t_u16 channel;
+    /** Frequency of this Channel */
+    t_u32 freq;
+    /** Max allowed Tx power level */
+    t_u16 max_tx_power;
+    /** TRUE:radar detect required; FALSE:radar detect not required*/
+    t_bool radar_detect;
+    /** TRUE:channel unsupported;  FALSE:supported */
+    t_u8 unsupported;
+} chan_freq_power_t;
+
+/** Region-band mapping table */
+typedef struct _region_chan_t
+{
+    /** TRUE if this entry is valid */
+    t_u8 valid;
+    /** Region code for US, Japan ... */
+    t_u8 region;
+    /** Band B/G/A, used for BAND_CONFIG cmd */
+    t_u8 band;
+    /** Actual No. of elements in the array below */
+    t_u8 num_cfp;
+    /** chan-freq-txpower mapping table */
+    chan_freq_power_t *pcfp;
+} region_chan_t;
+
+/** State of 11d */
+typedef enum _state_11d_t
+{
+    DISABLE_11D = 0,
+    ENABLE_11D = 1,
+} state_11d_t;
+
+#define DEFAULT_11D_STATE   DISABLE_11D
+
+/** Domain regulatory information */
+typedef struct _wlan_802_11d_domain_reg
+{
+    /** Country Code */
+    t_u8 country_code[COUNTRY_CODE_LEN];
+    /** band that channels in sub_band belong to */
+    t_u8 band;
+    /** No. of subband in below */
+    t_u8 no_of_sub_band;
+    /** Subband data to send/last sent */
+    IEEEtypes_SubbandSet_t sub_band[MRVDRV_MAX_SUBBAND_802_11D];
+} wlan_802_11d_domain_reg_t;
+
+/** Data for state machine */
+typedef struct _wlan_802_11d_state
+{
+    /** True for enabling 11D */
+    state_11d_t enable_11d;
+    /** True for user enabling 11D */
+    state_11d_t user_enable_11d;
+} wlan_802_11d_state_t;
+
+/** 802.11h State information kept in the 'mlan_private' driver structure */
+typedef struct
+{
+    /** Indicates whether 11h is enabled in the driver */
+    t_bool is_11h_enabled;
+    /** Indicates whether 11h is active in the firmware */
+    t_bool is_11h_active;
+    /** Master device using automatic channel select */
+    t_bool adhoc_auto_sel_chan;
+    /** Set when driver receives a STOP TX event from fw */
+    t_bool tx_disabled;
+} wlan_11h_interface_state_t;
+
+/** Data structure for WPS information */
+typedef struct
+{
+    /** WPS IE */
+    IEEEtypes_VendorSpecific_t wps_ie;
+    /** Session enable flag */
+    t_u8 session_enable;
+} wps_t;
+
+/** mlan_operations data structure */
+typedef struct _mlan_operations
+{
+    /** cmd init handler */
+    mlan_status(*init_cmd) (IN t_void * priv, IN t_u8 first_bss);
+    /** ioctl handler */
+    mlan_status(*ioctl) (t_void * adapter, pmlan_ioctl_req pioctl_req);
+    /** cmd handler */
+    mlan_status(*prepare_cmd) (IN t_void * priv,
+                               IN t_u16 cmd_no,
+                               IN t_u16 cmd_action,
+                               IN t_u32 cmd_oid,
+                               IN t_void * pioctl_buf,
+                               IN t_void * pdata_buf, IN t_void * pcmd_buf);
+    /** cmdresp handler */
+    mlan_status(*process_cmdresp) (IN t_void * priv,
+                                   IN t_u16 cmdresp_no,
+                                   IN t_void * pcmd_buf, IN t_void * pioctl);
+    /** rx handler */
+    mlan_status(*process_rx_packet) (IN t_void * adapter,
+                                     IN pmlan_buffer pmbuf);
+    /** event handler */
+    mlan_status(*process_event) (IN t_void * priv);
+    /** txpd handler */
+    t_void *(*process_txpd) (IN t_void * priv, IN pmlan_buffer pmbuf);
+    /** BSS role */
+    mlan_bss_role bss_role;
+} mlan_operations;
+
+/** Private structure for MLAN */
+typedef struct _mlan_private
+{
+    /** Pointer to mlan_adapter */
+    struct _mlan_adapter *adapter;
+    /** BSS index */
+    t_u8 bss_index;
+    /** BSS type */
+    t_u8 bss_type;
+    /** BSS role */
+    t_u8 bss_role;
+    /** BSS Priority */
+    t_u8 bss_priority;
+    /** BSS number */
+    t_u8 bss_num;
+    /** Frame type */
+    t_u8 frame_type;
+    /** MAC address information */
+    t_u8 curr_addr[MLAN_MAC_ADDR_LENGTH];
+    /** Media connection status */
+    t_bool media_connected;
+
+    /** Current packet filter */
+    t_u16 curr_pkt_filter;
+    /** Infrastructure mode */
+    t_u32 bss_mode;
+
+    /** Tx packet control */
+    t_u32 pkt_tx_ctrl;
+
+    /** Tx power level */
+    t_u16 tx_power_level;
+    /** Maximum Tx power level */
+    t_u8 max_tx_power_level;
+    /** Minimum Tx power level */
+    t_u8 min_tx_power_level;
+    /** Tx rate */
+    t_u8 tx_rate;
+    /** tx ht_info */
+    t_u8 tx_htinfo;
+    /** rxpd_htinfo */
+    t_u8 rxpd_htinfo;
+#ifdef UAP_SUPPORT
+    /** UAP 11n flag */
+    t_u8 is_11n_enabled;
+#endif                          /* UAP_SUPPORT */
+#ifdef UAP_SUPPORT
+    /** packet forward control */
+    t_u8 pkt_fwd;
+    /**  dropped pkts */
+    t_u32 num_drop_pkts;
+#endif
+    /** TX beamforming capability */
+    t_u32 tx_bf_cap;
+    /** Rx PD rate */
+    t_u8 rxpd_rate;
+    /** Rate bitmap */
+    t_u16 rate_bitmap;
+    /** Bitmap rates */
+    t_u16 bitmap_rates[MAX_BITMAP_RATES_SIZE];
+    /** Data rate */
+    t_u32 data_rate;
+    /** Automatic data rate flag */
+    t_u8 is_data_rate_auto;
+    /** Factor for calculating beacon average */
+    t_u16 bcn_avg_factor;
+    /** Factor for calculating data average */
+    t_u16 data_avg_factor;
+    /** Last data RSSI */
+    t_s16 data_rssi_last;
+    /** Last data Noise Floor */
+    t_s16 data_nf_last;
+    /** Average data RSSI */
+    t_s16 data_rssi_avg;
+    /** Averag data Noise Floor */
+    t_s16 data_nf_avg;
+    /** Last beacon RSSI */
+    t_s16 bcn_rssi_last;
+    /** Last beacon Noise Floor */
+    t_s16 bcn_nf_last;
+    /** Average beacon RSSI */
+    t_s16 bcn_rssi_avg;
+    /** Average beacon Noise Floor */
+    t_s16 bcn_nf_avg;
+
+    /** Attempted BSS descriptor */
+    BSSDescriptor_t *pattempted_bss_desc;
+
+    /** Current SSID/BSSID related parameters*/
+    current_bss_params_t curr_bss_params;
+
+    /** Beacon period */
+    t_u16 beacon_period;
+    /** Listen interval */
+    t_u16 listen_interval;
+    /** ATIM window */
+    t_u16 atim_window;
+
+    /** AdHoc channel */
+    t_u8 adhoc_channel;
+    /** AdHoc link sensed flag */
+    t_u8 adhoc_is_link_sensed;
+    /** AdHoc operating state */
+    t_u8 adhoc_state;
+    /** FSM variable for 11d support */
+    wlan_802_11d_state_t state_11d;
+    /** FSM variable for 11h support */
+    wlan_11h_interface_state_t intf_state_11h;
+
+    /** Security related */
+    /** Encryption parameter */
+    wlan_802_11_security_t sec_info;
+    /** WEP keys */
+    mrvl_wep_key_t wep_key[MRVL_NUM_WEP_KEY];
+    /** Current WEP key index */
+    t_u16 wep_key_curr_index;
+    /** EWPA query 0: disable, 1: enable */
+    t_u8 ewpa_query;
+    /** Encryption Key*/
+    t_u8 wpa_ie[256];
+    /** WPA IE length */
+    t_u8 wpa_ie_len;
+    /** GTK set flag */
+    t_u8 wpa_is_gtk_set;
+    /** AES key material */
+    HostCmd_DS_802_11_KEY_MATERIAL aes_key;
+    /** WAPI IE */
+    t_u8 wapi_ie[256];
+    /** WAPI IE length */
+    t_u8 wapi_ie_len;
+    /** Pointer to the station table */
+    mlan_list_head sta_list;
+
+    /** MGMT IE */
+    custom_ie mgmt_ie[MAX_MGMT_IE_INDEX];
+#ifdef UAP_SUPPORT
+    /** mgmt frame passthru mask */
+    t_u32 mgmt_frame_passthru_mask;
+#endif                          /* UAP_SUPPORT */
+    /** Advanced Encryption Standard */
+    t_u8 adhoc_aes_enabled;
+    /** WMM required */
+    t_u8 wmm_required;
+    /** WMM enabled */
+    t_u8 wmm_enabled;
+    /** WMM qos info */
+    t_u8 wmm_qosinfo;
+    /** WMM related variable*/
+    wmm_desc_t wmm;
+
+    /** Pointer to the Transmit BA stream table*/
+    mlan_list_head tx_ba_stream_tbl_ptr;
+    /** Pointer to the priorities for AMSDU/AMPDU table*/
+    tx_aggr_t aggr_prio_tbl[MAX_NUM_TID];
+    /** Pointer to the priorities for AMSDU/AMPDU table*/
+    t_u8 addba_reject[MAX_NUM_TID];
+    /** Struct to store ADDBA parameters */
+    add_ba_param_t add_ba_param;
+    /** last rx_seq */
+    t_u16 rx_seq[MAX_NUM_TID];
+    /** Pointer to the Receive Reordering table*/
+    mlan_list_head rx_reorder_tbl_ptr;
+    /** Lock for Rx packets */
+    t_void *rx_pkt_lock;
+
+#ifdef STA_SUPPORT
+    /** Buffer to store the association response for application retrieval */
+    t_u8 assoc_rsp_buf[MRVDRV_ASSOC_RSP_BUF_SIZE];
+    /** Length of the data stored in assoc_rsp_buf */
+    t_u32 assoc_rsp_size;
+
+    /** Generic IEEE IEs passed from the application to be inserted into the
+     *    association request to firmware 
+     */
+    t_u8 gen_ie_buf[MRVDRV_GENIE_BUF_SIZE];
+    /** Length of the data stored in gen_ie_buf */
+    t_u8 gen_ie_buf_len;
+
+    t_u8 *pcurr_bcn_buf;
+    t_u32 curr_bcn_size;
+    t_void *curr_bcn_buf_lock;
+
+    /** WPS */
+    wps_t wps;
+#endif                          /* STA_SUPPORT */
+
+    /** function table */
+    mlan_operations ops;
+
+    /** Port Control mode */
+    t_u8 port_ctrl_mode;
+
+    /** Port open flag */
+    t_u8 port_open;
+
+    /** Port open flag state at time of association attempt */
+    t_u8 prior_port_status;
+
+    /** Scan block flag */
+    t_u8 scan_block;
+    /** IP address operation */
+    t_u32 op_code;
+    /** IP address */
+    t_u8 ip_addr[IPADDR_LEN];
+} mlan_private, *pmlan_private;
+
+/** BA stream status */
+typedef enum _baStatus_e
+{
+    BA_STREAM_NOT_SETUP = 0,
+    BA_STREAM_SETUP_INPROGRESS,
+    BA_STREAM_SETUP_COMPLETE
+} baStatus_e;
+
+/** Tx BA stream table */
+struct _TxBAStreamTbl
+{
+    /** TxBAStreamTbl previous node */
+    TxBAStreamTbl *pprev;
+    /** TxBAStreamTbl next node */
+    TxBAStreamTbl *pnext;
+    /** TID */
+    int tid;
+    /** RA */
+    t_u8 ra[MLAN_MAC_ADDR_LENGTH];
+    /** BA stream status */
+    baStatus_e ba_status;
+};
+
+/** RX reorder table */
+typedef struct _RxReorderTbl RxReorderTbl;
+
+typedef struct
+{
+    /** Timer for flushing */
+    t_void *timer;
+    /** Timer set flag */
+    t_u8 timer_is_set;
+    /** RxReorderTbl ptr */
+    RxReorderTbl *ptr;
+    /** Priv pointer */
+    mlan_private *priv;
+} reorder_tmr_cnxt_t;
+
+/** RX reorder table */
+struct _RxReorderTbl
+{
+    /** RxReorderTbl previous node */
+    RxReorderTbl *pprev;
+    /** RxReorderTbl next node */
+    RxReorderTbl *pnext;
+    /** TID */
+    int tid;
+    /** TA */
+    t_u8 ta[MLAN_MAC_ADDR_LENGTH];
+    /** Start window */
+    int start_win;
+    /** Window size */
+    int win_size;
+    /** Pointer to pointer to RxReorderTbl */
+    t_void **rx_reorder_ptr;
+    /** Timer context */
+    reorder_tmr_cnxt_t timer_context;
+    /** BA stream status */
+    baStatus_e ba_status;
+};
+
+/** BSS priority node */
+typedef struct _mlan_bssprio_node mlan_bssprio_node;
+
+/** BSS priority node */
+struct _mlan_bssprio_node
+{
+    /** Pointer to previous node */
+    mlan_bssprio_node *pprev;
+    /** Pointer to next node */
+    mlan_bssprio_node *pnext;
+    /** Pointer to priv */
+    pmlan_private priv;
+};
+
+/** BSS priority table */
+typedef struct _mlan_bssprio_tbl mlan_bssprio_tbl;
+
+/** BSS priority table */
+struct _mlan_bssprio_tbl
+{
+    /** BSS priority list head */
+    mlan_list_head bssprio_head;
+    /** Current priority node */
+    mlan_bssprio_node *bssprio_cur;
+};
+
+/** cmd_ctrl_node */
+typedef struct _cmd_ctrl_node cmd_ctrl_node;
+
+/** _cmd_ctrl_node */
+struct _cmd_ctrl_node
+{
+    /** Pointer to previous node */
+    cmd_ctrl_node *pprev;
+    /** Pointer to next node */
+    cmd_ctrl_node *pnext;
+    /** Pointer to priv */
+    pmlan_private priv;
+    /** Command OID for sub-command use */
+    t_u32 cmd_oid;
+    /** Command flag */
+    t_u32 cmd_flag;
+    /** Pointer to mlan_buffer */
+    mlan_buffer *cmdbuf;
+    /** Pointer to mlan_buffer */
+    mlan_buffer *respbuf;
+    /** Command parameter */
+    t_void *pdata_buf;
+    /** Pointer to mlan_ioctl_req if command is from IOCTL */
+    t_void *pioctl_buf;
+};
+
+/** station node */
+typedef struct _sta_node sta_node;
+
+/** station node*/
+struct _sta_node
+{
+    /** previous node */
+    sta_node *pprev;
+    /** next node */
+    sta_node *pnext;
+    /** station mac address */
+    t_u8 mac_addr[MLAN_MAC_ADDR_LENGTH];
+    /** 11n flag */
+    t_u8 is_11n_enabled;
+    /** AMPDU STA */
+    t_u8 ampdu_sta[MAX_NUM_TID];
+    /** last rx_seq */
+    t_u16 rx_seq[MAX_NUM_TID];
+    /** wapi key on off flag */
+    t_u8 wapi_key_on;
+    /** tx pause status */
+    t_u8 tx_pause;
+};
+
+/** 802.11h State information kept in the 'mlan_adapter' driver structure */
+typedef struct
+{
+    /** Min TX Power capability sent to FW for 11h use and fw power control */
+    t_s8 min_tx_power_capability;
+    /** Max TX Power capability sent to FW for 11h use and fw power control */
+    t_s8 max_tx_power_capability;
+    /** User provisioned local power constraint sent in association requests */
+    t_s8 usr_def_power_constraint;
+    /** Received CHANNEL_SWITCH_ANN event */
+    t_bool recvd_chanswann_event;
+    /** Quiet IE */
+    IEEEtypes_Quiet_t quiet_ie;
+} wlan_11h_device_state_t;
+
+/**
+ * @brief Driver measurement state held in 'mlan_adapter' structure
+ *  
+ *  Used to record a measurement request that the driver is pending on 
+ *    the result (received measurement report).
+ */
+typedef struct
+{
+    /**
+     * Dialog token of a pending measurement request/report.  Used to
+     *   block execution while waiting for the specific dialog token
+     */
+    t_u8 meas_rpt_pend_on;
+
+    /**
+     * Measurement report received from the firmware that we were pending on
+     */
+    HostCmd_DS_MEASUREMENT_REPORT meas_rpt_returned;
+
+} wlan_meas_state_t;
+
+/** mlan_init_para structure */
+typedef struct _mlan_init_para
+{
+#ifdef MFG_CMD_SUPPORT
+    /** MFG mode */
+    t_u32 mfg_mode;
+#endif
+    /** IEEE PS mode */
+    t_u32 ps_mode;
+    /** Max Tx buffer size */
+    t_u32 max_tx_buf;
+    /** 802.11d configuration */
+    t_u32 cfg_11d;
+} mlan_init_para, *pmlan_init_para;
+
+/** Adapter data structure for MLAN */
+typedef struct _mlan_adapter
+{
+    /** MOAL handle structure */
+    t_void *pmoal_handle;
+    /** Private pointer */
+    pmlan_private priv[MLAN_MAX_BSS_NUM];
+    /** Total number of Priv number */
+    t_u8 priv_num;
+    /** Priority table for bss */
+    mlan_bssprio_tbl bssprio_tbl[MLAN_MAX_BSS_NUM];
+    /** Callback table */
+    mlan_callbacks callbacks;
+    /** Init parameters */
+    mlan_init_para init_para;
+
+    /** mlan_lock for init/shutdown */
+    t_void *pmlan_lock;
+    /** main_proc_lock for main_process */
+    t_void *pmain_proc_lock;
+    /** mlan_processing */
+    t_u32 mlan_processing;
+    /** Max tx buf size */
+    t_u16 max_tx_buf_size;
+    /** Tx buf size */
+    t_u16 tx_buf_size;
+    /** current tx buf size in fw */
+    t_u16 curr_tx_buf_size;
+    /** IO port */
+    t_u32 ioport;
+
+    /** STATUS variables */
+    WLAN_HARDWARE_STATUS hw_status;
+    /** PnP SUPPORT */
+    t_u8 surprise_removed;
+
+    /** Radio on flag */
+    t_u16 radio_on;
+
+    /** Firmware release number */
+    t_u32 fw_release_number;
+
+    /** Number of antenna used */
+    t_u16 number_of_antenna;
+
+    /** Firmware capability information */
+    t_u32 fw_cap_info;
+
+    /** Event cause */
+    t_u32 event_cause;
+    /** Event buffer */
+    pmlan_buffer pmlan_buffer_event;
+    /** Upload length */
+    t_u32 upld_len;
+    /** Upload buffer*/
+    t_u8 upld_buf[WLAN_UPLD_SIZE];
+    /** Data sent: 
+     *       TRUE - Data is sent to fw, no Tx Done received
+     *       FALSE - Tx done received for previous Tx
+     */
+    t_u8 data_sent;
+    /** CMD sent: 
+     *       TRUE - CMD is sent to fw, no CMD Done received
+     *       FALSE - CMD done received for previous CMD
+     */
+    t_u8 cmd_sent;
+    /** CMD Response received: 
+     *       TRUE - CMD is response is received from fw, and yet to process
+     *       FALSE - No cmd response to process
+     */
+    t_u8 cmd_resp_received;
+    /** Event received: 
+     *       TRUE - Event received from fw, and yet to process
+     *       FALSE - No events to process
+     */
+    t_u8 event_received;
+
+    /** Data received:
+     *       TRUE - Data received from fw
+     *       FALSE - No Data received
+     */
+    t_u8 data_received;
+
+    /** Command-related variables */
+    /** Command sequence number */
+    t_u16 seq_num;
+    /** Command controller nodes */
+    cmd_ctrl_node *cmd_pool;
+    /** Current Command */
+    cmd_ctrl_node *curr_cmd;
+    /** mlan_lock for command */
+    t_void *pmlan_cmd_lock;
+    /** Number of command timeouts */
+    t_u32 num_cmd_timeout;
+    /** Last init fw command id */
+    t_u16 last_init_cmd;
+    /** Command timer */
+    t_void *pmlan_cmd_timer;
+    /** Command timer set flag */
+    t_u8 cmd_timer_is_set;
+
+    /** Command Queues */
+    /** Free command buffers */
+    mlan_list_head cmd_free_q;
+    /** Pending command buffers */
+    mlan_list_head cmd_pending_q;
+    /** Command queue for scanning */
+    mlan_list_head scan_pending_q;
+    /** mlan_processing */
+    t_u32 scan_processing;
+
+    /** Region code */
+    t_u16 region_code;
+    /** Region Channel data */
+    region_chan_t region_channel[MAX_REGION_CHANNEL_NUM];
+#ifdef STA_SUPPORT
+    /** Universal Channel data */
+    region_chan_t universal_channel[MAX_REGION_CHANNEL_NUM];
+    /** Parsed region channel */
+    parsed_region_chan_11d_t parsed_region_chan;
+#endif                          /* STA_SUPPORT */
+    /** 11D and Domain Regulatory Data */
+    wlan_802_11d_domain_reg_t domain_reg;
+    /** FSM variable for 11h support */
+    wlan_11h_device_state_t state_11h;
+    /** FSM variable for MEAS support */
+    wlan_meas_state_t state_meas;
+    /** Scan table */
+    BSSDescriptor_t *pscan_table;
+    /** scan age in secs */
+    t_u32 age_in_secs;
+
+    /** Number of records in the scan table */
+    t_u32 num_in_scan_table;
+    /** Scan probes */
+    t_u16 scan_probes;
+
+    /** Scan type */
+    t_u8 scan_type;
+    /** Scan mode */
+    t_u32 scan_mode;
+    /** Specific scan time */
+    t_u16 specific_scan_time;
+    /** Active scan time */
+    t_u16 active_scan_time;
+    /** Passive scan time */
+    t_u16 passive_scan_time;
+    t_u16 bcn_buf_size;
+    /** Beacon buffer */
+    t_u8 *bcn_buf;
+    /** Pointer to valid beacon buffer end */
+    t_u8 *pbcn_buf_end;
+
+    /** F/W supported bands */
+    t_u8 fw_bands;
+    /** User selected band to start adhoc network */
+    t_u8 adhoc_start_band;
+    /** User selected bands */
+    t_u8 config_bands;
+    /** Pointer to channel list last sent to the firmware for scanning */
+    ChanScanParamSet_t *pscan_channels;
+
+    /** Tx lock flag */
+    t_u8 tx_lock_flag;
+
+    /** sleep_params_t */
+    sleep_params_t sleep_params;
+    /** sleep_period_t (Enhanced Power Save) */
+    sleep_period_t sleep_period;
+
+    /** Power Save mode */
+    /**
+      * Wlan802_11PowerModeCAM = disable
+      * Wlan802_11PowerModePSP = enable
+      */
+    t_u16 ps_mode;
+    /** Power Save state */
+    t_u32 ps_state;
+    /** Need to wakeup flag */
+    t_u8 need_to_wakeup;
+
+    /** Multiple DTIM */
+    t_u16 multiple_dtim;
+    /** Local listen interval */
+    t_u16 local_listen_interval;
+    /** Null packet interval */
+    t_u16 null_pkt_interval;
+
+    /** Power save confirm sleep command buffer */
+    pmlan_buffer psleep_cfm;
+    /** Beacon miss timeout */
+    t_u16 bcn_miss_time_out;
+
+    /** AdHoc awake period */
+    t_u16 adhoc_awake_period;
+
+    /** delay null pkt flag */
+    t_u8 delay_null_pkt;
+    /** Delay to PS in milliseconds */
+    t_u16 delay_to_ps;
+    /** Enhanced PS mode */
+    t_u16 enhanced_ps_mode;
+    /** Device wakeup required flag */
+    t_u8 pm_wakeup_card_req;
+
+    /** Gen NULL pkg */
+    t_u16 gen_null_pkt;
+
+    /** PPS/UAPSD mode flag */
+    t_u16 pps_uapsd_mode;
+    /** Number of wakeup tries */
+    t_u32 pm_wakeup_fw_try;
+
+    /** Host Sleep configured flag */
+    t_u8 is_hs_configured;
+    /** Host Sleep configuration */
+    hs_config_param hs_cfg;
+    /** Host Sleep activated flag */
+    t_u8 hs_activated;
+    /** Event body */
+    t_u8 event_body[MAX_EVENT_SIZE];
+    /** 802.11n device capabilities */
+    t_u32 hw_dot_11n_dev_cap;
+    /** Device support for MIMO abstraction of MCSs */
+    t_u8 hw_dev_mcs_support;
+    /** 802.11n Device Capabilities */
+    t_u32 usr_dot_11n_dev_cap;
+    /** MIMO abstraction of MCSs supported by device */
+    t_u8 usr_dev_mcs_support;
+#ifdef STA_SUPPORT
+    /** Enable 11n support for adhoc start */
+    t_u8 adhoc_11n_enabled;
+    /** Adhoc Secondary Channel Offset */
+    t_u8 chan_offset;
+#endif                          /* STA_SUPPORT */
+
+    /** max mgmt IE index in device */
+    t_u16 max_mgmt_ie_index;
+
+    /** Head of Rx data queue */
+    mlan_list_head rx_data_queue;
+#ifdef MFG_CMD_SUPPORT
+    t_u32 mfg_mode;
+#endif
+    /** Debug */
+    wlan_dbg dbg;
+
+    /** Host to device Heart Beat timer */
+    t_void *hb_host_timer;
+    /** Host Heart Beat timer set flag */
+    t_u8 hb_host_timer_is_set;
+    /** Host Heart Beat timer interval in millisecond */
+    t_u32 hb_host_time;
+    /** The flag for tracking host to device traffic */
+    t_u32 host_to_dev_traffic;
+    /** Device to host Heart Beat timer */
+    t_void *hb_device_timer;
+    /** Device Heart Beat timer set flag */
+    t_u8 hb_dev_timer_is_set;
+    /** Device Heart Beat timer interval in millisecond */
+    t_u32 hb_dev_time;
+    /** The flag for tracking device to host traffic */
+    t_u32 hb_dev_counter;
+    /** Heart Beat ignored due to special command pending */
+    t_u8 is_hb_ignored;
+
+    /** RX pending for forwarding packets */
+    t_u16 pending_bridge_pkts;
+
+#ifdef STA_SUPPORT
+    /** ARP filter buffer */
+    t_u8 arp_filter[ARP_FILTER_MAX_BUF_SIZE];
+    /** ARP filter buffer size */
+    t_u32 arp_filter_size;
+#endif                          /* STA_SUPPORT */
+
+    /** Bypass TX queue */
+    mlan_list_head bypass_txq;
+#if defined(STA_SUPPORT)
+    /** warm-reset IOCTL request buffer pointer */
+    pmlan_ioctl_req pwarm_reset_ioctl_req;
+#endif
+    /** Cal data pointer */
+    t_u8 *pcal_data;
+    /** Cal data length  */
+    t_u32 cal_data_len;
+} mlan_adapter, *pmlan_adapter;
+
+/** Ethernet packet type for EAPOL */
+#define MLAN_ETHER_PKT_TYPE_EAPOL	(0x888E)
+/** Ethernet packet type for WAPI */
+#define MLAN_ETHER_PKT_TYPE_WAPI 	(0x88B4)
+/** Ethernet packet type offset */
+#define MLAN_ETHER_PKT_TYPE_OFFSET  (12)
+
+mlan_status wlan_init_lock_list(IN pmlan_adapter pmadapter);
+t_void wlan_free_lock_list(IN pmlan_adapter pmadapter);
+mlan_status wlan_init_timer(IN pmlan_adapter pmadapter);
+t_void wlan_free_timer(IN pmlan_adapter pmadapter);
+
+/* Function prototype */
+/** Download firmware */
+mlan_status wlan_dnld_fw(IN pmlan_adapter pmadapter, IN pmlan_fw_image pmfw);
+
+/** Initialize firmware */
+mlan_status wlan_init_fw(IN pmlan_adapter pmadapter);
+
+/** Initialize firmware complete */
+mlan_status wlan_init_fw_complete(IN pmlan_adapter pmadapter);
+
+/** Shutdown firmware complete */
+mlan_status wlan_shutdown_fw_complete(IN pmlan_adapter pmadapter);
+
+/** Receive event */
+mlan_status wlan_recv_event(pmlan_private priv,
+                            mlan_event_id event_id, t_void * pmevent);
+
+/** Initialize mlan_adapter structure */
+t_void wlan_init_adapter(IN pmlan_adapter pmadapter);
+
+/** Initialize mlan_private structure */
+mlan_status wlan_init_priv(IN pmlan_private priv);
+
+/** Process event */
+mlan_status wlan_process_event(pmlan_adapter pmadapter);
+
+/** Handles host to device heart beat */
+t_void wlan_host_heart_beat(void *function_context);
+/** Handles device to host heart beat */
+t_void wlan_device_heart_beat(void *function_context);
+
+/** Prepare command */
+mlan_status wlan_prepare_cmd(IN pmlan_private priv,
+                             IN t_u16 cmd_no,
+                             IN t_u16 cmd_action,
+                             IN t_u32 cmd_oid,
+                             IN t_void * pioctl_buf, IN t_void * pdata_buf);
+
+/** cmd timeout handler */
+t_void wlan_cmd_timeout_func(t_void * FunctionContext);
+/** process host cmd */
+mlan_status wlan_misc_ioctl_host_cmd(IN pmlan_adapter pmadapter,
+                                     IN pmlan_ioctl_req pioctl_req);
+/** process init/shutdown cmd*/
+mlan_status wlan_misc_ioctl_init_shutdown(IN pmlan_adapter pmadapter,
+                                          IN pmlan_ioctl_req pioctl_req);
+/** process debug info */
+mlan_status wlan_get_info_debug_info(IN pmlan_adapter pmadapter,
+                                     IN pmlan_ioctl_req pioctl_req);
+
+#if defined(STA_SUPPORT) && defined(UAP_SUPPORT)
+/** Set/Get BSS role */
+mlan_status wlan_bss_ioctl_bss_role(IN pmlan_adapter pmadapter,
+                                    IN pmlan_ioctl_req pioctl_req);
+#endif
+
+mlan_status wlan_set_ewpa_mode(mlan_private * priv,
+                               mlan_ds_passphrase * psec_pp);
+mlan_status wlan_find_bss(mlan_private * pmpriv, pmlan_ioctl_req pioctl_req);
+
+/** Allocate memory for adapter structure members */
+mlan_status wlan_allocate_adapter(pmlan_adapter pmadapter);
+/** Free adapter */
+t_void wlan_free_adapter(pmlan_adapter pmadapter);
+/** Free priv */
+t_void wlan_free_priv(mlan_private * pmpriv);
+/** Allocate command buffer */
+mlan_status wlan_alloc_cmd_buffer(IN mlan_adapter * pmadapter);
+/** Free command buffer */
+mlan_status wlan_free_cmd_buffer(IN mlan_adapter * pmadapter);
+/** Request command lock */
+t_void wlan_request_cmd_lock(mlan_adapter * pmadapter);
+/** Release command lock */
+t_void wlan_release_cmd_lock(mlan_adapter * pmadapter);
+#ifdef STA_SUPPORT
+/** Flush the scan pending queue */
+t_void wlan_flush_scan_queue(pmlan_adapter pmadapter);
+#endif
+/**Cancel pending command */
+t_void wlan_cancel_all_pending_cmd(pmlan_adapter pmadapter);
+/**Cancel pending ioctl */
+t_void wlan_cancel_pending_ioctl(pmlan_adapter pmadapter,
+                                 pmlan_ioctl_req pioctl_req);
+
+/** Insert command to free queue */
+t_void wlan_insert_cmd_to_free_q(IN mlan_adapter * pmadapter,
+                                 IN cmd_ctrl_node * pcmd_node);
+
+/** Insert command to pending queue */
+t_void wlan_insert_cmd_to_pending_q(IN mlan_adapter * pmadapter,
+                                    IN cmd_ctrl_node * pcmd_node,
+                                    IN t_u32 addtail);
+
+/** Execute next command */
+mlan_status wlan_exec_next_cmd(mlan_adapter * pmadapter);
+/** Proecess command response */
+mlan_status wlan_process_cmdresp(mlan_adapter * pmadapter);
+/** Handle received packet, has extra handling for aggregate packets */
+mlan_status wlan_handle_rx_packet(pmlan_adapter pmadapter, pmlan_buffer pmbuf);
+/** Process transmission */
+mlan_status wlan_process_tx(pmlan_private priv, pmlan_buffer pmbuf,
+                            mlan_tx_param * tx_param);
+/** Transmit a null data packet */
+mlan_status wlan_send_null_packet(pmlan_private priv, t_u8 flags);
+
+/** Process write data complete */
+mlan_status wlan_write_data_complete(pmlan_adapter pmlan_adapter,
+                                     pmlan_buffer pmbuf, mlan_status status);
+/** Process receive packet complete */
+mlan_status wlan_recv_packet_complete(pmlan_adapter pmadapter,
+                                      pmlan_buffer pmbuf, mlan_status status);
+/** Clean Tx Rx queues */
+t_void wlan_clean_txrx(pmlan_private priv);
+
+t_void wlan_add_buf_bypass_txqueue(mlan_adapter * pmadapter,
+                                   pmlan_buffer pmbuf);
+t_void wlan_process_bypass_tx(mlan_adapter * pmadapter);
+t_void wlan_cleanup_bypass_txq(mlan_adapter * pmadapter);
+t_u8 wlan_bypass_tx_list_empty(mlan_adapter * pmadapter);
+
+/** Check if this is the last packet */
+t_u8 wlan_check_last_packet_indication(pmlan_private priv);
+
+/** function to allocate a mlan_buffer */
+pmlan_buffer wlan_alloc_mlan_buffer(mlan_adapter * pmadapter, t_u32 data_len,
+                                    t_u32 head_room, t_u32 malloc_flag);
+/** function to free a mlan_buffer */
+t_void wlan_free_mlan_buffer(mlan_adapter * pmadapter, pmlan_buffer pmbuf);
+
+/** command resp handler for version ext */
+mlan_status wlan_ret_ver_ext(pmlan_private pmpriv, HostCmd_DS_COMMAND * resp,
+                             mlan_ioctl_req * pioctl_buf);
+
+/** Check Power Save condition */
+t_void wlan_check_ps_cond(mlan_adapter * pmadapter);
+
+/** handle command for enhanced power save mode */
+mlan_status wlan_cmd_enh_power_mode(pmlan_private pmpriv,
+                                    IN HostCmd_DS_COMMAND * cmd,
+                                    IN t_u16 cmd_action,
+                                    IN t_u16 ps_bitmap, IN t_void * pdata_buf);
+/** handle command resp for enhanced power save mode */
+mlan_status wlan_ret_enh_power_mode(IN pmlan_private pmpriv,
+                                    IN HostCmd_DS_COMMAND * resp,
+                                    IN mlan_ioctl_req * pioctl_buf);
+
+/** handle commnand for cfg data */
+mlan_status wlan_cmd_cfg_data(IN pmlan_private pmpriv,
+                              IN HostCmd_DS_COMMAND * pcmd,
+                              IN t_u16 cmd_action, IN t_void * pdata_buf);
+/** handle command resp for cfg data */
+mlan_status wlan_ret_cfg_data(IN pmlan_private pmpriv,
+                              IN HostCmd_DS_COMMAND * resp,
+                              IN t_void * pioctl_buf);
+
+/** Process sleep confirm command response */
+void wlan_process_sleep_confirm_resp(pmlan_adapter pmadapter, t_u8 * pbuf,
+                                     t_u32 len);
+
+/** Perform hs related activities on receving the power up interrupt */
+void wlan_process_hs_config(pmlan_adapter pmadapter);
+
+mlan_status wlan_pm_reset_card(pmlan_adapter adapter);
+mlan_status wlan_pm_wakeup_card(pmlan_adapter pmadapter);
+
+#ifdef UAP_SUPPORT
+mlan_status wlan_process_802dot11_mgmt_pkt(mlan_private * priv, t_u8 * payload,
+                                           t_u32 payload_len);
+#endif /* UAP_SUPPORT */
+
+mlan_status wlan_pm_ioctl_hscfg(pmlan_adapter pmadapter,
+                                pmlan_ioctl_req pioctl_req);
+
+/** get pm info */
+mlan_status wlan_get_pm_info(IN pmlan_adapter pmadapter,
+                             IN pmlan_ioctl_req pioctl_req);
+
+mlan_status wlan_radio_ioctl_radio_ctl(IN pmlan_adapter pmadapter,
+                                       IN pmlan_ioctl_req pioctl_req);
+
+mlan_status wlan_cmd_tx_rate_cfg(IN pmlan_private pmpriv,
+                                 IN HostCmd_DS_COMMAND * cmd,
+                                 IN t_u16 cmd_action, IN t_void * pdata_buf);
+mlan_status wlan_ret_tx_rate_cfg(IN pmlan_private pmpriv,
+                                 IN HostCmd_DS_COMMAND * resp,
+                                 IN mlan_ioctl_req * pioctl_buf);
+
+mlan_status wlan_rate_ioctl_cfg(IN pmlan_adapter pmadapter,
+                                IN pmlan_ioctl_req pioctl_req);
+mlan_status wlan_ret_802_11_tx_rate_query(IN pmlan_private pmpriv,
+                                          IN HostCmd_DS_COMMAND * resp,
+                                          IN mlan_ioctl_req * pioctl_buf);
+
+t_void wlan_host_sleep_activated_event(pmlan_private priv, t_u8 activated);
+/** Handles the command response of hs_cfg */
+mlan_status wlan_ret_802_11_hs_cfg(IN pmlan_private pmpriv,
+                                   IN HostCmd_DS_COMMAND * resp,
+                                   IN mlan_ioctl_req * pioctl_buf);
+/** Sends HS_WAKEUP event to applications */
+t_void wlan_host_sleep_wakeup_event(pmlan_private priv);
+
+/** send adapter specific init cmd to firmware */
+mlan_status wlan_adapter_init_cmd(IN pmlan_adapter pmadapter);
+
+#ifdef STA_SUPPORT
+/** Process received packet */
+mlan_status wlan_process_rx_packet(pmlan_adapter pmadapter, pmlan_buffer pmbuf);
+/** ioctl handler for station mode */
+mlan_status wlan_ops_sta_ioctl(t_void * adapter, pmlan_ioctl_req pioctl_req);
+
+/** cmd handler for station mode */
+mlan_status wlan_ops_sta_prepare_cmd(IN t_void * priv,
+                                     IN t_u16 cmd_no,
+                                     IN t_u16 cmd_action,
+                                     IN t_u32 cmd_oid,
+                                     IN t_void * pioctl_buf,
+                                     IN t_void * pdata_buf,
+                                     IN t_void * pcmd_buf);
+
+/** cmdresp handler for station mode */
+mlan_status wlan_ops_sta_process_cmdresp(IN t_void * priv,
+                                         IN t_u16 cmdresp_no,
+                                         IN t_void * pcmd_buf,
+                                         IN t_void * pioctl);
+
+/** rx handler for station mode */
+mlan_status wlan_ops_sta_process_rx_packet(IN t_void * adapter,
+                                           IN pmlan_buffer pmbuf);
+
+/** event handler for station mode */
+mlan_status wlan_ops_sta_process_event(IN t_void * priv);
+
+/** fill txpd for station mode */
+t_void *wlan_ops_sta_process_txpd(IN t_void * priv, IN pmlan_buffer pmbuf);
+
+/** send init cmd to firmware for station mode */
+mlan_status wlan_ops_sta_init_cmd(IN t_void * priv, IN t_u8 first_bss);
+
+/** Flush the scan table */
+mlan_status wlan_flush_scan_table(IN pmlan_adapter pmadapter);
+
+/** Scan for networks */
+mlan_status wlan_scan_networks(IN mlan_private * pmpriv,
+                               IN t_void * pioctl_buf,
+                               IN const wlan_user_scan_cfg * puser_scan_in);
+
+/** Scan for specific SSID */
+mlan_status wlan_scan_specific_ssid(IN mlan_private * pmpriv,
+                                    IN t_void * pioctl_buf,
+                                    IN mlan_802_11_ssid * preq_ssid);
+
+/** Scan command handler */
+mlan_status wlan_cmd_802_11_scan(IN pmlan_private pmpriv,
+                                 IN HostCmd_DS_COMMAND * pcmd,
+                                 IN t_void * pdata_buf);
+
+/** Queue scan command handler */
+t_void wlan_queue_scan_cmd(IN mlan_private * pmpriv,
+                           IN cmd_ctrl_node * pcmd_node);
+
+/** Handler for scan command response */
+mlan_status wlan_ret_802_11_scan(IN pmlan_private pmpriv,
+                                 IN HostCmd_DS_COMMAND * resp,
+                                 IN t_void * pioctl_buf);
+
+/** check network compatibility */
+t_s32 wlan_is_network_compatible(IN mlan_private * pmpriv,
+                                 IN t_u32 index, IN t_u32 mode);
+
+/** Find an SSID in a list */
+t_s32 wlan_find_ssid_in_list(IN pmlan_private pmpriv,
+                             IN mlan_802_11_ssid * ssid,
+                             IN t_u8 * bssid, IN t_u32 mode);
+
+/** Find a BSSID in a list */
+t_s32 wlan_find_bssid_in_list(IN mlan_private * pmpriv,
+                              IN t_u8 * bssid, IN t_u32 mode);
+
+/** Find best network */
+mlan_status wlan_find_best_network(IN mlan_private * pmpriv,
+                                   OUT mlan_ssid_bssid * preq_ssid_bssid);
+
+/** Compare two SSIDs */
+t_s32 wlan_ssid_cmp(IN pmlan_adapter pmadapter,
+                    IN mlan_802_11_ssid * ssid1, IN mlan_802_11_ssid * ssid2);
+
+/** Associate */
+mlan_status wlan_associate(IN mlan_private * pmpriv,
+                           IN t_void * pioctl_buf,
+                           IN BSSDescriptor_t * pBSSDesc);
+
+/** Associate command handler */
+mlan_status wlan_cmd_802_11_associate(IN mlan_private * pmpriv,
+                                      IN HostCmd_DS_COMMAND * cmd,
+                                      IN t_void * pdata_buf);
+
+/** Handler for association command response */
+mlan_status wlan_ret_802_11_associate(IN mlan_private * pmpriv,
+                                      IN HostCmd_DS_COMMAND * resp,
+                                      IN t_void * pioctl_buf);
+
+/** Reset connected state */
+t_void wlan_reset_connect_state(IN pmlan_private priv, IN t_u8 drv_disconnect);
+
+t_void wlan_2040_coex_event(pmlan_private pmpriv);
+
+/** convert band to radio type */
+t_u8 wlan_band_to_radio_type(IN t_u8 band);
+
+/** Disconnect */
+mlan_status wlan_disconnect(IN mlan_private * pmpriv,
+                            IN mlan_ioctl_req * pioctl_req,
+                            IN mlan_802_11_mac_addr * mac);
+
+/** Ad-Hoc start */
+mlan_status wlan_adhoc_start(IN mlan_private * pmpriv,
+                             IN t_void * pioctl_buf,
+                             IN mlan_802_11_ssid * padhoc_ssid);
+
+/** Ad-Hoc join */
+mlan_status wlan_adhoc_join(IN mlan_private * pmpriv,
+                            IN t_void * pioctl_buf,
+                            IN BSSDescriptor_t * pBSSDesc);
+
+/** Ad-Hoc start command handler */
+mlan_status wlan_cmd_802_11_ad_hoc_start(IN mlan_private * pmpriv,
+                                         IN HostCmd_DS_COMMAND * cmd,
+                                         IN t_void * pdata_buf);
+
+/** Ad-Hoc command handler */
+mlan_status wlan_cmd_802_11_ad_hoc_join(IN mlan_private * pmpriv,
+                                        IN HostCmd_DS_COMMAND * cmd,
+                                        IN t_void * pdata_buf);
+
+/** Handler for Ad-Hoc commands */
+mlan_status wlan_ret_802_11_ad_hoc(IN mlan_private * pmpriv,
+                                   IN HostCmd_DS_COMMAND * resp,
+                                   IN t_void * pioctl_buf);
+
+/** Get Channel-Frequency-Power by band and channel */
+chan_freq_power_t *wlan_get_cfp_by_band_and_channel(pmlan_adapter pmadapter,
+                                                    t_u8 band, t_u16 channel,
+                                                    region_chan_t *
+                                                    region_channel);
+/** Find Channel-Frequency-Power by band and channel */
+chan_freq_power_t *wlan_find_cfp_by_band_and_channel(mlan_adapter * pmadapter,
+                                                     t_u8 band, t_u16 channel);
+/** Find Channel-Frequency-Power by band and frequency */
+chan_freq_power_t *wlan_find_cfp_by_band_and_freq(mlan_adapter * pmadapter,
+                                                  t_u8 band, t_u32 freq);
+/** Get Tx power of channel from Channel-Frequency-Power */
+t_u8 wlan_get_txpwr_of_chan_from_cfp(mlan_private * pmpriv, t_u8 channel);
+/** find frequency from band and channel */
+t_u32 wlan_find_freq_from_band_chan(t_u8, t_u8);
+
+/*  Save a beacon buffer of the current bss descriptor */
+t_void wlan_save_curr_bcn(IN mlan_private * pmpriv);
+/*  Free a beacon buffer of the current bss descriptor */
+t_void wlan_free_curr_bcn(IN mlan_private * pmpriv);
+
+#endif /* STA_SUPPORT */
+
+/* Rate related functions */
+/** Convert index into data rate */
+t_u32 wlan_index_to_data_rate(pmlan_adapter pmadapter, t_u8 index,
+                              t_u8 ht_info);
+/** Get active data rates */
+t_u32 wlan_get_active_data_rates(mlan_private * pmpriv, t_u32 bss_mode,
+                                 t_u8 config_bands, WLAN_802_11_RATES rates);
+/** Get supported data rates */
+t_u32 wlan_get_supported_rates(mlan_private * pmpriv, t_u32 bss_mode,
+                               t_u8 config_bands, WLAN_802_11_RATES rates);
+/** Convert data rate to index */
+t_u8 wlan_data_rate_to_index(pmlan_adapter pmadapter, t_u32 rate);
+/** Check if rate is auto */
+t_u8 wlan_is_rate_auto(mlan_private * pmpriv);
+/** Get rate index */
+int wlan_get_rate_index(pmlan_adapter pmadapter, t_u16 * rateBitmap, int size);
+
+/* CFP related functions */
+/** Region code index table */
+extern t_u16 region_code_index[MRVDRV_MAX_REGION_CODE];
+/** Set region table */
+mlan_status wlan_set_regiontable(mlan_private * pmpriv, t_u8 region, t_u8 band);
+/** Get radar detection requirements*/
+t_bool wlan_get_cfp_radar_detect(mlan_private * priv, t_u8 chnl);
+
+/* 802.11D related functions */
+/** Initialize 11D */
+t_void wlan_11d_priv_init(mlan_private * pmpriv);
+/** Initialize 11D */
+t_void wlan_11d_init(mlan_adapter * pmadapter);
+/** Enable 11D */
+mlan_status wlan_11d_enable(mlan_private * pmpriv, t_void * pioctl_buf,
+                            state_11d_t flag);
+/** Get if 11D is enabled */
+t_bool wlan_11d_is_enabled(mlan_private * pmpriv);
+/** Get if priv is station */
+t_bool wlan_is_station(mlan_private * pmpriv);
+/** Command handler for 11D country info */
+mlan_status wlan_cmd_802_11d_domain_info(mlan_private * pmpriv,
+                                         HostCmd_DS_COMMAND * pcmd,
+                                         t_u16 cmd_action);
+/** Handler for 11D country info command response */
+mlan_status wlan_ret_802_11d_domain_info(mlan_private * pmpriv,
+                                         HostCmd_DS_COMMAND * resp);
+#ifdef STA_SUPPORT
+/** Convert channel to frequency */
+t_u32 wlan_11d_chan_2_freq(pmlan_adapter pmadapter, t_u8 chan, t_u8 band);
+/** Set 11D universal table */
+mlan_status wlan_11d_set_universaltable(mlan_private * pmpriv, t_u8 band);
+/** Clear 11D region table */
+mlan_status wlan_11d_clear_parsedtable(mlan_private * pmpriv);
+/** Create 11D country information for downloading */
+mlan_status wlan_11d_create_dnld_countryinfo(mlan_private * pmpriv, t_u8 band);
+/** Get scan type from 11D info */
+t_u8 wlan_11d_get_scan_type(pmlan_adapter pmadapter, t_u8 band, t_u8 chan,
+                            parsed_region_chan_11d_t * parsed_region_chan);
+/** Parse 11D country info */
+mlan_status wlan_11d_parse_dnld_countryinfo(mlan_private * pmpriv,
+                                            BSSDescriptor_t * pBSSDesc);
+/** Prepare 11D domain information for download */
+mlan_status wlan_11d_prepare_dnld_domain_info_cmd(mlan_private * pmpriv);
+/** Parse 11D country information into domain info */
+mlan_status wlan_11d_parse_domain_info(pmlan_adapter pmadapter,
+                                       IEEEtypes_CountryInfoFullSet_t *
+                                       country_info, t_u8 band,
+                                       parsed_region_chan_11d_t *
+                                       parsed_region_chan);
+/** Configure 11D domain info command */
+mlan_status wlan_11d_cfg_domain_info(IN pmlan_adapter pmadapter,
+                                     IN mlan_ioctl_req * pioctl_req);
+#endif /* STA_SUPPORT */
+#ifdef UAP_SUPPORT
+/** Handle 11D domain information from UAP */
+mlan_status wlan_11d_handle_uap_domain_info(mlan_private * pmpriv,
+                                            t_u8 band,
+                                            t_u8 * domain_tlv,
+                                            t_void * pioctl_buf);
+#endif
+
+/** check if station list is empty */
+t_u8 wlan_is_station_list_empty(mlan_private * priv);
+/** get station node */
+sta_node *wlan_get_station_entry(mlan_private * priv, t_u8 * mac);
+/** delete station list */
+t_void wlan_delete_station_list(pmlan_private priv);
+/** delete station entry */
+t_void wlan_delete_station_entry(mlan_private * priv, t_u8 * mac);
+/** add station entry */
+sta_node *wlan_add_station_entry(mlan_private * priv, t_u8 * mac);
+/** process uap rx packet */
+
+/** find specific ie */
+t_u8 *wlan_get_specific_ie(pmlan_private priv, t_u8 * ie_buf, t_u8 ie_len,
+                           IEEEtypes_ElementId_e id);
+
+/**
+ *  @brief This function checks tx_pause flag for peer
+ *  
+ *  @param priv     A pointer to mlan_private
+ *  @param ra       Address of the receiver STA
+ *
+ *  @return 	    MTRUE or MFALSE
+ */
+static int INLINE
+wlan_is_tx_pause(mlan_private * priv, t_u8 * ra)
+{
+    sta_node *sta_ptr = MNULL;
+    if ((sta_ptr = wlan_get_station_entry(priv, ra))) {
+        return sta_ptr->tx_pause;
+    }
+    return MFALSE;
+}
+
+t_void wlan_updata_ralist_tx_pause(pmlan_private priv, t_u8 * mac,
+                                   t_u8 tx_pause);
+sta_node *wlan_get_tx_pause_station_entry(mlan_private * priv);
+
+#ifdef UAP_SUPPORT
+mlan_status wlan_process_uap_rx_packet(IN mlan_private * priv,
+                                       IN pmlan_buffer pmbuf);
+t_void wlan_drop_tx_pkts(pmlan_private priv);
+#endif /* UAP_SUPPORT */
+
+#ifdef UAP_SUPPORT
+/* process the recevied packet and bridge the packet */
+mlan_status wlan_uap_recv_packet(IN mlan_private * priv, IN pmlan_buffer pmbuf);
+#endif /* UAP_SUPPORT */
+
+mlan_status wlan_misc_ioctl_custom_ie_list(IN pmlan_adapter pmadapter,
+                                           IN pmlan_ioctl_req pioctl_req,
+                                           IN t_bool send_ioctl);
+
+mlan_status wlan_cmd_get_hw_spec(IN pmlan_private pmpriv,
+                                 IN HostCmd_DS_COMMAND * pcmd);
+mlan_status wlan_ret_get_hw_spec(IN pmlan_private pmpriv,
+                                 IN HostCmd_DS_COMMAND * resp,
+                                 IN t_void * pioctl_buf);
+
+mlan_status wlan_cmd_802_11_radio_control(IN pmlan_private pmpriv,
+                                          IN HostCmd_DS_COMMAND * cmd,
+                                          IN t_u16 cmd_action,
+                                          IN t_void * pdata_buf);
+mlan_status wlan_ret_802_11_radio_control(IN pmlan_private pmpriv,
+                                          IN HostCmd_DS_COMMAND * resp,
+                                          IN mlan_ioctl_req * pioctl_buf);
+
+mlan_status wlan_get_info_ver_ext(IN pmlan_adapter pmadapter,
+                                  IN pmlan_ioctl_req pioctl_req);
+
+/** 
+ *  @brief RA based queueing
+ *   
+ *  @param priv                 A pointer to mlan_private structure
+ *
+ *  @return 	   	        MTRUE or MFALSE
+ */
+static INLINE t_u8
+queuing_ra_based(pmlan_private priv)
+{
+    /* 
+     * Currently we assume if we are in Infra, then DA=RA. This might not be
+     * true in the future
+     */
+    if ((priv->bss_mode == MLAN_BSS_MODE_INFRA) &&
+        (GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_STA))
+        return MFALSE;
+
+    return MTRUE;
+}
+
+/** 
+ *  @brief Copy Rates
+ *   
+ *  @param dest                 A pointer to Dest Buf
+ *  @param pos		        The position for copy
+ *  @param src		        A pointer to Src Buf
+ *  @param len                  The len of Src Buf
+ *
+ *  @return 	   	        Number of Rates copied
+ */
+static INLINE t_u32
+wlan_copy_rates(t_u8 * dest, t_u32 pos, t_u8 * src, int len)
+{
+    int i;
+
+    for (i = 0; i < len && src[i]; i++, pos++) {
+        if (pos >= sizeof(WLAN_802_11_RATES))
+            break;
+        dest[pos] = src[i];
+    }
+
+    return pos;
+}
+
+/** 
+ *  @brief strlen
+ *   
+ *  @param str		        A pointer to string
+ *
+ *  @return 	   	        Length of string
+ */
+static INLINE t_u32
+wlan_strlen(const t_s8 * str)
+{
+    t_u32 i;
+
+    for (i = 0; str[i] != 0; i++) {
+    }
+    return i;
+}
+
+/**
+ *  @brief iscdigit
+ *
+ *  @param chr                  A char
+ *
+ *  @return                     Non zero if chr is a hex, else 0
+ */
+static INLINE t_u32
+wlan_isxdigit(t_u8 chr)
+{
+    return ((chr <= 'f' && chr >= 'a') || (chr <= 'F' && chr >= 'A') ||
+            (chr <= '9' && chr >= '0'));
+}
+
+/**
+ *  @brief isspace
+ *
+ *  @param                       A chr
+ *
+ *  @return                      Non zero if chr is space etc, else 0
+ */
+static INLINE t_u32
+wlan_isspace(t_u8 chr)
+{
+    return (chr <= ' ' && (chr == ' ' || (chr <= 13 && chr >= 9)));
+}
+
+/** delay unit */
+typedef enum _delay_unit
+{
+    USEC,
+    MSEC,
+    SEC,
+} t_delay_unit;
+
+/** delay function */
+t_void wlan_delay_func(mlan_adapter * pmadapter, t_u32 delay, t_delay_unit u);
+
+/** delay function wrapper */
+#define wlan_delay(p, n)   wlan_delay_func(p, n, SEC)
+/** delay function wrapper */
+#define wlan_mdelay(p, n)  wlan_delay_func(p, n, MSEC)
+/** delay function wrapper */
+#define wlan_udelay(p, n)  wlan_delay_func(p, n, USEC)
+
+/** Function to check if any command is pending in the queue */
+#define IS_COMMAND_PENDING(pmadapter) ((cmd_ctrl_node *)util_peek_list(pmadapter->pmoal_handle, \
+                                       &pmadapter->cmd_pending_q,\
+                                       pmadapter->callbacks.moal_spin_lock,\
+                                       pmadapter->callbacks.moal_spin_unlock))
+
+/** Get BSS number from priv */
+#define GET_BSS_NUM(priv)   (priv)->bss_num
+/** 
+ *  @brief This function returns priv based on the BSS num and BSS type
+ *  
+ *  @param pmadapter A pointer to mlan_adapter
+ *  @param bss_num   BSS number
+ *  @param bss_type  BSS type
+ *
+ *  @return          Pointer to mlan_private
+ */
+static INLINE mlan_private *
+wlan_get_priv_by_id(mlan_adapter * pmadapter, t_u32 bss_num, t_u32 bss_type)
+{
+    int i;
+
+    for (i = 0; i < pmadapter->priv_num; i++) {
+        if (pmadapter->priv[i]) {
+            if ((pmadapter->priv[i]->bss_num == bss_num) &&
+                (pmadapter->priv[i]->bss_type == bss_type))
+                break;
+        }
+    }
+    return ((i < pmadapter->priv_num) ? pmadapter->priv[i] : MNULL);
+}
+
+/** 
+ *  @brief This function returns first available priv
+ *  based on the BSS role
+ *  
+ *  @param pmadapter A pointer to mlan_adapter
+ *  @param bss_role  BSS role or MLAN_BSS_ROLE_ANY
+ *
+ *  @return          Pointer to mlan_private
+ */
+static INLINE mlan_private *
+wlan_get_priv(mlan_adapter * pmadapter, mlan_bss_role bss_role)
+{
+    int i;
+
+    for (i = 0; i < pmadapter->priv_num; i++) {
+        if (pmadapter->priv[i]) {
+            if (bss_role == MLAN_BSS_ROLE_ANY ||
+                GET_BSS_ROLE(pmadapter->priv[i]) == bss_role)
+                break;
+        }
+    }
+    return ((i < pmadapter->priv_num) ? pmadapter->priv[i] : MNULL);
+}
+
+/**
+ *  @brief This function counts the number of occurences for a certain
+ *  condition among privs.  Which privs are checked can be configured
+ *  via a second condition.
+ * 
+ *  @param pmadapter  A pointer to mlan_adapter
+ *  @param count_cond Function pointer to condition to count on privs
+ *  @param check_cond Function pointer to condition to decide whether priv
+ *                    should be counted or not.  Use MNULL to check all privs.
+ *
+ *  @return          Count of privs where count_cond returned MTRUE.
+ */
+static int INLINE
+wlan_count_priv_cond(mlan_adapter * pmadapter,
+                     t_bool(*count_cond) (IN pmlan_private pmpriv),
+                     t_bool(*check_cond) (IN pmlan_private pmpriv))
+{
+    pmlan_private pmpriv;
+    int count = 0;
+    int i;
+
+    if (pmadapter == MNULL || count_cond == MNULL)
+        return 0;
+
+    for (i = 0; i < pmadapter->priv_num; i++) {
+        if ((pmpriv = pmadapter->priv[i])) {
+            if ((check_cond == MNULL) || (check_cond && check_cond(pmpriv))) {
+                if (count_cond(pmpriv))
+                    count++;
+            }
+        }
+    }
+
+    return count;
+}
+
+#endif /* !_MLAN_MAIN_H_ */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_meas.c linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_meas.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_meas.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_meas.c	2017-09-23 03:42:50.122674747 +0800
@@ -0,0 +1,465 @@
+/**
+ * @file mlan_meas.c
+ *
+ *  @brief Implementation of measurement interface code with the app/firmware
+ *
+ *  Driver implementation for sending and retrieving measurement requests
+ *    and responses. 
+ *  
+ *  Current use is limited to 802.11h.
+ *
+ *  Requires use of the following preprocessor define:
+ *    - ENABLE_MEAS
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/*************************************************************
+Change Log:
+    03/24/2009: initial version
+************************************************************/
+
+#include "mlan.h"
+#include "mlan_join.h"
+#include "mlan_util.h"
+#include "mlan_fw.h"
+#include "mlan_main.h"
+#include "mlan_ioctl.h"
+#include "mlan_meas.h"
+
+/** Default measurement duration when not provided by the application */
+#define WLAN_MEAS_DEFAULT_MEAS_DURATION    1000U        /* TUs */
+
+#ifdef DEBUG_LEVEL2
+/** String descriptions of the different measurement enums.  Debug display */
+static const char *meas_type_str[WLAN_MEAS_NUM_TYPES] = {
+    "basic",
+};
+
+/********************************************************
+                Local Functions
+********************************************************/
+
+/** 
+ *  @brief Retrieve the measurement string representation of a meas_type enum
+ *  Used for debug display only
+ *
+ *  @param meas_type Measurement type enumeration input for string lookup
+ * 
+ *  @return         Constant string representing measurement type
+ */
+static const char *
+wlan_meas_get_meas_type_str(MeasType_t meas_type)
+{
+    if (meas_type <= WLAN_MEAS_11H_MAX_TYPE)
+        return meas_type_str[meas_type];
+
+    return "Invld";
+}
+#endif
+
+/**
+ *  @brief Debug print display of the input measurement request
+ *
+ *  @param pmeas_req  Pointer to the measurement request to display
+ *
+ *  @return          N/A
+ */
+static void
+wlan_meas_dump_meas_req(const HostCmd_DS_MEASUREMENT_REQUEST * pmeas_req)
+{
+    PRINTM(MINFO, "Meas: Req: ------------------------------\n");
+
+    PRINTM(MINFO, "Meas: Req: mac_addr: %02x:%02x:%02x:%02x:%02x:%02x\n",
+           pmeas_req->mac_addr[0],
+           pmeas_req->mac_addr[1],
+           pmeas_req->mac_addr[2],
+           pmeas_req->mac_addr[3],
+           pmeas_req->mac_addr[4], pmeas_req->mac_addr[5]);
+
+    PRINTM(MINFO, "Meas: Req:  dlgTkn: %d\n", pmeas_req->dialog_token);
+    PRINTM(MINFO, "Meas: Req:    mode: dm[%c] rpt[%c] req[%c]\n",
+           pmeas_req->req_mode.duration_mandatory ? 'X' : ' ',
+           pmeas_req->req_mode.report ? 'X' : ' ',
+           pmeas_req->req_mode.request ? 'X' : ' ');
+    PRINTM(MINFO, "Meas: Req:        : en[%c] par[%c]\n",
+           pmeas_req->req_mode.enable ? 'X' : ' ',
+           pmeas_req->req_mode.parallel ? 'X' : ' ');
+#ifdef DEBUG_LEVEL2
+    PRINTM(MINFO, "Meas: Req: measTyp: %s\n",
+           wlan_meas_get_meas_type_str(pmeas_req->meas_type));
+#endif
+
+    switch (pmeas_req->meas_type) {
+    case WLAN_MEAS_BASIC:
+        /* Lazy cheat, fields of bas, cca, rpi union match on the request */
+        PRINTM(MINFO, "Meas: Req: chan: %u\n", pmeas_req->req.basic.channel);
+        PRINTM(MINFO, "Meas: Req: strt: %llu\n",
+               wlan_le64_to_cpu(pmeas_req->req.basic.start_time));
+        PRINTM(MINFO, "Meas: Req:  dur: %u\n",
+               wlan_le16_to_cpu(pmeas_req->req.basic.duration));
+        break;
+    default:
+        PRINTM(MINFO, "Meas: Req: <unhandled>\n");
+        break;
+    }
+
+    PRINTM(MINFO, "Meas: Req: ------------------------------\n");
+}
+
+/**
+ *  @brief Debug print display of the input measurement report
+ *
+ *  @param pmeas_rpt  Pointer to measurement report to display
+ *
+ *  @return          N/A
+ */
+static void
+wlan_meas_dump_meas_rpt(const HostCmd_DS_MEASUREMENT_REPORT * pmeas_rpt)
+{
+    PRINTM(MINFO, "Meas: Rpt: ------------------------------\n");
+    PRINTM(MINFO, "Meas: Rpt: mac_addr: %02x:%02x:%02x:%02x:%02x:%02x\n",
+           pmeas_rpt->mac_addr[0],
+           pmeas_rpt->mac_addr[1],
+           pmeas_rpt->mac_addr[2],
+           pmeas_rpt->mac_addr[3],
+           pmeas_rpt->mac_addr[4], pmeas_rpt->mac_addr[5]);
+
+    PRINTM(MINFO, "Meas: Rpt:  dlgTkn: %d\n", pmeas_rpt->dialog_token);
+
+    PRINTM(MINFO, "Meas: Rpt: rptMode: (%x): Rfs[%c] ICp[%c] Lt[%c]\n",
+           *(t_u8 *) & pmeas_rpt->rpt_mode,
+           pmeas_rpt->rpt_mode.refused ? 'X' : ' ',
+           pmeas_rpt->rpt_mode.incapable ? 'X' : ' ',
+           pmeas_rpt->rpt_mode.late ? 'X' : ' ');
+#ifdef DEBUG_LEVEL2
+    PRINTM(MINFO, "Meas: Rpt: measTyp: %s\n",
+           wlan_meas_get_meas_type_str(pmeas_rpt->meas_type));
+#endif
+
+    switch (pmeas_rpt->meas_type) {
+    case WLAN_MEAS_BASIC:
+        PRINTM(MINFO, "Meas: Rpt: chan: %u\n", pmeas_rpt->rpt.basic.channel);
+        PRINTM(MINFO, "Meas: Rpt: strt: %llu\n",
+               wlan_le64_to_cpu(pmeas_rpt->rpt.basic.start_time));
+        PRINTM(MINFO, "Meas: Rpt:  dur: %u\n",
+               wlan_le16_to_cpu(pmeas_rpt->rpt.basic.duration));
+        PRINTM(MINFO, "Meas: Rpt:  bas: (%x): unmsd[%c], radar[%c]\n",
+               *(t_u8 *) & (pmeas_rpt->rpt.basic.map),
+               pmeas_rpt->rpt.basic.map.unmeasured ? 'X' : ' ',
+               pmeas_rpt->rpt.basic.map.radar ? 'X' : ' ');
+        PRINTM(MINFO, "Meas: Rpt:  bas: unidSig[%c] ofdm[%c] bss[%c]\n",
+               pmeas_rpt->rpt.basic.map.unidentified_sig ? 'X' : ' ',
+               pmeas_rpt->rpt.basic.map.ofdm_preamble ? 'X' : ' ',
+               pmeas_rpt->rpt.basic.map.bss ? 'X' : ' ');
+        break;
+    default:
+        PRINTM(MINFO, "Meas: Rpt: <unhandled>\n");
+        break;
+    }
+
+    PRINTM(MINFO, "Meas: Rpt: ------------------------------\n");
+}
+
+/**
+ *  @brief Retrieve a measurement report from the firmware
+ * 
+ *  Callback from command processing when a measurement report is received
+ *    from the firmware.  Perform the following when a report is received:
+ *
+ *   -# Debug displays the report if compiled with the appropriate flags
+ *   -# If we are pending on a specific measurement report token, and it 
+ *      matches the received report's token, store the report and wake up
+ *      any pending threads
+ *
+ *  @param pmpriv Private driver information structure
+ *  @param resp HostCmd_DS_COMMAND struct returned from the firmware command
+ *              passing a HostCmd_DS_MEASUREMENT_REPORT structure.    
+ *
+ *  @return     MLAN_STATUS_SUCCESS
+ */
+static int
+wlan_meas_cmdresp_get_report(mlan_private * pmpriv,
+                             const HostCmd_DS_COMMAND * resp)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    const HostCmd_DS_MEASUREMENT_REPORT *pmeas_rpt = &resp->params.meas_rpt;
+
+    ENTER();
+
+    PRINTM(MINFO, "Meas: Rpt: %#x-%u, Seq=%u, Ret=%u\n",
+           resp->command, resp->size, resp->seq_num, resp->result);
+
+    /* Debug displays the measurement report */
+    wlan_meas_dump_meas_rpt(pmeas_rpt);
+
+    /* 
+     * Check if we are pending on a measurement report and it matches 
+     *  the dialog token of the received report:
+     */
+    if (pmadapter->state_meas.meas_rpt_pend_on
+        && pmadapter->state_meas.meas_rpt_pend_on == pmeas_rpt->dialog_token) {
+        PRINTM(MINFO, "Meas: Rpt: RCV'd Pend on meas #%d\n",
+               pmadapter->state_meas.meas_rpt_pend_on);
+
+        /* Clear the pending report indicator */
+        pmadapter->state_meas.meas_rpt_pend_on = 0;
+
+        /* Copy the received report into the measurement state for retrieval */
+        memcpy(pmadapter, &pmadapter->state_meas.meas_rpt_returned, pmeas_rpt,
+               sizeof(pmadapter->state_meas.meas_rpt_returned));
+
+        /* 
+         * Wake up any threads pending on the wait queue
+         */
+        wlan_recv_event(pmpriv, MLAN_EVENT_ID_DRV_MEAS_REPORT, MNULL);
+    }
+
+    LEAVE();
+
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief Prepare CMD_MEASURMENT_REPORT firmware command
+ *
+ *  @param pmpriv     Private driver information structure
+ *  @param pcmd_ptr   Output parameter: Pointer to the command being prepared 
+ *                    for the firmware
+ *  @param pinfo_buf  HostCmd_DS_MEASUREMENT_REQUEST passed as void data block
+ *
+ *  @return          MLAN_STATUS_SUCCESS
+ */
+static int
+wlan_meas_cmd_request(mlan_private * pmpriv,
+                      HostCmd_DS_COMMAND * pcmd_ptr, const void *pinfo_buf)
+{
+    const HostCmd_DS_MEASUREMENT_REQUEST *pmeas_req =
+        (HostCmd_DS_MEASUREMENT_REQUEST *) pinfo_buf;
+
+    ENTER();
+
+    pcmd_ptr->command = HostCmd_CMD_MEASUREMENT_REQUEST;
+    pcmd_ptr->size = sizeof(HostCmd_DS_MEASUREMENT_REQUEST) + S_DS_GEN;
+
+    memcpy(pmpriv->adapter, &pcmd_ptr->params.meas_req, pmeas_req,
+           sizeof(pcmd_ptr->params.meas_req));
+
+    PRINTM(MINFO, "Meas: Req: %#x-%u, Seq=%u, Ret=%u\n",
+           pcmd_ptr->command, pcmd_ptr->size, pcmd_ptr->seq_num,
+           pcmd_ptr->result);
+
+    wlan_meas_dump_meas_req(pmeas_req);
+
+    LEAVE();
+
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief  Retrieve a measurement report from the firmware
+ *
+ *  The firmware will send a EVENT_MEAS_REPORT_RDY event when it 
+ *    completes or receives a measurement report.  The event response
+ *    handler will then start a HostCmd_CMD_MEASUREMENT_REPORT firmware command
+ *    which gets completed for transmission to the firmware in this routine.
+ *
+ *  @param pmpriv    Private driver information structure
+ *  @param pcmd_ptr  Output parameter: Pointer to the command being prepared 
+ *                   for the firmware
+ *
+ *  @return        MLAN_STATUS_SUCCESS
+ */
+static int
+wlan_meas_cmd_get_report(mlan_private * pmpriv, HostCmd_DS_COMMAND * pcmd_ptr)
+{
+    ENTER();
+
+    pcmd_ptr->command = HostCmd_CMD_MEASUREMENT_REPORT;
+    pcmd_ptr->size = sizeof(HostCmd_DS_MEASUREMENT_REPORT) + S_DS_GEN;
+
+    memset(pmpriv->adapter, &pcmd_ptr->params.meas_rpt, 0x00,
+           sizeof(pcmd_ptr->params.meas_rpt));
+
+    /* 
+     * Set the meas_rpt.mac_addr to our mac address to get a meas report,
+     *   setting the mac to another STA address instructs the firmware
+     *   to transmit this measurement report frame instead
+     */
+    memcpy(pmpriv->adapter, pcmd_ptr->params.meas_rpt.mac_addr,
+           pmpriv->curr_addr, sizeof(pcmd_ptr->params.meas_rpt.mac_addr));
+
+    LEAVE();
+
+    return MLAN_STATUS_SUCCESS;
+}
+
+/********************************************************
+                Global functions
+********************************************************/
+
+/** 
+ *  @brief Send the input measurement request to the firmware.
+ *
+ *  If the dialog token in the measurement request is set to 0, the function
+ *    will use an local static auto-incremented token in the measurement
+ *    request.  This ensures the dialog token is always set.
+ *
+ *  If wait_for_resp_timeout is set, the function will block its return on 
+ *     a timeout or returned measurement report that matches the requests
+ *     dialog token. 
+ *
+ *  @param pmpriv                  Private driver information structure
+ *  @param pmeas_req               Pointer to the measurement request to send
+ *  @param wait_for_resp_timeout   Timeout value of the measurement request
+ *                                 in ms.
+ *  @param pioctl_req              Pointer to IOCTL request buffer
+ *  @param pmeas_rpt               Output parameter: Pointer for the resulting
+ *                                 measurement report
+ *
+ *  @return
+ *    - 0 for success
+ *    - -ETIMEDOUT if the measurement report does not return before
+ *      the timeout expires
+ *    - Error return from wlan_prepare_cmd routine otherwise
+ */
+int
+wlan_meas_util_send_req(mlan_private * pmpriv,
+                        HostCmd_DS_MEASUREMENT_REQUEST * pmeas_req,
+                        t_u32 wait_for_resp_timeout, pmlan_ioctl_req pioctl_req,
+                        HostCmd_DS_MEASUREMENT_REPORT * pmeas_rpt)
+{
+    static t_u8 auto_dialog_tok = 0;
+    wlan_meas_state_t *pmeas_state = &pmpriv->adapter->state_meas;
+    int ret;
+
+    ENTER();
+
+    /* If dialogTok was set to 0 or not provided, autoset */
+    pmeas_req->dialog_token = (pmeas_req->dialog_token ?
+                               pmeas_req->dialog_token : ++auto_dialog_tok);
+
+    /* Check for rollover of the dialog token.  Avoid using 0 as a token */
+    pmeas_req->dialog_token = (pmeas_req->dialog_token ?
+                               pmeas_req->dialog_token : 1);
+
+    /* 
+     * If the request is to pend waiting for the result, set the dialog token
+     * of this measurement request in the state structure.  The measurement
+     * report handling routines can then check the incoming measurement
+     * reports for a match with this dialog token.  
+     */
+    if (wait_for_resp_timeout) {
+        pmeas_state->meas_rpt_pend_on = pmeas_req->dialog_token;
+        PRINTM(MINFO, "Meas: Req: START Pend on meas #%d\n",
+               pmeas_req->dialog_token);
+    }
+
+    /* Send the measurement request to the firmware */
+    ret = wlan_prepare_cmd(pmpriv, HostCmd_CMD_MEASUREMENT_REQUEST,
+                           HostCmd_ACT_GEN_SET,
+                           0, (t_void *) pioctl_req, (void *) pmeas_req);
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief  Prepare the HostCmd_DS_Command structure for a measurement command.
+ *
+ *  Use the Command field to determine if the command being set up is for
+ *     11h and call one of the local command handlers accordingly for:
+ *
+ *        - HostCmd_CMD_MEASUREMENT_REQUEST
+ *        - HostCmd_CMD_MEASUREMENT_REPORT
+ *
+ *  @param pmpriv     Private driver information structure
+ *  @param pcmd_ptr   Output parameter: Pointer to the command being prepared 
+ *                    for the firmware
+ *  @param pinfo_buf  Void buffer passthrough with data necessary for a
+ *                    specific command type
+ *
+ *  @return         MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ *
+ */
+int
+wlan_meas_cmd_process(mlan_private * pmpriv,
+                      HostCmd_DS_COMMAND * pcmd_ptr, const void *pinfo_buf)
+{
+    int ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+    switch (pcmd_ptr->command) {
+    case HostCmd_CMD_MEASUREMENT_REQUEST:
+        ret = wlan_meas_cmd_request(pmpriv, pcmd_ptr, pinfo_buf);
+        break;
+    case HostCmd_CMD_MEASUREMENT_REPORT:
+        ret = wlan_meas_cmd_get_report(pmpriv, pcmd_ptr);
+        break;
+    default:
+        ret = MLAN_STATUS_FAILURE;
+    }
+
+    pcmd_ptr->command = wlan_cpu_to_le16(pcmd_ptr->command);
+    pcmd_ptr->size = wlan_cpu_to_le16(pcmd_ptr->size);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Handle the command response from the firmware for a measurement 
+ *         command
+ *
+ *  Use the Command field to determine if the command response being
+ *    is for meas.  Call the local command response handler accordingly for:
+ *
+ *        - HostCmd_CMD_802_MEASUREMENT_REQUEST
+ *        - HostCmd_CMD_802_MEASUREMENT_REPORT
+ *
+ *  @param pmpriv Private driver information structure
+ *  @param resp   HostCmd_DS_COMMAND struct returned from the firmware command
+ *
+ *  @return     MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+int
+wlan_meas_cmdresp_process(mlan_private * pmpriv,
+                          const HostCmd_DS_COMMAND * resp)
+{
+    int ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+    switch (resp->command) {
+    case HostCmd_CMD_MEASUREMENT_REQUEST:
+        PRINTM(MINFO, "Meas: Req Resp: Sz=%u, Seq=%u, Ret=%u\n",
+               resp->size, resp->seq_num, resp->result);
+        break;
+    case HostCmd_CMD_MEASUREMENT_REPORT:
+        ret = wlan_meas_cmdresp_get_report(pmpriv, resp);
+        break;
+    default:
+        ret = MLAN_STATUS_FAILURE;
+    }
+
+    LEAVE();
+    return ret;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_meas.h linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_meas.h
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_meas.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_meas.h	2017-09-23 03:42:50.122674747 +0800
@@ -0,0 +1,60 @@
+/**
+ *  @file mlan_meas.h
+ *
+ *  @brief Interface for the measurement module implemented in mlan_meas.c
+ *
+ *  Driver interface functions and type declarations for the measurement module
+ *    implemented in mlan_meas.c
+ *  
+ *  @sa mlan_meas.c
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/*************************************************************
+Change Log:
+    03/25/2009: initial version
+************************************************************/
+
+#ifndef _MLAN_MEAS_H_
+#define _MLAN_MEAS_H_
+
+#include  "mlan_fw.h"
+
+/* Send a given measurement request to the firmware, report back the result */
+extern int
+wlan_meas_util_send_req(mlan_private * pmpriv,
+                        HostCmd_DS_MEASUREMENT_REQUEST * pmeas_req,
+                        t_u32 wait_for_resp_timeout, pmlan_ioctl_req pioctl_req,
+                        HostCmd_DS_MEASUREMENT_REPORT * pmeas_rpt);
+
+/* Setup a measurement command before it is sent to the firmware */
+extern int wlan_meas_cmd_process(mlan_private * pmpriv,
+                                 HostCmd_DS_COMMAND * pcmd_ptr,
+                                 const t_void * pinfo_buf);
+
+/* Handle a given measurement command response from the firmware */
+extern int wlan_meas_cmdresp_process(mlan_private * pmpriv,
+                                     const HostCmd_DS_COMMAND * resp);
+
+#endif /* _MLAN_MEAS_H_ */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_misc.c linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_misc.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_misc.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_misc.c	2017-09-23 03:42:50.126674734 +0800
@@ -0,0 +1,1852 @@
+/**
+ * @file mlan_misc.c
+ *
+ *  @brief This file include Miscellaneous functions for MLAN module
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2009 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/*************************************************************
+Change Log:
+    05/11/2009: initial version
+************************************************************/
+#include "mlan.h"
+#ifdef STA_SUPPORT
+#include "mlan_join.h"
+#endif /* STA_SUPPORT */
+#include "mlan_util.h"
+#include "mlan_fw.h"
+#include "mlan_main.h"
+#include "mlan_wmm.h"
+#include "mlan_11n.h"
+#ifdef UAP_SUPPORT
+#include "mlan_uap.h"
+#endif
+
+/********************************************************
+                Local Variables
+********************************************************/
+
+/********************************************************
+                Global Variables
+********************************************************/
+#if defined(STA_SUPPORT) && defined(UAP_SUPPORT)
+extern mlan_operations *mlan_ops[];
+#endif
+extern t_u8 ac_to_tid[4][2];
+
+/********************************************************
+                Local Functions
+********************************************************/
+
+/** Custom IE auto index and mask */
+#define	MLAN_CUSTOM_IE_AUTO_IDX_MASK	0xffff
+/** Custom IE mask for delete operation */
+#define	MLAN_CUSTOM_IE_DELETE_MASK      0
+/** Custom IE header size */
+#define	MLAN_CUSTOM_IE_HDR_SIZE         (sizeof(custom_ie)-MAX_IE_SIZE)
+
+/**
+ *  @brief Check if current custom IE index is used on other interfaces.
+ *
+ *  @param pmpriv   A pointer to mlan_private structure
+ *  @param idx		index to check for in use
+ *
+ *  @return		MLAN_STATUS_SUCCESS --unused, otherwise used. 
+ */
+static mlan_status
+wlan_is_custom_ie_index_unused(IN pmlan_private pmpriv, IN t_u16 idx)
+{
+    t_u8 i = 0;
+    pmlan_adapter pmadapter = pmpriv->adapter;
+    pmlan_private priv;
+    ENTER();
+
+    for (i = 0; i < pmadapter->priv_num; i++) {
+        priv = pmadapter->priv[i];
+        /* Check for other interfaces only */
+        if (priv && priv->bss_index != pmpriv->bss_index) {
+
+            if (priv->mgmt_ie[idx].mgmt_subtype_mask &&
+                priv->mgmt_ie[idx].ie_length) {
+                /* used entry found */
+                LEAVE();
+                return MLAN_STATUS_FAILURE;
+            }
+        }
+    }
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief Get the custom IE index
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *  @param mask	mask value for which the index to be returned
+ *  @param ie_data	a pointer to custom_ie structure
+ *  @param idx		will hold the computed index
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static mlan_status
+wlan_custom_ioctl_get_autoidx(IN pmlan_private pmpriv,
+                              IN pmlan_ioctl_req pioctl_req,
+                              IN t_u16 mask,
+                              IN custom_ie * ie_data, OUT t_u16 * idx)
+{
+    t_u16 index = 0, insert = MFALSE;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+    /* Determine the index where the IE needs to be inserted */
+    while (!insert) {
+        while (index < pmpriv->adapter->max_mgmt_ie_index) {
+            if (pmpriv->mgmt_ie[index].mgmt_subtype_mask == mask) {
+                /* Duplicate IE should be avoided */
+                if (pmpriv->mgmt_ie[index].ie_length) {
+                    if (!memcmp
+                        (pmpriv->adapter, pmpriv->mgmt_ie[index].ie_buffer,
+                         ie_data->ie_buffer,
+                         pmpriv->mgmt_ie[index].ie_length)) {
+                        PRINTM(MERROR,
+                               "IE with the same mask exists at index %d\n",
+                               index);
+                        *idx = MLAN_CUSTOM_IE_AUTO_IDX_MASK;
+                        goto done;
+                    }
+                }
+                /* Check if enough space is available */
+                if (pmpriv->mgmt_ie[index].ie_length + ie_data->ie_length >
+                    MAX_IE_SIZE) {
+                    index++;
+                    continue;
+                }
+                insert = MTRUE;
+                break;
+            }
+            index++;
+        }
+        if (!insert) {
+            for (index = 0; index < pmpriv->adapter->max_mgmt_ie_index; index++) {
+                if (pmpriv->mgmt_ie[index].ie_length == 0) {
+                    /* 
+                     * Check if this index is in use by other interface
+                     * If yes, move ahead to next index
+                     */
+                    if (MLAN_STATUS_SUCCESS ==
+                        wlan_is_custom_ie_index_unused(pmpriv, index)) {
+                        insert = MTRUE;
+                        break;
+                    } else {
+                        PRINTM(MINFO, "Skipping IE index %d in use.\n", index);
+                    }
+                }
+            }
+        }
+        if (index == pmpriv->adapter->max_mgmt_ie_index && !insert) {
+            PRINTM(MERROR, "Failed to Set the IE buffer\n");
+            if (pioctl_req)
+                pioctl_req->status_code = MLAN_ERROR_IOCTL_FAIL;
+            ret = MLAN_STATUS_FAILURE;
+            goto done;
+        }
+    }
+
+    *idx = index;
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Delete custom IE
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *  @param ie_data	a pointer to custom_ie structure
+ *  @param idx		index supplied
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+
+static mlan_status
+wlan_custom_ioctl_auto_delete(IN pmlan_private pmpriv,
+                              IN pmlan_ioctl_req pioctl_req,
+                              IN custom_ie * ie_data, IN t_u16 idx)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_adapter pmadapter = pmpriv->adapter;
+    t_u16 index = 0, insert = MFALSE, del_len;
+    t_u8 del_ie[MAX_IE_SIZE], ie[MAX_IE_SIZE];
+    t_s32 cnt, tmp_len = 0;
+    t_u8 *tmp_ie;
+
+    ENTER();
+    memset(pmpriv->adapter, del_ie, 0, MAX_IE_SIZE);
+    memcpy(pmpriv->adapter, del_ie, ie_data->ie_buffer, ie_data->ie_length);
+    del_len = ie_data->ie_length;
+    if (MLAN_CUSTOM_IE_AUTO_IDX_MASK == idx)
+        ie_data->ie_index = 0;
+
+    for (index = 0; index < pmadapter->max_mgmt_ie_index; index++) {
+        if (MLAN_CUSTOM_IE_AUTO_IDX_MASK != idx)
+            index = idx;
+        tmp_ie = pmpriv->mgmt_ie[index].ie_buffer;
+        tmp_len = pmpriv->mgmt_ie[index].ie_length;
+        cnt = 0;
+        while (tmp_len) {
+            if (!memcmp(pmpriv->adapter, tmp_ie, del_ie, del_len)) {
+                memcpy(pmpriv->adapter, ie, pmpriv->mgmt_ie[index].ie_buffer,
+                       cnt);
+                if (pmpriv->mgmt_ie[index].ie_length > (cnt + del_len))
+                    memcpy(pmpriv->adapter, &ie[cnt],
+                           &pmpriv->mgmt_ie[index].ie_buffer[cnt + del_len],
+                           (pmpriv->mgmt_ie[index].ie_length -
+                            (cnt + del_len)));
+                memset(pmpriv->adapter, &pmpriv->mgmt_ie[index].ie_buffer, 0,
+                       sizeof(pmpriv->mgmt_ie[index].ie_buffer));
+                memcpy(pmpriv->adapter, &pmpriv->mgmt_ie[index].ie_buffer, ie,
+                       pmpriv->mgmt_ie[index].ie_length - del_len);
+                pmpriv->mgmt_ie[index].ie_length -= del_len;
+                if (MLAN_CUSTOM_IE_AUTO_IDX_MASK == idx)
+                    /* set a bit to indicate caller about update */
+                    ie_data->ie_index |= (((t_u16) 1) << index);
+                insert = MTRUE;
+                tmp_ie = pmpriv->mgmt_ie[index].ie_buffer;
+                tmp_len = pmpriv->mgmt_ie[index].ie_length;
+                cnt = 0;
+                continue;
+            }
+            tmp_ie++;
+            tmp_len--;
+            cnt++;
+        }
+        if (MLAN_CUSTOM_IE_AUTO_IDX_MASK != idx)
+            break;
+    }
+    if (index == pmadapter->max_mgmt_ie_index && !insert) {
+        PRINTM(MERROR, "Failed to Clear IE buffer\n");
+        if (pioctl_req)
+            pioctl_req->status_code = MLAN_ERROR_IOCTL_FAIL;
+        ret = MLAN_STATUS_FAILURE;
+    }
+    LEAVE();
+    return ret;
+}
+
+/********************************************************
+                Global Functions
+********************************************************/
+
+/** 
+ *  @brief send host cmd
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+mlan_status
+wlan_misc_ioctl_host_cmd(IN pmlan_adapter pmadapter,
+                         IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_misc_cfg *misc = MNULL;
+
+    ENTER();
+
+    misc = (mlan_ds_misc_cfg *) pioctl_req->pbuf;
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           0,
+                           0,
+                           0,
+                           (t_void *) pioctl_req,
+                           (t_void *) & misc->param.hostcmd);
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Send function init/shutdown command to firmware
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+mlan_status
+wlan_misc_ioctl_init_shutdown(IN pmlan_adapter pmadapter,
+                              IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ds_misc_cfg *misc_cfg = MNULL;
+    t_u16 cmd;
+
+    ENTER();
+
+    misc_cfg = (mlan_ds_misc_cfg *) pioctl_req->pbuf;
+    if (misc_cfg->param.func_init_shutdown == MLAN_FUNC_INIT)
+        cmd = HostCmd_CMD_FUNC_INIT;
+    else if (misc_cfg->param.func_init_shutdown == MLAN_FUNC_SHUTDOWN)
+        cmd = HostCmd_CMD_FUNC_SHUTDOWN;
+    else {
+        PRINTM(MERROR, "Unsupported parameter\n");
+        pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        ret = MLAN_STATUS_FAILURE;
+        goto exit;
+    }
+
+    /* Send command to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           cmd,
+                           HostCmd_ACT_GEN_SET,
+                           0, (t_void *) pioctl_req, MNULL);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+  exit:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Get debug information
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success
+ */
+mlan_status
+wlan_get_info_debug_info(IN pmlan_adapter pmadapter,
+                         IN pmlan_ioctl_req pioctl_req)
+{
+    pmlan_private pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ds_get_info *info;
+    t_u8 *ptid;
+
+    ENTER();
+
+    info = (mlan_ds_get_info *) pioctl_req->pbuf;
+
+    if (pioctl_req->action == MLAN_ACT_SET) {
+        pmadapter->max_tx_buf_size =
+            (t_u16) info->param.debug_info.max_tx_buf_size;
+        pmadapter->tx_buf_size = (t_u16) info->param.debug_info.tx_buf_size;
+        pmadapter->curr_tx_buf_size =
+            (t_u16) info->param.debug_info.curr_tx_buf_size;
+        pmadapter->ps_mode = info->param.debug_info.ps_mode;
+        pmadapter->ps_state = info->param.debug_info.ps_state;
+        pmadapter->pm_wakeup_card_req =
+            info->param.debug_info.pm_wakeup_card_req;
+        pmadapter->pm_wakeup_fw_try = info->param.debug_info.pm_wakeup_fw_try;
+        pmadapter->is_hs_configured = info->param.debug_info.is_hs_configured;
+        pmadapter->hs_activated = info->param.debug_info.hs_activated;
+        pmadapter->pps_uapsd_mode = info->param.debug_info.pps_uapsd_mode;
+        pmadapter->sleep_period.period = info->param.debug_info.sleep_pd;
+        pmpriv->wmm_qosinfo = info->param.debug_info.qos_cfg;
+        pmadapter->tx_lock_flag = info->param.debug_info.tx_lock_flag;
+        pmpriv->port_open = info->param.debug_info.port_open;
+        pmadapter->scan_processing = info->param.debug_info.scan_processing;
+
+        pmadapter->dbg.num_cmd_host_to_card_failure =
+            info->param.debug_info.num_cmd_host_to_card_failure;
+        pmadapter->dbg.num_cmd_sleep_cfm_host_to_card_failure =
+            info->param.debug_info.num_cmd_sleep_cfm_host_to_card_failure;
+        pmadapter->dbg.num_tx_host_to_card_failure =
+            info->param.debug_info.num_tx_host_to_card_failure;
+        pmadapter->dbg.num_card_to_host_failure =
+            info->param.debug_info.num_card_to_host_failure;
+        pmadapter->dbg.num_event_deauth =
+            info->param.debug_info.num_event_deauth;
+        pmadapter->dbg.num_event_disassoc =
+            info->param.debug_info.num_event_disassoc;
+        pmadapter->dbg.num_event_link_lost =
+            info->param.debug_info.num_event_link_lost;
+        pmadapter->dbg.num_cmd_deauth = info->param.debug_info.num_cmd_deauth;
+        pmadapter->dbg.num_cmd_assoc_success =
+            info->param.debug_info.num_cmd_assoc_success;
+        pmadapter->dbg.num_cmd_assoc_failure =
+            info->param.debug_info.num_cmd_assoc_failure;
+        pmadapter->dbg.num_tx_timeout = info->param.debug_info.num_tx_timeout;
+        pmadapter->dbg.num_cmd_timeout = info->param.debug_info.num_cmd_timeout;
+        pmadapter->dbg.timeout_cmd_id = info->param.debug_info.timeout_cmd_id;
+        pmadapter->dbg.timeout_cmd_act = info->param.debug_info.timeout_cmd_act;
+        memcpy(pmadapter, pmadapter->dbg.last_cmd_id,
+               info->param.debug_info.last_cmd_id,
+               sizeof(pmadapter->dbg.last_cmd_id));
+        memcpy(pmadapter, pmadapter->dbg.last_cmd_act,
+               info->param.debug_info.last_cmd_act,
+               sizeof(pmadapter->dbg.last_cmd_act));
+        pmadapter->dbg.last_cmd_index = info->param.debug_info.last_cmd_index;
+        memcpy(pmadapter, pmadapter->dbg.last_cmd_resp_id,
+               info->param.debug_info.last_cmd_resp_id,
+               sizeof(pmadapter->dbg.last_cmd_resp_id));
+        pmadapter->dbg.last_cmd_resp_index =
+            info->param.debug_info.last_cmd_resp_index;
+        memcpy(pmadapter, pmadapter->dbg.last_event,
+               info->param.debug_info.last_event,
+               sizeof(pmadapter->dbg.last_event));
+        pmadapter->dbg.last_event_index =
+            info->param.debug_info.last_event_index;
+
+        pmadapter->data_sent = info->param.debug_info.data_sent;
+        pmadapter->cmd_sent = info->param.debug_info.cmd_sent;
+        pmadapter->cmd_resp_received = info->param.debug_info.cmd_resp_received;
+#ifdef UAP_SUPPORT
+        pmadapter->pending_bridge_pkts = info->param.debug_info.num_bridge_pkts;
+        pmpriv->num_drop_pkts = info->param.debug_info.num_drop_pkts;
+#endif
+    } else {                    /* MLAN_ACT_GET */
+        ptid = ac_to_tid[WMM_AC_BK];
+        info->param.debug_info.wmm_ac_bk =
+            pmpriv->wmm.packets_out[ptid[0]] + pmpriv->wmm.packets_out[ptid[1]];
+        ptid = ac_to_tid[WMM_AC_BE];
+        info->param.debug_info.wmm_ac_be =
+            pmpriv->wmm.packets_out[ptid[0]] + pmpriv->wmm.packets_out[ptid[1]];
+        ptid = ac_to_tid[WMM_AC_VI];
+        info->param.debug_info.wmm_ac_vi =
+            pmpriv->wmm.packets_out[ptid[0]] + pmpriv->wmm.packets_out[ptid[1]];
+        ptid = ac_to_tid[WMM_AC_VO];
+        info->param.debug_info.wmm_ac_vo =
+            pmpriv->wmm.packets_out[ptid[0]] + pmpriv->wmm.packets_out[ptid[1]];
+        info->param.debug_info.max_tx_buf_size =
+            (t_u32) pmadapter->max_tx_buf_size;
+        info->param.debug_info.tx_buf_size = (t_u32) pmadapter->tx_buf_size;
+        info->param.debug_info.curr_tx_buf_size =
+            (t_u32) pmadapter->curr_tx_buf_size;
+        info->param.debug_info.rx_tbl_num =
+            wlan_get_rxreorder_tbl(pmpriv, info->param.debug_info.rx_tbl);
+        info->param.debug_info.tx_tbl_num =
+            wlan_get_txbastream_tbl(pmpriv, info->param.debug_info.tx_tbl);
+        info->param.debug_info.ps_mode = pmadapter->ps_mode;
+        info->param.debug_info.ps_state = pmadapter->ps_state;
+        info->param.debug_info.pm_wakeup_card_req =
+            pmadapter->pm_wakeup_card_req;
+        info->param.debug_info.pm_wakeup_fw_try = pmadapter->pm_wakeup_fw_try;
+        info->param.debug_info.is_hs_configured = pmadapter->is_hs_configured;
+        info->param.debug_info.hs_activated = pmadapter->hs_activated;
+        info->param.debug_info.pps_uapsd_mode = pmadapter->pps_uapsd_mode;
+        info->param.debug_info.sleep_pd = pmadapter->sleep_period.period;
+        info->param.debug_info.qos_cfg = pmpriv->wmm_qosinfo;
+        info->param.debug_info.tx_lock_flag = pmadapter->tx_lock_flag;
+        info->param.debug_info.port_open = pmpriv->port_open;
+        info->param.debug_info.scan_processing = pmadapter->scan_processing;
+
+        info->param.debug_info.num_cmd_host_to_card_failure
+            = pmadapter->dbg.num_cmd_host_to_card_failure;
+        info->param.debug_info.num_cmd_sleep_cfm_host_to_card_failure
+            = pmadapter->dbg.num_cmd_sleep_cfm_host_to_card_failure;
+        info->param.debug_info.num_tx_host_to_card_failure
+            = pmadapter->dbg.num_tx_host_to_card_failure;
+        info->param.debug_info.num_card_to_host_failure =
+            pmadapter->dbg.num_card_to_host_failure;
+        info->param.debug_info.num_event_deauth =
+            pmadapter->dbg.num_event_deauth;
+        info->param.debug_info.num_event_disassoc =
+            pmadapter->dbg.num_event_disassoc;
+        info->param.debug_info.num_event_link_lost =
+            pmadapter->dbg.num_event_link_lost;
+        info->param.debug_info.num_cmd_deauth = pmadapter->dbg.num_cmd_deauth;
+        info->param.debug_info.num_cmd_assoc_success =
+            pmadapter->dbg.num_cmd_assoc_success;
+        info->param.debug_info.num_cmd_assoc_failure =
+            pmadapter->dbg.num_cmd_assoc_failure;
+        info->param.debug_info.num_tx_timeout = pmadapter->dbg.num_tx_timeout;
+        info->param.debug_info.num_cmd_timeout = pmadapter->dbg.num_cmd_timeout;
+        info->param.debug_info.timeout_cmd_id = pmadapter->dbg.timeout_cmd_id;
+        info->param.debug_info.timeout_cmd_act = pmadapter->dbg.timeout_cmd_act;
+        memcpy(pmadapter, info->param.debug_info.last_cmd_id,
+               pmadapter->dbg.last_cmd_id, sizeof(pmadapter->dbg.last_cmd_id));
+        memcpy(pmadapter, info->param.debug_info.last_cmd_act,
+               pmadapter->dbg.last_cmd_act,
+               sizeof(pmadapter->dbg.last_cmd_act));
+        info->param.debug_info.last_cmd_index = pmadapter->dbg.last_cmd_index;
+        memcpy(pmadapter, info->param.debug_info.last_cmd_resp_id,
+               pmadapter->dbg.last_cmd_resp_id,
+               sizeof(pmadapter->dbg.last_cmd_resp_id));
+        info->param.debug_info.last_cmd_resp_index =
+            pmadapter->dbg.last_cmd_resp_index;
+        memcpy(pmadapter, info->param.debug_info.last_event,
+               pmadapter->dbg.last_event, sizeof(pmadapter->dbg.last_event));
+        info->param.debug_info.last_event_index =
+            pmadapter->dbg.last_event_index;
+
+        info->param.debug_info.data_sent = pmadapter->data_sent;
+        info->param.debug_info.cmd_sent = pmadapter->cmd_sent;
+        info->param.debug_info.cmd_resp_received = pmadapter->cmd_resp_received;
+        info->param.debug_info.tx_pkts_queued =
+            util_scalar_read(pmadapter->pmoal_handle,
+                             &pmpriv->wmm.tx_pkts_queued, MNULL, MNULL);
+#ifdef UAP_SUPPORT
+        info->param.debug_info.num_bridge_pkts = pmadapter->pending_bridge_pkts;
+        info->param.debug_info.num_drop_pkts = pmpriv->num_drop_pkts;
+#endif
+    }
+
+    pioctl_req->data_read_written =
+        sizeof(mlan_debug_info) + MLAN_SUB_COMMAND_SIZE;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief This timer function handles host to device heart beat.
+ *  It sends a HeartBeat command if there is not any traffic from
+ *  host to device during last heart beat time period.
+ *  
+ *  @param function_context   A pointer to function_context
+ *  @return 	   N/A
+ */
+t_void
+wlan_host_heart_beat(void *function_context)
+{
+    pmlan_adapter pmadapter = (pmlan_adapter) function_context;
+    pmlan_callbacks pcb = (pmlan_callbacks) & pmadapter->callbacks;
+
+    ENTER();
+
+    if ((pmadapter->is_hb_ignored == MFALSE)
+#ifdef STA_SUPPORT
+        && (pmadapter->is_hs_configured == MFALSE)
+#endif /* STA_SUPPORT */
+        ) {
+        if ((pmadapter->host_to_dev_traffic <= 1)
+            && (!pmadapter->curr_cmd)) {
+            pmadapter->host_to_dev_traffic = 0;
+            wlan_prepare_cmd(wlan_get_priv(pmadapter, MLAN_BSS_ROLE_ANY),
+                             HostCmd_CMD_HEART_BEAT,
+                             HostCmd_ACT_GEN_GET, 0, MNULL, MNULL);
+            /* Signal MOAL to trigger mlan_main_process */
+            wlan_recv_event(wlan_get_priv(pmadapter, MLAN_BSS_ROLE_ANY),
+                            MLAN_EVENT_ID_DRV_DEFER_HANDLING, MNULL);
+        } else {
+            pmadapter->host_to_dev_traffic = 1;
+        }
+    }
+    pcb->moal_start_timer(pmadapter->pmoal_handle, pmadapter->hb_host_timer,
+                          MFALSE, pmadapter->hb_host_time);
+
+    LEAVE();
+}
+
+/** 
+ *  @brief This timer function handles device to host heart beat.
+ *  It's a fatal error if there is not any traffic from device
+ *  to host during last two heart beat time periods.
+ *  
+ *  @param function_context    A pointer to function_context
+ *  @return 	   N/A
+ */
+t_void
+wlan_device_heart_beat(void *function_context)
+{
+    pmlan_adapter pmadapter = (pmlan_adapter) function_context;
+    pmlan_callbacks pcb = (pmlan_callbacks) & pmadapter->callbacks;
+
+    ENTER();
+
+    if ((pmadapter->is_hb_ignored == MFALSE)
+#ifdef STA_SUPPORT
+        && (pmadapter->is_hs_configured == MFALSE)
+#endif /* STA_SUPPORT */
+        ) {
+        pmadapter->hb_dev_counter++;
+        if (pmadapter->hb_dev_counter > 2) {
+            pmadapter->hb_dev_counter = 0;
+            PRINTM(MFATAL, "ERROR: No heart beat from device!\n");
+        }
+    }
+    pcb->moal_start_timer(pmadapter->pmoal_handle, pmadapter->hb_device_timer,
+                          MFALSE, pmadapter->hb_dev_time);
+
+    LEAVE();
+}
+
+/**
+ *  @brief This function wakes up the card.
+ *
+ *  @param pmadapter		A pointer to mlan_adapter structure
+ *
+ *  @return			MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_pm_wakeup_card(IN pmlan_adapter pmadapter)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+    PRINTM(MEVENT, "Wakeup device...\n");
+    /* Simulation of HS_AWAKE event */
+    pmadapter->pm_wakeup_fw_try = MFALSE;
+    pmadapter->pm_wakeup_card_req = MFALSE;
+    /* TODO USB suspend/resume */
+    pmadapter->ps_state = PS_STATE_AWAKE;
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function resets the PM setting of the card.
+ *
+ *  @param pmadapter		A pointer to mlan_adapter structure
+ *
+ *  @return			MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_pm_reset_card(IN pmlan_adapter pmadapter)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get HS configuration
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING --success, otherwise fail
+ */
+mlan_status
+wlan_pm_ioctl_hscfg(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_pm_cfg *pm = MNULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    t_u32 prev_cond = 0;
+
+    ENTER();
+
+    pm = (mlan_ds_pm_cfg *) pioctl_req->pbuf;
+
+    switch (pioctl_req->action) {
+    case MLAN_ACT_SET:
+#ifdef STA_SUPPORT
+        if (pmadapter->pps_uapsd_mode) {
+            PRINTM(MINFO, "Host Sleep IOCTL is blocked in UAPSD/PPS mode\n");
+            pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+            status = MLAN_STATUS_FAILURE;
+            break;
+        }
+#endif /* STA_SUPPORT */
+        if (pm->param.hs_cfg.is_invoke_hostcmd == MTRUE) {
+            if (pm->param.hs_cfg.conditions == HOST_SLEEP_CFG_CANCEL) {
+                if (pmadapter->is_hs_configured == MFALSE) {
+                    /* Already cancelled */
+                    break;
+                }
+                /* Save previous condition */
+                prev_cond = pmadapter->hs_cfg.conditions;
+                pmadapter->hs_cfg.conditions = pm->param.hs_cfg.conditions;
+            } else if (pmadapter->hs_cfg.conditions == HOST_SLEEP_CFG_CANCEL) {
+                /* Return failure if no parameters for HS enable */
+                pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+                status = MLAN_STATUS_FAILURE;
+                break;
+            }
+            status = wlan_prepare_cmd(pmpriv,
+                                      HostCmd_CMD_802_11_HS_CFG_ENH,
+                                      HostCmd_ACT_GEN_SET,
+                                      0, (t_void *) pioctl_req,
+                                      (t_void *) (&pmadapter->hs_cfg));
+            if (status == MLAN_STATUS_SUCCESS)
+                status = MLAN_STATUS_PENDING;
+            if (pm->param.hs_cfg.conditions == HOST_SLEEP_CFG_CANCEL) {
+                /* Restore previous condition */
+                pmadapter->hs_cfg.conditions = prev_cond;
+            }
+        } else {
+            pmadapter->hs_cfg.conditions = pm->param.hs_cfg.conditions;
+            pmadapter->hs_cfg.gpio = (t_u8) pm->param.hs_cfg.gpio;
+            pmadapter->hs_cfg.gap = (t_u8) pm->param.hs_cfg.gap;
+        }
+        break;
+    case MLAN_ACT_GET:
+        pm->param.hs_cfg.conditions = pmadapter->hs_cfg.conditions;
+        pm->param.hs_cfg.gpio = pmadapter->hs_cfg.gpio;
+        pm->param.hs_cfg.gap = pmadapter->hs_cfg.gap;
+        break;
+    default:
+        pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        status = MLAN_STATUS_FAILURE;
+        break;
+    }
+
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief This function allocates a mlan_buffer.
+ *
+ *  @param pmadapter Pointer to mlan_adapter
+ *  @param data_len   Data length
+ *  @param head_room  head_room reserved in mlan_buffer
+ *  @param malloc_flag  flag to user moal_malloc 
+ *  @return           mlan_buffer pointer or MNULL
+ */
+pmlan_buffer
+wlan_alloc_mlan_buffer(mlan_adapter * pmadapter, t_u32 data_len,
+                       t_u32 head_room, t_u32 malloc_flag)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_buffer pmbuf = MNULL;
+    t_u32 buf_size = 0;
+    t_u8 *tmp_buf = MNULL;
+    pmlan_callbacks pcb = &pmadapter->callbacks;
+
+    ENTER();
+
+    /* head_room is not implemented for malloc mlan buffer */
+    if (malloc_flag == MTRUE) {
+        buf_size = sizeof(mlan_buffer) + data_len + DMA_ALIGNMENT;
+        ret =
+            pcb->moal_malloc(pmadapter->pmoal_handle, buf_size,
+                             MLAN_MEM_DEF | MLAN_MEM_DMA, (t_u8 **) & pmbuf);
+        if ((ret != MLAN_STATUS_SUCCESS) || !pmbuf) {
+            pmbuf = MNULL;
+            goto exit;
+        }
+        memset(pmadapter, pmbuf, 0, sizeof(mlan_buffer));
+
+        pmbuf->pdesc = MNULL;
+        /* Align address */
+        pmbuf->pbuf =
+            (t_u8 *) ALIGN_ADDR((t_u8 *) pmbuf + sizeof(mlan_buffer),
+                                DMA_ALIGNMENT);
+        pmbuf->data_offset = 0;
+        pmbuf->data_len = data_len;
+        pmbuf->flags |= MLAN_BUF_FLAG_MALLOC_BUF;
+    } else {
+        /* use moal_alloc_mlan_buffer, head_room supported */
+        ret = pcb->moal_alloc_mlan_buffer(pmadapter->pmoal_handle,
+                                          data_len + DMA_ALIGNMENT + head_room,
+                                          &pmbuf);
+        if ((ret != MLAN_STATUS_SUCCESS) || !pmbuf) {
+            PRINTM(MERROR, "Failed to allocate 'mlan_buffer'\n");
+            goto exit;
+        }
+        pmbuf->data_offset = head_room;
+        tmp_buf =
+            (t_u8 *) ALIGN_ADDR(pmbuf->pbuf + pmbuf->data_offset,
+                                DMA_ALIGNMENT);
+        pmbuf->data_offset +=
+            (t_u32) (tmp_buf - (pmbuf->pbuf + pmbuf->data_offset));
+        pmbuf->data_len = data_len;
+        pmbuf->flags = 0;
+    }
+  exit:
+    LEAVE();
+    return pmbuf;
+}
+
+/** 
+ *  @brief This function frees a mlan_buffer.
+ *
+ *  @param pmadapter  Pointer to mlan_adapter
+ *  @param pmbuf      Pointer to mlan_buffer
+ *
+ *  @return           N/A
+ */
+t_void
+wlan_free_mlan_buffer(mlan_adapter * pmadapter, pmlan_buffer pmbuf)
+{
+    pmlan_callbacks pcb = &pmadapter->callbacks;
+    ENTER();
+
+    if (pcb && pmbuf) {
+        if (pmbuf->flags & MLAN_BUF_FLAG_MALLOC_BUF)
+            pcb->moal_mfree(pmadapter->pmoal_handle, (t_u8 *) pmbuf);
+        else
+            pcb->moal_free_mlan_buffer(pmadapter->pmoal_handle, pmbuf);
+    }
+
+    LEAVE();
+    return;
+}
+
+/** 
+ *  @brief Delay function implementation
+ *   
+ *  @param pmadapter        A pointer to mlan_adapter structure
+ *  @param delay            Delay value
+ *  @param u                Units of delay (sec, msec or usec)
+ *
+ *  @return                 N/A
+ */
+t_void
+wlan_delay_func(mlan_adapter * pmadapter, t_u32 delay, t_delay_unit u)
+{
+    t_u32 now_tv_sec, now_tv_usec;
+    t_u32 upto_tv_sec, upto_tv_usec;
+    pmlan_callbacks pcb = &pmadapter->callbacks;
+
+    if (pcb->moal_udelay) {
+        if (u == SEC) {
+            delay *= 1000000;
+        } else if (u == MSEC) {
+            delay *= 1000;
+        }
+        pcb->moal_udelay(pmadapter->pmoal_handle, delay);
+    } else {
+
+        pcb->moal_get_system_time(pmadapter->pmoal_handle, &upto_tv_sec,
+                                  &upto_tv_usec);
+
+        switch (u) {
+        case SEC:
+            upto_tv_sec += delay;
+            break;
+        case MSEC:
+            delay *= 1000;
+        case USEC:
+            upto_tv_sec += (delay / 1000000);
+            upto_tv_usec += (delay % 1000000);
+            break;
+        }
+
+        do {
+            pcb->moal_get_system_time(pmadapter->pmoal_handle, &now_tv_sec,
+                                      &now_tv_usec);
+            if (now_tv_sec > upto_tv_sec)
+                return;
+
+            if ((now_tv_sec == upto_tv_sec) && (now_tv_usec >= upto_tv_usec))
+                return;
+        } while (MTRUE);
+    }
+    return;
+}
+
+#if defined(STA_SUPPORT) && defined(UAP_SUPPORT)
+/** 
+ *  @brief Set/Get BSS role
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success, MLAN_STATUS_PENDING --pending
+ */
+mlan_status
+wlan_bss_ioctl_bss_role(IN pmlan_adapter pmadapter,
+                        IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_bss *bss = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    HostCmd_DS_VERSION_EXT dummy;
+    pmlan_callbacks pcb = &pmadapter->callbacks;
+    pmlan_buffer pmbuf;
+#if defined(WFD_SUPPORT)
+    t_u8 bss_mode;
+#endif
+    int j;
+
+    ENTER();
+
+    bss = (mlan_ds_bss *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_GET) {
+        bss->param.bss_role = GET_BSS_ROLE(pmpriv);
+    } else {
+                /** Switch BSS role */
+        wlan_free_priv(pmpriv);
+
+        while ((pmbuf =
+                (pmlan_buffer) util_dequeue_list(pmadapter->pmoal_handle,
+                                                 &pmadapter->rx_data_queue,
+                                                 pcb->moal_spin_lock,
+                                                 pcb->moal_spin_unlock))) {
+            pcb->moal_recv_complete(pmadapter->pmoal_handle, pmbuf,
+                                    MLAN_USB_EP_DATA, MLAN_STATUS_FAILURE);
+        }
+        pmpriv->bss_role = bss->param.bss_role;
+        if (pmpriv->bss_type == MLAN_BSS_TYPE_UAP)
+            pmpriv->bss_type = MLAN_BSS_TYPE_STA;
+        else if (pmpriv->bss_type == MLAN_BSS_TYPE_STA)
+            pmpriv->bss_type = MLAN_BSS_TYPE_UAP;
+
+        /* Initialize private structures */
+        wlan_init_priv(pmpriv);
+
+        /* Initialize function table */
+        for (j = 0; mlan_ops[j]; j++) {
+            if (mlan_ops[j]->bss_role == GET_BSS_ROLE(pmpriv)) {
+                memcpy(pmadapter, &pmpriv->ops, mlan_ops[j],
+                       sizeof(mlan_operations));
+            }
+        }
+
+        /* Issue commands to initialize firmware */
+#if defined(WFD_SUPPORT)
+        if (GET_BSS_ROLE(pmpriv) == MLAN_BSS_ROLE_STA)
+            bss_mode = BSS_MODE_WFD_CLIENT;
+        else
+            bss_mode = BSS_MODE_WFD_GO;
+        wlan_prepare_cmd(pmpriv, HostCmd_CMD_SET_BSS_MODE,
+                         HostCmd_ACT_GEN_SET, 0, MNULL, &bss_mode);
+#endif
+        pmpriv->ops.init_cmd(pmpriv, MFALSE);
+
+        /* Issue dummy Get command to complete the ioctl */
+        memset(pmadapter, &dummy, 0, sizeof(HostCmd_DS_VERSION_EXT));
+        wlan_prepare_cmd(pmpriv, HostCmd_CMD_VERSION_EXT, HostCmd_ACT_GEN_GET,
+                         0, (t_void *) pioctl_req, (t_void *) & dummy);
+        ret = MLAN_STATUS_PENDING;
+    }
+
+    LEAVE();
+    return ret;
+}
+#endif
+
+/**
+ *  @brief Set the custom IE
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *  @param send_ioctl	Flag to indicate if ioctl should be sent with cmd
+ *                      (MTRUE if from moal/user, MFALSE if internal)
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+mlan_status
+wlan_misc_ioctl_custom_ie_list(IN pmlan_adapter pmadapter,
+                               IN pmlan_ioctl_req pioctl_req,
+                               IN t_bool send_ioctl)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ds_misc_cfg *misc = (mlan_ds_misc_cfg *) pioctl_req->pbuf;
+    custom_ie *ie_data = MNULL;
+    t_u16 cmd_action = 0, index, mask, i, len, app_data_len, ioctl_len;
+    t_u8 *tmp_ie;
+
+    ENTER();
+
+    if ((misc->param.cust_ie.len == 0) ||
+        (misc->param.cust_ie.len == sizeof(t_u16))) {
+        pioctl_req->action = MLAN_ACT_GET;
+        /* Get the IE */
+        cmd_action = HostCmd_ACT_GEN_GET;
+    } else {
+        /* ioctl_len : ioctl length from application, start with
+           misc->param.cust_ie.len and reach upto 0 */
+        ioctl_len = misc->param.cust_ie.len;
+
+        /* app_data_len : length from application, start with 0 and reach upto
+           ioctl_len */
+        app_data_len = sizeof(MrvlIEtypesHeader_t);
+        misc->param.cust_ie.len = 0;
+
+        while (ioctl_len > 0) {
+            ie_data = (custom_ie *) (((t_u8 *) & misc->param.cust_ie)
+                                     + app_data_len);
+            ioctl_len -= (ie_data->ie_length + MLAN_CUSTOM_IE_HDR_SIZE);
+            app_data_len += (ie_data->ie_length + MLAN_CUSTOM_IE_HDR_SIZE);
+
+            index = ie_data->ie_index;
+            mask = ie_data->mgmt_subtype_mask;
+            if (MLAN_CUSTOM_IE_AUTO_IDX_MASK == index) {        /* Need to be
+                                                                   Autohandled */
+                if (mask == MLAN_CUSTOM_IE_DELETE_MASK) {       /* Automatic
+                                                                   Deletion */
+                    ret =
+                        wlan_custom_ioctl_auto_delete(pmpriv, pioctl_req,
+                                                      ie_data, index);
+                    /* if IE to delete is not found, return error */
+                    if (ret == MLAN_STATUS_FAILURE) {
+                        goto done;
+                    }
+                    index = ie_data->ie_index;
+                    memset(pmadapter, ie_data, 0,
+                           sizeof(custom_ie) * MAX_MGMT_IE_INDEX);
+                    len = 0;
+                    for (i = 0; i < pmadapter->max_mgmt_ie_index; i++) {
+                        /* Check if index is updated before sending to FW */
+                        if (index & ((t_u16) 1) << i) {
+                            memcpy(pmadapter, (t_u8 *) ie_data + len, &i,
+                                   sizeof(ie_data->ie_index));
+                            len += sizeof(ie_data->ie_index);
+                            memcpy(pmadapter, (t_u8 *) ie_data + len,
+                                   &pmpriv->mgmt_ie[i].mgmt_subtype_mask,
+                                   sizeof(ie_data->mgmt_subtype_mask));
+                            len += sizeof(ie_data->mgmt_subtype_mask);
+                            memcpy(pmadapter, (t_u8 *) ie_data + len,
+                                   &pmpriv->mgmt_ie[i].ie_length,
+                                   sizeof(ie_data->ie_length));
+                            len += sizeof(ie_data->ie_length);
+                            if (pmpriv->mgmt_ie[i].ie_length) {
+                                memcpy(pmadapter, (t_u8 *) ie_data + len,
+                                       &pmpriv->mgmt_ie[i].ie_buffer,
+                                       pmpriv->mgmt_ie[i].ie_length);
+                                len += pmpriv->mgmt_ie[i].ie_length;
+                            }
+                        }
+                    }
+                    misc->param.cust_ie.len += len;
+                    pioctl_req->action = MLAN_ACT_SET;
+                    cmd_action = HostCmd_ACT_GEN_SET;
+                } else {        /* Automatic Addition */
+                    if (MLAN_CUSTOM_IE_AUTO_IDX_MASK == mask) {
+                        mask = 0;
+                        ie_data->mgmt_subtype_mask = 0;
+                    }
+                    if (MLAN_STATUS_FAILURE ==
+                        wlan_custom_ioctl_get_autoidx(pmpriv, pioctl_req, mask,
+                                                      ie_data, &index)) {
+                        PRINTM(MERROR, "Failed to Set the IE buffer\n");
+                        ret = MLAN_STATUS_FAILURE;
+                        goto done;
+                    }
+                    if (MLAN_CUSTOM_IE_AUTO_IDX_MASK == index) {
+                        ret = MLAN_STATUS_SUCCESS;
+                        goto done;
+                    }
+                    tmp_ie = (t_u8 *) & pmpriv->mgmt_ie[index].ie_buffer;
+                    memcpy(pmadapter, tmp_ie + pmpriv->mgmt_ie[index].ie_length,
+                           &ie_data->ie_buffer, ie_data->ie_length);
+                    pmpriv->mgmt_ie[index].ie_length += ie_data->ie_length;
+                    pmpriv->mgmt_ie[index].ie_index = index;
+                    pmpriv->mgmt_ie[index].mgmt_subtype_mask = mask;
+
+                    pioctl_req->action = MLAN_ACT_SET;
+                    cmd_action = HostCmd_ACT_GEN_SET;
+                    ie_data->ie_index = index;
+                    ie_data->ie_length = pmpriv->mgmt_ie[index].ie_length;
+                    memcpy(pmadapter, &ie_data->ie_buffer,
+                           &pmpriv->mgmt_ie[index].ie_buffer,
+                           pmpriv->mgmt_ie[index].ie_length);
+                    misc->param.cust_ie.len +=
+                        pmpriv->mgmt_ie[index].ie_length +
+                        MLAN_CUSTOM_IE_HDR_SIZE;
+                }
+            } else {
+                /* Set/Clear the IE and save it */
+                if (ie_data->mgmt_subtype_mask == MLAN_CUSTOM_IE_DELETE_MASK &&
+                    ie_data->ie_length) {
+                    PRINTM(MINFO, "Clear the IE buffer\n");
+                    ret =
+                        wlan_custom_ioctl_auto_delete(pmpriv, pioctl_req,
+                                                      ie_data, index);
+                    /* if IE to delete is not found, return error */
+                    if (ret == MLAN_STATUS_FAILURE) {
+                        goto done;
+                    }
+                    memset(pmadapter, ie_data, 0,
+                           sizeof(custom_ie) * MAX_MGMT_IE_INDEX);
+                    memcpy(pmadapter, (t_u8 *) ie_data, &pmpriv->mgmt_ie[index],
+                           pmpriv->mgmt_ie[index].ie_length +
+                           MLAN_CUSTOM_IE_HDR_SIZE);
+                } else {
+                    /* 
+                     * Check if this index is being used on any other
+                     * interfaces. If yes, then the request needs to be rejected.
+                     */
+                    ret = wlan_is_custom_ie_index_unused(pmpriv, index);
+                    if (ret == MLAN_STATUS_FAILURE) {
+                        PRINTM(MERROR,
+                               "IE index is used by other interface.\n");
+                        PRINTM(MERROR,
+                               "Set or delete on index %d is not allowed.\n",
+                               index);
+                        pioctl_req->status_code = MLAN_ERROR_IOCTL_FAIL;
+                        goto done;
+                    }
+                    PRINTM(MINFO, "Set the IE buffer\n");
+                    if (ie_data->mgmt_subtype_mask ==
+                        MLAN_CUSTOM_IE_DELETE_MASK)
+                        ie_data->ie_length = 0;
+                    memset(pmadapter, &pmpriv->mgmt_ie[index], 0,
+                           sizeof(custom_ie));
+                    memcpy(pmadapter, &pmpriv->mgmt_ie[index], ie_data,
+                           sizeof(custom_ie));
+                }
+
+                misc->param.cust_ie.len += pmpriv->mgmt_ie[index].ie_length +
+                    MLAN_CUSTOM_IE_HDR_SIZE;
+                pioctl_req->action = MLAN_ACT_SET;
+                cmd_action = HostCmd_ACT_GEN_SET;
+            }
+        }
+    }
+
+    /* Send command to firmware */
+    if (GET_BSS_ROLE(pmpriv) == MLAN_BSS_ROLE_STA) {
+        ret = wlan_prepare_cmd(pmpriv,
+                               HostCmd_CMD_MGMT_IE_LIST,
+                               cmd_action,
+                               0,
+                               (send_ioctl) ? (t_void *) pioctl_req : MNULL,
+                               &misc->param.cust_ie);
+    }
+#ifdef UAP_SUPPORT
+    else if (GET_BSS_ROLE(pmpriv) == MLAN_BSS_ROLE_UAP) {
+        ret = wlan_prepare_cmd(pmpriv,
+                               HOST_CMD_APCMD_SYS_CONFIGURE,
+                               cmd_action,
+                               0,
+                               (send_ioctl) ? (t_void *) pioctl_req : MNULL,
+                               (send_ioctl) ? MNULL : &misc->param.cust_ie);
+    }
+#endif
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function will check if station list is empty
+ *  
+ *  @param priv    A pointer to mlan_private
+ *
+ *  @return	   MFALSE/MTRUE
+ */
+t_u8
+wlan_is_station_list_empty(mlan_private * priv)
+{
+    sta_node *sta_ptr;
+    ENTER();
+    if (!(sta_ptr = (sta_node *) util_peek_list(priv->adapter->pmoal_handle,
+                                                &priv->sta_list,
+                                                priv->adapter->callbacks.
+                                                moal_spin_lock,
+                                                priv->adapter->callbacks.
+                                                moal_spin_unlock))) {
+        LEAVE();
+        return MTRUE;
+    }
+    LEAVE();
+    return MFALSE;
+}
+
+/**
+ *  @brief This function will return the pointer to station entry in station list
+ *  		table which matches the give mac address
+ *  
+ *  @param priv    A pointer to mlan_private
+ *  @param mac     mac address to find in station list table
+ *
+ *  @return	   A pointer to structure sta_node
+ */
+sta_node *
+wlan_get_station_entry(mlan_private * priv, t_u8 * mac)
+{
+    sta_node *sta_ptr;
+
+    ENTER();
+
+    if (!mac) {
+        LEAVE();
+        return MNULL;
+    }
+    if (!(sta_ptr = (sta_node *) util_peek_list(priv->adapter->pmoal_handle,
+                                                &priv->sta_list,
+                                                priv->adapter->callbacks.
+                                                moal_spin_lock,
+                                                priv->adapter->callbacks.
+                                                moal_spin_unlock))) {
+        LEAVE();
+        return MNULL;
+    }
+    while (sta_ptr != (sta_node *) & priv->sta_list) {
+        if (!memcmp
+            (priv->adapter, sta_ptr->mac_addr, mac, MLAN_MAC_ADDR_LENGTH)) {
+            LEAVE();
+            return sta_ptr;
+        }
+        sta_ptr = sta_ptr->pnext;
+    }
+    LEAVE();
+    return MNULL;
+}
+
+/**
+ *  @brief This function will add a pointer to station entry in station list
+ *  		table with the give mac address, if it does not exist already
+ *  
+ *  @param priv    A pointer to mlan_private
+ *  @param mac     mac address to find in station list table
+ *
+ *  @return	   A pointer to structure sta_node
+ */
+sta_node *
+wlan_add_station_entry(mlan_private * priv, t_u8 * mac)
+{
+    sta_node *sta_ptr = MNULL;
+    mlan_adapter *pmadapter = priv->adapter;
+
+    ENTER();
+    pmadapter->callbacks.moal_spin_lock(pmadapter->pmoal_handle,
+                                        priv->wmm.ra_list_spinlock);
+
+    sta_ptr = wlan_get_station_entry(priv, mac);
+    if (sta_ptr)
+        goto done;
+    if (priv->adapter->callbacks.
+        moal_malloc(priv->adapter->pmoal_handle, sizeof(sta_node), MLAN_MEM_DEF,
+                    (t_u8 **) & sta_ptr)) {
+        PRINTM(MERROR, "Failed to allocate memory for station node\n");
+        return MNULL;
+    }
+    memset(priv->adapter, sta_ptr, 0, sizeof(sta_node));
+    memcpy(priv->adapter, sta_ptr->mac_addr, mac, MLAN_MAC_ADDR_LENGTH);
+    util_enqueue_list_tail(priv->adapter->pmoal_handle, &priv->sta_list,
+                           (pmlan_linked_list) sta_ptr,
+                           priv->adapter->callbacks.moal_spin_lock,
+                           priv->adapter->callbacks.moal_spin_unlock);
+  done:
+    pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                          priv->wmm.ra_list_spinlock);
+    LEAVE();
+    return sta_ptr;
+}
+
+/**
+ *  @brief This function will delete a station entry from station list
+ *  		
+ *  
+ *  @param priv    A pointer to mlan_private
+ *  @param mac     station's mac address 
+ *
+ *  @return	   N/A
+ */
+t_void
+wlan_delete_station_entry(mlan_private * priv, t_u8 * mac)
+{
+    sta_node *sta_ptr = MNULL;
+    mlan_adapter *pmadapter = priv->adapter;
+    ENTER();
+    pmadapter->callbacks.moal_spin_lock(pmadapter->pmoal_handle,
+                                        priv->wmm.ra_list_spinlock);
+    if ((sta_ptr = wlan_get_station_entry(priv, mac))) {
+        util_unlink_list(priv->adapter->pmoal_handle, &priv->sta_list,
+                         (pmlan_linked_list) sta_ptr,
+                         priv->adapter->callbacks.moal_spin_lock,
+                         priv->adapter->callbacks.moal_spin_unlock);
+        priv->adapter->callbacks.moal_mfree(priv->adapter->pmoal_handle,
+                                            (t_u8 *) sta_ptr);
+    }
+    pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                          priv->wmm.ra_list_spinlock);
+    LEAVE();
+    return;
+}
+
+/**
+ *  @brief Clean up wapi station list
+ *
+ *  @param priv  Pointer to the mlan_private driver data struct
+ *
+ *  @return      N/A
+ */
+t_void
+wlan_delete_station_list(pmlan_private priv)
+{
+    sta_node *sta_ptr;
+
+    ENTER();
+    while ((sta_ptr =
+            (sta_node *) util_dequeue_list(priv->adapter->pmoal_handle,
+                                           &priv->sta_list,
+                                           priv->adapter->callbacks.
+                                           moal_spin_lock,
+                                           priv->adapter->callbacks.
+                                           moal_spin_unlock))) {
+        priv->adapter->callbacks.moal_mfree(priv->adapter->pmoal_handle,
+                                            (t_u8 *) sta_ptr);
+    }
+    LEAVE();
+    return;
+}
+
+/**
+ *  @brief This function will return the pointer to station entry in station list
+ *  		table which in tx_pause state
+ *  
+ *  @param priv    A pointer to mlan_private
+ *
+ *  @return	   A pointer to structure sta_node
+ */
+sta_node *
+wlan_get_tx_pause_station_entry(mlan_private * priv)
+{
+    sta_node *sta_ptr;
+
+    ENTER();
+
+    if (!(sta_ptr = (sta_node *) util_peek_list(priv->adapter->pmoal_handle,
+                                                &priv->sta_list,
+                                                priv->adapter->callbacks.
+                                                moal_spin_lock,
+                                                priv->adapter->callbacks.
+                                                moal_spin_unlock))) {
+        LEAVE();
+        return MNULL;
+    }
+    while (sta_ptr != (sta_node *) & priv->sta_list) {
+        if (sta_ptr->tx_pause) {
+            LEAVE();
+            return sta_ptr;
+        }
+        sta_ptr = sta_ptr->pnext;
+    }
+    LEAVE();
+    return MNULL;
+}
+
+/** 
+ *  @brief Get extended version information
+ *
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param pioctl_req   A pointer to ioctl request buffer
+ *
+ *  @return             MLAN_STATUS_PENDING --success, otherwise fail
+ */
+mlan_status
+wlan_get_info_ver_ext(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    pmlan_private pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_get_info *pinfo = (mlan_ds_get_info *) pioctl_req->pbuf;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_VERSION_EXT,
+                           HostCmd_ACT_GEN_GET,
+                           0,
+                           (t_void *) pioctl_req,
+                           &pinfo->param.ver_ext.version_str_sel);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+#ifdef UAP_SUPPORT
+/**
+ *   @brief This function processes the 802.11 mgmt Frame
+ *     
+ *   @param priv      A pointer to mlan_private
+ *   @param payload   A pointer to the received buffer
+ *   @param payload_len Length of the received buffer
+ *
+ *   @return        MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_process_802dot11_mgmt_pkt(IN mlan_private * priv,
+                               IN t_u8 * payload, IN t_u32 payload_len)
+{
+    pmlan_adapter pmadapter = priv->adapter;
+    pmlan_callbacks pcb = &pmadapter->callbacks;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    wlan_802_11_header *pieee_pkt_hdr = MNULL;
+    t_u16 sub_type = 0;
+    t_u8 *event_buf = MNULL;
+    mlan_event *pevent = MNULL;
+
+    ENTER();
+    /* Check packet type-subtype and compare with mgmt_passthru_mask If event
+       is needed to host, just eventify it */
+    pieee_pkt_hdr = (wlan_802_11_header *) payload;
+    sub_type = IEEE80211_GET_FC_MGMT_FRAME_SUBTYPE(pieee_pkt_hdr->frm_ctl);
+    if (((1 << sub_type) & priv->mgmt_frame_passthru_mask) == 0) {
+        PRINTM(MINFO, "Dropping mgmt frame for subtype %d.\n", sub_type);
+        LEAVE();
+        return ret;
+    }
+
+    /* Allocate memory for event buffer */
+    ret =
+        pcb->moal_malloc(pmadapter->pmoal_handle, MAX_EVENT_SIZE, MLAN_MEM_DEF,
+                         &event_buf);
+    if ((ret != MLAN_STATUS_SUCCESS) || !event_buf) {
+        PRINTM(MERROR, "Could not allocate buffer for event buf\n");
+        return MLAN_STATUS_FAILURE;
+    }
+    pevent = (pmlan_event) event_buf;
+    pevent->bss_index = priv->bss_index;
+    pevent->event_id = MLAN_EVENT_ID_DRV_MGMT_FRAME;
+    pevent->event_len = payload_len + sizeof(pevent->event_id);
+    memcpy(pmadapter, (t_u8 *) pevent->event_buf,
+           (t_u8 *) & pevent->event_id, sizeof(pevent->event_id));
+    memcpy(pmadapter, (t_u8 *) (pevent->event_buf + sizeof(pevent->event_id)),
+           payload, payload_len);
+    wlan_recv_event(priv, MLAN_EVENT_ID_DRV_MGMT_FRAME, pevent);
+
+    if (event_buf)
+        pcb->moal_mfree(pmadapter->pmoal_handle, event_buf);
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+#endif
+
+/**
+ *  @brief This function will search for the specific ie
+ *  		
+ *  
+ *  @param priv    A pointer to mlan_private
+ *  @param ie_buf  A pointer to ie_buf
+ *  @param ie_len  total ie length
+ *  @param id      ie's id
+ *
+ *  @return	       ie's poiner or MNULL
+ */
+t_u8 *
+wlan_get_specific_ie(pmlan_private priv, t_u8 * ie_buf, t_u8 ie_len,
+                     IEEEtypes_ElementId_e id)
+{
+    t_u32 bytes_left = ie_len;
+    t_u8 *pcurrent_ptr = ie_buf;
+    t_u16 total_ie_len;
+    t_u8 *ie_ptr = MNULL;
+    IEEEtypes_ElementId_e element_id;
+    t_u8 element_len;
+
+    ENTER();
+
+    DBG_HEXDUMP(MCMD_D, "ie", ie_buf, ie_len);
+    while (bytes_left >= 2) {
+        element_id = (IEEEtypes_ElementId_e) (*((t_u8 *) pcurrent_ptr));
+        element_len = *((t_u8 *) pcurrent_ptr + 1);
+        total_ie_len = element_len + sizeof(IEEEtypes_Header_t);
+        if (bytes_left < total_ie_len) {
+            PRINTM(MERROR, "InterpretIE: Error in processing IE, "
+                   "bytes left < IE length\n");
+            break;
+        }
+        if (element_id == id) {
+            PRINTM(MCMND, "Find IE: id=%d\n", id);
+            DBG_HEXDUMP(MCMND, "IE", pcurrent_ptr, total_ie_len);
+            ie_ptr = pcurrent_ptr;
+            break;
+        }
+        pcurrent_ptr += element_len + 2;
+        /* Need to account for IE ID and IE Len */
+        bytes_left -= (element_len + 2);
+    }
+
+    LEAVE();
+
+    return ie_ptr;
+}
+
+/**
+ *  @brief Get pm info
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		        MLAN_STATUS_SUCCESS --success
+ */
+mlan_status
+wlan_get_pm_info(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ds_pm_cfg *pm_cfg = MNULL;
+    pmlan_callbacks pcb = &pmadapter->callbacks;
+
+    ENTER();
+
+    pm_cfg = (mlan_ds_pm_cfg *) pioctl_req->pbuf;
+    pm_cfg->param.ps_info.is_suspend_allowed = MTRUE;
+    if (util_peek_list(pmadapter->pmoal_handle, &pmadapter->cmd_pending_q,
+                       pcb->moal_spin_lock, pcb->moal_spin_unlock)
+        || pmadapter->curr_cmd || !wlan_bypass_tx_list_empty(pmadapter)
+        || !wlan_wmm_lists_empty(pmadapter)
+        ) {
+        pm_cfg->param.ps_info.is_suspend_allowed = MFALSE;
+        PRINTM(MIOCTL,
+               "PM: cmd_pending_q=%p,curr_cmd=%p,wmm_list_empty=%d, by_pass=%d\n",
+               util_peek_list(pmadapter->pmoal_handle,
+                              &pmadapter->cmd_pending_q, pcb->moal_spin_lock,
+                              pcb->moal_spin_unlock), pmadapter->curr_cmd,
+               wlan_wmm_lists_empty(pmadapter),
+               wlan_bypass_tx_list_empty(pmadapter));
+    }
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get radio status
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+mlan_status
+wlan_radio_ioctl_radio_ctl(IN pmlan_adapter pmadapter,
+                           IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ds_radio_cfg *radio_cfg = MNULL;
+    t_u16 cmd_action = 0;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+
+    ENTER();
+
+    radio_cfg = (mlan_ds_radio_cfg *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_SET) {
+        if (pmadapter->radio_on == radio_cfg->param.radio_on_off) {
+            ret = MLAN_STATUS_SUCCESS;
+            goto exit;
+        } else {
+            if (pmpriv->media_connected == MTRUE) {
+                ret = MLAN_STATUS_FAILURE;
+                goto exit;
+            }
+            cmd_action = HostCmd_ACT_GEN_SET;
+        }
+    } else
+        cmd_action = HostCmd_ACT_GEN_GET;
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_802_11_RADIO_CONTROL,
+                           cmd_action,
+                           0,
+                           (t_void *) pioctl_req,
+                           &radio_cfg->param.radio_on_off);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+  exit:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Get rate value
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_rate_ioctl_get_rate_value(IN pmlan_adapter pmadapter,
+                               IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_ds_rate *rate = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+
+    ENTER();
+
+    rate = (mlan_ds_rate *) pioctl_req->pbuf;
+    rate->param.rate_cfg.is_rate_auto = pmpriv->is_data_rate_auto;
+    pioctl_req->data_read_written =
+        sizeof(mlan_rate_cfg_t) + MLAN_SUB_COMMAND_SIZE;
+
+    if (pmpriv->media_connected != MTRUE) {
+        switch (pmadapter->config_bands) {
+        case BAND_B:
+            /* Return the lowest supported rate for B band */
+            rate->param.rate_cfg.rate = SupportedRates_B[0] & 0x7f;
+            break;
+        case BAND_G:
+        case BAND_G | BAND_GN:
+            /* Return the lowest supported rate for G band */
+            rate->param.rate_cfg.rate = SupportedRates_G[0] & 0x7f;
+            break;
+        case BAND_B | BAND_G:
+        case BAND_A | BAND_B | BAND_G:
+        case BAND_A | BAND_B:
+        case BAND_A | BAND_B | BAND_G | BAND_AN | BAND_GN:
+        case BAND_B | BAND_G | BAND_GN:
+            /* Return the lowest supported rate for BG band */
+            rate->param.rate_cfg.rate = SupportedRates_BG[0] & 0x7f;
+            break;
+        case BAND_A:
+        case BAND_A | BAND_G:
+        case BAND_A | BAND_G | BAND_AN | BAND_GN:
+        case BAND_A | BAND_AN:
+            /* Return the lowest supported rate for A band */
+            rate->param.rate_cfg.rate = SupportedRates_A[0] & 0x7f;
+            break;
+        case BAND_GN:
+            /* Return the lowest supported rate for N band */
+            rate->param.rate_cfg.rate = SupportedRates_N[0] & 0x7f;
+            break;
+        default:
+            PRINTM(MMSG, "Invalid Band 0x%x\n", pmadapter->config_bands);
+            break;
+        }
+    } else {
+        /* Send request to firmware */
+        ret = wlan_prepare_cmd(pmpriv,
+                               HostCmd_CMD_802_11_TX_RATE_QUERY,
+                               HostCmd_ACT_GEN_GET,
+                               0, (t_void *) pioctl_req, MNULL);
+        if (ret == MLAN_STATUS_SUCCESS)
+            ret = MLAN_STATUS_PENDING;
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set rate value
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_rate_ioctl_set_rate_value(IN pmlan_adapter pmadapter,
+                               IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_ds_rate *ds_rate = MNULL;
+    WLAN_802_11_RATES rates;
+    t_u8 *rate = MNULL;
+    int rate_index = 0;
+    t_u16 bitmap_rates[MAX_BITMAP_RATES_SIZE];
+    t_u32 i = 0;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+
+    ENTER();
+
+    ds_rate = (mlan_ds_rate *) pioctl_req->pbuf;
+
+    if (ds_rate->param.rate_cfg.is_rate_auto) {
+        memset(pmadapter, bitmap_rates, 0, sizeof(bitmap_rates));
+        /* Support all HR/DSSS rates */
+        bitmap_rates[0] = 0x000F;
+        /* Support all OFDM rates */
+        bitmap_rates[1] = 0x00FF;
+        /* Support all HT-MCSs rate */
+        for (i = 0; i < NELEMENTS(pmpriv->bitmap_rates) - 3; i++)
+            bitmap_rates[i + 2] = 0xFFFF;
+        bitmap_rates[9] = 0x3FFF;
+    } else {
+        memset(pmadapter, rates, 0, sizeof(rates));
+        wlan_get_active_data_rates(pmpriv, pmpriv->bss_mode,
+                                   (pmpriv->bss_mode == MLAN_BSS_MODE_INFRA) ?
+                                   pmadapter->config_bands : pmadapter->
+                                   adhoc_start_band, rates);
+        rate = rates;
+        for (i = 0; (rate[i] && i < WLAN_SUPPORTED_RATES); i++) {
+            PRINTM(MINFO, "Rate=0x%X  Wanted=0x%X\n", rate[i],
+                   ds_rate->param.rate_cfg.rate);
+            if ((rate[i] & 0x7f) == (ds_rate->param.rate_cfg.rate & 0x7f))
+                break;
+        }
+        if (!rate[i] || (i == WLAN_SUPPORTED_RATES)) {
+            PRINTM(MERROR, "The fixed data rate 0x%X is out "
+                   "of range\n", ds_rate->param.rate_cfg.rate);
+            pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+            ret = MLAN_STATUS_FAILURE;
+            goto exit;
+        }
+        memset(pmadapter, bitmap_rates, 0, sizeof(bitmap_rates));
+
+        rate_index =
+            wlan_data_rate_to_index(pmadapter, ds_rate->param.rate_cfg.rate);
+
+        /* Only allow b/g rates to be set */
+        if (rate_index >= MLAN_RATE_INDEX_HRDSSS0 &&
+            rate_index <= MLAN_RATE_INDEX_HRDSSS3)
+            bitmap_rates[0] = 1 << rate_index;
+        else {
+            rate_index -= 1;    /* There is a 0x00 in the table */
+            if (rate_index >= MLAN_RATE_INDEX_OFDM0 &&
+                rate_index <= MLAN_RATE_INDEX_OFDM7)
+                bitmap_rates[1] = 1 << (rate_index - MLAN_RATE_INDEX_OFDM0);
+        }
+    }
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_TX_RATE_CFG,
+                           HostCmd_ACT_GEN_SET,
+                           0, (t_void *) pioctl_req, bitmap_rates);
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+  exit:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Get rate index
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_rate_ioctl_get_rate_index(IN pmlan_adapter pmadapter,
+                               IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+
+    ENTER();
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_TX_RATE_CFG,
+                           HostCmd_ACT_GEN_GET,
+                           0, (t_void *) pioctl_req, MNULL);
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set rate index
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_rate_ioctl_set_rate_index(IN pmlan_adapter pmadapter,
+                               IN pmlan_ioctl_req pioctl_req)
+{
+    int rate_index;
+    t_u32 i;
+    mlan_ds_rate *ds_rate = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    t_u16 bitmap_rates[MAX_BITMAP_RATES_SIZE];
+
+    ENTER();
+
+    ds_rate = (mlan_ds_rate *) pioctl_req->pbuf;
+    rate_index = ds_rate->param.rate_cfg.rate;
+    if (ds_rate->param.rate_cfg.is_rate_auto) {
+        memset(pmadapter, bitmap_rates, 0, sizeof(bitmap_rates));
+        /* Support all HR/DSSS rates */
+        bitmap_rates[0] = 0x000F;
+        /* Support all OFDM rates */
+        bitmap_rates[1] = 0x00FF;
+        /* Support all HT-MCSs rate */
+        for (i = 0; i < NELEMENTS(bitmap_rates) - 3; i++)
+            bitmap_rates[i + 2] = 0xFFFF;
+        bitmap_rates[9] = 0x3FFF;
+    } else {
+        PRINTM(MINFO, "Rate index is %d\n", rate_index);
+        memset(pmadapter, bitmap_rates, 0, sizeof(bitmap_rates));
+        /* Bitmap of HR/DSSS rates */
+        if (rate_index >= MLAN_RATE_INDEX_HRDSSS0 &&
+            rate_index <= MLAN_RATE_INDEX_HRDSSS3)
+            bitmap_rates[0] = 1 << rate_index;
+        /* Bitmap of OFDM rates */
+        if (rate_index >= MLAN_RATE_INDEX_OFDM0 &&
+            rate_index <= MLAN_RATE_INDEX_OFDM7)
+            bitmap_rates[1] = 1 << (rate_index - MLAN_RATE_INDEX_OFDM0);
+        /* Bitmap of HT-MCSs allowed for initial rate */
+        if (rate_index >= MLAN_RATE_INDEX_MCS0 &&
+            rate_index <= MLAN_RATE_INDEX_MCS32)
+            bitmap_rates[((rate_index - MLAN_RATE_INDEX_MCS0) / 16) + 2] =
+                1 << ((rate_index - MLAN_RATE_INDEX_MCS0) % 16);
+    }
+
+    PRINTM(MINFO, "RateBitmap=%04x%04x%04x%04x%04x%04x%04x%04x%04x%04x, "
+           "IsRateAuto=%d, DataRate=%d\n",
+           bitmap_rates[9], bitmap_rates[8],
+           bitmap_rates[7], bitmap_rates[6],
+           bitmap_rates[5], bitmap_rates[4],
+           bitmap_rates[3], bitmap_rates[2],
+           bitmap_rates[1], bitmap_rates[0],
+           pmpriv->is_data_rate_auto, pmpriv->data_rate);
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_TX_RATE_CFG,
+                           HostCmd_ACT_GEN_SET,
+                           0, (t_void *) pioctl_req, (t_void *) bitmap_rates);
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Rate configuration command handler
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING --success, otherwise fail
+ */
+mlan_status
+wlan_rate_ioctl_cfg(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_ds_rate *rate = MNULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    rate = (mlan_ds_rate *) pioctl_req->pbuf;
+    if (rate->param.rate_cfg.rate_type == MLAN_RATE_VALUE) {
+        if (pioctl_req->action == MLAN_ACT_GET)
+            status = wlan_rate_ioctl_get_rate_value(pmadapter, pioctl_req);
+        else
+            status = wlan_rate_ioctl_set_rate_value(pmadapter, pioctl_req);
+    } else {
+        if (pioctl_req->action == MLAN_ACT_GET)
+            status = wlan_rate_ioctl_get_rate_index(pmadapter, pioctl_req);
+        else
+            status = wlan_rate_ioctl_set_rate_index(pmadapter, pioctl_req);
+    }
+
+    LEAVE();
+    return status;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_module.c linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_module.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_module.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_module.c	2017-09-23 03:42:50.126674734 +0800
@@ -0,0 +1,55 @@
+/** @file mlan_module.c
+ *
+ *  @brief This file declares the exported symbols from MLAN.
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/******************************************************
+Change log:
+    12/08/2008: initial version
+******************************************************/
+
+#ifdef LINUX
+#include <linux/module.h>
+#include "mlan_decl.h"
+#include "mlan_ioctl.h"
+
+EXPORT_SYMBOL(mlan_register);
+EXPORT_SYMBOL(mlan_unregister);
+EXPORT_SYMBOL(mlan_init_fw);
+EXPORT_SYMBOL(mlan_set_init_param);
+EXPORT_SYMBOL(mlan_dnld_fw);
+EXPORT_SYMBOL(mlan_shutdown_fw);
+EXPORT_SYMBOL(mlan_write_data_async_complete);
+EXPORT_SYMBOL(mlan_recv);
+EXPORT_SYMBOL(mlan_send_packet);
+EXPORT_SYMBOL(mlan_ioctl);
+EXPORT_SYMBOL(mlan_main_process);
+EXPORT_SYMBOL(mlan_select_wmm_queue);
+
+MODULE_DESCRIPTION("M-WLAN MLAN Driver");
+MODULE_AUTHOR("Marvell International Ltd.");
+MODULE_VERSION(MLAN_RELEASE_VERSION);
+MODULE_LICENSE("Marvell Proprietary");
+#endif /* LINUX */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_scan.c linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_scan.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_scan.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_scan.c	2017-09-23 03:42:50.130674721 +0800
@@ -0,0 +1,3335 @@
+/** @file mlan_scan.c
+ *
+ *  @brief Functions implementing wlan scan IOCTL and firmware command APIs
+ *
+ *  IOCTL handlers as well as command preparation and response routines
+ *  for sending scan commands to the firmware.
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/******************************************************
+Change log:
+    10/28/2008: initial version
+******************************************************/
+
+#include "mlan.h"
+#include "mlan_join.h"
+#include "mlan_util.h"
+#include "mlan_fw.h"
+#include "mlan_main.h"
+#include "mlan_11n.h"
+#include "mlan_11h.h"
+
+/********************************************************
+                Local Constants
+********************************************************/
+
+/** The maximum number of channels the firmware can scan per command */
+#define MRVDRV_MAX_CHANNELS_PER_SPECIFIC_SCAN   14
+
+/**
+ * Number of channels to scan per firmware scan command issuance.
+ *
+ * Number restricted to prevent hitting the limit on the amount of scan data
+ * returned in a single firmware scan command.
+ */
+#define MRVDRV_CHANNELS_PER_SCAN_CMD            4
+
+/** Scan all the channels in specified band */
+#define BAND_SPECIFIED    0x80
+
+/** Memory needed to store a max sized Channel List TLV for a firmware scan */
+#define CHAN_TLV_MAX_SIZE  (sizeof(MrvlIEtypesHeader_t)                  \
+                            + (MRVDRV_MAX_CHANNELS_PER_SPECIFIC_SCAN     \
+                               * sizeof(ChanScanParamSet_t)))
+
+/** Memory needed to store supported rate */
+#define RATE_TLV_MAX_SIZE   (sizeof(MrvlIEtypes_RatesParamSet_t) + HOSTCMD_SUPPORTED_RATES)
+
+/** Memory needed to store a max number/size WildCard SSID TLV for a firmware scan */
+#define WILDCARD_SSID_TLV_MAX_SIZE  \
+            (MRVDRV_MAX_SSID_LIST_LENGTH  * (sizeof(MrvlIEtypes_WildCardSsIdParamSet_t) + MRVDRV_MAX_SSID_LENGTH))
+
+/** WPS TLV MAX size is MAX IE size plus 2 bytes for t_u16 MRVL TLV extension */
+#define WPS_TLV_MAX_SIZE   (sizeof(IEEEtypes_VendorSpecific_t) + 2)
+/** Maximum memory needed for a wlan_scan_cmd_config with all TLVs at max */
+#define MAX_SCAN_CFG_ALLOC (sizeof(wlan_scan_cmd_config)        \
+                            + sizeof(MrvlIEtypes_NumProbes_t)   \
+                            + sizeof(MrvlIETypes_HTCap_t)       \
+                            + CHAN_TLV_MAX_SIZE                 \
+                            + RATE_TLV_MAX_SIZE                 \
+                            + WILDCARD_SSID_TLV_MAX_SIZE        \
+                            + WPS_TLV_MAX_SIZE)
+
+/********************************************************
+                Local Variables
+********************************************************/
+
+/**
+ * Interally used to send a configured scan cmd between driver routines
+ */
+typedef union
+{
+    /** Scan configuration (variable length) */
+    wlan_scan_cmd_config config;
+    /** Max allocated block */
+    t_u8 config_alloc_buf[MAX_SCAN_CFG_ALLOC];
+} wlan_scan_cmd_config_tlv;
+
+/********************************************************
+                Global Variables
+********************************************************/
+
+/********************************************************
+                Local Functions
+********************************************************/
+/** Cipher suite definition */
+enum cipher_suite
+{
+    CIPHER_SUITE_TKIP,
+    CIPHER_SUITE_CCMP,
+    CIPHER_SUITE_MAX
+};
+
+static t_u8 wpa_oui[CIPHER_SUITE_MAX][4] = {
+    {0x00, 0x50, 0xf2, 0x02},   /* TKIP */
+    {0x00, 0x50, 0xf2, 0x04},   /* AES */
+};
+
+static t_u8 rsn_oui[CIPHER_SUITE_MAX][4] = {
+    {0x00, 0x0f, 0xac, 0x02},   /* TKIP */
+    {0x00, 0x0f, 0xac, 0x04},   /* AES */
+};
+
+/**
+ *  @brief This function will parse a given IE for a given OUI
+ *
+ *  Parse a given WPA/RSN IE to find if it has a given oui in PTK, 
+ *  if no OUI found for PTK it returns 0.
+ *
+ *  @param pbss_desc       A pointer to current BSS descriptor
+ *  @return                0 on failure to find OUI, 1 on success.
+ */
+static t_u8
+search_oui_in_ie(mlan_adapter * pmadapter, IEBody * ie_body, t_u8 * oui)
+{
+    t_u8 count;
+
+    count = ie_body->PtkCnt[0];
+
+    /* There could be multiple OUIs for PTK hence 1) Take the length. 2) Check 
+       all the OUIs for AES. 3) If one of them is AES then pass success. */
+    while (count) {
+        if (!memcmp(pmadapter, ie_body->PtkBody, oui, sizeof(ie_body->PtkBody))) {
+            return MLAN_OUI_PRESENT;
+        }
+
+        --count;
+        if (count) {
+            ie_body = (IEBody *) ((t_u8 *) ie_body + sizeof(ie_body->PtkBody));
+        }
+    }
+
+    PRINTM(MINFO, "The OUI %x:%x:%x:%x is not found in PTK \n", oui[0], oui[1],
+           oui[2], oui[3]);
+    return MLAN_OUI_NOT_PRESENT;
+}
+
+/**
+ *  @brief This function will pass the correct ie and oui to search_oui_in_ie
+ *
+ *  Check the pbss_desc for appropriate IE and then check if RSN IE has AES
+ *  OUI in it. If RSN IE does not have AES in PTK then return 0;
+ *
+ *  @param pbss_desc       A pointer to current BSS descriptor
+ *  @return                0 on failure to find AES OUI, 1 on success.
+ */
+static t_u8
+is_rsn_oui_present(mlan_adapter * pmadapter, BSSDescriptor_t * pbss_desc,
+                   t_u32 cipher_suite)
+{
+    t_u8 *oui = MNULL;
+    IEBody *ie_body = MNULL;
+    t_u8 ret = MLAN_OUI_NOT_PRESENT;
+
+    if (((pbss_desc->prsn_ie) &&
+         ((*(pbss_desc->prsn_ie)).ieee_hdr.element_id == RSN_IE))) {
+        ie_body =
+            (IEBody *) (((t_u8 *) pbss_desc->prsn_ie->data) +
+                        RSN_GTK_OUI_OFFSET);
+        oui = &rsn_oui[cipher_suite][0];
+        if ((ret = search_oui_in_ie(pmadapter, ie_body, oui)))
+            return ret;
+    }
+    return ret;
+}
+
+/**
+ *  @brief This function will pass the correct ie and oui to search_oui_in_ie
+ *
+ *  Check the pbss_desc for appropriate IE and then check if WPA IE has AES
+ *  OUI in it. If WPA IE does not have AES in PTK then return 0;
+ *
+ *  @param pbss_desc       A pointer to current BSS descriptor
+ *  @return                0 on failure to find AES OUI, 1 on success.
+ */
+static t_u8
+is_wpa_oui_present(mlan_adapter * pmadapter, BSSDescriptor_t * pbss_desc,
+                   t_u32 cipher_suite)
+{
+    t_u8 *oui = MNULL;
+    IEBody *ie_body = MNULL;
+    t_u8 ret = MLAN_OUI_NOT_PRESENT;
+
+    if (((pbss_desc->pwpa_ie) &&
+         ((*(pbss_desc->pwpa_ie)).vend_hdr.element_id == WPA_IE))) {
+        ie_body = (IEBody *) pbss_desc->pwpa_ie->data;
+        oui = &wpa_oui[cipher_suite][0];
+        if ((ret = search_oui_in_ie(pmadapter, ie_body, oui)))
+            return ret;
+    }
+    return ret;
+}
+
+/**
+ *  @brief This function finds the best SSID in the Scan List
+ *
+ *  Search the scan table for the best SSID that also matches the current
+ *   adapter network preference (infrastructure or adhoc)
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @return             index in BSSID list
+ */
+static t_s32
+wlan_find_best_network_in_list(IN mlan_private * pmpriv)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    t_u32 mode = pmpriv->bss_mode;
+    t_s32 best_net = -1;
+    t_s32 best_rssi = 0;
+    t_u32 i;
+
+    ENTER();
+
+    PRINTM(MINFO, "Num of BSSIDs = %d\n", pmadapter->num_in_scan_table);
+
+    for (i = 0; i < pmadapter->num_in_scan_table; i++) {
+        switch (mode) {
+        case MLAN_BSS_MODE_INFRA:
+        case MLAN_BSS_MODE_IBSS:
+            if (wlan_is_network_compatible(pmpriv, i, mode) >= 0) {
+                if (SCAN_RSSI(pmadapter->pscan_table[i].rssi) > best_rssi) {
+                    best_rssi = SCAN_RSSI(pmadapter->pscan_table[i].rssi);
+                    best_net = i;
+                }
+            }
+            break;
+        case MLAN_BSS_MODE_AUTO:
+        default:
+            if (SCAN_RSSI(pmadapter->pscan_table[i].rssi) > best_rssi) {
+                best_rssi = SCAN_RSSI(pmadapter->pscan_table[i].rssi);
+                best_net = i;
+            }
+            break;
+        }
+    }
+
+    LEAVE();
+    return best_net;
+}
+
+/**
+ *  @brief Create a channel list for the driver to scan based on region info
+ *
+ *  Use the driver region/band information to construct a comprehensive list
+ *    of channels to scan.  This routine is used for any scan that is not
+ *    provided a specific channel list to scan.
+ *
+ *  @param pmpriv           A pointer to mlan_private structure
+ *  @param puser_scan_in    MNULL or pointer to scan configuration parameters
+ *  @param pscan_chan_list  Output parameter: Resulting channel list to scan
+ *  @param filtered_scan    Flag indicating whether or not a BSSID or SSID filter
+ *                          is being sent in the command to firmware.  Used to 
+ *                          increase the number of channels sent in a scan
+ *                          command and to disable the firmware channel scan
+ *                          filter.
+ *
+ *  @return                 N/A
+ */
+static t_void
+wlan_scan_create_channel_list(IN mlan_private * pmpriv,
+                              IN const wlan_user_scan_cfg * puser_scan_in,
+                              OUT ChanScanParamSet_t * pscan_chan_list,
+                              IN t_u8 filtered_scan)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    region_chan_t *pscan_region;
+    chan_freq_power_t *cfp;
+    t_u32 region_idx;
+    t_u32 chan_idx = 0;
+    t_u32 next_chan;
+    t_u8 scan_type;
+    t_u8 radio_type;
+
+    ENTER();
+
+    for (region_idx = 0;
+         region_idx < NELEMENTS(pmadapter->region_channel); region_idx++) {
+
+        if (wlan_11d_is_enabled(pmpriv) && pmpriv->media_connected != MTRUE) {
+            /* Scan all the supported chan for the first scan */
+            if (!pmadapter->universal_channel[region_idx].valid)
+                continue;
+            pscan_region = &pmadapter->universal_channel[region_idx];
+        } else {
+            if (!pmadapter->region_channel[region_idx].valid)
+                continue;
+            pscan_region = &pmadapter->region_channel[region_idx];
+        }
+
+        if (puser_scan_in && !puser_scan_in->chan_list[0].chan_number &&
+            puser_scan_in->chan_list[0].radio_type & BAND_SPECIFIED) {
+            radio_type =
+                puser_scan_in->chan_list[0].radio_type & ~BAND_SPECIFIED;
+            if (!radio_type && (pscan_region->band != BAND_B) &&
+                (pscan_region->band != BAND_G))
+                continue;
+            if (radio_type && (pscan_region->band != BAND_A))
+                continue;
+        }
+
+        for (next_chan = 0;
+             next_chan < pscan_region->num_cfp; next_chan++, chan_idx++) {
+            /* Set the default scan type to the user specified type, will later 
+               be changed to passive on a per channel basis if restricted by
+               regulatory requirements (11d or 11h) */
+            scan_type = pmadapter->scan_type;
+            cfp = pscan_region->pcfp + next_chan;
+
+            if (scan_type == MLAN_SCAN_TYPE_ACTIVE
+                && wlan_11d_is_enabled(pmpriv)) {
+                scan_type = wlan_11d_get_scan_type(pmadapter,
+                                                   pscan_region->band,
+                                                   (t_u8) cfp->channel,
+                                                   &pmadapter->
+                                                   parsed_region_chan);
+            }
+
+            switch (pscan_region->band) {
+            case BAND_A:
+                pscan_chan_list[chan_idx].radio_type =
+                    HostCmd_SCAN_RADIO_TYPE_A;
+                if (!wlan_11d_is_enabled(pmpriv)) {
+                    /* 11D not available... play it safe on DFS channels */
+                    if (wlan_11h_radar_detect_required
+                        (pmpriv, (t_u8) cfp->channel))
+                        scan_type = MLAN_SCAN_TYPE_PASSIVE;
+                }
+                break;
+            case BAND_B:
+            case BAND_G:
+            default:
+                pscan_chan_list[chan_idx].radio_type =
+                    HostCmd_SCAN_RADIO_TYPE_BG;
+                break;
+            }
+
+            if (puser_scan_in && puser_scan_in->chan_list[0].scan_time) {
+                pscan_chan_list[chan_idx].max_scan_time =
+                    wlan_cpu_to_le16((t_u16) puser_scan_in->chan_list[0].
+                                     scan_time);
+            } else if (scan_type == MLAN_SCAN_TYPE_PASSIVE) {
+                pscan_chan_list[chan_idx].max_scan_time =
+                    wlan_cpu_to_le16(pmadapter->passive_scan_time);
+            } else if (filtered_scan) {
+                pscan_chan_list[chan_idx].max_scan_time =
+                    wlan_cpu_to_le16(pmadapter->specific_scan_time);
+            } else {
+                pscan_chan_list[chan_idx].max_scan_time =
+                    wlan_cpu_to_le16(pmadapter->active_scan_time);
+            }
+
+            if (scan_type == MLAN_SCAN_TYPE_PASSIVE) {
+                pscan_chan_list[chan_idx].chan_scan_mode.passive_scan = MTRUE;
+            } else {
+                pscan_chan_list[chan_idx].chan_scan_mode.passive_scan = MFALSE;
+            }
+
+            pscan_chan_list[chan_idx].chan_number = (t_u8) cfp->channel;
+
+            if (filtered_scan) {
+                pscan_chan_list[chan_idx].chan_scan_mode.disable_chan_filt =
+                    MTRUE;
+            }
+        }
+    }
+
+    LEAVE();
+}
+
+/**
+ *  @brief Add WPS IE to probe request frame
+ *
+ *  @param pmpriv             A pointer to mlan_private structure
+ *  @param pptlv_out          A pointer to TLV to fill in
+ *
+ *  @return                   N/A
+ */
+static void
+wlan_add_wps_probe_request_ie(IN mlan_private * pmpriv, OUT t_u8 ** pptlv_out)
+{
+    MrvlIEtypesHeader_t *tlv;
+
+    ENTER();
+
+    if (pmpriv->wps.wps_ie.vend_hdr.len) {
+        tlv = (MrvlIEtypesHeader_t *) * pptlv_out;
+        tlv->type = wlan_cpu_to_le16(VENDOR_SPECIFIC_221);
+        tlv->len = wlan_cpu_to_le16(pmpriv->wps.wps_ie.vend_hdr.len);
+        *pptlv_out += sizeof(MrvlIEtypesHeader_t);
+        memcpy(pmpriv->adapter, *pptlv_out,
+               pmpriv->wps.wps_ie.vend_hdr.oui,
+               pmpriv->wps.wps_ie.vend_hdr.len);
+        *pptlv_out += (pmpriv->wps.wps_ie.vend_hdr.len
+                       + sizeof(MrvlIEtypesHeader_t));
+    }
+
+    LEAVE();
+}
+
+/**
+ *  @brief Construct and send multiple scan config commands to the firmware
+ *
+ *  Previous routines have created a wlan_scan_cmd_config with any requested
+ *   TLVs.  This function splits the channel TLV into max_chan_per_scan lists
+ *   and sends the portion of the channel TLV along with the other TLVs
+ *   to the wlan_cmd routines for execution in the firmware.
+ *
+ *  @param pmpriv             A pointer to mlan_private structure
+ *  @param pioctl_buf         A pointer to MLAN IOCTL Request buffer
+ *  @param max_chan_per_scan  Maximum number channels to be included in each
+ *                            scan command sent to firmware
+ *  @param filtered_scan      Flag indicating whether or not a BSSID or SSID
+ *                            filter is being used for the firmware command
+ *                            scan command sent to firmware
+ *  @param pscan_cfg_out      Scan configuration used for this scan.
+ *  @param pchan_tlv_out      Pointer in the pscan_cfg_out where the channel TLV
+ *                            should start.  This is past any other TLVs that
+ *                            must be sent down in each firmware command.
+ *  @param pscan_chan_list    List of channels to scan in max_chan_per_scan segments
+ *
+ *  @return                   MLAN_STATUS_SUCCESS or error return otherwise
+ */
+static mlan_status
+wlan_scan_channel_list(IN mlan_private * pmpriv,
+                       IN t_void * pioctl_buf,
+                       IN t_u32 max_chan_per_scan,
+                       IN t_u8 filtered_scan,
+                       OUT wlan_scan_cmd_config * pscan_cfg_out,
+                       OUT MrvlIEtypes_ChanListParamSet_t * pchan_tlv_out,
+                       IN ChanScanParamSet_t * pscan_chan_list)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    ChanScanParamSet_t *ptmp_chan_list;
+    ChanScanParamSet_t *pstart_chan;
+    pmlan_ioctl_req pioctl_req = (mlan_ioctl_req *) pioctl_buf;
+
+    t_u32 tlv_idx;
+    t_u32 total_scan_time;
+    t_u32 done_early;
+    t_u32 cmd_no;
+
+    ENTER();
+
+    if (!pscan_cfg_out || !pchan_tlv_out || !pscan_chan_list) {
+        PRINTM(MINFO, "Scan: Null detect: %p, %p, %p\n",
+               pscan_cfg_out, pchan_tlv_out, pscan_chan_list);
+        if (pioctl_req)
+            pioctl_req->status_code = MLAN_ERROR_CMD_SCAN_FAIL;
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+    if (!pscan_chan_list->chan_number) {
+        PRINTM(MERROR, "Scan: No channel configured\n");
+        if (pioctl_req)
+            pioctl_req->status_code = MLAN_ERROR_CMD_SCAN_FAIL;
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+
+    pchan_tlv_out->header.type = wlan_cpu_to_le16(TLV_TYPE_CHANLIST);
+
+    /* Set the temp channel struct pointer to the start of the desired list */
+    ptmp_chan_list = pscan_chan_list;
+
+    /* Loop through the desired channel list, sending a new firmware scan
+       commands for each max_chan_per_scan channels (or for 1,6,11 individually 
+       if configured accordingly) */
+    while (ptmp_chan_list->chan_number) {
+
+        tlv_idx = 0;
+        total_scan_time = 0;
+        pchan_tlv_out->header.len = 0;
+        pstart_chan = ptmp_chan_list;
+        done_early = MFALSE;
+
+        /* 
+         * Construct the Channel TLV for the scan command.  Continue to
+         * insert channel TLVs until:
+         *   - the tlv_idx hits the maximum configured per scan command
+         *   - the next channel to insert is 0 (end of desired channel list)
+         *   - done_early is set (controlling individual scanning of 1,6,11)
+         */
+        while (tlv_idx < max_chan_per_scan && ptmp_chan_list->chan_number &&
+               !done_early) {
+
+            PRINTM(MINFO, "Scan: Chan(%3d), Radio(%d), Mode(%d,%d), Dur(%d)\n",
+                   ptmp_chan_list->chan_number,
+                   ptmp_chan_list->radio_type,
+                   ptmp_chan_list->chan_scan_mode.passive_scan,
+                   ptmp_chan_list->chan_scan_mode.disable_chan_filt,
+                   wlan_le16_to_cpu(ptmp_chan_list->max_scan_time));
+
+            /* Copy the current channel TLV to the command being prepared */
+            memcpy(pmadapter, pchan_tlv_out->chan_scan_param + tlv_idx,
+                   ptmp_chan_list, sizeof(pchan_tlv_out->chan_scan_param));
+
+            /* Increment the TLV header length by the size appended */
+            pchan_tlv_out->header.len += sizeof(pchan_tlv_out->chan_scan_param);
+
+            /* 
+             * The tlv buffer length is set to the number of bytes of the
+             *   between the channel tlv pointer and the start of the
+             *   tlv buffer.  This compensates for any TLVs that were appended
+             *   before the channel list.
+             */
+            pscan_cfg_out->tlv_buf_len = (t_u32) ((t_u8 *) pchan_tlv_out
+                                                  - pscan_cfg_out->tlv_buf);
+
+            /* Add the size of the channel tlv header and the data length */
+            pscan_cfg_out->tlv_buf_len += (sizeof(pchan_tlv_out->header)
+                                           + pchan_tlv_out->header.len);
+
+            /* Increment the index to the channel tlv we are constructing */
+            tlv_idx++;
+
+            /* Count the total scan time per command */
+            total_scan_time += wlan_le16_to_cpu(ptmp_chan_list->max_scan_time);
+
+            done_early = MFALSE;
+
+            /* Stop the loop if the *current* channel is in the 1,6,11 set and
+               we are not filtering on a BSSID or SSID. */
+            if (!filtered_scan && (ptmp_chan_list->chan_number == 1 ||
+                                   ptmp_chan_list->chan_number == 6 ||
+                                   ptmp_chan_list->chan_number == 11)) {
+                done_early = MTRUE;
+            }
+
+            /* Increment the tmp pointer to the next channel to be scanned */
+            ptmp_chan_list++;
+
+            /* Stop the loop if the *next* channel is in the 1,6,11 set.  This
+               will cause it to be the only channel scanned on the next
+               interation */
+            if (!filtered_scan && (ptmp_chan_list->chan_number == 1 ||
+                                   ptmp_chan_list->chan_number == 6 ||
+                                   ptmp_chan_list->chan_number == 11)) {
+                done_early = MTRUE;
+            }
+        }
+
+        /* The total scan time should be less than scan command timeout value */
+        if (total_scan_time > MRVDRV_MAX_TOTAL_SCAN_TIME) {
+            PRINTM(MMSG,
+                   "Total scan time %d ms is over limit (%d ms), scan skipped\n",
+                   total_scan_time, MRVDRV_MAX_TOTAL_SCAN_TIME);
+            if (pioctl_req)
+                pioctl_req->status_code = MLAN_ERROR_CMD_SCAN_FAIL;
+            ret = MLAN_STATUS_FAILURE;
+            break;
+        }
+
+        pchan_tlv_out->header.len = wlan_cpu_to_le16(pchan_tlv_out->header.len);
+
+        pmadapter->pscan_channels = pstart_chan;
+
+        /* Send the scan command to the firmware with the specified cfg */
+        cmd_no = HostCmd_CMD_802_11_SCAN;
+        ret = wlan_prepare_cmd(pmpriv,
+                               cmd_no,
+                               HostCmd_ACT_GEN_SET,
+                               0, pioctl_buf, pscan_cfg_out);
+        if (ret)
+            break;
+    }
+
+    LEAVE();
+
+    if (ret) {
+        return MLAN_STATUS_FAILURE;
+    }
+
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief Construct a wlan_scan_cmd_config structure to use in scan commands
+ *
+ *  Application layer or other functions can invoke wlan_scan_networks
+ *    with a scan configuration supplied in a wlan_ioctl_user_scan_cfg struct.
+ *    This structure is used as the basis of one or many wlan_scan_cmd_config
+ *    commands that are sent to the command processing module and sent to
+ *    firmware.
+ *
+ *  Create a wlan_scan_cmd_config based on the following user supplied
+ *    parameters (if present):
+ *             - SSID filter
+ *             - BSSID filter
+ *             - Number of Probes to be sent
+ *             - Channel list
+ *
+ *  If the SSID or BSSID filter is not present, disable/clear the filter.
+ *  If the number of probes is not set, use the adapter default setting
+ *  Qualify the channel
+ *
+ *  @param pmpriv              A pointer to mlan_private structure
+ *  @param puser_scan_in       MNULL or pointer to scan config parameters
+ *  @param pscan_cfg_out       Output parameter: Resulting scan configuration
+ *  @param ppchan_list_out     Output parameter: Pointer to the start of the
+ *                             channel TLV portion of the output scan config
+ *  @param pscan_chan_list     Output parameter: Pointer to the resulting 
+ *                             channel list to scan
+ *  @param pmax_chan_per_scan  Output parameter: Number of channels to scan for
+ *                             each issuance of the firmware scan command
+ *  @param pfiltered_scan      Output parameter: Flag indicating whether or not
+ *                             a BSSID or SSID filter is being sent in the
+ *                             command to firmware. Used to increase the number
+ *                             of channels sent in a scan command and to 
+ *                             disable the firmware channel scan filter.
+ *  @param pscan_current_only  Output parameter: Flag indicating whether or not
+ *                             we are only scanning our current active channel
+ *
+ *  @return                 N/A
+ */
+static mlan_status
+wlan_scan_setup_scan_config(IN mlan_private * pmpriv,
+                            IN const wlan_user_scan_cfg * puser_scan_in,
+                            OUT wlan_scan_cmd_config * pscan_cfg_out,
+                            OUT MrvlIEtypes_ChanListParamSet_t **
+                            ppchan_list_out,
+                            OUT ChanScanParamSet_t * pscan_chan_list,
+                            OUT t_u8 * pmax_chan_per_scan,
+                            OUT t_u8 * pfiltered_scan,
+                            OUT t_u8 * pscan_current_only)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    MrvlIEtypes_NumProbes_t *pnum_probes_tlv;
+    MrvlIEtypes_WildCardSsIdParamSet_t *pwildcard_ssid_tlv;
+    MrvlIEtypes_RatesParamSet_t *prates_tlv;
+    const t_u8 zero_mac[MLAN_MAC_ADDR_LENGTH] = { 0, 0, 0, 0, 0, 0 };
+    t_u8 *ptlv_pos;
+    t_u32 num_probes;
+    t_u32 ssid_len;
+    t_u32 chan_idx;
+    t_u32 scan_type;
+    t_u16 scan_dur;
+    t_u8 channel;
+    t_u8 radio_type;
+    t_u32 ssid_idx;
+    t_u8 ssid_filter;
+    WLAN_802_11_RATES rates;
+    t_u32 rates_size;
+    MrvlIETypes_HTCap_t *pht_cap;
+
+    ENTER();
+
+    /* The tlv_buf_len is calculated for each scan command.  The TLVs added in
+       this routine will be preserved since the routine that sends the command
+       will append channelTLVs at *ppchan_list_out.  The difference between the 
+       *ppchan_list_out and the tlv_buf start will be used to calculate the
+       size of anything we add in this routine. */
+    pscan_cfg_out->tlv_buf_len = 0;
+
+    /* Running tlv pointer.  Assigned to ppchan_list_out at end of function so
+       later routines know where channels can be added to the command buf */
+    ptlv_pos = pscan_cfg_out->tlv_buf;
+
+    /* Initialize the scan as un-filtered; the flag is later set to TRUE below
+       if a SSID or BSSID filter is sent in the command */
+    *pfiltered_scan = MFALSE;
+
+    /* Initialize the scan as not being only on the current channel.  If the
+       channel list is customized, only contains one channel, and is the active 
+       channel, this is set true and data flow is not halted. */
+    *pscan_current_only = MFALSE;
+
+    if (puser_scan_in) {
+
+        ssid_filter = MFALSE;
+
+        /* Set the bss type scan filter, use Adapter setting if unset */
+        pscan_cfg_out->bss_mode = (puser_scan_in->bss_mode
+                                   ? (t_u8) puser_scan_in->bss_mode :
+                                   (t_u8) pmadapter->scan_mode);
+
+        /* Set the number of probes to send, use Adapter setting if unset */
+        num_probes = (puser_scan_in->num_probes ? puser_scan_in->num_probes :
+                      pmadapter->scan_probes);
+
+        /* 
+         * Set the BSSID filter to the incoming configuration,
+         *   if non-zero.  If not set, it will remain disabled (all zeros).
+         */
+        memcpy(pmadapter, pscan_cfg_out->specific_bssid,
+               puser_scan_in->specific_bssid,
+               sizeof(pscan_cfg_out->specific_bssid));
+
+        for (ssid_idx = 0; ((ssid_idx < NELEMENTS(puser_scan_in->ssid_list))
+                            && (*puser_scan_in->ssid_list[ssid_idx].ssid ||
+                                puser_scan_in->ssid_list[ssid_idx].max_len));
+             ssid_idx++) {
+
+            ssid_len =
+                wlan_strlen((t_s8 *) puser_scan_in->ssid_list[ssid_idx].ssid);
+
+            pwildcard_ssid_tlv
+                = (MrvlIEtypes_WildCardSsIdParamSet_t *) ptlv_pos;
+            pwildcard_ssid_tlv->header.type
+                = wlan_cpu_to_le16(TLV_TYPE_WILDCARDSSID);
+            pwildcard_ssid_tlv->header.len
+                = (t_u16) (ssid_len
+                           + sizeof(pwildcard_ssid_tlv->max_ssid_length));
+            pwildcard_ssid_tlv->max_ssid_length
+                = puser_scan_in->ssid_list[ssid_idx].max_len;
+
+            memcpy(pmadapter, pwildcard_ssid_tlv->ssid,
+                   puser_scan_in->ssid_list[ssid_idx].ssid, ssid_len);
+
+            ptlv_pos += (sizeof(pwildcard_ssid_tlv->header)
+                         + pwildcard_ssid_tlv->header.len);
+
+            pwildcard_ssid_tlv->header.len
+                = wlan_cpu_to_le16(pwildcard_ssid_tlv->header.len);
+
+            PRINTM(MINFO, "Scan: ssid_list[%d]: %s, %d\n",
+                   ssid_idx,
+                   pwildcard_ssid_tlv->ssid,
+                   pwildcard_ssid_tlv->max_ssid_length);
+
+            if (ssid_len) {
+                ssid_filter = MTRUE;
+            }
+        }
+
+        /* 
+         *  The default number of channels sent in the command is low to
+         *    ensure the response buffer from the firmware does not truncate
+         *    scan results.  That is not an issue with an SSID or BSSID
+         *    filter applied to the scan results in the firmware.
+         */
+        if ((ssid_idx && ssid_filter) ||
+            memcmp(pmadapter, pscan_cfg_out->specific_bssid, &zero_mac,
+                   sizeof(zero_mac))) {
+            *pfiltered_scan = MTRUE;
+        }
+
+    } else {
+        pscan_cfg_out->bss_mode = (t_u8) pmadapter->scan_mode;
+        num_probes = pmadapter->scan_probes;
+    }
+
+    /* 
+     *  If a specific BSSID or SSID is used, the number of channels in the 
+     *  scan command will be increased to the absolute maximum.
+     */
+    if (*pfiltered_scan)
+        *pmax_chan_per_scan = MRVDRV_MAX_CHANNELS_PER_SPECIFIC_SCAN;
+    else
+        *pmax_chan_per_scan = MRVDRV_CHANNELS_PER_SCAN_CMD;
+
+    /* If the input config or adapter has the number of Probes set, add tlv */
+    if (num_probes) {
+
+        PRINTM(MINFO, "Scan: num_probes = %d\n", num_probes);
+
+        pnum_probes_tlv = (MrvlIEtypes_NumProbes_t *) ptlv_pos;
+        pnum_probes_tlv->header.type = wlan_cpu_to_le16(TLV_TYPE_NUMPROBES);
+        pnum_probes_tlv->header.len = sizeof(pnum_probes_tlv->num_probes);
+        pnum_probes_tlv->num_probes = wlan_cpu_to_le16((t_u16) num_probes);
+
+        ptlv_pos +=
+            sizeof(pnum_probes_tlv->header) + pnum_probes_tlv->header.len;
+
+        pnum_probes_tlv->header.len =
+            wlan_cpu_to_le16(pnum_probes_tlv->header.len);
+    }
+
+    /* Append rates tlv */
+    memset(pmadapter, rates, 0, sizeof(rates));
+
+    rates_size = wlan_get_supported_rates(pmpriv, pmpriv->bss_mode,
+                                          (pmpriv->bss_mode ==
+                                           MLAN_BSS_MODE_INFRA) ? pmadapter->
+                                          config_bands : pmadapter->
+                                          adhoc_start_band, rates);
+
+    prates_tlv = (MrvlIEtypes_RatesParamSet_t *) ptlv_pos;
+    prates_tlv->header.type = wlan_cpu_to_le16(TLV_TYPE_RATES);
+    prates_tlv->header.len = wlan_cpu_to_le16((t_u16) rates_size);
+    memcpy(pmadapter, prates_tlv->rates, rates, rates_size);
+    ptlv_pos += sizeof(prates_tlv->header) + rates_size;
+
+    PRINTM(MINFO, "SCAN_CMD: Rates size = %d\n", rates_size);
+
+    if (ISSUPP_11NENABLED(pmpriv->adapter->fw_cap_info)
+        && (pmpriv->adapter->config_bands & BAND_GN
+            || pmpriv->adapter->config_bands & BAND_AN)) {
+        pht_cap = (MrvlIETypes_HTCap_t *) ptlv_pos;
+        memset(pmadapter, pht_cap, 0, sizeof(MrvlIETypes_HTCap_t));
+        pht_cap->header.type = wlan_cpu_to_le16(HT_CAPABILITY);
+        pht_cap->header.len = sizeof(HTCap_t);
+        wlan_fill_ht_cap_tlv(pmpriv, pht_cap);
+        HEXDUMP("SCAN: HT_CAPABILITIES IE", (t_u8 *) pht_cap,
+                sizeof(MrvlIETypes_HTCap_t));
+        ptlv_pos += sizeof(MrvlIETypes_HTCap_t);
+        pht_cap->header.len = wlan_cpu_to_le16(pht_cap->header.len);
+    }
+
+    wlan_add_wps_probe_request_ie(pmpriv, &ptlv_pos);
+
+    /* 
+     * Set the output for the channel TLV to the address in the tlv buffer
+     *   past any TLVs that were added in this function (SSID, num_probes).
+     *   Channel TLVs will be added past this for each scan command, preserving
+     *   the TLVs that were previously added.
+     */
+    *ppchan_list_out = (MrvlIEtypes_ChanListParamSet_t *) ptlv_pos;
+
+    if (puser_scan_in && puser_scan_in->chan_list[0].chan_number) {
+
+        PRINTM(MINFO, "Scan: Using supplied channel list\n");
+
+        for (chan_idx = 0;
+             chan_idx < WLAN_USER_SCAN_CHAN_MAX
+             && puser_scan_in->chan_list[chan_idx].chan_number; chan_idx++) {
+
+            channel = puser_scan_in->chan_list[chan_idx].chan_number;
+            (pscan_chan_list + chan_idx)->chan_number = channel;
+
+            radio_type = puser_scan_in->chan_list[chan_idx].radio_type;
+            (pscan_chan_list + chan_idx)->radio_type = radio_type;
+
+            scan_type = puser_scan_in->chan_list[chan_idx].scan_type;
+
+            if (radio_type == HostCmd_SCAN_RADIO_TYPE_A) {
+                if (pmadapter->fw_bands & BAND_A)
+                    PRINTM(MINFO, "UserScan request for A Band channel %d!!\n",
+                           channel);
+                else {
+                    PRINTM(MERROR, "Scan in A band is not allowed!!\n");
+                    ret = MLAN_STATUS_FAILURE;
+                    LEAVE();
+                    return ret;
+
+                }
+            }
+
+            /* Prevent active scanning on a radar controlled channel */
+            if (radio_type == HostCmd_SCAN_RADIO_TYPE_A) {
+                if (wlan_11h_radar_detect_required(pmpriv, channel)) {
+                    scan_type = MLAN_SCAN_TYPE_PASSIVE;
+                }
+            }
+            if (scan_type == MLAN_SCAN_TYPE_PASSIVE) {
+                (pscan_chan_list + chan_idx)->chan_scan_mode.passive_scan =
+                    MTRUE;
+            } else {
+                (pscan_chan_list + chan_idx)->chan_scan_mode.passive_scan =
+                    MFALSE;
+            }
+
+            if (puser_scan_in->chan_list[chan_idx].scan_time) {
+                scan_dur = (t_u16) puser_scan_in->chan_list[chan_idx].scan_time;
+            } else {
+                if (scan_type == MLAN_SCAN_TYPE_PASSIVE) {
+                    scan_dur = pmadapter->passive_scan_time;
+                } else if (*pfiltered_scan) {
+                    scan_dur = pmadapter->specific_scan_time;
+                } else {
+                    scan_dur = pmadapter->active_scan_time;
+                }
+            }
+
+            (pscan_chan_list + chan_idx)->min_scan_time =
+                wlan_cpu_to_le16(scan_dur);
+            (pscan_chan_list + chan_idx)->max_scan_time =
+                wlan_cpu_to_le16(scan_dur);
+        }
+
+        /* Check if we are only scanning the current channel */
+        if ((chan_idx == 1)
+            && (puser_scan_in->chan_list[0].chan_number
+                == pmpriv->curr_bss_params.bss_descriptor.channel)) {
+            *pscan_current_only = MTRUE;
+            PRINTM(MINFO, "Scan: Scanning current channel only\n");
+        }
+
+    } else {
+        PRINTM(MINFO, "Scan: Creating full region channel list\n");
+        wlan_scan_create_channel_list(pmpriv, puser_scan_in, pscan_chan_list,
+                                      *pfiltered_scan);
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Inspect the scan response buffer for pointers to expected TLVs
+ *
+ *  TLVs can be included at the end of the scan response BSS information.
+ *    Parse the data in the buffer for pointers to TLVs that can potentially
+ *    be passed back in the response
+ *
+ *  @param pmadapter        Pointer to the mlan_adapter structure
+ *  @param ptlv             Pointer to the start of the TLV buffer to parse
+ *  @param tlv_buf_size     Size of the TLV buffer
+ *  @param req_tlv_type     Request TLV's type 
+ *  @param pptlv            Output parameter: Pointer to the request TLV if found
+ *
+ *  @return                 N/A
+ */
+static t_void
+wlan_ret_802_11_scan_get_tlv_ptrs(IN pmlan_adapter pmadapter,
+                                  IN MrvlIEtypes_Data_t * ptlv,
+                                  IN t_u32 tlv_buf_size,
+                                  IN t_u32 req_tlv_type,
+                                  OUT MrvlIEtypes_Data_t ** pptlv)
+{
+    MrvlIEtypes_Data_t *pcurrent_tlv;
+    t_u32 tlv_buf_left;
+    t_u32 tlv_type;
+    t_u32 tlv_len;
+
+    ENTER();
+
+    pcurrent_tlv = ptlv;
+    tlv_buf_left = tlv_buf_size;
+    *pptlv = MNULL;
+
+    PRINTM(MINFO, "SCAN_RESP: tlv_buf_size = %d\n", tlv_buf_size);
+
+    while (tlv_buf_left >= sizeof(MrvlIEtypesHeader_t)) {
+
+        tlv_type = wlan_le16_to_cpu(pcurrent_tlv->header.type);
+        tlv_len = wlan_le16_to_cpu(pcurrent_tlv->header.len);
+
+        if (sizeof(ptlv->header) + tlv_len > tlv_buf_left) {
+            PRINTM(MERROR, "SCAN_RESP: TLV buffer corrupt\n");
+            break;
+        }
+
+        if (req_tlv_type == tlv_type) {
+            switch (tlv_type) {
+            case TLV_TYPE_TSFTIMESTAMP:
+                PRINTM(MINFO, "SCAN_RESP: TSF Timestamp TLV, len = %d\n",
+                       tlv_len);
+                *pptlv = (MrvlIEtypes_Data_t *) pcurrent_tlv;
+                break;
+            case TLV_TYPE_CHANNELBANDLIST:
+                PRINTM(MINFO, "SCAN_RESP: CHANNEL BAND LIST TLV, len = %d\n",
+                       tlv_len);
+                *pptlv = (MrvlIEtypes_Data_t *) pcurrent_tlv;
+                break;
+            default:
+                PRINTM(MERROR, "SCAN_RESP: Unhandled TLV = %d\n", tlv_type);
+                /* Give up, this seems corrupted */
+                LEAVE();
+                return;
+            }
+        }
+
+        if (*pptlv) {
+            // HEXDUMP("SCAN_RESP: TLV Buf", (t_u8 *)*pptlv+4, tlv_len);
+            break;
+        }
+
+        tlv_buf_left -= (sizeof(ptlv->header) + tlv_len);
+        pcurrent_tlv = (MrvlIEtypes_Data_t *) (pcurrent_tlv->data + tlv_len);
+
+    }                           /* while */
+
+    LEAVE();
+}
+
+/**
+ *  @brief Interpret a BSS scan response returned from the firmware
+ *
+ *  Parse the various fixed fields and IEs passed back for a BSS probe
+ *   response or beacon from the scan command.  Record information as needed
+ *   in the scan table BSSDescriptor_t for that entry.
+ *
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param pbss_entry   Output parameter: Pointer to the BSS Entry
+ *  @param pbeacon_info Pointer to the Beacon information
+ *  @param bytes_left   Number of bytes left to parse
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_interpret_bss_desc_with_ie(IN pmlan_adapter pmadapter,
+                                OUT BSSDescriptor_t * pbss_entry,
+                                IN t_u8 ** pbeacon_info, IN t_u32 * bytes_left)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    IEEEtypes_ElementId_e element_id;
+    IEEEtypes_FhParamSet_t *pfh_param_set;
+    IEEEtypes_DsParamSet_t *pds_param_set;
+    IEEEtypes_CfParamSet_t *pcf_param_set;
+    IEEEtypes_IbssParamSet_t *pibss_param_set;
+    IEEEtypes_CapInfo_t *pcap_info;
+    WLAN_802_11_FIXED_IEs fixed_ie;
+    t_u8 *pcurrent_ptr;
+    t_u8 *prate;
+    t_u8 element_len;
+    t_u16 total_ie_len;
+    t_u8 bytes_to_copy;
+    t_u8 rate_size;
+    t_u16 beacon_size;
+    t_u8 found_data_rate_ie;
+    t_u32 bytes_left_for_current_beacon;
+    IEEEtypes_ERPInfo_t *perp_info;
+
+    IEEEtypes_VendorSpecific_t *pvendor_ie;
+    const t_u8 wpa_oui[4] = { 0x00, 0x50, 0xf2, 0x01 };
+    const t_u8 wmm_oui[4] = { 0x00, 0x50, 0xf2, 0x02 };
+
+    IEEEtypes_CountryInfoSet_t *pcountry_info;
+
+    ENTER();
+
+    found_data_rate_ie = MFALSE;
+    rate_size = 0;
+    beacon_size = 0;
+
+    if (*bytes_left >= sizeof(beacon_size)) {
+        /* Extract & convert beacon size from the command buffer */
+        memcpy(pmadapter, &beacon_size, *pbeacon_info, sizeof(beacon_size));
+        beacon_size = wlan_le16_to_cpu(beacon_size);
+        *bytes_left -= sizeof(beacon_size);
+        *pbeacon_info += sizeof(beacon_size);
+    }
+
+    if (!beacon_size || beacon_size > *bytes_left) {
+
+        *pbeacon_info += *bytes_left;
+        *bytes_left = 0;
+
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+
+    /* Initialize the current working beacon pointer for this BSS iteration */
+    pcurrent_ptr = *pbeacon_info;
+
+    /* Advance the return beacon pointer past the current beacon */
+    *pbeacon_info += beacon_size;
+    *bytes_left -= beacon_size;
+
+    bytes_left_for_current_beacon = beacon_size;
+
+    memcpy(pmadapter, pbss_entry->mac_address, pcurrent_ptr,
+           MLAN_MAC_ADDR_LENGTH);
+    PRINTM(MINFO, "InterpretIE: AP MAC Addr-%02x:%02x:%02x:%02x:%02x:%02x\n",
+           pbss_entry->mac_address[0], pbss_entry->mac_address[1],
+           pbss_entry->mac_address[2], pbss_entry->mac_address[3],
+           pbss_entry->mac_address[4], pbss_entry->mac_address[5]);
+
+    pcurrent_ptr += MLAN_MAC_ADDR_LENGTH;
+    bytes_left_for_current_beacon -= MLAN_MAC_ADDR_LENGTH;
+
+    if (bytes_left_for_current_beacon < 12) {
+        PRINTM(MERROR, "InterpretIE: Not enough bytes left\n");
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+
+    /* 
+     * Next 4 fields are RSSI (for legacy scan only), time stamp,
+     *   beacon interval, and capability information
+     */
+    /* RSSI is 1 byte long */
+    pbss_entry->rssi = (t_s32) (*pcurrent_ptr);
+    PRINTM(MINFO, "InterpretIE: RSSI=%02X\n", *pcurrent_ptr);
+    pcurrent_ptr += 1;
+    bytes_left_for_current_beacon -= 1;
+
+    /* 
+     *  The RSSI is not part of the beacon/probe response.  After we have
+     *    advanced pcurrent_ptr past the RSSI field, save the remaining
+     *    data for use at the application layer
+     */
+    pbss_entry->pbeacon_buf = pcurrent_ptr;
+    pbss_entry->beacon_buf_size = bytes_left_for_current_beacon;
+
+    /* Time stamp is 8 bytes long */
+    memcpy(pmadapter, fixed_ie.time_stamp, pcurrent_ptr, 8);
+    memcpy(pmadapter, pbss_entry->time_stamp, pcurrent_ptr, 8);
+    pcurrent_ptr += 8;
+    bytes_left_for_current_beacon -= 8;
+
+    /* Beacon interval is 2 bytes long */
+    memcpy(pmadapter, &fixed_ie.beacon_interval, pcurrent_ptr, 2);
+    pbss_entry->beacon_period = wlan_le16_to_cpu(fixed_ie.beacon_interval);
+    pcurrent_ptr += 2;
+    bytes_left_for_current_beacon -= 2;
+
+    /* Capability information is 2 bytes long */
+    memcpy(pmadapter, &fixed_ie.capabilities, pcurrent_ptr, 2);
+    PRINTM(MINFO, "InterpretIE: fixed_ie.capabilities=0x%X\n",
+           fixed_ie.capabilities);
+    fixed_ie.capabilities = wlan_le16_to_cpu(fixed_ie.capabilities);
+    pcap_info = (IEEEtypes_CapInfo_t *) & fixed_ie.capabilities;
+    memcpy(pmadapter, &pbss_entry->cap_info, pcap_info,
+           sizeof(IEEEtypes_CapInfo_t));
+    pcurrent_ptr += 2;
+    bytes_left_for_current_beacon -= 2;
+
+    /* Rest of the current buffer are IE's */
+    PRINTM(MINFO, "InterpretIE: IELength for this AP = %d\n",
+           bytes_left_for_current_beacon);
+
+    HEXDUMP("InterpretIE: IE info", (t_u8 *) pcurrent_ptr,
+            bytes_left_for_current_beacon);
+
+    if (pcap_info->privacy) {
+        PRINTM(MINFO, "InterpretIE: AP WEP enabled\n");
+        pbss_entry->privacy = Wlan802_11PrivFilter8021xWEP;
+    } else {
+        pbss_entry->privacy = Wlan802_11PrivFilterAcceptAll;
+    }
+
+    if (pcap_info->ibss == 1) {
+        pbss_entry->bss_mode = MLAN_BSS_MODE_IBSS;
+    } else {
+        pbss_entry->bss_mode = MLAN_BSS_MODE_INFRA;
+    }
+
+    if (pcap_info->spectrum_mgmt == 1) {
+        PRINTM(MINFO, "InterpretIE: 11h- Spectrum Management "
+               "capability bit found\n");
+        pbss_entry->wlan_11h_bss_info.sensed_11h = 1;
+    }
+
+    /* Process variable IE */
+    while (bytes_left_for_current_beacon >= 2) {
+        element_id = (IEEEtypes_ElementId_e) (*((t_u8 *) pcurrent_ptr));
+        element_len = *((t_u8 *) pcurrent_ptr + 1);
+        total_ie_len = element_len + sizeof(IEEEtypes_Header_t);
+
+        if (bytes_left_for_current_beacon < total_ie_len) {
+            PRINTM(MERROR, "InterpretIE: Error in processing IE, "
+                   "bytes left < IE length\n");
+            bytes_left_for_current_beacon = 0;
+            ret = MLAN_STATUS_FAILURE;
+            continue;
+        }
+
+        switch (element_id) {
+
+        case SSID:
+            if (element_len > MRVDRV_MAX_SSID_LENGTH) {
+                bytes_left_for_current_beacon = 0;
+                ret = MLAN_STATUS_FAILURE;
+                continue;
+            }
+            pbss_entry->ssid.ssid_len = element_len;
+            memcpy(pmadapter, pbss_entry->ssid.ssid, (pcurrent_ptr + 2),
+                   element_len);
+            PRINTM(MINFO, "InterpretIE: ssid: %-32s\n", pbss_entry->ssid.ssid);
+            break;
+
+        case SUPPORTED_RATES:
+            if (element_len > WLAN_SUPPORTED_RATES) {
+                bytes_left_for_current_beacon = 0;
+                ret = MLAN_STATUS_FAILURE;
+                continue;
+            }
+            memcpy(pmadapter, pbss_entry->data_rates, pcurrent_ptr + 2,
+                   element_len);
+            memcpy(pmadapter, pbss_entry->supported_rates, pcurrent_ptr + 2,
+                   element_len);
+            HEXDUMP("InterpretIE: SupportedRates:", pbss_entry->supported_rates,
+                    element_len);
+            rate_size = element_len;
+            found_data_rate_ie = MTRUE;
+            break;
+
+        case FH_PARAM_SET:
+            pfh_param_set = (IEEEtypes_FhParamSet_t *) pcurrent_ptr;
+            pbss_entry->network_type_use = Wlan802_11FH;
+            memcpy(pmadapter, &pbss_entry->phy_param_set.fh_param_set,
+                   pfh_param_set, sizeof(IEEEtypes_FhParamSet_t));
+            pbss_entry->phy_param_set.fh_param_set.dwell_time =
+                wlan_le16_to_cpu(pbss_entry->phy_param_set.fh_param_set.
+                                 dwell_time);
+            break;
+
+        case DS_PARAM_SET:
+            pds_param_set = (IEEEtypes_DsParamSet_t *) pcurrent_ptr;
+
+            pbss_entry->network_type_use = Wlan802_11DS;
+            pbss_entry->channel = pds_param_set->current_chan;
+
+            memcpy(pmadapter, &pbss_entry->phy_param_set.ds_param_set,
+                   pds_param_set, sizeof(IEEEtypes_DsParamSet_t));
+            break;
+
+        case CF_PARAM_SET:
+            pcf_param_set = (IEEEtypes_CfParamSet_t *) pcurrent_ptr;
+            memcpy(pmadapter, &pbss_entry->ss_param_set.cf_param_set,
+                   pcf_param_set, sizeof(IEEEtypes_CfParamSet_t));
+            break;
+
+        case IBSS_PARAM_SET:
+            pibss_param_set = (IEEEtypes_IbssParamSet_t *) pcurrent_ptr;
+            pbss_entry->atim_window =
+                wlan_le16_to_cpu(pibss_param_set->atim_window);
+            memcpy(pmadapter, &pbss_entry->ss_param_set.ibss_param_set,
+                   pibss_param_set, sizeof(IEEEtypes_IbssParamSet_t));
+            break;
+
+            /* Handle Country Info IE */
+        case COUNTRY_INFO:
+            pcountry_info = (IEEEtypes_CountryInfoSet_t *) pcurrent_ptr;
+
+            if (pcountry_info->len < sizeof(pcountry_info->country_code) ||
+                (unsigned) (pcountry_info->len + 2) >
+                sizeof(IEEEtypes_CountryInfoFullSet_t)) {
+                PRINTM(MERROR,
+                       "InterpretIE: 11D- Err "
+                       "country_info len =%d min=%d max=%d\n",
+                       pcountry_info->len, sizeof(pcountry_info->country_code),
+                       sizeof(IEEEtypes_CountryInfoFullSet_t));
+                LEAVE();
+                return MLAN_STATUS_FAILURE;
+            }
+
+            memcpy(pmadapter, &pbss_entry->country_info,
+                   pcountry_info, pcountry_info->len + 2);
+            HEXDUMP("InterpretIE: 11D- country_info:",
+                    (t_u8 *) pcountry_info, (t_u32) (pcountry_info->len + 2));
+            break;
+
+        case ERP_INFO:
+            perp_info = (IEEEtypes_ERPInfo_t *) pcurrent_ptr;
+            pbss_entry->erp_flags = perp_info->erp_flags;
+            break;
+
+        case POWER_CONSTRAINT:
+        case POWER_CAPABILITY:
+        case TPC_REPORT:
+        case CHANNEL_SWITCH_ANN:
+        case QUIET:
+        case IBSS_DFS:
+        case SUPPORTED_CHANNELS:
+        case TPC_REQUEST:
+            wlan_11h_process_bss_elem(pmadapter, &pbss_entry->wlan_11h_bss_info,
+                                      pcurrent_ptr);
+            break;
+        case EXTENDED_SUPPORTED_RATES:
+            /* 
+             * Only process extended supported rate
+             * if data rate is already found.
+             * Data rate IE should come before
+             * extended supported rate IE
+             */
+            if (found_data_rate_ie) {
+                if ((element_len + rate_size) > WLAN_SUPPORTED_RATES) {
+                    bytes_to_copy = (WLAN_SUPPORTED_RATES - rate_size);
+                } else {
+                    bytes_to_copy = element_len;
+                }
+
+                prate = (t_u8 *) pbss_entry->data_rates;
+                prate += rate_size;
+                memcpy(pmadapter, prate, pcurrent_ptr + 2, bytes_to_copy);
+
+                prate = (t_u8 *) pbss_entry->supported_rates;
+                prate += rate_size;
+                memcpy(pmadapter, prate, pcurrent_ptr + 2, bytes_to_copy);
+            }
+            HEXDUMP("InterpretIE: ExtSupportedRates:",
+                    pbss_entry->supported_rates, element_len + rate_size);
+            break;
+
+        case VENDOR_SPECIFIC_221:
+            pvendor_ie = (IEEEtypes_VendorSpecific_t *) pcurrent_ptr;
+
+            if (!memcmp
+                (pmadapter, pvendor_ie->vend_hdr.oui, wpa_oui,
+                 sizeof(wpa_oui))) {
+                pbss_entry->pwpa_ie =
+                    (IEEEtypes_VendorSpecific_t *) pcurrent_ptr;
+                pbss_entry->wpa_offset =
+                    (t_u16) (pcurrent_ptr - pbss_entry->pbeacon_buf);
+                HEXDUMP("InterpretIE: Resp WPA_IE",
+                        (t_u8 *) pbss_entry->pwpa_ie,
+                        ((*(pbss_entry->pwpa_ie)).vend_hdr.len +
+                         sizeof(IEEEtypes_Header_t)));
+            } else
+                if (!memcmp
+                    (pmadapter, pvendor_ie->vend_hdr.oui, wmm_oui,
+                     sizeof(wmm_oui))) {
+                if (total_ie_len == sizeof(IEEEtypes_WmmParameter_t)
+                    || total_ie_len == sizeof(IEEEtypes_WmmInfo_t)) {
+
+                    /* 
+                     * Only accept and copy the WMM IE if it matches
+                     * the size expected for the WMM Info IE or the
+                     * WMM Parameter IE.
+                     */
+                    memcpy(pmadapter, (t_u8 *) & pbss_entry->wmm_ie,
+                           pcurrent_ptr, total_ie_len);
+                    HEXDUMP("InterpretIE: Resp WMM_IE",
+                            (t_u8 *) & pbss_entry->wmm_ie, total_ie_len);
+                }
+            }
+            break;
+        case RSN_IE:
+            pbss_entry->prsn_ie = (IEEEtypes_Generic_t *) pcurrent_ptr;
+            pbss_entry->rsn_offset =
+                (t_u16) (pcurrent_ptr - pbss_entry->pbeacon_buf);
+            HEXDUMP("InterpretIE: Resp RSN_IE", (t_u8 *) pbss_entry->prsn_ie,
+                    (*(pbss_entry->prsn_ie)).ieee_hdr.len +
+                    sizeof(IEEEtypes_Header_t));
+            break;
+        case WAPI_IE:
+            pbss_entry->pwapi_ie = (IEEEtypes_Generic_t *) pcurrent_ptr;
+            pbss_entry->wapi_offset =
+                (t_u16) (pcurrent_ptr - pbss_entry->pbeacon_buf);
+            HEXDUMP("InterpretIE: Resp WAPI_IE", (t_u8 *) pbss_entry->pwapi_ie,
+                    (*(pbss_entry->pwapi_ie)).ieee_hdr.len +
+                    sizeof(IEEEtypes_Header_t));
+            break;
+        case HT_CAPABILITY:
+            pbss_entry->pht_cap = (IEEEtypes_HTCap_t *) pcurrent_ptr;
+            pbss_entry->ht_cap_offset =
+                (t_u16) (pcurrent_ptr - pbss_entry->pbeacon_buf);
+            HEXDUMP("InterpretIE: Resp HTCAP_IE", (t_u8 *) pbss_entry->pht_cap,
+                    (*(pbss_entry->pht_cap)).ieee_hdr.len +
+                    sizeof(IEEEtypes_Header_t));
+            break;
+        case HT_OPERATION:
+            pbss_entry->pht_info = (IEEEtypes_HTInfo_t *) pcurrent_ptr;
+            pbss_entry->ht_info_offset =
+                (t_u16) (pcurrent_ptr - pbss_entry->pbeacon_buf);
+            HEXDUMP("InterpretIE: Resp HTINFO_IE",
+                    (t_u8 *) pbss_entry->pht_info,
+                    (*(pbss_entry->pht_info)).ieee_hdr.len +
+                    sizeof(IEEEtypes_Header_t));
+            break;
+        case BSSCO_2040:
+            pbss_entry->pbss_co_2040 = (IEEEtypes_2040BSSCo_t *) pcurrent_ptr;
+            pbss_entry->bss_co_2040_offset =
+                (t_u16) (pcurrent_ptr - pbss_entry->pbeacon_buf);
+            HEXDUMP("InterpretIE: Resp 2040BSSCOEXISTANCE_IE",
+                    (t_u8 *) pbss_entry->pbss_co_2040,
+                    (*(pbss_entry->pbss_co_2040)).ieee_hdr.len +
+                    sizeof(IEEEtypes_Header_t));
+            break;
+        case EXT_CAPABILITY:
+            pbss_entry->pext_cap = (IEEEtypes_ExtCap_t *) pcurrent_ptr;
+            pbss_entry->ext_cap_offset =
+                (t_u16) (pcurrent_ptr - pbss_entry->pbeacon_buf);
+            HEXDUMP("InterpretIE: Resp EXTCAP_IE",
+                    (t_u8 *) pbss_entry->pext_cap,
+                    (*(pbss_entry->pext_cap)).ieee_hdr.len +
+                    sizeof(IEEEtypes_Header_t));
+            break;
+        case OVERLAPBSSSCANPARAM:
+            pbss_entry->poverlap_bss_scan_param =
+                (IEEEtypes_OverlapBSSScanParam_t *) pcurrent_ptr;
+            pbss_entry->overlap_bss_offset =
+                (t_u16) (pcurrent_ptr - pbss_entry->pbeacon_buf);
+            HEXDUMP("InterpretIE: Resp HTCAP_IE",
+                    (t_u8 *) pbss_entry->poverlap_bss_scan_param,
+                    (*(pbss_entry->poverlap_bss_scan_param)).ieee_hdr.len +
+                    sizeof(IEEEtypes_Header_t));
+            break;
+        }
+
+        pcurrent_ptr += element_len + 2;
+
+        /* Need to account for IE ID and IE Len */
+        bytes_left_for_current_beacon -= (element_len + 2);
+
+    }                           /* while (bytes_left_for_current_beacon > 2) */
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Adjust ie's position in BSSDescriptor_t
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param pbss_entry   A pointer to BSSDescriptor_t structure
+ *
+ *  @return           N/A
+ */
+static t_void
+wlan_adjust_ie_in_bss_entry(IN mlan_private * pmpriv,
+                            IN BSSDescriptor_t * pbss_entry)
+{
+    ENTER();
+    if (pbss_entry->pbeacon_buf) {
+        if (pbss_entry->pwpa_ie) {
+            pbss_entry->pwpa_ie = (IEEEtypes_VendorSpecific_t *)
+                (pbss_entry->pbeacon_buf + pbss_entry->wpa_offset);
+        }
+        if (pbss_entry->prsn_ie) {
+            pbss_entry->prsn_ie = (IEEEtypes_Generic_t *)
+                (pbss_entry->pbeacon_buf + pbss_entry->rsn_offset);
+        }
+        if (pbss_entry->pwapi_ie) {
+            pbss_entry->pwapi_ie = (IEEEtypes_Generic_t *)
+                (pbss_entry->pbeacon_buf + pbss_entry->wapi_offset);
+        }
+        if (pbss_entry->pht_cap) {
+            pbss_entry->pht_cap = (IEEEtypes_HTCap_t *)
+                (pbss_entry->pbeacon_buf + pbss_entry->ht_cap_offset);
+        }
+        if (pbss_entry->pht_info) {
+            pbss_entry->pht_info = (IEEEtypes_HTInfo_t *)
+                (pbss_entry->pbeacon_buf + pbss_entry->ht_info_offset);
+        }
+        if (pbss_entry->pbss_co_2040) {
+            pbss_entry->pbss_co_2040 = (IEEEtypes_2040BSSCo_t *)
+                (pbss_entry->pbeacon_buf + pbss_entry->bss_co_2040_offset);
+        }
+        if (pbss_entry->pext_cap) {
+            pbss_entry->pext_cap = (IEEEtypes_ExtCap_t *)
+                (pbss_entry->pbeacon_buf + pbss_entry->ext_cap_offset);
+        }
+        if (pbss_entry->poverlap_bss_scan_param) {
+            pbss_entry->poverlap_bss_scan_param =
+                (IEEEtypes_OverlapBSSScanParam_t *)
+                (pbss_entry->pbeacon_buf + pbss_entry->overlap_bss_offset);
+        }
+    } else {
+        pbss_entry->pwpa_ie = MNULL;
+        pbss_entry->wpa_offset = 0;
+        pbss_entry->prsn_ie = MNULL;
+        pbss_entry->rsn_offset = 0;
+        pbss_entry->pwapi_ie = MNULL;
+        pbss_entry->wapi_offset = 0;
+        pbss_entry->pht_cap = MNULL;
+        pbss_entry->ht_cap_offset = 0;
+        pbss_entry->pht_info = MNULL;
+        pbss_entry->ht_info_offset = 0;
+        pbss_entry->pbss_co_2040 = MNULL;
+        pbss_entry->bss_co_2040_offset = 0;
+        pbss_entry->pext_cap = MNULL;
+        pbss_entry->ext_cap_offset = 0;
+        pbss_entry->poverlap_bss_scan_param = MNULL;
+        pbss_entry->overlap_bss_offset = 0;
+    }
+    LEAVE();
+    return;
+}
+
+/**
+ *  @brief Store a beacon or probe response for a BSS returned in the scan
+ *  
+ *  Store a new scan response or an update for a previous scan response.  New
+ *    entries need to verify that they do not exceed the total amount of 
+ *    memory allocated for the table.
+
+ *  Replacement entries need to take into consideration the amount of space 
+ *    currently allocated for the beacon/probe response and adjust the entry
+ *    as needed.  
+ *
+ *  A small amount of extra pad (SCAN_BEACON_ENTRY_PAD) is generally reserved
+ *    for an entry in case it is a beacon since a probe response for the
+ *    network will by larger per the standard.  This helps to reduce the 
+ *    amount of memory copying to fit a new probe response into an entry 
+ *    already occupied by a network's previously stored beacon.
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param beacon_idx   Index in the scan table to store this entry; may be
+ *                      replacing an older duplicate entry for this BSS
+ *  @param num_of_ent   Number of entries currently in the table
+ *  @param pnew_beacon  Pointer to the new beacon/probe response to save
+ *
+ *  @return           N/A
+ */
+static t_void
+wlan_ret_802_11_scan_store_beacon(IN mlan_private * pmpriv,
+                                  IN t_u32 beacon_idx,
+                                  IN t_u32 num_of_ent,
+                                  IN BSSDescriptor_t * pnew_beacon)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    t_u8 *pbcn_store;
+    t_u32 new_bcn_size;
+    t_u32 old_bcn_size;
+    t_u32 bcn_space;
+    t_u32 adj_idx;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    t_u8 *tmp_buf;
+    t_u16 bcn_size = 0;
+    t_u32 bcn_offset = 0;
+
+    ENTER();
+
+    if (pmadapter->pscan_table[beacon_idx].pbeacon_buf) {
+
+        new_bcn_size = pnew_beacon->beacon_buf_size;
+        old_bcn_size = pmadapter->pscan_table[beacon_idx].beacon_buf_size;
+        bcn_space = pmadapter->pscan_table[beacon_idx].beacon_buf_size_max;
+        pbcn_store = pmadapter->pscan_table[beacon_idx].pbeacon_buf;
+
+        /* Set the max to be the same as current entry unless changed below */
+        pnew_beacon->beacon_buf_size_max = bcn_space;
+
+        if (new_bcn_size == old_bcn_size) {
+            /* 
+             * Beacon is the same size as the previous entry.
+             *   Replace the previous contents with the scan result
+             */
+            memcpy(pmadapter, pbcn_store,
+                   pnew_beacon->pbeacon_buf, pnew_beacon->beacon_buf_size);
+
+        } else if (new_bcn_size <= bcn_space) {
+            /* 
+             * New beacon size will fit in the amount of space
+             *   we have previously allocated for it
+             */
+
+            /* Copy the new beacon buffer entry over the old one */
+            memcpy(pmadapter, pbcn_store, pnew_beacon->pbeacon_buf,
+                   new_bcn_size);
+
+            /* 
+             *  If the old beacon size was less than the maximum
+             *  we had allotted for the entry, and the new entry
+             *  is even smaller, reset the max size to the old beacon
+             *  entry and compress the storage space (leaving a new
+             *  pad space of (old_bcn_size - new_bcn_size).
+             */
+            if (old_bcn_size < bcn_space && new_bcn_size <= old_bcn_size) {
+                /* 
+                 * Old Beacon size is smaller than the allotted storage size.
+                 *   Shrink the allotted storage space.
+                 */
+                PRINTM(MINFO, "AppControl: Smaller Duplicate Beacon (%d), "
+                       "old = %d, new = %d, space = %d, left = %d\n",
+                       beacon_idx, old_bcn_size, new_bcn_size, bcn_space,
+                       (pmadapter->bcn_buf_size -
+                        (pmadapter->pbcn_buf_end - pmadapter->bcn_buf)));
+
+                /* 
+                 *  memmove (since the memory overlaps) the data
+                 *  after the beacon we just stored to the end of
+                 *  the current beacon.  This cleans up any unused
+                 *  space the old larger beacon was using in the buffer
+                 */
+                memmove(pmadapter,
+                        (void *) ((t_ptr) pbcn_store + (t_ptr) old_bcn_size),
+                        (void *) ((t_ptr) pbcn_store + (t_ptr) bcn_space),
+                        (t_u32) ((t_ptr) pmadapter->pbcn_buf_end -
+                                 ((t_ptr) pbcn_store + (t_ptr) bcn_space)));
+
+                /* 
+                 * Decrement the end pointer by the difference between
+                 *  the old larger size and the new smaller size since
+                 *  we are using less space due to the new beacon being
+                 *  smaller
+                 */
+                pmadapter->pbcn_buf_end -= (bcn_space - old_bcn_size);
+
+                /* Set the maximum storage size to the old beacon size */
+                pnew_beacon->beacon_buf_size_max = old_bcn_size;
+
+                /* Adjust beacon buffer pointers that are past the current */
+                for (adj_idx = 0; adj_idx < num_of_ent; adj_idx++) {
+                    if (pmadapter->pscan_table[adj_idx].pbeacon_buf >
+                        pbcn_store) {
+                        pmadapter->pscan_table[adj_idx].pbeacon_buf -=
+                            (bcn_space - old_bcn_size);
+                        wlan_adjust_ie_in_bss_entry(pmpriv,
+                                                    &pmadapter->
+                                                    pscan_table[adj_idx]);
+                    }
+                }
+            }
+        } else if (pmadapter->pbcn_buf_end + (new_bcn_size - bcn_space)
+                   < (pmadapter->bcn_buf + pmadapter->bcn_buf_size)) {
+            /* 
+             * Beacon is larger than space previously allocated (bcn_space)
+             *   and there is enough space left in the beaconBuffer to store
+             *   the additional data
+             */
+            PRINTM(MINFO, "AppControl: Larger Duplicate Beacon (%d), "
+                   "old = %d, new = %d, space = %d, left = %d\n",
+                   beacon_idx, old_bcn_size, new_bcn_size, bcn_space,
+                   (pmadapter->bcn_buf_size -
+                    (pmadapter->pbcn_buf_end - pmadapter->bcn_buf)));
+
+            /* 
+             * memmove (since the memory overlaps) the data
+             *  after the beacon we just stored to the end of
+             *  the current beacon.  This moves the data for
+             *  the beacons after this further in memory to
+             *  make space for the new larger beacon we are
+             *  about to copy in.
+             */
+            memmove(pmadapter,
+                    (void *) ((t_ptr) pbcn_store + (t_ptr) new_bcn_size),
+                    (void *) ((t_ptr) pbcn_store + (t_ptr) bcn_space),
+                    (t_u32) ((t_ptr) pmadapter->pbcn_buf_end -
+                             ((t_ptr) pbcn_store + (t_ptr) bcn_space)));
+
+            /* Copy the new beacon buffer entry over the old one */
+            memcpy(pmadapter, pbcn_store, pnew_beacon->pbeacon_buf,
+                   new_bcn_size);
+
+            /* Move the beacon end pointer by the amount of new beacon data we
+               are adding */
+            pmadapter->pbcn_buf_end += (new_bcn_size - bcn_space);
+
+            /* 
+             * This entry is bigger than the allotted max space
+             *  previously reserved.  Increase the max space to
+             *  be equal to the new beacon size
+             */
+            pnew_beacon->beacon_buf_size_max = new_bcn_size;
+
+            /* Adjust beacon buffer pointers that are past the current */
+            for (adj_idx = 0; adj_idx < num_of_ent; adj_idx++) {
+                if (pmadapter->pscan_table[adj_idx].pbeacon_buf > pbcn_store) {
+                    pmadapter->pscan_table[adj_idx].pbeacon_buf
+                        += (new_bcn_size - bcn_space);
+                    wlan_adjust_ie_in_bss_entry(pmpriv,
+                                                &pmadapter->
+                                                pscan_table[adj_idx]);
+                }
+            }
+        } else {
+            /* 
+             * Beacon is larger than the previously allocated space, but
+             *   there is not enough free space to store the additional data
+             */
+            PRINTM(MERROR,
+                   "AppControl: Failed: Larger Duplicate Beacon (%d),"
+                   " old = %d, new = %d, space = %d, left = %d\n",
+                   beacon_idx, old_bcn_size, new_bcn_size, bcn_space,
+                   (pmadapter->bcn_buf_size -
+                    (pmadapter->pbcn_buf_end - pmadapter->bcn_buf)));
+
+            /* Storage failure, keep old beacon intact */
+            pnew_beacon->beacon_buf_size = old_bcn_size;
+            if (pnew_beacon->pwpa_ie)
+                pnew_beacon->wpa_offset =
+                    pmadapter->pscan_table[beacon_idx].wpa_offset;
+            if (pnew_beacon->prsn_ie)
+                pnew_beacon->rsn_offset =
+                    pmadapter->pscan_table[beacon_idx].rsn_offset;
+            if (pnew_beacon->pwapi_ie)
+                pnew_beacon->wapi_offset =
+                    pmadapter->pscan_table[beacon_idx].wapi_offset;
+            if (pnew_beacon->pht_cap)
+                pnew_beacon->ht_cap_offset =
+                    pmadapter->pscan_table[beacon_idx].ht_cap_offset;
+            if (pnew_beacon->pht_info)
+                pnew_beacon->ht_info_offset =
+                    pmadapter->pscan_table[beacon_idx].ht_info_offset;
+            if (pnew_beacon->pbss_co_2040)
+                pnew_beacon->bss_co_2040_offset =
+                    pmadapter->pscan_table[beacon_idx].bss_co_2040_offset;
+            if (pnew_beacon->pext_cap)
+                pnew_beacon->ext_cap_offset =
+                    pmadapter->pscan_table[beacon_idx].ext_cap_offset;
+            if (pnew_beacon->poverlap_bss_scan_param)
+                pnew_beacon->overlap_bss_offset =
+                    pmadapter->pscan_table[beacon_idx].overlap_bss_offset;
+        }
+        /* Point the new entry to its permanent storage space */
+        pnew_beacon->pbeacon_buf = pbcn_store;
+        wlan_adjust_ie_in_bss_entry(pmpriv, pnew_beacon);
+    } else {
+        if ((pmadapter->pbcn_buf_end + pnew_beacon->beacon_buf_size +
+             SCAN_BEACON_ENTRY_PAD > (pmadapter->bcn_buf +
+                                      pmadapter->bcn_buf_size)) &&
+            (pmadapter->bcn_buf_size < MAX_SCAN_BEACON_BUFFER)) {
+            /* no space for this entry, realloc bcn buffer */
+            ret = pmadapter->callbacks.moal_malloc(pmadapter->pmoal_handle,
+                                                   pmadapter->bcn_buf_size +
+                                                   DEFAULT_SCAN_BEACON_BUFFER,
+                                                   MLAN_MEM_DEF,
+                                                   (t_u8 **) & tmp_buf);
+            if ((ret == MLAN_STATUS_SUCCESS) && (tmp_buf)) {
+                PRINTM(MCMND,
+                       "Realloc Beacon buffer, old size=%d, new_size=%d\n",
+                       pmadapter->bcn_buf_size,
+                       pmadapter->bcn_buf_size + DEFAULT_SCAN_BEACON_BUFFER);
+                bcn_size = pmadapter->pbcn_buf_end - pmadapter->bcn_buf;
+                memcpy(pmadapter, tmp_buf, pmadapter->bcn_buf, bcn_size);
+                /* Adjust beacon buffer pointers that are past the current */
+                for (adj_idx = 0; adj_idx < num_of_ent; adj_idx++) {
+                    bcn_offset =
+                        pmadapter->pscan_table[adj_idx].pbeacon_buf -
+                        pmadapter->bcn_buf;
+                    pmadapter->pscan_table[adj_idx].pbeacon_buf =
+                        tmp_buf + bcn_offset;
+                    wlan_adjust_ie_in_bss_entry(pmpriv,
+                                                &pmadapter->
+                                                pscan_table[adj_idx]);
+                }
+                pmadapter->pbcn_buf_end = tmp_buf + bcn_size;
+                pmadapter->callbacks.moal_mfree(pmadapter->pmoal_handle,
+                                                (t_u8 *) pmadapter->bcn_buf);
+                pmadapter->bcn_buf = tmp_buf;
+                pmadapter->bcn_buf_size += DEFAULT_SCAN_BEACON_BUFFER;
+            }
+        }
+        /* 
+         * No existing beacon data exists for this entry, check to see
+         *   if we can fit it in the remaining space
+         */
+        if (pmadapter->pbcn_buf_end + pnew_beacon->beacon_buf_size +
+            SCAN_BEACON_ENTRY_PAD < (pmadapter->bcn_buf +
+                                     pmadapter->bcn_buf_size)) {
+
+            /* 
+             * Copy the beacon buffer data from the local entry to the
+             *   adapter dev struct buffer space used to store the raw
+             *   beacon data for each entry in the scan table
+             */
+            memcpy(pmadapter, pmadapter->pbcn_buf_end, pnew_beacon->pbeacon_buf,
+                   pnew_beacon->beacon_buf_size);
+
+            /* Update the beacon ptr to point to the table save area */
+            pnew_beacon->pbeacon_buf = pmadapter->pbcn_buf_end;
+            pnew_beacon->beacon_buf_size_max = (pnew_beacon->beacon_buf_size
+                                                + SCAN_BEACON_ENTRY_PAD);
+            wlan_adjust_ie_in_bss_entry(pmpriv, pnew_beacon);
+
+            /* Increment the end pointer by the size reserved */
+            pmadapter->pbcn_buf_end += pnew_beacon->beacon_buf_size_max;
+
+            PRINTM(MINFO, "AppControl: Beacon[%02d] sz=%03d,"
+                   " used = %04d, left = %04d\n",
+                   beacon_idx,
+                   pnew_beacon->beacon_buf_size,
+                   (pmadapter->pbcn_buf_end - pmadapter->bcn_buf),
+                   (pmadapter->bcn_buf_size -
+                    (pmadapter->pbcn_buf_end - pmadapter->bcn_buf)));
+        } else {
+            /* 
+             * No space for new beacon
+             */
+            PRINTM(MCMND, "AppControl: No space beacon (%d): "
+                   "%02x:%02x:%02x:%02x:%02x:%02x; sz=%03d, left=%03d\n",
+                   beacon_idx,
+                   pnew_beacon->mac_address[0], pnew_beacon->mac_address[1],
+                   pnew_beacon->mac_address[2], pnew_beacon->mac_address[3],
+                   pnew_beacon->mac_address[4], pnew_beacon->mac_address[5],
+                   pnew_beacon->beacon_buf_size,
+                   (pmadapter->bcn_buf_size -
+                    (pmadapter->pbcn_buf_end - pmadapter->bcn_buf)));
+
+            /* Storage failure; clear storage records for this bcn */
+            pnew_beacon->pbeacon_buf = MNULL;
+            pnew_beacon->beacon_buf_size = 0;
+            pnew_beacon->beacon_buf_size_max = 0;
+            wlan_adjust_ie_in_bss_entry(pmpriv, pnew_beacon);
+        }
+    }
+
+    LEAVE();
+}
+
+/**
+ *  @brief Restore a beacon buffer of the current bss descriptor
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *
+ *  @return             N/A
+ */
+static t_void
+wlan_restore_curr_bcn(IN mlan_private * pmpriv)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    mlan_callbacks *pcb = (pmlan_callbacks) & pmadapter->callbacks;
+    BSSDescriptor_t *pcurr_bss = &pmpriv->curr_bss_params.bss_descriptor;
+
+    if (pmpriv->pcurr_bcn_buf &&
+        ((pmadapter->pbcn_buf_end + pmpriv->curr_bcn_size) <
+         (pmadapter->bcn_buf + pmadapter->bcn_buf_size))) {
+
+        pcb->moal_spin_lock(pmadapter->pmoal_handle, pmpriv->curr_bcn_buf_lock);
+
+        /* restore the current beacon buffer */
+        memcpy(pmadapter, pmadapter->pbcn_buf_end, pmpriv->pcurr_bcn_buf,
+               pmpriv->curr_bcn_size);
+        pcurr_bss->pbeacon_buf = pmadapter->pbcn_buf_end;
+        pcurr_bss->beacon_buf_size = pmpriv->curr_bcn_size;
+        pmadapter->pbcn_buf_end += pmpriv->curr_bcn_size;
+
+        /* adjust the pointers in the current bss descriptor */
+        if (pcurr_bss->pwpa_ie) {
+            pcurr_bss->pwpa_ie = (IEEEtypes_VendorSpecific_t *)
+                (pcurr_bss->pbeacon_buf + pcurr_bss->wpa_offset);
+        }
+        if (pcurr_bss->prsn_ie) {
+            pcurr_bss->prsn_ie = (IEEEtypes_Generic_t *)
+                (pcurr_bss->pbeacon_buf + pcurr_bss->rsn_offset);
+        }
+        if (pcurr_bss->pht_cap) {
+            pcurr_bss->pht_cap = (IEEEtypes_HTCap_t *)
+                (pcurr_bss->pbeacon_buf + pcurr_bss->ht_cap_offset);
+        }
+
+        if (pcurr_bss->pht_info) {
+            pcurr_bss->pht_info = (IEEEtypes_HTInfo_t *)
+                (pcurr_bss->pbeacon_buf + pcurr_bss->ht_info_offset);
+        }
+
+        if (pcurr_bss->pbss_co_2040) {
+            pcurr_bss->pbss_co_2040 = (IEEEtypes_2040BSSCo_t *)
+                (pcurr_bss->pbeacon_buf + pcurr_bss->bss_co_2040_offset);
+        }
+
+        if (pcurr_bss->pext_cap) {
+            pcurr_bss->pext_cap = (IEEEtypes_ExtCap_t *)
+                (pcurr_bss->pbeacon_buf + pcurr_bss->ext_cap_offset);
+        }
+
+        if (pcurr_bss->poverlap_bss_scan_param) {
+            pcurr_bss->poverlap_bss_scan_param =
+                (IEEEtypes_OverlapBSSScanParam_t *)
+                (pcurr_bss->pbeacon_buf + pcurr_bss->overlap_bss_offset);
+        }
+
+        pcb->moal_spin_unlock(pmadapter->pmoal_handle,
+                              pmpriv->curr_bcn_buf_lock);
+
+        PRINTM(MINFO, "current beacon restored %d\n", pmpriv->curr_bcn_size);
+    } else {
+        PRINTM(MWARN, "curr_bcn_buf not saved or bcn_buf has no space\n");
+    }
+}
+
+/**
+ *  @brief Post process the scan table after a new scan command has completed
+ *
+ *  Inspect each entry of the scan table and try to find an entry that
+ *    matches our current associated/joined network from the scan.  If
+ *    one is found, update the stored copy of the BSSDescriptor for our
+ *    current network.
+ *
+ *  Debug dump the current scan table contents if compiled accordingly.
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *
+ *  @return             N/A
+ */
+static t_void
+wlan_scan_process_results(IN mlan_private * pmpriv)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    t_s32 j;
+    t_u32 i;
+
+    ENTER();
+
+    if (pmpriv->media_connected == MTRUE) {
+
+        j = wlan_find_ssid_in_list(pmpriv,
+                                   &pmpriv->curr_bss_params.bss_descriptor.ssid,
+                                   pmpriv->curr_bss_params.bss_descriptor.
+                                   mac_address, pmpriv->bss_mode);
+
+        if (j >= 0) {
+            pmadapter->callbacks.moal_spin_lock(pmadapter->pmoal_handle,
+                                                pmpriv->curr_bcn_buf_lock);
+            pmpriv->curr_bss_params.bss_descriptor.pwpa_ie = MNULL;
+            pmpriv->curr_bss_params.bss_descriptor.wpa_offset = 0;
+            pmpriv->curr_bss_params.bss_descriptor.prsn_ie = MNULL;
+            pmpriv->curr_bss_params.bss_descriptor.rsn_offset = 0;
+            pmpriv->curr_bss_params.bss_descriptor.pwapi_ie = MNULL;
+            pmpriv->curr_bss_params.bss_descriptor.wapi_offset = 0;
+            pmpriv->curr_bss_params.bss_descriptor.pht_cap = MNULL;
+            pmpriv->curr_bss_params.bss_descriptor.ht_cap_offset = 0;
+            pmpriv->curr_bss_params.bss_descriptor.pht_info = MNULL;
+            pmpriv->curr_bss_params.bss_descriptor.ht_info_offset = 0;
+            pmpriv->curr_bss_params.bss_descriptor.pbss_co_2040 = MNULL;
+            pmpriv->curr_bss_params.bss_descriptor.bss_co_2040_offset = 0;
+            pmpriv->curr_bss_params.bss_descriptor.pext_cap = MNULL;
+            pmpriv->curr_bss_params.bss_descriptor.ext_cap_offset = 0;
+            pmpriv->curr_bss_params.bss_descriptor.poverlap_bss_scan_param =
+                MNULL;
+            pmpriv->curr_bss_params.bss_descriptor.overlap_bss_offset = 0;
+            pmpriv->curr_bss_params.bss_descriptor.pbeacon_buf = MNULL;
+            pmpriv->curr_bss_params.bss_descriptor.beacon_buf_size = 0;
+            pmpriv->curr_bss_params.bss_descriptor.beacon_buf_size_max = 0;
+
+            PRINTM(MINFO, "Found current ssid/bssid in list @ index #%d\n", j);
+            /* Make a copy of current BSSID descriptor */
+            memcpy(pmadapter, &pmpriv->curr_bss_params.bss_descriptor,
+                   &pmadapter->pscan_table[j],
+                   sizeof(pmpriv->curr_bss_params.bss_descriptor));
+
+            wlan_save_curr_bcn(pmpriv);
+            pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                                  pmpriv->curr_bcn_buf_lock);
+        } else {
+            wlan_restore_curr_bcn(pmpriv);
+        }
+    }
+
+    for (i = 0; i < pmadapter->num_in_scan_table; i++)
+        PRINTM(MINFO, "Scan:(%02d) %02x:%02x:%02x:%02x:%02x:%02x, "
+               "RSSI[%03d], SSID[%s]\n",
+               i,
+               pmadapter->pscan_table[i].mac_address[0],
+               pmadapter->pscan_table[i].mac_address[1],
+               pmadapter->pscan_table[i].mac_address[2],
+               pmadapter->pscan_table[i].mac_address[3],
+               pmadapter->pscan_table[i].mac_address[4],
+               pmadapter->pscan_table[i].mac_address[5],
+               (t_s32) pmadapter->pscan_table[i].rssi,
+               pmadapter->pscan_table[i].ssid.ssid);
+
+    /* 
+     * Prepares domain info from scan table and downloads the 
+     *   domain info command to the FW.
+     */
+    wlan_11d_prepare_dnld_domain_info_cmd(pmpriv);
+
+    LEAVE();
+}
+
+/**
+ *  @brief Convert radio type scan parameter to a band config used in join cmd
+ *
+ *  @param radio_type Scan parameter indicating the radio used for a channel
+ *                    in a scan command.
+ *
+ *  @return          Band type conversion of scanBand used in join/assoc cmds
+ *
+ */
+static t_u8
+radio_type_to_band(t_u8 radio_type)
+{
+    t_u8 ret_band;
+
+    switch (radio_type) {
+    case HostCmd_SCAN_RADIO_TYPE_A:
+        ret_band = BAND_A;
+        break;
+    case HostCmd_SCAN_RADIO_TYPE_BG:
+    default:
+        ret_band = BAND_G;
+        break;
+    }
+
+    return ret_band;
+}
+
+/**
+ *  @brief compare config band and a band from the scan result, 
+ *  which is defined by functiion radio_type_to_band(t_u8 radio_type) above
+ *
+ *  @param cfg_band:  band configured
+ *         scan_band: band from scan result
+ *
+ *  @return  matched: non-zero. unmatched: 0 
+ *
+ */
+static t_u8
+wlan_is_band_compatible(t_u8 cfg_band, t_u8 scan_band)
+{
+    t_u8 band;
+    switch (scan_band) {
+    case BAND_A:
+        band = BAND_A | BAND_AN;
+        break;
+    case BAND_G:
+    default:
+        band = BAND_B | BAND_G | BAND_GN;
+    }
+    return cfg_band & band;
+}
+
+/**
+ *  @brief Delete a specific indexed entry from the scan table.
+ *
+ *  Delete the scan table entry indexed by table_idx.  Compact the remaining
+ *    entries and adjust any buffering of beacon/probe response data
+ *    if needed.
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param table_idx    Scan table entry index to delete from the table
+ *
+ *  @return             N/A
+ *
+ *  @pre                table_idx must be an index to a valid entry
+ */
+static t_void
+wlan_scan_delete_table_entry(IN mlan_private * pmpriv, IN t_s32 table_idx)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    t_u32 del_idx;
+    t_u32 beacon_buf_adj;
+    t_u8 *pbeacon_buf;
+
+    ENTER();
+
+    /* 
+     * Shift the saved beacon buffer data for the scan table back over the
+     *   entry being removed.  Update the end of buffer pointer.  Save the 
+     *   deleted buffer allocation size for pointer adjustments for entries
+     *   compacted after the deleted index.
+     */
+    beacon_buf_adj = pmadapter->pscan_table[table_idx].beacon_buf_size_max;
+
+    PRINTM(MINFO, "Scan: Delete Entry %d, beacon buffer removal = %d bytes\n",
+           table_idx, beacon_buf_adj);
+
+    /* Check if the table entry had storage allocated for its beacon */
+    if (beacon_buf_adj) {
+        pbeacon_buf = pmadapter->pscan_table[table_idx].pbeacon_buf;
+
+        /* 
+         * Remove the entry's buffer space, decrement the table end pointer
+         *   by the amount we are removing 
+         */
+        pmadapter->pbcn_buf_end -= beacon_buf_adj;
+
+        PRINTM(MINFO,
+               "Scan: Delete Entry %d, compact data: %p <- %p (sz = %d)\n",
+               table_idx,
+               pbeacon_buf,
+               pbeacon_buf + beacon_buf_adj,
+               pmadapter->pbcn_buf_end - pbeacon_buf);
+
+        /* 
+         * Compact data storage.  Copy all data after the deleted entry's
+         *   end address (pbeacon_buf + beacon_buf_adj) back to the original
+         *   start address (pbeacon_buf).
+         *
+         * Scan table entries affected by the move will have their entry
+         *   pointer adjusted below.
+         *
+         * Use memmove since the dest/src memory regions overlap.
+         */
+        memmove(pmadapter, pbeacon_buf,
+                (void *) ((t_ptr) pbeacon_buf + (t_ptr) beacon_buf_adj),
+                (t_u32) ((t_ptr) pmadapter->pbcn_buf_end -
+                         (t_ptr) pbeacon_buf));
+    }
+
+    PRINTM(MINFO, "Scan: Delete Entry %d, num_in_scan_table = %d\n",
+           table_idx, pmadapter->num_in_scan_table);
+
+    /* Shift all of the entries after the table_idx back by one, compacting the 
+       table and removing the requested entry */
+    for (del_idx = table_idx; (del_idx + 1) < pmadapter->num_in_scan_table;
+         del_idx++) {
+        /* Copy the next entry over this one */
+        memcpy(pmadapter, pmadapter->pscan_table + del_idx,
+               pmadapter->pscan_table + del_idx + 1, sizeof(BSSDescriptor_t));
+
+        /* 
+         * Adjust this entry's pointer to its beacon buffer based on the 
+         *   removed/compacted entry from the deleted index.  Don't decrement
+         *   if the buffer pointer is MNULL (no data stored for this entry).
+         */
+        if (pmadapter->pscan_table[del_idx].pbeacon_buf) {
+            pmadapter->pscan_table[del_idx].pbeacon_buf -= beacon_buf_adj;
+            if (pmadapter->pscan_table[del_idx].pwpa_ie) {
+                pmadapter->pscan_table[del_idx].pwpa_ie =
+                    (IEEEtypes_VendorSpecific_t *)
+                    (pmadapter->pscan_table[del_idx].pbeacon_buf +
+                     pmadapter->pscan_table[del_idx].wpa_offset);
+            }
+            if (pmadapter->pscan_table[del_idx].prsn_ie) {
+                pmadapter->pscan_table[del_idx].prsn_ie =
+                    (IEEEtypes_Generic_t *)
+                    (pmadapter->pscan_table[del_idx].pbeacon_buf +
+                     pmadapter->pscan_table[del_idx].rsn_offset);
+            }
+            if (pmadapter->pscan_table[del_idx].pwapi_ie) {
+                pmadapter->pscan_table[del_idx].pwapi_ie =
+                    (IEEEtypes_Generic_t *)
+                    (pmadapter->pscan_table[del_idx].pbeacon_buf +
+                     pmadapter->pscan_table[del_idx].wapi_offset);
+            }
+            if (pmadapter->pscan_table[del_idx].pht_cap) {
+                pmadapter->pscan_table[del_idx].pht_cap =
+                    (IEEEtypes_HTCap_t *) (pmadapter->pscan_table[del_idx].
+                                           pbeacon_buf +
+                                           pmadapter->pscan_table[del_idx].
+                                           ht_cap_offset);
+            }
+
+            if (pmadapter->pscan_table[del_idx].pht_info) {
+                pmadapter->pscan_table[del_idx].pht_info =
+                    (IEEEtypes_HTInfo_t *) (pmadapter->pscan_table[del_idx].
+                                            pbeacon_buf +
+                                            pmadapter->pscan_table[del_idx].
+                                            ht_info_offset);
+            }
+            if (pmadapter->pscan_table[del_idx].pbss_co_2040) {
+                pmadapter->pscan_table[del_idx].pbss_co_2040 =
+                    (IEEEtypes_2040BSSCo_t *) (pmadapter->pscan_table[del_idx].
+                                               pbeacon_buf +
+                                               pmadapter->pscan_table[del_idx].
+                                               bss_co_2040_offset);
+            }
+            if (pmadapter->pscan_table[del_idx].pext_cap) {
+                pmadapter->pscan_table[del_idx].pext_cap =
+                    (IEEEtypes_ExtCap_t *) (pmadapter->pscan_table[del_idx].
+                                            pbeacon_buf +
+                                            pmadapter->pscan_table[del_idx].
+                                            ext_cap_offset);
+            }
+            if (pmadapter->pscan_table[del_idx].poverlap_bss_scan_param) {
+                pmadapter->pscan_table[del_idx].poverlap_bss_scan_param =
+                    (IEEEtypes_OverlapBSSScanParam_t *) (pmadapter->
+                                                         pscan_table[del_idx].
+                                                         pbeacon_buf +
+                                                         pmadapter->
+                                                         pscan_table[del_idx].
+                                                         overlap_bss_offset);
+            }
+
+        }
+    }
+
+    /* The last entry is invalid now that it has been deleted or moved back */
+    memset(pmadapter, pmadapter->pscan_table + pmadapter->num_in_scan_table - 1,
+           0x00, sizeof(BSSDescriptor_t));
+
+    pmadapter->num_in_scan_table--;
+
+    LEAVE();
+}
+
+/**
+ *  @brief Delete all occurrences of a given SSID from the scan table
+ *
+ *  Iterate through the scan table and delete all entries that match a given
+ *    SSID.  Compact the remaining scan table entries.
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param pdel_ssid    Pointer to an SSID to be used in deleting all
+ *                        matching SSIDs from the scan table
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_scan_delete_ssid_table_entry(IN mlan_private * pmpriv,
+                                  IN mlan_802_11_ssid * pdel_ssid)
+{
+    mlan_status ret = MLAN_STATUS_FAILURE;
+    t_s32 table_idx;
+
+    ENTER();
+
+    PRINTM(MINFO, "Scan: Delete Ssid Entry: %-32s\n", pdel_ssid->ssid);
+
+    /* If the requested SSID is found in the table, delete it.  Then keep
+       searching the table for multiple entries for the SSID until no more are
+       found */
+    while ((table_idx = wlan_find_ssid_in_list(pmpriv,
+                                               pdel_ssid,
+                                               MNULL,
+                                               MLAN_BSS_MODE_AUTO)) >= 0) {
+        PRINTM(MINFO, "Scan: Delete SSID Entry: Found Idx = %d\n", table_idx);
+        ret = MLAN_STATUS_SUCCESS;
+        wlan_scan_delete_table_entry(pmpriv, table_idx);
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/********************************************************
+                Global Functions
+********************************************************/
+
+/**
+ *  @brief Check if a scanned network compatible with the driver settings
+ *
+ *   WEP     WPA     WPA2    ad-hoc  encrypt                      Network
+ * enabled enabled  enabled   AES     mode   Privacy  WPA  WPA2  Compatible
+ *    0       0        0       0      NONE      0      0    0   yes No security
+ *    0       1        0       0       x        1x     1    x   yes WPA (disable HT if no AES)
+ *    0       0        1       0       x        1x     x    1   yes WPA2 (disable HT if no AES)
+ *    0       0        0       1      NONE      1      0    0   yes Ad-hoc AES
+ *    1       0        0       0      NONE      1      0    0   yes Static WEP (disable HT)
+ *    0       0        0       0     !=NONE     1      0    0   yes Dynamic WEP
+ *
+ *  @param pmpriv  A pointer to mlan_private
+ *  @param index   Index in scan table to check against current driver settings
+ *  @param mode    Network mode: Infrastructure or IBSS
+ *
+ *  @return        Index in ScanTable, or negative value if error 
+ */
+t_s32
+wlan_is_network_compatible(IN mlan_private * pmpriv,
+                           IN t_u32 index, IN t_u32 mode)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    BSSDescriptor_t *pbss_desc;
+
+    ENTER();
+
+    pbss_desc = &pmadapter->pscan_table[index];
+    pbss_desc->disable_11n = MFALSE;
+
+    /* Don't check for compatibility if roaming */
+    if ((pmpriv->media_connected == MTRUE)
+        && (pmpriv->bss_mode == MLAN_BSS_MODE_INFRA)
+        && (pbss_desc->bss_mode == MLAN_BSS_MODE_INFRA)) {
+        LEAVE();
+        return index;
+    }
+
+    if (pbss_desc->wlan_11h_bss_info.chan_switch_ann.element_id ==
+        CHANNEL_SWITCH_ANN) {
+        PRINTM(MINFO, "Don't connect to AP with CHANNEL_SWITCH_ANN IE.\n");
+        LEAVE();
+        return -1;
+    }
+
+    if (pmpriv->wps.session_enable == MTRUE) {
+        PRINTM(MINFO, "Return success directly in WPS period\n");
+        LEAVE();
+        return index;
+    }
+
+    if ((pbss_desc->bss_mode == mode) &&
+        (pmpriv->sec_info.ewpa_enabled == MTRUE)) {
+        if (((pbss_desc->pwpa_ie) &&
+             ((*(pbss_desc->pwpa_ie)).vend_hdr.element_id == WPA_IE)) ||
+            ((pbss_desc->prsn_ie) &&
+             ((*(pbss_desc->prsn_ie)).ieee_hdr.element_id == RSN_IE))) {
+            if (((pmpriv->adapter->config_bands & BAND_GN ||
+                  pmpriv->adapter->config_bands & BAND_AN) &&
+                 pbss_desc->pht_cap)
+                && (pmpriv->bss_mode == MLAN_BSS_MODE_INFRA)
+                && !is_wpa_oui_present(pmpriv->adapter, pbss_desc,
+                                       CIPHER_SUITE_CCMP)
+                && !is_rsn_oui_present(pmpriv->adapter, pbss_desc,
+                                       CIPHER_SUITE_CCMP)) {
+
+                if (is_wpa_oui_present
+                    (pmpriv->adapter, pbss_desc, CIPHER_SUITE_TKIP)
+                    || is_rsn_oui_present(pmpriv->adapter, pbss_desc,
+                                          CIPHER_SUITE_TKIP)) {
+                    PRINTM(MINFO,
+                           "Disable 11n if AES is not supported by AP\n");
+                    pbss_desc->disable_11n = MTRUE;
+                } else {
+                    LEAVE();
+                    return -1;
+                }
+            }
+            LEAVE();
+            return index;
+        } else {
+            PRINTM(MINFO, "ewpa_enabled: Ignore none WPA/WPA2 AP\n");
+            LEAVE();
+            return -1;
+        }
+    }
+
+    if (pmpriv->sec_info.wapi_enabled &&
+        (pbss_desc->pwapi_ie &&
+         ((*(pbss_desc->pwapi_ie)).ieee_hdr.element_id == WAPI_IE))) {
+        PRINTM(MINFO, "Return success for WAPI AP\n");
+        LEAVE();
+        return index;
+    }
+
+    if (pbss_desc->bss_mode == mode) {
+        if (pmpriv->sec_info.wep_status == Wlan802_11WEPDisabled
+            && !pmpriv->sec_info.wpa_enabled
+            && !pmpriv->sec_info.wpa2_enabled
+            && ((!pbss_desc->pwpa_ie) ||
+                ((*(pbss_desc->pwpa_ie)).vend_hdr.element_id != WPA_IE))
+            && ((!pbss_desc->prsn_ie) ||
+                ((*(pbss_desc->prsn_ie)).ieee_hdr.element_id != RSN_IE))
+            && !pmpriv->adhoc_aes_enabled &&
+            pmpriv->sec_info.encryption_mode == MLAN_ENCRYPTION_MODE_NONE &&
+            !pbss_desc->privacy) {
+            /* No security */
+            LEAVE();
+            return index;
+        } else if (pmpriv->sec_info.wep_status == Wlan802_11WEPEnabled
+                   && !pmpriv->sec_info.wpa_enabled
+                   && !pmpriv->sec_info.wpa2_enabled
+                   && !pmpriv->adhoc_aes_enabled && pbss_desc->privacy) {
+            /* Static WEP enabled */
+            PRINTM(MINFO, "Disable 11n in WEP mode\n");
+            pbss_desc->disable_11n = MTRUE;
+            LEAVE();
+            return index;
+        } else if (pmpriv->sec_info.wep_status == Wlan802_11WEPDisabled
+                   && pmpriv->sec_info.wpa_enabled
+                   && !pmpriv->sec_info.wpa2_enabled
+                   && ((pbss_desc->pwpa_ie) &&
+                       ((*(pbss_desc->pwpa_ie)).vend_hdr.element_id == WPA_IE))
+                   && !pmpriv->adhoc_aes_enabled
+                   /* 
+                    * Privacy bit may NOT be set in some APs like LinkSys WRT54G
+                    * && pbss_desc->privacy
+                    */
+            ) {
+            /* WPA enabled */
+            PRINTM(MINFO,
+                   "wlan_is_network_compatible() WPA: index=%d wpa_ie=%#x "
+                   "rsn_ie=%#x WEP=%s WPA=%s WPA2=%s EncMode=%#x "
+                   "privacy=%#x\n", index,
+                   (pbss_desc->pwpa_ie) ? (*(pbss_desc->pwpa_ie)).vend_hdr.
+                   element_id : 0,
+                   (pbss_desc->prsn_ie) ? (*(pbss_desc->prsn_ie)).ieee_hdr.
+                   element_id : 0,
+                   (pmpriv->sec_info.wep_status ==
+                    Wlan802_11WEPEnabled) ? "e" : "d",
+                   (pmpriv->sec_info.wpa_enabled) ? "e" : "d",
+                   (pmpriv->sec_info.wpa2_enabled) ? "e" : "d",
+                   pmpriv->sec_info.encryption_mode, pbss_desc->privacy);
+            if (((pmpriv->adapter->config_bands & BAND_GN ||
+                  pmpriv->adapter->config_bands & BAND_AN) &&
+                 pbss_desc->pht_cap)
+                && (pmpriv->bss_mode == MLAN_BSS_MODE_INFRA)
+                && !is_wpa_oui_present(pmpriv->adapter, pbss_desc,
+                                       CIPHER_SUITE_CCMP)) {
+                if (is_wpa_oui_present
+                    (pmpriv->adapter, pbss_desc, CIPHER_SUITE_TKIP)) {
+                    PRINTM(MINFO,
+                           "Disable 11n if AES is not supported by AP\n");
+                    pbss_desc->disable_11n = MTRUE;
+                } else {
+                    LEAVE();
+                    return -1;
+                }
+            }
+            LEAVE();
+            return index;
+        } else if (pmpriv->sec_info.wep_status == Wlan802_11WEPDisabled
+                   && !pmpriv->sec_info.wpa_enabled
+                   && pmpriv->sec_info.wpa2_enabled
+                   && ((pbss_desc->prsn_ie) &&
+                       ((*(pbss_desc->prsn_ie)).ieee_hdr.element_id == RSN_IE))
+                   && !pmpriv->adhoc_aes_enabled
+                   /* 
+                    * Privacy bit may NOT be set in some APs like LinkSys WRT54G
+                    * && pbss_desc->privacy
+                    */
+            ) {
+            /* WPA2 enabled */
+            PRINTM(MINFO,
+                   "wlan_is_network_compatible() WPA2: index=%d wpa_ie=%#x "
+                   "rsn_ie=%#x WEP=%s WPA=%s WPA2=%s EncMode=%#x "
+                   "privacy=%#x\n", index,
+                   (pbss_desc->pwpa_ie) ? (*(pbss_desc->pwpa_ie)).vend_hdr.
+                   element_id : 0,
+                   (pbss_desc->prsn_ie) ? (*(pbss_desc->prsn_ie)).ieee_hdr.
+                   element_id : 0,
+                   (pmpriv->sec_info.wep_status ==
+                    Wlan802_11WEPEnabled) ? "e" : "d",
+                   (pmpriv->sec_info.wpa_enabled) ? "e" : "d",
+                   (pmpriv->sec_info.wpa2_enabled) ? "e" : "d",
+                   pmpriv->sec_info.encryption_mode, pbss_desc->privacy);
+            if (((pmpriv->adapter->config_bands & BAND_GN ||
+                  pmpriv->adapter->config_bands & BAND_AN) &&
+                 pbss_desc->pht_cap)
+                && (pmpriv->bss_mode == MLAN_BSS_MODE_INFRA)
+                && !is_rsn_oui_present(pmpriv->adapter, pbss_desc,
+                                       CIPHER_SUITE_CCMP)) {
+                if (is_rsn_oui_present
+                    (pmpriv->adapter, pbss_desc, CIPHER_SUITE_TKIP)) {
+                    PRINTM(MINFO,
+                           "Disable 11n if AES is not supported by AP\n");
+                    pbss_desc->disable_11n = MTRUE;
+                } else {
+                    LEAVE();
+                    return -1;
+                }
+            }
+            LEAVE();
+            return index;
+        } else if (pmpriv->sec_info.wep_status == Wlan802_11WEPDisabled
+                   && !pmpriv->sec_info.wpa_enabled
+                   && !pmpriv->sec_info.wpa2_enabled
+                   && ((!pbss_desc->pwpa_ie) ||
+                       ((*(pbss_desc->pwpa_ie)).vend_hdr.element_id != WPA_IE))
+                   && ((!pbss_desc->prsn_ie) ||
+                       ((*(pbss_desc->prsn_ie)).ieee_hdr.element_id != RSN_IE))
+                   && pmpriv->adhoc_aes_enabled &&
+                   pmpriv->sec_info.encryption_mode == MLAN_ENCRYPTION_MODE_NONE
+                   && pbss_desc->privacy) {
+            /* Ad-hoc AES enabled */
+            LEAVE();
+            return index;
+        } else if (pmpriv->sec_info.wep_status == Wlan802_11WEPDisabled
+                   && !pmpriv->sec_info.wpa_enabled
+                   && !pmpriv->sec_info.wpa2_enabled
+                   && ((!pbss_desc->pwpa_ie) ||
+                       ((*(pbss_desc->pwpa_ie)).vend_hdr.element_id != WPA_IE))
+                   && ((!pbss_desc->prsn_ie) ||
+                       ((*(pbss_desc->prsn_ie)).ieee_hdr.element_id != RSN_IE))
+                   && !pmpriv->adhoc_aes_enabled &&
+                   pmpriv->sec_info.encryption_mode != MLAN_ENCRYPTION_MODE_NONE
+                   && pbss_desc->privacy) {
+            /* Dynamic WEP enabled */
+            PRINTM(MINFO, "wlan_is_network_compatible() dynamic WEP: index=%d "
+                   "wpa_ie=%#x rsn_ie=%#x EncMode=%#x privacy=%#x\n",
+                   index,
+                   (pbss_desc->pwpa_ie) ? (*(pbss_desc->pwpa_ie)).vend_hdr.
+                   element_id : 0,
+                   (pbss_desc->prsn_ie) ? (*(pbss_desc->prsn_ie)).ieee_hdr.
+                   element_id : 0, pmpriv->sec_info.encryption_mode,
+                   pbss_desc->privacy);
+            LEAVE();
+            return index;
+        }
+
+        /* Security doesn't match */
+        PRINTM(MINFO,
+               "wlan_is_network_compatible() FAILED: index=%d wpa_ie=%#x "
+               "rsn_ie=%#x WEP=%s WPA=%s WPA2=%s EncMode=%#x privacy=%#x\n",
+               index,
+               (pbss_desc->pwpa_ie) ? (*(pbss_desc->pwpa_ie)).vend_hdr.
+               element_id : 0,
+               (pbss_desc->prsn_ie) ? (*(pbss_desc->prsn_ie)).ieee_hdr.
+               element_id : 0,
+               (pmpriv->sec_info.wep_status ==
+                Wlan802_11WEPEnabled) ? "e" : "d",
+               (pmpriv->sec_info.wpa_enabled) ? "e" : "d",
+               (pmpriv->sec_info.wpa2_enabled) ? "e" : "d",
+               pmpriv->sec_info.encryption_mode, pbss_desc->privacy);
+        LEAVE();
+        return -1;
+    }
+
+    /* Mode doesn't match */
+    LEAVE();
+    return -1;
+}
+
+/**
+ *  @brief Internal function used to flush the scan list
+ *
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS 
+ */
+mlan_status
+wlan_flush_scan_table(IN pmlan_adapter pmadapter)
+{
+    ENTER();
+
+    PRINTM(MINFO, "Flushing scan table\n");
+
+    memset(pmadapter, pmadapter->pscan_table, 0,
+           (sizeof(BSSDescriptor_t) * MRVDRV_MAX_BSSID_LIST));
+    pmadapter->num_in_scan_table = 0;
+
+    memset(pmadapter, pmadapter->bcn_buf, 0, pmadapter->bcn_buf_size);
+    pmadapter->pbcn_buf_end = pmadapter->bcn_buf;
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief Internal function used to start a scan based on an input config
+ *
+ *  Use the input user scan configuration information when provided in
+ *    order to send the appropriate scan commands to firmware to populate or
+ *    update the internal driver scan table
+ *
+ *  @param pmpriv          A pointer to mlan_private structure
+ *  @param pioctl_buf      A pointer to MLAN IOCTL Request buffer
+ *  @param puser_scan_in   Pointer to the input configuration for the requested
+ *                         scan.
+ *
+ *  @return              MLAN_STATUS_SUCCESS or < 0 if error
+ */
+mlan_status
+wlan_scan_networks(IN mlan_private * pmpriv,
+                   IN t_void * pioctl_buf,
+                   IN const wlan_user_scan_cfg * puser_scan_in)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    mlan_callbacks *pcb = (mlan_callbacks *) & pmadapter->callbacks;
+    cmd_ctrl_node *pcmd_node = MNULL;
+    pmlan_ioctl_req pioctl_req = (mlan_ioctl_req *) pioctl_buf;
+
+    wlan_scan_cmd_config_tlv *pscan_cfg_out = MNULL;
+    MrvlIEtypes_ChanListParamSet_t *pchan_list_out;
+    t_u32 buf_size;
+    ChanScanParamSet_t *pscan_chan_list;
+
+    t_u8 keep_previous_scan;
+    t_u8 filtered_scan;
+    t_u8 scan_current_chan_only;
+    t_u8 max_chan_per_scan;
+
+    ENTER();
+
+    ret =
+        pcb->moal_malloc(pmadapter->pmoal_handle,
+                         sizeof(wlan_scan_cmd_config_tlv), MLAN_MEM_DEF,
+                         (t_u8 **) & pscan_cfg_out);
+    if (ret != MLAN_STATUS_SUCCESS || !pscan_cfg_out) {
+        PRINTM(MERROR, "Memory allocation for pscan_cfg_out failed!\n");
+        if (pioctl_req)
+            pioctl_req->status_code = MLAN_ERROR_NO_MEM;
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+
+    buf_size = sizeof(ChanScanParamSet_t) * WLAN_USER_SCAN_CHAN_MAX;
+    ret =
+        pcb->moal_malloc(pmadapter->pmoal_handle, buf_size, MLAN_MEM_DEF,
+                         (t_u8 **) & pscan_chan_list);
+    if (ret != MLAN_STATUS_SUCCESS || !pscan_chan_list) {
+        PRINTM(MERROR, "Failed to allocate scan_chan_list\n");
+        if (pscan_cfg_out)
+            pcb->moal_mfree(pmadapter->pmoal_handle, (t_u8 *) pscan_cfg_out);
+        if (pioctl_req)
+            pioctl_req->status_code = MLAN_ERROR_NO_MEM;
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+
+    memset(pmadapter, pscan_chan_list, 0x00, buf_size);
+    memset(pmadapter, pscan_cfg_out, 0x00, sizeof(wlan_scan_cmd_config_tlv));
+
+    keep_previous_scan = MFALSE;
+
+    ret = wlan_scan_setup_scan_config(pmpriv,
+                                      puser_scan_in,
+                                      &pscan_cfg_out->config,
+                                      &pchan_list_out,
+                                      pscan_chan_list,
+                                      &max_chan_per_scan,
+                                      &filtered_scan, &scan_current_chan_only);
+    if (ret != MLAN_STATUS_SUCCESS) {
+
+        PRINTM(MERROR, "Failed to setup scan config\n");
+        if (pscan_cfg_out)
+            pcb->moal_mfree(pmadapter->pmoal_handle, (t_u8 *) pscan_cfg_out);
+        if (pscan_chan_list)
+            pcb->moal_mfree(pmadapter->pmoal_handle, (t_u8 *) pscan_chan_list);
+        if (pioctl_req)
+            pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+
+    if (puser_scan_in) {
+        keep_previous_scan = puser_scan_in->keep_previous_scan;
+    }
+
+    if (keep_previous_scan == MFALSE) {
+        memset(pmadapter, pmadapter->pscan_table, 0x00,
+               sizeof(BSSDescriptor_t) * MRVDRV_MAX_BSSID_LIST);
+        pmadapter->num_in_scan_table = 0;
+        pmadapter->pbcn_buf_end = pmadapter->bcn_buf;
+    }
+
+    ret = wlan_scan_channel_list(pmpriv,
+                                 pioctl_buf,
+                                 max_chan_per_scan,
+                                 filtered_scan,
+                                 &pscan_cfg_out->config,
+                                 pchan_list_out, pscan_chan_list);
+
+    /* Get scan command from scan_pending_q and put to cmd_pending_q */
+    if (ret == MLAN_STATUS_SUCCESS) {
+        if (util_peek_list
+            (pmadapter->pmoal_handle, &pmadapter->scan_pending_q,
+             pcb->moal_spin_lock, pcb->moal_spin_unlock)) {
+            pcmd_node =
+                (cmd_ctrl_node *) util_dequeue_list(pmadapter->pmoal_handle,
+                                                    &pmadapter->scan_pending_q,
+                                                    pcb->moal_spin_lock,
+                                                    pcb->moal_spin_unlock);
+            wlan_request_cmd_lock(pmadapter);
+            pmadapter->scan_processing = MTRUE;
+            wlan_release_cmd_lock(pmadapter);
+            wlan_insert_cmd_to_pending_q(pmadapter, pcmd_node, MTRUE);
+        }
+    }
+    if (pscan_cfg_out)
+        pcb->moal_mfree(pmadapter->pmoal_handle, (t_u8 *) pscan_cfg_out);
+
+    if (pscan_chan_list)
+        pcb->moal_mfree(pmadapter->pmoal_handle, (t_u8 *) pscan_chan_list);
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Prepare a scan command to be sent to the firmware
+ *
+ *  Use the wlan_scan_cmd_config sent to the command processing module in
+ *   the wlan_prepare_cmd to configure a HostCmd_DS_802_11_SCAN command
+ *   struct to send to firmware.
+ *
+ *  The fixed fields specifying the BSS type and BSSID filters as well as a
+ *   variable number/length of TLVs are sent in the command to firmware.
+ *
+ *  @param pmpriv     A pointer to mlan_private structure
+ *  @param pcmd       A pointer to HostCmd_DS_COMMAND structure to be sent to
+ *                    firmware with the HostCmd_DS_801_11_SCAN structure
+ *  @param pdata_buf  Void pointer cast of a wlan_scan_cmd_config struct used
+ *                    to set the fields/TLVs for the command sent to firmware
+ *
+ *  @return           MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_cmd_802_11_scan(IN mlan_private * pmpriv,
+                     IN HostCmd_DS_COMMAND * pcmd, IN t_void * pdata_buf)
+{
+    HostCmd_DS_802_11_SCAN *pscan_cmd = &pcmd->params.scan;
+    wlan_scan_cmd_config *pscan_cfg;
+
+    ENTER();
+
+    pscan_cfg = (wlan_scan_cmd_config *) pdata_buf;
+
+    /* Set fixed field variables in scan command */
+    pscan_cmd->bss_mode = pscan_cfg->bss_mode;
+    memcpy(pmpriv->adapter, pscan_cmd->bssid, pscan_cfg->specific_bssid,
+           sizeof(pscan_cmd->bssid));
+    memcpy(pmpriv->adapter, pscan_cmd->tlv_buffer, pscan_cfg->tlv_buf,
+           pscan_cfg->tlv_buf_len);
+
+    pcmd->command = wlan_cpu_to_le16(HostCmd_CMD_802_11_SCAN);
+
+    /* Size is equal to the sizeof(fixed portions) + the TLV len + header */
+    pcmd->size = (t_u16) wlan_cpu_to_le16((t_u16) (sizeof(pscan_cmd->bss_mode)
+                                                   + sizeof(pscan_cmd->bssid)
+                                                   + pscan_cfg->tlv_buf_len
+                                                   + S_DS_GEN));
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function handles the command response of scan
+ *
+ *   The response buffer for the scan command has the following
+ *      memory layout:
+ *
+ *     .-------------------------------------------------------------.
+ *     |  Header (4 * sizeof(t_u16)):  Standard command response hdr |
+ *     .-------------------------------------------------------------.
+ *     |  BufSize (t_u16) : sizeof the BSS Description data          |
+ *     .-------------------------------------------------------------.
+ *     |  NumOfSet (t_u8) : Number of BSS Descs returned             |
+ *     .-------------------------------------------------------------.
+ *     |  BSSDescription data (variable, size given in BufSize)      |
+ *     .-------------------------------------------------------------.
+ *     |  TLV data (variable, size calculated using Header->Size,    |
+ *     |            BufSize and sizeof the fixed fields above)       |
+ *     .-------------------------------------------------------------.
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_ret_802_11_scan(IN mlan_private * pmpriv,
+                     IN HostCmd_DS_COMMAND * resp, IN t_void * pioctl_buf)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    mlan_callbacks *pcb = MNULL;
+    mlan_ioctl_req *pioctl_req = (mlan_ioctl_req *) pioctl_buf;
+    cmd_ctrl_node *pcmd_node = MNULL;
+    HostCmd_DS_802_11_SCAN_RSP *pscan_rsp = MNULL;
+    BSSDescriptor_t *bss_new_entry = MNULL;
+    MrvlIEtypes_Data_t *ptlv;
+    MrvlIEtypes_TsfTimestamp_t *ptsf_tlv = MNULL;
+    t_u8 *pbss_info;
+    t_u32 scan_resp_size;
+    t_u32 bytes_left;
+    t_u32 num_in_table;
+    t_u32 bss_idx;
+    t_u32 idx;
+    t_u32 tlv_buf_size;
+    t_u64 tsf_val;
+    chan_freq_power_t *cfp;
+    MrvlIEtypes_ChanBandListParamSet_t *pchan_band_tlv = MNULL;
+    ChanBandParamSet_t *pchan_band;
+    t_u8 band;
+    t_u32 age_ts_usec;
+
+    ENTER();
+    pcb = (pmlan_callbacks) & pmadapter->callbacks;
+
+    pscan_rsp = &resp->params.scan_resp;
+
+    if (pscan_rsp->number_of_sets > MRVDRV_MAX_BSSID_LIST) {
+        PRINTM(MERROR, "SCAN_RESP: Invalid number of AP returned (%d)!!\n",
+               pscan_rsp->number_of_sets);
+        if (pioctl_req)
+            pioctl_req->status_code = MLAN_ERROR_CMD_SCAN_FAIL;
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    bytes_left = wlan_le16_to_cpu(pscan_rsp->bss_descript_size);
+    PRINTM(MINFO, "SCAN_RESP: bss_descript_size %d\n", bytes_left);
+
+    scan_resp_size = resp->size;
+
+    PRINTM(MINFO, "SCAN_RESP: returned %d APs before parsing\n",
+           pscan_rsp->number_of_sets);
+
+    num_in_table = pmadapter->num_in_scan_table;
+    pbss_info = pscan_rsp->bss_desc_and_tlv_buffer;
+
+    /* 
+     * The size of the TLV buffer is equal to the entire command response
+     *   size (scan_resp_size) minus the fixed fields (sizeof()'s), the
+     *   BSS Descriptions (bss_descript_size as bytesLef) and the command
+     *   response header (S_DS_GEN)
+     */
+    tlv_buf_size = scan_resp_size - (bytes_left
+                                     + sizeof(pscan_rsp->bss_descript_size)
+                                     + sizeof(pscan_rsp->number_of_sets)
+                                     + S_DS_GEN);
+
+    ptlv =
+        (MrvlIEtypes_Data_t *) (pscan_rsp->bss_desc_and_tlv_buffer +
+                                bytes_left);
+
+    /* Search the TLV buffer space in the scan response for any valid TLVs */
+    wlan_ret_802_11_scan_get_tlv_ptrs(pmadapter,
+                                      ptlv,
+                                      tlv_buf_size,
+                                      TLV_TYPE_TSFTIMESTAMP,
+                                      (MrvlIEtypes_Data_t **) & ptsf_tlv);
+
+    /* Search the TLV buffer space in the scan response for any valid TLVs */
+    wlan_ret_802_11_scan_get_tlv_ptrs(pmadapter,
+                                      ptlv,
+                                      tlv_buf_size,
+                                      TLV_TYPE_CHANNELBANDLIST,
+                                      (MrvlIEtypes_Data_t **) & pchan_band_tlv);
+
+    /* 
+     *  Process each scan response returned (pscan_rsp->number_of_sets).  Save
+     *    the information in the bss_new_entry and then insert into the
+     *    driver scan table either as an update to an existing entry
+     *    or as an addition at the end of the table
+     */
+    ret =
+        pcb->moal_malloc(pmadapter->pmoal_handle, sizeof(BSSDescriptor_t),
+                         MLAN_MEM_DEF, (t_u8 **) & bss_new_entry);
+
+    if (ret != MLAN_STATUS_SUCCESS || !bss_new_entry) {
+        PRINTM(MERROR, "Memory allocation for bss_new_entry failed!\n");
+        if (pioctl_req)
+            pioctl_req->status_code = MLAN_ERROR_NO_MEM;
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    for (idx = 0; idx < pscan_rsp->number_of_sets && bytes_left; idx++) {
+        /* Zero out the bss_new_entry we are about to store info in */
+        memset(pmadapter, bss_new_entry, 0x00, sizeof(BSSDescriptor_t));
+
+        /* Process the data fields and IEs returned for this BSS */
+        if (wlan_interpret_bss_desc_with_ie(pmadapter,
+                                            bss_new_entry,
+                                            &pbss_info,
+                                            &bytes_left) ==
+            MLAN_STATUS_SUCCESS) {
+            PRINTM(MINFO, "SCAN_RESP: BSSID = %02x:%02x:%02x:%02x:%02x:%02x\n",
+                   bss_new_entry->mac_address[0], bss_new_entry->mac_address[1],
+                   bss_new_entry->mac_address[2], bss_new_entry->mac_address[3],
+                   bss_new_entry->mac_address[4],
+                   bss_new_entry->mac_address[5]);
+            /* 
+             * Search the scan table for the same bssid
+             */
+            for (bss_idx = 0; bss_idx < num_in_table; bss_idx++) {
+                if (!memcmp(pmadapter, bss_new_entry->mac_address,
+                            pmadapter->pscan_table[bss_idx].mac_address,
+                            sizeof(bss_new_entry->mac_address))) {
+                    /* 
+                     * If the SSID matches as well, it is a duplicate of
+                     *   this entry.  Keep the bss_idx set to this
+                     *   entry so we replace the old contents in the table
+                     */
+                    if ((bss_new_entry->ssid.ssid_len ==
+                         pmadapter->pscan_table[bss_idx].ssid.ssid_len)
+                        && (!memcmp(pmadapter, bss_new_entry->ssid.ssid,
+                                    pmadapter->pscan_table[bss_idx].ssid.ssid,
+                                    bss_new_entry->ssid.ssid_len))) {
+                        PRINTM(MINFO, "SCAN_RESP: Duplicate of index: %d\n",
+                               bss_idx);
+                        break;
+                    }
+                }
+            }
+            /* 
+             * If the bss_idx is equal to the number of entries in the table,
+             *   the new entry was not a duplicate; append it to the scan
+             *   table
+             */
+            if (bss_idx == num_in_table) {
+                /* Range check the bss_idx, keep it limited to the last entry */
+                if (bss_idx == MRVDRV_MAX_BSSID_LIST) {
+                    bss_idx--;
+                } else {
+                    num_in_table++;
+                }
+            }
+
+            /* 
+             * Save the beacon/probe response returned for later application
+             *   retrieval.  Duplicate beacon/probe responses are updated if
+             *   possible
+             */
+            wlan_ret_802_11_scan_store_beacon(pmpriv,
+                                              bss_idx,
+                                              num_in_table, bss_new_entry);
+            if (bss_new_entry->pbeacon_buf == MNULL) {
+                PRINTM(MCMND, "No space for beacon, drop this entry\n");
+                num_in_table--;
+                continue;
+            }
+            /* 
+             * If the TSF TLV was appended to the scan results, save
+             *   this entry's TSF value in the networkTSF field.  The
+             *   networkTSF is the firmware's TSF value at the time the
+             *   beacon or probe response was received.
+             */
+            if (ptsf_tlv) {
+                memcpy(pmpriv->adapter, &tsf_val,
+                       &ptsf_tlv->tsf_data[idx * TSF_DATA_SIZE],
+                       sizeof(tsf_val));
+                tsf_val = wlan_le64_to_cpu(tsf_val);
+                memcpy(pmpriv->adapter, &bss_new_entry->network_tsf,
+                       &tsf_val, sizeof(bss_new_entry->network_tsf));
+            }
+            band = BAND_G;
+            if (pchan_band_tlv) {
+                pchan_band = &pchan_band_tlv->chan_band_param[idx];
+                band =
+                    radio_type_to_band(pchan_band->
+                                       radio_type & (MBIT(0) | MBIT(1)));
+            }
+
+            /* Save the band designation for this entry for use in join */
+            bss_new_entry->bss_band = band;
+            cfp =
+                wlan_find_cfp_by_band_and_channel(pmadapter,
+                                                  (t_u8) bss_new_entry->
+                                                  bss_band,
+                                                  (t_u16) bss_new_entry->
+                                                  channel);
+
+            if (cfp)
+                bss_new_entry->freq = cfp->freq;
+            else
+                bss_new_entry->freq = 0;
+
+            /* Copy the locally created bss_new_entry to the scan table */
+            memcpy(pmadapter, &pmadapter->pscan_table[bss_idx],
+                   bss_new_entry, sizeof(pmadapter->pscan_table[bss_idx]));
+
+        } else {
+
+            /* Error parsing/interpreting the scan response, skipped */
+            PRINTM(MERROR,
+                   "SCAN_RESP: wlan_interpret_bss_desc_with_ie returned error\n");
+        }
+    }
+
+    PRINTM(MINFO, "SCAN_RESP: Scanned %2d APs, %d valid, %d total\n",
+           pscan_rsp->number_of_sets,
+           num_in_table - pmadapter->num_in_scan_table, num_in_table);
+
+    /* Update the total number of BSSIDs in the scan table */
+    pmadapter->num_in_scan_table = num_in_table;
+    /* Update the age_in_second */
+    pmadapter->callbacks.moal_get_system_time(pmadapter->pmoal_handle,
+                                              &pmadapter->age_in_secs,
+                                              &age_ts_usec);
+
+    if (!util_peek_list
+        (pmadapter->pmoal_handle, &pmadapter->scan_pending_q,
+         pcb->moal_spin_lock, pcb->moal_spin_unlock)) {
+        wlan_request_cmd_lock(pmadapter);
+        pmadapter->scan_processing = MFALSE;
+        wlan_release_cmd_lock(pmadapter);
+        /* 
+         * Process the resulting scan table:
+         *   - Remove any bad ssids
+         *   - Update our current BSS information from scan data
+         */
+        wlan_scan_process_results(pmpriv);
+
+        /* Need to indicate IOCTL complete */
+        if (pioctl_req != MNULL) {
+            pioctl_req->status_code = MLAN_ERROR_NO_ERROR;
+
+            /* Indicate ioctl complete */
+            pcb->moal_ioctl_complete(pmadapter->pmoal_handle,
+                                     (pmlan_ioctl_req) pioctl_buf,
+                                     MLAN_STATUS_SUCCESS);
+        }
+        wlan_recv_event(pmpriv, MLAN_EVENT_ID_DRV_SCAN_REPORT, MNULL);
+    } else {
+        /* If firmware not ready, do not issue any more scan commands */
+        if (pmadapter->hw_status != WlanHardwareStatusReady) {
+            /* Flush all pending scan commands */
+            wlan_flush_scan_queue(pmadapter);
+            /* Indicate IOCTL complete */
+            if (pioctl_req != MNULL) {
+                pioctl_req->status_code = MLAN_ERROR_FW_NOT_READY;
+
+                /* Indicate ioctl complete */
+                pcb->moal_ioctl_complete(pmadapter->pmoal_handle,
+                                         (pmlan_ioctl_req) pioctl_buf,
+                                         MLAN_STATUS_FAILURE);
+            }
+        } else {
+            /* Get scan command from scan_pending_q and put to cmd_pending_q */
+            pcmd_node =
+                (cmd_ctrl_node *) util_dequeue_list(pmadapter->pmoal_handle,
+                                                    &pmadapter->scan_pending_q,
+                                                    pcb->moal_spin_lock,
+                                                    pcb->moal_spin_unlock);
+
+            wlan_insert_cmd_to_pending_q(pmadapter, pcmd_node, MTRUE);
+        }
+    }
+
+  done:
+    if (bss_new_entry)
+        pcb->moal_mfree(pmadapter->pmoal_handle, (t_u8 *) bss_new_entry);
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function finds ssid in ssid list.
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param ssid         SSID to find in the list
+ *  @param bssid        BSSID to qualify the SSID selection (if provided)
+ *  @param mode         Network mode: Infrastructure or IBSS
+ *
+ *  @return             index in BSSID list or < 0 if error
+ */
+t_s32
+wlan_find_ssid_in_list(IN mlan_private * pmpriv,
+                       IN mlan_802_11_ssid * ssid,
+                       IN t_u8 * bssid, IN t_u32 mode)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    t_s32 net = -1, j;
+    t_u8 best_rssi = 0;
+    t_u32 i;
+
+    ENTER();
+    PRINTM(MINFO, "Num of entries in scan table = %d\n",
+           pmadapter->num_in_scan_table);
+
+    /* 
+     * Loop through the table until the maximum is reached or until a match
+     *   is found based on the bssid field comparison 
+     */
+    for (i = 0;
+         i < pmadapter->num_in_scan_table && (!bssid || (bssid && net < 0));
+         i++) {
+        if (!wlan_ssid_cmp(pmadapter, &pmadapter->pscan_table[i].ssid, ssid) &&
+            (!bssid
+             || !memcmp(pmadapter, pmadapter->pscan_table[i].mac_address, bssid,
+                        MLAN_MAC_ADDR_LENGTH))) {
+
+            if (((mode == MLAN_BSS_MODE_INFRA) &&
+                 !wlan_is_band_compatible(pmadapter->config_bands,
+                                          pmadapter->pscan_table[i].bss_band))
+                ||
+                (wlan_find_cfp_by_band_and_channel
+                 (pmadapter, (t_u8) pmadapter->pscan_table[i].bss_band,
+                  (t_u16) pmadapter->pscan_table[i].channel) == MNULL)) {
+                continue;
+            }
+
+            switch (mode) {
+            case MLAN_BSS_MODE_INFRA:
+            case MLAN_BSS_MODE_IBSS:
+                j = wlan_is_network_compatible(pmpriv, i, mode);
+
+                if (j >= 0) {
+                    if (SCAN_RSSI(pmadapter->pscan_table[i].rssi) > best_rssi) {
+                        best_rssi = SCAN_RSSI(pmadapter->pscan_table[i].rssi);
+                        net = i;
+                    }
+                } else {
+                    if (net == -1) {
+                        net = j;
+                    }
+                }
+                break;
+            case MLAN_BSS_MODE_AUTO:
+            default:
+                /* 
+                 * Do not check compatibility if the mode requested is 
+                 *   Auto/Unknown.  Allows generic find to work without 
+                 *   verifying against the Adapter security settings
+                 */
+                if (SCAN_RSSI(pmadapter->pscan_table[i].rssi) > best_rssi) {
+                    best_rssi = SCAN_RSSI(pmadapter->pscan_table[i].rssi);
+                    net = i;
+                }
+                break;
+            }
+        }
+    }
+
+    LEAVE();
+    return net;
+}
+
+/**
+ *  @brief This function finds a specific compatible BSSID in the scan list
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param bssid        BSSID to find in the scan list
+ *  @param mode         Network mode: Infrastructure or IBSS
+ *
+ *  @return             index in BSSID list or < 0 if error
+ */
+t_s32
+wlan_find_bssid_in_list(IN mlan_private * pmpriv,
+                        IN t_u8 * bssid, IN t_u32 mode)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    t_s32 net = -1;
+    t_u32 i;
+
+    ENTER();
+
+    if (!bssid) {
+        LEAVE();
+        return -1;
+    }
+
+    PRINTM(MINFO, "FindBSSID: Num of BSSIDs = %d\n",
+           pmadapter->num_in_scan_table);
+
+    /* 
+     * Look through the scan table for a compatible match. The ret return
+     *   variable will be equal to the index in the scan table (greater
+     *   than zero) if the network is compatible.  The loop will continue
+     *   past a matched bssid that is not compatible in case there is an
+     *   AP with multiple SSIDs assigned to the same BSSID
+     */
+    for (i = 0; net < 0 && i < pmadapter->num_in_scan_table; i++) {
+        if (!memcmp
+            (pmadapter, pmadapter->pscan_table[i].mac_address, bssid,
+             MLAN_MAC_ADDR_LENGTH)) {
+            if (((mode == MLAN_BSS_MODE_INFRA) &&
+                 !wlan_is_band_compatible(pmadapter->config_bands,
+                                          pmadapter->pscan_table[i].bss_band))
+                ||
+                (wlan_find_cfp_by_band_and_channel
+                 (pmadapter, (t_u8) pmadapter->pscan_table[i].bss_band,
+                  (t_u16) pmadapter->pscan_table[i].channel) == MNULL)) {
+                continue;
+            }
+            switch (mode) {
+            case MLAN_BSS_MODE_INFRA:
+            case MLAN_BSS_MODE_IBSS:
+                net = wlan_is_network_compatible(pmpriv, i, mode);
+                break;
+            default:
+                net = i;
+                break;
+            }
+        }
+    }
+
+    LEAVE();
+    return net;
+}
+
+/**
+ *  @brief Compare two SSIDs
+ *
+ *  @param pmadapter A pointer to mlan_adapter structure
+ *  @param ssid1     A pointer to ssid to compare
+ *  @param ssid2     A pointer to ssid to compare
+ *
+ *  @return         0--ssid is same, otherwise is different
+ */
+t_s32
+wlan_ssid_cmp(IN pmlan_adapter pmadapter,
+              IN mlan_802_11_ssid * ssid1, IN mlan_802_11_ssid * ssid2)
+{
+    ENTER();
+
+    if (!ssid1 || !ssid2) {
+        LEAVE();
+        return -1;
+    }
+
+    if (ssid1->ssid_len != ssid2->ssid_len) {
+        LEAVE();
+        return -1;
+    }
+
+    LEAVE();
+    return memcmp(pmadapter, ssid1->ssid, ssid2->ssid, ssid1->ssid_len);
+}
+
+/** 
+ *  @brief This function inserts scan command node to scan_pending_q.
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param pcmd_node    A pointer to cmd_ctrl_node structure
+ *  @return             N/A
+ */
+t_void
+wlan_queue_scan_cmd(IN mlan_private * pmpriv, IN cmd_ctrl_node * pcmd_node)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+
+    ENTER();
+
+    if (pcmd_node == MNULL)
+        goto done;
+    util_enqueue_list_tail(pmadapter->pmoal_handle, &pmadapter->scan_pending_q,
+                           (pmlan_linked_list) pcmd_node,
+                           pmadapter->callbacks.moal_spin_lock,
+                           pmadapter->callbacks.moal_spin_unlock);
+
+  done:
+    LEAVE();
+}
+
+/**
+ *  @brief Find the AP with specific ssid in the scan list
+ *
+ *  @param pmpriv               A pointer to mlan_private structure
+ *  @param preq_ssid_bssid      A pointer to AP's ssid returned
+ *
+ *  @return                     MLAN_STATUS_SUCCESS--success, otherwise--fail
+ */
+mlan_status
+wlan_find_best_network(IN mlan_private * pmpriv,
+                       OUT mlan_ssid_bssid * preq_ssid_bssid)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    BSSDescriptor_t *preq_bss;
+    t_s32 i;
+
+    ENTER();
+
+    memset(pmadapter, preq_ssid_bssid, 0, sizeof(mlan_ssid_bssid));
+
+    i = wlan_find_best_network_in_list(pmpriv);
+
+    if (i >= 0) {
+        preq_bss = &pmadapter->pscan_table[i];
+        memcpy(pmadapter, &preq_ssid_bssid->ssid, &preq_bss->ssid,
+               sizeof(mlan_802_11_ssid));
+        memcpy(pmadapter, (t_u8 *) & preq_ssid_bssid->bssid,
+               (t_u8 *) & preq_bss->mac_address, MLAN_MAC_ADDR_LENGTH);
+
+        /* Make sure we are in the right mode */
+        if (pmpriv->bss_mode == MLAN_BSS_MODE_AUTO)
+            pmpriv->bss_mode = preq_bss->bss_mode;
+    }
+
+    if (!preq_ssid_bssid->ssid.ssid_len) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    PRINTM(MINFO, "Best network found = [%s], "
+           "[%02x:%02x:%02x:%02x:%02x:%02x]\n",
+           preq_ssid_bssid->ssid.ssid,
+           preq_ssid_bssid->bssid[0], preq_ssid_bssid->bssid[1],
+           preq_ssid_bssid->bssid[2], preq_ssid_bssid->bssid[3],
+           preq_ssid_bssid->bssid[4], preq_ssid_bssid->bssid[5]);
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Send a scan command for all available channels filtered on a spec
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param pioctl_buf   A pointer to MLAN IOCTL Request buffer
+ *  @param preq_ssid    A pointer to AP's ssid returned
+ *
+ *  @return             MLAN_STATUS_SUCCESS--success, otherwise--fail
+ */
+mlan_status
+wlan_scan_specific_ssid(IN mlan_private * pmpriv,
+                        IN t_void * pioctl_buf, IN mlan_802_11_ssid * preq_ssid)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_callbacks *pcb = (mlan_callbacks *) & pmpriv->adapter->callbacks;
+    wlan_user_scan_cfg *pscan_cfg;
+    pmlan_ioctl_req pioctl_req = (mlan_ioctl_req *) pioctl_buf;
+
+    ENTER();
+
+    if (!preq_ssid) {
+        if (pioctl_req)
+            pioctl_req->status_code = MLAN_ERROR_CMD_SCAN_FAIL;
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    wlan_scan_delete_ssid_table_entry(pmpriv, preq_ssid);
+
+    ret =
+        pcb->moal_malloc(pmpriv->adapter->pmoal_handle,
+                         sizeof(wlan_user_scan_cfg), MLAN_MEM_DEF,
+                         (t_u8 **) & pscan_cfg);
+
+    if (ret != MLAN_STATUS_SUCCESS || !pscan_cfg) {
+        PRINTM(MERROR, "Memory allocation for pscan_cfg failed!\n");
+        if (pioctl_req)
+            pioctl_req->status_code = MLAN_ERROR_NO_MEM;
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    memset(pmpriv->adapter, pscan_cfg, 0x00, sizeof(wlan_user_scan_cfg));
+
+    memcpy(pmpriv->adapter, pscan_cfg->ssid_list[0].ssid,
+           preq_ssid->ssid, preq_ssid->ssid_len);
+    pscan_cfg->keep_previous_scan = MTRUE;
+
+    ret = wlan_scan_networks(pmpriv, pioctl_buf, pscan_cfg);
+
+    if (pscan_cfg)
+        pcb->moal_mfree(pmpriv->adapter->pmoal_handle, (t_u8 *) pscan_cfg);
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Save a beacon buffer of the current bss descriptor
+ *  Save the current beacon buffer to restore in the following cases that 
+ *  makes the bcn_buf not to contain the current ssid's beacon buffer.
+ *    - the current ssid was not found somehow in the last scan. 
+ *    - the current ssid was the last entry of the scan table and overloaded. 
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *
+ *  @return             N/A
+ */
+t_void
+wlan_save_curr_bcn(IN mlan_private * pmpriv)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    mlan_callbacks *pcb = (pmlan_callbacks) & pmadapter->callbacks;
+    BSSDescriptor_t *pcurr_bss = &pmpriv->curr_bss_params.bss_descriptor;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    /* save the beacon buffer if it is not saved or updated */
+    if ((pmpriv->pcurr_bcn_buf == MNULL) ||
+        (pmpriv->curr_bcn_size != pcurr_bss->beacon_buf_size) ||
+        (memcmp(pmpriv->adapter, pmpriv->pcurr_bcn_buf, pcurr_bss->pbeacon_buf,
+                pcurr_bss->beacon_buf_size))) {
+
+        if (pmpriv->pcurr_bcn_buf) {
+            pcb->moal_mfree(pmadapter->pmoal_handle, pmpriv->pcurr_bcn_buf);
+            pmpriv->pcurr_bcn_buf = MNULL;
+        }
+        pmpriv->curr_bcn_size = pcurr_bss->beacon_buf_size;
+
+        if (pmpriv->curr_bcn_size) {
+            ret =
+                pcb->moal_malloc(pmadapter->pmoal_handle,
+                                 pcurr_bss->beacon_buf_size, MLAN_MEM_DEF,
+                                 &pmpriv->pcurr_bcn_buf);
+
+            if ((ret == MLAN_STATUS_SUCCESS) && pmpriv->pcurr_bcn_buf) {
+                memcpy(pmpriv->adapter, pmpriv->pcurr_bcn_buf,
+                       pcurr_bss->pbeacon_buf, pcurr_bss->beacon_buf_size);
+                PRINTM(MINFO, "current beacon saved %d\n",
+                       pmpriv->curr_bcn_size);
+            }
+        }
+    }
+}
+
+/**
+ *  @brief Free a beacon buffer of the current bss descriptor
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *
+ *  @return             N/A
+ */
+t_void
+wlan_free_curr_bcn(IN mlan_private * pmpriv)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    mlan_callbacks *pcb = (pmlan_callbacks) & pmadapter->callbacks;
+
+    if (pmpriv->pcurr_bcn_buf) {
+        pcb->moal_mfree(pmadapter->pmoal_handle, pmpriv->pcurr_bcn_buf);
+        pmpriv->pcurr_bcn_buf = MNULL;
+    }
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_shim.c linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_shim.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_shim.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_shim.c	2017-09-23 03:42:50.130674721 +0800
@@ -0,0 +1,1049 @@
+/** @file mlan_shim.c
+ *  
+ *  @brief This file contains APIs to MOAL module.
+ * 
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/**
+ *  @mainpage MLAN Driver
+ *
+ *  @section overview_sec Overview
+ *
+ *  The MLAN is an OS independent WLAN driver for Marvell 802.11
+ *  embedded chipset.
+ * 
+ *  @section copyright_sec Copyright
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/********************************************************
+Change log:
+    10/13/2008: initial version
+********************************************************/
+
+#include "mlan.h"
+#ifdef STA_SUPPORT
+#include "mlan_join.h"
+#endif
+#include "mlan_util.h"
+#include "mlan_fw.h"
+#include "mlan_main.h"
+#include "mlan_wmm.h"
+#ifdef UAP_SUPPORT
+#include "mlan_uap.h"
+#endif
+
+/********************************************************
+                Local Variables
+********************************************************/
+
+/********************************************************
+        Global Variables
+********************************************************/
+#ifdef STA_SUPPORT
+mlan_operations mlan_sta_ops = {
+    /* init cmd handler */
+    wlan_ops_sta_init_cmd,
+    /* ioctl handler */
+    wlan_ops_sta_ioctl,
+    /* cmd handler */
+    wlan_ops_sta_prepare_cmd,
+    /* cmdresp handler */
+    wlan_ops_sta_process_cmdresp,
+    /* rx handler */
+    wlan_ops_sta_process_rx_packet,
+    /* Event handler */
+    wlan_ops_sta_process_event,
+    /* txpd handler */
+    wlan_ops_sta_process_txpd,
+    /* BSS role: STA */
+    MLAN_BSS_ROLE_STA,
+};
+#endif
+#ifdef UAP_SUPPORT
+mlan_operations mlan_uap_ops = {
+    /* init cmd handler */
+    wlan_ops_uap_init_cmd,
+    /* ioctl handler */
+    wlan_ops_uap_ioctl,
+    /* cmd handler */
+    wlan_ops_uap_prepare_cmd,
+    /* cmdresp handler */
+    wlan_ops_uap_process_cmdresp,
+    /* rx handler */
+    wlan_ops_uap_process_rx_packet,
+    /* Event handler */
+    wlan_ops_uap_process_event,
+    /* txpd handler */
+    wlan_ops_uap_process_txpd,
+    /* BSS role: uAP */
+    MLAN_BSS_ROLE_UAP,
+};
+#endif
+
+/** mlan function table */
+mlan_operations *mlan_ops[] = {
+#ifdef STA_SUPPORT
+    &mlan_sta_ops,
+#endif
+#ifdef UAP_SUPPORT
+    &mlan_uap_ops,
+#endif
+    MNULL,
+};
+
+/** Global moal_assert callback */
+t_void(*assert_callback) (IN t_void * pmoal_handle, IN t_u32 cond) = MNULL;
+#ifdef DEBUG_LEVEL1
+/** Global moal_print callback */
+t_void(*print_callback) (IN t_void * pmoal_handle,
+                         IN t_u32 level, IN t_s8 * pformat, IN...) = MNULL;
+#endif
+
+/********************************************************
+        Local Functions
+*******************************************************/
+
+/********************************************************
+        Global Functions
+********************************************************/
+
+/**
+ *  @brief This function registers MOAL to MLAN module.
+ *  
+ *  @param pmdevice        A pointer to a mlan_device structure
+ *                         allocated in MOAL
+ *  @param ppmlan_adapter  A pointer to a t_void pointer to store
+ *                         mlan_adapter structure pointer as the context
+ *
+ *  @return                MLAN_STATUS_SUCCESS
+ *                             The registration succeeded.
+ *                         MLAN_STATUS_FAILURE
+ *                             The registration failed.
+ *
+ * mlan_status mlan_register (
+ *   IN pmlan_device     pmdevice,
+ *   OUT t_void          **ppmlan_adapter
+ * );
+ *
+ * Comments
+ *   MOAL constructs mlan_device data structure to pass moal_handle and
+ *   mlan_callback table to MLAN. MLAN returns mlan_adapter pointer to
+ *   the ppmlan_adapter buffer provided by MOAL.
+ * Headers:
+ *   declared in mlan_decl.h
+ * See Also
+ *   mlan_unregister
+ */
+mlan_status
+mlan_register(IN pmlan_device pmdevice, OUT t_void ** ppmlan_adapter)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_adapter pmadapter = MNULL;
+    pmlan_callbacks pcb = MNULL;
+    t_u8 i = 0;
+    t_u32 j = 0;
+
+    MASSERT(pmdevice);
+    MASSERT(ppmlan_adapter);
+    MASSERT(pmdevice->callbacks.moal_print);
+#ifdef DEBUG_LEVEL1
+    print_callback = pmdevice->callbacks.moal_print;
+#endif
+    assert_callback = pmdevice->callbacks.moal_assert;
+
+    ENTER();
+
+    MASSERT(pmdevice->callbacks.moal_malloc);
+    MASSERT(pmdevice->callbacks.moal_memset);
+    MASSERT(pmdevice->callbacks.moal_memmove);
+
+    /* Allocate memory for adapter structure */
+    if ((pmdevice->callbacks.
+         moal_malloc(pmdevice->pmoal_handle, sizeof(mlan_adapter), MLAN_MEM_DEF,
+                     (t_u8 **) & pmadapter) != MLAN_STATUS_SUCCESS)
+        || !pmadapter) {
+        ret = MLAN_STATUS_FAILURE;
+        goto exit_register;
+    }
+
+    pmdevice->callbacks.moal_memset(pmadapter, pmadapter,
+                                    0, sizeof(mlan_adapter));
+
+    pcb = &pmadapter->callbacks;
+
+    /* Save callback functions */
+    pmdevice->callbacks.moal_memmove(pmadapter->pmoal_handle, pcb,
+                                     &pmdevice->callbacks,
+                                     sizeof(mlan_callbacks));
+
+    /* Assertion for all callback functions */
+    MASSERT(pcb->moal_init_fw_complete);
+    MASSERT(pcb->moal_shutdown_fw_complete);
+    MASSERT(pcb->moal_send_packet_complete);
+    MASSERT(pcb->moal_recv_packet);
+    MASSERT(pcb->moal_recv_event);
+    MASSERT(pcb->moal_ioctl_complete);
+    MASSERT(pcb->moal_write_data_async);
+    MASSERT(pcb->moal_recv_complete);
+    MASSERT(pcb->moal_write_data_sync);
+    MASSERT(pcb->moal_read_data_sync);
+    MASSERT(pcb->moal_mfree);
+    MASSERT(pcb->moal_memcpy);
+    MASSERT(pcb->moal_memcmp);
+    MASSERT(pcb->moal_get_system_time);
+    MASSERT(pcb->moal_init_timer);
+    MASSERT(pcb->moal_free_timer);
+    MASSERT(pcb->moal_start_timer);
+    MASSERT(pcb->moal_stop_timer);
+    MASSERT(pcb->moal_init_lock);
+    MASSERT(pcb->moal_free_lock);
+    MASSERT(pcb->moal_spin_lock);
+    MASSERT(pcb->moal_spin_unlock);
+
+    /* Save pmoal_handle */
+    pmadapter->pmoal_handle = pmdevice->pmoal_handle;
+
+#ifdef MFG_CMD_SUPPORT
+    pmadapter->init_para.mfg_mode = pmdevice->mfg_mode;
+#endif
+    pmadapter->init_para.ps_mode = pmdevice->ps_mode;
+    if (pmdevice->max_tx_buf == MLAN_TX_DATA_BUF_SIZE_2K ||
+        pmdevice->max_tx_buf == MLAN_TX_DATA_BUF_SIZE_4K ||
+        pmdevice->max_tx_buf == MLAN_TX_DATA_BUF_SIZE_8K)
+        pmadapter->init_para.max_tx_buf = pmdevice->max_tx_buf;
+#ifdef STA_SUPPORT
+    pmadapter->init_para.cfg_11d = pmdevice->cfg_11d;
+#else
+    pmadapter->init_para.cfg_11d = 0;
+#endif
+
+    pmadapter->priv_num = 0;
+    for (i = 0; i < MLAN_MAX_BSS_NUM; i++) {
+        pmadapter->priv[i] = MNULL;
+        if (pmdevice->bss_attr[i].active == MTRUE) {
+            /* For valid bss_attr, allocate memory for private structure */
+            if ((pcb->
+                 moal_malloc(pmadapter->pmoal_handle, sizeof(mlan_private),
+                             MLAN_MEM_DEF,
+                             (t_u8 **) & pmadapter->priv[i]) !=
+                 MLAN_STATUS_SUCCESS)
+                || !pmadapter->priv[i]) {
+                ret = MLAN_STATUS_FAILURE;
+                goto error;
+            }
+
+            pmadapter->priv_num++;
+            memset(pmadapter, pmadapter->priv[i], 0, sizeof(mlan_private));
+
+            pmadapter->priv[i]->adapter = pmadapter;
+
+            /* Save bss_type, frame_type & bss_priority */
+            pmadapter->priv[i]->bss_type =
+                (t_u8) pmdevice->bss_attr[i].bss_type;
+            pmadapter->priv[i]->frame_type =
+                (t_u8) pmdevice->bss_attr[i].frame_type;
+            pmadapter->priv[i]->bss_priority =
+                (t_u8) pmdevice->bss_attr[i].bss_priority;
+            if (pmdevice->bss_attr[i].bss_type == MLAN_BSS_TYPE_STA)
+                pmadapter->priv[i]->bss_role = MLAN_BSS_ROLE_STA;
+            else if (pmdevice->bss_attr[i].bss_type == MLAN_BSS_TYPE_UAP)
+                pmadapter->priv[i]->bss_role = MLAN_BSS_ROLE_UAP;
+#ifdef WFD_SUPPORT
+            else if (pmdevice->bss_attr[i].bss_type == MLAN_BSS_TYPE_WFD)
+                pmadapter->priv[i]->bss_role = MLAN_BSS_ROLE_STA;
+#endif
+            /* Save bss_index and bss_num */
+            pmadapter->priv[i]->bss_index = i;
+            pmadapter->priv[i]->bss_num = (t_u8) pmdevice->bss_attr[i].bss_num;
+
+            /* init function table */
+            for (j = 0; mlan_ops[j]; j++) {
+                if (mlan_ops[j]->bss_role == GET_BSS_ROLE(pmadapter->priv[i])) {
+                    memcpy(pmadapter, &pmadapter->priv[i]->ops, mlan_ops[j],
+                           sizeof(mlan_operations));
+                }
+            }
+        }
+    }
+
+    /* Initialize lock variables */
+    if (wlan_init_lock_list(pmadapter) != MLAN_STATUS_SUCCESS) {
+        ret = MLAN_STATUS_FAILURE;
+        goto error;
+    }
+
+    /* Allocate memory for member of adapter structure */
+    if (wlan_allocate_adapter(pmadapter)) {
+        ret = MLAN_STATUS_FAILURE;
+        goto error;
+    }
+
+    /* Initialize timers */
+    if (wlan_init_timer(pmadapter) != MLAN_STATUS_SUCCESS) {
+        ret = MLAN_STATUS_FAILURE;
+        goto error;
+    }
+    /* Return pointer of mlan_adapter to MOAL */
+    *ppmlan_adapter = pmadapter;
+
+    goto exit_register;
+
+  error:
+    PRINTM(MINFO, "Leave mlan_register with error\n");
+    /* Free timers */
+    wlan_free_timer(pmadapter);
+    /* Free adapter structure */
+    wlan_free_adapter(pmadapter);
+    /* Free lock variables */
+    wlan_free_lock_list(pmadapter);
+    for (i = 0; i < MLAN_MAX_BSS_NUM; i++) {
+        if (pmadapter->priv[i])
+            pcb->moal_mfree(pmadapter->pmoal_handle,
+                            (t_u8 *) pmadapter->priv[i]);
+    }
+    pcb->moal_mfree(pmadapter->pmoal_handle, (t_u8 *) pmadapter);
+
+  exit_register:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function unregisters MOAL from MLAN module.
+ *  
+ *  @param pmlan_adapter   A pointer to a mlan_device structure
+ *                         allocated in MOAL
+ *
+ *  @return                MLAN_STATUS_SUCCESS
+ *                             The deregistration succeeded.
+ */
+mlan_status
+mlan_unregister(IN t_void * pmlan_adapter)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_adapter *pmadapter = (mlan_adapter *) pmlan_adapter;
+    pmlan_callbacks pcb;
+    t_s32 i = 0;
+
+    MASSERT(pmlan_adapter);
+
+    ENTER();
+
+    pcb = &pmadapter->callbacks;
+
+    /* Free adapter structure */
+    wlan_free_adapter(pmadapter);
+
+    /* Free timers */
+    wlan_free_timer(pmadapter);
+
+    /* Free lock variables */
+    wlan_free_lock_list(pmadapter);
+
+    /* Free private structures */
+    for (i = 0; i < pmadapter->priv_num; i++) {
+        if (pmadapter->priv[i]) {
+            pcb->moal_mfree(pmadapter->pmoal_handle,
+                            (t_u8 *) pmadapter->priv[i]);
+        }
+    }
+
+    /* Free mlan_adapter */
+    pcb->moal_mfree(pmadapter->pmoal_handle, (t_u8 *) pmadapter);
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function downloads the firmware
+ *  
+ *  @param pmlan_adapter   A pointer to a t_void pointer to store
+ *                         mlan_adapter structure pointer
+ *  @param pmfw            A pointer to firmware image
+ *
+ *  @return                MLAN_STATUS_SUCCESS
+ *                             The firmware download succeeded.
+ *                         MLAN_STATUS_FAILURE
+ *                             The firmware download failed.
+ */
+mlan_status
+mlan_dnld_fw(IN t_void * pmlan_adapter, IN pmlan_fw_image pmfw)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_adapter *pmadapter = (mlan_adapter *) pmlan_adapter;
+
+    ENTER();
+    MASSERT(pmlan_adapter);
+
+    if (pmfw) {
+        /* Download helper/firmware */
+        ret = wlan_dnld_fw(pmadapter, pmfw);
+        if (ret != MLAN_STATUS_SUCCESS) {
+            PRINTM(MERROR, "wlan_dnld_fw fail ret=0x%x\n", ret);
+            LEAVE();
+            return ret;
+        }
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function pass init param to MLAN
+ *
+ *  @param pmlan_adapter  A pointer to a t_void pointer to store
+ *                        mlan_adapter structure pointer
+ *  @param pparam         A pointer to mlan_init_param structure
+ *
+ *  @return               MLAN_STATUS_SUCCESS
+ *
+ */
+mlan_status
+mlan_set_init_param(IN t_void * pmlan_adapter, IN pmlan_init_param pparam)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_adapter *pmadapter = (mlan_adapter *) pmlan_adapter;
+
+    ENTER();
+    MASSERT(pmlan_adapter);
+
+    /** Save cal data in MLAN */
+    if ((pparam->pcal_data_buf) && (pparam->cal_data_len > 0)) {
+        pmadapter->pcal_data = pparam->pcal_data_buf;
+        pmadapter->cal_data_len = pparam->cal_data_len;
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function initializes the firmware
+ *  
+ *  @param pmlan_adapter   A pointer to a t_void pointer to store
+ *                         mlan_adapter structure pointer
+ *
+ *  @return                MLAN_STATUS_SUCCESS
+ *                             The firmware initialization succeeded.
+ *                         MLAN_STATUS_PENDING
+ *                             The firmware initialization is pending.
+ *                         MLAN_STATUS_FAILURE
+ *                             The firmware initialization failed.
+ */
+mlan_status
+mlan_init_fw(IN t_void * pmlan_adapter)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_adapter *pmadapter = (mlan_adapter *) pmlan_adapter;
+
+    ENTER();
+    MASSERT(pmlan_adapter);
+
+    pmadapter->hw_status = WlanHardwareStatusInitializing;
+
+    /* Initialize firmware, may return PENDING */
+    ret = wlan_init_fw(pmadapter);
+    PRINTM(MINFO, "wlan_init_fw returned ret=0x%x\n", ret);
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Shutdown firmware
+ *
+ *  @param pmlan_adapter	A pointer to mlan_adapter structure
+ *
+ *  @return			MLAN_STATUS_SUCCESS
+ *                      		The firmware shutdown call succeeded.
+ *				MLAN_STATUS_PENDING
+ *      	                	The firmware shutdown call is pending.
+ *				MLAN_STATUS_FAILURE
+ *      	                	The firmware shutdown call failed.
+ */
+mlan_status
+mlan_shutdown_fw(IN t_void * pmlan_adapter)
+{
+    mlan_status ret = MLAN_STATUS_PENDING;
+    mlan_adapter *pmadapter = (mlan_adapter *) pmlan_adapter;
+    pmlan_buffer pmbuf;
+    pmlan_callbacks pcb;
+    t_s32 i = 0;
+
+    ENTER();
+    MASSERT(pmlan_adapter);
+    /* mlan already shutdown */
+    if (pmadapter->hw_status == WlanHardwareStatusNotReady)
+        return MLAN_STATUS_SUCCESS;
+
+    pmadapter->hw_status = WlanHardwareStatusClosing;
+    /* wait for mlan_process to complete */
+    if (pmadapter->mlan_processing) {
+        PRINTM(MWARN, "mlan main processing is still running\n");
+        return ret;
+    }
+
+    /* shut down mlan */
+    PRINTM(MINFO, "Shutdown mlan...\n");
+
+    /* Clean up priv structures */
+    for (i = 0; i < pmadapter->priv_num; i++) {
+        if (pmadapter->priv[i]) {
+            wlan_free_priv(pmadapter->priv[i]);
+        }
+    }
+
+    pcb = &pmadapter->callbacks;
+
+    while ((pmbuf = (pmlan_buffer) util_dequeue_list(pmadapter->pmoal_handle,
+                                                     &pmadapter->rx_data_queue,
+                                                     pcb->moal_spin_lock,
+                                                     pcb->moal_spin_unlock))) {
+        pcb->moal_recv_complete(pmadapter->pmoal_handle, pmbuf,
+                                MLAN_USB_EP_DATA, MLAN_STATUS_FAILURE);
+    }
+
+    if (pcb->moal_spin_lock(pmadapter->pmoal_handle, pmadapter->pmlan_lock)
+        != MLAN_STATUS_SUCCESS) {
+        ret = MLAN_STATUS_FAILURE;
+        goto exit_shutdown_fw;
+    }
+
+    if (pcb->moal_spin_unlock(pmadapter->pmoal_handle, pmadapter->pmlan_lock)
+        != MLAN_STATUS_SUCCESS) {
+        ret = MLAN_STATUS_FAILURE;
+        goto exit_shutdown_fw;
+    }
+
+    /* Notify completion */
+    ret = wlan_shutdown_fw_complete(pmadapter);
+
+  exit_shutdown_fw:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief The main process
+ *
+ *  @param pmlan_adapter	A pointer to mlan_adapter structure
+ *
+ *  @return			MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+mlan_main_process(IN t_void * pmlan_adapter)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_adapter *pmadapter = (mlan_adapter *) pmlan_adapter;
+    pmlan_callbacks pcb;
+    pmlan_buffer pmbuf;
+
+    ENTER();
+
+    MASSERT(pmlan_adapter);
+
+    pcb = &pmadapter->callbacks;
+
+    pcb->moal_spin_lock(pmadapter->pmoal_handle, pmadapter->pmain_proc_lock);
+
+    /* Check if already processing */
+    if (pmadapter->mlan_processing) {
+        pcb->moal_spin_unlock(pmadapter->pmoal_handle,
+                              pmadapter->pmain_proc_lock);
+        goto exit_main_proc;
+    } else {
+        pmadapter->mlan_processing = MTRUE;
+        pcb->moal_spin_unlock(pmadapter->pmoal_handle,
+                              pmadapter->pmain_proc_lock);
+    }
+  process_start:
+    do {
+        /* Is MLAN shutting down or not ready? */
+        if ((pmadapter->hw_status == WlanHardwareStatusClosing) ||
+            (pmadapter->hw_status == WlanHardwareStatusNotReady))
+            break;
+
+        /* Need to wake up the card ? */
+        if ((pmadapter->ps_state == PS_STATE_SLEEP) &&
+            (pmadapter->pm_wakeup_card_req &&
+             !pmadapter->pm_wakeup_fw_try) &&
+            (util_peek_list
+             (pmadapter->pmoal_handle, &pmadapter->cmd_pending_q,
+              pcb->moal_spin_lock, pcb->moal_spin_unlock)
+             || !wlan_bypass_tx_list_empty(pmadapter)
+             || !wlan_wmm_lists_empty(pmadapter)
+            )) {
+            pmadapter->pm_wakeup_fw_try = MTRUE;
+            wlan_pm_wakeup_card(pmadapter);
+            continue;
+        }
+        if (IS_CARD_RX_RCVD(pmadapter)) {
+            pmadapter->data_received = MFALSE;
+            if (pmadapter->hs_activated == MTRUE) {
+                pmadapter->is_hs_configured = MFALSE;
+                wlan_host_sleep_activated_event(wlan_get_priv
+                                                (pmadapter, MLAN_BSS_ROLE_ANY),
+                                                MFALSE);
+            }
+            pmadapter->pm_wakeup_fw_try = MFALSE;
+            if (pmadapter->ps_state == PS_STATE_SLEEP)
+                pmadapter->ps_state = PS_STATE_AWAKE;
+        } else {
+            /* We have tried to wakeup the card already */
+            if (pmadapter->pm_wakeup_fw_try)
+                break;
+            /* Check if we need to confirm Sleep Request received previously */
+            if (pmadapter->ps_state == PS_STATE_PRE_SLEEP) {
+                if (!pmadapter->cmd_sent && !pmadapter->curr_cmd) {
+                    wlan_check_ps_cond(pmadapter);
+                }
+            }
+            if (pmadapter->ps_state != PS_STATE_AWAKE ||
+                (pmadapter->tx_lock_flag == MTRUE))
+                break;
+
+            if (pmadapter->scan_processing || pmadapter->data_sent
+                || (wlan_bypass_tx_list_empty(pmadapter) &&
+                    wlan_wmm_lists_empty(pmadapter))
+                ) {
+                if (pmadapter->cmd_sent || pmadapter->curr_cmd ||
+                    (!util_peek_list
+                     (pmadapter->pmoal_handle, &pmadapter->cmd_pending_q,
+                      pcb->moal_spin_lock, pcb->moal_spin_unlock))) {
+                    break;
+                }
+            }
+        }
+
+        /* Check for Rx data */
+        while ((pmbuf =
+                (pmlan_buffer) util_dequeue_list(pmadapter->pmoal_handle,
+                                                 &pmadapter->rx_data_queue,
+                                                 pmadapter->callbacks.
+                                                 moal_spin_lock,
+                                                 pmadapter->callbacks.
+                                                 moal_spin_unlock))) {
+            wlan_handle_rx_packet(pmadapter, pmbuf);
+        }
+
+        /* Check for Cmd Resp */
+        if (pmadapter->cmd_resp_received) {
+            pmadapter->cmd_resp_received = MFALSE;
+            wlan_process_cmdresp(pmadapter);
+
+            /* call moal back when init_fw is done */
+            if (pmadapter->hw_status == WlanHardwareStatusInitdone) {
+                pmadapter->hw_status = WlanHardwareStatusReady;
+                wlan_init_fw_complete(pmadapter);
+            }
+        }
+
+        /* Check for event */
+        if (pmadapter->event_received) {
+            pmadapter->event_received = MFALSE;
+            wlan_process_event(pmadapter);
+        }
+
+        /* Check if we need to confirm Sleep Request received previously */
+        if (pmadapter->ps_state == PS_STATE_PRE_SLEEP) {
+            if (!pmadapter->cmd_sent && !pmadapter->curr_cmd) {
+                wlan_check_ps_cond(pmadapter);
+            }
+        }
+
+        /* 
+         * The ps_state may have been changed during processing of
+         * Sleep Request event.
+         */
+        if ((pmadapter->ps_state == PS_STATE_SLEEP)
+            || (pmadapter->ps_state == PS_STATE_PRE_SLEEP)
+            || (pmadapter->ps_state == PS_STATE_SLEEP_CFM)
+            || (pmadapter->tx_lock_flag == MTRUE)
+            )
+            continue;
+
+        if (!pmadapter->cmd_sent && !pmadapter->curr_cmd) {
+            if (wlan_exec_next_cmd(pmadapter) == MLAN_STATUS_FAILURE) {
+                ret = MLAN_STATUS_FAILURE;
+                break;
+            }
+        }
+
+        if (!pmadapter->scan_processing && !pmadapter->data_sent &&
+            !wlan_bypass_tx_list_empty(pmadapter)) {
+            PRINTM(MINFO, "mlan_send_pkt(): deq(bybass_txq)\n");
+            wlan_process_bypass_tx(pmadapter);
+            if (pmadapter->hs_activated == MTRUE) {
+                pmadapter->is_hs_configured = MFALSE;
+                wlan_host_sleep_activated_event(wlan_get_priv
+                                                (pmadapter, MLAN_BSS_ROLE_ANY),
+                                                MFALSE);
+            }
+        }
+
+        if (!pmadapter->scan_processing && !pmadapter->data_sent &&
+            !wlan_wmm_lists_empty(pmadapter)
+            ) {
+            wlan_wmm_process_tx(pmadapter);
+            if (pmadapter->hs_activated == MTRUE) {
+                pmadapter->is_hs_configured = MFALSE;
+                wlan_host_sleep_activated_event(wlan_get_priv
+                                                (pmadapter, MLAN_BSS_ROLE_ANY),
+                                                MFALSE);
+            }
+        }
+
+#ifdef STA_SUPPORT
+        if (pmadapter->delay_null_pkt && !pmadapter->cmd_sent &&
+            !pmadapter->curr_cmd && !IS_COMMAND_PENDING(pmadapter) &&
+            wlan_bypass_tx_list_empty(pmadapter) &&
+            wlan_wmm_lists_empty(pmadapter)) {
+            if (wlan_send_null_packet
+                (wlan_get_priv(pmadapter, MLAN_BSS_ROLE_STA),
+                 MRVDRV_TxPD_POWER_MGMT_NULL_PACKET |
+                 MRVDRV_TxPD_POWER_MGMT_LAST_PACKET)
+                == MLAN_STATUS_SUCCESS) {
+                pmadapter->delay_null_pkt = MFALSE;
+            }
+            break;
+        }
+#endif
+
+    } while (MTRUE);
+
+    if (IS_CARD_RX_RCVD(pmadapter)) {
+        goto process_start;
+    }
+    pcb->moal_spin_lock(pmadapter->pmoal_handle, pmadapter->pmain_proc_lock);
+    pmadapter->mlan_processing = MFALSE;
+    pcb->moal_spin_unlock(pmadapter->pmoal_handle, pmadapter->pmain_proc_lock);
+
+  exit_main_proc:
+    if (pmadapter->hw_status == WlanHardwareStatusClosing)
+        mlan_shutdown_fw(pmadapter);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Function to send packet
+ *
+ *  @param pmlan_adapter	A pointer to mlan_adapter structure
+ *  @param pmbuf		A pointer to mlan_buffer structure
+ *
+ *  @return			MLAN_STATUS_PENDING
+ */
+mlan_status
+mlan_send_packet(IN t_void * pmlan_adapter, IN pmlan_buffer pmbuf)
+{
+    mlan_status ret = MLAN_STATUS_PENDING;
+    mlan_adapter *pmadapter = (mlan_adapter *) pmlan_adapter;
+
+    ENTER();
+    MASSERT(pmlan_adapter && pmbuf);
+
+    MASSERT(pmbuf->bss_index < pmadapter->priv_num);
+    pmbuf->flags = MLAN_BUF_FLAG_MOAL_TX_BUF;
+    if ((pmadapter->priv[pmbuf->bss_index]->port_ctrl_mode == MTRUE) &&
+        ((mlan_ntohs(*(t_u16 *) & pmbuf->pbuf[pmbuf->data_offset +
+                                              MLAN_ETHER_PKT_TYPE_OFFSET]) ==
+          MLAN_ETHER_PKT_TYPE_EAPOL)
+         ||
+         (mlan_ntohs
+          (*(t_u16 *) & pmbuf->
+           pbuf[pmbuf->data_offset + MLAN_ETHER_PKT_TYPE_OFFSET]) ==
+          MLAN_ETHER_PKT_TYPE_WAPI)
+        )) {
+        PRINTM(MINFO, "mlan_send_pkt(): enq(bybass_txq)\n");
+        wlan_add_buf_bypass_txqueue(pmadapter, pmbuf);
+    } else {
+        /* Transmit the packet */
+        wlan_wmm_add_buf_txqueue(pmadapter, pmbuf);
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief MLAN ioctl handler
+ *
+ *  @param adapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING --success, otherwise fail
+ */
+mlan_status
+mlan_ioctl(IN t_void * adapter, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_adapter pmadapter = (pmlan_adapter) adapter;
+    pmlan_private pmpriv = MNULL;
+
+    ENTER();
+
+    if (pioctl_req == MNULL) {
+        PRINTM(MERROR, "MLAN IOCTL information buffer is NULL\n");
+        ret = MLAN_STATUS_FAILURE;
+        goto exit;
+    }
+    if (pioctl_req->action == MLAN_ACT_CANCEL) {
+        wlan_cancel_pending_ioctl(pmadapter, pioctl_req);
+        ret = MLAN_STATUS_SUCCESS;
+        goto exit;
+    }
+    pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    ret = pmpriv->ops.ioctl(adapter, pioctl_req);
+  exit:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Packet send completion callback
+ *
+ *  @param pmlan_adapter	A pointer to mlan_adapter structure
+ *  @param pmbuf		A pointer to mlan_buffer structure
+ *  @param port			Data port
+ *  @param status		Callback status
+ *
+ *  @return			MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+mlan_write_data_async_complete(IN t_void * pmlan_adapter,
+                               IN pmlan_buffer pmbuf,
+                               IN t_u32 port, IN mlan_status status)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_adapter *pmadapter = (mlan_adapter *) pmlan_adapter;
+
+    ENTER();
+
+    if (status == MLAN_STATUS_SUCCESS &&
+        pmadapter->hb_host_timer_is_set && pmadapter->host_to_dev_traffic <= 1)
+        pmadapter->host_to_dev_traffic++;
+    if (port == MLAN_USB_EP_CMD_EVENT) {
+        pmadapter->cmd_sent = MFALSE;
+        PRINTM(MCMND, "mlan_write_data_async_complete: CMD\n");
+        /* pmbuf was allocated by MLAN */
+        wlan_free_mlan_buffer(pmadapter, pmbuf);
+    } else {
+        ret = wlan_write_data_complete(pmadapter, pmbuf, status);
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Packet receive handler
+ *
+ *  @param pmlan_adapter	A pointer to mlan_adapter structure
+ *  @param pmbuf		A pointer to mlan_buffer structure
+ *  @param port			Data port
+ *
+ *  @return			MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE or MLAN_STATUS_PENDING
+ */
+mlan_status
+mlan_recv(IN t_void * pmlan_adapter, IN pmlan_buffer pmbuf, IN t_u32 port)
+{
+    mlan_status ret = MLAN_STATUS_PENDING;
+    mlan_adapter *pmadapter = (mlan_adapter *) pmlan_adapter;
+    t_u8 *pbuf;
+    t_u32 len, recv_type;
+    t_u32 event_cause;
+    t_u32 sec, usec;
+
+    ENTER();
+
+    MASSERT(pmlan_adapter && pmbuf);
+
+    if (pmadapter->hb_dev_timer_is_set) {
+        pmadapter->hb_dev_counter = 0;
+    }
+    if (pmadapter->hs_activated == MTRUE)
+        wlan_process_hs_config(pmadapter);
+    pbuf = pmbuf->pbuf + pmbuf->data_offset;
+    len = pmbuf->data_len;
+
+    MASSERT(len >= MLAN_TYPE_LEN);
+    recv_type = *(t_u32 *) pbuf;
+    recv_type = wlan_le32_to_cpu(recv_type);
+    pbuf += MLAN_TYPE_LEN;
+    len -= MLAN_TYPE_LEN;
+
+    pmadapter->callbacks.moal_get_system_time(pmadapter->pmoal_handle, &sec,
+                                              &usec);
+
+    switch (port) {
+    case MLAN_USB_EP_CTRL:
+        PRINTM(MINFO, "mlan_recv: CTRL\n");
+        ret = MLAN_STATUS_SUCCESS;
+        break;
+    case MLAN_USB_EP_CMD_EVENT:
+        switch (recv_type) {
+        case MLAN_USB_TYPE_CMD:
+            PRINTM(MCMND, "mlan_recv: CMD (%lu.%06lu)\n", sec, usec);
+            if (len > MRVDRV_SIZE_OF_CMD_BUFFER) {
+                pmbuf->status_code = MLAN_ERROR_CMD_RESP_FAIL;
+                ret = MLAN_STATUS_FAILURE;
+                PRINTM(MERROR, "mlan_recv: CMD too large\n");
+            } else if (!pmadapter->curr_cmd) {
+                if (pmadapter->ps_state == PS_STATE_SLEEP_CFM) {
+                    pmbuf->data_offset += MLAN_TYPE_LEN;
+                    pmbuf->data_len -= MLAN_TYPE_LEN;
+                    wlan_process_sleep_confirm_resp(pmadapter,
+                                                    pmbuf->pbuf +
+                                                    pmbuf->data_offset,
+                                                    pmbuf->data_len);
+                    ret = MLAN_STATUS_SUCCESS;
+
+                } else {
+                    pmbuf->status_code = MLAN_ERROR_CMD_RESP_FAIL;
+                    ret = MLAN_STATUS_FAILURE;
+                }
+                PRINTM(MINFO, "mlan_recv: no curr_cmd\n");
+            } else {
+                pmadapter->upld_len = len;
+                pmbuf->data_offset += MLAN_TYPE_LEN;
+                pmbuf->data_len -= MLAN_TYPE_LEN;
+                pmadapter->curr_cmd->respbuf = pmbuf;
+                pmadapter->cmd_resp_received = MTRUE;
+            }
+            break;
+        case MLAN_USB_TYPE_EVENT:
+            MASSERT(len >= sizeof(t_u32));
+            memmove(pmadapter, &event_cause, pbuf, sizeof(t_u32));
+            pmadapter->event_cause = wlan_le32_to_cpu(event_cause);
+            PRINTM(MEVENT, "mlan_recv: EVENT 0x%x (%lu.%06lu)\n",
+                   pmadapter->event_cause, sec, usec);
+            pbuf += sizeof(t_u32);
+            len -= sizeof(t_u32);
+            if ((len > 0) && (len < MAX_EVENT_SIZE))
+                memmove(pmadapter, pmadapter->event_body, pbuf, len);
+            pmadapter->event_received = MTRUE;
+            pmadapter->pmlan_buffer_event = pmbuf;
+            /* remove 4 byte recv_type */
+            pmbuf->data_offset += MLAN_TYPE_LEN;
+            pmbuf->data_len -= MLAN_TYPE_LEN;
+            /* MOAL to call mlan_main_process for processing */
+            break;
+        default:
+            pmbuf->status_code = MLAN_ERROR_PKT_INVALID;
+            ret = MLAN_STATUS_FAILURE;
+            PRINTM(MERROR, "mlan_recv: unknown recv_type 0x%x\n", recv_type);
+            break;
+        }
+        break;
+    case MLAN_USB_EP_DATA:
+        PRINTM(MDATA, "mlan_recv: DATA (%lu.%06lu)\n", sec, usec);
+        if (len > MLAN_RX_DATA_BUF_SIZE) {
+            pmbuf->status_code = MLAN_ERROR_PKT_SIZE_INVALID;
+            ret = MLAN_STATUS_FAILURE;
+            PRINTM(MERROR, "mlan_recv: DATA too large\n");
+        } else {
+            pmadapter->upld_len = len;
+            pmadapter->callbacks.moal_get_system_time(pmadapter->pmoal_handle,
+                                                      &pmbuf->in_ts_sec,
+                                                      &pmbuf->in_ts_usec);
+            util_enqueue_list_tail(pmadapter->pmoal_handle,
+                                   &pmadapter->rx_data_queue,
+                                   (pmlan_linked_list) pmbuf,
+                                   pmadapter->callbacks.moal_spin_lock,
+                                   pmadapter->callbacks.moal_spin_unlock);
+            pmadapter->data_received = MTRUE;
+        }
+        break;
+    default:
+        pmbuf->status_code = MLAN_ERROR_PKT_INVALID;
+        ret = MLAN_STATUS_FAILURE;
+        PRINTM(MERROR, "mlan_recv: unknown port number 0x%x\n", port);
+        break;
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Packet receive completion callback handler
+ *
+ *  @param pmlan_adapter	A pointer to mlan_adapter structure
+ *  @param pmbuf		A pointer to mlan_buffer structure
+ *  @param status		Callback status
+ *
+ *  @return			MLAN_STATUS_SUCCESS
+ */
+mlan_status
+mlan_recv_packet_complete(IN t_void * pmlan_adapter,
+                          IN pmlan_buffer pmbuf, IN mlan_status status)
+{
+    mlan_adapter *pmadapter = (mlan_adapter *) pmlan_adapter;
+
+    ENTER();
+    wlan_recv_packet_complete(pmadapter, pmbuf, status);
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief select wmm queue
+ *
+ *  @param pmlan_adapter	A pointer to mlan_adapter structure
+ *  @param bss_num		BSS number
+ *  @param tid			TID
+ *
+ *  @return			wmm queue priority (0 - 3)
+ */
+t_u8
+mlan_select_wmm_queue(IN t_void * pmlan_adapter, IN t_u8 bss_num, IN t_u8 tid)
+{
+    mlan_adapter *pmadapter = (mlan_adapter *) pmlan_adapter;
+    pmlan_private pmpriv = pmadapter->priv[bss_num];
+    return wlan_wmm_select_queue(pmpriv, tid);
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_sta_cmd.c linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_sta_cmd.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_sta_cmd.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_sta_cmd.c	2017-09-23 03:42:50.134674710 +0800
@@ -0,0 +1,1744 @@
+/** @file mlan_sta_cmd.c
+ *  
+ *  @brief This file contains the handling of command.
+ *  it prepares command and sends it to firmware when
+ *  it is ready.
+ * 
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ *
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/******************************************************
+Change log:
+    10/21/2008: initial version
+******************************************************/
+
+#include "mlan.h"
+#include "mlan_join.h"
+#include "mlan_util.h"
+#include "mlan_fw.h"
+#include "mlan_main.h"
+#include "mlan_wmm.h"
+#include "mlan_11n.h"
+#include "mlan_11h.h"
+#include "mlan_meas.h"
+
+/********************************************************
+                Local Variables
+********************************************************/
+
+/********************************************************
+                Global Variables
+********************************************************/
+
+/********************************************************
+                Local Functions
+********************************************************/
+
+/** 
+ *  @brief This function prepares command of RSSI info.
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param pcmd         A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action   Command action
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_cmd_802_11_rssi_info(IN pmlan_private pmpriv,
+                          IN HostCmd_DS_COMMAND * pcmd, IN t_u16 cmd_action)
+{
+    ENTER();
+
+    pcmd->command = wlan_cpu_to_le16(HostCmd_CMD_RSSI_INFO);
+    pcmd->size =
+        wlan_cpu_to_le16(sizeof(HostCmd_DS_802_11_RSSI_INFO) + S_DS_GEN);
+    pcmd->params.rssi_info.action = wlan_cpu_to_le16(cmd_action);
+    pcmd->params.rssi_info.ndata = wlan_cpu_to_le16(pmpriv->data_avg_factor);
+    pcmd->params.rssi_info.nbcn = wlan_cpu_to_le16(pmpriv->bcn_avg_factor);
+
+    /* Reset SNR/NF/RSSI values in private structure */
+    pmpriv->data_rssi_last = 0;
+    pmpriv->data_nf_last = 0;
+    pmpriv->data_rssi_avg = 0;
+    pmpriv->data_nf_avg = 0;
+    pmpriv->bcn_rssi_last = 0;
+    pmpriv->bcn_nf_last = 0;
+    pmpriv->bcn_rssi_avg = 0;
+    pmpriv->bcn_nf_avg = 0;
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function prepares command of mac_control.
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param pcmd         A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action   Command action
+ *  @param pdata_buf    A pointer to command information buffer
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_cmd_mac_control(IN pmlan_private pmpriv,
+                     IN HostCmd_DS_COMMAND * pcmd,
+                     IN t_u16 cmd_action, IN t_void * pdata_buf)
+{
+    HostCmd_DS_MAC_CONTROL *pmac = &pcmd->params.mac_ctrl;
+    t_u16 action = *((t_u16 *) pdata_buf);
+
+    ENTER();
+
+    if (cmd_action != HostCmd_ACT_GEN_SET) {
+        PRINTM(MERROR, "wlan_cmd_mac_control(): support SET only.\n");
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+
+    pcmd->command = wlan_cpu_to_le16(HostCmd_CMD_MAC_CONTROL);
+    pcmd->size = wlan_cpu_to_le16(sizeof(HostCmd_DS_MAC_CONTROL) + S_DS_GEN);
+    pmac->action = wlan_cpu_to_le16(action);
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function prepares command of snmp_mib.
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action   The action: GET or SET
+ *  @param cmd_oid      OID: ENABLE or DISABLE
+ *  @param pdata_buf    A pointer to command information buffer
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_cmd_802_11_snmp_mib(IN pmlan_private pmpriv,
+                         IN HostCmd_DS_COMMAND * cmd,
+                         IN t_u16 cmd_action,
+                         IN t_u32 cmd_oid, IN t_void * pdata_buf)
+{
+    HostCmd_DS_802_11_SNMP_MIB *psnmp_mib = &cmd->params.smib;
+    t_u32 ul_temp;
+
+    ENTER();
+    PRINTM(MINFO, "SNMP_CMD: cmd_oid = 0x%x\n", cmd_oid);
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_802_11_SNMP_MIB);
+    cmd->size = sizeof(HostCmd_DS_802_11_SNMP_MIB) - 1 + S_DS_GEN;
+
+    if (cmd_action == HostCmd_ACT_GEN_GET) {
+        psnmp_mib->query_type = wlan_cpu_to_le16(HostCmd_ACT_GEN_GET);
+        psnmp_mib->buf_size = wlan_cpu_to_le16(MAX_SNMP_BUF_SIZE);
+        cmd->size += MAX_SNMP_BUF_SIZE;
+    }
+
+    switch (cmd_oid) {
+    case FragThresh_i:
+        psnmp_mib->oid = wlan_cpu_to_le16((t_u16) FragThresh_i);
+        if (cmd_action == HostCmd_ACT_GEN_SET) {
+            psnmp_mib->query_type = wlan_cpu_to_le16(HostCmd_ACT_GEN_SET);
+            psnmp_mib->buf_size = wlan_cpu_to_le16(sizeof(t_u16));
+            ul_temp = *((t_u32 *) pdata_buf);
+            *((t_u16 *) (psnmp_mib->value)) = wlan_cpu_to_le16((t_u16) ul_temp);
+            cmd->size += sizeof(t_u16);
+        }
+        break;
+    case RtsThresh_i:
+        psnmp_mib->oid = wlan_cpu_to_le16((t_u16) RtsThresh_i);
+        if (cmd_action == HostCmd_ACT_GEN_SET) {
+            psnmp_mib->query_type = wlan_cpu_to_le16(HostCmd_ACT_GEN_SET);
+            psnmp_mib->buf_size = wlan_cpu_to_le16(sizeof(t_u16));
+            ul_temp = *((t_u32 *) pdata_buf);
+            *(t_u16 *) (psnmp_mib->value) = wlan_cpu_to_le16((t_u16) ul_temp);
+            cmd->size += sizeof(t_u16);
+        }
+        break;
+
+    case ShortRetryLim_i:
+        psnmp_mib->oid = wlan_cpu_to_le16((t_u16) ShortRetryLim_i);
+        if (cmd_action == HostCmd_ACT_GEN_SET) {
+            psnmp_mib->query_type = wlan_cpu_to_le16(HostCmd_ACT_GEN_SET);
+            psnmp_mib->buf_size = wlan_cpu_to_le16(sizeof(t_u16));
+            ul_temp = (*(t_u32 *) pdata_buf);
+            *((t_u16 *) (psnmp_mib->value)) = wlan_cpu_to_le16((t_u16) ul_temp);
+            cmd->size += sizeof(t_u16);
+        }
+        break;
+    case Dot11D_i:
+        psnmp_mib->oid = wlan_cpu_to_le16((t_u16) Dot11D_i);
+        if (cmd_action == HostCmd_ACT_GEN_SET) {
+            psnmp_mib->query_type = wlan_cpu_to_le16(HostCmd_ACT_GEN_SET);
+            psnmp_mib->buf_size = wlan_cpu_to_le16(sizeof(t_u16));
+            ul_temp = *(t_u32 *) pdata_buf;
+            *((t_u16 *) (psnmp_mib->value)) = wlan_cpu_to_le16((t_u16) ul_temp);
+            cmd->size += sizeof(t_u16);
+        }
+        break;
+    case Dot11H_i:
+        psnmp_mib->oid = wlan_cpu_to_le16((t_u16) Dot11H_i);
+        if (cmd_action == HostCmd_ACT_GEN_SET) {
+            psnmp_mib->query_type = wlan_cpu_to_le16(HostCmd_ACT_GEN_SET);
+            psnmp_mib->buf_size = wlan_cpu_to_le16(sizeof(t_u16));
+            ul_temp = *(t_u32 *) pdata_buf;
+            *((t_u16 *) (psnmp_mib->value)) = wlan_cpu_to_le16((t_u16) ul_temp);
+            cmd->size += sizeof(t_u16);
+        }
+        break;
+    case WwsMode_i:
+        psnmp_mib->oid = wlan_cpu_to_le16((t_u16) WwsMode_i);
+        if (cmd_action == HostCmd_ACT_GEN_SET) {
+            psnmp_mib->query_type = wlan_cpu_to_le16(HostCmd_ACT_GEN_SET);
+            psnmp_mib->buf_size = wlan_cpu_to_le16(sizeof(t_u16));
+            ul_temp = *((t_u32 *) pdata_buf);
+            *((t_u16 *) (psnmp_mib->value)) = wlan_cpu_to_le16((t_u16) ul_temp);
+            cmd->size += sizeof(t_u16);
+        }
+        break;
+    case Thermal_i:
+        psnmp_mib->oid = wlan_cpu_to_le16((t_u16) Thermal_i);
+        break;
+
+    default:
+        break;
+    }
+    cmd->size = wlan_cpu_to_le16(cmd->size);
+    PRINTM(MINFO, "SNMP_CMD: Action=0x%x, OID=0x%x, OIDSize=0x%x, Value=0x%x\n",
+           cmd_action, cmd_oid, wlan_le16_to_cpu(psnmp_mib->buf_size),
+           wlan_le16_to_cpu(*(t_u16 *) psnmp_mib->value));
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function prepares command of get_log.
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_cmd_802_11_get_log(IN pmlan_private pmpriv, IN HostCmd_DS_COMMAND * cmd)
+{
+    ENTER();
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_802_11_GET_LOG);
+    cmd->size = wlan_cpu_to_le16(sizeof(HostCmd_DS_802_11_GET_LOG) + S_DS_GEN);
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function prepares command of tx_power_cfg.
+ *   
+ *  @param pmpriv      A pointer to mlan_private structure
+ *  @param cmd         A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action  The action: GET or SET
+ *  @param pdata_buf   A pointer to data buffer
+ *
+ *  @return            MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_cmd_tx_power_cfg(IN pmlan_private pmpriv,
+                      IN HostCmd_DS_COMMAND * cmd,
+                      IN t_u16 cmd_action, IN t_void * pdata_buf)
+{
+    MrvlTypes_Power_Group_t *ppg_tlv = MNULL;
+    HostCmd_DS_TXPWR_CFG *ptxp = MNULL;
+    HostCmd_DS_TXPWR_CFG *ptxp_cfg = &cmd->params.txp_cfg;
+
+    ENTER();
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_TXPWR_CFG);
+    cmd->size = wlan_cpu_to_le16(S_DS_GEN + sizeof(HostCmd_DS_TXPWR_CFG));
+    switch (cmd_action) {
+    case HostCmd_ACT_GEN_SET:
+        ptxp = (HostCmd_DS_TXPWR_CFG *) pdata_buf;
+        if (ptxp->mode) {
+            ppg_tlv =
+                (MrvlTypes_Power_Group_t *) ((t_u32) pdata_buf +
+                                             sizeof(HostCmd_DS_TXPWR_CFG));
+            memmove(pmpriv->adapter, ptxp_cfg, pdata_buf,
+                    sizeof(HostCmd_DS_TXPWR_CFG) +
+                    sizeof(MrvlTypes_Power_Group_t) + ppg_tlv->length);
+
+            ppg_tlv = (MrvlTypes_Power_Group_t *) ((t_u8 *) ptxp_cfg +
+                                                   sizeof
+                                                   (HostCmd_DS_TXPWR_CFG));
+            cmd->size +=
+                wlan_cpu_to_le16(sizeof(MrvlTypes_Power_Group_t) +
+                                 ppg_tlv->length);
+            ppg_tlv->type = wlan_cpu_to_le16(ppg_tlv->type);
+            ppg_tlv->length = wlan_cpu_to_le16(ppg_tlv->length);
+        } else {
+            memmove(pmpriv->adapter, ptxp_cfg, pdata_buf,
+                    sizeof(HostCmd_DS_TXPWR_CFG));
+        }
+        ptxp_cfg->action = wlan_cpu_to_le16(cmd_action);
+        ptxp_cfg->cfg_index = wlan_cpu_to_le16(ptxp_cfg->cfg_index);
+        ptxp_cfg->mode = wlan_cpu_to_le32(ptxp_cfg->mode);
+        break;
+    case HostCmd_ACT_GEN_GET:
+        ptxp_cfg->action = wlan_cpu_to_le16(cmd_action);
+        break;
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function prepares command of rf_tx_power.
+ *    
+ *  @param pmpriv     A pointer to wlan_private structure
+ *  @param cmd        A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action the action: GET or SET
+ *  @param pdata_buf  A pointer to data buffer
+ *  @return           MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_cmd_802_11_rf_tx_power(IN pmlan_private pmpriv,
+                            IN HostCmd_DS_COMMAND * cmd,
+                            IN t_u16 cmd_action, IN t_void * pdata_buf)
+{
+
+    HostCmd_DS_802_11_RF_TX_POWER *prtp = &cmd->params.txp;
+
+    ENTER();
+
+    cmd->size = wlan_cpu_to_le16((sizeof(HostCmd_DS_802_11_RF_TX_POWER))
+                                 + S_DS_GEN);
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_802_11_RF_TX_POWER);
+    prtp->action = cmd_action;
+
+    PRINTM(MINFO, "RF_TX_POWER_CMD: Size:%d Cmd:0x%x Act:%d\n",
+           cmd->size, cmd->command, prtp->action);
+
+    switch (cmd_action) {
+    case HostCmd_ACT_GEN_GET:
+        prtp->action = wlan_cpu_to_le16(HostCmd_ACT_GEN_GET);
+        prtp->current_level = 0;
+        break;
+
+    case HostCmd_ACT_GEN_SET:
+        prtp->action = wlan_cpu_to_le16(HostCmd_ACT_GEN_SET);
+        prtp->current_level = wlan_cpu_to_le16(*((t_u16 *) pdata_buf));
+        break;
+    }
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function prepares command of Heart Beat.
+ *  
+ *  @param pmpriv      A pointer to mlan_private structure
+ *  @param cmd         A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action  The action: GET or SET
+ *  @param pdata_buf   A pointer to data buffer
+ *
+ *  @return            MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_cmd_heart_beat(IN pmlan_private pmpriv,
+                    IN HostCmd_DS_COMMAND * cmd,
+                    IN t_u16 cmd_action, IN t_void * pdata_buf)
+{
+    mlan_ds_misc_heart_beat *pdata_heart_beat =
+        (mlan_ds_misc_heart_beat *) pdata_buf;
+    HostCmd_DS_HEART_BEAT *cmd_heart_beat =
+        (HostCmd_DS_HEART_BEAT *) & cmd->params.heart_beat;
+
+    ENTER();
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_HEART_BEAT);
+    cmd->size = wlan_cpu_to_le16(sizeof(HostCmd_DS_HEART_BEAT) + S_DS_GEN);
+    cmd_heart_beat->action = wlan_cpu_to_le16(cmd_action);
+    if (cmd_action == HostCmd_ACT_GEN_SET && pdata_heart_beat) {
+        cmd_heart_beat->h2d_timer =
+            wlan_cpu_to_le16(pdata_heart_beat->h2d_timer);
+        cmd_heart_beat->d2h_timer =
+            wlan_cpu_to_le16(pdata_heart_beat->d2h_timer);
+        cmd_heart_beat->reconnect_delay =
+            wlan_cpu_to_le16(pdata_heart_beat->reconnect_delay);
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ * @brief This function prepares command of hs_cfg.
+ *   
+ * @param pmpriv       A pointer to mlan_private structure
+ * @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ * @param cmd_action   The action: GET or SET
+ * @param pdata_buf    A pointer to data buffer
+ *
+ * @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_cmd_802_11_hs_cfg(IN pmlan_private pmpriv,
+                       IN HostCmd_DS_COMMAND * cmd,
+                       IN t_u16 cmd_action, IN hs_config_param * pdata_buf)
+{
+    pmlan_adapter pmadapter = pmpriv->adapter;
+    HostCmd_DS_802_11_HS_CFG_ENH *phs_cfg = &cmd->params.opt_hs_cfg;
+    t_u16 hs_activate = MFALSE;
+
+    ENTER();
+
+    if (pdata_buf == MNULL) {
+        /* New Activate command */
+        hs_activate = MTRUE;
+    }
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_802_11_HS_CFG_ENH);
+
+    if (!hs_activate && (pdata_buf->conditions != HOST_SLEEP_CFG_CANCEL)
+        && ((pmadapter->arp_filter_size > 0)
+            && (pmadapter->arp_filter_size <= ARP_FILTER_MAX_BUF_SIZE))) {
+        PRINTM(MINFO, "Attach %d bytes ArpFilter to HSCfg cmd\n",
+               pmadapter->arp_filter_size);
+        memcpy(pmpriv->adapter,
+               ((t_u8 *) phs_cfg) + sizeof(HostCmd_DS_802_11_HS_CFG_ENH),
+               pmadapter->arp_filter, pmadapter->arp_filter_size);
+        cmd->size =
+            (t_u16) wlan_cpu_to_le16(pmadapter->arp_filter_size +
+                                     sizeof(HostCmd_DS_802_11_HS_CFG_ENH) +
+                                     S_DS_GEN);
+    } else
+        cmd->size =
+            wlan_cpu_to_le16(S_DS_GEN + sizeof(HostCmd_DS_802_11_HS_CFG_ENH));
+
+    if (hs_activate) {
+        phs_cfg->action = wlan_cpu_to_le16(HS_ACTIVATE);
+        phs_cfg->params.hs_activate.resp_ctrl = wlan_cpu_to_le16(RESP_NEEDED);
+    } else {
+        phs_cfg->action = wlan_cpu_to_le16(HS_CONFIGURE);
+        phs_cfg->params.hs_config.conditions =
+            wlan_cpu_to_le32(pdata_buf->conditions);
+        phs_cfg->params.hs_config.gpio = pdata_buf->gpio;
+        phs_cfg->params.hs_config.gap = pdata_buf->gap;
+        PRINTM(MCMND, "HS_CFG_CMD: condition:0x%x gpio:0x%x gap:0x%x\n",
+               phs_cfg->params.hs_config.conditions,
+               phs_cfg->params.hs_config.gpio, phs_cfg->params.hs_config.gap);
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function prepares command of mac_address.
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action   The action: GET or SET
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_cmd_802_11_mac_address(IN pmlan_private pmpriv,
+                            IN HostCmd_DS_COMMAND * cmd, IN t_u16 cmd_action)
+{
+    ENTER();
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_802_11_MAC_ADDRESS);
+    cmd->size = wlan_cpu_to_le16(sizeof(HostCmd_DS_802_11_MAC_ADDRESS) +
+                                 S_DS_GEN);
+    cmd->result = 0;
+
+    cmd->params.mac_addr.action = wlan_cpu_to_le16(cmd_action);
+
+    if (cmd_action == HostCmd_ACT_GEN_SET) {
+        memcpy(pmpriv->adapter, cmd->params.mac_addr.mac_addr,
+               pmpriv->curr_addr, MLAN_MAC_ADDR_LENGTH);
+        // HEXDUMP("SET_CMD: MAC ADDRESS-", priv->CurrentAddr, 6);
+    }
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ * @brief This function prepares command of sleep_period.
+ *
+ * @param pmpriv       A pointer to mlan_private structure
+ * @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ * @param cmd_action   The action: GET or SET
+ * @param pdata_buf    A pointer to data buffer
+ *
+ * @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_cmd_802_11_sleep_period(IN pmlan_private pmpriv,
+                             IN HostCmd_DS_COMMAND * cmd,
+                             IN t_u16 cmd_action, IN t_u16 * pdata_buf)
+{
+    HostCmd_DS_802_11_SLEEP_PERIOD *pcmd_sleep_pd = &cmd->params.sleep_pd;
+
+    ENTER();
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_802_11_SLEEP_PERIOD);
+    cmd->size =
+        wlan_cpu_to_le16(sizeof(HostCmd_DS_802_11_SLEEP_PERIOD) + S_DS_GEN);
+    if (cmd_action == HostCmd_ACT_GEN_SET) {
+        pcmd_sleep_pd->sleep_pd = wlan_cpu_to_le16(*(t_u16 *) pdata_buf);
+    }
+    pcmd_sleep_pd->action = wlan_cpu_to_le16(cmd_action);
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ * @brief This function prepares command of sleep_params.
+ *
+ * @param pmpriv       A pointer to mlan_private structure
+ * @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ * @param cmd_action   The action: GET or SET
+ * @param pdata_buf    A pointer to data buffer
+ *
+ * @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_cmd_802_11_sleep_params(IN pmlan_private pmpriv,
+                             IN HostCmd_DS_COMMAND * cmd,
+                             IN t_u16 cmd_action, IN t_u16 * pdata_buf)
+{
+    HostCmd_DS_802_11_SLEEP_PARAMS *pcmd_sp = &cmd->params.sleep_param;
+    mlan_ds_sleep_params *psp = (mlan_ds_sleep_params *) pdata_buf;
+
+    ENTER();
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_802_11_SLEEP_PARAMS);
+    cmd->size =
+        wlan_cpu_to_le16(sizeof(HostCmd_DS_802_11_SLEEP_PARAMS) + S_DS_GEN);
+    if (cmd_action == HostCmd_ACT_GEN_SET) {
+        pcmd_sp->reserved = (t_u16) psp->reserved;
+        pcmd_sp->error = (t_u16) psp->error;
+        pcmd_sp->offset = (t_u16) psp->offset;
+        pcmd_sp->stable_time = (t_u16) psp->stable_time;
+        pcmd_sp->cal_control = (t_u8) psp->cal_control;
+        pcmd_sp->external_sleep_clk = (t_u8) psp->ext_sleep_clk;
+
+        pcmd_sp->reserved = wlan_cpu_to_le16(pcmd_sp->reserved);
+        pcmd_sp->error = wlan_cpu_to_le16(pcmd_sp->error);
+        pcmd_sp->offset = wlan_cpu_to_le16(pcmd_sp->offset);
+        pcmd_sp->stable_time = wlan_cpu_to_le16(pcmd_sp->stable_time);
+    }
+    pcmd_sp->action = wlan_cpu_to_le16(cmd_action);
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function prepares command of mac_multicast_adr.
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action   The action: GET or SET
+ *  @param pdata_buf    A pointer to data buffer
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_cmd_mac_multicast_adr(IN pmlan_private pmpriv,
+                           IN HostCmd_DS_COMMAND * cmd,
+                           IN t_u16 cmd_action, IN t_void * pdata_buf)
+{
+    mlan_multicast_list *pmcast_list = (mlan_multicast_list *) pdata_buf;
+    HostCmd_DS_MAC_MULTICAST_ADR *pmc_addr = &cmd->params.mc_addr;
+
+    ENTER();
+    cmd->size =
+        wlan_cpu_to_le16(sizeof(HostCmd_DS_MAC_MULTICAST_ADR) + S_DS_GEN);
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_MAC_MULTICAST_ADR);
+
+    pmc_addr->action = wlan_cpu_to_le16(cmd_action);
+    pmc_addr->num_of_adrs =
+        wlan_cpu_to_le16((t_u16) pmcast_list->num_multicast_addr);
+    memcpy(pmpriv->adapter, pmc_addr->mac_list, pmcast_list->mac_list,
+           pmcast_list->num_multicast_addr * MLAN_MAC_ADDR_LENGTH);
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function prepares command of deauthenticate.
+ *
+ * @param pmpriv       A pointer to mlan_private structure
+ * @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ * @param pdata_buf    A pointer to data buffer
+ *
+ * @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_cmd_802_11_deauthenticate(IN pmlan_private pmpriv,
+                               IN HostCmd_DS_COMMAND * cmd,
+                               IN t_void * pdata_buf)
+{
+    HostCmd_DS_802_11_DEAUTHENTICATE *pdeauth = &cmd->params.deauth;
+
+    ENTER();
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_802_11_DEAUTHENTICATE);
+    cmd->size =
+        wlan_cpu_to_le16(sizeof(HostCmd_DS_802_11_DEAUTHENTICATE) + S_DS_GEN);
+
+    /* Set AP MAC address */
+    memcpy(pmpriv->adapter, pdeauth->mac_addr, (t_u8 *) pdata_buf,
+           MLAN_MAC_ADDR_LENGTH);
+
+    PRINTM(MCMND, "Deauth: %02x:%02x:%02x:%02x:%02x:%02x\n",
+           pdeauth->mac_addr[0], pdeauth->mac_addr[1], pdeauth->mac_addr[2],
+           pdeauth->mac_addr[3], pdeauth->mac_addr[4], pdeauth->mac_addr[5]);
+
+    if (pmpriv->adapter->state_11h.recvd_chanswann_event) {
+/** Reason code 36 = Requested from peer station as it is leaving the BSS */
+#define REASON_CODE_PEER_STA_LEAVING  36
+        pdeauth->reason_code = wlan_cpu_to_le16(REASON_CODE_PEER_STA_LEAVING);
+    } else {
+/** Reason code 3 = Station is leaving */
+#define REASON_CODE_STA_LEAVING 3
+        pdeauth->reason_code = wlan_cpu_to_le16(REASON_CODE_STA_LEAVING);
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function prepares command of ad_hoc_stop.
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_cmd_802_11_ad_hoc_stop(IN pmlan_private pmpriv,
+                            IN HostCmd_DS_COMMAND * cmd)
+{
+    ENTER();
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_802_11_AD_HOC_STOP);
+    cmd->size = wlan_cpu_to_le16(S_DS_GEN);
+
+    if (wlan_11h_is_active(pmpriv))
+        wlan_11h_activate(pmpriv, MNULL, MFALSE);
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** Length of WEP 40 bit key */
+#define WEP_40_BIT_LEN  5
+/** Length of WEP 104 bit key */
+#define WEP_104_BIT_LEN 13
+
+/** 
+ *  @brief This function sets WEP key(s) to key_param_set TLV(s).
+ *  
+ *  @param priv           	A pointer to mlan_private structure
+ *  @param key_param_set    A pointer to MrvlIEtype_KeyParamSet_t structure
+ *  @param key_param_len    A pointer to the length variable
+ *
+ *  @return                 MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_set_keyparamset_wep(mlan_private * priv,
+                         MrvlIEtype_KeyParamSet_t * key_param_set,
+                         t_u16 * key_param_len)
+{
+    int cur_key_param_len = 0;
+    t_u8 i;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    /* Multi-key_param_set TLV is supported */
+    for (i = 0; i < MRVL_NUM_WEP_KEY; i++) {
+        if ((priv->wep_key[i].key_length == WEP_40_BIT_LEN) ||
+            (priv->wep_key[i].key_length == WEP_104_BIT_LEN)) {
+            key_param_set->type = wlan_cpu_to_le16(TLV_TYPE_KEY_MATERIAL);
+/** Key_param_set WEP fixed length */
+#define KEYPARAMSET_WEP_FIXED_LEN 8
+            key_param_set->length =
+                wlan_cpu_to_le16((t_u16)
+                                 (priv->wep_key[i].key_length +
+                                  KEYPARAMSET_WEP_FIXED_LEN));
+            key_param_set->key_type_id = wlan_cpu_to_le16(KEY_TYPE_ID_WEP);
+            key_param_set->key_info = wlan_cpu_to_le16
+                (KEY_INFO_WEP_ENABLED | KEY_INFO_WEP_UNICAST |
+                 KEY_INFO_WEP_MCAST);
+            key_param_set->key_len =
+                (t_u16) wlan_cpu_to_le16(priv->wep_key[i].key_length);
+            /* Set WEP key index */
+            key_param_set->key[0] = i;
+            /* Set default Tx key flag */
+            if (i == (priv->wep_key_curr_index & HostCmd_WEP_KEY_INDEX_MASK))
+                key_param_set->key[1] = 1;
+            else
+                key_param_set->key[1] = 0;
+            memmove(priv->adapter, &key_param_set->key[2],
+                    priv->wep_key[i].key_material, priv->wep_key[i].key_length);
+
+            cur_key_param_len = priv->wep_key[i].key_length +
+                KEYPARAMSET_WEP_FIXED_LEN + sizeof(MrvlIEtypesHeader_t);
+            *key_param_len += (t_u16) cur_key_param_len;
+            key_param_set =
+                (MrvlIEtype_KeyParamSet_t *) ((t_u8 *) key_param_set +
+                                              cur_key_param_len);
+        } else if (!priv->wep_key[i].key_length) {
+            continue;
+        } else {
+            PRINTM(MERROR, "key%d Length = %d is incorrect\n", (i + 1),
+                   priv->wep_key[i].key_length);
+            ret = MLAN_STATUS_FAILURE;
+            goto done;
+        }
+    }
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief This function prepares command of key_material.
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action   The action: GET or SET
+ *  @param cmd_oid      OID: ENABLE or DISABLE
+ *  @param pdata_buf    A pointer to data buffer
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_cmd_802_11_key_material(IN pmlan_private pmpriv,
+                             IN HostCmd_DS_COMMAND * cmd,
+                             IN t_u16 cmd_action,
+                             IN t_u32 cmd_oid, IN t_void * pdata_buf)
+{
+    HostCmd_DS_802_11_KEY_MATERIAL *pkey_material = &cmd->params.key_material;
+    mlan_ds_encrypt_key *pkey = (mlan_ds_encrypt_key *) pdata_buf;
+    t_u16 key_param_len = 0;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    const t_u8 bc_mac[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
+
+    ENTER();
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_802_11_KEY_MATERIAL);
+    pkey_material->action = wlan_cpu_to_le16(cmd_action);
+
+    if (cmd_action == HostCmd_ACT_GEN_GET) {
+        cmd->size = wlan_cpu_to_le16(sizeof(pkey_material->action) + S_DS_GEN);
+        goto done;
+    }
+
+    if (!pkey) {
+        memset(pmpriv->adapter, &pkey_material->key_param_set, 0,
+               (MRVL_NUM_WEP_KEY * sizeof(MrvlIEtype_KeyParamSet_t)));
+        ret =
+            wlan_set_keyparamset_wep(pmpriv, &pkey_material->key_param_set,
+                                     &key_param_len);
+        cmd->size =
+            wlan_cpu_to_le16(key_param_len + sizeof(pkey_material->action) +
+                             S_DS_GEN);
+        goto done;
+    } else
+        memset(pmpriv->adapter, &pkey_material->key_param_set, 0,
+               sizeof(MrvlIEtype_KeyParamSet_t));
+    if (pkey->is_wapi_key) {
+        PRINTM(MINFO, "Set WAPI Key\n");
+        pkey_material->key_param_set.key_type_id =
+            wlan_cpu_to_le16(KEY_TYPE_ID_WAPI);
+        if (cmd_oid == KEY_INFO_ENABLED)
+            pkey_material->key_param_set.key_info =
+                wlan_cpu_to_le16(KEY_INFO_WAPI_ENABLED);
+        else
+            pkey_material->key_param_set.key_info =
+                !(wlan_cpu_to_le16(KEY_INFO_WAPI_ENABLED));
+
+        pkey_material->key_param_set.key[0] = (t_u8) pkey->key_index;
+        if (!pmpriv->sec_info.wapi_key_on)
+            pkey_material->key_param_set.key[1] = 1;
+        else
+            pkey_material->key_param_set.key[1] = 0;    /* set 0 when re-key */
+
+        if (0 != memcmp(pmpriv->adapter, pkey->mac_addr, bc_mac, sizeof(bc_mac)))       /* WAPI 
+                                                                                           pairwise 
+                                                                                           key: 
+                                                                                           unicast 
+                                                                                         */
+            pkey_material->key_param_set.key_info |=
+                wlan_cpu_to_le16(KEY_INFO_WAPI_UNICAST);
+        else {                  /* WAPI group key: multicast */
+            pkey_material->key_param_set.key_info |=
+                wlan_cpu_to_le16(KEY_INFO_WAPI_MCAST);
+            pmpriv->sec_info.wapi_key_on = MTRUE;
+        }
+
+        pkey_material->key_param_set.type =
+            wlan_cpu_to_le16(TLV_TYPE_KEY_MATERIAL);
+        pkey_material->key_param_set.key_len = wlan_cpu_to_le16(WAPI_KEY_LEN);
+        memcpy(pmpriv->adapter, &pkey_material->key_param_set.key[2],
+               pkey->key_material, pkey->key_len);
+        memcpy(pmpriv->adapter,
+               &pkey_material->key_param_set.key[2 + pkey->key_len], pkey->pn,
+               PN_SIZE);
+        pkey_material->key_param_set.length =
+            wlan_cpu_to_le16(WAPI_KEY_LEN + KEYPARAMSET_FIXED_LEN);
+
+        key_param_len =
+            (WAPI_KEY_LEN + KEYPARAMSET_FIXED_LEN) +
+            sizeof(MrvlIEtypesHeader_t);
+        cmd->size =
+            wlan_cpu_to_le16(key_param_len + sizeof(pkey_material->action) +
+                             S_DS_GEN);
+        goto done;
+    }
+    if (pkey->key_len == WPA_AES_KEY_LEN) {
+        PRINTM(MCMND, "WPA_AES\n");
+        pkey_material->key_param_set.key_type_id =
+            wlan_cpu_to_le16(KEY_TYPE_ID_AES);
+        if (cmd_oid == KEY_INFO_ENABLED)
+            pkey_material->key_param_set.key_info =
+                wlan_cpu_to_le16(KEY_INFO_AES_ENABLED);
+        else
+            pkey_material->key_param_set.key_info =
+                !(wlan_cpu_to_le16(KEY_INFO_AES_ENABLED));
+
+        if (pkey->key_index & MLAN_KEY_INDEX_UNICAST)   /* AES pairwise key:
+                                                           unicast */
+            pkey_material->key_param_set.key_info |=
+                wlan_cpu_to_le16(KEY_INFO_AES_UNICAST);
+        else                    /* AES group key: multicast */
+            pkey_material->key_param_set.key_info |=
+                wlan_cpu_to_le16(KEY_INFO_AES_MCAST);
+    } else if (pkey->key_len == WPA_TKIP_KEY_LEN) {
+        PRINTM(MCMND, "WPA_TKIP\n");
+        pkey_material->key_param_set.key_type_id =
+            wlan_cpu_to_le16(KEY_TYPE_ID_TKIP);
+        pkey_material->key_param_set.key_info =
+            wlan_cpu_to_le16(KEY_INFO_TKIP_ENABLED);
+
+        if (pkey->key_index & MLAN_KEY_INDEX_UNICAST)   /* TKIP pairwise key:
+                                                           unicast */
+            pkey_material->key_param_set.key_info |=
+                wlan_cpu_to_le16(KEY_INFO_TKIP_UNICAST);
+        else                    /* TKIP group key: multicast */
+            pkey_material->key_param_set.key_info |=
+                wlan_cpu_to_le16(KEY_INFO_TKIP_MCAST);
+    }
+
+    if (pkey_material->key_param_set.key_type_id) {
+        pkey_material->key_param_set.type =
+            wlan_cpu_to_le16(TLV_TYPE_KEY_MATERIAL);
+        pkey_material->key_param_set.key_len =
+            wlan_cpu_to_le16((t_u16) pkey->key_len);
+        memcpy(pmpriv->adapter, pkey_material->key_param_set.key,
+               pkey->key_material, pkey->key_len);
+        pkey_material->key_param_set.length =
+            wlan_cpu_to_le16((t_u16) pkey->key_len + KEYPARAMSET_FIXED_LEN);
+
+        key_param_len =
+            (t_u16) (pkey->key_len + KEYPARAMSET_FIXED_LEN) +
+            sizeof(MrvlIEtypesHeader_t);
+
+        cmd->size =
+            wlan_cpu_to_le16(key_param_len + sizeof(pkey_material->action) +
+                             S_DS_GEN);
+    }
+  done:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief This function prepares command of supplicant pmk
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action   The action: GET or SET
+ *  @param pdata_buf    A pointer to data buffer
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_cmd_802_11_supplicant_pmk(IN pmlan_private pmpriv,
+                               IN HostCmd_DS_COMMAND * cmd,
+                               IN t_u16 cmd_action, IN t_void * pdata_buf)
+{
+    MrvlIEtypes_PMK_t *ppmk_tlv = MNULL;
+    MrvlIEtypes_Passphrase_t *ppassphrase_tlv = MNULL;
+    MrvlIEtypes_SsIdParamSet_t *pssid_tlv = MNULL;
+    MrvlIEtypes_Bssid_t *pbssid_tlv = MNULL;
+    HostCmd_DS_802_11_SUPPLICANT_PMK *pesupplicant_psk =
+        &cmd->params.esupplicant_psk;
+    t_u8 *ptlv_buffer = (t_u8 *) pesupplicant_psk->tlv_buffer;
+    mlan_ds_passphrase *psk = (mlan_ds_passphrase *) pdata_buf;
+    t_u8 zero_mac[] = { 0, 0, 0, 0, 0, 0 };
+
+    ENTER();
+    /* 
+     * Parse the rest of the buf here
+     *      1)  <ssid="valid ssid"> - This will get the passphrase, AKMP 
+     *          for specified ssid, if none specified then it will get all.
+     *          Eg: iwpriv <mlanX> passphrase 0:ssid=marvell
+     *      2)  <psk="psk">:<passphrase="passphare">:<bssid="00:50:43:ef:23:f3">
+     *          <ssid="valid ssid"> - passphrase and psk cannot be provided to  
+     *          the same SSID, Takes one SSID at a time, If ssid= is present 
+     *          the it should contain a passphrase or psk. If no arguments are
+     *          provided then AKMP=802.1x, and passphrase should be provided
+     *          after association.
+     *          End of each parameter should be followed by a ':'(except for the
+     *          last parameter) as the delimiter. If ':' has to be used in 
+     *          an SSID then a '/' should be preceded to ':' as a escape.
+     *          Eg:iwpriv <mlanX> passphrase 
+     *                    "1:ssid=mrvl AP:psk=abcdefgh:bssid=00:50:43:ef:23:f3"
+     *          iwpriv <mlanX> passphrase 
+     *                 "1:ssid=mrvl/: AP:psk=abcdefgd:bssid=00:50:43:ef:23:f3"
+     *          iwpriv <mlanX> passphrase "1:ssid=mrvlAP:psk=abcdefgd"
+     *      3)  <ssid="valid ssid"> - This will clear the passphrase 
+     *          for specified ssid, if none specified then it will clear all.
+     *          Eg: iwpriv <mlanX> passphrase 2:ssid=marvell
+     */
+
+    /* -1 is for t_u8 TlvBuffer[1] as this should not be included */
+    cmd->size = sizeof(HostCmd_DS_802_11_SUPPLICANT_PMK) + S_DS_GEN - 1;
+    if (psk->ssid.ssid_len) {
+        pssid_tlv = (MrvlIEtypes_SsIdParamSet_t *) ptlv_buffer;
+        pssid_tlv->header.type = wlan_cpu_to_le16(TLV_TYPE_SSID);
+        pssid_tlv->header.len = (t_u16) psk->ssid.ssid_len;
+        memcpy(pmpriv->adapter, (char *) pssid_tlv->ssid, psk->ssid.ssid,
+               psk->ssid.ssid_len);
+        ptlv_buffer += (pssid_tlv->header.len + sizeof(MrvlIEtypesHeader_t));
+        cmd->size += (pssid_tlv->header.len + sizeof(MrvlIEtypesHeader_t));
+        pssid_tlv->header.len = wlan_cpu_to_le16(pssid_tlv->header.len);
+    }
+    if (memcmp
+        (pmpriv->adapter, (t_u8 *) & psk->bssid, zero_mac, sizeof(zero_mac))) {
+        pbssid_tlv = (MrvlIEtypes_Bssid_t *) ptlv_buffer;
+        pbssid_tlv->header.type = wlan_cpu_to_le16(TLV_TYPE_BSSID);
+        pbssid_tlv->header.len = MLAN_MAC_ADDR_LENGTH;
+        memcpy(pmpriv->adapter, pbssid_tlv->bssid, (t_u8 *) & psk->bssid,
+               MLAN_MAC_ADDR_LENGTH);
+        ptlv_buffer += (pbssid_tlv->header.len + sizeof(MrvlIEtypesHeader_t));
+        cmd->size += (pbssid_tlv->header.len + sizeof(MrvlIEtypesHeader_t));
+        pbssid_tlv->header.len = wlan_cpu_to_le16(pbssid_tlv->header.len);
+    }
+    if (psk->psk_type == MLAN_PSK_PASSPHRASE) {
+        ppassphrase_tlv = (MrvlIEtypes_Passphrase_t *) ptlv_buffer;
+        ppassphrase_tlv->header.type = wlan_cpu_to_le16(TLV_TYPE_PASSPHRASE);
+        ppassphrase_tlv->header.len =
+            (t_u16) psk->psk.passphrase.passphrase_len;
+        memcpy(pmpriv->adapter, ppassphrase_tlv->passphrase,
+               psk->psk.passphrase.passphrase,
+               psk->psk.passphrase.passphrase_len);
+        ptlv_buffer +=
+            (ppassphrase_tlv->header.len + sizeof(MrvlIEtypesHeader_t));
+        cmd->size +=
+            (ppassphrase_tlv->header.len + sizeof(MrvlIEtypesHeader_t));
+        ppassphrase_tlv->header.len =
+            wlan_cpu_to_le16(ppassphrase_tlv->header.len);
+    }
+    if (psk->psk_type == MLAN_PSK_PMK) {
+        ppmk_tlv = (MrvlIEtypes_PMK_t *) ptlv_buffer;
+        ppmk_tlv->header.type = wlan_cpu_to_le16(TLV_TYPE_PMK);
+        ppmk_tlv->header.len = MLAN_MAX_KEY_LENGTH;
+        memcpy(pmpriv->adapter, ppmk_tlv->pmk, psk->psk.pmk.pmk,
+               MLAN_MAX_KEY_LENGTH);
+        ptlv_buffer += (ppmk_tlv->header.len + sizeof(MrvlIEtypesHeader_t));
+        cmd->size += (ppmk_tlv->header.len + sizeof(MrvlIEtypesHeader_t));
+        ppmk_tlv->header.len = wlan_cpu_to_le16(ppmk_tlv->header.len);
+    }
+    if ((cmd_action == HostCmd_ACT_GEN_SET) &&
+        ((pssid_tlv || pbssid_tlv) && (!ppmk_tlv && !ppassphrase_tlv))) {
+        PRINTM(MERROR,
+               "Invalid case,ssid/bssid present without pmk or passphrase\n");
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_SUPPLICANT_PMK);
+    pesupplicant_psk->action = wlan_cpu_to_le16(cmd_action);
+    pesupplicant_psk->cache_result = 0;
+    cmd->size = wlan_cpu_to_le16(cmd->size);
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief Handle the supplicant profile command
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action   The action: GET or SET
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_cmd_802_11_supplicant_profile(IN pmlan_private pmpriv,
+                                   IN HostCmd_DS_COMMAND * cmd,
+                                   IN t_u16 cmd_action)
+{
+    HostCmd_DS_802_11_SUPPLICANT_PROFILE *sup_profile =
+        &cmd->params.esupplicant_profile;
+
+    ENTER();
+
+    cmd->size =
+        wlan_cpu_to_le16(sizeof(HostCmd_DS_802_11_SUPPLICANT_PROFILE) +
+                         S_DS_GEN - 1);
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_SUPPLICANT_PROFILE);
+    sup_profile->action = wlan_cpu_to_le16(cmd_action);
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function prepares command of rf_channel.
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action   The action: GET or SET
+ *  @param pdata_buf    A pointer to data buffer
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_cmd_802_11_rf_channel(IN pmlan_private pmpriv,
+                           IN HostCmd_DS_COMMAND * cmd,
+                           IN t_u16 cmd_action, IN t_void * pdata_buf)
+{
+    HostCmd_DS_802_11_RF_CHANNEL *prf_chan = &cmd->params.rf_channel;
+
+    ENTER();
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_802_11_RF_CHANNEL);
+    cmd->size = wlan_cpu_to_le16(sizeof(HostCmd_DS_802_11_RF_CHANNEL)
+                                 + S_DS_GEN);
+
+    if (cmd_action == HostCmd_ACT_GEN_SET) {
+        if ((pmpriv->adapter->adhoc_start_band & BAND_A)
+            || (pmpriv->adapter->adhoc_start_band & BAND_AN)
+            )
+            prf_chan->rf_type = HostCmd_SCAN_RADIO_TYPE_A;
+        SET_SECONDARYCHAN(prf_chan->rf_type, pmpriv->adapter->chan_offset);
+        prf_chan->rf_type = wlan_cpu_to_le16(prf_chan->rf_type);
+        prf_chan->current_channel = wlan_cpu_to_le16(*((t_u16 *) pdata_buf));
+    }
+    prf_chan->action = wlan_cpu_to_le16(cmd_action);
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function prepares command of rf_antenna.
+ *  
+ *  @param pmpriv   A pointer to mlan_private structure
+ *  @param cmd      A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action   The action: GET or SET
+ *  @param pdata_buf    A pointer to data buffer
+ *
+ *  @return         MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_cmd_802_11_rf_antenna(IN pmlan_private pmpriv,
+                           IN HostCmd_DS_COMMAND * cmd,
+                           IN t_u16 cmd_action, IN t_void * pdata_buf)
+{
+    HostCmd_DS_802_11_RF_ANTENNA *pantenna = &cmd->params.antenna;
+
+    ENTER();
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_802_11_RF_ANTENNA);
+    cmd->size =
+        wlan_cpu_to_le16(sizeof(HostCmd_DS_802_11_RF_ANTENNA) + S_DS_GEN);
+
+    if (cmd_action == HostCmd_ACT_GEN_SET) {
+        pantenna->action = wlan_cpu_to_le16(HostCmd_ACT_SET_BOTH);
+        pantenna->antenna_mode = wlan_cpu_to_le16(*(t_u16 *) pdata_buf);
+    } else
+        pantenna->action = wlan_cpu_to_le16(HostCmd_ACT_GET_BOTH);
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function prepares command of ibss_coalescing_status.
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action   The action: GET or SET
+ *  @param pdata_buf    A pointer to data buffer or MNULL
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_cmd_ibss_coalescing_status(IN pmlan_private pmpriv,
+                                IN HostCmd_DS_COMMAND * cmd,
+                                IN t_u16 cmd_action, IN t_void * pdata_buf)
+{
+    HostCmd_DS_802_11_IBSS_STATUS *pibss_coal = &(cmd->params.ibss_coalescing);
+    t_u16 enable = 0;
+
+    ENTER();
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_802_11_IBSS_COALESCING_STATUS);
+    cmd->size =
+        wlan_cpu_to_le16(sizeof(HostCmd_DS_802_11_IBSS_STATUS) + S_DS_GEN);
+    cmd->result = 0;
+    pibss_coal->action = wlan_cpu_to_le16(cmd_action);
+
+    switch (cmd_action) {
+    case HostCmd_ACT_GEN_SET:
+        if (pdata_buf != MNULL)
+            enable = *(t_u16 *) pdata_buf;
+        pibss_coal->enable = wlan_cpu_to_le16(enable);
+        break;
+
+        /* In other case.. Nothing to do */
+    case HostCmd_ACT_GEN_GET:
+    default:
+        break;
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function prepares command of mgmt IE list.
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action   The action: GET or SET
+ *  @param pdata_buf	A pointer to data buffer
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_cmd_mgmt_ie_list(IN pmlan_private pmpriv,
+                      IN HostCmd_DS_COMMAND * cmd,
+                      IN t_u16 cmd_action, IN t_void * pdata_buf)
+{
+    t_u16 req_len = 0, travel_len = 0;
+    custom_ie *cptr = MNULL;
+    mlan_ds_misc_custom_ie *cust_ie = MNULL;
+    HostCmd_DS_MGMT_IE_LIST_CFG *pmgmt_ie_list = &(cmd->params.mgmt_ie_list);
+
+    ENTER();
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_MGMT_IE_LIST);
+    cmd->size = sizeof(HostCmd_DS_MGMT_IE_LIST_CFG) + S_DS_GEN;
+    cmd->result = 0;
+    pmgmt_ie_list->action = wlan_cpu_to_le16(cmd_action);
+
+    cust_ie = (mlan_ds_misc_custom_ie *) pdata_buf;
+    pmgmt_ie_list->ds_mgmt_ie.type = wlan_cpu_to_le16(cust_ie->type);
+    pmgmt_ie_list->ds_mgmt_ie.len = wlan_cpu_to_le16(cust_ie->len);
+
+    if (pmgmt_ie_list->ds_mgmt_ie.ie_data_list && cust_ie->ie_data_list) {
+        req_len = cust_ie->len;
+        travel_len = 0;
+        /* conversion for index, mask, len */
+        if (req_len == sizeof(t_u16))
+            cust_ie->ie_data_list[0].ie_index =
+                wlan_cpu_to_le16(cust_ie->ie_data_list[0].ie_index);
+
+        while (req_len > sizeof(t_u16)) {
+            cptr =
+                (custom_ie *) (((t_u8 *) cust_ie->ie_data_list) + travel_len);
+            travel_len += cptr->ie_length + sizeof(custom_ie) - MAX_IE_SIZE;
+            req_len -= cptr->ie_length + sizeof(custom_ie) - MAX_IE_SIZE;
+            cptr->ie_index = wlan_cpu_to_le16(cptr->ie_index);
+            cptr->mgmt_subtype_mask = wlan_cpu_to_le16(cptr->mgmt_subtype_mask);
+            cptr->ie_length = wlan_cpu_to_le16(cptr->ie_length);
+        }
+        if (cust_ie->len)
+            memcpy(pmpriv->adapter, pmgmt_ie_list->ds_mgmt_ie.ie_data_list,
+                   cust_ie->ie_data_list, cust_ie->len);
+    }
+
+    cmd->size -= MAX_MGMT_IE_INDEX * sizeof(custom_ie);
+    cmd->size += cust_ie->len;
+    cmd->size = wlan_cpu_to_le16(cmd->size);
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function prepares system clock cfg command
+ *  
+ *  @param pmpriv    	A pointer to mlan_private structure
+ *  @param cmd	   	A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action 	The action: GET or SET
+ *  @param pdata_buf 	A pointer to data buffer
+ *  @return 	   	MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_cmd_sysclock_cfg(IN pmlan_private pmpriv,
+                      IN HostCmd_DS_COMMAND * cmd,
+                      IN t_u16 cmd_action, IN t_void * pdata_buf)
+{
+    HostCmd_DS_ECL_SYSTEM_CLOCK_CONFIG *cfg = &cmd->params.sys_clock_cfg;
+    mlan_ds_misc_sys_clock *clk_cfg = (mlan_ds_misc_sys_clock *) pdata_buf;
+    int i = 0;
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_ECL_SYSTEM_CLOCK_CONFIG);
+    cmd->size =
+        wlan_cpu_to_le16(sizeof(HostCmd_DS_ECL_SYSTEM_CLOCK_CONFIG) + S_DS_GEN);
+
+    cfg->action = wlan_cpu_to_le16(cmd_action);
+    cfg->cur_sys_clk = wlan_cpu_to_le16(clk_cfg->cur_sys_clk);
+    cfg->sys_clk_type = wlan_cpu_to_le16(clk_cfg->sys_clk_type);
+    cfg->sys_clk_len = wlan_cpu_to_le16(clk_cfg->sys_clk_num) * sizeof(t_u16);
+    for (i = 0; i < clk_cfg->sys_clk_num; i++)
+        cfg->sys_clk[i] = wlan_cpu_to_le16(clk_cfg->sys_clk[i]);
+
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function prepares command of reg_access.
+ *  
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action   the action: GET or SET
+ *  @param pdata_buf    A pointer to data buffer
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_cmd_reg_access(IN HostCmd_DS_COMMAND * cmd,
+                    IN t_u16 cmd_action, IN t_void * pdata_buf)
+{
+    mlan_ds_reg_rw *reg_rw;
+
+    ENTER();
+
+    reg_rw = (mlan_ds_reg_rw *) pdata_buf;
+    switch (cmd->command) {
+    case HostCmd_CMD_MAC_REG_ACCESS:
+        {
+            HostCmd_DS_MAC_REG_ACCESS *mac_reg;
+            cmd->size =
+                wlan_cpu_to_le16(sizeof(HostCmd_DS_MAC_REG_ACCESS) + S_DS_GEN);
+            mac_reg = (HostCmd_DS_MAC_REG_ACCESS *) & cmd->params.mac_reg;
+            mac_reg->action = wlan_cpu_to_le16(cmd_action);
+            mac_reg->offset = wlan_cpu_to_le16((t_u16) reg_rw->offset);
+            mac_reg->value = wlan_cpu_to_le32(reg_rw->value);
+            break;
+        }
+    case HostCmd_CMD_BBP_REG_ACCESS:
+        {
+            HostCmd_DS_BBP_REG_ACCESS *bbp_reg;
+            cmd->size =
+                wlan_cpu_to_le16(sizeof(HostCmd_DS_BBP_REG_ACCESS) + S_DS_GEN);
+            bbp_reg = (HostCmd_DS_BBP_REG_ACCESS *) & cmd->params.bbp_reg;
+            bbp_reg->action = wlan_cpu_to_le16(cmd_action);
+            bbp_reg->offset = wlan_cpu_to_le16((t_u16) reg_rw->offset);
+            bbp_reg->value = (t_u8) reg_rw->value;
+            break;
+        }
+    case HostCmd_CMD_RF_REG_ACCESS:
+        {
+            HostCmd_DS_RF_REG_ACCESS *rf_reg;
+            cmd->size =
+                wlan_cpu_to_le16(sizeof(HostCmd_DS_RF_REG_ACCESS) + S_DS_GEN);
+            rf_reg = (HostCmd_DS_RF_REG_ACCESS *) & cmd->params.rf_reg;
+            rf_reg->action = wlan_cpu_to_le16(cmd_action);
+            rf_reg->offset = wlan_cpu_to_le16((t_u16) reg_rw->offset);
+            rf_reg->value = (t_u8) reg_rw->value;
+            break;
+        }
+    case HostCmd_CMD_PMIC_REG_ACCESS:
+        {
+            HostCmd_DS_PMIC_REG_ACCESS *pmic_reg;
+            cmd->size =
+                wlan_cpu_to_le16(sizeof(HostCmd_DS_PMIC_REG_ACCESS) + S_DS_GEN);
+            pmic_reg = (HostCmd_DS_PMIC_REG_ACCESS *) & cmd->params.pmic_reg;
+            pmic_reg->action = wlan_cpu_to_le16(cmd_action);
+            pmic_reg->offset = wlan_cpu_to_le16((t_u16) reg_rw->offset);
+            pmic_reg->value = (t_u8) reg_rw->value;
+            break;
+        }
+    case HostCmd_CMD_CAU_REG_ACCESS:
+        {
+            HostCmd_DS_RF_REG_ACCESS *cau_reg;
+            cmd->size =
+                wlan_cpu_to_le16(sizeof(HostCmd_DS_RF_REG_ACCESS) + S_DS_GEN);
+            cau_reg = (HostCmd_DS_RF_REG_ACCESS *) & cmd->params.rf_reg;
+            cau_reg->action = wlan_cpu_to_le16(cmd_action);
+            cau_reg->offset = wlan_cpu_to_le16((t_u16) reg_rw->offset);
+            cau_reg->value = (t_u8) reg_rw->value;
+            break;
+        }
+    case HostCmd_CMD_802_11_EEPROM_ACCESS:
+        {
+            mlan_ds_read_eeprom *rd_eeprom = (mlan_ds_read_eeprom *) pdata_buf;
+            HostCmd_DS_802_11_EEPROM_ACCESS *cmd_eeprom =
+                (HostCmd_DS_802_11_EEPROM_ACCESS *) & cmd->params.eeprom;
+            cmd->size =
+                wlan_cpu_to_le16(sizeof(HostCmd_DS_802_11_EEPROM_ACCESS) +
+                                 S_DS_GEN);
+            cmd_eeprom->action = wlan_cpu_to_le16(cmd_action);
+            cmd_eeprom->offset = wlan_cpu_to_le16(rd_eeprom->offset);
+            cmd_eeprom->byte_count = wlan_cpu_to_le16(rd_eeprom->byte_count);
+            cmd_eeprom->value = 0;
+            break;
+        }
+    default:
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+    cmd->command = wlan_cpu_to_le16(cmd->command);
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function prepares command of mem_access.
+ *  
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action   the action: GET or SET
+ *  @param pdata_buf    A pointer to data buffer
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_cmd_mem_access(IN HostCmd_DS_COMMAND * cmd,
+                    IN t_u16 cmd_action, IN t_void * pdata_buf)
+{
+    mlan_ds_mem_rw *mem_rw = (mlan_ds_mem_rw *) pdata_buf;
+    HostCmd_DS_MEM_ACCESS *mem_access =
+        (HostCmd_DS_MEM_ACCESS *) & cmd->params.mem;
+
+    ENTER();
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_MEM_ACCESS);
+    cmd->size = wlan_cpu_to_le16(sizeof(HostCmd_DS_MEM_ACCESS) + S_DS_GEN);
+
+    mem_access->action = wlan_cpu_to_le16(cmd_action);
+    mem_access->addr = wlan_cpu_to_le32(mem_rw->addr);
+    mem_access->value = wlan_cpu_to_le32(mem_rw->value);
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function prepares inactivity timeout command
+ *  
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action   the action: GET or SET
+ *  @param pdata_buf    A pointer to data buffer
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_cmd_inactivity_timeout(IN HostCmd_DS_COMMAND * cmd,
+                            IN t_u16 cmd_action, IN t_void * pdata_buf)
+{
+    pmlan_ds_inactivity_to inac_to;
+    HostCmd_DS_INACTIVITY_TIMEOUT_EXT *cmd_inac_to = &cmd->params.inactivity_to;
+
+    ENTER();
+
+    inac_to = (mlan_ds_inactivity_to *) pdata_buf;
+
+    cmd->size =
+        wlan_cpu_to_le16(sizeof(HostCmd_DS_INACTIVITY_TIMEOUT_EXT) + S_DS_GEN);
+    cmd->command = wlan_cpu_to_le16(cmd->command);
+    cmd_inac_to->action = wlan_cpu_to_le16(cmd_action);
+    if (cmd_action == HostCmd_ACT_GEN_SET) {
+        cmd_inac_to->timeout_unit =
+            wlan_cpu_to_le16((t_u16) inac_to->timeout_unit);
+        cmd_inac_to->unicast_timeout =
+            wlan_cpu_to_le16((t_u16) inac_to->unicast_timeout);
+        cmd_inac_to->mcast_timeout =
+            wlan_cpu_to_le16((t_u16) inac_to->mcast_timeout);
+        cmd_inac_to->ps_entry_timeout =
+            wlan_cpu_to_le16((t_u16) inac_to->ps_entry_timeout);
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/********************************************************
+                Global Functions
+********************************************************/
+
+/** 
+ *  @brief This function prepare the command before sending to firmware.
+ *  
+ *  @param priv       A pointer to mlan_private structure
+ *  @param cmd_no       Command number
+ *  @param cmd_action   Command action: GET or SET
+ *  @param cmd_oid      Cmd oid: treated as sub command
+ *  @param pioctl_buf   A pointer to MLAN IOCTL Request buffer
+ *  @param pdata_buf    A pointer to information buffer
+ *  @param pcmd_buf      A pointer to cmd buf
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_ops_sta_prepare_cmd(IN t_void * priv,
+                         IN t_u16 cmd_no,
+                         IN t_u16 cmd_action,
+                         IN t_u32 cmd_oid,
+                         IN t_void * pioctl_buf,
+                         IN t_void * pdata_buf, IN t_void * pcmd_buf)
+{
+    HostCmd_DS_COMMAND *cmd_ptr = (HostCmd_DS_COMMAND *) pcmd_buf;
+    mlan_private *pmpriv = (mlan_private *) priv;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    /* Prepare command */
+    switch (cmd_no) {
+    case HostCmd_CMD_GET_HW_SPEC:
+        ret = wlan_cmd_get_hw_spec(pmpriv, cmd_ptr);
+        break;
+    case HostCmd_CMD_CFG_DATA:
+        ret = wlan_cmd_cfg_data(pmpriv, cmd_ptr, cmd_action, pdata_buf);
+        break;
+    case HostCmd_CMD_MAC_CONTROL:
+        ret = wlan_cmd_mac_control(pmpriv, cmd_ptr, cmd_action, pdata_buf);
+        break;
+    case HostCmd_CMD_802_11_MAC_ADDRESS:
+        ret = wlan_cmd_802_11_mac_address(pmpriv, cmd_ptr, cmd_action);
+        break;
+    case HostCmd_CMD_MAC_MULTICAST_ADR:
+        ret =
+            wlan_cmd_mac_multicast_adr(pmpriv, cmd_ptr, cmd_action, pdata_buf);
+        break;
+    case HostCmd_CMD_TX_RATE_CFG:
+        ret = wlan_cmd_tx_rate_cfg(pmpriv, cmd_ptr, cmd_action, pdata_buf);
+        break;
+    case HostCmd_CMD_802_11_RF_ANTENNA:
+        ret =
+            wlan_cmd_802_11_rf_antenna(pmpriv, cmd_ptr, cmd_action, pdata_buf);
+        break;
+    case HostCmd_CMD_TXPWR_CFG:
+        ret = wlan_cmd_tx_power_cfg(pmpriv, cmd_ptr, cmd_action, pdata_buf);
+        break;
+    case HostCmd_CMD_802_11_RF_TX_POWER:
+        ret = wlan_cmd_802_11_rf_tx_power(pmpriv, cmd_ptr,
+                                          cmd_action, pdata_buf);
+        break;
+    case HostCmd_CMD_802_11_PS_MODE_ENH:
+        ret =
+            wlan_cmd_enh_power_mode(pmpriv, cmd_ptr, cmd_action,
+                                    (t_u16) cmd_oid, pdata_buf);
+        break;
+    case HostCmd_CMD_802_11_HS_CFG_ENH:
+        ret =
+            wlan_cmd_802_11_hs_cfg(pmpriv, cmd_ptr, cmd_action,
+                                   (hs_config_param *) pdata_buf);
+        break;
+    case HostCmd_CMD_802_11_SLEEP_PERIOD:
+        ret = wlan_cmd_802_11_sleep_period(pmpriv, cmd_ptr,
+                                           cmd_action, (t_u16 *) pdata_buf);
+        break;
+    case HostCmd_CMD_802_11_SLEEP_PARAMS:
+        ret = wlan_cmd_802_11_sleep_params(pmpriv, cmd_ptr,
+                                           cmd_action, (t_u16 *) pdata_buf);
+        break;
+    case HostCmd_CMD_802_11_SCAN:
+        ret = wlan_cmd_802_11_scan(pmpriv, cmd_ptr, pdata_buf);
+        break;
+    case HostCmd_CMD_802_11_ASSOCIATE:
+        ret = wlan_cmd_802_11_associate(pmpriv, cmd_ptr, pdata_buf);
+        break;
+    case HostCmd_CMD_802_11_DEAUTHENTICATE:
+        ret = wlan_cmd_802_11_deauthenticate(pmpriv, cmd_ptr, pdata_buf);
+        break;
+    case HostCmd_CMD_802_11_AD_HOC_START:
+        ret = wlan_cmd_802_11_ad_hoc_start(pmpriv, cmd_ptr, pdata_buf);
+        break;
+    case HostCmd_CMD_802_11_AD_HOC_JOIN:
+        ret = wlan_cmd_802_11_ad_hoc_join(pmpriv, cmd_ptr, pdata_buf);
+        break;
+    case HostCmd_CMD_802_11_AD_HOC_STOP:
+        ret = wlan_cmd_802_11_ad_hoc_stop(pmpriv, cmd_ptr);
+        break;
+    case HostCmd_CMD_802_11_GET_LOG:
+        ret = wlan_cmd_802_11_get_log(pmpriv, cmd_ptr);
+        break;
+    case HostCmd_CMD_RSSI_INFO:
+        ret = wlan_cmd_802_11_rssi_info(pmpriv, cmd_ptr, cmd_action);
+        break;
+    case HostCmd_CMD_802_11_SNMP_MIB:
+        ret =
+            wlan_cmd_802_11_snmp_mib(pmpriv, cmd_ptr, cmd_action, cmd_oid,
+                                     pdata_buf);
+        break;
+    case HostCmd_CMD_802_11_RADIO_CONTROL:
+        ret =
+            wlan_cmd_802_11_radio_control(pmpriv, cmd_ptr, cmd_action,
+                                          pdata_buf);
+        break;
+    case HostCmd_CMD_802_11_TX_RATE_QUERY:
+        cmd_ptr->command = wlan_cpu_to_le16(HostCmd_CMD_802_11_TX_RATE_QUERY);
+        cmd_ptr->size =
+            wlan_cpu_to_le16(sizeof(HostCmd_TX_RATE_QUERY) + S_DS_GEN);
+        pmpriv->tx_rate = 0;
+        ret = MLAN_STATUS_SUCCESS;
+        break;
+    case HostCmd_CMD_VERSION_EXT:
+        cmd_ptr->command = wlan_cpu_to_le16(cmd_no);
+        cmd_ptr->params.verext.version_str_sel =
+            (t_u8) (*((t_u32 *) pdata_buf));
+        cmd_ptr->size =
+            wlan_cpu_to_le16(sizeof(HostCmd_DS_VERSION_EXT) + S_DS_GEN);
+        ret = MLAN_STATUS_SUCCESS;
+        break;
+    case HostCmd_CMD_802_11_RF_CHANNEL:
+        ret =
+            wlan_cmd_802_11_rf_channel(pmpriv, cmd_ptr, cmd_action, pdata_buf);
+        break;
+    case HostCmd_CMD_FUNC_INIT:
+        if (pmpriv->adapter->hw_status == WlanHardwareStatusReset)
+            pmpriv->adapter->hw_status = WlanHardwareStatusInitializing;
+        cmd_ptr->command = wlan_cpu_to_le16(cmd_no);
+        cmd_ptr->size = wlan_cpu_to_le16(S_DS_GEN);
+        break;
+    case HostCmd_CMD_FUNC_SHUTDOWN:
+        pmpriv->adapter->hw_status = WlanHardwareStatusReset;
+        cmd_ptr->command = wlan_cpu_to_le16(cmd_no);
+        cmd_ptr->size = wlan_cpu_to_le16(S_DS_GEN);
+        break;
+    case HostCmd_CMD_SOFT_RESET:
+        cmd_ptr->command = wlan_cpu_to_le16(cmd_no);
+        cmd_ptr->size = wlan_cpu_to_le16(S_DS_GEN);
+        break;
+    case HostCmd_CMD_11N_ADDBA_REQ:
+        ret = wlan_cmd_11n_addba_req(pmpriv, cmd_ptr, pdata_buf);
+        break;
+    case HostCmd_CMD_11N_DELBA:
+        ret = wlan_cmd_11n_delba(pmpriv, cmd_ptr, pdata_buf);
+        break;
+    case HostCmd_CMD_11N_ADDBA_RSP:
+        ret = wlan_cmd_11n_addba_rspgen(pmpriv, cmd_ptr, pdata_buf);
+        break;
+    case HostCmd_CMD_802_11_KEY_MATERIAL:
+        ret =
+            wlan_cmd_802_11_key_material(pmpriv, cmd_ptr, cmd_action, cmd_oid,
+                                         pdata_buf);
+        break;
+
+    case HostCmd_CMD_SUPPLICANT_PMK:
+        ret = wlan_cmd_802_11_supplicant_pmk(pmpriv, cmd_ptr, cmd_action,
+                                             pdata_buf);
+        break;
+    case HostCmd_CMD_SUPPLICANT_PROFILE:
+        ret = wlan_cmd_802_11_supplicant_profile(pmpriv, cmd_ptr, cmd_action);
+        break;
+
+    case HostCmd_CMD_802_11D_DOMAIN_INFO:
+        ret = wlan_cmd_802_11d_domain_info(pmpriv, cmd_ptr, cmd_action);
+        break;
+    case HostCmd_CMD_802_11_TPC_ADAPT_REQ:
+    case HostCmd_CMD_802_11_TPC_INFO:
+    case HostCmd_CMD_802_11_CHAN_SW_ANN:
+    case HostCmd_CMD_CHAN_REPORT_REQUEST:
+        ret = wlan_11h_cmd_process(pmpriv, cmd_ptr, pdata_buf);
+        break;
+    case HostCmd_CMD_RECONFIGURE_TX_BUFF:
+        ret = wlan_cmd_recfg_tx_buf(pmpriv, cmd_ptr, cmd_action, pdata_buf);
+        break;
+    case HostCmd_CMD_AMSDU_AGGR_CTRL:
+        ret = wlan_cmd_amsdu_aggr_ctrl(pmpriv, cmd_ptr, cmd_action, pdata_buf);
+        break;
+    case HostCmd_CMD_11N_CFG:
+        ret = wlan_cmd_11n_cfg(pmpriv, cmd_ptr, cmd_action, pdata_buf);
+        break;
+    case HostCmd_CMD_WMM_GET_STATUS:
+        PRINTM(MINFO, "WMM: WMM_GET_STATUS cmd sent\n");
+        cmd_ptr->command = wlan_cpu_to_le16(HostCmd_CMD_WMM_GET_STATUS);
+        cmd_ptr->size =
+            wlan_cpu_to_le16(sizeof(HostCmd_DS_WMM_GET_STATUS) + S_DS_GEN);
+        ret = MLAN_STATUS_SUCCESS;
+        break;
+    case HostCmd_CMD_WMM_ADDTS_REQ:
+        ret = wlan_cmd_wmm_addts_req(pmpriv, cmd_ptr, pdata_buf);
+        break;
+    case HostCmd_CMD_WMM_DELTS_REQ:
+        ret = wlan_cmd_wmm_delts_req(pmpriv, cmd_ptr, pdata_buf);
+        break;
+    case HostCmd_CMD_WMM_QUEUE_CONFIG:
+        ret = wlan_cmd_wmm_queue_config(pmpriv, cmd_ptr, pdata_buf);
+        break;
+    case HostCmd_CMD_WMM_QUEUE_STATS:
+        ret = wlan_cmd_wmm_queue_stats(pmpriv, cmd_ptr, pdata_buf);
+        break;
+    case HostCmd_CMD_WMM_TS_STATUS:
+        ret = wlan_cmd_wmm_ts_status(pmpriv, cmd_ptr, pdata_buf);
+        break;
+    case HostCmd_CMD_802_11_IBSS_COALESCING_STATUS:
+        ret =
+            wlan_cmd_ibss_coalescing_status(pmpriv, cmd_ptr, cmd_action,
+                                            pdata_buf);
+        break;
+    case HostCmd_CMD_MGMT_IE_LIST:
+        ret = wlan_cmd_mgmt_ie_list(pmpriv, cmd_ptr, cmd_action, pdata_buf);
+        break;
+    case HostCmd_CMD_ECL_SYSTEM_CLOCK_CONFIG:
+        ret = wlan_cmd_sysclock_cfg(pmpriv, cmd_ptr, cmd_action, pdata_buf);
+        break;
+    case HostCmd_CMD_HEART_BEAT:
+        ret = wlan_cmd_heart_beat(pmpriv, cmd_ptr, cmd_action, pdata_buf);
+        break;
+    case HostCmd_CMD_MAC_REG_ACCESS:
+    case HostCmd_CMD_BBP_REG_ACCESS:
+    case HostCmd_CMD_RF_REG_ACCESS:
+    case HostCmd_CMD_PMIC_REG_ACCESS:
+    case HostCmd_CMD_CAU_REG_ACCESS:
+    case HostCmd_CMD_802_11_EEPROM_ACCESS:
+        ret = wlan_cmd_reg_access(cmd_ptr, cmd_action, pdata_buf);
+        break;
+    case HostCmd_CMD_MEM_ACCESS:
+        ret = wlan_cmd_mem_access(cmd_ptr, cmd_action, pdata_buf);
+        break;
+    case HostCmd_CMD_INACTIVITY_TIMEOUT_EXT:
+        ret = wlan_cmd_inactivity_timeout(cmd_ptr, cmd_action, pdata_buf);
+        break;
+    case HostCmd_CMD_SET_BSS_MODE:
+        cmd_ptr->command = wlan_cpu_to_le16(cmd_no);
+#ifdef WFD_SUPPORT
+        if (pdata_buf) {
+            cmd_ptr->params.bss_mode.con_type = *(t_u8 *) pdata_buf;
+        } else
+#endif
+        if (pmpriv->bss_mode == MLAN_BSS_MODE_IBSS)
+            cmd_ptr->params.bss_mode.con_type = CONNECTION_TYPE_ADHOC;
+        else if (pmpriv->bss_mode == MLAN_BSS_MODE_INFRA)
+            cmd_ptr->params.bss_mode.con_type = CONNECTION_TYPE_INFRA;
+        cmd_ptr->size =
+            wlan_cpu_to_le16(sizeof(HostCmd_DS_SET_BSS_MODE) + S_DS_GEN);
+        ret = MLAN_STATUS_SUCCESS;
+        break;
+    case HostCmd_CMD_MEASUREMENT_REQUEST:
+    case HostCmd_CMD_MEASUREMENT_REPORT:
+        ret = wlan_meas_cmd_process(pmpriv, cmd_ptr, pdata_buf);
+        break;
+    default:
+        PRINTM(MERROR, "PREP_CMD: unknown command- %#x\n", cmd_no);
+        ret = MLAN_STATUS_FAILURE;
+        break;
+    }
+    return ret;
+}
+
+/**
+ *  @brief  This function issues commands to initialize firmware
+ *
+ *  @param priv     	A pointer to mlan_private structure
+ *  @param first_bss	flag for first BSS
+ *
+ *  @return		MLAN_STATUS_PENDING or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_ops_sta_init_cmd(IN t_void * priv, IN t_u8 first_bss)
+{
+    pmlan_private pmpriv = (pmlan_private) priv;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    t_u16 enable = MTRUE;
+    mlan_ds_11n_amsdu_aggr_ctrl amsdu_aggr_ctrl;
+
+    ENTER();
+
+    if (first_bss == MTRUE) {
+        ret = wlan_adapter_init_cmd(pmpriv->adapter);
+        if (ret == MLAN_STATUS_FAILURE)
+            goto done;
+    }
+
+    /* get tx rate */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_TX_RATE_CFG,
+                           HostCmd_ACT_GEN_GET, 0, MNULL, MNULL);
+    if (ret) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+    pmpriv->data_rate = 0;
+
+    /* get tx power */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_802_11_RF_TX_POWER,
+                           HostCmd_ACT_GEN_GET, 0, MNULL, MNULL);
+    if (ret) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* set ibss coalescing_status */
+    ret = wlan_prepare_cmd(pmpriv, HostCmd_CMD_802_11_IBSS_COALESCING_STATUS,
+                           HostCmd_ACT_GEN_SET, 0, MNULL, &enable);
+    if (ret) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    memset(pmpriv->adapter, &amsdu_aggr_ctrl, 0, sizeof(amsdu_aggr_ctrl));
+    amsdu_aggr_ctrl.enable = MLAN_ACT_ENABLE;
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv, HostCmd_CMD_AMSDU_AGGR_CTRL,
+                           HostCmd_ACT_GEN_SET, 0, MNULL,
+                           (t_void *) & amsdu_aggr_ctrl);
+    if (ret) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+    /* MAC Control must be the last command in init_fw */
+    /* set MAC Control */
+    ret = wlan_prepare_cmd(pmpriv, HostCmd_CMD_MAC_CONTROL,
+                           HostCmd_ACT_GEN_SET, 0, MNULL,
+                           &pmpriv->curr_pkt_filter);
+    if (ret) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+    /** set last_init_cmd */
+    pmpriv->adapter->last_init_cmd = HostCmd_CMD_MAC_CONTROL;
+
+    if (first_bss == MFALSE) {
+        /* Get MAC address */
+        ret = wlan_prepare_cmd(pmpriv,
+                               HostCmd_CMD_802_11_MAC_ADDRESS,
+                               HostCmd_ACT_GEN_GET, 0, MNULL, MNULL);
+        if (ret) {
+            ret = MLAN_STATUS_FAILURE;
+            goto done;
+        }
+        pmpriv->adapter->last_init_cmd = HostCmd_CMD_802_11_MAC_ADDRESS;
+    }
+
+    ret = MLAN_STATUS_PENDING;
+  done:
+    LEAVE();
+    return ret;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_sta_cmdresp.c linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_sta_cmdresp.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_sta_cmdresp.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_sta_cmdresp.c	2017-09-23 03:42:50.134674710 +0800
@@ -0,0 +1,1600 @@
+/** @file mlan_sta_cmdresp.c
+ *  
+ *  @brief This file contains the handling of command
+ *  responses generated by firmware.
+ * 
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ *
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/******************************************************
+Change log:
+    10/21/2008: initial version
+******************************************************/
+
+#include "mlan.h"
+#include "mlan_join.h"
+#include "mlan_util.h"
+#include "mlan_fw.h"
+#include "mlan_main.h"
+#include "mlan_wmm.h"
+#include "mlan_11n.h"
+#include "mlan_11h.h"
+
+#include "mlan_meas.h"
+
+/********************************************************
+                Local Variables
+********************************************************/
+
+/********************************************************
+                Global Variables
+********************************************************/
+
+/********************************************************
+                Local Functions
+********************************************************/
+/** 
+ *  @brief This function handles the command response error
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to command buffer
+ *
+ *  @return             N/A
+ */
+static void
+wlan_process_cmdresp_error(mlan_private * pmpriv, HostCmd_DS_COMMAND * resp,
+                           mlan_ioctl_req * pioctl_buf)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+
+    ENTER();
+
+    PRINTM(MERROR, "CMD_RESP: cmd %#x error, result=%#x\n",
+           resp->command, resp->result);
+    if (pioctl_buf)
+        pioctl_buf->status_code = MLAN_ERROR_FW_CMDRESP;
+
+    switch (resp->command) {
+    case HostCmd_CMD_802_11_PS_MODE_ENH:
+        {
+            HostCmd_DS_802_11_PS_MODE_ENH *pm = &resp->params.psmode_enh;
+            PRINTM(MERROR,
+                   "PS_MODE_ENH command failed: result=0x%x action=0x%X\n",
+                   resp->result, wlan_le16_to_cpu(pm->action));
+            /* 
+             * We do not re-try enter-ps command in ad-hoc mode.
+             */
+            if (wlan_le16_to_cpu(pm->action) == EN_AUTO_PS &&
+                (wlan_le16_to_cpu(pm->params.auto_ps.ps_bitmap) & BITMAP_STA_PS)
+                && pmpriv->bss_mode == MLAN_BSS_MODE_IBSS)
+                pmadapter->ps_mode = Wlan802_11PowerModeCAM;
+        }
+        break;
+    case HostCmd_CMD_802_11_SCAN:
+        /* Cancel all pending scan command */
+        wlan_flush_scan_queue(pmadapter);
+        wlan_recv_event(pmpriv, MLAN_EVENT_ID_DRV_SCAN_REPORT, MNULL);
+        break;
+
+    case HostCmd_CMD_MAC_CONTROL:
+        break;
+
+    default:
+        break;
+    }
+    /* 
+     * Handling errors here
+     */
+    wlan_insert_cmd_to_free_q(pmadapter, pmadapter->curr_cmd);
+
+    wlan_request_cmd_lock(pmadapter);
+    pmadapter->curr_cmd = MNULL;
+    wlan_release_cmd_lock(pmadapter);
+
+    LEAVE();
+    return;
+}
+
+/** 
+ *  @brief This function handles the command response of RSSI info
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_ret_802_11_rssi_info(IN pmlan_private pmpriv,
+                          IN HostCmd_DS_COMMAND * resp,
+                          IN mlan_ioctl_req * pioctl_buf)
+{
+    HostCmd_DS_802_11_RSSI_INFO_RSP *prssi_info_rsp =
+        &resp->params.rssi_info_rsp;
+    mlan_ds_get_info *pget_info = MNULL;
+
+    ENTER();
+
+    pmpriv->data_rssi_last = wlan_le16_to_cpu(prssi_info_rsp->data_rssi_last);
+    pmpriv->data_nf_last = wlan_le16_to_cpu(prssi_info_rsp->data_nf_last);
+
+    pmpriv->data_rssi_avg = wlan_le16_to_cpu(prssi_info_rsp->data_rssi_avg);
+    pmpriv->data_nf_avg = wlan_le16_to_cpu(prssi_info_rsp->data_nf_avg);
+
+    pmpriv->bcn_rssi_last = wlan_le16_to_cpu(prssi_info_rsp->bcn_rssi_last);
+    pmpriv->bcn_nf_last = wlan_le16_to_cpu(prssi_info_rsp->bcn_nf_last);
+
+    pmpriv->bcn_rssi_avg = wlan_le16_to_cpu(prssi_info_rsp->bcn_rssi_avg);
+    pmpriv->bcn_nf_avg = wlan_le16_to_cpu(prssi_info_rsp->bcn_nf_avg);
+
+    /* Need to indicate IOCTL complete */
+    if (pioctl_buf != MNULL) {
+        pget_info = (mlan_ds_get_info *) pioctl_buf->pbuf;
+
+        memset(pmpriv->adapter, &pget_info->param.signal, 0,
+               sizeof(mlan_ds_get_signal));
+
+        pget_info->param.signal.selector = ALL_RSSI_INFO_MASK;
+
+        /* RSSI */
+        pget_info->param.signal.bcn_rssi_last = pmpriv->bcn_rssi_last;
+        pget_info->param.signal.bcn_rssi_avg = pmpriv->bcn_rssi_avg;
+        pget_info->param.signal.data_rssi_last = pmpriv->data_rssi_last;
+        pget_info->param.signal.data_rssi_avg = pmpriv->data_rssi_avg;
+
+        /* SNR */
+        pget_info->param.signal.bcn_snr_last =
+            CAL_SNR(pmpriv->bcn_rssi_last, pmpriv->bcn_nf_last);
+        pget_info->param.signal.bcn_snr_avg =
+            CAL_SNR(pmpriv->bcn_rssi_avg, pmpriv->bcn_nf_avg);
+        pget_info->param.signal.data_snr_last =
+            CAL_SNR(pmpriv->data_rssi_last, pmpriv->data_nf_last);
+        pget_info->param.signal.data_snr_avg =
+            CAL_SNR(pmpriv->data_rssi_avg, pmpriv->data_nf_avg);
+
+        /* NF */
+        pget_info->param.signal.bcn_nf_last = pmpriv->bcn_nf_last;
+        pget_info->param.signal.bcn_nf_avg = pmpriv->bcn_nf_avg;
+        pget_info->param.signal.data_nf_last = pmpriv->data_nf_last;
+        pget_info->param.signal.data_nf_avg = pmpriv->data_nf_avg;
+
+        pioctl_buf->data_read_written = sizeof(mlan_ds_get_info);
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function handles the command response of mac_control
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_ret_mac_control(IN pmlan_private pmpriv,
+                     IN HostCmd_DS_COMMAND * resp,
+                     IN mlan_ioctl_req * pioctl_buf)
+{
+    ENTER();
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function handles the command response of snmp_mib
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_ret_802_11_snmp_mib(IN pmlan_private pmpriv,
+                         IN HostCmd_DS_COMMAND * resp,
+                         IN mlan_ioctl_req * pioctl_buf)
+{
+    HostCmd_DS_802_11_SNMP_MIB *psmib = &resp->params.smib;
+    t_u16 oid = wlan_le16_to_cpu(psmib->oid);
+    t_u16 query_type = wlan_le16_to_cpu(psmib->query_type);
+    t_u32 ul_temp;
+    mlan_ds_snmp_mib *mib = MNULL;
+
+    ENTER();
+
+    if (pioctl_buf)
+        mib = (mlan_ds_snmp_mib *) pioctl_buf->pbuf;
+
+    PRINTM(MINFO, "SNMP_RESP: value of the oid = 0x%x, query_type=0x%x\n", oid,
+           query_type);
+    PRINTM(MINFO, "SNMP_RESP: Buf size  = 0x%x\n",
+           wlan_le16_to_cpu(psmib->buf_size));
+    if (query_type == HostCmd_ACT_GEN_GET) {
+        switch (oid) {
+        case FragThresh_i:
+            ul_temp = wlan_le16_to_cpu(*((t_u16 *) (psmib->value)));
+            PRINTM(MINFO, "SNMP_RESP: FragThsd =%u\n", ul_temp);
+            if (mib)
+                mib->param.frag_threshold = ul_temp;
+            break;
+
+        case RtsThresh_i:
+            ul_temp = wlan_le16_to_cpu(*((t_u16 *) (psmib->value)));
+            PRINTM(MINFO, "SNMP_RESP: RTSThsd =%u\n", ul_temp);
+            if (mib)
+                mib->param.rts_threshold = ul_temp;
+            break;
+
+        case ShortRetryLim_i:
+            ul_temp = wlan_le16_to_cpu(*((t_u16 *) (psmib->value)));
+            PRINTM(MINFO, "SNMP_RESP: TxRetryCount=%u\n", ul_temp);
+            if (mib)
+                mib->param.retry_count = ul_temp;
+            break;
+        case WwsMode_i:
+            ul_temp = wlan_le16_to_cpu(*((t_u16 *) (psmib->value)));
+            PRINTM(MINFO, "SNMP_RESP: WWSCfg =%u\n", ul_temp);
+            if (pioctl_buf)
+                ((mlan_ds_misc_cfg *) pioctl_buf->pbuf)->param.wws_cfg =
+                    ul_temp;
+            break;
+        case Thermal_i:
+            ul_temp = wlan_le32_to_cpu(*((t_u32 *) (psmib->value)));
+            PRINTM(MINFO, "SNMP_RESP: Thermal =%u\n", ul_temp);
+            if (pioctl_buf)
+                ((mlan_ds_misc_cfg *) pioctl_buf->pbuf)->param.thermal =
+                    ul_temp;
+            break;
+
+        default:
+            break;
+        }
+    } else {                    /* (query_type == HostCmd_ACT_GEN_SET) */
+        /* Update state for 11d */
+        if (oid == Dot11D_i) {
+            ul_temp = wlan_le16_to_cpu(*((t_u16 *) (psmib->value)));
+            /* Set 11d state to private */
+            pmpriv->state_11d.enable_11d = ul_temp;
+            /* Set user enable flag if called from ioctl */
+            if (pioctl_buf)
+                pmpriv->state_11d.user_enable_11d = ul_temp;
+        }
+        /* Update state for 11h */
+        if (oid == Dot11H_i) {
+            ul_temp = wlan_le16_to_cpu(*((t_u16 *) (psmib->value)));
+            /* Set 11h state to priv */
+            pmpriv->intf_state_11h.is_11h_active = (ul_temp & ENABLE_11H_MASK);
+        }
+    }
+
+    if (pioctl_buf) {
+        /* Indicate ioctl complete */
+        pioctl_buf->data_read_written = sizeof(mlan_ds_snmp_mib);
+    }
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function handles the command response of get_log
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_ret_get_log(IN pmlan_private pmpriv,
+                 IN HostCmd_DS_COMMAND * resp, IN mlan_ioctl_req * pioctl_buf)
+{
+    HostCmd_DS_802_11_GET_LOG *pget_log =
+        (HostCmd_DS_802_11_GET_LOG *) & resp->params.get_log;
+    mlan_ds_get_info *pget_info = MNULL;
+
+    ENTER();
+    if (pioctl_buf) {
+        pget_info = (mlan_ds_get_info *) pioctl_buf->pbuf;
+        pget_info->param.stats.mcast_tx_frame =
+            wlan_le32_to_cpu(pget_log->mcast_tx_frame);
+        pget_info->param.stats.failed = wlan_le32_to_cpu(pget_log->failed);
+        pget_info->param.stats.retry = wlan_le32_to_cpu(pget_log->retry);
+        pget_info->param.stats.multi_retry =
+            wlan_le32_to_cpu(pget_log->multiretry);
+        pget_info->param.stats.frame_dup =
+            wlan_le32_to_cpu(pget_log->frame_dup);
+        pget_info->param.stats.rts_success =
+            wlan_le32_to_cpu(pget_log->rts_success);
+        pget_info->param.stats.rts_failure =
+            wlan_le32_to_cpu(pget_log->rts_failure);
+        pget_info->param.stats.ack_failure =
+            wlan_le32_to_cpu(pget_log->ack_failure);
+        pget_info->param.stats.rx_frag = wlan_le32_to_cpu(pget_log->rx_frag);
+        pget_info->param.stats.mcast_rx_frame =
+            wlan_le32_to_cpu(pget_log->mcast_rx_frame);
+        pget_info->param.stats.fcs_error =
+            wlan_le32_to_cpu(pget_log->fcs_error);
+        pget_info->param.stats.tx_frame = wlan_le32_to_cpu(pget_log->tx_frame);
+        pget_info->param.stats.wep_icv_error[0] =
+            wlan_le32_to_cpu(pget_log->wep_icv_err_cnt[0]);
+        pget_info->param.stats.wep_icv_error[1] =
+            wlan_le32_to_cpu(pget_log->wep_icv_err_cnt[1]);
+        pget_info->param.stats.wep_icv_error[2] =
+            wlan_le32_to_cpu(pget_log->wep_icv_err_cnt[2]);
+        pget_info->param.stats.wep_icv_error[3] =
+            wlan_le32_to_cpu(pget_log->wep_icv_err_cnt[3]);
+        /* Indicate ioctl complete */
+        pioctl_buf->data_read_written = sizeof(mlan_ds_get_info);
+    }
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief Get power level and rate index
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param pdata_buf    Pointer to the data buffer
+ * 
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_get_power_level(pmlan_private pmpriv, void *pdata_buf)
+{
+    int length = -1, max_power = -1, min_power = -1;
+    MrvlTypes_Power_Group_t *ppg_tlv = MNULL;
+    Power_Group_t *pg = MNULL;
+
+    ENTER();
+
+    if (pdata_buf) {
+        ppg_tlv =
+            (MrvlTypes_Power_Group_t *) ((t_u8 *) pdata_buf +
+                                         sizeof(HostCmd_DS_TXPWR_CFG));
+        pg = (Power_Group_t *) ((t_u8 *) ppg_tlv +
+                                sizeof(MrvlTypes_Power_Group_t));
+        length = ppg_tlv->length;
+        if (length > 0) {
+            max_power = pg->power_max;
+            min_power = pg->power_min;
+            length -= sizeof(Power_Group_t);
+        }
+        while (length) {
+            pg++;
+            if (max_power < pg->power_max) {
+                max_power = pg->power_max;
+            }
+            if (min_power > pg->power_min) {
+                min_power = pg->power_min;
+            }
+            length -= sizeof(Power_Group_t);
+        }
+        if (ppg_tlv->length > 0) {
+            pmpriv->min_tx_power_level = (t_u8) min_power;
+            pmpriv->max_tx_power_level = (t_u8) max_power;
+        }
+    } else {
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function handles the command response of tx_power_cfg
+ * 
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_ret_tx_power_cfg(IN pmlan_private pmpriv,
+                      IN HostCmd_DS_COMMAND * resp,
+                      IN mlan_ioctl_req * pioctl_buf)
+{
+    HostCmd_DS_TXPWR_CFG *ptxp_cfg = &resp->params.txp_cfg;
+    MrvlTypes_Power_Group_t *ppg_tlv = MNULL;
+    Power_Group_t *pg = MNULL;
+    t_u16 action = wlan_le16_to_cpu(ptxp_cfg->action);
+    mlan_ds_power_cfg *power = MNULL;
+    t_u32 data[5];
+
+    ENTER();
+
+    ppg_tlv = (MrvlTypes_Power_Group_t *) ((t_u8 *) ptxp_cfg
+                                           + sizeof(HostCmd_DS_TXPWR_CFG));
+    pg = (Power_Group_t *) ((t_u8 *) ppg_tlv + sizeof(MrvlTypes_Power_Group_t));
+
+    switch (action) {
+    case HostCmd_ACT_GEN_GET:
+        ppg_tlv->length = wlan_le16_to_cpu(ppg_tlv->length);
+        if (pmpriv->adapter->hw_status == WlanHardwareStatusInitializing)
+            wlan_get_power_level(pmpriv, ptxp_cfg);
+        pmpriv->tx_power_level = (t_u16) pg->power_min;
+        break;
+
+    case HostCmd_ACT_GEN_SET:
+        if (wlan_le32_to_cpu(ptxp_cfg->mode)) {
+            if (pg->power_max == pg->power_min)
+                pmpriv->tx_power_level = (t_u16) pg->power_min;
+        }
+        break;
+
+    default:
+        PRINTM(MERROR, "CMD_RESP: unknown command action %d\n", action);
+        LEAVE();
+        return MLAN_STATUS_SUCCESS;
+    }
+
+    PRINTM(MINFO, "Current TxPower Level = %d,Max Power=%d, Min Power=%d\n",
+           pmpriv->tx_power_level,
+           pmpriv->max_tx_power_level, pmpriv->min_tx_power_level);
+
+    if (pioctl_buf) {
+        power = (mlan_ds_power_cfg *) pioctl_buf->pbuf;
+        if (action == HostCmd_ACT_GEN_GET) {
+            if (power->sub_command == MLAN_OID_POWER_CFG) {
+                pioctl_buf->data_read_written
+                    = sizeof(mlan_power_cfg_t) + MLAN_SUB_COMMAND_SIZE;
+                power->param.power_cfg.power_level = pmpriv->tx_power_level;
+                if (wlan_le32_to_cpu(ptxp_cfg->mode))
+                    power->param.power_cfg.is_power_auto = 0;
+                else
+                    power->param.power_cfg.is_power_auto = 1;
+            } else {
+                power->param.power_ext.len = 0;
+                while (ppg_tlv->length) {
+                    data[0] = pg->first_rate_code;
+                    data[1] = pg->last_rate_code;
+                    if (pg->modulation_class == MOD_CLASS_OFDM) {
+                        data[0] += MLAN_RATE_INDEX_OFDM0;
+                        data[1] += MLAN_RATE_INDEX_OFDM0;
+                    } else if (pg->modulation_class == MOD_CLASS_HT) {
+                        data[0] += MLAN_RATE_INDEX_MCS0;
+                        data[1] += MLAN_RATE_INDEX_MCS0;
+                        if (pg->ht_bandwidth == HT_BW_40) {
+                            data[0] |= TX_RATE_HT_BW40_BIT;
+                            data[1] |= TX_RATE_HT_BW40_BIT;
+                        }
+                    }
+                    data[2] = pg->power_min;
+                    data[3] = pg->power_max;
+                    data[4] = pg->power_step;
+                    memcpy(pmpriv->adapter,
+                           (t_u8 *) (&power->param.power_ext.
+                                     power_data[power->param.power_ext.len]),
+                           (t_u8 *) data, sizeof(data));
+                    power->param.power_ext.len += 5;
+                    pg++;
+                    ppg_tlv->length -= sizeof(Power_Group_t);
+                }
+                pioctl_buf->data_read_written
+                    = sizeof(mlan_power_cfg_ext) + MLAN_SUB_COMMAND_SIZE;
+            }
+        }
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function handles the command response of rf_tx_power
+ *    
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_ret_802_11_rf_tx_power(IN pmlan_private pmpriv,
+                            IN HostCmd_DS_COMMAND * resp,
+                            IN mlan_ioctl_req * pioctl_buf)
+{
+    HostCmd_DS_802_11_RF_TX_POWER *rtp = &resp->params.txp;
+    t_u16 action = wlan_le16_to_cpu(rtp->action);
+    mlan_ds_power_cfg *power = MNULL;
+
+    ENTER();
+
+    pmpriv->tx_power_level = wlan_le16_to_cpu(rtp->current_level);
+
+    if (action == HostCmd_ACT_GEN_GET) {
+        pmpriv->max_tx_power_level = rtp->max_power;
+        pmpriv->min_tx_power_level = rtp->min_power;
+        if (pioctl_buf) {
+            power = (mlan_ds_power_cfg *) pioctl_buf->pbuf;
+            if (power->sub_command == MLAN_OID_POWER_CFG) {
+                pioctl_buf->data_read_written
+                    = sizeof(mlan_power_cfg_t) + MLAN_SUB_COMMAND_SIZE;
+                power->param.power_cfg.power_level = pmpriv->tx_power_level;
+            }
+        }
+    }
+
+    PRINTM(MINFO, "Current TxPower Level = %d,Max Power=%d, Min Power=%d\n",
+           pmpriv->tx_power_level,
+           pmpriv->max_tx_power_level, pmpriv->min_tx_power_level);
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function handles the command response of sleep_period
+ *    
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_ret_802_11_sleep_period(IN pmlan_private pmpriv,
+                             IN HostCmd_DS_COMMAND * resp,
+                             IN mlan_ioctl_req * pioctl_buf)
+{
+    HostCmd_DS_802_11_SLEEP_PERIOD *pcmd_sleep_pd = &resp->params.sleep_pd;
+    mlan_ds_pm_cfg *pm_cfg = MNULL;
+    t_u16 sleep_pd = 0;
+
+    ENTER();
+
+    sleep_pd = wlan_le16_to_cpu(pcmd_sleep_pd->sleep_pd);
+    if (pioctl_buf) {
+        pm_cfg = (mlan_ds_pm_cfg *) pioctl_buf->pbuf;
+        pm_cfg->param.sleep_period = (t_u32) sleep_pd;
+        pioctl_buf->data_read_written = sizeof(pm_cfg->param.sleep_period)
+            + MLAN_SUB_COMMAND_SIZE;
+    }
+    pmpriv->adapter->sleep_period.period = sleep_pd;
+
+    pmpriv->adapter->pps_uapsd_mode = MFALSE;
+    if ((pmpriv->adapter->sleep_period.period != 0) &&
+        (pmpriv->adapter->sleep_period.period != SLEEP_PERIOD_RESERVED_FF)) {
+        pmpriv->adapter->gen_null_pkt = MTRUE;
+    } else {
+        pmpriv->adapter->delay_null_pkt = MFALSE;
+        pmpriv->adapter->gen_null_pkt = MFALSE;
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function handles the command response of sleep_params
+ *    
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_ret_802_11_sleep_params(IN pmlan_private pmpriv,
+                             IN HostCmd_DS_COMMAND * resp,
+                             IN mlan_ioctl_req * pioctl_buf)
+{
+    HostCmd_DS_802_11_SLEEP_PARAMS *presp_sp = &resp->params.sleep_param;
+    mlan_ds_pm_cfg *pm_cfg = MNULL;
+    mlan_ds_sleep_params *psp = MNULL;
+    sleep_params_t *psleep_params = &pmpriv->adapter->sleep_params;
+
+    ENTER();
+
+    psleep_params->sp_reserved = wlan_le16_to_cpu(presp_sp->reserved);
+    psleep_params->sp_error = wlan_le16_to_cpu(presp_sp->error);
+    psleep_params->sp_offset = wlan_le16_to_cpu(presp_sp->offset);
+    psleep_params->sp_stable_time = wlan_le16_to_cpu(presp_sp->stable_time);
+    psleep_params->sp_cal_control = presp_sp->cal_control;
+    psleep_params->sp_ext_sleep_clk = presp_sp->external_sleep_clk;
+
+    if (pioctl_buf) {
+        pm_cfg = (mlan_ds_pm_cfg *) pioctl_buf->pbuf;
+        psp = (mlan_ds_sleep_params *) & pm_cfg->param.sleep_params;
+
+        psp->error = (t_u32) psleep_params->sp_error;
+        psp->offset = (t_u32) psleep_params->sp_offset;
+        psp->stable_time = (t_u32) psleep_params->sp_stable_time;
+        psp->cal_control = (t_u32) psleep_params->sp_cal_control;
+        psp->ext_sleep_clk = (t_u32) psleep_params->sp_ext_sleep_clk;
+        psp->reserved = (t_u32) psleep_params->sp_reserved;
+
+        pioctl_buf->data_read_written = sizeof(pm_cfg->param.sleep_params)
+            + MLAN_SUB_COMMAND_SIZE;
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function handles the command response of mac_address
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_ret_802_11_mac_address(IN pmlan_private pmpriv,
+                            IN HostCmd_DS_COMMAND * resp,
+                            IN mlan_ioctl_req * pioctl_buf)
+{
+    HostCmd_DS_802_11_MAC_ADDRESS *pmac_addr = &resp->params.mac_addr;
+    mlan_ds_bss *bss = MNULL;
+
+    ENTER();
+
+    memcpy(pmpriv->adapter, pmpriv->curr_addr, pmac_addr->mac_addr,
+           MLAN_MAC_ADDR_LENGTH);
+
+    PRINTM(MINFO, "MAC address: %02x:%02x:%02x:%02x:%02x:%02x\n",
+           pmpriv->curr_addr[0], pmpriv->curr_addr[1], pmpriv->curr_addr[2],
+           pmpriv->curr_addr[3], pmpriv->curr_addr[4], pmpriv->curr_addr[5]);
+    if (pioctl_buf) {
+        bss = (mlan_ds_bss *) pioctl_buf->pbuf;
+        memcpy(pmpriv->adapter, &bss->param.mac_addr, pmpriv->curr_addr,
+               MLAN_MAC_ADDR_LENGTH);
+        pioctl_buf->data_read_written =
+            MLAN_MAC_ADDR_LENGTH + MLAN_SUB_COMMAND_SIZE;
+    }
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function handles the command response of multicast_address
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_ret_mac_multicast_adr(IN pmlan_private pmpriv,
+                           IN HostCmd_DS_COMMAND * resp,
+                           IN mlan_ioctl_req * pioctl_buf)
+{
+    ENTER();
+    if (pioctl_buf) {
+        pioctl_buf->data_read_written =
+            sizeof(mlan_multicast_list) + MLAN_SUB_COMMAND_SIZE;
+    }
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function handles the command response of deauthenticate
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_ret_802_11_deauthenticate(IN pmlan_private pmpriv,
+                               IN HostCmd_DS_COMMAND * resp,
+                               IN mlan_ioctl_req * pioctl_buf)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    ENTER();
+
+    pmadapter->dbg.num_cmd_deauth++;
+
+    if (!memcmp(pmadapter, resp->params.deauth.mac_addr,
+                &pmpriv->curr_bss_params.bss_descriptor.mac_address,
+                sizeof(resp->params.deauth.mac_addr))) {
+        wlan_reset_connect_state(pmpriv, MTRUE);
+
+    }
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function handles the command response of ad_hoc_stop
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return        MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_ret_802_11_ad_hoc_stop(IN pmlan_private pmpriv,
+                            IN HostCmd_DS_COMMAND * resp,
+                            IN mlan_ioctl_req * pioctl_buf)
+{
+    ENTER();
+
+    wlan_reset_connect_state(pmpriv, MTRUE);
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function handles the command response of key_material
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return        MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_ret_802_11_key_material(IN pmlan_private pmpriv,
+                             IN HostCmd_DS_COMMAND * resp,
+                             IN mlan_ioctl_req * pioctl_buf)
+{
+    HostCmd_DS_802_11_KEY_MATERIAL *pkey = &resp->params.key_material;
+
+    ENTER();
+
+    if (wlan_le16_to_cpu(pkey->action) == HostCmd_ACT_GEN_SET) {
+        if ((wlan_le16_to_cpu(pkey->key_param_set.key_info) &
+             KEY_INFO_TKIP_MCAST)) {
+            PRINTM(MINFO, "key: GTK is set\n");
+            pmpriv->wpa_is_gtk_set = MTRUE;
+            if (pmpriv->port_ctrl_mode == MTRUE) {
+                /* GTK is set, open the port */
+                PRINTM(MINFO, "GTK_SET: Open port for WPA/WPA2 h-supp mode\n");
+                pmpriv->port_open = MTRUE;
+            }
+            pmpriv->scan_block = MFALSE;
+        }
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief Handle the supplicant pmk response
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return        MLAN_STATUS_SUCCESS MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_ret_802_11_supplicant_pmk(IN pmlan_private pmpriv,
+                               IN HostCmd_DS_COMMAND * resp,
+                               IN mlan_ioctl_req * pioctl_buf)
+{
+    HostCmd_DS_802_11_SUPPLICANT_PMK *supplicant_pmk_resp =
+        &resp->params.esupplicant_psk;
+    mlan_ds_sec_cfg sec_buf;
+    mlan_ds_sec_cfg *sec = MNULL;
+    MrvlIEtypes_PMK_t *ppmk_tlv = MNULL;
+    MrvlIEtypes_Passphrase_t *passphrase_tlv = MNULL;
+    MrvlIEtypes_SsIdParamSet_t *pssid_tlv = MNULL;
+    MrvlIEtypes_Bssid_t *pbssid_tlv = MNULL;
+    t_u8 *tlv_buf = (t_u8 *) supplicant_pmk_resp->tlv_buffer;
+    t_u16 action = wlan_le16_to_cpu(supplicant_pmk_resp->action);
+    int tlv_buf_len = 0;
+    t_u16 tlv;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+    tlv_buf_len = resp->size - (sizeof(HostCmd_DS_802_11_SUPPLICANT_PMK) +
+                                S_DS_GEN - 1);
+    if (pioctl_buf) {
+        if (((mlan_ds_bss *) pioctl_buf->pbuf)->sub_command ==
+            MLAN_OID_BSS_FIND_BSS)
+            sec = &sec_buf;
+        else
+            sec = (mlan_ds_sec_cfg *) pioctl_buf->pbuf;
+        if (action == HostCmd_ACT_GEN_GET) {
+            while (tlv_buf_len > 0) {
+                tlv = (*tlv_buf) | (*(tlv_buf + 1) << 8);
+                if ((tlv != TLV_TYPE_SSID) && (tlv != TLV_TYPE_BSSID) &&
+                    (tlv != TLV_TYPE_PASSPHRASE)
+                    && (tlv != TLV_TYPE_PMK))
+                    break;
+                switch (tlv) {
+                case TLV_TYPE_SSID:
+                    pssid_tlv = (MrvlIEtypes_SsIdParamSet_t *) tlv_buf;
+                    pssid_tlv->header.len =
+                        wlan_le16_to_cpu(pssid_tlv->header.len);
+                    memcpy(pmpriv->adapter, sec->param.passphrase.ssid.ssid,
+                           pssid_tlv->ssid, pssid_tlv->header.len);
+                    sec->param.passphrase.ssid.ssid_len = pssid_tlv->header.len;
+                    tlv_buf +=
+                        pssid_tlv->header.len + sizeof(MrvlIEtypesHeader_t);
+                    tlv_buf_len -=
+                        (pssid_tlv->header.len + sizeof(MrvlIEtypesHeader_t));
+                    break;
+                case TLV_TYPE_BSSID:
+                    pbssid_tlv = (MrvlIEtypes_Bssid_t *) tlv_buf;
+                    pbssid_tlv->header.len =
+                        wlan_le16_to_cpu(pbssid_tlv->header.len);
+                    memcpy(pmpriv->adapter, &sec->param.passphrase.bssid,
+                           pbssid_tlv->bssid, MLAN_MAC_ADDR_LENGTH);
+                    tlv_buf +=
+                        pbssid_tlv->header.len + sizeof(MrvlIEtypesHeader_t);
+                    tlv_buf_len -=
+                        (pbssid_tlv->header.len + sizeof(MrvlIEtypesHeader_t));
+                    break;
+                case TLV_TYPE_PASSPHRASE:
+                    passphrase_tlv = (MrvlIEtypes_Passphrase_t *) tlv_buf;
+                    passphrase_tlv->header.len =
+                        wlan_le16_to_cpu(passphrase_tlv->header.len);
+                    sec->param.passphrase.psk_type = MLAN_PSK_PASSPHRASE;
+                    sec->param.passphrase.psk.passphrase.passphrase_len =
+                        passphrase_tlv->header.len;
+                    memcpy(pmpriv->adapter,
+                           sec->param.passphrase.psk.passphrase.passphrase,
+                           passphrase_tlv->passphrase,
+                           passphrase_tlv->header.len);
+                    tlv_buf +=
+                        passphrase_tlv->header.len +
+                        sizeof(MrvlIEtypesHeader_t);
+                    tlv_buf_len -=
+                        (passphrase_tlv->header.len +
+                         sizeof(MrvlIEtypesHeader_t));
+                    break;
+                case TLV_TYPE_PMK:
+                    ppmk_tlv = (MrvlIEtypes_PMK_t *) tlv_buf;
+                    ppmk_tlv->header.len =
+                        wlan_le16_to_cpu(ppmk_tlv->header.len);
+                    sec->param.passphrase.psk_type = MLAN_PSK_PMK;
+                    memcpy(pmpriv->adapter, sec->param.passphrase.psk.pmk.pmk,
+                           ppmk_tlv->pmk, ppmk_tlv->header.len);
+                    tlv_buf +=
+                        ppmk_tlv->header.len + sizeof(MrvlIEtypesHeader_t);
+                    tlv_buf_len -=
+                        (ppmk_tlv->header.len + sizeof(MrvlIEtypesHeader_t));
+                    break;
+
+                }
+            }
+            if (((mlan_ds_bss *) pioctl_buf->pbuf)->sub_command ==
+                MLAN_OID_BSS_FIND_BSS) {
+                wlan_set_ewpa_mode(pmpriv, &sec->param.passphrase);
+                ret = wlan_find_bss(pmpriv, pioctl_buf);
+            }
+        } else if (action == HostCmd_ACT_GEN_SET) {
+            PRINTM(MINFO, "Esupp PMK set: enable ewpa query\n");
+            pmpriv->ewpa_query = MTRUE;
+        }
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Handle the supplicant profile response
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return        MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_ret_802_11_supplicant_profile(IN pmlan_private pmpriv,
+                                   IN HostCmd_DS_COMMAND * resp,
+                                   IN mlan_ioctl_req * pioctl_buf)
+{
+    HostCmd_DS_802_11_SUPPLICANT_PROFILE *psup_profile =
+        &resp->params.esupplicant_profile;
+    MrvlIEtypesHeader_t *head;
+    MrvlIEtypes_EncrProto_t *encr_proto_tlv = MNULL;
+    MrvlIEtypes_Cipher_t *pcipher_tlv = MNULL;
+    mlan_ds_sec_cfg *sec = MNULL;
+    t_u8 *tlv;
+    int len;
+
+    ENTER();
+
+    len = resp->size - S_DS_GEN - sizeof(t_u16);
+    tlv = psup_profile->tlv_buf;
+    if (pioctl_buf) {
+        sec = (mlan_ds_sec_cfg *) pioctl_buf->pbuf;
+        while (len > 0) {
+            head = (MrvlIEtypesHeader_t *) tlv;
+            head->type = wlan_le16_to_cpu(head->type);
+            head->len = wlan_le16_to_cpu(head->len);
+            switch (head->type) {
+            case TLV_TYPE_ENCRYPTION_PROTO:
+                encr_proto_tlv = (MrvlIEtypes_EncrProto_t *) head;
+                sec->param.esupp_mode.rsn_mode =
+                    wlan_le16_to_cpu(encr_proto_tlv->rsn_mode);
+                PRINTM(MINFO, "rsn_mode=0x%x\n",
+                       sec->param.esupp_mode.rsn_mode);
+                break;
+            case TLV_TYPE_CIPHER:
+                pcipher_tlv = (MrvlIEtypes_Cipher_t *) head;
+                sec->param.esupp_mode.act_paircipher = pcipher_tlv->pair_cipher;
+                sec->param.esupp_mode.act_groupcipher =
+                    pcipher_tlv->group_cipher;
+                PRINTM(MINFO, "paircipher=0x%x, groupcipher=0x%x\n",
+                       sec->param.esupp_mode.act_paircipher,
+                       sec->param.esupp_mode.act_groupcipher);
+                break;
+            }
+            len -= (head->len - sizeof(MrvlIEtypesHeader_t));
+            tlv = tlv + (head->len + sizeof(MrvlIEtypesHeader_t));
+        }
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function handles the command response of rf_channel
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_ret_802_11_rf_channel(IN pmlan_private pmpriv,
+                           IN HostCmd_DS_COMMAND * resp,
+                           IN mlan_ioctl_req * pioctl_buf)
+{
+    HostCmd_DS_802_11_RF_CHANNEL *prf_channel = &resp->params.rf_channel;
+    t_u16 new_channel = wlan_le16_to_cpu(prf_channel->current_channel);
+    mlan_ds_bss *bss = MNULL;
+    ENTER();
+    if (pmpriv->curr_bss_params.bss_descriptor.channel != new_channel) {
+        PRINTM(MINFO, "Channel Switch: %d to %d\n",
+               pmpriv->curr_bss_params.bss_descriptor.channel, new_channel);
+        /* Update the channel again */
+        pmpriv->curr_bss_params.bss_descriptor.channel = new_channel;
+    }
+    if (pioctl_buf) {
+        bss = (mlan_ds_bss *) pioctl_buf->pbuf;
+        bss->param.bss_chan.channel = new_channel;
+    }
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function handles the command response of rf_antenna
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_ret_802_11_rf_antenna(IN pmlan_private pmpriv,
+                           IN HostCmd_DS_COMMAND * resp,
+                           IN mlan_ioctl_req * pioctl_buf)
+{
+    HostCmd_DS_802_11_RF_ANTENNA *pantenna = &resp->params.antenna;
+    t_u16 ant_mode = wlan_le16_to_cpu(pantenna->antenna_mode);
+    mlan_ds_radio_cfg *radio = MNULL;
+
+    ENTER();
+
+    PRINTM(MINFO, "RF_ANT_RESP: action = 0x%x, Mode = 0x%04x\n",
+           wlan_le16_to_cpu(pantenna->action), ant_mode);
+
+    if (pioctl_buf) {
+        radio = (mlan_ds_radio_cfg *) pioctl_buf->pbuf;
+        radio->param.antenna = ant_mode;
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief Handle the ibss_coalescing_status resp
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_ret_ibss_coalescing_status(IN pmlan_private pmpriv,
+                                IN HostCmd_DS_COMMAND * resp)
+{
+    HostCmd_DS_802_11_IBSS_STATUS *pibss_coal_resp =
+        &(resp->params.ibss_coalescing);
+    t_u8 zero_mac[MLAN_MAC_ADDR_LENGTH] = { 0, 0, 0, 0, 0, 0 };
+
+    ENTER();
+
+    if (wlan_le16_to_cpu(pibss_coal_resp->action) == HostCmd_ACT_GEN_SET) {
+        LEAVE();
+        return MLAN_STATUS_SUCCESS;
+    }
+
+    PRINTM(MINFO, "New BSSID %02x:%02x:%02x:%02x:%02x:%02x\n",
+           pibss_coal_resp->bssid[0], pibss_coal_resp->bssid[1],
+           pibss_coal_resp->bssid[2], pibss_coal_resp->bssid[3],
+           pibss_coal_resp->bssid[4], pibss_coal_resp->bssid[5]);
+
+    /* If rsp has MNULL BSSID, Just return..... No Action */
+    if (!memcmp
+        (pmpriv->adapter, pibss_coal_resp->bssid, zero_mac,
+         MLAN_MAC_ADDR_LENGTH)) {
+        PRINTM(MMSG, "New BSSID is MNULL\n");
+        LEAVE();
+        return MLAN_STATUS_SUCCESS;
+    }
+
+    /* If BSSID is diff, modify current BSS parameters */
+    if (memcmp
+        (pmpriv->adapter, pmpriv->curr_bss_params.bss_descriptor.mac_address,
+         pibss_coal_resp->bssid, MLAN_MAC_ADDR_LENGTH)) {
+        /* BSSID */
+        memcpy(pmpriv->adapter,
+               pmpriv->curr_bss_params.bss_descriptor.mac_address,
+               pibss_coal_resp->bssid, MLAN_MAC_ADDR_LENGTH);
+
+        /* Beacon Interval and ATIM window */
+        pmpriv->curr_bss_params.bss_descriptor.beacon_period
+            = wlan_le16_to_cpu(pibss_coal_resp->beacon_interval);
+        pmpriv->curr_bss_params.bss_descriptor.atim_window
+            = wlan_le16_to_cpu(pibss_coal_resp->atim_window);
+
+        /* ERP Information */
+        pmpriv->curr_bss_params.bss_descriptor.erp_flags
+            = (t_u8) wlan_le16_to_cpu(pibss_coal_resp->use_g_rate_protect);
+
+        pmpriv->adhoc_state = ADHOC_COALESCED;
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function handles the command response of MGMT_IE_LIST
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *  
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_ret_mgmt_ie_list(IN pmlan_private pmpriv,
+                      IN HostCmd_DS_COMMAND * resp,
+                      OUT mlan_ioctl_req * pioctl_buf)
+{
+    t_u16 resp_len = 0, travel_len = 0;
+    mlan_ds_misc_cfg *misc = MNULL;
+    mlan_ds_misc_custom_ie *cust_ie = MNULL;
+    custom_ie *cptr;
+    HostCmd_DS_MGMT_IE_LIST_CFG *pmgmt_ie_list = &(resp->params.mgmt_ie_list);
+
+    ENTER();
+
+    if (wlan_le16_to_cpu(pmgmt_ie_list->action) == HostCmd_ACT_GEN_SET) {
+        LEAVE();
+        return MLAN_STATUS_SUCCESS;
+    }
+
+    misc = (mlan_ds_misc_cfg *) pioctl_buf->pbuf;
+    cust_ie = (mlan_ds_misc_custom_ie *) & pmgmt_ie_list->ds_mgmt_ie;
+    if (cust_ie) {
+        cust_ie->type = wlan_le16_to_cpu(cust_ie->type);
+        resp_len = cust_ie->len = wlan_le16_to_cpu(cust_ie->len);
+        travel_len = 0;
+        /* conversion for index, mask, len */
+        if (resp_len == sizeof(t_u16))
+            cust_ie->ie_data_list[0].ie_index =
+                wlan_cpu_to_le16(cust_ie->ie_data_list[0].ie_index);
+
+        while (resp_len > sizeof(t_u16)) {
+            cptr =
+                (custom_ie *) (((t_u8 *) cust_ie->ie_data_list) + travel_len);
+            cptr->ie_index = wlan_le16_to_cpu(cptr->ie_index);
+            cptr->mgmt_subtype_mask = wlan_le16_to_cpu(cptr->mgmt_subtype_mask);
+            cptr->ie_length = wlan_le16_to_cpu(cptr->ie_length);
+            travel_len += cptr->ie_length + sizeof(custom_ie) - MAX_IE_SIZE;
+            resp_len -= cptr->ie_length + sizeof(custom_ie) - MAX_IE_SIZE;
+        }
+        memcpy(pmpriv->adapter, &misc->param.cust_ie, cust_ie,
+               (cust_ie->len + sizeof(MrvlIEtypesHeader_t)));
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function handles the command response of sysclock
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return        MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_ret_sysclock_cfg(IN pmlan_private pmpriv,
+                      IN HostCmd_DS_COMMAND * resp,
+                      IN mlan_ioctl_req * pioctl_buf)
+{
+    mlan_ds_misc_cfg *mis_ccfg = MNULL;
+    HostCmd_DS_ECL_SYSTEM_CLOCK_CONFIG *clk_cfg = &resp->params.sys_clock_cfg;
+    int i = 0;
+
+    ENTER();
+
+    if (pioctl_buf) {
+        mis_ccfg = (mlan_ds_misc_cfg *) pioctl_buf->pbuf;
+        mis_ccfg->param.sys_clock.cur_sys_clk =
+            wlan_le16_to_cpu(clk_cfg->cur_sys_clk);
+        mis_ccfg->param.sys_clock.sys_clk_type =
+            wlan_le16_to_cpu(clk_cfg->sys_clk_type);
+        mis_ccfg->param.sys_clock.sys_clk_num =
+            wlan_le16_to_cpu(clk_cfg->sys_clk_len) / sizeof(t_u16);
+        for (i = 0; i < mis_ccfg->param.sys_clock.sys_clk_num; i++)
+            mis_ccfg->param.sys_clock.sys_clk[i] =
+                wlan_le16_to_cpu(clk_cfg->sys_clk[i]);
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ * @brief This function handles the command response of heart_beat
+ *   
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_ret_heart_beat(IN pmlan_private pmpriv,
+                    IN HostCmd_DS_COMMAND * resp,
+                    IN mlan_ioctl_req * pioctl_buf)
+{
+    mlan_ds_misc_cfg *misc = MNULL;
+    HostCmd_DS_HEART_BEAT *cmd_heart_beat =
+        (HostCmd_DS_HEART_BEAT *) & resp->params.heart_beat;
+
+    ENTER();
+
+    if (pioctl_buf) {
+        misc = (mlan_ds_misc_cfg *) pioctl_buf->pbuf;
+        misc->param.heart_beat.h2d_timer =
+            wlan_le16_to_cpu(cmd_heart_beat->h2d_timer);
+        misc->param.heart_beat.d2h_timer =
+            wlan_le16_to_cpu(cmd_heart_beat->d2h_timer);
+        misc->param.heart_beat.reconnect_delay =
+            wlan_le16_to_cpu(cmd_heart_beat->reconnect_delay);
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function handles the command response of reg_access
+ *  
+ *  @param type         The type of reg access (MAC, BBP or RF)
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to command buffer
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_ret_reg_access(mlan_adapter * pmadapter,
+                    t_u16 type,
+                    IN HostCmd_DS_COMMAND * resp,
+                    IN mlan_ioctl_req * pioctl_buf)
+{
+    mlan_ds_reg_mem *reg_mem = MNULL;
+    mlan_ds_reg_rw *reg_rw = MNULL;
+
+    ENTER();
+
+    if (pioctl_buf) {
+        reg_mem = (mlan_ds_reg_mem *) pioctl_buf->pbuf;
+        reg_rw = &reg_mem->param.reg_rw;
+        switch (type) {
+        case HostCmd_CMD_MAC_REG_ACCESS:
+            {
+                HostCmd_DS_MAC_REG_ACCESS *reg;
+                reg = (HostCmd_DS_MAC_REG_ACCESS *) & resp->params.mac_reg;
+                reg_rw->offset = (t_u32) wlan_le16_to_cpu(reg->offset);
+                reg_rw->value = wlan_le32_to_cpu(reg->value);
+                break;
+            }
+        case HostCmd_CMD_BBP_REG_ACCESS:
+            {
+                HostCmd_DS_BBP_REG_ACCESS *reg;
+                reg = (HostCmd_DS_BBP_REG_ACCESS *) & resp->params.bbp_reg;
+                reg_rw->offset = (t_u32) wlan_le16_to_cpu(reg->offset);
+                reg_rw->value = (t_u32) reg->value;
+                break;
+            }
+
+        case HostCmd_CMD_RF_REG_ACCESS:
+            {
+                HostCmd_DS_RF_REG_ACCESS *reg;
+                reg = (HostCmd_DS_RF_REG_ACCESS *) & resp->params.rf_reg;
+                reg_rw->offset = (t_u32) wlan_le16_to_cpu(reg->offset);
+                reg_rw->value = (t_u32) reg->value;
+                break;
+            }
+        case HostCmd_CMD_PMIC_REG_ACCESS:
+            {
+                HostCmd_DS_PMIC_REG_ACCESS *reg;
+                reg = (HostCmd_DS_PMIC_REG_ACCESS *) & resp->params.pmic_reg;
+                reg_rw->offset = (t_u32) wlan_le16_to_cpu(reg->offset);
+                reg_rw->value = (t_u32) reg->value;
+                break;
+            }
+        case HostCmd_CMD_CAU_REG_ACCESS:
+            {
+                HostCmd_DS_RF_REG_ACCESS *reg;
+                reg = (HostCmd_DS_RF_REG_ACCESS *) & resp->params.rf_reg;
+                reg_rw->offset = (t_u32) wlan_le16_to_cpu(reg->offset);
+                reg_rw->value = (t_u32) reg->value;
+                break;
+            }
+        case HostCmd_CMD_802_11_EEPROM_ACCESS:
+            {
+                mlan_ds_read_eeprom *eeprom = &reg_mem->param.rd_eeprom;
+                HostCmd_DS_802_11_EEPROM_ACCESS *cmd_eeprom =
+                    (HostCmd_DS_802_11_EEPROM_ACCESS *) & resp->params.eeprom;
+                cmd_eeprom->byte_count =
+                    wlan_le16_to_cpu(cmd_eeprom->byte_count);
+                PRINTM(MINFO, "EEPROM read len=%x\n", cmd_eeprom->byte_count);
+                if (eeprom->byte_count < cmd_eeprom->byte_count) {
+                    eeprom->byte_count = 0;
+                    PRINTM(MINFO, "EEPROM read return length is too big\n");
+                    pioctl_buf->status_code = MLAN_ERROR_CMD_RESP_FAIL;
+                    LEAVE();
+                    return MLAN_STATUS_FAILURE;
+                }
+                eeprom->offset = wlan_le16_to_cpu(cmd_eeprom->offset);
+                eeprom->byte_count = cmd_eeprom->byte_count;
+                if (eeprom->byte_count > 0) {
+                    memcpy(pmadapter, &eeprom->value, &cmd_eeprom->value,
+                           eeprom->byte_count);
+                    HEXDUMP("EEPROM", (char *) &eeprom->value,
+                            eeprom->byte_count);
+                }
+                break;
+            }
+        default:
+            pioctl_buf->status_code = MLAN_ERROR_CMD_RESP_FAIL;
+            LEAVE();
+            return MLAN_STATUS_FAILURE;
+        }
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function handles the command response of mem_access
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to command buffer
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_ret_mem_access(IN pmlan_private pmpriv,
+                    IN HostCmd_DS_COMMAND * resp,
+                    IN mlan_ioctl_req * pioctl_buf)
+{
+    mlan_ds_reg_mem *reg_mem = MNULL;
+    mlan_ds_mem_rw *mem_rw = MNULL;
+    HostCmd_DS_MEM_ACCESS *mem = (HostCmd_DS_MEM_ACCESS *) & resp->params.mem;
+
+    ENTER();
+
+    if (pioctl_buf) {
+        reg_mem = (mlan_ds_reg_mem *) pioctl_buf->pbuf;
+        mem_rw = &reg_mem->param.mem_rw;
+
+        mem_rw->addr = wlan_le32_to_cpu(mem->addr);
+        mem_rw->value = wlan_le32_to_cpu(mem->value);
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function handles the command response of inactivity timeout
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp	        A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to command buffer
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_ret_inactivity_timeout(IN pmlan_private pmpriv,
+                            IN HostCmd_DS_COMMAND * resp,
+                            IN mlan_ioctl_req * pioctl_buf)
+{
+    mlan_ds_pm_cfg *pmcfg = MNULL;
+    mlan_ds_inactivity_to *inac_to = MNULL;
+    HostCmd_DS_INACTIVITY_TIMEOUT_EXT *cmd_inac_to =
+        (HostCmd_DS_INACTIVITY_TIMEOUT_EXT *) & resp->params.inactivity_to;
+
+    ENTER();
+
+    if (pioctl_buf) {
+        pmcfg = (mlan_ds_pm_cfg *) pioctl_buf->pbuf;
+        inac_to = &pmcfg->param.inactivity_to;
+        inac_to->timeout_unit = wlan_le16_to_cpu(cmd_inac_to->timeout_unit);
+        inac_to->unicast_timeout =
+            wlan_le16_to_cpu(cmd_inac_to->unicast_timeout);
+        inac_to->mcast_timeout = wlan_le16_to_cpu(cmd_inac_to->mcast_timeout);
+        inac_to->ps_entry_timeout =
+            wlan_le16_to_cpu(cmd_inac_to->ps_entry_timeout);
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/********************************************************
+                Global Functions
+********************************************************/
+/** 
+ *  @brief This function handles the station command response
+ *  
+ *  @param priv             A pointer to mlan_private structure
+ *  @param cmdresp_no       cmd no
+ *  @param pcmd_buf         cmdresp buf
+ *  @param pioctl           A pointer to ioctl buf
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_ops_sta_process_cmdresp(IN t_void * priv,
+                             IN t_u16 cmdresp_no,
+                             IN t_void * pcmd_buf, IN t_void * pioctl)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = (mlan_private *) priv;
+    HostCmd_DS_COMMAND *resp = (HostCmd_DS_COMMAND *) pcmd_buf;
+    mlan_ioctl_req *pioctl_buf = (mlan_ioctl_req *) pioctl;
+    mlan_adapter *pmadapter = pmpriv->adapter;
+
+    ENTER();
+
+    /* If the command is not successful, cleanup and return failure */
+    if ((resp->result != HostCmd_RESULT_OK)
+        ) {
+        wlan_process_cmdresp_error(pmpriv, resp, pioctl_buf);
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+    /* Command successful, handle response */
+    switch (cmdresp_no) {
+    case HostCmd_CMD_GET_HW_SPEC:
+        ret = wlan_ret_get_hw_spec(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_CFG_DATA:
+        ret = wlan_ret_cfg_data(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_MAC_CONTROL:
+        ret = wlan_ret_mac_control(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_802_11_MAC_ADDRESS:
+        ret = wlan_ret_802_11_mac_address(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_MAC_MULTICAST_ADR:
+        ret = wlan_ret_mac_multicast_adr(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_TX_RATE_CFG:
+        ret = wlan_ret_tx_rate_cfg(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_802_11_SCAN:
+        ret = wlan_ret_802_11_scan(pmpriv, resp, pioctl_buf);
+        pioctl_buf = MNULL;
+        pmadapter->curr_cmd->pioctl_buf = MNULL;
+        break;
+    case HostCmd_CMD_TXPWR_CFG:
+        ret = wlan_ret_tx_power_cfg(pmpriv, resp, pioctl_buf);
+        break;
+
+    case HostCmd_CMD_802_11_RF_TX_POWER:
+        ret = wlan_ret_802_11_rf_tx_power(pmpriv, resp, pioctl_buf);
+        break;
+
+    case HostCmd_CMD_802_11_PS_MODE_ENH:
+        ret = wlan_ret_enh_power_mode(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_802_11_HS_CFG_ENH:
+        ret = wlan_ret_802_11_hs_cfg(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_802_11_SLEEP_PERIOD:
+        ret = wlan_ret_802_11_sleep_period(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_802_11_SLEEP_PARAMS:
+        ret = wlan_ret_802_11_sleep_params(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_802_11_ASSOCIATE:
+        ret = wlan_ret_802_11_associate(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_802_11_DEAUTHENTICATE:
+        ret = wlan_ret_802_11_deauthenticate(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_802_11_AD_HOC_START:
+    case HostCmd_CMD_802_11_AD_HOC_JOIN:
+        ret = wlan_ret_802_11_ad_hoc(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_802_11_AD_HOC_STOP:
+        ret = wlan_ret_802_11_ad_hoc_stop(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_802_11_GET_LOG:
+        ret = wlan_ret_get_log(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_RSSI_INFO:
+        ret = wlan_ret_802_11_rssi_info(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_802_11_SNMP_MIB:
+        ret = wlan_ret_802_11_snmp_mib(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_802_11_RADIO_CONTROL:
+        ret = wlan_ret_802_11_radio_control(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_802_11_TX_RATE_QUERY:
+        ret = wlan_ret_802_11_tx_rate_query(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_802_11_RF_CHANNEL:
+        ret = wlan_ret_802_11_rf_channel(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_802_11_RF_ANTENNA:
+        ret = wlan_ret_802_11_rf_antenna(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_VERSION_EXT:
+        ret = wlan_ret_ver_ext(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_FUNC_INIT:
+    case HostCmd_CMD_FUNC_SHUTDOWN:
+        break;
+    case HostCmd_CMD_802_11_KEY_MATERIAL:
+        ret = wlan_ret_802_11_key_material(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_SUPPLICANT_PMK:
+        ret = wlan_ret_802_11_supplicant_pmk(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_SUPPLICANT_PROFILE:
+        ret = wlan_ret_802_11_supplicant_profile(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_802_11D_DOMAIN_INFO:
+        ret = wlan_ret_802_11d_domain_info(pmpriv, resp);
+        break;
+    case HostCmd_CMD_802_11_TPC_ADAPT_REQ:
+    case HostCmd_CMD_802_11_TPC_INFO:
+    case HostCmd_CMD_802_11_CHAN_SW_ANN:
+    case HostCmd_CMD_CHAN_REPORT_REQUEST:
+        ret = wlan_11h_cmdresp_process(pmpriv, resp);
+        break;
+    case HostCmd_CMD_11N_ADDBA_REQ:
+        ret = wlan_ret_11n_addba_req(pmpriv, resp);
+        break;
+    case HostCmd_CMD_11N_DELBA:
+        ret = wlan_ret_11n_delba(pmpriv, resp);
+        break;
+    case HostCmd_CMD_11N_ADDBA_RSP:
+        ret = wlan_ret_11n_addba_resp(pmpriv, resp);
+        break;
+    case HostCmd_CMD_RECONFIGURE_TX_BUFF:
+        pmadapter->tx_buf_size =
+            (t_u16) wlan_le16_to_cpu(resp->params.tx_buf.buff_size);
+        pmadapter->curr_tx_buf_size = pmadapter->tx_buf_size;
+        PRINTM(MCMND, "max_tx_buf_size=%d, tx_buf_size=%d\n",
+               pmadapter->max_tx_buf_size, pmadapter->tx_buf_size);
+        break;
+    case HostCmd_CMD_AMSDU_AGGR_CTRL:
+        ret = wlan_ret_amsdu_aggr_ctrl(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_WMM_GET_STATUS:
+        ret = wlan_ret_wmm_get_status(pmpriv,
+                                      resp->params.get_wmm_status.
+                                      queue_status_tlv, resp->size - S_DS_GEN);
+        break;
+    case HostCmd_CMD_WMM_ADDTS_REQ:
+        ret = wlan_ret_wmm_addts_req(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_WMM_DELTS_REQ:
+        ret = wlan_ret_wmm_delts_req(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_WMM_QUEUE_CONFIG:
+        ret = wlan_ret_wmm_queue_config(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_WMM_QUEUE_STATS:
+        ret = wlan_ret_wmm_queue_stats(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_WMM_TS_STATUS:
+        ret = wlan_ret_wmm_ts_status(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_802_11_IBSS_COALESCING_STATUS:
+        ret = wlan_ret_ibss_coalescing_status(pmpriv, resp);
+        break;
+    case HostCmd_CMD_MGMT_IE_LIST:
+        ret = wlan_ret_mgmt_ie_list(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_11N_CFG:
+        ret = wlan_ret_11n_cfg(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_ECL_SYSTEM_CLOCK_CONFIG:
+        ret = wlan_ret_sysclock_cfg(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_HEART_BEAT:
+        ret = wlan_ret_heart_beat(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_MAC_REG_ACCESS:
+    case HostCmd_CMD_BBP_REG_ACCESS:
+    case HostCmd_CMD_RF_REG_ACCESS:
+    case HostCmd_CMD_PMIC_REG_ACCESS:
+    case HostCmd_CMD_CAU_REG_ACCESS:
+    case HostCmd_CMD_802_11_EEPROM_ACCESS:
+        ret =
+            wlan_ret_reg_access(pmpriv->adapter, cmdresp_no, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_MEM_ACCESS:
+        ret = wlan_ret_mem_access(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_INACTIVITY_TIMEOUT_EXT:
+        ret = wlan_ret_inactivity_timeout(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_SET_BSS_MODE:
+        break;
+    case HostCmd_CMD_MEASUREMENT_REQUEST:
+    case HostCmd_CMD_MEASUREMENT_REPORT:
+        ret = wlan_meas_cmdresp_process(pmpriv, resp);
+        break;
+    default:
+        PRINTM(MERROR, "CMD_RESP: Unknown command response %#x\n",
+               resp->command);
+        break;
+    }
+
+    LEAVE();
+    return ret;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_sta_event.c linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_sta_event.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_sta_event.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_sta_event.c	2017-09-23 03:42:50.134674710 +0800
@@ -0,0 +1,533 @@
+/** @file mlan_sta_event.c
+ *  
+ *  @brief This file contains MLAN event handling.
+ * 
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ *
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/********************************************************
+Change log:
+    10/13/2008: initial version
+********************************************************/
+
+#include "mlan.h"
+#include "mlan_join.h"
+#include "mlan_util.h"
+#include "mlan_fw.h"
+#include "mlan_main.h"
+#include "mlan_wmm.h"
+#include "mlan_11n.h"
+#include "mlan_11h.h"
+
+/********************************************************
+        Global Variables
+********************************************************/
+
+/********************************************************
+        Local Functions
+********************************************************/
+
+/** 
+ *  @brief This function handles link lost, deauth and
+ *  		disassoc events.
+ *  
+ *  @param priv    A pointer to mlan_private structure
+ *  @return        N/A
+ */
+static t_void
+wlan_handle_disconnect_event(pmlan_private pmpriv)
+{
+    ENTER();
+
+    if (pmpriv->media_connected == MTRUE) {
+        wlan_reset_connect_state(pmpriv, MTRUE);
+    }
+
+    LEAVE();
+}
+
+/********************************************************
+        Global Functions
+********************************************************/
+/** 
+ *  @brief This function handles disconnect event, reports disconnect
+ *  		to upper layer, cleans tx/rx packets,
+ *  		resets link state etc.
+ *  
+ *  @param priv            A pointer to mlan_private structure
+ *  @param drv_disconnect  Flag indicating the driver should disconnect
+ *                         and flush pending packets.
+ *
+ *  @return        N/A
+ */
+t_void
+wlan_reset_connect_state(pmlan_private priv, t_u8 drv_disconnect)
+{
+    mlan_adapter *pmadapter = priv->adapter;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    state_11d_t enable;
+
+    ENTER();
+
+    if (priv->media_connected != MTRUE) {
+        LEAVE();
+        return;
+    }
+
+    PRINTM(MINFO, "Handles disconnect event.\n");
+
+    if (drv_disconnect) {
+        priv->media_connected = MFALSE;
+    }
+
+    if (priv->port_ctrl_mode == MTRUE) {
+        /* Close the port on Disconnect */
+        PRINTM(MINFO, "DISC: port_status = CLOSED\n");
+        priv->port_open = MFALSE;
+    }
+    priv->scan_block = MFALSE;
+
+    /* Reset SNR/NF/RSSI values */
+    priv->data_rssi_last = 0;
+    priv->data_nf_last = 0;
+    priv->data_rssi_avg = 0;
+    priv->data_nf_avg = 0;
+    priv->bcn_rssi_last = 0;
+    priv->bcn_nf_last = 0;
+    priv->bcn_rssi_avg = 0;
+    priv->bcn_nf_avg = 0;
+    priv->rxpd_rate = 0;
+    priv->rxpd_htinfo = 0;
+
+    priv->sec_info.ewpa_enabled = MFALSE;
+    priv->sec_info.wpa_enabled = MFALSE;
+    priv->sec_info.wpa2_enabled = MFALSE;
+    priv->wpa_ie_len = 0;
+
+    priv->sec_info.wapi_enabled = MFALSE;
+    priv->wapi_ie_len = 0;
+    priv->sec_info.wapi_key_on = MFALSE;
+
+    priv->wps.session_enable = MFALSE;
+    memset(priv->adapter, (t_u8 *) & priv->wps.wps_ie, 0x00,
+           sizeof(priv->wps.wps_ie));
+
+    priv->sec_info.encryption_mode = MLAN_ENCRYPTION_MODE_NONE;
+
+    /* Enable auto data rate */
+    priv->is_data_rate_auto = MTRUE;
+    priv->data_rate = 0;
+
+    if (priv->bss_mode == MLAN_BSS_MODE_IBSS) {
+        priv->adhoc_state = ADHOC_IDLE;
+        priv->adhoc_is_link_sensed = MFALSE;
+        priv->intf_state_11h.adhoc_auto_sel_chan = MTRUE;
+    }
+
+    if (drv_disconnect) {
+        /* Free Tx and Rx packets, report disconnect to upper layer */
+        wlan_clean_txrx(priv);
+
+        /* Need to erase the current SSID and BSSID info */
+        memset(pmadapter,
+               &priv->curr_bss_params, 0x00, sizeof(priv->curr_bss_params));
+    }
+    pmadapter->tx_lock_flag = MFALSE;
+    pmadapter->pps_uapsd_mode = MFALSE;
+    pmadapter->delay_null_pkt = MFALSE;
+
+    if ((wlan_11d_is_enabled(priv)) &&
+        (priv->state_11d.user_enable_11d == DISABLE_11D)) {
+
+        priv->state_11d.enable_11d = DISABLE_11D;
+        enable = DISABLE_11D;
+
+        /* Send cmd to FW to enable/disable 11D function */
+        ret = wlan_prepare_cmd(priv,
+                               HostCmd_CMD_802_11_SNMP_MIB,
+                               HostCmd_ACT_GEN_SET, Dot11D_i, MNULL, &enable);
+        if (ret)
+            PRINTM(MERROR, "11D: Failed to enable 11D\n");
+    }
+    if (pmadapter->num_cmd_timeout && pmadapter->curr_cmd &&
+        (pmadapter->cmd_timer_is_set == MFALSE)) {
+        LEAVE();
+        return;
+    }
+
+    wlan_recv_event(priv, MLAN_EVENT_ID_FW_DISCONNECTED, MNULL);
+
+    LEAVE();
+}
+
+/** 
+ *  @brief This function sends the OBSS scan parameters to the application
+ *  
+ *  @param pmpriv     A pointer to mlan_private structure
+ *
+ *  @return           N/A
+ */
+t_void
+wlan_2040_coex_event(pmlan_private pmpriv)
+{
+    t_u8 event_buf[100];
+    mlan_event *pevent = (mlan_event *) event_buf;
+    t_u8 ele_len;
+
+    ENTER();
+
+    if (pmpriv->curr_bss_params.bss_descriptor.poverlap_bss_scan_param &&
+        pmpriv->curr_bss_params.bss_descriptor.poverlap_bss_scan_param->
+        ieee_hdr.element_id == OVERLAPBSSSCANPARAM) {
+        ele_len =
+            pmpriv->curr_bss_params.bss_descriptor.poverlap_bss_scan_param->
+            ieee_hdr.len;
+        pevent->bss_index = pmpriv->bss_index;
+        pevent->event_id = MLAN_EVENT_ID_DRV_OBSS_SCAN_PARAM;
+        /* Copy OBSS scan parameters */
+        memcpy(pmpriv->adapter, (t_u8 *) pevent->event_buf,
+               (t_u8 *) & pmpriv->curr_bss_params.bss_descriptor.
+               poverlap_bss_scan_param->obss_scan_param, ele_len);
+        pevent->event_len = ele_len;
+        wlan_recv_event(pmpriv, MLAN_EVENT_ID_DRV_OBSS_SCAN_PARAM, pevent);
+    }
+
+    LEAVE();
+}
+
+/** 
+ *  @brief This function handles events generated by firmware
+ *  
+ *  @param priv	A pointer to mlan_private structure
+ *
+ *  @return		MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_ops_sta_process_event(IN t_void * priv)
+{
+    pmlan_private pmpriv = (pmlan_private) priv;
+    pmlan_adapter pmadapter = pmpriv->adapter;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    t_u32 eventcause = pmadapter->event_cause;
+    t_u8 event_buf[100];
+    t_u8 *evt_buf = MNULL;
+    pmlan_buffer pmbuf = pmadapter->pmlan_buffer_event;
+#if defined(WFD_SUPPORT)
+    pmlan_callbacks pcb = &pmadapter->callbacks;
+#endif
+    mlan_event *pevent = (mlan_event *) event_buf;
+
+    ENTER();
+
+    if (eventcause != EVENT_PS_AWAKE && eventcause != EVENT_PS_SLEEP &&
+        pmbuf->data_len > sizeof(eventcause))
+        DBG_HEXDUMP(MEVT_D, "EVENT", pmbuf->pbuf + pmbuf->data_offset,
+                    pmbuf->data_len);
+
+    switch (eventcause) {
+    case EVENT_DUMMY_HOST_WAKEUP_SIGNAL:
+        PRINTM(MERROR,
+               "Invalid EVENT: DUMMY_HOST_WAKEUP_SIGNAL, ignoring it\n");
+        break;
+    case EVENT_LINK_SENSED:
+        PRINTM(MEVENT, "EVENT: LINK_SENSED\n");
+        pmpriv->adhoc_is_link_sensed = MTRUE;
+        wlan_recv_event(pmpriv, MLAN_EVENT_ID_FW_ADHOC_LINK_SENSED, MNULL);
+        break;
+
+    case EVENT_DEAUTHENTICATED:
+        PRINTM(MEVENT, "EVENT: Deauthenticated\n");
+        pmadapter->dbg.num_event_deauth++;
+        wlan_handle_disconnect_event(pmpriv);
+
+        break;
+
+    case EVENT_DISASSOCIATED:
+        PRINTM(MEVENT, "EVENT: Disassociated\n");
+        pmadapter->dbg.num_event_disassoc++;
+        wlan_handle_disconnect_event(pmpriv);
+        break;
+
+    case EVENT_LINK_LOST:
+        PRINTM(MEVENT, "EVENT: Link lost\n");
+        pmadapter->dbg.num_event_link_lost++;
+        wlan_handle_disconnect_event(pmpriv);
+        break;
+
+    case EVENT_PS_SLEEP:
+        PRINTM(MINFO, "EVENT: SLEEP\n");
+        PRINTM(MEVENT, "_");
+
+        /* Handle unexpected PS SLEEP event */
+        if (pmadapter->ps_state == PS_STATE_SLEEP_CFM)
+            break;
+        pmadapter->ps_state = PS_STATE_PRE_SLEEP;
+
+        wlan_check_ps_cond(pmadapter);
+        break;
+
+    case EVENT_PS_AWAKE:
+        PRINTM(MINFO, "EVENT: AWAKE \n");
+        PRINTM(MEVENT, "|");
+        if (!pmadapter->pps_uapsd_mode &&
+            pmpriv->media_connected &&
+            (pmpriv->port_open || !pmpriv->port_ctrl_mode) &&
+            pmadapter->sleep_period.period) {
+            pmadapter->pps_uapsd_mode = MTRUE;
+            PRINTM(MEVENT, "PPS/UAPSD mode activated\n");
+        }
+        /* Handle unexpected PS AWAKE event */
+        if (pmadapter->ps_state == PS_STATE_SLEEP_CFM)
+            break;
+        pmadapter->tx_lock_flag = MFALSE;
+        if (pmadapter->pps_uapsd_mode && pmadapter->gen_null_pkt) {
+            if (MTRUE == wlan_check_last_packet_indication(pmpriv)) {
+                if (!pmadapter->data_sent) {
+                    if (wlan_send_null_packet(pmpriv,
+                                              MRVDRV_TxPD_POWER_MGMT_NULL_PACKET
+                                              |
+                                              MRVDRV_TxPD_POWER_MGMT_LAST_PACKET)
+                        == MLAN_STATUS_SUCCESS) {
+                        return MLAN_STATUS_SUCCESS;
+                    }
+                }
+            }
+        }
+        pmadapter->ps_state = PS_STATE_AWAKE;
+        pmadapter->pm_wakeup_card_req = MFALSE;
+        pmadapter->pm_wakeup_fw_try = MFALSE;
+        break;
+
+    case EVENT_HS_ACT_REQ:
+        PRINTM(MEVENT, "EVENT: HS_ACT_REQ\n");
+        ret = wlan_prepare_cmd(priv,
+                               HostCmd_CMD_802_11_HS_CFG_ENH,
+                               0, 0, MNULL, MNULL);
+        break;
+
+    case EVENT_MIC_ERR_UNICAST:
+        PRINTM(MEVENT, "EVENT: UNICAST MIC ERROR\n");
+        wlan_recv_event(pmpriv, MLAN_EVENT_ID_FW_MIC_ERR_UNI, MNULL);
+        break;
+
+    case EVENT_MIC_ERR_MULTICAST:
+        PRINTM(MEVENT, "EVENT: MULTICAST MIC ERROR\n");
+        wlan_recv_event(pmpriv, MLAN_EVENT_ID_FW_MIC_ERR_MUL, MNULL);
+        break;
+    case EVENT_MIB_CHANGED:
+    case EVENT_INIT_DONE:
+        break;
+
+    case EVENT_ADHOC_BCN_LOST:
+        PRINTM(MEVENT, "EVENT: ADHOC_BCN_LOST\n");
+        pmpriv->adhoc_is_link_sensed = MFALSE;
+        wlan_clean_txrx(pmpriv);
+        wlan_recv_event(pmpriv, MLAN_EVENT_ID_FW_ADHOC_LINK_LOST, MNULL);
+        break;
+
+    case EVENT_PORT_RELEASE:
+        PRINTM(MEVENT, "EVENT: PORT RELEASE\n");
+        /* Open the port for e-supp mode */
+        if (pmpriv->port_ctrl_mode == MTRUE) {
+            PRINTM(MINFO, "PORT_REL: port_status = OPEN\n");
+            pmpriv->port_open = MTRUE;
+        }
+        pmpriv->scan_block = MFALSE;
+        wlan_recv_event(pmpriv, MLAN_EVENT_ID_FW_PORT_RELEASE, MNULL);
+        break;
+
+    case EVENT_STOP_TX:
+        PRINTM(MEVENT, "EVENT: Stop Tx (%#x)\n", eventcause);
+        wlan_11h_tx_disable(pmpriv);    // this fn will send event up to MOAL
+        break;
+    case EVENT_START_TX:
+        PRINTM(MEVENT, "EVENT: Start Tx (%#x)\n", eventcause);
+        wlan_11h_tx_enable(pmpriv);     // this fn will send event up to MOAL
+        break;
+    case EVENT_CHANNEL_SWITCH:
+        PRINTM(MEVENT, "EVENT: Channel Switch (%#x)\n", eventcause);
+        /* To be handled for 'chanswann' private command */
+        break;
+    case EVENT_CHANNEL_SWITCH_ANN:
+        PRINTM(MEVENT, "EVENT: Channel Switch Announcement\n");
+        /* Here, pass up event first, as handling will send deauth */
+        wlan_recv_event(pmpriv, MLAN_EVENT_ID_FW_CHANNEL_SWITCH_ANN, MNULL);
+        wlan_11h_handle_event_chanswann(pmpriv);
+        break;
+
+    case EVENT_MEAS_REPORT_RDY:
+        PRINTM(MEVENT, "EVENT: Measurement Report Ready (%#x)\n", eventcause);
+        wlan_prepare_cmd(priv, HostCmd_CMD_MEASUREMENT_REPORT,
+                         HostCmd_ACT_GEN_SET, 0, 0, MNULL);
+        break;
+    case EVENT_WMM_STATUS_CHANGE:
+        if (pmbuf && pmbuf->data_len
+            > sizeof(eventcause) + sizeof(MrvlIEtypesHeader_t)) {
+            PRINTM(MEVENT, "EVENT: WMM status changed: %d\n", pmbuf->data_len);
+
+            evt_buf = (pmbuf->pbuf + pmbuf->data_offset + sizeof(eventcause));
+
+            wlan_ret_wmm_get_status(pmpriv,
+                                    evt_buf,
+                                    pmbuf->data_len - sizeof(eventcause));
+        } else {
+            PRINTM(MEVENT, "EVENT: WMM status changed\n");
+            ret = wlan_cmd_wmm_status_change(pmpriv);
+        }
+        break;
+
+    case EVENT_RSSI_LOW:
+        PRINTM(MEVENT, "EVENT: Beacon RSSI_LOW\n");
+        wlan_recv_event(pmpriv, MLAN_EVENT_ID_FW_BCN_RSSI_LOW, MNULL);
+        break;
+    case EVENT_SNR_LOW:
+        PRINTM(MEVENT, "EVENT: Beacon SNR_LOW\n");
+        wlan_recv_event(pmpriv, MLAN_EVENT_ID_FW_BCN_SNR_LOW, MNULL);
+        break;
+    case EVENT_MAX_FAIL:
+        PRINTM(MEVENT, "EVENT: MAX_FAIL\n");
+        wlan_recv_event(pmpriv, MLAN_EVENT_ID_FW_MAX_FAIL, MNULL);
+        break;
+    case EVENT_RSSI_HIGH:
+        PRINTM(MEVENT, "EVENT: Beacon RSSI_HIGH\n");
+        wlan_recv_event(pmpriv, MLAN_EVENT_ID_FW_BCN_RSSI_HIGH, MNULL);
+        break;
+    case EVENT_SNR_HIGH:
+        PRINTM(MEVENT, "EVENT: Beacon SNR_HIGH\n");
+        wlan_recv_event(pmpriv, MLAN_EVENT_ID_FW_BCN_SNR_HIGH, MNULL);
+        break;
+    case EVENT_DATA_RSSI_LOW:
+        PRINTM(MEVENT, "EVENT: Data RSSI_LOW\n");
+        wlan_recv_event(pmpriv, MLAN_EVENT_ID_FW_DATA_RSSI_LOW, MNULL);
+        break;
+    case EVENT_DATA_SNR_LOW:
+        PRINTM(MEVENT, "EVENT: Data SNR_LOW\n");
+        wlan_recv_event(pmpriv, MLAN_EVENT_ID_FW_DATA_SNR_LOW, MNULL);
+        break;
+    case EVENT_DATA_RSSI_HIGH:
+        PRINTM(MEVENT, "EVENT: Data RSSI_HIGH\n");
+        wlan_recv_event(pmpriv, MLAN_EVENT_ID_FW_DATA_RSSI_HIGH, MNULL);
+        break;
+    case EVENT_DATA_SNR_HIGH:
+        PRINTM(MEVENT, "EVENT: Data SNR_HIGH\n");
+        wlan_recv_event(pmpriv, MLAN_EVENT_ID_FW_DATA_SNR_HIGH, MNULL);
+        break;
+    case EVENT_LINK_QUALITY:
+        PRINTM(MEVENT, "EVENT: Link Quality\n");
+        wlan_recv_event(pmpriv, MLAN_EVENT_ID_FW_LINK_QUALITY, MNULL);
+        break;
+    case EVENT_PRE_BEACON_LOST:
+        PRINTM(MEVENT, "EVENT: Pre-Beacon Lost\n");
+        wlan_recv_event(pmpriv, MLAN_EVENT_ID_FW_PRE_BCN_LOST, MNULL);
+        break;
+    case EVENT_IBSS_COALESCED:
+        PRINTM(MEVENT, "EVENT: IBSS_COALESCED\n");
+        ret = wlan_prepare_cmd(pmpriv,
+                               HostCmd_CMD_802_11_IBSS_COALESCING_STATUS,
+                               HostCmd_ACT_GEN_GET, 0, MNULL, MNULL);
+        break;
+    case EVENT_ADDBA:
+        PRINTM(MEVENT, "EVENT: ADDBA Request\n");
+        wlan_prepare_cmd(pmpriv, HostCmd_CMD_11N_ADDBA_RSP,
+                         HostCmd_ACT_GEN_SET, 0, MNULL, pmadapter->event_body);
+        break;
+    case EVENT_DELBA:
+        PRINTM(MEVENT, "EVENT: DELBA Request\n");
+        wlan_11n_delete_bastream(pmpriv, pmadapter->event_body);
+        break;
+    case EVENT_BA_STREAM_TIMEOUT:
+        PRINTM(MEVENT, "EVENT:  BA Stream timeout\n");
+        wlan_11n_ba_stream_timeout(pmpriv,
+                                   (HostCmd_DS_11N_BATIMEOUT *) pmadapter->
+                                   event_body);
+        break;
+    case EVENT_RXBA_SYNC:
+        PRINTM(MEVENT, "EVENT:  RXBA_SYNC\n");
+        wlan_11n_rxba_sync_event(pmpriv, pmadapter->event_body,
+                                 pmbuf->data_len - sizeof(eventcause));
+        break;
+    case EVENT_AMSDU_AGGR_CTRL:
+        PRINTM(MEVENT, "EVENT:  AMSDU_AGGR_CTRL %d\n",
+               *(t_u16 *) pmadapter->event_body);
+        pmadapter->tx_buf_size =
+            MIN(pmadapter->curr_tx_buf_size,
+                wlan_le16_to_cpu(*(t_u16 *) pmadapter->event_body));
+        PRINTM(MEVENT, "tx_buf_size %d\n", pmadapter->tx_buf_size);
+        break;
+
+    case EVENT_HEART_BEAT:
+        PRINTM(MEVENT, "EVENT: Heart Beat\n");
+        wlan_recv_event(pmpriv, MLAN_EVENT_ID_FW_HEART_BEAT, MNULL);
+        break;
+
+    case EVENT_WEP_ICV_ERR:
+        PRINTM(MEVENT, "EVENT: WEP ICV error\n");
+        pevent->bss_index = pmpriv->bss_index;
+        pevent->event_id = MLAN_EVENT_ID_FW_WEP_ICV_ERR;
+        pevent->event_len = sizeof(Event_WEP_ICV_ERR);
+        memcpy(pmadapter, (t_u8 *) pevent->event_buf, pmadapter->event_body,
+               pevent->event_len);
+        wlan_recv_event(pmpriv, MLAN_EVENT_ID_FW_WEP_ICV_ERR, pevent);
+        break;
+
+    case EVENT_BW_CHANGE:
+        PRINTM(MEVENT, "EVENT: BW Change\n");
+        pevent->bss_index = pmpriv->bss_index;
+        pevent->event_id = MLAN_EVENT_ID_FW_BW_CHANGED;
+        pevent->event_len = sizeof(t_u8);
+        /* Copy event body from the event buffer */
+        memcpy(pmadapter, (t_u8 *) pevent->event_buf, pmadapter->event_body,
+               pevent->event_len);
+        wlan_recv_event(pmpriv, MLAN_EVENT_ID_FW_BW_CHANGED, pevent);
+        break;
+
+#ifdef WFD_SUPPORT
+    case EVENT_WFD_GENERIC_EVENT:
+    case EVENT_WFD_SERVICE_DISCOVERY:
+        PRINTM(MEVENT, "EVENT: WFD event %d\n", eventcause);
+        /* Allocate memory for event buffer */
+        ret =
+            pcb->moal_malloc(pmadapter->pmoal_handle, MAX_EVENT_SIZE,
+                             MLAN_MEM_DEF, &evt_buf);
+        if ((ret == MLAN_STATUS_SUCCESS) && evt_buf) {
+            pevent = (pmlan_event) evt_buf;
+            pevent->bss_index = pmpriv->bss_index;
+            pevent->event_id = MLAN_EVENT_ID_DRV_PASSTHRU;
+            pevent->event_len = pmbuf->data_len;
+            memcpy(pmadapter, (t_u8 *) pevent->event_buf,
+                   pmbuf->pbuf + pmbuf->data_offset, pevent->event_len);
+            wlan_recv_event(pmpriv, pevent->event_id, pevent);
+            pcb->moal_mfree(pmadapter->pmoal_handle, evt_buf);
+        }
+        break;
+#endif /* WFD_SUPPORT */
+
+    default:
+        PRINTM(MEVENT, "EVENT: unknown event id: %#x\n", eventcause);
+        wlan_recv_event(pmpriv, MLAN_EVENT_ID_FW_UNKNOWN, MNULL);
+        break;
+    }
+
+    LEAVE();
+    return ret;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_sta_ioctl.c linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_sta_ioctl.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_sta_ioctl.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_sta_ioctl.c	2017-09-23 03:42:50.146674673 +0800
@@ -0,0 +1,5120 @@
+/** @file mlan_sta_ioctl.c
+ *  
+ *  @brief This file contains the functions for station ioctl.
+ * 
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ *
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/******************************************************
+Change log:
+    10/21/2008: initial version
+******************************************************/
+
+#include "mlan.h"
+#include "mlan_join.h"
+#include "mlan_util.h"
+#include "mlan_fw.h"
+#include "mlan_main.h"
+#include "mlan_wmm.h"
+#include "mlan_11n.h"
+#include "mlan_11h.h"
+
+/********************************************************
+                Local Variables
+********************************************************/
+
+/********************************************************
+                Global Variables
+********************************************************/
+
+/********************************************************
+                Local Functions
+********************************************************/
+/** 
+ *  @brief enable adhoc aes key 
+ *
+ *  @param pmpriv	A pointer to mlan_private structure
+ *
+ *  @return		N/A
+ */
+static void
+wlan_enable_aes_key(pmlan_private pmpriv)
+{
+    mlan_ds_encrypt_key encrypt_key;
+    if (pmpriv->aes_key.key_param_set.key_len != WPA_AES_KEY_LEN)
+        return;
+
+    memset(pmpriv->adapter, &encrypt_key, 0, sizeof(mlan_ds_encrypt_key));
+    encrypt_key.key_len = WPA_AES_KEY_LEN;
+    encrypt_key.key_index = MLAN_KEY_INDEX_UNICAST;
+    memcpy(pmpriv->adapter, encrypt_key.key_material,
+           pmpriv->aes_key.key_param_set.key, encrypt_key.key_len);
+    wlan_prepare_cmd(pmpriv, HostCmd_CMD_802_11_KEY_MATERIAL,
+                     HostCmd_ACT_GEN_SET, KEY_INFO_ENABLED, MNULL,
+                     &encrypt_key);
+    encrypt_key.key_index &= ~MLAN_KEY_INDEX_UNICAST;
+    wlan_prepare_cmd(pmpriv, HostCmd_CMD_802_11_KEY_MATERIAL,
+                     HostCmd_ACT_GEN_SET,
+                     KEY_INFO_ENABLED, MNULL, &encrypt_key);
+    return;
+}
+
+/** 
+ *  @brief Get signal information
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_get_info_signal(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    pmlan_private pmpriv = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    if (pioctl_req != MNULL) {
+        pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    } else {
+        PRINTM(MERROR, "MLAN IOCTL information is not present\n");
+        ret = MLAN_STATUS_FAILURE;
+        goto exit;
+    }
+
+    /* Check information buffer length of MLAN IOCTL */
+    if (pioctl_req->buf_len < sizeof(mlan_ds_get_signal)) {
+        PRINTM(MWARN, "MLAN IOCTL information buffer length is too short.\n");
+        pioctl_req->data_read_written = 0;
+        pioctl_req->buf_len_needed = sizeof(mlan_ds_get_signal);
+        pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        ret = MLAN_STATUS_RESOURCE;
+        goto exit;
+    }
+
+    /* Signal info can be obtained only if connected */
+    if (pmpriv->media_connected == MFALSE) {
+        PRINTM(MINFO, "Can not get signal in disconnected state\n");
+        pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        ret = MLAN_STATUS_FAILURE;
+        goto exit;
+    }
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_RSSI_INFO,
+                           HostCmd_ACT_GEN_GET,
+                           0, (t_void *) pioctl_req, MNULL);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+  exit:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Get statistics information
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_get_info_stats(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    pmlan_private pmpriv = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    if (pioctl_req != MNULL) {
+        pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    } else {
+        PRINTM(MERROR, "MLAN IOCTL information is not present\n");
+        ret = MLAN_STATUS_FAILURE;
+        goto exit;
+    }
+
+    /* Check information buffer length of MLAN IOCTL */
+    if (pioctl_req->buf_len < sizeof(mlan_ds_get_stats)) {
+        PRINTM(MWARN, "MLAN IOCTL information buffer length is too short.\n");
+        pioctl_req->data_read_written = 0;
+        pioctl_req->buf_len_needed = sizeof(mlan_ds_get_stats);
+        pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        ret = MLAN_STATUS_RESOURCE;
+        goto exit;
+    }
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_802_11_GET_LOG,
+                           HostCmd_ACT_GEN_GET,
+                           0, (t_void *) pioctl_req, MNULL);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+  exit:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Get BSS information
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success
+ */
+static mlan_status
+wlan_get_info_bss_info(IN pmlan_adapter pmadapter,
+                       IN pmlan_ioctl_req pioctl_req)
+{
+    pmlan_private pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ds_get_info *info;
+    BSSDescriptor_t *pbss_desc;
+    t_s32 tbl_idx = 0;
+
+    ENTER();
+
+    /* Get current BSS info */
+    pbss_desc = &pmpriv->curr_bss_params.bss_descriptor;
+    info = (mlan_ds_get_info *) pioctl_req->pbuf;
+
+    /* BSS mode */
+    info->param.bss_info.bss_mode = pmpriv->bss_mode;
+
+    /* SSID */
+    memcpy(pmadapter, &info->param.bss_info.ssid, &pbss_desc->ssid,
+           sizeof(mlan_802_11_ssid));
+
+    /* BSSID */
+    memcpy(pmadapter, &info->param.bss_info.bssid, &pbss_desc->mac_address,
+           MLAN_MAC_ADDR_LENGTH);
+
+    /* Channel */
+    info->param.bss_info.bss_chan = pbss_desc->channel;
+
+    /* Band */
+    info->param.bss_info.bss_band = (t_u8) pbss_desc->bss_band;
+
+    /* Region code */
+    info->param.bss_info.region_code = pmadapter->region_code;
+
+    /* Scan table index if connected */
+    info->param.bss_info.scan_table_idx = 0;
+    if (pmpriv->media_connected == MTRUE) {
+        tbl_idx =
+            wlan_find_ssid_in_list(pmpriv, &pbss_desc->ssid,
+                                   pbss_desc->mac_address, pmpriv->bss_mode);
+        if (tbl_idx >= 0)
+            info->param.bss_info.scan_table_idx = tbl_idx;
+    }
+
+    /* Connection status */
+    info->param.bss_info.media_connected = pmpriv->media_connected;
+
+    /* Radio status */
+    info->param.bss_info.radio_on = pmadapter->radio_on;
+
+    /* Tx power information */
+    info->param.bss_info.max_power_level = pmpriv->max_tx_power_level;
+    info->param.bss_info.min_power_level = pmpriv->min_tx_power_level;
+
+    /* AdHoc state */
+    info->param.bss_info.adhoc_state = pmpriv->adhoc_state;
+
+    /* Last beacon NF */
+    info->param.bss_info.bcn_nf_last = pmpriv->bcn_nf_last;
+
+    /* wep status */
+    if (pmpriv->sec_info.wep_status == Wlan802_11WEPEnabled)
+        info->param.bss_info.wep_status = MTRUE;
+    else
+        info->param.bss_info.wep_status = MFALSE;
+
+    info->param.bss_info.is_hs_configured = pmadapter->is_hs_configured;
+
+    /* Capability Info */
+    info->param.bss_info.capability_info = 0;
+    memcpy(pmadapter, &info->param.bss_info.capability_info,
+           &pbss_desc->cap_info, sizeof(info->param.bss_info.capability_info));
+
+    /* Listen Interval */
+    info->param.bss_info.listen_interval = pmpriv->listen_interval;
+
+    /* Association ID */
+    if (pmpriv->assoc_rsp_buf)
+        info->param.bss_info.assoc_id =
+            (t_u16) ((IEEEtypes_AssocRsp_t *) pmpriv->assoc_rsp_buf)->a_id;
+    else
+        info->param.bss_info.assoc_id = 0;
+
+    /* AP/Peer supported rates */
+    memset(pmadapter, info->param.bss_info.peer_supp_rates, 0,
+           sizeof(info->param.bss_info.peer_supp_rates));
+    memcpy(pmadapter, info->param.bss_info.peer_supp_rates,
+           pbss_desc->supported_rates,
+           MIN(sizeof(info->param.bss_info.peer_supp_rates),
+               sizeof(pbss_desc->supported_rates)));
+
+    pioctl_req->data_read_written =
+        sizeof(mlan_bss_info) + MLAN_SUB_COMMAND_SIZE;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Get information handler
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static mlan_status
+wlan_get_info_ioctl(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    mlan_ds_get_info *pget_info = MNULL;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+
+    ENTER();
+
+    pget_info = (mlan_ds_get_info *) pioctl_req->pbuf;
+
+    switch (pget_info->sub_command) {
+    case MLAN_OID_GET_STATS:
+        status = wlan_get_info_stats(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_GET_SIGNAL:
+        status = wlan_get_info_signal(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_GET_FW_INFO:
+        pioctl_req->data_read_written =
+            sizeof(mlan_fw_info) + MLAN_SUB_COMMAND_SIZE;
+        pget_info->param.fw_info.fw_ver = pmadapter->fw_release_number;
+        memcpy(pmadapter, &pget_info->param.fw_info.mac_addr, pmpriv->curr_addr,
+               MLAN_MAC_ADDR_LENGTH);
+        pget_info->param.fw_info.hw_dev_mcs_support =
+            pmadapter->hw_dev_mcs_support;
+        break;
+    case MLAN_OID_GET_BSS_INFO:
+        status = wlan_get_info_bss_info(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_GET_DEBUG_INFO:
+        status = wlan_get_info_debug_info(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_GET_VER_EXT:
+        status = wlan_get_info_ver_ext(pmadapter, pioctl_req);
+        break;
+    default:
+        pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        status = MLAN_STATUS_FAILURE;
+        break;
+    }
+
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Set/Get SNMP MIB handler
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_snmp_mib_ioctl(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    pmlan_private pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    t_u16 cmd_action = 0;
+    t_u16 cmd_oid = 0;
+    mlan_ds_snmp_mib *mib = MNULL;
+    t_u32 value = 0;
+
+    ENTER();
+
+    if (pioctl_req->buf_len < sizeof(mlan_ds_snmp_mib)) {
+        PRINTM(MWARN, "MLAN IOCTL information buffer length is too short.\n");
+        pioctl_req->data_read_written = 0;
+        pioctl_req->buf_len_needed = sizeof(mlan_ds_snmp_mib);
+        pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        ret = MLAN_STATUS_RESOURCE;
+        goto exit;
+    }
+
+    mib = (mlan_ds_snmp_mib *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_SET)
+        cmd_action = HostCmd_ACT_GEN_SET;
+    else
+        cmd_action = HostCmd_ACT_GEN_GET;
+
+    switch (mib->sub_command) {
+    case MLAN_OID_SNMP_MIB_RTS_THRESHOLD:
+        value = mib->param.rts_threshold;
+        cmd_oid = RtsThresh_i;
+        break;
+    case MLAN_OID_SNMP_MIB_FRAG_THRESHOLD:
+        value = mib->param.frag_threshold;
+        cmd_oid = FragThresh_i;
+        break;
+    case MLAN_OID_SNMP_MIB_RETRY_COUNT:
+        value = mib->param.retry_count;
+        cmd_oid = ShortRetryLim_i;
+        break;
+    }
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_802_11_SNMP_MIB,
+                           cmd_action, cmd_oid, (t_void *) pioctl_req, &value);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+  exit:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get Infra/Ad-hoc band configuration
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static mlan_status
+wlan_radio_ioctl_band_cfg(IN pmlan_adapter pmadapter,
+                          IN pmlan_ioctl_req pioctl_req)
+{
+    t_u8 infra_band = 0;
+    t_u8 adhoc_band = 0;
+    t_u32 adhoc_channel = 0;
+    mlan_ds_radio_cfg *radio_cfg = MNULL;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+
+    ENTER();
+
+    radio_cfg = (mlan_ds_radio_cfg *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_SET) {
+        infra_band = (t_u8) radio_cfg->param.band_cfg.config_bands;
+        adhoc_band = (t_u8) radio_cfg->param.band_cfg.adhoc_start_band;
+        adhoc_channel = radio_cfg->param.band_cfg.adhoc_channel;
+
+        /* SET Infra band */
+        if ((infra_band | pmadapter->fw_bands) & ~pmadapter->fw_bands) {
+            pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+            LEAVE();
+            return MLAN_STATUS_FAILURE;
+        }
+
+        /* SET Ad-hoc Band */
+        if ((adhoc_band | pmadapter->fw_bands) & ~pmadapter->fw_bands) {
+            pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+            LEAVE();
+            return MLAN_STATUS_FAILURE;
+        }
+        if (!adhoc_band)
+            adhoc_band = pmadapter->adhoc_start_band;
+
+        if (wlan_set_regiontable
+            (pmpriv, (t_u8) pmadapter->region_code, infra_band | adhoc_band)) {
+            pioctl_req->status_code = MLAN_ERROR_IOCTL_FAIL;
+            LEAVE();
+            return MLAN_STATUS_FAILURE;
+        }
+
+        if (wlan_11d_set_universaltable(pmpriv, infra_band | adhoc_band)) {
+            pioctl_req->status_code = MLAN_ERROR_IOCTL_FAIL;
+            LEAVE();
+            return MLAN_STATUS_FAILURE;
+        }
+        pmadapter->config_bands = infra_band;
+
+        pmadapter->adhoc_start_band = adhoc_band;
+        pmpriv->intf_state_11h.adhoc_auto_sel_chan = MFALSE;
+        pmadapter->chan_offset =
+            (t_u8) radio_cfg->param.band_cfg.sec_chan_offset;
+        /* 
+         * If no adhoc_channel is supplied verify if the existing adhoc channel
+         * compiles with new adhoc_band
+         */
+        if (!adhoc_channel) {
+            if (!wlan_find_cfp_by_band_and_channel
+                (pmadapter, pmadapter->adhoc_start_band,
+                 pmpriv->adhoc_channel)) {
+                /* Pass back the default channel */
+                radio_cfg->param.band_cfg.adhoc_channel =
+                    DEFAULT_AD_HOC_CHANNEL;
+                if ((pmadapter->adhoc_start_band & BAND_A)
+                    || (pmadapter->adhoc_start_band & BAND_AN)
+                    ) {
+                    radio_cfg->param.band_cfg.adhoc_channel =
+                        DEFAULT_AD_HOC_CHANNEL_A;
+                }
+            }
+        } else {                /* Return error if adhoc_band and adhoc_channel 
+                                   combination is invalid */
+            if (!wlan_find_cfp_by_band_and_channel
+                (pmadapter, pmadapter->adhoc_start_band,
+                 (t_u16) adhoc_channel)) {
+                pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+                LEAVE();
+                return MLAN_STATUS_FAILURE;
+            }
+            pmpriv->adhoc_channel = (t_u8) adhoc_channel;
+        }
+        if ((adhoc_band & BAND_GN)
+            || (adhoc_band & BAND_AN)
+            ) {
+            pmadapter->adhoc_11n_enabled = MTRUE;
+        } else {
+            pmadapter->adhoc_11n_enabled = MFALSE;
+        }
+    } else {
+        radio_cfg->param.band_cfg.config_bands = pmadapter->config_bands;       /* Infra 
+                                                                                   Bands 
+                                                                                 */
+        radio_cfg->param.band_cfg.adhoc_start_band = pmadapter->adhoc_start_band;       /* Adhoc 
+                                                                                           Band 
+                                                                                         */
+        radio_cfg->param.band_cfg.adhoc_channel = pmpriv->adhoc_channel;        /* Adhoc 
+                                                                                   Channel 
+                                                                                 */
+        radio_cfg->param.band_cfg.fw_bands = pmadapter->fw_bands;       /* FW
+                                                                           support 
+                                                                           Bands 
+                                                                         */
+        radio_cfg->param.band_cfg.sec_chan_offset = pmadapter->chan_offset;     /* secondary 
+                                                                                   channel 
+                                                                                   offset 
+                                                                                 */
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief Set/Get antenna configuration
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_radio_ioctl_ant_cfg(IN pmlan_adapter pmadapter,
+                         IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ds_radio_cfg *radio_cfg = MNULL;
+    t_u16 cmd_action = 0;
+    t_u16 antenna_mode;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+
+    ENTER();
+
+    radio_cfg = (mlan_ds_radio_cfg *) pioctl_req->pbuf;
+
+    if (pioctl_req->action == MLAN_ACT_SET) {
+        /* User input validation */
+        if ((!radio_cfg->param.antenna ||
+             radio_cfg->param.antenna & ~RF_ANTENNA_MASK(pmadapter->
+                                                         number_of_antenna)) &&
+            (radio_cfg->param.antenna != RF_ANTENNA_AUTO ||
+             pmadapter->number_of_antenna <= 1)) {
+            PRINTM(MERROR, "Invalid antenna setting\n");
+            pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+            ret = MLAN_STATUS_FAILURE;
+            goto exit;
+        }
+        cmd_action = HostCmd_ACT_GEN_SET;
+    } else
+        cmd_action = HostCmd_ACT_GEN_GET;
+
+    /* Cast it to t_u16, antenna mode for command HostCmd_CMD_802_11_RF_ANTENNA 
+       requires 2 bytes */
+    antenna_mode = (t_u16) radio_cfg->param.antenna;
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_802_11_RF_ANTENNA,
+                           cmd_action,
+                           0, (t_void *) pioctl_req, (t_void *) & antenna_mode);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+  exit:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Radio command handler
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static mlan_status
+wlan_radio_ioctl(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    mlan_ds_radio_cfg *radio_cfg = MNULL;
+
+    ENTER();
+
+    if (pioctl_req->buf_len < sizeof(mlan_ds_radio_cfg)) {
+        PRINTM(MWARN, "MLAN IOCTL information buffer length is too short.\n");
+        pioctl_req->data_read_written = 0;
+        pioctl_req->buf_len_needed = sizeof(mlan_ds_radio_cfg);
+        pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        LEAVE();
+        return MLAN_STATUS_RESOURCE;
+    }
+    radio_cfg = (mlan_ds_radio_cfg *) pioctl_req->pbuf;
+    switch (radio_cfg->sub_command) {
+    case MLAN_OID_RADIO_CTRL:
+        status = wlan_radio_ioctl_radio_ctl(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_BAND_CFG:
+        status = wlan_radio_ioctl_band_cfg(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_ANT_CFG:
+        status = wlan_radio_ioctl_ant_cfg(pmadapter, pioctl_req);
+        break;
+    default:
+        pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        status = MLAN_STATUS_FAILURE;
+        break;
+    }
+
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Set/Get MAC address
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_bss_ioctl_mac_address(IN pmlan_adapter pmadapter,
+                           IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_bss *bss = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    ENTER();
+    bss = (mlan_ds_bss *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_GET) {
+        pioctl_req->data_read_written =
+            MLAN_MAC_ADDR_LENGTH + MLAN_SUB_COMMAND_SIZE;
+        memcpy(pmadapter, &bss->param.mac_addr, pmpriv->curr_addr,
+               MLAN_MAC_ADDR_LENGTH);
+        ret = MLAN_STATUS_SUCCESS;
+        goto exit;
+    }
+
+    memcpy(pmadapter, pmpriv->curr_addr, &bss->param.mac_addr,
+           MLAN_MAC_ADDR_LENGTH);
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_802_11_MAC_ADDRESS,
+                           HostCmd_ACT_GEN_SET,
+                           0, (t_void *) pioctl_req, MNULL);
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+  exit:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set multicast list
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_bss_ioctl_set_multicast_list(IN pmlan_adapter pmadapter,
+                                  IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_bss *bss = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    t_u16 old_pkt_filter;
+
+    ENTER();
+
+    old_pkt_filter = pmpriv->curr_pkt_filter;
+    bss = (mlan_ds_bss *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_GET) {
+        pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        ret = MLAN_STATUS_FAILURE;
+        goto exit;
+    }
+    pioctl_req->data_read_written =
+        sizeof(mlan_multicast_list) + MLAN_SUB_COMMAND_SIZE;
+    if (bss->param.multicast_list.mode == MLAN_PROMISC_MODE) {
+        PRINTM(MINFO, "Enable Promiscuous mode\n");
+        pmpriv->curr_pkt_filter |= HostCmd_ACT_MAC_PROMISCUOUS_ENABLE;
+        pmpriv->curr_pkt_filter &= ~HostCmd_ACT_MAC_ALL_MULTICAST_ENABLE;
+    } else {
+        /* Multicast */
+        pmpriv->curr_pkt_filter &= ~HostCmd_ACT_MAC_PROMISCUOUS_ENABLE;
+        if (bss->param.multicast_list.mode == MLAN_ALL_MULTI_MODE) {
+            PRINTM(MINFO, "Enabling All Multicast!\n");
+            pmpriv->curr_pkt_filter |= HostCmd_ACT_MAC_ALL_MULTICAST_ENABLE;
+        } else {
+            pmpriv->curr_pkt_filter &= ~HostCmd_ACT_MAC_ALL_MULTICAST_ENABLE;
+            if (bss->param.multicast_list.num_multicast_addr) {
+                PRINTM(MINFO, "Set multicast list=%d\n",
+                       bss->param.multicast_list.num_multicast_addr);
+                /* Set multicast addresses to firmware */
+                if (old_pkt_filter == pmpriv->curr_pkt_filter) {
+                    /* Send request to firmware */
+                    ret =
+                        wlan_prepare_cmd(pmpriv, HostCmd_CMD_MAC_MULTICAST_ADR,
+                                         HostCmd_ACT_GEN_SET, 0,
+                                         (t_void *) pioctl_req,
+                                         &bss->param.multicast_list);
+                    if (ret == MLAN_STATUS_SUCCESS)
+                        ret = MLAN_STATUS_PENDING;
+                } else {
+                    /* Send request to firmware */
+                    ret =
+                        wlan_prepare_cmd(pmpriv, HostCmd_CMD_MAC_MULTICAST_ADR,
+                                         HostCmd_ACT_GEN_SET, 0, MNULL,
+                                         &bss->param.multicast_list);
+                }
+            }
+        }
+    }
+    PRINTM(MINFO, "old_pkt_filter=0x%lx, curr_pkt_filter=0x%lx\n",
+           old_pkt_filter, pmpriv->curr_pkt_filter);
+    if (old_pkt_filter != pmpriv->curr_pkt_filter) {
+        ret = wlan_prepare_cmd(pmpriv,
+                               HostCmd_CMD_MAC_CONTROL,
+                               HostCmd_ACT_GEN_SET,
+                               0,
+                               (t_void *) pioctl_req, &pmpriv->curr_pkt_filter);
+        if (ret == MLAN_STATUS_SUCCESS)
+            ret = MLAN_STATUS_PENDING;
+    }
+
+  exit:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Get channel list
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static mlan_status
+wlan_bss_ioctl_get_channel_list(IN pmlan_adapter pmadapter,
+                                IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_bss *bss = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    chan_freq_power_t *cfp;
+    t_u32 i, j;
+
+    ENTER();
+
+    bss = (mlan_ds_bss *) pioctl_req->pbuf;
+    if (pioctl_req->action != MLAN_ACT_GET) {
+        pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+    if ((wlan_11d_is_enabled(pmpriv) &&
+         pmpriv->media_connected == MTRUE) &&
+        ((pmpriv->bss_mode == MLAN_BSS_MODE_INFRA) ||
+         (pmpriv->bss_mode == MLAN_BSS_MODE_IBSS &&
+          pmpriv->adhoc_state != ADHOC_STARTED))
+        ) {
+        t_u8 chan_no;
+        t_u8 band;
+
+        parsed_region_chan_11d_t *parsed_region_chan = MNULL;
+        parsed_region_chan_11d_t region_chan;
+
+        BSSDescriptor_t *pbss_desc = &pmpriv->curr_bss_params.bss_descriptor;
+
+        memset(pmadapter, &region_chan, 0, sizeof(parsed_region_chan_11d_t));
+
+        /* If country IE is present in the associated AP then return the
+           channel list from country IE else return it from the learning table */
+
+        if (wlan_11d_parse_domain_info(pmadapter, &pbss_desc->country_info,
+                                       (t_u8) pbss_desc->bss_band,
+                                       &region_chan) == MLAN_STATUS_SUCCESS) {
+
+            parsed_region_chan = &region_chan;
+        } else {
+            parsed_region_chan = &pmadapter->parsed_region_chan;
+        }
+
+        PRINTM(MINFO, "no_of_chan=%d\n", parsed_region_chan->no_of_chan);
+
+        for (i = 0; (bss->param.chanlist.num_of_chan < MLAN_MAX_CHANNEL_NUM)
+             && (i < parsed_region_chan->no_of_chan); i++) {
+            chan_no = parsed_region_chan->chan_pwr[i].chan;
+            band = parsed_region_chan->chan_pwr[i].band;
+            PRINTM(MINFO, "band=%d, chan_no=%d\n", band, chan_no);
+            bss->param.chanlist.cf[bss->param.chanlist.num_of_chan].channel =
+                (t_u32) chan_no;
+            bss->param.chanlist.cf[bss->param.chanlist.num_of_chan].freq =
+                (t_u32) wlan_11d_chan_2_freq(pmadapter, chan_no, band);
+            bss->param.chanlist.num_of_chan++;
+        }
+    } else {
+        for (j = 0; (bss->param.chanlist.num_of_chan < MLAN_MAX_CHANNEL_NUM)
+             && (j <
+                 sizeof(pmadapter->region_channel) /
+                 sizeof(pmadapter->region_channel[0])); j++) {
+            cfp = pmadapter->region_channel[j].pcfp;
+            for (i = 0; (bss->param.chanlist.num_of_chan < MLAN_MAX_CHANNEL_NUM)
+                 && pmadapter->region_channel[j].valid
+                 && cfp && (i < pmadapter->region_channel[j].num_cfp); i++) {
+                bss->param.chanlist.cf[bss->param.chanlist.num_of_chan].
+                    channel = (t_u32) cfp->channel;
+                bss->param.chanlist.cf[bss->param.chanlist.num_of_chan].freq =
+                    (t_u32) cfp->freq;
+                bss->param.chanlist.num_of_chan++;
+                cfp++;
+            }
+        }
+    }
+
+    PRINTM(MINFO, "num of channel=%d\n", bss->param.chanlist.num_of_chan);
+
+    LEAVE();
+    return ret;
+}
+
+/** Highest channel used in 2.4GHz band */
+#define MAX_CHANNEL_BAND_B    (14)
+
+/** Highest frequency used in 2.4GHz band */
+#define MAX_FREQUENCY_BAND_B  (2484)
+
+/** 
+ *  @brief Set/Get BSS channel
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static mlan_status
+wlan_bss_ioctl_channel(IN pmlan_adapter pmadapter,
+                       IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_bss *bss = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    chan_freq_power_t *cfp = MNULL;
+    ENTER();
+    bss = (mlan_ds_bss *) pioctl_req->pbuf;
+
+    if (pioctl_req->action == MLAN_ACT_GET) {
+        cfp = wlan_find_cfp_by_band_and_channel(pmadapter,
+                                                pmpriv->curr_bss_params.band,
+                                                (t_u16) pmpriv->curr_bss_params.
+                                                bss_descriptor.channel);
+        if (cfp) {
+            bss->param.bss_chan.channel = cfp->channel;
+            bss->param.bss_chan.freq = cfp->freq;
+        } else {
+            pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+            ret = MLAN_STATUS_FAILURE;
+        }
+        pioctl_req->data_read_written =
+            sizeof(chan_freq) + MLAN_SUB_COMMAND_SIZE;
+        LEAVE();
+        return ret;
+    }
+    if (!bss->param.bss_chan.channel && !bss->param.bss_chan.freq) {
+        pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+    if (pmadapter->adhoc_start_band & BAND_AN)
+        pmadapter->adhoc_start_band = BAND_G | BAND_B | BAND_GN;
+    else if (pmadapter->adhoc_start_band & BAND_A)
+        pmadapter->adhoc_start_band = BAND_G | BAND_B;
+    if (bss->param.bss_chan.channel) {
+        if (bss->param.bss_chan.channel <= MAX_CHANNEL_BAND_B)
+            cfp =
+                wlan_find_cfp_by_band_and_channel(pmadapter, BAND_B,
+                                                  (t_u16) bss->param.bss_chan.
+                                                  channel);
+        if (!cfp) {
+            cfp =
+                wlan_find_cfp_by_band_and_channel(pmadapter, BAND_A,
+                                                  (t_u16) bss->param.bss_chan.
+                                                  channel);
+            if (cfp) {
+                if (pmadapter->adhoc_11n_enabled)
+                    pmadapter->adhoc_start_band = BAND_A | BAND_AN;
+                else
+                    pmadapter->adhoc_start_band = BAND_A;
+            }
+        }
+    } else {
+        if (bss->param.bss_chan.freq <= MAX_FREQUENCY_BAND_B)
+            cfp =
+                wlan_find_cfp_by_band_and_freq(pmadapter, BAND_B,
+                                               bss->param.bss_chan.freq);
+        if (!cfp) {
+            cfp =
+                wlan_find_cfp_by_band_and_freq(pmadapter, BAND_A,
+                                               bss->param.bss_chan.freq);
+            if (cfp) {
+                if (pmadapter->adhoc_11n_enabled)
+                    pmadapter->adhoc_start_band = BAND_A | BAND_AN;
+                else
+                    pmadapter->adhoc_start_band = BAND_A;
+            }
+        }
+    }
+    if (!cfp || !cfp->channel) {
+        PRINTM(MERROR, "Invalid channel/freq\n");
+        if (pioctl_req)
+            pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+
+    }
+    pmpriv->adhoc_channel = (t_u8) cfp->channel;
+    pmpriv->intf_state_11h.adhoc_auto_sel_chan = MFALSE;
+    bss->param.bss_chan.channel = cfp->channel;
+    bss->param.bss_chan.freq = cfp->freq;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get BSS mode
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_bss_ioctl_mode(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_bss *bss = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    bss = (mlan_ds_bss *) pioctl_req->pbuf;
+
+    ENTER();
+
+    if (pioctl_req->action == MLAN_ACT_GET) {
+        bss->param.bss_mode = pmpriv->bss_mode;
+        pioctl_req->data_read_written = sizeof(t_u32) + MLAN_SUB_COMMAND_SIZE;
+        goto exit;
+    }
+
+    if ((pmpriv->bss_mode == bss->param.bss_mode) ||
+        (bss->param.bss_mode == MLAN_BSS_MODE_AUTO)) {
+        PRINTM(MINFO, "Already set to required mode! No change!\n");
+        pmpriv->bss_mode = bss->param.bss_mode;
+        goto exit;
+    }
+
+    if (pmpriv->bss_mode != MLAN_BSS_MODE_AUTO)
+        ret = wlan_disconnect(pmpriv, MNULL, MNULL);
+    else
+        ret = wlan_disconnect(pmpriv, pioctl_req, MNULL);
+
+    if (pmpriv->sec_info.authentication_mode != MLAN_AUTH_MODE_AUTO)
+        pmpriv->sec_info.authentication_mode = MLAN_AUTH_MODE_OPEN;
+    pmpriv->bss_mode = bss->param.bss_mode;
+
+    pmpriv->port_ctrl_mode = MFALSE;
+
+    if ((pmpriv->bss_mode != MLAN_BSS_MODE_AUTO)
+        ) {
+        ret = wlan_prepare_cmd(pmpriv,
+                               HostCmd_CMD_SET_BSS_MODE,
+                               HostCmd_ACT_GEN_SET,
+                               0, (t_void *) pioctl_req, MNULL);
+        if (ret == MLAN_STATUS_SUCCESS)
+            ret = MLAN_STATUS_PENDING;
+    }
+  exit:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Start BSS
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_bss_ioctl_start(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_bss *bss = (mlan_ds_bss *) pioctl_req->pbuf;
+    t_s32 i = -1;
+    t_u8 zero_mac[] = { 0, 0, 0, 0, 0, 0 };
+
+    ENTER();
+
+    /* Before ASSOC REQ, If "port ctrl" mode is enabled, move the port to
+       CLOSED state */
+    if (pmpriv->port_ctrl_mode == MTRUE) {
+        PRINTM(MINFO, "bss_ioctl_start(): port_state=CLOSED\n");
+        pmpriv->port_open = MFALSE;
+    }
+    pmpriv->scan_block = MFALSE;
+
+    if (pmpriv->bss_mode == MLAN_BSS_MODE_INFRA) {
+        /* Infra mode */
+        ret = wlan_disconnect(pmpriv, MNULL, MNULL);
+        if (ret)
+            goto start_ssid_done;
+        if (!bss->param.ssid_bssid.idx ||
+            bss->param.ssid_bssid.idx > pmadapter->num_in_scan_table) {
+            /* Search for the requested SSID in the scan table */
+            if (bss->param.ssid_bssid.ssid.ssid_len) {
+                if (memcmp
+                    (pmadapter, &bss->param.ssid_bssid.bssid, zero_mac,
+                     sizeof(zero_mac)))
+                    i = wlan_find_ssid_in_list(pmpriv,
+                                               &bss->param.ssid_bssid.ssid,
+                                               (t_u8 *) & bss->param.ssid_bssid.
+                                               bssid, MLAN_BSS_MODE_INFRA);
+                else
+                    i = wlan_find_ssid_in_list(pmpriv,
+                                               &bss->param.ssid_bssid.ssid,
+                                               MNULL, MLAN_BSS_MODE_INFRA);
+            } else {
+                i = wlan_find_bssid_in_list(pmpriv,
+                                            (t_u8 *) & bss->param.ssid_bssid.
+                                            bssid, MLAN_BSS_MODE_INFRA);
+            }
+        } else {
+            /* use bsslist index number to assoicate */
+            i = wlan_is_network_compatible(pmpriv,
+                                           bss->param.ssid_bssid.idx - 1,
+                                           pmpriv->bss_mode);
+        }
+        if (i >= 0) {
+            PRINTM(MINFO, "SSID found in scan list ... associating...\n");
+
+            /* Clear any past association response stored for application
+               retrieval */
+            pmpriv->assoc_rsp_size = 0;
+            ret = wlan_associate(pmpriv, pioctl_req,
+                                 &pmadapter->pscan_table[i]);
+            if (ret)
+                goto start_ssid_done;
+        } else {                /* i >= 0 */
+            PRINTM(MERROR,
+                   "SSID not found in scan list: ssid=%s, %02x:%02x:%02x:%02x:%02x:%02x, idx=%d\n",
+                   bss->param.ssid_bssid.ssid.ssid,
+                   bss->param.ssid_bssid.bssid[0],
+                   bss->param.ssid_bssid.bssid[1],
+                   bss->param.ssid_bssid.bssid[2],
+                   bss->param.ssid_bssid.bssid[3],
+                   bss->param.ssid_bssid.bssid[4],
+                   bss->param.ssid_bssid.bssid[5],
+                   (int) bss->param.ssid_bssid.idx);
+            pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+            ret = MLAN_STATUS_FAILURE;
+            goto start_ssid_done;
+        }
+    } else {
+        /* Adhoc mode */
+        /* If the requested SSID matches current SSID, return */
+        if (bss->param.ssid_bssid.ssid.ssid_len &&
+            (!wlan_ssid_cmp
+             (pmadapter, &pmpriv->curr_bss_params.bss_descriptor.ssid,
+              &bss->param.ssid_bssid.ssid))) {
+            ret = MLAN_STATUS_SUCCESS;
+            goto start_ssid_done;
+        }
+
+        /* Exit Adhoc mode first */
+        PRINTM(MINFO, "Sending Adhoc Stop\n");
+        ret = wlan_disconnect(pmpriv, MNULL, MNULL);
+        if (ret)
+            goto start_ssid_done;
+
+        pmpriv->adhoc_is_link_sensed = MFALSE;
+
+        if (!bss->param.ssid_bssid.idx ||
+            bss->param.ssid_bssid.idx > pmadapter->num_in_scan_table) {
+            /* Search for the requested network in the scan table */
+            if (bss->param.ssid_bssid.ssid.ssid_len) {
+                i = wlan_find_ssid_in_list(pmpriv,
+                                           &bss->param.ssid_bssid.ssid,
+                                           MNULL, MLAN_BSS_MODE_IBSS);
+            } else {
+                i = wlan_find_bssid_in_list(pmpriv,
+                                            (t_u8 *) & bss->param.ssid_bssid.
+                                            bssid, MLAN_BSS_MODE_IBSS);
+            }
+        } else {
+            /* use bsslist index number to assoicate */
+            i = wlan_is_network_compatible(pmpriv,
+                                           bss->param.ssid_bssid.idx - 1,
+                                           pmpriv->bss_mode);
+        }
+
+        if (i >= 0) {
+            PRINTM(MINFO, "Network found in scan list ... joining ...\n");
+            ret =
+                wlan_adhoc_join(pmpriv, pioctl_req, &pmadapter->pscan_table[i]);
+            if (ret)
+                goto start_ssid_done;
+            if (pmpriv->adhoc_aes_enabled)
+                wlan_enable_aes_key(pmpriv);
+        } else {                /* i >= 0 */
+            PRINTM(MINFO, "Network not found in the list, "
+                   "creating adhoc with ssid = %s\n",
+                   bss->param.ssid_bssid.ssid.ssid);
+            ret =
+                wlan_adhoc_start(pmpriv, pioctl_req,
+                                 &bss->param.ssid_bssid.ssid);
+            if (ret)
+                goto start_ssid_done;
+            if (pmpriv->adhoc_aes_enabled)
+                wlan_enable_aes_key(pmpriv);
+        }
+    }
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+  start_ssid_done:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Stop BSS
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_bss_ioctl_stop(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_private pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_bss *bss = (mlan_ds_bss *) pioctl_req->pbuf;
+
+    ENTER();
+
+    ret = wlan_disconnect(pmpriv, pioctl_req, &bss->param.bssid);
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get IBSS channel
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_bss_ioctl_ibss_channel(IN pmlan_adapter pmadapter,
+                            IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_bss *bss = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    t_u16 cmd_action;
+
+    ENTER();
+
+    bss = (mlan_ds_bss *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_GET) {
+        if (pmpriv->media_connected == MFALSE) {
+            bss->param.bss_chan.channel = pmpriv->adhoc_channel;
+            goto exit;
+        }
+        cmd_action = HostCmd_ACT_GEN_GET;
+    } else {
+        cmd_action = HostCmd_ACT_GEN_SET;
+        pmpriv->adhoc_channel = (t_u8) bss->param.bss_chan.channel;
+        pmpriv->intf_state_11h.adhoc_auto_sel_chan = MFALSE;
+    }
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_802_11_RF_CHANNEL,
+                           cmd_action,
+                           0,
+                           (t_void *) pioctl_req, &bss->param.bss_chan.channel);
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+  exit:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get beacon interval
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success
+ */
+static mlan_status
+wlan_bss_ioctl_beacon_interval(IN pmlan_adapter pmadapter,
+                               IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_bss *bss = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    ENTER();
+    bss = (mlan_ds_bss *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_GET) {
+        bss->param.bcn_interval = pmpriv->beacon_period;
+        if (pmpriv->media_connected == MTRUE)
+            bss->param.bcn_interval =
+                pmpriv->curr_bss_params.bss_descriptor.beacon_period;
+    } else
+        pmpriv->beacon_period = (t_u16) bss->param.bcn_interval;
+    pioctl_req->data_read_written = sizeof(t_u32) + MLAN_SUB_COMMAND_SIZE;
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get ATIM window
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success
+ */
+static mlan_status
+wlan_bss_ioctl_atim_window(IN pmlan_adapter pmadapter,
+                           IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_bss *bss = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    ENTER();
+    bss = (mlan_ds_bss *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_GET) {
+        bss->param.atim_window = pmpriv->atim_window;
+        if (pmpriv->media_connected == MTRUE)
+            bss->param.atim_window =
+                pmpriv->curr_bss_params.bss_descriptor.atim_window;
+    } else
+        pmpriv->atim_window = (t_u16) bss->param.atim_window;
+
+    pioctl_req->data_read_written = sizeof(t_u32) + MLAN_SUB_COMMAND_SIZE;
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Query embe
+ *
+ *  @param priv                 A pointer to mlan_private structure
+ *  @param pioctl_req           A pointer to ioctl request buffer
+ *
+ *  @return                     MLAN_STATUS_SUCCESS -- success, otherwise fail          
+ */
+static mlan_status
+wlan_query_passphrase(mlan_private * priv, pmlan_ioctl_req pioctl_req)
+{
+    mlan_adapter *pmadapter = priv->adapter;
+    mlan_ds_bss *bss = MNULL;
+    mlan_ssid_bssid *ssid_bssid = MNULL;
+    mlan_ds_passphrase sec_pp;
+    int i = 0;
+    BSSDescriptor_t *pbss_desc;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    bss = (mlan_ds_bss *) pioctl_req->pbuf;
+    ssid_bssid = &bss->param.ssid_bssid;
+
+    memset(pmadapter, &sec_pp, 0, sizeof(mlan_ds_passphrase));
+    sec_pp.psk_type = MLAN_PSK_QUERY;
+    if (ssid_bssid->ssid.ssid_len == 0) {
+        i = wlan_find_bssid_in_list(priv, (t_u8 *) & ssid_bssid->bssid,
+                                    MLAN_BSS_MODE_AUTO);
+        if (i >= 0) {
+            pbss_desc = &pmadapter->pscan_table[i];
+            memcpy(pmadapter, &sec_pp.ssid, &pbss_desc->ssid,
+                   sizeof(mlan_802_11_ssid));
+        } else
+            memcpy(pmadapter, &sec_pp.bssid, &ssid_bssid->bssid,
+                   MLAN_MAC_ADDR_LENGTH);
+    } else {
+        memcpy(pmadapter, &sec_pp.ssid, &ssid_bssid->ssid,
+               sizeof(mlan_802_11_ssid));
+    }
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(priv,
+                           HostCmd_CMD_SUPPLICANT_PMK,
+                           HostCmd_ACT_GEN_GET,
+                           0, (t_void *) pioctl_req, &sec_pp);
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Search for a BSS
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING --success, otherwise fail
+ */
+mlan_status
+wlan_bss_ioctl_find_bss(IN pmlan_adapter pmadapter,
+                        IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    if (pmpriv->ewpa_query) {
+        if (wlan_query_passphrase(pmpriv, pioctl_req) == MLAN_STATUS_SUCCESS) {
+            PRINTM(MINFO, "Find BSS ioctl: query passphrase\n");
+            LEAVE();
+            return MLAN_STATUS_PENDING;
+        }
+    }
+    ret = wlan_find_bss(pmpriv, pioctl_req);
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief BSS command handler
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static mlan_status
+wlan_bss_ioctl(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    mlan_ds_bss *bss = MNULL;
+
+    ENTER();
+
+    if (pioctl_req->buf_len < sizeof(mlan_ds_bss)) {
+        PRINTM(MWARN, "MLAN bss IOCTL length is too short.\n");
+        pioctl_req->data_read_written = 0;
+        pioctl_req->buf_len_needed = sizeof(mlan_ds_bss);
+        pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        LEAVE();
+        return MLAN_STATUS_RESOURCE;
+    }
+
+    bss = (mlan_ds_bss *) pioctl_req->pbuf;
+
+    switch (bss->sub_command) {
+    case MLAN_OID_BSS_START:
+        status = wlan_bss_ioctl_start(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_BSS_STOP:
+        status = wlan_bss_ioctl_stop(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_BSS_MODE:
+        status = wlan_bss_ioctl_mode(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_BSS_CHANNEL:
+        status = wlan_bss_ioctl_channel(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_BSS_CHANNEL_LIST:
+        status = wlan_bss_ioctl_get_channel_list(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_BSS_MAC_ADDR:
+        status = wlan_bss_ioctl_mac_address(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_BSS_MULTICAST_LIST:
+        status = wlan_bss_ioctl_set_multicast_list(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_BSS_FIND_BSS:
+        status = wlan_bss_ioctl_find_bss(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_IBSS_BCN_INTERVAL:
+        status = wlan_bss_ioctl_beacon_interval(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_IBSS_ATIM_WINDOW:
+        status = wlan_bss_ioctl_atim_window(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_IBSS_CHANNEL:
+        status = wlan_bss_ioctl_ibss_channel(pmadapter, pioctl_req);
+        break;
+#if defined(STA_SUPPORT) && defined(UAP_SUPPORT)
+    case MLAN_OID_BSS_ROLE:
+        status = wlan_bss_ioctl_bss_role(pmadapter, pioctl_req);
+        break;
+#endif
+    default:
+        status = MLAN_STATUS_FAILURE;
+        break;
+    }
+
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Get supported rates
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static mlan_status
+wlan_rate_ioctl_get_supported_rate(IN pmlan_adapter pmadapter,
+                                   IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_rate *rate = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+    if (pioctl_req->action != MLAN_ACT_GET) {
+        pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+    rate = (mlan_ds_rate *) pioctl_req->pbuf;
+    if (rate->param.rate_band_cfg.config_bands &&
+        rate->param.rate_band_cfg.bss_mode)
+        wlan_get_active_data_rates(pmpriv, rate->param.rate_band_cfg.bss_mode,
+                                   rate->param.rate_band_cfg.config_bands,
+                                   rate->param.rates);
+    else
+        wlan_get_active_data_rates(pmpriv, pmpriv->bss_mode,
+                                   (pmpriv->bss_mode == MLAN_BSS_MODE_INFRA) ?
+                                   pmadapter->config_bands : pmadapter->
+                                   adhoc_start_band, rate->param.rates);
+    pioctl_req->data_read_written =
+        MLAN_SUPPORTED_RATES + MLAN_SUB_COMMAND_SIZE;
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Get data rates
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_rate_ioctl_get_data_rate(IN pmlan_adapter pmadapter,
+                              IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    if (pioctl_req->action != MLAN_ACT_GET) {
+        ret = MLAN_STATUS_FAILURE;
+        goto exit;
+    }
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_802_11_TX_RATE_QUERY,
+                           HostCmd_ACT_GEN_GET,
+                           0, (t_void *) pioctl_req, MNULL);
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+  exit:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Rate command handler
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_rate_ioctl(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    mlan_ds_rate *rate = MNULL;
+
+    ENTER();
+
+    if (pioctl_req->buf_len < sizeof(mlan_ds_rate)) {
+        PRINTM(MWARN, "MLAN bss IOCTL length is too short.\n");
+        pioctl_req->data_read_written = 0;
+        pioctl_req->buf_len_needed = sizeof(mlan_ds_rate);
+        pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        LEAVE();
+        return MLAN_STATUS_RESOURCE;
+    }
+    rate = (mlan_ds_rate *) pioctl_req->pbuf;
+    switch (rate->sub_command) {
+    case MLAN_OID_RATE_CFG:
+        status = wlan_rate_ioctl_cfg(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_GET_DATA_RATE:
+        status = wlan_rate_ioctl_get_data_rate(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_SUPPORTED_RATES:
+        status = wlan_rate_ioctl_get_supported_rate(pmadapter, pioctl_req);
+        break;
+    default:
+        pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        status = MLAN_STATUS_FAILURE;
+        break;
+    }
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Get Tx power configuration
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param cmd_no	Firmware command number used to retrieve power values
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_power_ioctl_get_power(IN pmlan_adapter pmadapter,
+                           IN t_u16 cmd_no, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+
+    ENTER();
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           cmd_no,
+                           HostCmd_ACT_GEN_GET,
+                           0, (t_void *) pioctl_req, MNULL);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set Tx power configuration
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_power_ioctl_set_power(IN pmlan_adapter pmadapter,
+                           IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_ds_power_cfg *power = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    HostCmd_DS_TXPWR_CFG *txp_cfg = MNULL;
+    MrvlTypes_Power_Group_t *pg_tlv = MNULL;
+    Power_Group_t *pg = MNULL;
+    pmlan_callbacks pcb = &pmadapter->callbacks;
+    t_u8 *buf = MNULL;
+    t_u16 dbm = 0;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+
+    ENTER();
+
+    power = (mlan_ds_power_cfg *) pioctl_req->pbuf;
+    if (!power->param.power_cfg.is_power_auto) {
+        dbm = (t_u16) power->param.power_cfg.power_level;
+        if ((dbm < pmpriv->min_tx_power_level) ||
+            (dbm > pmpriv->max_tx_power_level)) {
+            PRINTM(MERROR,
+                   "The set txpower value %d dBm is out of range (%d dBm-%d dBm)!\n",
+                   dbm, pmpriv->min_tx_power_level, pmpriv->max_tx_power_level);
+            pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+            ret = MLAN_STATUS_FAILURE;
+            goto exit;
+        }
+    }
+
+    ret = pcb->moal_malloc(pmadapter->pmoal_handle,
+                           MRVDRV_SIZE_OF_CMD_BUFFER, MLAN_MEM_DEF, &buf);
+    if (ret != MLAN_STATUS_SUCCESS || buf == MNULL) {
+        PRINTM(MERROR, "ALLOC_CMD_BUF: Failed to allocate command buffer\n");
+        pioctl_req->status_code = MLAN_ERROR_NO_MEM;
+        ret = MLAN_STATUS_FAILURE;
+        goto exit;
+    }
+    memset(pmadapter, buf, 0, MRVDRV_SIZE_OF_CMD_BUFFER);
+    txp_cfg = (HostCmd_DS_TXPWR_CFG *) buf;
+    txp_cfg->action = HostCmd_ACT_GEN_SET;
+    if (!power->param.power_cfg.is_power_auto) {
+        txp_cfg->mode = 1;
+        pg_tlv = (MrvlTypes_Power_Group_t *) (buf +
+                                              sizeof(HostCmd_DS_TXPWR_CFG));
+        pg_tlv->type = TLV_TYPE_POWER_GROUP;
+        pg_tlv->length = 4 * sizeof(Power_Group_t);
+        pg = (Power_Group_t *) (buf + sizeof(HostCmd_DS_TXPWR_CFG) +
+                                sizeof(MrvlTypes_Power_Group_t));
+        /* Power group for modulation class HR/DSSS */
+        pg->first_rate_code = 0x00;
+        pg->last_rate_code = 0x03;
+        pg->modulation_class = MOD_CLASS_HR_DSSS;
+        pg->power_step = 0;
+        pg->power_min = (t_s8) dbm;
+        pg->power_max = (t_s8) dbm;
+        pg++;
+        /* Power group for modulation class OFDM */
+        pg->first_rate_code = 0x00;
+        pg->last_rate_code = 0x07;
+        pg->modulation_class = MOD_CLASS_OFDM;
+        pg->power_step = 0;
+        pg->power_min = (t_s8) dbm;
+        pg->power_max = (t_s8) dbm;
+        pg++;
+        /* Power group for modulation class HTBW20 */
+        pg->first_rate_code = 0x00;
+        pg->last_rate_code = 0x20;
+        pg->modulation_class = MOD_CLASS_HT;
+        pg->power_step = 0;
+        pg->power_min = (t_s8) dbm;
+        pg->power_max = (t_s8) dbm;
+        pg->ht_bandwidth = HT_BW_20;
+        pg++;
+        /* Power group for modulation class HTBW40 */
+        pg->first_rate_code = 0x00;
+        pg->last_rate_code = 0x20;
+        pg->modulation_class = MOD_CLASS_HT;
+        pg->power_step = 0;
+        pg->power_min = (t_s8) dbm;
+        pg->power_max = (t_s8) dbm;
+        pg->ht_bandwidth = HT_BW_40;
+    }
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_TXPWR_CFG,
+                           HostCmd_ACT_GEN_SET, 0, (t_void *) pioctl_req, buf);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    if (buf)
+        pcb->moal_mfree(pmadapter->pmoal_handle, buf);
+
+  exit:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Get modulation class from rate index
+ *  
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param rate_index	Rate index
+ *  
+ *  @return		0 fail, otherwise return modulation class
+ */
+static int
+wlan_get_modulation_class(pmlan_adapter pmadapter, int rate_index)
+{
+    ENTER();
+    if (rate_index >= MLAN_RATE_INDEX_HRDSSS0 &&
+        rate_index <= MLAN_RATE_INDEX_HRDSSS3) {
+        return MOD_CLASS_HR_DSSS;
+    } else if (rate_index >= MLAN_RATE_INDEX_OFDM0 &&
+               rate_index <= MLAN_RATE_INDEX_OFDM7) {
+        return MOD_CLASS_OFDM;
+    } else if (rate_index >= MLAN_RATE_INDEX_MCS0 &&
+               rate_index <= MLAN_RATE_INDEX_MCS127) {
+        return MOD_CLASS_HT;
+    }
+    PRINTM(MERROR, "Invalid rate index = %d supplied!\n", rate_index);
+
+    LEAVE();
+    return 0;
+}
+
+/** 
+ *  @brief Set extended power configuration
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_power_ioctl_set_power_ext(IN pmlan_adapter pmadapter,
+                               IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_power_cfg *power = MNULL;
+    pmlan_callbacks pcb = &pmadapter->callbacks;
+    t_u8 *buf = MNULL;
+    HostCmd_DS_TXPWR_CFG *txp_cfg = MNULL;
+    MrvlTypes_Power_Group_t *pg_tlv = MNULL;
+    Power_Group_t *pg = MNULL;
+    int mod_class;
+    t_u32 data[4];
+    t_u8 ht_bw;
+
+    ENTER();
+
+    power = (mlan_ds_power_cfg *) pioctl_req->pbuf;
+    ret =
+        pcb->moal_malloc(pmadapter->pmoal_handle, MRVDRV_SIZE_OF_CMD_BUFFER,
+                         MLAN_MEM_DEF, &buf);
+    if (ret != MLAN_STATUS_SUCCESS || buf == MNULL) {
+        PRINTM(MERROR, "ALLOC_CMD_BUF: Failed to allocate command buffer\n");
+        pioctl_req->status_code = MLAN_ERROR_NO_MEM;
+        ret = MLAN_STATUS_FAILURE;
+        goto exit;
+    }
+    memset(pmadapter, buf, 0, MRVDRV_SIZE_OF_CMD_BUFFER);
+    txp_cfg = (HostCmd_DS_TXPWR_CFG *) buf;
+    txp_cfg->action = HostCmd_ACT_GEN_SET;
+    memcpy(pmadapter, (t_u8 *) & data,
+           (t_u8 *) power->param.power_ext.power_data, sizeof(data));
+    switch (power->param.power_ext.len) {
+    case 1:
+        if (data[0] == 0xFF)
+            txp_cfg->mode = 0;
+        else {
+            pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+            ret = MLAN_STATUS_FAILURE;
+        }
+        break;
+    case 2:
+    case 4:
+        ht_bw = (data[0] & TX_RATE_HT_BW40_BIT) ? HT_BW_40 : HT_BW_20;
+        data[0] &= ~TX_RATE_HT_BW40_BIT;
+        if (!(mod_class = wlan_get_modulation_class(pmadapter, data[0]))) {
+            pioctl_req->status_code = MLAN_ERROR_CMD_RESP_FAIL;
+            ret = MLAN_STATUS_FAILURE;
+            break;
+        }
+        if (ht_bw && mod_class != MOD_CLASS_HT) {
+            pioctl_req->status_code = MLAN_ERROR_CMD_RESP_FAIL;
+            ret = MLAN_STATUS_FAILURE;
+            break;
+        }
+        txp_cfg->mode = 1;
+        pg_tlv =
+            (MrvlTypes_Power_Group_t *) (buf + sizeof(HostCmd_DS_TXPWR_CFG));
+        pg_tlv->type = TLV_TYPE_POWER_GROUP;
+        pg_tlv->length = sizeof(Power_Group_t);
+        pg = (Power_Group_t *) (buf + sizeof(HostCmd_DS_TXPWR_CFG) +
+                                sizeof(MrvlTypes_Power_Group_t));
+        pg->modulation_class = (t_u8) mod_class;
+        pg->first_rate_code = (t_u8) data[0];
+        pg->last_rate_code = (t_u8) data[0];
+        if (mod_class == MOD_CLASS_OFDM) {
+            pg->first_rate_code = (t_u8) (data[0] - MLAN_RATE_INDEX_OFDM0);
+            pg->last_rate_code = (t_u8) (data[0] - MLAN_RATE_INDEX_OFDM0);
+        } else if (mod_class == MOD_CLASS_HT) {
+            pg->first_rate_code = (t_u8) (data[0] - MLAN_RATE_INDEX_MCS0);
+            pg->last_rate_code = (t_u8) (data[0] - MLAN_RATE_INDEX_MCS0);
+            pg->ht_bandwidth = ht_bw;
+        }
+        pg->power_min = (t_s8) data[1];
+        pg->power_max = (t_s8) data[1];
+        if (power->param.power_ext.len == 4) {
+            pg->power_max = (t_s8) data[2];
+            pg->power_step = (t_s8) data[3];
+        }
+        break;
+    default:
+        pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        ret = MLAN_STATUS_FAILURE;
+        break;
+    }
+    if (ret == MLAN_STATUS_FAILURE) {
+        if (buf)
+            pcb->moal_mfree(pmadapter->pmoal_handle, buf);
+        goto exit;
+    }
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_TXPWR_CFG,
+                           HostCmd_ACT_GEN_SET, 0, (t_void *) pioctl_req, buf);
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+    if (buf)
+        pcb->moal_mfree(pmadapter->pmoal_handle, buf);
+
+  exit:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Power configuration command handler
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static mlan_status
+wlan_power_ioctl(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    mlan_ds_power_cfg *power = MNULL;
+
+    ENTER();
+
+    if (pioctl_req->buf_len < sizeof(mlan_ds_power_cfg)) {
+        PRINTM(MWARN, "MLAN bss IOCTL length is too short.\n");
+        pioctl_req->data_read_written = 0;
+        pioctl_req->buf_len_needed = sizeof(mlan_ds_power_cfg);
+        pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        LEAVE();
+        return MLAN_STATUS_RESOURCE;
+    }
+    power = (mlan_ds_power_cfg *) pioctl_req->pbuf;
+    switch (power->sub_command) {
+    case MLAN_OID_POWER_CFG:
+        if (pioctl_req->action == MLAN_ACT_GET)
+            status = wlan_power_ioctl_get_power(pmadapter,
+                                                HostCmd_CMD_TXPWR_CFG,
+                                                pioctl_req);
+        else
+            status = wlan_power_ioctl_set_power(pmadapter, pioctl_req);
+        break;
+
+    case MLAN_OID_POWER_CFG_EXT:
+        if (pioctl_req->action == MLAN_ACT_GET)
+            status = wlan_power_ioctl_get_power(pmadapter,
+                                                HostCmd_CMD_TXPWR_CFG,
+                                                pioctl_req);
+        else
+            status = wlan_power_ioctl_set_power_ext(pmadapter, pioctl_req);
+        break;
+    default:
+        pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        status = MLAN_STATUS_FAILURE;
+        break;
+    }
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Set power save configurations
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *  @param ps_mode	Power save mode
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_pm_ioctl_ps_mode(IN pmlan_adapter pmadapter,
+                      IN pmlan_ioctl_req pioctl_req, IN t_u16 ps_mode)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    t_u16 sub_cmd;
+
+    ENTER();
+
+    if (pioctl_req->action == MLAN_ACT_SET) {
+        sub_cmd = (pmadapter->ps_mode == Wlan802_11PowerModePSP) ?
+            EN_AUTO_PS : DIS_AUTO_PS;
+        ret = wlan_prepare_cmd(pmpriv,
+                               HostCmd_CMD_802_11_PS_MODE_ENH, sub_cmd,
+                               BITMAP_STA_PS, (t_void *) pioctl_req, MNULL);
+        if ((ret == MLAN_STATUS_SUCCESS) && (sub_cmd == DIS_AUTO_PS)) {
+            ret = wlan_prepare_cmd(pmpriv,
+                                   HostCmd_CMD_802_11_PS_MODE_ENH, GET_PS,
+                                   0, MNULL, MNULL);
+        }
+    } else {
+        ret = wlan_prepare_cmd(pmpriv,
+                               HostCmd_CMD_802_11_PS_MODE_ENH, GET_PS,
+                               0, (t_void *) pioctl_req, MNULL);
+    }
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get Inactivity timeout extend
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_pm_ioctl_inactivity_timeout(IN pmlan_adapter pmadapter,
+                                 IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_pm_cfg *pmcfg = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    t_u16 cmd_action = 0;
+
+    ENTER();
+
+    pmcfg = (mlan_ds_pm_cfg *) pioctl_req->pbuf;
+    cmd_action = HostCmd_ACT_GEN_GET;
+    if (pioctl_req->action == MLAN_ACT_SET) {
+        cmd_action = HostCmd_ACT_GEN_SET;
+    }
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_INACTIVITY_TIMEOUT_EXT,
+                           cmd_action, 0, (t_void *) pioctl_req,
+                           (t_void *) & pmcfg->param.inactivity_to);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get sleep period
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_set_get_sleep_pd(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_private pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_pm_cfg *pm_cfg = MNULL;
+    t_u16 cmd_action = 0, sleep_pd = 0;
+
+    ENTER();
+
+    pm_cfg = (mlan_ds_pm_cfg *) pioctl_req->pbuf;
+    cmd_action = HostCmd_ACT_GEN_GET;
+    if (pioctl_req->action == MLAN_ACT_SET) {
+        cmd_action = HostCmd_ACT_GEN_SET;
+        sleep_pd = (t_u16) pm_cfg->param.sleep_period;
+    }
+
+    ret = wlan_prepare_cmd(pmpriv, HostCmd_CMD_802_11_SLEEP_PERIOD,
+                           cmd_action, 0, (t_void *) pioctl_req, &sleep_pd);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get PS configuration parameter
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success
+ */
+static mlan_status
+wlan_set_get_ps_cfg(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_ds_pm_cfg *pm_cfg = MNULL;
+
+    ENTER();
+
+    pm_cfg = (mlan_ds_pm_cfg *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_GET) {
+        pm_cfg->param.ps_cfg.ps_null_interval =
+            (t_u32) pmadapter->null_pkt_interval;
+        pm_cfg->param.ps_cfg.multiple_dtim_interval =
+            (t_u32) pmadapter->multiple_dtim;
+        pm_cfg->param.ps_cfg.listen_interval =
+            (t_u32) pmadapter->local_listen_interval;
+        pm_cfg->param.ps_cfg.adhoc_awake_period =
+            (t_u32) pmadapter->adhoc_awake_period;
+        pm_cfg->param.ps_cfg.bcn_miss_timeout =
+            (t_u32) pmadapter->bcn_miss_time_out;
+        pm_cfg->param.ps_cfg.delay_to_ps = (t_u32) pmadapter->delay_to_ps;
+        pm_cfg->param.ps_cfg.ps_mode = (t_u32) pmadapter->enhanced_ps_mode;
+    } else {
+        if (pm_cfg->param.ps_cfg.ps_null_interval)
+            pmadapter->null_pkt_interval =
+                (t_u16) pm_cfg->param.ps_cfg.ps_null_interval;
+        else
+            pm_cfg->param.ps_cfg.ps_null_interval =
+                (t_u32) pmadapter->null_pkt_interval;
+        if (pm_cfg->param.ps_cfg.multiple_dtim_interval)
+            pmadapter->multiple_dtim =
+                (t_u16) pm_cfg->param.ps_cfg.multiple_dtim_interval;
+        else
+            pm_cfg->param.ps_cfg.multiple_dtim_interval =
+                (t_u32) pmadapter->multiple_dtim;
+        if (((t_s32) pm_cfg->param.ps_cfg.listen_interval) ==
+            MRVDRV_LISTEN_INTERVAL_DISABLE)
+            pmadapter->local_listen_interval = 0;
+        else if (pm_cfg->param.ps_cfg.listen_interval)
+            pmadapter->local_listen_interval =
+                (t_u16) pm_cfg->param.ps_cfg.listen_interval;
+        else
+            pm_cfg->param.ps_cfg.listen_interval =
+                (t_u32) pmadapter->local_listen_interval;
+        if (pm_cfg->param.ps_cfg.adhoc_awake_period)
+            pmadapter->adhoc_awake_period =
+                (t_u16) pm_cfg->param.ps_cfg.adhoc_awake_period;
+        else
+            pm_cfg->param.ps_cfg.adhoc_awake_period =
+                (t_u32) pmadapter->adhoc_awake_period;
+        if (pm_cfg->param.ps_cfg.bcn_miss_timeout)
+            pmadapter->bcn_miss_time_out =
+                (t_u16) pm_cfg->param.ps_cfg.bcn_miss_timeout;
+        else
+            pm_cfg->param.ps_cfg.bcn_miss_timeout =
+                (t_u32) pmadapter->bcn_miss_time_out;
+        if (pm_cfg->param.ps_cfg.delay_to_ps != DELAY_TO_PS_UNCHANGED)
+            pmadapter->delay_to_ps = (t_u16) pm_cfg->param.ps_cfg.delay_to_ps;
+        else
+            pm_cfg->param.ps_cfg.delay_to_ps = (t_u32) pmadapter->delay_to_ps;
+        if (pm_cfg->param.ps_cfg.ps_mode)
+            pmadapter->enhanced_ps_mode = (t_u16) pm_cfg->param.ps_cfg.ps_mode;
+        else
+            pm_cfg->param.ps_cfg.ps_mode = (t_u32) pmadapter->enhanced_ps_mode;
+    }
+    pioctl_req->data_read_written = sizeof(t_u32) + MLAN_SUB_COMMAND_SIZE;
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief Get/Set the sleep parameters
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		        MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_set_get_sleep_params(IN pmlan_adapter pmadapter,
+                          IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_pm_cfg *pm_cfg = MNULL;
+    t_u16 cmd_action = 0;
+
+    ENTER();
+
+    pm_cfg = (mlan_ds_pm_cfg *) pioctl_req->pbuf;
+    cmd_action = HostCmd_ACT_GEN_GET;
+    if (pioctl_req->action == MLAN_ACT_SET) {
+        cmd_action = HostCmd_ACT_GEN_SET;
+    }
+
+    /* Send command to firmware */
+    ret = wlan_prepare_cmd(pmpriv, HostCmd_CMD_802_11_SLEEP_PARAMS,
+                           cmd_action, 0, (t_void *) pioctl_req,
+                           &pm_cfg->param.sleep_params);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Power save command handler
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static mlan_status
+wlan_pm_ioctl(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    mlan_ds_pm_cfg *pm = MNULL;
+
+    ENTER();
+
+    if (pioctl_req->buf_len < sizeof(mlan_ds_pm_cfg)) {
+        PRINTM(MWARN, "MLAN bss IOCTL length is too short.\n");
+        pioctl_req->data_read_written = 0;
+        pioctl_req->buf_len_needed = sizeof(mlan_ds_pm_cfg);
+        LEAVE();
+        return MLAN_STATUS_RESOURCE;
+    }
+    pm = (mlan_ds_pm_cfg *) pioctl_req->pbuf;
+    switch (pm->sub_command) {
+    case MLAN_OID_PM_CFG_IEEE_PS:
+        switch (pioctl_req->action) {
+        case MLAN_ACT_SET:
+            if (pm->param.ps_mode)
+                pmadapter->ps_mode = Wlan802_11PowerModePSP;
+            else
+                pmadapter->ps_mode = Wlan802_11PowerModeCAM;
+            status =
+                wlan_pm_ioctl_ps_mode(pmadapter, pioctl_req,
+                                      pmadapter->ps_mode);
+            break;
+        case MLAN_ACT_GET:
+            status =
+                wlan_pm_ioctl_ps_mode(pmadapter, pioctl_req,
+                                      pmadapter->ps_mode);
+            break;
+        default:
+            pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+            status = MLAN_STATUS_FAILURE;
+            break;
+        }
+        break;
+    case MLAN_OID_PM_CFG_HS_CFG:
+        status = wlan_pm_ioctl_hscfg(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_PM_CFG_INACTIVITY_TO:
+        status = wlan_pm_ioctl_inactivity_timeout(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_PM_CFG_PS_CFG:
+        status = wlan_set_get_ps_cfg(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_PM_CFG_SLEEP_PD:
+        status = wlan_set_get_sleep_pd(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_PM_CFG_SLEEP_PARAMS:
+        status = wlan_set_get_sleep_params(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_PM_INFO:
+        status = wlan_get_pm_info(pmadapter, pioctl_req);
+        break;
+    default:
+        pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        status = MLAN_STATUS_FAILURE;
+        break;
+    }
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Set/Get WMM status
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success
+ */
+static mlan_status
+wlan_wmm_ioctl_enable(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_wmm_cfg *wmm = MNULL;
+    ENTER();
+    wmm = (mlan_ds_wmm_cfg *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_GET)
+        wmm->param.wmm_enable = (t_u32) pmpriv->wmm_required;
+    else
+        pmpriv->wmm_required = (t_u8) wmm->param.wmm_enable;
+    pioctl_req->data_read_written = sizeof(t_u32) + MLAN_SUB_COMMAND_SIZE;
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get WMM QoS configuration
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success
+ */
+static mlan_status
+wlan_wmm_ioctl_qos(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_wmm_cfg *wmm = MNULL;
+
+    ENTER();
+
+    wmm = (mlan_ds_wmm_cfg *) pioctl_req->pbuf;
+
+    if (pioctl_req->action == MLAN_ACT_GET)
+        wmm->param.qos_cfg = pmpriv->wmm_qosinfo;
+    else {
+        pmpriv->wmm_qosinfo = wmm->param.qos_cfg;
+    }
+
+    pioctl_req->data_read_written = sizeof(t_u8) + MLAN_SUB_COMMAND_SIZE;
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Request for add a TSPEC
+ *
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param pioctl_req   A pointer to ioctl request buffer
+ *
+ *  @return             MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_wmm_ioctl_addts_req(IN pmlan_adapter pmadapter,
+                         IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_private pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_wmm_cfg *cfg = MNULL;
+
+    ENTER();
+    cfg = (mlan_ds_wmm_cfg *) pioctl_req->pbuf;
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv, HostCmd_CMD_WMM_ADDTS_REQ,
+                           0, 0, (t_void *) pioctl_req,
+                           (t_void *) & cfg->param.addts);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Request for delete a TSPEC
+ *
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param pioctl_req   A pointer to ioctl request buffer
+ *
+ *  @return             MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_wmm_ioctl_delts_req(IN pmlan_adapter pmadapter,
+                         IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_private pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_wmm_cfg *cfg = MNULL;
+
+    ENTER();
+    cfg = (mlan_ds_wmm_cfg *) pioctl_req->pbuf;
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv, HostCmd_CMD_WMM_DELTS_REQ,
+                           0, 0, (t_void *) pioctl_req,
+                           (t_void *) & cfg->param.delts);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set/Get a specified AC Queue's parameters
+ *
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param pioctl_req   A pointer to ioctl request buffer
+ *
+ *  @return             MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_wmm_ioctl_queue_config(IN pmlan_adapter pmadapter,
+                            IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_private pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_wmm_cfg *cfg = MNULL;
+
+    ENTER();
+    cfg = (mlan_ds_wmm_cfg *) pioctl_req->pbuf;
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv, HostCmd_CMD_WMM_QUEUE_CONFIG,
+                           0, 0, (t_void *) pioctl_req,
+                           (t_void *) & cfg->param.q_cfg);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief To get and start/stop queue stats on a WMM AC
+ *
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param pioctl_req   A pointer to ioctl request buffer
+ *
+ *  @return             MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_wmm_ioctl_queue_stats(IN pmlan_adapter pmadapter,
+                           IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_private pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_wmm_cfg *cfg = MNULL;
+
+    ENTER();
+    cfg = (mlan_ds_wmm_cfg *) pioctl_req->pbuf;
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv, HostCmd_CMD_WMM_QUEUE_STATS,
+                           0, 0, (t_void *) pioctl_req,
+                           (t_void *) & cfg->param.q_stats);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Get the status of the WMM AC queues
+ *
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param pioctl_req   A pointer to ioctl request buffer
+ *
+ *  @return             MLAN_STATUS_SUCCESS --success
+ */
+static mlan_status
+wlan_wmm_ioctl_queue_status(IN pmlan_adapter pmadapter,
+                            IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_private pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_wmm_cfg *cfg = MNULL;
+    mlan_ds_wmm_queue_status *pqstatus = MNULL;
+    WmmAcStatus_t *pac_status = MNULL;
+    mlan_wmm_ac_e ac_idx;
+
+    ENTER();
+
+    cfg = (mlan_ds_wmm_cfg *) pioctl_req->pbuf;
+    pqstatus = (mlan_ds_wmm_queue_status *) & cfg->param.q_status;
+
+    for (ac_idx = WMM_AC_BK; ac_idx <= WMM_AC_VO; ac_idx++) {
+        pac_status = &pmpriv->wmm.ac_status[ac_idx];
+
+        /* Firmware status */
+        pqstatus->ac_status[ac_idx].flow_required = pac_status->flow_required;
+        pqstatus->ac_status[ac_idx].flow_created = pac_status->flow_created;
+        pqstatus->ac_status[ac_idx].disabled = pac_status->disabled;
+
+        /* ACM bit reflected in firmware status (redundant) */
+        pqstatus->ac_status[ac_idx].wmm_acm = pac_status->flow_required;
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Get the status of the WMM Traffic Streams
+ *
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param pioctl_req   A pointer to ioctl request buffer
+ *
+ *  @return             MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_wmm_ioctl_ts_status(IN pmlan_adapter pmadapter,
+                         IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_private pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_wmm_cfg *cfg = MNULL;
+
+    ENTER();
+
+    cfg = (mlan_ds_wmm_cfg *) pioctl_req->pbuf;
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv, HostCmd_CMD_WMM_TS_STATUS,
+                           0, 0, (t_void *) pioctl_req,
+                           (t_void *) & cfg->param.ts_status);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief WMM configuration handler
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static mlan_status
+wlan_wmm_cfg_ioctl(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    mlan_ds_wmm_cfg *wmm = MNULL;
+
+    ENTER();
+
+    if (pioctl_req->buf_len < sizeof(mlan_ds_wmm_cfg)) {
+        PRINTM(MWARN, "MLAN bss IOCTL length is too short.\n");
+        pioctl_req->data_read_written = 0;
+        pioctl_req->buf_len_needed = sizeof(mlan_ds_wmm_cfg);
+        pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        LEAVE();
+        return MLAN_STATUS_RESOURCE;
+    }
+    wmm = (mlan_ds_wmm_cfg *) pioctl_req->pbuf;
+    switch (wmm->sub_command) {
+    case MLAN_OID_WMM_CFG_ENABLE:
+        status = wlan_wmm_ioctl_enable(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_WMM_CFG_QOS:
+        status = wlan_wmm_ioctl_qos(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_WMM_CFG_ADDTS:
+        status = wlan_wmm_ioctl_addts_req(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_WMM_CFG_DELTS:
+        status = wlan_wmm_ioctl_delts_req(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_WMM_CFG_QUEUE_CONFIG:
+        status = wlan_wmm_ioctl_queue_config(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_WMM_CFG_QUEUE_STATS:
+        status = wlan_wmm_ioctl_queue_stats(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_WMM_CFG_QUEUE_STATUS:
+        status = wlan_wmm_ioctl_queue_status(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_WMM_CFG_TS_STATUS:
+        status = wlan_wmm_ioctl_ts_status(pmadapter, pioctl_req);
+        break;
+    default:
+        pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        status = MLAN_STATUS_FAILURE;
+        break;
+    }
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Set/Get WPA IE   
+ *
+ *  @param priv         A pointer to mlan_private structure
+ *  @param ie_data_ptr  A pointer to IE
+ *  @param ie_len       Length of the IE
+ *
+ *  @return             MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static mlan_status
+wlan_set_wpa_ie_helper(mlan_private * priv, t_u8 * ie_data_ptr, t_u16 ie_len)
+{
+    ENTER();
+
+    if (ie_len) {
+        if (ie_len > sizeof(priv->wpa_ie)) {
+            PRINTM(MERROR, "failed to copy, WPA IE is too big \n");
+            LEAVE();
+            return MLAN_STATUS_FAILURE;
+        }
+        memcpy(priv->adapter, priv->wpa_ie, ie_data_ptr, ie_len);
+        priv->wpa_ie_len = (t_u8) ie_len;
+        PRINTM(MIOCTL, "Set Wpa_ie_len=%d IE=%#x\n", priv->wpa_ie_len,
+               priv->wpa_ie[0]);
+        DBG_HEXDUMP(MCMD_D, "Wpa_ie", priv->wpa_ie, priv->wpa_ie_len);
+        if (priv->wpa_ie[0] == WPA_IE) {
+            priv->sec_info.wpa_enabled = MTRUE;
+        } else if (priv->wpa_ie[0] == RSN_IE) {
+            priv->sec_info.wpa2_enabled = MTRUE;
+        } else {
+            priv->sec_info.wpa_enabled = MFALSE;
+            priv->sec_info.wpa2_enabled = MFALSE;
+        }
+    } else {
+        memset(priv->adapter, priv->wpa_ie, 0, sizeof(priv->wpa_ie));
+        priv->wpa_ie_len = 0;
+        PRINTM(MINFO, "Reset Wpa_ie_len=%d IE=%#x\n", priv->wpa_ie_len,
+               priv->wpa_ie[0]);
+        priv->sec_info.wpa_enabled = MFALSE;
+        priv->sec_info.wpa2_enabled = MFALSE;
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief Set WAPI IE   
+ *
+ *  @param priv         A pointer to mlan_private structure
+ *  @param ie_data_ptr  A pointer to IE
+ *  @param ie_len       Length of the IE
+ *
+ *  @return             MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static mlan_status
+wlan_set_wapi_ie(mlan_private * priv, t_u8 * ie_data_ptr, t_u16 ie_len)
+{
+    ENTER();
+    if (ie_len) {
+        if (ie_len > sizeof(priv->wapi_ie)) {
+            PRINTM(MWARN, "failed to copy, WAPI IE is too big \n");
+            LEAVE();
+            return MLAN_STATUS_FAILURE;
+        }
+        memcpy(priv->adapter, priv->wapi_ie, ie_data_ptr, ie_len);
+        priv->wapi_ie_len = (t_u8) ie_len;
+        PRINTM(MIOCTL, "Set wapi_ie_len=%d IE=%#x\n", priv->wapi_ie_len,
+               priv->wapi_ie[0]);
+        DBG_HEXDUMP(MCMD_D, "wapi_ie", priv->wapi_ie, priv->wapi_ie_len);
+        if (priv->wapi_ie[0] == WAPI_IE)
+            priv->sec_info.wapi_enabled = MTRUE;
+    } else {
+        memset(priv->adapter, priv->wapi_ie, 0, sizeof(priv->wapi_ie));
+        priv->wapi_ie_len = (t_u8) ie_len;
+        PRINTM(MINFO, "Reset wapi_ie_len=%d IE=%#x\n", priv->wapi_ie_len,
+               priv->wapi_ie[0]);
+        priv->sec_info.wapi_enabled = MFALSE;
+    }
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief Set/Get WAPI status
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success
+ */
+static mlan_status
+wlan_sec_ioctl_wapi_enable(IN pmlan_adapter pmadapter,
+                           IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_sec_cfg *sec = MNULL;
+    ENTER();
+    sec = (mlan_ds_sec_cfg *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_GET) {
+        if (pmpriv->wapi_ie_len)
+            sec->param.wapi_enabled = MTRUE;
+        else
+            sec->param.wapi_enabled = MFALSE;
+    } else {
+        if (sec->param.wapi_enabled == MFALSE) {
+            wlan_set_wapi_ie(pmpriv, MNULL, 0);
+        }
+    }
+    pioctl_req->data_read_written = sizeof(t_u32) + MLAN_SUB_COMMAND_SIZE;
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set WAPI key
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_sec_ioctl_set_wapi_key(IN pmlan_adapter pmadapter,
+                            IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_sec_cfg *sec = MNULL;
+    ENTER();
+
+    sec = (mlan_ds_sec_cfg *) pioctl_req->pbuf;
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_802_11_KEY_MATERIAL,
+                           HostCmd_ACT_GEN_SET,
+                           KEY_INFO_ENABLED,
+                           (t_void *) pioctl_req, &sec->param.encrypt_key);
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get Port Control status
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static mlan_status
+wlan_sec_ioctl_port_ctrl_enable(IN pmlan_adapter pmadapter,
+                                IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ds_sec_cfg *sec = MNULL;
+    mlan_private *pmpriv;
+    ENTER();
+
+    if (!(pmpriv = wlan_get_priv(pmadapter, MLAN_BSS_ROLE_STA))) {
+        pioctl_req->status_code = MLAN_ERROR_IOCTL_FAIL;
+        ret = MLAN_STATUS_FAILURE;
+        goto end;
+    }
+
+    sec = (mlan_ds_sec_cfg *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_GET) {
+        if (pmpriv->port_ctrl_mode)
+            sec->param.port_ctrl_enabled = MTRUE;
+        else
+            sec->param.port_ctrl_enabled = MFALSE;
+    } else {
+        if (sec->param.port_ctrl_enabled) {
+            pmpriv->port_ctrl_mode = MTRUE;
+            pmpriv->port_open = MFALSE;
+        } else {
+            if (pmpriv->port_ctrl_mode == MTRUE) {
+                pmpriv->port_ctrl_mode = MFALSE;
+                /* Cleanup the bypass TX queue */
+                wlan_cleanup_bypass_txq(pmadapter);
+            }
+        }
+    }
+
+    PRINTM(MINFO, "port_ctrl: port_ctrl_mode=%d port_open=%d\n",
+           pmpriv->port_ctrl_mode, pmpriv->port_open);
+
+  end:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get authentication mode
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success
+ */
+static mlan_status
+wlan_sec_ioctl_auth_mode(IN pmlan_adapter pmadapter,
+                         IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_sec_cfg *sec = MNULL;
+    ENTER();
+    sec = (mlan_ds_sec_cfg *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_GET)
+        sec->param.auth_mode = pmpriv->sec_info.authentication_mode;
+    else {
+        pmpriv->sec_info.authentication_mode = sec->param.auth_mode;
+        if (pmpriv->sec_info.authentication_mode == MLAN_AUTH_MODE_NETWORKEAP)
+            wlan_set_wpa_ie_helper(pmpriv, MNULL, 0);
+    }
+    pioctl_req->data_read_written = sizeof(t_u32) + MLAN_SUB_COMMAND_SIZE;
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get encryption mode
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success
+ */
+static mlan_status
+wlan_sec_ioctl_encrypt_mode(IN pmlan_adapter pmadapter,
+                            IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_sec_cfg *sec = MNULL;
+    ENTER();
+    sec = (mlan_ds_sec_cfg *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_GET)
+        sec->param.encrypt_mode = pmpriv->sec_info.encryption_mode;
+    else {
+        pmpriv->sec_info.encryption_mode = sec->param.encrypt_mode;
+    }
+    pioctl_req->data_read_written = sizeof(t_u32) + MLAN_SUB_COMMAND_SIZE;
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get WPA status
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success
+ */
+static mlan_status
+wlan_sec_ioctl_wpa_enable(IN pmlan_adapter pmadapter,
+                          IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_sec_cfg *sec = MNULL;
+    ENTER();
+    sec = (mlan_ds_sec_cfg *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_GET) {
+        if (pmpriv->wpa_ie_len)
+            sec->param.wpa_enabled = MTRUE;
+        else
+            sec->param.wpa_enabled = MFALSE;
+    } else {
+        if (sec->param.wpa_enabled == MFALSE) {
+            wlan_set_wpa_ie_helper(pmpriv, MNULL, 0);
+        }
+                /** clear adhoc aes flag, when WPA enabled */
+        pmpriv->adhoc_aes_enabled = MFALSE;
+        pmpriv->aes_key.key_param_set.key_len = 0;
+    }
+    pioctl_req->data_read_written = sizeof(t_u32) + MLAN_SUB_COMMAND_SIZE;
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set WEP keys
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_sec_ioctl_set_wep_key(IN pmlan_adapter pmadapter,
+                           IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_sec_cfg *sec = MNULL;
+    mrvl_wep_key_t *pwep_key = MNULL;
+    int index;
+
+    ENTER();
+
+    if (pmpriv->wep_key_curr_index >= MRVL_NUM_WEP_KEY)
+        pmpriv->wep_key_curr_index = 0;
+    pwep_key = &pmpriv->wep_key[pmpriv->wep_key_curr_index];
+    sec = (mlan_ds_sec_cfg *) pioctl_req->pbuf;
+    if (sec->param.encrypt_key.key_index == MLAN_KEY_INDEX_DEFAULT) {
+        index = pmpriv->wep_key_curr_index;
+    } else
+        index = sec->param.encrypt_key.key_index;
+    if ((sec->param.encrypt_key.key_disable == MTRUE) ||
+        (sec->param.encrypt_key.key_remove == MTRUE)) {
+        if (pmpriv->sec_info.wep_status == Wlan802_11WEPEnabled &&
+            pmpriv->media_connected == MTRUE &&
+            pmpriv->bss_mode == MLAN_BSS_MODE_IBSS) {
+            PRINTM(MERROR, "Can not disable key in IBSS connected state\n");
+            pioctl_req->status_code = MLAN_ERROR_CMD_RESP_FAIL;
+            ret = MLAN_STATUS_FAILURE;
+            goto exit;
+        }
+        pmpriv->sec_info.wep_status = Wlan802_11WEPDisabled;
+        /* remove key */
+        if (sec->param.encrypt_key.key_remove == MTRUE) {
+            memset(pmadapter, &pmpriv->wep_key[index], 0,
+                   sizeof(mrvl_wep_key_t));
+        }
+    } else {
+        if (sec->param.encrypt_key.key_len) {
+            pwep_key = &pmpriv->wep_key[index];
+            /* Cleanup */
+            memset(pmadapter, pwep_key, 0, sizeof(mrvl_wep_key_t));
+            /* Copy the key in the driver */
+
+            memcpy(pmadapter, pwep_key->key_material,
+                   sec->param.encrypt_key.key_material,
+                   sec->param.encrypt_key.key_len);
+            pwep_key->key_index = index;
+            pwep_key->key_length = sec->param.encrypt_key.key_len;
+            if (pmpriv->sec_info.wep_status != Wlan802_11WEPEnabled) {
+                /* 
+                 * The status is set as Key Absent 
+                 * so as to make sure we display the 
+                 * keys when iwlist mlanX key is used
+                 */
+                pmpriv->sec_info.wep_status = Wlan802_11WEPKeyAbsent;
+            }
+        }
+        if (sec->param.encrypt_key.is_current_wep_key == MTRUE) {
+            if (pmpriv->sec_info.wep_status != Wlan802_11WEPEnabled &&
+                pmpriv->media_connected == MTRUE &&
+                pmpriv->bss_mode == MLAN_BSS_MODE_IBSS) {
+                PRINTM(MERROR, "Can not enable key in IBSS connected state\n");
+                pioctl_req->status_code = MLAN_ERROR_CMD_RESP_FAIL;
+                ret = MLAN_STATUS_FAILURE;
+                goto exit;
+            }
+            /* Copy the required key as the current key */
+            pwep_key = &pmpriv->wep_key[index];
+            if (!pwep_key->key_length) {
+                PRINTM(MERROR, "Key %d not set,so cannot enable it\n", index);
+                pioctl_req->status_code = MLAN_ERROR_CMD_RESP_FAIL;
+                ret = MLAN_STATUS_FAILURE;
+                goto exit;
+            }
+            pmpriv->wep_key_curr_index = (t_u16) index;
+            pmpriv->sec_info.wep_status = Wlan802_11WEPEnabled;
+        }
+    }
+    if (pmpriv->sec_info.wep_status == Wlan802_11WEPEnabled)
+        pmpriv->curr_pkt_filter |= HostCmd_ACT_MAC_WEP_ENABLE;
+    else
+        pmpriv->curr_pkt_filter &= ~HostCmd_ACT_MAC_WEP_ENABLE;
+
+    /* Send request to firmware */
+    if (pmpriv->sec_info.wep_status == Wlan802_11WEPEnabled
+        && pwep_key->key_length) {
+        ret = wlan_prepare_cmd(pmpriv,
+                               HostCmd_CMD_MAC_CONTROL,
+                               HostCmd_ACT_GEN_SET,
+                               0, MNULL, &pmpriv->curr_pkt_filter);
+        if (ret)
+            goto exit;
+        ret = wlan_prepare_cmd(pmpriv,
+                               HostCmd_CMD_802_11_KEY_MATERIAL,
+                               HostCmd_ACT_GEN_SET,
+                               0, (t_void *) pioctl_req, MNULL);
+    } else {
+        if (pwep_key->key_length) {
+            ret = wlan_prepare_cmd(pmpriv,
+                                   HostCmd_CMD_802_11_KEY_MATERIAL,
+                                   HostCmd_ACT_GEN_SET, 0, MNULL, MNULL);
+            if (ret)
+                goto exit;
+        }
+        ret = wlan_prepare_cmd(pmpriv,
+                               HostCmd_CMD_MAC_CONTROL,
+                               HostCmd_ACT_GEN_SET,
+                               0,
+                               (t_void *) pioctl_req, &pmpriv->curr_pkt_filter);
+    }
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+  exit:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set WPA key
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_sec_ioctl_set_wpa_key(IN pmlan_adapter pmadapter,
+                           IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_sec_cfg *sec = MNULL;
+    t_u8 broadcast_mac_addr[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
+    t_u8 remove_key = MFALSE;
+
+    ENTER();
+
+    sec = (mlan_ds_sec_cfg *) pioctl_req->pbuf;
+    /* Current driver only supports key length of up to 32 bytes */
+    if (sec->param.encrypt_key.key_len > MLAN_MAX_KEY_LENGTH) {
+        PRINTM(MERROR, "Key length is incorrect\n");
+        pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        ret = MLAN_STATUS_FAILURE;
+        goto exit;
+    }
+    if ((pmpriv->bss_mode == MLAN_BSS_MODE_IBSS) &&
+        pmpriv->sec_info.wpa_enabled) {
+        /* 
+         * IBSS/WPA-None uses only one key (Group) for both receiving and
+         *  sending unicast and multicast packets.
+         */
+        /* Send the key as PTK to firmware */
+        sec->param.encrypt_key.key_index = MLAN_KEY_INDEX_UNICAST;
+        ret = wlan_prepare_cmd(pmpriv,
+                               HostCmd_CMD_802_11_KEY_MATERIAL,
+                               HostCmd_ACT_GEN_SET,
+                               KEY_INFO_ENABLED,
+                               MNULL, &sec->param.encrypt_key);
+        if (ret)
+            goto exit;
+
+        /* Send the key as GTK to firmware */
+        sec->param.encrypt_key.key_index = ~MLAN_KEY_INDEX_UNICAST;
+    }
+
+    if (sec->param.encrypt_key.key_len == WPA_AES_KEY_LEN) {
+        /** back up adhoc AES key */
+        memset(pmpriv->adapter, pmpriv->aes_key.key_param_set.key, 0,
+               sizeof(pmpriv->aes_key.key_param_set.key));
+        pmpriv->aes_key.key_param_set.key_len = sec->param.encrypt_key.key_len;
+        memcpy(pmpriv->adapter, pmpriv->aes_key.key_param_set.key,
+               sec->param.encrypt_key.key_material,
+               pmpriv->aes_key.key_param_set.key_len);
+    }
+
+    /** only adhoc aes key_index = MLAN_KEY_INDEX_UNICAST */
+    if (pmpriv->bss_mode == MLAN_BSS_MODE_IBSS &&
+        sec->param.encrypt_key.key_len == WPA_AES_KEY_LEN
+        && sec->param.encrypt_key.key_index & MLAN_KEY_INDEX_UNICAST) {
+        t_u8 zero_key_material[WPA_AES_KEY_LEN];
+        memset(pmadapter, zero_key_material, 0, sizeof(zero_key_material));
+        if (memcmp
+            (pmadapter, sec->param.encrypt_key.key_material, zero_key_material,
+             WPA_AES_KEY_LEN)) {
+            PRINTM(MINFO, "Adhoc AES Enabled.\n");
+            pmpriv->adhoc_aes_enabled = MTRUE;
+            remove_key = MFALSE;
+        } else {
+            PRINTM(MINFO, "Adhoc AES Disabled.\n");
+            pmpriv->adhoc_aes_enabled = MFALSE;
+            /** clear adhoc AES key */
+            remove_key = MTRUE;
+            pmpriv->aes_key.key_param_set.key_len = 0;
+        }
+    }
+
+    if (memcmp
+        (pmadapter, sec->param.encrypt_key.mac_addr, broadcast_mac_addr,
+         MLAN_MAC_ADDR_LENGTH))
+        sec->param.encrypt_key.key_index = MLAN_KEY_INDEX_UNICAST;
+
+    if (remove_key == MTRUE) {
+        /* Send request to firmware */
+        ret = wlan_prepare_cmd(pmpriv,
+                               HostCmd_CMD_802_11_KEY_MATERIAL,
+                               HostCmd_ACT_GEN_SET,
+                               !(KEY_INFO_ENABLED),
+                               (t_void *) pioctl_req, &sec->param.encrypt_key);
+    } else {
+        /* Send request to firmware */
+        ret = wlan_prepare_cmd(pmpriv,
+                               HostCmd_CMD_802_11_KEY_MATERIAL,
+                               HostCmd_ACT_GEN_SET,
+                               KEY_INFO_ENABLED,
+                               (t_void *) pioctl_req, &sec->param.encrypt_key);
+    }
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+  exit:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Get security keys
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static mlan_status
+wlan_sec_ioctl_get_key(IN pmlan_adapter pmadapter,
+                       IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_sec_cfg *sec = MNULL;
+    int index;
+    ENTER();
+
+    sec = (mlan_ds_sec_cfg *) pioctl_req->pbuf;
+
+    if ((sec->param.encrypt_key.key_index == MLAN_KEY_INDEX_UNICAST) &&
+        (sec->param.encrypt_key.key_len == WPA_AES_KEY_LEN)) {
+        if (pmpriv->adhoc_aes_enabled == MTRUE &&
+            (pmpriv->aes_key.key_param_set.key_len == WPA_AES_KEY_LEN)) {
+            HEXDUMP("Get ADHOCAES Key", pmpriv->aes_key.key_param_set.key,
+                    WPA_AES_KEY_LEN);
+            memcpy(pmadapter, sec->param.encrypt_key.key_material,
+                   pmpriv->aes_key.key_param_set.key, WPA_AES_KEY_LEN);
+            LEAVE();
+            return ret;
+        } else {
+            PRINTM(MERROR, " ADHOCAES key is not set yet!\n");
+            pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+            ret = MLAN_STATUS_FAILURE;
+            LEAVE();
+            return ret;
+        }
+    }
+    if (pmpriv->wep_key_curr_index >= MRVL_NUM_WEP_KEY)
+        pmpriv->wep_key_curr_index = 0;
+
+    if ((pmpriv->sec_info.wep_status == Wlan802_11WEPEnabled)
+        || (pmpriv->sec_info.wep_status == Wlan802_11WEPKeyAbsent)
+        || pmpriv->sec_info.ewpa_enabled
+        || pmpriv->sec_info.wpa_enabled
+        || pmpriv->sec_info.wpa2_enabled || pmpriv->adhoc_aes_enabled) {
+        sec->param.encrypt_key.key_disable = MFALSE;
+    } else {
+        sec->param.encrypt_key.key_disable = MTRUE;
+    }
+    if (sec->param.encrypt_key.key_index == MLAN_KEY_INDEX_DEFAULT) {
+        if ((pmpriv->wep_key[pmpriv->wep_key_curr_index].key_length) &&
+            (pmpriv->sec_info.wep_status == Wlan802_11WEPEnabled)) {
+            index = pmpriv->wep_key_curr_index;
+            sec->param.encrypt_key.key_index = pmpriv->wep_key[index].key_index;
+            memcpy(pmadapter, sec->param.encrypt_key.key_material,
+                   pmpriv->wep_key[index].key_material,
+                   pmpriv->wep_key[index].key_length);
+            sec->param.encrypt_key.key_len = pmpriv->wep_key[index].key_length;
+        } else if ((pmpriv->sec_info.wpa_enabled)
+                   || (pmpriv->sec_info.ewpa_enabled)
+                   || (pmpriv->sec_info.wpa2_enabled)
+                   || (pmpriv->sec_info.wapi_enabled)
+                   || (pmpriv->adhoc_aes_enabled)
+            ) {
+            /* Return WPA enabled */
+            sec->param.encrypt_key.key_disable = MFALSE;
+            memcpy(pmadapter, sec->param.encrypt_key.key_material,
+                   pmpriv->aes_key.key_param_set.key,
+                   pmpriv->aes_key.key_param_set.key_len);
+            sec->param.encrypt_key.key_len =
+                pmpriv->aes_key.key_param_set.key_len;
+        } else {
+            sec->param.encrypt_key.key_disable = MTRUE;
+        }
+    } else {
+        index = sec->param.encrypt_key.key_index;
+        if (pmpriv->wep_key[index].key_length) {
+            sec->param.encrypt_key.key_index = pmpriv->wep_key[index].key_index;
+            memcpy(pmadapter, sec->param.encrypt_key.key_material,
+                   pmpriv->wep_key[index].key_material,
+                   pmpriv->wep_key[index].key_length);
+            sec->param.encrypt_key.key_len = pmpriv->wep_key[index].key_length;
+        } else if ((pmpriv->sec_info.wpa_enabled)
+                   || (pmpriv->sec_info.ewpa_enabled)
+                   || (pmpriv->sec_info.wpa2_enabled)
+                   || (pmpriv->sec_info.wapi_enabled)
+                   || (pmpriv->adhoc_aes_enabled)
+            ) {
+            /* Return WPA enabled */
+            sec->param.encrypt_key.key_disable = MFALSE;
+        } else {
+            sec->param.encrypt_key.key_disable = MTRUE;
+        }
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set security key(s)
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_sec_ioctl_encrypt_key(IN pmlan_adapter pmadapter,
+                           IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    mlan_ds_sec_cfg *sec = MNULL;
+    ENTER();
+    sec = (mlan_ds_sec_cfg *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_SET) {
+        if (sec->param.encrypt_key.is_wapi_key)
+            status = wlan_sec_ioctl_set_wapi_key(pmadapter, pioctl_req);
+        else if (sec->param.encrypt_key.key_len > MAX_WEP_KEY_SIZE)
+            status = wlan_sec_ioctl_set_wpa_key(pmadapter, pioctl_req);
+        else
+            status = wlan_sec_ioctl_set_wep_key(pmadapter, pioctl_req);
+    } else {
+        status = wlan_sec_ioctl_get_key(pmadapter, pioctl_req);
+    }
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Set/Get WPA passphrase for esupplicant
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_sec_ioctl_passphrase(IN pmlan_adapter pmadapter,
+                          IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_sec_cfg *sec = MNULL;
+    t_u16 cmd_action = 0;
+    BSSDescriptor_t *pbss_desc;
+    int i = 0;
+
+    ENTER();
+
+    sec = (mlan_ds_sec_cfg *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_SET) {
+        if (sec->param.passphrase.psk_type == MLAN_PSK_CLEAR)
+            cmd_action = HostCmd_ACT_GEN_REMOVE;
+        else
+            cmd_action = HostCmd_ACT_GEN_SET;
+    } else {
+        if (sec->param.passphrase.psk_type == MLAN_PSK_QUERY) {
+            if (sec->param.passphrase.ssid.ssid_len == 0) {
+                i = wlan_find_bssid_in_list(pmpriv,
+                                            (t_u8 *) & sec->param.passphrase.
+                                            bssid, MLAN_BSS_MODE_AUTO);
+                if (i >= 0) {
+                    pbss_desc = &pmadapter->pscan_table[i];
+                    memcpy(pmadapter, &sec->param.passphrase.ssid,
+                           &pbss_desc->ssid, sizeof(mlan_802_11_ssid));
+                    memset(pmadapter, &sec->param.passphrase.bssid, 0,
+                           MLAN_MAC_ADDR_LENGTH);
+                    PRINTM(MINFO, "PSK_QUERY: found ssid=%s\n",
+                           sec->param.passphrase.ssid.ssid);
+                }
+            } else
+                memset(pmadapter, &sec->param.passphrase.bssid, 0,
+                       MLAN_MAC_ADDR_LENGTH);
+        }
+        cmd_action = HostCmd_ACT_GEN_GET;
+    }
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_SUPPLICANT_PMK,
+                           cmd_action,
+                           0, (t_void *) pioctl_req, &sec->param.passphrase);
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get esupplicant status
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success
+ */
+static mlan_status
+wlan_sec_ioctl_ewpa_enable(IN pmlan_adapter pmadapter,
+                           IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_sec_cfg *sec = MNULL;
+    ENTER();
+    sec = (mlan_ds_sec_cfg *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_GET) {
+        sec->param.ewpa_enabled = pmpriv->sec_info.ewpa_enabled;
+    } else {
+        pmpriv->sec_info.ewpa_enabled = (t_u8) sec->param.ewpa_enabled;
+        PRINTM(MINFO, "Set: ewpa_enabled = %d\n",
+               (int) pmpriv->sec_info.ewpa_enabled);
+    }
+    pioctl_req->data_read_written = sizeof(t_u32) + MLAN_SUB_COMMAND_SIZE;
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Get esupplicant mode
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_sec_ioctl_esupp_mode(IN pmlan_adapter pmadapter,
+                          IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+
+    ENTER();
+
+    if (pmpriv->media_connected != MTRUE) {
+        pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        ret = MLAN_STATUS_FAILURE;
+        goto exit;
+    }
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_SUPPLICANT_PROFILE,
+                           HostCmd_ACT_GEN_GET_CURRENT,
+                           0, (t_void *) pioctl_req, MNULL);
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+  exit:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Security configuration handler
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_sec_cfg_ioctl(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    mlan_ds_sec_cfg *sec = MNULL;
+
+    ENTER();
+
+    if (pioctl_req->buf_len < sizeof(mlan_ds_sec_cfg)) {
+        PRINTM(MWARN, "MLAN bss IOCTL length is too short.\n");
+        pioctl_req->data_read_written = 0;
+        pioctl_req->buf_len_needed = sizeof(mlan_ds_sec_cfg);
+        pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        LEAVE();
+        return MLAN_STATUS_RESOURCE;
+    }
+    sec = (mlan_ds_sec_cfg *) pioctl_req->pbuf;
+    switch (sec->sub_command) {
+    case MLAN_OID_SEC_CFG_AUTH_MODE:
+        status = wlan_sec_ioctl_auth_mode(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_SEC_CFG_ENCRYPT_MODE:
+        status = wlan_sec_ioctl_encrypt_mode(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_SEC_CFG_WPA_ENABLED:
+        status = wlan_sec_ioctl_wpa_enable(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_SEC_CFG_WAPI_ENABLED:
+        status = wlan_sec_ioctl_wapi_enable(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_SEC_CFG_PORT_CTRL_ENABLED:
+        status = wlan_sec_ioctl_port_ctrl_enable(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_SEC_CFG_ENCRYPT_KEY:
+        status = wlan_sec_ioctl_encrypt_key(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_SEC_CFG_PASSPHRASE:
+        status = wlan_sec_ioctl_passphrase(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_SEC_CFG_EWPA_ENABLED:
+        status = wlan_sec_ioctl_ewpa_enable(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_SEC_CFG_ESUPP_MODE:
+        status = wlan_sec_ioctl_esupp_mode(pmadapter, pioctl_req);
+        break;
+
+    default:
+        pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        status = MLAN_STATUS_FAILURE;
+        break;
+    }
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief  Append/Reset IE buffer. 
+ *   
+ *  Pass an opaque block of data, expected to be IEEE IEs, to the driver 
+ *    for eventual passthrough to the firmware in an associate/join 
+ *    (and potentially start) command.  This function is the main body
+ *    for both wlan_set_gen_ie_ioctl and wlan_set_gen_ie
+ *
+ *  Data is appended to an existing buffer and then wrapped in a passthrough
+ *    TLV in the command API to the firmware.  The firmware treats the data
+ *    as a transparent passthrough to the transmitted management frame.
+ *
+ *  @param priv         A pointer to mlan_private structure
+ *  @param ie_data_ptr  A pointer to iwreq structure
+ *  @param ie_len       Length of the IE or IE block passed in ie_data_ptr
+ *
+ *  @return             MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static int
+wlan_set_gen_ie_helper(mlan_private * priv, t_u8 * ie_data_ptr, t_u16 ie_len)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    IEEEtypes_VendorHeader_t *pvendor_ie;
+    const t_u8 wpa_oui[] = { 0x00, 0x50, 0xf2, 0x01 };
+    const t_u8 wps_oui[] = { 0x00, 0x50, 0xf2, 0x04 };
+
+    ENTER();
+
+    /* If the passed length is zero, reset the buffer */
+    if (!ie_len) {
+        priv->gen_ie_buf_len = 0;
+        priv->wps.session_enable = MFALSE;
+        wlan_set_wpa_ie_helper(priv, MNULL, 0);
+    } else if (!ie_data_ptr) {
+        /* MNULL check */
+        ret = MLAN_STATUS_FAILURE;
+    } else {
+
+        pvendor_ie = (IEEEtypes_VendorHeader_t *) ie_data_ptr;
+        /* Test to see if it is a WPA IE, if not, then it is a gen IE */
+        if (((pvendor_ie->element_id == WPA_IE)
+             &&
+             (!memcmp
+              (priv->adapter, pvendor_ie->oui, wpa_oui, sizeof(wpa_oui))))
+            || (pvendor_ie->element_id == RSN_IE)
+            ) {
+
+            /* IE is a WPA/WPA2 IE so call set_wpa function */
+            ret = wlan_set_wpa_ie_helper(priv, ie_data_ptr, ie_len);
+            priv->wps.session_enable = MFALSE;
+        } else if (pvendor_ie->element_id == WAPI_IE) {
+            /* IE is a WAPI IE so call set_wapi function */
+            ret = wlan_set_wapi_ie(priv, ie_data_ptr, ie_len);
+        } else
+            if ((pvendor_ie->element_id == WPS_IE) &&
+                (priv->wps.session_enable == MFALSE) &&
+                (!memcmp
+                 (priv->adapter, pvendor_ie->oui, wps_oui, sizeof(wps_oui)))) {
+            /* 
+             * Discard first two byte (Element ID and Length)
+             * because they are not needed in the case of setting WPS_IE
+             */
+            if (pvendor_ie->len > 4) {
+                memcpy(priv->adapter, (t_u8 *) & priv->wps.wps_ie, ie_data_ptr,
+                       ie_len);
+                HEXDUMP("wps_ie", (t_u8 *) & priv->wps.wps_ie,
+                        priv->wps.wps_ie.vend_hdr.len + 2);
+            } else {
+                /* Only wps oui exist, reset driver wps buffer */
+                memset(priv->adapter, (t_u8 *) & priv->wps.wps_ie, 0x00,
+                       sizeof(priv->wps.wps_ie));
+                PRINTM(MINFO, "wps_ie cleared\n");
+            }
+        } else {
+            /* 
+             * Verify that the passed length is not larger than the available 
+             * space remaining in the buffer
+             */
+            if (ie_len < (sizeof(priv->gen_ie_buf) - priv->gen_ie_buf_len)) {
+
+                /* Test to see if it is a WPS IE, if so, enable wps session
+                   flag */
+                pvendor_ie = (IEEEtypes_VendorHeader_t *) ie_data_ptr;
+                if ((pvendor_ie->element_id == WPS_IE)
+                    &&
+                    (!memcmp
+                     (priv->adapter, pvendor_ie->oui, wps_oui,
+                      sizeof(wps_oui)))) {
+                    priv->wps.session_enable = MTRUE;
+                    PRINTM(MINFO, "WPS Session Enabled.\n");
+                }
+
+                /* Append the passed data to the end of the genIeBuffer */
+                memcpy(priv->adapter, priv->gen_ie_buf + priv->gen_ie_buf_len,
+                       ie_data_ptr, ie_len);
+                /* Increment the stored buffer length by the size passed */
+                priv->gen_ie_buf_len += ie_len;
+            } else {
+                /* Passed data does not fit in the remaining buffer space */
+                ret = MLAN_STATUS_FAILURE;
+            }
+        }
+    }
+
+    /* Return MLAN_STATUS_SUCCESS, or MLAN_STATUS_FAILURE for error case */
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get WWS mode
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_misc_ioctl_wws_cfg(IN pmlan_adapter pmadapter,
+                        IN pmlan_ioctl_req pioctl_req)
+{
+    pmlan_private pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ds_misc_cfg *misc_cfg = MNULL;
+    t_u16 cmd_action = 0;
+    t_u32 enable = 0;
+
+    ENTER();
+
+    if (pioctl_req->buf_len < sizeof(mlan_ds_misc_cfg)) {
+        PRINTM(MWARN, "MLAN IOCTL information buffer length is too short.\n");
+        pioctl_req->data_read_written = 0;
+        pioctl_req->buf_len_needed = sizeof(mlan_ds_misc_cfg);
+        pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        ret = MLAN_STATUS_RESOURCE;
+        goto exit;
+    }
+
+    misc_cfg = (mlan_ds_misc_cfg *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_SET)
+        cmd_action = HostCmd_ACT_GEN_SET;
+    else
+        cmd_action = HostCmd_ACT_GEN_GET;
+
+    enable = misc_cfg->param.wws_cfg;
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_802_11_SNMP_MIB,
+                           cmd_action,
+                           WwsMode_i, (t_void *) pioctl_req, &enable);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+  exit:
+    LEAVE();
+    return ret;
+
+}
+
+/** 
+ *  @brief Set/Get 11D status
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_11d_cfg_ioctl_enable(IN pmlan_adapter pmadapter,
+                          IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_11d_cfg *pcfg_11d = MNULL;
+
+    ENTER();
+
+    pcfg_11d = (mlan_ds_11d_cfg *) pioctl_req->pbuf;
+
+    if (pioctl_req->action == MLAN_ACT_SET) {
+
+        PRINTM(MINFO, "11D: 11dcfg SET=%d\n", pcfg_11d->param.enable_11d);
+
+        /* Compare with current settings */
+        if (pmpriv->state_11d.user_enable_11d != pcfg_11d->param.enable_11d) {
+            ret =
+                wlan_11d_enable(pmpriv, pioctl_req,
+                                (state_11d_t) pcfg_11d->param.enable_11d);
+            if (ret == MLAN_STATUS_SUCCESS)
+                ret = MLAN_STATUS_PENDING;
+        } else {
+            PRINTM(MINFO, "11D: same as current setting, do nothing\n");
+        }
+    } else {
+        pcfg_11d->param.enable_11d = (t_u32) pmpriv->state_11d.user_enable_11d;
+        pioctl_req->data_read_written = sizeof(t_u32) + MLAN_SUB_COMMAND_SIZE;
+        PRINTM(MINFO, "11D: 11dcfg GET=%d\n", pcfg_11d->param.enable_11d);
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Clear 11D chan table
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success
+ */
+static mlan_status
+wlan_11d_clr_chan_table(IN pmlan_adapter pmadapter,
+                        IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+
+    ENTER();
+
+    if (pioctl_req->action == MLAN_ACT_SET) {
+        PRINTM(MINFO, "11D: 11dclrtbl SET\n");
+
+        if (wlan_11d_clear_parsedtable(pmpriv) == MLAN_STATUS_SUCCESS)
+            PRINTM(MINFO,
+                   "11D: cleared parsed_region_chan (now no_of_chan=%d)\n",
+                   pmadapter->parsed_region_chan.no_of_chan);
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief 11D configuration handler
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_11d_cfg_ioctl(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    mlan_ds_11d_cfg *pcfg_11d = MNULL;
+
+    ENTER();
+
+    if (pioctl_req->buf_len < sizeof(mlan_ds_11d_cfg)) {
+        PRINTM(MWARN, "MLAN bss IOCTL length is too short.\n");
+        pioctl_req->data_read_written = 0;
+        pioctl_req->buf_len_needed = sizeof(mlan_ds_11d_cfg);
+        pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        status = MLAN_STATUS_RESOURCE;
+        goto exit;
+    }
+
+    pcfg_11d = (mlan_ds_11d_cfg *) pioctl_req->pbuf;
+    switch (pcfg_11d->sub_command) {
+    case MLAN_OID_11D_CFG_ENABLE:
+        status = wlan_11d_cfg_ioctl_enable(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_11D_CLR_CHAN_TABLE:
+        status = wlan_11d_clr_chan_table(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_11D_DOMAIN_INFO:
+        status = wlan_11d_cfg_domain_info(pmadapter, pioctl_req);
+        break;
+    default:
+        pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        status = MLAN_STATUS_FAILURE;
+        break;
+    }
+
+  exit:
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief WPS configuration handler
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static mlan_status
+wlan_wps_cfg_ioctl(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_wps_cfg *pwps = MNULL;
+
+    ENTER();
+
+    if (pioctl_req->buf_len < sizeof(mlan_ds_wps_cfg)) {
+        PRINTM(MWARN, "MLAN bss IOCTL length is too short.\n");
+        pioctl_req->data_read_written = 0;
+        pioctl_req->buf_len_needed = sizeof(mlan_ds_wps_cfg);
+        pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        LEAVE();
+        return MLAN_STATUS_RESOURCE;
+    }
+
+    pwps = (mlan_ds_wps_cfg *) pioctl_req->pbuf;
+    switch (pwps->sub_command) {
+    case MLAN_OID_WPS_CFG_SESSION:
+        if (pioctl_req->action == MLAN_ACT_SET) {
+            if (pwps->param.wps_session == MLAN_WPS_CFG_SESSION_START)
+                pmpriv->wps.session_enable = MTRUE;
+        } else {
+            pwps->param.wps_session = (t_u32) pmpriv->wps.session_enable;
+            pioctl_req->data_read_written = sizeof(t_u32);
+            PRINTM(MINFO, "wpscfg GET=%d\n", pwps->param.wps_session);
+        }
+        break;
+    default:
+        pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        status = MLAN_STATUS_FAILURE;
+        break;
+    }
+
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Read/write adapter register
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_reg_mem_ioctl_reg_rw(IN pmlan_adapter pmadapter,
+                          IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_reg_mem *reg_mem = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    t_u16 cmd_action = 0, cmd_no;
+
+    ENTER();
+
+    reg_mem = (mlan_ds_reg_mem *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_GET)
+        cmd_action = HostCmd_ACT_GEN_GET;
+    else
+        cmd_action = HostCmd_ACT_GEN_SET;
+
+    switch (reg_mem->param.reg_rw.type) {
+    case MLAN_REG_MAC:
+        cmd_no = HostCmd_CMD_MAC_REG_ACCESS;
+        break;
+    case MLAN_REG_BBP:
+        cmd_no = HostCmd_CMD_BBP_REG_ACCESS;
+        break;
+    case MLAN_REG_RF:
+        cmd_no = HostCmd_CMD_RF_REG_ACCESS;
+        break;
+    case MLAN_REG_PMIC:
+        cmd_no = HostCmd_CMD_PMIC_REG_ACCESS;
+        break;
+    case MLAN_REG_CAU:
+        cmd_no = HostCmd_CMD_CAU_REG_ACCESS;
+        break;
+    default:
+        pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        ret = MLAN_STATUS_FAILURE;
+        goto exit;
+    }
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv, cmd_no, cmd_action,
+                           0, (t_void *) pioctl_req,
+                           (t_void *) & reg_mem->param.reg_rw);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+  exit:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Read the EEPROM contents of the card 
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_reg_mem_ioctl_read_eeprom(IN pmlan_adapter pmadapter,
+                               IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_reg_mem *reg_mem = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    t_u16 cmd_action = 0;
+
+    ENTER();
+
+    reg_mem = (mlan_ds_reg_mem *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_GET)
+        cmd_action = HostCmd_ACT_GEN_GET;
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_802_11_EEPROM_ACCESS,
+                           cmd_action, 0, (t_void *) pioctl_req,
+                           (t_void *) & reg_mem->param.rd_eeprom);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Read/write memory of device
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_reg_mem_ioctl_mem_rw(IN pmlan_adapter pmadapter,
+                          IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_reg_mem *reg_mem = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    t_u16 cmd_action = 0;
+
+    ENTER();
+
+    reg_mem = (mlan_ds_reg_mem *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_GET)
+        cmd_action = HostCmd_ACT_GEN_GET;
+    else
+        cmd_action = HostCmd_ACT_GEN_SET;
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_MEM_ACCESS,
+                           cmd_action, 0,
+                           (t_void *) pioctl_req,
+                           (t_void *) & reg_mem->param.mem_rw);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief register memory access handler
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_reg_mem_ioctl(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    mlan_ds_reg_mem *reg_mem = MNULL;
+
+    ENTER();
+
+    if (pioctl_req->buf_len < sizeof(mlan_ds_reg_mem)) {
+        PRINTM(MWARN, "MLAN REG_MEM IOCTL length is too short\n");
+        pioctl_req->data_read_written = 0;
+        pioctl_req->buf_len_needed = sizeof(mlan_ds_reg_mem);
+        pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        LEAVE();
+        return MLAN_STATUS_RESOURCE;
+    }
+    reg_mem = (mlan_ds_reg_mem *) pioctl_req->pbuf;
+    switch (reg_mem->sub_command) {
+    case MLAN_OID_REG_RW:
+        status = wlan_reg_mem_ioctl_reg_rw(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_EEPROM_RD:
+        status = wlan_reg_mem_ioctl_read_eeprom(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_MEM_RW:
+        status = wlan_reg_mem_ioctl_mem_rw(pmadapter, pioctl_req);
+        break;
+    default:
+        pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        status = MLAN_STATUS_FAILURE;
+        break;
+    }
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief 802.11h ad-hoc start channel check
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_11h_channel_check_req(IN pmlan_adapter pmadapter,
+                           IN pmlan_ioctl_req pioctl_req)
+{
+    pmlan_private pmpriv = MNULL;
+    mlan_status ret = MLAN_STATUS_FAILURE;
+
+    ENTER();
+
+    if (pioctl_req != MNULL) {
+        pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    } else {
+        PRINTM(MERROR, "MLAN IOCTL information is not present\n");
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+
+    if ((pmadapter->adhoc_start_band & BAND_A)
+        || (pmadapter->adhoc_start_band & BAND_AN)
+        ) {
+        if (pmpriv->intf_state_11h.adhoc_auto_sel_chan)
+            pmpriv->adhoc_channel = wlan_11h_get_adhoc_start_channel(pmpriv);
+
+        /* 
+         * Check if the region and channel requires a channel availability
+         * check.
+         */
+        if (wlan_11h_radar_detect_required(pmpriv, pmpriv->adhoc_channel)
+            ) {
+            /* 
+             * Radar detection is required for this channel, make sure
+             * 11h is activated in the firmware
+             */
+            ret = wlan_11h_activate(pmpriv, MNULL, MTRUE);
+
+            /* Check for radar on the channel */
+            ret =
+                wlan_11h_radar_detected(pmpriv, pioctl_req,
+                                        pmpriv->adhoc_channel);
+            if (ret == MLAN_STATUS_SUCCESS)
+                ret = MLAN_STATUS_PENDING;
+        }
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief 802.11h set/get local power constraint 
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_11h_ioctl_local_power_constraint(IN pmlan_adapter pmadapter,
+                                      IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_ds_11h_cfg *ds_11hcfg = MNULL;
+    t_s8 *plocalpower = &pmadapter->state_11h.usr_def_power_constraint;
+
+    ENTER();
+
+    ds_11hcfg = (mlan_ds_11h_cfg *) pioctl_req->pbuf;
+
+    if (pioctl_req->action == MLAN_ACT_GET)
+        ds_11hcfg->param.usr_local_power_constraint = *plocalpower;
+    else
+        *plocalpower = ds_11hcfg->param.usr_local_power_constraint;
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief 11h configuration handler
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_11h_cfg_ioctl(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    mlan_ds_11h_cfg *ds_11hcfg = MNULL;
+
+    ENTER();
+
+    if (pioctl_req->buf_len < sizeof(mlan_ds_11h_cfg)) {
+        PRINTM(MWARN, "MLAN 11H IOCTL length is too short.\n");
+        pioctl_req->data_read_written = 0;
+        pioctl_req->buf_len_needed = sizeof(mlan_ds_11h_cfg);
+        pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        LEAVE();
+        return MLAN_STATUS_RESOURCE;
+    }
+    ds_11hcfg = (mlan_ds_11h_cfg *) pioctl_req->pbuf;
+
+    switch (ds_11hcfg->sub_command) {
+    case MLAN_OID_11H_CHANNEL_CHECK:
+        status = wlan_11h_channel_check_req(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_11H_LOCAL_POWER_CONSTRAINT:
+        status = wlan_11h_ioctl_local_power_constraint(pmadapter, pioctl_req);
+        break;
+    default:
+        pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        status = MLAN_STATUS_FAILURE;
+        break;
+    }
+
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Set/Get generic IE
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static mlan_status
+wlan_misc_ioctl_gen_ie(IN pmlan_adapter pmadapter,
+                       IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_misc_cfg *misc = MNULL;
+
+    ENTER();
+
+    misc = (mlan_ds_misc_cfg *) pioctl_req->pbuf;
+    switch (misc->param.gen_ie.type) {
+    case MLAN_IE_TYPE_GEN_IE:
+        if (pioctl_req->action == MLAN_ACT_GET) {
+            misc->param.gen_ie.len = pmpriv->wpa_ie_len;
+            memcpy(pmadapter, misc->param.gen_ie.ie_data, pmpriv->wpa_ie,
+                   misc->param.gen_ie.len);
+        } else {
+            wlan_set_gen_ie_helper(pmpriv, misc->param.gen_ie.ie_data,
+                                   (t_u16) misc->param.gen_ie.len);
+        }
+        break;
+    case MLAN_IE_TYPE_ARP_FILTER:
+        memset(pmadapter, pmadapter->arp_filter, 0,
+               sizeof(pmadapter->arp_filter));
+        if (misc->param.gen_ie.len > ARP_FILTER_MAX_BUF_SIZE) {
+            pmadapter->arp_filter_size = 0;
+            PRINTM(MERROR, "Invalid ARP Filter Size\n");
+            pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+            ret = MLAN_STATUS_FAILURE;
+        } else if (misc->param.gen_ie.len <= sizeof(MrvlIEtypesHeader_t)) {
+            pmadapter->arp_filter_size = 0;
+            PRINTM(MINFO, "Clear ARP filter\n");
+        } else {
+            memcpy(pmadapter, pmadapter->arp_filter, misc->param.gen_ie.ie_data,
+                   misc->param.gen_ie.len);
+            pmadapter->arp_filter_size = misc->param.gen_ie.len;
+            HEXDUMP("ArpFilter", pmadapter->arp_filter,
+                    pmadapter->arp_filter_size);
+        }
+        break;
+    default:
+        PRINTM(MERROR, "Invalid IE type\n");
+        pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        ret = MLAN_STATUS_FAILURE;
+    }
+    pioctl_req->data_read_written =
+        sizeof(mlan_ds_misc_gen_ie) + MLAN_SUB_COMMAND_SIZE;
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get region code
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static mlan_status
+wlan_misc_ioctl_region(IN pmlan_adapter pmadapter,
+                       IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_misc_cfg *misc = MNULL;
+    int i;
+
+    ENTER();
+
+    misc = (mlan_ds_misc_cfg *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_GET) {
+        misc->param.region_code = pmadapter->region_code;
+    } else {
+        for (i = 0; i < MRVDRV_MAX_REGION_CODE; i++) {
+            /* Use the region code to search for the index */
+            if (misc->param.region_code == region_code_index[i]) {
+                pmadapter->region_code = (t_u16) misc->param.region_code;
+                break;
+            }
+        }
+        /* It's unidentified region code */
+        if (i >= MRVDRV_MAX_REGION_CODE) {
+            PRINTM(MERROR, "Region Code not identified\n");
+            pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+            LEAVE();
+            return MLAN_STATUS_FAILURE;
+        }
+        if (wlan_set_regiontable(pmpriv, (t_u8) pmadapter->region_code,
+                                 pmadapter->config_bands | pmadapter->
+                                 adhoc_start_band)) {
+            pioctl_req->status_code = MLAN_ERROR_IOCTL_FAIL;
+            ret = MLAN_STATUS_FAILURE;
+        }
+    }
+    pioctl_req->data_read_written = sizeof(t_u32) + MLAN_SUB_COMMAND_SIZE;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Perform warm reset
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING
+ */
+static mlan_status
+wlan_misc_ioctl_warm_reset(IN pmlan_adapter pmadapter,
+                           IN pmlan_ioctl_req pioctl_req)
+{
+    pmlan_private pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    pmlan_callbacks pcb = &pmadapter->callbacks;
+    pmlan_buffer pmbuf;
+    t_s32 i = 0;
+
+    ENTER();
+
+    /** Init all the head nodes and free all the locks here */
+    for (i = 0; i < pmadapter->priv_num; i++) {
+        wlan_free_priv(pmadapter->priv[i]);
+    }
+
+    while ((pmbuf = (pmlan_buffer) util_dequeue_list(pmadapter->pmoal_handle,
+                                                     &pmadapter->rx_data_queue,
+                                                     pcb->moal_spin_lock,
+                                                     pcb->moal_spin_unlock))) {
+        pcb->moal_recv_complete(pmadapter->pmoal_handle, pmbuf,
+                                MLAN_USB_EP_DATA, MLAN_STATUS_FAILURE);
+    }
+
+    /* Initialize adapter structure */
+    wlan_init_adapter(pmadapter);
+
+    /* Initialize private structures */
+    for (i = 0; i < pmadapter->priv_num; i++) {
+        if (pmadapter->priv[i]) {
+            wlan_init_priv(pmadapter->priv[i]);
+        }
+    }
+
+    /* Restart the firmware */
+    wlan_prepare_cmd(pmpriv, HostCmd_CMD_FUNC_SHUTDOWN,
+                     HostCmd_ACT_GEN_SET, 0, MNULL, MNULL);
+
+    /* Issue firmware initialize commands for first BSS, for other interfaces
+       it will be called after getting the last init command response of
+       previous interface */
+    pmpriv = wlan_get_priv(pmadapter, MLAN_BSS_ROLE_ANY);
+    pmadapter->pwarm_reset_ioctl_req = pioctl_req;
+    pmpriv->ops.init_cmd(pmpriv, MTRUE);
+
+    LEAVE();
+    return MLAN_STATUS_PENDING;
+}
+
+/** 
+ *  @brief Send Heart Beat command
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_misc_ioctl_heart_beat(IN pmlan_adapter pmadapter,
+                           IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_private pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    pmlan_callbacks pcb = (pmlan_callbacks) & pmadapter->callbacks;
+    mlan_ds_misc_cfg *misc = (mlan_ds_misc_cfg *) pioctl_req->pbuf;
+    t_u16 cmd_action = 0;
+
+    ENTER();
+
+    cmd_action = HostCmd_ACT_GEN_SET;
+    if (pioctl_req->action == MLAN_ACT_GET)
+        cmd_action = HostCmd_ACT_GEN_GET;
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_HEART_BEAT,
+                           cmd_action,
+                           0,
+                           (t_void *) pioctl_req,
+                           (t_void *) & misc->param.heart_beat);
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    if (pioctl_req->action == MLAN_ACT_SET) {
+        /* Setting up host timer */
+        if (misc->param.heart_beat.debug_for_host == MTRUE)
+            misc->param.heart_beat.h2d_timer = 0;
+        if (!(misc->param.heart_beat.h2d_timer)) {
+            /**cancel host timer */
+            if (pmadapter->hb_host_timer_is_set) {
+                pcb->moal_stop_timer(pmadapter->pmoal_handle,
+                                     pmadapter->hb_host_timer);
+                pmadapter->hb_host_timer_is_set = MFALSE;
+            }
+        } else if (misc->param.heart_beat.h2d_timer != HB_CFG_NO_CHANGE) {
+            if (pmadapter->hb_host_timer_is_set) {
+                pcb->moal_stop_timer(pmadapter->pmoal_handle,
+                                     pmadapter->hb_host_timer);
+            }
+            pmadapter->hb_host_time = misc->param.heart_beat.h2d_timer * 100;
+            pcb->moal_start_timer(pmadapter->pmoal_handle,
+                                  pmadapter->hb_host_timer, MFALSE,
+                                  pmadapter->hb_host_time);
+            pmadapter->hb_host_timer_is_set = MTRUE;
+            pmadapter->host_to_dev_traffic = 0;
+        }
+
+        /* Setting up device timer */
+        if (misc->param.heart_beat.debug_for_device == MTRUE)
+            misc->param.heart_beat.d2h_timer = HB_CFG_NO_CHANGE;
+        if (!(misc->param.heart_beat.d2h_timer)) {
+            if (pmadapter->hb_dev_timer_is_set) {
+                pcb->moal_stop_timer(pmadapter->pmoal_handle,
+                                     pmadapter->hb_device_timer);
+                pmadapter->hb_dev_timer_is_set = MFALSE;
+            }
+        } else if (misc->param.heart_beat.d2h_timer != HB_CFG_NO_CHANGE) {
+            if (pmadapter->hb_dev_timer_is_set)
+                pcb->moal_stop_timer(pmadapter->pmoal_handle,
+                                     pmadapter->hb_device_timer);
+            pmadapter->hb_dev_time = misc->param.heart_beat.d2h_timer * 100;
+            pcb->moal_start_timer(pmadapter->pmoal_handle,
+                                  pmadapter->hb_device_timer, MFALSE,
+                                  pmadapter->hb_dev_time);
+            pmadapter->hb_dev_timer_is_set = MTRUE;
+            pmadapter->hb_dev_counter = 0;
+        }
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get system clock configuration
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_misc_ioctl_sysclock(IN pmlan_adapter pmadapter,
+                         IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_misc_cfg *misc = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    t_u16 cmd_action = 0;
+
+    ENTER();
+
+    misc = (mlan_ds_misc_cfg *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_GET)
+        cmd_action = HostCmd_ACT_GEN_GET;
+    else
+        cmd_action = HostCmd_ACT_GEN_SET;
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_ECL_SYSTEM_CLOCK_CONFIG,
+                           cmd_action,
+                           0,
+                           (t_void *) pioctl_req,
+                           (t_void *) & misc->param.sys_clock);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Send function softreset command to firmware
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_misc_ioctl_soft_reset(IN pmlan_adapter pmadapter,
+                           IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+    /* Send command to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_SOFT_RESET,
+                           HostCmd_ACT_GEN_SET,
+                           0, (t_void *) pioctl_req, MNULL);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set/Get the MAC control configuration.
+ *
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param pioctl_req   A pointer to ioctl request buffer
+ *
+ *  @return             MLAN_STATUS_PENDING -- success, otherwise fail
+ */
+mlan_status
+wlan_misc_ioctl_mac_control(IN pmlan_adapter pmadapter,
+                            IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_misc_cfg *misc = (mlan_ds_misc_cfg *) pioctl_req->pbuf;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    t_u16 cmd_action = 0;
+
+    ENTER();
+
+    misc = (mlan_ds_misc_cfg *) pioctl_req->pbuf;
+
+    if (pioctl_req->action == MLAN_ACT_GET) {
+        misc->param.mac_ctrl = pmpriv->curr_pkt_filter;
+    } else {
+        pmpriv->curr_pkt_filter = misc->param.mac_ctrl;
+        cmd_action = HostCmd_ACT_GEN_SET;
+
+        /* Send command to firmware */
+        ret = wlan_prepare_cmd(pmpriv,
+                               HostCmd_CMD_MAC_CONTROL,
+                               cmd_action, 0,
+                               (t_void *) pioctl_req, &misc->param.mac_ctrl);
+
+        if (ret == MLAN_STATUS_SUCCESS)
+            ret = MLAN_STATUS_PENDING;
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Get the thermal reading
+ *
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param pioctl_req   A pointer to ioctl request buffer
+ *
+ *  @return             MLAN_STATUS_PENDING -- success, otherwise fail
+ */
+mlan_status
+wlan_misc_ioctl_thermal(IN pmlan_adapter pmadapter,
+                        IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ds_misc_cfg *misc = MNULL;
+    t_u16 cmd_action = 0;
+
+    ENTER();
+
+    if (pioctl_req->buf_len < sizeof(mlan_ds_misc_cfg)) {
+        PRINTM(MWARN, "MLAN IOCTL information buffer length is too short.\n");
+        pioctl_req->data_read_written = 0;
+        pioctl_req->buf_len_needed = sizeof(mlan_ds_misc_cfg);
+        pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        LEAVE();
+        return MLAN_STATUS_RESOURCE;
+    }
+
+    misc = (mlan_ds_misc_cfg *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_SET) {
+        PRINTM(MERROR, "Thermal reading setting is not allowed!\n");
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    } else {
+        cmd_action = HostCmd_ACT_GEN_GET;
+    }
+
+    /* Send command to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_802_11_SNMP_MIB,
+                           cmd_action, Thermal_i, (t_void *) pioctl_req, MNULL);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set ARP filter based on IP address 
+ *
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param pioctl_req   A pointer to ioctl request buffer
+ *  @param ipv4_addr    ipv4 Address
+ *
+ *  @return             MLAN_STATUS_PENDING --success, otherwise fail
+ */
+mlan_status
+wlan_ipaddr_arp_filter(IN pmlan_adapter pmadapter,
+                       IN pmlan_ioctl_req pioctl_req, IN t_u32 ipv4_addr)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_callbacks pcb = &pmadapter->callbacks;
+    t_u8 *buf;
+    arpfilter_header *arpfilter = MNULL;
+    filter_entry *entry = MNULL;
+    t_u32 len;
+
+    ENTER();
+
+    pcb->moal_malloc(pmadapter->pmoal_handle, MRVDRV_SIZE_OF_CMD_BUFFER,
+                     MLAN_MEM_DEF, &buf);
+    if (!buf) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* Construct the ARP filter TLV */
+    arpfilter = (arpfilter_header *) buf;
+    arpfilter->type = wlan_cpu_to_le16(TLV_TYPE_ARP_FILTER);
+
+    if (ipv4_addr) {
+        arpfilter->len = wlan_cpu_to_le16(sizeof(filter_entry) * 3);
+        entry = (filter_entry *) (buf + sizeof(arpfilter_header));
+        entry->addr_type = wlan_cpu_to_le16(ADDR_TYPE_BROADCAST);
+        entry->eth_type = wlan_cpu_to_le16(ETHER_TYPE_ARP);
+        entry->ipv4_addr = wlan_cpu_to_le32(ipv4_addr);
+        entry++;
+        entry->addr_type = wlan_cpu_to_le16(ADDR_TYPE_UNICAST);
+        entry->eth_type = wlan_cpu_to_le16(ETHER_TYPE_ANY);
+        entry->ipv4_addr = wlan_cpu_to_le32(IPV4_ADDR_ANY);
+        entry++;
+        entry->addr_type = wlan_cpu_to_le16(ADDR_TYPE_MULTICAST);
+        entry->eth_type = wlan_cpu_to_le16(ETHER_TYPE_ANY);
+        entry->ipv4_addr = wlan_cpu_to_le32(IPV4_ADDR_ANY);
+    } else
+        arpfilter->len = 0;
+
+    /* Update the total length */
+    len = sizeof(arpfilter_header) + wlan_le16_to_cpu(arpfilter->len);
+
+    memset(pmadapter, pmadapter->arp_filter, 0, sizeof(pmadapter->arp_filter));
+    if (len > ARP_FILTER_MAX_BUF_SIZE) {
+        pmadapter->arp_filter_size = 0;
+        PRINTM(MERROR, "Invalid ARP Filter Size\n");
+        pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        ret = MLAN_STATUS_FAILURE;
+    } else if (len <= sizeof(MrvlIEtypesHeader_t)) {
+        pmadapter->arp_filter_size = 0;
+        PRINTM(MINFO, "Clear ARP filter\n");
+    } else {
+        memcpy(pmadapter, pmadapter->arp_filter, buf, len);
+        pmadapter->arp_filter_size = len;
+        HEXDUMP("ArpFilter", pmadapter->arp_filter, pmadapter->arp_filter_size);
+    }
+
+  done:
+    if (buf)
+        pcb->moal_mfree(pmadapter->pmoal_handle, buf);
+    LEAVE();
+    return ret;
+}
+
+#define FLTR_BUF_IP_OFFSET      39
+/**
+ *  @brief Enable/Disable Auto ARP resonse
+ *
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param pioctl_req   A pointer to ioctl request buffer
+ *  @param ipv4_addr    ipv4 Address
+ *
+ *  @return             MLAN_STATUS_PENDING --success, otherwise fail
+ */
+mlan_status
+wlan_ipaddr_auto_arp_resp(IN pmlan_adapter pmadapter,
+                          IN pmlan_ioctl_req pioctl_req, IN t_u32 ipv4_addr)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    HostCmd_DS_GEN *hostcmd_hdr;
+    HostCmd_DS_MEF_CFG *mefcmd;
+    pmlan_callbacks pcb = &pmadapter->callbacks;
+    mlan_ds_misc_cmd *hostcmd;
+    t_u32 buf_len = 0;
+    t_u8 *buf, *filter;
+    t_u8 fltr_buf[] = { 0x01, 0x10, 0x30, 0x00, 0x06, 0x00, 0x00, 0x00,
+        0x01, 0xff, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00,
+        0x01, 0x41, 0x01, 0x00, 0x00, 0x00, 0x01, 0x08,
+        0x06, 0x02, 0x02, 0x14, 0x00, 0x00, 0x00, 0x01,
+        0x41, 0x44, 0x01, 0x00, 0x00, 0x00, 0x01, 0xc0,
+        0xa8, 0x00, 0x68, 0x04, 0x02, 0x2e, 0x00, 0x00,
+        0x00, 0x01, 0x41, 0x44
+    };
+
+    ENTER();
+
+    ret = pcb->moal_malloc(pmadapter->pmoal_handle,
+                           sizeof(mlan_ds_misc_cmd),
+                           MLAN_MEM_DEF, (t_u8 **) & hostcmd);
+
+    if (ret != MLAN_STATUS_SUCCESS || hostcmd == MNULL) {
+        PRINTM(MERROR, "Failed to allocate hostcmd  buffer\n");
+        pioctl_req->status_code = MLAN_ERROR_NO_MEM;
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+
+    memset(pmpriv->adapter, hostcmd, 0, sizeof(mlan_ds_misc_cmd));
+    buf = hostcmd->cmd;
+
+    /* Prepare hostcmd buffer */
+    hostcmd_hdr = (HostCmd_DS_GEN *) (buf);
+    hostcmd_hdr->command = wlan_cpu_to_le16(HostCmd_CMD_MEF_CFG);
+    mefcmd = (HostCmd_DS_MEF_CFG *) (buf + S_DS_GEN);
+    buf_len = S_DS_GEN;
+
+    if (!ipv4_addr) {
+        PRINTM(MINFO, "Disable Auto ARP Response\n");
+        mefcmd->criteria = wlan_cpu_to_le32(0);
+        mefcmd->nentries = wlan_cpu_to_le16(0);
+        buf_len += sizeof(HostCmd_DS_MEF_CFG);
+    } else {
+        /* Event bit (bit2) of HS conditions should be masked out */
+        mefcmd->criteria =
+            wlan_cpu_to_le32(pmpriv->adapter->hs_cfg.conditions & ~MBIT(2));
+        mefcmd->nentries = wlan_cpu_to_le16(1);
+        buf_len += sizeof(HostCmd_DS_MEF_CFG);
+        filter = buf + buf_len;
+        memcpy(pmpriv->adapter, filter, fltr_buf, sizeof(fltr_buf));
+        memcpy(pmpriv->adapter, &filter[FLTR_BUF_IP_OFFSET], &ipv4_addr,
+               sizeof(ipv4_addr));
+        buf_len += sizeof(fltr_buf);
+    }
+    hostcmd_hdr->size = wlan_cpu_to_le16(buf_len);
+    hostcmd->len = buf_len;
+
+    /* Send command to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           0, 0, 0, (t_void *) pioctl_req, (t_void *) hostcmd);
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    pcb->moal_mfree(pmadapter->pmoal_handle, (t_u8 *) hostcmd);
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief MEF configuration 
+ *
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param pioctl_req   A pointer to ioctl request buffer
+ *
+ *  @return             MLAN_STATUS_PENDING --success, otherwise fail
+ */
+mlan_status
+wlan_misc_ioctl_mef_cfg(IN pmlan_adapter pmadapter,
+                        IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_misc_mef_cfg *mef_cfg =
+        &((mlan_ds_misc_cfg *) pioctl_req->pbuf)->param.mef_cfg;
+    pmlan_callbacks pcb = &pmadapter->callbacks;
+    HostCmd_DS_GEN *hostcmd_hdr;
+    HostCmd_DS_MEF_CFG *mefcmd;
+    mlan_ds_misc_cmd *hostcmd = MNULL;
+    t_u32 buf_len = 0;
+    t_u8 *buf, *filter;
+    t_u8 fltr_buf[] = { 0x02, 0x00, 0x2f, 0x00, 0x01, 0x00, 0x00, 0x00,
+        0x01, 0x01, 0x00, 0x5e, 0x03, 0x02, 0x00, 0x00,
+        0x00, 0x00, 0x01, 0x41, 0x06, 0x00, 0x00, 0x00,
+        0x01, 0xff, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00,
+        0x01, 0x41, 0x45, 0x01, 0x00, 0x00, 0x00, 0x01,
+        0x33, 0x33, 0x02, 0x02, 0x00, 0x00, 0x00, 0x00,
+        0x01, 0x41, 0x45
+    };
+
+    ENTER();
+
+    /* GET operation */
+    if (pioctl_req->action == MLAN_ACT_GET) {
+        /* TODO: need to store for get operation */
+        goto done;
+    }
+
+    ret = pcb->moal_malloc(pmadapter->pmoal_handle,
+                           sizeof(mlan_ds_misc_cmd),
+                           MLAN_MEM_DEF, (t_u8 **) & hostcmd);
+
+    if (ret != MLAN_STATUS_SUCCESS || hostcmd == MNULL) {
+        PRINTM(MERROR, "Failed to allocate hostcmd  buffer\n");
+        pioctl_req->status_code = MLAN_ERROR_NO_MEM;
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    memset(pmpriv->adapter, hostcmd, 0, sizeof(mlan_ds_misc_cmd));
+    buf = hostcmd->cmd;
+
+    /* Prepare hostcmd buffer */
+    hostcmd_hdr = (HostCmd_DS_GEN *) (buf);
+    hostcmd_hdr->command = wlan_cpu_to_le16(HostCmd_CMD_MEF_CFG);
+    mefcmd = (HostCmd_DS_MEF_CFG *) (buf + S_DS_GEN);
+    buf_len = S_DS_GEN;
+
+    switch (mef_cfg->sub_id) {
+    case MEF_CFG_DISABLE:
+        PRINTM(MINFO, "Disable MEF\n");
+        mefcmd->criteria = wlan_cpu_to_le32(0);
+        mefcmd->nentries = wlan_cpu_to_le16(0);
+        buf_len += sizeof(HostCmd_DS_MEF_CFG);
+        break;
+    case MEF_CFG_RX_FILTER_ENABLE:
+        PRINTM(MINFO, "Enable Rx filter\n");
+        mefcmd->criteria = wlan_cpu_to_le32((MBIT(3) | MBIT(0)));
+        mefcmd->nentries = wlan_cpu_to_le16(1);
+        buf_len += sizeof(HostCmd_DS_MEF_CFG);
+        filter = buf + buf_len;
+        memcpy(pmpriv->adapter, filter, fltr_buf, sizeof(fltr_buf));
+        buf_len += sizeof(fltr_buf);
+        break;
+    case MEF_CFG_AUTO_ARP_RESP:
+        PRINTM(MINFO, "Enable auto ARP response\n");
+        // TODO
+        break;
+    case MEF_CFG_HOSTCMD:
+        PRINTM(MINFO, "MEF hostcmd from MOAL\n");
+        filter = buf + buf_len;
+        memcpy(pmpriv->adapter, filter, mef_cfg->param.cmd_buf.cmd,
+               mef_cfg->param.cmd_buf.len);
+        buf_len += mef_cfg->param.cmd_buf.len;
+        break;
+    default:
+        PRINTM(MERROR, "Invalid sub ID parameter\n");
+        pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+        break;
+    }
+    hostcmd_hdr->size = wlan_cpu_to_le16(buf_len);
+    hostcmd->len = buf_len;
+
+    /* Send command to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           0, 0, 0, (t_void *) pioctl_req, (t_void *) hostcmd);
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+  done:
+    if (hostcmd)
+        pcb->moal_mfree(pmadapter->pmoal_handle, (t_u8 *) hostcmd);
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief ipaddr configuration 
+ *
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param pioctl_req   A pointer to ioctl request buffer
+ *
+ *  @return             MLAN_STATUS_PENDING --success, otherwise fail
+ */
+mlan_status
+wlan_misc_ioctl_ipaddr_cfg(IN pmlan_adapter pmadapter,
+                           IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_misc_cfg *misc = (mlan_ds_misc_cfg *) pioctl_req->pbuf;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    t_u32 ipv4_addr;
+
+    ENTER();
+
+    /* GET operation */
+    if (pioctl_req->action == MLAN_ACT_GET) {
+        memcpy(pmadapter, misc->param.ipaddr_cfg.ip_addr,
+               pmpriv->ip_addr, IPADDR_LEN);
+        misc->param.ipaddr_cfg.op_code = pmpriv->op_code;
+        goto done;
+    }
+    /* only one IP is supported in current firmware */
+    memcpy(pmadapter, &ipv4_addr, misc->param.ipaddr_cfg.ip_addr[0],
+           sizeof(t_u32));
+
+    if (misc->param.ipaddr_cfg.op_code != MLAN_IPADDR_OP_IP_REMOVE &&
+        !ipv4_addr) {
+        PRINTM(MERROR, "Invalid IPv4 address\n");
+        pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+    if (misc->param.ipaddr_cfg.op_code & MLAN_IPADDR_OP_ARP_FILTER)
+        ret = wlan_ipaddr_arp_filter(pmadapter, pioctl_req, ipv4_addr);
+    else if (pmpriv->op_code & MLAN_IPADDR_OP_ARP_FILTER)
+        ret = wlan_ipaddr_arp_filter(pmadapter, pioctl_req, 0);
+    if (ret == MLAN_STATUS_FAILURE)
+        goto done;
+    if (misc->param.ipaddr_cfg.op_code & MLAN_IPADDR_OP_AUTO_ARP_RESP)
+        ret = wlan_ipaddr_auto_arp_resp(pmadapter, pioctl_req, ipv4_addr);
+    else if (pmpriv->op_code & MLAN_IPADDR_OP_AUTO_ARP_RESP)
+        ret = wlan_ipaddr_auto_arp_resp(pmadapter, pioctl_req, 0);
+    if (ret == MLAN_STATUS_FAILURE)
+        goto done;
+
+    /* Save the values in MLAN */
+    if (pioctl_req->action == MLAN_ACT_SET) {
+        pmpriv->op_code = misc->param.ipaddr_cfg.op_code;
+        memcpy(pmadapter, pmpriv->ip_addr,
+               misc->param.ipaddr_cfg.ip_addr, IPADDR_LEN);
+    }
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Miscellaneous configuration handler
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_misc_cfg_ioctl(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    mlan_ds_misc_cfg *misc = MNULL;
+
+    ENTER();
+
+    if (pioctl_req->buf_len < sizeof(mlan_ds_misc_cfg)) {
+        PRINTM(MWARN, "MLAN bss IOCTL length is too short.\n");
+        pioctl_req->data_read_written = 0;
+        pioctl_req->buf_len_needed = sizeof(mlan_ds_misc_cfg);
+        pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+        LEAVE();
+        return MLAN_STATUS_RESOURCE;
+    }
+    misc = (mlan_ds_misc_cfg *) pioctl_req->pbuf;
+    switch (misc->sub_command) {
+    case MLAN_OID_MISC_GEN_IE:
+        status = wlan_misc_ioctl_gen_ie(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_MISC_REGION:
+        status = wlan_misc_ioctl_region(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_MISC_WARM_RESET:
+        status = wlan_misc_ioctl_warm_reset(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_MISC_HEART_BEAT:
+        status = wlan_misc_ioctl_heart_beat(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_MISC_HOST_CMD:
+        status = wlan_misc_ioctl_host_cmd(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_MISC_SYS_CLOCK:
+        status = wlan_misc_ioctl_sysclock(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_MISC_WWS:
+        status = wlan_misc_ioctl_wws_cfg(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_MISC_INIT_SHUTDOWN:
+        status = wlan_misc_ioctl_init_shutdown(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_MISC_SOFT_RESET:
+        status = wlan_misc_ioctl_soft_reset(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_MISC_CUSTOM_IE:
+        status = wlan_misc_ioctl_custom_ie_list(pmadapter, pioctl_req, MTRUE);
+        break;
+    case MLAN_OID_MISC_MAC_CONTROL:
+        status = wlan_misc_ioctl_mac_control(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_MISC_MEF_CFG:
+        status = wlan_misc_ioctl_mef_cfg(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_MISC_IP_ADDR:
+        status = wlan_misc_ioctl_ipaddr_cfg(pmadapter, pioctl_req);
+        break;
+    case MLAN_OID_MISC_THERMAL:
+        status = wlan_misc_ioctl_thermal(pmadapter, pioctl_req);
+        break;
+    default:
+        if (pioctl_req)
+            pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        status = MLAN_STATUS_FAILURE;
+        break;
+    }
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Set/Get scan configuration parameter
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *  @param action	    Set/Get
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success
+ */
+static mlan_status
+wlan_set_get_scan_cfg(IN pmlan_adapter pmadapter,
+                      IN pmlan_ioctl_req pioctl_req, IN t_u32 action)
+{
+    mlan_ds_scan *scan = MNULL;
+
+    ENTER();
+
+    scan = (mlan_ds_scan *) pioctl_req->pbuf;
+    if (action == MLAN_ACT_GET) {
+        scan->param.scan_cfg.scan_type = (t_u32) pmadapter->scan_type;
+        scan->param.scan_cfg.scan_mode = pmadapter->scan_mode;
+        scan->param.scan_cfg.scan_probe = (t_u32) pmadapter->scan_probes;
+        scan->param.scan_cfg.scan_time.specific_scan_time =
+            (t_u32) pmadapter->specific_scan_time;
+        scan->param.scan_cfg.scan_time.active_scan_time =
+            (t_u32) pmadapter->active_scan_time;
+        scan->param.scan_cfg.scan_time.passive_scan_time =
+            (t_u32) pmadapter->passive_scan_time;
+    } else {
+        if (scan->param.scan_cfg.scan_type)
+            pmadapter->scan_type = (t_u8) scan->param.scan_cfg.scan_type;
+        if (scan->param.scan_cfg.scan_mode)
+            pmadapter->scan_mode = scan->param.scan_cfg.scan_mode;
+        if (scan->param.scan_cfg.scan_probe)
+            pmadapter->scan_probes = (t_u16) scan->param.scan_cfg.scan_probe;
+        if (scan->param.scan_cfg.scan_time.specific_scan_time)
+            pmadapter->specific_scan_time =
+                (t_u16) scan->param.scan_cfg.scan_time.specific_scan_time;
+        if (scan->param.scan_cfg.scan_time.active_scan_time)
+            pmadapter->active_scan_time =
+                (t_u16) scan->param.scan_cfg.scan_time.active_scan_time;
+        if (scan->param.scan_cfg.scan_time.passive_scan_time)
+            pmadapter->passive_scan_time =
+                (t_u16) scan->param.scan_cfg.scan_time.passive_scan_time;
+    }
+    pioctl_req->data_read_written = sizeof(t_u32) + MLAN_SUB_COMMAND_SIZE;
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief Set/Get scan
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_scan_ioctl(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    pmlan_private pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    mlan_ds_scan *pscan;
+
+    ENTER();
+
+    pscan = (mlan_ds_scan *) pioctl_req->pbuf;
+    if (pmadapter->scan_processing && pioctl_req->action == MLAN_ACT_SET &&
+        pscan->sub_command != MLAN_OID_SCAN_CANCEL) {
+        PRINTM(MINFO, "Scan already in process...\n");
+        LEAVE();
+        return status;
+    }
+
+    if (pmpriv->scan_block && pioctl_req->action == MLAN_ACT_SET) {
+        PRINTM(MINFO, "Scan is blocked during association...\n");
+        wlan_recv_event(pmpriv, MLAN_EVENT_ID_DRV_SCAN_REPORT, MNULL);
+        LEAVE();
+        return status;
+    }
+
+    /* Set scan */
+    if (pioctl_req->action == MLAN_ACT_SET) {
+
+        switch (pscan->sub_command) {
+        case MLAN_OID_SCAN_NORMAL:
+            status = wlan_scan_networks(pmpriv, pioctl_req, MNULL);
+            break;
+        case MLAN_OID_SCAN_SPECIFIC_SSID:
+            status =
+                wlan_scan_specific_ssid(pmpriv, pioctl_req,
+                                        &pscan->param.scan_req.scan_ssid);
+            break;
+        case MLAN_OID_SCAN_USER_CONFIG:
+            status = wlan_scan_networks(pmpriv, pioctl_req,
+                                        (wlan_user_scan_cfg *) pscan->param.
+                                        user_scan.scan_cfg_buf);
+            break;
+        case MLAN_OID_SCAN_CONFIG:
+            status = wlan_set_get_scan_cfg(pmadapter, pioctl_req, MLAN_ACT_SET);
+            break;
+        case MLAN_OID_SCAN_CANCEL:
+            wlan_flush_scan_queue(pmadapter);
+            break;
+        case MLAN_OID_SCAN_TABLE_FLUSH:
+            status = wlan_flush_scan_table(pmadapter);
+            break;
+        default:
+            pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+            status = MLAN_STATUS_FAILURE;
+            break;
+        }
+
+        if ((status == MLAN_STATUS_SUCCESS) &&
+            (pscan->sub_command != MLAN_OID_SCAN_TABLE_FLUSH) &&
+            (pscan->sub_command != MLAN_OID_SCAN_CANCEL) &&
+            (pscan->sub_command != MLAN_OID_SCAN_CONFIG)) {
+            PRINTM(MINFO, "wlan_scan_ioctl: return MLAN_STATUS_PENDING\n");
+            status = MLAN_STATUS_PENDING;
+        }
+    }
+    /* Get scan */
+    else {
+        if (pscan->sub_command == MLAN_OID_SCAN_CONFIG) {
+            status = wlan_set_get_scan_cfg(pmadapter, pioctl_req, MLAN_ACT_GET);
+        } else if (pscan->sub_command == MLAN_OID_SCAN_GET_CURRENT_BSS) {
+            pscan->param.scan_resp.num_in_scan_table =
+                pmadapter->num_in_scan_table;
+            pscan->param.scan_resp.pscan_table =
+                (t_u8 *) & pmpriv->curr_bss_params.bss_descriptor;
+            pioctl_req->data_read_written =
+                sizeof(mlan_scan_resp) + MLAN_SUB_COMMAND_SIZE;
+        } else {
+            pscan->param.scan_resp.pscan_table =
+                (t_u8 *) pmadapter->pscan_table;
+            pscan->param.scan_resp.num_in_scan_table =
+                pmadapter->num_in_scan_table;
+            pscan->param.scan_resp.age_in_secs = pmadapter->age_in_secs;
+            pioctl_req->data_read_written = sizeof(mlan_scan_resp) +
+                MLAN_SUB_COMMAND_SIZE;
+        }
+    }
+
+    LEAVE();
+    return status;
+}
+
+/********************************************************
+                Global Functions
+********************************************************/
+
+/** 
+ *  @brief Set ewpa mode
+ *
+ *  @param priv                 A pointer to mlan_private structure
+ *  @param psec_pp              A pointer to mlan_ds_passphrase structure
+ *
+ *  @return                     MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_set_ewpa_mode(mlan_private * priv, mlan_ds_passphrase * psec_pp)
+{
+    ENTER();
+
+    if ((psec_pp->psk_type == MLAN_PSK_PASSPHRASE &&
+         psec_pp->psk.passphrase.passphrase_len > 0) ||
+        (psec_pp->psk_type == MLAN_PSK_PMK))
+        priv->sec_info.ewpa_enabled = MTRUE;
+    else
+        priv->sec_info.ewpa_enabled = MFALSE;
+
+    PRINTM(MINFO, "Set ewpa mode = %d\n", priv->sec_info.ewpa_enabled);
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief Search for a BSS
+ *
+ *  @param pmpriv           A pointer to mlan_private structure
+ *  @param pioctl_req       A pointer to ioctl request buffer
+ *
+ *  @return		            MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+mlan_status
+wlan_find_bss(mlan_private * pmpriv, pmlan_ioctl_req pioctl_req)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+    mlan_ds_bss *bss = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    t_u8 zero_mac[] = { 0, 0, 0, 0, 0, 0 };
+    t_u8 mac[MLAN_MAC_ADDR_LENGTH];
+    int i = 0;
+    BSSDescriptor_t *pbss_desc;
+
+    ENTER();
+
+    bss = (mlan_ds_bss *) pioctl_req->pbuf;
+
+    if (memcmp
+        (pmadapter, &bss->param.ssid_bssid.bssid, zero_mac, sizeof(zero_mac))) {
+        if (bss->param.ssid_bssid.ssid.ssid_len)        /* ssid & bssid */
+            i = wlan_find_ssid_in_list(pmpriv, &bss->param.ssid_bssid.ssid,
+                                       (t_u8 *) & bss->param.ssid_bssid.bssid,
+                                       pmpriv->bss_mode);
+        else
+            i = wlan_find_bssid_in_list(pmpriv,
+                                        (t_u8 *) & bss->param.ssid_bssid.bssid,
+                                        pmpriv->bss_mode);
+        if (i < 0) {
+            memcpy(pmadapter, mac, &bss->param.ssid_bssid.bssid, sizeof(mac));
+            PRINTM(MERROR, "Can not find bssid %02x:%02x:%02x:%02x:%02x:%02x\n",
+                   mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
+            pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+            LEAVE();
+            return MLAN_STATUS_FAILURE;
+        }
+        pbss_desc = &pmadapter->pscan_table[i];
+        memcpy(pmadapter, &bss->param.ssid_bssid.ssid, &pbss_desc->ssid,
+               sizeof(mlan_802_11_ssid));
+        /* index in bss list,start from 1 */
+        bss->param.ssid_bssid.idx = i + 1;
+    } else if (bss->param.ssid_bssid.ssid.ssid_len) {
+        i = wlan_find_ssid_in_list(pmpriv, &bss->param.ssid_bssid.ssid, MNULL,
+                                   pmpriv->bss_mode);
+        if (i < 0) {
+            PRINTM(MERROR, "Can not find ssid %s\n",
+                   bss->param.ssid_bssid.ssid.ssid);
+            pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+            LEAVE();
+            return MLAN_STATUS_FAILURE;
+        }
+        pbss_desc = &pmadapter->pscan_table[i];
+        memcpy(pmadapter, (t_u8 *) & bss->param.ssid_bssid.bssid,
+               (t_u8 *) & pbss_desc->mac_address, MLAN_MAC_ADDR_LENGTH);
+        /* index in bss list, start from 1 */
+        bss->param.ssid_bssid.idx = i + 1;
+    } else {
+        ret = wlan_find_best_network(pmpriv, &bss->param.ssid_bssid);
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief MLAN station ioctl handler
+ *
+ *  @param adapter 	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING --success, otherwise fail
+ */
+mlan_status
+wlan_ops_sta_ioctl(t_void * adapter, pmlan_ioctl_req pioctl_req)
+{
+    pmlan_adapter pmadapter = (pmlan_adapter) adapter;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+    switch (pioctl_req->req_id) {
+    case MLAN_IOCTL_SCAN:
+        status = wlan_scan_ioctl(pmadapter, pioctl_req);
+        break;
+    case MLAN_IOCTL_BSS:
+        status = wlan_bss_ioctl(pmadapter, pioctl_req);
+        break;
+    case MLAN_IOCTL_RADIO_CFG:
+        status = wlan_radio_ioctl(pmadapter, pioctl_req);
+        break;
+    case MLAN_IOCTL_SNMP_MIB:
+        status = wlan_snmp_mib_ioctl(pmadapter, pioctl_req);
+        break;
+    case MLAN_IOCTL_GET_INFO:
+        status = wlan_get_info_ioctl(pmadapter, pioctl_req);
+        break;
+    case MLAN_IOCTL_SEC_CFG:
+        status = wlan_sec_cfg_ioctl(pmadapter, pioctl_req);
+        break;
+    case MLAN_IOCTL_RATE:
+        status = wlan_rate_ioctl(pmadapter, pioctl_req);
+        break;
+    case MLAN_IOCTL_POWER_CFG:
+        status = wlan_power_ioctl(pmadapter, pioctl_req);
+        break;
+    case MLAN_IOCTL_PM_CFG:
+        status = wlan_pm_ioctl(pmadapter, pioctl_req);
+        break;
+    case MLAN_IOCTL_WMM_CFG:
+        status = wlan_wmm_cfg_ioctl(pmadapter, pioctl_req);
+        break;
+    case MLAN_IOCTL_WPS_CFG:
+        status = wlan_wps_cfg_ioctl(pmadapter, pioctl_req);
+        break;
+    case MLAN_IOCTL_11N_CFG:
+        status = wlan_11n_cfg_ioctl(pmadapter, pioctl_req);
+        break;
+    case MLAN_IOCTL_11D_CFG:
+        status = wlan_11d_cfg_ioctl(pmadapter, pioctl_req);
+        break;
+    case MLAN_IOCTL_REG_MEM:
+        status = wlan_reg_mem_ioctl(pmadapter, pioctl_req);
+        break;
+    case MLAN_IOCTL_MISC_CFG:
+        status = wlan_misc_cfg_ioctl(pmadapter, pioctl_req);
+        break;
+    case MLAN_IOCTL_11H_CFG:
+        status = wlan_11h_cfg_ioctl(pmadapter, pioctl_req);
+        break;
+    default:
+        pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        status = MLAN_STATUS_FAILURE;
+        break;
+    }
+    LEAVE();
+    return status;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_sta_rx.c linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_sta_rx.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_sta_rx.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_sta_rx.c	2017-09-23 03:42:50.146674673 +0800
@@ -0,0 +1,284 @@
+/** @file mlan_sta_rx.c
+ *
+ *  @brief This file contains the handling of RX in MLAN
+ *  module.
+ * 
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ *
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/********************************************************
+Change log:
+    10/27/2008: initial version
+********************************************************/
+
+#include "mlan.h"
+#include "mlan_join.h"
+#include "mlan_util.h"
+#include "mlan_fw.h"
+#include "mlan_main.h"
+#include "mlan_11n_aggr.h"
+#include "mlan_11n_rxreorder.h"
+
+/********************************************************
+		Local Variables
+********************************************************/
+
+/** Ethernet II header */
+typedef struct
+{
+    /** Ethernet II header destination address */
+    t_u8 dest_addr[MLAN_MAC_ADDR_LENGTH];
+    /** Ethernet II header source address */
+    t_u8 src_addr[MLAN_MAC_ADDR_LENGTH];
+    /** Ethernet II header length */
+    t_u16 ethertype;
+
+} EthII_Hdr_t;
+
+/********************************************************
+		Global Variables
+********************************************************/
+
+/********************************************************
+		Local Functions
+********************************************************/
+
+/********************************************************
+		Global functions
+********************************************************/
+/**
+ *  @brief This function processes received packet and forwards it
+ *  		to kernel/upper layer
+ *  
+ *  @param pmadapter A pointer to mlan_adapter
+ *  @param pmbuf     A pointer to mlan_buffer which includes the received packet
+ *
+ *  @return 	   MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_process_rx_packet(pmlan_adapter pmadapter, pmlan_buffer pmbuf)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_private priv = pmadapter->priv[pmbuf->bss_index];
+    RxPacketHdr_t *prx_pkt;
+    RxPD *prx_pd;
+    int hdr_chop;
+    EthII_Hdr_t *peth_hdr;
+    t_u8 rfc1042_eth_hdr[MLAN_MAC_ADDR_LENGTH] =
+        { 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 };
+    t_u8 snap_oui_802_h[MLAN_MAC_ADDR_LENGTH] =
+        { 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8 };
+    t_u8 appletalk_aarp_type[2] = { 0x80, 0xf3 };
+    t_u8 ipx_snap_type[2] = { 0x81, 0x37 };
+
+    ENTER();
+
+    prx_pd = (RxPD *) (pmbuf->pbuf + pmbuf->data_offset);
+    prx_pkt = (RxPacketHdr_t *) ((t_u8 *) prx_pd + prx_pd->rx_pkt_offset);
+
+/** Small debug type */
+#define DBG_TYPE_SMALL  2
+/** Size of debugging structure */
+#define SIZE_OF_DBG_STRUCT 4
+    if (prx_pd->rx_pkt_type == PKT_TYPE_DEBUG) {
+        t_u8 dbgType;
+        dbgType = *(t_u8 *) & prx_pkt->eth803_hdr;
+        if (dbgType == DBG_TYPE_SMALL) {
+            PRINTM(MFW_D, "\n");
+            DBG_HEXDUMP(MFW_D, "FWDBG",
+                        (t_s8 *) ((t_u8 *) & prx_pkt->eth803_hdr +
+                                  SIZE_OF_DBG_STRUCT), prx_pd->rx_pkt_length);
+            PRINTM(MFW_D, "FWDBG::\n");
+        }
+        goto done;
+    }
+
+    PRINTM(MINFO, "RX Data: data_len - prx_pd->rx_pkt_offset = %d - %d = %d\n",
+           pmbuf->data_len, prx_pd->rx_pkt_offset,
+           pmbuf->data_len - prx_pd->rx_pkt_offset);
+
+    HEXDUMP("RX Data: Dest", prx_pkt->eth803_hdr.dest_addr,
+            sizeof(prx_pkt->eth803_hdr.dest_addr));
+    HEXDUMP("RX Data: Src", prx_pkt->eth803_hdr.src_addr,
+            sizeof(prx_pkt->eth803_hdr.src_addr));
+
+    if ((memcmp(pmadapter, &prx_pkt->rfc1042_hdr,
+                snap_oui_802_h, sizeof(snap_oui_802_h)) == 0) ||
+        ((memcmp(pmadapter, &prx_pkt->rfc1042_hdr,
+                 rfc1042_eth_hdr, sizeof(rfc1042_eth_hdr)) == 0) &&
+         memcmp(pmadapter, &prx_pkt->rfc1042_hdr.snap_type,
+                appletalk_aarp_type, sizeof(appletalk_aarp_type)) &&
+         memcmp(pmadapter, &prx_pkt->rfc1042_hdr.snap_type,
+                ipx_snap_type, sizeof(ipx_snap_type)))) {
+        /* 
+         *  Replace the 803 header and rfc1042 header (llc/snap) with an 
+         *    EthernetII header, keep the src/dst and snap_type (ethertype).
+         *  The firmware only passes up SNAP frames converting
+         *    all RX Data from 802.11 to 802.2/LLC/SNAP frames.
+         *  To create the Ethernet II, just move the src, dst address right
+         *    before the snap_type.
+         */
+        peth_hdr = (EthII_Hdr_t *)
+            ((t_u8 *) & prx_pkt->eth803_hdr
+             + sizeof(prx_pkt->eth803_hdr) + sizeof(prx_pkt->rfc1042_hdr)
+             - sizeof(prx_pkt->eth803_hdr.dest_addr)
+             - sizeof(prx_pkt->eth803_hdr.src_addr)
+             - sizeof(prx_pkt->rfc1042_hdr.snap_type));
+
+        memcpy(pmadapter, peth_hdr->src_addr, prx_pkt->eth803_hdr.src_addr,
+               sizeof(peth_hdr->src_addr));
+        memcpy(pmadapter, peth_hdr->dest_addr, prx_pkt->eth803_hdr.dest_addr,
+               sizeof(peth_hdr->dest_addr));
+
+        /* Chop off the RxPD + the excess memory from the 802.2/llc/snap header 
+           that was removed. */
+        hdr_chop = (t_u32) ((t_ptr) peth_hdr - (t_ptr) prx_pd);
+    } else {
+        HEXDUMP("RX Data: LLC/SNAP",
+                (t_u8 *) & prx_pkt->rfc1042_hdr, sizeof(prx_pkt->rfc1042_hdr));
+
+        /* Chop off the RxPD */
+        hdr_chop = (t_u32) ((t_ptr) & prx_pkt->eth803_hdr - (t_ptr) prx_pd);
+    }
+
+    /* Chop off the leading header bytes so the it points to the start of
+       either the reconstructed EthII frame or the 802.2/llc/snap frame */
+    pmbuf->data_len -= hdr_chop;
+    pmbuf->data_offset += hdr_chop;
+    pmbuf->pparent = MNULL;
+
+    DBG_HEXDUMP(MDAT_D, "RxPD", (t_u8 *) prx_pd,
+                MIN(sizeof(RxPD), MAX_DATA_DUMP_LEN));
+    DBG_HEXDUMP(MDAT_D, "Rx Payload", ((t_u8 *) prx_pd + prx_pd->rx_pkt_offset),
+                MIN(prx_pd->rx_pkt_length, MAX_DATA_DUMP_LEN));
+
+    priv->rxpd_rate = prx_pd->rx_rate;
+
+    priv->rxpd_htinfo = prx_pd->ht_info;
+    pmadapter->callbacks.moal_get_system_time(pmadapter->pmoal_handle,
+                                              &pmbuf->out_ts_sec,
+                                              &pmbuf->out_ts_usec);
+    PRINTM(MDATA, "%lu.%06lu : Data => kernel seq_num=%d tid=%d\n",
+           pmbuf->out_ts_sec, pmbuf->out_ts_usec, prx_pd->seq_num,
+           prx_pd->priority);
+    ret = pmadapter->callbacks.moal_recv_packet(pmadapter->pmoal_handle, pmbuf);
+    if (ret == MLAN_STATUS_FAILURE) {
+        pmbuf->status_code = MLAN_ERROR_PKT_INVALID;
+        PRINTM(MERROR, "STA Rx Error: moal_recv_packet returned error\n");
+    }
+  done:
+    if (ret != MLAN_STATUS_PENDING) {
+        pmadapter->callbacks.moal_recv_complete(pmadapter->pmoal_handle, pmbuf,
+                                                MLAN_USB_EP_DATA, ret);
+    }
+    LEAVE();
+
+    return ret;
+}
+
+/**
+ *   @brief This function processes the received buffer
+ *     
+ *   @param adapter A pointer to mlan_adapter
+ *   @param pmbuf     A pointer to the received buffer
+ *
+ *   @return        MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_ops_sta_process_rx_packet(IN t_void * adapter, IN pmlan_buffer pmbuf)
+{
+    pmlan_adapter pmadapter = (pmlan_adapter) adapter;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    RxPD *prx_pd;
+    RxPacketHdr_t *prx_pkt;
+    pmlan_private priv = pmadapter->priv[pmbuf->bss_index];
+    t_u8 ta[MLAN_MAC_ADDR_LENGTH];
+    t_u16 rx_pkt_type = 0;
+    ENTER();
+
+    prx_pd = (RxPD *) (pmbuf->pbuf + pmbuf->data_offset);
+    /* Endian conversion */
+    endian_convert_RxPD(prx_pd);
+    rx_pkt_type = prx_pd->rx_pkt_type;
+    prx_pkt = (RxPacketHdr_t *) ((t_u8 *) prx_pd + prx_pd->rx_pkt_offset);
+
+    if ((prx_pd->rx_pkt_offset + prx_pd->rx_pkt_length) >
+        (t_u16) pmbuf->data_len) {
+        PRINTM(MERROR,
+               "Wrong rx packet: len=%d,rx_pkt_offset=%d,"
+               " rx_pkt_length=%d\n", pmbuf->data_len, prx_pd->rx_pkt_offset,
+               prx_pd->rx_pkt_length);
+        pmbuf->status_code = MLAN_ERROR_PKT_SIZE_INVALID;
+        ret = MLAN_STATUS_FAILURE;
+        pmadapter->callbacks.moal_recv_complete(pmadapter->pmoal_handle,
+                                                pmbuf, MLAN_USB_EP_DATA, ret);
+        goto done;
+    }
+    pmbuf->data_len = prx_pd->rx_pkt_offset + prx_pd->rx_pkt_length;
+    if (prx_pd->rx_pkt_type == PKT_TYPE_AMSDU) {
+        pmbuf->data_len = prx_pd->rx_pkt_length;
+        pmbuf->data_offset += prx_pd->rx_pkt_offset;
+        wlan_11n_deaggregate_pkt(priv, pmbuf);
+        goto done;
+    }
+    /* 
+     * If the packet is not an unicast packet then send the packet
+     * directly to os. Don't pass thru rx reordering
+     */
+    if (!IS_11N_ENABLED(priv) ||
+        memcmp(priv->adapter, priv->curr_addr, prx_pkt->eth803_hdr.dest_addr,
+               MLAN_MAC_ADDR_LENGTH)) {
+        wlan_process_rx_packet(pmadapter, pmbuf);
+        goto done;
+    }
+
+    if (queuing_ra_based(priv)) {
+        memcpy(pmadapter, ta, prx_pkt->eth803_hdr.src_addr,
+               MLAN_MAC_ADDR_LENGTH);
+    } else {
+        if ((rx_pkt_type != PKT_TYPE_BAR) && (prx_pd->priority < MAX_NUM_TID))
+            priv->rx_seq[prx_pd->priority] = prx_pd->seq_num;
+        memcpy(pmadapter, ta,
+               priv->curr_bss_params.bss_descriptor.mac_address,
+               MLAN_MAC_ADDR_LENGTH);
+    }
+
+    /* Reorder and send to OS */
+    if ((ret = mlan_11n_rxreorder_pkt(priv, prx_pd->seq_num,
+                                      prx_pd->priority, ta,
+                                      (t_u8) prx_pd->rx_pkt_type,
+                                      (void *) pmbuf)) ||
+        (rx_pkt_type == PKT_TYPE_BAR)
+        ) {
+        if ((ret =
+             pmadapter->callbacks.moal_recv_complete(pmadapter->pmoal_handle,
+                                                     pmbuf, MLAN_USB_EP_DATA,
+                                                     ret)))
+            PRINTM(MERROR, "STA Rx Error: moal_recv_complete returned error\n");
+    }
+
+  done:
+
+    LEAVE();
+    return (ret);
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_sta_tx.c linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_sta_tx.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_sta_tx.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_sta_tx.c	2017-09-23 03:42:50.146674673 +0800
@@ -0,0 +1,268 @@
+/** @file mlan_sta_tx.c
+ *
+ *  @brief This file contains the handling of data packet
+ *  transmission in MLAN module.
+ * 
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ *
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/********************************************************
+Change log:
+    10/21/2008: initial version
+********************************************************/
+
+#include "mlan.h"
+#include "mlan_join.h"
+#include "mlan_util.h"
+#include "mlan_fw.h"
+#include "mlan_main.h"
+#include "mlan_wmm.h"
+
+/********************************************************
+		Local Variables
+********************************************************/
+
+/********************************************************
+		Global Variables
+********************************************************/
+
+/********************************************************
+		Local Functions
+********************************************************/
+
+/********************************************************
+		Global functions
+********************************************************/
+/** 
+ *  @brief This function fill the txpd for tx packet  
+ *  
+ *  @param priv	   A pointer to mlan_private structure
+ *  @param pmbuf   A pointer to the mlan_buffer for process
+ *
+ *  @return 	   headptr or MNULL
+ */
+t_void *
+wlan_ops_sta_process_txpd(IN t_void * priv, IN pmlan_buffer pmbuf)
+{
+    mlan_private *pmpriv = (mlan_private *) priv;
+    pmlan_adapter pmadapter = pmpriv->adapter;
+    TxPD *plocal_tx_pd;
+    t_u8 *head_ptr = MNULL;
+
+    ENTER();
+
+    if (!pmbuf->data_len) {
+        PRINTM(MERROR, "STA Tx Error: Invalid packet length: %d\n",
+               pmbuf->data_len);
+        pmbuf->status_code = MLAN_ERROR_PKT_SIZE_INVALID;
+        goto done;
+    }
+
+    if (pmbuf->data_offset < (sizeof(TxPD) + INTF_HEADER_LEN + DMA_ALIGNMENT)) {
+        PRINTM(MERROR, "not enough space for TxPD: %d\n", pmbuf->data_len);
+        pmbuf->status_code = MLAN_ERROR_PKT_SIZE_INVALID;
+        goto done;
+    }
+
+    /* head_ptr should be aligned */
+    head_ptr =
+        pmbuf->pbuf + pmbuf->data_offset - sizeof(TxPD) - INTF_HEADER_LEN;
+    head_ptr = (t_u8 *) ((t_ptr) head_ptr & ~((t_ptr) (DMA_ALIGNMENT - 1)));
+
+    plocal_tx_pd = (TxPD *) (head_ptr + INTF_HEADER_LEN);
+    memset(pmadapter, plocal_tx_pd, 0, sizeof(TxPD));
+    /* Set the BSS number to TxPD */
+    plocal_tx_pd->bss_num = GET_BSS_NUM(pmpriv);
+    plocal_tx_pd->bss_type = pmpriv->bss_type;
+
+    plocal_tx_pd->tx_pkt_length = (t_u16) pmbuf->data_len;
+
+    plocal_tx_pd->priority = (t_u8) pmbuf->priority;
+    plocal_tx_pd->pkt_delay_2ms =
+        wlan_wmm_compute_driver_packet_delay(pmpriv, pmbuf);
+
+    if (plocal_tx_pd->priority < NELEMENTS(pmpriv->wmm.user_pri_pkt_tx_ctrl))
+        /* 
+         * Set the priority specific tx_control field, setting of 0 will
+         *   cause the default value to be used later in this function
+         */
+        plocal_tx_pd->tx_control
+            = pmpriv->wmm.user_pri_pkt_tx_ctrl[plocal_tx_pd->priority];
+    if (pmadapter->pps_uapsd_mode) {
+        if (MTRUE == wlan_check_last_packet_indication(pmpriv)) {
+            pmadapter->tx_lock_flag = MTRUE;
+            plocal_tx_pd->flags = MRVDRV_TxPD_POWER_MGMT_LAST_PACKET;
+        }
+    }
+
+    /* Offset of actual data */
+    plocal_tx_pd->tx_pkt_offset =
+        (t_u16) ((t_ptr) pmbuf->pbuf + pmbuf->data_offset -
+                 (t_ptr) plocal_tx_pd);
+
+    if (!plocal_tx_pd->tx_control) {
+        /* TxCtrl set by user or default */
+        plocal_tx_pd->tx_control = pmpriv->pkt_tx_ctrl;
+    }
+
+    endian_convert_TxPD(plocal_tx_pd);
+
+    /* Adjust the data offset and length to include TxPD in pmbuf */
+    pmbuf->data_len += pmbuf->data_offset;
+    pmbuf->data_offset = (t_u32) (head_ptr - pmbuf->pbuf);
+    pmbuf->data_len -= pmbuf->data_offset;
+
+  done:
+    LEAVE();
+    return head_ptr;
+}
+
+/** 
+ *  @brief This function tells firmware to send a NULL data packet.
+ *  
+ *  @param priv     A pointer to mlan_private structure
+ *  @param flags    Transmit Pkt Flags
+ *
+ *  @return 	    MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING --success, otherwise failure
+ */
+mlan_status
+wlan_send_null_packet(pmlan_private priv, t_u8 flags)
+{
+    pmlan_adapter pmadapter = priv->adapter;
+    TxPD *ptx_pd;
+/* sizeof(TxPD) + Interface specific header */
+#define NULL_PACKET_HDR 256
+    t_u32 data_len = NULL_PACKET_HDR;
+    pmlan_buffer pmbuf = MNULL;
+    t_u8 *ptr;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    t_u32 sec, usec;
+
+    ENTER();
+
+    if (pmadapter->surprise_removed == MTRUE) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    if (priv->media_connected == MFALSE) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    if (pmadapter->data_sent == MTRUE) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    pmbuf = wlan_alloc_mlan_buffer(pmadapter, data_len, 0, MTRUE);
+    if (!pmbuf) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+    memset(pmadapter, pmbuf->pbuf, 0, data_len);
+    pmbuf->bss_index = priv->bss_index;
+    pmbuf->buf_type = MLAN_BUF_TYPE_DATA;
+    ptr = pmbuf->pbuf + pmbuf->data_offset;
+    pmbuf->data_len = sizeof(TxPD) + INTF_HEADER_LEN;
+    ptx_pd = (TxPD *) (ptr + INTF_HEADER_LEN);
+    ptx_pd->tx_control = priv->pkt_tx_ctrl;
+    ptx_pd->flags = flags;
+    ptx_pd->priority = WMM_HIGHEST_PRIORITY;
+    ptx_pd->tx_pkt_offset = sizeof(TxPD);
+    /* Set the BSS number to TxPD */
+    ptx_pd->bss_num = GET_BSS_NUM(priv);
+    ptx_pd->bss_type = priv->bss_type;
+
+    endian_convert_TxPD(ptx_pd);
+
+    ret =
+        pmadapter->callbacks.moal_write_data_async(pmadapter->pmoal_handle,
+                                                   pmbuf, MLAN_USB_EP_DATA);
+
+    switch (ret) {
+    case MLAN_STATUS_RESOURCE:
+        pmadapter->data_sent = MTRUE;
+        /* Fall through FAILURE handling */
+    case MLAN_STATUS_FAILURE:
+        wlan_free_mlan_buffer(pmadapter, pmbuf);
+        PRINTM(MERROR, "STA Tx Error: Failed to send NULL packet!\n");
+        pmadapter->dbg.num_tx_host_to_card_failure++;
+        goto done;
+    case MLAN_STATUS_SUCCESS:
+        wlan_free_mlan_buffer(pmadapter, pmbuf);
+        PRINTM(MINFO, "STA Tx: Successfully send the NULL packet\n");
+        pmadapter->tx_lock_flag = MTRUE;
+        break;
+    case MLAN_STATUS_PENDING:
+        break;
+    default:
+        break;
+    }
+
+    pmadapter->callbacks.moal_get_system_time(pmadapter->pmoal_handle, &sec,
+                                              &usec);
+    PRINTM(MDATA, "%lu.%06lu : Null data => FW\n", sec, usec);
+    DBG_HEXDUMP(MDAT_D, "Null data", ptr, sizeof(TxPD) + INTF_HEADER_LEN);
+  done:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief This function checks if we need to send last packet indication.
+ *  
+ *  @param priv    A pointer to mlan_private structure
+ *
+ *  @return 	   MTRUE or MFALSE
+ */
+t_u8
+wlan_check_last_packet_indication(pmlan_private priv)
+{
+    pmlan_adapter pmadapter = priv->adapter;
+    t_u8 ret = MFALSE;
+    t_u8 prop_ps = MTRUE;
+
+    ENTER();
+
+    if (!pmadapter->sleep_period.period) {
+        LEAVE();
+        return ret;
+    }
+    if (wlan_bypass_tx_list_empty(pmadapter) && wlan_wmm_lists_empty(pmadapter)) {
+        if (((priv->curr_bss_params.wmm_uapsd_enabled == MTRUE) &&
+             priv->wmm_qosinfo) || prop_ps)
+
+            ret = MTRUE;
+    }
+    if (ret && !pmadapter->cmd_sent && !pmadapter->curr_cmd
+        && !IS_COMMAND_PENDING(pmadapter)) {
+        pmadapter->delay_null_pkt = MFALSE;
+        ret = MTRUE;
+    } else {
+        ret = MFALSE;
+        pmadapter->delay_null_pkt = MTRUE;
+    }
+    LEAVE();
+    return ret;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_txrx.c linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_txrx.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_txrx.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_txrx.c	2017-09-23 03:42:50.146674673 +0800
@@ -0,0 +1,394 @@
+/**
+ * @file mlan_txrx.c
+ *
+ *  @brief This file contains the handling of TX/RX in MLAN
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ *
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2009 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/*************************************************************
+Change Log:
+    05/11/2009: initial version
+************************************************************/
+
+#include "mlan.h"
+#ifdef STA_SUPPORT
+#include "mlan_join.h"
+#endif
+#include "mlan_util.h"
+#include "mlan_fw.h"
+#include "mlan_main.h"
+#include "mlan_wmm.h"
+
+/********************************************************
+                Local Variables
+********************************************************/
+
+/********************************************************
+                Global Variables
+********************************************************/
+
+/********************************************************
+                Local Functions
+********************************************************/
+
+/********************************************************
+                Global Functions
+********************************************************/
+/**
+ *   @brief This function processes the received buffer
+ *     
+ *   @param pmadapter A pointer to mlan_adapter
+ *   @param pmbuf     A pointer to the received buffer
+ *
+ *   @return        MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_handle_rx_packet(pmlan_adapter pmadapter, pmlan_buffer pmbuf)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_private priv = wlan_get_priv(pmadapter, MLAN_BSS_ROLE_ANY);
+    RxPD *prx_pd;
+    t_u32 sec, usec;
+
+    ENTER();
+
+    prx_pd = (RxPD *) (pmbuf->pbuf + pmbuf->data_offset);
+    /* Get the BSS number from RxPD, get corresponding priv */
+    priv =
+        wlan_get_priv_by_id(pmadapter, prx_pd->bss_num & BSS_NUM_MASK,
+                            prx_pd->bss_type);
+    if (!priv)
+        priv = wlan_get_priv(pmadapter, MLAN_BSS_ROLE_ANY);
+    pmbuf->bss_index = priv->bss_index;
+    pmadapter->callbacks.moal_get_system_time(pmadapter->pmoal_handle, &sec,
+                                              &usec);
+    PRINTM(MDATA, "%lu.%06lu : Data <= FW\n", sec, usec);
+    ret = priv->ops.process_rx_packet(pmadapter, pmbuf);
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief This function checks the conditions and sends packet to device 
+ *  
+ *  @param priv	   A pointer to mlan_private structure
+ *  @param pmbuf   A pointer to the mlan_buffer for process
+ *  @param tx_param A pointer to mlan_tx_param structure
+ *
+ *  @return 	    MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING --success, otherwise failure
+ */
+mlan_status
+wlan_process_tx(pmlan_private priv, pmlan_buffer pmbuf,
+                mlan_tx_param * tx_param)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_adapter pmadapter = priv->adapter;
+    t_u8 *head_ptr = MNULL;
+    t_u32 sec, usec;
+#ifdef STA_SUPPORT
+    TxPD *plocal_tx_pd = MNULL;
+#endif
+
+    ENTER();
+
+    head_ptr = (t_u8 *) priv->ops.process_txpd(priv, pmbuf);
+    if (!head_ptr) {
+        pmbuf->status_code = MLAN_ERROR_PKT_INVALID;
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+#ifdef STA_SUPPORT
+    if (GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_STA)
+        plocal_tx_pd = (TxPD *) (head_ptr + INTF_HEADER_LEN);
+#endif
+    pmadapter->data_sent = MTRUE;
+    ret =
+        pmadapter->callbacks.moal_write_data_async(pmadapter->pmoal_handle,
+                                                   pmbuf, MLAN_USB_EP_DATA);
+  done:
+    switch (ret) {
+    case MLAN_STATUS_PRESOURCE:
+        PRINTM(MINFO, "MLAN_STATUS_PRESOURCE is returned\n");
+        DBG_HEXDUMP(MDAT_D, "Tx", head_ptr + INTF_HEADER_LEN,
+                    MIN(pmbuf->data_len + sizeof(TxPD), MAX_DATA_DUMP_LEN));
+        break;
+    case MLAN_STATUS_RESOURCE:
+#ifdef STA_SUPPORT
+        if ((GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_STA) &&
+            pmadapter->pps_uapsd_mode && (pmadapter->tx_lock_flag == MTRUE)) {
+            pmadapter->tx_lock_flag = MFALSE;
+            plocal_tx_pd->flags = 0;
+        }
+#endif
+        PRINTM(MINFO, "MLAN_STATUS_RESOURCE is returned\n");
+        break;
+    case MLAN_STATUS_FAILURE:
+        pmadapter->data_sent = MFALSE;
+        PRINTM(MERROR, "Error: moal_write_data_async failed: 0x%X\n", ret);
+        pmadapter->dbg.num_tx_host_to_card_failure++;
+        pmbuf->status_code = MLAN_ERROR_DATA_TX_FAIL;
+        wlan_write_data_complete(pmadapter, pmbuf, ret);
+        break;
+    case MLAN_STATUS_PENDING:
+        pmadapter->data_sent = MFALSE;
+        DBG_HEXDUMP(MDAT_D, "Tx", head_ptr + INTF_HEADER_LEN,
+                    MIN(pmbuf->data_len + sizeof(TxPD), MAX_DATA_DUMP_LEN));
+        break;
+    case MLAN_STATUS_SUCCESS:
+        DBG_HEXDUMP(MDAT_D, "Tx", head_ptr + INTF_HEADER_LEN,
+                    MIN(pmbuf->data_len + sizeof(TxPD), MAX_DATA_DUMP_LEN));
+        wlan_write_data_complete(pmadapter, pmbuf, ret);
+        break;
+    default:
+        break;
+    }
+
+    if ((ret == MLAN_STATUS_SUCCESS) || (ret == MLAN_STATUS_PENDING)) {
+        pmadapter->callbacks.moal_get_system_time(pmadapter->pmoal_handle, &sec,
+                                                  &usec);
+        PRINTM(MDATA, "%lu.%06lu : Data => FW\n", sec, usec);
+    }
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Packet send completion handling
+ *
+ *  @param pmadapter		A pointer to mlan_adapter structure
+ *  @param pmbuf		A pointer to mlan_buffer structure
+ *  @param status		Callback status
+ *
+ *  @return			MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_write_data_complete(IN pmlan_adapter pmadapter,
+                         IN pmlan_buffer pmbuf, IN mlan_status status)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_callbacks pcb;
+
+    ENTER();
+
+    MASSERT(pmadapter && pmbuf);
+
+    pcb = &pmadapter->callbacks;
+    if (pmbuf->buf_type == MLAN_BUF_TYPE_DATA) {
+        pmadapter->data_sent = MFALSE;
+        PRINTM(MINFO, "wlan_write_data_complete: DATA %p\n", pmbuf);
+        if (pmbuf->flags & MLAN_BUF_FLAG_MOAL_TX_BUF) {
+            /* pmbuf was allocated by MOAL */
+            pcb->moal_send_packet_complete(pmadapter->pmoal_handle,
+                                           pmbuf, status);
+        } else {
+            if (pmbuf->flags & MLAN_BUF_FLAG_BRIDGE_BUF) {
+                pmadapter->pending_bridge_pkts--;
+            }
+            /* pmbuf was allocated by MLAN */
+            wlan_free_mlan_buffer(pmadapter, pmbuf);
+        }
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Packet receive completion callback handler
+ *
+ *  @param pmadapter		A pointer to mlan_adapter structure
+ *  @param pmbuf		A pointer to mlan_buffer structure
+ *  @param status		Callback status
+ *
+ *  @return			MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_recv_packet_complete(IN pmlan_adapter pmadapter,
+                          IN pmlan_buffer pmbuf, IN mlan_status status)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_private pmp;
+    pmlan_callbacks pcb;
+    pmlan_buffer pmbuf_parent;
+
+    ENTER();
+
+    MASSERT(pmadapter && pmbuf);
+    pcb = &pmadapter->callbacks;
+    MASSERT(pmbuf->bss_index < pmadapter->priv_num);
+
+    pmp = pmadapter->priv[pmbuf->bss_index];
+
+    if (pmbuf->pparent) {
+        pmbuf_parent = pmbuf->pparent;
+
+        pmadapter->callbacks.moal_spin_lock(pmadapter->pmoal_handle,
+                                            pmp->rx_pkt_lock);
+        --pmbuf_parent->use_count;
+        if (!pmbuf_parent->use_count) {
+            pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                                  pmp->rx_pkt_lock);
+            pcb->moal_recv_complete(pmadapter->pmoal_handle, pmbuf_parent,
+                                    MLAN_USB_EP_DATA, status);
+        } else {
+            pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                                  pmp->rx_pkt_lock);
+        }
+        wlan_free_mlan_buffer(pmadapter, pmbuf);
+    } else {
+        pcb->moal_recv_complete(pmadapter->pmoal_handle, pmbuf,
+                                MLAN_USB_EP_DATA, status);
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Add packet to Bypass TX queue
+ *
+ *  @param pmadapter  Pointer to the mlan_adapter driver data struct
+ *  @param pmbuf      Pointer to the mlan_buffer data struct
+ *
+ *  @return         N/A
+ */
+t_void
+wlan_add_buf_bypass_txqueue(mlan_adapter * pmadapter, pmlan_buffer pmbuf)
+{
+    ENTER();
+
+    pmbuf->buf_type = MLAN_BUF_TYPE_DATA;
+    util_enqueue_list_tail(pmadapter->pmoal_handle, &pmadapter->bypass_txq,
+                           (pmlan_linked_list) pmbuf,
+                           pmadapter->callbacks.moal_spin_lock,
+                           pmadapter->callbacks.moal_spin_unlock);
+    LEAVE();
+}
+
+/**
+ *  @brief Check if packets are available in Bypass TX queue
+ *
+ *  @param pmadapter  Pointer to the mlan_adapter driver data struct
+ *
+ *  @return         MFALSE if not empty; MTRUE if empty
+ */
+INLINE t_u8
+wlan_bypass_tx_list_empty(mlan_adapter * pmadapter)
+{
+    t_u8 q_empty = MTRUE;
+    pmlan_callbacks pcb = &pmadapter->callbacks;
+    pmlan_private pmpriv = MNULL;
+    ENTER();
+
+    if (!(pmpriv = wlan_get_priv(pmadapter, MLAN_BSS_ROLE_STA))) {
+        goto end;
+    }
+
+    if (pmpriv->port_ctrl_mode == MTRUE) {
+        q_empty =
+            (util_peek_list
+             (pmadapter->pmoal_handle, &pmadapter->bypass_txq,
+              pcb->moal_spin_lock, pcb->moal_spin_unlock)) ? MFALSE : MTRUE;
+    }
+
+  end:
+    LEAVE();
+    return q_empty;
+}
+
+/**
+ *  @brief Clean up the By-pass TX queue
+ *
+ *  @param pmadapter Pointer to the mlan_adapter driver data struct
+ *
+ *  @return      N/A
+ */
+t_void
+wlan_cleanup_bypass_txq(mlan_adapter * pmadapter)
+{
+    pmlan_buffer pmbuf;
+    ENTER();
+
+    pmadapter->callbacks.moal_spin_lock(pmadapter->pmoal_handle,
+                                        pmadapter->bypass_txq.plock);
+
+    while ((pmbuf =
+            (pmlan_buffer) util_peek_list(pmadapter->pmoal_handle,
+                                          &pmadapter->bypass_txq, MNULL,
+                                          MNULL))) {
+        util_unlink_list(pmadapter->pmoal_handle, &pmadapter->bypass_txq,
+                         (pmlan_linked_list) pmbuf, MNULL, MNULL);
+        wlan_write_data_complete(pmadapter, pmbuf, MLAN_STATUS_FAILURE);
+    }
+
+    pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                          pmadapter->bypass_txq.plock);
+
+    LEAVE();
+}
+
+/**
+ *  @brief Transmit the By-passed packet awaiting in by-pass queue
+ *
+ *  @param pmadapter Pointer to the mlan_adapter driver data struct
+ *
+ *  @return        N/A
+ */
+t_void
+wlan_process_bypass_tx(pmlan_adapter pmadapter)
+{
+    pmlan_buffer pmbuf;
+    mlan_tx_param tx_param;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    if ((pmbuf = (pmlan_buffer) util_dequeue_list(pmadapter->pmoal_handle,
+                                                  &pmadapter->bypass_txq,
+                                                  pmadapter->callbacks.
+                                                  moal_spin_lock,
+                                                  pmadapter->callbacks.
+                                                  moal_spin_unlock))) {
+        PRINTM(MINFO, "Dequeuing bypassed packet %p\n", pmbuf);
+        /* XXX: nex_pkt_len ??? */
+        tx_param.next_pkt_len = 0;
+        status =
+            wlan_process_tx(pmadapter->priv[pmbuf->bss_index], pmbuf,
+                            &tx_param);
+
+        if (status == MLAN_STATUS_RESOURCE) {
+            /* Queue the packet again so that it will be TX'ed later */
+            util_enqueue_list_head(pmadapter->pmoal_handle,
+                                   &pmadapter->bypass_txq,
+                                   (pmlan_linked_list) pmbuf,
+                                   pmadapter->callbacks.moal_spin_lock,
+                                   pmadapter->callbacks.moal_spin_unlock);
+        }
+    } else {
+        PRINTM(MINFO, "Nothing to send\n");
+    }
+
+    LEAVE();
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_uap_cmdevent.c linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_uap_cmdevent.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_uap_cmdevent.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_uap_cmdevent.c	2017-09-23 03:42:50.150674661 +0800
@@ -0,0 +1,2614 @@
+/** @file mlan_uap_cmdevent.c
+ *
+ *  @brief This file contains the handling of AP mode command and event
+ * 
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ *
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2009 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/********************************************************
+Change log:
+    02/05/2009: initial version
+********************************************************/
+
+#include "mlan.h"
+#include "mlan_util.h"
+#include "mlan_fw.h"
+#ifdef STA_SUPPORT
+#include "mlan_join.h"
+#endif
+#include "mlan_main.h"
+#include "mlan_uap.h"
+#include "mlan_11n.h"
+#include "mlan_11h.h"
+
+/********************************************************
+    Local Functions
+********************************************************/
+/** 
+ *  @brief This function handles the command response error
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to command buffer
+ *
+ *  @return             N/A
+ */
+static void
+uap_process_cmdresp_error(mlan_private * pmpriv, HostCmd_DS_COMMAND * resp,
+                          mlan_ioctl_req * pioctl_buf)
+{
+    mlan_adapter *pmadapter = pmpriv->adapter;
+
+    ENTER();
+
+    PRINTM(MERROR, "CMD_RESP: cmd %#x error, result=%#x\n", resp->command,
+           resp->result);
+    if (pioctl_buf)
+        pioctl_buf->status_code = resp->result;
+    /* 
+     * Handling errors here
+     */
+    wlan_insert_cmd_to_free_q(pmadapter, pmadapter->curr_cmd);
+
+    wlan_request_cmd_lock(pmadapter);
+    pmadapter->curr_cmd = MNULL;
+    wlan_release_cmd_lock(pmadapter);
+
+    LEAVE();
+    return;
+}
+
+/** 
+ * @brief This function prepares command of hs_cfg.
+ *   
+ * @param pmpriv       A pointer to mlan_private structure
+ * @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ * @param cmd_action   The action: GET or SET
+ * @param pdata_buf    A pointer to data buffer
+ *
+ * @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_uap_cmd_802_11_hs_cfg(IN pmlan_private pmpriv,
+                           IN HostCmd_DS_COMMAND * cmd,
+                           IN t_u16 cmd_action, IN hs_config_param * pdata_buf)
+{
+    HostCmd_DS_802_11_HS_CFG_ENH *phs_cfg = &cmd->params.opt_hs_cfg;
+
+    ENTER();
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_802_11_HS_CFG_ENH);
+    cmd->size =
+        wlan_cpu_to_le16(S_DS_GEN + sizeof(HostCmd_DS_802_11_HS_CFG_ENH));
+
+    if (pdata_buf == MNULL) {
+        phs_cfg->action = wlan_cpu_to_le16(HS_ACTIVATE);
+        phs_cfg->params.hs_activate.resp_ctrl = wlan_cpu_to_le16(RESP_NEEDED);
+    } else {
+        phs_cfg->action = wlan_cpu_to_le16(HS_CONFIGURE);
+        phs_cfg->params.hs_config.conditions =
+            wlan_cpu_to_le32(pdata_buf->conditions);
+        phs_cfg->params.hs_config.gpio = pdata_buf->gpio;
+        phs_cfg->params.hs_config.gap = pdata_buf->gap;
+        PRINTM(MCMND, "HS_CFG_CMD: condition:0x%x gpio:0x%x gap:0x%x\n",
+               phs_cfg->params.hs_config.conditions,
+               phs_cfg->params.hs_config.gpio, phs_cfg->params.hs_config.gap);
+    }
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function prepares command of Tx data pause
+ *  
+ *  @param pmpriv		A pointer to mlan_private structure
+ *  @param cmd	   		A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action   the action: GET or SET
+ *  @param pdata_buf    A pointer to data buffer
+ *  @return         MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_uap_cmd_txdatapause(pmlan_private pmpriv,
+                         IN HostCmd_DS_COMMAND * cmd,
+                         IN t_u16 cmd_action, IN t_void * pdata_buf)
+{
+    HostCmd_DS_CMD_TX_DATA_PAUSE *pause_cmd =
+        (HostCmd_DS_CMD_TX_DATA_PAUSE *) & cmd->params.tx_data_pause;
+    mlan_ds_misc_tx_datapause *data_pause =
+        (mlan_ds_misc_tx_datapause *) pdata_buf;
+
+    ENTER();
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_CFG_TX_DATA_PAUSE);
+    cmd->size =
+        wlan_cpu_to_le16(sizeof(HostCmd_DS_CMD_TX_DATA_PAUSE) + S_DS_GEN);
+    pause_cmd->action = wlan_cpu_to_le16(cmd_action);
+
+    if (cmd_action == HostCmd_ACT_GEN_SET) {
+        pause_cmd->enable_tx_pause = (t_u8) data_pause->tx_pause;
+        pause_cmd->pause_tx_count = (t_u8) data_pause->tx_buf_cnt;
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function handles the command response of Tx data pause
+ *    
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure 
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_uap_ret_txdatapause(IN pmlan_private pmpriv,
+                         IN HostCmd_DS_COMMAND * resp,
+                         IN mlan_ioctl_req * pioctl_buf)
+{
+    HostCmd_DS_CMD_TX_DATA_PAUSE *pause_cmd =
+        (HostCmd_DS_CMD_TX_DATA_PAUSE *) & resp->params.tx_data_pause;
+    mlan_ds_misc_cfg *misc_cfg = MNULL;
+
+    ENTER();
+
+    if (pioctl_buf) {
+        misc_cfg = (mlan_ds_misc_cfg *) pioctl_buf->pbuf;
+        misc_cfg->param.tx_datapause.tx_pause = pause_cmd->enable_tx_pause;
+        misc_cfg->param.tx_datapause.tx_buf_cnt = pause_cmd->pause_tx_count;
+    }
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function will process tx pause event
+ *  		
+ *  
+ *  @param priv    A pointer to mlan_private
+ *  @param pevent  A pointer to event buf
+ *
+ *  @return	       N/A
+ */
+static void
+wlan_process_tx_pause_event(pmlan_private priv, pmlan_buffer pevent)
+{
+    t_u16 tlv_type, tlv_len;
+    int tlv_buf_left = pevent->data_len - sizeof(t_u32);
+    MrvlIEtypesHeader_t *tlv =
+        (MrvlIEtypesHeader_t *) (pevent->pbuf + pevent->data_offset +
+                                 sizeof(t_u32));
+    MrvlIEtypes_tx_pause_t *tx_pause_tlv;
+    sta_node *sta_ptr = MNULL;
+
+    while (tlv_buf_left >= (int) sizeof(MrvlIEtypesHeader_t)) {
+        tlv_type = wlan_le16_to_cpu(tlv->type);
+        tlv_len = wlan_le16_to_cpu(tlv->len);
+        if ((sizeof(MrvlIEtypesHeader_t) + tlv_len) >
+            (unsigned int) tlv_buf_left) {
+            PRINTM(MERROR, "wrong tlv: tlvLen=%d, tlvBufLeft=%d\n", tlv_len,
+                   tlv_buf_left);
+            break;
+        }
+        if (tlv_type == TLV_TYPE_TX_PAUSE) {
+            tx_pause_tlv = (MrvlIEtypes_tx_pause_t *) tlv;
+            PRINTM(MCMND,
+                   "TxPause: %02x:%02x:%02x:%02x:%02x:%02x pause=%d, pkts=%d\n",
+                   tx_pause_tlv->peermac[0], tx_pause_tlv->peermac[1],
+                   tx_pause_tlv->peermac[2], tx_pause_tlv->peermac[3],
+                   tx_pause_tlv->peermac[4], tx_pause_tlv->peermac[5],
+                   tx_pause_tlv->tx_pause, tx_pause_tlv->pkt_cnt);
+            if ((sta_ptr = wlan_get_station_entry(priv, tx_pause_tlv->peermac))) {
+                if (sta_ptr->tx_pause != tx_pause_tlv->tx_pause) {
+                    sta_ptr->tx_pause = tx_pause_tlv->tx_pause;
+                    wlan_updata_ralist_tx_pause(priv, tx_pause_tlv->peermac,
+                                                tx_pause_tlv->tx_pause);
+                }
+            }
+        }
+        tlv_buf_left -= (sizeof(MrvlIEtypesHeader_t) + tlv_len);
+        tlv =
+            (MrvlIEtypesHeader_t *) ((t_u8 *) tlv + tlv_len +
+                                     sizeof(MrvlIEtypesHeader_t));
+    }
+    return;
+}
+
+/**
+ *  @brief This function prepares command for config uap settings
+ *  
+ *  @param pmpriv		A pointer to mlan_private structure
+ *  @param cmd	   		A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action   the action: GET or SET
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure 
+ *  @return         MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_uap_cmd_ap_config(pmlan_private pmpriv,
+                       IN HostCmd_DS_COMMAND * cmd,
+                       IN t_u16 cmd_action, IN pmlan_ioctl_req pioctl_buf)
+{
+    mlan_ds_bss *bss = MNULL;
+    HostCmd_DS_SYS_CONFIG *sys_config =
+        (HostCmd_DS_SYS_CONFIG *) & cmd->params.sys_config;
+    t_u8 *tlv = MNULL;
+    MrvlIEtypes_MacAddr_t *tlv_mac = MNULL;
+    MrvlIEtypes_SsIdParamSet_t *tlv_ssid = MNULL;
+    MrvlIEtypes_beacon_period_t *tlv_beacon_period = MNULL;
+    MrvlIEtypes_dtim_period_t *tlv_dtim_period = MNULL;
+    MrvlIEtypes_RatesParamSet_t *tlv_rates = MNULL;
+    MrvlIEtypes_tx_rate_t *tlv_txrate = MNULL;
+    MrvlIEtypes_mcbc_rate_t *tlv_mcbc_rate = MNULL;
+    MrvlIEtypes_tx_power_t *tlv_tx_power = MNULL;
+    MrvlIEtypes_bcast_ssid_t *tlv_bcast_ssid = MNULL;
+    MrvlIEtypes_antenna_mode_t *tlv_antenna = MNULL;
+    MrvlIEtypes_pkt_forward_t *tlv_pkt_forward = MNULL;
+    MrvlIEtypes_max_sta_count_t *tlv_sta_count = MNULL;
+    MrvlIEtypes_sta_ageout_t *tlv_sta_ageout = MNULL;
+    MrvlIEtypes_ps_sta_ageout_t *tlv_ps_sta_ageout = MNULL;
+    MrvlIEtypes_rts_threshold_t *tlv_rts_threshold = MNULL;
+    MrvlIEtypes_frag_threshold_t *tlv_frag_threshold = MNULL;
+    MrvlIEtypes_retry_limit_t *tlv_retry_limit = MNULL;
+    MrvlIEtypes_eapol_pwk_hsk_timeout_t *tlv_pairwise_timeout = MNULL;
+    MrvlIEtypes_eapol_pwk_hsk_retries_t *tlv_pairwise_retries = MNULL;
+    MrvlIEtypes_eapol_gwk_hsk_timeout_t *tlv_groupwise_timeout = MNULL;
+    MrvlIEtypes_eapol_gwk_hsk_retries_t *tlv_groupwise_retries = MNULL;
+    MrvlIEtypes_mgmt_ie_passthru_t *tlv_mgmt_ie_passthru = MNULL;
+    MrvlIEtypes_2040_coex_enable_t *tlv_2040_coex_enable = MNULL;
+    MrvlIEtypes_mac_filter_t *tlv_mac_filter = MNULL;
+    MrvlIEtypes_channel_band_t *tlv_chan_band = MNULL;
+    MrvlIEtypes_ChanListParamSet_t *tlv_chan_list = MNULL;
+    ChanScanParamSet_t *pscan_chan = MNULL;
+    MrvlIEtypes_auth_type_t *tlv_auth_type = MNULL;
+    MrvlIEtypes_encrypt_protocol_t *tlv_encrypt_protocol = MNULL;
+    MrvlIEtypes_akmp_t *tlv_akmp = MNULL;
+    MrvlIEtypes_pwk_cipher_t *tlv_pwk_cipher = MNULL;
+    MrvlIEtypes_gwk_cipher_t *tlv_gwk_cipher = MNULL;
+    MrvlIEtypes_rsn_replay_prot_t *tlv_rsn_prot = MNULL;
+    MrvlIEtypes_passphrase_t *tlv_passphrase = MNULL;
+    MrvlIEtypes_group_rekey_time_t *tlv_rekey_time = MNULL;
+    MrvlIEtypes_wep_key_t *tlv_wep_key = MNULL;
+    MrvlIETypes_HTCap_t *tlv_htcap = MNULL;
+    MrvlIEtypes_wmm_parameter_t *tlv_wmm_parameter = MNULL;
+    t_u32 cmd_size = 0;
+    t_u8 zero_mac[] = { 0, 0, 0, 0, 0, 0 };
+    t_u16 i;
+    t_u16 ac;
+
+    ENTER();
+    if (pioctl_buf == MNULL) {
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+
+    bss = (mlan_ds_bss *) pioctl_buf->pbuf;
+
+    cmd->command = wlan_cpu_to_le16(HOST_CMD_APCMD_SYS_CONFIGURE);
+    sys_config->action = wlan_cpu_to_le16(cmd_action);
+    cmd_size = sizeof(HostCmd_DS_SYS_CONFIG) - 1 + S_DS_GEN;
+
+    tlv = (t_u8 *) sys_config->tlv_buffer;
+    if (memcmp
+        (pmpriv->adapter, zero_mac, &bss->param.bss_config.mac_addr,
+         MLAN_MAC_ADDR_LENGTH)) {
+        tlv_mac = (MrvlIEtypes_MacAddr_t *) tlv;
+        tlv_mac->header.type = wlan_cpu_to_le16(TLV_TYPE_UAP_MAC_ADDRESS);
+        tlv_mac->header.len = wlan_cpu_to_le16(MLAN_MAC_ADDR_LENGTH);
+        memcpy(pmpriv->adapter, tlv_mac->mac, &bss->param.bss_config.mac_addr,
+               MLAN_MAC_ADDR_LENGTH);
+        cmd_size += sizeof(MrvlIEtypes_MacAddr_t);
+        tlv += sizeof(MrvlIEtypes_MacAddr_t);
+    }
+
+    if (bss->param.bss_config.ssid.ssid_len) {
+        tlv_ssid = (MrvlIEtypes_SsIdParamSet_t *) tlv;
+        tlv_ssid->header.type = wlan_cpu_to_le16(TLV_TYPE_SSID);
+        tlv_ssid->header.len =
+            wlan_cpu_to_le16((t_u16) bss->param.bss_config.ssid.ssid_len);
+        memcpy(pmpriv->adapter, tlv_ssid->ssid, bss->param.bss_config.ssid.ssid,
+               bss->param.bss_config.ssid.ssid_len);
+        cmd_size +=
+            sizeof(MrvlIEtypesHeader_t) + bss->param.bss_config.ssid.ssid_len;
+        tlv +=
+            sizeof(MrvlIEtypesHeader_t) + bss->param.bss_config.ssid.ssid_len;
+    }
+
+    if ((bss->param.bss_config.beacon_period >= MIN_BEACON_PERIOD) &&
+        (bss->param.bss_config.beacon_period <= MAX_BEACON_PERIOD)) {
+        tlv_beacon_period = (MrvlIEtypes_beacon_period_t *) tlv;
+        tlv_beacon_period->header.type =
+            wlan_cpu_to_le16(TLV_TYPE_UAP_BEACON_PERIOD);
+        tlv_beacon_period->header.len = wlan_cpu_to_le16(sizeof(t_u16));
+        tlv_beacon_period->beacon_period =
+            wlan_cpu_to_le16(bss->param.bss_config.beacon_period);
+        cmd_size += sizeof(MrvlIEtypes_beacon_period_t);
+        tlv += sizeof(MrvlIEtypes_beacon_period_t);
+    }
+
+    if ((bss->param.bss_config.dtim_period >= MIN_DTIM_PERIOD) &&
+        (bss->param.bss_config.dtim_period <= MAX_DTIM_PERIOD)) {
+        tlv_dtim_period = (MrvlIEtypes_dtim_period_t *) tlv;
+        tlv_dtim_period->header.type =
+            wlan_cpu_to_le16(TLV_TYPE_UAP_DTIM_PERIOD);
+        tlv_dtim_period->header.len = wlan_cpu_to_le16(sizeof(t_u8));
+        tlv_dtim_period->dtim_period = bss->param.bss_config.dtim_period;
+        cmd_size += sizeof(MrvlIEtypes_dtim_period_t);
+        tlv += sizeof(MrvlIEtypes_dtim_period_t);
+    }
+
+    if (bss->param.bss_config.rates[0]) {
+        tlv_rates = (MrvlIEtypes_RatesParamSet_t *) tlv;
+        tlv_rates->header.type = wlan_cpu_to_le16(TLV_TYPE_RATES);
+        for (i = 0; i < MAX_DATA_RATES && bss->param.bss_config.rates[i]; i++) {
+            tlv_rates->rates[i] = bss->param.bss_config.rates[i];
+        }
+        tlv_rates->header.len = wlan_cpu_to_le16(i);
+        cmd_size += sizeof(MrvlIEtypesHeader_t) + i;
+        tlv += sizeof(MrvlIEtypesHeader_t) + i;
+    }
+
+    if (bss->param.bss_config.tx_data_rate <= DATA_RATE_54M) {
+        tlv_txrate = (MrvlIEtypes_tx_rate_t *) tlv;
+        tlv_txrate->header.type = wlan_cpu_to_le16(TLV_TYPE_UAP_TX_DATA_RATE);
+        tlv_txrate->header.len = wlan_cpu_to_le16(sizeof(t_u16));
+        tlv_txrate->tx_data_rate =
+            wlan_cpu_to_le16(bss->param.bss_config.tx_data_rate);
+        cmd_size += sizeof(MrvlIEtypes_tx_rate_t);
+        tlv += sizeof(MrvlIEtypes_tx_rate_t);
+    }
+
+    if (bss->param.bss_config.mcbc_data_rate <= DATA_RATE_54M) {
+        tlv_mcbc_rate = (MrvlIEtypes_mcbc_rate_t *) tlv;
+        tlv_mcbc_rate->header.type =
+            wlan_cpu_to_le16(TLV_TYPE_UAP_MCBC_DATA_RATE);
+        tlv_mcbc_rate->header.len = wlan_cpu_to_le16(sizeof(t_u16));
+        tlv_mcbc_rate->mcbc_data_rate =
+            wlan_cpu_to_le16(bss->param.bss_config.mcbc_data_rate);
+        cmd_size += sizeof(MrvlIEtypes_mcbc_rate_t);
+        tlv += sizeof(MrvlIEtypes_mcbc_rate_t);
+    }
+
+    if (bss->param.bss_config.tx_power_level <= MAX_TX_POWER) {
+        tlv_tx_power = (MrvlIEtypes_tx_power_t *) tlv;
+        tlv_tx_power->header.type = wlan_cpu_to_le16(TLV_TYPE_UAP_TX_POWER);
+        tlv_tx_power->header.len = wlan_cpu_to_le16(sizeof(t_u8));
+        tlv_tx_power->tx_power = bss->param.bss_config.tx_power_level;
+        cmd_size += sizeof(MrvlIEtypes_tx_power_t);
+        tlv += sizeof(MrvlIEtypes_tx_power_t);
+    }
+
+    if (bss->param.bss_config.bcast_ssid_ctl <= MTRUE) {
+        tlv_bcast_ssid = (MrvlIEtypes_bcast_ssid_t *) tlv;
+        tlv_bcast_ssid->header.type =
+            wlan_cpu_to_le16(TLV_TYPE_UAP_BCAST_SSID_CTL);
+        tlv_bcast_ssid->header.len = wlan_cpu_to_le16(sizeof(t_u8));
+        tlv_bcast_ssid->bcast_ssid_ctl = bss->param.bss_config.bcast_ssid_ctl;
+        cmd_size += sizeof(MrvlIEtypes_bcast_ssid_t);
+        tlv += sizeof(MrvlIEtypes_bcast_ssid_t);
+    }
+
+    if ((bss->param.bss_config.tx_antenna == ANTENNA_MODE_A) ||
+        (bss->param.bss_config.tx_antenna == ANTENNA_MODE_B)) {
+        tlv_antenna = (MrvlIEtypes_antenna_mode_t *) tlv;
+        tlv_antenna->header.type = wlan_cpu_to_le16(TLV_TYPE_UAP_ANTENNA_CTL);
+        tlv_antenna->header.len = wlan_cpu_to_le16(sizeof(t_u8) + sizeof(t_u8));
+        tlv_antenna->which_antenna = TX_ANTENNA;
+        tlv_antenna->antenna_mode = bss->param.bss_config.tx_antenna;
+        cmd_size += sizeof(MrvlIEtypes_antenna_mode_t);
+        tlv += sizeof(MrvlIEtypes_antenna_mode_t);
+    }
+
+    if ((bss->param.bss_config.rx_antenna == ANTENNA_MODE_A) ||
+        (bss->param.bss_config.rx_antenna == ANTENNA_MODE_B)) {
+        tlv_antenna = (MrvlIEtypes_antenna_mode_t *) tlv;
+        tlv_antenna->header.type = wlan_cpu_to_le16(TLV_TYPE_UAP_ANTENNA_CTL);
+        tlv_antenna->header.len = wlan_cpu_to_le16(sizeof(t_u8) + sizeof(t_u8));
+        tlv_antenna->which_antenna = RX_ANTENNA;
+        tlv_antenna->antenna_mode = bss->param.bss_config.rx_antenna;
+        cmd_size += sizeof(MrvlIEtypes_antenna_mode_t);
+        tlv += sizeof(MrvlIEtypes_antenna_mode_t);
+    }
+
+    if (bss->param.bss_config.pkt_forward_ctl <= MTRUE) {
+        tlv_pkt_forward = (MrvlIEtypes_pkt_forward_t *) tlv;
+        tlv_pkt_forward->header.type =
+            wlan_cpu_to_le16(TLV_TYPE_UAP_PKT_FWD_CTL);
+        tlv_pkt_forward->header.len = wlan_cpu_to_le16(sizeof(t_u8));
+        tlv_pkt_forward->pkt_forward_ctl =
+            bss->param.bss_config.pkt_forward_ctl;
+        cmd_size += sizeof(MrvlIEtypes_pkt_forward_t);
+        tlv += sizeof(MrvlIEtypes_pkt_forward_t);
+    }
+
+    if (bss->param.bss_config.max_sta_count <= MAX_STA_COUNT) {
+        tlv_sta_count = (MrvlIEtypes_max_sta_count_t *) tlv;
+        tlv_sta_count->header.type = wlan_cpu_to_le16(TLV_TYPE_UAP_MAX_STA_CNT);
+        tlv_sta_count->header.len = wlan_cpu_to_le16(sizeof(t_u16));
+        tlv_sta_count->max_sta_count =
+            wlan_cpu_to_le16(bss->param.bss_config.max_sta_count);
+        cmd_size += sizeof(MrvlIEtypes_max_sta_count_t);
+        tlv += sizeof(MrvlIEtypes_max_sta_count_t);
+    }
+
+    if (((bss->param.bss_config.sta_ageout_timer >= MIN_STAGE_OUT_TIME) &&
+         (bss->param.bss_config.sta_ageout_timer <= MAX_STAGE_OUT_TIME)) ||
+        (bss->param.bss_config.sta_ageout_timer == 0)) {
+        tlv_sta_ageout = (MrvlIEtypes_sta_ageout_t *) tlv;
+        tlv_sta_ageout->header.type =
+            wlan_cpu_to_le16(TLV_TYPE_UAP_STA_AGEOUT_TIMER);
+        tlv_sta_ageout->header.len = wlan_cpu_to_le16(sizeof(t_u32));
+        tlv_sta_ageout->sta_ageout_timer =
+            wlan_cpu_to_le32(bss->param.bss_config.sta_ageout_timer);
+        cmd_size += sizeof(MrvlIEtypes_sta_ageout_t);
+        tlv += sizeof(MrvlIEtypes_sta_ageout_t);
+    }
+
+    if (((bss->param.bss_config.ps_sta_ageout_timer >= MIN_STAGE_OUT_TIME) &&
+         (bss->param.bss_config.ps_sta_ageout_timer <= MAX_STAGE_OUT_TIME)) ||
+        (bss->param.bss_config.ps_sta_ageout_timer == 0)) {
+        tlv_ps_sta_ageout = (MrvlIEtypes_ps_sta_ageout_t *) tlv;
+        tlv_ps_sta_ageout->header.type =
+            wlan_cpu_to_le16(TLV_TYPE_UAP_PS_STA_AGEOUT_TIMER);
+        tlv_ps_sta_ageout->header.len = wlan_cpu_to_le16(sizeof(t_u32));
+        tlv_ps_sta_ageout->ps_sta_ageout_timer =
+            wlan_cpu_to_le32(bss->param.bss_config.ps_sta_ageout_timer);
+        cmd_size += sizeof(MrvlIEtypes_ps_sta_ageout_t);
+        tlv += sizeof(MrvlIEtypes_ps_sta_ageout_t);
+    }
+    if (bss->param.bss_config.rts_threshold <= MAX_RTS_THRESHOLD) {
+        tlv_rts_threshold = (MrvlIEtypes_rts_threshold_t *) tlv;
+        tlv_rts_threshold->header.type =
+            wlan_cpu_to_le16(TLV_TYPE_UAP_RTS_THRESHOLD);
+        tlv_rts_threshold->header.len = wlan_cpu_to_le16(sizeof(t_u16));
+        tlv_rts_threshold->rts_threshold =
+            wlan_cpu_to_le16(bss->param.bss_config.rts_threshold);
+        cmd_size += sizeof(MrvlIEtypes_rts_threshold_t);
+        tlv += sizeof(MrvlIEtypes_rts_threshold_t);
+    }
+
+    if ((bss->param.bss_config.frag_threshold >= MIN_FRAG_THRESHOLD) &&
+        (bss->param.bss_config.frag_threshold <= MAX_FRAG_THRESHOLD)) {
+        tlv_frag_threshold = (MrvlIEtypes_frag_threshold_t *) tlv;
+        tlv_frag_threshold->header.type =
+            wlan_cpu_to_le16(TLV_TYPE_UAP_FRAG_THRESHOLD);
+        tlv_frag_threshold->header.len = wlan_cpu_to_le16(sizeof(t_u16));
+        tlv_frag_threshold->frag_threshold =
+            wlan_cpu_to_le16(bss->param.bss_config.frag_threshold);
+        cmd_size += sizeof(MrvlIEtypes_frag_threshold_t);
+        tlv += sizeof(MrvlIEtypes_frag_threshold_t);
+    }
+
+    if (bss->param.bss_config.retry_limit <= MAX_RETRY_LIMIT) {
+        tlv_retry_limit = (MrvlIEtypes_retry_limit_t *) tlv;
+        tlv_retry_limit->header.type =
+            wlan_cpu_to_le16(TLV_TYPE_UAP_RETRY_LIMIT);
+        tlv_retry_limit->header.len = wlan_cpu_to_le16(sizeof(t_u8));
+        tlv_retry_limit->retry_limit = (t_u8) bss->param.bss_config.retry_limit;
+        cmd_size += sizeof(MrvlIEtypes_retry_limit_t);
+        tlv += sizeof(MrvlIEtypes_retry_limit_t);
+    }
+
+    if (bss->param.bss_config.pairwise_update_timeout < (MAX_VALID_DWORD)) {
+        tlv_pairwise_timeout = (MrvlIEtypes_eapol_pwk_hsk_timeout_t *) tlv;
+        tlv_pairwise_timeout->header.type =
+            wlan_cpu_to_le16(TLV_TYPE_UAP_EAPOL_PWK_HSK_TIMEOUT);
+        tlv_pairwise_timeout->header.len = wlan_cpu_to_le16(sizeof(t_u32));
+        tlv_pairwise_timeout->pairwise_update_timeout =
+            wlan_cpu_to_le32(bss->param.bss_config.pairwise_update_timeout);
+        cmd_size += sizeof(MrvlIEtypes_eapol_pwk_hsk_timeout_t);
+        tlv += sizeof(MrvlIEtypes_eapol_pwk_hsk_timeout_t);
+    }
+
+    if (bss->param.bss_config.pwk_retries < (MAX_VALID_DWORD)) {
+        tlv_pairwise_retries = (MrvlIEtypes_eapol_pwk_hsk_retries_t *) tlv;
+        tlv_pairwise_retries->header.type =
+            wlan_cpu_to_le16(TLV_TYPE_UAP_EAPOL_PWK_HSK_RETRIES);
+        tlv_pairwise_retries->header.len = wlan_cpu_to_le16(sizeof(t_u32));
+        tlv_pairwise_retries->pwk_retries =
+            wlan_cpu_to_le32(bss->param.bss_config.pwk_retries);
+        cmd_size += sizeof(MrvlIEtypes_eapol_pwk_hsk_retries_t);
+        tlv += sizeof(MrvlIEtypes_eapol_pwk_hsk_retries_t);
+    }
+
+    if (bss->param.bss_config.groupwise_update_timeout < (MAX_VALID_DWORD)) {
+        tlv_groupwise_timeout = (MrvlIEtypes_eapol_gwk_hsk_timeout_t *) tlv;
+        tlv_groupwise_timeout->header.type =
+            wlan_cpu_to_le16(TLV_TYPE_UAP_EAPOL_GWK_HSK_TIMEOUT);
+        tlv_groupwise_timeout->header.len = wlan_cpu_to_le16(sizeof(t_u32));
+        tlv_groupwise_timeout->groupwise_update_timeout =
+            wlan_cpu_to_le32(bss->param.bss_config.groupwise_update_timeout);
+        cmd_size += sizeof(MrvlIEtypes_eapol_gwk_hsk_timeout_t);
+        tlv += sizeof(MrvlIEtypes_eapol_gwk_hsk_timeout_t);
+    }
+
+    if (bss->param.bss_config.gwk_retries < (MAX_VALID_DWORD)) {
+        tlv_groupwise_retries = (MrvlIEtypes_eapol_gwk_hsk_retries_t *) tlv;
+        tlv_groupwise_retries->header.type =
+            wlan_cpu_to_le16(TLV_TYPE_UAP_EAPOL_GWK_HSK_RETRIES);
+        tlv_groupwise_retries->header.len = wlan_cpu_to_le16(sizeof(t_u32));
+        tlv_groupwise_retries->gwk_retries =
+            wlan_cpu_to_le32(bss->param.bss_config.gwk_retries);
+        cmd_size += sizeof(MrvlIEtypes_eapol_gwk_hsk_retries_t);
+        tlv += sizeof(MrvlIEtypes_eapol_gwk_hsk_retries_t);
+    }
+
+    if ((bss->param.bss_config.filter.filter_mode <= MAC_FILTER_MODE_BLOCK_MAC)
+        && (bss->param.bss_config.filter.mac_count <= MAX_MAC_FILTER_NUM)) {
+        tlv_mac_filter = (MrvlIEtypes_mac_filter_t *) tlv;
+        tlv_mac_filter->header.type =
+            wlan_cpu_to_le16(TLV_TYPE_UAP_STA_MAC_ADDR_FILTER);
+        tlv_mac_filter->header.len =
+            wlan_cpu_to_le16(2 +
+                             MLAN_MAC_ADDR_LENGTH *
+                             bss->param.bss_config.filter.mac_count);
+        tlv_mac_filter->count = (t_u8) bss->param.bss_config.filter.mac_count;
+        tlv_mac_filter->filter_mode =
+            (t_u8) bss->param.bss_config.filter.filter_mode;
+        memcpy(pmpriv->adapter, tlv_mac_filter->mac_address,
+               (t_u8 *) bss->param.bss_config.filter.mac_list,
+               MLAN_MAC_ADDR_LENGTH * bss->param.bss_config.filter.mac_count);
+        cmd_size +=
+            sizeof(MrvlIEtypesHeader_t) + 2 +
+            MLAN_MAC_ADDR_LENGTH * bss->param.bss_config.filter.mac_count;
+        tlv +=
+            sizeof(MrvlIEtypesHeader_t) + 2 +
+            MLAN_MAC_ADDR_LENGTH * bss->param.bss_config.filter.mac_count;
+    }
+
+    if ((((bss->param.bss_config.band_cfg & BAND_CONFIG_ACS_MODE) ==
+          BAND_CONFIG_MANUAL) && (bss->param.bss_config.channel > 0) &&
+         (bss->param.bss_config.channel <= MLAN_MAX_CHANNEL)) ||
+        (bss->param.bss_config.band_cfg & BAND_CONFIG_ACS_MODE)) {
+        tlv_chan_band = (MrvlIEtypes_channel_band_t *) tlv;
+        tlv_chan_band->header.type =
+            wlan_cpu_to_le16(TLV_TYPE_UAP_CHAN_BAND_CONFIG);
+        tlv_chan_band->header.len =
+            wlan_cpu_to_le16(sizeof(t_u8) + sizeof(t_u8));
+        tlv_chan_band->band_config = bss->param.bss_config.band_cfg;
+        tlv_chan_band->channel = bss->param.bss_config.channel;
+        cmd_size += sizeof(MrvlIEtypes_channel_band_t);
+        tlv += sizeof(MrvlIEtypes_channel_band_t);
+    }
+
+    if ((bss->param.bss_config.num_of_chan) &&
+        (bss->param.bss_config.num_of_chan <= MLAN_MAX_CHANNEL)) {
+        tlv_chan_list = (MrvlIEtypes_ChanListParamSet_t *) tlv;
+        tlv_chan_list->header.type = wlan_cpu_to_le16(TLV_TYPE_CHANLIST);
+        tlv_chan_list->header.len =
+            wlan_cpu_to_le16((t_u16)
+                             (sizeof(ChanScanParamSet_t) *
+                              bss->param.bss_config.num_of_chan));
+        pscan_chan = tlv_chan_list->chan_scan_param;
+        for (i = 0; i < bss->param.bss_config.num_of_chan; i++) {
+            pscan_chan->chan_number =
+                bss->param.bss_config.chan_list[i].chan_number;
+            pscan_chan->radio_type =
+                bss->param.bss_config.chan_list[i].band_config_type;
+            pscan_chan++;
+        }
+        cmd_size += sizeof(tlv_chan_list->header) +
+            (sizeof(ChanScanParamSet_t) * bss->param.bss_config.num_of_chan);
+        tlv += sizeof(tlv_chan_list->header) +
+            (sizeof(ChanScanParamSet_t) * bss->param.bss_config.num_of_chan);
+    }
+
+    if ((bss->param.bss_config.auth_mode <= MLAN_AUTH_MODE_SHARED) ||
+        (bss->param.bss_config.auth_mode == MLAN_AUTH_MODE_AUTO)) {
+        tlv_auth_type = (MrvlIEtypes_auth_type_t *) tlv;
+        tlv_auth_type->header.type = wlan_cpu_to_le16(TLV_TYPE_AUTH_TYPE);
+        tlv_auth_type->header.len = wlan_cpu_to_le16(sizeof(t_u8));
+        tlv_auth_type->auth_type = (t_u8) bss->param.bss_config.auth_mode;
+        cmd_size += sizeof(MrvlIEtypes_auth_type_t);
+        tlv += sizeof(MrvlIEtypes_auth_type_t);
+    }
+
+    if (bss->param.bss_config.protocol) {
+        tlv_encrypt_protocol = (MrvlIEtypes_encrypt_protocol_t *) tlv;
+        tlv_encrypt_protocol->header.type =
+            wlan_cpu_to_le16(TLV_TYPE_UAP_ENCRYPT_PROTOCOL);
+        tlv_encrypt_protocol->header.len = wlan_cpu_to_le16(sizeof(t_u16));
+        tlv_encrypt_protocol->protocol =
+            wlan_cpu_to_le16(bss->param.bss_config.protocol);
+        cmd_size += sizeof(MrvlIEtypes_encrypt_protocol_t);
+        tlv += sizeof(MrvlIEtypes_encrypt_protocol_t);
+    }
+
+    if ((bss->param.bss_config.protocol & PROTOCOL_WPA) ||
+        (bss->param.bss_config.protocol & PROTOCOL_WPA2) ||
+        (bss->param.bss_config.protocol & PROTOCOL_EAP)) {
+        tlv_akmp = (MrvlIEtypes_akmp_t *) tlv;
+        tlv_akmp->header.type = wlan_cpu_to_le16(TLV_TYPE_UAP_AKMP);
+        tlv_akmp->key_mgmt = wlan_cpu_to_le16(bss->param.bss_config.key_mgmt);
+        tlv_akmp->header.len = sizeof(t_u16);
+        tlv_akmp->key_mgmt_operation =
+            wlan_cpu_to_le16(bss->param.bss_config.key_mgmt_operation);
+        tlv_akmp->header.len += sizeof(t_u16);
+        tlv_akmp->header.len = wlan_cpu_to_le16(tlv_akmp->header.len);
+        cmd_size += sizeof(MrvlIEtypes_akmp_t);
+        tlv += sizeof(MrvlIEtypes_akmp_t);
+
+        if (bss->param.bss_config.wpa_cfg.
+            pairwise_cipher_wpa & VALID_CIPHER_BITMAP) {
+            tlv_pwk_cipher = (MrvlIEtypes_pwk_cipher_t *) tlv;
+            tlv_pwk_cipher->header.type = wlan_cpu_to_le16(TLV_TYPE_PWK_CIPHER);
+            tlv_pwk_cipher->header.len =
+                wlan_cpu_to_le16(sizeof(t_u16) + sizeof(t_u8) + sizeof(t_u8));
+            tlv_pwk_cipher->protocol = wlan_cpu_to_le16(PROTOCOL_WPA);
+            tlv_pwk_cipher->pairwise_cipher =
+                bss->param.bss_config.wpa_cfg.pairwise_cipher_wpa;
+            cmd_size += sizeof(MrvlIEtypes_pwk_cipher_t);
+            tlv += sizeof(MrvlIEtypes_pwk_cipher_t);
+        }
+
+        if (bss->param.bss_config.wpa_cfg.
+            pairwise_cipher_wpa2 & VALID_CIPHER_BITMAP) {
+            tlv_pwk_cipher = (MrvlIEtypes_pwk_cipher_t *) tlv;
+            tlv_pwk_cipher->header.type = wlan_cpu_to_le16(TLV_TYPE_PWK_CIPHER);
+            tlv_pwk_cipher->header.len =
+                wlan_cpu_to_le16(sizeof(t_u16) + sizeof(t_u8) + sizeof(t_u8));
+            tlv_pwk_cipher->protocol = wlan_cpu_to_le16(PROTOCOL_WPA2);
+            tlv_pwk_cipher->pairwise_cipher =
+                bss->param.bss_config.wpa_cfg.pairwise_cipher_wpa2;
+            cmd_size += sizeof(MrvlIEtypes_pwk_cipher_t);
+            tlv += sizeof(MrvlIEtypes_pwk_cipher_t);
+        }
+
+        if (bss->param.bss_config.wpa_cfg.group_cipher & VALID_CIPHER_BITMAP) {
+            tlv_gwk_cipher = (MrvlIEtypes_gwk_cipher_t *) tlv;
+            tlv_gwk_cipher->header.type = wlan_cpu_to_le16(TLV_TYPE_GWK_CIPHER);
+            tlv_gwk_cipher->header.len =
+                wlan_cpu_to_le16(sizeof(t_u8) + sizeof(t_u8));
+            tlv_gwk_cipher->group_cipher =
+                bss->param.bss_config.wpa_cfg.group_cipher;
+            cmd_size += sizeof(MrvlIEtypes_gwk_cipher_t);
+            tlv += sizeof(MrvlIEtypes_gwk_cipher_t);
+        }
+
+        if (bss->param.bss_config.wpa_cfg.rsn_protection <= MTRUE) {
+            tlv_rsn_prot = (MrvlIEtypes_rsn_replay_prot_t *) tlv;
+            tlv_rsn_prot->header.type =
+                wlan_cpu_to_le16(TLV_TYPE_UAP_RSN_REPLAY_PROTECT);
+            tlv_rsn_prot->header.len = wlan_cpu_to_le16(sizeof(t_u8));
+            tlv_rsn_prot->rsn_replay_prot =
+                bss->param.bss_config.wpa_cfg.rsn_protection;
+            cmd_size += sizeof(MrvlIEtypes_rsn_replay_prot_t);
+            tlv += sizeof(MrvlIEtypes_rsn_replay_prot_t);
+        }
+
+        if (bss->param.bss_config.wpa_cfg.length) {
+            tlv_passphrase = (MrvlIEtypes_passphrase_t *) tlv;
+            tlv_passphrase->header.type =
+                wlan_cpu_to_le16(TLV_TYPE_UAP_WPA_PASSPHRASE);
+            tlv_passphrase->header.len =
+                (t_u16) wlan_cpu_to_le16(bss->param.bss_config.wpa_cfg.length);
+            memcpy(pmpriv->adapter, tlv_passphrase->passphrase,
+                   bss->param.bss_config.wpa_cfg.passphrase,
+                   bss->param.bss_config.wpa_cfg.length);
+            cmd_size +=
+                sizeof(MrvlIEtypesHeader_t) +
+                bss->param.bss_config.wpa_cfg.length;
+            tlv +=
+                sizeof(MrvlIEtypesHeader_t) +
+                bss->param.bss_config.wpa_cfg.length;
+        }
+
+        if (bss->param.bss_config.wpa_cfg.gk_rekey_time < MAX_GRP_TIMER) {
+            tlv_rekey_time = (MrvlIEtypes_group_rekey_time_t *) tlv;
+            tlv_rekey_time->header.type =
+                wlan_cpu_to_le16(TLV_TYPE_UAP_GRP_REKEY_TIME);
+            tlv_rekey_time->header.len = wlan_cpu_to_le16(sizeof(t_u32));
+            tlv_rekey_time->gk_rekey_time =
+                wlan_cpu_to_le32(bss->param.bss_config.wpa_cfg.gk_rekey_time);
+            cmd_size += sizeof(MrvlIEtypes_group_rekey_time_t);
+            tlv += sizeof(MrvlIEtypes_group_rekey_time_t);
+        }
+    } else {
+        if ((bss->param.bss_config.wep_cfg.key0.length) &&
+            ((bss->param.bss_config.wep_cfg.key0.length == 5) ||
+             (bss->param.bss_config.wep_cfg.key0.length == 10) ||
+             (bss->param.bss_config.wep_cfg.key0.length == 13) ||
+             (bss->param.bss_config.wep_cfg.key0.length == 26))) {
+            tlv_wep_key = (MrvlIEtypes_wep_key_t *) tlv;
+            tlv_wep_key->header.type = wlan_cpu_to_le16(TLV_TYPE_UAP_WEP_KEY);
+            tlv_wep_key->header.len =
+                wlan_cpu_to_le16(2 + bss->param.bss_config.wep_cfg.key0.length);
+            tlv_wep_key->key_index =
+                bss->param.bss_config.wep_cfg.key0.key_index;
+            tlv_wep_key->is_default =
+                bss->param.bss_config.wep_cfg.key0.is_default;
+            memcpy(pmpriv->adapter, tlv_wep_key->key,
+                   bss->param.bss_config.wep_cfg.key0.key,
+                   bss->param.bss_config.wep_cfg.key0.length);
+            cmd_size +=
+                sizeof(MrvlIEtypesHeader_t) + 2 +
+                bss->param.bss_config.wep_cfg.key0.length;
+            tlv +=
+                sizeof(MrvlIEtypesHeader_t) + 2 +
+                bss->param.bss_config.wep_cfg.key0.length;
+        }
+
+        if ((bss->param.bss_config.wep_cfg.key1.length) &&
+            ((bss->param.bss_config.wep_cfg.key1.length == 5) ||
+             (bss->param.bss_config.wep_cfg.key1.length == 10) ||
+             (bss->param.bss_config.wep_cfg.key1.length == 13) ||
+             (bss->param.bss_config.wep_cfg.key1.length == 26))) {
+            tlv_wep_key = (MrvlIEtypes_wep_key_t *) tlv;
+            tlv_wep_key->header.type = wlan_cpu_to_le16(TLV_TYPE_UAP_WEP_KEY);
+            tlv_wep_key->header.len =
+                wlan_cpu_to_le16(2 + bss->param.bss_config.wep_cfg.key1.length);
+            tlv_wep_key->key_index =
+                bss->param.bss_config.wep_cfg.key1.key_index;
+            tlv_wep_key->is_default =
+                bss->param.bss_config.wep_cfg.key1.is_default;
+            memcpy(pmpriv->adapter, tlv_wep_key->key,
+                   bss->param.bss_config.wep_cfg.key1.key,
+                   bss->param.bss_config.wep_cfg.key1.length);
+            cmd_size +=
+                sizeof(MrvlIEtypesHeader_t) + 2 +
+                bss->param.bss_config.wep_cfg.key1.length;
+            tlv +=
+                sizeof(MrvlIEtypesHeader_t) + 2 +
+                bss->param.bss_config.wep_cfg.key1.length;
+        }
+
+        if ((bss->param.bss_config.wep_cfg.key2.length) &&
+            ((bss->param.bss_config.wep_cfg.key2.length == 5) ||
+             (bss->param.bss_config.wep_cfg.key2.length == 10) ||
+             (bss->param.bss_config.wep_cfg.key2.length == 13) ||
+             (bss->param.bss_config.wep_cfg.key2.length == 26))) {
+            tlv_wep_key = (MrvlIEtypes_wep_key_t *) tlv;
+            tlv_wep_key->header.type = wlan_cpu_to_le16(TLV_TYPE_UAP_WEP_KEY);
+            tlv_wep_key->header.len =
+                wlan_cpu_to_le16(2 + bss->param.bss_config.wep_cfg.key2.length);
+            tlv_wep_key->key_index =
+                bss->param.bss_config.wep_cfg.key2.key_index;
+            tlv_wep_key->is_default =
+                bss->param.bss_config.wep_cfg.key2.is_default;
+            memcpy(pmpriv->adapter, tlv_wep_key->key,
+                   bss->param.bss_config.wep_cfg.key2.key,
+                   bss->param.bss_config.wep_cfg.key2.length);
+            cmd_size +=
+                sizeof(MrvlIEtypesHeader_t) + 2 +
+                bss->param.bss_config.wep_cfg.key2.length;
+            tlv +=
+                sizeof(MrvlIEtypesHeader_t) + 2 +
+                bss->param.bss_config.wep_cfg.key2.length;
+        }
+
+        if ((bss->param.bss_config.wep_cfg.key3.length) &&
+            ((bss->param.bss_config.wep_cfg.key3.length == 5) ||
+             (bss->param.bss_config.wep_cfg.key3.length == 10) ||
+             (bss->param.bss_config.wep_cfg.key3.length == 13) ||
+             (bss->param.bss_config.wep_cfg.key3.length == 26))) {
+            tlv_wep_key = (MrvlIEtypes_wep_key_t *) tlv;
+            tlv_wep_key->header.type = wlan_cpu_to_le16(TLV_TYPE_UAP_WEP_KEY);
+            tlv_wep_key->header.len =
+                wlan_cpu_to_le16(2 + bss->param.bss_config.wep_cfg.key3.length);
+            tlv_wep_key->key_index =
+                bss->param.bss_config.wep_cfg.key3.key_index;
+            tlv_wep_key->is_default =
+                bss->param.bss_config.wep_cfg.key3.is_default;
+            memcpy(pmpriv->adapter, tlv_wep_key->key,
+                   bss->param.bss_config.wep_cfg.key3.key,
+                   bss->param.bss_config.wep_cfg.key3.length);
+            cmd_size +=
+                sizeof(MrvlIEtypesHeader_t) + 2 +
+                bss->param.bss_config.wep_cfg.key3.length;
+            tlv +=
+                sizeof(MrvlIEtypesHeader_t) + 2 +
+                bss->param.bss_config.wep_cfg.key3.length;
+        }
+    }
+    if ((bss->param.bss_config.ht_cap_info)
+        ) {
+        tlv_htcap = (MrvlIETypes_HTCap_t *) tlv;
+        tlv_htcap->header.type = wlan_cpu_to_le16(HT_CAPABILITY);
+        tlv_htcap->header.len = wlan_cpu_to_le16(sizeof(HTCap_t));
+        tlv_htcap->ht_cap.ht_cap_info =
+            wlan_cpu_to_le16(bss->param.bss_config.ht_cap_info);
+        tlv_htcap->ht_cap.ampdu_param = bss->param.bss_config.ampdu_param;
+        memcpy(pmpriv->adapter, tlv_htcap->ht_cap.supported_mcs_set,
+               bss->param.bss_config.supported_mcs_set, 16);
+        tlv_htcap->ht_cap.ht_ext_cap =
+            wlan_cpu_to_le16(bss->param.bss_config.ht_ext_cap);
+        tlv_htcap->ht_cap.tx_bf_cap =
+            wlan_cpu_to_le32(bss->param.bss_config.tx_bf_cap);
+        tlv_htcap->ht_cap.asel = bss->param.bss_config.asel;
+        cmd_size += sizeof(MrvlIETypes_HTCap_t);
+        tlv += sizeof(MrvlIETypes_HTCap_t);
+    }
+    if (bss->param.bss_config.mgmt_ie_passthru_mask < (MAX_VALID_DWORD)) {
+        tlv_mgmt_ie_passthru = (MrvlIEtypes_mgmt_ie_passthru_t *) tlv;
+        tlv_mgmt_ie_passthru->header.type =
+            wlan_cpu_to_le16(TLV_TYPE_UAP_MGMT_IE_PASSTHRU_MASK);
+        tlv_mgmt_ie_passthru->header.len = wlan_cpu_to_le16(sizeof(t_u32));
+        /* keep copy in private data */
+        pmpriv->mgmt_frame_passthru_mask =
+            bss->param.bss_config.mgmt_ie_passthru_mask;
+        tlv_mgmt_ie_passthru->mgmt_ie_mask =
+            wlan_cpu_to_le32(bss->param.bss_config.mgmt_ie_passthru_mask);
+        cmd_size += sizeof(MrvlIEtypes_mgmt_ie_passthru_t);
+        tlv += sizeof(MrvlIEtypes_mgmt_ie_passthru_t);
+    }
+    if (((bss->param.bss_config.enable_2040coex == 0) ||
+         (bss->param.bss_config.enable_2040coex == 1))
+        ) {
+        tlv_2040_coex_enable = (MrvlIEtypes_2040_coex_enable_t *) tlv;
+        tlv_2040_coex_enable->header.type =
+            wlan_cpu_to_le16(TLV_TYPE_2040_BSS_COEX_CONTROL);
+        tlv_2040_coex_enable->header.len = wlan_cpu_to_le16(sizeof(t_u8));
+        tlv_2040_coex_enable->enable_2040coex =
+            bss->param.bss_config.enable_2040coex;
+        cmd_size += sizeof(MrvlIEtypes_2040_coex_enable_t);
+        tlv += sizeof(MrvlIEtypes_2040_coex_enable_t);
+    }
+    if (bss->param.bss_config.wmm_para.qos_info == 0x80 ||
+        bss->param.bss_config.wmm_para.qos_info == 0x00) {
+        tlv_wmm_parameter = (MrvlIEtypes_wmm_parameter_t *) tlv;
+        tlv_wmm_parameter->header.type =
+            wlan_cpu_to_le16(TLV_TYPE_VENDOR_SPECIFIC_IE);
+        tlv_wmm_parameter->header.len =
+            wlan_cpu_to_le16(sizeof(bss->param.bss_config.wmm_para));
+        memcpy(pmpriv->adapter, tlv_wmm_parameter->wmm_para.ouitype,
+               bss->param.bss_config.wmm_para.ouitype,
+               sizeof(tlv_wmm_parameter->wmm_para.ouitype));
+        tlv_wmm_parameter->wmm_para.ouisubtype =
+            bss->param.bss_config.wmm_para.ouisubtype;
+        tlv_wmm_parameter->wmm_para.version =
+            bss->param.bss_config.wmm_para.version;
+        tlv_wmm_parameter->wmm_para.qos_info =
+            bss->param.bss_config.wmm_para.qos_info;
+        for (ac = 0; ac < 4; ac++) {
+            tlv_wmm_parameter->wmm_para.ac_params[ac].aci_aifsn.aifsn =
+                bss->param.bss_config.wmm_para.ac_params[ac].aci_aifsn.aifsn;
+            tlv_wmm_parameter->wmm_para.ac_params[ac].ecw.ecw_max =
+                bss->param.bss_config.wmm_para.ac_params[ac].ecw.ecw_max;
+            tlv_wmm_parameter->wmm_para.ac_params[ac].ecw.ecw_min =
+                bss->param.bss_config.wmm_para.ac_params[ac].ecw.ecw_min;
+            tlv_wmm_parameter->wmm_para.ac_params[ac].tx_op_limit =
+                wlan_cpu_to_le16(bss->param.bss_config.wmm_para.ac_params[ac].
+                                 tx_op_limit);
+        }
+        cmd_size += sizeof(MrvlIEtypes_wmm_parameter_t);
+        tlv += sizeof(MrvlIEtypes_wmm_parameter_t);
+    }
+
+    cmd->size = (t_u16) wlan_cpu_to_le16(cmd_size);
+    PRINTM(MCMND, "AP config: cmd_size=%d\n", cmd_size);
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function prepares command of sys_config
+ *  
+ *  @param pmpriv		A pointer to mlan_private structure
+ *  @param cmd	   		A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action   the action: GET or SET
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure 
+ *  @return         MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_uap_cmd_sys_configure(pmlan_private pmpriv,
+                           IN HostCmd_DS_COMMAND * cmd,
+                           IN t_u16 cmd_action,
+                           IN pmlan_ioctl_req pioctl_buf, IN t_void * pdata_buf)
+{
+    mlan_ds_bss *bss = MNULL;
+    HostCmd_DS_SYS_CONFIG *sys_config =
+        (HostCmd_DS_SYS_CONFIG *) & cmd->params.sys_config;
+    MrvlIEtypes_MacAddr_t *mac_tlv = MNULL;
+    mlan_ds_misc_cfg *misc = MNULL;
+    MrvlIEtypesHeader_t *ie_header =
+        (MrvlIEtypesHeader_t *) sys_config->tlv_buffer;
+    t_u8 *ie = (t_u8 *) sys_config->tlv_buffer + sizeof(MrvlIEtypesHeader_t);
+    t_u16 req_len = 0, travel_len = 0;
+    custom_ie *cptr = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    cmd->command = wlan_cpu_to_le16(HOST_CMD_APCMD_SYS_CONFIGURE);
+    sys_config->action = wlan_cpu_to_le16(cmd_action);
+    cmd->size = wlan_cpu_to_le16(sizeof(HostCmd_DS_SYS_CONFIG) - 1 + S_DS_GEN);
+    if (pioctl_buf == MNULL) {
+        {
+            mac_tlv = (MrvlIEtypes_MacAddr_t *) sys_config->tlv_buffer;
+            cmd->size =
+                wlan_cpu_to_le16(sizeof(HostCmd_DS_SYS_CONFIG) - 1 + S_DS_GEN +
+                                 sizeof(MrvlIEtypes_MacAddr_t));
+            mac_tlv->header.type = wlan_cpu_to_le16(TLV_TYPE_UAP_MAC_ADDRESS);
+            mac_tlv->header.len = wlan_cpu_to_le16(MLAN_MAC_ADDR_LENGTH);
+            ret = MLAN_STATUS_SUCCESS;
+            goto done;
+        }
+    }
+    if (pioctl_buf->req_id == MLAN_IOCTL_BSS) {
+        bss = (mlan_ds_bss *) pioctl_buf->pbuf;
+        if (bss->sub_command == MLAN_OID_BSS_MAC_ADDR) {
+            mac_tlv = (MrvlIEtypes_MacAddr_t *) sys_config->tlv_buffer;
+            cmd->size =
+                wlan_cpu_to_le16(sizeof(HostCmd_DS_SYS_CONFIG) - 1 + S_DS_GEN +
+                                 sizeof(MrvlIEtypes_MacAddr_t));
+            mac_tlv->header.type = wlan_cpu_to_le16(TLV_TYPE_UAP_MAC_ADDRESS);
+            mac_tlv->header.len = wlan_cpu_to_le16(MLAN_MAC_ADDR_LENGTH);
+            if (cmd_action == HostCmd_ACT_GEN_SET)
+                memcpy(pmpriv->adapter, mac_tlv->mac, &bss->param.mac_addr,
+                       MLAN_MAC_ADDR_LENGTH);
+        } else if ((bss->sub_command == MLAN_OID_UAP_BSS_CONFIG) &&
+                   (cmd_action == HostCmd_ACT_GEN_SET)) {
+            ret = wlan_uap_cmd_ap_config(pmpriv, cmd, cmd_action, pioctl_buf);
+            goto done;
+        }
+    } else if (pioctl_buf->req_id == MLAN_IOCTL_MISC_CFG) {
+        misc = (mlan_ds_misc_cfg *) pioctl_buf->pbuf;
+        if ((misc->sub_command == MLAN_OID_MISC_GEN_IE) &&
+            (misc->param.gen_ie.type == MLAN_IE_TYPE_GEN_IE)
+            ) {
+            cmd->size =
+                wlan_cpu_to_le16(sizeof(HostCmd_DS_SYS_CONFIG) - 1 + S_DS_GEN +
+                                 sizeof(MrvlIEtypesHeader_t) +
+                                 misc->param.gen_ie.len);
+            ie_header->type = wlan_cpu_to_le16(TLV_TYPE_WAPI_IE);
+            ie_header->len = wlan_cpu_to_le16(misc->param.gen_ie.len);
+            if (cmd_action == HostCmd_ACT_GEN_SET)
+                memcpy(pmpriv->adapter, ie, misc->param.gen_ie.ie_data,
+                       misc->param.gen_ie.len);
+        }
+        if ((misc->sub_command == MLAN_OID_MISC_CUSTOM_IE) &&
+            (misc->param.cust_ie.type == TLV_TYPE_MGMT_IE)) {
+            cmd->size =
+                wlan_cpu_to_le16(sizeof(HostCmd_DS_SYS_CONFIG) - 1 + S_DS_GEN +
+                                 sizeof(MrvlIEtypesHeader_t) +
+                                 misc->param.cust_ie.len);
+            ie_header->type = wlan_cpu_to_le16(TLV_TYPE_MGMT_IE);
+            ie_header->len = wlan_cpu_to_le16(misc->param.cust_ie.len);
+
+            if (ie && misc->param.cust_ie.ie_data_list) {
+                req_len = misc->param.cust_ie.len;
+                travel_len = 0;
+                /* conversion for index, mask, len */
+                if (req_len == sizeof(t_u16))
+                    misc->param.cust_ie.ie_data_list[0].ie_index =
+                        wlan_cpu_to_le16(misc->param.cust_ie.ie_data_list[0].
+                                         ie_index);
+                while (req_len > sizeof(t_u16)) {
+                    cptr =
+                        (custom_ie
+                         *) (((t_u8 *) & misc->param.cust_ie.ie_data_list) +
+                             travel_len);
+                    travel_len +=
+                        cptr->ie_length + sizeof(custom_ie) - MAX_IE_SIZE;
+                    req_len -=
+                        cptr->ie_length + sizeof(custom_ie) - MAX_IE_SIZE;
+                    cptr->ie_index = wlan_cpu_to_le16(cptr->ie_index);
+                    cptr->mgmt_subtype_mask =
+                        wlan_cpu_to_le16(cptr->mgmt_subtype_mask);
+                    cptr->ie_length = wlan_cpu_to_le16(cptr->ie_length);
+                }
+                if (misc->param.cust_ie.len)
+                    memcpy(pmpriv->adapter, ie,
+                           misc->param.cust_ie.ie_data_list,
+                           misc->param.cust_ie.len);
+            }
+        }
+    }
+  done:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief This function handles command resp for get uap settings
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure 
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_uap_ret_cmd_ap_config(IN pmlan_private pmpriv,
+                           IN HostCmd_DS_COMMAND * resp,
+                           IN mlan_ioctl_req * pioctl_buf)
+{
+    HostCmd_DS_SYS_CONFIG *sys_config =
+        (HostCmd_DS_SYS_CONFIG *) & resp->params.sys_config;
+    mlan_ds_bss *bss = MNULL;
+    MrvlIEtypesHeader_t *tlv = MNULL;
+    t_u16 tlv_buf_left = 0;
+    t_u16 tlv_type = 0;
+    t_u16 tlv_len = 0;
+    MrvlIEtypes_MacAddr_t *tlv_mac = MNULL;
+    MrvlIEtypes_SsIdParamSet_t *tlv_ssid = MNULL;
+    MrvlIEtypes_beacon_period_t *tlv_beacon_period = MNULL;
+    MrvlIEtypes_dtim_period_t *tlv_dtim_period = MNULL;
+    MrvlIEtypes_RatesParamSet_t *tlv_rates = MNULL;
+    MrvlIEtypes_tx_rate_t *tlv_txrate = MNULL;
+    MrvlIEtypes_mcbc_rate_t *tlv_mcbc_rate = MNULL;
+    MrvlIEtypes_tx_power_t *tlv_tx_power = MNULL;
+    MrvlIEtypes_bcast_ssid_t *tlv_bcast_ssid = MNULL;
+    MrvlIEtypes_antenna_mode_t *tlv_antenna = MNULL;
+    MrvlIEtypes_pkt_forward_t *tlv_pkt_forward = MNULL;
+    MrvlIEtypes_max_sta_count_t *tlv_sta_count = MNULL;
+    MrvlIEtypes_sta_ageout_t *tlv_sta_ageout = MNULL;
+    MrvlIEtypes_ps_sta_ageout_t *tlv_ps_sta_ageout = MNULL;
+    MrvlIEtypes_rts_threshold_t *tlv_rts_threshold = MNULL;
+    MrvlIEtypes_frag_threshold_t *tlv_frag_threshold = MNULL;
+    MrvlIEtypes_retry_limit_t *tlv_retry_limit = MNULL;
+    MrvlIEtypes_eapol_pwk_hsk_timeout_t *tlv_pairwise_timeout = MNULL;
+    MrvlIEtypes_eapol_pwk_hsk_retries_t *tlv_pairwise_retries = MNULL;
+    MrvlIEtypes_eapol_gwk_hsk_timeout_t *tlv_groupwise_timeout = MNULL;
+    MrvlIEtypes_eapol_gwk_hsk_retries_t *tlv_groupwise_retries = MNULL;
+    MrvlIEtypes_mgmt_ie_passthru_t *tlv_mgmt_ie_passthru = MNULL;
+    MrvlIEtypes_2040_coex_enable_t *tlv_2040_coex_enable = MNULL;
+    MrvlIEtypes_mac_filter_t *tlv_mac_filter = MNULL;
+    MrvlIEtypes_channel_band_t *tlv_chan_band = MNULL;
+    MrvlIEtypes_ChanListParamSet_t *tlv_chan_list = MNULL;
+    ChanScanParamSet_t *pscan_chan = MNULL;
+    MrvlIEtypes_auth_type_t *tlv_auth_type = MNULL;
+    MrvlIEtypes_encrypt_protocol_t *tlv_encrypt_protocol = MNULL;
+    MrvlIEtypes_akmp_t *tlv_akmp = MNULL;
+    MrvlIEtypes_pwk_cipher_t *tlv_pwk_cipher = MNULL;
+    MrvlIEtypes_gwk_cipher_t *tlv_gwk_cipher = MNULL;
+    MrvlIEtypes_rsn_replay_prot_t *tlv_rsn_prot = MNULL;
+    MrvlIEtypes_passphrase_t *tlv_passphrase = MNULL;
+    MrvlIEtypes_group_rekey_time_t *tlv_rekey_time = MNULL;
+    MrvlIEtypes_wep_key_t *tlv_wep_key = MNULL;
+    MrvlIEtypes_preamble_t *tlv_preamble = MNULL;
+    MrvlIEtypes_bss_status_t *tlv_bss_status = MNULL;
+    MrvlIETypes_HTCap_t *tlv_htcap = MNULL;
+    MrvlIEtypes_wmm_parameter_t *tlv_wmm_parameter = MNULL;
+
+    wep_key *pkey = MNULL;
+    t_u16 i;
+    t_u16 ac;
+
+    ENTER();
+
+    bss = (mlan_ds_bss *) pioctl_buf->pbuf;
+    tlv = (MrvlIEtypesHeader_t *) sys_config->tlv_buffer;
+    tlv_buf_left = resp->size - (sizeof(HostCmd_DS_SYS_CONFIG) - 1 + S_DS_GEN);
+
+    while (tlv_buf_left >= sizeof(MrvlIEtypesHeader_t)) {
+
+        tlv_type = wlan_le16_to_cpu(tlv->type);
+        tlv_len = wlan_le16_to_cpu(tlv->len);
+
+        if (tlv_buf_left < (tlv_len + sizeof(MrvlIEtypesHeader_t))) {
+            PRINTM(MERROR,
+                   "Error processing uAP sys config TLVs, bytes left < TLV length\n");
+            break;
+        }
+
+        switch (tlv_type) {
+        case TLV_TYPE_UAP_MAC_ADDRESS:
+            tlv_mac = (MrvlIEtypes_MacAddr_t *) tlv;
+            memcpy(pmpriv->adapter, &bss->param.bss_config.mac_addr,
+                   tlv_mac->mac, MLAN_MAC_ADDR_LENGTH);
+            break;
+        case TLV_TYPE_SSID:
+            tlv_ssid = (MrvlIEtypes_SsIdParamSet_t *) tlv;
+            bss->param.bss_config.ssid.ssid_len = tlv_len;
+            memcpy(pmpriv->adapter, bss->param.bss_config.ssid.ssid,
+                   tlv_ssid->ssid, tlv_len);
+            break;
+        case TLV_TYPE_UAP_BEACON_PERIOD:
+            tlv_beacon_period = (MrvlIEtypes_beacon_period_t *) tlv;
+            bss->param.bss_config.beacon_period =
+                wlan_le16_to_cpu(tlv_beacon_period->beacon_period);
+            break;
+        case TLV_TYPE_UAP_DTIM_PERIOD:
+            tlv_dtim_period = (MrvlIEtypes_dtim_period_t *) tlv;
+            bss->param.bss_config.dtim_period = tlv_dtim_period->dtim_period;
+            break;
+        case TLV_TYPE_RATES:
+            tlv_rates = (MrvlIEtypes_RatesParamSet_t *) tlv;
+            memcpy(pmpriv->adapter, bss->param.bss_config.rates,
+                   tlv_rates->rates, tlv_len);
+            break;
+        case TLV_TYPE_UAP_TX_DATA_RATE:
+            tlv_txrate = (MrvlIEtypes_tx_rate_t *) tlv;
+            bss->param.bss_config.tx_data_rate =
+                wlan_le16_to_cpu(tlv_txrate->tx_data_rate);
+            break;
+        case TLV_TYPE_UAP_MCBC_DATA_RATE:
+            tlv_mcbc_rate = (MrvlIEtypes_mcbc_rate_t *) tlv;
+            bss->param.bss_config.mcbc_data_rate =
+                wlan_le16_to_cpu(tlv_mcbc_rate->mcbc_data_rate);
+            break;
+        case TLV_TYPE_UAP_TX_POWER:
+            tlv_tx_power = (MrvlIEtypes_tx_power_t *) tlv;
+            bss->param.bss_config.tx_power_level = tlv_tx_power->tx_power;
+            break;
+        case TLV_TYPE_UAP_BCAST_SSID_CTL:
+            tlv_bcast_ssid = (MrvlIEtypes_bcast_ssid_t *) tlv;
+            bss->param.bss_config.bcast_ssid_ctl =
+                tlv_bcast_ssid->bcast_ssid_ctl;
+            break;
+        case TLV_TYPE_UAP_ANTENNA_CTL:
+            tlv_antenna = (MrvlIEtypes_antenna_mode_t *) tlv;
+            if (tlv_antenna->which_antenna == TX_ANTENNA)
+                bss->param.bss_config.tx_antenna = tlv_antenna->antenna_mode;
+            else if (tlv_antenna->which_antenna == RX_ANTENNA)
+                bss->param.bss_config.rx_antenna = tlv_antenna->antenna_mode;
+            break;
+        case TLV_TYPE_UAP_PKT_FWD_CTL:
+            tlv_pkt_forward = (MrvlIEtypes_pkt_forward_t *) tlv;
+            bss->param.bss_config.pkt_forward_ctl =
+                tlv_pkt_forward->pkt_forward_ctl;
+            break;
+        case TLV_TYPE_UAP_MAX_STA_CNT:
+            tlv_sta_count = (MrvlIEtypes_max_sta_count_t *) tlv;
+            bss->param.bss_config.max_sta_count =
+                wlan_le16_to_cpu(tlv_sta_count->max_sta_count);
+            break;
+        case TLV_TYPE_UAP_STA_AGEOUT_TIMER:
+            tlv_sta_ageout = (MrvlIEtypes_sta_ageout_t *) tlv;
+            bss->param.bss_config.sta_ageout_timer =
+                wlan_le32_to_cpu(tlv_sta_ageout->sta_ageout_timer);
+            break;
+        case TLV_TYPE_UAP_PS_STA_AGEOUT_TIMER:
+            tlv_ps_sta_ageout = (MrvlIEtypes_ps_sta_ageout_t *) tlv;
+            bss->param.bss_config.ps_sta_ageout_timer =
+                wlan_le32_to_cpu(tlv_ps_sta_ageout->ps_sta_ageout_timer);
+            break;
+        case TLV_TYPE_UAP_RTS_THRESHOLD:
+            tlv_rts_threshold = (MrvlIEtypes_rts_threshold_t *) tlv;
+            bss->param.bss_config.rts_threshold =
+                wlan_le16_to_cpu(tlv_rts_threshold->rts_threshold);
+            break;
+        case TLV_TYPE_UAP_FRAG_THRESHOLD:
+            tlv_frag_threshold = (MrvlIEtypes_frag_threshold_t *) tlv;
+            bss->param.bss_config.frag_threshold =
+                wlan_le16_to_cpu(tlv_frag_threshold->frag_threshold);
+            break;
+        case TLV_TYPE_UAP_RETRY_LIMIT:
+            tlv_retry_limit = (MrvlIEtypes_retry_limit_t *) tlv;
+            bss->param.bss_config.retry_limit = tlv_retry_limit->retry_limit;
+            break;
+        case TLV_TYPE_UAP_EAPOL_PWK_HSK_TIMEOUT:
+            tlv_pairwise_timeout = (MrvlIEtypes_eapol_pwk_hsk_timeout_t *) tlv;
+            bss->param.bss_config.pairwise_update_timeout =
+                wlan_le32_to_cpu(tlv_pairwise_timeout->pairwise_update_timeout);
+            break;
+        case TLV_TYPE_UAP_EAPOL_PWK_HSK_RETRIES:
+            tlv_pairwise_retries = (MrvlIEtypes_eapol_pwk_hsk_retries_t *) tlv;
+            bss->param.bss_config.pwk_retries =
+                wlan_le32_to_cpu(tlv_pairwise_retries->pwk_retries);
+            break;
+        case TLV_TYPE_UAP_EAPOL_GWK_HSK_TIMEOUT:
+            tlv_groupwise_timeout = (MrvlIEtypes_eapol_gwk_hsk_timeout_t *) tlv;
+            bss->param.bss_config.groupwise_update_timeout =
+                wlan_le32_to_cpu(tlv_groupwise_timeout->
+                                 groupwise_update_timeout);
+            break;
+        case TLV_TYPE_UAP_EAPOL_GWK_HSK_RETRIES:
+            tlv_groupwise_retries = (MrvlIEtypes_eapol_gwk_hsk_retries_t *) tlv;
+            bss->param.bss_config.gwk_retries =
+                wlan_le32_to_cpu(tlv_groupwise_retries->gwk_retries);
+            break;
+        case TLV_TYPE_UAP_MGMT_IE_PASSTHRU_MASK:
+            tlv_mgmt_ie_passthru = (MrvlIEtypes_mgmt_ie_passthru_t *) tlv;
+            bss->param.bss_config.mgmt_ie_passthru_mask =
+                wlan_le32_to_cpu(tlv_mgmt_ie_passthru->mgmt_ie_mask);
+            break;
+        case TLV_TYPE_2040_BSS_COEX_CONTROL:
+            tlv_2040_coex_enable = (MrvlIEtypes_2040_coex_enable_t *) tlv;
+            bss->param.bss_config.enable_2040coex =
+                tlv_2040_coex_enable->enable_2040coex;
+            break;
+        case TLV_TYPE_UAP_STA_MAC_ADDR_FILTER:
+            tlv_mac_filter = (MrvlIEtypes_mac_filter_t *) tlv;
+            bss->param.bss_config.filter.mac_count = tlv_mac_filter->count;
+            bss->param.bss_config.filter.filter_mode =
+                tlv_mac_filter->filter_mode;
+            memcpy(pmpriv->adapter,
+                   (t_u8 *) bss->param.bss_config.filter.mac_list,
+                   tlv_mac_filter->mac_address,
+                   MLAN_MAC_ADDR_LENGTH *
+                   bss->param.bss_config.filter.mac_count);
+            break;
+        case TLV_TYPE_UAP_CHAN_BAND_CONFIG:
+            tlv_chan_band = (MrvlIEtypes_channel_band_t *) tlv;
+            bss->param.bss_config.band_cfg = tlv_chan_band->band_config;
+            bss->param.bss_config.channel = tlv_chan_band->channel;
+            break;
+        case TLV_TYPE_CHANLIST:
+            tlv_chan_list = (MrvlIEtypes_ChanListParamSet_t *) tlv;
+            bss->param.bss_config.num_of_chan =
+                tlv_len / sizeof(ChanScanParamSet_t);
+            pscan_chan = tlv_chan_list->chan_scan_param;
+            for (i = 0; i < bss->param.bss_config.num_of_chan; i++) {
+                bss->param.bss_config.chan_list[i].chan_number =
+                    pscan_chan->chan_number;
+                bss->param.bss_config.chan_list[i].band_config_type =
+                    pscan_chan->radio_type;
+                pscan_chan++;
+            }
+            break;
+        case TLV_TYPE_AUTH_TYPE:
+            tlv_auth_type = (MrvlIEtypes_auth_type_t *) tlv;
+            bss->param.bss_config.auth_mode = tlv_auth_type->auth_type;
+            break;
+        case TLV_TYPE_UAP_ENCRYPT_PROTOCOL:
+            tlv_encrypt_protocol = (MrvlIEtypes_encrypt_protocol_t *) tlv;
+            bss->param.bss_config.protocol =
+                wlan_le16_to_cpu(tlv_encrypt_protocol->protocol);
+            break;
+        case TLV_TYPE_UAP_AKMP:
+            tlv_akmp = (MrvlIEtypes_akmp_t *) tlv;
+            bss->param.bss_config.key_mgmt =
+                wlan_le16_to_cpu(tlv_akmp->key_mgmt);
+            if (tlv_len > sizeof(t_u16))
+                bss->param.bss_config.key_mgmt_operation =
+                    wlan_le16_to_cpu(tlv_akmp->key_mgmt_operation);
+            break;
+        case TLV_TYPE_PWK_CIPHER:
+            tlv_pwk_cipher = (MrvlIEtypes_pwk_cipher_t *) tlv;
+            if (wlan_le16_to_cpu(tlv_pwk_cipher->protocol) & PROTOCOL_WPA)
+                bss->param.bss_config.wpa_cfg.pairwise_cipher_wpa =
+                    tlv_pwk_cipher->pairwise_cipher;
+            if (wlan_le16_to_cpu(tlv_pwk_cipher->protocol) & PROTOCOL_WPA2)
+                bss->param.bss_config.wpa_cfg.pairwise_cipher_wpa2 =
+                    tlv_pwk_cipher->pairwise_cipher;
+            break;
+        case TLV_TYPE_GWK_CIPHER:
+            tlv_gwk_cipher = (MrvlIEtypes_gwk_cipher_t *) tlv;
+            bss->param.bss_config.wpa_cfg.group_cipher =
+                tlv_gwk_cipher->group_cipher;
+            break;
+        case TLV_TYPE_UAP_RSN_REPLAY_PROTECT:
+            tlv_rsn_prot = (MrvlIEtypes_rsn_replay_prot_t *) tlv;
+            bss->param.bss_config.wpa_cfg.rsn_protection =
+                tlv_rsn_prot->rsn_replay_prot;
+            break;
+        case TLV_TYPE_UAP_WPA_PASSPHRASE:
+            tlv_passphrase = (MrvlIEtypes_passphrase_t *) tlv;
+            bss->param.bss_config.wpa_cfg.length = tlv_len;
+            memcpy(pmpriv->adapter, bss->param.bss_config.wpa_cfg.passphrase,
+                   tlv_passphrase->passphrase,
+                   bss->param.bss_config.wpa_cfg.length);
+            break;
+        case TLV_TYPE_UAP_GRP_REKEY_TIME:
+            tlv_rekey_time = (MrvlIEtypes_group_rekey_time_t *) tlv;
+            bss->param.bss_config.wpa_cfg.gk_rekey_time =
+                wlan_le32_to_cpu(tlv_rekey_time->gk_rekey_time);
+            break;
+        case TLV_TYPE_UAP_WEP_KEY:
+            tlv_wep_key = (MrvlIEtypes_wep_key_t *) tlv;
+            pkey = MNULL;
+            if (tlv_wep_key->key_index == 0)
+                pkey = &bss->param.bss_config.wep_cfg.key0;
+            else if (tlv_wep_key->key_index == 1)
+                pkey = &bss->param.bss_config.wep_cfg.key1;
+            else if (tlv_wep_key->key_index == 2)
+                pkey = &bss->param.bss_config.wep_cfg.key2;
+            else if (tlv_wep_key->key_index == 3)
+                pkey = &bss->param.bss_config.wep_cfg.key3;
+            if (pkey) {
+                pkey->key_index = tlv_wep_key->key_index;
+                pkey->is_default = tlv_wep_key->is_default;
+                pkey->length = tlv_len - 2;
+                memcpy(pmpriv->adapter, pkey->key, tlv_wep_key->key,
+                       pkey->length);
+            }
+            break;
+        case TLV_TYPE_UAP_PREAMBLE_CTL:
+            tlv_preamble = (MrvlIEtypes_preamble_t *) tlv;
+            bss->param.bss_config.preamble_type = tlv_preamble->preamble_type;
+            break;
+        case TLV_TYPE_BSS_STATUS:
+            tlv_bss_status = (MrvlIEtypes_bss_status_t *) tlv;
+            bss->param.bss_config.bss_status =
+                wlan_le16_to_cpu(tlv_bss_status->bss_status);
+            break;
+        case HT_CAPABILITY:
+            tlv_htcap = (MrvlIETypes_HTCap_t *) tlv;
+            bss->param.bss_config.ht_cap_info =
+                wlan_le16_to_cpu(tlv_htcap->ht_cap.ht_cap_info);
+            bss->param.bss_config.ampdu_param = tlv_htcap->ht_cap.ampdu_param;
+            memcpy(pmpriv->adapter, bss->param.bss_config.supported_mcs_set,
+                   tlv_htcap->ht_cap.supported_mcs_set, 16);
+            bss->param.bss_config.ht_ext_cap =
+                wlan_le16_to_cpu(tlv_htcap->ht_cap.ht_ext_cap);
+            bss->param.bss_config.tx_bf_cap =
+                wlan_le32_to_cpu(tlv_htcap->ht_cap.tx_bf_cap);
+            bss->param.bss_config.asel = tlv_htcap->ht_cap.asel;
+            break;
+        case TLV_TYPE_VENDOR_SPECIFIC_IE:
+            tlv_wmm_parameter = (MrvlIEtypes_wmm_parameter_t *) tlv;
+            bss->param.bss_config.wmm_para.qos_info =
+                tlv_wmm_parameter->wmm_para.qos_info;
+            for (ac = 0; ac < 4; ac++) {
+                bss->param.bss_config.wmm_para.ac_params[ac].aci_aifsn.aifsn =
+                    tlv_wmm_parameter->wmm_para.ac_params[ac].aci_aifsn.aifsn;
+                bss->param.bss_config.wmm_para.ac_params[ac].ecw.ecw_max =
+                    tlv_wmm_parameter->wmm_para.ac_params[ac].ecw.ecw_max;
+                bss->param.bss_config.wmm_para.ac_params[ac].ecw.ecw_min =
+                    tlv_wmm_parameter->wmm_para.ac_params[ac].ecw.ecw_min;
+                bss->param.bss_config.wmm_para.ac_params[ac].tx_op_limit =
+                    wlan_le16_to_cpu(tlv_wmm_parameter->wmm_para.ac_params[ac].
+                                     tx_op_limit);
+            }
+            break;
+        }
+
+        tlv_buf_left -= tlv_len + sizeof(MrvlIEtypesHeader_t);
+        tlv =
+            (MrvlIEtypesHeader_t *) ((t_u8 *) tlv + tlv_len +
+                                     sizeof(MrvlIEtypesHeader_t));
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function handles the command response of sys_config
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure 
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_uap_ret_sys_config(IN pmlan_private pmpriv,
+                        IN HostCmd_DS_COMMAND * resp,
+                        IN mlan_ioctl_req * pioctl_buf)
+{
+    t_u16 resp_len = 0, travel_len = 0;
+    custom_ie *cptr;
+    HostCmd_DS_SYS_CONFIG *sys_config =
+        (HostCmd_DS_SYS_CONFIG *) & resp->params.sys_config;
+    mlan_ds_bss *bss = MNULL;
+    mlan_ds_misc_cfg *misc = MNULL;
+    MrvlIEtypes_MacAddr_t *tlv =
+        (MrvlIEtypes_MacAddr_t *) sys_config->tlv_buffer;
+    mlan_ds_misc_custom_ie *cust_ie = MNULL;
+
+    ENTER();
+    if (pioctl_buf) {
+        if (pioctl_buf->req_id == MLAN_IOCTL_BSS) {
+            bss = (mlan_ds_bss *) pioctl_buf->pbuf;
+            if (bss->sub_command == MLAN_OID_BSS_MAC_ADDR) {
+                if (TLV_TYPE_UAP_MAC_ADDRESS ==
+                    wlan_le16_to_cpu(tlv->header.type)) {
+                    memcpy(pmpriv->adapter, &bss->param.mac_addr, tlv->mac,
+                           MLAN_MAC_ADDR_LENGTH);
+                }
+            } else if ((bss->sub_command == MLAN_OID_UAP_BSS_CONFIG) &&
+                       (pioctl_buf->action == MLAN_ACT_GET)) {
+                wlan_uap_ret_cmd_ap_config(pmpriv, resp, pioctl_buf);
+            }
+        }
+        if (pioctl_buf->req_id == MLAN_IOCTL_MISC_CFG) {
+            misc = (mlan_ds_misc_cfg *) pioctl_buf->pbuf;
+            cust_ie = (mlan_ds_misc_custom_ie *) sys_config->tlv_buffer;
+            if ((pioctl_buf->action == MLAN_ACT_GET) &&
+                (misc->sub_command == MLAN_OID_MISC_CUSTOM_IE)) {
+
+                cust_ie->type = wlan_le16_to_cpu(cust_ie->type);
+                resp_len = cust_ie->len = wlan_le16_to_cpu(cust_ie->len);
+                travel_len = 0;
+                /* conversion for index, mask, len */
+                if (resp_len == sizeof(t_u16))
+                    cust_ie->ie_data_list[0].ie_index =
+                        wlan_cpu_to_le16(cust_ie->ie_data_list[0].ie_index);
+
+                while (resp_len > sizeof(t_u16)) {
+                    cptr =
+                        (custom_ie *) (((t_u8 *) cust_ie->ie_data_list) +
+                                       travel_len);
+                    cptr->ie_index = wlan_le16_to_cpu(cptr->ie_index);
+                    cptr->mgmt_subtype_mask =
+                        wlan_le16_to_cpu(cptr->mgmt_subtype_mask);
+                    cptr->ie_length = wlan_le16_to_cpu(cptr->ie_length);
+                    travel_len +=
+                        cptr->ie_length + sizeof(custom_ie) - MAX_IE_SIZE;
+                    resp_len -=
+                        cptr->ie_length + sizeof(custom_ie) - MAX_IE_SIZE;
+                }
+                memcpy(pmpriv->adapter, &misc->param.cust_ie, cust_ie,
+                       (cust_ie->len + sizeof(MrvlIEtypesHeader_t)));
+            }
+        }
+    } else {                    /* no ioctl: driver generated get/set */
+        switch (wlan_le16_to_cpu(tlv->header.type)) {
+        case TLV_TYPE_UAP_MAC_ADDRESS:
+            memcpy(pmpriv->adapter, pmpriv->curr_addr, tlv->mac,
+                   MLAN_MAC_ADDR_LENGTH);
+            break;
+        }
+    }
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function prepares command of snmp_mib
+ *           
+ *  @param pmpriv		A pointer to mlan_private structure
+ *  @param cmd	   		A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action   the action: GET or SET
+ *  @param cmd_oid      Cmd oid: treated as sub command
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure 
+ *  @param pdata_buf    A pointer to information buffer
+ *  @return         MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_uap_cmd_snmp_mib(pmlan_private pmpriv,
+                      IN HostCmd_DS_COMMAND * cmd,
+                      IN t_u16 cmd_action,
+                      IN t_u32 cmd_oid,
+                      IN pmlan_ioctl_req pioctl_buf, IN t_void * pdata_buf)
+{
+    HostCmd_DS_802_11_SNMP_MIB *psnmp_mib = &cmd->params.smib;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    t_u8 *psnmp_oid = MNULL;
+    t_u8 i;
+
+    t_u8 snmp_oids[] = {
+        tkip_mic_failures,
+        ccmp_decrypt_errors,
+        wep_undecryptable_count,
+        wep_icv_error_count,
+        decrypt_failure_count,
+        dot11_mcast_tx_count,
+        dot11_failed_count,
+        dot11_retry_count,
+        dot11_multi_retry_count,
+        dot11_frame_dup_count,
+        dot11_rts_success_count,
+        dot11_rts_failure_count,
+        dot11_ack_failure_count,
+        dot11_rx_fragment_count,
+        dot11_mcast_rx_frame_count,
+        dot11_fcs_error_count,
+        dot11_tx_frame_count,
+        dot11_rsna_tkip_cm_invoked,
+        dot11_rsna_4way_hshk_failures,
+    };
+
+    if (cmd_action == HostCmd_ACT_GEN_GET) {
+        cmd->command = wlan_cpu_to_le16(HostCmd_CMD_802_11_SNMP_MIB);
+        psnmp_mib->query_type = wlan_cpu_to_le16(HostCmd_ACT_GEN_GET);
+        cmd->size =
+            wlan_cpu_to_le16(sizeof(t_u16) + S_DS_GEN +
+                             sizeof(snmp_oids) *
+                             sizeof(MrvlIEtypes_snmp_oid_t));
+        psnmp_oid = (t_u8 *) & psnmp_mib->oid;
+        for (i = 0; i < sizeof(snmp_oids); i++) {
+            /* SNMP OID header type */
+            *(t_u16 *) psnmp_oid = wlan_cpu_to_le16(snmp_oids[i]);
+            psnmp_oid += sizeof(t_u16);
+            /* SNMP OID header length */
+            *(t_u16 *) psnmp_oid = wlan_cpu_to_le16(sizeof(t_u32));
+            psnmp_oid += sizeof(t_u16) + sizeof(t_u32);
+        }
+    }
+    return ret;
+}
+
+/** 
+ *  @brief This function handles the command response of snmp_mib
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure 
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_uap_ret_snmp_mib(IN pmlan_private pmpriv,
+                      IN HostCmd_DS_COMMAND * resp,
+                      IN mlan_ioctl_req * pioctl_buf)
+{
+    pmlan_adapter pmadapter = pmpriv->adapter;
+    HostCmd_DS_802_11_SNMP_MIB *psnmp_mib =
+        (HostCmd_DS_802_11_SNMP_MIB *) & resp->params.smib;
+    mlan_ds_get_info *info;
+    t_u8 *psnmp_oid = MNULL;
+    t_u32 data;
+    t_u16 tlv_buf_left = 0;
+    t_u16 tlv_type = 0;
+
+    ENTER();
+    if (psnmp_mib->query_type == HostCmd_ACT_GEN_GET) {
+        if (!pioctl_buf) {
+            LEAVE();
+            return MLAN_STATUS_SUCCESS;
+        }
+        info = (mlan_ds_get_info *) pioctl_buf->pbuf;
+        tlv_buf_left = resp->size - (sizeof(t_u16) + S_DS_GEN);
+        psnmp_oid = (t_u8 *) & psnmp_mib->oid;
+        while (tlv_buf_left >= sizeof(MrvlIEtypes_snmp_oid_t)) {
+            tlv_type = wlan_le16_to_cpu(*(t_u16 *) psnmp_oid);
+            psnmp_oid += sizeof(t_u16) + sizeof(t_u16);
+            memcpy(pmadapter, &data, psnmp_oid, sizeof(t_u32));
+            switch (tlv_type) {
+            case tkip_mic_failures:
+                info->param.ustats.tkip_mic_failures = wlan_le32_to_cpu(data);
+                break;
+            case ccmp_decrypt_errors:
+                info->param.ustats.ccmp_decrypt_errors = wlan_le32_to_cpu(data);
+                break;
+            case wep_undecryptable_count:
+                info->param.ustats.wep_undecryptable_count =
+                    wlan_le32_to_cpu(data);
+                break;
+            case wep_icv_error_count:
+                info->param.ustats.wep_icv_error_count = wlan_le32_to_cpu(data);
+                break;
+            case decrypt_failure_count:
+                info->param.ustats.decrypt_failure_count =
+                    wlan_le32_to_cpu(data);
+                break;
+            case dot11_mcast_tx_count:
+                info->param.ustats.mcast_tx_count = wlan_le32_to_cpu(data);
+                break;
+            case dot11_failed_count:
+                info->param.ustats.failed_count = wlan_le32_to_cpu(data);
+                break;
+            case dot11_retry_count:
+                info->param.ustats.retry_count = wlan_le32_to_cpu(data);
+                break;
+            case dot11_multi_retry_count:
+                info->param.ustats.multi_retry_count = wlan_le32_to_cpu(data);
+                break;
+            case dot11_frame_dup_count:
+                info->param.ustats.frame_dup_count = wlan_le32_to_cpu(data);
+                break;
+            case dot11_rts_success_count:
+                info->param.ustats.rts_success_count = wlan_le32_to_cpu(data);
+                break;
+            case dot11_rts_failure_count:
+                info->param.ustats.rts_failure_count = wlan_le32_to_cpu(data);
+                break;
+            case dot11_ack_failure_count:
+                info->param.ustats.ack_failure_count = wlan_le32_to_cpu(data);
+                break;
+            case dot11_rx_fragment_count:
+                info->param.ustats.rx_fragment_count = wlan_le32_to_cpu(data);
+                break;
+            case dot11_mcast_rx_frame_count:
+                info->param.ustats.mcast_rx_frame_count =
+                    wlan_le32_to_cpu(data);
+                break;
+            case dot11_fcs_error_count:
+                info->param.ustats.fcs_error_count = wlan_le32_to_cpu(data);
+                break;
+            case dot11_tx_frame_count:
+                info->param.ustats.tx_frame_count = wlan_le32_to_cpu(data);
+                break;
+            case dot11_rsna_tkip_cm_invoked:
+                info->param.ustats.rsna_tkip_cm_invoked =
+                    wlan_le32_to_cpu(data);
+                break;
+            case dot11_rsna_4way_hshk_failures:
+                info->param.ustats.rsna_4way_hshk_failures =
+                    wlan_le32_to_cpu(data);
+                break;
+            }
+            tlv_buf_left -= sizeof(MrvlIEtypes_snmp_oid_t);
+            psnmp_oid += sizeof(t_u32);
+        }
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function prepares command of deauth station
+ *           
+ *  @param pmpriv		A pointer to mlan_private structure
+ *  @param cmd	   		A pointer to HostCmd_DS_COMMAND structure
+ *  @param pdata_buf    A pointer to data buffer
+ *  @return         MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_uap_cmd_sta_deauth(pmlan_private pmpriv,
+                        IN HostCmd_DS_COMMAND * cmd, IN t_void * pdata_buf)
+{
+    HostCmd_DS_STA_DEAUTH *pcmd_sta_deauth =
+        (HostCmd_DS_STA_DEAUTH *) & cmd->params.sta_deauth;
+    mlan_deauth_param *deauth = (mlan_deauth_param *) pdata_buf;
+
+    ENTER();
+    cmd->command = wlan_cpu_to_le16(HOST_CMD_APCMD_STA_DEAUTH);
+    cmd->size = wlan_cpu_to_le16(S_DS_GEN + sizeof(HostCmd_DS_STA_DEAUTH));
+    memcpy(pmpriv->adapter, pcmd_sta_deauth->mac, deauth->mac_addr,
+           MLAN_MAC_ADDR_LENGTH);
+    pcmd_sta_deauth->reason = wlan_cpu_to_le16(deauth->reason_code);
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function prepares command of key material
+ *           
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *  @param cmd_action   The action: GET or SET
+ *  @param cmd_oid      OID: ENABLE or DISABLE
+ *  @param pdata_buf    A pointer to data buffer
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_uap_cmd_key_material(IN pmlan_private pmpriv,
+                          IN HostCmd_DS_COMMAND * cmd,
+                          IN t_u16 cmd_action,
+                          IN t_u16 cmd_oid, IN t_void * pdata_buf)
+{
+    HostCmd_DS_802_11_KEY_MATERIAL *pkey_material = &cmd->params.key_material;
+    mlan_ds_encrypt_key *pkey = (mlan_ds_encrypt_key *) pdata_buf;
+    MrvlIEtypes_MacAddr_t *tlv = MNULL;
+    const t_u8 bc_mac[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
+    t_u16 key_param_len = 0;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    sta_node *sta_ptr = MNULL;
+
+    ENTER();
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_802_11_KEY_MATERIAL);
+    pkey_material->action = wlan_cpu_to_le16(cmd_action);
+
+    if (cmd_action == HostCmd_ACT_GEN_GET) {
+        cmd->size = wlan_cpu_to_le16(sizeof(pkey_material->action) + S_DS_GEN);
+        goto done;
+    }
+
+    memset(pmpriv->adapter, &pkey_material->key_param_set, 0,
+           sizeof(MrvlIEtype_KeyParamSet_t));
+    if (pkey->is_wapi_key) {
+        PRINTM(MINFO, "Set WAPI Key\n");
+        pkey_material->key_param_set.key_type_id =
+            wlan_cpu_to_le16(KEY_TYPE_ID_WAPI);
+        if (cmd_oid == KEY_INFO_ENABLED)
+            pkey_material->key_param_set.key_info =
+                wlan_cpu_to_le16(KEY_INFO_WAPI_ENABLED);
+        else
+            pkey_material->key_param_set.key_info =
+                !(wlan_cpu_to_le16(KEY_INFO_WAPI_ENABLED));
+
+        pkey_material->key_param_set.key[0] = pkey->key_index;
+        if (!pmpriv->sec_info.wapi_key_on)
+            pkey_material->key_param_set.key[1] = 1;
+        else
+            pkey_material->key_param_set.key[1] = 0;    /* set 0 when re-key */
+
+        if (0 != memcmp(pmpriv->adapter, pkey->mac_addr, bc_mac, sizeof(bc_mac))) {     /* WAPI 
+                                                                                           pairwise 
+                                                                                           key: 
+                                                                                           unicast 
+                                                                                         */
+            pkey_material->key_param_set.key_info |=
+                wlan_cpu_to_le16(KEY_INFO_WAPI_UNICAST);
+            if ((sta_ptr = wlan_add_station_entry(pmpriv, pkey->mac_addr))) {
+                PRINTM(MCMND, "station: wapi_key_on\n");
+                sta_ptr->wapi_key_on = MTRUE;
+            }
+        } else {                /* WAPI group key: multicast */
+            pkey_material->key_param_set.key_info |=
+                wlan_cpu_to_le16(KEY_INFO_WAPI_MCAST);
+            pmpriv->sec_info.wapi_key_on = MTRUE;
+        }
+        pkey_material->key_param_set.type =
+            wlan_cpu_to_le16(TLV_TYPE_KEY_MATERIAL);
+        pkey_material->key_param_set.key_len = wlan_cpu_to_le16(WAPI_KEY_LEN);
+        memcpy(pmpriv->adapter, &pkey_material->key_param_set.key[2],
+               pkey->key_material, pkey->key_len);
+        pkey_material->key_param_set.length =
+            wlan_cpu_to_le16(WAPI_KEY_LEN + KEYPARAMSET_FIXED_LEN);
+
+        key_param_len =
+            (WAPI_KEY_LEN + KEYPARAMSET_FIXED_LEN) +
+            sizeof(MrvlIEtypesHeader_t);
+        tlv =
+            (MrvlIEtypes_MacAddr_t *) ((t_u8 *) & pkey_material->key_param_set +
+                                       key_param_len);
+        tlv->header.type = wlan_cpu_to_le16(TLV_TYPE_STA_MAC_ADDRESS);
+        tlv->header.len = wlan_cpu_to_le16(MLAN_MAC_ADDR_LENGTH);
+        memcpy(pmpriv->adapter, tlv->mac, pkey->mac_addr, MLAN_MAC_ADDR_LENGTH);
+        cmd->size =
+            wlan_cpu_to_le16(key_param_len + sizeof(pkey_material->action) +
+                             S_DS_GEN + sizeof(MrvlIEtypes_MacAddr_t));
+        goto done;
+    }
+    if (pkey->key_len == WPA_AES_KEY_LEN) {
+        PRINTM(MCMND, "WPA_AES\n");
+        pkey_material->key_param_set.key_type_id =
+            wlan_cpu_to_le16(KEY_TYPE_ID_AES);
+        if (cmd_oid == KEY_INFO_ENABLED)
+            pkey_material->key_param_set.key_info =
+                wlan_cpu_to_le16(KEY_INFO_AES_ENABLED);
+        else
+            pkey_material->key_param_set.key_info =
+                !(wlan_cpu_to_le16(KEY_INFO_AES_ENABLED));
+
+        if (memcmp(pmpriv->adapter, pkey->mac_addr, bc_mac, sizeof(bc_mac)))    /* AES 
+                                                                                   pairwise 
+                                                                                   key: 
+                                                                                   unicast 
+                                                                                 */
+            pkey_material->key_param_set.key_info |=
+                wlan_cpu_to_le16(KEY_INFO_AES_UNICAST);
+        else                    /* AES group key: multicast */
+            pkey_material->key_param_set.key_info |=
+                wlan_cpu_to_le16(KEY_INFO_AES_MCAST);
+    } else if (pkey->key_len == WPA_TKIP_KEY_LEN) {
+        PRINTM(MCMND, "WPA_TKIP\n");
+        pkey_material->key_param_set.key_type_id =
+            wlan_cpu_to_le16(KEY_TYPE_ID_TKIP);
+        pkey_material->key_param_set.key_info =
+            wlan_cpu_to_le16(KEY_INFO_TKIP_ENABLED);
+
+        if (memcmp(pmpriv->adapter, pkey->mac_addr, bc_mac, sizeof(bc_mac)))    /* TKIP 
+                                                                                   pairwise 
+                                                                                   key: 
+                                                                                   unicast 
+                                                                                 */
+            pkey_material->key_param_set.key_info |=
+                wlan_cpu_to_le16(KEY_INFO_TKIP_UNICAST);
+        else                    /* TKIP group key: multicast */
+            pkey_material->key_param_set.key_info |=
+                wlan_cpu_to_le16(KEY_INFO_TKIP_MCAST);
+    }
+
+    if (pkey_material->key_param_set.key_type_id) {
+        pkey_material->key_param_set.type =
+            wlan_cpu_to_le16(TLV_TYPE_KEY_MATERIAL);
+        pkey_material->key_param_set.key_len = wlan_cpu_to_le16(pkey->key_len);
+        memcpy(pmpriv->adapter, pkey_material->key_param_set.key,
+               pkey->key_material, pkey->key_len);
+        pkey_material->key_param_set.length =
+            wlan_cpu_to_le16((t_u16) pkey->key_len + KEYPARAMSET_FIXED_LEN);
+        key_param_len =
+            (pkey->key_len + KEYPARAMSET_FIXED_LEN) +
+            sizeof(MrvlIEtypesHeader_t);
+
+        tlv =
+            (MrvlIEtypes_MacAddr_t *) ((t_u8 *) & pkey_material->key_param_set +
+                                       key_param_len);
+        tlv->header.type = wlan_cpu_to_le16(TLV_TYPE_STA_MAC_ADDRESS);
+        tlv->header.len = wlan_cpu_to_le16(MLAN_MAC_ADDR_LENGTH);
+        memcpy(pmpriv->adapter, tlv->mac, pkey->mac_addr, MLAN_MAC_ADDR_LENGTH);
+        cmd->size =
+            wlan_cpu_to_le16(key_param_len + sizeof(pkey_material->action) +
+                             S_DS_GEN + sizeof(MrvlIEtypes_MacAddr_t));
+    }
+  done:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief This function handles the command response of sta_list
+ *  
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure 
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+wlan_uap_ret_sta_list(IN pmlan_private pmpriv,
+                      IN HostCmd_DS_COMMAND * resp,
+                      IN mlan_ioctl_req * pioctl_buf)
+{
+    HostCmd_DS_STA_LIST *sta_list =
+        (HostCmd_DS_STA_LIST *) & resp->params.sta_list;
+    mlan_ds_get_info *info;
+    MrvlIEtypes_sta_info_t *tlv = MNULL;
+    t_u8 i = 0;
+
+    ENTER();
+    if (pioctl_buf) {
+        info = (mlan_ds_get_info *) pioctl_buf->pbuf;
+        info->param.sta_list.sta_count = wlan_le16_to_cpu(sta_list->sta_count);
+        tlv =
+            (MrvlIEtypes_sta_info_t *) ((t_u8 *) sta_list +
+                                        sizeof(HostCmd_DS_STA_LIST));
+        info->param.sta_list.sta_count =
+            MIN(info->param.sta_list.sta_count, MAX_NUM_CLIENTS);
+        for (i = 0; i < info->param.sta_list.sta_count; i++) {
+            memcpy(pmpriv->adapter, info->param.sta_list.info[i].mac_address,
+                   tlv->mac_address, MLAN_MAC_ADDR_LENGTH);
+            info->param.sta_list.info[i].power_mfg_status =
+                tlv->power_mfg_status;
+            info->param.sta_list.info[i].rssi = tlv->rssi;
+            tlv++;
+        }
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function will search for the specific ie
+ *  		
+ *  
+ *  @param priv    A pointer to mlan_private
+ *  @param pevent  A pointer to event buf
+ *
+ *  @return	       MTRUE/MFALSE;
+ */
+static t_u32
+wlan_check_11n_capability(pmlan_private priv, pmlan_buffer pevent)
+{
+    t_u32 ret = MFALSE;
+    t_u16 tlv_type, tlv_len;
+    t_u16 frame_control, frame_sub_type = 0;
+    t_u8 *assoc_req_ie = MNULL;
+    t_u8 ie_len = 0, assoc_ie_len = 0;
+    t_u8 *pht_cap = MNULL;
+    int tlv_buf_left = pevent->data_len - ASSOC_EVENT_FIX_SIZE;
+    MrvlIEtypesHeader_t *tlv = (MrvlIEtypesHeader_t *)
+        (pevent->pbuf + pevent->data_offset + ASSOC_EVENT_FIX_SIZE);
+    MrvlIETypes_MgmtFrameSet_t *mgmt_tlv = MNULL;
+
+    ENTER();
+    while (tlv_buf_left >= (int) sizeof(MrvlIEtypesHeader_t)) {
+        tlv_type = wlan_le16_to_cpu(tlv->type);
+        tlv_len = wlan_le16_to_cpu(tlv->len);
+        if ((sizeof(MrvlIEtypesHeader_t) + tlv_len) >
+            (unsigned int) tlv_buf_left) {
+            PRINTM(MERROR, "wrong tlv: tlvLen=%d, tlvBufLeft=%d\n", tlv_len,
+                   tlv_buf_left);
+            break;
+        }
+        if (tlv_type == TLV_TYPE_UAP_MGMT_FRAME) {
+            mgmt_tlv = (MrvlIETypes_MgmtFrameSet_t *) tlv;
+            memcpy(priv->adapter, &frame_control,
+                   (t_u8 *) & (mgmt_tlv->frame_control), sizeof(frame_control));
+            frame_sub_type = IEEE80211_GET_FC_MGMT_FRAME_SUBTYPE(frame_control);
+            if ((mgmt_tlv->frame_control.type == 0) &&
+                ((frame_sub_type == SUBTYPE_ASSOC_REQUEST) ||
+                 (frame_sub_type == SUBTYPE_REASSOC_REQUEST))) {
+
+                if (frame_sub_type == SUBTYPE_ASSOC_REQUEST)
+                    assoc_ie_len = sizeof(IEEEtypes_AssocRqst_t);
+                else if (frame_sub_type == SUBTYPE_REASSOC_REQUEST)
+                    assoc_ie_len = sizeof(IEEEtypes_ReAssocRqst_t);
+
+                ie_len = tlv_len - sizeof(IEEEtypes_FrameCtl_t) - assoc_ie_len;
+                assoc_req_ie =
+                    (t_u8 *) tlv + sizeof(MrvlIETypes_MgmtFrameSet_t) +
+                    assoc_ie_len;
+                pht_cap =
+                    wlan_get_specific_ie(priv, assoc_req_ie, ie_len,
+                                         HT_CAPABILITY);
+                if (pht_cap) {
+                    PRINTM(MCMND, "STA supports 11n\n");
+                    ret = MTRUE;
+                } else {
+                    PRINTM(MCMND, "STA doesn't support 11n\n");
+                }
+                break;
+            }
+        }
+        tlv_buf_left -= (sizeof(MrvlIEtypesHeader_t) + tlv_len);
+        tlv =
+            (MrvlIEtypesHeader_t *) ((t_u8 *) tlv + tlv_len +
+                                     sizeof(MrvlIEtypesHeader_t));
+    }
+    LEAVE();
+
+    return ret;
+}
+
+/** Fixed size of bss start event */
+#define BSS_START_EVENT_FIX_SIZE    12
+
+/**
+ *  @brief This function will search for the specific ie
+ *  		
+ *  
+ *  @param priv    A pointer to mlan_private
+ *  @param pevent  A pointer to event buf
+ *
+ *  @return	       N/A
+ */
+static void
+wlan_check_uap_capability(pmlan_private priv, pmlan_buffer pevent)
+{
+    t_u16 tlv_type, tlv_len;
+    int tlv_buf_left = pevent->data_len - BSS_START_EVENT_FIX_SIZE;
+    MrvlIEtypesHeader_t *tlv =
+        (MrvlIEtypesHeader_t *) (pevent->pbuf + pevent->data_offset +
+                                 BSS_START_EVENT_FIX_SIZE);
+    const t_u8 wmm_oui[4] = { 0x00, 0x50, 0xf2, 0x02 };
+    IEEEtypes_WmmParameter_t *pWmmParamIe = MNULL;
+    priv->wmm_enabled = MFALSE;
+    priv->pkt_fwd = MFALSE;
+    priv->is_11n_enabled = MFALSE;
+    while (tlv_buf_left >= (int) sizeof(MrvlIEtypesHeader_t)) {
+        tlv_type = wlan_le16_to_cpu(tlv->type);
+        tlv_len = wlan_le16_to_cpu(tlv->len);
+        if ((sizeof(MrvlIEtypesHeader_t) + tlv_len) >
+            (unsigned int) tlv_buf_left) {
+            PRINTM(MERROR, "wrong tlv: tlvLen=%d, tlvBufLeft=%d\n", tlv_len,
+                   tlv_buf_left);
+            break;
+        }
+        if (tlv_type == HT_CAPABILITY) {
+            DBG_HEXDUMP(MCMD_D, "HT_CAP tlv", tlv,
+                        tlv_len + sizeof(MrvlIEtypesHeader_t));
+            priv->is_11n_enabled = MTRUE;
+        }
+        if (tlv_type == VENDOR_SPECIFIC_221) {
+            if (!memcmp
+                (priv->adapter, (t_u8 *) tlv + sizeof(MrvlIEtypesHeader_t),
+                 wmm_oui, sizeof(wmm_oui))) {
+                DBG_HEXDUMP(MCMD_D, "wmm ie tlv", tlv,
+                            tlv_len + sizeof(MrvlIEtypesHeader_t));
+                priv->wmm_enabled = MFALSE;
+                wlan_wmm_setup_ac_downgrade(priv);
+                priv->wmm_enabled = MTRUE;
+                pWmmParamIe = (IEEEtypes_WmmParameter_t *) ((t_u8 *) tlv + 2);
+                pWmmParamIe->vend_hdr.len = (t_u8) tlv_len;
+                pWmmParamIe->vend_hdr.element_id = WMM_IE;
+                wlan_wmm_setup_queue_priorities(priv, pWmmParamIe);
+            }
+        }
+        if (tlv_type == TLV_TYPE_UAP_PKT_FWD_CTL) {
+            DBG_HEXDUMP(MCMD_D, "pkt_fwd tlv", tlv,
+                        tlv_len + sizeof(MrvlIEtypesHeader_t));
+            /* We will disable host pkt forwarding if firmware's pkt_fwd_ctl is 
+               enabled */
+            priv->pkt_fwd =
+                (*((t_u8 *) tlv + sizeof(MrvlIEtypesHeader_t)) ==
+                 1) ? MFALSE : MTRUE;
+            PRINTM(MCMND, "pkt_fwd DRV: 0x%x\n", priv->pkt_fwd);
+        }
+        tlv_buf_left -= (sizeof(MrvlIEtypesHeader_t) + tlv_len);
+        tlv =
+            (MrvlIEtypesHeader_t *) ((t_u8 *) tlv + tlv_len +
+                                     sizeof(MrvlIEtypesHeader_t));
+    }
+    if (priv->wmm_enabled == MFALSE) {
+        /* Since WMM is not enabled, setup the queues with the defaults */
+        wlan_wmm_setup_queues(priv);
+    }
+}
+
+/**
+ *  @brief This function will update WAPI PN in statation assoc event
+ *  		
+ *  
+ *  @param priv    A pointer to mlan_private
+ *  @param pevent  A pointer to event buf
+ *
+ *  @return	       MFALSE
+ */
+static t_u32
+wlan_update_wapi_info_tlv(pmlan_private priv, pmlan_buffer pevent)
+{
+    t_u32 ret = MFALSE;
+    t_u16 tlv_type, tlv_len;
+    t_u32 tx_pn[4];
+    t_u32 i = 0;
+    int tlv_buf_left = pevent->data_len - ASSOC_EVENT_FIX_SIZE;
+    MrvlIEtypesHeader_t *tlv = (MrvlIEtypesHeader_t *)
+        (pevent->pbuf + pevent->data_offset + ASSOC_EVENT_FIX_SIZE);
+    MrvlIEtypes_wapi_info_t *wapi_tlv = MNULL;
+
+    ENTER();
+    while (tlv_buf_left >= (int) sizeof(MrvlIEtypesHeader_t)) {
+        tlv_type = wlan_le16_to_cpu(tlv->type);
+        tlv_len = wlan_le16_to_cpu(tlv->len);
+        if ((sizeof(MrvlIEtypesHeader_t) + tlv_len) >
+            (unsigned int) tlv_buf_left) {
+            PRINTM(MERROR, "wrong tlv: tlvLen=%d, tlvBufLeft=%d\n", tlv_len,
+                   tlv_buf_left);
+            break;
+        }
+        if (tlv_type == TLV_TYPE_AP_WAPI_INFO) {
+            wapi_tlv = (MrvlIEtypes_wapi_info_t *) tlv;
+            DBG_HEXDUMP(MCMD_D, "Fw:multicast_PN", wapi_tlv->multicast_PN,
+                        PN_SIZE);
+            memcpy(priv->adapter, (t_u8 *) tx_pn, wapi_tlv->multicast_PN,
+                   PN_SIZE);
+            for (i = 0; i < 4; i++)
+                tx_pn[i] = mlan_ntohl(tx_pn[i]);
+            memcpy(priv->adapter, wapi_tlv->multicast_PN, (t_u8 *) tx_pn,
+                   PN_SIZE);
+            DBG_HEXDUMP(MCMD_D, "Host:multicast_PN", wapi_tlv->multicast_PN,
+                        PN_SIZE);
+            break;
+        }
+        tlv_buf_left -= (sizeof(MrvlIEtypesHeader_t) + tlv_len);
+        tlv =
+            (MrvlIEtypesHeader_t *) ((t_u8 *) tlv + tlv_len +
+                                     sizeof(MrvlIEtypesHeader_t));
+    }
+    LEAVE();
+
+    return ret;
+}
+
+/**
+ *  @brief This function send sta_assoc_event to moal
+ *  	   payload with sta mac address and assoc ie. 
+ *  
+ *  @param priv    A pointer to mlan_private
+ *  @param pevent  A pointer to mlan_event buffer
+ *  @param pbuf    A pointer to mlan_buffer which has event content. 
+ *
+ *  @return	       MFALSE
+ */
+static t_u32
+wlan_process_sta_assoc_event(pmlan_private priv, mlan_event * pevent,
+                             pmlan_buffer pmbuf)
+{
+    t_u32 ret = MFALSE;
+    t_u16 tlv_type, tlv_len;
+    t_u16 frame_control, frame_sub_type = 0;
+    t_u8 *assoc_req_ie = MNULL;
+    t_u8 ie_len = 0, assoc_ie_len = 0;
+    int tlv_buf_left = pmbuf->data_len - ASSOC_EVENT_FIX_SIZE;
+    MrvlIEtypesHeader_t *tlv = (MrvlIEtypesHeader_t *)
+        (pmbuf->pbuf + pmbuf->data_offset + ASSOC_EVENT_FIX_SIZE);
+    MrvlIETypes_MgmtFrameSet_t *mgmt_tlv = MNULL;
+
+    ENTER();
+    pevent->event_id = MLAN_EVENT_ID_UAP_FW_STA_CONNECT;
+    pevent->bss_index = priv->bss_index;
+    pevent->event_len = MLAN_MAC_ADDR_LENGTH;
+    memcpy(priv->adapter, pevent->event_buf,
+           pmbuf->pbuf + pmbuf->data_offset + 6, pevent->event_len);
+    while (tlv_buf_left >= (int) sizeof(MrvlIEtypesHeader_t)) {
+        tlv_type = wlan_le16_to_cpu(tlv->type);
+        tlv_len = wlan_le16_to_cpu(tlv->len);
+        if ((sizeof(MrvlIEtypesHeader_t) + tlv_len) >
+            (unsigned int) tlv_buf_left) {
+            PRINTM(MERROR, "wrong tlv: tlvLen=%d, tlvBufLeft=%d\n", tlv_len,
+                   tlv_buf_left);
+            break;
+        }
+        if (tlv_type == TLV_TYPE_UAP_MGMT_FRAME) {
+            mgmt_tlv = (MrvlIETypes_MgmtFrameSet_t *) tlv;
+            memcpy(priv->adapter, &frame_control,
+                   (t_u8 *) & (mgmt_tlv->frame_control), sizeof(frame_control));
+            frame_sub_type = IEEE80211_GET_FC_MGMT_FRAME_SUBTYPE(frame_control);
+            if ((mgmt_tlv->frame_control.type == 0) &&
+                ((frame_sub_type == SUBTYPE_ASSOC_REQUEST) ||
+                 (frame_sub_type == SUBTYPE_REASSOC_REQUEST))) {
+
+                if (frame_sub_type == SUBTYPE_ASSOC_REQUEST)
+                    assoc_ie_len = sizeof(IEEEtypes_AssocRqst_t);
+                else if (frame_sub_type == SUBTYPE_REASSOC_REQUEST)
+                    assoc_ie_len = sizeof(IEEEtypes_ReAssocRqst_t);
+
+                ie_len = tlv_len - sizeof(IEEEtypes_FrameCtl_t) - assoc_ie_len;
+                assoc_req_ie =
+                    (t_u8 *) tlv + sizeof(MrvlIETypes_MgmtFrameSet_t) +
+                    assoc_ie_len;
+                memcpy(priv->adapter, pevent->event_buf + pevent->event_len,
+                       assoc_req_ie, ie_len);
+                pevent->event_len += ie_len;
+                break;
+            }
+        }
+        tlv_buf_left -= (sizeof(MrvlIEtypesHeader_t) + tlv_len);
+        tlv =
+            (MrvlIEtypesHeader_t *) ((t_u8 *) tlv + tlv_len +
+                                     sizeof(MrvlIEtypesHeader_t));
+    }
+    PRINTM(MEVENT, "STA assoc event len=%d\n", pevent->event_len);
+    DBG_HEXDUMP(MCMD_D, "STA assoc event", pevent->event_buf,
+                pevent->event_len);
+    wlan_recv_event(priv, pevent->event_id, pevent);
+    LEAVE();
+    return ret;
+}
+
+/********************************************************
+    Global Functions
+********************************************************/
+/** 
+ *  @brief This function prepare the command before sending to firmware.
+ *  
+ *  @param priv       A pointer to mlan_private structure
+ *  @param cmd_no       Command number
+ *  @param cmd_action   Command action: GET or SET
+ *  @param cmd_oid      Cmd oid: treated as sub command
+ *  @param pioctl_buf   A pointer to MLAN IOCTL Request buffer
+ *  @param pdata_buf    A pointer to information buffer
+ *  @param pcmd_buf      A pointer to cmd buf
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_ops_uap_prepare_cmd(IN t_void * priv,
+                         IN t_u16 cmd_no,
+                         IN t_u16 cmd_action,
+                         IN t_u32 cmd_oid,
+                         IN t_void * pioctl_buf,
+                         IN t_void * pdata_buf, IN t_void * pcmd_buf)
+{
+    HostCmd_DS_COMMAND *cmd_ptr = (HostCmd_DS_COMMAND *) pcmd_buf;
+    mlan_private *pmpriv = (mlan_private *) priv;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_ioctl_req pioctl_req = (mlan_ioctl_req *) pioctl_buf;
+
+    ENTER();
+
+    /* Prepare command */
+    switch (cmd_no) {
+    case HostCmd_CMD_SOFT_RESET:
+    case HOST_CMD_APCMD_BSS_STOP:
+    case HOST_CMD_APCMD_BSS_START:
+    case HOST_CMD_APCMD_SYS_INFO:
+    case HOST_CMD_APCMD_SYS_RESET:
+    case HOST_CMD_APCMD_STA_LIST:
+        cmd_ptr->command = wlan_cpu_to_le16(cmd_no);
+        cmd_ptr->size = wlan_cpu_to_le16(S_DS_GEN);
+        break;
+    case HOST_CMD_APCMD_SYS_CONFIGURE:
+        ret = wlan_uap_cmd_sys_configure(pmpriv, cmd_ptr, cmd_action,
+                                         (pmlan_ioctl_req) pioctl_buf,
+                                         pdata_buf);
+        break;
+    case HostCmd_CMD_802_11_PS_MODE_ENH:
+        ret =
+            wlan_cmd_enh_power_mode(pmpriv, cmd_ptr, cmd_action,
+                                    (t_u16) cmd_oid, pdata_buf);
+        break;
+    case HostCmd_CMD_FUNC_INIT:
+        if (pmpriv->adapter->hw_status == WlanHardwareStatusReset)
+            pmpriv->adapter->hw_status = WlanHardwareStatusInitializing;
+        cmd_ptr->command = wlan_cpu_to_le16(cmd_no);
+        cmd_ptr->size = wlan_cpu_to_le16(S_DS_GEN);
+        break;
+    case HostCmd_CMD_FUNC_SHUTDOWN:
+        pmpriv->adapter->hw_status = WlanHardwareStatusReset;
+        cmd_ptr->command = wlan_cpu_to_le16(cmd_no);
+        cmd_ptr->size = wlan_cpu_to_le16(S_DS_GEN);
+        break;
+    case HostCmd_CMD_CFG_DATA:
+        ret = wlan_cmd_cfg_data(pmpriv, cmd_ptr, cmd_action, pdata_buf);
+        break;
+    case HostCmd_CMD_802_11_SNMP_MIB:
+        ret = wlan_uap_cmd_snmp_mib(pmpriv, cmd_ptr, cmd_action, cmd_oid,
+                                    (pmlan_ioctl_req) pioctl_buf, pdata_buf);
+        break;
+    case HOST_CMD_APCMD_STA_DEAUTH:
+        ret = wlan_uap_cmd_sta_deauth(pmpriv, cmd_ptr, pdata_buf);
+        break;
+    case HostCmd_CMD_802_11_KEY_MATERIAL:
+        ret =
+            wlan_uap_cmd_key_material(pmpriv, cmd_ptr, cmd_action, cmd_oid,
+                                      pdata_buf);
+        break;
+    case HostCmd_CMD_GET_HW_SPEC:
+        ret = wlan_cmd_get_hw_spec(pmpriv, cmd_ptr);
+        break;
+    case HostCmd_CMD_802_11_HS_CFG_ENH:
+        ret =
+            wlan_uap_cmd_802_11_hs_cfg(pmpriv, cmd_ptr, cmd_action,
+                                       (hs_config_param *) pdata_buf);
+        break;
+    case HostCmd_CMD_RECONFIGURE_TX_BUFF:
+        ret = wlan_cmd_recfg_tx_buf(pmpriv, cmd_ptr, cmd_action, pdata_buf);
+        break;
+    case HostCmd_CMD_AMSDU_AGGR_CTRL:
+        ret = wlan_cmd_amsdu_aggr_ctrl(pmpriv, cmd_ptr, cmd_action, pdata_buf);
+        break;
+    case HostCmd_CMD_11N_ADDBA_REQ:
+        ret = wlan_cmd_11n_addba_req(pmpriv, cmd_ptr, pdata_buf);
+        break;
+    case HostCmd_CMD_11N_DELBA:
+        ret = wlan_cmd_11n_delba(pmpriv, cmd_ptr, pdata_buf);
+        break;
+    case HostCmd_CMD_11N_ADDBA_RSP:
+        ret = wlan_cmd_11n_addba_rspgen(pmpriv, cmd_ptr, pdata_buf);
+        break;
+#if defined(WFD_SUPPORT)
+    case HostCmd_CMD_SET_BSS_MODE:
+        cmd_ptr->command = wlan_cpu_to_le16(cmd_no);
+        if (pdata_buf)
+            cmd_ptr->params.bss_mode.con_type = *(t_u8 *) pdata_buf;
+        else
+            cmd_ptr->params.bss_mode.con_type = BSS_MODE_WFD_GO;
+        cmd_ptr->size =
+            wlan_cpu_to_le16(sizeof(HostCmd_DS_SET_BSS_MODE) + S_DS_GEN);
+        ret = MLAN_STATUS_SUCCESS;
+        break;
+#endif
+    case HostCmd_CMD_VERSION_EXT:
+        cmd_ptr->command = wlan_cpu_to_le16(cmd_no);
+        cmd_ptr->params.verext.version_str_sel =
+            (t_u8) (*((t_u32 *) pdata_buf));
+        cmd_ptr->size =
+            wlan_cpu_to_le16(sizeof(HostCmd_DS_VERSION_EXT) + S_DS_GEN);
+        ret = MLAN_STATUS_SUCCESS;
+        break;
+    case HostCmd_CMD_CFG_TX_DATA_PAUSE:
+        ret = wlan_uap_cmd_txdatapause(pmpriv, cmd_ptr, cmd_action, pdata_buf);
+        break;
+    case HostCmd_CMD_802_11_RADIO_CONTROL:
+        ret =
+            wlan_cmd_802_11_radio_control(pmpriv, cmd_ptr, cmd_action,
+                                          pdata_buf);
+        break;
+    case HostCmd_CMD_TX_RATE_CFG:
+        ret = wlan_cmd_tx_rate_cfg(pmpriv, cmd_ptr, cmd_action, pdata_buf);
+        break;
+    case HostCmd_CMD_802_11_TX_RATE_QUERY:
+        cmd_ptr->command = wlan_cpu_to_le16(HostCmd_CMD_802_11_TX_RATE_QUERY);
+        cmd_ptr->size =
+            wlan_cpu_to_le16(sizeof(HostCmd_TX_RATE_QUERY) + S_DS_GEN);
+        pmpriv->tx_rate = 0;
+        ret = MLAN_STATUS_SUCCESS;
+        break;
+    default:
+        PRINTM(MERROR, "PREP_CMD: unknown command- %#x\n", cmd_no);
+        if (pioctl_req)
+            pioctl_req->status_code = MLAN_ERROR_CMD_INVALID;
+        ret = MLAN_STATUS_FAILURE;
+        break;
+    }
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief This function handles the AP mode command response
+ *  
+ *  @param priv             A pointer to mlan_private structure
+ *  @param cmdresp_no       cmd no
+ *  @param pcmd_buf         cmdresp buf
+ *  @param pioctl           A pointer to ioctl buf
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_ops_uap_process_cmdresp(IN t_void * priv,
+                             IN t_u16 cmdresp_no,
+                             IN t_void * pcmd_buf, IN t_void * pioctl)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = (mlan_private *) priv;
+    HostCmd_DS_COMMAND *resp = (HostCmd_DS_COMMAND *) pcmd_buf;
+    mlan_ioctl_req *pioctl_buf = (mlan_ioctl_req *) pioctl;
+    mlan_adapter *pmadapter = pmpriv->adapter;
+
+    ENTER();
+
+    /* If the command is not successful, cleanup and return failure */
+    if (resp->result != HostCmd_RESULT_OK) {
+        uap_process_cmdresp_error(pmpriv, resp, pioctl_buf);
+        return MLAN_STATUS_FAILURE;
+    }
+
+    /* Command successful, handle response */
+    switch (cmdresp_no) {
+    case HOST_CMD_APCMD_BSS_STOP:
+        break;
+    case HOST_CMD_APCMD_BSS_START:
+        break;
+    case HOST_CMD_APCMD_SYS_RESET:
+        break;
+    case HOST_CMD_APCMD_SYS_INFO:
+        break;
+    case HOST_CMD_APCMD_SYS_CONFIGURE:
+        ret = wlan_uap_ret_sys_config(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_802_11_PS_MODE_ENH:
+        ret = wlan_ret_enh_power_mode(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_FUNC_INIT:
+    case HostCmd_CMD_FUNC_SHUTDOWN:
+        break;
+    case HostCmd_CMD_802_11_SNMP_MIB:
+        ret = wlan_uap_ret_snmp_mib(pmpriv, resp, pioctl_buf);
+        break;
+    case HOST_CMD_APCMD_STA_DEAUTH:
+        break;
+    case HostCmd_CMD_802_11_KEY_MATERIAL:
+        break;
+    case HOST_CMD_APCMD_STA_LIST:
+        ret = wlan_uap_ret_sta_list(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_GET_HW_SPEC:
+        ret = wlan_ret_get_hw_spec(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_CFG_DATA:
+        ret = wlan_ret_cfg_data(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_802_11_HS_CFG_ENH:
+        ret = wlan_ret_802_11_hs_cfg(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_11N_ADDBA_REQ:
+        ret = wlan_ret_11n_addba_req(pmpriv, resp);
+        break;
+    case HostCmd_CMD_11N_DELBA:
+        ret = wlan_ret_11n_delba(pmpriv, resp);
+        break;
+    case HostCmd_CMD_11N_ADDBA_RSP:
+        ret = wlan_ret_11n_addba_resp(pmpriv, resp);
+        break;
+    case HostCmd_CMD_SET_BSS_MODE:
+        break;
+    case HostCmd_CMD_RECONFIGURE_TX_BUFF:
+        pmadapter->tx_buf_size =
+            (t_u16) wlan_le16_to_cpu(resp->params.tx_buf.buff_size);
+        pmadapter->curr_tx_buf_size = pmadapter->tx_buf_size;
+        PRINTM(MCMND, "max_tx_buf_size=%d, tx_buf_size=%d\n",
+               pmadapter->max_tx_buf_size, pmadapter->tx_buf_size);
+        break;
+    case HostCmd_CMD_AMSDU_AGGR_CTRL:
+        ret = wlan_ret_amsdu_aggr_ctrl(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_VERSION_EXT:
+        ret = wlan_ret_ver_ext(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_CFG_TX_DATA_PAUSE:
+        ret = wlan_uap_ret_txdatapause(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_802_11_RADIO_CONTROL:
+        ret = wlan_ret_802_11_radio_control(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_TX_RATE_CFG:
+        ret = wlan_ret_tx_rate_cfg(pmpriv, resp, pioctl_buf);
+        break;
+    case HostCmd_CMD_802_11_TX_RATE_QUERY:
+        ret = wlan_ret_802_11_tx_rate_query(pmpriv, resp, pioctl_buf);
+        break;
+    default:
+        PRINTM(MERROR, "CMD_RESP: Unknown command response %#x\n",
+               resp->command);
+        if (pioctl_buf)
+            pioctl_buf->status_code = MLAN_ERROR_CMD_RESP_FAIL;
+        break;
+    }
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief This function handles events generated by firmware
+ *  
+ *  @param priv		A pointer to mlan_private structure
+ *
+ *  @return		MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_ops_uap_process_event(IN t_void * priv)
+{
+    pmlan_private pmpriv = (pmlan_private) priv;
+    pmlan_adapter pmadapter = pmpriv->adapter;
+    pmlan_callbacks pcb = &pmadapter->callbacks;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    t_u32 eventcause = pmadapter->event_cause;
+    pmlan_buffer pmbuf = pmadapter->pmlan_buffer_event;
+    t_u8 *event_buf = MNULL;
+    mlan_event *pevent = MNULL;
+    t_u8 sta_addr[MLAN_MAC_ADDR_LENGTH];
+    sta_node *sta_ptr = MNULL;
+    t_u8 i = 0;
+
+    ENTER();
+
+    /* Allocate memory for event buffer */
+    ret =
+        pcb->moal_malloc(pmadapter->pmoal_handle, MAX_EVENT_SIZE, MLAN_MEM_DEF,
+                         &event_buf);
+    if ((ret != MLAN_STATUS_SUCCESS) || !event_buf) {
+        PRINTM(MERROR, "Could not allocate buffer for event buf\n");
+        if (pmbuf)
+            pmbuf->status_code = MLAN_ERROR_NO_MEM;
+        goto done;
+    }
+    pevent = (pmlan_event) event_buf;
+    memset(pmadapter, &pevent->event_id, 0, sizeof(pevent->event_id));
+
+    if (eventcause != EVENT_PS_AWAKE && eventcause != EVENT_PS_SLEEP &&
+        pmbuf->data_len > sizeof(eventcause))
+        DBG_HEXDUMP(MEVT_D, "EVENT", pmbuf->pbuf + pmbuf->data_offset,
+                    pmbuf->data_len);
+
+    switch (eventcause) {
+    case EVENT_MICRO_AP_BSS_START:
+        PRINTM(MEVENT, "EVENT: MICRO_AP_BSS_START\n");
+        memcpy(pmadapter, pmpriv->curr_addr, pmadapter->event_body + 2,
+               MLAN_MAC_ADDR_LENGTH);
+        pevent->event_id = MLAN_EVENT_ID_UAP_FW_BSS_START;
+        wlan_check_uap_capability(pmpriv, pmbuf);
+        break;
+    case EVENT_MICRO_AP_BSS_ACTIVE:
+        PRINTM(MEVENT, "EVENT: MICRO_AP_BSS_ACTIVE\n");
+        pmpriv->media_connected = MTRUE;
+        pevent->event_id = MLAN_EVENT_ID_UAP_FW_BSS_ACTIVE;
+        break;
+    case EVENT_MICRO_AP_BSS_IDLE:
+        PRINTM(MEVENT, "EVENT: MICRO_AP_BSS_IDLE\n");
+        pevent->event_id = MLAN_EVENT_ID_UAP_FW_BSS_IDLE;
+        pmpriv->media_connected = MFALSE;
+        wlan_clean_txrx(pmpriv);
+        wlan_delete_station_list(pmpriv);
+        break;
+    case EVENT_PS_AWAKE:
+        PRINTM(MINFO, "EVENT: AWAKE \n");
+        PRINTM(MEVENT, "||");
+        /* Handle unexpected PS AWAKE event */
+        if (pmadapter->ps_state == PS_STATE_SLEEP_CFM)
+            break;
+        pmadapter->pm_wakeup_card_req = MFALSE;
+        pmadapter->pm_wakeup_fw_try = MFALSE;
+        pmadapter->ps_state = PS_STATE_AWAKE;
+        break;
+    case EVENT_PS_SLEEP:
+        PRINTM(MINFO, "EVENT: SLEEP\n");
+        PRINTM(MEVENT, "__");
+        /* Handle unexpected PS SLEEP event */
+        if (pmadapter->ps_state == PS_STATE_SLEEP_CFM)
+            break;
+        pmadapter->ps_state = PS_STATE_PRE_SLEEP;
+        wlan_check_ps_cond(pmadapter);
+        break;
+    case EVENT_MICRO_AP_STA_ASSOC:
+        PRINTM(MEVENT, "EVENT: MICRO_AP_STA_ASSOC\n");
+        wlan_process_sta_assoc_event(pmpriv, pevent, pmbuf);
+        memcpy(pmadapter, sta_addr, pmadapter->event_body + 2,
+               MLAN_MAC_ADDR_LENGTH);
+        sta_ptr = wlan_add_station_entry(pmpriv, sta_addr);
+        if (pmpriv->is_11n_enabled) {
+            sta_ptr->is_11n_enabled =
+                (t_u8) wlan_check_11n_capability(pmpriv, pmbuf);
+            for (i = 0; i < MAX_NUM_TID; i++) {
+                if (sta_ptr->is_11n_enabled)
+                    sta_ptr->ampdu_sta[i] = pmpriv->aggr_prio_tbl[i].ampdu_user;
+                else
+                    sta_ptr->ampdu_sta[i] = BA_STREAM_NOT_ALLOWED;
+            }
+            memset(pmadapter, sta_ptr->rx_seq, 0xff, sizeof(sta_ptr->rx_seq));
+        }
+        if (pmpriv->sec_info.wapi_enabled)
+            wlan_update_wapi_info_tlv(pmpriv, pmbuf);
+        pevent->event_id = MLAN_EVENT_ID_DRV_PASSTHRU;
+        break;
+    case EVENT_MICRO_AP_STA_DEAUTH:
+        PRINTM(MEVENT, "EVENT: MICRO_AP_STA_DEAUTH\n");
+        pevent->event_id = MLAN_EVENT_ID_UAP_FW_STA_DISCONNECT;
+        pevent->bss_index = pmpriv->bss_index;
+        pevent->event_len = pmbuf->data_len - 4;
+        /* skip event length field */
+        memcpy(pmadapter, (t_u8 *) pevent->event_buf,
+               pmbuf->pbuf + pmbuf->data_offset + 4, pevent->event_len);
+        wlan_recv_event(pmpriv, pevent->event_id, pevent);
+        memcpy(pmadapter, sta_addr, pmadapter->event_body + 2,
+               MLAN_MAC_ADDR_LENGTH);
+        if (pmpriv->is_11n_enabled) {
+            wlan_cleanup_reorder_tbl(pmpriv, sta_addr);
+            pmadapter->callbacks.moal_spin_lock(pmadapter->pmoal_handle,
+                                                pmpriv->wmm.ra_list_spinlock);
+            wlan_11n_cleanup_txbastream_tbl(pmpriv, sta_addr);
+            pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                                  pmpriv->wmm.ra_list_spinlock);
+        }
+        wlan_wmm_delete_peer_ralist(pmpriv, sta_addr);
+        wlan_delete_station_entry(pmpriv, sta_addr);
+        pevent->event_id = MLAN_EVENT_ID_DRV_PASSTHRU;
+        break;
+    case EVENT_HS_ACT_REQ:
+        PRINTM(MEVENT, "EVENT: HS_ACT_REQ\n");
+        ret =
+            wlan_prepare_cmd(pmpriv, HostCmd_CMD_802_11_HS_CFG_ENH, 0, 0, MNULL,
+                             MNULL);
+        break;
+    case EVENT_ADDBA:
+        PRINTM(MEVENT, "EVENT: ADDBA Request\n");
+        wlan_prepare_cmd(pmpriv, HostCmd_CMD_11N_ADDBA_RSP,
+                         HostCmd_ACT_GEN_SET, 0, MNULL, pmadapter->event_body);
+        break;
+    case EVENT_DELBA:
+        PRINTM(MEVENT, "EVENT: DELBA Request\n");
+        wlan_11n_delete_bastream(pmpriv, pmadapter->event_body);
+        break;
+    case EVENT_BA_STREAM_TIMEOUT:
+        PRINTM(MEVENT, "EVENT:  BA Stream timeout\n");
+        wlan_11n_ba_stream_timeout(pmpriv,
+                                   (HostCmd_DS_11N_BATIMEOUT *) pmadapter->
+                                   event_body);
+        break;
+    case EVENT_RXBA_SYNC:
+        PRINTM(MEVENT, "EVENT:  RXBA_SYNC\n");
+        wlan_11n_rxba_sync_event(pmpriv, pmadapter->event_body,
+                                 pmbuf->data_len - sizeof(eventcause));
+        break;
+    case EVENT_AMSDU_AGGR_CTRL:
+        PRINTM(MEVENT, "EVENT:  AMSDU_AGGR_CTRL %d\n",
+               *(t_u16 *) pmadapter->event_body);
+        pmadapter->tx_buf_size =
+            MIN(pmadapter->curr_tx_buf_size,
+                wlan_le16_to_cpu(*(t_u16 *) pmadapter->event_body));
+        PRINTM(MEVENT, "tx_buf_size %d\n", pmadapter->tx_buf_size);
+        break;
+    case EVENT_TX_DATA_PAUSE:
+        PRINTM(MEVENT, "EVENT: TX_DATA_PAUSE\n");
+        wlan_process_tx_pause_event(priv, pmbuf);
+        break;
+    default:
+        pevent->event_id = MLAN_EVENT_ID_DRV_PASSTHRU;
+        break;
+    }
+
+    if (pevent->event_id) {
+        pevent->bss_index = pmpriv->bss_index;
+        pevent->event_len = pmbuf->data_len;
+        memcpy(pmadapter, (t_u8 *) pevent->event_buf,
+               pmbuf->pbuf + pmbuf->data_offset, pevent->event_len);
+        wlan_recv_event(pmpriv, pevent->event_id, pevent);
+    }
+  done:
+    if (event_buf)
+        pcb->moal_mfree(pmadapter->pmoal_handle, event_buf);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief  This function issues commands to initialize firmware
+ *
+ *  @param priv     	A pointer to mlan_private structure
+ *  @param first_bss	flag for first BSS
+ *
+ *  @return		MLAN_STATUS_SUCCESS or MLAN_STATUS_PENDING or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_ops_uap_init_cmd(IN t_void * priv, IN t_u8 first_bss)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_private pmpriv = (pmlan_private) priv;
+    t_u16 last_cmd = 0;
+
+    ENTER();
+
+    if (first_bss) {
+        if (wlan_adapter_init_cmd(pmpriv->adapter) == MLAN_STATUS_FAILURE) {
+            ret = MLAN_STATUS_FAILURE;
+            goto done;
+        }
+    }
+
+    ret = wlan_prepare_cmd(pmpriv, HOST_CMD_APCMD_SYS_CONFIGURE,
+                           HostCmd_ACT_GEN_GET, 0, MNULL, MNULL);
+    if (ret) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+    last_cmd = HOST_CMD_APCMD_SYS_CONFIGURE;
+    /** set last_init_cmd */
+    if (last_cmd) {
+        pmpriv->adapter->last_init_cmd = last_cmd;
+        ret = MLAN_STATUS_PENDING;
+    }
+  done:
+    LEAVE();
+    return ret;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_uap.h linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_uap.h
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_uap.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_uap.h	2017-09-23 03:42:50.150674661 +0800
@@ -0,0 +1,89 @@
+/** @file mlan_uap.h
+ *
+ *  @brief This file contains related macros, enum, and struct
+ *  of uap functionalities
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2009 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/********************************************************
+Change log:
+    02/05/2009: initial version
+********************************************************/
+
+#ifndef _MLAN_UAP_H_
+#define _MLAN_UAP_H_
+
+#ifdef BIG_ENDIAN_SUPPORT
+/** Convert TxPD to little endian format from CPU format */
+#define uap_endian_convert_TxPD(x)                                          \
+    {                                                                   \
+        (x)->tx_pkt_length = wlan_cpu_to_le16((x)->tx_pkt_length);      \
+        (x)->tx_pkt_offset = wlan_cpu_to_le16((x)->tx_pkt_offset);      \
+        (x)->tx_pkt_type = wlan_cpu_to_le16((x)->tx_pkt_type);      \
+        (x)->tx_control = wlan_cpu_to_le32((x)->tx_control);      \
+    }
+
+/** Convert RxPD from little endian format to CPU format */
+#define uap_endian_convert_RxPD(x)                                          \
+    {                                                                   \
+        (x)->rx_pkt_length = wlan_le16_to_cpu((x)->rx_pkt_length);      \
+        (x)->rx_pkt_offset = wlan_le16_to_cpu((x)->rx_pkt_offset);      \
+        (x)->rx_pkt_type = wlan_le16_to_cpu((x)->rx_pkt_type);      \
+        (x)->seq_num = wlan_le16_to_cpu((x)->seq_num);              \
+    }
+#else
+/** Convert TxPD to little endian format from CPU format */
+#define uap_endian_convert_TxPD(x)  do {} while (0)
+/** Convert RxPD from little endian format to CPU format */
+#define uap_endian_convert_RxPD(x)  do {} while (0)
+#endif /* BIG_ENDIAN_SUPPORT */
+
+/** Band config 5GHz */
+#define UAP_BAND_CONFIG_5GHZ  0x01
+
+mlan_status wlan_ops_uap_ioctl(t_void * adapter, pmlan_ioctl_req pioctl_req);
+
+mlan_status wlan_ops_uap_prepare_cmd(IN t_void * priv,
+                                     IN t_u16 cmd_no,
+                                     IN t_u16 cmd_action,
+                                     IN t_u32 cmd_oid,
+                                     IN t_void * pioctl_buf,
+                                     IN t_void * pdata_buf,
+                                     IN t_void * pcmd_buf);
+
+mlan_status wlan_ops_uap_process_cmdresp(IN t_void * priv,
+                                         IN t_u16 cmdresp_no,
+                                         IN t_void * pcmd_buf,
+                                         IN t_void * pioctl);
+
+mlan_status wlan_ops_uap_process_rx_packet(IN t_void * adapter,
+                                           IN pmlan_buffer pmbuf);
+
+mlan_status wlan_ops_uap_process_event(IN t_void * priv);
+
+t_void *wlan_ops_uap_process_txpd(IN t_void * priv, IN pmlan_buffer pmbuf);
+
+mlan_status wlan_ops_uap_init_cmd(IN t_void * priv, IN t_u8 first_bss);
+
+#endif /* _MLAN_UAP_H_ */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_uap_ioctl.c linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_uap_ioctl.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_uap_ioctl.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_uap_ioctl.c	2017-09-23 03:42:50.150674661 +0800
@@ -0,0 +1,751 @@
+/** @file mlan_uap_ioctl.c
+ *
+ *  @brief This file contains the handling of AP mode ioctls 
+ * 
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ *
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2009 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/********************************************************
+Change log:
+    02/05/2009: initial version
+********************************************************/
+
+#include "mlan.h"
+#include "mlan_util.h"
+#include "mlan_fw.h"
+#ifdef STA_SUPPORT
+#include "mlan_join.h"
+#endif
+#include "mlan_main.h"
+#include "mlan_uap.h"
+#include "mlan_11n.h"
+#include "mlan_fw.h"
+#include "mlan_11h.h"
+
+/********************************************************
+                Global Variables
+********************************************************/
+extern t_u8 tos_to_tid_inv[];
+
+/********************************************************
+    Local Functions
+********************************************************/
+/** 
+ *  @brief Stop BSS
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_uap_bss_ioctl_stop(IN pmlan_adapter pmadapter,
+                        IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_private pmpriv = pmadapter->priv[pioctl_req->bss_index];
+
+    ENTER();
+
+    ret = wlan_prepare_cmd(pmpriv,
+                           HOST_CMD_APCMD_BSS_STOP,
+                           HostCmd_ACT_GEN_SET,
+                           0, (t_void *) pioctl_req, MNULL);
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Start BSS
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_uap_bss_ioctl_start(IN pmlan_adapter pmadapter,
+                         IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_private pmpriv = pmadapter->priv[pioctl_req->bss_index];
+
+    ENTER();
+
+    ret = wlan_prepare_cmd(pmpriv,
+                           HOST_CMD_APCMD_BSS_START,
+                           HostCmd_ACT_GEN_SET,
+                           0, (t_void *) pioctl_req, MNULL);
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief reset BSS
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_uap_bss_ioctl_reset(IN pmlan_adapter pmadapter,
+                         IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_private pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    t_u8 i = 0;
+
+    ENTER();
+
+    /* 
+     * Reset any uap private parameters here
+     */
+    for (i = 0; i < pmadapter->max_mgmt_ie_index; i++) {
+        memset(pmadapter, &pmpriv->mgmt_ie[i], 0, sizeof(custom_ie));
+    }
+    pmpriv->add_ba_param.timeout = MLAN_DEFAULT_BLOCK_ACK_TIMEOUT;
+    pmpriv->add_ba_param.tx_win_size = MLAN_AMPDU_DEF_TXWINSIZE;
+    pmpriv->add_ba_param.rx_win_size = MLAN_AMPDU_DEF_RXWINSIZE;
+    for (i = 0; i < MAX_NUM_TID; i++) {
+        pmpriv->aggr_prio_tbl[i].ampdu_user = tos_to_tid_inv[i];
+        pmpriv->aggr_prio_tbl[i].amsdu = BA_STREAM_NOT_ALLOWED;
+        pmpriv->addba_reject[i] = ADDBA_RSP_STATUS_ACCEPT;
+    }
+
+    /* hs_configured, hs_activated are reset by main loop */
+    pmadapter->hs_cfg.conditions = HOST_SLEEP_DEF_COND;
+    pmadapter->hs_cfg.gpio = HOST_SLEEP_DEF_GPIO;
+    pmadapter->hs_cfg.gap = HOST_SLEEP_DEF_GAP;
+
+    ret = wlan_prepare_cmd(pmpriv,
+                           HOST_CMD_APCMD_SYS_RESET,
+                           HostCmd_ACT_GEN_SET,
+                           0, (t_void *) pioctl_req, MNULL);
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get MAC address
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_uap_bss_ioctl_mac_address(IN pmlan_adapter pmadapter,
+                               IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_bss *bss = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    t_u16 cmd_action = 0;
+
+    ENTER();
+
+    bss = (mlan_ds_bss *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_SET) {
+        memcpy(pmadapter, pmpriv->curr_addr, &bss->param.mac_addr,
+               MLAN_MAC_ADDR_LENGTH);
+        cmd_action = HostCmd_ACT_GEN_SET;
+    } else
+        cmd_action = HostCmd_ACT_GEN_GET;
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv, HOST_CMD_APCMD_SYS_CONFIGURE,
+                           cmd_action, 0, (t_void *) pioctl_req, MNULL);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Get Uap statistics
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_uap_get_stats(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_private pmpriv = pmadapter->priv[pioctl_req->bss_index];
+
+    ENTER();
+
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_802_11_SNMP_MIB,
+                           HostCmd_ACT_GEN_GET,
+                           0, (t_void *) pioctl_req, MNULL);
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get AP config
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_uap_bss_ioctl_config(IN pmlan_adapter pmadapter,
+                          IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    t_u16 cmd_action = 0;
+
+    ENTER();
+
+    if (pioctl_req->action == MLAN_ACT_SET)
+        cmd_action = HostCmd_ACT_GEN_SET;
+    else
+        cmd_action = HostCmd_ACT_GEN_GET;
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv, HOST_CMD_APCMD_SYS_CONFIGURE,
+                           cmd_action, 0, (t_void *) pioctl_req, MNULL);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief deauth sta
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_uap_bss_ioctl_deauth_sta(IN pmlan_adapter pmadapter,
+                              IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_private pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_bss *bss = MNULL;
+
+    ENTER();
+
+    bss = (mlan_ds_bss *) pioctl_req->pbuf;
+    ret = wlan_prepare_cmd(pmpriv,
+                           HOST_CMD_APCMD_STA_DEAUTH,
+                           HostCmd_ACT_GEN_SET,
+                           0,
+                           (t_void *) pioctl_req,
+                           (t_void *) & bss->param.deauth_param);
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Get station list 
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_uap_get_sta_list(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    pmlan_private pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HOST_CMD_APCMD_STA_LIST,
+                           HostCmd_ACT_GEN_GET,
+                           0, (t_void *) pioctl_req, MNULL);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief soft_reset
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_uap_misc_ioctl_soft_reset(IN pmlan_adapter pmadapter,
+                               IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_SOFT_RESET,
+                           HostCmd_ACT_GEN_SET,
+                           0, (t_void *) pioctl_req, MNULL);
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Tx data pause
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_uap_misc_ioctl_txdatapause(IN pmlan_adapter pmadapter,
+                                IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_misc_cfg *pmisc = (mlan_ds_misc_cfg *) pioctl_req->pbuf;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    t_u16 cmd_action = 0;
+
+    ENTER();
+
+    if (pioctl_req->action == MLAN_ACT_SET)
+        cmd_action = HostCmd_ACT_GEN_SET;
+    else
+        cmd_action = HostCmd_ACT_GEN_GET;
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_CFG_TX_DATA_PAUSE,
+                           cmd_action,
+                           0,
+                           (t_void *) pioctl_req, &(pmisc->param.tx_datapause));
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get Power mode
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_uap_pm_ioctl_mode(IN pmlan_adapter pmadapter,
+                       IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_pm_cfg *pm = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    t_u16 cmd_action = 0;
+    t_u32 cmd_oid = 0;
+
+    ENTER();
+
+    pm = (mlan_ds_pm_cfg *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_SET) {
+        if (pm->param.ps_mgmt.ps_mode == PS_MODE_INACTIVITY) {
+            cmd_action = EN_AUTO_PS;
+            cmd_oid = BITMAP_UAP_INACT_PS;
+        } else if (pm->param.ps_mgmt.ps_mode == PS_MODE_PERIODIC_DTIM) {
+            cmd_action = EN_AUTO_PS;
+            cmd_oid = BITMAP_UAP_DTIM_PS;
+        } else {
+            cmd_action = DIS_AUTO_PS;
+            cmd_oid = BITMAP_UAP_INACT_PS | BITMAP_UAP_DTIM_PS;
+        }
+    } else {
+        cmd_action = GET_PS;
+        cmd_oid = BITMAP_UAP_INACT_PS | BITMAP_UAP_DTIM_PS;
+    }
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_802_11_PS_MODE_ENH,
+                           cmd_action, cmd_oid, (t_void *) pioctl_req,
+                           (t_void *) & pm->param.ps_mgmt);
+    if ((ret == MLAN_STATUS_SUCCESS) &&
+        (pioctl_req->action == MLAN_ACT_SET) && (cmd_action == DIS_AUTO_PS)) {
+        ret = wlan_prepare_cmd(pmpriv,
+                               HostCmd_CMD_802_11_PS_MODE_ENH, GET_PS,
+                               0, MNULL, MNULL);
+    }
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set WAPI IE   
+ *
+ *  @param priv         A pointer to mlan_private structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return             MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_uap_set_wapi_ie(mlan_private * priv, pmlan_ioctl_req pioctl_req)
+{
+    mlan_ds_misc_cfg *misc = MNULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+    misc = (mlan_ds_misc_cfg *) pioctl_req->pbuf;
+    if (misc->param.gen_ie.len) {
+        if (misc->param.gen_ie.len > sizeof(priv->wapi_ie)) {
+            PRINTM(MWARN, "failed to copy WAPI IE, too big \n");
+            pioctl_req->status_code = MLAN_ERROR_INVALID_PARAMETER;
+            LEAVE();
+            return MLAN_STATUS_FAILURE;
+        }
+        memcpy(priv->adapter, priv->wapi_ie, misc->param.gen_ie.ie_data,
+               misc->param.gen_ie.len);
+        priv->wapi_ie_len = misc->param.gen_ie.len;
+        PRINTM(MIOCTL, "Set wapi_ie_len=%d IE=%#x\n", priv->wapi_ie_len,
+               priv->wapi_ie[0]);
+        DBG_HEXDUMP(MCMD_D, "wapi_ie", priv->wapi_ie, priv->wapi_ie_len);
+        if (priv->wapi_ie[0] == WAPI_IE)
+            priv->sec_info.wapi_enabled = MTRUE;
+    } else {
+        memset(priv->adapter, priv->wapi_ie, 0, sizeof(priv->wapi_ie));
+        priv->wapi_ie_len = misc->param.gen_ie.len;
+        PRINTM(MINFO, "Reset wapi_ie_len=%d IE=%#x\n", priv->wapi_ie_len,
+               priv->wapi_ie[0]);
+        priv->sec_info.wapi_enabled = MFALSE;
+    }
+
+    /* Send request to firmware */
+    ret = wlan_prepare_cmd(priv, HOST_CMD_APCMD_SYS_CONFIGURE,
+                           HostCmd_ACT_GEN_SET, 0, (t_void *) pioctl_req,
+                           MNULL);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set generic IE
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_uap_misc_ioctl_gen_ie(IN pmlan_adapter pmadapter,
+                           IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_misc_cfg *misc = MNULL;
+    IEEEtypes_VendorHeader_t *pvendor_ie = MNULL;
+
+    misc = (mlan_ds_misc_cfg *) pioctl_req->pbuf;
+
+    if ((misc->param.gen_ie.type == MLAN_IE_TYPE_GEN_IE) &&
+        (pioctl_req->action == MLAN_ACT_SET)) {
+        if (misc->param.gen_ie.len) {
+            pvendor_ie =
+                (IEEEtypes_VendorHeader_t *) misc->param.gen_ie.ie_data;
+            if (pvendor_ie->element_id == WAPI_IE) {
+                /* IE is a WAPI IE so call set_wapi function */
+                ret = wlan_uap_set_wapi_ie(pmpriv, pioctl_req);
+            }
+        } else {
+            /* clear WAPI IE */
+            ret = wlan_uap_set_wapi_ie(pmpriv, pioctl_req);
+        }
+    }
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get WAPI status
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success
+ */
+static mlan_status
+wlan_uap_sec_ioctl_wapi_enable(IN pmlan_adapter pmadapter,
+                               IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_sec_cfg *sec = MNULL;
+    ENTER();
+    sec = (mlan_ds_sec_cfg *) pioctl_req->pbuf;
+    if (pioctl_req->action == MLAN_ACT_GET) {
+        if (pmpriv->wapi_ie_len)
+            sec->param.wapi_enabled = MTRUE;
+        else
+            sec->param.wapi_enabled = MFALSE;
+    } else {
+        if (sec->param.wapi_enabled == MFALSE) {
+            memset(pmpriv->adapter, pmpriv->wapi_ie, 0,
+                   sizeof(pmpriv->wapi_ie));
+            pmpriv->wapi_ie_len = 0;
+            PRINTM(MINFO, "Reset wapi_ie_len=%d IE=%#x\n", pmpriv->wapi_ie_len,
+                   pmpriv->wapi_ie[0]);
+            pmpriv->sec_info.wapi_enabled = MFALSE;
+        }
+    }
+    pioctl_req->data_read_written = sizeof(t_u32) + MLAN_SUB_COMMAND_SIZE;
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set encrypt key
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING --success, otherwise fail
+ */
+static mlan_status
+wlan_uap_sec_ioctl_set_encrypt_key(IN pmlan_adapter pmadapter,
+                                   IN pmlan_ioctl_req pioctl_req)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_ds_sec_cfg *sec = MNULL;
+
+    ENTER();
+    sec = (mlan_ds_sec_cfg *) pioctl_req->pbuf;
+    if (pioctl_req->action != MLAN_ACT_SET) {
+        pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+    ret = wlan_prepare_cmd(pmpriv,
+                           HostCmd_CMD_802_11_KEY_MATERIAL,
+                           HostCmd_ACT_GEN_SET,
+                           KEY_INFO_ENABLED,
+                           (t_void *) pioctl_req, &sec->param.encrypt_key);
+
+    if (ret == MLAN_STATUS_SUCCESS)
+        ret = MLAN_STATUS_PENDING;
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Get BSS information
+ *
+ *  @param pmadapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success
+ */
+static mlan_status
+wlan_uap_get_bss_info(IN pmlan_adapter pmadapter, IN pmlan_ioctl_req pioctl_req)
+{
+    pmlan_private pmpriv = pmadapter->priv[pioctl_req->bss_index];
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ds_get_info *info;
+
+    ENTER();
+
+    info = (mlan_ds_get_info *) pioctl_req->pbuf;
+    /* Connection status */
+    info->param.bss_info.media_connected = pmpriv->media_connected;
+
+    /* Radio status */
+    info->param.bss_info.radio_on = pmadapter->radio_on;
+
+    /* BSSID */
+    memcpy(pmadapter, &info->param.bss_info.bssid, pmpriv->curr_addr,
+           MLAN_MAC_ADDR_LENGTH);
+    info->param.bss_info.is_hs_configured = pmadapter->is_hs_configured;
+    pioctl_req->data_read_written =
+        sizeof(mlan_bss_info) + MLAN_SUB_COMMAND_SIZE;
+
+    LEAVE();
+    return ret;
+}
+
+/********************************************************
+    Global Functions
+********************************************************/
+
+/** 
+ *  @brief MLAN uap ioctl handler
+ *
+ *  @param adapter	A pointer to mlan_adapter structure
+ *  @param pioctl_req	A pointer to ioctl request buffer
+ *
+ *  @return		MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+mlan_status
+wlan_ops_uap_ioctl(t_void * adapter, pmlan_ioctl_req pioctl_req)
+{
+    pmlan_adapter pmadapter = (pmlan_adapter) adapter;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    mlan_ds_bss *bss = MNULL;
+    mlan_ds_get_info *pget_info = MNULL;
+    mlan_ds_misc_cfg *misc = MNULL;
+    mlan_ds_sec_cfg *sec = MNULL;
+    mlan_ds_pm_cfg *pm = MNULL;
+    mlan_ds_radio_cfg *radiocfg = MNULL;
+    mlan_ds_rate *rate = MNULL;
+    mlan_private *pmpriv = pmadapter->priv[pioctl_req->bss_index];
+
+    ENTER();
+
+    switch (pioctl_req->req_id) {
+    case MLAN_IOCTL_BSS:
+        bss = (mlan_ds_bss *) pioctl_req->pbuf;
+        if (bss->sub_command == MLAN_OID_BSS_MAC_ADDR)
+            status = wlan_uap_bss_ioctl_mac_address(pmadapter, pioctl_req);
+        else if (bss->sub_command == MLAN_OID_BSS_STOP)
+            status = wlan_uap_bss_ioctl_stop(pmadapter, pioctl_req);
+        else if (bss->sub_command == MLAN_OID_BSS_START)
+            status = wlan_uap_bss_ioctl_start(pmadapter, pioctl_req);
+        else if (bss->sub_command == MLAN_OID_UAP_BSS_CONFIG)
+            status = wlan_uap_bss_ioctl_config(pmadapter, pioctl_req);
+        else if (bss->sub_command == MLAN_OID_UAP_DEAUTH_STA)
+            status = wlan_uap_bss_ioctl_deauth_sta(pmadapter, pioctl_req);
+        else if (bss->sub_command == MLAN_OID_UAP_BSS_RESET)
+            status = wlan_uap_bss_ioctl_reset(pmadapter, pioctl_req);
+#if defined(STA_SUPPORT) && defined(UAP_SUPPORT)
+        else if (bss->sub_command == MLAN_OID_BSS_ROLE)
+            status = wlan_bss_ioctl_bss_role(pmadapter, pioctl_req);
+#endif
+        break;
+    case MLAN_IOCTL_GET_INFO:
+        pget_info = (mlan_ds_get_info *) pioctl_req->pbuf;
+        if (pget_info->sub_command == MLAN_OID_GET_VER_EXT)
+            status = wlan_get_info_ver_ext(pmadapter, pioctl_req);
+        else if (pget_info->sub_command == MLAN_OID_GET_DEBUG_INFO)
+            status = wlan_get_info_debug_info(pmadapter, pioctl_req);
+        else if (pget_info->sub_command == MLAN_OID_GET_STATS)
+            status = wlan_uap_get_stats(pmadapter, pioctl_req);
+        else if (pget_info->sub_command == MLAN_OID_UAP_STA_LIST)
+            status = wlan_uap_get_sta_list(pmadapter, pioctl_req);
+        else if (pget_info->sub_command == MLAN_OID_GET_BSS_INFO)
+            status = wlan_uap_get_bss_info(pmadapter, pioctl_req);
+        else if (pget_info->sub_command == MLAN_OID_GET_FW_INFO) {
+            pioctl_req->data_read_written =
+                sizeof(mlan_fw_info) + MLAN_SUB_COMMAND_SIZE;
+            memcpy(pmadapter, &pget_info->param.fw_info.mac_addr,
+                   pmpriv->curr_addr, MLAN_MAC_ADDR_LENGTH);
+            pget_info->param.fw_info.fw_ver = pmadapter->fw_release_number;
+            pget_info->param.fw_info.hw_dev_mcs_support =
+                pmadapter->hw_dev_mcs_support;
+        }
+        break;
+    case MLAN_IOCTL_MISC_CFG:
+        misc = (mlan_ds_misc_cfg *) pioctl_req->pbuf;
+        if (misc->sub_command == MLAN_OID_MISC_INIT_SHUTDOWN)
+            status = wlan_misc_ioctl_init_shutdown(pmadapter, pioctl_req);
+        if (misc->sub_command == MLAN_OID_MISC_SOFT_RESET)
+            status = wlan_uap_misc_ioctl_soft_reset(pmadapter, pioctl_req);
+        if (misc->sub_command == MLAN_OID_MISC_HOST_CMD)
+            status = wlan_misc_ioctl_host_cmd(pmadapter, pioctl_req);
+        if (misc->sub_command == MLAN_OID_MISC_GEN_IE)
+            status = wlan_uap_misc_ioctl_gen_ie(pmadapter, pioctl_req);
+        if (misc->sub_command == MLAN_OID_MISC_CUSTOM_IE)
+            status =
+                wlan_misc_ioctl_custom_ie_list(pmadapter, pioctl_req, MTRUE);
+        if (misc->sub_command == MLAN_OID_MISC_TX_DATAPAUSE)
+            status = wlan_uap_misc_ioctl_txdatapause(pmadapter, pioctl_req);
+        break;
+    case MLAN_IOCTL_PM_CFG:
+        pm = (mlan_ds_pm_cfg *) pioctl_req->pbuf;
+        if (pm->sub_command == MLAN_OID_PM_CFG_PS_MODE)
+            status = wlan_uap_pm_ioctl_mode(pmadapter, pioctl_req);
+        if (pm->sub_command == MLAN_OID_PM_CFG_HS_CFG) {
+            status = wlan_pm_ioctl_hscfg(pmadapter, pioctl_req);
+        }
+        if (pm->sub_command == MLAN_OID_PM_INFO) {
+            status = wlan_get_pm_info(pmadapter, pioctl_req);
+        }
+        break;
+    case MLAN_IOCTL_SEC_CFG:
+        sec = (mlan_ds_sec_cfg *) pioctl_req->pbuf;
+        if (sec->sub_command == MLAN_OID_SEC_CFG_ENCRYPT_KEY)
+            status = wlan_uap_sec_ioctl_set_encrypt_key(pmadapter, pioctl_req);
+        if (sec->sub_command == MLAN_OID_SEC_CFG_WAPI_ENABLED)
+            status = wlan_uap_sec_ioctl_wapi_enable(pmadapter, pioctl_req);
+        break;
+    case MLAN_IOCTL_11N_CFG:
+        status = wlan_11n_cfg_ioctl(pmadapter, pioctl_req);
+        break;
+    case MLAN_IOCTL_RADIO_CFG:
+        radiocfg = (mlan_ds_radio_cfg *) pioctl_req->pbuf;
+        if (radiocfg->sub_command == MLAN_OID_RADIO_CTRL)
+            status = wlan_radio_ioctl_radio_ctl(pmadapter, pioctl_req);
+        break;
+    case MLAN_IOCTL_RATE:
+        rate = (mlan_ds_rate *) pioctl_req->pbuf;
+        if (rate->sub_command == MLAN_OID_RATE_CFG)
+            status = wlan_rate_ioctl_cfg(pmadapter, pioctl_req);
+        break;
+    default:
+        pioctl_req->status_code = MLAN_ERROR_IOCTL_INVALID;
+        break;
+    }
+    LEAVE();
+    return status;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_uap_txrx.c linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_uap_txrx.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_uap_txrx.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_uap_txrx.c	2017-09-23 03:42:50.150674661 +0800
@@ -0,0 +1,484 @@
+/** @file mlan_uap_txrx.c
+ *
+ *  @brief This file contains AP mode transmit and receive functions
+ * 
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ *
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2009 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/********************************************************
+Change log:
+    02/05/2009: initial version
+********************************************************/
+
+#include "mlan.h"
+#include "mlan_util.h"
+#include "mlan_fw.h"
+#ifdef STA_SUPPORT
+#include "mlan_join.h"
+#endif
+#include "mlan_main.h"
+#include "mlan_uap.h"
+#include "mlan_wmm.h"
+#include "mlan_11n_aggr.h"
+#include "mlan_11n_rxreorder.h"
+
+/********************************************************
+                Local Functions
+********************************************************/
+
+/**
+ *  @brief This function processes received packet and forwards it
+ *  		to kernel/upper layer
+ *  
+ *  @param pmadapter A pointer to mlan_adapter
+ *  @param pmbuf     A pointer to mlan_buffer which includes the received packet
+ *
+ *  @return 	   MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_upload_uap_rx_packet(pmlan_adapter pmadapter, pmlan_buffer pmbuf)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    UapRxPD *prx_pd;
+    ENTER();
+    prx_pd = (UapRxPD *) (pmbuf->pbuf + pmbuf->data_offset);
+
+    /* Chop off RxPD */
+    pmbuf->data_len -= prx_pd->rx_pkt_offset;
+    pmbuf->data_offset += prx_pd->rx_pkt_offset;
+    pmbuf->pparent = MNULL;
+
+    DBG_HEXDUMP(MDAT_D, "uAP RxPD", (t_u8 *) prx_pd,
+                MIN(sizeof(UapRxPD), MAX_DATA_DUMP_LEN));
+    DBG_HEXDUMP(MDAT_D, "uAP Rx Payload",
+                ((t_u8 *) prx_pd + prx_pd->rx_pkt_offset),
+                MIN(prx_pd->rx_pkt_length, MAX_DATA_DUMP_LEN));
+
+    pmadapter->callbacks.moal_get_system_time(pmadapter->pmoal_handle,
+                                              &pmbuf->out_ts_sec,
+                                              &pmbuf->out_ts_usec);
+    PRINTM(MDATA, "%lu.%06lu : Data => kernel seq_num=%d tid=%d\n",
+           pmbuf->out_ts_sec, pmbuf->out_ts_usec, prx_pd->seq_num,
+           prx_pd->priority);
+    ret = pmadapter->callbacks.moal_recv_packet(pmadapter->pmoal_handle, pmbuf);
+    if (ret == MLAN_STATUS_FAILURE) {
+        PRINTM(MERROR, "uAP Rx Error: moal_recv_packet returned error\n");
+        pmbuf->status_code = MLAN_ERROR_PKT_INVALID;
+    }
+
+    if (ret != MLAN_STATUS_PENDING) {
+        pmadapter->callbacks.moal_recv_complete(pmadapter->pmoal_handle, pmbuf,
+                                                MLAN_USB_EP_DATA, ret);
+    }
+    LEAVE();
+
+    return ret;
+
+}
+
+/********************************************************
+    Global Functions
+********************************************************/
+/** 
+ *  @brief This function fill the txpd for tx packet  
+ *  
+ *  @param priv	   A pointer to mlan_private structure
+ *  @param pmbuf   A pointer to the mlan_buffer for process
+ *
+ *  @return 	   headptr or MNULL
+ */
+t_void *
+wlan_ops_uap_process_txpd(IN t_void * priv, IN pmlan_buffer pmbuf)
+{
+    pmlan_private pmpriv = (pmlan_private) priv;
+    UapTxPD *plocal_tx_pd;
+    t_u8 *head_ptr = MNULL;
+    ENTER();
+
+    if (!pmbuf->data_len) {
+        PRINTM(MERROR, "uAP Tx Error: Invalid packet length: %d\n",
+               pmbuf->data_len);
+        pmbuf->status_code = MLAN_ERROR_PKT_SIZE_INVALID;
+        goto done;
+    }
+    if (pmbuf->data_offset < (sizeof(UapTxPD) + INTF_HEADER_LEN +
+                              DMA_ALIGNMENT)) {
+        PRINTM(MERROR, "not enough space for UapTxPD: len=%d, offset=%d\n",
+               pmbuf->data_len, pmbuf->data_offset);
+        DBG_HEXDUMP(MDAT_D, "drop pkt", pmbuf->pbuf + pmbuf->data_offset,
+                    pmbuf->data_len);
+        pmbuf->status_code = MLAN_ERROR_PKT_SIZE_INVALID;
+        goto done;
+    }
+
+    /* head_ptr should be aligned */
+    head_ptr =
+        pmbuf->pbuf + pmbuf->data_offset - sizeof(UapTxPD) - INTF_HEADER_LEN;
+    head_ptr = (t_u8 *) ((t_u32) head_ptr & ~((t_u32) (DMA_ALIGNMENT - 1)));
+
+    plocal_tx_pd = (UapTxPD *) (head_ptr + INTF_HEADER_LEN);
+    memset(pmpriv->adapter, plocal_tx_pd, 0, sizeof(UapTxPD));
+
+    /* Set the BSS number to TxPD */
+    plocal_tx_pd->bss_num = GET_BSS_NUM(pmpriv);
+    plocal_tx_pd->bss_type = pmpriv->bss_type;
+
+    plocal_tx_pd->tx_pkt_length = (t_u16) pmbuf->data_len;
+
+    plocal_tx_pd->priority = (t_u8) pmbuf->priority;
+    plocal_tx_pd->pkt_delay_2ms =
+        wlan_wmm_compute_driver_packet_delay(pmpriv, pmbuf);
+
+    if (plocal_tx_pd->priority < NELEMENTS(pmpriv->wmm.user_pri_pkt_tx_ctrl))
+        /* 
+         * Set the priority specific tx_control field, setting of 0 will
+         *   cause the default value to be used later in this function
+         */
+        plocal_tx_pd->tx_control
+            = pmpriv->wmm.user_pri_pkt_tx_ctrl[plocal_tx_pd->priority];
+
+    /* Offset of actual data */
+    plocal_tx_pd->tx_pkt_offset =
+        (t_u16) ((t_u32) pmbuf->pbuf + pmbuf->data_offset -
+                 (t_u32) plocal_tx_pd);
+
+    uap_endian_convert_TxPD(plocal_tx_pd);
+
+    /* Adjust the data offset and length to include TxPD in pmbuf */
+    pmbuf->data_len += pmbuf->data_offset;
+    pmbuf->data_offset = (t_u32) ((t_ptr) head_ptr - (t_ptr) pmbuf->pbuf);
+    pmbuf->data_len -= pmbuf->data_offset;
+
+  done:
+    LEAVE();
+    return head_ptr;
+}
+
+/**
+ *  @brief This function processes received packet and forwards it
+ *  		to kernel/upper layer
+ *  
+ *  @param adapter   A pointer to mlan_adapter
+ *  @param pmbuf     A pointer to mlan_buffer which includes the received packet
+ *
+ *  @return 	   MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_ops_uap_process_rx_packet(IN t_void * adapter, IN pmlan_buffer pmbuf)
+{
+    pmlan_adapter pmadapter = (pmlan_adapter) adapter;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    UapRxPD *prx_pd;
+    wlan_mgmt_pkt *puap_pkt_hdr = MNULL;
+
+    RxPacketHdr_t *prx_pkt;
+    pmlan_private priv = pmadapter->priv[pmbuf->bss_index];
+    t_u8 ta[MLAN_MAC_ADDR_LENGTH];
+    t_u16 rx_pkt_type = 0;
+    sta_node *sta_ptr = MNULL;
+
+    ENTER();
+
+    prx_pd = (UapRxPD *) (pmbuf->pbuf + pmbuf->data_offset);
+    /* Endian conversion */
+    uap_endian_convert_RxPD(prx_pd);
+    rx_pkt_type = prx_pd->rx_pkt_type;
+    prx_pkt = (RxPacketHdr_t *) ((t_u8 *) prx_pd + prx_pd->rx_pkt_offset);
+
+    PRINTM(MINFO, "RX Data: data_len - prx_pd->rx_pkt_offset = %d - %d = %d\n",
+           pmbuf->data_len, prx_pd->rx_pkt_offset,
+           pmbuf->data_len - prx_pd->rx_pkt_offset);
+
+    if ((prx_pd->rx_pkt_offset + prx_pd->rx_pkt_length) >
+        (t_u16) pmbuf->data_len) {
+        PRINTM(MERROR,
+               "Wrong rx packet: len=%d,rx_pkt_offset=%d,"
+               " rx_pkt_length=%d\n", pmbuf->data_len, prx_pd->rx_pkt_offset,
+               prx_pd->rx_pkt_length);
+        pmbuf->status_code = MLAN_ERROR_PKT_SIZE_INVALID;
+        ret = MLAN_STATUS_FAILURE;
+        pmadapter->callbacks.moal_recv_complete(pmadapter->pmoal_handle,
+                                                pmbuf, MLAN_USB_EP_DATA, ret);
+        goto done;
+    }
+    pmbuf->data_len = prx_pd->rx_pkt_offset + prx_pd->rx_pkt_length;
+
+    if (pmadapter->priv[pmbuf->bss_index]->mgmt_frame_passthru_mask &&
+        prx_pd->rx_pkt_type == PKT_TYPE_MGMT_FRAME) {
+        /* Check if this is mgmt packet and needs to forwarded to app as an
+           event */
+        puap_pkt_hdr =
+            (wlan_mgmt_pkt *) ((t_u8 *) prx_pd + prx_pd->rx_pkt_offset);
+        puap_pkt_hdr->frm_len = wlan_le16_to_cpu(puap_pkt_hdr->frm_len);
+        if ((puap_pkt_hdr->wlan_header.
+             frm_ctl & IEEE80211_FC_MGMT_FRAME_TYPE_MASK) == 0)
+            wlan_process_802dot11_mgmt_pkt(pmadapter->priv[pmbuf->bss_index],
+                                           (t_u8 *) & puap_pkt_hdr->wlan_header,
+                                           puap_pkt_hdr->frm_len +
+                                           sizeof(wlan_mgmt_pkt) -
+                                           sizeof(puap_pkt_hdr->frm_len));
+    }
+
+    pmbuf->priority = prx_pd->priority;
+    if (prx_pd->rx_pkt_type == PKT_TYPE_AMSDU) {
+        pmbuf->data_len = prx_pd->rx_pkt_length;
+        pmbuf->data_offset += prx_pd->rx_pkt_offset;
+        wlan_11n_deaggregate_pkt(priv, pmbuf);
+        goto done;
+    }
+    memcpy(pmadapter, ta, prx_pkt->eth803_hdr.src_addr, MLAN_MAC_ADDR_LENGTH);
+    if ((rx_pkt_type != PKT_TYPE_BAR) && (prx_pd->priority < MAX_NUM_TID)) {
+        if ((sta_ptr = wlan_get_station_entry(priv, ta)))
+            sta_ptr->rx_seq[prx_pd->priority] = prx_pd->seq_num;
+    }
+    /* check if UAP enable 11n */
+    if (!priv->is_11n_enabled ||
+        !wlan_11n_get_rxreorder_tbl((mlan_private *) priv, prx_pd->priority,
+                                    ta)) {
+        if (priv->pkt_fwd)
+            wlan_process_uap_rx_packet(priv, pmbuf);
+        else
+            wlan_upload_uap_rx_packet(pmadapter, pmbuf);
+        goto done;
+    }
+    /* Reorder and send to OS */
+    if ((ret = mlan_11n_rxreorder_pkt(priv, prx_pd->seq_num,
+                                      prx_pd->priority, ta,
+                                      (t_u8) prx_pd->rx_pkt_type,
+                                      (void *) pmbuf))
+        || (rx_pkt_type == PKT_TYPE_BAR)) {
+        if ((ret =
+             pmadapter->callbacks.moal_recv_complete(pmadapter->pmoal_handle,
+                                                     pmbuf, MLAN_USB_EP_DATA,
+                                                     ret)))
+            PRINTM(MERROR, "uAP Rx Error: moal_recv_complete returned error\n");
+    }
+  done:
+    if (priv->is_11n_enabled &&
+        (pmadapter->pending_bridge_pkts >= RX_MED_THRESHOLD))
+        wlan_send_delba_to_all_in_reorder_tbl(priv);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function processes received packet and forwards it
+ *  		to kernel/upper layer or send back to firmware 
+ *  
+ *  @param priv      A pointer to mlan_private
+ *  @param pmbuf     A pointer to mlan_buffer which includes the received packet
+ *
+ *  @return 	   MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_uap_recv_packet(IN mlan_private * priv, IN pmlan_buffer pmbuf)
+{
+    pmlan_adapter pmadapter = priv->adapter;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    RxPacketHdr_t *prx_pkt;
+    pmlan_buffer newbuf = MNULL;
+
+    ENTER();
+
+    prx_pkt = (RxPacketHdr_t *) ((t_u8 *) pmbuf->pbuf + pmbuf->data_offset);
+
+    DBG_HEXDUMP(MDAT_D, "uap_recv_packet", pmbuf->pbuf + pmbuf->data_offset,
+                MIN(pmbuf->data_len, MAX_DATA_DUMP_LEN));
+
+    PRINTM(MDATA, "AMSDU dest %02x:%02x:%02x:%02x:%02x:%02x\n",
+           prx_pkt->eth803_hdr.dest_addr[0], prx_pkt->eth803_hdr.dest_addr[1],
+           prx_pkt->eth803_hdr.dest_addr[2], prx_pkt->eth803_hdr.dest_addr[3],
+           prx_pkt->eth803_hdr.dest_addr[4], prx_pkt->eth803_hdr.dest_addr[5]);
+
+    /* don't do packet forwarding in disconnected state */
+    if ((priv->media_connected == MFALSE) ||
+        (pmbuf->data_len > MV_ETH_FRAME_LEN))
+        goto upload;
+
+    if (prx_pkt->eth803_hdr.dest_addr[0] & 0x01) {
+        /* Multicast pkt */
+        if ((newbuf =
+             wlan_alloc_mlan_buffer(pmadapter, MLAN_TX_DATA_BUF_SIZE_2K, 0,
+                                    MTRUE))) {
+            newbuf->bss_index = pmbuf->bss_index;
+            newbuf->buf_type = pmbuf->buf_type;
+            newbuf->priority = pmbuf->priority;
+            newbuf->in_ts_sec = pmbuf->in_ts_sec;
+            newbuf->in_ts_usec = pmbuf->in_ts_usec;
+            newbuf->data_offset =
+                (sizeof(UapTxPD) + INTF_HEADER_LEN + DMA_ALIGNMENT);
+            pmadapter->pending_bridge_pkts++;
+            newbuf->flags |= MLAN_BUF_FLAG_BRIDGE_BUF;
+
+            /* copy the data */
+            memcpy(pmadapter, (t_u8 *) newbuf->pbuf + newbuf->data_offset,
+                   pmbuf->pbuf + pmbuf->data_offset, pmbuf->data_len);
+            newbuf->data_len = pmbuf->data_len;
+            wlan_wmm_add_buf_txqueue(pmadapter, newbuf);
+            if (pmadapter->pending_bridge_pkts > RX_HIGH_THRESHOLD)
+                wlan_drop_tx_pkts(priv);
+        }
+    } else {
+        if (wlan_get_station_entry(priv, prx_pkt->eth803_hdr.dest_addr)) {
+            /* Intra BSS packet */
+            if ((newbuf =
+                 wlan_alloc_mlan_buffer(pmadapter, MLAN_TX_DATA_BUF_SIZE_2K, 0,
+                                        MTRUE))) {
+                newbuf->bss_index = pmbuf->bss_index;
+                newbuf->buf_type = pmbuf->buf_type;
+                newbuf->priority = pmbuf->priority;
+                newbuf->in_ts_sec = pmbuf->in_ts_sec;
+                newbuf->in_ts_usec = pmbuf->in_ts_usec;
+                newbuf->data_offset =
+                    (sizeof(UapTxPD) + INTF_HEADER_LEN + DMA_ALIGNMENT);
+                pmadapter->pending_bridge_pkts++;
+                newbuf->flags |= MLAN_BUF_FLAG_BRIDGE_BUF;
+
+                /* copy the data */
+                memcpy(pmadapter, (t_u8 *) newbuf->pbuf + newbuf->data_offset,
+                       pmbuf->pbuf + pmbuf->data_offset, pmbuf->data_len);
+                newbuf->data_len = pmbuf->data_len;
+                wlan_wmm_add_buf_txqueue(pmadapter, newbuf);
+                if (pmadapter->pending_bridge_pkts > RX_HIGH_THRESHOLD)
+                    wlan_drop_tx_pkts(priv);
+            }
+            goto done;
+        }
+    }
+  upload:
+    /** send packet to moal */
+    ret = pmadapter->callbacks.moal_recv_packet(pmadapter->pmoal_handle, pmbuf);
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function processes received packet and forwards it
+ *  		to kernel/upper layer or send back to firmware 
+ *  
+ *  @param priv      A pointer to mlan_private
+ *  @param pmbuf     A pointer to mlan_buffer which includes the received packet
+ *
+ *  @return 	   MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_process_uap_rx_packet(IN mlan_private * priv, IN pmlan_buffer pmbuf)
+{
+    pmlan_adapter pmadapter = priv->adapter;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    UapRxPD *prx_pd;
+    RxPacketHdr_t *prx_pkt;
+    pmlan_buffer newbuf = MNULL;
+
+    ENTER();
+
+    prx_pd = (UapRxPD *) (pmbuf->pbuf + pmbuf->data_offset);
+    prx_pkt = (RxPacketHdr_t *) ((t_u8 *) prx_pd + prx_pd->rx_pkt_offset);
+
+    DBG_HEXDUMP(MDAT_D, "uAP RxPD", prx_pd,
+                MIN(sizeof(UapRxPD), MAX_DATA_DUMP_LEN));
+    DBG_HEXDUMP(MDAT_D, "uAP Rx Payload",
+                ((t_u8 *) prx_pd + prx_pd->rx_pkt_offset),
+                MIN(prx_pd->rx_pkt_length, MAX_DATA_DUMP_LEN));
+
+    PRINTM(MINFO, "RX Data: data_len - prx_pd->rx_pkt_offset = %d - %d = %d\n",
+           pmbuf->data_len, prx_pd->rx_pkt_offset,
+           pmbuf->data_len - prx_pd->rx_pkt_offset);
+    PRINTM(MDATA, "Rx dest %02x:%02x:%02x:%02x:%02x:%02x\n",
+           prx_pkt->eth803_hdr.dest_addr[0], prx_pkt->eth803_hdr.dest_addr[1],
+           prx_pkt->eth803_hdr.dest_addr[2], prx_pkt->eth803_hdr.dest_addr[3],
+           prx_pkt->eth803_hdr.dest_addr[4], prx_pkt->eth803_hdr.dest_addr[5]);
+
+    /* don't do packet forwarding in disconnected state */
+    /* don't do packet forwarding when packet > 1514 */
+    if ((priv->media_connected == MFALSE) ||
+        ((pmbuf->data_len - prx_pd->rx_pkt_offset) > MV_ETH_FRAME_LEN))
+        goto upload;
+
+    if (prx_pkt->eth803_hdr.dest_addr[0] & 0x01) {
+        /* Multicast pkt */
+        if ((newbuf =
+             wlan_alloc_mlan_buffer(pmadapter, MLAN_TX_DATA_BUF_SIZE_2K, 0,
+                                    MTRUE))) {
+            newbuf->bss_index = pmbuf->bss_index;
+            newbuf->buf_type = pmbuf->buf_type;
+            newbuf->priority = pmbuf->priority;
+            newbuf->in_ts_sec = pmbuf->in_ts_sec;
+            newbuf->in_ts_usec = pmbuf->in_ts_usec;
+            newbuf->data_offset =
+                (sizeof(UapTxPD) + INTF_HEADER_LEN + DMA_ALIGNMENT);
+            pmadapter->pending_bridge_pkts++;
+            newbuf->flags |= MLAN_BUF_FLAG_BRIDGE_BUF;
+
+            /* copy the data, skip rxpd */
+            memcpy(pmadapter, (t_u8 *) newbuf->pbuf + newbuf->data_offset,
+                   pmbuf->pbuf + pmbuf->data_offset + prx_pd->rx_pkt_offset,
+                   pmbuf->data_len - prx_pd->rx_pkt_offset);
+            newbuf->data_len = pmbuf->data_len - prx_pd->rx_pkt_offset;
+            wlan_wmm_add_buf_txqueue(pmadapter, newbuf);
+            if (pmadapter->pending_bridge_pkts > RX_HIGH_THRESHOLD)
+                wlan_drop_tx_pkts(priv);
+        }
+    } else {
+        if (wlan_get_station_entry(priv, prx_pkt->eth803_hdr.dest_addr)) {
+            /* Forwarding Intra-BSS packet */
+            pmbuf->data_len -= prx_pd->rx_pkt_offset;
+            pmbuf->data_offset += prx_pd->rx_pkt_offset;
+            pmbuf->flags |= MLAN_BUF_FLAG_BRIDGE_BUF;
+            pmadapter->pending_bridge_pkts++;
+            wlan_wmm_add_buf_txqueue(pmadapter, pmbuf);
+            if (pmadapter->pending_bridge_pkts > RX_HIGH_THRESHOLD)
+                wlan_drop_tx_pkts(priv);
+            pmadapter->callbacks.moal_recv_complete(pmadapter->pmoal_handle,
+                                                    MNULL,
+                                                    MLAN_USB_EP_DATA, ret);
+            goto done;
+        }
+    }
+  upload:
+    /* Chop off RxPD */
+    pmbuf->data_len -= prx_pd->rx_pkt_offset;
+    pmbuf->data_offset += prx_pd->rx_pkt_offset;
+    pmbuf->pparent = MNULL;
+
+    pmadapter->callbacks.moal_get_system_time(pmadapter->pmoal_handle,
+                                              &pmbuf->out_ts_sec,
+                                              &pmbuf->out_ts_usec);
+    PRINTM(MDATA, "%lu.%06lu : Data => kernel seq_num=%d tid=%d\n",
+           pmbuf->out_ts_sec, pmbuf->out_ts_usec, prx_pd->seq_num,
+           prx_pd->priority);
+    ret = pmadapter->callbacks.moal_recv_packet(pmadapter->pmoal_handle, pmbuf);
+    if (ret == MLAN_STATUS_FAILURE) {
+        PRINTM(MERROR, "uAP Rx Error: moal_recv_packet returned error\n");
+        pmbuf->status_code = MLAN_ERROR_PKT_INVALID;
+    }
+
+    if (ret != MLAN_STATUS_PENDING) {
+        pmadapter->callbacks.moal_recv_complete(pmadapter->pmoal_handle, pmbuf,
+                                                MLAN_USB_EP_DATA, ret);
+    }
+  done:
+    LEAVE();
+    return ret;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_usb.c linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_usb.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_usb.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_usb.c	2017-09-23 03:42:50.150674661 +0800
@@ -0,0 +1,280 @@
+/** @file mlan_usb.c
+ *
+ *  @brief This file contains USB specific code
+ * 
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ *
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/********************************************************
+Change log:
+    04/21/2009: initial version
+********************************************************/
+
+#include "mlan.h"
+#ifdef STA_SUPPORT
+#include "mlan_join.h"
+#endif
+#include "mlan_util.h"
+#include "mlan_init.h"
+#include "mlan_fw.h"
+#include "mlan_main.h"
+
+/********************************************************
+		Local Variables
+********************************************************/
+
+/********************************************************
+		Global Variables
+********************************************************/
+
+/********************************************************
+        Local Functions
+********************************************************/
+
+/**
+ *  @brief  This function downloads FW blocks to device
+ *
+ *  @param pmadapter	A pointer to mlan_adapter
+ *  @param pmfw			A pointer to firmware image
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_prog_fw_w_helper(IN pmlan_adapter pmadapter, IN pmlan_fw_image pmfw)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_callbacks pcb = &pmadapter->callbacks;
+    t_u8 *firmware = pmfw->pfw_buf, *RecvBuff;
+    t_u32 retries = MAX_FW_RETRY, DataLength;
+    t_u32 FWSeqNum = 0, TotalBytes = 0, DnldCmd = 0;
+    FWData *fwdata = MNULL;
+    FWSyncHeader SyncFWHeader;
+
+    ENTER();
+
+    if (!firmware && !pcb->moal_get_fw_data) {
+        PRINTM(MMSG, "No firmware image found! Terminating download\n");
+        ret = MLAN_STATUS_FAILURE;
+        goto fw_exit;
+    }
+
+    /* Allocate memory for transmit */
+    ret =
+        pcb->moal_malloc(pmadapter->pmoal_handle, FW_DNLD_TX_BUF_SIZE,
+                         MLAN_MEM_DEF | MLAN_MEM_DMA, (t_u8 **) & fwdata);
+    if ((ret != MLAN_STATUS_SUCCESS) || !fwdata) {
+        PRINTM(MERROR, "Could not allocate buffer for FW download\n");
+        goto fw_exit;
+    }
+
+    /* Allocate memory for receive */
+    ret =
+        pcb->moal_malloc(pmadapter->pmoal_handle, FW_DNLD_RX_BUF_SIZE,
+                         MLAN_MEM_DEF | MLAN_MEM_DMA, &RecvBuff);
+    if ((ret != MLAN_STATUS_SUCCESS) || !RecvBuff) {
+        PRINTM(MERROR, "Could not allocate buffer for FW download response\n");
+        goto cleanup;
+    }
+
+    do {
+        /* Copy the header of the firmware data to get the length */
+        if (firmware)
+            memcpy(pmadapter, &fwdata->fw_header, &firmware[TotalBytes],
+                   sizeof(FWHeader));
+        else
+            pcb->moal_get_fw_data(pmadapter->pmoal_handle,
+                                  TotalBytes, sizeof(FWHeader),
+                                  (t_u8 *) & fwdata->fw_header);
+
+        DataLength = wlan_le32_to_cpu(fwdata->fw_header.data_length);
+        DnldCmd = wlan_le32_to_cpu(fwdata->fw_header.dnld_cmd);
+        TotalBytes += sizeof(FWHeader);
+
+        /* Copy the firmware data */
+        if (firmware)
+            memcpy(pmadapter, fwdata->data, &firmware[TotalBytes], DataLength);
+        else
+            pcb->moal_get_fw_data(pmadapter->pmoal_handle,
+                                  TotalBytes, DataLength,
+                                  (t_u8 *) fwdata->data);
+
+        fwdata->seq_num = wlan_cpu_to_le32(FWSeqNum);
+        TotalBytes += DataLength;
+
+        /* If the send/receive fails or CRC occurs then retry */
+        while (retries) {
+            mlan_buffer mbuf;
+            int length = FW_DATA_XMIT_SIZE;
+            retries--;
+
+            memset(pmadapter, &mbuf, 0, sizeof(mlan_buffer));
+            mbuf.pbuf = (t_u8 *) fwdata;
+            mbuf.data_len = length;
+
+            /* Send the firmware block */
+            if ((ret = pcb->moal_write_data_sync(pmadapter->pmoal_handle,
+                                                 &mbuf, MLAN_USB_EP_CMD_EVENT,
+                                                 MLAN_USB_BULK_MSG_TIMEOUT)) !=
+                MLAN_STATUS_SUCCESS) {
+                PRINTM(MERROR, "fw_dnld: write_data failed, ret %d\n", ret);
+                continue;
+            }
+
+            memset(pmadapter, &mbuf, 0, sizeof(mlan_buffer));
+            mbuf.pbuf = RecvBuff;
+            mbuf.data_len = FW_DNLD_RX_BUF_SIZE;
+
+            /* Receive the firmware block response */
+            if ((ret = pcb->moal_read_data_sync(pmadapter->pmoal_handle,
+                                                &mbuf, MLAN_USB_EP_CMD_EVENT,
+                                                MLAN_USB_BULK_MSG_TIMEOUT)) !=
+                MLAN_STATUS_SUCCESS) {
+                PRINTM(MERROR, "fw_dnld: read_data failed, ret %d\n", ret);
+                continue;
+            }
+
+            memcpy(pmadapter, &SyncFWHeader, RecvBuff, sizeof(FWSyncHeader));
+            endian_convert_syncfwheader(&SyncFWHeader);
+
+            /* Check the firmware block response for CRC errors */
+            if (SyncFWHeader.cmd) {
+                PRINTM(MERROR, "FW received Blk with CRC error 0x%x\n",
+                       SyncFWHeader.cmd);
+                ret = MLAN_STATUS_FAILURE;
+                continue;
+            }
+
+            retries = MAX_FW_RETRY;
+            break;
+        }
+
+        FWSeqNum++;
+        PRINTM(MINFO, ".\n");
+
+    } while ((DnldCmd != FW_HAS_LAST_BLOCK) && retries);
+
+  cleanup:
+    PRINTM(MINFO, "fw_dnld: %d bytes downloaded\n", TotalBytes);
+
+    if (RecvBuff)
+        pcb->moal_mfree(pmadapter->pmoal_handle, RecvBuff);
+    if (fwdata)
+        pcb->moal_mfree(pmadapter->pmoal_handle, (t_u8 *) fwdata);
+    if (retries) {
+        ret = MLAN_STATUS_SUCCESS;
+    }
+
+  fw_exit:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief  This function receives and checks FW ready event
+ *
+ *  @param pmadapter		A pointer to mlan_adapter
+ *
+ *  @return		MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_check_fw_ready_event(pmlan_adapter pmadapter)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    pmlan_callbacks pcb = &pmadapter->callbacks;
+    t_u8 *event_buf = MNULL;
+    t_u32 event_sig, event_id;
+    mlan_buffer mbuf;
+
+    ENTER();
+
+    /* Allocate memory for receive */
+    ret =
+        pcb->moal_malloc(pmadapter->pmoal_handle, MAX_EVENT_SIZE,
+                         MLAN_MEM_DEF | MLAN_MEM_DMA, &event_buf);
+    if ((ret != MLAN_STATUS_SUCCESS) || !event_buf) {
+        PRINTM(MERROR, "Could not allocate buffer for event buf\n");
+        goto done;
+    }
+
+    memset(pmadapter, &mbuf, 0, sizeof(mlan_buffer));
+    mbuf.pbuf = (t_u8 *) event_buf;
+    mbuf.data_len = MAX_EVENT_SIZE;
+    mbuf.buf_type = MLAN_BUF_TYPE_EVENT;
+
+    /* Wait for FW ready event, timeout 2-second */
+    if ((ret = pcb->moal_read_data_sync(pmadapter->pmoal_handle,
+                                        &mbuf, MLAN_USB_EP_CMD_EVENT,
+                                        MLAN_USB_BULK_MSG_TIMEOUT * 20)) !=
+        MLAN_STATUS_SUCCESS) {
+        PRINTM(MERROR, "Reading FW_READY event failed: %d\n", ret);
+    } else {
+        event_sig = wlan_le32_to_cpu(*((t_u32 *) event_buf));
+        event_id = wlan_le32_to_cpu(*((t_u32 *) event_buf + 1));
+
+        if (event_sig == MLAN_USB_TYPE_EVENT && event_id == EVENT_INIT_DONE) {
+            PRINTM(MINFO, "FW_READY event is received: 0x%x - 0x%x\n",
+                   event_sig, event_id);
+        } else {
+            PRINTM(MERROR, "FW_READY event is not received: 0x%x - 0x%x\n",
+                   event_sig, event_id);
+            ret = MLAN_STATUS_FAILURE;
+        }
+    }
+  done:
+    if (event_buf)
+        pcb->moal_mfree(pmadapter->pmoal_handle, event_buf);
+
+    LEAVE();
+    return ret;
+}
+
+/********************************************************
+        Global Functions
+********************************************************/
+
+/**
+ *  @brief  This function downloads firmware to card
+ *
+ *  @param pmadapter	A pointer to mlan_adapter
+ *  @param pmfw			A pointer to firmware image
+ *
+ *  @return		MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_dnld_fw(IN pmlan_adapter pmadapter, IN pmlan_fw_image pmfw)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    ret = wlan_prog_fw_w_helper(pmadapter, pmfw);
+    if (ret != MLAN_STATUS_SUCCESS) {
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+
+    ret = wlan_check_fw_ready_event(pmadapter);
+
+    LEAVE();
+    return ret;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_util.h linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_util.h
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_util.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_util.h	2017-09-23 03:42:50.150674661 +0800
@@ -0,0 +1,533 @@
+/** @file mlan_util.h
+ *
+ *  @brief This file contains wrappers for linked-list,
+ *  spinlock and timer defines.
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/******************************************************
+Change log:
+    10/28/2008: initial version
+******************************************************/
+
+#ifndef _MLAN_UTIL_H_
+#define _MLAN_UTIL_H_
+
+/** Circular doubly linked list */
+typedef struct _mlan_linked_list
+{
+    /** Pointer to previous node */
+    struct _mlan_linked_list *pprev;
+    /** Pointer to next node */
+    struct _mlan_linked_list *pnext;
+} mlan_linked_list, *pmlan_linked_list;
+
+/** List head */
+typedef struct _mlan_list_head
+{
+    /** Pointer to previous node */
+    struct _mlan_linked_list *pprev;
+    /** Pointer to next node */
+    struct _mlan_linked_list *pnext;
+    /** Pointer to lock */
+    t_void *plock;
+} mlan_list_head, *pmlan_list_head;
+
+/** 
+ *  @brief This function initializes a list without locking
+ *  
+ *  @param phead		List head
+ *
+ *  @return			N/A
+ */
+static INLINE t_void
+util_init_list(pmlan_linked_list phead)
+{
+    /* Both next and prev point to self */
+    phead->pprev = phead->pnext = (pmlan_linked_list) phead;
+}
+
+/** 
+ *  @brief This function initializes a list
+ *  
+ *  @param phead		List head
+ *  @param lock_required	A flag for spinlock requirement
+ *  @param moal_init_lock	A pointer to init lock handler
+ *
+ *  @return			N/A
+ */
+static INLINE t_void
+util_init_list_head(t_void * pmoal_handle,
+                    pmlan_list_head phead,
+                    t_u8 lock_required,
+                    mlan_status(*moal_init_lock) (t_void * handle,
+                                                  t_void ** pplock))
+{
+    /* Both next and prev point to self */
+    util_init_list((pmlan_linked_list) phead);
+    if (lock_required)
+        moal_init_lock(pmoal_handle, &phead->plock);
+    else
+        phead->plock = 0;
+}
+
+/** 
+ *  @brief This function frees a list
+ *  
+ *  @param phead		List head
+ *  @param moal_free_lock	A pointer to free lock handler
+ *
+ *  @return			N/A
+ */
+static INLINE t_void
+util_free_list_head(t_void * pmoal_handle,
+                    pmlan_list_head phead,
+                    mlan_status(*moal_free_lock) (t_void * handle,
+                                                  t_void * plock))
+{
+    phead->pprev = phead->pnext = 0;
+    if (phead->plock)
+        moal_free_lock(pmoal_handle, phead->plock);
+}
+
+/** 
+ *  @brief This function peeks into a list
+ *  
+ *  @param phead		List head
+ *  @param moal_spin_lock	A pointer to spin lock handler
+ *  @param moal_spin_unlock	A pointer to spin unlock handler
+ *
+ *  @return			List node
+ */
+static INLINE pmlan_linked_list
+util_peek_list(t_void * pmoal_handle,
+               pmlan_list_head phead,
+               mlan_status(*moal_spin_lock) (t_void * handle, t_void * plock),
+               mlan_status(*moal_spin_unlock) (t_void * handle, t_void * plock))
+{
+    pmlan_linked_list pnode = 0;
+
+    if (moal_spin_lock)
+        moal_spin_lock(pmoal_handle, phead->plock);
+    if (phead->pnext != (pmlan_linked_list) phead) {
+        pnode = phead->pnext;
+    }
+    if (moal_spin_unlock)
+        moal_spin_unlock(pmoal_handle, phead->plock);
+    return pnode;
+}
+
+/** 
+ *  @brief This function queues a node at the list tail
+ *  
+ *  @param phead		List head
+ *  @param pnode		List node to queue
+ *  @param moal_spin_lock	A pointer to spin lock handler
+ *  @param moal_spin_unlock	A pointer to spin unlock handler
+ *
+ *  @return			N/A
+ */
+static INLINE t_void
+util_enqueue_list_tail(t_void * pmoal_handle,
+                       pmlan_list_head phead,
+                       pmlan_linked_list pnode,
+                       mlan_status(*moal_spin_lock) (t_void * handle,
+                                                     t_void * plock),
+                       mlan_status(*moal_spin_unlock) (t_void * handle,
+                                                       t_void * plock))
+{
+    pmlan_linked_list pold_last;
+
+    if (moal_spin_lock)
+        moal_spin_lock(pmoal_handle, phead->plock);
+    pold_last = phead->pprev;
+    pnode->pprev = pold_last;
+    pnode->pnext = (pmlan_linked_list) phead;
+
+    phead->pprev = pold_last->pnext = pnode;
+    if (moal_spin_unlock)
+        moal_spin_unlock(pmoal_handle, phead->plock);
+}
+
+/** 
+ *  @brief This function adds a node at the list head
+ *  
+ *  @param phead		List head
+ *  @param pnode		List node to add
+ *  @param moal_spin_lock	A pointer to spin lock handler
+ *  @param moal_spin_unlock	A pointer to spin unlock handler
+ *
+ *  @return			N/A
+ */
+static INLINE t_void
+util_enqueue_list_head(t_void * pmoal_handle,
+                       pmlan_list_head phead,
+                       pmlan_linked_list pnode,
+                       mlan_status(*moal_spin_lock) (t_void * handle,
+                                                     t_void * plock),
+                       mlan_status(*moal_spin_unlock) (t_void * handle,
+                                                       t_void * plock))
+{
+    pmlan_linked_list pold_first;
+
+    if (moal_spin_lock)
+        moal_spin_lock(pmoal_handle, phead->plock);
+    pold_first = phead->pnext;
+    pnode->pprev = (pmlan_linked_list) phead;
+    pnode->pnext = pold_first;
+
+    phead->pnext = pold_first->pprev = pnode;
+    if (moal_spin_unlock)
+        moal_spin_unlock(pmoal_handle, phead->plock);
+}
+
+/** 
+ *  @brief This function removes a node from the list
+ *  
+ *  @param phead		List head
+ *  @param pnode		List node to remove
+ *  @param moal_spin_lock	A pointer to spin lock handler
+ *  @param moal_spin_unlock	A pointer to spin unlock handler
+ *
+ *  @return			N/A
+ */
+static INLINE t_void
+util_unlink_list(t_void * pmoal_handle,
+                 pmlan_list_head phead,
+                 pmlan_linked_list pnode,
+                 mlan_status(*moal_spin_lock) (t_void * handle, t_void * plock),
+                 mlan_status(*moal_spin_unlock) (t_void * handle,
+                                                 t_void * plock))
+{
+    pmlan_linked_list pmy_prev;
+    pmlan_linked_list pmy_next;
+
+    if (moal_spin_lock)
+        moal_spin_lock(pmoal_handle, phead->plock);
+    pmy_prev = pnode->pprev;
+    pmy_next = pnode->pnext;
+    pmy_next->pprev = pmy_prev;
+    pmy_prev->pnext = pmy_next;
+
+    pnode->pnext = pnode->pprev = 0;
+    if (moal_spin_unlock)
+        moal_spin_unlock(pmoal_handle, phead->plock);
+}
+
+/** 
+ *  @brief This function dequeues a node from the list
+ *  
+ *  @param phead		List head
+ *  @param moal_spin_lock	A pointer to spin lock handler
+ *  @param moal_spin_unlock	A pointer to spin unlock handler
+ *
+ *  @return			List node
+ */
+static INLINE pmlan_linked_list
+util_dequeue_list(t_void * pmoal_handle,
+                  pmlan_list_head phead,
+                  mlan_status(*moal_spin_lock) (t_void * handle,
+                                                t_void * plock),
+                  mlan_status(*moal_spin_unlock) (t_void * handle,
+                                                  t_void * plock))
+{
+    pmlan_linked_list pnode;
+
+    if (moal_spin_lock)
+        moal_spin_lock(pmoal_handle, phead->plock);
+    pnode = phead->pnext;
+    if (pnode && (pnode != (pmlan_linked_list) phead)) {
+        util_unlink_list(pmoal_handle, phead, pnode, 0, 0);
+    } else {
+        pnode = 0;
+    }
+    if (moal_spin_unlock)
+        moal_spin_unlock(pmoal_handle, phead->plock);
+    return pnode;
+}
+
+/** Access controlled scalar variable */
+typedef struct _mlan_scalar
+{
+    /** Value */
+    t_s32 value;
+    /** Pointer to lock */
+    t_void *plock;
+    /** Control flags */
+    t_u32 flags;
+} mlan_scalar, *pmlan_scalar;
+
+/** Flag to scalar lock acquired */
+#define MLAN_SCALAR_FLAG_UNIQUE_LOCK	MBIT(16)
+
+/** scalar conditional value list */
+typedef enum _MLAN_SCALAR_CONDITIONAL
+{
+    MLAN_SCALAR_COND_EQUAL,
+    MLAN_SCALAR_COND_NOT_EQUAL,
+    MLAN_SCALAR_COND_GREATER_THAN,
+    MLAN_SCALAR_COND_GREATER_OR_EQUAL,
+    MLAN_SCALAR_COND_LESS_THAN,
+    MLAN_SCALAR_COND_LESS_OR_EQUAL
+} MLAN_SCALAR_CONDITIONAL;
+
+/** 
+ *  @brief This function initializes a scalar
+ *  
+ *  @param pscalar			Pointer to scalar
+ *  @param val				Initial scalar value
+ *  @param plock_to_use		A new lock is created if NULL, else lock to use
+ *  @param moal_init_lock	A pointer to init lock handler
+ *
+ *  @return					N/A
+ */
+static INLINE t_void
+util_scalar_init(t_void * pmoal_handle,
+                 pmlan_scalar pscalar,
+                 t_s32 val,
+                 t_void * plock_to_use,
+                 mlan_status(*moal_init_lock) (t_void * handle,
+                                               t_void ** pplock))
+{
+    pscalar->value = val;
+    pscalar->flags = 0;
+    if (plock_to_use) {
+        pscalar->flags &= ~MLAN_SCALAR_FLAG_UNIQUE_LOCK;
+        pscalar->plock = plock_to_use;
+    } else {
+        pscalar->flags |= MLAN_SCALAR_FLAG_UNIQUE_LOCK;
+        moal_init_lock(pmoal_handle, &pscalar->plock);
+    }
+}
+
+/** 
+ *  @brief This function frees a scalar
+ *  
+ *  @param pscalar			Pointer to scalar
+ *  @param moal_free_lock	A pointer to free lock handler
+ *
+ *  @return			N/A
+ */
+static INLINE t_void
+util_scalar_free(t_void * pmoal_handle,
+                 pmlan_scalar pscalar,
+                 mlan_status(*moal_free_lock) (t_void * handle, t_void * plock))
+{
+    if (pscalar->flags & MLAN_SCALAR_FLAG_UNIQUE_LOCK)
+        moal_free_lock(pmoal_handle, &pscalar->plock);
+}
+
+/** 
+ *  @brief This function reads value from scalar
+ *  
+ *  @param pscalar			Pointer to scalar
+ *  @param moal_spin_lock	A pointer to spin lock handler
+ *  @param moal_spin_unlock	A pointer to spin unlock handler
+ *
+ *  @return					Stored value
+ */
+static INLINE t_s32
+util_scalar_read(t_void * pmoal_handle,
+                 pmlan_scalar pscalar,
+                 mlan_status(*moal_spin_lock) (t_void * handle, t_void * plock),
+                 mlan_status(*moal_spin_unlock) (t_void * handle,
+                                                 t_void * plock))
+{
+    t_s32 val;
+
+    if (moal_spin_lock)
+        moal_spin_lock(pmoal_handle, pscalar->plock);
+    val = pscalar->value;
+    if (moal_spin_unlock)
+        moal_spin_unlock(pmoal_handle, pscalar->plock);
+
+    return val;
+}
+
+/** 
+ *  @brief This function writes value to scalar
+ *  
+ *  @param pscalar			Pointer to scalar
+ *  @param val				Value to write
+ *  @param moal_spin_lock	A pointer to spin lock handler
+ *  @param moal_spin_unlock	A pointer to spin unlock handler
+ *
+ *  @return					N/A
+ */
+static INLINE t_void
+util_scalar_write(t_void * pmoal_handle,
+                  pmlan_scalar pscalar,
+                  t_s32 val,
+                  mlan_status(*moal_spin_lock) (t_void * handle,
+                                                t_void * plock),
+                  mlan_status(*moal_spin_unlock) (t_void * handle,
+                                                  t_void * plock))
+{
+    if (moal_spin_lock)
+        moal_spin_lock(pmoal_handle, pscalar->plock);
+    pscalar->value = val;
+    if (moal_spin_unlock)
+        moal_spin_unlock(pmoal_handle, pscalar->plock);
+}
+
+/** 
+ *  @brief This function increments the value in scalar
+ *  
+ *  @param pscalar			Pointer to scalar
+ *  @param moal_spin_lock	A pointer to spin lock handler
+ *  @param moal_spin_unlock	A pointer to spin unlock handler
+ *
+ *  @return					N/A
+ */
+static INLINE t_void
+util_scalar_increment(t_void * pmoal_handle,
+                      pmlan_scalar pscalar,
+                      mlan_status(*moal_spin_lock) (t_void * handle,
+                                                    t_void * plock),
+                      mlan_status(*moal_spin_unlock) (t_void * handle,
+                                                      t_void * plock))
+{
+    if (moal_spin_lock)
+        moal_spin_lock(pmoal_handle, pscalar->plock);
+    pscalar->value++;
+    if (moal_spin_unlock)
+        moal_spin_unlock(pmoal_handle, pscalar->plock);
+}
+
+/** 
+ *  @brief This function decrements the value in scalar
+ *  
+ *  @param pscalar			Pointer to scalar
+ *  @param moal_spin_lock	A pointer to spin lock handler
+ *  @param moal_spin_unlock	A pointer to spin unlock handler
+ *
+ *  @return					N/A
+ */
+static INLINE t_void
+util_scalar_decrement(t_void * pmoal_handle,
+                      pmlan_scalar pscalar,
+                      mlan_status(*moal_spin_lock) (t_void * handle,
+                                                    t_void * plock),
+                      mlan_status(*moal_spin_unlock) (t_void * handle,
+                                                      t_void * plock))
+{
+    if (moal_spin_lock)
+        moal_spin_lock(pmoal_handle, pscalar->plock);
+    pscalar->value--;
+    if (moal_spin_unlock)
+        moal_spin_unlock(pmoal_handle, pscalar->plock);
+}
+
+/** 
+ *  @brief This function adds an offset to the value in scalar,
+ *         and returns the new value
+ *  
+ *  @param pscalar			Pointer to scalar
+ *  @param offset			Offset value (can be negative)
+ *  @param moal_spin_lock	A pointer to spin lock handler
+ *  @param moal_spin_unlock	A pointer to spin unlock handler
+ *
+ *  @return					Value after offset
+ */
+static INLINE t_s32
+util_scalar_offset(t_void * pmoal_handle,
+                   pmlan_scalar pscalar,
+                   t_s32 offset,
+                   mlan_status(*moal_spin_lock) (t_void * handle,
+                                                 t_void * plock),
+                   mlan_status(*moal_spin_unlock) (t_void * handle,
+                                                   t_void * plock))
+{
+    t_s32 newval;
+
+    if (moal_spin_lock)
+        moal_spin_lock(pmoal_handle, pscalar->plock);
+    newval = (pscalar->value += offset);
+    if (moal_spin_unlock)
+        moal_spin_unlock(pmoal_handle, pscalar->plock);
+
+    return newval;
+}
+
+/** 
+ *  @brief This function writes the value to the scalar
+ *         if existing value compared with other value is true.
+ *  
+ *  @param pscalar			Pointer to scalar
+ *  @param condition		Condition to check
+ *  @param val_compare		Value to compare against current value
+ *  						((A X B), where B = val_compare)
+ *  @param val_to_set		Value to set if comparison is true
+ *  @param moal_spin_lock	A pointer to spin lock handler
+ *  @param moal_spin_unlock	A pointer to spin unlock handler
+ *
+ *  @return					Comparison result (MTRUE or MFALSE)
+ */
+static INLINE t_u8
+util_scalar_conditional_write(t_void * pmoal_handle,
+                              pmlan_scalar pscalar,
+                              MLAN_SCALAR_CONDITIONAL condition,
+                              t_s32 val_compare,
+                              t_s32 val_to_set,
+                              mlan_status(*moal_spin_lock) (t_void * handle,
+                                                            t_void * plock),
+                              mlan_status(*moal_spin_unlock) (t_void * handle,
+                                                              t_void * plock))
+{
+    t_u8 update;
+    if (moal_spin_lock)
+        moal_spin_lock(pmoal_handle, pscalar->plock);
+
+    switch (condition) {
+    case MLAN_SCALAR_COND_EQUAL:
+        update = (pscalar->value == val_compare);
+        break;
+    case MLAN_SCALAR_COND_NOT_EQUAL:
+        update = (pscalar->value != val_compare);
+        break;
+    case MLAN_SCALAR_COND_GREATER_THAN:
+        update = (pscalar->value > val_compare);
+        break;
+    case MLAN_SCALAR_COND_GREATER_OR_EQUAL:
+        update = (pscalar->value >= val_compare);
+        break;
+    case MLAN_SCALAR_COND_LESS_THAN:
+        update = (pscalar->value < val_compare);
+        break;
+    case MLAN_SCALAR_COND_LESS_OR_EQUAL:
+        update = (pscalar->value <= val_compare);
+        break;
+    default:
+        update = MFALSE;
+        break;
+    }
+    if (update)
+        pscalar->value = val_to_set;
+
+    if (moal_spin_unlock)
+        moal_spin_unlock(pmoal_handle, pscalar->plock);
+    return (update) ? MTRUE : MFALSE;
+}
+
+#endif /* !_MLAN_UTIL_H_ */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_wmm.c linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_wmm.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_wmm.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_wmm.c	2017-09-23 03:42:50.154674648 +0800
@@ -0,0 +1,2433 @@
+/** @file mlan_wmm.c
+ *
+ *  @brief This file contains functions for WMM.
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ *
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/********************************************************
+Change log:
+    10/24/2008: initial version
+********************************************************/
+
+#include "mlan.h"
+#ifdef STA_SUPPORT
+#include "mlan_join.h"
+#endif
+#include "mlan_util.h"
+#include "mlan_fw.h"
+#include "mlan_main.h"
+#include "mlan_wmm.h"
+#include "mlan_11n.h"
+
+/********************************************************
+    Local Variables
+********************************************************/
+
+/** Maximum value FW can accept for driver delay in packet transmission */
+#define DRV_PKT_DELAY_TO_FW_MAX   512
+
+/*
+ * Upper and Lower threshold for packet queuing in the driver
+ 
+ *    - When the number of packets queued reaches the upper limit,
+ *      the driver will stop the net queue in the app/kernel space.
+ 
+ *    - When the number of packets drops beneath the lower limit after
+ *      having reached the upper limit, the driver will restart the net
+ *      queue.
+ */
+
+/** Lower threshold for packet queuing in the driver.
+  * When the number of packets drops beneath the lower limit after having
+  * reached the upper limit, the driver will restart the net queue.
+  */
+#define WMM_QUEUED_PACKET_LOWER_LIMIT   180
+
+/** Upper threshold for packet queuing in the driver.
+  * When the number of packets queued reaches the upper limit, the driver
+  * will stop the net queue in the app/kernel space.
+  */
+#define WMM_QUEUED_PACKET_UPPER_LIMIT   200
+
+/** Offset for TOS field in the IP header */
+#define IPTOS_OFFSET 5
+
+/** WMM information IE */
+static const t_u8 wmm_info_ie[] = { WMM_IE, 0x07,
+    0x00, 0x50, 0xf2, 0x02,
+    0x00, 0x01, 0x00
+};
+
+/**
+ * AC Priorities go from AC_BK to AC_VO.  The ACI enumeration for AC_BK (1)
+ *   is higher than the enumeration for AC_BE (0); hence the needed
+ *   mapping conversion for wmm AC to priority Queue Index
+ */
+static const t_u8 wmm_aci_to_qidx_map[] = { WMM_AC_BE,
+    WMM_AC_BK,
+    WMM_AC_VI,
+    WMM_AC_VO
+};
+
+/** 
+ * This table will be used to store the tid values based on ACs.
+ * It is initialized to default values per TID.
+ */
+t_u8 tos_to_tid[] = {
+    /* TID DSCP_P2 DSCP_P1 DSCP_P0 WMM_AC */
+    0x01,                       /* 0 1 0 AC_BK */
+    0x02,                       /* 0 0 0 AC_BK */
+    0x00,                       /* 0 0 1 AC_BE */
+    0x03,                       /* 0 1 1 AC_BE */
+    0x04,                       /* 1 0 0 AC_VI */
+    0x05,                       /* 1 0 1 AC_VI */
+    0x06,                       /* 1 1 0 AC_VO */
+    0x07                        /* 1 1 1 AC_VO */
+};
+
+/** 
+ * This table inverses the tos_to_tid operation to get a priority
+ * which is in sequential order, and can be compared.
+ * Use this to compare the priority of two different TIDs.
+ */
+t_u8 tos_to_tid_inv[] = { 0x02, /* from tos_to_tid[2] = 0 */
+    0x00,                       /* from tos_to_tid[0] = 1 */
+    0x01,                       /* from tos_to_tid[1] = 2 */
+    0x03,
+    0x04,
+    0x05,
+    0x06,
+    0x07
+};
+
+/** 
+ * This table will provide the tid value for given ac. This table does not
+ * change and will be used to copy back the default values to tos_to_tid in
+ * case of disconnect.
+ */
+const t_u8 ac_to_tid[4][2] = { {1, 2}, {0, 3}, {4, 5}, {6, 7} };
+
+/* Map of TOS UP values to WMM AC */
+static const mlan_wmm_ac_e tos_to_ac[] = { WMM_AC_BE,
+    WMM_AC_BK,
+    WMM_AC_BK,
+    WMM_AC_BE,
+    WMM_AC_VI,
+    WMM_AC_VI,
+    WMM_AC_VO,
+    WMM_AC_VO
+};
+
+raListTbl *wlan_wmm_get_ralist_node(pmlan_private priv, t_u8 tid,
+                                    t_u8 * ra_addr);
+
+/********************************************************
+    Local Functions
+********************************************************/
+#ifdef DEBUG_LEVEL2
+/**
+ *  @brief Debug print function to display the priority parameters for a WMM AC
+ *
+ *  @param pac_param	Pointer to the AC parameters to display
+ *
+ *  @return		N/A
+ */
+static void
+wlan_wmm_ac_debug_print(const IEEEtypes_WmmAcParameters_t * pac_param)
+{
+    const char *ac_str[] = { "BK", "BE", "VI", "VO" };
+
+    ENTER();
+
+    PRINTM(MINFO, "WMM AC_%s: ACI=%d, ACM=%d, Aifsn=%d, "
+           "EcwMin=%d, EcwMax=%d, TxopLimit=%d\n",
+           ac_str[wmm_aci_to_qidx_map[pac_param->aci_aifsn.aci]],
+           pac_param->aci_aifsn.aci, pac_param->aci_aifsn.acm,
+           pac_param->aci_aifsn.aifsn, pac_param->ecw.ecw_min,
+           pac_param->ecw.ecw_max, wlan_le16_to_cpu(pac_param->tx_op_limit));
+
+    LEAVE();
+}
+
+/** Print the WMM AC for debug purpose */
+#define PRINTM_AC(pac_param) wlan_wmm_ac_debug_print(pac_param)
+#else
+/** Print the WMM AC for debug purpose */
+#define PRINTM_AC(pac_param)
+#endif
+
+/**
+ *  @brief Allocate route address
+ *
+ *  @param pmadapter       Pointer to the mlan_adapter structure
+ *  @param ra              Pointer to the route address
+ *
+ *  @return         ra_list
+ */
+static raListTbl *
+wlan_wmm_allocate_ralist_node(pmlan_adapter pmadapter, t_u8 * ra)
+{
+    raListTbl *ra_list = MNULL;
+
+    ENTER();
+
+    if (pmadapter->callbacks.
+        moal_malloc(pmadapter->pmoal_handle, sizeof(raListTbl), MLAN_MEM_DEF,
+                    (t_u8 **) & ra_list)) {
+        PRINTM(MERROR, "Fail to allocate ra_list\n");
+        goto done;
+    }
+    util_init_list((pmlan_linked_list) ra_list);
+    util_init_list_head((t_void *) pmadapter->pmoal_handle,
+                        &ra_list->buf_head, MFALSE,
+                        pmadapter->callbacks.moal_init_lock);
+
+    memcpy(pmadapter, ra_list->ra, ra, MLAN_MAC_ADDR_LENGTH);
+
+    ra_list->total_pkts = 0;
+    ra_list->tx_pause = 0;
+    PRINTM(MINFO, "RAList: Allocating buffers for TID %p\n", ra_list);
+  done:
+    LEAVE();
+    return ra_list;
+}
+
+/**
+ * @brief Map ACs to TID 
+ *
+ * @param priv             Pointer to the mlan_private driver data struct
+ * @param queue_priority   Queue_priority structure
+ *
+ * @return 	   N/A
+ */
+static void
+wlan_wmm_queue_priorities_tid(pmlan_private priv, t_u8 queue_priority[])
+{
+    int i;
+
+    ENTER();
+
+    for (i = 0; i < 4; ++i) {
+        tos_to_tid[7 - (i * 2)] = ac_to_tid[queue_priority[i]][1];
+        tos_to_tid[6 - (i * 2)] = ac_to_tid[queue_priority[i]][0];
+    }
+
+    for (i = 0; i < MAX_NUM_TID; i++) {
+        tos_to_tid_inv[tos_to_tid[i]] = (t_u8) i;
+    }
+
+    /* in case priorities have changed, force highest priority so next packet
+       will check from top to re-establish the highest */
+    util_scalar_write(priv->adapter->pmoal_handle,
+                      &priv->wmm.highest_queued_prio,
+                      HIGH_PRIO_TID,
+                      priv->adapter->callbacks.moal_spin_lock,
+                      priv->adapter->callbacks.moal_spin_unlock);
+
+    LEAVE();
+}
+
+/**
+ *  @brief Evaluate whether or not an AC is to be downgraded
+ *
+ *  @param priv     Pointer to the mlan_private driver data struct
+ *  @param eval_ac  AC to evaluate for downgrading
+ *
+ *  @return WMM AC  The eval_ac traffic is to be sent on.
+ */
+static mlan_wmm_ac_e
+wlan_wmm_eval_downgrade_ac(pmlan_private priv, mlan_wmm_ac_e eval_ac)
+{
+    int down_ac;
+    mlan_wmm_ac_e ret_ac;
+    WmmAcStatus_t *pac_status;
+
+    ENTER();
+
+    pac_status = &priv->wmm.ac_status[eval_ac];
+
+    if (pac_status->disabled == MFALSE) {
+        LEAVE();
+        /* Okay to use this AC, its enabled */
+        return eval_ac;
+    }
+
+    /* Setup a default return value of the lowest priority */
+    ret_ac = WMM_AC_BK;
+
+    /* 
+     *  Find the highest AC that is enabled and does not require admission
+     *    control.  The spec disallows downgrading to an AC, which is enabled
+     *    due to a completed admission control.  Unadmitted traffic is not
+     *    to be sent on an AC with admitted traffic.
+     */
+    for (down_ac = WMM_AC_BK; down_ac < eval_ac; down_ac++) {
+        pac_status = &priv->wmm.ac_status[down_ac];
+
+        if ((pac_status->disabled == MFALSE)
+            && (pac_status->flow_required == MFALSE))
+            /* AC is enabled and does not require admission control */
+            ret_ac = (mlan_wmm_ac_e) down_ac;
+    }
+
+    LEAVE();
+    return ret_ac;
+}
+
+/**
+ *  @brief Convert the IP TOS field to an WMM AC Queue assignment
+ *
+ *  @param pmadapter A pointer to mlan_adapter structure
+ *  @param tos       IP TOS field
+ *
+ *  @return     WMM AC Queue mapping of the IP TOS field
+ */
+static mlan_wmm_ac_e INLINE
+wlan_wmm_convert_tos_to_ac(pmlan_adapter pmadapter, t_u32 tos)
+{
+    ENTER();
+
+    if (tos >= NELEMENTS(tos_to_ac)) {
+        LEAVE();
+        return WMM_AC_BE;
+    }
+
+    LEAVE();
+    return tos_to_ac[tos];
+}
+
+/**
+ *  @brief  Evaluate a given TID and downgrade it to a lower TID if the
+ *          WMM Parameter IE received from the AP indicates that the AP
+ *          is disabled (due to call admission control (ACM bit). Mapping
+ * 			of TID to AC is taken care internally
+ *
+ *  @param priv		Pointer to the mlan_private data struct
+ *  @param tid  	tid to evaluate for downgrading
+ *
+ *  @return       Same tid as input if downgrading not required or
+ *                the tid the traffic for the given tid should be downgraded to
+ */
+static t_u8 INLINE
+wlan_wmm_downgrade_tid(pmlan_private priv, t_u32 tid)
+{
+    mlan_wmm_ac_e ac_down;
+    pmlan_adapter pmadapter = priv->adapter;
+
+    ENTER();
+
+    ac_down =
+        priv->wmm.ac_down_graded_vals[wlan_wmm_convert_tos_to_ac(pmadapter,
+                                                                 tid)];
+    LEAVE();
+    /* 
+     * Send the index to tid array, picking from the array will be
+     * taken care by dequeuing function
+     */
+    if (tid == 1 || tid == 2)
+        return ac_to_tid[ac_down][(tid + 1) % 2];
+    else if (tid >= MAX_NUM_TID)
+        return ac_to_tid[ac_down][0];
+    else
+        return ac_to_tid[ac_down][tid % 2];
+}
+
+/**
+ *  @brief Delete packets in RA node
+ *
+ *  @param priv			Pointer to the mlan_private driver data struct
+ *  @param ra_list	    	Pointer to raListTbl
+ *
+ *  @return		N/A
+ */
+static INLINE void
+wlan_wmm_del_pkts_in_ralist_node(pmlan_private priv, raListTbl * ra_list)
+{
+    pmlan_buffer pmbuf;
+    pmlan_adapter pmadapter = priv->adapter;
+
+    ENTER();
+    while ((pmbuf =
+            (pmlan_buffer) util_peek_list(pmadapter->pmoal_handle,
+                                          &ra_list->buf_head, MNULL, MNULL))) {
+        util_unlink_list(pmadapter->pmoal_handle, &ra_list->buf_head,
+                         (pmlan_linked_list) pmbuf, MNULL, MNULL);
+        wlan_write_data_complete(pmadapter, pmbuf, MLAN_STATUS_FAILURE);
+    }
+    util_free_list_head((t_void *) pmadapter->pmoal_handle, &ra_list->buf_head,
+                        pmadapter->callbacks.moal_free_lock);
+
+    LEAVE();
+}
+
+/**
+ *  @brief Delete packets in RA list
+ *
+ *  @param priv			Pointer to the mlan_private driver data struct
+ *  @param ra_list_head	ra list header
+ *
+ *  @return		N/A
+ */
+static INLINE void
+wlan_wmm_del_pkts_in_ralist(pmlan_private priv, mlan_list_head * ra_list_head)
+{
+    raListTbl *ra_list;
+
+    ENTER();
+
+    ra_list =
+        (raListTbl *) util_peek_list(priv->adapter->pmoal_handle, ra_list_head,
+                                     MNULL, MNULL);
+
+    while (ra_list && ra_list != (raListTbl *) ra_list_head) {
+        wlan_wmm_del_pkts_in_ralist_node(priv, ra_list);
+
+        ra_list = ra_list->pnext;
+    }
+
+    LEAVE();
+}
+
+/**
+ *  @brief Clean up the wmm queue
+ *
+ *  @param priv  Pointer to the mlan_private driver data struct
+ *
+ *  @return      N/A
+ */
+static void
+wlan_wmm_cleanup_queues(pmlan_private priv)
+{
+    int i;
+
+    ENTER();
+
+    for (i = 0; i < MAX_NUM_TID; i++) {
+        wlan_wmm_del_pkts_in_ralist(priv, &priv->wmm.tid_tbl_ptr[i].ra_list);
+        priv->wmm.pkts_queued[i] = 0;
+    }
+    util_scalar_write(priv->adapter->pmoal_handle, &priv->wmm.tx_pkts_queued, 0,
+                      MNULL, MNULL);
+    util_scalar_write(priv->adapter->pmoal_handle,
+                      &priv->wmm.highest_queued_prio, HIGH_PRIO_TID, MNULL,
+                      MNULL);
+
+    LEAVE();
+}
+
+/**
+ *  @brief Delete all route address from RA list
+ *
+ *  @param priv     Pointer to the mlan_private driver data struct
+ *
+ *  @return         N/A
+ */
+static void
+wlan_wmm_delete_all_ralist(pmlan_private priv)
+{
+    raListTbl *ra_list;
+    int i;
+    pmlan_adapter pmadapter = priv->adapter;
+
+    ENTER();
+
+    for (i = 0; i < MAX_NUM_TID; ++i) {
+        PRINTM(MINFO, "RAList: Freeing buffers for TID %d\n", i);
+        while ((ra_list = (raListTbl *) util_peek_list(pmadapter->pmoal_handle,
+                                                       &priv->wmm.
+                                                       tid_tbl_ptr[i].ra_list,
+                                                       MNULL, MNULL))) {
+            util_unlink_list(pmadapter->pmoal_handle,
+                             &priv->wmm.tid_tbl_ptr[i].ra_list,
+                             (pmlan_linked_list) ra_list, MNULL, MNULL);
+
+            pmadapter->callbacks.moal_mfree(pmadapter->pmoal_handle,
+                                            (t_u8 *) ra_list);
+        }
+
+        util_init_list((pmlan_linked_list)
+                       & priv->wmm.tid_tbl_ptr[i].ra_list);
+        priv->wmm.tid_tbl_ptr[i].ra_list_curr = MNULL;
+    }
+
+    LEAVE();
+}
+
+/**
+ *   @brief Get queue RA pointer
+ *  
+ *   @param priv     Pointer to the mlan_private driver data struct
+ *   @param tid      TID
+ *   @param ra_addr  Pointer to the route address
+ * 
+ *   @return         ra_list
+ */
+static raListTbl *
+wlan_wmm_get_queue_raptr(pmlan_private priv, t_u8 tid, t_u8 * ra_addr)
+{
+    raListTbl *ra_list;
+
+    ENTER();
+
+    ra_list = wlan_wmm_get_ralist_node(priv, tid, ra_addr);
+    if (ra_list) {
+        LEAVE();
+        return ra_list;
+    }
+    wlan_ralist_add(priv, ra_addr);
+
+    ra_list = wlan_wmm_get_ralist_node(priv, tid, ra_addr);
+    LEAVE();
+    return ra_list;
+}
+
+#ifdef STA_SUPPORT
+static void
+wlan_send_wmmac_host_event(pmlan_private priv,
+                           char *typeStr,
+                           t_u8 * srcAddr, t_u8 tid, t_u8 up, t_u8 status)
+{
+    t_u8 event_buf[100];
+    mlan_event *pevent;
+    t_u8 *pOutBuf;
+
+    /* Format one of the following two output strings: ** -
+       TSPEC:ADDTS_RSP:[<status code>]:TID=X:UP=Y ** - TSPEC:DELTS_RX:[<reason
+       code>]:TID=X:UP=Y */
+    pevent = (mlan_event *) event_buf;
+    pOutBuf = pevent->event_buf;
+
+    memcpy(priv->adapter, pOutBuf, (t_u8 *) "TSPEC:", 6);
+    pOutBuf += 6;
+
+    memcpy(priv->adapter, pOutBuf, (t_u8 *) typeStr, wlan_strlen(typeStr));
+    pOutBuf += wlan_strlen(typeStr);
+
+    *pOutBuf++ = ':';
+    *pOutBuf++ = '[';
+
+    if (status >= 100) {
+        *pOutBuf++ = (status / 100) + '0';
+        status = (status % 100);
+    }
+
+    if (status >= 10) {
+        *pOutBuf++ = (status / 10) + '0';
+        status = (status % 10);
+    }
+
+    *pOutBuf++ = status + '0';
+
+    memcpy(priv->adapter, pOutBuf, (t_u8 *) "]:TID", 5);
+    pOutBuf += 5;
+    *pOutBuf++ = tid + '0';
+
+    memcpy(priv->adapter, pOutBuf, (t_u8 *) ":UP", 3);
+    pOutBuf += 3;
+    *pOutBuf++ = up + '0';
+
+    *pOutBuf = '\0';
+
+    pevent->bss_index = priv->bss_index;
+    pevent->event_id = MLAN_EVENT_ID_DRV_REPORT_STRING;
+    pevent->event_len = wlan_strlen((const t_s8 *) (pevent->event_buf));
+
+    wlan_recv_event(priv, MLAN_EVENT_ID_DRV_REPORT_STRING, pevent);
+}
+#endif /* STA_SUPPORT */
+
+/**
+ *  @brief This function gets the highest priority list pointer
+ *  
+ *  @param pmadapter      A pointer to mlan_adapter
+ *  @param priv           A pointer to mlan_private
+ *  @param tid            A pointer to return tid
+ *
+ *  @return             raListTbl
+ */
+static raListTbl *
+wlan_wmm_get_highest_priolist_ptr(pmlan_adapter pmadapter,
+                                  pmlan_private * priv, int *tid)
+{
+    pmlan_private priv_tmp;
+    raListTbl *ptr, *head;
+    mlan_bssprio_node *bssprio_node, *bssprio_head;
+    tid_tbl_t *tid_ptr;
+    int i, j;
+    int next_prio = 0;
+    int next_tid = 0;
+    ENTER();
+
+    PRINTM(MDAT_D, "POP\n");
+    for (j = pmadapter->priv_num - 1; j >= 0; --j) {
+        if (!(util_peek_list(pmadapter->pmoal_handle,
+                             &pmadapter->bssprio_tbl[j].bssprio_head,
+                             pmadapter->callbacks.moal_spin_lock,
+                             pmadapter->callbacks.moal_spin_unlock)))
+            continue;
+
+        if (pmadapter->bssprio_tbl[j].bssprio_cur == (mlan_bssprio_node *)
+            & pmadapter->bssprio_tbl[j].bssprio_head) {
+            pmadapter->bssprio_tbl[j].bssprio_cur =
+                pmadapter->bssprio_tbl[j].bssprio_cur->pnext;
+        }
+
+        bssprio_head = bssprio_node = pmadapter->bssprio_tbl[j].bssprio_cur;
+
+        do {
+            priv_tmp = bssprio_node->priv;
+
+            if ((priv_tmp->port_ctrl_mode == MTRUE)
+                && (priv_tmp->port_open == MFALSE)) {
+                PRINTM(MINFO, "get_highest_prio_ptr(): "
+                       "PORT_CLOSED Ignore pkts from BSS%d\n",
+                       priv_tmp->bss_index);
+                /* Ignore data pkts from a BSS if port is closed */
+                goto next_intf;
+            }
+
+            pmadapter->callbacks.moal_spin_lock(pmadapter->pmoal_handle,
+                                                priv_tmp->wmm.ra_list_spinlock);
+
+            for (i = util_scalar_read(pmadapter->pmoal_handle,
+                                      &priv_tmp->wmm.highest_queued_prio,
+                                      MNULL, MNULL); i >= LOW_PRIO_TID; --i) {
+
+                tid_ptr = &(priv_tmp)->wmm.tid_tbl_ptr[tos_to_tid[i]];
+                if (!util_peek_list
+                    (pmadapter->pmoal_handle, &tid_ptr->ra_list, MNULL, MNULL))
+                    continue;
+
+                /* 
+                 * Always choose the next ra we transmitted 
+                 * last time, this way we pick the ra's in 
+                 * round robin fashion.
+                 */
+                head = ptr = tid_ptr->ra_list_curr->pnext;
+                if (ptr == (raListTbl *) & tid_ptr->ra_list)
+                    head = ptr = ptr->pnext;
+
+                do {
+                    if (!ptr->tx_pause &&
+                        util_peek_list(pmadapter->pmoal_handle, &ptr->buf_head,
+                                       MNULL, MNULL)) {
+
+                        /* Because WMM only support BK/BE/VI/VO, we have 8 tid
+                           We should balance the traffic of the same AC */
+                        if (i % 2)
+                            next_prio = i - 1;
+                        else
+                            next_prio = i + 1;
+                        next_tid = tos_to_tid[next_prio];
+                        if (priv_tmp->wmm.pkts_queued[next_tid])
+                            util_scalar_write(pmadapter->pmoal_handle,
+                                              &priv_tmp->wmm.
+                                              highest_queued_prio, next_prio,
+                                              MNULL, MNULL);
+                        else
+                            /* if highest_queued_prio > i, set it to i */
+                            util_scalar_conditional_write(pmadapter->
+                                                          pmoal_handle,
+                                                          &priv_tmp->wmm.
+                                                          highest_queued_prio,
+                                                          MLAN_SCALAR_COND_GREATER_THAN,
+                                                          i, i, MNULL, MNULL);
+                        *priv = priv_tmp;
+                        *tid = tos_to_tid[i];
+                        /* hold priv->ra_list_spinlock to maintain ptr */
+                        PRINTM(MDAT_D, "get highest prio ptr %p, tid %d\n",
+                               ptr, *tid);
+                        LEAVE();
+                        return ptr;
+                    }
+
+                    if ((ptr = ptr->pnext) == (raListTbl *) & tid_ptr->ra_list)
+                        ptr = ptr->pnext;
+                } while (ptr != head);
+            }
+
+            /* No packet at any TID for this priv.  Mark as such to skip
+               checking TIDs for this priv (until pkt is added). */
+            util_scalar_write(pmadapter->pmoal_handle,
+                              &priv_tmp->wmm.highest_queued_prio,
+                              NO_PKT_PRIO_TID, MNULL, MNULL);
+
+            pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                                  priv_tmp->wmm.
+                                                  ra_list_spinlock);
+
+          next_intf:
+            if ((bssprio_node = bssprio_node->pnext) == (mlan_bssprio_node *)
+                & pmadapter->bssprio_tbl[j].bssprio_head)
+                bssprio_node = bssprio_node->pnext;
+        } while (bssprio_node != bssprio_head);
+    }
+
+    LEAVE();
+    return MNULL;
+}
+
+/**
+ *  @brief This function gets the number of packets in the Tx queue
+ *  
+ *  @param priv         A pointer to mlan_private
+ *  @param ptr          A pointer to RA list table
+ *  @param maxBufSize   Maximum buffer size
+ *
+ *  @return             Packet count
+ */
+static int
+wlan_num_pkts_in_txq(mlan_private * priv, raListTbl * ptr, int maxBufSize)
+{
+    int count = 0, total_size = 0;
+    pmlan_buffer pmbuf;
+
+    ENTER();
+
+    for (pmbuf = (pmlan_buffer) ptr->buf_head.pnext;
+         pmbuf != (pmlan_buffer) (&ptr->buf_head); pmbuf = pmbuf->pnext) {
+
+        total_size += pmbuf->data_len;
+        if (total_size < maxBufSize)
+            ++count;
+        else
+            break;
+    }
+
+    LEAVE();
+    return count;
+}
+
+/**
+ *  @brief This function sends a single packet
+ *  
+ *  @param priv         A pointer to mlan_private
+ *  @param ptr          A pointer to RA list table
+ *  @param ptrindex     ptr's TID index
+ *
+ *  @return             N/A
+ */
+static void INLINE
+wlan_send_single_packet(pmlan_private priv, raListTbl * ptr, int ptrindex)
+{
+    pmlan_buffer pmbuf;
+    pmlan_buffer pmbuf_next;
+    mlan_tx_param tx_param;
+    pmlan_adapter pmadapter = priv->adapter;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    if ((pmbuf = (pmlan_buffer) util_dequeue_list(pmadapter->pmoal_handle,
+                                                  &ptr->buf_head,
+                                                  MNULL, MNULL))) {
+        PRINTM(MINFO, "Dequeuing the packet %p %p\n", ptr, pmbuf);
+        priv->wmm.pkts_queued[ptrindex]--;
+        util_scalar_decrement(pmadapter->pmoal_handle,
+                              &priv->wmm.tx_pkts_queued, MNULL, MNULL);
+        ptr->total_pkts--;
+        pmbuf_next = (pmlan_buffer) util_peek_list(pmadapter->pmoal_handle,
+                                                   &ptr->buf_head,
+                                                   MNULL, MNULL);
+        pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                              priv->wmm.ra_list_spinlock);
+
+        tx_param.next_pkt_len = ((pmbuf_next)
+                                 ? pmbuf_next->data_len + sizeof(TxPD) : 0);
+        status = wlan_process_tx(priv, pmbuf, &tx_param);
+
+        if (status == MLAN_STATUS_RESOURCE) {
+            /** Queue the packet back at the head */
+            PRINTM(MDAT_D, "Queuing pkt back to raList %p %p\n", ptr, pmbuf);
+            pmadapter->callbacks.moal_spin_lock(pmadapter->pmoal_handle,
+                                                priv->wmm.ra_list_spinlock);
+
+            if (!wlan_is_ralist_valid(priv, ptr, ptrindex)) {
+                pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                                      priv->wmm.
+                                                      ra_list_spinlock);
+                wlan_write_data_complete(pmadapter, pmbuf, MLAN_STATUS_FAILURE);
+                LEAVE();
+                return;
+            }
+            priv->wmm.pkts_queued[ptrindex]++;
+            util_scalar_increment(pmadapter->pmoal_handle,
+                                  &priv->wmm.tx_pkts_queued, MNULL, MNULL);
+            util_enqueue_list_head(pmadapter->pmoal_handle, &ptr->buf_head,
+                                   (pmlan_linked_list) pmbuf, MNULL, MNULL);
+
+            ptr->total_pkts++;
+            pmbuf->flags |= MLAN_BUF_FLAG_REQUEUED_PKT;
+            pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                                  priv->wmm.ra_list_spinlock);
+        } else {
+            pmadapter->callbacks.moal_spin_lock(pmadapter->pmoal_handle,
+                                                priv->wmm.ra_list_spinlock);
+            if (wlan_is_ralist_valid(priv, ptr, ptrindex)) {
+                priv->wmm.packets_out[ptrindex]++;
+                priv->wmm.tid_tbl_ptr[ptrindex].ra_list_curr = ptr;
+            }
+            pmadapter->bssprio_tbl[priv->bss_priority].bssprio_cur =
+                pmadapter->bssprio_tbl[priv->bss_priority].bssprio_cur->pnext;
+            pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                                  priv->wmm.ra_list_spinlock);
+        }
+    } else {
+        pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                              priv->wmm.ra_list_spinlock);
+        PRINTM(MINFO, "Nothing to send\n");
+    }
+
+    LEAVE();
+}
+
+/**
+ *  @brief This function checks if this mlan_buffer is already processed.
+ *  
+ *  @param priv     A pointer to mlan_private
+ *  @param ptr      A pointer to RA list table
+ *
+ *  @return 	    MTRUE or MFALSE
+ */
+static int INLINE
+wlan_is_ptr_processed(mlan_private * priv, raListTbl * ptr)
+{
+    pmlan_buffer pmbuf;
+
+    if ((pmbuf = (pmlan_buffer) util_peek_list(priv->adapter->pmoal_handle,
+                                               &ptr->buf_head, MNULL, MNULL))
+        && (pmbuf->flags & MLAN_BUF_FLAG_REQUEUED_PKT))
+        return MTRUE;
+
+    return MFALSE;
+}
+
+/**
+ *  @brief This function sends a single packet that has been processed
+ *  
+ *  @param priv         A pointer to mlan_private
+ *  @param ptr          A pointer to RA list table
+ *  @param ptrindex     ptr's TID index
+ *
+ *  @return             N/A
+ */
+static void INLINE
+wlan_send_processed_packet(pmlan_private priv, raListTbl * ptr, int ptrindex)
+{
+    pmlan_buffer pmbuf;
+    pmlan_adapter pmadapter = priv->adapter;
+    mlan_status ret = MLAN_STATUS_FAILURE;
+
+    if ((pmbuf = (pmlan_buffer) util_dequeue_list(pmadapter->pmoal_handle,
+                                                  &ptr->buf_head,
+                                                  MNULL, MNULL))) {
+        pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                              priv->wmm.ra_list_spinlock);
+        pmadapter->data_sent = MTRUE;
+        ret =
+            pmadapter->callbacks.moal_write_data_async(pmadapter->pmoal_handle,
+                                                       pmbuf, MLAN_USB_EP_DATA);
+        switch (ret) {
+        case MLAN_STATUS_RESOURCE:
+            PRINTM(MINFO, "MLAN_STATUS_RESOURCE is returned\n");
+            pmadapter->callbacks.moal_spin_lock(pmadapter->pmoal_handle,
+                                                priv->wmm.ra_list_spinlock);
+
+            if (!wlan_is_ralist_valid(priv, ptr, ptrindex)) {
+                pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                                      priv->wmm.
+                                                      ra_list_spinlock);
+                wlan_write_data_complete(pmadapter, pmbuf, MLAN_STATUS_FAILURE);
+                LEAVE();
+                return;
+            }
+            util_enqueue_list_head(pmadapter->pmoal_handle,
+                                   &ptr->buf_head,
+                                   (pmlan_linked_list) pmbuf, MNULL, MNULL);
+
+            pmbuf->flags |= MLAN_BUF_FLAG_REQUEUED_PKT;
+            pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                                  priv->wmm.ra_list_spinlock);
+            break;
+        case MLAN_STATUS_FAILURE:
+            pmadapter->data_sent = MFALSE;
+            PRINTM(MERROR, "Error: Failed to write data\n");
+            pmadapter->dbg.num_tx_host_to_card_failure++;
+            pmbuf->status_code = MLAN_ERROR_DATA_TX_FAIL;
+            wlan_write_data_complete(pmadapter, pmbuf, ret);
+            break;
+        case MLAN_STATUS_PENDING:
+            pmadapter->data_sent = MFALSE;
+        default:
+            break;
+        }
+        if (ret != MLAN_STATUS_RESOURCE) {
+            pmadapter->callbacks.moal_spin_lock(pmadapter->pmoal_handle,
+                                                priv->wmm.ra_list_spinlock);
+            if (wlan_is_ralist_valid(priv, ptr, ptrindex)) {
+                priv->wmm.packets_out[ptrindex]++;
+                priv->wmm.tid_tbl_ptr[ptrindex].ra_list_curr = ptr;
+                ptr->total_pkts--;
+            }
+            pmadapter->bssprio_tbl[priv->bss_priority].bssprio_cur =
+                pmadapter->bssprio_tbl[priv->bss_priority].bssprio_cur->pnext;
+            priv->wmm.pkts_queued[ptrindex]--;
+            util_scalar_decrement(pmadapter->pmoal_handle,
+                                  &priv->wmm.tx_pkts_queued, MNULL, MNULL);
+            pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                                  priv->wmm.ra_list_spinlock);
+        }
+    } else {
+        pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                              priv->wmm.ra_list_spinlock);
+    }
+}
+
+/**
+ *  @brief This function dequeues a packet
+ *  
+ *  @param pmadapter  A pointer to mlan_adapter
+ *
+ *  @return 	    MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static int
+wlan_dequeue_tx_packet(pmlan_adapter pmadapter)
+{
+    raListTbl *ptr;
+    pmlan_private priv = MNULL;
+    int ptrindex = 0;
+    t_u8 ra[MLAN_MAC_ADDR_LENGTH];
+    int tid_del = 0;
+    int tid = 0;
+
+    ENTER();
+
+    if (!(ptr = wlan_wmm_get_highest_priolist_ptr(pmadapter, &priv, &ptrindex))) {
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+
+    /* Note:- Spinlock is locked in wlan_wmm_get_highest_priolist_ptr when it
+       returns a pointer (for the priv it returns), and is unlocked in
+       wlan_send_processed_packet, wlan_send_single_packet or
+       wlan_11n_aggregate_pkt.  The spinlock would be required for some parts
+       of both of function.  But, the the bulk of these function will execute
+       w/o spinlock.  Unlocking the spinlock inside these function will help
+       us avoid taking the spinlock again, check to see if the ptr is still
+       valid and then proceed. This is done purely to increase execution time. 
+     */
+
+    /* Note:- Also, anybody adding code which does not get into
+       wlan_send_processed_packet, wlan_send_single_packet, or
+       wlan_11n_aggregate_pkt should make sure ra_list_spinlock is freed.
+       Otherwise there would be a lock up. */
+
+    tid = wlan_get_tid(priv->adapter, ptr);
+    if (tid >= MAX_NUM_TID)
+        tid = wlan_wmm_downgrade_tid(priv, tid);
+
+    if (wlan_is_ptr_processed(priv, ptr)) {
+        wlan_send_processed_packet(priv, ptr, ptrindex);
+        LEAVE();
+        return MLAN_STATUS_SUCCESS;
+    }
+
+    if (!ptr->is_11n_enabled || wlan_is_bastream_setup(priv, ptr, tid)
+#ifdef STA_SUPPORT
+        || ((priv->sec_info.ewpa_enabled == MFALSE) &&
+            ((priv->sec_info.wpa_enabled
+              || priv->sec_info.wpa2_enabled) &&
+             priv->wpa_is_gtk_set == MFALSE))
+        || priv->wps.session_enable
+#endif /* STA_SUPPORT */
+        ) {
+        wlan_send_single_packet(priv, ptr, ptrindex);
+    } else {
+        if (wlan_is_ampdu_allowed(priv, ptr, tid) &&
+            (ptr->packet_count > ptr->ba_packet_threshold)) {
+            if (wlan_is_bastream_avail(priv)) {
+                PRINTM(MINFO, "BA setup threshold %d reached. tid=%d\n",
+                       ptr->packet_count, tid);
+                wlan_11n_create_txbastream_tbl(priv,
+                                               ptr->ra, tid,
+                                               BA_STREAM_SETUP_INPROGRESS);
+                wlan_send_addba(priv, tid, ptr->ra);
+            } else if (wlan_find_stream_to_delete(priv, ptr, tid, &tid_del, ra)) {
+                PRINTM(MDAT_D, "tid_del=%d tid=%d\n", tid_del, tid);
+                wlan_11n_create_txbastream_tbl(priv,
+                                               ptr->ra, tid,
+                                               BA_STREAM_SETUP_INPROGRESS);
+                wlan_send_delba(priv, tid_del, ra, 1);
+            }
+        }
+        if (wlan_is_amsdu_allowed(priv, ptr, tid) &&
+            (wlan_num_pkts_in_txq(priv, ptr,
+                                  pmadapter->tx_buf_size) >= MIN_NUM_AMSDU)) {
+            wlan_11n_aggregate_pkt(priv, ptr, INTF_HEADER_LEN, ptrindex);
+        } else {
+            wlan_send_single_packet(priv, ptr, ptrindex);
+        }
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief update tx_pause flag in ra_list
+ *
+ *  @param priv		  A pointer to mlan_private
+ *  @param mac        peer mac address
+ *  @param tx_pause   tx_pause flag (0/1)
+ *
+ *  @return           N/A
+ */
+t_void
+wlan_updata_ralist_tx_pause(pmlan_private priv, t_u8 * mac, t_u8 tx_pause)
+{
+    raListTbl *ra_list;
+    int i;
+    pmlan_adapter pmadapter = priv->adapter;
+    t_u32 pkt_cnt = 0;
+    t_u32 tx_pkts_queued = 0;
+    ENTER();
+
+    pmadapter->callbacks.moal_spin_lock(pmadapter->pmoal_handle,
+                                        priv->wmm.ra_list_spinlock);
+    for (i = 0; i < MAX_NUM_TID; ++i) {
+        ra_list = wlan_wmm_get_ralist_node(priv, i, mac);
+        if (ra_list) {
+            pkt_cnt += ra_list->total_pkts;
+            ra_list->tx_pause = tx_pause;
+        }
+    }
+    if (pkt_cnt) {
+        tx_pkts_queued = util_scalar_read(pmadapter->pmoal_handle,
+                                          &priv->wmm.tx_pkts_queued, MNULL,
+                                          MNULL);
+        if (tx_pause)
+            tx_pkts_queued -= pkt_cnt;
+        else
+            tx_pkts_queued += pkt_cnt;
+        util_scalar_write(priv->adapter->pmoal_handle,
+                          &priv->wmm.tx_pkts_queued, tx_pkts_queued, MNULL,
+                          MNULL);
+        util_scalar_write(priv->adapter->pmoal_handle,
+                          &priv->wmm.highest_queued_prio, HIGH_PRIO_TID, MNULL,
+                          MNULL);
+    }
+    pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                          priv->wmm.ra_list_spinlock);
+    LEAVE();
+}
+
+#ifdef STA_SUPPORT
+#endif /* STA_SUPPORT */
+/********************************************************
+    Global Functions
+********************************************************/
+
+/**
+ *  @brief Get the threshold value for BA setup using system time.
+ *
+ *  @param pmadapter       Pointer to the mlan_adapter structure
+ *
+ *  @return         threshold value.
+ */
+t_u8
+wlan_get_random_ba_threshold(pmlan_adapter pmadapter)
+{
+    t_u32 sec, usec;
+    t_u8 ba_threshold = 0;
+
+    ENTER();
+
+    /* setup ba_packet_threshold here random number between [1 -
+       BA_SETUP_MAX_PACKET_THRESHOLD] */
+
+#define BA_SETUP_MAX_PACKET_THRESHOLD   16
+
+    pmadapter->callbacks.moal_get_system_time(pmadapter->pmoal_handle, &sec,
+                                              &usec);
+    sec = (sec & 0xFFFF) + (sec >> 16);
+    usec = (usec & 0xFFFF) + (usec >> 16);
+
+    ba_threshold = (((sec << 16) + usec) % BA_SETUP_MAX_PACKET_THRESHOLD);
+    PRINTM(MINFO, "setup BA after %d packets\n", ba_threshold);
+
+    LEAVE();
+    return ba_threshold;
+}
+
+/**
+ *  @brief  This function cleans Tx/Rx queues
+ *
+ *  @param priv		A pointer to mlan_private
+ *
+ *  @return		N/A
+ */
+t_void
+wlan_clean_txrx(pmlan_private priv)
+{
+    mlan_adapter *pmadapter = priv->adapter;
+    t_u8 i = 0;
+
+    ENTER();
+
+    if (GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_STA) {
+        wlan_cleanup_bypass_txq(pmadapter);
+    }
+
+    wlan_11n_cleanup_reorder_tbl(priv);
+
+    pmadapter->callbacks.moal_spin_lock(pmadapter->pmoal_handle,
+                                        priv->wmm.ra_list_spinlock);
+
+    wlan_wmm_cleanup_queues(priv);
+    wlan_11n_deleteall_txbastream_tbl(priv);
+    wlan_wmm_delete_all_ralist(priv);
+    memcpy(pmadapter, tos_to_tid, ac_to_tid, sizeof(tos_to_tid));
+    for (i = 0; i < MAX_NUM_TID; i++) {
+        tos_to_tid_inv[tos_to_tid[i]] = (t_u8) i;
+    }
+#if defined(UAP_SUPPORT)
+    priv->num_drop_pkts = 0;
+#endif
+    pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                          priv->wmm.ra_list_spinlock);
+
+    LEAVE();
+}
+
+/**
+ *  @brief Set the WMM queue priorities to their default values
+ *
+ *  @param priv     Pointer to the mlan_private driver data struct
+ *
+ *  @return         N/A
+ */
+void
+wlan_wmm_default_queue_priorities(pmlan_private priv)
+{
+    ENTER();
+
+    /* Default queue priorities: VO->VI->BE->BK */
+    priv->wmm.queue_priority[0] = WMM_AC_VO;
+    priv->wmm.queue_priority[1] = WMM_AC_VI;
+    priv->wmm.queue_priority[2] = WMM_AC_BE;
+    priv->wmm.queue_priority[3] = WMM_AC_BK;
+
+    LEAVE();
+}
+
+/**
+ *  @brief Initialize WMM priority queues
+ *
+ *  @param priv     Pointer to the mlan_private driver data struct
+ *  @param pwmm_ie  Pointer to the IEEEtypes_WmmParameter_t data struct
+ *
+ *  @return         N/A
+ */
+void
+wlan_wmm_setup_queue_priorities(pmlan_private priv,
+                                IEEEtypes_WmmParameter_t * pwmm_ie)
+{
+    t_u16 cw_min, avg_back_off, tmp[4];
+    t_u32 i, j, num_ac;
+    t_u8 ac_idx;
+
+    ENTER();
+
+    if (!pwmm_ie || priv->wmm_enabled == MFALSE) {
+        /* WMM is not enabled, just set the defaults and return */
+        wlan_wmm_default_queue_priorities(priv);
+        LEAVE();
+        return;
+    }
+
+    HEXDUMP("WMM: setup_queue_priorities: param IE",
+            (t_u8 *) pwmm_ie, sizeof(IEEEtypes_WmmParameter_t));
+
+    PRINTM(MINFO, "WMM Parameter IE: version=%d, "
+           "qos_info Parameter Set Count=%d, Reserved=%#x\n",
+           pwmm_ie->vend_hdr.version, pwmm_ie->qos_info.para_set_count,
+           pwmm_ie->reserved);
+
+    for (num_ac = 0; num_ac < NELEMENTS(pwmm_ie->ac_params); num_ac++) {
+        cw_min = (1 << pwmm_ie->ac_params[num_ac].ecw.ecw_min) - 1;
+        avg_back_off
+            = (cw_min >> 1) + pwmm_ie->ac_params[num_ac].aci_aifsn.aifsn;
+
+        ac_idx = wmm_aci_to_qidx_map[pwmm_ie->ac_params[num_ac].aci_aifsn.aci];
+        priv->wmm.queue_priority[ac_idx] = ac_idx;
+        tmp[ac_idx] = avg_back_off;
+
+        PRINTM(MCMND, "WMM: CWmax=%d CWmin=%d Avg Back-off=%d\n",
+               (1 << pwmm_ie->ac_params[num_ac].ecw.ecw_max) - 1,
+               cw_min, avg_back_off);
+        PRINTM_AC(&pwmm_ie->ac_params[num_ac]);
+    }
+
+    HEXDUMP("WMM: avg_back_off", (t_u8 *) tmp, sizeof(tmp));
+    HEXDUMP("WMM: queue_priority", priv->wmm.queue_priority,
+            sizeof(priv->wmm.queue_priority));
+
+    /* Bubble sort */
+    for (i = 0; i < num_ac; i++) {
+        for (j = 1; j < num_ac - i; j++) {
+            if (tmp[j - 1] > tmp[j]) {
+                SWAP_U16(tmp[j - 1], tmp[j]);
+                SWAP_U8(priv->wmm.queue_priority[j - 1],
+                        priv->wmm.queue_priority[j]);
+            } else if (tmp[j - 1] == tmp[j]) {
+                if (priv->wmm.queue_priority[j - 1]
+                    < priv->wmm.queue_priority[j]) {
+                    SWAP_U8(priv->wmm.queue_priority[j - 1],
+                            priv->wmm.queue_priority[j]);
+                }
+            }
+        }
+    }
+
+    wlan_wmm_queue_priorities_tid(priv, priv->wmm.queue_priority);
+
+    HEXDUMP("WMM: avg_back_off, sort", (t_u8 *) tmp, sizeof(tmp));
+    DBG_HEXDUMP(MCMD_D, "WMM: queue_priority, sort", priv->wmm.queue_priority,
+                sizeof(priv->wmm.queue_priority));
+    LEAVE();
+}
+
+/**
+ *  @brief Downgrade WMM priority queue
+ *
+ *  @param priv     Pointer to the mlan_private driver data struct
+ *
+ *  @return         N/A
+ */
+void
+wlan_wmm_setup_ac_downgrade(pmlan_private priv)
+{
+    int ac_val;
+
+    ENTER();
+
+    PRINTM(MINFO, "WMM: AC Priorities: BK(0), BE(1), VI(2), VO(3)\n");
+
+    if (priv->wmm_enabled == MFALSE) {
+        /* WMM is not enabled, default priorities */
+        for (ac_val = WMM_AC_BK; ac_val <= WMM_AC_VO; ac_val++) {
+            priv->wmm.ac_down_graded_vals[ac_val] = (mlan_wmm_ac_e) ac_val;
+        }
+    } else {
+        for (ac_val = WMM_AC_BK; ac_val <= WMM_AC_VO; ac_val++) {
+            priv->wmm.ac_down_graded_vals[ac_val]
+                = wlan_wmm_eval_downgrade_ac(priv, (mlan_wmm_ac_e) ac_val);
+            PRINTM(MINFO, "WMM: AC PRIO %d maps to %d\n",
+                   ac_val, priv->wmm.ac_down_graded_vals[ac_val]);
+        }
+    }
+
+    LEAVE();
+}
+
+/**
+ *  @brief  Allocate and add a RA list for all TIDs with the given RA
+ *
+ *  @param priv  Pointer to the mlan_private driver data struct
+ *  @param ra	 Address of the receiver STA (AP in case of infra)
+ *
+ *  @return      N/A
+ */
+void
+wlan_ralist_add(mlan_private * priv, t_u8 * ra)
+{
+    int i;
+    raListTbl *ra_list;
+    pmlan_adapter pmadapter = priv->adapter;
+
+    ENTER();
+
+    for (i = 0; i < MAX_NUM_TID; ++i) {
+        ra_list = wlan_wmm_allocate_ralist_node(pmadapter, ra);
+        PRINTM(MINFO, "Creating RA List %p for tid %d\n", ra_list, i);
+        if (!ra_list)
+            break;
+        if (queuing_ra_based(priv)) {
+            ra_list->is_11n_enabled = wlan_is_11n_enabled(priv, ra);
+            ra_list->tx_pause = wlan_is_tx_pause(priv, ra);
+        } else {
+            ra_list->is_11n_enabled = IS_11N_ENABLED(priv);
+        }
+
+        PRINTM(MDATA, "ralist %p: is_11n_enabled=%d\n",
+               ra_list, ra_list->is_11n_enabled);
+
+        if (ra_list->is_11n_enabled) {
+            ra_list->packet_count = 0;
+            ra_list->ba_packet_threshold =
+                wlan_get_random_ba_threshold(pmadapter);
+        }
+
+        util_enqueue_list_tail(pmadapter->pmoal_handle,
+                               &priv->wmm.tid_tbl_ptr[i].ra_list,
+                               (pmlan_linked_list) ra_list, MNULL, MNULL);
+
+        if (!priv->wmm.tid_tbl_ptr[i].ra_list_curr)
+            priv->wmm.tid_tbl_ptr[i].ra_list_curr = ra_list;
+    }
+
+    LEAVE();
+}
+
+/**
+ *  @brief Initialize the WMM state information and the WMM data path queues.
+ *
+ *  @param pmadapter  Pointer to the mlan_adapter data structure
+ *
+ *  @return         N/A
+ */
+t_void
+wlan_wmm_init(pmlan_adapter pmadapter)
+{
+    int i, j;
+    pmlan_private priv;
+
+    ENTER();
+
+    for (j = 0; j < pmadapter->priv_num; ++j) {
+        if ((priv = pmadapter->priv[j])) {
+            for (i = 0; i < MAX_NUM_TID; ++i) {
+                priv->aggr_prio_tbl[i].amsdu = BA_STREAM_NOT_ALLOWED;
+                priv->aggr_prio_tbl[i].ampdu_ap =
+                    priv->aggr_prio_tbl[i].ampdu_user = tos_to_tid_inv[i];
+                priv->wmm.pkts_queued[i] = 0;
+                priv->wmm.tid_tbl_ptr[i].ra_list_curr = MNULL;
+            }
+
+            priv->aggr_prio_tbl[6].ampdu_ap
+                = priv->aggr_prio_tbl[6].ampdu_user = BA_STREAM_NOT_ALLOWED;
+
+            priv->aggr_prio_tbl[7].ampdu_ap
+                = priv->aggr_prio_tbl[7].ampdu_user = BA_STREAM_NOT_ALLOWED;
+
+            priv->add_ba_param.timeout = MLAN_DEFAULT_BLOCK_ACK_TIMEOUT;
+            priv->add_ba_param.tx_win_size = MLAN_AMPDU_DEF_TXWINSIZE;
+            priv->add_ba_param.rx_win_size = MLAN_AMPDU_DEF_RXWINSIZE;
+            memset(priv->adapter, priv->rx_seq, 0xff, sizeof(priv->rx_seq));
+            wlan_wmm_default_queue_priorities(priv);
+        }
+    }
+
+    LEAVE();
+}
+
+/**
+ *  @brief Setup the queue priorities and downgrade any queues as required
+ *         by the WMM info.  Setups default values if WMM is not active
+ *         for this association.
+ *
+ *  @param priv     Pointer to the mlan_private driver data struct
+ *
+ *  @return         N/A
+ */
+void
+wlan_wmm_setup_queues(pmlan_private priv)
+{
+    ENTER();
+    wlan_wmm_setup_queue_priorities(priv, MNULL);
+    wlan_wmm_setup_ac_downgrade(priv);
+    LEAVE();
+}
+
+#ifdef STA_SUPPORT
+/**
+ *  @brief  Send a command to firmware to retrieve the current WMM status
+ *
+ *  @param priv     Pointer to the mlan_private driver data struct
+ *
+ *  @return         MLAN_STATUS_SUCCESS; MLAN_STATUS_FAILURE
+ */
+mlan_status
+wlan_cmd_wmm_status_change(pmlan_private priv)
+{
+    return wlan_prepare_cmd(priv, HostCmd_CMD_WMM_GET_STATUS, 0, 0, 0, MNULL);
+}
+#endif
+
+/**
+ *  @brief Check if wmm TX queue is empty
+ *
+ *  @param pmadapter  Pointer to the mlan_adapter driver data struct
+ *
+ *  @return         MFALSE if not empty; MTRUE if empty
+ */
+int
+wlan_wmm_lists_empty(pmlan_adapter pmadapter)
+{
+    int j;
+    pmlan_private priv;
+
+    ENTER();
+
+    for (j = 0; j < pmadapter->priv_num; ++j) {
+        if ((priv = pmadapter->priv[j])) {
+            if ((priv->port_ctrl_mode == MTRUE) && (priv->port_open == MFALSE)) {
+                PRINTM(MINFO,
+                       "wmm_lists_empty: PORT_CLOSED Ignore pkts from BSS%d\n",
+                       j);
+                continue;
+            }
+
+            if (util_scalar_read(pmadapter->pmoal_handle,
+                                 &priv->wmm.tx_pkts_queued,
+                                 pmadapter->callbacks.moal_spin_lock,
+                                 pmadapter->callbacks.moal_spin_unlock)) {
+                LEAVE();
+                return MFALSE;
+            }
+        }
+    }
+
+    LEAVE();
+    return MTRUE;
+}
+
+/**
+ *   @brief Get ralist node
+ *  
+ *   @param priv     Pointer to the mlan_private driver data struct
+ *   @param tid      TID
+ *   @param ra_addr  Pointer to the route address
+ * 
+ *   @return         ra_list or MNULL
+ */
+raListTbl *
+wlan_wmm_get_ralist_node(pmlan_private priv, t_u8 tid, t_u8 * ra_addr)
+{
+    raListTbl *ra_list;
+    ENTER();
+    ra_list =
+        (raListTbl *) util_peek_list(priv->adapter->pmoal_handle,
+                                     &priv->wmm.tid_tbl_ptr[tid].ra_list, MNULL,
+                                     MNULL);
+    while (ra_list && (ra_list != (raListTbl *)
+                       & priv->wmm.tid_tbl_ptr[tid].ra_list)) {
+        if (!memcmp(priv->adapter, ra_list->ra, ra_addr, MLAN_MAC_ADDR_LENGTH)) {
+            LEAVE();
+            return ra_list;
+        }
+        ra_list = ra_list->pnext;
+    }
+    LEAVE();
+    return MNULL;
+}
+
+/**
+ *   @brief Check if RA list is valid or not
+ *  
+ *   @param priv     Pointer to the mlan_private driver data struct
+ *   @param ra_list  Pointer to raListTbl
+ *   @param ptrindex TID pointer index
+ * 
+ *   @return         MTRUE- valid. MFALSE- invalid. 
+ */
+int
+wlan_is_ralist_valid(mlan_private * priv, raListTbl * ra_list, int ptrindex)
+{
+    raListTbl *rlist;
+
+    rlist =
+        (raListTbl *) util_peek_list(priv->adapter->pmoal_handle,
+                                     &priv->wmm.tid_tbl_ptr[ptrindex].ra_list,
+                                     MNULL, MNULL);
+
+    while (rlist && (rlist != (raListTbl *)
+                     & priv->wmm.tid_tbl_ptr[ptrindex].ra_list)) {
+        if (rlist == ra_list)
+            return MTRUE;
+
+        rlist = rlist->pnext;
+    }
+
+    return MFALSE;
+}
+
+/**
+ *  @brief  Update an existing raList with a new RA and 11n capability
+ *
+ *  @param priv     Pointer to the mlan_private driver data struct
+ *  @param old_ra   Old receiver address
+ *  @param new_ra   New receiver address
+ *
+ *  @return         integer count of updated nodes
+ */
+int
+wlan_ralist_update(mlan_private * priv, t_u8 * old_ra, t_u8 * new_ra)
+{
+    t_u8 tid;
+    int update_count;
+    raListTbl *ra_list;
+
+    ENTER();
+
+    update_count = 0;
+
+    for (tid = 0; tid < MAX_NUM_TID; ++tid) {
+
+        ra_list = wlan_wmm_get_ralist_node(priv, tid, old_ra);
+
+        if (ra_list) {
+            update_count++;
+
+            if (queuing_ra_based(priv))
+                ra_list->is_11n_enabled = wlan_is_11n_enabled(priv, new_ra);
+            else
+                ra_list->is_11n_enabled = IS_11N_ENABLED(priv);
+
+            PRINTM(MINFO,
+                   "ralist_update: %p, %d, %02x:%02x:%02x:%02x:%02x:%02x-->"
+                   "%02x:%02x:%02x:%02x:%02x:%02x\n",
+                   ra_list, ra_list->is_11n_enabled,
+                   ra_list->ra[0], ra_list->ra[1],
+                   ra_list->ra[2], ra_list->ra[3],
+                   ra_list->ra[4], ra_list->ra[5],
+                   new_ra[0], new_ra[1],
+                   new_ra[2], new_ra[3], new_ra[4], new_ra[5]);
+
+            memcpy(priv->adapter, ra_list->ra, new_ra, MLAN_MAC_ADDR_LENGTH);
+        }
+    }
+
+    LEAVE();
+    return update_count;
+}
+
+/**
+ *  @brief Add packet to WMM queue
+ *
+ *  @param pmadapter  Pointer to the mlan_adapter driver data struct
+ *  @param pmbuf      Pointer to the mlan_buffer data struct
+ *
+ *  @return         N/A
+ */
+t_void
+wlan_wmm_add_buf_txqueue(pmlan_adapter pmadapter, pmlan_buffer pmbuf)
+{
+    pmlan_private priv = pmadapter->priv[pmbuf->bss_index];
+    t_u32 tid;
+    raListTbl *ra_list;
+    t_u8 ra[MLAN_MAC_ADDR_LENGTH], tid_down;
+
+    ENTER();
+    pmbuf->buf_type = MLAN_BUF_TYPE_DATA;
+    if (!priv->media_connected) {
+        PRINTM(MWARN, "Drop packet in disconnect state\n");
+        wlan_write_data_complete(pmadapter, pmbuf, MLAN_STATUS_FAILURE);
+        LEAVE();
+        return;
+    }
+    tid = pmbuf->priority;
+    pmadapter->callbacks.moal_spin_lock(pmadapter->pmoal_handle,
+                                        priv->wmm.ra_list_spinlock);
+    tid_down = wlan_wmm_downgrade_tid(priv, tid);
+
+    /* In case of infra as we have already created the list during association
+       we just don't have to call get_queue_raptr, we will have only 1 raptr
+       for a tid in case of infra */
+    if (!queuing_ra_based(priv)) {
+        ra_list = (raListTbl *) util_peek_list(pmadapter->pmoal_handle,
+                                               &priv->wmm.tid_tbl_ptr[tid_down].
+                                               ra_list, MNULL, MNULL);
+    } else {
+        memcpy(pmadapter, ra, pmbuf->pbuf + pmbuf->data_offset,
+               MLAN_MAC_ADDR_LENGTH);
+        /** put multicast/broadcast packet in the same ralist */
+        if (ra[0] & 0x01)
+            memset(pmadapter, ra, 0xff, sizeof(ra));
+        ra_list = wlan_wmm_get_queue_raptr(priv, tid_down, ra);
+    }
+
+    if (!ra_list) {
+        PRINTM(MWARN, "Drop packet, ra_list=%p, "
+               "media_connected=%d\n", ra_list, priv->media_connected);
+        pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                              priv->wmm.ra_list_spinlock);
+        wlan_write_data_complete(pmadapter, pmbuf, MLAN_STATUS_FAILURE);
+        LEAVE();
+        return;
+    }
+
+    PRINTM(MDATA, "Adding pkt to ra_list %p %p priority=%d, tid_down=%d\n",
+           ra_list, pmbuf, pmbuf->priority, tid_down);
+    util_enqueue_list_tail(pmadapter->pmoal_handle, &ra_list->buf_head,
+                           (pmlan_linked_list) pmbuf, MNULL, MNULL);
+
+    ra_list->total_pkts++;
+    ra_list->packet_count++;
+
+    priv->wmm.pkts_queued[tid_down]++;
+    if (!ra_list->tx_pause) {
+        util_scalar_increment(pmadapter->pmoal_handle,
+                              &priv->wmm.tx_pkts_queued, MNULL, MNULL);
+        /* if highest_queued_prio < prio(tid_down), set it to prio(tid_down) */
+        util_scalar_conditional_write(pmadapter->pmoal_handle,
+                                      &priv->wmm.highest_queued_prio,
+                                      MLAN_SCALAR_COND_LESS_THAN,
+                                      tos_to_tid_inv[tid_down],
+                                      tos_to_tid_inv[tid_down], MNULL, MNULL);
+    }
+    /* Record the current time the packet was queued; used to determine the
+       amount of time the packet was queued in the driver before it was sent to 
+       the firmware.  The delay is then sent along with the packet to the
+       firmware for aggregate delay calculation for stats and MSDU lifetime
+       expiry. */
+    pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                          priv->wmm.ra_list_spinlock);
+    pmadapter->callbacks.moal_get_system_time(pmadapter->pmoal_handle,
+                                              &pmbuf->in_ts_sec,
+                                              &pmbuf->in_ts_usec);
+
+    LEAVE();
+}
+
+#ifdef STA_SUPPORT
+/**
+ *  @brief Process the GET_WMM_STATUS command response from firmware
+ *
+ *  The GET_WMM_STATUS response may contain multiple TLVs for:
+ *      - AC Queue status TLVs
+ *      - Current WMM Parameter IE TLV
+ *      - Admission Control action frame TLVs
+ *
+ *  This function parses the TLVs and then calls further functions
+ *   to process any changes in the queue prioritize or state.
+ *
+ *  @param priv      Pointer to the mlan_private driver data struct
+ *  @param ptlv      Pointer to the tlv block returned in the response.
+ *  @param resp_len  Length of TLV block
+ *
+ *  @return MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_ret_wmm_get_status(pmlan_private priv, t_u8 * ptlv, int resp_len)
+{
+    t_u8 *pcurrent = ptlv;
+    t_u32 tlv_len;
+    t_u8 sendWmmEvent;
+    MrvlIEtypes_Data_t *pTlvHdr;
+    MrvlIEtypes_WmmQueueStatus_t *pTlvWmmQStatus;
+    IEEEtypes_WmmParameter_t *pWmmParamIe = MNULL;
+    WmmAcStatus_t *pac_status;
+
+    MrvlIETypes_ActionFrame_t *pTlvAction;
+    IEEEtypes_Action_WMM_AddTsRsp_t *pAddTsRsp;
+    IEEEtypes_Action_WMM_DelTs_t *pDelTs;
+
+    ENTER();
+
+    sendWmmEvent = MFALSE;
+
+    PRINTM(MINFO, "WMM: WMM_GET_STATUS cmdresp received: %d\n", resp_len);
+    HEXDUMP("CMD_RESP: WMM_GET_STATUS", pcurrent, resp_len);
+
+    while (resp_len >= sizeof(pTlvHdr->header)) {
+        pTlvHdr = (MrvlIEtypes_Data_t *) pcurrent;
+        tlv_len = wlan_le16_to_cpu(pTlvHdr->header.len);
+
+        switch (wlan_le16_to_cpu(pTlvHdr->header.type)) {
+        case TLV_TYPE_WMMQSTATUS:
+            pTlvWmmQStatus = (MrvlIEtypes_WmmQueueStatus_t *) pTlvHdr;
+            PRINTM(MEVENT, "WMM_STATUS: QSTATUS TLV: %d\n",
+                   pTlvWmmQStatus->queue_index);
+
+            PRINTM(MINFO,
+                   "CMD_RESP: WMM_GET_STATUS: QSTATUS TLV: %d, %d, %d\n",
+                   pTlvWmmQStatus->queue_index,
+                   pTlvWmmQStatus->flow_required, pTlvWmmQStatus->disabled);
+
+            pac_status = &priv->wmm.ac_status[pTlvWmmQStatus->queue_index];
+            pac_status->disabled = pTlvWmmQStatus->disabled;
+            pac_status->flow_required = pTlvWmmQStatus->flow_required;
+            pac_status->flow_created = pTlvWmmQStatus->flow_created;
+            break;
+
+        case WMM_IE:
+            /* 
+             * Point the regular IEEE IE 2 bytes into the Marvell IE
+             *   and setup the IEEE IE type and length byte fields
+             */
+
+            PRINTM(MEVENT, "WMM STATUS: WMM IE\n");
+
+            HEXDUMP("WMM: WMM TLV:", (t_u8 *) pTlvHdr, tlv_len + 4);
+
+            pWmmParamIe = (IEEEtypes_WmmParameter_t *) (pcurrent + 2);
+            pWmmParamIe->vend_hdr.len = (t_u8) tlv_len;
+            pWmmParamIe->vend_hdr.element_id = WMM_IE;
+
+            PRINTM(MINFO, "CMD_RESP: WMM_GET_STATUS: WMM Parameter Set: %d\n",
+                   pWmmParamIe->qos_info.para_set_count);
+
+            memcpy(priv->adapter,
+                   (t_u8 *) & priv->curr_bss_params.bss_descriptor.wmm_ie,
+                   pWmmParamIe, pWmmParamIe->vend_hdr.len + 2);
+            sendWmmEvent = MTRUE;
+            break;
+
+        case TLV_TYPE_IEEE_ACTION_FRAME:
+            PRINTM(MEVENT, "WMM_STATUS: IEEE Action Frame\n");
+            pTlvAction = (MrvlIETypes_ActionFrame_t *) pcurrent;
+
+            if (pTlvAction->actionFrame.wmmAc.tspecAct.category
+                == IEEE_MGMT_ACTION_CATEGORY_WMM_TSPEC) {
+
+                switch (pTlvAction->actionFrame.wmmAc.tspecAct.action) {
+                case TSPEC_ACTION_CODE_ADDTS_RSP:
+                    pAddTsRsp = &pTlvAction->actionFrame.wmmAc.addTsRsp;
+                    wlan_send_wmmac_host_event(priv, "ADDTS_RSP",
+                                               pTlvAction->srcAddr,
+                                               pAddTsRsp->tspecIE.TspecBody.
+                                               TSInfo.TID,
+                                               pAddTsRsp->tspecIE.TspecBody.
+                                               TSInfo.UserPri,
+                                               pAddTsRsp->statusCode);
+                    break;
+
+                case TSPEC_ACTION_CODE_DELTS:
+                    pDelTs = &pTlvAction->actionFrame.wmmAc.delTs;
+                    wlan_send_wmmac_host_event(priv, "DELTS_RX",
+                                               pTlvAction->srcAddr,
+                                               pDelTs->tspecIE.TspecBody.TSInfo.
+                                               TID,
+                                               pDelTs->tspecIE.TspecBody.TSInfo.
+                                               UserPri, pDelTs->reasonCode);
+                    break;
+
+                case TSPEC_ACTION_CODE_ADDTS_REQ:
+                default:
+                    break;
+                }
+            }
+            break;
+
+        default:
+            break;
+        }
+
+        pcurrent += (tlv_len + sizeof(pTlvHdr->header));
+        resp_len -= (tlv_len + sizeof(pTlvHdr->header));
+    }
+
+    wlan_wmm_setup_queue_priorities(priv, pWmmParamIe);
+    wlan_wmm_setup_ac_downgrade(priv);
+
+    if (sendWmmEvent) {
+        wlan_recv_event(priv, MLAN_EVENT_ID_FW_WMM_CONFIG_CHANGE, MNULL);
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief Call back from the command module to allow insertion of a WMM TLV
+ *
+ *  If the BSS we are associating to supports WMM, add the required WMM
+ *    Information IE to the association request command buffer in the form
+ *    of a Marvell extended IEEE IE.
+ *
+ *  @param priv        Pointer to the mlan_private driver data struct
+ *  @param ppAssocBuf  Output parameter: Pointer to the TLV output buffer,
+ *                     modified on return to point after the appended WMM TLV
+ *  @param pWmmIE      Pointer to the WMM IE for the BSS we are joining
+ *  @param pHTCap      Pointer to the HT IE for the BSS we are joining
+ *
+ *  @return Length of data appended to the association tlv buffer
+ */
+t_u32
+wlan_wmm_process_association_req(pmlan_private priv,
+                                 t_u8 ** ppAssocBuf,
+                                 IEEEtypes_WmmParameter_t * pWmmIE,
+                                 IEEEtypes_HTCap_t * pHTCap)
+{
+    MrvlIEtypes_WmmParamSet_t *pwmm_tlv;
+    t_u32 ret_len = 0;
+
+    ENTER();
+
+    /* Null checks */
+    if (!ppAssocBuf) {
+        LEAVE();
+        return 0;
+    }
+    if (!(*ppAssocBuf)) {
+        LEAVE();
+        return 0;
+    }
+
+    if (!pWmmIE) {
+        LEAVE();
+        return 0;
+    }
+
+    PRINTM(MINFO, "WMM: process assoc req: bss->wmmIe=0x%x\n",
+           pWmmIE->vend_hdr.element_id);
+
+    if ((priv->wmm_required
+         || (pHTCap && (pHTCap->ieee_hdr.element_id == HT_CAPABILITY)
+             && (priv->adapter->config_bands & BAND_GN
+                 || priv->adapter->config_bands & BAND_AN))
+        )
+        && pWmmIE->vend_hdr.element_id == WMM_IE) {
+        pwmm_tlv = (MrvlIEtypes_WmmParamSet_t *) * ppAssocBuf;
+        pwmm_tlv->header.type = (t_u16) wmm_info_ie[0];
+        pwmm_tlv->header.type = wlan_cpu_to_le16(pwmm_tlv->header.type);
+        pwmm_tlv->header.len = (t_u16) wmm_info_ie[1];
+        memcpy(priv->adapter, pwmm_tlv->wmm_ie, &wmm_info_ie[2],
+               pwmm_tlv->header.len);
+        if (pWmmIE->qos_info.qos_uapsd)
+            memcpy(priv->adapter,
+                   (t_u8 *) (pwmm_tlv->wmm_ie + pwmm_tlv->header.len -
+                             sizeof(priv->wmm_qosinfo)), &priv->wmm_qosinfo,
+                   sizeof(priv->wmm_qosinfo));
+
+        ret_len = sizeof(pwmm_tlv->header) + pwmm_tlv->header.len;
+        pwmm_tlv->header.len = wlan_cpu_to_le16(pwmm_tlv->header.len);
+
+        HEXDUMP("ASSOC_CMD: WMM IE", (t_u8 *) pwmm_tlv, ret_len);
+        *ppAssocBuf += ret_len;
+    }
+
+    LEAVE();
+    return ret_len;
+}
+#endif /* STA_SUPPORT */
+
+/**
+ *   @brief Compute the time delay in the driver queues for a given packet.
+ *
+ *   When the packet is received at the OS/Driver interface, the current
+ *     time is set in the packet structure.  The difference between the present
+ *     time and that received time is computed in this function and limited
+ *     based on pre-compiled limits in the driver.
+ *
+ *   @param priv   Ptr to the mlan_private driver data struct
+ *   @param pmbuf  Ptr to the mlan_buffer which has been previously timestamped
+ *
+ *   @return  Time delay of the packet in 2ms units after having limit applied
+ */
+t_u8
+wlan_wmm_compute_driver_packet_delay(pmlan_private priv,
+                                     const pmlan_buffer pmbuf)
+{
+    t_u8 ret_val = 0;
+    t_u32 out_ts_sec, out_ts_usec, queue_delay;
+
+    ENTER();
+
+    priv->adapter->callbacks.moal_get_system_time(priv->adapter->pmoal_handle,
+                                                  &out_ts_sec, &out_ts_usec);
+
+    queue_delay = (out_ts_sec - pmbuf->in_ts_sec) * 1000;
+    queue_delay += (out_ts_usec - pmbuf->in_ts_usec) / 1000;
+
+    /* 
+     * Queue delay is passed as a uint8 in units of 2ms (ms shifted
+     *  by 1). Min value (other than 0) is therefore 2ms, max is 510ms.
+     *
+     * Pass max value if queue_delay is beyond the uint8 range
+     */
+    ret_val = (t_u8) (MIN(queue_delay, priv->wmm.drv_pkt_delay_max) >> 1);
+
+    PRINTM(MINFO, "WMM: Pkt Delay: %d ms, %d ms sent to FW\n",
+           queue_delay, ret_val);
+
+    LEAVE();
+    return ret_val;
+}
+
+/**
+ *  @brief Transmit the highest priority packet awaiting in the WMM Queues
+ *
+ *  @param pmadapter Pointer to the mlan_adapter driver data struct
+ *
+ *  @return        N/A
+ */
+void
+wlan_wmm_process_tx(pmlan_adapter pmadapter)
+{
+    ENTER();
+
+    do {
+        if (wlan_dequeue_tx_packet(pmadapter))
+            break;
+        /* Check if busy */
+    } while (!pmadapter->data_sent && !pmadapter->tx_lock_flag
+             && !wlan_wmm_lists_empty(pmadapter));
+
+    LEAVE();
+    return;
+}
+
+/** 
+ *  @brief select wmm queue
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param tid          TID 0-7
+ *
+ *  @return             wmm_queue priority (0-3)
+ */
+t_u8
+wlan_wmm_select_queue(mlan_private * pmpriv, t_u8 tid)
+{
+    pmlan_adapter pmadapter = pmpriv->adapter;
+    t_u8 i;
+    mlan_wmm_ac_e ac_down =
+        pmpriv->wmm.
+        ac_down_graded_vals[wlan_wmm_convert_tos_to_ac(pmadapter, tid)];
+
+    for (i = 0; i < 4; i++) {
+        if (pmpriv->wmm.queue_priority[i] == ac_down)
+            return i;
+    }
+    return 0;
+}
+
+#ifdef UAP_SUPPORT
+/**
+ *  @brief Delete tx packets in RA list
+ *
+ *  @param priv			Pointer to the mlan_private driver data struct
+ *  @param ra_list_head	ra list header
+ *  @param tid          tid
+ *  @param tx_pause     tx_pause flag
+ *
+ *  @return		N/A
+ */
+static INLINE t_u8
+wlan_del_tx_pkts_in_ralist(pmlan_private priv,
+                           mlan_list_head * ra_list_head,
+                           int tid, t_u8 tx_pause)
+{
+    raListTbl *ra_list = MNULL;
+    pmlan_adapter pmadapter = priv->adapter;
+    pmlan_buffer pmbuf = MNULL;
+    t_u8 ret = MFALSE;
+    ENTER();
+    ra_list =
+        (raListTbl *) util_peek_list(priv->adapter->pmoal_handle, ra_list_head,
+                                     MNULL, MNULL);
+    while (ra_list && ra_list != (raListTbl *) ra_list_head) {
+        if (ra_list->total_pkts && (ra_list->tx_pause ||
+                                    (!tx_pause &&
+                                     ra_list->total_pkts > RX_LOW_THRESHOLD))) {
+            if ((pmbuf =
+                 (pmlan_buffer) util_dequeue_list(pmadapter->pmoal_handle,
+                                                  &ra_list->buf_head, MNULL,
+                                                  MNULL))) {
+                PRINTM(MDATA,
+                       "Drop pkts: tid=%d tx_pause=%d pkts=%d brd_pkts=%d %02x:%02x:%02x:%02x:%02x:%02x\n",
+                       tid, tx_pause, ra_list->total_pkts,
+                       pmadapter->pending_bridge_pkts, ra_list->ra[0],
+                       ra_list->ra[1], ra_list->ra[2], ra_list->ra[3],
+                       ra_list->ra[4], ra_list->ra[5]);
+                wlan_write_data_complete(pmadapter, pmbuf, MLAN_STATUS_FAILURE);
+                priv->wmm.pkts_queued[tid]--;
+                priv->num_drop_pkts++;
+                ra_list->total_pkts--;
+                if (!ra_list->tx_pause)
+                    util_scalar_decrement(pmadapter->pmoal_handle,
+                                          &priv->wmm.tx_pkts_queued, MNULL,
+                                          MNULL);
+                ret = MTRUE;
+                break;
+            }
+        }
+        ra_list = ra_list->pnext;
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Drop tx pkts
+ *
+ *  @param priv			Pointer to the mlan_private driver data struct
+ *
+ *  @return		N/A
+ */
+t_void
+wlan_drop_tx_pkts(pmlan_private priv)
+{
+    int i;
+    t_u8 tx_pause = 0;
+    pmlan_adapter pmadapter = priv->adapter;
+    pmadapter->callbacks.moal_spin_lock(pmadapter->pmoal_handle,
+                                        priv->wmm.ra_list_spinlock);
+    if (wlan_get_tx_pause_station_entry(priv))
+        tx_pause = 1;
+    for (i = 0; i < MAX_NUM_TID; i++) {
+        if (wlan_del_tx_pkts_in_ralist
+            (priv, &priv->wmm.tid_tbl_ptr[i].ra_list, i, tx_pause))
+            break;
+    }
+    pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                          priv->wmm.ra_list_spinlock);
+    return;
+}
+
+/**
+ *  @brief Remove peer ralist
+ *
+ *  @param priv		  A pointer to mlan_private
+ *  @param mac        peer mac address
+ *
+ *  @return           N/A
+ */
+t_void
+wlan_wmm_delete_peer_ralist(pmlan_private priv, t_u8 * mac)
+{
+    raListTbl *ra_list;
+    int i;
+    pmlan_adapter pmadapter = priv->adapter;
+    t_u32 pkt_cnt = 0;
+    t_u32 tx_pkts_queued = 0;
+
+    ENTER();
+    pmadapter->callbacks.moal_spin_lock(pmadapter->pmoal_handle,
+                                        priv->wmm.ra_list_spinlock);
+    for (i = 0; i < MAX_NUM_TID; ++i) {
+        ra_list = wlan_wmm_get_ralist_node(priv, i, mac);
+        if (ra_list) {
+            PRINTM(MINFO, "delete sta ralist %p\n", ra_list);
+            if (!ra_list->tx_pause)
+                pkt_cnt += ra_list->total_pkts;
+            wlan_wmm_del_pkts_in_ralist_node(priv, ra_list);
+
+            util_unlink_list(pmadapter->pmoal_handle,
+                             &priv->wmm.tid_tbl_ptr[i].ra_list,
+                             (pmlan_linked_list) ra_list, MNULL, MNULL);
+            pmadapter->callbacks.moal_mfree(pmadapter->pmoal_handle,
+                                            (t_u8 *) ra_list);
+            if (priv->wmm.tid_tbl_ptr[i].ra_list_curr == ra_list)
+                priv->wmm.tid_tbl_ptr[i].ra_list_curr =
+                    (raListTbl *) & priv->wmm.tid_tbl_ptr[i].ra_list;
+        }
+    }
+    if (pkt_cnt) {
+        tx_pkts_queued = util_scalar_read(pmadapter->pmoal_handle,
+                                          &priv->wmm.tx_pkts_queued, MNULL,
+                                          MNULL);
+        tx_pkts_queued -= pkt_cnt;
+        util_scalar_write(priv->adapter->pmoal_handle,
+                          &priv->wmm.tx_pkts_queued, tx_pkts_queued, MNULL,
+                          MNULL);
+        util_scalar_write(priv->adapter->pmoal_handle,
+                          &priv->wmm.highest_queued_prio, HIGH_PRIO_TID, MNULL,
+                          MNULL);
+    }
+    pmadapter->callbacks.moal_spin_unlock(pmadapter->pmoal_handle,
+                                          priv->wmm.ra_list_spinlock);
+    LEAVE();
+}
+#endif
+
+#ifdef STA_SUPPORT
+
+/**
+ *  @brief This function prepares the command of ADDTS
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *  @param pdata_buf    A pointer to data buffer
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_cmd_wmm_addts_req(IN pmlan_private pmpriv,
+                       OUT HostCmd_DS_COMMAND * cmd, IN t_void * pdata_buf)
+{
+    mlan_ds_wmm_addts *paddts = (mlan_ds_wmm_addts *) pdata_buf;
+    HostCmd_DS_WMM_ADDTS_REQ *pcmd_addts = &cmd->params.add_ts;
+
+    ENTER();
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_WMM_ADDTS_REQ);
+    cmd->size = wlan_cpu_to_le16(sizeof(pcmd_addts->dialog_token)
+                                 + sizeof(pcmd_addts->timeout_ms)
+                                 + sizeof(pcmd_addts->command_result)
+                                 + sizeof(pcmd_addts->ieee_status_code)
+                                 + paddts->ie_data_len + S_DS_GEN);
+    cmd->result = 0;
+
+    pcmd_addts->timeout_ms = wlan_cpu_to_le32(paddts->timeout);
+    pcmd_addts->dialog_token = paddts->dialog_tok;
+    memcpy(pmpriv->adapter,
+           pcmd_addts->tspec_data, paddts->ie_data, paddts->ie_data_len);
+
+    LEAVE();
+
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function handles the command response of ADDTS
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_ret_wmm_addts_req(IN pmlan_private pmpriv,
+                       const IN HostCmd_DS_COMMAND * resp,
+                       OUT mlan_ioctl_req * pioctl_buf)
+{
+    mlan_ds_wmm_cfg *pwmm = MNULL;
+    mlan_ds_wmm_addts *paddts = MNULL;
+    const HostCmd_DS_WMM_ADDTS_REQ *presp_addts = &resp->params.add_ts;
+
+    ENTER();
+
+    if (pioctl_buf) {
+        pwmm = (mlan_ds_wmm_cfg *) pioctl_buf->pbuf;
+        paddts = (mlan_ds_wmm_addts *) & pwmm->param.addts;
+        paddts->result = presp_addts->command_result;
+        paddts->dialog_tok = presp_addts->dialog_token;
+        paddts->status_code = (t_u32) presp_addts->ieee_status_code;
+
+        if (presp_addts->command_result == MLAN_CMD_RESULT_SUCCESS) {
+            /* The tspecData field is potentially variable in size due to extra 
+               IEs that may have been in the ADDTS response action frame.
+               Calculate the data length from the firmware command response. */
+            paddts->ie_data_len
+                = (t_u8) (resp->size - sizeof(presp_addts->command_result)
+                          - sizeof(presp_addts->timeout_ms)
+                          - sizeof(presp_addts->dialog_token)
+                          - sizeof(presp_addts->ieee_status_code)
+                          - S_DS_GEN);
+
+            /* Copy the TSPEC data include any extra IEs after the TSPEC */
+            memcpy(pmpriv->adapter,
+                   paddts->ie_data,
+                   presp_addts->tspec_data, paddts->ie_data_len);
+        } else {
+            paddts->ie_data_len = 0;
+        }
+        PRINTM(MINFO, "TSPEC: ADDTS ret = %d,%d sz=%d\n",
+               paddts->result, paddts->status_code, paddts->ie_data_len);
+
+        HEXDUMP("TSPEC: ADDTS data", paddts->ie_data, paddts->ie_data_len);
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function prepares the command of DELTS
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *  @param pdata_buf    A pointer to data buffer
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_cmd_wmm_delts_req(IN pmlan_private pmpriv,
+                       OUT HostCmd_DS_COMMAND * cmd, IN t_void * pdata_buf)
+{
+    mlan_ds_wmm_delts *pdelts = (mlan_ds_wmm_delts *) pdata_buf;
+    HostCmd_DS_WMM_DELTS_REQ *pcmd_delts = &cmd->params.del_ts;
+
+    ENTER();
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_WMM_DELTS_REQ);
+    cmd->size = wlan_cpu_to_le16(sizeof(pcmd_delts->dialog_token)
+                                 + sizeof(pcmd_delts->command_result)
+                                 + sizeof(pcmd_delts->ieee_reason_code)
+                                 + pdelts->ie_data_len + S_DS_GEN);
+    cmd->result = 0;
+    pcmd_delts->ieee_reason_code = (t_u8) pdelts->status_code;
+    memcpy(pmpriv->adapter,
+           pcmd_delts->tspec_data, pdelts->ie_data, pdelts->ie_data_len);
+
+    LEAVE();
+
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function handles the command response of DELTS
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_ret_wmm_delts_req(IN pmlan_private pmpriv,
+                       const IN HostCmd_DS_COMMAND * resp,
+                       OUT mlan_ioctl_req * pioctl_buf)
+{
+    mlan_ds_wmm_cfg *pwmm;
+    IEEEtypes_WMM_TSPEC_t *pTspecIE;
+    const HostCmd_DS_WMM_DELTS_REQ *presp_delts = &resp->params.del_ts;
+
+    ENTER();
+
+    if (pioctl_buf) {
+        pwmm = (mlan_ds_wmm_cfg *) pioctl_buf->pbuf;
+        pwmm->param.delts.result = presp_delts->command_result;
+
+        PRINTM(MINFO, "TSPEC: DELTS result = %d\n",
+               presp_delts->command_result);
+
+        if (presp_delts->command_result == 0) {
+            pTspecIE = (IEEEtypes_WMM_TSPEC_t *) presp_delts->tspec_data;
+            wlan_send_wmmac_host_event(pmpriv,
+                                       "DELTS_TX",
+                                       MNULL,
+                                       pTspecIE->TspecBody.TSInfo.TID,
+                                       pTspecIE->TspecBody.TSInfo.UserPri,
+                                       presp_delts->ieee_reason_code);
+
+        }
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function prepares the command of WMM_QUEUE_CONFIG
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *  @param pdata_buf    A pointer to data buffer
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_cmd_wmm_queue_config(IN pmlan_private pmpriv,
+                          OUT HostCmd_DS_COMMAND * cmd, IN t_void * pdata_buf)
+{
+    mlan_ds_wmm_queue_config *pqcfg = (mlan_ds_wmm_queue_config *) pdata_buf;
+    HostCmd_DS_WMM_QUEUE_CONFIG *pcmd_qcfg = &cmd->params.queue_config;
+
+    ENTER();
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_WMM_QUEUE_CONFIG);
+    cmd->size = wlan_cpu_to_le16(sizeof(pcmd_qcfg->action)
+                                 + sizeof(pcmd_qcfg->access_category)
+                                 + sizeof(pcmd_qcfg->msdu_lifetime_expiry)
+                                 + S_DS_GEN);
+    cmd->result = 0;
+
+    pcmd_qcfg->action = pqcfg->action;
+    pcmd_qcfg->access_category = pqcfg->access_category;
+    pcmd_qcfg->msdu_lifetime_expiry =
+        wlan_cpu_to_le16(pqcfg->msdu_lifetime_expiry);
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function handles the command response of WMM_QUEUE_CONFIG
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_ret_wmm_queue_config(IN pmlan_private pmpriv,
+                          const IN HostCmd_DS_COMMAND * resp,
+                          OUT mlan_ioctl_req * pioctl_buf)
+{
+    mlan_ds_wmm_cfg *pwmm = MNULL;
+    const HostCmd_DS_WMM_QUEUE_CONFIG *presp_qcfg = &resp->params.queue_config;
+
+    ENTER();
+
+    if (pioctl_buf) {
+        pwmm = (mlan_ds_wmm_cfg *) pioctl_buf->pbuf;
+        pwmm->param.q_cfg.action = presp_qcfg->action;
+        pwmm->param.q_cfg.access_category = presp_qcfg->access_category;
+        pwmm->param.q_cfg.msdu_lifetime_expiry =
+            wlan_le16_to_cpu(presp_qcfg->msdu_lifetime_expiry);
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function prepares the command of WMM_QUEUE_STATS
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *  @param pdata_buf    A pointer to data buffer
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_cmd_wmm_queue_stats(IN pmlan_private pmpriv,
+                         OUT HostCmd_DS_COMMAND * cmd, IN t_void * pdata_buf)
+{
+    mlan_ds_wmm_queue_stats *pqstats = (mlan_ds_wmm_queue_stats *) pdata_buf;
+    HostCmd_DS_WMM_QUEUE_STATS *pcmd_qstats = &cmd->params.queue_stats;
+    t_u8 id;
+
+    ENTER();
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_WMM_QUEUE_STATS);
+    cmd->size = wlan_cpu_to_le16(sizeof(HostCmd_DS_WMM_QUEUE_STATS)
+                                 + S_DS_GEN);
+    cmd->result = 0;
+
+    pcmd_qstats->action = pqstats->action;
+    pcmd_qstats->select_is_userpri = 1;
+    pcmd_qstats->select_bin = pqstats->user_priority;
+    pcmd_qstats->pkt_count = wlan_cpu_to_le16(pqstats->pkt_count);
+    pcmd_qstats->pkt_loss = wlan_cpu_to_le16(pqstats->pkt_loss);
+    pcmd_qstats->avg_queue_delay = wlan_cpu_to_le32(pqstats->avg_queue_delay);
+    pcmd_qstats->avg_tx_delay = wlan_cpu_to_le32(pqstats->avg_tx_delay);
+    pcmd_qstats->used_time = wlan_cpu_to_le16(pqstats->used_time);
+    pcmd_qstats->policed_time = wlan_cpu_to_le16(pqstats->policed_time);
+    for (id = 0; id < MLAN_WMM_STATS_PKTS_HIST_BINS; id++) {
+        pcmd_qstats->delay_histogram[id] =
+            wlan_cpu_to_le16(pqstats->delay_histogram[id]);
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function handles the command response of WMM_QUEUE_STATS
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_ret_wmm_queue_stats(IN pmlan_private pmpriv,
+                         const IN HostCmd_DS_COMMAND * resp,
+                         OUT mlan_ioctl_req * pioctl_buf)
+{
+    mlan_ds_wmm_cfg *pwmm = MNULL;
+    mlan_ds_wmm_queue_stats *pqstats = MNULL;
+    const HostCmd_DS_WMM_QUEUE_STATS *presp_qstats = &resp->params.queue_stats;
+    t_u8 id;
+
+    ENTER();
+
+    if (pioctl_buf) {
+        pwmm = (mlan_ds_wmm_cfg *) pioctl_buf->pbuf;
+        pqstats = (mlan_ds_wmm_queue_stats *) & pwmm->param.q_stats;
+
+        pqstats->action = presp_qstats->action;
+        pqstats->user_priority = presp_qstats->select_bin;
+        pqstats->pkt_count = wlan_le16_to_cpu(presp_qstats->pkt_count);
+        pqstats->pkt_loss = wlan_le16_to_cpu(presp_qstats->pkt_loss);
+        pqstats->avg_queue_delay
+            = wlan_le32_to_cpu(presp_qstats->avg_queue_delay);
+        pqstats->avg_tx_delay = wlan_le32_to_cpu(presp_qstats->avg_tx_delay);
+        pqstats->used_time = wlan_le16_to_cpu(presp_qstats->used_time);
+        pqstats->policed_time = wlan_le16_to_cpu(presp_qstats->policed_time);
+        for (id = 0; id < MLAN_WMM_STATS_PKTS_HIST_BINS; id++) {
+            pqstats->delay_histogram[id]
+                = wlan_le16_to_cpu(presp_qstats->delay_histogram[id]);
+        }
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function prepares the command of WMM_TS_STATUS
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param cmd          A pointer to HostCmd_DS_COMMAND structure
+ *  @param pdata_buf    A pointer to data buffer
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_cmd_wmm_ts_status(IN pmlan_private pmpriv,
+                       OUT HostCmd_DS_COMMAND * cmd, IN t_void * pdata_buf)
+{
+    mlan_ds_wmm_ts_status *pts_status = (mlan_ds_wmm_ts_status *) pdata_buf;
+    HostCmd_DS_WMM_TS_STATUS *pcmd_ts_status = &cmd->params.ts_status;
+
+    ENTER();
+
+    cmd->command = wlan_cpu_to_le16(HostCmd_CMD_WMM_TS_STATUS);
+    cmd->size = wlan_cpu_to_le16(sizeof(HostCmd_DS_WMM_TS_STATUS)
+                                 + S_DS_GEN);
+    cmd->result = 0;
+
+    memcpy(pmpriv->adapter, (t_void *) pcmd_ts_status, (t_void *) pts_status,
+           sizeof(HostCmd_DS_WMM_TS_STATUS));
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function handles the command response of WMM_TS_STATUS
+ *
+ *  @param pmpriv       A pointer to mlan_private structure
+ *  @param resp         A pointer to HostCmd_DS_COMMAND
+ *  @param pioctl_buf   A pointer to mlan_ioctl_req structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+mlan_status
+wlan_ret_wmm_ts_status(IN pmlan_private pmpriv,
+                       IN HostCmd_DS_COMMAND * resp,
+                       OUT mlan_ioctl_req * pioctl_buf)
+{
+    mlan_ds_wmm_cfg *pwmm = MNULL;
+    HostCmd_DS_WMM_TS_STATUS *presp_ts_status = &resp->params.ts_status;
+
+    ENTER();
+
+    if (pioctl_buf) {
+        pwmm = (mlan_ds_wmm_cfg *) pioctl_buf->pbuf;
+        presp_ts_status->medium_time
+            = wlan_le16_to_cpu(presp_ts_status->medium_time);
+        memcpy(pmpriv->adapter,
+               (t_void *) & pwmm->param.ts_status,
+               (t_void *) presp_ts_status, sizeof(mlan_ds_wmm_ts_status));
+    }
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+#endif /* STA_SUPPORT */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_wmm.h linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_wmm.h
--- linux-3.0.82/drivers/net/wireless/wm8782/mlan/mlan_wmm.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlan/mlan_wmm.h	2017-09-23 03:42:50.154674648 +0800
@@ -0,0 +1,189 @@
+/** @file mlan_wmm.h
+ *
+ *  @brief This file contains related macros, enum, and struct
+ *  of wmm functionalities
+ *
+ *  (C) Copyright 2011 Marvell International Ltd.
+ *  All Rights Reserved
+ * 
+ *  MARVELL CONFIDENTIAL
+ *  Copyright 2008 ~ 2011 Marvell International Ltd All Rights Reserved.
+ *  The source code contained or described herein and all documents related to
+ *  the source code ("Material") are owned by Marvell International Ltd or its
+ *  suppliers or licensors. Title to the Material remains with Marvell International Ltd
+ *  or its suppliers and licensors. The Material contains trade secrets and
+ *  proprietary and confidential information of Marvell or its suppliers and
+ *  licensors. The Material is protected by worldwide copyright and trade secret
+ *  laws and treaty provisions. No part of the Material may be used, copied,
+ *  reproduced, modified, published, uploaded, posted, transmitted, distributed,
+ *  or disclosed in any way without Marvell's prior express written permission.
+ * 
+ *  No license under any patent, copyright, trade secret or other intellectual
+ *  property right is granted to or conferred upon you by disclosure or delivery
+ *  of the Materials, either expressly, by implication, inducement, estoppel or
+ *  otherwise. Any license under such intellectual property rights must be
+ *  express and approved by Marvell in writing.
+ *
+ */
+
+/****************************************************
+Change log:
+    10/24/2008: initial version
+****************************************************/
+
+#ifndef _MLAN_WMM_H_
+#define _MLAN_WMM_H_
+
+/**
+ *  @brief This function gets the TID
+ *  
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param ptr          A pointer to RA list table
+ *
+ *  @return 	    TID
+ */
+static INLINE int
+wlan_get_tid(pmlan_adapter pmadapter, raListTbl * ptr)
+{
+    pmlan_buffer mbuf;
+
+    ENTER();
+    mbuf =
+        (pmlan_buffer) util_peek_list(pmadapter->pmoal_handle, &ptr->buf_head,
+                                      MNULL, MNULL);
+    LEAVE();
+
+    return mbuf->priority;
+}
+
+/**
+ *  @brief This function gets the length of a list
+ *  
+ *  @param pmadapter    A pointer to mlan_adapter structure
+ *  @param head         A pointer to mlan_list_head
+ *
+ *  @return 	    Length of list
+ */
+static INLINE int
+wlan_wmm_list_len(pmlan_adapter pmadapter, pmlan_list_head head)
+{
+    pmlan_linked_list pos;
+    int count = 0;
+
+    ENTER();
+
+    pos = head->pnext;
+
+    while (pos != (pmlan_linked_list) head) {
+        ++count;
+        pos = pos->pnext;
+    }
+
+    LEAVE();
+    return count;
+}
+
+/** Add buffer to WMM Tx queue */
+void wlan_wmm_add_buf_txqueue(pmlan_adapter pmadapter, pmlan_buffer pmbuf);
+/** Add to RA list */
+void wlan_ralist_add(mlan_private * priv, t_u8 * ra);
+/** Update the RA list */
+int wlan_ralist_update(mlan_private * priv, t_u8 * old_ra, t_u8 * new_ra);
+
+/** WMM status change command handler */
+mlan_status wlan_cmd_wmm_status_change(pmlan_private priv);
+/** Check if WMM lists are empty */
+int wlan_wmm_lists_empty(pmlan_adapter pmadapter);
+/** Process WMM transmission */
+t_void wlan_wmm_process_tx(pmlan_adapter pmadapter);
+/** Test to see if the ralist ptr is valid */
+int wlan_is_ralist_valid(mlan_private * priv, raListTbl * ra_list, int tid);
+
+raListTbl *wlan_wmm_get_ralist_node(pmlan_private priv, t_u8 tid,
+                                    t_u8 * ra_addr);
+t_u8 wlan_get_random_ba_threshold(pmlan_adapter pmadapter);
+
+/** Compute driver packet delay */
+t_u8 wlan_wmm_compute_driver_packet_delay(pmlan_private priv,
+                                          const pmlan_buffer pmbuf);
+/** Initialize WMM */
+t_void wlan_wmm_init(pmlan_adapter pmadapter);
+/** Setup WMM queues */
+extern void wlan_wmm_setup_queues(pmlan_private priv);
+/* Setup default queues */
+void wlan_wmm_default_queue_priorities(pmlan_private priv);
+
+#ifdef STA_SUPPORT
+/** Process WMM association request */
+extern t_u32 wlan_wmm_process_association_req(pmlan_private priv,
+                                              t_u8 ** ppAssocBuf,
+                                              IEEEtypes_WmmParameter_t * pWmmIE,
+                                              IEEEtypes_HTCap_t * pHTCap);
+#endif /* STA_SUPPORT */
+
+/** setup wmm queue priorities */
+void wlan_wmm_setup_queue_priorities(pmlan_private priv,
+                                     IEEEtypes_WmmParameter_t * wmm_ie);
+
+/** Downgrade WMM priority queue */
+void wlan_wmm_setup_ac_downgrade(pmlan_private priv);
+/** select WMM queue */
+t_u8 wlan_wmm_select_queue(mlan_private * pmpriv, t_u8 tid);
+#ifdef UAP_SUPPORT
+t_void wlan_wmm_delete_peer_ralist(pmlan_private priv, t_u8 * mac);
+#endif
+
+#ifdef STA_SUPPORT
+/* 
+ *  Functions used in the cmd handling routine
+ */
+/** WMM ADDTS request command handler */
+extern mlan_status wlan_cmd_wmm_addts_req(IN pmlan_private pmpriv,
+                                          OUT HostCmd_DS_COMMAND * cmd,
+                                          IN t_void * pdata_buf);
+/** WMM DELTS request command handler */
+extern mlan_status wlan_cmd_wmm_delts_req(IN pmlan_private pmpriv,
+                                          OUT HostCmd_DS_COMMAND * cmd,
+                                          IN t_void * pdata_buf);
+/** WMM QUEUE_CONFIG command handler */
+extern mlan_status wlan_cmd_wmm_queue_config(IN pmlan_private pmpriv,
+                                             OUT HostCmd_DS_COMMAND * cmd,
+                                             IN t_void * pdata_buf);
+/** WMM QUEUE_STATS command handler */
+extern mlan_status wlan_cmd_wmm_queue_stats(IN pmlan_private pmpriv,
+                                            OUT HostCmd_DS_COMMAND * cmd,
+                                            IN t_void * pdata_buf);
+/** WMM TS_STATUS command handler */
+extern mlan_status wlan_cmd_wmm_ts_status(IN pmlan_private pmpriv,
+                                          OUT HostCmd_DS_COMMAND * cmd,
+                                          IN t_void * pdata_buf);
+
+/* 
+ *  Functions used in the cmdresp handling routine
+ */
+/** WMM get status command response handler */
+extern mlan_status wlan_ret_wmm_get_status(IN pmlan_private priv,
+                                           IN t_u8 * ptlv, IN int resp_len);
+/** WMM ADDTS request command response handler */
+extern mlan_status wlan_ret_wmm_addts_req(IN pmlan_private pmpriv,
+                                          const IN HostCmd_DS_COMMAND * resp,
+                                          OUT mlan_ioctl_req * pioctl_buf);
+/** WMM DELTS request command response handler */
+extern mlan_status wlan_ret_wmm_delts_req(IN pmlan_private pmpriv,
+                                          const IN HostCmd_DS_COMMAND * resp,
+                                          OUT mlan_ioctl_req * pioctl_buf);
+/** WMM QUEUE_CONFIG command response handler */
+extern mlan_status wlan_ret_wmm_queue_config(IN pmlan_private pmpriv,
+                                             const IN HostCmd_DS_COMMAND * resp,
+                                             OUT mlan_ioctl_req * pioctl_buf);
+/** WMM QUEUE_STATS command response handler */
+extern mlan_status wlan_ret_wmm_queue_stats(IN pmlan_private pmpriv,
+                                            const IN HostCmd_DS_COMMAND * resp,
+                                            OUT mlan_ioctl_req * pioctl_buf);
+/** WMM TS_STATUS command response handler */
+extern mlan_status wlan_ret_wmm_ts_status(IN pmlan_private pmpriv,
+                                          IN HostCmd_DS_COMMAND * resp,
+                                          OUT mlan_ioctl_req * pioctl_buf);
+#endif /* STA_SUPPORT */
+
+#endif /* !_MLAN_WMM_H_ */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_debug.c linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_debug.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_debug.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_debug.c	2017-09-23 03:42:50.154674648 +0800
@@ -0,0 +1,580 @@
+/** @file moal_debug.c
+  *
+  * @brief This file contains functions for debug proc file.
+  *
+  * Copyright (C) 2008-2011, Marvell International Ltd.
+  *
+  * This software file (the "File") is distributed by Marvell International
+  * Ltd. under the terms of the GNU General Public License Version 2, June 1991
+  * (the "License").  You may use, redistribute and/or modify this File in
+  * accordance with the terms and conditions of the License, a copy of which
+  * is available by writing to the Free Software Foundation, Inc.,
+  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
+  * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
+  *
+  * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
+  * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about
+  * this warranty disclaimer.
+  *
+  */
+
+/********************************************************
+Change log:
+    11/03/2008: initial version
+********************************************************/
+
+#include	"moal_main.h"
+
+/********************************************************
+		Global Variables
+********************************************************/
+/** MLAN debug info */
+extern mlan_debug_info info;
+
+/********************************************************
+		Local Variables
+********************************************************/
+#ifdef CONFIG_PROC_FS
+
+/** Get info item size */
+#define item_size(n) (sizeof(info.n))
+/** Get info item address */
+#define item_addr(n) ((t_u32) &(info.n))
+
+/** Get moal_private member size */
+#define item_priv_size(n) (sizeof ((moal_private *)0)->n)
+/** Get moal_private member address */
+#define item_priv_addr(n) ((t_u32) &((moal_private *)0)->n)
+
+/** Get moal_handle member size */
+#define item_handle_size(n) (sizeof ((moal_handle *)0)->n)
+/** Get moal_handle member address */
+#define item_handle_addr(n) ((t_u32) &((moal_handle *)0)->n)
+
+#ifdef STA_SUPPORT
+static struct debug_data items[] = {
+#ifdef DEBUG_LEVEL1
+    {"drvdbg", sizeof(drvdbg), (t_u32) & drvdbg}
+    ,
+#endif
+    {"wmm_ac_vo", item_size(wmm_ac_vo), item_addr(wmm_ac_vo)}
+    ,
+    {"wmm_ac_vi", item_size(wmm_ac_vi), item_addr(wmm_ac_vi)}
+    ,
+    {"wmm_ac_be", item_size(wmm_ac_be), item_addr(wmm_ac_be)}
+    ,
+    {"wmm_ac_bk", item_size(wmm_ac_bk), item_addr(wmm_ac_bk)}
+    ,
+    {"max_tx_buf_size", item_size(max_tx_buf_size), item_addr(max_tx_buf_size)}
+    ,
+    {"tx_buf_size", item_size(tx_buf_size), item_addr(tx_buf_size)}
+    ,
+    {"curr_tx_buf_size", item_size(curr_tx_buf_size),
+     item_addr(curr_tx_buf_size)}
+    ,
+    {"ps_mode", item_size(ps_mode), item_addr(ps_mode)}
+    ,
+    {"ps_state", item_size(ps_state), item_addr(ps_state)}
+    ,
+    {"wakeup_dev_req", item_size(pm_wakeup_card_req),
+     item_addr(pm_wakeup_card_req)}
+    ,
+    {"wakeup_tries", item_size(pm_wakeup_fw_try), item_addr(pm_wakeup_fw_try)}
+    ,
+    {"hs_configured", item_size(is_hs_configured), item_addr(is_hs_configured)}
+    ,
+    {"hs_activated", item_size(hs_activated), item_addr(hs_activated)}
+    ,
+    {"tx_pkts_queued", item_size(tx_pkts_queued), item_addr(tx_pkts_queued)}
+    ,
+    {"pps_uapsd_mode", item_size(pps_uapsd_mode), item_addr(pps_uapsd_mode)}
+    ,
+    {"sleep_pd", item_size(sleep_pd), item_addr(sleep_pd)}
+    ,
+    {"qos_cfg", item_size(qos_cfg), item_addr(qos_cfg)}
+    ,
+    {"tx_lock_flag", item_size(tx_lock_flag), item_addr(tx_lock_flag)}
+    ,
+    {"port_open", item_size(port_open), item_addr(port_open)}
+    ,
+    {"scan_processing", item_size(scan_processing), item_addr(scan_processing)}
+    ,
+    {"num_tx_timeout", item_size(num_tx_timeout), item_addr(num_tx_timeout)}
+    ,
+    {"num_cmd_timeout", item_size(num_cmd_timeout), item_addr(num_cmd_timeout)}
+    ,
+    {"timeout_cmd_id", item_size(timeout_cmd_id), item_addr(timeout_cmd_id)}
+    ,
+    {"timeout_cmd_act", item_size(timeout_cmd_act), item_addr(timeout_cmd_act)}
+    ,
+    {"last_cmd_id", item_size(last_cmd_id), item_addr(last_cmd_id)}
+    ,
+    {"last_cmd_act", item_size(last_cmd_act), item_addr(last_cmd_act)}
+    ,
+    {"last_cmd_index", item_size(last_cmd_index), item_addr(last_cmd_index)}
+    ,
+    {"last_cmd_resp_id", item_size(last_cmd_resp_id),
+     item_addr(last_cmd_resp_id)}
+    ,
+    {"last_cmd_resp_index", item_size(last_cmd_resp_index),
+     item_addr(last_cmd_resp_index)}
+    ,
+    {"last_event", item_size(last_event), item_addr(last_event)}
+    ,
+    {"last_event_index", item_size(last_event_index),
+     item_addr(last_event_index)}
+    ,
+    {"num_cmd_h2c_fail", item_size(num_cmd_host_to_card_failure),
+     item_addr(num_cmd_host_to_card_failure)}
+    ,
+    {"num_cmd_sleep_cfm_fail",
+     item_size(num_cmd_sleep_cfm_host_to_card_failure),
+     item_addr(num_cmd_sleep_cfm_host_to_card_failure)}
+    ,
+    {"num_tx_h2c_fail", item_size(num_tx_host_to_card_failure),
+     item_addr(num_tx_host_to_card_failure)}
+    ,
+    {"num_evt_deauth", item_size(num_event_deauth), item_addr(num_event_deauth)}
+    ,
+    {"num_evt_disassoc", item_size(num_event_disassoc),
+     item_addr(num_event_disassoc)}
+    ,
+    {"num_evt_link_lost", item_size(num_event_link_lost),
+     item_addr(num_event_link_lost)}
+    ,
+    {"num_cmd_deauth", item_size(num_cmd_deauth), item_addr(num_cmd_deauth)}
+    ,
+    {"num_cmd_assoc_ok", item_size(num_cmd_assoc_success),
+     item_addr(num_cmd_assoc_success)}
+    ,
+    {"num_cmd_assoc_fail", item_size(num_cmd_assoc_failure),
+     item_addr(num_cmd_assoc_failure)}
+    ,
+    {"cmd_sent", item_size(cmd_sent), item_addr(cmd_sent)}
+    ,
+    {"data_sent", item_size(data_sent), item_addr(data_sent)}
+    ,
+    {"cmd_resp_received", item_size(cmd_resp_received),
+     item_addr(cmd_resp_received)}
+    ,
+    {"event_received", item_size(event_received), item_addr(event_received)}
+    ,
+
+    {"ioctl_pending", item_handle_size(ioctl_pending),
+     item_handle_addr(ioctl_pending)}
+    ,
+    {"tx_pending", item_handle_size(tx_pending), item_handle_addr(tx_pending)}
+    ,
+    {"rx_pending", item_handle_size(rx_pending), item_handle_addr(rx_pending)}
+    ,
+    {"malloc_count", item_handle_size(malloc_count),
+     item_handle_addr(malloc_count)}
+    ,
+    {"lock_count", item_handle_size(lock_count), item_handle_addr(lock_count)}
+    ,
+    {"mbufalloc_count", item_handle_size(mbufalloc_count),
+     item_handle_addr(mbufalloc_count)}
+    ,
+    {"main_state", item_handle_size(main_state), item_handle_addr(main_state)}
+    ,
+    {"hs_skip_count", item_handle_size(hs_skip_count),
+     item_handle_addr(hs_skip_count)}
+    ,
+    {"hs_force_count", item_handle_size(hs_force_count),
+     item_handle_addr(hs_force_count)}
+    ,
+};
+
+#endif
+
+#ifdef UAP_SUPPORT
+static struct debug_data uap_items[] = {
+#ifdef DEBUG_LEVEL1
+    {"drvdbg", sizeof(drvdbg), (t_u32) & drvdbg}
+    ,
+#endif
+    {"wmm_ac_vo", item_size(wmm_ac_vo), item_addr(wmm_ac_vo)}
+    ,
+    {"wmm_ac_vi", item_size(wmm_ac_vi), item_addr(wmm_ac_vi)}
+    ,
+    {"wmm_ac_be", item_size(wmm_ac_be), item_addr(wmm_ac_be)}
+    ,
+    {"wmm_ac_bk", item_size(wmm_ac_bk), item_addr(wmm_ac_bk)}
+    ,
+    {"max_tx_buf_size", item_size(max_tx_buf_size), item_addr(max_tx_buf_size)}
+    ,
+    {"tx_buf_size", item_size(tx_buf_size), item_addr(tx_buf_size)}
+    ,
+    {"curr_tx_buf_size", item_size(curr_tx_buf_size),
+     item_addr(curr_tx_buf_size)}
+    ,
+    {"ps_mode", item_size(ps_mode), item_addr(ps_mode)}
+    ,
+    {"ps_state", item_size(ps_state), item_addr(ps_state)}
+    ,
+    {"wakeup_dev_req", item_size(pm_wakeup_card_req),
+     item_addr(pm_wakeup_card_req)}
+    ,
+    {"wakeup_tries", item_size(pm_wakeup_fw_try), item_addr(pm_wakeup_fw_try)}
+    ,
+    {"hs_configured", item_size(is_hs_configured), item_addr(is_hs_configured)}
+    ,
+    {"hs_activated", item_size(hs_activated), item_addr(hs_activated)}
+    ,
+    {"tx_pkts_queued", item_size(tx_pkts_queued), item_addr(tx_pkts_queued)}
+    ,
+    {"num_bridge_pkts", item_size(num_bridge_pkts), item_addr(num_bridge_pkts)}
+    ,
+    {"num_drop_pkts", item_size(num_drop_pkts), item_addr(num_drop_pkts)}
+    ,
+    {"num_tx_timeout", item_size(num_tx_timeout), item_addr(num_tx_timeout)}
+    ,
+    {"num_cmd_timeout", item_size(num_cmd_timeout), item_addr(num_cmd_timeout)}
+    ,
+    {"timeout_cmd_id", item_size(timeout_cmd_id), item_addr(timeout_cmd_id)}
+    ,
+    {"timeout_cmd_act", item_size(timeout_cmd_act), item_addr(timeout_cmd_act)}
+    ,
+    {"last_cmd_id", item_size(last_cmd_id), item_addr(last_cmd_id)}
+    ,
+    {"last_cmd_act", item_size(last_cmd_act), item_addr(last_cmd_act)}
+    ,
+    {"last_cmd_index", item_size(last_cmd_index), item_addr(last_cmd_index)}
+    ,
+    {"last_cmd_resp_id", item_size(last_cmd_resp_id),
+     item_addr(last_cmd_resp_id)}
+    ,
+    {"last_cmd_resp_index", item_size(last_cmd_resp_index),
+     item_addr(last_cmd_resp_index)}
+    ,
+    {"last_event", item_size(last_event), item_addr(last_event)}
+    ,
+    {"last_event_index", item_size(last_event_index),
+     item_addr(last_event_index)}
+    ,
+    {"num_cmd_h2c_fail", item_size(num_cmd_host_to_card_failure),
+     item_addr(num_cmd_host_to_card_failure)}
+    ,
+    {"num_cmd_sleep_cfm_fail",
+     item_size(num_cmd_sleep_cfm_host_to_card_failure),
+     item_addr(num_cmd_sleep_cfm_host_to_card_failure)}
+    ,
+    {"num_tx_h2c_fail", item_size(num_tx_host_to_card_failure),
+     item_addr(num_tx_host_to_card_failure)}
+    ,
+    {"cmd_sent", item_size(cmd_sent), item_addr(cmd_sent)}
+    ,
+    {"data_sent", item_size(data_sent), item_addr(data_sent)}
+    ,
+    {"cmd_resp_received", item_size(cmd_resp_received),
+     item_addr(cmd_resp_received)}
+    ,
+    {"event_received", item_size(event_received), item_addr(event_received)}
+    ,
+
+    {"ioctl_pending", item_handle_size(ioctl_pending),
+     item_handle_addr(ioctl_pending)}
+    ,
+    {"tx_pending", item_handle_size(tx_pending), item_handle_addr(tx_pending)}
+    ,
+    {"rx_pending", item_handle_size(rx_pending), item_handle_addr(rx_pending)}
+    ,
+    {"malloc_count", item_handle_size(malloc_count),
+     item_handle_addr(malloc_count)}
+    ,
+    {"lock_count", item_handle_size(lock_count), item_handle_addr(lock_count)}
+    ,
+    {"mbufalloc_count", item_handle_size(mbufalloc_count),
+     item_handle_addr(mbufalloc_count)}
+    ,
+    {"main_state", item_handle_size(main_state), item_handle_addr(main_state)}
+    ,
+    {"hs_skip_count", item_handle_size(hs_skip_count),
+     item_handle_addr(hs_skip_count)}
+    ,
+    {"hs_force_count", item_handle_size(hs_force_count),
+     item_handle_addr(hs_force_count)}
+    ,
+};
+#endif /* UAP_SUPPORT */
+
+/********************************************************
+		Local Functions
+********************************************************/
+/**
+ *  @brief Proc read function
+ *
+ *  @param page	   Pointer to buffer
+ *  @param s       Read data starting position
+ *  @param off     Offset
+ *  @param cnt     Counter
+ *  @param eof     End of file flag
+ *  @param data    Output data
+ *
+ *  @return 	   Number of output data or MLAN_STATUS_FAILURE
+ */
+static int
+woal_debug_read(char *page, char **s, off_t off, int cnt, int *eof, void *data)
+{
+    int val = 0;
+    unsigned int i;
+    char *p = page;
+    struct debug_data *d = ((struct debug_data_priv *) data)->items;
+    moal_private *priv = ((struct debug_data_priv *) data)->priv;
+
+    if (MODULE_GET == 0)
+        return MLAN_STATUS_FAILURE;
+
+    /* Get debug information */
+    if (woal_get_debug_info(priv, MOAL_PROC_WAIT, &info)) {
+        *eof = 1;
+        goto exit;
+    }
+    for (i = 0;
+         i < (unsigned int) ((struct debug_data_priv *) data)->num_of_items;
+         i++) {
+        if (d[i].size == 1)
+            val = *((t_u8 *) d[i].addr);
+        else if (d[i].size == 2)
+            val = *((t_u16 *) d[i].addr);
+        else if (d[i].size == 4)
+            val = *((t_u32 *) d[i].addr);
+        else {
+            unsigned int j;
+            p += sprintf(p, "%s=", d[i].name);
+            for (j = 0; j < d[i].size; j += 2) {
+                val = *(t_u16 *) (d[i].addr + j);
+                p += sprintf(p, "0x%x ", val);
+            }
+            p += sprintf(p, "\n");
+            continue;
+        }
+        if (strstr(d[i].name, "id"))
+            p += sprintf(p, "%s=0x%x\n", d[i].name, val);
+        else
+            p += sprintf(p, "%s=%d\n", d[i].name, val);
+    }
+    if (info.tx_tbl_num) {
+        p += sprintf(p, "Tx BA stream table:\n");
+        for (i = 0; i < info.tx_tbl_num; i++) {
+            p += sprintf(p,
+                         "tid = %d, ra = %02x:%02x:%02x:%02x:%02x:%02x amsdu=%d\n",
+                         (int) info.tx_tbl[i].tid, info.tx_tbl[i].ra[0],
+                         info.tx_tbl[i].ra[1], info.tx_tbl[i].ra[2],
+                         info.tx_tbl[i].ra[3], info.tx_tbl[i].ra[4],
+                         info.tx_tbl[i].ra[5], (int) info.tx_tbl[i].amsdu);
+        }
+    }
+    if (info.rx_tbl_num) {
+        p += sprintf(p, "Rx reorder table:\n");
+        for (i = 0; i < info.rx_tbl_num; i++) {
+            unsigned int j;
+
+            p += sprintf(p,
+                         "tid = %d, ta =  %02x:%02x:%02x:%02x:%02x:%02x, start_win = %d, "
+                         "win_size = %d, amsdu=%d\n", (int) info.rx_tbl[i].tid,
+                         info.rx_tbl[i].ta[0], info.rx_tbl[i].ta[1],
+                         info.rx_tbl[i].ta[2], info.rx_tbl[i].ta[3],
+                         info.rx_tbl[i].ta[4], info.rx_tbl[i].ta[5],
+                         (int) info.rx_tbl[i].start_win,
+                         (int) info.rx_tbl[i].win_size,
+                         (int) info.rx_tbl[i].amsdu);
+            p += sprintf(p, "buffer: ");
+            for (j = 0; j < info.rx_tbl[i].win_size; j++) {
+                if (info.rx_tbl[i].buffer[j] == MTRUE)
+                    p += sprintf(p, "1 ");
+                else
+                    p += sprintf(p, "0 ");
+            }
+            p += sprintf(p, "\n");
+        }
+    }
+  exit:
+    MODULE_PUT;
+    return p - page;
+}
+
+/**
+ *  @brief Proc write function
+ *
+ *  @param f	   File pointer
+ *  @param buf     Pointer to data buffer
+ *  @param cnt     Data number to write
+ *  @param data    Data to write
+ *
+ *  @return 	   Number of data or MLAN_STATUS_FAILURE
+ */
+static int
+woal_debug_write(struct file *f, const char *buf, unsigned long cnt, void *data)
+{
+    int r, i;
+    char *pdata;
+    char *p;
+    char *p0;
+    char *p1;
+    char *p2;
+    struct debug_data *d = ((struct debug_data_priv *) data)->items;
+    moal_private *priv = ((struct debug_data_priv *) data)->priv;
+
+    if (MODULE_GET == 0)
+        return MLAN_STATUS_FAILURE;
+
+    pdata = (char *) kmalloc(cnt, GFP_KERNEL);
+    if (pdata == NULL) {
+        MODULE_PUT;
+        return 0;
+    }
+
+    if (copy_from_user(pdata, buf, cnt)) {
+        PRINTM(MERROR, "Copy from user failed\n");
+        kfree(pdata);
+        MODULE_PUT;
+        return 0;
+    }
+
+    if (woal_get_debug_info(priv, MOAL_PROC_WAIT, &info)) {
+        kfree(pdata);
+        MODULE_PUT;
+        return 0;
+    }
+
+    p0 = pdata;
+    for (i = 0; i < ((struct debug_data_priv *) data)->num_of_items; i++) {
+        do {
+            p = strstr(p0, d[i].name);
+            if (p == NULL)
+                break;
+            p1 = strchr(p, '\n');
+            if (p1 == NULL)
+                break;
+            p0 = p1++;
+            p2 = strchr(p, '=');
+            if (!p2)
+                break;
+            p2++;
+            r = woal_string_to_number(p2);
+            if (d[i].size == 1)
+                *((t_u8 *) d[i].addr) = (t_u8) r;
+            else if (d[i].size == 2)
+                *((t_u16 *) d[i].addr) = (t_u16) r;
+            else if (d[i].size == 4)
+                *((t_u32 *) d[i].addr) = (t_u32) r;
+            break;
+        } while (MTRUE);
+    }
+    kfree(pdata);
+
+    /* Set debug information */
+    if (woal_set_debug_info(priv, MOAL_PROC_WAIT, &info)) {
+        MODULE_PUT;
+        return 0;
+    }
+
+    MODULE_PUT;
+    return cnt;
+}
+
+/********************************************************
+		Global Functions
+********************************************************/
+/**
+ *  @brief Create debug proc file
+ *
+ *  @param priv	   A pointer to a moal_private structure
+ *
+ *  @return 	   N/A
+ */
+void
+woal_debug_entry(moal_private * priv)
+{
+    struct proc_dir_entry *r;
+
+    ENTER();
+
+    if (priv->proc_entry == NULL)
+        return;
+
+#ifdef STA_SUPPORT
+    if (GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_STA) {
+        priv->items_priv.items =
+            (struct debug_data *) kmalloc(sizeof(items), GFP_KERNEL);
+        if (!priv->items_priv.items) {
+            PRINTM(MERROR, "Failed to allocate memory for debug data\n");
+            LEAVE();
+            return;
+        }
+        memcpy(priv->items_priv.items, items, sizeof(items));
+        priv->items_priv.num_of_items = sizeof(items) / sizeof(items[0]);
+    }
+#endif
+#ifdef UAP_SUPPORT
+    if (GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_UAP) {
+        priv->items_priv.items =
+            (struct debug_data *) kmalloc(sizeof(uap_items), GFP_KERNEL);
+        if (!priv->items_priv.items) {
+            PRINTM(MERROR, "Failed to allocate memory for debug data\n");
+            LEAVE();
+            return;
+        }
+        memcpy(priv->items_priv.items, uap_items, sizeof(uap_items));
+        priv->items_priv.num_of_items =
+            sizeof(uap_items) / sizeof(uap_items[0]);
+    }
+#endif
+    priv->items_priv.priv = priv;
+    priv->items_priv.items[priv->items_priv.num_of_items - 1].addr +=
+        (t_u32) (priv->phandle);
+    priv->items_priv.items[priv->items_priv.num_of_items - 2].addr +=
+        (t_u32) (priv->phandle);
+    priv->items_priv.items[priv->items_priv.num_of_items - 3].addr +=
+        (t_u32) (priv->phandle);
+    priv->items_priv.items[priv->items_priv.num_of_items - 4].addr +=
+        (t_u32) (priv->phandle);
+    priv->items_priv.items[priv->items_priv.num_of_items - 5].addr +=
+        (t_u32) (priv->phandle);
+    priv->items_priv.items[priv->items_priv.num_of_items - 6].addr +=
+        (t_u32) (priv->phandle);
+    priv->items_priv.items[priv->items_priv.num_of_items - 7].addr +=
+        (t_u32) (priv->phandle);
+    priv->items_priv.items[priv->items_priv.num_of_items - 8].addr +=
+        (t_u32) (priv->phandle);
+    priv->items_priv.items[priv->items_priv.num_of_items - 9].addr +=
+        (t_u32) (priv->phandle);
+
+    /* Create proc entry */
+    r = create_proc_entry("debug", 0644, priv->proc_entry);
+    if (r == NULL) {
+        LEAVE();
+        return;
+    }
+    r->data = &priv->items_priv;
+    r->read_proc = woal_debug_read;
+    r->write_proc = woal_debug_write;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)
+    r->owner = THIS_MODULE;
+#endif
+
+    LEAVE();
+}
+
+/**
+ *  @brief Remove proc file
+ *
+ *  @param priv	 A pointer to a moal_private structure
+ *
+ *  @return 	 N/A
+ */
+void
+woal_debug_remove(moal_private * priv)
+{
+    ENTER();
+
+    if (priv->items_priv.items)
+        kfree(priv->items_priv.items);
+    /* Remove proc entry */
+    remove_proc_entry("debug", priv->proc_entry);
+
+    LEAVE();
+}
+#endif
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_ioctl.c linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_ioctl.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_ioctl.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_ioctl.c	2017-09-23 03:42:50.158674636 +0800
@@ -0,0 +1,1955 @@
+/** @file moal_ioctl.c
+  *
+  * @brief This file contains ioctl function to MLAN
+  * 
+  * Copyright (C) 2008-2011, Marvell International Ltd. 
+  *
+  * This software file (the "File") is distributed by Marvell International 
+  * Ltd. under the terms of the GNU General Public License Version 2, June 1991 
+  * (the "License").  You may use, redistribute and/or modify this File in 
+  * accordance with the terms and conditions of the License, a copy of which 
+  * is available by writing to the Free Software Foundation, Inc.,
+  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
+  * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
+  *
+  * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 
+  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 
+  * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about 
+  * this warranty disclaimer.
+  *
+  */
+
+/********************************************************
+Change log:
+    10/21/2008: initial version
+********************************************************/
+
+#include        "moal_main.h"
+#ifdef UAP_SUPPORT
+#include    	"moal_uap.h"
+#endif
+
+/********************************************************
+                Local Variables
+********************************************************/
+/* CAC Measure report default time 60 seconds */
+#define MEAS_REPORT_TIME 60*HZ
+
+#ifdef STA_SUPPORT
+/** Region code mapping */
+typedef struct _region_code_mapping_t
+{
+    /** Region */
+    t_u8 region[COUNTRY_CODE_LEN];
+    /** Code */
+    t_u8 code;
+} region_code_mapping_t;
+
+/** Region code mapping table */
+static region_code_mapping_t region_code_mapping[] = {
+    {"US ", 0x10},              /* US FCC */
+    {"CA ", 0x20},              /* IC Canada */
+    {"SG ", 0x10},              /* Singapore */
+    {"EU ", 0x30},              /* ETSI */
+    {"AU ", 0x30},              /* Australia */
+    {"KR ", 0x30},              /* Republic Of Korea */
+    {"FR ", 0x32},              /* France */
+    {"CN ", 0x50},              /* China */
+    {"JP ", 0xFF},              /* Japan special */
+};
+#endif
+
+/********************************************************
+                Global Variables
+********************************************************/
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
+#ifdef UAP_SUPPORT
+/** Network device handlers for uAP */
+extern const struct net_device_ops woal_uap_netdev_ops;
+#endif
+#ifdef STA_SUPPORT
+/** Network device handlers for STA */
+extern const struct net_device_ops woal_netdev_ops;
+#endif
+#endif
+
+/********************************************************
+                Local Functions
+********************************************************/
+#ifdef STA_SUPPORT
+/** 
+ *  @brief This function converts region string to region code
+ *
+ *  @param region_string    Region string
+ *
+ *  @return                 Region code
+ */
+static t_u8
+region_string_2_region_code(char *region_string)
+{
+    t_u8 i;
+    t_u8 size = sizeof(region_code_mapping) / sizeof(region_code_mapping_t);
+
+    for (i = 0; i < size; i++) {
+        if (!memcmp(region_string,
+                    region_code_mapping[i].region, strlen(region_string))) {
+            return (region_code_mapping[i].code);
+        }
+    }
+    /* Default is US */
+    return (region_code_mapping[0].code);
+}
+#endif
+
+/** 
+ *  @brief Copy multicast table
+ *   
+ *  @param mlist    A pointer to mlan_multicast_list structure
+ *  @param dev      A pointer to net_device structure                 
+ *
+ *  @return         Number of multicast addresses
+ */
+static inline int
+woal_copy_mcast_addr(mlan_multicast_list * mlist, struct net_device *dev)
+{
+    int i = 0;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35)
+    struct dev_mc_list *mcptr = dev->mc_list;
+#else
+    struct netdev_hw_addr *mcptr = NULL;
+#endif /* < 2.6.35 */
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35)
+    for (i = 0; i < dev->mc_count && mcptr; i++) {
+        memcpy(&mlist->mac_list[i], mcptr->dmi_addr, ETH_ALEN);
+        mcptr = mcptr->next;
+    }
+#else
+    netdev_for_each_mc_addr(mcptr, dev)
+        memcpy(&mlist->mac_list[i++], mcptr->addr, ETH_ALEN);
+#endif /* < 2.6.35 */
+
+    return i;
+}
+
+/** 
+ *  @brief Fill in wait queue 
+ *   
+ *  @param priv         A pointer to moal_private structure
+ *  @param wait         A pointer to wait_queue structure                 
+ *  @param wait_option  Wait option
+ *
+ *  @return             N/A
+ */
+static inline void
+woal_fill_wait_queue(moal_private * priv, wait_queue * wait, t_u8 wait_option)
+{
+    ENTER();
+    wait->start_time = jiffies;
+    wait->condition = MFALSE;
+    switch (wait_option) {
+    case MOAL_NO_WAIT:
+        break;
+    case MOAL_IOCTL_WAIT:
+        wait->wait = &priv->ioctl_wait_q;
+        break;
+    case MOAL_CMD_WAIT:
+        wait->wait = &priv->cmd_wait_q;
+        break;
+    case MOAL_PROC_WAIT:
+        wait->wait = &priv->proc_wait_q;
+        break;
+    case MOAL_WSTATS_WAIT:
+        wait->wait = &priv->w_stats_wait_q;
+        break;
+    }
+    LEAVE();
+    return;
+}
+
+/** 
+ *  @brief Wait mlan ioctl complete
+ *   
+ *  @param priv         A pointer to moal_private structure
+ *  @param req          A pointer to mlan_ioctl_req structure   
+ *  @param wait_option  Wait option
+ *
+ *  @return             N/A
+ */
+static inline void
+woal_wait_ioctl_complete(moal_private * priv, mlan_ioctl_req * req,
+                         t_u8 wait_option)
+{
+    mlan_status status;
+    wait_queue *wait = (wait_queue *) req->reserved_1;
+
+    ENTER();
+
+    switch (wait_option) {
+    case MOAL_NO_WAIT:
+        break;
+    case MOAL_IOCTL_WAIT:
+        wait_event_interruptible(priv->ioctl_wait_q, wait->condition);
+        break;
+    case MOAL_CMD_WAIT:
+        wait_event_interruptible(priv->cmd_wait_q, wait->condition);
+        break;
+    case MOAL_PROC_WAIT:
+        wait_event_interruptible(priv->proc_wait_q, wait->condition);
+        break;
+    case MOAL_WSTATS_WAIT:
+        wait_event_interruptible(priv->w_stats_wait_q, wait->condition);
+        break;
+    }
+    if (wait->condition == MFALSE) {
+        req->action = MLAN_ACT_CANCEL;
+        status = mlan_ioctl(priv->phandle->pmlan_adapter, req);
+        PRINTM(MIOCTL,
+               "IOCTL cancel: id=0x%lx, sub_id=0x%lx, wait_option=%d, action=%d, status=%d\n",
+               req->req_id, (*(t_u32 *) req->pbuf), wait_option,
+               (int) req->action, status);
+    }
+    LEAVE();
+    return;
+}
+
+/********************************************************
+                Global Functions
+********************************************************/
+
+/** 
+ *  @brief Send ioctl request to MLAN
+ *   
+ *  @param priv          A pointer to moal_private structure
+ *  @param req           A pointer to mlan_ioctl_req buffer
+ *  @param wait_option   Wait option (MOAL_WAIT or MOAL_NO_WAIT)
+ *
+ *  @return              MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail
+ */
+mlan_status
+woal_request_ioctl(moal_private * priv, mlan_ioctl_req * req, t_u8 wait_option)
+{
+    wait_queue *wait;
+    mlan_status status;
+
+    ENTER();
+
+    if (priv->phandle->surprise_removed == MTRUE) {
+        PRINTM(MERROR,
+               "IOCTL is not allowed while the device is not present\n");
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+    if (priv->phandle->is_suspended == MTRUE) {
+        PRINTM(MERROR, "IOCTL is not allowed while suspended\n");
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+
+    wait = (wait_queue *) req->reserved_1;
+    req->bss_index = priv->bss_index;
+    if (wait_option)
+        woal_fill_wait_queue(priv, wait, wait_option);
+    else
+        req->reserved_1 = 0;
+
+    /* Call MLAN ioctl handle */
+    status = mlan_ioctl(priv->phandle->pmlan_adapter, req);
+    switch (status) {
+    case MLAN_STATUS_PENDING:
+        PRINTM(MIOCTL,
+               "IOCTL pending: %p id=0x%lx, sub_id=0x%lx wait_option=%d, action=%d\n",
+               req, req->req_id, (*(t_u32 *) req->pbuf), wait_option,
+               (int) req->action);
+        atomic_inc(&priv->phandle->ioctl_pending);
+        /* Status pending, wake up main process */
+        queue_work(priv->phandle->workqueue, &priv->phandle->main_work);
+
+        /* Wait for completion */
+        if (wait_option) {
+            woal_wait_ioctl_complete(priv, req, wait_option);
+            status = wait->status;
+        }
+        break;
+    case MLAN_STATUS_SUCCESS:
+    case MLAN_STATUS_FAILURE:
+    case MLAN_STATUS_RESOURCE:
+        PRINTM(MIOCTL,
+               "IOCTL: %p id=0x%lx, sub_id=0x%lx wait_option=%d, action=%d status=%d\n",
+               req, req->req_id, (*(t_u32 *) req->pbuf), wait_option,
+               (int) req->action, status);
+    default:
+        break;
+    }
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Send set MAC address request to MLAN
+ *   
+ *  @param priv   A pointer to moal_private structure
+ *
+ *  @return       MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail
+ */
+mlan_status
+woal_request_set_mac_address(moal_private * priv)
+{
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_bss *bss = NULL;
+    mlan_status status;
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = (mlan_ioctl_req *) woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_bss));
+    if (req == NULL) {
+        status = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    bss = (mlan_ds_bss *) req->pbuf;
+    bss->sub_command = MLAN_OID_BSS_MAC_ADDR;
+    memcpy(&bss->param.mac_addr, priv->current_addr,
+           sizeof(mlan_802_11_mac_addr));
+    req->req_id = MLAN_IOCTL_BSS;
+    req->action = MLAN_ACT_SET;
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, MOAL_CMD_WAIT);
+    if (status == MLAN_STATUS_SUCCESS) {
+        memcpy(priv->netdev->dev_addr, priv->current_addr, ETH_ALEN);
+        HEXDUMP("priv->MacAddr:", priv->current_addr, ETH_ALEN);
+    } else {
+        PRINTM(MERROR, "set mac address failed! status=%d, error_code=0x%lx\n",
+               status, req->status_code);
+    }
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Send multicast list request to MLAN
+ *   
+ *  @param priv   A pointer to moal_private structure
+ *  @param dev    A pointer to net_device structure                 
+ *
+ *  @return       N/A
+ */
+void
+woal_request_set_multicast_list(moal_private * priv, struct net_device *dev)
+{
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_bss *bss = NULL;
+    mlan_status status;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35)
+    int mc_count = dev->mc_count;
+#else
+    int mc_count = netdev_mc_count(dev);
+#endif
+
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = (mlan_ioctl_req *) woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_bss));
+    if (req == NULL) {
+        PRINTM(MERROR, "%s:Fail to allocate ioctl req buffer\n", __FUNCTION__);
+        goto done;
+    }
+
+    /* Fill request buffer */
+    bss = (mlan_ds_bss *) req->pbuf;
+    bss->sub_command = MLAN_OID_BSS_MULTICAST_LIST;
+    req->req_id = MLAN_IOCTL_BSS;
+    req->action = MLAN_ACT_SET;
+    if (dev->flags & IFF_PROMISC) {
+        bss->param.multicast_list.mode = MLAN_PROMISC_MODE;
+    } else if (dev->flags & IFF_ALLMULTI ||
+               mc_count > MLAN_MAX_MULTICAST_LIST_SIZE) {
+        bss->param.multicast_list.mode = MLAN_ALL_MULTI_MODE;
+    } else {
+        bss->param.multicast_list.mode = MLAN_MULTICAST_MODE;
+        if (mc_count)
+            bss->param.multicast_list.num_multicast_addr =
+                woal_copy_mcast_addr(&bss->param.multicast_list, dev);
+    }
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, MOAL_NO_WAIT);
+    if (status != MLAN_STATUS_PENDING)
+        kfree(req);
+  done:
+    LEAVE();
+    return;
+}
+
+/** 
+ *  @brief Send deauth command to MLAN
+ *   
+ *  @param priv          A pointer to moal_private structure
+ *  @param wait_option          Wait option
+ *  @param mac           MAC address to deauthenticate
+ *
+ *  @return              MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail
+ */
+mlan_status
+woal_disconnect(moal_private * priv, t_u8 wait_option, t_u8 * mac)
+{
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_bss *bss = NULL;
+    mlan_status status;
+
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = (mlan_ioctl_req *) woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_bss));
+    if (req == NULL) {
+        status = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    bss = (mlan_ds_bss *) req->pbuf;
+    bss->sub_command = MLAN_OID_BSS_STOP;
+    if (mac)
+        memcpy((t_u8 *) & bss->param.bssid, mac, sizeof(mlan_802_11_mac_addr));
+    req->req_id = MLAN_IOCTL_BSS;
+    req->action = MLAN_ACT_SET;
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, wait_option);
+
+  done:
+    if (req)
+        kfree(req);
+#ifdef REASSOCIATION
+    priv->reassoc_required = MFALSE;
+#endif /* REASSOCIATION */
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Send bss_start command to MLAN
+ *   
+ *  @param priv          A pointer to moal_private structure
+ *  @param wait_option          Wait option  
+ *  @param ssid_bssid    A point to mlan_ssid_bssid structure
+ *
+ *  @return              MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail
+ */
+mlan_status
+woal_bss_start(moal_private * priv, t_u8 wait_option,
+               mlan_ssid_bssid * ssid_bssid)
+{
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_bss *bss = NULL;
+    mlan_status status;
+
+    ENTER();
+
+    /* Stop the O.S. TX queue if needed */
+    woal_stop_queue(priv->netdev);
+
+    /* Allocate an IOCTL request buffer */
+    req = (mlan_ioctl_req *) woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_bss));
+    if (req == NULL) {
+        status = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    bss = (mlan_ds_bss *) req->pbuf;
+    bss->sub_command = MLAN_OID_BSS_START;
+    if (ssid_bssid)
+        memcpy(&bss->param.ssid_bssid, ssid_bssid, sizeof(mlan_ssid_bssid));
+    req->req_id = MLAN_IOCTL_BSS;
+    req->action = MLAN_ACT_SET;
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, wait_option);
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Get BSS info
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param wait_option          Wait option
+ *  @param bss_info             A pointer to mlan_bss_info structure
+ *
+ *  @return                     MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail          
+ */
+mlan_status
+woal_get_bss_info(moal_private * priv, t_u8 wait_option,
+                  mlan_bss_info * bss_info)
+{
+    int ret = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_get_info *info = NULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_get_info));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    info = (mlan_ds_get_info *) req->pbuf;
+    info->sub_command = MLAN_OID_GET_BSS_INFO;
+    req->req_id = MLAN_IOCTL_GET_INFO;
+    req->action = MLAN_ACT_GET;
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, wait_option);
+    if (status == MLAN_STATUS_SUCCESS) {
+        if (bss_info) {
+            memcpy(bss_info, &info->param.bss_info, sizeof(mlan_bss_info));
+        }
+    }
+  done:
+    if (req && (status != MLAN_STATUS_PENDING))
+        kfree(req);
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Set/Get retry count
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param action               Action set or get
+ *  @param wait_option          Wait option
+ *  @param value                Retry value
+ *
+ *  @return                     MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail
+ */
+mlan_status
+woal_set_get_retry(moal_private * priv, t_u32 action,
+                   t_u8 wait_option, int *value)
+{
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_snmp_mib *mib = NULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_snmp_mib));
+    if (req == NULL) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    mib = (mlan_ds_snmp_mib *) req->pbuf;
+    mib->sub_command = MLAN_OID_SNMP_MIB_RETRY_COUNT;
+    req->req_id = MLAN_IOCTL_SNMP_MIB;
+    req->action = action;
+
+    if (action == MLAN_ACT_SET) {
+        if (*value < MLAN_TX_RETRY_MIN || *value > MLAN_TX_RETRY_MAX) {
+            ret = MLAN_STATUS_FAILURE;
+            goto done;
+        }
+        mib->param.retry_count = *value;
+    }
+
+    /* Send IOCTL request to MLAN */
+    ret = woal_request_ioctl(priv, req, wait_option);
+    if (ret == MLAN_STATUS_SUCCESS && action == MLAN_ACT_GET) {
+        *value = mib->param.retry_count;
+    }
+
+  done:
+    if (req && (ret != MLAN_STATUS_PENDING))
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get RTS threshold
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param action               Action set or get
+ *  @param wait_option          Wait option
+ *  @param value                RTS threshold value
+ *
+ *  @return                     MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail
+ */
+mlan_status
+woal_set_get_rts(moal_private * priv, t_u32 action,
+                 t_u8 wait_option, int *value)
+{
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_snmp_mib *mib = NULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_snmp_mib));
+    if (req == NULL) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    mib = (mlan_ds_snmp_mib *) req->pbuf;
+    mib->sub_command = MLAN_OID_SNMP_MIB_RTS_THRESHOLD;
+    req->req_id = MLAN_IOCTL_SNMP_MIB;
+    req->action = action;
+
+    if (action == MLAN_ACT_SET) {
+        if (*value < MLAN_RTS_MIN_VALUE || *value > MLAN_RTS_MAX_VALUE) {
+            ret = MLAN_STATUS_FAILURE;
+            goto done;
+        }
+        mib->param.rts_threshold = *value;
+    }
+
+    /* Send IOCTL request to MLAN */
+    ret = woal_request_ioctl(priv, req, wait_option);
+    if (ret == MLAN_STATUS_SUCCESS && action == MLAN_ACT_GET) {
+        *value = mib->param.rts_threshold;
+    }
+
+  done:
+    if (req && (ret != MLAN_STATUS_PENDING))
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get Fragment threshold
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param action               Action set or get
+ *  @param wait_option          Wait option
+ *  @param value                Fragment threshold value
+ *
+ *  @return                     MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail
+ */
+mlan_status
+woal_set_get_frag(moal_private * priv, t_u32 action,
+                  t_u8 wait_option, int *value)
+{
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_snmp_mib *mib = NULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_snmp_mib));
+    if (req == NULL) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    mib = (mlan_ds_snmp_mib *) req->pbuf;
+    mib->sub_command = MLAN_OID_SNMP_MIB_FRAG_THRESHOLD;
+    req->req_id = MLAN_IOCTL_SNMP_MIB;
+    req->action = action;
+
+    if (action == MLAN_ACT_SET) {
+        if (*value < MLAN_FRAG_MIN_VALUE || *value > MLAN_FRAG_MAX_VALUE) {
+            ret = MLAN_STATUS_FAILURE;
+            goto done;
+        }
+        mib->param.frag_threshold = *value;
+    }
+
+    /* Send IOCTL request to MLAN */
+    ret = woal_request_ioctl(priv, req, wait_option);
+    if (ret == MLAN_STATUS_SUCCESS && action == MLAN_ACT_GET) {
+        *value = mib->param.frag_threshold;
+    }
+
+  done:
+    if (req && (ret != MLAN_STATUS_PENDING))
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get generic IE
+ *
+ *  @param priv         A pointer to moal_private structure
+ *  @param action       Action set or get
+ *  @param ie           Information element
+ *  @param ie_len       Length of the IE
+ *
+ *  @return             MLAN_STATUS_SUCCESS -- success, otherwise fail
+ */
+mlan_status
+woal_set_get_gen_ie(moal_private * priv, t_u32 action, t_u8 * ie, int *ie_len)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ds_misc_cfg *misc = NULL;
+    mlan_ioctl_req *req = NULL;
+
+    ENTER();
+
+    if (ie == NULL || ie_len == NULL) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    if (action == MLAN_ACT_SET && *ie_len > MAX_IE_SIZE) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_misc_cfg));
+    if (req == NULL) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    misc = (mlan_ds_misc_cfg *) req->pbuf;
+    misc->sub_command = MLAN_OID_MISC_GEN_IE;
+    req->req_id = MLAN_IOCTL_MISC_CFG;
+    req->action = action;
+    misc->param.gen_ie.type = MLAN_IE_TYPE_GEN_IE;
+
+    if (action == MLAN_ACT_SET) {
+        misc->param.gen_ie.len = *ie_len;
+        if (*ie_len)
+            memcpy(misc->param.gen_ie.ie_data, ie, *ie_len);
+    }
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    if (action == MLAN_ACT_GET) {
+        *ie_len = misc->param.gen_ie.len;
+        if (*ie_len)
+            memcpy(ie, misc->param.gen_ie.ie_data, *ie_len);
+    }
+
+  done:
+    if (req)
+        kfree(req);
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get TX power
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param action               Action set or get
+ *  @param power_cfg            A pinter to mlan_power_cfg_t structure
+ *
+ *  @return                     MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail
+ */
+mlan_status
+woal_set_get_tx_power(moal_private * priv,
+                      t_u32 action, mlan_power_cfg_t * power_cfg)
+{
+    mlan_ds_power_cfg *pcfg = NULL;
+    mlan_ioctl_req *req = NULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_power_cfg));
+    if (req == NULL) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+    pcfg = (mlan_ds_power_cfg *) req->pbuf;
+    pcfg->sub_command = MLAN_OID_POWER_CFG;
+    req->req_id = MLAN_IOCTL_POWER_CFG;
+    req->action = action;
+    if (action == MLAN_ACT_SET && power_cfg)
+        memcpy(&pcfg->param.power_cfg, power_cfg, sizeof(mlan_power_cfg_t));
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT))
+        ret = MLAN_STATUS_FAILURE;
+
+    if (ret == MLAN_STATUS_SUCCESS && power_cfg)
+        memcpy(power_cfg, &pcfg->param.power_cfg, sizeof(mlan_power_cfg_t));
+
+  done:
+    if (req && (ret != MLAN_STATUS_PENDING))
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get IEEE power management
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param action               Action set or get
+ *  @param disabled             A pointer to disabled flag
+ *  @param power_type           IEEE power type
+ *
+ *  @return                     MLAN_STATUS_SUCCESS -- success, otherwise fail
+ */
+mlan_status
+woal_set_get_power_mgmt(moal_private * priv,
+                        t_u32 action, int *disabled, int power_type)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_pm_cfg *pm_cfg = NULL;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_pm_cfg));
+    if (req == NULL) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+    pm_cfg = (mlan_ds_pm_cfg *) req->pbuf;
+    pm_cfg->sub_command = MLAN_OID_PM_CFG_IEEE_PS;
+    req->req_id = MLAN_IOCTL_PM_CFG;
+    req->action = action;
+
+    if (action == MLAN_ACT_SET) {
+        PRINTM(MINFO, "PS_MODE set power disabled=%d power type=%#x\n",
+               *disabled, power_type);
+        if (*disabled)
+            pm_cfg->param.ps_mode = 0;
+        else {
+            /* Check not support case only (vwrq->disabled == FALSE) */
+            if ((power_type & IW_POWER_TYPE) == IW_POWER_TIMEOUT) {
+                PRINTM(MERROR, "Setting power timeout is not supported\n");
+                ret = MLAN_STATUS_FAILURE;
+                goto done;
+            } else if ((power_type & IW_POWER_TYPE) == IW_POWER_PERIOD) {
+                PRINTM(MERROR, "Setting power period is not supported\n");
+                ret = MLAN_STATUS_FAILURE;
+                goto done;
+            }
+            pm_cfg->param.ps_mode = 1;
+        }
+    }
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    if (ret == MLAN_STATUS_SUCCESS && action == MLAN_ACT_GET)
+        *disabled = pm_cfg->param.ps_mode;
+
+  done:
+    if (req)
+        kfree(req);
+
+    LEAVE();
+    return ret;
+}
+
+#ifdef STA_SUPPORT
+/**
+ * @brief Set region code
+ * 
+ * @param priv     A pointer to moal_private structure
+ * @param region   A pointer to region string
+ * 
+ * @return         MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING --success, otherwise fail
+ */
+mlan_status
+woal_set_region_code(moal_private * priv, char *region)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ds_misc_cfg *cfg = NULL;
+    mlan_ioctl_req *req = NULL;
+
+    ENTER();
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_misc_cfg));
+    if (req == NULL) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+    cfg = (mlan_ds_misc_cfg *) req->pbuf;
+    cfg->sub_command = MLAN_OID_MISC_REGION;
+    req->req_id = MLAN_IOCTL_MISC_CFG;
+    req->action = MLAN_ACT_SET;
+    cfg->param.region_code = region_string_2_region_code(region);
+    ret = woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT);
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+#endif /* STA_SUPPORT */
+
+/** 
+ *  @brief get data rate 
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param datarate             A pointer to mlan_ds_rate structure
+ *
+ *  @return                     MLAN_STATUS_SUCCESS -- success, otherwise fail          
+ */
+mlan_status
+woal_get_data_rate(moal_private * priv, mlan_ds_rate * datarate)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ds_rate *rate = NULL;
+    mlan_ioctl_req *req = NULL;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_rate));
+    if (req == NULL) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    rate = (mlan_ds_rate *) req->pbuf;
+    rate->param.rate_cfg.rate_type = MLAN_RATE_VALUE;
+    rate->sub_command = MLAN_OID_RATE_CFG;
+    req->req_id = MLAN_IOCTL_RATE;
+    req->action = MLAN_ACT_GET;
+
+    if (MLAN_STATUS_SUCCESS == woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        if (datarate)
+            memcpy(datarate, rate, sizeof(mlan_ds_rate));
+    } else {
+        ret = MLAN_STATUS_FAILURE;
+    }
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Send get FW info request to MLAN
+ *   
+ *  @param priv             A pointer to moal_private structure
+ *  @param wait_option      Wait option  
+ *  @param fw_info          FW information
+ *
+ *  @return                 MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail          
+ */
+mlan_status
+woal_request_get_fw_info(moal_private * priv, t_u8 wait_option,
+                         mlan_fw_info * fw_info)
+{
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_get_info *info;
+    mlan_status status;
+    ENTER();
+    memset(priv->current_addr, 0xff, ETH_ALEN);
+
+    /* Allocate an IOCTL request buffer */
+    req = (mlan_ioctl_req *) woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_bss));
+    if (req == NULL) {
+        status = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    info = (mlan_ds_get_info *) req->pbuf;
+    req->req_id = MLAN_IOCTL_GET_INFO;
+    req->action = MLAN_ACT_GET;
+    info->sub_command = MLAN_OID_GET_FW_INFO;
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, wait_option);
+    if (status == MLAN_STATUS_SUCCESS) {
+        priv->phandle->fw_release_number = info->param.fw_info.fw_ver;
+        if (priv->current_addr[0] == 0xff)
+            memcpy(priv->current_addr, &info->param.fw_info.mac_addr,
+                   sizeof(mlan_802_11_mac_addr));
+        memcpy(priv->netdev->dev_addr, priv->current_addr, ETH_ALEN);
+        if (fw_info)
+            memcpy(fw_info, &info->param.fw_info, sizeof(mlan_fw_info));
+        DBG_HEXDUMP(MCMD_D, "mac", priv->current_addr, 6);
+    } else
+        PRINTM(MERROR, "get fw info failed! status=%d, error_code=0x%lx\n",
+               status, req->status_code);
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return status;
+}
+
+#ifdef PROC_DEBUG
+/** 
+ *  @brief Get debug info
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param wait_option          Wait option
+ *  @param debug_info           A pointer to mlan_debug_info structure
+ *
+ *  @return                     MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail          
+ */
+mlan_status
+woal_get_debug_info(moal_private * priv, t_u8 wait_option,
+                    mlan_debug_info * debug_info)
+{
+    int ret = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_get_info *info = NULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_get_info));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    info = (mlan_ds_get_info *) req->pbuf;
+    info->sub_command = MLAN_OID_GET_DEBUG_INFO;
+    req->req_id = MLAN_IOCTL_GET_INFO;
+    req->action = MLAN_ACT_GET;
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, wait_option);
+    if (status == MLAN_STATUS_SUCCESS) {
+        if (debug_info) {
+            memcpy(debug_info, &info->param.debug_info,
+                   sizeof(mlan_debug_info));
+        }
+    }
+  done:
+    if (req && (status != MLAN_STATUS_PENDING))
+        kfree(req);
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Set debug info
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param wait_option          Wait option
+ *  @param debug_info           A pointer to mlan_debug_info structure
+ *
+ *  @return                     MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail          
+ */
+mlan_status
+woal_set_debug_info(moal_private * priv, t_u8 wait_option,
+                    mlan_debug_info * debug_info)
+{
+    int ret = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_get_info *info = NULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    if (!debug_info) {
+        ret = -EINVAL;
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_get_info));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    info = (mlan_ds_get_info *) req->pbuf;
+    info->sub_command = MLAN_OID_GET_DEBUG_INFO;
+    memcpy(&info->param.debug_info, debug_info, sizeof(mlan_debug_info));
+    req->req_id = MLAN_IOCTL_GET_INFO;
+    req->action = MLAN_ACT_SET;
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, wait_option);
+  done:
+    if (req && (status != MLAN_STATUS_PENDING))
+        kfree(req);
+    LEAVE();
+    return status;
+}
+#endif /* PROC_DEBUG */
+
+/** 
+ *  @brief host command ioctl function
+ *   
+ *  @param priv		A pointer to moal_private structure
+ *  @param wrq 		A pointer to iwreq structure
+ *  @return    		0 --success, otherwise fail
+ */
+int
+woal_host_command(moal_private * priv, struct iwreq *wrq)
+{
+    HostCmd_Header cmd_header;
+    int ret = 0;
+    mlan_ds_misc_cfg *misc = NULL;
+    mlan_ioctl_req *req = NULL;
+
+    ENTER();
+
+    /* Sanity check */
+    if (wrq->u.data.pointer == NULL) {
+        PRINTM(MERROR, "hostcmd IOCTL corrupt data\n");
+        ret = -EINVAL;
+        goto done;
+    }
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_misc_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    misc = (mlan_ds_misc_cfg *) req->pbuf;
+    memset(&cmd_header, 0, sizeof(cmd_header));
+
+    /* get command header */
+    if (copy_from_user
+        (&cmd_header, wrq->u.data.pointer, sizeof(HostCmd_Header))) {
+        PRINTM(MERROR, "copy from user failed: Host command header\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    misc->param.hostcmd.len = woal_le16_to_cpu(cmd_header.size);
+
+    PRINTM(MINFO, "Host command len = %lu\n", misc->param.hostcmd.len);
+
+    if (!misc->param.hostcmd.len ||
+        misc->param.hostcmd.len > MLAN_SIZE_OF_CMD_BUFFER) {
+        PRINTM(MERROR, "Invalid data buffer length\n");
+        ret = -EINVAL;
+        goto done;
+    }
+
+    /* get the whole command from user */
+    if (copy_from_user
+        (misc->param.hostcmd.cmd, wrq->u.data.pointer,
+         woal_le16_to_cpu(cmd_header.size))) {
+        PRINTM(MERROR, "copy from user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    misc->sub_command = MLAN_OID_MISC_HOST_CMD;
+    req->req_id = MLAN_IOCTL_MISC_CFG;
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    if (copy_to_user
+        (wrq->u.data.pointer, (t_u8 *) misc->param.hostcmd.cmd,
+         misc->param.hostcmd.len)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    wrq->u.data.length = misc->param.hostcmd.len;
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+#if defined(WFD_SUPPORT) || defined(UAP_SUPPORT)
+/** 
+ *  @brief host command ioctl function
+ *   
+ *  @param dev      A pointer to net_device structure
+ *  @param req      A pointer to ifreq structure
+ *  @return         0 --success, otherwise fail
+ */
+/*********  format of ifr_data *************/
+/*    buf_len + Hostcmd_body 		   */
+/*    buf_len: 4 bytes                     */
+/*             the length of the buf which */
+/*             can be used to return data  */
+/*             to application		   */
+/*    Hostcmd_body       	           */
+/*******************************************/
+int
+woal_hostcmd_ioctl(struct net_device *dev, struct ifreq *req)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    t_u32 buf_len = 0;
+    HostCmd_Header cmd_header;
+    int ret = 0;
+    mlan_ds_misc_cfg *misc = NULL;
+    mlan_ioctl_req *ioctl_req = NULL;
+
+    ENTER();
+
+    /* Sanity check */
+    if (req->ifr_data == NULL) {
+        PRINTM(MERROR, "uap_hostcmd_ioctl() corrupt data\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+    if (copy_from_user(&buf_len, req->ifr_data, sizeof(buf_len))) {
+        PRINTM(MERROR, "Copy from user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+    memset(&cmd_header, 0, sizeof(cmd_header));
+
+    /* get command header */
+    if (copy_from_user
+        (&cmd_header, req->ifr_data + sizeof(buf_len),
+         sizeof(HostCmd_Header))) {
+        PRINTM(MERROR, "Copy from user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+    PRINTM(MINFO, "Host command len = %d\n", woal_le16_to_cpu(cmd_header.size));
+
+    if (woal_le16_to_cpu(cmd_header.size) > MLAN_SIZE_OF_CMD_BUFFER) {
+        ret = -EINVAL;
+        goto done;
+    }
+
+    ioctl_req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_misc_cfg));
+    if (ioctl_req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    misc = (mlan_ds_misc_cfg *) ioctl_req->pbuf;
+
+    misc->param.hostcmd.len = woal_le16_to_cpu(cmd_header.size);
+
+    /* get the whole command from user */
+    if (copy_from_user
+        (misc->param.hostcmd.cmd, req->ifr_data + sizeof(buf_len),
+         misc->param.hostcmd.len)) {
+        PRINTM(MERROR, "copy from user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    misc->sub_command = MLAN_OID_MISC_HOST_CMD;
+    ioctl_req->req_id = MLAN_IOCTL_MISC_CFG;
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_request_ioctl(priv, ioctl_req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    if (misc->param.hostcmd.len > buf_len) {
+        PRINTM(MERROR, "buf_len is too small, resp_len=%d, buf_len=%d\n",
+               (int) misc->param.hostcmd.len, (int) buf_len);
+        ret = -EFAULT;
+        goto done;
+    }
+    if (copy_to_user
+        (req->ifr_data + sizeof(buf_len), (t_u8 *) misc->param.hostcmd.cmd,
+         misc->param.hostcmd.len)) {
+        ret = -EFAULT;
+        goto done;
+    }
+  done:
+    if (ioctl_req)
+        kfree(ioctl_req);
+    LEAVE();
+    return ret;
+}
+#endif
+
+/** 
+ *  @brief CUSTOM_IE ioctl handler
+ *   
+ *  @param dev      A pointer to net_device structure
+ *  @param req      A pointer to ifreq structure
+ *  @return         0 --success, otherwise fail
+ */
+int
+woal_custom_ie_ioctl(struct net_device *dev, struct ifreq *req)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_ioctl_req *ioctl_req = NULL;
+    mlan_ds_misc_cfg *misc = NULL;
+    mlan_ds_misc_custom_ie *custom_ie = NULL;
+    int ret = 0;
+
+    ENTER();
+
+    /* Sanity check */
+    if (req->ifr_data == NULL) {
+        PRINTM(MERROR, "woal_custom_ie_ioctl() corrupt data\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+    if (!(custom_ie = kmalloc(sizeof(mlan_ds_misc_custom_ie), GFP_KERNEL))) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    memset(custom_ie, 0, sizeof(mlan_ds_misc_custom_ie));
+
+    if (copy_from_user
+        (custom_ie, req->ifr_data, sizeof(mlan_ds_misc_custom_ie))) {
+        PRINTM(MERROR, "Copy from user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+    ioctl_req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_misc_cfg));
+    if (ioctl_req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    misc = (mlan_ds_misc_cfg *) ioctl_req->pbuf;
+    misc->sub_command = MLAN_OID_MISC_CUSTOM_IE;
+    ioctl_req->req_id = MLAN_IOCTL_MISC_CFG;
+    if ((custom_ie->len == 0) ||
+        (custom_ie->len == sizeof(custom_ie->ie_data_list[0].ie_index)))
+        ioctl_req->action = MLAN_ACT_GET;
+    else
+        ioctl_req->action = MLAN_ACT_SET;
+
+    memcpy(&misc->param.cust_ie, custom_ie, sizeof(mlan_ds_misc_custom_ie));
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_request_ioctl(priv, ioctl_req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    if (ioctl_req->action == MLAN_ACT_GET) {
+        if (copy_to_user
+            (req->ifr_data, &misc->param.cust_ie,
+             sizeof(mlan_ds_misc_custom_ie))) {
+            PRINTM(MERROR, "Copy to user failed!\n");
+            ret = -EFAULT;
+            goto done;
+        }
+    } else if (ioctl_req->status_code == MLAN_ERROR_IOCTL_FAIL) {
+        /* send a separate error code to indicate error from driver */
+        ret = EFAULT;
+    }
+
+  done:
+    if (ioctl_req)
+        kfree(ioctl_req);
+    if (custom_ie)
+        kfree(custom_ie);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief ioctl function get BSS type
+ *   
+ *  @param dev      A pointer to net_device structure
+ *  @param req      A pointer to ifreq structure
+ *  @return         0 --success, otherwise fail
+ */
+int
+woal_get_bss_type(struct net_device *dev, struct ifreq *req)
+{
+    int ret = 0;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    int bss_type;
+
+    ENTER();
+
+    bss_type = (int) priv->bss_type;
+    if (copy_to_user(req->ifr_data, &bss_type, sizeof(int))) {
+        PRINTM(MINFO, "Copy to user failed!\n");
+        ret = -EFAULT;
+    }
+
+    LEAVE();
+    return ret;
+}
+
+#if defined(WFD_SUPPORT)
+#if defined(STA_SUPPORT) && defined(UAP_SUPPORT)
+/**
+ * @brief Set/Get BSS role
+ * 
+ * @param priv     A pointer to moal_private structure
+ * @param wrq      A pointer to iwreq structure
+ * 
+ * @return         0 --success, otherwise fail
+ */
+int
+woal_set_get_bss_role(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0;
+    mlan_ds_bss *bss = NULL;
+    mlan_ioctl_req *req = NULL;
+    int bss_role = 0;
+    struct net_device *dev = priv->netdev;
+
+    ENTER();
+
+    if (priv->bss_type != MLAN_BSS_TYPE_WFD) {
+        PRINTM(MWARN, "Command is not allowed for this interface\n");
+        ret = -EPERM;
+        goto done;
+    }
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_bss));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    bss = (mlan_ds_bss *) req->pbuf;
+    bss->sub_command = MLAN_OID_BSS_ROLE;
+    req->req_id = MLAN_IOCTL_BSS;
+    if (wrq->u.data.length) {
+        if (copy_from_user(&bss_role, wrq->u.data.pointer, sizeof(int))) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        if (bss_role != MLAN_BSS_ROLE_STA && bss_role != MLAN_BSS_ROLE_UAP) {
+            PRINTM(MWARN, "Invalid BSS role\n");
+            ret = -EINVAL;
+            goto done;
+        }
+        if (bss_role == GET_BSS_ROLE(priv)) {
+            PRINTM(MWARN, "Already BSS is in desired role\n");
+            ret = -EINVAL;
+            goto done;
+        }
+        req->action = MLAN_ACT_SET;
+        bss->param.bss_role = (t_u8) bss_role;
+    } else {
+        req->action = MLAN_ACT_GET;
+    }
+
+    if (req->action == MLAN_ACT_SET) {
+        /* Reset interface */
+        woal_reset_intf(priv, MOAL_IOCTL_WAIT, MFALSE);
+    }
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    if (!wrq->u.data.length) {
+        bss_role = (int) bss->param.bss_role;
+        if (copy_to_user(wrq->u.data.pointer, &bss_role, sizeof(int))) {
+            ret = -EFAULT;
+            goto done;
+        }
+        wrq->u.data.length = 1;
+    } else {
+        /* Update moal_private */
+        priv->bss_role = bss_role;
+        if (priv->bss_type == MLAN_BSS_TYPE_UAP)
+            priv->bss_type = MLAN_BSS_TYPE_STA;
+        else if (priv->bss_type == MLAN_BSS_TYPE_STA)
+            priv->bss_type = MLAN_BSS_TYPE_UAP;
+
+        /* Initialize private structures */
+        woal_init_priv(priv, MOAL_IOCTL_WAIT);
+
+        if (bss_role == MLAN_BSS_ROLE_UAP) {
+            /* Switch: STA -> uAP */
+            /* Setup the OS Interface to our functions */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
+            dev->do_ioctl = woal_uap_do_ioctl;
+            dev->set_multicast_list = woal_uap_set_multicast_list;
+#else
+            dev->netdev_ops = &woal_uap_netdev_ops;
+#endif
+#ifdef WIRELESS_EXT
+#if WIRELESS_EXT < 21
+            dev->get_wireless_stats = woal_get_uap_wireless_stats;
+#endif
+            dev->wireless_handlers =
+                (struct iw_handler_def *) &woal_uap_handler_def;
+#endif /* WIRELESS_EXT */
+            init_waitqueue_head(&priv->w_stats_wait_q);
+        } else if (bss_role == MLAN_BSS_ROLE_STA) {
+            /* Switch: uAP -> STA */
+            /* Setup the OS Interface to our functions */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
+            dev->do_ioctl = woal_do_ioctl;
+            dev->set_multicast_list = woal_set_multicast_list;
+#else
+            dev->netdev_ops = &woal_netdev_ops;
+#endif
+#ifdef  WIRELESS_EXT
+#if WIRELESS_EXT < 21
+            dev->get_wireless_stats = woal_get_wireless_stats;
+#endif
+            dev->wireless_handlers =
+                (struct iw_handler_def *) &woal_handler_def;
+#endif
+            init_waitqueue_head(&priv->w_stats_wait_q);
+        }
+        /* Enable interfaces */
+        netif_device_attach(dev);
+        woal_start_queue(dev);
+    }
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+#endif
+#endif /* WFD_SUPPORT && V14_FEATURE */
+
+/** 
+ *  @brief Get Host Sleep parameters
+ *
+ *  @param priv         A pointer to moal_private structure
+ *  @param action       Action: set or get
+ *  @param wait_option  Wait option (MOAL_WAIT or MOAL_NO_WAIT)
+ *  @param hscfg        A pointer to mlan_ds_hs_cfg structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail          
+ */
+mlan_status
+woal_set_get_hs_params(moal_private * priv, t_u16 action, t_u8 wait_option,
+                       mlan_ds_hs_cfg * hscfg)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ds_pm_cfg *pmcfg = NULL;
+    mlan_ioctl_req *req = NULL;
+
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_pm_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    pmcfg = (mlan_ds_pm_cfg *) req->pbuf;
+    pmcfg->sub_command = MLAN_OID_PM_CFG_HS_CFG;
+    req->req_id = MLAN_IOCTL_PM_CFG;
+    req->action = action;
+    if (action == MLAN_ACT_SET)
+        memcpy(&pmcfg->param.hs_cfg, hscfg, sizeof(mlan_ds_hs_cfg));
+
+    /* Send IOCTL request to MLAN */
+    ret = woal_request_ioctl(priv, req, wait_option);
+    if (ret == MLAN_STATUS_SUCCESS) {
+        if (hscfg && action == MLAN_ACT_GET) {
+            memcpy(hscfg, &pmcfg->param.hs_cfg, sizeof(mlan_ds_hs_cfg));
+        }
+    }
+  done:
+    if (req && (ret != MLAN_STATUS_PENDING))
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Cancel Host Sleep configuration
+ *
+ *  @param priv             A pointer to moal_private structure
+ *  @param wait_option      wait option
+ *
+ *  @return      MLAN_STATUS_SUCCESS, MLAN_STATUS_PENDING,
+ *                      or MLAN_STATUS_FAILURE          
+ */
+mlan_status
+woal_cancel_hs(moal_private * priv, t_u8 wait_option)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ds_hs_cfg hscfg;
+
+    ENTER();
+
+    /* Cancel Host Sleep */
+    hscfg.conditions = HOST_SLEEP_CFG_CANCEL;
+    hscfg.is_invoke_hostcmd = MTRUE;
+    ret = woal_set_get_hs_params(priv, MLAN_ACT_SET, wait_option, &hscfg);
+
+    LEAVE();
+    return ret;
+}
+
+/**  @brief This function enables the host sleep
+ *  
+ *  @param priv   A Pointer to the moal_private structure
+ *  @return 	  MTRUE or MFALSE
+ */
+int
+woal_enable_hs(moal_private * priv)
+{
+    mlan_ds_hs_cfg hscfg;
+    moal_handle *handle = NULL;
+    int hs_actived = MFALSE;
+    int timeout = 0;
+
+    ENTER();
+
+    if (priv == NULL) {
+        PRINTM(MERROR, "Invalid priv\n");
+        goto done;
+    }
+    handle = priv->phandle;
+    if (handle->hs_activated == MTRUE) {
+        PRINTM(MIOCTL, "HS Already actived\n");
+        hs_actived = MTRUE;
+        goto done;
+    }
+
+    /* Enable Host Sleep */
+    handle->hs_activate_wait_q_woken = MFALSE;
+    memset(&hscfg, 0, sizeof(mlan_ds_hs_cfg));
+    hscfg.is_invoke_hostcmd = MTRUE;
+    if (woal_set_get_hs_params(priv, MLAN_ACT_SET, MOAL_NO_WAIT, &hscfg) ==
+        MLAN_STATUS_FAILURE) {
+        PRINTM(MIOCTL, "IOCTL request HS enable failed\n");
+        goto done;
+    }
+    timeout = wait_event_interruptible_timeout(handle->hs_activate_wait_q,
+                                               handle->hs_activate_wait_q_woken,
+                                               HS_ACTIVE_TIMEOUT);
+    if ((handle->hs_activated == MTRUE) || (handle->is_suspended == MTRUE)) {
+        PRINTM(MCMND, "suspend success! force=%lu skip=%lu\n",
+               handle->hs_force_count, handle->hs_skip_count);
+        hs_actived = MTRUE;
+    }
+    if (hs_actived != MTRUE) {
+        handle->hs_skip_count++;
+        PRINTM(MCMND, "suspend skipped! timeout=%d skip=%lu\n",
+               timeout, handle->hs_skip_count);
+        woal_cancel_hs(priv, MOAL_NO_WAIT);
+    }
+  done:
+    LEAVE();
+    return hs_actived;
+}
+
+/** 
+ *  @brief This function send soft_reset command to firmware 
+ *  
+ *  @param handle   A pointer to moal_handle structure
+ *  @return 	    MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING on success, otherwise failure code
+ */
+mlan_status
+woal_request_soft_reset(moal_handle * handle)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_misc_cfg *misc = NULL;
+
+    ENTER();
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_misc_cfg));
+    if (req) {
+        misc = (mlan_ds_misc_cfg *) req->pbuf;
+        misc->sub_command = MLAN_OID_MISC_SOFT_RESET;
+        req->req_id = MLAN_IOCTL_MISC_CFG;
+        req->action = MLAN_ACT_SET;
+        ret =
+            woal_request_ioctl(woal_get_priv(handle, MLAN_BSS_ROLE_ANY), req,
+                               MOAL_PROC_WAIT);
+    }
+
+    handle->surprise_removed = MTRUE;
+    woal_sched_timeout(5);
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set wapi enable
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param wait_option          Wait option
+ *  @param enable               MTRUE or MFALSE
+ *
+ *  @return                     MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail          
+ */
+mlan_status
+woal_set_wapi_enable(moal_private * priv, t_u8 wait_option, t_u32 enable)
+{
+    int ret = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_sec_cfg *sec = NULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_sec_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    sec = (mlan_ds_sec_cfg *) req->pbuf;
+    sec->sub_command = MLAN_OID_SEC_CFG_WAPI_ENABLED;
+    req->req_id = MLAN_IOCTL_SEC_CFG;
+    req->action = MLAN_ACT_SET;
+    sec->param.wapi_enabled = enable;
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, wait_option);
+  done:
+    if (req && (status != MLAN_STATUS_PENDING))
+        kfree(req);
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Get version 
+ *   
+ *  @param handle 		A pointer to moal_handle structure
+ *  @param version		A pointer to version buffer
+ *  @param max_len		max length of version buffer
+ *
+ *  @return 	   		N/A
+ */
+void
+woal_get_version(moal_handle * handle, char *version, int max_len)
+{
+    union
+    {
+        t_u32 l;
+        t_u8 c[4];
+    } ver;
+    char fw_ver[32];
+
+    ENTER();
+
+    ver.l = handle->fw_release_number;
+    sprintf(fw_ver, "%u.%u.%u.p%u", ver.c[2], ver.c[1], ver.c[0], ver.c[3]);
+
+    snprintf(version, max_len, driver_version, fw_ver);
+
+    LEAVE();
+}
+
+/**
+ *  @brief Get Driver Version
+ *
+ *  @param priv         A pointer to moal_private structure
+ *  @param req          A pointer to ifreq structure
+ *
+ *  @return             0 --success, otherwise fail
+ */
+int
+woal_get_driver_version(moal_private * priv, struct ifreq *req)
+{
+    struct iwreq *wrq = (struct iwreq *) req;
+    int len;
+    char buf[MLAN_MAX_VER_STR_LEN];
+    ENTER();
+
+    woal_get_version(priv->phandle, buf, sizeof(buf) - 1);
+
+    len = strlen(buf);
+    if (wrq->u.data.pointer) {
+        if (copy_to_user(wrq->u.data.pointer, buf, len)) {
+            PRINTM(MERROR, "Copy to user failed\n");
+            LEAVE();
+            return -EFAULT;
+        }
+        wrq->u.data.length = len;
+    }
+    PRINTM(MINFO, "MOAL VERSION: %s\n", buf);
+    LEAVE();
+    return 0;
+}
+
+/**
+ *  @brief Get extended driver version
+ *
+ *  @param priv         A pointer to moal_private structure
+ *  @param ireq         A pointer to ifreq structure
+ *
+ *  @return             0 --success, otherwise fail  
+ */
+int
+woal_get_driver_verext(moal_private * priv, struct ifreq *ireq)
+{
+    struct iwreq *wrq = (struct iwreq *) ireq;
+    mlan_ds_get_info *info = NULL;
+    mlan_ioctl_req *req = NULL;
+    int ret = 0;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_get_info));
+    if (req == NULL) {
+        LEAVE();
+        return -ENOMEM;
+    }
+
+    info = (mlan_ds_get_info *) req->pbuf;
+    info->sub_command = MLAN_OID_GET_VER_EXT;
+    req->req_id = MLAN_IOCTL_GET_INFO;
+    req->action = MLAN_ACT_GET;
+
+    if (!wrq->u.data.flags) {
+        info->param.ver_ext.version_str_sel =
+            *((int *) (wrq->u.name + SUBCMD_OFFSET));
+    } else {
+        if (copy_from_user
+            (&info->param.ver_ext.version_str_sel, wrq->u.data.pointer,
+             sizeof(info->param.ver_ext.version_str_sel))) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        } else {
+            if (((t_s32) (info->param.ver_ext.version_str_sel)) < 0) {
+                PRINTM(MERROR, "Invalid arguments!\n");
+                ret = -EINVAL;
+                goto done;
+            }
+        }
+    }
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    if (wrq->u.data.pointer) {
+        if (copy_to_user(wrq->u.data.pointer, info->param.ver_ext.version_str,
+                         strlen(info->param.ver_ext.version_str))) {
+            PRINTM(MERROR, "Copy to user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        wrq->u.data.length = strlen(info->param.ver_ext.version_str);
+    }
+
+    PRINTM(MINFO, "MOAL EXTENDED VERSION: %s\n",
+           info->param.ver_ext.version_str);
+  done:
+    if (req)
+        kfree(req);
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Handle ioctl resp 
+ *   
+ *  @param priv 	Pointer to moal_private structure
+ *  @param req		Pointer to mlan_ioctl_req structure
+ *
+ *  @return    		N/A
+ */
+void
+woal_process_ioctl_resp(moal_private * priv, mlan_ioctl_req * req)
+{
+    ENTER();
+
+    if (priv == NULL)
+        return;
+    switch (req->req_id) {
+    case MLAN_IOCTL_GET_INFO:
+#ifdef STA_SUPPORT
+        if (GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_STA)
+            woal_ioctl_get_info_resp(priv, (mlan_ds_get_info *) req->pbuf);
+#endif
+#ifdef UAP_SUPPORT
+        if (GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_UAP)
+            woal_ioctl_get_uap_info_resp(priv, (mlan_ds_get_info *) req->pbuf);
+#endif
+        break;
+#ifdef STA_SUPPORT
+    case MLAN_IOCTL_BSS:
+        if (GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_STA)
+            woal_ioctl_get_bss_resp(priv, (mlan_ds_bss *) req->pbuf);
+#endif
+    default:
+        break;
+    }
+
+    LEAVE();
+    return;
+}
+
+/** 
+ *  @brief Get PM info
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param pm_info              A pointer to mlan_ds_ps_info structure
+ *
+ *  @return                     MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail          
+ */
+mlan_status
+woal_get_pm_info(moal_private * priv, mlan_ds_ps_info * pm_info)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ds_pm_cfg *pmcfg = NULL;
+    mlan_ioctl_req *req = NULL;
+
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_pm_cfg));
+    if (req == NULL) {
+        PRINTM(MERROR, "Fail to alloc mlan_ds_pm_cfg buffer\n");
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    pmcfg = (mlan_ds_pm_cfg *) req->pbuf;
+    pmcfg->sub_command = MLAN_OID_PM_INFO;
+    req->req_id = MLAN_IOCTL_PM_CFG;
+    req->action = MLAN_ACT_GET;
+
+    /* Send IOCTL request to MLAN */
+    ret = woal_request_ioctl(priv, req, MOAL_CMD_WAIT);
+    if (ret == MLAN_STATUS_SUCCESS) {
+        if (pm_info) {
+            memcpy(pm_info, &pmcfg->param.ps_info, sizeof(mlan_ds_ps_info));
+        }
+    }
+  done:
+    if (req && (ret != MLAN_STATUS_PENDING))
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Cancel CAC period block
+ */
+void
+woal_cancel_cac_block(moal_private * priv)
+{
+    /* if during CAC period, wake up wait queue */
+    if (priv->phandle->cac_period == MTRUE) {
+        priv->phandle->cac_period = MFALSE;
+        priv->phandle->meas_start_jiffies = 0;
+        if (priv->phandle->delay_bss_start == MTRUE) {
+            priv->phandle->delay_bss_start = MFALSE;
+        }
+        if (priv->phandle->meas_wait_q_woken == MFALSE) {
+            priv->phandle->meas_wait_q_woken = MTRUE;
+            wake_up_interruptible(&priv->phandle->meas_wait_q);
+        }
+    }
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_main.c linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_main.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_main.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_main.c	2017-09-23 03:42:50.158674636 +0800
@@ -0,0 +1,3262 @@
+/** @file moal_main.c
+  *
+  * @brief This file contains the major functions in WLAN
+  * driver. 
+  *
+  * Copyright (C) 2008-2011, Marvell International Ltd. 
+  * 
+  * This software file (the "File") is distributed by Marvell International 
+  * Ltd. under the terms of the GNU General Public License Version 2, June 1991 
+  * (the "License").  You may use, redistribute and/or modify this File in 
+  * accordance with the terms and conditions of the License, a copy of which 
+  * is available by writing to the Free Software Foundation, Inc.,
+  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
+  * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
+  *
+  * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 
+  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 
+  * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about 
+  * this warranty disclaimer.
+  *
+  */
+
+/********************************************************
+Change log:
+    10/21/2008: initial version
+********************************************************/
+
+#include	"moal_main.h"
+#include 	"moal_usb.h"
+#ifdef UAP_SUPPORT
+#include    "moal_uap.h"
+#endif
+#ifdef STA_SUPPORT
+#include    "moal_priv.h"
+#endif /* STA_SUPPORT */
+
+/********************************************************
+		Local Variables
+********************************************************/
+
+/** Driver version */
+char driver_version[] =
+    "USB8782-%s-M2614" MLAN_RELEASE_VERSION "-GPL" "-(" "FP" ")"
+//    "USB8782-%s-M2614" MLAN_RELEASE_VERSION "-GPL" "-(" "FP" FPNUM ")"	//lxy
+#ifdef	DEBUG_LEVEL2
+    "-dbg"
+#endif
+    " ";
+
+/** Firmware name */
+char *fw_name = NULL;
+int req_fw_nowait = 1;	//lxy
+
+/** MAC address */
+char *mac_addr = NULL;
+
+#ifdef MFG_CMD_SUPPORT
+/** Mfg mode */
+int mfg_mode = 0;
+#endif
+
+/** IEEE PS mode */
+int ps_mode = 0;
+
+/** Max Tx buffer size */
+int max_tx_buf = 0;
+
+#ifdef STA_SUPPORT
+/** Max STA interfaces */
+int max_sta_bss = DEF_STA_BSS;
+#endif
+
+#ifdef UAP_SUPPORT
+/** Max uAP interfaces */
+int max_uap_bss = DEF_UAP_BSS;
+#endif
+
+#if defined(WFD_SUPPORT)
+/** Max WFD interfaces */
+int max_wfd_bss = DEF_WFD_BSS;
+#endif
+
+#if defined(STA_SUPPORT)
+/** 802.11d configuration */
+int cfg_11d = 0;
+#endif
+
+/** CAL data config file */
+char *cal_data_cfg = NULL;
+/** Init config file (MAC address, register etc.) */
+char *init_cfg = NULL;
+
+/** woal_callbacks */
+static mlan_callbacks woal_callbacks = {
+    .moal_get_fw_data = moal_get_fw_data,
+    .moal_init_fw_complete = moal_init_fw_complete,
+    .moal_shutdown_fw_complete = moal_shutdown_fw_complete,
+    .moal_send_packet_complete = moal_send_packet_complete,
+    .moal_recv_packet = moal_recv_packet,
+    .moal_recv_event = moal_recv_event,
+    .moal_ioctl_complete = moal_ioctl_complete,
+    .moal_alloc_mlan_buffer = moal_alloc_mlan_buffer,
+    .moal_free_mlan_buffer = moal_free_mlan_buffer,
+    .moal_recv_complete = moal_recv_complete,
+    .moal_write_data_async = moal_write_data_async,
+    .moal_write_data_sync = moal_write_data_sync,
+    .moal_read_data_sync = moal_read_data_sync,
+    .moal_malloc = moal_malloc,
+    .moal_mfree = moal_mfree,
+    .moal_memset = moal_memset,
+    .moal_memcpy = moal_memcpy,
+    .moal_memmove = moal_memmove,
+    .moal_memcmp = moal_memcmp,
+    .moal_udelay = moal_udelay,
+    .moal_get_system_time = moal_get_system_time,
+    .moal_init_timer = moal_init_timer,
+    .moal_free_timer = moal_free_timer,
+    .moal_start_timer = moal_start_timer,
+    .moal_stop_timer = moal_stop_timer,
+    .moal_init_lock = moal_init_lock,
+    .moal_free_lock = moal_free_lock,
+    .moal_spin_lock = moal_spin_lock,
+    .moal_spin_unlock = moal_spin_unlock,
+    .moal_print = moal_print,
+    .moal_assert = moal_assert,
+};
+
+/** Default Driver mode */
+#if defined(STA_SUPPORT) && defined(UAP_SUPPORT)
+#if defined(WFD_SUPPORT)
+int drv_mode = (DRV_MODE_STA | DRV_MODE_UAP);
+#else
+int drv_mode = (DRV_MODE_STA | DRV_MODE_UAP);
+#endif
+#else
+#ifdef STA_SUPPORT
+int drv_mode = DRV_MODE_STA;
+#else
+int drv_mode = DRV_MODE_UAP;
+#endif /* STA_SUPPORT */
+#endif /* STA_SUPPORT & UAP_SUPPORT */
+
+/********************************************************
+		Global Variables
+********************************************************/
+
+/** Semaphore for add/remove card */
+struct semaphore AddRemoveCardSem;
+/**
+ * the maximum number of adapter supported 
+ **/
+#define MAX_MLAN_ADAPTER    2
+/**
+ * The global variable of a pointer to moal_handle
+ * structure variable
+ **/
+moal_handle *m_handle[MAX_MLAN_ADAPTER];
+
+#ifdef DEBUG_LEVEL1
+#ifdef DEBUG_LEVEL2
+#define	DEFAULT_DEBUG_MASK	(0xffffffff)
+#else
+#define DEFAULT_DEBUG_MASK	(MMSG | MFATAL | MERROR)
+#endif /* DEBUG_LEVEL2 */
+t_u32 drvdbg = DEFAULT_DEBUG_MASK;
+#endif /* DEBUG_LEVEL1 */
+
+int woal_open(struct net_device *dev);
+int woal_close(struct net_device *dev);
+int woal_set_mac_address(struct net_device *dev, void *addr);
+void woal_tx_timeout(struct net_device *dev);
+struct net_device_stats *woal_get_stats(struct net_device *dev);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34)
+u16 woal_select_queue(struct net_device *dev, struct sk_buff *skb);
+#endif
+
+mlan_debug_info info;
+
+/********************************************************
+		Local Functions
+********************************************************/
+
+/**
+ *  @brief This function dynamically populates the driver mode table
+ *
+ *  @param handle           A pointer to moal_handle structure
+ *  @param drv_mode_local   Driver mode
+ *
+ *  @return        MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+wlan_update_drv_tbl(moal_handle * handle, int drv_mode_local)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    unsigned int intf_num = 0;
+    int i = 0, j = 0;
+    mlan_bss_attr *bss_tbl = NULL;
+
+    ENTER();
+
+    /* Calculate number of interfaces */
+#ifdef STA_SUPPORT
+    if (drv_mode_local & DRV_MODE_STA) {
+        if ((max_sta_bss < 1) || (max_sta_bss > MAX_STA_BSS)) {
+            PRINTM(MWARN, "Unsupported max_sta_bss (%d), setting to default\n",
+                   max_sta_bss);
+            max_sta_bss = DEF_STA_BSS;
+        }
+        intf_num += max_sta_bss;
+    }
+#endif /* STA_SUPPORT */
+
+#ifdef UAP_SUPPORT
+    if (drv_mode_local & DRV_MODE_UAP) {
+        if ((max_uap_bss < 1) || (max_uap_bss > MAX_UAP_BSS)) {
+            PRINTM(MWARN, "Unsupported max_uap_bss (%d), setting to default\n",
+                   max_uap_bss);
+            max_uap_bss = DEF_UAP_BSS;
+        }
+        intf_num += max_uap_bss;
+    }
+#endif /* UAP_SUPPORT */
+
+#if defined(WFD_SUPPORT)
+    if (drv_mode_local & DRV_MODE_WFD) {
+        if ((max_wfd_bss < 1) || (max_wfd_bss > MAX_WFD_BSS)) {
+            PRINTM(MWARN, "Unsupported max_wfd_bss (%d), setting to default\n",
+                   max_wfd_bss);
+            max_wfd_bss = DEF_WFD_BSS;
+        }
+        intf_num += max_wfd_bss;
+    }
+#endif /* WFD_SUPPORT && V14_FEATURE */
+
+    /* Create BSS attribute table */
+    if ((intf_num == 0) || (intf_num > MLAN_MAX_BSS_NUM)) {
+        PRINTM(MERROR, "Unsupported number of BSS %d\n", intf_num);
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    } else {
+        /* Create new table */
+        if (!
+            (bss_tbl =
+             (mlan_bss_attr *) kmalloc(sizeof(mlan_bss_attr) * intf_num,
+                                       GFP_KERNEL))) {
+            PRINTM(MERROR, "Could not create BSS attribute table\n");
+            ret = MLAN_STATUS_FAILURE;
+            goto done;
+        }
+    }
+
+    /* Populate BSS attribute table */
+#ifdef STA_SUPPORT
+    if (drv_mode_local & DRV_MODE_STA) {
+        for (j = 0; j < max_sta_bss; j++) {
+            if (i >= intf_num)
+                break;
+            bss_tbl[i].bss_type = MLAN_BSS_TYPE_STA;
+            bss_tbl[i].frame_type = MLAN_DATA_FRAME_TYPE_ETH_II;
+            bss_tbl[i].active = MTRUE;
+            bss_tbl[i].bss_priority = 0;
+            bss_tbl[i].bss_num = j;
+            i++;
+        }
+    }
+#endif /* STA_SUPPORT */
+
+#ifdef UAP_SUPPORT
+    if (drv_mode_local & DRV_MODE_UAP) {
+        for (j = 0; j < max_uap_bss; j++) {
+            if (i >= intf_num)
+                break;
+            bss_tbl[i].bss_type = MLAN_BSS_TYPE_UAP;
+            bss_tbl[i].frame_type = MLAN_DATA_FRAME_TYPE_ETH_II;
+            bss_tbl[i].active = MTRUE;
+            bss_tbl[i].bss_priority = 0;
+            bss_tbl[i].bss_num = j;
+            i++;
+        }
+    }
+#endif /* UAP_SUPPORT */
+
+#if defined(WFD_SUPPORT)
+    if (drv_mode_local & DRV_MODE_WFD) {
+        for (j = 0; j < max_wfd_bss; j++) {
+            if (i >= intf_num)
+                break;
+            bss_tbl[i].bss_type = MLAN_BSS_TYPE_WFD;
+            bss_tbl[i].frame_type = MLAN_DATA_FRAME_TYPE_ETH_II;
+            bss_tbl[i].active = MTRUE;
+            bss_tbl[i].bss_priority = 0;
+            bss_tbl[i].bss_num = j;
+            i++;
+        }
+    }
+#endif /* WFD_SUPPORT && V14_FEATURE */
+
+    /* Clear existing table, if any */
+    if (handle->drv_mode.bss_attr != NULL) {
+        kfree(handle->drv_mode.bss_attr);
+        handle->drv_mode.bss_attr = NULL;
+    }
+
+    /* Create moal_drv_mode entry */
+    handle->drv_mode.drv_mode = drv_mode;
+    handle->drv_mode.intf_num = intf_num;
+    handle->drv_mode.bss_attr = bss_tbl;
+    if (fw_name) {
+        handle->drv_mode.fw_name = fw_name;
+    } else {
+#if defined(UAP_SUPPORT) && defined(STA_SUPPORT)
+        handle->drv_mode.fw_name = DEFAULT_AP_STA_FW_NAME;
+#else
+#ifdef UAP_SUPPORT
+        handle->drv_mode.fw_name = DEFAULT_AP_FW_NAME;
+#else
+        handle->drv_mode.fw_name = DEFAULT_FW_NAME;
+#endif /* UAP_SUPPORT */
+#endif /* UAP_SUPPORT && STA_SUPPORT */
+    }
+
+  done:
+    if (ret == MLAN_STATUS_FAILURE) {
+        if (bss_tbl != NULL) {
+            kfree(bss_tbl);
+            bss_tbl = NULL;
+        }
+    }
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief This function initializes software
+ *  
+ *  @param handle A pointer to moal_handle structure
+ *
+ *  @return 	   MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+woal_init_sw(moal_handle * handle)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    unsigned int i;
+    mlan_device device;
+    t_void *pmlan;
+
+    ENTER();
+
+    /* Initialize moal_handle structure */
+    handle->hardware_status = HardwareStatusInitializing;
+    handle->main_state = MOAL_STATE_IDLE;
+
+    if (wlan_update_drv_tbl(handle, drv_mode) != MLAN_STATUS_SUCCESS) {
+        PRINTM(MERROR, "Could not update driver mode table\n");
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+
+    /* PnP and power profile */
+    handle->surprise_removed = MFALSE;
+    init_waitqueue_head(&handle->init_wait_q);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34)
+    spin_lock_init(&handle->queue_lock);
+#endif
+
+    handle->is_suspended = MFALSE;
+    handle->hs_activated = MFALSE;
+    handle->suspend_fail = MFALSE;
+    handle->hs_skip_count = 0;
+    handle->hs_force_count = 0;
+    init_waitqueue_head(&handle->suspend_wait_q);
+    init_waitqueue_head(&handle->hs_activate_wait_q);
+
+    /* Initialize measurement wait queue */
+    handle->meas_wait_q_woken = MFALSE;
+    handle->meas_start_jiffies = 0;
+    handle->cac_period = MFALSE;
+    handle->delay_bss_start = MFALSE;
+    init_waitqueue_head(&handle->meas_wait_q);
+
+#ifdef REASSOCIATION
+    MOAL_INIT_SEMAPHORE(&handle->reassoc_sem);
+    handle->reassoc_on = 0;
+
+    /* Initialize the timer for the reassociation */
+    woal_initialize_timer(&handle->reassoc_timer,
+                          woal_reassoc_timer_func, handle);
+
+    handle->is_reassoc_timer_set = MFALSE;
+#endif /* REASSOCIATION */
+
+    /* Register to MLAN */
+    memset(&device, 0, sizeof(mlan_device));
+    device.pmoal_handle = handle;
+
+#ifdef MFG_CMD_SUPPORT
+    device.mfg_mode = (t_u32) mfg_mode;
+#endif
+    device.ps_mode = (t_u32) ps_mode;
+    device.max_tx_buf = (t_u32) max_tx_buf;
+#if defined(STA_SUPPORT)
+    device.cfg_11d = (t_u32) cfg_11d;
+#endif
+
+    for (i = 0; i < handle->drv_mode.intf_num; i++) {
+        device.bss_attr[i].bss_type = handle->drv_mode.bss_attr[i].bss_type;
+        device.bss_attr[i].frame_type = handle->drv_mode.bss_attr[i].frame_type;
+        device.bss_attr[i].active = handle->drv_mode.bss_attr[i].active;
+        device.bss_attr[i].bss_priority =
+            handle->drv_mode.bss_attr[i].bss_priority;
+        device.bss_attr[i].bss_num = handle->drv_mode.bss_attr[i].bss_num;
+    }
+    memcpy(&device.callbacks, &woal_callbacks, sizeof(mlan_callbacks));
+
+    if (MLAN_STATUS_SUCCESS == mlan_register(&device, &pmlan))
+        handle->pmlan_adapter = pmlan;
+    else
+        ret = MLAN_STATUS_FAILURE;
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief This function frees the structure of moal_handle
+ *    
+ *  @param handle   A pointer to moal_handle structure
+ *
+ *  @return 	    N/A
+ */
+static void
+woal_free_moal_handle(moal_handle * handle)
+{
+    ENTER();
+    if (!handle) {
+        PRINTM(MERROR, "The handle is NULL\n");
+        LEAVE();
+        return;
+    }
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
+    if ((handle->nl_sk) && ((handle->nl_sk)->sk_socket)) {
+        sock_release((handle->nl_sk)->sk_socket);
+        handle->nl_sk = NULL;
+    }
+#else
+    netlink_kernel_release(handle->nl_sk);
+#endif
+
+    if (handle->pmlan_adapter)
+        mlan_unregister(handle->pmlan_adapter);
+
+    /* Free BSS attribute table */
+    if (handle->drv_mode.bss_attr != NULL) {
+        kfree(handle->drv_mode.bss_attr);
+        handle->drv_mode.bss_attr = NULL;
+    }
+    PRINTM(MINFO, "Free Adapter\n");
+    if (handle->malloc_count || handle->lock_count || handle->mbufalloc_count) {
+        PRINTM(MERROR,
+               "mlan has memory leak: malloc_count=%lu lock_count=%lu mbufalloc_count=%lu\n",
+               handle->malloc_count, handle->lock_count,
+               handle->mbufalloc_count);
+    }
+    /* Free the moal handle itself */
+    kfree(handle);
+    LEAVE();
+}
+
+/**
+ *    @brief WOAL get one line data from ASCII format data
+ *   
+ *    @param data         Source data
+ *    @param size         Source data length
+ *    @param line_pos     Destination data
+ *    @return             routnine status
+ */
+static t_size
+parse_cfg_get_line(t_u8 * data, t_size size, t_u8 * line_pos)
+{
+    t_u8 *src, *dest;
+    static t_s32 pos = 0;
+
+    if (pos >= size) {          /* reach the end */
+        pos = 0;                /* Reset position for rfkill */
+        return -1;
+    }
+    memset(line_pos, 0, MAX_LINE_LEN);
+    src = data + pos;
+    dest = line_pos;
+
+    while (*src != '\x0A' && *src != '\0') {
+        if (*src != ' ' && *src != '\t')        /* parse space */
+            *dest++ = *src++;
+        else
+            src++;
+        pos++;
+    }
+    /* parse new line */
+    pos++;
+    *dest = '\0';
+    return strlen(line_pos);
+}
+
+/** 
+ *  @brief Process register access request
+ *  @param type_string     String format Register type
+ *  @param offset_string   String format Register offset
+ *  @param value_string    String format Pointer to value
+ *  @return                MLAN_STATUS_SUCCESS--success, otherwise--fail
+ */
+static t_u32
+woal_process_regrdwr(moal_handle * handle, t_u8 * type_string,
+                     t_u8 * offset_string, t_u8 * value_string)
+{
+    mlan_status ret = MLAN_STATUS_FAILURE;
+    int type, offset, value;
+    pmlan_ioctl_req ioctl_req = NULL;
+    mlan_ds_reg_mem *reg = NULL;
+
+    ENTER();
+
+    /* Alloc ioctl_req */
+    ioctl_req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_reg_mem));
+
+    if (ioctl_req == NULL) {
+        PRINTM(MERROR, "Can't alloc memory\n");
+        goto done;
+    }
+
+    if (MLAN_STATUS_SUCCESS != woal_atoi(&type, type_string)) {
+        goto done;
+    }
+    if (MLAN_STATUS_SUCCESS != woal_atoi(&offset, offset_string)) {
+        goto done;
+    }
+    if (MLAN_STATUS_SUCCESS != woal_atoi(&value, value_string)) {
+        goto done;
+    }
+
+    ioctl_req->req_id = MLAN_IOCTL_REG_MEM;
+    ioctl_req->action = MLAN_ACT_SET;
+
+    reg = (mlan_ds_reg_mem *) ioctl_req->pbuf;
+    reg->sub_command = MLAN_OID_REG_RW;
+    if (type < 5) {
+        reg->param.reg_rw.type = type;
+    } else {
+        PRINTM(MERROR, "Unsupported Type\n");
+        goto done;
+    }
+    reg->param.reg_rw.offset = offset;
+    reg->param.reg_rw.value = value;
+
+    /* request ioctl for STA */
+    if (MLAN_STATUS_SUCCESS !=
+        woal_request_ioctl(handle->priv[0], ioctl_req, MOAL_IOCTL_WAIT)) {
+        goto done;
+    }
+    PRINTM(MINFO, "Register type: %d, offset: 0x%x, value: 0x%x\n", type,
+           offset, value);
+    ret = MLAN_STATUS_SUCCESS;
+
+  done:
+    if (ioctl_req)
+        kfree(ioctl_req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *    @brief WOAL parse ASCII format data to MAC address
+ *   
+ *    @param handle       MOAL handle
+ *    @param data         Source data
+ *    @param size         data length
+ *    @return             MLAN_STATUS_SUCCESS--success, otherwise--fail
+ */
+static t_u32
+woal_process_init_cfg(moal_handle * handle, t_u8 * data, t_size size)
+{
+    mlan_status ret = MLAN_STATUS_FAILURE;
+    t_u8 *pos;
+    t_u8 *intf_s, *intf_e;
+    t_u8 s[MAX_LINE_LEN];       /* 1 line data */
+    t_size line_len;
+    t_u8 index = 0;
+    t_u32 i;
+    t_u8 bss_mac_addr[MAX_MAC_ADDR_LEN];
+    t_u8 bss_mac_name[MAX_PARAM_LEN];
+    t_u8 type[MAX_PARAM_LEN];
+    t_u8 offset[MAX_PARAM_LEN];
+    t_u8 value[MAX_PARAM_LEN];
+
+    ENTER();
+
+    while ((line_len = parse_cfg_get_line(data, size, s)) != -1) {
+
+        pos = s;
+        while (*pos == ' ' || *pos == '\t')
+            pos++;
+
+        if (*pos == '#' || (*pos == '\r' && *(pos + 1) == '\n') ||
+            *pos == '\n' || *pos == '\0')
+            continue;           /* Needn't process this line */
+
+        /* Process MAC addr */
+        if (strncmp(pos, "mac_addr", 8) == 0) {
+            intf_s = strchr(pos, '=');
+            if (intf_s != NULL)
+                intf_e = strchr(intf_s, ':');
+            else
+                intf_e = NULL;
+            if (intf_s != NULL && intf_e != NULL) {
+                strncpy(bss_mac_addr, intf_e + 1, MAX_MAC_ADDR_LEN - 1);
+                bss_mac_addr[MAX_MAC_ADDR_LEN - 1] = '\0';
+                if ((intf_e - intf_s) > MAX_PARAM_LEN) {
+                    PRINTM(MERROR, "Too long interface name %d\n", __LINE__);
+                    goto done;
+                }
+                strncpy(bss_mac_name, intf_s + 1, intf_e - intf_s - 1);
+                bss_mac_name[intf_e - intf_s - 1] = '\0';
+                for (i = 0; i < handle->priv_num; i++) {
+                    if (strcmp(bss_mac_name, handle->priv[i]->netdev->name) ==
+                        0) {
+                        memset(handle->priv[i]->current_addr, 0, ETH_ALEN);
+                        PRINTM(MINFO, "Interface name: %s mac: %s\n",
+                               bss_mac_name, bss_mac_addr);
+                        woal_mac2u8(handle->priv[i]->current_addr,
+                                    bss_mac_addr);
+                        /* Set WLAN MAC addresses */
+                        if (MLAN_STATUS_SUCCESS !=
+                            woal_request_set_mac_address(handle->priv[i])) {
+                            PRINTM(MERROR, "Set MAC address failed\n");
+                            goto done;
+                        }
+                        memcpy(handle->priv[i]->netdev->dev_addr,
+                               handle->priv[i]->current_addr, ETH_ALEN);
+                        index++;        /* Mark found one interface matching */
+                    }
+                }
+            } else {
+                PRINTM(MERROR, "Wrong config file format %d\n", __LINE__);
+                goto done;
+            }
+        }
+        /* Process REG value */
+        else if (strncmp(pos, "wlan_reg", 8) == 0) {
+            intf_s = strchr(pos, '=');
+            if (intf_s != NULL)
+                intf_e = strchr(intf_s, ',');
+            else
+                intf_e = NULL;
+            if (intf_s != NULL && intf_e != NULL) {
+                /* Copy type */
+                strncpy(type, intf_s + 1, 1);
+                type[1] = '\0';
+            } else {
+                PRINTM(MERROR, "Wrong config file format %d\n", __LINE__);
+                goto done;
+            }
+            intf_s = intf_e + 1;
+            if (intf_s != NULL)
+                intf_e = strchr(intf_s, ',');
+            else
+                intf_e = NULL;
+            if (intf_s != NULL && intf_e != NULL) {
+                if ((intf_e - intf_s) >= MAX_PARAM_LEN) {
+                    PRINTM(MERROR, "Regsier offset is too long %d\n", __LINE__);
+                    goto done;
+                }
+                /* Copy offset */
+                strncpy(offset, intf_s, intf_e - intf_s);
+                offset[intf_e - intf_s] = '\0';
+            } else {
+                PRINTM(MERROR, "Wrong config file format %d\n", __LINE__);
+                goto done;
+            }
+            intf_s = intf_e + 1;
+            if (intf_s != NULL) {
+                if ((strlen(intf_s) >= MAX_PARAM_LEN)) {
+                    PRINTM(MERROR, "Regsier value is too long %d\n", __LINE__);
+                    goto done;
+                }
+                /* Copy value */
+                strcpy(value, intf_s);
+            } else {
+                PRINTM(MERROR, "Wrong config file format %d\n", __LINE__);
+                goto done;
+            }
+
+            if (MLAN_STATUS_SUCCESS !=
+                woal_process_regrdwr(handle, type, offset, value)) {
+                PRINTM(MERROR, "Access Reg failed\n");
+                goto done;
+            }
+            PRINTM(MINFO, "Reg type: %s, offset: %s, value: %s\n", type, offset,
+                   value);
+        }
+    }
+
+    if (index == 0) {
+        PRINTM(MINFO, "Can't find any matching MAC Address");
+    }
+    ret = MLAN_STATUS_SUCCESS;
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *    @brief WOAL set user defined init data and param
+ *   
+ *    @param handle       MOAL handle structure
+ *    @return             MLAN_STATUS_SUCCESS--success, otherwise--fail
+ */
+static t_u32
+woal_set_user_init_data(moal_handle * handle)
+{
+    mlan_status ret = MLAN_STATUS_FAILURE;
+    t_u8 *cfg_data = NULL;
+    t_size len;
+
+    ENTER();
+
+    if ((request_firmware(&handle->user_data, init_cfg, handle->hotplug_device))
+        < 0) {
+        PRINTM(MERROR, "Init config file request_firmware() failed\n");
+        goto done;
+    }
+
+    if (handle->user_data) {
+        cfg_data = (t_u8 *) (handle->user_data)->data;
+        len = (handle->user_data)->size;
+        if (MLAN_STATUS_SUCCESS != woal_process_init_cfg(handle, cfg_data, len)) {
+            PRINTM(MERROR, "Can't process init config file\n");
+            goto done;
+        }
+        ret = MLAN_STATUS_SUCCESS;
+    }
+
+  done:
+    if (handle->user_data)
+        release_firmware(handle->user_data);
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ * @brief Add interfaces DPC
+ *  
+ * @param handle    A pointer to moal_handle structure
+ *
+ * @return        MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+woal_add_card_dpc(moal_handle * handle)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    int i;
+
+    ENTER();
+
+#ifdef CONFIG_PROC_FS
+    /* Initialize proc fs */
+    woal_proc_init(handle);
+#endif /* CONFIG_PROC_FS */
+
+    /* Add interfaces */
+    for (i = 0; i < handle->drv_mode.intf_num; i++) {
+        if (!woal_add_interface
+            (handle, handle->priv_num, handle->drv_mode.bss_attr[i].bss_type)) {
+            ret = MLAN_STATUS_FAILURE;
+            goto err;
+        }
+        handle->priv_num++;
+    }
+    if (init_cfg) {
+        if (MLAN_STATUS_SUCCESS != woal_set_user_init_data(handle)) {
+            PRINTM(MFATAL, "Set user init data and param failed\n");
+            ret = MLAN_STATUS_FAILURE;
+            goto err;
+        }
+    }
+
+  err:
+    if (ret != MLAN_STATUS_SUCCESS) {
+        PRINTM(MERROR, "Failed to add interface\n");
+        for (i = 0; i < handle->priv_num; i++)
+            woal_remove_interface(handle, i);
+        handle->priv_num = 0;
+#ifdef CONFIG_PROC_FS
+        woal_proc_exit(handle);
+#endif
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ * @brief Download and Initialize firmware DPC
+ *    
+ * @param handle    A pointer to moal_handle structure
+ *
+ * @return        MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+woal_init_fw_dpc(moal_handle * handle)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_fw_image fw;
+
+    mlan_init_param param;
+
+    ENTER();
+
+    if (handle->firmware) {
+        memset(&fw, 0, sizeof(mlan_fw_image));
+        fw.pfw_buf = (t_u8 *) handle->firmware->data;
+        fw.fw_len = handle->firmware->size;
+        ret = mlan_dnld_fw(handle->pmlan_adapter, &fw);
+        if (ret == MLAN_STATUS_FAILURE) {
+            PRINTM(MERROR, "WLAN: Download FW with nowwait: %d\n",
+                   req_fw_nowait);
+            goto done;
+        }
+        PRINTM(MMSG, "WLAN FW is active\n");
+    }
+
+        /** Cal data request */
+    memset(&param, 0, sizeof(mlan_init_param));
+    if (cal_data_cfg) {
+        if ((request_firmware
+             (&handle->user_data, cal_data_cfg, handle->hotplug_device)) < 0) {
+            PRINTM(MERROR, "Cal data request_firmware() failed\n");
+            ret = MLAN_STATUS_FAILURE;
+            goto done;
+        }
+    }
+
+    if (handle->user_data) {
+        param.pcal_data_buf = (t_u8 *) handle->user_data->data;
+        param.cal_data_len = handle->user_data->size;
+    }
+
+    handle->hardware_status = HardwareStatusFwReady;
+    if (handle->skip_fw_dnld != MTRUE) {
+        ret = woal_usb_rx_init(handle);
+        if (ret == MLAN_STATUS_SUCCESS)
+            ret = woal_usb_tx_init(handle);
+    }
+    if (ret != MLAN_STATUS_SUCCESS)
+        goto done;
+
+    handle->init_wait_q_woken = MFALSE;
+
+    ret = mlan_set_init_param(handle->pmlan_adapter, &param);
+
+    ret = mlan_init_fw(handle->pmlan_adapter);
+    if (ret == MLAN_STATUS_FAILURE) {
+        goto done;
+    } else if (ret == MLAN_STATUS_SUCCESS) {
+        handle->hardware_status = HardwareStatusReady;
+        goto done;
+    }
+    /* Wait for mlan_init to complete */
+    wait_event_interruptible(handle->init_wait_q, handle->init_wait_q_woken);
+    if (handle->hardware_status != HardwareStatusReady) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+    ret = MLAN_STATUS_SUCCESS;
+  done:
+    if (handle->user_data)
+        release_firmware(handle->user_data);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ * @brief Request firmware DPC
+ * 
+ * @param handle    A pointer to moal_handle structure
+ * @param firmware  A pointer to firmware image
+ *
+ * @return        MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+woal_request_fw_dpc(moal_handle * handle, const struct firmware *firmware)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    struct timeval tstamp;
+
+    ENTER();
+
+    if (!firmware) {
+        do_gettimeofday(&tstamp);
+        if (tstamp.tv_sec > (handle->req_fw_time.tv_sec + REQUEST_FW_TIMEOUT)) {
+            PRINTM(MERROR, "No firmware image found. Skipping download\n");
+            ret = MLAN_STATUS_FAILURE;
+            goto done;
+        }
+        PRINTM(MERROR, "request_firmware_nowait failed for %s. Retrying..\n",
+               handle->drv_mode.fw_name);
+        woal_sched_timeout(MOAL_TIMER_1S);
+        woal_request_fw(handle);
+        LEAVE();
+        return ret;
+    }
+    handle->firmware = firmware;
+
+    if ((ret = woal_init_fw_dpc(handle)))
+        goto done;
+    if ((ret = woal_add_card_dpc(handle)))
+        goto done;
+
+  done:
+    /* We should hold the semaphore until callback finishes execution */
+    MOAL_REL_SEMAPHORE(&AddRemoveCardSem);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ * @brief Request firmware callback
+ *        This function is invoked by request_firmware_nowait system call
+ * 
+ * @param firmware  A pointer to firmware image
+ * @param context   A pointer to moal_handle structure
+ *
+ * @return        N/A
+ */
+static void
+woal_request_fw_callback(const struct firmware *firmware, void *context)
+{
+    ENTER();
+    woal_request_fw_dpc((moal_handle *) context, firmware);
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,32)
+    if (firmware)
+        release_firmware(firmware);
+#endif
+    LEAVE();
+    return;
+}
+
+/** 
+ * @brief   Download firmware using helper
+ * 
+ * @param handle  A pointer to moal_handle structure
+ *
+ * @return        MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+woal_request_fw(moal_handle * handle)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    int err;
+
+    ENTER();
+
+    if (req_fw_nowait) {
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,32)
+        if ((err = request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
+                                           handle->drv_mode.fw_name,
+                                           handle->hotplug_device, GFP_KERNEL,
+                                           handle,
+                                           woal_request_fw_callback)) < 0) {
+#else
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
+        if ((err = request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
+                                           handle->drv_mode.fw_name,
+                                           handle->hotplug_device, handle,
+                                           woal_request_fw_callback)) < 0) {
+#else
+        if ((err = request_firmware_nowait(THIS_MODULE,
+                                           handle->drv_mode.fw_name,
+                                           handle->hotplug_device, handle,
+                                           woal_request_fw_callback)) < 0) {
+#endif
+#endif
+            PRINTM(MFATAL,
+                   "WLAN: request_firmware_nowait() failed, error code = %d\n",
+                   err);
+            ret = MLAN_STATUS_FAILURE;
+        }
+    } else {
+        if ((err =
+             request_firmware(&handle->firmware, handle->drv_mode.fw_name,
+                              handle->hotplug_device)) < 0) {
+            PRINTM(MFATAL, "WLAN: request_firmware() failed, error code = %d\n",
+                   err);
+            ret = MLAN_STATUS_FAILURE;
+        } else {
+            ret = woal_request_fw_dpc(handle, handle->firmware);
+            release_firmware(handle->firmware);
+        }
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief This function initializes firmware
+ *  
+ *  @param handle  A pointer to moal_handle structure
+ *
+ *  @return 	   MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+woal_init_fw(moal_handle * handle)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    if (MTRUE && (handle->skip_fw_dnld != MTRUE)
+        ) {
+        do_gettimeofday(&handle->req_fw_time);
+        if ((ret = woal_request_fw(handle)) < 0) {
+            PRINTM(MFATAL, "woal_request_fw failed\n");
+            ret = MLAN_STATUS_FAILURE;
+            goto done;
+        }
+    } else {
+        PRINTM(MMSG, "WLAN FW is active\n");
+        /* Set it to NULL to skip downloading firmware to card */
+        handle->firmware = NULL;
+        if ((ret = woal_init_fw_dpc(handle)))
+            goto done;
+        if ((ret = woal_add_card_dpc(handle)))
+            goto done;
+        /* Release semaphore if download is not required */
+        MOAL_REL_SEMAPHORE(&AddRemoveCardSem);
+    }
+  done:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief This function will fill in the mlan_buffer
+ *  
+ *  @param pmbuf   A pointer to mlan_buffer
+ *  @param skb     A pointer to struct sk_buff 
+ *
+ *  @return        N/A
+ */
+static void
+woal_fill_mlan_buffer(moal_private * priv,
+                      mlan_buffer * pmbuf, struct sk_buff *skb)
+{
+    struct timeval tstamp;
+    struct ethhdr *eth;
+    t_u8 tid;
+
+    ENTER();
+
+    eth = (struct ethhdr *) skb->data;
+
+    switch (eth->h_proto) {
+
+    case __constant_htons(ETH_P_IP):
+        tid = (IPTOS_PREC(SKB_TOS(skb)) >> IPTOS_OFFSET);
+        PRINTM(MDAT_D, "packet type ETH_P_IP: %04x, tid=%#x prio=%#x\n",
+               eth->h_proto, tid, skb->priority);
+        break;
+
+    case __constant_htons(ETH_P_ARP):
+        PRINTM(MDATA, "ARP packet %04x\n", eth->h_proto);
+    default:
+        tid = 0;
+        break;
+    }
+
+    skb->priority = tid;
+
+    /* Record the current time the packet was queued; used to determine the
+       amount of time the packet was queued in the driver before it was sent to 
+       the firmware.  The delay is then sent along with the packet to the
+       firmware for aggregate delay calculation for stats and MSDU lifetime
+       expiry. */
+    do_gettimeofday(&tstamp);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
+    skb->tstamp = timeval_to_ktime(tstamp);
+#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,14)
+    skb_set_timestamp(skb, &tstamp);
+#else
+    memcpy(&skb->stamp, &tstamp, sizeof(skb->stamp));
+#endif
+
+    pmbuf->pdesc = skb;
+    pmbuf->pbuf = skb->head + sizeof(mlan_buffer);
+    pmbuf->data_offset = skb->data - (skb->head + sizeof(mlan_buffer));
+    pmbuf->data_len = skb->len;
+    pmbuf->priority = skb->priority;
+    pmbuf->in_ts_sec = (t_u32) tstamp.tv_sec;
+    pmbuf->in_ts_usec = (t_u32) tstamp.tv_usec;
+
+    LEAVE();
+    return;
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,33)
+static struct device_type wlan_type = {.name = "wlan", };
+#endif
+
+#ifdef STA_SUPPORT
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
+/** Network device handlers */
+const struct net_device_ops woal_netdev_ops = {
+    .ndo_open = woal_open,
+    .ndo_start_xmit = woal_hard_start_xmit,
+    .ndo_stop = woal_close,
+    .ndo_do_ioctl = woal_do_ioctl,
+    .ndo_set_mac_address = woal_set_mac_address,
+    .ndo_tx_timeout = woal_tx_timeout,
+    .ndo_get_stats = woal_get_stats,
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)	//lxy
+    .ndo_set_rx_mode	= woal_set_multicast_list,
+#else
+    .ndo_set_multicast_list = woal_set_multicast_list,
+#endif
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34)
+    .ndo_select_queue = woal_select_queue,
+#endif
+};
+#endif
+
+/**
+ *  @brief This function initializes the private structure 
+ *  		and dev structure for station mode
+ *  
+ *  @param dev     A pointer to net_device structure
+ *  @param priv    A pointer to moal_private structure
+ *
+ *  @return 	   MLAN_STATUS_SUCCESS 
+ */
+static mlan_status
+woal_init_sta_dev(struct net_device *dev, moal_private * priv)
+{
+    ENTER();
+
+    /* Setup the OS Interface to our functions */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
+    dev->open = woal_open;
+    dev->hard_start_xmit = woal_hard_start_xmit;
+    dev->stop = woal_close;
+    dev->do_ioctl = woal_do_ioctl;
+    dev->set_mac_address = woal_set_mac_address;
+    dev->tx_timeout = woal_tx_timeout;
+    dev->get_stats = woal_get_stats;
+    dev->set_multicast_list = woal_set_multicast_list;
+#else
+    dev->netdev_ops = &woal_netdev_ops;
+#endif
+    dev->watchdog_timeo = MRVDRV_DEFAULT_WATCHDOG_TIMEOUT;
+    dev->hard_header_len += MLAN_MIN_DATA_HEADER_LEN + sizeof(mlan_buffer);
+#ifdef  WIRELESS_EXT
+#if WIRELESS_EXT < 21
+    dev->get_wireless_stats = woal_get_wireless_stats;
+#endif
+    dev->wireless_handlers = (struct iw_handler_def *) &woal_handler_def;
+#endif
+    dev->flags |= IFF_BROADCAST | IFF_MULTICAST;
+
+    /* Initialize private structure */
+    init_waitqueue_head(&priv->ioctl_wait_q);
+    init_waitqueue_head(&priv->cmd_wait_q);
+    init_waitqueue_head(&priv->proc_wait_q);
+    init_waitqueue_head(&priv->w_stats_wait_q);
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+#endif /* STA_SUPPORT */
+
+#ifdef UAP_SUPPORT
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
+/** Network device handlers */
+const struct net_device_ops woal_uap_netdev_ops = {
+    .ndo_open = woal_open,
+    .ndo_start_xmit = woal_hard_start_xmit,
+    .ndo_stop = woal_close,
+    .ndo_do_ioctl = woal_uap_do_ioctl,
+    .ndo_set_mac_address = woal_set_mac_address,
+    .ndo_tx_timeout = woal_tx_timeout,
+    .ndo_get_stats = woal_get_stats,
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)	//lxy
+    .ndo_set_rx_mode	= woal_uap_set_multicast_list,
+#else
+    .ndo_set_multicast_list = woal_uap_set_multicast_list,
+#endif
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34)
+    .ndo_select_queue = woal_select_queue,
+#endif
+};
+#endif
+
+/**
+ *  @brief This function initializes the private structure 
+ *  		and dev structure for uap mode
+ *  
+ *  @param dev     A pointer to net_device structure
+ *  @param priv    A pointer to moal_private structure
+ *
+ *  @return 	   MLAN_STATUS_SUCCESS
+ */
+static mlan_status
+woal_init_uap_dev(struct net_device *dev, moal_private * priv)
+{
+    mlan_status status = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    /* Setup the OS Interface to our functions */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
+    dev->open = woal_open;
+    dev->hard_start_xmit = woal_hard_start_xmit;
+    dev->stop = woal_close;
+    dev->set_mac_address = woal_set_mac_address;
+    dev->tx_timeout = woal_tx_timeout;
+    dev->get_stats = woal_get_stats;
+    dev->do_ioctl = woal_uap_do_ioctl;
+    dev->set_multicast_list = woal_uap_set_multicast_list;
+#else
+    dev->netdev_ops = &woal_uap_netdev_ops;
+#endif
+    dev->watchdog_timeo = MRVDRV_DEFAULT_UAP_WATCHDOG_TIMEOUT;
+    dev->hard_header_len += MLAN_MIN_DATA_HEADER_LEN + sizeof(mlan_buffer);
+#ifdef  WIRELESS_EXT
+#if WIRELESS_EXT < 21
+    dev->get_wireless_stats = woal_get_uap_wireless_stats;
+#endif
+    dev->wireless_handlers = (struct iw_handler_def *) &woal_uap_handler_def;
+#endif /* WIRELESS_EXT */
+    dev->flags |= IFF_BROADCAST | IFF_MULTICAST;
+
+    /* Initialize private structure */
+    init_waitqueue_head(&priv->ioctl_wait_q);
+    init_waitqueue_head(&priv->cmd_wait_q);
+    init_waitqueue_head(&priv->proc_wait_q);
+    init_waitqueue_head(&priv->w_stats_wait_q);
+
+    LEAVE();
+    return status;
+}
+#endif /* UAP_SUPPORT */
+
+/**
+ * @brief This function adds a new interface. It will
+ * 		allocate, initialize and register the device.
+ *  
+ *  @param handle    A pointer to moal_handle structure
+ *  @param bss_index BSS index number
+ *  @param bss_type  BSS type
+ *
+ *  @return          A pointer to the new priv structure
+ */
+moal_private *
+woal_add_interface(moal_handle * handle, t_u8 bss_index, t_u8 bss_type)
+{
+    struct net_device *dev = NULL;
+    moal_private *priv = NULL;
+
+    ENTER();
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34)
+#define MAX_WMM_QUEUE   4
+    /* Allocate an Ethernet device */
+    if (!(dev = alloc_etherdev_mq(sizeof(moal_private), MAX_WMM_QUEUE))) {
+#else
+    if (!(dev = alloc_etherdev(sizeof(moal_private)))) {
+#endif
+        PRINTM(MFATAL, "Init virtual ethernet device failed\n");
+        goto error;
+    }
+#ifdef STA_SUPPORT
+    /* Allocate device name */
+    if ((bss_type == MLAN_BSS_TYPE_STA) && (dev_alloc_name(dev, "mlan%d") < 0)) {
+        PRINTM(MERROR, "Could not allocate mlan device name\n");
+        goto error;
+    }
+#endif
+#ifdef UAP_SUPPORT
+    if ((bss_type == MLAN_BSS_TYPE_UAP) && (dev_alloc_name(dev, "uap%d") < 0)) {
+        PRINTM(MERROR, "Could not allocate uap device name\n");
+        goto error;
+    }
+#endif
+#if defined(WFD_SUPPORT)
+    if ((bss_type == MLAN_BSS_TYPE_WFD) && (dev_alloc_name(dev, "wfd%d") < 0)) {
+        PRINTM(MERROR, "Could not allocate wfd device name\n");
+        goto error;
+    }
+#endif
+    priv = (moal_private *) netdev_priv(dev);
+    /* Save the priv to handle */
+    handle->priv[bss_index] = priv;
+
+    /* Use the same handle structure */
+    priv->phandle = handle;
+    priv->netdev = dev;
+    priv->bss_index = bss_index;
+    priv->bss_type = bss_type;
+    if (bss_type == MLAN_BSS_TYPE_STA)
+        priv->bss_role = MLAN_BSS_ROLE_STA;
+    else if (bss_type == MLAN_BSS_TYPE_UAP)
+        priv->bss_role = MLAN_BSS_ROLE_UAP;
+#if defined(WFD_SUPPORT)
+    else if (bss_type == MLAN_BSS_TYPE_WFD)
+        priv->bss_role = MLAN_BSS_ROLE_STA;
+#endif
+
+#ifdef STA_SUPPORT
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
+    SET_MODULE_OWNER(dev);
+#endif
+#ifdef STA_SUPPORT
+    if (bss_type == MLAN_BSS_TYPE_STA
+#if defined(WFD_SUPPORT)
+        || bss_type == MLAN_BSS_TYPE_WFD
+#endif
+        )
+        woal_init_sta_dev(dev, priv);
+#endif
+#ifdef UAP_SUPPORT
+    if (bss_type == MLAN_BSS_TYPE_UAP) {
+        if (MLAN_STATUS_SUCCESS != woal_init_uap_dev(dev, priv))
+            goto error;
+    }
+#endif
+
+    /* Initialize priv structure */
+    woal_init_priv(priv, MOAL_CMD_WAIT);
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
+    SET_NETDEV_DEV(dev, handle->hotplug_device);
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,33)
+    SET_NETDEV_DEVTYPE(dev, &wlan_type);
+#endif
+
+    /* Register network device */
+    if (register_netdev(dev)) {
+        PRINTM(MERROR, "Cannot register virtual network device\n");
+        goto error;
+    }
+    netif_carrier_off(dev);
+    woal_stop_queue(dev);
+
+    PRINTM(MINFO, "%s: Marvell 802.11 Adapter\n", dev->name);
+
+    /* Set MAC address from the insmod command line */
+    if (handle->set_mac_addr) {
+        memset(priv->current_addr, 0, ETH_ALEN);
+        memcpy(priv->current_addr, handle->mac_addr, ETH_ALEN);
+        if (MLAN_STATUS_SUCCESS != woal_request_set_mac_address(priv)) {
+            PRINTM(MERROR, "Set MAC address failed\n");
+            goto error;
+        }
+        memcpy(dev->dev_addr, priv->current_addr, ETH_ALEN);
+    }
+#ifdef CONFIG_PROC_FS
+    woal_create_proc_entry(priv);
+#ifdef PROC_DEBUG
+    woal_debug_entry(priv);
+#endif /* PROC_DEBUG */
+#endif /* CONFIG_PROC_FS */
+
+    LEAVE();
+    return priv;
+  error:
+    if (dev && dev->reg_state == NETREG_REGISTERED)
+        unregister_netdev(dev);
+    if (dev)
+        free_netdev(dev);
+    LEAVE();
+    return NULL;
+}
+
+/** 
+ *  @brief This function removes an interface.
+ *  
+ *  @param handle    A pointer to the moal_handle structure
+ *  @param bss_index  BSS index number
+ *
+ *  @return        N/A
+ */
+void
+woal_remove_interface(moal_handle * handle, t_u8 bss_index)
+{
+    struct net_device *dev = NULL;
+    moal_private *priv = handle->priv[bss_index];
+    union iwreq_data wrqu;
+
+    ENTER();
+    if (!priv)
+        goto error;
+    dev = priv->netdev;
+
+    if (priv->media_connected == MTRUE) {
+        priv->media_connected = MFALSE;
+        if (GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_STA) {
+            memset(wrqu.ap_addr.sa_data, 0x00, ETH_ALEN);
+            wrqu.ap_addr.sa_family = ARPHRD_ETHER;
+            wireless_send_event(priv->netdev, SIOCGIWAP, &wrqu, NULL);
+        }
+    }
+#ifdef CONFIG_PROC_FS
+#ifdef PROC_DEBUG
+    /* Remove proc debug */
+    woal_debug_remove(priv);
+#endif /* PROC_DEBUG */
+    woal_proc_remove(priv);
+#endif /* CONFIG_PROC_FS */
+    /* Last reference is our one */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,37)
+    PRINTM(MINFO, "refcnt = %d\n", atomic_read(&dev->refcnt));
+#else
+    PRINTM(MINFO, "refcnt = %d\n", netdev_refcnt_read(dev));
+#endif
+
+    PRINTM(MINFO, "netdev_finish_unregister: %s\n", dev->name);
+
+    if (dev->reg_state == NETREG_REGISTERED)
+        unregister_netdev(dev);
+
+    /* Clear the priv in handle */
+    priv->phandle->priv[priv->bss_index] = NULL;
+    priv->phandle = NULL;
+    priv->netdev = NULL;
+    free_netdev(dev);
+  error:
+    LEAVE();
+    return;
+}
+
+/** 
+ *  @brief Send FW shutdown command to MLAN
+ *   
+ *  @param priv          A pointer to moal_private structure
+ *  @param wait_option   Wait option
+ *
+ *  @return              MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail
+ */
+static mlan_status
+woal_shutdown_fw(moal_private * priv, t_u8 wait_option)
+{
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_misc_cfg *misc = NULL;
+    mlan_status status;
+
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req =
+        (mlan_ioctl_req *) woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_misc_cfg));
+    if (req == NULL) {
+        status = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    misc = (mlan_ds_misc_cfg *) req->pbuf;
+    misc->sub_command = MLAN_OID_MISC_INIT_SHUTDOWN;
+    misc->param.func_init_shutdown = MLAN_FUNC_SHUTDOWN;
+    req->req_id = MLAN_IOCTL_MISC_CFG;
+    req->action = MLAN_ACT_SET;
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, wait_option);
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Return hex value of a give character
+ *
+ *  @param chr	    Character to be converted
+ *
+ *  @return 	    The converted character if chr is a valid hex, else 0
+ */
+static int
+woal_hexval(char chr)
+{
+    ENTER();
+
+    if (chr >= '0' && chr <= '9')
+        return chr - '0';
+    if (chr >= 'A' && chr <= 'F')
+        return chr - 'A' + 10;
+    if (chr >= 'a' && chr <= 'f')
+        return chr - 'a' + 10;
+
+    LEAVE();
+    return 0;
+}
+
+/**
+ *  @brief This function cancel all works in the queue
+ *  and destroy the main workqueue.
+ *  
+ *  @param handle    A pointer to moal_handle
+ *
+ *  @return        N/A
+ */
+static void
+woal_terminate_workqueue(moal_handle * handle)
+{
+    ENTER();
+
+    /* Terminate main workqueue */
+    if (handle->workqueue) {
+        flush_workqueue(handle->workqueue);
+        destroy_workqueue(handle->workqueue);
+        handle->workqueue = NULL;
+    }
+
+    LEAVE();
+}
+
+/********************************************************
+		Global Functions
+********************************************************/
+
+/** 
+ *  @brief This function opens the network device
+ *  
+ *  @param dev     A pointer to net_device structure
+ *
+ *  @return        0 --success, otherwise fail
+ */
+int
+woal_open(struct net_device *dev)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
+    struct usb_interface *intf =
+        ((struct usb_card_rec *) priv->phandle->card)->intf;
+#endif /* >= 2.6.24 */
+    t_u8 carrier_on = MFALSE;
+
+    ENTER();
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
+    /* Error enabling PM on interface */
+    if (usb_autopm_get_interface(intf)) {
+        LEAVE();
+        return -EIO;
+    }
+#else
+    atomic_set(&intf->pm_usage_cnt, 1);
+#endif /* < 2.6.34 */
+#endif /* >= 2.6.24 */
+
+    /* On some systems the device open handler will be called before HW ready.
+       Use the following flag check and wait function to work around the issue. */
+    {
+        int i = 0;
+
+        while ((priv->phandle->hardware_status != HardwareStatusReady) &&
+               (i < MAX_WAIT_DEVICE_READY_COUNT)) {
+            i++;
+            woal_sched_timeout(100);
+        }
+        if (i >= MAX_WAIT_DEVICE_READY_COUNT) {
+            PRINTM(MFATAL, "HW not ready, wlan_open() return failure\n");
+            LEAVE();
+            return -EFAULT;
+        }
+    }
+    if (!MODULE_GET) {
+        LEAVE();
+        return -EFAULT;
+    }
+#ifdef UAP_SUPPORT
+    if ((GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_UAP) && (priv->media_connected))
+        carrier_on = MTRUE;
+#endif
+#ifdef STA_SUPPORT
+    if ((GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_STA) &&
+        (priv->media_connected || priv->is_adhoc_link_sensed))
+        carrier_on = MTRUE;
+#endif
+    if (carrier_on == MTRUE) {
+        if (!netif_carrier_ok(priv->netdev))
+            netif_carrier_on(priv->netdev);
+        woal_wake_queue(priv->netdev);
+    } else {
+        if (netif_carrier_ok(priv->netdev))
+            netif_carrier_off(priv->netdev);
+    }
+
+    LEAVE();
+    return 0;
+}
+
+/** 
+ *  @brief This function closes the network device
+ *  
+ *  @param dev     A pointer to net_device structure
+ *
+ *  @return        0
+ */
+int
+woal_close(struct net_device *dev)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
+    struct usb_interface *intf =
+        ((struct usb_card_rec *) priv->phandle->card)->intf;
+#endif /* >= 2.6.24 */
+
+    ENTER();
+
+    woal_stop_queue(priv->netdev);
+
+    MODULE_PUT;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
+    /* Setting 'pm_usage_count' to 1; Subsequently calling *_put_interface
+       will set it to 0. */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32)
+    intf->pm_usage_cnt = 1;
+#else
+    atomic_set(&intf->pm_usage_cnt, 1);
+#endif /* < 2.6.32 */
+    usb_autopm_put_interface(intf);
+#else
+    atomic_set(&intf->pm_usage_cnt, 0);
+#endif /* < 2.6.34 */
+#endif /* >= 2.6.24 */
+
+    LEAVE();
+    return 0;
+}
+
+/** 
+ *  @brief This function sets the MAC address to firmware.
+ *  
+ *  @param dev     A pointer to mlan_private structure
+ *  @param addr    MAC address to set
+ *
+ *  @return        0 --success, otherwise fail
+ */
+int
+woal_set_mac_address(struct net_device *dev, void *addr)
+{
+    int ret = 0;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    struct sockaddr *phw_addr = (struct sockaddr *) addr;
+    t_u8 prev_addr[ETH_ALEN];
+
+    ENTER();
+
+    memcpy(prev_addr, priv->current_addr, ETH_ALEN);
+    memset(priv->current_addr, 0, ETH_ALEN);
+    /* dev->dev_addr is 6 bytes */
+    HEXDUMP("dev->dev_addr:", dev->dev_addr, ETH_ALEN);
+
+    HEXDUMP("addr:", (t_u8 *) phw_addr->sa_data, ETH_ALEN);
+    memcpy(priv->current_addr, phw_addr->sa_data, ETH_ALEN);
+    if (MLAN_STATUS_SUCCESS != woal_request_set_mac_address(priv)) {
+        PRINTM(MERROR, "Set MAC address failed\n");
+        /* For failure restore the MAC address */
+        memcpy(priv->current_addr, prev_addr, ETH_ALEN);
+        ret = -EFAULT;
+        goto done;
+    }
+    HEXDUMP("priv->MacAddr:", priv->current_addr, ETH_ALEN);
+    memcpy(dev->dev_addr, priv->current_addr, ETH_ALEN);
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Display debug information
+ *
+ *  @param priv	   A pointer to a moal_private structure
+ *  @param info    A pointer to mlan_debug_info structure
+ *
+ *  @return 	   N/A
+ */
+void
+woal_display_debug_info(moal_private * priv, mlan_debug_info * info)
+{
+    int i;
+
+    ENTER();
+
+    PRINTM(MERROR, "num_tx_timeout = %ld\n", priv->num_tx_timeout);
+    PRINTM(MERROR, "num_cmd_timeout = %ld\n", info->num_cmd_timeout);
+    PRINTM(MERROR, "Timeout cmd id = 0x%x, act = 0x%x \n",
+           info->timeout_cmd_id, info->timeout_cmd_act);
+
+    PRINTM(MERROR, "last_cmd_index = %d\n", info->last_cmd_index);
+    PRINTM(MERROR, "last_cmd_id = ");
+    for (i = 0; i < DBG_CMD_NUM; i++) {
+        PRINTM(MERROR, "0x%x ", info->last_cmd_id[i]);
+    }
+    PRINTM(MERROR, "\n");
+    PRINTM(MERROR, "last_cmd_act = ");
+    for (i = 0; i < DBG_CMD_NUM; i++) {
+        PRINTM(MERROR, "0x%x ", info->last_cmd_act[i]);
+    }
+    PRINTM(MERROR, "\n");
+    PRINTM(MERROR, "last_cmd_resp_index = %d\n", info->last_cmd_resp_index);
+    PRINTM(MERROR, "last_cmd_resp_id = ");
+    for (i = 0; i < DBG_CMD_NUM; i++) {
+        PRINTM(MERROR, "0x%x ", info->last_cmd_resp_id[i]);
+    }
+    PRINTM(MERROR, "\n");
+    PRINTM(MERROR, "last_event_index = %d\n", info->last_event_index);
+    PRINTM(MERROR, "last_event = ");
+    for (i = 0; i < DBG_CMD_NUM; i++) {
+        PRINTM(MERROR, "0x%x ", info->last_event[i]);
+    }
+    PRINTM(MERROR, "\n");
+
+    PRINTM(MERROR, "num_data_h2c_failure = %ld\n",
+           info->num_tx_host_to_card_failure);
+    PRINTM(MERROR, "num_cmd_h2c_failure = %ld\n",
+           info->num_cmd_host_to_card_failure);
+
+    PRINTM(MERROR, "data_sent=%d cmd_sent=%d\n", info->data_sent,
+           info->cmd_sent);
+
+    PRINTM(MERROR, "ps_mode=%d ps_state=%ld\n", info->ps_mode, info->ps_state);
+    PRINTM(MERROR, "wakeup_dev_req=%d wakeup_tries=%ld\n",
+           info->pm_wakeup_card_req, info->pm_wakeup_fw_try);
+    PRINTM(MERROR, "hs_configured=%d hs_activated=%d\n",
+           info->is_hs_configured, info->hs_activated);
+    PRINTM(MERROR, "pps_uapsd_mode=%d sleep_pd=%d\n",
+           info->pps_uapsd_mode, info->sleep_pd);
+    PRINTM(MERROR, "tx_lock_flag = %d\n", info->tx_lock_flag);
+    PRINTM(MERROR, "port_open = %d\n", info->port_open);
+    PRINTM(MERROR, "scan_processing = %ld\n", info->scan_processing);
+
+    PRINTM(MERROR, "ioctl_pending = %d\n",
+           atomic_read(&priv->phandle->ioctl_pending));
+    PRINTM(MERROR, "tx_pending = %d\n",
+           atomic_read(&priv->phandle->tx_pending));
+    PRINTM(MERROR, "rx_pending = %d\n",
+           atomic_read(&priv->phandle->rx_pending));
+
+    LEAVE();
+}
+
+/** 
+ *  @brief This function handles the timeout of packet
+ *  		transmission
+ *  
+ *  @param dev     A pointer to net_device structure
+ *
+ *  @return        N/A
+ */
+void
+woal_tx_timeout(struct net_device *dev)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+
+    ENTER();
+
+    PRINTM(MERROR, "%lu : Tx timeout, bss_index=%d\n", jiffies,
+           priv->bss_index);
+    woal_set_trans_start(dev);
+    priv->num_tx_timeout++;
+
+    if (!woal_get_debug_info(priv, MOAL_CMD_WAIT, &info)) {
+        woal_display_debug_info(priv, &info);
+    }
+
+    LEAVE();
+}
+
+/** 
+ *  @brief This function returns the network statistics
+ *  
+ *  @param dev     A pointer to net_device structure
+ *
+ *  @return        A pointer to net_device_stats structure
+ */
+struct net_device_stats *
+woal_get_stats(struct net_device *dev)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    return &priv->stats;
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34)
+/** 
+ *  @brief This function handles wmm queue select
+ *  
+ *  @param dev     A pointer to net_device structure
+ *  @param skb     A pointer to sk_buff structure
+ *
+ *  @return        tx_queue index (0-3)
+ */
+u16
+woal_select_queue(struct net_device * dev, struct sk_buff * skb)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    struct ethhdr *eth = NULL;
+    struct iphdr *iph;
+    t_u8 tid = 0;
+    t_u8 index = 0;
+
+    ENTER();
+
+    eth = (struct ethhdr *) skb->data;
+    switch (eth->h_proto) {
+    case __constant_htons(ETH_P_IP):
+        iph = ip_hdr(skb);
+        tid = IPTOS_PREC(iph->tos);
+        break;
+    case __constant_htons(ETH_P_ARP):
+    default:
+        break;
+    }
+/** Offset for TOS field in the IP header */
+#define IPTOS_OFFSET 5
+    tid = (tid >> IPTOS_OFFSET);
+    index =
+        mlan_select_wmm_queue(priv->phandle->pmlan_adapter, priv->bss_index,
+                              tid);
+    PRINTM(MDATA, "select queue: tid=%d, index=%d\n", tid, index);
+    LEAVE();
+    return index;
+}
+#endif
+
+/** 
+ *  @brief This function handles packet transmission
+ *  
+ *  @param skb     A pointer to sk_buff structure
+ *  @param dev     A pointer to net_device structure
+ *
+ *  @return        0 --success
+ */
+int
+woal_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_buffer *pmbuf = NULL;
+    mlan_status status;
+    struct sk_buff *new_skb = NULL;
+
+    ENTER();
+
+    PRINTM(MDATA, "%lu BSS(%d): Data <= kernel\n", jiffies, priv->bss_index);
+
+    if (priv->phandle->surprise_removed == MTRUE) {
+        dev_kfree_skb_any(skb);
+        priv->stats.tx_dropped++;
+        goto done;
+    }
+    if (!skb->len || (skb->len > ETH_FRAME_LEN)) {
+        PRINTM(MERROR, "Tx Error: Bad skb length %d : %d\n",
+               skb->len, ETH_FRAME_LEN);
+        dev_kfree_skb_any(skb);
+        priv->stats.tx_dropped++;
+        goto done;
+    }
+    if (skb->cloned ||
+        (skb_headroom(skb) <
+         (MLAN_MIN_DATA_HEADER_LEN + sizeof(mlan_buffer)))) {
+        PRINTM(MWARN, "Tx: Insufficient skb headroom %d\n", skb_headroom(skb));
+        /* Insufficient skb headroom - allocate a new skb */
+        new_skb =
+            skb_realloc_headroom(skb,
+                                 MLAN_MIN_DATA_HEADER_LEN +
+                                 sizeof(mlan_buffer));
+        if (unlikely(!new_skb)) {
+            PRINTM(MERROR, "Tx: Cannot allocate skb\n");
+            dev_kfree_skb_any(skb);
+            priv->stats.tx_dropped++;
+            goto done;
+        }
+        if (new_skb != skb)
+            dev_kfree_skb_any(skb);
+        skb = new_skb;
+        PRINTM(MINFO, "new skb headroom %d\n", skb_headroom(skb));
+    }
+    pmbuf = (mlan_buffer *) skb->head;
+    pmbuf->bss_index = priv->bss_index;
+    woal_fill_mlan_buffer(priv, pmbuf, skb);
+    status = mlan_send_packet(priv->phandle->pmlan_adapter, pmbuf);
+    switch (status) {
+    case MLAN_STATUS_PENDING:
+        atomic_inc(&priv->phandle->tx_pending);
+        if (atomic_read(&priv->phandle->tx_pending) >= MAX_TX_PENDING)
+            woal_stop_queue(priv->netdev);
+        queue_work(priv->phandle->workqueue, &priv->phandle->main_work);
+        break;
+    case MLAN_STATUS_SUCCESS:
+        priv->stats.tx_packets++;
+        priv->stats.tx_bytes += skb->len;
+        dev_kfree_skb_any(skb);
+        break;
+    case MLAN_STATUS_FAILURE:
+    default:
+        priv->stats.tx_dropped++;
+        dev_kfree_skb_any(skb);
+        break;
+    }
+  done:
+    LEAVE();
+    return 0;
+}
+
+/** 
+ *  @brief Convert ascii string to Hex integer
+ *     
+ *  @param d                    A pointer to integer buf
+ *  @param s			A pointer to ascii string 
+ *  @param dlen			The length of ascii string
+ *
+ *  @return 	   	        Number of integer  
+ */
+int
+woal_ascii2hex(t_u8 * d, char *s, t_u32 dlen)
+{
+    unsigned int i;
+    t_u8 n;
+
+    ENTER();
+
+    memset(d, 0x00, dlen);
+
+    for (i = 0; i < dlen * 2; i++) {
+        if ((s[i] >= 48) && (s[i] <= 57))
+            n = s[i] - 48;
+        else if ((s[i] >= 65) && (s[i] <= 70))
+            n = s[i] - 55;
+        else if ((s[i] >= 97) && (s[i] <= 102))
+            n = s[i] - 87;
+        else
+            break;
+        if (!(i % 2))
+            n = n * 16;
+        d[i / 2] += n;
+    }
+
+    LEAVE();
+    return i;
+}
+
+/**
+ *  @brief Return integer value of a given ascii string
+ *
+ *  @param data    Converted data to be returned
+ *  @param a       String to be converted
+ *
+ *  @return        MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+woal_atoi(int *data, char *a)
+{
+    int i, val = 0, len;
+
+    ENTER();
+
+    len = strlen(a);
+    if (!strncmp(a, "0x", 2)) {
+        a = a + 2;
+        len -= 2;
+        *data = woal_atox(a);
+        return MLAN_STATUS_SUCCESS;
+    }
+    for (i = 0; i < len; i++) {
+        if (isdigit(a[i])) {
+            val = val * 10 + (a[i] - '0');
+        } else {
+            PRINTM(MERROR, "Invalid char %c in string %s\n", a[i], a);
+            return MLAN_STATUS_FAILURE;
+        }
+    }
+    *data = val;
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief Return hex value of a given ascii string
+ *
+ *  @param a	    String to be converted to ascii
+ *
+ *  @return 	    The converted character if a is a valid hex, else 0
+ */
+int
+woal_atox(char *a)
+{
+    int i = 0;
+
+    ENTER();
+
+    while (isxdigit(*a))
+        i = i * 16 + woal_hexval(*a++);
+
+    LEAVE();
+    return i;
+}
+
+/** 
+ *  @brief Extension of strsep lib command. This function will also take care
+ *	   escape character
+ *
+ *  @param s         A pointer to array of chars to process
+ *  @param delim     The delimiter character to end the string
+ *  @param esc       The escape character to ignore for delimiter
+ *
+ *  @return          Pointer to the separated string if delim found, else NULL
+ */
+char *
+woal_strsep(char **s, char delim, char esc)
+{
+    char *se = *s, *sb;
+
+    ENTER();
+
+    if (!(*s) || (*se == '\0')) {
+        LEAVE();
+        return NULL;
+    }
+
+    for (sb = *s; *sb != '\0'; ++sb) {
+        if (*sb == esc && *(sb + 1) == esc) {
+            /* 
+             * We get a esc + esc seq then keep the one esc
+             * and chop off the other esc character
+             */
+            memmove(sb, sb + 1, strlen(sb));
+            continue;
+        }
+        if (*sb == esc && *(sb + 1) == delim) {
+            /* 
+             * We get a delim + esc seq then keep the delim
+             * and chop off the esc character
+             */
+            memmove(sb, sb + 1, strlen(sb));
+            continue;
+        }
+        if (*sb == delim)
+            break;
+    }
+
+    if (*sb == '\0')
+        sb = NULL;
+    else
+        *sb++ = '\0';
+
+    *s = sb;
+
+    LEAVE();
+    return se;
+}
+
+/**
+ *  @brief Convert mac address from string to t_u8 buffer.
+ *
+ *  @param mac_addr The buffer to store the mac address in.	    
+ *  @param buf      The source of mac address which is a string.	    
+ *
+ *  @return 	    N/A
+ */
+void
+woal_mac2u8(t_u8 * mac_addr, char *buf)
+{
+    char *begin = buf, *end;
+    int i;
+
+    ENTER();
+
+    for (i = 0; i < ETH_ALEN; ++i) {
+        end = woal_strsep(&begin, ':', '/');
+        if (end)
+            mac_addr[i] = woal_atox(end);
+    }
+
+    LEAVE();
+}
+
+#ifdef STA_SUPPORT
+/** 
+ *  @brief This function sets multicast addresses to firmware
+ *  
+ *  @param dev     A pointer to net_device structure
+ *
+ *  @return        N/A
+ */
+void
+woal_set_multicast_list(struct net_device *dev)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    ENTER();
+    woal_request_set_multicast_list(priv, dev);
+    LEAVE();
+}
+#endif
+
+/**
+ *  @brief This function initializes the private structure
+ *  		and set default value to the member of moal_private.
+ *  
+ *  @param priv             A pointer to moal_private structure
+ *  @param wait_option      Wait option  
+ *
+ *  @return 	   N/A
+ */
+void
+woal_init_priv(moal_private * priv, t_u8 wait_option)
+{
+    ENTER();
+#ifdef STA_SUPPORT
+    if (GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_STA) {
+        priv->current_key_index = 0;
+        priv->rate_index = AUTO_RATE;
+        priv->is_adhoc_link_sensed = MFALSE;
+        memset(&priv->nick_name, 0, sizeof(priv->nick_name));
+        priv->num_tx_timeout = 0;
+        priv->rx_filter = 0;
+
+#ifdef REASSOCIATION
+        priv->reassoc_on = MFALSE;
+#endif
+    }
+#endif /* STA_SUPPORT */
+#ifdef UAP_SUPPORT
+    if (GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_UAP) {
+        priv->bss_started = MFALSE;
+    }
+#endif
+    priv->media_connected = MFALSE;
+    priv->is_h2d_active = MFALSE;
+    priv->is_d2h_active = MFALSE;
+    woal_request_get_fw_info(priv, wait_option, NULL);
+
+    LEAVE();
+}
+
+/**
+ *  @brief Reset all interfaces if all_intf flag is TRUE, 
+ *  	   otherwise specified interface only
+ *
+ *  @param priv          A pointer to moal_private structure
+ *  @param wait_option   Wait option
+ *  @param all_intf      TRUE  : all interfaces
+ *                       FALSE : current interface only
+ *
+ *  @return             MLAN_STATUS_SUCCESS --success, otherwise fail  
+ */
+int
+woal_reset_intf(moal_private * priv, t_u8 wait_option, int all_intf)
+{
+    int ret = MLAN_STATUS_SUCCESS;
+    int intf_num;
+    moal_handle *handle = priv->phandle;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_misc_cfg *misc = NULL;
+    mlan_bss_info bss_info;
+
+    ENTER();
+
+    /* Stop queue and detach device */
+    if (!all_intf) {
+        woal_stop_queue(priv->netdev);
+        netif_device_detach(priv->netdev);
+    } else {
+        for (intf_num = 0; intf_num < handle->priv_num; intf_num++) {
+            woal_stop_queue(handle->priv[intf_num]->netdev);
+            netif_device_detach(handle->priv[intf_num]->netdev);
+        }
+    }
+
+    /* Get BSS info */
+    memset(&bss_info, 0, sizeof(bss_info));
+    woal_get_bss_info(priv, wait_option, &bss_info);
+
+#ifdef STA_SUPPORT
+    /* If scan is in process, cancel the scan command */
+    if (handle->scan_pending_on_block == MTRUE) {
+        mlan_ioctl_req *req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_scan));
+        if (req == NULL) {
+            ret = -EFAULT;
+            goto err_cancel_scan;
+        }
+        req->req_id = MLAN_IOCTL_SCAN;
+        req->action = MLAN_ACT_SET;
+        ((mlan_ds_scan *) req->pbuf)->sub_command = MLAN_OID_SCAN_CANCEL;
+        if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, wait_option)) {
+            ret = -EFAULT;
+            goto err_cancel_scan;
+        }
+      err_cancel_scan:
+        handle->scan_pending_on_block = MFALSE;
+        MOAL_REL_SEMAPHORE(&handle->async_sem);
+        if (req)
+            kfree(req);
+    }
+#endif
+
+    /* Cancel host sleep */
+    if (bss_info.is_hs_configured) {
+        if (MLAN_STATUS_SUCCESS != woal_cancel_hs(priv, wait_option)) {
+            ret = -EFAULT;
+            goto done;
+        }
+    }
+
+    /* Disconnect from network */
+    if (!all_intf) {
+        /* Disconnect specified interface only */
+        if ((priv->media_connected == MTRUE)
+#ifdef UAP_SUPPORT
+            || (GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_UAP)
+#endif
+            ) {
+            woal_disconnect(priv, wait_option, NULL);
+            priv->media_connected = MFALSE;
+        }
+    } else {
+        /* Disconnect all interfaces */
+        for (intf_num = 0; intf_num < handle->priv_num; intf_num++) {
+            if (handle->priv[intf_num]->media_connected == MTRUE
+#ifdef UAP_SUPPORT
+                || (GET_BSS_ROLE(handle->priv[intf_num]) == MLAN_BSS_ROLE_UAP)
+#endif
+                ) {
+                woal_disconnect(handle->priv[intf_num], wait_option, NULL);
+                handle->priv[intf_num]->media_connected = MFALSE;
+            }
+        }
+    }
+
+#ifdef REASSOCIATION
+    /* Reset the reassoc timer and status */
+    if (!all_intf) {
+        handle->reassoc_on &= ~MBIT(priv->bss_index);
+        priv->reassoc_on = MFALSE;
+    } else {
+        handle->reassoc_on = 0;
+        for (intf_num = 0; intf_num < handle->priv_num; intf_num++) {
+            handle->priv[intf_num]->reassoc_on = MFALSE;
+        }
+    }
+    if (!handle->reassoc_on && handle->is_reassoc_timer_set) {
+        woal_cancel_timer(&handle->reassoc_timer);
+        handle->is_reassoc_timer_set = MFALSE;
+    }
+#endif /* REASSOCIATION */
+
+    if (GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_STA) {
+        /* Check if heart beat set */
+        if ((priv->is_h2d_active == MTRUE) || (priv->is_d2h_active == MTRUE)) {
+            /* Cancel heart beat timer */
+            req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_misc_cfg));
+            if (req) {
+                misc = (mlan_ds_misc_cfg *) req->pbuf;
+                misc->sub_command = MLAN_OID_MISC_HEART_BEAT;
+                req->req_id = MLAN_IOCTL_MISC_CFG;
+                req->action = MLAN_ACT_SET;
+                misc->param.heart_beat.h2d_timer = HB_CFG_DISABLE;
+                misc->param.heart_beat.d2h_timer = HB_CFG_DISABLE;
+                misc->param.heart_beat.reconnect_delay = HB_CFG_DISABLE;
+                if (MLAN_STATUS_SUCCESS !=
+                    woal_request_ioctl(priv, req, wait_option)) {
+                    ret = -EFAULT;
+                    kfree(req);
+                    goto done;
+                }
+                kfree(req);
+                priv->is_h2d_active = MFALSE;
+                priv->is_d2h_active = MFALSE;
+            }
+        }
+    }
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief This function return the point to structure moal_private 
+ *  
+ *  @param handle       Pointer to structure moal_handle
+ *  @param bss_index    BSS index number
+ *
+ *  @return             moal_private pointer or NULL
+ */
+moal_private *
+woal_bss_index_to_priv(moal_handle * handle, t_u8 bss_index)
+{
+    int i;
+
+    ENTER();
+    if (!handle) {
+        LEAVE();
+        return NULL;
+    }
+    for (i = 0; i < MLAN_MAX_BSS_NUM; i++) {
+        if (handle->priv[i] && (handle->priv[i]->bss_index == bss_index)) {
+            LEAVE();
+            return handle->priv[i];
+        }
+    }
+
+    LEAVE();
+    return NULL;
+}
+
+/** 
+ *  @brief This function alloc mlan_buffer.
+ *  @param handle  A pointer to moal_handle structure 
+ *  @param size	   buffer size to allocate
+ *
+ *  @return        mlan_buffer pointer or NULL
+ */
+pmlan_buffer
+woal_alloc_mlan_buffer(moal_handle * handle, int size)
+{
+    mlan_buffer *pmbuf = NULL;
+    struct sk_buff *skb;
+
+    ENTER();
+    if (!(pmbuf = kmalloc(sizeof(mlan_buffer), GFP_ATOMIC))) {
+        PRINTM(MERROR, "%s: Fail to alloc mlan buffer\n", __FUNCTION__);
+        return NULL;
+    }
+    memset((t_u8 *) pmbuf, 0, sizeof(mlan_buffer));
+    if (!(skb = dev_alloc_skb(size))) {
+        PRINTM(MERROR, "%s: No free skb\n", __FUNCTION__);
+        kfree(pmbuf);
+        return NULL;
+    }
+    pmbuf->pdesc = (t_void *) skb;
+    pmbuf->pbuf = (t_u8 *) skb->tail;
+    handle->mbufalloc_count++;
+    LEAVE();
+    return pmbuf;
+}
+
+/** 
+ *  @brief This function alloc mlan_ioctl_req.
+ *
+ *  @param size	   buffer size to allocate
+ *
+ *  @return        mlan_ioctl_req pointer or NULL
+ */
+pmlan_ioctl_req
+woal_alloc_mlan_ioctl_req(int size)
+{
+    mlan_ioctl_req *req = NULL;
+
+    ENTER();
+
+    if (!
+        (req =
+         (mlan_ioctl_req *)
+         kmalloc((sizeof(mlan_ioctl_req) + size + sizeof(int) +
+                  sizeof(wait_queue)), GFP_ATOMIC))) {
+        PRINTM(MERROR, "%s: Fail to alloc ioctl buffer\n", __FUNCTION__);
+        LEAVE();
+        return NULL;
+    }
+    memset((t_u8 *) req, 0, (sizeof(mlan_ioctl_req) + size +
+                             sizeof(int) + sizeof(wait_queue)));
+    req->pbuf = (t_u8 *) req + sizeof(mlan_ioctl_req);
+    req->buf_len = (t_u32) size;
+    req->reserved_1 =
+        ALIGN_ADDR((t_u8 *) req + sizeof(mlan_ioctl_req) + size, sizeof(int));
+
+    LEAVE();
+    return req;
+}
+
+/** 
+ *  @brief This function frees mlan_buffer.
+ *  @param handle  A pointer to moal_handle structure 
+ *  @param pmbuf   Pointer to mlan_buffer
+ *
+ *  @return        N/A
+ */
+void
+woal_free_mlan_buffer(moal_handle * handle, pmlan_buffer pmbuf)
+{
+    ENTER();
+    if (!pmbuf)
+        return;
+    if (pmbuf->pdesc)
+        dev_kfree_skb_any((struct sk_buff *) pmbuf->pdesc);
+    kfree(pmbuf);
+    handle->mbufalloc_count--;
+    LEAVE();
+    return;
+}
+
+/** 
+ *  @brief This function handles events generated by firmware
+ *  
+ *  @param priv    A pointer to moal_private structure
+ *  @param payload A pointer to payload buffer
+ *  @param len	   Length of the payload
+ *  @return 	   MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+woal_broadcast_event(moal_private * priv, t_u8 * payload, t_u32 len)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    struct sk_buff *skb = NULL;
+    struct nlmsghdr *nlh = NULL;
+    moal_handle *handle = priv->phandle;
+    struct sock *sk = handle->nl_sk;
+
+    ENTER();
+    /* interface name to be prepended to event */
+    if ((len + IFNAMSIZ) > NL_MAX_PAYLOAD) {
+        PRINTM(MERROR, "event size is too big, len=%d\n", (int) len);
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+    if (sk) {
+        /* Allocate skb */
+        if (!(skb = alloc_skb(NLMSG_SPACE(NL_MAX_PAYLOAD), GFP_ATOMIC))) {
+            PRINTM(MERROR, "Could not allocate skb for netlink\n");
+            ret = MLAN_STATUS_FAILURE;
+            goto done;
+        }
+        nlh = (struct nlmsghdr *) skb->data;
+        nlh->nlmsg_len = NLMSG_SPACE(len + IFNAMSIZ);
+
+        /* From kernel */
+        nlh->nlmsg_pid = 0;
+        nlh->nlmsg_flags = 0;
+
+        /* Data */
+        skb_put(skb, nlh->nlmsg_len);
+        memcpy(NLMSG_DATA(nlh), priv->netdev->name, IFNAMSIZ);
+        memcpy(((t_u8 *) (NLMSG_DATA(nlh))) + IFNAMSIZ, payload, len);
+
+        /* From Kernel */
+        NETLINK_CB(skb).pid = 0;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
+        /* Multicast message */
+        NETLINK_CB(skb).dst_pid = 0;
+#endif
+
+        /* Multicast group number */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,14)
+        NETLINK_CB(skb).dst_groups = NL_MULTICAST_GROUP;
+#else
+        NETLINK_CB(skb).dst_group = NL_MULTICAST_GROUP;
+#endif
+
+        /* Send message */
+        netlink_broadcast(sk, skb, 0, NL_MULTICAST_GROUP, GFP_ATOMIC);
+
+        ret = MLAN_STATUS_SUCCESS;
+    } else {
+        PRINTM(MERROR, "Could not send event through NETLINK. Link down.\n");
+        ret = MLAN_STATUS_FAILURE;
+    }
+  done:
+    LEAVE();
+    return ret;
+}
+
+#ifdef REASSOCIATION
+/**
+ *  @brief This function handles re-association. it is triggered
+ *  by re-assoc timer.
+ *
+ *  @param data    A pointer to wlan_thread structure
+ *  @return        MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+int
+woal_reassociation_thread(void *data)
+{
+    moal_thread *pmoal_thread = data;
+    moal_private *priv = NULL;
+    moal_handle *handle = (moal_handle *) pmoal_thread->handle;
+    wait_queue_t wait;
+    int i;
+    BOOLEAN reassoc_timer_req;
+    mlan_802_11_ssid req_ssid;
+    mlan_ssid_bssid ssid_bssid;
+    mlan_status status;
+    mlan_bss_info bss_info;
+    t_u32 timer_val = MOAL_TIMER_10S;
+
+    ENTER();
+
+    woal_activate_thread(pmoal_thread);
+    init_waitqueue_entry(&wait, current);
+
+    current->flags |= PF_NOFREEZE;
+
+    for (;;) {
+        add_wait_queue(&pmoal_thread->wait_q, &wait);
+        set_current_state(TASK_INTERRUPTIBLE);
+
+        schedule();
+
+        set_current_state(TASK_RUNNING);
+        remove_wait_queue(&pmoal_thread->wait_q, &wait);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,13)
+        try_to_freeze(0);       /* Argument is not used by the kernel */
+#else
+        try_to_freeze();
+#endif
+
+        /* Cancel re-association timer */
+        if (handle->is_reassoc_timer_set == MTRUE) {
+            woal_cancel_timer(&handle->reassoc_timer);
+            handle->is_reassoc_timer_set = MFALSE;
+        }
+
+        if (handle->surprise_removed)
+            break;
+        if (kthread_should_stop())
+            break;
+
+        if (handle->hardware_status != HardwareStatusReady) {
+            PRINTM(MINFO, "Reassoc: Hardware status is not correct\n");
+            continue;
+        }
+
+        PRINTM(MEVENT, "Reassoc: Thread waking up...\n");
+        reassoc_timer_req = MFALSE;
+
+        for (i = 0; i < handle->priv_num && (priv = handle->priv[i]); i++) {
+
+            if (priv->reassoc_required == MFALSE)
+                continue;
+
+            memset(&bss_info, 0x00, sizeof(bss_info));
+
+            if (MLAN_STATUS_SUCCESS != woal_get_bss_info(priv,
+                                                         MOAL_CMD_WAIT,
+                                                         &bss_info)) {
+                PRINTM(MINFO, "Ressoc: Fail to get bss info\n");
+                priv->reassoc_required = MFALSE;
+                continue;
+            }
+
+            if (bss_info.bss_mode != MLAN_BSS_MODE_INFRA ||
+                priv->media_connected != MFALSE) {
+                PRINTM(MINFO, "Reassoc: ad-hoc mode or media connected\n");
+                priv->reassoc_required = MFALSE;
+                continue;
+            }
+
+            /* The semaphore is used to avoid reassociation thread and
+               wlan_set_scan/wlan_set_essid interrupting each other.
+               Reassociation should be disabled completely by application if
+               wlan_set_user_scan_ioctl/wlan_set_wap is used. */
+            if (MOAL_ACQ_SEMAPHORE_BLOCK(&handle->reassoc_sem)) {
+                PRINTM(MERROR,
+                       "Acquire semaphore error, reassociation thread\n");
+                reassoc_timer_req = MTRUE;
+                break;
+            }
+
+            PRINTM(MINFO, "Reassoc: Required ESSID: %s\n",
+                   priv->prev_ssid_bssid.ssid.ssid);
+            PRINTM(MINFO, "Reassoc: Performing Active Scan\n");
+
+            memset(&req_ssid, 0x00, sizeof(mlan_802_11_ssid));
+            memcpy(&req_ssid,
+                   &priv->prev_ssid_bssid.ssid, sizeof(mlan_802_11_ssid));
+
+            /* Do specific SSID scanning */
+            if (MLAN_STATUS_SUCCESS !=
+                woal_request_scan(priv, MOAL_CMD_WAIT, &req_ssid)) {
+                PRINTM(MERROR, "Reassoc: Fail to do specific scan\n");
+                reassoc_timer_req = MTRUE;
+                MOAL_REL_SEMAPHORE(&handle->reassoc_sem);
+                break;
+            }
+
+            if (handle->surprise_removed) {
+                MOAL_REL_SEMAPHORE(&handle->reassoc_sem);
+                break;
+            }
+
+            /* Search AP by BSSID first */
+            PRINTM(MINFO, "Reassoc: Search AP by BSSID first\n");
+            memset(&ssid_bssid, 0, sizeof(mlan_ssid_bssid));
+            memcpy(&ssid_bssid.bssid,
+                   &priv->prev_ssid_bssid.bssid, MLAN_MAC_ADDR_LENGTH);
+            status = woal_find_best_network(priv, MOAL_CMD_WAIT, &ssid_bssid);
+
+            if (MLAN_STATUS_SUCCESS != status) {
+                PRINTM(MINFO, "Reassoc: AP not found in scan list\n");
+                PRINTM(MINFO, "Reassoc: Search AP by SSID\n");
+                /* Search AP by SSID */
+                memset(&ssid_bssid, 0, sizeof(mlan_ssid_bssid));
+                memcpy(&ssid_bssid.ssid,
+                       &priv->prev_ssid_bssid.ssid, sizeof(mlan_802_11_ssid));
+                status = woal_find_best_network(priv,
+                                                MOAL_CMD_WAIT, &ssid_bssid);
+            }
+
+            if (status == MLAN_STATUS_SUCCESS) {
+                /* set the wep key */
+                if (bss_info.wep_status)
+                    woal_enable_wep_key(priv, MOAL_CMD_WAIT);
+                /* Zero SSID implies use BSSID to connect */
+                memset(&ssid_bssid.ssid, 0, sizeof(mlan_802_11_ssid));
+                status = woal_bss_start(priv, MOAL_CMD_WAIT, &ssid_bssid);
+            }
+
+            if (priv->media_connected == MFALSE)
+                reassoc_timer_req = MTRUE;
+            else {
+                mlan_ds_rate *rate = NULL;
+                mlan_ioctl_req *req = NULL;
+
+                reassoc_timer_req = MFALSE;
+
+                if (priv->rate_index != AUTO_RATE) {
+                    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_rate));
+
+                    if (req == NULL) {
+                        LEAVE();
+                        return MLAN_STATUS_FAILURE;
+                    }
+
+                    rate = (mlan_ds_rate *) req->pbuf;
+                    rate->param.rate_cfg.rate_type = MLAN_RATE_INDEX;
+                    rate->sub_command = MLAN_OID_RATE_CFG;
+                    req->req_id = MLAN_IOCTL_RATE;
+
+                    req->action = MLAN_ACT_SET;
+
+                    rate->param.rate_cfg.rate = priv->rate_index;
+
+                    if (MLAN_STATUS_SUCCESS
+                        != woal_request_ioctl(priv, req, MOAL_CMD_WAIT)) {
+                        kfree(req);
+                        LEAVE();
+                        return MLAN_STATUS_FAILURE;
+                    }
+                    if (req)
+                        kfree(req);
+                }
+            }
+
+            MOAL_REL_SEMAPHORE(&handle->reassoc_sem);
+        }
+
+        if (handle->surprise_removed)
+            break;
+
+        if (reassoc_timer_req == MTRUE) {
+            PRINTM(MEVENT,
+                   "Reassoc: No AP found or assoc failed. "
+                   "Restarting re-assoc Timer: %d\n", (int) timer_val);
+            handle->is_reassoc_timer_set = MTRUE;
+            woal_mod_timer(&handle->reassoc_timer, timer_val);
+        }
+    }
+    woal_deactivate_thread(pmoal_thread);
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function triggers re-association by waking up
+ *  re-assoc thread.
+ *  
+ *  @param context	A pointer to context
+ *  @return		N/A
+ */
+void
+woal_reassoc_timer_func(void *context)
+{
+    moal_handle *handle = (moal_handle *) context;
+
+    ENTER();
+
+    PRINTM(MINFO, "reassoc_timer fired.\n");
+    handle->is_reassoc_timer_set = MFALSE;
+
+    PRINTM(MINFO, "Waking Up the Reassoc Thread\n");
+    wake_up_interruptible(&handle->reassoc_thread.wait_q);
+
+    LEAVE();
+    return;
+}
+#endif /* REASSOCIATION */
+
+#ifdef STA_SUPPORT
+t_void
+woal_send_disconnect_to_system(moal_private * priv)
+{
+    union iwreq_data wrqu;
+
+    priv->media_connected = MFALSE;
+    woal_stop_queue(priv->netdev);
+    if (netif_carrier_ok(priv->netdev))
+        netif_carrier_off(priv->netdev);
+    memset(wrqu.ap_addr.sa_data, 0x00, ETH_ALEN);
+    wrqu.ap_addr.sa_family = ARPHRD_ETHER;
+    wireless_send_event(priv->netdev, SIOCGIWAP, &wrqu, NULL);
+}
+#endif
+
+/**
+ *  @brief This workqueue function handles main_process
+ *  
+ *  @param work    A pointer to work_struct
+ *
+ *  @return        N/A
+ */
+t_void
+woal_main_work_queue(struct work_struct *work)
+{
+    moal_handle *handle = container_of(work, moal_handle, main_work);
+    struct usb_card_rec *cardp = (struct usb_card_rec *) handle->card;
+
+    ENTER();
+
+    if (handle->surprise_removed == MTRUE) {
+        LEAVE();
+        return;
+    }
+
+    handle->main_state = MOAL_ENTER_WORK_QUEUE;
+    /* WAR for no free skb issue */
+    if (atomic_read(&cardp->rx_data_urb_pending) < MVUSB_RX_DATA_URB / 2) {
+        PRINTM(MWARN, "Try to resubmit Rx data URBs\n");
+        woal_usb_submit_rx_data_urbs(handle);
+    }
+    handle->main_state = MOAL_START_MAIN_PROCESS;
+    /* Call MLAN main process */
+    mlan_main_process(handle->pmlan_adapter);
+    handle->main_state = MOAL_END_MAIN_PROCESS;
+
+    LEAVE();
+}
+
+/**
+ * @brief This function adds the card. it will probe the
+ * 		card, allocate the mlan_private and initialize the device. 
+ *  
+ *  @param card    A pointer to card
+ *
+ *  @return        A pointer to moal_handle structure
+ */
+moal_handle *
+woal_add_card(void *card)
+{
+    moal_handle *handle = NULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    int netlink_num = NETLINK_MARVELL;
+    int index = 0;
+
+    ENTER();
+
+    if (MOAL_ACQ_SEMAPHORE_BLOCK(&AddRemoveCardSem))
+        goto exit_sem_err;
+
+    /* Allocate buffer for moal_handle */
+    if (!(handle = kmalloc(sizeof(moal_handle), GFP_KERNEL))) {
+        PRINTM(MERROR, "Allocate buffer for moal_handle failed!\n");
+        goto err_handle;
+    }
+
+    /* Init moal_handle */
+    memset(handle, 0, sizeof(moal_handle));
+    handle->card = card;
+    /* Save the handle */
+    for (index = 0; index < MAX_MLAN_ADAPTER; index++) {
+        if (m_handle[index] == NULL)
+            break;
+    }
+    if (index < MAX_MLAN_ADAPTER) {
+        m_handle[index] = handle;
+        handle->handle_idx = index;
+    } else {
+        PRINTM(MERROR, "Exceeded maximum cards supported!\n");
+        goto err_kmalloc;
+    }
+
+    if (mac_addr) {
+        t_u8 temp[20];
+        t_u8 len = strlen(mac_addr) + 1;
+        if (len < sizeof(temp)) {
+            memcpy(temp, mac_addr, len);
+            handle->set_mac_addr = 1;
+            /* note: the following function overwrites the temp buffer */
+            woal_mac2u8(handle->mac_addr, temp);
+        }
+    }
+#ifdef STA_SUPPORT
+    handle->scan_pending_on_block = MFALSE;
+    MOAL_INIT_SEMAPHORE(&handle->async_sem);
+#endif
+
+    /* Init SW */
+    if (MLAN_STATUS_SUCCESS != woal_init_sw(handle)) {
+        PRINTM(MFATAL, "Software Init Failed\n");
+        goto err_kmalloc;
+    }
+#if defined(USB8766)
+    handle->boot_state = ((struct usb_card_rec *) card)->boot_state;
+#endif /* USB8766 || USB8797 */
+
+    do {
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,14)
+        handle->nl_sk = netlink_kernel_create(netlink_num, NULL);
+#else
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
+        handle->nl_sk =
+            netlink_kernel_create(netlink_num, NL_MULTICAST_GROUP, NULL,
+                                  THIS_MODULE);
+#else
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
+        handle->nl_sk =
+            netlink_kernel_create(netlink_num, NL_MULTICAST_GROUP, NULL, NULL,
+                                  THIS_MODULE);
+#else
+        handle->nl_sk =
+            netlink_kernel_create(&init_net, netlink_num, NL_MULTICAST_GROUP,
+                                  NULL, NULL, THIS_MODULE);
+#endif
+#endif
+#endif
+        if (handle->nl_sk) {
+            PRINTM(MINFO, "Netlink number = %d\n", netlink_num);
+            handle->netlink_num = netlink_num;
+            break;
+        }
+        netlink_num--;
+    } while (netlink_num > 0);
+
+    if (handle->nl_sk == NULL) {
+        PRINTM(MERROR,
+               "Could not initialize netlink event passing mechanism!\n");
+        goto err_kmalloc;
+    }
+
+    /* Create workqueue for main process */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,14)
+    /* For kernel less than 2.6.14 name can not be greater than 10 characters */
+    handle->workqueue = create_workqueue("MOAL_WORKQ");
+#else
+    handle->workqueue = create_workqueue("MOAL_WORK_QUEUE");
+#endif
+    if (!handle->workqueue)
+        goto err_kmalloc;
+
+    MLAN_INIT_WORK(&handle->main_work, woal_main_work_queue);
+
+#ifdef REASSOCIATION
+    PRINTM(MINFO, "Starting re-association thread...\n");
+    handle->reassoc_thread.handle = handle;
+    woal_create_thread(woal_reassociation_thread,
+                       &handle->reassoc_thread, "woal_reassoc_service");
+
+    while (!handle->reassoc_thread.pid) {
+        woal_sched_timeout(2);
+    }
+#endif /* REASSOCIATION */
+
+    /* Register the device. Fill up the private data structure with relevant
+       information from the card and request for the required IRQ. */
+    if (woal_register_dev(handle) != MLAN_STATUS_SUCCESS) {
+        PRINTM(MFATAL, "Failed to register wlan device!\n");
+        goto err_registerdev;
+    }
+
+    /* Init FW and HW */
+    if (MLAN_STATUS_SUCCESS != woal_init_fw(handle)) {
+        PRINTM(MFATAL, "Firmware Init Failed\n");
+        goto err_init_fw;
+    }
+
+    LEAVE();
+    return handle;
+
+  err_init_fw:
+  err_registerdev:
+    handle->surprise_removed = MTRUE;
+#ifdef REASSOCIATION
+    if (handle->reassoc_thread.pid) {
+        wake_up_interruptible(&handle->reassoc_thread.wait_q);
+    }
+    /* waiting for main thread quit */
+    while (handle->reassoc_thread.pid) {
+        woal_sched_timeout(2);
+    }
+#endif /* REASSOCIATION */
+    woal_terminate_workqueue(handle);
+  err_kmalloc:
+    if ((handle->hardware_status == HardwareStatusFwReady) ||
+        (handle->hardware_status == HardwareStatusReady)) {
+        PRINTM(MINFO, "shutdown mlan\n");
+        handle->init_wait_q_woken = MFALSE;
+        status = mlan_shutdown_fw(handle->pmlan_adapter);
+        if (status == MLAN_STATUS_PENDING)
+            wait_event_interruptible(handle->init_wait_q,
+                                     handle->init_wait_q_woken);
+    }
+    woal_usb_free(card);
+    woal_free_moal_handle(handle);
+    if (index < MAX_MLAN_ADAPTER) {
+        m_handle[index] = NULL;
+    }
+  err_handle:
+    MOAL_REL_SEMAPHORE(&AddRemoveCardSem);
+  exit_sem_err:
+    LEAVE();
+    return NULL;
+}
+
+/** 
+ *  @brief This function removes the card.
+ *  
+ *  @param card    A pointer to card
+ *
+ *  @return        MLAN_STATUS_SUCCESS
+ */
+mlan_status
+woal_remove_card(void *card)
+{
+    moal_handle *handle = NULL;
+    moal_private *priv = NULL;
+    mlan_status status;
+    int i;
+    int index = 0;
+
+    ENTER();
+
+    if (MOAL_ACQ_SEMAPHORE_BLOCK(&AddRemoveCardSem))
+        goto exit_sem_err;
+    /* Find the correct handle */
+    for (index = 0; index < MAX_MLAN_ADAPTER; index++) {
+        if (m_handle[index] && (m_handle[index]->card == card)) {
+            handle = m_handle[index];
+            break;
+        }
+    }
+    if (!handle)
+        goto exit_remove;
+    handle->surprise_removed = MTRUE;
+
+    /* Stop data */
+    for (i = 0; i < handle->priv_num; i++) {
+        if ((priv = handle->priv[i])) {
+            woal_stop_queue(priv->netdev);
+            if (netif_carrier_ok(priv->netdev))
+                netif_carrier_off(priv->netdev);
+        }
+    }
+
+    if ((handle->hardware_status == HardwareStatusFwReady) ||
+        (handle->hardware_status == HardwareStatusReady)) {
+        /* Shutdown firmware */
+        PRINTM(MIOCTL, "mlan_shutdown_fw.....\n");
+        handle->init_wait_q_woken = MFALSE;
+
+        status = mlan_shutdown_fw(handle->pmlan_adapter);
+        if (status == MLAN_STATUS_PENDING)
+            wait_event_interruptible(handle->init_wait_q,
+                                     handle->init_wait_q_woken);
+        PRINTM(MIOCTL, "mlan_shutdown_fw done!\n");
+    }
+    if (atomic_read(&handle->rx_pending) || atomic_read(&handle->tx_pending) ||
+        atomic_read(&handle->ioctl_pending)) {
+        PRINTM(MERROR, "ERR: rx_pending=%d,tx_pending=%d,ioctl_pending=%d\n",
+               atomic_read(&handle->rx_pending),
+               atomic_read(&handle->tx_pending),
+               atomic_read(&handle->ioctl_pending));
+    }
+
+    /* Remove interface */
+    for (i = 0; i < handle->priv_num; i++)
+        woal_remove_interface(handle, i);
+
+    woal_terminate_workqueue(handle);
+
+#ifdef REASSOCIATION
+    PRINTM(MINFO, "Free reassoc_timer\n");
+    if (handle->is_reassoc_timer_set) {
+        woal_cancel_timer(&handle->reassoc_timer);
+        handle->is_reassoc_timer_set = MFALSE;
+    }
+    if (handle->reassoc_thread.pid)
+        wake_up_interruptible(&handle->reassoc_thread.wait_q);
+
+    /* waiting for main thread quit */
+    while (handle->reassoc_thread.pid) {
+        woal_sched_timeout(2);
+    }
+#endif /* REASSOCIATION */
+
+#ifdef CONFIG_PROC_FS
+    woal_proc_exit(handle);
+#endif
+    /* Free adapter structure */
+    PRINTM(MINFO, "Free Adapter\n");
+    woal_free_moal_handle(handle);
+
+    for (index = 0; index < MAX_MLAN_ADAPTER; index++) {
+        if (m_handle[index] == handle) {
+            m_handle[index] = NULL;
+            break;
+        }
+    }
+  exit_remove:
+    MOAL_REL_SEMAPHORE(&AddRemoveCardSem);
+  exit_sem_err:
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function switch the drv_mode
+ *  
+ *  @param handle    A pointer to moal_handle structure
+ *  @param mode     new drv_mode to switch.
+ *
+ *  @return        MLAN_STATUS_SUCCESS /MLAN_STATUS_FAILURE /MLAN_STATUS_PENDING
+ */
+mlan_status
+woal_switch_drv_mode(moal_handle * handle, t_u32 mode)
+{
+    unsigned int i;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    moal_private *priv = NULL;
+
+    ENTER();
+
+    if (MOAL_ACQ_SEMAPHORE_BLOCK(&AddRemoveCardSem))
+        goto exit_sem_err;
+
+    if (wlan_update_drv_tbl(handle, mode) != MLAN_STATUS_SUCCESS) {
+        PRINTM(MERROR, "Could not update driver mode table!\n");
+        status = MLAN_STATUS_FAILURE;
+        goto exit;
+    }
+
+    /* Reset all interfaces */
+    priv = woal_get_priv(handle, MLAN_BSS_ROLE_ANY);
+    woal_reset_intf(priv, MOAL_PROC_WAIT, MTRUE);
+
+    status = woal_shutdown_fw(priv, MOAL_CMD_WAIT);
+    if (status != MLAN_STATUS_SUCCESS) {
+        PRINTM(MERROR, "func shutdown failed!\n");
+        goto exit;
+    }
+    handle->skip_fw_dnld = MTRUE;
+
+    /* Shutdown firmware */
+    PRINTM(MIOCTL, "mlan_shutdown_fw.....\n");
+    handle->init_wait_q_woken = MFALSE;
+    status = mlan_shutdown_fw(handle->pmlan_adapter);
+    if (status == MLAN_STATUS_PENDING)
+        wait_event_interruptible(handle->init_wait_q,
+                                 handle->init_wait_q_woken);
+    PRINTM(MIOCTL, "mlan_shutdown_fw done!\n");
+    if (atomic_read(&handle->rx_pending) || atomic_read(&handle->tx_pending) ||
+        atomic_read(&handle->ioctl_pending)) {
+        PRINTM(MERROR, "ERR: rx_pending=%d,tx_pending=%d,ioctl_pending=%d\n",
+               atomic_read(&handle->rx_pending),
+               atomic_read(&handle->tx_pending),
+               atomic_read(&handle->ioctl_pending));
+    }
+
+    /* Remove interface */
+    for (i = 0; i < handle->priv_num; i++)
+        woal_remove_interface(handle, i);
+
+    /* Unregister mlan */
+    if (handle->pmlan_adapter) {
+        mlan_unregister(handle->pmlan_adapter);
+        if (handle->malloc_count || handle->lock_count) {
+            PRINTM(MERROR,
+                   "mlan has memory leak: malloc_count=%lu lock_count=%lu\n",
+                   handle->malloc_count, handle->lock_count);
+        }
+        handle->pmlan_adapter = NULL;
+    }
+
+    handle->priv_num = 0;
+    drv_mode = mode;
+    /* Init SW */
+    if (woal_init_sw(handle)) {
+        PRINTM(MFATAL, "Software Init Failed\n");
+        goto exit;
+    }
+    /* Init FW and HW */
+    if (woal_init_fw(handle)) {
+        PRINTM(MFATAL, "Firmware Init Failed\n");
+        goto exit;
+    }
+    LEAVE();
+    return status;
+  exit:
+    MOAL_REL_SEMAPHORE(&AddRemoveCardSem);
+  exit_sem_err:
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief This function initializes module.
+ *  
+ *  @return        MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static int
+woal_init_module(void)
+{
+    int ret = (int) MLAN_STATUS_SUCCESS;
+    int index = 0;
+
+    ENTER();
+
+    /* Init the wlan_private pointer array first */
+    for (index = 0; index < MAX_MLAN_ADAPTER; index++) {
+        m_handle[index] = NULL;
+    }
+    /* Init mutex */
+    MOAL_INIT_SEMAPHORE(&AddRemoveCardSem);
+
+    /* Register with bus */
+    ret = woal_bus_register();
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief This function cleans module
+ *  
+ *  @return        N/A
+ */
+static void
+woal_cleanup_module(void)
+{
+    moal_handle *handle = NULL;
+    int index = 0;
+    int i;
+
+    ENTER();
+
+    if (MOAL_ACQ_SEMAPHORE_BLOCK(&AddRemoveCardSem))
+        goto exit_sem_err;
+    for (index = 0; index < MAX_MLAN_ADAPTER; index++) {
+        handle = m_handle[index];
+        if (!handle)
+            continue;
+        if (!handle->priv_num)
+            goto exit;
+        if (handle->is_suspended == MTRUE) {
+            woal_exit_usb_suspend(handle);
+        }
+
+        for (i = 0; i < handle->priv_num; i++) {
+#ifdef STA_SUPPORT
+            if ((GET_BSS_ROLE(handle->priv[i]) == MLAN_BSS_ROLE_STA) &&
+                (handle->priv[i]->media_connected == MTRUE)) {
+                woal_disconnect(handle->priv[i], MOAL_CMD_WAIT, NULL);
+            }
+#endif
+#ifdef UAP_SUPPORT
+            if (GET_BSS_ROLE(handle->priv[i]) == MLAN_BSS_ROLE_UAP) {
+#ifdef MFG_CMD_SUPPORT
+                if (mfg_mode != MLAN_INIT_PARA_ENABLED)
+#endif
+                    woal_disconnect(handle->priv[i], MOAL_CMD_WAIT, NULL);
+            }
+#endif
+        }
+
+#ifdef MFG_CMD_SUPPORT
+        if (mfg_mode != MLAN_INIT_PARA_ENABLED)
+#endif
+            woal_shutdown_fw(woal_get_priv(handle, MLAN_BSS_ROLE_ANY),
+                             MOAL_CMD_WAIT);
+    }
+
+  exit:
+    MOAL_REL_SEMAPHORE(&AddRemoveCardSem);
+  exit_sem_err:
+    /* Unregister from bus */
+    woal_bus_unregister();
+    LEAVE();
+}
+
+module_init(woal_init_module);
+module_exit(woal_cleanup_module);
+
+module_param(fw_name, charp, 0);
+MODULE_PARM_DESC(fw_name, "Firmware name");
+module_param(req_fw_nowait, int, 0);
+MODULE_PARM_DESC(req_fw_nowait,
+                 "0: Use request_firmware API; 1: Use request_firmware_nowait API");
+module_param(mac_addr, charp, 0);
+MODULE_PARM_DESC(mac_addr, "MAC address");
+#ifdef MFG_CMD_SUPPORT
+module_param(mfg_mode, int, 0);
+MODULE_PARM_DESC(mfg_mode,
+                 "0: Download normal firmware; 1: Download MFG firmware");
+#endif /* MFG_CMD_SUPPORT */
+module_param(drv_mode, int, 0);
+#if defined(WFD_SUPPORT)
+MODULE_PARM_DESC(drv_mode, "Bit 0: STA; Bit 1: uAP; Bit 2: WFD");
+#else
+MODULE_PARM_DESC(drv_mode, "Bit 0: STA; Bit 1: uAP");
+#endif /* WFD_SUPPORT && V14_FEATURE */
+#ifdef STA_SUPPORT
+module_param(max_sta_bss, int, 0);
+MODULE_PARM_DESC(max_sta_bss, "Number of STA interfaces (1)");
+#endif /* STA_SUPPORT */
+#ifdef UAP_SUPPORT
+module_param(max_uap_bss, int, 0);
+MODULE_PARM_DESC(max_uap_bss, "Number of uAP interfaces (1)");
+#endif /* UAP_SUPPORT */
+#if defined(WFD_SUPPORT)
+module_param(max_wfd_bss, int, 0);
+MODULE_PARM_DESC(max_wfd_bss, "Number of WFD interfaces (1)");
+#endif /* WFD_SUPPORT && V14_FEATURE */
+#ifdef DEBUG_LEVEL1
+module_param(drvdbg, ulong, 0);
+MODULE_PARM_DESC(drvdbg, "Driver debug");
+#endif /* DEBUG_LEVEL1 */
+module_param(ps_mode, int, 0);
+MODULE_PARM_DESC(ps_mode,
+                 "0: MLAN default; 1: Enable IEEE PS mode; 2: Disable IEEE PS mode");
+module_param(max_tx_buf, int, 0);
+MODULE_PARM_DESC(max_tx_buf, "Maximum Tx buffer size (2048/4096/8192)");
+#if defined(STA_SUPPORT)
+module_param(cfg_11d, int, 0);
+MODULE_PARM_DESC(cfg_11d,
+                 "0: MLAN default; 1: Enable 802.11d; 2: Disable 802.11d");
+#endif
+module_param(init_cfg, charp, 0);
+MODULE_PARM_DESC(init_cfg, "Init config file name");
+module_param(cal_data_cfg, charp, 0);
+MODULE_PARM_DESC(cal_data_cfg, "Calibration data file name");
+MODULE_DESCRIPTION("M-WLAN Driver");
+MODULE_AUTHOR("Marvell International Ltd.");
+MODULE_VERSION(MLAN_RELEASE_VERSION);
+MODULE_LICENSE("GPL");
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_main.h linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_main.h
--- linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_main.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_main.h	2017-09-23 03:42:50.162674624 +0800
@@ -0,0 +1,1319 @@
+/** @file moal_main.h
+  *
+  * @brief This file contains wlan driver specific defines etc.
+  * 
+  * Copyright (C) 2008-2011, Marvell International Ltd.  
+  *
+  * This software file (the "File") is distributed by Marvell International 
+  * Ltd. under the terms of the GNU General Public License Version 2, June 1991 
+  * (the "License").  You may use, redistribute and/or modify this File in 
+  * accordance with the terms and conditions of the License, a copy of which 
+  * is available by writing to the Free Software Foundation, Inc.,
+  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
+  * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
+  *
+  * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 
+  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 
+  * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about 
+  * this warranty disclaimer.
+  *
+  */
+
+/********************************************************
+Change log:
+    10/21/2008: initial version
+********************************************************/
+
+#ifndef _MOAL_MAIN_H
+#define _MOAL_MAIN_H
+
+/* warnfix for FS redefination if any? */
+#ifdef FS
+#undef FS
+#endif
+
+/* Linux header files */
+#include        <linux/kernel.h>
+#include        <linux/module.h>
+#include        <linux/init.h>
+#include        <linux/version.h>
+#include        <linux/param.h>
+#include        <linux/delay.h>
+#include        <linux/slab.h>
+#include        <linux/mm.h>
+#include        <linux/types.h>
+#include        <linux/sched.h>
+#include        <linux/timer.h>
+#include        <linux/ioport.h>
+#include        <linux/pci.h>
+#include        <linux/ctype.h>
+#include        <linux/proc_fs.h>
+#include        <linux/vmalloc.h>
+#include	<linux/ptrace.h>
+#include	<linux/string.h>
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)
+#include       <linux/config.h>
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
+#include	    <linux/freezer.h>
+#endif
+#include	    <linux/usb.h>
+
+/* ASM files */
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
+#include        <linux/semaphore.h>
+#else
+#include        <asm/semaphore.h>
+#endif
+#include        <asm/byteorder.h>
+#include        <asm/irq.h>
+#include        <asm/uaccess.h>
+#include        <asm/io.h>
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)
+#include 	<asm/switch_to.h>	//lxy
+#else
+#include        <asm/system.h>
+#endif
+
+/* Net header files */
+#include        <linux/wireless.h>
+#include        <linux/netdevice.h>
+#include        <linux/net.h>
+#include        <linux/inet.h>
+#include        <linux/ip.h>
+#include        <linux/skbuff.h>
+#include        <linux/if_arp.h>
+#include        <linux/if_ether.h>
+#include        <linux/etherdevice.h>
+#include        <net/sock.h>
+#include        <net/arp.h>
+#include        <linux/rtnetlink.h>
+
+#include	<linux/firmware.h>
+
+/* Wireless header */
+#include        <net/iw_handler.h>
+#include        "../mlan/mlan.h"
+#include 	"moal_shim.h"
+#include	"moal_wext.h"
+#ifdef STA_SUPPORT
+#include	"moal_priv.h"
+#endif
+
+/** Define BOOLEAN */
+typedef t_u8 BOOLEAN;
+
+/** Driver version */
+extern char driver_version[];
+
+/** Private structure for MOAL */
+typedef struct _moal_private moal_private;
+/** Handle data structure for MOAL  */
+typedef struct _moal_handle moal_handle;
+
+/** Hardware status codes */
+typedef enum _MOAL_HARDWARE_STATUS
+{
+    HardwareStatusReady,
+    HardwareStatusInitializing,
+    HardwareStatusFwReady,
+    HardwareStatusReset,
+    HardwareStatusClosing,
+    HardwareStatusNotReady
+} MOAL_HARDWARE_STATUS;
+
+/** moal_wait_option */
+enum
+{
+    MOAL_NO_WAIT,
+    MOAL_IOCTL_WAIT,
+    MOAL_CMD_WAIT,
+    MOAL_PROC_WAIT,
+    MOAL_WSTATS_WAIT
+};
+
+/** moal_main_state */
+enum
+{
+    MOAL_STATE_IDLE,
+    MOAL_RECV_INT,
+    MOAL_ENTER_WORK_QUEUE,
+    MOAL_START_MAIN_PROCESS,
+    MOAL_END_MAIN_PROCESS
+};
+
+/** HostCmd_Header */
+typedef struct _HostCmd_Header
+{
+    /** Command */
+    t_u16 command;
+    /** Size */
+    t_u16 size;
+} HostCmd_Header;
+
+#ifndef MIN
+/** Find minimum */
+#define MIN(a,b)		((a) < (b) ? (a) : (b))
+#endif
+
+/*
+ * OS timer specific
+ */
+
+/** Timer structure */
+typedef struct _moal_drv_timer
+{
+        /** Timer list */
+    struct timer_list tl;
+        /** Timer function */
+    void (*timer_function) (void *context);
+        /** Timer function context */
+    void *function_context;
+        /** Time period */
+    t_u32 time_period;
+        /** Is timer periodic ? */
+    t_u32 timer_is_periodic;
+        /** Is timer cancelled ? */
+    t_u32 timer_is_canceled;
+} moal_drv_timer, *pmoal_drv_timer;
+
+/** 
+ *  @brief Timer handler
+ *  
+ *  @param fcontext	Timer context
+ *
+ *  @return		N/A
+ */
+static inline void
+woal_timer_handler(unsigned long fcontext)
+{
+    pmoal_drv_timer timer = (pmoal_drv_timer) fcontext;
+
+    timer->timer_function(timer->function_context);
+
+    if (timer->timer_is_periodic == MTRUE) {
+        mod_timer(&timer->tl, jiffies + ((timer->time_period * HZ) / 1000));
+    } else {
+        timer->timer_is_canceled = MTRUE;
+        timer->time_period = 0;
+    }
+}
+
+/** 
+ *  @brief Initialize timer
+ *  
+ *  @param timer		Timer structure
+ *  @param TimerFunction	Timer function
+ *  @param FunctionContext	Timer function context
+ *
+ *  @return			N/A
+ */
+static inline void
+woal_initialize_timer(pmoal_drv_timer timer,
+                      void (*TimerFunction) (void *context),
+                      void *FunctionContext)
+{
+    /* First, setup the timer to trigger the wlan_timer_handler proxy */
+    init_timer(&timer->tl);
+    timer->tl.function = woal_timer_handler;
+    timer->tl.data = (t_u32) timer;
+
+    /* Then tell the proxy which function to call and what to pass it */
+    timer->timer_function = TimerFunction;
+    timer->function_context = FunctionContext;
+    timer->timer_is_canceled = MTRUE;
+    timer->time_period = 0;
+    timer->timer_is_periodic = MFALSE;
+}
+
+/** 
+ *  @brief Modify timer
+ *  
+ *  @param timer		Timer structure
+ *  @param MillisecondPeriod	Time period in millisecond
+ *
+ *  @return			N/A
+ */
+static inline void
+woal_mod_timer(pmoal_drv_timer timer, t_u32 MillisecondPeriod)
+{
+    timer->time_period = MillisecondPeriod;
+    mod_timer(&timer->tl, jiffies + (MillisecondPeriod * HZ) / 1000);
+    timer->timer_is_canceled = MFALSE;
+}
+
+/** 
+ *  @brief Cancel timer
+ *  
+ *  @param timer	Timer structure
+ *
+ *  @return		N/A
+ */
+static inline void
+woal_cancel_timer(moal_drv_timer * timer)
+{
+    del_timer(&timer->tl);
+    timer->timer_is_canceled = MTRUE;
+    timer->time_period = 0;
+}
+
+#ifdef REASSOCIATION
+/*
+ * OS Thread Specific
+ */
+
+#include	<linux/kthread.h>
+
+/** Kernel thread structure */
+typedef struct _moal_thread
+{
+    /** Task control structrue */
+    struct task_struct *task;
+    /** Pointer to wait_queue_head */
+    wait_queue_head_t wait_q;
+    /** PID */
+    pid_t pid;
+    /** Pointer to moal_handle */
+    void *handle;
+} moal_thread;
+
+/** 
+ *  @brief Activate thread
+ *  
+ *  @param thr			Thread structure
+ *  @return			N/A
+ */
+static inline void
+woal_activate_thread(moal_thread * thr)
+{
+    /** Record the thread pid */
+    thr->pid = current->pid;
+
+    /** Initialize the wait queue */
+    init_waitqueue_head(&thr->wait_q);
+}
+
+/** 
+ *  @brief De-activate thread
+ *  
+ *  @param thr			Thread structure
+ *  @return			N/A
+ */
+static inline void
+woal_deactivate_thread(moal_thread * thr)
+{
+    /* Reset the pid */
+    thr->pid = 0;
+}
+
+/** 
+ *  @brief Create and run the thread
+ *
+ *  @param threadfunc		Thread function
+ *  @param thr			Thread structure
+ *  @param name			Thread name
+ *  @return			N/A
+ */
+static inline void
+woal_create_thread(int (*threadfunc) (void *), moal_thread * thr, char *name)
+{
+    /* Create and run the thread */
+    thr->task = kthread_run(threadfunc, thr, "%s", name);
+}
+#endif /* REASSOCIATION */
+
+/* The following macros are neccessary to retain compatibility
+ * around the workqueue chenges happened in kernels >= 2.6.20:
+ * - INIT_WORK changed to take 2 arguments and let the work function
+ *   get its own data through the container_of macro
+ * - delayed works have been split from normal works to save some
+ *   memory usage in struct work_struct
+ */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
+/** Work_queue work initialization */
+#define MLAN_INIT_WORK(_work, _fun)                 INIT_WORK(_work, ((void (*)(void *))_fun), _work)
+/** Work_queue delayed work initialization */
+#define MLAN_INIT_DELAYED_WORK(_work, _fun)         INIT_WORK(_work, ((void (*)(void *))_fun), _work)
+/** Work_queue container parameter */
+#define MLAN_DELAYED_CONTAINER_OF(_ptr, _type, _m)  container_of(_ptr, _type, _m)
+#else /* LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) */
+/** Work_queue work initialization */
+#define MLAN_INIT_WORK                              INIT_WORK
+/** Work_queue delayed work initialization */
+#define MLAN_INIT_DELAYED_WORK                      INIT_DELAYED_WORK
+/** Work_queue container parameter */
+#define MLAN_DELAYED_CONTAINER_OF(_ptr, _type, _m)  container_of(_ptr, _type, _m.work)
+#endif /* LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) */
+
+/** 
+ *  @brief Schedule timeout
+ *  
+ *  @param millisec	Timeout duration in milli second
+ *
+ *  @return		N/A
+ */
+static inline void
+woal_sched_timeout(t_u32 millisec)
+{
+    set_current_state(TASK_INTERRUPTIBLE);
+
+    schedule_timeout((millisec * HZ) / 1000);
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
+#define IN6PTON_XDIGIT		0x00010000
+#define IN6PTON_DIGIT		0x00020000
+#define IN6PTON_COLON_MASK	0x00700000
+#define IN6PTON_COLON_1		0x00100000      /* single : requested */
+#define IN6PTON_COLON_2		0x00200000      /* second : requested */
+#define IN6PTON_COLON_1_2	0x00400000      /* :: requested */
+#define IN6PTON_DOT		0x00800000      /* . */
+#define IN6PTON_DELIM		0x10000000
+#define IN6PTON_NULL		0x20000000      /* first/tail */
+#define IN6PTON_UNKNOWN		0x40000000
+
+static inline int
+xdigit2bin(char c, int delim)
+{
+    if (c == delim || c == '\0')
+        return IN6PTON_DELIM;
+    if (c == ':')
+        return IN6PTON_COLON_MASK;
+    if (c == '.')
+        return IN6PTON_DOT;
+    if (c >= '0' && c <= '9')
+        return (IN6PTON_XDIGIT | IN6PTON_DIGIT | (c - '0'));
+    if (c >= 'a' && c <= 'f')
+        return (IN6PTON_XDIGIT | (c - 'a' + 10));
+    if (c >= 'A' && c <= 'F')
+        return (IN6PTON_XDIGIT | (c - 'A' + 10));
+    if (delim == -1)
+        return IN6PTON_DELIM;
+    return IN6PTON_UNKNOWN;
+}
+
+static inline int
+in4_pton(const char *src, int srclen, u8 * dst, int delim, const char **end)
+{
+    const char *s;
+    u8 *d;
+    u8 dbuf[4];
+    int ret = 0;
+    int i;
+    int w = 0;
+
+    if (srclen < 0)
+        srclen = strlen(src);
+    s = src;
+    d = dbuf;
+    i = 0;
+    while (1) {
+        int c;
+        c = xdigit2bin(srclen > 0 ? *s : '\0', delim);
+        if (!
+            (c &
+             (IN6PTON_DIGIT | IN6PTON_DOT | IN6PTON_DELIM |
+              IN6PTON_COLON_MASK))) {
+            goto out;
+        }
+        if (c & (IN6PTON_DOT | IN6PTON_DELIM | IN6PTON_COLON_MASK)) {
+            if (w == 0)
+                goto out;
+            *d++ = w & 0xff;
+            w = 0;
+            i++;
+            if (c & (IN6PTON_DELIM | IN6PTON_COLON_MASK)) {
+                if (i != 4)
+                    goto out;
+                break;
+            }
+            goto cont;
+        }
+        w = (w * 10) + c;
+        if ((w & 0xffff) > 255) {
+            goto out;
+        }
+      cont:
+        if (i >= 4)
+            goto out;
+        s++;
+        srclen--;
+    }
+    ret = 1;
+    memcpy(dst, dbuf, sizeof(dbuf));
+  out:
+    if (end)
+        *end = s;
+    return ret;
+}
+#endif /* < 2.6.19 */
+
+#ifndef __ATTRIB_ALIGN__
+#define __ATTRIB_ALIGN__ __attribute__((aligned(4)))
+#endif
+
+#ifndef __ATTRIB_PACK__
+#define __ATTRIB_PACK__ __attribute__ ((packed))
+#endif
+
+/** Get module */
+#define MODULE_GET	try_module_get(THIS_MODULE)
+/** Put module */
+#define MODULE_PUT	module_put(THIS_MODULE)
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,37)
+/** Initialize semaphore */
+#define MOAL_INIT_SEMAPHORE(x)    	init_MUTEX(x)
+/** Initialize semaphore */
+#define MOAL_INIT_SEMAPHORE_LOCKED(x) 	init_MUTEX_LOCKED(x)
+#else
+/** Initialize semaphore */
+#define MOAL_INIT_SEMAPHORE(x)    	sema_init(x,1)
+/** Initialize semaphore */
+#define MOAL_INIT_SEMAPHORE_LOCKED(x) 	sema_init(x,0)
+#endif
+
+/** Acquire semaphore and with blocking */
+#define MOAL_ACQ_SEMAPHORE_BLOCK(x)	down_interruptible(x)
+/** Acquire semaphore without blocking */
+#define MOAL_ACQ_SEMAPHORE_NOBLOCK(x)	down_trylock(x)
+/** Release semaphore */
+#define MOAL_REL_SEMAPHORE(x) 		up(x)
+
+/** Request FW timeout in second */
+#define REQUEST_FW_TIMEOUT		30
+
+/** Max loop count (* 100ms) for waiting device ready at init time */
+#define MAX_WAIT_DEVICE_READY_COUNT	50
+
+/** Default watchdog timeout */
+#define MRVDRV_DEFAULT_WATCHDOG_TIMEOUT (5 * HZ)
+
+#ifdef UAP_SUPPORT
+/** Default watchdog timeout 
+    Increase the value to avoid kernel Tx timeout message in case 
+    station in PS mode or left.
+    The default value of PS station ageout timer is 40 seconds. 
+    Hence, the watchdog timer is set to a value higher than it.
+*/
+#define MRVDRV_DEFAULT_UAP_WATCHDOG_TIMEOUT (41 * HZ)
+#endif
+
+/** 10 seconds */
+#define MOAL_TIMER_10S                10000
+/** 5 seconds */
+#define MOAL_TIMER_5S                 5000
+/** 1 second */
+#define MOAL_TIMER_1S                 1000
+
+/** Default value of re-assoc timer */
+#define REASSOC_TIMER_DEFAULT         500
+
+/** Netlink protocol number */
+#define NETLINK_MARVELL     (MAX_LINKS - 1)
+/** Netlink maximum payload size */
+#define NL_MAX_PAYLOAD      1024
+/** Netlink multicast group number */
+#define NL_MULTICAST_GROUP  1
+
+/** MAX Tx Pending count */
+#define MAX_TX_PENDING    	100
+
+/** LOW Tx Pending count */
+#define LOW_TX_PENDING      80
+
+/** Offset for subcommand */
+#define SUBCMD_OFFSET       4
+
+/** Macro to extract the TOS field from a skb */
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
+#define SKB_TOS(skb) (ip_hdr(skb)->tos)
+#else
+#define SKB_TOS(skb) (skb->nh.iph->tos)
+#endif
+
+/** Offset for TOS field in the IP header */
+#define IPTOS_OFFSET 5
+
+/** Offset for DSCP in the tos field */
+#define DSCP_OFFSET 2
+
+/** wait_queue structure */
+typedef struct _wait_queue
+{
+        /** Pointer to wait_queue_head */
+    wait_queue_head_t *wait;
+        /** Wait condition */
+    BOOLEAN condition;
+        /** Start time */
+    t_u32 start_time;
+        /** Status from MLAN */
+    mlan_status status;
+} wait_queue, *pwait_queue;
+
+#ifdef STA_SUPPORT
+/** Driver mode STA bit */
+#define DRV_MODE_STA       MBIT(0)
+/** Maximum STA BSS */
+#define MAX_STA_BSS        1
+/** Default STA BSS */
+#define DEF_STA_BSS        1
+#endif
+#ifdef UAP_SUPPORT
+/** Driver mode uAP bit */
+#define DRV_MODE_UAP       MBIT(1)
+/** Maximum uAP BSS */
+#define MAX_UAP_BSS        1
+/** Default uAP BSS */
+#define DEF_UAP_BSS        1
+#endif
+#if defined(WFD_SUPPORT)
+/** Driver mode WFD bit */
+#define DRV_MODE_WFD       MBIT(2)
+/** Maximum WFD BSS */
+#define MAX_WFD_BSS        1
+/** Default WFD BSS */
+#define DEF_WFD_BSS        1
+#endif /* WFD_SUPPORT && V14_FEATURE */
+
+typedef struct _moal_drv_mode
+{
+    /** driver mode */
+    t_u16 drv_mode;
+    /** total number of interfaces */
+    t_u16 intf_num;
+    /** attribute of bss */
+    mlan_bss_attr *bss_attr;
+    /** name of firmware image */
+    char *fw_name;
+} moal_drv_mode;
+
+#ifdef PROC_DEBUG
+/** Debug data */
+struct debug_data
+{
+    /** Name */
+    char name[32];
+    /** Size */
+    t_u32 size;
+    /** Address */
+    t_u32 addr;
+};
+
+/** Private debug data */
+struct debug_data_priv
+{
+    /** moal_private handle */
+    moal_private *priv;
+    /** Debug items */
+    struct debug_data *items;
+    /** numbre of item */
+    int num_of_items;
+};
+#endif
+
+/** Maximum IP address buffer length */
+#define IPADDR_MAX_BUF          20
+/** IP address operation: Remove */
+#define IPADDR_OP_REMOVE        0
+
+/** Private structure for MOAL */
+struct _moal_private
+{
+        /** Handle structure */
+    moal_handle *phandle;
+        /** Tx timeout count */
+    t_u32 num_tx_timeout;
+        /** BSS index */
+    t_u8 bss_index;
+        /** BSS type */
+    t_u8 bss_type;
+        /** BSS role */
+    t_u8 bss_role;
+        /** MAC address information */
+    t_u8 current_addr[ETH_ALEN];
+        /** Media connection status */
+    BOOLEAN media_connected;
+#ifdef UAP_SUPPORT
+        /** uAP started or not */
+    BOOLEAN bss_started;
+#endif
+        /** Net device pointer */
+    struct net_device *netdev;
+        /** Net device statistics structure */
+    struct net_device_stats stats;
+        /** IOCTL wait queue */
+    wait_queue_head_t ioctl_wait_q __ATTRIB_ALIGN__;
+        /** CMD wait queue */
+    wait_queue_head_t cmd_wait_q __ATTRIB_ALIGN__;
+#ifdef CONFIG_PROC_FS
+        /** Proc entry */
+    struct proc_dir_entry *proc_entry;
+        /** Proc entry name */
+    t_s8 proc_entry_name[IFNAMSIZ];
+        /** PROC wait queue */
+    wait_queue_head_t proc_wait_q __ATTRIB_ALIGN__;
+#endif                          /* CONFIG_PROC_FS */
+#ifdef STA_SUPPORT
+        /** Nickname */
+    t_u8 nick_name[16];
+        /** AdHoc link sensed flag */
+    BOOLEAN is_adhoc_link_sensed;
+        /** Current WEP key index */
+    t_u16 current_key_index;
+#ifdef REASSOCIATION
+    mlan_ssid_bssid prev_ssid_bssid;
+        /** Re-association required */
+    BOOLEAN reassoc_required;
+        /** Flag of re-association on/off */
+    BOOLEAN reassoc_on;
+#endif                          /* REASSOCIATION */
+        /** Report scan result */
+    t_u8 report_scan_result;
+        /** wpa_version */
+    t_u8 wpa_version;
+        /** key mgmt */
+    t_u8 key_mgmt;
+        /** rx_filter */
+    t_u8 rx_filter;
+#endif                          /* STA_SUPPORT */
+        /** Rate index */
+    t_u16 rate_index;
+        /** IW statistics */
+    struct iw_statistics w_stats;
+        /** w_stats wait queue */
+    wait_queue_head_t w_stats_wait_q __ATTRIB_ALIGN__;
+    /** Pairwise Cipher used for WPA/WPA2 mode */
+    t_u16 pairwise_cipher;
+    /** Group Cipher */
+    t_u16 group_cipher;
+    /** Protocol stored during uap wext configuratoin */
+    t_u16 uap_protocol;
+    /** Key Mgmt whether PSK or 1x */
+    t_u16 uap_key_mgmt;
+
+#ifdef PROC_DEBUG
+    /** MLAN debug info */
+    struct debug_data_priv items_priv;
+#endif
+    BOOLEAN is_h2d_active;
+    BOOLEAN is_d2h_active;
+};
+
+/** Handle data structure for MOAL */
+struct _moal_handle
+{
+        /** MLAN adapter structure */
+    t_void *pmlan_adapter;
+        /** Private pointer */
+    moal_private *priv[MLAN_MAX_BSS_NUM];
+        /** Priv number */
+    t_u8 priv_num;
+        /** Bss attr */
+    moal_drv_mode drv_mode;
+        /** set mac address flag */
+    t_u8 set_mac_addr;
+        /** MAC address */
+    t_u8 mac_addr[ETH_ALEN];
+#ifdef CONFIG_PROC_FS
+        /** Proc top level directory entry */
+    struct proc_dir_entry *proc_mwlan;
+#endif
+        /** Firmware download skip flag */
+    t_u8 skip_fw_dnld;
+        /** Firmware */
+    const struct firmware *firmware;
+        /** Firmware request start time */
+    struct timeval req_fw_time;
+        /** Init config file */
+    const struct firmware *user_data;
+        /** Hotplug device */
+    struct device *hotplug_device;
+        /** STATUS variables */
+    MOAL_HARDWARE_STATUS hardware_status;
+        /** POWER MANAGEMENT AND PnP SUPPORT */
+    BOOLEAN surprise_removed;
+        /** Firmware release number */
+    t_u32 fw_release_number;
+        /** Init wait queue token */
+    t_u16 init_wait_q_woken;
+        /** Init wait queue */
+    wait_queue_head_t init_wait_q __ATTRIB_ALIGN__;
+        /** Device suspend flag */
+    BOOLEAN is_suspended;
+        /** Suspend wait queue token */
+    t_u16 suspend_wait_q_woken;
+        /** Suspend wait queue */
+    wait_queue_head_t suspend_wait_q __ATTRIB_ALIGN__;
+        /** Host Sleep activated flag */
+    t_u8 hs_activated;
+        /** Host Sleep activated event wait queue token */
+    t_u16 hs_activate_wait_q_woken;
+        /** Host Sleep activated event wait queue */
+    wait_queue_head_t hs_activate_wait_q __ATTRIB_ALIGN__;
+        /** Card pointer */
+    t_void *card;
+        /** Rx pending in MLAN */
+    atomic_t rx_pending;
+        /** Tx packet pending count in mlan */
+    atomic_t tx_pending;
+        /** IOCTL pending count in mlan */
+    atomic_t ioctl_pending;
+        /** Malloc count */
+    t_u32 malloc_count;
+        /** lock count */
+    t_u32 lock_count;
+        /** mlan buffer alloc count */
+    t_u32 mbufalloc_count;
+        /** hs skip count */
+    t_u32 hs_skip_count;
+        /** hs force count */
+    t_u32 hs_force_count;
+        /** suspend_fail flag */
+    BOOLEAN suspend_fail;
+#ifdef REASSOCIATION
+        /** Re-association thread */
+    moal_thread reassoc_thread;
+        /** Re-association timer set flag */
+    BOOLEAN is_reassoc_timer_set;
+        /** Re-association timer */
+    moal_drv_timer reassoc_timer __ATTRIB_ALIGN__;
+        /**  */
+    struct semaphore reassoc_sem;
+        /** Bitmap for re-association on/off */
+    t_u8 reassoc_on;
+#endif                          /* REASSOCIATION */
+        /** Driver workqueue */
+    struct workqueue_struct *workqueue;
+        /** main work */
+    struct work_struct main_work;
+        /** Netlink kernel socket */
+    struct sock *nl_sk;
+        /** Netlink kernel socket number */
+    t_u32 netlink_num;
+    /** w_stats wait queue token */
+    BOOLEAN meas_wait_q_woken;
+    /** w_stats wait queue */
+    wait_queue_head_t meas_wait_q __ATTRIB_ALIGN__;
+    /** Measurement start jiffes */
+    t_u32 meas_start_jiffies;
+    /** CAC checking period flag */
+    BOOLEAN cac_period;
+    /** BSS START command delay executing flag */
+    BOOLEAN delay_bss_start;
+    /** SSID,BSSID parameter of delay executing */
+    mlan_ssid_bssid delay_ssid_bssid;
+    /** handle index - for multiple card supports */
+    t_u8 handle_idx;
+#ifdef STA_SUPPORT
+        /** Scan pending on blocked flag */
+    t_u8 scan_pending_on_block;
+        /** Async scan semaphore */
+    struct semaphore async_sem;
+
+#endif
+        /** main state */
+    t_u8 main_state;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34)
+        /** spinlock to stop_queue/wake_queue*/
+    spinlock_t queue_lock;
+#endif
+};
+
+/** 
+ *  @brief set trans_start for each TX queue. 
+ *  
+ *  @param dev		A pointer to net_device structure
+ *
+ *  @return			N/A
+ */
+static inline void
+woal_set_trans_start(struct net_device *dev)
+{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34)
+    unsigned int i;
+    for (i = 0; i < dev->num_tx_queues; i++) {
+        netdev_get_tx_queue(dev, i)->trans_start = jiffies;
+    }
+#endif
+    dev->trans_start = jiffies;
+}
+
+/** 
+ *  @brief Start queue
+ *  
+ *  @param dev		A pointer to net_device structure
+ *
+ *  @return			N/A
+ */
+static inline void
+woal_start_queue(struct net_device *dev)
+{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
+    netif_start_queue(dev);
+#else
+    netif_tx_start_all_queues(dev);
+#endif
+}
+
+/** 
+ *  @brief Stop queue
+ *  
+ *  @param dev		A pointer to net_device structure
+ *
+ *  @return			N/A
+ */
+static inline void
+woal_stop_queue(struct net_device *dev)
+{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34)
+    unsigned long flags;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    spin_lock_irqsave(&priv->phandle->queue_lock, flags);
+    woal_set_trans_start(dev);
+    if (!netif_queue_stopped(dev))
+        netif_tx_stop_all_queues(dev);
+    spin_unlock_irqrestore(&priv->phandle->queue_lock, flags);
+#else
+    woal_set_trans_start(dev);
+    if (!netif_queue_stopped(dev))
+        netif_stop_queue(dev);
+#endif
+}
+
+/** 
+ *  @brief wake queue
+ *  
+ *  @param dev		A pointer to net_device structure
+ *
+ *  @return			N/A
+ */
+static inline void
+woal_wake_queue(struct net_device *dev)
+{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34)
+    unsigned long flags;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    spin_lock_irqsave(&priv->phandle->queue_lock, flags);
+    if (netif_queue_stopped(dev))
+        netif_tx_wake_all_queues(dev);
+    spin_unlock_irqrestore(&priv->phandle->queue_lock, flags);
+#else
+    if (netif_queue_stopped(dev))
+        netif_wake_queue(dev);
+#endif
+}
+
+/** Max number of char in custom event - use multiple of them if needed */
+#define IW_CUSTOM_MAX		256     /* In bytes */
+
+/** Debug Macro definition*/
+#ifdef	DEBUG_LEVEL1
+extern t_u32 drvdbg;
+
+#ifdef	DEBUG_LEVEL2
+#define	PRINTM_MINFO(msg...)  do {if (drvdbg & MINFO) printk(KERN_DEBUG msg);} while(0)
+#define	PRINTM_MWARN(msg...)  do {if (drvdbg & MWARN) printk(KERN_DEBUG msg);} while(0)
+#define	PRINTM_MENTRY(msg...) do {if (drvdbg & MENTRY) printk(KERN_DEBUG msg);} while(0)
+#else
+#define	PRINTM_MINFO(msg...)  do {} while (0)
+#define	PRINTM_MWARN(msg...)  do {} while (0)
+#define	PRINTM_MENTRY(msg...) do {} while (0)
+#endif /* DEBUG_LEVEL2 */
+
+#define	PRINTM_MFW_D(msg...)  do {if (drvdbg & MFW_D) printk(KERN_DEBUG msg);} while(0)
+#define	PRINTM_MCMD_D(msg...) do {if (drvdbg & MCMD_D) printk(KERN_DEBUG msg);} while(0)
+#define	PRINTM_MDAT_D(msg...) do {if (drvdbg & MDAT_D) printk(KERN_DEBUG msg);} while(0)
+#define	PRINTM_MIF_D(msg...) do {if (drvdbg & MIF_D) printk(KERN_DEBUG msg);} while(0)
+
+#define	PRINTM_MIOCTL(msg...) do {if (drvdbg & MIOCTL) printk(KERN_DEBUG msg);} while(0)
+#define	PRINTM_MINTR(msg...)  do {if (drvdbg & MINTR) printk(KERN_DEBUG msg);} while(0)
+#define	PRINTM_MEVENT(msg...) do {if (drvdbg & MEVENT) printk(msg);} while(0)
+#define	PRINTM_MCMND(msg...)  do {if (drvdbg & MCMND) printk(KERN_DEBUG msg);} while(0)
+#define	PRINTM_MDATA(msg...)  do {if (drvdbg & MDATA) printk(KERN_DEBUG msg);} while(0)
+#define	PRINTM_MERROR(msg...) do {if (drvdbg & MERROR) printk(KERN_ERR msg);} while(0)
+#define	PRINTM_MFATAL(msg...) do {if (drvdbg & MFATAL) printk(KERN_ERR msg);} while(0)
+#define	PRINTM_MMSG(msg...)   do {if (drvdbg & MMSG) printk(KERN_ALERT msg);} while(0)
+
+#define	PRINTM(level,msg...) PRINTM_##level(msg)
+
+#else
+
+#define	PRINTM(level,msg...) do {} while (0)
+
+#endif /* DEBUG_LEVEL1 */
+
+/** Wait until a condition becomes true */
+#define MASSERT(cond)                   \
+do {                                    \
+    if (!(cond)) {                      \
+        PRINTM(MFATAL, "ASSERT: %s: %i\n", __FUNCTION__, __LINE__); \
+        panic("Assert failed: Panic!"); \
+    }                                   \
+} while(0)
+
+/** Log entry point for debugging */
+#define	ENTER()			PRINTM(MENTRY, "Enter: %s\n", \
+                                    __FUNCTION__)
+/** Log exit point for debugging */
+#define	LEAVE()			PRINTM(MENTRY, "Leave: %s\n", \
+                                    __FUNCTION__)
+
+#ifdef DEBUG_LEVEL1
+#define DBG_DUMP_BUF_LEN 	64
+#define MAX_DUMP_PER_LINE	16
+
+static inline void
+hexdump(char *prompt, t_u8 * buf, int len)
+{
+    int i;
+    char dbgdumpbuf[DBG_DUMP_BUF_LEN];
+    char *ptr = dbgdumpbuf;
+
+    printk(KERN_DEBUG "%s:\n", prompt);
+    for (i = 1; i <= len; i++) {
+        ptr += sprintf(ptr, "%02x ", *buf);
+        buf++;
+        if (i % MAX_DUMP_PER_LINE == 0) {
+            *ptr = 0;
+            printk(KERN_DEBUG "%s\n", dbgdumpbuf);
+            ptr = dbgdumpbuf;
+        }
+    }
+    if (len % MAX_DUMP_PER_LINE) {
+        *ptr = 0;
+        printk(KERN_DEBUG "%s\n", dbgdumpbuf);
+    }
+}
+
+#define DBG_HEXDUMP_MERROR(x,y,z)    do {if (drvdbg & MERROR) hexdump(x,y,z);} while(0)
+#define DBG_HEXDUMP_MCMD_D(x,y,z)    do {if (drvdbg & MCMD_D) hexdump(x,y,z);} while(0)
+#define DBG_HEXDUMP_MDAT_D(x,y,z)    do {if (drvdbg & MDAT_D) hexdump(x,y,z);} while(0)
+#define DBG_HEXDUMP_MIF_D(x,y,z)     do {if (drvdbg & MIF_D) hexdump(x,y,z);} while(0)
+#define DBG_HEXDUMP_MEVT_D(x,y,z)    do {if (drvdbg & MEVT_D) hexdump(x,y,z);} while(0)
+#define DBG_HEXDUMP_MFW_D(x,y,z)     do {if (drvdbg & MFW_D) hexdump(x,y,z);} while(0)
+#define	DBG_HEXDUMP(level,x,y,z)    DBG_HEXDUMP_##level(x,y,z)
+
+#else
+/** Do nothing since debugging is not turned on */
+#define DBG_HEXDUMP(level,x,y,z)    do {} while (0)
+#endif
+
+#ifdef DEBUG_LEVEL2
+#define HEXDUMP(x,y,z)              do {if (drvdbg & MINFO) hexdump(x,y,z);} while(0)
+#else
+/** Do nothing since debugging is not turned on */
+#define HEXDUMP(x,y,z)              do {} while (0)
+#endif
+
+#ifdef BIG_ENDIAN_SUPPORT
+/** Convert from 16 bit little endian format to CPU format */
+#define woal_le16_to_cpu(x) le16_to_cpu(x)
+/** Convert from 32 bit little endian format to CPU format */
+#define woal_le32_to_cpu(x) le32_to_cpu(x)
+/** Convert from 64 bit little endian format to CPU format */
+#define woal_le64_to_cpu(x) le64_to_cpu(x)
+/** Convert to 16 bit little endian format from CPU format */
+#define woal_cpu_to_le16(x) cpu_to_le16(x)
+/** Convert to 32 bit little endian format from CPU format */
+#define woal_cpu_to_le32(x) cpu_to_le32(x)
+/** Convert to 64 bit little endian format from CPU format */
+#define woal_cpu_to_le64(x) cpu_to_le64(x)
+#else
+/** Do nothing */
+#define woal_le16_to_cpu(x) x
+/** Do nothing */
+#define woal_le32_to_cpu(x) x
+/** Do nothing */
+#define woal_le64_to_cpu(x) x
+/** Do nothing */
+#define woal_cpu_to_le16(x) x
+/** Do nothing */
+#define woal_cpu_to_le32(x) x
+/** Do nothing */
+#define woal_cpu_to_le64(x) x
+#endif
+
+/** 
+ *  @brief This function returns first available priv
+ *  based on the BSS role
+ *  
+ *  @param handle    A pointer to moal_handle
+ *  @param bss_role  BSS role or MLAN_BSS_ROLE_ANY
+ *
+ *  @return          Pointer to moal_private
+ */
+static inline moal_private *
+woal_get_priv(moal_handle * handle, mlan_bss_role bss_role)
+{
+    int i;
+
+    for (i = 0; i < handle->priv_num; i++) {
+        if (handle->priv[i]) {
+            if (bss_role == MLAN_BSS_ROLE_ANY ||
+                GET_BSS_ROLE(handle->priv[i]) == bss_role)
+                break;
+        }
+    }
+    return ((i < handle->priv_num) ? handle->priv[i] : NULL);
+}
+
+/** Max line length allowed in init config file */
+#define MAX_LINE_LEN        256
+/** Max MAC address string length allowed */
+#define MAX_MAC_ADDR_LEN    18
+/** Max register type/offset/value etc. parameter length allowed */
+#define MAX_PARAM_LEN       12
+
+/** HostCmd_CMD_CFG_DATA for CAL data */
+#define HostCmd_CMD_CFG_DATA 0x008f
+/** HostCmd action set */
+#define HostCmd_ACT_GEN_SET 0x0001
+/** HostCmd CAL data header length */
+#define CFG_DATA_HEADER_LEN	6
+
+typedef struct _HostCmd_DS_GEN
+{
+    t_u16 command;
+    t_u16 size;
+    t_u16 seq_num;
+    t_u16 result;
+} HostCmd_DS_GEN;
+
+typedef struct _HostCmd_DS_802_11_CFG_DATA
+{
+    /** Action */
+    t_u16 action;
+    /** Type */
+    t_u16 type;
+    /** Data length */
+    t_u16 data_len;
+    /** Data */
+    t_u8 data[1];
+} __ATTRIB_PACK__ HostCmd_DS_802_11_CFG_DATA;
+
+/**  Convert ASCII string to hex value */
+int woal_ascii2hex(t_u8 * d, char *s, t_u32 dlen);
+/**  Convert mac address from string to t_u8 buffer */
+void woal_mac2u8(t_u8 * mac_addr, char *buf);
+/**  Extract token from string */
+char *woal_strsep(char **s, char delim, char esc);
+/** Return int value of a given ASCII string */
+mlan_status woal_atoi(int *data, char *a);
+/** Return hex value of a given ASCII string */
+int woal_atox(char *a);
+/** Allocate buffer */
+pmlan_buffer woal_alloc_mlan_buffer(moal_handle * handle, int size);
+/** Allocate IOCTL request buffer */
+pmlan_ioctl_req woal_alloc_mlan_ioctl_req(int size);
+/** Free buffer */
+void woal_free_mlan_buffer(moal_handle * handle, pmlan_buffer pmbuf);
+/** Get private structure of a BSS by index */
+moal_private *woal_bss_index_to_priv(moal_handle * handle, t_u8 bss_index);
+/* Functions in interface module */
+/** Add card */
+moal_handle *woal_add_card(void *card);
+/** Remove card */
+mlan_status woal_remove_card(void *card);
+/** broadcast event */
+mlan_status woal_broadcast_event(moal_private * priv, t_u8 * payload,
+                                 t_u32 len);
+/** switch driver mode */
+mlan_status woal_switch_drv_mode(moal_handle * handle, t_u32 mode);
+
+/** Get version */
+void woal_get_version(moal_handle * handle, char *version, int maxlen);
+/** Get Driver Version */
+int woal_get_driver_version(moal_private * priv, struct ifreq *req);
+/** Get extended driver version */
+int woal_get_driver_verext(moal_private * priv, struct ifreq *ireq);
+/** Request MAC address setting */
+mlan_status woal_request_set_mac_address(moal_private * priv);
+/** Request multicast list setting */
+void woal_request_set_multicast_list(moal_private * priv,
+                                     struct net_device *dev);
+/** Request IOCTL action */
+mlan_status woal_request_ioctl(moal_private * priv, mlan_ioctl_req * req,
+                               t_u8 wait_option);
+mlan_status woal_request_soft_reset(moal_handle * handle);
+#ifdef PROC_DEBUG
+/** Get debug information */
+mlan_status woal_get_debug_info(moal_private * priv, t_u8 wait_option,
+                                mlan_debug_info * debug_info);
+/** Set debug information */
+mlan_status woal_set_debug_info(moal_private * priv, t_u8 wait_option,
+                                mlan_debug_info * debug_info);
+#endif
+/** Disconnect */
+mlan_status woal_disconnect(moal_private * priv, t_u8 wait_option, t_u8 * mac);
+/** associate */
+mlan_status woal_bss_start(moal_private * priv, t_u8 wait_option,
+                           mlan_ssid_bssid * ssid_bssid);
+/** Request firmware information */
+mlan_status woal_request_get_fw_info(moal_private * priv, t_u8 wait_option,
+                                     mlan_fw_info * fw_info);
+/** Set/get Host Sleep parameters */
+mlan_status woal_set_get_hs_params(moal_private * priv, t_u16 action,
+                                   t_u8 wait_option, mlan_ds_hs_cfg * hscfg);
+/** Cancel Host Sleep configuration */
+mlan_status woal_cancel_hs(moal_private * priv, t_u8 wait_option);
+/** Enable Host Sleep configuration */
+int woal_enable_hs(moal_private * priv);
+/** hs active timeout 2 second */
+#define HS_ACTIVE_TIMEOUT  (2 * HZ)
+
+/** Get BSS information */
+mlan_status woal_get_bss_info(moal_private * priv, t_u8 wait_option,
+                              mlan_bss_info * bss_info);
+void woal_process_ioctl_resp(moal_private * priv, mlan_ioctl_req * req);
+#ifdef STA_SUPPORT
+void woal_send_iwevcustom_event(moal_private * priv, t_s8 * str);
+void woal_send_disconnect_to_system(moal_private * priv);
+void woal_send_mic_error_event(moal_private * priv, t_u32 event);
+void woal_ioctl_get_bss_resp(moal_private * priv, mlan_ds_bss * bss);
+void woal_ioctl_get_info_resp(moal_private * priv, mlan_ds_get_info * info);
+/** Get mode */
+t_u32 woal_get_mode(moal_private * priv, t_u8 wait_option);
+/** Get signal information */
+mlan_status woal_get_signal_info(moal_private * priv, t_u8 wait_option,
+                                 mlan_ds_get_signal * signal);
+/** Get statistics information */
+mlan_status woal_get_stats_info(moal_private * priv, t_u8 wait_option,
+                                mlan_ds_get_stats * stats);
+/** Get data rates */
+mlan_status woal_get_data_rates(moal_private * priv, t_u8 wait_option,
+                                moal_802_11_rates * m_rates);
+/** Get channel list */
+mlan_status woal_get_channel_list(moal_private * priv, t_u8 wait_option,
+                                  mlan_chan_list * chanlist);
+/** Set/Get retry count */
+mlan_status woal_set_get_retry(moal_private * priv, t_u32 action,
+                               t_u8 wait_option, int *value);
+/** Set/Get RTS threshold */
+mlan_status woal_set_get_rts(moal_private * priv, t_u32 action,
+                             t_u8 wait_option, int *value);
+/** Set/Get fragment threshold */
+mlan_status woal_set_get_frag(moal_private * priv, t_u32 action,
+                              t_u8 wait_option, int *value);
+/** Set/Get generic element */
+mlan_status woal_set_get_gen_ie(moal_private * priv, t_u32 action, t_u8 * ie,
+                                int *ie_len);
+/** Set/Get TX power */
+mlan_status woal_set_get_tx_power(moal_private * priv, t_u32 action,
+                                  mlan_power_cfg_t * pwr);
+/** Set/Get power IEEE management */
+mlan_status woal_set_get_power_mgmt(moal_private * priv, t_u32 action,
+                                    int *disabled, int type);
+/** Get data rate */
+mlan_status woal_get_data_rate(moal_private * priv, mlan_ds_rate * datarate);
+/** Request a network scan */
+mlan_status woal_request_scan(moal_private * priv, t_u8 wait_option,
+                              mlan_802_11_ssid * req_ssid);
+/** Set radio on/off */
+int woal_set_radio(moal_private * priv, t_u8 option);
+/** Set region code */
+mlan_status woal_set_region_code(moal_private * priv, char *region);
+/** Get scan table */
+mlan_status woal_get_scan_table(moal_private * priv, t_u8 wait_option,
+                                mlan_scan_resp * scanresp);
+/** Set authentication mode */
+mlan_status woal_set_auth_mode(moal_private * priv, t_u8 wait_option,
+                               t_u32 auth_mode);
+/** Get authentication mode */
+mlan_status woal_get_auth_mode(moal_private * priv, t_u8 wait_option,
+                               t_u32 * auth_mode);
+/** Set encryption mode */
+mlan_status woal_set_encrypt_mode(moal_private * priv, t_u8 wait_option,
+                                  t_u32 encrypt_mode);
+/** Get encryption mode */
+mlan_status woal_get_encrypt_mode(moal_private * priv, t_u8 wait_option,
+                                  t_u32 * encrypt_mode);
+/** Enable wep key */
+mlan_status woal_enable_wep_key(moal_private * priv, t_u8 wait_option);
+/** Set WPA enable */
+mlan_status woal_set_wpa_enable(moal_private * priv, t_u8 wait_option,
+                                t_u32 enable);
+/** Get WPA state */
+mlan_status woal_get_wpa_enable(moal_private * priv, t_u8 wait_option,
+                                t_u32 * enable);
+/** Find best network to connect */
+mlan_status woal_find_best_network(moal_private * priv, t_u8 wait_option,
+                                   mlan_ssid_bssid * ssid_bssid);
+/** Set E-Supplicant mode */
+mlan_status woal_set_ewpa_mode(moal_private * priv, t_u8 wait_option,
+                               mlan_ssid_bssid * ssid_bssid);
+/** Set Ad-Hoc channel */
+mlan_status woal_change_adhoc_chan(moal_private * priv, int channel);
+
+#endif  /**STA_SUPPORT */
+
+mlan_status woal_set_wapi_enable(moal_private * priv, t_u8 wait_option,
+                                 t_u32 enable);
+
+/** Initialize priv */
+void woal_init_priv(moal_private * priv, t_u8 wait_option);
+/** Reset interface(s) */
+int woal_reset_intf(moal_private * priv, t_u8 wait_option, int all_intf);
+/** common ioctl for uap, station */
+int woal_custom_ie_ioctl(struct net_device *dev, struct ifreq *req);
+
+int woal_get_bss_type(struct net_device *dev, struct ifreq *req);
+int woal_host_command(moal_private * priv, struct iwreq *wrq);
+#if defined(WFD_SUPPORT)
+#if defined(STA_SUPPORT) && defined(UAP_SUPPORT)
+int woal_set_get_bss_role(moal_private * priv, struct iwreq *wrq);
+#endif
+#endif
+#if defined(WFD_SUPPORT) || defined(UAP_SUPPORT)
+/** hostcmd ioctl for uap, wifidirect */
+int woal_hostcmd_ioctl(struct net_device *dev, struct ifreq *req);
+#endif
+
+#ifdef CONFIG_PROC_FS
+/** Initialize proc fs */
+void woal_proc_init(moal_handle * handle);
+/** Clean up proc fs */
+void woal_proc_exit(moal_handle * handle);
+/** Create proc entry */
+void woal_create_proc_entry(moal_private * priv);
+/** Remove proc entry */
+void woal_proc_remove(moal_private * priv);
+/** string to number */
+int woal_string_to_number(char *s);
+#endif
+
+#ifdef PROC_DEBUG
+/** Create debug proc fs */
+void woal_debug_entry(moal_private * priv);
+/** Remove debug proc fs */
+void woal_debug_remove(moal_private * priv);
+#endif /* PROC_DEBUG */
+
+/** check pm info */
+mlan_status woal_get_pm_info(moal_private * priv, mlan_ds_ps_info * pm_info);
+
+/** Enter USB Suspend */
+int woal_enter_usb_suspend(moal_handle * handle);
+/** Exit from USB Suspend */
+int woal_exit_usb_suspend(moal_handle * handle);
+
+#ifdef REASSOCIATION
+int woal_reassociation_thread(void *data);
+void woal_reassoc_timer_func(void *context);
+#endif /* REASSOCIATION */
+
+t_void woal_main_work_queue(struct work_struct *work);
+
+int woal_hard_start_xmit(struct sk_buff *skb, struct net_device *dev);
+moal_private *woal_add_interface(moal_handle * handle, t_u8 bss_num,
+                                 t_u8 bss_type);
+void woal_remove_interface(moal_handle * handle, t_u8 bss_index);
+void woal_set_multicast_list(struct net_device *dev);
+mlan_status woal_request_fw(moal_handle * handle);
+
+int woal_11h_channel_check_ioctl(moal_private * priv);
+void woal_cancel_cac_block(moal_private * priv);
+
+#endif /* _MOAL_MAIN_H */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_priv.c linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_priv.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_priv.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_priv.c	2017-09-23 03:42:50.166674612 +0800
@@ -0,0 +1,6296 @@
+/** @file  moal_priv.c
+  *
+  * @brief This file contains standard ioctl functions
+  *
+  * Copyright (C) 2008-2011, Marvell International Ltd.
+  *
+  * This software file (the "File") is distributed by Marvell International
+  * Ltd. under the terms of the GNU General Public License Version 2, June 1991
+  * (the "License").  You may use, redistribute and/or modify this File in
+  * accordance with the terms and conditions of the License, a copy of which
+  * is available by writing to the Free Software Foundation, Inc.,
+  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
+  * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
+  *
+  * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
+  * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about
+  * this warranty disclaimer.
+  *
+  */
+
+/************************************************************************
+Change log:
+    10/30/2008: initial version
+************************************************************************/
+
+#include	"moal_main.h"
+
+/********************************************************
+                Local Variables
+********************************************************/
+/** Bands supported in Infra mode */
+static t_u8 SupportedInfraBand[] = {
+    BAND_B,
+    BAND_B | BAND_G, BAND_G,
+    BAND_GN, BAND_B | BAND_G | BAND_GN, BAND_G | BAND_GN,
+    BAND_A, BAND_B | BAND_A, BAND_B | BAND_G | BAND_A, BAND_G | BAND_A,
+    BAND_A | BAND_B | BAND_G | BAND_AN | BAND_GN,
+        BAND_A | BAND_G | BAND_AN | BAND_GN, BAND_A | BAND_AN,
+};
+
+/** Bands supported in Ad-Hoc mode */
+static t_u8 SupportedAdhocBand[] = {
+    BAND_B, BAND_B | BAND_G, BAND_G,
+    BAND_GN, BAND_B | BAND_G | BAND_GN, BAND_G | BAND_GN,
+    BAND_A,
+    BAND_AN, BAND_A | BAND_AN,
+};
+
+/********************************************************
+		Global Variables
+********************************************************/
+
+/** Macro for maximum size of scan response buffer */
+#define MAX_SCAN_RSP_BUF (16 * 1024)
+
+/********************************************************
+		Local Functions
+********************************************************/
+
+/** 
+ *  @brief Copy Rates
+ *   
+ *  @param dest    A pointer to destination buffer
+ *  @param pos     The position for copy
+ *  @param src     A pointer to source buffer
+ *  @param len     Length of the source buffer
+ *
+ *  @return        Number of rates copied 
+ */
+static inline int
+woal_copy_rates(t_u8 * dest, int pos, t_u8 * src, int len)
+{
+    int i;
+
+    for (i = 0; i < len && src[i]; i++, pos++) {
+        if (pos >= MLAN_SUPPORTED_RATES)
+            break;
+        dest[pos] = src[i];
+    }
+    return pos;
+}
+
+/**
+ *  @brief Performs warm reset
+ *
+ *  @param priv         A pointer to moal_private structure
+ *
+ *  @return             0/MLAN_STATUS_SUCCESS --success, otherwise fail  
+ */
+static int
+woal_warm_reset(moal_private * priv)
+{
+    int ret = 0;
+    int intf_num;
+    moal_handle *handle = priv->phandle;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_misc_cfg *misc = NULL;
+
+    ENTER();
+
+    if (handle->is_suspended && woal_exit_usb_suspend(handle)) {
+        PRINTM(MERROR, "Failed to resume the suspended device\n");
+        LEAVE();
+        return -EFAULT;
+    }
+
+    woal_cancel_cac_block(priv);
+
+    /* Reset all interfaces */
+    ret = woal_reset_intf(priv, MOAL_IOCTL_WAIT, MTRUE);
+
+    /* Initialize private structures */
+    for (intf_num = 0; intf_num < handle->priv_num; intf_num++)
+        woal_init_priv(handle->priv[intf_num], MOAL_IOCTL_WAIT);
+
+    /* Restart the firmware */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_misc_cfg));
+    if (req) {
+        misc = (mlan_ds_misc_cfg *) req->pbuf;
+        misc->sub_command = MLAN_OID_MISC_WARM_RESET;
+        req->req_id = MLAN_IOCTL_MISC_CFG;
+        req->action = MLAN_ACT_SET;
+        if (MLAN_STATUS_SUCCESS !=
+            woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+            ret = -EFAULT;
+            kfree(req);
+            goto done;
+        }
+        kfree(req);
+    }
+
+    /* Enable interfaces */
+    for (intf_num = 0; intf_num < handle->priv_num; intf_num++) {
+        netif_device_attach(handle->priv[intf_num]->netdev);
+        woal_start_queue(handle->priv[intf_num]->netdev);
+    }
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Get signal
+ *
+ *  @param priv         A pointer to moal_private structure
+ *  @param wrq	        A pointer to iwreq structure
+ *
+ *  @return 	  	0 --success, otherwise fail
+ */
+static int
+woal_get_signal(moal_private * priv, struct iwreq *wrq)
+{
+/** Input data size */
+#define IN_DATA_SIZE	2
+/** Output data size */
+#define OUT_DATA_SIZE	12
+    int ret = 0;
+    int in_data[IN_DATA_SIZE];
+    int out_data[OUT_DATA_SIZE];
+    mlan_ds_get_signal signal;
+    int data_length = 0;
+    int buflen = 0;
+
+    ENTER();
+
+    memset(in_data, 0, sizeof(in_data));
+    memset(out_data, 0, sizeof(out_data));
+    buflen = MIN(wrq->u.data.length, IN_DATA_SIZE);
+
+    if (priv->media_connected == MFALSE) {
+        PRINTM(MERROR, "Can not get RSSI in disconnected state\n");
+        ret = -ENOTSUPP;
+        goto done;
+    }
+
+    if (wrq->u.data.length) {
+        if (sizeof(int) * wrq->u.data.length > sizeof(in_data)) {
+            PRINTM(MERROR, "Too many arguments\n");
+            ret = -EINVAL;
+            goto done;
+        }
+        if (copy_from_user(in_data, wrq->u.data.pointer, sizeof(int) * buflen)) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+    }
+
+    switch (wrq->u.data.length) {
+    case 0:                    /* No checking, get everything */
+        break;
+    case 2:                    /* Check subtype range */
+        if (in_data[1] < 1 || in_data[1] > 4) {
+            ret = -EINVAL;
+            goto done;
+        }
+        /* Fall through */
+    case 1:                    /* Check type range */
+        if (in_data[0] < 1 || in_data[0] > 3) {
+            ret = -EINVAL;
+            goto done;
+        }
+        break;
+    default:
+        ret = -EINVAL;
+        goto done;
+    }
+
+    memset(&signal, 0, sizeof(mlan_ds_get_signal));
+    if (MLAN_STATUS_SUCCESS !=
+        woal_get_signal_info(priv, MOAL_IOCTL_WAIT, &signal)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    PRINTM(MINFO, "RSSI Beacon Last   : %d\n", (int) signal.bcn_rssi_last);
+    PRINTM(MINFO, "RSSI Beacon Average: %d\n", (int) signal.bcn_rssi_avg);
+    PRINTM(MINFO, "RSSI Data Last     : %d\n", (int) signal.data_rssi_last);
+    PRINTM(MINFO, "RSSI Data Average  : %d\n", (int) signal.data_rssi_avg);
+    PRINTM(MINFO, "SNR Beacon Last    : %d\n", (int) signal.bcn_snr_last);
+    PRINTM(MINFO, "SNR Beacon Average : %d\n", (int) signal.bcn_snr_avg);
+    PRINTM(MINFO, "SNR Data Last      : %d\n", (int) signal.data_snr_last);
+    PRINTM(MINFO, "SNR Data Average   : %d\n", (int) signal.data_snr_avg);
+    PRINTM(MINFO, "NF Beacon Last     : %d\n", (int) signal.bcn_nf_last);
+    PRINTM(MINFO, "NF Beacon Average  : %d\n", (int) signal.bcn_nf_avg);
+    PRINTM(MINFO, "NF Data Last       : %d\n", (int) signal.data_nf_last);
+    PRINTM(MINFO, "NF Data Average    : %d\n", (int) signal.data_nf_avg);
+
+    /* Check type */
+    switch (in_data[0]) {
+    case 0:                    /* Send everything */
+        out_data[data_length++] = signal.bcn_rssi_last;
+        out_data[data_length++] = signal.bcn_rssi_avg;
+        out_data[data_length++] = signal.data_rssi_last;
+        out_data[data_length++] = signal.data_rssi_avg;
+        out_data[data_length++] = signal.bcn_snr_last;
+        out_data[data_length++] = signal.bcn_snr_avg;
+        out_data[data_length++] = signal.data_snr_last;
+        out_data[data_length++] = signal.data_snr_avg;
+        out_data[data_length++] = signal.bcn_nf_last;
+        out_data[data_length++] = signal.bcn_nf_avg;
+        out_data[data_length++] = signal.data_nf_last;
+        out_data[data_length++] = signal.data_nf_avg;
+        break;
+    case 1:                    /* RSSI */
+        /* Check subtype */
+        switch (in_data[1]) {
+        case 0:                /* Everything */
+            out_data[data_length++] = signal.bcn_rssi_last;
+            out_data[data_length++] = signal.bcn_rssi_avg;
+            out_data[data_length++] = signal.data_rssi_last;
+            out_data[data_length++] = signal.data_rssi_avg;
+            break;
+        case 1:                /* bcn last */
+            out_data[data_length++] = signal.bcn_rssi_last;
+            break;
+        case 2:                /* bcn avg */
+            out_data[data_length++] = signal.bcn_rssi_avg;
+            break;
+        case 3:                /* data last */
+            out_data[data_length++] = signal.data_rssi_last;
+            break;
+        case 4:                /* data avg */
+            out_data[data_length++] = signal.data_rssi_avg;
+            break;
+        default:
+            break;
+        }
+        break;
+    case 2:                    /* SNR */
+        /* Check subtype */
+        switch (in_data[1]) {
+        case 0:                /* Everything */
+            out_data[data_length++] = signal.bcn_snr_last;
+            out_data[data_length++] = signal.bcn_snr_avg;
+            out_data[data_length++] = signal.data_snr_last;
+            out_data[data_length++] = signal.data_snr_avg;
+            break;
+        case 1:                /* bcn last */
+            out_data[data_length++] = signal.bcn_snr_last;
+            break;
+        case 2:                /* bcn avg */
+            out_data[data_length++] = signal.bcn_snr_avg;
+            break;
+        case 3:                /* data last */
+            out_data[data_length++] = signal.data_snr_last;
+            break;
+        case 4:                /* data avg */
+            out_data[data_length++] = signal.data_snr_avg;
+            break;
+        default:
+            break;
+        }
+        break;
+    case 3:                    /* NF */
+        /* Check subtype */
+        switch (in_data[1]) {
+        case 0:                /* Everything */
+            out_data[data_length++] = signal.bcn_nf_last;
+            out_data[data_length++] = signal.bcn_nf_avg;
+            out_data[data_length++] = signal.data_nf_last;
+            out_data[data_length++] = signal.data_nf_avg;
+            break;
+        case 1:                /* bcn last */
+            out_data[data_length++] = signal.bcn_nf_last;
+            break;
+        case 2:                /* bcn avg */
+            out_data[data_length++] = signal.bcn_nf_avg;
+            break;
+        case 3:                /* data last */
+            out_data[data_length++] = signal.data_nf_last;
+            break;
+        case 4:                /* data avg */
+            out_data[data_length++] = signal.data_nf_avg;
+            break;
+        default:
+            break;
+        }
+        break;
+    default:
+        break;
+    }
+
+    wrq->u.data.length = data_length;
+    if (copy_to_user(wrq->u.data.pointer, out_data,
+                     wrq->u.data.length * sizeof(out_data[0]))) {
+        PRINTM(MERROR, "Copy to user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+  done:
+    LEAVE();
+    return ret;
+}
+
+/** Heart Beat Config Input: No change */
+#define HB_NO_CHANGE         -1
+/** Heart Beat Config Input: Debug */
+#define HB_DEBUG             -2
+/** Heart Beat Config Input: Maximum value */
+#define HB_MAX_VALUE         0xFFFE
+/** Heart Beat Config Input: Minimum value */
+#define HB_MIN_VALUE         10
+
+/**
+ *  @brief Enable/disable Heart beat feature
+ *
+ *  @param priv         A pointer to moal_private structure
+ *  @param wrq	        A pointer to iwreq structure
+ *
+ *  @return 	  	0 --success, otherwise fail
+ */
+static int
+woal_heart_beat_ioctl(moal_private * priv, struct iwreq *wrq)
+{
+    int user_data_len;
+    int data[2];
+    int ret = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_misc_cfg *misc = NULL;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_misc_cfg));
+    if (req == NULL) {
+        LEAVE();
+        return -ENOMEM;
+    }
+    misc = (mlan_ds_misc_cfg *) req->pbuf;
+    misc->sub_command = MLAN_OID_MISC_HEART_BEAT;
+    req->req_id = MLAN_IOCTL_MISC_CFG;
+
+    user_data_len = wrq->u.data.length;
+    if (!user_data_len) {
+        req->action = MLAN_ACT_GET;
+    } else if (user_data_len == 3) {
+        if (copy_from_user
+            (data, wrq->u.data.pointer, sizeof(int) * user_data_len)) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        if (data[0] < HB_DEBUG || data[0] > HB_MAX_VALUE ||
+            data[1] < HB_DEBUG || data[1] > HB_MAX_VALUE) {
+            ret = -EINVAL;
+            goto done;
+        }
+        if ((data[0] > 0 && data[0] < HB_MIN_VALUE) ||
+            (data[1] > 0 && data[1] < HB_MIN_VALUE)) {
+            PRINTM(MERROR,
+                   "The minimum time interval of heart beat is 10 (1s)\n");
+            ret = -EINVAL;
+            goto done;
+        }
+
+        req->action = MLAN_ACT_SET;
+
+        misc->param.heart_beat.h2d_timer = data[0];
+        if (!data[0])
+            misc->param.heart_beat.h2d_timer = HB_CFG_DISABLE;
+        else if (data[0] == HB_NO_CHANGE || data[0] == HB_DEBUG)
+            misc->param.heart_beat.h2d_timer = HB_CFG_NO_CHANGE;
+        if (data[0] == HB_DEBUG)
+            misc->param.heart_beat.debug_for_host = MTRUE;
+        misc->param.heart_beat.d2h_timer = data[1];
+        if (!data[1] || data[1] == HB_DEBUG)
+            misc->param.heart_beat.d2h_timer = HB_CFG_DISABLE;
+        else if (data[1] == HB_NO_CHANGE)
+            misc->param.heart_beat.d2h_timer = HB_CFG_NO_CHANGE;
+        if (data[1] == HB_DEBUG)
+            misc->param.heart_beat.debug_for_device = MTRUE;
+        misc->param.heart_beat.reconnect_delay = data[2];
+
+        /* Remember the settings */
+        if (misc->param.heart_beat.h2d_timer == HB_CFG_DISABLE)
+            priv->is_h2d_active = MFALSE;
+        else if (misc->param.heart_beat.h2d_timer != HB_CFG_NO_CHANGE)
+            priv->is_h2d_active = MTRUE;
+        if (misc->param.heart_beat.d2h_timer == HB_CFG_DISABLE)
+            priv->is_d2h_active = MFALSE;
+        else if (misc->param.heart_beat.d2h_timer != HB_CFG_NO_CHANGE)
+            priv->is_d2h_active = MTRUE;
+    } else {
+        PRINTM(MERROR, "Invalid number of args!\n");
+        ret = -EINVAL;
+        goto done;
+    }
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    data[0] = misc->param.heart_beat.h2d_timer;
+    data[1] = misc->param.heart_beat.d2h_timer;
+    data[2] = misc->param.heart_beat.reconnect_delay;
+    wrq->u.data.length = 2;
+    if (copy_to_user
+        (wrq->u.data.pointer, data, sizeof(int) * wrq->u.data.length)) {
+        PRINTM(MERROR, "Copy to user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+  done:
+    if (req)
+        kfree(req);
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set/Get Usr 11n configuration request
+ *
+ *  @param priv     Pointer to the moal_private driver data struct
+ *  @param wrq	    A pointer to iwreq structure
+ *
+ *  @return          0 --success, otherwise fail
+ */
+static int
+woal_11n_htcap_cfg(moal_private * priv, struct iwreq *wrq)
+{
+    int data;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_11n_cfg *cfg_11n = NULL;
+    int ret = 0;
+
+    ENTER();
+
+    if (wrq->u.data.length > 1) {
+        PRINTM(MERROR, "Invalid number of arguments\n");
+        ret = -EINVAL;
+        goto done;
+    }
+
+    if (((req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_11n_cfg))) == NULL)) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    cfg_11n = (mlan_ds_11n_cfg *) req->pbuf;
+    cfg_11n->sub_command = MLAN_OID_11N_HTCAP_CFG;
+    req->req_id = MLAN_IOCTL_11N_CFG;
+
+    if (wrq->u.data.length == 0) {
+        /* Get 11n tx parameters from MLAN */
+        req->action = MLAN_ACT_GET;
+    } else if (wrq->u.data.length == 1) {
+        if (copy_from_user(&data, wrq->u.data.pointer, sizeof(int))) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+
+        cfg_11n->param.htcap_cfg = data;
+        PRINTM(MINFO, "SET: htusrcap:0x%x\n", data);
+        /* Update 11n tx parameters in MLAN */
+        req->action = MLAN_ACT_SET;
+    }
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    data = cfg_11n->param.htcap_cfg;
+    PRINTM(MINFO, "GET: httxcap:0x%x\n", data);
+
+    if (copy_to_user(wrq->u.data.pointer, &data, sizeof(data))) {
+        PRINTM(MERROR, "Copy to user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+    wrq->u.data.length = 1;
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Enable/Disable amsdu_aggr_ctrl
+ *
+ *  @param priv     Pointer to the moal_private driver data struct
+ *  @param wrq	    A pointer to iwreq structure
+ *
+ *  @return          0 --success, otherwise fail
+ */
+static int
+woal_11n_amsdu_aggr_ctrl(moal_private * priv, struct iwreq *wrq)
+{
+    int data[2];
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_11n_cfg *cfg_11n = NULL;
+    int ret = 0;
+
+    ENTER();
+
+    if ((wrq->u.data.length != 0) && (wrq->u.data.length != 1)) {
+        PRINTM(MERROR, "Invalid number of arguments\n");
+        ret = -EINVAL;
+        goto done;
+    }
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_11n_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    cfg_11n = (mlan_ds_11n_cfg *) req->pbuf;
+    cfg_11n->sub_command = MLAN_OID_11N_CFG_AMSDU_AGGR_CTRL;
+    req->req_id = MLAN_IOCTL_11N_CFG;
+
+    if (wrq->u.data.length == 0) {
+        /* Get 11n tx parameters from MLAN */
+        req->action = MLAN_ACT_GET;
+    } else if (wrq->u.data.length == 1) {
+        if (copy_from_user(data, wrq->u.data.pointer,
+                           wrq->u.data.length * sizeof(int))) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        cfg_11n->param.amsdu_aggr_ctrl.enable = data[0];
+        /* Update 11n tx parameters in MLAN */
+        req->action = MLAN_ACT_SET;
+    }
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    data[0] = cfg_11n->param.amsdu_aggr_ctrl.enable;
+    data[1] = cfg_11n->param.amsdu_aggr_ctrl.curr_buf_size;
+
+    if (copy_to_user(wrq->u.data.pointer, data, sizeof(data))) {
+        PRINTM(MERROR, "Copy to user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    wrq->u.data.length = 2;
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set/Get 11n configuration request
+ *
+ *  @param priv     Pointer to the moal_private driver data struct
+ *  @param wrq	    A pointer to iwreq structure
+ *
+ *  @return          0 --success, otherwise fail
+ */
+static int
+woal_11n_tx_cfg(moal_private * priv, struct iwreq *wrq)
+{
+    int data;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_11n_cfg *cfg_11n = NULL;
+    int ret = 0;
+
+    ENTER();
+
+    if ((wrq->u.data.length != 0) && (wrq->u.data.length != 1)) {
+        PRINTM(MERROR, "Invalid number of arguments\n");
+        ret = -EINVAL;
+        goto done;
+    }
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_11n_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    cfg_11n = (mlan_ds_11n_cfg *) req->pbuf;
+    cfg_11n->sub_command = MLAN_OID_11N_CFG_TX;
+    req->req_id = MLAN_IOCTL_11N_CFG;
+
+    if (wrq->u.data.length == 0) {
+        /* Get 11n tx parameters from MLAN */
+        req->action = MLAN_ACT_GET;
+    } else if (wrq->u.data.length == 1) {
+        if (copy_from_user(&data, wrq->u.data.pointer, sizeof(data))) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        cfg_11n->param.tx_cfg.httxcap = data;
+        PRINTM(MINFO, "SET: httxcap:%d\n", data);
+        /* Update 11n tx parameters in MLAN */
+        req->action = MLAN_ACT_SET;
+    }
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    data = cfg_11n->param.tx_cfg.httxcap;
+    PRINTM(MINFO, "GET: httxcap:%d\n", data);
+    if (copy_to_user(wrq->u.data.pointer, &data, sizeof(data))) {
+        PRINTM(MERROR, "Copy to user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    wrq->u.data.length = 1;
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Enable/Disable TX Aggregation
+ *
+ *  @param priv     Pointer to the moal_private driver data struct
+ *  @param wrq	    A pointer to iwreq structure
+ *
+ *  @return          0 --success, otherwise fail
+ */
+static int
+woal_11n_prio_tbl(moal_private * priv, struct iwreq *wrq)
+{
+    int data[MAX_NUM_TID * 2], i, j;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_11n_cfg *cfg_11n = NULL;
+    int ret = 0;
+
+    ENTER();
+
+    if ((wrq->u.data.pointer == NULL)) {
+        LEAVE();
+        return -EINVAL;
+    }
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_11n_cfg));
+    if (req == NULL) {
+        LEAVE();
+        return -ENOMEM;
+    }
+    cfg_11n = (mlan_ds_11n_cfg *) req->pbuf;
+    cfg_11n->sub_command = MLAN_OID_11N_CFG_AGGR_PRIO_TBL;
+    req->req_id = MLAN_IOCTL_11N_CFG;
+
+    if (wrq->u.data.length == 0) {
+        /* Get aggr priority table from MLAN */
+        req->action = MLAN_ACT_GET;
+        if (MLAN_STATUS_SUCCESS !=
+            woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+            ret = -EFAULT;
+            goto error;
+        }
+        wrq->u.data.length = MAX_NUM_TID * 2;
+        for (i = 0, j = 0; i < (wrq->u.data.length); i = i + 2, ++j) {
+            data[i] = cfg_11n->param.aggr_prio_tbl.ampdu[j];
+            data[i + 1] = cfg_11n->param.aggr_prio_tbl.amsdu[j];
+        }
+
+        if (copy_to_user(wrq->u.data.pointer, data,
+                         sizeof(int) * wrq->u.data.length)) {
+            PRINTM(MERROR, "Copy to user failed\n");
+            ret = -EFAULT;
+            goto error;
+        }
+    } else if (wrq->u.data.length == 16) {
+        if (copy_from_user(data, wrq->u.data.pointer,
+                           sizeof(int) * wrq->u.data.length)) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto error;
+        }
+        for (i = 0, j = 0; i < (wrq->u.data.length); i = i + 2, ++j) {
+            if ((data[i] > 7 && data[i] != 0xff) ||
+                (data[i + 1] > 7 && data[i + 1] != 0xff)) {
+                PRINTM(MERROR, "Invalid priority, valid value 0-7 or 0xff.\n");
+                ret = -EFAULT;
+                goto error;
+            }
+            cfg_11n->param.aggr_prio_tbl.ampdu[j] = data[i];
+            cfg_11n->param.aggr_prio_tbl.amsdu[j] = data[i + 1];
+        }
+
+        /* Update aggr priority table in MLAN */
+        req->action = MLAN_ACT_SET;
+        if (MLAN_STATUS_SUCCESS !=
+            woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+            ret = -EFAULT;
+            goto error;
+        }
+    } else {
+        PRINTM(MERROR, "Invalid number of arguments\n");
+        ret = -EINVAL;
+        goto error;
+    }
+
+  error:
+    if (req)
+        kfree(req);
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set/Get add BA Reject parameters
+ *
+ *  @param priv     Pointer to the moal_private driver data struct
+ *  @param wrq	    A pointer to iwreq structure
+ *
+ *  @return          0 --success, otherwise fail
+ */
+static int
+woal_addba_reject(moal_private * priv, struct iwreq *wrq)
+{
+    int data[MAX_NUM_TID], ret = 0, i;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_11n_cfg *cfg_11n = NULL;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_11n_cfg));
+    if (req == NULL) {
+        LEAVE();
+        return -ENOMEM;
+    }
+    cfg_11n = (mlan_ds_11n_cfg *) req->pbuf;
+    cfg_11n->sub_command = MLAN_OID_11N_CFG_ADDBA_REJECT;
+    req->req_id = MLAN_IOCTL_11N_CFG;
+
+    if (wrq->u.data.length == 0) {
+        PRINTM(MERROR, "Addba reject moal\n");
+        /* Get aggr priority table from MLAN */
+        req->action = MLAN_ACT_GET;
+        if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req,
+                                                      MOAL_IOCTL_WAIT)) {
+            ret = -EFAULT;
+            goto error;
+        }
+
+        wrq->u.data.length = MAX_NUM_TID;
+        for (i = 0; i < (wrq->u.data.length); ++i) {
+            data[i] = cfg_11n->param.addba_reject[i];
+        }
+
+        if (copy_to_user(wrq->u.data.pointer, data,
+                         sizeof(int) * wrq->u.data.length)) {
+            PRINTM(MERROR, "Copy to user failed\n");
+            ret = -EFAULT;
+            goto error;
+        }
+    } else if (wrq->u.data.length == 8) {
+        if (copy_from_user(data, wrq->u.data.pointer,
+                           sizeof(int) * wrq->u.data.length)) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto error;
+        }
+        for (i = 0; i < (wrq->u.data.length); ++i) {
+            if (data[i] != 0 && data[i] != 1) {
+                PRINTM(MERROR, "addba reject only takes argument as 0 or 1\n");
+                ret = -EFAULT;
+                goto error;
+            }
+            cfg_11n->param.addba_reject[i] = data[i];
+        }
+
+        /* Update aggr priority table in MLAN */
+        req->action = MLAN_ACT_SET;
+        if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req,
+                                                      MOAL_IOCTL_WAIT)) {
+            ret = -EFAULT;
+            goto error;
+        }
+    } else {
+        PRINTM(MERROR, "Invalid number of arguments\n");
+        ret = -EINVAL;
+        goto error;
+    }
+  error:
+    if (req)
+        kfree(req);
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set/Get add BA parameters
+ *
+ *  @param priv     Pointer to the moal_private driver data struct
+ *  @param wrq	    A pointer to iwreq structure
+ *
+ *  @return          0 --success, otherwise fail
+ */
+static int
+woal_addba_para_updt(moal_private * priv, struct iwreq *wrq)
+{
+    int data[5], ret = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_11n_cfg *cfg_11n = NULL;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_11n_cfg));
+    if (req == NULL) {
+        LEAVE();
+        return -ENOMEM;
+    }
+    cfg_11n = (mlan_ds_11n_cfg *) req->pbuf;
+    cfg_11n->sub_command = MLAN_OID_11N_CFG_ADDBA_PARAM;
+    req->req_id = MLAN_IOCTL_11N_CFG;
+
+    if (wrq->u.data.length == 0) {
+        /* Get Add BA parameters from MLAN */
+        req->action = MLAN_ACT_GET;
+        if (MLAN_STATUS_SUCCESS !=
+            woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+            ret = -EFAULT;
+            goto error;
+        }
+        data[0] = cfg_11n->param.addba_param.timeout;
+        data[1] = cfg_11n->param.addba_param.txwinsize;
+        data[2] = cfg_11n->param.addba_param.rxwinsize;
+        PRINTM(MINFO, "GET: timeout:%d txwinsize:%d rxwinsize:%d\n", data[0],
+               data[1], data[2]);
+        wrq->u.data.length = 3;
+        if (copy_to_user(wrq->u.data.pointer, data,
+                         wrq->u.data.length * sizeof(int))) {
+            PRINTM(MERROR, "Copy to user failed\n");
+            ret = -EFAULT;
+            goto error;
+        }
+    } else if (wrq->u.data.length == 3) {
+        if (copy_from_user
+            (data, wrq->u.data.pointer, wrq->u.data.length * sizeof(int))) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto error;
+        }
+        if (data[0] < 0 || data[0] > MLAN_DEFAULT_BLOCK_ACK_TIMEOUT) {
+            PRINTM(MERROR, "Incorrect addba timeout value.\n");
+            ret = -EFAULT;
+            goto error;
+        }
+        if (data[1] <= 0 || data[1] > MLAN_AMPDU_MAX_TXWINSIZE || data[2] <= 0
+            || data[2] > MLAN_AMPDU_MAX_RXWINSIZE) {
+            PRINTM(MERROR, "Incorrect Tx/Rx window size.\n");
+            ret = -EFAULT;
+            goto error;
+        }
+        cfg_11n->param.addba_param.timeout = data[0];
+        cfg_11n->param.addba_param.txwinsize = data[1];
+        cfg_11n->param.addba_param.rxwinsize = data[2];
+        PRINTM(MINFO, "SET: timeout:%d txwinsize:%d rxwinsize:%d\n", data[0],
+               data[1], data[2]);
+        /* Update Add BA parameters in MLAN */
+        req->action = MLAN_ACT_SET;
+        if (MLAN_STATUS_SUCCESS !=
+            woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+            ret = MLAN_STATUS_FAILURE;
+            goto error;
+        }
+    } else {
+        PRINTM(MERROR, "Invalid number of arguments\n");
+        ret = -EINVAL;
+        goto error;
+    }
+
+  error:
+    if (req)
+        kfree(req);
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set/Get Transmit buffer size
+ *
+ *  @param priv     Pointer to the moal_private driver data struct
+ *  @param wrq	    A pointer to iwreq structure
+ *
+ *  @return          0 --success, otherwise fail
+ */
+static int
+woal_txbuf_cfg(moal_private * priv, struct iwreq *wrq)
+{
+    int buf_size;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_11n_cfg *cfg_11n = NULL;
+    int ret = 0;
+
+    ENTER();
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_11n_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    cfg_11n = (mlan_ds_11n_cfg *) req->pbuf;
+    cfg_11n->sub_command = MLAN_OID_11N_CFG_MAX_TX_BUF_SIZE;
+    req->req_id = MLAN_IOCTL_11N_CFG;
+
+    if (wrq->u.data.length == 0) {
+        /* Get Tx buffer size from MLAN */
+        req->action = MLAN_ACT_GET;
+    } else {
+        ret = -EINVAL;
+        PRINTM(MERROR,
+               "Don't support set Tx buffer size after driver loaded!\n");
+        goto done;
+    }
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    buf_size = cfg_11n->param.tx_buf_size;
+    if (copy_to_user(wrq->u.data.pointer, &buf_size, sizeof(buf_size))) {
+        PRINTM(MERROR, "Copy to user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    wrq->u.data.length = 1;
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set/Get Host Sleep configuration
+ *
+ *  @param priv             A pointer to moal_private structure
+ *  @param wrq	            A pointer to iwreq structure
+ *  @param invoke_hostcmd	MTRUE --invoke HostCmd, otherwise MFALSE
+ *
+ *  @return             0 --success, otherwise fail
+ */
+static int
+woal_hs_cfg(moal_private * priv, struct iwreq *wrq, BOOLEAN invoke_hostcmd)
+{
+    int data[3];
+    int ret = 0;
+    mlan_ds_hs_cfg hscfg;
+    t_u16 action;
+    mlan_bss_info bss_info;
+    int data_length = wrq->u.data.length;
+
+    ENTER();
+
+    memset(data, 0, sizeof(data));
+    memset(&hscfg, 0, sizeof(mlan_ds_hs_cfg));
+
+    if (data_length == 0) {
+        action = MLAN_ACT_GET;
+    } else {
+        action = MLAN_ACT_SET;
+        if (data_length >= 1 && data_length <= 3) {
+            if (copy_from_user
+                (data, wrq->u.data.pointer, sizeof(int) * data_length)) {
+                PRINTM(MERROR, "Copy from user failed\n");
+                ret = -EFAULT;
+                goto done;
+            }
+        } else {
+            PRINTM(MERROR, "Invalid arguments\n");
+            ret = -EINVAL;
+            goto done;
+        }
+    }
+
+    /* HS config is blocked if HS is already activated */
+    if (data_length &&
+        (data[0] != HOST_SLEEP_CFG_CANCEL || invoke_hostcmd == MFALSE)) {
+        memset(&bss_info, 0, sizeof(bss_info));
+        woal_get_bss_info(priv, MOAL_IOCTL_WAIT, &bss_info);
+        if (bss_info.is_hs_configured) {
+            PRINTM(MERROR, "HS already configured\n");
+            ret = -EFAULT;
+            goto done;
+        }
+    }
+
+    /* Do a GET first if some arguments are not provided */
+    if (data_length >= 1 && data_length < 3) {
+        woal_set_get_hs_params(priv, MLAN_ACT_GET, MOAL_IOCTL_WAIT, &hscfg);
+    }
+
+    if (data_length)
+        hscfg.conditions = data[0];
+    if (data_length >= 2)
+        hscfg.gpio = data[1];
+    if (data_length == 3)
+        hscfg.gap = data[2];
+
+    if ((invoke_hostcmd == MTRUE) && (action == MLAN_ACT_SET)) {
+        /* Need to issue an extra IOCTL first to set up parameters */
+        hscfg.is_invoke_hostcmd = MFALSE;
+        if (MLAN_STATUS_SUCCESS !=
+            woal_set_get_hs_params(priv, MLAN_ACT_SET, MOAL_IOCTL_WAIT,
+                                   &hscfg)) {
+            ret = -EFAULT;
+            goto done;
+        }
+    }
+    hscfg.is_invoke_hostcmd = invoke_hostcmd;
+    if (MLAN_STATUS_SUCCESS !=
+        woal_set_get_hs_params(priv, action, MOAL_IOCTL_WAIT, &hscfg)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    if (action == MLAN_ACT_GET) {
+        data[0] = hscfg.conditions;
+        data[1] = hscfg.gpio;
+        data[2] = hscfg.gap;
+        wrq->u.data.length = 3;
+        if (copy_to_user
+            (wrq->u.data.pointer, data, sizeof(int) * wrq->u.data.length)) {
+            PRINTM(MERROR, "Copy to user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+    }
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set Host Sleep parameters
+ *
+ *  @param priv         A pointer to moal_private structure
+ *  @param wrq	        A pointer to iwreq structure
+ *
+ *  @return             0 --success, otherwise fail
+ */
+static int
+woal_hs_setpara(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0;
+    int data_length = wrq->u.data.length;
+
+    ENTER();
+
+    if (data_length >= 1 && data_length <= 3) {
+        ret = woal_hs_cfg(priv, wrq, MFALSE);
+        goto done;
+    } else {
+        PRINTM(MERROR, "Invalid arguments\n");
+        ret = -EINVAL;
+        goto done;
+    }
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Get/Set inactivity timeout extend
+ *
+ *  @param priv         A pointer to moal_private structure
+ *  @param wrq	        A pointer to iwreq structure
+ *
+ *  @return             0 --success, otherwise fail
+ */
+static int
+woal_inactivity_timeout_ext(moal_private * priv, struct iwreq *wrq)
+{
+    int data[4];
+    int ret = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_pm_cfg *pmcfg = NULL;
+    pmlan_ds_inactivity_to inac_to = NULL;
+    int data_length = wrq->u.data.length;
+
+    ENTER();
+
+    memset(data, 0, sizeof(data));
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_pm_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    pmcfg = (mlan_ds_pm_cfg *) req->pbuf;
+    inac_to = &pmcfg->param.inactivity_to;
+    pmcfg->sub_command = MLAN_OID_PM_CFG_INACTIVITY_TO;
+    req->req_id = MLAN_IOCTL_PM_CFG;
+
+    if ((data_length != 0 && data_length != 3 && data_length != 4) ||
+        sizeof(int) * data_length > sizeof(data)) {
+        PRINTM(MERROR, "Invalid number of parameters\n");
+        ret = -EINVAL;
+        goto done;
+    }
+
+    req->action = MLAN_ACT_GET;
+    if (data_length) {
+        if (copy_from_user
+            (data, wrq->u.data.pointer, sizeof(int) * data_length)) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        req->action = MLAN_ACT_SET;
+        inac_to->timeout_unit = data[0];
+        inac_to->unicast_timeout = data[1];
+        inac_to->mcast_timeout = data[2];
+        inac_to->ps_entry_timeout = data[3];
+    }
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    /* Copy back current values regardless of GET/SET */
+    data[0] = inac_to->timeout_unit;
+    data[1] = inac_to->unicast_timeout;
+    data[2] = inac_to->mcast_timeout;
+    data[3] = inac_to->ps_entry_timeout;
+
+    if (req->action == MLAN_ACT_GET) {
+        wrq->u.data.length = 4;
+        if (copy_to_user
+            (wrq->u.data.pointer, data, wrq->u.data.length * sizeof(int))) {
+            PRINTM(MERROR, "Copy to user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+    }
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set/Get system clock
+ *
+ *  @param priv         A pointer to moal_private structure
+ *  @param wrq	        A pointer to iwreq structure
+ *
+ *  @return             0 --success, otherwise fail
+ */
+static int
+woal_ecl_sys_clock(moal_private * priv, struct iwreq *wrq)
+{
+    int data[64];
+    int ret = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_misc_cfg *cfg = NULL;
+    int data_length = wrq->u.data.length;
+    int i = 0;
+
+    ENTER();
+
+    memset(data, 0, sizeof(data));
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_misc_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    cfg = (mlan_ds_misc_cfg *) req->pbuf;
+    cfg->sub_command = MLAN_OID_MISC_SYS_CLOCK;
+    req->req_id = MLAN_IOCTL_MISC_CFG;
+
+    if (!data_length)
+        req->action = MLAN_ACT_GET;
+    else if (data_length <= MLAN_MAX_CLK_NUM) {
+        req->action = MLAN_ACT_SET;
+        if (copy_from_user
+            (data, wrq->u.data.pointer, sizeof(int) * data_length)) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+    } else {
+        PRINTM(MERROR, "Invalid arguments\n");
+        ret = -EINVAL;
+        goto done;
+    }
+
+    if (req->action == MLAN_ACT_GET) {
+        /* Get configurable clocks */
+        cfg->param.sys_clock.sys_clk_type = MLAN_CLK_CONFIGURABLE;
+        if (MLAN_STATUS_SUCCESS !=
+            woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+            ret = -EFAULT;
+            goto done;
+        }
+
+        /* Current system clock */
+        data[0] = (int) cfg->param.sys_clock.cur_sys_clk;
+        wrq->u.data.length = 1;
+
+        data_length = MIN(cfg->param.sys_clock.sys_clk_num, MLAN_MAX_CLK_NUM);
+
+        /* Configurable clocks */
+        for (i = 0; i < data_length; i++) {
+            data[i + wrq->u.data.length] =
+                (int) cfg->param.sys_clock.sys_clk[i];
+        }
+        wrq->u.data.length += data_length;
+
+        /* Get supported clocks */
+        cfg->param.sys_clock.sys_clk_type = MLAN_CLK_SUPPORTED;
+        if (MLAN_STATUS_SUCCESS !=
+            woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+            ret = -EFAULT;
+            goto done;
+        }
+
+        data_length = MIN(cfg->param.sys_clock.sys_clk_num, MLAN_MAX_CLK_NUM);
+
+        /* Supported clocks */
+        for (i = 0; i < data_length; i++) {
+            data[i + wrq->u.data.length] =
+                (int) cfg->param.sys_clock.sys_clk[i];
+        }
+
+        wrq->u.data.length += data_length;
+
+        if (copy_to_user
+            (wrq->u.data.pointer, data, sizeof(int) * wrq->u.data.length)) {
+            PRINTM(MERROR, "Copy to user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+    } else {
+        /* Set configurable clocks */
+        cfg->param.sys_clock.sys_clk_type = MLAN_CLK_CONFIGURABLE;
+        cfg->param.sys_clock.sys_clk_num = MIN(MLAN_MAX_CLK_NUM, data_length);
+        for (i = 0; i < cfg->param.sys_clock.sys_clk_num; i++) {
+            cfg->param.sys_clock.sys_clk[i] = (t_u16) data[i];
+        }
+
+        if (MLAN_STATUS_SUCCESS !=
+            woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+            ret = -EFAULT;
+            goto done;
+        }
+    }
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set/Get Band and Adhoc-band setting
+ *
+ *  @param priv         A pointer to moal_private structure
+ *  @param wrq	        A pointer to iwreq structure
+ *
+ *  @return             0 --success, otherwise fail
+ */
+static int
+woal_band_cfg(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0;
+    unsigned int i;
+    int data[4];
+    int user_data_len = wrq->u.data.length;
+    t_u32 infra_band = 0;
+    t_u32 adhoc_band = 0;
+    t_u32 adhoc_channel = 0;
+    t_u32 sec_chan_offset = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_radio_cfg *radio_cfg = NULL;
+
+    ENTER();
+
+    if (sizeof(int) * user_data_len > sizeof(data)) {
+        PRINTM(MERROR, "Too many arguments\n");
+        LEAVE();
+        return -EINVAL;
+    }
+
+    if (user_data_len > 0) {
+        if (priv->media_connected == MTRUE) {
+            LEAVE();
+            return -EOPNOTSUPP;
+        }
+    }
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_radio_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto error;
+    }
+    radio_cfg = (mlan_ds_radio_cfg *) req->pbuf;
+    radio_cfg->sub_command = MLAN_OID_BAND_CFG;
+    req->req_id = MLAN_IOCTL_RADIO_CFG;
+
+    if (wrq->u.data.length == 0) {
+        /* Get config_bands, adhoc_start_band and adhoc_channel values from
+           MLAN */
+        req->action = MLAN_ACT_GET;
+        if (MLAN_STATUS_SUCCESS !=
+            woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+            ret = -EFAULT;
+            goto error;
+        }
+        data[0] = radio_cfg->param.band_cfg.config_bands;       /* Infra Band */
+        data[1] = radio_cfg->param.band_cfg.adhoc_start_band;   /* Adhoc Band */
+        data[2] = radio_cfg->param.band_cfg.adhoc_channel;      /* Adhoc
+                                                                   Channel */
+        wrq->u.data.length = 3;
+        if (radio_cfg->param.band_cfg.adhoc_start_band & BAND_GN
+            || radio_cfg->param.band_cfg.adhoc_start_band & BAND_AN) {
+            data[3] = radio_cfg->param.band_cfg.sec_chan_offset;        /* secondary 
+                                                                           offset 
+                                                                         */
+            wrq->u.data.length = 4;
+        }
+
+        if (copy_to_user
+            (wrq->u.data.pointer, data, sizeof(int) * wrq->u.data.length)) {
+            ret = -EFAULT;
+            goto error;
+        }
+    } else {
+        if (copy_from_user
+            (data, wrq->u.data.pointer, sizeof(int) * user_data_len)) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto error;
+        }
+
+        /* To support only <b/bg/bgn/n> */
+        infra_band = data[0];
+        for (i = 0; i < sizeof(SupportedInfraBand); i++)
+            if (infra_band == SupportedInfraBand[i])
+                break;
+        if (i == sizeof(SupportedInfraBand)) {
+            ret = -EINVAL;
+            goto error;
+        }
+
+        /* Set Adhoc band */
+        if (user_data_len >= 2) {
+            adhoc_band = data[1];
+            for (i = 0; i < sizeof(SupportedAdhocBand); i++)
+                if (adhoc_band == SupportedAdhocBand[i])
+                    break;
+            if (i == sizeof(SupportedAdhocBand)) {
+                ret = -EINVAL;
+                goto error;
+            }
+        }
+
+        /* Set Adhoc channel */
+        if (user_data_len >= 3) {
+            adhoc_channel = data[2];
+            if (adhoc_channel == 0) {
+                /* Check if specified adhoc channel is non-zero */
+                ret = -EINVAL;
+                goto error;
+            }
+        }
+        if (user_data_len == 4) {
+            if (!(adhoc_band & (BAND_GN | BAND_AN))) {
+                PRINTM(MERROR,
+                       "11n is not enabled for adhoc, can not set secondary channel offset\n");
+                ret = -EINVAL;
+                goto error;
+            }
+            sec_chan_offset = data[3];
+            if ((sec_chan_offset != NO_SEC_CHANNEL) &&
+                (sec_chan_offset != SEC_CHANNEL_ABOVE) &&
+                (sec_chan_offset != SEC_CHANNEL_BELOW)) {
+                PRINTM(MERROR,
+                       "Invalid secondary channel offset, only allowed 0, 1 or 3\n");
+                ret = -EINVAL;
+                goto error;
+            }
+        }
+        /* Set config_bands and adhoc_start_band values to MLAN */
+        req->action = MLAN_ACT_SET;
+        radio_cfg->param.band_cfg.config_bands = infra_band;
+        radio_cfg->param.band_cfg.adhoc_start_band = adhoc_band;
+        radio_cfg->param.band_cfg.adhoc_channel = adhoc_channel;
+        radio_cfg->param.band_cfg.sec_chan_offset = sec_chan_offset;
+        if (MLAN_STATUS_SUCCESS !=
+            woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+            ret = -EFAULT;
+            goto error;
+        }
+    }
+
+  error:
+    if (req)
+        kfree(req);
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Read/Write adapter registers value 
+ *
+ *  @param priv         A pointer to moal_private structure
+ *  @param wrq	        A pointer to iwreq structure
+ *
+ *  @return             0 --success, otherwise fail
+ */
+static int
+woal_reg_read_write(moal_private * priv, struct iwreq *wrq)
+{
+    int data[3];
+    int ret = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_reg_mem *reg = NULL;
+    int data_length = wrq->u.data.length;
+
+    ENTER();
+
+    memset(data, 0, sizeof(data));
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_reg_mem));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    reg = (mlan_ds_reg_mem *) req->pbuf;
+    reg->sub_command = MLAN_OID_REG_RW;
+    req->req_id = MLAN_IOCTL_REG_MEM;
+
+    if (data_length == 2) {
+        req->action = MLAN_ACT_GET;
+    } else if (data_length == 3) {
+        req->action = MLAN_ACT_SET;
+    } else {
+        ret = -EINVAL;
+        goto done;
+    }
+    if (copy_from_user(data, wrq->u.data.pointer, sizeof(int) * data_length)) {
+        PRINTM(MERROR, "Copy from user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    reg->param.reg_rw.type = (t_u32) data[0];
+    reg->param.reg_rw.offset = (t_u32) data[1];
+    if (data_length == 3)
+        reg->param.reg_rw.value = (t_u32) data[2];
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    if (req->action == MLAN_ACT_GET) {
+        if (copy_to_user
+            (wrq->u.data.pointer, &reg->param.reg_rw.value, sizeof(int))) {
+            PRINTM(MERROR, "Copy to user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        wrq->u.data.length = 1;
+    }
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Read the EEPROM contents of the card 
+ *
+ *  @param priv         A pointer to moal_private structure
+ *  @param wrq	        A pointer to iwreq structure
+ *
+ *  @return             0 --success, otherwise fail
+ */
+static int
+woal_read_eeprom(moal_private * priv, struct iwreq *wrq)
+{
+    int data[2];
+    int ret = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_reg_mem *reg = NULL;
+    int data_length = wrq->u.data.length;
+
+    ENTER();
+
+    memset(data, 0, sizeof(data));
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_reg_mem));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    reg = (mlan_ds_reg_mem *) req->pbuf;
+    reg->sub_command = MLAN_OID_EEPROM_RD;
+    req->req_id = MLAN_IOCTL_REG_MEM;
+
+    if (data_length == 2) {
+        req->action = MLAN_ACT_GET;
+    } else {
+        ret = -EINVAL;
+        goto done;
+    }
+    if (copy_from_user(data, wrq->u.data.pointer, sizeof(int) * data_length)) {
+        PRINTM(MERROR, "Copy from user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+    reg->param.rd_eeprom.offset = (t_u16) data[0];
+    reg->param.rd_eeprom.byte_count = (t_u16) data[1];
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    if (req->action == MLAN_ACT_GET) {
+        wrq->u.data.length = reg->param.rd_eeprom.byte_count;
+        if (copy_to_user
+            (wrq->u.data.pointer, reg->param.rd_eeprom.value,
+             wrq->u.data.length)) {
+            PRINTM(MERROR, "Copy to user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+    }
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Read/Write device memory value 
+ *
+ *  @param priv         A pointer to moal_private structure
+ *  @param wrq	        A pointer to iwreq structure
+ *
+ *  @return             0 --success, otherwise fail
+ */
+static int
+woal_mem_read_write(moal_private * priv, struct iwreq *wrq)
+{
+    t_u32 data[2];
+    int ret = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_reg_mem *reg_mem = NULL;
+    int data_length = wrq->u.data.length;
+
+    ENTER();
+
+    memset(data, 0, sizeof(data));
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_reg_mem));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    reg_mem = (mlan_ds_reg_mem *) req->pbuf;
+    reg_mem->sub_command = MLAN_OID_MEM_RW;
+    req->req_id = MLAN_IOCTL_REG_MEM;
+
+    if (data_length == 1) {
+        PRINTM(MINFO, "MEM_RW: GET\n");
+        req->action = MLAN_ACT_GET;
+    } else if (data_length == 2) {
+        PRINTM(MINFO, "MEM_RW: SET\n");
+        req->action = MLAN_ACT_SET;
+    } else {
+        ret = -EINVAL;
+        goto done;
+    }
+    if (copy_from_user(data, wrq->u.data.pointer, sizeof(int) * data_length)) {
+        PRINTM(MERROR, "Copy from user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+    reg_mem->param.mem_rw.addr = (t_u32) data[0];
+    if (data_length == 2)
+        reg_mem->param.mem_rw.value = (t_u32) data[1];
+
+    PRINTM(MINFO, "MEM_RW: Addr=0x%x, Value=0x%x\n",
+           (int) reg_mem->param.mem_rw.addr, (int) reg_mem->param.mem_rw.value);
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    if (req->action == MLAN_ACT_GET) {
+        if (copy_to_user
+            (wrq->u.data.pointer, &reg_mem->param.mem_rw.value, sizeof(int))) {
+            PRINTM(MERROR, "Copy to user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        wrq->u.data.length = 1;
+    }
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Get LOG
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param wrq			A pointer to iwreq structure
+ *
+ *  @return 	   	 	0 --success, otherwise fail
+ */
+static int
+woal_get_log(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0;
+    mlan_ds_get_stats stats;
+    char *buf = NULL;
+
+    ENTER();
+
+    PRINTM(MINFO, " GET STATS\n");
+    if (!(buf = kmalloc(GETLOG_BUFSIZE, GFP_KERNEL))) {
+        PRINTM(MERROR, "kmalloc failed!\n");
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    memset(&stats, 0, sizeof(mlan_ds_get_stats));
+    if (MLAN_STATUS_SUCCESS !=
+        woal_get_stats_info(priv, MOAL_IOCTL_WAIT, &stats)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    if (wrq->u.data.pointer) {
+        sprintf(buf, "\n"
+                "mcasttxframe     %lu\n"
+                "failed           %lu\n"
+                "retry            %lu\n"
+                "multiretry       %lu\n"
+                "framedup         %lu\n"
+                "rtssuccess       %lu\n"
+                "rtsfailure       %lu\n"
+                "ackfailure       %lu\n"
+                "rxfrag           %lu\n"
+                "mcastrxframe     %lu\n"
+                "fcserror         %lu\n"
+                "txframe          %lu\n"
+                "wepicverrcnt-1   %lu\n"
+                "wepicverrcnt-2   %lu\n"
+                "wepicverrcnt-3   %lu\n"
+                "wepicverrcnt-4   %lu\n",
+                stats.mcast_tx_frame,
+                stats.failed,
+                stats.retry,
+                stats.multi_retry,
+                stats.frame_dup,
+                stats.rts_success,
+                stats.rts_failure,
+                stats.ack_failure,
+                stats.rx_frag,
+                stats.mcast_rx_frame,
+                stats.fcs_error,
+                stats.tx_frame,
+                stats.wep_icv_error[0],
+                stats.wep_icv_error[1],
+                stats.wep_icv_error[2], stats.wep_icv_error[3]);
+        wrq->u.data.length = strlen(buf) + 1;
+        if (copy_to_user(wrq->u.data.pointer, buf, wrq->u.data.length)) {
+            PRINTM(MERROR, "Copy to user failed\n");
+            ret = -EFAULT;
+        }
+    }
+  done:
+    if (buf)
+        kfree(buf);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Deauthenticate
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param wrq			A pointer to iwreq structure
+ *
+ *  @return 	   	 	0 --success, otherwise fail
+ */
+static int
+woal_deauth(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0;
+    struct sockaddr saddr;
+
+    ENTER();
+    if (wrq->u.data.length) {
+        /* Deauth mentioned BSSID */
+        if (copy_from_user(&saddr, wrq->u.data.pointer, sizeof(saddr))) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        if (MLAN_STATUS_SUCCESS !=
+            woal_disconnect(priv, MOAL_IOCTL_WAIT, (t_u8 *) saddr.sa_data)) {
+            ret = -EFAULT;
+            goto done;
+        }
+    } else {
+        if (MLAN_STATUS_SUCCESS != woal_disconnect(priv, MOAL_IOCTL_WAIT, NULL))
+            ret = -EFAULT;
+    }
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set/Get TX power configurations
+ *  
+ *  @param priv     A pointer to moal_private structure
+ *  @param wrq      A pointer to iwreq structure
+ *  
+ *  @return         0 --success, otherwise fail
+ */
+static int
+woal_tx_power_cfg(moal_private * priv, struct iwreq *wrq)
+{
+    int data[5], user_data_len;
+    int ret = 0;
+    mlan_bss_info bss_info;
+    mlan_ds_power_cfg *pcfg = NULL;
+    mlan_ioctl_req *req = NULL;
+    ENTER();
+
+    memset(&bss_info, 0, sizeof(bss_info));
+    woal_get_bss_info(priv, MOAL_IOCTL_WAIT, &bss_info);
+
+    memset(data, 0, sizeof(data));
+    user_data_len = wrq->u.data.length;
+
+    if (user_data_len) {
+        if (sizeof(int) * user_data_len > sizeof(data)) {
+            PRINTM(MERROR, "Too many arguments\n");
+            ret = -EINVAL;
+            goto done;
+        }
+        if (copy_from_user
+            (data, wrq->u.data.pointer, sizeof(int) * user_data_len)) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        switch (user_data_len) {
+        case 1:
+            if (data[0] != 0xFF)
+                ret = -EINVAL;
+            break;
+        case 2:
+        case 4:
+            if (data[0] == 0xFF) {
+                ret = -EINVAL;
+                break;
+            }
+            if ((unsigned int) data[1] < bss_info.min_power_level) {
+                PRINTM(MERROR,
+                       "The set powercfg rate value %d dBm is out of range (%d dBm-%d dBm)!\n",
+                       data[1], (int) bss_info.min_power_level,
+                       (int) bss_info.max_power_level);
+                ret = -EINVAL;
+                break;
+            }
+            if (user_data_len == 4) {
+                if (data[1] > data[2]) {
+                    PRINTM(MERROR, "Min power should be less than maximum!\n");
+                    ret = -EINVAL;
+                    break;
+                }
+                if (data[3] < 0) {
+                    PRINTM(MERROR, "Step should not less than 0!\n");
+                    ret = -EINVAL;
+                    break;
+                }
+                if ((unsigned int) data[2] > bss_info.max_power_level) {
+                    PRINTM(MERROR,
+                           "The set powercfg rate value %d dBm is out of range (%d dBm-%d dBm)!\n",
+                           data[2], (int) bss_info.min_power_level,
+                           (int) bss_info.max_power_level);
+                    ret = -EINVAL;
+                    break;
+                }
+                if (data[3] > data[2] - data[1]) {
+                    PRINTM(MERROR,
+                           "Step should not greater than power difference!\n");
+                    ret = -EINVAL;
+                    break;
+                }
+            }
+            break;
+        default:
+            ret = -EINVAL;
+            break;
+        }
+        if (ret)
+            goto done;
+    }
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_power_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    pcfg = (mlan_ds_power_cfg *) req->pbuf;
+    pcfg->sub_command = MLAN_OID_POWER_CFG_EXT;
+    req->req_id = MLAN_IOCTL_POWER_CFG;
+    if (!user_data_len)
+        req->action = MLAN_ACT_GET;
+    else {
+        req->action = MLAN_ACT_SET;
+        pcfg->param.power_ext.len = user_data_len;
+        memcpy((t_u8 *) & pcfg->param.power_ext.power_data, (t_u8 *) data,
+               sizeof(data));
+    }
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    if (!user_data_len) {
+        if (copy_to_user
+            (wrq->u.data.pointer, (t_u8 *) & pcfg->param.power_ext.power_data,
+             sizeof(int) * pcfg->param.power_ext.len)) {
+            ret = -EFAULT;
+            goto done;
+        }
+        wrq->u.data.length = pcfg->param.power_ext.len;
+    }
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Get Tx/Rx data rates
+ *  
+ *  @param priv     A pointer to moal_private structure
+ *  @param wrq      A pointer to iwreq structure
+ *  
+ *  @return         0 --success, otherwise fail
+ */
+static int
+woal_get_txrx_rate(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0;
+    mlan_ds_rate *rate = NULL;
+    mlan_ioctl_req *req = NULL;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_rate));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    rate = (mlan_ds_rate *) req->pbuf;
+    rate->sub_command = MLAN_OID_GET_DATA_RATE;
+    req->req_id = MLAN_IOCTL_RATE;
+    req->action = MLAN_ACT_GET;
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    if (copy_to_user
+        (wrq->u.data.pointer, (t_u8 *) & rate->param.data_rate,
+         sizeof(int) * 2)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    wrq->u.data.length = 2;
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set/Get beacon interval
+ *  
+ *  @param priv     A pointer to moal_private structure
+ *  @param wrq      A pointer to iwreq structure
+ *  
+ *  @return         0 --success, otherwise fail
+ */
+static int
+woal_beacon_interval(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0;
+    mlan_ds_bss *bss = NULL;
+    mlan_ioctl_req *req = NULL;
+    int bcn = 0;
+
+    ENTER();
+
+    if (wrq->u.data.length) {
+        if (copy_from_user(&bcn, wrq->u.data.pointer, sizeof(int))) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        if ((bcn < MLAN_MIN_BEACON_INTERVAL) ||
+            (bcn > MLAN_MAX_BEACON_INTERVAL)) {
+            ret = -EINVAL;
+            goto done;
+        }
+    }
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_bss));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    bss = (mlan_ds_bss *) req->pbuf;
+    bss->sub_command = MLAN_OID_IBSS_BCN_INTERVAL;
+    req->req_id = MLAN_IOCTL_BSS;
+    if (!wrq->u.data.length)
+        req->action = MLAN_ACT_GET;
+    else {
+        req->action = MLAN_ACT_SET;
+        bss->param.bcn_interval = bcn;
+    }
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    if (copy_to_user
+        (wrq->u.data.pointer, (t_u8 *) & bss->param.bcn_interval,
+         sizeof(int))) {
+        ret = -EFAULT;
+        goto done;
+    }
+    wrq->u.data.length = 1;
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ * @brief Set/Get TX data rate
+ * 
+ * @param priv     A pointer to moal_private structure
+ * @param wrq      A pointer to iwreq structure
+ * 
+ * @return           0 --success, otherwise fail
+ */
+static int
+woal_set_get_txrate(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0;
+    mlan_ds_rate *rate = NULL;
+    mlan_ioctl_req *req = NULL;
+    int rateindex = 0;
+
+    ENTER();
+    if (wrq->u.data.length) {
+        if (copy_from_user(&rateindex, wrq->u.data.pointer, sizeof(int))) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+    }
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_rate));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    rate = (mlan_ds_rate *) req->pbuf;
+    rate->param.rate_cfg.rate_type = MLAN_RATE_INDEX;
+    rate->sub_command = MLAN_OID_RATE_CFG;
+    req->req_id = MLAN_IOCTL_RATE;
+    if (!wrq->u.data.length)
+        req->action = MLAN_ACT_GET;
+    else {
+        req->action = MLAN_ACT_SET;
+        if (rateindex == AUTO_RATE)
+            rate->param.rate_cfg.is_rate_auto = 1;
+        else {
+            if ((rateindex != MLAN_RATE_INDEX_MCS32) &&
+                ((rateindex < 0) || (rateindex > MLAN_RATE_INDEX_MCS7))) {
+                ret = -EINVAL;
+                goto done;
+            }
+        }
+        rate->param.rate_cfg.rate = rateindex;
+    }
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    } else {
+        if (wrq->u.data.length)
+            priv->rate_index = rateindex;
+    }
+    if (!wrq->u.data.length) {
+        if (rate->param.rate_cfg.is_rate_auto)
+            rateindex = AUTO_RATE;
+        else
+            rateindex = rate->param.rate_cfg.rate;
+        wrq->u.data.length = 1;
+        if (copy_to_user(wrq->u.data.pointer, &rateindex, sizeof(int))) {
+            ret = -EFAULT;
+        }
+    }
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ * @brief Set/Get region code
+ * 
+ * @param priv     A pointer to moal_private structure
+ * @param wrq      A pointer to iwreq structure
+ * 
+ * @return           0 --success, otherwise fail
+ */
+static int
+woal_set_get_regioncode(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0;
+    mlan_ds_misc_cfg *cfg = NULL;
+    mlan_ioctl_req *req = NULL;
+    int region = 0;
+
+    ENTER();
+
+    if (wrq->u.data.length) {
+        if (copy_from_user(&region, wrq->u.data.pointer, sizeof(int))) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+    }
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_misc_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    cfg = (mlan_ds_misc_cfg *) req->pbuf;
+    cfg->sub_command = MLAN_OID_MISC_REGION;
+    req->req_id = MLAN_IOCTL_MISC_CFG;
+    if (!wrq->u.data.length)
+        req->action = MLAN_ACT_GET;
+    else {
+        req->action = MLAN_ACT_SET;
+        cfg->param.region_code = region;
+    }
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    if (!wrq->u.data.length) {
+        wrq->u.data.length = 1;
+        if (copy_to_user
+            (wrq->u.data.pointer, &cfg->param.region_code, sizeof(int)))
+            ret = -EFAULT;
+    }
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ * @brief Set/Get radio
+ * 
+ * @param priv     A pointer to moal_private structure
+ * @param wrq      A pointer to iwreq structure
+ * 
+ * @return           0 --success, otherwise fail
+ */
+static int
+woal_set_get_radio(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0;
+    mlan_bss_info bss_info;
+    int option = 0;
+
+    ENTER();
+
+    memset(&bss_info, 0, sizeof(bss_info));
+
+    if (wrq->u.data.length) {
+        /* Set radio */
+        if (copy_from_user(&option, wrq->u.data.pointer, sizeof(int))) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        if (MLAN_STATUS_SUCCESS != woal_set_radio(priv, (t_u8) option))
+            ret = -EFAULT;
+    } else {
+        /* Get radio status */
+        woal_get_bss_info(priv, MOAL_IOCTL_WAIT, &bss_info);
+        wrq->u.data.length = 1;
+        if (copy_to_user
+            (wrq->u.data.pointer, &bss_info.radio_on,
+             sizeof(bss_info.radio_on))) {
+            PRINTM(MERROR, "Copy to user failed\n");
+            ret = -EFAULT;
+        }
+    }
+  done:
+    LEAVE();
+    return ret;
+}
+
+#ifdef DEBUG_LEVEL1
+/** 
+ *  @brief Get/Set the bit mask of driver debug message control
+ *
+ *  @param priv			A pointer to moal_private structure
+ *  @param wrq			A pointer to wrq structure
+ *
+ *  @return             0 --success, otherwise fail
+ */
+static int
+woal_drv_dbg(moal_private * priv, struct iwreq *wrq)
+{
+    int data[4];
+    int ret = 0;
+
+    ENTER();
+
+    if (!wrq->u.data.length) {
+        data[0] = drvdbg;
+        /* Return the current driver debug bit masks */
+        if (copy_to_user(wrq->u.data.pointer, data, sizeof(int))) {
+            PRINTM(MERROR, "Copy to user failed\n");
+            ret = -EFAULT;
+            goto drvdbgexit;
+        }
+        wrq->u.data.length = 1;
+    } else if (wrq->u.data.length < 3) {
+        /* Get the driver debug bit masks */
+        if (copy_from_user
+            (data, wrq->u.data.pointer, sizeof(int) * wrq->u.data.length)) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto drvdbgexit;
+        }
+        drvdbg = data[0];
+    } else {
+        PRINTM(MERROR, "Invalid parameter number\n");
+        goto drvdbgexit;
+    }
+
+    printk(KERN_ALERT "drvdbg = 0x%08lx\n", drvdbg);
+#ifdef DEBUG_LEVEL2
+    printk(KERN_ALERT "MINFO  (%08lx) %s\n", MINFO,
+           (drvdbg & MINFO) ? "X" : "");
+    printk(KERN_ALERT "MWARN  (%08lx) %s\n", MWARN,
+           (drvdbg & MWARN) ? "X" : "");
+    printk(KERN_ALERT "MENTRY (%08lx) %s\n", MENTRY,
+           (drvdbg & MENTRY) ? "X" : "");
+#endif
+    printk(KERN_ALERT "MIF_D  (%08lx) %s\n", MIF_D,
+           (drvdbg & MIF_D) ? "X" : "");
+    printk(KERN_ALERT "MFW_D  (%08lx) %s\n", MFW_D,
+           (drvdbg & MFW_D) ? "X" : "");
+    printk(KERN_ALERT "MEVT_D (%08lx) %s\n", MEVT_D,
+           (drvdbg & MEVT_D) ? "X" : "");
+    printk(KERN_ALERT "MCMD_D (%08lx) %s\n", MCMD_D,
+           (drvdbg & MCMD_D) ? "X" : "");
+    printk(KERN_ALERT "MDAT_D (%08lx) %s\n", MDAT_D,
+           (drvdbg & MDAT_D) ? "X" : "");
+    printk(KERN_ALERT "MIOCTL (%08lx) %s\n", MIOCTL,
+           (drvdbg & MIOCTL) ? "X" : "");
+    printk(KERN_ALERT "MINTR  (%08lx) %s\n", MINTR,
+           (drvdbg & MINTR) ? "X" : "");
+    printk(KERN_ALERT "MEVENT (%08lx) %s\n", MEVENT,
+           (drvdbg & MEVENT) ? "X" : "");
+    printk(KERN_ALERT "MCMND  (%08lx) %s\n", MCMND,
+           (drvdbg & MCMND) ? "X" : "");
+    printk(KERN_ALERT "MDATA  (%08lx) %s\n", MDATA,
+           (drvdbg & MDATA) ? "X" : "");
+    printk(KERN_ALERT "MERROR (%08lx) %s\n", MERROR,
+           (drvdbg & MERROR) ? "X" : "");
+    printk(KERN_ALERT "MFATAL (%08lx) %s\n", MFATAL,
+           (drvdbg & MFATAL) ? "X" : "");
+    printk(KERN_ALERT "MMSG   (%08lx) %s\n", MMSG, (drvdbg & MMSG) ? "X" : "");
+
+  drvdbgexit:
+    LEAVE();
+    return ret;
+}
+#endif /* DEBUG_LEVEL1 */
+
+/**
+ * @brief Set/Get Tx/Rx antenna
+ * 
+ * @param priv     A pointer to moal_private structure
+ * @param wrq      A pointer to iwreq structure
+ * 
+ * @return         0 --success, otherwise fail
+ */
+static int
+woal_set_get_tx_rx_ant(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0;
+    mlan_ds_radio_cfg *radio = NULL;
+    mlan_ioctl_req *req = NULL;
+    int data = 0;
+
+    ENTER();
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_radio_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    radio = (mlan_ds_radio_cfg *) req->pbuf;
+    radio->sub_command = MLAN_OID_ANT_CFG;
+    req->req_id = MLAN_IOCTL_RADIO_CFG;
+    if (wrq->u.data.length) {
+        if (copy_from_user(&data, wrq->u.data.pointer, sizeof(int))) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        req->action = MLAN_ACT_SET;
+        radio->param.antenna = data;
+    } else
+        req->action = MLAN_ACT_GET;
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    if (!wrq->u.data.length) {
+        data = radio->param.antenna;
+        if (copy_to_user(wrq->u.data.pointer, &data, sizeof(int))) {
+            ret = -EFAULT;
+            goto done;
+        }
+        wrq->u.data.length = 1;
+    }
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ * @brief Set/Get QoS configuration
+ * 
+ * @param priv     A pointer to moal_private structure
+ * @param wrq      A pointer to iwreq structure
+ * 
+ * @return         0 --success, otherwise fail
+ */
+static int
+woal_set_get_qos_cfg(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0;
+    mlan_ds_wmm_cfg *cfg = NULL;
+    mlan_ioctl_req *req = NULL;
+    int data = 0;
+
+    ENTER();
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_wmm_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    cfg = (mlan_ds_wmm_cfg *) req->pbuf;
+    cfg->sub_command = MLAN_OID_WMM_CFG_QOS;
+    req->req_id = MLAN_IOCTL_WMM_CFG;
+    if (wrq->u.data.length) {
+        if (copy_from_user(&data, wrq->u.data.pointer, sizeof(int))) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        req->action = MLAN_ACT_SET;
+        cfg->param.qos_cfg = (t_u8) data;
+    } else
+        req->action = MLAN_ACT_GET;
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    if (!wrq->u.data.length) {
+        data = (int) cfg->param.qos_cfg;
+        if (copy_to_user(wrq->u.data.pointer, &data, sizeof(int))) {
+            ret = -EFAULT;
+            goto done;
+        }
+        wrq->u.data.length = 1;
+    }
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ * @brief Set/Get WWS mode
+ * 
+ * @param priv     A pointer to moal_private structure
+ * @param wrq      A pointer to iwreq structure
+ * 
+ * @return         0 --success, otherwise fail
+ */
+static int
+woal_wws_cfg(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0;
+    mlan_ds_misc_cfg *wws = NULL;
+    mlan_ioctl_req *req = NULL;
+    int data = 0;
+
+    ENTER();
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_misc_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    wws = (mlan_ds_misc_cfg *) req->pbuf;
+    wws->sub_command = MLAN_OID_MISC_WWS;
+    req->req_id = MLAN_IOCTL_MISC_CFG;
+    if (wrq->u.data.length) {
+        if (copy_from_user(&data, wrq->u.data.pointer, sizeof(int))) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        if (data != CMD_DISABLED && data != CMD_ENABLED) {
+            ret = -EINVAL;
+            goto done;
+        }
+        req->action = MLAN_ACT_SET;
+        wws->param.wws_cfg = data;
+    } else
+        req->action = MLAN_ACT_GET;
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    if (!wrq->u.data.length) {
+        data = wws->param.wws_cfg;
+        if (copy_to_user(wrq->u.data.pointer, &data, sizeof(int))) {
+            ret = -EFAULT;
+            goto done;
+        }
+        wrq->u.data.length = 1;
+    }
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ * @brief Set/Get sleep period
+ * 
+ * @param priv     A pointer to moal_private structure
+ * @param wrq      A pointer to iwreq structure
+ * 
+ * @return         0 --success, otherwise fail
+ */
+static int
+woal_sleep_pd(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0;
+    mlan_ds_pm_cfg *pm_cfg = NULL;
+    mlan_ioctl_req *req = NULL;
+    int data = 0;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_pm_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    pm_cfg = (mlan_ds_pm_cfg *) req->pbuf;
+    pm_cfg->sub_command = MLAN_OID_PM_CFG_SLEEP_PD;
+    req->req_id = MLAN_IOCTL_PM_CFG;
+    if (wrq->u.data.length) {
+        if (copy_from_user(&data, wrq->u.data.pointer, sizeof(int))) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        if ((data <= MAX_SLEEP_PERIOD && data >= MIN_SLEEP_PERIOD) ||
+            (data == 0)
+            || (data == SLEEP_PERIOD_RESERVED_FF)
+            ) {
+            req->action = MLAN_ACT_SET;
+            pm_cfg->param.sleep_period = data;
+        } else {
+            ret = -EINVAL;
+            goto done;
+        }
+    } else
+        req->action = MLAN_ACT_GET;
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    if (!wrq->u.data.length) {
+        data = pm_cfg->param.sleep_period;
+        if (copy_to_user(wrq->u.data.pointer, &data, sizeof(int))) {
+            ret = -EFAULT;
+            goto done;
+        }
+        wrq->u.data.length = 1;
+    }
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ * @brief Configure sleep parameters
+ *
+ * @param priv         A pointer to moal_private structure
+ * @param req          A pointer to ifreq structure
+ *
+ * @return             0 --success, otherwise fail  
+ */
+static int
+woal_sleep_params_ioctl(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_pm_cfg *pm = NULL;
+    mlan_ds_sleep_params *psleep_params = NULL;
+    int data[6] = { 0 }, i;
+#ifdef DEBUG_LEVEL1
+    char err_str[][35] = { {"sleep clock error in ppm"},
+    {"wakeup offset in usec"},
+    {"clock stabilization time in usec"},
+    {"value of reserved for debug"}
+    };
+#endif
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_pm_cfg));
+    if (req == NULL) {
+        LEAVE();
+        return -ENOMEM;
+    }
+
+    pm = (mlan_ds_pm_cfg *) req->pbuf;
+    pm->sub_command = MLAN_OID_PM_CFG_SLEEP_PARAMS;
+    req->req_id = MLAN_IOCTL_PM_CFG;
+    psleep_params = (pmlan_ds_sleep_params) & pm->param.sleep_params;
+
+    if (wrq->u.data.length == 0) {
+        req->action = MLAN_ACT_GET;
+    } else if (wrq->u.data.length == 6) {
+        if (copy_from_user(data, wrq->u.data.pointer, sizeof(int) *
+                           wrq->u.data.length)) {
+            /* copy_from_user failed */
+            PRINTM(MERROR, "S_PARAMS: copy from user failed\n");
+            return -EINVAL;
+        }
+#define MIN_VAL 0x0000
+#define MAX_VAL 0xFFFF
+        for (i = 0; i < 6; i++) {
+            if ((i == 3) || (i == 4)) {
+                /* These two cases are handled below the loop */
+                continue;
+            }
+            if (data[i] < MIN_VAL || data[i] > MAX_VAL) {
+                PRINTM(MERROR, "Invalid %s (0-65535)!\n", err_str[i]);
+                ret = -EINVAL;
+                goto done;
+            }
+        }
+        if (data[3] < 0 || data[3] > 2) {
+            PRINTM(MERROR, "Invalid control periodic calibration (0-2)!\n");
+            ret = -EINVAL;
+            goto done;
+        }
+        if (data[4] < 0 || data[4] > 2) {
+            PRINTM(MERROR, "Invalid control of external sleep clock (0-2)!\n");
+            ret = -EINVAL;
+            goto done;
+        }
+        req->action = MLAN_ACT_SET;
+        psleep_params->error = data[0];
+        psleep_params->offset = data[1];
+        psleep_params->stable_time = data[2];
+        psleep_params->cal_control = data[3];
+        psleep_params->ext_sleep_clk = data[4];
+        psleep_params->reserved = data[5];
+    } else {
+        ret = -EINVAL;
+        goto done;
+    }
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    data[0] = psleep_params->error;
+    data[1] = psleep_params->offset;
+    data[2] = psleep_params->stable_time;
+    data[3] = psleep_params->cal_control;
+    data[4] = psleep_params->ext_sleep_clk;
+    data[5] = psleep_params->reserved;
+    wrq->u.data.length = 6;
+
+    if (copy_to_user(wrq->u.data.pointer, data, sizeof(int) *
+                     wrq->u.data.length)) {
+        PRINTM(MERROR, "QCONFIG: copy to user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+  done:
+    if (req)
+        kfree(req);
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/get user provisioned local power constraint
+ *     
+ *  @param priv     A pointer to moal_private structure
+ *  @param wrq      A pointer to iwreq structure
+ *  @return         0 --success, otherwise fail
+ */
+static int
+woal_set_get_11h_local_pwr_constraint(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0, data = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_11h_cfg *ds_11hcfg = NULL;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_11h_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    ds_11hcfg = (mlan_ds_11h_cfg *) req->pbuf;
+    if (wrq->u.data.length) {
+        if (copy_from_user(&data, wrq->u.data.pointer, sizeof(int))) {
+            PRINTM(MINFO, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        ds_11hcfg->param.usr_local_power_constraint = (t_s8) data;
+        req->action = MLAN_ACT_SET;
+    } else
+        req->action = MLAN_ACT_GET;
+
+    ds_11hcfg->sub_command = MLAN_OID_11H_LOCAL_POWER_CONSTRAINT;
+    req->req_id = MLAN_IOCTL_11H_CFG;
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    /* Copy response to user */
+    if (req->action == MLAN_ACT_GET) {
+        data = (int) ds_11hcfg->param.usr_local_power_constraint;
+        if (copy_to_user(wrq->u.data.pointer, &data, sizeof(int))) {
+            PRINTM(MINFO, "Copy to user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        wrq->u.data.length = 1;
+    }
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/get MAC control configuration
+ *
+ *  @param priv     A pointer to moal_private structure
+ *  @param wrq      A pointer to iwreq structure
+ *  @return         0 --success, otherwise fail
+ */
+static int
+woal_mac_control_ioctl(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0, data = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_misc_cfg *cfg = NULL;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_misc_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    cfg = (mlan_ds_misc_cfg *) req->pbuf;
+    if (wrq->u.data.length) {
+        if (copy_from_user(&data, wrq->u.data.pointer, sizeof(int))) {
+            PRINTM(MINFO, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        /* Validation will be done later */
+        cfg->param.mac_ctrl = data;
+        req->action = MLAN_ACT_SET;
+    } else
+        req->action = MLAN_ACT_GET;
+
+    cfg->sub_command = MLAN_OID_MISC_MAC_CONTROL;
+    req->req_id = MLAN_IOCTL_MISC_CFG;
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    /* Copy response to user */
+    data = (int) cfg->param.mac_ctrl;
+    if (copy_to_user(wrq->u.data.pointer, &data, sizeof(int))) {
+        PRINTM(MINFO, "Copy to user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    wrq->u.data.length = 1;
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Get thermal reading
+ *
+ *  @param priv     A pointer to moal_private structure
+ *  @param wrq      A pointer to iwreq structure
+ *  @return         0 --success, otherwise fail
+ */
+static int
+woal_thermal_ioctl(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0, data = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_misc_cfg *cfg = NULL;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_misc_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    cfg = (mlan_ds_misc_cfg *) req->pbuf;
+    if (wrq->u.data.length) {
+        PRINTM(MERROR, "Set is not supported for this command\n");
+        ret = -EINVAL;
+        goto done;
+    }
+    req->action = MLAN_ACT_GET;
+
+    cfg->sub_command = MLAN_OID_MISC_THERMAL;
+    req->req_id = MLAN_IOCTL_MISC_CFG;
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    /* Copy response to user */
+    data = (int) cfg->param.thermal;
+    if (copy_to_user(wrq->u.data.pointer, &data, sizeof(int))) {
+        PRINTM(MINFO, "Copy to user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    wrq->u.data.length = 1;
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+#if defined(REASSOCIATION)
+/**
+ * @brief Set/Get reassociation settings
+ * 
+ * @param priv     A pointer to moal_private structure
+ * @param wrq      A pointer to iwreq structure
+ * 
+ * @return         0 --success, otherwise fail
+ */
+static int
+woal_set_get_reassoc(moal_private * priv, struct iwreq *wrq)
+{
+    moal_handle *handle = priv->phandle;
+    int ret = 0;
+    int data = 0;
+
+    ENTER();
+
+    if (wrq->u.data.length) {
+        if (copy_from_user(&data, wrq->u.data.pointer, sizeof(int))) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        if (data == 0) {
+            handle->reassoc_on &= ~MBIT(priv->bss_index);
+            priv->reassoc_on = MFALSE;
+            priv->reassoc_required = MFALSE;
+            if (!handle->reassoc_on && handle->is_reassoc_timer_set == MTRUE) {
+                woal_cancel_timer(&handle->reassoc_timer);
+                handle->is_reassoc_timer_set = MFALSE;
+            }
+        } else {
+            handle->reassoc_on |= MBIT(priv->bss_index);
+            priv->reassoc_on = MTRUE;
+        }
+    } else {
+        data = (int) (priv->reassoc_on);
+        if (copy_to_user(wrq->u.data.pointer, &data, sizeof(int))) {
+            ret = -EFAULT;
+            goto done;
+        }
+        wrq->u.data.length = 1;
+    }
+
+  done:
+    LEAVE();
+    return ret;
+}
+#endif /* REASSOCIATION */
+
+/**
+ *  @brief implement WMM enable command
+ *
+ *  @param priv     Pointer to the moal_private driver data struct
+ *  @param wrq      Pointer to user data
+ *
+ *  @return          0 --success, otherwise fail
+ */
+static int
+woal_wmm_enable_ioctl(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0;
+    mlan_ds_wmm_cfg *wmm = NULL;
+    mlan_ioctl_req *req = NULL;
+    int data = 0;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_wmm_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    wmm = (mlan_ds_wmm_cfg *) req->pbuf;
+    req->req_id = MLAN_IOCTL_WMM_CFG;
+    wmm->sub_command = MLAN_OID_WMM_CFG_ENABLE;
+
+    if (wrq->u.data.length) {
+        /* Set WMM configuration */
+        if (copy_from_user(&data, wrq->u.data.pointer, sizeof(int))) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        if ((data < CMD_DISABLED) || (data > CMD_ENABLED)) {
+            ret = -EINVAL;
+            goto done;
+        }
+        req->action = MLAN_ACT_SET;
+        if (data == CMD_DISABLED)
+            wmm->param.wmm_enable = MFALSE;
+        else
+            wmm->param.wmm_enable = MTRUE;
+    } else {
+        /* Get WMM status */
+        req->action = MLAN_ACT_GET;
+    }
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    if (wrq->u.data.pointer) {
+        if (copy_to_user
+            (wrq->u.data.pointer, &wmm->param.wmm_enable,
+             sizeof(wmm->param.wmm_enable))) {
+            PRINTM(MERROR, "Copy to user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        wrq->u.data.length = 1;
+    }
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Implement 802.11D enable command
+ *
+ *  @param priv     Pointer to the moal_private driver data struct
+ *  @param wrq      Pointer to user data
+ *
+ *  @return         0 --success, otherwise fail
+ */
+static int
+woal_11d_enable_ioctl(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0;
+    mlan_ds_11d_cfg *pcfg_11d = NULL;
+    mlan_ioctl_req *req = NULL;
+    int data = 0;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_11d_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    pcfg_11d = (mlan_ds_11d_cfg *) req->pbuf;
+    req->req_id = MLAN_IOCTL_11D_CFG;
+    pcfg_11d->sub_command = MLAN_OID_11D_CFG_ENABLE;
+    if (wrq->u.data.length) {
+        /* Set 11D configuration */
+        if (copy_from_user(&data, wrq->u.data.pointer, sizeof(int))) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        if ((data < CMD_DISABLED) || (data > CMD_ENABLED)) {
+            ret = -EINVAL;
+            goto done;
+        }
+        if (data == CMD_DISABLED)
+            pcfg_11d->param.enable_11d = MFALSE;
+        else
+            pcfg_11d->param.enable_11d = MTRUE;
+        req->action = MLAN_ACT_SET;
+    } else {
+        req->action = MLAN_ACT_GET;
+    }
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    if (wrq->u.data.pointer) {
+        if (copy_to_user
+            (wrq->u.data.pointer, &pcfg_11d->param.enable_11d,
+             sizeof(pcfg_11d->param.enable_11d))) {
+            PRINTM(MERROR, "Copy to user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        wrq->u.data.length = 1;
+    }
+  done:
+    if (req)
+        kfree(req);
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Implement 802.11D clear chan table command
+ *
+ *  @param priv     Pointer to the moal_private driver data struct
+ *  @param wrq      Pointer to user data
+ *
+ *  @return         0 --success, otherwise fail
+ */
+static int
+woal_11d_clr_chan_table(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0;
+    mlan_ds_11d_cfg *pcfg_11d = NULL;
+    mlan_ioctl_req *req = NULL;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_11d_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    pcfg_11d = (mlan_ds_11d_cfg *) req->pbuf;
+    req->req_id = MLAN_IOCTL_11D_CFG;
+    pcfg_11d->sub_command = MLAN_OID_11D_CLR_CHAN_TABLE;
+    req->action = MLAN_ACT_SET;
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+  done:
+    if (req)
+        kfree(req);
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Control WPS Session Enable/Disable
+ *
+ *  @param priv     Pointer to the moal_private driver data struct
+ *  @param wrq      Pointer to user data
+ *
+ *  @return          0 --success, otherwise fail
+ */
+static int
+woal_wps_cfg_ioctl(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0;
+    mlan_ds_wps_cfg *pwps = NULL;
+    mlan_ioctl_req *req = NULL;
+    char buf[8];
+    struct iwreq *wreq = (struct iwreq *) wrq;
+
+    ENTER();
+
+    PRINTM(MINFO, "WOAL_WPS_SESSION\n");
+
+    memset(buf, 0, sizeof(buf));
+    if (copy_from_user(buf, wreq->u.data.pointer,
+                       MIN(sizeof(buf) - 1, wreq->u.data.length))) {
+        PRINTM(MERROR, "Copy from user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_wps_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    pwps = (mlan_ds_wps_cfg *) req->pbuf;
+    req->req_id = MLAN_IOCTL_WPS_CFG;
+    req->action = MLAN_ACT_SET;
+    pwps->sub_command = MLAN_OID_WPS_CFG_SESSION;
+    if (buf[0] == 1)
+        pwps->param.wps_session = MLAN_WPS_CFG_SESSION_START;
+    else
+        pwps->param.wps_session = MLAN_WPS_CFG_SESSION_END;
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set WPA passphrase and SSID
+ *
+ *  @param priv	    A pointer to moal_private structure
+ *  @param wrq	    A pointer to user data
+ *
+ *  @return          0 --success, otherwise fail
+ */
+static int
+woal_passphrase(moal_private * priv, struct iwreq *wrq)
+{
+    t_u16 len = 0;
+    static char buf[256];
+    char *begin, *end, *opt;
+    int ret = 0, action = -1, i;
+    mlan_ds_sec_cfg *sec = NULL;
+    mlan_ioctl_req *req = NULL;
+    t_u8 zero_mac[] = { 0, 0, 0, 0, 0, 0 };
+    t_u8 *mac = NULL;
+
+    ENTER();
+
+    if (!wrq->u.data.length || wrq->u.data.length > sizeof(buf)) {
+        PRINTM(MERROR, "Argument missing or too long for setpassphrase\n");
+        ret = -EINVAL;
+        goto done;
+    }
+
+    if (copy_from_user(buf, wrq->u.data.pointer, wrq->u.data.length)) {
+        PRINTM(MERROR, "Copy from user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    buf[wrq->u.data.length] = '\0';
+
+    /* Parse the buf to get the cmd_action */
+    begin = buf;
+    end = woal_strsep(&begin, ';', '/');
+    if (end)
+        action = woal_atox(end);
+    if (action < 0 || action > 2 || end[1] != '\0') {
+        PRINTM(MERROR, "Invalid action argument %s\n", end);
+        ret = -EINVAL;
+        goto done;
+    }
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_sec_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    sec = (mlan_ds_sec_cfg *) req->pbuf;
+    sec->sub_command = MLAN_OID_SEC_CFG_PASSPHRASE;
+    req->req_id = MLAN_IOCTL_SEC_CFG;
+    if (action == 0)
+        req->action = MLAN_ACT_GET;
+    else
+        req->action = MLAN_ACT_SET;
+    while (begin) {
+        end = woal_strsep(&begin, ';', '/');
+        opt = woal_strsep(&end, '=', '/');
+        if (!opt || !end || !end[0]) {
+            PRINTM(MERROR, "Invalid option\n");
+            ret = -EINVAL;
+            break;
+        } else if (!strnicmp(opt, "ssid", strlen(opt))) {
+            if (strlen(end) > MLAN_MAX_SSID_LENGTH) {
+                PRINTM(MERROR, "SSID length exceeds max length\n");
+                ret = -EFAULT;
+                break;
+            }
+            sec->param.passphrase.ssid.ssid_len = strlen(end);
+            strncpy((char *) sec->param.passphrase.ssid.ssid, end, strlen(end));
+            PRINTM(MINFO, "ssid=%s, len=%d\n", sec->param.passphrase.ssid.ssid,
+                   (int) sec->param.passphrase.ssid.ssid_len);
+        } else if (!strnicmp(opt, "bssid", strlen(opt))) {
+            woal_mac2u8((t_u8 *) & sec->param.passphrase.bssid, end);
+        } else if (!strnicmp(opt, "psk", strlen(opt)) &&
+                   req->action == MLAN_ACT_SET) {
+            if (strlen(end) != MLAN_PMK_HEXSTR_LENGTH) {
+                PRINTM(MERROR, "Invalid PMK length\n");
+                ret = -EINVAL;
+                break;
+            }
+            woal_ascii2hex((t_u8 *) (sec->param.passphrase.psk.pmk.pmk), end,
+                           MLAN_PMK_HEXSTR_LENGTH);
+            sec->param.passphrase.psk_type = MLAN_PSK_PMK;
+        } else if (!strnicmp(opt, "passphrase", strlen(opt)) &&
+                   req->action == MLAN_ACT_SET) {
+            if (strlen(end) < MLAN_MIN_PASSPHRASE_LENGTH ||
+                strlen(end) > MLAN_MAX_PASSPHRASE_LENGTH) {
+                PRINTM(MERROR, "Invalid length for passphrase\n");
+                ret = -EINVAL;
+                break;
+            }
+            sec->param.passphrase.psk_type = MLAN_PSK_PASSPHRASE;
+            strcpy(sec->param.passphrase.psk.passphrase.passphrase, end);
+            sec->param.passphrase.psk.passphrase.passphrase_len = strlen(end);
+            PRINTM(MINFO, "passphrase=%s, len=%d\n",
+                   sec->param.passphrase.psk.passphrase.passphrase,
+                   (int) sec->param.passphrase.psk.passphrase.passphrase_len);
+        } else {
+            PRINTM(MERROR, "Invalid option %s\n", opt);
+            ret = -EINVAL;
+            break;
+        }
+    }
+    if (ret)
+        goto done;
+
+    if (action == 2)
+        sec->param.passphrase.psk_type = MLAN_PSK_CLEAR;
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    if (action == 0) {
+        memset(buf, 0, sizeof(buf));
+        if (sec->param.passphrase.ssid.ssid_len) {
+            len += sprintf(buf + len, "ssid:");
+            memcpy(buf + len, sec->param.passphrase.ssid.ssid,
+                   sec->param.passphrase.ssid.ssid_len);
+            len += sec->param.passphrase.ssid.ssid_len;
+            len += sprintf(buf + len, " ");
+        }
+        if (memcmp(&sec->param.passphrase.bssid, zero_mac, sizeof(zero_mac))) {
+            mac = (t_u8 *) & sec->param.passphrase.bssid;
+            len += sprintf(buf + len, "bssid:");
+            for (i = 0; i < ETH_ALEN - 1; ++i)
+                len += sprintf(buf + len, "%02x:", mac[i]);
+            len += sprintf(buf + len, "%02x ", mac[i]);
+        }
+        if (sec->param.passphrase.psk_type == MLAN_PSK_PMK) {
+            len += sprintf(buf + len, "psk:");
+            for (i = 0; i < MLAN_MAX_KEY_LENGTH; ++i)
+                len +=
+                    sprintf(buf + len, "%02x",
+                            sec->param.passphrase.psk.pmk.pmk[i]);
+            len += sprintf(buf + len, "\n");
+        }
+        if (sec->param.passphrase.psk_type == MLAN_PSK_PASSPHRASE) {
+            len +=
+                sprintf(buf + len, "passphrase:%s \n",
+                        sec->param.passphrase.psk.passphrase.passphrase);
+        }
+        if (wrq->u.data.pointer) {
+            if (copy_to_user(wrq->u.data.pointer, buf, len)) {
+                PRINTM(MERROR, "Copy to user failed, len %d\n", len);
+                ret = -EFAULT;
+                goto done;
+            }
+            wrq->u.data.length = len;
+        }
+
+    }
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Get esupp mode
+ *  
+ *  @param priv     A pointer to moal_private structure
+ *  @param wrq      A pointer to iwreq structure
+ *  
+ *  @return         0 --success, otherwise fail
+ */
+static int
+woal_get_esupp_mode(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0;
+    mlan_ds_sec_cfg *sec = NULL;
+    mlan_ioctl_req *req = NULL;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_sec_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    sec = (mlan_ds_sec_cfg *) req->pbuf;
+    sec->sub_command = MLAN_OID_SEC_CFG_ESUPP_MODE;
+    req->req_id = MLAN_IOCTL_SEC_CFG;
+    req->action = MLAN_ACT_GET;
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    if (copy_to_user
+        (wrq->u.data.pointer, (t_u8 *) & sec->param.esupp_mode,
+         sizeof(int) * 3)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    wrq->u.data.length = 3;
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/** AES key length */
+#define AES_KEY_LEN 16
+/**
+ *  @brief Adhoc AES control 
+ *
+ *  @param priv	    A pointer to moal_private structure
+ *  @param wrq	    A pointer to user data
+ *
+ *  @return 	    0 --success, otherwise fail
+ */
+static int
+woal_adhoc_aes_ioctl(moal_private * priv, struct iwreq *wrq)
+{
+    static char buf[256];
+    int ret = 0, action = -1;
+    unsigned int i;
+    t_u8 key_ascii[32];
+    t_u8 key_hex[16];
+    t_u8 *tmp;
+    mlan_bss_info bss_info;
+    mlan_ds_sec_cfg *sec = NULL;
+    mlan_ioctl_req *req = NULL;
+    t_u8 bcast_addr[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
+
+    ENTER();
+
+    memset(key_ascii, 0x00, sizeof(key_ascii));
+    memset(key_hex, 0x00, sizeof(key_hex));
+
+    /* Get current BSS information */
+    memset(&bss_info, 0, sizeof(bss_info));
+    woal_get_bss_info(priv, MOAL_IOCTL_WAIT, &bss_info);
+    if (bss_info.bss_mode != MLAN_BSS_MODE_IBSS ||
+        bss_info.media_connected == MTRUE) {
+        PRINTM(MERROR, "STA is connected or not in IBSS mode.\n");
+        ret = -EOPNOTSUPP;
+        goto done;
+    }
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_sec_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    if (wrq->u.data.length) {
+        if (wrq->u.data.length > sizeof(buf)) {
+            PRINTM(MERROR, "Too many arguments\n");
+            ret = -EINVAL;
+            goto done;
+        }
+        if (copy_from_user(buf, wrq->u.data.pointer, wrq->u.data.length)) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        buf[wrq->u.data.length] = '\0';
+
+        if (wrq->u.data.length == 1) {
+            /* Get Adhoc AES Key */
+            req->req_id = MLAN_IOCTL_SEC_CFG;
+            req->action = MLAN_ACT_GET;
+            sec = (mlan_ds_sec_cfg *) req->pbuf;
+            sec->sub_command = MLAN_OID_SEC_CFG_ENCRYPT_KEY;
+            sec->param.encrypt_key.key_len = AES_KEY_LEN;
+            sec->param.encrypt_key.key_index = MLAN_KEY_INDEX_UNICAST;
+            if (MLAN_STATUS_SUCCESS !=
+                woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+                ret = -EFAULT;
+                goto done;
+            }
+
+            memcpy(key_hex, sec->param.encrypt_key.key_material,
+                   sizeof(key_hex));
+            HEXDUMP("Adhoc AES Key (HEX)", key_hex, sizeof(key_hex));
+
+            wrq->u.data.length = sizeof(key_ascii) + 1;
+
+            tmp = key_ascii;
+            for (i = 0; i < sizeof(key_hex); i++)
+                tmp += sprintf((char *) tmp, "%02x", key_hex[i]);
+        } else if (wrq->u.data.length >= 2) {
+            /* Parse the buf to get the cmd_action */
+            action = woal_atox(&buf[0]);
+            if (action < 1 || action > 2) {
+                PRINTM(MERROR, "Invalid action argument %d\n", action);
+                ret = -EINVAL;
+                goto done;
+            }
+
+            req->req_id = MLAN_IOCTL_SEC_CFG;
+            req->action = MLAN_ACT_SET;
+            sec = (mlan_ds_sec_cfg *) req->pbuf;
+            sec->sub_command = MLAN_OID_SEC_CFG_ENCRYPT_KEY;
+
+            if (action == 1) {
+                /* Set Adhoc AES Key */
+                memcpy(key_ascii, &buf[2], sizeof(key_ascii));
+                woal_ascii2hex(key_hex, (char *) key_ascii, sizeof(key_hex));
+                HEXDUMP("Adhoc AES Key (HEX)", key_hex, sizeof(key_hex));
+
+                sec->param.encrypt_key.key_len = AES_KEY_LEN;
+                sec->param.encrypt_key.key_index = MLAN_KEY_INDEX_UNICAST;
+                sec->param.encrypt_key.key_flags =
+                    KEY_FLAG_SET_TX_KEY | KEY_FLAG_GROUP_KEY;
+                memcpy(sec->param.encrypt_key.mac_addr, (u8 *) bcast_addr,
+                       ETH_ALEN);
+                memcpy(sec->param.encrypt_key.key_material, key_hex,
+                       sec->param.encrypt_key.key_len);
+
+                if (MLAN_STATUS_SUCCESS !=
+                    woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+                    ret = -EFAULT;
+                    goto done;
+                }
+            } else if (action == 2) {
+                /* Clear Adhoc AES Key */
+                sec->param.encrypt_key.key_len = AES_KEY_LEN;
+                sec->param.encrypt_key.key_index = MLAN_KEY_INDEX_UNICAST;
+                sec->param.encrypt_key.key_flags = KEY_FLAG_REMOVE_KEY;
+                memcpy(sec->param.encrypt_key.mac_addr, (u8 *) bcast_addr,
+                       ETH_ALEN);
+                memset(sec->param.encrypt_key.key_material, 0,
+                       sizeof(sec->param.encrypt_key.key_material));
+
+                if (MLAN_STATUS_SUCCESS !=
+                    woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+                    ret = -EFAULT;
+                    goto done;
+                }
+            } else {
+                PRINTM(MERROR, "Invalid argument\n");
+                ret = -EINVAL;
+                goto done;
+            }
+        }
+
+        HEXDUMP("Adhoc AES Key (ASCII)", key_ascii, sizeof(key_ascii));
+        wrq->u.data.length = sizeof(key_ascii);
+        if (wrq->u.data.pointer) {
+            if (copy_to_user(wrq->u.data.pointer, &key_ascii,
+                             sizeof(key_ascii))) {
+                PRINTM(MERROR, "copy_to_user failed\n");
+                ret = -EFAULT;
+                goto done;
+            }
+        }
+    }
+
+  done:
+    if (req)
+        kfree(req);
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief arpfilter ioctl function
+ *   
+ *  @param priv		A pointer to moal_private structure
+ *  @param wrq 		A pointer to iwreq structure
+ *  @return    		0 --success, otherwise fail
+ */
+static int
+woal_arp_filter(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0;
+    mlan_ds_misc_cfg *misc = NULL;
+    mlan_ioctl_req *req = NULL;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_misc_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    misc = (mlan_ds_misc_cfg *) req->pbuf;
+    misc->sub_command = MLAN_OID_MISC_GEN_IE;
+    req->req_id = MLAN_IOCTL_MISC_CFG;
+    req->action = MLAN_ACT_SET;
+    misc->param.gen_ie.type = MLAN_IE_TYPE_ARP_FILTER;
+    misc->param.gen_ie.len = wrq->u.data.length;
+
+    /* get the whole command from user */
+    if (copy_from_user
+        (misc->param.gen_ie.ie_data, wrq->u.data.pointer, wrq->u.data.length)) {
+        PRINTM(MERROR, "copy from user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/get IP address
+ *   
+ *  @param priv         A pointer to moal_private structure
+ *  @param wrq          A pointer to iwreq structure
+ *  @return             0 --success, otherwise fail
+ */
+static int
+woal_set_get_ip_addr(moal_private * priv, struct iwreq *wrq)
+{
+    mlan_ioctl_req *req = NULL;
+    char buf[IPADDR_MAX_BUF];
+    struct iwreq *wreq = (struct iwreq *) wrq;
+    mlan_ioctl_req *ioctl_req = NULL;
+    mlan_ds_misc_cfg *misc = NULL;
+    int ret = 0, op_code = 0, data_length = wrq->u.data.length;
+
+    ENTER();
+
+    memset(buf, 0, IPADDR_MAX_BUF);
+    ioctl_req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_misc_cfg));
+    if (ioctl_req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    misc = (mlan_ds_misc_cfg *) ioctl_req->pbuf;
+    memset(buf, 0, sizeof(buf));
+
+    if (data_length <= 1) {     /* GET */
+        ioctl_req->action = MLAN_ACT_GET;
+    } else {
+        if (copy_from_user(buf, wreq->u.data.pointer,
+                           MIN(IPADDR_MAX_BUF - 1, wreq->u.data.length))) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        /* Make sure we have the operation argument */
+        if (data_length > 2 && buf[1] != ';') {
+            PRINTM(MERROR, "No operation argument. Separate with ';'\n");
+            ret = -EINVAL;
+            goto done;
+        } else {
+            buf[1] = '\0';
+        }
+        ioctl_req->action = MLAN_ACT_SET;
+        /* only one IP is supported in current firmware */
+        memset(misc->param.ipaddr_cfg.ip_addr[0], 0, IPADDR_LEN);
+        in4_pton(&buf[2], (wreq->u.data.length - 2),
+                 misc->param.ipaddr_cfg.ip_addr[0], ' ', NULL);
+        /* only one IP is supported in current firmware */
+        misc->param.ipaddr_cfg.ip_addr_num = 1;
+        misc->param.ipaddr_cfg.ip_addr_type = IPADDR_TYPE_IPV4;
+    }
+    woal_atoi(&op_code, &buf[0]);
+    misc->param.ipaddr_cfg.op_code = op_code;
+    ioctl_req->req_id = MLAN_IOCTL_MISC_CFG;
+    misc->sub_command = MLAN_OID_MISC_IP_ADDR;
+
+    /* Send ioctl to mlan */
+    if (MLAN_STATUS_SUCCESS !=
+        woal_request_ioctl(priv, ioctl_req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    if (ioctl_req->action == MLAN_ACT_GET) {
+        sprintf(buf, "%ld;%d.%d.%d.%d",
+                misc->param.ipaddr_cfg.op_code,
+                misc->param.ipaddr_cfg.ip_addr[0][0],
+                misc->param.ipaddr_cfg.ip_addr[0][1],
+                misc->param.ipaddr_cfg.ip_addr[0][2],
+                misc->param.ipaddr_cfg.ip_addr[0][3]);
+        wrq->u.data.length = IPADDR_MAX_BUF;
+        if (copy_to_user(wrq->u.data.pointer, buf, IPADDR_MAX_BUF)) {
+            PRINTM(MERROR, "Copy to user failed\n");
+            ret = -EFAULT;
+        }
+    }
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set/Get Transmit beamforming capabilities
+ *
+ *  @param priv     A pointer to moal_private structure
+ *  @param wrq      A pointer to iwreq structure
+ *
+ *  @return         0 -- success, otherwise fail          
+ */
+static int
+woal_tx_bf_cap_ioctl(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0, data_length = wrq->u.data.length;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_11n_cfg *bf_cfg = NULL;
+    int bf_cap = 0;
+
+    ENTER();
+
+    if (data_length > 1) {
+        PRINTM(MERROR, "Invalid no of arguments!\n");
+        ret = -EINVAL;
+        goto done;
+    }
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_11n_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    bf_cfg = (mlan_ds_11n_cfg *) req->pbuf;
+    req->req_id = MLAN_IOCTL_11N_CFG;
+    bf_cfg->sub_command = MLAN_OID_11N_CFG_TX_BF_CAP;
+    req->action = MLAN_ACT_GET;
+    if (data_length) {          /* SET */
+        if (copy_from_user(&bf_cap, wrq->u.data.pointer, sizeof(int))) {
+            PRINTM(MERROR, "copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        bf_cfg->param.tx_bf_cap = bf_cap;
+        req->action = MLAN_ACT_SET;
+    }
+
+    /* Send IOCTL request to MLAN */
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    bf_cap = bf_cfg->param.tx_bf_cap;
+    if (copy_to_user(wrq->u.data.pointer, &bf_cap, sizeof(int))) {
+        ret = -EFAULT;
+        goto done;
+    }
+    wrq->u.data.length = 1;
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Create a brief scan resp to relay basic BSS info to the app layer
+ *
+ *  When the beacon/probe response has not been buffered, use the saved BSS
+ *    information available to provide a minimum response for the application
+ *    ioctl retrieval routines.  Include:
+ *        - Timestamp
+ *        - Beacon Period
+ *        - Capabilities (including WMM Element if available)
+ *        - SSID
+ *
+ *  @param ppbuffer  Output parameter: Buffer used to create basic scan rsp
+ *  @param pbss_desc Pointer to a BSS entry in the scan table to create
+ *                   scan response from for delivery to the application layer
+ *
+ *  @return          N/A
+ */
+static void
+wlan_scan_create_brief_table_entry(t_u8 ** ppbuffer,
+                                   BSSDescriptor_t * pbss_desc)
+{
+    t_u8 *ptmp_buf = *ppbuffer;
+    t_u8 tmp_ssid_hdr[2];
+    t_u8 ie_len = 0;
+
+    if (copy_to_user(ptmp_buf, pbss_desc->time_stamp,
+                     sizeof(pbss_desc->time_stamp))) {
+        PRINTM(MINFO, "Copy to user failed\n");
+        return;
+    }
+    ptmp_buf += sizeof(pbss_desc->time_stamp);
+
+    if (copy_to_user(ptmp_buf, &pbss_desc->beacon_period,
+                     sizeof(pbss_desc->beacon_period))) {
+        PRINTM(MINFO, "Copy to user failed\n");
+        return;
+    }
+    ptmp_buf += sizeof(pbss_desc->beacon_period);
+
+    if (copy_to_user
+        (ptmp_buf, &pbss_desc->cap_info, sizeof(pbss_desc->cap_info))) {
+        PRINTM(MINFO, "Copy to user failed\n");
+        return;
+    }
+    ptmp_buf += sizeof(pbss_desc->cap_info);
+
+    tmp_ssid_hdr[0] = 0;        /* Element ID for SSID is zero */
+    tmp_ssid_hdr[1] = pbss_desc->ssid.ssid_len;
+    if (copy_to_user(ptmp_buf, tmp_ssid_hdr, sizeof(tmp_ssid_hdr))) {
+        PRINTM(MINFO, "Copy to user failed\n");
+        return;
+    }
+    ptmp_buf += sizeof(tmp_ssid_hdr);
+
+    if (copy_to_user(ptmp_buf, pbss_desc->ssid.ssid, pbss_desc->ssid.ssid_len)) {
+        PRINTM(MINFO, "Copy to user failed\n");
+        return;
+    }
+    ptmp_buf += pbss_desc->ssid.ssid_len;
+
+    if (pbss_desc->wmm_ie.vend_hdr.element_id == WMM_IE) {
+        ie_len = sizeof(IEEEtypes_Header_t) + pbss_desc->wmm_ie.vend_hdr.len;
+        if (copy_to_user(ptmp_buf, &pbss_desc->wmm_ie, ie_len)) {
+            PRINTM(MINFO, "Copy to user failed\n");
+            return;
+        }
+
+        ptmp_buf += ie_len;
+    }
+
+    if (pbss_desc->pwpa_ie) {
+        if ((*(pbss_desc->pwpa_ie)).vend_hdr.element_id == WPA_IE) {
+            ie_len =
+                sizeof(IEEEtypes_Header_t) +
+                (*(pbss_desc->pwpa_ie)).vend_hdr.len;
+            if (copy_to_user(ptmp_buf, pbss_desc->pwpa_ie, ie_len)) {
+                PRINTM(MINFO, "Copy to user failed\n");
+                return;
+            }
+        }
+
+        ptmp_buf += ie_len;
+    }
+
+    if (pbss_desc->prsn_ie) {
+        if ((*(pbss_desc->prsn_ie)).ieee_hdr.element_id == RSN_IE) {
+            ie_len =
+                sizeof(IEEEtypes_Header_t) +
+                (*(pbss_desc->prsn_ie)).ieee_hdr.len;
+            if (copy_to_user(ptmp_buf, pbss_desc->prsn_ie, ie_len)) {
+                PRINTM(MINFO, "Copy to user failed\n");
+                return;
+            }
+        }
+
+        ptmp_buf += ie_len;
+    }
+
+    *ppbuffer = ptmp_buf;
+}
+
+/** 
+ *  @brief Create a wlan_ioctl_get_scan_table_entry for a given BSS 
+ *         Descriptor for inclusion in the ioctl response to the user space
+ *         application.
+ *
+ *
+ *  @param pbss_desc   Pointer to a BSS entry in the scan table to form
+ *                     scan response from for delivery to the application layer
+ *  @param ppbuffer    Output parameter: Buffer used to output scan return struct
+ *  @param pspace_left Output parameter: Number of bytes available in the 
+ *                     response buffer.
+ *
+ *  @return MLAN_STATUS_SUCCESS, or < 0 with IOCTL error code
+ */
+static int
+wlan_get_scan_table_ret_entry(BSSDescriptor_t * pbss_desc,
+                              t_u8 ** ppbuffer, int *pspace_left)
+{
+    wlan_ioctl_get_scan_table_entry *prsp_entry;
+    wlan_ioctl_get_scan_table_entry tmp_rsp_entry;
+    int space_needed;
+    t_u8 *pcurrent;
+    int variable_size;
+
+    const int fixed_size = sizeof(wlan_ioctl_get_scan_table_entry);
+
+    ENTER();
+
+    pcurrent = *ppbuffer;
+
+    /* The variable size returned is the stored beacon size */
+    variable_size = pbss_desc->beacon_buf_size;
+
+    /* If we stored a beacon and its size was zero, set the variable size
+       return value to the size of the brief scan response
+       wlan_scan_create_brief_table_entry creates.  Also used if we are not
+       configured to store beacons in the first place */
+    if (!variable_size) {
+        variable_size = pbss_desc->ssid.ssid_len + 2;
+        variable_size += (sizeof(pbss_desc->beacon_period)
+                          + sizeof(pbss_desc->time_stamp)
+                          + sizeof(pbss_desc->cap_info));
+        if (pbss_desc->wmm_ie.vend_hdr.element_id == WMM_IE) {
+            variable_size += (sizeof(IEEEtypes_Header_t)
+                              + pbss_desc->wmm_ie.vend_hdr.len);
+        }
+
+        if (pbss_desc->pwpa_ie) {
+            if ((*(pbss_desc->pwpa_ie)).vend_hdr.element_id == WPA_IE) {
+                variable_size += (sizeof(IEEEtypes_Header_t)
+                                  + (*(pbss_desc->pwpa_ie)).vend_hdr.len);
+            }
+        }
+
+        if (pbss_desc->prsn_ie) {
+            if ((*(pbss_desc->prsn_ie)).ieee_hdr.element_id == RSN_IE) {
+                variable_size += (sizeof(IEEEtypes_Header_t)
+                                  + (*(pbss_desc->prsn_ie)).ieee_hdr.len);
+            }
+        }
+    }
+
+    space_needed = fixed_size + variable_size;
+
+    PRINTM(MINFO, "GetScanTable: need(%d), left(%d)\n",
+           space_needed, *pspace_left);
+
+    if (space_needed >= *pspace_left) {
+        *pspace_left = 0;
+        LEAVE();
+        return -E2BIG;
+    }
+
+    *pspace_left -= space_needed;
+
+    tmp_rsp_entry.fixed_field_length = (sizeof(tmp_rsp_entry)
+                                        -
+                                        sizeof(tmp_rsp_entry.fixed_field_length)
+                                        -
+                                        sizeof(tmp_rsp_entry.bss_info_length));
+
+    memcpy(tmp_rsp_entry.fixed_fields.bssid,
+           pbss_desc->mac_address, sizeof(prsp_entry->fixed_fields.bssid));
+
+    tmp_rsp_entry.fixed_fields.rssi = pbss_desc->rssi;
+    tmp_rsp_entry.fixed_fields.channel = pbss_desc->channel;
+    tmp_rsp_entry.fixed_fields.network_tsf = pbss_desc->network_tsf;
+    tmp_rsp_entry.bss_info_length = variable_size;
+
+    /* 
+     *  Copy fixed fields to user space
+     */
+    if (copy_to_user(pcurrent, &tmp_rsp_entry, fixed_size)) {
+        PRINTM(MINFO, "Copy to user failed\n");
+        LEAVE();
+        return -EFAULT;
+    }
+
+    pcurrent += fixed_size;
+
+    if (pbss_desc->pbeacon_buf) {
+        /* 
+         *  Copy variable length elements to user space
+         */
+        if (copy_to_user(pcurrent, pbss_desc->pbeacon_buf,
+                         pbss_desc->beacon_buf_size)) {
+            PRINTM(MINFO, "Copy to user failed\n");
+            LEAVE();
+            return -EFAULT;
+        }
+
+        pcurrent += pbss_desc->beacon_buf_size;
+    } else {
+        wlan_scan_create_brief_table_entry(&pcurrent, pbss_desc);
+    }
+
+    *ppbuffer = pcurrent;
+
+    LEAVE();
+
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief Retrieve the scan response/beacon table
+ *
+ *  @param wrq          A pointer to iwreq structure
+ *  @param scan_resp    A pointer to mlan_scan_resp structure
+ *  @param scan_start   argument
+ *
+ *  @return             MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static int
+moal_ret_get_scan_table_ioctl(struct iwreq *wrq,
+                              mlan_scan_resp * scan_resp, t_u32 scan_start)
+{
+    pBSSDescriptor_t pbss_desc, scan_table;
+    wlan_ioctl_get_scan_table_info *prsp_info;
+    int ret_code;
+    int ret_len;
+    int space_left;
+    t_u8 *pcurrent;
+    t_u8 *pbuffer_end;
+    t_u32 num_scans_done;
+
+    ENTER();
+
+    num_scans_done = 0;
+    ret_code = MLAN_STATUS_SUCCESS;
+
+    prsp_info = (wlan_ioctl_get_scan_table_info *) wrq->u.data.pointer;
+    pcurrent = (t_u8 *) prsp_info->scan_table_entry_buf;
+
+    pbuffer_end = wrq->u.data.pointer + wrq->u.data.length - 1;
+    space_left = pbuffer_end - pcurrent;
+    scan_table = (BSSDescriptor_t *) (scan_resp->pscan_table);
+
+    PRINTM(MINFO, "GetScanTable: scan_start req = %ld\n", scan_start);
+    PRINTM(MINFO, "GetScanTable: length avail = %d\n", wrq->u.data.length);
+
+    if (!scan_start) {
+        PRINTM(MINFO, "GetScanTable: get current BSS Descriptor\n");
+
+        /* Use to get current association saved descriptor */
+        pbss_desc = scan_table;
+
+        ret_code = wlan_get_scan_table_ret_entry(pbss_desc,
+                                                 &pcurrent, &space_left);
+
+        if (ret_code == MLAN_STATUS_SUCCESS) {
+            num_scans_done = 1;
+        }
+    } else {
+        scan_start--;
+
+        while (space_left
+               && (scan_start + num_scans_done < scan_resp->num_in_scan_table)
+               && (ret_code == MLAN_STATUS_SUCCESS)) {
+
+            pbss_desc = (scan_table + (scan_start + num_scans_done));
+
+            PRINTM(MINFO, "GetScanTable: get current BSS Descriptor [%ld]\n",
+                   scan_start + num_scans_done);
+
+            ret_code = wlan_get_scan_table_ret_entry(pbss_desc,
+                                                     &pcurrent, &space_left);
+
+            if (ret_code == MLAN_STATUS_SUCCESS) {
+                num_scans_done++;
+            }
+        }
+    }
+
+    prsp_info->scan_number = num_scans_done;
+    ret_len = pcurrent - (t_u8 *) wrq->u.data.pointer;
+
+    wrq->u.data.length = ret_len;
+
+    /* Return ret_code (EFAULT or E2BIG) in the case where no scan results were 
+       successfully encoded. */
+    LEAVE();
+    return (num_scans_done ? MLAN_STATUS_SUCCESS : ret_code);
+}
+
+/** 
+ *  @brief Get scan table ioctl
+ *
+ *  @param priv     A pointer to moal_private structure
+ *  @param wrq 		A pointer to iwreq structure
+ *
+ *  @return         MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail          
+ */
+static mlan_status
+woal_get_scan_table_ioctl(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_scan *scan = NULL;
+    t_u32 scan_start;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_scan));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    scan = (mlan_ds_scan *) req->pbuf;
+    req->req_id = MLAN_IOCTL_SCAN;
+    req->action = MLAN_ACT_GET;
+
+    /* get the whole command from user */
+    if (copy_from_user(&scan_start, wrq->u.data.pointer, sizeof(scan_start))) {
+        PRINTM(MERROR, "copy from user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    if (scan_start) {
+        scan->sub_command = MLAN_OID_SCAN_NORMAL;
+    } else {
+        scan->sub_command = MLAN_OID_SCAN_GET_CURRENT_BSS;
+    }
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT);
+    if (status == MLAN_STATUS_SUCCESS) {
+        status = moal_ret_get_scan_table_ioctl(wrq,
+                                               &scan->param.scan_resp,
+                                               scan_start);
+    }
+  done:
+    if (req && (status != MLAN_STATUS_PENDING))
+        kfree(req);
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Set user scan
+ *
+ *  @param priv     A pointer to moal_private structure
+ *  @param wrq 		A pointer to iwreq structure
+ *
+ *  @return         MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail          
+ */
+static mlan_status
+woal_set_user_scan_ioctl(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_scan *scan = NULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    union iwreq_data wrqu;
+    moal_handle *handle = priv->phandle;
+
+    ENTER();
+
+    if (handle->scan_pending_on_block == MTRUE) {
+        PRINTM(MINFO, "scan already in processing...\n");
+        LEAVE();
+        return ret;
+    }
+    if (MOAL_ACQ_SEMAPHORE_BLOCK(&handle->async_sem)) {
+        PRINTM(MERROR, "Acquire semaphore error, request_scan\n");
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+    handle->scan_pending_on_block = MTRUE;
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_scan) + wrq->u.data.length);
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    scan = (mlan_ds_scan *) req->pbuf;
+    scan->sub_command = MLAN_OID_SCAN_USER_CONFIG;
+    req->req_id = MLAN_IOCTL_SCAN;
+    req->action = MLAN_ACT_SET;
+
+    if (copy_from_user(scan->param.user_scan.scan_cfg_buf,
+                       wrq->u.data.pointer, wrq->u.data.length)) {
+        PRINTM(MINFO, "Copy from user failed\n");
+        LEAVE();
+        return -EFAULT;
+    }
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT);
+    if (status == MLAN_STATUS_SUCCESS) {
+        memset(&wrqu, 0, sizeof(union iwreq_data));
+        wireless_send_event(priv->netdev, SIOCGIWSCAN, &wrqu, NULL);
+    }
+    handle->scan_pending_on_block = MFALSE;
+    MOAL_REL_SEMAPHORE(&handle->async_sem);
+
+  done:
+    if (req && (status != MLAN_STATUS_PENDING))
+        kfree(req);
+    LEAVE();
+    return status;
+}
+
+/**
+ * @brief Set/Get scan configuration parameters
+ * 
+ * @param priv     A pointer to moal_private structure
+ * @param wrq      A pointer to iwreq structure
+ * 
+ * @return         0 --success, otherwise fail
+ */
+static int
+woal_set_get_scan_cfg(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0;
+    int arg_len = 6;
+    int data[arg_len];
+    mlan_ds_scan *scan = NULL;
+    mlan_ioctl_req *req = NULL;
+
+    ENTER();
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_scan));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    if (wrq->u.data.length > arg_len) {
+        ret = -EINVAL;
+        goto done;
+    }
+    scan = (mlan_ds_scan *) req->pbuf;
+    scan->sub_command = MLAN_OID_SCAN_CONFIG;
+    req->req_id = MLAN_IOCTL_SCAN;
+    memset(data, 0, sizeof(data));
+    if (wrq->u.data.length) {
+        if (copy_from_user
+            (data, wrq->u.data.pointer, (wrq->u.data.length * sizeof(int)))) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        if ((data[0] < 0) || (data[0] > MLAN_SCAN_TYPE_PASSIVE)) {
+            PRINTM(MERROR, "Invalid argument for scan type\n");
+            ret = -EINVAL;
+            goto done;
+        }
+        if ((data[1] < 0) || (data[1] > MLAN_SCAN_MODE_ANY)) {
+            PRINTM(MERROR, "Invalid argument for scan mode\n");
+            ret = -EINVAL;
+            goto done;
+        }
+        if ((data[2] < 0) || (data[2] > MAX_PROBES)) {
+            PRINTM(MERROR, "Invalid argument for scan probes\n");
+            ret = -EINVAL;
+            goto done;
+        }
+        if (((data[3] < 0) || (data[3] > MRVDRV_MAX_ACTIVE_SCAN_CHAN_TIME)) ||
+            ((data[4] < 0) || (data[4] > MRVDRV_MAX_ACTIVE_SCAN_CHAN_TIME)) ||
+            ((data[5] < 0) || (data[5] > MRVDRV_MAX_PASSIVE_SCAN_CHAN_TIME))) {
+            PRINTM(MERROR, "Invalid argument for scan time\n");
+            ret = -EINVAL;
+            goto done;
+        }
+        req->action = MLAN_ACT_SET;
+        memcpy(&scan->param.scan_cfg, data, sizeof(data));
+    } else
+        req->action = MLAN_ACT_GET;
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    if (!wrq->u.data.length) {
+        memcpy(data, &scan->param.scan_cfg, sizeof(data));
+        if (copy_to_user(wrq->u.data.pointer, data, sizeof(data))) {
+            ret = -EFAULT;
+            goto done;
+        }
+        wrq->u.data.length = sizeof(data) / sizeof(int);
+    }
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ * @brief Set/Get PS configuration parameters
+ * 
+ * @param priv     A pointer to moal_private structure
+ * @param wrq      A pointer to iwreq structure
+ * 
+ * @return         0 --success, otherwise fail
+ */
+static int
+woal_set_get_ps_cfg(moal_private * priv, struct iwreq *wrq)
+{
+    int data[7], ret = 0;
+    mlan_ds_pm_cfg *pm_cfg = NULL;
+    mlan_ioctl_req *req = NULL;
+    int allowed = 3;
+    int i = 3;
+
+    ENTER();
+
+    allowed++;                  /* For ad-hoc awake period parameter */
+    allowed++;                  /* For beacon missing timeout parameter */
+    allowed += 2;               /* For delay to PS and PS mode parameters */
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_pm_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    if (wrq->u.data.length > allowed) {
+        ret = -EINVAL;
+        goto done;
+    }
+    pm_cfg = (mlan_ds_pm_cfg *) req->pbuf;
+    pm_cfg->sub_command = MLAN_OID_PM_CFG_PS_CFG;
+    req->req_id = MLAN_IOCTL_PM_CFG;
+    memset(data, 0, sizeof(data));
+    if (wrq->u.data.length) {
+        if (copy_from_user
+            (data, wrq->u.data.pointer, (wrq->u.data.length * sizeof(int)))) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        if ((data[0] < PS_NULL_DISABLE)) {
+            PRINTM(MERROR, "Invalid argument for PS null interval\n");
+            ret = -EINVAL;
+            goto done;
+        }
+        if ((data[1] != MRVDRV_IGNORE_MULTIPLE_DTIM)
+            && (data[1] != MRVDRV_MATCH_CLOSEST_DTIM)
+            && ((data[1] < MRVDRV_MIN_MULTIPLE_DTIM)
+                || (data[1] > MRVDRV_MAX_MULTIPLE_DTIM))) {
+            PRINTM(MERROR, "Invalid argument for multiple DTIM\n");
+            ret = -EINVAL;
+            goto done;
+        }
+
+        if ((data[2] < MRVDRV_MIN_LISTEN_INTERVAL)
+            && (data[2] != MRVDRV_LISTEN_INTERVAL_DISABLE)) {
+            PRINTM(MERROR, "Invalid argument for listen interval\n");
+            ret = -EINVAL;
+            goto done;
+        }
+
+        if ((data[i] != SPECIAL_ADHOC_AWAKE_PD) &&
+            ((data[i] < MIN_ADHOC_AWAKE_PD) ||
+             (data[i] > MAX_ADHOC_AWAKE_PD))) {
+            PRINTM(MERROR, "Invalid argument for adhoc awake period\n");
+            ret = -EINVAL;
+            goto done;
+        }
+        i++;
+        if ((data[i] != DISABLE_BCN_MISS_TO) &&
+            ((data[i] < MIN_BCN_MISS_TO) || (data[i] > MAX_BCN_MISS_TO))) {
+            PRINTM(MERROR, "Invalid argument for beacon miss timeout\n");
+            ret = -EINVAL;
+            goto done;
+        }
+        i++;
+        if (wrq->u.data.length < allowed - 1)
+            data[i] = DELAY_TO_PS_UNCHANGED;
+        else if ((data[i] < MIN_DELAY_TO_PS) || (data[i] > MAX_DELAY_TO_PS)) {
+            PRINTM(MERROR, "Invalid argument for delay to PS\n");
+            ret = -EINVAL;
+            goto done;
+        }
+        i++;
+        if ((data[i] != PS_MODE_UNCHANGED) && (data[i] != PS_MODE_AUTO) &&
+            (data[i] != PS_MODE_POLL) && (data[i] != PS_MODE_NULL)) {
+            PRINTM(MERROR, "Invalid argument for PS mode\n");
+            ret = -EINVAL;
+            goto done;
+        }
+        i++;
+        req->action = MLAN_ACT_SET;
+        memcpy(&pm_cfg->param.ps_cfg, data, sizeof(pm_cfg->param.ps_cfg));
+    } else
+        req->action = MLAN_ACT_GET;
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    memcpy(data, &pm_cfg->param.ps_cfg, sizeof(pm_cfg->param.ps_cfg));
+    if (copy_to_user(wrq->u.data.pointer, data, sizeof(int) * allowed)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    wrq->u.data.length = allowed;
+
+    if (req->action == MLAN_ACT_SET) {
+        pm_cfg = (mlan_ds_pm_cfg *) req->pbuf;
+        pm_cfg->sub_command = MLAN_OID_PM_CFG_IEEE_PS;
+        pm_cfg->param.ps_mode = 1;
+        req->req_id = MLAN_IOCTL_PM_CFG;
+        req->action = MLAN_ACT_SET;
+        woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT);
+    }
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Private IOCTL entry to send an ADDTS TSPEC
+ *
+ *  Receive a ADDTS command from the application.  The command structure
+ *    contains a TSPEC and timeout in milliseconds.  The timeout is performed
+ *    in the firmware after the ADDTS command frame is sent.
+ *
+ *  The TSPEC is received in the API as an opaque block. The firmware will
+ *    send the entire data block, including the bytes after the TSPEC.  This
+ *    is done to allow extra IEs to be packaged with the TSPEC in the ADDTS
+ *    action frame.
+ *
+ *  The IOCTL structure contains two return fields:
+ *    - The firmware command result, which indicates failure and timeouts
+ *    - The IEEE Status code which contains the corresponding value from
+ *      any ADDTS response frame received.
+ *
+ *  In addition, the opaque TSPEC data block passed in is replaced with the
+ *    TSPEC received in the ADDTS response frame.  In case of failure, the
+ *    AP may modify the TSPEC on return and in the case of success, the
+ *    medium time is returned as calculated by the AP.  Along with the TSPEC,
+ *    any IEs that are sent in the ADDTS response are also returned and can be
+ *    parsed using the IOCTL length as an indicator of extra elements.
+ *
+ *  The return value to the application layer indicates a driver execution
+ *    success or failure.  A successful return could still indicate a firmware
+ *    failure or AP negotiation failure via the commandResult field copied
+ *    back to the application.
+ *
+ *  @param priv    Pointer to the mlan_private driver data struct
+ *  @param wrq     A pointer to iwreq structure containing the
+ *                 wlan_ioctl_wmm_addts_req_t struct for this ADDTS request
+ *
+ *  @return        0 if successful; IOCTL error code otherwise
+ */
+static int
+woal_wmm_addts_req_ioctl(moal_private * priv, struct iwreq *wrq)
+{
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_wmm_cfg *cfg = NULL;
+    wlan_ioctl_wmm_addts_req_t addts_ioctl;
+    int ret = 0;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_wmm_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    req->req_id = MLAN_IOCTL_WMM_CFG;
+    cfg = (mlan_ds_wmm_cfg *) req->pbuf;
+    cfg->sub_command = MLAN_OID_WMM_CFG_ADDTS;
+
+    memset(&addts_ioctl, 0x00, sizeof(addts_ioctl));
+
+    if (wrq->u.data.length) {
+        if (copy_from_user(&addts_ioctl, wrq->u.data.pointer,
+                           MIN(wrq->u.data.length, sizeof(addts_ioctl)))) {
+            PRINTM(MERROR, "TSPEC: ADDTS copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+
+        cfg->param.addts.timeout = addts_ioctl.timeout_ms;
+        cfg->param.addts.ie_data_len = addts_ioctl.ie_data_len;
+
+        memcpy(cfg->param.addts.ie_data,
+               addts_ioctl.ie_data, addts_ioctl.ie_data_len);
+
+        cfg->param.addts.ie_data_len = addts_ioctl.ie_data_len;
+
+        if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req,
+                                                      MOAL_IOCTL_WAIT)) {
+            ret = -EFAULT;
+            goto done;
+        }
+        addts_ioctl.cmd_result = cfg->param.addts.result;
+        addts_ioctl.ieee_status_code = (t_u8) cfg->param.addts.status_code;
+        addts_ioctl.ie_data_len = cfg->param.addts.ie_data_len;
+
+        memcpy(addts_ioctl.ie_data,
+               cfg->param.addts.ie_data, cfg->param.addts.ie_data_len);
+
+        wrq->u.data.length = (sizeof(addts_ioctl)
+                              - sizeof(addts_ioctl.ie_data)
+                              + cfg->param.addts.ie_data_len);
+
+        if (copy_to_user(wrq->u.data.pointer, &addts_ioctl, wrq->u.data.length)) {
+            PRINTM(MERROR, "TSPEC: ADDTS copy to user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+    }
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Private IOCTL entry to send a DELTS TSPEC
+ *
+ *  Receive a DELTS command from the application.  The command structure
+ *    contains a TSPEC and reason code along with space for a command result
+ *    to be returned.  The information is packaged is sent to the wlan_cmd.c
+ *    firmware command prep and send routines for execution in the firmware.
+ *
+ *  The reason code is not used for WMM implementations but is indicated in
+ *    the 802.11e specification.
+ *
+ *  The return value to the application layer indicates a driver execution
+ *    success or failure.  A successful return could still indicate a firmware
+ *    failure via the cmd_result field copied back to the application.
+ *
+ *  @param priv    Pointer to the mlan_private driver data struct
+ *  @param wrq     A pointer to iwreq structure containing the
+ *                 wlan_ioctl_wmm_delts_req_t struct for this DELTS request
+ *
+ *  @return        0 if successful; IOCTL error code otherwise
+ */
+static int
+woal_wmm_delts_req_ioctl(moal_private * priv, struct iwreq *wrq)
+{
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_wmm_cfg *cfg = NULL;
+    wlan_ioctl_wmm_delts_req_t delts_ioctl;
+    int ret = 0;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_wmm_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    req->req_id = MLAN_IOCTL_WMM_CFG;
+    cfg = (mlan_ds_wmm_cfg *) req->pbuf;
+    cfg->sub_command = MLAN_OID_WMM_CFG_DELTS;
+
+    memset(&delts_ioctl, 0x00, sizeof(delts_ioctl));
+
+    if (wrq->u.data.length) {
+        if (copy_from_user(&delts_ioctl, wrq->u.data.pointer,
+                           MIN(wrq->u.data.length, sizeof(delts_ioctl)))) {
+            PRINTM(MERROR, "TSPEC: DELTS copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+
+        cfg->param.delts.status_code = (t_u32) delts_ioctl.ieee_reason_code;
+        cfg->param.delts.ie_data_len = delts_ioctl.ie_data_len;
+
+        memcpy(cfg->param.delts.ie_data,
+               delts_ioctl.ie_data, delts_ioctl.ie_data_len);
+
+        if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req,
+                                                      MOAL_IOCTL_WAIT)) {
+            ret = -EFAULT;
+            goto done;
+        }
+
+        /* Return the firmware command result back to the application layer */
+        delts_ioctl.cmd_result = cfg->param.delts.result;
+        wrq->u.data.length = sizeof(delts_ioctl);
+
+        if (copy_to_user(wrq->u.data.pointer, &delts_ioctl, wrq->u.data.length)) {
+            PRINTM(MERROR, "TSPEC: DELTS copy to user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+    }
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Private IOCTL entry to get/set a specified AC Queue's parameters
+ *
+ *  Receive a AC Queue configuration command which is used to get, set, or
+ *    default the parameters associated with a specific WMM AC Queue.
+ *
+ *  @param priv    Pointer to the mlan_private driver data struct
+ *  @param wrq     A pointer to iwreq structure containing the
+ *                 wlan_ioctl_wmm_queue_config_t struct
+ *
+ *  @return        0 if successful; IOCTL error code otherwise
+ */
+static int
+woal_wmm_queue_config_ioctl(moal_private * priv, struct iwreq *wrq)
+{
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_wmm_cfg *pwmm = NULL;
+    mlan_ds_wmm_queue_config *pqcfg = NULL;
+    wlan_ioctl_wmm_queue_config_t qcfg_ioctl;
+    int ret = 0;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_wmm_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    req->req_id = MLAN_IOCTL_WMM_CFG;
+    pwmm = (mlan_ds_wmm_cfg *) req->pbuf;
+    pwmm->sub_command = MLAN_OID_WMM_CFG_QUEUE_CONFIG;
+
+    memset(&qcfg_ioctl, 0x00, sizeof(qcfg_ioctl));
+    pqcfg = (mlan_ds_wmm_queue_config *) & pwmm->param.q_cfg;
+
+    if (wrq->u.data.length) {
+        if (copy_from_user(&qcfg_ioctl, wrq->u.data.pointer,
+                           MIN(wrq->u.data.length, sizeof(qcfg_ioctl)))) {
+            PRINTM(MERROR, "QCONFIG: copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+
+        pqcfg->action = qcfg_ioctl.action;
+        pqcfg->access_category = qcfg_ioctl.access_category;
+        pqcfg->msdu_lifetime_expiry = qcfg_ioctl.msdu_lifetime_expiry;
+
+        if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req,
+                                                      MOAL_IOCTL_WAIT)) {
+            ret = -EFAULT;
+            goto done;
+        }
+        memset(&qcfg_ioctl, 0x00, sizeof(qcfg_ioctl));
+        qcfg_ioctl.action = pqcfg->action;
+        qcfg_ioctl.access_category = pqcfg->access_category;
+        qcfg_ioctl.msdu_lifetime_expiry = pqcfg->msdu_lifetime_expiry;
+        wrq->u.data.length = sizeof(qcfg_ioctl);
+
+        if (copy_to_user(wrq->u.data.pointer, &qcfg_ioctl, wrq->u.data.length)) {
+            PRINTM(MERROR, "QCONFIG: copy to user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+    }
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Private IOCTL entry to get and start/stop queue stats on a WMM AC
+ *
+ *  Receive a AC Queue statistics command from the application for a specific
+ *    WMM AC.  The command can:
+ *         - Turn stats on
+ *         - Turn stats off
+ *         - Collect and clear the stats
+ *
+ *  @param priv    Pointer to the moal_private driver data struct
+ *  @param wrq     A pointer to iwreq structure containing the
+ *                 wlan_ioctl_wmm_queue_stats_t struct
+ *
+ *  @return        0 if successful; IOCTL error code otherwise
+ */
+static int
+woal_wmm_queue_stats_ioctl(moal_private * priv, struct iwreq *wrq)
+{
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_wmm_cfg *pwmm = NULL;
+    mlan_ds_wmm_queue_stats *pqstats = NULL;
+    wlan_ioctl_wmm_queue_stats_t qstats_ioctl;
+    int ret = 0;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_wmm_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    req->req_id = MLAN_IOCTL_WMM_CFG;
+    pwmm = (mlan_ds_wmm_cfg *) req->pbuf;
+    pwmm->sub_command = MLAN_OID_WMM_CFG_QUEUE_STATS;
+
+    memset(&qstats_ioctl, 0x00, sizeof(qstats_ioctl));
+    pqstats = (mlan_ds_wmm_queue_stats *) & pwmm->param.q_stats;
+
+    if (wrq->u.data.length) {
+        if (copy_from_user(&qstats_ioctl, wrq->u.data.pointer,
+                           MIN(wrq->u.data.length, sizeof(qstats_ioctl)))) {
+            PRINTM(MERROR, "QSTATS: copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+
+        memcpy((void *) pqstats, (void *) &qstats_ioctl, sizeof(qstats_ioctl));
+        PRINTM(MINFO, "QSTATS: IOCTL [%d,%d]\n", qstats_ioctl.action,
+               qstats_ioctl.user_priority);
+
+        if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req,
+                                                      MOAL_IOCTL_WAIT)) {
+            ret = -EFAULT;
+            goto done;
+        }
+
+        memset(&qstats_ioctl, 0x00, sizeof(qstats_ioctl));
+        memcpy((void *) &qstats_ioctl, (void *) pqstats, sizeof(qstats_ioctl));
+        wrq->u.data.length = sizeof(qstats_ioctl);
+
+        if (copy_to_user
+            (wrq->u.data.pointer, &qstats_ioctl, wrq->u.data.length)) {
+            PRINTM(MERROR, "QSTATS: copy to user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+    }
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Private IOCTL entry to get the status of the WMM queues
+ *
+ *  Return the following information for each WMM AC:
+ *        - WMM IE Acm Required
+ *        - Firmware Flow Required
+ *        - Firmware Flow Established
+ *        - Firmware Queue Enabled
+ *        - Firmware Delivery Enabled
+ *        - Firmware Trigger Enabled
+ *
+ *  @param priv    Pointer to the moal_private driver data struct
+ *  @param wrq     A pointer to iwreq structure containing the
+ *                 wlan_ioctl_wmm_queue_status_t struct for request
+ *
+ *  @return        0 if successful; IOCTL error code otherwise
+ */
+static int
+woal_wmm_queue_status_ioctl(moal_private * priv, struct iwreq *wrq)
+{
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_wmm_cfg *pwmm = NULL;
+    wlan_ioctl_wmm_queue_status_t qstatus_ioctl;
+    int ret = 0;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_wmm_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    req->req_id = MLAN_IOCTL_WMM_CFG;
+    pwmm = (mlan_ds_wmm_cfg *) req->pbuf;
+    pwmm->sub_command = MLAN_OID_WMM_CFG_QUEUE_STATUS;
+
+    if (wrq->u.data.length == sizeof(qstatus_ioctl)) {
+        if (MLAN_STATUS_SUCCESS !=
+            woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+            ret = -EFAULT;
+            goto done;
+        }
+
+        memset(&qstatus_ioctl, 0x00, sizeof(qstatus_ioctl));
+        memcpy((void *) &qstatus_ioctl, (void *) &pwmm->param.q_status,
+               sizeof(qstatus_ioctl));
+        wrq->u.data.length = sizeof(qstatus_ioctl);
+    } else {
+        wrq->u.data.length = 0;
+    }
+
+    if (copy_to_user(wrq->u.data.pointer, &qstatus_ioctl, wrq->u.data.length)) {
+        PRINTM(MERROR, "QSTATUS: copy to user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Private IOCTL entry to get the status of the WMM Traffic Streams
+ *
+ *  @param priv    Pointer to the moal_private driver data struct
+ *  @param wrq     A pointer to iwreq structure containing the
+ *                 wlan_ioctl_wmm_ts_status_t struct for request
+ *
+ *  @return        0 if successful; IOCTL error code otherwise
+ */
+static int
+woal_wmm_ts_status_ioctl(moal_private * priv, struct iwreq *wrq)
+{
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_wmm_cfg *pwmm = NULL;
+    wlan_ioctl_wmm_ts_status_t ts_status_ioctl;
+    int ret = 0;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_wmm_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    req->req_id = MLAN_IOCTL_WMM_CFG;
+    pwmm = (mlan_ds_wmm_cfg *) req->pbuf;
+    pwmm->sub_command = MLAN_OID_WMM_CFG_TS_STATUS;
+
+    memset(&ts_status_ioctl, 0x00, sizeof(ts_status_ioctl));
+
+    if (wrq->u.data.length == sizeof(ts_status_ioctl)) {
+        if (copy_from_user(&ts_status_ioctl, wrq->u.data.pointer,
+                           MIN(wrq->u.data.length, sizeof(ts_status_ioctl)))) {
+            PRINTM(MERROR, "TS_STATUS: copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+
+        memset(&pwmm->param.ts_status, 0x00, sizeof(ts_status_ioctl));
+        pwmm->param.ts_status.tid = ts_status_ioctl.tid;
+
+        if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req,
+                                                      MOAL_IOCTL_WAIT)) {
+            ret = -EFAULT;
+            goto done;
+        }
+
+        memset(&ts_status_ioctl, 0x00, sizeof(ts_status_ioctl));
+        memcpy((void *) &ts_status_ioctl, (void *) &pwmm->param.ts_status,
+               sizeof(ts_status_ioctl));
+        wrq->u.data.length = sizeof(ts_status_ioctl);
+    } else {
+        wrq->u.data.length = 0;
+    }
+
+    if (copy_to_user(wrq->u.data.pointer, &ts_status_ioctl, wrq->u.data.length)) {
+        PRINTM(MERROR, "TS_STATUS: copy to user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Private IOCTL entry to get the By-passed TX packet from upper layer
+ *
+ *  @param priv    Pointer to the moal_private driver data struct
+ *  @param wrq     A pointer to iwreq structure containing the packet
+ *
+ *  @return        0 if successful; IOCTL error code otherwise
+ */
+static int
+woal_bypassed_packet_ioctl(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0;
+    struct sk_buff *skb = NULL;
+    struct ethhdr *eth;
+    t_u16 moreLen = 0, copyLen = 0;
+    ENTER();
+
+#define MLAN_BYPASS_PKT_EXTRA_OFFSET        (4)
+
+    copyLen = wrq->u.data.length;
+    moreLen = MLAN_MIN_DATA_HEADER_LEN + MLAN_BYPASS_PKT_EXTRA_OFFSET
+        + sizeof(mlan_buffer);
+
+    skb = alloc_skb(copyLen + moreLen, GFP_KERNEL);
+    if (skb == NULL) {
+        PRINTM(MERROR, "kmalloc no memory !!\n");
+        LEAVE();
+        return -ENOMEM;
+    }
+
+    skb_reserve(skb, moreLen);
+
+    if (copy_from_user(skb_put(skb, copyLen), wrq->u.data.pointer, copyLen)) {
+        PRINTM(MERROR, "PortBlock: copy from user failed\n");
+        dev_kfree_skb_any(skb);
+        ret = -EFAULT;
+        goto done;
+    }
+
+    eth = (struct ethhdr *) skb->data;
+    eth->h_proto = __constant_htons(eth->h_proto);
+    skb->dev = priv->netdev;
+
+    HEXDUMP("Bypass TX Data", skb->data, MIN(skb->len, 100));
+
+    woal_hard_start_xmit(skb, priv->netdev);
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set/Get auth type
+ *
+ *  @param priv     Pointer to the moal_private driver data struct
+ *  @param wrq	    A pointer to iwreq structure
+ *
+ *  @return          0 --success, otherwise fail
+ */
+static int
+woal_auth_type(moal_private * priv, struct iwreq *wrq)
+{
+    int auth_type;
+    t_u32 auth_mode;
+    int ret = 0;
+
+    ENTER();
+    if (wrq->u.data.length == 0) {
+        if (MLAN_STATUS_SUCCESS !=
+            woal_get_auth_mode(priv, MOAL_IOCTL_WAIT, &auth_mode)) {
+            ret = -EFAULT;
+            goto done;
+        }
+        auth_type = auth_mode;
+        if (copy_to_user(wrq->u.data.pointer, &auth_type, sizeof(auth_type))) {
+            PRINTM(MERROR, "Copy to user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        wrq->u.data.length = 1;
+    } else {
+        if (copy_from_user(&auth_type, wrq->u.data.pointer, sizeof(auth_type))) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        PRINTM(MINFO, "SET: auth_type %d\n", auth_type);
+        if (((auth_type < MLAN_AUTH_MODE_OPEN) ||
+             (auth_type > MLAN_AUTH_MODE_SHARED))
+            && (auth_type != MLAN_AUTH_MODE_AUTO)) {
+            ret = -EINVAL;
+            goto done;
+        }
+        auth_mode = auth_type;
+        if (MLAN_STATUS_SUCCESS !=
+            woal_set_auth_mode(priv, MOAL_IOCTL_WAIT, auth_mode)) {
+            ret = -EFAULT;
+            goto done;
+        }
+    }
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set/Get Port Control mode
+ *
+ *  @param priv     Pointer to the moal_private driver data struct
+ *  @param wrq	    A pointer to iwreq structure
+ *
+ *  @return          0 --success, otherwise fail
+ */
+static int
+woal_port_ctrl(moal_private * priv, struct iwreq *wrq)
+{
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_sec_cfg *sec = NULL;
+    int ret = 0;
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_sec_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    sec = (mlan_ds_sec_cfg *) req->pbuf;
+    sec->sub_command = MLAN_OID_SEC_CFG_PORT_CTRL_ENABLED;
+    req->req_id = MLAN_IOCTL_SEC_CFG;
+
+    if (wrq->u.data.length) {
+        if (copy_from_user(&sec->param.port_ctrl_enabled,
+                           wrq->u.data.pointer, sizeof(int)) != 0) {
+            PRINTM(MERROR, "port_ctrl:Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        req->action = MLAN_ACT_SET;
+    } else {
+        req->action = MLAN_ACT_GET;
+    }
+
+    /* Send IOCTL request to MLAN */
+    if (woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT) != MLAN_STATUS_SUCCESS) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    if (!wrq->u.data.length) {
+        if (copy_to_user(wrq->u.data.pointer, &sec->param.port_ctrl_enabled,
+                         sizeof(int))) {
+            PRINTM(MERROR, "port_ctrl:Copy to user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        wrq->u.data.length = 1;
+    }
+
+  done:
+    if (req)
+        kfree(req);
+
+    LEAVE();
+    return ret;
+}
+
+/********************************************************
+		Global Functions
+********************************************************/
+
+/**
+ *  @brief Get response pointer in the scan table
+ *
+ *  @param scan_table   Scan table pointer
+ *  @param resp         response pointer to update
+ *  @param i            Index at which the response pointer is needed.
+ *
+ *  @return             MLAN_STATUS_SUCCESS
+ */
+t_u32
+wlan_get_scan_resp_index(t_u8 * scan_table, t_u8 ** resp, int i)
+{
+    wlan_ioctl_get_scan_table_entry *prsp_info;
+    int j, variable_size;
+    const int fixed_size = sizeof(wlan_ioctl_get_scan_table_entry);
+
+    ENTER();
+
+    prsp_info = (wlan_ioctl_get_scan_table_entry *) scan_table;
+
+    for (j = 0; j < i; ++j) {
+        variable_size = prsp_info->bss_info_length + fixed_size;
+        prsp_info = (wlan_ioctl_get_scan_table_entry *) ((t_u8 *) prsp_info
+                                                         + variable_size);
+    }
+
+    *resp = (t_u8 *) prsp_info;
+
+    LEAVE();
+
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief ioctl function - entry point
+ *
+ *  @param dev		A pointer to net_device structure
+ *  @param req	   	A pointer to ifreq structure
+ *  @param cmd 		Command
+ *
+ *  @return          0 --success, otherwise fail
+ */
+int
+woal_do_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    struct iwreq *wrq = (struct iwreq *) req;
+    int ret = 0;
+
+    ENTER();
+
+    PRINTM(MINFO, "woal_do_ioctl: ioctl cmd = 0x%x\n", cmd);
+    switch (cmd) {
+    case WOAL_SETONEINT_GETWORDCHAR:
+        switch (wrq->u.data.flags) {
+        case WOAL_VERSION:     /* Get driver version */
+            ret = woal_get_driver_version(priv, req);
+            break;
+        case WOAL_VEREXT:      /* Get extended driver version */
+            ret = woal_get_driver_verext(priv, req);
+            break;
+        default:
+            ret = -EOPNOTSUPP;
+            break;
+        }
+        break;
+    case WOAL_SETNONE_GETNONE:
+        switch (wrq->u.data.flags) {
+        case WOAL_WARMRESET:
+            ret = woal_warm_reset(priv);
+            break;
+        case WOAL_USB_SUSPEND:
+            ret = woal_enter_usb_suspend(priv->phandle);
+            break;
+        case WOAL_USB_RESUME:
+            ret = woal_exit_usb_suspend(priv->phandle);
+            break;
+        case WOAL_11D_CLR_CHAN_TABLE:
+            ret = woal_11d_clr_chan_table(priv, wrq);
+            break;
+        default:
+            ret = -EOPNOTSUPP;
+            break;
+        }
+        break;
+    case WOAL_SETONEINT_GETONEINT:
+        switch (wrq->u.data.flags) {
+        case WOAL_SET_GET_TXRATE:
+            ret = woal_set_get_txrate(priv, wrq);
+            break;
+        case WOAL_SET_GET_REGIONCODE:
+            ret = woal_set_get_regioncode(priv, wrq);
+            break;
+        case WOAL_SET_RADIO:
+            ret = woal_set_get_radio(priv, wrq);
+            break;
+        case WOAL_WMM_ENABLE:
+            ret = woal_wmm_enable_ioctl(priv, wrq);
+            break;
+        case WOAL_11D_ENABLE:
+            ret = woal_11d_enable_ioctl(priv, wrq);
+            break;
+        case WOAL_SET_GET_TX_RX_ANT:
+            ret = woal_set_get_tx_rx_ant(priv, wrq);
+            break;
+        case WOAL_SET_GET_QOS_CFG:
+            ret = woal_set_get_qos_cfg(priv, wrq);
+            break;
+#if defined(REASSOCIATION)
+        case WOAL_SET_GET_REASSOC:
+            ret = woal_set_get_reassoc(priv, wrq);
+            break;
+#endif /* REASSOCIATION */
+        case WOAL_TXBUF_CFG:
+            ret = woal_txbuf_cfg(priv, wrq);
+            break;
+        case WOAL_SET_GET_WWS_CFG:
+            ret = woal_wws_cfg(priv, wrq);
+            break;
+        case WOAL_SLEEP_PD:
+            ret = woal_sleep_pd(priv, wrq);
+            break;
+        case WOAL_AUTH_TYPE:
+            ret = woal_auth_type(priv, wrq);
+            break;
+        case WOAL_PORT_CTRL:
+            ret = woal_port_ctrl(priv, wrq);
+            break;
+#if defined(WFD_SUPPORT)
+#if defined(STA_SUPPORT) && defined(UAP_SUPPORT)
+        case WOAL_SET_GET_BSS_ROLE:
+            ret = woal_set_get_bss_role(priv, wrq);
+            break;
+#endif
+#endif
+        case WOAL_SET_GET_11H_LOCAL_PWR_CONSTRAINT:
+            ret = woal_set_get_11h_local_pwr_constraint(priv, wrq);
+            break;
+        case WOAL_MAC_CONTROL:
+            ret = woal_mac_control_ioctl(priv, wrq);
+            break;
+        case WOAL_THERMAL:
+            ret = woal_thermal_ioctl(priv, wrq);
+            break;
+        default:
+            ret = -EOPNOTSUPP;
+            break;
+        }
+        break;
+
+    case WOAL_SET_GET_SIXTEEN_INT:
+        switch ((int) wrq->u.data.flags) {
+        case WOAL_TX_POWERCFG:
+            ret = woal_tx_power_cfg(priv, wrq);
+            break;
+#ifdef DEBUG_LEVEL1
+        case WOAL_DRV_DBG:
+            ret = woal_drv_dbg(priv, wrq);
+            break;
+#endif
+        case WOAL_BEACON_INTERVAL:
+            ret = woal_beacon_interval(priv, wrq);
+            break;
+        case WOAL_SIGNAL:
+            ret = woal_get_signal(priv, wrq);
+            break;
+        case WOAL_HEART_BEAT:
+            ret = woal_heart_beat_ioctl(priv, wrq);
+            break;
+        case WOAL_11N_TX_CFG:
+            ret = woal_11n_tx_cfg(priv, wrq);
+            break;
+        case WOAL_11N_AMSDU_AGGR_CTRL:
+            ret = woal_11n_amsdu_aggr_ctrl(priv, wrq);
+            break;
+        case WOAL_11N_HTCAP_CFG:
+            ret = woal_11n_htcap_cfg(priv, wrq);
+            break;
+        case WOAL_PRIO_TBL:
+            ret = woal_11n_prio_tbl(priv, wrq);
+            break;
+        case WOAL_ADDBA_UPDT:
+            ret = woal_addba_para_updt(priv, wrq);
+            break;
+        case WOAL_ADDBA_REJECT:
+            ret = woal_addba_reject(priv, wrq);
+            break;
+        case WOAL_TX_BF_CAP:
+            ret = woal_tx_bf_cap_ioctl(priv, wrq);
+            break;
+        case WOAL_HS_CFG:
+            ret = woal_hs_cfg(priv, wrq, MTRUE);
+            break;
+        case WOAL_HS_SETPARA:
+            ret = woal_hs_setpara(priv, wrq);
+            break;
+        case WOAL_REG_READ_WRITE:
+            ret = woal_reg_read_write(priv, wrq);
+            break;
+        case WOAL_INACTIVITY_TIMEOUT_EXT:
+            ret = woal_inactivity_timeout_ext(priv, wrq);
+            break;
+        case WOAL_BAND_CFG:
+            ret = woal_band_cfg(priv, wrq);
+            break;
+        case WOAL_SCAN_CFG:
+            ret = woal_set_get_scan_cfg(priv, wrq);
+            break;
+        case WOAL_PS_CFG:
+            ret = woal_set_get_ps_cfg(priv, wrq);
+            break;
+        case WOAL_MEM_READ_WRITE:
+            ret = woal_mem_read_write(priv, wrq);
+            break;
+        case WOAL_SLEEP_PARAMS:
+            ret = woal_sleep_params_ioctl(priv, wrq);
+            break;
+        default:
+            ret = -EINVAL;
+            break;
+        }
+        break;
+
+    case WOALGETLOG:
+        ret = woal_get_log(priv, wrq);
+        break;
+
+    case WOAL_SET_GET_256_CHAR:
+        switch (wrq->u.data.flags) {
+        case WOAL_PASSPHRASE:
+            ret = woal_passphrase(priv, wrq);
+            break;
+        case WOAL_ADHOC_AES:
+            ret = woal_adhoc_aes_ioctl(priv, wrq);
+            break;
+        case WOAL_WMM_QUEUE_STATUS:
+            ret = woal_wmm_queue_status_ioctl(priv, wrq);
+            break;
+
+        case WOAL_WMM_TS_STATUS:
+            ret = woal_wmm_ts_status_ioctl(priv, wrq);
+            break;
+        case WOAL_IP_ADDRESS:
+            ret = woal_set_get_ip_addr(priv, wrq);
+            break;
+        default:
+            ret = -EINVAL;
+            break;
+        }
+        break;
+
+    case WOAL_SETADDR_GETNONE:
+        switch ((int) wrq->u.data.flags) {
+        case WOAL_DEAUTH:
+            ret = woal_deauth(priv, wrq);
+            break;
+        default:
+            ret = -EINVAL;
+            break;
+        }
+        break;
+
+    case WOAL_SETNONE_GETTWELVE_CHAR:
+        /* 
+         * We've not used IW_PRIV_TYPE_FIXED so sub-ioctl number is
+         * in flags of iwreq structure, otherwise it will be in
+         * mode member of iwreq structure.
+         */
+        switch ((int) wrq->u.data.flags) {
+        case WOAL_WPS_SESSION:
+            ret = woal_wps_cfg_ioctl(priv, wrq);
+            break;
+        default:
+            ret = -EINVAL;
+            break;
+        }
+        break;
+    case WOAL_SETNONE_GET_FOUR_INT:
+        switch ((int) wrq->u.data.flags) {
+        case WOAL_DATA_RATE:
+            ret = woal_get_txrx_rate(priv, wrq);
+            break;
+        case WOAL_ESUPP_MODE:
+            ret = woal_get_esupp_mode(priv, wrq);
+            break;
+        default:
+            ret = -EINVAL;
+            break;
+        }
+        break;
+
+    case WOAL_SET_GET_64_INT:
+        switch ((int) wrq->u.data.flags) {
+        case WOAL_ECL_SYS_CLOCK:
+            ret = woal_ecl_sys_clock(priv, wrq);
+            break;
+        }
+
+        break;
+
+    case WOAL_HOST_CMD:
+        ret = woal_host_command(priv, wrq);
+        break;
+    case WOAL_ARP_FILTER:
+        ret = woal_arp_filter(priv, wrq);
+        break;
+    case WOAL_SET_INTS_GET_CHARS:
+        switch ((int) wrq->u.data.flags) {
+        case WOAL_READ_EEPROM:
+            ret = woal_read_eeprom(priv, wrq);
+            break;
+        }
+        break;
+    case WOAL_SET_GET_2K_BYTES:
+        switch ((int) wrq->u.data.flags) {
+        case WOAL_SET_USER_SCAN:
+            ret = woal_set_user_scan_ioctl(priv, wrq);
+            break;
+        case WOAL_GET_SCAN_TABLE:
+            ret = woal_get_scan_table_ioctl(priv, wrq);
+            break;
+        case WOAL_WMM_ADDTS:
+            ret = woal_wmm_addts_req_ioctl(priv, wrq);
+            break;
+        case WOAL_WMM_DELTS:
+            ret = woal_wmm_delts_req_ioctl(priv, wrq);
+            break;
+        case WOAL_WMM_QUEUE_CONFIG:
+            ret = woal_wmm_queue_config_ioctl(priv, wrq);
+            break;
+        case WOAL_WMM_QUEUE_STATS:
+            ret = woal_wmm_queue_stats_ioctl(priv, wrq);
+            break;
+        case WOAL_BYPASSED_PACKET:
+            ret = woal_bypassed_packet_ioctl(priv, wrq);
+            break;
+        default:
+            ret = -EINVAL;
+            break;
+        }
+        break;
+
+#ifdef WFD_SUPPORT
+    case WOAL_WFD_HOST_CMD:
+        ret = woal_hostcmd_ioctl(dev, req);
+        break;
+#endif
+    case WOAL_FROYO_START:
+        break;
+    case WOAL_FROYO_WL_FW_RELOAD:
+        break;
+    case WOAL_FROYO_STOP:
+        if (MLAN_STATUS_SUCCESS != woal_disconnect(priv, MOAL_IOCTL_WAIT, NULL)) {
+            ret = -EFAULT;
+        }
+        break;
+    case WOAL_CUSTOM_IE_CFG:
+        ret = woal_custom_ie_ioctl(dev, req);
+        break;
+    case WOAL_GET_BSS_TYPE:
+        ret = woal_get_bss_type(dev, req);
+        break;
+    default:
+        ret = -EINVAL;
+        break;
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Get mode
+ *
+ *  @param priv          A pointer to moal_private structure
+ *  @param wait_option   Wait option (MOAL_WAIT or MOAL_NO_WAIT)   
+ *
+ *  @return              Wireless mode
+ */
+t_u32
+woal_get_mode(moal_private * priv, t_u8 wait_option)
+{
+    int ret = 0;
+    mlan_ds_bss *bss = NULL;
+    mlan_ioctl_req *req = NULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    t_u32 mode = priv->w_stats.status;
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_bss));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    bss = (mlan_ds_bss *) req->pbuf;
+    bss->sub_command = MLAN_OID_BSS_MODE;
+    req->req_id = MLAN_IOCTL_BSS;
+    req->action = MLAN_ACT_GET;
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, wait_option);
+    if (status == MLAN_STATUS_SUCCESS) {
+        switch (bss->param.bss_mode) {
+        case MLAN_BSS_MODE_INFRA:
+            mode = IW_MODE_INFRA;
+            break;
+        case MLAN_BSS_MODE_IBSS:
+            mode = IW_MODE_ADHOC;
+            break;
+        default:
+            mode = IW_MODE_AUTO;
+            break;
+        }
+    }
+  done:
+    if (req && (status != MLAN_STATUS_PENDING))
+        kfree(req);
+    LEAVE();
+    return mode;
+}
+
+/** 
+ *  @brief Get RSSI info
+ *
+ *  @param priv         A pointer to moal_private structure
+ *  @param wait_option  Wait option
+ *  @param signal       A pointer tp mlan_ds_get_signal structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail          
+ */
+mlan_status
+woal_get_signal_info(moal_private * priv, t_u8 wait_option,
+                     mlan_ds_get_signal * signal)
+{
+    int ret = 0;
+    mlan_ds_get_info *info = NULL;
+    mlan_ioctl_req *req = NULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_get_info));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    info = (mlan_ds_get_info *) req->pbuf;
+    info->sub_command = MLAN_OID_GET_SIGNAL;
+    info->param.signal.selector = ALL_RSSI_INFO_MASK;
+    req->req_id = MLAN_IOCTL_GET_INFO;
+    req->action = MLAN_ACT_GET;
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, wait_option);
+    if (status == MLAN_STATUS_SUCCESS) {
+        if (signal)
+            memcpy(signal, &info->param.signal, sizeof(mlan_ds_get_signal));
+        if (info->param.signal.selector & BCN_RSSI_AVG_MASK)
+            priv->w_stats.qual.level = info->param.signal.bcn_rssi_avg;
+        if (info->param.signal.selector & BCN_NF_AVG_MASK)
+            priv->w_stats.qual.noise = info->param.signal.bcn_nf_avg;
+    }
+  done:
+    if (req && (status != MLAN_STATUS_PENDING))
+        kfree(req);
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Get statistics information
+ *
+ *  @param priv         A pointer to moal_private structure
+ *  @param wait_option  Wait option
+ *  @param stats        A pointer to mlan_ds_get_stats structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail          
+ */
+mlan_status
+woal_get_stats_info(moal_private * priv, t_u8 wait_option,
+                    mlan_ds_get_stats * stats)
+{
+    int ret = 0;
+    mlan_ds_get_info *info = NULL;
+    mlan_ioctl_req *req = NULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_get_info));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    info = (mlan_ds_get_info *) req->pbuf;
+    info->sub_command = MLAN_OID_GET_STATS;
+    req->req_id = MLAN_IOCTL_GET_INFO;
+    req->action = MLAN_ACT_GET;
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, wait_option);
+    if (status == MLAN_STATUS_SUCCESS) {
+        if (stats)
+            memcpy(stats, &info->param.stats, sizeof(mlan_ds_get_stats));
+        priv->w_stats.discard.fragment = info->param.stats.fcs_error;
+        priv->w_stats.discard.retries = info->param.stats.retry;
+        priv->w_stats.discard.misc = info->param.stats.ack_failure;
+    }
+  done:
+    if (req && (status != MLAN_STATUS_PENDING))
+        kfree(req);
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Get data rates
+ *
+ *  @param priv          A pointer to moal_private structure
+ *  @param wait_option   Wait option
+ *  @param m_rates       A pointer to moal_802_11_rates structure
+ *
+ *  @return              MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail          
+ */
+mlan_status
+woal_get_data_rates(moal_private * priv, t_u8 wait_option,
+                    moal_802_11_rates * m_rates)
+{
+    int ret = 0;
+    mlan_ds_rate *rate = NULL;
+    mlan_ioctl_req *req = NULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_rate));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    rate = (mlan_ds_rate *) req->pbuf;
+    rate->sub_command = MLAN_OID_SUPPORTED_RATES;
+    req->req_id = MLAN_IOCTL_RATE;
+    req->action = MLAN_ACT_GET;
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, wait_option);
+    if (status == MLAN_STATUS_SUCCESS) {
+        if (m_rates)
+            m_rates->num_of_rates =
+                woal_copy_rates(m_rates->rates, m_rates->num_of_rates,
+                                rate->param.rates, MLAN_SUPPORTED_RATES);
+    }
+  done:
+    if (req && (status != MLAN_STATUS_PENDING))
+        kfree(req);
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Get channel list
+ *
+ *  @param priv            A pointer to moal_private structure
+ *  @param wait_option     Wait option
+ *  @param chan_list       A pointer to mlan_chan_list structure
+ *
+ *  @return                MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail          
+ */
+mlan_status
+woal_get_channel_list(moal_private * priv, t_u8 wait_option,
+                      mlan_chan_list * chan_list)
+{
+    int ret = 0;
+    mlan_ds_bss *bss = NULL;
+    mlan_ioctl_req *req = NULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_bss));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    bss = (mlan_ds_bss *) req->pbuf;
+    bss->sub_command = MLAN_OID_BSS_CHANNEL_LIST;
+    req->req_id = MLAN_IOCTL_BSS;
+    req->action = MLAN_ACT_GET;
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, wait_option);
+    if (status == MLAN_STATUS_SUCCESS) {
+        if (chan_list) {
+            memcpy(chan_list, &bss->param.chanlist, sizeof(mlan_chan_list));
+        }
+    }
+  done:
+    if (req && (status != MLAN_STATUS_PENDING))
+        kfree(req);
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Get scan table
+ *
+ *  @param priv         A pointer to moal_private structure
+ *  @param wait_option  Wait option
+ *  @param scan_resp    A pointer to mlan_scan_resp structure
+ *
+ *  @return             MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail
+ */
+mlan_status
+woal_get_scan_table(moal_private * priv, t_u8 wait_option,
+                    mlan_scan_resp * scan_resp)
+{
+    int ret = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_scan *scan = NULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_scan));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    scan = (mlan_ds_scan *) req->pbuf;
+    scan->sub_command = MLAN_OID_SCAN_NORMAL;
+    req->req_id = MLAN_IOCTL_SCAN;
+    req->action = MLAN_ACT_GET;
+    memcpy((void *) &scan->param.scan_resp, (void *) scan_resp,
+           sizeof(mlan_scan_resp));
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, wait_option);
+    if (status == MLAN_STATUS_SUCCESS) {
+        if (scan_resp) {
+            memcpy(scan_resp, &scan->param.scan_resp, sizeof(mlan_scan_resp));
+        }
+    }
+
+  done:
+    if (req && (status != MLAN_STATUS_PENDING))
+        kfree(req);
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Set authentication mode
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param wait_option          Wait option
+ *  @param auth_mode            Authentication mode
+ *
+ *  @return                     MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail          
+ */
+mlan_status
+woal_set_auth_mode(moal_private * priv, t_u8 wait_option, t_u32 auth_mode)
+{
+    int ret = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_sec_cfg *sec = NULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_sec_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    sec = (mlan_ds_sec_cfg *) req->pbuf;
+    sec->sub_command = MLAN_OID_SEC_CFG_AUTH_MODE;
+    req->req_id = MLAN_IOCTL_SEC_CFG;
+    req->action = MLAN_ACT_SET;
+    sec->param.auth_mode = auth_mode;
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, wait_option);
+  done:
+    if (req && (status != MLAN_STATUS_PENDING))
+        kfree(req);
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Get authentication mode
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param wait_option          Wait option
+ *  @param auth_mode            A pointer to authentication mode
+ *
+ *  @return                     MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail          
+ */
+mlan_status
+woal_get_auth_mode(moal_private * priv, t_u8 wait_option, t_u32 * auth_mode)
+{
+    int ret = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_sec_cfg *sec = NULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_sec_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    sec = (mlan_ds_sec_cfg *) req->pbuf;
+    sec->sub_command = MLAN_OID_SEC_CFG_AUTH_MODE;
+    req->req_id = MLAN_IOCTL_SEC_CFG;
+    req->action = MLAN_ACT_GET;
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, wait_option);
+    if (status == MLAN_STATUS_SUCCESS && auth_mode) {
+        *auth_mode = sec->param.auth_mode;
+    }
+  done:
+    if (req && (status != MLAN_STATUS_PENDING))
+        kfree(req);
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Set encrypt mode
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param wait_option          Wait option
+ *  @param encrypt_mode         Encryption mode
+ *
+ *  @return                     MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail          
+ */
+mlan_status
+woal_set_encrypt_mode(moal_private * priv, t_u8 wait_option, t_u32 encrypt_mode)
+{
+    int ret = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_sec_cfg *sec = NULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_sec_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    sec = (mlan_ds_sec_cfg *) req->pbuf;
+    sec->sub_command = MLAN_OID_SEC_CFG_ENCRYPT_MODE;
+    req->req_id = MLAN_IOCTL_SEC_CFG;
+    req->action = MLAN_ACT_SET;
+    sec->param.encrypt_mode = encrypt_mode;
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, wait_option);
+  done:
+    if (req && (status != MLAN_STATUS_PENDING))
+        kfree(req);
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Get encrypt mode
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param wait_option          Wait option
+ *  @param encrypt_mode         A pointer to encrypt mode
+ *
+ *  @return                     MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail          
+ */
+mlan_status
+woal_get_encrypt_mode(moal_private * priv, t_u8 wait_option,
+                      t_u32 * encrypt_mode)
+{
+    int ret = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_sec_cfg *sec = NULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_sec_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    sec = (mlan_ds_sec_cfg *) req->pbuf;
+    sec->sub_command = MLAN_OID_SEC_CFG_ENCRYPT_MODE;
+    req->req_id = MLAN_IOCTL_SEC_CFG;
+    req->action = MLAN_ACT_GET;
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, wait_option);
+    if (status == MLAN_STATUS_SUCCESS && encrypt_mode) {
+        *encrypt_mode = sec->param.encrypt_mode;
+    }
+  done:
+    if (req && (status != MLAN_STATUS_PENDING))
+        kfree(req);
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Set wpa enable
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param wait_option          Wait option
+ *  @param enable               MTRUE or MFALSE
+ *
+ *  @return                     MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail          
+ */
+mlan_status
+woal_set_wpa_enable(moal_private * priv, t_u8 wait_option, t_u32 enable)
+{
+    int ret = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_sec_cfg *sec = NULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_sec_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    sec = (mlan_ds_sec_cfg *) req->pbuf;
+    sec->sub_command = MLAN_OID_SEC_CFG_WPA_ENABLED;
+    req->req_id = MLAN_IOCTL_SEC_CFG;
+    req->action = MLAN_ACT_SET;
+    sec->param.wpa_enabled = enable;
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, wait_option);
+  done:
+    if (req && (status != MLAN_STATUS_PENDING))
+        kfree(req);
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Get WPA enable
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param wait_option          Wait option
+ *  @param enable               A pointer to wpa enable status
+ *
+ *  @return                     MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail          
+ */
+mlan_status
+woal_get_wpa_enable(moal_private * priv, t_u8 wait_option, t_u32 * enable)
+{
+    int ret = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_sec_cfg *sec = NULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_sec_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    sec = (mlan_ds_sec_cfg *) req->pbuf;
+    sec->sub_command = MLAN_OID_SEC_CFG_WPA_ENABLED;
+    req->req_id = MLAN_IOCTL_SEC_CFG;
+    req->action = MLAN_ACT_GET;
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, wait_option);
+    if (status == MLAN_STATUS_SUCCESS && enable) {
+        *enable = sec->param.wpa_enabled;
+    }
+  done:
+    if (req && (status != MLAN_STATUS_PENDING))
+        kfree(req);
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Find the best network to associate
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param wait_option          Wait option  
+ *  @param ssid_bssid           A pointer to mlan_ssid_bssid structure
+ *
+ *  @return                     MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail          
+ */
+mlan_status
+woal_find_best_network(moal_private * priv, t_u8 wait_option,
+                       mlan_ssid_bssid * ssid_bssid)
+{
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_bss *bss = NULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    t_u8 *mac = 0;
+
+    ENTER();
+
+    if (!ssid_bssid) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_bss));
+    if (req == NULL) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    bss = (mlan_ds_bss *) req->pbuf;
+    req->req_id = MLAN_IOCTL_BSS;
+    req->action = MLAN_ACT_GET;
+    bss->sub_command = MLAN_OID_BSS_FIND_BSS;
+
+    memcpy(&bss->param.ssid_bssid, ssid_bssid, sizeof(mlan_ssid_bssid));
+
+    /* Send IOCTL request to MLAN */
+    ret = woal_request_ioctl(priv, req, wait_option);
+    if (ret == MLAN_STATUS_SUCCESS) {
+        memcpy(ssid_bssid, &bss->param.ssid_bssid, sizeof(mlan_ssid_bssid));
+        mac = (t_u8 *) & ssid_bssid->bssid;
+        PRINTM(MINFO,
+               "Find network: ssid=%s, %02x:%02x:%02x:%02x:%02x:%02x, idx=%d\n",
+               ssid_bssid->ssid.ssid, mac[0], mac[1], mac[2], mac[3], mac[4],
+               mac[5], (int) ssid_bssid->idx);
+    }
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Request a scan
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param wait_option          Wait option  
+ *  @param req_ssid             A pointer to mlan_802_11_ssid structure
+ *
+ *  @return                     MLAN_STATUS_SUCCESS -- success, otherwise fail          
+ */
+mlan_status
+woal_request_scan(moal_private * priv,
+                  t_u8 wait_option, mlan_802_11_ssid * req_ssid)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    moal_handle *handle = priv->phandle;
+    mlan_ioctl_req *ioctl_req = NULL;
+    mlan_ds_scan *scan = NULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    ENTER();
+
+    if (MOAL_ACQ_SEMAPHORE_BLOCK(&handle->async_sem)) {
+        PRINTM(MERROR, "Acquire semaphore error, request_scan\n");
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+    handle->scan_pending_on_block = MTRUE;
+
+    /* Allocate an IOCTL request buffer */
+    ioctl_req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_scan));
+    if (ioctl_req == NULL) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    scan = (mlan_ds_scan *) ioctl_req->pbuf;
+
+    if (req_ssid && req_ssid->ssid_len != 0) {
+        /* Specific SSID scan */
+        ioctl_req->req_id = MLAN_IOCTL_SCAN;
+        ioctl_req->action = MLAN_ACT_SET;
+
+        scan->sub_command = MLAN_OID_SCAN_SPECIFIC_SSID;
+
+        memcpy(scan->param.scan_req.scan_ssid.ssid,
+               req_ssid->ssid, req_ssid->ssid_len);
+        scan->param.scan_req.scan_ssid.ssid_len = req_ssid->ssid_len;
+    } else {
+        /* Normal scan */
+        ioctl_req->req_id = MLAN_IOCTL_SCAN;
+        ioctl_req->action = MLAN_ACT_SET;
+
+        scan->sub_command = MLAN_OID_SCAN_NORMAL;
+    }
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, ioctl_req, wait_option);
+
+    if (status == MLAN_STATUS_FAILURE) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+  done:
+    if ((ioctl_req) && (status != MLAN_STATUS_PENDING))
+        kfree(ioctl_req);
+
+    if (ret == MLAN_STATUS_FAILURE) {
+        handle->scan_pending_on_block = MFALSE;
+        MOAL_REL_SEMAPHORE(&handle->async_sem);
+    }
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Set ewpa mode
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param wait_option          Wait option
+ *  @param ssid_bssid           A pointer to mlan_ssid_bssid structure
+ *
+ *  @return                     MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail          
+ */
+mlan_status
+woal_set_ewpa_mode(moal_private * priv, t_u8 wait_option,
+                   mlan_ssid_bssid * ssid_bssid)
+{
+    int ret = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_sec_cfg *sec = NULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_sec_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto error;
+    }
+    /* Fill request buffer */
+    sec = (mlan_ds_sec_cfg *) req->pbuf;
+    sec->sub_command = MLAN_OID_SEC_CFG_PASSPHRASE;
+    req->req_id = MLAN_IOCTL_SEC_CFG;
+    req->action = MLAN_ACT_GET;
+
+    /* Try Get All */
+    memset(&sec->param.passphrase, 0, sizeof(mlan_ds_passphrase));
+    memcpy(&sec->param.passphrase.ssid, &ssid_bssid->ssid,
+           sizeof(sec->param.passphrase.ssid));
+    memcpy(&sec->param.passphrase.bssid, &ssid_bssid->bssid,
+           MLAN_MAC_ADDR_LENGTH);
+    sec->param.passphrase.psk_type = MLAN_PSK_QUERY;
+
+    /* Send IOCTL request to MLAN */
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, wait_option))
+        goto error;
+    sec->param.ewpa_enabled = MFALSE;
+    if (sec->param.passphrase.psk_type == MLAN_PSK_PASSPHRASE) {
+        if (sec->param.passphrase.psk.passphrase.passphrase_len > 0) {
+            sec->param.ewpa_enabled = MTRUE;
+        }
+    } else if (sec->param.passphrase.psk_type == MLAN_PSK_PMK)
+        sec->param.ewpa_enabled = MTRUE;
+
+    sec->sub_command = MLAN_OID_SEC_CFG_EWPA_ENABLED;
+    req->action = MLAN_ACT_SET;
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, wait_option);
+
+  error:
+    if (req && (status != MLAN_STATUS_PENDING))
+        kfree(req);
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief Change Adhoc Channel
+ *   
+ *  @param priv 		A pointer to moal_private structure
+ *  @param channel		The channel to be set. 
+ *
+ *  @return 	   		MLAN_STATUS_SUCCESS--success, MLAN_STATUS_FAILURE--fail
+ */
+mlan_status
+woal_change_adhoc_chan(moal_private * priv, int channel)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_bss_info bss_info;
+    mlan_ds_bss *bss = NULL;
+    mlan_ioctl_req *req = NULL;
+
+    ENTER();
+
+    memset(&bss_info, 0, sizeof(bss_info));
+
+    /* Get BSS information */
+    if (MLAN_STATUS_SUCCESS !=
+        woal_get_bss_info(priv, MOAL_IOCTL_WAIT, &bss_info)) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+    if (bss_info.bss_mode == MLAN_BSS_MODE_INFRA) {
+        ret = MLAN_STATUS_SUCCESS;
+        goto done;
+    }
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_bss));
+    if (req == NULL) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* Get current channel */
+    bss = (mlan_ds_bss *) req->pbuf;
+    bss->sub_command = MLAN_OID_IBSS_CHANNEL;
+    req->req_id = MLAN_IOCTL_BSS;
+    req->action = MLAN_ACT_GET;
+
+    /* Send IOCTL request to MLAN */
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+    if (bss->param.bss_chan.channel == (unsigned int) channel) {
+        ret = MLAN_STATUS_SUCCESS;
+        goto done;
+    }
+    PRINTM(MINFO, "Updating Channel from %d to %d\n",
+           (int) bss->param.bss_chan.channel, channel);
+
+    if (bss_info.media_connected != MTRUE) {
+        ret = MLAN_STATUS_SUCCESS;
+        goto done;
+    }
+
+    /* Do disonnect */
+    bss->sub_command = MLAN_OID_BSS_STOP;
+    memset((t_u8 *) & bss->param.bssid, 0, ETH_ALEN);
+
+    /* Send IOCTL request to MLAN */
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* Do specific SSID scanning */
+    if (MLAN_STATUS_SUCCESS !=
+        woal_request_scan(priv, MOAL_IOCTL_WAIT, &bss_info.ssid)) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+    /* Start/Join Adhoc network */
+    bss->sub_command = MLAN_OID_BSS_START;
+    memset(&bss->param.ssid_bssid, 0, sizeof(mlan_ssid_bssid));
+    memcpy(&bss->param.ssid_bssid.ssid, &bss_info.ssid,
+           sizeof(mlan_802_11_ssid));
+
+    /* Send IOCTL request to MLAN */
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = MLAN_STATUS_FAILURE;
+    }
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief enable wep key 
+ *  
+ *  @param priv                 A pointer to moal_private structure
+ *  @param wait_option          Wait option
+ *
+ *  @return                     MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail          
+ */
+mlan_status
+woal_enable_wep_key(moal_private * priv, t_u8 wait_option)
+{
+    int ret = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_sec_cfg *sec = NULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_sec_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    sec = (mlan_ds_sec_cfg *) req->pbuf;
+    sec->sub_command = MLAN_OID_SEC_CFG_ENCRYPT_KEY;
+    req->req_id = MLAN_IOCTL_SEC_CFG;
+    req->action = MLAN_ACT_SET;
+    sec->param.encrypt_key.key_disable = MFALSE;
+    sec->param.encrypt_key.key_index = MLAN_KEY_INDEX_DEFAULT;
+    sec->param.encrypt_key.is_current_wep_key = MTRUE;
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, wait_option);
+  done:
+    if (req && (status != MLAN_STATUS_PENDING))
+        kfree(req);
+    LEAVE();
+    return status;
+}
+
+#if WIRELESS_EXT > 14
+
+/** 
+ *  @brief This function sends customized event to application.
+ *  
+ *  @param priv    A pointer to moal_private structure
+ *  @param str	   A pointer to event string
+ *
+ *  @return 	   N/A
+ */
+void
+woal_send_iwevcustom_event(moal_private * priv, t_s8 * str)
+{
+    union iwreq_data iwrq;
+    char buf[IW_CUSTOM_MAX];
+
+    ENTER();
+
+    memset(&iwrq, 0, sizeof(union iwreq_data));
+    memset(buf, 0, sizeof(buf));
+
+    snprintf(buf, sizeof(buf) - 1, "%s", str);
+
+    iwrq.data.pointer = buf;
+    iwrq.data.length = strlen(buf) + 1;
+
+    /* Send Event to upper layer */
+    wireless_send_event(priv->netdev, IWEVCUSTOM, &iwrq, buf);
+    PRINTM(MINFO, "Wireless event %s is sent to application\n", str);
+
+    LEAVE();
+    return;
+}
+#endif
+
+#if WIRELESS_EXT >= 18
+/** 
+ *  @brief This function sends mic error event to application.
+ *  
+ *  @param priv    A pointer to moal_private structure
+ *  @param event   MIC MERROR EVENT. 
+ *
+ *  @return 	   N/A
+ */
+void
+woal_send_mic_error_event(moal_private * priv, t_u32 event)
+{
+    union iwreq_data iwrq;
+    struct iw_michaelmicfailure mic;
+
+    ENTER();
+
+    memset(&iwrq, 0, sizeof(iwrq));
+    memset(&mic, 0, sizeof(mic));
+    if (event == MLAN_EVENT_ID_FW_MIC_ERR_UNI)
+        mic.flags = IW_MICFAILURE_PAIRWISE;
+    else
+        mic.flags = IW_MICFAILURE_GROUP;
+    iwrq.data.pointer = &mic;
+    iwrq.data.length = sizeof(mic);
+
+    wireless_send_event(priv->netdev, IWEVMICHAELMICFAILURE, &iwrq,
+                        (char *) &mic);
+
+    LEAVE();
+    return;
+}
+#endif
+
+/** 
+ *  @brief Handle get info resp 
+ *   
+ *  @param priv 	Pointer to moal_private structure
+ *  @param info 	Pointer to mlan_ds_get_info structure
+ *
+ *  @return    		N/A
+ */
+void
+woal_ioctl_get_info_resp(moal_private * priv, mlan_ds_get_info * info)
+{
+    ENTER();
+    switch (info->sub_command) {
+    case MLAN_OID_GET_STATS:
+        priv->w_stats.discard.fragment = info->param.stats.fcs_error;
+        priv->w_stats.discard.retries = info->param.stats.retry;
+        priv->w_stats.discard.misc = info->param.stats.ack_failure;
+        break;
+    case MLAN_OID_GET_SIGNAL:
+        if (info->param.signal.selector & BCN_RSSI_AVG_MASK)
+            priv->w_stats.qual.level = info->param.signal.bcn_rssi_avg;
+        if (info->param.signal.selector & BCN_NF_AVG_MASK)
+            priv->w_stats.qual.noise = info->param.signal.bcn_nf_avg;
+        break;
+    default:
+        break;
+    }
+    LEAVE();
+}
+
+/** 
+ *  @brief Handle get BSS resp 
+ *   
+ *  @param priv 	Pointer to moal_private structure
+ *  @param bss 		Pointer to mlan_ds_bss structure
+ *
+ *  @return    		N/A
+ */
+void
+woal_ioctl_get_bss_resp(moal_private * priv, mlan_ds_bss * bss)
+{
+    t_u32 mode = 0;
+
+    ENTER();
+
+    switch (bss->sub_command) {
+    case MLAN_OID_BSS_MODE:
+        if (bss->param.bss_mode == MLAN_BSS_MODE_INFRA)
+            mode = IW_MODE_INFRA;
+        else if (bss->param.bss_mode == MLAN_BSS_MODE_IBSS)
+            mode = IW_MODE_ADHOC;
+        else
+            mode = IW_MODE_AUTO;
+        priv->w_stats.status = mode;
+        break;
+    default:
+        break;
+    }
+
+    LEAVE();
+    return;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_priv.h linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_priv.h
--- linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_priv.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_priv.h	2017-09-23 03:42:50.166674612 +0800
@@ -0,0 +1,664 @@
+/** @file moal_priv.h
+ *
+ * @brief This file contains definition for extended private IOCTL call.
+ *  
+ * Copyright (C) 2008-2011, Marvell International Ltd.  
+ *
+ * This software file (the "File") is distributed by Marvell International 
+ * Ltd. under the terms of the GNU General Public License Version 2, June 1991 
+ * (the "License").  You may use, redistribute and/or modify this File in 
+ * accordance with the terms and conditions of the License, a copy of which 
+ * is available by writing to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
+ * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
+ *
+ * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 
+ * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about 
+ * this warranty disclaimer.
+ *
+ */
+
+/********************************************************
+Change log:
+    10/31/2008: initial version
+********************************************************/
+
+#ifndef _WOAL_PRIV_H_
+#define _WOAL_PRIV_H_
+
+/** Command disabled */
+#define	CMD_DISABLED				0
+/** Command enabled */
+#define	CMD_ENABLED				1
+/** Command get */
+#define	CMD_GET					2
+
+/** 2K bytes */
+#define WOAL_2K_BYTES       2000
+
+/** PRIVATE CMD ID */
+#define WOAL_IOCTL                  (SIOCIWFIRSTPRIV)   /* 0x8BE0 defined in
+                                                           wireless.h */
+
+/** Private command ID to set one int/get word char */
+#define WOAL_SETONEINT_GETWORDCHAR  (WOAL_IOCTL + 1)
+/** Private command ID to get version */
+#define WOAL_VERSION                1
+/** Private command ID to get extended version */
+#define WOAL_VEREXT                 2
+
+/** Private command ID to set/get none */
+#define WOAL_SETNONE_GETNONE        (WOAL_IOCTL + 2)
+/** Private command ID for warm reset */
+#define WOAL_WARMRESET              1
+/** Private command ID for usb suspend */
+#define WOAL_USB_SUSPEND            2
+/** Private command ID for usb resume */
+#define WOAL_USB_RESUME             3
+/** Private command ID to clear 11d chan table */
+#define WOAL_11D_CLR_CHAN_TABLE     4
+
+/** Private command ID to set/get sixteen int */
+#define WOAL_SET_GET_SIXTEEN_INT    (WOAL_IOCTL + 3)
+/** Private command ID to set/get TX power configurations */
+#define WOAL_TX_POWERCFG            1
+#ifdef DEBUG_LEVEL1
+/** Private command ID to set/get driver debug */
+#define WOAL_DRV_DBG                2
+#endif
+/** Private command ID to set/get beacon interval */
+#define WOAL_BEACON_INTERVAL        3
+/** Private command ID to get RSSI */
+#define WOAL_SIGNAL                 5
+/** Private command ID to enable/disable heart beat */
+#define WOAL_HEART_BEAT             6
+/** Private command ID for 11n ht configration */
+#define WOAL_11N_TX_CFG             8
+/** Private command ID for 11n usr ht configration */
+#define WOAL_11N_HTCAP_CFG          9
+/** Private command ID for TX Aggregation */
+#define WOAL_PRIO_TBL               10
+/** Private command ID for Updating ADDBA variables */
+#define WOAL_ADDBA_UPDT             11
+/** Private command ID to set/get Host Sleep configuration */
+#define WOAL_HS_CFG                 12
+/** Private command ID to set Host Sleep parameters */
+#define WOAL_HS_SETPARA             13
+/** Private command ID to read/write registers */
+#define WOAL_REG_READ_WRITE         14
+/** Private command ID to set/get band/adhocband */
+#define WOAL_BAND_CFG               15
+/** Private command ID for TX Aggregation */
+#define WOAL_11N_AMSDU_AGGR_CTRL    17
+/** Private command ID to set/get Inactivity timeout */
+#define WOAL_INACTIVITY_TIMEOUT_EXT 18
+/** Private command ID to set/get scan configuration parameter */
+#define WOAL_SCAN_CFG               21
+/** Private command ID to set/get PS configuration parameter */
+#define WOAL_PS_CFG                 22
+/** Private command ID to read/write memory */
+#define WOAL_MEM_READ_WRITE         23
+/** Private command ID for Updating ADDBA variables */
+#define WOAL_ADDBA_REJECT           27
+/** Private command ID to set/get sleep parameters */
+#define WOAL_SLEEP_PARAMS           28
+/** Private command ID to set/get TX BF capabilities */
+#define WOAL_TX_BF_CAP              31
+
+/** Private command ID to set one int/get one int */
+#define WOAL_SETONEINT_GETONEINT    (WOAL_IOCTL + 5)
+/** Private command ID to set/get Tx rate */
+#define WOAL_SET_GET_TXRATE         1
+/** Private command ID to set/get region code */
+#define WOAL_SET_GET_REGIONCODE     2
+/** Private command ID to turn on/off radio */
+#define WOAL_SET_RADIO              3
+/** Private command ID to enable WMM */
+#define WOAL_WMM_ENABLE	    	    4
+/** Private command ID to enable 802.11D */
+#define WOAL_11D_ENABLE	    	    5
+/** Private command ID to set/get tx/rx antenna */
+#define WOAL_SET_GET_TX_RX_ANT      6
+/** Private command ID to set/get QoS configuration */
+#define WOAL_SET_GET_QOS_CFG        7
+#if defined(REASSOCIATION)
+/** Private command ID to set/get reassociation setting */
+#define WOAL_SET_GET_REASSOC        9
+#endif /* REASSOCIATION */
+/** Private command ID for Updating Transmit buffer configration */
+#define WOAL_TXBUF_CFG              10
+/** Private command ID to set/get WWS mode */
+#define	WOAL_SET_GET_WWS_CFG        12
+/** Private command ID to set/get sleep period */
+#define WOAL_SLEEP_PD               13
+/** Private command ID to set/get auth type */
+#define WOAL_AUTH_TYPE              18
+/** Private command ID to set/get port control */
+#define WOAL_PORT_CTRL              19
+#if defined(WFD_SUPPORT)
+#if defined(STA_SUPPORT) && defined(UAP_SUPPORT)
+/** Private command ID for set/get BSS role */
+#define WOAL_SET_GET_BSS_ROLE       21
+#endif
+#endif
+/** Private command ID for set/get 11h local power constraint */
+#define WOAL_SET_GET_11H_LOCAL_PWR_CONSTRAINT 22
+/** Private command ID to set/get MAC control */
+#define WOAL_MAC_CONTROL            24
+/** Private command ID to get thermal value */
+#define WOAL_THERMAL                25
+
+/** Private command ID to get log */
+#define WOALGETLOG                  (WOAL_IOCTL + 7)
+
+/** Private command ID to set a wext address variable */
+#define WOAL_SETADDR_GETNONE        (WOAL_IOCTL + 8)
+/** Private command ID to send deauthentication */
+#define WOAL_DEAUTH                 1
+
+/** Private command to get/set 256 chars */
+#define WOAL_SET_GET_256_CHAR       (WOAL_IOCTL + 9)
+/** Private command to read/write passphrase */
+#define WOAL_PASSPHRASE             1
+/** Private command to get/set Ad-Hoc AES */
+#define WOAL_ADHOC_AES              2
+/** Private command ID to get WMM queue status */
+#define WOAL_WMM_QUEUE_STATUS       4
+/** Private command ID to get Traffic stream status */
+#define WOAL_WMM_TS_STATUS          5
+#define WOAL_IP_ADDRESS             7
+
+/** Get log buffer size */
+#define GETLOG_BUFSIZE              512
+
+/** Private command ID to set none/get twelve chars*/
+#define WOAL_SETNONE_GETTWELVE_CHAR (WOAL_IOCTL + 11)
+/** Private command ID for WPS session */
+#define WOAL_WPS_SESSION            1
+
+/** Private command ID to set none/get four int */
+#define WOAL_SETNONE_GET_FOUR_INT   (WOAL_IOCTL + 13)
+/** Private command ID to get data rates */
+#define WOAL_DATA_RATE              1
+/** Private command ID to get E-Supplicant mode */
+#define WOAL_ESUPP_MODE             2
+
+/** Private command to get/set 64 ints */
+#define WOAL_SET_GET_64_INT         (WOAL_IOCTL + 15)
+/** Private command ID to set/get ECL system clock */
+#define WOAL_ECL_SYS_CLOCK          1
+
+/** Private command ID for hostcmd */
+#define WOAL_HOST_CMD               (WOAL_IOCTL + 17)
+
+/** Private command ID for arpfilter */
+#define WOAL_ARP_FILTER             (WOAL_IOCTL + 19)
+
+/** Private command ID to set ints and get chars */
+#define WOAL_SET_INTS_GET_CHARS     (WOAL_IOCTL + 21)
+/** Private command ID to read EEPROM data */
+#define WOAL_READ_EEPROM            1
+
+/** Private command ID to set/get 2K bytes */
+#define WOAL_SET_GET_2K_BYTES       (WOAL_IOCTL + 23)
+
+/** Private command ID for setuserscan */
+#define WOAL_SET_USER_SCAN          3
+/** Private command ID for getscantable */
+#define WOAL_GET_SCAN_TABLE         4
+
+/** Private command ID to request ADDTS */
+#define WOAL_WMM_ADDTS              7
+/** Private command ID to request DELTS */
+#define WOAL_WMM_DELTS              8
+/** Private command ID to queue configuration */
+#define WOAL_WMM_QUEUE_CONFIG       9
+/** Private command ID to queue stats */
+#define WOAL_WMM_QUEUE_STATS        10
+/** Private command ID to Bypass auth packet */
+#define WOAL_BYPASSED_PACKET		11
+
+/** The following command IDs are for Froyo app */
+/** Private command ID to start driver */
+#define WOAL_FROYO_START            (WOAL_IOCTL + 28)
+/** Private command ID to reload FW */
+#define WOAL_FROYO_WL_FW_RELOAD     (WOAL_IOCTL + 29)
+/** Private command ID to stop driver */
+#define WOAL_FROYO_STOP             (WOAL_IOCTL + 30)
+
+/** Private command ID to pass custom IE list */
+#define WOAL_CUSTOM_IE_CFG          (SIOCDEVPRIVATE + 13)
+
+#ifdef WFD_SUPPORT
+/** Private command ID to Host command */
+#define	WOAL_WFD_HOST_CMD		(SIOCDEVPRIVATE + 1)
+#endif
+
+/** Private command ID to get BSS type */
+#define WOAL_GET_BSS_TYPE           (SIOCDEVPRIVATE + 15)
+
+/**
+ * iwpriv ioctl handlers
+ */
+static const struct iw_priv_args woal_private_args[] = {
+    {
+     WOAL_SETONEINT_GETWORDCHAR,
+     IW_PRIV_TYPE_INT | 1,
+     IW_PRIV_TYPE_CHAR | 128,
+     ""},
+    {
+     WOAL_VERSION,
+     IW_PRIV_TYPE_INT | 1,
+     IW_PRIV_TYPE_CHAR | 128,
+     "version"},
+    {
+     WOAL_VEREXT,
+     IW_PRIV_TYPE_INT | 1,
+     IW_PRIV_TYPE_CHAR | 128,
+     "verext"},
+    {
+     WOAL_SETNONE_GETNONE,
+     IW_PRIV_TYPE_NONE,
+     IW_PRIV_TYPE_NONE,
+     ""},
+    {
+     WOAL_WARMRESET,
+     IW_PRIV_TYPE_NONE,
+     IW_PRIV_TYPE_NONE,
+     "warmreset"},
+    {
+     WOAL_USB_SUSPEND,
+     IW_PRIV_TYPE_NONE,
+     IW_PRIV_TYPE_NONE,
+     "usbsuspend"},
+    {
+     WOAL_USB_RESUME,
+     IW_PRIV_TYPE_NONE,
+     IW_PRIV_TYPE_NONE,
+     "usbresume"},
+    {
+     WOAL_SETONEINT_GETONEINT,
+     IW_PRIV_TYPE_INT | 1,
+     IW_PRIV_TYPE_INT | 1,
+     ""},
+    {
+     WOAL_SET_GET_TXRATE,
+     IW_PRIV_TYPE_INT | 1,
+     IW_PRIV_TYPE_INT | 1,
+     "txratecfg"},
+    {
+     WOAL_SET_GET_REGIONCODE,
+     IW_PRIV_TYPE_INT | 1,
+     IW_PRIV_TYPE_INT | 1,
+     "regioncode"},
+    {
+     WOAL_SET_RADIO,
+     IW_PRIV_TYPE_INT | 1,
+     IW_PRIV_TYPE_INT | 1,
+     "radioctrl"},
+    {
+     WOAL_WMM_ENABLE,
+     IW_PRIV_TYPE_INT | 1,
+     IW_PRIV_TYPE_INT | 1,
+     "wmmcfg"},
+    {
+     WOAL_11D_ENABLE,
+     IW_PRIV_TYPE_INT | 1,
+     IW_PRIV_TYPE_INT | 1,
+     "11dcfg"},
+    {
+     WOAL_11D_CLR_CHAN_TABLE,
+     IW_PRIV_TYPE_NONE,
+     IW_PRIV_TYPE_NONE,
+     "11dclrtbl"},
+    {
+     WOAL_SET_GET_TX_RX_ANT,
+     IW_PRIV_TYPE_INT | 1,
+     IW_PRIV_TYPE_INT | 1,
+     "antcfg"},
+    {
+     WOAL_SET_GET_QOS_CFG,
+     IW_PRIV_TYPE_INT | 1,
+     IW_PRIV_TYPE_INT | 1,
+     "qoscfg"},
+    {
+     WOAL_SET_GET_WWS_CFG,
+     IW_PRIV_TYPE_INT | 1,
+     IW_PRIV_TYPE_INT | 1,
+     "wwscfg"},
+#if defined(REASSOCIATION)
+    {
+     WOAL_SET_GET_REASSOC,
+     IW_PRIV_TYPE_INT | 1,
+     IW_PRIV_TYPE_INT | 1,
+     "reassoctrl"},
+#endif
+    {
+     WOAL_TXBUF_CFG,
+     IW_PRIV_TYPE_INT | 1,
+     IW_PRIV_TYPE_INT | 1,
+     "txbufcfg"},
+    {
+     WOAL_SLEEP_PD,
+     IW_PRIV_TYPE_INT | 1,
+     IW_PRIV_TYPE_INT | 1,
+     "sleeppd"},
+    {
+     WOAL_AUTH_TYPE,
+     IW_PRIV_TYPE_INT | 1,
+     IW_PRIV_TYPE_INT | 1,
+     "authtype"},
+    {
+     WOAL_PORT_CTRL,
+     IW_PRIV_TYPE_INT | 1,
+     IW_PRIV_TYPE_INT | 1,
+     "port_ctrl"},
+#if defined(WFD_SUPPORT)
+#if defined(STA_SUPPORT) && defined(UAP_SUPPORT)
+    {
+     WOAL_SET_GET_BSS_ROLE,
+     IW_PRIV_TYPE_INT | 1,
+     IW_PRIV_TYPE_INT | 1,
+     "bssrole"},
+#endif
+#endif
+    {
+     WOAL_SET_GET_11H_LOCAL_PWR_CONSTRAINT,
+     IW_PRIV_TYPE_INT | 1,
+     IW_PRIV_TYPE_INT | 1,
+     "powercons"},
+    {
+     WOAL_MAC_CONTROL,
+     IW_PRIV_TYPE_INT | 1,
+     IW_PRIV_TYPE_INT | 1,
+     "macctrl"},
+    {
+     WOAL_THERMAL,
+     IW_PRIV_TYPE_INT | 1,
+     IW_PRIV_TYPE_INT | 1,
+     "thermal"},
+    {
+     WOAL_SET_GET_SIXTEEN_INT,
+     IW_PRIV_TYPE_INT | 16,
+     IW_PRIV_TYPE_INT | 16,
+     ""},
+    {
+     WOAL_TX_POWERCFG,
+     IW_PRIV_TYPE_INT | 16,
+     IW_PRIV_TYPE_INT | 16,
+     "txpowercfg"},
+#ifdef DEBUG_LEVEL1
+    {
+     WOAL_DRV_DBG,
+     IW_PRIV_TYPE_INT | 16,
+     IW_PRIV_TYPE_INT | 16,
+     "drvdbg"},
+#endif
+    {
+     WOAL_BEACON_INTERVAL,
+     IW_PRIV_TYPE_INT | 16,
+     IW_PRIV_TYPE_INT | 16,
+     "bcninterval"},
+    {
+     WOAL_SIGNAL,
+     IW_PRIV_TYPE_INT | 16,
+     IW_PRIV_TYPE_INT | 16,
+     "getsignal"},
+    {
+     WOAL_HEART_BEAT,
+     IW_PRIV_TYPE_INT | 16,
+     IW_PRIV_TYPE_INT | 16,
+     "heartbeat"},
+    {
+     WOAL_11N_TX_CFG,
+     IW_PRIV_TYPE_INT | 16,
+     IW_PRIV_TYPE_INT | 16,
+     "httxcfg"},
+    {
+     WOAL_11N_HTCAP_CFG,
+     IW_PRIV_TYPE_INT | 16,
+     IW_PRIV_TYPE_INT | 16,
+     "htcapinfo"},
+    {
+     WOAL_PRIO_TBL,
+     IW_PRIV_TYPE_INT | 16,
+     IW_PRIV_TYPE_INT | 16,
+     "aggrpriotbl"},
+    {
+     WOAL_11N_AMSDU_AGGR_CTRL,
+     IW_PRIV_TYPE_INT | 16,
+     IW_PRIV_TYPE_INT | 16,
+     "amsduaggrctrl"},
+    {
+     WOAL_ADDBA_UPDT,
+     IW_PRIV_TYPE_INT | 16,
+     IW_PRIV_TYPE_INT | 16,
+     "addbapara"},
+    {
+     WOAL_ADDBA_REJECT,
+     IW_PRIV_TYPE_INT | 16,
+     IW_PRIV_TYPE_INT | 16,
+     "addbareject"},
+    {
+     WOAL_TX_BF_CAP,
+     IW_PRIV_TYPE_INT | 16,
+     IW_PRIV_TYPE_INT | 16,
+     "httxbfcap"},
+    {
+     WOAL_HS_CFG,
+     IW_PRIV_TYPE_INT | 16,
+     IW_PRIV_TYPE_INT | 16,
+     "hscfg"},
+    {
+     WOAL_HS_SETPARA,
+     IW_PRIV_TYPE_INT | 16,
+     IW_PRIV_TYPE_INT | 16,
+     "hssetpara"},
+    {
+     WOAL_REG_READ_WRITE,
+     IW_PRIV_TYPE_INT | 16,
+     IW_PRIV_TYPE_INT | 16,
+     "regrdwr"},
+    {
+     WOAL_BAND_CFG,
+     IW_PRIV_TYPE_INT | 16,
+     IW_PRIV_TYPE_INT | 16,
+     "bandcfg"},
+    {
+     WOAL_INACTIVITY_TIMEOUT_EXT,
+     IW_PRIV_TYPE_INT | 16,
+     IW_PRIV_TYPE_INT | 16,
+     "inactivityto"},
+    {
+     WOAL_SCAN_CFG,
+     IW_PRIV_TYPE_INT | 16,
+     IW_PRIV_TYPE_INT | 16,
+     "scancfg"},
+    {
+     WOAL_PS_CFG,
+     IW_PRIV_TYPE_INT | 16,
+     IW_PRIV_TYPE_INT | 16,
+     "pscfg"},
+    {
+     WOAL_MEM_READ_WRITE,
+     IW_PRIV_TYPE_INT | 16,
+     IW_PRIV_TYPE_INT | 16,
+     "memrdwr"},
+    {
+     WOAL_SLEEP_PARAMS,
+     IW_PRIV_TYPE_INT | 16,
+     IW_PRIV_TYPE_INT | 16,
+     "sleepparams"},
+    {
+     WOALGETLOG,
+     IW_PRIV_TYPE_NONE,
+     IW_PRIV_TYPE_CHAR | GETLOG_BUFSIZE,
+     "getlog"},
+    {
+     WOAL_SETADDR_GETNONE,
+     IW_PRIV_TYPE_ADDR | 1,
+     IW_PRIV_TYPE_NONE,
+     ""},
+    {
+     WOAL_DEAUTH,
+     IW_PRIV_TYPE_ADDR | 1,
+     IW_PRIV_TYPE_NONE,
+     "deauth"},
+    {
+     WOAL_SET_GET_256_CHAR,
+     IW_PRIV_TYPE_CHAR | 256,
+     IW_PRIV_TYPE_CHAR | 256,
+     ""},
+    {
+     WOAL_PASSPHRASE,
+     IW_PRIV_TYPE_CHAR | 256,
+     IW_PRIV_TYPE_CHAR | 256,
+     "passphrase"},
+    {
+     WOAL_ADHOC_AES,
+     IW_PRIV_TYPE_CHAR | 256,
+     IW_PRIV_TYPE_CHAR | 256,
+     "adhocaes"},
+    {
+     WOAL_WMM_QUEUE_STATUS,
+     IW_PRIV_TYPE_CHAR | 256,
+     IW_PRIV_TYPE_CHAR | 256,
+     "qstatus"},
+    {
+     WOAL_WMM_TS_STATUS,
+     IW_PRIV_TYPE_CHAR | 256,
+     IW_PRIV_TYPE_CHAR | 256,
+     "ts_status"},
+    {
+     WOAL_IP_ADDRESS,
+     IW_PRIV_TYPE_CHAR | 256,
+     IW_PRIV_TYPE_CHAR | 256,
+     "ipaddr"},
+    {
+     WOAL_SETNONE_GETTWELVE_CHAR,
+     IW_PRIV_TYPE_NONE,
+     IW_PRIV_TYPE_CHAR | 12,
+     ""},
+    {
+     WOAL_WPS_SESSION,
+     IW_PRIV_TYPE_NONE,
+     IW_PRIV_TYPE_CHAR | 12,
+     "wpssession"},
+    {
+     WOAL_SETNONE_GET_FOUR_INT,
+     IW_PRIV_TYPE_NONE,
+     IW_PRIV_TYPE_INT | 4,
+     ""},
+    {
+     WOAL_DATA_RATE,
+     IW_PRIV_TYPE_NONE,
+     IW_PRIV_TYPE_INT | 4,
+     "getdatarate"},
+    {
+     WOAL_ESUPP_MODE,
+     IW_PRIV_TYPE_NONE,
+     IW_PRIV_TYPE_INT | 4,
+     "esuppmode"},
+    {
+     WOAL_SET_GET_64_INT,
+     IW_PRIV_TYPE_INT | 64,
+     IW_PRIV_TYPE_INT | 64,
+     ""},
+    {
+     WOAL_ECL_SYS_CLOCK,
+     IW_PRIV_TYPE_INT | 64,
+     IW_PRIV_TYPE_INT | 64,
+     "sysclock"},
+    {
+     WOAL_HOST_CMD,
+     IW_PRIV_TYPE_BYTE | 2047,
+     IW_PRIV_TYPE_BYTE | 2047,
+     "hostcmd"},
+    {
+     WOAL_ARP_FILTER,
+     IW_PRIV_TYPE_BYTE | 2047,
+     IW_PRIV_TYPE_BYTE | 2047,
+     "arpfilter"},
+    {
+     WOAL_SET_INTS_GET_CHARS,
+     IW_PRIV_TYPE_INT | 16,
+     IW_PRIV_TYPE_BYTE | 256,
+     ""},
+    {
+     WOAL_READ_EEPROM,
+     IW_PRIV_TYPE_INT | 16,
+     IW_PRIV_TYPE_BYTE | 256,
+     "rdeeprom"},
+    {
+     WOAL_SET_GET_2K_BYTES,
+     IW_PRIV_TYPE_BYTE | WOAL_2K_BYTES,
+     IW_PRIV_TYPE_BYTE | WOAL_2K_BYTES,
+     ""},
+    {
+     WOAL_SET_USER_SCAN,
+     IW_PRIV_TYPE_BYTE | WOAL_2K_BYTES,
+     IW_PRIV_TYPE_BYTE | WOAL_2K_BYTES,
+     "setuserscan"},
+    {
+     WOAL_GET_SCAN_TABLE,
+     IW_PRIV_TYPE_BYTE | WOAL_2K_BYTES,
+     IW_PRIV_TYPE_BYTE | WOAL_2K_BYTES,
+     "getscantable"},
+    {
+     WOAL_WMM_ADDTS,
+     IW_PRIV_TYPE_BYTE | WOAL_2K_BYTES,
+     IW_PRIV_TYPE_BYTE | WOAL_2K_BYTES,
+     "addts"},
+    {
+     WOAL_WMM_DELTS,
+     IW_PRIV_TYPE_BYTE | WOAL_2K_BYTES,
+     IW_PRIV_TYPE_BYTE | WOAL_2K_BYTES,
+     "delts"},
+    {
+     WOAL_WMM_QUEUE_CONFIG,
+     IW_PRIV_TYPE_BYTE | WOAL_2K_BYTES,
+     IW_PRIV_TYPE_BYTE | WOAL_2K_BYTES,
+     "qconfig"},
+    {
+     WOAL_WMM_QUEUE_STATS,
+     IW_PRIV_TYPE_BYTE | WOAL_2K_BYTES,
+     IW_PRIV_TYPE_BYTE | WOAL_2K_BYTES,
+     "qstats"},
+    {
+     WOAL_BYPASSED_PACKET,
+     IW_PRIV_TYPE_BYTE | WOAL_2K_BYTES,
+     IW_PRIV_TYPE_BYTE | WOAL_2K_BYTES,
+     "pb_bypass"},
+    {
+     WOAL_FROYO_START,
+     IW_PRIV_TYPE_NONE,
+     IW_PRIV_TYPE_NONE,
+     "START"},
+    {
+     WOAL_FROYO_STOP,
+     IW_PRIV_TYPE_NONE,
+     IW_PRIV_TYPE_NONE,
+     "STOP"},
+    {
+     WOAL_FROYO_WL_FW_RELOAD,
+     IW_PRIV_TYPE_CHAR | 256,
+     IW_PRIV_TYPE_CHAR | 256,
+     "WL_FW_RELOAD"},
+};
+
+/** Auto Rate */
+#define AUTO_RATE 0xFF
+
+/** moal_802_11_rates  */
+typedef struct _moal_802_11_rates
+{
+        /** Num of rates */
+    t_u8 num_of_rates;
+        /** Rates */
+    t_u8 rates[MLAN_SUPPORTED_RATES];
+} moal_802_11_rates;
+
+int woal_do_ioctl(struct net_device *dev, struct ifreq *req, int i);
+
+#endif /* _WOAL_PRIV_H_ */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_proc.c linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_proc.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_proc.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_proc.c	2017-09-23 03:42:50.166674612 +0800
@@ -0,0 +1,556 @@
+/**  @file moal_proc.c
+  *
+  * @brief This file contains functions for proc file.
+  * 
+  * Copyright (C) 2008-2010, Marvell International Ltd. 
+  *
+  * This software file (the "File") is distributed by Marvell International 
+  * Ltd. under the terms of the GNU General Public License Version 2, June 1991 
+  * (the "License").  You may use, redistribute and/or modify this File in 
+  * accordance with the terms and conditions of the License, a copy of which 
+  * is available by writing to the Free Software Foundation, Inc.,
+  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
+  * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
+  *
+  * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 
+  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 
+  * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about 
+  * this warranty disclaimer.
+  *
+  */
+
+/********************************************************
+Change log:
+    10/21/2008: initial version
+********************************************************/
+
+#include	"moal_main.h"
+#ifdef UAP_SUPPORT
+#include    "moal_uap.h"
+#endif
+
+/********************************************************
+		Local Variables
+********************************************************/
+#ifdef CONFIG_PROC_FS
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
+#define PROC_DIR	NULL
+#define MWLAN_PROC_DIR  "mwlan/"
+/** Proc top level directory entry */
+struct proc_dir_entry *proc_mwlan = NULL;
+#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
+#define PROC_DIR	&proc_root
+#else
+#define PROC_DIR	proc_net
+#endif
+
+#ifdef STA_SUPPORT
+static char *szModes[] = {
+    "Unknown",
+    "Managed",
+    "Ad-hoc",
+    "Auto",
+};
+#endif
+
+extern int drv_mode;
+
+/********************************************************
+		Global Variables
+********************************************************/
+
+/********************************************************
+		Local Functions
+********************************************************/
+/** 
+ *  @brief Proc read function for info
+ *
+ *  @param page	   Pointer to buffer
+ *  @param start   Read data starting position
+ *  @param offset  Offset
+ *  @param count   Counter 
+ *  @param eof     End of file flag
+ *  @param data    Data to output
+ *
+ *  @return 	   Number of output data
+ */
+static int
+woal_info_proc_read(char *page, char **start, off_t offset,
+                    int count, int *eof, void *data)
+{
+    char *p = page;
+    struct net_device *netdev = data;
+    char fmt[MLAN_MAX_VER_STR_LEN];
+    moal_private *priv = (moal_private *) netdev_priv(netdev);
+#ifdef STA_SUPPORT
+    int i = 0;
+    moal_handle *handle = priv->phandle;
+    mlan_bss_info info;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35)
+    struct dev_mc_list *mcptr = netdev->mc_list;
+    int mc_count = netdev->mc_count;
+#else
+    struct netdev_hw_addr *mcptr = NULL;
+    int mc_count = netdev_mc_count(netdev);
+#endif /* < 2.6.35 */
+#else
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34)
+    int i = 0;
+#endif /* >= 2.6.34 */
+#endif
+#ifdef UAP_SUPPORT
+    mlan_ds_uap_stats ustats;
+#endif
+
+    if (offset) {
+        *eof = 1;
+        goto exit;
+    }
+#ifdef UAP_SUPPORT
+    if (GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_UAP) {
+        p += sprintf(p, "driver_name = " "\"uap\"\n");
+        woal_uap_get_version(priv, fmt, sizeof(fmt) - 1);
+        if (MLAN_STATUS_SUCCESS !=
+            woal_uap_get_stats(priv, MOAL_PROC_WAIT, &ustats)) {
+            *eof = 1;
+            goto exit;
+        }
+    }
+#endif /* UAP_SUPPORT */
+#ifdef STA_SUPPORT
+    if (GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_STA) {
+        woal_get_version(handle, fmt, sizeof(fmt) - 1);
+        memset(&info, 0, sizeof(info));
+        if (MLAN_STATUS_SUCCESS !=
+            woal_get_bss_info(priv, MOAL_PROC_WAIT, &info)) {
+            *eof = 1;
+            goto exit;
+        }
+        p += sprintf(p, "driver_name = " "\"wlan\"\n");
+    }
+#endif
+    p += sprintf(p, "driver_version = %s", fmt);
+    p += sprintf(p, "\ninterface_name=\"%s\"\n", netdev->name);
+#if defined(WFD_SUPPORT)
+    if (priv->bss_type == MLAN_BSS_TYPE_WFD) {
+        if (GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_STA)
+            p += sprintf(p, "bss_mode = \"WFD-Client\"\n");
+        else
+            p += sprintf(p, "bss_mode = \"WFD-GO\"\n");
+    }
+#endif
+#ifdef STA_SUPPORT
+    if (priv->bss_type == MLAN_BSS_TYPE_STA)
+        p += sprintf(p, "bss_mode =\"%s\"\n", szModes[info.bss_mode]);
+#endif
+    p += sprintf(p, "media_state=\"%s\"\n",
+                 ((priv->media_connected ==
+                   MFALSE) ? "Disconnected" : "Connected"));
+    p += sprintf(p, "mac_address=\"%02x:%02x:%02x:%02x:%02x:%02x\"\n",
+                 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
+                 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
+#ifdef STA_SUPPORT
+    if (GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_STA) {
+        p += sprintf(p, "multicast_count=\"%d\"\n", mc_count);
+        p += sprintf(p, "essid=\"%s\"\n", info.ssid.ssid);
+        p += sprintf(p, "bssid=\"%02x:%02x:%02x:%02x:%02x:%02x\"\n",
+                     info.bssid[0], info.bssid[1],
+                     info.bssid[2], info.bssid[3],
+                     info.bssid[4], info.bssid[5]);
+        p += sprintf(p, "channel=\"%d\"\n", (int) info.bss_chan);
+        p += sprintf(p, "region_code = \"%02x\"\n", (t_u8) info.region_code);
+
+        /* 
+         * Put out the multicast list 
+         */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35)
+        for (i = 0; i < netdev->mc_count; i++) {
+            p += sprintf(p,
+                         "multicast_address[%d]=\"%02x:%02x:%02x:%02x:%02x:%02x\"\n",
+                         i,
+                         mcptr->dmi_addr[0], mcptr->dmi_addr[1],
+                         mcptr->dmi_addr[2], mcptr->dmi_addr[3],
+                         mcptr->dmi_addr[4], mcptr->dmi_addr[5]);
+
+            mcptr = mcptr->next;
+        }
+#else
+        netdev_for_each_mc_addr(mcptr, netdev)
+            p += sprintf(p,
+                         "multicast_address[%d]=\"%02x:%02x:%02x:%02x:%02x:%02x\"\n",
+                         i++,
+                         mcptr->addr[0], mcptr->addr[1],
+                         mcptr->addr[2], mcptr->addr[3],
+                         mcptr->addr[4], mcptr->addr[5]);
+#endif /* < 2.6.35 */
+    }
+#endif
+    p += sprintf(p, "num_tx_bytes = %lu\n", priv->stats.tx_bytes);
+    p += sprintf(p, "num_rx_bytes = %lu\n", priv->stats.rx_bytes);
+    p += sprintf(p, "num_tx_pkts = %lu\n", priv->stats.tx_packets);
+    p += sprintf(p, "num_rx_pkts = %lu\n", priv->stats.rx_packets);
+    p += sprintf(p, "num_tx_pkts_dropped = %lu\n", priv->stats.tx_dropped);
+    p += sprintf(p, "num_rx_pkts_dropped = %lu\n", priv->stats.rx_dropped);
+    p += sprintf(p, "num_tx_pkts_err = %lu\n", priv->stats.tx_errors);
+    p += sprintf(p, "num_rx_pkts_err = %lu\n", priv->stats.rx_errors);
+    p += sprintf(p, "carrier %s\n",
+                 ((netif_carrier_ok(priv->netdev)) ? "on" : "off"));
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34)
+    for (i = 0; i < netdev->num_tx_queues; i++) {
+        p += sprintf(p, "tx queue %d:  %s\n", i,
+                     ((netif_tx_queue_stopped(netdev_get_tx_queue(netdev, 0))) ?
+                      "stopped" : "started"));
+    }
+#else
+    p += sprintf(p, "tx queue %s\n",
+                 ((netif_queue_stopped(priv->netdev)) ? "stopped" : "started"));
+#endif
+#ifdef UAP_SUPPORT
+    if (GET_BSS_ROLE(priv) == MLAN_BSS_ROLE_UAP) {
+        p += sprintf(p, "tkip_mic_failures = %lu\n", ustats.tkip_mic_failures);
+        p += sprintf(p, "ccmp_decrypt_errors = %lu\n",
+                     ustats.ccmp_decrypt_errors);
+        p += sprintf(p, "wep_undecryptable_count = %lu\n",
+                     ustats.wep_undecryptable_count);
+        p += sprintf(p, "wep_icv_error_count = %lu\n",
+                     ustats.wep_icv_error_count);
+        p += sprintf(p, "decrypt_failure_count = %lu\n",
+                     ustats.decrypt_failure_count);
+        p += sprintf(p, "mcast_tx_count = %lu\n", ustats.mcast_tx_count);
+        p += sprintf(p, "failed_count = %lu\n", ustats.failed_count);
+        p += sprintf(p, "retry_count = %lu\n", ustats.retry_count);
+        p += sprintf(p, "multiple_retry_count = %lu\n",
+                     ustats.multi_retry_count);
+        p += sprintf(p, "frame_duplicate_count = %lu\n",
+                     ustats.frame_dup_count);
+        p += sprintf(p, "rts_success_count = %lu\n", ustats.rts_success_count);
+        p += sprintf(p, "rts_failure_count = %lu\n", ustats.rts_failure_count);
+        p += sprintf(p, "ack_failure_count = %lu\n", ustats.ack_failure_count);
+        p += sprintf(p, "rx_fragment_count = %lu\n", ustats.rx_fragment_count);
+        p += sprintf(p, "mcast_rx_frame_count = %lu\n",
+                     ustats.mcast_rx_frame_count);
+        p += sprintf(p, "fcs_error_count = %lu\n", ustats.fcs_error_count);
+        p += sprintf(p, "tx_frame_count = %lu\n", ustats.tx_frame_count);
+        p += sprintf(p, "rsna_tkip_cm_invoked = %lu\n",
+                     ustats.rsna_tkip_cm_invoked);
+        p += sprintf(p, "rsna_4way_hshk_failures = %lu\n",
+                     ustats.rsna_4way_hshk_failures);
+    }
+#endif /* UAP_SUPPORT */
+  exit:
+    return (p - page);
+}
+
+/** 
+ *  @brief config proc write function
+ *
+ *  @param f	   file pointer
+ *  @param buf     pointer to data buffer
+ *  @param cnt     data number to write
+ *  @param data    data to write
+ *  @return 	   number of data
+ */
+static int
+woal_config_write(struct file *f, const char *buf, unsigned long cnt,
+                  void *data)
+{
+    char databuf[100];
+    char *line;
+    t_u32 config_data = 0;
+    moal_handle *handle = (moal_handle *) data;
+
+    if (!MODULE_GET)
+        return 0;
+
+    if (cnt > sizeof(databuf)) {
+        MODULE_PUT;
+        return cnt;
+    }
+    memset(databuf, 0, sizeof(databuf));
+    if (copy_from_user(databuf, buf, cnt)) {
+        MODULE_PUT;
+        return 0;
+    }
+    line = databuf;
+    if (!strncmp(databuf, "soft_reset", strlen("soft_reset"))) {
+        line += strlen("soft_reset") + 1;
+        config_data = (t_u32) woal_string_to_number(line);
+        PRINTM(MINFO, "soft_reset: %d\n", (int) config_data);
+        if (woal_request_soft_reset(handle) == MLAN_STATUS_SUCCESS) {
+            handle->hardware_status = HardwareStatusReset;
+        } else {
+            PRINTM(MERROR, "Could not perform soft reset\n");
+        }
+    }
+    if (!strncmp(databuf, "drv_mode", strlen("drv_mode"))) {
+        line += strlen("drv_mode") + 1;
+        config_data = (t_u32) woal_string_to_number(line);
+        PRINTM(MINFO, "drv_mode: %d\n", (int) config_data);
+        if (config_data != (t_u32) drv_mode)
+            if (woal_switch_drv_mode(handle, config_data) !=
+                MLAN_STATUS_SUCCESS) {
+                PRINTM(MERROR, "Could not switch drv mode\n");
+            }
+    }
+    MODULE_PUT;
+    return cnt;
+}
+
+/** 
+ *  @brief config proc read function
+ *
+ *  @param page	   pointer to buffer
+ *  @param s       read data starting position
+ *  @param off     offset
+ *  @param cnt     counter 
+ *  @param eof     end of file flag
+ *  @param data    data to output
+ *  @return 	   number of output data
+ */
+static int
+woal_config_read(char *page, char **s, off_t off, int cnt, int *eof, void *data)
+{
+    char *p = page;
+    moal_handle *handle = (moal_handle *) data;
+    if (!MODULE_GET)
+        return 0;
+    p += sprintf(p, "hardware_status=%d\n", (int) handle->hardware_status);
+    p += sprintf(p, "netlink_num=%d\n", (int) handle->netlink_num);
+    p += sprintf(p, "drv_mode=%d\n", (int) drv_mode);
+    MODULE_PUT;
+    return p - page;
+}
+
+/********************************************************
+		Global Functions
+********************************************************/
+/** 
+ *  @brief Convert string to number
+ *
+ *  @param s   	   Pointer to numbered string
+ *
+ *  @return 	   Converted number from string s
+ */
+int
+woal_string_to_number(char *s)
+{
+    int r = 0;
+    int base = 0;
+    int pn = 1;
+
+    if (!strncmp(s, "-", 1)) {
+        pn = -1;
+        s++;
+    }
+    if (!strncmp(s, "0x", 2) || !strncmp(s, "0X", 2)) {
+        base = 16;
+        s += 2;
+    } else
+        base = 10;
+
+    for (s = s; *s; s++) {
+        if ((*s >= '0') && (*s <= '9'))
+            r = (r * base) + (*s - '0');
+        else if ((*s >= 'A') && (*s <= 'F'))
+            r = (r * base) + (*s - 'A' + 10);
+        else if ((*s >= 'a') && (*s <= 'f'))
+            r = (r * base) + (*s - 'a' + 10);
+        else
+            break;
+    }
+
+    return (r * pn);
+}
+
+/** 
+ *  @brief Create the top level proc directory
+ *
+ *  @param handle   Pointer to woal_handle
+ *
+ *  @return 	    N/A
+ */
+void
+woal_proc_init(moal_handle * handle)
+{
+    struct proc_dir_entry *r;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)
+    struct proc_dir_entry *pde = PROC_DIR;
+#endif
+    char config_proc_dir[20];
+
+    ENTER();
+
+    PRINTM(MINFO, "Create Proc Interface\n");
+    if (!handle->proc_mwlan) {
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)
+        /* Check if directory already exists */
+        for (pde = pde->subdir; pde; pde = pde->next) {
+            if (pde->namelen && !strcmp("mwlan", pde->name)) {
+                /* Directory exists */
+                PRINTM(MWARN, "proc interface already exists!\n");
+                handle->proc_mwlan = pde;
+                break;
+            }
+        }
+        if (pde == NULL) {
+            handle->proc_mwlan = proc_mkdir("mwlan", PROC_DIR);
+            if (!handle->proc_mwlan)
+                PRINTM(MERROR, "Cannot create proc interface!\n");
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
+            else
+                atomic_set(&handle->proc_mwlan->count, 1);
+#endif
+        }
+#else
+        if (!proc_mwlan) {
+            handle->proc_mwlan = proc_mkdir("mwlan", PROC_DIR);
+            if (!handle->proc_mwlan) {
+                PRINTM(MERROR, "Cannot create proc interface!\n");
+            }
+        } else {
+            handle->proc_mwlan = proc_mwlan;
+        }
+#endif
+        if (handle->proc_mwlan) {
+            if (handle->handle_idx)
+                sprintf(config_proc_dir, "config%d", handle->handle_idx);
+            else
+                strcpy(config_proc_dir, "config");
+
+            r = create_proc_entry(config_proc_dir, 0644, handle->proc_mwlan);
+
+            if (r) {
+                r->data = handle;
+                r->read_proc = woal_config_read;
+                r->write_proc = woal_config_write;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)
+                r->owner = THIS_MODULE;
+#endif
+            } else
+                PRINTM(MMSG, "Fail to create proc config\n");
+        }
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,26)
+        proc_mwlan = handle->proc_mwlan;
+#endif
+    }
+
+    LEAVE();
+}
+
+/** 
+ *  @brief Remove the top level proc directory
+ *
+ *  @param handle  pointer moal_handle
+ *
+ *  @return 	   N/A
+ */
+void
+woal_proc_exit(moal_handle * handle)
+{
+    ENTER();
+
+    PRINTM(MINFO, "Remove Proc Interface\n");
+    if (handle->proc_mwlan) {
+        char config_proc_dir[20];
+        if (handle->handle_idx)
+            sprintf(config_proc_dir, "config%d", handle->handle_idx);
+        else
+            strcpy(config_proc_dir, "config");
+        remove_proc_entry(config_proc_dir, handle->proc_mwlan);
+
+        /* Remove only if we are the only instance using this */
+        if (atomic_read(&(handle->proc_mwlan->count)) > 1) {
+            PRINTM(MWARN, "More than one interface using proc!\n");
+        } else {
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
+            atomic_dec(&(handle->proc_mwlan->count));
+#endif
+            remove_proc_entry("mwlan", PROC_DIR);
+            handle->proc_mwlan = NULL;
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,26)
+            proc_mwlan = NULL;
+#endif
+        }
+    }
+
+    LEAVE();
+}
+
+/** 
+ *  @brief Create proc file for interface
+ *
+ *  @param priv	   pointer moal_private
+ *
+ *  @return 	   N/A
+ */
+void
+woal_create_proc_entry(moal_private * priv)
+{
+    struct net_device *dev = priv->netdev;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
+    char proc_dir_name[20];
+#endif
+
+    ENTER();
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
+    if (!priv->proc_entry) {
+        memset(proc_dir_name, 0, sizeof(proc_dir_name));
+        strcpy(proc_dir_name, MWLAN_PROC_DIR);
+        strcat(proc_dir_name, dev->name);
+        /* Try to create mwlan/mlanX first */
+        priv->proc_entry = proc_mkdir(proc_dir_name, PROC_DIR);
+        if (priv->proc_entry) {
+            /* Success. Continue normally */
+            if (!priv->phandle->proc_mwlan) {
+                priv->phandle->proc_mwlan = priv->proc_entry->parent;
+            }
+            atomic_inc(&(priv->phandle->proc_mwlan->count));
+        } else {
+            /* Failure. mwlan may not exist. Try to create that first */
+            priv->phandle->proc_mwlan = proc_mkdir("mwlan", PROC_DIR);
+            if (!priv->phandle->proc_mwlan) {
+                /* Failure. Something broken */
+                LEAVE();
+                return;
+            } else {
+                /* Success. Now retry creating mlanX */
+                priv->proc_entry = proc_mkdir(proc_dir_name, PROC_DIR);
+                atomic_inc(&(priv->phandle->proc_mwlan->count));
+            }
+        }
+#else
+    if (priv->phandle->proc_mwlan && !priv->proc_entry) {
+        priv->proc_entry = proc_mkdir(dev->name, priv->phandle->proc_mwlan);
+        atomic_inc(&(priv->phandle->proc_mwlan->count));
+#endif
+        strcpy(priv->proc_entry_name, dev->name);
+        if (priv->proc_entry) {
+            create_proc_read_entry("info", 0, priv->proc_entry,
+                                   woal_info_proc_read, dev);
+        }
+    }
+
+    LEAVE();
+}
+
+/** 
+ *  @brief Remove proc file
+ *
+ *  @param priv	   Pointer moal_private
+ *
+ *  @return 	   N/A
+ */
+void
+woal_proc_remove(moal_private * priv)
+{
+    ENTER();
+    if (priv->phandle->proc_mwlan && priv->proc_entry) {
+        remove_proc_entry("info", priv->proc_entry);
+        remove_proc_entry(priv->proc_entry_name, priv->phandle->proc_mwlan);
+        atomic_dec(&(priv->phandle->proc_mwlan->count));
+        priv->proc_entry = NULL;
+    }
+    LEAVE();
+}
+#endif
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_shim.c linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_shim.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_shim.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_shim.c	2017-09-23 03:42:50.170674599 +0800
@@ -0,0 +1,1206 @@
+/** @file moal_shim.c
+  *
+  * @brief This file contains the callback functions registered to MLAN
+  *
+  * Copyright (C) 2008-2011, Marvell International Ltd. 
+  * 
+  * This software file (the "File") is distributed by Marvell International 
+  * Ltd. under the terms of the GNU General Public License Version 2, June 1991 
+  * (the "License").  You may use, redistribute and/or modify this File in 
+  * accordance with the terms and conditions of the License, a copy of which 
+  * is available by writing to the Free Software Foundation, Inc.,
+  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
+  * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
+  *
+  * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 
+  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 
+  * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about 
+  * this warranty disclaimer.
+  *
+  */
+
+/********************************************************
+Change log:
+    10/21/2008: initial version
+********************************************************/
+
+#include	"moal_main.h"
+#include	"moal_usb.h"
+#ifdef UAP_SUPPORT
+#include    "moal_uap.h"
+#endif
+
+/********************************************************
+		Local Variables
+********************************************************/
+/** moal_lock */
+typedef struct _moal_lock
+{
+        /** Lock */
+    spinlock_t lock;
+        /** Flags */
+    unsigned long flags;
+} moal_lock;
+
+/********************************************************
+		Global Variables
+********************************************************/
+
+/********************************************************
+		Local Functions
+********************************************************/
+
+/********************************************************
+		Global Functions
+********************************************************/
+/** 
+ *  @brief Alloc a buffer 
+ *   
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param size 	The size of the buffer to be allocated
+ *  @param flag 	The type of the buffer to be allocated
+ *  @param ppbuf	Pointer to a buffer location to store buffer pointer allocated
+ *
+ *  @return    		MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+moal_malloc(IN t_void * pmoal_handle,
+            IN t_u32 size, IN t_u32 flag, OUT t_u8 ** ppbuf)
+{
+    moal_handle *handle = (moal_handle *) pmoal_handle;
+    t_u32 mem_flag = GFP_ATOMIC;        /* Default type: GFP_ATOMIC */
+
+    if (flag & MLAN_MEM_DMA)
+        mem_flag |= GFP_DMA;
+
+    if (!(*ppbuf = kmalloc(size, mem_flag))) {
+        PRINTM(MERROR, "%s: allocate  buffer %d failed!\n", __FUNCTION__,
+               (int) size);
+        return MLAN_STATUS_FAILURE;
+    }
+    handle->malloc_count++;
+
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief Free a buffer 
+ *   
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param pbuf		Pointer to the buffer to be freed
+ *
+ *  @return    		MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+moal_mfree(IN t_void * pmoal_handle, IN t_u8 * pbuf)
+{
+    moal_handle *handle = (moal_handle *) pmoal_handle;
+
+    if (!pbuf)
+        return MLAN_STATUS_FAILURE;
+    kfree(pbuf);
+    handle->malloc_count--;
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief Fill memory with constant byte 
+ *   
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param pmem		Pointer to the memory area
+ *  @param byte		A constant byte
+ *  @param num		Number of bytes to fill
+ *
+ *  @return    		Pointer to the memory area
+ */
+t_void *
+moal_memset(IN t_void * pmoal_handle,
+            IN t_void * pmem, IN t_u8 byte, IN t_u32 num)
+{
+    t_void *p = pmem;
+
+    if (pmem && num)
+        p = memset(pmem, byte, num);
+
+    return p;
+}
+
+/** 
+ *  @brief Copy memory from one area to another
+ *   
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param pdest	Pointer to the dest memory
+ *  @param psrc		Pointer to the src memory
+ *  @param num		Number of bytes to move
+ *
+ *  @return    		Pointer to the dest memory
+ */
+t_void *
+moal_memcpy(IN t_void * pmoal_handle,
+            IN t_void * pdest, IN const t_void * psrc, IN t_u32 num)
+{
+    t_void *p = pdest;
+
+    if (pdest && psrc && num)
+        p = memcpy(pdest, psrc, num);
+
+    return p;
+}
+
+/** 
+ *  @brief Move memory from one area to another
+ *   
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param pdest	Pointer to the dest memory
+ *  @param psrc		Pointer to the src memory
+ *  @param num		Number of bytes to move
+ *
+ *  @return    		Pointer to the dest memory
+ */
+t_void *
+moal_memmove(IN t_void * pmoal_handle,
+             IN t_void * pdest, IN const t_void * psrc, IN t_u32 num)
+{
+    t_void *p = pdest;
+
+    if (pdest && psrc && num)
+        p = memmove(pdest, psrc, num);
+
+    return p;
+}
+
+/** 
+ *  @brief Compare two memory areas
+ *   
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param pmem1	Pointer to the first memory
+ *  @param pmem2	Pointer to the second memory
+ *  @param num		Number of bytes to compare
+ *
+ *  @return    		Compare result returns by memcmp
+ */
+t_s32
+moal_memcmp(IN t_void * pmoal_handle,
+            IN const t_void * pmem1, IN const t_void * pmem2, IN t_u32 num)
+{
+    t_s32 result;
+
+    result = memcmp(pmem1, pmem2, num);
+
+    return result;
+}
+
+/** 
+ *  @brief Delay function
+ *   
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param delay  delay in micro-second
+ *
+ *  @return    	  N/A
+ */
+t_void
+moal_udelay(IN t_void * pmoal_handle, IN t_u32 delay)
+{
+    if (delay >= 1000)
+        mdelay(delay / 1000);
+    if (delay % 1000)
+        udelay(delay % 1000);
+}
+
+/** 
+ *  @brief Retrieves the current system time
+ *   
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param psec		Pointer to buf for the seconds of system time
+ *  @param pusec 	Pointer to buf the micro seconds of system time
+ *
+ *  @return    		MLAN_STATUS_SUCCESS 
+ */
+mlan_status
+moal_get_system_time(IN t_void * pmoal_handle,
+                     OUT t_u32 * psec, OUT t_u32 * pusec)
+{
+    struct timeval t;
+
+    do_gettimeofday(&t);
+    *psec = (t_u32) t.tv_sec;
+    *pusec = (t_u32) t.tv_usec;
+
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief Initializes the timer
+ *   
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param pptimer	Pointer to the timer
+ *  @param callback 	Pointer to callback function
+ *  @param pcontext 	Pointer to context
+ *
+ *  @return    		MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE 
+ */
+mlan_status
+moal_init_timer(IN t_void * pmoal_handle,
+                OUT t_void ** pptimer,
+                IN t_void(*callback) (t_void * pcontext), IN t_void * pcontext)
+{
+    moal_drv_timer *timer = NULL;
+
+    if (!
+        (timer =
+         (moal_drv_timer *) kmalloc(sizeof(moal_drv_timer), GFP_KERNEL)))
+        return MLAN_STATUS_FAILURE;
+    woal_initialize_timer(timer, callback, pcontext);
+    *pptimer = (t_void *) timer;
+
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief Free the timer
+ *   
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param ptimer	Pointer to the timer
+ *
+ *  @return    		MLAN_STATUS_SUCCESS 
+ */
+mlan_status
+moal_free_timer(IN t_void * pmoal_handle, IN t_void * ptimer)
+{
+    moal_drv_timer *timer = (moal_drv_timer *) ptimer;
+
+    if (timer) {
+        if ((timer->timer_is_canceled == MFALSE) && timer->time_period) {
+            PRINTM(MWARN, "mlan try to free timer without stop timer!\n");
+            woal_cancel_timer(timer);
+        }
+        kfree(timer);
+    }
+
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief Start the timer
+ *   
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param ptimer	Pointer to the timer
+ *  @param periodic     Periodic timer
+ *  @param msec		Timer value in milliseconds
+ *
+ *  @return    		MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+moal_start_timer(IN t_void * pmoal_handle,
+                 IN t_void * ptimer, IN t_u8 periodic, IN t_u32 msec)
+{
+    if (!ptimer)
+        return MLAN_STATUS_FAILURE;
+
+    ((moal_drv_timer *) ptimer)->timer_is_periodic = periodic;
+    woal_mod_timer((moal_drv_timer *) ptimer, msec);
+
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief Stop the timer
+ *   
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param ptimer	Pointer to the timer
+ *
+ *  @return    		MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+moal_stop_timer(IN t_void * pmoal_handle, IN t_void * ptimer)
+{
+    if (!ptimer)
+        return MLAN_STATUS_FAILURE;
+    woal_cancel_timer((moal_drv_timer *) ptimer);
+
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief Initializes the lock
+ *   
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param pplock	Pointer to the lock
+ *
+ *  @return    		MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE 
+ */
+mlan_status
+moal_init_lock(IN t_void * pmoal_handle, OUT t_void ** pplock)
+{
+    moal_handle *handle = (moal_handle *) pmoal_handle;
+    moal_lock *mlock = NULL;
+
+    if (!(mlock = (moal_lock *) kmalloc(sizeof(moal_lock), GFP_ATOMIC)))
+        return MLAN_STATUS_FAILURE;
+    spin_lock_init(&mlock->lock);
+    *pplock = (t_void *) mlock;
+
+    handle->lock_count++;
+
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief Free the lock
+ *   
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param plock	Lock
+ *
+ *  @return    		MLAN_STATUS_SUCCESS
+ */
+mlan_status
+moal_free_lock(IN t_void * pmoal_handle, IN t_void * plock)
+{
+    moal_handle *handle = (moal_handle *) pmoal_handle;
+    moal_lock *mlock = plock;
+
+    if (mlock) {
+        kfree(mlock);
+        handle->lock_count--;
+    }
+
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief Request a spin lock
+ *   
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param plock	Pointer to the lock
+ *
+ *  @return    		MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+moal_spin_lock(IN t_void * pmoal_handle, IN t_void * plock)
+{
+    moal_lock *mlock = plock;
+    unsigned long flags = 0;
+
+    if (mlock) {
+        spin_lock_irqsave(&mlock->lock, flags);
+        mlock->flags = flags;
+        return MLAN_STATUS_SUCCESS;
+    } else {
+        return MLAN_STATUS_FAILURE;
+    }
+}
+
+/** 
+ *  @brief Request a spin_unlock
+ *     
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param plock	Pointer to the lock
+ *
+ *  @return    		MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+moal_spin_unlock(IN t_void * pmoal_handle, IN t_void * plock)
+{
+    moal_lock *mlock = (moal_lock *) plock;
+
+    if (mlock) {
+        spin_unlock_irqrestore(&mlock->lock, mlock->flags);
+
+        return MLAN_STATUS_SUCCESS;
+    } else {
+        return MLAN_STATUS_FAILURE;
+    }
+}
+
+/** 
+ *  @brief This function reads one block of firmware data from MOAL
+ *
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param offset       Offset from where the data will be copied
+ *  @param len          Length to be copied
+ *  @param pbuf         Buffer where the data will be copied
+ *
+ *  @return             MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+moal_get_fw_data(IN t_void * pmoal_handle,
+                 IN t_u32 offset, IN t_u32 len, OUT t_u8 * pbuf)
+{
+    moal_handle *handle = (moal_handle *) pmoal_handle;
+
+    if (!pbuf || !len)
+        return MLAN_STATUS_FAILURE;
+
+    if (offset + len > handle->firmware->size)
+        return MLAN_STATUS_FAILURE;
+
+    memcpy(pbuf, handle->firmware->data + offset, len);
+
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function is called when MLAN completes the initialization firmware.
+ *   
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param status	The status code for mlan_init_fw request
+ *
+ *  @return    		MLAN_STATUS_SUCCESS 
+ */
+mlan_status
+moal_init_fw_complete(IN t_void * pmoal_handle, IN mlan_status status)
+{
+    moal_handle *handle = (moal_handle *) pmoal_handle;
+    ENTER();
+    if (status == MLAN_STATUS_SUCCESS)
+        handle->hardware_status = HardwareStatusReady;
+    handle->init_wait_q_woken = MTRUE;
+    wake_up_interruptible(&handle->init_wait_q);
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function is called when MLAN shutdown firmware is completed.
+ *   
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param status	The status code for mlan_shutdown request
+ *
+ *  @return    		MLAN_STATUS_SUCCESS 
+ */
+mlan_status
+moal_shutdown_fw_complete(IN t_void * pmoal_handle, IN mlan_status status)
+{
+    moal_handle *handle = (moal_handle *) pmoal_handle;
+    ENTER();
+    handle->hardware_status = HardwareStatusNotReady;
+    handle->init_wait_q_woken = MTRUE;
+    wake_up_interruptible(&handle->init_wait_q);
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function is called when an MLAN IOCTL is completed.
+ *   
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param pioctl_req	pointer to structure mlan_ioctl_req 
+ *  @param status	The status code for mlan_ioctl request
+ *
+ *  @return    		MLAN_STATUS_SUCCESS 
+ */
+mlan_status
+moal_ioctl_complete(IN t_void * pmoal_handle,
+                    IN pmlan_ioctl_req pioctl_req, IN mlan_status status)
+{
+    moal_handle *handle = (moal_handle *) pmoal_handle;
+    moal_private *priv = NULL;
+    wait_queue *wait;
+    ENTER();
+
+    if (!atomic_read(&handle->ioctl_pending))
+        PRINTM(MERROR, "ERR: Unexpected IOCTL completed: %p\n", pioctl_req);
+    else
+        atomic_dec(&handle->ioctl_pending);
+    priv = woal_bss_index_to_priv(handle, pioctl_req->bss_index);
+
+    wait = (wait_queue *) pioctl_req->reserved_1;
+    PRINTM(MIOCTL,
+           "IOCTL completed: %p id=0x%lx sub_id=0x%lx, action=%d,  status=%d, status_code=0x%lx\n",
+           pioctl_req, pioctl_req->req_id, (*(t_u32 *) pioctl_req->pbuf),
+           (int) pioctl_req->action, status, pioctl_req->status_code);
+    if (wait) {
+        wait->condition = MTRUE;
+        wait->status = status;
+        if ((status != MLAN_STATUS_SUCCESS) &&
+            (pioctl_req->status_code == MLAN_ERROR_CMD_TIMEOUT)) {
+            PRINTM(MERROR, "IOCTL: command timeout\n");
+        } else {
+            wake_up_interruptible(wait->wait);
+        }
+    } else {
+        if (priv && (status == MLAN_STATUS_SUCCESS) &&
+            (pioctl_req->action == MLAN_ACT_GET))
+            woal_process_ioctl_resp(priv, pioctl_req);
+        if (status != MLAN_STATUS_SUCCESS)
+            PRINTM(MERROR,
+                   "IOCTL failed: id=0x%lx, action=%d, status_code=0x%lx\n",
+                   pioctl_req->req_id, (int) pioctl_req->action,
+                   pioctl_req->status_code);
+        kfree(pioctl_req);
+    }
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function allocates mlan_buffer.
+ *   
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param size		allocation size requested 
+ *  @param pmbuf	pointer to pointer to the allocated buffer 
+ *
+ *  @return    		MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+moal_alloc_mlan_buffer(IN t_void * pmoal_handle,
+                       IN t_u32 size, OUT pmlan_buffer * pmbuf)
+{
+    if (NULL ==
+        (*pmbuf = woal_alloc_mlan_buffer((moal_handle *) pmoal_handle, size)))
+        return MLAN_STATUS_FAILURE;
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function frees mlan_buffer.
+ *   
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param pmbuf	pointer to buffer to be freed
+ *
+ *  @return    		MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+moal_free_mlan_buffer(IN t_void * pmoal_handle, IN pmlan_buffer pmbuf)
+{
+    if (!pmbuf)
+        return MLAN_STATUS_FAILURE;
+    woal_free_mlan_buffer((moal_handle *) pmoal_handle, pmbuf);
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function is called when MLAN complete send data packet.
+ *   
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param pmbuf	Pointer to the mlan buffer structure
+ *  @param status	The status code for mlan_send_packet request
+ *
+ *  @return    		MLAN_STATUS_SUCCESS 
+ */
+mlan_status
+moal_send_packet_complete(IN t_void * pmoal_handle,
+                          IN pmlan_buffer pmbuf, IN mlan_status status)
+{
+    moal_private *priv = NULL;
+    moal_handle *handle = (moal_handle *) pmoal_handle;
+    struct sk_buff *skb = NULL;
+    int i;
+    ENTER();
+    if (pmbuf) {
+        priv = woal_bss_index_to_priv(pmoal_handle, pmbuf->bss_index);
+        skb = (struct sk_buff *) pmbuf->pdesc;
+        if (priv) {
+            woal_set_trans_start(priv->netdev);
+            if (skb) {
+                if (status == MLAN_STATUS_SUCCESS) {
+                    priv->stats.tx_packets++;
+                    priv->stats.tx_bytes += skb->len;
+                } else {
+                    priv->stats.tx_errors++;
+                }
+                if (atomic_dec_return(&handle->tx_pending) < LOW_TX_PENDING) {
+                    for (i = 0; i < handle->priv_num; i++) {
+#ifdef STA_SUPPORT
+                        if ((GET_BSS_ROLE(handle->priv[i]) == MLAN_BSS_ROLE_STA)
+                            && (handle->priv[i]->media_connected ||
+                                priv->is_adhoc_link_sensed)) {
+                            woal_wake_queue(handle->priv[i]->netdev);
+                        }
+#endif
+#ifdef UAP_SUPPORT
+                        if ((GET_BSS_ROLE(handle->priv[i]) == MLAN_BSS_ROLE_UAP)
+                            && (handle->priv[i]->media_connected)) {
+                            woal_wake_queue(handle->priv[i]->netdev);
+                        }
+#endif
+                    }
+                }
+            }
+        }
+        if (skb)
+            dev_kfree_skb_any(skb);
+    }
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function is called when MLAN complete receiving 
+ *  	   data/event/command
+ *
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param pmbuf	Pointer to the mlan buffer structure
+ *  @param port 	Port number for receive
+ *  @param status	The status code for mlan_receive request
+ *
+ *  @return    		MLAN_STATUS_SUCCESS 
+ */
+mlan_status
+moal_recv_complete(IN t_void * pmoal_handle,
+                   IN pmlan_buffer pmbuf, IN t_u32 port, IN mlan_status status)
+{
+    moal_private *priv = NULL;
+    moal_handle *handle = (moal_handle *) pmoal_handle;
+    ENTER();
+
+    atomic_dec(&handle->rx_pending);
+    if (pmbuf) {
+        priv = woal_bss_index_to_priv(handle, pmbuf->bss_index);
+        if (priv && (pmbuf->buf_type == MLAN_BUF_TYPE_DATA) &&
+            (status == MLAN_STATUS_FAILURE)) {
+            priv->stats.rx_dropped++;
+        }
+        /* Reuse the buffer in case of command/event */
+        if (port == MLAN_USB_EP_CMD_EVENT)
+            woal_submit_rx_urb(handle, port);
+        else
+            woal_free_mlan_buffer(handle, pmbuf);
+    }
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function write a command/data packet to card.
+ *   
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param pmbuf	Pointer to the mlan buffer structure
+ *  @param port 	Port number for sent
+ *
+ *  @return    		MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE or MLAN_STATUS_PENDING or MLAN_STATUS_RESOURCE
+ */
+mlan_status
+moal_write_data_async(IN t_void * pmoal_handle,
+                      IN pmlan_buffer pmbuf, IN t_u32 port)
+{
+    moal_handle *handle = (moal_handle *) pmoal_handle;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    ENTER();
+    if (handle->is_suspended == MTRUE) {
+        PRINTM(MERROR, "write_data_async is not allowed while suspended\n");
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+    ret =
+        woal_write_data_async((moal_handle *) pmoal_handle, pmbuf, (t_u8) port);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief This function write a command/data packet to card.
+ *         This function blocks the call until it finishes
+ *
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param pmbuf	Pointer to the mlan buffer structure
+ *  @param port 	Port number for sent
+ *  @param timeout 	Timeout value in milliseconds (if 0 the wait is forever)
+ *
+ *  @return    		MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+moal_write_data_sync(IN t_void * pmoal_handle,
+                     IN pmlan_buffer pmbuf, IN t_u32 port, IN t_u32 timeout)
+{
+    return woal_write_data_sync((moal_handle *) pmoal_handle, pmbuf, port,
+                                timeout);
+}
+
+/** 
+ *  @brief This function read data packet/event/command from card.
+ *         This function blocks the call until it finish
+ *
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param pmbuf	Pointer to the mlan buffer structure
+ *  @param port 	Port number for read
+ *  @param timeout 	Timeout value in milliseconds (if 0 the wait is forever)
+ *
+ *  @return    		MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+moal_read_data_sync(IN t_void * pmoal_handle,
+                    IN OUT pmlan_buffer pmbuf, IN t_u32 port, IN t_u32 timeout)
+{
+    return woal_read_data_sync((moal_handle *) pmoal_handle, pmbuf, port,
+                               timeout);
+}
+
+/** 
+ *  @brief This function uploads the packet to the network stack
+ *
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param pmbuf	Pointer to the mlan buffer structure
+ *
+ *  @return    		MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+moal_recv_packet(IN t_void * pmoal_handle, IN pmlan_buffer pmbuf)
+{
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    moal_private *priv = NULL;
+    struct sk_buff *skb = NULL;
+    ENTER();
+    if (pmbuf) {
+        priv = woal_bss_index_to_priv(pmoal_handle, pmbuf->bss_index);
+        skb = (struct sk_buff *) pmbuf->pdesc;
+        if (priv) {
+            if (skb) {
+                skb_reserve(skb, pmbuf->data_offset);
+                skb_put(skb, pmbuf->data_len);
+                pmbuf->pdesc = NULL;
+                pmbuf->pbuf = NULL;
+                pmbuf->data_offset = pmbuf->data_len = 0;
+            } else {
+                PRINTM(MERROR, "%s without skb attach!!!\n", __FUNCTION__);
+                if (!(skb = dev_alloc_skb(pmbuf->data_len + MLAN_NET_IP_ALIGN))) {
+                    PRINTM(MERROR, "%s fail to alloc skb\n", __FUNCTION__);
+                    status = MLAN_STATUS_FAILURE;
+                    priv->stats.rx_dropped++;
+                    goto done;
+                }
+                skb_reserve(skb, MLAN_NET_IP_ALIGN);
+                memcpy(skb->data, (t_u8 *) (pmbuf->pbuf + pmbuf->data_offset),
+                       pmbuf->data_len);
+                skb_put(skb, pmbuf->data_len);
+            }
+            skb->dev = priv->netdev;
+            skb->protocol = eth_type_trans(skb, priv->netdev);
+            skb->ip_summed = CHECKSUM_NONE;
+#ifdef STA_SUPPORT
+            /* This is only required only in case of 11n and USB as we alloc a
+               buffer of 4K only if its 11N (to be able to receive 4K AMSDU
+               packets). In case of SD we allocate buffers based on the size of 
+               packet and hence this is not needed. */
+            /* Modifying the truesize here as our allocation for each skb is 4K
+               but we only receive 2K packets and this cause the kernel to start
+               dropping packets in case where application has allocated buffer
+               based on 2K size i.e. if there a 64K packet received (in IP
+               fragments and application allocates 64K to receive this packet but 
+               this packet would almost double up because we allocate each 1.5K
+               fragment in 4K and pass it up. As soon as the 64K limit hits
+               kernel will start to drop rest of the fragments. Currently we fail 
+               the Filesndl-ht.scr script for UDP, hence this fix */
+
+            if (skb->truesize > MLAN_RX_DATA_BUF_SIZE)
+                skb->truesize += (skb->len - MLAN_RX_DATA_BUF_SIZE);
+#endif /* STA_SUPPORT */
+            priv->stats.rx_bytes += skb->len;
+            priv->stats.rx_packets++;
+            if (in_interrupt())
+                netif_rx(skb);
+            else
+                netif_rx_ni(skb);
+        }
+    }
+  done:
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief This function handles event receive
+ *
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param pmevent	Pointer to the mlan event structure
+ *
+ *  @return    		MLAN_STATUS_SUCCESS 
+ */
+mlan_status
+moal_recv_event(IN t_void * pmoal_handle, IN pmlan_event pmevent)
+{
+    moal_private *priv = NULL;
+    moal_private *pmpriv = NULL;
+#ifdef STA_SUPPORT
+#endif
+    union iwreq_data wrqu;
+    mlan_ds_ps_info pm_info;
+    ENTER();
+
+    PRINTM(MEVENT, "event id:0x%x\n", pmevent->event_id);
+    priv = woal_bss_index_to_priv(pmoal_handle, pmevent->bss_index);
+    if (priv == NULL) {
+        PRINTM(MERROR, "%s: priv is null\n", __FUNCTION__);
+        goto done;
+    }
+    switch (pmevent->event_id) {
+#ifdef STA_SUPPORT
+    case MLAN_EVENT_ID_FW_ADHOC_LINK_SENSED:
+        priv->is_adhoc_link_sensed = MTRUE;
+        if (!netif_carrier_ok(priv->netdev))
+            netif_carrier_on(priv->netdev);
+        woal_wake_queue(priv->netdev);
+        woal_send_iwevcustom_event(priv, CUS_EVT_ADHOC_LINK_SENSED);
+        break;
+
+    case MLAN_EVENT_ID_FW_ADHOC_LINK_LOST:
+        woal_stop_queue(priv->netdev);
+        if (netif_carrier_ok(priv->netdev))
+            netif_carrier_off(priv->netdev);
+        priv->is_adhoc_link_sensed = MFALSE;
+        woal_send_iwevcustom_event(priv, CUS_EVT_ADHOC_LINK_LOST);
+        break;
+
+    case MLAN_EVENT_ID_DRV_CONNECTED:
+        if (pmevent->event_len == ETH_ALEN) {
+            memset(wrqu.ap_addr.sa_data, 0x00, ETH_ALEN);
+            memcpy(wrqu.ap_addr.sa_data, pmevent->event_buf, ETH_ALEN);
+            wrqu.ap_addr.sa_family = ARPHRD_ETHER;
+            wireless_send_event(priv->netdev, SIOCGIWAP, &wrqu, NULL);
+        }
+        priv->media_connected = MTRUE;
+        if (!netif_carrier_ok(priv->netdev))
+            netif_carrier_on(priv->netdev);
+        woal_wake_queue(priv->netdev);
+        break;
+
+    case MLAN_EVENT_ID_DRV_SCAN_REPORT:
+        PRINTM(MINFO, "Scan report\n");
+        if (priv->phandle->scan_pending_on_block == MTRUE) {
+            priv->phandle->scan_pending_on_block = MFALSE;
+            MOAL_REL_SEMAPHORE(&priv->phandle->async_sem);
+        }
+
+        if (priv->report_scan_result) {
+            memset(&wrqu, 0, sizeof(union iwreq_data));
+            wireless_send_event(priv->netdev, SIOCGIWSCAN, &wrqu, NULL);
+            priv->report_scan_result = MFALSE;
+        }
+        break;
+
+    case MLAN_EVENT_ID_DRV_OBSS_SCAN_PARAM:
+        memset(&wrqu, 0, sizeof(union iwreq_data));
+        memmove((pmevent->event_buf + strlen(CUS_EVT_OBSS_SCAN_PARAM) + 1),
+                pmevent->event_buf, pmevent->event_len);
+        memcpy(pmevent->event_buf, (t_u8 *) CUS_EVT_OBSS_SCAN_PARAM,
+               strlen(CUS_EVT_OBSS_SCAN_PARAM));
+        pmevent->event_buf[strlen(CUS_EVT_OBSS_SCAN_PARAM)] = 0;
+
+        wrqu.data.pointer = pmevent->event_buf;
+        wrqu.data.length =
+            pmevent->event_len + strlen(CUS_EVT_OBSS_SCAN_PARAM) + 1;
+        wireless_send_event(priv->netdev, IWEVCUSTOM, &wrqu,
+                            pmevent->event_buf);
+        break;
+    case MLAN_EVENT_ID_FW_BW_CHANGED:
+        memset(&wrqu, 0, sizeof(union iwreq_data));
+        memmove((pmevent->event_buf + strlen(CUS_EVT_BW_CHANGED) + 1),
+                pmevent->event_buf, pmevent->event_len);
+        memcpy(pmevent->event_buf, (t_u8 *) CUS_EVT_BW_CHANGED,
+               strlen(CUS_EVT_BW_CHANGED));
+        pmevent->event_buf[strlen(CUS_EVT_BW_CHANGED)] = 0;
+
+        wrqu.data.pointer = pmevent->event_buf;
+        wrqu.data.length = pmevent->event_len + strlen(CUS_EVT_BW_CHANGED) + 1;
+        wireless_send_event(priv->netdev, IWEVCUSTOM, &wrqu,
+                            pmevent->event_buf);
+        break;
+
+    case MLAN_EVENT_ID_FW_DISCONNECTED:
+        woal_send_disconnect_to_system(priv);
+        /* Reset wireless stats signal info */
+        priv->w_stats.qual.level = 0;
+        priv->w_stats.qual.noise = 0;
+
+#ifdef REASSOCIATION
+        if (priv->reassoc_on == MTRUE) {
+            PRINTM(MINFO, "Reassoc: trigger the timer\n");
+            priv->reassoc_required = MTRUE;
+            priv->phandle->is_reassoc_timer_set = MTRUE;
+            woal_mod_timer(&priv->phandle->reassoc_timer,
+                           REASSOC_TIMER_DEFAULT);
+        } else {
+            priv->rate_index = AUTO_RATE;
+        }
+#endif /* REASSOCIATION */
+        break;
+
+    case MLAN_EVENT_ID_FW_MIC_ERR_UNI:
+#if WIRELESS_EXT >= 18
+        woal_send_mic_error_event(priv, MLAN_EVENT_ID_FW_MIC_ERR_UNI);
+#else
+        woal_send_iwevcustom_event(priv, CUS_EVT_MLME_MIC_ERR_UNI);
+#endif
+        break;
+    case MLAN_EVENT_ID_FW_MIC_ERR_MUL:
+#if WIRELESS_EXT >= 18
+        woal_send_mic_error_event(priv, MLAN_EVENT_ID_FW_MIC_ERR_MUL);
+#else
+        woal_send_iwevcustom_event(priv, CUS_EVT_MLME_MIC_ERR_MUL);
+#endif
+        break;
+    case MLAN_EVENT_ID_FW_BCN_RSSI_LOW:
+        woal_send_iwevcustom_event(priv, CUS_EVT_BEACON_RSSI_LOW);
+        break;
+    case MLAN_EVENT_ID_FW_BCN_RSSI_HIGH:
+        woal_send_iwevcustom_event(priv, CUS_EVT_BEACON_RSSI_HIGH);
+        break;
+    case MLAN_EVENT_ID_FW_BCN_SNR_LOW:
+        woal_send_iwevcustom_event(priv, CUS_EVT_BEACON_SNR_LOW);
+        break;
+    case MLAN_EVENT_ID_FW_BCN_SNR_HIGH:
+        woal_send_iwevcustom_event(priv, CUS_EVT_BEACON_SNR_HIGH);
+        break;
+    case MLAN_EVENT_ID_FW_MAX_FAIL:
+        woal_send_iwevcustom_event(priv, CUS_EVT_MAX_FAIL);
+        break;
+    case MLAN_EVENT_ID_FW_DATA_RSSI_LOW:
+        woal_send_iwevcustom_event(priv, CUS_EVT_DATA_RSSI_LOW);
+        break;
+    case MLAN_EVENT_ID_FW_DATA_SNR_LOW:
+        woal_send_iwevcustom_event(priv, CUS_EVT_DATA_SNR_LOW);
+        break;
+    case MLAN_EVENT_ID_FW_DATA_RSSI_HIGH:
+        woal_send_iwevcustom_event(priv, CUS_EVT_DATA_RSSI_HIGH);
+        break;
+    case MLAN_EVENT_ID_FW_DATA_SNR_HIGH:
+        woal_send_iwevcustom_event(priv, CUS_EVT_DATA_SNR_HIGH);
+        break;
+    case MLAN_EVENT_ID_FW_LINK_QUALITY:
+        woal_send_iwevcustom_event(priv, CUS_EVT_LINK_QUALITY);
+        break;
+    case MLAN_EVENT_ID_FW_PORT_RELEASE:
+        woal_send_iwevcustom_event(priv, CUS_EVT_PORT_RELEASE);
+        break;
+    case MLAN_EVENT_ID_FW_PRE_BCN_LOST:
+        woal_send_iwevcustom_event(priv, CUS_EVT_PRE_BEACON_LOST);
+        break;
+    case MLAN_EVENT_ID_FW_WMM_CONFIG_CHANGE:
+        woal_send_iwevcustom_event(priv, WMM_CONFIG_CHANGE_INDICATION);
+        break;
+
+    case MLAN_EVENT_ID_DRV_REPORT_STRING:
+        PRINTM(MINFO, "Report string %s\n", pmevent->event_buf);
+        woal_send_iwevcustom_event(priv, pmevent->event_buf);
+        break;
+    case MLAN_EVENT_ID_FW_HEART_BEAT:
+        woal_send_iwevcustom_event(priv, CUS_EVT_HEART_BEAT);
+        break;
+    case MLAN_EVENT_ID_FW_WEP_ICV_ERR:
+        DBG_HEXDUMP(MCMD_D, "WEP ICV error", pmevent->event_buf,
+                    pmevent->event_len);
+        woal_send_iwevcustom_event(priv, CUS_EVT_WEP_ICV_ERR);
+        break;
+
+    case MLAN_EVENT_ID_DRV_DEFER_HANDLING:
+        queue_work(priv->phandle->workqueue, &priv->phandle->main_work);
+        break;
+    case MLAN_EVENT_ID_FW_CHANNEL_SWITCH_ANN:
+        woal_send_iwevcustom_event(priv, CUS_EVT_CHANNEL_SWITCH_ANN);
+        break;
+#endif /* STA_SUPPORT */
+    case MLAN_EVENT_ID_FW_STOP_TX:
+        woal_stop_queue(priv->netdev);
+        if (netif_carrier_ok(priv->netdev))
+            netif_carrier_off(priv->netdev);
+        break;
+    case MLAN_EVENT_ID_FW_START_TX:
+        if (!netif_carrier_ok(priv->netdev))
+            netif_carrier_on(priv->netdev);
+        woal_wake_queue(priv->netdev);
+        break;
+    case MLAN_EVENT_ID_FW_HS_WAKEUP:
+        /* simulate HSCFG_CANCEL command */
+        woal_cancel_hs(priv, MOAL_NO_WAIT);
+#ifdef STA_SUPPORT
+        if ((pmpriv =
+             woal_get_priv((moal_handle *) pmoal_handle, MLAN_BSS_ROLE_STA)))
+            woal_send_iwevcustom_event(pmpriv, CUS_EVT_HS_WAKEUP);
+#endif
+#ifdef UAP_SUPPORT
+        if ((pmpriv =
+             woal_get_priv((moal_handle *) pmoal_handle, MLAN_BSS_ROLE_UAP))) {
+            pmevent->event_id = UAP_EVENT_ID_HS_WAKEUP;
+            woal_broadcast_event(pmpriv, (t_u8 *) & pmevent->event_id,
+                                 sizeof(t_u32));
+        }
+#endif /* UAP_SUPPORT */
+        break;
+    case MLAN_EVENT_ID_DRV_HS_ACTIVATED:
+#ifdef STA_SUPPORT
+        if ((pmpriv =
+             woal_get_priv((moal_handle *) pmoal_handle, MLAN_BSS_ROLE_STA))) {
+            woal_send_iwevcustom_event(pmpriv, CUS_EVT_HS_ACTIVATED);
+        }
+#endif /* STA_SUPPORT */
+#if defined(UAP_SUPPORT)
+        if ((pmpriv =
+             woal_get_priv((moal_handle *) pmoal_handle, MLAN_BSS_ROLE_UAP))) {
+            pmevent->event_id = UAP_EVENT_ID_DRV_HS_ACTIVATED;
+            woal_broadcast_event(pmpriv, (t_u8 *) & pmevent->event_id,
+                                 sizeof(t_u32));
+        }
+#endif
+        if (priv->phandle->suspend_fail == MFALSE) {
+            woal_get_pm_info(priv, &pm_info);
+            if (pm_info.is_suspend_allowed == MTRUE) {
+                priv->phandle->hs_activated = MTRUE;
+#ifdef MMC_PM_FUNC_SUSPENDED
+                woal_wlan_is_suspended(priv->phandle);
+#endif
+            }
+            priv->phandle->hs_activate_wait_q_woken = MTRUE;
+            wake_up_interruptible(&priv->phandle->hs_activate_wait_q);
+        }
+        break;
+    case MLAN_EVENT_ID_DRV_HS_DEACTIVATED:
+#ifdef STA_SUPPORT
+        if ((pmpriv =
+             woal_get_priv((moal_handle *) pmoal_handle, MLAN_BSS_ROLE_STA))) {
+            woal_send_iwevcustom_event(pmpriv, CUS_EVT_HS_DEACTIVATED);
+        }
+#endif
+#if defined(UAP_SUPPORT)
+        if ((pmpriv =
+             woal_get_priv((moal_handle *) pmoal_handle, MLAN_BSS_ROLE_UAP))) {
+            pmevent->event_id = UAP_EVENT_ID_DRV_HS_DEACTIVATED;
+            woal_broadcast_event(pmpriv, (t_u8 *) & pmevent->event_id,
+                                 sizeof(t_u32));
+        }
+#endif
+        priv->phandle->hs_activated = MFALSE;
+        break;
+#ifdef UAP_SUPPORT
+    case MLAN_EVENT_ID_UAP_FW_BSS_START:
+        priv->bss_started = MTRUE;
+        memcpy(priv->current_addr, pmevent->event_buf + 6, ETH_ALEN);
+        memcpy(priv->netdev->dev_addr, priv->current_addr, ETH_ALEN);
+        woal_broadcast_event(priv, pmevent->event_buf, pmevent->event_len);
+        break;
+    case MLAN_EVENT_ID_UAP_FW_BSS_ACTIVE:
+        priv->media_connected = MTRUE;
+        if (!netif_carrier_ok(priv->netdev))
+            netif_carrier_on(priv->netdev);
+        woal_wake_queue(priv->netdev);
+        woal_broadcast_event(priv, pmevent->event_buf, pmevent->event_len);
+        break;
+    case MLAN_EVENT_ID_UAP_FW_BSS_IDLE:
+        priv->media_connected = MFALSE;
+        woal_stop_queue(priv->netdev);
+        if (netif_carrier_ok(priv->netdev))
+            netif_carrier_off(priv->netdev);
+        woal_broadcast_event(priv, pmevent->event_buf, pmevent->event_len);
+        break;
+    case MLAN_EVENT_ID_UAP_FW_STA_CONNECT:
+        memset(&wrqu, 0, sizeof(union iwreq_data));
+        memmove((pmevent->event_buf + strlen(CUS_EVT_STA_CONNECTED) + 1),
+                pmevent->event_buf, pmevent->event_len);
+        memcpy(pmevent->event_buf, (t_u8 *) CUS_EVT_STA_CONNECTED,
+               strlen(CUS_EVT_STA_CONNECTED));
+        pmevent->event_buf[strlen(CUS_EVT_STA_CONNECTED)] = 0;
+        wrqu.data.pointer = pmevent->event_buf;
+        if ((pmevent->event_len + strlen(CUS_EVT_STA_CONNECTED) + 1) >
+            IW_CUSTOM_MAX)
+            wrqu.data.length = ETH_ALEN + strlen(CUS_EVT_STA_CONNECTED) + 1;
+        else
+            wrqu.data.length =
+                pmevent->event_len + strlen(CUS_EVT_STA_CONNECTED) + 1;
+        wireless_send_event(priv->netdev, IWEVCUSTOM, &wrqu,
+                            pmevent->event_buf);
+        break;
+    case MLAN_EVENT_ID_UAP_FW_STA_DISCONNECT:
+        memset(&wrqu, 0, sizeof(union iwreq_data));
+        memmove((pmevent->event_buf + strlen(CUS_EVT_STA_DISCONNECTED) + 1),
+                pmevent->event_buf, pmevent->event_len);
+        memcpy(pmevent->event_buf, (t_u8 *) CUS_EVT_STA_DISCONNECTED,
+               strlen(CUS_EVT_STA_DISCONNECTED));
+        pmevent->event_buf[strlen(CUS_EVT_STA_DISCONNECTED)] = 0;
+
+        wrqu.data.pointer = pmevent->event_buf;
+        wrqu.data.length =
+            pmevent->event_len + strlen(CUS_EVT_STA_DISCONNECTED) + 1;
+        wireless_send_event(priv->netdev, IWEVCUSTOM, &wrqu,
+                            pmevent->event_buf);
+        break;
+    case MLAN_EVENT_ID_DRV_MGMT_FRAME:
+        woal_broadcast_event(priv, pmevent->event_buf, pmevent->event_len);
+        break;
+#endif /* UAP_SUPPORT */
+    case MLAN_EVENT_ID_DRV_PASSTHRU:
+        woal_broadcast_event(priv, pmevent->event_buf, pmevent->event_len);
+        break;
+    case MLAN_EVENT_ID_DRV_MEAS_REPORT:
+        /* We have received measurement report, wakeup measurement wait queue */
+        PRINTM(MINFO, "Measurement Report\n");
+        /* Going out of CAC checking period */
+        if (priv->phandle->cac_period == MTRUE) {
+            priv->phandle->cac_period = MFALSE;
+            if (priv->phandle->meas_wait_q_woken == MFALSE) {
+                priv->phandle->meas_wait_q_woken = MTRUE;
+                wake_up_interruptible(&priv->phandle->meas_wait_q);
+            }
+
+        }
+    default:
+        break;
+    }
+  done:
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/** 
+ *  @brief This function prints the debug message in mlan
+ *
+ *  @param pmoal_handle Pointer to the MOAL context
+ *  @param level	debug level
+ *  @param pformat	point to string format buf
+ *
+ *  @return    		N/A 
+ */
+t_void
+moal_print(IN t_void * pmoal_handle, IN t_u32 level, IN t_s8 * pformat, IN ...)
+{
+#ifdef	DEBUG_LEVEL1
+    va_list args;
+
+    if (level & MHEX_DUMP) {
+        t_u8 *buf = NULL;
+        int len = 0;
+
+        va_start(args, pformat);
+        buf = (t_u8 *) va_arg(args, t_u8 *);
+        len = (int) va_arg(args, int);
+        va_end(args);
+
+#ifdef DEBUG_LEVEL2
+        if (level & MINFO)
+            HEXDUMP((char *) pformat, buf, len);
+        else
+#endif /* DEBUG_LEVEL2 */
+        {
+            if (level & MERROR)
+                DBG_HEXDUMP(MERROR, (char *) pformat, buf, len);
+            if (level & MCMD_D)
+                DBG_HEXDUMP(MCMD_D, (char *) pformat, buf, len);
+            if (level & MDAT_D)
+                DBG_HEXDUMP(MDAT_D, (char *) pformat, buf, len);
+            if (level & MIF_D)
+                DBG_HEXDUMP(MIF_D, (char *) pformat, buf, len);
+            if (level & MFW_D)
+                DBG_HEXDUMP(MFW_D, (char *) pformat, buf, len);
+            if (level & MEVT_D)
+                DBG_HEXDUMP(MEVT_D, (char *) pformat, buf, len);
+        }
+    } else if (drvdbg & level) {
+        va_start(args, pformat);
+        vprintk(pformat, args);
+        va_end(args);
+    }
+#endif /* DEBUG_LEVEL1 */
+}
+
+/** 
+ *  @brief This function asserts the existence of the passed argument
+ *
+ *  @param pmoal_handle     A pointer to moal_private structure
+ *  @param cond             Condition to check
+ *
+ *  @return    		        N/A
+ */
+t_void
+moal_assert(IN t_void * pmoal_handle, IN t_u32 cond)
+{
+    if (!cond)
+        panic("Assert failed: Panic!");
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_shim.h linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_shim.h
--- linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_shim.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_shim.h	2017-09-23 03:42:50.170674599 +0800
@@ -0,0 +1,91 @@
+/** @file moal_shim.h
+  *
+  * @brief This file contains declaration referring to
+  * functions defined in moal module
+  *
+  * Copyright (C) 2008-2011, Marvell International Ltd. 
+  * 
+  * This software file (the "File") is distributed by Marvell International 
+  * Ltd. under the terms of the GNU General Public License Version 2, June 1991 
+  * (the "License").  You may use, redistribute and/or modify this File in 
+  * accordance with the terms and conditions of the License, a copy of which 
+  * is available by writing to the Free Software Foundation, Inc.,
+  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
+  * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
+  *
+  * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 
+  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 
+  * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about 
+  * this warranty disclaimer.
+  *
+  */
+/*************************************************************
+Change Log:
+    10/21/2008: initial version
+************************************************************/
+
+#ifndef _MOAL_H
+#define _MOAL_H
+
+mlan_status moal_get_fw_data(IN t_void * pmoal_handle,
+                             IN t_u32 offset, IN t_u32 len, OUT t_u8 * pbuf);
+mlan_status moal_init_fw_complete(IN t_void * pmoal_handle,
+                                  IN mlan_status status);
+mlan_status moal_shutdown_fw_complete(IN t_void * pmoal_handle,
+                                      IN mlan_status status);
+mlan_status moal_ioctl_complete(IN t_void * pmoal_handle,
+                                IN pmlan_ioctl_req pioctl_req,
+                                IN mlan_status status);
+mlan_status moal_alloc_mlan_buffer(IN t_void * pmoal_handle, IN t_u32 size,
+                                   OUT pmlan_buffer * pmbuf);
+mlan_status moal_free_mlan_buffer(IN t_void * pmoal_handle,
+                                  IN pmlan_buffer pmbuf);
+mlan_status moal_send_packet_complete(IN t_void * pmoal_handle,
+                                      IN pmlan_buffer pmbuf,
+                                      IN mlan_status status);
+mlan_status moal_recv_complete(IN t_void * pmoal_handle, IN pmlan_buffer pmbuf,
+                               IN t_u32 port, IN mlan_status status);
+mlan_status moal_write_data_async(IN t_void * pmoal_handle,
+                                  IN pmlan_buffer pmbuf, IN t_u32 port);
+mlan_status moal_write_data_sync(IN t_void * pmoal_handle,
+                                 IN pmlan_buffer pmbuf, IN t_u32 port,
+                                 IN t_u32 timeout);
+mlan_status moal_read_data_sync(IN t_void * pmoal_handle,
+                                IN OUT pmlan_buffer pmbuf, IN t_u32 port,
+                                IN t_u32 timeout);
+mlan_status moal_recv_packet(IN t_void * pmoal_handle, IN pmlan_buffer pmbuf);
+mlan_status moal_recv_event(IN t_void * pmoal_handle, IN pmlan_event pmevent);
+mlan_status moal_malloc(IN t_void * pmoal_handle,
+                        IN t_u32 size, IN t_u32 flag, OUT t_u8 ** ppbuf);
+mlan_status moal_mfree(IN t_void * pmoal_handle, IN t_u8 * pbuf);
+t_void *moal_memset(IN t_void * pmoal_handle,
+                    IN t_void * pmem, IN t_u8 byte, IN t_u32 num);
+t_void *moal_memcpy(IN t_void * pmoal_handle,
+                    IN t_void * pdest, IN const t_void * psrc, IN t_u32 num);
+t_void *moal_memmove(IN t_void * pmoal_handle,
+                     IN t_void * pdest, IN const t_void * psrc, IN t_u32 num);
+t_s32 moal_memcmp(IN t_void * pmoal_handle,
+                  IN const t_void * pmem1,
+                  IN const t_void * pmem2, IN t_u32 num);
+/** moal_udelay */
+t_void moal_udelay(IN t_void * pmoal_handle, IN t_u32 udelay);
+mlan_status moal_get_system_time(IN t_void * pmoal_handle, OUT t_u32 * psec,
+                                 OUT t_u32 * pusec);
+mlan_status moal_init_lock(IN t_void * pmoal_handle, OUT t_void ** pplock);
+mlan_status moal_free_lock(IN t_void * pmoal_handle, IN t_void * plock);
+mlan_status moal_spin_lock(IN t_void * pmoal_handle, IN t_void * plock);
+mlan_status moal_spin_unlock(IN t_void * pmoal_handle, IN t_void * plock);
+t_void moal_print(IN t_void * pmoal_handle, IN t_u32 level, IN t_s8 * pformat,
+                  IN ...);
+t_void moal_assert(IN t_void * pmoal_handle, IN t_u32 cond);
+mlan_status moal_init_timer(IN t_void * pmoal_handle,
+                            OUT t_void ** pptimer,
+                            IN t_void(*callback) (t_void * pcontext),
+                            IN t_void * pcontext);
+mlan_status moal_free_timer(IN t_void * pmoal_handle, IN t_void * ptimer);
+mlan_status moal_start_timer(IN t_void * pmoal_handle,
+                             IN t_void * ptimer,
+                             IN t_u8 periodic, IN t_u32 msec);
+mlan_status moal_stop_timer(IN t_void * pmoal_handle, IN t_void * ptimer);
+
+#endif /*_MOAL_H */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_uap.c linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_uap.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_uap.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_uap.c	2017-09-23 03:42:50.170674599 +0800
@@ -0,0 +1,1607 @@
+/** @file moal_uap.c
+  *
+  * @brief This file contains the major functions in UAP
+  * driver. 
+  *
+  * Copyright (C) 2008-2011, Marvell International Ltd. 
+  * 
+  * This software file (the "File") is distributed by Marvell International 
+  * Ltd. under the terms of the GNU General Public License Version 2, June 1991 
+  * (the "License").  You may use, redistribute and/or modify this File in 
+  * accordance with the terms and conditions of the License, a copy of which 
+  * is available by writing to the Free Software Foundation, Inc.,
+  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
+  * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
+  *
+  * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 
+  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 
+  * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about 
+  * this warranty disclaimer.
+  *
+  */
+
+/********************************************************
+Change log:
+    10/21/2008: initial version
+********************************************************/
+
+#include	"moal_main.h"
+#include    "moal_uap.h"
+
+/********************************************************
+		Local Variables
+********************************************************/
+
+/********************************************************
+		Global Variables
+********************************************************/
+
+/********************************************************
+		Local Functions
+********************************************************/
+/** 
+ *  @brief uap addba parameter handler
+ *   
+ *  @param dev      A pointer to net_device structure
+ *  @param req      A pointer to ifreq structure
+ *  @return         0 --success, otherwise fail
+ */
+static int
+woal_uap_addba_param(struct net_device *dev, struct ifreq *req)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_ioctl_req *ioctl_req = NULL;
+    mlan_ds_11n_cfg *cfg_11n = NULL;
+    addba_param param;
+    int ret = 0;
+
+    ENTER();
+    memset(&param, 0, sizeof(param));
+
+    /* Sanity check */
+    if (req->ifr_data == NULL) {
+        PRINTM(MERROR, "uap_addba_param() corrupt data\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    if (copy_from_user(&param, req->ifr_data, sizeof(param))) {
+        PRINTM(MERROR, "Copy from user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    PRINTM(MIOCTL,
+           "addba param: action=%d, timeout=%d, txwinsize=%d, rxwinsize=%d\n",
+           (int) param.action, (int) param.timeout, (int) param.txwinsize,
+           (int) param.rxwinsize);
+    ioctl_req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_11n_cfg));
+    if (ioctl_req == NULL) {
+        LEAVE();
+        return -ENOMEM;
+    }
+    cfg_11n = (mlan_ds_11n_cfg *) ioctl_req->pbuf;
+    cfg_11n->sub_command = MLAN_OID_11N_CFG_ADDBA_PARAM;
+    ioctl_req->req_id = MLAN_IOCTL_11N_CFG;
+
+    if (!param.action) {
+        /* Get addba param from MLAN */
+        ioctl_req->action = MLAN_ACT_GET;
+    } else {
+        /* Set addba param in MLAN */
+        ioctl_req->action = MLAN_ACT_SET;
+        cfg_11n->param.addba_param.timeout = param.timeout;
+        cfg_11n->param.addba_param.txwinsize = param.txwinsize;
+        cfg_11n->param.addba_param.rxwinsize = param.rxwinsize;
+    }
+    if (MLAN_STATUS_SUCCESS !=
+        woal_request_ioctl(priv, ioctl_req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    param.timeout = cfg_11n->param.addba_param.timeout;
+    param.txwinsize = cfg_11n->param.addba_param.txwinsize;
+    param.rxwinsize = cfg_11n->param.addba_param.rxwinsize;
+
+    /* Copy to user */
+    if (copy_to_user(req->ifr_data, &param, sizeof(param))) {
+        PRINTM(MERROR, "Copy to user failed!\n");
+        ret = -EFAULT;
+        goto done;
+    }
+  done:
+    if (ioctl_req)
+        kfree(ioctl_req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief uap aggr priority tbl 
+ *   
+ *  @param dev      A pointer to net_device structure
+ *  @param req      A pointer to ifreq structure
+ *  @return         0 --success, otherwise fail
+ */
+static int
+woal_uap_aggr_priotbl(struct net_device *dev, struct ifreq *req)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_ioctl_req *ioctl_req = NULL;
+    mlan_ds_11n_cfg *cfg_11n = NULL;
+    aggr_prio_tbl param;
+    int ret = 0;
+    int i = 0;
+
+    ENTER();
+    memset(&param, 0, sizeof(param));
+
+    /* Sanity check */
+    if (req->ifr_data == NULL) {
+        PRINTM(MERROR, "woal_uap_aggr_priotbl() corrupt data\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    if (copy_from_user(&param, req->ifr_data, sizeof(param))) {
+        PRINTM(MERROR, "Copy from user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    DBG_HEXDUMP(MCMD_D, "aggr_prio_tbl", (t_u8 *) & param, sizeof(param));
+
+    ioctl_req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_11n_cfg));
+    if (ioctl_req == NULL) {
+        LEAVE();
+        return -ENOMEM;
+    }
+    cfg_11n = (mlan_ds_11n_cfg *) ioctl_req->pbuf;
+    cfg_11n->sub_command = MLAN_OID_11N_CFG_AGGR_PRIO_TBL;
+    ioctl_req->req_id = MLAN_IOCTL_11N_CFG;
+
+    if (!param.action) {
+        /* Get aggr_prio_tbl from MLAN */
+        ioctl_req->action = MLAN_ACT_GET;
+    } else {
+        /* Set aggr_prio_tbl in MLAN */
+        ioctl_req->action = MLAN_ACT_SET;
+        for (i = 0; i < MAX_NUM_TID; i++) {
+            cfg_11n->param.aggr_prio_tbl.ampdu[i] = param.ampdu[i];
+            cfg_11n->param.aggr_prio_tbl.amsdu[i] = param.amsdu[i];
+        }
+    }
+    if (MLAN_STATUS_SUCCESS !=
+        woal_request_ioctl(priv, ioctl_req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    for (i = 0; i < MAX_NUM_TID; i++) {
+        param.ampdu[i] = cfg_11n->param.aggr_prio_tbl.ampdu[i];
+        param.amsdu[i] = cfg_11n->param.aggr_prio_tbl.amsdu[i];
+    }
+    /* Copy to user */
+    if (copy_to_user(req->ifr_data, &param, sizeof(param))) {
+        PRINTM(MERROR, "Copy to user failed!\n");
+        ret = -EFAULT;
+        goto done;
+    }
+  done:
+    if (ioctl_req)
+        kfree(ioctl_req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief uap addba reject tbl 
+ *   
+ *  @param dev      A pointer to net_device structure
+ *  @param req      A pointer to ifreq structure
+ *  @return         0 --success, otherwise fail
+ */
+static int
+woal_uap_addba_reject(struct net_device *dev, struct ifreq *req)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_ioctl_req *ioctl_req = NULL;
+    mlan_ds_11n_cfg *cfg_11n = NULL;
+    addba_reject_para param;
+    int ret = 0;
+    int i = 0;
+
+    ENTER();
+    memset(&param, 0, sizeof(param));
+
+    /* Sanity check */
+    if (req->ifr_data == NULL) {
+        PRINTM(MERROR, "woal_uap_addba_reject() corrupt data\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    if (copy_from_user(&param, req->ifr_data, sizeof(param))) {
+        PRINTM(MERROR, "Copy from user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    DBG_HEXDUMP(MCMD_D, "addba_reject tbl", (t_u8 *) & param, sizeof(param));
+
+    ioctl_req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_11n_cfg));
+    if (ioctl_req == NULL) {
+        LEAVE();
+        return -ENOMEM;
+    }
+    cfg_11n = (mlan_ds_11n_cfg *) ioctl_req->pbuf;
+    cfg_11n->sub_command = MLAN_OID_11N_CFG_ADDBA_REJECT;
+    ioctl_req->req_id = MLAN_IOCTL_11N_CFG;
+
+    if (!param.action) {
+        /* Get addba_reject tbl from MLAN */
+        ioctl_req->action = MLAN_ACT_GET;
+    } else {
+        /* Set addba_reject tbl in MLAN */
+        ioctl_req->action = MLAN_ACT_SET;
+        for (i = 0; i < MAX_NUM_TID; i++) {
+            cfg_11n->param.addba_reject[i] = param.addba_reject[i];
+        }
+    }
+    if (MLAN_STATUS_SUCCESS !=
+        woal_request_ioctl(priv, ioctl_req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    for (i = 0; i < MAX_NUM_TID; i++) {
+        param.addba_reject[i] = cfg_11n->param.addba_reject[i];
+    }
+    /* Copy to user */
+    if (copy_to_user(req->ifr_data, &param, sizeof(param))) {
+        PRINTM(MERROR, "Copy to user failed!\n");
+        ret = -EFAULT;
+        goto done;
+    }
+  done:
+    if (ioctl_req)
+        kfree(ioctl_req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief uap get_fw_info handler
+ *   
+ *  @param dev      A pointer to net_device structure
+ *  @param req      A pointer to ifreq structure
+ *  @return         0 --success, otherwise fail
+ */
+static int
+woal_uap_get_fw_info(struct net_device *dev, struct ifreq *req)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    fw_info fw;
+    mlan_fw_info fw_info;
+    int ret = 0;
+
+    ENTER();
+    memset(&fw, 0, sizeof(fw));
+    memset(&fw_info, 0, sizeof(fw_info));
+
+    /* Sanity check */
+    if (req->ifr_data == NULL) {
+        PRINTM(MERROR, "woal_uap_get_fw_info() corrupt data\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    if (copy_from_user(&fw, req->ifr_data, sizeof(fw))) {
+        PRINTM(MERROR, "Copy from user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    if (MLAN_STATUS_SUCCESS !=
+        woal_request_get_fw_info(priv, MOAL_IOCTL_WAIT, &fw_info)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    fw.fw_release_number = fw_info.fw_ver;
+    fw.hw_dev_mcs_support = fw_info.hw_dev_mcs_support;
+    /* Copy to user */
+    if (copy_to_user(req->ifr_data, &fw, sizeof(fw))) {
+        PRINTM(MERROR, "Copy to user failed!\n");
+        ret = -EFAULT;
+        goto done;
+    }
+  done:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief configure tx_pause settings
+ *   
+ *  @param dev      A pointer to net_device structure
+ *  @param req      A pointer to ifreq structure
+ *  @return         0 --success, otherwise fail
+ */
+static int
+woal_uap_txdatapause(struct net_device *dev, struct ifreq *req)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_ioctl_req *ioctl_req = NULL;
+    mlan_ds_misc_cfg *misc = NULL;
+    tx_data_pause_para param;
+    int ret = 0;
+
+    ENTER();
+    memset(&param, 0, sizeof(param));
+
+    /* Sanity check */
+    if (req->ifr_data == NULL) {
+        PRINTM(MERROR, "woal_uap_txdatapause corrupt data\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    if (copy_from_user(&param, req->ifr_data, sizeof(param))) {
+        PRINTM(MERROR, "Copy from user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    DBG_HEXDUMP(MCMD_D, "tx_data_pause_para", (t_u8 *) & param, sizeof(param));
+
+    ioctl_req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_misc_cfg));
+    if (ioctl_req == NULL) {
+        LEAVE();
+        return -ENOMEM;
+    }
+    misc = (mlan_ds_misc_cfg *) ioctl_req->pbuf;
+    misc->sub_command = MLAN_OID_MISC_TX_DATAPAUSE;
+    ioctl_req->req_id = MLAN_IOCTL_MISC_CFG;
+
+    if (!param.action) {
+        /* Get Tx data pause status from MLAN */
+        ioctl_req->action = MLAN_ACT_GET;
+    } else {
+        /* Set Tx data pause in MLAN */
+        ioctl_req->action = MLAN_ACT_SET;
+        misc->param.tx_datapause.tx_pause = param.txpause;
+        misc->param.tx_datapause.tx_buf_cnt = param.txbufcnt;
+    }
+    if (MLAN_STATUS_SUCCESS !=
+        woal_request_ioctl(priv, ioctl_req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    param.txpause = misc->param.tx_datapause.tx_pause;
+    param.txbufcnt = misc->param.tx_datapause.tx_buf_cnt;
+
+    /* Copy to user */
+    if (copy_to_user(req->ifr_data, &param, sizeof(param))) {
+        PRINTM(MERROR, "Copy to user failed!\n");
+        ret = -EFAULT;
+        goto done;
+    }
+  done:
+    if (ioctl_req)
+        kfree(ioctl_req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief uap ioctl handler
+ *   
+ *  @param dev      A pointer to net_device structure
+ *  @param req      A pointer to ifreq structure
+ *  @return         0 --success, otherwise fail
+ */
+static int
+woal_uap_ioctl(struct net_device *dev, struct ifreq *req)
+{
+    int ret = 0;
+    t_u32 subcmd = 0;
+    ENTER();
+    /* Sanity check */
+    if (req->ifr_data == NULL) {
+        PRINTM(MERROR, "uap_ioctl() corrupt data\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    if (copy_from_user(&subcmd, req->ifr_data, sizeof(subcmd))) {
+        PRINTM(MERROR, "Copy from user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+    PRINTM(MIOCTL, "ioctl subcmd=%d\n", (int) subcmd);
+    switch (subcmd) {
+    case UAP_ADDBA_PARA:
+        ret = woal_uap_addba_param(dev, req);
+        break;
+    case UAP_AGGR_PRIOTBL:
+        ret = woal_uap_aggr_priotbl(dev, req);
+        break;
+    case UAP_ADDBA_REJECT:
+        ret = woal_uap_addba_reject(dev, req);
+        break;
+    case UAP_FW_INFO:
+        ret = woal_uap_get_fw_info(dev, req);
+        break;
+    case UAP_TX_DATA_PAUSE:
+        ret = woal_uap_txdatapause(dev, req);
+        break;
+    default:
+        break;
+    }
+  done:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief uap station deauth ioctl handler
+ *   
+ *  @param dev      A pointer to net_device structure
+ *  @param req      A pointer to ifreq structure
+ *  @return         0 --success, otherwise fail
+ */
+static int
+woal_uap_sta_deauth_ioctl(struct net_device *dev, struct ifreq *req)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_ioctl_req *ioctl_req = NULL;
+    mlan_ds_bss *bss = NULL;
+    mlan_deauth_param deauth_param;
+    int ret = 0;
+
+    ENTER();
+
+    memset(&deauth_param, 0, sizeof(mlan_deauth_param));
+    /* Sanity check */
+    if (req->ifr_data == NULL) {
+        PRINTM(MERROR, "uap_sta_deauth_ioctl() corrupt data\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    if (copy_from_user(&deauth_param, req->ifr_data, sizeof(mlan_deauth_param))) {
+        PRINTM(MERROR, "Copy from user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+    PRINTM(MIOCTL,
+           "ioctl deauth station: %02x:%02x:%02x:%02x:%02x:%02x, reason=%d\n",
+           deauth_param.mac_addr[0], deauth_param.mac_addr[1],
+           deauth_param.mac_addr[2], deauth_param.mac_addr[3],
+           deauth_param.mac_addr[4], deauth_param.mac_addr[5],
+           deauth_param.reason_code);
+
+    ioctl_req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_bss));
+    if (ioctl_req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    bss = (mlan_ds_bss *) ioctl_req->pbuf;
+
+    bss->sub_command = MLAN_OID_UAP_DEAUTH_STA;
+    ioctl_req->req_id = MLAN_IOCTL_BSS;
+    ioctl_req->action = MLAN_ACT_SET;
+
+    memcpy(&bss->param.deauth_param, &deauth_param, sizeof(mlan_deauth_param));
+    if (MLAN_STATUS_SUCCESS !=
+        woal_request_ioctl(priv, ioctl_req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        if (copy_to_user(req->ifr_data, &ioctl_req->status_code, sizeof(t_u32)))
+            PRINTM(MERROR, "Copy to user failed!\n");
+        goto done;
+    }
+
+  done:
+    if (ioctl_req)
+        kfree(ioctl_req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ * @brief Set/Get radio
+ * 
+ *  @param dev      A pointer to net_device structure
+ *  @param req      A pointer to ifreq structure
+ * 
+ * @return           0 --success, otherwise fail
+ */
+static int
+woal_uap_radio_ctl(struct net_device *dev, struct ifreq *req)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    int ret = 0;
+    mlan_ds_radio_cfg *radio = NULL;
+    mlan_ioctl_req *mreq = NULL;
+    int data[2] = { 0, 0 };
+    mlan_bss_info bss_info;
+
+    ENTER();
+
+    /* Sanity check */
+    if (req->ifr_data == NULL) {
+        PRINTM(MERROR, "uap_radio_ctl() corrupt data\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+    /* Get user data */
+    if (copy_from_user(&data, req->ifr_data, sizeof(data))) {
+        PRINTM(MERROR, "Copy from user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+    if (data[0]) {
+        mreq = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_radio_cfg));
+        if (mreq == NULL) {
+            ret = -ENOMEM;
+            goto done;
+        }
+        radio = (mlan_ds_radio_cfg *) mreq->pbuf;
+        radio->sub_command = MLAN_OID_RADIO_CTRL;
+        mreq->req_id = MLAN_IOCTL_RADIO_CFG;
+        mreq->action = MLAN_ACT_SET;
+        radio->param.radio_on_off = (t_u32) data[1];
+        if (MLAN_STATUS_SUCCESS !=
+            woal_request_ioctl(priv, mreq, MOAL_IOCTL_WAIT)) {
+            ret = -EFAULT;
+        }
+        if (mreq)
+            kfree(mreq);
+    } else {
+        /* Get radio status */
+        memset(&bss_info, 0, sizeof(bss_info));
+        woal_get_bss_info(priv, MOAL_IOCTL_WAIT, &bss_info);
+
+        data[1] = bss_info.radio_on;
+        if (copy_to_user(req->ifr_data, data, sizeof(data))) {
+            PRINTM(MERROR, "Copy to user failed\n");
+            ret = -EFAULT;
+        }
+    }
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ * @brief Set/Get tx rate
+ * 
+ *  @param dev      A pointer to net_device structure
+ *  @param req      A pointer to ifreq structure
+ * 
+ * @return           0 --success, otherwise fail
+ */
+static int
+woal_uap_tx_rate_cfg(struct net_device *dev, struct ifreq *req)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    int data[2] = { 0, 0 };
+    int ret = 0;
+    mlan_ds_rate *rate = NULL;
+    mlan_ioctl_req *mreq = NULL;
+
+    ENTER();
+
+    /* Sanity check */
+    if (req->ifr_data == NULL) {
+        PRINTM(MERROR, "uap_radio_ctl() corrupt data\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+    /* Get user data */
+    if (copy_from_user(&data, req->ifr_data, sizeof(data))) {
+        PRINTM(MERROR, "Copy from user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+    mreq = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_rate));
+    if (mreq == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    rate = (mlan_ds_rate *) mreq->pbuf;
+    rate->param.rate_cfg.rate_type = MLAN_RATE_INDEX;
+    rate->sub_command = MLAN_OID_RATE_CFG;
+    mreq->req_id = MLAN_IOCTL_RATE;
+    if (!data[0])
+        mreq->action = MLAN_ACT_GET;
+    else {
+        mreq->action = MLAN_ACT_SET;
+        if (data[1] == AUTO_RATE)
+            rate->param.rate_cfg.is_rate_auto = 1;
+        else {
+            if ((data[1] != MLAN_RATE_INDEX_MCS32) &&
+                ((data[1] < 0) || (data[1] > MLAN_RATE_INDEX_MCS7))) {
+                ret = -EINVAL;
+                goto done;
+            }
+        }
+        rate->param.rate_cfg.rate = data[1];
+    }
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, mreq, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    if (data[0]) {
+        priv->rate_index = data[1];
+    } else {
+        if (rate->param.rate_cfg.is_rate_auto)
+            data[1] = AUTO_RATE;
+        else
+            data[1] = rate->param.rate_cfg.rate;
+
+        if (copy_to_user(req->ifr_data, data, sizeof(data))) {
+            PRINTM(MERROR, "Copy to user failed\n");
+            ret = -EFAULT;
+        }
+    }
+  done:
+    if (mreq)
+        kfree(mreq);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief uap bss control ioctl handler
+ *   
+ *  @param dev      A pointer to net_device structure
+ *  @param req      A pointer to ifreq structure
+ *  @return         0 --success, otherwise fail
+ */
+static int
+woal_uap_bss_ctrl_ioctl(struct net_device *dev, struct ifreq *req)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    int ret = 0, data = 0;
+
+    ENTER();
+
+    /* Sanity check */
+    if (req->ifr_data == NULL) {
+        PRINTM(MERROR, "uap_bss_ctrl() corrupt data\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    if (copy_from_user(&data, req->ifr_data, sizeof(data))) {
+        PRINTM(MERROR, "Copy from user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+    ret = woal_uap_bss_ctrl(priv, MOAL_IOCTL_WAIT, data);
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief uap power mode ioctl handler
+ *   
+ *  @param dev      A pointer to net_device structure
+ *  @param req      A pointer to ifreq structure
+ *  @return         0 --success, otherwise fail
+ */
+static int
+woal_uap_power_mode_ioctl(struct net_device *dev, struct ifreq *req)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_ioctl_req *ioctl_req = NULL;
+    mlan_ds_pm_cfg *pm_cfg = NULL;
+    mlan_ds_ps_mgmt ps_mgmt;
+    int ret = 0;
+
+    ENTER();
+
+    memset(&ps_mgmt, 0, sizeof(mlan_ds_ps_mgmt));
+
+    /* Sanity check */
+    if (req->ifr_data == NULL) {
+        PRINTM(MERROR, "uap_power_mode_ioctl() corrupt data\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    if (copy_from_user(&ps_mgmt, req->ifr_data, sizeof(mlan_ds_ps_mgmt))) {
+        PRINTM(MERROR, "Copy from user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+    PRINTM(MIOCTL,
+           "ioctl power: flag=0x%x ps_mode=%d ctrl_bitmap=%d min_sleep=%d max_sleep=%d "
+           "inact_to=%d min_awake=%d max_awake=%d\n", ps_mgmt.flags,
+           (int) ps_mgmt.ps_mode, (int) ps_mgmt.sleep_param.ctrl_bitmap,
+           (int) ps_mgmt.sleep_param.min_sleep,
+           (int) ps_mgmt.sleep_param.max_sleep,
+           (int) ps_mgmt.inact_param.inactivity_to,
+           (int) ps_mgmt.inact_param.min_awake,
+           (int) ps_mgmt.inact_param.max_awake);
+
+    if (ps_mgmt.
+        flags & ~(PS_FLAG_PS_MODE | PS_FLAG_SLEEP_PARAM |
+                  PS_FLAG_INACT_SLEEP_PARAM)) {
+        PRINTM(MERROR, "Invalid parameter: flags = 0x%x\n", ps_mgmt.flags);
+        ret = -EINVAL;
+        goto done;
+    }
+
+    if (ps_mgmt.ps_mode > PS_MODE_INACTIVITY) {
+        PRINTM(MERROR, "Invalid parameter: ps_mode = %d\n",
+               (int) ps_mgmt.flags);
+        ret = -EINVAL;
+        goto done;
+    }
+
+    ioctl_req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_pm_cfg));
+    if (ioctl_req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    pm_cfg = (mlan_ds_pm_cfg *) ioctl_req->pbuf;
+    pm_cfg->sub_command = MLAN_OID_PM_CFG_PS_MODE;
+    ioctl_req->req_id = MLAN_IOCTL_PM_CFG;
+    if (ps_mgmt.flags) {
+        ioctl_req->action = MLAN_ACT_SET;
+        memcpy(&pm_cfg->param.ps_mgmt, &ps_mgmt, sizeof(mlan_ds_ps_mgmt));
+    } else {
+        ioctl_req->action = MLAN_ACT_GET;
+    }
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_request_ioctl(priv, ioctl_req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        if (copy_to_user(req->ifr_data, &ioctl_req->status_code, sizeof(t_u32)))
+            PRINTM(MERROR, "Copy to user failed!\n");
+        goto done;
+    }
+    if (!ps_mgmt.flags) {
+        /* Copy to user */
+        if (copy_to_user
+            (req->ifr_data, &pm_cfg->param.ps_mgmt, sizeof(mlan_ds_ps_mgmt))) {
+            PRINTM(MERROR, "Copy to user failed!\n");
+            ret = -EFAULT;
+            goto done;
+        }
+    }
+  done:
+    if (ioctl_req)
+        kfree(ioctl_req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief uap BSS config ioctl handler
+ *   
+ *  @param dev      A pointer to net_device structure
+ *  @param req      A pointer to ifreq structure
+ *  @return         0 --success, otherwise fail
+ */
+static int
+woal_uap_bss_cfg_ioctl(struct net_device *dev, struct ifreq *req)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    int ret = 0;
+    mlan_ds_bss *bss = NULL;
+    mlan_ioctl_req *ioctl_req = NULL;
+    int offset = 0;
+    t_u32 action = 0;
+
+    ENTER();
+
+    /* Sanity check */
+    if (req->ifr_data == NULL) {
+        PRINTM(MERROR, "uap_bss_cfg_ioctl() corrupt data\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+    /* Get action */
+    if (copy_from_user(&action, req->ifr_data + offset, sizeof(action))) {
+        PRINTM(MERROR, "Copy from user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    offset += sizeof(action);
+
+    /* Allocate an IOCTL request buffer */
+    ioctl_req =
+        (mlan_ioctl_req *) woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_bss));
+    if (ioctl_req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    bss = (mlan_ds_bss *) ioctl_req->pbuf;
+    bss->sub_command = MLAN_OID_UAP_BSS_CONFIG;
+    ioctl_req->req_id = MLAN_IOCTL_BSS;
+    if (action == 1) {
+        ioctl_req->action = MLAN_ACT_SET;
+    } else {
+        ioctl_req->action = MLAN_ACT_GET;
+    }
+
+    if (ioctl_req->action == MLAN_ACT_SET) {
+        /* Get the BSS config from user */
+        if (copy_from_user
+            (&bss->param.bss_config, req->ifr_data + offset,
+             sizeof(mlan_uap_bss_param))) {
+            PRINTM(MERROR, "Copy from user failed\n");
+            ret = -EFAULT;
+            goto done;
+        }
+    }
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_request_ioctl(priv, ioctl_req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    if (ioctl_req->action == MLAN_ACT_GET) {
+        offset = sizeof(action);
+
+        /* Copy to user : BSS config */
+        if (copy_to_user
+            (req->ifr_data + offset, &bss->param.bss_config,
+             sizeof(mlan_uap_bss_param))) {
+            PRINTM(MERROR, "Copy to user failed!\n");
+            ret = -EFAULT;
+            goto done;
+        }
+    }
+  done:
+    if (ioctl_req)
+        kfree(ioctl_req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief uap get station list handler
+ *   
+ *  @param dev      A pointer to net_device structure
+ *  @param req      A pointer to ifreq structure
+ *  @return         0 --success, otherwise fail
+ */
+static int
+woal_uap_get_sta_list_ioctl(struct net_device *dev, struct ifreq *req)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    int ret = 0;
+    mlan_ds_get_info *info = NULL;
+    mlan_ioctl_req *ioctl_req = NULL;
+
+    ENTER();
+
+    /* Sanity check */
+    if (req->ifr_data == NULL) {
+        PRINTM(MERROR, "uap_get_sta_list_ioctl() corrupt data\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+    /* Allocate an IOCTL request buffer */
+    ioctl_req =
+        (mlan_ioctl_req *) woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_get_info));
+    if (ioctl_req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    info = (mlan_ds_get_info *) ioctl_req->pbuf;
+    info->sub_command = MLAN_OID_UAP_STA_LIST;
+    ioctl_req->req_id = MLAN_IOCTL_GET_INFO;
+    ioctl_req->action = MLAN_ACT_GET;
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_request_ioctl(priv, ioctl_req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    if (ioctl_req->action == MLAN_ACT_GET) {
+        /* Copy to user : sta_list */
+        if (copy_to_user
+            (req->ifr_data, &info->param.sta_list, sizeof(mlan_ds_sta_list))) {
+            PRINTM(MERROR, "Copy to user failed!\n");
+            ret = -EFAULT;
+            goto done;
+        }
+    }
+  done:
+    if (ioctl_req)
+        kfree(ioctl_req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief uAP set WAPI key ioctl
+ *   
+ *  @param priv      A pointer to moal_private structure
+ *  @param msg       A pointer to wapi_msg structure
+ *
+ *  @return          0 --success, otherwise fail
+ */
+static int
+woal_uap_set_wapi_key_ioctl(moal_private * priv, wapi_msg * msg)
+{
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_sec_cfg *sec = NULL;
+    int ret = 0;
+    wapi_key_msg *key_msg = NULL;
+    t_u8 bcast_addr[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
+
+    ENTER();
+    if (msg->msg_len != sizeof(wapi_key_msg)) {
+        ret = -EINVAL;
+        goto done;
+    }
+    key_msg = (wapi_key_msg *) msg->msg;
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_sec_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    sec = (mlan_ds_sec_cfg *) req->pbuf;
+    sec->sub_command = MLAN_OID_SEC_CFG_ENCRYPT_KEY;
+    req->req_id = MLAN_IOCTL_SEC_CFG;
+    req->action = MLAN_ACT_SET;
+
+    sec->param.encrypt_key.is_wapi_key = MTRUE;
+    sec->param.encrypt_key.key_len = MLAN_MAX_KEY_LENGTH;
+    memcpy(sec->param.encrypt_key.mac_addr, key_msg->mac_addr, ETH_ALEN);
+    sec->param.encrypt_key.key_index = key_msg->key_id;
+    if (0 == memcmp(key_msg->mac_addr, bcast_addr, ETH_ALEN))
+        sec->param.encrypt_key.key_flags = KEY_FLAG_GROUP_KEY;
+    else
+        sec->param.encrypt_key.key_flags = KEY_FLAG_SET_TX_KEY;
+    memcpy(sec->param.encrypt_key.key_material, key_msg->key,
+           sec->param.encrypt_key.key_len);
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT))
+        ret = -EFAULT;
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Enable/Disable wapi in firmware
+ *   
+ *  @param priv          A pointer to moal_private structure
+ *  @param enable        MTRUE/MFALSE
+ *
+ *  @return              MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail
+ */
+static mlan_status
+woal_enable_wapi(moal_private * priv, t_u8 enable)
+{
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_bss *bss = NULL;
+    mlan_status status;
+
+    ENTER();
+
+    /* Allocate an IOCTL request buffer */
+    req = (mlan_ioctl_req *) woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_bss));
+    if (req == NULL) {
+        status = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    /* Fill request buffer */
+    bss = (mlan_ds_bss *) req->pbuf;
+    bss->sub_command = MLAN_OID_UAP_BSS_CONFIG;
+    req->req_id = MLAN_IOCTL_BSS;
+    req->action = MLAN_ACT_GET;
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT);
+    if (status != MLAN_STATUS_SUCCESS) {
+        PRINTM(MERROR, "Get AP setting  failed! status=%d, error_code=0x%lx\n",
+               status, req->status_code);
+    }
+
+    /* Change AP default setting */
+    req->action = MLAN_ACT_SET;
+    if (enable == MFALSE) {
+        bss->param.bss_config.auth_mode = MLAN_AUTH_MODE_OPEN;
+        bss->param.bss_config.protocol = PROTOCOL_NO_SECURITY;
+    } else {
+        bss->param.bss_config.auth_mode = MLAN_AUTH_MODE_OPEN;
+        bss->param.bss_config.protocol = PROTOCOL_WAPI;
+    }
+
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT);
+    if (status != MLAN_STATUS_SUCCESS) {
+        PRINTM(MERROR, "Set AP setting failed! status=%d, error_code=0x%lx\n",
+               status, req->status_code);
+    }
+    if (enable)
+        woal_uap_bss_ctrl(priv, MOAL_IOCTL_WAIT, UAP_BSS_START);
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return status;
+}
+
+/** 
+ *  @brief uAP set WAPI flag ioctl
+ *   
+ *  @param priv      A pointer to moal_private structure
+ *  @param msg       A pointer to wapi_msg structure
+ *
+ *  @return          0 --success, otherwise fail
+ */
+static int
+woal_uap_set_wapi_flag_ioctl(moal_private * priv, wapi_msg * msg)
+{
+    t_u8 wapi_psk_ie[] =
+        { 0x44, 0x14, 0x01, 0x00, 0x01, 0x00, 0x00, 0x14, 0x72, 0x02,
+        0x01, 0x00, 0x00, 0x14, 0x72, 0x01, 0x00, 0x14, 0x72, 0x01,
+        0x00, 0x00
+    };
+    t_u8 wapi_cert_ie[] =
+        { 0x44, 0x14, 0x01, 0x00, 0x01, 0x00, 0x00, 0x14, 0x72, 0x01,
+        0x01, 0x00, 0x00, 0x14, 0x72, 0x01, 0x00, 0x14, 0x72, 0x01,
+        0x00, 0x00
+    };
+    mlan_ds_misc_cfg *misc = NULL;
+    mlan_ioctl_req *req = NULL;
+    int ret = 0;
+
+    ENTER();
+
+    woal_uap_bss_ctrl(priv, MOAL_IOCTL_WAIT, UAP_BSS_STOP);
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_misc_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    misc = (mlan_ds_misc_cfg *) req->pbuf;
+    misc->sub_command = MLAN_OID_MISC_GEN_IE;
+    req->req_id = MLAN_IOCTL_MISC_CFG;
+    req->action = MLAN_ACT_SET;
+
+    misc->param.gen_ie.type = MLAN_IE_TYPE_GEN_IE;
+    misc->param.gen_ie.len = sizeof(wapi_psk_ie);
+    if (msg->msg[0] & WAPI_MODE_PSK) {
+        memcpy(misc->param.gen_ie.ie_data, wapi_psk_ie, misc->param.gen_ie.len);
+    } else if (msg->msg[0] & WAPI_MODE_CERT) {
+        memcpy(misc->param.gen_ie.ie_data, wapi_cert_ie,
+               misc->param.gen_ie.len);
+    } else if (msg->msg[0] == 0) {
+        /* disable WAPI in driver */
+        if (MLAN_STATUS_SUCCESS !=
+            woal_set_wapi_enable(priv, MOAL_IOCTL_WAIT, 0))
+            ret = -EFAULT;
+        woal_enable_wapi(priv, MFALSE);
+        goto done;
+    } else {
+        ret = -EINVAL;
+        goto done;
+    }
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    woal_enable_wapi(priv, MTRUE);
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief set wapi ioctl function
+ *   
+ *  @param dev      A pointer to net_device structure
+ *  @param req      A pointer to ifreq structure
+ *  @return         0 --success, otherwise fail
+ */
+static int
+woal_uap_set_wapi(struct net_device *dev, struct ifreq *req)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    wapi_msg msg;
+    int ret = 0;
+
+    ENTER();
+
+    /* Sanity check */
+    if (req->ifr_data == NULL) {
+        PRINTM(MERROR, "uap_set_wapi() corrupt data\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+    memset(&msg, 0, sizeof(msg));
+
+    if (copy_from_user(&msg, req->ifr_data, sizeof(msg))) {
+        PRINTM(MERROR, "Copy from user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+    PRINTM(MIOCTL, "set wapi msg_type = %d, msg_len=%d\n", msg.msg_type,
+           msg.msg_len);
+    DBG_HEXDUMP(MCMD_D, "wapi msg", msg.msg, msg.msg_len);
+
+    switch (msg.msg_type) {
+    case P80211_PACKET_WAPIFLAG:
+        ret = woal_uap_set_wapi_flag_ioctl(priv, &msg);
+        break;
+    case P80211_PACKET_SETKEY:
+        ret = woal_uap_set_wapi_key_ioctl(priv, &msg);
+        break;
+    default:
+        ret = -EOPNOTSUPP;
+        break;
+    }
+  done:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief uap hs_cfg ioctl handler
+ *   
+ *  @param dev      A pointer to net_device structure
+ *  @param req      A pointer to ifreq structure
+ *  @return         0 --success, otherwise fail
+ */
+static int
+woal_uap_hs_cfg(struct net_device *dev, struct ifreq *req)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_ds_hs_cfg hscfg;
+    ds_hs_cfg hs_cfg;
+    t_u16 action;
+    int ret = 0;
+
+    ENTER();
+
+    memset(&hscfg, 0, sizeof(mlan_ds_hs_cfg));
+    memset(&hs_cfg, 0, sizeof(ds_hs_cfg));
+
+    /* Sanity check */
+    if (req->ifr_data == NULL) {
+        PRINTM(MERROR, "uap_hs_cfg() corrupt data\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    if (copy_from_user(&hs_cfg, req->ifr_data, sizeof(ds_hs_cfg))) {
+        PRINTM(MERROR, "Copy from user failed\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+    PRINTM(MIOCTL,
+           "ioctl hscfg: flags=0x%lx condition=0x%lx gpio=%d gap=0x%lx\n",
+           hs_cfg.flags, hs_cfg.conditions, (int) hs_cfg.gpio, hs_cfg.gap);
+
+    if (hs_cfg.flags & HS_CFG_FLAG_SET) {
+        action = MLAN_ACT_SET;
+        if (hs_cfg.flags != HS_CFG_FLAG_ALL) {
+            woal_set_get_hs_params(priv, MLAN_ACT_GET, MOAL_IOCTL_WAIT, &hscfg);
+        }
+        if (hs_cfg.flags & HS_CFG_FLAG_CONDITION)
+            hscfg.conditions = hs_cfg.conditions;
+        if (hs_cfg.flags & HS_CFG_FLAG_GPIO)
+            hscfg.gpio = hs_cfg.gpio;
+        if (hs_cfg.flags & HS_CFG_FLAG_GAP)
+            hscfg.gap = hs_cfg.gap;
+
+        /* Issue IOCTL to set up parameters */
+        hscfg.is_invoke_hostcmd = MFALSE;
+        if (MLAN_STATUS_SUCCESS !=
+            woal_set_get_hs_params(priv, action, MOAL_IOCTL_WAIT, &hscfg)) {
+            ret = -EFAULT;
+            goto done;
+        }
+    } else {
+        action = MLAN_ACT_GET;
+    }
+
+    /* Issue IOCTL to invoke hostcmd */
+    hscfg.is_invoke_hostcmd = MTRUE;
+    if (MLAN_STATUS_SUCCESS !=
+        woal_set_get_hs_params(priv, action, MOAL_IOCTL_WAIT, &hscfg)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    if (!(hs_cfg.flags & HS_CFG_FLAG_SET)) {
+        hs_cfg.flags =
+            HS_CFG_FLAG_CONDITION | HS_CFG_FLAG_GPIO | HS_CFG_FLAG_GAP;
+        hs_cfg.conditions = hscfg.conditions;
+        hs_cfg.gpio = hscfg.gpio;
+        hs_cfg.gap = hscfg.gap;
+        /* Copy to user */
+        if (copy_to_user(req->ifr_data, &hs_cfg, sizeof(ds_hs_cfg))) {
+            PRINTM(MERROR, "Copy to user failed!\n");
+            ret = -EFAULT;
+            goto done;
+        }
+    }
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/********************************************************
+		Global Functions
+********************************************************/
+
+/**
+ *  @brief uap BSS control ioctl handler
+ *   
+ *  @param priv             A pointer to moal_private structure
+ *  @param wait_option      Wait option
+ *  @param data             BSS control type
+ *  @return                 0 --success, otherwise fail
+ */
+int
+woal_uap_bss_ctrl(moal_private * priv, t_u8 wait_option, int data)
+{
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_bss *bss = NULL;
+    int ret = 0;
+
+    ENTER();
+
+    PRINTM(MIOCTL, "ioctl bss ctrl=%d\n", data);
+    if ((data != UAP_BSS_START) && (data != UAP_BSS_STOP) &&
+        (data != UAP_BSS_RESET)) {
+        PRINTM(MERROR, "Invalid parameter: %d\n", data);
+        ret = -EINVAL;
+        goto done;
+    }
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_bss));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    bss = (mlan_ds_bss *) req->pbuf;
+    switch (data) {
+    case UAP_BSS_START:
+        if (priv->bss_started == MTRUE) {
+            PRINTM(MWARN, "Warning: BSS already started!\n");
+            // goto done;
+        }
+        bss->sub_command = MLAN_OID_BSS_START;
+        break;
+    case UAP_BSS_STOP:
+        if (priv->bss_started == MFALSE) {
+            PRINTM(MWARN, "Warning: BSS already stopped!\n");
+            // goto done;
+        }
+        bss->sub_command = MLAN_OID_BSS_STOP;
+        break;
+    case UAP_BSS_RESET:
+        bss->sub_command = MLAN_OID_UAP_BSS_RESET;
+        woal_cancel_cac_block(priv);
+        break;
+    }
+    req->req_id = MLAN_IOCTL_BSS;
+    req->action = MLAN_ACT_SET;
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    if (data == UAP_BSS_STOP || data == UAP_BSS_RESET)
+        priv->bss_started = MFALSE;
+
+  done:
+    if (req)
+        kfree(req);
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief This function sets multicast addresses to firmware
+ *  
+ *  @param dev     A pointer to net_device structure
+ *  @return        N/A
+ */
+void
+woal_uap_set_multicast_list(struct net_device *dev)
+{
+    ENTER();
+
+    LEAVE();
+}
+
+/**
+ *  @brief ioctl function - entry point
+ *
+ *  @param dev		A pointer to net_device structure
+ *  @param req	   	A pointer to ifreq structure
+ *  @param cmd 		Command
+ *
+ *  @return          0 --success, otherwise fail
+ */
+int
+woal_uap_do_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
+{
+    int ret = 0;
+    ENTER();
+    PRINTM(MIOCTL, "uap_do_ioctl: ioctl cmd = 0x%x\n", cmd);
+    switch (cmd) {
+    case UAP_HOSTCMD:
+        ret = woal_hostcmd_ioctl(dev, req);
+        break;
+    case UAP_IOCTL_CMD:
+        ret = woal_uap_ioctl(dev, req);
+        break;
+    case UAP_POWER_MODE:
+        ret = woal_uap_power_mode_ioctl(dev, req);
+        break;
+    case UAP_BSS_CTRL:
+        ret = woal_uap_bss_ctrl_ioctl(dev, req);
+        break;
+    case UAP_WAPI_MSG:
+        ret = woal_uap_set_wapi(dev, req);
+        break;
+    case UAP_BSS_CONFIG:
+        ret = woal_uap_bss_cfg_ioctl(dev, req);
+        break;
+    case UAP_STA_DEAUTH:
+        ret = woal_uap_sta_deauth_ioctl(dev, req);
+        break;
+    case UAP_RADIO_CTL:
+        ret = woal_uap_radio_ctl(dev, req);
+        break;
+    case UAP_TX_RATE_CFG:
+        ret = woal_uap_tx_rate_cfg(dev, req);
+        break;
+    case UAP_GET_STA_LIST:
+        ret = woal_uap_get_sta_list_ioctl(dev, req);
+        break;
+    case UAP_CUSTOM_IE:
+        ret = woal_custom_ie_ioctl(dev, req);
+        break;
+    case UAP_GET_BSS_TYPE:
+        ret = woal_get_bss_type(dev, req);
+        break;
+    case UAP_HS_CFG:
+        ret = woal_uap_hs_cfg(dev, req);
+        break;
+    default:
+        ret = woal_uap_do_priv_ioctl(dev, req, cmd);
+        break;
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Get version 
+ *   
+ *  @param priv 		A pointer to moal_private structure
+ *  @param version		A pointer to version buffer
+ *  @param max_len		max length of version buffer
+ *
+ *  @return 	   		N/A
+ */
+void
+woal_uap_get_version(moal_private * priv, char *version, int max_len)
+{
+    mlan_ds_get_info *info = NULL;
+    mlan_ioctl_req *req = NULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_get_info));
+    if (req == NULL) {
+        LEAVE();
+        return;
+    }
+
+    info = (mlan_ds_get_info *) req->pbuf;
+    info->sub_command = MLAN_OID_GET_VER_EXT;
+    req->req_id = MLAN_IOCTL_GET_INFO;
+    req->action = MLAN_ACT_GET;
+
+    status = woal_request_ioctl(priv, req, MOAL_PROC_WAIT);
+    if (status == MLAN_STATUS_SUCCESS) {
+        PRINTM(MINFO, "MOAL UAP VERSION: %s\n",
+               info->param.ver_ext.version_str);
+        snprintf(version, max_len, driver_version,
+                 info->param.ver_ext.version_str);
+    }
+
+    if (req && (status != MLAN_STATUS_PENDING))
+        kfree(req);
+
+    LEAVE();
+    return;
+}
+
+/** 
+ *  @brief Get uap statistics 
+ *   
+ *  @param priv 		        A pointer to moal_private structure
+ *  @param wait_option          Wait option
+ *  @param ustats               A pointer to mlan_ds_uap_stats structure
+ *
+ *  @return                     MLAN_STATUS_SUCCESS/MLAN_STATUS_PENDING -- success, otherwise fail 
+ */
+mlan_status
+woal_uap_get_stats(moal_private * priv, t_u8 wait_option,
+                   mlan_ds_uap_stats * ustats)
+{
+    mlan_ds_get_info *info = NULL;
+    mlan_ioctl_req *req = NULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_get_info));
+    if (req == NULL) {
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+
+    info = (mlan_ds_get_info *) req->pbuf;
+    info->sub_command = MLAN_OID_GET_STATS;
+    req->req_id = MLAN_IOCTL_GET_INFO;
+    req->action = MLAN_ACT_GET;
+
+    status = woal_request_ioctl(priv, req, wait_option);
+    if (status == MLAN_STATUS_SUCCESS) {
+        if (ustats)
+            memcpy(ustats, &info->param.ustats, sizeof(mlan_ds_uap_stats));
+        priv->w_stats.discard.fragment = info->param.ustats.fcs_error_count;
+        priv->w_stats.discard.retries = info->param.ustats.retry_count;
+        priv->w_stats.discard.misc = info->param.ustats.ack_failure_count;
+    }
+
+    if (req && (status != MLAN_STATUS_PENDING))
+        kfree(req);
+
+    LEAVE();
+    return status;
+}
+
+/**
+ *  @brief Set/Get system configuration parameters
+ *
+ *  @param priv 		    A pointer to moal_private structure
+ *  @param action           MLAN_ACT_SET or MLAN_ACT_GET
+ *  @param sys_cfg          A pointer to mlan_uap_bss_param structure
+ *
+ *  @return                 MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+woal_set_get_sys_config(moal_private * priv, t_u16 action,
+                        mlan_uap_bss_param * sys_cfg)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ds_bss *bss = NULL;
+    mlan_ioctl_req *req = NULL;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_bss));
+    if (req == NULL) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    bss = (mlan_ds_bss *) req->pbuf;
+    bss->sub_command = MLAN_OID_UAP_BSS_CONFIG;
+    req->req_id = MLAN_IOCTL_BSS;
+    req->action = action;
+
+    if (action == MLAN_ACT_SET) {
+        memcpy(&bss->param.bss_config, sys_cfg, sizeof(mlan_uap_bss_param));
+    }
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    if (action == MLAN_ACT_GET) {
+        memcpy(sys_cfg, &bss->param.bss_config, sizeof(mlan_uap_bss_param));
+    }
+
+  done:
+    if (req)
+        kfree(req);
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set invalid data for each member of mlan_uap_bss_param
+ *  structure
+ *
+ *  @param config   A pointer to mlan_uap_bss_param structure
+ *
+ *  @return         N/A
+ */
+void
+woal_set_sys_config_invalid_data(mlan_uap_bss_param * config)
+{
+    ENTER();
+
+    memset(config, 0, sizeof(mlan_uap_bss_param));
+    config->bcast_ssid_ctl = 0x7F;
+    config->radio_ctl = 0x7F;
+    config->dtim_period = 0x7F;
+    config->beacon_period = 0x7FFF;
+    config->tx_data_rate = 0x7FFF;
+    config->mcbc_data_rate = 0x7FFF;
+    config->tx_power_level = 0x7F;
+    config->tx_antenna = 0x7F;
+    config->rx_antenna = 0x7F;
+    config->pkt_forward_ctl = 0x7F;
+    config->max_sta_count = 0x7FFF;
+    config->auth_mode = 0x7F;
+    config->sta_ageout_timer = 0x7FFFFFFF;
+    config->pairwise_update_timeout = 0x7FFFFFFF;
+    config->pwk_retries = 0x7FFFFFFF;
+    config->groupwise_update_timeout = 0x7FFFFFFF;
+    config->gwk_retries = 0x7FFFFFFF;
+    config->mgmt_ie_passthru_mask = 0x7FFFFFFF;
+    config->ps_sta_ageout_timer = 0x7FFFFFFF;
+    config->rts_threshold = 0x7FFF;
+    config->frag_threshold = 0x7FFF;
+    config->retry_limit = 0x7FFF;
+    config->filter.filter_mode = 0x7FFF;
+    config->filter.mac_count = 0x7FFF;
+    config->wpa_cfg.rsn_protection = 0x7F;
+    config->wpa_cfg.gk_rekey_time = 0x7FFFFFFF;
+    config->enable_2040coex = 0x7F;
+
+    LEAVE();
+}
+
+/** 
+ *  @brief Handle get info resp
+ *   
+ *  @param priv 	Pointer to moal_private structure
+ *  @param info 	Pointer to mlan_ds_get_info structure
+ *
+ *  @return    		N/A
+ */
+void
+woal_ioctl_get_uap_info_resp(moal_private * priv, mlan_ds_get_info * info)
+{
+    ENTER();
+    switch (info->sub_command) {
+    case MLAN_OID_GET_STATS:
+        priv->w_stats.discard.fragment = info->param.ustats.fcs_error_count;
+        priv->w_stats.discard.retries = info->param.ustats.retry_count;
+        priv->w_stats.discard.misc = info->param.ustats.ack_failure_count;
+        break;
+    default:
+        break;
+    }
+    LEAVE();
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_uap.h linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_uap.h
--- linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_uap.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_uap.h	2017-09-23 03:42:50.170674599 +0800
@@ -0,0 +1,244 @@
+/** @file moal_uap.h
+  *
+  * @brief This file contains uap driver specific defines etc.
+  * 
+  * Copyright (C) 2009-2011, Marvell International Ltd.  
+  *
+  * This software file (the "File") is distributed by Marvell International 
+  * Ltd. under the terms of the GNU General Public License Version 2, June 1991 
+  * (the "License").  You may use, redistribute and/or modify this File in 
+  * accordance with the terms and conditions of the License, a copy of which 
+  * is available by writing to the Free Software Foundation, Inc.,
+  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
+  * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
+  *
+  * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 
+  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 
+  * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about 
+  * this warranty disclaimer.
+  *
+  */
+
+/********************************************************
+Change log:
+    02/02/2009: initial version
+********************************************************/
+
+#ifndef _MOAL_UAP_H
+#define _MOAL_UAP_H
+
+/** Private command ID to Host command */
+#define	UAP_HOSTCMD			(SIOCDEVPRIVATE + 1)
+/** Private command ID to send ioctl */
+#define UAP_IOCTL_CMD		(SIOCDEVPRIVATE + 2)
+/** Updating ADDBA variables */
+#define UAP_ADDBA_PARA		0
+/** Updating priority table for AMPDU/AMSDU */
+#define UAP_AGGR_PRIOTBL    1
+/** Updating addbareject table */
+#define UAP_ADDBA_REJECT    2
+/** Get FW INFO */
+#define UAP_FW_INFO         4
+/** Tx data pause subcommand */
+#define UAP_TX_DATA_PAUSE    5
+
+/** Private command ID to Power Mode */
+#define	UAP_POWER_MODE			(SIOCDEVPRIVATE + 3)
+
+/** Private command id to start/stop/reset bss */
+#define UAP_BSS_CTRL        (SIOCDEVPRIVATE + 4)
+/** BSS START */
+#define UAP_BSS_START               0
+/** BSS STOP */
+#define UAP_BSS_STOP                1
+/** BSS RESET */
+#define UAP_BSS_RESET               2
+/** Band config 5GHz */
+#define BAND_CONFIG_5GHZ            0x01
+
+/** wapi_msg */
+typedef struct _wapi_msg
+{
+    /** message type */
+    t_u16 msg_type;
+    /** message len */
+    t_u16 msg_len;
+    /** message */
+    t_u8 msg[96];
+} wapi_msg;
+
+/* wapi key msg */
+typedef struct _wapi_key_msg
+{
+    /** mac address */
+    t_u8 mac_addr[MLAN_MAC_ADDR_LENGTH];
+    /** pad */
+    t_u8 pad;
+    /** key id */
+    t_u8 key_id;
+    /** key */
+    t_u8 key[32];
+} wapi_key_msg;
+
+/** Private command ID to set wapi info */
+#define	UAP_WAPI_MSG		(SIOCDEVPRIVATE + 10)
+/** set wapi flag */
+#define  P80211_PACKET_WAPIFLAG     0x0001
+/** set wapi key */
+#define  P80211_PACKET_SETKEY      0x0003
+/** wapi mode psk */
+#define WAPI_MODE_PSK    0x04
+/** wapi mode certificate */
+#define WAPI_MODE_CERT   0x08
+
+/** Auto Rate */
+#define AUTO_RATE 0xFF
+
+/** radio control command */
+#define	UAP_RADIO_CTL               (SIOCDEVPRIVATE + 5)
+/** tx rate cfg command */
+#define UAP_TX_RATE_CFG             (SIOCDEVPRIVATE + 8)
+
+/** Private command ID to BSS config */
+#define	UAP_BSS_CONFIG              (SIOCDEVPRIVATE + 6)
+
+/** deauth station */
+#define	UAP_STA_DEAUTH	            (SIOCDEVPRIVATE + 7)
+
+/** uap get station list */
+#define UAP_GET_STA_LIST            (SIOCDEVPRIVATE + 11)
+
+/** Private command ID to set/get custom IE buffer */
+#define	UAP_CUSTOM_IE               (SIOCDEVPRIVATE + 13)
+
+/** HS WAKE UP event id */
+#define UAP_EVENT_ID_HS_WAKEUP             0x80000001
+/** HS_ACTIVATED event id */
+#define UAP_EVENT_ID_DRV_HS_ACTIVATED      0x80000002
+/** HS DEACTIVATED event id */
+#define UAP_EVENT_ID_DRV_HS_DEACTIVATED    0x80000003
+
+/** Private command ID to set/get Host Sleep configuration */
+#define UAP_HS_CFG                  (SIOCDEVPRIVATE + 14)
+/** Host sleep flag set */
+#define HS_CFG_FLAG_GET         0
+/** Host sleep flag get */
+#define HS_CFG_FLAG_SET         1
+/** Host sleep flag for condition */
+#define HS_CFG_FLAG_CONDITION   2
+/** Host sleep flag for GPIO */
+#define HS_CFG_FLAG_GPIO        4
+/** Host sleep flag for Gap */
+#define HS_CFG_FLAG_GAP         8
+/** Host sleep flag for all */
+#define HS_CFG_FLAG_ALL         0x0f
+/** Host sleep mask to get condition */
+#define HS_CFG_CONDITION_MASK   0x0f
+
+/** ds_hs_cfg */
+typedef struct _ds_hs_cfg
+{
+    /** Bit0: 0 - Get, 1 Set
+     *  Bit1: 1 - conditions is valid
+     *  Bit2: 2 - gpio is valid
+     *  Bit3: 3 - gap is valid
+     */
+    t_u32 flags;
+    /** Host sleep config condition */
+    /** Bit0: non-unicast data
+     *  Bit1: unicast data
+     *  Bit2: mac events
+     *  Bit3: magic packet 
+     */
+    t_u32 conditions;
+    /** GPIO */
+    t_u32 gpio;
+    /** Gap in milliseconds */
+    t_u32 gap;
+} ds_hs_cfg;
+
+/** Private command ID to get BSS type */
+#define	UAP_GET_BSS_TYPE            (SIOCDEVPRIVATE + 15)
+
+/** addba_param */
+typedef struct _addba_param
+{
+    /** subcmd */
+    t_u32 subcmd;
+    /** Set/Get */
+    t_u32 action;
+    /** block ack timeout for ADDBA request */
+    t_u32 timeout;
+    /** Buffer size for ADDBA request */
+    t_u32 txwinsize;
+    /** Buffer size for ADDBA response */
+    t_u32 rxwinsize;
+} addba_param;
+
+/** aggr_prio_tbl */
+typedef struct _aggr_prio_tbl
+{
+    /** subcmd */
+    t_u32 subcmd;
+    /** Set/Get */
+    t_u32 action;
+    /** ampdu priority table */
+    t_u8 ampdu[MAX_NUM_TID];
+    /** amsdu priority table */
+    t_u8 amsdu[MAX_NUM_TID];
+} aggr_prio_tbl;
+
+/** addba_reject parameters */
+typedef struct _addba_reject_para
+{
+    /** subcmd */
+    t_u32 subcmd;
+    /** Set/Get */
+    t_u32 action;
+    /** BA Reject paramters */
+    t_u8 addba_reject[MAX_NUM_TID];
+} addba_reject_para;
+
+/** fw_info */
+typedef struct _fw_info
+{
+    /** subcmd */
+    t_u32 subcmd;
+    /** Get */
+    t_u32 action;
+    /** Firmware release number */
+    t_u32 fw_release_number;
+    /** Device support for MIMO abstraction of MCSs */
+    t_u8 hw_dev_mcs_support;
+} fw_info;
+
+/** tx_data_pause parameters */
+typedef struct _tx_data_pause_para
+{
+    /** subcmd */
+    t_u32 subcmd;
+    /** Set/Get */
+    t_u32 action;
+    /** enable/disable Tx data pause*/
+    t_u16 txpause;
+    /** Max number of TX buffer allowed for all PS client*/
+    t_u16 txbufcnt;
+} tx_data_pause_para;
+
+void woal_uap_set_multicast_list(struct net_device *dev);
+int woal_uap_do_ioctl(struct net_device *dev, struct ifreq *req, int cmd);
+int woal_uap_bss_ctrl(moal_private * priv, t_u8 wait_option, int data);
+void woal_uap_get_version(moal_private * priv, char *version, int max_len);
+mlan_status woal_uap_get_stats(moal_private * priv, t_u8 wait_option,
+                               mlan_ds_uap_stats * ustats);
+extern struct iw_handler_def woal_uap_handler_def;
+struct iw_statistics *woal_get_uap_wireless_stats(struct net_device *dev);
+/** IOCTL function for wireless private IOCTLs */
+int woal_uap_do_priv_ioctl(struct net_device *dev, struct ifreq *req, int cmd);
+/** Set invalid data for each member of mlan_uap_bss_param */
+void woal_set_sys_config_invalid_data(mlan_uap_bss_param * config);
+/** Set/Get system configuration parameters */
+mlan_status woal_set_get_sys_config(moal_private * priv,
+                                    t_u16 action, mlan_uap_bss_param * sys_cfg);
+void woal_ioctl_get_uap_info_resp(moal_private * priv, mlan_ds_get_info * info);
+#endif /* _MOAL_UAP_H */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_uap_priv.c linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_uap_priv.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_uap_priv.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_uap_priv.c	2017-09-23 03:42:50.170674599 +0800
@@ -0,0 +1,380 @@
+/** @file  moal_uap_priv.c
+  *
+  * @brief This file contains standard ioctl functions
+  *
+  * Copyright (C) 2010-2011, Marvell International Ltd.
+  *
+  * This software file (the "File") is distributed by Marvell International
+  * Ltd. under the terms of the GNU General Public License Version 2, June 1991
+  * (the "License").  You may use, redistribute and/or modify this File in
+  * accordance with the terms and conditions of the License, a copy of which
+  * is available by writing to the Free Software Foundation, Inc.,
+  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
+  * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
+  *
+  * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
+  * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about
+  * this warranty disclaimer.
+  *
+  */
+
+/************************************************************************
+Change log:
+    08/06/2010: initial version
+************************************************************************/
+
+#include	"moal_main.h"
+#include    "moal_uap.h"
+#include    "moal_uap_priv.h"
+
+/********************************************************
+                Local Variables
+********************************************************/
+
+/********************************************************
+		Global Variables
+********************************************************/
+
+/********************************************************
+		Local Functions
+********************************************************/
+
+/**
+ *  @brief Parse AP configuration from ASCII string
+ *
+ *  @param ap_cfg   A pointer to mlan_uap_bss_param structure
+ *  @param buf      A pointer to user data
+ *
+ *  @return         0 --success, otherwise fail
+ */
+static int
+woal_uap_ap_cfg_parse_data(mlan_uap_bss_param * ap_cfg, t_s8 * buf)
+{
+    int ret = 0, atoi_ret;
+    int set_sec = 0, set_key = 0, set_chan = 0;
+    int set_preamble = 0, set_scb = 0, set_ssid = 0;
+    t_s8 *begin = buf, *value = NULL, *opt = NULL;
+
+    ENTER();
+
+    while (begin) {
+        value = woal_strsep(&begin, ',', '/');
+        opt = woal_strsep(&value, '=', '/');
+        if (opt && !strncmp(opt, "END", strlen("END"))) {
+            if (!ap_cfg->ssid.ssid_len) {
+                PRINTM(MERROR, "Minimum option required is SSID\n");
+                ret = -EINVAL;
+                goto done;
+            }
+            PRINTM(MINFO, "Parsing terminated by string END\n");
+            break;
+        }
+        if (!opt || !value || !value[0]) {
+            PRINTM(MERROR, "Invalid option\n");
+            ret = -EINVAL;
+            goto done;
+        } else if (!strncmp(opt, "ASCII_CMD", strlen("ASCII_CMD"))) {
+            if (strncmp(value, "AP_CFG", strlen("AP_CFG"))) {
+                PRINTM(MERROR, "ASCII_CMD: %s not matched with AP_CFG\n",
+                       value);
+                ret = -EFAULT;
+                goto done;
+            }
+            value = woal_strsep(&begin, ',', '/');
+            opt = woal_strsep(&value, '=', '/');
+            if (!opt || !value || !value[0]) {
+                PRINTM(MERROR, "Minimum option required is SSID\n");
+                ret = -EINVAL;
+                goto done;
+            } else if (!strncmp(opt, "SSID", strlen("SSID"))) {
+                if (set_ssid) {
+                    PRINTM(MWARN, "Skipping SSID, found again!\n");
+                    continue;
+                }
+                if (strlen(value) > MLAN_MAX_SSID_LENGTH) {
+                    PRINTM(MERROR, "SSID length exceeds max length\n");
+                    ret = -EFAULT;
+                    goto done;
+                }
+                ap_cfg->ssid.ssid_len = strlen(value);
+                strncpy((char *) ap_cfg->ssid.ssid, value, strlen(value));
+                PRINTM(MINFO, "ssid=%s, len=%d\n", ap_cfg->ssid.ssid,
+                       (int) ap_cfg->ssid.ssid_len);
+                set_ssid = 1;
+            } else {
+                PRINTM(MERROR, "AP_CFG: Invalid option %s, "
+                       "expect SSID\n", opt);
+                ret = -EINVAL;
+                goto done;
+            }
+        } else if (!strncmp(opt, "SEC", strlen("SEC"))) {
+            if (set_sec) {
+                PRINTM(MWARN, "Skipping SEC, found again!\n");
+                continue;
+            }
+            if (!strnicmp(value, "open", strlen("open"))) {
+                ap_cfg->auth_mode = MLAN_AUTH_MODE_OPEN;
+                if (set_key)
+                    ap_cfg->wpa_cfg.length = 0;
+                ap_cfg->key_mgmt = KEY_MGMT_NONE;
+                ap_cfg->protocol = PROTOCOL_NO_SECURITY;
+            } else if (!strnicmp(value, "wpa2-psk", strlen("wpa2-psk"))) {
+                ap_cfg->auth_mode = MLAN_AUTH_MODE_OPEN;
+                ap_cfg->protocol = PROTOCOL_WPA2;
+                ap_cfg->key_mgmt = KEY_MGMT_PSK;
+                ap_cfg->wpa_cfg.pairwise_cipher_wpa = CIPHER_AES_CCMP;
+                ap_cfg->wpa_cfg.pairwise_cipher_wpa2 = CIPHER_AES_CCMP;
+                ap_cfg->wpa_cfg.group_cipher = CIPHER_AES_CCMP;
+            } else {
+                PRINTM(MERROR, "AP_CFG: Invalid value=%s for %s\n", value, opt);
+                ret = -EFAULT;
+                goto done;
+            }
+            set_sec = 1;
+        } else if (!strncmp(opt, "KEY", strlen("KEY"))) {
+            if (set_key) {
+                PRINTM(MWARN, "Skipping KEY, found again!\n");
+                continue;
+            }
+            if (set_sec && ap_cfg->protocol != PROTOCOL_WPA2) {
+                PRINTM(MWARN, "Warning! No KEY for open mode\n");
+                set_key = 1;
+                continue;
+            }
+            if (strlen(value) < MLAN_MIN_PASSPHRASE_LENGTH ||
+                strlen(value) > MLAN_PMK_HEXSTR_LENGTH) {
+                PRINTM(MERROR, "Invalid PSK/PMK length\n");
+                ret = -EINVAL;
+                goto done;
+            }
+            ap_cfg->wpa_cfg.length = strlen(value);
+            memcpy(ap_cfg->wpa_cfg.passphrase, value, strlen(value));
+            set_key = 1;
+        } else if (!strncmp(opt, "CHANNEL", strlen("CHANNEL"))) {
+            if (set_chan) {
+                PRINTM(MWARN, "Skipping CHANNEL, found again!\n");
+                continue;
+            }
+            if (woal_atoi(&atoi_ret, value)) {
+                ret = -EINVAL;
+                goto done;
+            }
+            if (atoi_ret < 1 || atoi_ret > MLAN_MAX_CHANNEL) {
+                PRINTM(MERROR, "AP_CFG: Channel must be between 1 and %d"
+                       "(both included)\n", MLAN_MAX_CHANNEL);
+                ret = -EINVAL;
+                goto done;
+            }
+            ap_cfg->channel = atoi_ret;
+            set_chan = 1;
+        } else if (!strncmp(opt, "PREAMBLE", strlen("PREAMBLE"))) {
+            if (set_preamble) {
+                PRINTM(MWARN, "Skipping PREAMBLE, found again!\n");
+                continue;
+            }
+            if (woal_atoi(&atoi_ret, value)) {
+                ret = -EINVAL;
+                goto done;
+            }
+            /* This is a READ only value from FW, so we can not set this and
+               pass it successfully */
+            set_preamble = 1;
+        } else if (!strncmp(opt, "MAX_SCB", strlen("MAX_SCB"))) {
+            if (set_scb) {
+                PRINTM(MWARN, "Skipping MAX_SCB, found again!\n");
+                continue;
+            }
+            if (woal_atoi(&atoi_ret, value)) {
+                ret = -EINVAL;
+                goto done;
+            }
+            if (atoi_ret < 1 || atoi_ret > MAX_STA_COUNT) {
+                PRINTM(MERROR, "AP_CFG: MAX_SCB must be between 1 to %d "
+                       "(both included)\n", MAX_STA_COUNT);
+                ret = -EINVAL;
+                goto done;
+            }
+            ap_cfg->max_sta_count = (t_u16) atoi_ret;
+            set_scb = 1;
+        } else {
+            PRINTM(MERROR, "Invalid option %s\n", opt);
+            ret = -EINVAL;
+            goto done;
+        }
+    }
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set AP configuration
+ *
+ *  @param priv     A pointer to moal_private structure
+ *  @param wrq      A pointer to user data
+ *
+ *  @return         0 --success, otherwise fail
+ */
+static int
+woal_uap_set_ap_cfg(moal_private * priv, struct iwreq *wrq)
+{
+    int ret = 0;
+    static t_s8 buf[MAX_BUF_LEN];
+    mlan_uap_bss_param sys_config;
+    int restart = 0;
+
+    ENTER();
+
+#define MIN_AP_CFG_CMD_LEN   16 /* strlen("ASCII_CMD=AP_CFG") */
+    if ((wrq->u.data.length - 1) <= MIN_AP_CFG_CMD_LEN) {
+        PRINTM(MERROR, "Invalid length of command\n");
+        ret = -EINVAL;
+        goto done;
+    }
+
+    memset(buf, 0, MAX_BUF_LEN);
+    memcpy(buf, wrq->u.data.pointer, wrq->u.data.length);
+
+    /* Initialize the invalid values so that the correct values below are
+       downloaded to firmware */
+    woal_set_sys_config_invalid_data(&sys_config);
+
+    /* Setting the default values */
+    sys_config.channel = 6;
+    sys_config.preamble_type = 0;
+
+    if ((ret = woal_uap_ap_cfg_parse_data(&sys_config, buf)))
+        goto done;
+
+    /* If BSS already started stop it first and restart after changing the
+       setting */
+    if (priv->bss_started == MTRUE) {
+        if ((ret = woal_uap_bss_ctrl(priv, MOAL_IOCTL_WAIT, UAP_BSS_STOP)))
+            goto done;
+        restart = 1;
+    }
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_set_get_sys_config(priv, MLAN_ACT_SET, &sys_config)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    /* Start the BSS after successful configuration */
+    if (restart)
+        ret = woal_uap_bss_ctrl(priv, MOAL_IOCTL_WAIT, UAP_BSS_START);
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/********************************************************
+		Global Functions
+********************************************************/
+
+/**
+ *  @brief ioctl function for wireless IOCTLs
+ *
+ *  @param dev		A pointer to net_device structure
+ *  @param req	   	A pointer to ifreq structure
+ *  @param cmd 		Command
+ *
+ *  @return          0 --success, otherwise fail
+ */
+int
+woal_uap_do_priv_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    struct iwreq *wrq = (struct iwreq *) req;
+    int ret = 0;
+
+    ENTER();
+
+    switch (cmd) {
+    case WOAL_UAP_SETNONE_GETNONE:
+        switch (wrq->u.data.flags) {
+        case WOAL_UAP_START:
+            break;
+        case WOAL_UAP_STOP:
+            ret = woal_uap_bss_ctrl(priv, MOAL_IOCTL_WAIT, UAP_BSS_STOP);
+            break;
+        case WOAL_AP_BSS_START:
+            ret = woal_uap_bss_ctrl(priv, MOAL_IOCTL_WAIT, UAP_BSS_START);
+            break;
+        case WOAL_AP_BSS_STOP:
+            ret = woal_uap_bss_ctrl(priv, MOAL_IOCTL_WAIT, UAP_BSS_STOP);
+            break;
+        default:
+            ret = -EINVAL;
+            break;
+        }
+        break;
+    case WOAL_UAP_SETONEINT_GETWORDCHAR:
+        switch (wrq->u.data.flags) {
+        case WOAL_UAP_VERSION:
+            ret = woal_get_driver_version(priv, req);
+            break;
+        case WOAL_UAP_VEREXT:
+            ret = woal_get_driver_verext(priv, req);
+            break;
+        default:
+            ret = -EOPNOTSUPP;
+            break;
+        }
+        break;
+    case WOAL_UAP_SET_GET_256_CHAR:
+        switch (wrq->u.data.flags) {
+        case WOAL_WL_FW_RELOAD:
+            break;
+        case WOAL_AP_SET_CFG:
+            ret = woal_uap_set_ap_cfg(priv, wrq);
+            break;
+        default:
+            ret = -EINVAL;
+            break;
+        }
+        break;
+#if defined(WFD_SUPPORT)
+#if defined(STA_SUPPORT) && defined(UAP_SUPPORT)
+    case WOAL_UAP_SETONEINT_GETONEINT:
+        switch (wrq->u.data.flags) {
+        case WOAL_UAP_SET_GET_BSS_ROLE:
+            ret = woal_set_get_bss_role(priv, wrq);
+            break;
+        default:
+            ret = -EINVAL;
+            break;
+        }
+        break;
+#endif
+#endif
+    case WOAL_UAP_HOST_CMD:
+        ret = woal_host_command(priv, wrq);
+        break;
+    case WOAL_UAP_FROYO_START:
+        break;
+    case WOAL_UAP_FROYO_STOP:
+        ret = woal_uap_bss_ctrl(priv, MOAL_IOCTL_WAIT, UAP_BSS_STOP);
+        break;
+    case WOAL_UAP_FROYO_AP_BSS_START:
+        ret = woal_uap_bss_ctrl(priv, MOAL_IOCTL_WAIT, UAP_BSS_START);
+        break;
+    case WOAL_UAP_FROYO_AP_BSS_STOP:
+        ret = woal_uap_bss_ctrl(priv, MOAL_IOCTL_WAIT, UAP_BSS_STOP);
+        break;
+    case WOAL_UAP_FROYO_WL_FW_RELOAD:
+        break;
+    case WOAL_UAP_FROYO_AP_SET_CFG:
+        ret = woal_uap_set_ap_cfg(priv, wrq);
+        break;
+    default:
+        ret = -EINVAL;
+        break;
+    }
+
+    LEAVE();
+    return ret;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_uap_priv.h linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_uap_priv.h
--- linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_uap_priv.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_uap_priv.h	2017-09-23 03:42:50.170674599 +0800
@@ -0,0 +1,197 @@
+/** @file  moal_uap_priv.h
+  *
+  * @brief This file contains definition for extended private IOCTL call.
+  *
+  * Copyright (C) 2010-2011, Marvell International Ltd.
+  *
+  * This software file (the "File") is distributed by Marvell International
+  * Ltd. under the terms of the GNU General Public License Version 2, June 1991
+  * (the "License").  You may use, redistribute and/or modify this File in
+  * accordance with the terms and conditions of the License, a copy of which
+  * is available by writing to the Free Software Foundation, Inc.,
+  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
+  * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
+  *
+  * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
+  * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about
+  * this warranty disclaimer.
+  *
+  */
+
+/************************************************************************
+Change log:
+    08/06/2010: initial version
+************************************************************************/
+
+#ifndef _MOAL_UAP_PRIV_H_
+#define _MOAL_UAP_PRIV_H_
+
+/** Maximum buffer length for WOAL_UAP_SET_GET_256_CHAR */
+#define MAX_BUF_LEN                 256
+
+/** Private command ID */
+#define WOAL_UAP_IOCTL                          0x8BE0
+
+/** Private command to get/set 256 chars */
+#define WOAL_UAP_SET_GET_256_CHAR               (WOAL_UAP_IOCTL + 1)
+/** Private command ID to FW reload */
+#define WOAL_WL_FW_RELOAD           1
+/** Private command ID to set AP configuration */
+#define WOAL_AP_SET_CFG             2
+
+/** Private command ID to set/get none */
+#define WOAL_UAP_SETNONE_GETNONE                (WOAL_UAP_IOCTL + 2)
+/** Private command ID to start UAP */
+#define WOAL_UAP_START              1
+/** Private command ID to stop UAP */
+#define WOAL_UAP_STOP               2
+/** Private command ID to start AP BSS */
+#define WOAL_AP_BSS_START           3
+/** Private command ID to stop AP BSS */
+#define WOAL_AP_BSS_STOP            4
+
+/** Private command ID to set one int/get word char */
+#define WOAL_UAP_SETONEINT_GETWORDCHAR          (WOAL_UAP_IOCTL + 3)
+/** Private command ID to get version */
+#define WOAL_UAP_VERSION            1
+/** Private command ID to get extended version */
+#define WOAL_UAP_VEREXT             2
+
+#if defined(WFD_SUPPORT)
+#if defined(STA_SUPPORT) && defined(UAP_SUPPORT)
+/** Private command ID to set one int/get one int */
+#define WOAL_UAP_SETONEINT_GETONEINT            (WOAL_UAP_IOCTL + 5)
+/** Private command ID for set/get BSS role */
+#define WOAL_UAP_SET_GET_BSS_ROLE       1
+#endif
+#endif
+
+/** Private command ID for hostcmd */
+#define WOAL_UAP_HOST_CMD                       (WOAL_UAP_IOCTL + 17)
+
+/** The following command IDs are for Froyo app */
+/** Private command ID to start AP BSS */
+#define WOAL_UAP_FROYO_AP_BSS_START             (WOAL_UAP_IOCTL + 24)
+/** Private command ID to stop AP BSS */
+#define WOAL_UAP_FROYO_AP_BSS_STOP              (WOAL_UAP_IOCTL + 26)
+/** Private command ID to set AP config */
+#define WOAL_UAP_FROYO_AP_SET_CFG               (WOAL_UAP_IOCTL + 27)
+/** Private command ID to start driver */
+#define WOAL_UAP_FROYO_START                    (WOAL_UAP_IOCTL + 28)
+/** Private command ID to reload FW */
+#define WOAL_UAP_FROYO_WL_FW_RELOAD             (WOAL_UAP_IOCTL + 29)
+/** Private command ID to stop driver */
+#define WOAL_UAP_FROYO_STOP                     (WOAL_UAP_IOCTL + 30)
+
+/**
+ * iwpriv ioctl handlers
+ */
+static const struct iw_priv_args woal_uap_priv_args[] = {
+    {
+     WOAL_UAP_SETNONE_GETNONE,
+     IW_PRIV_TYPE_NONE,
+     IW_PRIV_TYPE_NONE,
+     ""},
+    {
+     WOAL_UAP_START,
+     IW_PRIV_TYPE_NONE,
+     IW_PRIV_TYPE_NONE,
+     "start"},
+    {
+     WOAL_UAP_STOP,
+     IW_PRIV_TYPE_NONE,
+     IW_PRIV_TYPE_NONE,
+     "stop"},
+    {
+     WOAL_AP_BSS_START,
+     IW_PRIV_TYPE_NONE,
+     IW_PRIV_TYPE_NONE,
+     "bssstart"},
+    {
+     WOAL_AP_BSS_STOP,
+     IW_PRIV_TYPE_NONE,
+     IW_PRIV_TYPE_NONE,
+     "bssstop"},
+    {
+     WOAL_UAP_SETONEINT_GETWORDCHAR,
+     IW_PRIV_TYPE_INT | 1,
+     IW_PRIV_TYPE_CHAR | 128,
+     ""},
+    {
+     WOAL_UAP_VERSION,
+     IW_PRIV_TYPE_INT | 1,
+     IW_PRIV_TYPE_CHAR | 128,
+     "version"},
+    {
+     WOAL_UAP_VEREXT,
+     IW_PRIV_TYPE_INT | 1,
+     IW_PRIV_TYPE_CHAR | 128,
+     "verext"},
+#if defined(WFD_SUPPORT)
+#if defined(STA_SUPPORT) && defined(UAP_SUPPORT)
+    {
+     WOAL_UAP_SETONEINT_GETONEINT,
+     IW_PRIV_TYPE_INT | 1,
+     IW_PRIV_TYPE_INT | 1,
+     ""},
+    {
+     WOAL_UAP_SET_GET_BSS_ROLE,
+     IW_PRIV_TYPE_INT | 1,
+     IW_PRIV_TYPE_INT | 1,
+     "bssrole"},
+#endif
+#endif
+    {
+     WOAL_UAP_SET_GET_256_CHAR,
+     IW_PRIV_TYPE_CHAR | 256,
+     IW_PRIV_TYPE_CHAR | 256,
+     ""},
+    {
+     WOAL_WL_FW_RELOAD,
+     IW_PRIV_TYPE_CHAR | 256,
+     IW_PRIV_TYPE_CHAR | 256,
+     "fwreload"},
+    {
+     WOAL_AP_SET_CFG,
+     IW_PRIV_TYPE_CHAR | 256,
+     IW_PRIV_TYPE_CHAR | 256,
+     "apcfg"},
+    {
+     WOAL_UAP_HOST_CMD,
+     IW_PRIV_TYPE_BYTE | 2047,
+     IW_PRIV_TYPE_BYTE | 2047,
+     "hostcmd"},
+    {
+     WOAL_UAP_FROYO_START,
+     IW_PRIV_TYPE_NONE,
+     IW_PRIV_TYPE_NONE,
+     "START"},
+    {
+     WOAL_UAP_FROYO_STOP,
+     IW_PRIV_TYPE_NONE,
+     IW_PRIV_TYPE_NONE,
+     "STOP"},
+    {
+     WOAL_UAP_FROYO_AP_BSS_START,
+     IW_PRIV_TYPE_NONE,
+     IW_PRIV_TYPE_NONE,
+     "AP_BSS_START"},
+    {
+     WOAL_UAP_FROYO_AP_BSS_STOP,
+     IW_PRIV_TYPE_NONE,
+     IW_PRIV_TYPE_NONE,
+     "AP_BSS_STOP"},
+    {
+     WOAL_UAP_FROYO_WL_FW_RELOAD,
+     IW_PRIV_TYPE_CHAR | 256,
+     IW_PRIV_TYPE_CHAR | 256,
+     "WL_FW_RELOAD"},
+    {
+     WOAL_UAP_FROYO_AP_SET_CFG,
+     IW_PRIV_TYPE_CHAR | 256,
+     IW_PRIV_TYPE_CHAR | 256,
+     "AP_SET_CFG"},
+};
+
+#endif /* _MOAL_UAP_PRIV_H_ */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_uap_wext.c linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_uap_wext.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_uap_wext.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_uap_wext.c	2017-09-23 03:42:50.174674587 +0800
@@ -0,0 +1,1708 @@
+/** @file  moal_uap_wext.c
+  *
+  * @brief This file contains wireless extension standard ioctl functions
+  *
+  * Copyright (C) 2010-2011, Marvell International Ltd.
+  *
+  * This software file (the "File") is distributed by Marvell International
+  * Ltd. under the terms of the GNU General Public License Version 2, June 1991
+  * (the "License").  You may use, redistribute and/or modify this File in
+  * accordance with the terms and conditions of the License, a copy of which
+  * is available by writing to the Free Software Foundation, Inc.,
+  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
+  * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
+  *
+  * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
+  * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about
+  * this warranty disclaimer.
+  *
+  */
+
+/************************************************************************
+Change log:
+    08/06/2010: initial version
+************************************************************************/
+
+#include        "moal_main.h"
+#include        "moal_uap.h"
+#include        "moal_wext.h"
+#include        "moal_uap_priv.h"
+
+/********************************************************
+                Global Variables
+********************************************************/
+typedef struct _chan_to_freq_t
+{
+    /** Channel */
+    t_u16 channel;
+    /** Frequency */
+    t_u32 freq;
+    /** Band */
+    t_u8 band;
+} chan_to_freq_t;
+
+const chan_to_freq_t chan_to_freq[] = {
+    {1, 2412, 0},
+    {2, 2417, 0},
+    {3, 2422, 0},
+    {4, 2427, 0},
+    {5, 2432, 0},
+    {6, 2437, 0},
+    {7, 2442, 0},
+    {8, 2447, 0},
+    {9, 2452, 0},
+    {10, 2457, 0},
+    {11, 2462, 0},
+    {12, 2467, 0},
+    {13, 2472, 0},
+    {14, 2484, 0},
+    {183, 4915, 1},
+    {184, 4920, 1},
+    {185, 4925, 1},
+    {187, 4935, 1},
+    {188, 4940, 1},
+    {189, 4945, 1},
+    {192, 4960, 1},
+    {196, 4980, 1},
+    {7, 5035, 1},
+    {8, 5040, 1},
+    {9, 5045, 1},
+    {11, 5055, 1},
+    {12, 5060, 1},
+    {16, 5080, 1},
+    {34, 5170, 1},
+    {36, 5180, 1},
+    {38, 5190, 1},
+    {40, 5200, 1},
+    {42, 5210, 1},
+    {44, 5220, 1},
+    {46, 5230, 1},
+    {48, 5240, 1},
+    {52, 5260, 1},
+    {56, 5280, 1},
+    {60, 5300, 1},
+    {64, 5320, 1},
+    {100, 5500, 1},
+    {104, 5520, 1},
+    {108, 5540, 1},
+    {112, 5560, 1},
+    {116, 5580, 1},
+    {120, 5600, 1},
+    {124, 5620, 1},
+    {128, 5640, 1},
+    {132, 5660, 1},
+    {136, 5680, 1},
+    {140, 5700, 1},
+    {149, 5745, 1},
+    {153, 5765, 1},
+    {157, 5785, 1},
+    {161, 5805, 1},
+    {165, 5825, 1},
+};
+
+/** Convertion from frequency to channel */
+#define freq_to_chan(x) ((((x) - 2412) / 5) + 1)
+
+/********************************************************
+                Local Functions
+********************************************************/
+
+/**
+ *  @brief Sort Channels
+ *
+ *  @param freq                 A pointer to iw_freq structure
+ *  @param num                  Number of Channels
+ *
+ *  @return                     N/A
+ */
+static inline void
+woal_sort_channels(struct iw_freq *freq, int num)
+{
+    int i, j;
+    struct iw_freq temp;
+
+    for (i = 0; i < num; i++)
+        for (j = i + 1; j < num; j++)
+            if (freq[i].i > freq[j].i) {
+                temp.i = freq[i].i;
+                temp.m = freq[i].m;
+
+                freq[i].i = freq[j].i;
+                freq[i].m = freq[j].m;
+
+                freq[j].i = temp.i;
+                freq[j].m = temp.m;
+            }
+}
+
+/**
+ *  @brief Get frequency for channel in given band 
+ *
+ *  @param channel      channel
+ *  @param band         band
+ *
+ *  @return             freq
+ */
+static int
+channel_to_frequency(t_u16 channel, t_u8 band)
+{
+    int i = 0;
+
+    for (i = 0; i < sizeof(chan_to_freq) / sizeof(chan_to_freq_t); i++) {
+        if (channel == chan_to_freq[i].channel && band == chan_to_freq[i].band) {
+            return chan_to_freq[i].freq;
+        }
+    }
+    return 0;
+}
+
+/**
+ *  @brief Commit handler: called after a bunch of SET operations
+ *
+ *  @param dev          A pointer to net_device structure
+ *  @param info         A pointer to iw_request_info structure
+ *  @param cwrq         A pointer to char buffer
+ *  @param extra        A pointer to extra data buf
+ *
+ *  @return             0 --success
+ */
+static int
+woal_config_commit(struct net_device *dev,
+                   struct iw_request_info *info, char *cwrq, char *extra)
+{
+    ENTER();
+
+    LEAVE();
+    return 0;
+}
+
+/**
+ *  @brief Get name
+ *
+ *  @param dev          A pointer to net_device structure
+ *  @param info         A pointer to iw_request_info structure
+ *  @param cwrq         A pointer to char buffer
+ *  @param extra        A pointer to extra data buf
+ *
+ *  @return             0 --success
+ */
+static int
+woal_get_name(struct net_device *dev, struct iw_request_info *info,
+              char *cwrq, char *extra)
+{
+    ENTER();
+    strcpy(cwrq, "IEEE 802.11-DS");
+    LEAVE();
+    return 0;
+}
+
+/**
+ *  @brief Get current BSSID
+ *
+ *  @param dev          A pointer to net_device structure
+ *  @param info         A pointer to iw_request_info structure
+ *  @param awrq         A pointer to sockaddr structure
+ *  @param extra        A pointer to extra data buf
+ *
+ *  @return             0 --success
+ */
+static int
+woal_get_wap(struct net_device *dev, struct iw_request_info *info,
+             struct sockaddr *awrq, char *extra)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    int ret = 0;
+
+    ENTER();
+
+    if (priv->bss_started) {
+        memcpy(awrq->sa_data, priv->current_addr, MLAN_MAC_ADDR_LENGTH);
+    } else {
+        memset(awrq->sa_data, 0, MLAN_MAC_ADDR_LENGTH);
+    }
+    awrq->sa_family = ARPHRD_ETHER;
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Change the AP BSSID
+ *
+ *  @param dev          A pointer to net_device structure
+ *  @param info         A pointer to iw_request_info structure
+ *  @param awrq         A pointer to iw_param structure
+ *  @param extra        A pointer to extra data buf
+ *
+ *  @return             0 --success, otherwise fail
+ */
+static int
+woal_set_wap(struct net_device *dev, struct iw_request_info *info,
+             struct sockaddr *awrq, char *extra)
+{
+    int ret = 0;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    const t_u8 zero_mac[MLAN_MAC_ADDR_LENGTH] = { 0, 0, 0, 0, 0, 0 };
+
+    ENTER();
+
+    if (awrq->sa_family != ARPHRD_ETHER) {
+        ret = -EINVAL;
+        goto done;
+    }
+
+    PRINTM(MINFO, "ASSOC: WAP: uAP bss : %02x:%02x:%02x:%02x:%02x:%02x\n",
+           (t_u8) awrq->sa_data[0], (t_u8) awrq->sa_data[1],
+           (t_u8) awrq->sa_data[2], (t_u8) awrq->sa_data[3],
+           (t_u8) awrq->sa_data[4], (t_u8) awrq->sa_data[5]);
+
+    /* 
+     * Using this ioctl to start/stop the BSS, return if bss
+     * is already started/stopped.
+     */
+    if (memcmp(zero_mac, awrq->sa_data, MLAN_MAC_ADDR_LENGTH)) {
+        if (priv->bss_started == MFALSE)
+            ret = woal_uap_bss_ctrl(priv, MOAL_IOCTL_WAIT, UAP_BSS_START);
+        else
+            PRINTM(MINFO, "BSS is already started.\n");
+    } else {
+        /* zero_mac means bss_stop */
+        if (priv->bss_started == MTRUE)
+            ret = woal_uap_bss_ctrl(priv, MOAL_IOCTL_WAIT, UAP_BSS_STOP);
+        else
+            PRINTM(MINFO, "BSS is already stopped.\n");
+    }
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set frequency/channel
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param fwrq                 A pointer to iw_freq structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_set_freq(struct net_device *dev, struct iw_request_info *info,
+              struct iw_freq *fwrq, char *extra)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_uap_bss_param *sys_cfg = NULL, *ap_cfg = NULL;
+    int ret = 0, chan = 0, i = 0;
+
+    ENTER();
+
+    ap_cfg = kmalloc(sizeof(mlan_uap_bss_param), GFP_KERNEL);
+    if (ap_cfg == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    sys_cfg = kmalloc(sizeof(mlan_uap_bss_param), GFP_KERNEL);
+    if (sys_cfg == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_set_get_sys_config(priv, MLAN_ACT_GET, ap_cfg)) {
+        PRINTM(MERROR, "Error getting AP confiruration\n");
+        ret = -EFAULT;
+        goto done;
+    }
+    i = ap_cfg->num_of_chan;
+
+    /* Initialize the invalid values so that the correct values below are
+       downloaded to firmware */
+    woal_set_sys_config_invalid_data(sys_cfg);
+
+    /* If setting by frequency, convert to a channel */
+    if (fwrq->e == 1)
+        chan = freq_to_chan(fwrq->m / 100000);
+    else
+        chan = fwrq->m;
+    if (chan > 0 && chan < MLAN_MAX_CHANNEL)
+        sys_cfg->channel = chan;
+    else {
+        ret = -EINVAL;
+        goto done;
+    }
+    for (i = 0; i < ap_cfg->num_of_chan; i++)
+        if (ap_cfg->chan_list[i].chan_number == chan)
+            break;
+    if (i == ap_cfg->num_of_chan) {
+        PRINTM(MERROR, "Channel %d is not supported\n", chan);
+        ret = -EINVAL;
+        goto done;
+    }
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_set_get_sys_config(priv, MLAN_ACT_SET, sys_cfg)) {
+        PRINTM(MERROR, "Error setting AP confiruration\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+  done:
+    if (sys_cfg)
+        kfree(sys_cfg);
+    if (ap_cfg)
+        kfree(ap_cfg);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Get frequency and channel
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param fwrq                 A pointer to iw_freq structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_get_freq(struct net_device *dev, struct iw_request_info *info,
+              struct iw_freq *fwrq, char *extra)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_uap_bss_param ap_cfg;
+    t_u8 band = 0;
+    int ret = 0;
+
+    ENTER();
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_set_get_sys_config(priv, MLAN_ACT_GET, &ap_cfg)) {
+        PRINTM(MERROR, "Error getting AP confiruration\n");
+        LEAVE();
+        return -EFAULT;
+    }
+    band = ap_cfg.band_cfg & BAND_CONFIG_5GHZ;
+    fwrq->i = (long) ap_cfg.channel;
+    fwrq->m = (long) (channel_to_frequency(ap_cfg.channel, band)) * 100000;
+    fwrq->e = 1;
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set wlan mode
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param uwrq                 A pointer to t_u32 string
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_set_bss_mode(struct net_device *dev, struct iw_request_info *info,
+                  t_u32 * uwrq, char *extra)
+{
+    int ret = 0;
+    ENTER();
+
+    switch (*uwrq) {
+    case IW_MODE_AUTO:
+    case IW_MODE_MASTER:
+        PRINTM(MINFO, "This is correct mode in AP mode\n");
+        break;
+    default:
+        PRINTM(MERROR, "Invalid mode for AP\n");
+        ret = -EINVAL;
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Get wlan mode
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param uwrq                 A pointer to t_u32 string
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success
+ */
+static int
+woal_get_bss_mode(struct net_device *dev, struct iw_request_info *info,
+                  t_u32 * uwrq, char *extra)
+{
+    ENTER();
+
+    *uwrq = IW_MODE_MASTER;
+
+    LEAVE();
+    return 0;
+}
+
+/**
+ *  @brief Set encryption key
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param dwrq                 A pointer to iw_point structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_set_encode(struct net_device *dev, struct iw_request_info *info,
+                struct iw_point *dwrq, char *extra)
+{
+    int ret = 0;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_uap_bss_param *sys_cfg = NULL, *ap_cfg = NULL;
+    wep_key *pkey = NULL;
+    int key_index = 0;
+
+    ENTER();
+
+    /* Check index */
+    key_index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
+    if (key_index > 3) {
+        PRINTM(MERROR, "Key index #%d out of range\n", key_index);
+        ret = -EINVAL;
+        goto done;
+    }
+
+    ap_cfg = kmalloc(sizeof(mlan_uap_bss_param), GFP_KERNEL);
+    if (ap_cfg == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    sys_cfg = kmalloc(sizeof(mlan_uap_bss_param), GFP_KERNEL);
+    if (sys_cfg == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_set_get_sys_config(priv, MLAN_ACT_GET, ap_cfg)) {
+        PRINTM(MERROR, "Error getting AP confiruration\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+    /* Initialize the invalid values so that the correct values below are
+       downloaded to firmware */
+    woal_set_sys_config_invalid_data(sys_cfg);
+    sys_cfg->wep_cfg.key0.key_index = 0;
+    sys_cfg->wep_cfg.key1.key_index = 1;
+    sys_cfg->wep_cfg.key2.key_index = 2;
+    sys_cfg->wep_cfg.key3.key_index = 3;
+
+    if (key_index >= 0 && key_index <= 3) {
+        if (key_index == 0)
+            pkey = &sys_cfg->wep_cfg.key0;
+        else if (key_index == 1)
+            pkey = &sys_cfg->wep_cfg.key1;
+        else if (key_index == 2)
+            pkey = &sys_cfg->wep_cfg.key2;
+        else if (key_index == 3)
+            pkey = &sys_cfg->wep_cfg.key3;
+    }
+
+    if (!(dwrq->flags & IW_ENCODE_NOKEY) && dwrq->length) {
+        if (dwrq->length > MAX_WEP_KEY_SIZE) {
+            PRINTM(MERROR, "Key length (%d) out of range\n", dwrq->length);
+            ret = -E2BIG;
+            goto done;
+        }
+        if (key_index < 0) {
+            /* Get current default key index */
+            if (ap_cfg->wep_cfg.key0.is_default)
+                pkey = &sys_cfg->wep_cfg.key0;
+            if (ap_cfg->wep_cfg.key1.is_default)
+                pkey = &sys_cfg->wep_cfg.key1;
+            if (ap_cfg->wep_cfg.key2.is_default)
+                pkey = &sys_cfg->wep_cfg.key2;
+            if (ap_cfg->wep_cfg.key3.is_default)
+                pkey = &sys_cfg->wep_cfg.key3;
+        }
+
+        sys_cfg->protocol = PROTOCOL_STATIC_WEP;
+        memcpy(pkey->key, extra, dwrq->length);
+        /* Set the length */
+        if (dwrq->length > MIN_WEP_KEY_SIZE)
+            pkey->length = MAX_WEP_KEY_SIZE;
+        else
+            pkey->length = MIN_WEP_KEY_SIZE;
+        /* Set current key index as default */
+        pkey->is_default = MTRUE;
+    } else {
+        /* 
+         * No key provided so it is either enable key,
+         * on or off
+         */
+        if (dwrq->flags & IW_ENCODE_DISABLED) {
+            PRINTM(MINFO, "*** iwconfig mlanX key off ***\n");
+            sys_cfg->protocol = PROTOCOL_NO_SECURITY;
+        } else {
+            /* 
+             * iwconfig mlanX key [n]
+             * iwconfig mlanX key on 
+             * Do we want to just set the transmit key index ? 
+             */
+            if (key_index < 0) {
+                PRINTM(MINFO, "*** iwconfig mlanX key on ***\n");
+            } else {
+                /* Get current key configuration at key_index */
+                if (key_index == 0)
+                    memcpy(pkey, &ap_cfg->wep_cfg.key0, sizeof(wep_key));
+                if (key_index == 1)
+                    memcpy(pkey, &ap_cfg->wep_cfg.key1, sizeof(wep_key));
+                if (key_index == 2)
+                    memcpy(pkey, &ap_cfg->wep_cfg.key2, sizeof(wep_key));
+                if (key_index == 3)
+                    memcpy(pkey, &ap_cfg->wep_cfg.key3, sizeof(wep_key));
+                /* Set current key index as default */
+                pkey->is_default = MTRUE;
+            }
+        }
+    }
+    if (dwrq->flags & (IW_ENCODE_RESTRICTED | IW_ENCODE_OPEN)) {
+        switch (dwrq->flags & 0xf000) {
+        case IW_ENCODE_RESTRICTED:
+            /* iwconfig mlanX restricted key [1] */
+            sys_cfg->auth_mode = MLAN_AUTH_MODE_SHARED;
+            PRINTM(MINFO, "Auth mode restricted!\n");
+            break;
+        case IW_ENCODE_OPEN:
+            /* iwconfig mlanX key [2] open */
+            sys_cfg->auth_mode = MLAN_AUTH_MODE_OPEN;
+            PRINTM(MINFO, "Auth mode open!\n");
+            break;
+        case IW_ENCODE_RESTRICTED | IW_ENCODE_OPEN:
+        default:
+            /* iwconfig mlanX key [2] open restricted */
+            PRINTM(MINFO, "Auth mode auto!\n");
+            break;
+        }
+    }
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_set_get_sys_config(priv, MLAN_ACT_SET, sys_cfg)) {
+        PRINTM(MERROR, "Error setting AP confiruration\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+  done:
+    if (sys_cfg)
+        kfree(sys_cfg);
+    if (ap_cfg)
+        kfree(ap_cfg);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Get encryption key
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param dwrq                 A pointer to iw_point structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_get_encode(struct net_device *dev, struct iw_request_info *info,
+                struct iw_point *dwrq, char *extra)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    int index = (dwrq->flags & IW_ENCODE_INDEX);
+    wep_key *pkey = NULL;
+    mlan_uap_bss_param ap_cfg;
+    int ret = 0;
+
+    ENTER();
+    if (index < 0 || index > 4) {
+        PRINTM(MERROR, "Key index #%d out of range\n", index);
+        ret = -EINVAL;
+        goto done;
+    }
+    if (MLAN_STATUS_SUCCESS !=
+        woal_set_get_sys_config(priv, MLAN_ACT_GET, &ap_cfg)) {
+        PRINTM(MERROR, "Error getting AP confiruration\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+    dwrq->flags = 0;
+    /* 
+     * Check encryption mode 
+     */
+    switch (ap_cfg.auth_mode) {
+    case MLAN_AUTH_MODE_OPEN:
+        dwrq->flags = IW_ENCODE_OPEN;
+        break;
+    case MLAN_AUTH_MODE_SHARED:
+    case MLAN_AUTH_MODE_NETWORKEAP:
+        dwrq->flags = IW_ENCODE_RESTRICTED;
+        break;
+    default:
+        dwrq->flags = IW_ENCODE_DISABLED | IW_ENCODE_OPEN;
+        break;
+    }
+
+    switch (ap_cfg.protocol) {
+    case PROTOCOL_NO_SECURITY:
+        dwrq->flags |= IW_ENCODE_DISABLED;
+        break;
+    case PROTOCOL_STATIC_WEP:
+        if (ap_cfg.wep_cfg.key0.is_default)
+            pkey = &ap_cfg.wep_cfg.key0;
+        else if (ap_cfg.wep_cfg.key1.is_default)
+            pkey = &ap_cfg.wep_cfg.key1;
+        else if (ap_cfg.wep_cfg.key2.is_default)
+            pkey = &ap_cfg.wep_cfg.key2;
+        else if (ap_cfg.wep_cfg.key3.is_default)
+            pkey = &ap_cfg.wep_cfg.key3;
+        if (pkey) {
+            dwrq->flags |= (pkey->key_index + 1);
+            dwrq->length = pkey->length;
+            memcpy(extra, pkey->key, pkey->length);
+            dwrq->flags &= ~IW_ENCODE_DISABLED;
+        } else {
+            ret = -EFAULT;
+        }
+        break;
+    case PROTOCOL_WPA:
+    case PROTOCOL_WPA2:
+    case PROTOCOL_WPA2_MIXED:
+        memcpy(extra, ap_cfg.wpa_cfg.passphrase, ap_cfg.wpa_cfg.length);
+        dwrq->length = ap_cfg.wpa_cfg.length;
+        dwrq->flags |= 1;
+        dwrq->flags &= ~IW_ENCODE_DISABLED;
+        break;
+    default:
+        dwrq->flags &= ~IW_ENCODE_DISABLED;
+        break;
+    }
+    dwrq->flags |= IW_ENCODE_NOKEY;
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+#if (WIRELESS_EXT >= 18)
+/**
+ *  @brief Get IE
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param dwrq                 A pointer to iw_point structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     -EOPNOTSUPP
+ */
+static int
+woal_get_gen_ie(struct net_device *dev, struct iw_request_info *info,
+                struct iw_point *dwrq, char *extra)
+{
+    ENTER();
+    LEAVE();
+    return -EOPNOTSUPP;
+}
+
+/**
+ *  @brief Set IE
+ *
+ *  Pass an opaque block of data, expected to be IEEE IEs, to the driver 
+ *    for eventual passthrough to the firmware in an associate/join 
+ *    (and potentially start) command.
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param dwrq                 A pointer to iw_point structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_set_gen_ie(struct net_device *dev, struct iw_request_info *info,
+                struct iw_point *dwrq, char *extra)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_uap_bss_param sys_cfg;
+    IEEEtypes_Header_t *tlv = NULL;
+    int tlv_hdr_len = sizeof(IEEEtypes_Header_t), tlv_buf_left = 0;
+    int ret = 0;
+
+    ENTER();
+
+    /* Initialize the invalid values so that the correct values below are
+       downloaded to firmware */
+    woal_set_sys_config_invalid_data(&sys_cfg);
+
+    tlv_buf_left = dwrq->length;
+    tlv = (IEEEtypes_Header_t *) extra;
+    while (tlv_buf_left >= tlv_hdr_len) {
+        if (tlv->element_id == WPA_IE) {
+            sys_cfg.protocol |= PROTOCOL_WPA;
+            if (priv->pairwise_cipher == CIPHER_TKIP) {
+                sys_cfg.wpa_cfg.pairwise_cipher_wpa = CIPHER_TKIP;
+                PRINTM(MINFO, "Set IE Cipher TKIP\n");
+            }
+            if (priv->pairwise_cipher == CIPHER_AES_CCMP) {
+                sys_cfg.wpa_cfg.pairwise_cipher_wpa = CIPHER_AES_CCMP;
+                PRINTM(MINFO, "Set IE Cipher CCMP\n");
+            }
+            if (priv->pairwise_cipher == (CIPHER_TKIP | CIPHER_AES_CCMP)) {
+                sys_cfg.wpa_cfg.pairwise_cipher_wpa =
+                    CIPHER_TKIP | CIPHER_AES_CCMP;
+                PRINTM(MINFO, "Set IE Cipher TKIP + CCMP\n");
+            }
+        }
+        if (tlv->element_id == RSN_IE) {
+            sys_cfg.protocol |= PROTOCOL_WPA2;
+            if (priv->pairwise_cipher == CIPHER_TKIP) {
+                sys_cfg.wpa_cfg.pairwise_cipher_wpa2 = CIPHER_TKIP;
+            }
+            if (priv->pairwise_cipher == CIPHER_AES_CCMP) {
+                sys_cfg.wpa_cfg.pairwise_cipher_wpa2 = CIPHER_AES_CCMP;
+            }
+            if (priv->pairwise_cipher == (CIPHER_TKIP | CIPHER_AES_CCMP)) {
+                sys_cfg.wpa_cfg.pairwise_cipher_wpa2 =
+                    (CIPHER_TKIP | CIPHER_AES_CCMP);
+            }
+        }
+        if (priv->group_cipher == CIPHER_TKIP)
+            sys_cfg.wpa_cfg.group_cipher = CIPHER_TKIP;
+        if (priv->group_cipher == CIPHER_AES_CCMP)
+            sys_cfg.wpa_cfg.group_cipher = CIPHER_AES_CCMP;
+        tlv_buf_left -= (tlv_hdr_len + tlv->len);
+        tlv = (IEEEtypes_Header_t *) ((t_u8 *) tlv + tlv_hdr_len + tlv->len);
+    }
+    sys_cfg.key_mgmt = priv->uap_key_mgmt;
+    if (sys_cfg.key_mgmt & KEY_MGMT_PSK)
+        sys_cfg.key_mgmt_operation |= 0x01;
+    if (sys_cfg.key_mgmt & KEY_MGMT_EAP)
+        sys_cfg.key_mgmt_operation |= 0x03;
+
+    if (sys_cfg.protocol) {
+        if (MLAN_STATUS_SUCCESS !=
+            woal_set_get_sys_config(priv, MLAN_ACT_SET, &sys_cfg)) {
+            PRINTM(MERROR, "Error setting AP confiruration\n");
+            ret = -EFAULT;
+            goto done;
+        }
+        priv->pairwise_cipher = 0;
+        priv->group_cipher = 0;
+    }
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief  Extended version of encoding configuration 
+ *
+ *  @param dev          A pointer to net_device structure
+ *  @param info         A pointer to iw_request_info structure
+ *  @param dwrq         A pointer to iw_point structure
+ *  @param extra        A pointer to extra data buf
+ *
+ *  @return              0 --success, otherwise fail
+ */
+static int
+woal_set_encode_ext(struct net_device *dev,
+                    struct iw_request_info *info,
+                    struct iw_point *dwrq, char *extra)
+{
+    struct iw_encode_ext *ext = (struct iw_encode_ext *) extra;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    int key_index;
+    t_u8 *pkey_material = NULL;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_sec_cfg *sec = NULL;
+    mlan_uap_bss_param sys_cfg;
+    wep_key *pwep_key = NULL;
+    int ret = 0;
+
+    ENTER();
+
+    key_index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
+    if (key_index < 0 || key_index > 3) {
+        ret = -EINVAL;
+        goto done;
+    }
+    if (ext->key_len > (dwrq->length - sizeof(struct iw_encode_ext))) {
+        ret = -EINVAL;
+        goto done;
+    }
+
+    /* Initialize the invalid values so that the correct values below are
+       downloaded to firmware */
+    woal_set_sys_config_invalid_data(&sys_cfg);
+
+    pkey_material = (t_u8 *) (ext + 1);
+    /* Disable Key */
+    if ((dwrq->flags & IW_ENCODE_DISABLED) && !ext->key_len) {
+        sys_cfg.protocol = PROTOCOL_NO_SECURITY;
+    } else if (ext->alg == IW_ENCODE_ALG_WEP) {
+        sys_cfg.protocol = PROTOCOL_STATIC_WEP;
+        /* Set WEP key */
+        switch (key_index) {
+        case 0:
+            pwep_key = &sys_cfg.wep_cfg.key0;
+            break;
+        case 1:
+            pwep_key = &sys_cfg.wep_cfg.key1;
+            break;
+        case 2:
+            pwep_key = &sys_cfg.wep_cfg.key2;
+            break;
+        case 3:
+            pwep_key = &sys_cfg.wep_cfg.key3;
+            break;
+        }
+        pwep_key->key_index = key_index;
+        pwep_key->is_default = MTRUE;
+        pwep_key->length = ext->key_len;
+        memcpy(pwep_key->key, pkey_material, ext->key_len);
+    } else {
+        /* Set GTK/PTK key */
+        req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_sec_cfg));
+        if (req == NULL) {
+            ret = -ENOMEM;
+            goto done;
+        }
+        sec = (mlan_ds_sec_cfg *) req->pbuf;
+        sec->sub_command = MLAN_OID_SEC_CFG_ENCRYPT_KEY;
+        req->req_id = MLAN_IOCTL_SEC_CFG;
+        req->action = MLAN_ACT_SET;
+        sec->param.encrypt_key.key_len = ext->key_len;
+        sec->param.encrypt_key.key_index = key_index;
+        memcpy(sec->param.encrypt_key.key_material, pkey_material,
+               ext->key_len);
+        memcpy(sec->param.encrypt_key.mac_addr, ext->addr.sa_data, ETH_ALEN);
+        sec->param.encrypt_key.key_flags = ext->ext_flags;
+        if (ext->ext_flags & IW_ENCODE_EXT_RX_SEQ_VALID) {
+            memcpy(sec->param.encrypt_key.pn, (t_u8 *) ext->rx_seq,
+                   SEQ_MAX_SIZE);
+            DBG_HEXDUMP(MCMD_D, "Uap Rx PN", sec->param.encrypt_key.pn,
+                        SEQ_MAX_SIZE);
+        }
+        if (ext->ext_flags & IW_ENCODE_EXT_TX_SEQ_VALID) {
+            memcpy(sec->param.encrypt_key.pn, (t_u8 *) ext->tx_seq,
+                   SEQ_MAX_SIZE);
+            DBG_HEXDUMP(MCMD_D, "Uap Tx PN", sec->param.encrypt_key.pn,
+                        SEQ_MAX_SIZE);
+        }
+        PRINTM(MIOCTL,
+               "set uap wpa key key_index=%d, key_len=%d key_flags=0x%lx %02x:%02x:%02x:%02x:%02x:%02x\n",
+               key_index, ext->key_len, sec->param.encrypt_key.key_flags,
+               sec->param.encrypt_key.mac_addr[0],
+               sec->param.encrypt_key.mac_addr[1],
+               sec->param.encrypt_key.mac_addr[2],
+               sec->param.encrypt_key.mac_addr[3],
+               sec->param.encrypt_key.mac_addr[4],
+               sec->param.encrypt_key.mac_addr[5]);
+        DBG_HEXDUMP(MCMD_D, "uap wpa key", pkey_material, ext->key_len);
+
+        if (MLAN_STATUS_SUCCESS !=
+            woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+            ret = -EFAULT;
+        }
+        /* Cipher set will be done in set generic IE */
+        priv->pairwise_cipher = ext->alg;
+        priv->group_cipher = ext->alg;
+        goto done;              /* No AP configuration */
+    }
+    if (MLAN_STATUS_SUCCESS !=
+        woal_set_get_sys_config(priv, MLAN_ACT_SET, &sys_cfg)) {
+        PRINTM(MERROR, "Error setting AP confiruration\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief  Extended version of encoding configuration 
+ *
+ *  @param dev          A pointer to net_device structure
+ *  @param info         A pointer to iw_request_info structure
+ *  @param dwrq         A pointer to iw_point structure
+ *  @param extra        A pointer to extra data buf
+ *
+ *  @return             -EOPNOTSUPP
+ */
+static int
+woal_get_encode_ext(struct net_device *dev,
+                    struct iw_request_info *info,
+                    struct iw_point *dwrq, char *extra)
+{
+    ENTER();
+    LEAVE();
+    return -EOPNOTSUPP;
+}
+
+/** 
+ *  @brief  Request MLME operation 
+ *
+ *  @param dev          A pointer to net_device structure
+ *  @param info         A pointer to iw_request_info structure
+ *  @param dwrq         A pointer to iw_point structure
+ *  @param extra        A pointer to extra data buf
+ *
+ *  @return             0--success, otherwise fail
+ */
+static int
+woal_set_mlme(struct net_device *dev,
+              struct iw_request_info *info, struct iw_point *dwrq, char *extra)
+{
+    struct iw_mlme *mlme = (struct iw_mlme *) extra;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_ds_bss *bss = NULL;
+    mlan_ds_get_info *pinfo = NULL;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_sta_list *sta_list = NULL;
+    const t_u8 bc_addr[] = { 0XFF, 0XFF, 0XFF, 0XFF, 0XFF, 0XFF };
+    t_u8 sta_addr[ETH_ALEN];
+    int ret = 0, i;
+
+    ENTER();
+
+    memset(sta_addr, 0, ETH_ALEN);
+    if ((mlme->cmd == IW_MLME_DEAUTH) || (mlme->cmd == IW_MLME_DISASSOC)) {
+        memcpy(sta_addr, (t_u8 *) mlme->addr.sa_data, ETH_ALEN);
+        PRINTM(MIOCTL, "Deauth station: %02x:%02x:%02x:%02x:%02x:%02x, "
+               "reason=%d\n", sta_addr[0], sta_addr[1], sta_addr[2],
+               sta_addr[3], sta_addr[4], sta_addr[5], mlme->reason_code);
+
+        /* FIXME: For flushing all stations we need to use zero MAC, but right
+           now the FW does not support this. So, manually delete each one
+           individually. */
+        /* If deauth all station, get the connected STA list first */
+        if (!memcmp(bc_addr, sta_addr, ETH_ALEN)) {
+            PRINTM(MIOCTL, "Deauth all stations\n");
+            req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_get_info));
+            if (req == NULL) {
+                return -ENOMEM;
+            }
+            pinfo = (mlan_ds_get_info *) req->pbuf;
+            pinfo->sub_command = MLAN_OID_UAP_STA_LIST;
+            req->req_id = MLAN_IOCTL_GET_INFO;
+            req->action = MLAN_ACT_GET;
+            if (MLAN_STATUS_SUCCESS !=
+                woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+                ret = -EFAULT;
+                goto done;
+            }
+            sta_list =
+                (mlan_ds_sta_list *) kmalloc(sizeof(mlan_ds_sta_list),
+                                             GFP_KERNEL);
+            if (sta_list == NULL) {
+                PRINTM(MERROR, "Memory allocation failed!\n");
+                ret = -ENOMEM;
+                goto done;
+            }
+            memcpy(sta_list, &pinfo->param.sta_list, sizeof(mlan_ds_sta_list));
+            if (req)
+                kfree(req);
+        }
+        req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_bss));
+        if (req == NULL) {
+            return -ENOMEM;
+        }
+        bss = (mlan_ds_bss *) req->pbuf;
+        bss->sub_command = MLAN_OID_UAP_DEAUTH_STA;
+        req->req_id = MLAN_IOCTL_BSS;
+        req->action = MLAN_ACT_SET;
+
+        if (!memcmp(bc_addr, sta_addr, ETH_ALEN)) {
+            for (i = 0; i < sta_list->sta_count; i++) {
+                memcpy(bss->param.deauth_param.mac_addr,
+                       sta_list->info[i].mac_address, ETH_ALEN);
+                bss->param.deauth_param.reason_code = mlme->reason_code;
+
+                if (MLAN_STATUS_SUCCESS !=
+                    woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+                    ret = -EFAULT;
+                    goto done;
+                }
+            }
+        } else {
+            memcpy(bss->param.deauth_param.mac_addr, sta_addr, ETH_ALEN);
+            bss->param.deauth_param.reason_code = mlme->reason_code;
+
+            if (MLAN_STATUS_SUCCESS !=
+                woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+                ret = -EFAULT;
+                goto done;
+            }
+        }
+    }
+
+  done:
+    if (req)
+        kfree(req);
+    if (sta_list)
+        kfree(sta_list);
+
+    LEAVE();
+    return ret;
+}
+
+/** @brief Set authentication mode parameters
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param vwrq                 A pointer to iw_param structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_set_auth(struct net_device *dev, struct iw_request_info *info,
+              struct iw_param *vwrq, char *extra)
+{
+    int ret = 0;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_uap_bss_param sys_cfg;
+
+    ENTER();
+
+    /* Initialize the invalid values so that the correct values below are
+       downloaded to firmware */
+    woal_set_sys_config_invalid_data(&sys_cfg);
+
+    switch (vwrq->flags & IW_AUTH_INDEX) {
+    case IW_AUTH_CIPHER_PAIRWISE:
+        /* Rest are not supported now */
+        if (vwrq->value & IW_AUTH_CIPHER_NONE);
+        else if (vwrq->value & IW_AUTH_CIPHER_WEP40);
+        else if (vwrq->value & IW_AUTH_CIPHER_WEP104);
+        else if (vwrq->value == IW_AUTH_CIPHER_TKIP) {
+            sys_cfg.wpa_cfg.pairwise_cipher_wpa = CIPHER_TKIP;
+            sys_cfg.wpa_cfg.pairwise_cipher_wpa2 = CIPHER_TKIP;
+            priv->pairwise_cipher = CIPHER_TKIP;
+            if (!priv->uap_key_mgmt)
+                priv->uap_key_mgmt = KEY_MGMT_PSK;
+            PRINTM(MINFO, "Set Auth Cipher TKIP\n");
+        } else if (vwrq->value == IW_AUTH_CIPHER_CCMP) {
+            sys_cfg.wpa_cfg.pairwise_cipher_wpa = CIPHER_AES_CCMP;
+            sys_cfg.wpa_cfg.pairwise_cipher_wpa2 = CIPHER_AES_CCMP;
+            priv->pairwise_cipher = CIPHER_AES_CCMP;
+            if (!priv->uap_key_mgmt)
+                priv->uap_key_mgmt = KEY_MGMT_PSK;
+            PRINTM(MINFO, "Set Auth Cipher CCMP\n");
+        } else if (vwrq->value == (IW_AUTH_CIPHER_TKIP | IW_AUTH_CIPHER_CCMP)) {
+            sys_cfg.wpa_cfg.pairwise_cipher_wpa =
+                (CIPHER_TKIP | CIPHER_AES_CCMP);
+            sys_cfg.wpa_cfg.pairwise_cipher_wpa2 =
+                (CIPHER_TKIP | CIPHER_AES_CCMP);
+            priv->pairwise_cipher = (CIPHER_TKIP | CIPHER_AES_CCMP);
+            if (!priv->uap_key_mgmt)
+                priv->uap_key_mgmt = KEY_MGMT_PSK;
+            PRINTM(MINFO, "Set Auth Cipher TKIP + CCMP\n");
+        }
+        break;
+    case IW_AUTH_CIPHER_GROUP:
+        /* Rest are not supported now */
+        if (vwrq->value & IW_AUTH_CIPHER_NONE);
+        else if (vwrq->value & IW_AUTH_CIPHER_WEP40);
+        else if (vwrq->value & IW_AUTH_CIPHER_WEP104);
+        else if (vwrq->value & IW_AUTH_CIPHER_TKIP) {
+            sys_cfg.wpa_cfg.group_cipher = CIPHER_TKIP;
+            priv->group_cipher = CIPHER_TKIP;
+            if (!priv->uap_key_mgmt)
+                priv->uap_key_mgmt = KEY_MGMT_PSK;
+            PRINTM(MINFO, "Set Auth Cipher TKIP\n");
+        } else if (vwrq->value & IW_AUTH_CIPHER_CCMP) {
+            sys_cfg.wpa_cfg.group_cipher = CIPHER_AES_CCMP;
+            priv->group_cipher = CIPHER_AES_CCMP;
+            if (!priv->uap_key_mgmt)
+                priv->uap_key_mgmt = KEY_MGMT_PSK;
+            PRINTM(MINFO, "Set Auth Cipher CCMP\n");
+        }
+        break;
+    case IW_AUTH_80211_AUTH_ALG:
+        switch (vwrq->value) {
+        case IW_AUTH_ALG_SHARED_KEY:
+            PRINTM(MINFO, "Auth mode shared key!\n");
+            sys_cfg.auth_mode = MLAN_AUTH_MODE_SHARED;
+            break;
+        case IW_AUTH_ALG_LEAP:
+            break;
+        case IW_AUTH_ALG_OPEN_SYSTEM:
+            PRINTM(MINFO, "Auth mode open!\n");
+            sys_cfg.auth_mode = MLAN_AUTH_MODE_OPEN;
+            break;
+        default:
+            PRINTM(MINFO, "Auth mode auto!\n");
+            break;
+        }
+        break;
+    case IW_AUTH_WPA_VERSION:
+        switch (vwrq->value) {
+        case IW_AUTH_WPA_VERSION_DISABLED:
+            sys_cfg.protocol = PROTOCOL_NO_SECURITY;
+            break;
+        case IW_AUTH_WPA_VERSION_WPA:
+            sys_cfg.protocol = PROTOCOL_WPA;
+            break;
+        case IW_AUTH_WPA_VERSION_WPA2:
+            sys_cfg.protocol = PROTOCOL_WPA2;
+            break;
+        case IW_AUTH_WPA_VERSION_WPA | IW_AUTH_WPA_VERSION_WPA2:
+            sys_cfg.protocol = PROTOCOL_WPA2_MIXED;
+            break;
+        default:
+            break;
+        }
+        priv->uap_protocol = sys_cfg.protocol;
+        break;
+    case IW_AUTH_KEY_MGMT:
+        switch (vwrq->value) {
+        case IW_AUTH_KEY_MGMT_802_1X:
+            sys_cfg.key_mgmt |= KEY_MGMT_EAP;
+            priv->uap_key_mgmt |= KEY_MGMT_EAP;
+            break;
+        case IW_AUTH_KEY_MGMT_PSK:
+            sys_cfg.key_mgmt |= KEY_MGMT_PSK;
+            priv->uap_key_mgmt |= KEY_MGMT_PSK;
+            break;
+        default:
+            break;
+        }
+        break;
+    case IW_AUTH_WPA_ENABLED:
+    case IW_AUTH_TKIP_COUNTERMEASURES:
+    case IW_AUTH_DROP_UNENCRYPTED:
+    case IW_AUTH_RX_UNENCRYPTED_EAPOL:
+    case IW_AUTH_ROAMING_CONTROL:
+    case IW_AUTH_PRIVACY_INVOKED:
+    default:
+        return -EOPNOTSUPP;     /* No AP configuration */
+    }
+    if (!sys_cfg.key_mgmt)
+        sys_cfg.key_mgmt = priv->uap_key_mgmt;
+    if (sys_cfg.key_mgmt & KEY_MGMT_PSK)
+        sys_cfg.key_mgmt_operation |= 0x01;
+    if (sys_cfg.key_mgmt & KEY_MGMT_EAP)
+        sys_cfg.key_mgmt_operation |= 0x03;
+    if (!sys_cfg.protocol)
+        sys_cfg.protocol = priv->uap_protocol;
+
+    /* Set AP configuration */
+    if (MLAN_STATUS_SUCCESS !=
+        woal_set_get_sys_config(priv, MLAN_ACT_SET, &sys_cfg)) {
+        PRINTM(MERROR, "Error setting AP confiruration\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+  done:
+    LEAVE();
+    return 0;
+}
+
+/**
+ *  @brief Get authentication mode parameters
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param vwrq                 A pointer to iw_param structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_get_auth(struct net_device *dev, struct iw_request_info *info,
+              struct iw_param *vwrq, char *extra)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_uap_bss_param ap_cfg;
+
+    ENTER();
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_set_get_sys_config(priv, MLAN_ACT_GET, &ap_cfg)) {
+        PRINTM(MERROR, "Error getting AP confiruration\n");
+        LEAVE();
+        return -EFAULT;
+    }
+    switch (vwrq->flags & IW_AUTH_INDEX) {
+    case IW_AUTH_CIPHER_PAIRWISE:
+        if (ap_cfg.wpa_cfg.pairwise_cipher_wpa == CIPHER_TKIP ||
+            ap_cfg.wpa_cfg.pairwise_cipher_wpa2 == CIPHER_TKIP)
+            vwrq->value = IW_AUTH_CIPHER_TKIP;
+        else if (ap_cfg.wpa_cfg.pairwise_cipher_wpa == CIPHER_AES_CCMP ||
+                 ap_cfg.wpa_cfg.pairwise_cipher_wpa2 == CIPHER_AES_CCMP)
+            vwrq->value = IW_AUTH_CIPHER_CCMP;
+        else
+            vwrq->value = IW_AUTH_CIPHER_NONE;
+        break;
+    case IW_AUTH_CIPHER_GROUP:
+        if (ap_cfg.wpa_cfg.group_cipher == CIPHER_TKIP)
+            vwrq->value = IW_AUTH_CIPHER_TKIP;
+        else if (ap_cfg.wpa_cfg.group_cipher == CIPHER_AES_CCMP)
+            vwrq->value = IW_AUTH_CIPHER_CCMP;
+        else
+            vwrq->value = IW_AUTH_CIPHER_NONE;
+        break;
+    case IW_AUTH_80211_AUTH_ALG:
+        if (ap_cfg.auth_mode == MLAN_AUTH_MODE_SHARED)
+            vwrq->value = IW_AUTH_ALG_SHARED_KEY;
+        else if (ap_cfg.auth_mode == MLAN_AUTH_MODE_NETWORKEAP)
+            vwrq->value = IW_AUTH_ALG_LEAP;
+        else
+            vwrq->value = IW_AUTH_ALG_OPEN_SYSTEM;
+        break;
+    case IW_AUTH_WPA_ENABLED:
+        if (ap_cfg.protocol == PROTOCOL_WPA ||
+            ap_cfg.protocol == PROTOCOL_WPA2 ||
+            ap_cfg.protocol == PROTOCOL_WPA2_MIXED)
+            vwrq->value = 1;
+        else
+            vwrq->value = 0;
+        break;
+    case IW_AUTH_KEY_MGMT:
+        if (ap_cfg.key_mgmt & KEY_MGMT_EAP)
+            vwrq->value |= IW_AUTH_KEY_MGMT_802_1X;
+        if (ap_cfg.key_mgmt & KEY_MGMT_PSK)
+            vwrq->value |= IW_AUTH_KEY_MGMT_PSK;
+        break;
+    case IW_AUTH_WPA_VERSION:
+    case IW_AUTH_TKIP_COUNTERMEASURES:
+    case IW_AUTH_DROP_UNENCRYPTED:
+    case IW_AUTH_RX_UNENCRYPTED_EAPOL:
+    case IW_AUTH_ROAMING_CONTROL:
+    case IW_AUTH_PRIVACY_INVOKED:
+    default:
+        return -EOPNOTSUPP;
+    }
+
+    LEAVE();
+    return 0;
+}
+#endif /* WE >= 18 */
+
+/* Data rate listing
+ *      MULTI_BANDS:
+ *              abg             a       b       b/g
+ *  Infra       G(12)           A(8)    B(4)    G(12)
+ *  Adhoc       A+B(12)         A(8)    B(4)    B(4)
+ *      non-MULTI_BANDS:
+                                        b       b/g
+ *  Infra                               B(4)    G(12)
+ *  Adhoc                               B(4)    B(4)
+ */
+/**
+ *  @brief Get Range Info
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param dwrq                 A pointer to iw_point structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_get_range(struct net_device *dev, struct iw_request_info *info,
+               struct iw_point *dwrq, char *extra)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_uap_bss_param ap_cfg;
+    struct iw_range *range = (struct iw_range *) extra;
+    t_u8 band = 0;
+    int i;
+
+    ENTER();
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_set_get_sys_config(priv, MLAN_ACT_GET, &ap_cfg)) {
+        PRINTM(MERROR, "Error getting AP confiruration\n");
+        LEAVE();
+        return -EFAULT;
+    }
+    dwrq->length = sizeof(struct iw_range);
+    memset(range, 0, sizeof(struct iw_range));
+
+    range->min_nwid = 0;
+    range->max_nwid = 0;
+
+    range->num_bitrates = MAX_DATA_RATES;
+    for (i = 0; i < MIN(MAX_DATA_RATES, IW_MAX_BITRATES) &&
+         ap_cfg.rates[i]; i++) {
+        range->bitrate[i] = (ap_cfg.rates[i] & 0x7f) * 500000;
+    }
+    range->num_bitrates = i;
+    PRINTM(MINFO, "IW_MAX_BITRATES=%d num_bitrates=%d\n",
+           IW_MAX_BITRATES, range->num_bitrates);
+
+    range->num_frequency = MIN(ap_cfg.num_of_chan, IW_MAX_FREQUENCIES);
+
+    for (i = 0; i < range->num_frequency; i++) {
+        range->freq[i].i = (long) ap_cfg.chan_list[i].chan_number;
+        band = ap_cfg.chan_list[i].band_config_type & BAND_CONFIG_5GHZ;
+        range->freq[i].m =
+            (long) channel_to_frequency(ap_cfg.chan_list[i].chan_number,
+                                        band) * 100000;
+        range->freq[i].e = 1;
+    }
+
+    PRINTM(MINFO, "IW_MAX_FREQUENCIES=%d num_frequency=%d\n",
+           IW_MAX_FREQUENCIES, range->num_frequency);
+
+    range->num_channels = range->num_frequency;
+
+    woal_sort_channels(&range->freq[0], range->num_frequency);
+
+    /* 
+     * Set an indication of the max TCP throughput in bit/s that we can
+     * expect using this interface
+     */
+    if (i > 2)
+        range->throughput = 5000 * 1000;
+    else
+        range->throughput = 1500 * 1000;
+
+    range->min_rts = MLAN_RTS_MIN_VALUE;
+    range->max_rts = MLAN_RTS_MAX_VALUE;
+    range->min_frag = MLAN_FRAG_MIN_VALUE;
+    range->max_frag = MLAN_FRAG_MAX_VALUE;
+
+    range->encoding_size[0] = 5;
+    range->encoding_size[1] = 13;
+    range->num_encoding_sizes = 2;
+    range->max_encoding_tokens = 4;
+
+/** Minimum power period */
+#define IW_POWER_PERIOD_MIN 1000000     /* 1 sec */
+/** Maximum power period */
+#define IW_POWER_PERIOD_MAX 120000000   /* 2 min */
+/** Minimum power timeout value */
+#define IW_POWER_TIMEOUT_MIN 1000       /* 1 ms */
+/** Maximim power timeout value */
+#define IW_POWER_TIMEOUT_MAX 1000000    /* 1 sec */
+
+    /* Power Management duration & timeout */
+    range->min_pmp = IW_POWER_PERIOD_MIN;
+    range->max_pmp = IW_POWER_PERIOD_MAX;
+    range->min_pmt = IW_POWER_TIMEOUT_MIN;
+    range->max_pmt = IW_POWER_TIMEOUT_MAX;
+    range->pmp_flags = IW_POWER_PERIOD;
+    range->pmt_flags = IW_POWER_TIMEOUT;
+    range->pm_capa = IW_POWER_PERIOD | IW_POWER_TIMEOUT | IW_POWER_ALL_R;
+
+    /* 
+     * Minimum version we recommend
+     */
+    range->we_version_source = 15;
+
+    /* 
+     * Version we are compiled with
+     */
+    range->we_version_compiled = WIRELESS_EXT;
+
+    range->retry_capa = IW_RETRY_LIMIT;
+    range->retry_flags = IW_RETRY_LIMIT | IW_RETRY_MAX;
+
+    range->min_retry = MLAN_TX_RETRY_MIN;
+    range->max_retry = MLAN_TX_RETRY_MAX;
+
+#if (WIRELESS_EXT >= 18)
+    if (ap_cfg.protocol & PROTOCOL_WPA)
+        range->enc_capa |= IW_ENC_CAPA_WPA;
+    if (ap_cfg.protocol & PROTOCOL_WPA2)
+        range->enc_capa |= IW_ENC_CAPA_WPA2;
+    if (ap_cfg.wpa_cfg.pairwise_cipher_wpa == CIPHER_TKIP ||
+        ap_cfg.wpa_cfg.pairwise_cipher_wpa2 == CIPHER_TKIP ||
+        ap_cfg.wpa_cfg.group_cipher == CIPHER_TKIP)
+        range->enc_capa |= IW_ENC_CAPA_CIPHER_TKIP;
+    if (ap_cfg.wpa_cfg.pairwise_cipher_wpa == CIPHER_AES_CCMP ||
+        ap_cfg.wpa_cfg.pairwise_cipher_wpa2 == CIPHER_AES_CCMP ||
+        ap_cfg.wpa_cfg.group_cipher == CIPHER_AES_CCMP)
+        range->enc_capa |= IW_ENC_CAPA_CIPHER_CCMP;
+#endif
+
+    LEAVE();
+    return 0;
+}
+
+/**
+ *  @brief Set priv command 
+ *
+ *  @param dev          A pointer to net_device structure
+ *  @param info         A pointer to iw_request_info structure
+ *  @param dwrq         A pointer to iw_point structure
+ *  @param extra        A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_set_priv(struct net_device *dev, struct iw_request_info *info,
+              struct iw_point *dwrq, char *extra)
+{
+    ENTER();
+    LEAVE();
+    return -EOPNOTSUPP;
+}
+
+/**
+ *  @brief Set essid
+ *
+ *  @param dev          A pointer to net_device structure
+ *  @param info         A pointer to iw_request_info structure
+ *  @param dwrq         A pointer to iw_point structure
+ *  @param extra        A pointer to extra data buf
+ *
+ *  @return             0--success, otherwise fail
+ */
+static int
+woal_set_essid(struct net_device *dev, struct iw_request_info *info,
+               struct iw_point *dwrq, char *extra)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_uap_bss_param sys_cfg;
+    int ret = 0;
+
+    ENTER();
+
+    /* Check the size of the string */
+    if (dwrq->length > IW_ESSID_MAX_SIZE + 1) {
+        ret = -E2BIG;
+        goto done;
+    }
+
+    /* Initialize the invalid values so that the correct values below are
+       downloaded to firmware */
+    woal_set_sys_config_invalid_data(&sys_cfg);
+
+    /* Set the SSID */
+#if WIRELESS_EXT > 20
+    sys_cfg.ssid.ssid_len = dwrq->length;
+#else
+    sys_cfg.ssid.ssid_len = dwrq->length - 1;
+#endif
+
+    memcpy(sys_cfg.ssid.ssid, extra,
+           MIN(sys_cfg.ssid.ssid_len, MLAN_MAX_SSID_LENGTH));
+    if (!sys_cfg.ssid.ssid_len || sys_cfg.ssid.ssid[0] < 0x20) {
+        PRINTM(MERROR, "Invalid SSID - aborting set_essid\n");
+        ret = -EINVAL;
+        goto done;
+    }
+    PRINTM(MINFO, "Requested new SSID = %s\n",
+           (sys_cfg.ssid.ssid_len > 0) ? (char *) sys_cfg.ssid.ssid : "NULL");
+
+    /* Set AP configuration */
+    if (MLAN_STATUS_SUCCESS !=
+        woal_set_get_sys_config(priv, MLAN_ACT_SET, &sys_cfg)) {
+        PRINTM(MERROR, "Error setting AP confiruration\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Get current essid 
+ *   
+ *  @param dev      A pointer to net_device structure
+ *  @param info     A pointer to iw_request_info structure
+ *  @param dwrq     A pointer to iw_point structure
+ *  @param extra    A pointer to extra data buf
+ *
+ *  @return         0--success, otherwise fail
+ */
+static int
+woal_get_essid(struct net_device *dev, struct iw_request_info *info,
+               struct iw_point *dwrq, char *extra)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_uap_bss_param ap_cfg;
+
+    ENTER();
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_set_get_sys_config(priv, MLAN_ACT_GET, &ap_cfg)) {
+        PRINTM(MERROR, "Error getting AP confiruration\n");
+        LEAVE();
+        return -EFAULT;
+    }
+
+    if (priv->bss_started) {
+        dwrq->length = MIN(dwrq->length, ap_cfg.ssid.ssid_len);
+        memcpy(extra, ap_cfg.ssid.ssid, dwrq->length);
+    } else
+        dwrq->length = 0;
+
+    dwrq->flags = 1;
+
+    LEAVE();
+    return 0;
+}
+
+/**
+ * iwconfig settable callbacks
+ */
+static const iw_handler woal_handler[] = {
+    (iw_handler) woal_config_commit,    /* SIOCSIWCOMMIT */
+    (iw_handler) woal_get_name, /* SIOCGIWNAME */
+    (iw_handler) NULL,          /* SIOCSIWNWID */
+    (iw_handler) NULL,          /* SIOCGIWNWID */
+    (iw_handler) woal_set_freq, /* SIOCSIWFREQ */
+    (iw_handler) woal_get_freq, /* SIOCGIWFREQ */
+    (iw_handler) woal_set_bss_mode,     /* SIOCSIWMODE */
+    (iw_handler) woal_get_bss_mode,     /* SIOCGIWMODE */
+    (iw_handler) NULL,          /* SIOCSIWSENS */
+    (iw_handler) NULL,          /* SIOCGIWSENS */
+    (iw_handler) NULL,          /* SIOCSIWRANGE */
+    (iw_handler) woal_get_range,        /* SIOCGIWRANGE */
+    (iw_handler) woal_set_priv, /* SIOCSIWPRIV */
+    (iw_handler) NULL,          /* SIOCGIWPRIV */
+    (iw_handler) NULL,          /* SIOCSIWSTATS */
+    (iw_handler) NULL,          /* SIOCGIWSTATS */
+#if WIRELESS_EXT > 15
+    iw_handler_set_spy,         /* SIOCSIWSPY */
+    iw_handler_get_spy,         /* SIOCGIWSPY */
+    iw_handler_set_thrspy,      /* SIOCSIWTHRSPY */
+    iw_handler_get_thrspy,      /* SIOCGIWTHRSPY */
+#else /* WIRELESS_EXT > 15 */
+#ifdef WIRELESS_SPY
+    (iw_handler) NULL,          /* SIOCSIWSPY */
+    (iw_handler) NULL,          /* SIOCGIWSPY */
+#else /* WIRELESS_SPY */
+    (iw_handler) NULL,          /* SIOCSIWSPY */
+    (iw_handler) NULL,          /* SIOCGIWSPY */
+#endif /* WIRELESS_SPY */
+    (iw_handler) NULL,          /* -- hole -- */
+    (iw_handler) NULL,          /* -- hole -- */
+#endif /* WIRELESS_EXT > 15 */
+    (iw_handler) woal_set_wap,  /* SIOCSIWAP */
+    (iw_handler) woal_get_wap,  /* SIOCGIWAP */
+#if WIRELESS_EXT >= 18
+    (iw_handler) woal_set_mlme, /* SIOCSIWMLME */
+#else
+    (iw_handler) NULL,          /* -- hole -- */
+#endif
+    /* (iw_handler) wlan_get_aplist, *//* SIOCGIWAPLIST */
+    NULL,                       /* SIOCGIWAPLIST */
+#if WIRELESS_EXT > 13
+    (iw_handler) NULL,          /* SIOCSIWSCAN */
+    (iw_handler) NULL,          /* SIOCGIWSCAN */
+#else /* WIRELESS_EXT > 13 */
+    (iw_handler) NULL,          /* SIOCSIWSCAN */
+    (iw_handler) NULL,          /* SIOCGIWSCAN */
+#endif /* WIRELESS_EXT > 13 */
+    (iw_handler) woal_set_essid,        /* SIOCSIWESSID */
+    (iw_handler) woal_get_essid,        /* SIOCGIWESSID */
+    (iw_handler) NULL,          /* SIOCSIWNICKN */
+    (iw_handler) NULL,          /* SIOCGIWNICKN */
+    (iw_handler) NULL,          /* -- hole -- */
+    (iw_handler) NULL,          /* -- hole -- */
+    (iw_handler) NULL,          /* SIOCSIWRATE */
+    (iw_handler) NULL,          /* SIOCGIWRATE */
+    (iw_handler) NULL,          /* SIOCSIWRTS */
+    (iw_handler) NULL,          /* SIOCGIWRTS */
+    (iw_handler) NULL,          /* SIOCSIWFRAG */
+    (iw_handler) NULL,          /* SIOCGIWFRAG */
+    (iw_handler) NULL,          /* SIOCSIWTXPOW */
+    (iw_handler) NULL,          /* SIOCGIWTXPOW */
+    (iw_handler) NULL,          /* SIOCSIWRETRY */
+    (iw_handler) NULL,          /* SIOCGIWRETRY */
+    (iw_handler) woal_set_encode,       /* SIOCSIWENCODE */
+    (iw_handler) woal_get_encode,       /* SIOCGIWENCODE */
+    (iw_handler) NULL,          /* SIOCSIWPOWER */
+    (iw_handler) NULL,          /* SIOCGIWPOWER */
+#if (WIRELESS_EXT >= 18)
+    (iw_handler) NULL,          /* -- hole -- */
+    (iw_handler) NULL,          /* -- hole -- */
+    (iw_handler) woal_set_gen_ie,       /* SIOCSIWGENIE */
+    (iw_handler) woal_get_gen_ie,       /* SIOCGIWGENIE */
+    (iw_handler) woal_set_auth, /* SIOCSIWAUTH */
+    (iw_handler) woal_get_auth, /* SIOCGIWAUTH */
+    (iw_handler) woal_set_encode_ext,   /* SIOCSIWENCODEEXT */
+    (iw_handler) woal_get_encode_ext,   /* SIOCGIWENCODEEXT */
+#endif /* WIRELESSS_EXT >= 18 */
+};
+
+/**
+ * iwpriv settable callbacks
+ */
+static const iw_handler woal_private_handler[] = {
+    NULL,                       /* SIOCIWFIRSTPRIV */
+};
+
+/********************************************************
+                Global Functions
+********************************************************/
+
+/** wlan_handler_def */
+struct iw_handler_def woal_uap_handler_def = {
+  num_standard:sizeof(woal_handler) / sizeof(iw_handler),
+  num_private:sizeof(woal_private_handler) / sizeof(iw_handler),
+  num_private_args:sizeof(woal_uap_priv_args) /
+        sizeof(struct iw_priv_args),
+  standard:(iw_handler *) woal_handler,
+  private:(iw_handler *) woal_private_handler,
+  private_args:(struct iw_priv_args *) woal_uap_priv_args,
+#if WIRELESS_EXT > 20
+  get_wireless_stats:woal_get_uap_wireless_stats,
+#endif
+};
+
+/**
+ *  @brief Get wireless statistics
+ *
+ *  @param dev          A pointer to net_device structure
+ *
+ *  @return             A pointer to iw_statistics buf
+ */
+struct iw_statistics *
+woal_get_uap_wireless_stats(struct net_device *dev)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    t_u16 wait_option = MOAL_NO_WAIT;
+
+    ENTER();
+
+    /* 
+     * Since schedule() is not allowed from an atomic context
+     * such as when dev_base_lock for netdevices is acquired
+     * for reading/writing in kernel before this call, HostCmd
+     * is issued in non-blocking way in such contexts and
+     * blocking in other cases.
+     */
+    if (write_can_lock(&dev_base_lock))
+        wait_option = MOAL_WSTATS_WAIT;
+
+    priv->w_stats.qual.qual = 0;
+    priv->w_stats.qual.level = 0;
+    priv->w_stats.discard.code = 0;
+    priv->w_stats.status = IW_MODE_MASTER;
+    woal_uap_get_stats(priv, wait_option, NULL);
+
+    LEAVE();
+    return &priv->w_stats;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_usb.c linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_usb.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_usb.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_usb.c	2017-09-23 03:42:50.174674587 +0800
@@ -0,0 +1,1176 @@
+/** @file moal_usb.c
+  *
+  * @brief This file contains the interfaceing to USB bus 
+  * driver. 
+  *
+  * Copyright (C) 2008-2011, Marvell International Ltd. 
+  * 
+  * This software file (the "File") is distributed by Marvell International 
+  * Ltd. under the terms of the GNU General Public License Version 2, June 1991 
+  * (the "License").  You may use, redistribute and/or modify this File in 
+  * accordance with the terms and conditions of the License, a copy of which 
+  * is available by writing to the Free Software Foundation, Inc.,
+  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
+  * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
+  *
+  * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 
+  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 
+  * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about 
+  * this warranty disclaimer.
+  *
+  */
+
+/********************************************************
+Change log:
+    10/21/2008: initial version
+********************************************************/
+
+#include	"moal_main.h"
+#include	"moal_usb.h"
+/********************************************************
+		Local Variables
+********************************************************/
+
+/** Marvell USB device */
+#define MARVELL_USB_DEVICE(vid, pid, name) \
+           USB_DEVICE(vid, pid),  \
+           .driver_info = (t_u32)name
+
+/** Name of the USB driver */
+const char usbdriver_name[] = "usb8xxx";
+
+/** This structure contains the device signature */
+struct usb_device_id woal_usb_table[] = {
+    /* Enter the device signature inside */
+
+    {MARVELL_USB_DEVICE
+     (USB8782_VID_1, USB8782_PID_1, "Marvell WLAN USB Adapter")},
+    /* Terminating entry */
+    {},
+};
+
+static mlan_status woal_usb_submit_rx_urb(urb_context * ctx, int size);
+static int woal_usb_probe(struct usb_interface *intf,
+                          const struct usb_device_id *id);
+static void woal_usb_disconnect(struct usb_interface *intf);
+static int woal_usb_suspend(struct usb_interface *intf, pm_message_t message);
+static int woal_usb_resume(struct usb_interface *intf);
+
+/** woal_usb_driver */
+static struct usb_driver woal_usb_driver = {
+    /* Driver name */
+    .name = usbdriver_name,
+
+    /* Probe function name */
+    .probe = woal_usb_probe,
+
+    /* Disconnect function name */
+    .disconnect = woal_usb_disconnect,
+
+    /* Device signature table */
+    .id_table = woal_usb_table,
+    /* Suspend function name */
+    .suspend = woal_usb_suspend,
+
+    /* Resume function name */
+    .resume = woal_usb_resume,
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19)
+    /* Driver supports autosuspend */
+    .supports_autosuspend = 1,
+#endif
+};
+
+MODULE_DEVICE_TABLE(usb, woal_usb_table);
+
+/********************************************************
+		Global Variables
+********************************************************/
+
+/********************************************************
+		Local Functions
+********************************************************/
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
+/**
+ *  @brief This function receive packet of the data/cmd/event packet
+ *         and pass to MLAN 
+ *
+ *  @param urb		Pointer to struct urb
+ *  @param regs		Registers
+ *
+ *  @return 	   	N/A
+ */
+static void
+woal_usb_receive(struct urb *urb, struct pt_regs *regs)
+#else
+/**
+ * @brief This function receive packet of the data/cmd/event packet
+ *         and pass to MLAN 
+ *
+ *  @param urb		Pointer to struct urb
+ *
+ *  @return 	   	N/A
+ */
+static void
+woal_usb_receive(struct urb *urb)
+#endif
+{
+    urb_context *context = (urb_context *) urb->context;
+    moal_handle *handle = context->handle;
+    mlan_buffer *pmbuf = context->pmbuf;
+    struct usb_card_rec *cardp = NULL;
+    int recv_length = urb->actual_length;
+    int size;
+    mlan_status status;
+
+    ENTER();
+
+    if (!handle || !handle->card) {
+        PRINTM(MERROR, "moal handle or card structure is not valid\n");
+        LEAVE();
+        return;
+    }
+    cardp = (struct usb_card_rec *) handle->card;
+    if (cardp->rx_cmd_ep == context->ep)
+        atomic_dec(&cardp->rx_cmd_urb_pending);
+    else
+        atomic_dec(&cardp->rx_data_urb_pending);
+
+    if (recv_length) {
+        if (urb->status || (handle->surprise_removed == MTRUE)) {
+            PRINTM(MERROR, "URB status is failed: %d\n", urb->status);
+            /* Do not free mlan_buffer in case of command ep */
+            if (cardp->rx_cmd_ep != context->ep)
+                woal_free_mlan_buffer(handle, pmbuf);
+            goto setup_for_next;
+        }
+        /* Send packet to MLAN */
+        pmbuf->data_len = recv_length;
+        atomic_inc(&handle->rx_pending);
+        status = mlan_recv(handle->pmlan_adapter, pmbuf, context->ep);
+        PRINTM(MINFO, "Receive length = 0x%x, status=%d\n", recv_length,
+               status);
+        if (status == MLAN_STATUS_PENDING) {
+            queue_work(handle->workqueue, &handle->main_work);
+            /* urb for data_ep is re-submitted now */
+            /* urb for cmd_ep will be re-submitted in callback
+               moal_recv_complete */
+            if (cardp->rx_cmd_ep == context->ep)
+                goto rx_exit;
+        } else {
+            atomic_dec(&handle->rx_pending);
+            if (status == MLAN_STATUS_FAILURE)
+                PRINTM(MERROR, "MLAN fail to process the receive data\n");
+            /* Do not free mlan_buffer in case of command ep */
+            if (cardp->rx_cmd_ep != context->ep)
+                woal_free_mlan_buffer(handle, pmbuf);
+        }
+    } else if (urb->status) {
+        if (!handle->is_suspended) {
+            PRINTM(MMSG, "Card is removed: %d\n", urb->status);
+            handle->surprise_removed = MTRUE;
+        }
+        woal_free_mlan_buffer(handle, pmbuf);
+        context->pmbuf = NULL;
+        goto rx_exit;
+    } else {
+        /* Do not free mlan_buffer in case of command ep */
+        if (cardp->rx_cmd_ep != context->ep)
+            woal_free_mlan_buffer(handle, pmbuf);
+        goto setup_for_next;
+    }
+  setup_for_next:
+    if (cardp->rx_cmd_ep == context->ep)
+        size = MLAN_RX_CMD_BUF_SIZE;
+    else
+        size = MLAN_RX_DATA_BUF_SIZE;
+    woal_usb_submit_rx_urb(context, size);
+  rx_exit:
+
+    LEAVE();
+    return;
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
+/** 
+ *  @brief  Call back function to handle the status of the Tx data URB
+ *
+ *  @param urb      Pointer to urb structure
+ *  @param regs     Registers
+ *
+ *  @return         N/A
+ */
+static void
+woal_usb_tx_complete(struct urb *urb, struct pt_regs *regs)
+#else
+/** 
+ * @brief  Call back function to handle the status of the Tx data URB
+ *
+ * @param urb      Pointer to urb structure
+ *
+ * @return         N/A
+ */
+static void
+woal_usb_tx_complete(struct urb *urb)
+#endif
+{
+    urb_context *context = (urb_context *) (urb->context);
+    moal_handle *handle = context->handle;
+    struct usb_card_rec *cardp = handle->card;
+
+    ENTER();
+
+    /* Decrease pending URB counter */
+    if (context->ep == cardp->tx_data_ep)
+        atomic_dec(&cardp->tx_data_urb_pending);
+    if (context->ep == cardp->tx_cmd_ep)
+        atomic_dec(&cardp->tx_cmd_urb_pending);
+    /* Handle the transmission complete validations */
+    if (urb->status) {
+        PRINTM(MERROR, "Tx data URB in failure status: %d\n", urb->status);
+        mlan_write_data_async_complete(handle->pmlan_adapter, context->pmbuf,
+                                       context->ep, MLAN_STATUS_FAILURE);
+    } else {
+        mlan_write_data_async_complete(handle->pmlan_adapter, context->pmbuf,
+                                       context->ep, MLAN_STATUS_SUCCESS);
+    }
+    queue_work(handle->workqueue, &handle->main_work);
+
+    LEAVE();
+    return;
+}
+
+/**
+ *  @brief This function sets up the data to receive
+ *
+ *  @param ctx		Pointer to urb_context structure
+ *  @param size	        Skb size
+ *
+ *  @return 	   	MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+static mlan_status
+woal_usb_submit_rx_urb(urb_context * ctx, int size)
+{
+    moal_handle *handle = ctx->handle;
+    struct usb_card_rec *cardp = (struct usb_card_rec *) handle->card;
+    mlan_status ret = MLAN_STATUS_FAILURE;
+
+    ENTER();
+
+    if (cardp->rx_cmd_ep != ctx->ep) {
+        if (!(ctx->pmbuf = woal_alloc_mlan_buffer(handle, size))) {
+            PRINTM(MERROR, "Fail to submit Rx URB due to no memory/skb\n");
+            goto rx_ret;
+        }
+    }
+    ctx->pmbuf->data_offset = MLAN_NET_IP_ALIGN + MLAN_RX_HEADER_LEN;
+
+    usb_fill_bulk_urb(ctx->urb, cardp->udev,
+                      usb_rcvbulkpipe(cardp->udev, ctx->ep),
+                      ctx->pmbuf->pbuf + ctx->pmbuf->data_offset,
+                      size - ctx->pmbuf->data_offset, woal_usb_receive,
+                      (void *) ctx);
+    if (cardp->rx_cmd_ep == ctx->ep)
+        atomic_inc(&cardp->rx_cmd_urb_pending);
+    else
+        atomic_inc(&cardp->rx_data_urb_pending);
+    if (usb_submit_urb(ctx->urb, GFP_ATOMIC)) {
+        /* Submit URB failure */
+        PRINTM(MERROR, "Submit Rx URB failed: %d\n", ret);
+        woal_free_mlan_buffer(handle, ctx->pmbuf);
+        if (cardp->rx_cmd_ep == ctx->ep)
+            atomic_dec(&cardp->rx_cmd_urb_pending);
+        else
+            atomic_dec(&cardp->rx_data_urb_pending);
+        ctx->pmbuf = NULL;
+        ret = MLAN_STATUS_FAILURE;
+    } else {
+        ret = MLAN_STATUS_SUCCESS;
+    }
+  rx_ret:
+    LEAVE();
+    return ret;
+}
+
+/********************************************************
+		Global Functions
+********************************************************/
+
+/**
+ *  @brief  Free Tx/Rx urb, skb and Rx buffer
+ *
+ *  @param cardp	Pointer usb_card_rec
+ *
+ *  @return 	   	N/A
+ */
+void
+woal_usb_free(struct usb_card_rec *cardp)
+{
+    int i;
+
+    ENTER();
+
+    /* Unlink Rx cmd URB */
+    if (atomic_read(&cardp->rx_cmd_urb_pending) && cardp->rx_cmd.urb) {
+        usb_kill_urb(cardp->rx_cmd.urb);
+    }
+    /* Unlink Rx data URBs */
+    if (atomic_read(&cardp->rx_data_urb_pending)) {
+        for (i = 0; i < MVUSB_RX_DATA_URB; i++) {
+            if (cardp->rx_data_list[i].urb)
+                usb_kill_urb(cardp->rx_data_list[i].urb);
+        }
+    }
+
+    /* Free Rx data URBs */
+    for (i = 0; i < MVUSB_RX_DATA_URB; i++) {
+        if (cardp->rx_data_list[i].urb) {
+            usb_free_urb(cardp->rx_data_list[i].urb);
+            cardp->rx_data_list[i].urb = NULL;
+        }
+    }
+    /* Free Rx cmd URB */
+    if (cardp->rx_cmd.urb) {
+        usb_free_urb(cardp->rx_cmd.urb);
+        cardp->rx_cmd.urb = NULL;
+    }
+
+    /* Free Tx data URBs */
+    for (i = 0; i < MVUSB_TX_HIGH_WMARK; i++) {
+        if (cardp->tx_data_list[i].urb) {
+            usb_free_urb(cardp->tx_data_list[i].urb);
+            cardp->tx_data_list[i].urb = NULL;
+        }
+    }
+    /* Free Tx cmd URB */
+    if (cardp->tx_cmd.urb) {
+        usb_free_urb(cardp->tx_cmd.urb);
+        cardp->tx_cmd.urb = NULL;
+    }
+
+    LEAVE();
+    return;
+}
+
+/**
+ *  @brief Sets the configuration values
+ *
+ *  @param intf		Pointer to usb_interface
+ *  @param id		Pointer to usb_device_id
+ *
+ *  @return 	   	Address of variable usb_cardp, error code otherwise
+ */
+static int
+woal_usb_probe(struct usb_interface *intf, const struct usb_device_id *id)
+{
+    struct usb_device *udev;
+    struct usb_host_interface *iface_desc;
+    struct usb_endpoint_descriptor *endpoint;
+    int i;
+    struct usb_card_rec *usb_cardp = NULL;
+
+    ENTER();
+
+    udev = interface_to_usbdev(intf);
+    usb_cardp = kmalloc(sizeof(struct usb_card_rec), GFP_KERNEL);
+    memset((t_u8 *) usb_cardp, 0, sizeof(struct usb_card_rec));
+    if (!usb_cardp) {
+        LEAVE();
+        return (-ENOMEM);
+    }
+
+    udev->descriptor.idVendor = woal_cpu_to_le16(udev->descriptor.idVendor);
+    udev->descriptor.idProduct = woal_cpu_to_le16(udev->descriptor.idProduct);
+    udev->descriptor.bcdDevice = woal_cpu_to_le16(udev->descriptor.bcdDevice);
+    udev->descriptor.bcdUSB = woal_cpu_to_le16(udev->descriptor.bcdUSB);
+
+    /* Check probe is for our device */
+    for (i = 0; woal_usb_table[i].idVendor; i++) {
+        if (udev->descriptor.idVendor == woal_usb_table[i].idVendor &&
+            udev->descriptor.idProduct == woal_usb_table[i].idProduct) {
+            PRINTM(MMSG, "VID/PID = %X/%X, Boot2 version = %X\n",
+                   udev->descriptor.idVendor, udev->descriptor.idProduct,
+                   udev->descriptor.bcdDevice);
+            break;
+        }
+    }
+
+    if (woal_usb_table[i].idVendor) {
+        usb_cardp->udev = udev;
+        iface_desc = intf->cur_altsetting;
+        usb_cardp->intf = intf;
+
+        PRINTM(MINFO, "bcdUSB = 0x%X bDeviceClass = 0x%X"
+               " bDeviceSubClass = 0x%X, bDeviceProtocol = 0x%X\n",
+               udev->descriptor.bcdUSB,
+               udev->descriptor.bDeviceClass,
+               udev->descriptor.bDeviceSubClass,
+               udev->descriptor.bDeviceProtocol);
+
+        for (i = 0; i < iface_desc->desc.bNumEndpoints; ++i) {
+            endpoint = &iface_desc->endpoint[i].desc;
+            if ((endpoint->bEndpointAddress & USB_ENDPOINT_DIR_MASK) &&
+                ((endpoint->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) ==
+                 MLAN_USB_EP_CMD_EVENT) &&
+                ((endpoint->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) ==
+                 USB_ENDPOINT_XFER_BULK)) {
+                /* We found a bulk in command/event endpoint */
+                PRINTM(MINFO, "Bulk IN: max packet size = %d, address = %d\n",
+                       woal_le16_to_cpu(endpoint->wMaxPacketSize),
+                       endpoint->bEndpointAddress);
+                usb_cardp->rx_cmd_ep =
+                    (endpoint->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK);
+                atomic_set(&usb_cardp->rx_cmd_urb_pending, 0);
+            }
+            if ((endpoint->bEndpointAddress & USB_ENDPOINT_DIR_MASK) &&
+                ((endpoint->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) ==
+                 MLAN_USB_EP_DATA) &&
+                ((endpoint->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) ==
+                 USB_ENDPOINT_XFER_BULK)) {
+                /* We found a bulk in data endpoint */
+                PRINTM(MINFO, "Bulk IN: max packet size = %d, address = %d\n",
+                       woal_le16_to_cpu(endpoint->wMaxPacketSize),
+                       endpoint->bEndpointAddress);
+                usb_cardp->rx_data_ep =
+                    (endpoint->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK);
+                atomic_set(&usb_cardp->rx_data_urb_pending, 0);
+            }
+            if (((endpoint->bEndpointAddress & USB_ENDPOINT_DIR_MASK) ==
+                 USB_DIR_OUT) &&
+                ((endpoint->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) ==
+                 MLAN_USB_EP_DATA) &&
+                ((endpoint->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) ==
+                 USB_ENDPOINT_XFER_BULK)) {
+                /* We found a bulk out data endpoint */
+                PRINTM(MINFO, "Bulk OUT: max packet size = %d, address = %d\n",
+                       woal_le16_to_cpu(endpoint->wMaxPacketSize),
+                       endpoint->bEndpointAddress);
+                usb_cardp->tx_data_ep = endpoint->bEndpointAddress;
+                atomic_set(&usb_cardp->tx_data_urb_pending, 0);
+            }
+            if (((endpoint->bEndpointAddress & USB_ENDPOINT_DIR_MASK) ==
+                 USB_DIR_OUT) &&
+                ((endpoint->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) ==
+                 MLAN_USB_EP_CMD_EVENT) &&
+                ((endpoint->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) ==
+                 USB_ENDPOINT_XFER_BULK)) {
+                /* We found a bulk out command/event endpoint */
+                PRINTM(MINFO, "Bulk OUT: max packet size = %d, address = %d\n",
+                       woal_le16_to_cpu(endpoint->wMaxPacketSize),
+                       endpoint->bEndpointAddress);
+                usb_cardp->tx_cmd_ep = endpoint->bEndpointAddress;
+                atomic_set(&usb_cardp->tx_cmd_urb_pending, 0);
+                usb_cardp->bulk_out_maxpktsize =
+                    woal_le16_to_cpu(endpoint->wMaxPacketSize);
+            }
+        }
+        usb_set_intfdata(intf, usb_cardp);
+        /* At this point wlan_add_card() will be called */
+        if (!(woal_add_card(usb_cardp))) {
+            PRINTM(MERROR, "%s: woal_add_callback failed\n", __FUNCTION__);
+            goto error;
+        }
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19)
+        /* Note: From 2.6.34.2 onwards, remote wakeup is NOT enabled by
+           default. So drivers wanting remote wakeup will have to enable this
+           using - device_set_wakeup_enable(&udev->dev, 1); It has been
+           observed that some cards having device attr = 0xa0 do not support
+           remote wakeup. These cards come immediately out of the suspend when 
+           power/wakeup file is set to 'enabled'. To support all types of cards 
+           i.e. with/without remote wakeup, we are NOT setting the
+           'power/wakeup' file from here. Also in principle, we are not
+           supposed to change the wakeup policy, which is purely a userspace
+           decision. */
+        // if (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP)
+        // intf->needs_remote_wakeup = 1;
+#endif
+        usb_get_dev(udev);
+        LEAVE();
+        return 0;
+    } else {
+        PRINTM(MINFO, "Discard the Probe request\n");
+        PRINTM(MINFO, "VID = 0x%X PID = 0x%X\n", udev->descriptor.idVendor,
+               udev->descriptor.idProduct);
+    }
+  error:
+    usb_reset_device(udev);
+    kfree(usb_cardp);
+    usb_cardp = NULL;
+    LEAVE();
+    return (-ENOMEM);
+}
+
+/**
+ *  @brief Free resource and cleanup
+ *
+ *  @param intf		Pointer to usb_interface
+ *
+ *  @return 	   	N/A
+ */
+static void
+woal_usb_disconnect(struct usb_interface *intf)
+{
+    struct usb_card_rec *cardp = usb_get_intfdata(intf);
+    moal_handle *phandle = NULL;
+    ENTER();
+    if (!cardp || !cardp->phandle) {
+        PRINTM(MERROR, "Card or phandle is not valid\n");
+        LEAVE();
+        return;
+    }
+    phandle = (moal_handle *) cardp->phandle;
+
+    /* 
+     * Update Surprise removed to TRUE
+     *  Free all the URB's allocated
+     */
+    phandle->surprise_removed = MTRUE;
+
+    /* Unlink and free urb */
+    woal_usb_free(cardp);
+
+    /* Card is removed and we can call wlan_remove_card */
+    PRINTM(MINFO, "Call remove card\n");
+    woal_remove_card(cardp);
+
+    /* Reset device */
+    usb_reset_device(cardp->udev);
+    usb_set_intfdata(intf, NULL);
+    usb_put_dev(interface_to_usbdev(intf));
+    kfree(cardp);
+    LEAVE();
+    return;
+}
+
+/**
+ *  @brief Handle suspend 
+ *
+ *  @param intf		  Pointer to usb_interface
+ *  @param message	  Pointer to pm_message_t structure 			
+ *
+ *  @return 	   	  MLAN_STATUS_SUCCESS
+ */
+static int
+woal_usb_suspend(struct usb_interface *intf, pm_message_t message)
+{
+    struct usb_card_rec *cardp = usb_get_intfdata(intf);
+    moal_handle *handle = NULL;
+    int i;
+
+    ENTER();
+
+    if (!cardp || !cardp->phandle) {
+        PRINTM(MERROR, "Card or moal_handle structure is not valid\n");
+        LEAVE();
+        return MLAN_STATUS_SUCCESS;
+    }
+    handle = cardp->phandle;
+
+    /* Enable Host Sleep */
+    woal_enable_hs(woal_get_priv(handle, MLAN_BSS_ROLE_ANY));
+
+    /* Indicate device suspended */
+    /* The flag must be set here before the usb_kill_urb() calls. Reason: In
+       the complete handlers, urb->status(= -ENOENT) and 'is_suspended' flag is 
+       used in combination to distinguish between a suspended state and a
+       'disconnect' one. */
+    handle->is_suspended = MTRUE;
+    for (i = 0; i < handle->priv_num; i++)
+        netif_carrier_off(handle->priv[i]->netdev);
+
+    /* Unlink Rx cmd URB */
+    if (atomic_read(&cardp->rx_cmd_urb_pending) && cardp->rx_cmd.urb) {
+        usb_kill_urb(cardp->rx_cmd.urb);
+    }
+    /* Unlink Rx data URBs */
+    if (atomic_read(&cardp->rx_data_urb_pending)) {
+        for (i = 0; i < MVUSB_RX_DATA_URB; i++) {
+            if (cardp->rx_data_list[i].urb)
+                usb_kill_urb(cardp->rx_data_list[i].urb);
+        }
+    }
+
+    /* Unlink Tx data URBs */
+    for (i = 0; i < MVUSB_TX_HIGH_WMARK; i++) {
+        if (cardp->tx_data_list[i].urb) {
+            usb_kill_urb(cardp->tx_data_list[i].urb);
+        }
+    }
+    /* Unlink Tx cmd URB */
+    if (cardp->tx_cmd.urb) {
+        usb_kill_urb(cardp->tx_cmd.urb);
+    }
+
+    handle->suspend_wait_q_woken = MTRUE;
+    wake_up_interruptible(&handle->suspend_wait_q);
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief Handle resume
+ *
+ *  @param intf		  Pointer to usb_interface
+ *  
+ *  @return 	   	  MLAN_STATUS_SUCCESS
+ */
+static int
+woal_usb_resume(struct usb_interface *intf)
+{
+    struct usb_card_rec *cardp = usb_get_intfdata(intf);
+    moal_handle *handle = NULL;
+    int i;
+
+    ENTER();
+
+    if (!cardp || !cardp->phandle) {
+        PRINTM(MERROR, "Card or adapter structure is not valid\n");
+        LEAVE();
+        return MLAN_STATUS_SUCCESS;
+    }
+    handle = cardp->phandle;
+
+    if (handle->is_suspended == MFALSE) {
+        PRINTM(MWARN, "Device already resumed\n");
+        LEAVE();
+        return MLAN_STATUS_SUCCESS;
+    }
+
+    /* Indicate device resumed. The netdev queue will be resumed only after
+       the urbs have been resubmitted */
+    handle->is_suspended = MFALSE;
+
+    if (!atomic_read(&cardp->rx_data_urb_pending)) {
+        /* Submit multiple Rx data URBs */
+        woal_usb_submit_rx_data_urbs(handle);
+    }
+    if (!atomic_read(&cardp->rx_cmd_urb_pending)) {
+        if ((cardp->rx_cmd.pmbuf =
+             woal_alloc_mlan_buffer(handle, MLAN_RX_CMD_BUF_SIZE)))
+            woal_usb_submit_rx_urb(&cardp->rx_cmd, MLAN_RX_CMD_BUF_SIZE);
+    }
+
+    for (i = 0; i < handle->priv_num; i++)
+        if (handle->priv[i]->media_connected == MTRUE)
+            netif_carrier_on(handle->priv[i]->netdev);
+
+    /* Disable Host Sleep */
+    if (handle->hs_activated)
+        woal_cancel_hs(woal_get_priv(handle, MLAN_BSS_ROLE_ANY), MOAL_NO_WAIT);
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
+#ifdef CONFIG_PM
+    /* Resume handler may be called due to remote wakeup, force to exit suspend 
+       anyway */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35)
+    cardp->udev->autosuspend_disabled = 1;
+#else
+    cardp->udev->dev.power.runtime_auto = 0;
+#endif /* < 2.6.35 */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)
+    cardp->udev->autoresume_disabled = 0;
+#endif /* < 2.6.33 */
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34)
+    atomic_inc(&(cardp->udev)->dev.power.usage_count);
+#endif /* >= 2.6.34 */
+#endif /* CONFIG_PM */
+#endif /* >= 2.6.24 */
+
+    LEAVE();
+    return MLAN_STATUS_SUCCESS;
+}
+
+/**
+ *  @brief This function initialize the tx URBs
+ *
+ *  @param handle 	Pointer to moal_handle structure
+ *
+ *  @return 	   	MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+woal_usb_tx_init(moal_handle * handle)
+{
+    struct usb_card_rec *cardp = (struct usb_card_rec *) handle->card;
+    int i;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    cardp->tx_cmd.handle = handle;
+    cardp->tx_cmd.ep = cardp->tx_cmd_ep;
+    /* Allocate URB for command */
+    if (!(cardp->tx_cmd.urb = usb_alloc_urb(0, GFP_KERNEL))) {
+        PRINTM(MERROR, "Tx command URB allocation failed\n");
+        ret = MLAN_STATUS_FAILURE;
+        goto init_exit;
+    }
+
+    cardp->tx_data_ix = 0;
+    for (i = 0; i < MVUSB_TX_HIGH_WMARK; i++) {
+        cardp->tx_data_list[i].handle = handle;
+        cardp->tx_data_list[i].ep = cardp->tx_data_ep;
+        /* Allocate URB for data */
+        if (!(cardp->tx_data_list[i].urb = usb_alloc_urb(0, GFP_KERNEL))) {
+            PRINTM(MERROR, "Tx data URB allocation failed\n");
+            ret = MLAN_STATUS_FAILURE;
+            goto init_exit;
+        }
+    }
+
+  init_exit:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function submits the rx data URBs
+ *
+ *  @param handle 	Pointer to moal_handle structure
+ *
+ *  @return 	   	MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+woal_usb_submit_rx_data_urbs(moal_handle * handle)
+{
+    struct usb_card_rec *cardp = (struct usb_card_rec *) handle->card;
+    int i;
+    mlan_status ret = MLAN_STATUS_FAILURE;
+
+    ENTER();
+
+    for (i = 0; i < MVUSB_RX_DATA_URB; i++) {
+        /* Submit Rx data URB */
+        if (!cardp->rx_data_list[i].pmbuf) {
+            if (woal_usb_submit_rx_urb
+                (&cardp->rx_data_list[i], MLAN_RX_DATA_BUF_SIZE))
+                continue;
+        }
+        ret = MLAN_STATUS_SUCCESS;
+    }
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function initialize the rx URBs and submit them
+ *
+ *  @param handle 	Pointer to moal_handle structure
+ *
+ *  @return 	   	MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+woal_usb_rx_init(moal_handle * handle)
+{
+    struct usb_card_rec *cardp = (struct usb_card_rec *) handle->card;
+    int i;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    cardp->rx_cmd.handle = handle;
+    cardp->rx_cmd.ep = cardp->rx_cmd_ep;
+    /* Allocate URB for command/event */
+    if (!(cardp->rx_cmd.urb = usb_alloc_urb(0, GFP_KERNEL))) {
+        PRINTM(MERROR, "Rx command URB allocation failed\n");
+        ret = MLAN_STATUS_FAILURE;
+        goto init_exit;
+    }
+
+    if ((cardp->rx_cmd.pmbuf = woal_alloc_mlan_buffer(handle,
+                                                      MLAN_RX_CMD_BUF_SIZE))) {
+        /* Submit Rx command URB */
+        if (woal_usb_submit_rx_urb(&cardp->rx_cmd, MLAN_RX_CMD_BUF_SIZE)) {
+            ret = MLAN_STATUS_FAILURE;
+            goto init_exit;
+        }
+    }
+    for (i = 0; i < MVUSB_RX_DATA_URB; i++) {
+        cardp->rx_data_list[i].handle = handle;
+        cardp->rx_data_list[i].ep = cardp->rx_data_ep;
+        /* Allocate URB for data */
+        if (!(cardp->rx_data_list[i].urb = usb_alloc_urb(0, GFP_KERNEL))) {
+            PRINTM(MERROR, "Rx data URB allocation failed\n");
+            ret = MLAN_STATUS_FAILURE;
+            goto init_exit;
+        }
+    }
+    if ((ret = woal_usb_submit_rx_data_urbs(handle))) {
+        PRINTM(MERROR, "Rx data URB submission failed\n");
+        goto init_exit;
+    }
+
+  init_exit:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief  This function downloads data blocks to device
+ *
+ *  @param handle	Pointer to moal_handle structure
+ *  @param pmbuf	Pointer to mlan_buffer structure
+ *  @param ep		Endpoint to send
+ *  @param timeout 	Timeout value in milliseconds (if 0 the wait is forever)
+ *
+ *  @return 	   	MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+woal_write_data_sync(moal_handle * handle, mlan_buffer * pmbuf, t_u8 ep,
+                     t_u32 timeout)
+{
+    struct usb_card_rec *cardp = handle->card;
+    t_u8 *data = (t_u8 *) (pmbuf->pbuf + pmbuf->data_offset);
+    t_u32 length = pmbuf->data_len;
+    int actual_length;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    if (length % cardp->bulk_out_maxpktsize == 0)
+        length++;
+    /* Send the data block */
+    if ((ret = usb_bulk_msg(cardp->udev, usb_sndbulkpipe(cardp->udev,
+                                                         ep), (t_u8 *) data,
+                            length, &actual_length, timeout))) {
+        PRINTM(MERROR, "usb_blk_msg for send failed, ret %d\n", ret);
+        ret = MLAN_STATUS_FAILURE;
+    }
+    pmbuf->data_len = actual_length;
+
+    return ret;
+}
+
+/**
+ *  @brief  This function read data blocks to device
+ *
+ *  @param handle	Pointer to moal_handle structure
+ *  @param pmbuf	Pointer to mlan_buffer structure
+ *  @param ep		Endpoint to receive
+ *  @param timeout 	Timeout value in milliseconds (if 0 the wait is forever)
+ *
+ *  @return 	   	MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+woal_read_data_sync(moal_handle * handle, mlan_buffer * pmbuf, t_u8 ep,
+                    t_u32 timeout)
+{
+    struct usb_card_rec *cardp = handle->card;
+    t_u8 *data = (t_u8 *) (pmbuf->pbuf + pmbuf->data_offset);
+    t_u32 buf_len = pmbuf->data_len;
+    int actual_length;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    ENTER();
+    /* Receive the data response */
+    if ((ret = usb_bulk_msg(cardp->udev, usb_rcvbulkpipe(cardp->udev,
+                                                         ep), data,
+                            buf_len, &actual_length, timeout))) {
+        PRINTM(MERROR, "usb_bulk_msg failed: %d\n", ret);
+        ret = MLAN_STATUS_FAILURE;
+    }
+    pmbuf->data_len = actual_length;
+    DBG_HEXDUMP(MIF_D, "read sync", data, actual_length);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief  This function downloads data/command packet to device
+ *
+ *  @param handle	Pointer to moal_handle structure
+ *  @param pmbuf	Pointer to mlan_buffer structure
+ *  @param ep		Endpoint to send
+ *
+ *  @return 	   	MLAN_STATUS_PENDING or MLAN_STATUS_FAILURE or MLAN_STATUS_RESOURCE
+ */
+mlan_status
+woal_write_data_async(moal_handle * handle, mlan_buffer * pmbuf, t_u8 ep)
+{
+    struct usb_card_rec *cardp = handle->card;
+    urb_context *context = NULL;
+    t_u8 *data = (t_u8 *) (pmbuf->pbuf + pmbuf->data_offset);
+    struct urb *tx_urb = NULL;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    /* Check if device is removed */
+    if (handle->surprise_removed) {
+        PRINTM(MERROR, "Device removed\n");
+        ret = MLAN_STATUS_FAILURE;
+        goto tx_ret;
+    }
+
+    if ((ep == cardp->tx_data_ep) &&
+        (atomic_read(&cardp->tx_data_urb_pending) >= MVUSB_TX_HIGH_WMARK)) {
+        ret = MLAN_STATUS_RESOURCE;
+        goto tx_ret;
+    }
+
+    PRINTM(MINFO, "woal_write_data_async: ep=%d\n", ep);
+
+    if (ep == cardp->tx_cmd_ep) {
+        context = &cardp->tx_cmd;
+    } else {
+        if (cardp->tx_data_ix >= MVUSB_TX_HIGH_WMARK)
+            cardp->tx_data_ix = 0;
+        context = &cardp->tx_data_list[cardp->tx_data_ix++];
+    }
+
+    context->handle = handle;
+    context->ep = ep;
+    context->pmbuf = pmbuf;
+    tx_urb = context->urb;
+
+    /* 
+     * Use USB API usb_fill_bulk_urb() to set the
+     * configuration information of the Tx bulk URB
+     * and initialize the Tx callback
+     */
+    usb_fill_bulk_urb(tx_urb, cardp->udev,
+                      usb_sndbulkpipe(cardp->udev,
+                                      ep), data, pmbuf->data_len,
+                      woal_usb_tx_complete, (void *) context);
+
+    tx_urb->transfer_flags |= URB_ZERO_PACKET;
+    if (ep == cardp->tx_cmd_ep)
+        atomic_inc(&cardp->tx_cmd_urb_pending);
+    else
+        atomic_inc(&cardp->tx_data_urb_pending);
+    if (usb_submit_urb(tx_urb, GFP_ATOMIC)) {
+        /* Submit URB failure */
+        PRINTM(MERROR, "Submit Tx data URB failed: %d\n", ret);
+        if (ep == cardp->tx_cmd_ep)
+            atomic_dec(&cardp->tx_cmd_urb_pending);
+        else {
+            atomic_dec(&cardp->tx_data_urb_pending);
+            if (cardp->tx_data_ix)
+                cardp->tx_data_ix--;
+            else
+                cardp->tx_data_ix = MVUSB_TX_HIGH_WMARK;
+        }
+        ret = MLAN_STATUS_FAILURE;
+    } else {
+        if (ep == cardp->tx_data_ep &&
+            (atomic_read(&cardp->tx_data_urb_pending) == MVUSB_TX_HIGH_WMARK))
+            ret = MLAN_STATUS_PRESOURCE;
+        else
+            ret = MLAN_STATUS_SUCCESS;
+    }
+
+  tx_ret:
+    if (!ret)
+        ret = MLAN_STATUS_PENDING;
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief  This function register usb device and initialize parameter
+ *
+ *  @param handle	Pointer to moal_handle structure
+ *
+ *  @return 	   	MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+woal_register_dev(moal_handle * handle)
+{
+    struct usb_card_rec *cardp = (struct usb_card_rec *) handle->card;
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+
+    ENTER();
+
+    cardp->phandle = handle;
+    handle->hotplug_device = &(cardp->udev->dev);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function registers driver.
+ *
+ *  @return 	 MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
+ */
+mlan_status
+woal_bus_register(void)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    ENTER();
+    /* 
+     * API registers the Marvell USB driver
+     * to the USB system
+     */
+    if (usb_register(&woal_usb_driver)) {
+        PRINTM(MFATAL, "USB Driver Registration Failed \n");
+        ret = MLAN_STATUS_FAILURE;
+    }
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief This function removes usb driver.
+ *
+ *  @return 	   	N/A
+ */
+void
+woal_bus_unregister(void)
+{
+    ENTER();
+    /* API unregisters the driver from USB subsystem */
+    usb_deregister(&woal_usb_driver);
+    LEAVE();
+    return;
+}
+
+/** 
+ *  @brief This function makes USB device to suspend.
+ *  
+ *  @param handle  A pointer to moal_handle structure
+ *
+ *  @return             0 --success, otherwise fail
+ */
+int
+woal_enter_usb_suspend(moal_handle * handle)
+{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
+#ifdef CONFIG_PM
+    struct usb_device *udev = ((struct usb_card_rec *) (handle->card))->udev;
+#endif /* CONFIG_PM */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
+    struct usb_interface *intf = ((struct usb_card_rec *) (handle->card))->intf;
+#endif /* < 2.6.34 */
+#endif /* >= 2.6.24 */
+
+    ENTER();
+
+    if (handle->is_suspended == MTRUE) {
+        PRINTM(MERROR, "Device already suspended\n");
+        LEAVE();
+        return -EFAULT;
+    }
+
+    handle->suspend_wait_q_woken = MFALSE;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
+#ifdef CONFIG_PM
+    /* Enter into USB suspend */
+    usb_lock_device(udev);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38)
+    udev->autosuspend_delay = 0;        /* Autosuspend delay in jiffies */
+#else
+    pm_runtime_set_autosuspend_delay(&udev->dev, 0);    /* Autosuspend delay in 
+                                                           jiffies */
+#endif /* < 2.6.38 */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
+    udev->autosuspend_disabled = 0;     /* /sys/bus/usb/devices/.../power/level 
+                                           < auto */
+#endif /* < 2.6.34 */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)
+    udev->autoresume_disabled = 0;
+#endif /* < 2.6.33 */
+    usb_unlock_device(udev);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32)
+    intf->pm_usage_cnt = 1;
+#else
+    atomic_set(&intf->pm_usage_cnt, 1);
+#endif /* < 2.6.32 */
+    usb_autopm_put_interface(intf);
+#else
+    usb_lock_device(udev);
+    atomic_set(&udev->dev.power.usage_count, 1);
+    usb_enable_autosuspend(udev);
+    usb_unlock_device(udev);
+#endif /* < 2.6.34 */
+#endif /* >= 2.6.24 */
+#endif /* CONFIG_PM */	//lxy
+
+    /* Wait for suspend to complete */
+    wait_event_interruptible(handle->suspend_wait_q,
+                             handle->suspend_wait_q_woken);
+
+    LEAVE();
+    return 0;
+}
+
+/** 
+ *  @brief This function makes USB device to resume.
+ *  
+ *  @param handle  A pointer to moal_handle structure
+ *
+ *  @return             0 --success, otherwise fail
+ */
+int
+woal_exit_usb_suspend(moal_handle * handle)
+{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
+#ifdef CONFIG_PM
+    struct usb_device *udev = ((struct usb_card_rec *) (handle->card))->udev;
+#endif /* CONFIG_PM */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
+    struct usb_interface *intf = ((struct usb_card_rec *) (handle->card))->intf;
+#endif /* < 2.6.34 */
+#endif /* >= 2.6.24 */
+
+    ENTER();
+
+    if (handle->is_suspended == MFALSE) {
+        PRINTM(MERROR, "Device already resumed\n");
+        LEAVE();
+        return -EFAULT;
+    }
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
+#ifdef CONFIG_PM
+    /* Exit from USB suspend */
+    usb_lock_device(udev);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
+    udev->autosuspend_disabled = 1;     /* /sys/bus/usb/devices/.../power/level 
+                                           < on */
+#endif /* < 2.6.34 */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)
+    udev->autoresume_disabled = 0;
+#endif /* < 2.6.33 */
+    usb_unlock_device(udev);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32)
+    intf->pm_usage_cnt = 0;
+#else
+    atomic_set(&intf->pm_usage_cnt, 0);
+#endif /* < 2.6.32 */
+    usb_autopm_get_interface(intf);
+#else
+    usb_lock_device(udev);
+    atomic_set(&udev->dev.power.usage_count, 0);
+    usb_disable_autosuspend(udev);
+    usb_unlock_device(udev);
+#endif /* < 2.6.34 */
+#endif /* >= 2.6.24 */
+#endif /* CONFIG_PM */	//lxy
+
+    LEAVE();
+    return 0;
+}
+
+/**
+ *  @brief This function will submit rx urb.
+ *
+ *  @param handle   Pointer to moal_handle
+ *  @param ep       Endpoint to re-submit urb
+ *
+ *  @return 	   	N/A
+ */
+void
+woal_submit_rx_urb(moal_handle * handle, t_u8 ep)
+{
+    struct usb_card_rec *cardp = (struct usb_card_rec *) handle->card;
+
+    ENTER();
+
+    if ((ep == cardp->rx_cmd_ep) && (!atomic_read(&cardp->rx_cmd_urb_pending))) {
+        woal_usb_submit_rx_urb(&cardp->rx_cmd, MLAN_RX_CMD_BUF_SIZE);
+    }
+
+    LEAVE();
+    return;
+}
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_usb.h linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_usb.h
--- linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_usb.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_usb.h	2017-09-23 03:42:50.174674587 +0800
@@ -0,0 +1,135 @@
+/** @file moal_usb.h
+  *
+  * @brief This file contains definitions for USB interface.
+  * driver. 
+  *
+  * Copyright (C) 2008-2011, Marvell International Ltd. 
+  * 
+  * This software file (the "File") is distributed by Marvell International 
+  * Ltd. under the terms of the GNU General Public License Version 2, June 1991 
+  * (the "License").  You may use, redistribute and/or modify this File in 
+  * accordance with the terms and conditions of the License, a copy of which 
+  * is available by writing to the Free Software Foundation, Inc.,
+  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
+  * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
+  *
+  * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 
+  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 
+  * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about 
+  * this warranty disclaimer.
+  *
+  */
+/*************************************************************
+Change Log:
+    10/21/2008: initial version
+************************************************************/
+
+#ifndef _MOAL_USB_H
+#define _MOAL_USB_H
+
+/** USB VID 1 */
+#define USB8782_VID_1	0x1286
+/** USB PID 1 */
+#define USB8782_PID_1	0x2040
+
+/** High watermark for Tx data */
+#define MVUSB_TX_HIGH_WMARK    6
+
+/** Number of Rx data URB */
+#define MVUSB_RX_DATA_URB   6
+
+#ifdef STA_SUPPORT
+/** Default firmaware name */
+
+#define DEFAULT_FW_NAME "mrvl/usb8782_uapsta.bin"
+
+#ifndef DEFAULT_FW_NAME
+#define DEFAULT_FW_NAME ""
+#endif
+#endif /* STA_SUPPORT */
+
+#ifdef UAP_SUPPORT
+/** Default firmaware name */
+
+#define DEFAULT_AP_FW_NAME "mrvl/usb8782_uapsta.bin"
+
+#ifndef DEFAULT_AP_FW_NAME
+#define DEFAULT_AP_FW_NAME ""
+#endif
+#endif /* UAP_SUPPORT */
+
+/** Default firmaware name */
+
+#define DEFAULT_AP_STA_FW_NAME "mrvl/usb8782_uapsta.bin"
+
+#ifndef DEFAULT_AP_STA_FW_NAME
+#define DEFAULT_AP_STA_FW_NAME ""
+#endif
+
+/** urb context */
+typedef struct _urb_context
+{
+        /** Pointer to moal_handle structure */
+    moal_handle *handle;
+        /** Pointer to mlan buffer */
+    mlan_buffer *pmbuf;
+        /** URB */
+    struct urb *urb;
+        /** EP */
+    t_u8 ep;
+} urb_context;
+
+/** USB card description structure*/
+struct usb_card_rec
+{
+        /** USB device */
+    struct usb_device *udev;
+        /** MOAL handle */
+    void *phandle;
+        /** USB interface */
+    struct usb_interface *intf;
+        /** Rx data endpoint address */
+    t_u8 rx_cmd_ep;
+        /** Rx cmd contxt */
+    urb_context rx_cmd;
+        /** Rx command URB pending count */
+    atomic_t rx_cmd_urb_pending;
+        /** Rx data context list */
+    urb_context rx_data_list[MVUSB_RX_DATA_URB];
+        /** Rx data endpoint address */
+    t_u8 rx_data_ep;
+        /** Rx data URB pending count */
+    atomic_t rx_data_urb_pending;
+        /** Tx data endpoint address */
+    t_u8 tx_data_ep;
+        /** Tx command endpoint address */
+    t_u8 tx_cmd_ep;
+        /** Tx data URB pending count */
+    atomic_t tx_data_urb_pending;
+        /** Tx command URB pending count */
+    atomic_t tx_cmd_urb_pending;
+        /** Bulk out max packet size */
+    int bulk_out_maxpktsize;
+        /** Pre-allocated urb for command */
+    urb_context tx_cmd;
+        /** Index to point to next data urb to use */
+    int tx_data_ix;
+        /** Pre-allocated urb for data */
+    urb_context tx_data_list[MVUSB_TX_HIGH_WMARK];
+};
+
+mlan_status woal_write_data_async(moal_handle * handle, mlan_buffer * pmbuf,
+                                  t_u8 ep);
+mlan_status woal_write_data_sync(moal_handle * handle, mlan_buffer * pmbuf,
+                                 t_u8 ep, t_u32 timeout);
+mlan_status woal_read_data_sync(moal_handle * handle, mlan_buffer * pmbuf,
+                                t_u8 ep, t_u32 timeout);
+mlan_status woal_usb_submit_rx_data_urbs(moal_handle * handle);
+mlan_status woal_usb_rx_init(moal_handle * handle);
+mlan_status woal_usb_tx_init(moal_handle * handle);
+void woal_submit_rx_urb(moal_handle * handle, t_u8 ep);
+void woal_bus_unregister(void);
+mlan_status woal_bus_register(void);
+mlan_status woal_register_dev(moal_handle * handle);
+void woal_usb_free(struct usb_card_rec *cardp);
+#endif /*_MOAL_USB_H */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_wext.c linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_wext.c
--- linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_wext.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_wext.c	2017-09-23 03:42:50.178674575 +0800
@@ -0,0 +1,3569 @@
+/** @file  moal_wext.c
+  *
+  * @brief This file contains wireless extension standard ioctl functions
+  *
+  * Copyright (C) 2008-2011, Marvell International Ltd.
+  *
+  * This software file (the "File") is distributed by Marvell International
+  * Ltd. under the terms of the GNU General Public License Version 2, June 1991
+  * (the "License").  You may use, redistribute and/or modify this File in
+  * accordance with the terms and conditions of the License, a copy of which
+  * is available by writing to the Free Software Foundation, Inc.,
+  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
+  * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
+  *
+  * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
+  * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about
+  * this warranty disclaimer.
+  *
+  */
+
+/************************************************************************
+Change log:
+    10/21/2008: initial version
+************************************************************************/
+
+#include        "moal_main.h"
+
+#ifdef STA_SUPPORT
+/** Approximate amount of data needed to pass a scan result back to iwlist */
+#define MAX_SCAN_CELL_SIZE  (IW_EV_ADDR_LEN             \
+                             + MLAN_MAX_SSID_LENGTH   \
+                             + IW_EV_UINT_LEN           \
+                             + IW_EV_FREQ_LEN           \
+                             + IW_EV_QUAL_LEN           \
+                             + MLAN_MAX_SSID_LENGTH    \
+                             + IW_EV_PARAM_LEN          \
+                             + 40)      /* 40 for WPAIE */
+/** Macro for minimum size of scan buffer */
+#define MIN_ACCEPTED_GET_SCAN_BUF 8000
+/** Macro for maximum size of scan response buffer */
+#define MAX_SCAN_RSP_BUF (16 * 1024)
+
+/********************************************************
+                Global Variables
+********************************************************/
+
+/********************************************************
+                Local Functions
+********************************************************/
+/**
+ *  @brief This function validates a SSID as being able to be printed
+ *
+ *  @param pssid   SSID structure to validate
+ *
+ *  @return        MTRUE or MFALSE
+ */
+static BOOLEAN
+woal_ssid_valid(mlan_802_11_ssid * pssid)
+{
+#if 0
+    unsigned int ssid_idx;
+
+    ENTER();
+
+    for (ssid_idx = 0; ssid_idx < pssid->ssid_len; ssid_idx++) {
+        if ((pssid->ssid[ssid_idx] < 0x20) || (pssid->ssid[ssid_idx] > 0x7e)) {
+            LEAVE();
+            return MFALSE;
+        }
+    }
+    LEAVE();
+#endif
+    return MTRUE;
+}
+
+/**
+ *  @brief Compare two SSIDs
+ *
+ *  @param ssid1    A pointer to ssid to compare
+ *  @param ssid2    A pointer to ssid to compare
+ *
+ *  @return         0--ssid is same, otherwise is different
+ */
+static t_s32
+woal_ssid_cmp(mlan_802_11_ssid * ssid1, mlan_802_11_ssid * ssid2)
+{
+    ENTER();
+
+    if (!ssid1 || !ssid2) {
+        LEAVE();
+        return -1;
+    }
+    if (ssid1->ssid_len != ssid2->ssid_len) {
+        LEAVE();
+        return -1;
+    }
+
+    LEAVE();
+    return memcmp(ssid1->ssid, ssid2->ssid, ssid1->ssid_len);
+}
+
+/**
+ *  @brief Sort Channels
+ *
+ *  @param freq                 A pointer to iw_freq structure
+ *  @param num                  Number of Channels
+ *
+ *  @return                     N/A
+ */
+static inline void
+woal_sort_channels(struct iw_freq *freq, int num)
+{
+    int i, j;
+    struct iw_freq temp;
+
+    for (i = 0; i < num; i++)
+        for (j = i + 1; j < num; j++)
+            if (freq[i].i > freq[j].i) {
+                temp.i = freq[i].i;
+                temp.m = freq[i].m;
+
+                freq[i].i = freq[j].i;
+                freq[i].m = freq[j].m;
+
+                freq[j].i = temp.i;
+                freq[j].m = temp.m;
+            }
+}
+
+/**
+ *  @brief Convert RSSI to quality
+ *
+ *  @param rssi     RSSI in dBm
+ *
+ *  @return         Quality of the link (0-5)
+ */
+static t_u8
+woal_rssi_to_quality(t_s16 rssi)
+{
+/** Macro for RSSI range */
+#define MOAL_RSSI_NO_SIGNAL -90
+#define MOAL_RSSI_VERY_LOW  -80
+#define MOAL_RSSI_LOW       -70
+#define MOAL_RSSI_GOOD      -60
+#define MOAL_RSSI_VERY_GOOD -50
+#define MOAL_RSSI_INVALID   0
+    if (rssi <= MOAL_RSSI_NO_SIGNAL || rssi == MOAL_RSSI_INVALID)
+        return 0;
+    else if (rssi <= MOAL_RSSI_VERY_LOW)
+        return 1;
+    else if (rssi <= MOAL_RSSI_LOW)
+        return 2;
+    else if (rssi <= MOAL_RSSI_GOOD)
+        return 3;
+    else if (rssi <= MOAL_RSSI_VERY_GOOD)
+        return 4;
+    else
+        return 5;
+}
+
+/**
+ *  @brief Set Adapter Node Name
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param dwrq                 A pointer to iw_point structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_set_nick(struct net_device *dev, struct iw_request_info *info,
+              struct iw_point *dwrq, char *extra)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    ENTER();
+    /* 
+     * Check the size of the string
+     */
+    if (dwrq->length > 16) {
+        LEAVE();
+        return -E2BIG;
+    }
+    memset(priv->nick_name, 0, sizeof(priv->nick_name));
+    memcpy(priv->nick_name, extra, dwrq->length);
+    LEAVE();
+    return 0;
+}
+
+/**
+ *  @brief Get Adapter Node Name
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param dwrq                 A pointer to iw_point structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success
+ */
+static int
+woal_get_nick(struct net_device *dev, struct iw_request_info *info,
+              struct iw_point *dwrq, char *extra)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    ENTER();
+    /* 
+     * Get the Nick Name saved
+     */
+    strncpy(extra, (char *) priv->nick_name, 16);
+    extra[16] = '\0';
+    /* 
+     * If none, we may want to get the one that was set
+     */
+
+    /* 
+     * Push it out !
+     */
+    dwrq->length = strlen(extra) + 1;
+    LEAVE();
+    return 0;
+}
+
+/**
+ *  @brief Commit handler: called after a bunch of SET operations
+ *
+ *  @param dev          A pointer to net_device structure
+ *  @param info         A pointer to iw_request_info structure
+ *  @param cwrq         A pointer to char buffer
+ *  @param extra        A pointer to extra data buf
+ *
+ *  @return             0 --success
+ */
+static int
+woal_config_commit(struct net_device *dev,
+                   struct iw_request_info *info, char *cwrq, char *extra)
+{
+    ENTER();
+
+    LEAVE();
+    return 0;
+}
+
+/**
+ *  @brief Get name
+ *
+ *  @param dev          A pointer to net_device structure
+ *  @param info         A pointer to iw_request_info structure
+ *  @param cwrq         A pointer to char buffer
+ *  @param extra        A pointer to extra data buf
+ *
+ *  @return             0 --success
+ */
+static int
+woal_get_name(struct net_device *dev, struct iw_request_info *info,
+              char *cwrq, char *extra)
+{
+    ENTER();
+    strcpy(cwrq, "IEEE 802.11-DS");
+    LEAVE();
+    return 0;
+}
+
+/**
+ *  @brief Set frequency
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param fwrq                 A pointer to iw_freq structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_set_freq(struct net_device *dev, struct iw_request_info *info,
+              struct iw_freq *fwrq, char *extra)
+{
+    int ret = 0;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_ds_bss *bss = NULL;
+    mlan_ioctl_req *req = NULL;
+
+    ENTER();
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_bss));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    bss = (mlan_ds_bss *) req->pbuf;
+    /* 
+     * If setting by frequency, convert to a channel 
+     */
+    if (fwrq->e == 1) {
+        long f = fwrq->m / 100000;
+        bss->param.bss_chan.freq = f;
+    } else
+        bss->param.bss_chan.channel = fwrq->m;
+
+    bss->sub_command = MLAN_OID_BSS_CHANNEL;
+    req->req_id = MLAN_IOCTL_BSS;
+    req->action = MLAN_ACT_SET;
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    if (MLAN_STATUS_SUCCESS !=
+        woal_change_adhoc_chan(priv, bss->param.bss_chan.channel))
+        ret = -EFAULT;
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Get frequency
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param fwrq                 A pointer to iw_freq structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_get_freq(struct net_device *dev, struct iw_request_info *info,
+              struct iw_freq *fwrq, char *extra)
+{
+    int ret = 0;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_ds_bss *bss = NULL;
+    mlan_ioctl_req *req = NULL;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_bss));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    bss = (mlan_ds_bss *) req->pbuf;
+    bss->sub_command = MLAN_OID_BSS_CHANNEL;
+    req->req_id = MLAN_IOCTL_BSS;
+    req->action = MLAN_ACT_GET;
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    fwrq->m = (long) bss->param.bss_chan.freq * 100000;
+    fwrq->i = (long) bss->param.bss_chan.channel;
+    fwrq->e = 1;
+    fwrq->flags = IW_FREQ_FIXED;
+  done:
+    if (req)
+        kfree(req);
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set wlan mode
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param uwrq                 Wireless mode to set
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_set_bss_mode(struct net_device *dev, struct iw_request_info *info,
+                  t_u32 * uwrq, char *extra)
+{
+    int ret = 0;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_ds_bss *bss = NULL;
+    mlan_ioctl_req *req = NULL;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_bss));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    bss = (mlan_ds_bss *) req->pbuf;
+    bss->sub_command = MLAN_OID_BSS_MODE;
+    req->req_id = MLAN_IOCTL_BSS;
+    req->action = MLAN_ACT_SET;
+
+    switch (*uwrq) {
+    case IW_MODE_INFRA:
+        bss->param.bss_mode = MLAN_BSS_MODE_INFRA;
+        break;
+    case IW_MODE_ADHOC:
+        bss->param.bss_mode = MLAN_BSS_MODE_IBSS;
+        break;
+    case IW_MODE_AUTO:
+        bss->param.bss_mode = MLAN_BSS_MODE_AUTO;
+        break;
+    default:
+        ret = -EINVAL;
+        break;
+    }
+    if (ret)
+        goto done;
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Get current BSSID
+ *
+ *  @param dev          A pointer to net_device structure
+ *  @param info         A pointer to iw_request_info structure
+ *  @param awrq         A pointer to sockaddr structure
+ *  @param extra        A pointer to extra data buf
+ *
+ *  @return             0 --success
+ */
+static int
+woal_get_wap(struct net_device *dev, struct iw_request_info *info,
+             struct sockaddr *awrq, char *extra)
+{
+    int ret = 0;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_bss_info bss_info;
+
+    ENTER();
+
+    memset(&bss_info, 0, sizeof(bss_info));
+
+    woal_get_bss_info(priv, MOAL_IOCTL_WAIT, &bss_info);
+
+    if (bss_info.media_connected == MTRUE) {
+        memcpy(awrq->sa_data, &bss_info.bssid, MLAN_MAC_ADDR_LENGTH);
+    } else {
+        memset(awrq->sa_data, 0, MLAN_MAC_ADDR_LENGTH);
+    }
+    awrq->sa_family = ARPHRD_ETHER;
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Connect to the AP or Ad-hoc Network with specific bssid
+ *
+ * NOTE: Scan should be issued by application before this function is called
+ *
+ *  @param dev          A pointer to net_device structure
+ *  @param info         A pointer to iw_request_info structure
+ *  @param awrq         A pointer to iw_param structure
+ *  @param extra        A pointer to extra data buf
+ *
+ *  @return             0 --success, otherwise fail
+ */
+static int
+woal_set_wap(struct net_device *dev, struct iw_request_info *info,
+             struct sockaddr *awrq, char *extra)
+{
+    int ret = 0;
+    const t_u8 bcast[MLAN_MAC_ADDR_LENGTH] = { 255, 255, 255, 255, 255, 255 };
+    const t_u8 zero_mac[MLAN_MAC_ADDR_LENGTH] = { 0, 0, 0, 0, 0, 0 };
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_ssid_bssid ssid_bssid;
+    mlan_bss_info bss_info;
+
+    ENTER();
+
+    if (awrq->sa_family != ARPHRD_ETHER) {
+        ret = -EINVAL;
+        goto done;
+    }
+
+    PRINTM(MINFO, "ASSOC: WAP: sa_data: %02x:%02x:%02x:%02x:%02x:%02x\n",
+           (t_u8) awrq->sa_data[0], (t_u8) awrq->sa_data[1],
+           (t_u8) awrq->sa_data[2], (t_u8) awrq->sa_data[3],
+           (t_u8) awrq->sa_data[4], (t_u8) awrq->sa_data[5]);
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_get_bss_info(priv, MOAL_IOCTL_WAIT, &bss_info)) {
+        ret = -EFAULT;
+        goto done;
+    }
+#ifdef REASSOCIATION
+    /* Cancel re-association */
+    priv->reassoc_required = MFALSE;
+#endif
+
+    /* zero_mac means disconnect */
+    if (!memcmp(zero_mac, awrq->sa_data, MLAN_MAC_ADDR_LENGTH)) {
+        woal_disconnect(priv, MOAL_IOCTL_WAIT, NULL);
+        goto done;
+    }
+
+    /* Broadcast MAC means search for best network */
+    memset(&ssid_bssid, 0, sizeof(mlan_ssid_bssid));
+
+    if (memcmp(bcast, awrq->sa_data, MLAN_MAC_ADDR_LENGTH)) {
+        /* Check if we are already assoicated to the AP */
+        if (bss_info.media_connected == MTRUE) {
+            if (!memcmp(awrq->sa_data, &bss_info.bssid, ETH_ALEN))
+                goto done;
+            /* disconnect before try to assoicate to the new AP */
+            woal_disconnect(priv, MOAL_IOCTL_WAIT, NULL);
+        }
+        memcpy(&ssid_bssid.bssid, awrq->sa_data, ETH_ALEN);
+    }
+
+    if (MLAN_STATUS_SUCCESS != woal_find_best_network(priv,
+                                                      MOAL_IOCTL_WAIT,
+                                                      &ssid_bssid)) {
+        PRINTM(MERROR, "ASSOC: WAP: MAC address not found in BSSID List\n");
+        ret = -ENETUNREACH;
+        goto done;
+    }
+    /* Zero SSID implies use BSSID to connect */
+    memset(&ssid_bssid.ssid, 0, sizeof(mlan_802_11_ssid));
+    if (MLAN_STATUS_SUCCESS != woal_bss_start(priv,
+                                              MOAL_IOCTL_WAIT, &ssid_bssid)) {
+        ret = -EFAULT;
+        goto done;
+    }
+#ifdef REASSOCIATION
+    memset(&bss_info, 0, sizeof(bss_info));
+    if (MLAN_STATUS_SUCCESS != woal_get_bss_info(priv,
+                                                 MOAL_IOCTL_WAIT, &bss_info)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    memcpy(&priv->prev_ssid_bssid.ssid, &bss_info.ssid,
+           sizeof(mlan_802_11_ssid));
+    memcpy(&priv->prev_ssid_bssid.bssid, &bss_info.bssid, MLAN_MAC_ADDR_LENGTH);
+#endif /* REASSOCIATION */
+
+  done:
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Get wlan mode
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param uwrq                 A pointer to t_u32 string
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success
+ */
+static int
+woal_get_bss_mode(struct net_device *dev, struct iw_request_info *info,
+                  t_u32 * uwrq, char *extra)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    ENTER();
+    *uwrq = woal_get_mode(priv, MOAL_IOCTL_WAIT);
+    LEAVE();
+    return 0;
+}
+
+/**
+ *  @brief Set sensitivity
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param vwrq                 A pointer to iw_param structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success
+ */
+static int
+woal_set_sens(struct net_device *dev, struct iw_request_info *info,
+              struct iw_param *vwrq, char *extra)
+{
+    int ret = 0;
+
+    ENTER();
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Get sensitivity
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param vwrq                 A pointer to iw_param structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     -1
+ */
+static int
+woal_get_sens(struct net_device *dev, struct iw_request_info *info,
+              struct iw_param *vwrq, char *extra)
+{
+    int ret = -1;
+
+    ENTER();
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set Tx power
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param vwrq                 A pointer to iw_param structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_set_txpow(struct net_device *dev, struct iw_request_info *info,
+               struct iw_param *vwrq, char *extra)
+{
+    int ret = 0;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_power_cfg_t power_cfg;
+
+    ENTER();
+    if (vwrq->disabled) {
+        woal_set_radio(priv, 0);
+        goto done;
+    }
+    woal_set_radio(priv, 1);
+
+    if (!vwrq->fixed)
+        power_cfg.is_power_auto = 1;
+    else {
+        power_cfg.is_power_auto = 0;
+        power_cfg.power_level = vwrq->value;
+    }
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_set_get_tx_power(priv, MLAN_ACT_SET, &power_cfg)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Get Tx power
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param vwrq                 A pointer to iw_param structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_get_txpow(struct net_device *dev, struct iw_request_info *info,
+               struct iw_param *vwrq, char *extra)
+{
+    int ret = 0;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_power_cfg_t power_cfg;
+    mlan_bss_info bss_info;
+
+    ENTER();
+
+    memset(&power_cfg, 0, sizeof(mlan_power_cfg_t));
+    memset(&bss_info, 0, sizeof(bss_info));
+    woal_get_bss_info(priv, MOAL_IOCTL_WAIT, &bss_info);
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_set_get_tx_power(priv, MLAN_ACT_GET, &power_cfg)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    vwrq->value = power_cfg.power_level;
+    if (power_cfg.is_power_auto)
+        vwrq->fixed = 0;
+    else
+        vwrq->fixed = 1;
+    if (bss_info.radio_on) {
+        vwrq->disabled = 0;
+        vwrq->flags = IW_TXPOW_DBM;
+    } else {
+        vwrq->disabled = 1;
+    }
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief  Set power management 
+ *   
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param vwrq                 A pointer to iw_param structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static int
+woal_set_power(struct net_device *dev, struct iw_request_info *info,
+               struct iw_param *vwrq, char *extra)
+{
+    int ret = 0, disabled;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+
+    ENTER();
+
+    disabled = vwrq->disabled;
+
+    if (MLAN_STATUS_SUCCESS != woal_set_get_power_mgmt(priv,
+                                                       MLAN_ACT_SET, &disabled,
+                                                       vwrq->flags)) {
+        ret = -EFAULT;
+    }
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief  Get power management 
+ *   
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param vwrq                 A pointer to iw_param structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     MLAN_STATUS_SUCCESS --success, otherwise fail
+ */
+static int
+woal_get_power(struct net_device *dev, struct iw_request_info *info,
+               struct iw_param *vwrq, char *extra)
+{
+    int ret = 0, ps_mode;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+
+    ENTER();
+
+    if (MLAN_STATUS_SUCCESS != woal_set_get_power_mgmt(priv,
+                                                       MLAN_ACT_GET, &ps_mode,
+                                                       0)) {
+        ret = -EFAULT;
+    }
+
+    if (ps_mode)
+        vwrq->disabled = 0;
+    else
+        vwrq->disabled = 1;
+
+    vwrq->value = 0;
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set Tx retry count
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param vwrq                 A pointer to iw_param structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_set_retry(struct net_device *dev, struct iw_request_info *info,
+               struct iw_param *vwrq, char *extra)
+{
+    int ret = 0, retry_val = vwrq->value;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+
+    ENTER();
+
+    if (vwrq->flags == IW_RETRY_LIMIT) {
+        /* 
+         * The MAC has a 4-bit Total_Tx_Count register
+         * Total_Tx_Count = 1 + Tx_Retry_Count
+         */
+
+        if (MLAN_STATUS_SUCCESS !=
+            woal_set_get_retry(priv, MLAN_ACT_SET,
+                               MOAL_IOCTL_WAIT, &retry_val)) {
+            ret = -EFAULT;
+            goto done;
+        }
+    } else {
+        ret = -EOPNOTSUPP;
+        goto done;
+    }
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Get Tx retry count
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param vwrq                 A pointer to iw_param structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_get_retry(struct net_device *dev, struct iw_request_info *info,
+               struct iw_param *vwrq, char *extra)
+{
+    int retry_val, ret = 0;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_set_get_retry(priv, MLAN_ACT_GET, MOAL_IOCTL_WAIT, &retry_val)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    vwrq->disabled = 0;
+    if (!vwrq->flags) {
+        vwrq->flags = IW_RETRY_LIMIT;
+        /* Get Tx retry count */
+        vwrq->value = retry_val;
+    }
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set encryption key
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param dwrq                 A pointer to iw_point structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_set_encode(struct net_device *dev, struct iw_request_info *info,
+                struct iw_point *dwrq, char *extra)
+{
+    int ret = 0;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_ds_sec_cfg *sec = NULL;
+    mlan_ioctl_req *req = NULL;
+    int index = 0;
+    t_u32 auth_mode = 0;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_sec_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    sec = (mlan_ds_sec_cfg *) req->pbuf;
+    sec->sub_command = MLAN_OID_SEC_CFG_ENCRYPT_KEY;
+    req->req_id = MLAN_IOCTL_SEC_CFG;
+    req->action = MLAN_ACT_SET;
+
+    /* Check index */
+    index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
+    if (index > 3) {
+        PRINTM(MERROR, "Key index #%d out of range\n", index);
+        ret = -EINVAL;
+        goto done;
+    }
+
+    sec->param.encrypt_key.key_len = 0;
+    if (!(dwrq->flags & IW_ENCODE_NOKEY) && dwrq->length) {
+        if (dwrq->length > MAX_WEP_KEY_SIZE) {
+            PRINTM(MERROR, "Key length (%d) out of range\n", dwrq->length);
+            ret = -EINVAL;
+            goto done;
+        }
+        if (index < 0)
+            sec->param.encrypt_key.key_index = MLAN_KEY_INDEX_DEFAULT;
+        else
+            sec->param.encrypt_key.key_index = index;
+        memcpy(sec->param.encrypt_key.key_material, extra, dwrq->length);
+        /* Set the length */
+        if (dwrq->length > MIN_WEP_KEY_SIZE)
+            sec->param.encrypt_key.key_len = MAX_WEP_KEY_SIZE;
+        else
+            sec->param.encrypt_key.key_len = MIN_WEP_KEY_SIZE;
+    } else {
+        /* 
+         * No key provided so it is either enable key, 
+         * on or off
+         */
+        if (dwrq->flags & IW_ENCODE_DISABLED) {
+            PRINTM(MINFO, "*** iwconfig mlanX key off ***\n");
+            sec->param.encrypt_key.key_disable = MTRUE;
+        } else {
+            /* 
+             * iwconfig mlanX key [n]
+             * iwconfig mlanX key on 
+             * iwconfig mlanX key open
+             * iwconfig mlanX key restricted
+             * Do we want to just set the transmit key index ? 
+             */
+            if (index < 0) {
+                PRINTM(MINFO, "*** iwconfig mlanX key on ***\n");
+                sec->param.encrypt_key.key_index = MLAN_KEY_INDEX_DEFAULT;
+            } else
+                sec->param.encrypt_key.key_index = index;
+            sec->param.encrypt_key.is_current_wep_key = MTRUE;
+        }
+    }
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    if (dwrq->flags & (IW_ENCODE_RESTRICTED | IW_ENCODE_OPEN)) {
+        switch (dwrq->flags & 0xf000) {
+        case IW_ENCODE_RESTRICTED:
+            /* iwconfig mlanX restricted key [1] */
+            auth_mode = MLAN_AUTH_MODE_SHARED;
+            PRINTM(MINFO, "Auth mode restricted!\n");
+            break;
+        case IW_ENCODE_OPEN:
+            /* iwconfig mlanX key [2] open */
+            auth_mode = MLAN_AUTH_MODE_OPEN;
+            PRINTM(MINFO, "Auth mode open!\n");
+            break;
+        case IW_ENCODE_RESTRICTED | IW_ENCODE_OPEN:
+        default:
+            /* iwconfig mlanX key [2] open restricted */
+            auth_mode = MLAN_AUTH_MODE_AUTO;
+            PRINTM(MINFO, "Auth mode auto!\n");
+            break;
+        }
+        if (MLAN_STATUS_SUCCESS !=
+            woal_set_auth_mode(priv, MOAL_IOCTL_WAIT, auth_mode))
+            ret = -EFAULT;
+    }
+  done:
+    if (req)
+        kfree(req);
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Get encryption key
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param dwrq                 A pointer to iw_point structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_get_encode(struct net_device *dev, struct iw_request_info *info,
+                struct iw_point *dwrq, char *extra)
+{
+    int ret = 0;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_ds_sec_cfg *sec = NULL;
+    mlan_ioctl_req *req = NULL;
+    t_u32 auth_mode;
+    int index = (dwrq->flags & IW_ENCODE_INDEX);
+
+    ENTER();
+    if (index < 0 || index > 4) {
+        PRINTM(MERROR, "Key index #%d out of range\n", index);
+        ret = -EINVAL;
+        goto done;
+    }
+    if (MLAN_STATUS_SUCCESS !=
+        woal_get_auth_mode(priv, MOAL_IOCTL_WAIT, &auth_mode)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    dwrq->flags = 0;
+    /* 
+     * Check encryption mode 
+     */
+    switch (auth_mode) {
+    case MLAN_AUTH_MODE_OPEN:
+        dwrq->flags = IW_ENCODE_OPEN;
+        break;
+
+    case MLAN_AUTH_MODE_SHARED:
+    case MLAN_AUTH_MODE_NETWORKEAP:
+        dwrq->flags = IW_ENCODE_RESTRICTED;
+        break;
+
+    case MLAN_AUTH_MODE_AUTO:
+        dwrq->flags = IW_ENCODE_OPEN | IW_ENCODE_RESTRICTED;
+        break;
+
+    default:
+        dwrq->flags = IW_ENCODE_DISABLED | IW_ENCODE_OPEN;
+        break;
+    }
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_sec_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    sec = (mlan_ds_sec_cfg *) req->pbuf;
+    sec->sub_command = MLAN_OID_SEC_CFG_ENCRYPT_KEY;
+    req->req_id = MLAN_IOCTL_SEC_CFG;
+    req->action = MLAN_ACT_GET;
+
+    if (!index)
+        sec->param.encrypt_key.key_index = MLAN_KEY_INDEX_DEFAULT;
+    else
+        sec->param.encrypt_key.key_index = index - 1;
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    memset(extra, 0, 16);
+    if (sec->param.encrypt_key.key_len) {
+        memcpy(extra, sec->param.encrypt_key.key_material,
+               sec->param.encrypt_key.key_len);
+        dwrq->length = sec->param.encrypt_key.key_len;
+        dwrq->flags |= (sec->param.encrypt_key.key_index + 1);
+        dwrq->flags &= ~IW_ENCODE_DISABLED;
+    } else if (sec->param.encrypt_key.key_disable)
+        dwrq->flags |= IW_ENCODE_DISABLED;
+    else
+        dwrq->flags &= ~IW_ENCODE_DISABLED;
+
+    dwrq->flags |= IW_ENCODE_NOKEY;
+  done:
+    if (req)
+        kfree(req);
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set data rate
+ *
+ *  @param dev          A pointer to net_device structure
+ *  @param info         A pointer to iw_request_info structure
+ *  @param vwrq         A pointer to iw_param structure
+ *  @param extra        A pointer to extra data buf
+ *
+ *  @return             0 --success, otherwise fail
+ */
+static int
+woal_set_rate(struct net_device *dev, struct iw_request_info *info,
+              struct iw_param *vwrq, char *extra)
+{
+    int ret = 0;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_ds_rate *rate = NULL;
+    mlan_ioctl_req *req = NULL;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_rate));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    rate = (mlan_ds_rate *) req->pbuf;
+    rate->sub_command = MLAN_OID_RATE_CFG;
+    req->req_id = MLAN_IOCTL_RATE;
+    req->action = MLAN_ACT_SET;
+    if (vwrq->value == -1) {
+        rate->param.rate_cfg.is_rate_auto = 1;
+    } else {
+        rate->param.rate_cfg.is_rate_auto = 0;
+        rate->param.rate_cfg.rate_type = MLAN_RATE_VALUE;
+        rate->param.rate_cfg.rate = vwrq->value / 500000;
+    }
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Get data rate
+ *
+ *  @param dev          A pointer to net_device structure
+ *  @param info         A pointer to iw_request_info structure
+ *  @param vwrq         A pointer to iw_param structure
+ *  @param extra        A pointer to extra data buf
+ *
+ *  @return             0 --success, otherwise fail
+ */
+static int
+woal_get_rate(struct net_device *dev, struct iw_request_info *info,
+              struct iw_param *vwrq, char *extra)
+{
+    int ret = 0;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_ds_rate *rate = NULL;
+    mlan_ioctl_req *req = NULL;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_rate));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+
+    rate = (mlan_ds_rate *) req->pbuf;
+    rate->param.rate_cfg.rate_type = MLAN_RATE_VALUE;
+    rate->sub_command = MLAN_OID_RATE_CFG;
+    req->req_id = MLAN_IOCTL_RATE;
+    req->action = MLAN_ACT_GET;
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    if (rate->param.rate_cfg.is_rate_auto)
+        vwrq->fixed = 0;
+    else
+        vwrq->fixed = 1;
+    vwrq->value = rate->param.rate_cfg.rate * 500000;
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set RTS threshold
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param vwrq                 A pointer to iw_param structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_set_rts(struct net_device *dev, struct iw_request_info *info,
+             struct iw_param *vwrq, char *extra)
+{
+    int ret = 0;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    int rthr = vwrq->value;
+
+    ENTER();
+
+    if (vwrq->disabled) {
+        rthr = MLAN_RTS_MAX_VALUE;
+    } else {
+        if (rthr < MLAN_RTS_MIN_VALUE || rthr > MLAN_RTS_MAX_VALUE) {
+            ret = -EINVAL;
+            goto done;
+        }
+    }
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_set_get_rts(priv, MLAN_ACT_SET, MOAL_IOCTL_WAIT, &rthr)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Get RTS threshold
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param vwrq                 A pointer to iw_param structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_get_rts(struct net_device *dev, struct iw_request_info *info,
+             struct iw_param *vwrq, char *extra)
+{
+    int rthr, ret = 0;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+
+    ENTER();
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_set_get_rts(priv, MLAN_ACT_GET, MOAL_IOCTL_WAIT, &rthr)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    vwrq->value = rthr;
+    vwrq->disabled = ((vwrq->value < MLAN_RTS_MIN_VALUE)
+                      || (vwrq->value > MLAN_RTS_MAX_VALUE));
+    vwrq->fixed = 1;
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set Fragment threshold
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param vwrq                 A pointer to iw_param structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_set_frag(struct net_device *dev, struct iw_request_info *info,
+              struct iw_param *vwrq, char *extra)
+{
+    int ret = 0;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    int fthr = vwrq->value;
+
+    ENTER();
+
+    if (vwrq->disabled) {
+        fthr = MLAN_FRAG_MAX_VALUE;
+    } else {
+        if (fthr < MLAN_FRAG_MIN_VALUE || fthr > MLAN_FRAG_MAX_VALUE) {
+            ret = -EINVAL;
+            goto done;
+        }
+    }
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_set_get_frag(priv, MLAN_ACT_SET, MOAL_IOCTL_WAIT, &fthr)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Get Fragment threshold
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param vwrq                 A pointer to iw_param structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_get_frag(struct net_device *dev, struct iw_request_info *info,
+              struct iw_param *vwrq, char *extra)
+{
+    int ret = 0, fthr;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+
+    ENTER();
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_set_get_frag(priv, MLAN_ACT_GET, MOAL_IOCTL_WAIT, &fthr)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    vwrq->value = fthr;
+    vwrq->disabled = ((vwrq->value < MLAN_FRAG_MIN_VALUE)
+                      || (vwrq->value > MLAN_FRAG_MAX_VALUE));
+    vwrq->fixed = 1;
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+#if (WIRELESS_EXT >= 18)
+/**
+ *  @brief Get IE
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param dwrq                 A pointer to iw_point structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_get_gen_ie(struct net_device *dev, struct iw_request_info *info,
+                struct iw_point *dwrq, char *extra)
+{
+    int ret = 0;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    int copy_size = 0, ie_len;
+    t_u8 ie[MAX_IE_SIZE];
+
+    ENTER();
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_set_get_gen_ie(priv, MLAN_ACT_GET, ie, &ie_len)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    copy_size = MIN(ie_len, dwrq->length);
+    memcpy(extra, ie, copy_size);
+    dwrq->length = copy_size;
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Set IE
+ *
+ *  Pass an opaque block of data, expected to be IEEE IEs, to the driver 
+ *    for eventual passthrough to the firmware in an associate/join 
+ *    (and potentially start) command.
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param dwrq                 A pointer to iw_point structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_set_gen_ie(struct net_device *dev, struct iw_request_info *info,
+                struct iw_point *dwrq, char *extra)
+{
+    int ret = 0;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    int ie_len = dwrq->length;
+    const t_u8 wps_oui[] = { 0x00, 0x50, 0xf2, 0x04 };
+    mlan_ds_wps_cfg *pwps = NULL;
+    mlan_ioctl_req *req = NULL;
+
+    ENTER();
+
+    /* extra + 2 to skip element id and length */
+    if (!memcmp((t_u8 *) (extra + 2), wps_oui, sizeof(wps_oui))) {
+        req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_wps_cfg));
+        if (req == NULL) {
+            ret = -ENOMEM;
+            goto done;
+        }
+
+        pwps = (mlan_ds_wps_cfg *) req->pbuf;
+        req->req_id = MLAN_IOCTL_WPS_CFG;
+        req->action = MLAN_ACT_SET;
+        pwps->sub_command = MLAN_OID_WPS_CFG_SESSION;
+        pwps->param.wps_session = MLAN_WPS_CFG_SESSION_START;
+
+        if (MLAN_STATUS_SUCCESS !=
+            woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+            ret = -EFAULT;
+            goto done;
+        }
+    }
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_set_get_gen_ie(priv, MLAN_ACT_SET, (t_u8 *) extra, &ie_len)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+  done:
+    if (req)
+        kfree(req);
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief  Extended version of encoding configuration 
+ *
+ *  @param dev          A pointer to net_device structure
+ *  @param info         A pointer to iw_request_info structure
+ *  @param dwrq         A pointer to iw_point structure
+ *  @param extra        A pointer to extra data buf
+ *
+ *  @return              0 --success, otherwise fail
+ */
+static int
+woal_set_encode_ext(struct net_device *dev,
+                    struct iw_request_info *info,
+                    struct iw_point *dwrq, char *extra)
+{
+    struct iw_encode_ext *ext = (struct iw_encode_ext *) extra;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    int key_index;
+    t_u8 *pkey_material = NULL;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_sec_cfg *sec = NULL;
+    int ret = 0;
+
+    ENTER();
+    key_index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
+    if (key_index < 0 || key_index > 3) {
+        ret = -EINVAL;
+        goto done;
+    }
+    if (ext->key_len > (dwrq->length - sizeof(struct iw_encode_ext))) {
+        ret = -EINVAL;
+        goto done;
+    }
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_sec_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    sec = (mlan_ds_sec_cfg *) req->pbuf;
+    sec->sub_command = MLAN_OID_SEC_CFG_ENCRYPT_KEY;
+    req->req_id = MLAN_IOCTL_SEC_CFG;
+    req->action = MLAN_ACT_SET;
+    pkey_material = (t_u8 *) (ext + 1);
+    sec->param.encrypt_key.key_len = ext->key_len;
+    memcpy(sec->param.encrypt_key.mac_addr, (u8 *) ext->addr.sa_data, ETH_ALEN);
+    /* Disable and Remove Key */
+    if ((dwrq->flags & IW_ENCODE_DISABLED) && !ext->key_len) {
+        sec->param.encrypt_key.key_remove = MTRUE;
+        sec->param.encrypt_key.key_index = key_index;
+        sec->param.encrypt_key.key_flags = KEY_FLAG_REMOVE_KEY;
+        PRINTM(MIOCTL,
+               "Remove key key_index=%d, dwrq->flags=0x%x %02x:%02x:%02x:%02x:%02x:%02x\n",
+               key_index, dwrq->flags, sec->param.encrypt_key.mac_addr[0],
+               sec->param.encrypt_key.mac_addr[1],
+               sec->param.encrypt_key.mac_addr[2],
+               sec->param.encrypt_key.mac_addr[3],
+               sec->param.encrypt_key.mac_addr[4],
+               sec->param.encrypt_key.mac_addr[5]);
+    } else if (ext->key_len <= MAX_WEP_KEY_SIZE) {
+        /* Set WEP key */
+        sec->param.encrypt_key.key_index = key_index;
+        sec->param.encrypt_key.key_flags = ext->ext_flags;
+        memcpy(sec->param.encrypt_key.key_material, pkey_material,
+               ext->key_len);
+        if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY)
+            sec->param.encrypt_key.is_current_wep_key = MTRUE;
+    } else {
+        /* Set WPA key */
+        sec->param.encrypt_key.key_index = key_index;
+        sec->param.encrypt_key.key_flags = ext->ext_flags;
+        if (ext->ext_flags & IW_ENCODE_EXT_RX_SEQ_VALID) {
+            memcpy(sec->param.encrypt_key.pn, (t_u8 *) ext->rx_seq,
+                   SEQ_MAX_SIZE);
+            DBG_HEXDUMP(MCMD_D, "Rx PN", sec->param.encrypt_key.pn,
+                        SEQ_MAX_SIZE);
+        }
+        if (ext->ext_flags & IW_ENCODE_EXT_TX_SEQ_VALID) {
+            memcpy(sec->param.encrypt_key.pn, (t_u8 *) ext->tx_seq,
+                   SEQ_MAX_SIZE);
+            DBG_HEXDUMP(MCMD_D, "Tx PN", sec->param.encrypt_key.pn,
+                        SEQ_MAX_SIZE);
+        }
+        memcpy(sec->param.encrypt_key.key_material, pkey_material,
+               ext->key_len);
+        PRINTM(MIOCTL,
+               "set wpa key key_index=%d, key_len=%d key_flags=0x%lx %02x:%02x:%02x:%02x:%02x:%02x\n",
+               key_index, ext->key_len, sec->param.encrypt_key.key_flags,
+               sec->param.encrypt_key.mac_addr[0],
+               sec->param.encrypt_key.mac_addr[1],
+               sec->param.encrypt_key.mac_addr[2],
+               sec->param.encrypt_key.mac_addr[3],
+               sec->param.encrypt_key.mac_addr[4],
+               sec->param.encrypt_key.mac_addr[5]);
+        DBG_HEXDUMP(MCMD_D, "wpa key", pkey_material, ext->key_len);
+#define IW_ENCODE_ALG_SMS4   0x20
+        /* Set WAPI key */
+        if (ext->alg == IW_ENCODE_ALG_SMS4) {
+            sec->param.encrypt_key.is_wapi_key = MTRUE;
+            memcpy(sec->param.encrypt_key.pn, (t_u8 *) ext->tx_seq, PN_SIZE);
+            DBG_HEXDUMP(MCMD_D, "WAPI PN", sec->param.encrypt_key.pn, PN_SIZE);
+        }
+    }
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT))
+        ret = -EFAULT;
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief  Extended version of encoding configuration 
+ *
+ *  @param dev          A pointer to net_device structure
+ *  @param info         A pointer to iw_request_info structure
+ *  @param dwrq         A pointer to iw_point structure
+ *  @param extra        A pointer to extra data buf
+ *
+ *  @return             -EOPNOTSUPP
+ */
+static int
+woal_get_encode_ext(struct net_device *dev,
+                    struct iw_request_info *info,
+                    struct iw_point *dwrq, char *extra)
+{
+    ENTER();
+    LEAVE();
+    return -EOPNOTSUPP;
+}
+
+/** 
+ *  @brief  Request MLME operation 
+ *
+ *  @param dev          A pointer to net_device structure
+ *  @param info         A pointer to iw_request_info structure
+ *  @param dwrq         A pointer to iw_point structure
+ *  @param extra        A pointer to extra data buf
+ *
+ *  @return             0--success, otherwise fail
+ */
+static int
+woal_set_mlme(struct net_device *dev,
+              struct iw_request_info *info, struct iw_point *dwrq, char *extra)
+{
+    struct iw_mlme *mlme = (struct iw_mlme *) extra;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    int ret = 0;
+
+    ENTER();
+    if ((mlme->cmd == IW_MLME_DEAUTH) || (mlme->cmd == IW_MLME_DISASSOC)) {
+
+        if (MLAN_STATUS_SUCCESS !=
+            woal_disconnect(priv, MOAL_IOCTL_WAIT, (t_u8 *) mlme->addr.sa_data))
+            ret = -EFAULT;
+    }
+    LEAVE();
+    return ret;
+}
+
+/** @brief Set authentication mode parameters
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param vwrq                 A pointer to iw_param structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_set_auth(struct net_device *dev, struct iw_request_info *info,
+              struct iw_param *vwrq, char *extra)
+{
+    int ret = 0;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    t_u32 auth_mode = 0;
+    t_u32 encrypt_mode = 0;
+    ENTER();
+
+    switch (vwrq->flags & IW_AUTH_INDEX) {
+    case IW_AUTH_CIPHER_PAIRWISE:
+    case IW_AUTH_CIPHER_GROUP:
+        if (vwrq->value & IW_AUTH_CIPHER_NONE)
+            encrypt_mode = MLAN_ENCRYPTION_MODE_NONE;
+        else if (vwrq->value & IW_AUTH_CIPHER_WEP40)
+            encrypt_mode = MLAN_ENCRYPTION_MODE_WEP40;
+        else if (vwrq->value & IW_AUTH_CIPHER_WEP104)
+            encrypt_mode = MLAN_ENCRYPTION_MODE_WEP104;
+        else if (vwrq->value & IW_AUTH_CIPHER_TKIP)
+            encrypt_mode = MLAN_ENCRYPTION_MODE_TKIP;
+        else if (vwrq->value & IW_AUTH_CIPHER_CCMP)
+            encrypt_mode = MLAN_ENCRYPTION_MODE_CCMP;
+        if (MLAN_STATUS_SUCCESS !=
+            woal_set_encrypt_mode(priv, MOAL_IOCTL_WAIT, encrypt_mode))
+            ret = -EFAULT;
+        break;
+    case IW_AUTH_80211_AUTH_ALG:
+        switch (vwrq->value) {
+        case IW_AUTH_ALG_SHARED_KEY:
+            PRINTM(MINFO, "Auth mode shared key!\n");
+            auth_mode = MLAN_AUTH_MODE_SHARED;
+            break;
+        case IW_AUTH_ALG_LEAP:
+            PRINTM(MINFO, "Auth mode LEAP!\n");
+            auth_mode = MLAN_AUTH_MODE_NETWORKEAP;
+            break;
+        case IW_AUTH_ALG_OPEN_SYSTEM:
+            PRINTM(MINFO, "Auth mode open!\n");
+            auth_mode = MLAN_AUTH_MODE_OPEN;
+            break;
+        case IW_AUTH_ALG_SHARED_KEY | IW_AUTH_ALG_OPEN_SYSTEM:
+        default:
+            PRINTM(MINFO, "Auth mode auto!\n");
+            auth_mode = MLAN_AUTH_MODE_AUTO;
+            break;
+        }
+        if (MLAN_STATUS_SUCCESS !=
+            woal_set_auth_mode(priv, MOAL_IOCTL_WAIT, auth_mode))
+            ret = -EFAULT;
+        break;
+    case IW_AUTH_WPA_ENABLED:
+        if (MLAN_STATUS_SUCCESS !=
+            woal_set_wpa_enable(priv, MOAL_IOCTL_WAIT, vwrq->value))
+            ret = -EFAULT;
+        break;
+#define IW_AUTH_WAPI_ENABLED    0x20
+    case IW_AUTH_WAPI_ENABLED:
+        if (MLAN_STATUS_SUCCESS !=
+            woal_set_wapi_enable(priv, MOAL_IOCTL_WAIT, vwrq->value))
+            ret = -EFAULT;
+        break;
+    case IW_AUTH_WPA_VERSION:
+        /* set WPA_VERSION_DISABLED/VERSION_WPA/VERSION_WP2 */
+        priv->wpa_version = vwrq->value;
+        break;
+    case IW_AUTH_KEY_MGMT:
+        /* set KEY_MGMT_802_1X/KEY_MGMT_PSK */
+        priv->key_mgmt = vwrq->value;
+        break;
+    case IW_AUTH_TKIP_COUNTERMEASURES:
+    case IW_AUTH_DROP_UNENCRYPTED:
+    case IW_AUTH_RX_UNENCRYPTED_EAPOL:
+    case IW_AUTH_ROAMING_CONTROL:
+    case IW_AUTH_PRIVACY_INVOKED:
+        break;
+    default:
+        ret = -EOPNOTSUPP;
+        break;
+    }
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Get authentication mode parameters
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param vwrq                 A pointer to iw_param structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_get_auth(struct net_device *dev, struct iw_request_info *info,
+              struct iw_param *vwrq, char *extra)
+{
+    int ret = 0;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    t_u32 encrypt_mode = 0;
+    t_u32 auth_mode;
+    t_u32 wpa_enable;
+    ENTER();
+    switch (vwrq->flags & IW_AUTH_INDEX) {
+    case IW_AUTH_CIPHER_PAIRWISE:
+    case IW_AUTH_CIPHER_GROUP:
+        if (MLAN_STATUS_SUCCESS !=
+            woal_get_encrypt_mode(priv, MOAL_IOCTL_WAIT, &encrypt_mode))
+            ret = -EFAULT;
+        else {
+            if (encrypt_mode == MLAN_ENCRYPTION_MODE_NONE)
+                vwrq->value = IW_AUTH_CIPHER_NONE;
+            else if (encrypt_mode == MLAN_ENCRYPTION_MODE_WEP40)
+                vwrq->value = IW_AUTH_CIPHER_WEP40;
+            else if (encrypt_mode == MLAN_ENCRYPTION_MODE_TKIP)
+                vwrq->value = IW_AUTH_CIPHER_TKIP;
+            else if (encrypt_mode == MLAN_ENCRYPTION_MODE_CCMP)
+                vwrq->value = IW_AUTH_CIPHER_CCMP;
+            else if (encrypt_mode == MLAN_ENCRYPTION_MODE_WEP104)
+                vwrq->value = IW_AUTH_CIPHER_WEP104;
+        }
+        break;
+    case IW_AUTH_80211_AUTH_ALG:
+        if (MLAN_STATUS_SUCCESS !=
+            woal_get_auth_mode(priv, MOAL_IOCTL_WAIT, &auth_mode))
+            ret = -EFAULT;
+        else {
+            if (auth_mode == MLAN_AUTH_MODE_SHARED)
+                vwrq->value = IW_AUTH_ALG_SHARED_KEY;
+            else if (auth_mode == MLAN_AUTH_MODE_NETWORKEAP)
+                vwrq->value = IW_AUTH_ALG_LEAP;
+            else
+                vwrq->value = IW_AUTH_ALG_OPEN_SYSTEM;
+        }
+        break;
+    case IW_AUTH_WPA_ENABLED:
+        if (MLAN_STATUS_SUCCESS !=
+            woal_get_wpa_enable(priv, MOAL_IOCTL_WAIT, &wpa_enable))
+            ret = -EFAULT;
+        else
+            vwrq->value = wpa_enable;
+        break;
+    case IW_AUTH_WPA_VERSION:
+        vwrq->value = priv->wpa_version;
+        break;
+    case IW_AUTH_KEY_MGMT:
+        vwrq->value = priv->key_mgmt;
+        break;
+    case IW_AUTH_TKIP_COUNTERMEASURES:
+    case IW_AUTH_DROP_UNENCRYPTED:
+    case IW_AUTH_RX_UNENCRYPTED_EAPOL:
+    case IW_AUTH_ROAMING_CONTROL:
+    case IW_AUTH_PRIVACY_INVOKED:
+    default:
+        ret = -EOPNOTSUPP;
+        goto done;
+    }
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+static int
+woal_set_pmksa(struct net_device *dev, struct iw_request_info *info,
+               struct iw_param *vwrq, char *extra)
+{
+    return -EOPNOTSUPP;
+}
+
+#endif /* WE >= 18 */
+
+/* Data rate listing
+ *      MULTI_BANDS:
+ *              abg             a       b       b/g
+ *  Infra       G(12)           A(8)    B(4)    G(12)
+ *  Adhoc       A+B(12)         A(8)    B(4)    B(4)
+ *      non-MULTI_BANDS:
+                                        b       b/g
+ *  Infra                               B(4)    G(12)
+ *  Adhoc                               B(4)    B(4)
+ */
+/**
+ *  @brief Get Range Info
+ *
+ *  @param dev                  A pointer to net_device structure
+ *  @param info                 A pointer to iw_request_info structure
+ *  @param dwrq                 A pointer to iw_point structure
+ *  @param extra                A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_get_range(struct net_device *dev, struct iw_request_info *info,
+               struct iw_point *dwrq, char *extra)
+{
+    int i;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    struct iw_range *range = (struct iw_range *) extra;
+    moal_802_11_rates rates;
+    mlan_chan_list *pchan_list = NULL;
+    mlan_bss_info bss_info;
+
+    ENTER();
+
+    if (!(pchan_list = kmalloc(sizeof(mlan_chan_list), GFP_KERNEL))) {
+        LEAVE();
+        return -ENOMEM;
+    }
+
+    dwrq->length = sizeof(struct iw_range);
+    memset(range, 0, sizeof(struct iw_range));
+
+    range->min_nwid = 0;
+    range->max_nwid = 0;
+
+    memset(&rates, 0, sizeof(rates));
+    woal_get_data_rates(priv, MOAL_IOCTL_WAIT, &rates);
+    range->num_bitrates = rates.num_of_rates;
+
+    for (i = 0; i < MIN(range->num_bitrates, IW_MAX_BITRATES) && rates.rates[i];
+         i++) {
+        range->bitrate[i] = (rates.rates[i] & 0x7f) * 500000;
+    }
+    range->num_bitrates = i;
+    PRINTM(MINFO, "IW_MAX_BITRATES=%d num_bitrates=%d\n", IW_MAX_BITRATES,
+           range->num_bitrates);
+
+    range->num_frequency = 0;
+
+    memset(pchan_list, 0, sizeof(mlan_chan_list));
+
+    woal_get_channel_list(priv, MOAL_IOCTL_WAIT, pchan_list);
+
+    range->num_frequency = MIN(pchan_list->num_of_chan, IW_MAX_FREQUENCIES);
+
+    for (i = 0; i < range->num_frequency; i++) {
+        range->freq[i].i = (long) pchan_list->cf[i].channel;
+        range->freq[i].m = (long) pchan_list->cf[i].freq * 100000;
+        range->freq[i].e = 1;
+    }
+    kfree(pchan_list);
+
+    PRINTM(MINFO, "IW_MAX_FREQUENCIES=%d num_frequency=%d\n",
+           IW_MAX_FREQUENCIES, range->num_frequency);
+
+    range->num_channels = range->num_frequency;
+
+    woal_sort_channels(&range->freq[0], range->num_frequency);
+
+    /* 
+     * Set an indication of the max TCP throughput in bit/s that we can
+     * expect using this interface
+     */
+    if (i > 2)
+        range->throughput = 5000 * 1000;
+    else
+        range->throughput = 1500 * 1000;
+
+    range->min_rts = MLAN_RTS_MIN_VALUE;
+    range->max_rts = MLAN_RTS_MAX_VALUE;
+    range->min_frag = MLAN_FRAG_MIN_VALUE;
+    range->max_frag = MLAN_FRAG_MAX_VALUE;
+
+    range->encoding_size[0] = 5;
+    range->encoding_size[1] = 13;
+    range->num_encoding_sizes = 2;
+    range->max_encoding_tokens = 4;
+
+/** Minimum power period */
+#define IW_POWER_PERIOD_MIN 1000000     /* 1 sec */
+/** Maximum power period */
+#define IW_POWER_PERIOD_MAX 120000000   /* 2 min */
+/** Minimum power timeout value */
+#define IW_POWER_TIMEOUT_MIN 1000       /* 1 ms */
+/** Maximim power timeout value */
+#define IW_POWER_TIMEOUT_MAX 1000000    /* 1 sec */
+
+    /* Power Management duration & timeout */
+    range->min_pmp = IW_POWER_PERIOD_MIN;
+    range->max_pmp = IW_POWER_PERIOD_MAX;
+    range->min_pmt = IW_POWER_TIMEOUT_MIN;
+    range->max_pmt = IW_POWER_TIMEOUT_MAX;
+    range->pmp_flags = IW_POWER_PERIOD;
+    range->pmt_flags = IW_POWER_TIMEOUT;
+    range->pm_capa = IW_POWER_PERIOD | IW_POWER_TIMEOUT | IW_POWER_ALL_R;
+
+    /* 
+     * Minimum version we recommend
+     */
+    range->we_version_source = 15;
+
+    /* 
+     * Version we are compiled with
+     */
+    range->we_version_compiled = WIRELESS_EXT;
+
+    range->retry_capa = IW_RETRY_LIMIT;
+    range->retry_flags = IW_RETRY_LIMIT | IW_RETRY_MAX;
+
+    range->min_retry = MLAN_TX_RETRY_MIN;
+    range->max_retry = MLAN_TX_RETRY_MAX;
+
+    /* 
+     * Set the qual, level and noise range values
+     */
+    /* 
+     * need to put the right values here
+     */
+/** Maximum quality percentage */
+#define IW_MAX_QUAL_PERCENT 5
+/** Average quality percentage */
+#define IW_AVG_QUAL_PERCENT 3
+    range->max_qual.qual = IW_MAX_QUAL_PERCENT;
+    range->max_qual.level = 0;
+    range->max_qual.noise = 0;
+
+    range->avg_qual.qual = IW_AVG_QUAL_PERCENT;
+    range->avg_qual.level = 0;
+    range->avg_qual.noise = 0;
+
+    range->sensitivity = 0;
+
+    /* 
+     * Setup the supported power level ranges
+     */
+    memset(range->txpower, 0, sizeof(range->txpower));
+
+    memset(&bss_info, 0, sizeof(bss_info));
+
+    woal_get_bss_info(priv, MOAL_IOCTL_WAIT, &bss_info);
+
+    range->txpower[0] = bss_info.min_power_level;
+    range->txpower[1] = bss_info.max_power_level;
+    range->num_txpower = 2;
+    range->txpower_capa = IW_TXPOW_DBM | IW_TXPOW_RANGE;
+
+    LEAVE();
+    return 0;
+}
+
+/** 
+ *  @brief set scan type 
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param scan_type            MLAN_SCAN_TYPE_ACTIVE/MLAN_SCAN_TYPE_PASSIVE
+ *
+ *  @return                     MLAN_STATUS_SUCCESS -- success, otherwise fail          
+ */
+static mlan_status
+woal_set_scan_type(moal_private * priv, t_u32 scan_type)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ds_scan *scan = NULL;
+    mlan_ioctl_req *req = NULL;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_scan));
+    if (req == NULL) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+    scan = (mlan_ds_scan *) req->pbuf;
+    scan->sub_command = MLAN_OID_SCAN_CONFIG;
+    req->req_id = MLAN_IOCTL_SCAN;
+    req->action = MLAN_ACT_SET;
+    memset(&scan->param.scan_cfg, 0, sizeof(mlan_scan_cfg));
+    scan->param.scan_cfg.scan_type = scan_type;
+
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT))
+        ret = MLAN_STATUS_FAILURE;
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief  Get band 
+ *   
+ *  @param priv                 A pointer to moal_private structure
+ *  @param band                 A pointer to band buf
+ * 
+ *  @return                     MLAN_STATUS_SUCCESS -- success, otherwise fail          
+ */
+static mlan_status
+woal_get_band(moal_private * priv, int *band)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_radio_cfg *radio_cfg = NULL;
+    int support_band = 0;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_radio_cfg));
+    if (req == NULL) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+    radio_cfg = (mlan_ds_radio_cfg *) req->pbuf;
+    radio_cfg->sub_command = MLAN_OID_BAND_CFG;
+    req->req_id = MLAN_IOCTL_RADIO_CFG;
+    /* Get config_bands, adhoc_start_band and adhoc_channel values from MLAN */
+    req->action = MLAN_ACT_GET;
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+    if (radio_cfg->param.band_cfg.config_bands & (BAND_B | BAND_G | BAND_GN))
+        support_band |= WIFI_FREQUENCY_BAND_2GHZ;
+    if (radio_cfg->param.band_cfg.config_bands & (BAND_A | BAND_AN))
+        support_band |= WIFI_FREQUENCY_BAND_5GHZ;
+    *band = support_band;
+    if (support_band == WIFI_FREQUENCY_ALL_BAND)
+        *band = WIFI_FREQUENCY_BAND_AUTO;
+  done:
+    if (req)
+        kfree(req);
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief set band
+ *
+ *  @param priv            A pointer to moal_private structure
+ *  @param pband            A pointer to band string.
+ *
+ *  @return                     MLAN_STATUS_SUCCESS -- success, otherwise fail          
+ */
+static mlan_status
+woal_set_band(moal_private * priv, char *pband)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    int band = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_radio_cfg *radio_cfg = NULL;
+
+    ENTER();
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_radio_cfg));
+    if (req == NULL) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+    radio_cfg = (mlan_ds_radio_cfg *) req->pbuf;
+    radio_cfg->sub_command = MLAN_OID_BAND_CFG;
+    req->req_id = MLAN_IOCTL_RADIO_CFG;
+
+    /* Get fw supported values from MLAN */
+    req->action = MLAN_ACT_GET;
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+    if (*pband == '0') {
+        PRINTM(MIOCTL, "Set band to AUTO\n");
+        band = radio_cfg->param.band_cfg.fw_bands;
+    } else if (*pband == '1') {
+        PRINTM(MIOCTL, "Set band to 5G\n");
+        if (!(radio_cfg->param.band_cfg.fw_bands & BAND_A)) {
+            PRINTM(MERROR, "Don't support 5G band\n");
+            ret = MLAN_STATUS_FAILURE;
+            goto done;
+        }
+        band = BAND_A;
+        band |= BAND_AN;
+    } else if (*pband == '2') {
+        PRINTM(MIOCTL, "Set band to 2G\n");
+        band = BAND_B | BAND_G;
+        band |= BAND_GN;
+    } else {
+        PRINTM(MERROR, "unsupported band\n");
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+    /* Set config_bands to MLAN */
+    req->action = MLAN_ACT_SET;
+    memset(&radio_cfg->param.band_cfg, 0, sizeof(mlan_ds_band_cfg));
+    radio_cfg->param.band_cfg.config_bands = band;
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief  Get power mode 
+ *   
+ *  @param priv                 A pointer to moal_private structure
+ *  @param powermode            A pointer to powermode buf
+ * 
+ *  @return                     MLAN_STATUS_SUCCESS -- success, otherwise fail          
+ */
+static mlan_status
+woal_get_powermode(moal_private * priv, int *powermode)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    int ps_mode;
+
+    ENTER();
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_set_get_power_mgmt(priv, MLAN_ACT_SET, &ps_mode, 0)) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    if (ps_mode)
+        *powermode = MFALSE;
+    else
+        *powermode = MTRUE;
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief set power mode
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param powermode            A pointer to powermode string.
+ *
+ *  @return                     MLAN_STATUS_SUCCESS -- success, otherwise fail          
+ */
+static mlan_status
+woal_set_powermode(moal_private * priv, char *powermode)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    int disabled;
+
+    ENTER();
+
+    if (*powermode == '1') {
+        PRINTM(MIOCTL, "Disable power save\n");
+        disabled = 1;
+    } else if (*powermode == '0') {
+        PRINTM(MIOCTL, "Enable power save\n");
+        disabled = 0;
+    } else {
+        PRINTM(MERROR, "unsupported power mode\n");
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_set_get_power_mgmt(priv, MLAN_ACT_SET, &disabled, 0))
+        ret = MLAN_STATUS_FAILURE;
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief set scan time 
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param passive_scan_time    passive scan time
+ *  @param specific_scan_time   specific scan time
+ *
+ *  @return                     MLAN_STATUS_SUCCESS -- success, otherwise fail          
+ */
+static mlan_status
+woal_set_scan_time(moal_private * priv, t_u16 passive_scan_time,
+                   t_u16 specific_scan_time)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ds_scan *scan = NULL;
+    mlan_ioctl_req *req = NULL;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_scan));
+    if (req == NULL) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+    scan = (mlan_ds_scan *) req->pbuf;
+    scan->sub_command = MLAN_OID_SCAN_CONFIG;
+    req->req_id = MLAN_IOCTL_SCAN;
+    req->action = MLAN_ACT_SET;
+    memset(&scan->param.scan_cfg, 0, sizeof(mlan_scan_cfg));
+    scan->param.scan_cfg.scan_time.specific_scan_time = specific_scan_time;
+    scan->param.scan_cfg.scan_time.passive_scan_time = passive_scan_time;
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT))
+        ret = MLAN_STATUS_FAILURE;
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Request user scan
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param wait_option          Wait option  
+ *  @param scan_cfg             A pointer to wlan_user_scan_config structure
+ *
+ *  @return                     MLAN_STATUS_SUCCESS -- success, otherwise fail          
+ */
+mlan_status
+woal_request_userscan(moal_private * priv,
+                      t_u8 wait_option, wlan_user_scan_cfg * scan_cfg)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    mlan_ioctl_req *ioctl_req = NULL;
+    mlan_ds_scan *scan = NULL;
+    mlan_status status = MLAN_STATUS_SUCCESS;
+    moal_handle *handle = priv->phandle;
+    ENTER();
+
+    if (MOAL_ACQ_SEMAPHORE_BLOCK(&handle->async_sem)) {
+        PRINTM(MERROR, "Acquire semaphore error, request_scan\n");
+        LEAVE();
+        return MLAN_STATUS_FAILURE;
+    }
+    handle->scan_pending_on_block = MTRUE;
+
+    /* Allocate an IOCTL request buffer */
+    ioctl_req =
+        woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_scan) +
+                                  sizeof(wlan_user_scan_cfg));
+    if (ioctl_req == NULL) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+    scan = (mlan_ds_scan *) ioctl_req->pbuf;
+    scan->sub_command = MLAN_OID_SCAN_USER_CONFIG;
+    ioctl_req->req_id = MLAN_IOCTL_SCAN;
+    ioctl_req->action = MLAN_ACT_SET;
+    memcpy(scan->param.user_scan.scan_cfg_buf, scan_cfg,
+           sizeof(wlan_user_scan_cfg));
+    /* Send IOCTL request to MLAN */
+    status = woal_request_ioctl(priv, ioctl_req, wait_option);
+    if (status == MLAN_STATUS_FAILURE) {
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+
+  done:
+    if ((ioctl_req) && (status != MLAN_STATUS_PENDING))
+        kfree(ioctl_req);
+
+    if (ret == MLAN_STATUS_FAILURE) {
+        handle->scan_pending_on_block = MFALSE;
+        MOAL_REL_SEMAPHORE(&handle->async_sem);
+    }
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief request combo scan
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param scan_cfg             A pointer to wlan_user_scan_cfg structure
+ *
+ *  @return                     MLAN_STATUS_SUCCESS -- success, otherwise fail          
+ */
+static mlan_status
+woal_do_combo_scan(moal_private * priv, wlan_user_scan_cfg * scan_cfg)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    moal_handle *handle = priv->phandle;
+
+    ENTER();
+    if (handle->scan_pending_on_block == MTRUE) {
+        PRINTM(MINFO, "scan already in processing...\n");
+        LEAVE();
+        return ret;
+    }
+#ifdef REASSOCIATION
+    if (MOAL_ACQ_SEMAPHORE_BLOCK(&handle->reassoc_sem)) {
+        PRINTM(MERROR, "Acquire semaphore error, woal_do_combo_scan\n");
+        LEAVE();
+        return -EBUSY;
+    }
+#endif /* REASSOCIATION */
+    priv->report_scan_result = MTRUE;
+    if (!scan_cfg) {
+        ret = woal_request_scan(priv, MOAL_NO_WAIT, NULL);
+    } else {
+        ret = woal_request_userscan(priv, MOAL_NO_WAIT, scan_cfg);
+    }
+#ifdef REASSOCIATION
+    MOAL_REL_SEMAPHORE(&handle->reassoc_sem);
+#endif
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief set combo scan
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param buf                  A pointer to scan command buf
+ *  @param length               buf length
+ *
+ *  @return                     0 -- success, otherwise fail          
+ */
+static int
+woal_set_combo_scan(moal_private * priv, char *buf, int length)
+{
+    int ret = 0;
+    wlan_user_scan_cfg scan_cfg;
+    t_u8 *ptr = buf + WEXT_CSCAN_HEADER_SIZE;
+    int buf_left = length - WEXT_CSCAN_HEADER_SIZE;
+    int num_ssid = 0;
+    int num_chan = 0;
+    int ssid_len = 0;
+    int i = 0;
+    t_u16 passive_scan_time = 0;
+    t_u16 specific_scan_time = 0;
+
+    ENTER();
+    memset(&scan_cfg, 0, sizeof(scan_cfg));
+    while (buf_left >= 2) {
+        switch (*ptr) {
+        case WEXT_CSCAN_SSID_SECTION:
+            ssid_len = *(ptr + 1);
+            if ((buf_left < (ssid_len + 2)) ||
+                (ssid_len > MLAN_MAX_SSID_LENGTH)) {
+                PRINTM(MERROR, "Invalid ssid, buf_left=%d, ssid_len=%d\n",
+                       buf_left, ssid_len);
+                buf_left = 0;
+                break;
+            }
+            if (num_ssid < (MRVDRV_MAX_SSID_LIST_LENGTH - 1)) {
+                strncpy(scan_cfg.ssid_list[num_ssid].ssid, ptr + 2, ssid_len);
+                scan_cfg.ssid_list[num_ssid].max_len = 0;
+                PRINTM(MIOCTL, "Combo scan: ssid=%s\n",
+                       scan_cfg.ssid_list[num_ssid].ssid);
+                num_ssid++;
+            }
+            buf_left -= ssid_len + 2;
+            ptr += ssid_len + 2;
+            break;
+        case WEXT_CSCAN_CHANNEL_SECTION:
+            num_chan = ptr[1];
+            if ((buf_left < (num_chan + 2)) ||
+                (num_chan > WLAN_USER_SCAN_CHAN_MAX)) {
+                PRINTM(MERROR,
+                       "Invalid channel list, buf_left=%d, num_chan=%d\n",
+                       buf_left, num_chan);
+                buf_left = 0;
+                break;
+            }
+            for (i = 0; i < num_chan; i++) {
+                scan_cfg.chan_list[i].chan_number = ptr[2 + i];
+                PRINTM(MIOCTL, "Combo scan: chan=%d\n",
+                       scan_cfg.chan_list[i].chan_number);
+            }
+            buf_left -= 2 + num_chan;
+            ptr += 2 + num_chan;
+            break;
+        case WEXT_CSCAN_PASV_DWELL_SECTION:
+            if (buf_left < 3) {
+                PRINTM(MERROR, "Invalid PASV_DWELL_SECTION, buf_left=%d\n",
+                       buf_left);
+                buf_left = 0;
+                break;
+            }
+            passive_scan_time = ptr[2] << 8 | ptr[1];
+            ptr += 3;
+            buf_left -= 3;
+            break;
+        case WEXT_CSCAN_HOME_DWELL_SECTION:
+            if (buf_left < 3) {
+                PRINTM(MERROR, "Invalid HOME_DWELL_SECTION, buf_left=%d\n",
+                       buf_left);
+                buf_left = 0;
+                break;
+            }
+            specific_scan_time = ptr[2] << 8 | ptr[1];
+            ptr += 3;
+            buf_left -= 3;
+            break;
+        default:
+            buf_left = 0;
+            break;
+        }
+    }
+    if (passive_scan_time || specific_scan_time) {
+        PRINTM(MIOCTL, "Set passive_scan_time=%d specific_scan_time=%d\n",
+               passive_scan_time, specific_scan_time);
+        if (MLAN_STATUS_FAILURE ==
+            woal_set_scan_time(priv, passive_scan_time, specific_scan_time)) {
+            ret = -EFAULT;
+            goto done;
+        }
+    }
+    if (num_ssid || num_chan) {
+        if (num_ssid) {
+            /* Add broadcast scan to ssid_list */
+            scan_cfg.ssid_list[num_ssid].max_len = 0xff;
+        }
+        if (MLAN_STATUS_FAILURE == woal_do_combo_scan(priv, &scan_cfg))
+            ret = -EFAULT;
+    } else {
+        /* request broadcast scan */
+        if (MLAN_STATUS_FAILURE == woal_do_combo_scan(priv, NULL))
+            ret = -EFAULT;
+    }
+  done:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Add RX Filter
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param rxfilter             A pointer to rxfilter string.
+ *
+ *  @return                     MLAN_STATUS_SUCCESS -- success, otherwise fail          
+ */
+static mlan_status
+woal_add_rxfilter(moal_private * priv, char *rxfilter)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    ENTER();
+    /* Android command: "DRIVER RXFILTER-ADD 0" "DRIVER RXFILTER-ADD 1" "DRIVER 
+       RXFILTER-ADD 3" */
+    if (*rxfilter == '0') {
+        PRINTM(MIOCTL, "Add IPV4 multicast filter\n");
+        priv->rx_filter |= RX_FILTER_IPV4_MULTICAST;
+    } else if (*rxfilter == '1') {
+        PRINTM(MIOCTL, "Add broadcast filter\n");
+        priv->rx_filter |= RX_FILTER_BROADCAST;
+    } else if (*rxfilter == '2') {
+        PRINTM(MIOCTL, "Add unicast filter\n");
+        priv->rx_filter |= RX_FILTER_UNICAST;
+    } else if (*rxfilter == '3') {
+        PRINTM(MIOCTL, "Add IPV6 multicast fitler\n");
+        priv->rx_filter |= RX_FILTER_IPV6_MULTICAST;
+    } else {
+        PRINTM(MERROR, "unsupported rx fitler\n");
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+  done:
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Remove RX Filter
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param rxfilter             A pointer to rxfilter string.
+ *
+ *  @return                     MLAN_STATUS_SUCCESS -- success, otherwise fail          
+ */
+static mlan_status
+woal_remove_rxfilter(moal_private * priv, char *rxfilter)
+{
+    mlan_status ret = MLAN_STATUS_SUCCESS;
+    ENTER();
+    if (*rxfilter == '0') {
+        PRINTM(MIOCTL, "Remove IPV4 multicast filter\n");
+        priv->rx_filter &= ~RX_FILTER_IPV4_MULTICAST;
+    } else if (*rxfilter == '1') {
+        PRINTM(MIOCTL, "Remove broadcast filter\n");
+        priv->rx_filter &= ~RX_FILTER_BROADCAST;
+    } else if (*rxfilter == '2') {
+        PRINTM(MIOCTL, "Remove unicast filter\n");
+        priv->rx_filter &= ~RX_FILTER_UNICAST;
+    } else if (*rxfilter == '3') {
+        PRINTM(MIOCTL, "Remove IPV6 multicast fitler\n");
+        priv->rx_filter &= ~RX_FILTER_IPV6_MULTICAST;
+    } else {
+        PRINTM(MERROR, "unsupported rx fitler\n");
+        ret = MLAN_STATUS_FAILURE;
+        goto done;
+    }
+  done:
+    LEAVE();
+    return ret;
+}
+
+#ifdef MEF_CFG_RX_FILTER
+/** 
+ *  @brief Enable/disable Rx broadcast/multicast filter in non-HS mode
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param enable               MTRUE/MFALSE: enable/disable
+ *
+ *  @return                     0 -- success, otherwise fail          
+ */
+static int
+woal_set_rxfilter(moal_private * priv, BOOLEAN enable)
+{
+    int ret = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_misc_cfg *misc = NULL;
+    mlan_ds_misc_mef_cfg *mef_cfg = NULL;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_misc_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    misc = (mlan_ds_misc_cfg *) req->pbuf;
+    mef_cfg = &misc->param.mef_cfg;
+    req->req_id = MLAN_IOCTL_MISC_CFG;
+    misc->sub_command = MLAN_OID_MISC_MEF_CFG;
+    req->action = MLAN_ACT_SET;
+
+    mef_cfg->sub_id = (enable ? MEF_CFG_RX_FILTER_ENABLE : MEF_CFG_DISABLE);
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+#endif
+
+/**
+ *  @brief Set priv command 
+ *
+ *  @param dev          A pointer to net_device structure
+ *  @param info         A pointer to iw_request_info structure
+ *  @param dwrq         A pointer to iw_point structure
+ *  @param extra        A pointer to extra data buf
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+static int
+woal_set_priv(struct net_device *dev, struct iw_request_info *info,
+              struct iw_point *dwrq, char *extra)
+{
+    int ret = 0;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    char *buf = NULL;
+    int power_mode = 0;
+    int band = 0;
+    char *pband = NULL;
+    mlan_bss_info bss_info;
+    mlan_ds_get_signal signal;
+    mlan_ds_rate rate;
+    char *pdata;
+    t_u8 country_code[COUNTRY_CODE_LEN];
+    int len = 0;
+    ENTER();
+    if (!(buf = kmalloc(dwrq->length, GFP_KERNEL))) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    if (copy_from_user(buf, dwrq->pointer, dwrq->length)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    PRINTM(MIOCTL, "SIOCSIWPRIV requst = %s\n", buf);
+    if (strncmp(buf, "RSSI", strlen("RSSI")) == 0) {
+        if (MLAN_STATUS_SUCCESS != woal_get_bss_info(priv,
+                                                     MOAL_IOCTL_WAIT,
+                                                     &bss_info)) {
+            ret = -EFAULT;
+            goto done;
+        }
+        if (bss_info.media_connected) {
+            if (MLAN_STATUS_SUCCESS !=
+                woal_get_signal_info(priv, MOAL_IOCTL_WAIT, &signal)) {
+                ret = -EFAULT;
+                goto done;
+            }
+            len =
+                sprintf(buf, "%s rssi %d\n", bss_info.ssid.ssid,
+                        signal.bcn_rssi_avg) + 1;
+        } else {
+            len = sprintf(buf, "OK\n") + 1;
+        }
+    } else if (strncmp(buf, "LINKSPEED", strlen("LINKSPEED")) == 0) {
+        if (MLAN_STATUS_SUCCESS != woal_get_data_rate(priv, &rate)) {
+            ret = -EFAULT;
+            goto done;
+        }
+        PRINTM(MIOCTL, "tx rate=%d\n", (int) rate.param.rate_cfg.rate);
+        len =
+            sprintf(buf, "LinkSpeed %d\n",
+                    (int) (rate.param.rate_cfg.rate * 500000 / 1000000)) + 1;
+    } else if (strncmp(buf, "MACADDR", strlen("MACADDR")) == 0) {
+        len =
+            sprintf(buf, "Macaddr = %02X:%02X:%02X:%02X:%02X:%02X\n",
+                    priv->current_addr[0], priv->current_addr[1],
+                    priv->current_addr[2], priv->current_addr[3],
+                    priv->current_addr[4], priv->current_addr[5]) + 1;
+    } else if (strncmp(buf, "GETPOWER", strlen("GETPOWER")) == 0) {
+        if (MLAN_STATUS_SUCCESS != woal_get_powermode(priv, &power_mode)) {
+            ret = -EFAULT;
+            goto done;
+        }
+        len = sprintf(buf, "powermode = %d\n", power_mode) + 1;
+    } else if (strncmp(buf, "SCAN-ACTIVE", strlen("SCAN-ACTIVE")) == 0) {
+        if (MLAN_STATUS_SUCCESS !=
+            woal_set_scan_type(priv, MLAN_SCAN_TYPE_ACTIVE)) {
+            ret = -EFAULT;
+            goto done;
+        }
+        PRINTM(MIOCTL, "Set Active Scan\n");
+        len = sprintf(buf, "OK\n") + 1;
+    } else if (strncmp(buf, "SCAN-PASSIVE", strlen("SCAN-PASSIVE")) == 0) {
+        if (MLAN_STATUS_SUCCESS !=
+            woal_set_scan_type(priv, MLAN_SCAN_TYPE_PASSIVE)) {
+            ret = -EFAULT;
+            goto done;
+        }
+        PRINTM(MIOCTL, "Set Passive Scan\n");
+        len = sprintf(buf, "OK\n") + 1;
+    } else if (strncmp(buf, "POWERMODE", strlen("POWERMODE")) == 0) {
+        pdata = buf + strlen("POWERMODE") + 1;
+        if (MLAN_STATUS_SUCCESS != woal_set_powermode(priv, pdata)) {
+            ret = -EFAULT;
+            goto done;
+        }
+        len = sprintf(buf, "OK\n") + 1;
+    } else if (strncmp(buf, "COUNTRY", strlen("COUNTRY")) == 0) {
+        memset(country_code, 0, sizeof(country_code));
+        memcpy(country_code, buf + strlen("COUNTRY") + 1,
+               strlen(buf) - strlen("COUNTRY") - 1);
+        PRINTM(MIOCTL, "Set COUNTRY %s\n", country_code);
+        if (MLAN_STATUS_SUCCESS != woal_set_region_code(priv, country_code)) {
+            ret = -EFAULT;
+            goto done;
+        }
+        len = sprintf(buf, "OK\n") + 1;
+    } else if (memcmp(buf, WEXT_CSCAN_HEADER, WEXT_CSCAN_HEADER_SIZE) == 0) {
+        PRINTM(MIOCTL, "Set Combo Scan\n");
+        if (MLAN_STATUS_SUCCESS != woal_set_combo_scan(priv, buf, dwrq->length)) {
+            ret = -EFAULT;
+            goto done;
+        }
+        len = sprintf(buf, "OK\n") + 1;
+    } else if (strncmp(buf, "GETBAND", strlen("GETBAND")) == 0) {
+        if (MLAN_STATUS_SUCCESS != woal_get_band(priv, &band)) {
+            ret = -EFAULT;
+            goto done;
+        }
+        len = sprintf(buf, "Band %d\n", band) + 1;
+    } else if (strncmp(buf, "SETBAND", strlen("SETBAND")) == 0) {
+        pband = buf + strlen("SETBAND") + 1;
+        if (MLAN_STATUS_SUCCESS != woal_set_band(priv, pband)) {
+            ret = -EFAULT;
+            goto done;
+        }
+        len = sprintf(buf, "OK\n") + 1;
+    } else if (strncmp(buf, "START", strlen("START")) == 0) {
+        len = sprintf(buf, "OK\n") + 1;
+    } else if (strncmp(buf, "STOP", strlen("STOP")) == 0) {
+        len = sprintf(buf, "OK\n") + 1;
+    } else if (strncmp(buf, "SETSUSPENDOPT", strlen("SETSUSPENDOPT")) == 0) {
+        /* it will be done by GUI */
+        len = sprintf(buf, "OK\n") + 1;
+    } else if (strncmp(buf, "BTCOEXMODE", strlen("BTCOEXMODE")) == 0) {
+        len = sprintf(buf, "OK\n") + 1;
+    } else if (strncmp(buf, "BTCOEXSCAN-START", strlen("BTCOEXSCAN-START")) ==
+               0) {
+        len = sprintf(buf, "OK\n") + 1;
+    } else if (strncmp(buf, "BTCOEXSCAN-STOP", strlen("BTCOEXSCAN-STOP")) == 0) {
+        len = sprintf(buf, "OK\n") + 1;
+    } else if (strncmp(buf, "BTCOEXSCAN-START", strlen("BTCOEXSCAN-START")) ==
+               0) {
+        len = sprintf(buf, "OK\n") + 1;
+    } else if (strncmp(buf, "BTCOEXSCAN-STOP", strlen("BTCOEXSCAN-STOP")) == 0) {
+        len = sprintf(buf, "OK\n") + 1;
+    } else if (strncmp(buf, "BGSCAN-START", strlen("BGSCAN-START")) == 0) {
+        // TODO
+        len = sprintf(buf, "OK\n") + 1;
+    } else if (strncmp(buf, "BGSCAN-STOP", strlen("BGSCAN-STOP")) == 0) {
+        // TODO
+        len = sprintf(buf, "OK\n") + 1;
+    } else if (strncmp(buf, "RXFILTER-START", strlen("RXFILTER-START")) == 0) {
+#ifdef MEF_CFG_RX_FILTER
+        if ((ret = woal_set_rxfilter(priv, MTRUE))) {
+            goto done;
+        }
+#endif
+        len = sprintf(buf, "OK\n") + 1;
+    } else if (strncmp(buf, "RXFILTER-STOP", strlen("RXFILTER-STOP")) == 0) {
+#ifdef MEF_CFG_RX_FILTER
+        if ((ret = woal_set_rxfilter(priv, MFALSE))) {
+            goto done;
+        }
+#endif
+        len = sprintf(buf, "OK\n") + 1;
+    } else if (strncmp(buf, "RXFILTER-ADD", strlen("RXFILTER-ADD")) == 0) {
+        pdata = buf + strlen("RXFILTER-ADD") + 1;
+        if (MLAN_STATUS_SUCCESS != woal_add_rxfilter(priv, pdata)) {
+            ret = -EFAULT;
+            goto done;
+        }
+        len = sprintf(buf, "OK\n") + 1;
+    } else if (strncmp(buf, "RXFILTER-REMOVE", strlen("RXFILTER-REMOVE")) == 0) {
+        pdata = buf + strlen("RXFILTER-REMOVE") + 1;
+        if (MLAN_STATUS_SUCCESS != woal_remove_rxfilter(priv, pdata)) {
+            ret = -EFAULT;
+            goto done;
+        }
+        len = sprintf(buf, "OK\n") + 1;
+    } else {
+        PRINTM(MIOCTL, "Unknow PRIVATE command: %s, ignored\n", buf);
+        ret = -EFAULT;
+        goto done;
+    }
+    PRINTM(MIOCTL, "PRIV Command return: %s, length=%d\n", buf, len);
+    dwrq->length = len;
+    if (copy_to_user(dwrq->pointer, buf, dwrq->length)) {
+        ret = -EFAULT;
+    }
+  done:
+    if (buf)
+        kfree(buf);
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief Scan Network
+ *
+ *  @param dev          A pointer to net_device structure
+ *  @param info         A pointer to iw_request_info structure
+ *  @param vwrq         A pointer to iw_param structure
+ *  @param extra        A pointer to extra data buf
+ *
+ *  @return             0--success, otherwise fail
+ */
+static int
+woal_set_scan(struct net_device *dev, struct iw_request_info *info,
+              struct iw_param *vwrq, char *extra)
+{
+    int ret = 0;
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    moal_handle *handle = priv->phandle;
+#if WIRELESS_EXT >= 18
+    struct iw_scan_req *req;
+    struct iw_point *dwrq = (struct iw_point *) vwrq;
+#endif
+    mlan_802_11_ssid req_ssid;
+
+    ENTER();
+    if (handle->scan_pending_on_block == MTRUE) {
+        PRINTM(MINFO, "scan already in processing...\n");
+        LEAVE();
+        return ret;
+    }
+#ifdef REASSOCIATION
+    if (MOAL_ACQ_SEMAPHORE_BLOCK(&handle->reassoc_sem)) {
+        PRINTM(MERROR, "Acquire semaphore error, woal_set_scan\n");
+        LEAVE();
+        return -EBUSY;
+    }
+#endif /* REASSOCIATION */
+    priv->report_scan_result = MTRUE;
+
+    memset(&req_ssid, 0x00, sizeof(mlan_802_11_ssid));
+
+#if WIRELESS_EXT >= 18
+    if ((dwrq->flags & IW_SCAN_THIS_ESSID) &&
+        (dwrq->length == sizeof(struct iw_scan_req))) {
+        req = (struct iw_scan_req *) extra;
+
+        if (req->essid_len <= MLAN_MAX_SSID_LENGTH) {
+
+            req_ssid.ssid_len = req->essid_len;
+            memcpy(req_ssid.ssid, (t_u8 *) req->essid, req->essid_len);
+            if (MLAN_STATUS_SUCCESS !=
+                woal_request_scan(priv, MOAL_NO_WAIT, &req_ssid)) {
+                ret = -EFAULT;
+                goto done;
+            }
+        }
+    } else {
+#endif
+        if (MLAN_STATUS_SUCCESS != woal_request_scan(priv, MOAL_NO_WAIT, NULL)) {
+            ret = -EFAULT;
+            goto done;
+        }
+#if WIRELESS_EXT >= 18
+    }
+#endif
+
+    if (priv->phandle->surprise_removed) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+  done:
+#ifdef REASSOCIATION
+    MOAL_REL_SEMAPHORE(&handle->reassoc_sem);
+#endif
+
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief find ssid in scan_table
+ *
+ *  @param priv         A pointer to moal_private
+ *  @ssid_bssid         A pointer to mlan_ssid_bssid structure
+ *  @return             MLAN_STATUS_SUCCESS/MLAN_STATUS_FAILURE
+ */
+static int
+woal_find_essid(moal_private * priv, mlan_ssid_bssid * ssid_bssid)
+{
+    mlan_scan_resp scan_resp;
+    struct timeval t;
+    if (MLAN_STATUS_SUCCESS !=
+        woal_get_scan_table(priv, MOAL_IOCTL_WAIT, &scan_resp))
+        return MLAN_STATUS_FAILURE;
+    do_gettimeofday(&t);
+/** scan result timeout value */
+#define SCAN_RESULT_AGEOUT      10
+    if (t.tv_sec > (scan_resp.age_in_secs + SCAN_RESULT_AGEOUT))
+        return MLAN_STATUS_FAILURE;
+    return woal_find_best_network(priv, MOAL_IOCTL_WAIT, ssid_bssid);
+}
+
+/**
+ *  @brief Set essid
+ *
+ *  @param dev          A pointer to net_device structure
+ *  @param info         A pointer to iw_request_info structure
+ *  @param dwrq         A pointer to iw_point structure
+ *  @param extra        A pointer to extra data buf
+ *
+ *  @return             0--success, otherwise fail
+ */
+static int
+woal_set_essid(struct net_device *dev, struct iw_request_info *info,
+               struct iw_point *dwrq, char *extra)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_802_11_ssid req_ssid;
+    mlan_ssid_bssid ssid_bssid;
+#ifdef REASSOCIATION
+    moal_handle *handle = priv->phandle;
+    mlan_bss_info bss_info;
+#endif
+    int ret = 0;
+    t_u32 mode = 0;
+
+    ENTER();
+
+#ifdef REASSOCIATION
+    /* Cancel re-association */
+    priv->reassoc_required = MFALSE;
+
+    if (MOAL_ACQ_SEMAPHORE_BLOCK(&handle->reassoc_sem)) {
+        PRINTM(MERROR, "Acquire semaphore error, woal_set_essid\n");
+        LEAVE();
+        return -EBUSY;
+    }
+#endif /* REASSOCIATION */
+
+    /* Check the size of the string */
+    if (dwrq->length > IW_ESSID_MAX_SIZE + 1) {
+        ret = -E2BIG;
+        goto setessid_ret;
+    }
+    memset(&req_ssid, 0, sizeof(mlan_802_11_ssid));
+    memset(&ssid_bssid, 0, sizeof(mlan_ssid_bssid));
+
+#if WIRELESS_EXT > 20
+    req_ssid.ssid_len = dwrq->length;
+#else
+    req_ssid.ssid_len = dwrq->length - 1;
+#endif
+
+    /* 
+     * Check if we asked for `any' or 'particular'
+     */
+    if (!dwrq->flags) {
+
+        if (!req_ssid.ssid_len) {
+            memset(&priv->prev_ssid_bssid.ssid, 0x00, sizeof(mlan_802_11_ssid));
+            memset(&priv->prev_ssid_bssid.bssid, 0x00, MLAN_MAC_ADDR_LENGTH);
+            goto setessid_ret;
+        }
+
+        /* Do normal SSID scanning */
+        if (MLAN_STATUS_SUCCESS !=
+            woal_request_scan(priv, MOAL_IOCTL_WAIT, NULL)) {
+            ret = -EFAULT;
+            goto setessid_ret;
+        }
+    } else {
+        /* Set the SSID */
+        memcpy(req_ssid.ssid, extra,
+               MIN(req_ssid.ssid_len, MLAN_MAX_SSID_LENGTH));
+        if (!req_ssid.ssid_len || (MFALSE == woal_ssid_valid(&req_ssid))) {
+            PRINTM(MERROR, "Invalid SSID - aborting set_essid\n");
+            ret = -EINVAL;
+            goto setessid_ret;
+        }
+        PRINTM(MINFO, "Requested new SSID = %s\n", (char *) req_ssid.ssid);
+        memcpy(&ssid_bssid.ssid, &req_ssid, sizeof(mlan_802_11_ssid));
+
+        if (dwrq->flags != 0xFFFF) {
+            if (MLAN_STATUS_SUCCESS != woal_find_essid(priv, &ssid_bssid)) {
+                /* Do specific SSID scanning */
+                if (MLAN_STATUS_SUCCESS !=
+                    woal_request_scan(priv, MOAL_IOCTL_WAIT, &req_ssid)) {
+                    ret = -EFAULT;
+                    goto setessid_ret;
+                }
+            }
+        }
+
+    }
+
+    /* disconnect before try to associate */
+    woal_disconnect(priv, MOAL_IOCTL_WAIT, NULL);
+    mode = woal_get_mode(priv, MOAL_IOCTL_WAIT);
+
+    if (mode != IW_MODE_ADHOC) {
+        if (MLAN_STATUS_SUCCESS !=
+            woal_find_best_network(priv, MOAL_IOCTL_WAIT, &ssid_bssid)) {
+            ret = -EFAULT;
+            goto setessid_ret;
+        }
+    } else if (MLAN_STATUS_SUCCESS !=
+               woal_find_best_network(priv, MOAL_IOCTL_WAIT, &ssid_bssid))
+        /* Adhoc start, Check the channel command */
+        woal_11h_channel_check_ioctl(priv);
+
+    /* Connect to BSS by ESSID */
+    memset(&ssid_bssid.bssid, 0, MLAN_MAC_ADDR_LENGTH);
+
+    if (MLAN_STATUS_SUCCESS != woal_bss_start(priv,
+                                              MOAL_IOCTL_WAIT, &ssid_bssid)) {
+        ret = -EFAULT;
+        goto setessid_ret;
+    }
+#ifdef REASSOCIATION
+    memset(&bss_info, 0, sizeof(bss_info));
+    if (MLAN_STATUS_SUCCESS != woal_get_bss_info(priv,
+                                                 MOAL_IOCTL_WAIT, &bss_info)) {
+        ret = -EFAULT;
+        goto setessid_ret;
+    }
+    memcpy(&priv->prev_ssid_bssid.ssid, &bss_info.ssid,
+           sizeof(mlan_802_11_ssid));
+    memcpy(&priv->prev_ssid_bssid.bssid, &bss_info.bssid, MLAN_MAC_ADDR_LENGTH);
+#endif /* REASSOCIATION */
+
+  setessid_ret:
+
+#ifdef REASSOCIATION
+    MOAL_REL_SEMAPHORE(&handle->reassoc_sem);
+#endif
+
+    LEAVE();
+    return ret;
+}
+
+/** 
+ *  @brief Get current essid 
+ *   
+ *  @param dev      A pointer to net_device structure
+ *  @param info     A pointer to iw_request_info structure
+ *  @param dwrq     A pointer to iw_point structure
+ *  @param extra    A pointer to extra data buf
+ *
+ *  @return         0--success, otherwise fail
+ */
+static int
+woal_get_essid(struct net_device *dev, struct iw_request_info *info,
+               struct iw_point *dwrq, char *extra)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    mlan_bss_info bss_info;
+    int ret = 0;
+
+    ENTER();
+
+    memset(&bss_info, 0, sizeof(bss_info));
+
+    if (MLAN_STATUS_SUCCESS !=
+        woal_get_bss_info(priv, MOAL_IOCTL_WAIT, &bss_info)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    if (bss_info.media_connected) {
+        dwrq->length = MIN(dwrq->length, bss_info.ssid.ssid_len);
+        memcpy(extra, bss_info.ssid.ssid, dwrq->length);
+    } else
+        dwrq->length = 0;
+
+    if (bss_info.scan_table_idx)
+        dwrq->flags = (bss_info.scan_table_idx + 1) & IW_ENCODE_INDEX;
+    else
+        dwrq->flags = 1;
+
+  done:
+    LEAVE();
+    return ret;
+}
+
+/**
+ *  @brief  Retrieve the scan table entries via wireless tools IOCTL call
+ *
+ *  @param dev          A pointer to net_device structure
+ *  @param info         A pointer to iw_request_info structure
+ *  @param dwrq         A pointer to iw_point structure
+ *  @param extra        A pointer to extra data buf
+ *
+ *  @return             0--success, otherwise fail
+ */
+static int
+woal_get_scan(struct net_device *dev, struct iw_request_info *info,
+              struct iw_point *dwrq, char *extra)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    int ret = 0;
+    char *current_ev = extra;
+    char *end_buf = extra + IW_SCAN_MAX_DATA;
+    char *current_val;          /* For rates */
+    struct iw_event iwe;        /* Temporary buffer */
+    unsigned int i;
+    unsigned int j;
+    mlan_scan_resp scan_resp;
+    mlan_bss_info bss_info;
+    BSSDescriptor_t *scan_table;
+    mlan_ds_get_signal rssi;
+    t_u16 buf_size = 16 + 256 * 2;
+    char *buf = NULL;
+    char *ptr;
+#if WIRELESS_EXT >= 18
+    t_u8 *praw_data;
+#endif
+    int beacon_size;
+    t_u8 *pbeacon;
+    IEEEtypes_ElementId_e element_id;
+    t_u8 element_len;
+
+    ENTER();
+
+    if (priv->phandle->scan_pending_on_block == MTRUE) {
+        LEAVE();
+        return -EAGAIN;
+    }
+
+    if (!(buf = kmalloc((buf_size), GFP_KERNEL))) {
+        PRINTM(MERROR, "Cannot allocate buffer!\n");
+        ret = -EFAULT;
+        goto done;
+    }
+
+    memset(&bss_info, 0, sizeof(bss_info));
+    if (MLAN_STATUS_SUCCESS !=
+        woal_get_bss_info(priv, MOAL_IOCTL_WAIT, &bss_info)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    memset(&scan_resp, 0, sizeof(scan_resp));
+    if (MLAN_STATUS_SUCCESS != woal_get_scan_table(priv,
+                                                   MOAL_IOCTL_WAIT,
+                                                   &scan_resp)) {
+        ret = -EFAULT;
+        goto done;
+    }
+    scan_table = (BSSDescriptor_t *) scan_resp.pscan_table;
+    if (dwrq->length)
+        end_buf = extra + dwrq->length;
+    if (priv->media_connected == MTRUE) {
+        PRINTM(MINFO, "Current Ssid: %-32s\n", bss_info.ssid.ssid);
+    }
+    PRINTM(MINFO, "Scan: Get: NumInScanTable = %d\n",
+           (int) scan_resp.num_in_scan_table);
+
+#if WIRELESS_EXT > 13
+    /* The old API using SIOCGIWAPLIST had a hard limit of IW_MAX_AP. The new
+       API using SIOCGIWSCAN is only limited by buffer size WE-14 -> WE-16 the
+       buffer is limited to IW_SCAN_MAX_DATA bytes which is 4096. */
+    for (i = 0; i < scan_resp.num_in_scan_table; i++) {
+        if ((current_ev + MAX_SCAN_CELL_SIZE) >= end_buf) {
+            PRINTM(MINFO, "i=%d break out: current_ev=%p end_buf=%p "
+                   "MAX_SCAN_CELL_SIZE=%d\n",
+                   i, current_ev, end_buf, MAX_SCAN_CELL_SIZE);
+            ret = -E2BIG;
+            break;
+        }
+        if (!scan_table[i].freq) {
+            PRINTM(MERROR, "Invalid channel number %d\n",
+                   (int) scan_table[i].channel);
+            continue;
+        }
+        PRINTM(MINFO, "i=%d  Ssid: %-32s\n", i, scan_table[i].ssid.ssid);
+
+        /* check ssid is valid or not, ex. hidden ssid will be filter out */
+        if (woal_ssid_valid(&scan_table[i].ssid) == MFALSE) {
+            continue;
+        }
+
+        /* First entry *MUST* be the AP MAC address */
+        iwe.cmd = SIOCGIWAP;
+        iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
+        memcpy(iwe.u.ap_addr.sa_data, &scan_table[i].mac_address, ETH_ALEN);
+
+        iwe.len = IW_EV_ADDR_LEN;
+        current_ev =
+            IWE_STREAM_ADD_EVENT(info, current_ev, end_buf, &iwe, iwe.len);
+
+        /* Add the ESSID */
+        iwe.u.data.length = scan_table[i].ssid.ssid_len;
+
+        if (iwe.u.data.length > 32) {
+            iwe.u.data.length = 32;
+        }
+
+        iwe.cmd = SIOCGIWESSID;
+        iwe.u.essid.flags = (i + 1) & IW_ENCODE_INDEX;
+        iwe.len = IW_EV_POINT_LEN + iwe.u.data.length;
+        current_ev =
+            IWE_STREAM_ADD_POINT(info, current_ev, end_buf, &iwe,
+                                 (t_s8 *) scan_table[i].ssid.ssid);
+
+        /* Add mode */
+        iwe.cmd = SIOCGIWMODE;
+        if (scan_table[i].bss_mode == MLAN_BSS_MODE_IBSS)
+            iwe.u.mode = IW_MODE_ADHOC;
+        else if (scan_table[i].bss_mode == MLAN_BSS_MODE_INFRA)
+            iwe.u.mode = IW_MODE_MASTER;
+        else
+            iwe.u.mode = IW_MODE_AUTO;
+
+        iwe.len = IW_EV_UINT_LEN;
+        current_ev =
+            IWE_STREAM_ADD_EVENT(info, current_ev, end_buf, &iwe, iwe.len);
+
+        /* Frequency */
+        iwe.cmd = SIOCGIWFREQ;
+        iwe.u.freq.m = (long) scan_table[i].freq * 100000;
+        iwe.u.freq.e = 1;
+        iwe.u.freq.flags = IW_FREQ_FIXED;
+        iwe.len = IW_EV_FREQ_LEN;
+        current_ev =
+            IWE_STREAM_ADD_EVENT(info, current_ev, end_buf, &iwe, iwe.len);
+
+        memset(&iwe, 0, sizeof(iwe));
+        /* Add quality statistics */
+        iwe.cmd = IWEVQUAL;
+        iwe.u.qual.level = SCAN_RSSI(scan_table[i].rssi);
+        if (!bss_info.bcn_nf_last) {
+            iwe.u.qual.noise = MRVDRV_NF_DEFAULT_SCAN_VALUE;
+        } else {
+            iwe.u.qual.noise = bss_info.bcn_nf_last;
+        }
+        if ((bss_info.bss_mode == MLAN_BSS_MODE_IBSS) &&
+            !woal_ssid_cmp(&bss_info.ssid, &scan_table[i].ssid)
+            && bss_info.adhoc_state == ADHOC_STARTED) {
+            memset(&rssi, 0, sizeof(mlan_ds_get_signal));
+            if (MLAN_STATUS_SUCCESS !=
+                woal_get_signal_info(priv, MOAL_IOCTL_WAIT, &rssi)) {
+                ret = -EFAULT;
+                break;
+            }
+            iwe.u.qual.level = rssi.data_rssi_avg;
+        }
+        iwe.u.qual.qual =
+            woal_rssi_to_quality((t_s16) (iwe.u.qual.level - 0x100));
+        iwe.len = IW_EV_QUAL_LEN;
+        current_ev =
+            IWE_STREAM_ADD_EVENT(info, current_ev, end_buf, &iwe, iwe.len);
+
+        /* Add encryption capability */
+        iwe.cmd = SIOCGIWENCODE;
+        if (scan_table[i].privacy) {
+            iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
+        } else {
+            iwe.u.data.flags = IW_ENCODE_DISABLED;
+        }
+        iwe.u.data.length = 0;
+        iwe.len = IW_EV_POINT_LEN + iwe.u.data.length;
+        current_ev =
+            IWE_STREAM_ADD_POINT(info, current_ev, end_buf, &iwe, NULL);
+
+        current_val = current_ev + IW_EV_LCP_LEN;
+
+        iwe.cmd = SIOCGIWRATE;
+
+        iwe.u.bitrate.fixed = 0;
+        iwe.u.bitrate.disabled = 0;
+        iwe.u.bitrate.value = 0;
+
+        /* Bit rate given in 500 kb/s units (+ 0x80) */
+        for (j = 0; j < sizeof(scan_table[i].supported_rates); j++) {
+            if (!scan_table[i].supported_rates[j]) {
+                break;
+            }
+
+            iwe.u.bitrate.value =
+                (scan_table[i].supported_rates[j] & 0x7f) * 500000;
+            iwe.len = IW_EV_PARAM_LEN;
+            current_val =
+                IWE_STREAM_ADD_VALUE(info, current_ev, current_val, end_buf,
+                                     &iwe, iwe.len);
+
+        }
+        if ((bss_info.bss_mode == MLAN_BSS_MODE_IBSS) &&
+            !woal_ssid_cmp(&bss_info.ssid, &scan_table[i].ssid)
+            && bss_info.adhoc_state == ADHOC_STARTED) {
+            iwe.u.bitrate.value = 22 * 500000;
+            iwe.len = IW_EV_PARAM_LEN;
+            current_val =
+                IWE_STREAM_ADD_VALUE(info, current_ev, current_val, end_buf,
+                                     &iwe, iwe.len);
+        }
+
+        /* Check if an event is added */
+        if ((unsigned int) (current_val - current_ev) >= IW_EV_PARAM_LEN)
+            current_ev = current_val;
+
+        /* Beacon Interval */
+        memset(&iwe, 0, sizeof(iwe));
+        memset(buf, 0, buf_size);
+        ptr = buf;
+        ptr += sprintf(ptr, "Beacon interval=%d", scan_table[i].beacon_period);
+
+        iwe.u.data.length = strlen(buf);
+        iwe.cmd = IWEVCUSTOM;
+        iwe.len = IW_EV_POINT_LEN + iwe.u.data.length;
+        current_ev = IWE_STREAM_ADD_POINT(info, current_ev, end_buf, &iwe, buf);
+        current_val = current_ev + IW_EV_LCP_LEN + strlen(buf);
+
+        /* Parse and send the IEs */
+        pbeacon = scan_table[i].pbeacon_buf;
+        beacon_size = scan_table[i].beacon_buf_size;
+
+        /* Skip time stamp, beacon interval and capability */
+        if (pbeacon) {
+            pbeacon += sizeof(scan_table[i].beacon_period) +
+                sizeof(scan_table[i].time_stamp) +
+                sizeof(scan_table[i].cap_info);
+            beacon_size -= sizeof(scan_table[i].beacon_period) +
+                sizeof(scan_table[i].time_stamp) +
+                sizeof(scan_table[i].cap_info);
+
+            while ((unsigned int) beacon_size >= sizeof(IEEEtypes_Header_t)) {
+                element_id = (IEEEtypes_ElementId_e) (*(t_u8 *) pbeacon);
+                element_len = *((t_u8 *) pbeacon + 1);
+                if ((unsigned int) beacon_size <
+                    (unsigned int) element_len + sizeof(IEEEtypes_Header_t)) {
+                    PRINTM(MERROR,
+                           "Get scan: Error in processing IE, "
+                           "bytes left < IE length\n");
+                    break;
+                }
+
+                switch (element_id) {
+#if WIRELESS_EXT >= 18
+                case VENDOR_SPECIFIC_221:
+                case RSN_IE:
+                case WAPI_IE:
+                    praw_data = (t_u8 *) pbeacon;
+                    memset(&iwe, 0, sizeof(iwe));
+                    memset(buf, 0, buf_size);
+                    ptr = buf;
+                    memcpy(buf, praw_data,
+                           element_len + sizeof(IEEEtypes_Header_t));
+                    iwe.cmd = IWEVGENIE;
+                    iwe.u.data.length =
+                        element_len + sizeof(IEEEtypes_Header_t);
+                    iwe.len = IW_EV_POINT_LEN + iwe.u.data.length;
+                    current_ev =
+                        IWE_STREAM_ADD_POINT(info, current_ev, end_buf, &iwe,
+                                             buf);
+                    current_val = current_ev + IW_EV_LCP_LEN + strlen(buf);
+                    break;
+#endif
+                default:
+                    break;
+                }
+                pbeacon += element_len + sizeof(IEEEtypes_Header_t);
+                beacon_size -= element_len + sizeof(IEEEtypes_Header_t);
+            }
+        }
+#if WIRELESS_EXT > 14
+        memset(&iwe, 0, sizeof(iwe));
+        memset(buf, 0, buf_size);
+        ptr = buf;
+        ptr += sprintf(ptr, "band=");
+        memset(&iwe, 0, sizeof(iwe));
+        if (scan_table[i].bss_band == BAND_A)
+            ptr += sprintf(ptr, "a");
+        else
+            ptr += sprintf(ptr, "bg");
+        iwe.u.data.length = strlen(buf);
+        PRINTM(MINFO, "iwe.u.data.length %d\n", iwe.u.data.length);
+        PRINTM(MINFO, "BUF: %s \n", buf);
+        iwe.cmd = IWEVCUSTOM;
+        iwe.len = IW_EV_POINT_LEN + iwe.u.data.length;
+        current_ev = IWE_STREAM_ADD_POINT(info, current_ev, end_buf, &iwe, buf);
+        current_val = current_ev + IW_EV_LCP_LEN + strlen(buf);
+#endif
+        current_val = current_ev + IW_EV_LCP_LEN;
+
+        /* 
+         * Check if we added any event
+         */
+        if ((unsigned int) (current_val - current_ev) > IW_EV_LCP_LEN)
+            current_ev = current_val;
+    }
+
+    dwrq->length = (current_ev - extra);
+    dwrq->flags = 0;
+#endif
+
+  done:
+    if (buf)
+        kfree(buf);
+    LEAVE();
+    return ret;
+}
+
+/**
+ * iwconfig settable callbacks
+ */
+static const iw_handler woal_handler[] = {
+    (iw_handler) woal_config_commit,    /* SIOCSIWCOMMIT */
+    (iw_handler) woal_get_name, /* SIOCGIWNAME */
+    (iw_handler) NULL,          /* SIOCSIWNWID */
+    (iw_handler) NULL,          /* SIOCGIWNWID */
+    (iw_handler) woal_set_freq, /* SIOCSIWFREQ */
+    (iw_handler) woal_get_freq, /* SIOCGIWFREQ */
+    (iw_handler) woal_set_bss_mode,     /* SIOCSIWMODE */
+    (iw_handler) woal_get_bss_mode,     /* SIOCGIWMODE */
+    (iw_handler) woal_set_sens, /* SIOCSIWSENS */
+    (iw_handler) woal_get_sens, /* SIOCGIWSENS */
+    (iw_handler) NULL,          /* SIOCSIWRANGE */
+    (iw_handler) woal_get_range,        /* SIOCGIWRANGE */
+    (iw_handler) woal_set_priv, /* SIOCSIWPRIV */
+    (iw_handler) NULL,          /* SIOCGIWPRIV */
+    (iw_handler) NULL,          /* SIOCSIWSTATS */
+    (iw_handler) NULL,          /* SIOCGIWSTATS */
+#if WIRELESS_EXT > 15
+    iw_handler_set_spy,         /* SIOCSIWSPY */
+    iw_handler_get_spy,         /* SIOCGIWSPY */
+    iw_handler_set_thrspy,      /* SIOCSIWTHRSPY */
+    iw_handler_get_thrspy,      /* SIOCGIWTHRSPY */
+#else /* WIRELESS_EXT > 15 */
+#ifdef WIRELESS_SPY
+    (iw_handler) NULL,          /* SIOCSIWSPY */
+    (iw_handler) NULL,          /* SIOCGIWSPY */
+#else /* WIRELESS_SPY */
+    (iw_handler) NULL,          /* SIOCSIWSPY */
+    (iw_handler) NULL,          /* SIOCGIWSPY */
+#endif /* WIRELESS_SPY */
+    (iw_handler) NULL,          /* -- hole -- */
+    (iw_handler) NULL,          /* -- hole -- */
+#endif /* WIRELESS_EXT > 15 */
+    (iw_handler) woal_set_wap,  /* SIOCSIWAP */
+    (iw_handler) woal_get_wap,  /* SIOCGIWAP */
+#if WIRELESS_EXT >= 18
+    (iw_handler) woal_set_mlme, /* SIOCSIWMLME */
+#else
+    (iw_handler) NULL,          /* -- hole -- */
+#endif
+    /* (iw_handler) wlan_get_aplist, *//* SIOCGIWAPLIST */
+    NULL,                       /* SIOCGIWAPLIST */
+#if WIRELESS_EXT > 13
+    (iw_handler) woal_set_scan, /* SIOCSIWSCAN */
+    (iw_handler) woal_get_scan, /* SIOCGIWSCAN */
+#else /* WIRELESS_EXT > 13 */
+    (iw_handler) NULL,          /* SIOCSIWSCAN */
+    (iw_handler) NULL,          /* SIOCGIWSCAN */
+#endif /* WIRELESS_EXT > 13 */
+    (iw_handler) woal_set_essid,        /* SIOCSIWESSID */
+    (iw_handler) woal_get_essid,        /* SIOCGIWESSID */
+    (iw_handler) woal_set_nick, /* SIOCSIWNICKN */
+    (iw_handler) woal_get_nick, /* SIOCGIWNICKN */
+    (iw_handler) NULL,          /* -- hole -- */
+    (iw_handler) NULL,          /* -- hole -- */
+    (iw_handler) woal_set_rate, /* SIOCSIWRATE */
+    (iw_handler) woal_get_rate, /* SIOCGIWRATE */
+    (iw_handler) woal_set_rts,  /* SIOCSIWRTS */
+    (iw_handler) woal_get_rts,  /* SIOCGIWRTS */
+    (iw_handler) woal_set_frag, /* SIOCSIWFRAG */
+    (iw_handler) woal_get_frag, /* SIOCGIWFRAG */
+    (iw_handler) woal_set_txpow,        /* SIOCSIWTXPOW */
+    (iw_handler) woal_get_txpow,        /* SIOCGIWTXPOW */
+    (iw_handler) woal_set_retry,        /* SIOCSIWRETRY */
+    (iw_handler) woal_get_retry,        /* SIOCGIWRETRY */
+    (iw_handler) woal_set_encode,       /* SIOCSIWENCODE */
+    (iw_handler) woal_get_encode,       /* SIOCGIWENCODE */
+    (iw_handler) woal_set_power,        /* SIOCSIWPOWER */
+    (iw_handler) woal_get_power,        /* SIOCGIWPOWER */
+#if (WIRELESS_EXT >= 18)
+    (iw_handler) NULL,          /* -- hole -- */
+    (iw_handler) NULL,          /* -- hole -- */
+    (iw_handler) woal_set_gen_ie,       /* SIOCSIWGENIE */
+    (iw_handler) woal_get_gen_ie,       /* SIOCGIWGENIE */
+    (iw_handler) woal_set_auth, /* SIOCSIWAUTH */
+    (iw_handler) woal_get_auth, /* SIOCGIWAUTH */
+    (iw_handler) woal_set_encode_ext,   /* SIOCSIWENCODEEXT */
+    (iw_handler) woal_get_encode_ext,   /* SIOCGIWENCODEEXT */
+    (iw_handler) woal_set_pmksa,        /* SIOCSIWPMKSA */
+#endif /* WIRELESSS_EXT >= 18 */
+};
+
+/**
+ * iwpriv settable callbacks
+ */
+static const iw_handler woal_private_handler[] = {
+    NULL,                       /* SIOCIWFIRSTPRIV */
+};
+#endif /* STA_SUPPORT */
+
+/********************************************************
+                Global Functions
+********************************************************/
+
+/** MEAS report timeout value in seconds */
+
+/**
+ *  @brief Issue MLAN_OID_11H_CHANNEL_CHECK ioctl
+ *
+ *  @param priv     Pointer to the moal_private driver data struct
+ *
+ *  @return         0 --success, otherwise fail
+ */
+int
+woal_11h_channel_check_ioctl(moal_private * priv)
+{
+    int ret = 0;
+    mlan_ioctl_req *req = NULL;
+    mlan_ds_11h_cfg *ds_11hcfg = NULL;
+
+    ENTER();
+
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_11h_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    ds_11hcfg = (mlan_ds_11h_cfg *) req->pbuf;
+
+    ds_11hcfg->sub_command = MLAN_OID_11H_CHANNEL_CHECK;
+    req->req_id = MLAN_IOCTL_11H_CFG;
+    req->action = MLAN_ACT_SET;
+    /* Send Channel Check command and wait until the report is ready */
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+
+    /* set flag from here */
+    priv->phandle->cac_period = MTRUE;
+    priv->phandle->meas_start_jiffies = jiffies;
+
+  done:
+    if (req)
+        kfree(req);
+
+    LEAVE();
+    return ret;
+}
+
+#ifdef STA_SUPPORT
+/**
+ *  @brief Set Radio On/OFF
+ *
+ *  @param priv                 A pointer to moal_private structure
+ *  @param option               Radio Option
+ *
+ *  @return                     0 --success, otherwise fail
+ */
+int
+woal_set_radio(moal_private * priv, t_u8 option)
+{
+    int ret = 0;
+    mlan_ds_radio_cfg *radio = NULL;
+    mlan_ioctl_req *req = NULL;
+    ENTER();
+    if ((option != 0) && (option != 1)) {
+        ret = -EINVAL;
+        goto done;
+    }
+    req = woal_alloc_mlan_ioctl_req(sizeof(mlan_ds_radio_cfg));
+    if (req == NULL) {
+        ret = -ENOMEM;
+        goto done;
+    }
+    radio = (mlan_ds_radio_cfg *) req->pbuf;
+    radio->sub_command = MLAN_OID_RADIO_CTRL;
+    req->req_id = MLAN_IOCTL_RADIO_CFG;
+    req->action = MLAN_ACT_SET;
+    radio->param.radio_on_off = option;
+    if (MLAN_STATUS_SUCCESS != woal_request_ioctl(priv, req, MOAL_IOCTL_WAIT)) {
+        ret = -EFAULT;
+        goto done;
+    }
+  done:
+    if (req)
+        kfree(req);
+    LEAVE();
+    return ret;
+}
+
+/** wlan_handler_def */
+struct iw_handler_def woal_handler_def = {
+  num_standard:sizeof(woal_handler) / sizeof(iw_handler),
+  num_private:sizeof(woal_private_handler) / sizeof(iw_handler),
+  num_private_args:sizeof(woal_private_args) / sizeof(struct iw_priv_args),
+  standard:(iw_handler *) woal_handler,
+  private:(iw_handler *) woal_private_handler,
+  private_args:(struct iw_priv_args *) woal_private_args,
+#if WIRELESS_EXT > 20
+  get_wireless_stats:woal_get_wireless_stats,
+#endif
+};
+
+/**
+ *  @brief Get wireless statistics
+ *
+ *  @param dev          A pointer to net_device structure
+ *
+ *  @return             A pointer to iw_statistics buf
+ */
+struct iw_statistics *
+woal_get_wireless_stats(struct net_device *dev)
+{
+    moal_private *priv = (moal_private *) netdev_priv(dev);
+    t_u16 wait_option = MOAL_NO_WAIT;
+
+    ENTER();
+
+    /* 
+     * Since schedule() is not allowed from an atomic context
+     * such as when dev_base_lock for netdevices is acquired
+     * for reading/writing in kernel before this call, HostCmd
+     * is issued in non-blocking way in such contexts and
+     * blocking in other cases.
+     */
+    if (write_can_lock(&dev_base_lock))
+        wait_option = MOAL_WSTATS_WAIT;
+
+    priv->w_stats.status = woal_get_mode(priv, wait_option);
+    priv->w_stats.discard.retries = priv->stats.tx_errors;
+    priv->w_stats.qual.qual = 0;
+
+    /* Send RSSI command to get beacon RSSI/NF, valid only if associated */
+    if (priv->media_connected == MTRUE) {
+        woal_get_signal_info(priv, wait_option, NULL);
+        priv->w_stats.qual.qual = woal_rssi_to_quality((t_s16)
+                                                       (priv->w_stats.qual.
+                                                        level - 0x100));
+    }
+#if WIRELESS_EXT > 18
+    priv->w_stats.qual.updated |= (IW_QUAL_ALL_UPDATED | IW_QUAL_DBM);
+#else
+    priv->w_stats.qual.updated |= 7;
+#endif
+    if (!priv->w_stats.qual.noise && priv->media_connected == MTRUE)
+        priv->w_stats.qual.noise = MRVDRV_NF_DEFAULT_SCAN_VALUE;
+
+    PRINTM(MINFO, "Link Quality = %#x\n", priv->w_stats.qual.qual);
+    PRINTM(MINFO, "Signal Level = %#x\n", priv->w_stats.qual.level);
+    PRINTM(MINFO, "Noise = %#x\n", priv->w_stats.qual.noise);
+    priv->w_stats.discard.code = 0;
+    woal_get_stats_info(priv, wait_option, NULL);
+
+    LEAVE();
+    return &priv->w_stats;
+}
+#endif /* STA_SUPPORT */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_wext.h linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_wext.h
--- linux-3.0.82/drivers/net/wireless/wm8782/mlinux/moal_wext.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/mlinux/moal_wext.h	2017-09-23 03:42:50.178674575 +0800
@@ -0,0 +1,144 @@
+/** @file moal_wext.h
+ *
+ * @brief This file contains definition for wireless extension IOCTL call.
+ *  
+ * Copyright (C) 2008-2011, Marvell International Ltd.  
+ *
+ * This software file (the "File") is distributed by Marvell International 
+ * Ltd. under the terms of the GNU General Public License Version 2, June 1991 
+ * (the "License").  You may use, redistribute and/or modify this File in 
+ * accordance with the terms and conditions of the License, a copy of which 
+ * is available by writing to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
+ * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
+ *
+ * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 
+ * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about 
+ * this warranty disclaimer.
+ *
+ */
+
+/********************************************************
+Change log:
+    10/21/2008: initial version
+********************************************************/
+
+#ifndef _WOAL_WEXT_H_
+#define _WOAL_WEXT_H_
+
+/** Custom event : AdHoc link sensed */
+#define CUS_EVT_ADHOC_LINK_SENSED	"EVENT=ADHOC_LINK_SENSED"
+/** Custom event : AdHoc link lost */
+#define CUS_EVT_ADHOC_LINK_LOST		"EVENT=ADHOC_LINK_LOST"
+/** Custom event : MIC failure, unicast */
+#define CUS_EVT_MLME_MIC_ERR_UNI	"MLME-MICHAELMICFAILURE.indication unicast "
+/** Custom event : MIC failure, multicast */
+#define CUS_EVT_MLME_MIC_ERR_MUL	"MLME-MICHAELMICFAILURE.indication multicast "
+/** Custom event : Beacon RSSI low */
+#define CUS_EVT_BEACON_RSSI_LOW		"EVENT=BEACON_RSSI_LOW"
+/** Custom event : Beacon SNR low */
+#define CUS_EVT_BEACON_SNR_LOW		"EVENT=BEACON_SNR_LOW"
+/** Custom event : Beacon RSSI high */
+#define CUS_EVT_BEACON_RSSI_HIGH	"EVENT=BEACON_RSSI_HIGH"
+/** Custom event : Beacon SNR high */
+#define CUS_EVT_BEACON_SNR_HIGH		"EVENT=BEACON_SNR_HIGH"
+/** Custom event : Max fail */
+#define CUS_EVT_MAX_FAIL		"EVENT=MAX_FAIL"
+/** Custom event : Data RSSI low */
+#define CUS_EVT_DATA_RSSI_LOW		"EVENT=DATA_RSSI_LOW"
+/** Custom event : Data SNR low */
+#define CUS_EVT_DATA_SNR_LOW		"EVENT=DATA_SNR_LOW"
+/** Custom event : Data RSSI high */
+#define CUS_EVT_DATA_RSSI_HIGH		"EVENT=DATA_RSSI_HIGH"
+/** Custom event : Data SNR high */
+#define CUS_EVT_DATA_SNR_HIGH		"EVENT=DATA_SNR_HIGH"
+/** Custom event : Link Quality */
+#define CUS_EVT_LINK_QUALITY		"EVENT=LINK_QUALITY"
+/** Custom event : Port Release */
+#define CUS_EVT_PORT_RELEASE		"EVENT=PORT_RELEASE"
+/** Custom event : Pre-Beacon Lost */
+#define CUS_EVT_PRE_BEACON_LOST		"EVENT=PRE_BEACON_LOST"
+
+/** Custom event : Host Sleep activated */
+#define CUS_EVT_HS_ACTIVATED		"HS_ACTIVATED "
+/** Custom event : Host Sleep deactivated */
+#define CUS_EVT_HS_DEACTIVATED		"HS_DEACTIVATED "
+/** Custom event : Host Sleep wakeup */
+#define CUS_EVT_HS_WAKEUP		"HS_WAKEUP"
+
+/** Custom event : Heart Beat */
+#define CUS_EVT_HEART_BEAT		"EVENT=HEART_BEAT"
+
+/** Custom event : WEP ICV error */
+#define CUS_EVT_WEP_ICV_ERR		"EVENT=WEP_ICV_ERR"
+
+/** Custom event : Channel Switch Announcment */
+#define CUS_EVT_CHANNEL_SWITCH_ANN	"EVENT=CHANNEL_SWITCH_ANN"
+
+/** Custom event : BW changed */
+#define CUS_EVT_BW_CHANGED		"EVENT=BW_CHANGED"
+/** Custom event : OBSS scan parameter */
+#define CUS_EVT_OBSS_SCAN_PARAM		"EVENT=OBSS_SCAN_PARAM"
+/** Custom indiciation message sent to the application layer for WMM changes */
+#define WMM_CONFIG_CHANGE_INDICATION  "WMM_CONFIG_CHANGE.indication"
+
+#ifdef UAP_SUPPORT
+/** Custom event : STA connected */
+#define CUS_EVT_STA_CONNECTED           "EVENT=STA_CONNECTED"
+/** Custom event : STA disconnected */
+#define CUS_EVT_STA_DISCONNECTED        "EVENT=STA_DISCONNECTED"
+#endif
+/** NF value for default scan */
+#define MRVDRV_NF_DEFAULT_SCAN_VALUE		(-96)
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
+/** Add event */
+#define IWE_STREAM_ADD_EVENT(i, c, e, w, l) iwe_stream_add_event((i), (c), (e), (w), (l))
+/** Add point */
+#define IWE_STREAM_ADD_POINT(i, c, e, w, p) iwe_stream_add_point((i), (c), (e), (w), (p))
+/** Add value */
+#define IWE_STREAM_ADD_VALUE(i, c, v, e, w, l)  iwe_stream_add_value((i), (c), (v), (e), (w), (l))
+#else
+/** Add event */
+#define IWE_STREAM_ADD_EVENT(i, c, e, w, l) iwe_stream_add_event((c), (e), (w), (l))
+/** Add point */
+#define IWE_STREAM_ADD_POINT(i, c, e, w, p) iwe_stream_add_point((c), (e), (w), (p))
+/** Add value */
+#define IWE_STREAM_ADD_VALUE(i, c, v, e, w, l)  iwe_stream_add_value((c), (v), (e), (w), (l))
+#endif
+
+/** combo scan header */
+#define WEXT_CSCAN_HEADER		"CSCAN S\x01\x00\x00S\x00"
+/** combo scan header size */
+#define WEXT_CSCAN_HEADER_SIZE		12
+/** combo scan ssid section */
+#define WEXT_CSCAN_SSID_SECTION		'S'
+/** commbo scan channel section */
+#define WEXT_CSCAN_CHANNEL_SECTION	'C'
+/** commbo scan passive dwell section */
+#define WEXT_CSCAN_PASV_DWELL_SECTION	'P'
+/** commbo scan home dwell section */
+#define WEXT_CSCAN_HOME_DWELL_SECTION	'H'
+
+/** band AUTO */
+#define	WIFI_FREQUENCY_BAND_AUTO		0
+/** band 5G */
+#define	WIFI_FREQUENCY_BAND_5GHZ        1
+/** band 2G */
+#define	WIFI_FREQUENCY_BAND_2GHZ		2
+/** All band */
+#define WIFI_FREQUENCY_ALL_BAND         3
+
+/** Rx filter: IPV4 multicast */
+#define RX_FILTER_IPV4_MULTICAST        1
+/** Rx filter: broadcast */
+#define RX_FILTER_BROADCAST             2
+/** Rx filter: unicast */
+#define RX_FILTER_UNICAST               4
+/** Rx filter: IPV6 multicast */
+#define RX_FILTER_IPV6_MULTICAST        8
+
+extern struct iw_handler_def woal_handler_def;
+struct iw_statistics *woal_get_wireless_stats(struct net_device *dev);
+#endif /* _WOAL_WEXT_H_ */
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/README linux-3.0.82x/drivers/net/wireless/wm8782/README
--- linux-3.0.82/drivers/net/wireless/wm8782/README	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/README	2017-09-23 03:42:50.178674575 +0800
@@ -0,0 +1,1765 @@
+===============================================================================
+			U S E R  M A N U A L
+
+ Copyright (C) 2008-2011, Marvell International Ltd. 
+ All Rights Reserved
+
+1) FOR DRIVER BUILD
+
+	Goto source code directory wlan_src/. 
+	make [clean] build	
+	The driver and utility binaries can be found in ../bin_xxxx directory.
+	The driver code supports Linux kernel up to 2.6.39.
+
+2) FOR DRIVER INSTALL
+
+	a) Copy firmware image usb8786_uapsta.bin | ... to /lib/firmware/mrvl/ directory,
+	   create the directory if it doesn't exist. 
+	b) Install WLAN driver
+	   There are drv_mode, max_sta_bss, max_uap_bss etc. module parameters.
+		The bit settings of drv_mode are,
+			Bit 0 :  STA 
+			Bit 1 :  uAP
+			Bit 2 :  WFD
+		max_sta_bss: Maximum number of STA BSS (default 1, max 1)
+		max_uap_bss: Maximum number of uAP BSS (default 1, max 1)
+		max_wfd_bss: Maximum number of WFD BSS (default 0, max 1)
+	   For example, to install USB8786 driver,
+		insmod mlan.ko
+		insmod usb8786.ko [drv_mode=3] [fw_name=mrvl/usb8786_uapsta.bin]
+	   To load driver in STA only mode,
+		insmod mlan.ko
+		insmod usb8786.ko drv_mode=1 [fw_name=mrvl/usb8786_uapsta.bin]
+	   To load driver in uAP only mode,
+		insmod mlan.ko
+		insmod usb8786.ko drv_mode=2 [fw_name=mrvl/usb8786_uapsta.bin]
+
+	   To switch mode between STA only, uAP only and uAPSTA in run time,
+		echo drv_mode=1 > /proc/mwlan/config		// STA mode
+		echo drv_mode=2 > /proc/mwlan/config		// uAP mode
+		echo drv_mode=3 > /proc/mwlan/config		// uAPSTA mode
+	c) Uninstall WLAN driver,
+		ifconfig mlanX down
+		ifconfig uapX down
+		rmmod usb8xxx
+		rmmod mlan
+
+	To load driver with MFG firmware file, use mfg_mode=1 when insmod WLAN driver and 
+	specify MFG firmware name if needed.
+
+	There are some other parameters for debugging purpose etc. Use modinfo to check details.
+	  drvdbg=<bit mask of driver debug message control>
+	  mac_addr=xx:xx:xx:xx:xx:xx <override the MAC address (in hex)>
+	  ps_mode=0|1|2 <use MLAN default | enable IEEE PS mode | disable IEEE PS mode>
+	  max_tx_buf=2048|4096|8192 <maximum AMSDU Tx buffer size>
+	  cfg_11d=0|1|2 <use MLAN default | enable 11d | disable 11d>
+	  req_fw_nowait=0|1 <use request_firmware API (default) | use request_firmware_nowait API>
+	  init_cfg=<init config (MAC addresses, registers etc.) file name>
+		e.g. copy init_cfg.conf to firmware directory, init_cfg=mrvl/init_cfg.conf
+	  cal_data_cfg=<CAL data config file name>
+		e.g. copy cal_data.conf to firmware directory, cal_data_cfg=mrvl/cal_data.conf
+
+	Note: On some platforms (e.g. PXA910/920) double quotation marks ("") need to used 
+	for module parameters.
+		insmod sd8xxx.ko "<para1> <para2> ..."
+
+3) FOR DRIVER PROC & DEBUG
+
+	The following info are provided in /proc/net/mwlan/mlanX/info,
+	on kernel 2.6.24 or later, the entry is /proc/mwlan/mlanX/info.
+
+	driver_name = "wlan"
+	driver_version = <chip id, firmware version and driver version>
+	interface_name = "mlanX"
+	bss_mode = "Ad-hoc" | "Managed" | "Auto" | "Unknown"
+	media_state = "Disconnected" | "Connected"
+	mac_address = <6-byte adapter MAC address>
+	multicase_count = <multicast address count>
+	essid = <current SSID>
+	bssid = <current BSSID>
+	channel = <current channel>
+	region_code = <current region code>
+	multicast_address[n] = <multicast address>
+	num_tx_bytes = <number of bytes sent to device>
+	num_rx_bytes = <number of bytes received from device and sent to kernel>
+	num_tx_pkts = <number of packets sent to device>
+	num_rx_pkts = <number of packets received from device and sent to kernel>
+	num_tx_pkts_dropped = <number of Tx packets dropped by driver>
+	num_rx_pkts_dropped = <number of Rx packets dropped by driver>
+	num_tx_pkts_err = <number of Tx packets failed to send to device>
+	num_rx_pkts_err = <number of Rx packets failed to receive from device>
+	carrier "on" | "off"
+	tx queue "stopped" | "started"
+
+	The following debug info are provided in /proc/net/mwlan/mlanX/debug,
+	on kernel 2.6.24 or later, the entry is /proc/mwlan/mlanX/debug.
+
+	drvdbg = <bit mask of driver debug message control>
+	wmm_ac_vo = <number of packets sent to device from WMM AcVo queue>
+	wmm_ac_vi = <number of packets sent to device from WMM AcVi queue>
+	wmm_ac_be = <number of packets sent to device from WMM AcBE queue>
+	wmm_ac_bk = <number of packets sent to device from WMM AcBK queue>
+	max_tx_buf_size = <maximum Tx buffer size>
+	tx_buf_size = <current Tx buffer size>
+	curr_tx_buf_size = <current Tx buffer size in FW>
+	ps_mode = <0/1, CAM mode/PS mode>
+	ps_state = <0/1/2/3, awake state/pre-sleep state/sleep-confirm state/sleep state>
+	wakeup_dev_req = <0/1, wakeup device not required/required>
+	wakeup_tries = <wakeup device count, cleared when device awake>
+	hs_configured = <0/1, host sleep not configured/configured>
+	hs_activated = <0/1, extended host sleep not activated/activated>
+	pps_uapsd_mode = <0/1, PPS/UAPSD mode disabled/enabled>
+	sleep_pd = <sleep period in milliseconds>
+	qos_cfg = <WMM QoS info>
+	tx_lock_flag = <0/1, Tx lock flag>
+	port_open = <0/1, port open flag>
+	scan_processing = <0/1, scan processing flag>
+	num_tx_timeout = <number of Tx timeout>
+	num_cmd_timeout = <number of timeout commands>
+	timeout_cmd_id = <command id of the last timeout command>
+	timeout_cmd_act = <command action of the last timeout command>
+	last_cmd_id = <command id of the last several commands sent to device>
+	last_cmd_act = <command action of the last several commands sent to device>
+	last_cmd_index = <0 based last command index>
+	last_cmd_resp_id = <command id of the last several command responses received from device>
+	last_cmd_resp_index = <0 based last command response index>
+	last_event = <event id of the last several events received from device>
+	last_event_index = <0 based last event index>
+	num_cmd_h2c_fail = <number of commands failed to send to device>
+	num_cmd_sleep_cfm_fail = <number of sleep confirm failed to send to device>
+	num_tx_h2c_fail = <number of data packets failed to send to device>
+	num_evt_deauth = <number of deauthenticated events received from device>
+	num_evt_disassoc = <number of disassociated events received from device>
+	num_evt_link_lost = <number of link lost events received from device>
+	num_cmd_deauth = <number of deauthenticate commands sent to device>
+	num_cmd_assoc_ok = <number of associate commands with success return>
+	num_cmd_assoc_fail = <number of associate commands with failure return>
+	cmd_sent = <0/1, send command resources available/sending command to device>
+	data_sent = <0/1, send data resources available/sending data to device>
+	cmd_resp_received = <0/1, no cmd response to process/response received and yet to process>
+	event_received = <0/1, no event to process/event received and yet to process>
+	ioctl_pending = <number of ioctl pending>
+	tx_pending = <number of Tx packet pending>
+	rx_pending = <number of Rx packet pending>
+	malloc_count = <number of malloc done>
+	lock_count = <number of lock used>
+	mbufalloc_count = <number of mlan_buffer allocated>
+
+	Use dmesg or cat /var/log/debug to check driver debug messages.
+	To log driver debug messages to file,
+	a) Edit /etc/syslog.conf, add one line "*.debug		/var/log/debug"
+	   on kernel 2.6.24 or later, edit /etc/rsyslog.conf instead
+	b) touch /var/log/debug (if the file doesn't exist)
+	c) service syslog restart
+	   on kernel 2.6.24 or later, service rsyslog restart
+
+	Update /proc/sys/kernel/printk to change message log levels.
+	For example,
+	echo 6 > /proc/sys/kernel/printk    (messages with a higher priority than 6 
+	                                     will be printed to the console)
+	echo 15 > /proc/sys/kernel/printk   (all messages will be printed to console)
+
+4) FOR IWPRIV COMMAND
+
+NAME
+	This manual describes the usage of private commands used in Marvell MLAN
+	Linux Driver.
+
+	To use parameters as hex format, a '0x' must precede it for the parameters to 
+	be parsed properly. 
+
+SYNOPSIS
+	iwpriv <mlanX> <command> [sub-command] ...
+
+	iwpriv mlanX version
+	iwpriv mlanX verext
+	iwpriv mlanX getsignal [m] [n]
+	iwpriv mlanX antcfg [m]
+	iwpriv mlanX regioncode [n]
+	iwpriv mlanX wwscfg [m]
+	iwpriv mlanX esuppmode
+	iwpriv mlanX passphrase <ssid/psk/passphrase>
+	iwpriv mlanX httxcfg <m>
+	iwpriv mlanX htcapinfo <m>
+	iwpriv mlanX addbapara <m> <n> <o>
+	iwpriv mlanX aggrpriotbl <n>
+	iwpriv mlanX addbareject <n>
+	iwpriv mlanX txbufcfg
+	iwpriv mlanX amsduaggrctrl <n>
+	iwpriv mlanX httxbfcap [cap]
+	iwpriv mlanX usbsuspend
+	iwpriv mlanX usbresume
+	iwpriv mlanX hscfg [condition [[GPIO# [gap]]]]
+	iwpriv mlanX hssetpara condition [GPIO# [gap]]
+	iwpriv mlanX deauth [n]
+	iwpriv mlanX radioctrl
+	iwpriv mlanX reassoctrl [n]
+	iwpriv mlanX adhocaes
+	iwpriv mlanX bandcfg [l] [m] [n] [o]
+	iwpriv mlanX getlog
+	iwpriv mlanX 11dcfg
+	iwpriv mlanX 11dclrtbl
+	iwpriv mlanX wmmcfg [n]
+	iwpriv mlanX txpowercfg [<RateIndex> [<MinPwr> [<MaxPwr> <step>]]]
+	iwpriv mlanX qoscfg
+	iwpriv mlanX getdatarate
+	iwpriv mlanX txratecfg [n]
+	iwpriv mlanX bcninterval [n]
+	iwpriv mlanX sysclock [clk1] [clk2] [clk3] [clk4]
+	iwpriv mlanX drvdbg [n]
+	iwpriv mlanX warmreset
+	iwpriv mlanX heartbeat [<hTime> <dTime>]
+	iwpriv mlanX regrdwr <type> <offset> [value]
+	iwpriv mlanX rdeeprom <offset> <length>
+	iwpriv mlanX memrdwr <address> [value]
+	iwpriv mlanX inactivityto <n> <m> <l> [k]
+	iwpriv mlanX scancfg [t] [m] [p] [s] [a] [b]
+	iwpriv mlanX sleeppd [n]
+	iwpriv mlanX pscfg [k] [d] [l] ...
+	iwpriv mlanX sleepparams [<p1> <p2> <p3> <p4> <p5> <p6>]
+	iwpriv mlanX authtype [n]
+	iwpriv mlanX powercons [n]
+	iwpriv mlanX ipaddr ["<op>;<ipaddr>"]
+	iwpriv mlanX macctrl [n]
+	iwpriv mlanX thermal
+
+DESCRIPTION
+	Those commands are used to send additional commands to the Marvell MLAN
+	card via the Linux device driver.
+
+	The mlanX parameter specifies the network device that is to be used to 
+	perform this command on. It could be mlan0, mlan1 etc.
+
+version	
+	This is used to get the current version of the driver and the firmware.
+
+verext
+	Retrieve and display an extended version string from the firmware
+
+	Usage:
+		iwpriv mlanX verext [#]
+
+	where [#] is an optional argument to retrieve a specific version string,
+	omission of the argument retrieves the 0 indexed string.
+
+getsignal
+	This command gets the last and average value of RSSI, SNR and NF of
+	Beacon and Data.
+	Note: This command is available only when STA is connected.
+
+	where value of m is:
+		1   -- RSSI (Receive Signal Strength Indication)
+		2   -- SNR (Signal to Noise Ratio)
+		3   -- NF (Noise Floor)
+	where value of n is:
+		1   -- Beacon last
+		2   -- Beacon average
+		3   -- Data last
+		4   -- Data average
+
+	Examples:
+		iwpriv mlan0 getsignal 1        : Get the RSSI info (beacon last, beacon
+		                                  average, data last and data average)
+		iwpriv mlan0 getsignal 3 4      : Get the NF of data average
+		iwpriv mlan0 getsignal 2 1      : Get the SNR of beacon last
+		iwpriv mlan0 getsignal          : Get all of the signal info
+		mlan0     getsignal:-32  -33  -35  -36  67  59  63  56  -99  -92  -98  -92
+		RSSI info: beacon last -32, beacon average -33, data last -35, data average -36
+		SNR info: beacon last 67, beacon average 59, data last 63, data average 56
+		NF info: beacon last -99, beacon average -92, data last -98, data average -92
+
+antcfg
+	This command is used to set/get the mode of Tx/Rx antenna. 
+
+	where value of m is:
+		Bit 0   -- Tx/Rx antenna 1.
+		Bit 1   -- Tx/Rx antenna 2.
+		...
+		0xFFFF  -- Tx/Rx antenna diversity.
+
+	Examples:
+		iwpriv mlan0 antcfg             : Get Tx/Rx antenna mode
+		iwpriv mlan0 antcfg 1           : Set Tx/Rx antenna 1
+		iwpriv mlan0 antcfg 0xFFFF      : Set Tx/Rx antenna diversity
+
+regioncode
+	This command is used to set/get the region code in the station.
+	Note: This command should be issued at beginning before band/channel selection
+	and association.
+
+	where value is 'region code' for various regions like
+	USA FCC, Canada IC, Europe ETSI, Japan ...
+	The special code (0xff) is used for Japan to support channel 1-14 in B/G/N mode.
+
+	Examples:
+		iwpriv mlan0 regioncode         : Get region code
+		iwpriv mlan0 regioncode 0x10    : Set region code to USA (0x10)
+
+wwscfg
+	This command is used to set/get the WWS (World Wide Safe) mode.
+
+	where value of m is:
+		0       -- Disable WWS mode (default)
+		1       -- Enable WWS mode
+
+	Examples:
+		iwpriv mlan0 wwscfg             : Get WWS mode
+		iwpriv mlan0 wwscfg 1           : Enable WWS mode
+		iwpriv mlan0 wwscfg 0           : Disable WWS mode
+
+esuppmode
+	This command is used to get the current RSN mode and active pairwise/group 
+    cipher for WPA/WPA2 mode.
+	Note: This command is available only when STA is connected.
+
+	These are bits settings used to indicate each RSN mode.
+		Bit 0    : No RSN
+		Bit 1-2  : RFU
+		Bit 3    : WPA
+		Bit 4    : WPA-NONE
+		Bit 5    : WPA2
+		Bit 6    : AES
+		Bit 7-15 : RFU
+
+	These are bits settings used to indicate each pairwise and group cipher.
+		Bit 0    : RFU
+		Bit 1    : RFU
+		Bit 2    : TKIP
+		Bit 3    : AES
+		Bit 2-7  : RFU
+
+	Example:
+		iwpriv mlan0 esuppmode          : Get RSN mode and pairwise/group cipher
+		8 4 4
+		(The current RSN mode is WPA, active pairwise cipher is TKIP and 
+		 active group cipher is TKIP.)
+
+passphrase
+	This command is used to set/get passphrase for WPA-PSK/WPA2-PSK mode.
+	
+	Where <n>		
+		ASCII string for ssid/passphrase/psk.
+	
+	1) "0;<ssid=valid ssid>" - This will get the passphrase, AKMP 
+	   for specified ssid, if none specified then it will get all.
+	            
+	Example:
+		iwpriv mlan0 passphrase "0;ssid=marvell"
+
+	2) "1;<psk=64 byte hexpsk>;<passphrase=1-63 byte passphare>
+	   <ssid=valid ssid>" - Passphrase and psk cannot be provided for the same SSID. 
+	   This command takes only one SSID at a time, If ssid= is present it should contain 
+	   a passphrase or psk. If no arguments are provided then AKMP=802.1x, and passphrase 
+	   should be provided after association.
+	   End of each parameter should be followed by a ';'(except for the last parameter) 
+	   as the delimiter. If ';' or '/' has to be used in an SSID then a '/' should be preceded 
+	   to ';' or '/' as a escape.
+	            
+	Examples:
+		iwpriv mlan0 passphrase "1;ssid=mrvlAP;passphrase=abcdefgd"
+		iwpriv mlan0 passphrase "1;ssid=mrvl AP;psk=<64 bytes hexpsk>"
+
+		If user wants to input the ssid as "mrvl; AP" then command has to be
+		iwpriv mlan0 passphrase "1;ssid=mrvl/; AP;passphrase=abcdefgh"
+
+		If user wants to input the ssid as "//;" then command has to be
+		iwpriv mlan0 passphrase "1;ssid=/////;;passphrase=abcdefgh"
+
+	3) "2;<ssid=valid ssid>" - This will clear the passphrase 
+	   for specified ssid, if none specified then it will clear all.
+	            
+	Examples:
+		iwpriv mlan0 passphrase "2;ssid=marvell"
+		iwpriv mlan0 passphrase "2"     : Clear all profiles and disable embedded supplicant
+
+httxcfg
+	This command is used to configure various 11n specific configuration 
+	for transmit (such as Short GI, Channel BW and Green field support)
+
+	where <m>
+	This is a bitmap and should be used as following
+		Bit 15-7: Reserved set to 0
+		Bit 6: Short GI in 40 Mhz enable/disable
+		Bit 5: Short GI in 20 Mhz enable/disable
+		Bit 4: Green field enable/disable
+		Bit 3-2: Reserved set to 0
+		Bit 1: 20/40 Mhz enable disable.
+		Bit 0: Reserved set to 0
+
+	When Bit 1 is set then firmware could transmit in 20Mhz or 40Mhz based
+	on rate adaptation. When this bit is reset then firmware will only
+	transmit in 20Mhz.
+
+	iwpriv mlanX httxcfg 0x62
+	This will enable 20/40 and Short GI but will disable Green field.
+
+	iwpriv mlanX httxcfg 0x30
+	This will enable Short GI and Green field.
+
+	The default value is 0x20
+
+	Note:- If 20/40 MHz support is disabled in htcapinfo, device will not transmit
+	in 40 MHz even 20/40 MHz is enabled in httxcfg.
+
+htcapinfo
+	This command is used to configure some of parameters in HTCapInfo IE 
+	(such as Short GI, Channel BW, and Green field support)
+
+	where <m>
+	This is a bitmap and should be used as following
+		Bit 29: Green field enable/disable
+		Bit 26: Rx STBC Support enable/disable. (As we support
+			single spatial stream only 1 bit is used for Rx STBC)
+		Bit 24: Short GI in 40 Mhz enable/disable
+		Bit 23: Short GI in 20 Mhz enable/disable
+		Bit 17: 20/40 Mhz enable disable.
+		Bit  8: Enable/disable 40Mhz Intolarent bit in ht capinfo.
+		        0 will reset this bit and 1 will set this bit in
+		        htcapinfo attached in assoc request.
+		All others are reserved and should be set to 0.
+
+	Setting of any other bits will return error.
+
+	iwpriv mlanX htcapinfo 0x1820000
+	This will enable Short GI, Channel BW to 20/40 and disable Green field support.
+
+	iwpriv mlanX htcapinfo 0x800000
+	This will enable Short GI, Channel BW to 20 only, No Rx STBC support and disable Green field support.
+
+	The default value is 0x4800000
+
+	Note:- This command can be issued any time but it will only come to effect from
+	next association. (as HTCapInfo is sent only during Association).
+
+addbapara
+	This command can be used to update the default ADDBA parameters.
+
+	where <m> is <timeout>
+	<timeout> - This is the block ack timeout for ADDBA request. 
+		0 : Disable (recommended for throughput test)
+		1 - 65535 : Block Ack Timeout in TU
+
+	where <n> is <txwinsize>
+	<txwinsize> - Window size for ADDBA request. (32 is recommended and default value)
+
+	where <o> is <rxwinsize>
+	<rxwinsize> - Window size for ADDBA response. (16 is recommended value for most APs, 64
+			      is recommended for AP85)
+
+	Current window size limit for Tx as well as Rx is 1023.
+
+	eg:
+	iwpriv mlanX addbapara - This command will get the current addba params
+	iwpriv mlanX addbapara 1000 64 5 - This will change the ADDBA timeout to (1000 * 1024) us,
+			txwinsize to 64 and rxwinsize to 5.
+
+	The default setting is 65535 32 16.
+
+	In case the ADDBA timeout value is updated then a ADDBA is sent for all streams 
+	to update the timeout value.
+
+	In case txwinsize and/or rxwinsize is updated, the effect could only be seen on
+	next ADDBA request/response. The current streams will not be affected with this
+	change.
+
+aggrpriotbl
+	This command is used set/get the priority table for AMPDU/AMSDU traffic per tid.
+	This command can also be used to disable AMPDU/AMSDU for a given tid.
+	In case of AMPDU this priority table will be used to setup block ack (to make
+	sure the highest priority tid always uses AMPDU as we have limited AMPDU streams)
+
+	where <m0> <n0> <m1> <n1> ... <m7> <n7>
+
+	<mx> - This is priority for Tid0 for AMPDU packet. A priority could be any 
+		   values between 0 - 7, 0xff to disable aggregation.
+	<nx> - This is priority for Tid0 for AMSDU packet. A priority could be any 
+		   values between 0 - 7, 0xff to disable aggregation.
+
+	eg:
+	iwpriv mlanX aggrpriotbl - This command will get the current Priority table for AMPDU and AMSDU.
+						  <2 2 0 0 1 1 3 3 4 4 5 5 255 255 255 255>. This is read as
+						  <"Prio for AMPDU for Tid0" "Prio for AMSDU for Tid0" 
+						   "Prio for AMPDU for Tid1" "Prio for AMSDU for Tid1" and so on
+	iwpriv mlanX aggrpriotbl 2 2 0 0 1 1 3 3 4 4 5 5 255 255 255 255 - 
+						This will set the priority table for AMPDU and AMSDU
+						Priority for Tid0/AMPDU = 2, Tid0/AMSDU = 2, Tid1/AMPDU = 0, Tid1/AMSDU = 0
+						and so on. Aggregation for Tid6 and Tid7 are disabled. 
+						Here higher the priority number, higher the priority (i.e. 7 
+						has higher priority than 6). Similarly for AMSDU.
+	iwpriv mlanX aggrpriotbl 0xff 2 0xff 0 0xff 1 0xff 3 0xff 4 0xff 5 0xff 0xff 0xff 0xff - This will disable
+						AMPDU for all the TIDs but will still keep AMSDU enabled to Tid0 to Tid5
+
+	The default setting is 2 255 0 255 1 255 3 255 4 255 5 255 255 255 255 255.
+
+	A delBA should be seen in case a disable happens on a TID for which AMPDU stream 
+	is currently setup. 
+
+	Note:- This command should only be issue in disconnected state.
+
+addbareject
+	This command is used set/get the addbareject table for all the TIDs.
+	This command can also be used to enable rejection of ADDBA requests for a given tid.
+
+	where <m0> <m1> ... <m7>
+
+	<mX> - This can be 0/1 for TidX. 1 enables rejection of ADDBA request for TidX and 
+		   0 would accept any ADDBAs for TidX.
+
+	eg:
+	iwpriv mlanX addbareject - This command will get the current table.
+	    [0 0 0 0 0 0 0 0]. ADDBA would be accepted for all TIDs. This is the default state.
+
+	iwpriv mlanX addbareject 0 0 1 1 0 0 0 0 - This command will accept ADDBA requests for
+		Tid [0,1,4,5,6,7] and reject ADDBA requests for Tid [2,3]
+							
+	iwpriv mlanX addbareject 1 1 1 1 1 1 1 1 - This will enable rejection of ADDBA requests for
+		all Tids.
+
+	Note:- This command should only be issue in disconnected state.
+
+txbufcfg
+	This command can be used to get current buffer size.  
+
+	eg:
+	iwpriv mlanX txbufcfg 	  - This will display the current buffer size.
+
+	Note:- The actual tx buf size will depends on AP's capability and max transmit buffer size. 
+
+amsduaggrctrl
+	This command could be used to enable/disable a feature where firmware gives feedback to driver
+	regarding the optimal AMSDU buffer size to use with the current rate. Firmware will use the 
+	current rate to decide the buffer size we could transmit. The max buffer size will still be 
+	limited by buffer size provided in txbufcfg. (i.e. if the txbufcfg is 4K, then we could only transmit
+	4K/2K AMSDU packets, if the txbufcfg is 8K then we could transmit 8k/4k/2k based on current rate)
+
+	If enabled AMSDU buffer size at various rates will be as follows
+
+	1.	Legacy B/G rate.
+		No AMSDU aggregation.
+
+	2.	BW20 HT Rate:
+		When TX rate goes down, 
+		MCS 7, 6, 5, 4:
+			a	8K aggregation size (if TX buffer size is 8K)
+			b	4K aggregation size (if TX buffer size is 4K)
+			c	2K aggregation size (if TX buffer size is 2K)
+
+		MCS 3, 2:
+			a	4K aggregation size (if TX buffer size is 8K/4K)
+			b	2K aggregation size (if TX buffer size is 2K)
+
+		MCS 1, 0:
+			a	No aggregation
+
+		When TX rate goes up, 
+		MCS 7, 6, 5:
+			a	8K aggregation size (if TX buffer size is 8K)
+			b	4K aggregation size (if TX buffer size is 4K)
+			c	2K aggregation size (if TX buffer size is 2K)
+
+		MCS 4, 3:
+			a	4K aggregation size (if TX buffer size is 8K/4K)
+			b	2K aggregation size (if TX buffer size is 2K)
+
+		MCS 2, 1, 0:
+			a	No aggregation
+
+	3.	BW40 HT Rate:
+		When TX rate goes down, 
+		MCS 7, 6, 5, 4, 3, 2, 1:
+			a	8K aggregation size (if TX buffer size is 8K)
+			b	4K aggregation size (if TX buffer size is 4K)
+			c	2K aggregation size (if TX buffer size is 2K)
+
+		MCS 0:
+			a	No aggregation
+
+		When TX rate goes up, 
+		MCS 7, 6, 5, 4, 3:
+			a	8K aggregation size (if TX buffer size is 8K)
+			b	4K aggregation size (if TX buffer size is 4K)
+			c	2K aggregation size (if TX buffer size is 2K)
+
+		MCS 2, 1, 0:
+			a	No aggregation
+
+	where <n> is 0/1 (for disable/enable)
+
+	eg:
+	iwpriv mlanx amsduaggrctrl 1 - Enable this feature
+	iwpriv mlanx amsduaggrctrl 0 - Disable this feature
+	iwpriv mlanx amsduaggrctrl - This will get the enable/disable flag
+	and the current AMSDU buffer size). The AMSDU buffer size returned is only
+	valid after association as before association there is no rate info.
+
+	Note:- This command to enable/disable could be given anytime (before/after
+			association). This feature is enabled by default by the driver during
+			initialization.
+
+httxbfcap
+	This command is used to set/get the TX beamforming capabilities.
+
+	Usage:
+		iwpriv mlanX httxbfcap [cap]
+
+	where the parameters are,
+		cap: TX beamforming capabilities
+			 Bit 0    : Implicit TX BF receiving capable
+			 Bit 1    : RX staggered sounding capable
+			 Bit 2    : TX staggered sounding capable
+			 Bit 3    : RX NDP capable
+			 Bit 4    : TX NDP capable
+			 Bit 5    : Implicit TX BF capable
+			 Bit 6-7  : Calibration
+			         0: - not supported
+			         1: - STA can respond to a calibration request using
+			              the CSI Report, but cannot initiate calibration
+			         2: - reserved
+			         3: - STA can both initiate and respond to a calibration request
+			 Bit 8    : Explicit CSI TX BF capable
+			 Bit 9    : Explicit non-compressed steering capable
+			 Bit 10   : Explicit compressed steering capable
+			 Bit 11-12: Explicit TX BF CSI feedback
+			         0: - not supported
+			         1: - delayed feedback
+			         2: - immediate feedback
+			         3: - delayed and immediate feedback
+			 Bit 13-14: Explicit non-compressed BF feedback capable
+			         0: - not supported
+			         1: - delayed feedback
+			         2: - immediate feedback
+			         3: - delayed and immediate feedback
+			 Bit 15-16: Explicit compressed BF feedback capable
+			         0: - not supported
+			         1: - delayed feedback
+			         2: - immediate feedback
+			         3: - delayed and immediate feedback
+			 Bit 17-18: Minimal grouping
+			         0: - no grouping (STA supports groups of 1)
+			         1: - groups of 1, 2
+			         2: - groups of 1, 4
+			         3: - groups of 1, 2, 4
+			 Bit 19-20: CSI number of beamformer antennas supported
+			         0: - single TX antenna sounding
+			         1: - 2 TX antenna sounding
+			         2: - 3 TX antenna sounding
+			         3: - 4 TX antenna sounding
+			 Bit 21-22: Non-compressed steering number of beamformer antennas supported
+			         0: - single TX antenna sounding
+			         1: - 2 TX antenna sounding
+			         2: - 3 TX antenna sounding
+			         3: - 4 TX antenna sounding
+			 Bit 23-24: Compressed steering number of beamformer antennas supported
+			         0: - single TX antenna sounding
+			         1: - 2 TX antenna sounding
+			         2: - 3 TX antenna sounding
+			         3: - 4 TX antenna sounding
+			 Bit 25-26: CSI max number of rows beamformer supported
+			         0: - single row of CSI
+			         1: - 2 rows of CSI
+			         2: - 3 rows of CSI
+			         3: - 4 rows of CSI
+			 Bit 27-28: Channel estimation capability
+			         0: - 1 space time stream
+			         1: - 2 space time streams
+			         2: - 3 space time streams
+			         3: - 4 space time streams
+			 Bit 29-31: Reserved
+
+	Examples:
+		iwpriv mlan0 httxbfcap             : Get the current TX BF capabilities
+		iwpriv mlan0 httxbfcap 0x0000001F  : Set the TX BF capabilities of the
+		                                     Implicit TX BF receiving capable,
+		                                     RX staggered sounding capable,
+		                                     TX staggered sounding capable,
+		                                     RX NDP capable and TX NDP capable
+
+usbsuspend
+	This command is used to put device to suspend mode.
+	Note: It's only valid on kernel 2.6.24 or later.
+
+usbresume
+	This command is used to resume the device from suspend mode.
+	Note: It's only valid on kernel 2.6.24 or later.
+
+hscfg
+	This command is used to configure the host sleep parameters.
+
+	Usage:
+		iwpriv mlanX hscfg [condition [[GPIO# [gap]]]]
+
+	This command takes one (condition), two (condition and GPIO#) or three 
+	(condition, GPIO# and gap) parameters for set. If no parameter provided, 
+	get is performed.
+
+	where Condition is:
+		bit 0 = 1   -- broadcast data
+		bit 1 = 1   -- unicast data
+		bit 2 = 1   -- mac event
+		bit 3 = 1   -- multicast data
+		bit 6 = 1   -- Wakeup when mgmt frame received.
+
+	The host sleep mode will be canceled if condition is set to -1. The default is 0x7.
+
+	where GPIO is the pin number of GPIO used to wakeup the host. It could be 
+	any valid GPIO pin# (e.g. 0-7) or 0xff (interface, e.g. SDIO will be used 
+	instead). The default is 0xff.
+
+	where Gap is the gap in milliseconds between wakeup signal and wakeup event
+	or 0xff for special setting when GPIO is used to wakeup host. The default is 200.
+
+	The host sleep set except for cancellation will be blocked if host sleep is
+	already activated.
+
+	Examples:
+		iwpriv mlan0 hscfg              : Get current host sleep mode
+		iwpriv mlan0 hscfg -1           : Cancel host sleep mode
+		iwpriv mlan0 hscfg 3            : Broadcast and unicast data
+		                                  Use GPIO and gap set previously
+		iwpriv mlan0 hscfg 2 3          : Unicast data
+		                                  Use GPIO 3 and gap set previously
+		iwpriv mlan0 hscfg 2 1 0xa0     : Unicast data
+		                                  Use GPIO 1 and gap 160 ms
+		iwpriv mlan0 hscfg 2 0xff       : Unicast data
+		                                  Use interface (e.g. SDIO)
+		                                  Use gap set previously
+		iwpriv mlan0 hscfg 4 3 0xff     : MAC event
+		                                  Use GPIO 3
+		                                  Special host sleep mode
+		iwpriv mlan0 hscfg 1 0xff 0xff  : Broadcast data
+		                                  Use interface (e.g. SDIO)
+		                                  Use gap 255ms
+
+hssetpara
+	This command is used to set host sleep parameters.
+
+	Usage:
+		iwpriv mlanX hssetpara Condition [GPIO# [gap]]
+
+	Note:
+	1) The usages of parameters are the same as "hscfg" command.
+	2) The parameters will be saved in the driver and be used when host suspends.
+
+deauth
+	This command is used to send a de-authentication to an arbitrary AP.
+	If [n] is omitted, the driver will deauth the associated AP.
+	If in ad-hoc mode this command is used to stop beacon transmission 
+	from the station and go into idle state.
+
+	When <n> is supplied as a MAC address, the driver will deauth the 
+	  specified AP.  If the AP address matches the driver's associated AP,
+	  the driver will disconnect. Otherwise, the driver remains connected.
+
+radioctrl
+	This command is used to turn on/off the radio.
+	Note: The radio can be disabled only in disconnected state.
+
+	where value of n is:
+		0   -- Disable
+		1   -- Enable
+
+	Examples:
+		iwpriv mlan0 radioctrl 1        : Turn the radio on
+		iwpriv mlan0 radioctrl          : Get radio status
+
+reassoctrl
+	This command is used to turn on/off re-association in driver.
+
+	Usage:
+		iwpriv mlanX reassoctrl [n]
+
+	Where value of n is:
+		0   -- Disable
+		1   -- Enable
+
+	Examples:
+		iwpriv mlan0 reassoctrl         : Get re-association status
+		iwpriv mlan0 reassoctrl 1       : Turn re-association on
+
+adhocaes
+	This command is used to set/get the AES key, when the station is in ad-hoc mode.
+	Note: This command is only available in disconnected state.
+
+	where value can be any 16 byte value.
+
+	Examples:
+		iwpriv mlan0 adhocaes           : Get ad-hoc aes key
+		iwpriv mlan0 adhocaes "1;12345678901234567890123456789012" 
+		                                : Set ad-hoc aes key
+		iwpriv mlan0 adhocaes 2         : Clear ad-hoc aes key
+
+bandcfg
+	This command is used to set/get infra/ad-hoc band.
+	Note: This command is only available in disconnected state.
+
+	Usage:
+		iwpriv mlanX bandcfg [l] [m] [n] [o]
+
+	where the parameters:
+		[l]: Infrastructure band
+		     bit 0: B
+		     bit 1: G
+		     bit 2: A
+		     bit 3: GN
+		     bit 4: AN
+
+		[m]: Ad-hoc start band
+		     bit 0: B
+		     bit 1: G
+		     bit 2: A
+		     bit 3: GN
+		     bit 4: AN
+		[n]: Ad-hoc start channel 
+		[o]: 0 - no secondary channel
+		     1 - secondary channel is above
+		     3 - secondary channel is below            
+	Examples:
+		iwpriv mlan0 bandcfg            : Get infra/ad-hoc band and ad-hoc
+		                                  start channel configurations
+		iwpriv mlan0 bandcfg 1          : Set infra band to B only
+		iwpriv mlan0 bandcfg 3 2 6      : Set infra band to B/G, ad-hoc start band
+		                                  to G and ad-hoc start channel to 6
+		iwpriv mlan0 bandcfg 7 11 6 1   : Set infra band to B/G/A, ad-hoc start band 
+		                                  to B/G/GN, ad-hoc start channel to 6 and
+		                                  secondary channel to above
+
+getlog
+	This command is used to get the statistics available in the station.
+
+11dcfg
+	This command is used to control 11D. No argument is used to get.
+
+	where value of n is:
+		0   -- Disable
+		1   -- Enable
+
+	Examples:
+		iwpriv mlan0 11dcfg 1           : Enable 11D
+		iwpriv mlan0 11dcfg             : Get 11D status
+
+11dclrtbl
+	This command is used to clear the 11D channel table.
+
+	Usage:
+		iwpriv mlanX 11dclrtbl
+
+wmmcfg
+	This command is used to control WMM. No argument is used to get.
+
+	where value of n is:
+		0   -- Disable
+		1   -- Enable
+
+	Examples:
+		iwpriv mlan0 wmmcfg 1           : Enable WMM
+		iwpriv mlan0 wmmcfg             : Get WMM status
+
+txpowercfg
+	This command is used to get/set the Tx power configuration.
+
+	Where 
+		<RateIndex> - Data rate index
+			0	1 Mbps
+			1	2 Mbps
+			2	5.5 Mbps
+			3	11 Mbps
+			4	6 Mbps
+			5	9 Mbps
+			6	12 Mbps
+			7	18 Mbps
+			8	24 Mbps
+			9	36 Mbps
+			10	48 Mbps
+			11	54 Mbps
+			12	MCS0 (BW20)
+			13	MCS1 (BW20)
+			14	MCS2 (BW20)
+			15	MCS3 (BW20)
+			16	MCS4 (BW20)
+			17	MCS5 (BW20)
+			18	MCS6 (BW20)
+			19	MCS7 (BW20)
+			140	MCS0 (BW40)
+			141	MCS1 (BW40)
+			142	MCS2 (BW40)
+			143	MCS3 (BW40)
+			144	MCS4 (BW40)
+			145	MCS5 (BW40)
+			146	MCS6 (BW40)
+			147	MCS7 (BW40)
+			0xff	Default
+		<MinPwr> - Minimum power level in dBm
+		<MaxPwr> - Maximum power level in dBm
+		<step>   - Power step
+
+	Note: Firmware may adjust the setting if over limit, final value can be 
+	      verified using get command.
+
+	Examples:
+		iwpriv mlan0 txpowercfg 0xff        : Default power configuration
+		iwpriv mlan0 txpowercfg 11 12       : Set power level 12 dBm to data rate 54 Mbps
+		iwpriv mlan0 txpowercfg 7 11 16 1   : Set power level 11 dBm to 16 dBm with
+		                                      step 1 to data rate 18 Mbps
+		iwpriv mlan0 txpowercfg             : Get current configuration
+		mlan0     txpowercfg:2  3  13  18  2  1  1  13  18  2  0  0  13  18  2  
+		10  11  13  15  2  8  9  13  16  2  6  7  13  17  2  4  5  13  17  2  
+		17  19  13  15  2  15  16  13  16  2  13  14  13  17  2  12  12  13  17  2  
+		145  147  13  14  1  143  144  13  14  1  141  142  13  14  1  140  140  13  14  1 
+
+		 2 -> First rate index is 5.5 Mbps.
+		 3 -> Last rate index is 11 Mbps.
+		13 -> Min Tx power value is 13 dBm.
+		18 -> Max Tx power value is 18 dBm.
+		 2 -> Power adjustment step value is 2.
+
+		Similarly
+		17 -> First rate index is MCS5 (BW20).
+		19 -> Last rate index is MCS7 (BW20).
+		13 -> Min Tx power value is 13 dBm.
+		15 -> Max Tx power value is 15 dBm.
+		 2 -> Power adjustment step value is 2.
+
+		so on...
+
+qoscfg
+	This command sets WMM IE QOS info when an argument is given, and gets current WMM
+	IE QOS info when no argument is given.
+
+	Examples:
+		iwpriv mlan0 qoscfg 0x0f        : Set WMM IE QOS info to 0x0f
+		iwpriv mlan0 qoscfg             : Get WMM IE QOS info
+
+getdatarate
+	This command is used to get the data rate (index) being used in last Tx 
+	packet and last Rx packet.
+
+txratecfg
+	This command is used to set/get the transmit data rate.
+	
+	Note: 
+	1) The data rate can be set only after association. 
+	
+	2) If the reassoc is OFF driver reset the data rate to auto if the connection state is disconnected.
+	Please note that user has to re-issue the set data rate command if the driver is disconnected.
+	
+	3) If the reassoc is ON driver remembers the data rate set by the user, if the driver is 
+	disconnected user does not have to re-issue the set data rate again.
+	
+	Where <n>
+		 data rate
+				Data rate
+			0	1 Mbps
+			1	2 Mbps
+			2	5.5 Mbps
+			3	11 Mbps
+			4	6 Mbps
+			5	9 Mbps
+			6	12 Mbps
+			7	18 Mbps
+			8	24 Mbps
+			9	36 Mbps
+			10	48 Mbps
+			11	54 Mbps
+			12	MCS0
+			13	MCS1
+			14	MCS2
+			15	MCS3
+			16	MCS4
+			17	MCS5
+			18	MCS6
+			19	MCS7
+			44	MCS32
+			0xff	Auto
+
+	Examples:
+		iwpriv mlan0 txratecfg 3        : Set fixed Tx rate to 11 Mbps
+		iwpriv mlan0 txratecfg 11       : Set fixed Tx rate to 54 Mbps	
+		iwpriv mlan0 txratecfg 15       : Set fixed Tx rate to MCS3	
+		iwpriv mlan0 txratecfg 0xff     : Disable fixed rate and uses auto rate
+		iwpriv mlan0 txratecfg          : Read the current data rate setting
+
+bcninterval
+	This command is used to set/get the beacon interval in ad-hoc mode.
+	The valid beacon interval is between 20 - 1000, default beacon
+	interval is 100.
+
+	Where <n>
+		Beacon interval in TU (Time Unit: 1024 us).
+
+	Examples:
+		iwpriv mlan0 bcninterval 200    : Set ad-hoc beacon interval to 200
+		iwpriv mlan0 bcninterval        : Get ad-hoc beacon interval
+
+sysclock
+	This command is used to set/get system clocks in MHz.
+	The current system clock, configurable system clocks and all of the 
+	supported system clocks will be returned if no parameter provided.
+
+	Examples:
+		iwpriv mlan0 sysclock           : Get system clocks
+		80 80 128 128 128 5 11 16 20 22 32 40 44 64 80 106 128 160
+		(The current system clock is 80 MHz.
+		 The configurable system clocks of non-security, security, non-security 
+		 A-MPDU and security A-MPDU are 80 MHz, 128 MHz, 128 MHz and 128 MHz.
+		 The supported system clocks are 5 MHz, 11 MHz, ..., 160 MHz.)
+
+		iwpriv mlanX sysclock 80        : Set system clock in non-security mode
+		                                  to 80 MHz, no change for others
+		iwpriv mlanX sysclock 0 0 128   : Set system clock in non-security A-MPDU 
+		                                  mode to 128 MHz, no changes for others
+
+drvdbg
+	This command is used to set/get the bit masks of driver debug message control.
+
+	Usage:
+		iwpriv mlanX drvdbg [n]
+
+	Where the parameter <n> is the generic debug message control bit mask.
+	The following types of driver debug messages can be dynamically enabled or 
+	disabled by setting or clearing the corresponding bits, 
+		bit 0:  MMSG  		PRINTM(MMSG,...)
+		bit 1:  MFATAL		PRINTM(MFATAL,...)
+		bit 2:  MERROR		PRINTM(MERROR,...)
+		bit 3:  MDATA 		PRINTM(MDATA,...)
+		bit 4:  MCMND 		PRINTM(MCMND,...)
+		bit 5:  MEVENT		PRINTM(MEVENT,...)
+		bit 6:  MINTR 		PRINTM(MINTR,...)
+		bit 7:  MIOCTL 		PRINTM(MIOCTL,...)
+		...
+		bit 16: MDAT_D		PRINTM(MDAT_D,...), DBG_HEXDUMP(MDAT_D,...)
+		bit 17: MCMD_D		PRINTM(MCMD_D,...), DBG_HEXDUMP(MCMD_D,...)
+		bit 18: MEVT_D		PRINTM(MEVT_D,...), DBG_HEXDUMP(MEVT_D,...)
+		bit 19: MFW_D		PRINTM(MFW_D,...),  DBG_HEXDUMP(MFW_D,...)
+		bit 20: MIF_D 		PRINTM(MIF_D,...),  DBG_HEXDUMP(MIF_D,...)
+		...
+		bit 28: MENTRY		PRINTM(MENTRY,...), ENTER(), LEAVE()
+		bit 29: MWARN 		PRINTM(MWARN,...)
+		bit 30: MINFO 		PRINTM(MINFO,...)
+
+	If CONFIG_DEBUG=2, all kinds of debug messages can be configured. 
+
+	If CONFIG_DEBUG=1, all kinds of debug messages can be configured except 
+	for MENTRY, MWARN and MINFO. By default MMSG, MFATAL and MERROR are enabled.
+
+	Some special debug messages,
+		'*'		// MLAN driver ISR is called (bit 6 MINTR enabled)
+		'|'		// PS awake event is received (bit 5 MEVENT enabled)
+		'_'		// PS sleep event is received (bit 5 MEVENT enabled)
+		'+'		// PS sleep confirm is sent (bit 5 MEVENT enabled)
+
+	Examples:
+		iwpriv mlan0 drvdbg             : Get the current driver debug masks
+		iwpriv mlan0 drvdbg 0           : Disable all the debug messages
+		iwpriv mlan0 drvdbg 7           : Enable MMSG, MFATAL and MERROR messages
+		iwpriv mlan0 drvdbg 0x20037     : Enable MMSG, MFATAL, MEEROR,
+		                                  MCMND, MEVENT and MCMD_D messages
+		iwpriv mlan0 drvdbg -1          : Enable all the debug messages
+
+warmreset
+	This command is used for warm reset of the interface.
+
+	Usage:
+		iwpriv mlanX warmreset
+
+heartbeat
+	This command is used to configure the heart beat.
+	The current heart beat configuration is returned if no parameter provided.
+
+	where the parameters are,
+		hTime: time interval (in 100 ms) of the host to device heart beat,
+		       minimum 10 (1s), 0: disable, -1: no change, 
+		dTime: time interval (in 100 ms) of the device to host heart beat,
+		       minimum 10 (1s), 0: disable, -1: no change
+		delayTime: time interval (in 1 ms) of the device re-attach, 0-65535
+
+	Examples:
+		iwpriv mlan0 heartbeat             : Get the heart beat configuration
+		iwpriv mlan0 heartbeat  0  0  0    : Disable heart beat
+		iwpriv mlan0 heartbeat  0 -1  0    : Disable host to device heart beat, 
+		                                     keep device to host heart beat unchanged,
+		                                     no delay for re-attach
+		iwpriv mlan0 heartbeat -1  10 100  : Keep host to device heart beat unchanged,
+		                                     enable device to host heart beat: 1s,
+		                                     100 ms delay for re-attach
+		iwpriv mlan0 heartbeat  20 30 200  : Enable host to device heart beat: 2s,
+		                                     enable device to host heart beat: 3s,
+		                                     200 ms delay for re-attach
+
+regrdwr
+	This command is used to read/write the adapter register.
+	
+	Usage:
+		iwpriv mlanX regrdwr <type> <offset> [value]
+
+	where the parameters are,
+		<type>:     1:MAC/SOC, 2:BBP, 3:RF, 4:PMIC, 5:CAU
+		<offset>:   offset of register
+		[value]:    value to be written
+	Note: If highest bit of a 32-bit value needs to be set, use negative input.
+	The calculation is -(0xffffffff - value + 1). Range from -0x80000000 to -1.
+
+	Examples:
+		iwpriv mlan0 regrdwr 1 0xa060       : Read the MAC register
+		iwpriv mlan0 regrdwr 1 0xa060 0x12  : Write the MAC register
+		iwpriv mlan0 regrdwr 1 0xa794 -0x80000000
+		                                    : Write 0x80000000 to MAC register
+		iwpriv mlan0 regrdwr 1 0xa794 -0x00000001
+		                                    : Write 0xffffffff to MAC register
+
+rdeeprom
+	This command is used to read the EEPROM contents of the card.
+
+	Usage:
+		iwpriv mlanX rdeeprom <offset> <length>
+
+	where the parameters are,
+		<offset>:   multiples of 4
+		<length>:   4-20, multiples of 4
+
+	Example:
+		iwpriv mlan0 rdeeprom 0 20      : Read 20 bytes of EEPROM data from offset 0
+
+memrdwr
+	This command is used to read/write the adapter memory.
+	
+	Usage:
+		iwpriv mlanX memrdwr <address> [value]
+
+	where the parameters are,
+		<address>:  memory address
+		[value]:    value to be written
+	Note: If highest bit of a 32-bit address/value needs to be set, use negitive input.
+	The calculation is -(0xffffffff - address/value + 1). Range from -0x80000000 to -1.
+
+	Examples:
+		iwpriv mlan0 memrdwr 0x4cf70    : Read memory address 0x4cf70
+		iwpriv mlan0 memrdwr -0x80000000
+		                                : Read memory address 0x80000000
+		iwpriv mlan0 memrdwr -0x7fff6000 -0x40000000
+		                                : Write 0xc0000000 to memory address 0x8000a000
+
+inactivityto
+	This command is used to set/get the inactivity timeout value, which specifies 
+	when WLAN device is put to sleep.
+
+	Usage:
+		iwpriv mlanX inactivityto <n> <m> <l> [k]
+
+	where the parameter are:
+		<n>: timeout unit in microseconds.
+		<m>: Inactivity timeout for unicast data.
+		<l>: Inactivity timeout for multicast data.
+		[k]: Inactivity timeout for new Rx traffic after PS notification to AP.
+
+	Examples:
+		iwpriv mlan0 inactivityto           : Get the timeout value
+		iwpriv mlan0 inactivityto 1000 2 3  : Set timeout unit to 1000 us (1 ms), 
+		                                      inactivity timeout for unicast data is 2 ms,
+		                                      inactivity timeout for multicast data is 3 ms
+
+scancfg
+	This command is used to set/get scan configuration parameters.
+                
+	Usage:
+		iwpriv mlanX scancfg [t] [m] [p] [s] [a] [b]
+                
+	where the parameters:
+		[t]: Scan Type (0: Unchanged, 1: Active, 2: Passive, default Active)
+		[m]: Scan Mode (0: Unchanged, 1: BSS, 2: IBSS, 3: Any, default Any)
+		[p]: Scan Probes (0: Unchanged, 1-4: Number of probes per channel, default 4)
+		[s]: Specific Scan Time (0: Unchanged, n: Value in ms, default 110 ms, max 500 ms)
+		[a]: Active Scan Time (0: Unchanged, n: Value in ms, default 200 ms, max 500 ms)
+		[b]: Passive Scan Time (0: Unchanged, n: Value in ms, default 200 ms, max 2000 ms)
+	No change if the parameter is 0 or the parameter is not provided.
+
+	Examples:
+		iwpriv mlan0 scancfg            : Get all the current scan configuration settings
+		iwpriv mlan0 scancfg 1 3        : Set scan type to active and scan mode to any,
+		                                  all the other scan configurations are unchanged
+		iwpriv mlan0 scancfg 0 1 2 200  : Set scan mode to BSS, number of probes to 2 and 
+		                                  specific scan time to 200 ms, all the other scan 
+		                                  configurations are unchanged
+
+sleeppd
+	This command is used to configure the sleep period of the WLAN device.
+
+	Usage:
+		iwpriv mlanX sleeppd [<period>]
+
+	Where the parameter is:
+		period: sleep period in milliseconds. Range 10~60. 0 for disable.
+
+	Examples:
+		iwpriv mlan0 sleeppd            : Get sleep period configuration
+		iwpriv mlan0 sleeppd 10         : Set sleep period to 10 ms
+
+pscfg
+	This command is used to set/get PS configuration parameters.
+
+	Usage:
+		iwpriv mlanX pscfg [k] [d] [l] ...
+
+	Where the parameters:
+		[k]: Keep alive null packet interval (0: Unchanged, -1: Disable, n: Interval in seconds)
+		[d]: DTIM interval (    0: Unchanged,
+		                      1-5: Value,
+		                    65534: DTIM will be ignored, listen interval will be used,
+		                    65533: Closest DTIM to the listen interval period will be used )
+		[l]: Local listen interval (     0: Unchanged,
+		                                -1: Disable,
+		                              1-49: Value in beacon intervals,
+		                             >= 50: Value in TUs )
+		[a]: Ad-hoc awake period (0: Unchanged, 1-31: Beacon interval, 255: Firmware 
+		                          will go to sleep after beacon send out)
+		[b]: Beacon miss timeout (0: Unchanged, 1-50: Value in milliseconds, 65535: Disable)
+		[p]: Delay to PS (0-65535: Value in milliseconds, default 1000ms)
+		[m]: PS mode (0: Unchanged, 1: Auto mode, 2: PS-Poll mode, 3: PS Null mode)
+	No change if parameters are not provided.
+
+	Examples:
+		iwpriv mlan0 pscfg              : Get all the current PS configuration settings
+		iwpriv mlan0 pscfg 3 4          : Set PS keep alive null packet interval to 3 seconds 
+		                                  and DTIM interval to 4, all the other configurations 
+		                                  are unchanged
+		iwpriv mlan0 pscfg 0 0xfffe 10 0 20 
+		                                : Disable DTIM interval, set local listen interval to 
+		                                  10 beacon intervals and beacon miss interval to 20, 
+		                                  all the other configurations are unchanged
+		iwpriv mlan0 pscfg 0 0 0 0 0 50 : Set delay to PS to 50 ms, keep the others unchanged
+
+sleepparams
+	This command is used to set the sleepclock configurations
+
+	Usage:
+		iwpriv mlanX sleepparams [<p1> <p2> <p3> <p4> <p5> <p6>]
+
+	where:
+		p1 is Sleep clock error in ppm (0-65535)
+		p2 is Wakeup offset in usec (0-65535)
+		p3 is Clock stabilization time in usec (0-65535)
+		p4 is Control periodic calibration (0-2)
+		p5 is Control the use of external sleep clock (0-2)
+		p6 is reserved for debug (0-65535)
+
+	Examples:
+		iwpriv mlan0 sleepparams                      : Get current sleepclock configuration
+		iwpriv mlan0 sleepparams 10 1000 2000 1 0 128 : Set sleepclock configuration
+
+authtype 
+	This command is used to set/get authentication type. 
+
+	Usage:
+		iwpriv mlanX authtype [n]
+
+	where <n>
+		0: 802.11 open system authentication
+		1: 802.11 shared key authentication
+		255: allow open system or shared key authentication (default)
+
+	Examples:
+		iwpriv mlan0 authtype 0         : use open system authentication
+		iwpriv mlan0 authtype 1         : use shared key authentication
+		iwpriv mlan0 authtype 255       : allow open system or shared key authentication
+		iwpriv mlan0 authtype           : get current setting
+
+powercons
+	This command is used to set the local transmit power constraint. 
+	Value is in dbm unit. This command is only used for ad-hoc start.
+
+	Usage:
+		iwpriv mlanX powercons [n]
+
+	Examples:
+		iwpriv mlanX powercons          : get the current setting
+		iwpriv mlanX powercons 12       : set local power constraint to 12 dbm
+
+ipaddr
+	This command is used to set/get IP address. 
+
+	Usage:
+		iwpriv mlanX ipaddr ["<op>;<ipaddr>"]
+
+	where <op>
+		0: Remove the IP address
+		bit 0: Set IP address for broadcast ARP filter, which will be auto enabled
+		       in next host sleep configuration
+		bit 1: Set IP address for auto broadcast ARP response
+
+	Examples:
+		iwpriv mlan0 ipaddr                 : Get current settings
+		iwpriv mlan0 ipaddr "0"             : Remove IP address
+		iwpriv mlan0 ipaddr "1;192.168.0.5" : Set IP address for ARP filter
+		iwpriv mlan0 ipaddr "3;192.168.0.6" : Set IP address for ARP filter 
+		                                    : and auto ARP response
+
+macctrl
+	This command is used to set/get MAC control.
+	It's recommended to read the current setting first to avoid override issue.
+
+	Usage:
+		iwpriv mlanX macctrl [n]
+
+	where <n>
+		bit 0:  Rx enabled
+		bit 1:  Tx enabled
+		bit 3:  WEP enabled
+		bit 4:  EthernetII enabled
+		bit 7:  Promiscuous enabled
+		bit 8:  All multicast enabled
+		bit 9:  RTS/CTS enabled (0: CTS to self)
+		bit 11: Force 11n protection disabled
+		bit 12: Ad-hoc g protection disabled
+		...
+
+	Examples:
+		iwpriv mlan0 macctrl            : Get current MAC control
+		iwpriv mlan0 macctrl 0x13       : Set Tx/Rx on and EthernetII on
+		iwpriv mlan0 macctrl 0x813      : Set Tx/Rx on and EthernetII on
+		                                : Disable force 11n protection
+
+thermal
+	This command is used to get the current thermal reading.
+
+	Examples:
+		iwpriv mlan0 thermal            : Get thermal reading
+
+
+===============================================================================
+		U S E R  M A N U A L  F O R  M L A N C O N F I G 
+
+NAME
+mlanconfig - configure the additional parameters available for the Marvell mdriver.
+
+SYNOPSIS
+mlanconfig -v
+mlanconfig <mlanX> <command> [parameters] ...
+
+mlanconfig mlanX hostcmd <requesttpc.conf> requesttpc
+mlanconfig mlanX hostcmd <crypto_test.conf> crypto_test
+mlanconfig mlanX hostcmd <subevent.conf> subevent_get
+mlanconfig mlanX hostcmd <subevent.conf> subevent_set
+mlanconfig mlanX hostcmd <auto_tx.conf> auto_tx_get
+mlanconfig mlanX hostcmd <auto_tx.conf> nat_keep_alive
+mlanconfig mlanX hostcmd <auto_tx.conf> auto_tx_unreg
+mlanconfig mlanX hostcmd <txrate_cfg.conf> txrate_cfg_get
+mlanconfig mlanX hostcmd <txrate_cfg.conf> txrate_cfg_set_bg
+mlanconfig mlanX hostcmd <txrate_cfg.conf> txrate_cfg_set_bgn
+mlanconfig mlanX hostcmd <txpwrlimit_cfg.conf> txpwrlimit_cfg_get
+mlanconfig mlanX hostcmd <txpwrlimit_cfg.conf> txpwrlimit_2g_cfg_set
+mlanconfig mlanX hostcmd <txpwrlimit_cfg.conf> txpwrlimit_5g_cfg_set
+mlanconfig mlanX hostcmd <pad_cfg.conf> pad_cfg_get
+mlanconfig mlanX hostcmd <pad_cfg.conf> pad_cfg_set
+mlanconfig mlanX hostcmd <11n_2040coex.conf> 2040coex
+mlanconfig mlanX arpfilter <arpfilter.conf>
+mlanconfig mlanX mefcfg <mef.conf>
+mlanconfig mlanX cfgdata <register type> <conf file>
+mlanconfig mlanX setuserscan [ARGS]
+mlanconfig mlanX getscantable [ARGS]
+mlanconfig mlanX addts <filename.conf> <section# of tspec> <timeout in ms>
+mlanconfig mlanX delts <filename.conf> <section# of tspec>
+mlanconfig mlanX qconfig set msdu <lifetime in TUs> [Queue Id: 0-3]
+mlanconfig mlanX qconfig get [Queue Id: 0-3]
+mlanconfig mlanX qconfig def [Queue Id: 0-3]
+mlanconfig mlanX qstats on  [Queue Id: 0-3]
+mlanconfig mlanX qstats off [Queue Id: 0-3]
+mlanconfig mlanX qstats get [Queue Id: 0-3]
+mlanconfig mlanX qstatus
+mlanconfig mlanX ts_status
+mlanconfig mlanX regrdwr <type> <offset> [value]
+mlanconfig mlanX memrdwr <address> [value]
+mlanconfig mlanX customie <index> <mask> <IE buffer>
+
+DESCRIPTION
+
+Those commands are used in Marvell specific application called mlanconfig.
+
+===========
+-v
+	This command is used to display the version of mlanconfig utility.
+	Usage:	
+		mlanconfig -v
+
+hostcmd requesttpc
+	This command is used to request 802.11H TPC info. 
+	
+	Usage:
+		mlanconfig mlanX hostcmd config/requesttpc.conf requesttpc
+
+hostcmd crypto_test
+	This command is used to test the encryption/decryption API of the firmware.
+
+	Usage:
+		mlanconfig mlanX hostcmd config/crypto_test.conf crypto_test
+
+hostcmd subevent_get
+hostcmd subevent_set
+	This command is used to get/set the configurations for event descriptor 
+	interface command.
+	subsvent_get: get subscribed event parameters
+	subsvent_set: set subscribed event parameters
+
+	Usage:
+		mlanconfig mlanX hostcmd config/subevent.conf subevent_get
+		mlanconfig mlanX hostcmd config/subevent.conf subevent_set
+
+hostcmd auto_tx_get
+hostcmd nat_keep_alive
+hostcmd auto_tx_unreg
+	This command is used to configures the Frame Auto Transmission parameters.
+	auto_tx_get: get auto_tx parameters
+	nat_keep_alive: register to firmware for sending NAT Keep Alive packet
+	auto_tx_unreg: unregister to firmware auto_tx
+
+	Usage:
+		mlanconfig mlanX hostcmd config/auto_tx.conf auto_tx_get
+		mlanconfig mlanX hostcmd config/auto_tx.conf nat_keep_alive
+		mlanconfig mlanX hostcmd config/auto_tx.conf auto_tx_unreg
+
+hostcmd txrate_cfg_get
+hostcmd txrate_cfg_set_bg
+hostcmd txrate_cfg_set_bgn
+	This command is used to set/get the transmit data rate.
+
+	Usage:
+		mlanconfig mlanX hostcmd config/txrate_cfg.conf txrate_cfg_get
+		mlanconfig mlanX hostcmd config/txrate_cfg.conf txrate_cfg_set_bg
+		mlanconfig mlanX hostcmd config/txrate_cfg.conf txrate_cfg_set_bgn
+
+hostcmd txpwrlimit_cfg_get
+hostcmd txpwrlimit_2g_cfg_set
+hostcmd txpwrlimit_5g_cfg_set
+	This command is used to set/get the configuration data of Tx power limitation.
+	Note: The configuration set should be issued when STA is disconnected.
+
+	Usage:
+		mlanconfig mlanX hostcmd config/txpwrlimit_cfg.conf txpwrlimit_cfg_get
+		mlanconfig mlanX hostcmd config/txpwrlimit_cfg.conf txpwrlimit_2g_cfg_set
+		mlanconfig mlanX hostcmd config/txpwrlimit_cfg.conf txpwrlimit_5g_cfg_set
+
+hostcmd pad_cfg_get
+hostcmd pad_cfg_set
+	This command is used to set/get the configuration data for PAD OR.
+
+	Usage:
+		mlanconfig mlanX hostcmd config/pad_cfg.conf pad_cfg_get
+		mlanconfig mlanX hostcmd config/pad_cfg.conf pad_cfg_set
+
+hostcmd 2040coex
+	This command is used to send the 11n 20/40 Coex command to firmware. 
+	Firmware will send 11n 20/40 Coex management action frame to AP.
+	
+	Usage:
+		mlanconfig mlanX hostcmd config/11n_2040coex.conf 2040coex
+
+arpfilter
+	This command is used to configure the ARP filtering parameters.
+
+	Usage:
+		mlanconfig mlanX arpfilter config/arpfilter.conf
+
+mefcfg
+	This command is used to set MEF settings.
+
+	Usage:
+		mlanconfig mlanX mefcfg config/mef.conf
+
+cfgdata
+	This command is used to set/get the configuration data to/from firmware.
+
+	Usage:
+		mlanconfig mlanX cfgdata <type> <.conf file name>
+		This command is used to set the cfg data in the .conf file to firmware.
+
+		mlanconfig mlanX cfgdata <type>
+		This command is used to get the cfg data from firmware and display
+		on to the console.
+
+	Where the value of <type> field is:
+		1   -- Optimal Register download and <.conf file name > is or_data.conf
+		2   -- Cal data download and <.conf file name> is cal_data.conf
+		3   -- PMIC data download and <.conf file name> is pmic_data.conf
+
+setuserscan
+	Initiate a customized scan and retrieve the results
+
+	Usage:
+		mlanconfig mlanX setuserscan [ARGS]
+
+	Where [ARGS]:
+	  ssid="[SSID]"            specify a SSID filter for the scan
+	  chan=[chan#][band][mode] where band is [a,b,g,n] and mode is
+	                           blank for active or 'p' for passive
+	  bssid=xx:xx:xx:xx:xx:xx  specify a BSSID filter for the scan
+	  wc="[WILDCARD SSID]"     specify a UNIX pattern matching filter (using *
+	                           and ?) for SSIDs found in a broadcast probe
+	  keep=[0 or 1]            keep the previous scan results (1), discard (0)
+	  dur=[scan time]          time to scan for each channel in milliseconds
+	  probes=[#]               number of probe requests to send on each chan
+	                           for each broadcast probe required and each SSID
+	                           specific probe required (1-4)
+	  type=[1,2,3]             BSS type: 1 (Infra), 2(Adhoc), 3(Any)
+
+	Any combination of the above arguments can be supplied on the command line.
+	If the chan token is absent, a full channel scan will be completed by driver.
+	If the dur or probes tokens are absent, the driver default setting will be 
+	used. The bssid and ssid fields, if blank, will produce an unfiltered scan.
+	It's allowed to input multiple ssid/wc entries, the max entry number is 10.
+	The type field will default to 3 (Any) and the keep field will default to 0 
+	(Discard).
+
+	Examples:
+	1) Perform an active scan on channels 1, 6, and 11 in the 'g' band:
+		setuserscan chan=1g,6g,11g
+
+	2) Perform a passive scan on channel 11 for 20 ms:
+		setuserscan chan=11gp dur=20
+
+	3) Perform an active scan on channels 1, 6, and 11; and a passive scan on
+	   channel 36 in the 'a' band:
+		setuserscan chan=1g,6g,11g,36ap
+
+	4) Perform an active scan on channel 6 and 36 for specific SSID:
+		setuserscan chan=6g,36a ssid=TestAP1 ssid=TestAP2
+
+	5) Scan all available channels (B/G/N, A bands) for a specific BSSID, keep
+	   the current scan table intact, update existing or append new scan data:
+		setuserscan bssid=00:50:43:20:12:82 keep=1
+
+	6) Scan channel 6, for all infrastructure networks, sending two probe
+	   requests.  Keep the previous scan table intact. Update any duplicate
+	   BSSID/SSID matches with the new scan data:
+		setuserscan chan=6g type=1 probes=2 keep=1
+
+	7) Scan channel 1 and 6, for all networks matching the Mrvl*AP
+	   or AP*Mrvl? patterns and for MrvlTst SSID.  Generate 3 broadcast
+	   probes for the patterns and 3 SSID specific probes for MrvlTst on
+	   both channel 1 and channel 6.
+		setuserscan chan=1g,6g probes=3 wc="Mrvl*AP" wc="AP*Mrvl?" ssid="MrvlTst"
+
+	8) Scan all the channels for specified band.
+		setuserscan chan=0g
+
+	All entries in the scan table (not just the new scan data when keep=1)
+	will be displayed upon completion by use of the getscantable ioctl.
+
+getscantable
+	Display the current contents of the driver scan table
+
+	Usage:
+		mlanconfig mlanX getscantable
+		mlanconfig mlanX getscantable [#]
+		mlanconfig mlanX getscantable tsf
+		mlanconfig mlanX getscantable help
+
+	1) Without argument, the entire scantable is displayed.
+	2) Specifying a # will display detailed information about a specific scan
+	   table entry.  '0' displays driver cached information regarding the
+	   current association (if any).
+	3) The tsf argument will display the entire scan table with the recorded
+	   TSF timestamp for the entry.
+	4) The help argument will display the legend for the capability field.
+
+addts
+	Send an ADDTS command to the associated AP.
+
+	Process a given conf file for a specific TSPEC data block.  Send the
+	  TSPEC along with any other IEs to the driver/firmware for transmission
+	  in an ADDTS request to the associated AP.  
+
+	Return the execution status of the command as well as the ADDTS response
+	  from the AP if any.
+
+	Usage:
+		mlanconfig mlanX addts <filename.conf> <section# of tspec> <timeout(ms)>
+
+delts
+	Send a DELTS command to the associated AP.
+
+	Process a given conf file for a specific TSPEC data block.  Send the
+	  TSPEC along with any other IEs to the driver/firmware for transmission
+	  in a DELTS request to the associated AP.  
+ 
+	Return the execution status of the command.  There is no response to a
+	  DELTS from the AP.
+
+	Usage:
+		mlanconfig mlanX delts <filename.conf> <section# of tspec>
+
+qconfig
+	Send a WMM AC Queue configuration command to get/set/default params
+ 
+	Configure or get the parameters of a WMM AC queue. The command takes
+	  an optional Queue Id as a last parameter.  Without the queue id, all
+	  queues will be acted upon.
+ 
+	Usage:  
+		mlanconfig mlanX qconfig set msdu <lifetime in TUs> [Queue Id: 0-3]
+		mlanconfig mlanX qconfig get [Queue Id: 0-3]
+		mlanconfig mlanX qconfig def [Queue Id: 0-3]
+
+qstats
+	Turn on/off or retrieve and clear the queue statistics for an AC
+
+	Turn the queue statistics collection on/off for a given AC or retrieve the
+	  current accumulated stats and clear them from the firmware. The command
+	  takes an optional Queue Id as a last parameter. Without the queue id,
+	  all queues will be acted upon.
+ 
+	Usage:
+		mlanconfig mlanX qstats on  [Queue Id: 0-3]
+		mlanconfig mlanX qstats off [Queue Id: 0-3]
+		mlanconfig mlanX qstats get [Queue Id: 0-3]
+
+qstatus
+	This command retrieves the current status of the WMM queues. If WMM
+	  is enabled then it displays the information for each AC in a table.
+
+	Usage:
+		mlanconfig mlanX qstatus
+
+ts_status
+	This command queries the FW for the status of TSIDs 0 through 7
+	  configured via call admission control and displays the results in a
+	  table.
+
+	Usage:
+		mlanconfig mlanX ts_status
+
+regrdwr
+	This command is used to read/write the adapter register.
+	
+	Usage:
+		mlanconfig mlanX regrdwr <type> <offset> [value]
+
+	where the parameters are,
+		<type>:     1:MAC/SOC, 2:BBP, 3:RF, 4:PMIC, 5:CAU
+		<offset>:   offset of register
+		[value]:    value to be written
+
+	Examples:
+		mlanconfig mlan0 regrdwr 1 0xa060   : Read the MAC register
+		mlanconfig mlan0 regrdwr 1 0xa794 0x80000000
+		                                    : Write 0x80000000 to MAC register
+
+memrdwr
+	This command is used to read/write the adapter memory.
+
+	Usage:
+		mlanconfig mlanX memrdwr <address> [value]
+
+	where the parameters are,
+		<address>:  memory address
+		[value]:    value to be written
+
+	Examples:
+		mlanconfig mlan0 memrdwr 0x80000000  : Read memory address 0x80000000
+		mlanconfig mlan0 memrdwr 0x80000000 0xffffffff 
+		                                     : Write 0xffffffff to memory address 0x80000000
+
+customie
+	This command is used to set or get custom IEs for management frames.
+
+	Usage : customie [INDEX] [MASK] [IEBuffer]
+        empty - Get all IE settings
+        INDEX:  0 - Get/Set IE index 0 setting
+                1 - Get/Set IE index 1 setting
+                2 - Get/Set IE index 2 setting
+                3 - Get/Set IE index 3 setting
+               -1 - Append/Delete IE automatically
+                    Delete will delete the IE from the matching IE buffer
+                    Append will append the IE to the buffer with the same mask
+        MASK :  Management subtype mask value as per bit definitions
+             :  Bit 0 - Association request
+             :  Bit 1 - Association response
+             :  Bit 2 - Reassociation request
+             :  Bit 3 - Reassociation response
+             :  Bit 4 - Probe request
+             :  Bit 5 - Probe response
+             :  Bit 8 - Beacon
+        MASK :  MASK = 0 to clear the mask and the IE buffer
+        IEBuffer :  IE Buffer in hex (max 256 bytes)
+                    The Buffer should not be space separated.
+
+	Example: 
+	 ./mlanconfig mlan0 customie
+		Get IE buffer, subtype mask settings for all indices [0-3].
+
+	./mlanconfig mlan0 customie 1
+		Get IE buffer and subtype mask for the Index = 1.
+
+	./mlanconfig mlan0 customie 2 0
+		Clear IE buffer and mask value for Index = 2. 
+
+	./mlanconfig mlan0 customie 3 0x101 0xdd051234567890
+		Set IE buffer and mask value for Index = 3. 
+ 
+	./mlanconfig mlan0 customie -1 0x101 0xdd051234567890
+		Append the specified IEBuffer at index with mask value of 0x101.
+	
+	./mlanconfig mlan0 customie -1 0 0xdd051234567890
+		Delete the specified IEBuffer from all the IEs at 0-3 index.
+	
+	./mlanconfig mlan0 customie 2 0 0xdd051234567890
+		Delete the specified IEBuffer from the IEs at index 2.
+
+
+===============================================================================
+		U S E R  M A N U A L  F O R  M L A N 2 0 4 0 C O E X 
+
+NAME
+mlan2040coex - This application handles the 11n 20/40 coexistence operation for 
+               the Marvell mdriver
+
+SYNOPSIS
+mlan2040coex [-i <intfname>] [hvB]
+(If intfname not present then mlan0 assumed)
+	-h = Help
+	-v = Version
+	-B = Run the process in background
+
+===============================================================================
+        U S E R  M A N U A L  F O R  MLANEVENT
+
+NAME
+mlanevent.exe 
+
+This tool can be used to listen for and obtain events from the driver
+through the netlink layer.
+
+----------------
+Supported events
+----------------
+STA_DEAUTH
+STA_ASSOC
+BSS_START
+BSS_IDLE
+BSS_ACTIVE
+
+-----------------
+Details of events
+-----------------
+
+STA_DEAUTH
+----------
+    For this event, the following information is shown:
+        + Deauthenticated STA MAC address.
+        + Reason for deauthentication.
+
+STA_ASSOC
+----------
+    For this event, the following information is shown:
+        + STA MAC address.
+
+BSS_START
+----------
+    For this event, the following information is shown:
+        + AP MAC address.
+
+BSS_IDLE
+----------
+    For this event, there is no associated information.
+
+BSS_ACTIVE
+----------
+    For this event, there is no associated information.
+===============================================================================
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/README_UAP linux-3.0.82x/drivers/net/wireless/wm8782/README_UAP
--- linux-3.0.82/drivers/net/wireless/wm8782/README_UAP	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/README_UAP	2017-09-23 03:42:50.182674562 +0800
@@ -0,0 +1,1950 @@
+===============================================================================
+			U S E R  M A N U A L
+
+ Copyright (C) 2009-2011, Marvell International Ltd. 
+ All Rights Reserved
+
+1) FOR DRIVER BUILD
+
+	Goto source code directory wlan_src.
+		make [clean] build
+	The driver binaries can be found in ../bin_xxxx directory.
+	The driver code supports Linux kernel up to 2.6.39.
+
+2) FOR DRIVER INSTALL
+
+	a) Copy firmware image usb8786_uapsta.bin | ... to /lib/firmware/mrvl/ directory,
+	   create the directory if it doesn't exist.
+	b) Install uAP driver,	
+	   For example, to install USB8786 driver,
+		insmod mlan.ko
+		insmod usb8786.ko [fw_name=mrvl/usb8786_uapsta.bin]
+	c) Uninstall uAP driver,
+		ifconfig uapX down
+		rmmod usb8xxx
+		rmmod mlan
+
+3) FOR DRIVER PROC & DEBUG
+	The following info are provided in /proc/mwlan/uapX/info.
+
+	driver_name = "uap"
+	driver_version = <driver version>
+	InterfaceName= "uapX"
+	State= "Disconnected" | "Connected"
+	MACAddress= <6-byte adapter MAC address>
+	MCCount= <multicast address count>
+	num_tx_bytes = <number of bytes sent to device>
+	num_rx_bytes = <number of bytes received from device and sent to kernel> 
+	num_tx_pkts = <number of packets sent to device>
+	num_rx_pkts = <number of packets received from device and sent to kernel>
+	num_tx_pkts_dropped = <number of tx packets dropped by driver>
+	num_rx_pkts_dropped = <number of rx packets dropped by driver>
+	num_tx_pkts_err = <number of tx packets failed to send to device>
+	num_rx_pkts_err = <number of rx packets failed to receive from device>
+	num_tx_timeout =  <number of tx timeout>
+	carrier "on" | "off"
+	tx queue "stopped" | "started"
+
+	The following debug info are provided in /proc/mwlan/uapX/debug.
+
+	drvdbg = <bit masks of driver debug message control>
+		bit 0:  MMSG  		PRINTM(MMSG,...)
+		bit 1:  MFATAL		PRINTM(MFATAL,...)
+		bit 2:  MERROR		PRINTM(MERROR,...)
+		bit 3:  MDATA 		PRINTM(MDATA,...)
+		bit 4:  MCMND 		PRINTM(MCMND,...)
+		bit 5:  MEVENT		PRINTM(MEVENT,...)
+		bit 6:  MINTR 		PRINTM(MINTR,...)
+		bit 7:  MIOCTL 		PRINTM(MIOCTL,...)
+		...
+		bit 16: MDAT_D		PRINTM(MDAT_D,...), DBG_HEXDUMP(MDAT_D,...)
+		bit 17: MCMD_D		PRINTM(MCMD_D,...), DBG_HEXDUMP(MCMD_D,...)
+		bit 18: MEVT_D		PRINTM(MEVT_D,...), DBG_HEXDUMP(MEVT_D,...)
+		bit 19: MFW_D		PRINTM(MFW_D,...),  DBG_HEXDUMP(MFW_D,...)
+		bit 20: MIF_D		PRINTM(MIF_D,...),  DBG_HEXDUMP(MIF_D,...)
+		...
+		bit 28: MENTRY		PRINTM(MENTRY,...), ENTER(), LEAVE()
+		bit 29: MWARN 		PRINTM(MWARN,...)
+		bit 30: MINFO 		PRINTM(MINFO,...)
+	wmm_ac_vo = <number of packets sent to device from WMM AcVo queue>
+	wmm_ac_vi = <number of packets sent to device from WMM AcVi queue>
+	wmm_ac_be = <number of packets sent to device from WMM AcBE queue>
+	wmm_ac_bk = <number of packets sent to device from WMM AcBK queue>
+	max_tx_buf_size = <maximum Tx buffer size>
+	tx_buf_size = <current Tx buffer size>
+	curr_tx_buf_size = <current Tx buffer size in FW>
+	ps_mode = <0/1, CAM mode/PS mode>
+	ps_state = <0/1/2/3, awake state/pre-sleep state/sleep-confirm state/sleep state>
+	wakeup_dev_req = <0/1, wakeup device not required/required>
+	wakeup_tries = <wakeup device count, cleared when device awake>
+	hs_configured = <0/1, host sleep not configured/configured>
+	hs_activated = <0/1, extended host sleep not activated/activated>
+	num_tx_timeout = <number of Tx timeout>
+	num_cmd_timeout = <number of timeout commands>
+	timeout_cmd_id = <command id of the last timeout command>
+	timeout_cmd_act = <command action of the last timeout command>
+	last_cmd_id = <command id of the last several commands sent to device>
+	last_cmd_act = <command action of the last several commands sent to device>
+	last_cmd_index = <0 based last command index>
+	last_cmd_resp_id = <command id of the last several command responses received from device>
+	last_cmd_resp_index = <0 based last command response index>
+	last_event = <event id of the last several events received from device>
+	last_event_index = <0 based last event index>
+	num_cmd_h2c_fail = <number of commands failed to send to device>
+	num_cmd_sleep_cfm_fail = <number of sleep confirm failed to send to device>
+	num_tx_h2c_fail = <number of data packets failed to send to device>
+	cmd_sent = <0/1, send command resources available/sending command to device>
+	data_sent = <0/1, send data resources available/sending data to device>
+	cmd_resp_received = <0/1, no cmd response to process/response received and yet to process>
+	event_received = <0/1, no event to process/event received and yet to process>
+	ioctl_pending = <number of ioctl pending>
+	tx_pending = <number of Tx packet pending>
+	rx_pending = <number of Rx packet pending>
+	malloc_count = <number of malloc done>
+	lock_count = <number of lock used>
+	mbufalloc_count = <number of mlan_buffer allocated>
+
+	Example:
+		echo "drvdbg=0x7" > /proc/mwlan/uapX/debug	#enable MMSG,MFATAL,MERROR messages
+
+	Use dmesg or cat /var/log/debug to check driver debug messages.
+
+	To log driver debug messages to file,
+	a) Edit /etc/rsyslog.conf, add one line "*.debug		/var/log/debug"
+	b) touch /var/log/debug (if the file doesn't exist)
+	c) service rsyslog restart
+
+4) SOFT_RESET command
+   This command is used to perform a "soft reset" on the module. 
+   The FW code will disable hardware and jump to boot code. 
+   Host software will then need to re-download firmware if required. 
+
+   Usage: 
+	echo "soft_reset=1" > /proc/mwlan/config
+
+===============================================================================
+
+		U S E R  M A N U A L  F O R  UAPUTL
+
+NAME
+uaputl.exe [options] <command> [command parameters]]
+
+Options:
+	--help 	Display help
+	-v    	Display version
+	-i <interface>
+	-d <debug_level=0|1|2>            
+
+Example:
+	./uaputl.exe --help			
+		"display help for uaputl"
+
+	./uaputl.exe sys_config --help
+		"display help for sys_config command"
+
+This tool can be used to set/get uAP's settings. To change AP settings, you might 
+need to issue "bss_stop" command to stop AP before making change and issue "bss_start" 
+command to restart the AP after making change. 
+
+------------------
+Supported Commands
+------------------
+version
+debug_level
+sys_config [CONFIG_FILE_NAME]
+bss_config [CONFIG_FILE_NAME]
+sys_info
+sys_reset
+bss_start
+bss_stop
+sta_list
+sta_deauth <STA_MAC_ADDRESS>
+sta_deauth_ext <STA_MAC_ADDRESS> <REASON_CODE>
+radioctrl [0|1] 
+pscfg [MODE] [CTRL INACTTO MIN_SLEEP MAX_SLEEP MIN_AWAKE MAX_AWAKE]
+sys_cfg_custom_ie [INDEX] [MASK] [IEBuffer]
+hscfg [condition [[GPIO# [gap]]]]
+sys_cfg_wmm  [qosinfo=<qosinfo>]
+             [AC_BE AIFSN ECW_MAX ECW_MIN TX_OP] 
+             [AC_BK AIFSN ECW_MAX ECW_MIN TX_OP]
+             [AC_VI AIFSN ECW_MAX ECW_MIN TX_OP]
+             [AC_VO AIFSN ECW_MAX ECW_MIN TX_OP] 
+sys_cfg_11n [ENABLE] [HTCAP] [AMPDU] [TXBFCAP]
+addbapara [timeout txwinsize rxwinsize]
+aggrpriotbl <m0> <n0> <m1> <n1> ... <m7> <n7>
+addbareject <m0> <m1> ... <m7>
+hostcmd <txpwrlimit_cfg.conf> txpwrlimit_cfg_get
+hostcmd <txpwrlimit_cfg.conf> txpwrlimit_2g_cfg_set
+hostcmd <txpwrlimit_cfg.conf> txpwrlimit_5g_cfg_set
+tx_data_pause [ENABLE][TX_BUF_CNT]
+
+-------------------------------------------------------------------
+The following commands can be issued individually for debug purpose
+-------------------------------------------------------------------
+sys_cfg_ap_mac_address [AP_MAC_ADDRESS]
+sys_cfg_ssid [SSID]
+sys_cfg_beacon_period [BEACON_PERIOD]
+sys_cfg_dtim_period [DTIM_PERIOD]
+sys_cfg_channel [CHANNEL] [MODE]
+sys_cfg_channel_ext [CHANNEL] [BAND] [MODE]
+sys_cfg_scan_channels [CHANNEL[.BAND]]
+sys_cfg_rates [RATES]
+sys_cfg_rates_ext [rates RATES] [mbrate RATE] [urate RATE]
+sys_cfg_tx_power [TX_POWER]
+sys_cfg_bcast_ssid_ctl [1|0]
+sys_cfg_preamble_ctl 
+sys_cfg_bss_status
+sys_cfg_antenna_ctl <ANTENNA> [MODE]
+sys_cfg_rts_threshold [RTS_THRESHOLD]
+sys_cfg_frag_threshold [FRAG_THRESHOLD]
+sys_cfg_rsn_replay_prot [1|0]
+sys_cfg_tx_data_rate [TX_DATA_RATE]
+sys_cfg_mcbc_data_rate [MCBC_DATA_RATE]
+sys_cfg_pkt_fwd_ctl [0|1]
+sys_cfg_sta_ageout_timer [STA_AGEOUT_TIMER]
+sys_cfg_ps_sta_ageout_timer [PS_STA_AGEOUT_TIMER]
+sys_cfg_auth [AUTH_MODE]
+sys_cfg_protocol [PROTOCOL]
+sys_cfg_wep_key [INDEX ISDEFAULT KEY]
+sys_cfg_cipher [PAIRWISE_CIPHER GROUP_CIPHER]
+sys_cfg_pwk_cipher [<PROTOCOL>] [PAIRWISE_CIPHER]
+sys_cfg_gwk_cipher [GROUP_CIPHER]
+sys_cfg_group_rekey_timer [GROUP_REKEY_TIMER] 
+sys_cfg_wpa_passphrase [PASSPHRASE]
+sys_cfg_max_sta_num [STA_NUM]
+sys_cfg_retry_limit [RETRY_LIMIT]
+sys_cfg_sticky_tim_config [ENABLE] [<DURATION> <STICKY_BIT_MASK>]
+sys_cfg_sticky_tim_sta_mac_addr [CONTROL] [STA_MAC_ADDRESS]
+sys_cfg_2040_coex [ENABLE]
+sys_cfg_eapol_pwk_hsk [<TIMEOUT> <RETRIES>]
+sys_cfg_eapol_gwk_hsk [<TIMEOUT> <RETRIES>]
+sta_filter_table <FILTERMODE> <MACADDRESS_LIST>
+regrdwr <TYPE> <OFFSET> [value]
+memaccess <ADDR> [value]
+rdeeprom <offset> <byteCount>
+cfg_data <type> [*.conf]
+sys_cfg_80211d [state STATE] [country COUNTRY]
+uap_stats
+
+-------------------
+Details of Commands
+-------------------
+
+version
+-------
+    "./uaputl.exe -v"
+
+    This command prints the uAP utility version information.
+
+debug_level
+-----------
+    "./uaputl.exe -d <debug_level>"
+
+    The supported debug_level are:
+        0     - no debug
+        1     - enable MSG_DEBUG  
+        2     - enable all the debug 
+    This command use to control the debug level of uaputl.exe. 
+
+    Example:
+	./uaputl.exe -d 2 sys_config
+		Enable all the debug in uaputl.exe
+
+sys_config
+----------
+    "./uaputl.exe sys_config [CONFIG_FILE]"
+    This command is used to set or get the current settings of the Micro AP.
+
+    The supported options are:
+        CONFIG_FILE is file contain all the Micro AP settings.
+        empty - Get current Micro AP settings
+
+    Example:
+	./uaputl.exe sys_config
+		Get current settings of the Micro AP.
+
+	./uaputl.exe sys_config config/uaputl.conf
+		Load Micro AP's settings from uaputl.conf file and set.	
+
+bss_config
+----------
+    "./uaputl.exe bss_config [CONFIG_FILE]"
+    This command is used to set or get the current settings of the BSS.
+
+    The supported options are:
+        CONFIG_FILE is file contain all the BSS settings.
+        empty - Get current BSS settings
+
+    Example:
+	./uaputl.exe bss_config
+		Get current settings of the BSS.
+
+	./uaputl.exe bss_config config/uaputl.conf
+		Load BSS settings from uaputl.conf file and set.
+
+sys_info
+--------
+    "./uaputl.exe sys_info"
+
+    This command returns system information such as firmware version number
+    and HW information.
+
+sys_reset
+---------
+    "./uaputl.exe sys_reset"
+
+    This command is used to reset the Micro AP back to its initial state.
+    For example, this can be used to recover from a serious error, or before
+    creating a new BSS.
+
+    This command has the following effects:
+        1. The WLAN hardware MAC is reset.
+        2. All MIB variables are initialized to their respective default
+           values.
+        3. The firmware internal variables are reset to their respective
+           default values.
+        4. The firmware state machines are reset to their respective initial
+           states.
+
+bss_start
+---------
+    "./uaputl.exe bss_start"
+
+    This command starts the BSS.
+    There is no error for redundant bss_start command.
+
+bss_stop
+--------
+    "./uaputl.exe bss_stop"
+
+    This command stops the BSS. The command causes the firmware to:
+        1. Deauthenticate all associated client stations.
+        2. Turn off the radio (hence stopping beaconing).
+    There is no error for redundant bss_stop command.
+
+sta_list
+--------
+    "./uaputl.exe sta_list"
+
+    This command returns the list of client stations that are currently
+    associated with the AP.
+
+    The output is formatted as shown below, for each STA:
+    "STA <STA_NUM> information:
+     ==========================
+     MAC Address: <STA MAC address>
+     Power mfg status: active|power save
+     Rssi:  <RSSI_VALUE>"
+
+sta_deauth
+----------
+    "./uaputl.exe sta_deauth <STA_MAC_ADDRESS>"
+
+    This command is used to de-authentciate a client station for any reason.
+
+radioctrl
+----------
+    "./uaputl.exe radioctrl [0|1]"
+
+    This command is used to set or get the radio settings.
+    The supported options are:
+        1     - Turn radio on
+        0     - Turn radio off
+        empty - Get current radio setting
+
+sys_cfg_ap_mac_address
+----------------------
+    "./uaputl.exe sys_cfg_ap_mac_address [AP_MAC_ADDRESS]"
+
+    This command is used to set or get the AP MAC address.
+
+    If no arguments are given, this command returns the current AP MAC
+    address.
+    Otherwise, this MAC address becomes the BSSID of the infrastructure
+    network created by the AP.
+
+    Example: 
+	./uaputl.exe sys_cfg_ap_mac_address 00:50:43:20:aa:bb
+		Set AP MAC address to 00:50:43:20:aa:bb
+
+	./uaputl.exe sys_cfg_ap_mac_address
+		Get AP MAC address"		
+
+sys_cfg_ssid
+------------
+    "./uaputl.exe sys_cfg_ssid [SSID]"
+
+    This command is used to set or get the AP SSID.
+
+    If no arguments are given, this command returns the current AP SSID.
+    While setting, the maximum length of the SSID can be 32 characters.
+
+    Example: 
+	./uaputl.exe sys_cfg_ssid microap
+		Set AP ssid to "microap"
+
+	./uaputl.exe sys_cfg_ssid
+		Get AP ssid   
+
+sys_cfg_beacon_period
+---------------------
+    "./uaputl.exe sys_cfg_beacon_period [BEACON_PERIOD]"
+
+    This command is used to set or get the AP beacon period.
+
+    If no arguments are given, this command returns the current AP beacon
+    period.
+
+    Beacon period is represented in milliseconds.
+
+    Example: 
+	./uaputl.exe sys_cfg_beacon_period 100
+		Set AP beacon period to 100 TU
+
+	./uaputl.exe sys_cfg_beacon_period
+		Get AP beacon period
+
+sys_cfg_dtim_period
+-------------------
+    "./uaputl.exe sys_cfg_dtim_period [DTIM_PERIOD]
+
+    This command is used to set or get the AP DTIM period.
+
+    If no arguments are given, this command returns the current AP DTIM
+    period.
+
+    Example: 
+	./uaputl.exe sys_cfg_dtim_period 3
+		Set AP DTIM period to 3
+
+	./uaputl.exe sys_cfg_dtim_period
+		Get AP DTIM period
+
+sys_cfg_scan_channels
+---------------------
+    "./uaputl.exe sys_cfg_scan_channels [CHANNEL[.BAND]]"
+
+    This command is used to set or get the AP's scan channel list.
+
+    If no arguments are given, this command returns the scan channel list.
+    If BAND is 0, channel is set in 2.4 GHz band and if BAND is 1, channel is set to 5GHz.
+    Channels from only one of the bands should be specified.
+    Each CHANNEL.BAND pair must be separated by a space. BAND parameter is optional.
+ 
+    Example: 
+	./uaputl.exe sys_cfg_scan_channels 1 11 6
+		Set AP scan channel list to 1 11 6 
+
+	./uaputl.exe sys_cfg_scan_channels 11.0 6.0
+		Set AP scan channel list to 11 6 
+
+	./uaputl.exe sys_cfg_scan_channels
+		Get AP scan channel list 
+
+        ./uaputl.exe sys_cfg_scan_channels 8.1 16.1 34
+                Set AP scan channel list to 8 16 and 34 in 5GHz band.
+
+sys_cfg_channel
+---------------
+    "./uaputl.exe sys_cfg_channel [CHANNEL] [MODE]"
+
+    This command is used to set or get the AP radio channel.
+
+    If no arguments are given, this command returns the current AP radio
+    channel.
+
+    MODE: band config mode.
+          Bit 0:  automatic channel selection (ACS) enable/disable
+          Bit 1:  secondary channel is above primary channel enable/disable(only allow for channel 1-7)
+          Bit 2:  secondary channel is below primary channel enable/disable(only allow for channel 5-11)
+          For 'a' band channel:
+          Bit 1:  secondary channel is above primary channel enable/disable
+          Bit 2:  secondary channel is below primary channel enable/disable
+          Only following pairs of channels are valid for secondary channel setting in 5GHz band.
+          36, 40
+          44, 48
+          52, 56
+          60, 64
+          100, 104
+          108, 112
+          116, 120
+          124, 128
+          132, 136
+          149, 153
+          157, 161
+
+    Example:
+        ./uaputl.exe sys_cfg_channel 6
+                Set AP radio channel to 6, and no secondary channel.
+
+        ./uaputl.exe sys_cfg_channel 11 0
+                Set AP radio channel to 11 with Manual Channel Select.
+
+        ./uaputl.exe sys_cfg_channel 0 1
+                Set AP to ACS.
+
+        ./uaputl.exe sys_cfg_channel
+                Get AP radio channel
+
+        ./uaputl.exe sys_cfg_channel 6 2
+                Set AP primary radio channel to 6, and secondary channel is above.
+        ./uaputl.exe sys_cfg_channel 6 4
+                Set AP primary radio channel to 6, and secondary channel is below
+        ./uaputl.exe sys_cfg_channel 0 3
+                Set AP to ACS mode, and secondary channel is above.
+        ./uaputl.exe sys_cfg_channel 0 5
+                Set AP to ACS mode, and secondary channel is below.
+        ./uaputl.exe sys_cfg_channel 36 2
+                Set AP primary radio channel to 36, and secondary channel is above.
+        ./uaputl.exe sys_cfg_channel 40 4
+                Set AP primary radio channel to 40, and secondary channel is below.
+
+sys_cfg_channel_ext
+---------------
+    "./uaputl.exe sys_cfg_channel_ext [CHANNEL] [BAND] [MODE]"
+
+    This command is used to set or get the AP radio channel.
+
+    If no arguments are given, this command returns the current AP radio
+    channel.
+
+    BAND: 0 : 2.4GHz operation
+          1 : 5GHz operation
+    MODE: band config mode.
+          Bit 0:  automatic channel selection (ACS) enable/disable
+          Bit 1:  secondary channel is above primary channel enable/disable(only allow for channel 1-7)
+          Bit 2:  secondary channel is below primary channel enable/disable(only allow for channel 5-11)
+          For 'a' band channel:
+          Bit 1:  secondary channel is above primary channel enable/disable
+          Bit 2:  secondary channel is below primary channel enable/disable
+          Only following pairs of channels are valid for secondary channel setting in 5GHz band.
+          36, 40
+          44, 48
+          52, 56
+          60, 64
+          100, 104
+          108, 112
+          116, 120
+          124, 128
+          132, 136
+          149, 153
+          157, 161
+
+    Example:
+        ./uaputl.exe sys_cfg_channel_ext 6
+Set AP radio channel to 6, and no secondary channel.
+
+        ./uaputl.exe sys_cfg_channel_ext 11 0 0
+                Set AP radio channel to 11 in 2.4GHz band with Manual Channel Select.
+
+        ./uaputl.exe sys_cfg_channel_ext 0 0 1
+                Set AP to ACS mode and 2.4GHz band.
+        
+        ./uaputl.exe sys_cfg_channel_ext 8 0
+                Set AP to channel 8 and 2.4GHz band.
+         
+        ./uaputl.exe sys_cfg_channel_ext 8 1
+                Set AP to channel 8 and 5GHz band.
+
+        ./uaputl.exe sys_cfg_channel_ext 36 1
+                Set AP to channel 36 and 5GHZ band.                
+
+        ./uaputl.exe sys_cfg_channel_ext
+                Get AP radio channel, band and mode.
+
+        ./uaputl.exe sys_cfg_channel_ext 6 0 2
+                Set AP primary radio channel to 6, band to 2.4GHz and secondary channel is above.
+        ./uaputl.exe sys_cfg_channel_ext 6 0 4
+                Set AP primary radio channel to 6, band to 2.4GHz and secondary channel is below
+        ./uaputl.exe sys_cfg_channel_ext 0 0 3
+                Set AP to ACS mode, band to 2.4GHz and secondary channel is above.
+        ./uaputl.exe sys_cfg_channel_ext 0 0 5
+                Set AP to ACS mode, band to 2.4GHz and secondary channel is below.
+        ./uaputl.exe sys_cfg_channel_ext 36 1 2
+                Set AP primary radio channel to 36, band to 5GHz and secondary channel is above.
+        ./uaputl.exe sys_cfg_channel_ext 40 1 4
+                Set AP primary radio channel to 40, band to 5GHz and secondary channel is below.
+
+sys_cfg_rates
+-------------
+    "./uaputl.exe sys_cfg_rates [RATES]"
+
+    If 'Rate' provided, a 'set' is performed else a 'get' is performed
+    RATES is provided as a set of data rates, in unit of 500 kilobits
+    A rate with MSB bit is basic rate, i.e 0x82 is basic rate.
+    
+    'set' will not allowed after bss start. 
+  
+    Valid rates: 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108
+    Non-Basic rates: 0x02, 0x04, 0x0b, 0x16, 0x0C, 0x12, 0x18, 0x24, 0x30, 0x48, 0x60, 0x6c
+    Basic rates: 0x82, 0x84, 0x8b, 0x96, 0x8C, 0x92, 0x98, 0xA4, 0xB0, 0xC8, 0xE0, 0xEc
+
+    Each rate must be separated by a space.
+
+    Example: 
+    ./uaputl.exe sys_cfg_rates 0x82 0x84 0x96 0x0c 0x12 0x18
+    ./uaputl.exe sys_cfg_rates
+
+sys_cfg_rates_ext
+-----------------
+    "./uaputl.exe sys_cfg_rates_ext [rates RATES] [mbrate RATE] [urate RATE]"
+
+    If 'Rate' provided, a 'set' is performed else a 'get' is performed.
+    RATES is provided as a set of data rates, in unit of 500 kilobits
+    A rate with MSB bit is basic rate, i.e 0x82 is basic rate.
+    If only operational rates is provided, MCBC rate and unicast rate will be set to auto. 
+	
+    Valid rates: 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108
+    Non-Basic rates: 0x02, 0x04, 0x0b, 0x16, 0x0C, 0x12, 0x18, 0x24, 0x30, 0x48, 0x60, 0x6c
+    Basic rates: 0x82, 0x84, 0x8b, 0x96, 0x8C, 0x92, 0x98, 0xA4, 0xB0, 0xC8, 0xE0, 0xEc
+    Rates 2, 4, 11 and 22 (in units of 500 Kbps) must be present in either of
+    basic or non-basic rates. If OFDM rates are enabled then 12, 24 and 48 (in
+    units of 500 Kbps) must be present in either basic or non-basic rates.
+
+    Each rate must be separated by a space.
+
+    rates followed by RATES for setting operational rates.
+    mbrate followed by RATE for setting multicast and broadcast rate.
+    urate followed by RATE for setting unicast rate.
+
+    operational rates only allow to set before bss start. 
+
+    Example: 
+    ./uaputl.exe sys_cfg_rates_ext rates 0x82 0x04 11 0x96 12 24 48 urate 0x2 mbrate 0x16
+		Set AP operation rates to 0x82,0x04,11,0x96,12,24,48, unicast rate to 2, multicast rate to 0x16
+
+    ./uaputl.exe sys_cfg_rates_ext rates 0x82 0x04 11 0x96 12 24 48
+		Set AP operation rates to 0x82,0x04,11,0x96,12,24,48.
+
+sys_cfg_tx_power
+----------------
+    "./uaputl.exe sys_cfg_tx_power [TX_POWER]"
+
+    This command is used to set or get the AP Tx power.
+
+    If no arguments are given, this command returns the current AP Tx power.
+
+    Tx power level is represented in dBm.
+
+    Example: 
+	./uaputl.exe sys_cfg_tx_power 13
+		Set AP Tx power to 13 dBm
+
+	./uaputl.exe sys_cfg_tx_power
+		Get AP Tx power
+
+sys_cfg_bcast_ssid_ctl
+----------------------
+    "./uaputl.exe sys_cfg_bcast_ssid_ctl [1|0]"
+
+    This command is used to set or get the SSID broadcast feature setting.
+
+    The supported options are:
+        0     - Disable SSID broadcast
+        1     - Enable SSID broadcast
+        empty - Get current SSID broadcast setting
+
+    When broadcast SSID is enabled, the AP responds to probe requests from
+    client stations that contain null SSID.
+
+    When broadcast SSID is disabled, the AP:
+        1. Does not respond to probe requests that contain null SSID.
+        2. Generates beacons that contain null SSID.
+
+   Example: 
+	./uaputl.exe sys_cfg_bcast_ssid_ctl 1
+		Enable SSID broadcast
+
+	./uaputl.exe sys_cfg_bcast_ssid_ctl
+		Get SSID broadcast setting
+
+sys_cfg_preamble_ctl
+--------------------
+    "./uaputl.exe sys_cfg_preamble_ctl"
+
+    This command is used to get type of preamble.
+
+    Example: 
+	./uaputl.exe sys_cfg_preamble_ctl
+		Get AP preamble setting
+
+sys_cfg_bss_status
+--------------------
+    "./uaputl.exe sys_cfg_bss_status"
+
+    This command is used to get current BSS status.
+
+    Example:
+	./uaputl.exe sys_cfg_bss_status
+		Get current BSS status
+
+sys_cfg_antenna_ctl
+-------------------
+    "./uaputl.exe sys_cfg_antenna_ctl <ANTENNA> [MODE]"
+
+    This command is used to set or get the antenna settings.
+
+    The supported options are:
+        ANTENNA : 0 - Rx antenna
+                  1 - Tx antenna
+        MODE    : 0       - Antenna A
+                  1       - Antenna B
+                  empty   - Get current antenna settings
+
+    Example: 
+	./uaputl.exe sys_cfg_antenna_ctl 0 1
+		Set AP Rx antenna to Antenna B
+
+	./uaputl.exe sys_cfg_antenna_ctl 1
+		Get AP Tx antenna
+
+sys_cfg_rts_threshold
+---------------------
+    "./uaputl.exe sys_cfg_rts_threshold [RTS_THRESHOLD]"
+
+    This command is used to set or get the RTS threshold value.
+
+    If no arguments are given, this command returns the current RTS threshold
+    value.
+
+    Example: 
+	./uaputl.exe sys_cfg_rts_threshold 2347
+		Set AP RTS threshold to 2347
+
+	./uaputl.exe sys_cfg_rts_threshold
+		Get AP RTS threshold
+
+sys_cfg_frag_threshold
+----------------------
+    "./uaputl.exe sys_cfg_frag_threshold [FRAG_THRESHOLD]"
+
+    This command is used to set or get the Fragmentation threshold value.
+
+    If no arguments are given, this command returns the current Fragmentation threshold
+    value.
+
+    Example: 
+	./uaputl.exe sys_cfg_frag_threshold 2346
+		Set AP Fragmentation threshold to 2346
+
+	./uaputl.exe sys_cfg_frag_threshold
+		Get AP Fragmentation threshold
+
+sys_cfg_rsn_replay_prot
+-----------------------
+    "./uaputl.exe sys_cfg_rsn_replay_prot [1|0]"
+
+    This command is used to enable or disable RSN replay protection.
+
+    The supported options are:
+        0     - Disable RSN replay protection
+        1     - Enable RSN replay protection
+        empty - Get current RSN replay protection setting
+
+   Example: 
+	./uaputl.exe sys_cfg_rsn_replay_prot 1
+		Enable RSN replay protection 
+
+	./uaputl.exe sys_cfg_rsn_replay_prot
+		Get RSN replay protection setting
+
+sys_cfg_tx_data_rate
+--------------------
+    "./uaputl.exe sys_cfg_tx_data_rate [TX_DATA_RATE]"
+
+    This command is used to set or get the Tx data rate settings.
+
+    The supported options are:
+        0     - Auto rate
+        >0    - Set specified data rate
+        empty - Get current data rate
+
+    Tx data rate is represented in units of 500 kbps. While setting Tx data
+    rates, only zero or rates currently configured are allowed.
+
+	Following is the list of supported rates in units of 500 Kbps:
+	    2,    4,    11,   22,   12,   18,   24,   36,   48,   72,   96,   108
+	    0x02, 0x04, 0x0b, 0x16, 0x0C, 0x12, 0x18, 0x24, 0x30, 0x48, 0x60, 0x6c
+
+    Example: 
+	./uaputl.exe sys_cfg_tx_data_rate 22
+		Set AP Tx data rate to 11 M
+
+   	./uaputl.exe sys_cfg_tx_data_rate 0x16
+		Set AP Tx data rate to 11 M
+
+	./uaputl.exe sys_cfg_tx_data_rate
+		Get AP Tx data rate
+
+sys_cfg_mcbc_data_rate
+----------------------
+    "./uaputl.exe sys_cfg_mcbc_data_rate [MCBC_DATA_RATE]"
+
+    This command is used to set or get the MCBC data rate to use for multicast 
+    or broadcast packet transmission.
+
+    The supported options are:
+        0     - Auto rate
+        >0    - Set specified MCBC data rate
+        empty - Get current MCBC data rate
+
+    MCBC data rate is represented in units of 500 kbps. While setting MCBC data
+    rates, only zero or one of rates currently configured as basic rates are allowed.
+
+    For example:  If current basic rates is "0x82 0x84 0x8b 0x96", then the allowed 
+                  values for MCBC data rate will be "0x2 0x4 0xb 0x16".
+
+    Example: 
+	./uaputl.exe sys_cfg_mcbc_data_rate 22
+		Set AP MCBC data rate to 11 M
+
+   	./uaputl.exe sys_cfg_mcbc_data_rate 0
+		Set AP MCBC data rate to auto
+
+	./uaputl.exe sys_cfg_mcbc_data_rate
+		Get AP MCBC data rate
+
+sys_cfg_pkt_fwd_ctl
+-------------------
+    "./uaputl.exe sys_cfg_pkt_fwd_ctl [0|1]"
+
+    This command is used to set or get the packet forwarding control
+    settings.
+
+    The supported options are:
+        0     - Forward all packets to the host
+        1     - Firmware handles intra-BSS packets
+        empty - Get current packet forwarding setting
+
+    Example: 
+	./uaputl.exe sys_cfg_pkt_fwd_ctl 1
+		Set AP packet forwarding control to firmware handles intra-BSS packets mode
+
+	./uaputl.exe sys_cfg_pkt_fwd_ctl 
+		Get AP packet forwarding control
+
+sys_cfg_sta_ageout_timer
+------------------------
+    "./uaputl.exe sys_cfg_sta_ageout_timer [STA_AGEOUT_TIMER]"
+
+    This command is used to set or get the STA ageout value.
+    
+    Value of 0 will mean that stations will never be aged out.
+
+    Minimum value for this is 300. Maximum allowed setting should be 864000.    
+
+    If no arguments are given, this command returns the current STA ageout
+    value.
+
+    Ageout timer value is represented in units of 100 ms.
+
+    Example: 
+	./uaputl.exe sys_cfg_sta_ageout_timer 1800
+		Set AP STA ageout time to 180000 ms 
+
+	./uaputl.exe sys_cfg_sta_ageout_timer 
+		Get AP STA ageout time
+
+sys_cfg_ps_sta_ageout_timer
+---------------------------
+	"./uaputl.exe sys_cfg_ps_sta_ageout_timer [PS_STA_AGEOUT_TIMER]"
+
+	This command is used to set or get the PS STA ageout value.
+
+	Value of 0 will mean that stations will never be aged out.
+
+	Minimum value for this is 300. Maximum allowed setting should be 864000.
+
+	If no arguments are given, this command returns the current	PS STA ageout
+	value.
+
+	Ageout timer value is represented in units of 100 ms.
+
+	Example:
+	./uaputl.exe sys_cfg_ps_sta_ageout_timer 1800
+		Set AP PS STA ageout time to 180000 ms
+
+	./uaputl.exe sys_cfg_ps_sta_ageout_timer
+		Get AP PS STA ageout time
+
+sys_cfg_auth
+------------
+    "./uaputl.exe sys_cfg_auth [AUTHMODE]"
+
+    This command is used to set or get the AP authentication mode.
+
+    The supported options are:
+        AUTHMODE :     0 - Open authentication
+                       1 - Shared key authentication
+                       255 - Auto (Open and Shared key) authentication
+    empty - Get current authentication mode
+
+    Example: 
+	./uaputl.exe sys_cfg_auth 0
+		Set AP authentication mode to Open.
+
+	./uaputl.exe sys_cfg_auth 
+		Get AP authentication mode.
+
+sys_cfg_protocol 
+----------------
+    "./uaputl.exe sys_cfg_protocol [PROTOCOL]"
+
+    This command is used to set or get the encryption protocol.
+
+    The supported options are:
+	PROTOCOL: 
+			1		 No RSN
+			2		WEP Static
+			8		  WPA	
+			32		  WPA2
+			40		 WPA, WPA2 Mixed Mode
+    empty - Get current encryption protocol
+
+    Example: 
+	./uaputl.exe sys_cfg_protocol 2
+		Set AP encryption protocol to static WEP.
+
+	./uaputl.exe sys_cfg_protocol
+		Get AP encryption protocol.
+
+sys_cfg_wep_key
+---------------
+    "./uaputl.exe sys_cfg_wep_key [INDEX ISDEFAULT Key_0]
+                                  [INDEX ISDEFAULT Key_1]
+                                  [INDEX ISDEFAULT Key_2]
+                                  [INDEX ISDEFAULT Key_3] 
+                                  [INDEX]"
+
+    This command is used to set or get the WEP key settings.
+
+    The supported options are:
+        INDEX:       0 - KeyIndex is 0 
+                     1 - KeyIndex is 1 
+                     2 - KeyIndex is 2  
+                     3 - KeyIndex is 3 
+	ISDEFAULT:   0: KeyIndex is not the default
+		     1: KeyIndex is the default transmit key
+
+        KEY_* :      Key value.
+        empty - Get current WEP key settings for all the keys
+        INDEX - Only INDEX will get the key setting for the particular
+                KeyIndex.
+
+    Example: 
+	./uaputl.exe sys_cfg_wep_key 0 1 55555
+		Set AP's default transmit key to "55555", key index is 0. 
+
+	./uaputl.exe sys_cfg_wep_key
+		Get AP all the WEP keys settings.
+
+	./uaputl.exe sys_cfg_wep_key 1
+		Get WEP key setting for the KeyIndex = 1.
+
+sys_cfg_cipher 
+--------------
+    "./uaputl.exe sys_cfg_cipher [PAIRWISE_CIPHER GROUP_CIPHER]"
+
+    This command is used to set or get the key types for the pairwise and group key.
+
+    The supported options are:
+	PAIRWISE_CIPHER: 
+			0		  None	
+			4		  TKIP	
+			8		 AES CCMP
+			12		 AES CCMP + TKIP
+        GROUP_CIPHER:    
+			0		  None	
+			4		  TKIP	
+			8		 AES CCMP
+    	empty - Get current key types
+
+	Valid combinations of [PAIRWISE_CIPHER GROUP_CIPHER] are:
+		[0 0], [4 4], [8 8], [12 4].
+
+    Example: 
+	./uaputl.exe sys_cfg_cipher 4 4
+		Set AP's pairwise and group key's type to TKIP. 
+
+	./uaputl.exe sys_cfg_cipher
+		Get AP's key types for the pairwise and group key. 
+
+sys_cfg_pwk_cipher
+------------------
+    "./uaputl.exe sys_cfg_pwk_cipher [<PROTOCOL>] [PAIRWISE_CIPHER]"
+
+    This command is used to set or get protocol and corresponding pairwise cipher settings.
+
+    The supported options are:
+        PROTOCOL:
+                        0                None
+                        8                 WPA
+                        32                WPA2
+        PAIRWISE_CIPHER:
+                        0                 None
+                        4                 TKIP
+                        8                AES CCMP
+                        12               AES CCMP + TKIP
+        WPA/TKIP cipher cannot be used when uAP operates in 802.11n mode.
+        If only PROTOCOL is provided, pairwise cipher for that protocol is displayed.
+        empty - Get protocol and corresponding pairwise cipher settings.
+
+    Example:
+        ./uaputl.exe sys_cfg_pwk_cipher 8 4
+                Set AP's pairwise cipher to TKIP for WPA protocol.
+
+        ./uaputl.exe sys_cfg_pwk_cipher 32
+                Get AP's pairwise cipher for WPA2 protocol.
+
+        ./uaputl.exe sys_cfg_pwk_cipher
+                Get AP's protocol and corresponding pairwise cipher settings.
+
+sys_cfg_gwk_cipher
+------------------
+    "./uaputl.exe sys_cfg_gwk_cipher [GROUP_CIPHER]"
+
+    This command is used to set or get group cipher.
+
+    The supported options are:
+        GROUP_CIPHER:
+                        0                 None
+                        4                 TKIP
+                        8                AES CCMP
+        empty - Get group cipher settings.
+
+    Example:
+        ./uaputl.exe sys_cfg_gwk_cipher 8
+                Set AP's group cipher to AES CCMP.
+
+        ./uaputl.exe sys_cfg_gwk_cipher
+                Get AP's group cipher settings.
+
+sys_cfg_group_rekey_timer 
+-------------------------
+    "./uaputl.exe sys_cfg_group_rekey_timer [GROUP_REKEY_TIMER]"
+
+    This command is used to set or get the AP group re-key time interval, in seconds.
+
+    The supported options are:
+        GROUP_REKEY_TIMER is represented in seconds. This is only applicable
+        		 if the protocol is WPA or WPA2. Value of 0 will disable group re-key.
+
+        empty - Get current group rekey timer
+
+    Example: 
+	./uaputl.exe sys_cfg_group_rekey_timer 1800
+		Set AP's group re-key time interval to 1800 s
+
+	./uaputl.exe sys_cfg_group_rekey_timer
+		Get AP's group re-key time interval. 
+
+sys_cfg_wpa_passphrase
+----------------------
+    "./uaputl.exe sys_cfg_wpa_passphrase [PASSPHRASE]"
+
+    This command is used to set or get the WPA or WPA2 passphrase.
+
+    If no arguments are given, this command returns the current WPA or WPA2
+    passphrase.
+    While setting, the maximum length of the passphrase can be 64 characters.
+
+    Example: 
+	./uaputl.exe sys_cfg_wpa_passphrase 1234567890
+		Set AP's WPA or WPA2 passphrase to "1234567890"
+
+	./uaputl.exe sys_cfg_wpa_passphrase
+		Get AP's WPA or WPA2 passphrase. 
+
+sys_cfg_max_sta_num
+-------------------
+    "./uaputl.exe sys_cfg_max_sta_num [STA_NUM]"
+
+    This command is used to set or get the maximum number of stations allowed to connect to uAP. 
+    	
+    If no arguments are given, this command returns the configured maximum number of stations 
+		allowed to connect to uAP and maximum number of stations supported.
+
+    Example: 
+	./uaputl.exe sys_cfg_max_sta_num 2
+		Set AP's maximum station number to 2
+
+	./uaputl.exe sys_cfg_max_sta_num
+		Get AP's maximum station number configured and maximum station number supported.
+
+sys_cfg_retry_limit
+-------------------
+    "./uaputl.exe sys_cfg_retry_limit [RETRY_LIMIT]"
+
+    This command is used to set or get the retry limit to use for packet transmissions. 
+    	
+    The maximum retry_limit allowed is 14.
+       
+    If no arguments are given, this command returns the current retry limit value.
+
+    Example: 
+	./uaputl.exe sys_cfg_retry_limit 2
+		Set AP's retry limit value to 2
+
+	./uaputl.exe sys_cfg_retry_limit
+		Get AP's retry limit value 
+
+sys_cfg_sticky_tim_config
+-------------------------
+    "./uaputl.exe sys_cfg_sticky_tim_config [ENABLE] [<DURATION> <STICKY_BIT_MASK>]"
+
+    This command is used to set or get sticky TIM configuration.
+    
+    ENABLE is used to enable or disable sticky TIM feature.
+    Following are the valid values of ENABLE
+    0- disable SticktyTIM 
+    1- enable StickyTIM  (Both DURATION in beacons and STICKY_BIT_MASK must be provided)
+    2- enable StickyTIM  (enable sticky TIM without changing previous values of 
+       DURATION and STICKY_BIT_MASK)
+
+    When bit 0 of STICKY_BIT_MASK is set, TIM bit is made sticky and when 
+    cleared, normal TIM bit updates resume.
+    When bit 1 of STICKY_BIT_MASK is set, MoreData bit is made sticky and when 
+    cleared, normal MoreData bit updates resume.
+    STICKY_BIT_MASK = 0 is NOT a valid configuration value.
+
+    If no argument is given, this command returns current sticky TIM configuration.
+
+    Example:
+    ./uaputl.exe sys_cfg_sticky_tim_config
+                Get sticky TIM configuration.
+
+    ./uaputl.exe sys_cfg_sticky_tim_config 0
+                Disable sticky TIM feature.
+
+    ./uaputl.exe sys_cfg_sticky_tim_config 1 30 1
+                Enable sticky TIM feature with DURATION of 30 beacons and 
+                STICKY_BIT_MASK set to 1.
+
+sys_cfg_sticky_tim_sta_mac_addr
+-------------------------------
+    "./uaputl.exe sys_cfg_sticky_tim_sta_mac_addr [CONTROL] [STA_MAC_ADDRESS]"
+
+    This command is used to set or get sticky TIM control parameter for associated station.
+
+    CONTROL when set to 1, sticky TIM bit for that station is activated.
+    When set to 0, sticky TIM bit for that station is deactivated.
+
+    If no argument is given, it returns sticky TIM configuration for all associated stations.
+    If only STA_MAC_ADDRESS is provided, it returns sticky TIM configartion for that station.
+
+    Example:
+    ./uaputl.exe sys_cfg_sticky_tim_sta_mac_addr
+            Get sticky TIM configuration for all associated stations.
+
+    ./uaputl.exe sys_cfg_sticky_tim_sta_mac_addr 00:50:43:20:11:22
+            Get control parameter for station 00:50:43:20:11:22.
+
+    ./uaputl.exe sys_cfg_sticky_tim_sta_mac_addr 1 00:50:43:20:11:22
+            Set control parameter for station with MAC address 00:50:43:20:11:22 to 1.
+
+    Note:TIM bit for an associated STA is made sticky only if both below mentioned 
+         conditions are satisfied â€?         1.Enable = 1 or 2 in most recently received sys_cfg_sticky_tim_config command, and
+         2.Control = 1 in most recently received sys_cfg_sticky_tim_sta_mac_addr
+           with this station MAC address.
+
+sys_cfg_2040_coex
+-------------------------------
+    "./uaputl.exe sys_cfg_2040_coex [ENABLE]"
+
+    This command is used to set or get 20/40 BSS coexistence configuration.
+
+    ENABLE when set to 0, disables 20/40 coex.
+    When set to 1, enables 20/40 coex.
+
+    If no argument is given, it returns 20/40 BSS coex configuration.
+
+    Example:
+    ./uaputl.exe sys_cfg_2040_coex
+            Get 20/40 BSS coexistence configuration.
+
+    ./uaputl.exe sys_cfg_2040_coex 0
+            Disable 20/40 BSS coexistence.
+
+    ./uaputl.exe sys_cfg_2040_coex 1
+            Enable 20/40 BSS coexistence.
+
+    Note:20/40 BSS coex configuration can be set only before starting BSS.
+
+sys_cfg_eapol_pwk_hsk
+---------------------
+    "./uaputl.exe sys_cfg_eapol_pwk_hsk [<TIMEOUT> <RETRIES>]"
+
+	This command is used to set or get pairwise handshake update timeout and
+	number of retries.
+
+	Both TIMEOUT and number of RETRIES should be provided for a 'set'.
+	
+	If no arguments are given, this command returns timeout value and number
+	of
+	retries for pairwise key.
+	
+	Example:
+	./uaputl.exe sys_cfg_eapol_pwk_hsk 50 2
+		Set AP's pairwise key timeout to 50ms and number of retries to 2.
+	
+	./uaputl.exe sys_cfg_eapol_pwk_hsk
+		Get AP's pairwise key timeout and number of retries.
+			
+sys_cfg_eapol_gwk_hsk
+---------------------
+	"./uaputl.exe sys_cfg_eapol_gwk_hsk [<TIMEOUT> <RETRIES>]"
+	
+	This command is used to set or get groupwise handshake update timeout and
+	number of retries.
+	
+	Both TIMEOUT and number of RETRIES should be provided for a	'set'.
+	
+	If no arguments are given, this command returns timeout	value and number
+	of retries for groupwise key.
+	
+	Example:
+	./uaputl.exe sys_cfg_eapol_gwk_hsk 50 2
+	Set AP's groupwise key timeout to 50ms and number of retries to 2.
+	
+	./uaputl.exe sys_cfg_eapol_gwk_hsk
+	Get AP's groupwise key timeout and number of retries.
+
+sta_filter_table
+----------------
+    "./uaputl.exe sta_filter_table <FILTERMODE> [<MACADDRESS_LIST>]"
+
+    This command is used to get or set the client station MAC address
+    filter table.
+
+    The supported options are:
+    FILTERMODE : 0 - Disable filter table
+                 1 - Allow mac address specified in the allowed list
+                 2 - Block MAC addresses specified in the  banned list
+    MACADDRESS_LIST is the list of MAC addresses to be acted upon. Each
+    MAC address must be separated with a space. Maximum of 16 MAC addresses
+    are supported.
+
+    empty - Get current client station MAC address filter table.
+
+    Example: 
+	./uaputl.exe sta_filter_table 0
+		Disable filter table
+
+	./uaputl.exe sta_filter_table 1 00:50:43:20:aa:bb
+		Set AP's filter mode to allow, only MAC address "00:50:43:ab:bb" will be allowed. 
+
+	./uaputl.exe sta_filter_table
+		Get AP's filter table settings.
+
+regrdwr
+-------
+     "./uaputl.exe regrdwr <TYPE> <OFFSET> [value]"
+
+     These commands are used to read the MAC, BBP, RF and PMIC registers from the card.
+     TYPE can take 3 values, 1 - read/write MAC register
+                             2 - read/write BBP register
+                             3 - read/write RF  register
+
+     OFFSET specifies the offset location that is to be read.  
+     This parameter can be specified either in decimal or in hexadecimal (by preceding the number with a "0x").
+
+     value if specified, then that value will be written to that offset in the specified register. Value should be
+     specified in hexadecimal.
+
+     Example: 
+	./uaputl.exe regrdwr 1 0xa123
+		read MAC register 0xa123
+
+	./uaputl.exe regrdwr 1 0xa123 0xaa
+		write 0xaa to MAC register 0xa123
+
+        ./uaputl.exe regrdwr 2 0x0123
+		read BBP register 0x0123
+
+	./uaputl.exe regrdwr 2 0x0123 0xaa
+		write 0xaa to BBP register 0x0123
+
+        ./uaputl.exe regrdwr 3 0x0123
+		read RF register 0x0123
+
+	./uaputl.exe regrdwr 3 0x0123 0xaa
+		write 0xaa to RF register 0x0123
+
+memaccess
+---------
+ 	"./uaputl.exe memaccess <ADDR> [value]"
+	This commands is used to read/write to a memory address 
+
+	ADDR specifies the address of the location that is to be read/write  
+	This parameter can be specified either in decimal or in hexadecimal (by preceding the number with a "0x").
+
+	value if specified, then that value will be written to that address in the specified register. 
+
+	Example: 
+		./uaputl.exe memaccess 0xc00153e4 
+			read contents of memory location 0xc00153e4
+
+        		
+		./uaputl.exe memaccess 0xc00153e4 0xaabbccdd
+			write value 0xaabbccdd to  memory location 0xc00153e4
+
+rdeeprom
+--------
+    "./uaputl.exe rdeeprom <offset> <bytecount>" 
+
+    This command is used to read bytes from offset location on
+    EEPROM
+            
+    offset: 0,4,8,..., multiple of 4 
+    bytecount: 4-20, multiple of 4
+
+   	Example: 
+    ./uaputl.exe rdeeprom 200 12 
+        read 12 bytes from offset 200 ON EEPROM
+
+cfg_data
+--------
+ 	"./uaputl.exe cfg_data <type> [*.conf]"
+
+    This command is used to set/get the configuration data to/from the firmware. 
+    
+    type: 2 -- cal data
+
+   	Example: 
+        ./uaputl.exe cfg_data 2 cal_data.conf    
+            read cal_data from cal_data.conf and download to firmware.
+        ./uaputl.exe cfg_data 2 
+            read cal_data from firmware 
+
+sys_cfg_80211d 
+--------------
+    "./uaputl.exe sys_cfg_80211d [state STATE] [country COUNTRY]"
+    This command is used to set/get 802.11D specific parameters.
+    If no parameters are provided, this command returns state, country and
+    domain information.
+    
+    Allowed values for state are 0 for disable and 1 for enable. 
+    COUNTRY is a two letter string input (derived from ISO 3166 code;
+    http://www.iso.org/iso/country_codes/iso_3166_code_lists/english_country_names_and_code_elements.htm
+    )
+
+    Countries are mapped with specific domain in file "80211d_domain.conf". In
+    order to set customize band setting, user can modify 80211d_domain.conf
+    file. 
+
+    Example:
+    ./uaputl.exe sys_cfg_80211d state 0         
+        To-disable
+
+    ./uaputl.exe sys_cfg_80211d state 1         
+        To-enable
+
+    ./uaputl.exe sys_cfg_80211d country IN      
+        for using country as INDIA
+
+    ./uaputl.exe sys_cfg_80211d state 1 country US 
+        for enabling and setting country in single command.
+
+uap_stats
+---------
+    "./uaputl.exe uap_stats"
+    This command is used to get uAP statistics.
+
+    Example:
+    ./uaputl.exe uap_stats
+
+pscfg 
+---------
+    "./uaputl.exe pscfg [MODE] [CTRL INACTTO MIN_SLEEP MAX_SLEEP MIN_AWAKE MAX_AWAKE]
+
+    This command is used to set or get the AP's power mode and power save params. 
+
+    The supported options are:
+        MODE :     0 - disable power mode
+                   2 - enable inactivity based power save mode
+
+        PS PARAMS:  
+            CTRL:  0 - disable protection frame Tx before PS
+                   1 - enable protection frame Tx before PS
+            INACTTO: Inactivity timeout in microseconds, default value is 200000 us
+            MIN_SLEEP: Minimum sleep duration in microseconds, default value 17000 us 
+            MAX_SLEEP: Maximum sleep duration in microseconds, default value 17000 us
+			The value of MIN_SLEEP should be >= 5000 us.
+			The value of MAX_SLEEP should be <= beacon interval(when ctrl: 0).
+			The value of MAX_SLEEP should be <= 32000 us(when ctrl: 1).
+
+            MIN_AWAKE: Minimum awake duration in microseconds, default value is 2000 us
+            MAX_AWAKE: Maximum awake duration in microseconds, default value is 2000 us
+			The value of MIN_AWAKE should be >= 2000 us.
+            MIN_AWAKE,MAX_AWAKE only valid when MODE is set to inactivity based power save mode.
+            
+                           
+	empty - Get current power mode and power save params.
+
+    Example: 
+	./uaputl.exe pscfg 0
+		Disable AP's power mode.
+
+   	./uaputl.exe pscfg 2
+		Enable inactivity based power save mode.   
+
+   	./uaputl.exe pscfg 2 1 400000 20000 20000 10000 10000
+		Enable inactivity based power save mode, enable protection, set inactivity timeout 400000 us
+        set minimum sleep duration to 20000 us, maximum sleep duration to 20000 us
+        and set minimum awake duration to 10000us, maximum awake duration to 10000 us
+
+	./uaputl.exe pscfg 
+		Get current AP's power mode and power save params. 
+
+hscfg
+-----
+    ./uaputl.exe hscfg [condition [[GPIO# [gap]]]]
+	This command is used to configure the host sleep parameters.
+
+	This command takes one (condition), two (condition and GPIO#) or three 
+	(condition, GPIO# and gap) parameters for set. If no parameter provided, 
+	get is performed.
+
+	where Condition is:
+		bit 0 = 1   -- broadcast data
+		bit 1 = 1   -- unicast data
+		bit 2 = 1   -- mac event
+		bit 3 = 1   -- multicast data
+		bit 6 = 1   -- Wakeup when mgmt frame received
+
+	The host sleep mode will be cancelled if condition is set to 0xffff. 
+	The default is 0x7.
+
+	where GPIO is the pin number of GPIO used to wakeup the host. It could be 
+	any valid GPIO pin# (e.g. 0-7) or 0xff (interface, e.g. SDIO will be used 
+	instead). The default is 0xff.
+
+	where Gap is the gap in milliseconds between wakeup signal and wakeup event
+	or 0xff for special setting when GPIO is used to wakeup host. The default is 200.
+
+	Examples:
+		./uaputl.exe hscfg              : Get current host sleep mode
+		./uaputl.exe hscfg 0xffff       : Cancel host sleep mode
+		./uaputl.exe hscfg 3            : Broadcast and unicast data
+		                                  Use GPIO and gap set previously
+		./uaputl.exe hscfg 2 3          : Unicast data
+		                                  Use GPIO 3 and gap set previously
+		./uaputl.exe hscfg 2 1 0xa0     : Unicast data
+		                                  Use GPIO 1 and gap 160 ms
+		./uaputl.exe hscfg 2 0xff       : Unicast data
+		                                  Use interface (e.g. SDIO)
+		                                  Use gap set previously
+		./uaputl.exe hscfg 4 3 0xff     : MAC event
+		                                  Use GPIO 3
+		                                  Special host sleep mode
+		./uaputl.exe hscfg 1 0xff 0xff  : Broadcast data
+		                                  Use interface (e.g. SDIO)
+		                                  Use gap 255ms
+
+sta_deauth_ext
+--------------
+    "./uaputl.exe sta_deauth_ext <STA_MAC_ADDRESS><REASON_CODE>"
+
+    This command is used to de-authenticate a client station with specific reason code.
+
+    Example:
+        ./uaputl.exe sta_deauth_ext 00:50:43:20:34:58  4
+            deauth station 00:50:43:20:34:58 with IEEE reason code 4 (Disassociated due to inactivity)
+
+sys_cfg_custom_ie
+-----------------
+    "./uaputl.exe sys_cfg_custom_ie [INDEX] [MASK] [IEBuffer]"
+
+    This command is used to set or get custom IEs for management frames.
+
+    The supported options are:
+        INDEX:       0 - IE Index is 0 
+                     1 - IE Index is 1 
+                     2 - IE Index is 2  
+                     3 - IE Index is 3 
+               	    -1 - Append/Delete IE automatically
+                         Delete will delete the IE from the matching IE buffer
+                         Append will append the IE to the buffer with the same mask
+        MASK :       Management subtype mask value as per bit definitions
+	                   :  Bit 0 - Association request.
+	                   :  Bit 1 - Association response.
+	                   :  Bit 2 - Reassociation request.
+	                   :  Bit 3 - Reassociation response.
+	                   :  Bit 4 - Probe request.
+	                   :  Bit 5 - Probe response.
+	                   :  Bit 8 - Beacon.
+        MASK :       MASK = 0 to clear the mask and the IE buffer
+
+        IEBuffer:    IE buffer to set in hexadecimal bytes.
+	                  The Buffer should not be space separated.
+	                  ( Maximum length = 256 bytes )
+        empty - Get IE buffer, subtype mask settings for all the indices [0-3]. 
+        INDEX - Only INDEX will get the IE buffer configured for the particular
+                Index.
+
+    Example: 
+	./uaputl.exe sys_cfg_custom_ie
+		Get IE buffer, subtype mask settings for all indices [0-3].
+
+	./uaputl.exe sys_cfg_custom_ie 1
+		Get IE buffer and subtype mask WEP key setting for the Index = 1.
+
+	./uaputl.exe sys_cfg_custom_ie 2 0
+		Clear IE buffer and mask value for Index = 2. 
+
+	./uaputl.exe sys_cfg_custom_ie 3 0x101 0xdd051234567890
+		Set IE buffer and mask value for Index = 3. 
+
+	./uaputl.exe sys_cfg_custom_ie -1 0x101 0xdd051234567890
+		Append the specified IEBuffer at index with mask value of 0x101
+	
+	./uaputl.exe sys_cfg_custom_ie -1 0 0xdd051234567890
+		Delete the specified IEBuffer from all the IEs at 0-3 index.
+
+	./uaputl.exe sys_cfg_custom_ie 2 0 0xdd051234567890
+		Delete the specified IEBuffer from the IEs at index 2.
+
+sys_cfg_wmm
+-----------
+    "./uaputl.exe sys_cfg_wmm [qosinfo=<qosinfo>]
+                              [0]
+                              [AC_BE AIFSN ECW_MAX ECW_MIN TX_OP]
+                              [AC_BK AIFSN ECW_MAX ECW_MIN TX_OP]
+                              [AC_VI AIFSN ECW_MAX ECW_MIN TX_OP]
+                              [AC_VO AIFSN ECW_MAX ECW_MIN TX_OP]" 
+
+    This command can be used set/get WMM parameters
+
+    The supported option are:
+        qosinfo: qos information. User can set only MSB. Valid values are 0x80 and 0x00.
+        Lower 4 bits are managed by FW. Hence, value read for qosinfo may have
+        lower 4 bits non-zero.
+
+        AC_BE: 0
+        AC_BK: 1
+        AC_VI: 2
+        AC_V0: 3
+        AIFSN: AIFSN value
+        ECW_MAX: ECW max
+        ECW_MIN: ECW min
+        TX_OP: TXOP Limit
+        empty - Get current WMM parameters
+        When all the parameter are 0, wmm will be disabled. 
+
+        Example:
+        ./uaputl.exe sys_cfg_wmm 0 3 10 4 0
+           Set AC_BE with AIFSN 3, ECW_MAX 10, ECW_MIN 4 and TXOP 0
+        
+        ./uaputl.exe sys_cfg_wmm 1 7 10 4 0
+           Set AC_BK with AIFSN 7, ECW_MAX 10, ECW_MIN 4 and TXOP 0
+
+        ./uaputl.exe sys_cfg_wmm 2 2 4 3 94
+           Set AC_VI with AIFSN 2, ECW_MAX 4, ECW_MIN 3 and TXOP 94
+
+        ./uaputl.exe sys_cfg_wmm 3 2 3 2 47
+           Set AC_VO with AIFSN 2, ECW_MAX 3, ECW_MIN 2 and TXOP 47
+
+        ./uaputl.exe sys_cfg_wmm
+            Get current wmm parameters
+        
+        ./uaputl.exe sys_cfg_wmm 0 3 10 4 0 1 7 10 4 0 2 2 4 3 94 3 2 3 2 47
+            Set AC_BE with AIFSN 3, ECW_MAX 10, ECW_MIN 4 and TXOP 0
+            Set AC_BK with AIFSN 7, ECW_MAX 10, ECW_MIN 4 and TXOP 0
+            Set AC_VI with AIFSN 2, ECW_MAX 4, ECW_MIN 3 and TXOP 94
+            Set AC_VO with AIFSN 2, ECW_MAX 3, ECW_MIN 2 and TXOP 47
+
+        ./uaputl.exe sys_cfg_wmm qosinfo=0x80 0 3 10 4 0 1 7 10 4 0 2 2 4 3 94 3 2 3 2 47
+            Enable wmm PS mode.
+            Set AC_BE with AIFSN 3, ECW_MAX 10, ECW_MIN 4 and TXOP 0
+            Set AC_BK with AIFSN 7, ECW_MAX 10, ECW_MIN 4 and TXOP 0
+            Set AC_VI with AIFSN 2, ECW_MAX 4, ECW_MIN 3 and TXOP 94
+            Set AC_VO with AIFSN 2, ECW_MAX 3, ECW_MIN 2 and TXOP 47
+
+        ./uaputl.exe sys_cfg_wmm 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+        ./uaputl.exe sys_cfg_wmm 0
+            Disable wmm
+
+addbapara
+---------
+    "./uaputl.exe addbapara [timeout txwinsize rxwinsize]"
+	This command can be used to update the default ADDBA parameters.
+
+	The supported options are:
+	    timeout - This is the block ack timeout for ADDBA request. 
+		    0 : Disable (recommended for throughput test)
+		    1 - 65535 : Block Ack Timeout in TU
+	    txwinsize - Buffer size for ADDBA request. (64 is recommended and default value)
+	    rxwinsize - Buffer size for ADDBA response. (8 is recommended for uap)
+        empty - Get current ADDBA parameters.
+
+    Current window size limit for Tx as well as Rx is 1023.
+
+	Example:
+	./uaputl.exe addbapara 
+        Get the current addba params
+    ./uaputl.exe addbaparam 1000 64 8 
+        This will change the ADDBA timeout to (1000 * 1024) us,	txwinsize to 64 and rxwinsize to 5.
+
+	In case the ADDBA timeout value is updated then a ADDBA is sent for all streams 
+	to update the timeout value.
+
+	In case txwinsize and/or rxwinsize is updated, the effect could only be seen on
+	next ADDBA request/response. The current streams will not be affected with this
+	change.
+
+sys_cfg_11n
+-----------
+    "./uaputl.exe sys_cfg_11n [ENABLE] [HTCAP] [AMPDU] [TXBFCAP]"
+    This command can be used set/get 802.11n parameters. 
+    
+    The supported option are:
+        ENABLE: 0 - disable 802.11n in uap
+                1 - enable 802.11n in uap
+        HTCAP: HT Capabilities info (default value is 0x111c)
+               Bit 15-13: Reserved set to 0
+               Bit 12: DSS/CCK mode in 40MHz enable/disable
+               Bit 11-10: Reserved set to 0
+               Bit 9-8: Reserved set to 0x01
+               Bit 7: Reserved set to 0
+               Bit 6: Short GI in 40 Mhz enable/disable
+               Bit 5: Short GI in 20 Mhz enable/disable
+               Bit 4: Green field enable/disble
+               Bit 3-2: Reserved set to 1
+               Bit 1: 20/40 Mhz enable disable.
+               Bit 0: Reserved set to 0
+        AMPDU: A-MPDU Parameter (default value is 0x03)
+               Bit 7-5: Reserved set to 0
+               Bit 4-2: Minimum MPDU Start spacing
+                        Set to 0 for no restriction
+                        Set to 1 for 1/4 us
+                        Set to 2 for 1/2 us
+                        Set to 3 for 1 us
+                        Set to 4 for 2 us
+                        Set to 5 for 4 us
+                        Set to 6 for 8 us
+                        Set to 7 for 16 us
+               Bit 1-0: Max A-MPDU length
+        TXBFCAP: TX Beamforming capabilities
+               Bit 0    : Implicit TX BF receiving capable
+               Bit 1    : RX staggered sounding capable
+               Bit 2    : TX staggered sounding capable
+               Bit 3    : RX NDP capable
+               Bit 4    : TX NDP capable
+               Bit 5    : Implicit TX BF capable
+               Bit 6-7  : Calibration
+                       0: - not supported
+                       1: - STA can respond to a calibration request using
+                            the CSI Report, but cannot initiate calibration
+                       2: - reserved
+                       3: - STA can both initiate and respond to a calibration request
+               Bit 8    : Explicit CSI TX BF capable
+               Bit 9    : Explicit non-compressed steering capable
+               Bit 10   : Explicit compressed steering capable
+               Bit 11-12: Explicit TX BF CSI feedback
+                       0: - not supported
+                       1: - delayed feedback
+                       2: - immediate feedback
+                       3: - delayed and immediate feedback
+               Bit 13-14: Explicit non-compressed BF feedback capable
+                       0: - not supported
+                       1: - delayed feedback
+                       2: - immediate feedback
+                       3: - delayed and immediate feedback
+               Bit 15-16: Explicit compressed BF feedback capable
+                       0: - not supported
+                       1: - delayed feedback
+                       2: - immediate feedback
+                       3: - delayed and immediate feedback
+               Bit 17-18: Minimal grouping
+                       0: - no grouping (STA supports groups of 1)
+                       1: - groups of 1, 2
+                       2: - groups of 1, 4
+                       3: - groups of 1, 2, 4
+               Bit 19-20: CSI number of beamformer antennas supported
+                       0: - single TX antenna sounding
+                       1: - 2 TX antenna sounding
+                       2: - 3 TX antenna sounding
+                       3: - 4 TX antenna sounding
+               Bit 21-22: Non-compressed steering number of beamformer antennas supported
+                       0: - single TX antenna sounding
+                       1: - 2 TX antenna sounding
+                       2: - 3 TX antenna sounding
+                       3: - 4 TX antenna sounding
+               Bit 23-24: Compressed steering number of beamformer antennas supported
+                       0: - single TX antenna sounding
+                       1: - 2 TX antenna sounding
+                       2: - 3 TX antenna sounding
+                       3: - 4 TX antenna sounding
+               Bit 25-26: CSI max number of rows beamformer supported
+                       0: - single row of CSI
+                       1: - 2 rows of CSI
+                       2: - 3 rows of CSI
+                       3: - 4 rows of CSI
+               Bit 27-28: Channel estimation capability
+                       0: - 1 space time stream
+                       1: - 2 space time streams
+                       2: - 3 space time streams
+                       3: - 4 space time streams
+               Bit 29-31: Reserved
+        empty - Get current 802.11n parameters.
+        
+        Example:
+        ./uaputl.exe sys_cfg_11n 1 0x117e 3
+            enable 802.11n, and set HT Capabilities info to 0x117e, and A-MPDU Parameter to 0x03
+        ./uaputl.exe sys_cfg_11n 1 0x117e 3 0xFFFFFFFF
+            enable 802.11n, and set HT Capabilities info to 0x117e, A-MPDU
+            Parameter to 0x03 and TX Beamforming capabilities to 0xFFFFFFFF
+        ./uaputl.exe sys_cfg_11n 0
+            disable 802.11n in uap 
+        ./uaputl.exe sys_cfg_11n
+            Get current 802.11n parameters
+
+aggrpriotbl
+-----------
+        "./uaputl.exe aggrpriotbl <m0> <n0> <m1> <n1> ... <m7> <n7>"
+        This command is used set/get the priority table for AMPDU/AMSDU traffic per tid.
+	    This command can also be used to disable AMPDU/AMSDU for a given tid.
+	    In case of AMPDU this priority table will be used to setup block ack (to make
+	    sure the highest priority tid always uses AMPDU as we have limited AMPDU streams)
+        
+        The supported option are:
+            <m0> <n0> <m1> <n1> ... <m7> <n7>
+
+	    <mx> - This is priority for Tid0 for AMPDU packet. A priority could be any 
+                values between 0 - 7, 0xff to disable aggregation.
+	    <nx> - This is priority for Tid0 for AMSDU packet. A priority could be any 
+		        values between 0 - 7, 0xff to disable aggregation. 
+        
+        empty - Get current priority table for AMPDU/AMSDU traffic.
+        
+        Example:
+        ./uaputl.exe aggrpriotbl  
+            This command will get the current Priority table for AMPDU and AMSDU.
+			<2 2 0 0 1 1 3 3 4 4 5 5 255 255 255 255>. This is read as
+			<"Prio for AMPDU for Tid0" "Prio for AMSDU for Tid0" 
+			"Prio for AMPDU for Tid1" "Prio for AMSDU for Tid1" and so on
+
+	    ./uaputl.exe aggrpriotbl 2 2 0 0 1 1 3 3 4 4 5 5 255 255 255 255 
+            This will set the priority table for AMPDU and AMSDU
+			Priority for Tid0/AMPDU = 2, Tid0/AMSDU = 2, Tid1/AMPDU = 0, Tid1/AMSDU = 0
+			and so on. Aggregation for Tid6 and Tid7 are disabled. 
+			Here higher the priority number, higher the priority (i.e. 7 
+			has higher priority than 6). Similarly for AMSDU.
+
+	    ./uaputl.exe aggrpriotbl 0xff 2 0xff 0 0xff 1 0xff 3 0xff 4 0xff 5 0xff 0xff 0xff 0xff 
+            This will disable AMPDU for all the TIDs but will still keep AMSDU enabled to Tid0 to Tid5
+
+	    The default setting is 2 255 0 255 1 255 3 255 4 255 5 255 255 255 255 255.
+
+	    A delBA should be seen in case a disable happens on a TID for which AMPDU stream 
+	        is currently setup. 
+
+        Note:- This command should only be issued in disconnected state.
+
+addbareject
+-----------
+        "./uaputl.exe addbareject <m0> <m1> ... <m7>"
+        This command is used set/get the addbareject table for all the TIDs.
+	    This command can also be used to enable rejection of ADDBA requests for a given tid.
+
+        The supported option are:
+            <m0> <m1> ... <m7>
+        <mX> - This can be 0/1 for TidX. 1 enables rejection of ADDBA request for TidX and 
+		   0 would accept any ADDBAs for TidX.
+        empty - Get current addbareject table for all the TIDs.
+
+        Example:
+        ./uaputl.exe addbareject 
+            This command will get the current table.
+	        [0 0 0 0 0 0 0 0]. ADDBA would be accepted for all TIDs. This is the default state.
+
+        ./uaputl.exe addbareject 0 0 1 1 0 0 0 0 
+            This command will accept ADDBA requests for Tid [0,1,4,5,6,7] and reject ADDBA requests for Tid [2,3]
+							
+	    ./uaputl.exe addbareject 1 1 1 1 1 1 1 1 
+            This will enable rejection of ADDBA requests for all Tids.
+
+        Note:- This command should only be issued in disconnected state.
+
+txpwrlimit_cfg_get
+txpwrlimit_2g_cfg_set
+txpwrlimit_5g_cfg_set
+------------------
+    This command is used to set/get the configuration data of Tx power limitation.
+    Note: The configuration set should be issued when no STA is connected.
+
+    Examples:
+        ./uaputl.exe hostcmd config/txpwrlimit_cfg.conf txpwrlimit_cfg_get
+        ./uaputl.exe hostcmd config/txpwrlimit_cfg.conf txpwrlimit_2g_cfg_set
+        ./uaputl.exe hostcmd config/txpwrlimit_cfg.conf txpwrlimit_5g_cfg_set
+
+tx_data_pause
+-------------
+  "./uaputl.exe tx_data_pause [ENABLE][TX_BUF_CNT]"
+
+    This command is used to set/get tx data pause settings.
+
+    The supported option are:
+        [ENABLE]: Enable/disable pause tx events from firmware to host. 
+        [TX_BUF_CNT]: Max number of TX buffers allowed for all PS clients
+        empty - Get current tx data pause settings
+    
+    Example:
+    ./uaputl.exe tx_data_pause      : Display tx data pause settings
+    ./uaputl.exe tx_data_pause 1    : Enable pause tx event, max tx buffer number unchanged.
+    ./uaputl.exe tx_data_pause 0    : Disable pasue tx event, max tx buffer number unchanged.
+    ./uaputl.exe tx_data_pause 1 22 : Enable pause tx event, with max tx buffer number 22.  
+
+
+===============================================================================
+        U S E R  M A N U A L  F O R  MLANEVENT
+
+NAME
+mlanevent.exe 
+
+This tool can be used to listen for and obtain events from the uAP driver
+through the netlink layer.
+
+----------------
+Supported events
+----------------
+STA_DEAUTH
+STA_ASSOC
+BSS_START
+BSS_IDLE
+BSS_ACTIVE
+
+-----------------
+Details of events
+-----------------
+
+STA_DEAUTH
+----------
+    For this event, the following information is shown:
+        + Deauthenticated STA MAC address.
+        + Reason for deauthentication.
+
+STA_ASSOC
+---------
+    For this event, the following information is shown:
+        + STA MAC address.
+
+BSS_START
+---------
+    For this event, the following information is shown:
+        + AP MAC address.
+
+BSS_IDLE
+--------
+    For this event, there is no associated information.
+
+BSS_ACTIVE
+----------
+    For this event, there is no associated information.
+
+===============================================================================
+        U S E R  M A N U A L  F O R  IWPRIV
+
+NAME
+	This manual describes the usage of private commands used in Marvell MLAN
+	Linux UAP Driver.
+
+	To use parameters as hex format, a '0x' must precede it for the parameters to 
+	be parsed properly.
+
+SYNOPSIS
+	iwpriv <uapX> <command> [sub-command] ...
+
+	iwpriv uapX version
+	iwpriv uapX verext
+	iwpriv uapX start
+	iwpriv uapX stop
+	iwpriv uapX bssstart
+	iwpriv uapX bssstop
+	iwpriv uapX fwreload <path>
+	iwpriv uapX apcfg "ASCII_CMD=AP_CFG,SSID=TEST_uAP,[SEC,][KEY,]
+	                   [CHANNEL,][PREAMBLE,][MAX_SCB,][END]"
+
+DESCRIPTION
+	Those commands are used to send additional commands to the Marvell MLAN
+	card via the Linux device driver.
+
+	The uapX parameter specifies the network device that is to be used to 
+	perform this command on. It could be uap0, uap1 etc.
+
+version	
+	This is used to get the current version of the driver and the firmware.
+
+verext
+	Retrieve and display an extended version string from the firmware
+
+	Usage:
+		iwpriv uapX verext [#]
+
+	where [#] is an optional argument to retrieve a specific version string,
+	omission of the argument retrieves the 0 indexed string.
+
+start
+	Start the uAP driver.
+
+	Usage:
+		iwpriv uapX start
+
+stop
+	Stop the uAP driver.
+
+	Usage:
+		iwpriv uapX stop
+
+bssstart
+	Start the AP mode, so that uAP will start transmitting beacon.
+
+	Usage:
+		iwpriv uapX bssstart
+
+bssstop
+	Stop the AP mode and disconnect all stations. uAP will stop
+	transmitting beacon as well.
+
+	Usage:
+		iwpriv uapX bssstop
+
+fwreload
+	Reload the firmware. Here string "FW_PATH=" in the path
+	argument is mandatory part.
+
+	Usage:
+		iwpriv uapX fwreload <path>
+
+apcfg
+	This command is used to set the AP configurations. Here string
+	"ASCII_CMD=AP_CFG" is minimum requirement in the ASCII string.
+	Note: BSS will be stopped then restarted if BSS is already started 
+	when the command is received.
+
+	Usage:
+		iwpriv uapX apcfg "ASCII_CMD=AP_CFG,SSID=TEST_uAP,[SEC=sec,]
+			[KEY=key,][CHANNEL=channel,][MAX_SCB=max_scb,][END]"
+
+	Where the parameters are:
+		SSID:       Set SSID to be used in beacon and probe response
+		[SEC]:      Security modes - open or wpa2-psk
+		[KEY]:      Encrypted key for WPA2-PSK, minimum 8 chars
+		[CHANNEL]:  Channel to be selected
+		[MAX_SCB]:  Maximum STA number
+		[END]:      Optional termination in ASCII string
+
+	Examples:
+		iwpriv uap0 apcfg "ASCII_CMD=AP_CFG,SSID=TEST_uAP"
+                                        : Set AP SSID to "TEST_uAP"
+		iwpriv uap0 apcfg "ASCII_CMD=AP_CFG,SSID=TEST_uAP,SEC=open"
+                                        : Set AP SSID to "TEST_uAP" and
+                                          security mode is disabled
+		iwpriv uap0 apcfg "ASCII_CMD=AP_CFG,SSID=TEST_uAP,SEC=WPA2-PSK,KEY=ecbe5facdbfe234a"
+                                        : Set AP SSID to "TEST_uAP" and security mode
+                                          to WPA2-SPK and encrypted key ecbe5facdbfe234a
+		iwpriv uap0 apcfg "ASCII_CMD=AP_CFG,SSID=TEST_uAP,CHANNEL=8"
+                                        : Set AP SSID to "TEST_uAP" and
+                                          set the AP channel to 8
+
+===============================================================================
diff -uNra linux-3.0.82/drivers/net/wireless/wm8782/README_WIFIDIRECT linux-3.0.82x/drivers/net/wireless/wm8782/README_WIFIDIRECT
--- linux-3.0.82/drivers/net/wireless/wm8782/README_WIFIDIRECT	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/net/wireless/wm8782/README_WIFIDIRECT	2017-09-23 03:42:50.182674562 +0800
@@ -0,0 +1,376 @@
+
+===============================================================================
+
+        S E T U P  I N S T R U C T I O N S F O R  *WifiDirect*
+
+Driver,FW release:
+
+1. Make sure, bg_scan.conf,uaputl.conf has SSID starting with "DIRECT-"
+2. Download uAP configuration and BG scan configuration.
+
+WPSWIFIDIRECT release:
+
+1. Modify the wifidirect.conf file to specify the correct HW addresses of
+   devices. The DUT mac address and peer mac address needs to be correctly
+   entered.
+
+===============================================================================
+        U S E R  M A N U A L  F O R  WIFIDIRECTUTL
+
+NAME
+	wifidirectutl
+
+This tool can be used to configure WifiDirect parameters.
+
+------------------
+Supported Commands
+------------------
+wifidirect_mode [MODE]
+wifidirect_config [*.conf]
+wifidirect_params_config [*.conf]
+wifidirect_action_frame <*.conf> | [<PeerAddr> <Category> <OuiSubtype> <DialogToken>]
+wifidirect_discovery_request <*.conf>
+wifidirect_discovery_response <*.conf>
+
+wifidirect_cfg_discovery_period [<MinDiscPeriod> <MaxDiscPeriod>]
+wifidirect_cfg_intent [IntentValue]
+wifidirect_cfg_capability [<DeviceCapability> <GroupCapability>]
+wifidirect_cfg_noa <enable|disable> <index> [<counttype> <duration> <interval>]
+wifidirect_cfg_opp_ps <enable|disable> [<CTWindow>]
+wifidirect_cfg_invitation_list [mac_addr]
+wifidirect_cfg_listen_channel [ListenChannel]
+wifidirect_cfg_op_channel [OperatingChannel]
+wifidirect_cfg_persistent_group_record [index] [role]
+           [<groupbss> <deviceId> <ssid> <psk>] [peermac1] [peermac2]
+wifidirect_cfg_persistent_group_invoke [index] | <cancel>
+wifidirect_cfg_presence_req_params [<type> <duration> <interval>]
+wifidirect_cfg_ext_listen_time [<duration> <interval>]
+wifidirect_cfg_provisioning_params [<action> <configMethods> <devicePassword>]
+wifidirect_cfg_wps_params [<action>]
+
+wifidirect_mode [mode]
+----------
+    "./wifidirectutl <iface> wifidirect_mode [mode]"
+
+    This command is used to setup various modes for wifidirect device.
+    The mode 2 can be used only when wifidirect is started using mode 1.
+    The mode 3 should not be used for uAP.
+
+    The supported options are:
+        mode :     0 - stop wifidirect mode
+                   1 - start wifidirect mode
+                   2 - start wifidirect group owner mode
+                   3 - start wifidirect client mode
+                   4 - start wifidirect find phase
+                   5 - stop wifidirect find phase
+        empty - Get current wifidirect mode
+
+    Example:
+        ./wifidirectutl <iface> wifidirect_mode 0
+                Stop wifidirect mode.
+
+        ./wifidirectutl <iface> wifidirect_mode 1
+                Start wifidirect mode.
+
+        ./wifidirectutl <iface> wifidirect_mode
+                Get current WIFIDIRECT start/stop mode.
+
+wifidirect_config
+----------
+    "./wifidirectutl <iface> wifidirect_config [*.conf]"
+
+    This command is used to set/get the wifidirect configuration.
+
+        Example:
+        ./wifidirectutl <iface> wifidirect_config wifidirect.conf
+            Read configuration from wifidirect.conf and apply it.
+        ./wifidirectutl <iface> wifidirect_config
+            Read existing wifidirect configuration and display it.
+
+wifidirect_params_config
+----------
+    "./wifidirectutl <iface> wifidirect_params_config [*.conf]"
+
+    This command is used to set/get the wifidirect parameters configuration.
+
+        Example:
+        ./wifidirectutl <iface> wifidirect_params_config wifidirect.conf
+            Read parameter configuration from wifidirect.conf and apply it.
+        ./wifidirectutl <iface> wifidirect_params_config
+            Read existing wifidirect parameters's configuration and display it.
+
+wifidirect_action_frame
+----------
+    "./wifidirectutl <iface> wifidirect_action_frame <*.conf> | <PeerAddr> <Category> <OUISubtype> <DialogToken>"
+
+    This command is used to send action frames as specified in config file or on command line.
+
+        Example:
+        ./wifidirectutl <iface> wifidirect_action_frame wifidirect.conf
+            Read action_frame from wifidirect.conf and send to peer.
+        ./wifidirectutl <iface> wifidirect_action_frame <PeerAddr> <Category> <OUISubtype> <DialogToken>
+            Read action frame parameters from command line and send to peer.
+
+wifidirect_discovery_request
+----------
+    "./wifidirectutl <iface> wifidirect_discovery_request <*.conf>"
+
+    This command is used to send wifidirect discovery request packet.
+
+        Example:
+        ./wifidirectutl <iface> wifidirect_discovery_request wifidirect.conf
+            Read discovery packet from wifidirect.conf and send to peer.
+
+wifidirect_discovery_response
+----------
+    "./wifidirectutl <iface> wifidirect_discovery_response <*.conf>"
+
+    This command is used to send wifidirect discovery response packet.
+
+        Example:
+        ./wifidirectutl <iface> wifidirect_discovery_response wifidirect.conf
+            Read discovery packet from wifidirect.conf and send to peer.
+
+wifidirect_cfg_discovery_period
+----------
+	"./wifidirectutl <iface> wifidirect_cfg_discovery_period [<MinDiscPeriod> <MaxDiscPeriod>]"
+
+	This command is used to set or get minimum and maximum discovery period.
+
+		Example:
+		./wifidirectutl <iface> wifidirect_cfg_discovery_period 10 20
+		Set minimum discovery interval to 10 and maximum discovery 
+		interval to	20.
+
+		./wifidirectutl <iface> wifidirect_cfg_discovery_period
+		Get minimum and maximum discovery interval.
+
+wifidirect_cfg_intent
+----------
+	"./wifidirectutl <iface> wifidirect_cfg_intent [IntentValue]"
+
+	This command is used to set or get intent value.
+
+		Example:
+		./wifidirectutl <iface> wifidirect_cfg_intent 12
+		Set intent value to 12.
+
+		./wifidirectutl <iface> wifidirect_cfg_intent 
+		Get Group Owner Intent.
+
+wifidirect_cfg_capability
+----------
+	"./wifidirectutl <iface> wifidirect_cfg_capability [<DeviceCapability> <GroupCapability>]"
+
+	This command is used to set or get device capability and group capability.
+
+		Example:
+		./wifidirectutl <iface> wifidirect_cfg_capability 10 20
+		Set Device capability to 10 and group capability to 20
+
+		./wifidirectutl <iface> wifidirect_cfg_capability 
+		Get Device capability and group capability.
+
+wifidirect_cfg_noa
+----------
+	"./wifidirectutl <iface> wifidirect_cfg_noa <enable|disable> <index> [<counttype> <duration> <interval>]"
+
+	This command is used to set or get NoA parameters like count_type, duration and
+	interval in ms when NoA is enabled. Valid value of index is [0, 1].
+
+		Example:
+		./wifidirectutl <iface> wifidirect_cfg_noa enable 0 10 50 100
+		Enable NoA and set count to 10, duration to 50ms and interval to 100 ms
+            for index 0.
+
+		./wifidirectutl <iface> wifidirect_cfg_noa disable 1
+		Disable NoA at index 1.
+
+		./wifidirectutl <iface> wifidirect_cfg_noa 
+		Get NoA settings.
+
+wifidirect_cfg_opp_ps
+----------
+	"./wifidirectutl <iface> wifidirect_cfg_opp_ps <enable|disable> [<CTWindow>]"
+
+	This command is used to set or get Opportunistic power save and CT window.
+
+		Example:
+		./wifidirectutl <iface> wifidirect_cfg_opp_ps enable 50
+		Set OppPS and CTwindow value to 50.
+
+		./wifidirectutl <iface> wifidirect_cfg_opp_ps disable
+		Disable OppPS.
+
+		./wifidirectutl <iface> wifidirect_cfg_opp_ps
+		Get OppPS and CT window.
+
+wifidirect_cfg_invitation_list
+----------
+	"./wifidirectutl <iface> wifidirect_cfg_invitation_list [mac_addr]"
+
+	This command is used to set or get invitation list of peers.
+
+		Example:
+		./wifidirectutl <iface> wifidirect_cfg_invitation_list 00:50:43:20:23:34
+		Set 00:50:43:20:23:34 in invitation list of peers.
+
+		./wifidirectutl <iface> wifidirect_cfg_invitation_list
+		Get Invitation list of peers.
+
+wifidirect_cfg_listen_channel
+----------
+	"./wifidirectutl <iface> wifidirect_cfg_listen_channel [ListenChannel]"
+
+	This command is used to set or get Listen channel.
+
+		Example:
+		./wifidirectutl <iface> wifidirect_cfg_listen_channel 11
+		Set Listen channel to 11.
+
+		./wifidirectutl <iface> wifidirect_cfg_listen_channel
+		Get Listen channel.
+
+wifidirect_cfg_op_channel
+----------
+		"./wifidirectutl <iface> wifidirect_cfg_op_channel [OperatingChannel]"
+
+		This command is used to set or get Operating channel.
+
+		Example:
+		./wifidirectutl <iface> wifidirect_cfg_op_channel 11
+		Set Operating channel to 11.
+
+		./wifidirectutl <iface> wifidirect_cfg_op_channel
+		Get Operating channel.
+
+wifidirect_cfg_persistent_group_record
+----------
+		"./wifidirectutl <iface> [index] [role]
+                 [<groupbss> <deviceId> <ssid> <psk>] [peermac1] [peermac2]"
+
+		This command is used to set or get the persistent group record 
+        maintained in the device. Valid index is from 0 to 3. The role should be
+        0 for client, 1 for group-owner.
+
+		Example:
+		./wifidirectutl <iface> wifidirect_cfg_persistent_group_record 0 1
+        00:50:43:12:24:36 00:50:43:13:26:39 "DIRECT-" "1234567890"
+        00:50:43:20:c2:d0
+		Set persistent group record with index 0, role as group owner, bssId and
+        device Id, ssid="DIRECT-", passphrase="1234567890", and peer mac address.
+        The passphrase get converted to PSK.
+
+		./wifidirectutl <iface> wifidirect_cfg_persistent_group_record 1 1
+        00:50:43:12:24:36 00:50:43:13:26:39 "DIRECT-" "1234567890"
+        0x1234567890123456789012345678901234567890123456789012345678901234 
+		Set persistent group record with index 1, role as group owner, bssId and
+        device Id, ssid="DIRECT-", passphrase="1234567890", and peer mac address.
+        The passphrase get converted to PSK.
+        PSK is specified with "0x" prefix and 32 bytes (64 characters).
+
+		./wifidirectutl <iface> wifidirect_cfg_persistent_group_record 1
+		Get persistent group record with index 1.
+
+		./wifidirectutl <iface> wifidirect_cfg_persistent_group_record 
+		Get persistent group record for all indices.
+
+wifidirect_cfg_persistent_group_invoke
+----------
+		"./wifidirectutl <iface> wifidirect_cfg_persistent_group_invoke [index] | <cancel>"
+
+		This command is used to invoke a particular persistent group record 
+        from the list. Valid index is from 0 to 3.
+
+		./wifidirectutl <iface> wifidirect_cfg_persistent_group_invoke 2
+		Invoke persistent group record with index 1.
+
+		./wifidirectutl <iface> wifidirect_cfg_persistent_group_invoke cancel
+		Cancel invokation of persistent groups.
+
+wifidirect_cfg_presence_req_params
+----------
+		"./wifidirectutl <iface> wifidirect_cfg_presence_req_params [<type> <duration> <interval>]"
+
+		This command is used to set/get presence request parameters. Type should
+        be 1 for preferred values and 2 for acceptable values. 
+
+		./wifidirectutl <iface> wifidirect_cfg_presence_req_params 1 50 100
+		Set duration to 50ms and interval to 100ms.
+
+		./wifidirectutl <iface> wifidirect_cfg_presence_req_params
+		Get presence request parameters.
+
+wifidirect_cfg_ext_listen_time
+----------
+		"./wifidirectutl <iface> wifidirect_cfg_ext_listen_time [<duration> <interval>]"
+
+		This command is used to set/get extended listen timing parameters.
+
+		./wifidirectutl <iface> wifidirect_cfg_ext_listen_time 1200 1300
+		Set availability period to 1200ms and availability interval to 1300 ms.
+
+		./wifidirectutl <iface> wifidirect_cfg_ext_listen_time
+		Get extended listen timing parameters.
+
+wifidirect_cfg_provisioning_params
+----------
+		"./wifidirectutl <iface> wifidirect_cfg_provisioning_params [<action> <configMethod> <devicePassword>]"
+
+		This command is used to set/get provisioning protocol parameters. Action should
+        be 1 for request parameters and 2 for response parameters. 
+
+		./wifidirectutl <iface> wifidirect_cfg_provisioning_params 1 0x80 0x04
+		Set config method to 0x86 and device password to 0x04.
+
+		./wifidirectutl <iface> wifidirect_cfg_provisioning_params
+		Get Provision protocol parameters.
+
+wifidirect_cfg_wps_params
+----------
+		"./wifidirectutl <iface> wifidirect_cfg_wps_params [<action>]"
+
+		This command is used to set WPS action. action can be "pin" (pin entered),
+        "pbc"(button pressed) or "none".
+
+		Example:
+		./wifidirectutl <iface> wifidirect_cfg_wps_params pin
+		Indicates pin operation
+
+		./wifidirectutl <iface> wifidirect_cfg_wps_params none
+		Indicates no operation
+
+===============================================================================
+        U S E R  M A N U A L  F O R  MLANEVENT
+
+NAME
+mlanevent.exe 
+
+This tool can be used to listen for and obtain events from the driver
+through the netlink layer. This is only used for display/debugging purpose.
+
+----------------
+Supported events
+----------------
+WFD_GENERIC_EVENT
+WFD_SERVICE_DISCOVERY
+
+-----------------
+Details of events
+-----------------
+
+WFD_GENERIC_EVENT
+-----------------
+    For this event, the following information is shown:
+        + Event length.
+        + Event Type indicating Negociation, Invitation, Discoverability,
+		Provision discovery related Request or Response.
+        + Event SubType indicating Client or Group owner role.
+        + Peer MAC address.
+        + Associated WIFIDIRECT IE elements.
+
+WFD_SERVICE_DISCOVERY
+---------------------
+    For this event, the following information is shown:
+        + Peer MAC address.
+        + Service discovery packet details.
diff -uNra linux-3.0.82/drivers/rtc/Kconfig linux-3.0.82x/drivers/rtc/Kconfig
--- linux-3.0.82/drivers/rtc/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/rtc/Kconfig	2017-09-23 03:42:50.182674562 +0800
@@ -1060,4 +1060,14 @@
 	  This drive can also be built as a module. If so, the module
 	  will be called rtc-puv3.
 
+config RTC_DRV_LOONGSON1
+	tristate "loongson1 RTC support"
+	depends on MACH_LOONGSON1 || LS1A_MACH || LS1B_MACH || LS1C_MACH
+	help
+	  This is a driver for the loongson1 on-chip Counter0 (Time-Of-Year
+	  counter) to be used as a RTC.
+
+	  This driver can also be built as a module. If so, the module
+	  will be called rtc-ls1x.
+
 endif # RTC_CLASS
diff -uNra linux-3.0.82/drivers/rtc/Makefile linux-3.0.82x/drivers/rtc/Makefile
--- linux-3.0.82/drivers/rtc/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/rtc/Makefile	2017-09-23 03:42:50.182674562 +0800
@@ -14,7 +14,6 @@
 rtc-core-$(CONFIG_RTC_INTF_SYSFS) += rtc-sysfs.o
 
 # Keep the list ordered.
-
 obj-$(CONFIG_RTC_DRV_88PM860X)  += rtc-88pm860x.o
 obj-$(CONFIG_RTC_DRV_AB3100)	+= rtc-ab3100.o
 obj-$(CONFIG_RTC_DRV_AB8500)	+= rtc-ab8500.o
@@ -53,6 +52,7 @@
 obj-$(CONFIG_RTC_DRV_ISL12022)	+= rtc-isl12022.o
 obj-$(CONFIG_RTC_DRV_JZ4740)	+= rtc-jz4740.o
 obj-$(CONFIG_RTC_DRV_LPC32XX)	+= rtc-lpc32xx.o
+obj-$(CONFIG_RTC_DRV_LOONGSON1)	+= rtc-ls1x.o
 obj-$(CONFIG_RTC_DRV_M41T80)	+= rtc-m41t80.o
 obj-$(CONFIG_RTC_DRV_M41T93)	+= rtc-m41t93.o
 obj-$(CONFIG_RTC_DRV_M41T94)	+= rtc-m41t94.o
diff -uNra linux-3.0.82/drivers/rtc/rtc-ls1x.c linux-3.0.82x/drivers/rtc/rtc-ls1x.c
--- linux-3.0.82/drivers/rtc/rtc-ls1x.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/rtc/rtc-ls1x.c	2017-09-23 03:42:50.186674551 +0800
@@ -0,0 +1,224 @@
+/*
+ * Copyright (c) 2011 Zhao Zhang <zhzhl555@gmail.com>
+ *
+ * Derived from driver/rtc/rtc-au1xxx.c
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/rtc.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/types.h>
+#include <linux/io.h>
+#include <asm/mach-loongson/ls1x/ls1b_board.h>
+
+#define LS1X_RTC_REG_OFFSET	(LS1X_RTC_BASE + 0x20)
+#define LS1X_RTC_REGS(x) \
+		((void __iomem *)KSEG1ADDR(LS1X_RTC_REG_OFFSET + (x)))
+
+/*RTC programmable counters 0 and 1*/
+#define SYS_COUNTER_CNTRL		(LS1X_RTC_REGS(0x20))
+#define SYS_CNTRL_ERS			(1 << 23)
+#define SYS_CNTRL_RTS			(1 << 20)
+#define SYS_CNTRL_RM2			(1 << 19)
+#define SYS_CNTRL_RM1			(1 << 18)
+#define SYS_CNTRL_RM0			(1 << 17)
+#define SYS_CNTRL_RS			(1 << 16)
+#define SYS_CNTRL_BP			(1 << 14)
+#define SYS_CNTRL_REN			(1 << 13)
+#define SYS_CNTRL_BRT			(1 << 12)
+#define SYS_CNTRL_TEN			(1 << 11)
+#define SYS_CNTRL_BTT			(1 << 10)
+#define SYS_CNTRL_E0			(1 << 8)
+#define SYS_CNTRL_ETS			(1 << 7)
+#define SYS_CNTRL_32S			(1 << 5)
+#define SYS_CNTRL_TTS			(1 << 4)
+#define SYS_CNTRL_TM2			(1 << 3)
+#define SYS_CNTRL_TM1			(1 << 2)
+#define SYS_CNTRL_TM0			(1 << 1)
+#define SYS_CNTRL_TS			(1 << 0)
+
+#define SYS_RTC_CTRL	(LS1X_RTC_REGS(0x20))
+
+/* Programmable Counter 0 Registers */
+#define SYS_TOYTRIM		(LS1X_RTC_REGS(0))
+#define SYS_TOYWRITE0		(LS1X_RTC_REGS(4))
+#define SYS_TOYWRITE1		(LS1X_RTC_REGS(8))
+#define SYS_TOYREAD0		(LS1X_RTC_REGS(0xC))
+#define SYS_TOYREAD1		(LS1X_RTC_REGS(0x10))
+#define SYS_TOYMATCH0		(LS1X_RTC_REGS(0x14))
+#define SYS_TOYMATCH1		(LS1X_RTC_REGS(0x18))
+#define SYS_TOYMATCH2		(LS1X_RTC_REGS(0x1C))
+
+/* Programmable Counter 1 Registers */
+#define SYS_RTCTRIM		(LS1X_RTC_REGS(0x40))
+#define SYS_RTCWRITE0		(LS1X_RTC_REGS(0x44))
+#define SYS_RTCREAD0		(LS1X_RTC_REGS(0x48))
+#define SYS_RTCMATCH0		(LS1X_RTC_REGS(0x4C))
+#define SYS_RTCMATCH1		(LS1X_RTC_REGS(0x50))
+#define SYS_RTCMATCH2		(LS1X_RTC_REGS(0x54))
+
+#define LS1X_SEC_OFFSET		(4)
+#define LS1X_MIN_OFFSET		(10)
+#define LS1X_HOUR_OFFSET	(16)
+#define LS1X_DAY_OFFSET		(21)
+#define LS1X_MONTH_OFFSET	(26)
+
+
+#define LS1X_SEC_MASK		(0x3f)
+#define LS1X_MIN_MASK		(0x3f)
+#define LS1X_HOUR_MASK		(0x1f)
+#define LS1X_DAY_MASK		(0x1f)
+#define LS1X_MONTH_MASK		(0x3f)
+#define LS1X_YEAR_MASK		(0xffffffff)
+
+#define ls1x_get_sec(t)		(((t) >> LS1X_SEC_OFFSET) & LS1X_SEC_MASK)
+#define ls1x_get_min(t)		(((t) >> LS1X_MIN_OFFSET) & LS1X_MIN_MASK)
+#define ls1x_get_hour(t)	(((t) >> LS1X_HOUR_OFFSET) & LS1X_HOUR_MASK)
+#define ls1x_get_day(t)		(((t) >> LS1X_DAY_OFFSET) & LS1X_DAY_MASK)
+#define ls1x_get_month(t)	(((t) >> LS1X_MONTH_OFFSET) & LS1X_MONTH_MASK)
+
+#define RTC_CNTR_OK (SYS_CNTRL_E0 | SYS_CNTRL_32S)
+
+static int ls1x_rtc_read_time(struct device *dev, struct rtc_time *rtm)
+{
+	unsigned long v, t;
+
+	v = readl(SYS_TOYREAD0);
+	t = readl(SYS_TOYREAD1);
+
+	memset(rtm, 0, sizeof(struct rtc_time));
+	t  = mktime((t & LS1X_YEAR_MASK), ls1x_get_month(v),
+			ls1x_get_day(v), ls1x_get_hour(v),
+			ls1x_get_min(v), ls1x_get_sec(v));
+	rtc_time_to_tm(t, rtm);
+
+	return rtc_valid_tm(rtm);
+}
+
+static int ls1x_rtc_set_time(struct device *dev, struct  rtc_time *rtm)
+{
+	unsigned long v, t, c;
+	int ret = -ETIMEDOUT;
+
+	v = ((rtm->tm_mon + 1)  << LS1X_MONTH_OFFSET)
+		| (rtm->tm_mday << LS1X_DAY_OFFSET)
+		| (rtm->tm_hour << LS1X_HOUR_OFFSET)
+		| (rtm->tm_min  << LS1X_MIN_OFFSET)
+		| (rtm->tm_sec  << LS1X_SEC_OFFSET);
+
+	writel(v, SYS_TOYWRITE0);
+	c = 0x10000;
+	/* add timeout check counter, for more safe */
+	while ((readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_TS) && --c)
+		usleep_range(1000, 3000);
+
+	if (!c) {
+		dev_err(dev, "set time timeout!\n");
+		goto err;
+	}
+
+	t = rtm->tm_year + 1900;
+	writel(t, SYS_TOYWRITE1);
+	c = 0x10000;
+	while ((readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_TS) && --c)
+		usleep_range(1000, 3000);
+
+	if (!c) {
+		dev_err(dev, "set time timeout!\n");
+		goto err;
+	}
+	return 0;
+err:
+	return ret;
+}
+
+static struct rtc_class_ops  ls1x_rtc_ops = {
+	.read_time	= ls1x_rtc_read_time,
+	.set_time	= ls1x_rtc_set_time,
+};
+
+static int __devinit ls1x_rtc_probe(struct platform_device *pdev)
+{
+	struct rtc_device *rtcdev;
+	unsigned long v;
+	int ret;
+
+	writel(0x2d00, SYS_RTC_CTRL);
+	v = readl(SYS_COUNTER_CNTRL);
+	if (!(v & RTC_CNTR_OK)) {
+		dev_err(&pdev->dev, "rtc counters not working\n");
+		ret = -ENODEV;
+		goto err;
+	}
+	ret = -ETIMEDOUT;
+	/* set to 1 HZ if needed */
+	if (readl(SYS_TOYTRIM) != 32767) {
+		v = 0x100000;
+		while ((readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_TTS) && --v)
+			usleep_range(1000, 3000);
+
+		if (!v) {
+			dev_err(&pdev->dev, "time out\n");
+			goto err;
+		}
+		writel(32767, SYS_TOYTRIM);
+	}
+	/* this loop coundn't be endless */
+	while (readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_TTS)
+		usleep_range(1000, 3000);
+
+	rtcdev = rtc_device_register("ls1x-rtc", &pdev->dev,
+					&ls1x_rtc_ops , THIS_MODULE);
+	if (IS_ERR(rtcdev)) {
+		ret = PTR_ERR(rtcdev);
+		goto err;
+	}
+
+	platform_set_drvdata(pdev, rtcdev);
+	return 0;
+err:
+	return ret;
+}
+
+static int __devexit ls1x_rtc_remove(struct platform_device *pdev)
+{
+	struct rtc_device *rtcdev = platform_get_drvdata(pdev);
+
+	rtc_device_unregister(rtcdev);
+	platform_set_drvdata(pdev, NULL);
+
+	return 0;
+}
+
+static struct platform_driver  ls1x_rtc_driver = {
+	.driver		= {
+		.name	= "ls1x-rtc",
+		.owner	= THIS_MODULE,
+	},
+	.remove		= __devexit_p(ls1x_rtc_remove),
+};
+
+static int __init ls1x_rtc_init(void)
+{
+	return platform_driver_probe(&ls1x_rtc_driver, ls1x_rtc_probe);
+}
+
+static void __exit ls1x_rtc_exit(void)
+{
+	platform_driver_unregister(&ls1x_rtc_driver);
+}
+
+module_init(ls1x_rtc_init);
+module_exit(ls1x_rtc_exit);
+
+MODULE_AUTHOR("zhao zhang <zhzhl555@gmail.com>");
+MODULE_LICENSE("GPL");
+
diff -uNra linux-3.0.82/drivers/spi/Kconfig linux-3.0.82x/drivers/spi/Kconfig
--- linux-3.0.82/drivers/spi/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/spi/Kconfig	2017-09-23 03:42:50.186674551 +0800
@@ -53,6 +53,26 @@
 
 comment "SPI Master Controller Drivers"
 
+
+config LS1B_SPI
+	tristate "Loongson 1B SPI Controller"
+	depends on (LS1B_MACH || LS1A_MACH || LS1C_MACH)
+	select SPI_BITBANG
+	help
+	  This is the driver for the Loongson 1B SOC SPI Controller.
+
+config LS1B_SPI0
+	bool "SPI Controller 0"
+	depends on LS1B_SPI
+	help
+	  This is the driver for the Loongson 1B SOC SPI Controller 0.
+	  
+config LS1B_SPI1
+	bool "SPI Controller 1"
+	depends on LS1B_SPI
+	help
+	  This is the driver for the Loongson 1B SOC SPI Controller 1.
+	  
 config SPI_ALTERA
 	tristate "Altera SPI Controller"
 	select SPI_BITBANG
diff -uNra linux-3.0.82/drivers/spi/ls1b_spi.c linux-3.0.82x/drivers/spi/ls1b_spi.c
--- linux-3.0.82/drivers/spi/ls1b_spi.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/spi/ls1b_spi.c	2017-09-23 03:42:50.186674551 +0800
@@ -0,0 +1,503 @@
+#include <linux/init.h>
+#include <linux/spinlock.h>
+#include <linux/workqueue.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <linux/io.h>
+#include <linux/slab.h>
+
+#include <linux/spi/spi.h>
+#include <linux/spi/spi_bitbang.h>
+
+#include <asm/types.h>
+#include <asm/io.h>
+#include <asm/dma.h>
+#include <ls1b_board.h>
+#include <irq.h>
+#include <spi.h>
+
+#define USE_POLL
+
+struct ls1b_spi_devstate {
+	unsigned int	hz;
+	u8		spcr;
+	u8		sper;
+};
+
+struct ls1b_spi {
+	/* bitbang has to be first */
+	struct spi_bitbang	 bitbang;
+	struct completion	 done;
+
+	void __iomem		*regs;
+	int irq;
+	int	len;
+	int	count;
+	
+	/* data buffers */
+	const unsigned char	*tx;
+	unsigned char		*rx;
+
+	struct clk			*clk;
+	struct resource		*ioarea;
+	struct spi_master	*master;
+	struct spi_device	*curdev;
+	struct device		*dev;
+	struct ls1b_spi_info *pdata;
+};
+
+static inline struct ls1b_spi *to_hw(struct spi_device *sdev)
+{
+	return spi_master_get_devdata(sdev->master);
+}
+
+static void ls1b_spi_chipsel(struct spi_device *spi, int value)
+{
+	struct ls1b_spi *hw = to_hw(spi);
+	unsigned char cspol = spi->mode & SPI_CS_HIGH ? 1 : 0;
+	unsigned char chip_select = (0x01 << (spi->chip_select + 4));
+
+	switch (value) {
+		case BITBANG_CS_INACTIVE:
+			if (cspol) {
+				writeb(0x00, hw->regs + REG_SOFTCS);
+			} else {
+				writeb(0xFF, hw->regs + REG_SOFTCS);
+			}
+		break;
+
+		case BITBANG_CS_ACTIVE:
+			if (cspol) {
+				writeb((chip_select | 0x0F), hw->regs + REG_SOFTCS);
+			} else {
+				writeb(~(chip_select), hw->regs + REG_SOFTCS);
+			}
+		break;
+	}
+}
+
+static int ls1b_spi_update_state(struct spi_device *spi,
+				    struct spi_transfer *t)
+{
+	struct ls1b_spi *hw = to_hw(spi);
+	struct ls1b_spi_devstate *cs = spi->controller_state;
+	unsigned int bpw;
+	unsigned int hz;
+	unsigned int div, div_tmp;
+	unsigned int bit;
+	unsigned long clk;
+
+	bpw = t ? t->bits_per_word : spi->bits_per_word;
+	hz  = t ? t->speed_hz : spi->max_speed_hz;
+
+	if (!bpw)
+		bpw = 8;
+
+	if (!hz)
+		hz = spi->max_speed_hz;
+
+	if (bpw != 8) {
+		dev_err(&spi->dev, "invalid bits-per-word (%d)\n", bpw);
+		return -EINVAL;
+	}
+
+	if (cs->hz != hz) {
+		clk = clk_get_rate(hw->clk);
+		div = DIV_ROUND_UP(clk, hz);
+
+		if (div < 2)
+			div = 2;
+
+		if (div > 4096)
+			div = 4096;
+
+		bit = fls(div) - 1;
+		switch(1 << bit) {
+			case 16: 
+				div_tmp = 2;
+				if (div > (1<<bit)) {
+					div_tmp++;
+				}
+				break;
+			case 32:
+				div_tmp = 3;
+				if (div > (1<<bit)) {
+					div_tmp += 2;
+				}
+				break;
+			case 8:
+				div_tmp = 4;
+				if (div > (1<<bit)) {
+					div_tmp -= 2;
+				}
+				break;
+			default:
+				div_tmp = bit-1;
+				if (div > (1<<bit)) {
+					div_tmp++;
+				}
+				break;
+		}
+		dev_dbg(&spi->dev, "clk = %ld hz = %d div_tmp = %d bit = %d\n", 
+		        clk, hz, div_tmp, bit);
+
+		cs->hz = hz;
+		cs->spcr = div_tmp & 3;
+		cs->sper = (div_tmp >> 2) & 3;
+	}
+
+	return 0;
+}
+
+static int ls1b_spi_setupxfer(struct spi_device *spi,
+				 struct spi_transfer *t)
+{
+	struct ls1b_spi_devstate *cs = spi->controller_state;
+	struct ls1b_spi *hw = to_hw(spi);
+	unsigned char val;
+	int ret;
+
+	ret = ls1b_spi_update_state(spi, t);
+	if (!ret) {
+		val = readb(hw->regs + REG_SPCR);
+		writeb((val & ~3) | cs->spcr, hw->regs + REG_SPCR);
+		val = readb(hw->regs + REG_SPER);
+		writeb((val & ~3) | cs->sper, hw->regs + REG_SPER);
+	}
+
+	return ret;
+}
+
+static int ls1b_spi_setup(struct spi_device *spi)
+{
+	struct ls1b_spi_devstate *cs = spi->controller_state;
+	struct ls1b_spi *hw = to_hw(spi);
+	int ret;
+
+	/* allocate settings on the first call */
+	if (!cs) {
+		cs = kzalloc(sizeof(struct ls1b_spi_devstate), GFP_KERNEL);
+		if (!cs) {
+			dev_err(&spi->dev, "no memory for controller state\n");
+			return -ENOMEM;
+		}
+
+		cs->hz = -1;
+		spi->controller_state = cs;
+	}
+
+	/* initialise the state from the device */
+	ret = ls1b_spi_update_state(spi, NULL);
+	if (ret)
+		return ret;
+
+	spin_lock(&hw->bitbang.lock);
+	if (!hw->bitbang.busy) {
+		hw->bitbang.chipselect(spi, BITBANG_CS_INACTIVE);
+		/* need to ndelay for 0.5 clocktick ? */
+	}
+	spin_unlock(&hw->bitbang.lock);
+
+	return 0;
+}
+
+static void ls1b_spi_cleanup(struct spi_device *spi)
+{
+	kfree(spi->controller_state);
+}
+
+static inline unsigned int hw_txbyte(struct ls1b_spi *hw, int count)
+{
+	return hw->tx ? hw->tx[count] : 0x00;
+}
+
+static int ls1b_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
+{
+	struct ls1b_spi *hw = to_hw(spi);
+		
+	hw->tx = t->tx_buf;
+	hw->rx = t->rx_buf;
+	hw->len = t->len;
+	hw->count = 0;
+
+#ifdef USE_POLL
+	for(hw->count=0; hw->count < hw->len; hw->count++) {
+		writeb(hw_txbyte(hw, hw->count), hw->regs + REG_SPDR);
+		while (readb(hw->regs + REG_SPSR) & 0x01) {
+			cpu_relax();
+		}
+		if (hw->rx)
+			hw->rx[hw->count] = readb(hw->regs + REG_SPDR);
+		else
+			readb(hw->regs + REG_SPDR);
+	}
+#else
+//	init_completion(&hw->done);
+	/* send the first byte */
+	writeb(hw_txbyte(hw, 0), hw->regs + REG_SPDR);
+	wait_for_completion(&hw->done);
+#endif
+
+	return hw->count;
+}
+
+#ifndef USE_POLL
+static irqreturn_t ls1b_spi_irq(int irq, void *dev)
+{
+	struct ls1b_spi *hw = dev;
+	unsigned int spsta = readb(hw->regs + REG_SPSR);
+	unsigned int count = hw->count;
+
+	writeb(spsta, hw->regs + REG_SPSR);
+	
+	hw->count++;
+
+	if (hw->rx){
+		hw->rx[count] = readb(hw->regs + REG_SPDR);
+	} else {/* ç”±äºŽå�‘é€�å’ŒæŽ¥æ”¶å�Œæ—¶è¿›è¡Œï¼Œå�³ä½¿SPIä»Žè®¾å¤‡æ²¡æœ‰å�‘é€�æœ‰æ•ˆæ•°æ�®ä¹Ÿå¿…é¡»è¿›è¡Œè¯»å‡ºæ“�ä½œã€‚*/
+		readb(hw->regs + REG_SPDR);
+	}
+
+	count++;
+
+	if (count < hw->len){
+		writeb(hw_txbyte(hw, count), hw->regs + REG_SPDR);
+	} else {
+		complete(&hw->done);
+	}
+	
+	return IRQ_HANDLED;
+}
+#endif
+
+static int ls1b_spi_probe(struct platform_device *pdev)
+{
+	struct ls1b_spi_info *pdata;
+	struct ls1b_spi *hw;
+	struct spi_master *master;
+	struct resource *res;
+	int err = 0;
+	unsigned char val;
+
+	master = spi_alloc_master(&pdev->dev, sizeof(struct ls1b_spi));
+	if (master == NULL) {
+		dev_err(&pdev->dev, "No memory for spi_master\n");
+		err = -ENOMEM;
+		goto err_nomem;
+	}
+
+	hw = spi_master_get_devdata(master);
+	memset(hw, 0, sizeof(struct ls1b_spi));
+
+	hw->master = spi_master_get(master);
+	hw->pdata = pdata = pdev->dev.platform_data;
+	hw->dev = &pdev->dev;
+
+	if (pdata == NULL) {
+		dev_err(&pdev->dev, "No platform data supplied\n");
+		err = -ENOENT;
+		goto err_no_pdata;
+	}
+
+	platform_set_drvdata(pdev, hw);
+	init_completion(&hw->done);
+	
+	/* setup the master state. */
+	
+	/* the spi->mode bits understood by this driver: */
+	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
+
+	master->num_chipselect = hw->pdata->num_cs;
+	master->bus_num = pdata->bus_num;
+	
+	/* setup the state for the bitbang driver */
+	
+	hw->bitbang.master         = hw->master;
+	hw->bitbang.setup_transfer = ls1b_spi_setupxfer;
+	hw->bitbang.chipselect     = ls1b_spi_chipsel;
+	hw->bitbang.txrx_bufs      = ls1b_spi_txrx;
+	
+	hw->master->setup  = ls1b_spi_setup;
+	hw->master->cleanup = ls1b_spi_cleanup;
+
+	dev_dbg(hw->dev, "bitbang at %p\n", &hw->bitbang);
+
+	/* find and map our resources */
+	
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (res == NULL) {
+		dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
+		err = -ENOENT;
+		goto err_no_iores;
+	}
+
+	hw->ioarea = request_mem_region(res->start, (res->end - res->start)+1,
+					pdev->name);
+
+	if (hw->ioarea == NULL) {
+		dev_err(&pdev->dev, "Cannot reserve region\n");
+		err = -ENXIO;
+		goto err_no_iores;
+	}
+
+	hw->regs = ioremap(res->start, (res->end - res->start)+1);
+	if (hw->regs == NULL) {
+		dev_err(&pdev->dev, "Cannot map IO\n");
+		err = -ENXIO;
+		goto err_no_iomap;
+	}
+
+	hw->irq = platform_get_irq(pdev, 0);
+	if (hw->irq < 0) {
+		dev_err(&pdev->dev, "No IRQ specified\n");
+		err = -ENOENT;
+		goto err_no_irq;
+	}
+
+	/* program defaults into the registers */
+	writeb(0xc0, hw->regs + REG_SPSR);
+	val = readb(hw->regs + REG_PARAM);
+	val &= 0xfe;
+	writeb(val, hw->regs + REG_PARAM);
+
+#ifndef USE_POLL
+ 	writeb(0xd0, hw->regs + REG_SPCR);
+	err = request_irq(hw->irq, ls1b_spi_irq, 0, pdev->name, hw);
+	if (err) {
+		dev_err(&pdev->dev, "Cannot claim IRQ\n");
+		goto err_no_irq;
+	}
+#else
+ 	writeb(0x50, hw->regs + REG_SPCR);
+#endif
+  	writeb(0x05, hw->regs + REG_SPER);
+
+
+	hw->clk = clk_get(&pdev->dev, "apb");
+	if (IS_ERR(hw->clk)) {
+		dev_err(&pdev->dev, "No clock for device\n");
+		err = PTR_ERR(hw->clk);
+		goto err_no_clk;
+	}
+
+	/* setup any gpio we can */
+
+	/* register our spi controller */
+	err = spi_bitbang_start(&hw->bitbang);
+	if (err) {
+		dev_err(&pdev->dev, "Failed to register SPI master\n");
+		goto err_register;
+	}
+
+	return 0;
+
+err_register:
+
+err_no_clk:
+#ifndef USE_POLL
+	free_irq(hw->irq, hw);
+#endif
+
+err_no_irq:
+	iounmap(hw->regs);
+
+err_no_iomap:
+	release_resource(hw->ioarea);
+	kfree(hw->ioarea);
+
+err_no_iores:
+err_no_pdata:
+	spi_master_put(hw->master);;
+
+err_nomem:
+	return err;
+}
+
+static int ls1b_spi_remove(struct platform_device *dev)
+{
+	struct ls1b_spi *hw = platform_get_drvdata(dev);
+
+	platform_set_drvdata(dev, NULL);
+
+	spi_bitbang_stop(&hw->bitbang);
+#ifndef USE_POLL
+	free_irq(hw->irq, hw);
+#endif
+	iounmap(hw->regs);
+	
+	/* gpio free */
+	
+	release_resource(hw->ioarea);
+	kfree(hw->ioarea);
+
+	spi_master_put(hw->master);
+	return 0;
+}
+
+#ifdef CONFIG_PM
+static int ls1b_spi_suspend(struct device *dev)
+{
+//	struct ls1b_spi *hw = platform_get_drvdata(pdev);
+	struct ls1b_spi *hw = platform_get_drvdata(to_platform_device(dev));
+
+	return 0;
+}
+
+static int ls1b_spi_resume(struct device *dev)
+{
+	struct ls1b_spi *hw = platform_get_drvdata(to_platform_device(dev));
+	unsigned char val;
+
+/* program defaults into the registers */
+	writeb(0xc0, hw->regs + REG_SPSR);
+	val = readb(hw->regs + REG_PARAM);
+	val &= 0xfe;
+	writeb(val, hw->regs + REG_PARAM);
+ 	writeb(0xd0, hw->regs + REG_SPCR);
+  	writeb(0x05, hw->regs + REG_SPER);
+
+//	clk_enable(hw->clk);
+	return 0;
+}
+
+static const struct dev_pm_ops ls1b_spi_pmops = {
+	.suspend	= ls1b_spi_suspend,
+	.resume		= ls1b_spi_resume,
+};
+
+#define LS1B_SPI_PMOPS &ls1b_spi_pmops
+#else
+#define LS1B_SPI_PMOPS NULL
+#endif /* CONFIG_PM */
+
+MODULE_ALIAS("platform:ls1b-spi");
+static struct platform_driver ls1b_spi_driver = {
+	.remove    = __exit_p(ls1b_spi_remove),
+	.driver    = {
+		.name  = "ls1b-spi",
+		.owner = THIS_MODULE,
+		.pm    = LS1B_SPI_PMOPS,
+	},
+};
+
+static int __init ls1b_spi_init(void)
+{
+	return platform_driver_probe(&ls1b_spi_driver, ls1b_spi_probe);
+}
+
+static void __exit ls1b_spi_exit(void)
+{
+	platform_driver_unregister(&ls1b_spi_driver);
+}
+
+module_init(ls1b_spi_init);
+module_exit(ls1b_spi_exit);
+
+MODULE_DESCRIPTION("loongson 1B SPI Driver");
+MODULE_AUTHOR("tanghaifeng <tanghaifeng-gz@loongson.cn");
+MODULE_LICENSE("GPL");
diff -uNra linux-3.0.82/drivers/spi/Makefile linux-3.0.82x/drivers/spi/Makefile
--- linux-3.0.82/drivers/spi/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/spi/Makefile	2017-09-23 03:42:50.186674551 +0800
@@ -9,6 +9,7 @@
 obj-$(CONFIG_SPI_MASTER)		+= spi.o
 
 # SPI master controller drivers (bus)
+obj-$(CONFIG_LS1B_SPI) 			+= ls1b_spi.o
 obj-$(CONFIG_SPI_ALTERA)		+= spi_altera.o
 obj-$(CONFIG_SPI_ATMEL)			+= atmel_spi.o
 obj-$(CONFIG_SPI_ATH79)			+= ath79_spi.o
@@ -25,6 +26,7 @@
 obj-$(CONFIG_SPI_DW_MMIO)		+= dw_spi_mmio.o
 obj-$(CONFIG_SPI_EP93XX)		+= ep93xx_spi.o
 obj-$(CONFIG_SPI_GPIO)			+= spi_gpio.o
+obj-$(CONFIG_SPI_GPIO)			+= spi_gpio_delay.o
 obj-$(CONFIG_SPI_IMX)			+= spi_imx.o
 obj-$(CONFIG_SPI_LM70_LLP)		+= spi_lm70llp.o
 obj-$(CONFIG_SPI_PXA2XX)		+= pxa2xx_spi.o
diff -uNra linux-3.0.82/drivers/spi/spi_gpio_delay.c linux-3.0.82x/drivers/spi/spi_gpio_delay.c
--- linux-3.0.82/drivers/spi/spi_gpio_delay.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/spi/spi_gpio_delay.c	2017-09-23 03:42:50.186674551 +0800
@@ -0,0 +1,431 @@
+/*
+ * spi_gpio.c - SPI master driver using generic bitbanged GPIO
+ *
+ * Copyright (C) 2006,2008 David Brownell
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <linux/delay.h>
+
+#include <linux/spi/spi.h>
+#include <linux/spi/spi_bitbang.h>
+#include <linux/spi/spi_gpio.h>
+
+
+/*
+ * This bitbanging SPI master driver should help make systems usable
+ * when a native hardware SPI engine is not available, perhaps because
+ * its driver isn't yet working or because the I/O pins it requires
+ * are used for other purposes.
+ *
+ * platform_device->driver_data ... points to spi_gpio
+ *
+ * spi->controller_state ... reserved for bitbang framework code
+ * spi->controller_data ... holds chipselect GPIO
+ *
+ * spi->master->dev.driver_data ... points to spi_gpio->bitbang
+ */
+
+struct spi_gpio {
+	struct spi_bitbang		bitbang;
+	struct spi_gpio_platform_data	pdata;
+	struct platform_device		*pdev;
+};
+
+/*----------------------------------------------------------------------*/
+
+/*
+ * Because the overhead of going through four GPIO procedure calls
+ * per transferred bit can make performance a problem, this code
+ * is set up so that you can use it in either of two ways:
+ *
+ *   - The slow generic way:  set up platform_data to hold the GPIO
+ *     numbers used for MISO/MOSI/SCK, and issue procedure calls for
+ *     each of them.  This driver can handle several such busses.
+ *
+ *   - The quicker inlined way:  only helps with platform GPIO code
+ *     that inlines operations for constant GPIOs.  This can give
+ *     you tight (fast!) inner loops, but each such bus needs a
+ *     new driver.  You'll define a new C file, with Makefile and
+ *     Kconfig support; the C code can be a total of six lines:
+ *
+ *		#define DRIVER_NAME	"myboard_spi2"
+ *		#define	SPI_MISO_GPIO	119
+ *		#define	SPI_MOSI_GPIO	120
+ *		#define	SPI_SCK_GPIO	121
+ *		#define	SPI_N_CHIPSEL	4
+ *		#include "spi_gpio.c"
+ */
+
+#ifndef DRIVER_NAME
+#define DRIVER_NAME	"spi_gpio_delay"
+
+#define GENERIC_BITBANG	/* vs tight inlines */
+
+/* all functions referencing these symbols must define pdata */
+#define SPI_MISO_GPIO	((pdata)->miso)
+#define SPI_MOSI_GPIO	((pdata)->mosi)
+#define SPI_SCK_GPIO	((pdata)->sck)
+
+#define SPI_N_CHIPSEL	((pdata)->num_chipselect)
+
+#endif
+
+/*----------------------------------------------------------------------*/
+
+static inline const struct spi_gpio_platform_data * __pure
+spi_to_pdata(const struct spi_device *spi)
+{
+	const struct spi_bitbang	*bang;
+	const struct spi_gpio		*spi_gpio;
+
+	bang = spi_master_get_devdata(spi->master);
+	spi_gpio = container_of(bang, struct spi_gpio, bitbang);
+	return &spi_gpio->pdata;
+}
+
+/* this is #defined to avoid unused-variable warnings when inlining */
+#define pdata		spi_to_pdata(spi)
+
+static inline void setsck(const struct spi_device *spi, int is_on)
+{
+	gpio_set_value(SPI_SCK_GPIO, is_on);
+}
+
+static inline void setmosi(const struct spi_device *spi, int is_on)
+{
+	gpio_set_value(SPI_MOSI_GPIO, is_on);
+}
+
+static inline int getmiso(const struct spi_device *spi)
+{
+	return !!gpio_get_value(SPI_MISO_GPIO);
+}
+
+#undef pdata
+
+/*
+ * NOTE:  this clocks "as fast as we can".  It "should" be a function of the
+ * requested device clock.  Software overhead means we usually have trouble
+ * reaching even one Mbit/sec (except when we can inline bitops), so for now
+ * we'll just assume we never need additional per-bit slowdowns.
+ */
+//#define spidelay(nsecs)	do {} while (0)
+#define spidelay(nsecs)	ndelay(nsecs)
+
+#include "spi_bitbang_txrx.h"
+
+/*
+ * These functions can leverage inline expansion of GPIO calls to shrink
+ * costs for a txrx bit, often by factors of around ten (by instruction
+ * count).  That is particularly visible for larger word sizes, but helps
+ * even with default 8-bit words.
+ *
+ * REVISIT overheads calling these functions for each word also have
+ * significant performance costs.  Having txrx_bufs() calls that inline
+ * the txrx_word() logic would help performance, e.g. on larger blocks
+ * used with flash storage or MMC/SD.  There should also be ways to make
+ * GCC be less stupid about reloading registers inside the I/O loops,
+ * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
+ */
+
+static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
+		unsigned nsecs, u32 word, u8 bits)
+{
+	return bitbang_txrx_be_cpha0(spi, nsecs, 0, 0, word, bits);
+}
+
+static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
+		unsigned nsecs, u32 word, u8 bits)
+{
+	return bitbang_txrx_be_cpha1(spi, nsecs, 0, 0, word, bits);
+}
+
+static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
+		unsigned nsecs, u32 word, u8 bits)
+{
+	return bitbang_txrx_be_cpha0(spi, nsecs, 1, 0, word, bits);
+}
+
+static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
+		unsigned nsecs, u32 word, u8 bits)
+{
+	return bitbang_txrx_be_cpha1(spi, nsecs, 1, 0, word, bits);
+}
+
+/*
+ * These functions do not call setmosi or getmiso if respective flag
+ * (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to
+ * call when such pin is not present or defined in the controller.
+ * A separate set of callbacks is defined to get highest possible
+ * speed in the generic case (when both MISO and MOSI lines are
+ * available), as optimiser will remove the checks when argument is
+ * constant.
+ */
+
+static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
+		unsigned nsecs, u32 word, u8 bits)
+{
+	unsigned flags = spi->master->flags;
+	return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
+}
+
+static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
+		unsigned nsecs, u32 word, u8 bits)
+{
+	unsigned flags = spi->master->flags;
+	return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
+}
+
+static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
+		unsigned nsecs, u32 word, u8 bits)
+{
+	unsigned flags = spi->master->flags;
+	return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
+}
+
+static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
+		unsigned nsecs, u32 word, u8 bits)
+{
+	unsigned flags = spi->master->flags;
+	return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
+}
+
+/*----------------------------------------------------------------------*/
+
+static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
+{
+	unsigned long cs = (unsigned long) spi->controller_data;
+
+	/* set initial clock polarity */
+	if (is_active)
+		setsck(spi, spi->mode & SPI_CPOL);
+
+	if (cs != SPI_GPIO_NO_CHIPSELECT) {
+		/* SPI is normally active-low */
+		gpio_set_value(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
+	}
+}
+
+static int spi_gpio_setup(struct spi_device *spi)
+{
+	unsigned long	cs = (unsigned long) spi->controller_data;
+	int		status = 0;
+
+	if (spi->bits_per_word > 32)
+		return -EINVAL;
+
+	if (!spi->controller_state) {
+		if (cs != SPI_GPIO_NO_CHIPSELECT) {
+			status = gpio_request(cs, dev_name(&spi->dev));
+			if (status)
+				return status;
+			status = gpio_direction_output(cs, spi->mode & SPI_CS_HIGH);
+		}
+	}
+	if (!status)
+		status = spi_bitbang_setup(spi);
+	if (status) {
+		if (!spi->controller_state && cs != SPI_GPIO_NO_CHIPSELECT)
+			gpio_free(cs);
+	}
+	return status;
+}
+
+static void spi_gpio_cleanup(struct spi_device *spi)
+{
+	unsigned long	cs = (unsigned long) spi->controller_data;
+
+	if (cs != SPI_GPIO_NO_CHIPSELECT)
+		gpio_free(cs);
+	spi_bitbang_cleanup(spi);
+}
+
+static int __init spi_gpio_alloc(unsigned pin, const char *label, bool is_in)
+{
+	int value;
+
+	value = gpio_request(pin, label);
+	if (value == 0) {
+		if (is_in)
+			value = gpio_direction_input(pin);
+		else
+			value = gpio_direction_output(pin, 0);
+	}
+	return value;
+}
+
+static int __init
+spi_gpio_request(struct spi_gpio_platform_data *pdata, const char *label,
+	u16 *res_flags)
+{
+	int value;
+
+	/* NOTE:  SPI_*_GPIO symbols may reference "pdata" */
+
+	if (SPI_MOSI_GPIO != SPI_GPIO_NO_MOSI) {
+		value = spi_gpio_alloc(SPI_MOSI_GPIO, label, false);
+		if (value)
+			goto done;
+	} else {
+		/* HW configuration without MOSI pin */
+		*res_flags |= SPI_MASTER_NO_TX;
+	}
+
+	if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO) {
+		value = spi_gpio_alloc(SPI_MISO_GPIO, label, true);
+		if (value)
+			goto free_mosi;
+	} else {
+		/* HW configuration without MISO pin */
+		*res_flags |= SPI_MASTER_NO_RX;
+	}
+
+	value = spi_gpio_alloc(SPI_SCK_GPIO, label, false);
+	if (value)
+		goto free_miso;
+
+	goto done;
+
+free_miso:
+	if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO)
+		gpio_free(SPI_MISO_GPIO);
+free_mosi:
+	if (SPI_MOSI_GPIO != SPI_GPIO_NO_MOSI)
+		gpio_free(SPI_MOSI_GPIO);
+done:
+	return value;
+}
+
+static int __init spi_gpio_probe(struct platform_device *pdev)
+{
+	int				status;
+	struct spi_master		*master;
+	struct spi_gpio			*spi_gpio;
+	struct spi_gpio_platform_data	*pdata;
+	u16 master_flags = 0;
+
+	pdata = pdev->dev.platform_data;
+#ifdef GENERIC_BITBANG
+	if (!pdata || !pdata->num_chipselect)
+		return -ENODEV;
+#endif
+
+	status = spi_gpio_request(pdata, dev_name(&pdev->dev), &master_flags);
+	if (status < 0)
+		return status;
+
+	master = spi_alloc_master(&pdev->dev, sizeof *spi_gpio);
+	if (!master) {
+		status = -ENOMEM;
+		goto gpio_free;
+	}
+	spi_gpio = spi_master_get_devdata(master);
+	platform_set_drvdata(pdev, spi_gpio);
+
+	spi_gpio->pdev = pdev;
+	if (pdata)
+		spi_gpio->pdata = *pdata;
+
+	master->flags = master_flags;
+	master->bus_num = pdev->id;
+	master->num_chipselect = SPI_N_CHIPSEL;
+	master->setup = spi_gpio_setup;
+	master->cleanup = spi_gpio_cleanup;
+
+	spi_gpio->bitbang.master = spi_master_get(master);
+	spi_gpio->bitbang.chipselect = spi_gpio_chipselect;
+
+	if ((master_flags & (SPI_MASTER_NO_TX | SPI_MASTER_NO_RX)) == 0) {
+		spi_gpio->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
+		spi_gpio->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
+		spi_gpio->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
+		spi_gpio->bitbang.txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
+	} else {
+		spi_gpio->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
+		spi_gpio->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
+		spi_gpio->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
+		spi_gpio->bitbang.txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
+	}
+	spi_gpio->bitbang.setup_transfer = spi_bitbang_setup_transfer;
+	spi_gpio->bitbang.flags = SPI_CS_HIGH;
+
+	status = spi_bitbang_start(&spi_gpio->bitbang);
+	if (status < 0) {
+		spi_master_put(spi_gpio->bitbang.master);
+gpio_free:
+		if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO)
+			gpio_free(SPI_MISO_GPIO);
+		if (SPI_MOSI_GPIO != SPI_GPIO_NO_MOSI)
+			gpio_free(SPI_MOSI_GPIO);
+		gpio_free(SPI_SCK_GPIO);
+		spi_master_put(master);
+	}
+
+	return status;
+}
+
+static int __exit spi_gpio_remove(struct platform_device *pdev)
+{
+	struct spi_gpio			*spi_gpio;
+	struct spi_gpio_platform_data	*pdata;
+	int				status;
+
+	spi_gpio = platform_get_drvdata(pdev);
+	pdata = pdev->dev.platform_data;
+
+	/* stop() unregisters child devices too */
+	status = spi_bitbang_stop(&spi_gpio->bitbang);
+	spi_master_put(spi_gpio->bitbang.master);
+
+	platform_set_drvdata(pdev, NULL);
+
+	if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO)
+		gpio_free(SPI_MISO_GPIO);
+	if (SPI_MOSI_GPIO != SPI_GPIO_NO_MOSI)
+		gpio_free(SPI_MOSI_GPIO);
+	gpio_free(SPI_SCK_GPIO);
+
+	return status;
+}
+
+MODULE_ALIAS("platform:" DRIVER_NAME);
+
+static struct platform_driver spi_gpio_driver = {
+	.driver.name	= DRIVER_NAME,
+	.driver.owner	= THIS_MODULE,
+	.remove		= __exit_p(spi_gpio_remove),
+};
+
+static int __init spi_gpio_init(void)
+{
+	return platform_driver_probe(&spi_gpio_driver, spi_gpio_probe);
+}
+module_init(spi_gpio_init);
+
+static void __exit spi_gpio_exit(void)
+{
+	platform_driver_unregister(&spi_gpio_driver);
+}
+module_exit(spi_gpio_exit);
+
+
+MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO ");
+MODULE_AUTHOR("David Brownell");
+MODULE_LICENSE("GPL");
diff -uNra linux-3.0.82/drivers/staging/iio/meter/att7022.c linux-3.0.82x/drivers/staging/iio/meter/att7022.c
--- linux-3.0.82/drivers/staging/iio/meter/att7022.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/staging/iio/meter/att7022.c	2017-09-23 03:42:50.186674551 +0800
@@ -0,0 +1,509 @@
+/*
+ * ATT7022/58/68/78 Polyphase Multifunction Energy Metering IC Driver
+ *
+ * Copyright 2010 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/gpio.h>
+#include <linux/delay.h>
+#include <linux/mutex.h>
+#include <linux/device.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/sysfs.h>
+#include <linux/list.h>
+
+#include "../iio.h"
+#include "../sysfs.h"
+#include "meter.h"
+#include "att7022.h"
+
+static ssize_t att7022_read_24bit(struct device *dev,
+		struct device_attribute *attr,
+		char *buf)
+{
+	int ret;
+	u32 val;
+	struct iio_dev *indio_dev = dev_get_drvdata(dev);
+	struct att7022_state *st = iio_dev_get_devdata(indio_dev);
+	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
+
+	ret = st->read_reg_24(dev, this_attr->address, &val);
+	if (ret)
+		return ret;
+
+	return sprintf(buf, "%u\n", val);
+}
+
+static ssize_t att7022_write_24bit(struct device *dev,
+		struct device_attribute *attr,
+		const char *buf,
+		size_t len)
+{
+	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
+	struct iio_dev *indio_dev = dev_get_drvdata(dev);
+	struct att7022_state *st = iio_dev_get_devdata(indio_dev);
+
+	int ret;
+	long val;
+
+	ret = strict_strtol(buf, 10, &val);
+	if (ret)
+		goto error_ret;
+	ret = st->write_reg_24(dev, this_attr->address, val);
+
+error_ret:
+	return ret ? ret : len;
+}
+
+static int att7022_reset(struct device *dev)
+{
+	struct iio_dev *indio_dev = dev_get_drvdata(dev);
+	struct att7022_state *st = iio_dev_get_devdata(indio_dev);
+	u32 val = 0x00000000;
+
+	return st->write_reg_24(dev, ATT7022_RESET, val);
+}
+
+
+static ssize_t att7022_write_reset(struct device *dev,
+		struct device_attribute *attr,
+		const char *buf, size_t len)
+{
+	if (len < 1)
+		return -1;
+	switch (buf[0]) {
+	case '1':
+	case 'y':
+	case 'Y':
+		return att7022_reset(dev);
+	}
+	return -1;
+}
+
+static IIO_DEVICE_ATTR(dev_id, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_DEV_ID);
+
+static IIO_DEVICE_ATTR(pa, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_PA);
+static IIO_DEVICE_ATTR(pb, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_PB);
+static IIO_DEVICE_ATTR(pc, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_PC);
+static IIO_DEVICE_ATTR(pt, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_PT);
+
+static IIO_DEVICE_ATTR(qa, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_QA);
+static IIO_DEVICE_ATTR(qb, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_QB);
+static IIO_DEVICE_ATTR(qc, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_QC);
+static IIO_DEVICE_ATTR(qt, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_QT);
+
+static IIO_DEVICE_ATTR(sa, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_SA);
+static IIO_DEVICE_ATTR(sb, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_SB);
+static IIO_DEVICE_ATTR(sc, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_SC);
+static IIO_DEVICE_ATTR(st, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_ST);
+
+static IIO_DEVICE_ATTR(uarms, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_UARMS);
+static IIO_DEVICE_ATTR(ubrms, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_UBRMS);
+static IIO_DEVICE_ATTR(ucrms, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_UCRMS);
+
+static IIO_DEVICE_ATTR(iarms, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_IARMS);
+static IIO_DEVICE_ATTR(ibrms, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_IBRMS);
+static IIO_DEVICE_ATTR(icrms, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_ICRMS);
+static IIO_DEVICE_ATTR(itrms, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_ITRMS);
+
+static IIO_DEVICE_ATTR(pfa, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_PFA);
+static IIO_DEVICE_ATTR(pfb, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_PFB);
+static IIO_DEVICE_ATTR(pfc, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_PFC);
+static IIO_DEVICE_ATTR(pft, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_PFT);
+
+static IIO_DEVICE_ATTR(pga, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_PGA);
+static IIO_DEVICE_ATTR(pgb, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_PGB);
+static IIO_DEVICE_ATTR(pgc, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_PGC);
+
+static IIO_DEVICE_ATTR(intflag, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_INTFLAG);
+static IIO_DEVICE_ATTR(freq, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_FREQ);
+static IIO_DEVICE_ATTR(eflag, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_EFLAG);
+
+static IIO_DEVICE_ATTR(epa, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_EPA);
+static IIO_DEVICE_ATTR(epb, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_EPB);
+static IIO_DEVICE_ATTR(epc, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_EPC);
+static IIO_DEVICE_ATTR(ept, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_EPT);
+
+static IIO_DEVICE_ATTR(eqa, S_IWUSR | S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_EQA);
+static IIO_DEVICE_ATTR(eqb, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_EQB);
+static IIO_DEVICE_ATTR(eqc, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_EQC);
+static IIO_DEVICE_ATTR(eqt, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_EQT);
+
+static IIO_DEVICE_ATTR(yuaub, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_YUAUB);
+static IIO_DEVICE_ATTR(yuauc, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_YUAUC);
+static IIO_DEVICE_ATTR(yubuc, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_YUBUC);
+
+static IIO_DEVICE_ATTR(i0rms, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_I0RMS);
+static IIO_DEVICE_ATTR(tpsd0, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_TPSD0);
+static IIO_DEVICE_ATTR(utrms, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_UTRMS);
+static IIO_DEVICE_ATTR(sflag, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_SFLAG);
+static IIO_DEVICE_ATTR(bckreg, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_BCKREG);
+static IIO_DEVICE_ATTR(cmdchksum, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_CMDCHKSUM);
+
+static IIO_DEVICE_ATTR(sample_ia, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_SAMPLE_IA);
+static IIO_DEVICE_ATTR(sample_ib, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_SAMPLE_IB);
+static IIO_DEVICE_ATTR(sample_ic, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_SAMPLE_IC);
+static IIO_DEVICE_ATTR(sample_ua, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_SAMPLE_UA);
+static IIO_DEVICE_ATTR(sample_ub, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_SAMPLE_UB);
+static IIO_DEVICE_ATTR(sample_uc, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_SAMPLE_UC);
+
+static IIO_DEVICE_ATTR(esa, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_ESA);
+static IIO_DEVICE_ATTR(esb, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_ESB);
+static IIO_DEVICE_ATTR(esc, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_ESC);
+static IIO_DEVICE_ATTR(est, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_EST);
+
+static IIO_DEVICE_ATTR(fstcnta, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_FSTCNTA);
+static IIO_DEVICE_ATTR(fstcntb, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_FSTCNTB);
+static IIO_DEVICE_ATTR(fstcntc, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_FSTCNTC);
+static IIO_DEVICE_ATTR(fstcntt, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_FSTCNTT);
+
+static IIO_DEVICE_ATTR(pflag, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_PFLAG);
+static IIO_DEVICE_ATTR(chksum, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_CHKSUM);
+static IIO_DEVICE_ATTR(sample_io, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_SAMPLE_I0);
+
+static IIO_DEVICE_ATTR(linepa, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_LINEPA);
+static IIO_DEVICE_ATTR(linepb, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_LINEPB);
+static IIO_DEVICE_ATTR(linepc, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_LINEPC);
+static IIO_DEVICE_ATTR(linept, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_LINEPT);
+static IIO_DEVICE_ATTR(lineepa, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_LINEEPA);
+static IIO_DEVICE_ATTR(lineepb, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_LINEEPB);
+static IIO_DEVICE_ATTR(lineepc, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_LINEEPC);
+static IIO_DEVICE_ATTR(lineept, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_LINEEPT);
+
+static IIO_DEVICE_ATTR(lineuarrms, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_LINEUARRMS);
+static IIO_DEVICE_ATTR(lineubrrms, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_LINEUBRRMS);
+static IIO_DEVICE_ATTR(lineucrrms, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_LINEUCRRMS);
+static IIO_DEVICE_ATTR(lineiarrms, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_LINEIARRMS);
+static IIO_DEVICE_ATTR(lineibrrms, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_LINEIBRRMS);
+static IIO_DEVICE_ATTR(lineicrrms, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_LINEICRRMS);
+
+static IIO_DEVICE_ATTR(leflag, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_LEFLAG);
+static IIO_DEVICE_ATTR(ptrwavebuff, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_PTRWAVEBUFF);
+static IIO_DEVICE_ATTR(wavebuff, S_IRUGO, att7022_read_24bit,
+		NULL, ATT7022_WAVEBUFF);
+
+static int att7022_set_irq(struct device *dev, bool enable)
+{
+	struct iio_dev *indio_dev = dev_get_drvdata(dev);
+	struct att7022_state *st = iio_dev_get_devdata(indio_dev);
+
+	int ret;
+	u32 irqen;
+#if 0
+	ret = st->read_reg_32(dev, ATT7022_MASK0, &irqen);
+	if (ret)
+		goto error_ret;
+
+	if (enable)
+		irqen |= 1 << 17; /* 1: interrupt enabled when all periodical
+				     (at 8 kHz rate) DSP computations finish. */
+	else
+		irqen &= ~(1 << 17);
+
+	ret = st->write_reg_32(dev, ATT7022_MASK0, irqen);
+	if (ret)
+		goto error_ret;
+#endif
+error_ret:
+	return ret;
+}
+
+static int att7022_initial_setup(struct att7022_state *st)
+{
+	int ret = 0;
+	struct device *dev = &st->indio_dev->dev;
+	u32 val;
+
+	/* Disable IRQ */
+//	ret = att7022_set_irq(dev, false);
+//	if (ret) {
+//		dev_err(dev, "disable irq failed");
+//		goto err_ret;
+//	}
+
+	att7022_reset(dev);
+	msleep(ATT7022_STARTUP_DELAY);
+
+	st->write_reg_24(dev, 0xc6, 0x00005A);
+	st->read_reg_24(dev, 0x00, &val);
+
+	st->write_reg_24(dev, 0xc9, 0x000000);
+	st->write_reg_24(dev, 0xc6, 0x00005A);
+	st->read_reg_24(dev, 0x00, &val);
+
+	st->write_reg_24(dev, 0xc6, 0x000000);
+
+err_ret:
+	return ret;
+}
+
+static IIO_DEV_ATTR_RESET(att7022_write_reset);
+
+static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("8000");
+
+static IIO_CONST_ATTR(name, "att7022");
+
+static struct attribute *att7022_attributes[] = {
+	&iio_dev_attr_dev_id.dev_attr.attr,
+	&iio_dev_attr_pa.dev_attr.attr,
+	&iio_dev_attr_pb.dev_attr.attr,
+	&iio_dev_attr_pc.dev_attr.attr,
+	&iio_dev_attr_pt.dev_attr.attr,
+	&iio_dev_attr_qa.dev_attr.attr,
+	&iio_dev_attr_qb.dev_attr.attr,
+	&iio_dev_attr_qc.dev_attr.attr,
+	&iio_dev_attr_qt.dev_attr.attr,
+	&iio_dev_attr_sa.dev_attr.attr,
+	&iio_dev_attr_sb.dev_attr.attr,
+	&iio_dev_attr_sc.dev_attr.attr,
+	&iio_dev_attr_st.dev_attr.attr,
+
+	&iio_dev_attr_uarms.dev_attr.attr,
+	&iio_dev_attr_ubrms.dev_attr.attr,
+	&iio_dev_attr_ucrms.dev_attr.attr,
+	&iio_dev_attr_iarms.dev_attr.attr,
+	&iio_dev_attr_ibrms.dev_attr.attr,
+	&iio_dev_attr_icrms.dev_attr.attr,
+	&iio_dev_attr_itrms.dev_attr.attr,
+	
+	&iio_dev_attr_pfa.dev_attr.attr,
+	&iio_dev_attr_pfb.dev_attr.attr,
+	&iio_dev_attr_pfc.dev_attr.attr,
+	&iio_dev_attr_pft.dev_attr.attr,
+	&iio_dev_attr_pga.dev_attr.attr,
+	&iio_dev_attr_pgb.dev_attr.attr,
+	&iio_dev_attr_pgc.dev_attr.attr,
+
+	&iio_dev_attr_intflag.dev_attr.attr,
+	&iio_dev_attr_freq.dev_attr.attr,
+	&iio_dev_attr_eflag.dev_attr.attr,
+
+	&iio_dev_attr_epa.dev_attr.attr,
+	&iio_dev_attr_epb.dev_attr.attr,
+	&iio_dev_attr_epc.dev_attr.attr,
+	&iio_dev_attr_ept.dev_attr.attr,
+	&iio_dev_attr_eqa.dev_attr.attr,
+	&iio_dev_attr_eqb.dev_attr.attr,
+	&iio_dev_attr_eqc.dev_attr.attr,
+	&iio_dev_attr_eqt.dev_attr.attr,
+
+	&iio_dev_attr_yuaub.dev_attr.attr,
+	&iio_dev_attr_yuauc.dev_attr.attr,
+	&iio_dev_attr_yubuc.dev_attr.attr,
+
+	&iio_dev_attr_i0rms.dev_attr.attr,
+	&iio_dev_attr_tpsd0.dev_attr.attr,
+	&iio_dev_attr_utrms.dev_attr.attr,
+	&iio_dev_attr_sflag.dev_attr.attr,
+	&iio_dev_attr_bckreg.dev_attr.attr,
+	&iio_dev_attr_cmdchksum.dev_attr.attr,
+
+	&iio_dev_attr_sample_ia.dev_attr.attr,
+	&iio_dev_attr_sample_ib.dev_attr.attr,
+	&iio_dev_attr_sample_ic.dev_attr.attr,
+	&iio_dev_attr_sample_ua.dev_attr.attr,
+	&iio_dev_attr_sample_ub.dev_attr.attr,
+	&iio_dev_attr_sample_uc.dev_attr.attr,
+
+	&iio_dev_attr_esa.dev_attr.attr,
+	&iio_dev_attr_esb.dev_attr.attr,
+	&iio_dev_attr_esc.dev_attr.attr,
+	&iio_dev_attr_est.dev_attr.attr,
+	&iio_dev_attr_fstcnta.dev_attr.attr,
+	&iio_dev_attr_fstcntb.dev_attr.attr,
+	&iio_dev_attr_fstcntc.dev_attr.attr,
+	&iio_dev_attr_fstcntt.dev_attr.attr,
+
+	&iio_dev_attr_pflag.dev_attr.attr,
+	&iio_dev_attr_chksum.dev_attr.attr,
+	&iio_dev_attr_sample_io.dev_attr.attr,
+
+	&iio_dev_attr_linepa.dev_attr.attr,
+	&iio_dev_attr_linepb.dev_attr.attr,
+	&iio_dev_attr_linepc.dev_attr.attr,
+	&iio_dev_attr_linept.dev_attr.attr,
+	&iio_dev_attr_lineepa.dev_attr.attr,
+	&iio_dev_attr_lineepb.dev_attr.attr,
+	&iio_dev_attr_lineepc.dev_attr.attr,
+	&iio_dev_attr_lineept.dev_attr.attr,
+
+	&iio_dev_attr_lineuarrms.dev_attr.attr,
+	&iio_dev_attr_lineubrrms.dev_attr.attr,
+	&iio_dev_attr_lineucrrms.dev_attr.attr,
+	&iio_dev_attr_lineiarrms.dev_attr.attr,
+	&iio_dev_attr_lineibrrms.dev_attr.attr,
+	&iio_dev_attr_lineicrrms.dev_attr.attr,
+
+	&iio_dev_attr_leflag.dev_attr.attr,
+	&iio_dev_attr_ptrwavebuff.dev_attr.attr,
+	&iio_dev_attr_wavebuff.dev_attr.attr,
+	&iio_dev_attr_reset.dev_attr.attr,
+	&iio_const_attr_name.dev_attr.attr,
+	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
+	NULL,
+};
+
+static const struct attribute_group att7022_attribute_group = {
+	.attrs = att7022_attributes,
+};
+
+static const struct iio_info att7022_info = {
+	.attrs = &att7022_attribute_group,
+	.driver_module = THIS_MODULE,
+};
+
+int att7022_probe(struct att7022_state *st, struct device *dev)
+{
+	int ret;
+
+	/* Allocate the comms buffers */
+	st->rx = kzalloc(sizeof(*st->rx)*ATT7022_MAX_RX, GFP_KERNEL);
+	if (st->rx == NULL) {
+		ret = -ENOMEM;
+		goto error_free_st;
+	}
+	st->tx = kzalloc(sizeof(*st->tx)*ATT7022_MAX_TX, GFP_KERNEL);
+	if (st->tx == NULL) {
+		ret = -ENOMEM;
+		goto error_free_rx;
+	}
+	mutex_init(&st->buf_lock);
+	/* setup the industrialio driver allocated elements */
+	st->indio_dev = iio_allocate_device(0);
+	if (st->indio_dev == NULL) {
+		ret = -ENOMEM;
+		goto error_free_tx;
+	}
+
+	st->indio_dev->dev.parent = dev;
+	st->indio_dev->info = &att7022_info;
+	st->indio_dev->dev_data = (void *)(st);
+	st->indio_dev->modes = INDIO_DIRECT_MODE;
+
+	ret = iio_device_register(st->indio_dev);
+	if (ret)
+		goto error_free_dev;
+
+	/* Get the device into a sane initial state */
+	ret = att7022_initial_setup(st);
+	if (ret)
+		goto error_unreg_dev;
+
+	return 0;
+
+error_unreg_dev:
+	iio_device_unregister(st->indio_dev);
+error_free_dev:
+	iio_free_device(st->indio_dev);
+error_free_tx:
+	kfree(st->tx);
+error_free_rx:
+	kfree(st->rx);
+error_free_st:
+	kfree(st);
+
+	return ret;
+}
+EXPORT_SYMBOL(att7022_probe);
+
+int att7022_remove(struct att7022_state *st)
+{
+	struct iio_dev *indio_dev = st->indio_dev;
+
+	iio_device_unregister(indio_dev);
+	kfree(st->tx);
+	kfree(st->rx);
+	kfree(st);
+
+	return 0;
+}
+EXPORT_SYMBOL(att7022_remove);
+
+MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
+MODULE_DESCRIPTION("Analog Devices ATT7022/58/68/78 Polyphase Energy Meter");
+MODULE_LICENSE("GPL v2");
diff -uNra linux-3.0.82/drivers/staging/iio/meter/att7022.h linux-3.0.82x/drivers/staging/iio/meter/att7022.h
--- linux-3.0.82/drivers/staging/iio/meter/att7022.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/staging/iio/meter/att7022.h	2017-09-23 03:42:50.186674551 +0800
@@ -0,0 +1,152 @@
+#ifndef _ATT7022_H
+#define _ATT7022_H
+
+#define ATT7022_DEV_ID	0x00
+
+#define ATT7022_PA	0x01
+#define ATT7022_PB	0x02
+#define ATT7022_PC	0x03
+#define ATT7022_PT	0x04
+
+#define ATT7022_QA	0x05
+#define ATT7022_QB	0x06
+#define ATT7022_QC	0x07
+#define ATT7022_QT	0x08
+
+#define ATT7022_SA	0x09
+#define ATT7022_SB	0x0A
+#define ATT7022_SC	0x0B
+#define ATT7022_ST	0x0C
+
+#define ATT7022_UARMS	0x0D
+#define ATT7022_UBRMS	0x0E
+#define ATT7022_UCRMS	0x0F
+#define ATT7022_IARMS	0x10
+#define ATT7022_IBRMS	0x11
+#define ATT7022_ICRMS	0x12
+#define ATT7022_ITRMS	0x13
+
+#define ATT7022_PFA	0x14
+#define ATT7022_PFB	0x15
+#define ATT7022_PFC	0x16
+#define ATT7022_PFT	0x17
+
+#define ATT7022_PGA	0x18
+#define ATT7022_PGB	0x19
+#define ATT7022_PGC	0x1A
+
+#define ATT7022_INTFLAG	0x1B
+#define ATT7022_FREQ	0x1C
+#define ATT7022_EFLAG	0x1D
+
+#define ATT7022_EPA	0x1E
+#define ATT7022_EPB	0x1F
+#define ATT7022_EPC	0x20
+#define ATT7022_EPT	0x21
+
+#define ATT7022_EQA	0x22
+#define ATT7022_EQB	0x23
+#define ATT7022_EQC	0x24
+#define ATT7022_EQT	0x25
+
+#define ATT7022_YUAUB	0x26
+#define ATT7022_YUAUC	0x27
+#define ATT7022_YUBUC	0x28
+
+#define ATT7022_I0RMS	0x29
+#define ATT7022_TPSD0	0x2A
+#define ATT7022_UTRMS	0x2B
+
+#define ATT7022_SFLAG	0x2C
+#define ATT7022_BCKREG	0x2D
+#define ATT7022_CMDCHKSUM	0x2E
+
+#define ATT7022_SAMPLE_IA	0x2F
+#define ATT7022_SAMPLE_IB	0x30
+#define ATT7022_SAMPLE_IC	0x31
+#define ATT7022_SAMPLE_UA	0x32
+#define ATT7022_SAMPLE_UB	0x33
+#define ATT7022_SAMPLE_UC	0x34
+
+#define ATT7022_ESA	0x35
+#define ATT7022_ESB	0x36
+#define ATT7022_ESC	0x37
+#define ATT7022_EST	0x38
+
+#define ATT7022_FSTCNTA	0x39
+#define ATT7022_FSTCNTB	0x3A
+#define ATT7022_FSTCNTC	0x3B
+#define ATT7022_FSTCNTT	0x3C
+
+#define ATT7022_PFLAG	0x3D
+#define ATT7022_CHKSUM	0x3E
+#define ATT7022_SAMPLE_I0	0x3F
+
+#define ATT7022_LINEPA	0x40
+#define ATT7022_LINEPB	0x41
+#define ATT7022_LINEPC	0x42
+#define ATT7022_LINEPT	0x43
+
+#define ATT7022_LINEEPA	0x44
+#define ATT7022_LINEEPB	0x45
+#define ATT7022_LINEEPC	0x46
+#define ATT7022_LINEEPT	0x47
+
+#define ATT7022_LINEUARRMS	0x48
+#define ATT7022_LINEUBRRMS	0x49
+#define ATT7022_LINEUCRRMS	0x4A
+#define ATT7022_LINEIARRMS	0x4B
+#define ATT7022_LINEIBRRMS	0x4C
+#define ATT7022_LINEICRRMS	0x4D
+#define ATT7022_LEFLAG	0x4E
+#define ATT7022_PTRWAVEBUFF	0x7E
+#define ATT7022_WAVEBUFF	0x7F
+
+#define ATT7022_READ_REG   0x00
+#define ATT7022_WRITE_REG  0x80
+
+/* ç‰¹æ®Šå¯„å‘½ä»¤ */
+#define SAMPLE_BUFF		0xC0
+#define BUFF_READ_P		0xC1
+#define CLEAR_TABLE		0xC3
+#define SYNC_FACTOR		0xC4
+#define SYNC_START		0xC5
+#define CHECK_DATA_WRITE		0xC6
+#define CHECK_DATA_READ		0xC9
+#define ATT7022_RESET	0xD3
+
+#define ATT7022_MAX_TX    7
+#define ATT7022_MAX_RX    7
+#define ATT7022_STARTUP_DELAY 30
+
+#define DRIVER_NAME		"att7022"
+
+/**
+ * struct att7022_state - device instance specific data
+ * @spi:			actual spi_device
+ * @indio_dev:		industrial I/O device structure
+ * @tx:			transmit buffer
+ * @rx:			receive buffer
+ * @buf_lock:		mutex to protect tx and rx
+ **/
+struct att7022_state {
+	struct spi_device		*spi;
+	struct iio_dev			*indio_dev;
+	u8				*tx;
+	u8				*rx;
+	int				(*read_reg_8) (struct device *, u16, u8 *);
+	int				(*read_reg_16) (struct device *, u16, u16 *);
+	int				(*read_reg_24) (struct device *, u16, u32 *);
+	int				(*read_reg_32) (struct device *, u16, u32 *);
+	int				(*write_reg_8) (struct device *, u16, u8);
+	int				(*write_reg_16) (struct device *, u16, u16);
+	int				(*write_reg_24) (struct device *, u16, u32);
+	int				(*write_reg_32) (struct device *, u16, u32);
+	int                             irq;
+	struct mutex			buf_lock;
+};
+
+extern int att7022_probe(struct att7022_state *st, struct device *dev);
+extern int att7022_remove(struct att7022_state *st);
+
+#endif
diff -uNra linux-3.0.82/drivers/staging/iio/meter/att7022-spi.c linux-3.0.82x/drivers/staging/iio/meter/att7022-spi.c
--- linux-3.0.82/drivers/staging/iio/meter/att7022-spi.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/staging/iio/meter/att7022-spi.c	2017-09-23 03:42:50.186674551 +0800
@@ -0,0 +1,145 @@
+/*
+ * ATT7022 Polyphase Multifunction Energy Metering IC Driver (SPI Bus)
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <linux/device.h>
+#include <linux/kernel.h>
+#include <linux/spi/spi.h>
+#include <linux/slab.h>
+
+#include "../iio.h"
+#include "att7022.h"
+
+static int att7022_spi_write_reg_24(struct device *dev,
+		u16 reg_address,
+		u32 value)
+{
+	int ret;
+	struct spi_message msg;
+	struct iio_dev *indio_dev = dev_get_drvdata(dev);
+	struct att7022_state *st = iio_dev_get_devdata(indio_dev);
+	struct spi_transfer xfer = {
+		.tx_buf = st->tx,
+		.bits_per_word = 8,
+		.len = 4,
+//		.delay_usecs = 0,
+	};
+
+	mutex_lock(&st->buf_lock);
+	st->tx[0] = ATT7022_WRITE_REG | reg_address;
+	st->tx[1] = (value >> 16) & 0xFF;
+	st->tx[2] = (value >> 8) & 0xFF;
+	st->tx[3] = value & 0xFF;
+
+	spi_message_init(&msg);
+	spi_message_add_tail(&xfer, &msg);
+	ret = spi_sync(st->spi, &msg);
+	mutex_unlock(&st->buf_lock);
+
+	return ret;
+}
+
+static int att7022_spi_read_reg_24(struct device *dev,
+		u16 reg_address,
+		u32 *val)
+{
+	struct spi_message msg;
+	struct iio_dev *indio_dev = dev_get_drvdata(dev);
+	struct att7022_state *st = iio_dev_get_devdata(indio_dev);
+	int ret;
+	struct spi_transfer xfers[] = {
+		{
+			.tx_buf = st->tx,
+			.bits_per_word = 8,
+			.len = 1,
+//			.delay_usecs = 0,
+		}, {
+			.rx_buf = st->rx,
+			.bits_per_word = 8,
+			.len = 3,
+//			.delay_usecs = 0,
+		}
+	};
+
+	mutex_lock(&st->buf_lock);
+
+	st->tx[0] = reg_address;
+
+	spi_message_init(&msg);
+	spi_message_add_tail(&xfers[0], &msg);
+	spi_message_add_tail(&xfers[1], &msg);
+	ret = spi_sync(st->spi, &msg);
+	if (ret) {
+		dev_err(&st->spi->dev, "problem when reading 24 bit register 0x%02X",
+				reg_address);
+		goto error_ret;
+	}
+	*val = (st->rx[0] << 16) | (st->rx[1] << 8) | st->rx[2];
+
+error_ret:
+	mutex_unlock(&st->buf_lock);
+	return ret;
+}
+
+static int __devinit att7022_spi_probe(struct spi_device *spi)
+{
+	int ret;
+	struct att7022_state *st = kzalloc(sizeof *st, GFP_KERNEL);
+	if (!st) {
+		ret =  -ENOMEM;
+		return ret;
+	}
+
+	spi_set_drvdata(spi, st);
+	st->read_reg_24 = att7022_spi_read_reg_24;
+	st->write_reg_24 = att7022_spi_write_reg_24;
+	st->irq = spi->irq;
+	st->spi = spi;
+
+	ret = att7022_probe(st, &spi->dev);
+	if (ret) {
+		kfree(st);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int att7022_spi_remove(struct spi_device *spi)
+{
+	att7022_remove(spi_get_drvdata(spi));
+
+	return 0;
+}
+static const struct spi_device_id att7022_id[] = {
+	{ "att7022", 0 },
+	{ }
+};
+
+static struct spi_driver att7022_driver = {
+	.driver = {
+		.name = "att7022",
+		.owner = THIS_MODULE,
+	},
+	.probe = att7022_spi_probe,
+	.remove = __devexit_p(att7022_spi_remove),
+	.id_table = att7022_id,
+};
+
+static __init int att7022_init(void)
+{
+	return spi_register_driver(&att7022_driver);
+}
+module_init(att7022_init);
+
+static __exit void att7022_exit(void)
+{
+	spi_unregister_driver(&att7022_driver);
+}
+module_exit(att7022_exit);
+
+MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
+MODULE_DESCRIPTION("Analog Devices ATT7022/58/68/78 SPI Driver");
+MODULE_LICENSE("GPL v2");
diff -uNra linux-3.0.82/drivers/staging/iio/meter/Kconfig linux-3.0.82x/drivers/staging/iio/meter/Kconfig
--- linux-3.0.82/drivers/staging/iio/meter/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/staging/iio/meter/Kconfig	2017-09-23 03:42:50.190674538 +0800
@@ -59,3 +59,21 @@
 
 	  To compile this driver as a module, choose M here: the
 	  module will be called ade7854-spi.
+
+config ATT7022
+	tristate "ATT7022 Polyphase Multifunction Energy Metering IC Driver"
+	depends on SPI
+	help
+	  Say yes here to build support for ATT7022 Polyphase
+	  Multifunction Energy Metering IC Driver.
+
+config ATT7022_SPI
+	tristate "support SPI bus connection"
+	depends on ATT7022 && SPI
+	default y
+	help
+	  Say Y here if you have ATT7022 hooked to a SPI bus.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called att7022-spi.
+
diff -uNra linux-3.0.82/drivers/staging/iio/meter/Makefile linux-3.0.82x/drivers/staging/iio/meter/Makefile
--- linux-3.0.82/drivers/staging/iio/meter/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/staging/iio/meter/Makefile	2017-09-23 03:42:50.190674538 +0800
@@ -13,3 +13,6 @@
 obj-$(CONFIG_ADE7854) += ade7854.o
 obj-$(CONFIG_ADE7854_I2C) += ade7854-i2c.o
 obj-$(CONFIG_ADE7854_SPI) += ade7854-spi.o
+
+obj-$(CONFIG_ATT7022) += att7022.o
+obj-$(CONFIG_ATT7022_SPI) += att7022-spi.o
diff -uNra linux-3.0.82/drivers/tty/serial/8250.c linux-3.0.82x/drivers/tty/serial/8250.c
--- linux-3.0.82/drivers/tty/serial/8250.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/tty/serial/8250.c	2017-09-23 03:42:50.190674538 +0800
@@ -599,8 +599,19 @@
 /* Uart divisor latch write */
 static inline void _serial_dl_write(struct uart_8250_port *up, int value)
 {
+	/* thf ç”±äºŽDLMå¯„å­˜å™¨èµ‹å€¼å�Ž,IERå¯„å­˜å™¨ä¼šè¢«æ¸…é›¶,DLMå¯„å­˜å™¨èµ‹å€¼å�Žéœ€è¿˜åŽŸIERå¯„å­˜å™¨çš„å€¼ */
+	unsigned char ier, lcr;
+	
+	lcr = serial_in(up, UART_LCR);
+	serial_outp(up, UART_LCR, lcr & (~UART_LCR_DLAB));
+	ier = serial_in(up, UART_IER);
+	serial_outp(up, UART_LCR, lcr | UART_LCR_DLAB);
+
 	serial_outp(up, UART_DLL, value & 0xff);
 	serial_outp(up, UART_DLM, value >> 8 & 0xff);
+	
+	serial_outp(up, UART_LCR, lcr & (~UART_LCR_DLAB));
+	serial_outp(up, UART_IER, ier);
 }
 
 #if defined(CONFIG_MIPS_ALCHEMY)
@@ -2479,7 +2490,7 @@
 		serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
 	}
 
-	serial_dl_write(up, quot);
+	serial_dl_write(up, quot);  //dbg-yg
 
 	/*
 	 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
diff -uNra linux-3.0.82/drivers/tty/serial/Kconfig linux-3.0.82x/drivers/tty/serial/Kconfig
--- linux-3.0.82/drivers/tty/serial/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/tty/serial/Kconfig	2017-09-23 03:42:50.194674526 +0800
@@ -167,6 +167,22 @@
 # Multi-port serial cards
 #
 
+config MULTIFUNC_CONFIG_SERAIL0
+	bool "multifunction serail 0 for loongson 1b"
+	depends on SERIAL_8250 && LOONGSON_UART_BASE && LS1B_MACH
+	default n
+	help
+	  Say Y here To enable multifunction on loongson 1B uart0 port.
+	  If unsure, say N.
+
+config MULTIFUNC_CONFIG_SERAIL1
+	bool "multifunction serail 1 for loongson 1b"
+	depends on SERIAL_8250 && LOONGSON_UART_BASE && LS1B_MACH
+	default n
+	help
+	  Say Y here To enable multifunction on loongson 1B uart1 port.
+	  If unsure, say N.
+
 config SERIAL_8250_FOURPORT
 	tristate "Support Fourport cards"
 	depends on SERIAL_8250 != n && ISA && SERIAL_8250_MANY_PORTS
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_cfi_common.h linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_cfi_common.h
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_cfi_common.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_cfi_common.h	2017-09-23 03:42:50.194674526 +0800
@@ -0,0 +1,142 @@
+/* ==========================================================================
+ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+ * otherwise expressly agreed to in writing between Synopsys and you.
+ * 
+ * The Software IS NOT an item of Licensed Software or Licensed Product under
+ * any End User Software License Agreement or Agreement for Licensed Product
+ * with Synopsys or any supplement thereto. You are permitted to use and
+ * redistribute this Software in source and binary forms, with or without
+ * modification, provided that redistributions of source code must retain this
+ * notice. You may not view, use, disclose, copy or distribute this file or
+ * any information contained herein except pursuant to this license grant from
+ * Synopsys. If you do not agree with this notice, including the disclaimer
+ * below, then you are not authorized to use the Software.
+ * 
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================== */
+
+#if !defined(__DWC_CFI_COMMON_H__)
+#define __DWC_CFI_COMMON_H__
+
+//#include <linux/types.h>
+
+/**
+ * @file 
+ *
+ * This file contains the CFI specific common constants, interfaces
+ * (functions and macros) and structures for Linux. No PCD specific
+ * data structure or definition is to be included in this file.
+ *
+ */
+
+/** This is a request for all Core Features */
+#define VEN_CORE_GET_FEATURES		0xB1
+
+/** This is a request to get the value of a specific Core Feature */
+#define VEN_CORE_GET_FEATURE		0xB2
+
+/** This command allows the host to set the value of a specific Core Feature */
+#define VEN_CORE_SET_FEATURE		0xB3
+
+/** This command allows the host to set the default values of 
+ * either all or any specific Core Feature 
+ */
+#define VEN_CORE_RESET_FEATURES		0xB4
+
+/** This command forces the PCD to write the deferred values of a Core Features */
+#define VEN_CORE_ACTIVATE_FEATURES	0xB5
+
+/** This request reads a DWORD value from a register at the specified offset */
+#define VEN_CORE_READ_REGISTER		0xB6
+
+/** This request writes a DWORD value into a register at the specified offset */
+#define VEN_CORE_WRITE_REGISTER		0xB7
+
+/** This structure is the header of the Core Features dataset returned to 
+ *  the Host
+ */
+struct cfi_all_features_header {
+/** The features header structure length is */
+#define CFI_ALL_FEATURES_HDR_LEN		8
+	/**
+	 * The total length of the features dataset returned to the Host 
+	 */
+	uint16_t wTotalLen;
+
+	/**
+	 * CFI version number inBinary-Coded Decimal (i.e., 1.00 is 100H).
+	 * This field identifies the version of the CFI Specification with which 
+	 * the device is compliant.
+	 */
+	uint16_t wVersion;
+
+	/** The ID of the Core */
+	uint16_t wCoreID;
+#define CFI_CORE_ID_UDC		1
+#define CFI_CORE_ID_OTG		2
+#define CFI_CORE_ID_WUDEV	3
+
+	/** Number of features returned by VEN_CORE_GET_FEATURES request */
+	uint16_t wNumFeatures;
+} UPACKED;
+
+typedef struct cfi_all_features_header cfi_all_features_header_t;
+
+/** This structure is a header of the Core Feature descriptor dataset returned to 
+ *  the Host after the VEN_CORE_GET_FEATURES request
+ */
+struct cfi_feature_desc_header {
+#define CFI_FEATURE_DESC_HDR_LEN	8
+
+	/** The feature ID */
+	uint16_t wFeatureID;
+
+	/** Length of this feature descriptor in bytes - including the
+	 * length of the feature name string
+	 */
+	uint16_t wLength;
+
+	/** The data length of this feature in bytes */
+	uint16_t wDataLength;
+
+	/** 
+	 * Attributes of this features 
+	 * D0: Access rights
+	 * 0 - Read/Write
+	 * 1 - Read only
+	 */
+	uint8_t bmAttributes;
+#define CFI_FEATURE_ATTR_RO		1
+#define CFI_FEATURE_ATTR_RW		0
+
+	/** Length of the feature name in bytes */
+	uint8_t bNameLen;
+
+	/** The feature name buffer */
+	//uint8_t *name;
+} UPACKED;
+
+typedef struct cfi_feature_desc_header cfi_feature_desc_header_t;
+
+/**
+ * This structure describes a NULL terminated string referenced by its id field.
+ * It is very similar to usb_string structure but has the id field type set to 16-bit.
+ */
+struct cfi_string {
+	uint16_t id;
+	const uint8_t *s;
+};
+typedef struct cfi_string cfi_string_t;
+
+#endif
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_adp.c linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_adp.c
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_adp.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_adp.c	2017-09-23 03:42:50.194674526 +0800
@@ -0,0 +1,803 @@
+/* ==========================================================================
+ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_adp.c $
+ * $Revision: #9 $
+ * $Date: 2011/05/17 $
+ * $Change: 1774110 $
+ *
+ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+ * otherwise expressly agreed to in writing between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product under
+ * any End User Software License Agreement or Agreement for Licensed Product
+ * with Synopsys or any supplement thereto. You are permitted to use and
+ * redistribute this Software in source and binary forms, with or without
+ * modification, provided that redistributions of source code must retain this
+ * notice. You may not view, use, disclose, copy or distribute this file or
+ * any information contained herein except pursuant to this license grant from
+ * Synopsys. If you do not agree with this notice, including the disclaimer
+ * below, then you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================== */
+
+#include "dwc_os.h"
+#include "dwc_otg_regs.h"
+#include "dwc_otg_cil.h"
+#include "dwc_otg_adp.h"
+
+/** @file
+ *
+ * This file contains the most of the Attach Detect Protocol implementation for
+ * the driver to support OTG Rev2.0.
+ *
+ */
+
+void dwc_otg_adp_write_reg(dwc_otg_core_if_t * core_if, uint32_t value)
+{
+	adpctl_data_t adpctl;
+
+	adpctl.d32 = value;
+	adpctl.b.ar = 0x2;
+
+	DWC_WRITE_REG32(&core_if->core_global_regs->adpctl, adpctl.d32);
+
+	while (adpctl.b.ar) {
+		adpctl.d32 = DWC_READ_REG32(&core_if->core_global_regs->adpctl);
+	}
+
+}
+
+/**
+ * Function is called to read ADP registers
+ */
+uint32_t dwc_otg_adp_read_reg(dwc_otg_core_if_t * core_if)
+{
+	adpctl_data_t adpctl;
+
+	adpctl.d32 = 0;
+	adpctl.b.ar = 0x1;
+
+	DWC_WRITE_REG32(&core_if->core_global_regs->adpctl, adpctl.d32);
+
+	while (adpctl.b.ar) {
+		adpctl.d32 = DWC_READ_REG32(&core_if->core_global_regs->adpctl);
+	}
+
+	return adpctl.d32;
+}
+
+/**
+ * Function is called to read ADPCTL register and filter Write-clear bits
+ */
+uint32_t dwc_otg_adp_read_reg_filter(dwc_otg_core_if_t * core_if)
+{
+	adpctl_data_t adpctl;
+
+	adpctl.d32 = dwc_otg_adp_read_reg(core_if);
+	adpctl.b.adp_tmout_int = 0;
+	adpctl.b.adp_prb_int = 0;
+	adpctl.b.adp_tmout_int = 0;
+		
+	return adpctl.d32;
+}
+
+/**
+ * Function is called to write ADP registers
+ */
+void dwc_otg_adp_modify_reg(dwc_otg_core_if_t * core_if, uint32_t clr,
+			    uint32_t set)
+{
+	dwc_otg_adp_write_reg(core_if,
+			      (dwc_otg_adp_read_reg(core_if) & (~clr)) | set);
+}
+
+static void adp_sense_timeout(void *ptr)
+{
+	dwc_otg_core_if_t *core_if = (dwc_otg_core_if_t *) ptr;
+	core_if->adp.sense_timer_started = 0;
+
+	if (core_if->adp_enable) {
+		dwc_otg_adp_sense_stop(core_if);
+		dwc_otg_adp_probe_start(core_if);
+	}
+}
+
+/**
+ * This function is called when the ADP vbus timer expires. Timeout is 1.1s.
+ */
+static void adp_vbuson_timeout(void *ptr)
+{
+	gpwrdn_data_t gpwrdn;
+	dwc_otg_core_if_t *core_if = (dwc_otg_core_if_t *) ptr;
+	hprt0_data_t hprt0 = {.d32 = 0 };
+	pcgcctl_data_t pcgcctl = {.d32 = 0 };
+	DWC_PRINTF("%s: 1.1 seconds expire after turning on VBUS\n",__FUNCTION__);
+	if (core_if) {
+		core_if->adp.vbuson_timer_started = 0;
+		/* Turn off vbus */
+		hprt0.b.prtpwr = 1;
+		DWC_MODIFY_REG32(core_if->host_if->hprt0, hprt0.d32, 0);
+		gpwrdn.d32 = 0;
+
+		/* Power off the core */
+		if (core_if->power_down == 2) {
+			/* Enable Wakeup Logic */
+//                      gpwrdn.b.wkupactiv = 1;
+			gpwrdn.b.pmuactv = 0;
+			gpwrdn.b.pwrdnrstn = 1;
+			gpwrdn.b.pwrdnclmp = 1;
+			DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0,
+					 gpwrdn.d32);
+
+			/* Suspend the Phy Clock */
+			pcgcctl.b.stoppclk = 1;
+			DWC_MODIFY_REG32(core_if->pcgcctl, 0, pcgcctl.d32);
+
+			/* Switch on VDD */
+//                      gpwrdn.b.wkupactiv = 1;
+			gpwrdn.b.pmuactv = 1;
+			gpwrdn.b.pwrdnrstn = 1;
+			gpwrdn.b.pwrdnclmp = 1;
+			DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0,
+					 gpwrdn.d32);
+		} else {
+			/* Enable Power Down Logic */
+			gpwrdn.b.pmuintsel = 1;
+			DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32);
+		}
+
+		/* Power off the core */
+		if (core_if->power_down == 2) {
+			gpwrdn.d32 = 0;
+			gpwrdn.b.pwrdnswtch = 1;
+			DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn,
+					 gpwrdn.d32, 0);
+		}
+
+		/* Unmask SRP detected interrupt from Power Down Logic */
+		gpwrdn.d32 = 0;
+		gpwrdn.b.srp_det_msk = 1;
+		DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32);
+
+		dwc_otg_adp_probe_start(core_if);
+		dwc_otg_dump_global_registers(core_if);
+		dwc_otg_dump_host_registers(core_if);
+	}
+
+}
+
+/**
+ * Start the ADP Initial Probe timer to detect if Port Connected interrupt is 
+ * not asserted within 1.1 seconds.
+ *
+ * @param core_if the pointer to core_if strucure.
+ */
+void dwc_otg_adp_vbuson_timer_start(dwc_otg_core_if_t * core_if)
+{
+	core_if->adp.vbuson_timer_started = 1;
+	if (core_if->adp.vbuson_timer)
+	{
+		DWC_PRINTF("SCHEDULING VBUSON TIMER\n");
+		/* 1.1 secs + 60ms necessary for cil_hcd_start*/
+		DWC_TIMER_SCHEDULE(core_if->adp.vbuson_timer, 2000);
+	} else {
+		DWC_WARN("VBUSON_TIMER = %p\n",core_if->adp.vbuson_timer);
+	}
+}
+
+#if 0
+/**
+ * Masks all DWC OTG core interrupts
+ *
+ */
+static void mask_all_interrupts(dwc_otg_core_if_t * core_if)
+{
+	int i;
+	gahbcfg_data_t ahbcfg = {.d32 = 0 };
+
+	/* Mask Host Interrupts */
+
+	/* Clear and disable HCINTs */
+	for (i = 0; i < core_if->core_params->host_channels; i++) {
+		DWC_WRITE_REG32(&core_if->host_if->hc_regs[i]->hcintmsk, 0);
+		DWC_WRITE_REG32(&core_if->host_if->hc_regs[i]->hcint, 0xFFFFFFFF);
+
+	}
+
+	/* Clear and disable HAINT */
+	DWC_WRITE_REG32(&core_if->host_if->host_global_regs->haintmsk, 0x0000);
+	DWC_WRITE_REG32(&core_if->host_if->host_global_regs->haint, 0xFFFFFFFF);
+
+	/* Mask Device Interrupts */
+	if (!core_if->multiproc_int_enable) {
+		/* Clear and disable IN Endpoint interrupts */
+		DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->diepmsk, 0);
+		for (i = 0; i <= core_if->dev_if->num_in_eps; i++) {
+			DWC_WRITE_REG32(&core_if->dev_if->in_ep_regs[i]->
+					diepint, 0xFFFFFFFF);
+		}
+
+		/* Clear and disable OUT Endpoint interrupts */
+		DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->doepmsk, 0);
+		for (i = 0; i <= core_if->dev_if->num_out_eps; i++) {
+			DWC_WRITE_REG32(&core_if->dev_if->out_ep_regs[i]->
+					doepint, 0xFFFFFFFF);
+		}
+
+		/* Clear and disable DAINT */
+		DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->daint,
+				0xFFFFFFFF);
+		DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->daintmsk, 0);
+	} else {
+		for (i = 0; i < core_if->dev_if->num_in_eps; ++i) {
+			DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->
+					diepeachintmsk[i], 0);
+			DWC_WRITE_REG32(&core_if->dev_if->in_ep_regs[i]->
+					diepint, 0xFFFFFFFF);
+		}
+
+		for (i = 0; i < core_if->dev_if->num_out_eps; ++i) {
+			DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->
+					doepeachintmsk[i], 0);
+			DWC_WRITE_REG32(&core_if->dev_if->out_ep_regs[i]->
+					doepint, 0xFFFFFFFF);
+		}
+
+		DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->deachintmsk,
+				0);
+		DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->deachint,
+				0xFFFFFFFF);
+
+	}
+
+	/* Disable interrupts */
+	ahbcfg.b.glblintrmsk = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gahbcfg, ahbcfg.d32, 0);
+
+	/* Disable all interrupts. */
+	DWC_WRITE_REG32(&core_if->core_global_regs->gintmsk, 0);
+
+	/* Clear any pending interrupts */
+	DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, 0xFFFFFFFF);
+
+	/* Clear any pending OTG Interrupts */
+	DWC_WRITE_REG32(&core_if->core_global_regs->gotgint, 0xFFFFFFFF);
+}
+
+/**
+ * Unmask Port Connection Detected interrupt
+ *
+ */
+static void unmask_conn_det_intr(dwc_otg_core_if_t * core_if)
+{
+	gintmsk_data_t gintmsk = {.d32 = 0,.b.portintr = 1 };
+
+	DWC_WRITE_REG32(&core_if->core_global_regs->gintmsk, gintmsk.d32);
+}
+#endif
+
+/**
+ * Starts the ADP Probing
+ *
+ * @param core_if the pointer to core_if structure.
+ */
+uint32_t dwc_otg_adp_probe_start(dwc_otg_core_if_t * core_if)
+{
+
+	adpctl_data_t adpctl = {.d32 = 0};
+	gpwrdn_data_t gpwrdn;
+#if 0
+	adpctl_data_t adpctl_int = {.d32 = 0, .b.adp_prb_int = 1,
+								.b.adp_sns_int = 1, b.adp_tmout_int};
+#endif
+	DWC_PRINTF("ADP Probe Start\n");
+	core_if->adp.probe_enabled = 1;
+
+	adpctl.b.adpres = 1;
+	dwc_otg_adp_write_reg(core_if, adpctl.d32);
+
+	while (adpctl.b.adpres) {
+		adpctl.d32 = dwc_otg_adp_read_reg(core_if);
+	}
+
+	adpctl.d32 = 0;
+	gpwrdn.d32 = DWC_READ_REG32(&core_if->core_global_regs->gpwrdn);
+
+	/* In Host mode unmask SRP detected interrupt */
+	if (!gpwrdn.b.idsts) {
+		gpwrdn.d32 = 0;
+		gpwrdn.b.srp_det_msk = 1;
+		DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32);
+	}
+	adpctl.b.adp_tmout_int_msk = 1;
+	adpctl.b.adp_prb_int_msk = 1;
+	adpctl.b.prb_dschg = 1;
+	adpctl.b.prb_delta = 1;
+	adpctl.b.prb_per = 1;
+	adpctl.b.adpen = 1;
+	adpctl.b.enaprb = 1;
+
+	dwc_otg_adp_write_reg(core_if, adpctl.d32);
+	DWC_PRINTF("ADP Probe Finish\n");
+	return 0;
+}
+
+/**
+ * Starts the ADP Sense timer to detect if ADP Sense interrupt is not asserted within
+ * 3 seconds.
+ *
+ * @param core_if the pointer to core_if strucure.
+ */
+void dwc_otg_adp_sense_timer_start(dwc_otg_core_if_t * core_if)
+{
+	core_if->adp.sense_timer_started = 1;
+	DWC_TIMER_SCHEDULE(core_if->adp.sense_timer, 3000 /* 3 secs */ );
+}
+
+/**
+ * Starts the ADP Sense
+ *
+ * @param core_if the pointer to core_if strucure.
+ */
+uint32_t dwc_otg_adp_sense_start(dwc_otg_core_if_t * core_if)
+{
+	adpctl_data_t adpctl;
+
+	DWC_PRINTF("ADP Sense Start\n");
+
+	/* Unmask ADP sense interrupt and mask all other from the core */
+	adpctl.d32 = dwc_otg_adp_read_reg_filter(core_if);
+	adpctl.b.adp_sns_int_msk = 1;
+	dwc_otg_adp_write_reg(core_if, adpctl.d32);
+	dwc_otg_disable_global_interrupts(core_if); // vahrama 
+
+	/* Set ADP reset bit*/
+	adpctl.d32 = dwc_otg_adp_read_reg_filter(core_if);
+	adpctl.b.adpres = 1;
+	dwc_otg_adp_write_reg(core_if, adpctl.d32);
+
+	while (adpctl.b.adpres) {
+		adpctl.d32 = dwc_otg_adp_read_reg(core_if);
+	}
+
+	adpctl.b.adpres = 0;
+	adpctl.b.adpen = 1;
+	adpctl.b.enasns = 1;
+	dwc_otg_adp_write_reg(core_if, adpctl.d32);
+
+	dwc_otg_adp_sense_timer_start(core_if);
+
+	return 0;
+}
+
+/**
+ * Stops the ADP Probing
+ *
+ * @param core_if the pointer to core_if strucure.
+ */
+uint32_t dwc_otg_adp_probe_stop(dwc_otg_core_if_t * core_if)
+{
+
+	adpctl_data_t adpctl;
+	DWC_PRINTF("Stop ADP probe\n");
+	core_if->adp.probe_enabled = 0;
+	adpctl.b.adpres = 1;
+	dwc_otg_adp_write_reg(core_if, adpctl.d32);
+
+	/** todo: check if ADP is needed to be reset */
+	while (adpctl.b.adpres) {
+		adpctl.d32 = dwc_otg_adp_read_reg(core_if);
+	}
+
+	dwc_otg_adp_write_reg(core_if, 0);
+
+	dwc_otg_enable_global_interrupts(core_if);
+
+	return 0;
+}
+
+/**
+ * Stops the ADP Sensing
+ *
+ * @param core_if the pointer to core_if strucure.
+ */
+uint32_t dwc_otg_adp_sense_stop(dwc_otg_core_if_t * core_if)
+{
+	adpctl_data_t adpctl;
+
+	core_if->adp.sense_enabled = 0;
+
+	adpctl.d32 = dwc_otg_adp_read_reg_filter(core_if);
+	adpctl.b.enasns = 0;
+	dwc_otg_adp_write_reg(core_if, adpctl.d32);
+
+	dwc_otg_enable_global_interrupts(core_if);
+
+	return 0;
+}
+
+/**
+ * Called to turn on the VBUS after initial ADP probe in host mode.
+ * If port power was already enabled in cil_hcd_start function then
+ * only schedule a timer.
+ *
+ * @param core_if the pointer to core_if structure.
+ */
+void dwc_otg_adp_turnon_vbus(dwc_otg_core_if_t * core_if)
+{
+	hprt0_data_t hprt0 = {.d32 = 0 };
+	hprt0.d32 = dwc_otg_read_hprt0(core_if);
+	
+	if (hprt0.b.prtpwr == 0) {
+		hprt0.b.prtpwr = 1;
+		//DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+	}
+	
+	dwc_otg_adp_vbuson_timer_start(core_if);
+}
+
+/**
+ * Called right after driver is loaded
+ * to perform initial actions for ADP
+ *
+ * @param core_if the pointer to core_if structure.
+ */
+void dwc_otg_adp_start(dwc_otg_core_if_t * core_if)
+{
+	gpwrdn_data_t gpwrdn;
+
+	DWC_PRINTF("ADP Initial Start\n");
+	core_if->adp.adp_started = 1;
+	
+	if (!dwc_otg_is_device_mode(core_if)) {	
+		/* Enable Power Down Logic Interrupt*/
+		gpwrdn.d32 = 0;
+		gpwrdn.b.pmuintsel = 1;
+		DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32);
+		/* Initialize first ADP probe to obtain Ramp Time value */
+		core_if->adp.initial_probe = 1;
+		dwc_otg_adp_probe_start(core_if);
+	} else {
+		gotgctl_data_t gotgctl;
+		gotgctl.d32 = DWC_READ_REG32(&core_if->core_global_regs->gotgctl);
+		if (gotgctl.b.bsesvld == 0) {
+			/* Enable Power Down Logic Interrupt*/
+			gpwrdn.d32 = 0;
+			DWC_PRINTF("VBUS is not valid - start ADP probe\n");
+			gpwrdn.b.pmuintsel = 1;
+			DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32);
+			core_if->adp.initial_probe = 1;
+			dwc_otg_adp_probe_start(core_if);
+		} else {
+			DWC_PRINTF("VBUS is valid - initialize core as a Device\n");
+			core_if->op_state = B_PERIPHERAL;
+			dwc_otg_core_init(core_if);
+			dwc_otg_enable_global_interrupts(core_if);
+			cil_pcd_start(core_if);
+			dwc_otg_dump_global_registers(core_if);
+			dwc_otg_dump_dev_registers(core_if);
+		}
+	}
+}
+
+void dwc_otg_adp_init(dwc_otg_core_if_t * core_if)
+{
+	core_if->adp.adp_started = 0;
+	core_if->adp.initial_probe = 0;
+	core_if->adp.probe_timer_values[0] = -1;
+	core_if->adp.probe_timer_values[1] = -1;
+	core_if->adp.probe_enabled = 0;
+	core_if->adp.sense_enabled = 0;
+	core_if->adp.sense_timer_started = 0;
+	core_if->adp.vbuson_timer_started = 0;
+	core_if->adp.attached = DWC_OTG_ADP_UNKOWN;
+	/* Initialize timers */
+	core_if->adp.sense_timer =
+	    DWC_TIMER_ALLOC("ADP SENSE TIMER", adp_sense_timeout, core_if);
+	core_if->adp.vbuson_timer =
+	    DWC_TIMER_ALLOC("ADP VBUS ON TIMER", adp_vbuson_timeout, core_if);
+	if (!core_if->adp.sense_timer || !core_if->adp.vbuson_timer)
+	{
+		DWC_ERROR("Could not allocate memory for ADP timers\n");
+	}
+}
+
+void dwc_otg_adp_remove(dwc_otg_core_if_t * core_if)
+{
+	DWC_TIMER_FREE(core_if->adp.sense_timer);
+	DWC_TIMER_FREE(core_if->adp.vbuson_timer);
+}
+
+/////////////////////////////////////////////////////////////////////
+////////////// ADP Interrupt Handlers ///////////////////////////////
+/////////////////////////////////////////////////////////////////////
+/**
+ * This function sets Ramp Timer values
+ */
+static uint32_t set_timer_value(dwc_otg_core_if_t * core_if, uint32_t val)
+{
+	if (core_if->adp.probe_timer_values[0] == -1) {
+		core_if->adp.probe_timer_values[0] = val;
+		core_if->adp.probe_timer_values[1] = -1;
+		return 1;
+	} else {
+		core_if->adp.probe_timer_values[1] =
+		    core_if->adp.probe_timer_values[0];
+		core_if->adp.probe_timer_values[0] = val;
+		return 0;
+	}
+}
+
+/**
+ * This function compares Ramp Timer values
+ */
+static uint32_t compare_timer_values(dwc_otg_core_if_t * core_if)
+{
+	if (core_if->adp.probe_timer_values[0] ==
+	    core_if->adp.probe_timer_values[1]) {
+		return 0;
+	} else {
+		return 1;
+	}
+}
+
+/**
+ * This function handles ADP Probe Interrupts
+ */
+static int32_t dwc_otg_adp_handle_prb_intr(dwc_otg_core_if_t * core_if,
+						 uint32_t val)
+{
+	adpctl_data_t adpctl = {.d32 = 0 };
+	gpwrdn_data_t gpwrdn;
+	adpctl.d32 = val;
+
+	if (set_timer_value(core_if, adpctl.b.rtim) &&
+	    core_if->adp.initial_probe) {
+		gpwrdn_data_t temp;
+		core_if->adp.initial_probe = 0;
+		dwc_otg_adp_probe_stop(core_if);
+		temp.d32 = DWC_READ_REG32(&core_if->core_global_regs->gpwrdn);
+
+		gpwrdn.d32 = 0;
+		gpwrdn.b.pmuintsel = 1;
+		DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+
+		/* check which value is for device mode and which for Host mode */
+		if (!temp.b.idsts) {	/* considered host mode value is 0 */
+			/*
+			 * Turn on VBUS after initial ADP probe.
+			 */
+			core_if->op_state = A_HOST;
+			dwc_otg_enable_global_interrupts(core_if);
+			DWC_SPINUNLOCK(core_if->lock);
+			cil_hcd_start(core_if);
+			dwc_otg_adp_turnon_vbus(core_if);
+			DWC_SPINLOCK(core_if->lock);
+		} else {
+			/*
+			 * Initiate SRP after initial ADP probe.
+			 */
+			core_if->op_state = B_PERIPHERAL;
+			dwc_otg_core_init(core_if);
+			dwc_otg_enable_global_interrupts(core_if);
+			cil_pcd_start(core_if);
+			dwc_otg_initiate_srp(core_if);
+		}
+	} else {
+		gpwrdn.d32 = DWC_READ_REG32(&core_if->core_global_regs->gpwrdn);
+		dwc_otg_dump_global_registers(core_if);
+		dwc_otg_dump_host_registers(core_if);
+		if (compare_timer_values(core_if)) {
+		//core_if->adp.attached = DWC_OTG_ADP_ATTACHED;
+			dwc_otg_adp_probe_stop(core_if);
+
+			/* Power on the core */
+			if (core_if->power_down == 2) {
+				gpwrdn.b.pwrdnswtch = 1;
+				DWC_MODIFY_REG32(&core_if->core_global_regs->
+						 gpwrdn, 0, gpwrdn.d32);
+			}
+
+			/* check which value is for device mode and which for Host mode */
+			if (!gpwrdn.b.idsts) {	/* considered host mode value is 0 */
+				/* Disable Interrupt from Power Down Logic */
+				gpwrdn.d32 = 0;
+				gpwrdn.b.pmuintsel = 1;
+				DWC_MODIFY_REG32(&core_if->core_global_regs->
+						 gpwrdn, gpwrdn.d32, 0);
+
+				/*
+				 * Initialize the Core for Host mode.
+				 */
+				core_if->op_state = A_HOST;
+				dwc_otg_core_init(core_if);
+				dwc_otg_enable_global_interrupts(core_if);
+				cil_hcd_start(core_if);
+			} else {
+				/* Mask SRP detected interrupt from Power Down Logic */
+				gpwrdn.d32 = 0;
+				gpwrdn.b.srp_det_msk = 1;
+				DWC_MODIFY_REG32(&core_if->core_global_regs->
+						 gpwrdn, gpwrdn.d32, 0);
+
+				/* Disable Power Down Logic */
+				gpwrdn.d32 = 0;
+				gpwrdn.b.pmuactv = 1;
+				DWC_MODIFY_REG32(&core_if->core_global_regs->
+						 gpwrdn, gpwrdn.d32, 0);
+
+				/*
+				 * Initialize the Core for Device mode.
+				 */
+				core_if->op_state = B_PERIPHERAL;
+				dwc_otg_core_init(core_if);
+				dwc_otg_enable_global_interrupts(core_if);
+				cil_pcd_start(core_if);
+
+				if (!gpwrdn.b.bsessvld) {
+					dwc_otg_initiate_srp(core_if);
+				}
+			}
+		}
+		if (core_if->power_down == 2) {
+			if (gpwrdn.b.bsessvld) {
+				/* Mask SRP detected interrupt from Power Down Logic */
+				gpwrdn.d32 = 0;
+				gpwrdn.b.srp_det_msk = 1;
+				DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+				
+				/* Disable Power Down Logic */
+				gpwrdn.d32 = 0;
+				gpwrdn.b.pmuactv = 1;
+				DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+
+				/*
+				 * Initialize the Core for Device mode.
+				 */
+				core_if->op_state = B_PERIPHERAL;
+				dwc_otg_core_init(core_if);
+				dwc_otg_enable_global_interrupts(core_if);
+				cil_pcd_start(core_if);
+			}
+		}
+	}
+	return 0;
+}
+
+/**
+ * This function hadles ADP Sense Interrupt
+ */
+static int32_t dwc_otg_adp_handle_sns_intr(dwc_otg_core_if_t * core_if)
+{
+	/* Stop ADP Sense timer */
+	DWC_TIMER_CANCEL(core_if->adp.sense_timer);
+
+	/* Restart ADP Sense timer */
+	dwc_otg_adp_sense_timer_start(core_if);
+
+	return 0;
+}
+
+/**
+ * This function handles ADP Probe Interrupts
+ */
+static int32_t dwc_otg_adp_handle_prb_tmout_intr(dwc_otg_core_if_t * core_if,
+						 uint32_t val)
+{
+	adpctl_data_t adpctl = {.d32 = 0 };
+	adpctl.d32 = val;
+	set_timer_value(core_if, adpctl.b.rtim);
+	
+	return 0;
+}
+
+/**
+ * ADP Interrupt handler.
+ *
+ */
+int32_t dwc_otg_adp_handle_intr(dwc_otg_core_if_t * core_if)
+{
+	int retval = 0;
+	adpctl_data_t adpctl = {.d32 = 0};
+
+	adpctl.d32 = dwc_otg_adp_read_reg(core_if);
+
+	if (adpctl.b.adp_sns_int & adpctl.b.adp_sns_int_msk) {
+		DWC_PRINTF("ADP Sense interrupt\n");
+		adpctl.b.adp_sns_int = 1;
+		retval |= dwc_otg_adp_handle_sns_intr(core_if);
+	}
+	if (adpctl.b.adp_tmout_int & adpctl.b.adp_tmout_int_msk) {
+		DWC_PRINTF("ADP timeout interrupt\n");
+		adpctl.b.adp_tmout_int = 1;
+		retval |= dwc_otg_adp_handle_prb_tmout_intr(core_if, adpctl.d32);
+	}
+	if (adpctl.b.adp_prb_int & adpctl.b.adp_prb_int_msk) {
+		DWC_PRINTF("ADP Probe interrupt\n");
+		adpctl.b.adp_prb_int = 1;	
+		retval |= dwc_otg_adp_handle_prb_intr(core_if, adpctl.d32);
+	}
+
+	dwc_otg_adp_modify_reg(core_if, adpctl.d32, 0);
+
+	return retval;
+}
+
+/**
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ */
+int32_t dwc_otg_adp_handle_srp_intr(dwc_otg_core_if_t * core_if)
+{
+	hprt0_data_t hprt0;
+	gpwrdn_data_t gpwrdn;
+
+#ifndef DWC_HOST_ONLY
+	DWC_DEBUGPL(DBG_ANY, "++ Power Down Logic Session Request Interrupt++\n");
+
+	gpwrdn.d32 = DWC_READ_REG32(&core_if->core_global_regs->gpwrdn);
+	/* check which value is for device mode and which for Host mode */
+	if (gpwrdn.b.idsts) {	/* considered host mode value is 1 */
+		DWC_PRINTF("SRP: Host mode\n");
+
+		if (core_if->adp_enable) {
+			dwc_otg_adp_probe_stop(core_if);
+
+			/* Power on the core */
+			if (core_if->power_down == 2) {
+				gpwrdn.b.pwrdnswtch = 1;
+				DWC_MODIFY_REG32(&core_if->core_global_regs->
+						 gpwrdn, 0, gpwrdn.d32);
+			}
+
+			core_if->op_state = A_HOST;
+			dwc_otg_core_init(core_if);
+			dwc_otg_enable_global_interrupts(core_if);
+			cil_hcd_start(core_if);
+		}
+
+		/* Turn on the port power bit. */
+		hprt0.d32 = dwc_otg_read_hprt0(core_if);
+		hprt0.b.prtpwr = 1;
+		DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+
+		/* Start the Connection timer. So a message can be displayed
+		 * if connect does not occur within 10 seconds. */
+		cil_hcd_session_start(core_if);
+	} else {
+		DWC_PRINTF("SRP: Device mode\n");
+		if (core_if->adp_enable) {
+			dwc_otg_adp_probe_stop(core_if);
+
+			/* Power on the core */
+			if (core_if->power_down == 2) {
+				gpwrdn.b.pwrdnswtch = 1;
+				DWC_MODIFY_REG32(&core_if->core_global_regs->
+						 gpwrdn, 0, gpwrdn.d32);
+			}
+
+			gpwrdn.d32 = 0;
+			gpwrdn.b.pmuactv = 0;
+			DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0,
+					 gpwrdn.d32);
+
+			core_if->op_state = B_PERIPHERAL;
+			dwc_otg_core_init(core_if);
+			dwc_otg_enable_global_interrupts(core_if);
+			cil_pcd_start(core_if);
+		}
+	}
+#endif
+	return 1;
+}
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_adp.h linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_adp.h
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_adp.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_adp.h	2017-09-23 03:42:50.194674526 +0800
@@ -0,0 +1,78 @@
+/* ==========================================================================
+ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_adp.h $
+ * $Revision: #6 $
+ * $Date: 2011/05/17 $
+ * $Change: 1774110 $
+ *
+ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+ * otherwise expressly agreed to in writing between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product under
+ * any End User Software License Agreement or Agreement for Licensed Product
+ * with Synopsys or any supplement thereto. You are permitted to use and
+ * redistribute this Software in source and binary forms, with or without
+ * modification, provided that redistributions of source code must retain this
+ * notice. You may not view, use, disclose, copy or distribute this file or
+ * any information contained herein except pursuant to this license grant from
+ * Synopsys. If you do not agree with this notice, including the disclaimer
+ * below, then you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================== */
+
+#ifndef __DWC_OTG_ADP_H__
+#define __DWC_OTG_ADP_H__
+
+/**
+ * @file
+ *
+ * This file contains the Attach Detect Protocol interfaces and defines
+ * (functions) and structures for Linux.
+ *
+ */
+
+#define DWC_OTG_ADP_UNATTACHED	0
+#define DWC_OTG_ADP_ATTACHED	1
+#define DWC_OTG_ADP_UNKOWN	2
+
+typedef struct dwc_otg_adp {
+	uint32_t adp_started;	
+	uint32_t initial_probe;
+	int32_t probe_timer_values[2];
+	uint32_t probe_enabled;
+	uint32_t sense_enabled;
+	dwc_timer_t *sense_timer;
+	uint32_t sense_timer_started;
+	dwc_timer_t *vbuson_timer;
+	uint32_t vbuson_timer_started;
+	uint32_t attached;
+} dwc_otg_adp_t;
+
+/**
+ * Attach Detect Protocol functions
+ */
+
+extern void dwc_otg_adp_write_reg(dwc_otg_core_if_t * core_if, uint32_t value);
+extern uint32_t dwc_otg_adp_read_reg(dwc_otg_core_if_t * core_if);
+extern uint32_t dwc_otg_adp_probe_start(dwc_otg_core_if_t * core_if);
+extern uint32_t dwc_otg_adp_sense_start(dwc_otg_core_if_t * core_if);
+extern uint32_t dwc_otg_adp_probe_stop(dwc_otg_core_if_t * core_if);
+extern uint32_t dwc_otg_adp_sense_stop(dwc_otg_core_if_t * core_if);
+extern void dwc_otg_adp_start(dwc_otg_core_if_t * core_if);
+extern void dwc_otg_adp_init(dwc_otg_core_if_t * core_if);
+extern void dwc_otg_adp_remove(dwc_otg_core_if_t * core_if);
+extern int32_t dwc_otg_adp_handle_intr(dwc_otg_core_if_t * core_if);
+extern int32_t dwc_otg_adp_handle_srp_intr(dwc_otg_core_if_t * core_if);
+
+#endif //__DWC_OTG_ADP_H__
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_attr.c linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_attr.c
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_attr.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_attr.c	2017-09-23 03:42:50.194674526 +0800
@@ -0,0 +1,1319 @@
+/* ==========================================================================
+ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_attr.c $
+ * $Revision: #44 $
+ * $Date: 2010/11/29 $
+ * $Change: 1636033 $
+ *
+ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+ * otherwise expressly agreed to in writing between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product under
+ * any End User Software License Agreement or Agreement for Licensed Product
+ * with Synopsys or any supplement thereto. You are permitted to use and
+ * redistribute this Software in source and binary forms, with or without
+ * modification, provided that redistributions of source code must retain this
+ * notice. You may not view, use, disclose, copy or distribute this file or
+ * any information contained herein except pursuant to this license grant from
+ * Synopsys. If you do not agree with this notice, including the disclaimer
+ * below, then you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================== */
+
+/** @file
+ *
+ * The diagnostic interface will provide access to the controller for
+ * bringing up the hardware and testing.  The Linux driver attributes
+ * feature will be used to provide the Linux Diagnostic
+ * Interface. These attributes are accessed through sysfs.
+ */
+
+/** @page "Linux Module Attributes"
+ *
+ * The Linux module attributes feature is used to provide the Linux
+ * Diagnostic Interface.  These attributes are accessed through sysfs.
+ * The diagnostic interface will provide access to the controller for
+ * bringing up the hardware and testing.
+
+ The following table shows the attributes.
+ <table>
+ <tr>
+ <td><b> Name</b></td>
+ <td><b> Description</b></td>
+ <td><b> Access</b></td>
+ </tr>
+
+ <tr>
+ <td> mode </td>
+ <td> Returns the current mode: 0 for device mode, 1 for host mode</td>
+ <td> Read</td>
+ </tr>
+
+ <tr>
+ <td> hnpcapable </td>
+ <td> Gets or sets the "HNP-capable" bit in the Core USB Configuraton Register.
+ Read returns the current value.</td>
+ <td> Read/Write</td>
+ </tr>
+
+ <tr>
+ <td> srpcapable </td>
+ <td> Gets or sets the "SRP-capable" bit in the Core USB Configuraton Register.
+ Read returns the current value.</td>
+ <td> Read/Write</td>
+ </tr>
+
+ <tr>
+ <td> hsic_connect </td>
+ <td> Gets or sets the "HSIC-Connect" bit in the GLPMCFG Register.
+ Read returns the current value.</td>
+ <td> Read/Write</td>
+ </tr>
+
+ <tr>
+ <td> inv_sel_hsic </td>
+ <td> Gets or sets the "Invert Select HSIC" bit in the GLPMFG Register.
+ Read returns the current value.</td>
+ <td> Read/Write</td>
+ </tr>
+
+ <tr>
+ <td> hnp </td>
+ <td> Initiates the Host Negotiation Protocol.  Read returns the status.</td>
+ <td> Read/Write</td>
+ </tr>
+
+ <tr>
+ <td> srp </td>
+ <td> Initiates the Session Request Protocol.  Read returns the status.</td>
+ <td> Read/Write</td>
+ </tr>
+
+ <tr>
+ <td> buspower </td>
+ <td> Gets or sets the Power State of the bus (0 - Off or 1 - On)</td>
+ <td> Read/Write</td>
+ </tr>
+
+ <tr>
+ <td> bussuspend </td>
+ <td> Suspends the USB bus.</td>
+ <td> Read/Write</td>
+ </tr>
+
+ <tr>
+ <td> busconnected </td>
+ <td> Gets the connection status of the bus</td>
+ <td> Read</td>
+ </tr>
+
+ <tr>
+ <td> gotgctl </td>
+ <td> Gets or sets the Core Control Status Register.</td>
+ <td> Read/Write</td>
+ </tr>
+
+ <tr>
+ <td> gusbcfg </td>
+ <td> Gets or sets the Core USB Configuration Register</td>
+ <td> Read/Write</td>
+ </tr>
+
+ <tr>
+ <td> grxfsiz </td>
+ <td> Gets or sets the Receive FIFO Size Register</td>
+ <td> Read/Write</td>
+ </tr>
+
+ <tr>
+ <td> gnptxfsiz </td>
+ <td> Gets or sets the non-periodic Transmit Size Register</td>
+ <td> Read/Write</td>
+ </tr>
+
+ <tr>
+ <td> gpvndctl </td>
+ <td> Gets or sets the PHY Vendor Control Register</td>
+ <td> Read/Write</td>
+ </tr>
+
+ <tr>
+ <td> ggpio </td>
+ <td> Gets the value in the lower 16-bits of the General Purpose IO Register
+ or sets the upper 16 bits.</td>
+ <td> Read/Write</td>
+ </tr>
+
+ <tr>
+ <td> guid </td>
+ <td> Gets or sets the value of the User ID Register</td>
+ <td> Read/Write</td>
+ </tr>
+
+ <tr>
+ <td> gsnpsid </td>
+ <td> Gets the value of the Synopsys ID Regester</td>
+ <td> Read</td>
+ </tr>
+
+ <tr>
+ <td> devspeed </td>
+ <td> Gets or sets the device speed setting in the DCFG register</td>
+ <td> Read/Write</td>
+ </tr>
+
+ <tr>
+ <td> enumspeed </td>
+ <td> Gets the device enumeration Speed.</td>
+ <td> Read</td>
+ </tr>
+
+ <tr>
+ <td> hptxfsiz </td>
+ <td> Gets the value of the Host Periodic Transmit FIFO</td>
+ <td> Read</td>
+ </tr>
+
+ <tr>
+ <td> hprt0 </td>
+ <td> Gets or sets the value in the Host Port Control and Status Register</td>
+ <td> Read/Write</td>
+ </tr>
+
+ <tr>
+ <td> regoffset </td>
+ <td> Sets the register offset for the next Register Access</td>
+ <td> Read/Write</td>
+ </tr>
+
+ <tr>
+ <td> regvalue </td>
+ <td> Gets or sets the value of the register at the offset in the regoffset attribute.</td>
+ <td> Read/Write</td>
+ </tr>
+
+ <tr>
+ <td> remote_wakeup </td>
+ <td> On read, shows the status of Remote Wakeup. On write, initiates a remote
+ wakeup of the host. When bit 0 is 1 and Remote Wakeup is enabled, the Remote
+ Wakeup signalling bit in the Device Control Register is set for 1
+ milli-second.</td>
+ <td> Read/Write</td>
+ </tr>
+
+ <tr>
+ <td> rem_wakeup_pwrdn </td>
+ <td> On read, shows the status core - hibernated or not. On write, initiates 
+ a remote wakeup of the device from Hibernation. </td>
+ <td> Read/Write</td>
+ </tr>
+
+ <tr>
+ <td> mode_ch_tim_en </td>
+ <td> This bit is used to enable or disable the host core to wait for 200 PHY 
+ clock cycles at the end of Resume to change the opmode signal to the PHY to 00
+ after Suspend or LPM. </td>
+ <td> Read/Write</td>
+ </tr>
+ 
+ <tr>
+ <td> fr_interval </td>
+ <td> On read, shows the value of HFIR Frame Interval. On write, dynamically 
+ reload HFIR register during runtime. The application can write a value to this
+ register only after the Port Enable bit of the Host Port Control and Status 
+ register (HPRT.PrtEnaPort) has been set </td>
+ <td> Read/Write</td>
+ </tr>
+ 
+ <tr>
+ <td> disconnect_us </td>
+ <td> On read, shows the status of disconnect_device_us. On write, sets disconnect_us
+ which causes soft disconnect for 100us. Applicable only for device mode of operation.</td>
+ <td> Read/Write</td>
+ </tr>
+
+ <tr>
+ <td> regdump </td>
+ <td> Dumps the contents of core registers.</td>
+ <td> Read</td>
+ </tr>
+
+ <tr>
+ <td> spramdump </td>
+ <td> Dumps the contents of core registers.</td>
+ <td> Read</td>
+ </tr>
+
+ <tr>
+ <td> hcddump </td>
+ <td> Dumps the current HCD state.</td>
+ <td> Read</td>
+ </tr>
+
+ <tr>
+ <td> hcd_frrem </td>
+ <td> Shows the average value of the Frame Remaining
+ field in the Host Frame Number/Frame Remaining register when an SOF interrupt
+ occurs. This can be used to determine the average interrupt latency. Also
+ shows the average Frame Remaining value for start_transfer and the "a" and
+ "b" sample points. The "a" and "b" sample points may be used during debugging
+ bto determine how long it takes to execute a section of the HCD code.</td>
+ <td> Read</td>
+ </tr>
+
+ <tr>
+ <td> rd_reg_test </td>
+ <td> Displays the time required to read the GNPTXFSIZ register many times
+ (the output shows the number of times the register is read).
+ <td> Read</td>
+ </tr>
+
+ <tr>
+ <td> wr_reg_test </td>
+ <td> Displays the time required to write the GNPTXFSIZ register many times
+ (the output shows the number of times the register is written).
+ <td> Read</td>
+ </tr>
+
+ <tr>
+ <td> lpm_response </td>
+ <td> Gets or sets lpm_response mode. Applicable only in device mode.
+ <td> Write</td>
+ </tr>
+
+ <tr>
+ <td> sleep_status </td>
+ <td> Shows sleep status of device.
+ <td> Read</td>
+ </tr>
+
+ </table>
+
+ Example usage:
+ To get the current mode:
+ cat /sys/devices/lm0/mode
+
+ To power down the USB:
+ echo 0 > /sys/devices/lm0/buspower
+ */
+
+#include "dwc_otg_os_dep.h"
+#include "dwc_os.h"
+#include "dwc_otg_driver.h"
+#include "dwc_otg_attr.h"
+#include "dwc_otg_core_if.h"
+#include "dwc_otg_pcd_if.h"
+#include "dwc_otg_hcd_if.h"
+
+/*
+ * MACROs for defining sysfs attribute
+ */
+#ifdef LM_INTERFACE
+
+#define DWC_OTG_DEVICE_ATTR_BITFIELD_SHOW(_otg_attr_name_,_string_) \
+static ssize_t _otg_attr_name_##_show (struct device *_dev, struct device_attribute *attr, char *buf) \
+{ \
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev); \
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);		\
+	uint32_t val; \
+	val = dwc_otg_get_##_otg_attr_name_ (otg_dev->core_if); \
+	return sprintf (buf, "%s = 0x%x\n", _string_, val); \
+}
+#define DWC_OTG_DEVICE_ATTR_BITFIELD_STORE(_otg_attr_name_,_string_) \
+static ssize_t _otg_attr_name_##_store (struct device *_dev, struct device_attribute *attr, \
+					const char *buf, size_t count) \
+{ \
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev); \
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev); \
+	uint32_t set = simple_strtoul(buf, NULL, 16); \
+	dwc_otg_set_##_otg_attr_name_(otg_dev->core_if, set);\
+	return count; \
+}
+
+#elif defined(PCI_INTERFACE)
+
+#define DWC_OTG_DEVICE_ATTR_BITFIELD_SHOW(_otg_attr_name_,_string_) \
+static ssize_t _otg_attr_name_##_show (struct device *_dev, struct device_attribute *attr, char *buf) \
+{ \
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);	\
+	uint32_t val; \
+	val = dwc_otg_get_##_otg_attr_name_ (otg_dev->core_if); \
+	return sprintf (buf, "%s = 0x%x\n", _string_, val); \
+}
+#define DWC_OTG_DEVICE_ATTR_BITFIELD_STORE(_otg_attr_name_,_string_) \
+static ssize_t _otg_attr_name_##_store (struct device *_dev, struct device_attribute *attr, \
+					const char *buf, size_t count) \
+{ \
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);  \
+	uint32_t set = simple_strtoul(buf, NULL, 16); \
+	dwc_otg_set_##_otg_attr_name_(otg_dev->core_if, set);\
+	return count; \
+}
+
+#endif
+
+/*
+ * MACROs for defining sysfs attribute for 32-bit registers
+ */
+#ifdef LM_INTERFACE
+#define DWC_OTG_DEVICE_ATTR_REG_SHOW(_otg_attr_name_,_string_) \
+static ssize_t _otg_attr_name_##_show (struct device *_dev, struct device_attribute *attr, char *buf) \
+{ \
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev); \
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev); \
+	uint32_t val; \
+	val = dwc_otg_get_##_otg_attr_name_ (otg_dev->core_if); \
+	return sprintf (buf, "%s = 0x%08x\n", _string_, val); \
+}
+#define DWC_OTG_DEVICE_ATTR_REG_STORE(_otg_attr_name_,_string_) \
+static ssize_t _otg_attr_name_##_store (struct device *_dev, struct device_attribute *attr, \
+					const char *buf, size_t count) \
+{ \
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev); \
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev); \
+	uint32_t val = simple_strtoul(buf, NULL, 16); \
+	dwc_otg_set_##_otg_attr_name_ (otg_dev->core_if, val); \
+	return count; \
+}
+#elif defined(PCI_INTERFACE)
+#define DWC_OTG_DEVICE_ATTR_REG_SHOW(_otg_attr_name_,_string_) \
+static ssize_t _otg_attr_name_##_show (struct device *_dev, struct device_attribute *attr, char *buf) \
+{ \
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);  \
+	uint32_t val; \
+	val = dwc_otg_get_##_otg_attr_name_ (otg_dev->core_if); \
+	return sprintf (buf, "%s = 0x%08x\n", _string_, val); \
+}
+#define DWC_OTG_DEVICE_ATTR_REG_STORE(_otg_attr_name_,_string_) \
+static ssize_t _otg_attr_name_##_store (struct device *_dev, struct device_attribute *attr, \
+					const char *buf, size_t count) \
+{ \
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);  \
+	uint32_t val = simple_strtoul(buf, NULL, 16); \
+	dwc_otg_set_##_otg_attr_name_ (otg_dev->core_if, val); \
+	return count; \
+}
+
+#endif
+
+#define DWC_OTG_DEVICE_ATTR_BITFIELD_RW(_otg_attr_name_,_string_) \
+DWC_OTG_DEVICE_ATTR_BITFIELD_SHOW(_otg_attr_name_,_string_) \
+DWC_OTG_DEVICE_ATTR_BITFIELD_STORE(_otg_attr_name_,_string_) \
+DEVICE_ATTR(_otg_attr_name_,0644,_otg_attr_name_##_show,_otg_attr_name_##_store);
+
+#define DWC_OTG_DEVICE_ATTR_BITFIELD_RO(_otg_attr_name_,_string_) \
+DWC_OTG_DEVICE_ATTR_BITFIELD_SHOW(_otg_attr_name_,_string_) \
+DEVICE_ATTR(_otg_attr_name_,0444,_otg_attr_name_##_show,NULL);
+
+#define DWC_OTG_DEVICE_ATTR_REG32_RW(_otg_attr_name_,_addr_,_string_) \
+DWC_OTG_DEVICE_ATTR_REG_SHOW(_otg_attr_name_,_string_) \
+DWC_OTG_DEVICE_ATTR_REG_STORE(_otg_attr_name_,_string_) \
+DEVICE_ATTR(_otg_attr_name_,0644,_otg_attr_name_##_show,_otg_attr_name_##_store);
+
+#define DWC_OTG_DEVICE_ATTR_REG32_RO(_otg_attr_name_,_addr_,_string_) \
+DWC_OTG_DEVICE_ATTR_REG_SHOW(_otg_attr_name_,_string_) \
+DEVICE_ATTR(_otg_attr_name_,0444,_otg_attr_name_##_show,NULL);
+
+/** @name Functions for Show/Store of Attributes */
+/**@{*/
+
+/**
+ * Show the register offset of the Register Access.
+ */
+static ssize_t regoffset_show(struct device *_dev,
+			      struct device_attribute *attr, char *buf)
+{
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+
+	return snprintf(buf, sizeof("0xFFFFFFFF\n") + 1, "0x%08x\n",
+			otg_dev->os_dep.reg_offset);
+}
+
+/**
+ * Set the register offset for the next Register Access 	Read/Write
+ */
+static ssize_t regoffset_store(struct device *_dev,
+			       struct device_attribute *attr,
+			       const char *buf, size_t count)
+{
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+
+	uint32_t offset = simple_strtoul(buf, NULL, 16);
+#ifdef LM_INTERFACE
+	if (offset < SZ_256K) {
+#elif  defined(PCI_INTERFACE)
+	if (offset < 0x00040000) {
+#endif
+		otg_dev->os_dep.reg_offset = offset;
+	} else {
+		dev_err(_dev, "invalid offset\n");
+	}
+
+	return count;
+}
+
+DEVICE_ATTR(regoffset, S_IRUGO | S_IWUSR, regoffset_show, regoffset_store);
+
+/**
+ * Show the value of the register at the offset in the reg_offset
+ * attribute.
+ */
+static ssize_t regvalue_show(struct device *_dev,
+			     struct device_attribute *attr, char *buf)
+{
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+
+	uint32_t val;
+	volatile uint32_t *addr;
+
+	if (otg_dev->os_dep.reg_offset != 0xFFFFFFFF && 0 != otg_dev->os_dep.base) {
+		/* Calculate the address */
+		addr = (uint32_t *) (otg_dev->os_dep.reg_offset +
+				     (uint8_t *) otg_dev->os_dep.base);
+		val = DWC_READ_REG32(addr);
+		return snprintf(buf,
+				sizeof("Reg@0xFFFFFFFF = 0xFFFFFFFF\n") + 1,
+				"Reg@0x%06x = 0x%08x\n", otg_dev->os_dep.reg_offset,
+				val);
+	} else {
+		dev_err(_dev, "Invalid offset (0x%0x)\n", otg_dev->os_dep.reg_offset);
+		return sprintf(buf, "invalid offset\n");
+	}
+}
+
+/**
+ * Store the value in the register at the offset in the reg_offset
+ * attribute.
+ *
+ */
+static ssize_t regvalue_store(struct device *_dev,
+			      struct device_attribute *attr,
+			      const char *buf, size_t count)
+{
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+
+	volatile uint32_t *addr;
+	uint32_t val = simple_strtoul(buf, NULL, 16);
+	//dev_dbg(_dev, "Offset=0x%08x Val=0x%08x\n", otg_dev->reg_offset, val);
+	if (otg_dev->os_dep.reg_offset != 0xFFFFFFFF && 0 != otg_dev->os_dep.base) {
+		/* Calculate the address */
+		addr = (uint32_t *) (otg_dev->os_dep.reg_offset +
+				     (uint8_t *) otg_dev->os_dep.base);
+		DWC_WRITE_REG32(addr, val);
+	} else {
+		dev_err(_dev, "Invalid Register Offset (0x%08x)\n",
+			otg_dev->os_dep.reg_offset);
+	}
+	return count;
+}
+
+DEVICE_ATTR(regvalue, S_IRUGO | S_IWUSR, regvalue_show, regvalue_store);
+
+/*
+ * Attributes
+ */
+DWC_OTG_DEVICE_ATTR_BITFIELD_RO(mode, "Mode");
+DWC_OTG_DEVICE_ATTR_BITFIELD_RW(hnpcapable, "HNPCapable");
+DWC_OTG_DEVICE_ATTR_BITFIELD_RW(srpcapable, "SRPCapable");
+DWC_OTG_DEVICE_ATTR_BITFIELD_RW(hsic_connect, "HSIC Connect");
+DWC_OTG_DEVICE_ATTR_BITFIELD_RW(inv_sel_hsic, "Invert Select HSIC");
+
+//DWC_OTG_DEVICE_ATTR_BITFIELD_RW(buspower,&(otg_dev->core_if->core_global_regs->gotgctl),(1<<8),8,"Mode");
+//DWC_OTG_DEVICE_ATTR_BITFIELD_RW(bussuspend,&(otg_dev->core_if->core_global_regs->gotgctl),(1<<8),8,"Mode");
+DWC_OTG_DEVICE_ATTR_BITFIELD_RO(busconnected, "Bus Connected");
+
+DWC_OTG_DEVICE_ATTR_REG32_RW(gotgctl, 0, "GOTGCTL");
+DWC_OTG_DEVICE_ATTR_REG32_RW(gusbcfg,
+			     &(otg_dev->core_if->core_global_regs->gusbcfg),
+			     "GUSBCFG");
+DWC_OTG_DEVICE_ATTR_REG32_RW(grxfsiz,
+			     &(otg_dev->core_if->core_global_regs->grxfsiz),
+			     "GRXFSIZ");
+DWC_OTG_DEVICE_ATTR_REG32_RW(gnptxfsiz,
+			     &(otg_dev->core_if->core_global_regs->gnptxfsiz),
+			     "GNPTXFSIZ");
+DWC_OTG_DEVICE_ATTR_REG32_RW(gpvndctl,
+			     &(otg_dev->core_if->core_global_regs->gpvndctl),
+			     "GPVNDCTL");
+DWC_OTG_DEVICE_ATTR_REG32_RW(ggpio,
+			     &(otg_dev->core_if->core_global_regs->ggpio),
+			     "GGPIO");
+DWC_OTG_DEVICE_ATTR_REG32_RW(guid, &(otg_dev->core_if->core_global_regs->guid),
+			     "GUID");
+DWC_OTG_DEVICE_ATTR_REG32_RO(gsnpsid,
+			     &(otg_dev->core_if->core_global_regs->gsnpsid),
+			     "GSNPSID");
+DWC_OTG_DEVICE_ATTR_BITFIELD_RW(devspeed, "Device Speed");
+DWC_OTG_DEVICE_ATTR_BITFIELD_RO(enumspeed, "Device Enumeration Speed");
+
+DWC_OTG_DEVICE_ATTR_REG32_RO(hptxfsiz,
+			     &(otg_dev->core_if->core_global_regs->hptxfsiz),
+			     "HPTXFSIZ");
+DWC_OTG_DEVICE_ATTR_REG32_RW(hprt0, otg_dev->core_if->host_if->hprt0, "HPRT0");
+
+/**
+ * @todo Add code to initiate the HNP.
+ */
+/**
+ * Show the HNP status bit
+ */
+static ssize_t hnp_show(struct device *_dev,
+			struct device_attribute *attr, char *buf)
+{
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+	return sprintf(buf, "HstNegScs = 0x%x\n",
+		       dwc_otg_get_hnpstatus(otg_dev->core_if));
+}
+
+/**
+ * Set the HNP Request bit
+ */
+static ssize_t hnp_store(struct device *_dev,
+			 struct device_attribute *attr,
+			 const char *buf, size_t count)
+{
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+	uint32_t in = simple_strtoul(buf, NULL, 16);
+	dwc_otg_set_hnpreq(otg_dev->core_if, in);
+	return count;
+}
+
+DEVICE_ATTR(hnp, 0644, hnp_show, hnp_store);
+
+/**
+ * @todo Add code to initiate the SRP.
+ */
+/**
+ * Show the SRP status bit
+ */
+static ssize_t srp_show(struct device *_dev,
+			struct device_attribute *attr, char *buf)
+{
+#ifndef DWC_HOST_ONLY
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+	return sprintf(buf, "SesReqScs = 0x%x\n",
+		       dwc_otg_get_srpstatus(otg_dev->core_if));
+#else
+	return sprintf(buf, "Host Only Mode!\n");
+#endif
+}
+
+/**
+ * Set the SRP Request bit
+ */
+static ssize_t srp_store(struct device *_dev,
+			 struct device_attribute *attr,
+			 const char *buf, size_t count)
+{
+#ifndef DWC_HOST_ONLY
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+	dwc_otg_pcd_initiate_srp(otg_dev->pcd);
+#endif
+	return count;
+}
+
+DEVICE_ATTR(srp, 0644, srp_show, srp_store);
+
+/**
+ * @todo Need to do more for power on/off?
+ */
+/**
+ * Show the Bus Power status
+ */
+static ssize_t buspower_show(struct device *_dev,
+			     struct device_attribute *attr, char *buf)
+{
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+	return sprintf(buf, "Bus Power = 0x%x\n",
+		       dwc_otg_get_prtpower(otg_dev->core_if));
+}
+
+/**
+ * Set the Bus Power status
+ */
+static ssize_t buspower_store(struct device *_dev,
+			      struct device_attribute *attr,
+			      const char *buf, size_t count)
+{
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+	uint32_t on = simple_strtoul(buf, NULL, 16);
+	dwc_otg_set_prtpower(otg_dev->core_if, on);
+	return count;
+}
+
+DEVICE_ATTR(buspower, 0644, buspower_show, buspower_store);
+
+/**
+ * @todo Need to do more for suspend?
+ */
+/**
+ * Show the Bus Suspend status
+ */
+static ssize_t bussuspend_show(struct device *_dev,
+			       struct device_attribute *attr, char *buf)
+{
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+
+	return sprintf(buf, "Bus Suspend = 0x%x\n",
+		       dwc_otg_get_prtsuspend(otg_dev->core_if));
+}
+
+/**
+ * Set the Bus Suspend status
+ */
+static ssize_t bussuspend_store(struct device *_dev,
+				struct device_attribute *attr,
+				const char *buf, size_t count)
+{
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+
+	uint32_t in = simple_strtoul(buf, NULL, 16);
+	dwc_otg_set_prtsuspend(otg_dev->core_if, in);
+	return count;
+}
+
+DEVICE_ATTR(bussuspend, 0644, bussuspend_show, bussuspend_store);
+
+/**
+ * Show the Mode Change Ready Timer status
+ */
+static ssize_t mode_ch_tim_en_show(struct device *_dev,
+				   struct device_attribute *attr, char *buf)
+{
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+
+	return sprintf(buf, "Mode Change Ready Timer Enable = 0x%x\n",
+		       dwc_otg_get_mode_ch_tim(otg_dev->core_if));
+}
+
+/**
+ * Set the Mode Change Ready Timer status
+ */
+static ssize_t mode_ch_tim_en_store(struct device *_dev,
+				    struct device_attribute *attr,
+				    const char *buf, size_t count)
+{
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+
+	uint32_t in = simple_strtoul(buf, NULL, 16);
+	dwc_otg_set_mode_ch_tim(otg_dev->core_if, in);
+	return count;
+}
+
+DEVICE_ATTR(mode_ch_tim_en, 0644, mode_ch_tim_en_show, mode_ch_tim_en_store);
+
+/**
+ * Show the value of HFIR Frame Interval bitfield
+ */
+static ssize_t fr_interval_show(struct device *_dev,
+				struct device_attribute *attr, char *buf)
+{
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+
+	return sprintf(buf, "Frame Interval = 0x%x\n",
+		       dwc_otg_get_fr_interval(otg_dev->core_if));
+}
+
+/**
+ * Set the HFIR Frame Interval value
+ */
+static ssize_t fr_interval_store(struct device *_dev,
+				 struct device_attribute *attr,
+				 const char *buf, size_t count)
+{
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+
+	uint32_t in = simple_strtoul(buf, NULL, 10);
+	dwc_otg_set_fr_interval(otg_dev->core_if, in);
+	return count;
+}
+
+DEVICE_ATTR(fr_interval, 0644, fr_interval_show, fr_interval_store);
+
+/**
+ * Show the status of Remote Wakeup.
+ */
+static ssize_t remote_wakeup_show(struct device *_dev,
+				  struct device_attribute *attr, char *buf)
+{
+#ifndef DWC_HOST_ONLY
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+
+	return sprintf(buf,
+		       "Remote Wakeup Sig = %d Enabled = %d LPM Remote Wakeup = %d\n",
+		       dwc_otg_get_remotewakesig(otg_dev->core_if),
+		       dwc_otg_pcd_get_rmwkup_enable(otg_dev->pcd),
+		       dwc_otg_get_lpm_remotewakeenabled(otg_dev->core_if));
+#else
+	return sprintf(buf, "Host Only Mode!\n");
+#endif /* DWC_HOST_ONLY */
+}
+
+/**
+ * Initiate a remote wakeup of the host.  The Device control register
+ * Remote Wakeup Signal bit is written if the PCD Remote wakeup enable
+ * flag is set.
+ *
+ */
+static ssize_t remote_wakeup_store(struct device *_dev,
+				   struct device_attribute *attr,
+				   const char *buf, size_t count)
+{
+#ifndef DWC_HOST_ONLY
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+
+	uint32_t val = simple_strtoul(buf, NULL, 16);
+
+	if (val & 1) {
+		dwc_otg_pcd_remote_wakeup(otg_dev->pcd, 1);
+	} else {
+		dwc_otg_pcd_remote_wakeup(otg_dev->pcd, 0);
+	}
+#endif /* DWC_HOST_ONLY */
+	return count;
+}
+
+DEVICE_ATTR(remote_wakeup, S_IRUGO | S_IWUSR, remote_wakeup_show,
+	    remote_wakeup_store);
+
+/**
+ * Show the whether core is hibernated or not. 					
+ */
+static ssize_t rem_wakeup_pwrdn_show(struct device *_dev,
+				     struct device_attribute *attr, char *buf)
+{
+#ifndef DWC_HOST_ONLY
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+	if (dwc_otg_get_core_state(otg_dev->core_if)) {
+		DWC_PRINTF("Core is in hibernation\n");
+	} else {
+		DWC_PRINTF("Core is not in hibernation\n");
+	}
+#endif /* DWC_HOST_ONLY */
+	return 0;
+}
+
+extern int dwc_otg_device_hibernation_restore(dwc_otg_core_if_t * core_if,
+					      int rem_wakeup, int reset);
+
+/**
+ * Initiate a remote wakeup of the device to exit from hibernation.
+ */
+static ssize_t rem_wakeup_pwrdn_store(struct device *_dev,
+				      struct device_attribute *attr,
+				      const char *buf, size_t count)
+{
+#ifndef DWC_HOST_ONLY
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+	dwc_otg_device_hibernation_restore(otg_dev->core_if, 1, 0);
+#endif
+	return count;
+}
+
+DEVICE_ATTR(rem_wakeup_pwrdn, S_IRUGO | S_IWUSR, rem_wakeup_pwrdn_show,
+	    rem_wakeup_pwrdn_store);
+
+static ssize_t disconnect_us(struct device *_dev,
+			     struct device_attribute *attr,
+			     const char *buf, size_t count)
+{
+
+#ifndef DWC_HOST_ONLY
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+	uint32_t val = simple_strtoul(buf, NULL, 16);
+	DWC_PRINTF("The Passed value is %04x\n", val);
+
+	dwc_otg_pcd_disconnect_us(otg_dev->pcd, 50);
+
+#endif /* DWC_HOST_ONLY */
+	return count;
+}
+
+DEVICE_ATTR(disconnect_us, S_IWUSR, 0, disconnect_us);
+
+/**
+ * Dump global registers and either host or device registers (depending on the
+ * current mode of the core).
+ */
+static ssize_t regdump_show(struct device *_dev,
+			    struct device_attribute *attr, char *buf)
+{
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+
+	dwc_otg_dump_global_registers(otg_dev->core_if);
+	if (dwc_otg_is_host_mode(otg_dev->core_if)) {
+		dwc_otg_dump_host_registers(otg_dev->core_if);
+	} else {
+		dwc_otg_dump_dev_registers(otg_dev->core_if);
+
+	}
+	return sprintf(buf, "Register Dump\n");
+}
+
+DEVICE_ATTR(regdump, S_IRUGO | S_IWUSR, regdump_show, 0);
+
+/**
+ * Dump global registers and either host or device registers (depending on the
+ * current mode of the core).
+ */
+static ssize_t spramdump_show(struct device *_dev,
+			      struct device_attribute *attr, char *buf)
+{
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+
+	dwc_otg_dump_spram(otg_dev->core_if);
+
+	return sprintf(buf, "SPRAM Dump\n");
+}
+
+DEVICE_ATTR(spramdump, S_IRUGO | S_IWUSR, spramdump_show, 0);
+
+/**
+ * Dump the current hcd state.
+ */
+static ssize_t hcddump_show(struct device *_dev,
+			    struct device_attribute *attr, char *buf)
+{
+#ifndef DWC_DEVICE_ONLY
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+
+	dwc_otg_hcd_dump_state(otg_dev->hcd);
+#endif /* DWC_DEVICE_ONLY */
+	return sprintf(buf, "HCD Dump\n");
+}
+
+DEVICE_ATTR(hcddump, S_IRUGO | S_IWUSR, hcddump_show, 0);
+
+/**
+ * Dump the average frame remaining at SOF. This can be used to
+ * determine average interrupt latency. Frame remaining is also shown for
+ * start transfer and two additional sample points.
+ */
+static ssize_t hcd_frrem_show(struct device *_dev,
+			      struct device_attribute *attr, char *buf)
+{
+#ifndef DWC_DEVICE_ONLY
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+
+	dwc_otg_hcd_dump_frrem(otg_dev->hcd);
+#endif /* DWC_DEVICE_ONLY */
+	return sprintf(buf, "HCD Dump Frame Remaining\n");
+}
+
+DEVICE_ATTR(hcd_frrem, S_IRUGO | S_IWUSR, hcd_frrem_show, 0);
+
+/**
+ * Displays the time required to read the GNPTXFSIZ register many times (the
+ * output shows the number of times the register is read).
+ */
+#define RW_REG_COUNT 10000000
+#define MSEC_PER_JIFFIE 1000/HZ
+static ssize_t rd_reg_test_show(struct device *_dev,
+				struct device_attribute *attr, char *buf)
+{
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+
+	int i;
+	int time;
+	int start_jiffies;
+
+	printk("HZ %d, MSEC_PER_JIFFIE %d, loops_per_jiffy %lu\n",
+	       HZ, MSEC_PER_JIFFIE, loops_per_jiffy);
+	start_jiffies = jiffies;
+	for (i = 0; i < RW_REG_COUNT; i++) {
+		dwc_otg_get_gnptxfsiz(otg_dev->core_if);
+	}
+	time = jiffies - start_jiffies;
+	return sprintf(buf,
+		       "Time to read GNPTXFSIZ reg %d times: %d msecs (%d jiffies)\n",
+		       RW_REG_COUNT, time * MSEC_PER_JIFFIE, time);
+}
+
+DEVICE_ATTR(rd_reg_test, S_IRUGO | S_IWUSR, rd_reg_test_show, 0);
+
+/**
+ * Displays the time required to write the GNPTXFSIZ register many times (the
+ * output shows the number of times the register is written).
+ */
+static ssize_t wr_reg_test_show(struct device *_dev,
+				struct device_attribute *attr, char *buf)
+{
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+
+	uint32_t reg_val;
+	int i;
+	int time;
+	int start_jiffies;
+
+	printk("HZ %d, MSEC_PER_JIFFIE %d, loops_per_jiffy %lu\n",
+	       HZ, MSEC_PER_JIFFIE, loops_per_jiffy);
+	reg_val = dwc_otg_get_gnptxfsiz(otg_dev->core_if);
+	start_jiffies = jiffies;
+	for (i = 0; i < RW_REG_COUNT; i++) {
+		dwc_otg_set_gnptxfsiz(otg_dev->core_if, reg_val);
+	}
+	time = jiffies - start_jiffies;
+	return sprintf(buf,
+		       "Time to write GNPTXFSIZ reg %d times: %d msecs (%d jiffies)\n",
+		       RW_REG_COUNT, time * MSEC_PER_JIFFIE, time);
+}
+
+DEVICE_ATTR(wr_reg_test, S_IRUGO | S_IWUSR, wr_reg_test_show, 0);
+
+#ifdef CONFIG_USB_DWC_OTG_LPM
+
+/**
+* Show the lpm_response attribute.
+*/
+static ssize_t lpmresp_show(struct device *_dev,
+			    struct device_attribute *attr, char *buf)
+{
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+
+	if (!dwc_otg_get_param_lpm_enable(otg_dev->core_if))
+		return sprintf(buf, "** LPM is DISABLED **\n");
+
+	if (!dwc_otg_is_device_mode(otg_dev->core_if)) {
+		return sprintf(buf, "** Current mode is not device mode\n");
+	}
+	return sprintf(buf, "lpm_response = %d\n",
+		       dwc_otg_get_lpmresponse(otg_dev->core_if));
+}
+
+/**
+* Store the lpm_response attribute.
+*/
+static ssize_t lpmresp_store(struct device *_dev,
+			     struct device_attribute *attr,
+			     const char *buf, size_t count)
+{
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+
+	uint32_t val = simple_strtoul(buf, NULL, 16);
+
+	if (!dwc_otg_get_param_lpm_enable(otg_dev->core_if)) {
+		return 0;
+	}
+
+	if (!dwc_otg_is_device_mode(otg_dev->core_if)) {
+		return 0;
+	}
+
+	dwc_otg_set_lpmresponse(otg_dev->core_if, val);
+	return count;
+}
+
+DEVICE_ATTR(lpm_response, S_IRUGO | S_IWUSR, lpmresp_show, lpmresp_store);
+
+/**
+* Show the sleep_status attribute.
+*/
+static ssize_t sleepstatus_show(struct device *_dev,
+				struct device_attribute *attr, char *buf)
+{
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+
+	return sprintf(buf, "Sleep Status = %d\n",
+		       dwc_otg_get_lpm_portsleepstatus(otg_dev->core_if));
+}
+
+/**
+ * Store the sleep_status attribure.
+ */
+static ssize_t sleepstatus_store(struct device *_dev,
+				 struct device_attribute *attr,
+				 const char *buf, size_t count)
+{
+#ifdef LM_INTERFACE
+	struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
+#endif
+
+	dwc_otg_core_if_t *core_if = otg_dev->core_if;
+
+	if (dwc_otg_get_lpm_portsleepstatus(otg_dev->core_if)) {
+		if (dwc_otg_is_host_mode(core_if)) {
+
+			DWC_PRINTF("Host initiated resume\n");
+			dwc_otg_set_prtresume(otg_dev->core_if, 1);
+		}
+	}
+
+	return count;
+}
+
+DEVICE_ATTR(sleep_status, S_IRUGO | S_IWUSR, sleepstatus_show,
+	    sleepstatus_store);
+
+#endif /* CONFIG_USB_DWC_OTG_LPM_ENABLE */
+
+/**@}*/
+
+/**
+ * Create the device files
+ */
+void dwc_otg_attr_create(
+#ifdef LM_INTERFACE
+				struct lm_device *dev
+#elif  defined(PCI_INTERFACE)
+				struct pci_dev *dev
+#endif
+    )
+{
+	int error;
+
+	error = device_create_file(&dev->dev, &dev_attr_regoffset);
+	error = device_create_file(&dev->dev, &dev_attr_regvalue);
+	error = device_create_file(&dev->dev, &dev_attr_mode);
+	error = device_create_file(&dev->dev, &dev_attr_hnpcapable);
+	error = device_create_file(&dev->dev, &dev_attr_srpcapable);
+	error = device_create_file(&dev->dev, &dev_attr_hsic_connect);
+	error = device_create_file(&dev->dev, &dev_attr_inv_sel_hsic);
+	error = device_create_file(&dev->dev, &dev_attr_hnp);
+	error = device_create_file(&dev->dev, &dev_attr_srp);
+	error = device_create_file(&dev->dev, &dev_attr_buspower);
+	error = device_create_file(&dev->dev, &dev_attr_bussuspend);
+	error = device_create_file(&dev->dev, &dev_attr_mode_ch_tim_en);
+	error = device_create_file(&dev->dev, &dev_attr_fr_interval);
+	error = device_create_file(&dev->dev, &dev_attr_busconnected);
+	error = device_create_file(&dev->dev, &dev_attr_gotgctl);
+	error = device_create_file(&dev->dev, &dev_attr_gusbcfg);
+	error = device_create_file(&dev->dev, &dev_attr_grxfsiz);
+	error = device_create_file(&dev->dev, &dev_attr_gnptxfsiz);
+	error = device_create_file(&dev->dev, &dev_attr_gpvndctl);
+	error = device_create_file(&dev->dev, &dev_attr_ggpio);
+	error = device_create_file(&dev->dev, &dev_attr_guid);
+	error = device_create_file(&dev->dev, &dev_attr_gsnpsid);
+	error = device_create_file(&dev->dev, &dev_attr_devspeed);
+	error = device_create_file(&dev->dev, &dev_attr_enumspeed);
+	error = device_create_file(&dev->dev, &dev_attr_hptxfsiz);
+	error = device_create_file(&dev->dev, &dev_attr_hprt0);
+	error = device_create_file(&dev->dev, &dev_attr_remote_wakeup);
+	error = device_create_file(&dev->dev, &dev_attr_rem_wakeup_pwrdn);
+	error = device_create_file(&dev->dev, &dev_attr_disconnect_us);
+	error = device_create_file(&dev->dev, &dev_attr_regdump);
+	error = device_create_file(&dev->dev, &dev_attr_spramdump);
+	error = device_create_file(&dev->dev, &dev_attr_hcddump);
+	error = device_create_file(&dev->dev, &dev_attr_hcd_frrem);
+	error = device_create_file(&dev->dev, &dev_attr_rd_reg_test);
+	error = device_create_file(&dev->dev, &dev_attr_wr_reg_test);
+#ifdef CONFIG_USB_DWC_OTG_LPM
+	error = device_create_file(&dev->dev, &dev_attr_lpm_response);
+	error = device_create_file(&dev->dev, &dev_attr_sleep_status);
+#endif
+}
+
+/**
+ * Remove the device files
+ */
+void dwc_otg_attr_remove(
+#ifdef LM_INTERFACE
+				struct lm_device *dev
+#elif  defined(PCI_INTERFACE)
+				struct pci_dev *dev
+#endif
+    )
+{
+	device_remove_file(&dev->dev, &dev_attr_regoffset);
+	device_remove_file(&dev->dev, &dev_attr_regvalue);
+	device_remove_file(&dev->dev, &dev_attr_mode);
+	device_remove_file(&dev->dev, &dev_attr_hnpcapable);
+	device_remove_file(&dev->dev, &dev_attr_srpcapable);
+	device_remove_file(&dev->dev, &dev_attr_hsic_connect);
+	device_remove_file(&dev->dev, &dev_attr_inv_sel_hsic);
+	device_remove_file(&dev->dev, &dev_attr_hnp);
+	device_remove_file(&dev->dev, &dev_attr_srp);
+	device_remove_file(&dev->dev, &dev_attr_buspower);
+	device_remove_file(&dev->dev, &dev_attr_bussuspend);
+	device_remove_file(&dev->dev, &dev_attr_mode_ch_tim_en);
+	device_remove_file(&dev->dev, &dev_attr_fr_interval);
+	device_remove_file(&dev->dev, &dev_attr_busconnected);
+	device_remove_file(&dev->dev, &dev_attr_gotgctl);
+	device_remove_file(&dev->dev, &dev_attr_gusbcfg);
+	device_remove_file(&dev->dev, &dev_attr_grxfsiz);
+	device_remove_file(&dev->dev, &dev_attr_gnptxfsiz);
+	device_remove_file(&dev->dev, &dev_attr_gpvndctl);
+	device_remove_file(&dev->dev, &dev_attr_ggpio);
+	device_remove_file(&dev->dev, &dev_attr_guid);
+	device_remove_file(&dev->dev, &dev_attr_gsnpsid);
+	device_remove_file(&dev->dev, &dev_attr_devspeed);
+	device_remove_file(&dev->dev, &dev_attr_enumspeed);
+	device_remove_file(&dev->dev, &dev_attr_hptxfsiz);
+	device_remove_file(&dev->dev, &dev_attr_hprt0);
+	device_remove_file(&dev->dev, &dev_attr_remote_wakeup);
+	device_remove_file(&dev->dev, &dev_attr_rem_wakeup_pwrdn);
+	device_remove_file(&dev->dev, &dev_attr_disconnect_us);
+	device_remove_file(&dev->dev, &dev_attr_regdump);
+	device_remove_file(&dev->dev, &dev_attr_spramdump);
+	device_remove_file(&dev->dev, &dev_attr_hcddump);
+	device_remove_file(&dev->dev, &dev_attr_hcd_frrem);
+	device_remove_file(&dev->dev, &dev_attr_rd_reg_test);
+	device_remove_file(&dev->dev, &dev_attr_wr_reg_test);
+#ifdef CONFIG_USB_DWC_OTG_LPM
+	device_remove_file(&dev->dev, &dev_attr_lpm_response);
+	device_remove_file(&dev->dev, &dev_attr_sleep_status);
+#endif
+}
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_attr.h linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_attr.h
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_attr.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_attr.h	2017-09-23 03:42:50.194674526 +0800
@@ -0,0 +1,85 @@
+/* ==========================================================================
+ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_attr.h $
+ * $Revision: #13 $
+ * $Date: 2010/06/21 $
+ * $Change: 1532021 $
+ *
+ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+ * otherwise expressly agreed to in writing between Synopsys and you.
+ * 
+ * The Software IS NOT an item of Licensed Software or Licensed Product under
+ * any End User Software License Agreement or Agreement for Licensed Product
+ * with Synopsys or any supplement thereto. You are permitted to use and
+ * redistribute this Software in source and binary forms, with or without
+ * modification, provided that redistributions of source code must retain this
+ * notice. You may not view, use, disclose, copy or distribute this file or
+ * any information contained herein except pursuant to this license grant from
+ * Synopsys. If you do not agree with this notice, including the disclaimer
+ * below, then you are not authorized to use the Software.
+ * 
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================== */
+
+#if !defined(__DWC_OTG_ATTR_H__)
+#define __DWC_OTG_ATTR_H__
+
+/** @file
+ * This file contains the interface to the Linux device attributes.
+ */
+extern struct device_attribute dev_attr_regoffset;
+extern struct device_attribute dev_attr_regvalue;
+
+extern struct device_attribute dev_attr_mode;
+extern struct device_attribute dev_attr_hnpcapable;
+extern struct device_attribute dev_attr_srpcapable;
+extern struct device_attribute dev_attr_hnp;
+extern struct device_attribute dev_attr_srp;
+extern struct device_attribute dev_attr_buspower;
+extern struct device_attribute dev_attr_bussuspend;
+extern struct device_attribute dev_attr_mode_ch_tim_en;
+extern struct device_attribute dev_attr_fr_interval;
+extern struct device_attribute dev_attr_busconnected;
+extern struct device_attribute dev_attr_gotgctl;
+extern struct device_attribute dev_attr_gusbcfg;
+extern struct device_attribute dev_attr_grxfsiz;
+extern struct device_attribute dev_attr_gnptxfsiz;
+extern struct device_attribute dev_attr_gpvndctl;
+extern struct device_attribute dev_attr_ggpio;
+extern struct device_attribute dev_attr_guid;
+extern struct device_attribute dev_attr_gsnpsid;
+extern struct device_attribute dev_attr_devspeed;
+extern struct device_attribute dev_attr_enumspeed;
+extern struct device_attribute dev_attr_hptxfsiz;
+extern struct device_attribute dev_attr_hprt0;
+#ifdef CONFIG_USB_DWC_OTG_LPM
+extern struct device_attribute dev_attr_lpm_response;
+extern struct device_attribute devi_attr_sleep_status;
+#endif
+
+void dwc_otg_attr_create(
+#if defined(LM_INTERFACE)
+				struct lm_device *dev
+#elif defined(PCI_INTERFACE)
+				struct pci_dev *dev
+#endif
+    );
+
+void dwc_otg_attr_remove(
+#if defined(LM_INTERFACE)
+				struct lm_device *dev
+#elif defined(PCI_INTERFACE)
+				struct pci_dev *dev
+#endif
+    );
+#endif
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_cfi.c linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_cfi.c
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_cfi.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_cfi.c	2017-09-23 03:42:50.198674513 +0800
@@ -0,0 +1,1876 @@
+/* ==========================================================================
+ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+ * otherwise expressly agreed to in writing between Synopsys and you.
+ * 
+ * The Software IS NOT an item of Licensed Software or Licensed Product under
+ * any End User Software License Agreement or Agreement for Licensed Product
+ * with Synopsys or any supplement thereto. You are permitted to use and
+ * redistribute this Software in source and binary forms, with or without
+ * modification, provided that redistributions of source code must retain this
+ * notice. You may not view, use, disclose, copy or distribute this file or
+ * any information contained herein except pursuant to this license grant from
+ * Synopsys. If you do not agree with this notice, including the disclaimer
+ * below, then you are not authorized to use the Software.
+ * 
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================== */
+
+/** @file 
+ *
+ * This file contains the most of the CFI(Core Feature Interface) 
+ * implementation for the OTG. 
+ */
+
+#ifdef DWC_UTE_CFI
+
+#include "dwc_otg_pcd.h"
+#include "dwc_otg_cfi.h"
+
+/** This definition should actually migrate to the Portability Library */
+#define DWC_CONSTANT_CPU_TO_LE16(x) (x)
+
+extern dwc_otg_pcd_ep_t *get_ep_by_addr(dwc_otg_pcd_t * pcd, u16 wIndex);
+
+static int cfi_core_features_buf(uint8_t * buf, uint16_t buflen);
+static int cfi_get_feature_value(uint8_t * buf, uint16_t buflen,
+				 struct dwc_otg_pcd *pcd,
+				 struct cfi_usb_ctrlrequest *ctrl_req);
+static int cfi_set_feature_value(struct dwc_otg_pcd *pcd);
+static int cfi_ep_get_sg_val(uint8_t * buf, struct dwc_otg_pcd *pcd,
+			     struct cfi_usb_ctrlrequest *req);
+static int cfi_ep_get_concat_val(uint8_t * buf, struct dwc_otg_pcd *pcd,
+				 struct cfi_usb_ctrlrequest *req);
+static int cfi_ep_get_align_val(uint8_t * buf, struct dwc_otg_pcd *pcd,
+				struct cfi_usb_ctrlrequest *req);
+static int cfi_preproc_reset(struct dwc_otg_pcd *pcd,
+			     struct cfi_usb_ctrlrequest *req);
+static void cfi_free_ep_bs_dyn_data(cfi_ep_t * cfiep);
+
+static uint16_t get_dfifo_size(dwc_otg_core_if_t * core_if);
+static int32_t get_rxfifo_size(dwc_otg_core_if_t * core_if, uint16_t wValue);
+static int32_t get_txfifo_size(struct dwc_otg_pcd *pcd, uint16_t wValue);
+
+static uint8_t resize_fifos(dwc_otg_core_if_t * core_if);
+
+/** This is the header of the all features descriptor */
+static cfi_all_features_header_t all_props_desc_header = {
+	.wVersion = DWC_CONSTANT_CPU_TO_LE16(0x100),
+	.wCoreID = DWC_CONSTANT_CPU_TO_LE16(CFI_CORE_ID_OTG),
+	.wNumFeatures = DWC_CONSTANT_CPU_TO_LE16(9),
+};
+
+/** This is an array of statically allocated feature descriptors */
+static cfi_feature_desc_header_t prop_descs[] = {
+
+	/* FT_ID_DMA_MODE */
+	{
+	 .wFeatureID = DWC_CONSTANT_CPU_TO_LE16(FT_ID_DMA_MODE),
+	 .bmAttributes = CFI_FEATURE_ATTR_RW,
+	 .wDataLength = DWC_CONSTANT_CPU_TO_LE16(1),
+	 },
+
+	/* FT_ID_DMA_BUFFER_SETUP */
+	{
+	 .wFeatureID = DWC_CONSTANT_CPU_TO_LE16(FT_ID_DMA_BUFFER_SETUP),
+	 .bmAttributes = CFI_FEATURE_ATTR_RW,
+	 .wDataLength = DWC_CONSTANT_CPU_TO_LE16(6),
+	 },
+
+	/* FT_ID_DMA_BUFF_ALIGN */
+	{
+	 .wFeatureID = DWC_CONSTANT_CPU_TO_LE16(FT_ID_DMA_BUFF_ALIGN),
+	 .bmAttributes = CFI_FEATURE_ATTR_RW,
+	 .wDataLength = DWC_CONSTANT_CPU_TO_LE16(2),
+	 },
+
+	/* FT_ID_DMA_CONCAT_SETUP */
+	{
+	 .wFeatureID = DWC_CONSTANT_CPU_TO_LE16(FT_ID_DMA_CONCAT_SETUP),
+	 .bmAttributes = CFI_FEATURE_ATTR_RW,
+	 //.wDataLength  = DWC_CONSTANT_CPU_TO_LE16(6),
+	 },
+
+	/* FT_ID_DMA_CIRCULAR */
+	{
+	 .wFeatureID = DWC_CONSTANT_CPU_TO_LE16(FT_ID_DMA_CIRCULAR),
+	 .bmAttributes = CFI_FEATURE_ATTR_RW,
+	 .wDataLength = DWC_CONSTANT_CPU_TO_LE16(6),
+	 },
+
+	/* FT_ID_THRESHOLD_SETUP */
+	{
+	 .wFeatureID = DWC_CONSTANT_CPU_TO_LE16(FT_ID_THRESHOLD_SETUP),
+	 .bmAttributes = CFI_FEATURE_ATTR_RW,
+	 .wDataLength = DWC_CONSTANT_CPU_TO_LE16(6),
+	 },
+
+	/* FT_ID_DFIFO_DEPTH */
+	{
+	 .wFeatureID = DWC_CONSTANT_CPU_TO_LE16(FT_ID_DFIFO_DEPTH),
+	 .bmAttributes = CFI_FEATURE_ATTR_RO,
+	 .wDataLength = DWC_CONSTANT_CPU_TO_LE16(2),
+	 },
+
+	/* FT_ID_TX_FIFO_DEPTH */
+	{
+	 .wFeatureID = DWC_CONSTANT_CPU_TO_LE16(FT_ID_TX_FIFO_DEPTH),
+	 .bmAttributes = CFI_FEATURE_ATTR_RW,
+	 .wDataLength = DWC_CONSTANT_CPU_TO_LE16(2),
+	 },
+
+	/* FT_ID_RX_FIFO_DEPTH */
+	{
+	 .wFeatureID = DWC_CONSTANT_CPU_TO_LE16(FT_ID_RX_FIFO_DEPTH),
+	 .bmAttributes = CFI_FEATURE_ATTR_RW,
+	 .wDataLength = DWC_CONSTANT_CPU_TO_LE16(2),
+	 }
+};
+
+/** The table of feature names */
+cfi_string_t prop_name_table[] = {
+	{FT_ID_DMA_MODE, "dma_mode"},
+	{FT_ID_DMA_BUFFER_SETUP, "buffer_setup"},
+	{FT_ID_DMA_BUFF_ALIGN, "buffer_align"},
+	{FT_ID_DMA_CONCAT_SETUP, "concat_setup"},
+	{FT_ID_DMA_CIRCULAR, "buffer_circular"},
+	{FT_ID_THRESHOLD_SETUP, "threshold_setup"},
+	{FT_ID_DFIFO_DEPTH, "dfifo_depth"},
+	{FT_ID_TX_FIFO_DEPTH, "txfifo_depth"},
+	{FT_ID_RX_FIFO_DEPTH, "rxfifo_depth"},
+	{}
+};
+
+/************************************************************************/
+
+/** 
+ * Returns the name of the feature by its ID 
+ * or NULL if no featute ID matches.
+ * 
+ */
+const uint8_t *get_prop_name(uint16_t prop_id, int *len)
+{
+	cfi_string_t *pstr;
+	*len = 0;
+
+	for (pstr = prop_name_table; pstr && pstr->s; pstr++) {
+		if (pstr->id == prop_id) {
+			*len = DWC_STRLEN(pstr->s);
+			return pstr->s;
+		}
+	}
+	return NULL;
+}
+
+/**
+ * This function handles all CFI specific control requests.
+ * 
+ * Return a negative value to stall the DCE.
+ */
+int cfi_setup(struct dwc_otg_pcd *pcd, struct cfi_usb_ctrlrequest *ctrl)
+{
+	int retval = 0;
+	dwc_otg_pcd_ep_t *ep = NULL;
+	cfiobject_t *cfi = pcd->cfi;
+	struct dwc_otg_core_if *coreif = GET_CORE_IF(pcd);
+	uint16_t wLen = DWC_LE16_TO_CPU(&ctrl->wLength);
+	uint16_t wValue = DWC_LE16_TO_CPU(&ctrl->wValue);
+	uint16_t wIndex = DWC_LE16_TO_CPU(&ctrl->wIndex);
+	uint32_t regaddr = 0;
+	uint32_t regval = 0;
+
+	/* Save this Control Request in the CFI object. 
+	 * The data field will be assigned in the data stage completion CB function.
+	 */
+	cfi->ctrl_req = *ctrl;
+	cfi->ctrl_req.data = NULL;
+
+	cfi->need_gadget_att = 0;
+	cfi->need_status_in_complete = 0;
+
+	switch (ctrl->bRequest) {
+	case VEN_CORE_GET_FEATURES:
+		retval = cfi_core_features_buf(cfi->buf_in.buf, CFI_IN_BUF_LEN);
+		if (retval >= 0) {
+			//dump_msg(cfi->buf_in.buf, retval);
+			ep = &pcd->ep0;
+
+			retval = min((uint16_t) retval, wLen);
+			/* Transfer this buffer to the host through the EP0-IN EP */
+			ep->dwc_ep.dma_addr = cfi->buf_in.addr;
+			ep->dwc_ep.start_xfer_buff = cfi->buf_in.buf;
+			ep->dwc_ep.xfer_buff = cfi->buf_in.buf;
+			ep->dwc_ep.xfer_len = retval;
+			ep->dwc_ep.xfer_count = 0;
+			ep->dwc_ep.sent_zlp = 0;
+			ep->dwc_ep.total_len = ep->dwc_ep.xfer_len;
+
+			pcd->ep0_pending = 1;
+			dwc_otg_ep0_start_transfer(coreif, &ep->dwc_ep);
+		}
+		retval = 0;
+		break;
+
+	case VEN_CORE_GET_FEATURE:
+		CFI_INFO("VEN_CORE_GET_FEATURE\n");
+		retval = cfi_get_feature_value(cfi->buf_in.buf, CFI_IN_BUF_LEN,
+					       pcd, ctrl);
+		if (retval >= 0) {
+			ep = &pcd->ep0;
+
+			retval = min((uint16_t) retval, wLen);
+			/* Transfer this buffer to the host through the EP0-IN EP */
+			ep->dwc_ep.dma_addr = cfi->buf_in.addr;
+			ep->dwc_ep.start_xfer_buff = cfi->buf_in.buf;
+			ep->dwc_ep.xfer_buff = cfi->buf_in.buf;
+			ep->dwc_ep.xfer_len = retval;
+			ep->dwc_ep.xfer_count = 0;
+			ep->dwc_ep.sent_zlp = 0;
+			ep->dwc_ep.total_len = ep->dwc_ep.xfer_len;
+
+			pcd->ep0_pending = 1;
+			dwc_otg_ep0_start_transfer(coreif, &ep->dwc_ep);
+		}
+		CFI_INFO("VEN_CORE_GET_FEATURE=%d\n", retval);
+		dump_msg(cfi->buf_in.buf, retval);
+		break;
+
+	case VEN_CORE_SET_FEATURE:
+		CFI_INFO("VEN_CORE_SET_FEATURE\n");
+		/* Set up an XFER to get the data stage of the control request,
+		 * which is the new value of the feature to be modified.
+		 */
+		ep = &pcd->ep0;
+		ep->dwc_ep.is_in = 0;
+		ep->dwc_ep.dma_addr = cfi->buf_out.addr;
+		ep->dwc_ep.start_xfer_buff = cfi->buf_out.buf;
+		ep->dwc_ep.xfer_buff = cfi->buf_out.buf;
+		ep->dwc_ep.xfer_len = wLen;
+		ep->dwc_ep.xfer_count = 0;
+		ep->dwc_ep.sent_zlp = 0;
+		ep->dwc_ep.total_len = ep->dwc_ep.xfer_len;
+
+		pcd->ep0_pending = 1;
+		/* Read the control write's data stage */
+		dwc_otg_ep0_start_transfer(coreif, &ep->dwc_ep);
+		retval = 0;
+		break;
+
+	case VEN_CORE_RESET_FEATURES:
+		CFI_INFO("VEN_CORE_RESET_FEATURES\n");
+		cfi->need_gadget_att = 1;
+		cfi->need_status_in_complete = 1;
+		retval = cfi_preproc_reset(pcd, ctrl);
+		CFI_INFO("VEN_CORE_RESET_FEATURES = (%d)\n", retval);
+		break;
+
+	case VEN_CORE_ACTIVATE_FEATURES:
+		CFI_INFO("VEN_CORE_ACTIVATE_FEATURES\n");
+		break;
+
+	case VEN_CORE_READ_REGISTER:
+		CFI_INFO("VEN_CORE_READ_REGISTER\n");
+		/* wValue optionally contains the HI WORD of the register offset and
+		 * wIndex contains the LOW WORD of the register offset 
+		 */
+		if (wValue == 0) {
+			/* @TODO - MAS - fix the access to the base field */
+			regaddr = 0;
+			//regaddr = (uint32_t) pcd->otg_dev->os_dep.base;
+			//GET_CORE_IF(pcd)->co
+			regaddr |= wIndex;
+		} else {
+			regaddr = (wValue << 16) | wIndex;
+		}
+
+		/* Read a 32-bit value of the memory at the regaddr */
+		regval = DWC_READ_REG32((uint32_t *) regaddr);
+
+		ep = &pcd->ep0;
+		dwc_memcpy(cfi->buf_in.buf, &regval, sizeof(uint32_t));
+		ep->dwc_ep.is_in = 1;
+		ep->dwc_ep.dma_addr = cfi->buf_in.addr;
+		ep->dwc_ep.start_xfer_buff = cfi->buf_in.buf;
+		ep->dwc_ep.xfer_buff = cfi->buf_in.buf;
+		ep->dwc_ep.xfer_len = wLen;
+		ep->dwc_ep.xfer_count = 0;
+		ep->dwc_ep.sent_zlp = 0;
+		ep->dwc_ep.total_len = ep->dwc_ep.xfer_len;
+
+		pcd->ep0_pending = 1;
+		dwc_otg_ep0_start_transfer(coreif, &ep->dwc_ep);
+		cfi->need_gadget_att = 0;
+		retval = 0;
+		break;
+
+	case VEN_CORE_WRITE_REGISTER:
+		CFI_INFO("VEN_CORE_WRITE_REGISTER\n");
+		/* Set up an XFER to get the data stage of the control request,
+		 * which is the new value of the register to be modified.
+		 */
+		ep = &pcd->ep0;
+		ep->dwc_ep.is_in = 0;
+		ep->dwc_ep.dma_addr = cfi->buf_out.addr;
+		ep->dwc_ep.start_xfer_buff = cfi->buf_out.buf;
+		ep->dwc_ep.xfer_buff = cfi->buf_out.buf;
+		ep->dwc_ep.xfer_len = wLen;
+		ep->dwc_ep.xfer_count = 0;
+		ep->dwc_ep.sent_zlp = 0;
+		ep->dwc_ep.total_len = ep->dwc_ep.xfer_len;
+
+		pcd->ep0_pending = 1;
+		/* Read the control write's data stage */
+		dwc_otg_ep0_start_transfer(coreif, &ep->dwc_ep);
+		retval = 0;
+		break;
+
+	default:
+		retval = -DWC_E_NOT_SUPPORTED;
+		break;
+	}
+
+	return retval;
+}
+
+/**
+ * This function prepares the core features descriptors and copies its
+ * raw representation into the buffer <buf>.
+ * 
+ * The buffer structure is as follows:
+ *	all_features_header (8 bytes)
+ *	features_#1 (8 bytes + feature name string length)
+ *	features_#2 (8 bytes + feature name string length)
+ *	.....
+ *	features_#n - where n=the total count of feature descriptors
+ */
+static int cfi_core_features_buf(uint8_t * buf, uint16_t buflen)
+{
+	cfi_feature_desc_header_t *prop_hdr = prop_descs;
+	cfi_feature_desc_header_t *prop;
+	cfi_all_features_header_t *all_props_hdr = &all_props_desc_header;
+	cfi_all_features_header_t *tmp;
+	uint8_t *tmpbuf = buf;
+	const uint8_t *pname = NULL;
+	int i, j, namelen = 0, totlen;
+
+	/* Prepare and copy the core features into the buffer */
+	CFI_INFO("%s:\n", __func__);
+
+	tmp = (cfi_all_features_header_t *) tmpbuf;
+	*tmp = *all_props_hdr;
+	tmpbuf += CFI_ALL_FEATURES_HDR_LEN;
+
+	j = sizeof(prop_descs) / sizeof(cfi_all_features_header_t);
+	for (i = 0; i < j; i++, prop_hdr++) {
+		pname = get_prop_name(prop_hdr->wFeatureID, &namelen);
+		prop = (cfi_feature_desc_header_t *) tmpbuf;
+		*prop = *prop_hdr;
+
+		prop->bNameLen = namelen;
+		prop->wLength =
+		    DWC_CONSTANT_CPU_TO_LE16(CFI_FEATURE_DESC_HDR_LEN +
+					     namelen);
+
+		tmpbuf += CFI_FEATURE_DESC_HDR_LEN;
+		dwc_memcpy(tmpbuf, pname, namelen);
+		tmpbuf += namelen;
+	}
+
+	totlen = tmpbuf - buf;
+
+	if (totlen > 0) {
+		tmp = (cfi_all_features_header_t *) buf;
+		tmp->wTotalLen = DWC_CONSTANT_CPU_TO_LE16(totlen);
+	}
+
+	return totlen;
+}
+
+/**
+ * This function releases all the dynamic memory in the CFI object.
+ */
+static void cfi_release(cfiobject_t * cfiobj)
+{
+	cfi_ep_t *cfiep;
+	dwc_list_link_t *tmp;
+
+	CFI_INFO("%s\n", __func__);
+
+	if (cfiobj->buf_in.buf) {
+		DWC_DMA_FREE(CFI_IN_BUF_LEN, cfiobj->buf_in.buf,
+			     cfiobj->buf_in.addr);
+		cfiobj->buf_in.buf = NULL;
+	}
+
+	if (cfiobj->buf_out.buf) {
+		DWC_DMA_FREE(CFI_OUT_BUF_LEN, cfiobj->buf_out.buf,
+			     cfiobj->buf_out.addr);
+		cfiobj->buf_out.buf = NULL;
+	}
+
+	/* Free the Buffer Setup values for each EP */
+	//list_for_each_entry(cfiep, &cfiobj->active_eps, lh) {
+	DWC_LIST_FOREACH(tmp, &cfiobj->active_eps) {
+		cfiep = DWC_LIST_ENTRY(tmp, struct cfi_ep, lh);
+		cfi_free_ep_bs_dyn_data(cfiep);
+	}
+}
+
+/**
+ * This function frees the dynamically allocated EP buffer setup data.
+ */
+static void cfi_free_ep_bs_dyn_data(cfi_ep_t * cfiep)
+{
+	if (cfiep->bm_sg) {
+		DWC_FREE(cfiep->bm_sg);
+		cfiep->bm_sg = NULL;
+	}
+
+	if (cfiep->bm_align) {
+		DWC_FREE(cfiep->bm_align);
+		cfiep->bm_align = NULL;
+	}
+
+	if (cfiep->bm_concat) {
+		if (NULL != cfiep->bm_concat->wTxBytes) {
+			DWC_FREE(cfiep->bm_concat->wTxBytes);
+			cfiep->bm_concat->wTxBytes = NULL;
+		}
+		DWC_FREE(cfiep->bm_concat);
+		cfiep->bm_concat = NULL;
+	}
+}
+
+/**
+ * This function initializes the default values of the features
+ * for a specific endpoint and should be called only once when
+ * the EP is enabled first time.
+ */
+static int cfi_ep_init_defaults(struct dwc_otg_pcd *pcd, cfi_ep_t * cfiep)
+{
+	int retval = 0;
+
+	cfiep->bm_sg = DWC_ALLOC(sizeof(ddma_sg_buffer_setup_t));
+	if (NULL == cfiep->bm_sg) {
+		CFI_INFO("Failed to allocate memory for SG feature value\n");
+		return -DWC_E_NO_MEMORY;
+	}
+	dwc_memset(cfiep->bm_sg, 0, sizeof(ddma_sg_buffer_setup_t));
+
+	/* For the Concatenation feature's default value we do not allocate
+	 * memory for the wTxBytes field - it will be done in the set_feature_value
+	 * request handler.
+	 */
+	cfiep->bm_concat = DWC_ALLOC(sizeof(ddma_concat_buffer_setup_t));
+	if (NULL == cfiep->bm_concat) {
+		CFI_INFO
+		    ("Failed to allocate memory for CONCATENATION feature value\n");
+		DWC_FREE(cfiep->bm_sg);
+		return -DWC_E_NO_MEMORY;
+	}
+	dwc_memset(cfiep->bm_concat, 0, sizeof(ddma_concat_buffer_setup_t));
+
+	cfiep->bm_align = DWC_ALLOC(sizeof(ddma_align_buffer_setup_t));
+	if (NULL == cfiep->bm_align) {
+		CFI_INFO
+		    ("Failed to allocate memory for Alignment feature value\n");
+		DWC_FREE(cfiep->bm_sg);
+		DWC_FREE(cfiep->bm_concat);
+		return -DWC_E_NO_MEMORY;
+	}
+	dwc_memset(cfiep->bm_align, 0, sizeof(ddma_align_buffer_setup_t));
+
+	return retval;
+}
+
+/**
+ * The callback function that notifies the CFI on the activation of
+ * an endpoint in the PCD. The following steps are done in this function:
+ *
+ *	Create a dynamically allocated cfi_ep_t object (a CFI wrapper to the PCD's 
+ *		active endpoint)
+ *	Create MAX_DMA_DESCS_PER_EP count DMA Descriptors for the EP
+ *	Set the Buffer Mode to standard
+ *	Initialize the default values for all EP modes (SG, Circular, Concat, Align)
+ *	Add the cfi_ep_t object to the list of active endpoints in the CFI object
+ */
+static int cfi_ep_enable(struct cfiobject *cfi, struct dwc_otg_pcd *pcd,
+			 struct dwc_otg_pcd_ep *ep)
+{
+	cfi_ep_t *cfiep;
+	int retval = -DWC_E_NOT_SUPPORTED;
+
+	CFI_INFO("%s: epname=%s; epnum=0x%02x\n", __func__,
+		 "EP_" /*ep->ep.name */ , ep->desc->bEndpointAddress);
+	/* MAS - Check whether this endpoint already is in the list */
+	cfiep = get_cfi_ep_by_pcd_ep(cfi, ep);
+
+	if (NULL == cfiep) {
+		/* Allocate a cfi_ep_t object */
+		cfiep = DWC_ALLOC(sizeof(cfi_ep_t));
+		if (NULL == cfiep) {
+			CFI_INFO
+			    ("Unable to allocate memory for <cfiep> in function %s\n",
+			     __func__);
+			return -DWC_E_NO_MEMORY;
+		}
+		dwc_memset(cfiep, 0, sizeof(cfi_ep_t));
+
+		/* Save the dwc_otg_pcd_ep pointer in the cfiep object */
+		cfiep->ep = ep;
+
+		/* Allocate the DMA Descriptors chain of MAX_DMA_DESCS_PER_EP count */
+		ep->dwc_ep.descs =
+		    DWC_DMA_ALLOC(MAX_DMA_DESCS_PER_EP *
+				  sizeof(dwc_otg_dma_desc_t),
+				  &ep->dwc_ep.descs_dma_addr);
+
+		if (NULL == ep->dwc_ep.descs) {
+			DWC_FREE(cfiep);
+			return -DWC_E_NO_MEMORY;
+		}
+
+		DWC_LIST_INIT(&cfiep->lh);
+
+		/* Set the buffer mode to BM_STANDARD. It will be modified 
+		 * when building descriptors for a specific buffer mode */
+		ep->dwc_ep.buff_mode = BM_STANDARD;
+
+		/* Create and initialize the default values for this EP's Buffer modes */
+		if ((retval = cfi_ep_init_defaults(pcd, cfiep)) < 0)
+			return retval;
+
+		/* Add the cfi_ep_t object to the CFI object's list of active endpoints */
+		DWC_LIST_INSERT_TAIL(&cfi->active_eps, &cfiep->lh);
+		retval = 0;
+	} else {		/* The sought EP already is in the list */
+		CFI_INFO("%s: The sought EP already is in the list\n",
+			 __func__);
+	}
+
+	return retval;
+}
+
+/**
+ * This function is called when the data stage of a 3-stage Control Write request
+ * is complete.
+ * 
+ */
+static int cfi_ctrl_write_complete(struct cfiobject *cfi,
+				   struct dwc_otg_pcd *pcd)
+{
+	uint32_t addr, reg_value;
+	uint16_t wIndex, wValue;
+	uint8_t bRequest;
+	uint8_t *buf = cfi->buf_out.buf;
+	//struct usb_ctrlrequest *ctrl_req = &cfi->ctrl_req_saved;
+	struct cfi_usb_ctrlrequest *ctrl_req = &cfi->ctrl_req;
+	int retval = -DWC_E_NOT_SUPPORTED;
+
+	CFI_INFO("%s\n", __func__);
+
+	bRequest = ctrl_req->bRequest;
+	wIndex = DWC_CONSTANT_CPU_TO_LE16(ctrl_req->wIndex);
+	wValue = DWC_CONSTANT_CPU_TO_LE16(ctrl_req->wValue);
+
+	/* 
+	 * Save the pointer to the data stage in the ctrl_req's <data> field.
+	 * The request should be already saved in the command stage by now.
+	 */
+	ctrl_req->data = cfi->buf_out.buf;
+	cfi->need_status_in_complete = 0;
+	cfi->need_gadget_att = 0;
+
+	switch (bRequest) {
+	case VEN_CORE_WRITE_REGISTER:
+		/* The buffer contains raw data of the new value for the register */
+		reg_value = *((uint32_t *) buf);
+		if (wValue == 0) {
+			addr = 0;
+			//addr = (uint32_t) pcd->otg_dev->os_dep.base;
+			addr += wIndex;
+		} else {
+			addr = (wValue << 16) | wIndex;
+		}
+
+		//writel(reg_value, addr);
+
+		retval = 0;
+		cfi->need_status_in_complete = 1;
+		break;
+
+	case VEN_CORE_SET_FEATURE:
+		/* The buffer contains raw data of the new value of the feature */
+		retval = cfi_set_feature_value(pcd);
+		if (retval < 0)
+			return retval;
+
+		cfi->need_status_in_complete = 1;
+		break;
+
+	default:
+		break;
+	}
+
+	return retval;
+}
+
+/**
+ * This function builds the DMA descriptors for the SG buffer mode.
+ */
+static void cfi_build_sg_descs(struct cfiobject *cfi, cfi_ep_t * cfiep,
+			       dwc_otg_pcd_request_t * req)
+{
+	struct dwc_otg_pcd_ep *ep = cfiep->ep;
+	ddma_sg_buffer_setup_t *sgval = cfiep->bm_sg;
+	struct dwc_otg_dma_desc *desc = cfiep->ep->dwc_ep.descs;
+	struct dwc_otg_dma_desc *desc_last = cfiep->ep->dwc_ep.descs;
+	dma_addr_t buff_addr = req->dma;
+	int i;
+	uint32_t txsize, off;
+
+	txsize = sgval->wSize;
+	off = sgval->bOffset;
+
+//      CFI_INFO("%s: %s TXSIZE=0x%08x; OFFSET=0x%08x\n", 
+//              __func__, cfiep->ep->ep.name, txsize, off);
+
+	for (i = 0; i < sgval->bCount; i++) {
+		desc->status.b.bs = BS_HOST_BUSY;
+		desc->buf = buff_addr;
+		desc->status.b.l = 0;
+		desc->status.b.ioc = 0;
+		desc->status.b.sp = 0;
+		desc->status.b.bytes = txsize;
+		desc->status.b.bs = BS_HOST_READY;
+
+		/* Set the next address of the buffer */
+		buff_addr += txsize + off;
+		desc_last = desc;
+		desc++;
+	}
+
+	/* Set the last, ioc and sp bits on the Last DMA Descriptor */
+	desc_last->status.b.l = 1;
+	desc_last->status.b.ioc = 1;
+	desc_last->status.b.sp = ep->dwc_ep.sent_zlp;
+	/* Save the last DMA descriptor pointer */
+	cfiep->dma_desc_last = desc_last;
+	cfiep->desc_count = sgval->bCount;
+}
+
+/**
+ * This function builds the DMA descriptors for the Concatenation buffer mode.
+ */
+static void cfi_build_concat_descs(struct cfiobject *cfi, cfi_ep_t * cfiep,
+				   dwc_otg_pcd_request_t * req)
+{
+	struct dwc_otg_pcd_ep *ep = cfiep->ep;
+	ddma_concat_buffer_setup_t *concatval = cfiep->bm_concat;
+	struct dwc_otg_dma_desc *desc = cfiep->ep->dwc_ep.descs;
+	struct dwc_otg_dma_desc *desc_last = cfiep->ep->dwc_ep.descs;
+	dma_addr_t buff_addr = req->dma;
+	int i;
+	uint16_t *txsize;
+
+	txsize = concatval->wTxBytes;
+
+	for (i = 0; i < concatval->hdr.bDescCount; i++) {
+		desc->buf = buff_addr;
+		desc->status.b.bs = BS_HOST_BUSY;
+		desc->status.b.l = 0;
+		desc->status.b.ioc = 0;
+		desc->status.b.sp = 0;
+		desc->status.b.bytes = *txsize;
+		desc->status.b.bs = BS_HOST_READY;
+
+		txsize++;
+		/* Set the next address of the buffer */
+		buff_addr += UGETW(ep->desc->wMaxPacketSize);
+		desc_last = desc;
+		desc++;
+	}
+
+	/* Set the last, ioc and sp bits on the Last DMA Descriptor */
+	desc_last->status.b.l = 1;
+	desc_last->status.b.ioc = 1;
+	desc_last->status.b.sp = ep->dwc_ep.sent_zlp;
+	cfiep->dma_desc_last = desc_last;
+	cfiep->desc_count = concatval->hdr.bDescCount;
+}
+
+/**
+ * This function builds the DMA descriptors for the Circular buffer mode
+ */
+static void cfi_build_circ_descs(struct cfiobject *cfi, cfi_ep_t * cfiep,
+				 dwc_otg_pcd_request_t * req)
+{
+	/* @todo: MAS - add implementation when this feature needs to be tested */
+}
+
+/**
+ * This function builds the DMA descriptors for the Alignment buffer mode
+ */
+static void cfi_build_align_descs(struct cfiobject *cfi, cfi_ep_t * cfiep,
+				  dwc_otg_pcd_request_t * req)
+{
+	struct dwc_otg_pcd_ep *ep = cfiep->ep;
+	ddma_align_buffer_setup_t *alignval = cfiep->bm_align;
+	struct dwc_otg_dma_desc *desc = cfiep->ep->dwc_ep.descs;
+	dma_addr_t buff_addr = req->dma;
+
+	desc->status.b.bs = BS_HOST_BUSY;
+	desc->status.b.l = 1;
+	desc->status.b.ioc = 1;
+	desc->status.b.sp = ep->dwc_ep.sent_zlp;
+	desc->status.b.bytes = req->length;
+	/* Adjust the buffer alignment */
+	desc->buf = (buff_addr + alignval->bAlign);
+	desc->status.b.bs = BS_HOST_READY;
+	cfiep->dma_desc_last = desc;
+	cfiep->desc_count = 1;
+}
+
+/**
+ * This function builds the DMA descriptors chain for different modes of the
+ * buffer setup of an endpoint.
+ */
+static void cfi_build_descriptors(struct cfiobject *cfi,
+				  struct dwc_otg_pcd *pcd,
+				  struct dwc_otg_pcd_ep *ep,
+				  dwc_otg_pcd_request_t * req)
+{
+	cfi_ep_t *cfiep;
+
+	/* Get the cfiep by the dwc_otg_pcd_ep */
+	cfiep = get_cfi_ep_by_pcd_ep(cfi, ep);
+	if (NULL == cfiep) {
+		CFI_INFO("%s: Unable to find a matching active endpoint\n",
+			 __func__);
+		return;
+	}
+
+	cfiep->xfer_len = req->length;
+
+	/* Iterate through all the DMA descriptors */
+	switch (cfiep->ep->dwc_ep.buff_mode) {
+	case BM_SG:
+		cfi_build_sg_descs(cfi, cfiep, req);
+		break;
+
+	case BM_CONCAT:
+		cfi_build_concat_descs(cfi, cfiep, req);
+		break;
+
+	case BM_CIRCULAR:
+		cfi_build_circ_descs(cfi, cfiep, req);
+		break;
+
+	case BM_ALIGN:
+		cfi_build_align_descs(cfi, cfiep, req);
+		break;
+
+	default:
+		break;
+	}
+}
+
+/**
+ * Allocate DMA buffer for different Buffer modes.
+ */
+static void *cfi_ep_alloc_buf(struct cfiobject *cfi, struct dwc_otg_pcd *pcd,
+			      struct dwc_otg_pcd_ep *ep, dma_addr_t * dma,
+			      unsigned size, gfp_t flags)
+{
+	return DWC_DMA_ALLOC(size, dma);
+}
+
+/**
+ * This function initializes the CFI object.
+ */
+int init_cfi(cfiobject_t * cfiobj)
+{
+	CFI_INFO("%s\n", __func__);
+
+	/* Allocate a buffer for IN XFERs */
+	cfiobj->buf_in.buf =
+	    DWC_DMA_ALLOC(CFI_IN_BUF_LEN, &cfiobj->buf_in.addr);
+	if (NULL == cfiobj->buf_in.buf) {
+		CFI_INFO("Unable to allocate buffer for INs\n");
+		return -DWC_E_NO_MEMORY;
+	}
+
+	/* Allocate a buffer for OUT XFERs */
+	cfiobj->buf_out.buf =
+	    DWC_DMA_ALLOC(CFI_OUT_BUF_LEN, &cfiobj->buf_out.addr);
+	if (NULL == cfiobj->buf_out.buf) {
+		CFI_INFO("Unable to allocate buffer for OUT\n");
+		return -DWC_E_NO_MEMORY;
+	}
+
+	/* Initialize the callback function pointers */
+	cfiobj->ops.release = cfi_release;
+	cfiobj->ops.ep_enable = cfi_ep_enable;
+	cfiobj->ops.ctrl_write_complete = cfi_ctrl_write_complete;
+	cfiobj->ops.build_descriptors = cfi_build_descriptors;
+	cfiobj->ops.ep_alloc_buf = cfi_ep_alloc_buf;
+
+	/* Initialize the list of active endpoints in the CFI object */
+	DWC_LIST_INIT(&cfiobj->active_eps);
+
+	return 0;
+}
+
+/**
+ * This function reads the required feature's current value into the buffer
+ *
+ * @retval: Returns negative as error, or the data length of the feature  
+ */
+static int cfi_get_feature_value(uint8_t * buf, uint16_t buflen,
+				 struct dwc_otg_pcd *pcd,
+				 struct cfi_usb_ctrlrequest *ctrl_req)
+{
+	int retval = -DWC_E_NOT_SUPPORTED;
+	struct dwc_otg_core_if *coreif = GET_CORE_IF(pcd);
+	uint16_t dfifo, rxfifo, txfifo;
+
+	switch (ctrl_req->wIndex) {
+		/* Whether the DDMA is enabled or not */
+	case FT_ID_DMA_MODE:
+		*buf = (coreif->dma_enable && coreif->dma_desc_enable) ? 1 : 0;
+		retval = 1;
+		break;
+
+	case FT_ID_DMA_BUFFER_SETUP:
+		retval = cfi_ep_get_sg_val(buf, pcd, ctrl_req);
+		break;
+
+	case FT_ID_DMA_BUFF_ALIGN:
+		retval = cfi_ep_get_align_val(buf, pcd, ctrl_req);
+		break;
+
+	case FT_ID_DMA_CONCAT_SETUP:
+		retval = cfi_ep_get_concat_val(buf, pcd, ctrl_req);
+		break;
+
+	case FT_ID_DMA_CIRCULAR:
+		CFI_INFO("GetFeature value (FT_ID_DMA_CIRCULAR)\n");
+		break;
+
+	case FT_ID_THRESHOLD_SETUP:
+		CFI_INFO("GetFeature value (FT_ID_THRESHOLD_SETUP)\n");
+		break;
+
+	case FT_ID_DFIFO_DEPTH:
+		dfifo = get_dfifo_size(coreif);
+		*((uint16_t *) buf) = dfifo;
+		retval = sizeof(uint16_t);
+		break;
+
+	case FT_ID_TX_FIFO_DEPTH:
+		retval = get_txfifo_size(pcd, ctrl_req->wValue);
+		if (retval >= 0) {
+			txfifo = retval;
+			*((uint16_t *) buf) = txfifo;
+			retval = sizeof(uint16_t);
+		}
+		break;
+
+	case FT_ID_RX_FIFO_DEPTH:
+		retval = get_rxfifo_size(coreif, ctrl_req->wValue);
+		if (retval >= 0) {
+			rxfifo = retval;
+			*((uint16_t *) buf) = rxfifo;
+			retval = sizeof(uint16_t);
+		}
+		break;
+	}
+
+	return retval;
+}
+
+/**
+ * This function resets the SG for the specified EP to its default value
+ */
+static int cfi_reset_sg_val(cfi_ep_t * cfiep)
+{
+	dwc_memset(cfiep->bm_sg, 0, sizeof(ddma_sg_buffer_setup_t));
+	return 0;
+}
+
+/**
+ * This function resets the Alignment for the specified EP to its default value
+ */
+static int cfi_reset_align_val(cfi_ep_t * cfiep)
+{
+	dwc_memset(cfiep->bm_sg, 0, sizeof(ddma_sg_buffer_setup_t));
+	return 0;
+}
+
+/**
+ * This function resets the Concatenation for the specified EP to its default value
+ * This function will also set the value of the wTxBytes field to NULL after 
+ * freeing the memory previously allocated for this field.
+ */
+static int cfi_reset_concat_val(cfi_ep_t * cfiep)
+{
+	/* First we need to free the wTxBytes field */
+	if (cfiep->bm_concat->wTxBytes) {
+		DWC_FREE(cfiep->bm_concat->wTxBytes);
+		cfiep->bm_concat->wTxBytes = NULL;
+	}
+
+	dwc_memset(cfiep->bm_concat, 0, sizeof(ddma_concat_buffer_setup_t));
+	return 0;
+}
+
+/**
+ * This function resets all the buffer setups of the specified endpoint
+ */
+static int cfi_ep_reset_all_setup_vals(cfi_ep_t * cfiep)
+{
+	cfi_reset_sg_val(cfiep);
+	cfi_reset_align_val(cfiep);
+	cfi_reset_concat_val(cfiep);
+	return 0;
+}
+
+static int cfi_handle_reset_fifo_val(struct dwc_otg_pcd *pcd, uint8_t ep_addr,
+				     uint8_t rx_rst, uint8_t tx_rst)
+{
+	int retval = -DWC_E_INVALID;
+	uint16_t tx_siz[15];
+	uint16_t rx_siz = 0;
+	dwc_otg_pcd_ep_t *ep = NULL;
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+	dwc_otg_core_params_t *params = GET_CORE_IF(pcd)->core_params;
+
+	if (rx_rst) {
+		rx_siz = params->dev_rx_fifo_size;
+		params->dev_rx_fifo_size = GET_CORE_IF(pcd)->init_rxfsiz;
+	}
+
+	if (tx_rst) {
+		if (ep_addr == 0) {
+			int i;
+
+			for (i = 0; i < core_if->hwcfg4.b.num_in_eps; i++) {
+				tx_siz[i] =
+				    core_if->core_params->dev_tx_fifo_size[i];
+				core_if->core_params->dev_tx_fifo_size[i] =
+				    core_if->init_txfsiz[i];
+			}
+		} else {
+
+			ep = get_ep_by_addr(pcd, ep_addr);
+
+			if (NULL == ep) {
+				CFI_INFO
+				    ("%s: Unable to get the endpoint addr=0x%02x\n",
+				     __func__, ep_addr);
+				return -DWC_E_INVALID;
+			}
+
+			tx_siz[0] =
+			    params->dev_tx_fifo_size[ep->dwc_ep.tx_fifo_num -
+						     1];
+			params->dev_tx_fifo_size[ep->dwc_ep.tx_fifo_num - 1] =
+			    GET_CORE_IF(pcd)->init_txfsiz[ep->
+							  dwc_ep.tx_fifo_num -
+							  1];
+		}
+	}
+
+	if (resize_fifos(GET_CORE_IF(pcd))) {
+		retval = 0;
+	} else {
+		CFI_INFO
+		    ("%s: Error resetting the feature Reset All(FIFO size)\n",
+		     __func__);
+		if (rx_rst) {
+			params->dev_rx_fifo_size = rx_siz;
+		}
+
+		if (tx_rst) {
+			if (ep_addr == 0) {
+				int i;
+				for (i = 0; i < core_if->hwcfg4.b.num_in_eps;
+				     i++) {
+					core_if->
+					    core_params->dev_tx_fifo_size[i] =
+					    tx_siz[i];
+				}
+			} else {
+				params->dev_tx_fifo_size[ep->
+							 dwc_ep.tx_fifo_num -
+							 1] = tx_siz[0];
+			}
+		}
+		retval = -DWC_E_INVALID;
+	}
+	return retval;
+}
+
+static int cfi_handle_reset_all(struct dwc_otg_pcd *pcd, uint8_t addr)
+{
+	int retval = 0;
+	cfi_ep_t *cfiep;
+	cfiobject_t *cfi = pcd->cfi;
+	dwc_list_link_t *tmp;
+
+	retval = cfi_handle_reset_fifo_val(pcd, addr, 1, 1);
+	if (retval < 0) {
+		return retval;
+	}
+
+	/* If the EP address is known then reset the features for only that EP */
+	if (addr) {
+		cfiep = get_cfi_ep_by_addr(pcd->cfi, addr);
+		if (NULL == cfiep) {
+			CFI_INFO("%s: Error getting the EP address 0x%02x\n",
+				 __func__, addr);
+			return -DWC_E_INVALID;
+		}
+		retval = cfi_ep_reset_all_setup_vals(cfiep);
+		cfiep->ep->dwc_ep.buff_mode = BM_STANDARD;
+	}
+	/* Otherwise (wValue == 0), reset all features of all EP's */
+	else {
+		/* Traverse all the active EP's and reset the feature(s) value(s) */
+		//list_for_each_entry(cfiep, &cfi->active_eps, lh) {
+		DWC_LIST_FOREACH(tmp, &cfi->active_eps) {
+			cfiep = DWC_LIST_ENTRY(tmp, struct cfi_ep, lh);
+			retval = cfi_ep_reset_all_setup_vals(cfiep);
+			cfiep->ep->dwc_ep.buff_mode = BM_STANDARD;
+			if (retval < 0) {
+				CFI_INFO
+				    ("%s: Error resetting the feature Reset All\n",
+				     __func__);
+				return retval;
+			}
+		}
+	}
+	return retval;
+}
+
+static int cfi_handle_reset_dma_buff_setup(struct dwc_otg_pcd *pcd,
+					   uint8_t addr)
+{
+	int retval = 0;
+	cfi_ep_t *cfiep;
+	cfiobject_t *cfi = pcd->cfi;
+	dwc_list_link_t *tmp;
+
+	/* If the EP address is known then reset the features for only that EP */
+	if (addr) {
+		cfiep = get_cfi_ep_by_addr(pcd->cfi, addr);
+		if (NULL == cfiep) {
+			CFI_INFO("%s: Error getting the EP address 0x%02x\n",
+				 __func__, addr);
+			return -DWC_E_INVALID;
+		}
+		retval = cfi_reset_sg_val(cfiep);
+	}
+	/* Otherwise (wValue == 0), reset all features of all EP's */
+	else {
+		/* Traverse all the active EP's and reset the feature(s) value(s) */
+		//list_for_each_entry(cfiep, &cfi->active_eps, lh) {
+		DWC_LIST_FOREACH(tmp, &cfi->active_eps) {
+			cfiep = DWC_LIST_ENTRY(tmp, struct cfi_ep, lh);
+			retval = cfi_reset_sg_val(cfiep);
+			if (retval < 0) {
+				CFI_INFO
+				    ("%s: Error resetting the feature Buffer Setup\n",
+				     __func__);
+				return retval;
+			}
+		}
+	}
+	return retval;
+}
+
+static int cfi_handle_reset_concat_val(struct dwc_otg_pcd *pcd, uint8_t addr)
+{
+	int retval = 0;
+	cfi_ep_t *cfiep;
+	cfiobject_t *cfi = pcd->cfi;
+	dwc_list_link_t *tmp;
+
+	/* If the EP address is known then reset the features for only that EP */
+	if (addr) {
+		cfiep = get_cfi_ep_by_addr(pcd->cfi, addr);
+		if (NULL == cfiep) {
+			CFI_INFO("%s: Error getting the EP address 0x%02x\n",
+				 __func__, addr);
+			return -DWC_E_INVALID;
+		}
+		retval = cfi_reset_concat_val(cfiep);
+	}
+	/* Otherwise (wValue == 0), reset all features of all EP's */
+	else {
+		/* Traverse all the active EP's and reset the feature(s) value(s) */
+		//list_for_each_entry(cfiep, &cfi->active_eps, lh) {
+		DWC_LIST_FOREACH(tmp, &cfi->active_eps) {
+			cfiep = DWC_LIST_ENTRY(tmp, struct cfi_ep, lh);
+			retval = cfi_reset_concat_val(cfiep);
+			if (retval < 0) {
+				CFI_INFO
+				    ("%s: Error resetting the feature Concatenation Value\n",
+				     __func__);
+				return retval;
+			}
+		}
+	}
+	return retval;
+}
+
+static int cfi_handle_reset_align_val(struct dwc_otg_pcd *pcd, uint8_t addr)
+{
+	int retval = 0;
+	cfi_ep_t *cfiep;
+	cfiobject_t *cfi = pcd->cfi;
+	dwc_list_link_t *tmp;
+
+	/* If the EP address is known then reset the features for only that EP */
+	if (addr) {
+		cfiep = get_cfi_ep_by_addr(pcd->cfi, addr);
+		if (NULL == cfiep) {
+			CFI_INFO("%s: Error getting the EP address 0x%02x\n",
+				 __func__, addr);
+			return -DWC_E_INVALID;
+		}
+		retval = cfi_reset_align_val(cfiep);
+	}
+	/* Otherwise (wValue == 0), reset all features of all EP's */
+	else {
+		/* Traverse all the active EP's and reset the feature(s) value(s) */
+		//list_for_each_entry(cfiep, &cfi->active_eps, lh) {
+		DWC_LIST_FOREACH(tmp, &cfi->active_eps) {
+			cfiep = DWC_LIST_ENTRY(tmp, struct cfi_ep, lh);
+			retval = cfi_reset_align_val(cfiep);
+			if (retval < 0) {
+				CFI_INFO
+				    ("%s: Error resetting the feature Aliignment Value\n",
+				     __func__);
+				return retval;
+			}
+		}
+	}
+	return retval;
+
+}
+
+static int cfi_preproc_reset(struct dwc_otg_pcd *pcd,
+			     struct cfi_usb_ctrlrequest *req)
+{
+	int retval = 0;
+
+	switch (req->wIndex) {
+	case 0:
+		/* Reset all features */
+		retval = cfi_handle_reset_all(pcd, req->wValue & 0xff);
+		break;
+
+	case FT_ID_DMA_BUFFER_SETUP:
+		/* Reset the SG buffer setup */
+		retval =
+		    cfi_handle_reset_dma_buff_setup(pcd, req->wValue & 0xff);
+		break;
+
+	case FT_ID_DMA_CONCAT_SETUP:
+		/* Reset the Concatenation buffer setup */
+		retval = cfi_handle_reset_concat_val(pcd, req->wValue & 0xff);
+		break;
+
+	case FT_ID_DMA_BUFF_ALIGN:
+		/* Reset the Alignment buffer setup */
+		retval = cfi_handle_reset_align_val(pcd, req->wValue & 0xff);
+		break;
+
+	case FT_ID_TX_FIFO_DEPTH:
+		retval =
+		    cfi_handle_reset_fifo_val(pcd, req->wValue & 0xff, 0, 1);
+		pcd->cfi->need_gadget_att = 0;
+		break;
+
+	case FT_ID_RX_FIFO_DEPTH:
+		retval = cfi_handle_reset_fifo_val(pcd, 0, 1, 0);
+		pcd->cfi->need_gadget_att = 0;
+		break;
+	default:
+		break;
+	}
+	return retval;
+}
+
+/**
+ * This function sets a new value for the SG buffer setup.
+ */
+static int cfi_ep_set_sg_val(uint8_t * buf, struct dwc_otg_pcd *pcd)
+{
+	uint8_t inaddr, outaddr;
+	cfi_ep_t *epin, *epout;
+	ddma_sg_buffer_setup_t *psgval;
+	uint32_t desccount, size;
+
+	CFI_INFO("%s\n", __func__);
+
+	psgval = (ddma_sg_buffer_setup_t *) buf;
+	desccount = (uint32_t) psgval->bCount;
+	size = (uint32_t) psgval->wSize;
+
+	/* Check the DMA descriptor count */
+	if ((desccount > MAX_DMA_DESCS_PER_EP) || (desccount == 0)) {
+		CFI_INFO
+		    ("%s: The count of DMA Descriptors should be between 1 and %d\n",
+		     __func__, MAX_DMA_DESCS_PER_EP);
+		return -DWC_E_INVALID;
+	}
+
+	/* Check the DMA descriptor count */
+
+	if (size == 0) {
+
+		CFI_INFO("%s: The transfer size should be at least 1 byte\n",
+			 __func__);
+
+		return -DWC_E_INVALID;
+
+	}
+
+	inaddr = psgval->bInEndpointAddress;
+	outaddr = psgval->bOutEndpointAddress;
+
+	epin = get_cfi_ep_by_addr(pcd->cfi, inaddr);
+	epout = get_cfi_ep_by_addr(pcd->cfi, outaddr);
+
+	if (NULL == epin || NULL == epout) {
+		CFI_INFO
+		    ("%s: Unable to get the endpoints inaddr=0x%02x outaddr=0x%02x\n",
+		     __func__, inaddr, outaddr);
+		return -DWC_E_INVALID;
+	}
+
+	epin->ep->dwc_ep.buff_mode = BM_SG;
+	dwc_memcpy(epin->bm_sg, psgval, sizeof(ddma_sg_buffer_setup_t));
+
+	epout->ep->dwc_ep.buff_mode = BM_SG;
+	dwc_memcpy(epout->bm_sg, psgval, sizeof(ddma_sg_buffer_setup_t));
+
+	return 0;
+}
+
+/**
+ * This function sets a new value for the buffer Alignment setup.
+ */
+static int cfi_ep_set_alignment_val(uint8_t * buf, struct dwc_otg_pcd *pcd)
+{
+	cfi_ep_t *ep;
+	uint8_t addr;
+	ddma_align_buffer_setup_t *palignval;
+
+	palignval = (ddma_align_buffer_setup_t *) buf;
+	addr = palignval->bEndpointAddress;
+
+	ep = get_cfi_ep_by_addr(pcd->cfi, addr);
+
+	if (NULL == ep) {
+		CFI_INFO("%s: Unable to get the endpoint addr=0x%02x\n",
+			 __func__, addr);
+		return -DWC_E_INVALID;
+	}
+
+	ep->ep->dwc_ep.buff_mode = BM_ALIGN;
+	dwc_memcpy(ep->bm_align, palignval, sizeof(ddma_align_buffer_setup_t));
+
+	return 0;
+}
+
+/**
+ * This function sets a new value for the Concatenation buffer setup.
+ */
+static int cfi_ep_set_concat_val(uint8_t * buf, struct dwc_otg_pcd *pcd)
+{
+	uint8_t addr;
+	cfi_ep_t *ep;
+	struct _ddma_concat_buffer_setup_hdr *pConcatValHdr;
+	uint16_t *pVals;
+	uint32_t desccount;
+	int i;
+	uint16_t mps;
+
+	pConcatValHdr = (struct _ddma_concat_buffer_setup_hdr *)buf;
+	desccount = (uint32_t) pConcatValHdr->bDescCount;
+	pVals = (uint16_t *) (buf + BS_CONCAT_VAL_HDR_LEN);
+
+	/* Check the DMA descriptor count */
+	if (desccount > MAX_DMA_DESCS_PER_EP) {
+		CFI_INFO("%s: Maximum DMA Descriptor count should be %d\n",
+			 __func__, MAX_DMA_DESCS_PER_EP);
+		return -DWC_E_INVALID;
+	}
+
+	addr = pConcatValHdr->bEndpointAddress;
+	ep = get_cfi_ep_by_addr(pcd->cfi, addr);
+	if (NULL == ep) {
+		CFI_INFO("%s: Unable to get the endpoint addr=0x%02x\n",
+			 __func__, addr);
+		return -DWC_E_INVALID;
+	}
+
+	mps = UGETW(ep->ep->desc->wMaxPacketSize);
+
+#if 0
+	for (i = 0; i < desccount; i++) {
+		CFI_INFO("%s: wTxSize[%d]=0x%04x\n", __func__, i, pVals[i]);
+	}
+	CFI_INFO("%s: epname=%s; mps=%d\n", __func__, ep->ep->ep.name, mps);
+#endif
+
+	/* Check the wTxSizes to be less than or equal to the mps */
+	for (i = 0; i < desccount; i++) {
+		if (pVals[i] > mps) {
+			CFI_INFO
+			    ("%s: ERROR - the wTxSize[%d] should be <= MPS (wTxSize=%d)\n",
+			     __func__, i, pVals[i]);
+			return -DWC_E_INVALID;
+		}
+	}
+
+	ep->ep->dwc_ep.buff_mode = BM_CONCAT;
+	dwc_memcpy(ep->bm_concat, pConcatValHdr, BS_CONCAT_VAL_HDR_LEN);
+
+	/* Free the previously allocated storage for the wTxBytes */
+	if (ep->bm_concat->wTxBytes) {
+		DWC_FREE(ep->bm_concat->wTxBytes);
+	}
+
+	/* Allocate a new storage for the wTxBytes field */
+	ep->bm_concat->wTxBytes =
+	    DWC_ALLOC(sizeof(uint16_t) * pConcatValHdr->bDescCount);
+	if (NULL == ep->bm_concat->wTxBytes) {
+		CFI_INFO("%s: Unable to allocate memory\n", __func__);
+		return -DWC_E_NO_MEMORY;
+	}
+
+	/* Copy the new values into the wTxBytes filed */
+	dwc_memcpy(ep->bm_concat->wTxBytes, buf + BS_CONCAT_VAL_HDR_LEN,
+		   sizeof(uint16_t) * pConcatValHdr->bDescCount);
+
+	return 0;
+}
+
+/**
+ * This function calculates the total of all FIFO sizes
+ * 
+ * @param core_if Programming view of DWC_otg controller
+ *
+ * @return The total of data FIFO sizes.
+ *
+ */
+static uint16_t get_dfifo_size(dwc_otg_core_if_t * core_if)
+{
+	dwc_otg_core_params_t *params = core_if->core_params;
+	uint16_t dfifo_total = 0;
+	int i;
+
+	/* The shared RxFIFO size */
+	dfifo_total =
+	    params->dev_rx_fifo_size + params->dev_nperio_tx_fifo_size;
+
+	/* Add up each TxFIFO size to the total */
+	for (i = 0; i < core_if->hwcfg4.b.num_in_eps; i++) {
+		dfifo_total += params->dev_tx_fifo_size[i];
+	}
+
+	return dfifo_total;
+}
+
+/**
+ * This function returns Rx FIFO size
+ * 
+ * @param core_if Programming view of DWC_otg controller
+ *
+ * @return The total of data FIFO sizes.
+ *
+ */
+static int32_t get_rxfifo_size(dwc_otg_core_if_t * core_if, uint16_t wValue)
+{
+	switch (wValue >> 8) {
+	case 0:
+		return (core_if->pwron_rxfsiz <
+			32768) ? core_if->pwron_rxfsiz : 32768;
+		break;
+	case 1:
+		return core_if->core_params->dev_rx_fifo_size;
+		break;
+	default:
+		return -DWC_E_INVALID;
+		break;
+	}
+}
+
+/**
+ * This function returns Tx FIFO size for IN EP
+ * 
+ * @param core_if Programming view of DWC_otg controller
+ *
+ * @return The total of data FIFO sizes.
+ *
+ */
+static int32_t get_txfifo_size(struct dwc_otg_pcd *pcd, uint16_t wValue)
+{
+	dwc_otg_pcd_ep_t *ep;
+
+	ep = get_ep_by_addr(pcd, wValue & 0xff);
+
+	if (NULL == ep) {
+		CFI_INFO("%s: Unable to get the endpoint addr=0x%02x\n",
+			 __func__, wValue & 0xff);
+		return -DWC_E_INVALID;
+	}
+
+	if (!ep->dwc_ep.is_in) {
+		CFI_INFO
+		    ("%s: No Tx FIFO assingned to the Out endpoint addr=0x%02x\n",
+		     __func__, wValue & 0xff);
+		return -DWC_E_INVALID;
+	}
+
+	switch (wValue >> 8) {
+	case 0:
+		return (GET_CORE_IF(pcd)->pwron_txfsiz
+			[ep->dwc_ep.tx_fifo_num - 1] <
+			768) ? GET_CORE_IF(pcd)->pwron_txfsiz[ep->
+							      dwc_ep.tx_fifo_num
+							      - 1] : 32768;
+		break;
+	case 1:
+		return GET_CORE_IF(pcd)->core_params->
+		    dev_tx_fifo_size[ep->dwc_ep.num - 1];
+		break;
+	default:
+		return -DWC_E_INVALID;
+		break;
+	}
+}
+
+/**
+ * This function checks if the submitted combination of 
+ * device mode FIFO sizes is possible or not.
+ * 
+ * @param core_if Programming view of DWC_otg controller
+ *
+ * @return 1 if possible, 0 otherwise.
+ *
+ */
+static uint8_t check_fifo_sizes(dwc_otg_core_if_t * core_if)
+{
+	uint16_t dfifo_actual = 0;
+	dwc_otg_core_params_t *params = core_if->core_params;
+	uint16_t start_addr = 0;
+	int i;
+
+	dfifo_actual =
+	    params->dev_rx_fifo_size + params->dev_nperio_tx_fifo_size;
+
+	for (i = 0; i < core_if->hwcfg4.b.num_in_eps; i++) {
+		dfifo_actual += params->dev_tx_fifo_size[i];
+	}
+
+	if (dfifo_actual > core_if->total_fifo_size) {
+		return 0;
+	}
+
+	if (params->dev_rx_fifo_size > 32768 || params->dev_rx_fifo_size < 16)
+		return 0;
+
+	if (params->dev_nperio_tx_fifo_size > 32768
+	    || params->dev_nperio_tx_fifo_size < 16)
+		return 0;
+
+	for (i = 0; i < core_if->hwcfg4.b.num_in_eps; i++) {
+
+		if (params->dev_tx_fifo_size[i] > 768
+		    || params->dev_tx_fifo_size[i] < 4)
+			return 0;
+	}
+
+	if (params->dev_rx_fifo_size > core_if->pwron_rxfsiz)
+		return 0;
+	start_addr = params->dev_rx_fifo_size;
+
+	if (params->dev_nperio_tx_fifo_size > core_if->pwron_gnptxfsiz)
+		return 0;
+	start_addr += params->dev_nperio_tx_fifo_size;
+
+	for (i = 0; i < core_if->hwcfg4.b.num_in_eps; i++) {
+
+		if (params->dev_tx_fifo_size[i] > core_if->pwron_txfsiz[i])
+			return 0;
+		start_addr += params->dev_tx_fifo_size[i];
+	}
+
+	return 1;
+}
+
+/**
+ * This function resizes Device mode FIFOs
+ * 
+ * @param core_if Programming view of DWC_otg controller
+ *
+ * @return 1 if successful, 0 otherwise
+ *
+ */
+static uint8_t resize_fifos(dwc_otg_core_if_t * core_if)
+{
+	int i = 0;
+	dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs;
+	dwc_otg_core_params_t *params = core_if->core_params;
+	uint32_t rx_fifo_size;
+	fifosize_data_t nptxfifosize;
+	fifosize_data_t txfifosize[15];
+
+	uint32_t rx_fsz_bak;
+	uint32_t nptxfsz_bak;
+	uint32_t txfsz_bak[15];
+
+	uint16_t start_address;
+	uint8_t retval = 1;
+
+	if (!check_fifo_sizes(core_if)) {
+		return 0;
+	}
+
+	/* Configure data FIFO sizes */
+	if (core_if->hwcfg2.b.dynamic_fifo && params->enable_dynamic_fifo) {
+		rx_fsz_bak = DWC_READ_REG32(&global_regs->grxfsiz);
+		rx_fifo_size = params->dev_rx_fifo_size;
+		DWC_WRITE_REG32(&global_regs->grxfsiz, rx_fifo_size);
+
+		/*
+		 * Tx FIFOs These FIFOs are numbered from 1 to 15.
+		 * Indexes of the FIFO size module parameters in the
+		 * dev_tx_fifo_size array and the FIFO size registers in
+		 * the dtxfsiz array run from 0 to 14.
+		 */
+
+		/* Non-periodic Tx FIFO */
+		nptxfsz_bak = DWC_READ_REG32(&global_regs->gnptxfsiz);
+		nptxfifosize.b.depth = params->dev_nperio_tx_fifo_size;
+		start_address = params->dev_rx_fifo_size;
+		nptxfifosize.b.startaddr = start_address;
+
+		DWC_WRITE_REG32(&global_regs->gnptxfsiz, nptxfifosize.d32);
+
+		start_address += nptxfifosize.b.depth;
+
+		for (i = 0; i < core_if->hwcfg4.b.num_in_eps; i++) {
+			txfsz_bak[i] = DWC_READ_REG32(&global_regs->dtxfsiz[i]);
+
+			txfifosize[i].b.depth = params->dev_tx_fifo_size[i];
+			txfifosize[i].b.startaddr = start_address;
+			DWC_WRITE_REG32(&global_regs->dtxfsiz[i],
+					txfifosize[i].d32);
+
+			start_address += txfifosize[i].b.depth;
+		}
+
+		/** Check if register values are set correctly */
+		if (rx_fifo_size != DWC_READ_REG32(&global_regs->grxfsiz)) {
+			retval = 0;
+		}
+
+		if (nptxfifosize.d32 != DWC_READ_REG32(&global_regs->gnptxfsiz)) {
+			retval = 0;
+		}
+
+		for (i = 0; i < core_if->hwcfg4.b.num_in_eps; i++) {
+			if (txfifosize[i].d32 !=
+			    DWC_READ_REG32(&global_regs->dtxfsiz[i])) {
+				retval = 0;
+			}
+		}
+
+		/** If register values are not set correctly, reset old values */
+		if (retval == 0) {
+			DWC_WRITE_REG32(&global_regs->grxfsiz, rx_fsz_bak);
+
+			/* Non-periodic Tx FIFO */
+			DWC_WRITE_REG32(&global_regs->gnptxfsiz, nptxfsz_bak);
+
+			for (i = 0; i < core_if->hwcfg4.b.num_in_eps; i++) {
+				DWC_WRITE_REG32(&global_regs->dtxfsiz[i],
+						txfsz_bak[i]);
+			}
+		}
+	} else {
+		return 0;
+	}
+
+	/* Flush the FIFOs */
+	dwc_otg_flush_tx_fifo(core_if, 0x10);	/* all Tx FIFOs */
+	dwc_otg_flush_rx_fifo(core_if);
+
+	return retval;
+}
+
+/**
+ * This function sets a new value for the buffer Alignment setup.
+ */
+static int cfi_ep_set_tx_fifo_val(uint8_t * buf, dwc_otg_pcd_t * pcd)
+{
+	int retval;
+	uint32_t fsiz;
+	uint16_t size;
+	uint16_t ep_addr;
+	dwc_otg_pcd_ep_t *ep;
+	dwc_otg_core_params_t *params = GET_CORE_IF(pcd)->core_params;
+	tx_fifo_size_setup_t *ptxfifoval;
+
+	ptxfifoval = (tx_fifo_size_setup_t *) buf;
+	ep_addr = ptxfifoval->bEndpointAddress;
+	size = ptxfifoval->wDepth;
+
+	ep = get_ep_by_addr(pcd, ep_addr);
+
+	CFI_INFO
+	    ("%s: Set Tx FIFO size: endpoint addr=0x%02x, depth=%d, FIFO Num=%d\n",
+	     __func__, ep_addr, size, ep->dwc_ep.tx_fifo_num);
+
+	if (NULL == ep) {
+		CFI_INFO("%s: Unable to get the endpoint addr=0x%02x\n",
+			 __func__, ep_addr);
+		return -DWC_E_INVALID;
+	}
+
+	fsiz = params->dev_tx_fifo_size[ep->dwc_ep.tx_fifo_num - 1];
+	params->dev_tx_fifo_size[ep->dwc_ep.tx_fifo_num - 1] = size;
+
+	if (resize_fifos(GET_CORE_IF(pcd))) {
+		retval = 0;
+	} else {
+		CFI_INFO
+		    ("%s: Error setting the feature Tx FIFO Size for EP%d\n",
+		     __func__, ep_addr);
+		params->dev_tx_fifo_size[ep->dwc_ep.tx_fifo_num - 1] = fsiz;
+		retval = -DWC_E_INVALID;
+	}
+
+	return retval;
+}
+
+/**
+ * This function sets a new value for the buffer Alignment setup.
+ */
+static int cfi_set_rx_fifo_val(uint8_t * buf, dwc_otg_pcd_t * pcd)
+{
+	int retval;
+	uint32_t fsiz;
+	uint16_t size;
+	dwc_otg_core_params_t *params = GET_CORE_IF(pcd)->core_params;
+	rx_fifo_size_setup_t *prxfifoval;
+
+	prxfifoval = (rx_fifo_size_setup_t *) buf;
+	size = prxfifoval->wDepth;
+
+	fsiz = params->dev_rx_fifo_size;
+	params->dev_rx_fifo_size = size;
+
+	if (resize_fifos(GET_CORE_IF(pcd))) {
+		retval = 0;
+	} else {
+		CFI_INFO("%s: Error setting the feature Rx FIFO Size\n",
+			 __func__);
+		params->dev_rx_fifo_size = fsiz;
+		retval = -DWC_E_INVALID;
+	}
+
+	return retval;
+}
+
+/**
+ * This function reads the SG of an EP's buffer setup into the buffer buf
+ */
+static int cfi_ep_get_sg_val(uint8_t * buf, struct dwc_otg_pcd *pcd,
+			     struct cfi_usb_ctrlrequest *req)
+{
+	int retval = -DWC_E_INVALID;
+	uint8_t addr;
+	cfi_ep_t *ep;
+
+	/* The Low Byte of the wValue contains a non-zero address of the endpoint */
+	addr = req->wValue & 0xFF;
+	if (addr == 0)		/* The address should be non-zero */
+		return retval;
+
+	ep = get_cfi_ep_by_addr(pcd->cfi, addr);
+	if (NULL == ep) {
+		CFI_INFO("%s: Unable to get the endpoint address(0x%02x)\n",
+			 __func__, addr);
+		return retval;
+	}
+
+	dwc_memcpy(buf, ep->bm_sg, BS_SG_VAL_DESC_LEN);
+	retval = BS_SG_VAL_DESC_LEN;
+	return retval;
+}
+
+/**
+ * This function reads the Concatenation value of an EP's buffer mode into 
+ * the buffer buf
+ */
+static int cfi_ep_get_concat_val(uint8_t * buf, struct dwc_otg_pcd *pcd,
+				 struct cfi_usb_ctrlrequest *req)
+{
+	int retval = -DWC_E_INVALID;
+	uint8_t addr;
+	cfi_ep_t *ep;
+	uint8_t desc_count;
+
+	/* The Low Byte of the wValue contains a non-zero address of the endpoint */
+	addr = req->wValue & 0xFF;
+	if (addr == 0)		/* The address should be non-zero */
+		return retval;
+
+	ep = get_cfi_ep_by_addr(pcd->cfi, addr);
+	if (NULL == ep) {
+		CFI_INFO("%s: Unable to get the endpoint address(0x%02x)\n",
+			 __func__, addr);
+		return retval;
+	}
+
+	/* Copy the header to the buffer */
+	dwc_memcpy(buf, ep->bm_concat, BS_CONCAT_VAL_HDR_LEN);
+	/* Advance the buffer pointer by the header size */
+	buf += BS_CONCAT_VAL_HDR_LEN;
+
+	desc_count = ep->bm_concat->hdr.bDescCount;
+	/* Copy alll the wTxBytes to the buffer */
+	dwc_memcpy(buf, ep->bm_concat->wTxBytes, sizeof(uid16_t) * desc_count);
+
+	retval = BS_CONCAT_VAL_HDR_LEN + sizeof(uid16_t) * desc_count;
+	return retval;
+}
+
+/**
+ * This function reads the buffer Alignment value of an EP's buffer mode into 
+ * the buffer buf
+ *
+ * @return The total number of bytes copied to the buffer or negative error code.
+ */
+static int cfi_ep_get_align_val(uint8_t * buf, struct dwc_otg_pcd *pcd,
+				struct cfi_usb_ctrlrequest *req)
+{
+	int retval = -DWC_E_INVALID;
+	uint8_t addr;
+	cfi_ep_t *ep;
+
+	/* The Low Byte of the wValue contains a non-zero address of the endpoint */
+	addr = req->wValue & 0xFF;
+	if (addr == 0)		/* The address should be non-zero */
+		return retval;
+
+	ep = get_cfi_ep_by_addr(pcd->cfi, addr);
+	if (NULL == ep) {
+		CFI_INFO("%s: Unable to get the endpoint address(0x%02x)\n",
+			 __func__, addr);
+		return retval;
+	}
+
+	dwc_memcpy(buf, ep->bm_align, BS_ALIGN_VAL_HDR_LEN);
+	retval = BS_ALIGN_VAL_HDR_LEN;
+
+	return retval;
+}
+
+/**
+ * This function sets a new value for the specified feature
+ * 
+ * @param	pcd	A pointer to the PCD object
+ * 
+ * @return 0 if successful, negative error code otherwise to stall the DCE.
+ */
+static int cfi_set_feature_value(struct dwc_otg_pcd *pcd)
+{
+	int retval = -DWC_E_NOT_SUPPORTED;
+	uint16_t wIndex, wValue;
+	uint8_t bRequest;
+	struct dwc_otg_core_if *coreif;
+	cfiobject_t *cfi = pcd->cfi;
+	struct cfi_usb_ctrlrequest *ctrl_req;
+	uint8_t *buf;
+	ctrl_req = &cfi->ctrl_req;
+
+	buf = pcd->cfi->ctrl_req.data;
+
+	coreif = GET_CORE_IF(pcd);
+	bRequest = ctrl_req->bRequest;
+	wIndex = DWC_CONSTANT_CPU_TO_LE16(ctrl_req->wIndex);
+	wValue = DWC_CONSTANT_CPU_TO_LE16(ctrl_req->wValue);
+
+	/* See which feature is to be modified */
+	switch (wIndex) {
+	case FT_ID_DMA_BUFFER_SETUP:
+		/* Modify the feature */
+		if ((retval = cfi_ep_set_sg_val(buf, pcd)) < 0)
+			return retval;
+
+		/* And send this request to the gadget */
+		cfi->need_gadget_att = 1;
+		break;
+
+	case FT_ID_DMA_BUFF_ALIGN:
+		if ((retval = cfi_ep_set_alignment_val(buf, pcd)) < 0)
+			return retval;
+		cfi->need_gadget_att = 1;
+		break;
+
+	case FT_ID_DMA_CONCAT_SETUP:
+		/* Modify the feature */
+		if ((retval = cfi_ep_set_concat_val(buf, pcd)) < 0)
+			return retval;
+		cfi->need_gadget_att = 1;
+		break;
+
+	case FT_ID_DMA_CIRCULAR:
+		CFI_INFO("FT_ID_DMA_CIRCULAR\n");
+		break;
+
+	case FT_ID_THRESHOLD_SETUP:
+		CFI_INFO("FT_ID_THRESHOLD_SETUP\n");
+		break;
+
+	case FT_ID_DFIFO_DEPTH:
+		CFI_INFO("FT_ID_DFIFO_DEPTH\n");
+		break;
+
+	case FT_ID_TX_FIFO_DEPTH:
+		CFI_INFO("FT_ID_TX_FIFO_DEPTH\n");
+		if ((retval = cfi_ep_set_tx_fifo_val(buf, pcd)) < 0)
+			return retval;
+		cfi->need_gadget_att = 0;
+		break;
+
+	case FT_ID_RX_FIFO_DEPTH:
+		CFI_INFO("FT_ID_RX_FIFO_DEPTH\n");
+		if ((retval = cfi_set_rx_fifo_val(buf, pcd)) < 0)
+			return retval;
+		cfi->need_gadget_att = 0;
+		break;
+	}
+
+	return retval;
+}
+
+#endif //DWC_UTE_CFI
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_cfi.h linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_cfi.h
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_cfi.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_cfi.h	2017-09-23 03:42:50.198674513 +0800
@@ -0,0 +1,320 @@
+/* ==========================================================================
+ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+ * otherwise expressly agreed to in writing between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product under
+ * any End User Software License Agreement or Agreement for Licensed Product
+ * with Synopsys or any supplement thereto. You are permitted to use and
+ * redistribute this Software in source and binary forms, with or without
+ * modification, provided that redistributions of source code must retain this
+ * notice. You may not view, use, disclose, copy or distribute this file or
+ * any information contained herein except pursuant to this license grant from
+ * Synopsys. If you do not agree with this notice, including the disclaimer
+ * below, then you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================== */
+
+#if !defined(__DWC_OTG_CFI_H__)
+#define __DWC_OTG_CFI_H__
+
+#include "dwc_otg_pcd.h"
+#include "dwc_cfi_common.h"
+
+/**
+ * @file
+ * This file contains the CFI related OTG PCD specific common constants, 
+ * interfaces(functions and macros) and data structures.The CFI Protocol is an 
+ * optional interface for internal testing purposes that a DUT may implement to 
+ * support testing of configurable features.
+ *
+ */
+
+struct dwc_otg_pcd;
+struct dwc_otg_pcd_ep;
+
+/** OTG CFI Features (properties) ID constants */
+/** This is a request for all Core Features */
+#define FT_ID_DMA_MODE					0x0001
+#define FT_ID_DMA_BUFFER_SETUP			0x0002
+#define FT_ID_DMA_BUFF_ALIGN			0x0003
+#define FT_ID_DMA_CONCAT_SETUP			0x0004
+#define FT_ID_DMA_CIRCULAR				0x0005
+#define FT_ID_THRESHOLD_SETUP			0x0006
+#define FT_ID_DFIFO_DEPTH				0x0007
+#define FT_ID_TX_FIFO_DEPTH				0x0008
+#define FT_ID_RX_FIFO_DEPTH				0x0009
+
+/**********************************************************/
+#define CFI_INFO_DEF
+
+#ifdef CFI_INFO_DEF
+#define CFI_INFO(fmt...)	DWC_PRINTF("CFI: " fmt);
+#else
+#define CFI_INFO(fmt...)
+#endif
+
+#define min(x,y) ({ \
+	x < y ? x : y; })
+
+#define max(x,y) ({ \
+	x > y ? x : y; })
+
+/**
+ * Descriptor DMA SG Buffer setup structure (SG buffer). This structure is
+ * also used for setting up a buffer for Circular DDMA.
+ */
+struct _ddma_sg_buffer_setup {
+#define BS_SG_VAL_DESC_LEN	6
+	/* The OUT EP address */
+	uint8_t bOutEndpointAddress;
+	/* The IN EP address */
+	uint8_t bInEndpointAddress;
+	/* Number of bytes to put between transfer segments (must be DWORD boundaries) */
+	uint8_t bOffset;
+	/* The number of transfer segments (a DMA descriptors per each segment) */
+	uint8_t bCount;
+	/* Size (in byte) of each transfer segment */
+	uint16_t wSize;
+} __attribute__ ((packed));
+typedef struct _ddma_sg_buffer_setup ddma_sg_buffer_setup_t;
+
+/** Descriptor DMA Concatenation Buffer setup structure */
+struct _ddma_concat_buffer_setup_hdr {
+#define BS_CONCAT_VAL_HDR_LEN	4
+	/* The endpoint for which the buffer is to be set up */
+	uint8_t bEndpointAddress;
+	/* The count of descriptors to be used */
+	uint8_t bDescCount;
+	/* The total size of the transfer */
+	uint16_t wSize;
+} __attribute__ ((packed));
+typedef struct _ddma_concat_buffer_setup_hdr ddma_concat_buffer_setup_hdr_t;
+
+/** Descriptor DMA Concatenation Buffer setup structure */
+struct _ddma_concat_buffer_setup {
+	/* The SG header */
+	ddma_concat_buffer_setup_hdr_t hdr;
+
+	/* The XFER sizes pointer (allocated dynamically) */
+	uint16_t *wTxBytes;
+} __attribute__ ((packed));
+typedef struct _ddma_concat_buffer_setup ddma_concat_buffer_setup_t;
+
+/** Descriptor DMA Alignment Buffer setup structure */
+struct _ddma_align_buffer_setup {
+#define BS_ALIGN_VAL_HDR_LEN	2
+	uint8_t bEndpointAddress;
+	uint8_t bAlign;
+} __attribute__ ((packed));
+typedef struct _ddma_align_buffer_setup ddma_align_buffer_setup_t;
+
+/** Transmit FIFO Size setup structure */
+struct _tx_fifo_size_setup {
+	uint8_t bEndpointAddress;
+	uint16_t wDepth;
+} __attribute__ ((packed));
+typedef struct _tx_fifo_size_setup tx_fifo_size_setup_t;
+
+/** Transmit FIFO Size setup structure */
+struct _rx_fifo_size_setup {
+	uint16_t wDepth;
+} __attribute__ ((packed));
+typedef struct _rx_fifo_size_setup rx_fifo_size_setup_t;
+
+/**
+ * struct cfi_usb_ctrlrequest - the CFI implementation of the struct usb_ctrlrequest
+ * This structure encapsulates the standard usb_ctrlrequest and adds a pointer
+ * to the data returned in the data stage of a 3-stage Control Write requests.
+ */
+struct cfi_usb_ctrlrequest {
+	uint8_t bRequestType;
+	uint8_t bRequest;
+	uint16_t wValue;
+	uint16_t wIndex;
+	uint16_t wLength;
+	uint8_t *data;
+} UPACKED;
+
+/*---------------------------------------------------------------------------*/
+
+/**
+ * The CFI wrapper of the enabled and activated dwc_otg_pcd_ep structures.
+ * This structure is used to store the buffer setup data for any
+ * enabled endpoint in the PCD.
+ */
+struct cfi_ep {
+	/* Entry for the list container */
+	dwc_list_link_t lh;
+	/* Pointer to the active PCD endpoint structure */
+	struct dwc_otg_pcd_ep *ep;
+	/* The last descriptor in the chain of DMA descriptors of the endpoint */
+	struct dwc_otg_dma_desc *dma_desc_last;
+	/* The SG feature value */
+	ddma_sg_buffer_setup_t *bm_sg;
+	/* The Circular feature value */
+	ddma_sg_buffer_setup_t *bm_circ;
+	/* The Concatenation feature value */
+	ddma_concat_buffer_setup_t *bm_concat;
+	/* The Alignment feature value */
+	ddma_align_buffer_setup_t *bm_align;
+	/* XFER length */
+	uint32_t xfer_len;
+	/*
+	 * Count of DMA descriptors currently used.
+	 * The total should not exceed the MAX_DMA_DESCS_PER_EP value
+	 * defined in the dwc_otg_cil.h
+	 */
+	uint32_t desc_count;
+};
+typedef struct cfi_ep cfi_ep_t;
+
+typedef struct cfi_dma_buff {
+#define CFI_IN_BUF_LEN	1024
+#define CFI_OUT_BUF_LEN	1024
+	dma_addr_t addr;
+	uint8_t *buf;
+} cfi_dma_buff_t;
+
+struct cfiobject;
+
+/**
+ * This is the interface for the CFI operations.
+ *
+ * @param	ep_enable			Called when any endpoint is enabled and activated.
+ * @param	release				Called when the CFI object is released and it needs to correctly
+ *								deallocate the dynamic memory
+ * @param	ctrl_write_complete	Called when the data stage of the request is complete
+ */
+typedef struct cfi_ops {
+	int (*ep_enable) (struct cfiobject * cfi, struct dwc_otg_pcd * pcd,
+			  struct dwc_otg_pcd_ep * ep);
+	void *(*ep_alloc_buf) (struct cfiobject * cfi, struct dwc_otg_pcd * pcd,
+			       struct dwc_otg_pcd_ep * ep, dma_addr_t * dma,
+			       unsigned size, gfp_t flags);
+	void (*release) (struct cfiobject * cfi);
+	int (*ctrl_write_complete) (struct cfiobject * cfi,
+				    struct dwc_otg_pcd * pcd);
+	void (*build_descriptors) (struct cfiobject * cfi,
+				   struct dwc_otg_pcd * pcd,
+				   struct dwc_otg_pcd_ep * ep,
+				   dwc_otg_pcd_request_t * req);
+} cfi_ops_t;
+
+struct cfiobject {
+	cfi_ops_t ops;
+	struct dwc_otg_pcd *pcd;
+	struct usb_gadget *gadget;
+
+	/* Buffers used to send/receive CFI-related request data */
+	cfi_dma_buff_t buf_in;
+	cfi_dma_buff_t buf_out;
+
+	/* CFI specific Control request wrapper */
+	struct cfi_usb_ctrlrequest ctrl_req;
+
+	/* The list of active EP's in the PCD of type cfi_ep_t */
+	dwc_list_link_t active_eps;
+
+	/* This flag shall control the propagation of a specific request
+	 * to the gadget's processing routines.
+	 * 0 - no gadget handling
+	 * 1 - the gadget needs to know about this request (w/o completing a status
+	 * phase - just return a 0 to the _setup callback)
+	 */
+	uint8_t need_gadget_att;
+
+	/* Flag indicating whether the status IN phase needs to be
+	 * completed by the PCD
+	 */
+	uint8_t need_status_in_complete;
+};
+typedef struct cfiobject cfiobject_t;
+
+#define DUMP_MSG
+
+#if defined(DUMP_MSG)
+static inline void dump_msg(const u8 * buf, unsigned int length)
+{
+	unsigned int start, num, i;
+	char line[52], *p;
+
+	if (length >= 512)
+		return;
+
+	start = 0;
+	while (length > 0) {
+		num = min(length, 16u);
+		p = line;
+		for (i = 0; i < num; ++i) {
+			if (i == 8)
+				*p++ = ' ';
+			DWC_SPRINTF(p, " %02x", buf[i]);
+			p += 3;
+		}
+		*p = 0;
+		DWC_DEBUG("%6x: %s\n", start, line);
+		buf += num;
+		start += num;
+		length -= num;
+	}
+}
+#else
+static inline void dump_msg(const u8 * buf, unsigned int length)
+{
+}
+#endif
+
+/**
+ * This function returns a pointer to cfi_ep_t object with the addr address.
+ */
+static inline struct cfi_ep *get_cfi_ep_by_addr(struct cfiobject *cfi,
+						uint8_t addr)
+{
+	struct cfi_ep *pcfiep;
+	dwc_list_link_t *tmp;
+
+	DWC_LIST_FOREACH(tmp, &cfi->active_eps) {
+		pcfiep = DWC_LIST_ENTRY(tmp, struct cfi_ep, lh);
+
+		if (pcfiep->ep->desc->bEndpointAddress == addr) {
+			return pcfiep;
+		}
+	}
+
+	return NULL;
+}
+
+/**
+ * This function returns a pointer to cfi_ep_t object that matches
+ * the dwc_otg_pcd_ep object.
+ */
+static inline struct cfi_ep *get_cfi_ep_by_pcd_ep(struct cfiobject *cfi,
+						  struct dwc_otg_pcd_ep *ep)
+{
+	struct cfi_ep *pcfiep = NULL;
+	dwc_list_link_t *tmp;
+
+	DWC_LIST_FOREACH(tmp, &cfi->active_eps) {
+		pcfiep = DWC_LIST_ENTRY(tmp, struct cfi_ep, lh);
+		if (pcfiep->ep == ep) {
+			return pcfiep;
+		}
+	}
+	return NULL;
+}
+
+int cfi_setup(struct dwc_otg_pcd *pcd, struct cfi_usb_ctrlrequest *ctrl);
+
+#endif /* (__DWC_OTG_CFI_H__) */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/.dwc_otg_cfi.h.swp linux-3.0.82x/drivers/usb/gadget/dwc/driver/.dwc_otg_cfi.h.swp
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_cil.c linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_cil.c
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_cil.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_cil.c	2017-09-23 03:42:50.202674502 +0800
@@ -0,0 +1,6792 @@
+/* ==========================================================================
+ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_cil.c $
+ * $Revision: #182 $
+ * $Date: 2011/05/17 $
+ * $Change: 1774110 $
+ *
+ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+ * otherwise expressly agreed to in writing between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product under
+ * any End User Software License Agreement or Agreement for Licensed Product
+ * with Synopsys or any supplement thereto. You are permitted to use and
+ * redistribute this Software in source and binary forms, with or without
+ * modification, provided that redistributions of source code must retain this
+ * notice. You may not view, use, disclose, copy or distribute this file or
+ * any information contained herein except pursuant to this license grant from
+ * Synopsys. If you do not agree with this notice, including the disclaimer
+ * below, then you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================== */
+
+/** @file
+ *
+ * The Core Interface Layer provides basic services for accessing and
+ * managing the DWC_otg hardware. These services are used by both the
+ * Host Controller Driver and the Peripheral Controller Driver.
+ *
+ * The CIL manages the memory map for the core so that the HCD and PCD
+ * don't have to do this separately. It also handles basic tasks like
+ * reading/writing the registers and data FIFOs in the controller.
+ * Some of the data access functions provide encapsulation of several
+ * operations required to perform a task, such as writing multiple
+ * registers to start a transfer. Finally, the CIL performs basic
+ * services that are not specific to either the host or device modes
+ * of operation. These services include management of the OTG Host
+ * Negotiation Protocol (HNP) and Session Request Protocol (SRP). A
+ * Diagnostic API is also provided to allow testing of the controller
+ * hardware.
+ *
+ * The Core Interface Layer has the following requirements:
+ * - Provides basic controller operations.
+ * - Minimal use of OS services. 
+ * - The OS services used will be abstracted by using inline functions
+ *	 or macros.
+ *
+ */
+
+#include "dwc_os.h"
+#include "dwc_otg_regs.h"
+#include "dwc_otg_cil.h"
+
+static int dwc_otg_setup_params(dwc_otg_core_if_t * core_if);
+
+/**
+ * This function is called to initialize the DWC_otg CSR data
+ * structures. The register addresses in the device and host
+ * structures are initialized from the base address supplied by the
+ * caller. The calling function must make the OS calls to get the
+ * base address of the DWC_otg controller registers. The core_params
+ * argument holds the parameters that specify how the core should be
+ * configured.
+ *
+ * @param reg_base_addr Base address of DWC_otg core registers
+ *
+ */
+dwc_otg_core_if_t *dwc_otg_cil_init(const uint32_t * reg_base_addr)
+{
+	dwc_otg_core_if_t *core_if = 0;
+	dwc_otg_dev_if_t *dev_if = 0;
+	dwc_otg_host_if_t *host_if = 0;
+	uint8_t *reg_base = (uint8_t *) reg_base_addr;
+	int i = 0;
+
+	DWC_DEBUGPL(DBG_CILV, "%s(%p)\n", __func__, reg_base_addr);
+
+	core_if = DWC_ALLOC(sizeof(dwc_otg_core_if_t));
+
+	if (core_if == NULL) {
+		DWC_DEBUGPL(DBG_CIL,
+			    "Allocation of dwc_otg_core_if_t failed\n");
+		return 0;
+	}
+	core_if->core_global_regs = (dwc_otg_core_global_regs_t *) reg_base;
+
+	/*
+	 * Allocate the Device Mode structures.
+	 */
+	dev_if = DWC_ALLOC(sizeof(dwc_otg_dev_if_t));
+
+	if (dev_if == NULL) {
+		DWC_DEBUGPL(DBG_CIL, "Allocation of dwc_otg_dev_if_t failed\n");
+		DWC_FREE(core_if);
+		return 0;
+	}
+
+	dev_if->dev_global_regs =
+	    (dwc_otg_device_global_regs_t *) (reg_base +
+					      DWC_DEV_GLOBAL_REG_OFFSET);
+
+	for (i = 0; i < MAX_EPS_CHANNELS; i++) {
+		dev_if->in_ep_regs[i] = (dwc_otg_dev_in_ep_regs_t *)
+		    (reg_base + DWC_DEV_IN_EP_REG_OFFSET +
+		     (i * DWC_EP_REG_OFFSET));
+
+		dev_if->out_ep_regs[i] = (dwc_otg_dev_out_ep_regs_t *)
+		    (reg_base + DWC_DEV_OUT_EP_REG_OFFSET +
+		     (i * DWC_EP_REG_OFFSET));
+		DWC_DEBUGPL(DBG_CILV, "in_ep_regs[%d]->diepctl=%p\n",
+			    i, &dev_if->in_ep_regs[i]->diepctl);
+		DWC_DEBUGPL(DBG_CILV, "out_ep_regs[%d]->doepctl=%p\n",
+			    i, &dev_if->out_ep_regs[i]->doepctl);
+	}
+
+	dev_if->speed = 0;	// unknown
+
+	core_if->dev_if = dev_if;
+
+	/*
+	 * Allocate the Host Mode structures.
+	 */
+	host_if = DWC_ALLOC(sizeof(dwc_otg_host_if_t));
+
+	if (host_if == NULL) {
+		DWC_DEBUGPL(DBG_CIL,
+			    "Allocation of dwc_otg_host_if_t failed\n");
+		DWC_FREE(dev_if);
+		DWC_FREE(core_if);
+		return 0;
+	}
+
+	host_if->host_global_regs = (dwc_otg_host_global_regs_t *)
+	    (reg_base + DWC_OTG_HOST_GLOBAL_REG_OFFSET);
+
+	host_if->hprt0 =
+	    (uint32_t *) (reg_base + DWC_OTG_HOST_PORT_REGS_OFFSET);
+
+	for (i = 0; i < MAX_EPS_CHANNELS; i++) {
+		host_if->hc_regs[i] = (dwc_otg_hc_regs_t *)
+		    (reg_base + DWC_OTG_HOST_CHAN_REGS_OFFSET +
+		     (i * DWC_OTG_CHAN_REGS_OFFSET));
+		DWC_DEBUGPL(DBG_CILV, "hc_reg[%d]->hcchar=%p\n",
+			    i, &host_if->hc_regs[i]->hcchar);
+	}
+
+	host_if->num_host_channels = MAX_EPS_CHANNELS;
+	core_if->host_if = host_if;
+
+	for (i = 0; i < MAX_EPS_CHANNELS; i++) {
+		core_if->data_fifo[i] =
+		    (uint32_t *) (reg_base + DWC_OTG_DATA_FIFO_OFFSET +
+				  (i * DWC_OTG_DATA_FIFO_SIZE));
+		DWC_DEBUGPL(DBG_CILV, "data_fifo[%d]=0x%08lx\n",
+			    i, (unsigned long)core_if->data_fifo[i]);
+	}
+
+	core_if->pcgcctl = (uint32_t *) (reg_base + DWC_OTG_PCGCCTL_OFFSET);
+
+	/* Initiate lx_state to L3 disconnected state */
+	core_if->lx_state = DWC_OTG_L3;
+	/*
+	 * Store the contents of the hardware configuration registers here for
+	 * easy access later.
+	 */
+	core_if->hwcfg1.d32 =
+	    DWC_READ_REG32(&core_if->core_global_regs->ghwcfg1);
+	core_if->hwcfg2.d32 =
+	    DWC_READ_REG32(&core_if->core_global_regs->ghwcfg2);
+	core_if->hwcfg3.d32 =
+	    DWC_READ_REG32(&core_if->core_global_regs->ghwcfg3);
+	core_if->hwcfg4.d32 =
+	    DWC_READ_REG32(&core_if->core_global_regs->ghwcfg4);
+
+	/* Force host mode to get HPTXFSIZ exact power on value */
+	{
+		gusbcfg_data_t gusbcfg = {.d32 = 0 };
+		gusbcfg.d32 =  DWC_READ_REG32(&core_if->core_global_regs->gusbcfg);
+		gusbcfg.b.force_host_mode = 1;
+		DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg, gusbcfg.d32);
+		dwc_mdelay(100); 
+		core_if->hptxfsiz.d32 =
+		DWC_READ_REG32(&core_if->core_global_regs->hptxfsiz);
+		gusbcfg.d32 =  DWC_READ_REG32(&core_if->core_global_regs->gusbcfg);
+		gusbcfg.b.force_host_mode = 0;
+		DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg, gusbcfg.d32);
+		dwc_mdelay(100); 
+	}
+
+	DWC_DEBUGPL(DBG_CILV, "hwcfg1=%08x\n", core_if->hwcfg1.d32);
+	DWC_DEBUGPL(DBG_CILV, "hwcfg2=%08x\n", core_if->hwcfg2.d32);
+	DWC_DEBUGPL(DBG_CILV, "hwcfg3=%08x\n", core_if->hwcfg3.d32);
+	DWC_DEBUGPL(DBG_CILV, "hwcfg4=%08x\n", core_if->hwcfg4.d32);
+
+	core_if->hcfg.d32 =
+	    DWC_READ_REG32(&core_if->host_if->host_global_regs->hcfg);
+	core_if->dcfg.d32 =
+	    DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dcfg);
+
+	DWC_DEBUGPL(DBG_CILV, "hcfg=%08x\n", core_if->hcfg.d32);
+	DWC_DEBUGPL(DBG_CILV, "dcfg=%08x\n", core_if->dcfg.d32);
+
+	DWC_DEBUGPL(DBG_CILV, "op_mode=%0x\n", core_if->hwcfg2.b.op_mode);
+	DWC_DEBUGPL(DBG_CILV, "arch=%0x\n", core_if->hwcfg2.b.architecture);
+	DWC_DEBUGPL(DBG_CILV, "num_dev_ep=%d\n", core_if->hwcfg2.b.num_dev_ep);
+	DWC_DEBUGPL(DBG_CILV, "num_host_chan=%d\n",
+		    core_if->hwcfg2.b.num_host_chan);
+	DWC_DEBUGPL(DBG_CILV, "nonperio_tx_q_depth=0x%0x\n",
+		    core_if->hwcfg2.b.nonperio_tx_q_depth);
+	DWC_DEBUGPL(DBG_CILV, "host_perio_tx_q_depth=0x%0x\n",
+		    core_if->hwcfg2.b.host_perio_tx_q_depth);
+	DWC_DEBUGPL(DBG_CILV, "dev_token_q_depth=0x%0x\n",
+		    core_if->hwcfg2.b.dev_token_q_depth);
+
+	DWC_DEBUGPL(DBG_CILV, "Total FIFO SZ=%d\n",
+		    core_if->hwcfg3.b.dfifo_depth);
+	DWC_DEBUGPL(DBG_CILV, "xfer_size_cntr_width=%0x\n",
+		    core_if->hwcfg3.b.xfer_size_cntr_width);
+
+	/*
+	 * Set the SRP sucess bit for FS-I2c
+	 */
+	core_if->srp_success = 0;
+	core_if->srp_timer_started = 0;
+
+	/*
+	 * Create new workqueue and init works
+	 */
+	core_if->wq_otg = DWC_WORKQ_ALLOC("dwc_otg");
+	if (core_if->wq_otg == 0) {
+		DWC_WARN("DWC_WORKQ_ALLOC failed\n");
+		DWC_FREE(host_if);
+		DWC_FREE(dev_if);
+		DWC_FREE(core_if);
+		return 0;
+	}
+
+	core_if->snpsid = DWC_READ_REG32(&core_if->core_global_regs->gsnpsid);
+
+	DWC_PRINTF("Core Release: %x.%x%x%x\n",
+		   (core_if->snpsid >> 12 & 0xF),
+		   (core_if->snpsid >> 8 & 0xF),
+		   (core_if->snpsid >> 4 & 0xF), (core_if->snpsid & 0xF));
+
+	core_if->wkp_timer = DWC_TIMER_ALLOC("Wake Up Timer",
+					     w_wakeup_detected, core_if);
+	if (core_if->wkp_timer == 0) {
+		DWC_WARN("DWC_TIMER_ALLOC failed\n");
+		DWC_FREE(host_if);
+		DWC_FREE(dev_if);
+		DWC_WORKQ_FREE(core_if->wq_otg);
+		DWC_FREE(core_if);
+		return 0;
+	}
+
+	if (dwc_otg_setup_params(core_if)) {
+		DWC_WARN("Error while setting core params\n");
+	}
+
+	core_if->hibernation_suspend = 0;
+
+	/** ADP initialization */
+	dwc_otg_adp_init(core_if);
+	
+	return core_if;
+}
+
+/**
+ * This function frees the structures allocated by dwc_otg_cil_init().
+ *
+ * @param core_if The core interface pointer returned from
+ * 		  dwc_otg_cil_init().
+ *
+ */
+void dwc_otg_cil_remove(dwc_otg_core_if_t * core_if)
+{
+	/* Disable all interrupts */
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gahbcfg, 1, 0);
+	DWC_WRITE_REG32(&core_if->core_global_regs->gintmsk, 0);
+
+	if (core_if->wq_otg) {
+		DWC_WORKQ_WAIT_WORK_DONE(core_if->wq_otg, 500);
+		DWC_WORKQ_FREE(core_if->wq_otg);
+	}
+	if (core_if->dev_if) {
+		DWC_FREE(core_if->dev_if);
+	}
+	if (core_if->host_if) {
+		DWC_FREE(core_if->host_if);
+	}
+
+	/** Remove ADP Timers  */
+	dwc_otg_adp_remove(core_if);
+	if (core_if->core_params) {
+		DWC_FREE(core_if->core_params);
+	}
+	if (core_if->wkp_timer) {
+		DWC_TIMER_FREE(core_if->wkp_timer);
+	}
+	if (core_if->srp_timer) {
+		DWC_TIMER_FREE(core_if->srp_timer);
+	}
+	DWC_FREE(core_if);
+}
+
+/**
+ * This function enables the controller's Global Interrupt in the AHB Config
+ * register.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ */
+void dwc_otg_enable_global_interrupts(dwc_otg_core_if_t * core_if)
+{
+	gahbcfg_data_t ahbcfg = {.d32 = 0 };
+	ahbcfg.b.glblintrmsk = 1;	/* Enable interrupts */
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gahbcfg, 0, ahbcfg.d32);
+}
+
+/**
+ * This function disables the controller's Global Interrupt in the AHB Config
+ * register.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ */
+void dwc_otg_disable_global_interrupts(dwc_otg_core_if_t * core_if)
+{
+	gahbcfg_data_t ahbcfg = {.d32 = 0 };
+	ahbcfg.b.glblintrmsk = 1;	/* Disable interrupts */
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gahbcfg, ahbcfg.d32, 0);
+}
+
+/**
+ * This function initializes the commmon interrupts, used in both
+ * device and host modes.
+ *
+ * @param core_if Programming view of the DWC_otg controller
+ *
+ */
+static void dwc_otg_enable_common_interrupts(dwc_otg_core_if_t * core_if)
+{
+	dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs;
+	gintmsk_data_t intr_mask = {.d32 = 0 };
+
+	/* Clear any pending OTG Interrupts */
+	DWC_WRITE_REG32(&global_regs->gotgint, 0xFFFFFFFF);
+
+	/* Clear any pending interrupts */
+	DWC_WRITE_REG32(&global_regs->gintsts, 0xFFFFFFFF);
+
+	/*
+	 * Enable the interrupts in the GINTMSK.
+	 */
+	intr_mask.b.modemismatch = 1;
+	intr_mask.b.otgintr = 1;
+
+	if (!core_if->dma_enable) {
+		intr_mask.b.rxstsqlvl = 1;
+	}
+
+	intr_mask.b.conidstschng = 1;
+	intr_mask.b.wkupintr = 1;
+	intr_mask.b.disconnect = 0;
+	intr_mask.b.usbsuspend = 1;
+	intr_mask.b.sessreqintr = 1;
+#ifdef CONFIG_USB_DWC_OTG_LPM
+	if (core_if->core_params->lpm_enable) {
+		intr_mask.b.lpmtranrcvd = 1;
+	}
+#endif
+	DWC_WRITE_REG32(&global_regs->gintmsk, intr_mask.d32);
+}
+
+/*
+ * The restore operation is modified to support Synopsys Emulated Powerdown and
+ * Hibernation. This function is for exiting from Device mode hibernation by
+ * Host Initiated Resume/Reset and Device Initiated Remote-Wakeup.
+ * @param core_if Programming view of DWC_otg controller.
+ * @param rem_wakeup - indicates whether resume is initiated by Device or Host.
+ * @param reset - indicates whether resume is initiated by Reset.
+ */
+int dwc_otg_device_hibernation_restore(dwc_otg_core_if_t * core_if,
+				       int rem_wakeup, int reset)
+{
+	gpwrdn_data_t gpwrdn = {.d32 = 0 };
+	pcgcctl_data_t pcgcctl = {.d32 = 0 };
+	dctl_data_t dctl = {.d32 = 0 };
+
+	int timeout = 2000;
+
+	if (!core_if->hibernation_suspend) {
+		DWC_PRINTF("Already exited from Hibernation\n");
+		return 1;
+	}
+
+	DWC_DEBUGPL(DBG_PCD, "%s called\n", __FUNCTION__);
+	/* Switch-on voltage to the core */
+	gpwrdn.b.pwrdnswtch = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+	dwc_udelay(10);
+
+	/* Reset core */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pwrdnrstn = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+	dwc_udelay(10);
+
+	/* Assert Restore signal */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.restore = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32);
+	dwc_udelay(10);
+
+	/* Disable power clamps */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pwrdnclmp = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+
+	if (rem_wakeup) {
+		dwc_udelay(70);
+	}
+
+	/* Deassert Reset core */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pwrdnrstn = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32);
+	dwc_udelay(10);
+
+	/* Disable PMU interrupt */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pmuintsel = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+
+	/* Mask interrupts from gpwrdn */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.connect_det_msk = 1;
+	gpwrdn.b.srp_det_msk = 1;
+	gpwrdn.b.disconn_det_msk = 1;
+	gpwrdn.b.rst_det_msk = 1;
+	gpwrdn.b.lnstchng_msk = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+
+	/* Indicates that we are going out from hibernation */
+	core_if->hibernation_suspend = 0;
+
+	/*
+	 * Set Restore Essential Regs bit in PCGCCTL register, restore_mode = 1
+	 * indicates restore from remote_wakeup
+	 */
+	restore_essential_regs(core_if, rem_wakeup, 0);
+
+	/*
+	 * Wait a little for seeing new value of variable hibernation_suspend if
+	 * Restore done interrupt received before polling
+	 */
+	dwc_udelay(10);
+
+	if (core_if->hibernation_suspend == 0) {
+		/*
+		 * Wait For Restore_done Interrupt. This mechanism of polling the interrupt
+		 * is introduced to avoid any possible race conditions
+		 */
+		do {
+			gintsts_data_t gintsts;
+			gintsts.d32 =
+			    DWC_READ_REG32(&core_if->core_global_regs->gintsts);
+			if (gintsts.b.restoredone) {
+				gintsts.d32 = 0;
+				gintsts.b.restoredone = 1;
+				DWC_WRITE_REG32(&core_if->core_global_regs->
+						gintsts, gintsts.d32);
+				DWC_PRINTF("Restore Done Interrupt seen\n");
+				break;
+			}
+			dwc_udelay(10);
+		} while (--timeout);
+		if (!timeout) {
+			DWC_PRINTF("Restore Done interrupt wasn't generated here\n");
+		}
+	}
+	/* Clear all pending interupts */
+	DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, 0xFFFFFFFF);
+
+	/* De-assert Restore */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.restore = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+	dwc_udelay(10);
+
+	if (!rem_wakeup) {
+		pcgcctl.d32 = 0;
+		pcgcctl.b.rstpdwnmodule = 1;
+		DWC_MODIFY_REG32(core_if->pcgcctl, pcgcctl.d32, 0);
+	}
+
+	/* Restore GUSBCFG and DCFG */
+	DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg,
+			core_if->gr_backup->gusbcfg_local);
+	DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dcfg,
+			core_if->dr_backup->dcfg);
+
+	/* De-assert Wakeup Logic */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pmuactv = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+	dwc_udelay(10);
+
+	if (!rem_wakeup) {
+		/* Set Device programming done bit */
+		dctl.b.pwronprgdone = 1;
+		DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->dctl, 0, dctl.d32);
+	} else {
+		/* Start Remote Wakeup Signaling */
+		dctl.d32 = core_if->dr_backup->dctl;
+		dctl.b.rmtwkupsig = 1;
+		DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dctl, dctl.d32);
+	}
+
+	dwc_mdelay(2);
+	/* Clear all pending interupts */
+	DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, 0xFFFFFFFF);
+
+	/* Restore global registers */
+	dwc_otg_restore_global_regs(core_if);
+	/* Restore device global registers */
+	dwc_otg_restore_dev_regs(core_if, rem_wakeup);
+
+	if (rem_wakeup) {
+		dwc_mdelay(7);
+		dctl.d32 = 0;
+		dctl.b.rmtwkupsig = 1;
+		DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->dctl, dctl.d32, 0);
+	}
+
+	core_if->hibernation_suspend = 0;
+	/* The core will be in ON STATE */
+	core_if->lx_state = DWC_OTG_L0;
+	DWC_PRINTF("Hibernation recovery completes here\n");
+
+	return 1;
+}
+
+/*
+ * The restore operation is modified to support Synopsys Emulated Powerdown and
+ * Hibernation. This function is for exiting from Host mode hibernation by
+ * Host Initiated Resume/Reset and Device Initiated Remote-Wakeup.
+ * @param core_if Programming view of DWC_otg controller.
+ * @param rem_wakeup - indicates whether resume is initiated by Device or Host.
+ * @param reset - indicates whether resume is initiated by Reset.
+ */
+int dwc_otg_host_hibernation_restore(dwc_otg_core_if_t * core_if,
+				     int rem_wakeup, int reset)
+{
+	gpwrdn_data_t gpwrdn = {.d32 = 0 };
+	hprt0_data_t hprt0 = {.d32 = 0 };
+
+	int timeout = 2000;
+
+	DWC_DEBUGPL(DBG_HCD, "%s called\n", __FUNCTION__);
+	/* Switch-on voltage to the core */
+	gpwrdn.b.pwrdnswtch = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+	dwc_udelay(10);
+
+	/* Reset core */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pwrdnrstn = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+	dwc_udelay(10);
+
+	/* Assert Restore signal */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.restore = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32);
+	dwc_udelay(10);
+
+	/* Disable power clamps */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pwrdnclmp = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+
+	if (!rem_wakeup) {
+		dwc_udelay(50);
+	}
+
+	/* Deassert Reset core */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pwrdnrstn = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32);
+	dwc_udelay(10);
+
+	/* Disable PMU interrupt */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pmuintsel = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+
+	gpwrdn.d32 = 0;
+	gpwrdn.b.connect_det_msk = 1;
+	gpwrdn.b.srp_det_msk = 1;
+	gpwrdn.b.disconn_det_msk = 1;
+	gpwrdn.b.rst_det_msk = 1;
+	gpwrdn.b.lnstchng_msk = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+
+	/* Indicates that we are going out from hibernation */
+	core_if->hibernation_suspend = 0;
+
+	/* Set Restore Essential Regs bit in PCGCCTL register */
+	restore_essential_regs(core_if, rem_wakeup, 1);
+
+	/* Wait a little for seeing new value of variable hibernation_suspend if
+	 * Restore done interrupt received before polling */
+	dwc_udelay(10);
+
+	if (core_if->hibernation_suspend == 0) {
+		/* Wait For Restore_done Interrupt. This mechanism of polling the
+		 * interrupt is introduced to avoid any possible race conditions
+		 */
+		do {
+			gintsts_data_t gintsts;
+			gintsts.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintsts);
+			if (gintsts.b.restoredone) {
+				gintsts.d32 = 0;
+				gintsts.b.restoredone = 1;
+         		DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, gintsts.d32);
+				DWC_DEBUGPL(DBG_HCD,"Restore Done Interrupt seen\n");	
+				break;
+			}
+			dwc_udelay(10);
+		} while (--timeout);
+		if (!timeout) {
+			DWC_WARN("Restore Done interrupt wasn't generated\n");
+		}
+	}
+
+	/* Set the flag's value to 0 again after receiving restore done interrupt */
+	core_if->hibernation_suspend = 0;
+
+	/* This step is not described in functional spec but if not wait for this
+	 * delay, mismatch interrupts occurred because just after restore core is
+	 * in Device mode(gintsts.curmode == 0) */
+	dwc_mdelay(100);
+
+	/* Clear all pending interrupts */
+	DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, 0xFFFFFFFF);
+
+	/* De-assert Restore */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.restore = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+	dwc_udelay(10);
+
+	/* Restore GUSBCFG and HCFG */
+	DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg,
+			core_if->gr_backup->gusbcfg_local);
+	DWC_WRITE_REG32(&core_if->host_if->host_global_regs->hcfg,
+			core_if->hr_backup->hcfg_local);
+
+	/* De-assert Wakeup Logic */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pmuactv = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+	dwc_udelay(10);
+
+	/* Start the Resume operation by programming HPRT0 */
+	hprt0.d32 = core_if->hr_backup->hprt0_local;
+	hprt0.b.prtpwr = 1;
+	hprt0.b.prtena = 0;
+	hprt0.b.prtsusp = 0;
+	DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+
+	DWC_PRINTF("Resume Starts Now\n");
+	if (!reset) {		// Indicates it is Resume Operation
+		hprt0.d32 = core_if->hr_backup->hprt0_local;
+		hprt0.b.prtres = 1;
+		hprt0.b.prtpwr = 1;
+		hprt0.b.prtena = 0;
+		hprt0.b.prtsusp = 0;
+		DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+
+		if (!rem_wakeup)
+			hprt0.b.prtres = 0;
+		/* Wait for Resume time and then program HPRT again */
+		dwc_mdelay(100);
+		DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+
+	} else {		// Indicates it is Reset Operation
+		hprt0.d32 = core_if->hr_backup->hprt0_local;
+		hprt0.b.prtrst = 1;
+		hprt0.b.prtpwr = 1;
+		hprt0.b.prtena = 0;
+		hprt0.b.prtsusp = 0;
+		DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+		/* Wait for Reset time and then program HPRT again */
+		dwc_mdelay(60);
+		hprt0.b.prtrst = 0;
+		DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+	}
+	/* Clear all interrupt status */
+	hprt0.d32 = dwc_otg_read_hprt0(core_if);
+	hprt0.b.prtconndet = 1;
+	hprt0.b.prtenchng = 1;
+	DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+
+	/* Clear all pending interupts */
+	DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, 0xFFFFFFFF);
+
+	/* Restore global registers */
+	dwc_otg_restore_global_regs(core_if);
+	/* Restore host global registers */
+	dwc_otg_restore_host_regs(core_if, reset);
+
+	/* The core will be in ON STATE */
+	core_if->lx_state = DWC_OTG_L0;
+	DWC_PRINTF("Hibernation recovery is complete here\n");
+	return 0;
+}
+
+/** Saves some register values into system memory. */
+int dwc_otg_save_global_regs(dwc_otg_core_if_t * core_if)
+{
+	struct dwc_otg_global_regs_backup *gr;
+	int i;
+
+	gr = core_if->gr_backup;
+	if (!gr) {
+		gr = DWC_ALLOC(sizeof(*gr));
+		if (!gr) {
+			return -DWC_E_NO_MEMORY;
+		}
+		core_if->gr_backup = gr;
+	}
+
+	gr->gotgctl_local = DWC_READ_REG32(&core_if->core_global_regs->gotgctl);
+	gr->gintmsk_local = DWC_READ_REG32(&core_if->core_global_regs->gintmsk);
+	gr->gahbcfg_local = DWC_READ_REG32(&core_if->core_global_regs->gahbcfg);
+	gr->gusbcfg_local = DWC_READ_REG32(&core_if->core_global_regs->gusbcfg);
+	gr->grxfsiz_local = DWC_READ_REG32(&core_if->core_global_regs->grxfsiz);
+	gr->gnptxfsiz_local = DWC_READ_REG32(&core_if->core_global_regs->gnptxfsiz);
+	gr->hptxfsiz_local = DWC_READ_REG32(&core_if->core_global_regs->hptxfsiz);
+#ifdef CONFIG_USB_DWC_OTG_LPM
+	gr->glpmcfg_local = DWC_READ_REG32(&core_if->core_global_regs->glpmcfg);
+#endif
+	gr->gi2cctl_local = DWC_READ_REG32(&core_if->core_global_regs->gi2cctl);
+	gr->pcgcctl_local = DWC_READ_REG32(core_if->pcgcctl);
+	gr->gdfifocfg_local =
+	    DWC_READ_REG32(&core_if->core_global_regs->gdfifocfg);
+	for (i = 0; i < MAX_EPS_CHANNELS; i++) {
+		gr->dtxfsiz_local[i] =
+		    DWC_READ_REG32(&(core_if->core_global_regs->dtxfsiz[i]));
+	}
+
+	DWC_DEBUGPL(DBG_ANY, "===========Backing Global registers==========\n");
+	DWC_DEBUGPL(DBG_ANY, "Backed up gotgctl   = %08x\n", gr->gotgctl_local);
+	DWC_DEBUGPL(DBG_ANY, "Backed up gintmsk   = %08x\n", gr->gintmsk_local);
+	DWC_DEBUGPL(DBG_ANY, "Backed up gahbcfg   = %08x\n", gr->gahbcfg_local);
+	DWC_DEBUGPL(DBG_ANY, "Backed up gusbcfg   = %08x\n", gr->gusbcfg_local);
+	DWC_DEBUGPL(DBG_ANY, "Backed up grxfsiz   = %08x\n", gr->grxfsiz_local);
+	DWC_DEBUGPL(DBG_ANY, "Backed up gnptxfsiz = %08x\n",
+		    gr->gnptxfsiz_local);
+	DWC_DEBUGPL(DBG_ANY, "Backed up hptxfsiz  = %08x\n",
+		    gr->hptxfsiz_local);
+#ifdef CONFIG_USB_DWC_OTG_LPM
+	DWC_DEBUGPL(DBG_ANY, "Backed up glpmcfg   = %08x\n", gr->glpmcfg_local);
+#endif
+	DWC_DEBUGPL(DBG_ANY, "Backed up gi2cctl   = %08x\n", gr->gi2cctl_local);
+	DWC_DEBUGPL(DBG_ANY, "Backed up pcgcctl   = %08x\n", gr->pcgcctl_local);
+	DWC_DEBUGPL(DBG_ANY,"Backed up gdfifocfg   = %08x\n",gr->gdfifocfg_local);
+
+	return 0;
+}
+
+/** Saves GINTMSK register before setting the msk bits. */
+int dwc_otg_save_gintmsk_reg(dwc_otg_core_if_t * core_if)
+{
+	struct dwc_otg_global_regs_backup *gr;
+
+	gr = core_if->gr_backup;
+	if (!gr) {
+		gr = DWC_ALLOC(sizeof(*gr));
+		if (!gr) {
+			return -DWC_E_NO_MEMORY;
+		}
+		core_if->gr_backup = gr;
+	}
+
+	gr->gintmsk_local = DWC_READ_REG32(&core_if->core_global_regs->gintmsk);
+
+	DWC_DEBUGPL(DBG_ANY,"=============Backing GINTMSK registers============\n");
+	DWC_DEBUGPL(DBG_ANY, "Backed up gintmsk   = %08x\n", gr->gintmsk_local);
+
+	return 0;
+}
+
+int dwc_otg_save_dev_regs(dwc_otg_core_if_t * core_if)
+{
+	struct dwc_otg_dev_regs_backup *dr;
+	int i;
+
+	dr = core_if->dr_backup;
+	if (!dr) {
+		dr = DWC_ALLOC(sizeof(*dr));
+		if (!dr) {
+			return -DWC_E_NO_MEMORY;
+		}
+		core_if->dr_backup = dr;
+	}
+
+	dr->dcfg = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dcfg);
+	dr->dctl = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dctl);
+	dr->daintmsk =
+	    DWC_READ_REG32(&core_if->dev_if->dev_global_regs->daintmsk);
+	dr->diepmsk =
+	    DWC_READ_REG32(&core_if->dev_if->dev_global_regs->diepmsk);
+	dr->doepmsk =
+	    DWC_READ_REG32(&core_if->dev_if->dev_global_regs->doepmsk);
+
+	for (i = 0; i < core_if->dev_if->num_in_eps; ++i) {
+		dr->diepctl[i] =
+		    DWC_READ_REG32(&core_if->dev_if->in_ep_regs[i]->diepctl);
+		dr->dieptsiz[i] =
+		    DWC_READ_REG32(&core_if->dev_if->in_ep_regs[i]->dieptsiz);
+		dr->diepdma[i] =
+		    DWC_READ_REG32(&core_if->dev_if->in_ep_regs[i]->diepdma);
+	}
+
+	for (i = 0; i < core_if->dev_if->num_out_eps; ++i) {
+		dr->doepfn[i] =
+		    DWC_READ_REG32(&core_if->dev_if->out_ep_regs[i]->doepfn);
+	}
+
+	DWC_DEBUGPL(DBG_ANY,
+		    "=============Backing Host registers==============\n");
+	DWC_DEBUGPL(DBG_ANY, "Backed up dcfg            = %08x\n", dr->dcfg);
+	DWC_DEBUGPL(DBG_ANY, "Backed up dctl        = %08x\n", dr->dctl);
+	DWC_DEBUGPL(DBG_ANY, "Backed up daintmsk            = %08x\n",
+		    dr->daintmsk);
+	DWC_DEBUGPL(DBG_ANY, "Backed up diepmsk        = %08x\n", dr->diepmsk);
+	DWC_DEBUGPL(DBG_ANY, "Backed up doepmsk        = %08x\n", dr->doepmsk);
+	for (i = 0; i < core_if->dev_if->num_in_eps; ++i) {
+		DWC_DEBUGPL(DBG_ANY, "Backed up diepctl[%d]        = %08x\n", i,
+			    dr->diepctl[i]);
+		DWC_DEBUGPL(DBG_ANY, "Backed up dieptsiz[%d]        = %08x\n",
+			    i, dr->dieptsiz[i]);
+		DWC_DEBUGPL(DBG_ANY, "Backed up diepdma[%d]        = %08x\n", i,
+			    dr->diepdma[i]);
+	}
+
+	return 0;
+}
+
+int dwc_otg_save_host_regs(dwc_otg_core_if_t * core_if)
+{
+	struct dwc_otg_host_regs_backup *hr;
+	int i;
+
+	hr = core_if->hr_backup;
+	if (!hr) {
+		hr = DWC_ALLOC(sizeof(*hr));
+		if (!hr) {
+			return -DWC_E_NO_MEMORY;
+		}
+		core_if->hr_backup = hr;
+	}
+
+	hr->hcfg_local =
+	    DWC_READ_REG32(&core_if->host_if->host_global_regs->hcfg);
+	hr->haintmsk_local =
+	    DWC_READ_REG32(&core_if->host_if->host_global_regs->haintmsk);
+	for (i = 0; i < dwc_otg_get_param_host_channels(core_if); ++i) {
+		hr->hcintmsk_local[i] =
+		    DWC_READ_REG32(&core_if->host_if->hc_regs[i]->hcintmsk);
+	}
+	hr->hprt0_local = DWC_READ_REG32(core_if->host_if->hprt0);
+	hr->hfir_local =
+	    DWC_READ_REG32(&core_if->host_if->host_global_regs->hfir);
+
+	DWC_DEBUGPL(DBG_ANY,
+		    "=============Backing Host registers===============\n");
+	DWC_DEBUGPL(DBG_ANY, "Backed up hcfg		= %08x\n",
+		    hr->hcfg_local);
+	DWC_DEBUGPL(DBG_ANY, "Backed up haintmsk = %08x\n", hr->haintmsk_local);
+	for (i = 0; i < dwc_otg_get_param_host_channels(core_if); ++i) {
+		DWC_DEBUGPL(DBG_ANY, "Backed up hcintmsk[%02d]=%08x\n", i,
+			    hr->hcintmsk_local[i]);
+	}
+	DWC_DEBUGPL(DBG_ANY, "Backed up hprt0           = %08x\n",
+		    hr->hprt0_local);
+	DWC_DEBUGPL(DBG_ANY, "Backed up hfir           = %08x\n",
+		    hr->hfir_local);
+
+	return 0;
+}
+
+int dwc_otg_restore_global_regs(dwc_otg_core_if_t *core_if)
+{
+	struct dwc_otg_global_regs_backup *gr;
+	int i;
+
+	gr = core_if->gr_backup;
+	if (!gr) {
+		return -DWC_E_INVALID;
+	}
+   
+	DWC_WRITE_REG32(&core_if->core_global_regs->gotgctl, gr->gotgctl_local);
+	DWC_WRITE_REG32(&core_if->core_global_regs->gintmsk, gr->gintmsk_local);
+	DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg, gr->gusbcfg_local);
+	DWC_WRITE_REG32(&core_if->core_global_regs->gahbcfg, gr->gahbcfg_local);
+	DWC_WRITE_REG32(&core_if->core_global_regs->grxfsiz, gr->grxfsiz_local);
+	DWC_WRITE_REG32(&core_if->core_global_regs->gnptxfsiz,
+			gr->gnptxfsiz_local);
+	DWC_WRITE_REG32(&core_if->core_global_regs->hptxfsiz,
+			gr->hptxfsiz_local);
+	DWC_WRITE_REG32(&core_if->core_global_regs->gdfifocfg,
+			gr->gdfifocfg_local);
+	for (i = 0; i < MAX_EPS_CHANNELS; i++) {
+		DWC_WRITE_REG32(&core_if->core_global_regs->dtxfsiz[i],
+				gr->dtxfsiz_local[i]);
+	}
+
+	DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, 0xFFFFFFFF);
+	DWC_WRITE_REG32(core_if->host_if->hprt0, 0x0000100A);
+	DWC_WRITE_REG32(&core_if->core_global_regs->gahbcfg,
+			(gr->gahbcfg_local));
+	return 0;
+}
+
+int dwc_otg_restore_dev_regs(dwc_otg_core_if_t * core_if, int rem_wakeup)
+{
+	struct dwc_otg_dev_regs_backup *dr;
+	int i;
+
+	dr = core_if->dr_backup;
+
+	if (!dr) {
+		return -DWC_E_INVALID;
+	}
+
+	if (!rem_wakeup)
+	{
+		DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dctl, dr->dctl);
+	}
+	
+	DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->daintmsk, dr->daintmsk);
+	DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->diepmsk, dr->diepmsk);
+	DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->doepmsk, dr->doepmsk);
+
+	for (i = 0; i < core_if->dev_if->num_in_eps; ++i) {
+		DWC_WRITE_REG32(&core_if->dev_if->in_ep_regs[i]->diepctl, dr->diepctl[i]);
+		DWC_WRITE_REG32(&core_if->dev_if->in_ep_regs[i]->dieptsiz, dr->dieptsiz[i]);
+		DWC_WRITE_REG32(&core_if->dev_if->in_ep_regs[i]->diepdma, dr->diepdma[i]);
+	}
+	
+	for (i = 0; i < core_if->dev_if->num_out_eps; ++i) {
+		DWC_WRITE_REG32(&core_if->dev_if->out_ep_regs[i]->doepfn, dr->doepfn[i]);
+	}
+
+	return 0;
+}
+
+int dwc_otg_restore_host_regs(dwc_otg_core_if_t * core_if, int reset)
+{
+	struct dwc_otg_host_regs_backup *hr;
+	int i;
+	hr = core_if->hr_backup;
+
+	if (!hr) {
+		return -DWC_E_INVALID;
+	}
+
+	DWC_WRITE_REG32(&core_if->host_if->host_global_regs->hcfg, hr->hcfg_local);
+	//if (!reset)
+	//{
+	//      DWC_WRITE_REG32(&core_if->host_if->host_global_regs->hfir, hr->hfir_local);
+	//}
+
+	DWC_WRITE_REG32(&core_if->host_if->host_global_regs->haintmsk,
+			hr->haintmsk_local);
+	for (i = 0; i < dwc_otg_get_param_host_channels(core_if); ++i) {
+		DWC_WRITE_REG32(&core_if->host_if->hc_regs[i]->hcintmsk,
+				hr->hcintmsk_local[i]);
+	}
+
+	return 0;
+}
+
+int restore_lpm_i2c_regs(dwc_otg_core_if_t * core_if)
+{
+	struct dwc_otg_global_regs_backup *gr;
+
+	gr = core_if->gr_backup;
+
+	/* Restore values for LPM and I2C */
+#ifdef CONFIG_USB_DWC_OTG_LPM
+	DWC_WRITE_REG32(&core_if->core_global_regs->glpmcfg, gr->glpmcfg_local);
+#endif
+	DWC_WRITE_REG32(&core_if->core_global_regs->gi2cctl, gr->gi2cctl_local);
+
+	return 0;
+}
+
+int restore_essential_regs(dwc_otg_core_if_t * core_if, int rmode, int is_host)
+{
+	struct dwc_otg_global_regs_backup *gr;
+	pcgcctl_data_t pcgcctl = {.d32 = 0 };
+	gahbcfg_data_t gahbcfg = {.d32 = 0 };
+	gusbcfg_data_t gusbcfg = {.d32 = 0 };
+	gintmsk_data_t gintmsk = {.d32 = 0 };
+
+	/* Restore LPM and I2C registers */
+	restore_lpm_i2c_regs(core_if);
+
+	/* Set PCGCCTL to 0 */
+	DWC_WRITE_REG32(core_if->pcgcctl, 0x00000000);
+
+	gr = core_if->gr_backup;
+	/* Load restore values for [31:14] bits */
+	DWC_WRITE_REG32(core_if->pcgcctl,
+			((gr->pcgcctl_local & 0xffffc000) | 0x00020000));
+
+	/* Umnask global Interrupt in GAHBCFG and restore it */
+	gahbcfg.d32 = gr->gahbcfg_local;
+	gahbcfg.b.glblintrmsk = 1;
+	DWC_WRITE_REG32(&core_if->core_global_regs->gahbcfg, gahbcfg.d32);
+
+	/* Clear all pending interupts */
+	DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, 0xFFFFFFFF);
+
+	/* Unmask restore done interrupt */
+	gintmsk.b.restoredone = 1;
+	DWC_WRITE_REG32(&core_if->core_global_regs->gintmsk, gintmsk.d32);
+
+	/* Restore GUSBCFG and HCFG/DCFG */
+	gusbcfg.d32 = core_if->gr_backup->gusbcfg_local;
+	DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg, gusbcfg.d32);
+
+	if (is_host) {
+		hcfg_data_t hcfg = {.d32 = 0 };
+		hcfg.d32 = core_if->hr_backup->hcfg_local;
+		DWC_WRITE_REG32(&core_if->host_if->host_global_regs->hcfg,
+				hcfg.d32);
+
+		/* Load restore values for [31:14] bits */
+		pcgcctl.d32 = gr->pcgcctl_local & 0xffffc000;
+		pcgcctl.d32 = gr->pcgcctl_local | 0x00020000;
+
+		if (rmode)
+			pcgcctl.b.restoremode = 1;
+		DWC_WRITE_REG32(core_if->pcgcctl, pcgcctl.d32);
+		dwc_udelay(10);
+
+		/* Load restore values for [31:14] bits and set EssRegRestored bit */
+		pcgcctl.d32 = gr->pcgcctl_local | 0xffffc000;
+		pcgcctl.d32 = gr->pcgcctl_local & 0xffffc000;
+		pcgcctl.b.ess_reg_restored = 1;
+		if (rmode)
+			pcgcctl.b.restoremode = 1;
+		DWC_WRITE_REG32(core_if->pcgcctl, pcgcctl.d32);
+	} else {
+		dcfg_data_t dcfg = {.d32 = 0 };
+		dcfg.d32 = core_if->dr_backup->dcfg;
+		DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dcfg, dcfg.d32);
+
+		/* Load restore values for [31:14] bits */
+		pcgcctl.d32 = gr->pcgcctl_local & 0xffffc000;
+		pcgcctl.d32 = gr->pcgcctl_local | 0x00020000;
+		if (!rmode) {
+			pcgcctl.d32 |= 0x208;
+		}
+		DWC_WRITE_REG32(core_if->pcgcctl, pcgcctl.d32);
+		dwc_udelay(10);
+
+		/* Load restore values for [31:14] bits */
+		pcgcctl.d32 = gr->pcgcctl_local & 0xffffc000;
+		pcgcctl.d32 = gr->pcgcctl_local | 0x00020000;
+		pcgcctl.b.ess_reg_restored = 1;
+		if (!rmode)
+			pcgcctl.d32 |= 0x208;
+		DWC_WRITE_REG32(core_if->pcgcctl, pcgcctl.d32);
+	}
+
+	return 0;
+}
+
+/**
+ * Initializes the FSLSPClkSel field of the HCFG register depending on the PHY
+ * type.
+ */
+static void init_fslspclksel(dwc_otg_core_if_t * core_if)
+{
+	uint32_t val;
+	hcfg_data_t hcfg;
+
+	if (((core_if->hwcfg2.b.hs_phy_type == 2) &&
+	     (core_if->hwcfg2.b.fs_phy_type == 1) &&
+	     (core_if->core_params->ulpi_fs_ls)) ||
+	    (core_if->core_params->phy_type == DWC_PHY_TYPE_PARAM_FS)) {
+		/* Full speed PHY */
+		val = DWC_HCFG_48_MHZ;
+	} else {
+		/* High speed PHY running at full speed or high speed */
+		val = DWC_HCFG_30_60_MHZ;
+	}
+
+	DWC_DEBUGPL(DBG_CIL, "Initializing HCFG.FSLSPClkSel to 0x%1x\n", val);
+	hcfg.d32 = DWC_READ_REG32(&core_if->host_if->host_global_regs->hcfg);
+	hcfg.b.fslspclksel = val;
+	DWC_WRITE_REG32(&core_if->host_if->host_global_regs->hcfg, hcfg.d32);
+}
+
+/**
+ * Initializes the DevSpd field of the DCFG register depending on the PHY type
+ * and the enumeration speed of the device.
+ */
+static void init_devspd(dwc_otg_core_if_t * core_if)
+{
+	uint32_t val;
+	dcfg_data_t dcfg;
+
+	if (((core_if->hwcfg2.b.hs_phy_type == 2) &&
+	     (core_if->hwcfg2.b.fs_phy_type == 1) &&
+	     (core_if->core_params->ulpi_fs_ls)) ||
+	    (core_if->core_params->phy_type == DWC_PHY_TYPE_PARAM_FS)) {
+		/* Full speed PHY */
+		val = 0x3;
+	} else if (core_if->core_params->speed == DWC_SPEED_PARAM_FULL) {
+		/* High speed PHY running at full speed */
+		val = 0x1;
+	} else {
+		/* High speed PHY running at high speed */
+		val = 0x0;
+	}
+
+	DWC_DEBUGPL(DBG_CIL, "Initializing DCFG.DevSpd to 0x%1x\n", val);
+
+	dcfg.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dcfg);
+	dcfg.b.devspd = val;
+	DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dcfg, dcfg.d32);
+}
+
+/**
+ * This function calculates the number of IN EPS
+ * using GHWCFG1 and GHWCFG2 registers values
+ *
+ * @param core_if Programming view of the DWC_otg controller
+ */
+static uint32_t calc_num_in_eps(dwc_otg_core_if_t * core_if)
+{
+	uint32_t num_in_eps = 0;
+	uint32_t num_eps = core_if->hwcfg2.b.num_dev_ep;
+	uint32_t hwcfg1 = core_if->hwcfg1.d32 >> 3;
+//	uint32_t num_tx_fifos = core_if->hwcfg4.b.num_in_eps;
+	int i;
+
+	for (i = 0; i < num_eps; ++i) {
+		if (!(hwcfg1 & 0x1))
+			num_in_eps++;
+
+		hwcfg1 >>= 2;
+	}
+
+#if 0	//lxy
+	if (core_if->hwcfg4.b.ded_fifo_en) {
+		num_in_eps =
+		    (num_in_eps > num_tx_fifos) ? num_tx_fifos : num_in_eps;
+	}
+#endif
+
+	return num_in_eps;
+}
+
+/**
+ * This function calculates the number of OUT EPS
+ * using GHWCFG1 and GHWCFG2 registers values
+ *
+ * @param core_if Programming view of the DWC_otg controller
+ */
+static uint32_t calc_num_out_eps(dwc_otg_core_if_t * core_if)
+{
+	uint32_t num_out_eps = 0;
+	uint32_t num_eps = core_if->hwcfg2.b.num_dev_ep;
+	uint32_t hwcfg1 = core_if->hwcfg1.d32 >> 2;
+	int i;
+
+	for (i = 0; i < num_eps; ++i) {
+		if (!(hwcfg1 & 0x1))
+			num_out_eps++;
+
+		hwcfg1 >>= 2;
+	}
+	return num_out_eps;
+}
+
+/**
+ * This function initializes the DWC_otg controller registers and
+ * prepares the core for device mode or host mode operation.
+ *
+ * @param core_if Programming view of the DWC_otg controller
+ *
+ */
+void dwc_otg_core_init(dwc_otg_core_if_t * core_if)
+{
+	int i = 0;
+	dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs;
+	dwc_otg_dev_if_t *dev_if = core_if->dev_if;
+	gahbcfg_data_t ahbcfg = {.d32 = 0 };
+	gusbcfg_data_t usbcfg = {.d32 = 0 };
+	gi2cctl_data_t i2cctl = {.d32 = 0 };
+
+	DWC_DEBUGPL(DBG_CILV, "dwc_otg_core_init(%p)\n", core_if);
+
+	/* Common Initialization */
+	usbcfg.d32 = DWC_READ_REG32(&global_regs->gusbcfg);
+
+	/* Program the ULPI External VBUS bit if needed */
+	usbcfg.b.ulpi_ext_vbus_drv =
+		(core_if->core_params->phy_ulpi_ext_vbus ==
+		 DWC_PHY_ULPI_EXTERNAL_VBUS) ? 1 : 0;
+
+	/* Set external TS Dline pulsing */
+	usbcfg.b.term_sel_dl_pulse = (core_if->core_params->ts_dline == 1) ? 1 : 0;
+	DWC_WRITE_REG32(&global_regs->gusbcfg, usbcfg.d32);
+
+	/* Reset the Controller */
+	dwc_otg_core_reset(core_if);
+
+	core_if->adp_enable = core_if->core_params->adp_supp_enable;
+	core_if->power_down = core_if->core_params->power_down;
+	core_if->otg_sts = 0;
+
+	/* Initialize parameters from Hardware configuration registers. */
+	dev_if->num_in_eps = calc_num_in_eps(core_if);
+	dev_if->num_out_eps = calc_num_out_eps(core_if);
+
+	DWC_DEBUGPL(DBG_CIL, "num_dev_perio_in_ep=%d\n", 
+		core_if->hwcfg4.b.num_dev_perio_in_ep);
+
+	for (i = 0; i < core_if->hwcfg4.b.num_dev_perio_in_ep; i++) {
+		dev_if->perio_tx_fifo_size[i] =
+			DWC_READ_REG32(&global_regs->dtxfsiz[i]) >> 16;
+		DWC_DEBUGPL(DBG_CIL, "Periodic Tx FIFO SZ #%d=0x%0x\n",
+				i, dev_if->perio_tx_fifo_size[i]);
+	}
+
+	for (i = 0; i < core_if->hwcfg4.b.num_in_eps; i++) {
+		dev_if->tx_fifo_size[i] =
+			DWC_READ_REG32(&global_regs->dtxfsiz[i]) >> 16;
+		DWC_DEBUGPL(DBG_CIL, "Tx FIFO SZ #%d=0x%0x\n",
+				i, dev_if->tx_fifo_size[i]);
+	}
+
+	core_if->total_fifo_size = core_if->hwcfg3.b.dfifo_depth;
+	core_if->rx_fifo_size = DWC_READ_REG32(&global_regs->grxfsiz);
+	core_if->nperio_tx_fifo_size = DWC_READ_REG32(&global_regs->gnptxfsiz) >> 16;
+
+	DWC_DEBUGPL(DBG_CIL, "Total FIFO SZ=%d\n", core_if->total_fifo_size);
+	DWC_DEBUGPL(DBG_CIL, "Rx FIFO SZ=%d\n", core_if->rx_fifo_size);
+	DWC_DEBUGPL(DBG_CIL, "NP Tx FIFO SZ=%d\n", core_if->nperio_tx_fifo_size);
+
+	/* This programming sequence needs to happen in FS mode before any other
+	 * programming occurs */
+	if ((core_if->core_params->speed == DWC_SPEED_PARAM_FULL) && 
+		(core_if->core_params->phy_type == DWC_PHY_TYPE_PARAM_FS)) {
+		/* If FS mode with FS PHY */
+
+		/* core_init() is now called on every switch so only call the
+		 * following for the first time through. */
+		if (!core_if->phy_init_done) {
+			core_if->phy_init_done = 1;
+			DWC_DEBUGPL(DBG_CIL, "FS_PHY detected\n");
+			usbcfg.d32 = DWC_READ_REG32(&global_regs->gusbcfg);
+			usbcfg.b.physel = 1;
+			DWC_WRITE_REG32(&global_regs->gusbcfg, usbcfg.d32);
+
+			/* Reset after a PHY select */
+			dwc_otg_core_reset(core_if);
+		}
+
+		/* Program DCFG.DevSpd or HCFG.FSLSPclkSel to 48Mhz in FS.      Also
+		 * do this on HNP Dev/Host mode switches (done in dev_init and
+		 * host_init). */
+		if (dwc_otg_is_host_mode(core_if)) {
+			init_fslspclksel(core_if);
+		} else {
+			init_devspd(core_if);
+		}
+
+		if (core_if->core_params->i2c_enable) {
+			DWC_DEBUGPL(DBG_CIL, "FS_PHY Enabling I2c\n");
+			/* Program GUSBCFG.OtgUtmifsSel to I2C */
+			usbcfg.d32 = DWC_READ_REG32(&global_regs->gusbcfg);
+			usbcfg.b.otgutmifssel = 1;
+			DWC_WRITE_REG32(&global_regs->gusbcfg, usbcfg.d32);
+
+			/* Program GI2CCTL.I2CEn */
+			i2cctl.d32 = DWC_READ_REG32(&global_regs->gi2cctl);
+			i2cctl.b.i2cdevaddr = 1;
+			i2cctl.b.i2cen = 0;
+			DWC_WRITE_REG32(&global_regs->gi2cctl, i2cctl.d32);
+			i2cctl.b.i2cen = 1;
+			DWC_WRITE_REG32(&global_regs->gi2cctl, i2cctl.d32);
+		}
+
+	} /* endif speed == DWC_SPEED_PARAM_FULL */
+	else {
+		/* High speed PHY. */
+		if (!core_if->phy_init_done) {
+			core_if->phy_init_done = 1;
+			/* HS PHY parameters.  These parameters are preserved
+			 * during soft reset so only program the first time.  Do
+			 * a soft reset immediately after setting phyif.  */
+
+			if (core_if->core_params->phy_type == 2) {
+				/* ULPI interface */
+				usbcfg.b.ulpi_utmi_sel = 1;
+				usbcfg.b.phyif = 0;
+				usbcfg.b.ddrsel =
+					core_if->core_params->phy_ulpi_ddr;
+			} else if (core_if->core_params->phy_type == 1) {
+				/* UTMI+ interface */
+				usbcfg.b.ulpi_utmi_sel = 0;
+				if (core_if->core_params->phy_utmi_width == 16) {
+					usbcfg.b.phyif = 1;
+
+				} else {
+					usbcfg.b.phyif = 0;
+				}
+			} else {
+				DWC_ERROR("FS PHY TYPE\n");
+			}
+			DWC_WRITE_REG32(&global_regs->gusbcfg, usbcfg.d32);
+			/* Reset after setting the PHY parameters */
+			dwc_otg_core_reset(core_if);
+		}
+	}
+
+	if ((core_if->hwcfg2.b.hs_phy_type == 2) &&
+			(core_if->hwcfg2.b.fs_phy_type == 1) &&
+			(core_if->core_params->ulpi_fs_ls)) {
+		DWC_DEBUGPL(DBG_CIL, "Setting ULPI FSLS\n");
+		usbcfg.d32 = DWC_READ_REG32(&global_regs->gusbcfg);
+		usbcfg.b.ulpi_fsls = 1;
+		usbcfg.b.ulpi_clk_sus_m = 1;
+		DWC_WRITE_REG32(&global_regs->gusbcfg, usbcfg.d32);
+	} else {
+		usbcfg.d32 = DWC_READ_REG32(&global_regs->gusbcfg);
+		usbcfg.b.ulpi_fsls = 0;
+		usbcfg.b.ulpi_clk_sus_m = 0;
+		DWC_WRITE_REG32(&global_regs->gusbcfg, usbcfg.d32);
+	}
+
+	/* Program the GAHBCFG Register. */
+	switch (core_if->hwcfg2.b.architecture) {
+
+		case DWC_SLAVE_ONLY_ARCH:
+			DWC_DEBUGPL(DBG_CIL, "Slave Only Mode\n");
+			ahbcfg.b.nptxfemplvl_txfemplvl =
+				DWC_GAHBCFG_TXFEMPTYLVL_HALFEMPTY;
+			ahbcfg.b.ptxfemplvl = DWC_GAHBCFG_TXFEMPTYLVL_HALFEMPTY;
+			core_if->dma_enable = 0;
+			core_if->dma_desc_enable = 0;
+			break;
+
+		case DWC_EXT_DMA_ARCH:
+			DWC_DEBUGPL(DBG_CIL, "External DMA Mode\n");
+			{
+				uint8_t brst_sz = core_if->core_params->dma_burst_size;
+				ahbcfg.b.hburstlen = 0;
+				while (brst_sz > 1) {
+					ahbcfg.b.hburstlen++;
+					brst_sz >>= 1;
+				}
+			}
+			core_if->dma_enable = (core_if->core_params->dma_enable != 0);
+			core_if->dma_desc_enable =
+				(core_if->core_params->dma_desc_enable != 0);
+			break;
+
+		case DWC_INT_DMA_ARCH:
+			DWC_DEBUGPL(DBG_CIL, "Internal DMA Mode\n");
+			/* Old value was DWC_GAHBCFG_INT_DMA_BURST_INCR - done for 
+			   Host mode ISOC in issue fix - vahrama */
+			ahbcfg.b.hburstlen = DWC_GAHBCFG_INT_DMA_BURST_INCR4;
+			core_if->dma_enable = (core_if->core_params->dma_enable != 0);
+			core_if->dma_desc_enable =
+				(core_if->core_params->dma_desc_enable != 0);
+			break;
+
+	}
+	if (core_if->dma_enable) {
+		if (core_if->dma_desc_enable) {
+			DWC_PRINTF("Using Descriptor DMA mode\n");
+		} else {
+			DWC_PRINTF("Using Buffer DMA mode\n");
+
+		}
+	} else {
+		DWC_PRINTF("Using Slave mode\n");
+		core_if->dma_desc_enable = 0;
+	}
+
+	ahbcfg.b.dmaenable = core_if->dma_enable;
+	DWC_WRITE_REG32(&global_regs->gahbcfg, ahbcfg.d32);
+
+	core_if->en_multiple_tx_fifo = core_if->hwcfg4.b.ded_fifo_en;
+
+	core_if->pti_enh_enable = core_if->core_params->pti_enable != 0;
+	core_if->multiproc_int_enable = core_if->core_params->mpi_enable;
+	DWC_PRINTF("Periodic Transfer Interrupt Enhancement - %s\n",
+			((core_if->pti_enh_enable) ? "enabled" : "disabled"));
+	DWC_PRINTF("Multiprocessor Interrupt Enhancement - %s\n",
+			((core_if->multiproc_int_enable) ? "enabled" : "disabled"));
+
+	/*
+	 * Program the GUSBCFG register.
+	 */
+	usbcfg.d32 = DWC_READ_REG32(&global_regs->gusbcfg);
+
+	switch (core_if->hwcfg2.b.op_mode) {
+		case DWC_MODE_HNP_SRP_CAPABLE:
+			usbcfg.b.hnpcap = (core_if->core_params->otg_cap ==
+					DWC_OTG_CAP_PARAM_HNP_SRP_CAPABLE);
+			usbcfg.b.srpcap = (core_if->core_params->otg_cap !=
+					DWC_OTG_CAP_PARAM_NO_HNP_SRP_CAPABLE);
+			break;
+
+		case DWC_MODE_SRP_ONLY_CAPABLE:
+			usbcfg.b.hnpcap = 0;
+			usbcfg.b.srpcap = (core_if->core_params->otg_cap !=
+					DWC_OTG_CAP_PARAM_NO_HNP_SRP_CAPABLE);
+			break;
+
+		case DWC_MODE_NO_HNP_SRP_CAPABLE:
+			usbcfg.b.hnpcap = 0;
+			usbcfg.b.srpcap = 0;
+			break;
+
+		case DWC_MODE_SRP_CAPABLE_DEVICE:
+			usbcfg.b.hnpcap = 0;
+			usbcfg.b.srpcap = (core_if->core_params->otg_cap !=
+					DWC_OTG_CAP_PARAM_NO_HNP_SRP_CAPABLE);
+			break;
+
+		case DWC_MODE_NO_SRP_CAPABLE_DEVICE:
+			usbcfg.b.hnpcap = 0;
+			usbcfg.b.srpcap = 0;
+			break;
+
+		case DWC_MODE_SRP_CAPABLE_HOST:
+			usbcfg.b.hnpcap = 0;
+			usbcfg.b.srpcap = (core_if->core_params->otg_cap !=
+					DWC_OTG_CAP_PARAM_NO_HNP_SRP_CAPABLE);
+			break;
+
+		case DWC_MODE_NO_SRP_CAPABLE_HOST:
+			usbcfg.b.hnpcap = 0;
+			usbcfg.b.srpcap = 0;
+			break;
+	}
+
+	DWC_WRITE_REG32(&global_regs->gusbcfg, usbcfg.d32);
+
+#ifdef CONFIG_USB_DWC_OTG_LPM
+	if (core_if->core_params->lpm_enable) {
+		glpmcfg_data_t lpmcfg = {.d32 = 0 };
+
+		/* To enable LPM support set lpm_cap_en bit */
+		lpmcfg.b.lpm_cap_en = 1;
+
+		/* Make AppL1Res ACK */
+		lpmcfg.b.appl_resp = 1;
+
+		/* Retry 3 times */
+		lpmcfg.b.retry_count = 3;
+
+		DWC_MODIFY_REG32(&core_if->core_global_regs->glpmcfg,
+				0, lpmcfg.d32);
+
+	}
+#endif
+	if (core_if->core_params->ic_usb_cap) {
+		gusbcfg_data_t gusbcfg = {.d32 = 0 };
+		gusbcfg.b.ic_usb_cap = 1;
+		DWC_MODIFY_REG32(&core_if->core_global_regs->gusbcfg,
+				0, gusbcfg.d32);
+	}
+	{
+		gotgctl_data_t gotgctl = {.d32 = 0 };
+		gotgctl.b.otgver = core_if->core_params->otg_ver;
+		DWC_MODIFY_REG32(&core_if->core_global_regs->gotgctl, 0,
+				gotgctl.d32);
+		/* Set OTG version supported */
+		core_if->otg_ver = core_if->core_params->otg_ver;
+		DWC_PRINTF("OTG VER PARAM: %d, OTG VER FLAG: %d\n",
+				core_if->core_params->otg_ver, core_if->otg_ver);
+	}
+
+	/* Enable common interrupts */
+	dwc_otg_enable_common_interrupts(core_if);
+
+#ifdef	DWC_HOST_ONLY	//lxy
+	//#if 0
+	gusbcfg_data_t gusbcfg = {.d32 = 0 };
+	gusbcfg.d32 =  DWC_READ_REG32(&core_if->core_global_regs->gusbcfg);
+	gusbcfg.b.force_host_mode = 1;
+	DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg, gusbcfg.d32);
+	dwc_mdelay(100); 
+	core_if->hptxfsiz.d32 =
+		DWC_READ_REG32(&core_if->core_global_regs->hptxfsiz);
+
+	gusbcfg.d32 =  DWC_READ_REG32(&core_if->core_global_regs->gusbcfg);
+	gusbcfg.b.force_host_mode = 0;
+	DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg, gusbcfg.d32);
+	dwc_mdelay(100); 
+#endif
+
+
+	/* Do device or host intialization based on mode during PCD
+	 * and HCD initialization  */
+	if (core_if->op_state == 0) {
+		if (dwc_otg_is_host_mode(core_if)) {
+			DWC_DEBUGPL(DBG_ANY, "Host Mode\n");
+			core_if->op_state = A_HOST;
+		} else {
+			DWC_DEBUGPL(DBG_ANY, "Device Mode\n");
+			core_if->op_state = B_PERIPHERAL;
+#ifdef DWC_DEVICE_ONLY
+			dwc_otg_core_dev_init(core_if);
+#endif
+		}
+	} else {
+		if (core_if->op_state == A_HOST) {
+			gusbcfg_data_t gusbcfg = {.d32 = 0 };
+			gusbcfg.d32 =  DWC_READ_REG32(&core_if->core_global_regs->gusbcfg);
+			gusbcfg.b.force_host_mode = 1;
+			DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg, gusbcfg.d32);
+			dwc_mdelay(100); 
+
+			gusbcfg.d32 =  DWC_READ_REG32(&core_if->core_global_regs->gusbcfg);
+			gusbcfg.b.force_host_mode = 0;
+			DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg, gusbcfg.d32);
+			dwc_mdelay(100); 
+			DWC_DEBUGPL(DBG_ANY, "Host Mode\n");
+		} else if (core_if->op_state == B_PERIPHERAL) {
+			gusbcfg_data_t gusbcfg = {.d32 = 0 };
+			gusbcfg.d32 =  DWC_READ_REG32(&core_if->core_global_regs->gusbcfg);
+			gusbcfg.b.force_dev_mode = 1;
+			DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg, gusbcfg.d32);
+			dwc_mdelay(100); 
+
+			gusbcfg.d32 =  DWC_READ_REG32(&core_if->core_global_regs->gusbcfg);
+			gusbcfg.b.force_dev_mode = 0;
+			DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg, gusbcfg.d32);
+			dwc_mdelay(100); 
+
+			DWC_DEBUGPL(DBG_ANY, "Device Mode\n");
+#ifdef DWC_DEVICE_ONLY
+			dwc_otg_core_dev_init(core_if);
+#endif
+		}
+	}
+}
+
+/**
+ * This function enables the Device mode interrupts.
+ *
+ * @param core_if Programming view of DWC_otg controller
+ */
+void dwc_otg_enable_device_interrupts(dwc_otg_core_if_t * core_if)
+{
+	gintmsk_data_t intr_mask = {.d32 = 0 };
+	dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs;
+
+	DWC_DEBUGPL(DBG_CIL, "%s()\n", __func__);
+
+	/* Disable all interrupts. */
+	DWC_WRITE_REG32(&global_regs->gintmsk, 0);
+
+	/* Clear any pending interrupts */
+	DWC_WRITE_REG32(&global_regs->gintsts, 0xFFFFFFFF);
+
+	/* Enable the common interrupts */
+	dwc_otg_enable_common_interrupts(core_if);
+
+	/* Enable interrupts */
+	intr_mask.b.usbreset = 1;
+	intr_mask.b.enumdone = 1;
+	/* Disable Disconnect interrupt in Device mode */
+	intr_mask.b.disconnect = 0;
+
+	if (!core_if->multiproc_int_enable) {
+		intr_mask.b.inepintr = 1;
+		intr_mask.b.outepintr = 1;
+	}
+
+	intr_mask.b.erlysuspend = 1;
+
+	if (core_if->en_multiple_tx_fifo == 0) {
+		intr_mask.b.epmismatch = 1;
+	}
+
+/* Enable the ignore frame number for ISOC xfers - MAS */
+/* Disable to support high bandwith ISOC transfers - manukz */
+#if 0
+#ifdef DWC_UTE_PER_IO
+	if (core_if->dma_enable) {
+		if (core_if->dma_desc_enable) {
+			dctl_data_t dctl1 = {.d32 = 0 };
+			dctl1.b.ifrmnum = 1;
+			DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->
+					 dctl, 0, dctl1.d32);
+			DWC_DEBUG("----Enabled Ignore frame number (0x%08x)",
+				  DWC_READ_REG32(&core_if->dev_if->
+						 dev_global_regs->dctl));
+		}
+	}
+#endif
+#endif
+#ifdef DWC_EN_ISOC
+	if (core_if->dma_enable) {
+		if (core_if->dma_desc_enable == 0) {
+			if (core_if->pti_enh_enable) {
+				dctl_data_t dctl = {.d32 = 0 };
+				dctl.b.ifrmnum = 1;
+				DWC_MODIFY_REG32(&core_if->
+						 dev_if->dev_global_regs->dctl,
+						 0, dctl.d32);
+			} else {
+				intr_mask.b.incomplisoin = 1;
+				intr_mask.b.incomplisoout = 1;
+			}
+		}
+	} else {
+		intr_mask.b.incomplisoin = 1;
+		intr_mask.b.incomplisoout = 1;
+	}
+#endif /* DWC_EN_ISOC */
+
+	/** @todo NGS: Should this be a module parameter? */
+#ifdef USE_PERIODIC_EP
+	intr_mask.b.isooutdrop = 1;
+	intr_mask.b.eopframe = 1;
+	intr_mask.b.incomplisoin = 1;
+	intr_mask.b.incomplisoout = 1;
+#endif
+
+	DWC_MODIFY_REG32(&global_regs->gintmsk, intr_mask.d32, intr_mask.d32);
+
+	DWC_DEBUGPL(DBG_CIL, "%s() gintmsk=%0x\n", __func__,
+		    DWC_READ_REG32(&global_regs->gintmsk));
+}
+
+/**
+ * This function initializes the DWC_otg controller registers for
+ * device mode.
+ *
+ * @param core_if Programming view of DWC_otg controller
+ *
+ */
+void dwc_otg_core_dev_init(dwc_otg_core_if_t * core_if)
+{
+	int i;
+	dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs;
+	dwc_otg_dev_if_t *dev_if = core_if->dev_if;
+	dwc_otg_core_params_t *params = core_if->core_params;
+	dcfg_data_t dcfg = {.d32 = 0 };
+	depctl_data_t diepctl = {.d32 = 0 };
+	grstctl_t resetctl = {.d32 = 0 };
+	uint32_t rx_fifo_size;
+	fifosize_data_t nptxfifosize;
+	fifosize_data_t txfifosize;
+	dthrctl_data_t dthrctl;
+	fifosize_data_t ptxfifosize;
+	uint16_t rxfsiz, nptxfsiz;
+	gdfifocfg_data_t gdfifocfg = {.d32 = 0 };
+	hwcfg3_data_t hwcfg3 = {.d32 = 0 };
+
+	/* Restart the Phy Clock */
+	DWC_WRITE_REG32(core_if->pcgcctl, 0);
+
+	/* Device configuration register */
+	init_devspd(core_if);
+	dcfg.d32 = DWC_READ_REG32(&dev_if->dev_global_regs->dcfg);
+	dcfg.b.descdma = (core_if->dma_desc_enable) ? 1 : 0;
+	dcfg.b.perfrint = DWC_DCFG_FRAME_INTERVAL_80;
+	/* Enable Device OUT NAK in case of DDMA mode*/
+	if (core_if->core_params->dev_out_nak) {
+		dcfg.b.endevoutnak = 1;		
+	}
+
+	DWC_WRITE_REG32(&dev_if->dev_global_regs->dcfg, dcfg.d32);
+
+	/* Configure data FIFO sizes */
+	if (core_if->hwcfg2.b.dynamic_fifo && params->enable_dynamic_fifo) {
+		DWC_DEBUGPL(DBG_CIL, "Total FIFO Size=%d\n",
+			    core_if->total_fifo_size);
+		DWC_DEBUGPL(DBG_CIL, "Rx FIFO Size=%d\n",
+			    params->dev_rx_fifo_size);
+		DWC_DEBUGPL(DBG_CIL, "NP Tx FIFO Size=%d\n",
+			    params->dev_nperio_tx_fifo_size);
+
+		/* Rx FIFO */
+		DWC_DEBUGPL(DBG_CIL, "initial grxfsiz=%08x\n",
+			    DWC_READ_REG32(&global_regs->grxfsiz));
+
+#ifdef DWC_UTE_CFI
+		core_if->pwron_rxfsiz = DWC_READ_REG32(&global_regs->grxfsiz);
+		core_if->init_rxfsiz = params->dev_rx_fifo_size;
+#endif
+		rx_fifo_size = params->dev_rx_fifo_size;
+		DWC_WRITE_REG32(&global_regs->grxfsiz, rx_fifo_size);
+
+		DWC_DEBUGPL(DBG_CIL, "new grxfsiz=%08x\n",
+			    DWC_READ_REG32(&global_regs->grxfsiz));
+
+		/** Set Periodic Tx FIFO Mask all bits 0 */
+		core_if->p_tx_msk = 0;
+
+		/** Set Tx FIFO Mask all bits 0 */
+		core_if->tx_msk = 0;
+
+		if (core_if->en_multiple_tx_fifo == 0) {
+			/* Non-periodic Tx FIFO */
+			DWC_DEBUGPL(DBG_CIL, "initial gnptxfsiz=%08x\n",
+				    DWC_READ_REG32(&global_regs->gnptxfsiz));
+
+			nptxfifosize.b.depth = params->dev_nperio_tx_fifo_size;
+			nptxfifosize.b.startaddr = params->dev_rx_fifo_size;
+
+			DWC_WRITE_REG32(&global_regs->gnptxfsiz,
+					nptxfifosize.d32);
+
+			DWC_DEBUGPL(DBG_CIL, "new gnptxfsiz=%08x\n",
+				    DWC_READ_REG32(&global_regs->gnptxfsiz));
+
+			/**@todo NGS: Fix Periodic FIFO Sizing! */
+			/*
+			 * Periodic Tx FIFOs These FIFOs are numbered from 1 to 15.
+			 * Indexes of the FIFO size module parameters in the
+			 * dev_perio_tx_fifo_size array and the FIFO size registers in
+			 * the dptxfsiz array run from 0 to 14.
+			 */
+			/** @todo Finish debug of this */
+			ptxfifosize.b.startaddr =
+			    nptxfifosize.b.startaddr + nptxfifosize.b.depth;
+			for (i = 0; i < core_if->hwcfg4.b.num_dev_perio_in_ep; i++) {
+				ptxfifosize.b.depth =
+				    params->dev_perio_tx_fifo_size[i];
+				DWC_DEBUGPL(DBG_CIL,
+					    "initial dtxfsiz[%d]=%08x\n", i,
+					    DWC_READ_REG32(&global_regs->dtxfsiz
+							   [i]));
+				DWC_WRITE_REG32(&global_regs->dtxfsiz[i],
+						ptxfifosize.d32);
+				DWC_DEBUGPL(DBG_CIL, "new dtxfsiz[%d]=%08x\n",
+					    i,
+					    DWC_READ_REG32(&global_regs->dtxfsiz
+							   [i]));
+				ptxfifosize.b.startaddr += ptxfifosize.b.depth;
+			}
+		} else {
+			/*
+			 * Tx FIFOs These FIFOs are numbered from 1 to 15.
+			 * Indexes of the FIFO size module parameters in the
+			 * dev_tx_fifo_size array and the FIFO size registers in
+			 * the dtxfsiz array run from 0 to 14.
+			 */
+
+			/* Non-periodic Tx FIFO */
+			DWC_DEBUGPL(DBG_CIL, "initial gnptxfsiz=%08x\n",
+				    DWC_READ_REG32(&global_regs->gnptxfsiz));
+
+#ifdef DWC_UTE_CFI
+			core_if->pwron_gnptxfsiz =
+			    (DWC_READ_REG32(&global_regs->gnptxfsiz) >> 16);
+			core_if->init_gnptxfsiz =
+			    params->dev_nperio_tx_fifo_size;
+#endif
+			nptxfifosize.b.depth = params->dev_nperio_tx_fifo_size;
+			nptxfifosize.b.startaddr = params->dev_rx_fifo_size;
+
+			DWC_WRITE_REG32(&global_regs->gnptxfsiz,
+					nptxfifosize.d32);
+
+			DWC_DEBUGPL(DBG_CIL, "new gnptxfsiz=%08x\n",
+				    DWC_READ_REG32(&global_regs->gnptxfsiz));
+
+			txfifosize.b.startaddr =
+			    nptxfifosize.b.startaddr + nptxfifosize.b.depth;
+
+			for (i = 0; i < core_if->hwcfg4.b.num_in_eps; i++) {
+				txfifosize.b.depth =
+				    params->dev_tx_fifo_size[i];
+
+				DWC_DEBUGPL(DBG_CIL,
+					    "initial dtxfsiz[%d]=%08x\n",
+					    i,
+					    DWC_READ_REG32(&global_regs->dtxfsiz
+							   [i]));
+
+#ifdef DWC_UTE_CFI
+				core_if->pwron_txfsiz[i] =
+				    (DWC_READ_REG32
+				     (&global_regs->dtxfsiz[i]) >> 16);
+				core_if->init_txfsiz[i] =
+				    params->dev_tx_fifo_size[i];
+#endif
+				DWC_WRITE_REG32(&global_regs->dtxfsiz[i],
+						txfifosize.d32);
+
+				DWC_DEBUGPL(DBG_CIL,
+					    "new dtxfsiz[%d]=%08x\n",
+					    i,
+					    DWC_READ_REG32(&global_regs->dtxfsiz
+							   [i]));
+
+				txfifosize.b.startaddr += txfifosize.b.depth;
+			}
+		        /* Calculating DFIFOCFG for Device mode to include RxFIFO and NPTXFIFO */
+			gdfifocfg.d32 = DWC_READ_REG32(&global_regs->gdfifocfg);
+			hwcfg3.d32 = DWC_READ_REG32(&global_regs->ghwcfg3);
+			gdfifocfg.b.gdfifocfg = (DWC_READ_REG32(&global_regs->ghwcfg3) >> 16);
+			DWC_WRITE_REG32(&global_regs->gdfifocfg, gdfifocfg.d32);
+			rxfsiz = (DWC_READ_REG32(&global_regs->grxfsiz) & 0x0000ffff);
+			nptxfsiz = (DWC_READ_REG32(&global_regs->gnptxfsiz) >> 16);
+			gdfifocfg.b.epinfobase = rxfsiz + nptxfsiz;
+			DWC_WRITE_REG32(&global_regs->gdfifocfg, gdfifocfg.d32);
+		}
+	}
+
+	/* Flush the FIFOs */
+	dwc_otg_flush_tx_fifo(core_if, 0x10);	/* all Tx FIFOs */
+	dwc_otg_flush_rx_fifo(core_if);
+
+	/* Flush the Learning Queue. */
+	resetctl.b.intknqflsh = 1;
+	DWC_WRITE_REG32(&core_if->core_global_regs->grstctl, resetctl.d32);
+
+	if (!core_if->core_params->en_multiple_tx_fifo && core_if->dma_enable) {
+		core_if->start_predict = 0;
+		for (i = 0; i<= core_if->dev_if->num_in_eps; ++i) {
+			core_if->nextep_seq[i] = 0xff;	// 0xff - EP not active
+		}
+		core_if->nextep_seq[0] = 0;	
+		core_if->first_in_nextep_seq = 0;
+		diepctl.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[0]->diepctl);
+		diepctl.b.nextep = 0;
+		DWC_WRITE_REG32(&dev_if->in_ep_regs[0]->diepctl, diepctl.d32);
+		
+		/* Update IN Endpoint Mismatch Count by active IN NP EP count + 1 */
+		dcfg.d32 = DWC_READ_REG32(&dev_if->dev_global_regs->dcfg);
+		dcfg.b.epmscnt = 2;
+		DWC_WRITE_REG32(&dev_if->dev_global_regs->dcfg, dcfg.d32);
+
+		DWC_DEBUGPL(DBG_CILV,"%s first_in_nextep_seq= %2d; nextep_seq[]:\n", 
+			__func__, core_if->first_in_nextep_seq);
+		for (i=0; i <= core_if->dev_if->num_in_eps; i++) {
+			DWC_DEBUGPL(DBG_CILV, "%2d ", core_if->nextep_seq[i]);
+		}
+		DWC_DEBUGPL(DBG_CILV,"\n");
+	}
+	
+	/* Clear all pending Device Interrupts */
+	/** @todo - if the condition needed to be checked
+	 *  or in any case all pending interrutps should be cleared?
+     */
+	if (core_if->multiproc_int_enable) {
+		for (i = 0; i < core_if->dev_if->num_in_eps; ++i) {
+			DWC_WRITE_REG32(&dev_if->
+					dev_global_regs->diepeachintmsk[i], 0);
+		}
+
+		for (i = 0; i < core_if->dev_if->num_out_eps; ++i) {
+			DWC_WRITE_REG32(&dev_if->
+					dev_global_regs->doepeachintmsk[i], 0);
+		}
+
+		DWC_WRITE_REG32(&dev_if->dev_global_regs->deachint, 0xFFFFFFFF);
+		DWC_WRITE_REG32(&dev_if->dev_global_regs->deachintmsk, 0);
+	} else {
+		DWC_WRITE_REG32(&dev_if->dev_global_regs->diepmsk, 0);
+		DWC_WRITE_REG32(&dev_if->dev_global_regs->doepmsk, 0);
+		DWC_WRITE_REG32(&dev_if->dev_global_regs->daint, 0xFFFFFFFF);
+		DWC_WRITE_REG32(&dev_if->dev_global_regs->daintmsk, 0);
+	}
+
+	for (i = 0; i <= dev_if->num_in_eps; i++) {
+		depctl_data_t depctl;
+		depctl.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[i]->diepctl);
+		if (depctl.b.epena) {
+			depctl.d32 = 0;
+			depctl.b.epdis = 1;
+			depctl.b.snak = 1;
+		} else {
+			depctl.d32 = 0;
+		}
+
+		DWC_WRITE_REG32(&dev_if->in_ep_regs[i]->diepctl, depctl.d32);
+
+		DWC_WRITE_REG32(&dev_if->in_ep_regs[i]->dieptsiz, 0);
+		DWC_WRITE_REG32(&dev_if->in_ep_regs[i]->diepdma, 0);
+		DWC_WRITE_REG32(&dev_if->in_ep_regs[i]->diepint, 0xFF);
+	}
+
+	for (i = 0; i <= dev_if->num_out_eps; i++) {
+		depctl_data_t depctl;
+		depctl.d32 = DWC_READ_REG32(&dev_if->out_ep_regs[i]->doepctl);
+		if (depctl.b.epena) {
+			depctl.d32 = 0;
+			depctl.b.epdis = 1;
+			depctl.b.snak = 1;
+		} else {
+			depctl.d32 = 0;
+		}
+
+		DWC_WRITE_REG32(&dev_if->out_ep_regs[i]->doepctl, depctl.d32);
+
+		DWC_WRITE_REG32(&dev_if->out_ep_regs[i]->doeptsiz, 0);
+		DWC_WRITE_REG32(&dev_if->out_ep_regs[i]->doepdma, 0);
+		DWC_WRITE_REG32(&dev_if->out_ep_regs[i]->doepint, 0xFF);
+	}
+
+	if (core_if->en_multiple_tx_fifo && core_if->dma_enable) {
+		dev_if->non_iso_tx_thr_en = params->thr_ctl & 0x1;
+		dev_if->iso_tx_thr_en = (params->thr_ctl >> 1) & 0x1;
+		dev_if->rx_thr_en = (params->thr_ctl >> 2) & 0x1;
+
+		dev_if->rx_thr_length = params->rx_thr_length;
+		dev_if->tx_thr_length = params->tx_thr_length;
+
+		dev_if->setup_desc_index = 0;
+
+		dthrctl.d32 = 0;
+		dthrctl.b.non_iso_thr_en = dev_if->non_iso_tx_thr_en;
+		dthrctl.b.iso_thr_en = dev_if->iso_tx_thr_en;
+		dthrctl.b.tx_thr_len = dev_if->tx_thr_length;
+		dthrctl.b.rx_thr_en = dev_if->rx_thr_en;
+		dthrctl.b.rx_thr_len = dev_if->rx_thr_length;
+		dthrctl.b.ahb_thr_ratio = params->ahb_thr_ratio;
+
+		DWC_WRITE_REG32(&dev_if->dev_global_regs->dtknqr3_dthrctl,
+				dthrctl.d32);
+
+		DWC_DEBUGPL(DBG_CIL,
+			    "Non ISO Tx Thr - %d\nISO Tx Thr - %d\nRx Thr - %d\nTx Thr Len - %d\nRx Thr Len - %d\n",
+			    dthrctl.b.non_iso_thr_en, dthrctl.b.iso_thr_en,
+			    dthrctl.b.rx_thr_en, dthrctl.b.tx_thr_len,
+			    dthrctl.b.rx_thr_len);
+
+	}
+
+	dwc_otg_enable_device_interrupts(core_if);
+
+	{
+		diepmsk_data_t msk = {.d32 = 0 };
+		msk.b.txfifoundrn = 1;
+		if (core_if->multiproc_int_enable) {
+			DWC_MODIFY_REG32(&dev_if->
+					 dev_global_regs->diepeachintmsk[0],
+					 msk.d32, msk.d32);
+		} else {
+			DWC_MODIFY_REG32(&dev_if->dev_global_regs->diepmsk,
+					 msk.d32, msk.d32);
+		}
+	}
+
+	if (core_if->multiproc_int_enable) {
+		/* Set NAK on Babble */
+		dctl_data_t dctl = {.d32 = 0 };
+		dctl.b.nakonbble = 1;
+		DWC_MODIFY_REG32(&dev_if->dev_global_regs->dctl, 0, dctl.d32);
+	}
+}
+
+/**
+ * This function enables the Host mode interrupts.
+ *
+ * @param core_if Programming view of DWC_otg controller
+ */
+void dwc_otg_enable_host_interrupts(dwc_otg_core_if_t * core_if)
+{
+	dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs;
+	gintmsk_data_t intr_mask = {.d32 = 0 };
+
+	DWC_DEBUGPL(DBG_CIL, "%s()\n", __func__);
+
+	/* Disable all interrupts. */
+	DWC_WRITE_REG32(&global_regs->gintmsk, 0);
+
+	/* Clear any pending interrupts. */
+	DWC_WRITE_REG32(&global_regs->gintsts, 0xFFFFFFFF);
+
+	/* Enable the common interrupts */
+	dwc_otg_enable_common_interrupts(core_if);
+
+	/*
+	 * Enable host mode interrupts without disturbing common
+	 * interrupts.
+	 */
+
+	/* Do not need sof interrupt for Descriptor DMA */
+	if (!core_if->dma_desc_enable)
+		intr_mask.b.sofintr = 1;
+	intr_mask.b.disconnect = 1;
+	intr_mask.b.portintr = 1;
+	intr_mask.b.hcintr = 1;
+
+	DWC_MODIFY_REG32(&global_regs->gintmsk, intr_mask.d32, intr_mask.d32);
+}
+
+/**
+ * This function disables the Host Mode interrupts.
+ *
+ * @param core_if Programming view of DWC_otg controller
+ */
+void dwc_otg_disable_host_interrupts(dwc_otg_core_if_t * core_if)
+{
+	dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs;
+	gintmsk_data_t intr_mask = {.d32 = 0 };
+
+	DWC_DEBUGPL(DBG_CILV, "%s()\n", __func__);
+
+	/*
+	 * Disable host mode interrupts without disturbing common
+	 * interrupts.
+	 */
+	intr_mask.b.sofintr = 1;
+	intr_mask.b.portintr = 1;
+	intr_mask.b.hcintr = 1;
+	intr_mask.b.ptxfempty = 1;
+	intr_mask.b.nptxfempty = 1;
+
+	DWC_MODIFY_REG32(&global_regs->gintmsk, intr_mask.d32, 0);
+}
+
+/**
+ * This function initializes the DWC_otg controller registers for
+ * host mode.
+ *
+ * This function flushes the Tx and Rx FIFOs and it flushes any entries in the
+ * request queues. Host channels are reset to ensure that they are ready for
+ * performing transfers.
+ *
+ * @param core_if Programming view of DWC_otg controller
+ *
+ */
+void dwc_otg_core_host_init(dwc_otg_core_if_t * core_if)
+{
+	dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs;
+	dwc_otg_host_if_t *host_if = core_if->host_if;
+	dwc_otg_core_params_t *params = core_if->core_params;
+	hprt0_data_t hprt0 = {.d32 = 0 };
+	fifosize_data_t nptxfifosize;
+	fifosize_data_t ptxfifosize;
+	uint16_t rxfsiz, nptxfsiz, hptxfsiz;
+	gdfifocfg_data_t gdfifocfg = {.d32 = 0 };
+	int i;
+	hcchar_data_t hcchar;
+	hcfg_data_t hcfg;
+	hfir_data_t hfir;
+	dwc_otg_hc_regs_t *hc_regs;
+	int num_channels;
+	gotgctl_data_t gotgctl = {.d32 = 0 };
+
+	DWC_DEBUGPL(DBG_CILV, "%s(%p)\n", __func__, core_if);
+
+	/* Restart the Phy Clock */
+	DWC_WRITE_REG32(core_if->pcgcctl, 0);
+
+	/* Initialize Host Configuration Register */
+	init_fslspclksel(core_if);
+	if (core_if->core_params->speed == DWC_SPEED_PARAM_FULL) {
+		hcfg.d32 = DWC_READ_REG32(&host_if->host_global_regs->hcfg);
+		hcfg.b.fslssupp = 1;
+		DWC_WRITE_REG32(&host_if->host_global_regs->hcfg, hcfg.d32);
+
+	}
+
+	/* This bit allows dynamic reloading of the HFIR register
+	 * during runtime. This bit needs to be programmed during 
+	 * initial configuration and its value must not be changed
+	 * during runtime.*/
+	if (core_if->core_params->reload_ctl == 1) {
+		hfir.d32 = DWC_READ_REG32(&host_if->host_global_regs->hfir);
+		hfir.b.hfirrldctrl = 1;
+		DWC_WRITE_REG32(&host_if->host_global_regs->hfir, hfir.d32);
+	}
+
+	if (core_if->core_params->dma_desc_enable) {
+		uint8_t op_mode = core_if->hwcfg2.b.op_mode;
+		if (!
+		    (core_if->hwcfg4.b.desc_dma
+		     && (core_if->snpsid >= OTG_CORE_REV_2_90a)
+		     && ((op_mode == DWC_HWCFG2_OP_MODE_HNP_SRP_CAPABLE_OTG)
+			 || (op_mode == DWC_HWCFG2_OP_MODE_SRP_ONLY_CAPABLE_OTG)
+			 || (op_mode ==
+			     DWC_HWCFG2_OP_MODE_NO_HNP_SRP_CAPABLE_OTG)
+			 || (op_mode == DWC_HWCFG2_OP_MODE_SRP_CAPABLE_HOST)
+			 || (op_mode ==
+			     DWC_HWCFG2_OP_MODE_NO_SRP_CAPABLE_HOST)))) {
+
+			DWC_ERROR("Host can't operate in Descriptor DMA mode.\n"
+				  "Either core version is below 2.90a or "
+				  "GHWCFG2, GHWCFG4 registers' values do not allow Descriptor DMA in host mode.\n"
+				  "To run the driver in Buffer DMA host mode set dma_desc_enable "
+				  "module parameter to 0.\n");
+			return;
+		}
+		hcfg.d32 = DWC_READ_REG32(&host_if->host_global_regs->hcfg);
+		hcfg.b.descdma = 1;
+		DWC_WRITE_REG32(&host_if->host_global_regs->hcfg, hcfg.d32);
+	}
+
+	/* Configure data FIFO sizes */
+	if (core_if->hwcfg2.b.dynamic_fifo && params->enable_dynamic_fifo) {
+		DWC_DEBUGPL(DBG_CIL, "Total FIFO Size=%d\n",
+			    core_if->total_fifo_size);
+		DWC_DEBUGPL(DBG_CIL, "Rx FIFO Size=%d\n",
+			    params->host_rx_fifo_size);
+		DWC_DEBUGPL(DBG_CIL, "NP Tx FIFO Size=%d\n",
+			    params->host_nperio_tx_fifo_size);
+		DWC_DEBUGPL(DBG_CIL, "P Tx FIFO Size=%d\n",
+			    params->host_perio_tx_fifo_size);
+
+		/* Rx FIFO */
+		DWC_DEBUGPL(DBG_CIL, "initial grxfsiz=%08x\n",
+			    DWC_READ_REG32(&global_regs->grxfsiz));
+		DWC_WRITE_REG32(&global_regs->grxfsiz,
+				params->host_rx_fifo_size);
+		DWC_DEBUGPL(DBG_CIL, "new grxfsiz=%08x\n",
+			    DWC_READ_REG32(&global_regs->grxfsiz));
+
+		/* Non-periodic Tx FIFO */
+		DWC_DEBUGPL(DBG_CIL, "initial gnptxfsiz=%08x\n",
+			    DWC_READ_REG32(&global_regs->gnptxfsiz));
+		nptxfifosize.b.depth = params->host_nperio_tx_fifo_size;
+		nptxfifosize.b.startaddr = params->host_rx_fifo_size;
+		DWC_WRITE_REG32(&global_regs->gnptxfsiz, nptxfifosize.d32);
+		DWC_DEBUGPL(DBG_CIL, "new gnptxfsiz=%08x\n",
+			    DWC_READ_REG32(&global_regs->gnptxfsiz));
+
+		/* Periodic Tx FIFO */
+		DWC_DEBUGPL(DBG_CIL, "initial hptxfsiz=%08x\n",
+			    DWC_READ_REG32(&global_regs->hptxfsiz));
+		ptxfifosize.b.depth = params->host_perio_tx_fifo_size;
+		ptxfifosize.b.startaddr =
+		    nptxfifosize.b.startaddr + nptxfifosize.b.depth;
+		DWC_WRITE_REG32(&global_regs->hptxfsiz, ptxfifosize.d32);
+		DWC_DEBUGPL(DBG_CIL, "new hptxfsiz=%08x\n",
+			    DWC_READ_REG32(&global_regs->hptxfsiz));
+		
+		if (core_if->en_multiple_tx_fifo) {
+			/* Global DFIFOCFG calculation for Host mode - include RxFIFO, NPTXFIFO and HPTXFIFO */
+			gdfifocfg.d32 = DWC_READ_REG32(&global_regs->gdfifocfg);
+			rxfsiz = (DWC_READ_REG32(&global_regs->grxfsiz) & 0x0000ffff);
+			nptxfsiz = (DWC_READ_REG32(&global_regs->gnptxfsiz) >> 16);
+			hptxfsiz = (DWC_READ_REG32(&global_regs->hptxfsiz) >> 16);
+			gdfifocfg.b.epinfobase = rxfsiz + nptxfsiz + hptxfsiz;
+			DWC_WRITE_REG32(&global_regs->gdfifocfg, gdfifocfg.d32);
+		}
+	}
+
+	/* TODO - check this */
+	/* Clear Host Set HNP Enable in the OTG Control Register */
+	gotgctl.b.hstsethnpen = 1;
+	DWC_MODIFY_REG32(&global_regs->gotgctl, gotgctl.d32, 0);
+	/* Make sure the FIFOs are flushed. */
+	dwc_otg_flush_tx_fifo(core_if, 0x10 /* all TX FIFOs */ );
+	dwc_otg_flush_rx_fifo(core_if);
+
+	/* Clear Host Set HNP Enable in the OTG Control Register */
+	gotgctl.b.hstsethnpen = 1;
+	DWC_MODIFY_REG32(&global_regs->gotgctl, gotgctl.d32, 0);
+
+	if (!core_if->core_params->dma_desc_enable) {
+		/* Flush out any leftover queued requests. */
+		num_channels = core_if->core_params->host_channels;
+
+		for (i = 0; i < num_channels; i++) {
+			hc_regs = core_if->host_if->hc_regs[i];
+			hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+			hcchar.b.chen = 0;
+			hcchar.b.chdis = 1;
+			hcchar.b.epdir = 0;
+			DWC_WRITE_REG32(&hc_regs->hcchar, hcchar.d32);
+		}
+
+		/* Halt all channels to put them into a known state. */
+		for (i = 0; i < num_channels; i++) {
+			int count = 0;
+			hc_regs = core_if->host_if->hc_regs[i];
+			hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+			hcchar.b.chen = 1;
+			hcchar.b.chdis = 1;
+			hcchar.b.epdir = 0;
+			DWC_WRITE_REG32(&hc_regs->hcchar, hcchar.d32);
+			DWC_DEBUGPL(DBG_HCDV, "%s: Halt channel %d\n", __func__, i);
+			do {
+				hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+				if (++count > 1000) {
+					DWC_ERROR
+					    ("%s: Unable to clear halt on channel %d\n",
+					     __func__, i);
+					break;
+				}
+				dwc_udelay(1);
+			} while (hcchar.b.chen);
+		}
+	}
+
+	/* Turn on the vbus power. */
+	DWC_PRINTF("Init: Port Power? op_state=%d\n", core_if->op_state);
+	if (core_if->op_state == A_HOST) {
+		hprt0.d32 = dwc_otg_read_hprt0(core_if);
+		DWC_PRINTF("Init: Power Port (%d)\n", hprt0.b.prtpwr);
+		if (hprt0.b.prtpwr == 0) {
+			hprt0.b.prtpwr = 1;
+			DWC_WRITE_REG32(host_if->hprt0, hprt0.d32);
+		}
+	}
+
+	dwc_otg_enable_host_interrupts(core_if);
+}
+
+/**
+ * Prepares a host channel for transferring packets to/from a specific
+ * endpoint. The HCCHARn register is set up with the characteristics specified
+ * in _hc. Host channel interrupts that may need to be serviced while this
+ * transfer is in progress are enabled.
+ *
+ * @param core_if Programming view of DWC_otg controller
+ * @param hc Information needed to initialize the host channel
+ */
+void dwc_otg_hc_init(dwc_otg_core_if_t * core_if, dwc_hc_t * hc)
+{
+	uint32_t intr_enable;
+	hcintmsk_data_t hc_intr_mask;
+	gintmsk_data_t gintmsk = {.d32 = 0 };
+	hcchar_data_t hcchar;
+	hcsplt_data_t hcsplt;
+
+	uint8_t hc_num = hc->hc_num;
+	dwc_otg_host_if_t *host_if = core_if->host_if;
+	dwc_otg_hc_regs_t *hc_regs = host_if->hc_regs[hc_num];
+
+	/* Clear old interrupt conditions for this host channel. */
+	hc_intr_mask.d32 = 0xFFFFFFFF;
+	hc_intr_mask.b.reserved14_31 = 0;
+	DWC_WRITE_REG32(&hc_regs->hcint, hc_intr_mask.d32);
+
+	/* Enable channel interrupts required for this transfer. */
+	hc_intr_mask.d32 = 0;
+	hc_intr_mask.b.chhltd = 1;
+	if (core_if->dma_enable) {
+		/* For Descriptor DMA mode core halts the channel on AHB error. Interrupt is not required */
+		if (!core_if->dma_desc_enable)
+			hc_intr_mask.b.ahberr = 1;
+		else {
+			if (hc->ep_type == DWC_OTG_EP_TYPE_ISOC)
+				hc_intr_mask.b.xfercompl = 1;
+		}
+
+		if (hc->error_state && !hc->do_split &&
+		    hc->ep_type != DWC_OTG_EP_TYPE_ISOC) {
+			hc_intr_mask.b.ack = 1;
+			if (hc->ep_is_in) {
+				hc_intr_mask.b.datatglerr = 1;
+				if (hc->ep_type != DWC_OTG_EP_TYPE_INTR) {
+					hc_intr_mask.b.nak = 1;
+				}
+			}
+		}
+	} else {
+		switch (hc->ep_type) {
+		case DWC_OTG_EP_TYPE_CONTROL:
+		case DWC_OTG_EP_TYPE_BULK:
+			hc_intr_mask.b.xfercompl = 1;
+			hc_intr_mask.b.stall = 1;
+			hc_intr_mask.b.xacterr = 1;
+			hc_intr_mask.b.datatglerr = 1;
+			if (hc->ep_is_in) {
+				hc_intr_mask.b.bblerr = 1;
+			} else {
+				hc_intr_mask.b.nak = 1;
+				hc_intr_mask.b.nyet = 1;
+				if (hc->do_ping) {
+					hc_intr_mask.b.ack = 1;
+				}
+			}
+
+			if (hc->do_split) {
+				hc_intr_mask.b.nak = 1;
+				if (hc->complete_split) {
+					hc_intr_mask.b.nyet = 1;
+				} else {
+					hc_intr_mask.b.ack = 1;
+				}
+			}
+
+			if (hc->error_state) {
+				hc_intr_mask.b.ack = 1;
+			}
+			break;
+		case DWC_OTG_EP_TYPE_INTR:
+			hc_intr_mask.b.xfercompl = 1;
+			hc_intr_mask.b.nak = 1;
+			hc_intr_mask.b.stall = 1;
+			hc_intr_mask.b.xacterr = 1;
+			hc_intr_mask.b.datatglerr = 1;
+			hc_intr_mask.b.frmovrun = 1;
+
+			if (hc->ep_is_in) {
+				hc_intr_mask.b.bblerr = 1;
+			}
+			if (hc->error_state) {
+				hc_intr_mask.b.ack = 1;
+			}
+			if (hc->do_split) {
+				if (hc->complete_split) {
+					hc_intr_mask.b.nyet = 1;
+				} else {
+					hc_intr_mask.b.ack = 1;
+				}
+			}
+			break;
+		case DWC_OTG_EP_TYPE_ISOC:
+			hc_intr_mask.b.xfercompl = 1;
+			hc_intr_mask.b.frmovrun = 1;
+			hc_intr_mask.b.ack = 1;
+
+			if (hc->ep_is_in) {
+				hc_intr_mask.b.xacterr = 1;
+				hc_intr_mask.b.bblerr = 1;
+			}
+			break;
+		}
+	}
+	DWC_WRITE_REG32(&hc_regs->hcintmsk, hc_intr_mask.d32);
+
+	/* Enable the top level host channel interrupt. */
+	intr_enable = (1 << hc_num);
+	DWC_MODIFY_REG32(&host_if->host_global_regs->haintmsk, 0, intr_enable);
+
+	/* Make sure host channel interrupts are enabled. */
+	gintmsk.b.hcintr = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gintmsk, 0, gintmsk.d32);
+
+	/*
+	 * Program the HCCHARn register with the endpoint characteristics for
+	 * the current transfer.
+	 */
+	hcchar.d32 = 0;
+	hcchar.b.devaddr = hc->dev_addr;
+	hcchar.b.epnum = hc->ep_num;
+	hcchar.b.epdir = hc->ep_is_in;
+	hcchar.b.lspddev = (hc->speed == DWC_OTG_EP_SPEED_LOW);
+	hcchar.b.eptype = hc->ep_type;
+	hcchar.b.mps = hc->max_packet;
+
+	DWC_WRITE_REG32(&host_if->hc_regs[hc_num]->hcchar, hcchar.d32);
+
+	DWC_DEBUGPL(DBG_HCDV, "%s: Channel %d\n", __func__, hc->hc_num);
+	DWC_DEBUGPL(DBG_HCDV, "	 Dev Addr: %d\n", hcchar.b.devaddr);
+	DWC_DEBUGPL(DBG_HCDV, "	 Ep Num: %d\n", hcchar.b.epnum);
+	DWC_DEBUGPL(DBG_HCDV, "	 Is In: %d\n", hcchar.b.epdir);
+	DWC_DEBUGPL(DBG_HCDV, "	 Is Low Speed: %d\n", hcchar.b.lspddev);
+	DWC_DEBUGPL(DBG_HCDV, "	 Ep Type: %d\n", hcchar.b.eptype);
+	DWC_DEBUGPL(DBG_HCDV, "	 Max Pkt: %d\n", hcchar.b.mps);
+	DWC_DEBUGPL(DBG_HCDV, "	 Multi Cnt: %d\n", hcchar.b.multicnt);
+
+	/*
+	 * Program the HCSPLIT register for SPLITs
+	 */
+	hcsplt.d32 = 0;
+	if (hc->do_split) {
+		DWC_DEBUGPL(DBG_HCDV, "Programming HC %d with split --> %s\n",
+			    hc->hc_num,
+			    hc->complete_split ? "CSPLIT" : "SSPLIT");
+		hcsplt.b.compsplt = hc->complete_split;
+		hcsplt.b.xactpos = hc->xact_pos;
+		hcsplt.b.hubaddr = hc->hub_addr;
+		hcsplt.b.prtaddr = hc->port_addr;
+		DWC_DEBUGPL(DBG_HCDV, "	  comp split %d\n", hc->complete_split);
+		DWC_DEBUGPL(DBG_HCDV, "	  xact pos %d\n", hc->xact_pos);
+		DWC_DEBUGPL(DBG_HCDV, "	  hub addr %d\n", hc->hub_addr);
+		DWC_DEBUGPL(DBG_HCDV, "	  port addr %d\n", hc->port_addr);
+		DWC_DEBUGPL(DBG_HCDV, "	  is_in %d\n", hc->ep_is_in);
+		DWC_DEBUGPL(DBG_HCDV, "	  Max Pkt: %d\n", hcchar.b.mps);
+		DWC_DEBUGPL(DBG_HCDV, "	  xferlen: %d\n", hc->xfer_len);
+	}
+	DWC_WRITE_REG32(&host_if->hc_regs[hc_num]->hcsplt, hcsplt.d32);
+
+}
+
+/**
+ * Attempts to halt a host channel. This function should only be called in
+ * Slave mode or to abort a transfer in either Slave mode or DMA mode. Under
+ * normal circumstances in DMA mode, the controller halts the channel when the
+ * transfer is complete or a condition occurs that requires application
+ * intervention.
+ *
+ * In slave mode, checks for a free request queue entry, then sets the Channel
+ * Enable and Channel Disable bits of the Host Channel Characteristics
+ * register of the specified channel to intiate the halt. If there is no free
+ * request queue entry, sets only the Channel Disable bit of the HCCHARn
+ * register to flush requests for this channel. In the latter case, sets a
+ * flag to indicate that the host channel needs to be halted when a request
+ * queue slot is open.
+ *
+ * In DMA mode, always sets the Channel Enable and Channel Disable bits of the
+ * HCCHARn register. The controller ensures there is space in the request
+ * queue before submitting the halt request.
+ *
+ * Some time may elapse before the core flushes any posted requests for this
+ * host channel and halts. The Channel Halted interrupt handler completes the
+ * deactivation of the host channel.
+ *
+ * @param core_if Controller register interface.
+ * @param hc Host channel to halt.
+ * @param halt_status Reason for halting the channel.
+ */
+void dwc_otg_hc_halt(dwc_otg_core_if_t * core_if,
+		     dwc_hc_t * hc, dwc_otg_halt_status_e halt_status)
+{
+	gnptxsts_data_t nptxsts;
+	hptxsts_data_t hptxsts;
+	hcchar_data_t hcchar;
+	dwc_otg_hc_regs_t *hc_regs;
+	dwc_otg_core_global_regs_t *global_regs;
+	dwc_otg_host_global_regs_t *host_global_regs;
+
+	hc_regs = core_if->host_if->hc_regs[hc->hc_num];
+	global_regs = core_if->core_global_regs;
+	host_global_regs = core_if->host_if->host_global_regs;
+
+	DWC_ASSERT(!(halt_status == DWC_OTG_HC_XFER_NO_HALT_STATUS),
+		   "halt_status = %d\n", halt_status);
+
+	if (halt_status == DWC_OTG_HC_XFER_URB_DEQUEUE ||
+	    halt_status == DWC_OTG_HC_XFER_AHB_ERR) {
+		/*
+		 * Disable all channel interrupts except Ch Halted. The QTD
+		 * and QH state associated with this transfer has been cleared
+		 * (in the case of URB_DEQUEUE), so the channel needs to be
+		 * shut down carefully to prevent crashes.
+		 */
+		hcintmsk_data_t hcintmsk;
+		hcintmsk.d32 = 0;
+		hcintmsk.b.chhltd = 1;
+		DWC_WRITE_REG32(&hc_regs->hcintmsk, hcintmsk.d32);
+
+		/*
+		 * Make sure no other interrupts besides halt are currently
+		 * pending. Handling another interrupt could cause a crash due
+		 * to the QTD and QH state.
+		 */
+		DWC_WRITE_REG32(&hc_regs->hcint, ~hcintmsk.d32);
+
+		/*
+		 * Make sure the halt status is set to URB_DEQUEUE or AHB_ERR
+		 * even if the channel was already halted for some other
+		 * reason.
+		 */
+		hc->halt_status = halt_status;
+
+		hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+		if (hcchar.b.chen == 0) {
+			/*
+			 * The channel is either already halted or it hasn't
+			 * started yet. In DMA mode, the transfer may halt if
+			 * it finishes normally or a condition occurs that
+			 * requires driver intervention. Don't want to halt
+			 * the channel again. In either Slave or DMA mode,
+			 * it's possible that the transfer has been assigned
+			 * to a channel, but not started yet when an URB is
+			 * dequeued. Don't want to halt a channel that hasn't
+			 * started yet.
+			 */
+			return;
+		}
+	}
+	if (hc->halt_pending) {
+		/*
+		 * A halt has already been issued for this channel. This might
+		 * happen when a transfer is aborted by a higher level in
+		 * the stack.
+		 */
+#ifdef DEBUG
+		DWC_PRINTF
+		    ("*** %s: Channel %d, _hc->halt_pending already set ***\n",
+		     __func__, hc->hc_num);
+
+#endif
+		return;
+	}
+
+	hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+
+	/* No need to set the bit in DDMA for disabling the channel */
+	//TODO check it everywhere channel is disabled          
+	if (!core_if->core_params->dma_desc_enable)
+		hcchar.b.chen = 1;
+	hcchar.b.chdis = 1;
+
+	if (!core_if->dma_enable) {
+		/* Check for space in the request queue to issue the halt. */
+		if (hc->ep_type == DWC_OTG_EP_TYPE_CONTROL ||
+		    hc->ep_type == DWC_OTG_EP_TYPE_BULK) {
+			nptxsts.d32 = DWC_READ_REG32(&global_regs->gnptxsts);
+			if (nptxsts.b.nptxqspcavail == 0) {
+				hcchar.b.chen = 0;
+			}
+		} else {
+			hptxsts.d32 =
+			    DWC_READ_REG32(&host_global_regs->hptxsts);
+			if ((hptxsts.b.ptxqspcavail == 0)
+			    || (core_if->queuing_high_bandwidth)) {
+				hcchar.b.chen = 0;
+			}
+		}
+	}
+	DWC_WRITE_REG32(&hc_regs->hcchar, hcchar.d32);
+
+	hc->halt_status = halt_status;
+
+	if (hcchar.b.chen) {
+		hc->halt_pending = 1;
+		hc->halt_on_queue = 0;
+	} else {
+		hc->halt_on_queue = 1;
+	}
+
+	DWC_DEBUGPL(DBG_HCDV, "%s: Channel %d\n", __func__, hc->hc_num);
+	DWC_DEBUGPL(DBG_HCDV, "	 hcchar: 0x%08x\n", hcchar.d32);
+	DWC_DEBUGPL(DBG_HCDV, "	 halt_pending: %d\n", hc->halt_pending);
+	DWC_DEBUGPL(DBG_HCDV, "	 halt_on_queue: %d\n", hc->halt_on_queue);
+	DWC_DEBUGPL(DBG_HCDV, "	 halt_status: %d\n", hc->halt_status);
+
+	return;
+}
+
+/**
+ * Clears the transfer state for a host channel. This function is normally
+ * called after a transfer is done and the host channel is being released.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param hc Identifies the host channel to clean up.
+ */
+void dwc_otg_hc_cleanup(dwc_otg_core_if_t * core_if, dwc_hc_t * hc)
+{
+	dwc_otg_hc_regs_t *hc_regs;
+
+	hc->xfer_started = 0;
+
+	/*
+	 * Clear channel interrupt enables and any unhandled channel interrupt
+	 * conditions.
+	 */
+	hc_regs = core_if->host_if->hc_regs[hc->hc_num];
+	DWC_WRITE_REG32(&hc_regs->hcintmsk, 0);
+	DWC_WRITE_REG32(&hc_regs->hcint, 0xFFFFFFFF);
+#ifdef DEBUG
+	DWC_TIMER_CANCEL(core_if->hc_xfer_timer[hc->hc_num]);
+#endif
+}
+
+/**
+ * Sets the channel property that indicates in which frame a periodic transfer
+ * should occur. This is always set to the _next_ frame. This function has no
+ * effect on non-periodic transfers.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param hc Identifies the host channel to set up and its properties.
+ * @param hcchar Current value of the HCCHAR register for the specified host
+ * channel.
+ */
+static inline void hc_set_even_odd_frame(dwc_otg_core_if_t * core_if,
+					 dwc_hc_t * hc, hcchar_data_t * hcchar)
+{
+	if (hc->ep_type == DWC_OTG_EP_TYPE_INTR ||
+	    hc->ep_type == DWC_OTG_EP_TYPE_ISOC) {
+		hfnum_data_t hfnum;
+		hfnum.d32 =
+		    DWC_READ_REG32(&core_if->host_if->host_global_regs->hfnum);
+
+		/* 1 if _next_ frame is odd, 0 if it's even */
+		hcchar->b.oddfrm = (hfnum.b.frnum & 0x1) ? 0 : 1;
+#ifdef DEBUG
+		if (hc->ep_type == DWC_OTG_EP_TYPE_INTR && hc->do_split
+		    && !hc->complete_split) {
+			switch (hfnum.b.frnum & 0x7) {
+			case 7:
+				core_if->hfnum_7_samples++;
+				core_if->hfnum_7_frrem_accum += hfnum.b.frrem;
+				break;
+			case 0:
+				core_if->hfnum_0_samples++;
+				core_if->hfnum_0_frrem_accum += hfnum.b.frrem;
+				break;
+			default:
+				core_if->hfnum_other_samples++;
+				core_if->hfnum_other_frrem_accum +=
+				    hfnum.b.frrem;
+				break;
+			}
+		}
+#endif
+	}
+}
+
+#ifdef DEBUG
+void hc_xfer_timeout(void *ptr)
+{
+	hc_xfer_info_t *xfer_info = NULL;
+	int hc_num = 0;
+
+	if (ptr)
+		xfer_info = (hc_xfer_info_t *) ptr;
+
+	if (!xfer_info->hc) {
+		DWC_ERROR("xfer_info->hc = %p\n", xfer_info->hc);
+		return;
+	}
+
+	hc_num = xfer_info->hc->hc_num;
+	DWC_WARN("%s: timeout on channel %d\n", __func__, hc_num);
+	DWC_WARN("	start_hcchar_val 0x%08x\n",
+		 xfer_info->core_if->start_hcchar_val[hc_num]);
+}
+#endif
+
+void ep_xfer_timeout(void *ptr)
+{
+	ep_xfer_info_t *xfer_info = NULL;
+	int ep_num = 0;
+	dctl_data_t dctl = {.d32 = 0 };
+	gintsts_data_t gintsts = {.d32 = 0 };
+	gintmsk_data_t gintmsk = {.d32 = 0 };
+
+	if (ptr)
+		xfer_info = (ep_xfer_info_t *) ptr;
+
+	if (!xfer_info->ep) {
+		DWC_ERROR("xfer_info->ep = %p\n", xfer_info->ep);
+		return;
+	}
+
+	ep_num = xfer_info->ep->num;
+	DWC_WARN("%s: timeout on endpoit %d\n", __func__, ep_num);
+	/* Put the sate to 2 as it was time outed */
+	xfer_info->state = 2;
+
+	dctl.d32 = DWC_READ_REG32(&xfer_info->core_if->
+		dev_if->dev_global_regs->dctl);
+	gintsts.d32 = DWC_READ_REG32(&xfer_info->core_if->
+		core_global_regs->gintsts);
+	gintmsk.d32 = DWC_READ_REG32(&xfer_info->core_if->
+		core_global_regs->gintmsk);
+
+	if (!gintmsk.b.goutnakeff) {
+		/* Unmask it */
+		gintmsk.b.goutnakeff = 1;
+		DWC_WRITE_REG32(&xfer_info->core_if->
+			core_global_regs->gintmsk, gintmsk.d32);
+
+	}
+
+	if (!gintsts.b.goutnakeff) {
+		dctl.b.sgoutnak = 1;
+	}
+	DWC_WRITE_REG32(&xfer_info->core_if->dev_if->
+		dev_global_regs->dctl, dctl.d32);
+
+}
+
+void set_pid_isoc(dwc_hc_t * hc)
+{
+	/* Set up the initial PID for the transfer. */
+	if (hc->speed == DWC_OTG_EP_SPEED_HIGH) {
+		if (hc->ep_is_in) {
+			if (hc->multi_count == 1) {
+				hc->data_pid_start = DWC_OTG_HC_PID_DATA0;
+			} else if (hc->multi_count == 2) {
+				hc->data_pid_start = DWC_OTG_HC_PID_DATA1;
+			} else {
+				hc->data_pid_start = DWC_OTG_HC_PID_DATA2;
+			}
+		} else {
+			if (hc->multi_count == 1) {
+				hc->data_pid_start = DWC_OTG_HC_PID_DATA0;
+			} else {
+				hc->data_pid_start = DWC_OTG_HC_PID_MDATA;
+			}
+		}
+	} else {
+		hc->data_pid_start = DWC_OTG_HC_PID_DATA0;
+	}
+}
+
+/**
+ * This function does the setup for a data transfer for a host channel and
+ * starts the transfer. May be called in either Slave mode or DMA mode. In
+ * Slave mode, the caller must ensure that there is sufficient space in the
+ * request queue and Tx Data FIFO.
+ *
+ * For an OUT transfer in Slave mode, it loads a data packet into the
+ * appropriate FIFO. If necessary, additional data packets will be loaded in
+ * the Host ISR.
+ *
+ * For an IN transfer in Slave mode, a data packet is requested. The data
+ * packets are unloaded from the Rx FIFO in the Host ISR. If necessary,
+ * additional data packets are requested in the Host ISR.
+ *
+ * For a PING transfer in Slave mode, the Do Ping bit is set in the HCTSIZ
+ * register along with a packet count of 1 and the channel is enabled. This
+ * causes a single PING transaction to occur. Other fields in HCTSIZ are
+ * simply set to 0 since no data transfer occurs in this case.
+ *
+ * For a PING transfer in DMA mode, the HCTSIZ register is initialized with
+ * all the information required to perform the subsequent data transfer. In
+ * addition, the Do Ping bit is set in the HCTSIZ register. In this case, the
+ * controller performs the entire PING protocol, then starts the data
+ * transfer.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param hc Information needed to initialize the host channel. The xfer_len
+ * value may be reduced to accommodate the max widths of the XferSize and
+ * PktCnt fields in the HCTSIZn register. The multi_count value may be changed
+ * to reflect the final xfer_len value.
+ */
+void dwc_otg_hc_start_transfer(dwc_otg_core_if_t * core_if, dwc_hc_t * hc)
+{
+	hcchar_data_t hcchar;
+	hctsiz_data_t hctsiz;
+	uint16_t num_packets;
+	uint32_t max_hc_xfer_size = core_if->core_params->max_transfer_size;
+	uint16_t max_hc_pkt_count = core_if->core_params->max_packet_count;
+	dwc_otg_hc_regs_t *hc_regs = core_if->host_if->hc_regs[hc->hc_num];
+
+	hctsiz.d32 = 0;
+
+	if (hc->do_ping) {
+		if (!core_if->dma_enable) {
+			dwc_otg_hc_do_ping(core_if, hc);
+			hc->xfer_started = 1;
+			return;
+		} else {
+			hctsiz.b.dopng = 1;
+		}
+	}
+
+	if (hc->do_split) {
+		num_packets = 1;
+
+		if (hc->complete_split && !hc->ep_is_in) {
+			/* For CSPLIT OUT Transfer, set the size to 0 so the
+			 * core doesn't expect any data written to the FIFO */
+			hc->xfer_len = 0;
+		} else if (hc->ep_is_in || (hc->xfer_len > hc->max_packet)) {
+			hc->xfer_len = hc->max_packet;
+		} else if (!hc->ep_is_in && (hc->xfer_len > 188)) {
+			hc->xfer_len = 188;
+		}
+
+		hctsiz.b.xfersize = hc->xfer_len;
+	} else {
+		/*
+		 * Ensure that the transfer length and packet count will fit
+		 * in the widths allocated for them in the HCTSIZn register.
+		 */
+		if (hc->ep_type == DWC_OTG_EP_TYPE_INTR ||
+		    hc->ep_type == DWC_OTG_EP_TYPE_ISOC) {
+			/*
+			 * Make sure the transfer size is no larger than one
+			 * (micro)frame's worth of data. (A check was done
+			 * when the periodic transfer was accepted to ensure
+			 * that a (micro)frame's worth of data can be
+			 * programmed into a channel.)
+			 */
+			uint32_t max_periodic_len =
+			    hc->multi_count * hc->max_packet;
+			if (hc->xfer_len > max_periodic_len) {
+				hc->xfer_len = max_periodic_len;
+			} else {
+			}
+		} else if (hc->xfer_len > max_hc_xfer_size) {
+			/* Make sure that xfer_len is a multiple of max packet size. */
+			hc->xfer_len = max_hc_xfer_size - hc->max_packet + 1;
+		}
+
+		if (hc->xfer_len > 0) {
+			num_packets =
+			    (hc->xfer_len + hc->max_packet -
+			     1) / hc->max_packet;
+			if (num_packets > max_hc_pkt_count) {
+				num_packets = max_hc_pkt_count;
+				hc->xfer_len = num_packets * hc->max_packet;
+			}
+		} else {
+			/* Need 1 packet for transfer length of 0. */
+			num_packets = 1;
+		}
+
+		if (hc->ep_is_in) {
+			/* Always program an integral # of max packets for IN transfers. */
+			hc->xfer_len = num_packets * hc->max_packet;
+		}
+
+		if (hc->ep_type == DWC_OTG_EP_TYPE_INTR ||
+		    hc->ep_type == DWC_OTG_EP_TYPE_ISOC) {
+			/*
+			 * Make sure that the multi_count field matches the
+			 * actual transfer length.
+			 */
+			hc->multi_count = num_packets;
+		}
+
+		if (hc->ep_type == DWC_OTG_EP_TYPE_ISOC)
+			set_pid_isoc(hc);
+
+		hctsiz.b.xfersize = hc->xfer_len;
+	}
+
+	hc->start_pkt_count = num_packets;
+	hctsiz.b.pktcnt = num_packets;
+	hctsiz.b.pid = hc->data_pid_start;
+	DWC_WRITE_REG32(&hc_regs->hctsiz, hctsiz.d32);
+
+	DWC_DEBUGPL(DBG_HCDV, "%s: Channel %d\n", __func__, hc->hc_num);
+	DWC_DEBUGPL(DBG_HCDV, "	 Xfer Size: %d\n", hctsiz.b.xfersize);
+	DWC_DEBUGPL(DBG_HCDV, "	 Num Pkts: %d\n", hctsiz.b.pktcnt);
+	DWC_DEBUGPL(DBG_HCDV, "	 Start PID: %d\n", hctsiz.b.pid);
+
+	if (core_if->dma_enable) {
+		dwc_dma_t dma_addr;
+		if (hc->align_buff) {
+			dma_addr = hc->align_buff;
+		} else {
+			dma_addr = ((unsigned long)hc->xfer_buff & 0xffffffff);
+		}
+		DWC_WRITE_REG32(&hc_regs->hcdma, dma_addr);
+	}
+
+	/* Start the split */
+	if (hc->do_split) {
+		hcsplt_data_t hcsplt;
+		hcsplt.d32 = DWC_READ_REG32(&hc_regs->hcsplt);
+		hcsplt.b.spltena = 1;
+		DWC_WRITE_REG32(&hc_regs->hcsplt, hcsplt.d32);
+	}
+
+	hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+	hcchar.b.multicnt = hc->multi_count;
+	hc_set_even_odd_frame(core_if, hc, &hcchar);
+#ifdef DEBUG
+	core_if->start_hcchar_val[hc->hc_num] = hcchar.d32;
+	if (hcchar.b.chdis) {
+		DWC_WARN("%s: chdis set, channel %d, hcchar 0x%08x\n",
+			 __func__, hc->hc_num, hcchar.d32);
+	}
+#endif
+
+	/* Set host channel enable after all other setup is complete. */
+	hcchar.b.chen = 1;
+	hcchar.b.chdis = 0;
+	DWC_WRITE_REG32(&hc_regs->hcchar, hcchar.d32);
+
+	hc->xfer_started = 1;
+	hc->requests++;
+
+	if (!core_if->dma_enable && !hc->ep_is_in && hc->xfer_len > 0) {
+		/* Load OUT packet into the appropriate Tx FIFO. */
+		dwc_otg_hc_write_packet(core_if, hc);
+	}
+#ifdef DEBUG
+	if (hc->ep_type != DWC_OTG_EP_TYPE_INTR) {
+		core_if->hc_xfer_info[hc->hc_num].core_if = core_if;
+		core_if->hc_xfer_info[hc->hc_num].hc = hc;
+
+		/* Start a timer for this transfer. */
+		DWC_TIMER_SCHEDULE(core_if->hc_xfer_timer[hc->hc_num], 10000);
+	}
+#endif
+}
+
+/**
+ * This function does the setup for a data transfer for a host channel
+ * and starts the transfer in Descriptor DMA mode.
+ *
+ * Initializes HCTSIZ register. For a PING transfer the Do Ping bit is set.
+ * Sets PID and NTD values. For periodic transfers
+ * initializes SCHED_INFO field with micro-frame bitmap.
+ *
+ * Initializes HCDMA register with descriptor list address and CTD value
+ * then starts the transfer via enabling the channel.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param hc Information needed to initialize the host channel.
+ */
+void dwc_otg_hc_start_transfer_ddma(dwc_otg_core_if_t * core_if, dwc_hc_t * hc)
+{
+	dwc_otg_hc_regs_t *hc_regs = core_if->host_if->hc_regs[hc->hc_num];
+	hcchar_data_t hcchar;
+	hctsiz_data_t hctsiz;
+	hcdma_data_t hcdma;
+
+	hctsiz.d32 = 0;
+
+	if (hc->do_ping)
+		hctsiz.b_ddma.dopng = 1;
+
+	if (hc->ep_type == DWC_OTG_EP_TYPE_ISOC)
+		set_pid_isoc(hc);
+
+	/* Packet Count and Xfer Size are not used in Descriptor DMA mode */
+	hctsiz.b_ddma.pid = hc->data_pid_start;
+	hctsiz.b_ddma.ntd = hc->ntd - 1;	/* 0 - 1 descriptor, 1 - 2 descriptors, etc. */
+	hctsiz.b_ddma.schinfo = hc->schinfo;	/* Non-zero only for high-speed interrupt endpoints */
+
+	DWC_DEBUGPL(DBG_HCDV, "%s: Channel %d\n", __func__, hc->hc_num);
+	DWC_DEBUGPL(DBG_HCDV, "	 Start PID: %d\n", hctsiz.b.pid);
+	DWC_DEBUGPL(DBG_HCDV, "	 NTD: %d\n", hctsiz.b_ddma.ntd);
+
+	DWC_WRITE_REG32(&hc_regs->hctsiz, hctsiz.d32);
+
+	hcdma.d32 = 0;
+	hcdma.b.dma_addr = ((uint32_t) hc->desc_list_addr) >> 11;
+
+	/* Always start from first descriptor. */
+	hcdma.b.ctd = 0;
+	DWC_WRITE_REG32(&hc_regs->hcdma, hcdma.d32);
+
+	hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+	hcchar.b.multicnt = hc->multi_count;
+
+#ifdef DEBUG
+	core_if->start_hcchar_val[hc->hc_num] = hcchar.d32;
+	if (hcchar.b.chdis) {
+		DWC_WARN("%s: chdis set, channel %d, hcchar 0x%08x\n",
+			 __func__, hc->hc_num, hcchar.d32);
+	}
+#endif
+
+	/* Set host channel enable after all other setup is complete. */
+	hcchar.b.chen = 1;
+	hcchar.b.chdis = 0;
+
+	DWC_WRITE_REG32(&hc_regs->hcchar, hcchar.d32);
+
+	hc->xfer_started = 1;
+	hc->requests++;
+
+#ifdef DEBUG
+	if ((hc->ep_type != DWC_OTG_EP_TYPE_INTR)
+	    && (hc->ep_type != DWC_OTG_EP_TYPE_ISOC)) {
+		core_if->hc_xfer_info[hc->hc_num].core_if = core_if;
+		core_if->hc_xfer_info[hc->hc_num].hc = hc;
+		/* Start a timer for this transfer. */
+		DWC_TIMER_SCHEDULE(core_if->hc_xfer_timer[hc->hc_num], 10000);
+	}
+#endif
+
+}
+
+/**
+ * This function continues a data transfer that was started by previous call
+ * to <code>dwc_otg_hc_start_transfer</code>. The caller must ensure there is
+ * sufficient space in the request queue and Tx Data FIFO. This function
+ * should only be called in Slave mode. In DMA mode, the controller acts
+ * autonomously to complete transfers programmed to a host channel.
+ *
+ * For an OUT transfer, a new data packet is loaded into the appropriate FIFO
+ * if there is any data remaining to be queued. For an IN transfer, another
+ * data packet is always requested. For the SETUP phase of a control transfer,
+ * this function does nothing.
+ *
+ * @return 1 if a new request is queued, 0 if no more requests are required
+ * for this transfer.
+ */
+int dwc_otg_hc_continue_transfer(dwc_otg_core_if_t * core_if, dwc_hc_t * hc)
+{
+	DWC_DEBUGPL(DBG_HCDV, "%s: Channel %d\n", __func__, hc->hc_num);
+
+	if (hc->do_split) {
+		/* SPLITs always queue just once per channel */
+		return 0;
+	} else if (hc->data_pid_start == DWC_OTG_HC_PID_SETUP) {
+		/* SETUPs are queued only once since they can't be NAKed. */
+		return 0;
+	} else if (hc->ep_is_in) {
+		/*
+		 * Always queue another request for other IN transfers. If
+		 * back-to-back INs are issued and NAKs are received for both,
+		 * the driver may still be processing the first NAK when the
+		 * second NAK is received. When the interrupt handler clears
+		 * the NAK interrupt for the first NAK, the second NAK will
+		 * not be seen. So we can't depend on the NAK interrupt
+		 * handler to requeue a NAKed request. Instead, IN requests
+		 * are issued each time this function is called. When the
+		 * transfer completes, the extra requests for the channel will
+		 * be flushed.
+		 */
+		hcchar_data_t hcchar;
+		dwc_otg_hc_regs_t *hc_regs =
+		    core_if->host_if->hc_regs[hc->hc_num];
+
+		hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+		hc_set_even_odd_frame(core_if, hc, &hcchar);
+		hcchar.b.chen = 1;
+		hcchar.b.chdis = 0;
+		DWC_DEBUGPL(DBG_HCDV, "	 IN xfer: hcchar = 0x%08x\n",
+			    hcchar.d32);
+		DWC_WRITE_REG32(&hc_regs->hcchar, hcchar.d32);
+		hc->requests++;
+		return 1;
+	} else {
+		/* OUT transfers. */
+		if (hc->xfer_count < hc->xfer_len) {
+			if (hc->ep_type == DWC_OTG_EP_TYPE_INTR ||
+			    hc->ep_type == DWC_OTG_EP_TYPE_ISOC) {
+				hcchar_data_t hcchar;
+				dwc_otg_hc_regs_t *hc_regs;
+				hc_regs = core_if->host_if->hc_regs[hc->hc_num];
+				hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+				hc_set_even_odd_frame(core_if, hc, &hcchar);
+			}
+
+			/* Load OUT packet into the appropriate Tx FIFO. */
+			dwc_otg_hc_write_packet(core_if, hc);
+			hc->requests++;
+			return 1;
+		} else {
+			return 0;
+		}
+	}
+}
+
+/**
+ * Starts a PING transfer. This function should only be called in Slave mode.
+ * The Do Ping bit is set in the HCTSIZ register, then the channel is enabled.
+ */
+void dwc_otg_hc_do_ping(dwc_otg_core_if_t * core_if, dwc_hc_t * hc)
+{
+	hcchar_data_t hcchar;
+	hctsiz_data_t hctsiz;
+	dwc_otg_hc_regs_t *hc_regs = core_if->host_if->hc_regs[hc->hc_num];
+
+	DWC_DEBUGPL(DBG_HCDV, "%s: Channel %d\n", __func__, hc->hc_num);
+
+	hctsiz.d32 = 0;
+	hctsiz.b.dopng = 1;
+	hctsiz.b.pktcnt = 1;
+	DWC_WRITE_REG32(&hc_regs->hctsiz, hctsiz.d32);
+
+	hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+	hcchar.b.chen = 1;
+	hcchar.b.chdis = 0;
+	DWC_WRITE_REG32(&hc_regs->hcchar, hcchar.d32);
+}
+
+/*
+ * This function writes a packet into the Tx FIFO associated with the Host
+ * Channel. For a channel associated with a non-periodic EP, the non-periodic
+ * Tx FIFO is written. For a channel associated with a periodic EP, the
+ * periodic Tx FIFO is written. This function should only be called in Slave
+ * mode.
+ *
+ * Upon return the xfer_buff and xfer_count fields in _hc are incremented by
+ * then number of bytes written to the Tx FIFO.
+ */
+void dwc_otg_hc_write_packet(dwc_otg_core_if_t * core_if, dwc_hc_t * hc)
+{
+	uint32_t i;
+	uint32_t remaining_count;
+	uint32_t byte_count;
+	uint32_t dword_count;
+
+	uint32_t *data_buff = (uint32_t *) (hc->xfer_buff);
+	uint32_t *data_fifo = core_if->data_fifo[hc->hc_num];
+
+	remaining_count = hc->xfer_len - hc->xfer_count;
+	if (remaining_count > hc->max_packet) {
+		byte_count = hc->max_packet;
+	} else {
+		byte_count = remaining_count;
+	}
+
+	dword_count = (byte_count + 3) / 4;
+
+	if ((((unsigned long)data_buff) & 0x3) == 0) {
+		/* xfer_buff is DWORD aligned. */
+		for (i = 0; i < dword_count; i++, data_buff++) {
+			DWC_WRITE_REG32(data_fifo, *data_buff);
+		}
+	} else {
+		/* xfer_buff is not DWORD aligned. */
+		for (i = 0; i < dword_count; i++, data_buff++) {
+			uint32_t data;
+			data =
+			    (data_buff[0] | data_buff[1] << 8 | data_buff[2] <<
+			     16 | data_buff[3] << 24);
+			DWC_WRITE_REG32(data_fifo, data);
+		}
+	}
+
+	hc->xfer_count += byte_count;
+	hc->xfer_buff += byte_count;
+}
+
+/**
+ * Gets the current USB frame number. This is the frame number from the last
+ * SOF packet.
+ */
+uint32_t dwc_otg_get_frame_number(dwc_otg_core_if_t * core_if)
+{
+	dsts_data_t dsts;
+	dsts.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dsts);
+
+	/* read current frame/microframe number from DSTS register */
+	return dsts.b.soffn;
+}
+
+/**
+ * Calculates and gets the frame Interval value of HFIR register according PHY 
+ * type and speed.The application can modify a value of HFIR register only after
+ * the Port Enable bit of the Host Port Control and Status register 
+ * (HPRT.PrtEnaPort) has been set.
+*/
+
+uint32_t calc_frame_interval(dwc_otg_core_if_t * core_if)
+{
+	gusbcfg_data_t usbcfg;
+	hwcfg2_data_t hwcfg2;
+	hprt0_data_t hprt0;
+	int clock = 60;		// default value
+	usbcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->gusbcfg);
+	hwcfg2.d32 = DWC_READ_REG32(&core_if->core_global_regs->ghwcfg2);
+	hprt0.d32 = DWC_READ_REG32(core_if->host_if->hprt0);
+	if (!usbcfg.b.physel && usbcfg.b.ulpi_utmi_sel && !usbcfg.b.phyif)
+		clock = 60;
+	if (usbcfg.b.physel && hwcfg2.b.fs_phy_type == 3)
+		clock = 48;
+	if (!usbcfg.b.phylpwrclksel && !usbcfg.b.physel &&
+	    !usbcfg.b.ulpi_utmi_sel && usbcfg.b.phyif)
+		clock = 30;
+	if (!usbcfg.b.phylpwrclksel && !usbcfg.b.physel &&
+	    !usbcfg.b.ulpi_utmi_sel && !usbcfg.b.phyif)
+		clock = 60;
+	if (usbcfg.b.phylpwrclksel && !usbcfg.b.physel &&
+	    !usbcfg.b.ulpi_utmi_sel && usbcfg.b.phyif)
+		clock = 48;
+	if (usbcfg.b.physel && !usbcfg.b.phyif && hwcfg2.b.fs_phy_type == 2)
+		clock = 48;
+	if (usbcfg.b.physel && hwcfg2.b.fs_phy_type == 1)
+		clock = 48;
+	if (hprt0.b.prtspd == 0)
+		/* High speed case */
+		return 125 * clock;
+	else
+		/* FS/LS case */
+		return 1000 * clock;
+}
+
+/**
+ * This function reads a setup packet from the Rx FIFO into the destination
+ * buffer. This function is called from the Rx Status Queue Level (RxStsQLvl)
+ * Interrupt routine when a SETUP packet has been received in Slave mode.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param dest Destination buffer for packet data.
+ */
+void dwc_otg_read_setup_packet(dwc_otg_core_if_t * core_if, uint32_t * dest)
+{
+	/* Get the 8 bytes of a setup transaction data */
+
+	/* Pop 2 DWORDS off the receive data FIFO into memory */
+	dest[0] = DWC_READ_REG32(core_if->data_fifo[0]);
+	dest[1] = DWC_READ_REG32(core_if->data_fifo[0]);
+}
+
+/**
+ * This function enables EP0 OUT to receive SETUP packets and configures EP0
+ * IN for transmitting packets. It is normally called when the
+ * "Enumeration Done" interrupt occurs.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param ep The EP0 data.
+ */
+void dwc_otg_ep0_activate(dwc_otg_core_if_t * core_if, dwc_ep_t * ep)
+{
+	dwc_otg_dev_if_t *dev_if = core_if->dev_if;
+	dsts_data_t dsts;
+	depctl_data_t diepctl;
+	depctl_data_t doepctl;
+	dctl_data_t dctl = {.d32 = 0 };
+
+	/* Read the Device Status and Endpoint 0 Control registers */
+	dsts.d32 = DWC_READ_REG32(&dev_if->dev_global_regs->dsts);
+	diepctl.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[0]->diepctl);
+	doepctl.d32 = DWC_READ_REG32(&dev_if->out_ep_regs[0]->doepctl);
+
+	/* Set the MPS of the IN EP based on the enumeration speed */
+	switch (dsts.b.enumspd) {
+	case DWC_DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ:
+	case DWC_DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ:
+	case DWC_DSTS_ENUMSPD_FS_PHY_48MHZ:
+		diepctl.b.mps = DWC_DEP0CTL_MPS_64;
+		break;
+	case DWC_DSTS_ENUMSPD_LS_PHY_6MHZ:
+		diepctl.b.mps = DWC_DEP0CTL_MPS_8;
+		break;
+	}
+
+	DWC_WRITE_REG32(&dev_if->in_ep_regs[0]->diepctl, diepctl.d32);
+
+	/* Enable OUT EP for receive */
+	doepctl.b.epena = 1;
+	DWC_WRITE_REG32(&dev_if->out_ep_regs[0]->doepctl, doepctl.d32);
+
+#ifdef VERBOSE
+	DWC_DEBUGPL(DBG_PCDV, "doepctl0=%0x\n",
+		    DWC_READ_REG32(&dev_if->out_ep_regs[0]->doepctl));
+	DWC_DEBUGPL(DBG_PCDV, "diepctl0=%0x\n",
+		    DWC_READ_REG32(&dev_if->in_ep_regs[0]->diepctl));
+#endif
+	dctl.b.cgnpinnak = 1;
+
+	DWC_MODIFY_REG32(&dev_if->dev_global_regs->dctl, dctl.d32, dctl.d32);
+	DWC_DEBUGPL(DBG_PCDV, "dctl=%0x\n",
+		    DWC_READ_REG32(&dev_if->dev_global_regs->dctl));
+
+}
+
+/**
+ * This function activates an EP.  The Device EP control register for
+ * the EP is configured as defined in the ep structure. Note: This
+ * function is not used for EP0.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param ep The EP to activate.
+ */
+void dwc_otg_ep_activate(dwc_otg_core_if_t * core_if, dwc_ep_t * ep)
+{
+	dwc_otg_dev_if_t *dev_if = core_if->dev_if;
+	depctl_data_t depctl;
+	volatile uint32_t *addr;
+	daint_data_t daintmsk = {.d32 = 0 };
+	dcfg_data_t dcfg;
+	uint8_t i;
+
+	DWC_DEBUGPL(DBG_PCDV, "%s() EP%d-%s\n", __func__, ep->num,
+		    (ep->is_in ? "IN" : "OUT"));
+
+#ifdef DWC_UTE_PER_IO
+	ep->xiso_frame_num = 0xFFFFFFFF;
+	ep->xiso_active_xfers = 0;
+	ep->xiso_queued_xfers = 0;
+#endif
+	/* Read DEPCTLn register */
+	if (ep->is_in == 1) {
+		addr = &dev_if->in_ep_regs[ep->num]->diepctl;
+		daintmsk.ep.in = 1 << ep->num;
+	} else {
+		addr = &dev_if->out_ep_regs[ep->num]->doepctl;
+		daintmsk.ep.out = 1 << ep->num;
+	}
+
+	{
+	 extern int intep_disable;
+	 if (ep->type == DWC_OTG_EP_TYPE_INTR && intep_disable)  return;
+	}
+
+	/* If the EP is already active don't change the EP Control
+	 * register. */
+	depctl.d32 = DWC_READ_REG32(addr);
+	if (!depctl.b.usbactep) {
+		depctl.b.mps = ep->maxpacket;
+		depctl.b.eptype = ep->type;
+		depctl.b.txfnum = ep->tx_fifo_num;
+
+		if (ep->type == DWC_OTG_EP_TYPE_ISOC) {
+			depctl.b.setd0pid = 1;	// ???
+		} else {
+			depctl.b.setd0pid = 1;
+		}
+		depctl.b.usbactep = 1;
+
+		/* Update nextep_seq array and EPMSCNT in DCFG*/
+		if (!(depctl.b.eptype & 1) && (ep->is_in == 1)) {	// NP IN EP
+			for (i = 0; i <= core_if->dev_if->num_in_eps; i++) {
+				if (core_if->nextep_seq[i] == core_if->first_in_nextep_seq)
+				break;
+			}
+			core_if->nextep_seq[i] = ep->num;	
+			core_if->nextep_seq[ep->num] = core_if->first_in_nextep_seq;
+			depctl.b.nextep = core_if->nextep_seq[ep->num];
+			dcfg.d32 = DWC_READ_REG32(&dev_if->dev_global_regs->dcfg);
+			dcfg.b.epmscnt++;
+			DWC_WRITE_REG32(&dev_if->dev_global_regs->dcfg, dcfg.d32);
+
+			DWC_DEBUGPL(DBG_PCDV,"%s first_in_nextep_seq= %2d; nextep_seq[]:\n", 
+				__func__, core_if->first_in_nextep_seq);
+			for (i=0; i <= core_if->dev_if->num_in_eps; i++) {
+				DWC_DEBUGPL(DBG_PCDV, "%2d\n", core_if->nextep_seq[i]);
+			}
+
+		}
+
+
+		DWC_WRITE_REG32(addr, depctl.d32);
+		DWC_DEBUGPL(DBG_PCDV, "DEPCTL=%08x\n", DWC_READ_REG32(addr));
+	}
+
+	/* Enable the Interrupt for this EP */
+	if (core_if->multiproc_int_enable) {
+		if (ep->is_in == 1) {
+			diepmsk_data_t diepmsk = {.d32 = 0 };
+			diepmsk.b.xfercompl = 1;
+			diepmsk.b.timeout = 1;
+			diepmsk.b.epdisabled = 1;
+			diepmsk.b.ahberr = 1;
+			diepmsk.b.intknepmis = 1;
+			if (!core_if->en_multiple_tx_fifo && core_if->dma_enable)
+				diepmsk.b.intknepmis = 0; 
+			diepmsk.b.txfifoundrn = 1;	//?????
+/*
+			if (core_if->dma_desc_enable) {
+				diepmsk.b.bna = 1;
+			}
+*/
+/*			
+			if (core_if->dma_enable) {
+				doepmsk.b.nak = 1;
+			}
+*/
+			DWC_WRITE_REG32(&dev_if->dev_global_regs->
+					diepeachintmsk[ep->num], diepmsk.d32);
+
+		} else {
+			doepmsk_data_t doepmsk = {.d32 = 0 };
+			doepmsk.b.xfercompl = 1;
+			doepmsk.b.ahberr = 1;
+			doepmsk.b.epdisabled = 1;
+
+/*			
+
+			if (core_if->dma_desc_enable) {
+				doepmsk.b.bna = 1;
+			}
+*/
+/*			
+			doepmsk.b.babble = 1;
+			doepmsk.b.nyet = 1;
+			doepmsk.b.nak = 1;
+*/
+			DWC_WRITE_REG32(&dev_if->dev_global_regs->
+					doepeachintmsk[ep->num], doepmsk.d32);
+		}
+		DWC_MODIFY_REG32(&dev_if->dev_global_regs->deachintmsk,
+				 0, daintmsk.d32);
+	} else {
+		DWC_MODIFY_REG32(&dev_if->dev_global_regs->daintmsk,
+				 0, daintmsk.d32);
+	}
+
+	DWC_DEBUGPL(DBG_PCDV, "DAINTMSK=%0x\n",
+		    DWC_READ_REG32(&dev_if->dev_global_regs->daintmsk));
+
+	ep->stall_clear_flag = 0;
+
+	return;
+}
+
+/**
+ * This function deactivates an EP. This is done by clearing the USB Active
+ * EP bit in the Device EP control register. Note: This function is not used
+ * for EP0. EP0 cannot be deactivated.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param ep The EP to deactivate.
+ */
+void dwc_otg_ep_deactivate(dwc_otg_core_if_t * core_if, dwc_ep_t * ep)
+{
+	depctl_data_t depctl = {.d32 = 0 };
+	volatile uint32_t *addr;
+	daint_data_t daintmsk = {.d32 = 0 };
+	dcfg_data_t dcfg;
+	uint8_t i;
+
+#ifdef DWC_UTE_PER_IO
+	ep->xiso_frame_num = 0xFFFFFFFF;
+	ep->xiso_active_xfers = 0;
+	ep->xiso_queued_xfers = 0;
+#endif
+
+	/* Read DEPCTLn register */
+	if (ep->is_in == 1) {
+		addr = &core_if->dev_if->in_ep_regs[ep->num]->diepctl;
+		daintmsk.ep.in = 1 << ep->num;
+	} else {
+		addr = &core_if->dev_if->out_ep_regs[ep->num]->doepctl;
+		daintmsk.ep.out = 1 << ep->num;
+	}
+
+	depctl.d32 = DWC_READ_REG32(addr);
+
+	depctl.b.usbactep = 0;
+	
+	/* Update nextep_seq array and EPMSCNT in DCFG*/
+	if (!(depctl.b.eptype & 1) && ep->is_in == 1) {	// NP EP IN
+		for (i = 0; i <= core_if->dev_if->num_in_eps; i++) {
+			if (core_if->nextep_seq[i] == ep->num)
+			break;
+		}
+		core_if->nextep_seq[i] = core_if->nextep_seq[ep->num];	
+		if (core_if->first_in_nextep_seq == ep->num)
+			core_if->first_in_nextep_seq = i;
+		core_if->nextep_seq[ep->num] = 0xff;
+		depctl.b.nextep = 0;
+		dcfg.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dcfg);
+		dcfg.b.epmscnt--;
+		DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dcfg, dcfg.d32);
+
+			DWC_DEBUGPL(DBG_PCDV,"%s first_in_nextep_seq= %2d; nextep_seq[]:\n", 
+				__func__, core_if->first_in_nextep_seq);
+			for (i=0; i <= core_if->dev_if->num_in_eps; i++) {
+				DWC_DEBUGPL(DBG_PCDV, "%2d\n", core_if->nextep_seq[i]);
+			}
+	}
+		
+	if (ep->is_in == 1)
+		depctl.b.txfnum = 0;
+
+	if (core_if->dma_desc_enable)
+		depctl.b.epdis = 1;
+
+	DWC_WRITE_REG32(addr, depctl.d32);
+
+	/* Disable the Interrupt for this EP */
+	if (core_if->multiproc_int_enable) {
+		DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->deachintmsk,
+				 daintmsk.d32, 0);
+
+		if (ep->is_in == 1) {
+			DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->
+					diepeachintmsk[ep->num], 0);
+		} else {
+			DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->
+					doepeachintmsk[ep->num], 0);
+		}
+	} else {
+		DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->daintmsk,
+				 daintmsk.d32, 0);
+	}
+
+}
+
+/**
+ * This function initializes dma descriptor chain.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param ep The EP to start the transfer on.
+ */
+static void init_dma_desc_chain(dwc_otg_core_if_t * core_if, dwc_ep_t * ep)
+{
+	dwc_otg_dev_dma_desc_t *dma_desc;
+	uint32_t offset;
+	uint32_t xfer_est;
+	int i;
+
+	ep->desc_cnt = (ep->total_len / ep->maxxfer) +
+	    ((ep->total_len % ep->maxxfer) ? 1 : 0);
+	if (!ep->desc_cnt)
+		ep->desc_cnt = 1;
+
+	dma_desc = ep->desc_addr;
+	xfer_est = ep->total_len;
+	offset = 0;
+	for (i = 0; i < ep->desc_cnt; ++i) {
+		/** DMA Descriptor Setup */
+		if (xfer_est > ep->maxxfer) {
+			dma_desc->status.b.bs = BS_HOST_BUSY;
+			dma_desc->status.b.l = 0;
+			dma_desc->status.b.ioc = 0;
+			dma_desc->status.b.sp = 0;
+			dma_desc->status.b.bytes = ep->maxxfer;
+			dma_desc->buf = ep->dma_addr + offset;
+			dma_desc->status.b.bs = BS_HOST_READY;
+
+			xfer_est -= ep->maxxfer;
+			offset += ep->maxxfer;
+		} else {
+			dma_desc->status.b.bs = BS_HOST_BUSY;
+			dma_desc->status.b.l = 1;
+			dma_desc->status.b.ioc = 1;
+			if (ep->is_in) {
+				dma_desc->status.b.sp =
+				    (xfer_est %
+				     ep->maxpacket) ? 1 : ((ep->
+							    sent_zlp) ? 1 : 0);
+				dma_desc->status.b.bytes = xfer_est;
+			} else {
+				dma_desc->status.b.bytes =
+				    xfer_est + ((4 - (xfer_est & 0x3)) & 0x3);
+			}
+
+			dma_desc->buf = ep->dma_addr + offset;
+			dma_desc->status.b.bs = BS_HOST_READY;
+		}
+		dma_desc++;
+	}
+}
+
+/**
+ * This function does the setup for a data transfer for an EP and
+ * starts the transfer. For an IN transfer, the packets will be
+ * loaded into the appropriate Tx FIFO in the ISR. For OUT transfers,
+ * the packets are unloaded from the Rx FIFO in the ISR.  the ISR.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param ep The EP to start the transfer on.
+ */
+
+void dwc_otg_ep_start_transfer(dwc_otg_core_if_t * core_if, dwc_ep_t * ep)
+{
+	depctl_data_t depctl;
+	deptsiz_data_t deptsiz;
+	gintmsk_data_t intr_mask = {.d32 = 0 };
+
+	DWC_DEBUGPL((DBG_PCDV | DBG_CILV), "%s()\n", __func__);
+	DWC_DEBUGPL(DBG_PCD, "ep%d-%s xfer_len=%d xfer_cnt=%d "
+		    "xfer_buff=%p start_xfer_buff=%p, total_len = %d\n",
+		    ep->num, (ep->is_in ? "IN" : "OUT"), ep->xfer_len,
+		    ep->xfer_count, ep->xfer_buff, ep->start_xfer_buff,
+		    ep->total_len);
+	/* IN endpoint */
+	if (ep->is_in == 1) {
+		dwc_otg_dev_in_ep_regs_t *in_regs =
+		    core_if->dev_if->in_ep_regs[ep->num];
+
+		gnptxsts_data_t gtxstatus;
+
+		gtxstatus.d32 =
+		    DWC_READ_REG32(&core_if->core_global_regs->gnptxsts);
+
+		if (core_if->en_multiple_tx_fifo == 0
+		    && gtxstatus.b.nptxqspcavail == 0
+		    && !core_if->dma_enable) {
+#ifdef DEBUG
+			DWC_PRINTF("TX Queue Full (0x%0x)\n", gtxstatus.d32);
+#endif
+			return;
+		}
+
+		depctl.d32 = DWC_READ_REG32(&(in_regs->diepctl));
+		deptsiz.d32 = DWC_READ_REG32(&(in_regs->dieptsiz));
+
+		ep->xfer_len += (ep->maxxfer < (ep->total_len - ep->xfer_len)) ?
+		    ep->maxxfer : (ep->total_len - ep->xfer_len);
+
+		/* Zero Length Packet? */
+		if ((ep->xfer_len - ep->xfer_count) == 0) {
+			deptsiz.b.xfersize = 0;
+			deptsiz.b.pktcnt = 1;
+		} else {
+			/* Program the transfer size and packet count
+			 *      as follows: xfersize = N * maxpacket +
+			 *      short_packet pktcnt = N + (short_packet
+			 *      exist ? 1 : 0) 
+			 */
+			deptsiz.b.xfersize = ep->xfer_len - ep->xfer_count;
+			deptsiz.b.pktcnt =
+			    (ep->xfer_len - ep->xfer_count - 1 +
+			     ep->maxpacket) / ep->maxpacket;
+		}
+
+		/* Write the DMA register */
+		if (core_if->dma_enable) {
+			if (core_if->dma_desc_enable == 0) {
+				deptsiz.b.mc = 1;
+				DWC_WRITE_REG32(&in_regs->dieptsiz,
+						deptsiz.d32);
+				DWC_WRITE_REG32(&(in_regs->diepdma),
+						(uint32_t) ep->dma_addr);
+			} else {
+#ifdef DWC_UTE_CFI
+				/* The descriptor chain should be already initialized by now */
+				if (ep->buff_mode != BM_STANDARD) {
+					DWC_WRITE_REG32(&in_regs->diepdma,
+							ep->descs_dma_addr);
+				} else {
+#endif
+					init_dma_desc_chain(core_if, ep);
+				/** DIEPDMAn Register write */
+					DWC_WRITE_REG32(&in_regs->diepdma,
+							ep->dma_desc_addr);
+#ifdef DWC_UTE_CFI
+				}
+#endif
+			}
+		} else {
+			DWC_WRITE_REG32(&in_regs->dieptsiz, deptsiz.d32);
+			if (ep->type != DWC_OTG_EP_TYPE_ISOC) {
+				/**
+				 * Enable the Non-Periodic Tx FIFO empty interrupt,
+				 * or the Tx FIFO epmty interrupt in dedicated Tx FIFO mode,
+				 * the data will be written into the fifo by the ISR.
+				 */
+				if (core_if->en_multiple_tx_fifo == 0) {
+					intr_mask.b.nptxfempty = 1;
+					DWC_MODIFY_REG32
+					    (&core_if->core_global_regs->gintmsk,
+					     intr_mask.d32, intr_mask.d32);
+				} else {
+					/* Enable the Tx FIFO Empty Interrupt for this EP */
+					if (ep->xfer_len > 0) {
+						uint32_t fifoemptymsk = 0;
+						fifoemptymsk = 1 << ep->num;
+						DWC_MODIFY_REG32
+						    (&core_if->dev_if->dev_global_regs->dtknqr4_fifoemptymsk,
+						     0, fifoemptymsk);
+
+					}
+				}
+			}
+		}
+		if (!core_if->core_params->en_multiple_tx_fifo && core_if->dma_enable)
+			depctl.b.nextep = core_if->nextep_seq[ep->num];
+		/* EP enable, IN data in FIFO */
+		depctl.b.cnak = 1;
+		depctl.b.epena = 1;
+		DWC_WRITE_REG32(&in_regs->diepctl, depctl.d32);
+
+	} else {
+		/* OUT endpoint */
+		dwc_otg_dev_out_ep_regs_t *out_regs =
+		    core_if->dev_if->out_ep_regs[ep->num];
+
+		depctl.d32 = DWC_READ_REG32(&(out_regs->doepctl));
+		deptsiz.d32 = DWC_READ_REG32(&(out_regs->doeptsiz));
+
+		ep->xfer_len += (ep->maxxfer < (ep->total_len - ep->xfer_len)) ?
+		    ep->maxxfer : (ep->total_len - ep->xfer_len);
+
+		/* Program the transfer size and packet count as follows:
+		 *
+		 *      pktcnt = N                                                                                
+		 *      xfersize = N * maxpacket
+		 */
+		if ((ep->xfer_len - ep->xfer_count) == 0) {
+			/* Zero Length Packet */
+			deptsiz.b.xfersize = ep->maxpacket;
+			deptsiz.b.pktcnt = 1;
+		} else {
+			deptsiz.b.pktcnt =
+			    (ep->xfer_len - ep->xfer_count +
+			     (ep->maxpacket - 1)) / ep->maxpacket;
+			ep->xfer_len =
+			    deptsiz.b.pktcnt * ep->maxpacket + ep->xfer_count;
+			deptsiz.b.xfersize = ep->xfer_len - ep->xfer_count;
+		}
+
+		DWC_DEBUGPL(DBG_PCDV, "ep%d xfersize=%d pktcnt=%d\n",
+			    ep->num, deptsiz.b.xfersize, deptsiz.b.pktcnt);
+
+		if (core_if->dma_enable) {
+			if (!core_if->dma_desc_enable) {
+				DWC_WRITE_REG32(&out_regs->doeptsiz,
+						deptsiz.d32);
+
+				DWC_WRITE_REG32(&(out_regs->doepdma),
+						(uint32_t) ep->dma_addr);
+			} else {
+#ifdef DWC_UTE_CFI
+				/* The descriptor chain should be already initialized by now */
+				if (ep->buff_mode != BM_STANDARD) {
+					DWC_WRITE_REG32(&out_regs->doepdma,
+							ep->descs_dma_addr);
+				} else {
+#endif
+
+					init_dma_desc_chain(core_if, ep);
+
+					if (core_if->core_params->dev_out_nak) {
+						if (ep->type == DWC_OTG_EP_TYPE_BULK) {
+							deptsiz.b.pktcnt = (ep->total_len +
+								(ep->maxpacket - 1)) / ep->maxpacket;
+							deptsiz.b.xfersize = ep->total_len;
+							/* Remember initial value of doeptsiz */
+							core_if->start_doeptsiz_val[ep->num] = deptsiz.d32;
+							DWC_WRITE_REG32(&out_regs->doeptsiz,
+								deptsiz.d32);													
+						}
+					}
+				/** DOEPDMAn Register write */
+					DWC_WRITE_REG32(&out_regs->doepdma,
+							ep->dma_desc_addr);
+#ifdef DWC_UTE_CFI
+				}
+#endif
+			}
+		} else {
+			DWC_WRITE_REG32(&out_regs->doeptsiz, deptsiz.d32);
+		}
+
+		/* EP enable */
+		depctl.b.cnak = 1;
+		depctl.b.epena = 1;
+
+		DWC_WRITE_REG32(&out_regs->doepctl, depctl.d32);
+
+		DWC_DEBUGPL(DBG_PCD, "DOEPCTL=%08x DOEPTSIZ=%08x\n",
+			    DWC_READ_REG32(&out_regs->doepctl),
+			    DWC_READ_REG32(&out_regs->doeptsiz));
+		DWC_DEBUGPL(DBG_PCD, "DAINTMSK=%08x GINTMSK=%08x\n",
+			    DWC_READ_REG32(&core_if->dev_if->
+					   dev_global_regs->daintmsk),
+			    DWC_READ_REG32(&core_if->
+					   core_global_regs->gintmsk));
+
+
+		/* Timer is scheduling only for out bulk transfers for 
+		 * "Device DDMA OUT NAK Enhancement" feature to inform user 
+		 * about received data payload in case of timeout 
+		 */
+		if (core_if->core_params->dev_out_nak) {
+			if (ep->type == DWC_OTG_EP_TYPE_BULK) {
+				core_if->ep_xfer_info[ep->num].core_if = core_if;
+				core_if->ep_xfer_info[ep->num].ep = ep;
+				core_if->ep_xfer_info[ep->num].state = 1;
+
+				/* Start a timer for this transfer. */
+				DWC_TIMER_SCHEDULE(core_if->ep_xfer_timer[ep->num], 10000);
+			}
+		}
+	}
+}
+
+/**
+ * This function setup a zero length transfer in Buffer DMA and
+ * Slave modes for usb requests with zero field set
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param ep The EP to start the transfer on.
+ *
+ */
+void dwc_otg_ep_start_zl_transfer(dwc_otg_core_if_t * core_if, dwc_ep_t * ep)
+{
+
+	depctl_data_t depctl;
+	deptsiz_data_t deptsiz;
+	gintmsk_data_t intr_mask = {.d32 = 0 };
+
+	DWC_DEBUGPL((DBG_PCDV | DBG_CILV), "%s()\n", __func__);
+	DWC_PRINTF("zero length transfer is called\n");
+
+	/* IN endpoint */
+	if (ep->is_in == 1) {
+		dwc_otg_dev_in_ep_regs_t *in_regs =
+		    core_if->dev_if->in_ep_regs[ep->num];
+
+		depctl.d32 = DWC_READ_REG32(&(in_regs->diepctl));
+		deptsiz.d32 = DWC_READ_REG32(&(in_regs->dieptsiz));
+
+		deptsiz.b.xfersize = 0;
+		deptsiz.b.pktcnt = 1;
+
+		/* Write the DMA register */
+		if (core_if->dma_enable) {
+			if (core_if->dma_desc_enable == 0) {
+				deptsiz.b.mc = 1;
+				DWC_WRITE_REG32(&in_regs->dieptsiz,
+						deptsiz.d32);
+				DWC_WRITE_REG32(&(in_regs->diepdma),
+						(uint32_t) ep->dma_addr);
+			}
+		} else {
+			DWC_WRITE_REG32(&in_regs->dieptsiz, deptsiz.d32);
+			/**
+			 * Enable the Non-Periodic Tx FIFO empty interrupt,
+			 * or the Tx FIFO epmty interrupt in dedicated Tx FIFO mode,
+			 * the data will be written into the fifo by the ISR.
+			 */
+			if (core_if->en_multiple_tx_fifo == 0) {
+				intr_mask.b.nptxfempty = 1;
+				DWC_MODIFY_REG32(&core_if->
+						 core_global_regs->gintmsk,
+						 intr_mask.d32, intr_mask.d32);
+			} else {
+				/* Enable the Tx FIFO Empty Interrupt for this EP */
+				if (ep->xfer_len > 0) {
+					uint32_t fifoemptymsk = 0;
+					fifoemptymsk = 1 << ep->num;
+					DWC_MODIFY_REG32(&core_if->
+							 dev_if->dev_global_regs->dtknqr4_fifoemptymsk,
+							 0, fifoemptymsk);
+				}
+			}
+		}
+
+		if (!core_if->core_params->en_multiple_tx_fifo && core_if->dma_enable)
+			depctl.b.nextep = core_if->nextep_seq[ep->num];
+		/* EP enable, IN data in FIFO */
+		depctl.b.cnak = 1;
+		depctl.b.epena = 1;
+		DWC_WRITE_REG32(&in_regs->diepctl, depctl.d32);
+
+	} else {
+		/* OUT endpoint */
+		dwc_otg_dev_out_ep_regs_t *out_regs =
+		    core_if->dev_if->out_ep_regs[ep->num];
+
+		depctl.d32 = DWC_READ_REG32(&(out_regs->doepctl));
+		deptsiz.d32 = DWC_READ_REG32(&(out_regs->doeptsiz));
+
+		/* Zero Length Packet */
+		deptsiz.b.xfersize = ep->maxpacket;
+		deptsiz.b.pktcnt = 1;
+
+		if (core_if->dma_enable) {
+			if (!core_if->dma_desc_enable) {
+				DWC_WRITE_REG32(&out_regs->doeptsiz,
+						deptsiz.d32);
+
+				DWC_WRITE_REG32(&(out_regs->doepdma),
+						(uint32_t) ep->dma_addr);
+			}
+		} else {
+			DWC_WRITE_REG32(&out_regs->doeptsiz, deptsiz.d32);
+		}
+
+		/* EP enable */
+		depctl.b.cnak = 1;
+		depctl.b.epena = 1;
+
+		DWC_WRITE_REG32(&out_regs->doepctl, depctl.d32);
+
+	}
+}
+
+/**
+ * This function does the setup for a data transfer for EP0 and starts
+ * the transfer.  For an IN transfer, the packets will be loaded into
+ * the appropriate Tx FIFO in the ISR. For OUT transfers, the packets are
+ * unloaded from the Rx FIFO in the ISR.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param ep The EP0 data.
+ */
+void dwc_otg_ep0_start_transfer(dwc_otg_core_if_t * core_if, dwc_ep_t * ep)
+{
+	depctl_data_t depctl;
+	deptsiz0_data_t deptsiz;
+	gintmsk_data_t intr_mask = {.d32 = 0 };
+	dwc_otg_dev_dma_desc_t *dma_desc;
+
+	DWC_DEBUGPL(DBG_PCD, "ep%d-%s xfer_len=%d xfer_cnt=%d "
+		    "xfer_buff=%p start_xfer_buff=%p \n",
+		    ep->num, (ep->is_in ? "IN" : "OUT"), ep->xfer_len,
+		    ep->xfer_count, ep->xfer_buff, ep->start_xfer_buff);
+
+	ep->total_len = ep->xfer_len;
+
+	/* IN endpoint */
+	if (ep->is_in == 1) {
+		dwc_otg_dev_in_ep_regs_t *in_regs =
+		    core_if->dev_if->in_ep_regs[0];
+
+		gnptxsts_data_t gtxstatus;
+
+		gtxstatus.d32 =
+		    DWC_READ_REG32(&core_if->core_global_regs->gnptxsts);
+
+		if (core_if->en_multiple_tx_fifo == 0
+		    && gtxstatus.b.nptxqspcavail == 0
+		    && !core_if->dma_enable) {
+#ifdef DEBUG
+			deptsiz.d32 = DWC_READ_REG32(&in_regs->dieptsiz);
+			DWC_DEBUGPL(DBG_PCD, "DIEPCTL0=%0x\n",
+				    DWC_READ_REG32(&in_regs->diepctl));
+			DWC_DEBUGPL(DBG_PCD, "DIEPTSIZ0=%0x (sz=%d, pcnt=%d)\n",
+				    deptsiz.d32,
+				    deptsiz.b.xfersize, deptsiz.b.pktcnt);
+			DWC_PRINTF("TX Queue or FIFO Full (0x%0x)\n",
+				   gtxstatus.d32);
+#endif
+			return;
+		}
+
+		depctl.d32 = DWC_READ_REG32(&in_regs->diepctl);
+		deptsiz.d32 = DWC_READ_REG32(&in_regs->dieptsiz);
+
+		/* Zero Length Packet? */
+		if (ep->xfer_len == 0) {
+			deptsiz.b.xfersize = 0;
+			deptsiz.b.pktcnt = 1;
+		} else {
+			/* Program the transfer size and packet count
+			 *      as follows: xfersize = N * maxpacket +
+			 *      short_packet pktcnt = N + (short_packet
+			 *      exist ? 1 : 0) 
+			 */
+			if (ep->xfer_len > ep->maxpacket) {
+				ep->xfer_len = ep->maxpacket;
+				deptsiz.b.xfersize = ep->maxpacket;
+			} else {
+				deptsiz.b.xfersize = ep->xfer_len;
+			}
+			deptsiz.b.pktcnt = 1;
+
+		}
+		DWC_DEBUGPL(DBG_PCDV,
+			    "IN len=%d  xfersize=%d pktcnt=%d [%08x]\n",
+			    ep->xfer_len, deptsiz.b.xfersize, deptsiz.b.pktcnt,
+			    deptsiz.d32);
+
+		/* Write the DMA register */
+		if (core_if->dma_enable) {
+			if (core_if->dma_desc_enable == 0) {
+				DWC_WRITE_REG32(&in_regs->dieptsiz,
+						deptsiz.d32);
+
+				DWC_WRITE_REG32(&(in_regs->diepdma),
+						(uint32_t) ep->dma_addr);
+			} else {
+				dma_desc = core_if->dev_if->in_desc_addr;
+
+				/** DMA Descriptor Setup */
+				dma_desc->status.b.bs = BS_HOST_BUSY;
+				dma_desc->status.b.l = 1;
+				dma_desc->status.b.ioc = 1;
+				dma_desc->status.b.sp =
+				    (ep->xfer_len == ep->maxpacket) ? 0 : 1;
+				dma_desc->status.b.bytes = ep->xfer_len;
+				dma_desc->buf = ep->dma_addr;
+				dma_desc->status.b.bs = BS_HOST_READY;
+
+				/** DIEPDMA0 Register write */
+				DWC_WRITE_REG32(&in_regs->diepdma,
+						core_if->
+						dev_if->dma_in_desc_addr);
+			}
+		} else {
+			DWC_WRITE_REG32(&in_regs->dieptsiz, deptsiz.d32);
+		}
+
+		if (!core_if->core_params->en_multiple_tx_fifo && core_if->dma_enable)
+			depctl.b.nextep = core_if->nextep_seq[ep->num];
+		/* EP enable, IN data in FIFO */
+		depctl.b.cnak = 1;
+		depctl.b.epena = 1;
+		DWC_WRITE_REG32(&in_regs->diepctl, depctl.d32);
+
+		/**
+		 * Enable the Non-Periodic Tx FIFO empty interrupt, the
+		 * data will be written into the fifo by the ISR.
+		 */
+		if (!core_if->dma_enable) {
+			if (core_if->en_multiple_tx_fifo == 0) {
+				intr_mask.b.nptxfempty = 1;
+				DWC_MODIFY_REG32(&core_if->
+						 core_global_regs->gintmsk,
+						 intr_mask.d32, intr_mask.d32);
+			} else {
+				/* Enable the Tx FIFO Empty Interrupt for this EP */
+				if (ep->xfer_len > 0) {
+					uint32_t fifoemptymsk = 0;
+					fifoemptymsk |= 1 << ep->num;
+					DWC_MODIFY_REG32(&core_if->
+							 dev_if->dev_global_regs->dtknqr4_fifoemptymsk,
+							 0, fifoemptymsk);
+				}
+			}
+		}
+	} else {
+		/* OUT endpoint */
+		dwc_otg_dev_out_ep_regs_t *out_regs =
+		    core_if->dev_if->out_ep_regs[0];
+
+		depctl.d32 = DWC_READ_REG32(&out_regs->doepctl);
+		deptsiz.d32 = DWC_READ_REG32(&out_regs->doeptsiz);
+
+		/* Program the transfer size and packet count as follows:
+		 *      xfersize = N * (maxpacket + 4 - (maxpacket % 4))
+		 *      pktcnt = N                                                                                      */
+		/* Zero Length Packet */
+		deptsiz.b.xfersize = ep->maxpacket;
+		deptsiz.b.pktcnt = 1;
+
+		DWC_DEBUGPL(DBG_PCDV, "len=%d  xfersize=%d pktcnt=%d\n",
+			    ep->xfer_len, deptsiz.b.xfersize, deptsiz.b.pktcnt);
+
+		if (core_if->dma_enable) {
+			if (!core_if->dma_desc_enable) {
+				DWC_WRITE_REG32(&out_regs->doeptsiz,
+						deptsiz.d32);
+
+				DWC_WRITE_REG32(&(out_regs->doepdma),
+						(uint32_t) ep->dma_addr);
+			} else {
+				dma_desc = core_if->dev_if->out_desc_addr;
+
+				/** DMA Descriptor Setup */
+				dma_desc->status.b.bs = BS_HOST_BUSY;
+				dma_desc->status.b.l = 1;
+				dma_desc->status.b.ioc = 1;
+				dma_desc->status.b.bytes = ep->maxpacket;
+				dma_desc->buf = ep->dma_addr;
+				dma_desc->status.b.bs = BS_HOST_READY;
+
+				/** DOEPDMA0 Register write */
+				DWC_WRITE_REG32(&out_regs->doepdma,
+						core_if->
+						dev_if->dma_out_desc_addr);
+			}
+		} else {
+			DWC_WRITE_REG32(&out_regs->doeptsiz, deptsiz.d32);
+		}
+
+		/* EP enable */
+		depctl.b.cnak = 1;
+		depctl.b.epena = 1;
+		DWC_WRITE_REG32(&(out_regs->doepctl), depctl.d32);
+	}
+}
+
+/**
+ * This function continues control IN transfers started by
+ * dwc_otg_ep0_start_transfer, when the transfer does not fit in a
+ * single packet.  NOTE: The DIEPCTL0/DOEPCTL0 registers only have one
+ * bit for the packet count.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param ep The EP0 data.
+ */
+void dwc_otg_ep0_continue_transfer(dwc_otg_core_if_t * core_if, dwc_ep_t * ep)
+{
+	depctl_data_t depctl;
+	deptsiz0_data_t deptsiz;
+	gintmsk_data_t intr_mask = {.d32 = 0 };
+	dwc_otg_dev_dma_desc_t *dma_desc;
+
+	if (ep->is_in == 1) {
+		dwc_otg_dev_in_ep_regs_t *in_regs =
+		    core_if->dev_if->in_ep_regs[0];
+		gnptxsts_data_t tx_status = {.d32 = 0 };
+
+		tx_status.d32 =
+		    DWC_READ_REG32(&core_if->core_global_regs->gnptxsts);
+		/** @todo Should there be check for room in the Tx
+		 * Status Queue.  If not remove the code above this comment. */
+
+		depctl.d32 = DWC_READ_REG32(&in_regs->diepctl);
+		deptsiz.d32 = DWC_READ_REG32(&in_regs->dieptsiz);
+
+		/* Program the transfer size and packet count
+		 *      as follows: xfersize = N * maxpacket +
+		 *      short_packet pktcnt = N + (short_packet
+		 *      exist ? 1 : 0) 
+		 */
+
+		if (core_if->dma_desc_enable == 0) {
+			deptsiz.b.xfersize =
+			    (ep->total_len - ep->xfer_count) >
+			    ep->maxpacket ? ep->maxpacket : (ep->total_len -
+							     ep->xfer_count);
+			deptsiz.b.pktcnt = 1;
+			if (core_if->dma_enable == 0) {
+				ep->xfer_len += deptsiz.b.xfersize;
+			} else {
+				ep->xfer_len = deptsiz.b.xfersize;
+			}
+			DWC_WRITE_REG32(&in_regs->dieptsiz, deptsiz.d32);
+		} else {
+			ep->xfer_len =
+			    (ep->total_len - ep->xfer_count) >
+			    ep->maxpacket ? ep->maxpacket : (ep->total_len -
+							     ep->xfer_count);
+
+			dma_desc = core_if->dev_if->in_desc_addr;
+
+			/** DMA Descriptor Setup */
+			dma_desc->status.b.bs = BS_HOST_BUSY;
+			dma_desc->status.b.l = 1;
+			dma_desc->status.b.ioc = 1;
+			dma_desc->status.b.sp =
+			    (ep->xfer_len == ep->maxpacket) ? 0 : 1;
+			dma_desc->status.b.bytes = ep->xfer_len;
+			dma_desc->buf = ep->dma_addr;
+			dma_desc->status.b.bs = BS_HOST_READY;
+
+			/** DIEPDMA0 Register write */
+			DWC_WRITE_REG32(&in_regs->diepdma,
+					core_if->dev_if->dma_in_desc_addr);
+		}
+
+		DWC_DEBUGPL(DBG_PCDV,
+			    "IN len=%d  xfersize=%d pktcnt=%d [%08x]\n",
+			    ep->xfer_len, deptsiz.b.xfersize, deptsiz.b.pktcnt,
+			    deptsiz.d32);
+
+		/* Write the DMA register */
+		if (core_if->hwcfg2.b.architecture == DWC_INT_DMA_ARCH) {
+			if (core_if->dma_desc_enable == 0)
+				DWC_WRITE_REG32(&(in_regs->diepdma),
+						(uint32_t) ep->dma_addr);
+		}
+		if (!core_if->core_params->en_multiple_tx_fifo && core_if->dma_enable)
+			depctl.b.nextep = core_if->nextep_seq[ep->num];
+		/* EP enable, IN data in FIFO */
+		depctl.b.cnak = 1;
+		depctl.b.epena = 1;
+		DWC_WRITE_REG32(&in_regs->diepctl, depctl.d32);
+
+		/**
+		 * Enable the Non-Periodic Tx FIFO empty interrupt, the
+		 * data will be written into the fifo by the ISR.
+		 */
+		if (!core_if->dma_enable) {
+			if (core_if->en_multiple_tx_fifo == 0) {
+				/* First clear it from GINTSTS */
+				intr_mask.b.nptxfempty = 1;
+				DWC_MODIFY_REG32(&core_if->
+						 core_global_regs->gintmsk,
+						 intr_mask.d32, intr_mask.d32);
+
+			} else {
+				/* Enable the Tx FIFO Empty Interrupt for this EP */
+				if (ep->xfer_len > 0) {
+					uint32_t fifoemptymsk = 0;
+					fifoemptymsk |= 1 << ep->num;
+					DWC_MODIFY_REG32(&core_if->
+							 dev_if->dev_global_regs->dtknqr4_fifoemptymsk,
+							 0, fifoemptymsk);
+				}
+			}
+		}
+	} else {
+		dwc_otg_dev_out_ep_regs_t *out_regs =
+		    core_if->dev_if->out_ep_regs[0];
+
+		depctl.d32 = DWC_READ_REG32(&out_regs->doepctl);
+		deptsiz.d32 = DWC_READ_REG32(&out_regs->doeptsiz);
+
+		/* Program the transfer size and packet count
+		 *      as follows: xfersize = N * maxpacket +
+		 *      short_packet pktcnt = N + (short_packet
+		 *      exist ? 1 : 0) 
+		 */
+		deptsiz.b.xfersize = ep->maxpacket;
+		deptsiz.b.pktcnt = 1;
+
+		if (core_if->dma_desc_enable == 0) {
+			DWC_WRITE_REG32(&out_regs->doeptsiz, deptsiz.d32);
+		} else {
+			dma_desc = core_if->dev_if->out_desc_addr;
+
+			/** DMA Descriptor Setup */
+			dma_desc->status.b.bs = BS_HOST_BUSY;
+			dma_desc->status.b.l = 1;
+			dma_desc->status.b.ioc = 1;
+			dma_desc->status.b.bytes = ep->maxpacket;
+			dma_desc->buf = ep->dma_addr;
+			dma_desc->status.b.bs = BS_HOST_READY;
+
+			/** DOEPDMA0 Register write */
+			DWC_WRITE_REG32(&out_regs->doepdma,
+					core_if->dev_if->dma_out_desc_addr);
+		}
+
+		DWC_DEBUGPL(DBG_PCDV,
+			    "IN len=%d  xfersize=%d pktcnt=%d [%08x]\n",
+			    ep->xfer_len, deptsiz.b.xfersize, deptsiz.b.pktcnt,
+			    deptsiz.d32);
+
+		/* Write the DMA register */
+		if (core_if->hwcfg2.b.architecture == DWC_INT_DMA_ARCH) {
+			if (core_if->dma_desc_enable == 0)
+				DWC_WRITE_REG32(&(out_regs->doepdma),
+						(uint32_t) ep->dma_addr);
+
+		}
+
+		/* EP enable, IN data in FIFO */
+		depctl.b.cnak = 1;
+		depctl.b.epena = 1;
+		DWC_WRITE_REG32(&out_regs->doepctl, depctl.d32);
+
+	}
+}
+
+#ifdef DEBUG
+void dump_msg(const u8 * buf, unsigned int length)
+{
+	unsigned int start, num, i;
+	char line[52], *p;
+
+	if (length >= 512)
+		return;
+	start = 0;
+	while (length > 0) {
+		num = length < 16u ? length : 16u;
+		p = line;
+		for (i = 0; i < num; ++i) {
+			if (i == 8)
+				*p++ = ' ';
+			DWC_SPRINTF(p, " %02x", buf[i]);
+			p += 3;
+		}
+		*p = 0;
+		DWC_PRINTF("%6x: %s\n", start, line);
+		buf += num;
+		start += num;
+		length -= num;
+	}
+}
+#else
+static inline void dump_msg(const u8 * buf, unsigned int length)
+{
+}
+#endif
+
+/**
+ * This function writes a packet into the Tx FIFO associated with the
+ * EP. For non-periodic EPs the non-periodic Tx FIFO is written.  For
+ * periodic EPs the periodic Tx FIFO associated with the EP is written
+ * with all packets for the next micro-frame.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param ep The EP to write packet for.
+ * @param dma Indicates if DMA is being used.
+ */
+void dwc_otg_ep_write_packet(dwc_otg_core_if_t * core_if, dwc_ep_t * ep,
+			     int dma)
+{
+	/**
+	 * The buffer is padded to DWORD on a per packet basis in
+	 * slave/dma mode if the MPS is not DWORD aligned. The last
+	 * packet, if short, is also padded to a multiple of DWORD.
+	 *
+	 * ep->xfer_buff always starts DWORD aligned in memory and is a
+	 * multiple of DWORD in length
+	 *
+	 * ep->xfer_len can be any number of bytes
+	 *
+	 * ep->xfer_count is a multiple of ep->maxpacket until the last
+	 *	packet
+	 *
+	 * FIFO access is DWORD */
+
+	uint32_t i;
+	uint32_t byte_count;
+	uint32_t dword_count;
+	uint32_t *fifo;
+	uint32_t *data_buff = (uint32_t *) ep->xfer_buff;
+
+	DWC_DEBUGPL((DBG_PCDV | DBG_CILV), "%s(%p,%p)\n", __func__, core_if,
+		    ep);
+	if (ep->xfer_count >= ep->xfer_len) {
+		DWC_WARN("%s() No data for EP%d!!!\n", __func__, ep->num);
+		return;
+	}
+
+	/* Find the byte length of the packet either short packet or MPS */
+	if ((ep->xfer_len - ep->xfer_count) < ep->maxpacket) {
+		byte_count = ep->xfer_len - ep->xfer_count;
+	} else {
+		byte_count = ep->maxpacket;
+	}
+
+	/* Find the DWORD length, padded by extra bytes as neccessary if MPS
+	 * is not a multiple of DWORD */
+	dword_count = (byte_count + 3) / 4;
+
+#ifdef VERBOSE
+	dump_msg(ep->xfer_buff, byte_count);
+#endif
+
+	/**@todo NGS Where are the Periodic Tx FIFO addresses
+	 * intialized?	What should this be? */
+
+	fifo = core_if->data_fifo[ep->num];
+
+	DWC_DEBUGPL((DBG_PCDV | DBG_CILV), "fifo=%p buff=%p *p=%08x bc=%d\n",
+		    fifo, data_buff, *data_buff, byte_count);
+
+	if (!dma) {
+		for (i = 0; i < dword_count; i++, data_buff++) {
+			DWC_WRITE_REG32(fifo, *data_buff);
+		}
+	}
+
+	ep->xfer_count += byte_count;
+	ep->xfer_buff += byte_count;
+	ep->dma_addr += byte_count;
+}
+
+/**
+ * Set the EP STALL.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param ep The EP to set the stall on.
+ */
+void dwc_otg_ep_set_stall(dwc_otg_core_if_t * core_if, dwc_ep_t * ep)
+{
+	depctl_data_t depctl;
+	volatile uint32_t *depctl_addr;
+
+	DWC_DEBUGPL(DBG_PCD, "%s ep%d-%s\n", __func__, ep->num,
+		    (ep->is_in ? "IN" : "OUT"));
+
+	if (ep->is_in == 1) {
+		depctl_addr = &(core_if->dev_if->in_ep_regs[ep->num]->diepctl);
+		depctl.d32 = DWC_READ_REG32(depctl_addr);
+
+		/* set the disable and stall bits */
+		if (depctl.b.epena) {
+			depctl.b.epdis = 1;
+		}
+		depctl.b.stall = 1;
+		DWC_WRITE_REG32(depctl_addr, depctl.d32);
+	} else {
+		depctl_addr = &(core_if->dev_if->out_ep_regs[ep->num]->doepctl);
+		depctl.d32 = DWC_READ_REG32(depctl_addr);
+
+		/* set the stall bit */
+		depctl.b.stall = 1;
+		DWC_WRITE_REG32(depctl_addr, depctl.d32);
+	}
+
+	DWC_DEBUGPL(DBG_PCD, "DEPCTL=%0x\n", DWC_READ_REG32(depctl_addr));
+
+	return;
+}
+
+/**
+ * Clear the EP STALL.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param ep The EP to clear stall from.
+ */
+void dwc_otg_ep_clear_stall(dwc_otg_core_if_t * core_if, dwc_ep_t * ep)
+{
+	depctl_data_t depctl;
+	volatile uint32_t *depctl_addr;
+
+	DWC_DEBUGPL(DBG_PCD, "%s ep%d-%s\n", __func__, ep->num,
+		    (ep->is_in ? "IN" : "OUT"));
+
+	if (ep->is_in == 1) {
+		depctl_addr = &(core_if->dev_if->in_ep_regs[ep->num]->diepctl);
+	} else {
+		depctl_addr = &(core_if->dev_if->out_ep_regs[ep->num]->doepctl);
+	}
+
+	depctl.d32 = DWC_READ_REG32(depctl_addr);
+
+	/* clear the stall bits */
+	depctl.b.stall = 0;
+
+	/*
+	 * USB Spec 9.4.5: For endpoints using data toggle, regardless
+	 * of whether an endpoint has the Halt feature set, a
+	 * ClearFeature(ENDPOINT_HALT) request always results in the
+	 * data toggle being reinitialized to DATA0.
+	 */
+	if (ep->type == DWC_OTG_EP_TYPE_INTR ||
+	    ep->type == DWC_OTG_EP_TYPE_BULK) {
+		depctl.b.setd0pid = 1;	/* DATA0 */
+	}
+
+	DWC_WRITE_REG32(depctl_addr, depctl.d32);
+	DWC_DEBUGPL(DBG_PCD, "DEPCTL=%0x\n", DWC_READ_REG32(depctl_addr));
+	return;
+}
+
+/**
+ * This function reads a packet from the Rx FIFO into the destination
+ * buffer. To read SETUP data use dwc_otg_read_setup_packet.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param dest	  Destination buffer for the packet.
+ * @param bytes  Number of bytes to copy to the destination.
+ */
+void dwc_otg_read_packet(dwc_otg_core_if_t * core_if,
+			 uint8_t * dest, uint16_t bytes)
+{
+	int i;
+	int word_count = (bytes + 3) / 4;
+
+	volatile uint32_t *fifo = core_if->data_fifo[0];
+	uint32_t *data_buff = (uint32_t *) dest;
+
+	/**
+	 * @todo Account for the case where _dest is not dword aligned. This
+	 * requires reading data from the FIFO into a uint32_t temp buffer,
+	 * then moving it into the data buffer.
+	 */
+
+	DWC_DEBUGPL((DBG_PCDV | DBG_CILV), "%s(%p,%p,%d)\n", __func__,
+		    core_if, dest, bytes);
+
+	for (i = 0; i < word_count; i++, data_buff++) {
+		*data_buff = DWC_READ_REG32(fifo);
+	}
+
+	return;
+}
+
+/**
+ * This functions reads the device registers and prints them
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ */
+void dwc_otg_dump_dev_registers(dwc_otg_core_if_t * core_if)
+{
+	int i;
+	volatile uint32_t *addr;
+
+	DWC_PRINTF("Device Global Registers\n");
+	addr = &core_if->dev_if->dev_global_regs->dcfg;
+	DWC_PRINTF("DCFG		 @0x%08lX : 0x%08X\n", (unsigned long) addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->dev_if->dev_global_regs->dctl;
+	DWC_PRINTF("DCTL		 @0x%08lX : 0x%08X\n", (unsigned long) addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->dev_if->dev_global_regs->dsts;
+	DWC_PRINTF("DSTS		 @0x%08lX : 0x%08X\n", (unsigned long) addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->dev_if->dev_global_regs->diepmsk;
+	DWC_PRINTF("DIEPMSK	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->dev_if->dev_global_regs->doepmsk;
+	DWC_PRINTF("DOEPMSK	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->dev_if->dev_global_regs->daint;
+	DWC_PRINTF("DAINT	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->dev_if->dev_global_regs->daintmsk;
+	DWC_PRINTF("DAINTMSK	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->dev_if->dev_global_regs->dtknqr1;
+	DWC_PRINTF("DTKNQR1	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	if (core_if->hwcfg2.b.dev_token_q_depth > 6) {
+		addr = &core_if->dev_if->dev_global_regs->dtknqr2;
+		DWC_PRINTF("DTKNQR2	 @0x%08lX : 0x%08X\n",
+			   (unsigned long)addr, DWC_READ_REG32(addr));
+	}
+
+	addr = &core_if->dev_if->dev_global_regs->dvbusdis;
+	DWC_PRINTF("DVBUSID	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+
+	addr = &core_if->dev_if->dev_global_regs->dvbuspulse;
+	DWC_PRINTF("DVBUSPULSE	@0x%08lX : 0x%08X\n",
+		   (unsigned long)addr, DWC_READ_REG32(addr));
+
+	addr = &core_if->dev_if->dev_global_regs->dtknqr3_dthrctl;
+	DWC_PRINTF("DTKNQR3_DTHRCTL	 @0x%08lX : 0x%08X\n",
+		   (unsigned long)addr, DWC_READ_REG32(addr));
+
+	if (core_if->hwcfg2.b.dev_token_q_depth > 22) {
+		addr = &core_if->dev_if->dev_global_regs->dtknqr4_fifoemptymsk;
+		DWC_PRINTF("DTKNQR4	 @0x%08lX : 0x%08X\n",
+			   (unsigned long)addr, DWC_READ_REG32(addr));
+	}
+
+	addr = &core_if->dev_if->dev_global_regs->dtknqr4_fifoemptymsk;
+	DWC_PRINTF("FIFOEMPMSK	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+
+	if (core_if->hwcfg2.b.multi_proc_int) {
+
+		addr = &core_if->dev_if->dev_global_regs->deachint;
+		DWC_PRINTF("DEACHINT	 @0x%08lX : 0x%08X\n",
+			   (unsigned long)addr, DWC_READ_REG32(addr));
+		addr = &core_if->dev_if->dev_global_regs->deachintmsk;
+		DWC_PRINTF("DEACHINTMSK	 @0x%08lX : 0x%08X\n",
+			   (unsigned long)addr, DWC_READ_REG32(addr));
+
+		for (i = 0; i <= core_if->dev_if->num_in_eps; i++) {
+			addr =
+			    &core_if->dev_if->dev_global_regs->
+			    diepeachintmsk[i];
+			DWC_PRINTF("DIEPEACHINTMSK[%d]	 @0x%08lX : 0x%08X\n",
+				   i, (unsigned long)addr,
+				   DWC_READ_REG32(addr));
+		}
+
+		for (i = 0; i <= core_if->dev_if->num_out_eps; i++) {
+			addr =
+			    &core_if->dev_if->dev_global_regs->
+			    doepeachintmsk[i];
+			DWC_PRINTF("DOEPEACHINTMSK[%d]	 @0x%08lX : 0x%08X\n",
+				   i, (unsigned long)addr,
+				   DWC_READ_REG32(addr));
+		}
+	}
+
+	for (i = 0; i <= core_if->dev_if->num_in_eps; i++) {
+		DWC_PRINTF("Device IN EP %d Registers\n", i);
+		addr = &core_if->dev_if->in_ep_regs[i]->diepctl;
+		DWC_PRINTF("DIEPCTL	 @0x%08lX : 0x%08X\n",
+			   (unsigned long)addr, DWC_READ_REG32(addr));
+		addr = &core_if->dev_if->in_ep_regs[i]->diepint;
+		DWC_PRINTF("DIEPINT	 @0x%08lX : 0x%08X\n",
+			   (unsigned long)addr, DWC_READ_REG32(addr));
+		addr = &core_if->dev_if->in_ep_regs[i]->dieptsiz;
+		DWC_PRINTF("DIETSIZ	 @0x%08lX : 0x%08X\n",
+			   (unsigned long)addr, DWC_READ_REG32(addr));
+		addr = &core_if->dev_if->in_ep_regs[i]->diepdma;
+		DWC_PRINTF("DIEPDMA	 @0x%08lX : 0x%08X\n",
+			   (unsigned long)addr, DWC_READ_REG32(addr));
+		addr = &core_if->dev_if->in_ep_regs[i]->dtxfsts;
+		DWC_PRINTF("DTXFSTS	 @0x%08lX : 0x%08X\n",
+			   (unsigned long)addr, DWC_READ_REG32(addr));
+		addr = &core_if->dev_if->in_ep_regs[i]->diepdmab;
+		DWC_PRINTF("DIEPDMAB	 @0x%08lX : 0x%08X\n",
+			   (unsigned long)addr, 0 /*DWC_READ_REG32(addr) */ );
+	}
+
+	for (i = 0; i <= core_if->dev_if->num_out_eps; i++) {
+		DWC_PRINTF("Device OUT EP %d Registers\n", i);
+		addr = &core_if->dev_if->out_ep_regs[i]->doepctl;
+		DWC_PRINTF("DOEPCTL	 @0x%08lX : 0x%08X\n",
+			   (unsigned long)addr, DWC_READ_REG32(addr));
+		addr = &core_if->dev_if->out_ep_regs[i]->doepfn;
+		DWC_PRINTF("DOEPFN	 @0x%08lX : 0x%08X\n",
+			   (unsigned long)addr, DWC_READ_REG32(addr));
+		addr = &core_if->dev_if->out_ep_regs[i]->doepint;
+		DWC_PRINTF("DOEPINT	 @0x%08lX : 0x%08X\n",
+			   (unsigned long)addr, DWC_READ_REG32(addr));
+		addr = &core_if->dev_if->out_ep_regs[i]->doeptsiz;
+		DWC_PRINTF("DOETSIZ	 @0x%08lX : 0x%08X\n",
+			   (unsigned long)addr, DWC_READ_REG32(addr));
+		addr = &core_if->dev_if->out_ep_regs[i]->doepdma;
+		DWC_PRINTF("DOEPDMA	 @0x%08lX : 0x%08X\n",
+			   (unsigned long)addr, DWC_READ_REG32(addr));
+		if (core_if->dma_enable) {	/* Don't access this register in SLAVE mode */
+			addr = &core_if->dev_if->out_ep_regs[i]->doepdmab;
+			DWC_PRINTF("DOEPDMAB	 @0x%08lX : 0x%08X\n",
+				   (unsigned long)addr, DWC_READ_REG32(addr));
+		}
+
+	}
+}
+
+/**
+ * This functions reads the SPRAM and prints its content
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ */
+void dwc_otg_dump_spram(dwc_otg_core_if_t * core_if)
+{
+	volatile uint8_t *addr, *start_addr, *end_addr;
+
+	DWC_PRINTF("SPRAM Data:\n");
+	start_addr = (void *)core_if->core_global_regs;
+	DWC_PRINTF("Base Address: 0x%8lX\n", (unsigned long)start_addr);
+	start_addr += 0x00028000;
+	end_addr = (void *)core_if->core_global_regs;
+	end_addr += 0x000280e0;
+
+	for (addr = start_addr; addr < end_addr; addr += 16) {
+		DWC_PRINTF
+		    ("0x%8lX:\t%2X %2X %2X %2X %2X %2X %2X %2X %2X %2X %2X %2X %2X %2X %2X %2X\n",
+		     (unsigned long)addr, addr[0], addr[1], addr[2], addr[3],
+		     addr[4], addr[5], addr[6], addr[7], addr[8], addr[9],
+		     addr[10], addr[11], addr[12], addr[13], addr[14], addr[15]
+		    );
+	}
+
+	return;
+}
+
+/**
+ * This function reads the host registers and prints them
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ */
+void dwc_otg_dump_host_registers(dwc_otg_core_if_t * core_if)
+{
+	int i;
+	volatile uint32_t *addr;
+
+	DWC_PRINTF("Host Global Registers\n");
+	addr = &core_if->host_if->host_global_regs->hcfg;
+	DWC_PRINTF("HCFG		 @0x%08lX : 0x%08X\n",
+		   (unsigned long)addr, DWC_READ_REG32(addr));
+	addr = &core_if->host_if->host_global_regs->hfir;
+	DWC_PRINTF("HFIR		 @0x%08lX : 0x%08X\n",
+		   (unsigned long)addr, DWC_READ_REG32(addr));
+	addr = &core_if->host_if->host_global_regs->hfnum;
+	DWC_PRINTF("HFNUM	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->host_if->host_global_regs->hptxsts;
+	DWC_PRINTF("HPTXSTS	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->host_if->host_global_regs->haint;
+	DWC_PRINTF("HAINT	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->host_if->host_global_regs->haintmsk;
+	DWC_PRINTF("HAINTMSK	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	if (core_if->dma_desc_enable) {
+		addr = &core_if->host_if->host_global_regs->hflbaddr;
+		DWC_PRINTF("HFLBADDR	 @0x%08lX : 0x%08X\n",
+			   (unsigned long)addr, DWC_READ_REG32(addr));
+	}
+
+	addr = core_if->host_if->hprt0;
+	DWC_PRINTF("HPRT0	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+
+	for (i = 0; i < core_if->core_params->host_channels; i++) {
+		DWC_PRINTF("Host Channel %d Specific Registers\n", i);
+		addr = &core_if->host_if->hc_regs[i]->hcchar;
+		DWC_PRINTF("HCCHAR	 @0x%08lX : 0x%08X\n",
+			   (unsigned long)addr, DWC_READ_REG32(addr));
+		addr = &core_if->host_if->hc_regs[i]->hcsplt;
+		DWC_PRINTF("HCSPLT	 @0x%08lX : 0x%08X\n",
+			   (unsigned long)addr, DWC_READ_REG32(addr));
+		addr = &core_if->host_if->hc_regs[i]->hcint;
+		DWC_PRINTF("HCINT	 @0x%08lX : 0x%08X\n",
+			   (unsigned long)addr, DWC_READ_REG32(addr));
+		addr = &core_if->host_if->hc_regs[i]->hcintmsk;
+		DWC_PRINTF("HCINTMSK	 @0x%08lX : 0x%08X\n",
+			   (unsigned long)addr, DWC_READ_REG32(addr));
+		addr = &core_if->host_if->hc_regs[i]->hctsiz;
+		DWC_PRINTF("HCTSIZ	 @0x%08lX : 0x%08X\n",
+			   (unsigned long)addr, DWC_READ_REG32(addr));
+		addr = &core_if->host_if->hc_regs[i]->hcdma;
+		DWC_PRINTF("HCDMA	 @0x%08lX : 0x%08X\n",
+			   (unsigned long)addr, DWC_READ_REG32(addr));
+		if (core_if->dma_desc_enable) {
+			addr = &core_if->host_if->hc_regs[i]->hcdmab;
+			DWC_PRINTF("HCDMAB	 @0x%08lX : 0x%08X\n",
+				   (unsigned long)addr, DWC_READ_REG32(addr));
+		}
+
+	}
+	return;
+}
+
+/**
+ * This function reads the core global registers and prints them
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ */
+void dwc_otg_dump_global_registers(dwc_otg_core_if_t * core_if)
+{
+	int i, ep_num;
+	volatile uint32_t *addr;
+	char *txfsiz;
+
+	DWC_PRINTF("Core Global Registers\n");
+	addr = &core_if->core_global_regs->gotgctl;
+	DWC_PRINTF("GOTGCTL	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->core_global_regs->gotgint;
+	DWC_PRINTF("GOTGINT	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->core_global_regs->gahbcfg;
+	DWC_PRINTF("GAHBCFG	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->core_global_regs->gusbcfg;
+	DWC_PRINTF("GUSBCFG	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->core_global_regs->grstctl;
+	DWC_PRINTF("GRSTCTL	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->core_global_regs->gintsts;
+	DWC_PRINTF("GINTSTS	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->core_global_regs->gintmsk;
+	DWC_PRINTF("GINTMSK	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->core_global_regs->grxstsr;
+	DWC_PRINTF("GRXSTSR	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->core_global_regs->grxfsiz;
+	DWC_PRINTF("GRXFSIZ	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->core_global_regs->gnptxfsiz;
+	DWC_PRINTF("GNPTXFSIZ @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->core_global_regs->gnptxsts;
+	DWC_PRINTF("GNPTXSTS	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->core_global_regs->gi2cctl;
+	DWC_PRINTF("GI2CCTL	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->core_global_regs->gpvndctl;
+	DWC_PRINTF("GPVNDCTL	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->core_global_regs->ggpio;
+	DWC_PRINTF("GGPIO	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->core_global_regs->guid;
+	DWC_PRINTF("GUID		 @0x%08lX : 0x%08X\n",
+		   (unsigned long)addr, DWC_READ_REG32(addr));
+	addr = &core_if->core_global_regs->gsnpsid;
+	DWC_PRINTF("GSNPSID	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->core_global_regs->ghwcfg1;
+	DWC_PRINTF("GHWCFG1	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->core_global_regs->ghwcfg2;
+	DWC_PRINTF("GHWCFG2	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->core_global_regs->ghwcfg3;
+	DWC_PRINTF("GHWCFG3	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->core_global_regs->ghwcfg4;
+	DWC_PRINTF("GHWCFG4	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->core_global_regs->glpmcfg;
+	DWC_PRINTF("GLPMCFG	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->core_global_regs->gpwrdn;
+	DWC_PRINTF("GPWRDN	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->core_global_regs->gdfifocfg;
+	DWC_PRINTF("GDFIFOCFG	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->core_global_regs->adpctl;
+	DWC_PRINTF("ADPCTL	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+	addr = &core_if->core_global_regs->hptxfsiz;
+	DWC_PRINTF("HPTXFSIZ	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+
+	if (core_if->en_multiple_tx_fifo == 0) {
+		ep_num = core_if->hwcfg4.b.num_dev_perio_in_ep;
+		txfsiz = "DPTXFSIZ";
+	} else {
+		ep_num = core_if->hwcfg4.b.num_in_eps;
+		txfsiz = "DIENPTXF";
+	}
+	for (i = 0; i < ep_num; i++) {
+		addr = &core_if->core_global_regs->dtxfsiz[i];
+		DWC_PRINTF("%s[%d] @0x%08lX : 0x%08X\n", txfsiz, i + 1,
+			   (unsigned long)addr, DWC_READ_REG32(addr));
+	}
+	addr = core_if->pcgcctl;
+	DWC_PRINTF("PCGCCTL	 @0x%08lX : 0x%08X\n", (unsigned long)addr,
+		   DWC_READ_REG32(addr));
+}
+
+/**
+ * Flush a Tx FIFO.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param num Tx FIFO to flush.
+ */
+void dwc_otg_flush_tx_fifo(dwc_otg_core_if_t * core_if, const int num)
+{
+	dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs;
+	volatile grstctl_t greset = {.d32 = 0 };
+	int count = 0;
+
+	DWC_DEBUGPL((DBG_CIL | DBG_PCDV), "Flush Tx FIFO %d\n", num);
+
+	greset.b.txfflsh = 1;
+	greset.b.txfnum = num;
+	DWC_WRITE_REG32(&global_regs->grstctl, greset.d32);
+
+	do {
+		greset.d32 = DWC_READ_REG32(&global_regs->grstctl);
+		if (++count > 10000) {
+			DWC_WARN("%s() HANG! GRSTCTL=%0x GNPTXSTS=0x%08x\n",
+				 __func__, greset.d32,
+				 DWC_READ_REG32(&global_regs->gnptxsts));
+			break;
+		}
+		dwc_udelay(1);
+	} while (greset.b.txfflsh == 1);
+
+	/* Wait for 3 PHY Clocks */
+	dwc_udelay(1);
+}
+
+/**
+ * Flush Rx FIFO.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ */
+void dwc_otg_flush_rx_fifo(dwc_otg_core_if_t * core_if)
+{
+	dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs;
+	volatile grstctl_t greset = {.d32 = 0 };
+	int count = 0;
+
+	DWC_DEBUGPL((DBG_CIL | DBG_PCDV), "%s\n", __func__);
+	/*
+	 *
+	 */
+	greset.b.rxfflsh = 1;
+	DWC_WRITE_REG32(&global_regs->grstctl, greset.d32);
+
+	do {
+		greset.d32 = DWC_READ_REG32(&global_regs->grstctl);
+		if (++count > 10000) {
+			DWC_WARN("%s() HANG! GRSTCTL=%0x\n", __func__,
+				 greset.d32);
+			break;
+		}
+		dwc_udelay(1);
+	} while (greset.b.rxfflsh == 1);
+
+	/* Wait for 3 PHY Clocks */
+	dwc_udelay(1);
+}
+
+/**
+ * Do core a soft reset of the core.  Be careful with this because it
+ * resets all the internal state machines of the core.
+ */
+void dwc_otg_core_reset(dwc_otg_core_if_t * core_if)
+{
+#if 0
+	dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs;
+	volatile grstctl_t greset = {.d32 = 0 };
+	int count = 0;
+
+	DWC_DEBUGPL(DBG_CILV, "%s\n", __func__);
+	/* Wait for AHB master IDLE state. */
+	do {
+		dwc_udelay(10);
+		greset.d32 = DWC_READ_REG32(&global_regs->grstctl);
+		if (++count > 100000) {
+			DWC_WARN("%s() HANG! AHB Idle GRSTCTL=%0x\n", __func__,
+				 greset.d32);
+			return;
+		}
+	}
+	while (greset.b.ahbidle == 0);
+
+	/* Core Soft Reset */
+	count = 0;
+	greset.b.csftrst = 1;
+	DWC_WRITE_REG32(&global_regs->grstctl, greset.d32);
+	do {
+		greset.d32 = DWC_READ_REG32(&global_regs->grstctl);
+		if (++count > 10000) {
+			DWC_WARN("%s() HANG! Soft Reset GRSTCTL=%0x\n",
+				 __func__, greset.d32);
+			break;
+		}
+		dwc_udelay(1);
+	}
+	while (greset.b.csftrst == 1);
+
+	/* Wait for 3 PHY Clocks */
+	dwc_mdelay(100);
+#endif
+}
+
+uint8_t dwc_otg_is_device_mode(dwc_otg_core_if_t * _core_if)
+{
+	return (dwc_otg_mode(_core_if) != DWC_HOST_MODE);
+}
+
+uint8_t dwc_otg_is_host_mode(dwc_otg_core_if_t * _core_if)
+{
+	return (dwc_otg_mode(_core_if) == DWC_HOST_MODE);
+}
+
+/**
+ * Register HCD callbacks. The callbacks are used to start and stop
+ * the HCD for interrupt processing.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param cb the HCD callback structure.
+ * @param p pointer to be passed to callback function (usb_hcd*).
+ */
+void dwc_otg_cil_register_hcd_callbacks(dwc_otg_core_if_t * core_if,
+					dwc_otg_cil_callbacks_t * cb, void *p)
+{
+	core_if->hcd_cb = cb;
+	cb->p = p;
+}
+
+/**
+ * Register PCD callbacks. The callbacks are used to start and stop
+ * the PCD for interrupt processing.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param cb the PCD callback structure.
+ * @param p pointer to be passed to callback function (pcd*).
+ */
+void dwc_otg_cil_register_pcd_callbacks(dwc_otg_core_if_t * core_if,
+					dwc_otg_cil_callbacks_t * cb, void *p)
+{
+	core_if->pcd_cb = cb;
+	cb->p = p;
+}
+
+#ifdef DWC_EN_ISOC
+
+/**
+ * This function writes isoc data per 1 (micro)frame into tx fifo
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param ep The EP to start the transfer on.
+ *
+ */
+void write_isoc_frame_data(dwc_otg_core_if_t * core_if, dwc_ep_t * ep)
+{
+	dwc_otg_dev_in_ep_regs_t *ep_regs;
+	dtxfsts_data_t txstatus = {.d32 = 0 };
+	uint32_t len = 0;
+	uint32_t dwords;
+
+	ep->xfer_len = ep->data_per_frame;
+	ep->xfer_count = 0;
+
+	ep_regs = core_if->dev_if->in_ep_regs[ep->num];
+
+	len = ep->xfer_len - ep->xfer_count;
+
+	if (len > ep->maxpacket) {
+		len = ep->maxpacket;
+	}
+
+	dwords = (len + 3) / 4;
+
+	/* While there is space in the queue and space in the FIFO and
+	 * More data to tranfer, Write packets to the Tx FIFO */
+	txstatus.d32 =
+	    DWC_READ_REG32(&core_if->dev_if->in_ep_regs[ep->num]->dtxfsts);
+	DWC_DEBUGPL(DBG_PCDV, "b4 dtxfsts[%d]=0x%08x\n", ep->num, txstatus.d32);
+
+	while (txstatus.b.txfspcavail > dwords &&
+	       ep->xfer_count < ep->xfer_len && ep->xfer_len != 0) {
+		/* Write the FIFO */
+		dwc_otg_ep_write_packet(core_if, ep, 0);
+
+		len = ep->xfer_len - ep->xfer_count;
+		if (len > ep->maxpacket) {
+			len = ep->maxpacket;
+		}
+
+		dwords = (len + 3) / 4;
+		txstatus.d32 =
+		    DWC_READ_REG32(&core_if->dev_if->
+				   in_ep_regs[ep->num]->dtxfsts);
+		DWC_DEBUGPL(DBG_PCDV, "dtxfsts[%d]=0x%08x\n", ep->num,
+			    txstatus.d32);
+	}
+}
+
+/**
+ * This function initializes a descriptor chain for Isochronous transfer
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param ep The EP to start the transfer on.
+ *
+ */
+void dwc_otg_iso_ep_start_frm_transfer(dwc_otg_core_if_t * core_if,
+				       dwc_ep_t * ep)
+{
+	deptsiz_data_t deptsiz = {.d32 = 0 };
+	depctl_data_t depctl = {.d32 = 0 };
+	dsts_data_t dsts = {.d32 = 0 };
+	volatile uint32_t *addr;
+
+	if (ep->is_in) {
+		addr = &core_if->dev_if->in_ep_regs[ep->num]->diepctl;
+	} else {
+		addr = &core_if->dev_if->out_ep_regs[ep->num]->doepctl;
+	}
+
+	ep->xfer_len = ep->data_per_frame;
+	ep->xfer_count = 0;
+	ep->xfer_buff = ep->cur_pkt_addr;
+	ep->dma_addr = ep->cur_pkt_dma_addr;
+
+	if (ep->is_in) {
+		/* Program the transfer size and packet count
+		 *      as follows: xfersize = N * maxpacket +
+		 *      short_packet pktcnt = N + (short_packet
+		 *      exist ? 1 : 0) 
+		 */
+		deptsiz.b.xfersize = ep->xfer_len;
+		deptsiz.b.pktcnt =
+		    (ep->xfer_len - 1 + ep->maxpacket) / ep->maxpacket;
+		deptsiz.b.mc = deptsiz.b.pktcnt;
+		DWC_WRITE_REG32(&core_if->dev_if->in_ep_regs[ep->num]->dieptsiz,
+				deptsiz.d32);
+
+		/* Write the DMA register */
+		if (core_if->dma_enable) {
+			DWC_WRITE_REG32(&
+					(core_if->dev_if->in_ep_regs[ep->num]->
+					 diepdma), (uint32_t) ep->dma_addr);
+		}
+	} else {
+		deptsiz.b.pktcnt =
+		    (ep->xfer_len + (ep->maxpacket - 1)) / ep->maxpacket;
+		deptsiz.b.xfersize = deptsiz.b.pktcnt * ep->maxpacket;
+
+		DWC_WRITE_REG32(&core_if->dev_if->out_ep_regs[ep->num]->
+				doeptsiz, deptsiz.d32);
+
+		if (core_if->dma_enable) {
+			DWC_WRITE_REG32(&
+					(core_if->dev_if->out_ep_regs[ep->num]->
+					 doepdma), (uint32_t) ep->dma_addr);
+		}
+	}
+
+	/** Enable endpoint, clear nak  */
+
+	depctl.d32 = 0;
+	if (ep->bInterval == 1) {
+		dsts.d32 =
+		    DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dsts);
+		ep->next_frame = dsts.b.soffn + ep->bInterval;
+
+		if (ep->next_frame & 0x1) {
+			depctl.b.setd1pid = 1;
+		} else {
+			depctl.b.setd0pid = 1;
+		}
+	} else {
+		ep->next_frame += ep->bInterval;
+
+		if (ep->next_frame & 0x1) {
+			depctl.b.setd1pid = 1;
+		} else {
+			depctl.b.setd0pid = 1;
+		}
+	}
+	depctl.b.epena = 1;
+	depctl.b.cnak = 1;
+
+	DWC_MODIFY_REG32(addr, 0, depctl.d32);
+	depctl.d32 = DWC_READ_REG32(addr);
+
+	if (ep->is_in && core_if->dma_enable == 0) {
+		write_isoc_frame_data(core_if, ep);
+	}
+
+}
+#endif /* DWC_EN_ISOC */
+
+static void dwc_otg_set_uninitialized(int32_t * p, int size)
+{
+	int i;
+	for (i = 0; i < size; i++) {
+		p[i] = -1;
+	}
+}
+
+static int dwc_otg_param_initialized(int32_t val)
+{
+	return val != -1;
+}
+
+static int dwc_otg_setup_params(dwc_otg_core_if_t * core_if)
+{
+	int i;
+	core_if->core_params = DWC_ALLOC(sizeof(*core_if->core_params));
+	if (!core_if->core_params) {
+		return -DWC_E_NO_MEMORY;
+	}
+	dwc_otg_set_uninitialized((int32_t *) core_if->core_params,
+				  sizeof(*core_if->core_params) /
+				  sizeof(int32_t));
+	DWC_PRINTF("Setting default values for core params\n");
+	dwc_otg_set_param_otg_cap(core_if, dwc_param_otg_cap_default);
+	dwc_otg_set_param_dma_enable(core_if, dwc_param_dma_enable_default);
+	dwc_otg_set_param_dma_desc_enable(core_if,
+					  dwc_param_dma_desc_enable_default);
+	dwc_otg_set_param_opt(core_if, dwc_param_opt_default);
+	dwc_otg_set_param_dma_burst_size(core_if,
+					 dwc_param_dma_burst_size_default);
+	dwc_otg_set_param_host_support_fs_ls_low_power(core_if,
+						       dwc_param_host_support_fs_ls_low_power_default);
+	dwc_otg_set_param_enable_dynamic_fifo(core_if,
+					      dwc_param_enable_dynamic_fifo_default);
+	dwc_otg_set_param_data_fifo_size(core_if,
+					 dwc_param_data_fifo_size_default);
+	dwc_otg_set_param_dev_rx_fifo_size(core_if,
+					   dwc_param_dev_rx_fifo_size_default);
+	dwc_otg_set_param_dev_nperio_tx_fifo_size(core_if,
+						  dwc_param_dev_nperio_tx_fifo_size_default);
+	dwc_otg_set_param_host_rx_fifo_size(core_if,
+					    dwc_param_host_rx_fifo_size_default);
+	dwc_otg_set_param_host_nperio_tx_fifo_size(core_if,
+						   dwc_param_host_nperio_tx_fifo_size_default);
+	dwc_otg_set_param_host_perio_tx_fifo_size(core_if,
+						  dwc_param_host_perio_tx_fifo_size_default);
+	dwc_otg_set_param_max_transfer_size(core_if,
+					    dwc_param_max_transfer_size_default);
+	dwc_otg_set_param_max_packet_count(core_if,
+					   dwc_param_max_packet_count_default);
+	dwc_otg_set_param_host_channels(core_if,
+					dwc_param_host_channels_default);
+	dwc_otg_set_param_dev_endpoints(core_if,
+					dwc_param_dev_endpoints_default);
+	dwc_otg_set_param_phy_type(core_if, dwc_param_phy_type_default);
+	dwc_otg_set_param_speed(core_if, dwc_param_speed_default);
+	dwc_otg_set_param_host_ls_low_power_phy_clk(core_if,
+						    dwc_param_host_ls_low_power_phy_clk_default);
+	dwc_otg_set_param_phy_ulpi_ddr(core_if, dwc_param_phy_ulpi_ddr_default);
+	dwc_otg_set_param_phy_ulpi_ext_vbus(core_if,
+					    dwc_param_phy_ulpi_ext_vbus_default);
+	dwc_otg_set_param_phy_utmi_width(core_if,
+					 dwc_param_phy_utmi_width_default);
+	dwc_otg_set_param_ts_dline(core_if, dwc_param_ts_dline_default);
+	dwc_otg_set_param_i2c_enable(core_if, dwc_param_i2c_enable_default);
+	dwc_otg_set_param_ulpi_fs_ls(core_if, dwc_param_ulpi_fs_ls_default);
+	dwc_otg_set_param_en_multiple_tx_fifo(core_if,
+					      dwc_param_en_multiple_tx_fifo_default);
+	for (i = 0; i < 15; i++) {
+		dwc_otg_set_param_dev_perio_tx_fifo_size(core_if,
+							 dwc_param_dev_perio_tx_fifo_size_default,
+							 i);
+	}
+
+	for (i = 0; i < 15; i++) {
+		dwc_otg_set_param_dev_tx_fifo_size(core_if,
+						   dwc_param_dev_tx_fifo_size_default,
+						   i);
+	}
+	dwc_otg_set_param_thr_ctl(core_if, dwc_param_thr_ctl_default);
+	dwc_otg_set_param_mpi_enable(core_if, dwc_param_mpi_enable_default);
+	dwc_otg_set_param_pti_enable(core_if, dwc_param_pti_enable_default);
+	dwc_otg_set_param_lpm_enable(core_if, dwc_param_lpm_enable_default);
+	dwc_otg_set_param_ic_usb_cap(core_if, dwc_param_ic_usb_cap_default);
+	dwc_otg_set_param_tx_thr_length(core_if,
+					dwc_param_tx_thr_length_default);
+	dwc_otg_set_param_rx_thr_length(core_if,
+					dwc_param_rx_thr_length_default);
+	dwc_otg_set_param_ahb_thr_ratio(core_if,
+					dwc_param_ahb_thr_ratio_default);
+	dwc_otg_set_param_power_down(core_if, dwc_param_power_down_default);
+	dwc_otg_set_param_reload_ctl(core_if, dwc_param_reload_ctl_default);
+	dwc_otg_set_param_dev_out_nak(core_if, dwc_param_dev_out_nak_default);
+	dwc_otg_set_param_otg_ver(core_if, dwc_param_otg_ver_default);
+	dwc_otg_set_param_adp_enable(core_if, dwc_param_adp_enable_default);
+	return 0;
+}
+
+uint8_t dwc_otg_is_dma_enable(dwc_otg_core_if_t * core_if)
+{
+	return core_if->dma_enable;
+}
+
+/* Checks if the parameter is outside of its valid range of values */
+#define DWC_OTG_PARAM_TEST(_param_, _low_, _high_) \
+		(((_param_) < (_low_)) || \
+		((_param_) > (_high_)))
+
+/* Parameter access functions */
+int dwc_otg_set_param_otg_cap(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	int valid;
+	int retval = 0;
+	if (DWC_OTG_PARAM_TEST(val, 0, 2)) {
+		DWC_WARN("Wrong value for otg_cap parameter\n");
+		DWC_WARN("otg_cap parameter must be 0,1 or 2\n");
+		retval = -DWC_E_INVALID;
+		goto out;
+	}
+
+	valid = 1;
+	switch (val) {
+	case DWC_OTG_CAP_PARAM_HNP_SRP_CAPABLE:
+		if (core_if->hwcfg2.b.op_mode !=
+		    DWC_HWCFG2_OP_MODE_HNP_SRP_CAPABLE_OTG)
+			valid = 0;
+		break;
+	case DWC_OTG_CAP_PARAM_SRP_ONLY_CAPABLE:
+		if ((core_if->hwcfg2.b.op_mode !=
+		     DWC_HWCFG2_OP_MODE_HNP_SRP_CAPABLE_OTG)
+		    && (core_if->hwcfg2.b.op_mode !=
+			DWC_HWCFG2_OP_MODE_SRP_ONLY_CAPABLE_OTG)
+		    && (core_if->hwcfg2.b.op_mode !=
+			DWC_HWCFG2_OP_MODE_SRP_CAPABLE_DEVICE)
+		    && (core_if->hwcfg2.b.op_mode !=
+			DWC_HWCFG2_OP_MODE_SRP_CAPABLE_HOST)) {
+			valid = 0;
+		}
+		break;
+	case DWC_OTG_CAP_PARAM_NO_HNP_SRP_CAPABLE:
+		/* always valid */
+		break;
+	}
+	if (!valid) {
+		if (dwc_otg_param_initialized(core_if->core_params->otg_cap)) {
+			DWC_ERROR
+			    ("%d invalid for otg_cap paremter. Check HW configuration.\n",
+			     val);
+		}
+		val =
+		    (((core_if->hwcfg2.b.op_mode ==
+		       DWC_HWCFG2_OP_MODE_HNP_SRP_CAPABLE_OTG)
+		      || (core_if->hwcfg2.b.op_mode ==
+			  DWC_HWCFG2_OP_MODE_SRP_ONLY_CAPABLE_OTG)
+		      || (core_if->hwcfg2.b.op_mode ==
+			  DWC_HWCFG2_OP_MODE_SRP_CAPABLE_DEVICE)
+		      || (core_if->hwcfg2.b.op_mode ==
+			  DWC_HWCFG2_OP_MODE_SRP_CAPABLE_HOST)) ?
+		     DWC_OTG_CAP_PARAM_SRP_ONLY_CAPABLE :
+		     DWC_OTG_CAP_PARAM_NO_HNP_SRP_CAPABLE);
+		retval = -DWC_E_INVALID;
+	}
+
+	core_if->core_params->otg_cap = val;
+out:
+	return retval;
+}
+
+int32_t dwc_otg_get_param_otg_cap(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->otg_cap;
+}
+
+int dwc_otg_set_param_opt(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	if (DWC_OTG_PARAM_TEST(val, 0, 1)) {
+		DWC_WARN("Wrong value for opt parameter\n");
+		return -DWC_E_INVALID;
+	}
+	core_if->core_params->opt = val;
+	return 0;
+}
+
+int32_t dwc_otg_get_param_opt(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->opt;
+}
+
+int dwc_otg_set_param_dma_enable(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	int retval = 0;
+	if (DWC_OTG_PARAM_TEST(val, 0, 1)) {
+		DWC_WARN("Wrong value for dma enable\n");
+		return -DWC_E_INVALID;
+	}
+
+	if ((val == 1) && (core_if->hwcfg2.b.architecture == 0)) {
+		if (dwc_otg_param_initialized(core_if->core_params->dma_enable)) {
+			DWC_ERROR
+			    ("%d invalid for dma_enable paremter. Check HW configuration.\n",
+			     val);
+		}
+		val = 0;
+		retval = -DWC_E_INVALID;
+	}
+
+	core_if->core_params->dma_enable = val;
+	if (val == 0) {
+		dwc_otg_set_param_dma_desc_enable(core_if, 0);
+	}
+	return retval;
+}
+
+int32_t dwc_otg_get_param_dma_enable(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->dma_enable;
+}
+
+int dwc_otg_set_param_dma_desc_enable(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	int retval = 0;
+	if (DWC_OTG_PARAM_TEST(val, 0, 1)) {
+		DWC_WARN("Wrong value for dma_enable\n");
+		DWC_WARN("dma_desc_enable must be 0 or 1\n");
+		return -DWC_E_INVALID;
+	}
+
+	if ((val == 1)
+	    && ((dwc_otg_get_param_dma_enable(core_if) == 0)
+		|| (core_if->hwcfg4.b.desc_dma == 0))) {
+		if (dwc_otg_param_initialized
+		    (core_if->core_params->dma_desc_enable)) {
+			DWC_ERROR
+			    ("%d invalid for dma_desc_enable paremter. Check HW configuration.\n",
+			     val);
+		}
+		val = 0;
+		retval = -DWC_E_INVALID;
+	}
+	core_if->core_params->dma_desc_enable = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_dma_desc_enable(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->dma_desc_enable;
+}
+
+int dwc_otg_set_param_host_support_fs_ls_low_power(dwc_otg_core_if_t * core_if,
+						   int32_t val)
+{
+	if (DWC_OTG_PARAM_TEST(val, 0, 1)) {
+		DWC_WARN("Wrong value for host_support_fs_low_power\n");
+		DWC_WARN("host_support_fs_low_power must be 0 or 1\n");
+		return -DWC_E_INVALID;
+	}
+	core_if->core_params->host_support_fs_ls_low_power = val;
+	return 0;
+}
+
+int32_t dwc_otg_get_param_host_support_fs_ls_low_power(dwc_otg_core_if_t *
+						       core_if)
+{
+	return core_if->core_params->host_support_fs_ls_low_power;
+}
+
+int dwc_otg_set_param_enable_dynamic_fifo(dwc_otg_core_if_t * core_if,
+					  int32_t val)
+{
+	int retval = 0;
+	if (DWC_OTG_PARAM_TEST(val, 0, 1)) {
+		DWC_WARN("Wrong value for enable_dynamic_fifo\n");
+		DWC_WARN("enable_dynamic_fifo must be 0 or 1\n");
+		return -DWC_E_INVALID;
+	}
+
+	if ((val == 1) && (core_if->hwcfg2.b.dynamic_fifo == 0)) {
+		if (dwc_otg_param_initialized
+		    (core_if->core_params->enable_dynamic_fifo)) {
+			DWC_ERROR
+			    ("%d invalid for enable_dynamic_fifo paremter. Check HW configuration.\n",
+			     val);
+		}
+		val = 0;
+		retval = -DWC_E_INVALID;
+	}
+	core_if->core_params->enable_dynamic_fifo = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_enable_dynamic_fifo(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->enable_dynamic_fifo;
+}
+
+int dwc_otg_set_param_data_fifo_size(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	int retval = 0;
+	if (DWC_OTG_PARAM_TEST(val, 32, 32768)) {
+		DWC_WARN("Wrong value for data_fifo_size\n");
+		DWC_WARN("data_fifo_size must be 32-32768\n");
+		return -DWC_E_INVALID;
+	}
+
+	if (val > core_if->hwcfg3.b.dfifo_depth) {
+		if (dwc_otg_param_initialized
+		    (core_if->core_params->data_fifo_size)) {
+			DWC_ERROR
+			    ("%d invalid for data_fifo_size parameter. Check HW configuration.\n",
+			     val);
+		}
+		val = core_if->hwcfg3.b.dfifo_depth;
+		retval = -DWC_E_INVALID;
+	}
+
+	core_if->core_params->data_fifo_size = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_data_fifo_size(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->data_fifo_size;
+}
+
+int dwc_otg_set_param_dev_rx_fifo_size(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	int retval = 0;
+	if (DWC_OTG_PARAM_TEST(val, 16, 32768)) {
+		DWC_WARN("Wrong value for dev_rx_fifo_size\n");
+		DWC_WARN("dev_rx_fifo_size must be 16-32768\n");
+		return -DWC_E_INVALID;
+	}
+
+	if (val > DWC_READ_REG32(&core_if->core_global_regs->grxfsiz)) {
+		if (dwc_otg_param_initialized(core_if->core_params->dev_rx_fifo_size)) {
+		DWC_WARN("%d invalid for dev_rx_fifo_size parameter\n", val);
+		}
+		val = DWC_READ_REG32(&core_if->core_global_regs->grxfsiz);
+		retval = -DWC_E_INVALID;
+	}
+
+	core_if->core_params->dev_rx_fifo_size = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_dev_rx_fifo_size(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->dev_rx_fifo_size;
+}
+
+int dwc_otg_set_param_dev_nperio_tx_fifo_size(dwc_otg_core_if_t * core_if,
+					      int32_t val)
+{
+	int retval = 0;
+
+	if (DWC_OTG_PARAM_TEST(val, 16, 32768)) {
+		DWC_WARN("Wrong value for dev_nperio_tx_fifo\n");
+		DWC_WARN("dev_nperio_tx_fifo must be 16-32768\n");
+		return -DWC_E_INVALID;
+	}
+
+	if (val > (DWC_READ_REG32(&core_if->core_global_regs->gnptxfsiz) >> 16)) {
+		if (dwc_otg_param_initialized
+		    (core_if->core_params->dev_nperio_tx_fifo_size)) {
+			DWC_ERROR
+			    ("%d invalid for dev_nperio_tx_fifo_size. Check HW configuration.\n",
+			     val);
+		}
+		val =
+		    (DWC_READ_REG32(&core_if->core_global_regs->gnptxfsiz) >>
+		     16);
+		retval = -DWC_E_INVALID;
+	}
+
+	core_if->core_params->dev_nperio_tx_fifo_size = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_dev_nperio_tx_fifo_size(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->dev_nperio_tx_fifo_size;
+}
+
+int dwc_otg_set_param_host_rx_fifo_size(dwc_otg_core_if_t * core_if,
+					int32_t val)
+{
+	int retval = 0;
+
+	if (DWC_OTG_PARAM_TEST(val, 16, 32768)) {
+		DWC_WARN("Wrong value for host_rx_fifo_size\n");
+		DWC_WARN("host_rx_fifo_size must be 16-32768\n");
+		return -DWC_E_INVALID;
+	}
+
+	if (val > DWC_READ_REG32(&core_if->core_global_regs->grxfsiz)) {
+		if (dwc_otg_param_initialized
+		    (core_if->core_params->host_rx_fifo_size)) {
+			DWC_ERROR
+			    ("%d invalid for host_rx_fifo_size. Check HW configuration.\n",
+			     val);
+		}
+		val = DWC_READ_REG32(&core_if->core_global_regs->grxfsiz);
+		retval = -DWC_E_INVALID;
+	}
+
+	core_if->core_params->host_rx_fifo_size = val;
+	return retval;
+
+}
+
+int32_t dwc_otg_get_param_host_rx_fifo_size(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->host_rx_fifo_size;
+}
+
+int dwc_otg_set_param_host_nperio_tx_fifo_size(dwc_otg_core_if_t * core_if,
+					       int32_t val)
+{
+	int retval = 0;
+
+	if (DWC_OTG_PARAM_TEST(val, 16, 32768)) {
+		DWC_WARN("Wrong value for host_nperio_tx_fifo_size\n");
+		DWC_WARN("host_nperio_tx_fifo_size must be 16-32768\n");
+		return -DWC_E_INVALID;
+	}
+
+	if (val > (DWC_READ_REG32(&core_if->core_global_regs->gnptxfsiz) >> 16)) {
+		if (dwc_otg_param_initialized
+		    (core_if->core_params->host_nperio_tx_fifo_size)) {
+			DWC_ERROR
+			    ("%d invalid for host_nperio_tx_fifo_size. Check HW configuration.\n",
+			     val);
+		}
+		val =
+		    (DWC_READ_REG32(&core_if->core_global_regs->gnptxfsiz) >>
+		     16);
+		retval = -DWC_E_INVALID;
+	}
+
+	core_if->core_params->host_nperio_tx_fifo_size = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_host_nperio_tx_fifo_size(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->host_nperio_tx_fifo_size;
+}
+
+int dwc_otg_set_param_host_perio_tx_fifo_size(dwc_otg_core_if_t * core_if,
+					      int32_t val)
+{
+	int retval = 0;
+	if (DWC_OTG_PARAM_TEST(val, 16, 32768)) {
+		DWC_WARN("Wrong value for host_perio_tx_fifo_size\n");
+		DWC_WARN("host_perio_tx_fifo_size must be 16-32768\n");
+		return -DWC_E_INVALID;
+	}
+
+	if (val >
+		((core_if->hptxfsiz.d32)>> 16)) {
+		if (dwc_otg_param_initialized
+		    (core_if->core_params->host_perio_tx_fifo_size)) {
+			DWC_ERROR
+			    ("%d invalid for host_perio_tx_fifo_size. Check HW configuration.\n",
+			     val);
+		}
+		val = (core_if->hptxfsiz.d32) >> 16;
+		retval = -DWC_E_INVALID;
+	}
+
+	core_if->core_params->host_perio_tx_fifo_size = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_host_perio_tx_fifo_size(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->host_perio_tx_fifo_size;
+}
+
+int dwc_otg_set_param_max_transfer_size(dwc_otg_core_if_t * core_if,
+					int32_t val)
+{
+	int retval = 0;
+
+	if (DWC_OTG_PARAM_TEST(val, 2047, 524288)) {
+		DWC_WARN("Wrong value for max_transfer_size\n");
+		DWC_WARN("max_transfer_size must be 2047-524288\n");
+		return -DWC_E_INVALID;
+	}
+
+	if (val >= (1 << (core_if->hwcfg3.b.xfer_size_cntr_width + 11))) {
+		if (dwc_otg_param_initialized
+		    (core_if->core_params->max_transfer_size)) {
+			DWC_ERROR
+			    ("%d invalid for max_transfer_size. Check HW configuration.\n",
+			     val);
+		}
+		val =
+		    ((1 << (core_if->hwcfg3.b.packet_size_cntr_width + 11)) -
+		     1);
+		retval = -DWC_E_INVALID;
+	}
+
+	core_if->core_params->max_transfer_size = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_max_transfer_size(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->max_transfer_size;
+}
+
+int dwc_otg_set_param_max_packet_count(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	int retval = 0;
+
+	if (DWC_OTG_PARAM_TEST(val, 15, 511)) {
+		DWC_WARN("Wrong value for max_packet_count\n");
+		DWC_WARN("max_packet_count must be 15-511\n");
+		return -DWC_E_INVALID;
+	}
+
+	if (val > (1 << (core_if->hwcfg3.b.packet_size_cntr_width + 4))) {
+		if (dwc_otg_param_initialized
+		    (core_if->core_params->max_packet_count)) {
+			DWC_ERROR
+			    ("%d invalid for max_packet_count. Check HW configuration.\n",
+			     val);
+		}
+		val =
+		    ((1 << (core_if->hwcfg3.b.packet_size_cntr_width + 4)) - 1);
+		retval = -DWC_E_INVALID;
+	}
+
+	core_if->core_params->max_packet_count = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_max_packet_count(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->max_packet_count;
+}
+
+int dwc_otg_set_param_host_channels(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	int retval = 0;
+
+	if (DWC_OTG_PARAM_TEST(val, 1, 16)) {
+		DWC_WARN("Wrong value for host_channels\n");
+		DWC_WARN("host_channels must be 1-16\n");
+		return -DWC_E_INVALID;
+	}
+
+	if (val > (core_if->hwcfg2.b.num_host_chan + 1)) {
+		if (dwc_otg_param_initialized
+		    (core_if->core_params->host_channels)) {
+			DWC_ERROR
+			    ("%d invalid for host_channels. Check HW configurations.\n",
+			     val);
+		}
+		val = (core_if->hwcfg2.b.num_host_chan + 1);
+		retval = -DWC_E_INVALID;
+	}
+
+	core_if->core_params->host_channels = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_host_channels(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->host_channels;
+}
+
+int dwc_otg_set_param_dev_endpoints(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	int retval = 0;
+
+	if (DWC_OTG_PARAM_TEST(val, 1, 15)) {
+		DWC_WARN("Wrong value for dev_endpoints\n");
+		DWC_WARN("dev_endpoints must be 1-15\n");
+		return -DWC_E_INVALID;
+	}
+
+	if (val > (core_if->hwcfg2.b.num_dev_ep)) {
+		if (dwc_otg_param_initialized
+		    (core_if->core_params->dev_endpoints)) {
+			DWC_ERROR
+			    ("%d invalid for dev_endpoints. Check HW configurations.\n",
+			     val);
+		}
+		val = core_if->hwcfg2.b.num_dev_ep;
+		retval = -DWC_E_INVALID;
+	}
+
+	core_if->core_params->dev_endpoints = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_dev_endpoints(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->dev_endpoints;
+}
+
+int dwc_otg_set_param_phy_type(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	int retval = 0;
+	int valid = 0;
+
+	if (DWC_OTG_PARAM_TEST(val, 0, 2)) {
+		DWC_WARN("Wrong value for phy_type\n");
+		DWC_WARN("phy_type must be 0,1 or 2\n");
+		return -DWC_E_INVALID;
+	}
+#ifndef NO_FS_PHY_HW_CHECKS
+	if ((val == DWC_PHY_TYPE_PARAM_UTMI) &&
+	    ((core_if->hwcfg2.b.hs_phy_type == 1) ||
+	     (core_if->hwcfg2.b.hs_phy_type == 3))) {
+		valid = 1;
+	} else if ((val == DWC_PHY_TYPE_PARAM_ULPI) &&
+		   ((core_if->hwcfg2.b.hs_phy_type == 2) ||
+		    (core_if->hwcfg2.b.hs_phy_type == 3))) {
+		valid = 1;
+	} else if ((val == DWC_PHY_TYPE_PARAM_FS) &&
+		   (core_if->hwcfg2.b.fs_phy_type == 1)) {
+		valid = 1;
+	}
+	if (!valid) {
+		if (dwc_otg_param_initialized(core_if->core_params->phy_type)) {
+			DWC_ERROR
+			    ("%d invalid for phy_type. Check HW configurations.\n",
+			     val);
+		}
+		if (core_if->hwcfg2.b.hs_phy_type) {
+			if ((core_if->hwcfg2.b.hs_phy_type == 3) ||
+			    (core_if->hwcfg2.b.hs_phy_type == 1)) {
+				val = DWC_PHY_TYPE_PARAM_UTMI;
+			} else {
+				val = DWC_PHY_TYPE_PARAM_ULPI;
+			}
+		}
+		retval = -DWC_E_INVALID;
+	}
+#endif
+	core_if->core_params->phy_type = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_phy_type(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->phy_type;
+}
+
+int dwc_otg_set_param_speed(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	int retval = 0;
+	if (DWC_OTG_PARAM_TEST(val, 0, 1)) {
+		DWC_WARN("Wrong value for speed parameter\n");
+		DWC_WARN("max_speed parameter must be 0 or 1\n");
+		return -DWC_E_INVALID;
+	}
+	if ((val == 0)
+	    && dwc_otg_get_param_phy_type(core_if) == DWC_PHY_TYPE_PARAM_FS) {
+		if (dwc_otg_param_initialized(core_if->core_params->speed)) {
+			DWC_ERROR
+			    ("%d invalid for speed paremter. Check HW configuration.\n",
+			     val);
+		}
+		val =
+		    (dwc_otg_get_param_phy_type(core_if) ==
+		     DWC_PHY_TYPE_PARAM_FS ? 1 : 0);
+		retval = -DWC_E_INVALID;
+	}
+	core_if->core_params->speed = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_speed(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->speed;
+}
+
+int dwc_otg_set_param_host_ls_low_power_phy_clk(dwc_otg_core_if_t * core_if,
+						int32_t val)
+{
+	int retval = 0;
+
+	if (DWC_OTG_PARAM_TEST(val, 0, 1)) {
+		DWC_WARN
+		    ("Wrong value for host_ls_low_power_phy_clk parameter\n");
+		DWC_WARN("host_ls_low_power_phy_clk must be 0 or 1\n");
+		return -DWC_E_INVALID;
+	}
+
+	if ((val == DWC_HOST_LS_LOW_POWER_PHY_CLK_PARAM_48MHZ)
+	    && (dwc_otg_get_param_phy_type(core_if) == DWC_PHY_TYPE_PARAM_FS)) {
+		if (dwc_otg_param_initialized
+		    (core_if->core_params->host_ls_low_power_phy_clk)) {
+			DWC_ERROR
+			    ("%d invalid for host_ls_low_power_phy_clk. Check HW configuration.\n",
+			     val);
+		}
+		val =
+		    (dwc_otg_get_param_phy_type(core_if) ==
+		     DWC_PHY_TYPE_PARAM_FS) ?
+		    DWC_HOST_LS_LOW_POWER_PHY_CLK_PARAM_6MHZ :
+		    DWC_HOST_LS_LOW_POWER_PHY_CLK_PARAM_48MHZ;
+		retval = -DWC_E_INVALID;
+	}
+
+	core_if->core_params->host_ls_low_power_phy_clk = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_host_ls_low_power_phy_clk(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->host_ls_low_power_phy_clk;
+}
+
+int dwc_otg_set_param_phy_ulpi_ddr(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	if (DWC_OTG_PARAM_TEST(val, 0, 1)) {
+		DWC_WARN("Wrong value for phy_ulpi_ddr\n");
+		DWC_WARN("phy_upli_ddr must be 0 or 1\n");
+		return -DWC_E_INVALID;
+	}
+
+	core_if->core_params->phy_ulpi_ddr = val;
+	return 0;
+}
+
+int32_t dwc_otg_get_param_phy_ulpi_ddr(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->phy_ulpi_ddr;
+}
+
+int dwc_otg_set_param_phy_ulpi_ext_vbus(dwc_otg_core_if_t * core_if,
+					int32_t val)
+{
+	if (DWC_OTG_PARAM_TEST(val, 0, 1)) {
+		DWC_WARN("Wrong valaue for phy_ulpi_ext_vbus\n");
+		DWC_WARN("phy_ulpi_ext_vbus must be 0 or 1\n");
+		return -DWC_E_INVALID;
+	}
+
+	core_if->core_params->phy_ulpi_ext_vbus = val;
+	return 0;
+}
+
+int32_t dwc_otg_get_param_phy_ulpi_ext_vbus(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->phy_ulpi_ext_vbus;
+}
+
+int dwc_otg_set_param_phy_utmi_width(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	if (DWC_OTG_PARAM_TEST(val, 8, 8) && DWC_OTG_PARAM_TEST(val, 16, 16)) {
+		DWC_WARN("Wrong valaue for phy_utmi_width\n");
+		DWC_WARN("phy_utmi_width must be 8 or 16\n");
+		return -DWC_E_INVALID;
+	}
+
+	core_if->core_params->phy_utmi_width = val;
+	return 0;
+}
+
+int32_t dwc_otg_get_param_phy_utmi_width(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->phy_utmi_width;
+}
+
+int dwc_otg_set_param_ulpi_fs_ls(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	if (DWC_OTG_PARAM_TEST(val, 0, 1)) {
+		DWC_WARN("Wrong valaue for ulpi_fs_ls\n");
+		DWC_WARN("ulpi_fs_ls must be 0 or 1\n");
+		return -DWC_E_INVALID;
+	}
+
+	core_if->core_params->ulpi_fs_ls = val;
+	return 0;
+}
+
+int32_t dwc_otg_get_param_ulpi_fs_ls(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->ulpi_fs_ls;
+}
+
+int dwc_otg_set_param_ts_dline(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	if (DWC_OTG_PARAM_TEST(val, 0, 1)) {
+		DWC_WARN("Wrong valaue for ts_dline\n");
+		DWC_WARN("ts_dline must be 0 or 1\n");
+		return -DWC_E_INVALID;
+	}
+
+	core_if->core_params->ts_dline = val;
+	return 0;
+}
+
+int32_t dwc_otg_get_param_ts_dline(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->ts_dline;
+}
+
+int dwc_otg_set_param_i2c_enable(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	int retval = 0;
+	if (DWC_OTG_PARAM_TEST(val, 0, 1)) {
+		DWC_WARN("Wrong valaue for i2c_enable\n");
+		DWC_WARN("i2c_enable must be 0 or 1\n");
+		return -DWC_E_INVALID;
+	}
+#ifndef NO_FS_PHY_HW_CHECK
+	if (val == 1 && core_if->hwcfg3.b.i2c == 0) {
+		if (dwc_otg_param_initialized(core_if->core_params->i2c_enable)) {
+			DWC_ERROR
+			    ("%d invalid for i2c_enable. Check HW configuration.\n",
+			     val);
+		}
+		val = 0;
+		retval = -DWC_E_INVALID;
+	}
+#endif
+
+	core_if->core_params->i2c_enable = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_i2c_enable(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->i2c_enable;
+}
+
+int dwc_otg_set_param_dev_perio_tx_fifo_size(dwc_otg_core_if_t * core_if,
+					     int32_t val, int fifo_num)
+{
+	int retval = 0;
+
+	if (DWC_OTG_PARAM_TEST(val, 4, 768)) {
+		DWC_WARN("Wrong value for dev_perio_tx_fifo_size\n");
+		DWC_WARN("dev_perio_tx_fifo_size must be 4-768\n");
+		return -DWC_E_INVALID;
+	}
+
+	if (val >
+	    (DWC_READ_REG32(&core_if->core_global_regs->dtxfsiz[fifo_num]))) {
+		if (dwc_otg_param_initialized
+		    (core_if->core_params->dev_perio_tx_fifo_size[fifo_num])) {
+			DWC_ERROR
+			    ("`%d' invalid for parameter `dev_perio_fifo_size_%d'. Check HW configuration.\n",
+			     val, fifo_num);
+		}
+		val = (DWC_READ_REG32(&core_if->core_global_regs->dtxfsiz[fifo_num]));
+		retval = -DWC_E_INVALID;
+	}
+
+	core_if->core_params->dev_perio_tx_fifo_size[fifo_num] = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_dev_perio_tx_fifo_size(dwc_otg_core_if_t * core_if,
+						 int fifo_num)
+{
+	return core_if->core_params->dev_perio_tx_fifo_size[fifo_num];
+}
+
+int dwc_otg_set_param_en_multiple_tx_fifo(dwc_otg_core_if_t * core_if,
+					  int32_t val)
+{
+	int retval = 0;
+	if (DWC_OTG_PARAM_TEST(val, 0, 1)) {
+		DWC_WARN("Wrong valaue for en_multiple_tx_fifo,\n");
+		DWC_WARN("en_multiple_tx_fifo must be 0 or 1\n");
+		return -DWC_E_INVALID;
+	}
+
+	if (val == 1 && core_if->hwcfg4.b.ded_fifo_en == 0) {
+		if (dwc_otg_param_initialized
+		    (core_if->core_params->en_multiple_tx_fifo)) {
+			DWC_ERROR
+			    ("%d invalid for parameter en_multiple_tx_fifo. Check HW configuration.\n",
+			     val);
+		}
+		val = 0;
+		retval = -DWC_E_INVALID;
+	}
+
+	core_if->core_params->en_multiple_tx_fifo = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_en_multiple_tx_fifo(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->en_multiple_tx_fifo;
+}
+
+int dwc_otg_set_param_dev_tx_fifo_size(dwc_otg_core_if_t * core_if, int32_t val,
+				       int fifo_num)
+{
+	int retval = 0;
+
+	if (DWC_OTG_PARAM_TEST(val, 4, 768)) {
+		DWC_WARN("Wrong value for dev_tx_fifo_size\n");
+		DWC_WARN("dev_tx_fifo_size must be 4-768\n");
+		return -DWC_E_INVALID;
+	}
+
+	if (val >
+	    (DWC_READ_REG32(&core_if->core_global_regs->dtxfsiz[fifo_num]))) {
+		if (dwc_otg_param_initialized
+		    (core_if->core_params->dev_tx_fifo_size[fifo_num])) {
+			DWC_ERROR
+			    ("`%d' invalid for parameter `dev_tx_fifo_size_%d'. Check HW configuration.\n",
+			     val, fifo_num);
+		}
+		val = (DWC_READ_REG32(&core_if->core_global_regs->dtxfsiz[fifo_num]));
+		retval = -DWC_E_INVALID;
+	}
+
+	core_if->core_params->dev_tx_fifo_size[fifo_num] = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_dev_tx_fifo_size(dwc_otg_core_if_t * core_if,
+					   int fifo_num)
+{
+	return core_if->core_params->dev_tx_fifo_size[fifo_num];
+}
+
+int dwc_otg_set_param_thr_ctl(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	int retval = 0;
+
+	if (DWC_OTG_PARAM_TEST(val, 0, 7)) {
+		DWC_WARN("Wrong value for thr_ctl\n");
+		DWC_WARN("thr_ctl must be 0-7\n");
+		return -DWC_E_INVALID;
+	}
+
+	if ((val != 0) &&
+	    (!dwc_otg_get_param_dma_enable(core_if) ||
+	     !core_if->hwcfg4.b.ded_fifo_en)) {
+		if (dwc_otg_param_initialized(core_if->core_params->thr_ctl)) {
+			DWC_ERROR
+			    ("%d invalid for parameter thr_ctl. Check HW configuration.\n",
+			     val);
+		}
+		val = 0;
+		retval = -DWC_E_INVALID;
+	}
+
+	core_if->core_params->thr_ctl = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_thr_ctl(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->thr_ctl;
+}
+
+int dwc_otg_set_param_lpm_enable(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	int retval = 0;
+
+	if (DWC_OTG_PARAM_TEST(val, 0, 1)) {
+		DWC_WARN("Wrong value for lpm_enable\n");
+		DWC_WARN("lpm_enable must be 0 or 1\n");
+		return -DWC_E_INVALID;
+	}
+
+	if (val && !core_if->hwcfg3.b.otg_lpm_en) {
+		if (dwc_otg_param_initialized(core_if->core_params->lpm_enable)) {
+			DWC_ERROR
+			    ("%d invalid for parameter lpm_enable. Check HW configuration.\n",
+			     val);
+		}
+		val = 0;
+		retval = -DWC_E_INVALID;
+	}
+
+	core_if->core_params->lpm_enable = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_lpm_enable(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->lpm_enable;
+}
+
+int dwc_otg_set_param_tx_thr_length(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	if (DWC_OTG_PARAM_TEST(val, 8, 128)) {
+		DWC_WARN("Wrong valaue for tx_thr_length\n");
+		DWC_WARN("tx_thr_length must be 8 - 128\n");
+		return -DWC_E_INVALID;
+	}
+
+	core_if->core_params->tx_thr_length = val;
+	return 0;
+}
+
+int32_t dwc_otg_get_param_tx_thr_length(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->tx_thr_length;
+}
+
+int dwc_otg_set_param_rx_thr_length(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	if (DWC_OTG_PARAM_TEST(val, 8, 128)) {
+		DWC_WARN("Wrong valaue for rx_thr_length\n");
+		DWC_WARN("rx_thr_length must be 8 - 128\n");
+		return -DWC_E_INVALID;
+	}
+
+	core_if->core_params->rx_thr_length = val;
+	return 0;
+}
+
+int32_t dwc_otg_get_param_rx_thr_length(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->rx_thr_length;
+}
+
+int dwc_otg_set_param_dma_burst_size(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	if (DWC_OTG_PARAM_TEST(val, 1, 1) &&
+	    DWC_OTG_PARAM_TEST(val, 4, 4) &&
+	    DWC_OTG_PARAM_TEST(val, 8, 8) &&
+	    DWC_OTG_PARAM_TEST(val, 16, 16) &&
+	    DWC_OTG_PARAM_TEST(val, 32, 32) &&
+	    DWC_OTG_PARAM_TEST(val, 64, 64) &&
+	    DWC_OTG_PARAM_TEST(val, 128, 128) &&
+	    DWC_OTG_PARAM_TEST(val, 256, 256)) {
+		DWC_WARN("`%d' invalid for parameter `dma_burst_size'\n", val);
+		return -DWC_E_INVALID;
+	}
+	core_if->core_params->dma_burst_size = val;
+	return 0;
+}
+
+int32_t dwc_otg_get_param_dma_burst_size(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->dma_burst_size;
+}
+
+int dwc_otg_set_param_pti_enable(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	int retval = 0;
+	if (DWC_OTG_PARAM_TEST(val, 0, 1)) {
+		DWC_WARN("`%d' invalid for parameter `pti_enable'\n", val);
+		return -DWC_E_INVALID;
+	}
+	if (val && (core_if->snpsid < OTG_CORE_REV_2_72a)) {
+		if (dwc_otg_param_initialized(core_if->core_params->pti_enable)) {
+			DWC_ERROR
+			    ("%d invalid for parameter pti_enable. Check HW configuration.\n",
+			     val);
+		}
+		retval = -DWC_E_INVALID;
+		val = 0;
+	}
+	core_if->core_params->pti_enable = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_pti_enable(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->pti_enable;
+}
+
+int dwc_otg_set_param_mpi_enable(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	int retval = 0;
+	if (DWC_OTG_PARAM_TEST(val, 0, 1)) {
+		DWC_WARN("`%d' invalid for parameter `mpi_enable'\n", val);
+		return -DWC_E_INVALID;
+	}
+	if (val && (core_if->hwcfg2.b.multi_proc_int == 0)) {
+		if (dwc_otg_param_initialized(core_if->core_params->mpi_enable)) {
+			DWC_ERROR
+			    ("%d invalid for parameter mpi_enable. Check HW configuration.\n",
+			     val);
+		}
+		retval = -DWC_E_INVALID;
+		val = 0;
+	}
+	core_if->core_params->mpi_enable = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_mpi_enable(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->mpi_enable;
+}
+
+int dwc_otg_set_param_adp_enable(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	int retval = 0;
+	if (DWC_OTG_PARAM_TEST(val, 0, 1)) {
+		DWC_WARN("`%d' invalid for parameter `adp_enable'\n", val);
+		return -DWC_E_INVALID;
+	}
+	if (val && (core_if->hwcfg3.b.adp_supp == 0)) {
+		if (dwc_otg_param_initialized
+		    (core_if->core_params->adp_supp_enable)) {
+			DWC_ERROR
+			    ("%d invalid for parameter adp_enable. Check HW configuration.\n",
+			     val);
+		}
+		retval = -DWC_E_INVALID;
+		val = 0;
+	}
+	core_if->core_params->adp_supp_enable = val;
+	/*Set OTG version 2.0 in case of enabling ADP*/
+	dwc_otg_set_param_otg_ver(core_if, 1);
+
+	return retval;
+}
+
+int32_t dwc_otg_get_param_adp_enable(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->adp_supp_enable;
+}
+
+int dwc_otg_set_param_ic_usb_cap(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	int retval = 0;
+	if (DWC_OTG_PARAM_TEST(val, 0, 1)) {
+		DWC_WARN("`%d' invalid for parameter `ic_usb_cap'\n", val);
+		DWC_WARN("ic_usb_cap must be 0 or 1\n");
+		return -DWC_E_INVALID;
+	}
+
+	if (val && (core_if->hwcfg2.b.otg_enable_ic_usb == 0)) {
+		if (dwc_otg_param_initialized(core_if->core_params->ic_usb_cap)) {
+			DWC_ERROR
+			    ("%d invalid for parameter ic_usb_cap. Check HW configuration.\n",
+			     val);
+		}
+		retval = -DWC_E_INVALID;
+		val = 0;
+	}
+	core_if->core_params->ic_usb_cap = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_ic_usb_cap(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->ic_usb_cap;
+}
+
+int dwc_otg_set_param_ahb_thr_ratio(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	int retval = 0;
+	int valid = 1;
+
+	if (DWC_OTG_PARAM_TEST(val, 0, 3)) {
+		DWC_WARN("`%d' invalid for parameter `ahb_thr_ratio'\n", val);
+		DWC_WARN("ahb_thr_ratio must be 0 - 3\n");
+		return -DWC_E_INVALID;
+	}
+
+	if (val
+	    && (core_if->snpsid < OTG_CORE_REV_2_81a
+		|| !dwc_otg_get_param_thr_ctl(core_if))) {
+		valid = 0;
+	} else if (val
+		   && ((dwc_otg_get_param_tx_thr_length(core_if) / (1 << val)) <
+		       4)) {
+		valid = 0;
+	}
+	if (valid == 0) {
+		if (dwc_otg_param_initialized
+		    (core_if->core_params->ahb_thr_ratio)) {
+			DWC_ERROR
+			    ("%d invalid for parameter ahb_thr_ratio. Check HW configuration.\n",
+			     val);
+		}
+		retval = -DWC_E_INVALID;
+		val = 0;
+	}
+
+	core_if->core_params->ahb_thr_ratio = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_ahb_thr_ratio(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->ahb_thr_ratio;
+}
+
+int dwc_otg_set_param_power_down(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	int retval = 0;
+	int valid = 1;
+
+	if (DWC_OTG_PARAM_TEST(val, 0, 2)) {
+		DWC_WARN("`%d' invalid for parameter `power_down'\n", val);
+		DWC_WARN("power_down must be 0 - 2\n");
+		return -DWC_E_INVALID;
+	}
+
+	if ((val == 2) && (core_if->snpsid < OTG_CORE_REV_2_91a)) {
+		valid = 0;
+	}
+	if (valid == 0) {
+		if (dwc_otg_param_initialized(core_if->core_params->power_down)) {
+			DWC_ERROR
+			    ("%d invalid for parameter power_down. Check HW configuration.\n",
+			     val);
+		}
+		retval = -DWC_E_INVALID;
+		val = 0;
+	}
+	core_if->core_params->power_down = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_power_down(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->power_down;
+}
+
+int dwc_otg_set_param_reload_ctl(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	int retval = 0;
+	int valid = 1;
+
+	if (DWC_OTG_PARAM_TEST(val, 0, 1)) {
+		DWC_WARN("`%d' invalid for parameter `reload_ctl'\n", val);
+		DWC_WARN("reload_ctl must be 0 or 1\n");
+		return -DWC_E_INVALID;
+	}
+
+	if ((val == 1) && (core_if->snpsid < OTG_CORE_REV_2_92a)) {
+		valid = 0;
+	}
+	if (valid == 0) {
+		if (dwc_otg_param_initialized(core_if->core_params->reload_ctl)) {
+			DWC_ERROR("%d invalid for parameter reload_ctl."
+				  "Check HW configuration.\n", val);
+		}
+		retval = -DWC_E_INVALID;
+		val = 0;
+	}
+	core_if->core_params->reload_ctl = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_reload_ctl(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->reload_ctl;
+}
+
+int dwc_otg_set_param_dev_out_nak(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	int retval = 0;
+	int valid = 1;
+
+	if (DWC_OTG_PARAM_TEST(val, 0, 1)) {
+		DWC_WARN("`%d' invalid for parameter `dev_out_nak'\n", val);
+		DWC_WARN("dev_out_nak must be 0 or 1\n");
+		return -DWC_E_INVALID;
+	}
+
+	if ((val == 1) && ((core_if->snpsid < OTG_CORE_REV_2_93a) ||
+		!(core_if->core_params->dma_desc_enable))) {
+		valid = 0;
+	}
+	if (valid == 0) {
+		if (dwc_otg_param_initialized(core_if->core_params->dev_out_nak)) {
+			DWC_ERROR("%d invalid for parameter dev_out_nak."
+				"Check HW configuration.\n", val);
+		}
+		retval = -DWC_E_INVALID;
+		val = 0;
+	}
+	core_if->core_params->dev_out_nak = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_dev_out_nak(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->dev_out_nak;
+}
+
+int dwc_otg_set_param_otg_ver(dwc_otg_core_if_t * core_if, int32_t val)
+{
+	int retval = 0;
+
+	if (DWC_OTG_PARAM_TEST(val, 0, 1)) {
+		DWC_WARN("`%d' invalid for parameter `otg_ver'\n", val);
+		DWC_WARN
+		    ("otg_ver must be 0(for OTG 1.3 support) or 1(for OTG 2.0 support)\n");
+		return -DWC_E_INVALID;
+	}
+
+	core_if->core_params->otg_ver = val;
+	return retval;
+}
+
+int32_t dwc_otg_get_param_otg_ver(dwc_otg_core_if_t * core_if)
+{
+	return core_if->core_params->otg_ver;
+}
+
+uint32_t dwc_otg_get_hnpstatus(dwc_otg_core_if_t * core_if)
+{
+	gotgctl_data_t otgctl;
+	otgctl.d32 = DWC_READ_REG32(&core_if->core_global_regs->gotgctl);
+	return otgctl.b.hstnegscs;
+}
+
+uint32_t dwc_otg_get_srpstatus(dwc_otg_core_if_t * core_if)
+{
+	gotgctl_data_t otgctl;
+	otgctl.d32 = DWC_READ_REG32(&core_if->core_global_regs->gotgctl);
+	return otgctl.b.sesreqscs;
+}
+
+void dwc_otg_set_hnpreq(dwc_otg_core_if_t * core_if, uint32_t val)
+{
+	if(core_if->otg_ver == 0) {
+		gotgctl_data_t otgctl;
+		otgctl.d32 = DWC_READ_REG32(&core_if->core_global_regs->gotgctl);
+		otgctl.b.hnpreq = val;
+		DWC_WRITE_REG32(&core_if->core_global_regs->gotgctl, otgctl.d32);
+	} else {
+		core_if->otg_sts = val;
+	}
+}
+
+uint32_t dwc_otg_get_gsnpsid(dwc_otg_core_if_t * core_if)
+{
+	return core_if->snpsid;
+}
+
+uint32_t dwc_otg_get_mode(dwc_otg_core_if_t * core_if)
+{
+	gintsts_data_t gintsts;
+	gintsts.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintsts);
+	return gintsts.b.curmode;
+}
+
+uint32_t dwc_otg_get_hnpcapable(dwc_otg_core_if_t * core_if)
+{
+	gusbcfg_data_t usbcfg;
+	usbcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->gusbcfg);
+	return usbcfg.b.hnpcap;
+}
+
+void dwc_otg_set_hnpcapable(dwc_otg_core_if_t * core_if, uint32_t val)
+{
+	gusbcfg_data_t usbcfg;
+	usbcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->gusbcfg);
+	usbcfg.b.hnpcap = val;
+	DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg, usbcfg.d32);
+}
+
+uint32_t dwc_otg_get_srpcapable(dwc_otg_core_if_t * core_if)
+{
+	gusbcfg_data_t usbcfg;
+	usbcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->gusbcfg);
+	return usbcfg.b.srpcap;
+}
+
+void dwc_otg_set_srpcapable(dwc_otg_core_if_t * core_if, uint32_t val)
+{
+	gusbcfg_data_t usbcfg;
+	usbcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->gusbcfg);
+	usbcfg.b.srpcap = val;
+	DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg, usbcfg.d32);
+}
+
+uint32_t dwc_otg_get_devspeed(dwc_otg_core_if_t * core_if)
+{
+	dcfg_data_t dcfg;
+	dcfg.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dcfg);
+	return dcfg.b.devspd;
+}
+
+void dwc_otg_set_devspeed(dwc_otg_core_if_t * core_if, uint32_t val)
+{
+	dcfg_data_t dcfg;
+	dcfg.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dcfg);
+	dcfg.b.devspd = val;
+	DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dcfg, dcfg.d32);
+}
+
+uint32_t dwc_otg_get_busconnected(dwc_otg_core_if_t * core_if)
+{
+	hprt0_data_t hprt0;
+	hprt0.d32 = DWC_READ_REG32(core_if->host_if->hprt0);
+	return hprt0.b.prtconnsts;
+}
+
+uint32_t dwc_otg_get_enumspeed(dwc_otg_core_if_t * core_if)
+{
+	dsts_data_t dsts;
+	dsts.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dsts);
+	return dsts.b.enumspd;
+}
+
+uint32_t dwc_otg_get_prtpower(dwc_otg_core_if_t * core_if)
+{
+	hprt0_data_t hprt0;
+	hprt0.d32 = DWC_READ_REG32(core_if->host_if->hprt0);
+	return hprt0.b.prtpwr;
+
+}
+
+uint32_t dwc_otg_get_core_state(dwc_otg_core_if_t * core_if)
+{
+	return core_if->hibernation_suspend;
+}
+
+void dwc_otg_set_prtpower(dwc_otg_core_if_t * core_if, uint32_t val)
+{
+	hprt0_data_t hprt0;
+	hprt0.d32 = dwc_otg_read_hprt0(core_if);
+	hprt0.b.prtpwr = val;
+	DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+}
+
+uint32_t dwc_otg_get_prtsuspend(dwc_otg_core_if_t * core_if)
+{
+	hprt0_data_t hprt0;
+	hprt0.d32 = DWC_READ_REG32(core_if->host_if->hprt0);
+	return hprt0.b.prtsusp;
+
+}
+
+void dwc_otg_set_prtsuspend(dwc_otg_core_if_t * core_if, uint32_t val)
+{
+	hprt0_data_t hprt0;
+	hprt0.d32 = dwc_otg_read_hprt0(core_if);
+	hprt0.b.prtsusp = val;
+	DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+}
+
+uint32_t dwc_otg_get_fr_interval(dwc_otg_core_if_t * core_if)
+{
+	hfir_data_t hfir;
+	hfir.d32 = DWC_READ_REG32(&core_if->host_if->host_global_regs->hfir);
+	return hfir.b.frint;
+
+}
+
+void dwc_otg_set_fr_interval(dwc_otg_core_if_t * core_if, uint32_t val)
+{
+	hfir_data_t hfir;
+	uint32_t fram_int;
+	fram_int = calc_frame_interval(core_if);
+	hfir.d32 = DWC_READ_REG32(&core_if->host_if->host_global_regs->hfir);
+	if (!core_if->core_params->reload_ctl) {
+		DWC_WARN("\nCannot reload HFIR register.HFIR.HFIRRldCtrl bit is"
+			 "not set to 1.\nShould load driver with reload_ctl=1"
+			 " module parameter\n");
+		return;
+	}
+	switch (fram_int) {
+	case 3750:
+		if ((val < 3350) || (val > 4150)) {
+			DWC_WARN("HFIR interval for HS core and 30 MHz"
+				 "clock freq should be from 3350 to 4150\n");
+			return;
+		}
+		break;
+	case 30000:
+		if ((val < 26820) || (val > 33180)) {
+			DWC_WARN("HFIR interval for FS/LS core and 30 MHz"
+				 "clock freq should be from 26820 to 33180\n");
+			return;
+		}
+		break;
+	case 6000:
+		if ((val < 5360) || (val > 6640)) {
+			DWC_WARN("HFIR interval for HS core and 48 MHz"
+				 "clock freq should be from 5360 to 6640\n");
+			return;
+		}
+		break;
+	case 48000:
+		if ((val < 42912) || (val > 53088)) {
+			DWC_WARN("HFIR interval for FS/LS core and 48 MHz"
+				 "clock freq should be from 42912 to 53088\n");
+			return;
+		}
+		break;
+	case 7500:
+		if ((val < 6700) || (val > 8300)) {
+			DWC_WARN("HFIR interval for HS core and 60 MHz"
+				 "clock freq should be from 6700 to 8300\n");
+			return;
+		}
+		break;
+	case 60000:
+		if ((val < 53640) || (val > 65536)) {
+			DWC_WARN("HFIR interval for FS/LS core and 60 MHz"
+				 "clock freq should be from 53640 to 65536\n");
+			return;
+		}
+		break;
+	default:
+		DWC_WARN("Unknown frame interval\n");
+		return;
+		break;
+
+	}
+	hfir.b.frint = val;
+	DWC_WRITE_REG32(&core_if->host_if->host_global_regs->hfir, hfir.d32);
+}
+
+uint32_t dwc_otg_get_mode_ch_tim(dwc_otg_core_if_t * core_if)
+{
+	hcfg_data_t hcfg;
+	hcfg.d32 = DWC_READ_REG32(&core_if->host_if->host_global_regs->hcfg);
+	return hcfg.b.modechtimen;
+
+}
+
+void dwc_otg_set_mode_ch_tim(dwc_otg_core_if_t * core_if, uint32_t val)
+{
+	hcfg_data_t hcfg;
+	hcfg.d32 = DWC_READ_REG32(&core_if->host_if->host_global_regs->hcfg);
+	hcfg.b.modechtimen = val;
+	DWC_WRITE_REG32(&core_if->host_if->host_global_regs->hcfg, hcfg.d32);
+}
+
+void dwc_otg_set_prtresume(dwc_otg_core_if_t * core_if, uint32_t val)
+{
+	hprt0_data_t hprt0;
+	hprt0.d32 = dwc_otg_read_hprt0(core_if);
+	hprt0.b.prtres = val;
+	DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+}
+
+uint32_t dwc_otg_get_remotewakesig(dwc_otg_core_if_t * core_if)
+{
+	dctl_data_t dctl;
+	dctl.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dctl);
+	return dctl.b.rmtwkupsig;
+}
+
+uint32_t dwc_otg_get_lpm_portsleepstatus(dwc_otg_core_if_t * core_if)
+{
+	glpmcfg_data_t lpmcfg;
+	lpmcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->glpmcfg);
+
+	DWC_ASSERT(!
+		   ((core_if->lx_state == DWC_OTG_L1) ^ lpmcfg.b.prt_sleep_sts),
+		   "lx_state = %d, lmpcfg.prt_sleep_sts = %d\n",
+		   core_if->lx_state, lpmcfg.b.prt_sleep_sts);
+
+	return lpmcfg.b.prt_sleep_sts;
+}
+
+uint32_t dwc_otg_get_lpm_remotewakeenabled(dwc_otg_core_if_t * core_if)
+{
+	glpmcfg_data_t lpmcfg;
+	lpmcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->glpmcfg);
+	return lpmcfg.b.rem_wkup_en;
+}
+
+uint32_t dwc_otg_get_lpmresponse(dwc_otg_core_if_t * core_if)
+{
+	glpmcfg_data_t lpmcfg;
+	lpmcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->glpmcfg);
+	return lpmcfg.b.appl_resp;
+}
+
+void dwc_otg_set_lpmresponse(dwc_otg_core_if_t * core_if, uint32_t val)
+{
+	glpmcfg_data_t lpmcfg;
+	lpmcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->glpmcfg);
+	lpmcfg.b.appl_resp = val;
+	DWC_WRITE_REG32(&core_if->core_global_regs->glpmcfg, lpmcfg.d32);
+}
+
+uint32_t dwc_otg_get_hsic_connect(dwc_otg_core_if_t * core_if)
+{
+	glpmcfg_data_t lpmcfg;
+	lpmcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->glpmcfg);
+	return lpmcfg.b.hsic_connect;
+}
+
+void dwc_otg_set_hsic_connect(dwc_otg_core_if_t * core_if, uint32_t val)
+{
+	glpmcfg_data_t lpmcfg;
+	lpmcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->glpmcfg);
+	lpmcfg.b.hsic_connect = val;
+	DWC_WRITE_REG32(&core_if->core_global_regs->glpmcfg, lpmcfg.d32);
+}
+
+uint32_t dwc_otg_get_inv_sel_hsic(dwc_otg_core_if_t * core_if)
+{
+	glpmcfg_data_t lpmcfg;
+	lpmcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->glpmcfg);
+	return lpmcfg.b.inv_sel_hsic;
+
+}
+
+void dwc_otg_set_inv_sel_hsic(dwc_otg_core_if_t * core_if, uint32_t val)
+{
+	glpmcfg_data_t lpmcfg;
+	lpmcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->glpmcfg);
+	lpmcfg.b.inv_sel_hsic = val;
+	DWC_WRITE_REG32(&core_if->core_global_regs->glpmcfg, lpmcfg.d32);
+}
+
+uint32_t dwc_otg_get_gotgctl(dwc_otg_core_if_t * core_if)
+{
+	return DWC_READ_REG32(&core_if->core_global_regs->gotgctl);
+}
+
+void dwc_otg_set_gotgctl(dwc_otg_core_if_t * core_if, uint32_t val)
+{
+	DWC_WRITE_REG32(&core_if->core_global_regs->gotgctl, val);
+}
+
+uint32_t dwc_otg_get_gusbcfg(dwc_otg_core_if_t * core_if)
+{
+	return DWC_READ_REG32(&core_if->core_global_regs->gusbcfg);
+}
+
+void dwc_otg_set_gusbcfg(dwc_otg_core_if_t * core_if, uint32_t val)
+{
+	DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg, val);
+}
+
+uint32_t dwc_otg_get_grxfsiz(dwc_otg_core_if_t * core_if)
+{
+	return DWC_READ_REG32(&core_if->core_global_regs->grxfsiz);
+}
+
+void dwc_otg_set_grxfsiz(dwc_otg_core_if_t * core_if, uint32_t val)
+{
+	DWC_WRITE_REG32(&core_if->core_global_regs->grxfsiz, val);
+}
+
+uint32_t dwc_otg_get_gnptxfsiz(dwc_otg_core_if_t * core_if)
+{
+	return DWC_READ_REG32(&core_if->core_global_regs->gnptxfsiz);
+}
+
+void dwc_otg_set_gnptxfsiz(dwc_otg_core_if_t * core_if, uint32_t val)
+{
+	DWC_WRITE_REG32(&core_if->core_global_regs->gnptxfsiz, val);
+}
+
+uint32_t dwc_otg_get_gpvndctl(dwc_otg_core_if_t * core_if)
+{
+	return DWC_READ_REG32(&core_if->core_global_regs->gpvndctl);
+}
+
+void dwc_otg_set_gpvndctl(dwc_otg_core_if_t * core_if, uint32_t val)
+{
+	DWC_WRITE_REG32(&core_if->core_global_regs->gpvndctl, val);
+}
+
+uint32_t dwc_otg_get_ggpio(dwc_otg_core_if_t * core_if)
+{
+	return DWC_READ_REG32(&core_if->core_global_regs->ggpio);
+}
+
+void dwc_otg_set_ggpio(dwc_otg_core_if_t * core_if, uint32_t val)
+{
+	DWC_WRITE_REG32(&core_if->core_global_regs->ggpio, val);
+}
+
+uint32_t dwc_otg_get_hprt0(dwc_otg_core_if_t * core_if)
+{
+	return DWC_READ_REG32(core_if->host_if->hprt0);
+
+}
+
+void dwc_otg_set_hprt0(dwc_otg_core_if_t * core_if, uint32_t val)
+{
+	DWC_WRITE_REG32(core_if->host_if->hprt0, val);
+}
+
+uint32_t dwc_otg_get_guid(dwc_otg_core_if_t * core_if)
+{
+	return DWC_READ_REG32(&core_if->core_global_regs->guid);
+}
+
+void dwc_otg_set_guid(dwc_otg_core_if_t * core_if, uint32_t val)
+{
+	DWC_WRITE_REG32(&core_if->core_global_regs->guid, val);
+}
+
+uint32_t dwc_otg_get_hptxfsiz(dwc_otg_core_if_t * core_if)
+{
+	return DWC_READ_REG32(&core_if->core_global_regs->hptxfsiz);
+}
+
+uint16_t dwc_otg_get_otg_version(dwc_otg_core_if_t * core_if)
+{
+	return ((core_if->otg_ver == 1) ? (uint16_t)0x0200 : (uint16_t)0x0103);
+}
+
+/**
+ * Start the SRP timer to detect when the SRP does not complete within
+ * 6 seconds.
+ *
+ * @param core_if the pointer to core_if strucure.
+ */
+void dwc_otg_pcd_start_srp_timer(dwc_otg_core_if_t * core_if)
+{
+	core_if->srp_timer_started = 1;
+	DWC_TIMER_SCHEDULE(core_if->srp_timer, 6000 /* 6 secs */ );
+}
+
+void dwc_otg_initiate_srp(dwc_otg_core_if_t * core_if)
+{
+	uint32_t *addr = (uint32_t *) & (core_if->core_global_regs->gotgctl);
+	gotgctl_data_t mem;
+	gotgctl_data_t val;
+
+	val.d32 = DWC_READ_REG32(addr);
+	if (val.b.sesreq) {
+		DWC_ERROR("Session Request Already active!\n");
+		return;
+	}
+
+	DWC_INFO("Session Request Initated\n");	//NOTICE
+	mem.d32 = DWC_READ_REG32(addr);
+	mem.b.sesreq = 1;
+	DWC_WRITE_REG32(addr, mem.d32);
+
+	/* Start the SRP timer */
+	dwc_otg_pcd_start_srp_timer(core_if);
+	return;
+}
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/.dwc_otg_cil.c.swo linux-3.0.82x/drivers/usb/gadget/dwc/driver/.dwc_otg_cil.c.swo
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_cil.h linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_cil.h
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_cil.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_cil.h	2017-09-23 03:42:50.210674477 +0800
@@ -0,0 +1,1427 @@
+/* ==========================================================================
+ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_cil.h $
+ * $Revision: #118 $
+ * $Date: 2011/05/17 $
+ * $Change: 1774110 $
+ *
+ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+ * otherwise expressly agreed to in writing between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product under
+ * any End User Software License Agreement or Agreement for Licensed Product
+ * with Synopsys or any supplement thereto. You are permitted to use and
+ * redistribute this Software in source and binary forms, with or without
+ * modification, provided that redistributions of source code must retain this
+ * notice. You may not view, use, disclose, copy or distribute this file or
+ * any information contained herein except pursuant to this license grant from
+ * Synopsys. If you do not agree with this notice, including the disclaimer
+ * below, then you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================== */
+
+#if !defined(__DWC_CIL_H__)
+#define __DWC_CIL_H__
+
+#include "dwc_list.h"
+#include "dwc_otg_dbg.h"
+#include "dwc_otg_regs.h"
+
+#include "dwc_otg_core_if.h"
+#include "dwc_otg_adp.h"
+
+/**
+ * @file
+ * This file contains the interface to the Core Interface Layer.
+ */
+
+#ifdef DWC_UTE_CFI
+
+#define MAX_DMA_DESCS_PER_EP	256
+
+/**
+ * Enumeration for the data buffer mode
+ */
+typedef enum _data_buffer_mode {
+	BM_STANDARD = 0,	/* data buffer is in normal mode */
+	BM_SG = 1,		/* data buffer uses the scatter/gather mode */
+	BM_CONCAT = 2,		/* data buffer uses the concatenation mode */
+	BM_CIRCULAR = 3,	/* data buffer uses the circular DMA mode */
+	BM_ALIGN = 4		/* data buffer is in buffer alignment mode */
+} data_buffer_mode_e;
+#endif //DWC_UTE_CFI
+
+/** Macros defined for DWC OTG HW Release version */
+
+#define OTG_CORE_REV_2_60a	0x4F54260A
+#define OTG_CORE_REV_2_71a	0x4F54271A
+#define OTG_CORE_REV_2_72a	0x4F54272A
+#define OTG_CORE_REV_2_80a	0x4F54280A
+#define OTG_CORE_REV_2_81a	0x4F54281A
+#define OTG_CORE_REV_2_90a	0x4F54290A
+#define OTG_CORE_REV_2_91a	0x4F54291A
+#define OTG_CORE_REV_2_92a	0x4F54292A
+#define OTG_CORE_REV_2_93a	0x4F54293A
+
+/**
+ * Information for each ISOC packet.
+ */
+typedef struct iso_pkt_info {
+	uint32_t offset;
+	uint32_t length;
+	int32_t status;
+} iso_pkt_info_t;
+
+/**
+ * The <code>dwc_ep</code> structure represents the state of a single
+ * endpoint when acting in device mode. It contains the data items
+ * needed for an endpoint to be activated and transfer packets.
+ */
+typedef struct dwc_ep {
+	/** EP number used for register address lookup */
+	uint8_t num;
+	/** EP direction 0 = OUT */
+	unsigned is_in:1;
+	/** EP active. */
+	unsigned active:1;
+
+	/**
+	 *Periodic Tx FIFO # for IN EPs For INTR EP set to 0 to use non-periodic Tx FIFO
+	 * If dedicated Tx FIFOs are enabled for all IN Eps - Tx FIFO # FOR IN EPs*/
+	unsigned tx_fifo_num:4;
+	/** EP type: 0 - Control, 1 - ISOC,	 2 - BULK,	3 - INTR */
+	unsigned type:2;
+#define DWC_OTG_EP_TYPE_CONTROL	   0
+#define DWC_OTG_EP_TYPE_ISOC	   1
+#define DWC_OTG_EP_TYPE_BULK	   2
+#define DWC_OTG_EP_TYPE_INTR	   3
+
+	/** DATA start PID for INTR and BULK EP */
+	unsigned data_pid_start:1;
+	/** Frame (even/odd) for ISOC EP */
+	unsigned even_odd_frame:1;
+	/** Max Packet bytes */
+	unsigned maxpacket:11;
+
+	/** Max Transfer size */
+	uint32_t maxxfer;
+
+	/** @name Transfer state */
+	/** @{ */
+
+	/**
+	 * Pointer to the beginning of the transfer buffer -- do not modify
+	 * during transfer.
+	 */
+
+	dwc_dma_t dma_addr;
+
+	dwc_dma_t dma_desc_addr;
+	dwc_otg_dev_dma_desc_t *desc_addr;
+
+	uint8_t *start_xfer_buff;
+	/** pointer to the transfer buffer */
+	uint8_t *xfer_buff;
+	/** Number of bytes to transfer */
+	unsigned xfer_len:19;
+	/** Number of bytes transferred. */
+	unsigned xfer_count:19;
+	/** Sent ZLP */
+	unsigned sent_zlp:1;
+	/** Total len for control transfer */
+	unsigned total_len:19;
+
+	/** stall clear flag */
+	unsigned stall_clear_flag:1;
+
+#ifdef DWC_UTE_CFI
+	/* The buffer mode */
+	data_buffer_mode_e buff_mode;
+
+	/* The chain of DMA descriptors.
+	 * MAX_DMA_DESCS_PER_EP will be allocated for each active EP.
+	 */
+	dwc_otg_dma_desc_t *descs;
+
+	/* The DMA address of the descriptors chain start */
+	dma_addr_t descs_dma_addr;
+	/** This variable stores the length of the last enqueued request */
+	uint32_t cfi_req_len;
+#endif				//DWC_UTE_CFI
+
+	/** Allocated DMA Desc count */
+	uint32_t desc_cnt;
+
+#ifdef DWC_UTE_PER_IO
+	/** Next frame num for which will be setup DMA Desc */
+	uint32_t xiso_frame_num;
+	/** bInterval */
+	uint32_t xiso_bInterval;
+	/** Count of currently active transfers - shall be either 0 or 1 */
+	int xiso_active_xfers;
+	int xiso_queued_xfers;
+#endif
+#ifdef DWC_EN_ISOC
+	/**
+	 * Variables specific for ISOC EPs
+	 *
+	 */
+	/** DMA addresses of ISOC buffers */
+	dwc_dma_t dma_addr0;
+	dwc_dma_t dma_addr1;
+
+	dwc_dma_t iso_dma_desc_addr;
+	dwc_otg_dev_dma_desc_t *iso_desc_addr;
+
+	/** pointer to the transfer buffers */
+	uint8_t *xfer_buff0;
+	uint8_t *xfer_buff1;
+
+	/** number of ISOC Buffer is processing */
+	uint32_t proc_buf_num;
+	/** Interval of ISOC Buffer processing */
+	uint32_t buf_proc_intrvl;
+	/** Data size for regular frame */
+	uint32_t data_per_frame;
+
+	/* todo - pattern data support is to be implemented in the future */
+	/** Data size for pattern frame */
+	uint32_t data_pattern_frame;
+	/** Frame number of pattern data */
+	uint32_t sync_frame;
+
+	/** bInterval */
+	uint32_t bInterval;
+	/** ISO Packet number per frame */
+	uint32_t pkt_per_frm;
+	/** Next frame num for which will be setup DMA Desc */
+	uint32_t next_frame;
+	/** Number of packets per buffer processing */
+	uint32_t pkt_cnt;
+	/** Info for all isoc packets */
+	iso_pkt_info_t *pkt_info;
+	/** current pkt number */
+	uint32_t cur_pkt;
+	/** current pkt number */
+	uint8_t *cur_pkt_addr;
+	/** current pkt number */
+	uint32_t cur_pkt_dma_addr;
+#endif				/* DWC_EN_ISOC */
+
+/** @} */
+} dwc_ep_t;
+
+/*
+ * Reasons for halting a host channel.
+ */
+typedef enum dwc_otg_halt_status {
+	DWC_OTG_HC_XFER_NO_HALT_STATUS,
+	DWC_OTG_HC_XFER_COMPLETE,
+	DWC_OTG_HC_XFER_URB_COMPLETE,
+	DWC_OTG_HC_XFER_ACK,
+	DWC_OTG_HC_XFER_NAK,
+	DWC_OTG_HC_XFER_NYET,
+	DWC_OTG_HC_XFER_STALL,
+	DWC_OTG_HC_XFER_XACT_ERR,
+	DWC_OTG_HC_XFER_FRAME_OVERRUN,
+	DWC_OTG_HC_XFER_BABBLE_ERR,
+	DWC_OTG_HC_XFER_DATA_TOGGLE_ERR,
+	DWC_OTG_HC_XFER_AHB_ERR,
+	DWC_OTG_HC_XFER_PERIODIC_INCOMPLETE,
+	DWC_OTG_HC_XFER_URB_DEQUEUE
+} dwc_otg_halt_status_e;
+
+/**
+ * Host channel descriptor. This structure represents the state of a single
+ * host channel when acting in host mode. It contains the data items needed to
+ * transfer packets to an endpoint via a host channel.
+ */
+typedef struct dwc_hc {
+	/** Host channel number used for register address lookup */
+	uint8_t hc_num;
+
+	/** Device to access */
+	unsigned dev_addr:7;
+
+	/** EP to access */
+	unsigned ep_num:4;
+
+	/** EP direction. 0: OUT, 1: IN */
+	unsigned ep_is_in:1;
+
+	/**
+	 * EP speed.
+	 * One of the following values:
+	 *	- DWC_OTG_EP_SPEED_LOW
+	 *	- DWC_OTG_EP_SPEED_FULL
+	 *	- DWC_OTG_EP_SPEED_HIGH
+	 */
+	unsigned speed:2;
+#define DWC_OTG_EP_SPEED_LOW	0
+#define DWC_OTG_EP_SPEED_FULL	1
+#define DWC_OTG_EP_SPEED_HIGH	2
+
+	/**
+	 * Endpoint type.
+	 * One of the following values:
+	 *	- DWC_OTG_EP_TYPE_CONTROL: 0
+	 *	- DWC_OTG_EP_TYPE_ISOC: 1
+	 *	- DWC_OTG_EP_TYPE_BULK: 2
+	 *	- DWC_OTG_EP_TYPE_INTR: 3
+	 */
+	unsigned ep_type:2;
+
+	/** Max packet size in bytes */
+	unsigned max_packet:11;
+
+	/**
+	 * PID for initial transaction.
+	 * 0: DATA0,<br>
+	 * 1: DATA2,<br>
+	 * 2: DATA1,<br>
+	 * 3: MDATA (non-Control EP),
+	 *	  SETUP (Control EP)
+	 */
+	unsigned data_pid_start:2;
+#define DWC_OTG_HC_PID_DATA0 0
+#define DWC_OTG_HC_PID_DATA2 1
+#define DWC_OTG_HC_PID_DATA1 2
+#define DWC_OTG_HC_PID_MDATA 3
+#define DWC_OTG_HC_PID_SETUP 3
+
+	/** Number of periodic transactions per (micro)frame */
+	unsigned multi_count:2;
+
+	/** @name Transfer State */
+	/** @{ */
+
+	/** Pointer to the current transfer buffer position. */
+	uint8_t *xfer_buff;
+	/**
+	 * In Buffer DMA mode this buffer will be used
+	 * if xfer_buff is not DWORD aligned.
+	 */
+	dwc_dma_t align_buff;
+	/** Total number of bytes to transfer. */
+	uint32_t xfer_len;
+	/** Number of bytes transferred so far. */
+	uint32_t xfer_count;
+	/** Packet count at start of transfer.*/
+	uint16_t start_pkt_count;
+
+	/**
+	 * Flag to indicate whether the transfer has been started. Set to 1 if
+	 * it has been started, 0 otherwise.
+	 */
+	uint8_t xfer_started;
+
+	/**
+	 * Set to 1 to indicate that a PING request should be issued on this
+	 * channel. If 0, process normally.
+	 */
+	uint8_t do_ping;
+
+	/**
+	 * Set to 1 to indicate that the error count for this transaction is
+	 * non-zero. Set to 0 if the error count is 0.
+	 */
+	uint8_t error_state;
+
+	/**
+	 * Set to 1 to indicate that this channel should be halted the next
+	 * time a request is queued for the channel. This is necessary in
+	 * slave mode if no request queue space is available when an attempt
+	 * is made to halt the channel.
+	 */
+	uint8_t halt_on_queue;
+
+	/**
+	 * Set to 1 if the host channel has been halted, but the core is not
+	 * finished flushing queued requests. Otherwise 0.
+	 */
+	uint8_t halt_pending;
+
+	/**
+	 * Reason for halting the host channel.
+	 */
+	dwc_otg_halt_status_e halt_status;
+
+	/*
+	 * Split settings for the host channel
+	 */
+	uint8_t do_split;		   /**< Enable split for the channel */
+	uint8_t complete_split;	   /**< Enable complete split */
+	uint8_t hub_addr;		   /**< Address of high speed hub */
+
+	uint8_t port_addr;		   /**< Port of the low/full speed device */
+	/** Split transaction position
+	 * One of the following values:
+	 *	  - DWC_HCSPLIT_XACTPOS_MID
+	 *	  - DWC_HCSPLIT_XACTPOS_BEGIN
+	 *	  - DWC_HCSPLIT_XACTPOS_END
+	 *	  - DWC_HCSPLIT_XACTPOS_ALL */
+	uint8_t xact_pos;
+
+	/** Set when the host channel does a short read. */
+	uint8_t short_read;
+
+	/**
+	 * Number of requests issued for this channel since it was assigned to
+	 * the current transfer (not counting PINGs).
+	 */
+	uint8_t requests;
+
+	/**
+	 * Queue Head for the transfer being processed by this channel.
+	 */
+	struct dwc_otg_qh *qh;
+
+	/** @} */
+
+	/** Entry in list of host channels. */
+	 DWC_CIRCLEQ_ENTRY(dwc_hc) hc_list_entry;
+
+	/** @name Descriptor DMA support */
+	/** @{ */
+
+	/** Number of Transfer Descriptors */
+	uint16_t ntd;
+
+	/** Descriptor List DMA address */
+	dwc_dma_t desc_list_addr;
+
+	/** Scheduling micro-frame bitmap. */
+	uint8_t schinfo;
+
+	/** @} */
+} dwc_hc_t;
+
+/**
+ * The following parameters may be specified when starting the module. These
+ * parameters define how the DWC_otg controller should be configured.
+ */
+typedef struct dwc_otg_core_params {
+	int32_t opt;
+
+	/**
+	 * Specifies the OTG capabilities. The driver will automatically
+	 * detect the value for this parameter if none is specified.
+	 * 0 - HNP and SRP capable (default)
+	 * 1 - SRP Only capable
+	 * 2 - No HNP/SRP capable
+	 */
+	int32_t otg_cap;
+
+	/**
+	 * Specifies whether to use slave or DMA mode for accessing the data
+	 * FIFOs. The driver will automatically detect the value for this
+	 * parameter if none is specified.
+	 * 0 - Slave
+	 * 1 - DMA (default, if available)
+	 */
+	int32_t dma_enable;
+
+	/**
+	 * When DMA mode is enabled specifies whether to use address DMA or DMA Descritor mode for accessing the data
+	 * FIFOs in device mode. The driver will automatically detect the value for this
+	 * parameter if none is specified.
+	 * 0 - address DMA
+	 * 1 - DMA Descriptor(default, if available)
+	 */
+	int32_t dma_desc_enable;
+	/** The DMA Burst size (applicable only for External DMA
+	 * Mode). 1, 4, 8 16, 32, 64, 128, 256 (default 32)
+	 */
+	int32_t dma_burst_size;	/* Translate this to GAHBCFG values */
+
+	/**
+	 * Specifies the maximum speed of operation in host and device mode.
+	 * The actual speed depends on the speed of the attached device and
+	 * the value of phy_type. The actual speed depends on the speed of the
+	 * attached device.
+	 * 0 - High Speed (default)
+	 * 1 - Full Speed
+	 */
+	int32_t speed;
+	/** Specifies whether low power mode is supported when attached
+	 *	to a Full Speed or Low Speed device in host mode.
+	 * 0 - Don't support low power mode (default)
+	 * 1 - Support low power mode
+	 */
+	int32_t host_support_fs_ls_low_power;
+
+	/** Specifies the PHY clock rate in low power mode when connected to a
+	 * Low Speed device in host mode. This parameter is applicable only if
+	 * HOST_SUPPORT_FS_LS_LOW_POWER is enabled. If PHY_TYPE is set to FS
+	 * then defaults to 6 MHZ otherwise 48 MHZ.
+	 *
+	 * 0 - 48 MHz
+	 * 1 - 6 MHz
+	 */
+	int32_t host_ls_low_power_phy_clk;
+
+	/**
+	 * 0 - Use cC FIFO size parameters
+	 * 1 - Allow dynamic FIFO sizing (default)
+	 */
+	int32_t enable_dynamic_fifo;
+
+	/** Total number of 4-byte words in the data FIFO memory. This
+	 * memory includes the Rx FIFO, non-periodic Tx FIFO, and periodic
+	 * Tx FIFOs.
+	 * 32 to 32768 (default 8192)
+	 * Note: The total FIFO memory depth in the FPGA configuration is 8192.
+	 */
+	int32_t data_fifo_size;
+
+	/** Number of 4-byte words in the Rx FIFO in device mode when dynamic
+	 * FIFO sizing is enabled.
+	 * 16 to 32768 (default 1064)
+	 */
+	int32_t dev_rx_fifo_size;
+
+	/** Number of 4-byte words in the non-periodic Tx FIFO in device mode
+	 * when dynamic FIFO sizing is enabled.
+	 * 16 to 32768 (default 1024)
+	 */
+	int32_t dev_nperio_tx_fifo_size;
+
+	/** Number of 4-byte words in each of the periodic Tx FIFOs in device
+	 * mode when dynamic FIFO sizing is enabled.
+	 * 4 to 768 (default 256)
+	 */
+	uint32_t dev_perio_tx_fifo_size[MAX_PERIO_FIFOS];
+
+	/** Number of 4-byte words in the Rx FIFO in host mode when dynamic
+	 * FIFO sizing is enabled.
+	 * 16 to 32768 (default 1024)
+	 */
+	int32_t host_rx_fifo_size;
+
+	/** Number of 4-byte words in the non-periodic Tx FIFO in host mode
+	 * when Dynamic FIFO sizing is enabled in the core.
+	 * 16 to 32768 (default 1024)
+	 */
+	int32_t host_nperio_tx_fifo_size;
+
+	/** Number of 4-byte words in the host periodic Tx FIFO when dynamic
+	 * FIFO sizing is enabled.
+	 * 16 to 32768 (default 1024)
+	 */
+	int32_t host_perio_tx_fifo_size;
+
+	/** The maximum transfer size supported in bytes.
+	 * 2047 to 65,535  (default 65,535)
+	 */
+	int32_t max_transfer_size;
+
+	/** The maximum number of packets in a transfer.
+	 * 15 to 511  (default 511)
+	 */
+	int32_t max_packet_count;
+
+	/** The number of host channel registers to use.
+	 * 1 to 16 (default 12)
+	 * Note: The FPGA configuration supports a maximum of 12 host channels.
+	 */
+	int32_t host_channels;
+
+	/** The number of endpoints in addition to EP0 available for device
+	 * mode operations.
+	 * 1 to 15 (default 6 IN and OUT)
+	 * Note: The FPGA configuration supports a maximum of 6 IN and OUT
+	 * endpoints in addition to EP0.
+	 */
+	int32_t dev_endpoints;
+
+		/**
+		 * Specifies the type of PHY interface to use. By default, the driver
+		 * will automatically detect the phy_type.
+		 *
+		 * 0 - Full Speed PHY
+		 * 1 - UTMI+ (default)
+		 * 2 - ULPI
+		 */
+	int32_t phy_type;
+
+	/**
+	 * Specifies the UTMI+ Data Width. This parameter is
+	 * applicable for a PHY_TYPE of UTMI+ or ULPI. (For a ULPI
+	 * PHY_TYPE, this parameter indicates the data width between
+	 * the MAC and the ULPI Wrapper.) Also, this parameter is
+	 * applicable only if the OTG_HSPHY_WIDTH cC parameter was set
+	 * to "8 and 16 bits", meaning that the core has been
+	 * configured to work at either data path width.
+	 *
+	 * 8 or 16 bits (default 16)
+	 */
+	int32_t phy_utmi_width;
+
+	/**
+	 * Specifies whether the ULPI operates at double or single
+	 * data rate. This parameter is only applicable if PHY_TYPE is
+	 * ULPI.
+	 *
+	 * 0 - single data rate ULPI interface with 8 bit wide data
+	 * bus (default)
+	 * 1 - double data rate ULPI interface with 4 bit wide data
+	 * bus
+	 */
+	int32_t phy_ulpi_ddr;
+
+	/**
+	 * Specifies whether to use the internal or external supply to
+	 * drive the vbus with a ULPI phy.
+	 */
+	int32_t phy_ulpi_ext_vbus;
+
+	/**
+	 * Specifies whether to use the I2Cinterface for full speed PHY. This
+	 * parameter is only applicable if PHY_TYPE is FS.
+	 * 0 - No (default)
+	 * 1 - Yes
+	 */
+	int32_t i2c_enable;
+
+	int32_t ulpi_fs_ls;
+
+	int32_t ts_dline;
+
+	/**
+	 * Specifies whether dedicated transmit FIFOs are
+	 * enabled for non periodic IN endpoints in device mode
+	 * 0 - No
+	 * 1 - Yes
+	 */
+	int32_t en_multiple_tx_fifo;
+
+	/** Number of 4-byte words in each of the Tx FIFOs in device
+	 * mode when dynamic FIFO sizing is enabled.
+	 * 4 to 768 (default 256)
+	 */
+	uint32_t dev_tx_fifo_size[MAX_TX_FIFOS];
+
+	/** Thresholding enable flag-
+	 * bit 0 - enable non-ISO Tx thresholding
+	 * bit 1 - enable ISO Tx thresholding
+	 * bit 2 - enable Rx thresholding
+	 */
+	uint32_t thr_ctl;
+
+	/** Thresholding length for Tx
+	 *	FIFOs in 32 bit DWORDs
+	 */
+	uint32_t tx_thr_length;
+
+	/** Thresholding length for Rx
+	 *	FIFOs in 32 bit DWORDs
+	 */
+	uint32_t rx_thr_length;
+
+	/**
+	 * Specifies whether LPM (Link Power Management) support is enabled
+	 */
+	int32_t lpm_enable;
+
+	/** Per Transfer Interrupt
+	 *	mode enable flag
+	 * 1 - Enabled
+	 * 0 - Disabled
+	 */
+	int32_t pti_enable;
+
+	/** Multi Processor Interrupt
+	 *	mode enable flag
+	 * 1 - Enabled
+	 * 0 - Disabled
+	 */
+	int32_t mpi_enable;
+
+	/** IS_USB Capability
+	 * 1 - Enabled
+	 * 0 - Disabled
+	 */
+	int32_t ic_usb_cap;
+
+	/** AHB Threshold Ratio
+	 * 2'b00 AHB Threshold = 	MAC Threshold
+	 * 2'b01 AHB Threshold = 1/2 	MAC Threshold
+	 * 2'b10 AHB Threshold = 1/4	MAC Threshold
+	 * 2'b11 AHB Threshold = 1/8	MAC Threshold
+	 */
+	int32_t ahb_thr_ratio;
+
+	/** ADP Support
+	 * 1 - Enabled
+	 * 0 - Disabled
+	 */
+	int32_t adp_supp_enable;
+
+	/** HFIR Reload Control
+	 * 0 - The HFIR cannot be reloaded dynamically.
+	 * 1 - Allow dynamic reloading of the HFIR register during runtime.
+	 */
+	int32_t reload_ctl;
+
+	/** DCFG: Enable device Out NAK 
+	 * 0 - The core does not set NAK after Bulk Out transfer complete.
+	 * 1 - The core sets NAK after Bulk OUT transfer complete.
+	 */
+	int32_t dev_out_nak;
+
+	/** Core Power down mode
+	 * 0 - No Power Down is enabled
+	 * 1 - Reserved
+	 * 2 - Complete Power Down (Hibernation)
+	 */
+	int32_t power_down;
+
+	/** OTG revision supported
+	 * 0 - OTG 1.3 revision
+	 * 1 - OTG 2.0 revision
+	 */
+	int32_t otg_ver;
+
+} dwc_otg_core_params_t;
+
+#ifdef DEBUG
+struct dwc_otg_core_if;
+typedef struct hc_xfer_info {
+	struct dwc_otg_core_if *core_if;
+	dwc_hc_t *hc;
+} hc_xfer_info_t;
+#endif
+
+typedef struct ep_xfer_info {
+	struct dwc_otg_core_if *core_if;
+	dwc_ep_t *ep;
+	uint8_t state;
+} ep_xfer_info_t;
+/*
+ * Device States
+ */
+typedef enum dwc_otg_lx_state {
+	/** On state */
+	DWC_OTG_L0,
+	/** LPM sleep state*/
+	DWC_OTG_L1,
+	/** USB suspend state*/
+	DWC_OTG_L2,
+	/** Off state*/
+	DWC_OTG_L3
+} dwc_otg_lx_state_e;
+
+struct dwc_otg_global_regs_backup {
+	uint32_t gotgctl_local;
+	uint32_t gintmsk_local;
+	uint32_t gahbcfg_local;
+	uint32_t gusbcfg_local;
+	uint32_t grxfsiz_local;
+	uint32_t gnptxfsiz_local;
+#ifdef CONFIG_USB_DWC_OTG_LPM
+	uint32_t glpmcfg_local;
+#endif
+	uint32_t gi2cctl_local;
+	uint32_t hptxfsiz_local;
+	uint32_t pcgcctl_local;
+	uint32_t gdfifocfg_local;
+	uint32_t dtxfsiz_local[MAX_EPS_CHANNELS];
+	uint32_t gpwrdn_local;
+};
+
+struct dwc_otg_host_regs_backup {
+	uint32_t hcfg_local;
+	uint32_t haintmsk_local;
+	uint32_t hcintmsk_local[MAX_EPS_CHANNELS];
+	uint32_t hprt0_local;
+	uint32_t hfir_local;
+};
+
+struct dwc_otg_dev_regs_backup {
+	uint32_t dcfg;
+	uint32_t dctl;
+	uint32_t daintmsk;
+	uint32_t diepmsk;
+	uint32_t doepmsk;
+	uint32_t diepctl[MAX_EPS_CHANNELS];
+	uint32_t dieptsiz[MAX_EPS_CHANNELS];
+	uint32_t diepdma[MAX_EPS_CHANNELS];
+	uint32_t doepfn[MAX_EPS_CHANNELS];
+};
+/**
+ * The <code>dwc_otg_core_if</code> structure contains information needed to manage
+ * the DWC_otg controller acting in either host or device mode. It
+ * represents the programming view of the controller as a whole.
+ */
+struct dwc_otg_core_if {
+	/** Parameters that define how the core should be configured.*/
+	dwc_otg_core_params_t *core_params;
+
+	/** Core Global registers starting at offset 000h. */
+	dwc_otg_core_global_regs_t *core_global_regs;
+
+	/** Device-specific information */
+	dwc_otg_dev_if_t *dev_if;
+	/** Host-specific information */
+	dwc_otg_host_if_t *host_if;
+
+	/** Value from SNPSID register */
+	uint32_t snpsid;
+
+	/*
+	 * Set to 1 if the core PHY interface bits in USBCFG have been
+	 * initialized.
+	 */
+	uint8_t phy_init_done;
+
+	/*
+	 * SRP Success flag, set by srp success interrupt in FS I2C mode
+	 */
+	uint8_t srp_success;
+	uint8_t srp_timer_started;
+	/** Timer for SRP. If it expires before SRP is successful
+	 * clear the SRP. */
+	dwc_timer_t *srp_timer;
+
+#ifdef DWC_DEV_SRPCAP
+	/* This timer is needed to power on the hibernated host core if SRP is not
+	 * initiated on connected SRP capable device for limited period of time
+	 */
+	uint8_t pwron_timer_started;
+	dwc_timer_t *pwron_timer;
+#endif
+	/* Common configuration information */
+	/** Power and Clock Gating Control Register */
+	volatile uint32_t *pcgcctl;
+#define DWC_OTG_PCGCCTL_OFFSET 0xE00
+
+	/** Push/pop addresses for endpoints or host channels.*/
+	uint32_t *data_fifo[MAX_EPS_CHANNELS];
+#define DWC_OTG_DATA_FIFO_OFFSET 0x1000
+#define DWC_OTG_DATA_FIFO_SIZE 0x1000
+
+	/** Total RAM for FIFOs (Bytes) */
+	uint16_t total_fifo_size;
+	/** Size of Rx FIFO (Bytes) */
+	uint16_t rx_fifo_size;
+	/** Size of Non-periodic Tx FIFO (Bytes) */
+	uint16_t nperio_tx_fifo_size;
+
+	/** 1 if DMA is enabled, 0 otherwise. */
+	uint8_t dma_enable;
+
+	/** 1 if DMA descriptor is enabled, 0 otherwise. */
+	uint8_t dma_desc_enable;
+
+	/** 1 if PTI Enhancement mode is enabled, 0 otherwise. */
+	uint8_t pti_enh_enable;
+
+	/** 1 if MPI Enhancement mode is enabled, 0 otherwise. */
+	uint8_t multiproc_int_enable;
+
+	/** 1 if dedicated Tx FIFOs are enabled, 0 otherwise. */
+	uint8_t en_multiple_tx_fifo;
+
+	/** Set to 1 if multiple packets of a high-bandwidth transfer is in
+	 * process of being queued */
+	uint8_t queuing_high_bandwidth;
+
+	/** Hardware Configuration -- stored here for convenience.*/
+	hwcfg1_data_t hwcfg1;
+	hwcfg2_data_t hwcfg2;
+	hwcfg3_data_t hwcfg3;
+	hwcfg4_data_t hwcfg4;
+	fifosize_data_t hptxfsiz;
+
+	/** Host and Device Configuration -- stored here for convenience.*/
+	hcfg_data_t hcfg;
+	dcfg_data_t dcfg;
+
+	/** The operational State, during transations
+	 * (a_host>>a_peripherial and b_device=>b_host) this may not
+	 * match the core but allows the software to determine
+	 * transitions.
+	 */
+	uint8_t op_state;
+
+	/**
+	 * Set to 1 if the HCD needs to be restarted on a session request
+	 * interrupt. This is required if no connector ID status change has
+	 * occurred since the HCD was last disconnected.
+	 */
+	uint8_t restart_hcd_on_session_req;
+
+	/** HCD callbacks */
+	/** A-Device is a_host */
+#define A_HOST		(1)
+	/** A-Device is a_suspend */
+#define A_SUSPEND	(2)
+	/** A-Device is a_peripherial */
+#define A_PERIPHERAL	(3)
+	/** B-Device is operating as a Peripheral. */
+#define B_PERIPHERAL	(4)
+	/** B-Device is operating as a Host. */
+#define B_HOST		(5)
+
+	/** HCD callbacks */
+	struct dwc_otg_cil_callbacks *hcd_cb;
+	/** PCD callbacks */
+	struct dwc_otg_cil_callbacks *pcd_cb;
+
+	/** Device mode Periodic Tx FIFO Mask */
+	uint32_t p_tx_msk;
+	/** Device mode Periodic Tx FIFO Mask */
+	uint32_t tx_msk;
+
+	/** Workqueue object used for handling several interrupts */
+	dwc_workq_t *wq_otg;
+
+	/** Timer object used for handling "Wakeup Detected" Interrupt */
+	dwc_timer_t *wkp_timer;
+	/** This arrays used for debug purposes for DEV OUT NAK enhancement */
+	uint32_t start_doeptsiz_val[MAX_EPS_CHANNELS];
+	ep_xfer_info_t ep_xfer_info[MAX_EPS_CHANNELS];
+	dwc_timer_t *ep_xfer_timer[MAX_EPS_CHANNELS];
+#ifdef DEBUG
+	uint32_t start_hcchar_val[MAX_EPS_CHANNELS];
+
+	hc_xfer_info_t hc_xfer_info[MAX_EPS_CHANNELS];
+	dwc_timer_t *hc_xfer_timer[MAX_EPS_CHANNELS];
+
+	uint32_t hfnum_7_samples;
+	uint64_t hfnum_7_frrem_accum;
+	uint32_t hfnum_0_samples;
+	uint64_t hfnum_0_frrem_accum;
+	uint32_t hfnum_other_samples;
+	uint64_t hfnum_other_frrem_accum;
+#endif
+
+#ifdef DWC_UTE_CFI
+	uint16_t pwron_rxfsiz;
+	uint16_t pwron_gnptxfsiz;
+	uint16_t pwron_txfsiz[15];
+
+	uint16_t init_rxfsiz;
+	uint16_t init_gnptxfsiz;
+	uint16_t init_txfsiz[15];
+#endif
+
+	/** Lx state of device */
+	dwc_otg_lx_state_e lx_state;
+
+	/** Saved Core Global registers */
+	struct dwc_otg_global_regs_backup *gr_backup;
+	/** Saved Host registers */
+	struct dwc_otg_host_regs_backup *hr_backup;
+	/** Saved Device registers */
+	struct dwc_otg_dev_regs_backup *dr_backup;
+
+	/** Power Down Enable */
+	uint32_t power_down;
+
+	/** ADP support Enable */
+	uint32_t adp_enable;
+
+	/** ADP structure object */
+	dwc_otg_adp_t adp;
+
+	/** hibernation/suspend flag */
+	int hibernation_suspend;
+
+	/** OTG revision supported */
+	uint32_t otg_ver;
+
+	/** OTG status flag used for HNP polling */
+	uint8_t otg_sts;
+
+	/** Pointer to either hcd->lock or pcd->lock */
+	dwc_spinlock_t *lock;
+
+	/** Start predict NextEP based on Learning Queue if equal 1,
+	 * also used as counter of disabled NP IN EP's */
+	uint8_t start_predict;
+
+	/** NextEp sequence, including EP0: nextep_seq[] = EP if non-periodic and 
+	 * active, 0xff otherwise */
+	uint8_t nextep_seq[MAX_EPS_CHANNELS];
+
+	/** Index of fisrt EP in nextep_seq array which should be re-enabled **/
+	uint8_t first_in_nextep_seq;
+
+};
+
+#ifdef DEBUG
+/*
+ * This function is called when transfer is timed out.
+ */
+extern void hc_xfer_timeout(void *ptr);
+#endif
+
+/*
+ * This function is called when transfer is timed out on endpoint.
+ */
+extern void ep_xfer_timeout(void *ptr);
+
+/*
+ * The following functions are functions for works
+ * using during handling some interrupts
+ */
+extern void w_conn_id_status_change(void *p);
+
+extern void w_wakeup_detected(void *p);
+
+/** Saves global register values into system memory. */
+extern int dwc_otg_save_global_regs(dwc_otg_core_if_t * core_if);
+/** Saves device register values into system memory. */
+extern int dwc_otg_save_dev_regs(dwc_otg_core_if_t * core_if);
+/** Saves host register values into system memory. */
+extern int dwc_otg_save_host_regs(dwc_otg_core_if_t * core_if);
+/** Restore global register values. */
+extern int dwc_otg_restore_global_regs(dwc_otg_core_if_t * core_if);
+/** Restore host register values. */
+extern int dwc_otg_restore_host_regs(dwc_otg_core_if_t * core_if, int reset);
+/** Restore device register values. */
+extern int dwc_otg_restore_dev_regs(dwc_otg_core_if_t * core_if,
+				    int rem_wakeup);
+extern int restore_lpm_i2c_regs(dwc_otg_core_if_t * core_if);
+extern int restore_essential_regs(dwc_otg_core_if_t * core_if, int rmode,
+				  int is_host);
+
+extern int dwc_otg_host_hibernation_restore(dwc_otg_core_if_t * core_if,
+					    int restore_mode, int reset);
+extern int dwc_otg_device_hibernation_restore(dwc_otg_core_if_t * core_if,
+					      int rem_wakeup, int reset);
+
+/*
+ * The following functions support initialization of the CIL driver component
+ * and the DWC_otg controller.
+ */
+extern void dwc_otg_core_host_init(dwc_otg_core_if_t * _core_if);
+extern void dwc_otg_core_dev_init(dwc_otg_core_if_t * _core_if);
+
+/** @name Device CIL Functions
+ * The following functions support managing the DWC_otg controller in device
+ * mode.
+ */
+/**@{*/
+extern void dwc_otg_wakeup(dwc_otg_core_if_t * _core_if);
+extern void dwc_otg_read_setup_packet(dwc_otg_core_if_t * _core_if,
+				      uint32_t * _dest);
+extern uint32_t dwc_otg_get_frame_number(dwc_otg_core_if_t * _core_if);
+extern void dwc_otg_ep0_activate(dwc_otg_core_if_t * _core_if, dwc_ep_t * _ep);
+extern void dwc_otg_ep_activate(dwc_otg_core_if_t * _core_if, dwc_ep_t * _ep);
+extern void dwc_otg_ep_deactivate(dwc_otg_core_if_t * _core_if, dwc_ep_t * _ep);
+extern void dwc_otg_ep_start_transfer(dwc_otg_core_if_t * _core_if,
+				      dwc_ep_t * _ep);
+extern void dwc_otg_ep_start_zl_transfer(dwc_otg_core_if_t * _core_if,
+					 dwc_ep_t * _ep);
+extern void dwc_otg_ep0_start_transfer(dwc_otg_core_if_t * _core_if,
+				       dwc_ep_t * _ep);
+extern void dwc_otg_ep0_continue_transfer(dwc_otg_core_if_t * _core_if,
+					  dwc_ep_t * _ep);
+extern void dwc_otg_ep_write_packet(dwc_otg_core_if_t * _core_if,
+				    dwc_ep_t * _ep, int _dma);
+extern void dwc_otg_ep_set_stall(dwc_otg_core_if_t * _core_if, dwc_ep_t * _ep);
+extern void dwc_otg_ep_clear_stall(dwc_otg_core_if_t * _core_if,
+				   dwc_ep_t * _ep);
+extern void dwc_otg_enable_device_interrupts(dwc_otg_core_if_t * _core_if);
+
+#ifdef DWC_EN_ISOC
+extern void dwc_otg_iso_ep_start_frm_transfer(dwc_otg_core_if_t * core_if,
+					      dwc_ep_t * ep);
+extern void dwc_otg_iso_ep_start_buf_transfer(dwc_otg_core_if_t * core_if,
+					      dwc_ep_t * ep);
+#endif /* DWC_EN_ISOC */
+/**@}*/
+
+/** @name Host CIL Functions
+ * The following functions support managing the DWC_otg controller in host
+ * mode.
+ */
+/**@{*/
+extern void dwc_otg_hc_init(dwc_otg_core_if_t * _core_if, dwc_hc_t * _hc);
+extern void dwc_otg_hc_halt(dwc_otg_core_if_t * _core_if,
+			    dwc_hc_t * _hc, dwc_otg_halt_status_e _halt_status);
+extern void dwc_otg_hc_cleanup(dwc_otg_core_if_t * _core_if, dwc_hc_t * _hc);
+extern void dwc_otg_hc_start_transfer(dwc_otg_core_if_t * _core_if,
+				      dwc_hc_t * _hc);
+extern int dwc_otg_hc_continue_transfer(dwc_otg_core_if_t * _core_if,
+					dwc_hc_t * _hc);
+extern void dwc_otg_hc_do_ping(dwc_otg_core_if_t * _core_if, dwc_hc_t * _hc);
+extern void dwc_otg_hc_write_packet(dwc_otg_core_if_t * _core_if,
+				    dwc_hc_t * _hc);
+extern void dwc_otg_enable_host_interrupts(dwc_otg_core_if_t * _core_if);
+extern void dwc_otg_disable_host_interrupts(dwc_otg_core_if_t * _core_if);
+
+extern void dwc_otg_hc_start_transfer_ddma(dwc_otg_core_if_t * core_if,
+					   dwc_hc_t * hc);
+
+extern uint32_t calc_frame_interval(dwc_otg_core_if_t * core_if);
+
+/* Macro used to clear one channel interrupt */
+#define clear_hc_int(_hc_regs_, _intr_) \
+do { \
+	hcint_data_t hcint_clear = {.d32 = 0}; \
+	hcint_clear.b._intr_ = 1; \
+	DWC_WRITE_REG32(&(_hc_regs_)->hcint, hcint_clear.d32); \
+} while (0)
+
+/*
+ * Macro used to disable one channel interrupt. Channel interrupts are
+ * disabled when the channel is halted or released by the interrupt handler.
+ * There is no need to handle further interrupts of that type until the
+ * channel is re-assigned. In fact, subsequent handling may cause crashes
+ * because the channel structures are cleaned up when the channel is released.
+ */
+#define disable_hc_int(_hc_regs_, _intr_) \
+do { \
+	hcintmsk_data_t hcintmsk = {.d32 = 0}; \
+	hcintmsk.b._intr_ = 1; \
+	DWC_MODIFY_REG32(&(_hc_regs_)->hcintmsk, hcintmsk.d32, 0); \
+} while (0)
+
+/**
+ * This function Reads HPRT0 in preparation to modify. It keeps the
+ * WC bits 0 so that if they are read as 1, they won't clear when you
+ * write it back
+ */
+static inline uint32_t dwc_otg_read_hprt0(dwc_otg_core_if_t * _core_if)
+{
+	hprt0_data_t hprt0;
+	hprt0.d32 = DWC_READ_REG32(_core_if->host_if->hprt0);
+	hprt0.b.prtena = 0;
+	hprt0.b.prtconndet = 0;
+	hprt0.b.prtenchng = 0;
+	hprt0.b.prtovrcurrchng = 0;
+	return hprt0.d32;
+}
+
+/**@}*/
+
+/** @name Common CIL Functions
+ * The following functions support managing the DWC_otg controller in either
+ * device or host mode.
+ */
+/**@{*/
+
+extern void dwc_otg_read_packet(dwc_otg_core_if_t * core_if,
+				uint8_t * dest, uint16_t bytes);
+
+extern void dwc_otg_flush_tx_fifo(dwc_otg_core_if_t * _core_if, const int _num);
+extern void dwc_otg_flush_rx_fifo(dwc_otg_core_if_t * _core_if);
+extern void dwc_otg_core_reset(dwc_otg_core_if_t * _core_if);
+
+/**
+ * This function returns the Core Interrupt register.
+ */
+static inline uint32_t dwc_otg_read_core_intr(dwc_otg_core_if_t * core_if)
+{
+	return (DWC_READ_REG32(&core_if->core_global_regs->gintsts) &
+		DWC_READ_REG32(&core_if->core_global_regs->gintmsk));
+}
+
+/**
+ * This function returns the OTG Interrupt register.
+ */
+static inline uint32_t dwc_otg_read_otg_intr(dwc_otg_core_if_t * core_if)
+{
+	return (DWC_READ_REG32(&core_if->core_global_regs->gotgint));
+}
+
+/**
+ * This function reads the Device All Endpoints Interrupt register and
+ * returns the IN endpoint interrupt bits.
+ */
+static inline uint32_t dwc_otg_read_dev_all_in_ep_intr(dwc_otg_core_if_t *
+						       core_if)
+{
+
+	uint32_t v;
+
+	if (core_if->multiproc_int_enable) {
+		v = DWC_READ_REG32(&core_if->dev_if->
+				   dev_global_regs->deachint) &
+		    DWC_READ_REG32(&core_if->
+				   dev_if->dev_global_regs->deachintmsk);
+	} else {
+		v = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->daint) &
+		    DWC_READ_REG32(&core_if->dev_if->dev_global_regs->daintmsk);
+	}
+	return (v & 0xffff);
+}
+
+/**
+ * This function reads the Device All Endpoints Interrupt register and
+ * returns the OUT endpoint interrupt bits.
+ */
+static inline uint32_t dwc_otg_read_dev_all_out_ep_intr(dwc_otg_core_if_t *
+							core_if)
+{
+	uint32_t v;
+
+	if (core_if->multiproc_int_enable) {
+		v = DWC_READ_REG32(&core_if->dev_if->
+				   dev_global_regs->deachint) &
+		    DWC_READ_REG32(&core_if->
+				   dev_if->dev_global_regs->deachintmsk);
+	} else {
+		v = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->daint) &
+		    DWC_READ_REG32(&core_if->dev_if->dev_global_regs->daintmsk);
+	}
+
+	return ((v & 0xffff0000) >> 16);
+}
+
+/**
+ * This function returns the Device IN EP Interrupt register
+ */
+static inline uint32_t dwc_otg_read_dev_in_ep_intr(dwc_otg_core_if_t * core_if,
+						   dwc_ep_t * ep)
+{
+	dwc_otg_dev_if_t *dev_if = core_if->dev_if;
+	uint32_t v, msk, emp;
+
+	if (core_if->multiproc_int_enable) {
+		msk =
+		    DWC_READ_REG32(&dev_if->
+				   dev_global_regs->diepeachintmsk[ep->num]);
+		emp =
+		    DWC_READ_REG32(&dev_if->
+				   dev_global_regs->dtknqr4_fifoemptymsk);
+		msk |= ((emp >> ep->num) & 0x1) << 7;
+		v = DWC_READ_REG32(&dev_if->in_ep_regs[ep->num]->diepint) & msk;
+	} else {
+		msk = DWC_READ_REG32(&dev_if->dev_global_regs->diepmsk);
+		emp =
+		    DWC_READ_REG32(&dev_if->
+				   dev_global_regs->dtknqr4_fifoemptymsk);
+		msk |= ((emp >> ep->num) & 0x1) << 7;
+		v = DWC_READ_REG32(&dev_if->in_ep_regs[ep->num]->diepint) & msk;
+	}
+
+	return v;
+}
+
+/**
+ * This function returns the Device OUT EP Interrupt register
+ */
+static inline uint32_t dwc_otg_read_dev_out_ep_intr(dwc_otg_core_if_t *
+						    _core_if, dwc_ep_t * _ep)
+{
+	dwc_otg_dev_if_t *dev_if = _core_if->dev_if;
+	uint32_t v;
+	doepmsk_data_t msk = {.d32 = 0 };
+
+	if (_core_if->multiproc_int_enable) {
+		msk.d32 =
+		    DWC_READ_REG32(&dev_if->
+				   dev_global_regs->doepeachintmsk[_ep->num]);
+		if (_core_if->pti_enh_enable) {
+			msk.b.pktdrpsts = 1;
+		}
+		v = DWC_READ_REG32(&dev_if->
+				   out_ep_regs[_ep->num]->doepint) & msk.d32;
+	} else {
+		msk.d32 = DWC_READ_REG32(&dev_if->dev_global_regs->doepmsk);
+		if (_core_if->pti_enh_enable) {
+			msk.b.pktdrpsts = 1;
+		}
+		v = DWC_READ_REG32(&dev_if->
+				   out_ep_regs[_ep->num]->doepint) & msk.d32;
+	}
+	return v;
+}
+
+/**
+ * This function returns the Host All Channel Interrupt register
+ */
+static inline uint32_t dwc_otg_read_host_all_channels_intr(dwc_otg_core_if_t *
+							   _core_if)
+{
+	return (DWC_READ_REG32(&_core_if->host_if->host_global_regs->haint));
+}
+
+static inline uint32_t dwc_otg_read_host_channel_intr(dwc_otg_core_if_t *
+						      _core_if, dwc_hc_t * _hc)
+{
+	return (DWC_READ_REG32
+		(&_core_if->host_if->hc_regs[_hc->hc_num]->hcint));
+}
+
+/**
+ * This function returns the mode of the operation, host or device.
+ *
+ * @return 0 - Device Mode, 1 - Host Mode
+ */
+static inline uint32_t dwc_otg_mode(dwc_otg_core_if_t * _core_if)
+{
+	return (DWC_READ_REG32(&_core_if->core_global_regs->gintsts) & 0x1);
+}
+
+/**@}*/
+
+/**
+ * DWC_otg CIL callback structure. This structure allows the HCD and
+ * PCD to register functions used for starting and stopping the PCD
+ * and HCD for role change on for a DRD.
+ */
+typedef struct dwc_otg_cil_callbacks {
+	/** Start function for role change */
+	int (*start) (void *_p);
+	/** Stop Function for role change */
+	int (*stop) (void *_p);
+	/** Disconnect Function for role change */
+	int (*disconnect) (void *_p);
+	/** Resume/Remote wakeup Function */
+	int (*resume_wakeup) (void *_p);
+	/** Suspend function */
+	int (*suspend) (void *_p);
+	/** Session Start (SRP) */
+	int (*session_start) (void *_p);
+#ifdef CONFIG_USB_DWC_OTG_LPM
+	/** Sleep (switch to L0 state) */
+	int (*sleep) (void *_p);
+#endif
+	/** Pointer passed to start() and stop() */
+	void *p;
+} dwc_otg_cil_callbacks_t;
+
+extern void dwc_otg_cil_register_pcd_callbacks(dwc_otg_core_if_t * _core_if,
+					       dwc_otg_cil_callbacks_t * _cb,
+					       void *_p);
+extern void dwc_otg_cil_register_hcd_callbacks(dwc_otg_core_if_t * _core_if,
+					       dwc_otg_cil_callbacks_t * _cb,
+					       void *_p);
+
+void dwc_otg_initiate_srp(dwc_otg_core_if_t * core_if);
+
+//////////////////////////////////////////////////////////////////////
+/** Start the HCD.  Helper function for using the HCD callbacks.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ */
+static inline void cil_hcd_start(dwc_otg_core_if_t * core_if)
+{
+	if (core_if->hcd_cb && core_if->hcd_cb->start) {
+		core_if->hcd_cb->start(core_if->hcd_cb->p);
+	}
+}
+
+/** Stop the HCD.  Helper function for using the HCD callbacks.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ */
+static inline void cil_hcd_stop(dwc_otg_core_if_t * core_if)
+{
+	if (core_if->hcd_cb && core_if->hcd_cb->stop) {
+		core_if->hcd_cb->stop(core_if->hcd_cb->p);
+	}
+}
+
+/** Disconnect the HCD.  Helper function for using the HCD callbacks.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ */
+static inline void cil_hcd_disconnect(dwc_otg_core_if_t * core_if)
+{
+	if (core_if->hcd_cb && core_if->hcd_cb->disconnect) {
+		core_if->hcd_cb->disconnect(core_if->hcd_cb->p);
+	}
+}
+
+/** Inform the HCD the a New Session has begun.  Helper function for
+ * using the HCD callbacks.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ */
+static inline void cil_hcd_session_start(dwc_otg_core_if_t * core_if)
+{
+	if (core_if->hcd_cb && core_if->hcd_cb->session_start) {
+		core_if->hcd_cb->session_start(core_if->hcd_cb->p);
+	}
+}
+
+#ifdef CONFIG_USB_DWC_OTG_LPM
+/**
+ * Inform the HCD about LPM sleep.
+ * Helper function for using the HCD callbacks.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ */
+static inline void cil_hcd_sleep(dwc_otg_core_if_t * core_if)
+{
+	if (core_if->hcd_cb && core_if->hcd_cb->sleep) {
+		core_if->hcd_cb->sleep(core_if->hcd_cb->p);
+	}
+}
+#endif
+
+/** Resume the HCD.  Helper function for using the HCD callbacks.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ */
+static inline void cil_hcd_resume(dwc_otg_core_if_t * core_if)
+{
+	if (core_if->hcd_cb && core_if->hcd_cb->resume_wakeup) {
+		core_if->hcd_cb->resume_wakeup(core_if->hcd_cb->p);
+	}
+}
+
+/** Start the PCD.  Helper function for using the PCD callbacks.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ */
+static inline void cil_pcd_start(dwc_otg_core_if_t * core_if)
+{
+	if (core_if->pcd_cb && core_if->pcd_cb->start) {
+		core_if->pcd_cb->start(core_if->pcd_cb->p);
+	}
+}
+
+/** Stop the PCD.  Helper function for using the PCD callbacks.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ */
+static inline void cil_pcd_stop(dwc_otg_core_if_t * core_if)
+{
+	if (core_if->pcd_cb && core_if->pcd_cb->stop) {
+		core_if->pcd_cb->stop(core_if->pcd_cb->p);
+	}
+}
+
+/** Suspend the PCD.  Helper function for using the PCD callbacks.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ */
+static inline void cil_pcd_suspend(dwc_otg_core_if_t * core_if)
+{
+	if (core_if->pcd_cb && core_if->pcd_cb->suspend) {
+		core_if->pcd_cb->suspend(core_if->pcd_cb->p);
+	}
+}
+
+/** Resume the PCD.  Helper function for using the PCD callbacks.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ */
+static inline void cil_pcd_resume(dwc_otg_core_if_t * core_if)
+{
+	if (core_if->pcd_cb && core_if->pcd_cb->resume_wakeup) {
+		core_if->pcd_cb->resume_wakeup(core_if->pcd_cb->p);
+	}
+}
+
+//////////////////////////////////////////////////////////////////////
+
+#endif
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_cil_intr.c linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_cil_intr.c
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_cil_intr.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_cil_intr.c	2017-09-23 03:42:50.210674477 +0800
@@ -0,0 +1,1339 @@
+/* ==========================================================================
+ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_cil_intr.c $
+ * $Revision: #29 $
+ * $Date: 2011/05/17 $
+ * $Change: 1774110 $
+ *
+ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+ * otherwise expressly agreed to in writing between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product under
+ * any End User Software License Agreement or Agreement for Licensed Product
+ * with Synopsys or any supplement thereto. You are permitted to use and
+ * redistribute this Software in source and binary forms, with or without
+ * modification, provided that redistributions of source code must retain this
+ * notice. You may not view, use, disclose, copy or distribute this file or
+ * any information contained herein except pursuant to this license grant from
+ * Synopsys. If you do not agree with this notice, including the disclaimer
+ * below, then you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================== */
+
+/** @file
+ *
+ * The Core Interface Layer provides basic services for accessing and
+ * managing the DWC_otg hardware. These services are used by both the
+ * Host Controller Driver and the Peripheral Controller Driver.
+ *
+ * This file contains the Common Interrupt handlers.
+ */
+#include "dwc_os.h"
+#include "dwc_otg_regs.h"
+#include "dwc_otg_cil.h"
+
+#ifdef DEBUG
+inline const char *op_state_str(dwc_otg_core_if_t * core_if)
+{
+	return (core_if->op_state == A_HOST ? "a_host" :
+		(core_if->op_state == A_SUSPEND ? "a_suspend" :
+		 (core_if->op_state == A_PERIPHERAL ? "a_peripheral" :
+		  (core_if->op_state == B_PERIPHERAL ? "b_peripheral" :
+		   (core_if->op_state == B_HOST ? "b_host" : "unknown")))));
+}
+#endif
+
+/** This function will log a debug message
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ */
+int32_t dwc_otg_handle_mode_mismatch_intr(dwc_otg_core_if_t * core_if)
+{
+	gintsts_data_t gintsts;
+	DWC_WARN("Mode Mismatch Interrupt: currently in %s mode\n",
+		 dwc_otg_mode(core_if) ? "Host" : "Device");
+
+	/* Clear interrupt */
+	gintsts.d32 = 0;
+	gintsts.b.modemismatch = 1;
+	DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, gintsts.d32);
+	return 1;
+}
+
+/**
+ * This function handles the OTG Interrupts. It reads the OTG
+ * Interrupt Register (GOTGINT) to determine what interrupt has
+ * occurred.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ */
+int32_t dwc_otg_handle_otg_intr(dwc_otg_core_if_t * core_if)
+{
+	dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs;
+	gotgint_data_t gotgint;
+	gotgctl_data_t gotgctl;
+	gintmsk_data_t gintmsk;
+	gpwrdn_data_t gpwrdn;
+
+	gotgint.d32 = DWC_READ_REG32(&global_regs->gotgint);
+	gotgctl.d32 = DWC_READ_REG32(&global_regs->gotgctl);
+	DWC_DEBUGPL(DBG_CIL, "++OTG Interrupt gotgint=%0x [%s]\n", gotgint.d32,
+		    op_state_str(core_if));
+
+	if (gotgint.b.sesenddet) {
+		DWC_DEBUGPL(DBG_ANY, " ++OTG Interrupt: "
+			    "Session End Detected++ (%s)\n",
+			    op_state_str(core_if));
+		gotgctl.d32 = DWC_READ_REG32(&global_regs->gotgctl);
+
+		if (core_if->op_state == B_HOST) {
+			cil_pcd_start(core_if);
+			core_if->op_state = B_PERIPHERAL;
+		} else {
+			/* If not B_HOST and Device HNP still set. HNP
+			 * Did not succeed!*/
+			if (gotgctl.b.devhnpen) {
+				DWC_DEBUGPL(DBG_ANY, "Session End Detected\n");
+				__DWC_ERROR("Device Not Connected/Responding!\n");
+			}
+
+			/* If Session End Detected the B-Cable has
+			 * been disconnected. */
+			/* Reset PCD and Gadget driver to a
+			 * clean state. */
+			core_if->lx_state = DWC_OTG_L0;
+			DWC_SPINUNLOCK(core_if->lock);
+			cil_pcd_stop(core_if);
+			DWC_SPINLOCK(core_if->lock);
+
+			if (core_if->adp_enable) {
+				if (core_if->power_down == 2) {
+					gpwrdn.d32 = 0;
+					gpwrdn.b.pwrdnswtch = 1;
+					DWC_MODIFY_REG32(&core_if->
+							 core_global_regs->
+							 gpwrdn, gpwrdn.d32, 0);
+				}
+
+				gpwrdn.d32 = 0;
+				gpwrdn.b.pmuactv = 1;
+				DWC_MODIFY_REG32(&core_if->core_global_regs->
+						 gpwrdn, 0, gpwrdn.d32);
+
+				dwc_otg_adp_sense_start(core_if);
+			}
+		}
+
+		gotgctl.d32 = 0;
+		gotgctl.b.devhnpen = 1;
+		DWC_MODIFY_REG32(&global_regs->gotgctl, gotgctl.d32, 0);
+	}
+	if (gotgint.b.sesreqsucstschng) {
+		DWC_DEBUGPL(DBG_ANY, " ++OTG Interrupt: "
+			    "Session Reqeust Success Status Change++\n");
+		gotgctl.d32 = DWC_READ_REG32(&global_regs->gotgctl);
+		if (gotgctl.b.sesreqscs) {
+
+			if ((core_if->core_params->phy_type ==
+			     DWC_PHY_TYPE_PARAM_FS) && (core_if->core_params->i2c_enable)) {
+				core_if->srp_success = 1;
+			} else {
+				DWC_SPINUNLOCK(core_if->lock);
+				cil_pcd_resume(core_if);
+				DWC_SPINLOCK(core_if->lock);
+				/* Clear Session Request */
+				gotgctl.d32 = 0;
+				gotgctl.b.sesreq = 1;
+				DWC_MODIFY_REG32(&global_regs->gotgctl,
+						 gotgctl.d32, 0);
+			}
+		}
+	}
+	if (gotgint.b.hstnegsucstschng) {
+		/* Print statements during the HNP interrupt handling
+		 * can cause it to fail.*/
+		gotgctl.d32 = DWC_READ_REG32(&global_regs->gotgctl);
+		if (gotgctl.b.hstnegscs) {
+			if (dwc_otg_is_host_mode(core_if)) {
+				core_if->op_state = B_HOST;
+				/*
+				 * Need to disable SOF interrupt immediately.
+				 * When switching from device to host, the PCD
+				 * interrupt handler won't handle the
+				 * interrupt if host mode is already set. The
+				 * HCD interrupt handler won't get called if
+				 * the HCD state is HALT. This means that the
+				 * interrupt does not get handled and Linux
+				 * complains loudly.
+				 */
+				gintmsk.d32 = 0;
+				gintmsk.b.sofintr = 1;
+				DWC_MODIFY_REG32(&global_regs->gintmsk,
+						 gintmsk.d32, 0);
+				/* Call callback function with spin lock released */
+				DWC_SPINUNLOCK(core_if->lock);
+				cil_pcd_stop(core_if);
+				/*
+				 * Initialize the Core for Host mode.
+				 */
+				cil_hcd_start(core_if);
+				DWC_SPINLOCK(core_if->lock);
+				core_if->op_state = B_HOST;
+			}
+		} else {
+			gotgctl.d32 = 0;
+			gotgctl.b.hnpreq = 1;
+			gotgctl.b.devhnpen = 1;
+			DWC_MODIFY_REG32(&global_regs->gotgctl, gotgctl.d32, 0);
+			DWC_DEBUGPL(DBG_ANY, "HNP Failed\n");
+			__DWC_ERROR("Device Not Connected/Responding\n");
+		}
+	}
+	if (gotgint.b.hstnegdet) {
+		/* The disconnect interrupt is set at the same time as
+		 * Host Negotiation Detected.  During the mode
+		 * switch all interrupts are cleared so the disconnect
+		 * interrupt handler will not get executed.
+		 */
+		DWC_DEBUGPL(DBG_ANY, " ++OTG Interrupt: "
+			    "Host Negotiation Detected++ (%s)\n",
+			    (dwc_otg_is_host_mode(core_if) ? "Host" :
+			     "Device"));
+		if (dwc_otg_is_device_mode(core_if)) {
+			DWC_DEBUGPL(DBG_ANY, "a_suspend->a_peripheral (%d)\n",
+				    core_if->op_state);
+			DWC_SPINUNLOCK(core_if->lock);
+			cil_hcd_disconnect(core_if);
+			cil_pcd_start(core_if);
+			DWC_SPINLOCK(core_if->lock);
+			core_if->op_state = A_PERIPHERAL;
+		} else {
+			/*
+			 * Need to disable SOF interrupt immediately. When
+			 * switching from device to host, the PCD interrupt
+			 * handler won't handle the interrupt if host mode is
+			 * already set. The HCD interrupt handler won't get
+			 * called if the HCD state is HALT. This means that
+			 * the interrupt does not get handled and Linux
+			 * complains loudly.
+			 */
+			gintmsk.d32 = 0;
+			gintmsk.b.sofintr = 1;
+			DWC_MODIFY_REG32(&global_regs->gintmsk, gintmsk.d32, 0);
+			DWC_SPINUNLOCK(core_if->lock);
+			cil_pcd_stop(core_if);
+			cil_hcd_start(core_if);
+			DWC_SPINLOCK(core_if->lock);
+			core_if->op_state = A_HOST;
+		}
+	}
+	if (gotgint.b.adevtoutchng) {
+		DWC_DEBUGPL(DBG_ANY, " ++OTG Interrupt: "
+			    "A-Device Timeout Change++\n");
+	}
+	if (gotgint.b.debdone) {
+		DWC_DEBUGPL(DBG_ANY, " ++OTG Interrupt: " "Debounce Done++\n");
+	}
+
+	/* Clear GOTGINT */
+	DWC_WRITE_REG32(&core_if->core_global_regs->gotgint, gotgint.d32);
+
+	return 1;
+}
+
+void w_conn_id_status_change(void *p)
+{
+	dwc_otg_core_if_t *core_if = p;
+	uint32_t count = 0;
+	gotgctl_data_t gotgctl = {.d32 = 0 };
+
+	gotgctl.d32 = DWC_READ_REG32(&core_if->core_global_regs->gotgctl);
+	DWC_DEBUGPL(DBG_CIL, "gotgctl=%0x\n", gotgctl.d32);
+	DWC_DEBUGPL(DBG_CIL, "gotgctl.b.conidsts=%d\n", gotgctl.b.conidsts);
+
+	/* B-Device connector (Device Mode) */
+	if (gotgctl.b.conidsts) {
+		/* Wait for switch to device mode. */
+		while (!dwc_otg_is_device_mode(core_if)) {
+			DWC_PRINTF("Waiting for Peripheral Mode, Mode=%s\n",
+				   (dwc_otg_is_host_mode(core_if) ? "Host" :
+				    "Peripheral"));
+			dwc_mdelay(100);
+			if (++count > 10000)
+				break;
+		}
+		DWC_ASSERT(++count < 10000,
+			   "Connection id status change timed out");
+		core_if->op_state = B_PERIPHERAL;
+		dwc_otg_core_init(core_if);
+		dwc_otg_enable_global_interrupts(core_if);
+		cil_pcd_start(core_if);
+	} else {
+		/* A-Device connector (Host Mode) */
+		while (!dwc_otg_is_host_mode(core_if)) {
+			DWC_PRINTF("Waiting for Host Mode, Mode=%s\n",
+				   (dwc_otg_is_host_mode(core_if) ? "Host" :
+				    "Peripheral"));
+			dwc_mdelay(100);
+			if (++count > 10000)
+				break;
+		}
+		DWC_ASSERT(++count < 10000,
+			   "Connection id status change timed out");
+		core_if->op_state = A_HOST;
+		/*
+		 * Initialize the Core for Host mode.
+		 */
+		dwc_otg_core_init(core_if);
+		dwc_otg_enable_global_interrupts(core_if);
+		cil_hcd_start(core_if);
+	}
+}
+
+/**
+ * This function handles the Connector ID Status Change Interrupt.  It
+ * reads the OTG Interrupt Register (GOTCTL) to determine whether this
+ * is a Device to Host Mode transition or a Host Mode to Device
+ * Transition. 
+ *
+ * This only occurs when the cable is connected/removed from the PHY
+ * connector.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ */
+int32_t dwc_otg_handle_conn_id_status_change_intr(dwc_otg_core_if_t * core_if)
+{
+
+	/*
+	 * Need to disable SOF interrupt immediately. If switching from device
+	 * to host, the PCD interrupt handler won't handle the interrupt if
+	 * host mode is already set. The HCD interrupt handler won't get
+	 * called if the HCD state is HALT. This means that the interrupt does
+	 * not get handled and Linux complains loudly.
+	 */
+	gintmsk_data_t gintmsk = {.d32 = 0 };
+	gintsts_data_t gintsts = {.d32 = 0 };
+
+	gintmsk.b.sofintr = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gintmsk, gintmsk.d32, 0);
+
+	DWC_DEBUGPL(DBG_CIL,
+		    " ++Connector ID Status Change Interrupt++  (%s)\n",
+		    (dwc_otg_is_host_mode(core_if) ? "Host" : "Device"));
+
+	/*
+	 * Need to schedule a work, as there are possible DELAY function calls
+	 * Release lock before scheduling workq as it holds spinlock during scheduling
+	 */
+	DWC_SPINUNLOCK(core_if->lock);
+	DWC_WORKQ_SCHEDULE(core_if->wq_otg, w_conn_id_status_change,
+			   core_if, "connection id status change");
+	DWC_SPINLOCK(core_if->lock);
+
+	/* Set flag and clear interrupt */
+	gintsts.b.conidstschng = 1;
+	DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, gintsts.d32);
+
+	return 1;
+}
+
+/**
+ * This interrupt indicates that a device is initiating the Session
+ * Request Protocol to request the host to turn on bus power so a new
+ * session can begin. The handler responds by turning on bus power. If
+ * the DWC_otg controller is in low power mode, the handler brings the
+ * controller out of low power mode before turning on bus power.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ */
+int32_t dwc_otg_handle_session_req_intr(dwc_otg_core_if_t * core_if)
+{
+	hprt0_data_t hprt0;
+	gintsts_data_t gintsts;
+
+#ifndef DWC_HOST_ONLY
+	DWC_DEBUGPL(DBG_ANY, "++Session Request Interrupt++\n");
+
+	if (dwc_otg_is_device_mode(core_if)) {
+		DWC_PRINTF("SRP: Device mode\n");
+	} else {
+		DWC_PRINTF("SRP: Host mode\n");
+
+		/* Turn on the port power bit. */
+		hprt0.d32 = dwc_otg_read_hprt0(core_if);
+		hprt0.b.prtpwr = 1;
+		DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+
+		/* Start the Connection timer. So a message can be displayed
+		 * if connect does not occur within 10 seconds. */
+		cil_hcd_session_start(core_if);
+	}
+#endif
+
+	/* Clear interrupt */
+	gintsts.d32 = 0;
+	gintsts.b.sessreqintr = 1;
+	DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, gintsts.d32);
+
+	return 1;
+}
+
+void w_wakeup_detected(void *p)
+{
+	dwc_otg_core_if_t *core_if = (dwc_otg_core_if_t *) p;
+	/*
+	 * Clear the Resume after 70ms. (Need 20 ms minimum. Use 70 ms
+	 * so that OPT tests pass with all PHYs).
+	 */
+	hprt0_data_t hprt0 = {.d32 = 0 };
+#if 0
+	pcgcctl_data_t pcgcctl = {.d32 = 0 };
+	/* Restart the Phy Clock */
+	pcgcctl.b.stoppclk = 1;
+	DWC_MODIFY_REG32(core_if->pcgcctl, pcgcctl.d32, 0);
+	dwc_udelay(10);
+#endif //0
+	hprt0.d32 = dwc_otg_read_hprt0(core_if);
+	DWC_DEBUGPL(DBG_ANY, "Resume: HPRT0=%0x\n", hprt0.d32);
+//      dwc_mdelay(70);
+	hprt0.b.prtres = 0;	/* Resume */
+	DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+	DWC_DEBUGPL(DBG_ANY, "Clear Resume: HPRT0=%0x\n",
+		    DWC_READ_REG32(core_if->host_if->hprt0));
+
+	cil_hcd_resume(core_if);
+
+	/** Change to L0 state*/
+	core_if->lx_state = DWC_OTG_L0;
+}
+
+/**
+ * This interrupt indicates that the DWC_otg controller has detected a
+ * resume or remote wakeup sequence. If the DWC_otg controller is in
+ * low power mode, the handler must brings the controller out of low
+ * power mode. The controller automatically begins resume
+ * signaling. The handler schedules a time to stop resume signaling.
+ */
+int32_t dwc_otg_handle_wakeup_detected_intr(dwc_otg_core_if_t * core_if)
+{
+	gintsts_data_t gintsts;
+
+	DWC_DEBUGPL(DBG_ANY,
+		    "++Resume and Remote Wakeup Detected Interrupt++\n");
+
+	DWC_PRINTF("%s lxstate = %d\n", __func__, core_if->lx_state);
+
+	if (dwc_otg_is_device_mode(core_if)) {
+		dctl_data_t dctl = {.d32 = 0 };
+		DWC_DEBUGPL(DBG_PCD, "DSTS=0x%0x\n",
+			    DWC_READ_REG32(&core_if->dev_if->
+					   dev_global_regs->dsts));
+		if (core_if->lx_state == DWC_OTG_L2) {
+#ifdef PARTIAL_POWER_DOWN
+			if (core_if->hwcfg4.b.power_optimiz) {
+				pcgcctl_data_t power = {.d32 = 0 };
+
+				power.d32 = DWC_READ_REG32(core_if->pcgcctl);
+				DWC_DEBUGPL(DBG_CIL, "PCGCCTL=%0x\n",
+					    power.d32);
+
+				power.b.stoppclk = 0;
+				DWC_WRITE_REG32(core_if->pcgcctl, power.d32);
+
+				power.b.pwrclmp = 0;
+				DWC_WRITE_REG32(core_if->pcgcctl, power.d32);
+
+				power.b.rstpdwnmodule = 0;
+				DWC_WRITE_REG32(core_if->pcgcctl, power.d32);
+			}
+#endif
+			/* Clear the Remote Wakeup Signaling */
+			dctl.b.rmtwkupsig = 1;
+			DWC_MODIFY_REG32(&core_if->dev_if->
+					 dev_global_regs->dctl, dctl.d32, 0);
+
+			DWC_SPINUNLOCK(core_if->lock);
+			if (core_if->pcd_cb && core_if->pcd_cb->resume_wakeup) {
+				core_if->pcd_cb->resume_wakeup(core_if->pcd_cb->p);
+			}
+			DWC_SPINLOCK(core_if->lock);
+		} else {
+			glpmcfg_data_t lpmcfg;
+			lpmcfg.d32 =
+			    DWC_READ_REG32(&core_if->core_global_regs->glpmcfg);
+			lpmcfg.b.hird_thres &= (~(1 << 4));
+			DWC_WRITE_REG32(&core_if->core_global_regs->glpmcfg,
+					lpmcfg.d32);
+		}
+		/** Change to L0 state*/
+		core_if->lx_state = DWC_OTG_L0;
+	} else {
+		if (core_if->lx_state != DWC_OTG_L1) {
+			pcgcctl_data_t pcgcctl = {.d32 = 0 };
+
+			/* Restart the Phy Clock */
+			pcgcctl.b.stoppclk = 1;
+			DWC_MODIFY_REG32(core_if->pcgcctl, pcgcctl.d32, 0);
+			DWC_TIMER_SCHEDULE(core_if->wkp_timer, 71);
+		} else {
+			/** Change to L0 state*/
+			core_if->lx_state = DWC_OTG_L0;
+		}
+	}
+
+	/* Clear interrupt */
+	gintsts.d32 = 0;
+	gintsts.b.wkupintr = 1;
+	DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, gintsts.d32);
+
+	return 1;
+}
+
+/**
+ * This interrupt indicates that the Wakeup Logic has detected a
+ * Device disconnect.
+ */
+static int32_t dwc_otg_handle_pwrdn_disconnect_intr(dwc_otg_core_if_t *core_if)
+{
+	gpwrdn_data_t gpwrdn = { .d32 = 0 };
+	gpwrdn_data_t gpwrdn_temp = { .d32 = 0 };
+	gpwrdn_temp.d32 = DWC_READ_REG32(&core_if->core_global_regs->gpwrdn);
+
+	DWC_PRINTF("%s called\n", __FUNCTION__);
+
+	if (!core_if->hibernation_suspend) {
+		DWC_PRINTF("Already exited from Hibernation\n");
+		return 1;
+	}
+
+	/* Switch on the voltage to the core */
+	gpwrdn.b.pwrdnswtch = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+	dwc_udelay(10);
+
+	/* Reset the core */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pwrdnrstn = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+	dwc_udelay(10);
+
+	/* Disable power clamps*/
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pwrdnclmp = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+
+	/* Remove reset the core signal */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pwrdnrstn = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32);
+	dwc_udelay(10);
+
+	/* Disable PMU interrupt */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pmuintsel = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+
+	core_if->hibernation_suspend = 0;
+
+	/* Disable PMU */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pmuactv = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+	dwc_udelay(10);
+
+	if (gpwrdn_temp.b.idsts) {
+		core_if->op_state = B_PERIPHERAL;
+		dwc_otg_core_init(core_if);
+		dwc_otg_enable_global_interrupts(core_if);
+		cil_pcd_start(core_if);
+	} else {
+		core_if->op_state = A_HOST;
+		dwc_otg_core_init(core_if);
+		dwc_otg_enable_global_interrupts(core_if);
+		cil_hcd_start(core_if);
+	}
+
+	return 1;
+}
+
+/**
+ * This interrupt indicates that the Wakeup Logic has detected a
+ * remote wakeup sequence.
+ */
+static int32_t dwc_otg_handle_pwrdn_wakeup_detected_intr(dwc_otg_core_if_t * core_if)
+{
+	gpwrdn_data_t gpwrdn = {.d32 = 0 };
+	DWC_DEBUGPL(DBG_ANY,
+		    "++Powerdown Remote Wakeup Detected Interrupt++\n");
+
+	if (!core_if->hibernation_suspend) {
+		DWC_PRINTF("Already exited from Hibernation\n");
+		return 1;
+	}
+
+	gpwrdn.d32 = DWC_READ_REG32(&core_if->core_global_regs->gpwrdn);
+	if (gpwrdn.b.idsts) {	// Device Mode
+		if ((core_if->power_down == 2)
+		    && (core_if->hibernation_suspend == 1)) {
+			dwc_otg_device_hibernation_restore(core_if, 0, 0);
+		}
+	} else {
+		if ((core_if->power_down == 2)
+		    && (core_if->hibernation_suspend == 1)) {
+			dwc_otg_host_hibernation_restore(core_if, 1, 0);
+		}
+	}
+	return 1;
+}
+
+static int32_t dwc_otg_handle_pwrdn_idsts_change(dwc_otg_core_if_t * core_if)
+{
+	gpwrdn_data_t gpwrdn = {.d32 = 0 };
+	gpwrdn_data_t gpwrdn_temp = {.d32 = 0 };
+
+	if (!core_if->hibernation_suspend) {
+		DWC_PRINTF("Already exited from Hibernation\n");
+		return 1;
+	}
+
+	DWC_DEBUGPL(DBG_ANY, "%s called\n", __FUNCTION__);
+	gpwrdn_temp.d32 = DWC_READ_REG32(&core_if->core_global_regs->gpwrdn);
+
+	/* Switch on the voltage to the core */
+	gpwrdn.b.pwrdnswtch = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+	dwc_udelay(10);
+
+	/* Reset the core */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pwrdnrstn = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+	dwc_udelay(10);
+
+	/* Disable power clamps */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pwrdnclmp = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+
+	/* Remove reset the core signal */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pwrdnrstn = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32);
+	dwc_udelay(10);
+
+	/* Disable PMU interrupt */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pmuintsel = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+
+	/*Indicates that we are exiting from hibernation */
+	core_if->hibernation_suspend = 0;
+
+	/* Disable PMU */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pmuactv = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+	dwc_udelay(10);
+
+	gpwrdn.d32 = core_if->gr_backup->gpwrdn_local;
+	if (gpwrdn.b.dis_vbus == 1) {
+		gpwrdn.d32 = 0;
+		gpwrdn.b.dis_vbus = 1;
+		DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+	}
+
+	if (gpwrdn_temp.b.idsts) {
+		core_if->op_state = B_PERIPHERAL;
+		dwc_otg_core_init(core_if);
+		dwc_otg_enable_global_interrupts(core_if);
+		cil_pcd_start(core_if);
+	} else {
+		core_if->op_state = A_HOST;
+		dwc_otg_core_init(core_if);
+		dwc_otg_enable_global_interrupts(core_if);
+		cil_hcd_start(core_if);
+	}
+
+	return 1;
+}
+
+static int32_t dwc_otg_handle_pwrdn_session_change(dwc_otg_core_if_t * core_if)
+{
+	gpwrdn_data_t gpwrdn = {.d32 = 0 };
+	int32_t otg_cap_param = core_if->core_params->otg_cap;
+	DWC_DEBUGPL(DBG_ANY, "%s called\n", __FUNCTION__);
+
+	gpwrdn.d32 = DWC_READ_REG32(&core_if->core_global_regs->gpwrdn);
+	if (!core_if->hibernation_suspend) {
+		DWC_PRINTF("Already exited from Hibernation\n");
+		return 1;
+	}
+
+	if ((otg_cap_param != DWC_OTG_CAP_PARAM_HNP_SRP_CAPABLE ||
+	     otg_cap_param != DWC_OTG_CAP_PARAM_SRP_ONLY_CAPABLE) &&
+	    gpwrdn.b.bsessvld == 0) {
+		/* Save gpwrdn register for further usage if stschng interrupt */
+		core_if->gr_backup->gpwrdn_local =
+		    DWC_READ_REG32(&core_if->core_global_regs->gpwrdn);
+		/*Exit from ISR and wait for stschng interrupt with bsessvld = 1 */
+		return 1;
+	}
+
+	/* Switch on the voltage to the core */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pwrdnswtch = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+	dwc_udelay(10);
+
+	/* Reset the core */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pwrdnrstn = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+	dwc_udelay(10);
+
+	/* Disable power clamps */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pwrdnclmp = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+
+	/* Remove reset the core signal */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pwrdnrstn = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32);
+	dwc_udelay(10);
+
+	/* Disable PMU interrupt */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pmuintsel = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+	dwc_udelay(10);
+
+	/*Indicates that we are exiting from hibernation */
+	core_if->hibernation_suspend = 0;
+
+	/* Disable PMU */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pmuactv = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+	dwc_udelay(10);
+
+	core_if->op_state = B_PERIPHERAL;
+	dwc_otg_core_init(core_if);
+	dwc_otg_enable_global_interrupts(core_if);
+	cil_pcd_start(core_if);
+
+	if (otg_cap_param == DWC_OTG_CAP_PARAM_HNP_SRP_CAPABLE ||
+	    otg_cap_param == DWC_OTG_CAP_PARAM_SRP_ONLY_CAPABLE) {
+		/*
+		 * Initiate SRP after initial ADP probe.
+		 */
+		dwc_otg_initiate_srp(core_if);	
+	}
+
+	return 1;
+}
+/**
+ * This interrupt indicates that the Wakeup Logic has detected a
+ * status change either on IDDIG or BSessVld.
+ */
+static uint32_t dwc_otg_handle_pwrdn_stschng_intr(dwc_otg_core_if_t * core_if)
+{
+	int retval;
+	gpwrdn_data_t gpwrdn = {.d32 = 0 };
+	gpwrdn_data_t gpwrdn_temp = {.d32 = 0 };
+
+	DWC_PRINTF("%s called\n", __FUNCTION__);
+
+	if (!core_if->hibernation_suspend) {
+		DWC_PRINTF("Already exited from Hibernation\n");
+		return 1;
+	}
+
+	gpwrdn.d32 = DWC_READ_REG32(&core_if->core_global_regs->gpwrdn);
+	gpwrdn_temp.d32 = core_if->gr_backup->gpwrdn_local;
+
+	if (gpwrdn.b.idsts ^ gpwrdn_temp.b.idsts) {
+		retval = dwc_otg_handle_pwrdn_idsts_change(core_if);
+	} else if (gpwrdn.b.bsessvld ^ gpwrdn_temp.b.bsessvld) {
+		retval = dwc_otg_handle_pwrdn_session_change(core_if);
+	}
+
+	return retval;
+}
+
+/**
+ * This interrupt indicates that the Wakeup Logic has detected a
+ * SRP.
+ */
+static int32_t dwc_otg_handle_pwrdn_srp_intr(dwc_otg_core_if_t * core_if)
+{
+	gpwrdn_data_t gpwrdn = {.d32 = 0 };
+
+	DWC_PRINTF("%s called\n", __FUNCTION__);
+
+	if (!core_if->hibernation_suspend) {
+		DWC_PRINTF("Already exited from Hibernation\n");
+		return 1;
+	}
+#ifdef DWC_DEV_SRPCAP
+	if (core_if->pwron_timer_started) {
+		core_if->pwron_timer_started = 0;
+		DWC_TIMER_CANCEL(core_if->pwron_timer);
+	}
+#endif
+
+	/* Switch on the voltage to the core */
+	gpwrdn.b.pwrdnswtch = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+	dwc_udelay(10);
+
+	/* Reset the core */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pwrdnrstn = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+	dwc_udelay(10);
+
+	/* Disable power clamps */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pwrdnclmp = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+
+	/* Remove reset the core signal */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pwrdnrstn = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32);
+	dwc_udelay(10);
+
+	/* Disable PMU interrupt */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pmuintsel = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+
+	/* Indicates that we are exiting from hibernation */
+	core_if->hibernation_suspend = 0;
+
+	/* Disable PMU */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pmuactv = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+	dwc_udelay(10);
+
+	/* Programm Disable VBUS to 0 */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.dis_vbus = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+
+	/*Initialize the core as Host */
+	core_if->op_state = A_HOST;
+	dwc_otg_core_init(core_if);
+	dwc_otg_enable_global_interrupts(core_if);
+	cil_hcd_start(core_if);
+
+	return 1;
+}
+
+/** This interrupt indicates that restore command after Hibernation
+ * was completed by the core. */
+int32_t dwc_otg_handle_restore_done_intr(dwc_otg_core_if_t * core_if)
+{
+	pcgcctl_data_t pcgcctl;
+	DWC_DEBUGPL(DBG_ANY, "++Restore Done Interrupt++\n");
+
+	//TODO De-assert restore signal. 8.a
+	pcgcctl.d32 = DWC_READ_REG32(core_if->pcgcctl);
+	if (pcgcctl.b.restoremode == 1) {
+		gintmsk_data_t gintmsk = {.d32 = 0 };
+		/*
+		 * If restore mode is Remote Wakeup,
+		 * unmask Remote Wakeup interrupt.
+		 */
+		gintmsk.b.wkupintr = 1;
+		DWC_MODIFY_REG32(&core_if->core_global_regs->gintmsk,
+				 0, gintmsk.d32);
+	}
+
+	return 1;
+}
+
+/**
+ * This interrupt indicates that a device has been disconnected from
+ * the root port.
+ */
+int32_t dwc_otg_handle_disconnect_intr(dwc_otg_core_if_t * core_if)
+{
+	gintsts_data_t gintsts;
+
+	DWC_DEBUGPL(DBG_ANY, "++Disconnect Detected Interrupt++ (%s) %s\n",
+		    (dwc_otg_is_host_mode(core_if) ? "Host" : "Device"),
+		    op_state_str(core_if));
+
+/** @todo Consolidate this if statement. */
+#ifndef DWC_HOST_ONLY
+	if (core_if->op_state == B_HOST) {
+		/* If in device mode Disconnect and stop the HCD, then
+		 * start the PCD. */
+		DWC_SPINUNLOCK(core_if->lock);
+		cil_hcd_disconnect(core_if);
+		cil_pcd_start(core_if);
+		DWC_SPINLOCK(core_if->lock);
+		core_if->op_state = B_PERIPHERAL;
+	} else if (dwc_otg_is_device_mode(core_if)) {
+		gotgctl_data_t gotgctl = {.d32 = 0 };
+		gotgctl.d32 =
+		    DWC_READ_REG32(&core_if->core_global_regs->gotgctl);
+		if (gotgctl.b.hstsethnpen == 1) {
+			/* Do nothing, if HNP in process the OTG
+			 * interrupt "Host Negotiation Detected"
+			 * interrupt will do the mode switch.
+			 */
+		} else if (gotgctl.b.devhnpen == 0) {
+			/* If in device mode Disconnect and stop the HCD, then
+			 * start the PCD. */
+			DWC_SPINUNLOCK(core_if->lock);
+			cil_hcd_disconnect(core_if);
+			cil_pcd_start(core_if);
+			DWC_SPINLOCK(core_if->lock);
+			core_if->op_state = B_PERIPHERAL;
+		} else {
+			DWC_DEBUGPL(DBG_ANY, "!a_peripheral && !devhnpen\n");
+		}
+	} else {
+		if (core_if->op_state == A_HOST) {
+			/* A-Cable still connected but device disconnected. */
+			cil_hcd_disconnect(core_if);
+			if (core_if->adp_enable) {
+				gpwrdn_data_t gpwrdn;
+				/* Power off the core */
+				if (core_if->power_down == 2) {
+				} else {
+					/* Enable Power Down Logic */
+					gpwrdn.b.pmuactv = 1;
+					DWC_MODIFY_REG32(&core_if->
+							 core_global_regs->
+							 gpwrdn, 0, gpwrdn.d32);
+				}
+
+				/* Power off the core */
+				if (core_if->power_down == 2) {
+					gpwrdn.d32 = 0;
+					gpwrdn.b.pwrdnswtch = 1;
+					DWC_MODIFY_REG32(&core_if->
+							 core_global_regs->
+							 gpwrdn, gpwrdn.d32, 0);
+				}
+
+				/* Enable Power Down Logic */
+				gpwrdn.d32 = 0;
+				gpwrdn.b.pmuactv = 1;
+				DWC_MODIFY_REG32(&core_if->core_global_regs->
+						 gpwrdn, 0, gpwrdn.d32);
+
+				/* Unmask SRP detected interrupt from Power Down Logic */
+				gpwrdn.d32 = 0;
+				gpwrdn.b.srp_det_msk = 1;
+				DWC_MODIFY_REG32(&core_if->core_global_regs->
+						 gpwrdn, 0, gpwrdn.d32);
+
+				dwc_otg_adp_probe_start(core_if);
+			}
+		}
+	}
+#endif
+	/* Change to L3(OFF) state */
+	core_if->lx_state = DWC_OTG_L3;
+
+	gintsts.d32 = 0;
+	gintsts.b.disconnect = 1;
+	DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, gintsts.d32);
+	return 1;
+}
+
+/**
+ * This interrupt indicates that SUSPEND state has been detected on
+ * the USB.
+ *
+ * For HNP the USB Suspend interrupt signals the change from
+ * "a_peripheral" to "a_host".
+ *
+ * When power management is enabled the core will be put in low power
+ * mode.
+ */
+int32_t dwc_otg_handle_usb_suspend_intr(dwc_otg_core_if_t * core_if)
+{
+	dsts_data_t dsts;
+	gintsts_data_t gintsts;
+	dcfg_data_t dcfg;
+
+	DWC_DEBUGPL(DBG_ANY, "USB SUSPEND\n");
+
+	if (dwc_otg_is_device_mode(core_if)) {
+		/* Check the Device status register to determine if the Suspend
+		 * state is active. */
+		dsts.d32 =
+		    DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dsts);
+		DWC_DEBUGPL(DBG_PCD, "DSTS=0x%0x\n", dsts.d32);
+		DWC_DEBUGPL(DBG_PCD, "DSTS.Suspend Status=%d "
+			    "HWCFG4.power Optimize=%d\n",
+			    dsts.b.suspsts, core_if->hwcfg4.b.power_optimiz);
+
+#ifdef PARTIAL_POWER_DOWN
+/** @todo Add a module parameter for power management. */
+
+		if (dsts.b.suspsts && core_if->hwcfg4.b.power_optimiz) {
+			pcgcctl_data_t power = {.d32 = 0 };
+			DWC_DEBUGPL(DBG_CIL, "suspend\n");
+
+			power.b.pwrclmp = 1;
+			DWC_WRITE_REG32(core_if->pcgcctl, power.d32);
+
+			power.b.rstpdwnmodule = 1;
+			DWC_MODIFY_REG32(core_if->pcgcctl, 0, power.d32);
+
+			power.b.stoppclk = 1;
+			DWC_MODIFY_REG32(core_if->pcgcctl, 0, power.d32);
+
+		} else {
+			DWC_DEBUGPL(DBG_ANY, "disconnect?\n");
+		}
+#endif
+		/* PCD callback for suspend. Release the lock inside of callback function */
+		cil_pcd_suspend(core_if);
+		if (core_if->power_down == 2)
+		{
+			dcfg.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dcfg);
+			DWC_DEBUGPL(DBG_ANY,"lx_state = %08x\n",core_if->lx_state);
+			DWC_DEBUGPL(DBG_ANY," device address = %08d\n",dcfg.b.devaddr);
+
+			if (core_if->lx_state != DWC_OTG_L3 && dcfg.b.devaddr) {
+				pcgcctl_data_t pcgcctl = {.d32 = 0 };
+				gpwrdn_data_t gpwrdn = {.d32 = 0 };
+				gusbcfg_data_t gusbcfg = {.d32 = 0 };
+
+				/* Change to L2(suspend) state */
+				core_if->lx_state = DWC_OTG_L2;
+
+				/* Clear interrupt in gintsts */
+				gintsts.d32 = 0;
+				gintsts.b.usbsuspend = 1;
+				DWC_WRITE_REG32(&core_if->core_global_regs->
+						gintsts, gintsts.d32);
+				DWC_PRINTF("Start of hibernation completed\n");
+				dwc_otg_save_global_regs(core_if);
+				dwc_otg_save_dev_regs(core_if);
+
+				gusbcfg.d32 =
+				    DWC_READ_REG32(&core_if->core_global_regs->
+						   gusbcfg);
+				if (gusbcfg.b.ulpi_utmi_sel == 1) {
+					/* ULPI interface */
+					/* Suspend the Phy Clock */
+					pcgcctl.d32 = 0;
+					pcgcctl.b.stoppclk = 1;
+					DWC_MODIFY_REG32(core_if->pcgcctl, 0,
+							 pcgcctl.d32);
+					dwc_udelay(10);
+					gpwrdn.b.pmuactv = 1;
+					DWC_MODIFY_REG32(&core_if->
+							 core_global_regs->
+							 gpwrdn, 0, gpwrdn.d32);
+				} else {
+					/* UTMI+ Interface */
+					gpwrdn.b.pmuactv = 1;
+					DWC_MODIFY_REG32(&core_if->
+							 core_global_regs->
+							 gpwrdn, 0, gpwrdn.d32);
+					dwc_udelay(10);
+					pcgcctl.b.stoppclk = 1;
+					DWC_MODIFY_REG32(core_if->pcgcctl, 0,
+							 pcgcctl.d32);
+					dwc_udelay(10);
+				}
+
+				/* Set flag to indicate that we are in hibernation */
+				core_if->hibernation_suspend = 1;
+				/* Enable interrupts from wake up logic */
+				gpwrdn.d32 = 0;
+				gpwrdn.b.pmuintsel = 1;
+				DWC_MODIFY_REG32(&core_if->core_global_regs->
+						 gpwrdn, 0, gpwrdn.d32);
+				dwc_udelay(10);
+
+				/* Unmask device mode interrupts in GPWRDN */
+				gpwrdn.d32 = 0;
+				gpwrdn.b.rst_det_msk = 1;
+				gpwrdn.b.lnstchng_msk = 1;
+				gpwrdn.b.sts_chngint_msk = 1;
+				DWC_MODIFY_REG32(&core_if->core_global_regs->
+						 gpwrdn, 0, gpwrdn.d32);
+				dwc_udelay(10);
+
+				/* Enable Power Down Clamp */
+				gpwrdn.d32 = 0;
+				gpwrdn.b.pwrdnclmp = 1;
+				DWC_MODIFY_REG32(&core_if->core_global_regs->
+						 gpwrdn, 0, gpwrdn.d32);
+				dwc_udelay(10);
+
+				/* Switch off VDD */
+				gpwrdn.d32 = 0;
+				gpwrdn.b.pwrdnswtch = 1;
+				DWC_MODIFY_REG32(&core_if->core_global_regs->
+						 gpwrdn, 0, gpwrdn.d32);
+
+				/* Save gpwrdn register for further usage if stschng interrupt */
+				core_if->gr_backup->gpwrdn_local =
+							DWC_READ_REG32(&core_if->core_global_regs->gpwrdn);
+				DWC_PRINTF("Hibernation completed\n");
+
+				return 1;
+			}
+		}
+	} else {
+		if (core_if->op_state == A_PERIPHERAL) {
+			DWC_DEBUGPL(DBG_ANY, "a_peripheral->a_host\n");
+			/* Clear the a_peripheral flag, back to a_host. */
+			DWC_SPINUNLOCK(core_if->lock);
+			cil_pcd_stop(core_if);
+			cil_hcd_start(core_if);
+			DWC_SPINLOCK(core_if->lock);
+			core_if->op_state = A_HOST;
+		}
+	}
+
+	/* Change to L2(suspend) state */
+	core_if->lx_state = DWC_OTG_L2;
+
+	/* Clear interrupt */
+	gintsts.d32 = 0;
+	gintsts.b.usbsuspend = 1;
+	DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, gintsts.d32);
+
+	return 1;
+}
+
+#ifdef CONFIG_USB_DWC_OTG_LPM
+/**
+ * This function hadles LPM transaction received interrupt.
+ */
+static int32_t dwc_otg_handle_lpm_intr(dwc_otg_core_if_t * core_if)
+{
+	glpmcfg_data_t lpmcfg;
+	gintsts_data_t gintsts;
+
+	if (!core_if->core_params->lpm_enable) {
+		DWC_PRINTF("Unexpected LPM interrupt\n");
+	}
+
+	lpmcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->glpmcfg);
+	DWC_PRINTF("LPM config register = 0x%08x\n", lpmcfg.d32);
+
+	if (dwc_otg_is_host_mode(core_if)) {
+		cil_hcd_sleep(core_if);
+	} else {
+		lpmcfg.b.hird_thres |= (1 << 4);
+		DWC_WRITE_REG32(&core_if->core_global_regs->glpmcfg,
+				lpmcfg.d32);
+	}
+
+	/* Examine prt_sleep_sts after TL1TokenTetry period max (10 us) */
+	dwc_udelay(10);
+	lpmcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->glpmcfg);
+	if (lpmcfg.b.prt_sleep_sts) {
+		/* Save the current state */
+		core_if->lx_state = DWC_OTG_L1;
+	}
+
+	/* Clear interrupt  */
+	gintsts.d32 = 0;
+	gintsts.b.lpmtranrcvd = 1;
+	DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, gintsts.d32);
+	return 1;
+}
+#endif /* CONFIG_USB_DWC_OTG_LPM */
+
+/**
+ * This function returns the Core Interrupt register.
+ */
+static inline uint32_t dwc_otg_read_common_intr(dwc_otg_core_if_t * core_if)
+{
+	gintsts_data_t gintsts;
+	gintmsk_data_t gintmsk;
+	gintmsk_data_t gintmsk_common = {.d32 = 0 };
+	gintmsk_common.b.wkupintr = 1;
+	gintmsk_common.b.sessreqintr = 1;
+	gintmsk_common.b.conidstschng = 1;
+	gintmsk_common.b.otgintr = 1;
+	gintmsk_common.b.modemismatch = 1;
+	gintmsk_common.b.disconnect = 1;
+	gintmsk_common.b.usbsuspend = 1;
+#ifdef CONFIG_USB_DWC_OTG_LPM
+	gintmsk_common.b.lpmtranrcvd = 1;
+#endif
+	gintmsk_common.b.restoredone = 1;
+	/** @todo: The port interrupt occurs while in device
+         * mode. Added code to CIL to clear the interrupt for now!
+         */
+	gintmsk_common.b.portintr = 1;
+
+	gintsts.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintsts);
+	gintmsk.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintmsk);
+
+#ifdef DEBUG
+	/* if any common interrupts set */
+	if (gintsts.d32 & gintmsk_common.d32) {
+		DWC_DEBUGPL(DBG_ANY, "gintsts=%08x  gintmsk=%08x\n",
+			    gintsts.d32, gintmsk.d32);
+	}
+#endif
+
+	return ((gintsts.d32 & gintmsk.d32) & gintmsk_common.d32);
+
+}
+
+/* MACRO for clearing interupt bits in GPWRDN register */
+#define CLEAR_GPWRDN_INTR(__core_if,__intr) \
+do { \
+		gpwrdn_data_t gpwrdn = {.d32=0}; \
+		gpwrdn.b.__intr = 1; \
+		DWC_MODIFY_REG32(&__core_if->core_global_regs->gpwrdn, \
+		0, gpwrdn.d32); \
+} while (0)
+
+/**
+ * Common interrupt handler.
+ *
+ * The common interrupts are those that occur in both Host and Device mode.
+ * This handler handles the following interrupts:
+ * - Mode Mismatch Interrupt
+ * - Disconnect Interrupt
+ * - OTG Interrupt
+ * - Connector ID Status Change Interrupt
+ * - Session Request Interrupt.
+ * - Resume / Remote Wakeup Detected Interrupt.
+ * - LPM Transaction Received Interrupt
+ * - ADP Transaction Received Interrupt
+ *
+ */
+int32_t dwc_otg_handle_common_intr(dwc_otg_core_if_t * core_if)
+{
+	int retval = 0;
+	gintsts_data_t gintsts;
+	gpwrdn_data_t gpwrdn = {.d32 = 0 };
+	gpwrdn.d32 = DWC_READ_REG32(&core_if->core_global_regs->gpwrdn);
+
+	if (core_if->lock)
+		DWC_SPINLOCK(core_if->lock);
+
+	if (core_if->hibernation_suspend <= 0) {
+		gintsts.d32 = dwc_otg_read_common_intr(core_if);
+
+		if (gintsts.b.modemismatch) {
+			retval |= dwc_otg_handle_mode_mismatch_intr(core_if);
+		}
+		if (gintsts.b.otgintr) {
+			retval |= dwc_otg_handle_otg_intr(core_if);
+		}
+		if (gintsts.b.conidstschng) {
+			retval |= dwc_otg_handle_conn_id_status_change_intr(core_if);
+		}
+		if (gintsts.b.disconnect) {
+			retval |= dwc_otg_handle_disconnect_intr(core_if);
+		}
+		if (gintsts.b.sessreqintr) {
+			retval |= dwc_otg_handle_session_req_intr(core_if);
+		}
+		if (gintsts.b.wkupintr) {
+			retval |= dwc_otg_handle_wakeup_detected_intr(core_if);
+		}
+		if (gintsts.b.usbsuspend) {
+			retval |= dwc_otg_handle_usb_suspend_intr(core_if);
+		}
+#ifdef CONFIG_USB_DWC_OTG_LPM
+		if (gintsts.b.lpmtranrcvd) {
+			retval |= dwc_otg_handle_lpm_intr(core_if);
+		}
+#endif
+		if (gintsts.b.restoredone) {
+			gintsts.d32 = 0;
+	                if (core_if->power_down == 2)
+				core_if->hibernation_suspend = -1;
+			gintsts.b.restoredone = 1;
+			DWC_WRITE_REG32(&core_if->core_global_regs->gintsts,gintsts.d32);
+			DWC_PRINTF(" --Restore done interrupt received-- \n");
+			retval |= 1;
+		}
+		if (gintsts.b.portintr && dwc_otg_is_device_mode(core_if)) {
+			/* The port interrupt occurs while in device mode with HPRT0
+			 * Port Enable/Disable.
+			 */
+			gintsts.d32 = 0;
+			gintsts.b.portintr = 1;
+			DWC_WRITE_REG32(&core_if->core_global_regs->gintsts,gintsts.d32);
+			retval |= 1;
+
+		}
+	} else {
+		DWC_DEBUGPL(DBG_ANY, "gpwrdn=%08x\n", gpwrdn.d32);
+
+		if (gpwrdn.b.disconn_det && gpwrdn.b.disconn_det_msk) {
+			CLEAR_GPWRDN_INTR(core_if, disconn_det);
+			if (gpwrdn.b.linestate == 0) {
+				dwc_otg_handle_pwrdn_disconnect_intr(core_if);
+			} else {
+				DWC_PRINTF("Disconnect detected while linestate is not 0\n");
+			}
+
+			retval |= 1;
+		}
+	 	if (gpwrdn.b.lnstschng && gpwrdn.b.lnstchng_msk) {
+			CLEAR_GPWRDN_INTR(core_if, lnstschng);
+			/* remote wakeup from hibernation */
+			if (gpwrdn.b.linestate == 2 || gpwrdn.b.linestate == 1) {
+				dwc_otg_handle_pwrdn_wakeup_detected_intr(core_if);
+			} else {
+				DWC_PRINTF("gpwrdn.linestate = %d\n", gpwrdn.b.linestate);
+			}
+			retval |= 1;
+	 	}
+		if (gpwrdn.b.rst_det && gpwrdn.b.rst_det_msk) {
+			CLEAR_GPWRDN_INTR(core_if, rst_det);
+			if (gpwrdn.b.linestate == 0) {
+				DWC_PRINTF("Reset detected\n");
+				retval |= dwc_otg_device_hibernation_restore(core_if, 0, 1);
+			}
+		}
+		if (gpwrdn.b.srp_det && gpwrdn.b.srp_det_msk) {
+			CLEAR_GPWRDN_INTR(core_if, srp_det);
+			dwc_otg_handle_pwrdn_srp_intr(core_if);
+			retval |= 1;
+		}
+		if (gpwrdn.b.sts_chngint && gpwrdn.b.sts_chngint_msk) {
+			CLEAR_GPWRDN_INTR(core_if, sts_chngint);
+			dwc_otg_handle_pwrdn_stschng_intr(core_if);
+
+			retval |= 1;
+		}
+	}
+	/* Handle ADP interrupt here */
+	if (gpwrdn.b.adp_int) {
+		DWC_PRINTF("ADP interrupt\n");
+		CLEAR_GPWRDN_INTR(core_if, adp_int);
+		dwc_otg_adp_handle_intr(core_if);
+		retval |= 1;
+	}
+	if (core_if->lock)
+		DWC_SPINUNLOCK(core_if->lock);
+
+	return retval;
+}
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_core_if.h linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_core_if.h
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_core_if.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_core_if.h	2017-09-23 03:42:50.210674477 +0800
@@ -0,0 +1,688 @@
+/* ==========================================================================
+ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_core_if.h $
+ * $Revision: #10 $
+ * $Date: 2011/05/17 $
+ * $Change: 1774110 $
+ *
+ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+ * otherwise expressly agreed to in writing between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product under
+ * any End User Software License Agreement or Agreement for Licensed Product
+ * with Synopsys or any supplement thereto. You are permitted to use and
+ * redistribute this Software in source and binary forms, with or without
+ * modification, provided that redistributions of source code must retain this
+ * notice. You may not view, use, disclose, copy or distribute this file or
+ * any information contained herein except pursuant to this license grant from
+ * Synopsys. If you do not agree with this notice, including the disclaimer
+ * below, then you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================== */
+#if !defined(__DWC_CORE_IF_H__)
+#define __DWC_CORE_IF_H__
+
+#include "dwc_os.h"
+
+/** @file
+ * This file defines DWC_OTG Core API
+ */
+
+struct dwc_otg_core_if;
+typedef struct dwc_otg_core_if dwc_otg_core_if_t;
+
+/** Maximum number of Periodic FIFOs */
+#define MAX_PERIO_FIFOS 15
+/** Maximum number of Periodic FIFOs */
+#define MAX_TX_FIFOS 15
+
+/** Maximum number of Endpoints/HostChannels */
+#define MAX_EPS_CHANNELS 6
+
+extern dwc_otg_core_if_t *dwc_otg_cil_init(const uint32_t * _reg_base_addr);
+extern void dwc_otg_core_init(dwc_otg_core_if_t * _core_if);
+extern void dwc_otg_cil_remove(dwc_otg_core_if_t * _core_if);
+
+extern void dwc_otg_enable_global_interrupts(dwc_otg_core_if_t * _core_if);
+extern void dwc_otg_disable_global_interrupts(dwc_otg_core_if_t * _core_if);
+
+extern uint8_t dwc_otg_is_device_mode(dwc_otg_core_if_t * _core_if);
+extern uint8_t dwc_otg_is_host_mode(dwc_otg_core_if_t * _core_if);
+
+extern uint8_t dwc_otg_is_dma_enable(dwc_otg_core_if_t * core_if);
+
+/** This function should be called on every hardware interrupt. */
+extern int32_t dwc_otg_handle_common_intr(dwc_otg_core_if_t * _core_if);
+
+/** @name OTG Core Parameters */
+/** @{ */
+
+/**
+ * Specifies the OTG capabilities. The driver will automatically
+ * detect the value for this parameter if none is specified.
+ * 0 - HNP and SRP capable (default)
+ * 1 - SRP Only capable
+ * 2 - No HNP/SRP capable
+ */
+extern int dwc_otg_set_param_otg_cap(dwc_otg_core_if_t * core_if, int32_t val);
+extern int32_t dwc_otg_get_param_otg_cap(dwc_otg_core_if_t * core_if);
+#define DWC_OTG_CAP_PARAM_HNP_SRP_CAPABLE 0
+#define DWC_OTG_CAP_PARAM_SRP_ONLY_CAPABLE 1
+#define DWC_OTG_CAP_PARAM_NO_HNP_SRP_CAPABLE 2
+#define dwc_param_otg_cap_default DWC_OTG_CAP_PARAM_HNP_SRP_CAPABLE
+
+extern int dwc_otg_set_param_opt(dwc_otg_core_if_t * core_if, int32_t val);
+extern int32_t dwc_otg_get_param_opt(dwc_otg_core_if_t * core_if);
+#define dwc_param_opt_default 1
+
+/**
+ * Specifies whether to use slave or DMA mode for accessing the data
+ * FIFOs. The driver will automatically detect the value for this
+ * parameter if none is specified.
+ * 0 - Slave
+ * 1 - DMA (default, if available)
+ */
+extern int dwc_otg_set_param_dma_enable(dwc_otg_core_if_t * core_if,
+					int32_t val);
+extern int32_t dwc_otg_get_param_dma_enable(dwc_otg_core_if_t * core_if);
+#define dwc_param_dma_enable_default 1
+
+/**
+ * When DMA mode is enabled specifies whether to use
+ * address DMA or DMA Descritor mode for accessing the data
+ * FIFOs in device mode. The driver will automatically detect
+ * the value for this parameter if none is specified.
+ * 0 - address DMA
+ * 1 - DMA Descriptor(default, if available)
+ */
+extern int dwc_otg_set_param_dma_desc_enable(dwc_otg_core_if_t * core_if,
+					     int32_t val);
+extern int32_t dwc_otg_get_param_dma_desc_enable(dwc_otg_core_if_t * core_if);
+#define dwc_param_dma_desc_enable_default 1
+
+/** The DMA Burst size (applicable only for External DMA
+ * Mode). 1, 4, 8 16, 32, 64, 128, 256 (default 32)
+ */
+extern int dwc_otg_set_param_dma_burst_size(dwc_otg_core_if_t * core_if,
+					    int32_t val);
+extern int32_t dwc_otg_get_param_dma_burst_size(dwc_otg_core_if_t * core_if);
+#define dwc_param_dma_burst_size_default 32
+
+/**
+ * Specifies the maximum speed of operation in host and device mode.
+ * The actual speed depends on the speed of the attached device and
+ * the value of phy_type. The actual speed depends on the speed of the
+ * attached device.
+ * 0 - High Speed (default)
+ * 1 - Full Speed
+ */
+extern int dwc_otg_set_param_speed(dwc_otg_core_if_t * core_if, int32_t val);
+extern int32_t dwc_otg_get_param_speed(dwc_otg_core_if_t * core_if);
+#define dwc_param_speed_default 0
+#define DWC_SPEED_PARAM_HIGH 0
+#define DWC_SPEED_PARAM_FULL 1
+
+/** Specifies whether low power mode is supported when attached
+ *	to a Full Speed or Low Speed device in host mode.
+ * 0 - Don't support low power mode (default)
+ * 1 - Support low power mode
+ */
+extern int dwc_otg_set_param_host_support_fs_ls_low_power(dwc_otg_core_if_t *
+							  core_if, int32_t val);
+extern int32_t dwc_otg_get_param_host_support_fs_ls_low_power(dwc_otg_core_if_t
+							      * core_if);
+#define dwc_param_host_support_fs_ls_low_power_default 0
+
+/** Specifies the PHY clock rate in low power mode when connected to a
+ * Low Speed device in host mode. This parameter is applicable only if
+ * HOST_SUPPORT_FS_LS_LOW_POWER is enabled. If PHY_TYPE is set to FS
+ * then defaults to 6 MHZ otherwise 48 MHZ.
+ *
+ * 0 - 48 MHz
+ * 1 - 6 MHz
+ */
+extern int dwc_otg_set_param_host_ls_low_power_phy_clk(dwc_otg_core_if_t *
+						       core_if, int32_t val);
+extern int32_t dwc_otg_get_param_host_ls_low_power_phy_clk(dwc_otg_core_if_t *
+							   core_if);
+#define dwc_param_host_ls_low_power_phy_clk_default 0
+#define DWC_HOST_LS_LOW_POWER_PHY_CLK_PARAM_48MHZ 0
+#define DWC_HOST_LS_LOW_POWER_PHY_CLK_PARAM_6MHZ 1
+
+/**
+ * 0 - Use cC FIFO size parameters
+ * 1 - Allow dynamic FIFO sizing (default)
+ */
+extern int dwc_otg_set_param_enable_dynamic_fifo(dwc_otg_core_if_t * core_if,
+						 int32_t val);
+extern int32_t dwc_otg_get_param_enable_dynamic_fifo(dwc_otg_core_if_t *
+						     core_if);
+#define dwc_param_enable_dynamic_fifo_default 1
+
+/** Total number of 4-byte words in the data FIFO memory. This
+ * memory includes the Rx FIFO, non-periodic Tx FIFO, and periodic
+ * Tx FIFOs.
+ * 32 to 32768 (default 8192)
+ * Note: The total FIFO memory depth in the FPGA configuration is 8192.
+ */
+extern int dwc_otg_set_param_data_fifo_size(dwc_otg_core_if_t * core_if,
+					    int32_t val);
+extern int32_t dwc_otg_get_param_data_fifo_size(dwc_otg_core_if_t * core_if);
+#define dwc_param_data_fifo_size_default 8192
+
+/** Number of 4-byte words in the Rx FIFO in device mode when dynamic
+ * FIFO sizing is enabled.
+ * 16 to 32768 (default 1064)
+ */
+extern int dwc_otg_set_param_dev_rx_fifo_size(dwc_otg_core_if_t * core_if,
+					      int32_t val);
+extern int32_t dwc_otg_get_param_dev_rx_fifo_size(dwc_otg_core_if_t * core_if);
+#define dwc_param_dev_rx_fifo_size_default 1064
+
+/** Number of 4-byte words in the non-periodic Tx FIFO in device mode
+ * when dynamic FIFO sizing is enabled.
+ * 16 to 32768 (default 1024)
+ */
+extern int dwc_otg_set_param_dev_nperio_tx_fifo_size(dwc_otg_core_if_t *
+						     core_if, int32_t val);
+extern int32_t dwc_otg_get_param_dev_nperio_tx_fifo_size(dwc_otg_core_if_t *
+							 core_if);
+#define dwc_param_dev_nperio_tx_fifo_size_default 1024
+
+/** Number of 4-byte words in each of the periodic Tx FIFOs in device
+ * mode when dynamic FIFO sizing is enabled.
+ * 4 to 768 (default 256)
+ */
+extern int dwc_otg_set_param_dev_perio_tx_fifo_size(dwc_otg_core_if_t * core_if,
+						    int32_t val, int fifo_num);
+extern int32_t dwc_otg_get_param_dev_perio_tx_fifo_size(dwc_otg_core_if_t *
+							core_if, int fifo_num);
+#define dwc_param_dev_perio_tx_fifo_size_default 256
+
+/** Number of 4-byte words in the Rx FIFO in host mode when dynamic
+ * FIFO sizing is enabled.
+ * 16 to 32768 (default 1024)
+ */
+extern int dwc_otg_set_param_host_rx_fifo_size(dwc_otg_core_if_t * core_if,
+					       int32_t val);
+extern int32_t dwc_otg_get_param_host_rx_fifo_size(dwc_otg_core_if_t * core_if);
+#define dwc_param_host_rx_fifo_size_default 1024
+
+/** Number of 4-byte words in the non-periodic Tx FIFO in host mode
+ * when Dynamic FIFO sizing is enabled in the core.
+ * 16 to 32768 (default 1024)
+ */
+extern int dwc_otg_set_param_host_nperio_tx_fifo_size(dwc_otg_core_if_t *
+						      core_if, int32_t val);
+extern int32_t dwc_otg_get_param_host_nperio_tx_fifo_size(dwc_otg_core_if_t *
+							  core_if);
+#define dwc_param_host_nperio_tx_fifo_size_default 1024
+
+/** Number of 4-byte words in the host periodic Tx FIFO when dynamic
+ * FIFO sizing is enabled.
+ * 16 to 32768 (default 1024)
+ */
+extern int dwc_otg_set_param_host_perio_tx_fifo_size(dwc_otg_core_if_t *
+						     core_if, int32_t val);
+extern int32_t dwc_otg_get_param_host_perio_tx_fifo_size(dwc_otg_core_if_t *
+							 core_if);
+#define dwc_param_host_perio_tx_fifo_size_default 1024
+
+/** The maximum transfer size supported in bytes.
+ * 2047 to 65,535  (default 65,535)
+ */
+extern int dwc_otg_set_param_max_transfer_size(dwc_otg_core_if_t * core_if,
+					       int32_t val);
+extern int32_t dwc_otg_get_param_max_transfer_size(dwc_otg_core_if_t * core_if);
+#define dwc_param_max_transfer_size_default 65535
+
+/** The maximum number of packets in a transfer.
+ * 15 to 511  (default 511)
+ */
+extern int dwc_otg_set_param_max_packet_count(dwc_otg_core_if_t * core_if,
+					      int32_t val);
+extern int32_t dwc_otg_get_param_max_packet_count(dwc_otg_core_if_t * core_if);
+#define dwc_param_max_packet_count_default 511
+
+/** The number of host channel registers to use.
+ * 1 to 16 (default 12)
+ * Note: The FPGA configuration supports a maximum of 12 host channels.
+ */
+extern int dwc_otg_set_param_host_channels(dwc_otg_core_if_t * core_if,
+					   int32_t val);
+extern int32_t dwc_otg_get_param_host_channels(dwc_otg_core_if_t * core_if);
+#define dwc_param_host_channels_default 6
+
+/** The number of endpoints in addition to EP0 available for device
+ * mode operations.
+ * 1 to 15 (default 6 IN and OUT)
+ * Note: The FPGA configuration supports a maximum of 6 IN and OUT
+ * endpoints in addition to EP0.
+ */
+extern int dwc_otg_set_param_dev_endpoints(dwc_otg_core_if_t * core_if,
+					   int32_t val);
+extern int32_t dwc_otg_get_param_dev_endpoints(dwc_otg_core_if_t * core_if);
+#define dwc_param_dev_endpoints_default 2
+
+/**
+ * Specifies the type of PHY interface to use. By default, the driver
+ * will automatically detect the phy_type.
+ *
+ * 0 - Full Speed PHY
+ * 1 - UTMI+ (default)
+ * 2 - ULPI
+ */
+extern int dwc_otg_set_param_phy_type(dwc_otg_core_if_t * core_if, int32_t val);
+extern int32_t dwc_otg_get_param_phy_type(dwc_otg_core_if_t * core_if);
+#define DWC_PHY_TYPE_PARAM_FS 0
+#define DWC_PHY_TYPE_PARAM_UTMI 1
+#define DWC_PHY_TYPE_PARAM_ULPI 2
+#define dwc_param_phy_type_default DWC_PHY_TYPE_PARAM_UTMI
+
+/**
+ * Specifies the UTMI+ Data Width. This parameter is
+ * applicable for a PHY_TYPE of UTMI+ or ULPI. (For a ULPI
+ * PHY_TYPE, this parameter indicates the data width between
+ * the MAC and the ULPI Wrapper.) Also, this parameter is
+ * applicable only if the OTG_HSPHY_WIDTH cC parameter was set
+ * to "8 and 16 bits", meaning that the core has been
+ * configured to work at either data path width.
+ *
+ * 8 or 16 bits (default 16)
+ */
+extern int dwc_otg_set_param_phy_utmi_width(dwc_otg_core_if_t * core_if,
+					    int32_t val);
+extern int32_t dwc_otg_get_param_phy_utmi_width(dwc_otg_core_if_t * core_if);
+#define dwc_param_phy_utmi_width_default 16
+
+/**
+ * Specifies whether the ULPI operates at double or single
+ * data rate. This parameter is only applicable if PHY_TYPE is
+ * ULPI.
+ *
+ * 0 - single data rate ULPI interface with 8 bit wide data
+ * bus (default)
+ * 1 - double data rate ULPI interface with 4 bit wide data
+ * bus
+ */
+extern int dwc_otg_set_param_phy_ulpi_ddr(dwc_otg_core_if_t * core_if,
+					  int32_t val);
+extern int32_t dwc_otg_get_param_phy_ulpi_ddr(dwc_otg_core_if_t * core_if);
+#define dwc_param_phy_ulpi_ddr_default 0
+
+/**
+ * Specifies whether to use the internal or external supply to
+ * drive the vbus with a ULPI phy.
+ */
+extern int dwc_otg_set_param_phy_ulpi_ext_vbus(dwc_otg_core_if_t * core_if,
+					       int32_t val);
+extern int32_t dwc_otg_get_param_phy_ulpi_ext_vbus(dwc_otg_core_if_t * core_if);
+#define DWC_PHY_ULPI_INTERNAL_VBUS 0
+#define DWC_PHY_ULPI_EXTERNAL_VBUS 1
+#define dwc_param_phy_ulpi_ext_vbus_default DWC_PHY_ULPI_INTERNAL_VBUS
+
+/**
+ * Specifies whether to use the I2Cinterface for full speed PHY. This
+ * parameter is only applicable if PHY_TYPE is FS.
+ * 0 - No (default)
+ * 1 - Yes
+ */
+extern int dwc_otg_set_param_i2c_enable(dwc_otg_core_if_t * core_if,
+					int32_t val);
+extern int32_t dwc_otg_get_param_i2c_enable(dwc_otg_core_if_t * core_if);
+#define dwc_param_i2c_enable_default 0
+
+extern int dwc_otg_set_param_ulpi_fs_ls(dwc_otg_core_if_t * core_if,
+					int32_t val);
+extern int32_t dwc_otg_get_param_ulpi_fs_ls(dwc_otg_core_if_t * core_if);
+#define dwc_param_ulpi_fs_ls_default 0
+
+extern int dwc_otg_set_param_ts_dline(dwc_otg_core_if_t * core_if, int32_t val);
+extern int32_t dwc_otg_get_param_ts_dline(dwc_otg_core_if_t * core_if);
+#define dwc_param_ts_dline_default 0
+
+/**
+ * Specifies whether dedicated transmit FIFOs are
+ * enabled for non periodic IN endpoints in device mode
+ * 0 - No
+ * 1 - Yes
+ */
+extern int dwc_otg_set_param_en_multiple_tx_fifo(dwc_otg_core_if_t * core_if,
+						 int32_t val);
+extern int32_t dwc_otg_get_param_en_multiple_tx_fifo(dwc_otg_core_if_t *
+						     core_if);
+#define dwc_param_en_multiple_tx_fifo_default 1
+
+/** Number of 4-byte words in each of the Tx FIFOs in device
+ * mode when dynamic FIFO sizing is enabled.
+ * 4 to 768 (default 256)
+ */
+extern int dwc_otg_set_param_dev_tx_fifo_size(dwc_otg_core_if_t * core_if,
+					      int fifo_num, int32_t val);
+extern int32_t dwc_otg_get_param_dev_tx_fifo_size(dwc_otg_core_if_t * core_if,
+						  int fifo_num);
+#define dwc_param_dev_tx_fifo_size_default 768
+
+/** Thresholding enable flag-
+ * bit 0 - enable non-ISO Tx thresholding
+ * bit 1 - enable ISO Tx thresholding
+ * bit 2 - enable Rx thresholding
+ */
+extern int dwc_otg_set_param_thr_ctl(dwc_otg_core_if_t * core_if, int32_t val);
+extern int32_t dwc_otg_get_thr_ctl(dwc_otg_core_if_t * core_if, int fifo_num);
+#define dwc_param_thr_ctl_default 0
+
+/** Thresholding length for Tx
+ * FIFOs in 32 bit DWORDs
+ */
+extern int dwc_otg_set_param_tx_thr_length(dwc_otg_core_if_t * core_if,
+					   int32_t val);
+extern int32_t dwc_otg_get_tx_thr_length(dwc_otg_core_if_t * core_if);
+#define dwc_param_tx_thr_length_default 64
+
+/** Thresholding length for Rx
+ *	FIFOs in 32 bit DWORDs
+ */
+extern int dwc_otg_set_param_rx_thr_length(dwc_otg_core_if_t * core_if,
+					   int32_t val);
+extern int32_t dwc_otg_get_rx_thr_length(dwc_otg_core_if_t * core_if);
+#define dwc_param_rx_thr_length_default 64
+
+/**
+ * Specifies whether LPM (Link Power Management) support is enabled
+ */
+extern int dwc_otg_set_param_lpm_enable(dwc_otg_core_if_t * core_if,
+					int32_t val);
+extern int32_t dwc_otg_get_param_lpm_enable(dwc_otg_core_if_t * core_if);
+#define dwc_param_lpm_enable_default 1
+
+/**
+ * Specifies whether PTI enhancement is enabled
+ */
+extern int dwc_otg_set_param_pti_enable(dwc_otg_core_if_t * core_if,
+					int32_t val);
+extern int32_t dwc_otg_get_param_pti_enable(dwc_otg_core_if_t * core_if);
+#define dwc_param_pti_enable_default 0
+
+/**
+ * Specifies whether MPI enhancement is enabled
+ */
+extern int dwc_otg_set_param_mpi_enable(dwc_otg_core_if_t * core_if,
+					int32_t val);
+extern int32_t dwc_otg_get_param_mpi_enable(dwc_otg_core_if_t * core_if);
+#define dwc_param_mpi_enable_default 0
+
+/**
+ * Specifies whether ADP capability is enabled
+ */
+extern int dwc_otg_set_param_adp_enable(dwc_otg_core_if_t * core_if,
+					int32_t val);
+extern int32_t dwc_otg_get_param_adp_enable(dwc_otg_core_if_t * core_if);
+#define dwc_param_adp_enable_default 0
+
+/**
+ * Specifies whether IC_USB capability is enabled
+ */
+
+extern int dwc_otg_set_param_ic_usb_cap(dwc_otg_core_if_t * core_if,
+					int32_t val);
+extern int32_t dwc_otg_get_param_ic_usb_cap(dwc_otg_core_if_t * core_if);
+#define dwc_param_ic_usb_cap_default 0
+
+extern int dwc_otg_set_param_ahb_thr_ratio(dwc_otg_core_if_t * core_if,
+					   int32_t val);
+extern int32_t dwc_otg_get_param_ahb_thr_ratio(dwc_otg_core_if_t * core_if);
+#define dwc_param_ahb_thr_ratio_default 0
+
+extern int dwc_otg_set_param_power_down(dwc_otg_core_if_t * core_if,
+					int32_t val);
+extern int32_t dwc_otg_get_param_power_down(dwc_otg_core_if_t * core_if);
+#define dwc_param_power_down_default 0
+
+extern int dwc_otg_set_param_reload_ctl(dwc_otg_core_if_t * core_if,
+					int32_t val);
+extern int32_t dwc_otg_get_param_reload_ctl(dwc_otg_core_if_t * core_if);
+#define dwc_param_reload_ctl_default 0
+
+extern int dwc_otg_set_param_dev_out_nak(dwc_otg_core_if_t * core_if,
+										int32_t val);
+extern int32_t dwc_otg_get_param_dev_out_nak(dwc_otg_core_if_t * core_if);
+#define dwc_param_dev_out_nak_default 0
+
+extern int dwc_otg_set_param_otg_ver(dwc_otg_core_if_t * core_if, int32_t val);
+extern int32_t dwc_otg_get_param_otg_ver(dwc_otg_core_if_t * core_if);
+#define dwc_param_otg_ver_default 1
+
+/** @} */
+
+/** @name Access to registers and bit-fields */
+
+/**
+ * Dump core registers and SPRAM
+ */
+extern void dwc_otg_dump_dev_registers(dwc_otg_core_if_t * _core_if);
+extern void dwc_otg_dump_spram(dwc_otg_core_if_t * _core_if);
+extern void dwc_otg_dump_host_registers(dwc_otg_core_if_t * _core_if);
+extern void dwc_otg_dump_global_registers(dwc_otg_core_if_t * _core_if);
+
+/**
+ * Get host negotiation status.
+ */
+extern uint32_t dwc_otg_get_hnpstatus(dwc_otg_core_if_t * core_if);
+
+/**
+ * Get srp status
+ */
+extern uint32_t dwc_otg_get_srpstatus(dwc_otg_core_if_t * core_if);
+
+/**
+ * Set hnpreq bit in the GOTGCTL register.
+ */
+extern void dwc_otg_set_hnpreq(dwc_otg_core_if_t * core_if, uint32_t val);
+
+/**
+ * Get Content of SNPSID register.
+ */
+extern uint32_t dwc_otg_get_gsnpsid(dwc_otg_core_if_t * core_if);
+
+/**
+ * Get current mode.
+ * Returns 0 if in device mode, and 1 if in host mode.
+ */
+extern uint32_t dwc_otg_get_mode(dwc_otg_core_if_t * core_if);
+
+/**
+ * Get value of hnpcapable field in the GUSBCFG register
+ */
+extern uint32_t dwc_otg_get_hnpcapable(dwc_otg_core_if_t * core_if);
+/**
+ * Set value of hnpcapable field in the GUSBCFG register
+ */
+extern void dwc_otg_set_hnpcapable(dwc_otg_core_if_t * core_if, uint32_t val);
+
+/**
+ * Get value of srpcapable field in the GUSBCFG register
+ */
+extern uint32_t dwc_otg_get_srpcapable(dwc_otg_core_if_t * core_if);
+/**
+ * Set value of srpcapable field in the GUSBCFG register
+ */
+extern void dwc_otg_set_srpcapable(dwc_otg_core_if_t * core_if, uint32_t val);
+
+/**
+ * Get value of devspeed field in the DCFG register
+ */
+extern uint32_t dwc_otg_get_devspeed(dwc_otg_core_if_t * core_if);
+/**
+ * Set value of devspeed field in the DCFG register
+ */
+extern void dwc_otg_set_devspeed(dwc_otg_core_if_t * core_if, uint32_t val);
+
+/**
+ * Get the value of busconnected field from the HPRT0 register
+ */
+extern uint32_t dwc_otg_get_busconnected(dwc_otg_core_if_t * core_if);
+
+/**
+ * Gets the device enumeration Speed.
+ */
+extern uint32_t dwc_otg_get_enumspeed(dwc_otg_core_if_t * core_if);
+
+/**
+ * Get value of prtpwr field from the HPRT0 register
+ */
+extern uint32_t dwc_otg_get_prtpower(dwc_otg_core_if_t * core_if);
+
+/**
+ * Get value of flag indicating core state - hibernated or not
+ */
+extern uint32_t dwc_otg_get_core_state(dwc_otg_core_if_t * core_if);
+
+/**
+ * Set value of prtpwr field from the HPRT0 register
+ */
+extern void dwc_otg_set_prtpower(dwc_otg_core_if_t * core_if, uint32_t val);
+
+/**
+ * Get value of prtsusp field from the HPRT0 regsiter
+ */
+extern uint32_t dwc_otg_get_prtsuspend(dwc_otg_core_if_t * core_if);
+/**
+ * Set value of prtpwr field from the HPRT0 register
+ */
+extern void dwc_otg_set_prtsuspend(dwc_otg_core_if_t * core_if, uint32_t val);
+
+/**
+ * Get value of ModeChTimEn field from the HCFG regsiter
+ */
+extern uint32_t dwc_otg_get_mode_ch_tim(dwc_otg_core_if_t * core_if);
+/**
+ * Set value of ModeChTimEn field from the HCFG regsiter
+ */
+extern void dwc_otg_set_mode_ch_tim(dwc_otg_core_if_t * core_if, uint32_t val);
+
+/**
+ * Get value of Fram Interval field from the HFIR regsiter
+ */
+extern uint32_t dwc_otg_get_fr_interval(dwc_otg_core_if_t * core_if);
+/**
+ * Set value of Frame Interval field from the HFIR regsiter
+ */
+extern void dwc_otg_set_fr_interval(dwc_otg_core_if_t * core_if, uint32_t val);
+
+/**
+ * Set value of prtres field from the HPRT0 register
+ *FIXME Remove?
+ */
+extern void dwc_otg_set_prtresume(dwc_otg_core_if_t * core_if, uint32_t val);
+
+/**
+ * Get value of rmtwkupsig bit in DCTL register
+ */
+extern uint32_t dwc_otg_get_remotewakesig(dwc_otg_core_if_t * core_if);
+
+/**
+ * Get value of prt_sleep_sts field from the GLPMCFG register
+ */
+extern uint32_t dwc_otg_get_lpm_portsleepstatus(dwc_otg_core_if_t * core_if);
+
+/**
+ * Get value of rem_wkup_en field from the GLPMCFG register
+ */
+extern uint32_t dwc_otg_get_lpm_remotewakeenabled(dwc_otg_core_if_t * core_if);
+
+/**
+ * Get value of appl_resp field from the GLPMCFG register
+ */
+extern uint32_t dwc_otg_get_lpmresponse(dwc_otg_core_if_t * core_if);
+/**
+ * Set value of appl_resp field from the GLPMCFG register
+ */
+extern void dwc_otg_set_lpmresponse(dwc_otg_core_if_t * core_if, uint32_t val);
+
+/**
+ * Get value of hsic_connect field from the GLPMCFG register
+ */
+extern uint32_t dwc_otg_get_hsic_connect(dwc_otg_core_if_t * core_if);
+/**
+ * Set value of hsic_connect field from the GLPMCFG register
+ */
+extern void dwc_otg_set_hsic_connect(dwc_otg_core_if_t * core_if, uint32_t val);
+
+/**
+ * Get value of inv_sel_hsic field from the GLPMCFG register.
+ */
+extern uint32_t dwc_otg_get_inv_sel_hsic(dwc_otg_core_if_t * core_if);
+/**
+ * Set value of inv_sel_hsic field from the GLPMFG register.
+ */
+extern void dwc_otg_set_inv_sel_hsic(dwc_otg_core_if_t * core_if, uint32_t val);
+
+/*
+ * Some functions for accessing registers
+ */
+
+/**
+ *  GOTGCTL register
+ */
+extern uint32_t dwc_otg_get_gotgctl(dwc_otg_core_if_t * core_if);
+extern void dwc_otg_set_gotgctl(dwc_otg_core_if_t * core_if, uint32_t val);
+
+/**
+ * GUSBCFG register
+ */
+extern uint32_t dwc_otg_get_gusbcfg(dwc_otg_core_if_t * core_if);
+extern void dwc_otg_set_gusbcfg(dwc_otg_core_if_t * core_if, uint32_t val);
+
+/**
+ * GRXFSIZ register
+ */
+extern uint32_t dwc_otg_get_grxfsiz(dwc_otg_core_if_t * core_if);
+extern void dwc_otg_set_grxfsiz(dwc_otg_core_if_t * core_if, uint32_t val);
+
+/**
+ * GNPTXFSIZ register
+ */
+extern uint32_t dwc_otg_get_gnptxfsiz(dwc_otg_core_if_t * core_if);
+extern void dwc_otg_set_gnptxfsiz(dwc_otg_core_if_t * core_if, uint32_t val);
+
+extern uint32_t dwc_otg_get_gpvndctl(dwc_otg_core_if_t * core_if);
+extern void dwc_otg_set_gpvndctl(dwc_otg_core_if_t * core_if, uint32_t val);
+
+/**
+ * GGPIO register
+ */
+extern uint32_t dwc_otg_get_ggpio(dwc_otg_core_if_t * core_if);
+extern void dwc_otg_set_ggpio(dwc_otg_core_if_t * core_if, uint32_t val);
+
+/**
+ * GUID register
+ */
+extern uint32_t dwc_otg_get_guid(dwc_otg_core_if_t * core_if);
+extern void dwc_otg_set_guid(dwc_otg_core_if_t * core_if, uint32_t val);
+
+/**
+ * HPRT0 register
+ */
+extern uint32_t dwc_otg_get_hprt0(dwc_otg_core_if_t * core_if);
+extern void dwc_otg_set_hprt0(dwc_otg_core_if_t * core_if, uint32_t val);
+
+/**
+ * GHPTXFSIZE
+ */
+extern uint32_t dwc_otg_get_hptxfsiz(dwc_otg_core_if_t * core_if);
+
+/** @} */
+
+#endif				/* __DWC_CORE_IF_H__ */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_dbg.h linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_dbg.h
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_dbg.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_dbg.h	2017-09-23 03:42:50.214674465 +0800
@@ -0,0 +1,122 @@
+/* ==========================================================================
+ *
+ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+ * otherwise expressly agreed to in writing between Synopsys and you.
+ * 
+ * The Software IS NOT an item of Licensed Software or Licensed Product under
+ * any End User Software License Agreement or Agreement for Licensed Product
+ * with Synopsys or any supplement thereto. You are permitted to use and
+ * redistribute this Software in source and binary forms, with or without
+ * modification, provided that redistributions of source code must retain this
+ * notice. You may not view, use, disclose, copy or distribute this file or
+ * any information contained herein except pursuant to this license grant from
+ * Synopsys. If you do not agree with this notice, including the disclaimer
+ * below, then you are not authorized to use the Software.
+ * 
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================== */
+
+#ifndef __DWC_OTG_DBG_H__
+#define __DWC_OTG_DBG_H__
+
+/** @file
+ * This file defines debug levels.
+ * Debugging support vanishes in non-debug builds.  
+ */
+
+/**
+ * The Debug Level bit-mask variable.
+ */
+extern uint32_t g_dbg_lvl;
+/**
+ * Set the Debug Level variable.
+ */
+static inline uint32_t SET_DEBUG_LEVEL(const uint32_t new)
+{
+	uint32_t old = g_dbg_lvl;
+	g_dbg_lvl = new;
+	return old;
+}
+
+/** When debug level has the DBG_CIL bit set, display CIL Debug messages. */
+#define DBG_CIL		(0x2)
+/** When debug level has the DBG_CILV bit set, display CIL Verbose debug
+ * messages */
+#define DBG_CILV	(0x20)
+/**  When debug level has the DBG_PCD bit set, display PCD (Device) debug
+ *  messages */
+#define DBG_PCD		(0x4)
+/** When debug level has the DBG_PCDV set, display PCD (Device) Verbose debug
+ * messages */
+#define DBG_PCDV	(0x40)
+/** When debug level has the DBG_HCD bit set, display Host debug messages */
+#define DBG_HCD		(0x8)
+/** When debug level has the DBG_HCDV bit set, display Verbose Host debug
+ * messages */
+#define DBG_HCDV	(0x80)
+/** When debug level has the DBG_HCD_URB bit set, display enqueued URBs in host
+ *  mode. */
+#define DBG_HCD_URB	(0x800)
+
+/** When debug level has any bit set, display debug messages */
+#define DBG_ANY		(0xFF)
+
+/** All debug messages off */
+#define DBG_OFF		0
+
+/** Prefix string for DWC_DEBUG print macros. */
+#define USB_DWC "DWC_otg: "
+
+/** 
+ * Print a debug message when the Global debug level variable contains
+ * the bit defined in <code>lvl</code>.
+ *
+ * @param[in] lvl - Debug level, use one of the DBG_ constants above.
+ * @param[in] x - like printf
+ *
+ *    Example:<p>
+ * <code>
+ *      DWC_DEBUGPL( DBG_ANY, "%s(%p)\n", __func__, _reg_base_addr);
+ * </code>
+ * <br>
+ * results in:<br> 
+ * <code>
+ * usb-DWC_otg: dwc_otg_cil_init(ca867000)
+ * </code>
+ */
+#ifdef DEBUG
+
+#if 1
+# define DWC_DEBUGPL(lvl, x...) do{ if ((lvl)&g_dbg_lvl)__DWC_DEBUG(USB_DWC x ); }while(0)
+#else
+# define DWC_DEBUGPL(lvl, x...) do{ if ((lvl)&g_dbg_lvl) {\
+				__DWC_DEBUG("%s:%d--", __func__, __LINE__); \
+				__DWC_DEBUG(USB_DWC x); \
+				__DWC_DEBUG("\n"); \
+				}}while(0)
+#endif
+
+# define DWC_DEBUGP(x...)	DWC_DEBUGPL(DBG_ANY, x )
+
+# define CHK_DEBUG_LEVEL(level) ((level) & g_dbg_lvl)
+
+#else
+
+# define DWC_DEBUGPL(lvl, x...) do{}while(0)
+# define DWC_DEBUGP(x...)
+
+# define CHK_DEBUG_LEVEL(level) (0)
+
+#endif /*DEBUG*/
+#endif
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/.dwc_otg_dbg.h.swp linux-3.0.82x/drivers/usb/gadget/dwc/driver/.dwc_otg_dbg.h.swp
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diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_driver.c linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_driver.c
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_driver.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_driver.c	2017-09-23 03:42:50.214674465 +0800
@@ -0,0 +1,1536 @@
+/* ==========================================================================
+ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_driver.c $
+ * $Revision: #89 $
+ * $Date: 2011/05/17 $
+ * $Change: 1774110 $
+ *
+ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+ * otherwise expressly agreed to in writing between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product under
+ * any End User Software License Agreement or Agreement for Licensed Product
+ * with Synopsys or any supplement thereto. You are permitted to use and
+ * redistribute this Software in source and binary forms, with or without
+ * modification, provided that redistributions of source code must retain this
+ * notice. You may not view, use, disclose, copy or distribute this file or
+ * any information contained herein except pursuant to this license grant from
+ * Synopsys. If you do not agree with this notice, including the disclaimer
+ * below, then you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================== */
+
+/** @file
+ * The dwc_otg_driver module provides the initialization and cleanup entry
+ * points for the DWC_otg driver. This module will be dynamically installed
+ * after Linux is booted using the insmod command. When the module is
+ * installed, the dwc_otg_driver_init function is called. When the module is
+ * removed (using rmmod), the dwc_otg_driver_cleanup function is called.
+ *
+ * This module also defines a data structure for the dwc_otg_driver, which is
+ * used in conjunction with the standard ARM lm_device structure. These
+ * structures allow the OTG driver to comply with the standard Linux driver
+ * model in which devices and drivers are registered with a bus driver. This
+ * has the benefit that Linux can expose attributes of the driver and device
+ * in its special sysfs file system. Users can then read or write files in
+ * this file system to perform diagnostics on the driver components or the
+ * device.
+ */
+
+#include "dwc_otg_os_dep.h"
+#include "dwc_os.h"
+#include "dwc_otg_dbg.h"
+#include "dwc_otg_driver.h"
+#include "dwc_otg_attr.h"
+#include "dwc_otg_core_if.h"
+#include "dwc_otg_pcd_if.h"
+#include "dwc_otg_hcd_if.h"
+
+#define DWC_DRIVER_VERSION	"2.93a 15-MAY-2011"
+#define DWC_DRIVER_DESC		"HS OTG USB Controller driver"
+
+static const char dwc_driver_name[] = "dwc_otg";
+
+extern int pcd_init(
+#ifdef LM_INTERFACE
+			   struct lm_device *_dev
+#elif  defined(PCI_INTERFACE)
+			   struct pci_dev *_dev
+#endif
+    );
+extern int hcd_init(
+#ifdef LM_INTERFACE
+			   struct lm_device *_dev
+#elif  defined(PCI_INTERFACE)
+			   struct pci_dev *_dev
+#endif
+    );
+
+extern int pcd_remove(
+#ifdef LM_INTERFACE
+			     struct lm_device *_dev
+#elif  defined(PCI_INTERFACE)
+			     struct pci_dev *_dev
+#endif
+    );
+
+extern void hcd_remove(
+#ifdef LM_INTERFACE
+			      struct lm_device *_dev
+#elif  defined(PCI_INTERFACE)
+			      struct pci_dev *_dev
+#endif
+    );
+
+extern void dwc_otg_adp_start(dwc_otg_core_if_t * core_if);
+
+/*-------------------------------------------------------------------------*/
+/* Encapsulate the module parameter settings */
+
+struct dwc_otg_driver_module_params {
+	int32_t opt;
+	int32_t otg_cap;
+	int32_t dma_enable;
+	int32_t dma_desc_enable;
+	int32_t dma_burst_size;
+	int32_t speed;
+	int32_t host_support_fs_ls_low_power;
+	int32_t host_ls_low_power_phy_clk;
+	int32_t enable_dynamic_fifo;
+	int32_t data_fifo_size;
+	int32_t dev_rx_fifo_size;
+	int32_t dev_nperio_tx_fifo_size;
+	uint32_t dev_perio_tx_fifo_size[MAX_PERIO_FIFOS];
+	int32_t host_rx_fifo_size;
+	int32_t host_nperio_tx_fifo_size;
+	int32_t host_perio_tx_fifo_size;
+	int32_t max_transfer_size;
+	int32_t max_packet_count;
+	int32_t host_channels;
+	int32_t dev_endpoints;
+	int32_t phy_type;
+	int32_t phy_utmi_width;
+	int32_t phy_ulpi_ddr;
+	int32_t phy_ulpi_ext_vbus;
+	int32_t i2c_enable;
+	int32_t ulpi_fs_ls;
+	int32_t ts_dline;
+	int32_t en_multiple_tx_fifo;
+	uint32_t dev_tx_fifo_size[MAX_TX_FIFOS];
+	uint32_t thr_ctl;
+	uint32_t tx_thr_length;
+	uint32_t rx_thr_length;
+	int32_t pti_enable;
+	int32_t mpi_enable;
+	int32_t lpm_enable;
+	int32_t ic_usb_cap;
+	int32_t ahb_thr_ratio;
+	int32_t power_down;
+	int32_t reload_ctl;
+	int32_t dev_out_nak;
+	int32_t otg_ver;
+	int32_t adp_enable;
+};
+
+static struct dwc_otg_driver_module_params dwc_otg_module_params = {
+	.opt = -1,
+//	.otg_cap = -1,
+	.otg_cap = 2,
+	.dma_enable = -1,
+	.dma_desc_enable = -1,
+	.dma_burst_size = -1,
+	.speed = -1,
+	.host_support_fs_ls_low_power = -1,
+	.host_ls_low_power_phy_clk = -1,
+	.enable_dynamic_fifo = -1,
+	.data_fifo_size = -1,
+	.dev_rx_fifo_size = -1,
+	.dev_nperio_tx_fifo_size = -1,
+	.dev_perio_tx_fifo_size = {
+				   /* dev_perio_tx_fifo_size_1 */
+				   -1,
+				   -1,
+				   -1,
+				   -1,
+				   -1,
+				   -1,
+				   -1,
+				   -1,
+				   -1,
+				   -1,
+				   -1,
+				   -1,
+				   -1,
+				   -1,
+				   -1
+				   /* 15 */
+				   },
+	.host_rx_fifo_size = -1,
+	.host_nperio_tx_fifo_size = -1,
+	.host_perio_tx_fifo_size = -1,
+	.max_transfer_size = -1,
+	.max_packet_count = -1,
+	.host_channels = -1,
+	.dev_endpoints = -1,
+	.phy_type = -1,
+	.phy_utmi_width = -1,
+	.phy_ulpi_ddr = -1,
+	.phy_ulpi_ext_vbus = -1,
+	.i2c_enable = -1,
+	.ulpi_fs_ls = -1,
+	.ts_dline = -1,
+	.en_multiple_tx_fifo = -1,
+	.dev_tx_fifo_size = {
+			     /* dev_tx_fifo_size */
+			     -1,
+			     -1,
+			     -1,
+			     -1,
+			     -1,
+			     -1,
+			     -1,
+			     -1,
+			     -1,
+			     -1,
+			     -1,
+			     -1,
+			     -1,
+			     -1,
+			     -1
+			     /* 15 */
+			     },
+	.thr_ctl = -1,
+	.tx_thr_length = -1,
+	.rx_thr_length = -1,
+	.pti_enable = -1,
+	.mpi_enable = -1,
+	.lpm_enable = -1,
+	.ic_usb_cap = -1,
+	.ahb_thr_ratio = -1,
+	.power_down = -1,
+	.reload_ctl = -1,
+	.dev_out_nak = -1,
+	.otg_ver = -1,
+	.adp_enable = -1,
+};
+
+/**
+ * This function shows the Driver Version.
+ */
+static ssize_t version_show(struct device_driver *dev, char *buf)
+{
+	return snprintf(buf, sizeof(DWC_DRIVER_VERSION) + 2, "%s\n",
+			DWC_DRIVER_VERSION);
+}
+
+static DRIVER_ATTR(version, S_IRUGO, version_show, NULL);
+
+/**
+ * Global Debug Level Mask.
+ */
+uint32_t g_dbg_lvl = 0;		/* OFF */
+uint32_t intep_disable = 0;
+
+/**
+ * This function shows the driver Debug Level.
+ */
+static ssize_t dbg_level_show(struct device_driver *drv, char *buf)
+{
+	return sprintf(buf, "0x%0x\n", g_dbg_lvl);
+}
+
+/**
+ * This function stores the driver Debug Level.
+ */
+static ssize_t dbg_level_store(struct device_driver *drv, const char *buf,
+			       size_t count)
+{
+	g_dbg_lvl = simple_strtoul(buf, NULL, 16);
+	return count;
+}
+
+static DRIVER_ATTR(debuglevel, S_IRUGO | S_IWUSR, dbg_level_show,
+		   dbg_level_store);
+
+/**
+ * This function is called during module intialization
+ * to pass module parameters to the DWC_OTG CORE.
+ */
+static int set_parameters(dwc_otg_core_if_t * core_if)
+{
+	int retval = 0;
+	int i;
+
+	if (dwc_otg_module_params.otg_cap != -1) {
+		retval +=
+		    dwc_otg_set_param_otg_cap(core_if,
+					      dwc_otg_module_params.otg_cap);
+	}
+	if (dwc_otg_module_params.dma_enable != -1) {
+		retval +=
+		    dwc_otg_set_param_dma_enable(core_if,
+						 dwc_otg_module_params.
+						 dma_enable);
+	}
+	if (dwc_otg_module_params.dma_desc_enable != -1) {
+		retval +=
+		    dwc_otg_set_param_dma_desc_enable(core_if,
+						      dwc_otg_module_params.
+						      dma_desc_enable);
+	}
+	if (dwc_otg_module_params.opt != -1) {
+		retval +=
+		    dwc_otg_set_param_opt(core_if, dwc_otg_module_params.opt);
+	}
+	if (dwc_otg_module_params.dma_burst_size != -1) {
+		retval +=
+		    dwc_otg_set_param_dma_burst_size(core_if,
+						     dwc_otg_module_params.
+						     dma_burst_size);
+	}
+	if (dwc_otg_module_params.host_support_fs_ls_low_power != -1) {
+		retval +=
+		    dwc_otg_set_param_host_support_fs_ls_low_power(core_if,
+								   dwc_otg_module_params.
+								   host_support_fs_ls_low_power);
+	}
+	if (dwc_otg_module_params.enable_dynamic_fifo != -1) {
+		retval +=
+		    dwc_otg_set_param_enable_dynamic_fifo(core_if,
+							  dwc_otg_module_params.
+							  enable_dynamic_fifo);
+	}
+	if (dwc_otg_module_params.data_fifo_size != -1) {
+		retval +=
+		    dwc_otg_set_param_data_fifo_size(core_if,
+						     dwc_otg_module_params.
+						     data_fifo_size);
+	}
+	if (dwc_otg_module_params.dev_rx_fifo_size != -1) {
+		retval +=
+		    dwc_otg_set_param_dev_rx_fifo_size(core_if,
+						       dwc_otg_module_params.
+						       dev_rx_fifo_size);
+	}
+	if (dwc_otg_module_params.dev_nperio_tx_fifo_size != -1) {
+		retval +=
+		    dwc_otg_set_param_dev_nperio_tx_fifo_size(core_if,
+							      dwc_otg_module_params.
+							      dev_nperio_tx_fifo_size);
+	}
+	if (dwc_otg_module_params.host_rx_fifo_size != -1) {
+		retval +=
+		    dwc_otg_set_param_host_rx_fifo_size(core_if,
+							dwc_otg_module_params.host_rx_fifo_size);
+	}
+	if (dwc_otg_module_params.host_nperio_tx_fifo_size != -1) {
+		retval +=
+		    dwc_otg_set_param_host_nperio_tx_fifo_size(core_if,
+							       dwc_otg_module_params.
+							       host_nperio_tx_fifo_size);
+	}
+	if (dwc_otg_module_params.host_perio_tx_fifo_size != -1) {
+		retval +=
+		    dwc_otg_set_param_host_perio_tx_fifo_size(core_if,
+							      dwc_otg_module_params.
+							      host_perio_tx_fifo_size);
+	}
+	if (dwc_otg_module_params.max_transfer_size != -1) {
+		retval +=
+		    dwc_otg_set_param_max_transfer_size(core_if,
+							dwc_otg_module_params.
+							max_transfer_size);
+	}
+	if (dwc_otg_module_params.max_packet_count != -1) {
+		retval +=
+		    dwc_otg_set_param_max_packet_count(core_if,
+						       dwc_otg_module_params.
+						       max_packet_count);
+	}
+	if (dwc_otg_module_params.host_channels != -1) {
+		retval +=
+		    dwc_otg_set_param_host_channels(core_if,
+						    dwc_otg_module_params.
+						    host_channels);
+	}
+	if (dwc_otg_module_params.dev_endpoints != -1) {
+		retval +=
+		    dwc_otg_set_param_dev_endpoints(core_if,
+						    dwc_otg_module_params.
+						    dev_endpoints);
+	}
+	if (dwc_otg_module_params.phy_type != -1) {
+		retval +=
+		    dwc_otg_set_param_phy_type(core_if,
+					       dwc_otg_module_params.phy_type);
+	}
+	if (dwc_otg_module_params.speed != -1) {
+		retval +=
+		    dwc_otg_set_param_speed(core_if,
+					    dwc_otg_module_params.speed);
+	}
+	if (dwc_otg_module_params.host_ls_low_power_phy_clk != -1) {
+		retval +=
+		    dwc_otg_set_param_host_ls_low_power_phy_clk(core_if,
+								dwc_otg_module_params.
+								host_ls_low_power_phy_clk);
+	}
+	if (dwc_otg_module_params.phy_ulpi_ddr != -1) {
+		retval +=
+		    dwc_otg_set_param_phy_ulpi_ddr(core_if,
+						   dwc_otg_module_params.
+						   phy_ulpi_ddr);
+	}
+	if (dwc_otg_module_params.phy_ulpi_ext_vbus != -1) {
+		retval +=
+		    dwc_otg_set_param_phy_ulpi_ext_vbus(core_if,
+							dwc_otg_module_params.
+							phy_ulpi_ext_vbus);
+	}
+	if (dwc_otg_module_params.phy_utmi_width != -1) {
+		retval +=
+		    dwc_otg_set_param_phy_utmi_width(core_if,
+						     dwc_otg_module_params.
+						     phy_utmi_width);
+	}
+	if (dwc_otg_module_params.ulpi_fs_ls != -1) {
+		retval +=
+		    dwc_otg_set_param_ulpi_fs_ls(core_if,
+						 dwc_otg_module_params.ulpi_fs_ls);
+	}
+	if (dwc_otg_module_params.ts_dline != -1) {
+		retval +=
+		    dwc_otg_set_param_ts_dline(core_if,
+					       dwc_otg_module_params.ts_dline);
+	}
+	if (dwc_otg_module_params.i2c_enable != -1) {
+		retval +=
+		    dwc_otg_set_param_i2c_enable(core_if,
+						 dwc_otg_module_params.
+						 i2c_enable);
+	}
+	if (dwc_otg_module_params.en_multiple_tx_fifo != -1) {
+		retval +=
+		    dwc_otg_set_param_en_multiple_tx_fifo(core_if,
+							  dwc_otg_module_params.
+							  en_multiple_tx_fifo);
+	}
+	for (i = 0; i < 15; i++) {
+		if (dwc_otg_module_params.dev_perio_tx_fifo_size[i] != -1) {
+			retval +=
+			    dwc_otg_set_param_dev_perio_tx_fifo_size(core_if,
+								     dwc_otg_module_params.
+								     dev_perio_tx_fifo_size
+								     [i], i);
+		}
+	}
+
+	for (i = 0; i < 15; i++) {
+		if (dwc_otg_module_params.dev_tx_fifo_size[i] != -1) {
+			retval += dwc_otg_set_param_dev_tx_fifo_size(core_if,
+								     dwc_otg_module_params.
+								     dev_tx_fifo_size
+								     [i], i);
+		}
+	}
+	if (dwc_otg_module_params.thr_ctl != -1) {
+		retval +=
+		    dwc_otg_set_param_thr_ctl(core_if,
+					      dwc_otg_module_params.thr_ctl);
+	}
+	if (dwc_otg_module_params.mpi_enable != -1) {
+		retval +=
+		    dwc_otg_set_param_mpi_enable(core_if,
+						 dwc_otg_module_params.
+						 mpi_enable);
+	}
+	if (dwc_otg_module_params.pti_enable != -1) {
+		retval +=
+		    dwc_otg_set_param_pti_enable(core_if,
+						 dwc_otg_module_params.
+						 pti_enable);
+	}
+	if (dwc_otg_module_params.lpm_enable != -1) {
+		retval +=
+		    dwc_otg_set_param_lpm_enable(core_if,
+						 dwc_otg_module_params.
+						 lpm_enable);
+	}
+	if (dwc_otg_module_params.ic_usb_cap != -1) {
+		retval +=
+		    dwc_otg_set_param_ic_usb_cap(core_if,
+						 dwc_otg_module_params.
+						 ic_usb_cap);
+	}
+	if (dwc_otg_module_params.tx_thr_length != -1) {
+		retval +=
+		    dwc_otg_set_param_tx_thr_length(core_if,
+						    dwc_otg_module_params.tx_thr_length);
+	}
+	if (dwc_otg_module_params.rx_thr_length != -1) {
+		retval +=
+		    dwc_otg_set_param_rx_thr_length(core_if,
+						    dwc_otg_module_params.
+						    rx_thr_length);
+	}
+	if (dwc_otg_module_params.ahb_thr_ratio != -1) {
+		retval +=
+		    dwc_otg_set_param_ahb_thr_ratio(core_if,
+						    dwc_otg_module_params.ahb_thr_ratio);
+	}
+	if (dwc_otg_module_params.power_down != -1) {
+		retval +=
+		    dwc_otg_set_param_power_down(core_if,
+						 dwc_otg_module_params.power_down);
+	}
+	if (dwc_otg_module_params.reload_ctl != -1) {
+		retval +=
+		    dwc_otg_set_param_reload_ctl(core_if,
+						 dwc_otg_module_params.reload_ctl);
+	}
+
+	if (dwc_otg_module_params.dev_out_nak != -1) {
+		retval +=
+			dwc_otg_set_param_dev_out_nak(core_if,
+			dwc_otg_module_params.dev_out_nak);
+	}
+
+	if (dwc_otg_module_params.otg_ver != -1) {
+		retval +=
+		    dwc_otg_set_param_otg_ver(core_if,
+					      dwc_otg_module_params.otg_ver);
+	}
+	if (dwc_otg_module_params.adp_enable != -1) {
+		retval +=
+		    dwc_otg_set_param_adp_enable(core_if,
+						 dwc_otg_module_params.
+						 adp_enable);
+	}
+	return retval;
+}
+
+/**
+ * This function is the top level interrupt handler for the Common
+ * (Device and host modes) interrupts.
+ */
+static irqreturn_t dwc_otg_common_irq(int irq, void *dev)
+{
+	dwc_otg_device_t *otg_dev = dev;
+	int32_t retval = IRQ_NONE;
+
+	retval = dwc_otg_handle_common_intr(otg_dev->core_if);
+	if (retval != 0) {
+		S3C2410X_CLEAR_EINTPEND();
+	}
+	return IRQ_RETVAL(retval);
+}
+
+/**
+ * This function is called when a lm_device is unregistered with the
+ * dwc_otg_driver. This happens, for example, when the rmmod command is
+ * executed. The device may or may not be electrically present. If it is
+ * present, the driver stops device processing. Any resources used on behalf
+ * of this device are freed.
+ *
+ * @param _dev
+ */
+static void dwc_otg_driver_remove(
+#ifdef LM_INTERFACE
+					 struct lm_device *_dev
+#elif defined(PCI_INTERFACE)
+					 struct pci_dev *_dev
+#endif
+    )
+{
+#ifdef LM_INTERFACE
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = pci_get_drvdata(_dev);
+#endif
+
+	DWC_DEBUGPL(DBG_ANY, "%s(%p)\n", __func__, _dev);
+
+	if (!otg_dev) {
+		/* Memory allocation for the dwc_otg_device failed. */
+		DWC_DEBUGPL(DBG_ANY, "%s: otg_dev NULL!\n", __func__);
+		return;
+	}
+#ifndef DWC_DEVICE_ONLY
+	if (otg_dev->hcd) {
+		hcd_remove(_dev);
+	} else {
+		DWC_DEBUGPL(DBG_ANY, "%s: otg_dev->hcd NULL!\n", __func__);
+		return;
+	}
+#endif
+
+#ifndef DWC_HOST_ONLY
+	if (otg_dev->pcd) {
+		pcd_remove(_dev);
+	} else {
+		DWC_DEBUGPL(DBG_ANY, "%s: otg_dev->pcd NULL!\n", __func__);
+		return;
+	}
+#endif
+	/*
+	 * Free the IRQ
+	 */
+	if (otg_dev->common_irq_installed) {
+		free_irq(_dev->irq, otg_dev);
+	} else {
+		DWC_DEBUGPL(DBG_ANY, "%s: There is no installed irq!\n", __func__);
+		return;
+	}
+
+	if (otg_dev->core_if) {
+		dwc_otg_cil_remove(otg_dev->core_if);
+	} else {
+		DWC_DEBUGPL(DBG_ANY, "%s: otg_dev->core_if NULL!\n", __func__);
+		return;
+	}
+
+	/*
+	 * Remove the device attributes
+	 */
+	dwc_otg_attr_remove(_dev);
+
+	/*
+	 * Return the memory.
+	 */
+	if (otg_dev->os_dep.base) {
+		iounmap(otg_dev->os_dep.base);
+	}
+	DWC_FREE(otg_dev);
+
+	/*
+	 * Clear the drvdata pointer.
+	 */
+#ifdef LM_INTERFACE
+	lm_set_drvdata(_dev, 0);
+#elif defined(PCI_INTERFACE)
+    release_mem_region(otg_dev->os_dep.rsrc_start, otg_dev->os_dep.rsrc_len);
+	pci_set_drvdata(_dev, 0);
+#endif
+}
+
+/**
+ * This function is called when an lm_device is bound to a
+ * dwc_otg_driver. It creates the driver components required to
+ * control the device (CIL, HCD, and PCD) and it initializes the
+ * device. The driver components are stored in a dwc_otg_device
+ * structure. A reference to the dwc_otg_device is saved in the
+ * lm_device. This allows the driver to access the dwc_otg_device
+ * structure on subsequent calls to driver methods for this device.
+ *
+ * @param _dev Bus device
+ */
+static int dwc_otg_driver_probe(
+#ifdef LM_INTERFACE
+				       struct lm_device *_dev
+#elif defined(PCI_INTERFACE)
+				       struct pci_dev *_dev,
+				       const struct pci_device_id *id
+#endif
+    )
+{
+	int retval = 0;
+	dwc_otg_device_t *dwc_otg_device;
+
+	dev_dbg(&_dev->dev, "dwc_otg_driver_probe(%p)\n", _dev);
+#ifdef LM_INTERFACE
+	dev_dbg(&_dev->dev, "start=0x%08x\n", (unsigned)_dev->resource.start);
+#elif defined(PCI_INTERFACE)
+	if (!id) {
+		DWC_ERROR("Invalid pci_device_id %p", id);
+		return -EINVAL;
+	}
+
+	if (!_dev || (pci_enable_device(_dev) < 0)) {
+		DWC_ERROR("Invalid pci_device %p", _dev);
+		return -ENODEV;
+	}
+	dev_dbg(&_dev->dev, "start=0x%08x\n", (unsigned)pci_resource_start(_dev,0));
+	/* other stuff needed as well? */
+
+#endif
+
+	dwc_otg_device = DWC_ALLOC(sizeof(dwc_otg_device_t));
+
+	if (!dwc_otg_device) {
+		dev_err(&_dev->dev, "kmalloc of dwc_otg_device failed\n");
+		return -ENOMEM;
+	}
+
+	memset(dwc_otg_device, 0, sizeof(*dwc_otg_device));
+	dwc_otg_device->os_dep.reg_offset = 0xFFFFFFFF;
+
+	/*
+	 * Map the DWC_otg Core memory into virtual address space.
+	 */
+#ifdef LM_INTERFACE
+	dwc_otg_device->os_dep.base = ioremap(_dev->resource.start, SZ_256K);
+
+	if (!dwc_otg_device->os_dep.base) {
+		dev_err(&_dev->dev, "ioremap() failed\n");
+		DWC_FREE(dwc_otg_device);
+		return -ENOMEM;
+	}
+	dev_dbg(&_dev->dev, "base=0x%08x\n",
+		(unsigned)dwc_otg_device->os_dep.base);
+#elif defined(PCI_INTERFACE)
+	_dev->current_state = PCI_D0;
+	_dev->dev.power.power_state = PMSG_ON;
+
+	if (!_dev->irq) {
+		DWC_ERROR("Found HC with no IRQ. Check BIOS/PCI %s setup!",
+			  pci_name(_dev));
+		iounmap(dwc_otg_device->os_dep.base);
+		DWC_FREE(dwc_otg_device);
+		return -ENODEV;
+	}
+
+	dwc_otg_device->os_dep.rsrc_start = pci_resource_start(_dev, 0);
+	dwc_otg_device->os_dep.rsrc_len = pci_resource_len(_dev, 0);
+	DWC_DEBUGPL(DBG_ANY, "PCI resource: start=%08x, len=%08x\n",
+		    (unsigned)dwc_otg_device->os_dep.rsrc_start,
+		    (unsigned)dwc_otg_device->os_dep.rsrc_len);
+	if (!request_mem_region
+	    (dwc_otg_device->os_dep.rsrc_start, dwc_otg_device->os_dep.rsrc_len,
+	     "dwc_otg")) {
+		dev_dbg(&_dev->dev, "error requesting memory\n");
+		iounmap(dwc_otg_device->os_dep.base);
+		DWC_FREE(dwc_otg_device);
+		return -EFAULT;
+	}
+
+	dwc_otg_device->os_dep.base =
+	    ioremap_nocache(dwc_otg_device->os_dep.rsrc_start,
+			    dwc_otg_device->os_dep.rsrc_len);
+	if (dwc_otg_device->os_dep.base == NULL) {
+		dev_dbg(&_dev->dev, "error mapping memory\n");
+		release_mem_region(dwc_otg_device->os_dep.rsrc_start,
+				   dwc_otg_device->os_dep.rsrc_len);
+		iounmap(dwc_otg_device->os_dep.base);
+		DWC_FREE(dwc_otg_device);
+		return -EFAULT;
+	}
+	dev_dbg(&_dev->dev, "base=0x%p (before adjust) \n",
+		dwc_otg_device->os_dep.base);
+	dwc_otg_device->os_dep.base = (char *)dwc_otg_device->os_dep.base;
+	dev_dbg(&_dev->dev, "base=0x%p (after adjust) \n",
+		dwc_otg_device->os_dep.base);
+	dev_dbg(&_dev->dev, "%s: mapped PA 0x%x to VA 0x%p\n", __func__,
+		(unsigned)dwc_otg_device->os_dep.rsrc_start,
+		dwc_otg_device->os_dep.base);
+
+	pci_set_master(_dev);
+	pci_set_drvdata(_dev, dwc_otg_device);
+#endif
+
+	/*
+	 * Initialize driver data to point to the global DWC_otg
+	 * Device structure.
+	 */
+#ifdef LM_INTERFACE
+	lm_set_drvdata(_dev, dwc_otg_device);
+#endif
+	dev_dbg(&_dev->dev, "dwc_otg_device=0x%p\n", dwc_otg_device);
+
+	dwc_otg_device->core_if = dwc_otg_cil_init(dwc_otg_device->os_dep.base);
+	if (!dwc_otg_device->core_if) {
+		dev_err(&_dev->dev, "CIL initialization failed!\n");
+		retval = -ENOMEM;
+		goto fail;
+	}
+
+	/*
+	 * Attempt to ensure this device is really a DWC_otg Controller.
+	 * Read and verify the SNPSID register contents. The value should be
+	 * 0x45F42XXX, which corresponds to "OT2", as in "OTG version 2.XX".
+	 */
+
+	if ((dwc_otg_get_gsnpsid(dwc_otg_device->core_if) & 0xFFFFF000) !=
+	    0x4F542000) {
+		dev_err(&_dev->dev, "Bad value for SNPSID: 0x%08x\n",
+			dwc_otg_get_gsnpsid(dwc_otg_device->core_if));
+		retval = -EINVAL;
+		goto fail;
+	}
+
+	/*
+	 * Validate parameter values.
+	 */
+	if (set_parameters(dwc_otg_device->core_if)) {
+		retval = -EINVAL;
+		goto fail;
+	}
+
+	/*
+	 * Create Device Attributes in sysfs
+	 */
+	dwc_otg_attr_create(_dev);
+
+	/*
+	 * Disable the global interrupt until all the interrupt
+	 * handlers are installed.
+	 */
+	dwc_otg_disable_global_interrupts(dwc_otg_device->core_if);
+
+	/*
+	 * Install the interrupt handler for the common interrupts before
+	 * enabling common interrupts in core_init below.
+	 */
+	DWC_DEBUGPL(DBG_CIL, "registering (common) handler for irq%d\n",
+		    _dev->irq);
+	retval = request_irq(_dev->irq, dwc_otg_common_irq,
+			     IRQF_SHARED | IRQF_DISABLED | IRQ_LEVEL, "dwc_otg",
+			     dwc_otg_device);
+	if (retval) {
+		DWC_ERROR("request of irq%d failed\n", _dev->irq);
+		retval = -EBUSY;
+		goto fail;
+	} else {
+		dwc_otg_device->common_irq_installed = 1;
+	}
+
+#ifdef LM_INTERFACE
+	set_irq_type(_dev->irq, IRQT_LOW);
+#endif
+	/*
+	 * Initialize the DWC_otg core.
+	 */
+	dwc_otg_core_init(dwc_otg_device->core_if);
+		
+#ifndef DWC_HOST_ONLY
+	/*
+	 * Initialize the PCD
+	 */
+	retval = pcd_init(_dev);
+	if (retval != 0) {
+		DWC_ERROR("pcd_init failed\n");
+		dwc_otg_device->pcd = NULL;
+		goto fail;
+	}	
+#endif
+#ifndef DWC_DEVICE_ONLY
+	/*
+	 * Initialize the HCD
+	 */
+	retval = hcd_init(_dev);
+	if (retval != 0) {
+		DWC_ERROR("hcd_init failed\n");
+		dwc_otg_device->hcd = NULL;
+		goto fail;
+	}
+#endif
+#ifdef PCI_INTERFACE
+	pci_set_drvdata(_dev, dwc_otg_device);
+	dwc_otg_device->os_dep.pcidev = _dev;
+#endif
+
+	/*
+	 * Enable the global interrupt after all the interrupt
+	 * handlers are installed if there is no ADP support else 
+	 * perform initial actions required for Internal ADP logic.
+	 */
+	if (!dwc_otg_get_param_adp_enable(dwc_otg_device->core_if))	
+		dwc_otg_enable_global_interrupts(dwc_otg_device->core_if);
+	else
+		dwc_otg_adp_start(dwc_otg_device->core_if);
+
+	return 0;
+
+fail:
+	dwc_otg_driver_remove(_dev);
+	return retval;
+}
+
+/**
+ * This structure defines the methods to be called by a bus driver
+ * during the lifecycle of a device on that bus. Both drivers and
+ * devices are registered with a bus driver. The bus driver matches
+ * devices to drivers based on information in the device and driver
+ * structures.
+ *
+ * The probe function is called when the bus driver matches a device
+ * to this driver. The remove function is called when a device is
+ * unregistered with the bus driver.
+ */
+#ifdef LM_INTERFACE
+static struct lm_driver dwc_otg_driver = {
+	.drv = {.name = (char *)dwc_driver_name,},
+	.probe = dwc_otg_driver_probe,
+	.remove = dwc_otg_driver_remove,
+};
+#elif defined(PCI_INTERFACE)
+static const struct pci_device_id pci_ids[] = { {
+						 PCI_DEVICE(0x16c3, 0xabcd),
+						 .driver_data =
+						 (unsigned long)0xdeadbeef,
+						 }, { /* end: all zeroes */ }
+};
+
+MODULE_DEVICE_TABLE(pci, pci_ids);
+
+/* pci driver glue; this is a "new style" PCI driver module */
+static struct pci_driver dwc_otg_driver = {
+	.name = "dwc_otg",
+	.id_table = pci_ids,
+
+	.probe = dwc_otg_driver_probe,
+	.remove = dwc_otg_driver_remove,
+
+	.driver = {
+		   .name = (char *)dwc_driver_name,
+		   },
+};
+#endif
+
+/**
+ * This function is called when the dwc_otg_driver is installed with the
+ * insmod command. It registers the dwc_otg_driver structure with the
+ * appropriate bus driver. This will cause the dwc_otg_driver_probe function
+ * to be called. In addition, the bus driver will automatically expose
+ * attributes defined for the device and driver in the special sysfs file
+ * system.
+ *
+ * @return
+ */
+static int __init dwc_otg_driver_init(void)
+{
+	int retval = 0;
+	int error;
+	printk(KERN_INFO "%s: version %s\n", dwc_driver_name,
+	       DWC_DRIVER_VERSION);
+#ifdef LM_INTERFACE
+	retval = lm_driver_register(&dwc_otg_driver);
+#elif defined(PCI_INTERFACE)
+	retval = pci_register_driver(&dwc_otg_driver);
+#endif
+	if (retval < 0) {
+		printk(KERN_ERR "%s retval=%d\n", __func__, retval);
+		return retval;
+	}
+#ifdef LM_INTERFACE
+	error = driver_create_file(&dwc_otg_driver.drv, &driver_attr_version);
+	error = driver_create_file(&dwc_otg_driver.drv, &driver_attr_debuglevel);
+#elif defined(PCI_INTERFACE)
+	error = driver_create_file(&dwc_otg_driver.driver, &driver_attr_version);
+	error = driver_create_file(&dwc_otg_driver.driver, &driver_attr_debuglevel);
+#endif
+	return retval;
+}
+
+module_init(dwc_otg_driver_init);
+
+/**
+ * This function is called when the driver is removed from the kernel
+ * with the rmmod command. The driver unregisters itself with its bus
+ * driver.
+ *
+ */
+static void __exit dwc_otg_driver_cleanup(void)
+{
+	printk(KERN_DEBUG "dwc_otg_driver_cleanup()\n");
+
+#ifdef LM_INTERFACE
+	driver_remove_file(&dwc_otg_driver.drv, &driver_attr_debuglevel);
+	driver_remove_file(&dwc_otg_driver.drv, &driver_attr_version);
+	lm_driver_unregister(&dwc_otg_driver);
+#elif defined(PCI_INTERFACE)
+	driver_remove_file(&dwc_otg_driver.driver, &driver_attr_debuglevel);
+	driver_remove_file(&dwc_otg_driver.driver, &driver_attr_version);
+	pci_unregister_driver(&dwc_otg_driver);
+#endif
+
+	printk(KERN_INFO "%s module removed\n", dwc_driver_name);
+}
+
+module_exit(dwc_otg_driver_cleanup);
+
+MODULE_DESCRIPTION(DWC_DRIVER_DESC);
+MODULE_AUTHOR("Synopsys Inc.");
+MODULE_LICENSE("GPL");
+
+module_param_named(otg_cap, dwc_otg_module_params.otg_cap, int, 0444);
+MODULE_PARM_DESC(otg_cap, "OTG Capabilities 0=HNP&SRP 1=SRP Only 2=None");
+module_param_named(opt, dwc_otg_module_params.opt, int, 0444);
+MODULE_PARM_DESC(opt, "OPT Mode");
+module_param_named(dma_enable, dwc_otg_module_params.dma_enable, int, 0444);
+MODULE_PARM_DESC(dma_enable, "DMA Mode 0=Slave 1=DMA enabled");
+
+module_param_named(dma_desc_enable, dwc_otg_module_params.dma_desc_enable, int,
+		   0444);
+MODULE_PARM_DESC(dma_desc_enable,
+		 "DMA Desc Mode 0=Address DMA 1=DMA Descriptor enabled");
+
+module_param_named(dma_burst_size, dwc_otg_module_params.dma_burst_size, int,
+		   0444);
+MODULE_PARM_DESC(dma_burst_size,
+		 "DMA Burst Size 1, 4, 8, 16, 32, 64, 128, 256");
+module_param_named(speed, dwc_otg_module_params.speed, int, 0444);
+MODULE_PARM_DESC(speed, "Speed 0=High Speed 1=Full Speed");
+module_param_named(host_support_fs_ls_low_power,
+		   dwc_otg_module_params.host_support_fs_ls_low_power, int,
+		   0444);
+MODULE_PARM_DESC(host_support_fs_ls_low_power,
+		 "Support Low Power w/FS or LS 0=Support 1=Don't Support");
+module_param_named(host_ls_low_power_phy_clk,
+		   dwc_otg_module_params.host_ls_low_power_phy_clk, int, 0444);
+MODULE_PARM_DESC(host_ls_low_power_phy_clk,
+		 "Low Speed Low Power Clock 0=48Mhz 1=6Mhz");
+module_param_named(enable_dynamic_fifo,
+		   dwc_otg_module_params.enable_dynamic_fifo, int, 0444);
+MODULE_PARM_DESC(enable_dynamic_fifo, "0=cC Setting 1=Allow Dynamic Sizing");
+module_param_named(data_fifo_size, dwc_otg_module_params.data_fifo_size, int,
+		   0444);
+MODULE_PARM_DESC(data_fifo_size,
+		 "Total number of words in the data FIFO memory 32-32768");
+module_param_named(dev_rx_fifo_size, dwc_otg_module_params.dev_rx_fifo_size,
+		   int, 0444);
+MODULE_PARM_DESC(dev_rx_fifo_size, "Number of words in the Rx FIFO 16-32768");
+module_param_named(dev_nperio_tx_fifo_size,
+		   dwc_otg_module_params.dev_nperio_tx_fifo_size, int, 0444);
+MODULE_PARM_DESC(dev_nperio_tx_fifo_size,
+		 "Number of words in the non-periodic Tx FIFO 16-32768");
+module_param_named(dev_perio_tx_fifo_size_1,
+		   dwc_otg_module_params.dev_perio_tx_fifo_size[0], int, 0444);
+MODULE_PARM_DESC(dev_perio_tx_fifo_size_1,
+		 "Number of words in the periodic Tx FIFO 4-768");
+module_param_named(dev_perio_tx_fifo_size_2,
+		   dwc_otg_module_params.dev_perio_tx_fifo_size[1], int, 0444);
+MODULE_PARM_DESC(dev_perio_tx_fifo_size_2,
+		 "Number of words in the periodic Tx FIFO 4-768");
+module_param_named(dev_perio_tx_fifo_size_3,
+		   dwc_otg_module_params.dev_perio_tx_fifo_size[2], int, 0444);
+MODULE_PARM_DESC(dev_perio_tx_fifo_size_3,
+		 "Number of words in the periodic Tx FIFO 4-768");
+module_param_named(dev_perio_tx_fifo_size_4,
+		   dwc_otg_module_params.dev_perio_tx_fifo_size[3], int, 0444);
+MODULE_PARM_DESC(dev_perio_tx_fifo_size_4,
+		 "Number of words in the periodic Tx FIFO 4-768");
+module_param_named(dev_perio_tx_fifo_size_5,
+		   dwc_otg_module_params.dev_perio_tx_fifo_size[4], int, 0444);
+MODULE_PARM_DESC(dev_perio_tx_fifo_size_5,
+		 "Number of words in the periodic Tx FIFO 4-768");
+module_param_named(dev_perio_tx_fifo_size_6,
+		   dwc_otg_module_params.dev_perio_tx_fifo_size[5], int, 0444);
+MODULE_PARM_DESC(dev_perio_tx_fifo_size_6,
+		 "Number of words in the periodic Tx FIFO 4-768");
+module_param_named(dev_perio_tx_fifo_size_7,
+		   dwc_otg_module_params.dev_perio_tx_fifo_size[6], int, 0444);
+MODULE_PARM_DESC(dev_perio_tx_fifo_size_7,
+		 "Number of words in the periodic Tx FIFO 4-768");
+module_param_named(dev_perio_tx_fifo_size_8,
+		   dwc_otg_module_params.dev_perio_tx_fifo_size[7], int, 0444);
+MODULE_PARM_DESC(dev_perio_tx_fifo_size_8,
+		 "Number of words in the periodic Tx FIFO 4-768");
+module_param_named(dev_perio_tx_fifo_size_9,
+		   dwc_otg_module_params.dev_perio_tx_fifo_size[8], int, 0444);
+MODULE_PARM_DESC(dev_perio_tx_fifo_size_9,
+		 "Number of words in the periodic Tx FIFO 4-768");
+module_param_named(dev_perio_tx_fifo_size_10,
+		   dwc_otg_module_params.dev_perio_tx_fifo_size[9], int, 0444);
+MODULE_PARM_DESC(dev_perio_tx_fifo_size_10,
+		 "Number of words in the periodic Tx FIFO 4-768");
+module_param_named(dev_perio_tx_fifo_size_11,
+		   dwc_otg_module_params.dev_perio_tx_fifo_size[10], int, 0444);
+MODULE_PARM_DESC(dev_perio_tx_fifo_size_11,
+		 "Number of words in the periodic Tx FIFO 4-768");
+module_param_named(dev_perio_tx_fifo_size_12,
+		   dwc_otg_module_params.dev_perio_tx_fifo_size[11], int, 0444);
+MODULE_PARM_DESC(dev_perio_tx_fifo_size_12,
+		 "Number of words in the periodic Tx FIFO 4-768");
+module_param_named(dev_perio_tx_fifo_size_13,
+		   dwc_otg_module_params.dev_perio_tx_fifo_size[12], int, 0444);
+MODULE_PARM_DESC(dev_perio_tx_fifo_size_13,
+		 "Number of words in the periodic Tx FIFO 4-768");
+module_param_named(dev_perio_tx_fifo_size_14,
+		   dwc_otg_module_params.dev_perio_tx_fifo_size[13], int, 0444);
+MODULE_PARM_DESC(dev_perio_tx_fifo_size_14,
+		 "Number of words in the periodic Tx FIFO 4-768");
+module_param_named(dev_perio_tx_fifo_size_15,
+		   dwc_otg_module_params.dev_perio_tx_fifo_size[14], int, 0444);
+MODULE_PARM_DESC(dev_perio_tx_fifo_size_15,
+		 "Number of words in the periodic Tx FIFO 4-768");
+module_param_named(host_rx_fifo_size, dwc_otg_module_params.host_rx_fifo_size,
+		   int, 0444);
+MODULE_PARM_DESC(host_rx_fifo_size, "Number of words in the Rx FIFO 16-32768");
+module_param_named(host_nperio_tx_fifo_size,
+		   dwc_otg_module_params.host_nperio_tx_fifo_size, int, 0444);
+MODULE_PARM_DESC(host_nperio_tx_fifo_size,
+		 "Number of words in the non-periodic Tx FIFO 16-32768");
+module_param_named(host_perio_tx_fifo_size,
+		   dwc_otg_module_params.host_perio_tx_fifo_size, int, 0444);
+MODULE_PARM_DESC(host_perio_tx_fifo_size,
+		 "Number of words in the host periodic Tx FIFO 16-32768");
+module_param_named(max_transfer_size, dwc_otg_module_params.max_transfer_size,
+		   int, 0444);
+/** @todo Set the max to 512K, modify checks */
+MODULE_PARM_DESC(max_transfer_size,
+		 "The maximum transfer size supported in bytes 2047-65535");
+module_param_named(max_packet_count, dwc_otg_module_params.max_packet_count,
+		   int, 0444);
+MODULE_PARM_DESC(max_packet_count,
+		 "The maximum number of packets in a transfer 15-511");
+module_param_named(host_channels, dwc_otg_module_params.host_channels, int,
+		   0444);
+MODULE_PARM_DESC(host_channels,
+		 "The number of host channel registers to use 1-16");
+module_param_named(dev_endpoints, dwc_otg_module_params.dev_endpoints, int,
+		   0444);
+MODULE_PARM_DESC(dev_endpoints,
+		 "The number of endpoints in addition to EP0 available for device mode 1-15");
+module_param_named(phy_type, dwc_otg_module_params.phy_type, int, 0444);
+MODULE_PARM_DESC(phy_type, "0=Reserved 1=UTMI+ 2=ULPI");
+module_param_named(phy_utmi_width, dwc_otg_module_params.phy_utmi_width, int,
+		   0444);
+MODULE_PARM_DESC(phy_utmi_width, "Specifies the UTMI+ Data Width 8 or 16 bits");
+module_param_named(phy_ulpi_ddr, dwc_otg_module_params.phy_ulpi_ddr, int, 0444);
+MODULE_PARM_DESC(phy_ulpi_ddr,
+		 "ULPI at double or single data rate 0=Single 1=Double");
+module_param_named(phy_ulpi_ext_vbus, dwc_otg_module_params.phy_ulpi_ext_vbus,
+		   int, 0444);
+MODULE_PARM_DESC(phy_ulpi_ext_vbus,
+		 "ULPI PHY using internal or external vbus 0=Internal");
+module_param_named(i2c_enable, dwc_otg_module_params.i2c_enable, int, 0444);
+MODULE_PARM_DESC(i2c_enable, "FS PHY Interface");
+module_param_named(ulpi_fs_ls, dwc_otg_module_params.ulpi_fs_ls, int, 0444);
+MODULE_PARM_DESC(ulpi_fs_ls, "ULPI PHY FS/LS mode only");
+module_param_named(ts_dline, dwc_otg_module_params.ts_dline, int, 0444);
+MODULE_PARM_DESC(ts_dline, "Term select Dline pulsing for all PHYs");
+module_param_named(debug, g_dbg_lvl, int, 0444);
+MODULE_PARM_DESC(debug, "");
+
+module_param_named(en_multiple_tx_fifo,
+		   dwc_otg_module_params.en_multiple_tx_fifo, int, 0444);
+MODULE_PARM_DESC(en_multiple_tx_fifo,
+		 "Dedicated Non Periodic Tx FIFOs 0=disabled 1=enabled");
+module_param_named(dev_tx_fifo_size_1,
+		   dwc_otg_module_params.dev_tx_fifo_size[0], int, 0444);
+MODULE_PARM_DESC(dev_tx_fifo_size_1, "Number of words in the Tx FIFO 4-768");
+module_param_named(dev_tx_fifo_size_2,
+		   dwc_otg_module_params.dev_tx_fifo_size[1], int, 0444);
+MODULE_PARM_DESC(dev_tx_fifo_size_2, "Number of words in the Tx FIFO 4-768");
+module_param_named(dev_tx_fifo_size_3,
+		   dwc_otg_module_params.dev_tx_fifo_size[2], int, 0444);
+MODULE_PARM_DESC(dev_tx_fifo_size_3, "Number of words in the Tx FIFO 4-768");
+module_param_named(dev_tx_fifo_size_4,
+		   dwc_otg_module_params.dev_tx_fifo_size[3], int, 0444);
+MODULE_PARM_DESC(dev_tx_fifo_size_4, "Number of words in the Tx FIFO 4-768");
+module_param_named(dev_tx_fifo_size_5,
+		   dwc_otg_module_params.dev_tx_fifo_size[4], int, 0444);
+MODULE_PARM_DESC(dev_tx_fifo_size_5, "Number of words in the Tx FIFO 4-768");
+module_param_named(dev_tx_fifo_size_6,
+		   dwc_otg_module_params.dev_tx_fifo_size[5], int, 0444);
+MODULE_PARM_DESC(dev_tx_fifo_size_6, "Number of words in the Tx FIFO 4-768");
+module_param_named(dev_tx_fifo_size_7,
+		   dwc_otg_module_params.dev_tx_fifo_size[6], int, 0444);
+MODULE_PARM_DESC(dev_tx_fifo_size_7, "Number of words in the Tx FIFO 4-768");
+module_param_named(dev_tx_fifo_size_8,
+		   dwc_otg_module_params.dev_tx_fifo_size[7], int, 0444);
+MODULE_PARM_DESC(dev_tx_fifo_size_8, "Number of words in the Tx FIFO 4-768");
+module_param_named(dev_tx_fifo_size_9,
+		   dwc_otg_module_params.dev_tx_fifo_size[8], int, 0444);
+MODULE_PARM_DESC(dev_tx_fifo_size_9, "Number of words in the Tx FIFO 4-768");
+module_param_named(dev_tx_fifo_size_10,
+		   dwc_otg_module_params.dev_tx_fifo_size[9], int, 0444);
+MODULE_PARM_DESC(dev_tx_fifo_size_10, "Number of words in the Tx FIFO 4-768");
+module_param_named(dev_tx_fifo_size_11,
+		   dwc_otg_module_params.dev_tx_fifo_size[10], int, 0444);
+MODULE_PARM_DESC(dev_tx_fifo_size_11, "Number of words in the Tx FIFO 4-768");
+module_param_named(dev_tx_fifo_size_12,
+		   dwc_otg_module_params.dev_tx_fifo_size[11], int, 0444);
+MODULE_PARM_DESC(dev_tx_fifo_size_12, "Number of words in the Tx FIFO 4-768");
+module_param_named(dev_tx_fifo_size_13,
+		   dwc_otg_module_params.dev_tx_fifo_size[12], int, 0444);
+MODULE_PARM_DESC(dev_tx_fifo_size_13, "Number of words in the Tx FIFO 4-768");
+module_param_named(dev_tx_fifo_size_14,
+		   dwc_otg_module_params.dev_tx_fifo_size[13], int, 0444);
+MODULE_PARM_DESC(dev_tx_fifo_size_14, "Number of words in the Tx FIFO 4-768");
+module_param_named(dev_tx_fifo_size_15,
+		   dwc_otg_module_params.dev_tx_fifo_size[14], int, 0444);
+MODULE_PARM_DESC(dev_tx_fifo_size_15, "Number of words in the Tx FIFO 4-768");
+
+module_param_named(thr_ctl, dwc_otg_module_params.thr_ctl, int, 0444);
+MODULE_PARM_DESC(thr_ctl,
+		 "Thresholding enable flag bit 0 - non ISO Tx thr., 1 - ISO Tx thr., 2 - Rx thr.- bit 0=disabled 1=enabled");
+module_param_named(tx_thr_length, dwc_otg_module_params.tx_thr_length, int,
+		   0444);
+MODULE_PARM_DESC(tx_thr_length, "Tx Threshold length in 32 bit DWORDs");
+module_param_named(rx_thr_length, dwc_otg_module_params.rx_thr_length, int,
+		   0444);
+MODULE_PARM_DESC(rx_thr_length, "Rx Threshold length in 32 bit DWORDs");
+
+module_param_named(pti_enable, dwc_otg_module_params.pti_enable, int, 0444);
+module_param_named(mpi_enable, dwc_otg_module_params.mpi_enable, int, 0444);
+module_param_named(lpm_enable, dwc_otg_module_params.lpm_enable, int, 0444);
+MODULE_PARM_DESC(lpm_enable, "LPM Enable 0=LPM Disabled 1=LPM Enabled");
+module_param_named(ic_usb_cap, dwc_otg_module_params.ic_usb_cap, int, 0444);
+MODULE_PARM_DESC(ic_usb_cap,
+		 "IC_USB Capability 0=IC_USB Disabled 1=IC_USB Enabled");
+module_param_named(ahb_thr_ratio, dwc_otg_module_params.ahb_thr_ratio, int,
+		   0444);
+MODULE_PARM_DESC(ahb_thr_ratio, "AHB Threshold Ratio");
+module_param_named(power_down, dwc_otg_module_params.power_down, int, 0444);
+MODULE_PARM_DESC(power_down, "Power Down Mode");
+module_param_named(reload_ctl, dwc_otg_module_params.reload_ctl, int, 0444);
+MODULE_PARM_DESC(reload_ctl, "HFIR Reload Control");
+module_param_named(dev_out_nak, dwc_otg_module_params.dev_out_nak, int, 0444);
+MODULE_PARM_DESC(dev_out_nak, "Enable Device OUT NAK");
+module_param_named(adp_enable, dwc_otg_module_params.adp_enable, int, 0444);
+MODULE_PARM_DESC(adp_enable, "ADP Enable 0=ADP Disabled 1=ADP Enabled");
+module_param_named(otg_ver, dwc_otg_module_params.otg_ver, int, 0444);
+MODULE_PARM_DESC(otg_ver, "OTG revision supported 0=OTG 1.3 1=OTG 2.0");
+
+module_param_named(intep_disable, intep_disable, int, 0444);
+MODULE_PARM_DESC(intep_disable, "disable int endpoint");
+
+/** @page "Module Parameters"
+ *
+ * The following parameters may be specified when starting the module.
+ * These parameters define how the DWC_otg controller should be
+ * configured. Parameter values are passed to the CIL initialization
+ * function dwc_otg_cil_init
+ *
+ * Example: <code>modprobe dwc_otg speed=1 otg_cap=1</code>
+ *
+
+ <table>
+ <tr><td>Parameter Name</td><td>Meaning</td></tr>
+
+ <tr>
+ <td>otg_cap</td>
+ <td>Specifies the OTG capabilities. The driver will automatically detect the
+ value for this parameter if none is specified.
+ - 0: HNP and SRP capable (default, if available)
+ - 1: SRP Only capable
+ - 2: No HNP/SRP capable
+ </td></tr>
+
+ <tr>
+ <td>dma_enable</td>
+ <td>Specifies whether to use slave or DMA mode for accessing the data FIFOs.
+ The driver will automatically detect the value for this parameter if none is
+ specified.
+ - 0: Slave
+ - 1: DMA (default, if available)
+ </td></tr>
+
+ <tr>
+ <td>dma_burst_size</td>
+ <td>The DMA Burst size (applicable only for External DMA Mode).
+ - Values: 1, 4, 8 16, 32, 64, 128, 256 (default 32)
+ </td></tr>
+
+ <tr>
+ <td>speed</td>
+ <td>Specifies the maximum speed of operation in host and device mode. The
+ actual speed depends on the speed of the attached device and the value of
+ phy_type.
+ - 0: High Speed (default)
+ - 1: Full Speed
+ </td></tr>
+
+ <tr>
+ <td>host_support_fs_ls_low_power</td>
+ <td>Specifies whether low power mode is supported when attached to a Full
+ Speed or Low Speed device in host mode.
+ - 0: Don't support low power mode (default)
+ - 1: Support low power mode
+ </td></tr>
+
+ <tr>
+ <td>host_ls_low_power_phy_clk</td>
+ <td>Specifies the PHY clock rate in low power mode when connected to a Low
+ Speed device in host mode. This parameter is applicable only if
+ HOST_SUPPORT_FS_LS_LOW_POWER is enabled.
+ - 0: 48 MHz (default)
+ - 1: 6 MHz
+ </td></tr>
+
+ <tr>
+ <td>enable_dynamic_fifo</td>
+ <td> Specifies whether FIFOs may be resized by the driver software.
+ - 0: Use cC FIFO size parameters
+ - 1: Allow dynamic FIFO sizing (default)
+ </td></tr>
+
+ <tr>
+ <td>data_fifo_size</td>
+ <td>Total number of 4-byte words in the data FIFO memory. This memory
+ includes the Rx FIFO, non-periodic Tx FIFO, and periodic Tx FIFOs.
+ - Values: 32 to 32768 (default 8192)
+
+ Note: The total FIFO memory depth in the FPGA configuration is 8192.
+ </td></tr>
+
+ <tr>
+ <td>dev_rx_fifo_size</td>
+ <td>Number of 4-byte words in the Rx FIFO in device mode when dynamic
+ FIFO sizing is enabled.
+ - Values: 16 to 32768 (default 1064)
+ </td></tr>
+
+ <tr>
+ <td>dev_nperio_tx_fifo_size</td>
+ <td>Number of 4-byte words in the non-periodic Tx FIFO in device mode when
+ dynamic FIFO sizing is enabled.
+ - Values: 16 to 32768 (default 1024)
+ </td></tr>
+
+ <tr>
+ <td>dev_perio_tx_fifo_size_n (n = 1 to 15)</td>
+ <td>Number of 4-byte words in each of the periodic Tx FIFOs in device mode
+ when dynamic FIFO sizing is enabled.
+ - Values: 4 to 768 (default 256)
+ </td></tr>
+
+ <tr>
+ <td>host_rx_fifo_size</td>
+ <td>Number of 4-byte words in the Rx FIFO in host mode when dynamic FIFO
+ sizing is enabled.
+ - Values: 16 to 32768 (default 1024)
+ </td></tr>
+
+ <tr>
+ <td>host_nperio_tx_fifo_size</td>
+ <td>Number of 4-byte words in the non-periodic Tx FIFO in host mode when
+ dynamic FIFO sizing is enabled in the core.
+ - Values: 16 to 32768 (default 1024)
+ </td></tr>
+
+ <tr>
+ <td>host_perio_tx_fifo_size</td>
+ <td>Number of 4-byte words in the host periodic Tx FIFO when dynamic FIFO
+ sizing is enabled.
+ - Values: 16 to 32768 (default 1024)
+ </td></tr>
+
+ <tr>
+ <td>max_transfer_size</td>
+ <td>The maximum transfer size supported in bytes.
+ - Values: 2047 to 65,535 (default 65,535)
+ </td></tr>
+
+ <tr>
+ <td>max_packet_count</td>
+ <td>The maximum number of packets in a transfer.
+ - Values: 15 to 511 (default 511)
+ </td></tr>
+
+ <tr>
+ <td>host_channels</td>
+ <td>The number of host channel registers to use.
+ - Values: 1 to 16 (default 12)
+
+ Note: The FPGA configuration supports a maximum of 12 host channels.
+ </td></tr>
+
+ <tr>
+ <td>dev_endpoints</td>
+ <td>The number of endpoints in addition to EP0 available for device mode
+ operations.
+ - Values: 1 to 15 (default 6 IN and OUT)
+
+ Note: The FPGA configuration supports a maximum of 6 IN and OUT endpoints in
+ addition to EP0.
+ </td></tr>
+
+ <tr>
+ <td>phy_type</td>
+ <td>Specifies the type of PHY interface to use. By default, the driver will
+ automatically detect the phy_type.
+ - 0: Full Speed
+ - 1: UTMI+ (default, if available)
+ - 2: ULPI
+ </td></tr>
+
+ <tr>
+ <td>phy_utmi_width</td>
+ <td>Specifies the UTMI+ Data Width. This parameter is applicable for a
+ phy_type of UTMI+. Also, this parameter is applicable only if the
+ OTG_HSPHY_WIDTH cC parameter was set to "8 and 16 bits", meaning that the
+ core has been configured to work at either data path width.
+ - Values: 8 or 16 bits (default 16)
+ </td></tr>
+
+ <tr>
+ <td>phy_ulpi_ddr</td>
+ <td>Specifies whether the ULPI operates at double or single data rate. This
+ parameter is only applicable if phy_type is ULPI.
+ - 0: single data rate ULPI interface with 8 bit wide data bus (default)
+ - 1: double data rate ULPI interface with 4 bit wide data bus
+ </td></tr>
+
+ <tr>
+ <td>i2c_enable</td>
+ <td>Specifies whether to use the I2C interface for full speed PHY. This
+ parameter is only applicable if PHY_TYPE is FS.
+ - 0: Disabled (default)
+ - 1: Enabled
+ </td></tr>
+
+ <tr>
+ <td>ulpi_fs_ls</td>
+ <td>Specifies whether to use ULPI FS/LS mode only.
+ - 0: Disabled (default)
+ - 1: Enabled
+ </td></tr>
+
+ <tr>
+ <td>ts_dline</td>
+ <td>Specifies whether term select D-Line pulsing for all PHYs is enabled.
+ - 0: Disabled (default)
+ - 1: Enabled
+ </td></tr>
+ 
+ <tr>
+ <td>en_multiple_tx_fifo</td>
+ <td>Specifies whether dedicatedto tx fifos are enabled for non periodic IN EPs.
+ The driver will automatically detect the value for this parameter if none is
+ specified.
+ - 0: Disabled
+ - 1: Enabled (default, if available)
+ </td></tr>
+
+ <tr>
+ <td>dev_tx_fifo_size_n (n = 1 to 15)</td>
+ <td>Number of 4-byte words in each of the Tx FIFOs in device mode
+ when dynamic FIFO sizing is enabled.
+ - Values: 4 to 768 (default 256)
+ </td></tr>
+
+ <tr>
+ <td>tx_thr_length</td>
+ <td>Transmit Threshold length in 32 bit double words
+ - Values: 8 to 128 (default 64)
+ </td></tr>
+
+ <tr>
+ <td>rx_thr_length</td>
+ <td>Receive Threshold length in 32 bit double words
+ - Values: 8 to 128 (default 64)
+ </td></tr>
+
+<tr>
+ <td>thr_ctl</td>
+ <td>Specifies whether to enable Thresholding for Device mode. Bits 0, 1, 2 of 
+ this parmater specifies if thresholding is enabled for non-Iso Tx, Iso Tx and
+ Rx transfers accordingly.
+ The driver will automatically detect the value for this parameter if none is
+ specified.
+ - Values: 0 to 7 (default 0)
+ Bit values indicate:
+ - 0: Thresholding disabled
+ - 1: Thresholding enabled
+ </td></tr>
+
+<tr>
+ <td>dma_desc_enable</td>
+ <td>Specifies whether to enable Descriptor DMA mode.
+ The driver will automatically detect the value for this parameter if none is
+ specified.
+ - 0: Descriptor DMA disabled
+ - 1: Descriptor DMA (default, if available)
+ </td></tr>
+
+<tr>
+ <td>mpi_enable</td>
+ <td>Specifies whether to enable MPI enhancement mode.
+ The driver will automatically detect the value for this parameter if none is
+ specified.
+ - 0: MPI disabled (default)
+ - 1: MPI enable
+ </td></tr>
+
+<tr>
+ <td>pti_enable</td>
+ <td>Specifies whether to enable PTI enhancement support.
+ The driver will automatically detect the value for this parameter if none is
+ specified.
+ - 0: PTI disabled (default)
+ - 1: PTI enable
+ </td></tr>
+
+<tr>
+ <td>lpm_enable</td>
+ <td>Specifies whether to enable LPM support.
+ The driver will automatically detect the value for this parameter if none is
+ specified.
+ - 0: LPM disabled
+ - 1: LPM enable (default, if available)
+ </td></tr>
+
+<tr>
+ <td>ic_usb_cap</td>
+ <td>Specifies whether to enable IC_USB capability.
+ The driver will automatically detect the value for this parameter if none is
+ specified.
+ - 0: IC_USB disabled (default, if available)
+ - 1: IC_USB enable 
+ </td></tr>
+
+<tr>
+ <td>ahb_thr_ratio</td>
+ <td>Specifies AHB Threshold ratio.
+ - Values: 0 to 3 (default 0)
+ </td></tr>
+
+<tr>
+ <td>power_down</td>
+ <td>Specifies Power Down(Hibernation) Mode.
+ The driver will automatically detect the value for this parameter if none is
+ specified.
+ - 0: Power Down disabled (default)
+ - 2: Power Down enabled
+ </td></tr>
+ 
+ <tr>
+ <td>reload_ctl</td>
+ <td>Specifies whether dynamic reloading of the HFIR register is allowed during
+ run time. The driver will automatically detect the value for this parameter if
+ none is specified. In case the HFIR value is reloaded when HFIR.RldCtrl == 1'b0
+ the core might misbehave.
+ - 0: Reload Control disabled (default)
+ - 1: Reload Control enabled
+ </td></tr>
+
+ <tr>
+ <td>dev_out_nak</td>
+ <td>Specifies whether  Device OUT NAK enhancement enabled or no.
+ The driver will automatically detect the value for this parameter if
+ none is specified. This parameter is valid only when OTG_EN_DESC_DMA == 1æŠŒ1.
+ - 0: The core does not set NAK after Bulk OUT transfer complete (default)
+ - 1: The core sets NAK after Bulk OUT transfer complete
+ </td></tr>
+
+<tr>
+ <td>adp_enable</td>
+ <td>Specifies whether ADP feature is enabled.
+ The driver will automatically detect the value for this parameter if none is
+ specified.
+ - 0: ADP feature disabled (default)
+ - 1: ADP feature enabled
+ </td></tr>
+
+  <tr>
+ <td>otg_ver</td>
+ <td>Specifies whether OTG is performing as USB OTG Revision 2.0 or Revision 1.3
+ USB OTG device.
+ - 0: OTG 2.0 support disabled (default)
+ - 1: OTG 2.0 support enabled 
+ </td></tr>
+
+*/
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/.dwc_otg_driver.c.swp linux-3.0.82x/drivers/usb/gadget/dwc/driver/.dwc_otg_driver.c.swp
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_driver.h linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_driver.h
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_driver.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_driver.h	2017-09-23 03:42:50.214674465 +0800
@@ -0,0 +1,86 @@
+/* ==========================================================================
+ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_driver.h $
+ * $Revision: #19 $
+ * $Date: 2010/11/15 $
+ * $Change: 1627671 $
+ *
+ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+ * otherwise expressly agreed to in writing between Synopsys and you.
+ * 
+ * The Software IS NOT an item of Licensed Software or Licensed Product under
+ * any End User Software License Agreement or Agreement for Licensed Product
+ * with Synopsys or any supplement thereto. You are permitted to use and
+ * redistribute this Software in source and binary forms, with or without
+ * modification, provided that redistributions of source code must retain this
+ * notice. You may not view, use, disclose, copy or distribute this file or
+ * any information contained herein except pursuant to this license grant from
+ * Synopsys. If you do not agree with this notice, including the disclaimer
+ * below, then you are not authorized to use the Software.
+ * 
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================== */
+
+#ifndef __DWC_OTG_DRIVER_H__
+#define __DWC_OTG_DRIVER_H__
+
+/** @file
+ * This file contains the interface to the Linux driver.
+ */
+#include "dwc_otg_os_dep.h"
+#include "dwc_otg_core_if.h"
+
+/* Type declarations */
+struct dwc_otg_pcd;
+struct dwc_otg_hcd;
+
+/**
+ * This structure is a wrapper that encapsulates the driver components used to
+ * manage a single DWC_otg controller.
+ */
+typedef struct dwc_otg_device {
+	/** Structure containing OS-dependent stuff. KEEP THIS STRUCT AT THE
+	 * VERY BEGINNING OF THE DEVICE STRUCT. OSes such as FreeBSD and NetBSD
+	 * require this. */
+	struct os_dependent os_dep;
+
+	/** Pointer to the core interface structure. */
+	dwc_otg_core_if_t *core_if;
+
+	/** Pointer to the PCD structure. */
+	struct dwc_otg_pcd *pcd;
+
+	/** Pointer to the HCD structure. */
+	struct dwc_otg_hcd *hcd;
+
+	/** Flag to indicate whether the common IRQ handler is installed. */
+	uint8_t common_irq_installed;
+
+} dwc_otg_device_t;
+
+/*We must clear S3C24XX_EINTPEND external interrupt register 
+ * because after clearing in this register trigerred IRQ from 
+ * H/W core in kernel interrupt can be occured again before OTG
+ * handlers clear all IRQ sources of Core registers because of
+ * timing latencies and Low Level IRQ Type.
+ */
+#ifdef CONFIG_MACH_IPMATE
+#define  S3C2410X_CLEAR_EINTPEND()   \
+do { \
+	__raw_writel(1UL << 11,S3C24XX_EINTPEND); \
+} while (0)
+#else
+#define  S3C2410X_CLEAR_EINTPEND()   do { } while (0)
+#endif
+
+#endif
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_hcd.c linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_hcd.c
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_hcd.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_hcd.c	2017-09-23 03:42:50.218674452 +0800
@@ -0,0 +1,3344 @@
+/* ==========================================================================
+ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_hcd.c $
+ * $Revision: #102 $
+ * $Date: 2011/05/17 $
+ * $Change: 1774110 $
+ *
+ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+ * otherwise expressly agreed to in writing between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product under
+ * any End User Software License Agreement or Agreement for Licensed Product
+ * with Synopsys or any supplement thereto. You are permitted to use and
+ * redistribute this Software in source and binary forms, with or without
+ * modification, provided that redistributions of source code must retain this
+ * notice. You may not view, use, disclose, copy or distribute this file or
+ * any information contained herein except pursuant to this license grant from
+ * Synopsys. If you do not agree with this notice, including the disclaimer
+ * below, then you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================== */
+#ifndef DWC_DEVICE_ONLY
+
+/** @file
+ * This file implements HCD Core. All code in this file is portable and doesn't
+ * use any OS specific functions.
+ * Interface provided by HCD Core is defined in <code><hcd_if.h></code>
+ * header file.
+ */
+
+#include "dwc_otg_hcd.h"
+#include "dwc_otg_regs.h"
+
+dwc_otg_hcd_t *dwc_otg_hcd_alloc_hcd(void)
+{
+	return DWC_ALLOC(sizeof(dwc_otg_hcd_t));
+}
+
+/**
+ * Connection timeout function.  An OTG host is required to display a
+ * message if the device does not connect within 10 seconds.
+ */
+void dwc_otg_hcd_connect_timeout(void *ptr)
+{
+	DWC_DEBUGPL(DBG_HCDV, "%s(%p)\n", __func__, ptr);
+	DWC_PRINTF("Connect Timeout\n");
+	__DWC_ERROR("Device Not Connected/Responding\n");
+}
+
+#ifdef DEBUG
+static void dump_channel_info(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh)
+{
+	if (qh->channel != NULL) {
+		dwc_hc_t *hc = qh->channel;
+		dwc_list_link_t *item;
+		dwc_otg_qh_t *qh_item;
+		int num_channels = hcd->core_if->core_params->host_channels;
+		int i;
+
+		dwc_otg_hc_regs_t *hc_regs;
+		hcchar_data_t hcchar;
+		hcsplt_data_t hcsplt;
+		hctsiz_data_t hctsiz;
+		uint32_t hcdma;
+
+		hc_regs = hcd->core_if->host_if->hc_regs[hc->hc_num];
+		hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+		hcsplt.d32 = DWC_READ_REG32(&hc_regs->hcsplt);
+		hctsiz.d32 = DWC_READ_REG32(&hc_regs->hctsiz);
+		hcdma = DWC_READ_REG32(&hc_regs->hcdma);
+
+		DWC_PRINTF("  Assigned to channel %p:\n", hc);
+		DWC_PRINTF("    hcchar 0x%08x, hcsplt 0x%08x\n", hcchar.d32,
+			   hcsplt.d32);
+		DWC_PRINTF("    hctsiz 0x%08x, hcdma 0x%08x\n", hctsiz.d32,
+			   hcdma);
+		DWC_PRINTF("    dev_addr: %d, ep_num: %d, ep_is_in: %d\n",
+			   hc->dev_addr, hc->ep_num, hc->ep_is_in);
+		DWC_PRINTF("    ep_type: %d\n", hc->ep_type);
+		DWC_PRINTF("    max_packet: %d\n", hc->max_packet);
+		DWC_PRINTF("    data_pid_start: %d\n", hc->data_pid_start);
+		DWC_PRINTF("    xfer_started: %d\n", hc->xfer_started);
+		DWC_PRINTF("    halt_status: %d\n", hc->halt_status);
+		DWC_PRINTF("    xfer_buff: %p\n", hc->xfer_buff);
+		DWC_PRINTF("    xfer_len: %d\n", hc->xfer_len);
+		DWC_PRINTF("    qh: %p\n", hc->qh);
+		DWC_PRINTF("  NP inactive sched:\n");
+		DWC_LIST_FOREACH(item, &hcd->non_periodic_sched_inactive) {
+			qh_item =
+			    DWC_LIST_ENTRY(item, dwc_otg_qh_t, qh_list_entry);
+			DWC_PRINTF("    %p\n", qh_item);
+		}
+		DWC_PRINTF("  NP active sched:\n");
+		DWC_LIST_FOREACH(item, &hcd->non_periodic_sched_active) {
+			qh_item =
+			    DWC_LIST_ENTRY(item, dwc_otg_qh_t, qh_list_entry);
+			DWC_PRINTF("    %p\n", qh_item);
+		}
+		DWC_PRINTF("  Channels: \n");
+		for (i = 0; i < num_channels; i++) {
+			dwc_hc_t *hc = hcd->hc_ptr_array[i];
+			DWC_PRINTF("    %2d: %p\n", i, hc);
+		}
+	}
+}
+#endif /* DEBUG */
+
+/**
+ * Work queue function for starting the HCD when A-Cable is connected.
+ * The hcd_start() must be called in a process context.
+ */
+static void hcd_start_func(void *_vp)
+{
+	dwc_otg_hcd_t *hcd = (dwc_otg_hcd_t *) _vp;
+
+	DWC_DEBUGPL(DBG_HCDV, "%s() %p\n", __func__, hcd);
+	if (hcd) {
+		hcd->fops->start(hcd);
+	}
+}
+
+static void del_xfer_timers(dwc_otg_hcd_t * hcd)
+{
+#ifdef DEBUG
+	int i;
+	int num_channels = hcd->core_if->core_params->host_channels;
+	for (i = 0; i < num_channels; i++) {
+		DWC_TIMER_CANCEL(hcd->core_if->hc_xfer_timer[i]);
+	}
+#endif
+}
+
+static void del_timers(dwc_otg_hcd_t * hcd)
+{
+	del_xfer_timers(hcd);
+	DWC_TIMER_CANCEL(hcd->conn_timer);
+}
+
+/**
+ * Processes all the URBs in a single list of QHs. Completes them with
+ * -ETIMEDOUT and frees the QTD.
+ */
+static void kill_urbs_in_qh_list(dwc_otg_hcd_t * hcd, dwc_list_link_t * qh_list)
+{
+	dwc_list_link_t *qh_item;
+	dwc_otg_qh_t *qh;
+	dwc_otg_qtd_t *qtd, *qtd_tmp;
+
+	DWC_LIST_FOREACH(qh_item, qh_list) {
+		qh = DWC_LIST_ENTRY(qh_item, dwc_otg_qh_t, qh_list_entry);
+		DWC_CIRCLEQ_FOREACH_SAFE(qtd, qtd_tmp,
+					 &qh->qtd_list, qtd_list_entry) {
+			qtd = DWC_CIRCLEQ_FIRST(&qh->qtd_list);
+			if (qtd->urb != NULL) {
+				hcd->fops->complete(hcd, qtd->urb->priv,
+						    qtd->urb, -DWC_E_TIMEOUT);
+				dwc_otg_hcd_qtd_remove_and_free(hcd, qtd, qh);
+			}
+
+		}
+	}
+}
+
+/**
+ * Responds with an error status of ETIMEDOUT to all URBs in the non-periodic
+ * and periodic schedules. The QTD associated with each URB is removed from
+ * the schedule and freed. This function may be called when a disconnect is
+ * detected or when the HCD is being stopped.
+ */
+static void kill_all_urbs(dwc_otg_hcd_t * hcd)
+{
+	kill_urbs_in_qh_list(hcd, &hcd->non_periodic_sched_inactive);
+	kill_urbs_in_qh_list(hcd, &hcd->non_periodic_sched_active);
+	kill_urbs_in_qh_list(hcd, &hcd->periodic_sched_inactive);
+	kill_urbs_in_qh_list(hcd, &hcd->periodic_sched_ready);
+	kill_urbs_in_qh_list(hcd, &hcd->periodic_sched_assigned);
+	kill_urbs_in_qh_list(hcd, &hcd->periodic_sched_queued);
+}
+
+/**
+ * Start the connection timer.  An OTG host is required to display a
+ * message if the device does not connect within 10 seconds.  The
+ * timer is deleted if a port connect interrupt occurs before the
+ * timer expires.
+ */
+static void dwc_otg_hcd_start_connect_timer(dwc_otg_hcd_t * hcd)
+{
+	DWC_TIMER_SCHEDULE(hcd->conn_timer, 10000 /* 10 secs */ );
+}
+
+/**
+ * HCD Callback function for disconnect of the HCD.
+ *
+ * @param p void pointer to the <code>struct usb_hcd</code>
+ */
+static int32_t dwc_otg_hcd_session_start_cb(void *p)
+{
+	dwc_otg_hcd_t *dwc_otg_hcd;
+	DWC_DEBUGPL(DBG_HCDV, "%s(%p)\n", __func__, p);
+	dwc_otg_hcd = p;
+	dwc_otg_hcd_start_connect_timer(dwc_otg_hcd);
+	return 1;
+}
+
+/**
+ * HCD Callback function for starting the HCD when A-Cable is
+ * connected.
+ *
+ * @param p void pointer to the <code>struct usb_hcd</code>
+ */
+static int32_t dwc_otg_hcd_start_cb(void *p)
+{
+	dwc_otg_hcd_t *dwc_otg_hcd = p;
+	dwc_otg_core_if_t *core_if;
+	hprt0_data_t hprt0;
+
+	core_if = dwc_otg_hcd->core_if;
+
+	if (core_if->op_state == B_HOST) {
+		/*
+		 * Reset the port.  During a HNP mode switch the reset
+		 * needs to occur within 1ms and have a duration of at
+		 * least 50ms.
+		 */
+		hprt0.d32 = dwc_otg_read_hprt0(core_if);
+		hprt0.b.prtrst = 1;
+		DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+	}
+	DWC_WORKQ_SCHEDULE_DELAYED(core_if->wq_otg,
+				   hcd_start_func, dwc_otg_hcd, 50,
+				   "start hcd");
+
+	return 1;
+}
+
+/**
+ * HCD Callback function for disconnect of the HCD.
+ *
+ * @param p void pointer to the <code>struct usb_hcd</code>
+ */
+static int32_t dwc_otg_hcd_disconnect_cb(void *p)
+{
+	gintsts_data_t intr;
+	dwc_otg_hcd_t *dwc_otg_hcd = p;
+
+	/*
+	 * Set status flags for the hub driver.
+	 */
+	dwc_otg_hcd->flags.b.port_connect_status_change = 1;
+	dwc_otg_hcd->flags.b.port_connect_status = 0;
+
+	/*
+	 * Shutdown any transfers in process by clearing the Tx FIFO Empty
+	 * interrupt mask and status bits and disabling subsequent host
+	 * channel interrupts.
+	 */
+	intr.d32 = 0;
+	intr.b.nptxfempty = 1;
+	intr.b.ptxfempty = 1;
+	intr.b.hcintr = 1;
+	DWC_MODIFY_REG32(&dwc_otg_hcd->core_if->core_global_regs->gintmsk,
+			 intr.d32, 0);
+	DWC_MODIFY_REG32(&dwc_otg_hcd->core_if->core_global_regs->gintsts,
+			 intr.d32, 0);
+
+	del_timers(dwc_otg_hcd);
+
+	/*
+	 * Turn off the vbus power only if the core has transitioned to device
+	 * mode. If still in host mode, need to keep power on to detect a
+	 * reconnection.
+	 */
+	if (dwc_otg_is_device_mode(dwc_otg_hcd->core_if)) {
+		if (dwc_otg_hcd->core_if->op_state != A_SUSPEND) {
+			hprt0_data_t hprt0 = {.d32 = 0 };
+			DWC_PRINTF("Disconnect: PortPower off\n");
+			hprt0.b.prtpwr = 0;
+			DWC_WRITE_REG32(dwc_otg_hcd->core_if->host_if->hprt0,
+					hprt0.d32);
+		}
+
+		dwc_otg_disable_host_interrupts(dwc_otg_hcd->core_if);
+	}
+
+	/* Respond with an error status to all URBs in the schedule. */
+	kill_all_urbs(dwc_otg_hcd);
+
+	if (dwc_otg_is_host_mode(dwc_otg_hcd->core_if)) {
+		/* Clean up any host channels that were in use. */
+		int num_channels;
+		int i;
+		dwc_hc_t *channel;
+		dwc_otg_hc_regs_t *hc_regs;
+		hcchar_data_t hcchar;
+
+		num_channels = dwc_otg_hcd->core_if->core_params->host_channels;
+
+		if (!dwc_otg_hcd->core_if->dma_enable) {
+			/* Flush out any channel requests in slave mode. */
+			for (i = 0; i < num_channels; i++) {
+				channel = dwc_otg_hcd->hc_ptr_array[i];
+				if (DWC_CIRCLEQ_EMPTY_ENTRY
+				    (channel, hc_list_entry)) {
+					hc_regs =
+					    dwc_otg_hcd->core_if->
+					    host_if->hc_regs[i];
+					hcchar.d32 =
+					    DWC_READ_REG32(&hc_regs->hcchar);
+					if (hcchar.b.chen) {
+						hcchar.b.chen = 0;
+						hcchar.b.chdis = 1;
+						hcchar.b.epdir = 0;
+						DWC_WRITE_REG32
+						    (&hc_regs->hcchar,
+						     hcchar.d32);
+					}
+				}
+			}
+		}
+
+		for (i = 0; i < num_channels; i++) {
+			channel = dwc_otg_hcd->hc_ptr_array[i];
+			if (DWC_CIRCLEQ_EMPTY_ENTRY(channel, hc_list_entry)) {
+				hc_regs =
+				    dwc_otg_hcd->core_if->host_if->hc_regs[i];
+				hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+				if (hcchar.b.chen) {
+					/* Halt the channel. */
+					hcchar.b.chdis = 1;
+					DWC_WRITE_REG32(&hc_regs->hcchar,
+							hcchar.d32);
+				}
+
+				dwc_otg_hc_cleanup(dwc_otg_hcd->core_if,
+						   channel);
+				DWC_CIRCLEQ_INSERT_TAIL
+				    (&dwc_otg_hcd->free_hc_list, channel,
+				     hc_list_entry);
+				/*
+				 * Added for Descriptor DMA to prevent channel double cleanup
+				 * in release_channel_ddma(). Which called from ep_disable
+				 * when device disconnect.
+				 */
+				channel->qh = NULL;
+			}
+		}
+	}
+
+	if (dwc_otg_hcd->fops->disconnect) {
+		dwc_otg_hcd->fops->disconnect(dwc_otg_hcd);
+	}
+
+	return 1;
+}
+
+/**
+ * HCD Callback function for stopping the HCD.
+ *
+ * @param p void pointer to the <code>struct usb_hcd</code>
+ */
+static int32_t dwc_otg_hcd_stop_cb(void *p)
+{
+	dwc_otg_hcd_t *dwc_otg_hcd = p;
+
+	DWC_DEBUGPL(DBG_HCDV, "%s(%p)\n", __func__, p);
+	dwc_otg_hcd_stop(dwc_otg_hcd);
+	return 1;
+}
+
+#ifdef CONFIG_USB_DWC_OTG_LPM
+/**
+ * HCD Callback function for sleep of HCD.
+ *
+ * @param p void pointer to the <code>struct usb_hcd</code>
+ */
+static int dwc_otg_hcd_sleep_cb(void *p)
+{
+	dwc_otg_hcd_t *hcd = p;
+
+	dwc_otg_hcd_free_hc_from_lpm(hcd);
+
+	return 0;
+}
+#endif
+
+/**
+ * HCD Callback function for Remote Wakeup.
+ *
+ * @param p void pointer to the <code>struct usb_hcd</code>
+ */
+static int dwc_otg_hcd_rem_wakeup_cb(void *p)
+{
+	dwc_otg_hcd_t *hcd = p;
+
+	if (hcd->core_if->lx_state == DWC_OTG_L2) {
+		hcd->flags.b.port_suspend_change = 1;
+	}
+#ifdef CONFIG_USB_DWC_OTG_LPM
+	else {
+		hcd->flags.b.port_l1_change = 1;
+	}
+#endif
+	return 0;
+}
+
+/**
+ * Halts the DWC_otg host mode operations in a clean manner. USB transfers are
+ * stopped.
+ */
+void dwc_otg_hcd_stop(dwc_otg_hcd_t * hcd)
+{
+	hprt0_data_t hprt0 = {.d32 = 0 };
+
+	DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD STOP\n");
+
+	/*
+	 * The root hub should be disconnected before this function is called.
+	 * The disconnect will clear the QTD lists (via ..._hcd_urb_dequeue)
+	 * and the QH lists (via ..._hcd_endpoint_disable).
+	 */
+
+	/* Turn off all host-specific interrupts. */
+	dwc_otg_disable_host_interrupts(hcd->core_if);
+
+	/* Turn off the vbus power */
+	DWC_PRINTF("PortPower off\n");
+	hprt0.b.prtpwr = 0;
+	DWC_WRITE_REG32(hcd->core_if->host_if->hprt0, hprt0.d32);
+	dwc_mdelay(1);
+}
+
+int dwc_otg_hcd_urb_enqueue(dwc_otg_hcd_t * hcd,
+			    dwc_otg_hcd_urb_t * dwc_otg_urb, void **ep_handle,
+			    int atomic_alloc)
+{
+	dwc_irqflags_t flags;
+	int retval = 0;
+	dwc_otg_qtd_t *qtd;
+
+	if (!hcd->flags.b.port_connect_status) {
+		/* No longer connected. */
+		DWC_ERROR("Not connected\n");
+		return -DWC_E_NO_DEVICE;
+	}
+
+	qtd = dwc_otg_hcd_qtd_create(dwc_otg_urb, atomic_alloc);
+	if (qtd == NULL) {
+		DWC_ERROR("DWC OTG HCD URB Enqueue failed creating QTD\n");
+		return -DWC_E_NO_MEMORY;
+	}
+
+	retval =
+	    dwc_otg_hcd_qtd_add(qtd, hcd, (dwc_otg_qh_t **) ep_handle, atomic_alloc);
+	if (retval < 0) {
+		DWC_ERROR("DWC OTG HCD URB Enqueue failed adding QTD. "
+			  "Error status %d\n", retval);
+		dwc_otg_hcd_qtd_free(qtd);
+	} else {
+		qtd->qh = *ep_handle;
+	}
+
+	if (hcd->core_if->dma_desc_enable && retval == 0) {
+		dwc_otg_transaction_type_e tr_type;
+		if ((qtd->qh->ep_type == UE_BULK)
+		    && !(qtd->urb->flags & URB_GIVEBACK_ASAP)) {
+			/* Do not schedule SG transcations until qtd has URB_GIVEBACK_ASAP set */
+			return 0;
+		}
+		DWC_SPINLOCK_IRQSAVE(hcd->lock, &flags);
+		tr_type = dwc_otg_hcd_select_transactions(hcd);
+		if (tr_type != DWC_OTG_TRANSACTION_NONE) {
+			dwc_otg_hcd_queue_transactions(hcd, tr_type);
+		}
+		DWC_SPINUNLOCK_IRQRESTORE(hcd->lock, flags);
+	}
+
+	return retval;
+}
+
+int dwc_otg_hcd_urb_dequeue(dwc_otg_hcd_t * hcd,
+			    dwc_otg_hcd_urb_t * dwc_otg_urb)
+{
+	dwc_otg_qh_t *qh;
+	dwc_otg_qtd_t *urb_qtd;
+
+	urb_qtd = dwc_otg_urb->qtd;
+	qh = urb_qtd->qh;
+#ifdef DEBUG
+	if (CHK_DEBUG_LEVEL(DBG_HCDV | DBG_HCD_URB)) {
+		if (urb_qtd->in_process) {
+			dump_channel_info(hcd, qh);
+		}
+	}
+#endif
+	if (urb_qtd->in_process && qh->channel) {
+		/* The QTD is in process (it has been assigned to a channel). */
+		if (hcd->flags.b.port_connect_status) {
+			/*
+			 * If still connected (i.e. in host mode), halt the
+			 * channel so it can be used for other transfers. If
+			 * no longer connected, the host registers can't be
+			 * written to halt the channel since the core is in
+			 * device mode.
+			 */
+			dwc_otg_hc_halt(hcd->core_if, qh->channel,
+					DWC_OTG_HC_XFER_URB_DEQUEUE);
+		}
+	}
+
+	/*
+	 * Free the QTD and clean up the associated QH. Leave the QH in the
+	 * schedule if it has any remaining QTDs.
+	 */
+
+	if (!hcd->core_if->dma_desc_enable) {
+		uint8_t b = urb_qtd->in_process;
+		dwc_otg_hcd_qtd_remove_and_free(hcd, urb_qtd, qh);
+		if (b) {
+			dwc_otg_hcd_qh_deactivate(hcd, qh, 0);
+			qh->channel = NULL;
+		} else if (DWC_CIRCLEQ_EMPTY(&qh->qtd_list)) {
+			dwc_otg_hcd_qh_remove(hcd, qh);
+		}
+	} else {
+		dwc_otg_hcd_qtd_remove_and_free(hcd, urb_qtd, qh);
+	}
+	return 0;
+}
+
+int dwc_otg_hcd_endpoint_disable(dwc_otg_hcd_t * hcd, void *ep_handle,
+				 int retry)
+{
+	dwc_otg_qh_t *qh = (dwc_otg_qh_t *) ep_handle;
+	int retval = 0;
+	dwc_irqflags_t flags;
+
+	if (retry < 0) {
+		retval = -DWC_E_INVALID;
+		goto done;
+	}
+
+	if (!qh) {
+		retval = -DWC_E_INVALID;
+		goto done;
+	}
+
+	DWC_SPINLOCK_IRQSAVE(hcd->lock, &flags);
+
+	while (!DWC_CIRCLEQ_EMPTY(&qh->qtd_list) && retry) {
+		DWC_SPINUNLOCK_IRQRESTORE(hcd->lock, flags);
+		retry--;
+		dwc_msleep(5);
+		DWC_SPINLOCK_IRQSAVE(hcd->lock, &flags);
+	}
+
+	dwc_otg_hcd_qh_remove(hcd, qh);
+
+	DWC_SPINUNLOCK_IRQRESTORE(hcd->lock, flags);
+	/*
+	 * Split dwc_otg_hcd_qh_remove_and_free() into qh_remove
+	 * and qh_free to prevent stack dump on DWC_DMA_FREE() with
+	 * irq_disabled (spinlock_irqsave) in dwc_otg_hcd_desc_list_free()
+	 * and dwc_otg_hcd_frame_list_alloc().
+	 */
+	dwc_otg_hcd_qh_free(hcd, qh);
+
+done:
+	return retval;
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30)
+int dwc_otg_hcd_endpoint_reset(dwc_otg_hcd_t * hcd, void *ep_handle)
+{
+	int retval = 0;
+	dwc_otg_qh_t *qh = (dwc_otg_qh_t *) ep_handle;
+	if (!qh)
+		return -DWC_E_INVALID;
+
+	qh->data_toggle = DWC_OTG_HC_PID_DATA0;
+	return retval;
+}
+#endif
+
+/**
+ * HCD Callback structure for handling mode switching.
+ */
+static dwc_otg_cil_callbacks_t hcd_cil_callbacks = {
+	.start = dwc_otg_hcd_start_cb,
+	.stop = dwc_otg_hcd_stop_cb,
+	.disconnect = dwc_otg_hcd_disconnect_cb,
+	.session_start = dwc_otg_hcd_session_start_cb,
+	.resume_wakeup = dwc_otg_hcd_rem_wakeup_cb,
+#ifdef CONFIG_USB_DWC_OTG_LPM
+	.sleep = dwc_otg_hcd_sleep_cb,
+#endif
+	.p = 0,
+};
+
+/**
+ * Reset tasklet function
+ */
+static void reset_tasklet_func(void *data)
+{
+	dwc_otg_hcd_t *dwc_otg_hcd = (dwc_otg_hcd_t *) data;
+	dwc_otg_core_if_t *core_if = dwc_otg_hcd->core_if;
+	hprt0_data_t hprt0;
+
+	DWC_DEBUGPL(DBG_HCDV, "USB RESET tasklet called\n");
+
+	hprt0.d32 = dwc_otg_read_hprt0(core_if);
+	hprt0.b.prtrst = 1;
+	DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+	dwc_mdelay(60);
+
+	hprt0.b.prtrst = 0;
+	DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+	dwc_otg_hcd->flags.b.port_reset_change = 1;
+}
+
+static void qh_list_free(dwc_otg_hcd_t * hcd, dwc_list_link_t * qh_list)
+{
+	dwc_list_link_t *item;
+	dwc_otg_qh_t *qh;
+	dwc_irqflags_t flags;
+
+	if (!qh_list->next) {
+		/* The list hasn't been initialized yet. */
+		return;
+	}
+	/*
+	 * Hold spinlock here. Not needed in that case if bellow 
+	 * function is being called from ISR 
+	 */
+	DWC_SPINLOCK_IRQSAVE(hcd->lock, &flags);
+	/* Ensure there are no QTDs or URBs left. */
+	kill_urbs_in_qh_list(hcd, qh_list);
+	DWC_SPINUNLOCK_IRQRESTORE(hcd->lock, flags);
+
+	DWC_LIST_FOREACH(item, qh_list) {
+		qh = DWC_LIST_ENTRY(item, dwc_otg_qh_t, qh_list_entry);
+		dwc_otg_hcd_qh_remove_and_free(hcd, qh);
+	}
+}
+
+/**
+ * Exit from Hibernation if Host did not detect SRP from connected SRP capable
+ * Device during SRP time by host power up.
+ */
+void dwc_otg_hcd_power_up(void *ptr)
+{
+	gpwrdn_data_t gpwrdn = {.d32 = 0 };
+	dwc_otg_core_if_t *core_if = (dwc_otg_core_if_t *) ptr;
+
+	DWC_PRINTF("%s called\n", __FUNCTION__);
+
+	if (!core_if->hibernation_suspend) {
+		DWC_PRINTF("Already exited from Hibernation\n");
+		return;
+	}
+
+	/* Switch on the voltage to the core */
+	gpwrdn.b.pwrdnswtch = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+	dwc_udelay(10);
+
+	/* Reset the core */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pwrdnrstn = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+	dwc_udelay(10);
+
+	/* Disable power clamps */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pwrdnclmp = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+
+	/* Remove reset the core signal */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pwrdnrstn = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32);
+	dwc_udelay(10);
+
+	/* Disable PMU interrupt */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pmuintsel = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+
+	core_if->hibernation_suspend = 0;
+
+	/* Disable PMU */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.pmuactv = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+	dwc_udelay(10);
+
+	/* Enable VBUS */
+	gpwrdn.d32 = 0;
+	gpwrdn.b.dis_vbus = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0);
+
+	core_if->op_state = A_HOST;
+	dwc_otg_core_init(core_if);
+	dwc_otg_enable_global_interrupts(core_if);
+	cil_hcd_start(core_if);
+}
+
+/**
+ * Frees secondary storage associated with the dwc_otg_hcd structure contained
+ * in the struct usb_hcd field.
+ */
+static void dwc_otg_hcd_free(dwc_otg_hcd_t * dwc_otg_hcd)
+{
+	int i;
+
+	DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD FREE\n");
+
+	del_timers(dwc_otg_hcd);
+
+	/* Free memory for QH/QTD lists */
+	qh_list_free(dwc_otg_hcd, &dwc_otg_hcd->non_periodic_sched_inactive);
+	qh_list_free(dwc_otg_hcd, &dwc_otg_hcd->non_periodic_sched_active);
+	qh_list_free(dwc_otg_hcd, &dwc_otg_hcd->periodic_sched_inactive);
+	qh_list_free(dwc_otg_hcd, &dwc_otg_hcd->periodic_sched_ready);
+	qh_list_free(dwc_otg_hcd, &dwc_otg_hcd->periodic_sched_assigned);
+	qh_list_free(dwc_otg_hcd, &dwc_otg_hcd->periodic_sched_queued);
+
+	/* Free memory for the host channels. */
+	for (i = 0; i < MAX_EPS_CHANNELS; i++) {
+		dwc_hc_t *hc = dwc_otg_hcd->hc_ptr_array[i];
+
+#ifdef DEBUG
+		if (dwc_otg_hcd->core_if->hc_xfer_timer[i]) {
+			DWC_TIMER_FREE(dwc_otg_hcd->core_if->hc_xfer_timer[i]);
+		}
+#endif
+		if (hc != NULL) {
+			DWC_DEBUGPL(DBG_HCDV, "HCD Free channel #%i, hc=%p\n",
+				    i, hc);
+			DWC_FREE(hc);
+		}
+	}
+
+	if (dwc_otg_hcd->core_if->dma_enable) {
+		if (dwc_otg_hcd->status_buf_dma) {
+			DWC_DMA_FREE(DWC_OTG_HCD_STATUS_BUF_SIZE,
+				     dwc_otg_hcd->status_buf,
+				     dwc_otg_hcd->status_buf_dma);
+		}
+	} else if (dwc_otg_hcd->status_buf != NULL) {
+		DWC_FREE(dwc_otg_hcd->status_buf);
+	}
+	DWC_SPINLOCK_FREE(dwc_otg_hcd->lock);
+	/* Set core_if's lock pointer to NULL */
+	dwc_otg_hcd->core_if->lock = NULL;
+
+	DWC_TIMER_FREE(dwc_otg_hcd->conn_timer);
+	DWC_TASK_FREE(dwc_otg_hcd->reset_tasklet);
+
+#ifdef DWC_DEV_SRPCAP
+	if (dwc_otg_hcd->core_if->power_down == 2 &&
+	    dwc_otg_hcd->core_if->pwron_timer) {
+		DWC_TIMER_FREE(dwc_otg_hcd->core_if->pwron_timer);
+	}
+#endif
+	DWC_FREE(dwc_otg_hcd);
+}
+
+int dwc_otg_hcd_init(dwc_otg_hcd_t * hcd, dwc_otg_core_if_t * core_if)
+{
+	int retval = 0;
+	int num_channels;
+	int i;
+	dwc_hc_t *channel;
+
+	hcd->lock = DWC_SPINLOCK_ALLOC();
+	if (!hcd->lock) {
+		DWC_ERROR("Could not allocate lock for pcd");
+		DWC_FREE(hcd);
+		retval = -DWC_E_NO_MEMORY;
+		goto out;
+	}
+	hcd->core_if = core_if;
+
+	/* Register the HCD CIL Callbacks */
+	dwc_otg_cil_register_hcd_callbacks(hcd->core_if,
+					   &hcd_cil_callbacks, hcd);
+
+	/* Initialize the non-periodic schedule. */
+	DWC_LIST_INIT(&hcd->non_periodic_sched_inactive);
+	DWC_LIST_INIT(&hcd->non_periodic_sched_active);
+
+	/* Initialize the periodic schedule. */
+	DWC_LIST_INIT(&hcd->periodic_sched_inactive);
+	DWC_LIST_INIT(&hcd->periodic_sched_ready);
+	DWC_LIST_INIT(&hcd->periodic_sched_assigned);
+	DWC_LIST_INIT(&hcd->periodic_sched_queued);
+
+	/*
+	 * Create a host channel descriptor for each host channel implemented
+	 * in the controller. Initialize the channel descriptor array.
+	 */
+	DWC_CIRCLEQ_INIT(&hcd->free_hc_list);
+	num_channels = hcd->core_if->core_params->host_channels;
+	DWC_MEMSET(hcd->hc_ptr_array, 0, sizeof(hcd->hc_ptr_array));
+	for (i = 0; i < num_channels; i++) {
+		channel = DWC_ALLOC(sizeof(dwc_hc_t));
+		if (channel == NULL) {
+			retval = -DWC_E_NO_MEMORY;
+			DWC_ERROR("%s: host channel allocation failed\n",
+				  __func__);
+			dwc_otg_hcd_free(hcd);
+			goto out;
+		}
+		channel->hc_num = i;
+		hcd->hc_ptr_array[i] = channel;
+#ifdef DEBUG
+		hcd->core_if->hc_xfer_timer[i] =
+		    DWC_TIMER_ALLOC("hc timer", hc_xfer_timeout,
+				    &hcd->core_if->hc_xfer_info[i]);
+#endif
+		DWC_DEBUGPL(DBG_HCDV, "HCD Added channel #%d, hc=%p\n", i,
+			    channel);
+	}
+
+	/* Initialize the Connection timeout timer. */
+	hcd->conn_timer = DWC_TIMER_ALLOC("Connection timer",
+					  dwc_otg_hcd_connect_timeout, 0);
+
+	/* Initialize reset tasklet. */
+	hcd->reset_tasklet = DWC_TASK_ALLOC("reset_tasklet", reset_tasklet_func, hcd);
+#ifdef DWC_DEV_SRPCAP
+	if (hcd->core_if->power_down == 2) {
+		/* Initialize Power on timer for Host power up in case hibernation */
+		hcd->core_if->pwron_timer = DWC_TIMER_ALLOC("PWRON TIMER",
+									dwc_otg_hcd_power_up, core_if);
+	}
+#endif	
+
+	/*
+	 * Allocate space for storing data on status transactions. Normally no
+	 * data is sent, but this space acts as a bit bucket. This must be
+	 * done after usb_add_hcd since that function allocates the DMA buffer
+	 * pool.
+	 */
+	if (hcd->core_if->dma_enable) {
+		hcd->status_buf =
+		    DWC_DMA_ALLOC(DWC_OTG_HCD_STATUS_BUF_SIZE,
+				  &hcd->status_buf_dma);
+	} else {
+		hcd->status_buf = DWC_ALLOC(DWC_OTG_HCD_STATUS_BUF_SIZE);
+	}
+	if (!hcd->status_buf) {
+		retval = -DWC_E_NO_MEMORY;
+		DWC_ERROR("%s: status_buf allocation failed\n", __func__);
+		dwc_otg_hcd_free(hcd);
+		goto out;
+	}
+
+	hcd->otg_port = 1;
+	hcd->frame_list = NULL;
+	hcd->frame_list_dma = 0;
+out:
+	return retval;
+}
+
+void dwc_otg_hcd_remove(dwc_otg_hcd_t * hcd)
+{
+	/* Turn off all host-specific interrupts. */
+	dwc_otg_disable_host_interrupts(hcd->core_if);
+
+	dwc_otg_hcd_free(hcd);
+}
+
+/**
+ * Initializes dynamic portions of the DWC_otg HCD state.
+ */
+static void dwc_otg_hcd_reinit(dwc_otg_hcd_t * hcd)
+{
+	int num_channels;
+	int i;
+	dwc_hc_t *channel;
+	dwc_hc_t *channel_tmp;
+
+	hcd->flags.d32 = 0;
+
+	hcd->non_periodic_qh_ptr = &hcd->non_periodic_sched_active;
+	hcd->non_periodic_channels = 0;
+	hcd->periodic_channels = 0;
+
+	/*
+	 * Put all channels in the free channel list and clean up channel
+	 * states.
+	 */
+	DWC_CIRCLEQ_FOREACH_SAFE(channel, channel_tmp,
+				 &hcd->free_hc_list, hc_list_entry) {
+		DWC_CIRCLEQ_REMOVE(&hcd->free_hc_list, channel, hc_list_entry);
+	}
+
+	num_channels = hcd->core_if->core_params->host_channels;
+	for (i = 0; i < num_channels; i++) {
+		channel = hcd->hc_ptr_array[i];
+		DWC_CIRCLEQ_INSERT_TAIL(&hcd->free_hc_list, channel,
+					hc_list_entry);
+		dwc_otg_hc_cleanup(hcd->core_if, channel);
+	}
+
+	/* Initialize the DWC core for host mode operation. */
+	dwc_otg_core_host_init(hcd->core_if);
+
+	/* Set core_if's lock pointer to the hcd->lock */
+	hcd->core_if->lock = hcd->lock;
+}
+
+/**
+ * Assigns transactions from a QTD to a free host channel and initializes the
+ * host channel to perform the transactions. The host channel is removed from
+ * the free list.
+ *
+ * @param hcd The HCD state structure.
+ * @param qh Transactions from the first QTD for this QH are selected and
+ * assigned to a free host channel.
+ */
+static void assign_and_init_hc(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh)
+{
+	dwc_hc_t *hc;
+	dwc_otg_qtd_t *qtd;
+	dwc_otg_hcd_urb_t *urb;
+	void* ptr = NULL;
+
+	DWC_DEBUGPL(DBG_HCDV, "%s(%p,%p)\n", __func__, hcd, qh);
+
+	hc = DWC_CIRCLEQ_FIRST(&hcd->free_hc_list);
+
+	/* Remove the host channel from the free list. */
+	DWC_CIRCLEQ_REMOVE_INIT(&hcd->free_hc_list, hc, hc_list_entry);
+
+	qtd = DWC_CIRCLEQ_FIRST(&qh->qtd_list);
+
+	urb = qtd->urb;
+	qh->channel = hc;
+
+	qtd->in_process = 1;
+
+	/*
+	 * Use usb_pipedevice to determine device address. This address is
+	 * 0 before the SET_ADDRESS command and the correct address afterward.
+	 */
+	hc->dev_addr = dwc_otg_hcd_get_dev_addr(&urb->pipe_info);
+	hc->ep_num = dwc_otg_hcd_get_ep_num(&urb->pipe_info);
+	hc->speed = qh->dev_speed;
+	hc->max_packet = dwc_max_packet(qh->maxp);
+
+	hc->xfer_started = 0;
+	hc->halt_status = DWC_OTG_HC_XFER_NO_HALT_STATUS;
+	hc->error_state = (qtd->error_count > 0);
+	hc->halt_on_queue = 0;
+	hc->halt_pending = 0;
+	hc->requests = 0;
+
+	/*
+	 * The following values may be modified in the transfer type section
+	 * below. The xfer_len value may be reduced when the transfer is
+	 * started to accommodate the max widths of the XferSize and PktCnt
+	 * fields in the HCTSIZn register.
+	 */
+
+	hc->ep_is_in = (dwc_otg_hcd_is_pipe_in(&urb->pipe_info) != 0);
+	if (hc->ep_is_in) {
+		hc->do_ping = 0;
+	} else {
+		hc->do_ping = qh->ping_state;
+	}
+
+	hc->data_pid_start = qh->data_toggle;
+	hc->multi_count = 1;
+
+	if (hcd->core_if->dma_enable) {
+		hc->xfer_buff = (uint8_t *) urb->dma + urb->actual_length;
+
+		/* For non-dword aligned case */
+		if (((unsigned long)hc->xfer_buff & 0x3)
+		    && !hcd->core_if->dma_desc_enable) {
+			ptr = (uint8_t *) urb->buf + urb->actual_length;
+		}
+	} else {
+		hc->xfer_buff = (uint8_t *) urb->buf + urb->actual_length;
+	}
+	hc->xfer_len = urb->length - urb->actual_length;
+	hc->xfer_count = 0;
+
+	/*
+	 * Set the split attributes
+	 */
+	hc->do_split = 0;
+	if (qh->do_split) {
+		uint32_t hub_addr, port_addr;
+		hc->do_split = 1;
+		hc->xact_pos = qtd->isoc_split_pos;
+		hc->complete_split = qtd->complete_split;
+		hcd->fops->hub_info(hcd, urb->priv, &hub_addr, &port_addr);
+		hc->hub_addr = (uint8_t) hub_addr;
+		hc->port_addr = (uint8_t) port_addr;
+	}
+
+	switch (dwc_otg_hcd_get_pipe_type(&urb->pipe_info)) {
+	case UE_CONTROL:
+		hc->ep_type = DWC_OTG_EP_TYPE_CONTROL;
+		switch (qtd->control_phase) {
+		case DWC_OTG_CONTROL_SETUP:
+			DWC_DEBUGPL(DBG_HCDV, "  Control setup transaction\n");
+			hc->do_ping = 0;
+			hc->ep_is_in = 0;
+			hc->data_pid_start = DWC_OTG_HC_PID_SETUP;
+			if (hcd->core_if->dma_enable) {
+				hc->xfer_buff = (uint8_t *) urb->setup_dma;
+			} else {
+				hc->xfer_buff = (uint8_t *) urb->setup_packet;
+			}
+			hc->xfer_len = 8;
+			ptr = NULL;
+			break;
+		case DWC_OTG_CONTROL_DATA:
+			DWC_DEBUGPL(DBG_HCDV, "  Control data transaction\n");
+			hc->data_pid_start = qtd->data_toggle;
+			break;
+		case DWC_OTG_CONTROL_STATUS:
+			/*
+			 * Direction is opposite of data direction or IN if no
+			 * data.
+			 */
+			DWC_DEBUGPL(DBG_HCDV, "  Control status transaction\n");
+			if (urb->length == 0) {
+				hc->ep_is_in = 1;
+			} else {
+				hc->ep_is_in =
+				    dwc_otg_hcd_is_pipe_out(&urb->pipe_info);
+			}
+			if (hc->ep_is_in) {
+				hc->do_ping = 0;
+			}
+
+			hc->data_pid_start = DWC_OTG_HC_PID_DATA1;
+
+			hc->xfer_len = 0;
+			if (hcd->core_if->dma_enable) {
+				hc->xfer_buff = (uint8_t *) hcd->status_buf_dma;
+			} else {
+				hc->xfer_buff = (uint8_t *) hcd->status_buf;
+			}
+			ptr = NULL;
+			break;
+		}
+		break;
+	case UE_BULK:
+		hc->ep_type = DWC_OTG_EP_TYPE_BULK;
+		break;
+	case UE_INTERRUPT:
+		hc->ep_type = DWC_OTG_EP_TYPE_INTR;
+		break;
+	case UE_ISOCHRONOUS:
+		{
+			struct dwc_otg_hcd_iso_packet_desc *frame_desc;
+
+			hc->ep_type = DWC_OTG_EP_TYPE_ISOC;
+
+			if (hcd->core_if->dma_desc_enable)
+				break;
+
+			frame_desc = &urb->iso_descs[qtd->isoc_frame_index];
+
+			frame_desc->status = 0;
+
+			if (hcd->core_if->dma_enable) {
+				hc->xfer_buff = (uint8_t *) urb->dma;
+			} else {
+				hc->xfer_buff = (uint8_t *) urb->buf;
+			}
+			hc->xfer_buff +=
+			    frame_desc->offset + qtd->isoc_split_offset;
+			hc->xfer_len =
+			    frame_desc->length - qtd->isoc_split_offset;
+
+			/* For non-dword aligned buffers */
+			if (((unsigned long)hc->xfer_buff & 0x3)
+			    && hcd->core_if->dma_enable) {
+				ptr =
+				    (uint8_t *) urb->buf + frame_desc->offset +
+				    qtd->isoc_split_offset;
+			} else
+				ptr = NULL;
+
+			if (hc->xact_pos == DWC_HCSPLIT_XACTPOS_ALL) {
+				if (hc->xfer_len <= 188) {
+					hc->xact_pos = DWC_HCSPLIT_XACTPOS_ALL;
+				} else {
+					hc->xact_pos =
+					    DWC_HCSPLIT_XACTPOS_BEGIN;
+				}
+			}
+		}
+		break;
+	}
+	/* non DWORD-aligned buffer case */	
+	if (ptr) {
+		uint32_t buf_size;
+		if (hc->ep_type != DWC_OTG_EP_TYPE_ISOC) {
+			buf_size = hcd->core_if->core_params->max_transfer_size;
+		} else {				
+			buf_size = 4096;
+		}
+		if (!qh->dw_align_buf) {
+			qh->dw_align_buf = DWC_DMA_ALLOC_ATOMIC(buf_size,
+							 &qh->dw_align_buf_dma);
+			if (!qh->dw_align_buf) {
+				DWC_ERROR
+				    ("%s: Failed to allocate memory to handle "
+				     "non-dword aligned buffer case\n",
+				     __func__);
+				return;
+			}
+		}
+		if (!hc->ep_is_in) {
+			dwc_memcpy(qh->dw_align_buf, ptr, hc->xfer_len);
+		}
+		hc->align_buff = qh->dw_align_buf_dma;
+	} else {
+		hc->align_buff = 0;
+	}
+
+	if (hc->ep_type == DWC_OTG_EP_TYPE_INTR ||
+	    hc->ep_type == DWC_OTG_EP_TYPE_ISOC) {
+		/*
+		 * This value may be modified when the transfer is started to
+		 * reflect the actual transfer length.
+		 */
+		hc->multi_count = dwc_hb_mult(qh->maxp);
+	}
+
+	if (hcd->core_if->dma_desc_enable)
+		hc->desc_list_addr = qh->desc_list_dma;
+
+	dwc_otg_hc_init(hcd->core_if, hc);
+	hc->qh = qh;
+}
+
+/**
+ * This function selects transactions from the HCD transfer schedule and
+ * assigns them to available host channels. It is called from HCD interrupt
+ * handler functions.
+ *
+ * @param hcd The HCD state structure.
+ *
+ * @return The types of new transactions that were assigned to host channels.
+ */
+dwc_otg_transaction_type_e dwc_otg_hcd_select_transactions(dwc_otg_hcd_t * hcd)
+{
+	dwc_list_link_t *qh_ptr;
+	dwc_otg_qh_t *qh;
+	int num_channels;
+	dwc_otg_transaction_type_e ret_val = DWC_OTG_TRANSACTION_NONE;
+
+#ifdef DEBUG_SOF
+	DWC_DEBUGPL(DBG_HCD, "  Select Transactions\n");
+#endif
+
+	/* Process entries in the periodic ready list. */
+	qh_ptr = DWC_LIST_FIRST(&hcd->periodic_sched_ready);
+
+	while (qh_ptr != &hcd->periodic_sched_ready &&
+	       !DWC_CIRCLEQ_EMPTY(&hcd->free_hc_list)) {
+
+		qh = DWC_LIST_ENTRY(qh_ptr, dwc_otg_qh_t, qh_list_entry);
+		assign_and_init_hc(hcd, qh);
+
+		/*
+		 * Move the QH from the periodic ready schedule to the
+		 * periodic assigned schedule.
+		 */
+		qh_ptr = DWC_LIST_NEXT(qh_ptr);
+		DWC_LIST_MOVE_HEAD(&hcd->periodic_sched_assigned,
+				   &qh->qh_list_entry);
+
+		ret_val = DWC_OTG_TRANSACTION_PERIODIC;
+	}
+
+	/*
+	 * Process entries in the inactive portion of the non-periodic
+	 * schedule. Some free host channels may not be used if they are
+	 * reserved for periodic transfers.
+	 */
+	qh_ptr = hcd->non_periodic_sched_inactive.next;
+	num_channels = hcd->core_if->core_params->host_channels;
+	while (qh_ptr != &hcd->non_periodic_sched_inactive &&
+	       (hcd->non_periodic_channels <
+		num_channels - hcd->periodic_channels) &&
+	       !DWC_CIRCLEQ_EMPTY(&hcd->free_hc_list)) {
+
+		qh = DWC_LIST_ENTRY(qh_ptr, dwc_otg_qh_t, qh_list_entry);
+
+		assign_and_init_hc(hcd, qh);
+
+		/*
+		 * Move the QH from the non-periodic inactive schedule to the
+		 * non-periodic active schedule.
+		 */
+		qh_ptr = DWC_LIST_NEXT(qh_ptr);
+		DWC_LIST_MOVE_HEAD(&hcd->non_periodic_sched_active,
+				   &qh->qh_list_entry);
+
+		if (ret_val == DWC_OTG_TRANSACTION_NONE) {
+			ret_val = DWC_OTG_TRANSACTION_NON_PERIODIC;
+		} else {
+			ret_val = DWC_OTG_TRANSACTION_ALL;
+		}
+
+		hcd->non_periodic_channels++;
+	}
+
+	return ret_val;
+}
+
+/**
+ * Attempts to queue a single transaction request for a host channel
+ * associated with either a periodic or non-periodic transfer. This function
+ * assumes that there is space available in the appropriate request queue. For
+ * an OUT transfer or SETUP transaction in Slave mode, it checks whether space
+ * is available in the appropriate Tx FIFO.
+ *
+ * @param hcd The HCD state structure.
+ * @param hc Host channel descriptor associated with either a periodic or
+ * non-periodic transfer.
+ * @param fifo_dwords_avail Number of DWORDs available in the periodic Tx
+ * FIFO for periodic transfers or the non-periodic Tx FIFO for non-periodic
+ * transfers.
+ *
+ * @return 1 if a request is queued and more requests may be needed to
+ * complete the transfer, 0 if no more requests are required for this
+ * transfer, -1 if there is insufficient space in the Tx FIFO.
+ */
+static int queue_transaction(dwc_otg_hcd_t * hcd,
+			     dwc_hc_t * hc, uint16_t fifo_dwords_avail)
+{
+	int retval;
+
+	if (hcd->core_if->dma_enable) {
+		if (hcd->core_if->dma_desc_enable) {
+			if (!hc->xfer_started
+			    || (hc->ep_type == DWC_OTG_EP_TYPE_ISOC)) {
+				dwc_otg_hcd_start_xfer_ddma(hcd, hc->qh);
+				hc->qh->ping_state = 0;
+			}
+		} else if (!hc->xfer_started) {
+			dwc_otg_hc_start_transfer(hcd->core_if, hc);
+			hc->qh->ping_state = 0;
+		}
+		retval = 0;
+	} else if (hc->halt_pending) {
+		/* Don't queue a request if the channel has been halted. */
+		retval = 0;
+	} else if (hc->halt_on_queue) {
+		dwc_otg_hc_halt(hcd->core_if, hc, hc->halt_status);
+		retval = 0;
+	} else if (hc->do_ping) {
+		if (!hc->xfer_started) {
+			dwc_otg_hc_start_transfer(hcd->core_if, hc);
+		}
+		retval = 0;
+	} else if (!hc->ep_is_in || hc->data_pid_start == DWC_OTG_HC_PID_SETUP) {
+		if ((fifo_dwords_avail * 4) >= hc->max_packet) {
+			if (!hc->xfer_started) {
+				dwc_otg_hc_start_transfer(hcd->core_if, hc);
+				retval = 1;
+			} else {
+				retval =
+				    dwc_otg_hc_continue_transfer(hcd->core_if,
+								 hc);
+			}
+		} else {
+			retval = -1;
+		}
+	} else {
+		if (!hc->xfer_started) {
+			dwc_otg_hc_start_transfer(hcd->core_if, hc);
+			retval = 1;
+		} else {
+			retval = dwc_otg_hc_continue_transfer(hcd->core_if, hc);
+		}
+	}
+
+	return retval;
+}
+
+/**
+ * Processes periodic channels for the next frame and queues transactions for
+ * these channels to the DWC_otg controller. After queueing transactions, the
+ * Periodic Tx FIFO Empty interrupt is enabled if there are more transactions
+ * to queue as Periodic Tx FIFO or request queue space becomes available.
+ * Otherwise, the Periodic Tx FIFO Empty interrupt is disabled.
+ */
+static void process_periodic_channels(dwc_otg_hcd_t * hcd)
+{
+	hptxsts_data_t tx_status;
+	dwc_list_link_t *qh_ptr;
+	dwc_otg_qh_t *qh;
+	int status;
+	int no_queue_space = 0;
+	int no_fifo_space = 0;
+
+	dwc_otg_host_global_regs_t *host_regs;
+	host_regs = hcd->core_if->host_if->host_global_regs;
+
+	DWC_DEBUGPL(DBG_HCDV, "Queue periodic transactions\n");
+#ifdef DEBUG
+	tx_status.d32 = DWC_READ_REG32(&host_regs->hptxsts);
+	DWC_DEBUGPL(DBG_HCDV,
+		    "  P Tx Req Queue Space Avail (before queue): %d\n",
+		    tx_status.b.ptxqspcavail);
+	DWC_DEBUGPL(DBG_HCDV, "  P Tx FIFO Space Avail (before queue): %d\n",
+		    tx_status.b.ptxfspcavail);
+#endif
+
+	qh_ptr = hcd->periodic_sched_assigned.next;
+	while (qh_ptr != &hcd->periodic_sched_assigned) {
+		tx_status.d32 = DWC_READ_REG32(&host_regs->hptxsts);
+		if (tx_status.b.ptxqspcavail == 0) {
+			no_queue_space = 1;
+			break;
+		}
+
+		qh = DWC_LIST_ENTRY(qh_ptr, dwc_otg_qh_t, qh_list_entry);
+
+		/*
+		 * Set a flag if we're queuing high-bandwidth in slave mode.
+		 * The flag prevents any halts to get into the request queue in
+		 * the middle of multiple high-bandwidth packets getting queued.
+		 */
+		if (!hcd->core_if->dma_enable && qh->channel->multi_count > 1) {
+			hcd->core_if->queuing_high_bandwidth = 1;
+		}
+		status =
+		    queue_transaction(hcd, qh->channel,
+				      tx_status.b.ptxfspcavail);
+		if (status < 0) {
+			no_fifo_space = 1;
+			break;
+		}
+
+		/*
+		 * In Slave mode, stay on the current transfer until there is
+		 * nothing more to do or the high-bandwidth request count is
+		 * reached. In DMA mode, only need to queue one request. The
+		 * controller automatically handles multiple packets for
+		 * high-bandwidth transfers.
+		 */
+		if (hcd->core_if->dma_enable || status == 0 ||
+		    qh->channel->requests == qh->channel->multi_count) {
+			qh_ptr = qh_ptr->next;
+			/*
+			 * Move the QH from the periodic assigned schedule to
+			 * the periodic queued schedule.
+			 */
+			DWC_LIST_MOVE_HEAD(&hcd->periodic_sched_queued,
+					   &qh->qh_list_entry);
+
+			/* done queuing high bandwidth */
+			hcd->core_if->queuing_high_bandwidth = 0;
+		}
+	}
+
+	if (!hcd->core_if->dma_enable) {
+		dwc_otg_core_global_regs_t *global_regs;
+		gintmsk_data_t intr_mask = {.d32 = 0 };
+
+		global_regs = hcd->core_if->core_global_regs;
+		intr_mask.b.ptxfempty = 1;
+#ifdef DEBUG
+		tx_status.d32 = DWC_READ_REG32(&host_regs->hptxsts);
+		DWC_DEBUGPL(DBG_HCDV,
+			    "  P Tx Req Queue Space Avail (after queue): %d\n",
+			    tx_status.b.ptxqspcavail);
+		DWC_DEBUGPL(DBG_HCDV,
+			    "  P Tx FIFO Space Avail (after queue): %d\n",
+			    tx_status.b.ptxfspcavail);
+#endif
+		if (!DWC_LIST_EMPTY(&hcd->periodic_sched_assigned) ||
+		    no_queue_space || no_fifo_space) {
+			/*
+			 * May need to queue more transactions as the request
+			 * queue or Tx FIFO empties. Enable the periodic Tx
+			 * FIFO empty interrupt. (Always use the half-empty
+			 * level to ensure that new requests are loaded as
+			 * soon as possible.)
+			 */
+			DWC_MODIFY_REG32(&global_regs->gintmsk, 0,
+					 intr_mask.d32);
+		} else {
+			/*
+			 * Disable the Tx FIFO empty interrupt since there are
+			 * no more transactions that need to be queued right
+			 * now. This function is called from interrupt
+			 * handlers to queue more transactions as transfer
+			 * states change.
+			 */
+			DWC_MODIFY_REG32(&global_regs->gintmsk, intr_mask.d32,
+					 0);
+		}
+	}
+}
+
+/**
+ * Processes active non-periodic channels and queues transactions for these
+ * channels to the DWC_otg controller. After queueing transactions, the NP Tx
+ * FIFO Empty interrupt is enabled if there are more transactions to queue as
+ * NP Tx FIFO or request queue space becomes available. Otherwise, the NP Tx
+ * FIFO Empty interrupt is disabled.
+ */
+static void process_non_periodic_channels(dwc_otg_hcd_t * hcd)
+{
+	gnptxsts_data_t tx_status;
+	dwc_list_link_t *orig_qh_ptr;
+	dwc_otg_qh_t *qh;
+	int status;
+	int no_queue_space = 0;
+	int no_fifo_space = 0;
+	int more_to_do = 0;
+
+	dwc_otg_core_global_regs_t *global_regs =
+	    hcd->core_if->core_global_regs;
+
+	DWC_DEBUGPL(DBG_HCDV, "Queue non-periodic transactions\n");
+#ifdef DEBUG
+	tx_status.d32 = DWC_READ_REG32(&global_regs->gnptxsts);
+	DWC_DEBUGPL(DBG_HCDV,
+		    "  NP Tx Req Queue Space Avail (before queue): %d\n",
+		    tx_status.b.nptxqspcavail);
+	DWC_DEBUGPL(DBG_HCDV, "  NP Tx FIFO Space Avail (before queue): %d\n",
+		    tx_status.b.nptxfspcavail);
+#endif
+	/*
+	 * Keep track of the starting point. Skip over the start-of-list
+	 * entry.
+	 */
+	if (hcd->non_periodic_qh_ptr == &hcd->non_periodic_sched_active) {
+		hcd->non_periodic_qh_ptr = hcd->non_periodic_qh_ptr->next;
+	}
+	orig_qh_ptr = hcd->non_periodic_qh_ptr;
+
+	/*
+	 * Process once through the active list or until no more space is
+	 * available in the request queue or the Tx FIFO.
+	 */
+	do {
+		tx_status.d32 = DWC_READ_REG32(&global_regs->gnptxsts);
+		if (!hcd->core_if->dma_enable && tx_status.b.nptxqspcavail == 0) {
+			no_queue_space = 1;
+			break;
+		}
+
+		qh = DWC_LIST_ENTRY(hcd->non_periodic_qh_ptr, dwc_otg_qh_t,
+				    qh_list_entry);
+		status =
+		    queue_transaction(hcd, qh->channel,
+				      tx_status.b.nptxfspcavail);
+
+		if (status > 0) {
+			more_to_do = 1;
+		} else if (status < 0) {
+			no_fifo_space = 1;
+			break;
+		}
+
+		/* Advance to next QH, skipping start-of-list entry. */
+		hcd->non_periodic_qh_ptr = hcd->non_periodic_qh_ptr->next;
+		if (hcd->non_periodic_qh_ptr == &hcd->non_periodic_sched_active) {
+			hcd->non_periodic_qh_ptr =
+			    hcd->non_periodic_qh_ptr->next;
+		}
+
+	} while (hcd->non_periodic_qh_ptr != orig_qh_ptr);
+
+	if (!hcd->core_if->dma_enable) {
+		gintmsk_data_t intr_mask = {.d32 = 0 };
+		intr_mask.b.nptxfempty = 1;
+
+#ifdef DEBUG
+		tx_status.d32 = DWC_READ_REG32(&global_regs->gnptxsts);
+		DWC_DEBUGPL(DBG_HCDV,
+			    "  NP Tx Req Queue Space Avail (after queue): %d\n",
+			    tx_status.b.nptxqspcavail);
+		DWC_DEBUGPL(DBG_HCDV,
+			    "  NP Tx FIFO Space Avail (after queue): %d\n",
+			    tx_status.b.nptxfspcavail);
+#endif
+		if (more_to_do || no_queue_space || no_fifo_space) {
+			/*
+			 * May need to queue more transactions as the request
+			 * queue or Tx FIFO empties. Enable the non-periodic
+			 * Tx FIFO empty interrupt. (Always use the half-empty
+			 * level to ensure that new requests are loaded as
+			 * soon as possible.)
+			 */
+			DWC_MODIFY_REG32(&global_regs->gintmsk, 0,
+					 intr_mask.d32);
+		} else {
+			/*
+			 * Disable the Tx FIFO empty interrupt since there are
+			 * no more transactions that need to be queued right
+			 * now. This function is called from interrupt
+			 * handlers to queue more transactions as transfer
+			 * states change.
+			 */
+			DWC_MODIFY_REG32(&global_regs->gintmsk, intr_mask.d32,
+					 0);
+		}
+	}
+}
+
+/**
+ * This function processes the currently active host channels and queues
+ * transactions for these channels to the DWC_otg controller. It is called
+ * from HCD interrupt handler functions.
+ *
+ * @param hcd The HCD state structure.
+ * @param tr_type The type(s) of transactions to queue (non-periodic,
+ * periodic, or both).
+ */
+void dwc_otg_hcd_queue_transactions(dwc_otg_hcd_t * hcd,
+				    dwc_otg_transaction_type_e tr_type)
+{
+#ifdef DEBUG_SOF
+	DWC_DEBUGPL(DBG_HCD, "Queue Transactions\n");
+#endif
+	/* Process host channels associated with periodic transfers. */
+	if ((tr_type == DWC_OTG_TRANSACTION_PERIODIC ||
+	     tr_type == DWC_OTG_TRANSACTION_ALL) &&
+	    !DWC_LIST_EMPTY(&hcd->periodic_sched_assigned)) {
+
+		process_periodic_channels(hcd);
+	}
+
+	/* Process host channels associated with non-periodic transfers. */
+	if (tr_type == DWC_OTG_TRANSACTION_NON_PERIODIC ||
+	    tr_type == DWC_OTG_TRANSACTION_ALL) {
+		if (!DWC_LIST_EMPTY(&hcd->non_periodic_sched_active)) {
+			process_non_periodic_channels(hcd);
+		} else {
+			/*
+			 * Ensure NP Tx FIFO empty interrupt is disabled when
+			 * there are no non-periodic transfers to process.
+			 */
+			gintmsk_data_t gintmsk = {.d32 = 0 };
+			gintmsk.b.nptxfempty = 1;
+			DWC_MODIFY_REG32(&hcd->core_if->
+					 core_global_regs->gintmsk, gintmsk.d32,
+					 0);
+		}
+	}
+}
+
+#ifdef DWC_HS_ELECT_TST
+/*
+ * Quick and dirty hack to implement the HS Electrical Test
+ * SINGLE_STEP_GET_DEVICE_DESCRIPTOR feature.
+ *
+ * This code was copied from our userspace app "hset". It sends a
+ * Get Device Descriptor control sequence in two parts, first the
+ * Setup packet by itself, followed some time later by the In and
+ * Ack packets. Rather than trying to figure out how to add this
+ * functionality to the normal driver code, we just hijack the
+ * hardware, using these two function to drive the hardware
+ * directly.
+ */
+
+static dwc_otg_core_global_regs_t *global_regs;
+static dwc_otg_host_global_regs_t *hc_global_regs;
+static dwc_otg_hc_regs_t *hc_regs;
+static uint32_t *data_fifo;
+
+static void do_setup(void)
+{
+	gintsts_data_t gintsts;
+	hctsiz_data_t hctsiz;
+	hcchar_data_t hcchar;
+	haint_data_t haint;
+	hcint_data_t hcint;
+
+	/* Enable HAINTs */
+	DWC_WRITE_REG32(&hc_global_regs->haintmsk, 0x0001);
+
+	/* Enable HCINTs */
+	DWC_WRITE_REG32(&hc_regs->hcintmsk, 0x04a3);
+
+	/* Read GINTSTS */
+	gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts);
+
+	/* Read HAINT */
+	haint.d32 = DWC_READ_REG32(&hc_global_regs->haint);
+
+	/* Read HCINT */
+	hcint.d32 = DWC_READ_REG32(&hc_regs->hcint);
+
+	/* Read HCCHAR */
+	hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+
+	/* Clear HCINT */
+	DWC_WRITE_REG32(&hc_regs->hcint, hcint.d32);
+
+	/* Clear HAINT */
+	DWC_WRITE_REG32(&hc_global_regs->haint, haint.d32);
+
+	/* Clear GINTSTS */
+	DWC_WRITE_REG32(&global_regs->gintsts, gintsts.d32);
+
+	/* Read GINTSTS */
+	gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts);
+
+	/*
+	 * Send Setup packet (Get Device Descriptor)
+	 */
+
+	/* Make sure channel is disabled */
+	hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+	if (hcchar.b.chen) {
+		hcchar.b.chdis = 1;
+//              hcchar.b.chen = 1;
+		DWC_WRITE_REG32(&hc_regs->hcchar, hcchar.d32);
+		//sleep(1);
+		dwc_mdelay(1000);
+
+		/* Read GINTSTS */
+		gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts);
+
+		/* Read HAINT */
+		haint.d32 = DWC_READ_REG32(&hc_global_regs->haint);
+
+		/* Read HCINT */
+		hcint.d32 = DWC_READ_REG32(&hc_regs->hcint);
+
+		/* Read HCCHAR */
+		hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+
+		/* Clear HCINT */
+		DWC_WRITE_REG32(&hc_regs->hcint, hcint.d32);
+
+		/* Clear HAINT */
+		DWC_WRITE_REG32(&hc_global_regs->haint, haint.d32);
+
+		/* Clear GINTSTS */
+		DWC_WRITE_REG32(&global_regs->gintsts, gintsts.d32);
+
+		hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+	}
+
+	/* Set HCTSIZ */
+	hctsiz.d32 = 0;
+	hctsiz.b.xfersize = 8;
+	hctsiz.b.pktcnt = 1;
+	hctsiz.b.pid = DWC_OTG_HC_PID_SETUP;
+	DWC_WRITE_REG32(&hc_regs->hctsiz, hctsiz.d32);
+
+	/* Set HCCHAR */
+	hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+	hcchar.b.eptype = DWC_OTG_EP_TYPE_CONTROL;
+	hcchar.b.epdir = 0;
+	hcchar.b.epnum = 0;
+	hcchar.b.mps = 8;
+	hcchar.b.chen = 1;
+	DWC_WRITE_REG32(&hc_regs->hcchar, hcchar.d32);
+
+	/* Fill FIFO with Setup data for Get Device Descriptor */
+	data_fifo = (uint32_t *) ((char *)global_regs + 0x1000);
+	DWC_WRITE_REG32(data_fifo++, 0x01000680);
+	DWC_WRITE_REG32(data_fifo++, 0x00080000);
+
+	gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts);
+
+	/* Wait for host channel interrupt */
+	do {
+		gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts);
+	} while (gintsts.b.hcintr == 0);
+
+	/* Disable HCINTs */
+	DWC_WRITE_REG32(&hc_regs->hcintmsk, 0x0000);
+
+	/* Disable HAINTs */
+	DWC_WRITE_REG32(&hc_global_regs->haintmsk, 0x0000);
+
+	/* Read HAINT */
+	haint.d32 = DWC_READ_REG32(&hc_global_regs->haint);
+
+	/* Read HCINT */
+	hcint.d32 = DWC_READ_REG32(&hc_regs->hcint);
+
+	/* Read HCCHAR */
+	hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+
+	/* Clear HCINT */
+	DWC_WRITE_REG32(&hc_regs->hcint, hcint.d32);
+
+	/* Clear HAINT */
+	DWC_WRITE_REG32(&hc_global_regs->haint, haint.d32);
+
+	/* Clear GINTSTS */
+	DWC_WRITE_REG32(&global_regs->gintsts, gintsts.d32);
+
+	/* Read GINTSTS */
+	gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts);
+}
+
+static void do_in_ack(void)
+{
+	gintsts_data_t gintsts;
+	hctsiz_data_t hctsiz;
+	hcchar_data_t hcchar;
+	haint_data_t haint;
+	hcint_data_t hcint;
+	host_grxsts_data_t grxsts;
+
+	/* Enable HAINTs */
+	DWC_WRITE_REG32(&hc_global_regs->haintmsk, 0x0001);
+
+	/* Enable HCINTs */
+	DWC_WRITE_REG32(&hc_regs->hcintmsk, 0x04a3);
+
+	/* Read GINTSTS */
+	gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts);
+
+	/* Read HAINT */
+	haint.d32 = DWC_READ_REG32(&hc_global_regs->haint);
+
+	/* Read HCINT */
+	hcint.d32 = DWC_READ_REG32(&hc_regs->hcint);
+
+	/* Read HCCHAR */
+	hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+
+	/* Clear HCINT */
+	DWC_WRITE_REG32(&hc_regs->hcint, hcint.d32);
+
+	/* Clear HAINT */
+	DWC_WRITE_REG32(&hc_global_regs->haint, haint.d32);
+
+	/* Clear GINTSTS */
+	DWC_WRITE_REG32(&global_regs->gintsts, gintsts.d32);
+
+	/* Read GINTSTS */
+	gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts);
+
+	/*
+	 * Receive Control In packet
+	 */
+
+	/* Make sure channel is disabled */
+	hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+	if (hcchar.b.chen) {
+		hcchar.b.chdis = 1;
+		hcchar.b.chen = 1;
+		DWC_WRITE_REG32(&hc_regs->hcchar, hcchar.d32);
+		//sleep(1);
+		dwc_mdelay(1000);
+
+		/* Read GINTSTS */
+		gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts);
+
+		/* Read HAINT */
+		haint.d32 = DWC_READ_REG32(&hc_global_regs->haint);
+
+		/* Read HCINT */
+		hcint.d32 = DWC_READ_REG32(&hc_regs->hcint);
+
+		/* Read HCCHAR */
+		hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+
+		/* Clear HCINT */
+		DWC_WRITE_REG32(&hc_regs->hcint, hcint.d32);
+
+		/* Clear HAINT */
+		DWC_WRITE_REG32(&hc_global_regs->haint, haint.d32);
+
+		/* Clear GINTSTS */
+		DWC_WRITE_REG32(&global_regs->gintsts, gintsts.d32);
+
+		hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+	}
+
+	/* Set HCTSIZ */
+	hctsiz.d32 = 0;
+	hctsiz.b.xfersize = 8;
+	hctsiz.b.pktcnt = 1;
+	hctsiz.b.pid = DWC_OTG_HC_PID_DATA1;
+	DWC_WRITE_REG32(&hc_regs->hctsiz, hctsiz.d32);
+
+	/* Set HCCHAR */
+	hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+	hcchar.b.eptype = DWC_OTG_EP_TYPE_CONTROL;
+	hcchar.b.epdir = 1;
+	hcchar.b.epnum = 0;
+	hcchar.b.mps = 8;
+	hcchar.b.chen = 1;
+	DWC_WRITE_REG32(&hc_regs->hcchar, hcchar.d32);
+
+	gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts);
+
+	/* Wait for receive status queue interrupt */
+	do {
+		gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts);
+	} while (gintsts.b.rxstsqlvl == 0);
+
+	/* Read RXSTS */
+	grxsts.d32 = DWC_READ_REG32(&global_regs->grxstsp);
+
+	/* Clear RXSTSQLVL in GINTSTS */
+	gintsts.d32 = 0;
+	gintsts.b.rxstsqlvl = 1;
+	DWC_WRITE_REG32(&global_regs->gintsts, gintsts.d32);
+
+	switch (grxsts.b.pktsts) {
+	case DWC_GRXSTS_PKTSTS_IN:
+		/* Read the data into the host buffer */
+		if (grxsts.b.bcnt > 0) {
+			int i;
+			int word_count = (grxsts.b.bcnt + 3) / 4;
+
+			data_fifo = (uint32_t *) ((char *)global_regs + 0x1000);
+
+			for (i = 0; i < word_count; i++) {
+				(void)DWC_READ_REG32(data_fifo++);
+			}
+		}
+		break;
+
+	default:
+		break;
+	}
+
+	gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts);
+
+	/* Wait for receive status queue interrupt */
+	do {
+		gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts);
+	} while (gintsts.b.rxstsqlvl == 0);
+
+	/* Read RXSTS */
+	grxsts.d32 = DWC_READ_REG32(&global_regs->grxstsp);
+
+	/* Clear RXSTSQLVL in GINTSTS */
+	gintsts.d32 = 0;
+	gintsts.b.rxstsqlvl = 1;
+	DWC_WRITE_REG32(&global_regs->gintsts, gintsts.d32);
+
+	switch (grxsts.b.pktsts) {
+	case DWC_GRXSTS_PKTSTS_IN_XFER_COMP:
+		break;
+
+	default:
+		break;
+	}
+
+	gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts);
+
+	/* Wait for host channel interrupt */
+	do {
+		gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts);
+	} while (gintsts.b.hcintr == 0);
+
+	/* Read HAINT */
+	haint.d32 = DWC_READ_REG32(&hc_global_regs->haint);
+
+	/* Read HCINT */
+	hcint.d32 = DWC_READ_REG32(&hc_regs->hcint);
+
+	/* Read HCCHAR */
+	hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+
+	/* Clear HCINT */
+	DWC_WRITE_REG32(&hc_regs->hcint, hcint.d32);
+
+	/* Clear HAINT */
+	DWC_WRITE_REG32(&hc_global_regs->haint, haint.d32);
+
+	/* Clear GINTSTS */
+	DWC_WRITE_REG32(&global_regs->gintsts, gintsts.d32);
+
+	/* Read GINTSTS */
+	gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts);
+
+//      usleep(100000);
+//      mdelay(100);
+	dwc_mdelay(1);
+
+	/*
+	 * Send handshake packet
+	 */
+
+	/* Read HAINT */
+	haint.d32 = DWC_READ_REG32(&hc_global_regs->haint);
+
+	/* Read HCINT */
+	hcint.d32 = DWC_READ_REG32(&hc_regs->hcint);
+
+	/* Read HCCHAR */
+	hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+
+	/* Clear HCINT */
+	DWC_WRITE_REG32(&hc_regs->hcint, hcint.d32);
+
+	/* Clear HAINT */
+	DWC_WRITE_REG32(&hc_global_regs->haint, haint.d32);
+
+	/* Clear GINTSTS */
+	DWC_WRITE_REG32(&global_regs->gintsts, gintsts.d32);
+
+	/* Read GINTSTS */
+	gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts);
+
+	/* Make sure channel is disabled */
+	hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+	if (hcchar.b.chen) {
+		hcchar.b.chdis = 1;
+		hcchar.b.chen = 1;
+		DWC_WRITE_REG32(&hc_regs->hcchar, hcchar.d32);
+		//sleep(1);
+		dwc_mdelay(1000);
+
+		/* Read GINTSTS */
+		gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts);
+
+		/* Read HAINT */
+		haint.d32 = DWC_READ_REG32(&hc_global_regs->haint);
+
+		/* Read HCINT */
+		hcint.d32 = DWC_READ_REG32(&hc_regs->hcint);
+
+		/* Read HCCHAR */
+		hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+
+		/* Clear HCINT */
+		DWC_WRITE_REG32(&hc_regs->hcint, hcint.d32);
+
+		/* Clear HAINT */
+		DWC_WRITE_REG32(&hc_global_regs->haint, haint.d32);
+
+		/* Clear GINTSTS */
+		DWC_WRITE_REG32(&global_regs->gintsts, gintsts.d32);
+
+		hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+	}
+
+	/* Set HCTSIZ */
+	hctsiz.d32 = 0;
+	hctsiz.b.xfersize = 0;
+	hctsiz.b.pktcnt = 1;
+	hctsiz.b.pid = DWC_OTG_HC_PID_DATA1;
+	DWC_WRITE_REG32(&hc_regs->hctsiz, hctsiz.d32);
+
+	/* Set HCCHAR */
+	hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+	hcchar.b.eptype = DWC_OTG_EP_TYPE_CONTROL;
+	hcchar.b.epdir = 0;
+	hcchar.b.epnum = 0;
+	hcchar.b.mps = 8;
+	hcchar.b.chen = 1;
+	DWC_WRITE_REG32(&hc_regs->hcchar, hcchar.d32);
+
+	gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts);
+
+	/* Wait for host channel interrupt */
+	do {
+		gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts);
+	} while (gintsts.b.hcintr == 0);
+
+	/* Disable HCINTs */
+	DWC_WRITE_REG32(&hc_regs->hcintmsk, 0x0000);
+
+	/* Disable HAINTs */
+	DWC_WRITE_REG32(&hc_global_regs->haintmsk, 0x0000);
+
+	/* Read HAINT */
+	haint.d32 = DWC_READ_REG32(&hc_global_regs->haint);
+
+	/* Read HCINT */
+	hcint.d32 = DWC_READ_REG32(&hc_regs->hcint);
+
+	/* Read HCCHAR */
+	hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+
+	/* Clear HCINT */
+	DWC_WRITE_REG32(&hc_regs->hcint, hcint.d32);
+
+	/* Clear HAINT */
+	DWC_WRITE_REG32(&hc_global_regs->haint, haint.d32);
+
+	/* Clear GINTSTS */
+	DWC_WRITE_REG32(&global_regs->gintsts, gintsts.d32);
+
+	/* Read GINTSTS */
+	gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts);
+}
+#endif
+
+/** Handles hub class-specific requests. */
+int dwc_otg_hcd_hub_control(dwc_otg_hcd_t * dwc_otg_hcd,
+			    uint16_t typeReq,
+			    uint16_t wValue,
+			    uint16_t wIndex, uint8_t * buf, uint16_t wLength)
+{
+	int retval = 0;
+
+	dwc_otg_core_if_t *core_if = dwc_otg_hcd->core_if;
+	usb_hub_descriptor_t *hub_desc;
+	hprt0_data_t hprt0 = {.d32 = 0 };
+
+	uint32_t port_status;
+
+	switch (typeReq) {
+	case UCR_CLEAR_HUB_FEATURE:
+		DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - "
+			    "ClearHubFeature 0x%x\n", wValue);
+		switch (wValue) {
+		case UHF_C_HUB_LOCAL_POWER:
+		case UHF_C_HUB_OVER_CURRENT:
+			/* Nothing required here */
+			break;
+		default:
+			retval = -DWC_E_INVALID;
+			DWC_ERROR("DWC OTG HCD - "
+				  "ClearHubFeature request %xh unknown\n",
+				  wValue);
+		}
+		break;
+	case UCR_CLEAR_PORT_FEATURE:
+#ifdef CONFIG_USB_DWC_OTG_LPM
+		if (wValue != UHF_PORT_L1)
+#endif
+			if (!wIndex || wIndex > 1)
+				goto error;
+
+		switch (wValue) {
+		case UHF_PORT_ENABLE:
+			DWC_DEBUGPL(DBG_ANY, "DWC OTG HCD HUB CONTROL - "
+				    "ClearPortFeature USB_PORT_FEAT_ENABLE\n");
+			hprt0.d32 = dwc_otg_read_hprt0(core_if);
+			hprt0.b.prtena = 1;
+			DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+			break;
+		case UHF_PORT_SUSPEND:
+			DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - "
+				    "ClearPortFeature USB_PORT_FEAT_SUSPEND\n");
+
+			if (core_if->power_down == 2) {
+				dwc_otg_host_hibernation_restore(core_if, 0, 0);
+			} else {
+				DWC_WRITE_REG32(core_if->pcgcctl, 0);
+				dwc_mdelay(5);
+
+				hprt0.d32 = dwc_otg_read_hprt0(core_if);
+				hprt0.b.prtres = 1;
+				DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+				hprt0.b.prtsusp = 0;
+				/* Clear Resume bit */
+				dwc_mdelay(100);
+				hprt0.b.prtres = 0;
+				DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+			}
+			break;
+#ifdef CONFIG_USB_DWC_OTG_LPM
+		case UHF_PORT_L1:
+			{
+				pcgcctl_data_t pcgcctl = {.d32 = 0 };
+				glpmcfg_data_t lpmcfg = {.d32 = 0 };
+
+				lpmcfg.d32 =
+				    DWC_READ_REG32(&core_if->
+						   core_global_regs->glpmcfg);
+				lpmcfg.b.en_utmi_sleep = 0;
+				lpmcfg.b.hird_thres &= (~(1 << 4));
+				lpmcfg.b.prt_sleep_sts = 1;
+				DWC_WRITE_REG32(&core_if->
+						core_global_regs->glpmcfg,
+						lpmcfg.d32);
+
+				/* Clear Enbl_L1Gating bit. */
+				pcgcctl.b.enbl_sleep_gating = 1;
+				DWC_MODIFY_REG32(core_if->pcgcctl, pcgcctl.d32,
+						 0);
+
+				dwc_mdelay(5);
+
+				hprt0.d32 = dwc_otg_read_hprt0(core_if);
+				hprt0.b.prtres = 1;
+				DWC_WRITE_REG32(core_if->host_if->hprt0,
+						hprt0.d32);
+				/* This bit will be cleared in wakeup interrupt handle */
+				break;
+			}
+#endif
+		case UHF_PORT_POWER:
+			DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - "
+				    "ClearPortFeature USB_PORT_FEAT_POWER\n");
+			hprt0.d32 = dwc_otg_read_hprt0(core_if);
+			hprt0.b.prtpwr = 0;
+			DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+			break;
+		case UHF_PORT_INDICATOR:
+			DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - "
+				    "ClearPortFeature USB_PORT_FEAT_INDICATOR\n");
+			/* Port inidicator not supported */
+			break;
+		case UHF_C_PORT_CONNECTION:
+			/* Clears drivers internal connect status change
+			 * flag */
+			DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - "
+				    "ClearPortFeature USB_PORT_FEAT_C_CONNECTION\n");
+			dwc_otg_hcd->flags.b.port_connect_status_change = 0;
+			break;
+		case UHF_C_PORT_RESET:
+			/* Clears the driver's internal Port Reset Change
+			 * flag */
+			DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - "
+				    "ClearPortFeature USB_PORT_FEAT_C_RESET\n");
+			dwc_otg_hcd->flags.b.port_reset_change = 0;
+			break;
+		case UHF_C_PORT_ENABLE:
+			/* Clears the driver's internal Port
+			 * Enable/Disable Change flag */
+			DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - "
+				    "ClearPortFeature USB_PORT_FEAT_C_ENABLE\n");
+			dwc_otg_hcd->flags.b.port_enable_change = 0;
+			break;
+		case UHF_C_PORT_SUSPEND:
+			/* Clears the driver's internal Port Suspend
+			 * Change flag, which is set when resume signaling on
+			 * the host port is complete */
+			DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - "
+				    "ClearPortFeature USB_PORT_FEAT_C_SUSPEND\n");
+			dwc_otg_hcd->flags.b.port_suspend_change = 0;
+			break;
+#ifdef CONFIG_USB_DWC_OTG_LPM
+		case UHF_C_PORT_L1:
+			dwc_otg_hcd->flags.b.port_l1_change = 0;
+			break;
+#endif
+		case UHF_C_PORT_OVER_CURRENT:
+			DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - "
+				    "ClearPortFeature USB_PORT_FEAT_C_OVER_CURRENT\n");
+			dwc_otg_hcd->flags.b.port_over_current_change = 0;
+			break;
+		default:
+			retval = -DWC_E_INVALID;
+			DWC_ERROR("DWC OTG HCD - "
+				  "ClearPortFeature request %xh "
+				  "unknown or unsupported\n", wValue);
+		}
+		break;
+	case UCR_GET_HUB_DESCRIPTOR:
+		DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - "
+			    "GetHubDescriptor\n");
+		hub_desc = (usb_hub_descriptor_t *) buf;
+		hub_desc->bDescLength = 9;
+		hub_desc->bDescriptorType = 0x29;
+		hub_desc->bNbrPorts = 1;
+		USETW(hub_desc->wHubCharacteristics, 0x08);
+		hub_desc->bPwrOn2PwrGood = 1;
+		hub_desc->bHubContrCurrent = 0;
+		hub_desc->DeviceRemovable[0] = 0;
+		hub_desc->DeviceRemovable[1] = 0xff;
+		break;
+	case UCR_GET_HUB_STATUS:
+		DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - "
+			    "GetHubStatus\n");
+		DWC_MEMSET(buf, 0, 4);
+		break;
+	case UCR_GET_PORT_STATUS:
+		DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - "
+			    "GetPortStatus wIndex = 0x%04x FLAGS=0x%08x\n",
+			    wIndex, dwc_otg_hcd->flags.d32);
+		if (!wIndex || wIndex > 1)
+			goto error;
+
+		port_status = 0;
+
+		if (dwc_otg_hcd->flags.b.port_connect_status_change)
+			port_status |= (1 << UHF_C_PORT_CONNECTION);
+
+		if (dwc_otg_hcd->flags.b.port_enable_change)
+			port_status |= (1 << UHF_C_PORT_ENABLE);
+
+		if (dwc_otg_hcd->flags.b.port_suspend_change)
+			port_status |= (1 << UHF_C_PORT_SUSPEND);
+
+		if (dwc_otg_hcd->flags.b.port_l1_change)
+			port_status |= (1 << UHF_C_PORT_L1);
+
+		if (dwc_otg_hcd->flags.b.port_reset_change) {
+			port_status |= (1 << UHF_C_PORT_RESET);
+		}
+
+		if (dwc_otg_hcd->flags.b.port_over_current_change) {
+			DWC_WARN("Overcurrent change detected\n");
+			port_status |= (1 << UHF_C_PORT_OVER_CURRENT);
+		}
+
+		if (!dwc_otg_hcd->flags.b.port_connect_status) {
+			/*
+			 * The port is disconnected, which means the core is
+			 * either in device mode or it soon will be. Just
+			 * return 0's for the remainder of the port status
+			 * since the port register can't be read if the core
+			 * is in device mode.
+			 */
+			*((__le32 *) buf) = dwc_cpu_to_le32(&port_status);
+			break;
+		}
+
+		hprt0.d32 = DWC_READ_REG32(core_if->host_if->hprt0);
+		DWC_DEBUGPL(DBG_HCDV, "  HPRT0: 0x%08x\n", hprt0.d32);
+
+		if (hprt0.b.prtconnsts)
+			port_status |= (1 << UHF_PORT_CONNECTION);
+
+		if (hprt0.b.prtena)
+			port_status |= (1 << UHF_PORT_ENABLE);
+
+		if (hprt0.b.prtsusp)
+			port_status |= (1 << UHF_PORT_SUSPEND);
+
+		if (hprt0.b.prtovrcurract)
+			port_status |= (1 << UHF_PORT_OVER_CURRENT);
+
+		if (hprt0.b.prtrst)
+			port_status |= (1 << UHF_PORT_RESET);
+
+		if (hprt0.b.prtpwr)
+			port_status |= (1 << UHF_PORT_POWER);
+
+		if (hprt0.b.prtspd == DWC_HPRT0_PRTSPD_HIGH_SPEED)
+			port_status |= (1 << UHF_PORT_HIGH_SPEED);
+		else if (hprt0.b.prtspd == DWC_HPRT0_PRTSPD_LOW_SPEED)
+			port_status |= (1 << UHF_PORT_LOW_SPEED);
+
+		if (hprt0.b.prttstctl)
+			port_status |= (1 << UHF_PORT_TEST);
+		if (dwc_otg_get_lpm_portsleepstatus(dwc_otg_hcd->core_if)) {
+			port_status |= (1 << UHF_PORT_L1);
+		}
+		/*
+		   For Synopsys HW emulation of Power down wkup_control asserts the 
+		   hreset_n and prst_n on suspned. This causes the HPRT0 to be zero. 
+		   We intentionally tell the software that port is in L2Suspend state. 
+		   Only for STE.
+		*/
+		if ((core_if->power_down == 2)
+		    && (core_if->hibernation_suspend == 1)) {
+			port_status |= (1 << UHF_PORT_SUSPEND);
+		}
+		/* USB_PORT_FEAT_INDICATOR unsupported always 0 */
+
+		*((__le32 *) buf) = dwc_cpu_to_le32(&port_status);
+
+		break;
+	case UCR_SET_HUB_FEATURE:
+		DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - "
+			    "SetHubFeature\n");
+		/* No HUB features supported */
+		break;
+	case UCR_SET_PORT_FEATURE:
+		if (wValue != UHF_PORT_TEST && (!wIndex || wIndex > 1))
+			goto error;
+
+		if (!dwc_otg_hcd->flags.b.port_connect_status) {
+			/*
+			 * The port is disconnected, which means the core is
+			 * either in device mode or it soon will be. Just
+			 * return without doing anything since the port
+			 * register can't be written if the core is in device
+			 * mode.
+			 */
+			break;
+		}
+
+		switch (wValue) {
+		case UHF_PORT_SUSPEND:
+			DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - "
+				    "SetPortFeature - USB_PORT_FEAT_SUSPEND\n");
+			if (dwc_otg_hcd_otg_port(dwc_otg_hcd) != wIndex) {
+				goto error;
+			}
+			if (core_if->power_down == 2) {
+				int timeout = 300;
+				dwc_irqflags_t flags;
+				pcgcctl_data_t pcgcctl = {.d32 = 0 };
+				gpwrdn_data_t gpwrdn = {.d32 = 0 };
+				gusbcfg_data_t gusbcfg = {.d32 = 0 };
+#ifdef DWC_DEV_SRPCAP
+				int32_t otg_cap_param = core_if->core_params->otg_cap;
+#endif
+				DWC_PRINTF("Preparing for complete power-off\n");
+
+				/* Save registers before hibernation */
+				dwc_otg_save_global_regs(core_if);
+				dwc_otg_save_host_regs(core_if);
+
+				hprt0.d32 = dwc_otg_read_hprt0(core_if);
+				hprt0.b.prtsusp = 1;
+				hprt0.b.prtena = 0;
+				DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+				/* Spin hprt0.b.prtsusp to became 1 */
+				do {
+					hprt0.d32 = dwc_otg_read_hprt0(core_if);
+					if (hprt0.b.prtsusp) {
+						break;
+					}
+					dwc_mdelay(1);
+				} while (--timeout);
+				if (!timeout) {
+					DWC_WARN("Suspend wasn't genereted\n");
+				}
+				dwc_udelay(10);
+
+				/*
+				 * We need to disable interrupts to prevent servicing of any IRQ
+				 * during going to hibernation
+				 */
+				DWC_SPINLOCK_IRQSAVE(dwc_otg_hcd->lock, &flags);
+				core_if->lx_state = DWC_OTG_L2;
+#ifdef DWC_DEV_SRPCAP
+				hprt0.d32 = dwc_otg_read_hprt0(core_if);
+				hprt0.b.prtpwr = 0;
+				hprt0.b.prtena = 0;
+				DWC_WRITE_REG32(core_if->host_if->hprt0,
+						hprt0.d32);
+#endif
+				gusbcfg.d32 =
+				    DWC_READ_REG32(&core_if->core_global_regs->
+						   gusbcfg);
+				if (gusbcfg.b.ulpi_utmi_sel == 1) {
+					/* ULPI interface */
+					/* Suspend the Phy Clock */
+					pcgcctl.d32 = 0;
+					pcgcctl.b.stoppclk = 1;
+					DWC_MODIFY_REG32(core_if->pcgcctl, 0,
+							 pcgcctl.d32);
+					dwc_udelay(10);
+					gpwrdn.b.pmuactv = 1;
+					DWC_MODIFY_REG32(&core_if->
+							 core_global_regs->
+							 gpwrdn, 0, gpwrdn.d32);
+				} else {
+					/* UTMI+ Interface */
+					gpwrdn.b.pmuactv = 1;
+					DWC_MODIFY_REG32(&core_if->
+							 core_global_regs->
+							 gpwrdn, 0, gpwrdn.d32);
+					dwc_udelay(10);
+					pcgcctl.b.stoppclk = 1;
+					DWC_MODIFY_REG32(core_if->pcgcctl, 0, pcgcctl.d32);
+					dwc_udelay(10);
+				}
+#ifdef DWC_DEV_SRPCAP				
+				gpwrdn.d32 = 0;
+				gpwrdn.b.dis_vbus = 1;
+				DWC_MODIFY_REG32(&core_if->core_global_regs->
+						 gpwrdn, 0, gpwrdn.d32);
+#endif
+				gpwrdn.d32 = 0;
+				gpwrdn.b.pmuintsel = 1;
+				DWC_MODIFY_REG32(&core_if->core_global_regs->
+						 gpwrdn, 0, gpwrdn.d32);
+				dwc_udelay(10);
+
+				gpwrdn.d32 = 0;
+#ifdef DWC_DEV_SRPCAP
+				gpwrdn.b.srp_det_msk = 1;
+#endif
+				gpwrdn.b.disconn_det_msk = 1;
+				gpwrdn.b.lnstchng_msk = 1;
+				gpwrdn.b.sts_chngint_msk = 1;
+				DWC_MODIFY_REG32(&core_if->core_global_regs->
+						 gpwrdn, 0, gpwrdn.d32);
+				dwc_udelay(10);
+
+				/* Enable Power Down Clamp and all interrupts in GPWRDN */
+				gpwrdn.d32 = 0;
+				gpwrdn.b.pwrdnclmp = 1;
+				DWC_MODIFY_REG32(&core_if->core_global_regs->
+						 gpwrdn, 0, gpwrdn.d32);
+				dwc_udelay(10);
+
+				/* Switch off VDD */
+				gpwrdn.d32 = 0;
+				gpwrdn.b.pwrdnswtch = 1;
+				DWC_MODIFY_REG32(&core_if->core_global_regs->
+						 gpwrdn, 0, gpwrdn.d32);
+
+#ifdef DWC_DEV_SRPCAP
+				if (otg_cap_param == DWC_OTG_CAP_PARAM_HNP_SRP_CAPABLE)
+				{
+					core_if->pwron_timer_started = 1;
+					DWC_TIMER_SCHEDULE(core_if->pwron_timer, 6000 /* 6 secs */ );
+				}
+#endif
+				/* Save gpwrdn register for further usage if stschng interrupt */
+				core_if->gr_backup->gpwrdn_local =
+						DWC_READ_REG32(&core_if->core_global_regs->gpwrdn);
+
+				/* Set flag to indicate that we are in hibernation */
+				core_if->hibernation_suspend = 1;
+				DWC_SPINUNLOCK_IRQRESTORE(dwc_otg_hcd->lock,flags);
+
+				DWC_PRINTF("Host hibernation completed\n");
+				// Exit from case statement
+				break;
+
+			}
+			if (dwc_otg_hcd_otg_port(dwc_otg_hcd) == wIndex &&
+			    dwc_otg_hcd->fops->get_b_hnp_enable(dwc_otg_hcd)) {
+				gotgctl_data_t gotgctl = {.d32 = 0 };
+				gotgctl.b.hstsethnpen = 1;
+				DWC_MODIFY_REG32(&core_if->core_global_regs->
+						 gotgctl, 0, gotgctl.d32);
+				core_if->op_state = A_SUSPEND;
+			}
+			hprt0.d32 = dwc_otg_read_hprt0(core_if);
+			hprt0.b.prtsusp = 1;
+			DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+			{
+				dwc_irqflags_t flags;
+				/* Update lx_state */
+				DWC_SPINLOCK_IRQSAVE(dwc_otg_hcd->lock, &flags);
+				core_if->lx_state = DWC_OTG_L2;
+				DWC_SPINUNLOCK_IRQRESTORE(dwc_otg_hcd->lock, flags);
+			}
+			/* Suspend the Phy Clock */
+			{
+				pcgcctl_data_t pcgcctl = {.d32 = 0 };
+				pcgcctl.b.stoppclk = 1;
+				DWC_MODIFY_REG32(core_if->pcgcctl, 0,
+						 pcgcctl.d32);
+				dwc_udelay(10);
+			}
+
+			/* For HNP the bus must be suspended for at least 200ms. */
+			if (dwc_otg_hcd->fops->get_b_hnp_enable(dwc_otg_hcd)) {
+				pcgcctl_data_t pcgcctl = {.d32 = 0 };
+				pcgcctl.b.stoppclk = 1;
+                DWC_MODIFY_REG32(core_if->pcgcctl, pcgcctl.d32, 0);
+				dwc_mdelay(200);
+			}
+
+			/** @todo - check how sw can wait for 1 sec to check asesvld??? */
+			if (core_if->adp_enable) {
+				gotgctl_data_t gotgctl = {.d32 = 0 };
+				gpwrdn_data_t gpwrdn;
+
+				while (gotgctl.b.asesvld == 1) {
+					gotgctl.d32 =
+					    DWC_READ_REG32(&core_if->
+							   core_global_regs->
+							   gotgctl);
+					dwc_mdelay(100);
+				}
+
+				/* Enable Power Down Logic */
+				gpwrdn.d32 = 0;
+				gpwrdn.b.pmuactv = 1;
+				DWC_MODIFY_REG32(&core_if->core_global_regs->
+						 gpwrdn, 0, gpwrdn.d32);
+
+				/* Unmask SRP detected interrupt from Power Down Logic */
+				gpwrdn.d32 = 0;
+				gpwrdn.b.srp_det_msk = 1;
+				DWC_MODIFY_REG32(&core_if->core_global_regs->
+						 gpwrdn, 0, gpwrdn.d32);
+
+				dwc_otg_adp_probe_start(core_if);
+			}
+			break;
+		case UHF_PORT_POWER:
+			DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - "
+				    "SetPortFeature - USB_PORT_FEAT_POWER\n");
+			hprt0.d32 = dwc_otg_read_hprt0(core_if);
+			hprt0.b.prtpwr = 1;
+			DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+			break;
+		case UHF_PORT_RESET:
+			if ((core_if->power_down == 2)
+			    && (core_if->hibernation_suspend == 1)) {
+				/* If we are going to exit from Hibernated
+				 * state via USB RESET.
+				 */
+				dwc_otg_host_hibernation_restore(core_if, 0, 1);
+			} else {
+				hprt0.d32 = dwc_otg_read_hprt0(core_if);
+
+				DWC_DEBUGPL(DBG_HCD,
+					    "DWC OTG HCD HUB CONTROL - "
+					    "SetPortFeature - USB_PORT_FEAT_RESET\n");
+				{
+					pcgcctl_data_t pcgcctl = {.d32 = 0 };
+					pcgcctl.b.enbl_sleep_gating = 1;
+					pcgcctl.b.stoppclk = 1;
+					DWC_MODIFY_REG32(core_if->pcgcctl, pcgcctl.d32, 0);
+					DWC_WRITE_REG32(core_if->pcgcctl, 0);
+				}
+#ifdef CONFIG_USB_DWC_OTG_LPM
+				{
+					glpmcfg_data_t lpmcfg;
+					lpmcfg.d32 =
+						DWC_READ_REG32(&core_if->core_global_regs->glpmcfg);
+					if (lpmcfg.b.prt_sleep_sts) {
+						lpmcfg.b.en_utmi_sleep = 0;
+						lpmcfg.b.hird_thres &= (~(1 << 4));
+						DWC_WRITE_REG32
+						    (&core_if->core_global_regs->glpmcfg,
+						     lpmcfg.d32);
+						dwc_mdelay(1);
+					}
+				}
+#endif
+				hprt0.d32 = dwc_otg_read_hprt0(core_if);
+				/* Clear suspend bit if resetting from suspended state. */
+				hprt0.b.prtsusp = 0;
+				/* When B-Host the Port reset bit is set in
+				 * the Start HCD Callback function, so that
+				 * the reset is started within 1ms of the HNP
+				 * success interrupt. */
+				if (!dwc_otg_hcd_is_b_host(dwc_otg_hcd)) {
+					hprt0.b.prtpwr = 1;
+					hprt0.b.prtrst = 1;
+					DWC_PRINTF("Indeed it is in host mode hprt0 = %08x\n",hprt0.d32);
+					DWC_WRITE_REG32(core_if->host_if->hprt0,
+							hprt0.d32);
+				}
+				/* Clear reset bit in 10ms (FS/LS) or 50ms (HS) */
+				dwc_mdelay(60);
+				hprt0.b.prtrst = 0;
+				DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+				core_if->lx_state = DWC_OTG_L0;	/* Now back to the on state */
+			}
+			break;
+#ifdef DWC_HS_ELECT_TST
+		case UHF_PORT_TEST:
+			{
+				uint32_t t;
+				gintmsk_data_t gintmsk;
+
+				t = (wIndex >> 8);	/* MSB wIndex USB */
+				DWC_DEBUGPL(DBG_HCD,
+					    "DWC OTG HCD HUB CONTROL - "
+					    "SetPortFeature - USB_PORT_FEAT_TEST %d\n",
+					    t);
+				DWC_WARN("USB_PORT_FEAT_TEST %d\n", t);
+				if (t < 6) {
+					hprt0.d32 = dwc_otg_read_hprt0(core_if);
+					hprt0.b.prttstctl = t;
+					DWC_WRITE_REG32(core_if->host_if->hprt0,
+							hprt0.d32);
+				} else {
+					/* Setup global vars with reg addresses (quick and
+					 * dirty hack, should be cleaned up)
+					 */
+					global_regs = core_if->core_global_regs;
+					hc_global_regs =
+					    core_if->host_if->host_global_regs;
+					hc_regs =
+					    (dwc_otg_hc_regs_t *) ((char *)
+								   global_regs +
+								   0x500);
+					data_fifo =
+					    (uint32_t *) ((char *)global_regs +
+							  0x1000);
+
+					if (t == 6) {	/* HS_HOST_PORT_SUSPEND_RESUME */
+						/* Save current interrupt mask */
+						gintmsk.d32 =
+						    DWC_READ_REG32
+						    (&global_regs->gintmsk);
+
+						/* Disable all interrupts while we muck with
+						 * the hardware directly
+						 */
+						DWC_WRITE_REG32(&global_regs->gintmsk, 0);
+
+						/* 15 second delay per the test spec */
+						dwc_mdelay(15000);
+
+						/* Drive suspend on the root port */
+						hprt0.d32 =
+						    dwc_otg_read_hprt0(core_if);
+						hprt0.b.prtsusp = 1;
+						hprt0.b.prtres = 0;
+						DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+
+						/* 15 second delay per the test spec */
+						dwc_mdelay(15000);
+
+						/* Drive resume on the root port */
+						hprt0.d32 =
+						    dwc_otg_read_hprt0(core_if);
+						hprt0.b.prtsusp = 0;
+						hprt0.b.prtres = 1;
+						DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+						dwc_mdelay(100);
+
+						/* Clear the resume bit */
+						hprt0.b.prtres = 0;
+						DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+
+						/* Restore interrupts */
+						DWC_WRITE_REG32(&global_regs->gintmsk, gintmsk.d32);
+					} else if (t == 7) {	/* SINGLE_STEP_GET_DEVICE_DESCRIPTOR setup */
+						/* Save current interrupt mask */
+						gintmsk.d32 =
+						    DWC_READ_REG32
+						    (&global_regs->gintmsk);
+
+						/* Disable all interrupts while we muck with
+						 * the hardware directly
+						 */
+						DWC_WRITE_REG32(&global_regs->gintmsk, 0);
+
+						/* 15 second delay per the test spec */
+						dwc_mdelay(15000);
+
+						/* Send the Setup packet */
+						do_setup();
+
+						/* 15 second delay so nothing else happens for awhile */
+						dwc_mdelay(15000);
+
+						/* Restore interrupts */
+						DWC_WRITE_REG32(&global_regs->gintmsk, gintmsk.d32);
+					} else if (t == 8) {	/* SINGLE_STEP_GET_DEVICE_DESCRIPTOR execute */
+						/* Save current interrupt mask */
+						gintmsk.d32 =
+						    DWC_READ_REG32
+						    (&global_regs->gintmsk);
+
+						/* Disable all interrupts while we muck with
+						 * the hardware directly
+						 */
+						DWC_WRITE_REG32(&global_regs->gintmsk, 0);
+
+						/* Send the Setup packet */
+						do_setup();
+
+						/* 15 second delay so nothing else happens for awhile */
+						dwc_mdelay(15000);
+
+						/* Send the In and Ack packets */
+						do_in_ack();
+
+						/* 15 second delay so nothing else happens for awhile */
+						dwc_mdelay(15000);
+
+						/* Restore interrupts */
+						DWC_WRITE_REG32(&global_regs->gintmsk, gintmsk.d32);
+					}
+				}
+				break;
+			}
+#endif /* DWC_HS_ELECT_TST */
+
+		case UHF_PORT_INDICATOR:
+			DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - "
+				    "SetPortFeature - USB_PORT_FEAT_INDICATOR\n");
+			/* Not supported */
+			break;
+		default:
+			retval = -DWC_E_INVALID;
+			DWC_ERROR("DWC OTG HCD - "
+				  "SetPortFeature request %xh "
+				  "unknown or unsupported\n", wValue);
+			break;
+		}
+		break;
+#ifdef CONFIG_USB_DWC_OTG_LPM
+	case UCR_SET_AND_TEST_PORT_FEATURE:
+		if (wValue != UHF_PORT_L1) {
+			goto error;
+		}
+		{
+			int portnum, hird, devaddr, remwake;
+			glpmcfg_data_t lpmcfg;
+			uint32_t time_usecs;
+			gintsts_data_t gintsts;
+			gintmsk_data_t gintmsk;
+
+			if (!dwc_otg_get_param_lpm_enable(core_if)) {
+				goto error;
+			}
+			if (wValue != UHF_PORT_L1 || wLength != 1) {
+				goto error;
+			}
+			/* Check if the port currently is in SLEEP state */
+			lpmcfg.d32 =
+			    DWC_READ_REG32(&core_if->core_global_regs->glpmcfg);
+			if (lpmcfg.b.prt_sleep_sts) {
+				DWC_INFO("Port is already in sleep mode\n");
+				buf[0] = 0;	/* Return success */
+				break;
+			}
+
+			portnum = wIndex & 0xf;
+			hird = (wIndex >> 4) & 0xf;
+			devaddr = (wIndex >> 8) & 0x7f;
+			remwake = (wIndex >> 15);
+
+			if (portnum != 1) {
+				retval = -DWC_E_INVALID;
+				DWC_WARN
+				    ("Wrong port number(%d) in SetandTestPortFeature request\n",
+				     portnum);
+				break;
+			}
+
+			DWC_PRINTF
+			    ("SetandTestPortFeature request: portnum = %d, hird = %d, devaddr = %d, rewake = %d\n",
+			     portnum, hird, devaddr, remwake);
+			/* Disable LPM interrupt */
+			gintmsk.d32 = 0;
+			gintmsk.b.lpmtranrcvd = 1;
+			DWC_MODIFY_REG32(&core_if->core_global_regs->gintmsk,
+					 gintmsk.d32, 0);
+
+			if (dwc_otg_hcd_send_lpm
+			    (dwc_otg_hcd, devaddr, hird, remwake)) {
+				retval = -DWC_E_INVALID;
+				break;
+			}
+
+			time_usecs = 10 * (lpmcfg.b.retry_count + 1);
+			/* We will consider timeout if time_usecs microseconds pass,
+			 * and we don't receive LPM transaction status.
+			 * After receiving non-error responce(ACK/NYET/STALL) from device,
+			 *  core will set lpmtranrcvd bit.
+			 */
+			do {
+				gintsts.d32 =
+				    DWC_READ_REG32(&core_if->core_global_regs->gintsts);
+				if (gintsts.b.lpmtranrcvd) {
+					break;
+				}
+				dwc_udelay(1);
+			} while (--time_usecs);
+			/* lpm_int bit will be cleared in LPM interrupt handler */
+
+			/* Now fill status
+			 * 0x00 - Success
+			 * 0x10 - NYET
+			 * 0x11 - Timeout
+			 */
+			if (!gintsts.b.lpmtranrcvd) {
+				buf[0] = 0x3;	/* Completion code is Timeout */
+				dwc_otg_hcd_free_hc_from_lpm(dwc_otg_hcd);
+			} else {
+				lpmcfg.d32 =
+				    DWC_READ_REG32(&core_if->core_global_regs->glpmcfg);
+				if (lpmcfg.b.lpm_resp == 0x3) {
+					/* ACK responce from the device */
+					buf[0] = 0x00;	/* Success */
+				} else if (lpmcfg.b.lpm_resp == 0x2) {
+					/* NYET responce from the device */
+					buf[0] = 0x2;
+				} else {
+					/* Otherwise responce with Timeout */
+					buf[0] = 0x3;
+				}
+			}
+			DWC_PRINTF("Device responce to LPM trans is %x\n",
+				   lpmcfg.b.lpm_resp);
+			DWC_MODIFY_REG32(&core_if->core_global_regs->gintmsk, 0,
+					 gintmsk.d32);
+
+			break;
+		}
+#endif /* CONFIG_USB_DWC_OTG_LPM */
+	default:
+error:
+		retval = -DWC_E_INVALID;
+		DWC_WARN("DWC OTG HCD - "
+			 "Unknown hub control request type or invalid typeReq: %xh wIndex: %xh wValue: %xh\n",
+			 typeReq, wIndex, wValue);
+		break;
+	}
+
+	return retval;
+}
+
+#ifdef CONFIG_USB_DWC_OTG_LPM
+/** Returns index of host channel to perform LPM transaction. */
+int dwc_otg_hcd_get_hc_for_lpm_tran(dwc_otg_hcd_t * hcd, uint8_t devaddr)
+{
+	dwc_otg_core_if_t *core_if = hcd->core_if;
+	dwc_hc_t *hc;
+	hcchar_data_t hcchar;
+	gintmsk_data_t gintmsk = {.d32 = 0 };
+
+	if (DWC_CIRCLEQ_EMPTY(&hcd->free_hc_list)) {
+		DWC_PRINTF("No free channel to select for LPM transaction\n");
+		return -1;
+	}
+
+	hc = DWC_CIRCLEQ_FIRST(&hcd->free_hc_list);
+
+	/* Mask host channel interrupts. */
+	gintmsk.b.hcintr = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gintmsk, gintmsk.d32, 0);
+
+	/* Fill fields that core needs for LPM transaction */
+	hcchar.b.devaddr = devaddr;
+	hcchar.b.epnum = 0;
+	hcchar.b.eptype = DWC_OTG_EP_TYPE_CONTROL;
+	hcchar.b.mps = 64;
+	hcchar.b.lspddev = (hc->speed == DWC_OTG_EP_SPEED_LOW);
+	hcchar.b.epdir = 0;	/* OUT */
+	DWC_WRITE_REG32(&core_if->host_if->hc_regs[hc->hc_num]->hcchar,
+			hcchar.d32);
+
+	/* Remove the host channel from the free list. */
+	DWC_CIRCLEQ_REMOVE_INIT(&hcd->free_hc_list, hc, hc_list_entry);
+
+	DWC_PRINTF("hcnum = %d devaddr = %d\n", hc->hc_num, devaddr);
+
+	return hc->hc_num;
+}
+
+/** Release hc after performing LPM transaction */
+void dwc_otg_hcd_free_hc_from_lpm(dwc_otg_hcd_t * hcd)
+{
+	dwc_hc_t *hc;
+	glpmcfg_data_t lpmcfg;
+	uint8_t hc_num;
+
+	lpmcfg.d32 = DWC_READ_REG32(&hcd->core_if->core_global_regs->glpmcfg);
+	hc_num = lpmcfg.b.lpm_chan_index;
+
+	hc = hcd->hc_ptr_array[hc_num];
+
+	DWC_PRINTF("Freeing channel %d after LPM\n", hc_num);
+	/* Return host channel to free list */
+	DWC_CIRCLEQ_INSERT_TAIL(&hcd->free_hc_list, hc, hc_list_entry);
+}
+
+int dwc_otg_hcd_send_lpm(dwc_otg_hcd_t * hcd, uint8_t devaddr, uint8_t hird,
+			 uint8_t bRemoteWake)
+{
+	glpmcfg_data_t lpmcfg;
+	pcgcctl_data_t pcgcctl = {.d32 = 0 };
+	int channel;
+
+	channel = dwc_otg_hcd_get_hc_for_lpm_tran(hcd, devaddr);
+	if (channel < 0) {
+		return channel;
+	}
+
+	pcgcctl.b.enbl_sleep_gating = 1;
+	DWC_MODIFY_REG32(hcd->core_if->pcgcctl, 0, pcgcctl.d32);
+
+	/* Read LPM config register */
+	lpmcfg.d32 = DWC_READ_REG32(&hcd->core_if->core_global_regs->glpmcfg);
+
+	/* Program LPM transaction fields */
+	lpmcfg.b.rem_wkup_en = bRemoteWake;
+	lpmcfg.b.hird = hird;
+	lpmcfg.b.hird_thres = 0x1c;
+	lpmcfg.b.lpm_chan_index = channel;
+	lpmcfg.b.en_utmi_sleep = 1;
+	/* Program LPM config register */
+	DWC_WRITE_REG32(&hcd->core_if->core_global_regs->glpmcfg, lpmcfg.d32);
+
+	/* Send LPM transaction */
+	lpmcfg.b.send_lpm = 1;
+	DWC_WRITE_REG32(&hcd->core_if->core_global_regs->glpmcfg, lpmcfg.d32);
+
+	return 0;
+}
+
+#endif /* CONFIG_USB_DWC_OTG_LPM */
+
+int dwc_otg_hcd_is_status_changed(dwc_otg_hcd_t * hcd, int port)
+{
+	int retval;
+
+	if (port != 1) {
+		return -DWC_E_INVALID;
+	}
+
+	retval = (hcd->flags.b.port_connect_status_change ||
+		  hcd->flags.b.port_reset_change ||
+		  hcd->flags.b.port_enable_change ||
+		  hcd->flags.b.port_suspend_change ||
+		  hcd->flags.b.port_over_current_change);
+#ifdef DEBUG
+	if (retval) {
+		DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB STATUS DATA:"
+			    " Root port status changed\n");
+		DWC_DEBUGPL(DBG_HCDV, "  port_connect_status_change: %d\n",
+			    hcd->flags.b.port_connect_status_change);
+		DWC_DEBUGPL(DBG_HCDV, "  port_reset_change: %d\n",
+			    hcd->flags.b.port_reset_change);
+		DWC_DEBUGPL(DBG_HCDV, "  port_enable_change: %d\n",
+			    hcd->flags.b.port_enable_change);
+		DWC_DEBUGPL(DBG_HCDV, "  port_suspend_change: %d\n",
+			    hcd->flags.b.port_suspend_change);
+		DWC_DEBUGPL(DBG_HCDV, "  port_over_current_change: %d\n",
+			    hcd->flags.b.port_over_current_change);
+	}
+#endif
+	return retval;
+}
+
+int dwc_otg_hcd_get_frame_number(dwc_otg_hcd_t * dwc_otg_hcd)
+{
+	hfnum_data_t hfnum;
+	hfnum.d32 =
+	    DWC_READ_REG32(&dwc_otg_hcd->core_if->host_if->host_global_regs->
+			   hfnum);
+
+#ifdef DEBUG_SOF
+	DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD GET FRAME NUMBER %d\n",
+		    hfnum.b.frnum);
+#endif
+	return hfnum.b.frnum;
+}
+
+int dwc_otg_hcd_start(dwc_otg_hcd_t * hcd,
+		      struct dwc_otg_hcd_function_ops *fops)
+{
+	int retval = 0;
+
+	hcd->fops = fops;
+	if (!dwc_otg_is_device_mode(hcd->core_if) && 
+		(!hcd->core_if->adp_enable || hcd->core_if->adp.adp_started)) {
+		dwc_otg_hcd_reinit(hcd);
+	} else {
+		retval = -DWC_E_NO_DEVICE;
+	}
+
+	return retval;
+}
+
+void *dwc_otg_hcd_get_priv_data(dwc_otg_hcd_t * hcd)
+{
+	return hcd->priv;
+}
+
+void dwc_otg_hcd_set_priv_data(dwc_otg_hcd_t * hcd, void *priv_data)
+{
+	hcd->priv = priv_data;
+}
+
+uint32_t dwc_otg_hcd_otg_port(dwc_otg_hcd_t * hcd)
+{
+	return hcd->otg_port;
+}
+
+uint32_t dwc_otg_hcd_is_b_host(dwc_otg_hcd_t * hcd)
+{
+	uint32_t is_b_host;
+	if (hcd->core_if->op_state == B_HOST) {
+		is_b_host = 1;
+	} else {
+		is_b_host = 0;
+	}
+
+	return is_b_host;
+}
+
+dwc_otg_hcd_urb_t *dwc_otg_hcd_urb_alloc(dwc_otg_hcd_t * hcd,
+					 int iso_desc_count, int atomic_alloc)
+{
+	dwc_otg_hcd_urb_t *dwc_otg_urb;
+	uint32_t size;
+
+	size =
+	    sizeof(*dwc_otg_urb) +
+	    iso_desc_count * sizeof(struct dwc_otg_hcd_iso_packet_desc);
+	if (atomic_alloc)
+		dwc_otg_urb = DWC_ALLOC_ATOMIC(size);
+	else
+		dwc_otg_urb = DWC_ALLOC(size);
+
+	dwc_otg_urb->packet_count = iso_desc_count;
+
+	return dwc_otg_urb;
+}
+
+void dwc_otg_hcd_urb_set_pipeinfo(dwc_otg_hcd_urb_t * dwc_otg_urb,
+				  uint8_t dev_addr, uint8_t ep_num,
+				  uint8_t ep_type, uint8_t ep_dir, uint16_t mps)
+{
+	dwc_otg_hcd_fill_pipe(&dwc_otg_urb->pipe_info, dev_addr, ep_num,
+			      ep_type, ep_dir, mps);
+#if 0
+	DWC_PRINTF
+	    ("addr = %d, ep_num = %d, ep_dir = 0x%x, ep_type = 0x%x, mps = %d\n",
+	     dev_addr, ep_num, ep_dir, ep_type, mps);
+#endif
+}
+
+void dwc_otg_hcd_urb_set_params(dwc_otg_hcd_urb_t * dwc_otg_urb,
+				void *urb_handle, void *buf, dwc_dma_t dma,
+				uint32_t buflen, void *setup_packet,
+				dwc_dma_t setup_dma, uint32_t flags,
+				uint16_t interval)
+{
+	dwc_otg_urb->priv = urb_handle;
+	dwc_otg_urb->buf = buf;
+	dwc_otg_urb->dma = dma;
+	dwc_otg_urb->length = buflen;
+	dwc_otg_urb->setup_packet = setup_packet;
+	dwc_otg_urb->setup_dma = setup_dma;
+	dwc_otg_urb->flags = flags;
+	dwc_otg_urb->interval = interval;
+	dwc_otg_urb->status = -DWC_E_IN_PROGRESS;
+}
+
+uint32_t dwc_otg_hcd_urb_get_status(dwc_otg_hcd_urb_t * dwc_otg_urb)
+{
+	return dwc_otg_urb->status;
+}
+
+uint32_t dwc_otg_hcd_urb_get_actual_length(dwc_otg_hcd_urb_t * dwc_otg_urb)
+{
+	return dwc_otg_urb->actual_length;
+}
+
+uint32_t dwc_otg_hcd_urb_get_error_count(dwc_otg_hcd_urb_t * dwc_otg_urb)
+{
+	return dwc_otg_urb->error_count;
+}
+
+void dwc_otg_hcd_urb_set_iso_desc_params(dwc_otg_hcd_urb_t * dwc_otg_urb,
+					 int desc_num, uint32_t offset,
+					 uint32_t length)
+{
+	dwc_otg_urb->iso_descs[desc_num].offset = offset;
+	dwc_otg_urb->iso_descs[desc_num].length = length;
+}
+
+uint32_t dwc_otg_hcd_urb_get_iso_desc_status(dwc_otg_hcd_urb_t * dwc_otg_urb,
+					     int desc_num)
+{
+	return dwc_otg_urb->iso_descs[desc_num].status;
+}
+
+uint32_t dwc_otg_hcd_urb_get_iso_desc_actual_length(dwc_otg_hcd_urb_t *
+						    dwc_otg_urb, int desc_num)
+{
+	return dwc_otg_urb->iso_descs[desc_num].actual_length;
+}
+
+int dwc_otg_hcd_is_bandwidth_allocated(dwc_otg_hcd_t * hcd, void *ep_handle)
+{
+	int allocated = 0;
+	dwc_otg_qh_t *qh = (dwc_otg_qh_t *) ep_handle;
+
+	if (qh) {
+		if (!DWC_LIST_EMPTY(&qh->qh_list_entry)) {
+			allocated = 1;
+		}
+	}
+	return allocated;
+}
+
+int dwc_otg_hcd_is_bandwidth_freed(dwc_otg_hcd_t * hcd, void *ep_handle)
+{
+	dwc_otg_qh_t *qh = (dwc_otg_qh_t *) ep_handle;
+	int freed = 0;
+	DWC_ASSERT(qh, "qh is not allocated\n");
+
+	if (DWC_LIST_EMPTY(&qh->qh_list_entry)) {
+		freed = 1;
+	}
+
+	return freed;
+}
+
+uint8_t dwc_otg_hcd_get_ep_bandwidth(dwc_otg_hcd_t * hcd, void *ep_handle)
+{
+	dwc_otg_qh_t *qh = (dwc_otg_qh_t *) ep_handle;
+	DWC_ASSERT(qh, "qh is not allocated\n");
+	return qh->usecs;
+}
+
+void dwc_otg_hcd_dump_state(dwc_otg_hcd_t * hcd)
+{
+#ifdef DEBUG
+	int num_channels;
+	int i;
+	gnptxsts_data_t np_tx_status;
+	hptxsts_data_t p_tx_status;
+
+	num_channels = hcd->core_if->core_params->host_channels;
+	DWC_PRINTF("\n");
+	DWC_PRINTF
+	    ("************************************************************\n");
+	DWC_PRINTF("HCD State:\n");
+	DWC_PRINTF("  Num channels: %d\n", num_channels);
+	for (i = 0; i < num_channels; i++) {
+		dwc_hc_t *hc = hcd->hc_ptr_array[i];
+		DWC_PRINTF("  Channel %d:\n", i);
+		DWC_PRINTF("    dev_addr: %d, ep_num: %d, ep_is_in: %d\n",
+			   hc->dev_addr, hc->ep_num, hc->ep_is_in);
+		DWC_PRINTF("    speed: %d\n", hc->speed);
+		DWC_PRINTF("    ep_type: %d\n", hc->ep_type);
+		DWC_PRINTF("    max_packet: %d\n", hc->max_packet);
+		DWC_PRINTF("    data_pid_start: %d\n", hc->data_pid_start);
+		DWC_PRINTF("    multi_count: %d\n", hc->multi_count);
+		DWC_PRINTF("    xfer_started: %d\n", hc->xfer_started);
+		DWC_PRINTF("    xfer_buff: %p\n", hc->xfer_buff);
+		DWC_PRINTF("    xfer_len: %d\n", hc->xfer_len);
+		DWC_PRINTF("    xfer_count: %d\n", hc->xfer_count);
+		DWC_PRINTF("    halt_on_queue: %d\n", hc->halt_on_queue);
+		DWC_PRINTF("    halt_pending: %d\n", hc->halt_pending);
+		DWC_PRINTF("    halt_status: %d\n", hc->halt_status);
+		DWC_PRINTF("    do_split: %d\n", hc->do_split);
+		DWC_PRINTF("    complete_split: %d\n", hc->complete_split);
+		DWC_PRINTF("    hub_addr: %d\n", hc->hub_addr);
+		DWC_PRINTF("    port_addr: %d\n", hc->port_addr);
+		DWC_PRINTF("    xact_pos: %d\n", hc->xact_pos);
+		DWC_PRINTF("    requests: %d\n", hc->requests);
+		DWC_PRINTF("    qh: %p\n", hc->qh);
+		if (hc->xfer_started) {
+			hfnum_data_t hfnum;
+			hcchar_data_t hcchar;
+			hctsiz_data_t hctsiz;
+			hcint_data_t hcint;
+			hcintmsk_data_t hcintmsk;
+			hfnum.d32 =
+			    DWC_READ_REG32(&hcd->core_if->
+					   host_if->host_global_regs->hfnum);
+			hcchar.d32 =
+			    DWC_READ_REG32(&hcd->core_if->host_if->
+					   hc_regs[i]->hcchar);
+			hctsiz.d32 =
+			    DWC_READ_REG32(&hcd->core_if->host_if->
+					   hc_regs[i]->hctsiz);
+			hcint.d32 =
+			    DWC_READ_REG32(&hcd->core_if->host_if->
+					   hc_regs[i]->hcint);
+			hcintmsk.d32 =
+			    DWC_READ_REG32(&hcd->core_if->host_if->
+					   hc_regs[i]->hcintmsk);
+			DWC_PRINTF("    hfnum: 0x%08x\n", hfnum.d32);
+			DWC_PRINTF("    hcchar: 0x%08x\n", hcchar.d32);
+			DWC_PRINTF("    hctsiz: 0x%08x\n", hctsiz.d32);
+			DWC_PRINTF("    hcint: 0x%08x\n", hcint.d32);
+			DWC_PRINTF("    hcintmsk: 0x%08x\n", hcintmsk.d32);
+		}
+		if (hc->xfer_started && hc->qh) {
+			dwc_otg_qtd_t *qtd;
+			dwc_otg_hcd_urb_t *urb;
+			
+			DWC_CIRCLEQ_FOREACH(qtd, &hc->qh->qtd_list, qtd_list_entry) {
+				if (!qtd->in_process)
+					break;
+				
+				urb = qtd->urb;
+			DWC_PRINTF("    URB Info:\n");
+			DWC_PRINTF("      qtd: %p, urb: %p\n", qtd, urb);
+			if (urb) {
+				DWC_PRINTF("      Dev: %d, EP: %d %s\n",
+					   dwc_otg_hcd_get_dev_addr(&urb->
+								    pipe_info),
+					   dwc_otg_hcd_get_ep_num(&urb->
+								  pipe_info),
+					   dwc_otg_hcd_is_pipe_in(&urb->
+								  pipe_info) ?
+					   "IN" : "OUT");
+				DWC_PRINTF("      Max packet size: %d\n",
+					   dwc_otg_hcd_get_mps(&urb->
+							       pipe_info));
+				DWC_PRINTF("      transfer_buffer: %p\n",
+					   urb->buf);
+				DWC_PRINTF("      transfer_dma: %p\n",
+					   (void *)urb->dma);
+				DWC_PRINTF("      transfer_buffer_length: %d\n",
+					   urb->length);
+					DWC_PRINTF("      actual_length: %d\n",
+						   urb->actual_length);
+				}
+			}
+		}
+	}
+	DWC_PRINTF("  non_periodic_channels: %d\n", hcd->non_periodic_channels);
+	DWC_PRINTF("  periodic_channels: %d\n", hcd->periodic_channels);
+	DWC_PRINTF("  periodic_usecs: %d\n", hcd->periodic_usecs);
+	np_tx_status.d32 =
+	    DWC_READ_REG32(&hcd->core_if->core_global_regs->gnptxsts);
+	DWC_PRINTF("  NP Tx Req Queue Space Avail: %d\n",
+		   np_tx_status.b.nptxqspcavail);
+	DWC_PRINTF("  NP Tx FIFO Space Avail: %d\n",
+		   np_tx_status.b.nptxfspcavail);
+	p_tx_status.d32 =
+	    DWC_READ_REG32(&hcd->core_if->host_if->host_global_regs->hptxsts);
+	DWC_PRINTF("  P Tx Req Queue Space Avail: %d\n",
+		   p_tx_status.b.ptxqspcavail);
+	DWC_PRINTF("  P Tx FIFO Space Avail: %d\n", p_tx_status.b.ptxfspcavail);
+	dwc_otg_hcd_dump_frrem(hcd);
+	dwc_otg_dump_global_registers(hcd->core_if);
+	dwc_otg_dump_host_registers(hcd->core_if);
+	DWC_PRINTF
+	    ("************************************************************\n");
+	DWC_PRINTF("\n");
+#endif
+}
+
+#ifdef DEBUG
+void dwc_print_setup_data(uint8_t * setup)
+{
+	int i;
+	if (CHK_DEBUG_LEVEL(DBG_HCD)) {
+		DWC_PRINTF("Setup Data = MSB ");
+		for (i = 7; i >= 0; i--)
+			DWC_PRINTF("%02x ", setup[i]);
+		DWC_PRINTF("\n");
+		DWC_PRINTF("  bmRequestType Tranfer = %s\n",
+			   (setup[0] & 0x80) ? "Device-to-Host" :
+			   "Host-to-Device");
+		DWC_PRINTF("  bmRequestType Type = ");
+		switch ((setup[0] & 0x60) >> 5) {
+		case 0:
+			DWC_PRINTF("Standard\n");
+			break;
+		case 1:
+			DWC_PRINTF("Class\n");
+			break;
+		case 2:
+			DWC_PRINTF("Vendor\n");
+			break;
+		case 3:
+			DWC_PRINTF("Reserved\n");
+			break;
+		}
+		DWC_PRINTF("  bmRequestType Recipient = ");
+		switch (setup[0] & 0x1f) {
+		case 0:
+			DWC_PRINTF("Device\n");
+			break;
+		case 1:
+			DWC_PRINTF("Interface\n");
+			break;
+		case 2:
+			DWC_PRINTF("Endpoint\n");
+			break;
+		case 3:
+			DWC_PRINTF("Other\n");
+			break;
+		default:
+			DWC_PRINTF("Reserved\n");
+			break;
+		}
+		DWC_PRINTF("  bRequest = 0x%0x\n", setup[1]);
+		DWC_PRINTF("  wValue = 0x%0x\n", *((uint16_t *) & setup[2]));
+		DWC_PRINTF("  wIndex = 0x%0x\n", *((uint16_t *) & setup[4]));
+		DWC_PRINTF("  wLength = 0x%0x\n\n", *((uint16_t *) & setup[6]));
+	}
+}
+#endif
+
+void dwc_otg_hcd_dump_frrem(dwc_otg_hcd_t * hcd)
+{
+#if 0
+	DWC_PRINTF("Frame remaining at SOF:\n");
+	DWC_PRINTF("  samples %u, accum %llu, avg %llu\n",
+		   hcd->frrem_samples, hcd->frrem_accum,
+		   (hcd->frrem_samples > 0) ?
+		   hcd->frrem_accum / hcd->frrem_samples : 0);
+
+	DWC_PRINTF("\n");
+	DWC_PRINTF("Frame remaining at start_transfer (uframe 7):\n");
+	DWC_PRINTF("  samples %u, accum %llu, avg %llu\n",
+		   hcd->core_if->hfnum_7_samples,
+		   hcd->core_if->hfnum_7_frrem_accum,
+		   (hcd->core_if->hfnum_7_samples >
+		    0) ? hcd->core_if->hfnum_7_frrem_accum /
+		   hcd->core_if->hfnum_7_samples : 0);
+	DWC_PRINTF("Frame remaining at start_transfer (uframe 0):\n");
+	DWC_PRINTF("  samples %u, accum %llu, avg %llu\n",
+		   hcd->core_if->hfnum_0_samples,
+		   hcd->core_if->hfnum_0_frrem_accum,
+		   (hcd->core_if->hfnum_0_samples >
+		    0) ? hcd->core_if->hfnum_0_frrem_accum /
+		   hcd->core_if->hfnum_0_samples : 0);
+	DWC_PRINTF("Frame remaining at start_transfer (uframe 1-6):\n");
+	DWC_PRINTF("  samples %u, accum %llu, avg %llu\n",
+		   hcd->core_if->hfnum_other_samples,
+		   hcd->core_if->hfnum_other_frrem_accum,
+		   (hcd->core_if->hfnum_other_samples >
+		    0) ? hcd->core_if->hfnum_other_frrem_accum /
+		   hcd->core_if->hfnum_other_samples : 0);
+
+	DWC_PRINTF("\n");
+	DWC_PRINTF("Frame remaining at sample point A (uframe 7):\n");
+	DWC_PRINTF("  samples %u, accum %llu, avg %llu\n",
+		   hcd->hfnum_7_samples_a, hcd->hfnum_7_frrem_accum_a,
+		   (hcd->hfnum_7_samples_a > 0) ?
+		   hcd->hfnum_7_frrem_accum_a / hcd->hfnum_7_samples_a : 0);
+	DWC_PRINTF("Frame remaining at sample point A (uframe 0):\n");
+	DWC_PRINTF("  samples %u, accum %llu, avg %llu\n",
+		   hcd->hfnum_0_samples_a, hcd->hfnum_0_frrem_accum_a,
+		   (hcd->hfnum_0_samples_a > 0) ?
+		   hcd->hfnum_0_frrem_accum_a / hcd->hfnum_0_samples_a : 0);
+	DWC_PRINTF("Frame remaining at sample point A (uframe 1-6):\n");
+	DWC_PRINTF("  samples %u, accum %llu, avg %llu\n",
+		   hcd->hfnum_other_samples_a, hcd->hfnum_other_frrem_accum_a,
+		   (hcd->hfnum_other_samples_a > 0) ?
+		   hcd->hfnum_other_frrem_accum_a /
+		   hcd->hfnum_other_samples_a : 0);
+
+	DWC_PRINTF("\n");
+	DWC_PRINTF("Frame remaining at sample point B (uframe 7):\n");
+	DWC_PRINTF("  samples %u, accum %llu, avg %llu\n",
+		   hcd->hfnum_7_samples_b, hcd->hfnum_7_frrem_accum_b,
+		   (hcd->hfnum_7_samples_b > 0) ?
+		   hcd->hfnum_7_frrem_accum_b / hcd->hfnum_7_samples_b : 0);
+	DWC_PRINTF("Frame remaining at sample point B (uframe 0):\n");
+	DWC_PRINTF("  samples %u, accum %llu, avg %llu\n",
+		   hcd->hfnum_0_samples_b, hcd->hfnum_0_frrem_accum_b,
+		   (hcd->hfnum_0_samples_b > 0) ?
+		   hcd->hfnum_0_frrem_accum_b / hcd->hfnum_0_samples_b : 0);
+	DWC_PRINTF("Frame remaining at sample point B (uframe 1-6):\n");
+	DWC_PRINTF("  samples %u, accum %llu, avg %llu\n",
+		   hcd->hfnum_other_samples_b, hcd->hfnum_other_frrem_accum_b,
+		   (hcd->hfnum_other_samples_b > 0) ?
+		   hcd->hfnum_other_frrem_accum_b /
+		   hcd->hfnum_other_samples_b : 0);
+#endif
+}
+
+#endif /* DWC_DEVICE_ONLY */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_hcd_ddma.c linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_hcd_ddma.c
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_hcd_ddma.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_hcd_ddma.c	2017-09-23 03:42:50.218674452 +0800
@@ -0,0 +1,1117 @@
+/*==========================================================================
+ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_hcd_ddma.c $
+ * $Revision: #8 $
+ * $Date: 2010/11/29 $
+ * $Change: 1636033 $
+ *
+ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+ * otherwise expressly agreed to in writing between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product under
+ * any End User Software License Agreement or Agreement for Licensed Product
+ * with Synopsys or any supplement thereto. You are permitted to use and
+ * redistribute this Software in source and binary forms, with or without
+ * modification, provided that redistributions of source code must retain this
+ * notice. You may not view, use, disclose, copy or distribute this file or
+ * any information contained herein except pursuant to this license grant from
+ * Synopsys. If you do not agree with this notice, including the disclaimer
+ * below, then you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================== */
+#ifndef DWC_DEVICE_ONLY
+
+/** @file
+ * This file contains Descriptor DMA support implementation for host mode.
+ */
+
+#include "dwc_otg_hcd.h"
+#include "dwc_otg_regs.h"
+
+static inline uint8_t frame_list_idx(uint16_t frame)
+{
+	return (frame & (MAX_FRLIST_EN_NUM - 1));
+}
+
+static inline uint16_t desclist_idx_inc(uint16_t idx, uint16_t inc, uint8_t speed)
+{
+	return (idx + inc) &
+	    (((speed ==
+	       DWC_OTG_EP_SPEED_HIGH) ? MAX_DMA_DESC_NUM_HS_ISOC :
+	      MAX_DMA_DESC_NUM_GENERIC) - 1);
+}
+
+static inline uint16_t desclist_idx_dec(uint16_t idx, uint16_t inc, uint8_t speed)
+{
+	return (idx - inc) &
+	    (((speed ==
+	       DWC_OTG_EP_SPEED_HIGH) ? MAX_DMA_DESC_NUM_HS_ISOC :
+	      MAX_DMA_DESC_NUM_GENERIC) - 1);
+}
+
+static inline uint16_t max_desc_num(dwc_otg_qh_t * qh)
+{
+	return (((qh->ep_type == UE_ISOCHRONOUS)
+		 && (qh->dev_speed == DWC_OTG_EP_SPEED_HIGH))
+		? MAX_DMA_DESC_NUM_HS_ISOC : MAX_DMA_DESC_NUM_GENERIC);
+}
+static inline uint16_t frame_incr_val(dwc_otg_qh_t * qh)
+{
+	return ((qh->dev_speed == DWC_OTG_EP_SPEED_HIGH)
+		? ((qh->interval + 8 - 1) / 8)
+		: qh->interval);
+}
+
+static int desc_list_alloc(dwc_otg_qh_t * qh)
+{
+	int retval = 0;
+
+	qh->desc_list = (dwc_otg_host_dma_desc_t *)
+	    DWC_DMA_ALLOC(sizeof(dwc_otg_host_dma_desc_t) * max_desc_num(qh),
+			  &qh->desc_list_dma);
+
+	if (!qh->desc_list) {
+		retval = -DWC_E_NO_MEMORY;
+		DWC_ERROR("%s: DMA descriptor list allocation failed\n", __func__);
+		
+	}
+
+	dwc_memset(qh->desc_list, 0x00,
+		   sizeof(dwc_otg_host_dma_desc_t) * max_desc_num(qh));
+
+	qh->n_bytes =
+	    (uint32_t *) DWC_ALLOC(sizeof(uint32_t) * max_desc_num(qh));
+
+	if (!qh->n_bytes) {
+		retval = -DWC_E_NO_MEMORY;
+		DWC_ERROR
+		    ("%s: Failed to allocate array for descriptors' size actual values\n",
+		     __func__);
+
+	}
+	return retval;
+
+}
+
+static void desc_list_free(dwc_otg_qh_t * qh)
+{
+	if (qh->desc_list) {
+		DWC_DMA_FREE(max_desc_num(qh), qh->desc_list,
+			     qh->desc_list_dma);
+		qh->desc_list = NULL;
+	}
+
+	if (qh->n_bytes) {
+		DWC_FREE(qh->n_bytes);
+		qh->n_bytes = NULL;
+	}
+}
+
+static int frame_list_alloc(dwc_otg_hcd_t * hcd)
+{
+	int retval = 0;
+	if (hcd->frame_list)
+		return 0;
+
+	hcd->frame_list = DWC_DMA_ALLOC(4 * MAX_FRLIST_EN_NUM,
+					&hcd->frame_list_dma);
+	if (!hcd->frame_list) {
+		retval = -DWC_E_NO_MEMORY;
+		DWC_ERROR("%s: Frame List allocation failed\n", __func__);
+	}
+
+	dwc_memset(hcd->frame_list, 0x00, 4 * MAX_FRLIST_EN_NUM);
+
+	return retval;
+}
+
+static void frame_list_free(dwc_otg_hcd_t * hcd)
+{
+	if (!hcd->frame_list)
+		return;
+	
+	DWC_DMA_FREE(4 * MAX_FRLIST_EN_NUM, hcd->frame_list, hcd->frame_list_dma);
+	hcd->frame_list = NULL;
+}
+
+static void per_sched_enable(dwc_otg_hcd_t * hcd, uint16_t fr_list_en)
+{
+
+	hcfg_data_t hcfg;
+
+	hcfg.d32 = DWC_READ_REG32(&hcd->core_if->host_if->host_global_regs->hcfg);
+
+	if (hcfg.b.perschedena) {
+		/* already enabled */
+		return;
+	}
+
+	DWC_WRITE_REG32(&hcd->core_if->host_if->host_global_regs->hflbaddr,
+			hcd->frame_list_dma);
+
+	switch (fr_list_en) {
+	case 64:
+		hcfg.b.frlisten = 3;
+		break;
+	case 32:
+		hcfg.b.frlisten = 2;
+		break;
+	case 16:
+		hcfg.b.frlisten = 1;
+		break;
+	case 8:
+		hcfg.b.frlisten = 0;
+		break;
+	default:
+		break;
+	}
+
+	hcfg.b.perschedena = 1;
+
+	DWC_DEBUGPL(DBG_HCD, "Enabling Periodic schedule\n");
+	DWC_WRITE_REG32(&hcd->core_if->host_if->host_global_regs->hcfg, hcfg.d32);
+
+}
+
+static void per_sched_disable(dwc_otg_hcd_t * hcd)
+{
+	hcfg_data_t hcfg;
+
+	hcfg.d32 = DWC_READ_REG32(&hcd->core_if->host_if->host_global_regs->hcfg);
+	
+	if (!hcfg.b.perschedena) {
+		/* already disabled */
+		return;
+	}
+	hcfg.b.perschedena = 0;
+
+	DWC_DEBUGPL(DBG_HCD, "Disabling Periodic schedule\n");
+	DWC_WRITE_REG32(&hcd->core_if->host_if->host_global_regs->hcfg, hcfg.d32);
+}
+
+/* 
+ * Activates/Deactivates FrameList entries for the channel 
+ * based on endpoint servicing period.
+ */
+void update_frame_list(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh, uint8_t enable)
+{
+	uint16_t i, j, inc;
+	dwc_hc_t *hc = NULL;
+
+	if (!qh->channel) {
+		DWC_ERROR("qh->channel = %p", qh->channel);
+		return;
+	}
+
+	if (!hcd) {
+		DWC_ERROR("------hcd = %p", hcd);
+		return;
+	}
+
+	if (!hcd->frame_list) {
+		DWC_ERROR("-------hcd->frame_list = %p", hcd->frame_list);
+		return;
+	}
+
+	hc = qh->channel;
+	inc = frame_incr_val(qh);
+	if (qh->ep_type == UE_ISOCHRONOUS)
+		i = frame_list_idx(qh->sched_frame);
+	else
+		i = 0;
+
+	j = i;
+	do {
+		if (enable)
+			hcd->frame_list[j] |= (1 << hc->hc_num);
+		else
+			hcd->frame_list[j] &= ~(1 << hc->hc_num);
+		j = (j + inc) & (MAX_FRLIST_EN_NUM - 1);
+	}
+	while (j != i);
+	if (!enable)
+		return;
+	hc->schinfo = 0;
+	if (qh->channel->speed == DWC_OTG_EP_SPEED_HIGH) {
+		j = 1;
+		/* TODO - check this */
+		inc = (8 + qh->interval - 1) / qh->interval;
+		for (i = 0; i < inc; i++) {
+			hc->schinfo |= j;
+			j = j << qh->interval;
+		}
+	} else {
+		hc->schinfo = 0xff;
+	}
+}
+
+#if 1
+void dump_frame_list(dwc_otg_hcd_t * hcd)
+{
+	int i = 0;
+	DWC_PRINTF("--FRAME LIST (hex) --\n");
+	for (i = 0; i < MAX_FRLIST_EN_NUM; i++) {
+		DWC_PRINTF("%x\t", hcd->frame_list[i]);
+		if (!(i % 8) && i)
+			DWC_PRINTF("\n");
+	}
+	DWC_PRINTF("\n----\n");
+
+}
+#endif
+
+static void release_channel_ddma(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh)
+{
+	dwc_hc_t *hc = qh->channel;
+	if (dwc_qh_is_non_per(qh))
+		hcd->non_periodic_channels--;
+	else
+		update_frame_list(hcd, qh, 0);
+
+	/* 
+	 * The condition is added to prevent double cleanup try in case of device
+	 * disconnect. See channel cleanup in dwc_otg_hcd_disconnect_cb().
+	 */
+	if (hc->qh) {
+		dwc_otg_hc_cleanup(hcd->core_if, hc);
+		DWC_CIRCLEQ_INSERT_TAIL(&hcd->free_hc_list, hc, hc_list_entry);
+		hc->qh = NULL;
+	}
+
+	qh->channel = NULL;
+	qh->ntd = 0;
+
+	if (qh->desc_list) {
+		dwc_memset(qh->desc_list, 0x00,
+			   sizeof(dwc_otg_host_dma_desc_t) * max_desc_num(qh));
+	}
+}
+
+/** 
+ * Initializes a QH structure's Descriptor DMA related members.
+ * Allocates memory for descriptor list.
+ * On first periodic QH, allocates memory for FrameList 
+ * and enables periodic scheduling.
+ *
+ * @param hcd The HCD state structure for the DWC OTG controller.
+ * @param qh The QH to init.
+ *
+ * @return 0 if successful, negative error code otherwise.
+ */
+int dwc_otg_hcd_qh_init_ddma(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh)
+{
+	int retval = 0;
+
+	if (qh->do_split) {
+		DWC_ERROR("SPLIT Transfers are not supported in Descriptor DMA.\n");
+    		return -1;
+    	}
+
+	retval = desc_list_alloc(qh);
+
+	if ((retval == 0)
+	    && (qh->ep_type == UE_ISOCHRONOUS || qh->ep_type == UE_INTERRUPT)) {
+		if (!hcd->frame_list) {
+			retval = frame_list_alloc(hcd);
+			/* Enable periodic schedule on first periodic QH */
+			if (retval == 0)
+				per_sched_enable(hcd, MAX_FRLIST_EN_NUM);
+		}
+	}
+
+	qh->ntd = 0;
+
+	return retval;
+}
+
+/** 
+ * Frees descriptor list memory associated with the QH. 
+ * If QH is periodic and the last, frees FrameList memory 
+ * and disables periodic scheduling. 
+ *
+ * @param hcd The HCD state structure for the DWC OTG controller.
+ * @param qh The QH to init.
+ */
+void dwc_otg_hcd_qh_free_ddma(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh)
+{
+	desc_list_free(qh);
+
+	/* 
+	 * Channel still assigned due to some reasons. 
+	 * Seen on Isoc URB dequeue. Channel halted but no subsequent
+	 * ChHalted interrupt to release the channel. Afterwards
+	 * when it comes here from endpoint disable routine
+	 * channel remains assigned.
+	 */
+	if (qh->channel)
+		release_channel_ddma(hcd, qh);
+
+	if ((qh->ep_type == UE_ISOCHRONOUS || qh->ep_type == UE_INTERRUPT)
+	    && !hcd->periodic_channels && hcd->frame_list) {
+
+		per_sched_disable(hcd);
+		frame_list_free(hcd);
+	}
+}
+
+static uint8_t frame_to_desc_idx(dwc_otg_qh_t * qh, uint16_t frame_idx)
+{
+	if (qh->dev_speed == DWC_OTG_EP_SPEED_HIGH) {
+		/* 
+		 * Descriptor set(8 descriptors) index
+		 * which is 8-aligned.
+		 */
+		return (frame_idx & ((MAX_DMA_DESC_NUM_HS_ISOC / 8) - 1)) * 8;
+	} else {
+		return (frame_idx & (MAX_DMA_DESC_NUM_GENERIC - 1));
+	}
+}
+
+/* 
+ * Determine starting frame for Isochronous transfer. 
+ * Few frames skipped to prevent race condition with HC. 
+ */
+static uint8_t calc_starting_frame(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh,
+				   uint8_t * skip_frames)
+{
+	uint16_t frame = 0;
+	hcd->frame_number = dwc_otg_hcd_get_frame_number(hcd);
+	
+	/* sched_frame is always frame number(not uFrame) both in FS and HS !! */
+	
+	/* 
+	 * skip_frames is used to limit activated descriptors number
+	 * to avoid the situation when HC services the last activated
+	 * descriptor firstly.
+	 * Example for FS:
+	 * Current frame is 1, scheduled frame is 3. Since HC always fetches the descriptor
+	 * corresponding to curr_frame+1, the descriptor corresponding to frame 2
+	 * will be fetched. If the number of descriptors is max=64 (or greather) the
+	 * list will be fully programmed with Active descriptors and it is possible
+	 * case(rare) that the latest descriptor(considering rollback) corresponding
+	 * to frame 2 will be serviced first. HS case is more probable because, in fact,
+	 * up to 11 uframes(16 in the code) may be skipped.
+	 */
+	if (qh->dev_speed == DWC_OTG_EP_SPEED_HIGH) {
+		/* 
+		 * Consider uframe counter also, to start xfer asap.
+		 * If half of the frame elapsed skip 2 frames otherwise
+		 * just 1 frame. 
+		 * Starting descriptor index must be 8-aligned, so
+		 * if the current frame is near to complete the next one
+		 * is skipped as well.
+		 */
+
+		if (dwc_micro_frame_num(hcd->frame_number) >= 5) {
+			*skip_frames = 2 * 8;
+		 	frame = dwc_frame_num_inc(hcd->frame_number, *skip_frames);
+		} else {
+			*skip_frames = 1 * 8;
+			frame = dwc_frame_num_inc(hcd->frame_number, *skip_frames);
+		}
+
+		frame = dwc_full_frame_num(frame);
+	} else {
+		/* 
+		 * Two frames are skipped for FS - the current and the next.
+		 * But for descriptor programming, 1 frame(descriptor) is enough,
+		 * see example above.
+		 */
+		*skip_frames = 1;
+		frame = dwc_frame_num_inc(hcd->frame_number, 2);
+	}
+
+	return frame;
+}
+
+/* 
+ * Calculate initial descriptor index for isochronous transfer
+ * based on scheduled frame. 
+ */
+static uint8_t recalc_initial_desc_idx(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh)
+{
+	uint16_t frame = 0, fr_idx, fr_idx_tmp;
+	uint8_t skip_frames = 0;
+	/* 
+	 * With current ISOC processing algorithm the channel is being
+	 * released when no more QTDs in the list(qh->ntd == 0).
+	 * Thus this function is called only when qh->ntd == 0 and qh->channel == 0. 
+	 *
+	 * So qh->channel != NULL branch is not used and just not removed from the
+	 * source file. It is required for another possible approach which is,
+	 * do not disable and release the channel when ISOC session completed, 
+	 * just move QH to inactive schedule until new QTD arrives. 
+	 * On new QTD, the QH moved back to 'ready' schedule,
+	 * starting frame and therefore starting desc_index are recalculated.
+	 * In this case channel is released only on ep_disable.
+	 */
+
+	/* Calculate starting descriptor index. For INTERRUPT endpoint it is always 0. */
+	if (qh->channel) {
+		frame = calc_starting_frame(hcd, qh, &skip_frames);
+		/* 
+		 * Calculate initial descriptor index based on FrameList current bitmap
+		 * and servicing period.
+		 */
+		fr_idx_tmp = frame_list_idx(frame);
+		fr_idx =
+		    (MAX_FRLIST_EN_NUM + frame_list_idx(qh->sched_frame) -
+		     fr_idx_tmp)
+		    % frame_incr_val(qh);
+		fr_idx = (fr_idx + fr_idx_tmp) % MAX_FRLIST_EN_NUM;
+	} else {
+		qh->sched_frame = calc_starting_frame(hcd, qh, &skip_frames);
+		fr_idx = frame_list_idx(qh->sched_frame);
+	}
+
+	qh->td_first = qh->td_last = frame_to_desc_idx(qh, fr_idx);
+
+	return skip_frames;
+}
+
+#define	ISOC_URB_GIVEBACK_ASAP
+
+#define MAX_ISOC_XFER_SIZE_FS 1023
+#define MAX_ISOC_XFER_SIZE_HS 3072
+#define DESCNUM_THRESHOLD 4
+
+static void init_isoc_dma_desc(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh,
+			       uint8_t skip_frames)
+{
+	struct dwc_otg_hcd_iso_packet_desc *frame_desc;
+	dwc_otg_qtd_t *qtd;
+	dwc_otg_host_dma_desc_t *dma_desc;
+	uint16_t idx, inc, n_desc, ntd_max, max_xfer_size;
+
+	idx = qh->td_last;
+	inc = qh->interval;
+	n_desc = 0;
+
+	ntd_max = (max_desc_num(qh) + qh->interval - 1) / qh->interval;
+	if (skip_frames && !qh->channel)
+		ntd_max = ntd_max - skip_frames / qh->interval;
+
+	max_xfer_size =
+	    (qh->dev_speed ==
+	     DWC_OTG_EP_SPEED_HIGH) ? MAX_ISOC_XFER_SIZE_HS :
+	    MAX_ISOC_XFER_SIZE_FS;
+
+	DWC_CIRCLEQ_FOREACH(qtd, &qh->qtd_list, qtd_list_entry) {
+		while ((qh->ntd < ntd_max)
+		       && (qtd->isoc_frame_index_last <
+			   qtd->urb->packet_count)) {
+
+			dma_desc = &qh->desc_list[idx];
+			dwc_memset(dma_desc, 0x00, sizeof(dwc_otg_host_dma_desc_t));
+
+			frame_desc = &qtd->urb->iso_descs[qtd->isoc_frame_index_last];
+
+			if (frame_desc->length > max_xfer_size)
+				qh->n_bytes[idx] = max_xfer_size;
+			else
+				qh->n_bytes[idx] = frame_desc->length;
+			dma_desc->status.b_isoc.n_bytes = qh->n_bytes[idx];
+			dma_desc->status.b_isoc.a = 1;
+
+			dma_desc->buf = qtd->urb->dma + frame_desc->offset;
+
+			qh->ntd++;
+
+			qtd->isoc_frame_index_last++;
+
+#ifdef	ISOC_URB_GIVEBACK_ASAP
+			/* 
+			 * Set IOC for each descriptor corresponding to the 
+			 * last frame of the URB.
+			 */
+			if (qtd->isoc_frame_index_last ==
+			    qtd->urb->packet_count)
+				dma_desc->status.b_isoc.ioc = 1;
+
+#endif
+			idx = desclist_idx_inc(idx, inc, qh->dev_speed);
+			n_desc++;
+
+		}
+		qtd->in_process = 1;
+	}
+
+	qh->td_last = idx;
+
+#ifdef	ISOC_URB_GIVEBACK_ASAP
+	/* Set IOC for the last descriptor if descriptor list is full */
+	if (qh->ntd == ntd_max) {
+		idx = desclist_idx_dec(qh->td_last, inc, qh->dev_speed);
+		qh->desc_list[idx].status.b_isoc.ioc = 1;
+	}
+#else
+	/* 
+	 * Set IOC bit only for one descriptor. 
+	 * Always try to be ahead of HW processing,
+	 * i.e. on IOC generation driver activates next descriptors but
+	 * core continues to process descriptors followed the one with IOC set.
+	 */
+
+	if (n_desc > DESCNUM_THRESHOLD) {
+		/* 
+		 * Move IOC "up". Required even if there is only one QTD 
+		 * in the list, cause QTDs migth continue to be queued,
+		 * but during the activation it was only one queued.
+		 * Actually more than one QTD might be in the list if this function called 
+		 * from XferCompletion - QTDs was queued during HW processing of the previous
+		 * descriptor chunk.
+		 */
+		idx = dwc_desclist_idx_dec(idx, inc * ((qh->ntd + 1) / 2), qh->dev_speed);
+	} else {
+		/* 
+		 * Set the IOC for the latest descriptor
+		 * if either number of descriptor is not greather than threshold
+		 * or no more new descriptors activated.
+		 */
+		idx = dwc_desclist_idx_dec(qh->td_last, inc, qh->dev_speed);
+	}
+
+	qh->desc_list[idx].status.b_isoc.ioc = 1;
+#endif
+}
+
+static void init_non_isoc_dma_desc(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh)
+{
+
+	dwc_hc_t *hc;
+	dwc_otg_host_dma_desc_t *dma_desc;
+	dwc_otg_qtd_t *qtd;
+	int num_packets, len, n_desc = 0;
+
+	hc = qh->channel;
+
+	/* 
+	 * Start with hc->xfer_buff initialized in 
+	 * assign_and_init_hc(), then if SG transfer consists of multiple URBs,
+	 * this pointer re-assigned to the buffer of the currently processed QTD.
+	 * For non-SG request there is always one QTD active.
+	 */
+
+	DWC_CIRCLEQ_FOREACH(qtd, &qh->qtd_list, qtd_list_entry) {
+
+		if (n_desc) {
+			/* SG request - more than 1 QTDs */
+	 		hc->xfer_buff = (uint8_t *)qtd->urb->dma + qtd->urb->actual_length;
+			hc->xfer_len = qtd->urb->length - qtd->urb->actual_length;
+		}
+
+		qtd->n_desc = 0;
+
+		do {
+			dma_desc = &qh->desc_list[n_desc];
+			len = hc->xfer_len;
+
+			if (len > MAX_DMA_DESC_SIZE)
+				len = MAX_DMA_DESC_SIZE - hc->max_packet + 1;
+
+			if (hc->ep_is_in) {
+				if (len > 0) {
+					num_packets = (len + hc->max_packet - 1) / hc->max_packet;
+				} else {
+					/* Need 1 packet for transfer length of 0. */
+					num_packets = 1;
+				}
+				/* Always program an integral # of max packets for IN transfers. */
+				len = num_packets * hc->max_packet;
+			}
+
+			dma_desc->status.b.n_bytes = len;
+
+			qh->n_bytes[n_desc] = len;
+
+			if ((qh->ep_type == UE_CONTROL)
+			    && (qtd->control_phase == DWC_OTG_CONTROL_SETUP))
+				dma_desc->status.b.sup = 1;	/* Setup Packet */
+
+			dma_desc->status.b.a = 1;	/* Active descriptor */
+
+			dma_desc->buf =
+			    ((unsigned long)hc->xfer_buff & 0xffffffff);
+
+			/* 
+			 * Last descriptor(or single) of IN transfer 
+			 * with actual size less than MaxPacket.
+			 */
+			if (len > hc->xfer_len) {
+				hc->xfer_len = 0;
+			} else {
+				hc->xfer_buff += len;
+				hc->xfer_len -= len;
+			}
+
+			qtd->n_desc++;
+			n_desc++;
+		}
+		while ((hc->xfer_len > 0) && (n_desc != MAX_DMA_DESC_NUM_GENERIC));
+		
+
+		qtd->in_process = 1;
+
+		if (n_desc == MAX_DMA_DESC_NUM_GENERIC)
+			break;
+	}
+
+	if (n_desc) {
+		/* Request Transfer Complete interrupt for the last descriptor */
+		qh->desc_list[n_desc - 1].status.b.ioc = 1;
+		/* End of List indicator */
+		qh->desc_list[n_desc - 1].status.b.eol = 1;
+
+		hc->ntd = n_desc;
+	}
+}
+
+/** 
+ * For Control and Bulk endpoints initializes descriptor list
+ * and starts the transfer.
+ *
+ * For Interrupt and Isochronous endpoints initializes descriptor list
+ * then updates FrameList, marking appropriate entries as active.
+ * In case of Isochronous, the starting descriptor index is calculated based
+ * on the scheduled frame, but only on the first transfer descriptor within a session.
+ * Then starts the transfer via enabling the channel. 
+ * For Isochronous endpoint the channel is not halted on XferComplete 
+ * interrupt so remains assigned to the endpoint(QH) until session is done.
+ *
+ * @param hcd The HCD state structure for the DWC OTG controller.
+ * @param qh The QH to init.
+ *
+ * @return 0 if successful, negative error code otherwise.
+ */
+void dwc_otg_hcd_start_xfer_ddma(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh)
+{
+	/* Channel is already assigned */
+	dwc_hc_t *hc = qh->channel;
+	uint8_t skip_frames = 0;
+
+	switch (hc->ep_type) {
+	case DWC_OTG_EP_TYPE_CONTROL:
+	case DWC_OTG_EP_TYPE_BULK:
+		init_non_isoc_dma_desc(hcd, qh);
+
+		dwc_otg_hc_start_transfer_ddma(hcd->core_if, hc);
+		break;
+	case DWC_OTG_EP_TYPE_INTR:
+		init_non_isoc_dma_desc(hcd, qh);
+
+		update_frame_list(hcd, qh, 1);
+
+		dwc_otg_hc_start_transfer_ddma(hcd->core_if, hc);
+		break;
+	case DWC_OTG_EP_TYPE_ISOC:
+
+		if (!qh->ntd)
+			skip_frames = recalc_initial_desc_idx(hcd, qh);
+
+		init_isoc_dma_desc(hcd, qh, skip_frames);
+
+		if (!hc->xfer_started) {
+
+			update_frame_list(hcd, qh, 1);
+
+			/* 
+			 * Always set to max, instead of actual size.
+			 * Otherwise ntd will be changed with 
+			 * channel being enabled. Not recommended.
+			 *
+			 */
+			hc->ntd = max_desc_num(qh);
+			/* Enable channel only once for ISOC */
+			dwc_otg_hc_start_transfer_ddma(hcd->core_if, hc);
+		}
+
+		break;
+	default:
+
+		break;
+	}
+}
+
+static void complete_isoc_xfer_ddma(dwc_otg_hcd_t * hcd,
+				    dwc_hc_t * hc,
+				    dwc_otg_hc_regs_t * hc_regs,
+				    dwc_otg_halt_status_e halt_status)
+{
+	struct dwc_otg_hcd_iso_packet_desc *frame_desc;
+	dwc_otg_qtd_t *qtd, *qtd_tmp;
+	dwc_otg_qh_t *qh;
+	dwc_otg_host_dma_desc_t *dma_desc;
+	uint16_t idx, remain;
+	uint8_t urb_compl;
+
+	qh = hc->qh;
+	idx = qh->td_first;
+
+	if (hc->halt_status == DWC_OTG_HC_XFER_URB_DEQUEUE) {
+		DWC_CIRCLEQ_FOREACH_SAFE(qtd, qtd_tmp, &hc->qh->qtd_list, qtd_list_entry)
+		    qtd->in_process = 0;
+		return;
+	} else if ((halt_status == DWC_OTG_HC_XFER_AHB_ERR) ||
+		   (halt_status == DWC_OTG_HC_XFER_BABBLE_ERR)) {
+		/* 
+		 * Channel is halted in these error cases.
+		 * Considered as serious issues.
+		 * Complete all URBs marking all frames as failed, 
+		 * irrespective whether some of the descriptors(frames) succeeded or no.
+		 * Pass error code to completion routine as well, to
+		 * update urb->status, some of class drivers might use it to stop
+		 * queing transfer requests.
+		 */
+		int err = (halt_status == DWC_OTG_HC_XFER_AHB_ERR)
+		    ? (-DWC_E_IO)
+		    : (-DWC_E_OVERFLOW);
+						
+		DWC_CIRCLEQ_FOREACH_SAFE(qtd, qtd_tmp, &hc->qh->qtd_list, qtd_list_entry) {
+			for (idx = 0; idx < qtd->urb->packet_count; idx++) {
+				frame_desc = &qtd->urb->iso_descs[idx];
+				frame_desc->status = err;
+			}
+			hcd->fops->complete(hcd, qtd->urb->priv, qtd->urb, err);
+			dwc_otg_hcd_qtd_remove_and_free(hcd, qtd, qh);
+		}
+		return;
+	}
+
+	DWC_CIRCLEQ_FOREACH_SAFE(qtd, qtd_tmp, &hc->qh->qtd_list, qtd_list_entry) {
+
+		if (!qtd->in_process)
+			break;
+
+		urb_compl = 0;
+
+		do {
+
+			dma_desc = &qh->desc_list[idx];
+			
+			frame_desc = &qtd->urb->iso_descs[qtd->isoc_frame_index];
+			remain = hc->ep_is_in ? dma_desc->status.b_isoc.n_bytes : 0;
+
+			if (dma_desc->status.b_isoc.sts == DMA_DESC_STS_PKTERR) {
+				/* 
+				 * XactError or, unable to complete all the transactions 
+				 * in the scheduled micro-frame/frame, 
+				 * both indicated by DMA_DESC_STS_PKTERR.
+				 */
+				qtd->urb->error_count++;
+				frame_desc->actual_length = qh->n_bytes[idx] - remain;
+				frame_desc->status = -DWC_E_PROTOCOL;
+			} else {
+				/* Success */
+								
+				frame_desc->actual_length = qh->n_bytes[idx] - remain;
+				frame_desc->status = 0;
+			}
+
+			if (++qtd->isoc_frame_index == qtd->urb->packet_count) {
+				/*
+				 * urb->status is not used for isoc transfers here.
+				 * The individual frame_desc status are used instead.
+				 */
+
+				hcd->fops->complete(hcd, qtd->urb->priv, qtd->urb, 0);
+				dwc_otg_hcd_qtd_remove_and_free(hcd, qtd, qh);
+
+				/* 
+				 * This check is necessary because urb_dequeue can be called 
+				 * from urb complete callback(sound driver example).
+				 * All pending URBs are dequeued there, so no need for
+				 * further processing.
+				 */
+				if (hc->halt_status == DWC_OTG_HC_XFER_URB_DEQUEUE) {	
+					return;
+				}
+
+				urb_compl = 1;
+
+			}
+
+			qh->ntd--;
+
+			/* Stop if IOC requested descriptor reached */
+			if (dma_desc->status.b_isoc.ioc) {
+				idx = desclist_idx_inc(idx, qh->interval, hc->speed);	
+				goto stop_scan;
+			}
+
+			idx = desclist_idx_inc(idx, qh->interval, hc->speed);
+
+			if (urb_compl)
+				break;
+		}
+		while (idx != qh->td_first);
+	}
+stop_scan:
+	qh->td_first = idx;
+}
+
+uint8_t update_non_isoc_urb_state_ddma(dwc_otg_hcd_t * hcd,
+				       dwc_hc_t * hc,
+				       dwc_otg_qtd_t * qtd,
+				       dwc_otg_host_dma_desc_t * dma_desc,
+				       dwc_otg_halt_status_e halt_status,
+				       uint32_t n_bytes, uint8_t * xfer_done)
+{
+
+	uint16_t remain = hc->ep_is_in ? dma_desc->status.b.n_bytes : 0;
+	dwc_otg_hcd_urb_t *urb = qtd->urb;
+
+	if (halt_status == DWC_OTG_HC_XFER_AHB_ERR) {
+		urb->status = -DWC_E_IO;
+		return 1;
+	}
+	if (dma_desc->status.b.sts == DMA_DESC_STS_PKTERR) {
+		switch (halt_status) {
+		case DWC_OTG_HC_XFER_STALL:
+			urb->status = -DWC_E_PIPE;
+			break;
+		case DWC_OTG_HC_XFER_BABBLE_ERR:
+			urb->status = -DWC_E_OVERFLOW;
+			break;
+		case DWC_OTG_HC_XFER_XACT_ERR:
+			urb->status = -DWC_E_PROTOCOL;
+			break;
+		default:	
+			DWC_ERROR("%s: Unhandled descriptor error status (%d)\n", __func__,
+			  	  halt_status);
+			break;
+		}
+		return 1;
+	}
+
+	if (dma_desc->status.b.a == 1) {
+		DWC_DEBUGPL(DBG_HCDV,
+			    "Active descriptor encountered on channel %d\n",
+			    hc->hc_num);
+		return 0;
+	}
+
+	if (hc->ep_type == DWC_OTG_EP_TYPE_CONTROL) {
+		if (qtd->control_phase == DWC_OTG_CONTROL_DATA) {
+			urb->actual_length += n_bytes - remain;
+			if (remain || urb->actual_length == urb->length) {
+				/* 
+				 * For Control Data stage do not set urb->status=0 to prevent
+				 * URB callback. Set it when Status phase done. See below.
+				 */
+				*xfer_done = 1;
+			}
+
+		} else if (qtd->control_phase == DWC_OTG_CONTROL_STATUS) {
+			urb->status = 0;
+			*xfer_done = 1;
+		}
+		/* No handling for SETUP stage */
+	} else {
+		/* BULK and INTR */
+		urb->actual_length += n_bytes - remain;
+		if (remain || urb->actual_length == urb->length) {
+			urb->status = 0;
+			*xfer_done = 1;
+		}
+	}
+
+	return 0;
+}
+
+static void complete_non_isoc_xfer_ddma(dwc_otg_hcd_t * hcd,
+					dwc_hc_t * hc,
+					dwc_otg_hc_regs_t * hc_regs,
+					dwc_otg_halt_status_e halt_status)
+{
+	dwc_otg_hcd_urb_t *urb = NULL;
+	dwc_otg_qtd_t *qtd, *qtd_tmp;
+	dwc_otg_qh_t *qh;
+	dwc_otg_host_dma_desc_t *dma_desc;
+	uint32_t n_bytes, n_desc, i;
+	uint8_t failed = 0, xfer_done;
+
+	n_desc = 0;
+
+	qh = hc->qh;
+
+	if (hc->halt_status == DWC_OTG_HC_XFER_URB_DEQUEUE) {
+		DWC_CIRCLEQ_FOREACH_SAFE(qtd, qtd_tmp, &hc->qh->qtd_list, qtd_list_entry) {
+			qtd->in_process = 0;
+		}
+		return;
+	}
+
+	DWC_CIRCLEQ_FOREACH_SAFE(qtd, qtd_tmp, &qh->qtd_list, qtd_list_entry) {
+
+		urb = qtd->urb;
+
+		n_bytes = 0;
+		xfer_done = 0;
+
+		for (i = 0; i < qtd->n_desc; i++) {
+			dma_desc = &qh->desc_list[n_desc];
+
+			n_bytes = qh->n_bytes[n_desc];
+
+			failed =
+			    update_non_isoc_urb_state_ddma(hcd, hc, qtd,
+							   dma_desc,
+							   halt_status, n_bytes,
+							   &xfer_done);
+
+			if (failed
+			    || (xfer_done
+				&& (urb->status != -DWC_E_IN_PROGRESS))) {
+
+				hcd->fops->complete(hcd, urb->priv, urb,
+						    urb->status);
+				dwc_otg_hcd_qtd_remove_and_free(hcd, qtd, qh);
+
+				if (failed)
+					goto stop_scan;
+			} else if (qh->ep_type == UE_CONTROL) {
+				if (qtd->control_phase == DWC_OTG_CONTROL_SETUP) {
+					if (urb->length > 0) {
+						qtd->control_phase = DWC_OTG_CONTROL_DATA;
+					} else {
+						qtd->control_phase = DWC_OTG_CONTROL_STATUS;
+					}
+					DWC_DEBUGPL(DBG_HCDV, "  Control setup transaction done\n");
+				} else if (qtd->control_phase == DWC_OTG_CONTROL_DATA) {
+					if (xfer_done) {
+						qtd->control_phase = DWC_OTG_CONTROL_STATUS;
+						DWC_DEBUGPL(DBG_HCDV, "  Control data transfer done\n");
+					} else if (i + 1 == qtd->n_desc) {
+						/* 
+						 * Last descriptor for Control data stage which is
+						 * not completed yet.
+						 */
+						dwc_otg_hcd_save_data_toggle(hc, hc_regs, qtd);
+					}
+				}
+			}
+
+			n_desc++;
+		}
+
+	}
+
+stop_scan:
+
+	if (qh->ep_type != UE_CONTROL) {
+		/* 
+		 * Resetting the data toggle for bulk
+		 * and interrupt endpoints in case of stall. See handle_hc_stall_intr() 
+		 */
+		if (halt_status == DWC_OTG_HC_XFER_STALL)
+			qh->data_toggle = DWC_OTG_HC_PID_DATA0;
+		else
+			dwc_otg_hcd_save_data_toggle(hc, hc_regs, qtd);
+	}
+
+	if (halt_status == DWC_OTG_HC_XFER_COMPLETE) {
+		hcint_data_t hcint;
+		hcint.d32 = DWC_READ_REG32(&hc_regs->hcint);
+		if (hcint.b.nyet) {
+			/*
+			 * Got a NYET on the last transaction of the transfer. It
+			 * means that the endpoint should be in the PING state at the
+			 * beginning of the next transfer.
+			 */
+			qh->ping_state = 1;
+			clear_hc_int(hc_regs, nyet);
+		}
+
+	}
+
+}
+
+/**
+ * This function is called from interrupt handlers.
+ * Scans the descriptor list, updates URB's status and
+ * calls completion routine for the URB if it's done.
+ * Releases the channel to be used by other transfers.
+ * In case of Isochronous endpoint the channel is not halted until 
+ * the end of the session, i.e. QTD list is empty.
+ * If periodic channel released the FrameList is updated accordingly.
+ *
+ * Calls transaction selection routines to activate pending transfers.
+ *
+ * @param hcd The HCD state structure for the DWC OTG controller.
+ * @param hc Host channel, the transfer is completed on.
+ * @param hc_regs Host channel registers.
+ * @param halt_status Reason the channel is being halted, 
+ *		      or just XferComplete for isochronous transfer
+ */
+void dwc_otg_hcd_complete_xfer_ddma(dwc_otg_hcd_t * hcd,
+				    dwc_hc_t * hc,
+				    dwc_otg_hc_regs_t * hc_regs,
+				    dwc_otg_halt_status_e halt_status)
+{
+	uint8_t continue_isoc_xfer = 0;
+	dwc_otg_transaction_type_e tr_type;
+	dwc_otg_qh_t *qh = hc->qh;
+
+	if (hc->ep_type == DWC_OTG_EP_TYPE_ISOC) {
+
+		complete_isoc_xfer_ddma(hcd, hc, hc_regs, halt_status);
+
+		/* Release the channel if halted or session completed */
+		if (halt_status != DWC_OTG_HC_XFER_COMPLETE ||
+		    DWC_CIRCLEQ_EMPTY(&qh->qtd_list)) {
+
+			/* Halt the channel if session completed */
+			if (halt_status == DWC_OTG_HC_XFER_COMPLETE) {
+				dwc_otg_hc_halt(hcd->core_if, hc, halt_status);
+			}
+
+			release_channel_ddma(hcd, qh);
+			dwc_otg_hcd_qh_remove(hcd, qh);
+		} else {
+			/* Keep in assigned schedule to continue transfer */
+			DWC_LIST_MOVE_HEAD(&hcd->periodic_sched_assigned,
+					   &qh->qh_list_entry);
+			continue_isoc_xfer = 1;
+
+		}
+		/** @todo Consider the case when period exceeds FrameList size.
+		 *  Frame Rollover interrupt should be used. 
+		 */
+	} else {
+		/* Scan descriptor list to complete the URB(s), then release the channel */
+		complete_non_isoc_xfer_ddma(hcd, hc, hc_regs, halt_status);
+
+		release_channel_ddma(hcd, qh);
+		dwc_otg_hcd_qh_remove(hcd, qh);
+
+		if (!DWC_CIRCLEQ_EMPTY(&qh->qtd_list)) {
+			/* Add back to inactive non-periodic schedule on normal completion */
+			dwc_otg_hcd_qh_add(hcd, qh);
+		}
+
+	}
+	tr_type = dwc_otg_hcd_select_transactions(hcd);
+	if (tr_type != DWC_OTG_TRANSACTION_NONE || continue_isoc_xfer) {
+		if (continue_isoc_xfer) {
+			if (tr_type == DWC_OTG_TRANSACTION_NONE) {
+				tr_type = DWC_OTG_TRANSACTION_PERIODIC;
+			} else if (tr_type == DWC_OTG_TRANSACTION_NON_PERIODIC) {
+				tr_type = DWC_OTG_TRANSACTION_ALL;
+			}
+		}
+		dwc_otg_hcd_queue_transactions(hcd, tr_type);
+	}
+}
+
+#endif /* DWC_DEVICE_ONLY */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_hcd.h linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_hcd.h
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_hcd.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_hcd.h	2017-09-23 03:42:50.218674452 +0800
@@ -0,0 +1,798 @@
+/* ==========================================================================
+ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_hcd.h $
+ * $Revision: #57 $
+ * $Date: 2010/11/29 $
+ * $Change: 1636033 $
+ *
+ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+ * otherwise expressly agreed to in writing between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product under
+ * any End User Software License Agreement or Agreement for Licensed Product
+ * with Synopsys or any supplement thereto. You are permitted to use and
+ * redistribute this Software in source and binary forms, with or without
+ * modification, provided that redistributions of source code must retain this
+ * notice. You may not view, use, disclose, copy or distribute this file or
+ * any information contained herein except pursuant to this license grant from
+ * Synopsys. If you do not agree with this notice, including the disclaimer
+ * below, then you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================== */
+#ifndef DWC_DEVICE_ONLY
+#ifndef __DWC_HCD_H__
+#define __DWC_HCD_H__
+
+#include "dwc_otg_os_dep.h"
+#include "usb.h"
+#include "dwc_otg_hcd_if.h"
+#include "dwc_otg_core_if.h"
+#include "dwc_list.h"
+#include "dwc_otg_cil.h"
+
+/**
+ * @file
+ *
+ * This file contains the structures, constants, and interfaces for
+ * the Host Contoller Driver (HCD).
+ *
+ * The Host Controller Driver (HCD) is responsible for translating requests
+ * from the USB Driver into the appropriate actions on the DWC_otg controller.
+ * It isolates the USBD from the specifics of the controller by providing an
+ * API to the USBD.
+ */
+
+struct dwc_otg_hcd_pipe_info {
+	uint8_t dev_addr;
+	uint8_t ep_num;
+	uint8_t pipe_type;
+	uint8_t pipe_dir;
+	uint16_t mps;
+};
+
+struct dwc_otg_hcd_iso_packet_desc {
+	uint32_t offset;
+	uint32_t length;
+	uint32_t actual_length;
+	uint32_t status;
+};
+
+struct dwc_otg_qtd;
+
+struct dwc_otg_hcd_urb {
+	void *priv;
+	struct dwc_otg_qtd *qtd;
+	void *buf;
+	dwc_dma_t dma;
+	void *setup_packet;
+	dwc_dma_t setup_dma;
+	uint32_t length;
+	uint32_t actual_length;
+	uint32_t status;
+	uint32_t error_count;
+	uint32_t packet_count;
+	uint32_t flags;
+	uint16_t interval;
+	struct dwc_otg_hcd_pipe_info pipe_info;
+	struct dwc_otg_hcd_iso_packet_desc iso_descs[0];
+};
+
+static inline uint8_t dwc_otg_hcd_get_ep_num(struct dwc_otg_hcd_pipe_info *pipe)
+{
+	return pipe->ep_num;
+}
+
+static inline uint8_t dwc_otg_hcd_get_pipe_type(struct dwc_otg_hcd_pipe_info
+						*pipe)
+{
+	return pipe->pipe_type;
+}
+
+static inline uint16_t dwc_otg_hcd_get_mps(struct dwc_otg_hcd_pipe_info *pipe)
+{
+	return pipe->mps;
+}
+
+static inline uint8_t dwc_otg_hcd_get_dev_addr(struct dwc_otg_hcd_pipe_info
+					       *pipe)
+{
+	return pipe->dev_addr;
+}
+
+static inline uint8_t dwc_otg_hcd_is_pipe_isoc(struct dwc_otg_hcd_pipe_info
+					       *pipe)
+{
+	return (pipe->pipe_type == UE_ISOCHRONOUS);
+}
+
+static inline uint8_t dwc_otg_hcd_is_pipe_int(struct dwc_otg_hcd_pipe_info
+					      *pipe)
+{
+	return (pipe->pipe_type == UE_INTERRUPT);
+}
+
+static inline uint8_t dwc_otg_hcd_is_pipe_bulk(struct dwc_otg_hcd_pipe_info
+					       *pipe)
+{
+	return (pipe->pipe_type == UE_BULK);
+}
+
+static inline uint8_t dwc_otg_hcd_is_pipe_control(struct dwc_otg_hcd_pipe_info
+						  *pipe)
+{
+	return (pipe->pipe_type == UE_CONTROL);
+}
+
+static inline uint8_t dwc_otg_hcd_is_pipe_in(struct dwc_otg_hcd_pipe_info *pipe)
+{
+	return (pipe->pipe_dir == UE_DIR_IN);
+}
+
+static inline uint8_t dwc_otg_hcd_is_pipe_out(struct dwc_otg_hcd_pipe_info
+					      *pipe)
+{
+	return (!dwc_otg_hcd_is_pipe_in(pipe));
+}
+
+static inline void dwc_otg_hcd_fill_pipe(struct dwc_otg_hcd_pipe_info *pipe,
+					 uint8_t devaddr, uint8_t ep_num,
+					 uint8_t pipe_type, uint8_t pipe_dir,
+					 uint16_t mps)
+{
+	pipe->dev_addr = devaddr;
+	pipe->ep_num = ep_num;
+	pipe->pipe_type = pipe_type;
+	pipe->pipe_dir = pipe_dir;
+	pipe->mps = mps;
+}
+
+/**
+ * Phases for control transfers.
+ */
+typedef enum dwc_otg_control_phase {
+	DWC_OTG_CONTROL_SETUP,
+	DWC_OTG_CONTROL_DATA,
+	DWC_OTG_CONTROL_STATUS
+} dwc_otg_control_phase_e;
+
+/** Transaction types. */
+typedef enum dwc_otg_transaction_type {
+	DWC_OTG_TRANSACTION_NONE,
+	DWC_OTG_TRANSACTION_PERIODIC,
+	DWC_OTG_TRANSACTION_NON_PERIODIC,
+	DWC_OTG_TRANSACTION_ALL
+} dwc_otg_transaction_type_e;
+
+struct dwc_otg_qh;
+
+/**
+ * A Queue Transfer Descriptor (QTD) holds the state of a bulk, control,
+ * interrupt, or isochronous transfer. A single QTD is created for each URB
+ * (of one of these types) submitted to the HCD. The transfer associated with
+ * a QTD may require one or multiple transactions.
+ *
+ * A QTD is linked to a Queue Head, which is entered in either the
+ * non-periodic or periodic schedule for execution. When a QTD is chosen for
+ * execution, some or all of its transactions may be executed. After
+ * execution, the state of the QTD is updated. The QTD may be retired if all
+ * its transactions are complete or if an error occurred. Otherwise, it
+ * remains in the schedule so more transactions can be executed later.
+ */
+typedef struct dwc_otg_qtd {
+	/**
+	 * Determines the PID of the next data packet for the data phase of
+	 * control transfers. Ignored for other transfer types.<br>
+	 * One of the following values:
+	 *	- DWC_OTG_HC_PID_DATA0
+	 *	- DWC_OTG_HC_PID_DATA1
+	 */
+	uint8_t data_toggle;
+
+	/** Current phase for control transfers (Setup, Data, or Status). */
+	dwc_otg_control_phase_e control_phase;
+
+	/** Keep track of the current split type
+	 * for FS/LS endpoints on a HS Hub */
+	uint8_t complete_split;
+
+	/** How many bytes transferred during SSPLIT OUT */
+	uint32_t ssplit_out_xfer_count;
+
+	/**
+	 * Holds the number of bus errors that have occurred for a transaction
+	 * within this transfer.
+	 */
+	uint8_t error_count;
+
+	/**
+	 * Index of the next frame descriptor for an isochronous transfer. A
+	 * frame descriptor describes the buffer position and length of the
+	 * data to be transferred in the next scheduled (micro)frame of an
+	 * isochronous transfer. It also holds status for that transaction.
+	 * The frame index starts at 0.
+	 */
+	uint16_t isoc_frame_index;
+
+	/** Position of the ISOC split on full/low speed */
+	uint8_t isoc_split_pos;
+
+	/** Position of the ISOC split in the buffer for the current frame */
+	uint16_t isoc_split_offset;
+
+	/** URB for this transfer */
+	struct dwc_otg_hcd_urb *urb;
+
+	struct dwc_otg_qh *qh;
+
+	/** This list of QTDs */
+	 DWC_CIRCLEQ_ENTRY(dwc_otg_qtd) qtd_list_entry;
+
+	/** Indicates if this QTD is currently processed by HW. */
+	uint8_t in_process;
+
+	/** Number of DMA descriptors for this QTD */
+	uint8_t n_desc;
+
+	/** 
+	 * Last activated frame(packet) index. 
+	 * Used in Descriptor DMA mode only.
+	 */
+	uint16_t isoc_frame_index_last;
+
+} dwc_otg_qtd_t;
+
+DWC_CIRCLEQ_HEAD(dwc_otg_qtd_list, dwc_otg_qtd);
+
+/**
+ * A Queue Head (QH) holds the static characteristics of an endpoint and
+ * maintains a list of transfers (QTDs) for that endpoint. A QH structure may
+ * be entered in either the non-periodic or periodic schedule.
+ */
+typedef struct dwc_otg_qh {
+	/**
+	 * Endpoint type.
+	 * One of the following values:
+	 *	- UE_CONTROL
+	 *	- UE_BULK
+	 *	- UE_INTERRUPT
+	 *	- UE_ISOCHRONOUS
+	 */
+	uint8_t ep_type;
+	uint8_t ep_is_in;
+
+	/** wMaxPacketSize Field of Endpoint Descriptor. */
+	uint16_t maxp;
+
+	/**
+	 * Device speed.
+	 * One of the following values:
+	 *	- DWC_OTG_EP_SPEED_LOW
+	 *	- DWC_OTG_EP_SPEED_FULL
+	 *	- DWC_OTG_EP_SPEED_HIGH
+	 */
+	uint8_t dev_speed;
+
+	/**
+	 * Determines the PID of the next data packet for non-control
+	 * transfers. Ignored for control transfers.<br>
+	 * One of the following values:
+	 *	- DWC_OTG_HC_PID_DATA0
+	 *	- DWC_OTG_HC_PID_DATA1
+	 */
+	uint8_t data_toggle;
+
+	/** Ping state if 1. */
+	uint8_t ping_state;
+
+	/**
+	 * List of QTDs for this QH.
+	 */
+	struct dwc_otg_qtd_list qtd_list;
+
+	/** Host channel currently processing transfers for this QH. */
+	struct dwc_hc *channel;
+
+	/** Full/low speed endpoint on high-speed hub requires split. */
+	uint8_t do_split;
+
+	/** @name Periodic schedule information */
+	/** @{ */
+
+	/** Bandwidth in microseconds per (micro)frame. */
+	uint16_t usecs;
+
+	/** Interval between transfers in (micro)frames. */
+	uint16_t interval;
+
+	/**
+	 * (micro)frame to initialize a periodic transfer. The transfer
+	 * executes in the following (micro)frame.
+	 */
+	uint16_t sched_frame;
+
+	/** (micro)frame at which last start split was initialized. */
+	uint16_t start_split_frame;
+
+	/** @} */
+
+	/** 
+	 * Used instead of original buffer if 
+	 * it(physical address) is not dword-aligned.
+	 */
+	uint8_t *dw_align_buf;
+	dwc_dma_t dw_align_buf_dma;
+
+	/** Entry for QH in either the periodic or non-periodic schedule. */
+	dwc_list_link_t qh_list_entry;
+
+	/** @name Descriptor DMA support */
+	/** @{ */
+
+	/** Descriptor List. */
+	dwc_otg_host_dma_desc_t *desc_list;
+
+	/** Descriptor List physical address. */
+	dwc_dma_t desc_list_dma;
+
+	/** 
+	 * Xfer Bytes array.
+	 * Each element corresponds to a descriptor and indicates 
+	 * original XferSize size value for the descriptor.
+	 */
+	uint32_t *n_bytes;
+
+	/** Actual number of transfer descriptors in a list. */
+	uint16_t ntd;
+
+	/** First activated isochronous transfer descriptor index. */
+	uint8_t td_first;
+	/** Last activated isochronous transfer descriptor index. */
+	uint8_t td_last;
+
+	/** @} */
+
+} dwc_otg_qh_t;
+
+DWC_CIRCLEQ_HEAD(hc_list, dwc_hc);
+
+/**
+ * This structure holds the state of the HCD, including the non-periodic and
+ * periodic schedules.
+ */
+struct dwc_otg_hcd {
+	/** The DWC otg device pointer */
+	struct dwc_otg_device *otg_dev;
+	/** DWC OTG Core Interface Layer */
+	dwc_otg_core_if_t *core_if;
+
+	/** Function HCD driver callbacks */
+	struct dwc_otg_hcd_function_ops *fops;
+
+	/** Internal DWC HCD Flags */
+	volatile union dwc_otg_hcd_internal_flags {
+		uint32_t d32;
+		struct {
+			unsigned port_connect_status_change:1;
+			unsigned port_connect_status:1;
+			unsigned port_reset_change:1;
+			unsigned port_enable_change:1;
+			unsigned port_suspend_change:1;
+			unsigned port_over_current_change:1;
+			unsigned port_l1_change:1;
+			unsigned reserved:26;
+		} b;
+	} flags;
+
+	/**
+	 * Inactive items in the non-periodic schedule. This is a list of
+	 * Queue Heads. Transfers associated with these Queue Heads are not
+	 * currently assigned to a host channel.
+	 */
+	dwc_list_link_t non_periodic_sched_inactive;
+
+	/**
+	 * Active items in the non-periodic schedule. This is a list of
+	 * Queue Heads. Transfers associated with these Queue Heads are
+	 * currently assigned to a host channel.
+	 */
+	dwc_list_link_t non_periodic_sched_active;
+
+	/**
+	 * Pointer to the next Queue Head to process in the active
+	 * non-periodic schedule.
+	 */
+	dwc_list_link_t *non_periodic_qh_ptr;
+
+	/**
+	 * Inactive items in the periodic schedule. This is a list of QHs for
+	 * periodic transfers that are _not_ scheduled for the next frame.
+	 * Each QH in the list has an interval counter that determines when it
+	 * needs to be scheduled for execution. This scheduling mechanism
+	 * allows only a simple calculation for periodic bandwidth used (i.e.
+	 * must assume that all periodic transfers may need to execute in the
+	 * same frame). However, it greatly simplifies scheduling and should
+	 * be sufficient for the vast majority of OTG hosts, which need to
+	 * connect to a small number of peripherals at one time.
+	 *
+	 * Items move from this list to periodic_sched_ready when the QH
+	 * interval counter is 0 at SOF.
+	 */
+	dwc_list_link_t periodic_sched_inactive;
+
+	/**
+	 * List of periodic QHs that are ready for execution in the next
+	 * frame, but have not yet been assigned to host channels.
+	 *
+	 * Items move from this list to periodic_sched_assigned as host
+	 * channels become available during the current frame.
+	 */
+	dwc_list_link_t periodic_sched_ready;
+
+	/**
+	 * List of periodic QHs to be executed in the next frame that are
+	 * assigned to host channels.
+	 *
+	 * Items move from this list to periodic_sched_queued as the
+	 * transactions for the QH are queued to the DWC_otg controller.
+	 */
+	dwc_list_link_t periodic_sched_assigned;
+
+	/**
+	 * List of periodic QHs that have been queued for execution.
+	 *
+	 * Items move from this list to either periodic_sched_inactive or
+	 * periodic_sched_ready when the channel associated with the transfer
+	 * is released. If the interval for the QH is 1, the item moves to
+	 * periodic_sched_ready because it must be rescheduled for the next
+	 * frame. Otherwise, the item moves to periodic_sched_inactive.
+	 */
+	dwc_list_link_t periodic_sched_queued;
+
+	/**
+	 * Total bandwidth claimed so far for periodic transfers. This value
+	 * is in microseconds per (micro)frame. The assumption is that all
+	 * periodic transfers may occur in the same (micro)frame.
+	 */
+	uint16_t periodic_usecs;
+
+	/**
+	 * Frame number read from the core at SOF. The value ranges from 0 to
+	 * DWC_HFNUM_MAX_FRNUM.
+	 */
+	uint16_t frame_number;
+
+	/**
+	 * Free host channels in the controller. This is a list of
+	 * dwc_hc_t items.
+	 */
+	struct hc_list free_hc_list;
+	/**
+	 * Number of host channels assigned to periodic transfers. Currently
+	 * assuming that there is a dedicated host channel for each periodic
+	 * transaction and at least one host channel available for
+	 * non-periodic transactions.
+	 */
+	int periodic_channels;
+
+	/**
+	 * Number of host channels assigned to non-periodic transfers.
+	 */
+	int non_periodic_channels;
+
+	/**
+	 * Array of pointers to the host channel descriptors. Allows accessing
+	 * a host channel descriptor given the host channel number. This is
+	 * useful in interrupt handlers.
+	 */
+	struct dwc_hc *hc_ptr_array[MAX_EPS_CHANNELS];
+
+	/**
+	 * Buffer to use for any data received during the status phase of a
+	 * control transfer. Normally no data is transferred during the status
+	 * phase. This buffer is used as a bit bucket.
+	 */
+	uint8_t *status_buf;
+
+	/**
+	 * DMA address for status_buf.
+	 */
+	dma_addr_t status_buf_dma;
+#define DWC_OTG_HCD_STATUS_BUF_SIZE 64
+
+	/**
+	 * Connection timer. An OTG host must display a message if the device
+	 * does not connect. Started when the VBus power is turned on via
+	 * sysfs attribute "buspower".
+	 */
+	dwc_timer_t *conn_timer;
+
+	/* Tasket to do a reset */
+	dwc_tasklet_t *reset_tasklet;
+
+	/*  */
+	dwc_spinlock_t *lock;
+
+	/**
+	 * Private data that could be used by OS wrapper.
+	 */
+	void *priv;
+
+	uint8_t otg_port;
+
+	/** Frame List */
+	uint32_t *frame_list;
+
+	/** Frame List DMA address */
+	dma_addr_t frame_list_dma;
+
+#ifdef DEBUG
+	uint32_t frrem_samples;
+	uint64_t frrem_accum;
+
+	uint32_t hfnum_7_samples_a;
+	uint64_t hfnum_7_frrem_accum_a;
+	uint32_t hfnum_0_samples_a;
+	uint64_t hfnum_0_frrem_accum_a;
+	uint32_t hfnum_other_samples_a;
+	uint64_t hfnum_other_frrem_accum_a;
+
+	uint32_t hfnum_7_samples_b;
+	uint64_t hfnum_7_frrem_accum_b;
+	uint32_t hfnum_0_samples_b;
+	uint64_t hfnum_0_frrem_accum_b;
+	uint32_t hfnum_other_samples_b;
+	uint64_t hfnum_other_frrem_accum_b;
+#endif
+};
+
+/** @name Transaction Execution Functions */
+/** @{ */
+extern dwc_otg_transaction_type_e dwc_otg_hcd_select_transactions(dwc_otg_hcd_t
+								  * hcd);
+extern void dwc_otg_hcd_queue_transactions(dwc_otg_hcd_t * hcd,
+					   dwc_otg_transaction_type_e tr_type);
+
+/** @} */
+
+/** @name Interrupt Handler Functions */
+/** @{ */
+extern int32_t dwc_otg_hcd_handle_intr(dwc_otg_hcd_t * dwc_otg_hcd);
+extern int32_t dwc_otg_hcd_handle_sof_intr(dwc_otg_hcd_t * dwc_otg_hcd);
+extern int32_t dwc_otg_hcd_handle_rx_status_q_level_intr(dwc_otg_hcd_t *
+							 dwc_otg_hcd);
+extern int32_t dwc_otg_hcd_handle_np_tx_fifo_empty_intr(dwc_otg_hcd_t *
+							dwc_otg_hcd);
+extern int32_t dwc_otg_hcd_handle_perio_tx_fifo_empty_intr(dwc_otg_hcd_t *
+							   dwc_otg_hcd);
+extern int32_t dwc_otg_hcd_handle_incomplete_periodic_intr(dwc_otg_hcd_t *
+							   dwc_otg_hcd);
+extern int32_t dwc_otg_hcd_handle_port_intr(dwc_otg_hcd_t * dwc_otg_hcd);
+extern int32_t dwc_otg_hcd_handle_conn_id_status_change_intr(dwc_otg_hcd_t *
+							     dwc_otg_hcd);
+extern int32_t dwc_otg_hcd_handle_disconnect_intr(dwc_otg_hcd_t * dwc_otg_hcd);
+extern int32_t dwc_otg_hcd_handle_hc_intr(dwc_otg_hcd_t * dwc_otg_hcd);
+extern int32_t dwc_otg_hcd_handle_hc_n_intr(dwc_otg_hcd_t * dwc_otg_hcd,
+					    uint32_t num);
+extern int32_t dwc_otg_hcd_handle_session_req_intr(dwc_otg_hcd_t * dwc_otg_hcd);
+extern int32_t dwc_otg_hcd_handle_wakeup_detected_intr(dwc_otg_hcd_t *
+						       dwc_otg_hcd);
+/** @} */
+
+/** @name Schedule Queue Functions */
+/** @{ */
+
+/* Implemented in dwc_otg_hcd_queue.c */
+extern dwc_otg_qh_t *dwc_otg_hcd_qh_create(dwc_otg_hcd_t * hcd,
+					   dwc_otg_hcd_urb_t * urb, int atomic_alloc);
+extern void dwc_otg_hcd_qh_free(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh);
+extern int dwc_otg_hcd_qh_add(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh);
+extern void dwc_otg_hcd_qh_remove(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh);
+extern void dwc_otg_hcd_qh_deactivate(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh,
+				      int sched_csplit);
+
+/** Remove and free a QH */
+static inline void dwc_otg_hcd_qh_remove_and_free(dwc_otg_hcd_t * hcd,
+						  dwc_otg_qh_t * qh)
+{
+	dwc_irqflags_t flags;
+	DWC_SPINLOCK_IRQSAVE(hcd->lock, &flags);
+	dwc_otg_hcd_qh_remove(hcd, qh);
+	DWC_SPINUNLOCK_IRQRESTORE(hcd->lock, flags);
+	dwc_otg_hcd_qh_free(hcd, qh);
+}
+
+/** Allocates memory for a QH structure.
+ * @return Returns the memory allocate or NULL on error. */
+static inline dwc_otg_qh_t *dwc_otg_hcd_qh_alloc(int atomic_alloc)
+{
+	if (atomic_alloc)
+		return (dwc_otg_qh_t *) DWC_ALLOC_ATOMIC(sizeof(dwc_otg_qh_t));
+	else
+		return (dwc_otg_qh_t *) DWC_ALLOC(sizeof(dwc_otg_qh_t));
+}
+
+extern dwc_otg_qtd_t *dwc_otg_hcd_qtd_create(dwc_otg_hcd_urb_t * urb,
+					     int atomic_alloc);
+extern void dwc_otg_hcd_qtd_init(dwc_otg_qtd_t * qtd, dwc_otg_hcd_urb_t * urb);
+extern int dwc_otg_hcd_qtd_add(dwc_otg_qtd_t * qtd, dwc_otg_hcd_t * dwc_otg_hcd,
+			       dwc_otg_qh_t ** qh, int atomic_alloc);
+
+/** Allocates memory for a QTD structure.
+ * @return Returns the memory allocate or NULL on error. */
+static inline dwc_otg_qtd_t *dwc_otg_hcd_qtd_alloc(int atomic_alloc)
+{
+	if (atomic_alloc)
+		return (dwc_otg_qtd_t *) DWC_ALLOC_ATOMIC(sizeof(dwc_otg_qtd_t));
+	else
+		return (dwc_otg_qtd_t *) DWC_ALLOC(sizeof(dwc_otg_qtd_t));
+}
+
+/** Frees the memory for a QTD structure.  QTD should already be removed from
+ * list.
+ * @param qtd QTD to free.*/
+static inline void dwc_otg_hcd_qtd_free(dwc_otg_qtd_t * qtd)
+{
+	DWC_FREE(qtd);
+}
+
+/** Removes a QTD from list.
+ * @param hcd HCD instance.
+ * @param qtd QTD to remove from list.
+ * @param qh QTD belongs to.
+ */
+static inline void dwc_otg_hcd_qtd_remove(dwc_otg_hcd_t * hcd,
+					  dwc_otg_qtd_t * qtd,
+					  dwc_otg_qh_t * qh)
+{
+	DWC_CIRCLEQ_REMOVE(&qh->qtd_list, qtd, qtd_list_entry);
+}
+
+/** Remove and free a QTD 
+  * Need to disable IRQ and hold hcd lock while calling this function out of 
+  * interrupt servicing chain */
+static inline void dwc_otg_hcd_qtd_remove_and_free(dwc_otg_hcd_t * hcd,
+						   dwc_otg_qtd_t * qtd,
+						   dwc_otg_qh_t * qh)
+{
+	dwc_otg_hcd_qtd_remove(hcd, qtd, qh);
+	dwc_otg_hcd_qtd_free(qtd);
+}
+
+/** @} */
+
+/** @name Descriptor DMA Supporting Functions */
+/** @{ */
+
+extern void dwc_otg_hcd_start_xfer_ddma(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh);
+extern void dwc_otg_hcd_complete_xfer_ddma(dwc_otg_hcd_t * hcd,
+					   dwc_hc_t * hc,
+					   dwc_otg_hc_regs_t * hc_regs,
+					   dwc_otg_halt_status_e halt_status);
+
+extern int dwc_otg_hcd_qh_init_ddma(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh);
+extern void dwc_otg_hcd_qh_free_ddma(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh);
+
+/** @} */
+
+/** @name Internal Functions */
+/** @{ */
+dwc_otg_qh_t *dwc_urb_to_qh(dwc_otg_hcd_urb_t * urb);
+/** @} */
+
+#ifdef CONFIG_USB_DWC_OTG_LPM
+extern int dwc_otg_hcd_get_hc_for_lpm_tran(dwc_otg_hcd_t * hcd,
+					   uint8_t devaddr);
+extern void dwc_otg_hcd_free_hc_from_lpm(dwc_otg_hcd_t * hcd);
+#endif
+
+/** Gets the QH that contains the list_head */
+#define dwc_list_to_qh(_list_head_ptr_) container_of(_list_head_ptr_, dwc_otg_qh_t, qh_list_entry)
+
+/** Gets the QTD that contains the list_head */
+#define dwc_list_to_qtd(_list_head_ptr_) container_of(_list_head_ptr_, dwc_otg_qtd_t, qtd_list_entry)
+
+/** Check if QH is non-periodic  */
+#define dwc_qh_is_non_per(_qh_ptr_) ((_qh_ptr_->ep_type == UE_BULK) || \
+				     (_qh_ptr_->ep_type == UE_CONTROL))
+
+/** High bandwidth multiplier as encoded in highspeed endpoint descriptors */
+#define dwc_hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
+
+/** Packet size for any kind of endpoint descriptor */
+#define dwc_max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
+
+/**
+ * Returns true if _frame1 is less than or equal to _frame2. The comparison is
+ * done modulo DWC_HFNUM_MAX_FRNUM. This accounts for the rollover of the
+ * frame number when the max frame number is reached.
+ */
+static inline int dwc_frame_num_le(uint16_t frame1, uint16_t frame2)
+{
+	return ((frame2 - frame1) & DWC_HFNUM_MAX_FRNUM) <=
+	    (DWC_HFNUM_MAX_FRNUM >> 1);
+}
+
+/**
+ * Returns true if _frame1 is greater than _frame2. The comparison is done
+ * modulo DWC_HFNUM_MAX_FRNUM. This accounts for the rollover of the frame
+ * number when the max frame number is reached.
+ */
+static inline int dwc_frame_num_gt(uint16_t frame1, uint16_t frame2)
+{
+	return (frame1 != frame2) &&
+	    (((frame1 - frame2) & DWC_HFNUM_MAX_FRNUM) <
+	     (DWC_HFNUM_MAX_FRNUM >> 1));
+}
+
+/**
+ * Increments _frame by the amount specified by _inc. The addition is done
+ * modulo DWC_HFNUM_MAX_FRNUM. Returns the incremented value.
+ */
+static inline uint16_t dwc_frame_num_inc(uint16_t frame, uint16_t inc)
+{
+	return (frame + inc) & DWC_HFNUM_MAX_FRNUM;
+}
+
+static inline uint16_t dwc_full_frame_num(uint16_t frame)
+{
+	return (frame & DWC_HFNUM_MAX_FRNUM) >> 3;
+}
+
+static inline uint16_t dwc_micro_frame_num(uint16_t frame)
+{
+	return frame & 0x7;
+}
+
+void dwc_otg_hcd_save_data_toggle(dwc_hc_t * hc,
+				  dwc_otg_hc_regs_t * hc_regs,
+				  dwc_otg_qtd_t * qtd);
+
+#ifdef DEBUG
+/**
+ * Macro to sample the remaining PHY clocks left in the current frame. This
+ * may be used during debugging to determine the average time it takes to
+ * execute sections of code. There are two possible sample points, "a" and
+ * "b", so the _letter argument must be one of these values.
+ *
+ * To dump the average sample times, read the "hcd_frrem" sysfs attribute. For
+ * example, "cat /sys/devices/lm0/hcd_frrem".
+ */
+#define dwc_sample_frrem(_hcd, _qh, _letter) \
+{ \
+	hfnum_data_t hfnum; \
+	dwc_otg_qtd_t *qtd; \
+	qtd = list_entry(_qh->qtd_list.next, dwc_otg_qtd_t, qtd_list_entry); \
+	if (usb_pipeint(qtd->urb->pipe) && _qh->start_split_frame != 0 && !qtd->complete_split) { \
+		hfnum.d32 = DWC_READ_REG32(&_hcd->core_if->host_if->host_global_regs->hfnum); \
+		switch (hfnum.b.frnum & 0x7) { \
+		case 7: \
+			_hcd->hfnum_7_samples_##_letter++; \
+			_hcd->hfnum_7_frrem_accum_##_letter += hfnum.b.frrem; \
+			break; \
+		case 0: \
+			_hcd->hfnum_0_samples_##_letter++; \
+			_hcd->hfnum_0_frrem_accum_##_letter += hfnum.b.frrem; \
+			break; \
+		default: \
+			_hcd->hfnum_other_samples_##_letter++; \
+			_hcd->hfnum_other_frrem_accum_##_letter += hfnum.b.frrem; \
+			break; \
+		} \
+	} \
+}
+#else
+#define dwc_sample_frrem(_hcd, _qh, _letter)
+#endif
+#endif
+#endif /* DWC_DEVICE_ONLY */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_hcd_if.h linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_hcd_if.h
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_hcd_if.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_hcd_if.h	2017-09-23 03:42:50.222674440 +0800
@@ -0,0 +1,411 @@
+/* ==========================================================================
+ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_hcd_if.h $
+ * $Revision: #11 $
+ * $Date: 2011/05/17 $
+ * $Change: 1774110 $
+ *
+ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+ * otherwise expressly agreed to in writing between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product under
+ * any End User Software License Agreement or Agreement for Licensed Product
+ * with Synopsys or any supplement thereto. You are permitted to use and
+ * redistribute this Software in source and binary forms, with or without
+ * modification, provided that redistributions of source code must retain this
+ * notice. You may not view, use, disclose, copy or distribute this file or
+ * any information contained herein except pursuant to this license grant from
+ * Synopsys. If you do not agree with this notice, including the disclaimer
+ * below, then you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================== */
+#ifndef DWC_DEVICE_ONLY
+#ifndef __DWC_HCD_IF_H__
+#define __DWC_HCD_IF_H__
+
+#include "dwc_otg_core_if.h"
+
+/** @file
+ * This file defines DWC_OTG HCD Core API.
+ */
+
+struct dwc_otg_hcd;
+typedef struct dwc_otg_hcd dwc_otg_hcd_t;
+
+struct dwc_otg_hcd_urb;
+typedef struct dwc_otg_hcd_urb dwc_otg_hcd_urb_t;
+
+/** @name HCD Function Driver Callbacks */
+/** @{ */
+
+/** This function is called whenever core switches to host mode. */
+typedef int (*dwc_otg_hcd_start_cb_t) (dwc_otg_hcd_t * hcd);
+
+/** This function is called when device has been disconnected */
+typedef int (*dwc_otg_hcd_disconnect_cb_t) (dwc_otg_hcd_t * hcd);
+
+/** Wrapper provides this function to HCD to core, so it can get hub information to which device is connected */
+typedef int (*dwc_otg_hcd_hub_info_from_urb_cb_t) (dwc_otg_hcd_t * hcd,
+						   void *urb_handle,
+						   uint32_t * hub_addr,
+						   uint32_t * port_addr);
+/** Via this function HCD core gets device speed */
+typedef int (*dwc_otg_hcd_speed_from_urb_cb_t) (dwc_otg_hcd_t * hcd,
+						void *urb_handle);
+
+/** This function is called when urb is completed */
+typedef int (*dwc_otg_hcd_complete_urb_cb_t) (dwc_otg_hcd_t * hcd,
+					      void *urb_handle,
+					      dwc_otg_hcd_urb_t * dwc_otg_urb,
+					      int32_t status);
+
+/** Via this function HCD core gets b_hnp_enable parameter */
+typedef int (*dwc_otg_hcd_get_b_hnp_enable) (dwc_otg_hcd_t * hcd);
+
+struct dwc_otg_hcd_function_ops {
+	dwc_otg_hcd_start_cb_t start;
+	dwc_otg_hcd_disconnect_cb_t disconnect;
+	dwc_otg_hcd_hub_info_from_urb_cb_t hub_info;
+	dwc_otg_hcd_speed_from_urb_cb_t speed;
+	dwc_otg_hcd_complete_urb_cb_t complete;
+	dwc_otg_hcd_get_b_hnp_enable get_b_hnp_enable;
+};
+/** @} */
+
+/** @name HCD Core API */
+/** @{ */
+/** This function allocates dwc_otg_hcd structure and returns pointer on it. */
+extern dwc_otg_hcd_t *dwc_otg_hcd_alloc_hcd(void);
+
+/** This function should be called to initiate HCD Core.
+ *
+ * @param hcd The HCD
+ * @param core_if The DWC_OTG Core
+ *
+ * Returns -DWC_E_NO_MEMORY if no enough memory.
+ * Returns 0 on success  
+ */
+extern int dwc_otg_hcd_init(dwc_otg_hcd_t * hcd, dwc_otg_core_if_t * core_if);
+
+/** Frees HCD
+ *
+ * @param hcd The HCD
+ */
+extern void dwc_otg_hcd_remove(dwc_otg_hcd_t * hcd);
+
+/** This function should be called on every hardware interrupt.
+ *
+ * @param dwc_otg_hcd The HCD
+ *
+ * Returns non zero if interrupt is handled
+ * Return 0 if interrupt is not handled
+ */
+extern int32_t dwc_otg_hcd_handle_intr(dwc_otg_hcd_t * dwc_otg_hcd);
+
+/**
+ * Returns private data set by
+ * dwc_otg_hcd_set_priv_data function.
+ *
+ * @param hcd The HCD
+ */
+extern void *dwc_otg_hcd_get_priv_data(dwc_otg_hcd_t * hcd);
+
+/**
+ * Set private data.
+ *
+ * @param hcd The HCD
+ * @param priv_data pointer to be stored in private data
+ */
+extern void dwc_otg_hcd_set_priv_data(dwc_otg_hcd_t * hcd, void *priv_data);
+
+/**
+ * This function initializes the HCD Core.
+ *
+ * @param hcd The HCD
+ * @param fops The Function Driver Operations data structure containing pointers to all callbacks.
+ *
+ * Returns -DWC_E_NO_DEVICE if Core is currently is in device mode.
+ * Returns 0 on success
+ */
+extern int dwc_otg_hcd_start(dwc_otg_hcd_t * hcd,
+			     struct dwc_otg_hcd_function_ops *fops);
+
+/**
+ * Halts the DWC_otg host mode operations in a clean manner. USB transfers are
+ * stopped. 
+ *
+ * @param hcd The HCD
+ */
+extern void dwc_otg_hcd_stop(dwc_otg_hcd_t * hcd);
+
+/**
+ * Handles hub class-specific requests.
+ *
+ * @param dwc_otg_hcd The HCD
+ * @param typeReq Request Type
+ * @param wValue wValue from control request
+ * @param wIndex wIndex from control request
+ * @param buf data buffer 
+ * @param wLength data buffer length
+ *
+ * Returns -DWC_E_INVALID if invalid argument is passed
+ * Returns 0 on success
+ */
+extern int dwc_otg_hcd_hub_control(dwc_otg_hcd_t * dwc_otg_hcd,
+				   uint16_t typeReq, uint16_t wValue,
+				   uint16_t wIndex, uint8_t * buf,
+				   uint16_t wLength);
+
+/**
+ * Returns otg port number.
+ *
+ * @param hcd The HCD
+ */
+extern uint32_t dwc_otg_hcd_otg_port(dwc_otg_hcd_t * hcd);
+
+/**
+ * Returns OTG version - either 1.3 or 2.0.
+ *
+ * @param hcd The HCD
+ */
+extern uint16_t dwc_otg_get_otg_version(dwc_otg_core_if_t * core_if);
+
+/**
+ * Returns 1 if currently core is acting as B host, and 0 otherwise.
+ *
+ * @param hcd The HCD
+ */
+extern uint32_t dwc_otg_hcd_is_b_host(dwc_otg_hcd_t * hcd);
+
+/**
+ * Returns current frame number.
+ *
+ * @param hcd The HCD
+ */
+extern int dwc_otg_hcd_get_frame_number(dwc_otg_hcd_t * hcd);
+
+/**
+ * Dumps hcd state.
+ *
+ * @param hcd The HCD
+ */
+extern void dwc_otg_hcd_dump_state(dwc_otg_hcd_t * hcd);
+
+/**
+ * Dump the average frame remaining at SOF. This can be used to
+ * determine average interrupt latency. Frame remaining is also shown for
+ * start transfer and two additional sample points.
+ * Currently this function is not implemented.
+ *
+ * @param hcd The HCD
+ */
+extern void dwc_otg_hcd_dump_frrem(dwc_otg_hcd_t * hcd);
+
+/**
+ * Sends LPM transaction to the local device.
+ *
+ * @param hcd The HCD
+ * @param devaddr Device Address
+ * @param hird Host initiated resume duration
+ * @param bRemoteWake Value of bRemoteWake field in LPM transaction
+ *
+ * Returns negative value if sending LPM transaction was not succeeded.
+ * Returns 0 on success.
+ */
+extern int dwc_otg_hcd_send_lpm(dwc_otg_hcd_t * hcd, uint8_t devaddr,
+				uint8_t hird, uint8_t bRemoteWake);
+
+/* URB interface */
+
+/**
+ * Allocates memory for dwc_otg_hcd_urb structure.
+ * Allocated memory should be freed by call of DWC_FREE.
+ *
+ * @param hcd The HCD
+ * @param iso_desc_count Count of ISOC descriptors
+ * @param atomic_alloc Specefies whether to perform atomic allocation.
+ */
+extern dwc_otg_hcd_urb_t *dwc_otg_hcd_urb_alloc(dwc_otg_hcd_t * hcd,
+						int iso_desc_count,
+						int atomic_alloc);
+
+/**
+ * Set pipe information in URB.
+ *
+ * @param hcd_urb DWC_OTG URB
+ * @param devaddr Device Address
+ * @param ep_num Endpoint Number
+ * @param ep_type Endpoint Type
+ * @param ep_dir Endpoint Direction
+ * @param mps Max Packet Size
+ */
+extern void dwc_otg_hcd_urb_set_pipeinfo(dwc_otg_hcd_urb_t * hcd_urb,
+					 uint8_t devaddr, uint8_t ep_num,
+					 uint8_t ep_type, uint8_t ep_dir,
+					 uint16_t mps);
+
+/* Transfer flags */
+#define URB_GIVEBACK_ASAP 0x1
+#define URB_SEND_ZERO_PACKET 0x2
+
+/**
+ * Sets dwc_otg_hcd_urb parameters.
+ *
+ * @param urb DWC_OTG URB allocated by dwc_otg_hcd_urb_alloc function.
+ * @param urb_handle Unique handle for request, this will be passed back
+ * to function driver in completion callback.
+ * @param buf The buffer for the data
+ * @param dma The DMA buffer for the data
+ * @param buflen Transfer length
+ * @param sp Buffer for setup data
+ * @param sp_dma DMA address of setup data buffer
+ * @param flags Transfer flags
+ * @param interval Polling interval for interrupt or isochronous transfers.
+ */
+extern void dwc_otg_hcd_urb_set_params(dwc_otg_hcd_urb_t * urb,
+				       void *urb_handle, void *buf,
+				       dwc_dma_t dma, uint32_t buflen, void *sp,
+				       dwc_dma_t sp_dma, uint32_t flags,
+				       uint16_t interval);
+
+/** Gets status from dwc_otg_hcd_urb
+ *
+ * @param dwc_otg_urb DWC_OTG URB
+ */
+extern uint32_t dwc_otg_hcd_urb_get_status(dwc_otg_hcd_urb_t * dwc_otg_urb);
+
+/** Gets actual length from dwc_otg_hcd_urb
+ *
+ * @param dwc_otg_urb DWC_OTG URB
+ */
+extern uint32_t dwc_otg_hcd_urb_get_actual_length(dwc_otg_hcd_urb_t *
+						  dwc_otg_urb);
+
+/** Gets error count from dwc_otg_hcd_urb. Only for ISOC URBs
+ *
+ * @param dwc_otg_urb DWC_OTG URB
+ */
+extern uint32_t dwc_otg_hcd_urb_get_error_count(dwc_otg_hcd_urb_t *
+						dwc_otg_urb);
+
+/** Set ISOC descriptor offset and length
+ *
+ * @param dwc_otg_urb DWC_OTG URB
+ * @param desc_num ISOC descriptor number
+ * @param offset Offset from beginig of buffer.
+ * @param length Transaction length
+ */
+extern void dwc_otg_hcd_urb_set_iso_desc_params(dwc_otg_hcd_urb_t * dwc_otg_urb,
+						int desc_num, uint32_t offset,
+						uint32_t length);
+
+/** Get status of ISOC descriptor, specified by desc_num
+ *
+ * @param dwc_otg_urb DWC_OTG URB
+ * @param desc_num ISOC descriptor number 
+ */
+extern uint32_t dwc_otg_hcd_urb_get_iso_desc_status(dwc_otg_hcd_urb_t *
+						    dwc_otg_urb, int desc_num);
+
+/** Get actual length of ISOC descriptor, specified by desc_num
+ *
+ * @param dwc_otg_urb DWC_OTG URB
+ * @param desc_num ISOC descriptor number
+ */
+extern uint32_t dwc_otg_hcd_urb_get_iso_desc_actual_length(dwc_otg_hcd_urb_t *
+							   dwc_otg_urb,
+							   int desc_num);
+
+/** Queue URB. After transfer is completes, the complete callback will be called with the URB status
+ *
+ * @param dwc_otg_hcd The HCD
+ * @param dwc_otg_urb DWC_OTG URB
+ * @param ep_handle Out parameter for returning endpoint handle
+ *
+ * Returns -DWC_E_NO_DEVICE if no device is connected.
+ * Returns -DWC_E_NO_MEMORY if there is no enough memory.
+ * Returns 0 on success.
+ */
+extern int dwc_otg_hcd_urb_enqueue(dwc_otg_hcd_t * dwc_otg_hcd,
+				   dwc_otg_hcd_urb_t * dwc_otg_urb,
+				   void **ep_handle, int atomic_alloc);
+
+/** De-queue the specified URB
+ *
+ * @param dwc_otg_hcd The HCD
+ * @param dwc_otg_urb DWC_OTG URB
+ */
+extern int dwc_otg_hcd_urb_dequeue(dwc_otg_hcd_t * dwc_otg_hcd,
+				   dwc_otg_hcd_urb_t * dwc_otg_urb);
+
+/** Frees resources in the DWC_otg controller related to a given endpoint.
+ * Any URBs for the endpoint must already be dequeued.
+ *
+ * @param hcd The HCD
+ * @param ep_handle Endpoint handle, returned by dwc_otg_hcd_urb_enqueue function
+ * @param retry Number of retries if there are queued transfers.
+ *
+ * Returns -DWC_E_INVALID if invalid arguments are passed.
+ * Returns 0 on success
+ */
+extern int dwc_otg_hcd_endpoint_disable(dwc_otg_hcd_t * hcd, void *ep_handle,
+					int retry);
+
+/* Resets the data toggle in qh structure. This function can be called from
+ * usb_clear_halt routine.
+ *
+ * @param hcd The HCD
+ * @param ep_handle Endpoint handle, returned by dwc_otg_hcd_urb_enqueue function
+ *
+ * Returns -DWC_E_INVALID if invalid arguments are passed.
+ * Returns 0 on success
+ */
+extern int dwc_otg_hcd_endpoint_reset(dwc_otg_hcd_t * hcd, void *ep_handle);
+
+/** Returns 1 if status of specified port is changed and 0 otherwise.
+ *
+ * @param hcd The HCD
+ * @param port Port number
+ */
+extern int dwc_otg_hcd_is_status_changed(dwc_otg_hcd_t * hcd, int port);
+
+/** Call this function to check if bandwidth was allocated for specified endpoint.
+ * Only for ISOC and INTERRUPT endpoints.
+ *
+ * @param hcd The HCD
+ * @param ep_handle Endpoint handle
+ */
+extern int dwc_otg_hcd_is_bandwidth_allocated(dwc_otg_hcd_t * hcd,
+					      void *ep_handle);
+
+/** Call this function to check if bandwidth was freed for specified endpoint.
+ *
+ * @param hcd The HCD
+ * @param ep_handle Endpoint handle
+ */
+extern int dwc_otg_hcd_is_bandwidth_freed(dwc_otg_hcd_t * hcd, void *ep_handle);
+
+/** Returns bandwidth allocated for specified endpoint in microseconds.
+ * Only for ISOC and INTERRUPT endpoints.
+ *
+ * @param hcd The HCD
+ * @param ep_handle Endpoint handle
+ */
+extern uint8_t dwc_otg_hcd_get_ep_bandwidth(dwc_otg_hcd_t * hcd,
+					    void *ep_handle);
+
+/** @} */
+
+#endif /* __DWC_HCD_IF_H__ */
+#endif /* DWC_DEVICE_ONLY */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_hcd_intr.c linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_hcd_intr.c
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_hcd_intr.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_hcd_intr.c	2017-09-23 03:42:50.222674440 +0800
@@ -0,0 +1,2072 @@
+/* ==========================================================================
+ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_hcd_intr.c $
+ * $Revision: #87 $
+ * $Date: 2011/05/17 $
+ * $Change: 1774110 $
+ *
+ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+ * otherwise expressly agreed to in writing between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product under
+ * any End User Software License Agreement or Agreement for Licensed Product
+ * with Synopsys or any supplement thereto. You are permitted to use and
+ * redistribute this Software in source and binary forms, with or without
+ * modification, provided that redistributions of source code must retain this
+ * notice. You may not view, use, disclose, copy or distribute this file or
+ * any information contained herein except pursuant to this license grant from
+ * Synopsys. If you do not agree with this notice, including the disclaimer
+ * below, then you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================== */
+#ifndef DWC_DEVICE_ONLY
+
+#include "dwc_otg_hcd.h"
+#include "dwc_otg_regs.h"
+
+/** @file
+ * This file contains the implementation of the HCD Interrupt handlers.
+ */
+
+/** This function handles interrupts for the HCD. */
+int32_t dwc_otg_hcd_handle_intr(dwc_otg_hcd_t * dwc_otg_hcd)
+{
+	int retval = 0;
+
+	dwc_otg_core_if_t *core_if = dwc_otg_hcd->core_if;
+	gintsts_data_t gintsts;
+#ifdef DEBUG
+	dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs;
+#endif
+
+	/* Exit from ISR if core is hibernated */
+	if (core_if->hibernation_suspend == 1) {
+		return retval;
+	}
+	DWC_SPINLOCK(dwc_otg_hcd->lock);
+	/* Check if HOST Mode */
+	if (dwc_otg_is_host_mode(core_if)) {
+		gintsts.d32 = dwc_otg_read_core_intr(core_if);
+		if (!gintsts.d32) {
+			DWC_SPINUNLOCK(dwc_otg_hcd->lock);
+			return 0;
+		}
+#ifdef DEBUG
+		/* Don't print debug message in the interrupt handler on SOF */
+#ifndef DEBUG_SOF
+		if (gintsts.d32 != DWC_SOF_INTR_MASK)
+#endif
+			DWC_DEBUGPL(DBG_HCD, "\n");
+#endif
+
+#ifdef DEBUG
+#ifndef DEBUG_SOF
+		if (gintsts.d32 != DWC_SOF_INTR_MASK)
+#endif
+			DWC_DEBUGPL(DBG_HCD,
+				    "DWC OTG HCD Interrupt Detected gintsts&gintmsk=0x%08x\n",
+				    gintsts.d32);
+#endif
+
+		if (gintsts.b.sofintr) {
+			retval |= dwc_otg_hcd_handle_sof_intr(dwc_otg_hcd);
+		}
+		if (gintsts.b.rxstsqlvl) {
+			retval |=
+			    dwc_otg_hcd_handle_rx_status_q_level_intr
+			    (dwc_otg_hcd);
+		}
+		if (gintsts.b.nptxfempty) {
+			retval |=
+			    dwc_otg_hcd_handle_np_tx_fifo_empty_intr
+			    (dwc_otg_hcd);
+		}
+		if (gintsts.b.i2cintr) {
+			/** @todo Implement i2cintr handler. */
+		}
+		if (gintsts.b.portintr) {
+			retval |= dwc_otg_hcd_handle_port_intr(dwc_otg_hcd);
+		}
+		if (gintsts.b.hcintr) {
+			retval |= dwc_otg_hcd_handle_hc_intr(dwc_otg_hcd);
+		}
+		if (gintsts.b.ptxfempty) {
+			retval |=
+			    dwc_otg_hcd_handle_perio_tx_fifo_empty_intr
+			    (dwc_otg_hcd);
+		}
+#ifdef DEBUG
+#ifndef DEBUG_SOF
+		if (gintsts.d32 != DWC_SOF_INTR_MASK)
+#endif
+		{
+			DWC_DEBUGPL(DBG_HCD,
+				    "DWC OTG HCD Finished Servicing Interrupts\n");
+			DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD gintsts=0x%08x\n",
+				    DWC_READ_REG32(&global_regs->gintsts));
+			DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD gintmsk=0x%08x\n",
+				    DWC_READ_REG32(&global_regs->gintmsk));
+		}
+#endif
+
+#ifdef DEBUG
+#ifndef DEBUG_SOF
+		if (gintsts.d32 != DWC_SOF_INTR_MASK)
+#endif
+			DWC_DEBUGPL(DBG_HCD, "\n");
+#endif
+
+	}
+	DWC_SPINUNLOCK(dwc_otg_hcd->lock);
+	return retval;
+}
+
+#ifdef DWC_TRACK_MISSED_SOFS
+#warning Compiling code to track missed SOFs
+#define FRAME_NUM_ARRAY_SIZE 1000
+/**
+ * This function is for debug only.
+ */
+static inline void track_missed_sofs(uint16_t curr_frame_number)
+{
+	static uint16_t frame_num_array[FRAME_NUM_ARRAY_SIZE];
+	static uint16_t last_frame_num_array[FRAME_NUM_ARRAY_SIZE];
+	static int frame_num_idx = 0;
+	static uint16_t last_frame_num = DWC_HFNUM_MAX_FRNUM;
+	static int dumped_frame_num_array = 0;
+
+	if (frame_num_idx < FRAME_NUM_ARRAY_SIZE) {
+		if (((last_frame_num + 1) & DWC_HFNUM_MAX_FRNUM) !=
+		    curr_frame_number) {
+			frame_num_array[frame_num_idx] = curr_frame_number;
+			last_frame_num_array[frame_num_idx++] = last_frame_num;
+		}
+	} else if (!dumped_frame_num_array) {
+		int i;
+		DWC_PRINTF("Frame     Last Frame\n");
+		DWC_PRINTF("-----     ----------\n");
+		for (i = 0; i < FRAME_NUM_ARRAY_SIZE; i++) {
+			DWC_PRINTF("0x%04x    0x%04x\n",
+				   frame_num_array[i], last_frame_num_array[i]);
+		}
+		dumped_frame_num_array = 1;
+	}
+	last_frame_num = curr_frame_number;
+}
+#endif
+
+/**
+ * Handles the start-of-frame interrupt in host mode. Non-periodic
+ * transactions may be queued to the DWC_otg controller for the current
+ * (micro)frame. Periodic transactions may be queued to the controller for the
+ * next (micro)frame.
+ */
+int32_t dwc_otg_hcd_handle_sof_intr(dwc_otg_hcd_t * hcd)
+{
+	hfnum_data_t hfnum;
+	dwc_list_link_t *qh_entry;
+	dwc_otg_qh_t *qh;
+	dwc_otg_transaction_type_e tr_type;
+	gintsts_data_t gintsts = {.d32 = 0 };
+
+	hfnum.d32 =
+	    DWC_READ_REG32(&hcd->core_if->host_if->host_global_regs->hfnum);
+
+#ifdef DEBUG_SOF
+	DWC_DEBUGPL(DBG_HCD, "--Start of Frame Interrupt--\n");
+#endif
+	hcd->frame_number = hfnum.b.frnum;
+
+#ifdef DEBUG
+	hcd->frrem_accum += hfnum.b.frrem;
+	hcd->frrem_samples++;
+#endif
+
+#ifdef DWC_TRACK_MISSED_SOFS
+	track_missed_sofs(hcd->frame_number);
+#endif
+	/* Determine whether any periodic QHs should be executed. */
+	qh_entry = DWC_LIST_FIRST(&hcd->periodic_sched_inactive);
+	while (qh_entry != &hcd->periodic_sched_inactive) {
+		qh = DWC_LIST_ENTRY(qh_entry, dwc_otg_qh_t, qh_list_entry);
+		qh_entry = qh_entry->next;
+		if (dwc_frame_num_le(qh->sched_frame, hcd->frame_number)) {
+			/*
+			 * Move QH to the ready list to be executed next
+			 * (micro)frame.
+			 */
+			DWC_LIST_MOVE_HEAD(&hcd->periodic_sched_ready,
+					   &qh->qh_list_entry);
+		}
+	}
+	tr_type = dwc_otg_hcd_select_transactions(hcd);
+	if (tr_type != DWC_OTG_TRANSACTION_NONE) {
+		dwc_otg_hcd_queue_transactions(hcd, tr_type);
+	}
+
+	/* Clear interrupt */
+	gintsts.b.sofintr = 1;
+	DWC_WRITE_REG32(&hcd->core_if->core_global_regs->gintsts, gintsts.d32);
+
+	return 1;
+}
+
+/** Handles the Rx Status Queue Level Interrupt, which indicates that there is at
+ * least one packet in the Rx FIFO.  The packets are moved from the FIFO to
+ * memory if the DWC_otg controller is operating in Slave mode. */
+int32_t dwc_otg_hcd_handle_rx_status_q_level_intr(dwc_otg_hcd_t * dwc_otg_hcd)
+{
+	host_grxsts_data_t grxsts;
+	dwc_hc_t *hc = NULL;
+
+	DWC_DEBUGPL(DBG_HCD, "--RxStsQ Level Interrupt--\n");
+
+	grxsts.d32 =
+	    DWC_READ_REG32(&dwc_otg_hcd->core_if->core_global_regs->grxstsp);
+
+	hc = dwc_otg_hcd->hc_ptr_array[grxsts.b.chnum];
+	if (!hc) {
+		DWC_ERROR("Unable to get corresponding channel\n");
+		return 0;
+	}
+
+	/* Packet Status */
+	DWC_DEBUGPL(DBG_HCDV, "    Ch num = %d\n", grxsts.b.chnum);
+	DWC_DEBUGPL(DBG_HCDV, "    Count = %d\n", grxsts.b.bcnt);
+	DWC_DEBUGPL(DBG_HCDV, "    DPID = %d, hc.dpid = %d\n", grxsts.b.dpid,
+		    hc->data_pid_start);
+	DWC_DEBUGPL(DBG_HCDV, "    PStatus = %d\n", grxsts.b.pktsts);
+
+	switch (grxsts.b.pktsts) {
+	case DWC_GRXSTS_PKTSTS_IN:
+		/* Read the data into the host buffer. */
+		if (grxsts.b.bcnt > 0) {
+			dwc_otg_read_packet(dwc_otg_hcd->core_if,
+					    hc->xfer_buff, grxsts.b.bcnt);
+
+			/* Update the HC fields for the next packet received. */
+			hc->xfer_count += grxsts.b.bcnt;
+			hc->xfer_buff += grxsts.b.bcnt;
+		}
+
+	case DWC_GRXSTS_PKTSTS_IN_XFER_COMP:
+	case DWC_GRXSTS_PKTSTS_DATA_TOGGLE_ERR:
+	case DWC_GRXSTS_PKTSTS_CH_HALTED:
+		/* Handled in interrupt, just ignore data */
+		break;
+	default:
+		DWC_ERROR("RX_STS_Q Interrupt: Unknown status %d\n",
+			  grxsts.b.pktsts);
+		break;
+	}
+
+	return 1;
+}
+
+/** This interrupt occurs when the non-periodic Tx FIFO is half-empty. More
+ * data packets may be written to the FIFO for OUT transfers. More requests
+ * may be written to the non-periodic request queue for IN transfers. This
+ * interrupt is enabled only in Slave mode. */
+int32_t dwc_otg_hcd_handle_np_tx_fifo_empty_intr(dwc_otg_hcd_t * dwc_otg_hcd)
+{
+	DWC_DEBUGPL(DBG_HCD, "--Non-Periodic TxFIFO Empty Interrupt--\n");
+	dwc_otg_hcd_queue_transactions(dwc_otg_hcd,
+				       DWC_OTG_TRANSACTION_NON_PERIODIC);
+	return 1;
+}
+
+/** This interrupt occurs when the periodic Tx FIFO is half-empty. More data
+ * packets may be written to the FIFO for OUT transfers. More requests may be
+ * written to the periodic request queue for IN transfers. This interrupt is
+ * enabled only in Slave mode. */
+int32_t dwc_otg_hcd_handle_perio_tx_fifo_empty_intr(dwc_otg_hcd_t * dwc_otg_hcd)
+{
+	DWC_DEBUGPL(DBG_HCD, "--Periodic TxFIFO Empty Interrupt--\n");
+	dwc_otg_hcd_queue_transactions(dwc_otg_hcd,
+				       DWC_OTG_TRANSACTION_PERIODIC);
+	return 1;
+}
+
+/** There are multiple conditions that can cause a port interrupt. This function
+ * determines which interrupt conditions have occurred and handles them
+ * appropriately. */
+int32_t dwc_otg_hcd_handle_port_intr(dwc_otg_hcd_t * dwc_otg_hcd)
+{
+	int retval = 0;
+	hprt0_data_t hprt0;
+	hprt0_data_t hprt0_modify;
+
+	hprt0.d32 = DWC_READ_REG32(dwc_otg_hcd->core_if->host_if->hprt0);
+	hprt0_modify.d32 = DWC_READ_REG32(dwc_otg_hcd->core_if->host_if->hprt0);
+
+	/* Clear appropriate bits in HPRT0 to clear the interrupt bit in
+	 * GINTSTS */
+
+	hprt0_modify.b.prtena = 0;
+	hprt0_modify.b.prtconndet = 0;
+	hprt0_modify.b.prtenchng = 0;
+	hprt0_modify.b.prtovrcurrchng = 0;
+
+	/* Port Connect Detected
+	 * Set flag and clear if detected */
+	if (dwc_otg_hcd->core_if->hibernation_suspend == 1) {
+		// Dont modify port status if we are in hibernation state
+		hprt0_modify.b.prtconndet = 1;
+		hprt0_modify.b.prtenchng = 1;
+		DWC_WRITE_REG32(dwc_otg_hcd->core_if->host_if->hprt0, hprt0_modify.d32);
+		hprt0.d32 = DWC_READ_REG32(dwc_otg_hcd->core_if->host_if->hprt0);
+		return retval;
+	}
+
+	if (hprt0.b.prtconndet) {
+		/** @todo - check if steps performed in 'else' block should be perfromed regardles adp */
+		if (dwc_otg_hcd->core_if->adp_enable && 	
+				dwc_otg_hcd->core_if->adp.vbuson_timer_started == 1) {
+			DWC_PRINTF("PORT CONNECT DETECTED ----------------\n");
+			DWC_TIMER_CANCEL(dwc_otg_hcd->core_if->adp.vbuson_timer);
+			dwc_otg_hcd->core_if->adp.vbuson_timer_started = 0;
+			/* TODO - check if this is required, as
+			 * host initialization was already performed
+			 * after initial ADP probing
+			 */
+			/*dwc_otg_hcd->core_if->adp.vbuson_timer_started = 0;
+			dwc_otg_core_init(dwc_otg_hcd->core_if);
+			dwc_otg_enable_global_interrupts(dwc_otg_hcd->core_if);
+			cil_hcd_start(dwc_otg_hcd->core_if);*/
+		} else {
+		
+			DWC_DEBUGPL(DBG_HCD, "--Port Interrupt HPRT0=0x%08x "
+				    "Port Connect Detected--\n", hprt0.d32);
+			dwc_otg_hcd->flags.b.port_connect_status_change = 1;
+			dwc_otg_hcd->flags.b.port_connect_status = 1;
+			hprt0_modify.b.prtconndet = 1;
+	
+			/* B-Device has connected, Delete the connection timer. */
+			DWC_TIMER_CANCEL(dwc_otg_hcd->conn_timer);
+		}
+		/* The Hub driver asserts a reset when it sees port connect
+		 * status change flag */
+		retval |= 1;
+	}
+
+	/* Port Enable Changed
+	 * Clear if detected - Set internal flag if disabled */
+	if (hprt0.b.prtenchng) {
+		DWC_DEBUGPL(DBG_HCD, "  --Port Interrupt HPRT0=0x%08x "
+			    "Port Enable Changed--\n", hprt0.d32);
+		hprt0_modify.b.prtenchng = 1;
+		if (hprt0.b.prtena == 1) {
+			hfir_data_t hfir;
+			int do_reset = 0;
+			dwc_otg_core_params_t *params =
+			    dwc_otg_hcd->core_if->core_params;
+			dwc_otg_core_global_regs_t *global_regs =
+			    dwc_otg_hcd->core_if->core_global_regs;
+			dwc_otg_host_if_t *host_if =
+			    dwc_otg_hcd->core_if->host_if;
+			    
+			/* Every time when port enables calculate
+			 * HFIR.FrInterval
+			 */
+			hfir.d32 = DWC_READ_REG32(&host_if->host_global_regs->hfir);
+			hfir.b.frint = calc_frame_interval(dwc_otg_hcd->core_if);
+			DWC_WRITE_REG32(&host_if->host_global_regs->hfir, hfir.d32);
+
+			/* Check if we need to adjust the PHY clock speed for
+			 * low power and adjust it */
+			if (params->host_support_fs_ls_low_power) {
+				gusbcfg_data_t usbcfg;
+
+				usbcfg.d32 =
+				    DWC_READ_REG32(&global_regs->gusbcfg);
+
+				if (hprt0.b.prtspd == DWC_HPRT0_PRTSPD_LOW_SPEED
+				    || hprt0.b.prtspd ==
+				    DWC_HPRT0_PRTSPD_FULL_SPEED) {
+					/*
+					 * Low power
+					 */
+					hcfg_data_t hcfg;
+					if (usbcfg.b.phylpwrclksel == 0) {
+						/* Set PHY low power clock select for FS/LS devices */
+						usbcfg.b.phylpwrclksel = 1;
+						DWC_WRITE_REG32
+						    (&global_regs->gusbcfg,
+						     usbcfg.d32);
+						do_reset = 1;
+					}
+
+					hcfg.d32 =
+					    DWC_READ_REG32
+					    (&host_if->host_global_regs->hcfg);
+
+					if (hprt0.b.prtspd ==
+					    DWC_HPRT0_PRTSPD_LOW_SPEED
+					    && params->host_ls_low_power_phy_clk
+					    ==
+					    DWC_HOST_LS_LOW_POWER_PHY_CLK_PARAM_6MHZ)
+					{
+						/* 6 MHZ */
+						DWC_DEBUGPL(DBG_CIL,
+							    "FS_PHY programming HCFG to 6 MHz (Low Power)\n");
+						if (hcfg.b.fslspclksel !=
+						    DWC_HCFG_6_MHZ) {
+							hcfg.b.fslspclksel =
+							    DWC_HCFG_6_MHZ;
+							DWC_WRITE_REG32
+							    (&host_if->host_global_regs->hcfg,
+							     hcfg.d32);
+							do_reset = 1;
+						}
+					} else {
+						/* 48 MHZ */
+						DWC_DEBUGPL(DBG_CIL,
+							    "FS_PHY programming HCFG to 48 MHz ()\n");
+						if (hcfg.b.fslspclksel !=
+						    DWC_HCFG_48_MHZ) {
+							hcfg.b.fslspclksel =
+							    DWC_HCFG_48_MHZ;
+							DWC_WRITE_REG32
+							    (&host_if->host_global_regs->hcfg,
+							     hcfg.d32);
+							do_reset = 1;
+						}
+					}
+				} else {
+					/*
+					 * Not low power
+					 */
+					if (usbcfg.b.phylpwrclksel == 1) {
+						usbcfg.b.phylpwrclksel = 0;
+						DWC_WRITE_REG32
+						    (&global_regs->gusbcfg,
+						     usbcfg.d32);
+						do_reset = 1;
+					}
+				}
+
+				if (do_reset) {
+					DWC_TASK_SCHEDULE(dwc_otg_hcd->reset_tasklet);
+				}
+			}
+
+			if (!do_reset) {
+				/* Port has been enabled set the reset change flag */
+				dwc_otg_hcd->flags.b.port_reset_change = 1;
+			}
+		} else {
+			dwc_otg_hcd->flags.b.port_enable_change = 1;
+		}
+		retval |= 1;
+	}
+
+	/** Overcurrent Change Interrupt */
+	if (hprt0.b.prtovrcurrchng) {
+		DWC_DEBUGPL(DBG_HCD, "  --Port Interrupt HPRT0=0x%08x "
+			    "Port Overcurrent Changed--\n", hprt0.d32);
+		dwc_otg_hcd->flags.b.port_over_current_change = 1;
+		hprt0_modify.b.prtovrcurrchng = 1;
+		retval |= 1;
+	}
+
+	/* Clear Port Interrupts */
+	DWC_WRITE_REG32(dwc_otg_hcd->core_if->host_if->hprt0, hprt0_modify.d32);
+
+	return retval;
+}
+
+/** This interrupt indicates that one or more host channels has a pending
+ * interrupt. There are multiple conditions that can cause each host channel
+ * interrupt. This function determines which conditions have occurred for each
+ * host channel interrupt and handles them appropriately. */
+int32_t dwc_otg_hcd_handle_hc_intr(dwc_otg_hcd_t * dwc_otg_hcd)
+{
+	int i;
+	int retval = 0;
+	haint_data_t haint;
+
+	/* Clear appropriate bits in HCINTn to clear the interrupt bit in
+	 * GINTSTS */
+
+	haint.d32 = dwc_otg_read_host_all_channels_intr(dwc_otg_hcd->core_if);
+
+	for (i = 0; i < dwc_otg_hcd->core_if->core_params->host_channels; i++) {
+		if (haint.b2.chint & (1 << i)) {
+			retval |= dwc_otg_hcd_handle_hc_n_intr(dwc_otg_hcd, i);
+		}
+	}
+
+	return retval;
+}
+
+/**
+ * Gets the actual length of a transfer after the transfer halts. _halt_status
+ * holds the reason for the halt.
+ *
+ * For IN transfers where halt_status is DWC_OTG_HC_XFER_COMPLETE,
+ * *short_read is set to 1 upon return if less than the requested
+ * number of bytes were transferred. Otherwise, *short_read is set to 0 upon
+ * return. short_read may also be NULL on entry, in which case it remains
+ * unchanged.
+ */
+static uint32_t get_actual_xfer_length(dwc_hc_t * hc,
+				       dwc_otg_hc_regs_t * hc_regs,
+				       dwc_otg_qtd_t * qtd,
+				       dwc_otg_halt_status_e halt_status,
+				       int *short_read)
+{
+	hctsiz_data_t hctsiz;
+	uint32_t length;
+
+	if (short_read != NULL) {
+		*short_read = 0;
+	}
+	hctsiz.d32 = DWC_READ_REG32(&hc_regs->hctsiz);
+
+	if (halt_status == DWC_OTG_HC_XFER_COMPLETE) {
+		if (hc->ep_is_in) {
+			length = hc->xfer_len - hctsiz.b.xfersize;
+			if (short_read != NULL) {
+				*short_read = (hctsiz.b.xfersize != 0);
+			}
+		} else if (hc->qh->do_split) {
+			length = qtd->ssplit_out_xfer_count;
+		} else {
+			length = hc->xfer_len;
+		}
+	} else {
+		/*
+		 * Must use the hctsiz.pktcnt field to determine how much data
+		 * has been transferred. This field reflects the number of
+		 * packets that have been transferred via the USB. This is
+		 * always an integral number of packets if the transfer was
+		 * halted before its normal completion. (Can't use the
+		 * hctsiz.xfersize field because that reflects the number of
+		 * bytes transferred via the AHB, not the USB).
+		 */
+		length =
+		    (hc->start_pkt_count - hctsiz.b.pktcnt) * hc->max_packet;
+	}
+
+	return length;
+}
+
+/**
+ * Updates the state of the URB after a Transfer Complete interrupt on the
+ * host channel. Updates the actual_length field of the URB based on the
+ * number of bytes transferred via the host channel. Sets the URB status
+ * if the data transfer is finished.
+ *
+ * @return 1 if the data transfer specified by the URB is completely finished,
+ * 0 otherwise.
+ */
+static int update_urb_state_xfer_comp(dwc_hc_t * hc,
+				      dwc_otg_hc_regs_t * hc_regs,
+				      dwc_otg_hcd_urb_t * urb,
+				      dwc_otg_qtd_t * qtd)
+{
+	int xfer_done = 0;
+	int short_read = 0;
+
+	int xfer_length;
+
+	xfer_length = get_actual_xfer_length(hc, hc_regs, qtd,
+					     DWC_OTG_HC_XFER_COMPLETE,
+					     &short_read);
+
+
+	/* non DWORD-aligned buffer case handling. */
+	if (hc->align_buff && xfer_length && hc->ep_is_in) {
+		dwc_memcpy(urb->buf + urb->actual_length, hc->qh->dw_align_buf,
+			   xfer_length);
+	}
+
+	urb->actual_length += xfer_length;
+
+	if (xfer_length && (hc->ep_type == DWC_OTG_EP_TYPE_BULK) &&
+	    (urb->flags & URB_SEND_ZERO_PACKET)
+	    && (urb->actual_length == urb->length)
+	    && !(urb->length % hc->max_packet)) {
+		xfer_done = 0;
+	} else if (short_read || urb->actual_length == urb->length) {
+		xfer_done = 1;
+		urb->status = 0;
+	}
+	
+#ifdef DEBUG
+	{
+		hctsiz_data_t hctsiz;
+		hctsiz.d32 = DWC_READ_REG32(&hc_regs->hctsiz);
+		DWC_DEBUGPL(DBG_HCDV, "DWC_otg: %s: %s, channel %d\n",
+			    __func__, (hc->ep_is_in ? "IN" : "OUT"),
+			    hc->hc_num);
+		DWC_DEBUGPL(DBG_HCDV, "  hc->xfer_len %d\n", hc->xfer_len);
+		DWC_DEBUGPL(DBG_HCDV, "  hctsiz.xfersize %d\n",
+			    hctsiz.b.xfersize);
+		DWC_DEBUGPL(DBG_HCDV, "  urb->transfer_buffer_length %d\n",
+			    urb->length);
+		DWC_DEBUGPL(DBG_HCDV, "  urb->actual_length %d\n",
+			    urb->actual_length);
+		DWC_DEBUGPL(DBG_HCDV, "  short_read %d, xfer_done %d\n",
+			    short_read, xfer_done);
+	}
+#endif
+
+	return xfer_done;
+}
+
+/*
+ * Save the starting data toggle for the next transfer. The data toggle is
+ * saved in the QH for non-control transfers and it's saved in the QTD for
+ * control transfers.
+ */
+void dwc_otg_hcd_save_data_toggle(dwc_hc_t * hc,
+			     dwc_otg_hc_regs_t * hc_regs, dwc_otg_qtd_t * qtd)
+{
+	hctsiz_data_t hctsiz;
+	hctsiz.d32 = DWC_READ_REG32(&hc_regs->hctsiz);
+
+	if (hc->ep_type != DWC_OTG_EP_TYPE_CONTROL) {
+		dwc_otg_qh_t *qh = hc->qh;
+		if (hctsiz.b.pid == DWC_HCTSIZ_DATA0) {
+			qh->data_toggle = DWC_OTG_HC_PID_DATA0;
+		} else {
+			qh->data_toggle = DWC_OTG_HC_PID_DATA1;
+		}
+	} else {
+		if (hctsiz.b.pid == DWC_HCTSIZ_DATA0) {
+			qtd->data_toggle = DWC_OTG_HC_PID_DATA0;
+		} else {
+			qtd->data_toggle = DWC_OTG_HC_PID_DATA1;
+		}
+	}
+}
+
+/**
+ * Updates the state of an Isochronous URB when the transfer is stopped for
+ * any reason. The fields of the current entry in the frame descriptor array
+ * are set based on the transfer state and the input _halt_status. Completes
+ * the Isochronous URB if all the URB frames have been completed.
+ *
+ * @return DWC_OTG_HC_XFER_COMPLETE if there are more frames remaining to be
+ * transferred in the URB. Otherwise return DWC_OTG_HC_XFER_URB_COMPLETE.
+ */
+static dwc_otg_halt_status_e
+update_isoc_urb_state(dwc_otg_hcd_t * hcd,
+		      dwc_hc_t * hc,
+		      dwc_otg_hc_regs_t * hc_regs,
+		      dwc_otg_qtd_t * qtd, dwc_otg_halt_status_e halt_status)
+{
+	dwc_otg_hcd_urb_t *urb = qtd->urb;
+	dwc_otg_halt_status_e ret_val = halt_status;
+	struct dwc_otg_hcd_iso_packet_desc *frame_desc;
+
+	frame_desc = &urb->iso_descs[qtd->isoc_frame_index];
+	switch (halt_status) {
+	case DWC_OTG_HC_XFER_COMPLETE:
+		frame_desc->status = 0;
+		frame_desc->actual_length =
+		    get_actual_xfer_length(hc, hc_regs, qtd, halt_status, NULL);
+
+		/* non DWORD-aligned buffer case handling. */
+		if (hc->align_buff && frame_desc->actual_length && hc->ep_is_in) {
+			dwc_memcpy(urb->buf + frame_desc->offset + qtd->isoc_split_offset,
+				   hc->qh->dw_align_buf, frame_desc->actual_length);
+		}
+		
+		break;
+	case DWC_OTG_HC_XFER_FRAME_OVERRUN:
+		urb->error_count++;
+		if (hc->ep_is_in) {
+			frame_desc->status = -DWC_E_NO_STREAM_RES;
+		} else {
+			frame_desc->status = -DWC_E_COMMUNICATION;
+		}
+		frame_desc->actual_length = 0;
+		break;
+	case DWC_OTG_HC_XFER_BABBLE_ERR:
+		urb->error_count++;
+		frame_desc->status = -DWC_E_OVERFLOW;
+		/* Don't need to update actual_length in this case. */
+		break;
+	case DWC_OTG_HC_XFER_XACT_ERR:
+		urb->error_count++;
+		frame_desc->status = -DWC_E_PROTOCOL;
+		frame_desc->actual_length =
+		    get_actual_xfer_length(hc, hc_regs, qtd, halt_status, NULL);
+
+		/* non DWORD-aligned buffer case handling. */
+		if (hc->align_buff && frame_desc->actual_length && hc->ep_is_in) {
+			dwc_memcpy(urb->buf + frame_desc->offset + qtd->isoc_split_offset,
+				   hc->qh->dw_align_buf, frame_desc->actual_length);
+		}
+		/* Skip whole frame */
+		if (hc->qh->do_split && (hc->ep_type == DWC_OTG_EP_TYPE_ISOC) &&
+		    hc->ep_is_in && hcd->core_if->dma_enable) {
+			qtd->complete_split = 0;
+			qtd->isoc_split_offset = 0;
+		}
+
+		break;
+	default:
+		DWC_ASSERT(1, "Unhandled _halt_status (%d)\n", halt_status);
+		break;
+	}
+	if (++qtd->isoc_frame_index == urb->packet_count) {
+		/*
+		 * urb->status is not used for isoc transfers.
+		 * The individual frame_desc statuses are used instead.
+		 */
+		hcd->fops->complete(hcd, urb->priv, urb, 0);
+		ret_val = DWC_OTG_HC_XFER_URB_COMPLETE;
+	} else {
+		ret_val = DWC_OTG_HC_XFER_COMPLETE;
+	}
+	return ret_val;
+}
+
+/**
+ * Frees the first QTD in the QH's list if free_qtd is 1. For non-periodic
+ * QHs, removes the QH from the active non-periodic schedule. If any QTDs are
+ * still linked to the QH, the QH is added to the end of the inactive
+ * non-periodic schedule. For periodic QHs, removes the QH from the periodic
+ * schedule if no more QTDs are linked to the QH.
+ */
+static void deactivate_qh(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh, int free_qtd)
+{
+	int continue_split = 0;
+	dwc_otg_qtd_t *qtd;
+
+	DWC_DEBUGPL(DBG_HCDV, "  %s(%p,%p,%d)\n", __func__, hcd, qh, free_qtd);
+
+	qtd = DWC_CIRCLEQ_FIRST(&qh->qtd_list);
+
+	if (qtd->complete_split) {
+		continue_split = 1;
+	} else if (qtd->isoc_split_pos == DWC_HCSPLIT_XACTPOS_MID ||
+		   qtd->isoc_split_pos == DWC_HCSPLIT_XACTPOS_END) {
+		continue_split = 1;
+	}
+
+	if (free_qtd) {
+		dwc_otg_hcd_qtd_remove_and_free(hcd, qtd, qh);
+		continue_split = 0;
+	}
+
+	qh->channel = NULL;
+	dwc_otg_hcd_qh_deactivate(hcd, qh, continue_split);
+}
+
+/**
+ * Releases a host channel for use by other transfers. Attempts to select and
+ * queue more transactions since at least one host channel is available.
+ *
+ * @param hcd The HCD state structure.
+ * @param hc The host channel to release.
+ * @param qtd The QTD associated with the host channel. This QTD may be freed
+ * if the transfer is complete or an error has occurred.
+ * @param halt_status Reason the channel is being released. This status
+ * determines the actions taken by this function.
+ */
+static void release_channel(dwc_otg_hcd_t * hcd,
+			    dwc_hc_t * hc,
+			    dwc_otg_qtd_t * qtd,
+			    dwc_otg_halt_status_e halt_status)
+{
+	dwc_otg_transaction_type_e tr_type;
+	int free_qtd;
+
+	DWC_DEBUGPL(DBG_HCDV, "  %s: channel %d, halt_status %d\n",
+		    __func__, hc->hc_num, halt_status);
+
+	switch (halt_status) {
+	case DWC_OTG_HC_XFER_URB_COMPLETE:
+		free_qtd = 1;
+		break;
+	case DWC_OTG_HC_XFER_AHB_ERR:
+	case DWC_OTG_HC_XFER_STALL:
+	case DWC_OTG_HC_XFER_BABBLE_ERR:
+		free_qtd = 1;
+		break;
+	case DWC_OTG_HC_XFER_XACT_ERR:
+		if (qtd->error_count >= 3) {
+			DWC_DEBUGPL(DBG_HCDV,
+				    "  Complete URB with transaction error\n");
+			free_qtd = 1;
+			qtd->urb->status = -DWC_E_PROTOCOL;
+			hcd->fops->complete(hcd, qtd->urb->priv,
+					    qtd->urb, -DWC_E_PROTOCOL);
+		} else {
+			free_qtd = 0;
+		}
+		break;
+	case DWC_OTG_HC_XFER_URB_DEQUEUE:
+		/*
+		 * The QTD has already been removed and the QH has been
+		 * deactivated. Don't want to do anything except release the
+		 * host channel and try to queue more transfers.
+		 */
+		goto cleanup;
+	case DWC_OTG_HC_XFER_NO_HALT_STATUS:
+		free_qtd = 0;
+		break;
+	default:
+		free_qtd = 0;
+		break;
+	}
+
+	deactivate_qh(hcd, hc->qh, free_qtd);
+
+cleanup:
+	/*
+	 * Release the host channel for use by other transfers. The cleanup
+	 * function clears the channel interrupt enables and conditions, so
+	 * there's no need to clear the Channel Halted interrupt separately.
+	 */
+	dwc_otg_hc_cleanup(hcd->core_if, hc);
+	DWC_CIRCLEQ_INSERT_TAIL(&hcd->free_hc_list, hc, hc_list_entry);
+
+	switch (hc->ep_type) {
+	case DWC_OTG_EP_TYPE_CONTROL:
+	case DWC_OTG_EP_TYPE_BULK:
+		hcd->non_periodic_channels--;
+		break;
+
+	default:
+		/*
+		 * Don't release reservations for periodic channels here.
+		 * That's done when a periodic transfer is descheduled (i.e.
+		 * when the QH is removed from the periodic schedule).
+		 */
+		break;
+	}
+
+	/* Try to queue more transfers now that there's a free channel. */
+	tr_type = dwc_otg_hcd_select_transactions(hcd);
+	if (tr_type != DWC_OTG_TRANSACTION_NONE) {
+		dwc_otg_hcd_queue_transactions(hcd, tr_type);
+	}
+}
+
+/**
+ * Halts a host channel. If the channel cannot be halted immediately because
+ * the request queue is full, this function ensures that the FIFO empty
+ * interrupt for the appropriate queue is enabled so that the halt request can
+ * be queued when there is space in the request queue.
+ *
+ * This function may also be called in DMA mode. In that case, the channel is
+ * simply released since the core always halts the channel automatically in
+ * DMA mode.
+ */
+static void halt_channel(dwc_otg_hcd_t * hcd,
+			 dwc_hc_t * hc,
+			 dwc_otg_qtd_t * qtd, dwc_otg_halt_status_e halt_status)
+{
+	if (hcd->core_if->dma_enable) {
+		release_channel(hcd, hc, qtd, halt_status);
+		return;
+	}
+
+	/* Slave mode processing... */
+	dwc_otg_hc_halt(hcd->core_if, hc, halt_status);
+
+	if (hc->halt_on_queue) {
+		gintmsk_data_t gintmsk = {.d32 = 0 };
+		dwc_otg_core_global_regs_t *global_regs;
+		global_regs = hcd->core_if->core_global_regs;
+
+		if (hc->ep_type == DWC_OTG_EP_TYPE_CONTROL ||
+		    hc->ep_type == DWC_OTG_EP_TYPE_BULK) {
+			/*
+			 * Make sure the Non-periodic Tx FIFO empty interrupt
+			 * is enabled so that the non-periodic schedule will
+			 * be processed.
+			 */
+			gintmsk.b.nptxfempty = 1;
+			DWC_MODIFY_REG32(&global_regs->gintmsk, 0, gintmsk.d32);
+		} else {
+			/*
+			 * Move the QH from the periodic queued schedule to
+			 * the periodic assigned schedule. This allows the
+			 * halt to be queued when the periodic schedule is
+			 * processed.
+			 */
+			DWC_LIST_MOVE_HEAD(&hcd->periodic_sched_assigned,
+					   &hc->qh->qh_list_entry);
+
+			/*
+			 * Make sure the Periodic Tx FIFO Empty interrupt is
+			 * enabled so that the periodic schedule will be
+			 * processed.
+			 */
+			gintmsk.b.ptxfempty = 1;
+			DWC_MODIFY_REG32(&global_regs->gintmsk, 0, gintmsk.d32);
+		}
+	}
+}
+
+/**
+ * Performs common cleanup for non-periodic transfers after a Transfer
+ * Complete interrupt. This function should be called after any endpoint type
+ * specific handling is finished to release the host channel.
+ */
+static void complete_non_periodic_xfer(dwc_otg_hcd_t * hcd,
+				       dwc_hc_t * hc,
+				       dwc_otg_hc_regs_t * hc_regs,
+				       dwc_otg_qtd_t * qtd,
+				       dwc_otg_halt_status_e halt_status)
+{
+	hcint_data_t hcint;
+
+	qtd->error_count = 0;
+
+	hcint.d32 = DWC_READ_REG32(&hc_regs->hcint);
+	if (hcint.b.nyet) {
+		/*
+		 * Got a NYET on the last transaction of the transfer. This
+		 * means that the endpoint should be in the PING state at the
+		 * beginning of the next transfer.
+		 */
+		hc->qh->ping_state = 1;
+		clear_hc_int(hc_regs, nyet);
+	}
+
+	/*
+	 * Always halt and release the host channel to make it available for
+	 * more transfers. There may still be more phases for a control
+	 * transfer or more data packets for a bulk transfer at this point,
+	 * but the host channel is still halted. A channel will be reassigned
+	 * to the transfer when the non-periodic schedule is processed after
+	 * the channel is released. This allows transactions to be queued
+	 * properly via dwc_otg_hcd_queue_transactions, which also enables the
+	 * Tx FIFO Empty interrupt if necessary.
+	 */
+	if (hc->ep_is_in) {
+		/*
+		 * IN transfers in Slave mode require an explicit disable to
+		 * halt the channel. (In DMA mode, this call simply releases
+		 * the channel.)
+		 */
+		halt_channel(hcd, hc, qtd, halt_status);
+	} else {
+		/*
+		 * The channel is automatically disabled by the core for OUT
+		 * transfers in Slave mode.
+		 */
+		release_channel(hcd, hc, qtd, halt_status);
+	}
+}
+
+/**
+ * Performs common cleanup for periodic transfers after a Transfer Complete
+ * interrupt. This function should be called after any endpoint type specific
+ * handling is finished to release the host channel.
+ */
+static void complete_periodic_xfer(dwc_otg_hcd_t * hcd,
+				   dwc_hc_t * hc,
+				   dwc_otg_hc_regs_t * hc_regs,
+				   dwc_otg_qtd_t * qtd,
+				   dwc_otg_halt_status_e halt_status)
+{
+	hctsiz_data_t hctsiz;
+	qtd->error_count = 0;
+
+	hctsiz.d32 = DWC_READ_REG32(&hc_regs->hctsiz);
+	if (!hc->ep_is_in || hctsiz.b.pktcnt == 0) {
+		/* Core halts channel in these cases. */
+		release_channel(hcd, hc, qtd, halt_status);
+	} else {
+		/* Flush any outstanding requests from the Tx queue. */
+		halt_channel(hcd, hc, qtd, halt_status);
+	}
+}
+
+static int32_t handle_xfercomp_isoc_split_in(dwc_otg_hcd_t * hcd,
+					     dwc_hc_t * hc,
+					     dwc_otg_hc_regs_t * hc_regs,
+					     dwc_otg_qtd_t * qtd)
+{
+	uint32_t len;
+	struct dwc_otg_hcd_iso_packet_desc *frame_desc;
+	frame_desc = &qtd->urb->iso_descs[qtd->isoc_frame_index];
+
+	len = get_actual_xfer_length(hc, hc_regs, qtd,
+				     DWC_OTG_HC_XFER_COMPLETE, NULL);
+
+	if (!len) {
+		qtd->complete_split = 0;
+		qtd->isoc_split_offset = 0;
+		return 0;
+	}
+	frame_desc->actual_length += len;
+
+	if (hc->align_buff && len)
+		dwc_memcpy(qtd->urb->buf + frame_desc->offset +
+			   qtd->isoc_split_offset, hc->qh->dw_align_buf, len);
+	qtd->isoc_split_offset += len;
+
+	if (frame_desc->length == frame_desc->actual_length) {
+		frame_desc->status = 0;
+		qtd->isoc_frame_index++;
+		qtd->complete_split = 0;
+		qtd->isoc_split_offset = 0;
+	}
+
+	if (qtd->isoc_frame_index == qtd->urb->packet_count) {
+		hcd->fops->complete(hcd, qtd->urb->priv, qtd->urb, 0);
+		release_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_URB_COMPLETE);
+	} else {
+		release_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_NO_HALT_STATUS);
+	}
+
+	return 1;		/* Indicates that channel released */
+}
+
+/**
+ * Handles a host channel Transfer Complete interrupt. This handler may be
+ * called in either DMA mode or Slave mode.
+ */
+static int32_t handle_hc_xfercomp_intr(dwc_otg_hcd_t * hcd,
+				       dwc_hc_t * hc,
+				       dwc_otg_hc_regs_t * hc_regs,
+				       dwc_otg_qtd_t * qtd)
+{
+	int urb_xfer_done;
+	dwc_otg_halt_status_e halt_status = DWC_OTG_HC_XFER_COMPLETE;
+	dwc_otg_hcd_urb_t *urb = qtd->urb;
+	int pipe_type = dwc_otg_hcd_get_pipe_type(&urb->pipe_info);
+
+	DWC_DEBUGPL(DBG_HCD, "--Host Channel %d Interrupt: "
+		    "Transfer Complete--\n", hc->hc_num);
+
+	if (hcd->core_if->dma_desc_enable) {
+		dwc_otg_hcd_complete_xfer_ddma(hcd, hc, hc_regs, halt_status);
+		if (pipe_type == UE_ISOCHRONOUS) {
+			/* Do not disable the interrupt, just clear it */
+			clear_hc_int(hc_regs, xfercomp);
+			return 1;
+		}
+		goto handle_xfercomp_done;
+	}
+
+	/*
+	 * Handle xfer complete on CSPLIT.
+	 */
+
+	if (hc->qh->do_split) {
+		if ((hc->ep_type == DWC_OTG_EP_TYPE_ISOC) && hc->ep_is_in
+		    && hcd->core_if->dma_enable) {
+			if (qtd->complete_split
+			    && handle_xfercomp_isoc_split_in(hcd, hc, hc_regs,
+							     qtd))
+				goto handle_xfercomp_done;
+		} else {
+			qtd->complete_split = 0;
+		}
+	}
+
+	/* Update the QTD and URB states. */
+	switch (pipe_type) {
+	case UE_CONTROL:
+		switch (qtd->control_phase) {
+		case DWC_OTG_CONTROL_SETUP:
+			if (urb->length > 0) {
+				qtd->control_phase = DWC_OTG_CONTROL_DATA;
+			} else {
+				qtd->control_phase = DWC_OTG_CONTROL_STATUS;
+			}
+			DWC_DEBUGPL(DBG_HCDV,
+				    "  Control setup transaction done\n");
+			halt_status = DWC_OTG_HC_XFER_COMPLETE;
+			break;
+		case DWC_OTG_CONTROL_DATA:{
+				urb_xfer_done =
+				    update_urb_state_xfer_comp(hc, hc_regs, urb,
+							       qtd);
+				if (urb_xfer_done) {
+					qtd->control_phase =
+					    DWC_OTG_CONTROL_STATUS;
+					DWC_DEBUGPL(DBG_HCDV,
+						    "  Control data transfer done\n");
+				} else {
+					dwc_otg_hcd_save_data_toggle(hc, hc_regs, qtd);
+				}
+				halt_status = DWC_OTG_HC_XFER_COMPLETE;
+				break;
+			}
+		case DWC_OTG_CONTROL_STATUS:
+			DWC_DEBUGPL(DBG_HCDV, "  Control transfer complete\n");
+			if (urb->status == -DWC_E_IN_PROGRESS) {
+				urb->status = 0;
+			}
+			hcd->fops->complete(hcd, urb->priv, urb, urb->status);
+			halt_status = DWC_OTG_HC_XFER_URB_COMPLETE;
+			break;
+		}
+
+		complete_non_periodic_xfer(hcd, hc, hc_regs, qtd, halt_status);
+		break;
+	case UE_BULK:
+		DWC_DEBUGPL(DBG_HCDV, "  Bulk transfer complete\n");
+		urb_xfer_done =
+		    update_urb_state_xfer_comp(hc, hc_regs, urb, qtd);
+		if (urb_xfer_done) {
+			hcd->fops->complete(hcd, urb->priv, urb, urb->status);
+			halt_status = DWC_OTG_HC_XFER_URB_COMPLETE;
+		} else {
+			halt_status = DWC_OTG_HC_XFER_COMPLETE;
+		}
+
+		dwc_otg_hcd_save_data_toggle(hc, hc_regs, qtd);
+		complete_non_periodic_xfer(hcd, hc, hc_regs, qtd, halt_status);
+		break;
+	case UE_INTERRUPT:
+		DWC_DEBUGPL(DBG_HCDV, "  Interrupt transfer complete\n");
+		update_urb_state_xfer_comp(hc, hc_regs, urb, qtd);
+
+		/*
+		 * Interrupt URB is done on the first transfer complete
+		 * interrupt.
+		 */
+		hcd->fops->complete(hcd, urb->priv, urb, urb->status);
+		dwc_otg_hcd_save_data_toggle(hc, hc_regs, qtd);
+		complete_periodic_xfer(hcd, hc, hc_regs, qtd,
+				       DWC_OTG_HC_XFER_URB_COMPLETE);
+		break;
+	case UE_ISOCHRONOUS:
+		DWC_DEBUGPL(DBG_HCDV, "  Isochronous transfer complete\n");
+		if (qtd->isoc_split_pos == DWC_HCSPLIT_XACTPOS_ALL) {
+			halt_status =
+			    update_isoc_urb_state(hcd, hc, hc_regs, qtd,
+						  DWC_OTG_HC_XFER_COMPLETE);
+		}
+		complete_periodic_xfer(hcd, hc, hc_regs, qtd, halt_status);
+		break;
+	}
+
+handle_xfercomp_done:
+	disable_hc_int(hc_regs, xfercompl);
+
+	return 1;
+}
+
+/**
+ * Handles a host channel STALL interrupt. This handler may be called in
+ * either DMA mode or Slave mode.
+ */
+static int32_t handle_hc_stall_intr(dwc_otg_hcd_t * hcd,
+				    dwc_hc_t * hc,
+				    dwc_otg_hc_regs_t * hc_regs,
+				    dwc_otg_qtd_t * qtd)
+{
+	dwc_otg_hcd_urb_t *urb = qtd->urb;
+	int pipe_type = dwc_otg_hcd_get_pipe_type(&urb->pipe_info);
+
+	DWC_DEBUGPL(DBG_HCD, "--Host Channel %d Interrupt: "
+		    "STALL Received--\n", hc->hc_num);
+
+	if (hcd->core_if->dma_desc_enable) {
+		dwc_otg_hcd_complete_xfer_ddma(hcd, hc, hc_regs, DWC_OTG_HC_XFER_STALL);
+		goto handle_stall_done;
+	}
+
+	if (pipe_type == UE_CONTROL) {
+		hcd->fops->complete(hcd, urb->priv, urb, -DWC_E_PIPE);
+	}
+
+	if (pipe_type == UE_BULK || pipe_type == UE_INTERRUPT) {
+		hcd->fops->complete(hcd, urb->priv, urb, -DWC_E_PIPE);
+		/*
+		 * USB protocol requires resetting the data toggle for bulk
+		 * and interrupt endpoints when a CLEAR_FEATURE(ENDPOINT_HALT)
+		 * setup command is issued to the endpoint. Anticipate the
+		 * CLEAR_FEATURE command since a STALL has occurred and reset
+		 * the data toggle now.
+		 */
+		hc->qh->data_toggle = 0;
+	}
+
+	halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_STALL);
+
+handle_stall_done:
+	disable_hc_int(hc_regs, stall);
+
+	return 1;
+}
+
+/*
+ * Updates the state of the URB when a transfer has been stopped due to an
+ * abnormal condition before the transfer completes. Modifies the
+ * actual_length field of the URB to reflect the number of bytes that have
+ * actually been transferred via the host channel.
+ */
+static void update_urb_state_xfer_intr(dwc_hc_t * hc,
+				       dwc_otg_hc_regs_t * hc_regs,
+				       dwc_otg_hcd_urb_t * urb,
+				       dwc_otg_qtd_t * qtd,
+				       dwc_otg_halt_status_e halt_status)
+{
+	uint32_t bytes_transferred = get_actual_xfer_length(hc, hc_regs, qtd,
+							    halt_status, NULL);
+	/* non DWORD-aligned buffer case handling. */
+	if (hc->align_buff && bytes_transferred && hc->ep_is_in) {
+		dwc_memcpy(urb->buf + urb->actual_length, hc->qh->dw_align_buf,
+			   bytes_transferred);
+	}
+
+	urb->actual_length += bytes_transferred;
+
+#ifdef DEBUG
+	{
+		hctsiz_data_t hctsiz;
+		hctsiz.d32 = DWC_READ_REG32(&hc_regs->hctsiz);
+		DWC_DEBUGPL(DBG_HCDV, "DWC_otg: %s: %s, channel %d\n",
+			    __func__, (hc->ep_is_in ? "IN" : "OUT"),
+			    hc->hc_num);
+		DWC_DEBUGPL(DBG_HCDV, "  hc->start_pkt_count %d\n",
+			    hc->start_pkt_count);
+		DWC_DEBUGPL(DBG_HCDV, "  hctsiz.pktcnt %d\n", hctsiz.b.pktcnt);
+		DWC_DEBUGPL(DBG_HCDV, "  hc->max_packet %d\n", hc->max_packet);
+		DWC_DEBUGPL(DBG_HCDV, "  bytes_transferred %d\n",
+			    bytes_transferred);
+		DWC_DEBUGPL(DBG_HCDV, "  urb->actual_length %d\n",
+			    urb->actual_length);
+		DWC_DEBUGPL(DBG_HCDV, "  urb->transfer_buffer_length %d\n",
+			    urb->length);
+	}
+#endif
+}
+
+/**
+ * Handles a host channel NAK interrupt. This handler may be called in either
+ * DMA mode or Slave mode.
+ */
+static int32_t handle_hc_nak_intr(dwc_otg_hcd_t * hcd,
+				  dwc_hc_t * hc,
+				  dwc_otg_hc_regs_t * hc_regs,
+				  dwc_otg_qtd_t * qtd)
+{
+	DWC_DEBUGPL(DBG_HCD, "--Host Channel %d Interrupt: "
+		    "NAK Received--\n", hc->hc_num);
+
+	/*
+	 * Handle NAK for IN/OUT SSPLIT/CSPLIT transfers, bulk, control, and
+	 * interrupt.  Re-start the SSPLIT transfer.
+	 */
+	if (hc->do_split) {
+		if (hc->complete_split) {
+			qtd->error_count = 0;
+		}
+		qtd->complete_split = 0;
+		halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_NAK);
+		goto handle_nak_done;
+	}
+
+	switch (dwc_otg_hcd_get_pipe_type(&qtd->urb->pipe_info)) {
+	case UE_CONTROL:
+	case UE_BULK:
+		if (hcd->core_if->dma_enable && hc->ep_is_in) {
+			/*
+			 * NAK interrupts are enabled on bulk/control IN
+			 * transfers in DMA mode for the sole purpose of
+			 * resetting the error count after a transaction error
+			 * occurs. The core will continue transferring data.
+			 */
+			qtd->error_count = 0;
+			goto handle_nak_done;
+		}
+
+		/*
+		 * NAK interrupts normally occur during OUT transfers in DMA
+		 * or Slave mode. For IN transfers, more requests will be
+		 * queued as request queue space is available.
+		 */
+		qtd->error_count = 0;
+
+		if (!hc->qh->ping_state) {
+			update_urb_state_xfer_intr(hc, hc_regs,
+						   qtd->urb, qtd,
+						   DWC_OTG_HC_XFER_NAK);
+			dwc_otg_hcd_save_data_toggle(hc, hc_regs, qtd);
+
+			if (hc->speed == DWC_OTG_EP_SPEED_HIGH)
+				hc->qh->ping_state = 1;
+		}
+
+		/*
+		 * Halt the channel so the transfer can be re-started from
+		 * the appropriate point or the PING protocol will
+		 * start/continue.
+		 */
+		halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_NAK);
+		break;
+	case UE_INTERRUPT:
+		qtd->error_count = 0;
+		halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_NAK);
+		break;
+	case UE_ISOCHRONOUS:
+		/* Should never get called for isochronous transfers. */
+		DWC_ASSERT(1, "NACK interrupt for ISOC transfer\n");
+		break;
+	}
+
+handle_nak_done:
+	disable_hc_int(hc_regs, nak);
+
+	return 1;
+}
+
+/**
+ * Handles a host channel ACK interrupt. This interrupt is enabled when
+ * performing the PING protocol in Slave mode, when errors occur during
+ * either Slave mode or DMA mode, and during Start Split transactions.
+ */
+static int32_t handle_hc_ack_intr(dwc_otg_hcd_t * hcd,
+				  dwc_hc_t * hc,
+				  dwc_otg_hc_regs_t * hc_regs,
+				  dwc_otg_qtd_t * qtd)
+{
+	DWC_DEBUGPL(DBG_HCD, "--Host Channel %d Interrupt: "
+		    "ACK Received--\n", hc->hc_num);
+
+	if (hc->do_split) {
+		/*
+		 * Handle ACK on SSPLIT.
+		 * ACK should not occur in CSPLIT.
+		 */
+		if (!hc->ep_is_in && hc->data_pid_start != DWC_OTG_HC_PID_SETUP) {
+			qtd->ssplit_out_xfer_count = hc->xfer_len;
+		}
+		if (!(hc->ep_type == DWC_OTG_EP_TYPE_ISOC && !hc->ep_is_in)) {
+			/* Don't need complete for isochronous out transfers. */
+			qtd->complete_split = 1;
+		}
+
+		/* ISOC OUT */
+		if (hc->ep_type == DWC_OTG_EP_TYPE_ISOC && !hc->ep_is_in) {
+			switch (hc->xact_pos) {
+			case DWC_HCSPLIT_XACTPOS_ALL:
+				break;
+			case DWC_HCSPLIT_XACTPOS_END:
+				qtd->isoc_split_pos = DWC_HCSPLIT_XACTPOS_ALL;
+				qtd->isoc_split_offset = 0;
+				break;
+			case DWC_HCSPLIT_XACTPOS_BEGIN:
+			case DWC_HCSPLIT_XACTPOS_MID:
+				/*
+				 * For BEGIN or MID, calculate the length for
+				 * the next microframe to determine the correct
+				 * SSPLIT token, either MID or END.
+				 */
+				{
+					struct dwc_otg_hcd_iso_packet_desc
+					*frame_desc;
+
+					frame_desc =
+					    &qtd->urb->
+					    iso_descs[qtd->isoc_frame_index];
+					qtd->isoc_split_offset += 188;
+
+					if ((frame_desc->length -
+					     qtd->isoc_split_offset) <= 188) {
+						qtd->isoc_split_pos =
+						    DWC_HCSPLIT_XACTPOS_END;
+					} else {
+						qtd->isoc_split_pos =
+						    DWC_HCSPLIT_XACTPOS_MID;
+					}
+
+				}
+				break;
+			}
+		} else {
+			halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_ACK);
+		}
+	} else {
+		qtd->error_count = 0;
+
+		if (hc->qh->ping_state) {
+			hc->qh->ping_state = 0;
+			/*
+			 * Halt the channel so the transfer can be re-started
+			 * from the appropriate point. This only happens in
+			 * Slave mode. In DMA mode, the ping_state is cleared
+			 * when the transfer is started because the core
+			 * automatically executes the PING, then the transfer.
+			 */
+			halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_ACK);
+		}
+	}
+
+	/*
+	 * If the ACK occurred when _not_ in the PING state, let the channel
+	 * continue transferring data after clearing the error count.
+	 */
+
+	disable_hc_int(hc_regs, ack);
+
+	return 1;
+}
+
+/**
+ * Handles a host channel NYET interrupt. This interrupt should only occur on
+ * Bulk and Control OUT endpoints and for complete split transactions. If a
+ * NYET occurs at the same time as a Transfer Complete interrupt, it is
+ * handled in the xfercomp interrupt handler, not here. This handler may be
+ * called in either DMA mode or Slave mode.
+ */
+static int32_t handle_hc_nyet_intr(dwc_otg_hcd_t * hcd,
+				   dwc_hc_t * hc,
+				   dwc_otg_hc_regs_t * hc_regs,
+				   dwc_otg_qtd_t * qtd)
+{
+	DWC_DEBUGPL(DBG_HCD, "--Host Channel %d Interrupt: "
+		    "NYET Received--\n", hc->hc_num);
+
+	/*
+	 * NYET on CSPLIT
+	 * re-do the CSPLIT immediately on non-periodic
+	 */
+	if (hc->do_split && hc->complete_split) {
+		if (hc->ep_is_in && (hc->ep_type == DWC_OTG_EP_TYPE_ISOC)
+		    && hcd->core_if->dma_enable) {
+			qtd->complete_split = 0;
+			qtd->isoc_split_offset = 0;
+			if (++qtd->isoc_frame_index == qtd->urb->packet_count) {
+				hcd->fops->complete(hcd, qtd->urb->priv, qtd->urb, 0);
+				release_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_URB_COMPLETE);	
+			}
+			else
+				release_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_NO_HALT_STATUS);	
+			goto handle_nyet_done;
+		}
+		
+		if (hc->ep_type == DWC_OTG_EP_TYPE_INTR ||
+		    hc->ep_type == DWC_OTG_EP_TYPE_ISOC) {
+			int frnum = dwc_otg_hcd_get_frame_number(hcd);
+
+			if (dwc_full_frame_num(frnum) !=
+			    dwc_full_frame_num(hc->qh->sched_frame)) {
+				/*
+				 * No longer in the same full speed frame.
+				 * Treat this as a transaction error.
+				 */
+#if 0
+				/** @todo Fix system performance so this can
+				 * be treated as an error. Right now complete
+				 * splits cannot be scheduled precisely enough
+				 * due to other system activity, so this error
+				 * occurs regularly in Slave mode.
+				 */
+				qtd->error_count++;
+#endif
+				qtd->complete_split = 0;
+				halt_channel(hcd, hc, qtd,
+					     DWC_OTG_HC_XFER_XACT_ERR);
+				/** @todo add support for isoc release */
+				goto handle_nyet_done;
+			}
+		}
+
+		halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_NYET);
+		goto handle_nyet_done;
+	}
+
+	hc->qh->ping_state = 1;
+	qtd->error_count = 0;
+
+	update_urb_state_xfer_intr(hc, hc_regs, qtd->urb, qtd,
+				   DWC_OTG_HC_XFER_NYET);
+	dwc_otg_hcd_save_data_toggle(hc, hc_regs, qtd);
+
+	/*
+	 * Halt the channel and re-start the transfer so the PING
+	 * protocol will start.
+	 */
+	halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_NYET);
+
+handle_nyet_done:
+	disable_hc_int(hc_regs, nyet);
+	return 1;
+}
+
+/**
+ * Handles a host channel babble interrupt. This handler may be called in
+ * either DMA mode or Slave mode.
+ */
+static int32_t handle_hc_babble_intr(dwc_otg_hcd_t * hcd,
+				     dwc_hc_t * hc,
+				     dwc_otg_hc_regs_t * hc_regs,
+				     dwc_otg_qtd_t * qtd)
+{
+	DWC_DEBUGPL(DBG_HCD, "--Host Channel %d Interrupt: "
+		    "Babble Error--\n", hc->hc_num);
+
+	if (hcd->core_if->dma_desc_enable) {
+		dwc_otg_hcd_complete_xfer_ddma(hcd, hc, hc_regs,
+					       DWC_OTG_HC_XFER_BABBLE_ERR);
+		goto handle_babble_done;
+	}
+
+	if (hc->ep_type != DWC_OTG_EP_TYPE_ISOC) {
+		hcd->fops->complete(hcd, qtd->urb->priv,
+				    qtd->urb, -DWC_E_OVERFLOW);
+		halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_BABBLE_ERR);
+	} else {
+		dwc_otg_halt_status_e halt_status;
+		halt_status = update_isoc_urb_state(hcd, hc, hc_regs, qtd,
+						    DWC_OTG_HC_XFER_BABBLE_ERR);
+		halt_channel(hcd, hc, qtd, halt_status);
+	}
+
+handle_babble_done:
+	disable_hc_int(hc_regs, bblerr);
+	return 1;
+}
+
+/**
+ * Handles a host channel AHB error interrupt. This handler is only called in
+ * DMA mode.
+ */
+static int32_t handle_hc_ahberr_intr(dwc_otg_hcd_t * hcd,
+				     dwc_hc_t * hc,
+				     dwc_otg_hc_regs_t * hc_regs,
+				     dwc_otg_qtd_t * qtd)
+{
+	hcchar_data_t hcchar;
+	hcsplt_data_t hcsplt;
+	hctsiz_data_t hctsiz;
+	uint32_t hcdma;
+	char *pipetype, *speed;
+
+	dwc_otg_hcd_urb_t *urb = qtd->urb;
+
+	DWC_DEBUGPL(DBG_HCD, "--Host Channel %d Interrupt: "
+		    "AHB Error--\n", hc->hc_num);
+
+	hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+	hcsplt.d32 = DWC_READ_REG32(&hc_regs->hcsplt);
+	hctsiz.d32 = DWC_READ_REG32(&hc_regs->hctsiz);
+	hcdma = DWC_READ_REG32(&hc_regs->hcdma);
+
+	DWC_ERROR("AHB ERROR, Channel %d\n", hc->hc_num);
+	DWC_ERROR("  hcchar 0x%08x, hcsplt 0x%08x\n", hcchar.d32, hcsplt.d32);
+	DWC_ERROR("  hctsiz 0x%08x, hcdma 0x%08x\n", hctsiz.d32, hcdma);
+	DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD URB Enqueue\n");
+	DWC_ERROR("  Device address: %d\n",
+		  dwc_otg_hcd_get_dev_addr(&urb->pipe_info));
+	DWC_ERROR("  Endpoint: %d, %s\n",
+		  dwc_otg_hcd_get_ep_num(&urb->pipe_info),
+		  (dwc_otg_hcd_is_pipe_in(&urb->pipe_info) ? "IN" : "OUT"));
+
+	switch (dwc_otg_hcd_get_pipe_type(&urb->pipe_info)) {
+	case UE_CONTROL:
+		pipetype = "CONTROL";
+		break;
+	case UE_BULK:
+		pipetype = "BULK";
+		break;
+	case UE_INTERRUPT:
+		pipetype = "INTERRUPT";
+		break;
+	case UE_ISOCHRONOUS:
+		pipetype = "ISOCHRONOUS";
+		break;
+	default:
+		pipetype = "UNKNOWN";
+		break;
+	}
+
+	DWC_ERROR("  Endpoint type: %s\n", pipetype);
+
+	switch (hc->speed) {
+	case DWC_OTG_EP_SPEED_HIGH:
+		speed = "HIGH";
+		break;
+	case DWC_OTG_EP_SPEED_FULL:
+		speed = "FULL";
+		break;
+	case DWC_OTG_EP_SPEED_LOW:
+		speed = "LOW";
+		break;
+	default:
+		speed = "UNKNOWN";
+		break;
+	};
+
+	DWC_ERROR("  Speed: %s\n", speed);
+
+	DWC_ERROR("  Max packet size: %d\n",
+		  dwc_otg_hcd_get_mps(&urb->pipe_info));
+	DWC_ERROR("  Data buffer length: %d\n", urb->length);
+	DWC_ERROR("  Transfer buffer: %p, Transfer DMA: %p\n",
+		  urb->buf, (void *)urb->dma);
+	DWC_ERROR("  Setup buffer: %p, Setup DMA: %p\n",
+		  urb->setup_packet, (void *)urb->setup_dma);
+	DWC_ERROR("  Interval: %d\n", urb->interval);
+
+	/* Core haltes the channel for Descriptor DMA mode */
+	if (hcd->core_if->dma_desc_enable) {
+		dwc_otg_hcd_complete_xfer_ddma(hcd, hc, hc_regs,
+					       DWC_OTG_HC_XFER_AHB_ERR);
+		goto handle_ahberr_done;
+	}
+
+	hcd->fops->complete(hcd, urb->priv, urb, -DWC_E_IO);
+
+	/*
+	 * Force a channel halt. Don't call halt_channel because that won't
+	 * write to the HCCHARn register in DMA mode to force the halt.
+	 */
+	dwc_otg_hc_halt(hcd->core_if, hc, DWC_OTG_HC_XFER_AHB_ERR);
+handle_ahberr_done:
+	disable_hc_int(hc_regs, ahberr);
+	return 1;
+}
+
+/**
+ * Handles a host channel transaction error interrupt. This handler may be
+ * called in either DMA mode or Slave mode.
+ */
+static int32_t handle_hc_xacterr_intr(dwc_otg_hcd_t * hcd,
+				      dwc_hc_t * hc,
+				      dwc_otg_hc_regs_t * hc_regs,
+				      dwc_otg_qtd_t * qtd)
+{
+	DWC_DEBUGPL(DBG_HCD, "--Host Channel %d Interrupt: "
+		    "Transaction Error--\n", hc->hc_num);
+
+	if (hcd->core_if->dma_desc_enable) {
+		dwc_otg_hcd_complete_xfer_ddma(hcd, hc, hc_regs,
+					       DWC_OTG_HC_XFER_XACT_ERR);
+		goto handle_xacterr_done;
+	}
+
+	switch (dwc_otg_hcd_get_pipe_type(&qtd->urb->pipe_info)) {
+	case UE_CONTROL:
+	case UE_BULK:
+		qtd->error_count++;
+		if (!hc->qh->ping_state) {
+
+			update_urb_state_xfer_intr(hc, hc_regs,
+						   qtd->urb, qtd,
+						   DWC_OTG_HC_XFER_XACT_ERR);
+			dwc_otg_hcd_save_data_toggle(hc, hc_regs, qtd);
+			if (!hc->ep_is_in && hc->speed == DWC_OTG_EP_SPEED_HIGH) {
+				hc->qh->ping_state = 1;
+			}
+		}
+
+		/*
+		 * Halt the channel so the transfer can be re-started from
+		 * the appropriate point or the PING protocol will start.
+		 */
+		halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_XACT_ERR);
+		break;
+	case UE_INTERRUPT:
+		qtd->error_count++;
+		if (hc->do_split && hc->complete_split) {
+			qtd->complete_split = 0;
+		}
+		halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_XACT_ERR);
+		break;
+	case UE_ISOCHRONOUS:
+		{
+			dwc_otg_halt_status_e halt_status;
+			halt_status =
+			    update_isoc_urb_state(hcd, hc, hc_regs, qtd,
+						  DWC_OTG_HC_XFER_XACT_ERR);
+
+			halt_channel(hcd, hc, qtd, halt_status);
+		}
+		break;
+	}
+handle_xacterr_done:
+	disable_hc_int(hc_regs, xacterr);
+
+	return 1;
+}
+
+/**
+ * Handles a host channel frame overrun interrupt. This handler may be called
+ * in either DMA mode or Slave mode.
+ */
+static int32_t handle_hc_frmovrun_intr(dwc_otg_hcd_t * hcd,
+				       dwc_hc_t * hc,
+				       dwc_otg_hc_regs_t * hc_regs,
+				       dwc_otg_qtd_t * qtd)
+{
+	DWC_DEBUGPL(DBG_HCD, "--Host Channel %d Interrupt: "
+		    "Frame Overrun--\n", hc->hc_num);
+
+	switch (dwc_otg_hcd_get_pipe_type(&qtd->urb->pipe_info)) {
+	case UE_CONTROL:
+	case UE_BULK:
+		break;
+	case UE_INTERRUPT:
+		halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_FRAME_OVERRUN);
+		break;
+	case UE_ISOCHRONOUS:
+		{
+			dwc_otg_halt_status_e halt_status;
+			halt_status =
+			    update_isoc_urb_state(hcd, hc, hc_regs, qtd,
+						  DWC_OTG_HC_XFER_FRAME_OVERRUN);
+
+			halt_channel(hcd, hc, qtd, halt_status);
+		}
+		break;
+	}
+
+	disable_hc_int(hc_regs, frmovrun);
+
+	return 1;
+}
+
+/**
+ * Handles a host channel data toggle error interrupt. This handler may be
+ * called in either DMA mode or Slave mode.
+ */
+static int32_t handle_hc_datatglerr_intr(dwc_otg_hcd_t * hcd,
+					 dwc_hc_t * hc,
+					 dwc_otg_hc_regs_t * hc_regs,
+					 dwc_otg_qtd_t * qtd)
+{
+	DWC_DEBUGPL(DBG_HCD, "--Host Channel %d Interrupt: "
+		    "Data Toggle Error--\n", hc->hc_num);
+
+	if (hc->ep_is_in) {
+		qtd->error_count = 0;
+	} else {
+		DWC_ERROR("Data Toggle Error on OUT transfer,"
+			  "channel %d\n", hc->hc_num);
+	}
+
+	disable_hc_int(hc_regs, datatglerr);
+
+	return 1;
+}
+
+#ifdef DEBUG
+/**
+ * This function is for debug only. It checks that a valid halt status is set
+ * and that HCCHARn.chdis is clear. If there's a problem, corrective action is
+ * taken and a warning is issued.
+ * @return 1 if halt status is ok, 0 otherwise.
+ */
+static inline int halt_status_ok(dwc_otg_hcd_t * hcd,
+				 dwc_hc_t * hc,
+				 dwc_otg_hc_regs_t * hc_regs,
+				 dwc_otg_qtd_t * qtd)
+{
+	hcchar_data_t hcchar;
+	hctsiz_data_t hctsiz;
+	hcint_data_t hcint;
+	hcintmsk_data_t hcintmsk;
+	hcsplt_data_t hcsplt;
+
+	if (hc->halt_status == DWC_OTG_HC_XFER_NO_HALT_STATUS) {
+		/*
+		 * This code is here only as a check. This condition should
+		 * never happen. Ignore the halt if it does occur.
+		 */
+		hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+		hctsiz.d32 = DWC_READ_REG32(&hc_regs->hctsiz);
+		hcint.d32 = DWC_READ_REG32(&hc_regs->hcint);
+		hcintmsk.d32 = DWC_READ_REG32(&hc_regs->hcintmsk);
+		hcsplt.d32 = DWC_READ_REG32(&hc_regs->hcsplt);
+		DWC_WARN
+		    ("%s: hc->halt_status == DWC_OTG_HC_XFER_NO_HALT_STATUS, "
+		     "channel %d, hcchar 0x%08x, hctsiz 0x%08x, "
+		     "hcint 0x%08x, hcintmsk 0x%08x, "
+		     "hcsplt 0x%08x, qtd->complete_split %d\n", __func__,
+		     hc->hc_num, hcchar.d32, hctsiz.d32, hcint.d32,
+		     hcintmsk.d32, hcsplt.d32, qtd->complete_split);
+
+		DWC_WARN("%s: no halt status, channel %d, ignoring interrupt\n",
+			 __func__, hc->hc_num);
+		DWC_WARN("\n");
+		clear_hc_int(hc_regs, chhltd);
+		return 0;
+	}
+
+	/*
+	 * This code is here only as a check. hcchar.chdis should
+	 * never be set when the halt interrupt occurs. Halt the
+	 * channel again if it does occur.
+	 */
+	hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar);
+	if (hcchar.b.chdis) {
+		DWC_WARN("%s: hcchar.chdis set unexpectedly, "
+			 "hcchar 0x%08x, trying to halt again\n",
+			 __func__, hcchar.d32);
+		clear_hc_int(hc_regs, chhltd);
+		hc->halt_pending = 0;
+		halt_channel(hcd, hc, qtd, hc->halt_status);
+		return 0;
+	}
+
+	return 1;
+}
+#endif
+
+/**
+ * Handles a host Channel Halted interrupt in DMA mode. This handler
+ * determines the reason the channel halted and proceeds accordingly.
+ */
+static void handle_hc_chhltd_intr_dma(dwc_otg_hcd_t * hcd,
+				      dwc_hc_t * hc,
+				      dwc_otg_hc_regs_t * hc_regs,
+				      dwc_otg_qtd_t * qtd)
+{
+	hcint_data_t hcint;
+	hcintmsk_data_t hcintmsk;
+	int out_nak_enh = 0;
+
+	/* For core with OUT NAK enhancement, the flow for high-
+	 * speed CONTROL/BULK OUT is handled a little differently.
+	 */
+	if (hcd->core_if->snpsid >= OTG_CORE_REV_2_71a) {
+		if (hc->speed == DWC_OTG_EP_SPEED_HIGH && !hc->ep_is_in &&
+		    (hc->ep_type == DWC_OTG_EP_TYPE_CONTROL ||
+		     hc->ep_type == DWC_OTG_EP_TYPE_BULK)) {
+			out_nak_enh = 1;
+		}
+	}
+
+	if (hc->halt_status == DWC_OTG_HC_XFER_URB_DEQUEUE ||
+	    (hc->halt_status == DWC_OTG_HC_XFER_AHB_ERR
+	     && !hcd->core_if->dma_desc_enable)) {
+		/*
+		 * Just release the channel. A dequeue can happen on a
+		 * transfer timeout. In the case of an AHB Error, the channel
+		 * was forced to halt because there's no way to gracefully
+		 * recover.
+		 */
+		if (hcd->core_if->dma_desc_enable)
+			dwc_otg_hcd_complete_xfer_ddma(hcd, hc, hc_regs,
+						       hc->halt_status);
+		else
+			release_channel(hcd, hc, qtd, hc->halt_status);
+		return;
+	}
+
+	/* Read the HCINTn register to determine the cause for the halt. */
+	hcint.d32 = DWC_READ_REG32(&hc_regs->hcint);
+	hcintmsk.d32 = DWC_READ_REG32(&hc_regs->hcintmsk);
+
+	if (hcint.b.xfercomp) {
+		/** @todo This is here because of a possible hardware bug.  Spec
+		 * says that on SPLIT-ISOC OUT transfers in DMA mode that a HALT
+		 * interrupt w/ACK bit set should occur, but I only see the
+		 * XFERCOMP bit, even with it masked out.  This is a workaround
+		 * for that behavior.  Should fix this when hardware is fixed.
+		 */
+		if (hc->ep_type == DWC_OTG_EP_TYPE_ISOC && !hc->ep_is_in) {
+			handle_hc_ack_intr(hcd, hc, hc_regs, qtd);
+		}
+		handle_hc_xfercomp_intr(hcd, hc, hc_regs, qtd);
+	} else if (hcint.b.stall) {
+		handle_hc_stall_intr(hcd, hc, hc_regs, qtd);
+	} else if (hcint.b.xacterr && !hcd->core_if->dma_desc_enable) {
+		if (out_nak_enh) {
+			if (hcint.b.nyet || hcint.b.nak || hcint.b.ack) {
+				DWC_DEBUG("XactErr with NYET/NAK/ACK\n");
+				qtd->error_count = 0;
+			} else {
+				DWC_DEBUG("XactErr without NYET/NAK/ACK\n");
+			}
+		}
+
+		/*
+		 * Must handle xacterr before nak or ack. Could get a xacterr
+		 * at the same time as either of these on a BULK/CONTROL OUT
+		 * that started with a PING. The xacterr takes precedence.
+		 */
+		handle_hc_xacterr_intr(hcd, hc, hc_regs, qtd);
+	} else if (hcint.b.xcs_xact && hcd->core_if->dma_desc_enable) {
+		handle_hc_xacterr_intr(hcd, hc, hc_regs, qtd);
+	} else if (hcint.b.ahberr && hcd->core_if->dma_desc_enable) {
+		handle_hc_ahberr_intr(hcd, hc, hc_regs, qtd);
+	} else if (hcint.b.bblerr) {
+		handle_hc_babble_intr(hcd, hc, hc_regs, qtd);
+	} else if (hcint.b.frmovrun) {
+		handle_hc_frmovrun_intr(hcd, hc, hc_regs, qtd);
+	} else if (!out_nak_enh) {
+		if (hcint.b.nyet) {
+			/*
+			 * Must handle nyet before nak or ack. Could get a nyet at the
+			 * same time as either of those on a BULK/CONTROL OUT that
+			 * started with a PING. The nyet takes precedence.
+			 */
+			handle_hc_nyet_intr(hcd, hc, hc_regs, qtd);
+		} else if (hcint.b.nak && !hcintmsk.b.nak) {
+			/*
+			 * If nak is not masked, it's because a non-split IN transfer
+			 * is in an error state. In that case, the nak is handled by
+			 * the nak interrupt handler, not here. Handle nak here for
+			 * BULK/CONTROL OUT transfers, which halt on a NAK to allow
+			 * rewinding the buffer pointer.
+			 */
+			handle_hc_nak_intr(hcd, hc, hc_regs, qtd);
+		} else if (hcint.b.ack && !hcintmsk.b.ack) {
+			/*
+			 * If ack is not masked, it's because a non-split IN transfer
+			 * is in an error state. In that case, the ack is handled by
+			 * the ack interrupt handler, not here. Handle ack here for
+			 * split transfers. Start splits halt on ACK.
+			 */
+			handle_hc_ack_intr(hcd, hc, hc_regs, qtd);
+		} else {
+			if (hc->ep_type == DWC_OTG_EP_TYPE_INTR ||
+			    hc->ep_type == DWC_OTG_EP_TYPE_ISOC) {
+				/*
+				 * A periodic transfer halted with no other channel
+				 * interrupts set. Assume it was halted by the core
+				 * because it could not be completed in its scheduled
+				 * (micro)frame.
+				 */
+#ifdef DEBUG
+				DWC_PRINTF
+				    ("%s: Halt channel %d (assume incomplete periodic transfer)\n",
+				     __func__, hc->hc_num);
+#endif
+				halt_channel(hcd, hc, qtd,
+					     DWC_OTG_HC_XFER_PERIODIC_INCOMPLETE);
+			} else {
+				DWC_ERROR
+				    ("%s: Channel %d, DMA Mode -- ChHltd set, but reason "
+				     "for halting is unknown, hcint 0x%08x, intsts 0x%08x\n",
+				     __func__, hc->hc_num, hcint.d32,
+				     DWC_READ_REG32(&hcd->
+						    core_if->core_global_regs->
+						    gintsts));
+			}
+
+		}
+	} else {
+		DWC_PRINTF("NYET/NAK/ACK/other in non-error case, 0x%08x\n",
+			   hcint.d32);
+	}
+}
+
+/**
+ * Handles a host channel Channel Halted interrupt.
+ *
+ * In slave mode, this handler is called only when the driver specifically
+ * requests a halt. This occurs during handling other host channel interrupts
+ * (e.g. nak, xacterr, stall, nyet, etc.).
+ *
+ * In DMA mode, this is the interrupt that occurs when the core has finished
+ * processing a transfer on a channel. Other host channel interrupts (except
+ * ahberr) are disabled in DMA mode.
+ */
+static int32_t handle_hc_chhltd_intr(dwc_otg_hcd_t * hcd,
+				     dwc_hc_t * hc,
+				     dwc_otg_hc_regs_t * hc_regs,
+				     dwc_otg_qtd_t * qtd)
+{
+	DWC_DEBUGPL(DBG_HCD, "--Host Channel %d Interrupt: "
+		    "Channel Halted--\n", hc->hc_num);
+
+	if (hcd->core_if->dma_enable) {
+		handle_hc_chhltd_intr_dma(hcd, hc, hc_regs, qtd);
+	} else {
+#ifdef DEBUG
+		if (!halt_status_ok(hcd, hc, hc_regs, qtd)) {
+			return 1;
+		}
+#endif
+		release_channel(hcd, hc, qtd, hc->halt_status);
+	}
+
+	return 1;
+}
+
+/** Handles interrupt for a specific Host Channel */
+int32_t dwc_otg_hcd_handle_hc_n_intr(dwc_otg_hcd_t * dwc_otg_hcd, uint32_t num)
+{
+	int retval = 0;
+	hcint_data_t hcint;
+	hcintmsk_data_t hcintmsk;
+	dwc_hc_t *hc;
+	dwc_otg_hc_regs_t *hc_regs;
+	dwc_otg_qtd_t *qtd;
+
+	DWC_DEBUGPL(DBG_HCDV, "--Host Channel Interrupt--, Channel %d\n", num);
+
+	hc = dwc_otg_hcd->hc_ptr_array[num];
+	hc_regs = dwc_otg_hcd->core_if->host_if->hc_regs[num];
+	qtd = DWC_CIRCLEQ_FIRST(&hc->qh->qtd_list);
+
+	hcint.d32 = DWC_READ_REG32(&hc_regs->hcint);
+	hcintmsk.d32 = DWC_READ_REG32(&hc_regs->hcintmsk);
+	DWC_DEBUGPL(DBG_HCDV,
+		    "  hcint 0x%08x, hcintmsk 0x%08x, hcint&hcintmsk 0x%08x\n",
+		    hcint.d32, hcintmsk.d32, (hcint.d32 & hcintmsk.d32));
+	hcint.d32 = hcint.d32 & hcintmsk.d32;
+
+	if (!dwc_otg_hcd->core_if->dma_enable) {
+		if (hcint.b.chhltd && hcint.d32 != 0x2) {
+			hcint.b.chhltd = 0;
+		}
+	}
+
+	if (hcint.b.xfercomp) {
+		retval |=
+		    handle_hc_xfercomp_intr(dwc_otg_hcd, hc, hc_regs, qtd);
+		/*
+		 * If NYET occurred at same time as Xfer Complete, the NYET is
+		 * handled by the Xfer Complete interrupt handler. Don't want
+		 * to call the NYET interrupt handler in this case.
+		 */
+		hcint.b.nyet = 0;
+	}
+	if (hcint.b.chhltd) {
+		retval |= handle_hc_chhltd_intr(dwc_otg_hcd, hc, hc_regs, qtd);
+	}
+	if (hcint.b.ahberr) {
+		retval |= handle_hc_ahberr_intr(dwc_otg_hcd, hc, hc_regs, qtd);
+	}
+	if (hcint.b.stall) {
+		retval |= handle_hc_stall_intr(dwc_otg_hcd, hc, hc_regs, qtd);
+	}
+	if (hcint.b.nak) {
+		retval |= handle_hc_nak_intr(dwc_otg_hcd, hc, hc_regs, qtd);
+	}
+	if (hcint.b.ack) {
+		retval |= handle_hc_ack_intr(dwc_otg_hcd, hc, hc_regs, qtd);
+	}
+	if (hcint.b.nyet) {
+		retval |= handle_hc_nyet_intr(dwc_otg_hcd, hc, hc_regs, qtd);
+	}
+	if (hcint.b.xacterr) {
+		retval |= handle_hc_xacterr_intr(dwc_otg_hcd, hc, hc_regs, qtd);
+	}
+	if (hcint.b.bblerr) {
+		retval |= handle_hc_babble_intr(dwc_otg_hcd, hc, hc_regs, qtd);
+	}
+	if (hcint.b.frmovrun) {
+		retval |=
+		    handle_hc_frmovrun_intr(dwc_otg_hcd, hc, hc_regs, qtd);
+	}
+	if (hcint.b.datatglerr) {
+		retval |=
+		    handle_hc_datatglerr_intr(dwc_otg_hcd, hc, hc_regs, qtd);
+	}
+
+	return retval;
+}
+
+#endif /* DWC_DEVICE_ONLY */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_hcd_linux.c linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_hcd_linux.c
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_hcd_linux.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_hcd_linux.c	2017-09-23 03:42:50.222674440 +0800
@@ -0,0 +1,832 @@
+/* ==========================================================================
+ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_hcd_linux.c $
+ * $Revision: #18 $
+ * $Date: 2011/05/17 $
+ * $Change: 1774126 $
+ *
+ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+ * otherwise expressly agreed to in writing between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product under
+ * any End User Software License Agreement or Agreement for Licensed Product
+ * with Synopsys or any supplement thereto. You are permitted to use and
+ * redistribute this Software in source and binary forms, with or without
+ * modification, provided that redistributions of source code must retain this
+ * notice. You may not view, use, disclose, copy or distribute this file or
+ * any information contained herein except pursuant to this license grant from
+ * Synopsys. If you do not agree with this notice, including the disclaimer
+ * below, then you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================== */
+#ifndef DWC_DEVICE_ONLY
+
+/**
+ * @file
+ *
+ * This file contains the implementation of the HCD. In Linux, the HCD
+ * implements the hc_driver API.
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/errno.h>
+#include <linux/list.h>
+#include <linux/interrupt.h>
+#include <linux/string.h>
+#include <linux/dma-mapping.h>
+#include <linux/version.h>
+#include <asm/io.h>
+#include <linux/usb.h>
+#include <linux/usb/hcd.h>
+//#include <../drivers/usb/core/hcd.h>
+
+#include "dwc_otg_hcd_if.h"
+#include "dwc_otg_dbg.h"
+#include "dwc_otg_driver.h"
+#include "dwc_otg_hcd.h"
+/**
+ * Gets the endpoint number from a _bEndpointAddress argument. The endpoint is
+ * qualified with its direction (possible 32 endpoints per device).
+ */
+#define dwc_ep_addr_to_endpoint(_bEndpointAddress_) ((_bEndpointAddress_ & USB_ENDPOINT_NUMBER_MASK) | \
+						     ((_bEndpointAddress_ & USB_DIR_IN) != 0) << 4)
+
+static const char dwc_otg_hcd_name[] = "dwc_otg_hcd";
+
+/** @name Linux HC Driver API Functions */
+/** @{ */
+static int urb_enqueue(struct usb_hcd *hcd,
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28)
+		       struct usb_host_endpoint *ep,
+#endif
+		       struct urb *urb, gfp_t mem_flags);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28)
+static int urb_dequeue(struct usb_hcd *hcd, struct urb *urb);
+#else
+static int urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status);
+#endif
+
+static void endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30)
+static void endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep);
+#endif
+static irqreturn_t dwc_otg_hcd_irq(struct usb_hcd *hcd);
+extern int hcd_start(struct usb_hcd *hcd);
+extern void hcd_stop(struct usb_hcd *hcd);
+static int get_frame_number(struct usb_hcd *hcd);
+extern int hub_status_data(struct usb_hcd *hcd, char *buf);
+extern int hub_control(struct usb_hcd *hcd,
+		       u16 typeReq,
+		       u16 wValue, u16 wIndex, char *buf, u16 wLength);
+
+struct wrapper_priv_data {
+	dwc_otg_hcd_t *dwc_otg_hcd;
+};
+
+/** @} */
+
+static struct hc_driver dwc_otg_hc_driver = {
+
+	.description = dwc_otg_hcd_name,
+	.product_desc = "DWC OTG Controller",
+	.hcd_priv_size = sizeof(struct wrapper_priv_data),
+
+	.irq = dwc_otg_hcd_irq,
+
+	.flags = HCD_MEMORY | HCD_USB2,
+
+	//.reset =              
+	.start = hcd_start,
+	//.suspend =            
+	//.resume =             
+	.stop = hcd_stop,
+
+	.urb_enqueue = urb_enqueue,
+	.urb_dequeue = urb_dequeue,
+	.endpoint_disable = endpoint_disable,
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30)
+	.endpoint_reset = endpoint_reset,
+#endif
+	.get_frame_number = get_frame_number,
+
+	.hub_status_data = hub_status_data,
+	.hub_control = hub_control,
+	//.bus_suspend =                
+	//.bus_resume =         
+};
+
+/** Gets the dwc_otg_hcd from a struct usb_hcd */
+static inline dwc_otg_hcd_t *hcd_to_dwc_otg_hcd(struct usb_hcd *hcd)
+{
+	struct wrapper_priv_data *p;
+	p = (struct wrapper_priv_data *)(hcd->hcd_priv);
+	return p->dwc_otg_hcd;
+}
+
+/** Gets the struct usb_hcd that contains a dwc_otg_hcd_t. */
+static inline struct usb_hcd *dwc_otg_hcd_to_hcd(dwc_otg_hcd_t * dwc_otg_hcd)
+{
+	return dwc_otg_hcd_get_priv_data(dwc_otg_hcd);
+}
+
+/** Gets the usb_host_endpoint associated with an URB. */
+inline struct usb_host_endpoint *dwc_urb_to_endpoint(struct urb *urb)
+{
+	struct usb_device *dev = urb->dev;
+	int ep_num = usb_pipeendpoint(urb->pipe);
+
+	if (usb_pipein(urb->pipe))
+		return dev->ep_in[ep_num];
+	else
+		return dev->ep_out[ep_num];
+}
+
+static int _disconnect(dwc_otg_hcd_t * hcd)
+{
+	struct usb_hcd *usb_hcd = dwc_otg_hcd_to_hcd(hcd);
+
+	usb_hcd->self.is_b_host = 0;
+	return 0;
+}
+
+static int _start(dwc_otg_hcd_t * hcd)
+{
+	struct usb_hcd *usb_hcd = dwc_otg_hcd_to_hcd(hcd);
+
+	usb_hcd->self.is_b_host = dwc_otg_hcd_is_b_host(hcd);
+	hcd_start(usb_hcd);
+
+	return 0;
+}
+
+static int _hub_info(dwc_otg_hcd_t * hcd, void *urb_handle, uint32_t * hub_addr,
+		     uint32_t * port_addr)
+{
+	struct urb *urb = (struct urb *)urb_handle;
+	if (urb->dev->tt) {
+		*hub_addr = urb->dev->tt->hub->devnum;
+	} else {
+		*hub_addr = 0;
+	}
+	*port_addr = urb->dev->ttport;
+	return 0;
+}
+
+static int _speed(dwc_otg_hcd_t * hcd, void *urb_handle)
+{
+	struct urb *urb = (struct urb *)urb_handle;
+	return urb->dev->speed;
+}
+
+static int _get_b_hnp_enable(dwc_otg_hcd_t * hcd)
+{
+	struct usb_hcd *usb_hcd = dwc_otg_hcd_to_hcd(hcd);
+	return usb_hcd->self.b_hnp_enable;
+}
+
+static void allocate_bus_bandwidth(struct usb_hcd *hcd, uint32_t bw,
+				   struct urb *urb)
+{
+	hcd_to_bus(hcd)->bandwidth_allocated += bw / urb->interval;
+	if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
+		hcd_to_bus(hcd)->bandwidth_isoc_reqs++;
+	} else {
+		hcd_to_bus(hcd)->bandwidth_int_reqs++;
+	}
+}
+
+static void free_bus_bandwidth(struct usb_hcd *hcd, uint32_t bw,
+			       struct urb *urb)
+{
+	hcd_to_bus(hcd)->bandwidth_allocated -= bw / urb->interval;
+	if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
+		hcd_to_bus(hcd)->bandwidth_isoc_reqs--;
+	} else {
+		hcd_to_bus(hcd)->bandwidth_int_reqs--;
+	}
+}
+
+/**
+ * Sets the final status of an URB and returns it to the device driver. Any
+ * required cleanup of the URB is performed.
+ */
+static int _complete(dwc_otg_hcd_t * hcd, void *urb_handle,
+		     dwc_otg_hcd_urb_t * dwc_otg_urb, int32_t status)
+{
+	struct urb *urb = (struct urb *)urb_handle;
+#ifdef DEBUG
+	if (CHK_DEBUG_LEVEL(DBG_HCDV | DBG_HCD_URB)) {
+		DWC_PRINTF("%s: urb %p, device %d, ep %d %s, status=%d\n",
+			   __func__, urb, usb_pipedevice(urb->pipe),
+			   usb_pipeendpoint(urb->pipe),
+			   usb_pipein(urb->pipe) ? "IN" : "OUT", status);
+		if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
+			int i;
+			for (i = 0; i < urb->number_of_packets; i++) {
+				DWC_PRINTF("  ISO Desc %d status: %d\n",
+					   i, urb->iso_frame_desc[i].status);
+			}
+		}
+	}
+#endif
+
+	urb->actual_length = dwc_otg_hcd_urb_get_actual_length(dwc_otg_urb);
+	/* Convert status value. */
+	switch (status) {
+	case -DWC_E_PROTOCOL:
+		status = -EPROTO;
+		break;
+	case -DWC_E_IN_PROGRESS:
+		status = -EINPROGRESS;
+		break;
+	case -DWC_E_PIPE:
+		status = -EPIPE;
+		break;
+	case -DWC_E_IO:
+		status = -EIO;
+		break;
+	case -DWC_E_TIMEOUT:
+		status = -ETIMEDOUT;
+		break;
+	case -DWC_E_OVERFLOW:
+		status = -EOVERFLOW;
+		break;
+	default:
+		if (status) {
+			DWC_PRINTF("Uknown urb status %d\n", status);
+
+		}
+	}
+
+	if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
+		int i;
+
+		urb->error_count = dwc_otg_hcd_urb_get_error_count(dwc_otg_urb);
+		for (i = 0; i < urb->number_of_packets; ++i) {
+			urb->iso_frame_desc[i].actual_length =
+			    dwc_otg_hcd_urb_get_iso_desc_actual_length
+			    (dwc_otg_urb, i);
+			urb->iso_frame_desc[i].status =
+			    dwc_otg_hcd_urb_get_iso_desc_status(dwc_otg_urb, i);
+		}
+	}
+
+	urb->status = status;
+	urb->hcpriv = NULL;
+	if (!status) {
+		if ((urb->transfer_flags & URB_SHORT_NOT_OK) &&
+		    (urb->actual_length < urb->transfer_buffer_length)) {
+			urb->status = -EREMOTEIO;
+		}
+	}
+
+	if ((usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) ||
+	    (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)) {
+		struct usb_host_endpoint *ep = dwc_urb_to_endpoint(urb);
+		if (ep) {
+			free_bus_bandwidth(dwc_otg_hcd_to_hcd(hcd),
+					   dwc_otg_hcd_get_ep_bandwidth(hcd,
+									ep->hcpriv),
+					   urb);
+		}
+	}
+
+	DWC_FREE(dwc_otg_urb);
+
+	DWC_SPINUNLOCK(hcd->lock);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28)
+	usb_hcd_giveback_urb(dwc_otg_hcd_to_hcd(hcd), urb);
+#else
+	usb_hcd_giveback_urb(dwc_otg_hcd_to_hcd(hcd), urb, status);
+#endif
+	DWC_SPINLOCK(hcd->lock);
+
+	return 0;
+}
+
+static struct dwc_otg_hcd_function_ops hcd_fops = {
+	.start = _start,
+	.disconnect = _disconnect,
+	.hub_info = _hub_info,
+	.speed = _speed,
+	.complete = _complete,
+	.get_b_hnp_enable = _get_b_hnp_enable,
+};
+
+/**
+ * Initializes the HCD. This function allocates memory for and initializes the
+ * static parts of the usb_hcd and dwc_otg_hcd structures. It also registers the
+ * USB bus with the core and calls the hc_driver->start() function. It returns
+ * a negative error on failure.
+ */
+int hcd_init(
+#ifdef LM_INTERFACE
+		    struct lm_device *_dev
+#elif  defined(PCI_INTERFACE)
+		    struct pci_dev *_dev
+#endif
+    )
+{
+	struct usb_hcd *hcd = NULL;
+	dwc_otg_hcd_t *dwc_otg_hcd = NULL;
+#ifdef LM_INTERFACE
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(_dev);
+#elif  defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = pci_get_drvdata(_dev);
+#endif
+
+	int retval = 0;
+
+	DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD INIT\n");
+
+	/* Set device flags indicating whether the HCD supports DMA. */
+	if (dwc_otg_is_dma_enable(otg_dev->core_if)) {
+#ifdef LM_INTERFACE
+		*_dev->dev.dma_mask = (void *)~0;
+		_dev->dev.coherent_dma_mask = ~0;
+#elif  defined(PCI_INTERFACE)
+		pci_set_dma_mask(_dev, DMA_32BIT_MASK);
+		pci_set_consistent_dma_mask(_dev, DMA_32BIT_MASK);
+#endif
+
+	} else {
+#ifdef LM_INTERFACE
+		_dev->dev.dma_mask = (void *)0;
+		_dev->dev.coherent_dma_mask = 0;
+#elif  defined(PCI_INTERFACE)
+		pci_set_dma_mask(_dev, 0);
+		pci_set_consistent_dma_mask(_dev, 0);
+#endif
+	}
+
+	/*
+	 * Allocate memory for the base HCD plus the DWC OTG HCD.
+	 * Initialize the base HCD.
+	 */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)
+	hcd = usb_create_hcd(&dwc_otg_hc_driver, &_dev->dev, _dev->dev.bus_id);
+#else
+	hcd = usb_create_hcd(&dwc_otg_hc_driver, &_dev->dev, dev_name(&_dev->dev));
+	hcd->has_tt = 1;
+//      hcd->uses_new_polling = 1;
+//      hcd->poll_rh = 0;
+#endif
+	if (!hcd) {
+		retval = -ENOMEM;
+		goto error1;
+	}
+
+	hcd->regs = otg_dev->os_dep.base;
+
+	/* Initialize the DWC OTG HCD. */
+	dwc_otg_hcd = dwc_otg_hcd_alloc_hcd();
+	if (!dwc_otg_hcd) {
+		goto error2;
+	}
+	((struct wrapper_priv_data *)(hcd->hcd_priv))->dwc_otg_hcd =
+	    dwc_otg_hcd;
+	otg_dev->hcd = dwc_otg_hcd;
+
+	if (dwc_otg_hcd_init(dwc_otg_hcd, otg_dev->core_if)) {
+		goto error2;
+	}
+
+	otg_dev->hcd->otg_dev = otg_dev;
+	hcd->self.otg_port = dwc_otg_hcd_otg_port(dwc_otg_hcd);
+	//hcd->self.otg_version = dwc_otg_get_otg_version(otg_dev->core_if);
+
+	/*
+	 * Finish generic HCD initialization and start the HCD. This function
+	 * allocates the DMA buffer pool, registers the USB bus, requests the
+	 * IRQ line, and calls hcd_start method.
+	 */
+	retval = usb_add_hcd(hcd, _dev->irq, IRQF_SHARED | IRQF_DISABLED);
+	if (retval < 0) {
+		goto error2;
+	}
+
+	dwc_otg_hcd_set_priv_data(dwc_otg_hcd, hcd);
+	return 0;
+
+error2:
+	usb_put_hcd(hcd);
+error1:
+	return retval;
+}
+
+/**
+ * Removes the HCD.
+ * Frees memory and resources associated with the HCD and deregisters the bus.
+ */
+void hcd_remove(
+#ifdef LM_INTERFACE
+		       struct lm_device *_dev
+#elif  defined(PCI_INTERFACE)
+		       struct pci_dev *_dev
+#endif
+    )
+{
+#ifdef LM_INTERFACE
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(_dev);
+#elif  defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = pci_get_drvdata(_dev);
+#endif
+
+	dwc_otg_hcd_t *dwc_otg_hcd;
+	struct usb_hcd *hcd;
+
+	DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD REMOVE\n");
+
+	if (!otg_dev) {
+		DWC_DEBUGPL(DBG_ANY, "%s: otg_dev NULL!\n", __func__);
+		return;
+	}
+
+	dwc_otg_hcd = otg_dev->hcd;
+
+	if (!dwc_otg_hcd) {
+		DWC_DEBUGPL(DBG_ANY, "%s: otg_dev->hcd NULL!\n", __func__);
+		return;
+	}
+
+	hcd = dwc_otg_hcd_to_hcd(dwc_otg_hcd);
+
+	if (!hcd) {
+		DWC_DEBUGPL(DBG_ANY,
+			    "%s: dwc_otg_hcd_to_hcd(dwc_otg_hcd) NULL!\n",
+			    __func__);
+		return;
+	}
+	usb_remove_hcd(hcd);
+	dwc_otg_hcd_set_priv_data(dwc_otg_hcd, NULL);
+	dwc_otg_hcd_remove(dwc_otg_hcd);
+	usb_put_hcd(hcd);
+}
+
+/* =========================================================================
+ *  Linux HC Driver Functions
+ * ========================================================================= */
+
+/** Initializes the DWC_otg controller and its root hub and prepares it for host
+ * mode operation. Activates the root port. Returns 0 on success and a negative
+ * error code on failure. */
+int hcd_start(struct usb_hcd *hcd)
+{
+	dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd);
+	struct usb_bus *bus;
+
+	DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD START\n");
+	bus = hcd_to_bus(hcd);
+
+	hcd->state = HC_STATE_RUNNING;
+	if (dwc_otg_hcd_start(dwc_otg_hcd, &hcd_fops)) {
+		return 0;
+	}
+
+	/* Initialize and connect root hub if one is not already attached */
+	if (bus->root_hub) {
+		DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD Has Root Hub\n");
+		/* Inform the HUB driver to resume. */
+		usb_hcd_resume_root_hub(hcd);
+	}
+
+	return 0;
+}
+
+/**
+ * Halts the DWC_otg host mode operations in a clean manner. USB transfers are
+ * stopped.
+ */
+void hcd_stop(struct usb_hcd *hcd)
+{
+	dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd);
+
+	dwc_otg_hcd_stop(dwc_otg_hcd);
+}
+
+/** Returns the current frame number. */
+static int get_frame_number(struct usb_hcd *hcd)
+{
+	dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd);
+
+	return dwc_otg_hcd_get_frame_number(dwc_otg_hcd);
+}
+
+#ifdef DEBUG
+static void dump_urb_info(struct urb *urb, char *fn_name)
+{
+	DWC_PRINTF("%s, urb %p\n", fn_name, urb);
+	DWC_PRINTF("  Device address: %d\n", usb_pipedevice(urb->pipe));
+	DWC_PRINTF("  Endpoint: %d, %s\n", usb_pipeendpoint(urb->pipe),
+		   (usb_pipein(urb->pipe) ? "IN" : "OUT"));
+	DWC_PRINTF("  Endpoint type: %s\n", ( {
+					     char *pipetype;
+					     switch (usb_pipetype(urb->pipe)) {
+case PIPE_CONTROL:
+pipetype = "CONTROL"; break; case PIPE_BULK:
+pipetype = "BULK"; break; case PIPE_INTERRUPT:
+pipetype = "INTERRUPT"; break; case PIPE_ISOCHRONOUS:
+pipetype = "ISOCHRONOUS"; break; default:
+					     pipetype = "UNKNOWN"; break;};
+					     pipetype;}
+		   )) ;
+	DWC_PRINTF("  Speed: %s\n", ( {
+				     char *speed; switch (urb->dev->speed) {
+case USB_SPEED_HIGH:
+speed = "HIGH"; break; case USB_SPEED_FULL:
+speed = "FULL"; break; case USB_SPEED_LOW:
+speed = "LOW"; break; default:
+				     speed = "UNKNOWN"; break;};
+				     speed;}
+		   )) ;
+	DWC_PRINTF("  Max packet size: %d\n",
+		   usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe)));
+	DWC_PRINTF("  Data buffer length: %d\n", urb->transfer_buffer_length);
+	DWC_PRINTF("  Transfer buffer: %p, Transfer DMA: %p\n",
+		   urb->transfer_buffer, (void *)urb->transfer_dma);
+	DWC_PRINTF("  Setup buffer: %p, Setup DMA: %p\n",
+		   urb->setup_packet, (void *)urb->setup_dma);
+	DWC_PRINTF("  Interval: %d\n", urb->interval);
+	if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
+		int i;
+		for (i = 0; i < urb->number_of_packets; i++) {
+			DWC_PRINTF("  ISO Desc %d:\n", i);
+			DWC_PRINTF("    offset: %d, length %d\n",
+				   urb->iso_frame_desc[i].offset,
+				   urb->iso_frame_desc[i].length);
+		}
+	}
+}
+
+#endif
+
+/** Starts processing a USB transfer request specified by a USB Request Block
+ * (URB). mem_flags indicates the type of memory allocation to use while
+ * processing this URB. */
+static int urb_enqueue(struct usb_hcd *hcd,
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28)
+		       struct usb_host_endpoint *ep,
+#endif
+		       struct urb *urb, gfp_t mem_flags)
+{
+	int retval = 0;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28)
+	struct usb_host_endpoint *ep = urb->ep;
+#endif
+	dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd);
+	dwc_otg_hcd_urb_t *dwc_otg_urb;
+	int i;
+	int alloc_bandwidth = 0;
+	uint8_t ep_type = 0;
+	uint32_t flags = 0;
+	void *buf;
+
+#ifdef DEBUG
+	if (CHK_DEBUG_LEVEL(DBG_HCDV | DBG_HCD_URB)) {
+		dump_urb_info(urb, "urb_enqueue");
+	}
+#endif
+
+	if ((usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
+	    || (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)) {
+		if (!dwc_otg_hcd_is_bandwidth_allocated
+		    (dwc_otg_hcd, &ep->hcpriv)) {
+			alloc_bandwidth = 1;
+		}
+	}
+
+	switch (usb_pipetype(urb->pipe)) {
+	case PIPE_CONTROL:
+		ep_type = USB_ENDPOINT_XFER_CONTROL;
+		break;
+	case PIPE_ISOCHRONOUS:
+		ep_type = USB_ENDPOINT_XFER_ISOC;
+		break;
+	case PIPE_BULK:
+		ep_type = USB_ENDPOINT_XFER_BULK;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,31)
+		if (urb->sg) {
+			DWC_WARN("SG LIST received - we don't support it\n");
+		}
+#endif
+		break;
+	case PIPE_INTERRUPT:
+		ep_type = USB_ENDPOINT_XFER_INT;
+		break;
+	default:
+		DWC_WARN("Wrong ep type\n");
+	}
+
+	dwc_otg_urb = dwc_otg_hcd_urb_alloc(dwc_otg_hcd,
+					    urb->number_of_packets,
+					    mem_flags == GFP_ATOMIC ? 1 : 0);
+
+	dwc_otg_hcd_urb_set_pipeinfo(dwc_otg_urb, usb_pipedevice(urb->pipe),
+				     usb_pipeendpoint(urb->pipe), ep_type,
+				     usb_pipein(urb->pipe),
+				     usb_maxpacket(urb->dev, urb->pipe,
+						   !(usb_pipein(urb->pipe))));
+
+	buf = urb->transfer_buffer;
+	if (hcd->self.uses_dma) {
+		/*
+		 * Calculate virtual address from physical address,
+		 * because some class driver may not fill transfer_buffer.
+		 * In Buffer DMA mode virual address is used,
+		 * when handling non DWORD aligned buffers.
+		 */
+		buf = phys_to_virt(urb->transfer_dma);
+	}
+
+	if (!(urb->transfer_flags & URB_NO_INTERRUPT))
+		flags |= URB_GIVEBACK_ASAP;
+	if (urb->transfer_flags & URB_ZERO_PACKET)
+		flags |= URB_SEND_ZERO_PACKET;
+
+	dwc_otg_hcd_urb_set_params(dwc_otg_urb, urb, buf,
+				   urb->transfer_dma,
+				   urb->transfer_buffer_length,
+				   urb->setup_packet,
+				   urb->setup_dma, flags, urb->interval);
+
+	for (i = 0; i < urb->number_of_packets; ++i) {
+		dwc_otg_hcd_urb_set_iso_desc_params(dwc_otg_urb, i,
+						    urb->
+						    iso_frame_desc[i].offset,
+						    urb->
+						    iso_frame_desc[i].length);
+	}
+
+	urb->hcpriv = dwc_otg_urb;
+	retval = dwc_otg_hcd_urb_enqueue(dwc_otg_hcd, dwc_otg_urb, &ep->hcpriv,
+					 mem_flags == GFP_ATOMIC ? 1 : 0);
+	if (!retval) {
+		if (alloc_bandwidth) {
+			allocate_bus_bandwidth(hcd,
+					       dwc_otg_hcd_get_ep_bandwidth
+					       (dwc_otg_hcd, ep->hcpriv), urb);
+		}
+	} else {
+		if (retval == -DWC_E_NO_DEVICE) {
+			retval = -ENODEV;
+		}
+	}
+
+	return retval;
+}
+
+/** Aborts/cancels a USB transfer request. Always returns 0 to indicate
+ * success.  */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28)
+static int urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
+#else
+static int urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
+#endif
+{
+	dwc_irqflags_t flags;
+	dwc_otg_hcd_t *dwc_otg_hcd;
+	DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD URB Dequeue\n");
+
+	dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd);
+
+#ifdef DEBUG
+	if (CHK_DEBUG_LEVEL(DBG_HCDV | DBG_HCD_URB)) {
+		dump_urb_info(urb, "urb_dequeue");
+	}
+#endif
+
+	DWC_SPINLOCK_IRQSAVE(dwc_otg_hcd->lock, &flags);
+
+	dwc_otg_hcd_urb_dequeue(dwc_otg_hcd, urb->hcpriv);
+
+	DWC_FREE(urb->hcpriv);
+	urb->hcpriv = NULL;
+	DWC_SPINUNLOCK_IRQRESTORE(dwc_otg_hcd->lock, flags);
+
+	/* Higher layer software sets URB status. */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28)
+	usb_hcd_giveback_urb(hcd, urb);
+#else
+	usb_hcd_giveback_urb(hcd, urb, status);
+#endif
+	if (CHK_DEBUG_LEVEL(DBG_HCDV | DBG_HCD_URB)) {
+		DWC_PRINTF("Called usb_hcd_giveback_urb()\n");
+		DWC_PRINTF("  urb->status = %d\n", urb->status);
+	}
+
+	return 0;
+}
+
+/* Frees resources in the DWC_otg controller related to a given endpoint. Also
+ * clears state in the HCD related to the endpoint. Any URBs for the endpoint
+ * must already be dequeued. */
+static void endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
+{
+	dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd);
+
+	DWC_DEBUGPL(DBG_HCD,
+		    "DWC OTG HCD EP DISABLE: _bEndpointAddress=0x%02x, "
+		    "endpoint=%d\n", ep->desc.bEndpointAddress,
+		    dwc_ep_addr_to_endpoint(ep->desc.bEndpointAddress));
+	dwc_otg_hcd_endpoint_disable(dwc_otg_hcd, ep->hcpriv, 250);
+	ep->hcpriv = NULL;
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30)
+/* Resets endpoint specific parameter values, in current version used to reset 
+ * the data toggle(as a WA). This function can be called from usb_clear_halt routine */
+static void endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
+{
+	dwc_irqflags_t flags;
+	struct usb_device *udev = NULL;
+	int epnum = usb_endpoint_num(&ep->desc);
+	int is_out = usb_endpoint_dir_out(&ep->desc);
+	int is_control = usb_endpoint_xfer_control(&ep->desc);
+	dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd);
+#ifdef LM_INTERFACE
+	struct lm_device *_dev = dwc_otg_hcd->otg_dev->os_dep.lmdev;
+#elif defined(PCI_INTERFACE)
+	struct pci_dev *_dev = dwc_otg_hcd->otg_dev->os_dep.pcidev;
+#endif
+
+	if (_dev)
+		udev = to_usb_device(&_dev->dev);
+	else
+		return;
+
+	DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD EP RESET: Endpoint Num=0x%02d\n", epnum);
+
+	DWC_SPINLOCK_IRQSAVE(dwc_otg_hcd->lock, &flags);
+	usb_settoggle(udev, epnum, is_out, 0);
+	if (is_control)
+		usb_settoggle(udev, epnum, !is_out, 0);
+
+	if (ep->hcpriv) {
+		dwc_otg_hcd_endpoint_reset(dwc_otg_hcd, ep->hcpriv);
+	}
+	DWC_SPINUNLOCK_IRQRESTORE(dwc_otg_hcd->lock, flags);
+}
+#endif
+
+/** Handles host mode interrupts for the DWC_otg controller. Returns IRQ_NONE if
+ * there was no interrupt to handle. Returns IRQ_HANDLED if there was a valid
+ * interrupt.
+ *
+ * This function is called by the USB core when an interrupt occurs */
+static irqreturn_t dwc_otg_hcd_irq(struct usb_hcd *hcd)
+{
+	dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd);
+	int32_t retval = dwc_otg_hcd_handle_intr(dwc_otg_hcd);
+	if (retval != 0) {
+		S3C2410X_CLEAR_EINTPEND();
+	}
+	return IRQ_RETVAL(retval);
+}
+
+/** Creates Status Change bitmap for the root hub and root port. The bitmap is
+ * returned in buf. Bit 0 is the status change indicator for the root hub. Bit 1
+ * is the status change indicator for the single root port. Returns 1 if either
+ * change indicator is 1, otherwise returns 0. */
+int hub_status_data(struct usb_hcd *hcd, char *buf)
+{
+	dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd);
+
+	buf[0] = 0;
+	buf[0] |= (dwc_otg_hcd_is_status_changed(dwc_otg_hcd, 1)) << 1;
+
+	return (buf[0] != 0);
+}
+
+/** Handles hub class-specific requests. */
+int hub_control(struct usb_hcd *hcd,
+		u16 typeReq, u16 wValue, u16 wIndex, char *buf, u16 wLength)
+{
+	int retval;
+
+	retval = dwc_otg_hcd_hub_control(hcd_to_dwc_otg_hcd(hcd),
+					 typeReq, wValue, wIndex, buf, wLength);
+
+	switch (retval) {
+	case -DWC_E_INVALID:
+		retval = -EINVAL;
+		break;
+	}
+
+	return retval;
+}
+
+#endif /* DWC_DEVICE_ONLY */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/.dwc_otg_hcd_linux.c.swp linux-3.0.82x/drivers/usb/gadget/dwc/driver/.dwc_otg_hcd_linux.c.swp
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diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_hcd_queue.c linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_hcd_queue.c
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_hcd_queue.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_hcd_queue.c	2017-09-23 03:42:50.226674428 +0800
@@ -0,0 +1,708 @@
+/* ==========================================================================
+ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_hcd_queue.c $
+ * $Revision: #42 $
+ * $Date: 2010/11/29 $
+ * $Change: 1636033 $
+ *
+ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+ * otherwise expressly agreed to in writing between Synopsys and you.
+ * 
+ * The Software IS NOT an item of Licensed Software or Licensed Product under
+ * any End User Software License Agreement or Agreement for Licensed Product
+ * with Synopsys or any supplement thereto. You are permitted to use and
+ * redistribute this Software in source and binary forms, with or without
+ * modification, provided that redistributions of source code must retain this
+ * notice. You may not view, use, disclose, copy or distribute this file or
+ * any information contained herein except pursuant to this license grant from
+ * Synopsys. If you do not agree with this notice, including the disclaimer
+ * below, then you are not authorized to use the Software.
+ * 
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================== */
+#ifndef DWC_DEVICE_ONLY
+
+/**
+ * @file
+ *
+ * This file contains the functions to manage Queue Heads and Queue
+ * Transfer Descriptors.
+ */
+
+#include "dwc_otg_hcd.h"
+#include "dwc_otg_regs.h"
+
+/** 
+ * Free each QTD in the QH's QTD-list then free the QH.  QH should already be
+ * removed from a list.  QTD list should already be empty if called from URB
+ * Dequeue.
+ *
+ * @param hcd HCD instance.
+ * @param qh The QH to free.
+ */
+void dwc_otg_hcd_qh_free(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh)
+{
+	dwc_otg_qtd_t *qtd, *qtd_tmp;
+
+	/* Free each QTD in the QTD list */
+	DWC_SPINLOCK(hcd->lock);
+	DWC_CIRCLEQ_FOREACH_SAFE(qtd, qtd_tmp, &qh->qtd_list, qtd_list_entry) {
+		DWC_CIRCLEQ_REMOVE(&qh->qtd_list, qtd, qtd_list_entry);
+		dwc_otg_hcd_qtd_free(qtd);
+	}
+
+	if (hcd->core_if->dma_desc_enable) {
+		dwc_otg_hcd_qh_free_ddma(hcd, qh);
+	} else if (qh->dw_align_buf) {
+		uint32_t buf_size;
+		if (qh->ep_type == UE_ISOCHRONOUS) {
+			buf_size = 4096;
+		} else {
+			buf_size = hcd->core_if->core_params->max_transfer_size;
+		}
+		DWC_DMA_FREE(buf_size, qh->dw_align_buf, qh->dw_align_buf_dma);
+	}
+
+	DWC_FREE(qh);
+	DWC_SPINUNLOCK(hcd->lock);
+	return;
+}
+
+#define BitStuffTime(bytecount)  ((8 * 7* bytecount) / 6)
+#define HS_HOST_DELAY		5	/* nanoseconds */
+#define FS_LS_HOST_DELAY	1000	/* nanoseconds */
+#define HUB_LS_SETUP		333	/* nanoseconds */
+#define NS_TO_US(ns)		((ns + 500) / 1000)
+				/* convert & round nanoseconds to microseconds */
+
+static uint32_t calc_bus_time(int speed, int is_in, int is_isoc, int bytecount)
+{
+	unsigned long retval;
+
+	switch (speed) {
+	case USB_SPEED_HIGH:
+		if (is_isoc) {
+			retval =
+			    ((38 * 8 * 2083) +
+			     (2083 * (3 + BitStuffTime(bytecount)))) / 1000 +
+			    HS_HOST_DELAY;
+		} else {
+			retval =
+			    ((55 * 8 * 2083) +
+			     (2083 * (3 + BitStuffTime(bytecount)))) / 1000 +
+			    HS_HOST_DELAY;
+		}
+		break;
+	case USB_SPEED_FULL:
+		if (is_isoc) {
+			retval =
+			    (8354 * (31 + 10 * BitStuffTime(bytecount))) / 1000;
+			if (is_in) {
+				retval = 7268 + FS_LS_HOST_DELAY + retval;
+			} else {
+				retval = 6265 + FS_LS_HOST_DELAY + retval;
+			}
+		} else {
+			retval =
+			    (8354 * (31 + 10 * BitStuffTime(bytecount))) / 1000;
+			retval = 9107 + FS_LS_HOST_DELAY + retval;
+		}
+		break;
+	case USB_SPEED_LOW:
+		if (is_in) {
+			retval =
+			    (67667 * (31 + 10 * BitStuffTime(bytecount))) /
+			    1000;
+			retval =
+			    64060 + (2 * HUB_LS_SETUP) + FS_LS_HOST_DELAY +
+			    retval;
+		} else {
+			retval =
+			    (66700 * (31 + 10 * BitStuffTime(bytecount))) /
+			    1000;
+			retval =
+			    64107 + (2 * HUB_LS_SETUP) + FS_LS_HOST_DELAY +
+			    retval;
+		}
+		break;
+	default:
+		DWC_WARN("Unknown device speed\n");
+		retval = -1;
+	}
+
+	return NS_TO_US(retval);
+}
+
+/** 
+ * Initializes a QH structure.
+ *
+ * @param hcd The HCD state structure for the DWC OTG controller.
+ * @param qh  The QH to init.
+ * @param urb Holds the information about the device/endpoint that we need
+ * 	      to initialize the QH. 
+ */
+#define SCHEDULE_SLOP 10
+void qh_init(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh, dwc_otg_hcd_urb_t * urb)
+{
+	char *speed, *type;
+	int dev_speed;
+	uint32_t hub_addr, hub_port;
+
+	dwc_memset(qh, 0, sizeof(dwc_otg_qh_t));
+
+	/* Initialize QH */
+	qh->ep_type = dwc_otg_hcd_get_pipe_type(&urb->pipe_info);
+	qh->ep_is_in = dwc_otg_hcd_is_pipe_in(&urb->pipe_info) ? 1 : 0;
+
+	qh->data_toggle = DWC_OTG_HC_PID_DATA0;
+	qh->maxp = dwc_otg_hcd_get_mps(&urb->pipe_info);
+	DWC_CIRCLEQ_INIT(&qh->qtd_list);
+	DWC_LIST_INIT(&qh->qh_list_entry);
+	qh->channel = NULL;
+
+	/* FS/LS Enpoint on HS Hub 
+	 * NOT virtual root hub */
+	dev_speed = hcd->fops->speed(hcd, urb->priv);
+
+	hcd->fops->hub_info(hcd, urb->priv, &hub_addr, &hub_port);
+	qh->do_split = 0;
+
+	if (((dev_speed == USB_SPEED_LOW) ||
+	     (dev_speed == USB_SPEED_FULL)) &&
+	    (hub_addr != 0 && hub_addr != 1)) {
+		DWC_DEBUGPL(DBG_HCD,
+			    "QH init: EP %d: TT found at hub addr %d, for port %d\n",
+			    dwc_otg_hcd_get_ep_num(&urb->pipe_info), hub_addr,
+			    hub_port);
+		qh->do_split = 1;
+	}
+
+	if (qh->ep_type == UE_INTERRUPT || qh->ep_type == UE_ISOCHRONOUS) {
+		/* Compute scheduling parameters once and save them. */
+		hprt0_data_t hprt;
+
+		/** @todo Account for split transfers in the bus time. */
+		int bytecount =
+		    dwc_hb_mult(qh->maxp) * dwc_max_packet(qh->maxp);
+
+		qh->usecs =
+		    calc_bus_time((qh->do_split ? USB_SPEED_HIGH : dev_speed),
+				  qh->ep_is_in, (qh->ep_type == UE_ISOCHRONOUS),
+				  bytecount);
+		/* Start in a slightly future (micro)frame. */
+		qh->sched_frame = dwc_frame_num_inc(hcd->frame_number,
+						    SCHEDULE_SLOP);
+		qh->interval = urb->interval;
+
+#if 0
+		/* Increase interrupt polling rate for debugging. */
+		if (qh->ep_type == UE_INTERRUPT) {
+			qh->interval = 8;
+		}
+#endif
+		hprt.d32 = DWC_READ_REG32(hcd->core_if->host_if->hprt0);
+		if ((hprt.b.prtspd == DWC_HPRT0_PRTSPD_HIGH_SPEED) &&
+		    ((dev_speed == USB_SPEED_LOW) ||
+		     (dev_speed == USB_SPEED_FULL))) {
+			qh->interval *= 8;
+			qh->sched_frame |= 0x7;
+			qh->start_split_frame = qh->sched_frame;
+		}
+
+	}
+
+	DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD QH Initialized\n");
+	DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD QH  - qh = %p\n", qh);
+	DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD QH  - Device Address = %d\n",
+		    dwc_otg_hcd_get_dev_addr(&urb->pipe_info));
+	DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD QH  - Endpoint %d, %s\n",
+		    dwc_otg_hcd_get_ep_num(&urb->pipe_info),
+		    dwc_otg_hcd_is_pipe_in(&urb->pipe_info) ? "IN" : "OUT");
+	switch (dev_speed) {
+	case USB_SPEED_LOW:
+		qh->dev_speed = DWC_OTG_EP_SPEED_LOW;
+		speed = "low";
+		break;
+	case USB_SPEED_FULL:
+		qh->dev_speed = DWC_OTG_EP_SPEED_FULL;
+		speed = "full";
+		break;
+	case USB_SPEED_HIGH:
+		qh->dev_speed = DWC_OTG_EP_SPEED_HIGH;
+		speed = "high";
+		break;
+	default:
+		speed = "?";
+		break;
+	}
+	DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD QH  - Speed = %s\n", speed);
+
+	switch (qh->ep_type) {
+	case UE_ISOCHRONOUS:
+		type = "isochronous";
+		break;
+	case UE_INTERRUPT:
+		type = "interrupt";
+		break;
+	case UE_CONTROL:
+		type = "control";
+		break;
+	case UE_BULK:
+		type = "bulk";
+		break;
+	default:
+		type = "?";
+		break;
+	}
+
+	DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD QH  - Type = %s\n", type);
+
+#ifdef DEBUG
+	if (qh->ep_type == UE_INTERRUPT) {
+		DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD QH - usecs = %d\n",
+			    qh->usecs);
+		DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD QH - interval = %d\n",
+			    qh->interval);
+	}
+#endif
+
+}
+
+/**
+ * This function allocates and initializes a QH.
+ *
+ * @param hcd The HCD state structure for the DWC OTG controller.
+ * @param urb Holds the information about the device/endpoint that we need
+ * 	      to initialize the QH.
+ *
+ * @return Returns pointer to the newly allocated QH, or NULL on error. */
+dwc_otg_qh_t *dwc_otg_hcd_qh_create(dwc_otg_hcd_t * hcd,
+				    dwc_otg_hcd_urb_t * urb, int atomic_alloc)
+{
+	dwc_otg_qh_t *qh;
+
+	/* Allocate memory */
+	/** @todo add memflags argument */
+	qh = dwc_otg_hcd_qh_alloc(atomic_alloc);
+	if (qh == NULL) {
+		DWC_ERROR("qh allocation failed");
+		return NULL;
+	}
+
+	qh_init(hcd, qh, urb);
+
+	if (hcd->core_if->dma_desc_enable
+	    && (dwc_otg_hcd_qh_init_ddma(hcd, qh) < 0)) {
+		dwc_otg_hcd_qh_free(hcd, qh);
+		return NULL;
+	}
+
+	return qh;
+}
+
+/**
+ * Checks that a channel is available for a periodic transfer.
+ *
+ * @return 0 if successful, negative error code otherise.
+ */
+static int periodic_channel_available(dwc_otg_hcd_t * hcd)
+{
+	/*
+	 * Currently assuming that there is a dedicated host channnel for each
+	 * periodic transaction plus at least one host channel for
+	 * non-periodic transactions.
+	 */
+	int status;
+	int num_channels;
+
+	num_channels = hcd->core_if->core_params->host_channels;
+	if ((hcd->periodic_channels + hcd->non_periodic_channels < num_channels)
+	    && (hcd->periodic_channels < num_channels - 1)) {
+		status = 0;
+	} else {
+		DWC_INFO("%s: Total channels: %d, Periodic: %d, Non-periodic: %d\n",
+			__func__, num_channels, hcd->periodic_channels, hcd->non_periodic_channels);	//NOTICE
+		status = -DWC_E_NO_SPACE;
+	}
+
+	return status;
+}
+
+/**
+ * Checks that there is sufficient bandwidth for the specified QH in the
+ * periodic schedule. For simplicity, this calculation assumes that all the
+ * transfers in the periodic schedule may occur in the same (micro)frame.
+ *
+ * @param hcd The HCD state structure for the DWC OTG controller.
+ * @param qh QH containing periodic bandwidth required.
+ *
+ * @return 0 if successful, negative error code otherwise.
+ */
+static int check_periodic_bandwidth(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh)
+{
+	int status;
+	int16_t max_claimed_usecs;
+
+	status = 0;
+
+	if ((qh->dev_speed == DWC_OTG_EP_SPEED_HIGH) || qh->do_split) {
+		/*
+		 * High speed mode.
+		 * Max periodic usecs is 80% x 125 usec = 100 usec.
+		 */
+
+		max_claimed_usecs = 100 - qh->usecs;
+	} else {
+		/*
+		 * Full speed mode.
+		 * Max periodic usecs is 90% x 1000 usec = 900 usec.
+		 */
+		max_claimed_usecs = 900 - qh->usecs;
+	}
+
+	if (hcd->periodic_usecs > max_claimed_usecs) {
+		DWC_INFO("%s: already claimed usecs %d, required usecs %d\n", __func__, hcd->periodic_usecs, qh->usecs);	//NOTICE
+		status = -DWC_E_NO_SPACE;
+	}
+
+	return status;
+}
+
+/**
+ * Checks that the max transfer size allowed in a host channel is large enough
+ * to handle the maximum data transfer in a single (micro)frame for a periodic
+ * transfer.
+ *
+ * @param hcd The HCD state structure for the DWC OTG controller.
+ * @param qh QH for a periodic endpoint.
+ *
+ * @return 0 if successful, negative error code otherwise.
+ */
+static int check_max_xfer_size(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh)
+{
+	int status;
+	uint32_t max_xfer_size;
+	uint32_t max_channel_xfer_size;
+
+	status = 0;
+
+	max_xfer_size = dwc_max_packet(qh->maxp) * dwc_hb_mult(qh->maxp);
+	max_channel_xfer_size = hcd->core_if->core_params->max_transfer_size;
+
+	if (max_xfer_size > max_channel_xfer_size) {
+		DWC_INFO("%s: Periodic xfer length %d > " "max xfer length for channel %d\n",
+				__func__, max_xfer_size, max_channel_xfer_size);	//NOTICE
+		status = -DWC_E_NO_SPACE;
+	}
+
+	return status;
+}
+
+/**
+ * Schedules an interrupt or isochronous transfer in the periodic schedule.
+ *
+ * @param hcd The HCD state structure for the DWC OTG controller.
+ * @param qh QH for the periodic transfer. The QH should already contain the
+ * scheduling information.
+ *
+ * @return 0 if successful, negative error code otherwise.
+ */
+static int schedule_periodic(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh)
+{
+	int status = 0;
+
+	status = periodic_channel_available(hcd);
+	if (status) {
+		DWC_INFO("%s: No host channel available for periodic " "transfer.\n", __func__);	//NOTICE
+		return status;
+	}
+
+	status = check_periodic_bandwidth(hcd, qh);
+	if (status) {
+		DWC_INFO("%s: Insufficient periodic bandwidth for " "periodic transfer.\n", __func__);	//NOTICE
+		return status;
+	}
+
+	status = check_max_xfer_size(hcd, qh);
+	if (status) {
+		DWC_INFO("%s: Channel max transfer size too small " "for periodic transfer.\n", __func__);	//NOTICE
+		return status;
+	}
+
+	if (hcd->core_if->dma_desc_enable) {
+		/* Don't rely on SOF and start in ready schedule */
+		DWC_LIST_INSERT_TAIL(&hcd->periodic_sched_ready, &qh->qh_list_entry);
+	}
+	else {
+	/* Always start in the inactive schedule. */
+	DWC_LIST_INSERT_TAIL(&hcd->periodic_sched_inactive, &qh->qh_list_entry);
+	}
+
+	/* Reserve the periodic channel. */
+	hcd->periodic_channels++;
+
+	/* Update claimed usecs per (micro)frame. */
+	hcd->periodic_usecs += qh->usecs;
+
+	return status;
+}
+
+/**
+ * This function adds a QH to either the non periodic or periodic schedule if
+ * it is not already in the schedule. If the QH is already in the schedule, no
+ * action is taken.
+ *
+ * @return 0 if successful, negative error code otherwise.
+ */
+int dwc_otg_hcd_qh_add(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh)
+{
+	int status = 0;
+
+	if (!DWC_LIST_EMPTY(&qh->qh_list_entry)) {
+		/* QH already in a schedule. */
+		return status;
+	}
+
+	/* Add the new QH to the appropriate schedule */
+	if (dwc_qh_is_non_per(qh)) {
+		/* Always start in the inactive schedule. */
+		DWC_LIST_INSERT_TAIL(&hcd->non_periodic_sched_inactive,
+				     &qh->qh_list_entry);
+	} else {
+		status = schedule_periodic(hcd, qh);
+	}
+
+	return status;
+}
+
+/**
+ * Removes an interrupt or isochronous transfer from the periodic schedule.
+ *
+ * @param hcd The HCD state structure for the DWC OTG controller.
+ * @param qh QH for the periodic transfer.
+ */
+static void deschedule_periodic(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh)
+{
+	DWC_LIST_REMOVE_INIT(&qh->qh_list_entry);
+
+	/* Release the periodic channel reservation. */
+	hcd->periodic_channels--;
+
+	/* Update claimed usecs per (micro)frame. */
+	hcd->periodic_usecs -= qh->usecs;
+}
+
+/** 
+ * Removes a QH from either the non-periodic or periodic schedule.  Memory is
+ * not freed.
+ *
+ * @param hcd The HCD state structure.
+ * @param qh QH to remove from schedule. */
+void dwc_otg_hcd_qh_remove(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh)
+{
+	if (DWC_LIST_EMPTY(&qh->qh_list_entry)) {
+		/* QH is not in a schedule. */
+		return;
+	}
+
+	if (dwc_qh_is_non_per(qh)) {
+		if (hcd->non_periodic_qh_ptr == &qh->qh_list_entry) {
+			hcd->non_periodic_qh_ptr =
+			    hcd->non_periodic_qh_ptr->next;
+		}
+		DWC_LIST_REMOVE_INIT(&qh->qh_list_entry);
+	} else {
+		deschedule_periodic(hcd, qh);
+	}
+}
+
+/**
+ * Deactivates a QH. For non-periodic QHs, removes the QH from the active
+ * non-periodic schedule. The QH is added to the inactive non-periodic
+ * schedule if any QTDs are still attached to the QH.
+ *
+ * For periodic QHs, the QH is removed from the periodic queued schedule. If
+ * there are any QTDs still attached to the QH, the QH is added to either the
+ * periodic inactive schedule or the periodic ready schedule and its next
+ * scheduled frame is calculated. The QH is placed in the ready schedule if
+ * the scheduled frame has been reached already. Otherwise it's placed in the
+ * inactive schedule. If there are no QTDs attached to the QH, the QH is
+ * completely removed from the periodic schedule.
+ */
+void dwc_otg_hcd_qh_deactivate(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh,
+			       int sched_next_periodic_split)
+{	
+	if (dwc_qh_is_non_per(qh)) {
+		dwc_otg_hcd_qh_remove(hcd, qh);
+		if (!DWC_CIRCLEQ_EMPTY(&qh->qtd_list)) {
+			/* Add back to inactive non-periodic schedule. */
+			dwc_otg_hcd_qh_add(hcd, qh);
+		}
+	} else {
+		uint16_t frame_number = dwc_otg_hcd_get_frame_number(hcd);
+
+		if (qh->do_split) {
+			/* Schedule the next continuing periodic split transfer */
+			if (sched_next_periodic_split) {
+
+				qh->sched_frame = frame_number;
+				if (dwc_frame_num_le(frame_number,
+						     dwc_frame_num_inc
+						     (qh->start_split_frame,
+						      1))) {
+					/*
+					 * Allow one frame to elapse after start
+					 * split microframe before scheduling
+					 * complete split, but DONT if we are
+					 * doing the next start split in the
+					 * same frame for an ISOC out.
+					 */
+					if ((qh->ep_type != UE_ISOCHRONOUS) ||
+					    (qh->ep_is_in != 0)) {
+						qh->sched_frame =
+						    dwc_frame_num_inc(qh->sched_frame, 1);
+					}
+				}
+			} else {
+				qh->sched_frame =
+				    dwc_frame_num_inc(qh->start_split_frame,
+						      qh->interval);
+				if (dwc_frame_num_le
+				    (qh->sched_frame, frame_number)) {
+					qh->sched_frame = frame_number;
+				}
+				qh->sched_frame |= 0x7;
+				qh->start_split_frame = qh->sched_frame;
+			}
+		} else {
+			qh->sched_frame =
+			    dwc_frame_num_inc(qh->sched_frame, qh->interval);
+			if (dwc_frame_num_le(qh->sched_frame, frame_number)) {
+				qh->sched_frame = frame_number;
+			}
+		}
+
+		if (DWC_CIRCLEQ_EMPTY(&qh->qtd_list)) {
+			dwc_otg_hcd_qh_remove(hcd, qh);
+		} else {
+			/*
+			 * Remove from periodic_sched_queued and move to
+			 * appropriate queue.
+			 */
+			if (qh->sched_frame == frame_number) {
+				DWC_LIST_MOVE_HEAD(&hcd->periodic_sched_ready,
+						   &qh->qh_list_entry);
+			} else {
+				DWC_LIST_MOVE_HEAD
+				    (&hcd->periodic_sched_inactive,
+				     &qh->qh_list_entry);
+			}
+		}
+	}
+}
+
+/** 
+ * This function allocates and initializes a QTD. 
+ *
+ * @param urb The URB to create a QTD from.  Each URB-QTD pair will end up
+ * 	      pointing to each other so each pair should have a unique correlation.
+ *
+ * @return Returns pointer to the newly allocated QTD, or NULL on error. */
+dwc_otg_qtd_t *dwc_otg_hcd_qtd_create(dwc_otg_hcd_urb_t * urb, int atomic_alloc)
+{
+	dwc_otg_qtd_t *qtd;
+
+	qtd = dwc_otg_hcd_qtd_alloc(atomic_alloc);
+	if (qtd == NULL) {
+		return NULL;
+	}
+
+	dwc_otg_hcd_qtd_init(qtd, urb);
+	return qtd;
+}
+
+/** 
+ * Initializes a QTD structure.
+ *
+ * @param qtd The QTD to initialize.
+ * @param urb The URB to use for initialization.  */
+void dwc_otg_hcd_qtd_init(dwc_otg_qtd_t * qtd, dwc_otg_hcd_urb_t * urb)
+{
+	dwc_memset(qtd, 0, sizeof(dwc_otg_qtd_t));
+	qtd->urb = urb;
+	if (dwc_otg_hcd_get_pipe_type(&urb->pipe_info) == UE_CONTROL) {
+		/*
+		 * The only time the QTD data toggle is used is on the data
+		 * phase of control transfers. This phase always starts with
+		 * DATA1.
+		 */
+		qtd->data_toggle = DWC_OTG_HC_PID_DATA1;
+		qtd->control_phase = DWC_OTG_CONTROL_SETUP;
+	}
+
+	/* start split */
+	qtd->complete_split = 0;
+	qtd->isoc_split_pos = DWC_HCSPLIT_XACTPOS_ALL;
+	qtd->isoc_split_offset = 0;
+	qtd->in_process = 0;
+
+	/* Store the qtd ptr in the urb to reference what QTD. */
+	urb->qtd = qtd;
+	return;
+}
+
+/**
+ * This function adds a QTD to the QTD-list of a QH.  It will find the correct
+ * QH to place the QTD into.  If it does not find a QH, then it will create a
+ * new QH. If the QH to which the QTD is added is not currently scheduled, it
+ * is placed into the proper schedule based on its EP type.
+ *
+ * @param[in] qtd The QTD to add
+ * @param[in] hcd The DWC HCD structure
+ * @param[out] qh out parameter to return queue head
+ *
+ * @return 0 if successful, negative error code otherwise.
+ */
+int dwc_otg_hcd_qtd_add(dwc_otg_qtd_t * qtd,
+			dwc_otg_hcd_t * hcd, dwc_otg_qh_t ** qh, int atomic_alloc)
+{
+	int retval = 0;
+	dwc_irqflags_t flags;
+
+	dwc_otg_hcd_urb_t *urb = qtd->urb;
+
+	/*
+	 * Get the QH which holds the QTD-list to insert to. Create QH if it
+	 * doesn't exist.
+	 */
+	if (*qh == NULL) {
+		*qh = dwc_otg_hcd_qh_create(hcd, urb, atomic_alloc);
+		if (*qh == NULL) {
+			retval = -1;
+			goto done;
+		}
+	}
+	DWC_SPINLOCK_IRQSAVE(hcd->lock, &flags);
+	retval = dwc_otg_hcd_qh_add(hcd, *qh);
+	if (retval == 0) {
+		DWC_CIRCLEQ_INSERT_TAIL(&((*qh)->qtd_list), qtd,
+					qtd_list_entry);
+	}
+	DWC_SPINUNLOCK_IRQRESTORE(hcd->lock, flags);
+
+done:
+
+	return retval;
+}
+
+#endif /* DWC_DEVICE_ONLY */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_os_dep.h linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_os_dep.h
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_os_dep.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_os_dep.h	2017-09-23 03:42:50.226674428 +0800
@@ -0,0 +1,106 @@
+#ifndef _DWC_OS_DEP_H_
+#define _DWC_OS_DEP_H_
+
+/**
+ * @file
+ *
+ * This file contains OS dependent structures.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/errno.h>
+#include <linux/types.h>
+#include <linux/slab.h>
+#include <linux/list.h>
+#include <linux/interrupt.h>
+#include <linux/ctype.h>
+#include <linux/string.h>
+#include <linux/dma-mapping.h>
+#include <linux/jiffies.h>
+#include <linux/delay.h>
+#include <linux/timer.h>
+#include <linux/workqueue.h>
+#include <linux/stat.h>
+#include <linux/pci.h>
+
+#include <linux/version.h>
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
+# include <linux/irq.h>
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)
+# include <linux/usb/ch9.h>
+#else
+# include <linux/usb_ch9.h>
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
+# include <linux/usb/gadget.h>
+#else
+# include <linux/usb_gadget.h>
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
+# include <asm/irq.h>
+#endif
+
+#ifdef PCI_INTERFACE
+# include <asm/io.h>
+#endif
+
+#ifdef LM_INTERFACE
+#if defined(__mips__) 
+# include "lm.h"
+#else
+# include <asm/unaligned.h>
+# include <asm/sizes.h>
+# include <asm/param.h>
+# include <asm/io.h>
+# include <asm/arch/lm.h>
+# include <asm/arch/irqs.h>
+# include <asm/arch/regs-irq.h>
+#endif
+#endif
+
+/** The OS page size */
+#define DWC_OS_PAGE_SIZE	PAGE_SIZE
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,14)
+typedef int gfp_t;
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)
+# define IRQF_SHARED SA_SHIRQ
+#endif
+
+typedef struct os_dependent {
+	/** Base address returned from ioremap() */
+	void *base;
+
+	/** Register offset for Diagnostic API */
+	uint32_t reg_offset;
+
+#ifdef LM_INTERFACE
+	struct lm_device *lmdev;
+#elif  defined(PCI_INTERFACE)
+	struct pci_dev *pcidev;
+
+	/** Start address of a PCI region */
+	resource_size_t rsrc_start;
+	
+	/** Length address of a PCI region */
+	resource_size_t rsrc_len;
+#endif
+} os_dependent_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _DWC_OS_DEP_H_ */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_pcd.c linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_pcd.c
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_pcd.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_pcd.c	2017-09-23 03:42:50.226674428 +0800
@@ -0,0 +1,2592 @@
+/* ==========================================================================
+ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_pcd.c $
+ * $Revision: #97 $
+ * $Date: 2011/05/17 $
+ * $Change: 1774110 $
+ *
+ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+ * otherwise expressly agreed to in writing between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product under
+ * any End User Software License Agreement or Agreement for Licensed Product
+ * with Synopsys or any supplement thereto. You are permitted to use and
+ * redistribute this Software in source and binary forms, with or without
+ * modification, provided that redistributions of source code must retain this
+ * notice. You may not view, use, disclose, copy or distribute this file or
+ * any information contained herein except pursuant to this license grant from
+ * Synopsys. If you do not agree with this notice, including the disclaimer
+ * below, then you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================== */
+#ifndef DWC_HOST_ONLY
+
+/** @file
+ * This file implements PCD Core. All code in this file is portable and doesn't
+ * use any OS specific functions.
+ * PCD Core provides Interface, defined in <code><dwc_otg_pcd_if.h></code>
+ * header file, which can be used to implement OS specific PCD interface.
+ *
+ * An important function of the PCD is managing interrupts generated
+ * by the DWC_otg controller. The implementation of the DWC_otg device
+ * mode interrupt service routines is in dwc_otg_pcd_intr.c.
+ *
+ * @todo Add Device Mode test modes (Test J mode, Test K mode, etc).
+ * @todo Does it work when the request size is greater than DEPTSIZ
+ * transfer size
+ *
+ */
+
+#include "dwc_otg_pcd.h"
+
+#ifdef DWC_UTE_CFI
+#include "dwc_otg_cfi.h"
+
+extern int init_cfi(cfiobject_t * cfiobj);
+#endif
+
+/**
+ * Choose endpoint from ep arrays using usb_ep structure.
+ */
+static dwc_otg_pcd_ep_t *get_ep_from_handle(dwc_otg_pcd_t * pcd, void *handle)
+{
+	int i;
+	if (pcd->ep0.priv == handle) {
+		return &pcd->ep0;
+	}
+	for (i = 0; i < MAX_EPS_CHANNELS - 1; i++) {
+		if (pcd->in_ep[i].priv == handle)
+			return &pcd->in_ep[i];
+		if (pcd->out_ep[i].priv == handle)
+			return &pcd->out_ep[i];
+	}
+
+	return NULL;
+}
+
+/**
+ * This function completes a request.  It call's the request call back.
+ */
+void dwc_otg_request_done(dwc_otg_pcd_ep_t * ep, dwc_otg_pcd_request_t * req,
+			  int32_t status)
+{
+	unsigned stopped = ep->stopped;
+
+	DWC_DEBUGPL(DBG_PCDV, "%s(%p)\n", __func__, ep);
+	DWC_CIRCLEQ_REMOVE_INIT(&ep->queue, req, queue_entry);
+
+	/* don't modify queue heads during completion callback */
+	ep->stopped = 1;
+	/* spin_unlock/spin_lock now done in fops->complete() */
+	ep->pcd->fops->complete(ep->pcd, ep->priv, req->priv, status,
+				req->actual);
+
+	if (ep->pcd->request_pending > 0) {
+		--ep->pcd->request_pending;
+	}
+
+	ep->stopped = stopped;
+	DWC_FREE(req);
+}
+
+/**
+ * This function terminates all the requsts in the EP request queue.
+ */
+void dwc_otg_request_nuke(dwc_otg_pcd_ep_t * ep)
+{
+	dwc_otg_pcd_request_t *req;
+
+	ep->stopped = 1;
+
+	/* called with irqs blocked?? */
+	while (!DWC_CIRCLEQ_EMPTY(&ep->queue)) {
+		req = DWC_CIRCLEQ_FIRST(&ep->queue);
+		dwc_otg_request_done(ep, req, -DWC_E_SHUTDOWN);
+	}
+}
+
+void dwc_otg_pcd_start(dwc_otg_pcd_t * pcd,
+		       const struct dwc_otg_pcd_function_ops *fops)
+{
+	pcd->fops = fops;
+}
+
+/**
+ * PCD Callback function for initializing the PCD when switching to
+ * device mode.
+ *
+ * @param p void pointer to the <code>dwc_otg_pcd_t</code>
+ */
+static int32_t dwc_otg_pcd_start_cb(void *p)
+{
+	dwc_otg_pcd_t *pcd = (dwc_otg_pcd_t *) p;
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+
+	/*
+	 * Initialized the Core for Device mode.
+	 */
+	if (dwc_otg_is_device_mode(core_if)) {
+		dwc_otg_core_dev_init(core_if);
+		/* Set core_if's lock pointer to the pcd->lock */
+		core_if->lock = pcd->lock;
+	}
+	return 1;
+}
+
+/** CFI-specific buffer allocation function for EP */
+#ifdef DWC_UTE_CFI
+uint8_t *cfiw_ep_alloc_buffer(dwc_otg_pcd_t * pcd, void *pep, dwc_dma_t * addr,
+			      size_t buflen, int flags)
+{
+	dwc_otg_pcd_ep_t *ep;
+	ep = get_ep_from_handle(pcd, pep);
+	if (!ep) {
+		DWC_WARN("bad ep\n");
+		return -DWC_E_INVALID;
+	}
+
+	return pcd->cfi->ops.ep_alloc_buf(pcd->cfi, pcd, ep, addr, buflen,
+					  flags);
+}
+#else
+uint8_t *cfiw_ep_alloc_buffer(dwc_otg_pcd_t * pcd, void *pep, dwc_dma_t * addr,
+			      size_t buflen, int flags);
+#endif
+
+/**
+ * PCD Callback function for notifying the PCD when resuming from
+ * suspend.
+ *
+ * @param p void pointer to the <code>dwc_otg_pcd_t</code>
+ */
+static int32_t dwc_otg_pcd_resume_cb(void *p)
+{
+	dwc_otg_pcd_t *pcd = (dwc_otg_pcd_t *) p;
+
+	if (pcd->fops->resume) {
+		pcd->fops->resume(pcd);
+	}
+
+	/* Stop the SRP timeout timer. */
+	if ((GET_CORE_IF(pcd)->core_params->phy_type != DWC_PHY_TYPE_PARAM_FS)
+	    || (!GET_CORE_IF(pcd)->core_params->i2c_enable)) {
+		if (GET_CORE_IF(pcd)->srp_timer_started) {
+			GET_CORE_IF(pcd)->srp_timer_started = 0;
+			DWC_TIMER_CANCEL(GET_CORE_IF(pcd)->srp_timer);
+		}
+	}
+	return 1;
+}
+
+/**
+ * PCD Callback function for notifying the PCD device is suspended.
+ *
+ * @param p void pointer to the <code>dwc_otg_pcd_t</code>
+ */
+static int32_t dwc_otg_pcd_suspend_cb(void *p)
+{
+	dwc_otg_pcd_t *pcd = (dwc_otg_pcd_t *) p;
+
+	if (pcd->fops->suspend) {
+		DWC_SPINUNLOCK(pcd->lock);
+		pcd->fops->suspend(pcd);
+		DWC_SPINLOCK(pcd->lock);
+	}
+
+	return 1;
+}
+
+/**
+ * PCD Callback function for stopping the PCD when switching to Host
+ * mode.
+ *
+ * @param p void pointer to the <code>dwc_otg_pcd_t</code>
+ */
+static int32_t dwc_otg_pcd_stop_cb(void *p)
+{
+	dwc_otg_pcd_t *pcd = (dwc_otg_pcd_t *) p;
+	extern void dwc_otg_pcd_stop(dwc_otg_pcd_t * _pcd);
+
+	dwc_otg_pcd_stop(pcd);
+	return 1;
+}
+
+/**
+ * PCD Callback structure for handling mode switching.
+ */
+static dwc_otg_cil_callbacks_t pcd_callbacks = {
+	.start = dwc_otg_pcd_start_cb,
+	.stop = dwc_otg_pcd_stop_cb,
+	.suspend = dwc_otg_pcd_suspend_cb,
+	.resume_wakeup = dwc_otg_pcd_resume_cb,
+	.p = 0,			/* Set at registration */
+};
+
+/**
+ * This function allocates a DMA Descriptor chain for the Endpoint
+ * buffer to be used for a transfer to/from the specified endpoint.
+ */
+dwc_otg_dev_dma_desc_t *dwc_otg_ep_alloc_desc_chain(dwc_dma_t * dma_desc_addr,
+						    uint32_t count)
+{
+	return DWC_DMA_ALLOC_ATOMIC(count * sizeof(dwc_otg_dev_dma_desc_t), 
+							dma_desc_addr);
+}
+
+/**
+ * This function frees a DMA Descriptor chain that was allocated by ep_alloc_desc.
+ */
+void dwc_otg_ep_free_desc_chain(dwc_otg_dev_dma_desc_t * desc_addr,
+				uint32_t dma_desc_addr, uint32_t count)
+{
+	DWC_DMA_FREE(count * sizeof(dwc_otg_dev_dma_desc_t), desc_addr,
+		     dma_desc_addr);
+}
+
+#ifdef DWC_EN_ISOC
+
+/**
+ * This function initializes a descriptor chain for Isochronous transfer
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param dwc_ep The EP to start the transfer on.
+ *
+ */
+void dwc_otg_iso_ep_start_ddma_transfer(dwc_otg_core_if_t * core_if,
+					dwc_ep_t * dwc_ep)
+{
+
+	dsts_data_t dsts = {.d32 = 0 };
+	depctl_data_t depctl = {.d32 = 0 };
+	volatile uint32_t *addr;
+	int i, j;
+	uint32_t len;
+
+	if (dwc_ep->is_in)
+		dwc_ep->desc_cnt = dwc_ep->buf_proc_intrvl / dwc_ep->bInterval;
+	else
+		dwc_ep->desc_cnt =
+		    dwc_ep->buf_proc_intrvl * dwc_ep->pkt_per_frm /
+		    dwc_ep->bInterval;
+
+	/** Allocate descriptors for double buffering */
+	dwc_ep->iso_desc_addr =
+	    dwc_otg_ep_alloc_desc_chain(&dwc_ep->iso_dma_desc_addr,
+					dwc_ep->desc_cnt * 2);
+	if (dwc_ep->desc_addr) {
+		DWC_WARN("%s, can't allocate DMA descriptor chain\n", __func__);
+		return;
+	}
+
+	dsts.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dsts);
+
+	/** ISO OUT EP */
+	if (dwc_ep->is_in == 0) {
+		dev_dma_desc_sts_t sts = {.d32 = 0 };
+		dwc_otg_dev_dma_desc_t *dma_desc = dwc_ep->iso_desc_addr;
+		dma_addr_t dma_ad;
+		uint32_t data_per_desc;
+		dwc_otg_dev_out_ep_regs_t *out_regs =
+		    core_if->dev_if->out_ep_regs[dwc_ep->num];
+		int offset;
+
+		addr = &core_if->dev_if->out_ep_regs[dwc_ep->num]->doepctl;
+		dma_ad = (dma_addr_t) DWC_READ_REG32(&(out_regs->doepdma));
+
+		/** Buffer 0 descriptors setup */
+		dma_ad = dwc_ep->dma_addr0;
+
+		sts.b_iso_out.bs = BS_HOST_READY;
+		sts.b_iso_out.rxsts = 0;
+		sts.b_iso_out.l = 0;
+		sts.b_iso_out.sp = 0;
+		sts.b_iso_out.ioc = 0;
+		sts.b_iso_out.pid = 0;
+		sts.b_iso_out.framenum = 0;
+
+		offset = 0;
+		for (i = 0; i < dwc_ep->desc_cnt - dwc_ep->pkt_per_frm;
+		     i += dwc_ep->pkt_per_frm) {
+
+			for (j = 0; j < dwc_ep->pkt_per_frm; ++j) {
+				uint32_t len = (j + 1) * dwc_ep->maxpacket;
+				if (len > dwc_ep->data_per_frame)
+					data_per_desc =
+					    dwc_ep->data_per_frame -
+					    j * dwc_ep->maxpacket;
+				else
+					data_per_desc = dwc_ep->maxpacket;
+				len = data_per_desc % 4;
+				if (len)
+					data_per_desc += 4 - len;
+
+				sts.b_iso_out.rxbytes = data_per_desc;
+				dma_desc->buf = dma_ad;
+				dma_desc->status.d32 = sts.d32;
+
+				offset += data_per_desc;
+				dma_desc++;
+				dma_ad += data_per_desc;
+			}
+		}
+
+		for (j = 0; j < dwc_ep->pkt_per_frm - 1; ++j) {
+			uint32_t len = (j + 1) * dwc_ep->maxpacket;
+			if (len > dwc_ep->data_per_frame)
+				data_per_desc =
+				    dwc_ep->data_per_frame -
+				    j * dwc_ep->maxpacket;
+			else
+				data_per_desc = dwc_ep->maxpacket;
+			len = data_per_desc % 4;
+			if (len)
+				data_per_desc += 4 - len;
+			sts.b_iso_out.rxbytes = data_per_desc;
+			dma_desc->buf = dma_ad;
+			dma_desc->status.d32 = sts.d32;
+
+			offset += data_per_desc;
+			dma_desc++;
+			dma_ad += data_per_desc;
+		}
+
+		sts.b_iso_out.ioc = 1;
+		len = (j + 1) * dwc_ep->maxpacket;
+		if (len > dwc_ep->data_per_frame)
+			data_per_desc =
+			    dwc_ep->data_per_frame - j * dwc_ep->maxpacket;
+		else
+			data_per_desc = dwc_ep->maxpacket;
+		len = data_per_desc % 4;
+		if (len)
+			data_per_desc += 4 - len;
+		sts.b_iso_out.rxbytes = data_per_desc;
+
+		dma_desc->buf = dma_ad;
+		dma_desc->status.d32 = sts.d32;
+		dma_desc++;
+
+		/** Buffer 1 descriptors setup */
+		sts.b_iso_out.ioc = 0;
+		dma_ad = dwc_ep->dma_addr1;
+
+		offset = 0;
+		for (i = 0; i < dwc_ep->desc_cnt - dwc_ep->pkt_per_frm;
+		     i += dwc_ep->pkt_per_frm) {
+			for (j = 0; j < dwc_ep->pkt_per_frm; ++j) {
+				uint32_t len = (j + 1) * dwc_ep->maxpacket;
+				if (len > dwc_ep->data_per_frame)
+					data_per_desc =
+					    dwc_ep->data_per_frame -
+					    j * dwc_ep->maxpacket;
+				else
+					data_per_desc = dwc_ep->maxpacket;
+				len = data_per_desc % 4;
+				if (len)
+					data_per_desc += 4 - len;
+
+				data_per_desc =
+				    sts.b_iso_out.rxbytes = data_per_desc;
+				dma_desc->buf = dma_ad;
+				dma_desc->status.d32 = sts.d32;
+
+				offset += data_per_desc;
+				dma_desc++;
+				dma_ad += data_per_desc;
+			}
+		}
+		for (j = 0; j < dwc_ep->pkt_per_frm - 1; ++j) {
+			data_per_desc =
+			    ((j + 1) * dwc_ep->maxpacket >
+			     dwc_ep->data_per_frame) ? dwc_ep->data_per_frame -
+			    j * dwc_ep->maxpacket : dwc_ep->maxpacket;
+			data_per_desc +=
+			    (data_per_desc % 4) ? (4 - data_per_desc % 4) : 0;
+			sts.b_iso_out.rxbytes = data_per_desc;
+			dma_desc->buf = dma_ad;
+			dma_desc->status.d32 = sts.d32;
+
+			offset += data_per_desc;
+			dma_desc++;
+			dma_ad += data_per_desc;
+		}
+
+		sts.b_iso_out.ioc = 1;
+		sts.b_iso_out.l = 1;
+		data_per_desc =
+		    ((j + 1) * dwc_ep->maxpacket >
+		     dwc_ep->data_per_frame) ? dwc_ep->data_per_frame -
+		    j * dwc_ep->maxpacket : dwc_ep->maxpacket;
+		data_per_desc +=
+		    (data_per_desc % 4) ? (4 - data_per_desc % 4) : 0;
+		sts.b_iso_out.rxbytes = data_per_desc;
+
+		dma_desc->buf = dma_ad;
+		dma_desc->status.d32 = sts.d32;
+
+		dwc_ep->next_frame = 0;
+
+		/** Write dma_ad into DOEPDMA register */
+		DWC_WRITE_REG32(&(out_regs->doepdma),
+				(uint32_t) dwc_ep->iso_dma_desc_addr);
+
+	}
+	/** ISO IN EP */
+	else {
+		dev_dma_desc_sts_t sts = {.d32 = 0 };
+		dwc_otg_dev_dma_desc_t *dma_desc = dwc_ep->iso_desc_addr;
+		dma_addr_t dma_ad;
+		dwc_otg_dev_in_ep_regs_t *in_regs =
+		    core_if->dev_if->in_ep_regs[dwc_ep->num];
+		unsigned int frmnumber;
+		fifosize_data_t txfifosize, rxfifosize;
+
+		txfifosize.d32 =
+		    DWC_READ_REG32(&core_if->dev_if->
+				   in_ep_regs[dwc_ep->num]->dtxfsts);
+		rxfifosize.d32 =
+		    DWC_READ_REG32(&core_if->core_global_regs->grxfsiz);
+
+		addr = &core_if->dev_if->in_ep_regs[dwc_ep->num]->diepctl;
+
+		dma_ad = dwc_ep->dma_addr0;
+
+		dsts.d32 =
+		    DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dsts);
+
+		sts.b_iso_in.bs = BS_HOST_READY;
+		sts.b_iso_in.txsts = 0;
+		sts.b_iso_in.sp =
+		    (dwc_ep->data_per_frame % dwc_ep->maxpacket) ? 1 : 0;
+		sts.b_iso_in.ioc = 0;
+		sts.b_iso_in.pid = dwc_ep->pkt_per_frm;
+
+		frmnumber = dwc_ep->next_frame;
+
+		sts.b_iso_in.framenum = frmnumber;
+		sts.b_iso_in.txbytes = dwc_ep->data_per_frame;
+		sts.b_iso_in.l = 0;
+
+		/** Buffer 0 descriptors setup */
+		for (i = 0; i < dwc_ep->desc_cnt - 1; i++) {
+			dma_desc->buf = dma_ad;
+			dma_desc->status.d32 = sts.d32;
+			dma_desc++;
+
+			dma_ad += dwc_ep->data_per_frame;
+			sts.b_iso_in.framenum += dwc_ep->bInterval;
+		}
+
+		sts.b_iso_in.ioc = 1;
+		dma_desc->buf = dma_ad;
+		dma_desc->status.d32 = sts.d32;
+		++dma_desc;
+
+		/** Buffer 1 descriptors setup */
+		sts.b_iso_in.ioc = 0;
+		dma_ad = dwc_ep->dma_addr1;
+
+		for (i = 0; i < dwc_ep->desc_cnt - dwc_ep->pkt_per_frm;
+		     i += dwc_ep->pkt_per_frm) {
+			dma_desc->buf = dma_ad;
+			dma_desc->status.d32 = sts.d32;
+			dma_desc++;
+
+			dma_ad += dwc_ep->data_per_frame;
+			sts.b_iso_in.framenum += dwc_ep->bInterval;
+
+			sts.b_iso_in.ioc = 0;
+		}
+		sts.b_iso_in.ioc = 1;
+		sts.b_iso_in.l = 1;
+
+		dma_desc->buf = dma_ad;
+		dma_desc->status.d32 = sts.d32;
+
+		dwc_ep->next_frame = sts.b_iso_in.framenum + dwc_ep->bInterval;
+
+		/** Write dma_ad into diepdma register */
+		DWC_WRITE_REG32(&(in_regs->diepdma),
+				(uint32_t) dwc_ep->iso_dma_desc_addr);
+	}
+	/** Enable endpoint, clear nak  */
+	depctl.d32 = 0;
+	depctl.b.epena = 1;
+	depctl.b.usbactep = 1;
+	depctl.b.cnak = 1;
+
+	DWC_MODIFY_REG32(addr, depctl.d32, depctl.d32);
+	depctl.d32 = DWC_READ_REG32(addr);
+}
+
+/**
+ * This function initializes a descriptor chain for Isochronous transfer
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param ep The EP to start the transfer on.
+ *
+ */
+void dwc_otg_iso_ep_start_buf_transfer(dwc_otg_core_if_t * core_if,
+				       dwc_ep_t * ep)
+{
+	depctl_data_t depctl = {.d32 = 0 };
+	volatile uint32_t *addr;
+
+	if (ep->is_in) {
+		addr = &core_if->dev_if->in_ep_regs[ep->num]->diepctl;
+	} else {
+		addr = &core_if->dev_if->out_ep_regs[ep->num]->doepctl;
+	}
+
+	if (core_if->dma_enable == 0 || core_if->dma_desc_enable != 0) {
+		return;
+	} else {
+		deptsiz_data_t deptsiz = {.d32 = 0 };
+
+		ep->xfer_len =
+		    ep->data_per_frame * ep->buf_proc_intrvl / ep->bInterval;
+		ep->pkt_cnt =
+		    (ep->xfer_len - 1 + ep->maxpacket) / ep->maxpacket;
+		ep->xfer_count = 0;
+		ep->xfer_buff =
+		    (ep->proc_buf_num) ? ep->xfer_buff1 : ep->xfer_buff0;
+		ep->dma_addr =
+		    (ep->proc_buf_num) ? ep->dma_addr1 : ep->dma_addr0;
+
+		if (ep->is_in) {
+			/* Program the transfer size and packet count
+			 *      as follows: xfersize = N * maxpacket +
+			 *      short_packet pktcnt = N + (short_packet
+			 *      exist ? 1 : 0) 
+			 */
+			deptsiz.b.mc = ep->pkt_per_frm;
+			deptsiz.b.xfersize = ep->xfer_len;
+			deptsiz.b.pktcnt =
+			    (ep->xfer_len - 1 + ep->maxpacket) / ep->maxpacket;
+			DWC_WRITE_REG32(&core_if->dev_if->
+					in_ep_regs[ep->num]->dieptsiz,
+					deptsiz.d32);
+
+			/* Write the DMA register */
+			DWC_WRITE_REG32(&
+					(core_if->dev_if->
+					 in_ep_regs[ep->num]->diepdma),
+					(uint32_t) ep->dma_addr);
+
+		} else {
+			deptsiz.b.pktcnt =
+			    (ep->xfer_len + (ep->maxpacket - 1)) /
+			    ep->maxpacket;
+			deptsiz.b.xfersize = deptsiz.b.pktcnt * ep->maxpacket;
+
+			DWC_WRITE_REG32(&core_if->dev_if->
+					out_ep_regs[ep->num]->doeptsiz,
+					deptsiz.d32);
+
+			/* Write the DMA register */
+			DWC_WRITE_REG32(&
+					(core_if->dev_if->
+					 out_ep_regs[ep->num]->doepdma),
+					(uint32_t) ep->dma_addr);
+
+		}
+		/** Enable endpoint, clear nak  */
+		depctl.d32 = 0;
+		depctl.b.epena = 1;
+		depctl.b.cnak = 1;
+
+		DWC_MODIFY_REG32(addr, depctl.d32, depctl.d32);
+	}
+}
+
+/**
+ * This function does the setup for a data transfer for an EP and
+ * starts the transfer. For an IN transfer, the packets will be
+ * loaded into the appropriate Tx FIFO in the ISR. For OUT transfers,
+ * the packets are unloaded from the Rx FIFO in the ISR.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param ep The EP to start the transfer on.
+ */
+
+static void dwc_otg_iso_ep_start_transfer(dwc_otg_core_if_t * core_if,
+					  dwc_ep_t * ep)
+{
+	if (core_if->dma_enable) {
+		if (core_if->dma_desc_enable) {
+			if (ep->is_in) {
+				ep->desc_cnt = ep->pkt_cnt / ep->pkt_per_frm;
+			} else {
+				ep->desc_cnt = ep->pkt_cnt;
+			}
+			dwc_otg_iso_ep_start_ddma_transfer(core_if, ep);
+		} else {
+			if (core_if->pti_enh_enable) {
+				dwc_otg_iso_ep_start_buf_transfer(core_if, ep);
+			} else {
+				ep->cur_pkt_addr =
+				    (ep->proc_buf_num) ? ep->
+				    xfer_buff1 : ep->xfer_buff0;
+				ep->cur_pkt_dma_addr =
+				    (ep->proc_buf_num) ? ep->
+				    dma_addr1 : ep->dma_addr0;
+				dwc_otg_iso_ep_start_frm_transfer(core_if, ep);
+			}
+		}
+	} else {
+		ep->cur_pkt_addr =
+		    (ep->proc_buf_num) ? ep->xfer_buff1 : ep->xfer_buff0;
+		ep->cur_pkt_dma_addr =
+		    (ep->proc_buf_num) ? ep->dma_addr1 : ep->dma_addr0;
+		dwc_otg_iso_ep_start_frm_transfer(core_if, ep);
+	}
+}
+
+/**
+ * This function stops transfer for an EP and
+ * resets the ep's variables. 
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param ep The EP to start the transfer on.
+ */
+
+void dwc_otg_iso_ep_stop_transfer(dwc_otg_core_if_t * core_if, dwc_ep_t * ep)
+{
+	depctl_data_t depctl = {.d32 = 0 };
+	volatile uint32_t *addr;
+
+	if (ep->is_in == 1) {
+		addr = &core_if->dev_if->in_ep_regs[ep->num]->diepctl;
+	} else {
+		addr = &core_if->dev_if->out_ep_regs[ep->num]->doepctl;
+	}
+
+	/* disable the ep */
+	depctl.d32 = DWC_READ_REG32(addr);
+
+	depctl.b.epdis = 1;
+	depctl.b.snak = 1;
+
+	DWC_WRITE_REG32(addr, depctl.d32);
+
+	if (core_if->dma_desc_enable &&
+	    ep->iso_desc_addr && ep->iso_dma_desc_addr) {
+		dwc_otg_ep_free_desc_chain(ep->iso_desc_addr,
+					   ep->iso_dma_desc_addr,
+					   ep->desc_cnt * 2);
+	}
+
+	/* reset varibales */
+	ep->dma_addr0 = 0;
+	ep->dma_addr1 = 0;
+	ep->xfer_buff0 = 0;
+	ep->xfer_buff1 = 0;
+	ep->data_per_frame = 0;
+	ep->data_pattern_frame = 0;
+	ep->sync_frame = 0;
+	ep->buf_proc_intrvl = 0;
+	ep->bInterval = 0;
+	ep->proc_buf_num = 0;
+	ep->pkt_per_frm = 0;
+	ep->pkt_per_frm = 0;
+	ep->desc_cnt = 0;
+	ep->iso_desc_addr = 0;
+	ep->iso_dma_desc_addr = 0;
+}
+
+int dwc_otg_pcd_iso_ep_start(dwc_otg_pcd_t * pcd, void *ep_handle,
+			     uint8_t * buf0, uint8_t * buf1, dwc_dma_t dma0,
+			     dwc_dma_t dma1, int sync_frame, int dp_frame,
+			     int data_per_frame, int start_frame,
+			     int buf_proc_intrvl, void *req_handle,
+			     int atomic_alloc)
+{
+	dwc_otg_pcd_ep_t *ep;
+	dwc_irqflags_t flags = 0;
+	dwc_ep_t *dwc_ep;
+	int32_t frm_data;
+	dsts_data_t dsts;
+	dwc_otg_core_if_t *core_if;
+
+	ep = get_ep_from_handle(pcd, ep_handle);
+
+	if (!ep || !ep->desc || ep->dwc_ep.num == 0) {
+		DWC_WARN("bad ep\n");
+		return -DWC_E_INVALID;
+	}
+
+	DWC_SPINLOCK_IRQSAVE(pcd->lock, &flags);
+	core_if = GET_CORE_IF(pcd);
+	dwc_ep = &ep->dwc_ep;
+
+	if (ep->iso_req_handle) {
+		DWC_WARN("ISO request in progress\n");
+	}
+
+	dwc_ep->dma_addr0 = dma0;
+	dwc_ep->dma_addr1 = dma1;
+
+	dwc_ep->xfer_buff0 = buf0;
+	dwc_ep->xfer_buff1 = buf1;
+
+	dwc_ep->data_per_frame = data_per_frame;
+
+	/** @todo - pattern data support is to be implemented in the future */
+	dwc_ep->data_pattern_frame = dp_frame;
+	dwc_ep->sync_frame = sync_frame;
+
+	dwc_ep->buf_proc_intrvl = buf_proc_intrvl;
+
+	dwc_ep->bInterval = 1 << (ep->desc->bInterval - 1);
+
+	dwc_ep->proc_buf_num = 0;
+
+	dwc_ep->pkt_per_frm = 0;
+	frm_data = ep->dwc_ep.data_per_frame;
+	while (frm_data > 0) {
+		dwc_ep->pkt_per_frm++;
+		frm_data -= ep->dwc_ep.maxpacket;
+	}
+
+	dsts.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dsts);
+
+	if (start_frame == -1) {
+		dwc_ep->next_frame = dsts.b.soffn + 1;
+		if (dwc_ep->bInterval != 1) {
+			dwc_ep->next_frame =
+			    dwc_ep->next_frame + (dwc_ep->bInterval - 1 -
+						  dwc_ep->next_frame %
+						  dwc_ep->bInterval);
+		}
+	} else {
+		dwc_ep->next_frame = start_frame;
+	}
+
+	if (!core_if->pti_enh_enable) {
+		dwc_ep->pkt_cnt =
+		    dwc_ep->buf_proc_intrvl * dwc_ep->pkt_per_frm /
+		    dwc_ep->bInterval;
+	} else {
+		dwc_ep->pkt_cnt =
+		    (dwc_ep->data_per_frame *
+		     (dwc_ep->buf_proc_intrvl / dwc_ep->bInterval)
+		     - 1 + dwc_ep->maxpacket) / dwc_ep->maxpacket;
+	}
+
+	if (core_if->dma_desc_enable) {
+		dwc_ep->desc_cnt =
+		    dwc_ep->buf_proc_intrvl * dwc_ep->pkt_per_frm /
+		    dwc_ep->bInterval;
+	}
+
+	if (atomic_alloc) {
+		dwc_ep->pkt_info =
+		    DWC_ALLOC_ATOMIC(sizeof(iso_pkt_info_t) * dwc_ep->pkt_cnt);
+	} else {
+		dwc_ep->pkt_info =
+		    DWC_ALLOC(sizeof(iso_pkt_info_t) * dwc_ep->pkt_cnt);
+	}
+	if (!dwc_ep->pkt_info) {
+		DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags);
+		return -DWC_E_NO_MEMORY;
+	}
+	if (core_if->pti_enh_enable) {
+		dwc_memset(dwc_ep->pkt_info, 0,
+			   sizeof(iso_pkt_info_t) * dwc_ep->pkt_cnt);
+	}
+
+	dwc_ep->cur_pkt = 0;
+	ep->iso_req_handle = req_handle;
+
+	DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags);
+	dwc_otg_iso_ep_start_transfer(core_if, dwc_ep);
+	return 0;
+}
+
+int dwc_otg_pcd_iso_ep_stop(dwc_otg_pcd_t * pcd, void *ep_handle,
+			    void *req_handle)
+{
+	dwc_irqflags_t flags = 0;
+	dwc_otg_pcd_ep_t *ep;
+	dwc_ep_t *dwc_ep;
+
+	ep = get_ep_from_handle(pcd, ep_handle);
+	if (!ep || !ep->desc || ep->dwc_ep.num == 0) {
+		DWC_WARN("bad ep\n");
+		return -DWC_E_INVALID;
+	}
+	dwc_ep = &ep->dwc_ep;
+
+	dwc_otg_iso_ep_stop_transfer(GET_CORE_IF(pcd), dwc_ep);
+
+	DWC_FREE(dwc_ep->pkt_info);
+	DWC_SPINLOCK_IRQSAVE(pcd->lock, &flags);
+	if (ep->iso_req_handle != req_handle) {
+		DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags);
+		return -DWC_E_INVALID;
+	}
+
+	DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags);
+
+	ep->iso_req_handle = 0;
+	return 0;
+}
+
+/**
+ * This function is used for perodical data exchnage between PCD and gadget drivers.
+ * for Isochronous EPs
+ *
+ *	- Every time a sync period completes this function is called to
+ *	  perform data exchange between PCD and gadget
+ */
+void dwc_otg_iso_buffer_done(dwc_otg_pcd_t * pcd, dwc_otg_pcd_ep_t * ep,
+			     void *req_handle)
+{
+	int i;
+	dwc_ep_t *dwc_ep;
+
+	dwc_ep = &ep->dwc_ep;
+
+	DWC_SPINUNLOCK(ep->pcd->lock);
+	pcd->fops->isoc_complete(pcd, ep->priv, ep->iso_req_handle,
+				 dwc_ep->proc_buf_num ^ 0x1);
+	DWC_SPINLOCK(ep->pcd->lock);
+
+	for (i = 0; i < dwc_ep->pkt_cnt; ++i) {
+		dwc_ep->pkt_info[i].status = 0;
+		dwc_ep->pkt_info[i].offset = 0;
+		dwc_ep->pkt_info[i].length = 0;
+	}
+}
+
+int dwc_otg_pcd_get_iso_packet_count(dwc_otg_pcd_t * pcd, void *ep_handle,
+				     void *iso_req_handle)
+{
+	dwc_otg_pcd_ep_t *ep;
+	dwc_ep_t *dwc_ep;
+
+	ep = get_ep_from_handle(pcd, ep_handle);
+	if (!ep->desc || ep->dwc_ep.num == 0) {
+		DWC_WARN("bad ep\n");
+		return -DWC_E_INVALID;
+	}
+	dwc_ep = &ep->dwc_ep;
+
+	return dwc_ep->pkt_cnt;
+}
+
+void dwc_otg_pcd_get_iso_packet_params(dwc_otg_pcd_t * pcd, void *ep_handle,
+				       void *iso_req_handle, int packet,
+				       int *status, int *actual, int *offset)
+{
+	dwc_otg_pcd_ep_t *ep;
+	dwc_ep_t *dwc_ep;
+
+	ep = get_ep_from_handle(pcd, ep_handle);
+	if (!ep)
+		DWC_WARN("bad ep\n");
+
+	dwc_ep = &ep->dwc_ep;
+
+	*status = dwc_ep->pkt_info[packet].status;
+	*actual = dwc_ep->pkt_info[packet].length;
+	*offset = dwc_ep->pkt_info[packet].offset;
+}
+
+#endif /* DWC_EN_ISOC */
+
+static void dwc_otg_pcd_init_ep(dwc_otg_pcd_t * pcd, dwc_otg_pcd_ep_t * pcd_ep,
+				uint32_t is_in, uint32_t ep_num)
+{
+	/* Init EP structure */
+	pcd_ep->desc = 0;
+	pcd_ep->pcd = pcd;
+	pcd_ep->stopped = 1;
+	pcd_ep->queue_sof = 0;
+
+	/* Init DWC ep structure */
+	pcd_ep->dwc_ep.is_in = is_in;
+	pcd_ep->dwc_ep.num = ep_num;
+	pcd_ep->dwc_ep.active = 0;
+	pcd_ep->dwc_ep.tx_fifo_num = 0;
+	/* Control until ep is actvated */
+	pcd_ep->dwc_ep.type = DWC_OTG_EP_TYPE_CONTROL;
+	pcd_ep->dwc_ep.maxpacket = MAX_PACKET_SIZE;
+	pcd_ep->dwc_ep.dma_addr = 0;
+	pcd_ep->dwc_ep.start_xfer_buff = 0;
+	pcd_ep->dwc_ep.xfer_buff = 0;
+	pcd_ep->dwc_ep.xfer_len = 0;
+	pcd_ep->dwc_ep.xfer_count = 0;
+	pcd_ep->dwc_ep.sent_zlp = 0;
+	pcd_ep->dwc_ep.total_len = 0;
+	pcd_ep->dwc_ep.desc_addr = 0;
+	pcd_ep->dwc_ep.dma_desc_addr = 0;
+	DWC_CIRCLEQ_INIT(&pcd_ep->queue);
+}
+
+/**
+ * Initialize ep's
+ */
+static void dwc_otg_pcd_reinit(dwc_otg_pcd_t * pcd)
+{
+	int i;
+	uint32_t hwcfg1;
+	dwc_otg_pcd_ep_t *ep;
+	int in_ep_cntr, out_ep_cntr;
+	uint32_t num_in_eps = (GET_CORE_IF(pcd))->dev_if->num_in_eps;
+	uint32_t num_out_eps = (GET_CORE_IF(pcd))->dev_if->num_out_eps;
+
+	/**
+	 * Initialize the EP0 structure.
+	 */
+	ep = &pcd->ep0;
+	dwc_otg_pcd_init_ep(pcd, ep, 0, 0);
+
+	in_ep_cntr = 0;
+	hwcfg1 = (GET_CORE_IF(pcd))->hwcfg1.d32 >> 3;
+	for (i = 1; in_ep_cntr < num_in_eps; i++) {
+		if ((hwcfg1 & 0x1) == 0) {
+			dwc_otg_pcd_ep_t *ep = &pcd->in_ep[in_ep_cntr];
+			in_ep_cntr++;
+			/**
+			 * @todo NGS: Add direction to EP, based on contents
+			 * of HWCFG1.  Need a copy of HWCFG1 in pcd structure?
+			 * sprintf(";r
+			 */
+			dwc_otg_pcd_init_ep(pcd, ep, 1 /* IN */ , i);
+
+			DWC_CIRCLEQ_INIT(&ep->queue);
+		}
+		hwcfg1 >>= 2;
+	}
+
+	out_ep_cntr = 0;
+	hwcfg1 = (GET_CORE_IF(pcd))->hwcfg1.d32 >> 2;
+	for (i = 1; out_ep_cntr < num_out_eps; i++) {
+		if ((hwcfg1 & 0x1) == 0) {
+			dwc_otg_pcd_ep_t *ep = &pcd->out_ep[out_ep_cntr];
+			out_ep_cntr++;
+			/**
+			 * @todo NGS: Add direction to EP, based on contents
+			 * of HWCFG1.  Need a copy of HWCFG1 in pcd structure?
+			 * sprintf(";r
+			 */
+			dwc_otg_pcd_init_ep(pcd, ep, 0 /* OUT */ , i);
+			DWC_CIRCLEQ_INIT(&ep->queue);
+		}
+		hwcfg1 >>= 2;
+	}
+
+	pcd->ep0state = EP0_DISCONNECT;
+	pcd->ep0.dwc_ep.maxpacket = MAX_EP0_SIZE;
+	pcd->ep0.dwc_ep.type = DWC_OTG_EP_TYPE_CONTROL;
+}
+
+/**
+ * This function is called when the SRP timer expires. The SRP should
+ * complete within 6 seconds.
+ */
+static void srp_timeout(void *ptr)
+{
+	gotgctl_data_t gotgctl;
+	dwc_otg_core_if_t *core_if = (dwc_otg_core_if_t *) ptr;
+	volatile uint32_t *addr = &core_if->core_global_regs->gotgctl;
+
+	gotgctl.d32 = DWC_READ_REG32(addr);
+
+	core_if->srp_timer_started = 0;
+
+	if ((core_if->core_params->phy_type == DWC_PHY_TYPE_PARAM_FS) &&
+	    (core_if->core_params->i2c_enable)) {
+		DWC_PRINTF("SRP Timeout\n");
+
+		if ((core_if->srp_success) && (gotgctl.b.bsesvld)) {
+			if (core_if->pcd_cb && core_if->pcd_cb->resume_wakeup) {
+				core_if->pcd_cb->resume_wakeup(core_if->pcd_cb->p);
+			}
+
+			/* Clear Session Request */
+			gotgctl.d32 = 0;
+			gotgctl.b.sesreq = 1;
+			DWC_MODIFY_REG32(&core_if->core_global_regs->gotgctl,
+					 gotgctl.d32, 0);
+
+			core_if->srp_success = 0;
+		} else {
+			__DWC_ERROR("Device not connected/responding\n");
+			gotgctl.b.sesreq = 0;
+			DWC_WRITE_REG32(addr, gotgctl.d32);
+		}
+	} else if (gotgctl.b.sesreq) {
+		DWC_PRINTF("SRP Timeout\n");
+
+		__DWC_ERROR("Device not connected/responding\n");
+		gotgctl.b.sesreq = 0;
+		DWC_WRITE_REG32(addr, gotgctl.d32);
+	} else {
+		DWC_PRINTF(" SRP GOTGCTL=%0x\n", gotgctl.d32);
+	}
+
+	if (core_if->adp_enable) {
+		if (gotgctl.b.bsesvld == 0) {
+			gpwrdn_data_t gpwrdn = {.d32 = 0 };
+
+			/* Power off the core */
+			if (core_if->power_down == 2) {
+				gpwrdn.b.pwrdnswtch = 1;
+				DWC_MODIFY_REG32(&core_if->core_global_regs->
+						 gpwrdn, gpwrdn.d32, 0);
+			}
+
+			gpwrdn.d32 = 0;
+			gpwrdn.b.pmuactv = 1;
+			DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32);
+						
+			dwc_otg_adp_probe_start(core_if);
+		} else {
+			core_if->op_state = B_PERIPHERAL;
+			dwc_otg_core_init(core_if);
+			dwc_otg_enable_global_interrupts(core_if);
+			cil_pcd_start(core_if);
+		}
+	}
+}
+
+/**
+ * Tasklet
+ *
+ */
+extern void start_next_request(dwc_otg_pcd_ep_t * ep);
+
+static void start_xfer_tasklet_func(void *data)
+{
+	dwc_otg_pcd_t *pcd = (dwc_otg_pcd_t *) data;
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+
+	int i;
+	depctl_data_t diepctl;
+
+	DWC_DEBUGPL(DBG_PCDV, "Start xfer tasklet\n");
+
+	diepctl.d32 = DWC_READ_REG32(&core_if->dev_if->in_ep_regs[0]->diepctl);
+
+	if (pcd->ep0.queue_sof) {
+		pcd->ep0.queue_sof = 0;
+		start_next_request(&pcd->ep0);
+		// break;
+	}
+
+	for (i = 0; i < core_if->dev_if->num_in_eps; i++) {
+		depctl_data_t diepctl;
+		diepctl.d32 =
+		    DWC_READ_REG32(&core_if->dev_if->in_ep_regs[i]->diepctl);
+
+		if (pcd->in_ep[i].queue_sof) {
+			pcd->in_ep[i].queue_sof = 0;
+			start_next_request(&pcd->in_ep[i]);
+			// break;
+		}
+	}
+
+	return;
+}
+
+/**
+ * This function initialized the PCD portion of the driver.
+ *
+ */
+dwc_otg_pcd_t *dwc_otg_pcd_init(dwc_otg_core_if_t * core_if)
+{
+	dwc_otg_pcd_t *pcd = NULL;
+	dwc_otg_dev_if_t *dev_if;
+	int i;
+
+	/*
+	 * Allocate PCD structure
+	 */
+	pcd = DWC_ALLOC(sizeof(dwc_otg_pcd_t));
+
+	if (pcd == NULL) {
+		return NULL;
+	}
+
+	pcd->lock = DWC_SPINLOCK_ALLOC();
+	if (!pcd->lock) {
+		DWC_ERROR("Could not allocate lock for pcd");
+		DWC_FREE(pcd);
+		return NULL;
+	}
+	/* Set core_if's lock pointer to hcd->lock */
+	core_if->lock = pcd->lock;
+	pcd->core_if = core_if;
+
+	dev_if = core_if->dev_if;
+
+	if (core_if->hwcfg4.b.ded_fifo_en) {
+		DWC_PRINTF("Dedicated Tx FIFOs mode\n");
+	} else {
+		DWC_PRINTF("Shared Tx FIFO mode\n");
+	}
+
+	/*
+	 * Initialized the Core for Device mode here if there is nod ADP support. 
+	 * Otherwise it will be done later in dwc_otg_adp_start routine.
+	 */																				 
+	if (dwc_otg_is_device_mode(core_if) /*&& !core_if->adp_enable*/) {
+		dwc_otg_core_dev_init(core_if);
+	}
+
+	/*
+	 * Register the PCD Callbacks.
+	 */
+	dwc_otg_cil_register_pcd_callbacks(core_if, &pcd_callbacks, pcd);
+
+	/*
+	 * Initialize the DMA buffer for SETUP packets
+	 */
+	if (GET_CORE_IF(pcd)->dma_enable) {
+		pcd->setup_pkt =
+		    DWC_DMA_ALLOC(sizeof(*pcd->setup_pkt) * 5,
+				  &pcd->setup_pkt_dma_handle);
+		if (pcd->setup_pkt == NULL) {
+			DWC_FREE(pcd);
+			return NULL;
+		}
+
+		pcd->status_buf =
+		    DWC_DMA_ALLOC(sizeof(uint16_t),
+				  &pcd->status_buf_dma_handle);
+		if (pcd->status_buf == NULL) {
+			DWC_DMA_FREE(sizeof(*pcd->setup_pkt) * 5,
+				     pcd->setup_pkt, pcd->setup_pkt_dma_handle);
+			DWC_FREE(pcd);
+			return NULL;
+		}
+
+		if (GET_CORE_IF(pcd)->dma_desc_enable) {
+			dev_if->setup_desc_addr[0] =
+			    dwc_otg_ep_alloc_desc_chain(&dev_if->
+							dma_setup_desc_addr[0],
+							1);
+			dev_if->setup_desc_addr[1] =
+			    dwc_otg_ep_alloc_desc_chain(&dev_if->
+							dma_setup_desc_addr[1],
+							1);
+			dev_if->in_desc_addr =
+			    dwc_otg_ep_alloc_desc_chain(&dev_if->
+							dma_in_desc_addr, 1);
+			dev_if->out_desc_addr =
+			    dwc_otg_ep_alloc_desc_chain(&dev_if->
+							dma_out_desc_addr, 1);
+
+			if (dev_if->setup_desc_addr[0] == 0
+			    || dev_if->setup_desc_addr[1] == 0
+			    || dev_if->in_desc_addr == 0
+			    || dev_if->out_desc_addr == 0) {
+
+				if (dev_if->out_desc_addr)
+					dwc_otg_ep_free_desc_chain(dev_if->
+								   out_desc_addr,
+								   dev_if->
+								   dma_out_desc_addr,
+								   1);
+				if (dev_if->in_desc_addr)
+					dwc_otg_ep_free_desc_chain(dev_if->
+								   in_desc_addr,
+								   dev_if->
+								   dma_in_desc_addr,
+								   1);
+				if (dev_if->setup_desc_addr[1])
+					dwc_otg_ep_free_desc_chain(dev_if->
+								   setup_desc_addr
+								   [1],
+								   dev_if->
+								   dma_setup_desc_addr
+								   [1], 1);
+				if (dev_if->setup_desc_addr[0])
+					dwc_otg_ep_free_desc_chain(dev_if->
+								   setup_desc_addr
+								   [0],
+								   dev_if->
+								   dma_setup_desc_addr
+								   [0], 1);
+
+				DWC_DMA_FREE(sizeof(*pcd->setup_pkt) * 5,
+					     pcd->setup_pkt,
+					     pcd->setup_pkt_dma_handle);
+				DWC_DMA_FREE(sizeof(*pcd->status_buf),
+					     pcd->status_buf,
+					     pcd->status_buf_dma_handle);
+
+				DWC_FREE(pcd);
+
+				return NULL;
+			}
+		}
+	} else {
+		pcd->setup_pkt = DWC_ALLOC(sizeof(*pcd->setup_pkt) * 5);
+		if (pcd->setup_pkt == NULL) {
+			DWC_FREE(pcd);
+			return NULL;
+		}
+
+		pcd->status_buf = DWC_ALLOC(sizeof(uint16_t));
+		if (pcd->status_buf == NULL) {
+			DWC_FREE(pcd->setup_pkt);
+			DWC_FREE(pcd);
+			return NULL;
+		}
+	}
+
+	dwc_otg_pcd_reinit(pcd);
+
+	/* Allocate the cfi object for the PCD */
+#ifdef DWC_UTE_CFI
+	pcd->cfi = DWC_ALLOC(sizeof(cfiobject_t));
+	if (NULL == pcd->cfi)
+		goto fail;
+	if (init_cfi(pcd->cfi)) {
+		CFI_INFO("%s: Failed to init the CFI object\n", __func__);
+		goto fail;
+	}
+#endif
+
+	/* Initialize tasklets */
+	pcd->start_xfer_tasklet = DWC_TASK_ALLOC("xfer_tasklet",
+						 start_xfer_tasklet_func, pcd);
+	pcd->test_mode_tasklet = DWC_TASK_ALLOC("test_mode_tasklet",
+						do_test_mode, pcd);
+
+	/* Initialize SRP timer */
+	core_if->srp_timer = DWC_TIMER_ALLOC("SRP TIMER", srp_timeout, core_if);
+	
+	if (core_if->core_params->dev_out_nak) {
+		/** 
+		* Initialize xfer timeout timer. Implemented for
+		* 2.93a feature "Device DDMA OUT NAK Enhancement"
+		*/
+		for(i = 0; i < MAX_EPS_CHANNELS; i++) {
+			pcd->core_if->ep_xfer_timer[i] =
+				DWC_TIMER_ALLOC("ep timer", ep_xfer_timeout,
+				&pcd->core_if->ep_xfer_info[i]);
+		}
+	}
+	
+	return pcd;
+#ifdef DWC_UTE_CFI
+fail:
+#endif
+	if (pcd->setup_pkt)
+		DWC_FREE(pcd->setup_pkt);
+	if (pcd->status_buf)
+		DWC_FREE(pcd->status_buf);
+#ifdef DWC_UTE_CFI
+	if (pcd->cfi)
+		DWC_FREE(pcd->cfi);
+#endif
+	if (pcd)
+		DWC_FREE(pcd);
+	return NULL;
+
+}
+
+/**
+ * Remove PCD specific data
+ */
+void dwc_otg_pcd_remove(dwc_otg_pcd_t * pcd)
+{
+	dwc_otg_dev_if_t *dev_if = GET_CORE_IF(pcd)->dev_if;
+	int i;
+	if (pcd->core_if->core_params->dev_out_nak) {
+		for (i = 0; i < MAX_EPS_CHANNELS; i++) {
+			DWC_TIMER_CANCEL(pcd->core_if->ep_xfer_timer[i]);
+			pcd->core_if->ep_xfer_info[i].state = 0;
+		}
+	}
+
+	if (GET_CORE_IF(pcd)->dma_enable) {
+		DWC_DMA_FREE(sizeof(*pcd->setup_pkt) * 5, pcd->setup_pkt,
+			     pcd->setup_pkt_dma_handle);
+		DWC_DMA_FREE(sizeof(uint16_t), pcd->status_buf,
+			     pcd->status_buf_dma_handle);
+		if (GET_CORE_IF(pcd)->dma_desc_enable) {
+			dwc_otg_ep_free_desc_chain(dev_if->setup_desc_addr[0],
+						   dev_if->dma_setup_desc_addr
+						   [0], 1);
+			dwc_otg_ep_free_desc_chain(dev_if->setup_desc_addr[1],
+						   dev_if->dma_setup_desc_addr
+						   [1], 1);
+			dwc_otg_ep_free_desc_chain(dev_if->in_desc_addr,
+						   dev_if->dma_in_desc_addr, 1);
+			dwc_otg_ep_free_desc_chain(dev_if->out_desc_addr,
+						   dev_if->dma_out_desc_addr,
+						   1);
+		}
+	} else {
+		DWC_FREE(pcd->setup_pkt);
+		DWC_FREE(pcd->status_buf);
+	}
+	DWC_SPINLOCK_FREE(pcd->lock);
+	/* Set core_if's lock pointer to NULL */
+	pcd->core_if->lock = NULL;
+
+	DWC_TASK_FREE(pcd->start_xfer_tasklet);
+	DWC_TASK_FREE(pcd->test_mode_tasklet);
+	if (pcd->core_if->core_params->dev_out_nak) {
+		for (i = 0; i < MAX_EPS_CHANNELS; i++) {
+			if (pcd->core_if->ep_xfer_timer[i]) {
+					DWC_TIMER_FREE(pcd->core_if->ep_xfer_timer[i]);
+			}
+		}
+	}
+
+/* Release the CFI object's dynamic memory */
+#ifdef DWC_UTE_CFI
+	if (pcd->cfi->ops.release) {
+		pcd->cfi->ops.release(pcd->cfi);
+	}
+#endif
+
+	DWC_FREE(pcd);
+}
+
+/**
+ * Returns whether registered pcd is dual speed or not
+ */
+uint32_t dwc_otg_pcd_is_dualspeed(dwc_otg_pcd_t * pcd)
+{
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+
+	if ((core_if->core_params->speed == DWC_SPEED_PARAM_FULL) ||
+	    ((core_if->hwcfg2.b.hs_phy_type == 2) &&
+	     (core_if->hwcfg2.b.fs_phy_type == 1) &&
+	     (core_if->core_params->ulpi_fs_ls))) {
+		return 0;
+	}
+
+	return 1;
+}
+
+/**
+ * Returns whether registered pcd is OTG capable or not
+ */
+uint32_t dwc_otg_pcd_is_otg(dwc_otg_pcd_t * pcd)
+{
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+	gusbcfg_data_t usbcfg = {.d32 = 0 };
+
+	usbcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->gusbcfg);
+	if (!usbcfg.b.srpcap || !usbcfg.b.hnpcap) {
+		return 0;
+	}
+
+	return 1;
+}
+
+/**
+ * This function assigns periodic Tx FIFO to an periodic EP
+ * in shared Tx FIFO mode
+ */
+static uint32_t assign_tx_fifo(dwc_otg_core_if_t * core_if)
+{
+	uint32_t TxMsk = 1;
+	int i;
+
+	for (i = 0; i < core_if->hwcfg4.b.num_in_eps; ++i) {
+		if ((TxMsk & core_if->tx_msk) == 0) {
+			core_if->tx_msk |= TxMsk;
+			return i + 1;
+		}
+		TxMsk <<= 1;
+	}
+	return 0;
+}
+
+/**
+ * This function assigns periodic Tx FIFO to an periodic EP
+ * in shared Tx FIFO mode
+ */
+static uint32_t assign_perio_tx_fifo(dwc_otg_core_if_t * core_if)
+{
+	uint32_t PerTxMsk = 1;
+	int i;
+	for (i = 0; i < core_if->hwcfg4.b.num_dev_perio_in_ep; ++i) {
+		if ((PerTxMsk & core_if->p_tx_msk) == 0) {
+			core_if->p_tx_msk |= PerTxMsk;
+			return i + 1;
+		}
+		PerTxMsk <<= 1;
+	}
+	return 0;
+}
+
+/**
+ * This function releases periodic Tx FIFO
+ * in shared Tx FIFO mode
+ */
+static void release_perio_tx_fifo(dwc_otg_core_if_t * core_if,
+				  uint32_t fifo_num)
+{
+	core_if->p_tx_msk =
+	    (core_if->p_tx_msk & (1 << (fifo_num - 1))) ^ core_if->p_tx_msk;
+}
+
+/**
+ * This function releases periodic Tx FIFO
+ * in shared Tx FIFO mode
+ */
+static void release_tx_fifo(dwc_otg_core_if_t * core_if, uint32_t fifo_num)
+{
+	core_if->tx_msk =
+	    (core_if->tx_msk & (1 << (fifo_num - 1))) ^ core_if->tx_msk;
+}
+
+/**
+ * This function is being called from gadget 
+ * to enable PCD endpoint.
+ */
+int dwc_otg_pcd_ep_enable(dwc_otg_pcd_t * pcd,
+			  const uint8_t * ep_desc, void *usb_ep)
+{
+	int num, dir;
+	dwc_otg_pcd_ep_t *ep = NULL;
+	const usb_endpoint_descriptor_t *desc;
+	dwc_irqflags_t flags;
+	fifosize_data_t dptxfsiz = {.d32 = 0 };
+	gdfifocfg_data_t gdfifocfg = {.d32 = 0 };
+	gdfifocfg_data_t gdfifocfgbase = {.d32 = 0 };
+	int retval = 0;
+	int i, epcount;
+
+	desc = (const usb_endpoint_descriptor_t *)ep_desc;
+
+	if (!desc) {
+		pcd->ep0.priv = usb_ep;
+		ep = &pcd->ep0;
+		retval = -DWC_E_INVALID;
+		goto out;
+	}
+
+	num = UE_GET_ADDR(desc->bEndpointAddress);
+	dir = UE_GET_DIR(desc->bEndpointAddress);
+
+	if (!desc->wMaxPacketSize) {
+		DWC_WARN("bad maxpacketsize\n");
+		retval = -DWC_E_INVALID;
+		goto out;
+	}
+
+	if (dir == UE_DIR_IN) {
+		epcount = pcd->core_if->dev_if->num_in_eps;
+		for (i = 0; i < epcount; i++) {
+			if (num == pcd->in_ep[i].dwc_ep.num) {
+				ep = &pcd->in_ep[i];
+				break;
+			}
+		}
+	} else {
+		epcount = pcd->core_if->dev_if->num_out_eps;
+		for (i = 0; i < epcount; i++) {
+			if (num == pcd->out_ep[i].dwc_ep.num) {
+				ep = &pcd->out_ep[i];
+				break;
+			}
+		}
+	}
+
+	if (!ep) {
+		DWC_WARN("bad address\n");
+		retval = -DWC_E_INVALID;
+		goto out;
+	}
+
+	DWC_SPINLOCK_IRQSAVE(pcd->lock, &flags);
+
+	ep->desc = desc;
+	ep->priv = usb_ep;
+
+	/*
+	 * Activate the EP
+	 */
+	ep->stopped = 0;
+
+	ep->dwc_ep.is_in = (dir == UE_DIR_IN);
+	ep->dwc_ep.maxpacket = UGETW(desc->wMaxPacketSize);
+
+	ep->dwc_ep.type = desc->bmAttributes & UE_XFERTYPE;
+
+	if (ep->dwc_ep.is_in) {
+		if (!GET_CORE_IF(pcd)->en_multiple_tx_fifo) {
+			ep->dwc_ep.tx_fifo_num = 0;
+
+			if (ep->dwc_ep.type == UE_ISOCHRONOUS) {
+				/*
+				 * if ISOC EP then assign a Periodic Tx FIFO.
+				 */
+				ep->dwc_ep.tx_fifo_num =
+				    assign_perio_tx_fifo(GET_CORE_IF(pcd));
+			}
+		} else {
+			/*
+			 * if Dedicated FIFOs mode is on then assign a Tx FIFO.
+			 */
+			ep->dwc_ep.tx_fifo_num =
+			    assign_tx_fifo(GET_CORE_IF(pcd));
+		}
+
+		/* Calculating EP info controller base address */
+		if (ep->dwc_ep.tx_fifo_num && GET_CORE_IF(pcd)->en_multiple_tx_fifo) {
+			gdfifocfg.d32 =
+			    DWC_READ_REG32(&GET_CORE_IF(pcd)->core_global_regs->
+					   gdfifocfg);
+			gdfifocfgbase.d32 = gdfifocfg.d32 >> 16;
+			dptxfsiz.d32 =
+			    (DWC_READ_REG32
+			     (&GET_CORE_IF(pcd)->
+			      core_global_regs->dtxfsiz[ep->dwc_ep.
+							tx_fifo_num-1]) >> 16);
+			gdfifocfg.b.epinfobase =
+			    gdfifocfgbase.d32 + dptxfsiz.d32;
+			DWC_WRITE_REG32(&GET_CORE_IF(pcd)->core_global_regs->
+					gdfifocfg, gdfifocfg.d32);
+		}
+	}
+	/* Set initial data PID. */
+	if (ep->dwc_ep.type == UE_BULK) {
+		ep->dwc_ep.data_pid_start = 0;
+	}
+
+	/* Alloc DMA Descriptors */
+	if (GET_CORE_IF(pcd)->dma_desc_enable) {
+#ifndef DWC_UTE_PER_IO
+		if (ep->dwc_ep.type != UE_ISOCHRONOUS) {
+#endif
+			ep->dwc_ep.desc_addr =
+			    dwc_otg_ep_alloc_desc_chain(&ep->
+							dwc_ep.dma_desc_addr,
+							MAX_DMA_DESC_CNT);
+			if (!ep->dwc_ep.desc_addr) {
+				DWC_WARN("%s, can't allocate DMA descriptor\n",
+					 __func__);
+				retval = -DWC_E_SHUTDOWN;
+				DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags);
+				goto out;
+			}
+#ifndef DWC_UTE_PER_IO
+		}
+#endif
+	}
+
+	DWC_DEBUGPL(DBG_PCD, "Activate %s: type=%d, mps=%d desc=%p\n",
+		    (ep->dwc_ep.is_in ? "IN" : "OUT"),
+		    ep->dwc_ep.type, ep->dwc_ep.maxpacket, ep->desc);
+#ifdef DWC_UTE_PER_IO
+	ep->dwc_ep.xiso_bInterval = 1 << (ep->desc->bInterval - 1);
+#endif
+
+	dwc_otg_ep_activate(GET_CORE_IF(pcd), &ep->dwc_ep);
+
+#ifdef DWC_UTE_CFI
+	if (pcd->cfi->ops.ep_enable) {
+		pcd->cfi->ops.ep_enable(pcd->cfi, pcd, ep);
+	}
+#endif
+
+	DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags);
+
+out:
+	return retval;
+}
+
+/**
+ * This function is being called from gadget 
+ * to disable PCD endpoint.
+ */
+int dwc_otg_pcd_ep_disable(dwc_otg_pcd_t * pcd, void *ep_handle)
+{
+	dwc_otg_pcd_ep_t *ep;
+	dwc_irqflags_t flags;
+	dwc_otg_dev_dma_desc_t *desc_addr;
+	dwc_dma_t dma_desc_addr;
+	gdfifocfg_data_t gdfifocfgbase = {.d32 = 0 };
+	gdfifocfg_data_t gdfifocfg = {.d32 = 0 };
+	fifosize_data_t dptxfsiz = {.d32 = 0 };
+
+	ep = get_ep_from_handle(pcd, ep_handle);
+
+	if (!ep || !ep->desc) {
+		DWC_DEBUGPL(DBG_PCD, "bad ep address\n");
+		return -DWC_E_INVALID;
+	}
+
+	DWC_SPINLOCK_IRQSAVE(pcd->lock, &flags);
+
+	dwc_otg_request_nuke(ep);
+
+	dwc_otg_ep_deactivate(GET_CORE_IF(pcd), &ep->dwc_ep);
+	if (pcd->core_if->core_params->dev_out_nak)
+	{
+		DWC_TIMER_CANCEL(pcd->core_if->ep_xfer_timer[ep->dwc_ep.num]);
+		pcd->core_if->ep_xfer_info[ep->dwc_ep.num].state = 0;
+	}
+	ep->desc = NULL;
+	ep->stopped = 1;
+
+	gdfifocfg.d32 =
+	    DWC_READ_REG32(&GET_CORE_IF(pcd)->core_global_regs->gdfifocfg);
+	gdfifocfgbase.d32 = gdfifocfg.d32 >> 16;
+
+	if (ep->dwc_ep.is_in) {
+		if (GET_CORE_IF(pcd)->en_multiple_tx_fifo) {
+			/* Flush the Tx FIFO */
+			dwc_otg_flush_tx_fifo(GET_CORE_IF(pcd), ep->dwc_ep.tx_fifo_num);
+		}
+		release_perio_tx_fifo(GET_CORE_IF(pcd), ep->dwc_ep.tx_fifo_num);
+		release_tx_fifo(GET_CORE_IF(pcd), ep->dwc_ep.tx_fifo_num);
+		if (GET_CORE_IF(pcd)->en_multiple_tx_fifo) {
+			/* Decreasing EPinfo Base Addr */
+			dptxfsiz.d32 =
+			    (DWC_READ_REG32
+			     (&GET_CORE_IF(pcd)->
+		      		core_global_regs->dtxfsiz[ep->dwc_ep.tx_fifo_num-1]) >> 16);
+			gdfifocfg.b.epinfobase = gdfifocfgbase.d32 - dptxfsiz.d32;
+			DWC_WRITE_REG32(&GET_CORE_IF(pcd)->core_global_regs->gdfifocfg,
+					gdfifocfg.d32);
+		}
+	}
+
+	/* Free DMA Descriptors */
+	if (GET_CORE_IF(pcd)->dma_desc_enable) {
+		if (ep->dwc_ep.type != UE_ISOCHRONOUS) {
+			desc_addr = ep->dwc_ep.desc_addr;
+			dma_desc_addr = ep->dwc_ep.dma_desc_addr;
+
+			/* Cannot call dma_free_coherent() with IRQs disabled */
+			DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags);
+			dwc_otg_ep_free_desc_chain(desc_addr, dma_desc_addr,
+						   MAX_DMA_DESC_CNT);
+
+			goto out_unlocked;
+		}
+	}
+	DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags);
+
+out_unlocked:
+	DWC_DEBUGPL(DBG_PCD, "%d %s disabled\n", ep->dwc_ep.num,
+		    ep->dwc_ep.is_in ? "IN" : "OUT");
+	return 0;
+
+}
+
+/******************************************************************************/
+#ifdef DWC_UTE_PER_IO
+
+/**
+ * Free the request and its extended parts
+ *
+ */
+void dwc_pcd_xiso_ereq_free(dwc_otg_pcd_ep_t * ep, dwc_otg_pcd_request_t * req)
+{
+	DWC_FREE(req->ext_req.per_io_frame_descs);
+	DWC_FREE(req);
+}
+
+/**
+ * Start the next request in the endpoint's queue.
+ *
+ */
+int dwc_otg_pcd_xiso_start_next_request(dwc_otg_pcd_t * pcd,
+					dwc_otg_pcd_ep_t * ep)
+{
+	int i;
+	dwc_otg_pcd_request_t *req = NULL;
+	dwc_ep_t *dwcep = NULL;
+	struct dwc_iso_xreq_port *ereq = NULL;
+	struct dwc_iso_pkt_desc_port *ddesc_iso;
+	uint16_t nat;
+	depctl_data_t diepctl;
+
+	dwcep = &ep->dwc_ep;
+
+	if (dwcep->xiso_active_xfers > 0) {
+#if 0				//Disable this to decrease s/w overhead that is crucial for Isoc transfers
+		DWC_WARN("There are currently active transfers for EP%d \
+				(active=%d; queued=%d)", dwcep->num, dwcep->xiso_active_xfers, 
+				dwcep->xiso_queued_xfers);
+#endif
+		return 0;
+	}
+
+	nat = UGETW(ep->desc->wMaxPacketSize);
+	nat = (nat >> 11) & 0x03;
+
+	if (!DWC_CIRCLEQ_EMPTY(&ep->queue)) {
+		req = DWC_CIRCLEQ_FIRST(&ep->queue);
+		ereq = &req->ext_req;
+		ep->stopped = 0;
+
+		/* Get the frame number */
+		dwcep->xiso_frame_num =
+		    dwc_otg_get_frame_number(GET_CORE_IF(pcd));
+		DWC_DEBUG("FRM_NUM=%d", dwcep->xiso_frame_num);
+
+		ddesc_iso = ereq->per_io_frame_descs;
+
+		if (dwcep->is_in) {
+			/* Setup DMA Descriptor chain for IN Isoc request */
+			for (i = 0; i < ereq->pio_pkt_count; i++) {
+				//if ((i % (nat + 1)) == 0)
+				if ( i > 0 )
+					dwcep->xiso_frame_num = (dwcep->xiso_bInterval +
+										dwcep->xiso_frame_num) & 0x3FFF;
+				dwcep->desc_addr[i].buf =
+				    req->dma + ddesc_iso[i].offset;
+				dwcep->desc_addr[i].status.b_iso_in.txbytes =
+				    ddesc_iso[i].length;
+				dwcep->desc_addr[i].status.b_iso_in.framenum =
+				    dwcep->xiso_frame_num;
+				dwcep->desc_addr[i].status.b_iso_in.bs =
+				    BS_HOST_READY;
+				dwcep->desc_addr[i].status.b_iso_in.txsts = 0;
+				dwcep->desc_addr[i].status.b_iso_in.sp =
+				    (ddesc_iso[i].length %
+				     dwcep->maxpacket) ? 1 : 0;
+				dwcep->desc_addr[i].status.b_iso_in.ioc = 0;
+				dwcep->desc_addr[i].status.b_iso_in.pid = nat + 1;
+				dwcep->desc_addr[i].status.b_iso_in.l = 0;
+
+				/* Process the last descriptor */
+				if (i == ereq->pio_pkt_count - 1) {
+					dwcep->desc_addr[i].status.b_iso_in.ioc = 1;
+					dwcep->desc_addr[i].status.b_iso_in.l = 1;
+				}
+			}
+
+			/* Setup and start the transfer for this endpoint */
+			dwcep->xiso_active_xfers++;
+			DWC_WRITE_REG32(&GET_CORE_IF(pcd)->dev_if->
+					in_ep_regs[dwcep->num]->diepdma,
+					dwcep->dma_desc_addr);
+			diepctl.d32 = 0;
+			diepctl.b.epena = 1;
+			diepctl.b.cnak = 1;
+			DWC_MODIFY_REG32(&GET_CORE_IF(pcd)->dev_if->
+					 in_ep_regs[dwcep->num]->diepctl, 0,
+					 diepctl.d32);
+		} else {
+			/* Setup DMA Descriptor chain for OUT Isoc request */
+			for (i = 0; i < ereq->pio_pkt_count; i++) {
+				//if ((i % (nat + 1)) == 0)
+				dwcep->xiso_frame_num = (dwcep->xiso_bInterval + 
+										dwcep->xiso_frame_num) & 0x3FFF;
+				dwcep->desc_addr[i].buf =
+				    req->dma + ddesc_iso[i].offset;
+				dwcep->desc_addr[i].status.b_iso_out.rxbytes =
+				    ddesc_iso[i].length;
+				dwcep->desc_addr[i].status.b_iso_out.framenum =
+				    dwcep->xiso_frame_num;
+				dwcep->desc_addr[i].status.b_iso_out.bs =
+				    BS_HOST_READY;
+				dwcep->desc_addr[i].status.b_iso_out.rxsts = 0;
+				dwcep->desc_addr[i].status.b_iso_out.sp =
+				    (ddesc_iso[i].length %
+				     dwcep->maxpacket) ? 1 : 0;
+				dwcep->desc_addr[i].status.b_iso_out.ioc = 0;
+				dwcep->desc_addr[i].status.b_iso_out.pid = nat + 1;
+				dwcep->desc_addr[i].status.b_iso_out.l = 0;
+				
+				/* Process the last descriptor */
+				if (i == ereq->pio_pkt_count - 1) {
+					dwcep->desc_addr[i].status.b_iso_out.ioc = 1;
+					dwcep->desc_addr[i].status.b_iso_out.l = 1;
+				}			
+			}
+			
+			/* Setup and start the transfer for this endpoint */
+			dwcep->xiso_active_xfers++;
+			DWC_WRITE_REG32(&GET_CORE_IF(pcd)->dev_if->
+					out_ep_regs[dwcep->num]->doepdma,
+					dwcep->dma_desc_addr);
+			diepctl.d32 = 0;
+			diepctl.b.epena = 1;
+			diepctl.b.cnak = 1;
+			DWC_MODIFY_REG32(&GET_CORE_IF(pcd)->dev_if->
+					 out_ep_regs[dwcep->num]->doepctl, 0,
+					 diepctl.d32);
+		}
+
+	} else {
+		ep->stopped = 1;
+	}
+
+	return 0;
+}
+
+/**
+ *	- Remove the request from the queue
+ */
+void complete_xiso_ep(dwc_otg_pcd_ep_t * ep)
+{
+	dwc_otg_pcd_request_t *req = NULL;
+	struct dwc_iso_xreq_port *ereq = NULL;
+	struct dwc_iso_pkt_desc_port *ddesc_iso = NULL;
+	dwc_ep_t *dwcep = NULL;
+	int i;
+
+	//DWC_DEBUG();
+	dwcep = &ep->dwc_ep;
+
+	/* Get the first pending request from the queue */
+	if (!DWC_CIRCLEQ_EMPTY(&ep->queue)) {
+		req = DWC_CIRCLEQ_FIRST(&ep->queue);
+		if (!req) {
+			DWC_PRINTF("complete_ep 0x%p, req = NULL!\n", ep);
+			return;
+		}
+		dwcep->xiso_active_xfers--;
+		dwcep->xiso_queued_xfers--;
+		/* Remove this request from the queue */
+		DWC_CIRCLEQ_REMOVE_INIT(&ep->queue, req, queue_entry);
+	} else {
+		DWC_PRINTF("complete_ep 0x%p, ep->queue empty!\n", ep);
+		return;
+	}
+
+	ep->stopped = 1;
+	ereq = &req->ext_req;
+	ddesc_iso = ereq->per_io_frame_descs;
+
+	if (dwcep->xiso_active_xfers < 0) {
+		DWC_WARN("EP#%d (xiso_active_xfers=%d)", dwcep->num,
+			 dwcep->xiso_active_xfers);
+	}
+
+	/* Fill the Isoc descs of portable extended req from dma descriptors */
+	for (i = 0; i < ereq->pio_pkt_count; i++) {
+		if (dwcep->is_in) {	/* IN endpoints */
+			ddesc_iso[i].actual_length = ddesc_iso[i].length -
+			    dwcep->desc_addr[i].status.b_iso_in.txbytes;
+			ddesc_iso[i].status =
+			    dwcep->desc_addr[i].status.b_iso_in.txsts;
+		} else {	/* OUT endpoints */
+			ddesc_iso[i].actual_length = ddesc_iso[i].length -
+			    dwcep->desc_addr[i].status.b_iso_out.rxbytes;
+			ddesc_iso[i].status =
+			    dwcep->desc_addr[i].status.b_iso_out.rxsts;
+		}
+	}
+
+	DWC_SPINUNLOCK(ep->pcd->lock);
+
+	/* Call the completion function in the non-portable logic */
+	ep->pcd->fops->xisoc_complete(ep->pcd, ep->priv, req->priv, 0,
+				      &req->ext_req);
+
+	DWC_SPINLOCK(ep->pcd->lock);
+
+	/* Free the request - specific freeing needed for extended request object */
+	dwc_pcd_xiso_ereq_free(ep, req);
+
+	/* Start the next request */
+	dwc_otg_pcd_xiso_start_next_request(ep->pcd, ep);
+
+	return;
+}
+
+/**
+ * Create and initialize the Isoc pkt descriptors of the extended request.
+ *
+ */
+static int dwc_otg_pcd_xiso_create_pkt_descs(dwc_otg_pcd_request_t * req,
+					     void *ereq_nonport,
+					     int atomic_alloc)
+{
+	struct dwc_iso_xreq_port *ereq = NULL;
+	struct dwc_iso_xreq_port *req_mapped = NULL;
+	struct dwc_iso_pkt_desc_port *ipds = NULL;	/* To be created in this function */
+	uint32_t pkt_count;
+	int i;
+
+	ereq = &req->ext_req;
+	req_mapped = (struct dwc_iso_xreq_port *)ereq_nonport;
+	pkt_count = req_mapped->pio_pkt_count;
+
+	/* Create the isoc descs */
+	if (atomic_alloc) {
+		ipds = DWC_ALLOC_ATOMIC(sizeof(*ipds) * pkt_count);
+	} else {
+		ipds = DWC_ALLOC(sizeof(*ipds) * pkt_count);
+	}
+
+	if (!ipds) {
+		DWC_ERROR("Failed to allocate isoc descriptors");
+		return -DWC_E_NO_MEMORY;
+	}
+
+	/* Initialize the extended request fields */
+	ereq->per_io_frame_descs = ipds;
+	ereq->error_count = 0;
+	ereq->pio_alloc_pkt_count = pkt_count;
+	ereq->pio_pkt_count = pkt_count;
+	ereq->tr_sub_flags = req_mapped->tr_sub_flags;
+
+	/* Init the Isoc descriptors */
+	for (i = 0; i < pkt_count; i++) {
+		ipds[i].length = req_mapped->per_io_frame_descs[i].length;
+		ipds[i].offset = req_mapped->per_io_frame_descs[i].offset;
+		ipds[i].status = req_mapped->per_io_frame_descs[i].status;	/* 0 */
+		ipds[i].actual_length =
+		    req_mapped->per_io_frame_descs[i].actual_length;
+	}
+
+	return 0;
+}
+
+static void prn_ext_request(struct dwc_iso_xreq_port *ereq)
+{
+	struct dwc_iso_pkt_desc_port *xfd = NULL;
+	int i;
+
+	DWC_DEBUG("per_io_frame_descs=%p", ereq->per_io_frame_descs);
+	DWC_DEBUG("tr_sub_flags=%d", ereq->tr_sub_flags);
+	DWC_DEBUG("error_count=%d", ereq->error_count);
+	DWC_DEBUG("pio_alloc_pkt_count=%d", ereq->pio_alloc_pkt_count);
+	DWC_DEBUG("pio_pkt_count=%d", ereq->pio_pkt_count);
+	DWC_DEBUG("res=%d", ereq->res);
+
+	for (i = 0; i < ereq->pio_pkt_count; i++) {
+		xfd = &ereq->per_io_frame_descs[0];
+		DWC_DEBUG("FD #%d", i);
+
+		DWC_DEBUG("xfd->actual_length=%d", xfd->actual_length);
+		DWC_DEBUG("xfd->length=%d", xfd->length);
+		DWC_DEBUG("xfd->offset=%d", xfd->offset);
+		DWC_DEBUG("xfd->status=%d", xfd->status);
+	}
+}
+
+/**
+ *
+ */
+int dwc_otg_pcd_xiso_ep_queue(dwc_otg_pcd_t * pcd, void *ep_handle,
+			      uint8_t * buf, dwc_dma_t dma_buf, uint32_t buflen,
+			      int zero, void *req_handle, int atomic_alloc,
+			      void *ereq_nonport)
+{
+	dwc_otg_pcd_request_t *req = NULL;
+	dwc_otg_pcd_ep_t *ep;
+	dwc_irqflags_t flags;
+	int res;
+
+	ep = get_ep_from_handle(pcd, ep_handle);
+	if (!ep) {
+		DWC_WARN("bad ep\n");
+		return -DWC_E_INVALID;
+	}
+
+	/* We support this extension only for DDMA mode */
+	if (ep->dwc_ep.type == DWC_OTG_EP_TYPE_ISOC)
+		if (!GET_CORE_IF(pcd)->dma_desc_enable)
+			return -DWC_E_INVALID;
+
+	/* Create a dwc_otg_pcd_request_t object */
+	if (atomic_alloc) {
+		req = DWC_ALLOC_ATOMIC(sizeof(*req));
+	} else {
+		req = DWC_ALLOC(sizeof(*req));
+	}
+
+	if (!req) {
+		return -DWC_E_NO_MEMORY;
+	}
+
+	/* Create the Isoc descs for this request which shall be the exact match
+	 * of the structure sent to us from the non-portable logic */
+	res =
+	    dwc_otg_pcd_xiso_create_pkt_descs(req, ereq_nonport, atomic_alloc);
+	if (res) {
+		DWC_WARN("Failed to init the Isoc descriptors");
+		DWC_FREE(req);
+		return res;
+	}
+
+	DWC_SPINLOCK_IRQSAVE(pcd->lock, &flags);
+
+	DWC_CIRCLEQ_INIT_ENTRY(req, queue_entry);
+	req->buf = buf;
+	req->dma = dma_buf;
+	req->length = buflen;
+	req->sent_zlp = zero;
+	req->priv = req_handle;
+
+	//DWC_SPINLOCK_IRQSAVE(pcd->lock, &flags);
+	ep->dwc_ep.dma_addr = dma_buf;
+	ep->dwc_ep.start_xfer_buff = buf;
+	ep->dwc_ep.xfer_buff = buf;
+	ep->dwc_ep.xfer_len = 0;
+	ep->dwc_ep.xfer_count = 0;
+	ep->dwc_ep.sent_zlp = 0;
+	ep->dwc_ep.total_len = buflen;
+
+	/* Add this request to the tail */
+	DWC_CIRCLEQ_INSERT_TAIL(&ep->queue, req, queue_entry);
+	ep->dwc_ep.xiso_queued_xfers++;
+
+//DWC_DEBUG("CP_0");
+//DWC_DEBUG("req->ext_req.tr_sub_flags=%d", req->ext_req.tr_sub_flags);
+//prn_ext_request((struct dwc_iso_xreq_port *) ereq_nonport);
+//prn_ext_request(&req->ext_req);
+
+	//DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags);
+
+	/* If the req->status == ASAP  then check if there is any active transfer
+	 * for this endpoint. If no active transfers, then get the first entry
+	 * from the queue and start that transfer
+	 */
+	if (req->ext_req.tr_sub_flags == DWC_EREQ_TF_ASAP) {
+		res = dwc_otg_pcd_xiso_start_next_request(pcd, ep);
+		if (res) {
+			DWC_WARN("Failed to start the next Isoc transfer");
+			DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags);
+			DWC_FREE(req);
+			return res;
+		}
+	}
+
+	DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags);
+	return 0;
+}
+
+#endif
+/* END ifdef DWC_UTE_PER_IO ***************************************************/
+int dwc_otg_pcd_ep_queue(dwc_otg_pcd_t * pcd, void *ep_handle,
+			 uint8_t * buf, dwc_dma_t dma_buf, uint32_t buflen,
+			 int zero, void *req_handle, int atomic_alloc)
+{
+	dwc_irqflags_t flags;
+	dwc_otg_pcd_request_t *req;
+	dwc_otg_pcd_ep_t *ep;
+	uint32_t max_transfer;
+
+	ep = get_ep_from_handle(pcd, ep_handle);
+	if (!ep || (!ep->desc && ep->dwc_ep.num != 0)) {
+		DWC_WARN("bad ep\n");
+		return -DWC_E_INVALID;
+	}
+
+	if (atomic_alloc) {
+		req = DWC_ALLOC_ATOMIC(sizeof(*req));
+	} else {
+		req = DWC_ALLOC(sizeof(*req));
+	}
+
+	if (!req) {
+		return -DWC_E_NO_MEMORY;
+	}
+	DWC_CIRCLEQ_INIT_ENTRY(req, queue_entry);
+	if (!GET_CORE_IF(pcd)->core_params->opt) {
+		if (ep->dwc_ep.num != 0) {
+			DWC_ERROR("queue req %p, len %d buf %p\n",
+				  req_handle, buflen, buf);
+		}
+	}
+
+	req->buf = buf;
+	req->dma = dma_buf;
+	req->length = buflen;
+	req->sent_zlp = zero;
+	req->priv = req_handle;
+
+	DWC_SPINLOCK_IRQSAVE(pcd->lock, &flags);
+
+	/*
+	 * For EP0 IN without premature status, zlp is required?
+	 */
+	if (ep->dwc_ep.num == 0 && ep->dwc_ep.is_in) {
+		DWC_DEBUGPL(DBG_PCDV, "%d-OUT ZLP\n", ep->dwc_ep.num);
+		//_req->zero = 1;
+	}
+
+	/* Start the transfer */
+	if (DWC_CIRCLEQ_EMPTY(&ep->queue) && !ep->stopped) {
+		/* EP0 Transfer? */
+		if (ep->dwc_ep.num == 0) {
+			switch (pcd->ep0state) {
+			case EP0_IN_DATA_PHASE:
+				DWC_DEBUGPL(DBG_PCD,
+					    "%s ep0: EP0_IN_DATA_PHASE\n",
+					    __func__);
+				break;
+
+			case EP0_OUT_DATA_PHASE:
+				DWC_DEBUGPL(DBG_PCD,
+					    "%s ep0: EP0_OUT_DATA_PHASE\n",
+					    __func__);
+				if (pcd->request_config) {
+					/* Complete STATUS PHASE */
+					ep->dwc_ep.is_in = 1;
+					pcd->ep0state = EP0_IN_STATUS_PHASE;
+				}
+				break;
+
+			case EP0_IN_STATUS_PHASE:
+				DWC_DEBUGPL(DBG_PCD,
+					    "%s ep0: EP0_IN_STATUS_PHASE\n",
+					    __func__);
+				break;
+
+			default:
+				DWC_DEBUGPL(DBG_ANY, "ep0: odd state %d\n",
+					    pcd->ep0state);
+				DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags);
+				return -DWC_E_SHUTDOWN;
+			}
+
+			ep->dwc_ep.dma_addr = dma_buf;
+			ep->dwc_ep.start_xfer_buff = buf;
+			ep->dwc_ep.xfer_buff = buf;
+			ep->dwc_ep.xfer_len = buflen;
+			ep->dwc_ep.xfer_count = 0;
+			ep->dwc_ep.sent_zlp = 0;
+			ep->dwc_ep.total_len = ep->dwc_ep.xfer_len;
+
+			if (zero) {
+				if ((ep->dwc_ep.xfer_len %
+				     ep->dwc_ep.maxpacket == 0)
+				    && (ep->dwc_ep.xfer_len != 0)) {
+					ep->dwc_ep.sent_zlp = 1;
+				}
+
+			}
+
+			dwc_otg_ep0_start_transfer(GET_CORE_IF(pcd),
+						   &ep->dwc_ep);
+		}		// non-ep0 endpoints
+		else {
+#ifdef DWC_UTE_CFI
+			if (ep->dwc_ep.buff_mode != BM_STANDARD) {
+				/* store the request length */
+				ep->dwc_ep.cfi_req_len = buflen;
+				pcd->cfi->ops.build_descriptors(pcd->cfi, pcd,
+								ep, req);
+			} else {
+#endif
+				max_transfer =
+				    GET_CORE_IF(ep->pcd)->
+				    core_params->max_transfer_size;
+
+				/* Setup and start the Transfer */
+				ep->dwc_ep.dma_addr = dma_buf;
+				ep->dwc_ep.start_xfer_buff = buf;
+				ep->dwc_ep.xfer_buff = buf;
+				ep->dwc_ep.xfer_len = 0;
+				ep->dwc_ep.xfer_count = 0;
+				ep->dwc_ep.sent_zlp = 0;
+				ep->dwc_ep.total_len = buflen;
+
+				ep->dwc_ep.maxxfer = max_transfer;
+				if (GET_CORE_IF(pcd)->dma_desc_enable) {
+					uint32_t out_max_xfer =
+					    DDMA_MAX_TRANSFER_SIZE -
+					    (DDMA_MAX_TRANSFER_SIZE % 4);
+					if (ep->dwc_ep.is_in) {
+						if (ep->dwc_ep.maxxfer >
+						    DDMA_MAX_TRANSFER_SIZE) {
+							ep->dwc_ep.maxxfer =
+							    DDMA_MAX_TRANSFER_SIZE;
+						}
+					} else {
+						if (ep->dwc_ep.maxxfer >
+						    out_max_xfer) {
+							ep->dwc_ep.maxxfer =
+							    out_max_xfer;
+						}
+					}
+				}
+				if (ep->dwc_ep.maxxfer < ep->dwc_ep.total_len) {
+					ep->dwc_ep.maxxfer -=
+					    (ep->dwc_ep.maxxfer %
+					     ep->dwc_ep.maxpacket);
+				}
+
+				if (zero) {
+					if ((ep->dwc_ep.total_len %
+					     ep->dwc_ep.maxpacket == 0)
+					    && (ep->dwc_ep.total_len != 0)) {
+						ep->dwc_ep.sent_zlp = 1;
+					}
+				}
+#ifdef DWC_UTE_CFI
+			}
+#endif
+			dwc_otg_ep_start_transfer(GET_CORE_IF(pcd),
+						  &ep->dwc_ep);
+		}
+	}
+
+	if (req != 0) {
+		++pcd->request_pending;
+		DWC_CIRCLEQ_INSERT_TAIL(&ep->queue, req, queue_entry);
+		if (ep->dwc_ep.is_in && ep->stopped
+		    && !(GET_CORE_IF(pcd)->dma_enable)) {
+			/** @todo NGS Create a function for this. */
+			diepmsk_data_t diepmsk = {.d32 = 0 };
+			diepmsk.b.intktxfemp = 1;
+			if (GET_CORE_IF(pcd)->multiproc_int_enable) {
+				DWC_MODIFY_REG32(&GET_CORE_IF(pcd)->dev_if->
+						 dev_global_regs->
+						 diepeachintmsk[ep->dwc_ep.num],
+						 0, diepmsk.d32);
+			} else {
+				DWC_MODIFY_REG32(&GET_CORE_IF(pcd)->dev_if->
+						 dev_global_regs->diepmsk, 0,
+						 diepmsk.d32);
+			}
+
+		}
+	}
+	DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags);
+
+	return 0;
+}
+
+int dwc_otg_pcd_ep_dequeue(dwc_otg_pcd_t * pcd, void *ep_handle,
+			   void *req_handle)
+{
+	dwc_irqflags_t flags;
+	dwc_otg_pcd_request_t *req;
+	dwc_otg_pcd_ep_t *ep;
+
+	ep = get_ep_from_handle(pcd, ep_handle);
+	if (!ep || (!ep->desc && ep->dwc_ep.num != 0)) {
+		DWC_WARN("bad argument\n");
+		return -DWC_E_INVALID;
+	}
+
+	DWC_SPINLOCK_IRQSAVE(pcd->lock, &flags);
+
+	/* make sure it's actually queued on this endpoint */
+	DWC_CIRCLEQ_FOREACH(req, &ep->queue, queue_entry) {
+		if (req->priv == (void *)req_handle) {
+			break;
+		}
+	}
+
+	if (req->priv != (void *)req_handle) {
+		DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags);
+		return -DWC_E_INVALID;
+	}
+
+	if (!DWC_CIRCLEQ_EMPTY_ENTRY(req, queue_entry)) {
+		dwc_otg_request_done(ep, req, -DWC_E_RESTART);
+	} else {
+		req = NULL;
+	}
+
+	DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags);
+
+	return req ? 0 : -DWC_E_SHUTDOWN;
+
+}
+
+int dwc_otg_pcd_ep_halt(dwc_otg_pcd_t * pcd, void *ep_handle, int value)
+{
+	dwc_otg_pcd_ep_t *ep;
+	dwc_irqflags_t flags;
+	int retval = 0;
+
+	ep = get_ep_from_handle(pcd, ep_handle);
+
+	if (!ep || (!ep->desc && ep != &pcd->ep0) ||
+	    (ep->desc && (ep->desc->bmAttributes == UE_ISOCHRONOUS))) {
+		DWC_WARN("%s, bad ep\n", __func__);
+		return -DWC_E_INVALID;
+	}
+
+	DWC_SPINLOCK_IRQSAVE(pcd->lock, &flags);
+	if (!DWC_CIRCLEQ_EMPTY(&ep->queue)) {
+		DWC_WARN("%d %s XFer In process\n", ep->dwc_ep.num,
+			 ep->dwc_ep.is_in ? "IN" : "OUT");
+		retval = -DWC_E_AGAIN;
+	} else if (value == 0) {
+		dwc_otg_ep_clear_stall(GET_CORE_IF(pcd), &ep->dwc_ep);
+	} else if (value == 1) {
+		if (ep->dwc_ep.is_in == 1 && GET_CORE_IF(pcd)->dma_desc_enable) {
+			dtxfsts_data_t txstatus;
+			fifosize_data_t txfifosize;
+
+			txfifosize.d32 =
+			    DWC_READ_REG32(&GET_CORE_IF(pcd)->core_global_regs->
+					   dtxfsiz[ep->dwc_ep.tx_fifo_num]);
+			txstatus.d32 =
+			    DWC_READ_REG32(&GET_CORE_IF(pcd)->dev_if->
+					   in_ep_regs[ep->dwc_ep.num]->dtxfsts);
+
+			if (txstatus.b.txfspcavail < txfifosize.b.depth) {
+				DWC_WARN("%s() Data In Tx Fifo\n", __func__);
+				retval = -DWC_E_AGAIN;
+			} else {
+				if (ep->dwc_ep.num == 0) {
+					pcd->ep0state = EP0_STALL;
+				}
+
+				ep->stopped = 1;
+				dwc_otg_ep_set_stall(GET_CORE_IF(pcd),
+						     &ep->dwc_ep);
+			}
+		} else {
+			if (ep->dwc_ep.num == 0) {
+				pcd->ep0state = EP0_STALL;
+			}
+
+			ep->stopped = 1;
+			dwc_otg_ep_set_stall(GET_CORE_IF(pcd), &ep->dwc_ep);
+		}
+	} else if (value == 2) {
+		ep->dwc_ep.stall_clear_flag = 0;
+	} else if (value == 3) {
+		ep->dwc_ep.stall_clear_flag = 1;
+	}
+
+	DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags);
+
+	return retval;
+}
+
+/**
+ * This function initiates remote wakeup of the host from suspend state.
+ */
+void dwc_otg_pcd_rem_wkup_from_suspend(dwc_otg_pcd_t * pcd, int set)
+{
+	dctl_data_t dctl = { 0 };
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+	dsts_data_t dsts;
+
+	dsts.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dsts);
+	if (!dsts.b.suspsts) {
+		DWC_WARN("Remote wakeup while is not in suspend state\n");
+	}
+	/* Check if DEVICE_REMOTE_WAKEUP feature enabled */
+	if (pcd->remote_wakeup_enable) {
+		if (set) {
+
+			if (core_if->adp_enable) {
+				gpwrdn_data_t gpwrdn;
+
+				dwc_otg_adp_probe_stop(core_if);
+
+				/* Mask SRP detected interrupt from Power Down Logic */
+				gpwrdn.d32 = 0;
+				gpwrdn.b.srp_det_msk = 1;
+				DWC_MODIFY_REG32(&core_if->core_global_regs->
+						 gpwrdn, gpwrdn.d32, 0);
+
+				/* Disable Power Down Logic */
+				gpwrdn.d32 = 0;
+				gpwrdn.b.pmuactv = 1;
+				DWC_MODIFY_REG32(&core_if->core_global_regs->
+						 gpwrdn, gpwrdn.d32, 0);
+
+				/*
+				 * Initialize the Core for Device mode.
+				 */
+				core_if->op_state = B_PERIPHERAL;
+				dwc_otg_core_init(core_if);
+				dwc_otg_enable_global_interrupts(core_if);
+				cil_pcd_start(core_if);
+
+				dwc_otg_initiate_srp(core_if);
+			}
+
+			dctl.b.rmtwkupsig = 1;
+			DWC_MODIFY_REG32(&core_if->dev_if->
+					 dev_global_regs->dctl, 0, dctl.d32);
+			DWC_DEBUGPL(DBG_PCD, "Set Remote Wakeup\n");
+
+			dwc_mdelay(2);
+			DWC_MODIFY_REG32(&core_if->dev_if->
+					 dev_global_regs->dctl, dctl.d32, 0);
+			DWC_DEBUGPL(DBG_PCD, "Clear Remote Wakeup\n");
+		}
+	} else {
+		DWC_DEBUGPL(DBG_PCD, "Remote Wakeup is disabled\n");
+	}
+}
+
+#ifdef CONFIG_USB_DWC_OTG_LPM
+/**
+ * This function initiates remote wakeup of the host from L1 sleep state.
+ */
+void dwc_otg_pcd_rem_wkup_from_sleep(dwc_otg_pcd_t * pcd, int set)
+{
+	glpmcfg_data_t lpmcfg;
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+
+	lpmcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->glpmcfg);
+
+	/* Check if we are in L1 state */
+	if (!lpmcfg.b.prt_sleep_sts) {
+		DWC_DEBUGPL(DBG_PCD, "Device is not in sleep state\n");
+		return;
+	}
+
+	/* Check if host allows remote wakeup */
+	if (!lpmcfg.b.rem_wkup_en) {
+		DWC_DEBUGPL(DBG_PCD, "Host does not allow remote wakeup\n");
+		return;
+	}
+
+	/* Check if Resume OK */
+	if (!lpmcfg.b.sleep_state_resumeok) {
+		DWC_DEBUGPL(DBG_PCD, "Sleep state resume is not OK\n");
+		return;
+	}
+
+	lpmcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->glpmcfg);
+	lpmcfg.b.en_utmi_sleep = 0;
+	lpmcfg.b.hird_thres &= (~(1 << 4));
+	DWC_WRITE_REG32(&core_if->core_global_regs->glpmcfg, lpmcfg.d32);
+
+	if (set) {
+		dctl_data_t dctl = {.d32 = 0 };
+		dctl.b.rmtwkupsig = 1;
+		/* Set RmtWkUpSig bit to start remote wakup signaling.
+		 * Hardware will automatically clear this bit.
+		 */
+		DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->dctl,
+				 0, dctl.d32);
+		DWC_DEBUGPL(DBG_PCD, "Set Remote Wakeup\n");
+	}
+
+}
+#endif
+
+/**
+ * Performs remote wakeup.
+ */
+void dwc_otg_pcd_remote_wakeup(dwc_otg_pcd_t * pcd, int set)
+{
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+	dwc_irqflags_t flags;
+	if (dwc_otg_is_device_mode(core_if)) {
+		DWC_SPINLOCK_IRQSAVE(pcd->lock, &flags);
+#ifdef CONFIG_USB_DWC_OTG_LPM
+		if (core_if->lx_state == DWC_OTG_L1) {
+			dwc_otg_pcd_rem_wkup_from_sleep(pcd, set);
+		} else {
+#endif
+			dwc_otg_pcd_rem_wkup_from_suspend(pcd, set);
+#ifdef CONFIG_USB_DWC_OTG_LPM
+		}
+#endif
+		DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags);
+	}
+	return;
+}
+
+void dwc_otg_pcd_disconnect_us(dwc_otg_pcd_t * pcd, int no_of_usecs)
+{
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+	dctl_data_t dctl = { 0 };
+
+	if (dwc_otg_is_device_mode(core_if)) {
+		dctl.b.sftdiscon = 1;
+		DWC_PRINTF("Soft disconnect for %d useconds\n",no_of_usecs);
+		DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->dctl, 0, dctl.d32);
+		dwc_udelay(no_of_usecs);
+		DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->dctl, dctl.d32,0);
+		
+	} else{
+		DWC_PRINTF("NOT SUPPORTED IN HOST MODE\n");
+	}
+	return;
+
+}
+
+int dwc_otg_pcd_wakeup(dwc_otg_pcd_t * pcd)
+{
+	dsts_data_t dsts;
+	gotgctl_data_t gotgctl;
+
+	/*
+	 * This function starts the Protocol if no session is in progress. If
+	 * a session is already in progress, but the device is suspended,
+	 * remote wakeup signaling is started.
+	 */
+
+	/* Check if valid session */
+	gotgctl.d32 =
+	    DWC_READ_REG32(&(GET_CORE_IF(pcd)->core_global_regs->gotgctl));
+	if (gotgctl.b.bsesvld) {
+		/* Check if suspend state */
+		dsts.d32 =
+		    DWC_READ_REG32(&
+				   (GET_CORE_IF(pcd)->dev_if->
+				    dev_global_regs->dsts));
+		if (dsts.b.suspsts) {
+			dwc_otg_pcd_remote_wakeup(pcd, 1);
+		}
+	} else {
+		dwc_otg_pcd_initiate_srp(pcd);
+	}
+
+	return 0;
+
+}
+
+/**
+ * Start the SRP timer to detect when the SRP does not complete within
+ * 6 seconds.
+ *
+ * @param pcd the pcd structure.
+ */
+void dwc_otg_pcd_initiate_srp(dwc_otg_pcd_t * pcd)
+{
+	dwc_irqflags_t flags;
+	DWC_SPINLOCK_IRQSAVE(pcd->lock, &flags);
+	dwc_otg_initiate_srp(GET_CORE_IF(pcd));
+	DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags);
+}
+
+int dwc_otg_pcd_get_frame_number(dwc_otg_pcd_t * pcd)
+{
+	return dwc_otg_get_frame_number(GET_CORE_IF(pcd));
+}
+
+int dwc_otg_pcd_is_lpm_enabled(dwc_otg_pcd_t * pcd)
+{
+	return GET_CORE_IF(pcd)->core_params->lpm_enable;
+}
+
+uint32_t get_b_hnp_enable(dwc_otg_pcd_t * pcd)
+{
+	return pcd->b_hnp_enable;
+}
+
+uint32_t get_a_hnp_support(dwc_otg_pcd_t * pcd)
+{
+	return pcd->a_hnp_support;
+}
+
+uint32_t get_a_alt_hnp_support(dwc_otg_pcd_t * pcd)
+{
+	return pcd->a_alt_hnp_support;
+}
+
+int dwc_otg_pcd_get_rmwkup_enable(dwc_otg_pcd_t * pcd)
+{
+	return pcd->remote_wakeup_enable;
+}
+
+#endif /* DWC_HOST_ONLY */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/.dwc_otg_pcd.c.swo linux-3.0.82x/drivers/usb/gadget/dwc/driver/.dwc_otg_pcd.c.swo
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diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/.dwc_otg_pcd.c.swp linux-3.0.82x/drivers/usb/gadget/dwc/driver/.dwc_otg_pcd.c.swp
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_pcd.h linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_pcd.h
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_pcd.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_pcd.h	2017-09-23 03:42:50.230674416 +0800
@@ -0,0 +1,259 @@
+/* ==========================================================================
+ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_pcd.h $
+ * $Revision: #44 $
+ * $Date: 2010/11/29 $
+ * $Change: 1636033 $
+ *
+ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+ * otherwise expressly agreed to in writing between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product under
+ * any End User Software License Agreement or Agreement for Licensed Product
+ * with Synopsys or any supplement thereto. You are permitted to use and
+ * redistribute this Software in source and binary forms, with or without
+ * modification, provided that redistributions of source code must retain this
+ * notice. You may not view, use, disclose, copy or distribute this file or
+ * any information contained herein except pursuant to this license grant from
+ * Synopsys. If you do not agree with this notice, including the disclaimer
+ * below, then you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================== */
+#ifndef DWC_HOST_ONLY
+#if !defined(__DWC_PCD_H__)
+#define __DWC_PCD_H__
+
+#include "dwc_otg_os_dep.h"
+#include "usb.h"
+#include "dwc_otg_cil.h"
+#include "dwc_otg_pcd_if.h"
+struct cfiobject;
+
+/**
+ * @file
+ *
+ * This file contains the structures, constants, and interfaces for
+ * the Perpherial Contoller Driver (PCD).
+ *
+ * The Peripheral Controller Driver (PCD) for Linux will implement the
+ * Gadget API, so that the existing Gadget drivers can be used. For
+ * the Mass Storage Function driver the File-backed USB Storage Gadget
+ * (FBS) driver will be used.  The FBS driver supports the
+ * Control-Bulk (CB), Control-Bulk-Interrupt (CBI), and Bulk-Only
+ * transports.
+ *
+ */
+
+/** Invalid DMA Address */
+#define DWC_DMA_ADDR_INVALID	(~(dwc_dma_t)0)
+
+/** Max Transfer size for any EP */
+#define DDMA_MAX_TRANSFER_SIZE 65535
+
+/** Max DMA Descriptor count for any EP */
+#define MAX_DMA_DESC_CNT 256
+
+/**
+ * Get the pointer to the core_if from the pcd pointer.
+ */
+#define GET_CORE_IF( _pcd ) (_pcd->core_if)
+
+/**
+ * States of EP0.
+ */
+typedef enum ep0_state {
+	EP0_DISCONNECT,		/* no host */
+	EP0_IDLE,
+	EP0_IN_DATA_PHASE,
+	EP0_OUT_DATA_PHASE,
+	EP0_IN_STATUS_PHASE,
+	EP0_OUT_STATUS_PHASE,
+	EP0_STALL,
+} ep0state_e;
+
+/** Fordward declaration.*/
+struct dwc_otg_pcd;
+
+/** DWC_otg iso request structure.
+ *
+ */
+typedef struct usb_iso_request dwc_otg_pcd_iso_request_t;
+
+#ifdef DWC_UTE_PER_IO
+
+/**
+ * This shall be the exact analogy of the same type structure defined in the
+ * usb_gadget.h. Each descriptor contains
+ */
+struct dwc_iso_pkt_desc_port {
+	uint32_t offset;
+	uint32_t length;	/* expected length */
+	uint32_t actual_length;
+	uint32_t status;
+};
+
+struct dwc_iso_xreq_port {
+	/** transfer/submission flag */
+	uint32_t tr_sub_flags;
+	/** Start the request ASAP */
+#define DWC_EREQ_TF_ASAP		0x00000002
+	/** Just enqueue the request w/o initiating a transfer */
+#define DWC_EREQ_TF_ENQUEUE		0x00000004
+
+	/**
+	* count of ISO packets attached to this request - shall
+	* not exceed the pio_alloc_pkt_count
+	*/
+	uint32_t pio_pkt_count;
+	/** count of ISO packets allocated for this request */
+	uint32_t pio_alloc_pkt_count;
+	/** number of ISO packet errors */
+	uint32_t error_count;
+	/** reserved for future extension */
+	uint32_t res;
+	/** Will be allocated and freed in the UTE gadget and based on the CFC value */
+	struct dwc_iso_pkt_desc_port *per_io_frame_descs;
+};
+#endif
+/** DWC_otg request structure.
+ * This structure is a list of requests.
+ */
+typedef struct dwc_otg_pcd_request {
+	void *priv;
+	void *buf;
+	dwc_dma_t dma;
+	uint32_t length;
+	uint32_t actual;
+	unsigned sent_zlp:1;
+
+	 DWC_CIRCLEQ_ENTRY(dwc_otg_pcd_request) queue_entry;
+#ifdef DWC_UTE_PER_IO
+	struct dwc_iso_xreq_port ext_req;
+	//void *priv_ereq_nport; /*  */
+#endif
+} dwc_otg_pcd_request_t;
+
+DWC_CIRCLEQ_HEAD(req_list, dwc_otg_pcd_request);
+
+/**	  PCD EP structure.
+ * This structure describes an EP, there is an array of EPs in the PCD
+ * structure.
+ */
+typedef struct dwc_otg_pcd_ep {
+	/** USB EP Descriptor */
+	const usb_endpoint_descriptor_t *desc;
+
+	/** queue of dwc_otg_pcd_requests. */
+	struct req_list queue;
+	unsigned stopped:1;
+	unsigned disabling:1;
+	unsigned dma:1;
+	unsigned queue_sof:1;
+
+#ifdef DWC_EN_ISOC
+	/** ISOC req handle passed */
+	void *iso_req_handle;
+#endif				//_EN_ISOC_
+
+	/** DWC_otg ep data. */
+	dwc_ep_t dwc_ep;
+
+	/** Pointer to PCD */
+	struct dwc_otg_pcd *pcd;
+
+	void *priv;
+} dwc_otg_pcd_ep_t;
+
+/** DWC_otg PCD Structure.
+ * This structure encapsulates the data for the dwc_otg PCD.
+ */
+struct dwc_otg_pcd {
+	const struct dwc_otg_pcd_function_ops *fops;
+	/** The DWC otg device pointer */
+	struct dwc_otg_device *otg_dev;
+	/** Core Interface */
+	dwc_otg_core_if_t *core_if;
+	/** State of EP0 */
+	ep0state_e ep0state;
+	/** EP0 Request is pending */
+	unsigned ep0_pending:1;
+	/** Indicates when SET CONFIGURATION Request is in process */
+	unsigned request_config:1;
+	/** The state of the Remote Wakeup Enable. */
+	unsigned remote_wakeup_enable:1;
+	/** The state of the B-Device HNP Enable. */
+	unsigned b_hnp_enable:1;
+	/** The state of A-Device HNP Support. */
+	unsigned a_hnp_support:1;
+	/** The state of the A-Device Alt HNP support. */
+	unsigned a_alt_hnp_support:1;
+	/** Count of pending Requests */
+	unsigned request_pending;
+
+	/** SETUP packet for EP0
+	 * This structure is allocated as a DMA buffer on PCD initialization
+	 * with enough space for up to 3 setup packets.
+	 */
+	union {
+		usb_device_request_t req;
+		uint32_t d32[2];
+	} *setup_pkt;
+
+	dwc_dma_t setup_pkt_dma_handle;
+
+	/** 2-byte dma buffer used to return status from GET_STATUS */
+	uint16_t *status_buf;
+	dwc_dma_t status_buf_dma_handle;
+
+	/** EP0 */
+	dwc_otg_pcd_ep_t ep0;
+
+	/** Array of IN EPs. */
+	dwc_otg_pcd_ep_t in_ep[MAX_EPS_CHANNELS - 1];
+	/** Array of OUT EPs. */
+	dwc_otg_pcd_ep_t out_ep[MAX_EPS_CHANNELS - 1];
+	/** number of valid EPs in the above array. */
+//        unsigned      num_eps : 4;
+	dwc_spinlock_t *lock;
+
+	/** Tasklet to defer starting of TEST mode transmissions until
+	 *	Status Phase has been completed.
+	 */
+	dwc_tasklet_t *test_mode_tasklet;
+
+	/** Tasklet to delay starting of xfer in DMA mode */
+	dwc_tasklet_t *start_xfer_tasklet;
+
+	/** The test mode to enter when the tasklet is executed. */
+	unsigned test_mode;
+	/** The cfi_api structure that implements most of the CFI API
+	 * and OTG specific core configuration functionality
+	 */
+#ifdef DWC_UTE_CFI
+	struct cfiobject *cfi;
+#endif
+
+};
+
+//FIXME this functions should be static, and this prototypes should be removed
+extern void dwc_otg_request_nuke(dwc_otg_pcd_ep_t * ep);
+extern void dwc_otg_request_done(dwc_otg_pcd_ep_t * ep,
+				 dwc_otg_pcd_request_t * req, int32_t status);
+
+void dwc_otg_iso_buffer_done(dwc_otg_pcd_t * pcd, dwc_otg_pcd_ep_t * ep,
+			     void *req_handle);
+
+extern void do_test_mode(void *data);
+#endif
+#endif /* DWC_HOST_ONLY */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_pcd_if.h linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_pcd_if.h
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_pcd_if.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_pcd_if.h	2017-09-23 03:42:50.230674416 +0800
@@ -0,0 +1,357 @@
+/* ==========================================================================
+ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_pcd_if.h $
+ * $Revision: #10 $
+ * $Date: 2010/11/04 $
+ * $Change: 1621728 $
+ *
+ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+ * otherwise expressly agreed to in writing between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product under
+ * any End User Software License Agreement or Agreement for Licensed Product
+ * with Synopsys or any supplement thereto. You are permitted to use and
+ * redistribute this Software in source and binary forms, with or without
+ * modification, provided that redistributions of source code must retain this
+ * notice. You may not view, use, disclose, copy or distribute this file or
+ * any information contained herein except pursuant to this license grant from
+ * Synopsys. If you do not agree with this notice, including the disclaimer
+ * below, then you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================== */
+#ifndef DWC_HOST_ONLY
+
+#if !defined(__DWC_PCD_IF_H__)
+#define __DWC_PCD_IF_H__
+
+//#include "dwc_os.h"
+#include "dwc_otg_core_if.h"
+
+/** @file
+ * This file defines DWC_OTG PCD Core API.
+ */
+
+struct dwc_otg_pcd;
+typedef struct dwc_otg_pcd dwc_otg_pcd_t;
+
+/** Maxpacket size for EP0 */
+#define MAX_EP0_SIZE	64
+/** Maxpacket size for any EP */
+#define MAX_PACKET_SIZE 1024
+
+/** @name Function Driver Callbacks */
+/** @{ */
+
+/** This function will be called whenever a previously queued request has
+ * completed.  The status value will be set to -DWC_E_SHUTDOWN to indicated a
+ * failed or aborted transfer, or -DWC_E_RESTART to indicate the device was reset,
+ * or -DWC_E_TIMEOUT to indicate it timed out, or -DWC_E_INVALID to indicate invalid
+ * parameters. */
+typedef int (*dwc_completion_cb_t) (dwc_otg_pcd_t * pcd, void *ep_handle,
+				    void *req_handle, int32_t status,
+				    uint32_t actual);
+/**
+ * This function will be called whenever a previousle queued ISOC request has
+ * completed. Count of ISOC packets could be read using dwc_otg_pcd_get_iso_packet_count
+ * function.
+ * The status of each ISOC packet could be read using dwc_otg_pcd_get_iso_packet_*
+ * functions.
+ */
+typedef int (*dwc_isoc_completion_cb_t) (dwc_otg_pcd_t * pcd, void *ep_handle,
+					 void *req_handle, int proc_buf_num);
+/** This function should handle any SETUP request that cannot be handled by the
+ * PCD Core.  This includes most GET_DESCRIPTORs, SET_CONFIGS, Any
+ * class-specific requests, etc.  The function must non-blocking.
+ *
+ * Returns 0 on success.
+ * Returns -DWC_E_NOT_SUPPORTED if the request is not supported.
+ * Returns -DWC_E_INVALID if the setup request had invalid parameters or bytes.
+ * Returns -DWC_E_SHUTDOWN on any other error. */
+typedef int (*dwc_setup_cb_t) (dwc_otg_pcd_t * pcd, uint8_t * bytes);
+/** This is called whenever the device has been disconnected.  The function
+ * driver should take appropriate action to clean up all pending requests in the
+ * PCD Core, remove all endpoints (except ep0), and initialize back to reset
+ * state. */
+typedef int (*dwc_disconnect_cb_t) (dwc_otg_pcd_t * pcd);
+/** This function is called when device has been connected. */
+typedef int (*dwc_connect_cb_t) (dwc_otg_pcd_t * pcd, int speed);
+/** This function is called when device has been suspended */
+typedef int (*dwc_suspend_cb_t) (dwc_otg_pcd_t * pcd);
+/** This function is called when device has received LPM tokens, i.e.
+ * device has been sent to sleep state. */
+typedef int (*dwc_sleep_cb_t) (dwc_otg_pcd_t * pcd);
+/** This function is called when device has been resumed
+ * from suspend(L2) or L1 sleep state. */
+typedef int (*dwc_resume_cb_t) (dwc_otg_pcd_t * pcd);
+/** This function is called whenever hnp params has been changed.
+ * User can call get_b_hnp_enable, get_a_hnp_support, get_a_alt_hnp_support functions
+ * to get hnp parameters. */
+typedef int (*dwc_hnp_params_changed_cb_t) (dwc_otg_pcd_t * pcd);
+/** This function is called whenever USB RESET is detected. */
+typedef int (*dwc_reset_cb_t) (dwc_otg_pcd_t * pcd);
+
+typedef int (*cfi_setup_cb_t) (dwc_otg_pcd_t * pcd, void *ctrl_req_bytes);
+
+/**
+ *
+ * @param ep_handle	Void pointer to the usb_ep structure
+ * @param ereq_port Pointer to the extended request structure created in the
+ *					portable part.
+ */
+typedef int (*xiso_completion_cb_t) (dwc_otg_pcd_t * pcd, void *ep_handle,
+				     void *req_handle, int32_t status,
+				     void *ereq_port);
+/** Function Driver Ops Data Structure */
+struct dwc_otg_pcd_function_ops {
+	dwc_connect_cb_t connect;
+	dwc_disconnect_cb_t disconnect;
+	dwc_setup_cb_t setup;
+	dwc_completion_cb_t complete;
+	dwc_isoc_completion_cb_t isoc_complete;
+	dwc_suspend_cb_t suspend;
+	dwc_sleep_cb_t sleep;
+	dwc_resume_cb_t resume;
+	dwc_reset_cb_t reset;
+	dwc_hnp_params_changed_cb_t hnp_changed;
+	cfi_setup_cb_t cfi_setup;
+#ifdef DWC_UTE_PER_IO
+	xiso_completion_cb_t xisoc_complete;
+#endif
+};
+/** @} */
+
+/** @name Function Driver Functions */
+/** @{ */
+
+/** Call this function to get pointer on dwc_otg_pcd_t,
+ * this pointer will be used for all PCD API functions.
+ *
+ * @param core_if The DWC_OTG Core
+ */
+extern dwc_otg_pcd_t *dwc_otg_pcd_init(dwc_otg_core_if_t * core_if);
+
+/** Frees PCD allocated by dwc_otg_pcd_init
+ *
+ * @param pcd The PCD
+ */
+extern void dwc_otg_pcd_remove(dwc_otg_pcd_t * pcd);
+
+/** Call this to bind the function driver to the PCD Core.
+ *
+ * @param pcd Pointer on dwc_otg_pcd_t returned by dwc_otg_pcd_init function.
+ * @param fops The Function Driver Ops data structure containing pointers to all callbacks.
+ */
+extern void dwc_otg_pcd_start(dwc_otg_pcd_t * pcd,
+			      const struct dwc_otg_pcd_function_ops *fops);
+
+/** Enables an endpoint for use.  This function enables an endpoint in
+ * the PCD.  The endpoint is described by the ep_desc which has the
+ * same format as a USB ep descriptor.  The ep_handle parameter is used to refer
+ * to the endpoint from other API functions and in callbacks.  Normally this
+ * should be called after a SET_CONFIGURATION/SET_INTERFACE to configure the
+ * core for that interface.
+ *
+ * Returns -DWC_E_INVALID if invalid parameters were passed.
+ * Returns -DWC_E_SHUTDOWN if any other error ocurred.
+ * Returns 0 on success.
+ *
+ * @param pcd The PCD
+ * @param ep_desc Endpoint descriptor
+ * @param ep_handle Handle on endpoint, that will be used to identify endpoint.
+ */
+extern int dwc_otg_pcd_ep_enable(dwc_otg_pcd_t * pcd,
+				 const uint8_t * ep_desc, void *ep_handle);
+
+/** Disable the endpoint referenced by ep_handle.
+ *
+ * Returns -DWC_E_INVALID if invalid parameters were passed.
+ * Returns -DWC_E_SHUTDOWN if any other error ocurred.
+ * Returns 0 on success. */
+extern int dwc_otg_pcd_ep_disable(dwc_otg_pcd_t * pcd, void *ep_handle);
+
+/** Queue a data transfer request on the endpoint referenced by ep_handle.
+ * After the transfer is completes, the complete callback will be called with
+ * the request status.
+ *
+ * @param pcd The PCD
+ * @param ep_handle The handle of the endpoint
+ * @param buf The buffer for the data
+ * @param dma_buf The DMA buffer for the data
+ * @param buflen The length of the data transfer
+ * @param zero Specifies whether to send zero length last packet.
+ * @param req_handle Set this handle to any value to use to reference this
+ * request in the ep_dequeue function or from the complete callback
+ * @param atomic_alloc If driver need to perform atomic allocations
+ * for internal data structures.
+ *
+ * Returns -DWC_E_INVALID if invalid parameters were passed.
+ * Returns -DWC_E_SHUTDOWN if any other error ocurred.
+ * Returns 0 on success. */
+extern int dwc_otg_pcd_ep_queue(dwc_otg_pcd_t * pcd, void *ep_handle,
+				uint8_t * buf, dwc_dma_t dma_buf,
+				uint32_t buflen, int zero, void *req_handle,
+				int atomic_alloc);
+#ifdef DWC_UTE_PER_IO
+/**
+ *
+ * @param ereq_nonport	Pointer to the extended request part of the
+ *						usb_request structure defined in usb_gadget.h file.
+ */
+extern int dwc_otg_pcd_xiso_ep_queue(dwc_otg_pcd_t * pcd, void *ep_handle,
+				     uint8_t * buf, dwc_dma_t dma_buf,
+				     uint32_t buflen, int zero,
+				     void *req_handle, int atomic_alloc,
+				     void *ereq_nonport);
+
+#endif
+
+/** De-queue the specified data transfer that has not yet completed.
+ *
+ * Returns -DWC_E_INVALID if invalid parameters were passed.
+ * Returns -DWC_E_SHUTDOWN if any other error ocurred.
+ * Returns 0 on success. */
+extern int dwc_otg_pcd_ep_dequeue(dwc_otg_pcd_t * pcd, void *ep_handle,
+				  void *req_handle);
+
+/** Halt (STALL) an endpoint or clear it.
+ *
+ * Returns -DWC_E_INVALID if invalid parameters were passed.
+ * Returns -DWC_E_SHUTDOWN if any other error ocurred.
+ * Returns -DWC_E_AGAIN if the STALL cannot be sent and must be tried again later
+ * Returns 0 on success. */
+extern int dwc_otg_pcd_ep_halt(dwc_otg_pcd_t * pcd, void *ep_handle, int value);
+
+/** This function should be called on every hardware interrupt */
+extern int32_t dwc_otg_pcd_handle_intr(dwc_otg_pcd_t * pcd);
+
+/** This function returns current frame number */
+extern int dwc_otg_pcd_get_frame_number(dwc_otg_pcd_t * pcd);
+
+/**
+ * Start isochronous transfers on the endpoint referenced by ep_handle.
+ * For isochronous transfers duble buffering is used.
+ * After processing each of buffers comlete callback will be called with
+ * status for each transaction.
+ *
+ * @param pcd The PCD
+ * @param ep_handle The handle of the endpoint
+ * @param buf0 The virtual address of first data buffer
+ * @param buf1 The virtual address of second data buffer
+ * @param dma0 The DMA address of first data buffer
+ * @param dma1 The DMA address of second data buffer
+ * @param sync_frame Data pattern frame number
+ * @param dp_frame Data size for pattern frame
+ * @param data_per_frame Data size for regular frame
+ * @param start_frame Frame number to start transfers, if -1 then start transfers ASAP.
+ * @param buf_proc_intrvl Interval of ISOC Buffer processing
+ * @param req_handle Handle of ISOC request
+ * @param atomic_alloc Specefies whether to perform atomic allocation for
+ * 			internal data structures.
+ *
+ * Returns -DWC_E_NO_MEMORY if there is no enough memory.
+ * Returns -DWC_E_INVALID if incorrect arguments are passed to the function.
+ * Returns -DW_E_SHUTDOWN for any other error.
+ * Returns 0 on success
+ */
+extern int dwc_otg_pcd_iso_ep_start(dwc_otg_pcd_t * pcd, void *ep_handle,
+				    uint8_t * buf0, uint8_t * buf1,
+				    dwc_dma_t dma0, dwc_dma_t dma1,
+				    int sync_frame, int dp_frame,
+				    int data_per_frame, int start_frame,
+				    int buf_proc_intrvl, void *req_handle,
+				    int atomic_alloc);
+
+/** Stop ISOC transfers on endpoint referenced by ep_handle.
+ *
+ * @param pcd The PCD
+ * @param ep_handle The handle of the endpoint
+ * @param req_handle Handle of ISOC request
+ *
+ * Returns -DWC_E_INVALID if incorrect arguments are passed to the function
+ * Returns 0 on success
+ */
+int dwc_otg_pcd_iso_ep_stop(dwc_otg_pcd_t * pcd, void *ep_handle,
+			    void *req_handle);
+
+/** Get ISOC packet status.
+ *
+ * @param pcd The PCD
+ * @param ep_handle The handle of the endpoint
+ * @param iso_req_handle Isochronoush request handle
+ * @param packet Number of packet
+ * @param status Out parameter for returning status
+ * @param actual Out parameter for returning actual length
+ * @param offset Out parameter for returning offset
+ *
+ */
+extern void dwc_otg_pcd_get_iso_packet_params(dwc_otg_pcd_t * pcd,
+					      void *ep_handle,
+					      void *iso_req_handle, int packet,
+					      int *status, int *actual,
+					      int *offset);
+
+/** Get ISOC packet count.
+ *
+ * @param pcd The PCD
+ * @param ep_handle The handle of the endpoint
+ * @param iso_req_handle
+ */
+extern int dwc_otg_pcd_get_iso_packet_count(dwc_otg_pcd_t * pcd,
+					    void *ep_handle,
+					    void *iso_req_handle);
+
+/** This function starts the SRP Protocol if no session is in progress. If
+ * a session is already in progress, but the device is suspended,
+ * remote wakeup signaling is started.
+ */
+extern int dwc_otg_pcd_wakeup(dwc_otg_pcd_t * pcd);
+
+/** This function returns 1 if LPM support is enabled, and 0 otherwise. */
+extern int dwc_otg_pcd_is_lpm_enabled(dwc_otg_pcd_t * pcd);
+
+/** This function returns 1 if remote wakeup is allowed and 0, otherwise. */
+extern int dwc_otg_pcd_get_rmwkup_enable(dwc_otg_pcd_t * pcd);
+
+/** Initiate SRP */
+extern void dwc_otg_pcd_initiate_srp(dwc_otg_pcd_t * pcd);
+
+/** Starts remote wakeup signaling. */
+extern void dwc_otg_pcd_remote_wakeup(dwc_otg_pcd_t * pcd, int set);
+
+/** Starts micorsecond soft disconnect. */
+extern void dwc_otg_pcd_disconnect_us(dwc_otg_pcd_t * pcd, int no_of_usecs);
+/** This function returns whether device is dualspeed.*/
+extern uint32_t dwc_otg_pcd_is_dualspeed(dwc_otg_pcd_t * pcd);
+
+/** This function returns whether device is otg. */
+extern uint32_t dwc_otg_pcd_is_otg(dwc_otg_pcd_t * pcd);
+
+/** These functions allow to get hnp parameters */
+extern uint32_t get_b_hnp_enable(dwc_otg_pcd_t * pcd);
+extern uint32_t get_a_hnp_support(dwc_otg_pcd_t * pcd);
+extern uint32_t get_a_alt_hnp_support(dwc_otg_pcd_t * pcd);
+
+/** CFI specific Interface functions */
+/** Allocate a cfi buffer */
+extern uint8_t *cfiw_ep_alloc_buffer(dwc_otg_pcd_t * pcd, void *pep,
+				     dwc_dma_t * addr, size_t buflen,
+				     int flags);
+
+/******************************************************************************/
+
+/** @} */
+
+#endif				/* __DWC_PCD_IF_H__ */
+
+#endif				/* DWC_HOST_ONLY */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_pcd_intr.c linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_pcd_intr.c
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_pcd_intr.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_pcd_intr.c	2017-09-23 03:42:50.234674403 +0800
@@ -0,0 +1,4558 @@
+/* ==========================================================================
+ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_pcd_intr.c $
+ * $Revision: #108 $
+ * $Date: 2011/05/17 $
+ * $Change: 1774110 $
+ *
+ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+ * otherwise expressly agreed to in writing between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product under
+ * any End User Software License Agreement or Agreement for Licensed Product
+ * with Synopsys or any supplement thereto. You are permitted to use and
+ * redistribute this Software in source and binary forms, with or without
+ * modification, provided that redistributions of source code must retain this
+ * notice. You may not view, use, disclose, copy or distribute this file or
+ * any information contained herein except pursuant to this license grant from
+ * Synopsys. If you do not agree with this notice, including the disclaimer
+ * below, then you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================== */
+#ifndef DWC_HOST_ONLY
+
+#include "dwc_otg_pcd.h"
+
+#ifdef DWC_UTE_CFI
+#include "dwc_otg_cfi.h"
+#endif
+
+#ifdef DWC_UTE_PER_IO
+extern void complete_xiso_ep(dwc_otg_pcd_ep_t * ep);
+#endif
+//#define PRINT_CFI_DMA_DESCS
+
+#define DEBUG_EP0
+
+/**
+ * This function updates OTG.
+ */
+static void dwc_otg_pcd_update_otg(dwc_otg_pcd_t * pcd, const unsigned reset)
+{
+
+	if (reset) {
+		pcd->b_hnp_enable = 0;
+		pcd->a_hnp_support = 0;
+		pcd->a_alt_hnp_support = 0;
+	}
+
+	if (pcd->fops->hnp_changed) {
+		pcd->fops->hnp_changed(pcd);
+	}
+}
+
+/** @file
+ * This file contains the implementation of the PCD Interrupt handlers.
+ *
+ * The PCD handles the device interrupts.  Many conditions can cause a
+ * device interrupt. When an interrupt occurs, the device interrupt
+ * service routine determines the cause of the interrupt and
+ * dispatches handling to the appropriate function. These interrupt
+ * handling functions are described below.
+ * All interrupt registers are processed from LSB to MSB.
+ */
+
+/**
+ * This function prints the ep0 state for debug purposes.
+ */
+static inline void print_ep0_state(dwc_otg_pcd_t * pcd)
+{
+#ifdef DEBUG
+	char str[40];
+
+	switch (pcd->ep0state) {
+	case EP0_DISCONNECT:
+		dwc_strcpy(str, "EP0_DISCONNECT");
+		break;
+	case EP0_IDLE:
+		dwc_strcpy(str, "EP0_IDLE");
+		break;
+	case EP0_IN_DATA_PHASE:
+		dwc_strcpy(str, "EP0_IN_DATA_PHASE");
+		break;
+	case EP0_OUT_DATA_PHASE:
+		dwc_strcpy(str, "EP0_OUT_DATA_PHASE");
+		break;
+	case EP0_IN_STATUS_PHASE:
+		dwc_strcpy(str, "EP0_IN_STATUS_PHASE");
+		break;
+	case EP0_OUT_STATUS_PHASE:
+		dwc_strcpy(str, "EP0_OUT_STATUS_PHASE");
+		break;
+	case EP0_STALL:
+		dwc_strcpy(str, "EP0_STALL");
+		break;
+	default:
+		dwc_strcpy(str, "EP0_INVALID");
+	}
+
+	DWC_DEBUGPL(DBG_ANY, "%s(%d)\n", str, pcd->ep0state);
+#endif
+}
+
+/**
+ * This function calculate the size of the payload in the memory 
+ * for out endpoints and prints size for debug purposes(used in 
+ * 2.93a DevOutNak feature).
+ */
+static inline void print_memory_payload(dwc_otg_pcd_t * pcd,  dwc_ep_t * ep)
+{
+#ifdef DEBUG
+	deptsiz_data_t deptsiz_init = {.d32 = 0 };
+	deptsiz_data_t deptsiz_updt = {.d32 = 0 };
+	int pack_num;
+	unsigned payload;
+	
+	deptsiz_init.d32 = pcd->core_if->start_doeptsiz_val[ep->num];
+	deptsiz_updt.d32 =
+		DWC_READ_REG32(&pcd->core_if->dev_if->
+						out_ep_regs[ep->num]->doeptsiz);
+	/* Payload will be */
+	payload = deptsiz_init.b.xfersize - deptsiz_updt.b.xfersize;
+	/* Packet count is decremented every time a packet
+	 * is written to the RxFIFO not in to the external memory
+	 * So, if payload == 0, then it means no packet was sent to ext memory*/
+	pack_num = (!payload) ? 0 : (deptsiz_init.b.pktcnt - deptsiz_updt.b.pktcnt);
+	DWC_DEBUGPL(DBG_PCDV,
+		"Payload for EP%d-%s\n",
+		ep->num, (ep->is_in ? "IN" : "OUT"));
+	DWC_DEBUGPL(DBG_PCDV,
+		"Number of transfered bytes = 0x%08x\n", payload);
+	DWC_DEBUGPL(DBG_PCDV,
+		"Number of transfered packets = %d\n", pack_num);	
+#endif	
+}
+
+
+#ifdef DWC_UTE_CFI
+static inline void print_desc(struct dwc_otg_dma_desc *ddesc,
+			      const uint8_t * epname, int descnum)
+{
+	CFI_INFO
+	    ("%s DMA_DESC(%d) buf=0x%08x bytes=0x%04x; sp=0x%x; l=0x%x; sts=0x%02x; bs=0x%02x\n",
+	     epname, descnum, ddesc->buf, ddesc->status.b.bytes,
+	     ddesc->status.b.sp, ddesc->status.b.l, ddesc->status.b.sts,
+	     ddesc->status.b.bs);
+}
+#endif
+
+/**
+ * This function returns pointer to in ep struct with number ep_num
+ */
+static inline dwc_otg_pcd_ep_t *get_in_ep(dwc_otg_pcd_t * pcd, uint32_t ep_num)
+{
+	int i;
+	int num_in_eps = GET_CORE_IF(pcd)->dev_if->num_in_eps;
+	if (ep_num == 0) {
+		return &pcd->ep0;
+	} else {
+		for (i = 0; i < num_in_eps; ++i) {
+			if (pcd->in_ep[i].dwc_ep.num == ep_num)
+				return &pcd->in_ep[i];
+		}
+		return 0;
+	}
+}
+
+/**
+ * This function returns pointer to out ep struct with number ep_num
+ */
+static inline dwc_otg_pcd_ep_t *get_out_ep(dwc_otg_pcd_t * pcd, uint32_t ep_num)
+{
+	int i;
+	int num_out_eps = GET_CORE_IF(pcd)->dev_if->num_out_eps;
+	if (ep_num == 0) {
+		return &pcd->ep0;
+	} else {
+		for (i = 0; i < num_out_eps; ++i) {
+			if (pcd->out_ep[i].dwc_ep.num == ep_num)
+				return &pcd->out_ep[i];
+		}
+		return 0;
+	}
+}
+
+/**
+ * This functions gets a pointer to an EP from the wIndex address
+ * value of the control request.
+ */
+dwc_otg_pcd_ep_t *get_ep_by_addr(dwc_otg_pcd_t * pcd, u16 wIndex)
+{
+	dwc_otg_pcd_ep_t *ep;
+	uint32_t ep_num = UE_GET_ADDR(wIndex);
+
+	if (ep_num == 0) {
+		ep = &pcd->ep0;
+	} else if (UE_GET_DIR(wIndex) == UE_DIR_IN) {	/* in ep */
+		ep = &pcd->in_ep[ep_num - 1];
+	} else {
+		ep = &pcd->out_ep[ep_num - 1];
+	}
+
+	return ep;
+}
+
+/**
+ * This function checks the EP request queue, if the queue is not
+ * empty the next request is started.
+ */
+void start_next_request(dwc_otg_pcd_ep_t * ep)
+{
+	dwc_otg_pcd_request_t *req = 0;
+	uint32_t max_transfer =
+	    GET_CORE_IF(ep->pcd)->core_params->max_transfer_size;
+
+#ifdef DWC_UTE_CFI
+	struct dwc_otg_pcd *pcd;
+	pcd = ep->pcd;
+#endif
+
+	if (!DWC_CIRCLEQ_EMPTY(&ep->queue)) {
+		req = DWC_CIRCLEQ_FIRST(&ep->queue);
+
+#ifdef DWC_UTE_CFI
+		if (ep->dwc_ep.buff_mode != BM_STANDARD) {
+			ep->dwc_ep.cfi_req_len = req->length;
+			pcd->cfi->ops.build_descriptors(pcd->cfi, pcd, ep, req);
+		} else {
+#endif
+			/* Setup and start the Transfer */
+			ep->dwc_ep.dma_addr = req->dma;
+			ep->dwc_ep.start_xfer_buff = req->buf;
+			ep->dwc_ep.xfer_buff = req->buf;
+			ep->dwc_ep.sent_zlp = 0;
+			ep->dwc_ep.total_len = req->length;
+			ep->dwc_ep.xfer_len = 0;
+			ep->dwc_ep.xfer_count = 0;
+
+			ep->dwc_ep.maxxfer = max_transfer;
+			if (GET_CORE_IF(ep->pcd)->dma_desc_enable) {
+				uint32_t out_max_xfer = DDMA_MAX_TRANSFER_SIZE
+				    - (DDMA_MAX_TRANSFER_SIZE % 4);
+				if (ep->dwc_ep.is_in) {
+					if (ep->dwc_ep.maxxfer >
+					    DDMA_MAX_TRANSFER_SIZE) {
+						ep->dwc_ep.maxxfer =
+						    DDMA_MAX_TRANSFER_SIZE;
+					}
+				} else {
+					if (ep->dwc_ep.maxxfer > out_max_xfer) {
+						ep->dwc_ep.maxxfer =
+						    out_max_xfer;
+					}
+				}
+			}
+			if (ep->dwc_ep.maxxfer < ep->dwc_ep.total_len) {
+				ep->dwc_ep.maxxfer -=
+				    (ep->dwc_ep.maxxfer % ep->dwc_ep.maxpacket);
+			}
+			if (req->sent_zlp) {
+				if ((ep->dwc_ep.total_len %
+				     ep->dwc_ep.maxpacket == 0)
+				    && (ep->dwc_ep.total_len != 0)) {
+					ep->dwc_ep.sent_zlp = 1;
+				}
+
+			}
+#ifdef DWC_UTE_CFI
+		}
+#endif
+		dwc_otg_ep_start_transfer(GET_CORE_IF(ep->pcd), &ep->dwc_ep);
+	}
+}
+
+/**
+ * This function handles the SOF Interrupts. At this time the SOF
+ * Interrupt is disabled.
+ */
+int32_t dwc_otg_pcd_handle_sof_intr(dwc_otg_pcd_t * pcd)
+{
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+
+	gintsts_data_t gintsts;
+
+	DWC_DEBUGPL(DBG_PCD, "SOF\n");
+
+	/* Clear interrupt */
+	gintsts.d32 = 0;
+	gintsts.b.sofintr = 1;
+	DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, gintsts.d32);
+
+	return 1;
+}
+
+/**
+ * This function handles the Rx Status Queue Level Interrupt, which
+ * indicates that there is a least one packet in the Rx FIFO.  The
+ * packets are moved from the FIFO to memory, where they will be
+ * processed when the Endpoint Interrupt Register indicates Transfer
+ * Complete or SETUP Phase Done.
+ *
+ * Repeat the following until the Rx Status Queue is empty:
+ *	 -# Read the Receive Status Pop Register (GRXSTSP) to get Packet
+ *		info
+ *	 -# If Receive FIFO is empty then skip to step Clear the interrupt
+ *		and exit
+ *	 -# If SETUP Packet call dwc_otg_read_setup_packet to copy the
+ *		SETUP data to the buffer
+ *	 -# If OUT Data Packet call dwc_otg_read_packet to copy the data
+ *		to the destination buffer
+ */
+int32_t dwc_otg_pcd_handle_rx_status_q_level_intr(dwc_otg_pcd_t * pcd)
+{
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+	dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs;
+	gintmsk_data_t gintmask = {.d32 = 0 };
+	device_grxsts_data_t status;
+	dwc_otg_pcd_ep_t *ep;
+	gintsts_data_t gintsts;
+#ifdef DEBUG
+	static char *dpid_str[] = { "D0", "D2", "D1", "MDATA" };
+#endif
+
+	//DWC_DEBUGPL(DBG_PCDV, "%s(%p)\n", __func__, _pcd);
+	/* Disable the Rx Status Queue Level interrupt */
+	gintmask.b.rxstsqlvl = 1;
+	DWC_MODIFY_REG32(&global_regs->gintmsk, gintmask.d32, 0);
+
+	/* Get the Status from the top of the FIFO */
+	status.d32 = DWC_READ_REG32(&global_regs->grxstsp);
+
+	DWC_DEBUGPL(DBG_PCD, "EP:%d BCnt:%d DPID:%s "
+		    "pktsts:%x Frame:%d(0x%0x)\n",
+		    status.b.epnum, status.b.bcnt,
+		    dpid_str[status.b.dpid],
+		    status.b.pktsts, status.b.fn, status.b.fn);
+	/* Get pointer to EP structure */
+	ep = get_out_ep(pcd, status.b.epnum);
+
+	switch (status.b.pktsts) {
+	case DWC_DSTS_GOUT_NAK:
+		DWC_DEBUGPL(DBG_PCDV, "Global OUT NAK\n");
+		break;
+	case DWC_STS_DATA_UPDT:
+		DWC_DEBUGPL(DBG_PCDV, "OUT Data Packet\n");
+		if (status.b.bcnt && ep->dwc_ep.xfer_buff) {
+			/** @todo NGS Check for buffer overflow? */
+			dwc_otg_read_packet(core_if,
+					    ep->dwc_ep.xfer_buff,
+					    status.b.bcnt);
+			ep->dwc_ep.xfer_count += status.b.bcnt;
+			ep->dwc_ep.xfer_buff += status.b.bcnt;
+		}
+		break;
+	case DWC_STS_XFER_COMP:
+		DWC_DEBUGPL(DBG_PCDV, "OUT Complete\n");
+		break;
+	case DWC_DSTS_SETUP_COMP:
+#ifdef DEBUG_EP0
+		DWC_DEBUGPL(DBG_PCDV, "Setup Complete\n");
+#endif
+		break;
+	case DWC_DSTS_SETUP_UPDT:
+		dwc_otg_read_setup_packet(core_if, pcd->setup_pkt->d32);
+#ifdef DEBUG_EP0
+		DWC_DEBUGPL(DBG_PCD,
+			    "SETUP PKT: %02x.%02x v%04x i%04x l%04x\n",
+			    pcd->setup_pkt->req.bmRequestType,
+			    pcd->setup_pkt->req.bRequest,
+			    UGETW(pcd->setup_pkt->req.wValue),
+			    UGETW(pcd->setup_pkt->req.wIndex),
+			    UGETW(pcd->setup_pkt->req.wLength));
+#endif
+		ep->dwc_ep.xfer_count += status.b.bcnt;
+		break;
+	default:
+		DWC_DEBUGPL(DBG_PCDV, "Invalid Packet Status (0x%0x)\n",
+			    status.b.pktsts);
+		break;
+	}
+
+	/* Enable the Rx Status Queue Level interrupt */
+	DWC_MODIFY_REG32(&global_regs->gintmsk, 0, gintmask.d32);
+	/* Clear interrupt */
+	gintsts.d32 = 0;
+	gintsts.b.rxstsqlvl = 1;
+	DWC_WRITE_REG32(&global_regs->gintsts, gintsts.d32);
+
+	//DWC_DEBUGPL(DBG_PCDV, "EXIT: %s\n", __func__);
+	return 1;
+}
+
+/**
+ * This function examines the Device IN Token Learning Queue to
+ * determine the EP number of the last IN token received.  This
+ * implementation is for the Mass Storage device where there are only
+ * 2 IN EPs (Control-IN and BULK-IN).
+ *
+ * The EP numbers for the first six IN Tokens are in DTKNQR1 and there
+ * are 8 EP Numbers in each of the other possible DTKNQ Registers.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ *
+ */
+static inline int get_ep_of_last_in_token(dwc_otg_core_if_t * core_if)
+{
+	dwc_otg_device_global_regs_t *dev_global_regs =
+	    core_if->dev_if->dev_global_regs;
+	const uint32_t TOKEN_Q_DEPTH = core_if->hwcfg2.b.dev_token_q_depth;
+	/* Number of Token Queue Registers */
+	const int DTKNQ_REG_CNT = (TOKEN_Q_DEPTH + 7) / 8;
+	dtknq1_data_t dtknqr1;
+	uint32_t in_tkn_epnums[4];
+	int ndx = 0;
+	int i = 0;
+	volatile uint32_t *addr = &dev_global_regs->dtknqr1;
+	int epnum = 0;
+
+	//DWC_DEBUGPL(DBG_PCD,"dev_token_q_depth=%d\n",TOKEN_Q_DEPTH);
+
+	/* Read the DTKNQ Registers */
+	for (i = 0; i < DTKNQ_REG_CNT; i++) {
+		in_tkn_epnums[i] = DWC_READ_REG32(addr);
+		DWC_DEBUGPL(DBG_PCDV, "DTKNQR%d=0x%08x\n", i + 1,
+			    in_tkn_epnums[i]);
+		if (addr == &dev_global_regs->dvbusdis) {
+			addr = &dev_global_regs->dtknqr3_dthrctl;
+		} else {
+			++addr;
+		}
+
+	}
+
+	/* Copy the DTKNQR1 data to the bit field. */
+	dtknqr1.d32 = in_tkn_epnums[0];
+	/* Get the EP numbers */
+	in_tkn_epnums[0] = dtknqr1.b.epnums0_5;
+	ndx = dtknqr1.b.intknwptr - 1;
+
+	//DWC_DEBUGPL(DBG_PCDV,"ndx=%d\n",ndx);
+	if (ndx == -1) {
+		/** @todo Find a simpler way to calculate the max
+		 * queue position.*/
+		int cnt = TOKEN_Q_DEPTH;
+		if (TOKEN_Q_DEPTH <= 6) {
+			cnt = TOKEN_Q_DEPTH - 1;
+		} else if (TOKEN_Q_DEPTH <= 14) {
+			cnt = TOKEN_Q_DEPTH - 7;
+		} else if (TOKEN_Q_DEPTH <= 22) {
+			cnt = TOKEN_Q_DEPTH - 15;
+		} else {
+			cnt = TOKEN_Q_DEPTH - 23;
+		}
+		epnum = (in_tkn_epnums[DTKNQ_REG_CNT - 1] >> (cnt * 4)) & 0xF;
+	} else {
+		if (ndx <= 5) {
+			epnum = (in_tkn_epnums[0] >> (ndx * 4)) & 0xF;
+		} else if (ndx <= 13) {
+			ndx -= 6;
+			epnum = (in_tkn_epnums[1] >> (ndx * 4)) & 0xF;
+		} else if (ndx <= 21) {
+			ndx -= 14;
+			epnum = (in_tkn_epnums[2] >> (ndx * 4)) & 0xF;
+		} else if (ndx <= 29) {
+			ndx -= 22;
+			epnum = (in_tkn_epnums[3] >> (ndx * 4)) & 0xF;
+		}
+	}
+	//DWC_DEBUGPL(DBG_PCD,"epnum=%d\n",epnum);
+	return epnum;
+}
+
+/**
+ * This interrupt occurs when the non-periodic Tx FIFO is half-empty.
+ * The active request is checked for the next packet to be loaded into
+ * the non-periodic Tx FIFO.
+ */
+int32_t dwc_otg_pcd_handle_np_tx_fifo_empty_intr(dwc_otg_pcd_t * pcd)
+{
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+	dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs;
+	dwc_otg_dev_in_ep_regs_t *ep_regs;
+	gnptxsts_data_t txstatus = {.d32 = 0 };
+	gintsts_data_t gintsts;
+
+	int epnum = 0;
+	dwc_otg_pcd_ep_t *ep = 0;
+	uint32_t len = 0;
+	int dwords;
+
+	/* Get the epnum from the IN Token Learning Queue. */
+	epnum = get_ep_of_last_in_token(core_if);
+	ep = get_in_ep(pcd, epnum);
+
+	DWC_DEBUGPL(DBG_PCD, "NP TxFifo Empty: %d \n", epnum);
+
+	ep_regs = core_if->dev_if->in_ep_regs[epnum];
+
+	len = ep->dwc_ep.xfer_len - ep->dwc_ep.xfer_count;
+	if (len > ep->dwc_ep.maxpacket) {
+		len = ep->dwc_ep.maxpacket;
+	}
+	dwords = (len + 3) / 4;
+
+	/* While there is space in the queue and space in the FIFO and
+	 * More data to tranfer, Write packets to the Tx FIFO */
+	txstatus.d32 = DWC_READ_REG32(&global_regs->gnptxsts);
+	DWC_DEBUGPL(DBG_PCDV, "b4 GNPTXSTS=0x%08x\n", txstatus.d32);
+
+	while (txstatus.b.nptxqspcavail > 0 &&
+	       txstatus.b.nptxfspcavail > dwords &&
+	       ep->dwc_ep.xfer_count < ep->dwc_ep.xfer_len) {
+		/* Write the FIFO */
+		dwc_otg_ep_write_packet(core_if, &ep->dwc_ep, 0);
+		len = ep->dwc_ep.xfer_len - ep->dwc_ep.xfer_count;
+
+		if (len > ep->dwc_ep.maxpacket) {
+			len = ep->dwc_ep.maxpacket;
+		}
+
+		dwords = (len + 3) / 4;
+		txstatus.d32 = DWC_READ_REG32(&global_regs->gnptxsts);
+		DWC_DEBUGPL(DBG_PCDV, "GNPTXSTS=0x%08x\n", txstatus.d32);
+	}
+
+	DWC_DEBUGPL(DBG_PCDV, "GNPTXSTS=0x%08x\n",
+		    DWC_READ_REG32(&global_regs->gnptxsts));
+
+	/* Clear interrupt */
+	gintsts.d32 = 0;
+	gintsts.b.nptxfempty = 1;
+	DWC_WRITE_REG32(&global_regs->gintsts, gintsts.d32);
+
+	return 1;
+}
+
+/**
+ * This function is called when dedicated Tx FIFO Empty interrupt occurs.
+ * The active request is checked for the next packet to be loaded into
+ * apropriate Tx FIFO.
+ */
+static int32_t write_empty_tx_fifo(dwc_otg_pcd_t * pcd, uint32_t epnum)
+{
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+	dwc_otg_dev_if_t *dev_if = core_if->dev_if;
+	dwc_otg_dev_in_ep_regs_t *ep_regs;
+	dtxfsts_data_t txstatus = {.d32 = 0 };
+	dwc_otg_pcd_ep_t *ep = 0;
+	uint32_t len = 0;
+	int dwords;
+
+	ep = get_in_ep(pcd, epnum);
+
+	DWC_DEBUGPL(DBG_PCD, "Dedicated TxFifo Empty: %d \n", epnum);
+
+	ep_regs = core_if->dev_if->in_ep_regs[epnum];
+
+	len = ep->dwc_ep.xfer_len - ep->dwc_ep.xfer_count;
+
+	if (len > ep->dwc_ep.maxpacket) {
+		len = ep->dwc_ep.maxpacket;
+	}
+
+	dwords = (len + 3) / 4;
+
+	/* While there is space in the queue and space in the FIFO and
+	 * More data to tranfer, Write packets to the Tx FIFO */
+	txstatus.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[epnum]->dtxfsts);
+	DWC_DEBUGPL(DBG_PCDV, "b4 dtxfsts[%d]=0x%08x\n", epnum, txstatus.d32);
+
+	while (txstatus.b.txfspcavail > dwords &&
+	       ep->dwc_ep.xfer_count < ep->dwc_ep.xfer_len &&
+	       ep->dwc_ep.xfer_len != 0) {
+		/* Write the FIFO */
+		dwc_otg_ep_write_packet(core_if, &ep->dwc_ep, 0);
+
+		len = ep->dwc_ep.xfer_len - ep->dwc_ep.xfer_count;
+		if (len > ep->dwc_ep.maxpacket) {
+			len = ep->dwc_ep.maxpacket;
+		}
+
+		dwords = (len + 3) / 4;
+		txstatus.d32 =
+		    DWC_READ_REG32(&dev_if->in_ep_regs[epnum]->dtxfsts);
+		DWC_DEBUGPL(DBG_PCDV, "dtxfsts[%d]=0x%08x\n", epnum,
+			    txstatus.d32);
+	}
+
+	DWC_DEBUGPL(DBG_PCDV, "b4 dtxfsts[%d]=0x%08x\n", epnum,
+		    DWC_READ_REG32(&dev_if->in_ep_regs[epnum]->dtxfsts));
+
+	return 1;
+}
+
+/**
+ * This function is called when the Device is disconnected. It stops
+ * any active requests and informs the Gadget driver of the
+ * disconnect.
+ */
+void dwc_otg_pcd_stop(dwc_otg_pcd_t * pcd)
+{
+	int i, num_in_eps, num_out_eps;
+	dwc_otg_pcd_ep_t *ep;
+
+	gintmsk_data_t intr_mask = {.d32 = 0 };
+
+	DWC_SPINLOCK(pcd->lock);
+
+	num_in_eps = GET_CORE_IF(pcd)->dev_if->num_in_eps;
+	num_out_eps = GET_CORE_IF(pcd)->dev_if->num_out_eps;
+
+	DWC_DEBUGPL(DBG_PCDV, "%s() \n", __func__);
+	/* don't disconnect drivers more than once */
+	if (pcd->ep0state == EP0_DISCONNECT) {
+		DWC_DEBUGPL(DBG_ANY, "%s() Already Disconnected\n", __func__);
+		DWC_SPINUNLOCK(pcd->lock);
+		return;
+	}
+	pcd->ep0state = EP0_DISCONNECT;
+
+	/* Reset the OTG state. */
+	dwc_otg_pcd_update_otg(pcd, 1);
+
+	/* Disable the NP Tx Fifo Empty Interrupt. */
+	intr_mask.b.nptxfempty = 1;
+	DWC_MODIFY_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintmsk,
+			 intr_mask.d32, 0);
+
+	/* Flush the FIFOs */
+	/**@todo NGS Flush Periodic FIFOs */
+	dwc_otg_flush_tx_fifo(GET_CORE_IF(pcd), 0x10);
+	dwc_otg_flush_rx_fifo(GET_CORE_IF(pcd));
+
+	/* prevent new request submissions, kill any outstanding requests  */
+	ep = &pcd->ep0;
+	dwc_otg_request_nuke(ep);
+	/* prevent new request submissions, kill any outstanding requests  */
+	for (i = 0; i < num_in_eps; i++) {
+		dwc_otg_pcd_ep_t *ep = &pcd->in_ep[i];
+		dwc_otg_request_nuke(ep);
+	}
+	/* prevent new request submissions, kill any outstanding requests  */
+	for (i = 0; i < num_out_eps; i++) {
+		dwc_otg_pcd_ep_t *ep = &pcd->out_ep[i];
+		dwc_otg_request_nuke(ep);
+	}
+
+	/* report disconnect; the driver is already quiesced */
+	if (pcd->fops->disconnect) {
+		DWC_SPINUNLOCK(pcd->lock);
+		pcd->fops->disconnect(pcd);
+		DWC_SPINLOCK(pcd->lock);
+	}
+	DWC_SPINUNLOCK(pcd->lock);
+}
+
+/**
+ * This interrupt indicates that ...
+ */
+int32_t dwc_otg_pcd_handle_i2c_intr(dwc_otg_pcd_t * pcd)
+{
+	gintmsk_data_t intr_mask = {.d32 = 0 };
+	gintsts_data_t gintsts;
+
+	DWC_PRINTF("INTERRUPT Handler not implemented for %s\n", "i2cintr");
+	intr_mask.b.i2cintr = 1;
+	DWC_MODIFY_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintmsk,
+			 intr_mask.d32, 0);
+
+	/* Clear interrupt */
+	gintsts.d32 = 0;
+	gintsts.b.i2cintr = 1;
+	DWC_WRITE_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintsts,
+			gintsts.d32);
+	return 1;
+}
+
+/**
+ * This interrupt indicates that ...
+ */
+int32_t dwc_otg_pcd_handle_early_suspend_intr(dwc_otg_pcd_t * pcd)
+{
+	gintsts_data_t gintsts;
+#if defined(VERBOSE)
+	DWC_PRINTF("Early Suspend Detected\n");
+#endif
+
+	/* Clear interrupt */
+	gintsts.d32 = 0;
+	gintsts.b.erlysuspend = 1;
+	DWC_WRITE_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintsts,
+			gintsts.d32);
+	return 1;
+}
+
+/**
+ * This function configures EPO to receive SETUP packets.
+ *
+ * @todo NGS: Update the comments from the HW FS.
+ *
+ *	-# Program the following fields in the endpoint specific registers
+ *	for Control OUT EP 0, in order to receive a setup packet
+ *	- DOEPTSIZ0.Packet Count = 3 (To receive up to 3 back to back
+ *	  setup packets)
+ *	- DOEPTSIZE0.Transfer Size = 24 Bytes (To receive up to 3 back
+ *	  to back setup packets)
+ *		- In DMA mode, DOEPDMA0 Register with a memory address to
+ *		  store any setup packets received
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param pcd	  Programming view of the PCD.
+ */
+static inline void ep0_out_start(dwc_otg_core_if_t * core_if,
+				 dwc_otg_pcd_t * pcd)
+{
+	dwc_otg_dev_if_t *dev_if = core_if->dev_if;
+	deptsiz0_data_t doeptsize0 = {.d32 = 0 };
+	dwc_otg_dev_dma_desc_t *dma_desc;
+	depctl_data_t doepctl = {.d32 = 0 };
+
+#ifdef VERBOSE
+	DWC_DEBUGPL(DBG_PCDV, "%s() doepctl0=%0x\n", __func__,
+		    DWC_READ_REG32(&dev_if->out_ep_regs[0]->doepctl));
+#endif
+
+	doeptsize0.b.supcnt = 3;
+	doeptsize0.b.pktcnt = 1;
+	doeptsize0.b.xfersize = 8 * 3;
+
+	if (core_if->dma_enable) {
+		if (!core_if->dma_desc_enable) {
+			/** put here as for Hermes mode deptisz register should not be written */
+			DWC_WRITE_REG32(&dev_if->out_ep_regs[0]->doeptsiz,
+					doeptsize0.d32);
+
+			/** @todo dma needs to handle multiple setup packets (up to 3) */
+			DWC_WRITE_REG32(&dev_if->out_ep_regs[0]->doepdma,
+					pcd->setup_pkt_dma_handle);
+		} else {
+			dev_if->setup_desc_index =
+			    (dev_if->setup_desc_index + 1) & 1;
+			dma_desc =
+			    dev_if->setup_desc_addr[dev_if->setup_desc_index];
+
+			/** DMA Descriptor Setup */
+			dma_desc->status.b.bs = BS_HOST_BUSY;
+			dma_desc->status.b.l = 1;
+			dma_desc->status.b.ioc = 1;
+			dma_desc->status.b.bytes = pcd->ep0.dwc_ep.maxpacket;
+			dma_desc->buf = pcd->setup_pkt_dma_handle;
+			dma_desc->status.b.bs = BS_HOST_READY;
+
+			/** DOEPDMA0 Register write */
+			DWC_WRITE_REG32(&dev_if->out_ep_regs[0]->doepdma,
+					dev_if->
+					dma_setup_desc_addr
+					[dev_if->setup_desc_index]);
+		}
+
+	} else {
+		/** put here as for Hermes mode deptisz register should not be written */
+		DWC_WRITE_REG32(&dev_if->out_ep_regs[0]->doeptsiz,
+				doeptsize0.d32);
+	}
+
+	/** DOEPCTL0 Register write */
+	doepctl.b.epena = 1;
+	doepctl.b.cnak = 1;
+	DWC_WRITE_REG32(&dev_if->out_ep_regs[0]->doepctl, doepctl.d32);
+
+#ifdef VERBOSE
+	DWC_DEBUGPL(DBG_PCDV, "doepctl0=%0x\n",
+		    DWC_READ_REG32(&dev_if->out_ep_regs[0]->doepctl));
+	DWC_DEBUGPL(DBG_PCDV, "diepctl0=%0x\n",
+		    DWC_READ_REG32(&dev_if->in_ep_regs[0]->diepctl));
+#endif
+}
+
+/**
+ * This interrupt occurs when a USB Reset is detected. When the USB
+ * Reset Interrupt occurs the device state is set to DEFAULT and the
+ * EP0 state is set to IDLE.
+ *	-#	Set the NAK bit for all OUT endpoints (DOEPCTLn.SNAK = 1)
+ *	-#	Unmask the following interrupt bits
+ *		- DAINTMSK.INEP0 = 1 (Control 0 IN endpoint)
+ *	- DAINTMSK.OUTEP0 = 1 (Control 0 OUT endpoint)
+ *	- DOEPMSK.SETUP = 1
+ *	- DOEPMSK.XferCompl = 1
+ *	- DIEPMSK.XferCompl = 1
+ *	- DIEPMSK.TimeOut = 1
+ *	-# Program the following fields in the endpoint specific registers
+ *	for Control OUT EP 0, in order to receive a setup packet
+ *	- DOEPTSIZ0.Packet Count = 3 (To receive up to 3 back to back
+ *	  setup packets)
+ *	- DOEPTSIZE0.Transfer Size = 24 Bytes (To receive up to 3 back
+ *	  to back setup packets)
+ *		- In DMA mode, DOEPDMA0 Register with a memory address to
+ *		  store any setup packets received
+ * At this point, all the required initialization, except for enabling
+ * the control 0 OUT endpoint is done, for receiving SETUP packets.
+ */
+int32_t dwc_otg_pcd_handle_usb_reset_intr(dwc_otg_pcd_t * pcd)
+{
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+	dwc_otg_dev_if_t *dev_if = core_if->dev_if;
+	depctl_data_t doepctl = {.d32 = 0 };
+	depctl_data_t diepctl = {.d32 = 0 };
+	daint_data_t daintmsk = {.d32 = 0 };
+	doepmsk_data_t doepmsk = {.d32 = 0 };
+	diepmsk_data_t diepmsk = {.d32 = 0 };
+	dcfg_data_t dcfg = {.d32 = 0 };
+	grstctl_t resetctl = {.d32 = 0 };
+	dctl_data_t dctl = {.d32 = 0 };
+	int i = 0;
+	gintsts_data_t gintsts;
+	pcgcctl_data_t power = {.d32 = 0 };
+
+	power.d32 = DWC_READ_REG32(core_if->pcgcctl);
+	if (power.b.stoppclk) {
+		power.d32 = 0;
+		power.b.stoppclk = 1;
+		DWC_MODIFY_REG32(core_if->pcgcctl, power.d32, 0);
+
+		power.b.pwrclmp = 1;
+		DWC_MODIFY_REG32(core_if->pcgcctl, power.d32, 0);
+
+		power.b.rstpdwnmodule = 1;
+		DWC_MODIFY_REG32(core_if->pcgcctl, power.d32, 0);
+	}
+
+	core_if->lx_state = DWC_OTG_L0;
+
+	DWC_PRINTF("USB RESET\n");
+#ifdef DWC_EN_ISOC
+	for (i = 1; i < 16; ++i) {
+		dwc_otg_pcd_ep_t *ep;
+		dwc_ep_t *dwc_ep;
+		ep = get_in_ep(pcd, i);
+		if (ep != 0) {
+			dwc_ep = &ep->dwc_ep;
+			dwc_ep->next_frame = 0xffffffff;
+		}
+	}
+#endif /* DWC_EN_ISOC */
+
+	/* reset the HNP settings */
+	dwc_otg_pcd_update_otg(pcd, 1);
+
+	/* Clear the Remote Wakeup Signalling */
+	dctl.b.rmtwkupsig = 1;
+	DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->dctl, dctl.d32, 0);
+
+	/* Set NAK for all OUT EPs */
+	doepctl.b.snak = 1;
+	for (i = 0; i <= dev_if->num_out_eps; i++) {
+		DWC_WRITE_REG32(&dev_if->out_ep_regs[i]->doepctl, doepctl.d32);
+	}
+
+	/* Flush the NP Tx FIFO */
+	dwc_otg_flush_tx_fifo(core_if, 0x10);
+	/* Flush the Learning Queue */
+	resetctl.b.intknqflsh = 1;
+	DWC_WRITE_REG32(&core_if->core_global_regs->grstctl, resetctl.d32);
+
+	if (!core_if->core_params->en_multiple_tx_fifo && core_if->dma_enable) {
+		core_if->start_predict = 0;
+		for (i = 0; i<= core_if->dev_if->num_in_eps; ++i) {
+			core_if->nextep_seq[i] = 0xff;	// 0xff - EP not active
+		}
+		core_if->nextep_seq[0] = 0;	
+		core_if->first_in_nextep_seq = 0;
+		diepctl.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[0]->diepctl);
+		diepctl.b.nextep = 0;
+		DWC_WRITE_REG32(&dev_if->in_ep_regs[0]->diepctl, diepctl.d32);
+		
+		/* Update IN Endpoint Mismatch Count by active IN NP EP count + 1 */
+		dcfg.d32 = DWC_READ_REG32(&dev_if->dev_global_regs->dcfg);
+		dcfg.b.epmscnt = 2;
+		DWC_WRITE_REG32(&dev_if->dev_global_regs->dcfg, dcfg.d32);
+
+		DWC_DEBUGPL(DBG_PCDV,"%s first_in_nextep_seq= %2d; nextep_seq[]:\n", 
+			__func__, core_if->first_in_nextep_seq);
+		for (i=0; i <= core_if->dev_if->num_in_eps; i++) {
+			DWC_DEBUGPL(DBG_PCDV, "%2d\n", core_if->nextep_seq[i]);
+		}
+	}
+
+	if (core_if->multiproc_int_enable) {
+		daintmsk.b.inep0 = 1;
+		daintmsk.b.outep0 = 1;
+		DWC_WRITE_REG32(&dev_if->dev_global_regs->deachintmsk,
+				daintmsk.d32);
+
+		doepmsk.b.setup = 1;
+		doepmsk.b.xfercompl = 1;
+		doepmsk.b.ahberr = 1;
+		doepmsk.b.epdisabled = 1;
+
+		if (core_if->dma_desc_enable) {
+			doepmsk.b.stsphsercvd = 1;
+			//doepmsk.b.bna = 1;
+		}
+/*		
+		doepmsk.b.babble = 1;
+		doepmsk.b.nyet = 1;
+		
+		if (core_if->dma_enable) {
+			doepmsk.b.nak = 1;
+		}
+*/
+		DWC_WRITE_REG32(&dev_if->dev_global_regs->doepeachintmsk[0],
+				doepmsk.d32);
+
+		diepmsk.b.xfercompl = 1;
+		diepmsk.b.timeout = 1;
+		diepmsk.b.epdisabled = 1;
+		diepmsk.b.ahberr = 1;
+		diepmsk.b.intknepmis = 1; 
+		if (!core_if->en_multiple_tx_fifo && core_if->dma_enable)
+			diepmsk.b.intknepmis = 0; 
+
+/*		if (core_if->dma_desc_enable) {
+			diepmsk.b.bna = 1;
+		}
+*/
+/*		
+		if (core_if->dma_enable) {
+			diepmsk.b.nak = 1;
+		}
+*/
+		DWC_WRITE_REG32(&dev_if->dev_global_regs->diepeachintmsk[0],
+				diepmsk.d32);
+	} else {
+		daintmsk.b.inep0 = 1;
+		daintmsk.b.outep0 = 1;
+		DWC_WRITE_REG32(&dev_if->dev_global_regs->daintmsk,
+				daintmsk.d32);
+
+		doepmsk.b.setup = 1;
+		doepmsk.b.xfercompl = 1;
+		doepmsk.b.ahberr = 1;
+		doepmsk.b.epdisabled = 1;
+
+		if (core_if->dma_desc_enable) {
+			doepmsk.b.stsphsercvd = 1;
+			//doepmsk.b.bna = 1;
+		}
+		DWC_WRITE_REG32(&dev_if->dev_global_regs->doepmsk, doepmsk.d32);
+
+		diepmsk.b.xfercompl = 1;
+		diepmsk.b.timeout = 1;
+		diepmsk.b.epdisabled = 1;
+		diepmsk.b.ahberr = 1;
+		if (!core_if->en_multiple_tx_fifo && core_if->dma_enable)
+			diepmsk.b.intknepmis = 0; 
+/*
+		if (core_if->dma_desc_enable) {
+			diepmsk.b.bna = 1;
+		}
+*/
+
+		DWC_WRITE_REG32(&dev_if->dev_global_regs->diepmsk, diepmsk.d32);
+	}
+
+	/* Reset Device Address */
+	dcfg.d32 = DWC_READ_REG32(&dev_if->dev_global_regs->dcfg);
+	dcfg.b.devaddr = 0;
+	DWC_WRITE_REG32(&dev_if->dev_global_regs->dcfg, dcfg.d32);
+
+	/* setup EP0 to receive SETUP packets */
+	ep0_out_start(core_if, pcd);
+
+	/* Clear interrupt */
+	gintsts.d32 = 0;
+	gintsts.b.usbreset = 1;
+	DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, gintsts.d32);
+
+	return 1;
+}
+
+/**
+ * Get the device speed from the device status register and convert it
+ * to USB speed constant.
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ */
+static int get_device_speed(dwc_otg_core_if_t * core_if)
+{
+	dsts_data_t dsts;
+	int speed = 0;
+	dsts.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dsts);
+
+	switch (dsts.b.enumspd) {
+	case DWC_DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ:
+		speed = USB_SPEED_HIGH;
+		break;
+	case DWC_DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ:
+	case DWC_DSTS_ENUMSPD_FS_PHY_48MHZ:
+		speed = USB_SPEED_FULL;
+		break;
+
+	case DWC_DSTS_ENUMSPD_LS_PHY_6MHZ:
+		speed = USB_SPEED_LOW;
+		break;
+	}
+
+	return speed;
+}
+
+/**
+ * Read the device status register and set the device speed in the
+ * data structure.
+ * Set up EP0 to receive SETUP packets by calling dwc_ep0_activate.
+ */
+int32_t dwc_otg_pcd_handle_enum_done_intr(dwc_otg_pcd_t * pcd)
+{
+	dwc_otg_pcd_ep_t *ep0 = &pcd->ep0;
+	gintsts_data_t gintsts;
+	gusbcfg_data_t gusbcfg;
+	dwc_otg_core_global_regs_t *global_regs =
+	    GET_CORE_IF(pcd)->core_global_regs;
+	uint8_t utmi16b, utmi8b;
+	int speed;
+	DWC_DEBUGPL(DBG_PCD, "SPEED ENUM\n");
+
+	if (GET_CORE_IF(pcd)->snpsid >= OTG_CORE_REV_2_60a) {
+		utmi16b = 6;	//vahrama old value was 6;
+		utmi8b = 9;
+	} else {
+		utmi16b = 4;
+		utmi8b = 8;
+	}
+	dwc_otg_ep0_activate(GET_CORE_IF(pcd), &ep0->dwc_ep);
+
+#ifdef DEBUG_EP0
+	print_ep0_state(pcd);
+#endif
+
+	if (pcd->ep0state == EP0_DISCONNECT) {
+		pcd->ep0state = EP0_IDLE;
+	} else if (pcd->ep0state == EP0_STALL) {
+		pcd->ep0state = EP0_IDLE;
+	}
+
+	pcd->ep0state = EP0_IDLE;
+
+	ep0->stopped = 0;
+
+	speed = get_device_speed(GET_CORE_IF(pcd));
+	pcd->fops->connect(pcd, speed);
+
+	/* Set USB turnaround time based on device speed and PHY interface. */
+	gusbcfg.d32 = DWC_READ_REG32(&global_regs->gusbcfg);
+	if (speed == USB_SPEED_HIGH) {
+		if (GET_CORE_IF(pcd)->hwcfg2.b.hs_phy_type ==
+		    DWC_HWCFG2_HS_PHY_TYPE_ULPI) {
+			/* ULPI interface */
+			gusbcfg.b.usbtrdtim = 9;
+		}
+		if (GET_CORE_IF(pcd)->hwcfg2.b.hs_phy_type ==
+		    DWC_HWCFG2_HS_PHY_TYPE_UTMI) {
+			/* UTMI+ interface */
+			if (GET_CORE_IF(pcd)->hwcfg4.b.utmi_phy_data_width == 0) {
+				gusbcfg.b.usbtrdtim = utmi8b;
+			} else if (GET_CORE_IF(pcd)->hwcfg4.
+				   b.utmi_phy_data_width == 1) {
+				gusbcfg.b.usbtrdtim = utmi16b;
+			} else if (GET_CORE_IF(pcd)->
+				   core_params->phy_utmi_width == 8) {
+				gusbcfg.b.usbtrdtim = utmi8b;
+			} else {
+				gusbcfg.b.usbtrdtim = utmi16b;
+			}
+		}
+		if (GET_CORE_IF(pcd)->hwcfg2.b.hs_phy_type ==
+		    DWC_HWCFG2_HS_PHY_TYPE_UTMI_ULPI) {
+			/* UTMI+  OR  ULPI interface */
+			if (gusbcfg.b.ulpi_utmi_sel == 1) {
+				/* ULPI interface */
+				gusbcfg.b.usbtrdtim = 9;
+			} else {
+				/* UTMI+ interface */
+				if (GET_CORE_IF(pcd)->
+				    core_params->phy_utmi_width == 16) {
+					gusbcfg.b.usbtrdtim = utmi16b;
+				} else {
+					gusbcfg.b.usbtrdtim = utmi8b;
+				}
+			}
+		}
+	} else {
+		/* Full or low speed */
+		gusbcfg.b.usbtrdtim = 9;
+	}
+	DWC_WRITE_REG32(&global_regs->gusbcfg, gusbcfg.d32);
+
+	/* Clear interrupt */
+	gintsts.d32 = 0;
+	gintsts.b.enumdone = 1;
+	DWC_WRITE_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintsts,
+			gintsts.d32);
+	return 1;
+}
+
+/**
+ * This interrupt indicates that the ISO OUT Packet was dropped due to
+ * Rx FIFO full or Rx Status Queue Full.  If this interrupt occurs
+ * read all the data from the Rx FIFO.
+ */
+int32_t dwc_otg_pcd_handle_isoc_out_packet_dropped_intr(dwc_otg_pcd_t * pcd)
+{
+	gintmsk_data_t intr_mask = {.d32 = 0 };
+	gintsts_data_t gintsts;
+
+	DWC_WARN("INTERRUPT Handler not implemented for %s\n",
+		 "ISOC Out Dropped");
+
+	intr_mask.b.isooutdrop = 1;
+	DWC_MODIFY_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintmsk,
+			 intr_mask.d32, 0);
+
+	/* Clear interrupt */
+	gintsts.d32 = 0;
+	gintsts.b.isooutdrop = 1;
+	DWC_WRITE_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintsts,
+			gintsts.d32);
+
+	return 1;
+}
+
+/**
+ * This interrupt indicates the end of the portion of the micro-frame
+ * for periodic transactions.  If there is a periodic transaction for
+ * the next frame, load the packets into the EP periodic Tx FIFO.
+ */
+int32_t dwc_otg_pcd_handle_end_periodic_frame_intr(dwc_otg_pcd_t * pcd)
+{
+	gintmsk_data_t intr_mask = {.d32 = 0 };
+	gintsts_data_t gintsts;
+	DWC_PRINTF("INTERRUPT Handler not implemented for %s\n", "EOP");
+
+	intr_mask.b.eopframe = 1;
+	DWC_MODIFY_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintmsk,
+			 intr_mask.d32, 0);
+
+	/* Clear interrupt */
+	gintsts.d32 = 0;
+	gintsts.b.eopframe = 1;
+	DWC_WRITE_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintsts,
+			gintsts.d32);
+
+	return 1;
+}
+
+/**
+ * This interrupt indicates that EP of the packet on the top of the
+ * non-periodic Tx FIFO does not match EP of the IN Token received.
+ *
+ * The "Device IN Token Queue" Registers are read to determine the
+ * order the IN Tokens have been received. The non-periodic Tx FIFO
+ * is flushed, so it can be reloaded in the order seen in the IN Token
+ * Queue.
+ */
+int32_t dwc_otg_pcd_handle_ep_mismatch_intr(dwc_otg_pcd_t * pcd)
+{
+	gintsts_data_t gintsts;
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+	dctl_data_t dctl;
+	gintmsk_data_t intr_mask = {.d32 = 0 };
+
+	if (!core_if->en_multiple_tx_fifo && core_if->dma_enable) {
+		core_if->start_predict = 1;
+	
+		DWC_DEBUGPL(DBG_PCDV, "%s(%p)\n", __func__, core_if);
+	
+		gintsts.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintsts);
+		if (!gintsts.b.ginnakeff) {
+			/* Disable EP Mismatch interrupt */
+			intr_mask.d32 = 0;
+			intr_mask.b.epmismatch = 1;
+			DWC_MODIFY_REG32(&core_if->core_global_regs->gintmsk, intr_mask.d32, 0);
+			/* Enable the Global IN NAK Effective Interrupt */
+			intr_mask.d32 = 0;
+			intr_mask.b.ginnakeff = 1;
+			DWC_MODIFY_REG32(&core_if->core_global_regs->gintmsk, 0, intr_mask.d32);
+			/* Set the global non-periodic IN NAK handshake */
+			dctl.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dctl);
+			dctl.b.sgnpinnak = 1;
+			DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dctl, dctl.d32);
+		} else {
+			DWC_PRINTF("gintsts.b.ginnakeff = 1! dctl.b.sgnpinnak not set\n");
+		}
+		/* Disabling of all EP's will be done in dwc_otg_pcd_handle_in_nak_effective() handler */
+		/* after Global IN NAK Effective interrupt will be asserted */
+	}
+	/* Clear interrupt */
+	gintsts.d32 = 0;
+	gintsts.b.epmismatch = 1;
+	DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, gintsts.d32);
+
+	return 1;
+}
+
+/**
+ * This interrupt is valid only in DMA mode. This interrupt indicates that the
+ * core has stopped fetching data for IN endpoints due to the unavailability of
+ * TxFIFO space or Request Queue space. This interrupt is used by the
+ * application for an endpoint mismatch algorithm.
+ * 
+ * @param pcd The PCD 
+ */
+int32_t dwc_otg_pcd_handle_ep_fetsusp_intr(dwc_otg_pcd_t * pcd)
+{
+	gintsts_data_t gintsts;
+	gintmsk_data_t gintmsk_data;
+	dctl_data_t dctl;
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+	DWC_DEBUGPL(DBG_PCDV, "%s(%p)\n", __func__, core_if);
+	
+	/* Clear the global non-periodic IN NAK handshake */
+	dctl.d32 = 0;
+	dctl.b.cgnpinnak = 1;
+	DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->dctl, dctl.d32, dctl.d32); 
+	
+	/* Mask GINTSTS.FETSUSP interrupt */
+	gintmsk_data.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintmsk);
+	gintmsk_data.b.fetsusp = 0;
+	DWC_WRITE_REG32(&core_if->core_global_regs->gintmsk, gintmsk_data.d32);
+
+	/* Clear interrupt */
+	gintsts.d32 = 0;
+	gintsts.b.fetsusp = 1;
+	DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, gintsts.d32);
+
+	return 1;
+}
+/**
+ * This funcion stalls EP0.
+ */
+static inline void ep0_do_stall(dwc_otg_pcd_t * pcd, const int err_val)
+{
+	dwc_otg_pcd_ep_t *ep0 = &pcd->ep0;
+	usb_device_request_t *ctrl = &pcd->setup_pkt->req;
+	DWC_WARN("req %02x.%02x protocol STALL; err %d\n",
+		 ctrl->bmRequestType, ctrl->bRequest, err_val);
+
+	ep0->dwc_ep.is_in = 1;
+	dwc_otg_ep_set_stall(GET_CORE_IF(pcd), &ep0->dwc_ep);
+	pcd->ep0.stopped = 1;
+	pcd->ep0state = EP0_IDLE;
+	ep0_out_start(GET_CORE_IF(pcd), pcd);
+}
+
+/**
+ * This functions delegates the setup command to the gadget driver.
+ */
+static inline void do_gadget_setup(dwc_otg_pcd_t * pcd,
+				   usb_device_request_t * ctrl)
+{
+	int ret = 0;
+	DWC_SPINUNLOCK(pcd->lock);
+	ret = pcd->fops->setup(pcd, (uint8_t *) ctrl);
+	DWC_SPINLOCK(pcd->lock);
+	if (ret < 0) {
+		ep0_do_stall(pcd, ret);
+	}
+
+	/** @todo This is a g_file_storage gadget driver specific
+	 * workaround: a DELAYED_STATUS result from the fsg_setup
+	 * routine will result in the gadget queueing a EP0 IN status
+	 * phase for a two-stage control transfer. Exactly the same as
+	 * a SET_CONFIGURATION/SET_INTERFACE except that this is a class
+	 * specific request.  Need a generic way to know when the gadget
+	 * driver will queue the status phase. Can we assume when we
+	 * call the gadget driver setup() function that it will always
+	 * queue and require the following flag? Need to look into
+	 * this.
+	 */
+
+	if (ret == 256 + 999) {
+		pcd->request_config = 1;
+	}
+}
+
+#ifdef DWC_UTE_CFI
+/**
+ * This functions delegates the CFI setup commands to the gadget driver.
+ * This function will return a negative value to indicate a failure.
+ */
+static inline int cfi_gadget_setup(dwc_otg_pcd_t * pcd,
+				   struct cfi_usb_ctrlrequest *ctrl_req)
+{
+	int ret = 0;
+
+	if (pcd->fops && pcd->fops->cfi_setup) {
+		DWC_SPINUNLOCK(pcd->lock);
+		ret = pcd->fops->cfi_setup(pcd, ctrl_req);
+		DWC_SPINLOCK(pcd->lock);
+		if (ret < 0) {
+			ep0_do_stall(pcd, ret);
+			return ret;
+		}
+	}
+
+	return ret;
+}
+#endif
+
+/**
+ * This function starts the Zero-Length Packet for the IN status phase
+ * of a 2 stage control transfer.
+ */
+static inline void do_setup_in_status_phase(dwc_otg_pcd_t * pcd)
+{
+	dwc_otg_pcd_ep_t *ep0 = &pcd->ep0;
+	if (pcd->ep0state == EP0_STALL) {
+		return;
+	}
+
+	pcd->ep0state = EP0_IN_STATUS_PHASE;
+
+	/* Prepare for more SETUP Packets */
+	DWC_DEBUGPL(DBG_PCD, "EP0 IN ZLP\n");
+	ep0->dwc_ep.xfer_len = 0;
+	ep0->dwc_ep.xfer_count = 0;
+	ep0->dwc_ep.is_in = 1;
+	ep0->dwc_ep.dma_addr = pcd->setup_pkt_dma_handle;
+	dwc_otg_ep0_start_transfer(GET_CORE_IF(pcd), &ep0->dwc_ep);
+
+	/* Prepare for more SETUP Packets */
+	//ep0_out_start(GET_CORE_IF(pcd), pcd);
+}
+
+/**
+ * This function starts the Zero-Length Packet for the OUT status phase
+ * of a 2 stage control transfer.
+ */
+static inline void do_setup_out_status_phase(dwc_otg_pcd_t * pcd)
+{
+	dwc_otg_pcd_ep_t *ep0 = &pcd->ep0;
+	if (pcd->ep0state == EP0_STALL) {
+		DWC_DEBUGPL(DBG_PCD, "EP0 STALLED\n");
+		return;
+	}
+	pcd->ep0state = EP0_OUT_STATUS_PHASE;
+
+	DWC_DEBUGPL(DBG_PCD, "EP0 OUT ZLP\n");
+	ep0->dwc_ep.xfer_len = 0;
+	ep0->dwc_ep.xfer_count = 0;
+	ep0->dwc_ep.is_in = 0;
+	ep0->dwc_ep.dma_addr = pcd->setup_pkt_dma_handle;
+	dwc_otg_ep0_start_transfer(GET_CORE_IF(pcd), &ep0->dwc_ep);
+
+	/* Prepare for more SETUP Packets */
+	if (GET_CORE_IF(pcd)->dma_enable == 0) {
+		ep0_out_start(GET_CORE_IF(pcd), pcd);
+	}
+}
+
+/**
+ * Clear the EP halt (STALL) and if pending requests start the
+ * transfer.
+ */
+static inline void pcd_clear_halt(dwc_otg_pcd_t * pcd, dwc_otg_pcd_ep_t * ep)
+{
+	if (ep->dwc_ep.stall_clear_flag == 0)
+		dwc_otg_ep_clear_stall(GET_CORE_IF(pcd), &ep->dwc_ep);
+
+	/* Reactive the EP */
+	dwc_otg_ep_activate(GET_CORE_IF(pcd), &ep->dwc_ep);
+	if (ep->stopped) {
+		ep->stopped = 0;
+		/* If there is a request in the EP queue start it */
+
+		/** @todo FIXME: this causes an EP mismatch in DMA mode.
+		 * epmismatch not yet implemented. */
+
+		/*
+		 * Above fixme is solved by implmenting a tasklet to call the
+		 * start_next_request(), outside of interrupt context at some
+		 * time after the current time, after a clear-halt setup packet.
+		 * Still need to implement ep mismatch in the future if a gadget
+		 * ever uses more than one endpoint at once
+		 */
+		ep->queue_sof = 1;
+		DWC_TASK_SCHEDULE(pcd->start_xfer_tasklet);
+	}
+	/* Start Control Status Phase */
+	do_setup_in_status_phase(pcd);
+}
+
+/**
+ * This function is called when the SET_FEATURE TEST_MODE Setup packet
+ * is sent from the host.  The Device Control register is written with
+ * the Test Mode bits set to the specified Test Mode.  This is done as
+ * a tasklet so that the "Status" phase of the control transfer
+ * completes before transmitting the TEST packets.
+ *
+ * @todo This has not been tested since the tasklet struct was put
+ * into the PCD struct!
+ *
+ */
+void do_test_mode(void *data)
+{
+	dctl_data_t dctl;
+	dwc_otg_pcd_t *pcd = (dwc_otg_pcd_t *) data;
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+	int test_mode = pcd->test_mode;
+
+//        DWC_WARN("%s() has not been tested since being rewritten!\n", __func__);
+
+	dctl.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dctl);
+	switch (test_mode) {
+	case 1:		// TEST_J
+		dctl.b.tstctl = 1;
+		break;
+
+	case 2:		// TEST_K
+		dctl.b.tstctl = 2;
+		break;
+
+	case 3:		// TEST_SE0_NAK
+		dctl.b.tstctl = 3;
+		break;
+
+	case 4:		// TEST_PACKET
+		dctl.b.tstctl = 4;
+		break;
+
+	case 5:		// TEST_FORCE_ENABLE
+		dctl.b.tstctl = 5;
+		break;
+	}
+	DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dctl, dctl.d32);
+}
+
+/**
+ * This function process the GET_STATUS Setup Commands.
+ */
+static inline void do_get_status(dwc_otg_pcd_t * pcd)
+{
+	usb_device_request_t ctrl = pcd->setup_pkt->req;
+	dwc_otg_pcd_ep_t *ep;
+	dwc_otg_pcd_ep_t *ep0 = &pcd->ep0;
+	uint16_t *status = pcd->status_buf;
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+
+#ifdef DEBUG_EP0
+	DWC_DEBUGPL(DBG_PCD,
+		    "GET_STATUS %02x.%02x v%04x i%04x l%04x\n",
+		    ctrl.bmRequestType, ctrl.bRequest,
+		    UGETW(ctrl.wValue), UGETW(ctrl.wIndex),
+		    UGETW(ctrl.wLength));
+#endif
+
+	switch (UT_GET_RECIPIENT(ctrl.bmRequestType)) {
+	case UT_DEVICE:
+		if(UGETW(ctrl.wIndex) == 0xF000) { /* OTG Status selector */
+			DWC_PRINTF("wIndex - %d\n", UGETW(ctrl.wIndex));
+			DWC_PRINTF("OTG VERSION - %d\n", core_if->otg_ver);
+			DWC_PRINTF("OTG CAP - %d, %d\n", core_if->core_params->otg_cap, DWC_OTG_CAP_PARAM_HNP_SRP_CAPABLE);
+			if(core_if->otg_ver == 1 && 
+			core_if->core_params->otg_cap == DWC_OTG_CAP_PARAM_HNP_SRP_CAPABLE) {
+				uint8_t *otgsts = (uint8_t*)pcd->status_buf;
+				*otgsts = (core_if->otg_sts & 0x1);
+				pcd->ep0_pending = 1;
+				ep0->dwc_ep.start_xfer_buff = (uint8_t *) otgsts;
+				ep0->dwc_ep.xfer_buff = (uint8_t *) otgsts;
+				ep0->dwc_ep.dma_addr = pcd->status_buf_dma_handle;
+				ep0->dwc_ep.xfer_len = 1;
+				ep0->dwc_ep.xfer_count = 0;
+				ep0->dwc_ep.total_len = ep0->dwc_ep.xfer_len;
+				dwc_otg_ep0_start_transfer(GET_CORE_IF(pcd), &ep0->dwc_ep);
+				return;
+			} else {
+				ep0_do_stall(pcd, -DWC_E_NOT_SUPPORTED);
+				return;
+			}
+			break;
+		} else {
+			*status = 0x1;	/* Self powered */
+			*status |= pcd->remote_wakeup_enable << 1;
+			break;
+		}
+	case UT_INTERFACE:
+		*status = 0;
+		break;
+
+	case UT_ENDPOINT:
+		ep = get_ep_by_addr(pcd, UGETW(ctrl.wIndex));
+		if (ep == 0 || UGETW(ctrl.wLength) > 2) {
+			ep0_do_stall(pcd, -DWC_E_NOT_SUPPORTED);
+			return;
+		}
+		/** @todo check for EP stall */
+		*status = ep->stopped;
+		break;
+	}
+	pcd->ep0_pending = 1;
+	ep0->dwc_ep.start_xfer_buff = (uint8_t *) status;
+	ep0->dwc_ep.xfer_buff = (uint8_t *) status;
+	ep0->dwc_ep.dma_addr = pcd->status_buf_dma_handle;
+	ep0->dwc_ep.xfer_len = 2;
+	ep0->dwc_ep.xfer_count = 0;
+	ep0->dwc_ep.total_len = ep0->dwc_ep.xfer_len;
+	dwc_otg_ep0_start_transfer(GET_CORE_IF(pcd), &ep0->dwc_ep);
+}
+
+/**
+ * This function process the SET_FEATURE Setup Commands.
+ */
+static inline void do_set_feature(dwc_otg_pcd_t * pcd)
+{
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+	dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs;
+	usb_device_request_t ctrl = pcd->setup_pkt->req;
+	dwc_otg_pcd_ep_t *ep = 0;
+	int32_t otg_cap_param = core_if->core_params->otg_cap;
+	gotgctl_data_t gotgctl = {.d32 = 0 };
+
+	DWC_DEBUGPL(DBG_PCD, "SET_FEATURE:%02x.%02x v%04x i%04x l%04x\n",
+		    ctrl.bmRequestType, ctrl.bRequest,
+		    UGETW(ctrl.wValue), UGETW(ctrl.wIndex),
+		    UGETW(ctrl.wLength));
+	DWC_DEBUGPL(DBG_PCD, "otg_cap=%d\n", otg_cap_param);
+
+	switch (UT_GET_RECIPIENT(ctrl.bmRequestType)) {
+	case UT_DEVICE:
+		switch (UGETW(ctrl.wValue)) {
+		case UF_DEVICE_REMOTE_WAKEUP:
+			pcd->remote_wakeup_enable = 1;
+			break;
+
+		case UF_TEST_MODE:
+			/* Setup the Test Mode tasklet to do the Test
+			 * Packet generation after the SETUP Status
+			 * phase has completed. */
+
+			/** @todo This has not been tested since the
+			 * tasklet struct was put into the PCD
+			 * struct! */
+			pcd->test_mode = UGETW(ctrl.wIndex) >> 8;
+			DWC_TASK_SCHEDULE(pcd->test_mode_tasklet);
+			break;
+
+		case UF_DEVICE_B_HNP_ENABLE:
+			DWC_DEBUGPL(DBG_PCDV,
+				    "SET_FEATURE: USB_DEVICE_B_HNP_ENABLE\n");
+
+			/* dev may initiate HNP */
+			if (otg_cap_param == DWC_OTG_CAP_PARAM_HNP_SRP_CAPABLE) {
+				pcd->b_hnp_enable = 1;
+				dwc_otg_pcd_update_otg(pcd, 0);
+				DWC_DEBUGPL(DBG_PCD, "Request B HNP\n");
+				/**@todo Is the gotgctl.devhnpen cleared
+				 * by a USB Reset? */
+				gotgctl.b.devhnpen = 1;
+				gotgctl.b.hnpreq = 1;
+				DWC_WRITE_REG32(&global_regs->gotgctl,
+						gotgctl.d32);
+			} else {
+				ep0_do_stall(pcd, -DWC_E_NOT_SUPPORTED);
+				return;
+			}
+			break;
+
+		case UF_DEVICE_A_HNP_SUPPORT:
+			/* RH port supports HNP */
+			DWC_DEBUGPL(DBG_PCDV,
+				    "SET_FEATURE: USB_DEVICE_A_HNP_SUPPORT\n");
+			if (otg_cap_param == DWC_OTG_CAP_PARAM_HNP_SRP_CAPABLE) {
+				pcd->a_hnp_support = 1;
+				dwc_otg_pcd_update_otg(pcd, 0);
+			} else {
+				ep0_do_stall(pcd, -DWC_E_NOT_SUPPORTED);
+				return;
+			}
+			break;
+
+		case UF_DEVICE_A_ALT_HNP_SUPPORT:
+			/* other RH port does */
+			DWC_DEBUGPL(DBG_PCDV,
+				    "SET_FEATURE: USB_DEVICE_A_ALT_HNP_SUPPORT\n");
+			if (otg_cap_param == DWC_OTG_CAP_PARAM_HNP_SRP_CAPABLE) {
+				pcd->a_alt_hnp_support = 1;
+				dwc_otg_pcd_update_otg(pcd, 0);
+			} else {
+				ep0_do_stall(pcd, -DWC_E_NOT_SUPPORTED);
+				return;
+			}
+			break;
+
+		default:
+			ep0_do_stall(pcd, -DWC_E_NOT_SUPPORTED);
+			return;
+
+		}
+		do_setup_in_status_phase(pcd);
+		break;
+
+	case UT_INTERFACE:
+		do_gadget_setup(pcd, &ctrl);
+		break;
+
+	case UT_ENDPOINT:
+		if (UGETW(ctrl.wValue) == UF_ENDPOINT_HALT) {
+			ep = get_ep_by_addr(pcd, UGETW(ctrl.wIndex));
+			if (ep == 0) {
+				ep0_do_stall(pcd, -DWC_E_NOT_SUPPORTED);
+				return;
+			}
+			ep->stopped = 1;
+			dwc_otg_ep_set_stall(core_if, &ep->dwc_ep);
+		}
+		do_setup_in_status_phase(pcd);
+		break;
+	}
+}
+
+/**
+ * This function process the CLEAR_FEATURE Setup Commands.
+ */
+static inline void do_clear_feature(dwc_otg_pcd_t * pcd)
+{
+	usb_device_request_t ctrl = pcd->setup_pkt->req;
+	dwc_otg_pcd_ep_t *ep = 0;
+
+	DWC_DEBUGPL(DBG_PCD,
+		    "CLEAR_FEATURE:%02x.%02x v%04x i%04x l%04x\n",
+		    ctrl.bmRequestType, ctrl.bRequest,
+		    UGETW(ctrl.wValue), UGETW(ctrl.wIndex),
+		    UGETW(ctrl.wLength));
+
+	switch (UT_GET_RECIPIENT(ctrl.bmRequestType)) {
+	case UT_DEVICE:
+		switch (UGETW(ctrl.wValue)) {
+		case UF_DEVICE_REMOTE_WAKEUP:
+			pcd->remote_wakeup_enable = 0;
+			break;
+
+		case UF_TEST_MODE:
+			/** @todo Add CLEAR_FEATURE for TEST modes. */
+			break;
+
+		default:
+			ep0_do_stall(pcd, -DWC_E_NOT_SUPPORTED);
+			return;
+		}
+		do_setup_in_status_phase(pcd);
+		break;
+
+	case UT_ENDPOINT:
+		ep = get_ep_by_addr(pcd, UGETW(ctrl.wIndex));
+		if (ep == 0) {
+			ep0_do_stall(pcd, -DWC_E_NOT_SUPPORTED);
+			return;
+		}
+
+		pcd_clear_halt(pcd, ep);
+
+		break;
+	}
+}
+
+/**
+ * This function process the SET_ADDRESS Setup Commands.
+ */
+static inline void do_set_address(dwc_otg_pcd_t * pcd)
+{
+	dwc_otg_dev_if_t *dev_if = GET_CORE_IF(pcd)->dev_if;
+	usb_device_request_t ctrl = pcd->setup_pkt->req;
+
+	if (ctrl.bmRequestType == UT_DEVICE) {
+		dcfg_data_t dcfg = {.d32 = 0 };
+
+#ifdef DEBUG_EP0
+//                      DWC_DEBUGPL(DBG_PCDV, "SET_ADDRESS:%d\n", ctrl.wValue);
+#endif
+		dcfg.b.devaddr = UGETW(ctrl.wValue);
+		DWC_MODIFY_REG32(&dev_if->dev_global_regs->dcfg, 0, dcfg.d32);
+		do_setup_in_status_phase(pcd);
+	}
+}
+
+/**
+ *	This function processes SETUP commands. In Linux, the USB Command
+ *	processing is done in two places - the first being the PCD and the
+ *	second in the Gadget Driver (for example, the File-Backed Storage
+ *	Gadget Driver).
+ *
+ * <table>
+ * <tr><td>Command	</td><td>Driver </td><td>Description</td></tr>
+ *
+ * <tr><td>GET_STATUS </td><td>PCD </td><td>Command is processed as
+ * defined in chapter 9 of the USB 2.0 Specification chapter 9
+ * </td></tr>
+ *
+ * <tr><td>CLEAR_FEATURE </td><td>PCD </td><td>The Device and Endpoint
+ * requests are the ENDPOINT_HALT feature is procesed, all others the
+ * interface requests are ignored.</td></tr>
+ *
+ * <tr><td>SET_FEATURE </td><td>PCD </td><td>The Device and Endpoint
+ * requests are processed by the PCD.  Interface requests are passed
+ * to the Gadget Driver.</td></tr>
+ *
+ * <tr><td>SET_ADDRESS </td><td>PCD </td><td>Program the DCFG reg,
+ * with device address received </td></tr>
+ *
+ * <tr><td>GET_DESCRIPTOR </td><td>Gadget Driver </td><td>Return the
+ * requested descriptor</td></tr>
+ *
+ * <tr><td>SET_DESCRIPTOR </td><td>Gadget Driver </td><td>Optional -
+ * not implemented by any of the existing Gadget Drivers.</td></tr>
+ *
+ * <tr><td>SET_CONFIGURATION </td><td>Gadget Driver </td><td>Disable
+ * all EPs and enable EPs for new configuration.</td></tr>
+ *
+ * <tr><td>GET_CONFIGURATION </td><td>Gadget Driver </td><td>Return
+ * the current configuration</td></tr>
+ *
+ * <tr><td>SET_INTERFACE </td><td>Gadget Driver </td><td>Disable all
+ * EPs and enable EPs for new configuration.</td></tr>
+ *
+ * <tr><td>GET_INTERFACE </td><td>Gadget Driver </td><td>Return the
+ * current interface.</td></tr>
+ *
+ * <tr><td>SYNC_FRAME </td><td>PCD </td><td>Display debug
+ * message.</td></tr>
+ * </table>
+ *
+ * When the SETUP Phase Done interrupt occurs, the PCD SETUP commands are
+ * processed by pcd_setup. Calling the Function Driver's setup function from
+ * pcd_setup processes the gadget SETUP commands.
+ */
+static inline void pcd_setup(dwc_otg_pcd_t * pcd)
+{
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+	dwc_otg_dev_if_t *dev_if = core_if->dev_if;
+	usb_device_request_t ctrl = pcd->setup_pkt->req;
+	dwc_otg_pcd_ep_t *ep0 = &pcd->ep0;
+
+	deptsiz0_data_t doeptsize0 = {.d32 = 0 };
+
+#ifdef DWC_UTE_CFI
+	int retval = 0;
+	struct cfi_usb_ctrlrequest cfi_req;
+#endif
+
+#ifdef DEBUG_EP0
+	DWC_DEBUGPL(DBG_PCD, "SETUP %02x.%02x v%04x i%04x l%04x\n",
+		    ctrl.bmRequestType, ctrl.bRequest,
+		    UGETW(ctrl.wValue), UGETW(ctrl.wIndex),
+		    UGETW(ctrl.wLength));
+#endif
+
+	doeptsize0.d32 = DWC_READ_REG32(&dev_if->out_ep_regs[0]->doeptsiz);
+
+	/** @todo handle > 1 setup packet , assert error for now */
+
+	if (core_if->dma_enable && core_if->dma_desc_enable == 0
+	    && (doeptsize0.b.supcnt < 2)) {
+		DWC_ERROR
+		    ("\n\n-----------	 CANNOT handle > 1 setup packet in DMA mode\n\n");
+	}
+
+	/* Clean up the request queue */
+	dwc_otg_request_nuke(ep0);
+	ep0->stopped = 0;
+
+	if (ctrl.bmRequestType & UE_DIR_IN) {
+		ep0->dwc_ep.is_in = 1;
+		pcd->ep0state = EP0_IN_DATA_PHASE;
+	} else {
+		ep0->dwc_ep.is_in = 0;
+		pcd->ep0state = EP0_OUT_DATA_PHASE;
+	}
+
+	if (UGETW(ctrl.wLength) == 0) {
+		ep0->dwc_ep.is_in = 1;
+		pcd->ep0state = EP0_IN_STATUS_PHASE;
+	}
+
+	if (UT_GET_TYPE(ctrl.bmRequestType) != UT_STANDARD) {
+
+#ifdef DWC_UTE_CFI
+		DWC_MEMCPY(&cfi_req, &ctrl, sizeof(usb_device_request_t));
+
+		printk(KERN_ALERT "CFI: req_type=0x%02x; req=0x%02x\n", ctrl.bRequestType, ctrl.bRequest);
+		if (UT_GET_TYPE(cfi_req.bRequestType) == UT_VENDOR) {
+			if (cfi_req.bRequest > 0xB0 && cfi_req.bRequest < 0xBF) {
+				retval = cfi_setup(pcd, &cfi_req);
+				if (retval < 0) {
+					ep0_do_stall(pcd, retval);
+					pcd->ep0_pending = 0;
+					return;
+				}
+
+				/* if need gadget setup then call it and check the retval */
+				if (pcd->cfi->need_gadget_att) {
+					retval =
+					    cfi_gadget_setup(pcd,
+							     &pcd->
+							     cfi->ctrl_req);
+					if (retval < 0) {
+						pcd->ep0_pending = 0;
+						return;
+					}
+				}
+
+				if (pcd->cfi->need_status_in_complete) {
+					do_setup_in_status_phase(pcd);
+				}
+				return;
+			}
+		}
+#endif
+
+		/* handle non-standard (class/vendor) requests in the gadget driver */
+		do_gadget_setup(pcd, &ctrl);
+		return;
+	}
+
+	/** @todo NGS: Handle bad setup packet? */
+
+///////////////////////////////////////////
+//// --- Standard Request handling --- ////
+
+	switch (ctrl.bRequest) {
+	case UR_GET_STATUS:
+		do_get_status(pcd);
+		break;
+
+	case UR_CLEAR_FEATURE:
+		do_clear_feature(pcd);
+		break;
+
+	case UR_SET_FEATURE:
+		do_set_feature(pcd);
+		break;
+
+	case UR_SET_ADDRESS:
+		do_set_address(pcd);
+		break;
+
+	case UR_SET_INTERFACE:
+	case UR_SET_CONFIG:
+//              _pcd->request_config = 1;       /* Configuration changed */
+		do_gadget_setup(pcd, &ctrl);
+		break;
+
+	case UR_SYNCH_FRAME:
+		do_gadget_setup(pcd, &ctrl);
+		break;
+
+	default:
+		/* Call the Gadget Driver's setup functions */
+		do_gadget_setup(pcd, &ctrl);
+		break;
+	}
+}
+
+/**
+ * This function completes the ep0 control transfer.
+ */
+static int32_t ep0_complete_request(dwc_otg_pcd_ep_t * ep)
+{
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(ep->pcd);
+	dwc_otg_dev_if_t *dev_if = core_if->dev_if;
+	dwc_otg_dev_in_ep_regs_t *in_ep_regs =
+	    dev_if->in_ep_regs[ep->dwc_ep.num];
+#ifdef DEBUG_EP0
+	dwc_otg_dev_out_ep_regs_t *out_ep_regs =
+	    dev_if->out_ep_regs[ep->dwc_ep.num];
+#endif
+	deptsiz0_data_t deptsiz;
+	dev_dma_desc_sts_t desc_sts;
+	dwc_otg_pcd_request_t *req;
+	int is_last = 0;
+	dwc_otg_pcd_t *pcd = ep->pcd;
+
+#ifdef DWC_UTE_CFI
+	struct cfi_usb_ctrlrequest *ctrlreq;
+	int retval = -DWC_E_NOT_SUPPORTED;
+#endif
+
+	if (pcd->ep0_pending && DWC_CIRCLEQ_EMPTY(&ep->queue)) {
+		if (ep->dwc_ep.is_in) {
+#ifdef DEBUG_EP0
+			DWC_DEBUGPL(DBG_PCDV, "Do setup OUT status phase\n");
+#endif
+			do_setup_out_status_phase(pcd);
+		} else {
+#ifdef DEBUG_EP0
+			DWC_DEBUGPL(DBG_PCDV, "Do setup IN status phase\n");
+#endif
+
+#ifdef DWC_UTE_CFI
+			ctrlreq = &pcd->cfi->ctrl_req;
+
+			if (UT_GET_TYPE(ctrlreq->bRequestType) == UT_VENDOR) {
+				if (ctrlreq->bRequest > 0xB0
+				    && ctrlreq->bRequest < 0xBF) {
+
+					/* Return if the PCD failed to handle the request */
+					if ((retval =
+					     pcd->cfi->ops.
+					     ctrl_write_complete(pcd->cfi,
+								 pcd)) < 0) {
+						CFI_INFO
+						    ("ERROR setting a new value in the PCD(%d)\n",
+						     retval);
+						ep0_do_stall(pcd, retval);
+						pcd->ep0_pending = 0;
+						return 0;
+					}
+
+					/* If the gadget needs to be notified on the request */
+					if (pcd->cfi->need_gadget_att == 1) {
+						//retval = do_gadget_setup(pcd, &pcd->cfi->ctrl_req);
+						retval =
+						    cfi_gadget_setup(pcd,
+								     &pcd->cfi->
+								     ctrl_req);
+
+						/* Return from the function if the gadget failed to process
+						 * the request properly - this should never happen !!!
+						 */
+						if (retval < 0) {
+							CFI_INFO
+							    ("ERROR setting a new value in the gadget(%d)\n",
+							     retval);
+							pcd->ep0_pending = 0;
+							return 0;
+						}
+					}
+
+					CFI_INFO("%s: RETVAL=%d\n", __func__,
+						 retval);
+					/* If we hit here then the PCD and the gadget has properly
+					 * handled the request - so send the ZLP IN to the host.
+					 */
+					/* @todo: MAS - decide whether we need to start the setup
+					 * stage based on the need_setup value of the cfi object
+					 */
+					do_setup_in_status_phase(pcd);
+					pcd->ep0_pending = 0;
+					return 1;
+				}
+			}
+#endif
+
+			do_setup_in_status_phase(pcd);
+		}
+		pcd->ep0_pending = 0;
+		return 1;
+	}
+
+	if (DWC_CIRCLEQ_EMPTY(&ep->queue)) {
+		return 0;
+	}
+	req = DWC_CIRCLEQ_FIRST(&ep->queue);
+
+	if (pcd->ep0state == EP0_OUT_STATUS_PHASE
+	    || pcd->ep0state == EP0_IN_STATUS_PHASE) {
+		is_last = 1;
+	} else if (ep->dwc_ep.is_in) {
+		deptsiz.d32 = DWC_READ_REG32(&in_ep_regs->dieptsiz);
+		if (core_if->dma_desc_enable != 0)
+			desc_sts = dev_if->in_desc_addr->status;
+#ifdef DEBUG_EP0
+		DWC_DEBUGPL(DBG_PCDV, "%d len=%d  xfersize=%d pktcnt=%d\n",
+			    ep->dwc_ep.num, ep->dwc_ep.xfer_len,
+			    deptsiz.b.xfersize, deptsiz.b.pktcnt);
+#endif
+
+		if (((core_if->dma_desc_enable == 0)
+		     && (deptsiz.b.xfersize == 0))
+		    || ((core_if->dma_desc_enable != 0)
+			&& (desc_sts.b.bytes == 0))) {
+			req->actual = ep->dwc_ep.xfer_count;
+			/* Is a Zero Len Packet needed? */
+			if (req->sent_zlp) {
+#ifdef DEBUG_EP0
+				DWC_DEBUGPL(DBG_PCD, "Setup Rx ZLP\n");
+#endif
+				req->sent_zlp = 0;
+			}
+			do_setup_out_status_phase(pcd);
+		}
+	} else {
+		/* ep0-OUT */
+#ifdef DEBUG_EP0
+		deptsiz.d32 = DWC_READ_REG32(&out_ep_regs->doeptsiz);
+		DWC_DEBUGPL(DBG_PCDV, "%d len=%d xsize=%d pktcnt=%d\n",
+			    ep->dwc_ep.num, ep->dwc_ep.xfer_len,
+			    deptsiz.b.xfersize, deptsiz.b.pktcnt);
+#endif
+		req->actual = ep->dwc_ep.xfer_count;
+
+		/* Is a Zero Len Packet needed? */
+		if (req->sent_zlp) {
+#ifdef DEBUG_EP0
+			DWC_DEBUGPL(DBG_PCDV, "Setup Tx ZLP\n");
+#endif
+			req->sent_zlp = 0;
+		}
+		if (core_if->dma_desc_enable == 0)
+			do_setup_in_status_phase(pcd);
+	}
+
+	/* Complete the request */
+	if (is_last) {
+		dwc_otg_request_done(ep, req, 0);
+		ep->dwc_ep.start_xfer_buff = 0;
+		ep->dwc_ep.xfer_buff = 0;
+		ep->dwc_ep.xfer_len = 0;
+		return 1;
+	}
+	return 0;
+}
+
+#ifdef DWC_UTE_CFI
+/**
+ * This function calculates traverses all the CFI DMA descriptors and
+ * and accumulates the bytes that are left to be transfered.
+ *
+ * @return The total bytes left to transfered, or a negative value as failure
+ */
+static inline int cfi_calc_desc_residue(dwc_otg_pcd_ep_t * ep)
+{
+	int32_t ret = 0;
+	int i;
+	struct dwc_otg_dma_desc *ddesc = NULL;
+	struct cfi_ep *cfiep;
+
+	/* See if the pcd_ep has its respective cfi_ep mapped */
+	cfiep = get_cfi_ep_by_pcd_ep(ep->pcd->cfi, ep);
+	if (!cfiep) {
+		CFI_INFO("%s: Failed to find ep\n", __func__);
+		return -1;
+	}
+
+	ddesc = ep->dwc_ep.descs;
+
+	for (i = 0; (i < cfiep->desc_count) && (i < MAX_DMA_DESCS_PER_EP); i++) {
+
+#if defined(PRINT_CFI_DMA_DESCS)
+		print_desc(ddesc, ep->ep.name, i);
+#endif
+		ret += ddesc->status.b.bytes;
+		ddesc++;
+	}
+
+	if (ret)
+		CFI_INFO("!!!!!!!!!! WARNING (%s) - residue=%d\n", __func__,
+			 ret);
+
+	return ret;
+}
+#endif
+
+/**
+ * This function completes the request for the EP. If there are
+ * additional requests for the EP in the queue they will be started.
+ */
+static void complete_ep(dwc_otg_pcd_ep_t * ep)
+{
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(ep->pcd);
+	dwc_otg_dev_if_t *dev_if = core_if->dev_if;
+	dwc_otg_dev_in_ep_regs_t *in_ep_regs =
+	    dev_if->in_ep_regs[ep->dwc_ep.num];
+	deptsiz_data_t deptsiz;
+	dev_dma_desc_sts_t desc_sts;
+	dwc_otg_pcd_request_t *req = 0;
+	dwc_otg_dev_dma_desc_t *dma_desc;
+	uint32_t byte_count = 0;
+	int is_last = 0;
+	int i;
+
+	DWC_DEBUGPL(DBG_PCDV, "%s() %d-%s\n", __func__, ep->dwc_ep.num,
+		    (ep->dwc_ep.is_in ? "IN" : "OUT"));
+
+	/* Get any pending requests */
+	if (!DWC_CIRCLEQ_EMPTY(&ep->queue)) {
+		req = DWC_CIRCLEQ_FIRST(&ep->queue);
+		if (!req) {
+			DWC_PRINTF("complete_ep 0x%p, req = NULL!\n", ep);
+			return;
+		}
+	} else {
+		DWC_PRINTF("complete_ep 0x%p, ep->queue empty!\n", ep);
+		return;
+	}
+
+	DWC_DEBUGPL(DBG_PCD, "Requests %d\n", ep->pcd->request_pending);
+
+	if (ep->dwc_ep.is_in) {
+		deptsiz.d32 = DWC_READ_REG32(&in_ep_regs->dieptsiz);
+
+		if (core_if->dma_enable) {
+			if (core_if->dma_desc_enable == 0) {
+				if (deptsiz.b.xfersize == 0
+				    && deptsiz.b.pktcnt == 0) {
+					byte_count =
+					    ep->dwc_ep.xfer_len -
+					    ep->dwc_ep.xfer_count;
+
+					ep->dwc_ep.xfer_buff += byte_count;
+					ep->dwc_ep.dma_addr += byte_count;
+					ep->dwc_ep.xfer_count += byte_count;
+
+					DWC_DEBUGPL(DBG_PCDV,
+						    "%d-%s len=%d  xfersize=%d pktcnt=%d\n",
+						    ep->dwc_ep.num,
+						    (ep->dwc_ep.
+						     is_in ? "IN" : "OUT"),
+						    ep->dwc_ep.xfer_len,
+						    deptsiz.b.xfersize,
+						    deptsiz.b.pktcnt);
+
+					if (ep->dwc_ep.xfer_len <
+					    ep->dwc_ep.total_len) {
+						dwc_otg_ep_start_transfer
+						    (core_if, &ep->dwc_ep);
+					} else if (ep->dwc_ep.sent_zlp) {
+						/*     
+						 * This fragment of code should initiate 0
+						 * length trasfer in case if it is queued
+						 * a trasfer with size divisible to EPs max
+						 * packet size and with usb_request zero field
+						 * is set, which means that after data is transfered,
+						 * it is also should be transfered
+						 * a 0 length packet at the end. For Slave and
+						 * Buffer DMA modes in this case SW has
+						 * to initiate 2 transfers one with transfer size,
+						 * and the second with 0 size. For Desriptor
+						 * DMA mode SW is able to initiate a transfer,
+						 * which will handle all the packets including
+						 * the last  0 legth.
+						 */
+						ep->dwc_ep.sent_zlp = 0;
+						dwc_otg_ep_start_zl_transfer
+						    (core_if, &ep->dwc_ep);
+					} else {
+						is_last = 1;
+					}
+				} else {
+					DWC_WARN
+					    ("Incomplete transfer (%d - %s [siz=%d pkt=%d])\n",
+					     ep->dwc_ep.num,
+					     (ep->dwc_ep.is_in ? "IN" : "OUT"),
+					     deptsiz.b.xfersize,
+					     deptsiz.b.pktcnt);
+				}
+			} else {
+				dma_desc = ep->dwc_ep.desc_addr;
+				byte_count = 0;
+				ep->dwc_ep.sent_zlp = 0;
+
+#ifdef DWC_UTE_CFI
+				CFI_INFO("%s: BUFFER_MODE=%d\n", __func__,
+					 ep->dwc_ep.buff_mode);
+				if (ep->dwc_ep.buff_mode != BM_STANDARD) {
+					int residue;
+
+					residue = cfi_calc_desc_residue(ep);
+					if (residue < 0)
+						return;
+
+					byte_count = residue;
+				} else {
+#endif
+					for (i = 0; i < ep->dwc_ep.desc_cnt;
+					     ++i) {
+					desc_sts = dma_desc->status;
+					byte_count += desc_sts.b.bytes;
+					dma_desc++;
+				}
+#ifdef DWC_UTE_CFI
+				}
+#endif
+				if (byte_count == 0) {
+					ep->dwc_ep.xfer_count =
+					    ep->dwc_ep.total_len;
+					is_last = 1;
+				} else {
+					DWC_WARN("Incomplete transfer\n");
+				}
+			}
+		} else {
+			if (deptsiz.b.xfersize == 0 && deptsiz.b.pktcnt == 0) {
+				DWC_DEBUGPL(DBG_PCDV,
+					    "%d-%s len=%d  xfersize=%d pktcnt=%d\n",
+					    ep->dwc_ep.num,
+					    ep->dwc_ep.is_in ? "IN" : "OUT",
+					    ep->dwc_ep.xfer_len,
+					    deptsiz.b.xfersize,
+					    deptsiz.b.pktcnt);
+
+				/*      Check if the whole transfer was completed, 
+				 *      if no, setup transfer for next portion of data
+				 */
+				if (ep->dwc_ep.xfer_len < ep->dwc_ep.total_len) {
+					dwc_otg_ep_start_transfer(core_if,
+								  &ep->dwc_ep);
+				} else if (ep->dwc_ep.sent_zlp) {
+					/*     
+					 * This fragment of code should initiate 0
+					 * length trasfer in case if it is queued
+					 * a trasfer with size divisible to EPs max
+					 * packet size and with usb_request zero field
+					 * is set, which means that after data is transfered,
+					 * it is also should be transfered
+					 * a 0 length packet at the end. For Slave and
+					 * Buffer DMA modes in this case SW has
+					 * to initiate 2 transfers one with transfer size,
+					 * and the second with 0 size. For Desriptor
+					 * DMA mode SW is able to initiate a transfer,
+					 * which will handle all the packets including
+					 * the last  0 legth.
+					 */
+					ep->dwc_ep.sent_zlp = 0;
+					dwc_otg_ep_start_zl_transfer(core_if,
+								     &ep->dwc_ep);
+				} else {
+					is_last = 1;
+				}
+			} else {
+				DWC_WARN
+				    ("Incomplete transfer (%d-%s [siz=%d pkt=%d])\n",
+				     ep->dwc_ep.num,
+				     (ep->dwc_ep.is_in ? "IN" : "OUT"),
+				     deptsiz.b.xfersize, deptsiz.b.pktcnt);
+			}
+		}
+	} else {
+		dwc_otg_dev_out_ep_regs_t *out_ep_regs =
+		    dev_if->out_ep_regs[ep->dwc_ep.num];
+		desc_sts.d32 = 0;
+		if (core_if->dma_enable) {
+			if (core_if->dma_desc_enable) {
+				dma_desc = ep->dwc_ep.desc_addr;
+				byte_count = 0;
+				ep->dwc_ep.sent_zlp = 0;
+
+#ifdef DWC_UTE_CFI
+				CFI_INFO("%s: BUFFER_MODE=%d\n", __func__,
+					 ep->dwc_ep.buff_mode);
+				if (ep->dwc_ep.buff_mode != BM_STANDARD) {
+					int residue;
+					residue = cfi_calc_desc_residue(ep);
+					if (residue < 0)
+						return;
+					byte_count = residue;
+				} else {
+#endif
+
+					for (i = 0; i < ep->dwc_ep.desc_cnt;
+					     ++i) {
+						desc_sts = dma_desc->status;
+						byte_count += desc_sts.b.bytes;
+						dma_desc++;
+					}
+
+#ifdef DWC_UTE_CFI
+				}
+#endif
+				ep->dwc_ep.xfer_count = ep->dwc_ep.total_len
+				    - byte_count +
+				    ((4 - (ep->dwc_ep.total_len & 0x3)) & 0x3);
+				is_last = 1;
+			} else {
+				deptsiz.d32 = 0;
+				deptsiz.d32 =
+				    DWC_READ_REG32(&out_ep_regs->doeptsiz);
+
+				byte_count = (ep->dwc_ep.xfer_len -
+					      ep->dwc_ep.xfer_count -
+					      deptsiz.b.xfersize);
+				ep->dwc_ep.xfer_buff += byte_count;
+				ep->dwc_ep.dma_addr += byte_count;
+				ep->dwc_ep.xfer_count += byte_count;
+
+				/*      Check if the whole transfer was completed, 
+				 *      if no, setup transfer for next portion of data
+				 */
+				if (ep->dwc_ep.xfer_len < ep->dwc_ep.total_len) {
+					dwc_otg_ep_start_transfer(core_if,
+								  &ep->dwc_ep);
+				} else if (ep->dwc_ep.sent_zlp) {
+					/*     
+					 * This fragment of code should initiate 0
+					 * length trasfer in case if it is queued
+					 * a trasfer with size divisible to EPs max
+					 * packet size and with usb_request zero field
+					 * is set, which means that after data is transfered,
+					 * it is also should be transfered
+					 * a 0 length packet at the end. For Slave and
+					 * Buffer DMA modes in this case SW has
+					 * to initiate 2 transfers one with transfer size,
+					 * and the second with 0 size. For Desriptor
+					 * DMA mode SW is able to initiate a transfer,
+					 * which will handle all the packets including
+					 * the last  0 legth.
+					 */
+					ep->dwc_ep.sent_zlp = 0;
+					dwc_otg_ep_start_zl_transfer(core_if,
+								     &ep->dwc_ep);
+				} else {
+					is_last = 1;
+				}
+			}
+		} else {
+			/*      Check if the whole transfer was completed, 
+			 *      if no, setup transfer for next portion of data
+			 */
+			if (ep->dwc_ep.xfer_len < ep->dwc_ep.total_len) {
+				dwc_otg_ep_start_transfer(core_if, &ep->dwc_ep);
+			} else if (ep->dwc_ep.sent_zlp) {
+				/*     
+				 * This fragment of code should initiate 0
+				 * length trasfer in case if it is queued
+				 * a trasfer with size divisible to EPs max
+				 * packet size and with usb_request zero field
+				 * is set, which means that after data is transfered,
+				 * it is also should be transfered
+				 * a 0 length packet at the end. For Slave and
+				 * Buffer DMA modes in this case SW has
+				 * to initiate 2 transfers one with transfer size,
+				 * and the second with 0 size. For Desriptor
+				 * DMA mode SW is able to initiate a transfer,
+				 * which will handle all the packets including
+				 * the last  0 legth.
+				 */
+				ep->dwc_ep.sent_zlp = 0;
+				dwc_otg_ep_start_zl_transfer(core_if,
+							     &ep->dwc_ep);
+			} else {
+				is_last = 1;
+			}
+		}
+
+		DWC_DEBUGPL(DBG_PCDV,
+			    "addr %p,	 %d-%s len=%d cnt=%d xsize=%d pktcnt=%d\n",
+			    &out_ep_regs->doeptsiz, ep->dwc_ep.num,
+			    ep->dwc_ep.is_in ? "IN" : "OUT",
+			    ep->dwc_ep.xfer_len, ep->dwc_ep.xfer_count,
+			    deptsiz.b.xfersize, deptsiz.b.pktcnt);
+	}
+
+	/* Complete the request */
+	if (is_last) {
+#ifdef DWC_UTE_CFI
+		if (ep->dwc_ep.buff_mode != BM_STANDARD) {
+			req->actual = ep->dwc_ep.cfi_req_len - byte_count;
+		} else {
+#endif
+			req->actual = ep->dwc_ep.xfer_count;
+#ifdef DWC_UTE_CFI
+		}
+#endif
+
+		dwc_otg_request_done(ep, req, 0);
+
+		ep->dwc_ep.start_xfer_buff = 0;
+		ep->dwc_ep.xfer_buff = 0;
+		ep->dwc_ep.xfer_len = 0;
+
+		/* If there is a request in the queue start it. */
+		start_next_request(ep);
+	}
+}
+
+#ifdef DWC_EN_ISOC
+
+/**
+ * This function BNA interrupt for Isochronous EPs
+ *
+ */
+static void dwc_otg_pcd_handle_iso_bna(dwc_otg_pcd_ep_t * ep)
+{
+	dwc_ep_t *dwc_ep = &ep->dwc_ep;
+	volatile uint32_t *addr;
+	depctl_data_t depctl = {.d32 = 0 };
+	dwc_otg_pcd_t *pcd = ep->pcd;
+	dwc_otg_dev_dma_desc_t *dma_desc;
+	int i;
+
+	dma_desc =
+	    dwc_ep->iso_desc_addr + dwc_ep->desc_cnt * (dwc_ep->proc_buf_num);
+
+	if (dwc_ep->is_in) {
+		dev_dma_desc_sts_t sts = {.d32 = 0 };
+		for (i = 0; i < dwc_ep->desc_cnt; ++i, ++dma_desc) {
+			sts.d32 = dma_desc->status.d32;
+			sts.b_iso_in.bs = BS_HOST_READY;
+			dma_desc->status.d32 = sts.d32;
+		}
+	} else {
+		dev_dma_desc_sts_t sts = {.d32 = 0 };
+		for (i = 0; i < dwc_ep->desc_cnt; ++i, ++dma_desc) {
+			sts.d32 = dma_desc->status.d32;
+			sts.b_iso_out.bs = BS_HOST_READY;
+			dma_desc->status.d32 = sts.d32;
+		}
+	}
+
+	if (dwc_ep->is_in == 0) {
+		addr =
+		    &GET_CORE_IF(pcd)->dev_if->out_ep_regs[dwc_ep->
+							   num]->doepctl;
+	} else {
+		addr =
+		    &GET_CORE_IF(pcd)->dev_if->in_ep_regs[dwc_ep->num]->diepctl;
+	}
+	depctl.b.epena = 1;
+	DWC_MODIFY_REG32(addr, depctl.d32, depctl.d32);
+}
+
+/**
+ * This function sets latest iso packet information(non-PTI mode)
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param ep The EP to start the transfer on.
+ *
+ */
+void set_current_pkt_info(dwc_otg_core_if_t * core_if, dwc_ep_t * ep)
+{
+	deptsiz_data_t deptsiz = {.d32 = 0 };
+	dma_addr_t dma_addr;
+	uint32_t offset;
+
+	if (ep->proc_buf_num)
+		dma_addr = ep->dma_addr1;
+	else
+		dma_addr = ep->dma_addr0;
+
+	if (ep->is_in) {
+		deptsiz.d32 =
+		    DWC_READ_REG32(&core_if->dev_if->
+				   in_ep_regs[ep->num]->dieptsiz);
+		offset = ep->data_per_frame;
+	} else {
+		deptsiz.d32 =
+		    DWC_READ_REG32(&core_if->dev_if->
+				   out_ep_regs[ep->num]->doeptsiz);
+		offset =
+		    ep->data_per_frame +
+		    (0x4 & (0x4 - (ep->data_per_frame & 0x3)));
+	}
+
+	if (!deptsiz.b.xfersize) {
+		ep->pkt_info[ep->cur_pkt].length = ep->data_per_frame;
+		ep->pkt_info[ep->cur_pkt].offset =
+		    ep->cur_pkt_dma_addr - dma_addr;
+		ep->pkt_info[ep->cur_pkt].status = 0;
+	} else {
+		ep->pkt_info[ep->cur_pkt].length = ep->data_per_frame;
+		ep->pkt_info[ep->cur_pkt].offset =
+		    ep->cur_pkt_dma_addr - dma_addr;
+		ep->pkt_info[ep->cur_pkt].status = -DWC_E_NO_DATA;
+	}
+	ep->cur_pkt_addr += offset;
+	ep->cur_pkt_dma_addr += offset;
+	ep->cur_pkt++;
+}
+
+/**
+ * This function sets latest iso packet information(DDMA mode)
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param dwc_ep The EP to start the transfer on.
+ *
+ */
+static void set_ddma_iso_pkts_info(dwc_otg_core_if_t * core_if,
+				   dwc_ep_t * dwc_ep)
+{
+	dwc_otg_dev_dma_desc_t *dma_desc;
+	dev_dma_desc_sts_t sts = {.d32 = 0 };
+	iso_pkt_info_t *iso_packet;
+	uint32_t data_per_desc;
+	uint32_t offset;
+	int i, j;
+
+	iso_packet = dwc_ep->pkt_info;
+
+	/** Reinit closed DMA Descriptors*/
+	/** ISO OUT EP */
+	if (dwc_ep->is_in == 0) {
+		dma_desc =
+		    dwc_ep->iso_desc_addr +
+		    dwc_ep->desc_cnt * dwc_ep->proc_buf_num;
+		offset = 0;
+
+		for (i = 0; i < dwc_ep->desc_cnt - dwc_ep->pkt_per_frm;
+		     i += dwc_ep->pkt_per_frm) {
+			for (j = 0; j < dwc_ep->pkt_per_frm; ++j) {
+				data_per_desc =
+				    ((j + 1) * dwc_ep->maxpacket >
+				     dwc_ep->
+				     data_per_frame) ? dwc_ep->data_per_frame -
+				    j * dwc_ep->maxpacket : dwc_ep->maxpacket;
+				data_per_desc +=
+				    (data_per_desc % 4) ? (4 -
+							   data_per_desc %
+							   4) : 0;
+
+				sts.d32 = dma_desc->status.d32;
+
+				/* Write status in iso_packet_decsriptor  */
+				iso_packet->status =
+				    sts.b_iso_out.rxsts +
+				    (sts.b_iso_out.bs ^ BS_DMA_DONE);
+				if (iso_packet->status) {
+					iso_packet->status = -DWC_E_NO_DATA;
+				}
+
+				/* Received data length */
+				if (!sts.b_iso_out.rxbytes) {
+					iso_packet->length =
+					    data_per_desc -
+					    sts.b_iso_out.rxbytes;
+				} else {
+					iso_packet->length =
+					    data_per_desc -
+					    sts.b_iso_out.rxbytes + (4 -
+								     dwc_ep->data_per_frame
+								     % 4);
+				}
+
+				iso_packet->offset = offset;
+
+				offset += data_per_desc;
+				dma_desc++;
+				iso_packet++;
+			}
+		}
+
+		for (j = 0; j < dwc_ep->pkt_per_frm - 1; ++j) {
+			data_per_desc =
+			    ((j + 1) * dwc_ep->maxpacket >
+			     dwc_ep->data_per_frame) ? dwc_ep->data_per_frame -
+			    j * dwc_ep->maxpacket : dwc_ep->maxpacket;
+			data_per_desc +=
+			    (data_per_desc % 4) ? (4 - data_per_desc % 4) : 0;
+
+			sts.d32 = dma_desc->status.d32;
+
+			/* Write status in iso_packet_decsriptor  */
+			iso_packet->status =
+			    sts.b_iso_out.rxsts +
+			    (sts.b_iso_out.bs ^ BS_DMA_DONE);
+			if (iso_packet->status) {
+				iso_packet->status = -DWC_E_NO_DATA;
+			}
+
+			/* Received data length */
+			iso_packet->length =
+			    dwc_ep->data_per_frame - sts.b_iso_out.rxbytes;
+
+			iso_packet->offset = offset;
+
+			offset += data_per_desc;
+			iso_packet++;
+			dma_desc++;
+		}
+
+		sts.d32 = dma_desc->status.d32;
+
+		/* Write status in iso_packet_decsriptor  */
+		iso_packet->status =
+		    sts.b_iso_out.rxsts + (sts.b_iso_out.bs ^ BS_DMA_DONE);
+		if (iso_packet->status) {
+			iso_packet->status = -DWC_E_NO_DATA;
+		}
+		/* Received data length */
+		if (!sts.b_iso_out.rxbytes) {
+			iso_packet->length =
+			    dwc_ep->data_per_frame - sts.b_iso_out.rxbytes;
+		} else {
+			iso_packet->length =
+			    dwc_ep->data_per_frame - sts.b_iso_out.rxbytes +
+			    (4 - dwc_ep->data_per_frame % 4);
+		}
+
+		iso_packet->offset = offset;
+	} else {
+/** ISO IN EP */
+
+		dma_desc =
+		    dwc_ep->iso_desc_addr +
+		    dwc_ep->desc_cnt * dwc_ep->proc_buf_num;
+
+		for (i = 0; i < dwc_ep->desc_cnt - 1; i++) {
+			sts.d32 = dma_desc->status.d32;
+
+			/* Write status in iso packet descriptor */
+			iso_packet->status =
+			    sts.b_iso_in.txsts +
+			    (sts.b_iso_in.bs ^ BS_DMA_DONE);
+			if (iso_packet->status != 0) {
+				iso_packet->status = -DWC_E_NO_DATA;
+
+			}
+			/* Bytes has been transfered */
+			iso_packet->length =
+			    dwc_ep->data_per_frame - sts.b_iso_in.txbytes;
+
+			dma_desc++;
+			iso_packet++;
+		}
+
+		sts.d32 = dma_desc->status.d32;
+		while (sts.b_iso_in.bs == BS_DMA_BUSY) {
+			sts.d32 = dma_desc->status.d32;
+		}
+
+		/* Write status in iso packet descriptor ??? do be done with ERROR codes */
+		iso_packet->status =
+		    sts.b_iso_in.txsts + (sts.b_iso_in.bs ^ BS_DMA_DONE);
+		if (iso_packet->status != 0) {
+			iso_packet->status = -DWC_E_NO_DATA;
+		}
+
+		/* Bytes has been transfered */
+		iso_packet->length =
+		    dwc_ep->data_per_frame - sts.b_iso_in.txbytes;
+	}
+}
+
+/**
+ * This function reinitialize DMA Descriptors for Isochronous transfer
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param dwc_ep The EP to start the transfer on.
+ *
+ */
+static void reinit_ddma_iso_xfer(dwc_otg_core_if_t * core_if, dwc_ep_t * dwc_ep)
+{
+	int i, j;
+	dwc_otg_dev_dma_desc_t *dma_desc;
+	dma_addr_t dma_ad;
+	volatile uint32_t *addr;
+	dev_dma_desc_sts_t sts = {.d32 = 0 };
+	uint32_t data_per_desc;
+
+	if (dwc_ep->is_in == 0) {
+		addr = &core_if->dev_if->out_ep_regs[dwc_ep->num]->doepctl;
+	} else {
+		addr = &core_if->dev_if->in_ep_regs[dwc_ep->num]->diepctl;
+	}
+
+	if (dwc_ep->proc_buf_num == 0) {
+		/** Buffer 0 descriptors setup */
+		dma_ad = dwc_ep->dma_addr0;
+	} else {
+		/** Buffer 1 descriptors setup */
+		dma_ad = dwc_ep->dma_addr1;
+	}
+
+	/** Reinit closed DMA Descriptors*/
+	/** ISO OUT EP */
+	if (dwc_ep->is_in == 0) {
+		dma_desc =
+		    dwc_ep->iso_desc_addr +
+		    dwc_ep->desc_cnt * dwc_ep->proc_buf_num;
+
+		sts.b_iso_out.bs = BS_HOST_READY;
+		sts.b_iso_out.rxsts = 0;
+		sts.b_iso_out.l = 0;
+		sts.b_iso_out.sp = 0;
+		sts.b_iso_out.ioc = 0;
+		sts.b_iso_out.pid = 0;
+		sts.b_iso_out.framenum = 0;
+
+		for (i = 0; i < dwc_ep->desc_cnt - dwc_ep->pkt_per_frm;
+		     i += dwc_ep->pkt_per_frm) {
+			for (j = 0; j < dwc_ep->pkt_per_frm; ++j) {
+				data_per_desc =
+				    ((j + 1) * dwc_ep->maxpacket >
+				     dwc_ep->
+				     data_per_frame) ? dwc_ep->data_per_frame -
+				    j * dwc_ep->maxpacket : dwc_ep->maxpacket;
+				data_per_desc +=
+				    (data_per_desc % 4) ? (4 -
+							   data_per_desc %
+							   4) : 0;
+				sts.b_iso_out.rxbytes = data_per_desc;
+				dma_desc->buf = dma_ad;
+				dma_desc->status.d32 = sts.d32;
+
+				dma_ad += data_per_desc;
+				dma_desc++;
+			}
+		}
+
+		for (j = 0; j < dwc_ep->pkt_per_frm - 1; ++j) {
+
+			data_per_desc =
+			    ((j + 1) * dwc_ep->maxpacket >
+			     dwc_ep->data_per_frame) ? dwc_ep->data_per_frame -
+			    j * dwc_ep->maxpacket : dwc_ep->maxpacket;
+			data_per_desc +=
+			    (data_per_desc % 4) ? (4 - data_per_desc % 4) : 0;
+			sts.b_iso_out.rxbytes = data_per_desc;
+
+			dma_desc->buf = dma_ad;
+			dma_desc->status.d32 = sts.d32;
+
+			dma_desc++;
+			dma_ad += data_per_desc;
+		}
+
+		sts.b_iso_out.ioc = 1;
+		sts.b_iso_out.l = dwc_ep->proc_buf_num;
+
+		data_per_desc =
+		    ((j + 1) * dwc_ep->maxpacket >
+		     dwc_ep->data_per_frame) ? dwc_ep->data_per_frame -
+		    j * dwc_ep->maxpacket : dwc_ep->maxpacket;
+		data_per_desc +=
+		    (data_per_desc % 4) ? (4 - data_per_desc % 4) : 0;
+		sts.b_iso_out.rxbytes = data_per_desc;
+
+		dma_desc->buf = dma_ad;
+		dma_desc->status.d32 = sts.d32;
+	} else {
+/** ISO IN EP */
+
+		dma_desc =
+		    dwc_ep->iso_desc_addr +
+		    dwc_ep->desc_cnt * dwc_ep->proc_buf_num;
+
+		sts.b_iso_in.bs = BS_HOST_READY;
+		sts.b_iso_in.txsts = 0;
+		sts.b_iso_in.sp = 0;
+		sts.b_iso_in.ioc = 0;
+		sts.b_iso_in.pid = dwc_ep->pkt_per_frm;
+		sts.b_iso_in.framenum = dwc_ep->next_frame;
+		sts.b_iso_in.txbytes = dwc_ep->data_per_frame;
+		sts.b_iso_in.l = 0;
+
+		for (i = 0; i < dwc_ep->desc_cnt - 1; i++) {
+			dma_desc->buf = dma_ad;
+			dma_desc->status.d32 = sts.d32;
+
+			sts.b_iso_in.framenum += dwc_ep->bInterval;
+			dma_ad += dwc_ep->data_per_frame;
+			dma_desc++;
+		}
+
+		sts.b_iso_in.ioc = 1;
+		sts.b_iso_in.l = dwc_ep->proc_buf_num;
+
+		dma_desc->buf = dma_ad;
+		dma_desc->status.d32 = sts.d32;
+
+		dwc_ep->next_frame =
+		    sts.b_iso_in.framenum + dwc_ep->bInterval * 1;
+	}
+	dwc_ep->proc_buf_num = (dwc_ep->proc_buf_num ^ 1) & 0x1;
+}
+
+/**
+ * This function is to handle Iso EP transfer complete interrupt
+ * in case Iso out packet was dropped
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param dwc_ep The EP for wihich transfer complete was asserted
+ *
+ */
+static uint32_t handle_iso_out_pkt_dropped(dwc_otg_core_if_t * core_if,
+					   dwc_ep_t * dwc_ep)
+{
+	uint32_t dma_addr;
+	uint32_t drp_pkt;
+	uint32_t drp_pkt_cnt;
+	deptsiz_data_t deptsiz = {.d32 = 0 };
+	depctl_data_t depctl = {.d32 = 0 };
+	int i;
+
+	deptsiz.d32 =
+	    DWC_READ_REG32(&core_if->dev_if->
+			   out_ep_regs[dwc_ep->num]->doeptsiz);
+
+	drp_pkt = dwc_ep->pkt_cnt - deptsiz.b.pktcnt;
+	drp_pkt_cnt = dwc_ep->pkt_per_frm - (drp_pkt % dwc_ep->pkt_per_frm);
+
+	/* Setting dropped packets status */
+	for (i = 0; i < drp_pkt_cnt; ++i) {
+		dwc_ep->pkt_info[drp_pkt].status = -DWC_E_NO_DATA;
+		drp_pkt++;
+		deptsiz.b.pktcnt--;
+	}
+
+	if (deptsiz.b.pktcnt > 0) {
+		deptsiz.b.xfersize =
+		    dwc_ep->xfer_len - (dwc_ep->pkt_cnt -
+					deptsiz.b.pktcnt) * dwc_ep->maxpacket;
+	} else {
+		deptsiz.b.xfersize = 0;
+		deptsiz.b.pktcnt = 0;
+	}
+
+	DWC_WRITE_REG32(&core_if->dev_if->out_ep_regs[dwc_ep->num]->doeptsiz,
+			deptsiz.d32);
+
+	if (deptsiz.b.pktcnt > 0) {
+		if (dwc_ep->proc_buf_num) {
+			dma_addr =
+			    dwc_ep->dma_addr1 + dwc_ep->xfer_len -
+			    deptsiz.b.xfersize;
+		} else {
+			dma_addr =
+			    dwc_ep->dma_addr0 + dwc_ep->xfer_len -
+			    deptsiz.b.xfersize;;
+		}
+
+		DWC_WRITE_REG32(&core_if->dev_if->
+				out_ep_regs[dwc_ep->num]->doepdma, dma_addr);
+
+		/** Re-enable endpoint, clear nak  */
+		depctl.d32 = 0;
+		depctl.b.epena = 1;
+		depctl.b.cnak = 1;
+
+		DWC_MODIFY_REG32(&core_if->dev_if->
+				 out_ep_regs[dwc_ep->num]->doepctl, depctl.d32,
+				 depctl.d32);
+		return 0;
+	} else {
+		return 1;
+	}
+}
+
+/**
+ * This function sets iso packets information(PTI mode)
+ *
+ * @param core_if Programming view of DWC_otg controller.
+ * @param ep The EP to start the transfer on.
+ *
+ */
+static uint32_t set_iso_pkts_info(dwc_otg_core_if_t * core_if, dwc_ep_t * ep)
+{
+	int i, j;
+	dma_addr_t dma_ad;
+	iso_pkt_info_t *packet_info = ep->pkt_info;
+	uint32_t offset;
+	uint32_t frame_data;
+	deptsiz_data_t deptsiz;
+
+	if (ep->proc_buf_num == 0) {
+		/** Buffer 0 descriptors setup */
+		dma_ad = ep->dma_addr0;
+	} else {
+		/** Buffer 1 descriptors setup */
+		dma_ad = ep->dma_addr1;
+	}
+
+	if (ep->is_in) {
+		deptsiz.d32 =
+		    DWC_READ_REG32(&core_if->dev_if->
+				   in_ep_regs[ep->num]->dieptsiz);
+	} else {
+		deptsiz.d32 =
+		    DWC_READ_REG32(&core_if->dev_if->
+				   out_ep_regs[ep->num]->doeptsiz);
+	}
+
+	if (!deptsiz.b.xfersize) {
+		offset = 0;
+		for (i = 0; i < ep->pkt_cnt; i += ep->pkt_per_frm) {
+			frame_data = ep->data_per_frame;
+			for (j = 0; j < ep->pkt_per_frm; ++j) {
+
+				/* Packet status - is not set as initially
+				 * it is set to 0 and if packet was sent
+				 successfully, status field will remain 0*/
+
+				/* Bytes has been transfered */
+				packet_info->length =
+				    (ep->maxpacket <
+				     frame_data) ? ep->maxpacket : frame_data;
+
+				/* Received packet offset */
+				packet_info->offset = offset;
+				offset += packet_info->length;
+				frame_data -= packet_info->length;
+
+				packet_info++;
+			}
+		}
+		return 1;
+	} else {
+		/* This is a workaround for in case of Transfer Complete with
+		 * PktDrpSts interrupts merging - in this case Transfer complete
+		 * interrupt for Isoc Out Endpoint is asserted without PktDrpSts
+		 * set and with DOEPTSIZ register non zero. Investigations showed,
+		 * that this happens when Out packet is dropped, but because of
+		 * interrupts merging during first interrupt handling PktDrpSts
+		 * bit is cleared and for next merged interrupts it is not reset.
+		 * In this case SW hadles the interrupt as if PktDrpSts bit is set.
+		 */
+		if (ep->is_in) {
+			return 1;
+		} else {
+			return handle_iso_out_pkt_dropped(core_if, ep);
+		}
+	}
+}
+
+/**
+ * This function is to handle Iso EP transfer complete interrupt
+ *
+ * @param pcd The PCD
+ * @param ep The EP for which transfer complete was asserted
+ *
+ */
+static void complete_iso_ep(dwc_otg_pcd_t * pcd, dwc_otg_pcd_ep_t * ep)
+{
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(ep->pcd);
+	dwc_ep_t *dwc_ep = &ep->dwc_ep;
+	uint8_t is_last = 0;
+
+	if (ep->dwc_ep.next_frame == 0xffffffff) {
+		DWC_WARN("Next frame is not set!\n");
+		return;
+	}
+
+	if (core_if->dma_enable) {
+		if (core_if->dma_desc_enable) {
+			set_ddma_iso_pkts_info(core_if, dwc_ep);
+			reinit_ddma_iso_xfer(core_if, dwc_ep);
+			is_last = 1;
+		} else {
+			if (core_if->pti_enh_enable) {
+				if (set_iso_pkts_info(core_if, dwc_ep)) {
+					dwc_ep->proc_buf_num =
+					    (dwc_ep->proc_buf_num ^ 1) & 0x1;
+					dwc_otg_iso_ep_start_buf_transfer
+					    (core_if, dwc_ep);
+					is_last = 1;
+				}
+			} else {
+				set_current_pkt_info(core_if, dwc_ep);
+				if (dwc_ep->cur_pkt >= dwc_ep->pkt_cnt) {
+					is_last = 1;
+					dwc_ep->cur_pkt = 0;
+					dwc_ep->proc_buf_num =
+					    (dwc_ep->proc_buf_num ^ 1) & 0x1;
+					if (dwc_ep->proc_buf_num) {
+						dwc_ep->cur_pkt_addr =
+						    dwc_ep->xfer_buff1;
+						dwc_ep->cur_pkt_dma_addr =
+						    dwc_ep->dma_addr1;
+					} else {
+						dwc_ep->cur_pkt_addr =
+						    dwc_ep->xfer_buff0;
+						dwc_ep->cur_pkt_dma_addr =
+						    dwc_ep->dma_addr0;
+					}
+
+				}
+				dwc_otg_iso_ep_start_frm_transfer(core_if,
+								  dwc_ep);
+			}
+		}
+	} else {
+		set_current_pkt_info(core_if, dwc_ep);
+		if (dwc_ep->cur_pkt >= dwc_ep->pkt_cnt) {
+			is_last = 1;
+			dwc_ep->cur_pkt = 0;
+			dwc_ep->proc_buf_num = (dwc_ep->proc_buf_num ^ 1) & 0x1;
+			if (dwc_ep->proc_buf_num) {
+				dwc_ep->cur_pkt_addr = dwc_ep->xfer_buff1;
+				dwc_ep->cur_pkt_dma_addr = dwc_ep->dma_addr1;
+			} else {
+				dwc_ep->cur_pkt_addr = dwc_ep->xfer_buff0;
+				dwc_ep->cur_pkt_dma_addr = dwc_ep->dma_addr0;
+			}
+
+		}
+		dwc_otg_iso_ep_start_frm_transfer(core_if, dwc_ep);
+	}
+	if (is_last)
+		dwc_otg_iso_buffer_done(pcd, ep, ep->iso_req_handle);
+}
+#endif /* DWC_EN_ISOC */
+
+/**
+ * This function handle BNA interrupt for Non Isochronous EPs
+ *
+ */
+static void dwc_otg_pcd_handle_noniso_bna(dwc_otg_pcd_ep_t * ep)
+{
+	dwc_ep_t *dwc_ep = &ep->dwc_ep;
+	volatile uint32_t *addr;
+	depctl_data_t depctl = {.d32 = 0 };
+	dwc_otg_pcd_t *pcd = ep->pcd;
+	dwc_otg_dev_dma_desc_t *dma_desc;
+	dev_dma_desc_sts_t sts = {.d32 = 0 };
+	int i;
+
+	if (!dwc_ep->desc_cnt)
+		DWC_WARN("Descriptor count = %d\n", dwc_ep->desc_cnt);
+
+	dma_desc = dwc_ep->desc_addr;
+
+	for (i = 0; i < dwc_ep->desc_cnt; ++i, ++dma_desc) {
+		sts.d32 = dma_desc->status.d32;
+		sts.b.bs = BS_HOST_READY;
+		dma_desc->status.d32 = sts.d32;
+	}
+
+	if (dwc_ep->is_in == 0) {
+		addr =
+		    &GET_CORE_IF(pcd)->dev_if->out_ep_regs[dwc_ep->
+							   num]->doepctl;
+	} else {
+		addr =
+		    &GET_CORE_IF(pcd)->dev_if->in_ep_regs[dwc_ep->num]->diepctl;
+	}
+	depctl.b.epena = 1;
+	DWC_MODIFY_REG32(addr, 0, depctl.d32);
+}
+
+/**
+ * This function handles EP0 Control transfers.
+ *
+ * The state of the control tranfers are tracked in
+ * <code>ep0state</code>.
+ */
+static void handle_ep0(dwc_otg_pcd_t * pcd)
+{
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+	dwc_otg_pcd_ep_t *ep0 = &pcd->ep0;
+	dev_dma_desc_sts_t desc_sts;
+	deptsiz0_data_t deptsiz;
+	uint32_t byte_count;
+
+#ifdef DEBUG_EP0
+	DWC_DEBUGPL(DBG_PCDV, "%s()\n", __func__);
+	print_ep0_state(pcd);
+#endif
+
+//      DWC_PRINTF("HANDLE EP0\n");
+
+	switch (pcd->ep0state) {
+	case EP0_DISCONNECT:
+		break;
+
+	case EP0_IDLE:
+		pcd->request_config = 0;
+
+		pcd_setup(pcd);
+		break;
+
+	case EP0_IN_DATA_PHASE:
+#ifdef DEBUG_EP0
+		DWC_DEBUGPL(DBG_PCD, "DATA_IN EP%d-%s: type=%d, mps=%d\n",
+			    ep0->dwc_ep.num, (ep0->dwc_ep.is_in ? "IN" : "OUT"),
+			    ep0->dwc_ep.type, ep0->dwc_ep.maxpacket);
+#endif
+
+		if (core_if->dma_enable != 0) {
+			/*
+			 * For EP0 we can only program 1 packet at a time so we
+			 * need to do the make calculations after each complete.
+			 * Call write_packet to make the calculations, as in
+			 * slave mode, and use those values to determine if we
+			 * can complete.
+			 */
+			if (core_if->dma_desc_enable == 0) {
+				deptsiz.d32 =
+				    DWC_READ_REG32(&core_if->
+						   dev_if->in_ep_regs[0]->
+						   dieptsiz);
+				byte_count =
+				    ep0->dwc_ep.xfer_len - deptsiz.b.xfersize;
+			} else {
+				desc_sts =
+				    core_if->dev_if->in_desc_addr->status;
+				byte_count =
+				    ep0->dwc_ep.xfer_len - desc_sts.b.bytes;
+			}
+			ep0->dwc_ep.xfer_count += byte_count;
+			ep0->dwc_ep.xfer_buff += byte_count;
+			ep0->dwc_ep.dma_addr += byte_count;
+		}
+		if (ep0->dwc_ep.xfer_count < ep0->dwc_ep.total_len) {
+			dwc_otg_ep0_continue_transfer(GET_CORE_IF(pcd),
+						      &ep0->dwc_ep);
+			DWC_DEBUGPL(DBG_PCD, "CONTINUE TRANSFER\n");
+		} else if (ep0->dwc_ep.sent_zlp) {
+			dwc_otg_ep0_continue_transfer(GET_CORE_IF(pcd),
+						      &ep0->dwc_ep);
+			ep0->dwc_ep.sent_zlp = 0;
+			DWC_DEBUGPL(DBG_PCD, "CONTINUE TRANSFER\n");
+		} else {
+			ep0_complete_request(ep0);
+			DWC_DEBUGPL(DBG_PCD, "COMPLETE TRANSFER\n");
+		}
+		break;
+	case EP0_OUT_DATA_PHASE:
+#ifdef DEBUG_EP0
+		DWC_DEBUGPL(DBG_PCD, "DATA_OUT EP%d-%s: type=%d, mps=%d\n",
+			    ep0->dwc_ep.num, (ep0->dwc_ep.is_in ? "IN" : "OUT"),
+			    ep0->dwc_ep.type, ep0->dwc_ep.maxpacket);
+#endif
+		if (core_if->dma_enable != 0) {
+			if (core_if->dma_desc_enable == 0) {
+				deptsiz.d32 =
+				    DWC_READ_REG32(&core_if->
+						   dev_if->out_ep_regs[0]->
+						   doeptsiz);
+				byte_count =
+				    ep0->dwc_ep.maxpacket - deptsiz.b.xfersize;
+			} else {
+				desc_sts =
+				    core_if->dev_if->out_desc_addr->status;
+				byte_count =
+				    ep0->dwc_ep.maxpacket - desc_sts.b.bytes;
+			}
+			ep0->dwc_ep.xfer_count += byte_count;
+			ep0->dwc_ep.xfer_buff += byte_count;
+			ep0->dwc_ep.dma_addr += byte_count;
+		}
+		if (ep0->dwc_ep.xfer_count < ep0->dwc_ep.total_len) {
+			dwc_otg_ep0_continue_transfer(GET_CORE_IF(pcd),
+						      &ep0->dwc_ep);
+			DWC_DEBUGPL(DBG_PCD, "CONTINUE TRANSFER\n");
+		} else if (ep0->dwc_ep.sent_zlp) {
+			dwc_otg_ep0_continue_transfer(GET_CORE_IF(pcd),
+						      &ep0->dwc_ep);
+			ep0->dwc_ep.sent_zlp = 0;
+			DWC_DEBUGPL(DBG_PCD, "CONTINUE TRANSFER\n");
+		} else {
+			ep0_complete_request(ep0);
+			DWC_DEBUGPL(DBG_PCD, "COMPLETE TRANSFER\n");
+		}
+		break;
+
+	case EP0_IN_STATUS_PHASE:
+	case EP0_OUT_STATUS_PHASE:
+		DWC_DEBUGPL(DBG_PCD, "CASE: EP0_STATUS\n");
+		ep0_complete_request(ep0);
+		pcd->ep0state = EP0_IDLE;
+		ep0->stopped = 1;
+		ep0->dwc_ep.is_in = 0;	/* OUT for next SETUP */
+
+		/* Prepare for more SETUP Packets */
+		if (core_if->dma_enable) {
+			ep0_out_start(core_if, pcd);
+		}
+		break;
+
+	case EP0_STALL:
+		DWC_ERROR("EP0 STALLed, should not get here pcd_setup()\n");
+		break;
+	}
+#ifdef DEBUG_EP0
+	print_ep0_state(pcd);
+#endif
+}
+
+/**
+ * Restart transfer
+ */
+static void restart_transfer(dwc_otg_pcd_t * pcd, const uint32_t epnum)
+{
+	dwc_otg_core_if_t *core_if;
+	dwc_otg_dev_if_t *dev_if;
+	deptsiz_data_t dieptsiz = {.d32 = 0 };
+	dwc_otg_pcd_ep_t *ep;
+
+	ep = get_in_ep(pcd, epnum);
+
+#ifdef DWC_EN_ISOC
+	if (ep->dwc_ep.type == DWC_OTG_EP_TYPE_ISOC) {
+		return;
+	}
+#endif /* DWC_EN_ISOC  */
+
+	core_if = GET_CORE_IF(pcd);
+	dev_if = core_if->dev_if;
+
+	dieptsiz.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[epnum]->dieptsiz);
+
+	DWC_DEBUGPL(DBG_PCD, "xfer_buff=%p xfer_count=%0x xfer_len=%0x"
+		    " stopped=%d\n", ep->dwc_ep.xfer_buff,
+		    ep->dwc_ep.xfer_count, ep->dwc_ep.xfer_len, ep->stopped);
+	/*
+	 * If xfersize is 0 and pktcnt in not 0, resend the last packet.
+	 */
+	if (dieptsiz.b.pktcnt && dieptsiz.b.xfersize == 0 &&
+	    ep->dwc_ep.start_xfer_buff != 0) {
+		if (ep->dwc_ep.total_len <= ep->dwc_ep.maxpacket) {
+			ep->dwc_ep.xfer_count = 0;
+			ep->dwc_ep.xfer_buff = ep->dwc_ep.start_xfer_buff;
+			ep->dwc_ep.xfer_len = ep->dwc_ep.xfer_count;
+		} else {
+			ep->dwc_ep.xfer_count -= ep->dwc_ep.maxpacket;
+			/* convert packet size to dwords. */
+			ep->dwc_ep.xfer_buff -= ep->dwc_ep.maxpacket;
+			ep->dwc_ep.xfer_len = ep->dwc_ep.xfer_count;
+		}
+		ep->stopped = 0;
+		DWC_DEBUGPL(DBG_PCD, "xfer_buff=%p xfer_count=%0x "
+			    "xfer_len=%0x stopped=%d\n",
+			    ep->dwc_ep.xfer_buff,
+			    ep->dwc_ep.xfer_count, ep->dwc_ep.xfer_len,
+			    ep->stopped);
+		if (epnum == 0) {
+			dwc_otg_ep0_start_transfer(core_if, &ep->dwc_ep);
+		} else {
+			dwc_otg_ep_start_transfer(core_if, &ep->dwc_ep);
+		}
+	}
+}
+
+/*
+ * This function create new nextep sequnce based on Learn Queue.
+ *
+ * @param core_if Programming view of DWC_otg controller
+ */
+void predict_nextep_seq( dwc_otg_core_if_t * core_if)
+{
+	dwc_otg_device_global_regs_t *dev_global_regs =
+	    core_if->dev_if->dev_global_regs;
+	const uint32_t TOKEN_Q_DEPTH = core_if->hwcfg2.b.dev_token_q_depth;
+	/* Number of Token Queue Registers */
+	const int DTKNQ_REG_CNT = (TOKEN_Q_DEPTH + 7) / 8;
+	dtknq1_data_t dtknqr1;
+	uint32_t in_tkn_epnums[4];
+	uint8_t seqnum[MAX_EPS_CHANNELS];
+	uint8_t intkn_seq[TOKEN_Q_DEPTH];
+	grstctl_t resetctl = {.d32 = 0 };
+	uint8_t temp;
+	int ndx = 0;
+	int start = 0;
+	int end = 0;
+	int sort_done = 0;
+	int i = 0;
+	volatile uint32_t *addr = &dev_global_regs->dtknqr1;
+
+
+	DWC_DEBUGPL(DBG_PCD,"dev_token_q_depth=%d\n",TOKEN_Q_DEPTH);
+
+	/* Read the DTKNQ Registers */
+	for (i = 0; i < DTKNQ_REG_CNT; i++) {
+		in_tkn_epnums[i] = DWC_READ_REG32(addr);
+		DWC_DEBUGPL(DBG_PCDV, "DTKNQR%d=0x%08x\n", i + 1,
+			    in_tkn_epnums[i]);
+		if (addr == &dev_global_regs->dvbusdis) {
+			addr = &dev_global_regs->dtknqr3_dthrctl;
+		} else {
+			++addr;
+		}
+
+	}
+
+	/* Copy the DTKNQR1 data to the bit field. */
+	dtknqr1.d32 = in_tkn_epnums[0];
+	if (dtknqr1.b.wrap_bit) {
+		ndx = dtknqr1.b.intknwptr;
+		end = ndx -1;
+		if (end < 0) 
+			end = TOKEN_Q_DEPTH -1;
+	} else {
+		ndx = 0;
+		end = dtknqr1.b.intknwptr -1;
+		if (end < 0) 
+			end = 0;
+	}
+	start = ndx;
+	
+	/* Fill seqnum[] by initial values: EP number + 31 */
+	for (i=0; i <= core_if->dev_if->num_in_eps; i++) {
+		seqnum[i] = i +31;
+	}
+	
+	/* Fill intkn_seq[] from in_tkn_epnums[0] */
+	for (i=0; i < 6; i++) 
+		intkn_seq[i] = (in_tkn_epnums[0] >> ((7-i) * 4)) & 0xf;
+	
+	if (TOKEN_Q_DEPTH > 6) {
+		/* Fill intkn_seq[] from in_tkn_epnums[1] */
+		for (i=6; i < 14; i++) 
+			intkn_seq[i] = (in_tkn_epnums[1] >> ((7-(i-6)) * 4)) & 0xf;
+	}
+	
+	if (TOKEN_Q_DEPTH > 14) {
+		/* Fill intkn_seq[] from in_tkn_epnums[1] */
+		for (i=14; i < 22; i++) 
+			intkn_seq[i] = (in_tkn_epnums[2] >> ((7-(i-14)) * 4)) & 0xf;
+	}
+
+	if (TOKEN_Q_DEPTH > 22) {
+		/* Fill intkn_seq[] from in_tkn_epnums[1] */
+		for (i=22; i < 30; i++) 
+			intkn_seq[i] = (in_tkn_epnums[3] >> ((7-(i-22)) * 4)) & 0xf;
+	}
+
+	DWC_DEBUGPL(DBG_PCDV,"%s start=%d end=%d intkn_seq[]:\n", __func__, start, end);
+	for (i=0; i<TOKEN_Q_DEPTH; i++) 
+		DWC_DEBUGPL(DBG_PCDV,"%d\n", intkn_seq[i]);
+
+	/* Update seqnum based on intkn_seq[] */
+	i = 0;
+	do {
+		seqnum[intkn_seq[ndx]] = i;
+		ndx++;
+		i++;
+		if (ndx == TOKEN_Q_DEPTH) 
+			ndx = 0;
+	} while ( i < TOKEN_Q_DEPTH );
+	
+	/* Mark non active EP's in seqnum[] by 0xff */
+	for (i=0; i<=core_if->dev_if->num_in_eps; i++) {
+		if (core_if->nextep_seq[i] == 0xff )
+			seqnum[i] = 0xff;
+	}
+	
+	/* Sort seqnum[] */
+	sort_done = 0;
+	while (!sort_done) {
+		sort_done = 1;
+		for (i=0; i<core_if->dev_if->num_in_eps; i++) {
+			if (seqnum[i] > seqnum[i+1]) {
+				temp = seqnum[i];
+				seqnum[i] = seqnum[i+1];
+				seqnum[i+1] = temp;
+				sort_done = 0;
+			}
+		}
+	}
+
+	ndx = start + seqnum[0];
+	if (ndx >= TOKEN_Q_DEPTH) 
+		ndx = ndx % TOKEN_Q_DEPTH;
+	core_if->first_in_nextep_seq = intkn_seq[ndx];
+	
+	/* Update seqnum[] by EP numbers  */
+	for (i=0; i<=core_if->dev_if->num_in_eps; i++) {
+		ndx = start + i;
+		if (seqnum[i] < 31) {
+			ndx = start + seqnum[i];
+			if (ndx >= TOKEN_Q_DEPTH) 
+				ndx = ndx % TOKEN_Q_DEPTH;
+			seqnum[i] = intkn_seq[ndx];
+		} else {
+			if (seqnum[i] < 0xff) {
+				seqnum[i] = seqnum[i] - 31;
+			} else {
+				break;
+			}
+		}
+	}
+
+	/* Update nextep_seq[] based on seqnum[] */
+	for (i=0; i<core_if->dev_if->num_in_eps; i++) {
+		if (seqnum[i] != 0xff) {
+			if (seqnum[i+1] != 0xff) {
+				core_if->nextep_seq[seqnum[i]] = seqnum[i+1];
+			} else {
+				core_if->nextep_seq[seqnum[i]] = core_if->first_in_nextep_seq;
+				break;
+			}
+		} else {
+			break;
+		}
+	}
+	
+	DWC_DEBUGPL(DBG_PCDV, "%s first_in_nextep_seq= %2d; nextep_seq[]:\n", 
+		__func__, core_if->first_in_nextep_seq);
+	for (i=0; i <= core_if->dev_if->num_in_eps; i++) {
+		DWC_DEBUGPL(DBG_PCDV,"%2d\n", core_if->nextep_seq[i]);
+	}
+
+	/* Flush the Learning Queue */
+	resetctl.d32 = DWC_READ_REG32(&core_if->core_global_regs->grstctl);
+	resetctl.b.intknqflsh = 1;
+	DWC_WRITE_REG32(&core_if->core_global_regs->grstctl, resetctl.d32);
+	
+
+}
+
+/**
+ * handle the IN EP disable interrupt.
+ */
+static inline void handle_in_ep_disable_intr(dwc_otg_pcd_t * pcd,
+					     const uint32_t epnum)
+{
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+	dwc_otg_dev_if_t *dev_if = core_if->dev_if;
+	deptsiz_data_t dieptsiz = {.d32 = 0 };
+	dctl_data_t dctl = {.d32 = 0 };
+	dwc_otg_pcd_ep_t *ep;
+	dwc_ep_t *dwc_ep;
+	gintmsk_data_t gintmsk_data;
+	depctl_data_t depctl;
+	uint32_t diepdma;
+	uint32_t remain_to_transfer = 0;
+	uint8_t i;
+	uint32_t xfer_size;
+	
+	ep = get_in_ep(pcd, epnum);
+	dwc_ep = &ep->dwc_ep;
+
+	if (dwc_ep->type == DWC_OTG_EP_TYPE_ISOC) {
+		dwc_otg_flush_tx_fifo(core_if, dwc_ep->tx_fifo_num);
+		return;
+	}
+
+	DWC_DEBUGPL(DBG_PCD, "diepctl%d=%0x\n", epnum,
+		    DWC_READ_REG32(&dev_if->in_ep_regs[epnum]->diepctl));
+	dieptsiz.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[epnum]->dieptsiz);
+	depctl.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[epnum]->diepctl);
+
+	DWC_DEBUGPL(DBG_ANY, "pktcnt=%d size=%d\n",
+		    dieptsiz.b.pktcnt, dieptsiz.b.xfersize);
+	
+	if ((core_if->start_predict == 0) || (depctl.b.eptype & 1)) {	// or Periodic EP
+
+		if (ep->stopped) {
+			if (core_if->en_multiple_tx_fifo)
+				/* Flush the Tx FIFO */
+				dwc_otg_flush_tx_fifo(core_if, dwc_ep->tx_fifo_num);
+			/* Clear the Global IN NP NAK */
+			dctl.d32 = 0;
+			dctl.b.cgnpinnak = 1;
+			DWC_MODIFY_REG32(&dev_if->dev_global_regs->dctl, dctl.d32, dctl.d32); 
+			/* Restart the transaction */
+			if (dieptsiz.b.pktcnt != 0 || dieptsiz.b.xfersize != 0) {
+				restart_transfer(pcd, epnum);
+			}
+		} else {
+			/* Restart the transaction */
+			if (dieptsiz.b.pktcnt != 0 || dieptsiz.b.xfersize != 0) {
+				restart_transfer(pcd, epnum);
+			}
+			DWC_DEBUGPL(DBG_ANY, "STOPPED!!!\n");
+		}
+		return;
+	}
+
+	if (core_if->start_predict > 2) {	// NP IN EP
+		core_if->start_predict--;
+		return;
+	}
+
+	core_if->start_predict--;
+	
+	if (core_if->start_predict == 1) {	// All NP IN Ep's disabled now
+
+		predict_nextep_seq(core_if);
+			
+		/* Update all active IN EP's NextEP field based of nextep_seq[] */
+		for ( i = 0; i <= core_if->dev_if->num_in_eps; i++) {
+			depctl.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[i]->diepctl);
+			if (core_if->nextep_seq[i] != 0xff) {	// Active NP IN EP
+				depctl.b.nextep = core_if->nextep_seq[i];
+				DWC_WRITE_REG32(&dev_if->in_ep_regs[i]->diepctl, depctl.d32);
+			}
+		}
+		/* Flush Shared NP TxFIFO */
+		dwc_otg_flush_tx_fifo(core_if, 0);
+		/* Rewind buffers */
+		if (!core_if->dma_desc_enable) {		
+			i = core_if->first_in_nextep_seq;
+			do {
+				ep = get_in_ep(pcd, i);
+				dieptsiz.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[i]->dieptsiz);
+				xfer_size = ep->dwc_ep.total_len - ep->dwc_ep.xfer_count;
+				if (xfer_size > ep->dwc_ep.maxxfer) 
+					xfer_size = ep->dwc_ep.maxxfer;
+				depctl.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[i]->diepctl);
+				if (dieptsiz.b.pktcnt != 0) {
+					if (xfer_size == 0) { // zlp
+						remain_to_transfer = 0;
+					} else {
+						if ((xfer_size % ep->dwc_ep.maxpacket) == 0) {	// last packet not short
+							remain_to_transfer = dieptsiz.b.pktcnt * ep->dwc_ep.maxpacket;
+						} else {	// last packet is short
+							remain_to_transfer = ((dieptsiz.b.pktcnt -1) * ep->dwc_ep.maxpacket) 
+								+ (xfer_size % ep->dwc_ep.maxpacket);
+						}
+					}
+					diepdma = DWC_READ_REG32(&dev_if->in_ep_regs[i]->diepdma);
+					dieptsiz.b.xfersize = remain_to_transfer;
+					DWC_WRITE_REG32(&dev_if->in_ep_regs[i]->dieptsiz, dieptsiz.d32);
+					diepdma = ep->dwc_ep.dma_addr + (xfer_size - remain_to_transfer);
+					DWC_WRITE_REG32(&dev_if->in_ep_regs[i]->diepdma, diepdma);
+				}
+				i = core_if->nextep_seq[i];
+			} while (i != core_if->first_in_nextep_seq);
+		} else { // dma_desc_enable
+				DWC_PRINTF("%s Learning Queue not supported in DDMA\n", __func__);
+		}
+				
+		/* Restart transfers in predicted sequences */
+		i = core_if->first_in_nextep_seq;
+		do {
+			dieptsiz.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[i]->dieptsiz);
+			depctl.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[i]->diepctl);
+			if (dieptsiz.b.pktcnt != 0) {
+				depctl.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[i]->diepctl);
+				depctl.b.epena = 1;
+				depctl.b.cnak = 1;
+				DWC_WRITE_REG32(&dev_if->in_ep_regs[i]->diepctl, depctl.d32);
+			}
+			i = core_if->nextep_seq[i];
+		} while (i != core_if->first_in_nextep_seq);
+
+		/* Clear the global non-periodic IN NAK handshake */
+		dctl.d32 = 0;
+		dctl.b.cgnpinnak = 1;
+		DWC_MODIFY_REG32(&dev_if->dev_global_regs->dctl, dctl.d32, dctl.d32); 
+			
+		/* Unmask EP Mismatch interrupt */
+		gintmsk_data.d32 = 0;
+		gintmsk_data.b.epmismatch = 1;
+		DWC_MODIFY_REG32(&core_if->core_global_regs->gintmsk, 0, gintmsk_data.d32);
+		
+		core_if->start_predict = 0;
+
+	} 
+}
+
+/**
+ * Handler for the IN EP timeout handshake interrupt.
+ */
+static inline void handle_in_ep_timeout_intr(dwc_otg_pcd_t * pcd,
+					     const uint32_t epnum)
+{
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+	dwc_otg_dev_if_t *dev_if = core_if->dev_if;
+
+#ifdef DEBUG
+	deptsiz_data_t dieptsiz = {.d32 = 0 };
+	uint32_t num = 0;
+#endif
+	dctl_data_t dctl = {.d32 = 0 };
+	dwc_otg_pcd_ep_t *ep;
+
+	gintmsk_data_t intr_mask = {.d32 = 0 };
+
+	ep = get_in_ep(pcd, epnum);
+
+	/* Disable the NP Tx Fifo Empty Interrrupt */
+	if (!core_if->dma_enable) {
+		intr_mask.b.nptxfempty = 1;
+		DWC_MODIFY_REG32(&core_if->core_global_regs->gintmsk,
+				 intr_mask.d32, 0);
+	}
+	/** @todo NGS Check EP type.
+	 * Implement for Periodic EPs */
+	/*
+	 * Non-periodic EP
+	 */
+	/* Enable the Global IN NAK Effective Interrupt */
+	intr_mask.b.ginnakeff = 1;
+	DWC_MODIFY_REG32(&core_if->core_global_regs->gintmsk, 0, intr_mask.d32);
+
+	/* Set Global IN NAK */
+	dctl.b.sgnpinnak = 1;
+	DWC_MODIFY_REG32(&dev_if->dev_global_regs->dctl, dctl.d32, dctl.d32);
+
+	ep->stopped = 1;
+
+#ifdef DEBUG
+	dieptsiz.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[num]->dieptsiz);
+	DWC_DEBUGPL(DBG_ANY, "pktcnt=%d size=%d\n",
+		    dieptsiz.b.pktcnt, dieptsiz.b.xfersize);
+#endif
+
+#ifdef DISABLE_PERIODIC_EP
+	/*
+	 * Set the NAK bit for this EP to
+	 * start the disable process.
+	 */
+	diepctl.d32 = 0;
+	diepctl.b.snak = 1;
+	DWC_MODIFY_REG32(&dev_if->in_ep_regs[num]->diepctl, diepctl.d32,
+			 diepctl.d32);
+	ep->disabling = 1;
+	ep->stopped = 1;
+#endif
+}
+
+/**
+ * Handler for the IN EP NAK interrupt.
+ */
+static inline int32_t handle_in_ep_nak_intr(dwc_otg_pcd_t * pcd,
+					    const uint32_t epnum)
+{
+	/** @todo implement ISR */
+	dwc_otg_core_if_t *core_if;
+	diepmsk_data_t intr_mask = {.d32 = 0 };
+
+	DWC_PRINTF("INTERRUPT Handler not implemented for %s\n", "IN EP NAK");
+	core_if = GET_CORE_IF(pcd);
+	intr_mask.b.nak = 1;
+
+	if (core_if->multiproc_int_enable) {
+		DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->
+				 diepeachintmsk[epnum], intr_mask.d32, 0);
+	} else {
+		DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->diepmsk,
+				 intr_mask.d32, 0);
+	}
+
+	return 1;
+}
+
+/**
+ * Handler for the OUT EP Babble interrupt.
+ */
+static inline int32_t handle_out_ep_babble_intr(dwc_otg_pcd_t * pcd,
+						const uint32_t epnum)
+{
+	/** @todo implement ISR */
+	dwc_otg_core_if_t *core_if;
+	doepmsk_data_t intr_mask = {.d32 = 0 };
+
+	DWC_PRINTF("INTERRUPT Handler not implemented for %s\n",
+		   "OUT EP Babble");
+	core_if = GET_CORE_IF(pcd);
+	intr_mask.b.babble = 1;
+
+	if (core_if->multiproc_int_enable) {
+		DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->
+				 doepeachintmsk[epnum], intr_mask.d32, 0);
+	} else {
+		DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->doepmsk,
+				 intr_mask.d32, 0);
+	}
+
+	return 1;
+}
+
+/**
+ * Handler for the OUT EP NAK interrupt.
+ */
+static inline int32_t handle_out_ep_nak_intr(dwc_otg_pcd_t * pcd,
+					     const uint32_t epnum)
+{
+	/** @todo implement ISR */
+	dwc_otg_core_if_t *core_if;
+	doepmsk_data_t intr_mask = {.d32 = 0 };
+
+	DWC_PRINTF("INTERRUPT Handler not implemented for %s\n", "OUT EP NAK");
+	core_if = GET_CORE_IF(pcd);
+	intr_mask.b.nak = 1;
+
+	if (core_if->multiproc_int_enable) {
+		DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->
+				 doepeachintmsk[epnum], intr_mask.d32, 0);
+	} else {
+		DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->doepmsk,
+				 intr_mask.d32, 0);
+	}
+
+	return 1;
+}
+
+/**
+ * Handler for the OUT EP NYET interrupt.
+ */
+static inline int32_t handle_out_ep_nyet_intr(dwc_otg_pcd_t * pcd,
+					      const uint32_t epnum)
+{
+	/** @todo implement ISR */
+	dwc_otg_core_if_t *core_if;
+	doepmsk_data_t intr_mask = {.d32 = 0 };
+
+	DWC_PRINTF("INTERRUPT Handler not implemented for %s\n", "OUT EP NYET");
+	core_if = GET_CORE_IF(pcd);
+	intr_mask.b.nyet = 1;
+
+	if (core_if->multiproc_int_enable) {
+		DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->
+				 doepeachintmsk[epnum], intr_mask.d32, 0);
+	} else {
+		DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->doepmsk,
+				 intr_mask.d32, 0);
+	}
+
+	return 1;
+}
+
+/**
+ * This interrupt indicates that an IN EP has a pending Interrupt.
+ * The sequence for handling the IN EP interrupt is shown below:
+ * -#	Read the Device All Endpoint Interrupt register
+ * -#	Repeat the following for each IN EP interrupt bit set (from
+ *		LSB to MSB).
+ * -#	Read the Device Endpoint Interrupt (DIEPINTn) register
+ * -#	If "Transfer Complete" call the request complete function
+ * -#	If "Endpoint Disabled" complete the EP disable procedure.
+ * -#	If "AHB Error Interrupt" log error
+ * -#	If "Time-out Handshake" log error
+ * -#	If "IN Token Received when TxFIFO Empty" write packet to Tx
+ *		FIFO.
+ * -#	If "IN Token EP Mismatch" (disable, this is handled by EP
+ *		Mismatch Interrupt)
+ */
+static int32_t dwc_otg_pcd_handle_in_ep_intr(dwc_otg_pcd_t * pcd)
+{
+#define CLEAR_IN_EP_INTR(__core_if,__epnum,__intr) \
+do { \
+		diepint_data_t diepint = {.d32=0}; \
+		diepint.b.__intr = 1; \
+		DWC_WRITE_REG32(&__core_if->dev_if->in_ep_regs[__epnum]->diepint, \
+		diepint.d32); \
+} while (0)
+
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+	dwc_otg_dev_if_t *dev_if = core_if->dev_if;
+	diepint_data_t diepint = {.d32 = 0 };
+	depctl_data_t depctl = {.d32 = 0 };
+	uint32_t ep_intr;
+	uint32_t epnum = 0;
+	dwc_otg_pcd_ep_t *ep;
+	dwc_ep_t *dwc_ep;
+	gintmsk_data_t intr_mask = {.d32 = 0 };
+
+	DWC_DEBUGPL(DBG_PCDV, "%s(%p)\n", __func__, pcd);
+
+	/* Read in the device interrupt bits */
+	ep_intr = dwc_otg_read_dev_all_in_ep_intr(core_if);
+
+	/* Service the Device IN interrupts for each endpoint */
+	while (ep_intr) {
+		if (ep_intr & 0x1) {
+			uint32_t empty_msk;
+			/* Get EP pointer */
+			ep = get_in_ep(pcd, epnum);
+			dwc_ep = &ep->dwc_ep;
+
+			depctl.d32 =
+			    DWC_READ_REG32(&dev_if->in_ep_regs[epnum]->diepctl);
+			empty_msk =
+			    DWC_READ_REG32(&dev_if->
+					   dev_global_regs->dtknqr4_fifoemptymsk);
+
+			DWC_DEBUGPL(DBG_PCDV,
+				    "IN EP INTERRUPT - %d\nepmty_msk - %8x  diepctl - %8x\n",
+				    epnum, empty_msk, depctl.d32);
+
+			DWC_DEBUGPL(DBG_PCD,
+				    "EP%d-%s: type=%d, mps=%d\n",
+				    dwc_ep->num, (dwc_ep->is_in ? "IN" : "OUT"),
+				    dwc_ep->type, dwc_ep->maxpacket);
+
+			diepint.d32 =
+			    dwc_otg_read_dev_in_ep_intr(core_if, dwc_ep);
+
+			DWC_DEBUGPL(DBG_PCDV,
+				    "EP %d Interrupt Register - 0x%x\n", epnum,
+				    diepint.d32);
+			/* Transfer complete */
+			if (diepint.b.xfercompl) {
+				/* Disable the NP Tx FIFO Empty
+				 * Interrrupt */
+				if (core_if->en_multiple_tx_fifo == 0) {
+					intr_mask.b.nptxfempty = 1;
+					DWC_MODIFY_REG32
+					    (&core_if->core_global_regs->gintmsk,
+					     intr_mask.d32, 0);
+				} else {
+					/* Disable the Tx FIFO Empty Interrupt for this EP */
+					uint32_t fifoemptymsk =
+					    0x1 << dwc_ep->num;
+					DWC_MODIFY_REG32(&core_if->
+							 dev_if->dev_global_regs->dtknqr4_fifoemptymsk,
+							 fifoemptymsk, 0);
+				}
+				/* Clear the bit in DIEPINTn for this interrupt */
+				CLEAR_IN_EP_INTR(core_if, epnum, xfercompl);
+
+				/* Complete the transfer */
+				if (epnum == 0) {
+					handle_ep0(pcd);
+				}
+#ifdef DWC_EN_ISOC
+				else if (dwc_ep->type == DWC_OTG_EP_TYPE_ISOC) {
+					if (!ep->stopped)
+						complete_iso_ep(pcd, ep);
+				}
+#endif /* DWC_EN_ISOC */
+#ifdef DWC_UTE_PER_IO
+				else if (dwc_ep->type == DWC_OTG_EP_TYPE_ISOC) {
+					if (!ep->stopped)
+						complete_xiso_ep(ep);
+				}
+#endif /* DWC_UTE_PER_IO */
+				else {
+					complete_ep(ep);
+				}
+			}
+			/* Endpoint disable      */
+			if (diepint.b.epdisabled) {
+				DWC_DEBUGPL(DBG_ANY, "EP%d IN disabled\n",
+					    epnum);
+				handle_in_ep_disable_intr(pcd, epnum);
+
+				/* Clear the bit in DIEPINTn for this interrupt */
+				CLEAR_IN_EP_INTR(core_if, epnum, epdisabled);
+			}
+			/* AHB Error */
+			if (diepint.b.ahberr) {
+				DWC_ERROR("EP%d IN AHB Error\n", epnum);
+				/* Clear the bit in DIEPINTn for this interrupt */
+				CLEAR_IN_EP_INTR(core_if, epnum, ahberr);
+			}
+			/* TimeOUT Handshake (non-ISOC IN EPs) */
+			if (diepint.b.timeout) {
+				DWC_ERROR("EP%d IN Time-out\n", epnum);
+				handle_in_ep_timeout_intr(pcd, epnum);
+
+				CLEAR_IN_EP_INTR(core_if, epnum, timeout);
+			}
+			/** IN Token received with TxF Empty */
+			if (diepint.b.intktxfemp) {
+				DWC_DEBUGPL(DBG_ANY,
+					    "EP%d IN TKN TxFifo Empty\n",
+					    epnum);
+				if (!ep->stopped && epnum != 0) {
+
+					diepmsk_data_t diepmsk = {.d32 = 0 };
+					diepmsk.b.intktxfemp = 1;
+
+					if (core_if->multiproc_int_enable) {
+						DWC_MODIFY_REG32
+						    (&dev_if->dev_global_regs->diepeachintmsk
+						     [epnum], diepmsk.d32, 0);
+					} else {
+						DWC_MODIFY_REG32
+						    (&dev_if->dev_global_regs->diepmsk,
+						     diepmsk.d32, 0);
+					}
+				} else if (core_if->dma_desc_enable
+					   && epnum == 0
+					   && pcd->ep0state ==
+					   EP0_OUT_STATUS_PHASE) {
+					// EP0 IN set STALL
+					depctl.d32 =
+					    DWC_READ_REG32(&dev_if->in_ep_regs
+							   [epnum]->diepctl);
+
+					/* set the disable and stall bits */
+					if (depctl.b.epena) {
+						depctl.b.epdis = 1;
+					}
+					depctl.b.stall = 1;
+					DWC_WRITE_REG32(&dev_if->in_ep_regs
+							[epnum]->diepctl,
+							depctl.d32);
+				}
+				CLEAR_IN_EP_INTR(core_if, epnum, intktxfemp);
+			}
+			/** IN Token Received with EP mismatch */
+			if (diepint.b.intknepmis) {
+				DWC_DEBUGPL(DBG_ANY,
+					    "EP%d IN TKN EP Mismatch\n", epnum);
+				CLEAR_IN_EP_INTR(core_if, epnum, intknepmis);				
+			}
+			/** IN Endpoint NAK Effective */
+			if (diepint.b.inepnakeff) {
+				DWC_DEBUGPL(DBG_ANY,
+					    "EP%d IN EP NAK Effective\n",
+					    epnum);
+				/* Periodic EP */
+				if (ep->disabling) {
+					depctl.d32 = 0;
+					depctl.b.snak = 1;
+					depctl.b.epdis = 1;
+					DWC_MODIFY_REG32(&dev_if->in_ep_regs
+							 [epnum]->diepctl,
+							 depctl.d32,
+							 depctl.d32);
+				}
+				CLEAR_IN_EP_INTR(core_if, epnum, inepnakeff);
+
+			}
+
+			/** IN EP Tx FIFO Empty Intr */
+			if (diepint.b.emptyintr) {
+				DWC_DEBUGPL(DBG_ANY,
+					    "EP%d Tx FIFO Empty Intr \n",
+					    epnum);
+				write_empty_tx_fifo(pcd, epnum);
+
+				CLEAR_IN_EP_INTR(core_if, epnum, emptyintr);
+
+			}
+
+			/** IN EP BNA Intr */
+			if (diepint.b.bna) {
+				CLEAR_IN_EP_INTR(core_if, epnum, bna);
+				if (core_if->dma_desc_enable) {
+#ifdef DWC_EN_ISOC
+					if (dwc_ep->type ==
+					    DWC_OTG_EP_TYPE_ISOC) {
+						/*
+						 * This checking is performed to prevent first "false" BNA
+						 * handling occuring right after reconnect
+						 */
+						if (dwc_ep->next_frame !=
+						    0xffffffff)
+							dwc_otg_pcd_handle_iso_bna(ep);
+					} else
+#endif				/* DWC_EN_ISOC */
+					{
+						dwc_otg_pcd_handle_noniso_bna(ep);
+					}
+				}
+			}
+			/* NAK Interrutp */
+			if (diepint.b.nak) {
+				DWC_DEBUGPL(DBG_ANY, "EP%d IN NAK Interrupt\n",
+					    epnum);
+				handle_in_ep_nak_intr(pcd, epnum);
+
+				CLEAR_IN_EP_INTR(core_if, epnum, nak);
+			}
+		}
+		epnum++;
+		ep_intr >>= 1;
+	}
+
+	return 1;
+#undef CLEAR_IN_EP_INTR
+}
+
+/**
+ * This interrupt indicates that an OUT EP has a pending Interrupt.
+ * The sequence for handling the OUT EP interrupt is shown below:
+ * -#	Read the Device All Endpoint Interrupt register
+ * -#	Repeat the following for each OUT EP interrupt bit set (from
+ *		LSB to MSB).
+ * -#	Read the Device Endpoint Interrupt (DOEPINTn) register
+ * -#	If "Transfer Complete" call the request complete function
+ * -#	If "Endpoint Disabled" complete the EP disable procedure.
+ * -#	If "AHB Error Interrupt" log error
+ * -#	If "Setup Phase Done" process Setup Packet (See Standard USB
+ *		Command Processing)
+ */
+static int32_t dwc_otg_pcd_handle_out_ep_intr(dwc_otg_pcd_t * pcd)
+{
+#define CLEAR_OUT_EP_INTR(__core_if,__epnum,__intr) \
+do { \
+		doepint_data_t doepint = {.d32=0}; \
+		doepint.b.__intr = 1; \
+		DWC_WRITE_REG32(&__core_if->dev_if->out_ep_regs[__epnum]->doepint, \
+		doepint.d32); \
+} while (0)
+
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+	uint32_t ep_intr;
+	doepint_data_t doepint = {.d32 = 0 };
+	uint32_t epnum = 0;
+	dwc_otg_pcd_ep_t *ep;
+	dwc_ep_t *dwc_ep;
+	dctl_data_t dctl = {.d32 = 0 };
+	gintmsk_data_t gintmsk = {.d32 = 0 };
+
+
+	DWC_DEBUGPL(DBG_PCDV, "%s()\n", __func__);
+
+	/* Read in the device interrupt bits */
+	ep_intr = dwc_otg_read_dev_all_out_ep_intr(core_if);
+
+	while (ep_intr) {
+		if (ep_intr & 0x1) {
+			/* Get EP pointer */
+			ep = get_out_ep(pcd, epnum);
+			dwc_ep = &ep->dwc_ep;
+
+#ifdef VERBOSE
+			DWC_DEBUGPL(DBG_PCDV,
+				    "EP%d-%s: type=%d, mps=%d\n",
+				    dwc_ep->num, (dwc_ep->is_in ? "IN" : "OUT"),
+				    dwc_ep->type, dwc_ep->maxpacket);
+#endif
+			doepint.d32 =
+			    dwc_otg_read_dev_out_ep_intr(core_if, dwc_ep);
+
+			/* Transfer complete */
+			if (doepint.b.xfercompl) {
+
+				if (epnum == 0) {
+					/* Clear the bit in DOEPINTn for this interrupt */
+					CLEAR_OUT_EP_INTR(core_if, epnum,
+							  xfercompl);
+					if (core_if->dma_desc_enable == 0
+					    || pcd->ep0state != EP0_IDLE)
+						handle_ep0(pcd);
+#ifdef DWC_EN_ISOC
+				} else if (dwc_ep->type == DWC_OTG_EP_TYPE_ISOC) {
+					if (doepint.b.pktdrpsts == 0) {
+						/* Clear the bit in DOEPINTn for this interrupt */
+						CLEAR_OUT_EP_INTR(core_if,
+								  epnum,
+								  xfercompl);
+						complete_iso_ep(pcd, ep);
+					} else {
+
+						doepint_data_t doepint = {.d32 = 0 };
+						doepint.b.xfercompl = 1;
+						doepint.b.pktdrpsts = 1;
+						DWC_WRITE_REG32
+						    (&core_if->dev_if->out_ep_regs
+						     [epnum]->doepint,
+						     doepint.d32);
+						if (handle_iso_out_pkt_dropped
+						    (core_if, dwc_ep)) {
+							complete_iso_ep(pcd,
+									ep);
+						}
+					}
+#endif /* DWC_EN_ISOC */
+#ifdef DWC_UTE_PER_IO
+				} else if (dwc_ep->type == DWC_OTG_EP_TYPE_ISOC) {
+					CLEAR_OUT_EP_INTR(core_if, epnum, xfercompl);
+					if (!ep->stopped)
+						complete_xiso_ep(ep);
+#endif /* DWC_UTE_PER_IO */
+				} else {
+					/* Clear the bit in DOEPINTn for this interrupt */
+					CLEAR_OUT_EP_INTR(core_if, epnum,
+							  xfercompl);
+
+					if (core_if->core_params->dev_out_nak) {
+						DWC_TIMER_CANCEL(pcd->core_if->ep_xfer_timer[epnum]);
+						pcd->core_if->ep_xfer_info[epnum].state = 0;
+#ifdef DEBUG
+						print_memory_payload(pcd, dwc_ep);
+#endif
+					}
+					complete_ep(ep);						
+				}
+
+			}
+
+			/* Endpoint disable      */
+			if (doepint.b.epdisabled) {
+
+				/* Clear the bit in DOEPINTn for this interrupt */
+				CLEAR_OUT_EP_INTR(core_if, epnum, epdisabled);
+				if (core_if->core_params->dev_out_nak) {
+#ifdef DEBUG
+					print_memory_payload(pcd, dwc_ep);
+#endif
+					/* In case of timeout condition */
+					if (core_if->ep_xfer_info[epnum].state == 2) {
+						dctl.d32 = DWC_READ_REG32(&core_if->dev_if->
+										dev_global_regs->dctl);
+						dctl.b.cgoutnak = 1;
+						DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dctl,
+																dctl.d32);
+						/* Unmask goutnakeff interrupt which was masked
+						 * during handle nak out interrupt */
+						gintmsk.b.goutnakeff = 1;
+						DWC_MODIFY_REG32(&core_if->core_global_regs->gintmsk,
+																0, gintmsk.d32);
+					
+						complete_ep(ep);
+					}
+				}
+				
+			}
+			/* AHB Error */
+			if (doepint.b.ahberr) {
+				DWC_ERROR("EP%d OUT AHB Error\n", epnum);
+				DWC_ERROR("EP%d DEPDMA=0x%08x \n",
+					  epnum, core_if->dev_if->out_ep_regs[epnum]->doepdma);
+				CLEAR_OUT_EP_INTR(core_if, epnum, ahberr);
+			}
+			/* Setup Phase Done (contorl EPs) */
+			if (doepint.b.setup) {
+#ifdef DEBUG_EP0
+				DWC_DEBUGPL(DBG_PCD, "EP%d SETUP Done\n",
+					    epnum);
+#endif
+				CLEAR_OUT_EP_INTR(core_if, epnum, setup);
+
+				handle_ep0(pcd);
+			}
+
+			/** OUT EP BNA Intr */
+			if (doepint.b.bna) {
+				CLEAR_OUT_EP_INTR(core_if, epnum, bna);
+				if (core_if->dma_desc_enable) {
+#ifdef DWC_EN_ISOC
+					if (dwc_ep->type ==
+					    DWC_OTG_EP_TYPE_ISOC) {
+						/*
+						 * This checking is performed to prevent first "false" BNA
+						 * handling occuring right after reconnect
+						 */
+						if (dwc_ep->next_frame !=
+						    0xffffffff)
+							dwc_otg_pcd_handle_iso_bna(ep);
+					} else
+#endif				/* DWC_EN_ISOC */
+					{
+						dwc_otg_pcd_handle_noniso_bna(ep);
+					}
+				}
+			}
+			if (doepint.b.stsphsercvd) {
+				CLEAR_OUT_EP_INTR(core_if, epnum, stsphsercvd);
+				if (core_if->dma_desc_enable) {
+					do_setup_in_status_phase(pcd);
+				}
+			}
+			/* Babble Interrutp */
+			if (doepint.b.babble) {
+				DWC_DEBUGPL(DBG_ANY, "EP%d OUT Babble\n",
+					    epnum);
+				handle_out_ep_babble_intr(pcd, epnum);
+
+				CLEAR_OUT_EP_INTR(core_if, epnum, babble);
+			}
+			/* NAK Interrutp */
+			if (doepint.b.nak) {
+				DWC_DEBUGPL(DBG_ANY, "EP%d OUT NAK\n", epnum);
+				handle_out_ep_nak_intr(pcd, epnum);
+
+				CLEAR_OUT_EP_INTR(core_if, epnum, nak);
+			}
+			/* NYET Interrutp */
+			if (doepint.b.nyet) {
+				DWC_DEBUGPL(DBG_ANY, "EP%d OUT NYET\n", epnum);
+				handle_out_ep_nyet_intr(pcd, epnum);
+
+				CLEAR_OUT_EP_INTR(core_if, epnum, nyet);
+			}
+		}
+
+		epnum++;
+		ep_intr >>= 1;
+	}
+
+	return 1;
+
+#undef CLEAR_OUT_EP_INTR
+}
+
+/**
+ * Incomplete ISO IN Transfer Interrupt.
+ * This interrupt indicates one of the following conditions occurred
+ * while transmitting an ISOC transaction.
+ * - Corrupted IN Token for ISOC EP.
+ * - Packet not complete in FIFO.
+ * The follow actions will be taken:
+ *	-#	Determine the EP
+ *	-#	Set incomplete flag in dwc_ep structure
+ *	-#	Disable EP; when "Endpoint Disabled" interrupt is received
+ *		Flush FIFO
+ */
+int32_t dwc_otg_pcd_handle_incomplete_isoc_in_intr(dwc_otg_pcd_t * pcd)
+{
+	gintsts_data_t gintsts;
+
+#ifdef DWC_EN_ISOC
+	dwc_otg_dev_if_t *dev_if;
+	deptsiz_data_t deptsiz = {.d32 = 0 };
+	depctl_data_t depctl = {.d32 = 0 };
+	dsts_data_t dsts = {.d32 = 0 };
+	dwc_ep_t *dwc_ep;
+	int i;
+
+	dev_if = GET_CORE_IF(pcd)->dev_if;
+
+	for (i = 1; i <= dev_if->num_in_eps; ++i) {
+		dwc_ep = &pcd->in_ep[i].dwc_ep;
+		if (dwc_ep->active && dwc_ep->type == DWC_OTG_EP_TYPE_ISOC) {
+			deptsiz.d32 =
+			    DWC_READ_REG32(&dev_if->in_ep_regs[i]->dieptsiz);
+			depctl.d32 =
+			    DWC_READ_REG32(&dev_if->in_ep_regs[i]->diepctl);
+
+			if (depctl.b.epdis && deptsiz.d32) {
+				set_current_pkt_info(GET_CORE_IF(pcd), dwc_ep);
+				if (dwc_ep->cur_pkt >= dwc_ep->pkt_cnt) {
+					dwc_ep->cur_pkt = 0;
+					dwc_ep->proc_buf_num =
+					    (dwc_ep->proc_buf_num ^ 1) & 0x1;
+
+					if (dwc_ep->proc_buf_num) {
+						dwc_ep->cur_pkt_addr =
+						    dwc_ep->xfer_buff1;
+						dwc_ep->cur_pkt_dma_addr =
+						    dwc_ep->dma_addr1;
+					} else {
+						dwc_ep->cur_pkt_addr =
+						    dwc_ep->xfer_buff0;
+						dwc_ep->cur_pkt_dma_addr =
+						    dwc_ep->dma_addr0;
+					}
+
+				}
+
+				dsts.d32 =
+				    DWC_READ_REG32(&GET_CORE_IF(pcd)->dev_if->
+						   dev_global_regs->dsts);
+				dwc_ep->next_frame = dsts.b.soffn;
+
+				dwc_otg_iso_ep_start_frm_transfer(GET_CORE_IF
+								  (pcd),
+								  dwc_ep);
+			}
+		}
+	}
+
+#else
+	gintmsk_data_t intr_mask = {.d32 = 0 };
+	DWC_PRINTF("INTERRUPT Handler not implemented for %s\n",
+		   "IN ISOC Incomplete");
+
+	intr_mask.b.incomplisoin = 1;
+	DWC_MODIFY_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintmsk,
+			 intr_mask.d32, 0);
+#endif				//DWC_EN_ISOC
+
+	/* Clear interrupt */
+	gintsts.d32 = 0;
+	gintsts.b.incomplisoin = 1;
+	DWC_WRITE_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintsts,
+			gintsts.d32);
+
+	return 1;
+}
+
+/**
+ * Incomplete ISO OUT Transfer Interrupt.
+ *
+ * This interrupt indicates that the core has dropped an ISO OUT
+ * packet. The following conditions can be the cause:
+ * - FIFO Full, the entire packet would not fit in the FIFO.
+ * - CRC Error
+ * - Corrupted Token
+ * The follow actions will be taken:
+ *	-#	Determine the EP
+ *	-#	Set incomplete flag in dwc_ep structure
+ *	-#	Read any data from the FIFO
+ *	-#	Disable EP. When "Endpoint Disabled" interrupt is received
+ *		re-enable EP.
+ */
+int32_t dwc_otg_pcd_handle_incomplete_isoc_out_intr(dwc_otg_pcd_t * pcd)
+{
+
+	gintsts_data_t gintsts;
+
+#ifdef DWC_EN_ISOC
+	dwc_otg_dev_if_t *dev_if;
+	deptsiz_data_t deptsiz = {.d32 = 0 };
+	depctl_data_t depctl = {.d32 = 0 };
+	dsts_data_t dsts = {.d32 = 0 };
+	dwc_ep_t *dwc_ep;
+	int i;
+
+	dev_if = GET_CORE_IF(pcd)->dev_if;
+
+	for (i = 1; i <= dev_if->num_out_eps; ++i) {
+		dwc_ep = &pcd->in_ep[i].dwc_ep;
+		if (pcd->out_ep[i].dwc_ep.active &&
+		    pcd->out_ep[i].dwc_ep.type == DWC_OTG_EP_TYPE_ISOC) {
+			deptsiz.d32 =
+			    DWC_READ_REG32(&dev_if->out_ep_regs[i]->doeptsiz);
+			depctl.d32 =
+			    DWC_READ_REG32(&dev_if->out_ep_regs[i]->doepctl);
+
+			if (depctl.b.epdis && deptsiz.d32) {
+				set_current_pkt_info(GET_CORE_IF(pcd),
+						     &pcd->out_ep[i].dwc_ep);
+				if (dwc_ep->cur_pkt >= dwc_ep->pkt_cnt) {
+					dwc_ep->cur_pkt = 0;
+					dwc_ep->proc_buf_num =
+					    (dwc_ep->proc_buf_num ^ 1) & 0x1;
+
+					if (dwc_ep->proc_buf_num) {
+						dwc_ep->cur_pkt_addr =
+						    dwc_ep->xfer_buff1;
+						dwc_ep->cur_pkt_dma_addr =
+						    dwc_ep->dma_addr1;
+					} else {
+						dwc_ep->cur_pkt_addr =
+						    dwc_ep->xfer_buff0;
+						dwc_ep->cur_pkt_dma_addr =
+						    dwc_ep->dma_addr0;
+					}
+
+				}
+
+				dsts.d32 =
+				    DWC_READ_REG32(&GET_CORE_IF(pcd)->dev_if->
+						   dev_global_regs->dsts);
+				dwc_ep->next_frame = dsts.b.soffn;
+
+				dwc_otg_iso_ep_start_frm_transfer(GET_CORE_IF
+								  (pcd),
+								  dwc_ep);
+			}
+		}
+	}
+#else
+	/** @todo implement ISR */
+	gintmsk_data_t intr_mask = {.d32 = 0 };
+
+	DWC_PRINTF("INTERRUPT Handler not implemented for %s\n",
+		   "OUT ISOC Incomplete");
+
+	intr_mask.b.incomplisoout = 1;
+	DWC_MODIFY_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintmsk,
+			 intr_mask.d32, 0);
+
+#endif /* DWC_EN_ISOC */
+
+	/* Clear interrupt */
+	gintsts.d32 = 0;
+	gintsts.b.incomplisoout = 1;
+	DWC_WRITE_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintsts,
+			gintsts.d32);
+
+	return 1;
+}
+
+/**
+ * This function handles the Global IN NAK Effective interrupt.
+ *
+ */
+int32_t dwc_otg_pcd_handle_in_nak_effective(dwc_otg_pcd_t * pcd)
+{
+	dwc_otg_dev_if_t *dev_if = GET_CORE_IF(pcd)->dev_if;
+	depctl_data_t diepctl = {.d32 = 0 };
+	gintmsk_data_t intr_mask = {.d32 = 0 };
+	gintsts_data_t gintsts;
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+	int i;
+
+	DWC_DEBUGPL(DBG_PCD, "Global IN NAK Effective\n");
+
+	/* Disable all active IN EPs */
+	for (i = 0; i <= dev_if->num_in_eps; i++) {
+		diepctl.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[i]->diepctl);
+		if (!(diepctl.b.eptype & 1) && diepctl.b.epena) {	// NP IN enabled EP's only
+			if (core_if->start_predict > 0)
+				core_if->start_predict++;
+			diepctl.b.epdis = 1;
+			diepctl.b.snak = 1;
+			DWC_WRITE_REG32(&dev_if->in_ep_regs[i]->diepctl, diepctl.d32);
+		}						
+	}
+	
+
+	/* Disable the Global IN NAK Effective Interrupt */
+	intr_mask.b.ginnakeff = 1;
+	DWC_MODIFY_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintmsk,
+			 intr_mask.d32, 0);
+
+	/* Clear interrupt */
+	gintsts.d32 = 0;
+	gintsts.b.ginnakeff = 1;
+	DWC_WRITE_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintsts,
+			gintsts.d32);
+
+	return 1;
+}
+
+/**
+ * OUT NAK Effective.
+ *
+ */
+int32_t dwc_otg_pcd_handle_out_nak_effective(dwc_otg_pcd_t * pcd)
+{
+	dwc_otg_dev_if_t *dev_if = GET_CORE_IF(pcd)->dev_if;
+	gintmsk_data_t intr_mask = {.d32 = 0 };
+	gintsts_data_t gintsts;
+	depctl_data_t doepctl;
+	int i;
+
+	/* Disable the Global OUT NAK Effective Interrupt */
+	intr_mask.b.goutnakeff = 1;
+	DWC_MODIFY_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintmsk,
+		intr_mask.d32, 0);
+	
+	/* If DEV OUT NAK enabled*/
+	if (pcd->core_if->core_params->dev_out_nak) {
+		/* Run over all out endpoints to determine the ep number on
+		 * which the timeout has happened 
+		 */
+		for (i = 0; i <= dev_if->num_out_eps; i++) {
+			if ( pcd->core_if->ep_xfer_info[i].state == 2 )
+				break;
+		} 		
+		/* Disable the endpoint */
+		doepctl.d32 = DWC_READ_REG32(&pcd->core_if->dev_if->
+										out_ep_regs[i]->doepctl);
+		if (doepctl.b.epena) {
+			doepctl.b.epdis = 1;
+			doepctl.b.snak = 1;
+		}
+		DWC_WRITE_REG32(&dev_if->out_ep_regs[i]->doepctl, doepctl.d32);
+		return 1;
+	}
+	
+	DWC_PRINTF("INTERRUPT Handler not implemented for %s\n",
+		   "Global IN NAK Effective\n");
+	
+	/* Clear interrupt */
+	gintsts.d32 = 0;
+	gintsts.b.goutnakeff = 1;
+	DWC_WRITE_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintsts,
+			gintsts.d32);
+
+	return 1;
+}
+
+/**
+ * PCD interrupt handler.
+ *
+ * The PCD handles the device interrupts.  Many conditions can cause a
+ * device interrupt. When an interrupt occurs, the device interrupt
+ * service routine determines the cause of the interrupt and
+ * dispatches handling to the appropriate function. These interrupt
+ * handling functions are described below.
+ *
+ * All interrupt registers are processed from LSB to MSB.
+ *
+ */
+int32_t dwc_otg_pcd_handle_intr(dwc_otg_pcd_t * pcd)
+{
+	dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
+#ifdef VERBOSE
+	dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs;
+#endif
+	gintsts_data_t gintr_status;
+	int32_t retval = 0;
+
+	/* Exit from ISR if core is hibernated */
+	if (core_if->hibernation_suspend == 1) {
+		return retval;
+	}
+#ifdef VERBOSE
+	DWC_DEBUGPL(DBG_ANY, "%s() gintsts=%08x	 gintmsk=%08x\n",
+		    __func__,
+		    DWC_READ_REG32(&global_regs->gintsts),
+		    DWC_READ_REG32(&global_regs->gintmsk));
+#endif
+
+	if (dwc_otg_is_device_mode(core_if)) {
+		DWC_SPINLOCK(pcd->lock);
+#ifdef VERBOSE
+		DWC_DEBUGPL(DBG_PCDV, "%s() gintsts=%08x  gintmsk=%08x\n",
+			    __func__,
+			    DWC_READ_REG32(&global_regs->gintsts),
+			    DWC_READ_REG32(&global_regs->gintmsk));
+#endif
+
+		gintr_status.d32 = dwc_otg_read_core_intr(core_if);
+
+		DWC_DEBUGPL(DBG_PCDV, "%s: gintsts&gintmsk=%08x\n",
+			    __func__, gintr_status.d32);
+
+		if (gintr_status.b.sofintr) {
+			retval |= dwc_otg_pcd_handle_sof_intr(pcd);
+		}
+		if (gintr_status.b.rxstsqlvl) {
+			retval |=
+			    dwc_otg_pcd_handle_rx_status_q_level_intr(pcd);
+		}
+		if (gintr_status.b.nptxfempty) {
+			retval |= dwc_otg_pcd_handle_np_tx_fifo_empty_intr(pcd);
+		}
+		if (gintr_status.b.goutnakeff) {
+			retval |= dwc_otg_pcd_handle_out_nak_effective(pcd);
+		}
+		if (gintr_status.b.i2cintr) {
+			retval |= dwc_otg_pcd_handle_i2c_intr(pcd);
+		}
+		if (gintr_status.b.erlysuspend) {
+			retval |= dwc_otg_pcd_handle_early_suspend_intr(pcd);
+		}
+		if (gintr_status.b.usbreset) {
+			retval |= dwc_otg_pcd_handle_usb_reset_intr(pcd);
+		}
+		if (gintr_status.b.enumdone) {
+			retval |= dwc_otg_pcd_handle_enum_done_intr(pcd);
+		}
+		if (gintr_status.b.isooutdrop) {
+			retval |=
+			    dwc_otg_pcd_handle_isoc_out_packet_dropped_intr
+			    (pcd);
+		}
+		if (gintr_status.b.eopframe) {
+			retval |=
+			    dwc_otg_pcd_handle_end_periodic_frame_intr(pcd);
+		}
+		if (gintr_status.b.inepint) {
+			if (!core_if->multiproc_int_enable) {
+				retval |= dwc_otg_pcd_handle_in_ep_intr(pcd);
+			}
+		}
+		if (gintr_status.b.outepintr) {
+			if (!core_if->multiproc_int_enable) {
+				retval |= dwc_otg_pcd_handle_out_ep_intr(pcd);
+			}
+		}
+		if (gintr_status.b.epmismatch) {
+			retval |= dwc_otg_pcd_handle_ep_mismatch_intr(pcd);
+		}
+		if (gintr_status.b.fetsusp) {
+			retval |= dwc_otg_pcd_handle_ep_fetsusp_intr(pcd);
+		}
+		if (gintr_status.b.ginnakeff) {
+			retval |= dwc_otg_pcd_handle_in_nak_effective(pcd);
+		}
+		if (gintr_status.b.incomplisoin) {
+			retval |=
+			    dwc_otg_pcd_handle_incomplete_isoc_in_intr(pcd);
+		}
+		if (gintr_status.b.incomplisoout) {
+			retval |=
+			    dwc_otg_pcd_handle_incomplete_isoc_out_intr(pcd);
+		}
+
+		/* In MPI mode De vice Endpoints intterrupts are asserted
+		 * without setting outepintr and inepint bits set, so these
+		 * Interrupt handlers are called without checking these bit-fields
+		 */
+		if (core_if->multiproc_int_enable) {
+			retval |= dwc_otg_pcd_handle_in_ep_intr(pcd);
+			retval |= dwc_otg_pcd_handle_out_ep_intr(pcd);
+		}
+#ifdef VERBOSE
+		DWC_DEBUGPL(DBG_PCDV, "%s() gintsts=%0x\n", __func__,
+			    DWC_READ_REG32(&global_regs->gintsts));
+#endif
+		DWC_SPINUNLOCK(pcd->lock);
+	}
+	return retval;
+}
+
+#endif /* DWC_HOST_ONLY */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/.dwc_otg_pcd_intr.c.swp linux-3.0.82x/drivers/usb/gadget/dwc/driver/.dwc_otg_pcd_intr.c.swp
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diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_pcd_linux.c linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_pcd_linux.c
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_pcd_linux.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_pcd_linux.c	2017-09-23 03:42:50.238674391 +0800
@@ -0,0 +1,1325 @@
+ /* ==========================================================================
+  * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_pcd_linux.c $
+  * $Revision: #17 $
+  * $Date: 2011/05/17 $
+  * $Change: 1774110 $
+  *
+  * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+  * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+  * otherwise expressly agreed to in writing between Synopsys and you.
+  *
+  * The Software IS NOT an item of Licensed Software or Licensed Product under
+  * any End User Software License Agreement or Agreement for Licensed Product
+  * with Synopsys or any supplement thereto. You are permitted to use and
+  * redistribute this Software in source and binary forms, with or without
+  * modification, provided that redistributions of source code must retain this
+  * notice. You may not view, use, disclose, copy or distribute this file or
+  * any information contained herein except pursuant to this license grant from
+  * Synopsys. If you do not agree with this notice, including the disclaimer
+  * below, then you are not authorized to use the Software.
+  *
+  * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+  * DAMAGE.
+  * ========================================================================== */
+#ifndef DWC_HOST_ONLY
+
+/** @file
+ * This file implements the Peripheral Controller Driver.
+ *
+ * The Peripheral Controller Driver (PCD) is responsible for
+ * translating requests from the Function Driver into the appropriate
+ * actions on the DWC_otg controller. It isolates the Function Driver
+ * from the specifics of the controller by providing an API to the
+ * Function Driver.
+ *
+ * The Peripheral Controller Driver for Linux will implement the
+ * Gadget API, so that the existing Gadget drivers can be used.
+ * (Gadget Driver is the Linux terminology for a Function Driver.)
+ *
+ * The Linux Gadget API is defined in the header file
+ * <code><linux/usb_gadget.h></code>.  The USB EP operations API is
+ * defined in the structure <code>usb_ep_ops</code> and the USB
+ * Controller API is defined in the structure
+ * <code>usb_gadget_ops</code>.
+ *
+ */
+
+#include "dwc_otg_os_dep.h"
+#include "dwc_otg_pcd_if.h"
+#include "dwc_otg_pcd.h"
+#include "dwc_otg_driver.h"
+#include "dwc_otg_dbg.h"
+#include <dma-coherence.h>
+
+static struct gadget_wrapper {
+	dwc_otg_pcd_t *pcd;
+
+	struct usb_gadget gadget;
+	struct usb_gadget_driver *driver;
+
+	struct usb_ep ep0;
+	struct usb_ep in_ep[16];
+	struct usb_ep out_ep[16];
+
+} *gadget_wrapper;
+
+/* Display the contents of the buffer */
+extern void dump_msg(const u8 * buf, unsigned int length);
+/**
+ * Get the dwc_otg_pcd_ep_t* from usb_ep* pointer - NULL in case
+ * if the endpoint is not found
+ */
+static struct dwc_otg_pcd_ep *ep_from_handle(dwc_otg_pcd_t * pcd, void *handle)
+{
+	int i;
+	if (pcd->ep0.priv == handle) {
+		return &pcd->ep0;
+	}
+
+	for (i = 0; i < MAX_EPS_CHANNELS - 1; i++) {
+		if (pcd->in_ep[i].priv == handle)
+			return &pcd->in_ep[i];
+		if (pcd->out_ep[i].priv == handle)
+			return &pcd->out_ep[i];
+	}
+
+	return NULL;
+}
+
+/* USB Endpoint Operations */
+/*
+ * The following sections briefly describe the behavior of the Gadget
+ * API endpoint operations implemented in the DWC_otg driver
+ * software. Detailed descriptions of the generic behavior of each of
+ * these functions can be found in the Linux header file
+ * include/linux/usb_gadget.h.
+ *
+ * The Gadget API provides wrapper functions for each of the function
+ * pointers defined in usb_ep_ops. The Gadget Driver calls the wrapper
+ * function, which then calls the underlying PCD function. The
+ * following sections are named according to the wrapper
+ * functions. Within each section, the corresponding DWC_otg PCD
+ * function name is specified.
+ *
+ */
+
+/**
+ * This function is called by the Gadget Driver for each EP to be
+ * configured for the current configuration (SET_CONFIGURATION).
+ *
+ * This function initializes the dwc_otg_ep_t data structure, and then
+ * calls dwc_otg_ep_activate.
+ */
+static int ep_enable(struct usb_ep *usb_ep,
+		     const struct usb_endpoint_descriptor *ep_desc)
+{
+	int retval;
+
+	DWC_DEBUGPL(DBG_PCDV, "%s(%p,%p)\n", __func__, usb_ep, ep_desc);
+
+	if (!usb_ep || !ep_desc || ep_desc->bDescriptorType != USB_DT_ENDPOINT) {
+		DWC_WARN("%s, bad ep or descriptor\n", __func__);
+		return -EINVAL;
+	}
+	if (usb_ep == &gadget_wrapper->ep0) {
+		DWC_WARN("%s, bad ep(0)\n", __func__);
+		return -EINVAL;
+	}
+
+	/* Check FIFO size? */
+	if (!ep_desc->wMaxPacketSize) {
+		DWC_WARN("%s, bad %s maxpacket\n", __func__, usb_ep->name);
+		return -ERANGE;
+	}
+
+	if (!gadget_wrapper->driver ||
+	    gadget_wrapper->gadget.speed == USB_SPEED_UNKNOWN) {
+		DWC_WARN("%s, bogus device state\n", __func__);
+		return -ESHUTDOWN;
+	}
+
+	/* Delete after check - MAS */
+#if 0
+	nat = (uint32_t) ep_desc->wMaxPacketSize;
+	printk(KERN_ALERT "%s: nat (before) =%d\n", __func__, nat);
+	nat = (nat >> 11) & 0x03;
+	printk(KERN_ALERT "%s: nat (after) =%d\n", __func__, nat);
+#endif
+	retval = dwc_otg_pcd_ep_enable(gadget_wrapper->pcd,
+				       (const uint8_t *)ep_desc,
+				       (void *)usb_ep);
+	if (retval) {
+		DWC_WARN("dwc_otg_pcd_ep_enable failed\n");
+		return -EINVAL;
+	}
+
+	usb_ep->maxpacket = le16_to_cpu(ep_desc->wMaxPacketSize);
+
+	return 0;
+}
+
+/**
+ * This function is called when an EP is disabled due to disconnect or
+ * change in configuration. Any pending requests will terminate with a
+ * status of -ESHUTDOWN.
+ *
+ * This function modifies the dwc_otg_ep_t data structure for this EP,
+ * and then calls dwc_otg_ep_deactivate.
+ */
+static int ep_disable(struct usb_ep *usb_ep)
+{
+	int retval;
+
+	DWC_DEBUGPL(DBG_PCDV, "%s(%p)\n", __func__, usb_ep);
+	if (!usb_ep) {
+		DWC_DEBUGPL(DBG_PCD, "%s, %s not enabled\n", __func__,
+			    usb_ep ? usb_ep->name : NULL);
+		return -EINVAL;
+	}
+
+	retval = dwc_otg_pcd_ep_disable(gadget_wrapper->pcd, usb_ep);
+	if (retval) {
+		retval = -EINVAL;
+	}
+
+	return retval;
+}
+
+/**
+ * This function allocates a request object to use with the specified
+ * endpoint.
+ *
+ * @param ep The endpoint to be used with with the request
+ * @param gfp_flags the GFP_* flags to use.
+ */
+static struct usb_request *dwc_otg_pcd_alloc_request(struct usb_ep *ep,
+						     gfp_t gfp_flags)
+{
+	struct usb_request *usb_req;
+
+	DWC_DEBUGPL(DBG_PCDV, "%s(%p,%d)\n", __func__, ep, gfp_flags);
+	if (0 == ep) {
+		DWC_WARN("%s() %s\n", __func__, "Invalid EP!\n");
+		return 0;
+	}
+	usb_req = kmalloc(sizeof(*usb_req), gfp_flags);
+	if (0 == usb_req) {
+		DWC_WARN("%s() %s\n", __func__, "request allocation failed!\n");
+		return 0;
+	}
+	memset(usb_req, 0, sizeof(*usb_req));
+	usb_req->dma = DWC_DMA_ADDR_INVALID;
+
+	return usb_req;
+}
+
+/**
+ * This function frees a request object.
+ *
+ * @param ep The endpoint associated with the request
+ * @param req The request being freed
+ */
+static void dwc_otg_pcd_free_request(struct usb_ep *ep, struct usb_request *req)
+{
+	DWC_DEBUGPL(DBG_PCDV, "%s(%p,%p)\n", __func__, ep, req);
+
+	if (0 == ep || 0 == req) {
+		DWC_WARN("%s() %s\n", __func__,
+			 "Invalid ep or req argument!\n");
+		return;
+	}
+
+	kfree(req);
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28)
+/**
+ * This function allocates an I/O buffer to be used for a transfer
+ * to/from the specified endpoint.
+ *
+ * @param usb_ep The endpoint to be used with with the request
+ * @param bytes The desired number of bytes for the buffer
+ * @param dma Pointer to the buffer's DMA address; must be valid
+ * @param gfp_flags the GFP_* flags to use.
+ * @return address of a new buffer or null is buffer could not be allocated.
+ */
+static void *dwc_otg_pcd_alloc_buffer(struct usb_ep *usb_ep, unsigned bytes,
+				      dma_addr_t * dma, gfp_t gfp_flags)
+{
+	void *buf;
+	dwc_otg_pcd_t *pcd = 0;
+
+	pcd = gadget_wrapper->pcd;
+
+	DWC_DEBUGPL(DBG_PCDV, "%s(%p,%d,%p,%0x)\n", __func__, usb_ep, bytes,
+		    dma, gfp_flags);
+
+	/* Check dword alignment */
+	if ((bytes & 0x3UL) != 0) {
+		DWC_WARN("%s() Buffer size is not a multiple of"
+			 "DWORD size (%d)", __func__, bytes);
+	}
+
+	buf = dma_alloc_coherent(NULL, bytes, dma, gfp_flags);
+
+	/* Check dword alignment */
+	if (((int)buf & 0x3UL) != 0) {
+		DWC_WARN("%s() Buffer is not DWORD aligned (%p)",
+			 __func__, buf);
+	}
+
+	return buf;
+}
+
+/**
+ * This function frees an I/O buffer that was allocated by alloc_buffer.
+ *
+ * @param usb_ep the endpoint associated with the buffer
+ * @param buf address of the buffer
+ * @param dma The buffer's DMA address
+ * @param bytes The number of bytes of the buffer
+ */
+static void dwc_otg_pcd_free_buffer(struct usb_ep *usb_ep, void *buf,
+				    dma_addr_t dma, unsigned bytes)
+{
+	dwc_otg_pcd_t *pcd = 0;
+
+	pcd = gadget_wrapper->pcd;
+
+	DWC_DEBUGPL(DBG_PCDV, "%s(%p,%0x,%d)\n", __func__, buf, dma, bytes);
+
+	dma_free_coherent(NULL, bytes, buf, dma);
+}
+#endif
+
+/**
+ * This function is used to submit an I/O Request to an EP.
+ *
+ *	- When the request completes the request's completion callback
+ *	  is called to return the request to the driver.
+ *	- An EP, except control EPs, may have multiple requests
+ *	  pending.
+ *	- Once submitted the request cannot be examined or modified.
+ *	- Each request is turned into one or more packets.
+ *	- A BULK EP can queue any amount of data; the transfer is
+ *	  packetized.
+ *	- Zero length Packets are specified with the request 'zero'
+ *	  flag.
+ */
+static int ep_queue(struct usb_ep *usb_ep, struct usb_request *usb_req,
+		    gfp_t gfp_flags)
+{
+	dwc_otg_pcd_t *pcd;
+	struct dwc_otg_pcd_ep *ep = NULL;
+	int retval = 0, is_isoc_ep = 0;
+	dma_addr_t dma_addr = DWC_DMA_ADDR_INVALID;
+
+	DWC_DEBUGPL(DBG_PCDV, "%s(%p,%p,%d)\n",
+		    __func__, usb_ep, usb_req, gfp_flags);
+
+	if (!usb_req || !usb_req->complete || !usb_req->buf) {
+		DWC_WARN("bad params\n");
+		return -EINVAL;
+	}
+
+	if (!usb_ep) {
+		DWC_WARN("bad ep\n");
+		return -EINVAL;
+	}
+
+	pcd = gadget_wrapper->pcd;
+	if (!gadget_wrapper->driver ||
+	    gadget_wrapper->gadget.speed == USB_SPEED_UNKNOWN) {
+		DWC_DEBUGPL(DBG_PCDV, "gadget.speed=%d\n",
+			    gadget_wrapper->gadget.speed);
+		DWC_WARN("bogus device state\n");
+		return -ESHUTDOWN;
+	}
+
+	DWC_DEBUGPL(DBG_PCD, "%s queue req %p, len %d buf %p\n",
+		    usb_ep->name, usb_req, usb_req->length, usb_req->buf);
+
+	usb_req->status = -EINPROGRESS;
+	usb_req->actual = 0;
+
+	ep = ep_from_handle(pcd, usb_ep);
+	if (ep == NULL)
+		is_isoc_ep = 0;
+	else
+		is_isoc_ep = (ep->dwc_ep.type == DWC_OTG_EP_TYPE_ISOC) ? 1 : 0;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28)
+	dma_addr = usb_req->dma;
+#else
+#ifdef LM_INTERFACE
+	struct lm_device *dev = gadget_wrapper->pcd->otg_dev->os_dep.lmdev;
+	if (GET_CORE_IF(pcd)->dma_enable) {
+		if (usb_req->length != 0 /*&& usb_req->dma == DWC_DMA_ADDR_INVALID*/) {
+			usb_req->dma = dma_addr = dma_map_single(&dev->dev, usb_req->buf, usb_req->length, 
+					ep->dwc_ep.is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
+		}
+	}
+#else
+	if (GET_CORE_IF(pcd)->dma_enable) {
+		struct pci_dev *dev = gadget_wrapper->pcd->otg_dev->os_dep.pcidev;
+		if (usb_req->length != 0 && usb_req->dma == DWC_DMA_ADDR_INVALID) {
+			dma_addr = pci_map_single(dev, usb_req->buf, usb_req->length, 
+					ep->dwc_ep.is_in ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
+		}
+	}
+#endif
+#endif
+
+#ifdef DWC_UTE_PER_IO
+	if (is_isoc_ep == 1) {
+		retval = dwc_otg_pcd_xiso_ep_queue(pcd, usb_ep, usb_req->buf, dma_addr,
+			usb_req->length, usb_req->zero, usb_req,
+			gfp_flags == GFP_ATOMIC ? 1 : 0, &usb_req->ext_req);
+		if (retval)
+			return -EINVAL;
+
+		return 0;
+	}
+#endif
+	retval = dwc_otg_pcd_ep_queue(pcd, usb_ep, usb_req->buf, dma_addr,
+				      usb_req->length, usb_req->zero, usb_req,
+				      gfp_flags == GFP_ATOMIC ? 1 : 0);
+	if (retval) {
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+/**
+ * This function cancels an I/O request from an EP.
+ */
+static int ep_dequeue(struct usb_ep *usb_ep, struct usb_request *usb_req)
+{
+	DWC_DEBUGPL(DBG_PCDV, "%s(%p,%p)\n", __func__, usb_ep, usb_req);
+
+	if (!usb_ep || !usb_req) {
+		DWC_WARN("bad argument\n");
+		return -EINVAL;
+	}
+	if (!gadget_wrapper->driver ||
+	    gadget_wrapper->gadget.speed == USB_SPEED_UNKNOWN) {
+		DWC_WARN("bogus device state\n");
+		return -ESHUTDOWN;
+	}
+	if (dwc_otg_pcd_ep_dequeue(gadget_wrapper->pcd, usb_ep, usb_req)) {
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+/**
+ * usb_ep_set_halt stalls an endpoint.
+ *
+ * usb_ep_clear_halt clears an endpoint halt and resets its data
+ * toggle.
+ *
+ * Both of these functions are implemented with the same underlying
+ * function. The behavior depends on the value argument.
+ *
+ * @param[in] usb_ep the Endpoint to halt or clear halt.
+ * @param[in] value
+ *	- 0 means clear_halt.
+ *	- 1 means set_halt,
+ *	- 2 means clear stall lock flag.
+ *	- 3 means set  stall lock flag.
+ */
+static int ep_halt(struct usb_ep *usb_ep, int value)
+{
+	int retval = 0;
+
+	DWC_DEBUGPL(DBG_PCD, "HALT %s %d\n", usb_ep->name, value);
+
+	if (!usb_ep) {
+		DWC_WARN("bad ep\n");
+		return -EINVAL;
+	}
+
+	retval = dwc_otg_pcd_ep_halt(gadget_wrapper->pcd, usb_ep, value);
+	if (retval == -DWC_E_AGAIN) {
+		return -EAGAIN;
+	} else if (retval) {
+		retval = -EINVAL;
+	}
+
+	return retval;
+}
+
+#ifdef DWC_EN_ISOC
+/**
+ * This function is used to submit an ISOC Transfer Request to an EP.
+ *
+ *	- Every time a sync period completes the request's completion callback
+ *	  is called to provide data to the gadget driver.
+ *	- Once submitted the request cannot be modified.
+ *	- Each request is turned into periodic data packets untill ISO
+ *	  Transfer is stopped..
+ */
+static int iso_ep_start(struct usb_ep *usb_ep, struct usb_iso_request *req,
+			gfp_t gfp_flags)
+{
+	int retval = 0;
+
+	if (!req || !req->process_buffer || !req->buf0 || !req->buf1) {
+		DWC_WARN("bad params\n");
+		return -EINVAL;
+	}
+
+	if (!usb_ep) {
+		DWC_PRINTF("bad params\n");
+		return -EINVAL;
+	}
+
+	req->status = -EINPROGRESS;
+
+	retval =
+	    dwc_otg_pcd_iso_ep_start(gadget_wrapper->pcd, usb_ep, req->buf0,
+				     req->buf1, req->dma0, req->dma1,
+				     req->sync_frame, req->data_pattern_frame,
+				     req->data_per_frame,
+				     req->flags & USB_REQ_ISO_ASAP ? -1 : req->
+				     start_frame, req->buf_proc_intrvl, req,
+				     gfp_flags == GFP_ATOMIC ? 1 : 0);
+
+	if (retval) {
+		return -EINVAL;
+	}
+
+	return retval;
+}
+
+/**
+ * This function stops ISO EP Periodic Data Transfer.
+ */
+static int iso_ep_stop(struct usb_ep *usb_ep, struct usb_iso_request *req)
+{
+	int retval = 0;
+	if (!usb_ep) {
+		DWC_WARN("bad ep\n");
+	}
+
+	if (!gadget_wrapper->driver ||
+	    gadget_wrapper->gadget.speed == USB_SPEED_UNKNOWN) {
+		DWC_DEBUGPL(DBG_PCDV, "gadget.speed=%d\n",
+			    gadget_wrapper->gadget.speed);
+		DWC_WARN("bogus device state\n");
+	}
+
+	dwc_otg_pcd_iso_ep_stop(gadget_wrapper->pcd, usb_ep, req);
+	if (retval) {
+		retval = -EINVAL;
+	}
+
+	return retval;
+}
+
+static struct usb_iso_request *alloc_iso_request(struct usb_ep *ep,
+						 int packets, gfp_t gfp_flags)
+{
+	struct usb_iso_request *pReq = NULL;
+	uint32_t req_size;
+
+	req_size = sizeof(struct usb_iso_request);
+	req_size +=
+	    (2 * packets * (sizeof(struct usb_gadget_iso_packet_descriptor)));
+
+	pReq = kmalloc(req_size, gfp_flags);
+	if (!pReq) {
+		DWC_WARN("Can't allocate Iso Request\n");
+		return 0;
+	}
+	pReq->iso_packet_desc0 = (void *)(pReq + 1);
+
+	pReq->iso_packet_desc1 = pReq->iso_packet_desc0 + packets;
+
+	return pReq;
+}
+
+static void free_iso_request(struct usb_ep *ep, struct usb_iso_request *req)
+{
+	kfree(req);
+}
+
+static struct usb_isoc_ep_ops dwc_otg_pcd_ep_ops = {
+	.ep_ops = {
+		   .enable = ep_enable,
+		   .disable = ep_disable,
+
+		   .alloc_request = dwc_otg_pcd_alloc_request,
+		   .free_request = dwc_otg_pcd_free_request,
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28)
+		   .alloc_buffer = dwc_otg_pcd_alloc_buffer,
+		   .free_buffer = dwc_otg_pcd_free_buffer,
+#endif
+
+		   .queue = ep_queue,
+		   .dequeue = ep_dequeue,
+
+		   .set_halt = ep_halt,
+		   .fifo_status = 0,
+		   .fifo_flush = 0,
+		   },
+	.iso_ep_start = iso_ep_start,
+	.iso_ep_stop = iso_ep_stop,
+	.alloc_iso_request = alloc_iso_request,
+	.free_iso_request = free_iso_request,
+};
+
+#else
+
+static struct usb_ep_ops dwc_otg_pcd_ep_ops = {
+	.enable = ep_enable,
+	.disable = ep_disable,
+
+	.alloc_request = dwc_otg_pcd_alloc_request,
+	.free_request = dwc_otg_pcd_free_request,
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28)
+	.alloc_buffer = dwc_otg_pcd_alloc_buffer,
+	.free_buffer = dwc_otg_pcd_free_buffer,
+#endif
+
+	.queue = ep_queue,
+	.dequeue = ep_dequeue,
+
+	.set_halt = ep_halt,
+	.fifo_status = 0,
+	.fifo_flush = 0,
+
+};
+
+#endif /* _EN_ISOC_ */
+/*	Gadget Operations */
+/**
+ * The following gadget operations will be implemented in the DWC_otg
+ * PCD. Functions in the API that are not described below are not
+ * implemented.
+ *
+ * The Gadget API provides wrapper functions for each of the function
+ * pointers defined in usb_gadget_ops. The Gadget Driver calls the
+ * wrapper function, which then calls the underlying PCD function. The
+ * following sections are named according to the wrapper functions
+ * (except for ioctl, which doesn't have a wrapper function). Within
+ * each section, the corresponding DWC_otg PCD function name is
+ * specified.
+ *
+ */
+
+/**
+ *Gets the USB Frame number of the last SOF.
+ */
+static int get_frame_number(struct usb_gadget *gadget)
+{
+	struct gadget_wrapper *d;
+
+	DWC_DEBUGPL(DBG_PCDV, "%s(%p)\n", __func__, gadget);
+
+	if (gadget == 0) {
+		return -ENODEV;
+	}
+
+	d = container_of(gadget, struct gadget_wrapper, gadget);
+	return dwc_otg_pcd_get_frame_number(d->pcd);
+}
+
+#ifdef CONFIG_USB_DWC_OTG_LPM
+static int test_lpm_enabled(struct usb_gadget *gadget)
+{
+	struct gadget_wrapper *d;
+
+	d = container_of(gadget, struct gadget_wrapper, gadget);
+
+	return dwc_otg_pcd_is_lpm_enabled(d->pcd);
+}
+#endif
+
+/**
+ * Initiates Session Request Protocol (SRP) to wakeup the host if no
+ * session is in progress. If a session is already in progress, but
+ * the device is suspended, remote wakeup signaling is started.
+ *
+ */
+static int wakeup(struct usb_gadget *gadget)
+{
+	struct gadget_wrapper *d;
+
+	DWC_DEBUGPL(DBG_PCDV, "%s(%p)\n", __func__, gadget);
+
+	if (gadget == 0) {
+		return -ENODEV;
+	} else {
+		d = container_of(gadget, struct gadget_wrapper, gadget);
+	}
+	dwc_otg_pcd_wakeup(d->pcd);
+	return 0;
+}
+
+static const struct usb_gadget_ops dwc_otg_pcd_ops = {
+	.get_frame = get_frame_number,
+	.wakeup = wakeup,
+#ifdef CONFIG_USB_DWC_OTG_LPM
+	.lpm_support = test_lpm_enabled,
+#endif
+	// current versions must always be self-powered
+};
+
+static int _setup(dwc_otg_pcd_t * pcd, uint8_t * bytes)
+{
+	int retval = -DWC_E_NOT_SUPPORTED;
+	if (gadget_wrapper->driver && gadget_wrapper->driver->setup) {
+		retval = gadget_wrapper->driver->setup(&gadget_wrapper->gadget,
+						       (struct usb_ctrlrequest
+							*)bytes);
+	}
+
+	if (retval == -ENOTSUPP) {
+		retval = -DWC_E_NOT_SUPPORTED;
+	} else if (retval < 0) {
+		retval = -DWC_E_INVALID;
+	}
+
+	return retval;
+}
+
+#ifdef DWC_EN_ISOC
+static int _isoc_complete(dwc_otg_pcd_t * pcd, void *ep_handle,
+			  void *req_handle, int proc_buf_num)
+{
+	int i, packet_count;
+	struct usb_gadget_iso_packet_descriptor *iso_packet = 0;
+	struct usb_iso_request *iso_req = req_handle;
+
+	if (proc_buf_num) {
+		iso_packet = iso_req->iso_packet_desc1;
+	} else {
+		iso_packet = iso_req->iso_packet_desc0;
+	}
+	packet_count =
+	    dwc_otg_pcd_get_iso_packet_count(pcd, ep_handle, req_handle);
+	for (i = 0; i < packet_count; ++i) {
+		int status;
+		int actual;
+		int offset;
+		dwc_otg_pcd_get_iso_packet_params(pcd, ep_handle, req_handle,
+						  i, &status, &actual, &offset);
+		switch (status) {
+		case -DWC_E_NO_DATA:
+			status = -ENODATA;
+			break;
+		default:
+			if (status) {
+				DWC_PRINTF("unknown status in isoc packet\n");
+			}
+
+		}
+		iso_packet[i].status = status;
+		iso_packet[i].offset = offset;
+		iso_packet[i].actual_length = actual;
+	}
+
+	iso_req->status = 0;
+	iso_req->process_buffer(ep_handle, iso_req);
+
+	return 0;
+}
+#endif /* DWC_EN_ISOC */
+
+#ifdef DWC_UTE_PER_IO
+/**
+ * Copy the contents of the extended request to the Linux usb_request's
+ * extended part and call the gadget's completion.
+ *
+ * @param pcd			Pointer to the pcd structure
+ * @param ep_handle		Void pointer to the usb_ep structure
+ * @param req_handle	Void pointer to the usb_request structure
+ * @param status		Request status returned from the portable logic
+ * @param ereq_port		Void pointer to the extended request structure
+ *						created in the the portable part that contains the
+ *						results of the processed iso packets.
+ */
+static int _xisoc_complete(dwc_otg_pcd_t * pcd, void *ep_handle,
+			   void *req_handle, int32_t status, void *ereq_port)
+{
+	struct dwc_ute_iso_req_ext *ereqorg = NULL;
+	struct dwc_iso_xreq_port *ereqport = NULL;
+	struct dwc_ute_iso_packet_descriptor *desc_org = NULL;
+	int i;
+	struct usb_request *req;
+	//struct dwc_ute_iso_packet_descriptor *
+	//int status = 0;
+
+	req = (struct usb_request *)req_handle;
+	ereqorg = &req->ext_req;
+	ereqport = (struct dwc_iso_xreq_port *)ereq_port;
+	desc_org = ereqorg->per_io_frame_descs;
+
+	if (req && req->complete) {
+		/* Copy the request data from the portable logic to our request */
+		for (i = 0; i < ereqport->pio_pkt_count; i++) {
+			desc_org[i].actual_length =
+			    ereqport->per_io_frame_descs[i].actual_length;
+			desc_org[i].status =
+			    ereqport->per_io_frame_descs[i].status;
+		}
+
+		switch (status) {
+		case -DWC_E_SHUTDOWN:
+			req->status = -ESHUTDOWN;
+			break;
+		case -DWC_E_RESTART:
+			req->status = -ECONNRESET;
+			break;
+		case -DWC_E_INVALID:
+			req->status = -EINVAL;
+			break;
+		case -DWC_E_TIMEOUT:
+			req->status = -ETIMEDOUT;
+			break;
+		default:
+			req->status = status;
+		}
+
+		/* And call the gadget's completion */
+		req->complete(ep_handle, req);
+	}
+
+	return 0;
+}
+#endif /* DWC_UTE_PER_IO */
+static int _complete(dwc_otg_pcd_t * pcd, void *ep_handle,
+		     void *req_handle, int32_t status, uint32_t actual)
+{
+	struct usb_request *req = (struct usb_request *)req_handle;
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,27)
+	struct dwc_otg_pcd_ep *ep = NULL;
+#endif
+#ifdef PCI_INTERFACE
+	struct pci_dev *dev = NULL;
+#endif
+
+	if (req && req->complete) {
+		switch (status) {
+		case -DWC_E_SHUTDOWN:
+			req->status = -ESHUTDOWN;
+			break;
+		case -DWC_E_RESTART:
+			req->status = -ECONNRESET;
+			break;
+		case -DWC_E_INVALID:
+			req->status = -EINVAL;
+			break;
+		case -DWC_E_TIMEOUT:
+			req->status = -ETIMEDOUT;
+			break;
+		default:
+			req->status = status;
+
+		}
+#ifdef LM_INTERFACE
+	struct lm_device *dev = gadget_wrapper->pcd->otg_dev->os_dep.lmdev;
+	ep = ep_from_handle(pcd, ep_handle);
+			dma_unmap_single(&dev->dev, req->dma, req->length,
+					 ep->dwc_ep.
+					 is_in ? DMA_TO_DEVICE :
+					 DMA_FROM_DEVICE);
+#elif PCI_INTERFACE
+	dev = gadget_wrapper->pcd->otg_dev->os_dep.pcidev;
+	ep = ep_from_handle(pcd, ep_handle);
+	if (GET_CORE_IF(pcd)->dma_enable) {
+		if (req->length != 0)
+			pci_unmap_single(dev, req->dma, req->length,
+					 ep->dwc_ep.
+					 is_in ? PCI_DMA_TODEVICE :
+					 PCI_DMA_FROMDEVICE);
+	}
+#endif
+
+		req->actual = actual;
+		DWC_SPINUNLOCK(pcd->lock);
+		req->complete(ep_handle, req);
+		DWC_SPINLOCK(pcd->lock);
+	}
+
+	return 0;
+}
+
+static int _connect(dwc_otg_pcd_t * pcd, int speed)
+{
+	gadget_wrapper->gadget.speed = speed;
+	return 0;
+}
+
+static int _disconnect(dwc_otg_pcd_t * pcd)
+{
+	if (gadget_wrapper->driver && gadget_wrapper->driver->disconnect) {
+		gadget_wrapper->driver->disconnect(&gadget_wrapper->gadget);
+	}
+	return 0;
+}
+
+static int _resume(dwc_otg_pcd_t * pcd)
+{
+	if (gadget_wrapper->driver && gadget_wrapper->driver->resume) {
+		gadget_wrapper->driver->resume(&gadget_wrapper->gadget);
+	}
+
+	return 0;
+}
+
+static int _suspend(dwc_otg_pcd_t * pcd)
+{
+	if (gadget_wrapper->driver && gadget_wrapper->driver->suspend) {
+		gadget_wrapper->driver->suspend(&gadget_wrapper->gadget);
+	}
+	return 0;
+}
+
+/**
+ * This function updates the otg values in the gadget structure.
+ */
+static int _hnp_changed(dwc_otg_pcd_t * pcd)
+{
+
+	if (!gadget_wrapper->gadget.is_otg)
+		return 0;
+
+	gadget_wrapper->gadget.b_hnp_enable = get_b_hnp_enable(pcd);
+	gadget_wrapper->gadget.a_hnp_support = get_a_hnp_support(pcd);
+	gadget_wrapper->gadget.a_alt_hnp_support = get_a_alt_hnp_support(pcd);
+	return 0;
+}
+
+static int _reset(dwc_otg_pcd_t * pcd)
+{
+	return 0;
+}
+
+#ifdef DWC_UTE_CFI
+static int _cfi_setup(dwc_otg_pcd_t * pcd, void *cfi_req)
+{
+	int retval = -DWC_E_INVALID;
+	if (gadget_wrapper->driver->cfi_feature_setup) {
+		retval =
+		    gadget_wrapper->driver->
+		    cfi_feature_setup(&gadget_wrapper->gadget,
+				      (struct cfi_usb_ctrlrequest *)cfi_req);
+	}
+
+	return retval;
+}
+#endif
+
+static const struct dwc_otg_pcd_function_ops fops = {
+	.complete = _complete,
+#ifdef DWC_EN_ISOC
+	.isoc_complete = _isoc_complete,
+#endif
+	.setup = _setup,
+	.disconnect = _disconnect,
+	.connect = _connect,
+	.resume = _resume,
+	.suspend = _suspend,
+	.hnp_changed = _hnp_changed,
+	.reset = _reset,
+#ifdef DWC_UTE_CFI
+	.cfi_setup = _cfi_setup,
+#endif
+#ifdef DWC_UTE_PER_IO
+	.xisoc_complete = _xisoc_complete,
+#endif
+};
+
+/**
+ * This function is the top level PCD interrupt handler.
+ */
+static irqreturn_t dwc_otg_pcd_irq(int irq, void *dev)
+{
+	dwc_otg_pcd_t *pcd = dev;
+	int32_t retval = IRQ_NONE;
+
+	retval = dwc_otg_pcd_handle_intr(pcd);
+	if (retval != 0) {
+		S3C2410X_CLEAR_EINTPEND();
+	}
+	return IRQ_RETVAL(retval);
+}
+
+/**
+ * This function initialized the usb_ep structures to there default
+ * state.
+ *
+ * @param d Pointer on gadget_wrapper.
+ */
+void gadget_add_eps(struct gadget_wrapper *d)
+{
+	static const char *names[] = {
+
+		"ep0",
+		"ep1in",
+		"ep2in",
+		"ep3in",
+		"ep4in",
+		"ep5in",
+		"ep6in",
+		"ep7in",
+		"ep8in",
+		"ep9in",
+		"ep10in",
+		"ep11in",
+		"ep12in",
+		"ep13in",
+		"ep14in",
+		"ep15in",
+		"ep1out",
+		"ep2out",
+		"ep3out",
+		"ep4out",
+		"ep5out",
+		"ep6out",
+		"ep7out",
+		"ep8out",
+		"ep9out",
+		"ep10out",
+		"ep11out",
+		"ep12out",
+		"ep13out",
+		"ep14out",
+		"ep15out"
+	};
+
+	int i;
+	struct usb_ep *ep;
+	int8_t dev_endpoints;
+
+	DWC_DEBUGPL(DBG_PCDV, "%s\n", __func__);
+
+	INIT_LIST_HEAD(&d->gadget.ep_list);
+	d->gadget.ep0 = &d->ep0;
+	d->gadget.speed = USB_SPEED_UNKNOWN;
+
+	INIT_LIST_HEAD(&d->gadget.ep0->ep_list);
+
+	/**
+	 * Initialize the EP0 structure.
+	 */
+	ep = &d->ep0;
+
+	/* Init the usb_ep structure. */
+	ep->name = names[0];
+	ep->ops = (struct usb_ep_ops *)&dwc_otg_pcd_ep_ops;
+
+	/**
+	 * @todo NGS: What should the max packet size be set to
+	 * here?  Before EP type is set?
+	 */
+	ep->maxpacket = MAX_PACKET_SIZE;
+	dwc_otg_pcd_ep_enable(d->pcd, NULL, ep);
+
+	list_add_tail(&ep->ep_list, &d->gadget.ep_list);
+
+	/**
+	 * Initialize the EP structures.
+	 */
+	dev_endpoints = d->pcd->core_if->dev_if->num_in_eps;
+	printk ("lxy: in_ep's num = %d !\n", dev_endpoints);
+
+	for (i = 0; i < dev_endpoints; i++) {
+		ep = &d->in_ep[i];
+
+		/* Init the usb_ep structure. */
+		ep->name = names[d->pcd->in_ep[i].dwc_ep.num];
+		ep->ops = (struct usb_ep_ops *)&dwc_otg_pcd_ep_ops;
+
+		/**
+		 * @todo NGS: What should the max packet size be set to
+		 * here?  Before EP type is set?
+		 */
+		ep->maxpacket = MAX_PACKET_SIZE;
+		list_add_tail(&ep->ep_list, &d->gadget.ep_list);
+	}
+
+	dev_endpoints = d->pcd->core_if->dev_if->num_out_eps;
+	printk ("lxy: out_ep's num = %d !\n", dev_endpoints);
+
+	for (i = 0; i < dev_endpoints; i++) {
+		ep = &d->out_ep[i];
+
+		/* Init the usb_ep structure. */
+		ep->name = names[15 + d->pcd->out_ep[i].dwc_ep.num];
+		ep->ops = (struct usb_ep_ops *)&dwc_otg_pcd_ep_ops;
+
+		/**
+		 * @todo NGS: What should the max packet size be set to
+		 * here?  Before EP type is set?
+		 */
+		ep->maxpacket = MAX_PACKET_SIZE;
+
+		list_add_tail(&ep->ep_list, &d->gadget.ep_list);
+	}
+
+	/* remove ep0 from the list.  There is a ep0 pointer. */
+	list_del_init(&d->ep0.ep_list);
+
+	d->ep0.maxpacket = MAX_EP0_SIZE;
+}
+
+/**
+ * This function releases the Gadget device.
+ * required by device_unregister().
+ *
+ * @todo Should this do something?	Should it free the PCD?
+ */
+static void dwc_otg_pcd_gadget_release(struct device *dev)
+{
+	DWC_DEBUGPL(DBG_PCDV, "%s(%p)\n", __func__, dev);
+}
+
+static struct gadget_wrapper *alloc_wrapper(
+#ifdef LM_INTERFACE
+	struct lm_device *_dev
+#elif  defined(PCI_INTERFACE)
+	struct pci_dev *_dev
+#endif
+    )
+{
+	static char pcd_name[] = "dwc_otg_pcd";
+#ifdef LM_INTERFACE
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(_dev);
+#elif defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = pci_get_drvdata(_dev);
+#endif
+
+	struct gadget_wrapper *d;
+	int retval;
+
+	d = DWC_ALLOC(sizeof(*d));
+	if (d == NULL) {
+		return NULL;
+	}
+
+	memset(d, 0, sizeof(*d));
+
+	d->gadget.name = pcd_name;
+	d->pcd = otg_dev->pcd;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)
+	strcpy(d->gadget.dev.bus_id, "gadget");
+#else
+	dev_set_name(&d->gadget.dev, "%s", "gadget");
+#endif
+
+	d->gadget.dev.parent = &_dev->dev;
+	d->gadget.dev.release = dwc_otg_pcd_gadget_release;
+	d->gadget.ops = &dwc_otg_pcd_ops;
+	d->gadget.is_dualspeed = dwc_otg_pcd_is_dualspeed(otg_dev->pcd);
+	d->gadget.is_otg = dwc_otg_pcd_is_otg(otg_dev->pcd);
+
+	d->driver = 0;
+	/* Register the gadget device */
+	retval = device_register(&d->gadget.dev);
+	if (retval != 0) {
+		DWC_ERROR("device_register failed\n");
+		DWC_FREE(d);
+		return NULL;
+	}
+
+	return d;
+}
+
+static void free_wrapper(struct gadget_wrapper *d)
+{
+	if (d->driver) {
+		/* should have been done already by driver model core */
+		DWC_WARN("driver '%s' is still registered\n",
+			 d->driver->driver.name);
+		usb_gadget_unregister_driver(d->driver);
+	}
+
+	device_unregister(&d->gadget.dev);
+	DWC_FREE(d);
+}
+
+/**
+ * This function initialized the PCD portion of the driver.
+ *
+ */
+int pcd_init(
+#ifdef LM_INTERFACE
+	struct lm_device *_dev
+#elif  defined(PCI_INTERFACE)
+	struct pci_dev *_dev
+#endif
+    )
+{
+#ifdef LM_INTERFACE
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(_dev);
+#elif  defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = pci_get_drvdata(_dev);
+#endif
+
+	int retval = 0;
+
+	DWC_DEBUGPL(DBG_PCDV, "%s(%p)\n", __func__, _dev);
+
+	otg_dev->pcd = dwc_otg_pcd_init(otg_dev->core_if);
+
+	if (!otg_dev->pcd) {
+		DWC_ERROR("dwc_otg_pcd_init failed\n");
+		return -ENOMEM;
+	}
+
+	otg_dev->pcd->otg_dev = otg_dev;
+	gadget_wrapper = alloc_wrapper(_dev);
+
+	/*
+	 * Initialize EP structures
+	 */
+	gadget_add_eps(gadget_wrapper);
+	/*
+	 * Setup interupt handler
+	 */
+	DWC_DEBUGPL(DBG_ANY, "registering handler for irq%d\n", _dev->irq);
+	retval = request_irq(_dev->irq, dwc_otg_pcd_irq,
+			     IRQF_SHARED | IRQF_DISABLED,
+			     gadget_wrapper->gadget.name, otg_dev->pcd);
+	if (retval != 0) {
+		DWC_ERROR("request of irq%d failed\n", _dev->irq);
+		free_wrapper(gadget_wrapper);
+		return -EBUSY;
+	}
+
+	dwc_otg_pcd_start(gadget_wrapper->pcd, &fops);
+
+	return retval;
+}
+
+/**
+ * Cleanup the PCD.
+ */
+void pcd_remove(
+#ifdef LM_INTERFACE
+	struct lm_device *_dev
+#elif  defined(PCI_INTERFACE)
+	struct pci_dev *_dev
+#endif
+    )
+{
+#ifdef LM_INTERFACE
+	dwc_otg_device_t *otg_dev = lm_get_drvdata(_dev);
+#elif  defined(PCI_INTERFACE)
+	dwc_otg_device_t *otg_dev = pci_get_drvdata(_dev);
+#endif
+	dwc_otg_pcd_t *pcd = otg_dev->pcd;
+
+	DWC_DEBUGPL(DBG_PCDV, "%s(%p)\n", __func__, _dev);
+
+	/*
+	 * Free the IRQ
+	 */
+	free_irq(_dev->irq, pcd);
+	dwc_otg_pcd_remove(otg_dev->pcd);
+	free_wrapper(gadget_wrapper);
+	otg_dev->pcd = 0;
+}
+
+/**
+ * This function registers a gadget driver with the PCD.
+ *
+ * When a driver is successfully registered, it will receive control
+ * requests including set_configuration(), which enables non-control
+ * requests.  then usb traffic follows until a disconnect is reported.
+ * then a host may connect again, or the driver might get unbound.
+ *
+ * @param driver The driver being registered
+ */
+//int usb_gadget_register_driver(struct usb_gadget_driver *driver)	//lxy
+int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
+		int (*bind)(struct usb_gadget *))
+{
+	int retval;
+
+	DWC_DEBUGPL(DBG_PCD, "registering gadget driver '%s'\n",
+		    driver->driver.name);
+
+	//lxy
+	if (!driver || driver->speed == USB_SPEED_UNKNOWN ||
+	    !bind ||
+	    !driver->unbind || !driver->disconnect || !driver->setup) {
+		DWC_DEBUGPL(DBG_PCDV, "EINVAL\n");
+		return -EINVAL;
+	}
+	if (gadget_wrapper == 0) {
+		DWC_DEBUGPL(DBG_PCDV, "ENODEV\n");
+		return -ENODEV;
+	}
+	if (gadget_wrapper->driver != 0) {
+		DWC_DEBUGPL(DBG_PCDV, "EBUSY (%p)\n", gadget_wrapper->driver);
+		return -EBUSY;
+	}
+
+	/* hook up the driver */
+	gadget_wrapper->driver = driver;
+	gadget_wrapper->gadget.dev.driver = &driver->driver;
+
+	DWC_DEBUGPL(DBG_PCD, "bind to driver %s\n", driver->driver.name);
+	retval = bind(&gadget_wrapper->gadget);	//lxy
+//	retval = driver->bind(&gadget_wrapper->gadget);	//lxy
+	if (retval) {
+		DWC_ERROR("bind to driver %s --> error %d\n",
+			  driver->driver.name, retval);
+		gadget_wrapper->driver = 0;
+		gadget_wrapper->gadget.dev.driver = 0;
+		return retval;
+	}
+	DWC_DEBUGPL(DBG_ANY, "registered gadget driver '%s'\n",
+		    driver->driver.name);
+	return 0;
+}
+EXPORT_SYMBOL(usb_gadget_probe_driver);
+//EXPORT_SYMBOL(usb_gadget_register_driver);	//lxy
+
+/**
+ * This function unregisters a gadget driver
+ *
+ * @param driver The driver being unregistered
+ */
+int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
+{
+	//DWC_DEBUGPL(DBG_PCDV,"%s(%p)\n", __func__, _driver);
+
+	if (gadget_wrapper == 0) {
+		DWC_DEBUGPL(DBG_ANY, "%s Return(%d): s_pcd==0\n", __func__,
+			    -ENODEV);
+		return -ENODEV;
+	}
+	if (driver == 0 || driver != gadget_wrapper->driver) {
+		DWC_DEBUGPL(DBG_ANY, "%s Return(%d): driver?\n", __func__,
+			    -EINVAL);
+		return -EINVAL;
+	}
+
+	driver->unbind(&gadget_wrapper->gadget);
+	gadget_wrapper->driver = 0;
+
+	DWC_DEBUGPL(DBG_ANY, "unregistered driver '%s'\n", driver->driver.name);
+	return 0;
+}
+
+EXPORT_SYMBOL(usb_gadget_unregister_driver);
+
+#endif /* DWC_HOST_ONLY */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/.dwc_otg_pcd_linux.c.swo linux-3.0.82x/drivers/usb/gadget/dwc/driver/.dwc_otg_pcd_linux.c.swo
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/.dwc_otg_pcd_linux.c.swp linux-3.0.82x/drivers/usb/gadget/dwc/driver/.dwc_otg_pcd_linux.c.swp
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_regs.h linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_regs.h
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/dwc_otg_regs.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/dwc_otg_regs.h	2017-09-23 03:42:50.242674379 +0800
@@ -0,0 +1,2539 @@
+/* ==========================================================================
+ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_regs.h $
+ * $Revision: #93 $
+ * $Date: 2011/05/17 $
+ * $Change: 1774110 $
+ *
+ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
+ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
+ * otherwise expressly agreed to in writing between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product under
+ * any End User Software License Agreement or Agreement for Licensed Product
+ * with Synopsys or any supplement thereto. You are permitted to use and
+ * redistribute this Software in source and binary forms, with or without
+ * modification, provided that redistributions of source code must retain this
+ * notice. You may not view, use, disclose, copy or distribute this file or
+ * any information contained herein except pursuant to this license grant from
+ * Synopsys. If you do not agree with this notice, including the disclaimer
+ * below, then you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================== */
+
+#ifndef __DWC_OTG_REGS_H__
+#define __DWC_OTG_REGS_H__
+
+#include "dwc_otg_core_if.h"
+
+/**
+ * @file
+ *
+ * This file contains the data structures for accessing the DWC_otg core registers.
+ *
+ * The application interfaces with the HS OTG core by reading from and
+ * writing to the Control and Status Register (CSR) space through the
+ * AHB Slave interface. These registers are 32 bits wide, and the
+ * addresses are 32-bit-block aligned.
+ * CSRs are classified as follows:
+ * - Core Global Registers
+ * - Device Mode Registers
+ * - Device Global Registers
+ * - Device Endpoint Specific Registers
+ * - Host Mode Registers
+ * - Host Global Registers
+ * - Host Port CSRs
+ * - Host Channel Specific Registers
+ *
+ * Only the Core Global registers can be accessed in both Device and
+ * Host modes. When the HS OTG core is operating in one mode, either
+ * Device or Host, the application must not access registers from the
+ * other mode. When the core switches from one mode to another, the
+ * registers in the new mode of operation must be reprogrammed as they
+ * would be after a power-on reset.
+ */
+
+/****************************************************************************/
+/** DWC_otg Core registers . 
+ * The dwc_otg_core_global_regs structure defines the size
+ * and relative field offsets for the Core Global registers.
+ */
+typedef struct dwc_otg_core_global_regs {
+	/** OTG Control and Status Register.  <i>Offset: 000h</i> */
+	volatile uint32_t gotgctl;
+	/** OTG Interrupt Register.	 <i>Offset: 004h</i> */
+	volatile uint32_t gotgint;
+	/**Core AHB Configuration Register.	 <i>Offset: 008h</i> */
+	volatile uint32_t gahbcfg;
+
+#define DWC_GLBINTRMASK		0x0001
+#define DWC_DMAENABLE		0x0020
+#define DWC_NPTXEMPTYLVL_EMPTY	0x0080
+#define DWC_NPTXEMPTYLVL_HALFEMPTY	0x0000
+#define DWC_PTXEMPTYLVL_EMPTY	0x0100
+#define DWC_PTXEMPTYLVL_HALFEMPTY	0x0000
+
+	/**Core USB Configuration Register.	 <i>Offset: 00Ch</i> */
+	volatile uint32_t gusbcfg;
+	/**Core Reset Register.	 <i>Offset: 010h</i> */
+	volatile uint32_t grstctl;
+	/**Core Interrupt Register.	 <i>Offset: 014h</i> */
+	volatile uint32_t gintsts;
+	/**Core Interrupt Mask Register.  <i>Offset: 018h</i> */
+	volatile uint32_t gintmsk;
+	/**Receive Status Queue Read Register (Read Only).	<i>Offset: 01Ch</i> */
+	volatile uint32_t grxstsr;
+	/**Receive Status Queue Read & POP Register (Read Only).  <i>Offset: 020h</i>*/
+	volatile uint32_t grxstsp;
+	/**Receive FIFO Size Register.	<i>Offset: 024h</i> */
+	volatile uint32_t grxfsiz;
+	/**Non Periodic Transmit FIFO Size Register.  <i>Offset: 028h</i> */
+	volatile uint32_t gnptxfsiz;
+	/**Non Periodic Transmit FIFO/Queue Status Register (Read
+	 * Only). <i>Offset: 02Ch</i> */
+	volatile uint32_t gnptxsts;
+	/**I2C Access Register.	 <i>Offset: 030h</i> */
+	volatile uint32_t gi2cctl;
+	/**PHY Vendor Control Register.	 <i>Offset: 034h</i> */
+	volatile uint32_t gpvndctl;
+	/**General Purpose Input/Output Register.  <i>Offset: 038h</i> */
+	volatile uint32_t ggpio;
+	/**User ID Register.  <i>Offset: 03Ch</i> */
+	volatile uint32_t guid;
+	/**Synopsys ID Register (Read Only).  <i>Offset: 040h</i> */
+	volatile uint32_t gsnpsid;
+	/**User HW Config1 Register (Read Only).  <i>Offset: 044h</i> */
+	volatile uint32_t ghwcfg1;
+	/**User HW Config2 Register (Read Only).  <i>Offset: 048h</i> */
+	volatile uint32_t ghwcfg2;
+#define DWC_SLAVE_ONLY_ARCH 0
+#define DWC_EXT_DMA_ARCH 1
+#define DWC_INT_DMA_ARCH 2
+
+#define DWC_MODE_HNP_SRP_CAPABLE	0
+#define DWC_MODE_SRP_ONLY_CAPABLE	1
+#define DWC_MODE_NO_HNP_SRP_CAPABLE		2
+#define DWC_MODE_SRP_CAPABLE_DEVICE		3
+#define DWC_MODE_NO_SRP_CAPABLE_DEVICE	4
+#define DWC_MODE_SRP_CAPABLE_HOST	5
+#define DWC_MODE_NO_SRP_CAPABLE_HOST	6
+
+	/**User HW Config3 Register (Read Only).  <i>Offset: 04Ch</i> */
+	volatile uint32_t ghwcfg3;
+	/**User HW Config4 Register (Read Only).  <i>Offset: 050h</i>*/
+	volatile uint32_t ghwcfg4;
+	/** Core LPM Configuration register <i>Offset: 054h</i>*/
+	volatile uint32_t glpmcfg;
+	/** Global PowerDn Register <i>Offset: 058h</i> */
+	volatile uint32_t gpwrdn;
+	/** Global DFIFO SW Config Register  <i>Offset: 05Ch</i> */
+	volatile uint32_t gdfifocfg;
+	/** ADP Control Register  <i>Offset: 060h</i> */
+	volatile uint32_t adpctl;
+	/** Reserved  <i>Offset: 064h-0FFh</i> */
+	volatile uint32_t reserved39[39];
+	/** Host Periodic Transmit FIFO Size Register. <i>Offset: 100h</i> */
+	volatile uint32_t hptxfsiz;
+	/** Device Periodic Transmit FIFO#n Register if dedicated fifos are disabled,
+		otherwise Device Transmit FIFO#n Register.
+	 * <i>Offset: 104h + (FIFO_Number-1)*04h, 1 <= FIFO Number <= 15 (1<=n<=15).</i> */
+	volatile uint32_t dtxfsiz[15];
+} dwc_otg_core_global_regs_t;
+
+/**
+ * This union represents the bit fields of the Core OTG Control
+ * and Status Register (GOTGCTL).  Set the bits using the bit
+ * fields then write the <i>d32</i> value to the register.
+ */
+typedef union gotgctl_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		unsigned sesreqscs:1;
+		unsigned sesreq:1;
+		unsigned vbvalidoven:1;
+		unsigned vbvalidovval:1;
+		unsigned avalidoven:1;
+		unsigned avalidovval:1;
+		unsigned bvalidoven:1;
+		unsigned bvalidovval:1;
+		unsigned hstnegscs:1;
+		unsigned hnpreq:1;
+		unsigned hstsethnpen:1;
+		unsigned devhnpen:1;
+		unsigned reserved12_15:4;
+		unsigned conidsts:1;
+		unsigned dbnctime:1;
+		unsigned asesvld:1;
+		unsigned bsesvld:1;
+		unsigned otgver:1;
+		unsigned reserved1:1;
+		unsigned multvalidbc:5;
+		unsigned chirpen:1;
+		unsigned reserved28_31:4;
+	} b;
+} gotgctl_data_t;
+
+/**
+ * This union represents the bit fields of the Core OTG Interrupt Register
+ * (GOTGINT).  Set/clear the bits using the bit fields then write the <i>d32</i>
+ * value to the register.
+ */
+typedef union gotgint_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		/** Current Mode */
+		unsigned reserved0_1:2;
+
+		/** Session End Detected */
+		unsigned sesenddet:1;
+
+		unsigned reserved3_7:5;
+
+		/** Session Request Success Status Change */
+		unsigned sesreqsucstschng:1;
+		/** Host Negotiation Success Status Change */
+		unsigned hstnegsucstschng:1;
+
+		unsigned reserved10_16:7;
+
+		/** Host Negotiation Detected */
+		unsigned hstnegdet:1;
+		/** A-Device Timeout Change */
+		unsigned adevtoutchng:1;
+		/** Debounce Done */
+		unsigned debdone:1;
+		/** Multi-Valued input changed */
+		unsigned mvic:1;
+
+		unsigned reserved31_21:11;
+
+	} b;
+} gotgint_data_t;
+
+/**
+ * This union represents the bit fields of the Core AHB Configuration
+ * Register (GAHBCFG). Set/clear the bits using the bit fields then
+ * write the <i>d32</i> value to the register.
+ */
+typedef union gahbcfg_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		unsigned glblintrmsk:1;
+#define DWC_GAHBCFG_GLBINT_ENABLE		1
+
+		unsigned hburstlen:4;
+#define DWC_GAHBCFG_INT_DMA_BURST_SINGLE	0
+#define DWC_GAHBCFG_INT_DMA_BURST_INCR		1
+#define DWC_GAHBCFG_INT_DMA_BURST_INCR4		3
+#define DWC_GAHBCFG_INT_DMA_BURST_INCR8		5
+#define DWC_GAHBCFG_INT_DMA_BURST_INCR16	7
+
+		unsigned dmaenable:1;
+#define DWC_GAHBCFG_DMAENABLE			1
+		unsigned reserved:1;
+		unsigned nptxfemplvl_txfemplvl:1;
+		unsigned ptxfemplvl:1;
+#define DWC_GAHBCFG_TXFEMPTYLVL_EMPTY		1
+#define DWC_GAHBCFG_TXFEMPTYLVL_HALFEMPTY	0
+		unsigned reserved9_20:12;
+		unsigned remmemsupp:1;
+		unsigned notialldmawrit:1;
+		unsigned reserved23_31:9;
+	} b;
+} gahbcfg_data_t;
+
+/**
+ * This union represents the bit fields of the Core USB Configuration
+ * Register (GUSBCFG). Set the bits using the bit fields then write
+ * the <i>d32</i> value to the register.
+ */
+typedef union gusbcfg_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		unsigned toutcal:3;
+		unsigned phyif:1;
+		unsigned ulpi_utmi_sel:1;
+		unsigned fsintf:1;
+		unsigned physel:1;
+		unsigned ddrsel:1;
+		unsigned srpcap:1;
+		unsigned hnpcap:1;
+		unsigned usbtrdtim:4;
+		unsigned reserved1:1;
+		unsigned phylpwrclksel:1;
+		unsigned otgutmifssel:1;
+		unsigned ulpi_fsls:1;
+		unsigned ulpi_auto_res:1;
+		unsigned ulpi_clk_sus_m:1;
+		unsigned ulpi_ext_vbus_drv:1;
+		unsigned ulpi_int_vbus_indicator:1;
+		unsigned term_sel_dl_pulse:1;
+		unsigned indicator_complement:1;
+		unsigned indicator_pass_through:1;
+		unsigned ulpi_int_prot_dis:1;
+		unsigned ic_usb_cap:1;
+		unsigned ic_traffic_pull_remove:1;
+		unsigned tx_end_delay:1;
+		unsigned force_host_mode:1;
+		unsigned force_dev_mode:1;
+		unsigned reserved31:1;
+	} b;
+} gusbcfg_data_t;
+
+/**
+ * This union represents the bit fields of the Core Reset Register
+ * (GRSTCTL).  Set/clear the bits using the bit fields then write the
+ * <i>d32</i> value to the register.
+ */
+typedef union grstctl_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		/** Core Soft Reset (CSftRst) (Device and Host)
+		 *
+		 * The application can flush the control logic in the
+		 * entire core using this bit. This bit resets the
+		 * pipelines in the AHB Clock domain as well as the
+		 * PHY Clock domain.
+		 *
+		 * The state machines are reset to an IDLE state, the
+		 * control bits in the CSRs are cleared, all the
+		 * transmit FIFOs and the receive FIFO are flushed.
+		 *
+		 * The status mask bits that control the generation of
+		 * the interrupt, are cleared, to clear the
+		 * interrupt. The interrupt status bits are not
+		 * cleared, so the application can get the status of
+		 * any events that occurred in the core after it has
+		 * set this bit.
+		 *
+		 * Any transactions on the AHB are terminated as soon
+		 * as possible following the protocol. Any
+		 * transactions on the USB are terminated immediately.
+		 *
+		 * The configuration settings in the CSRs are
+		 * unchanged, so the software doesn't have to
+		 * reprogram these registers (Device
+		 * Configuration/Host Configuration/Core System
+		 * Configuration/Core PHY Configuration).
+		 *
+		 * The application can write to this bit, any time it
+		 * wants to reset the core. This is a self clearing
+		 * bit and the core clears this bit after all the
+		 * necessary logic is reset in the core, which may
+		 * take several clocks, depending on the current state
+		 * of the core.
+		 */
+		unsigned csftrst:1;
+		/** Hclk Soft Reset
+		 *
+		 * The application uses this bit to reset the control logic in
+		 * the AHB clock domain. Only AHB clock domain pipelines are
+		 * reset.
+		 */
+		unsigned hsftrst:1;
+		/** Host Frame Counter Reset (Host Only)<br>
+		 *
+		 * The application can reset the (micro)frame number
+		 * counter inside the core, using this bit. When the
+		 * (micro)frame counter is reset, the subsequent SOF
+		 * sent out by the core, will have a (micro)frame
+		 * number of 0.
+		 */
+		unsigned hstfrm:1;
+		/** In Token Sequence Learning Queue Flush
+		 * (INTknQFlsh) (Device Only)
+		 */
+		unsigned intknqflsh:1;
+		/** RxFIFO Flush (RxFFlsh) (Device and Host)
+		 *
+		 * The application can flush the entire Receive FIFO
+		 * using this bit. The application must first
+		 * ensure that the core is not in the middle of a
+		 * transaction. The application should write into
+		 * this bit, only after making sure that neither the
+		 * DMA engine is reading from the RxFIFO nor the MAC
+		 * is writing the data in to the FIFO. The
+		 * application should wait until the bit is cleared
+		 * before performing any other operations. This bit
+		 * will takes 8 clocks (slowest of PHY or AHB clock)
+		 * to clear.
+		 */
+		unsigned rxfflsh:1;
+		/** TxFIFO Flush (TxFFlsh) (Device and Host). 
+		 *
+		 * This bit is used to selectively flush a single or
+		 * all transmit FIFOs. The application must first
+		 * ensure that the core is not in the middle of a
+		 * transaction. The application should write into
+		 * this bit, only after making sure that neither the
+		 * DMA engine is writing into the TxFIFO nor the MAC
+		 * is reading the data out of the FIFO. The
+		 * application should wait until the core clears this
+		 * bit, before performing any operations. This bit
+		 * will takes 8 clocks (slowest of PHY or AHB clock)
+		 * to clear.
+		 */
+		unsigned txfflsh:1;
+
+		/** TxFIFO Number (TxFNum) (Device and Host).
+		 *
+		 * This is the FIFO number which needs to be flushed,
+		 * using the TxFIFO Flush bit. This field should not
+		 * be changed until the TxFIFO Flush bit is cleared by
+		 * the core.
+		 *	 - 0x0 : Non Periodic TxFIFO Flush
+		 *	 - 0x1 : Periodic TxFIFO #1 Flush in device mode
+		 *	   or Periodic TxFIFO in host mode
+		 *	 - 0x2 : Periodic TxFIFO #2 Flush in device mode.
+		 *	 - ...
+		 *	 - 0xF : Periodic TxFIFO #15 Flush in device mode
+		 *	 - 0x10: Flush all the Transmit NonPeriodic and
+		 *	   Transmit Periodic FIFOs in the core
+		 */
+		unsigned txfnum:5;
+		/** Reserved */
+		unsigned reserved11_29:19;
+		/** DMA Request Signal.	 Indicated DMA request is in
+		 * probress. Used for debug purpose. */
+		unsigned dmareq:1;
+		/** AHB Master Idle.  Indicates the AHB Master State
+		 * Machine is in IDLE condition. */
+		unsigned ahbidle:1;
+	} b;
+} grstctl_t;
+
+/**
+ * This union represents the bit fields of the Core Interrupt Mask
+ * Register (GINTMSK). Set/clear the bits using the bit fields then
+ * write the <i>d32</i> value to the register.
+ */
+typedef union gintmsk_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		unsigned reserved0:1;
+		unsigned modemismatch:1;
+		unsigned otgintr:1;
+		unsigned sofintr:1;
+		unsigned rxstsqlvl:1;
+		unsigned nptxfempty:1;
+		unsigned ginnakeff:1;
+		unsigned goutnakeff:1;
+		unsigned ulpickint:1;
+		unsigned i2cintr:1;
+		unsigned erlysuspend:1;
+		unsigned usbsuspend:1;
+		unsigned usbreset:1;
+		unsigned enumdone:1;
+		unsigned isooutdrop:1;
+		unsigned eopframe:1;
+		unsigned restoredone:1;
+		unsigned epmismatch:1;
+		unsigned inepintr:1;
+		unsigned outepintr:1;
+		unsigned incomplisoin:1;
+		unsigned incomplisoout:1;
+		unsigned fetsusp:1;
+		unsigned resetdet:1;
+		unsigned portintr:1;
+		unsigned hcintr:1;
+		unsigned ptxfempty:1;
+		unsigned lpmtranrcvd:1;
+		unsigned conidstschng:1;
+		unsigned disconnect:1;
+		unsigned sessreqintr:1;
+		unsigned wkupintr:1;
+	} b;
+} gintmsk_data_t;
+/**
+ * This union represents the bit fields of the Core Interrupt Register
+ * (GINTSTS).  Set/clear the bits using the bit fields then write the
+ * <i>d32</i> value to the register.
+ */
+typedef union gintsts_data {
+	/** raw register data */
+	uint32_t d32;
+#define DWC_SOF_INTR_MASK 0x0008
+	/** register bits */
+	struct {
+#define DWC_HOST_MODE 1
+		unsigned curmode:1;
+		unsigned modemismatch:1;
+		unsigned otgintr:1;
+		unsigned sofintr:1;
+		unsigned rxstsqlvl:1;
+		unsigned nptxfempty:1;
+		unsigned ginnakeff:1;
+		unsigned goutnakeff:1;
+		unsigned ulpickint:1;
+		unsigned i2cintr:1;
+		unsigned erlysuspend:1;
+		unsigned usbsuspend:1;
+		unsigned usbreset:1;
+		unsigned enumdone:1;
+		unsigned isooutdrop:1;
+		unsigned eopframe:1;
+		unsigned restoredone:1;
+		unsigned epmismatch:1;
+		unsigned inepint:1;
+		unsigned outepintr:1;
+		unsigned incomplisoin:1;
+		unsigned incomplisoout:1;
+		unsigned fetsusp:1;
+		unsigned resetdet:1;
+		unsigned portintr:1;
+		unsigned hcintr:1;
+		unsigned ptxfempty:1;
+		unsigned lpmtranrcvd:1;
+		unsigned conidstschng:1;
+		unsigned disconnect:1;
+		unsigned sessreqintr:1;
+		unsigned wkupintr:1;
+	} b;
+} gintsts_data_t;
+
+/**
+ * This union represents the bit fields in the Device Receive Status Read and
+ * Pop Registers (GRXSTSR, GRXSTSP) Read the register into the <i>d32</i>
+ * element then read out the bits using the <i>b</i>it elements.
+ */
+typedef union device_grxsts_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		unsigned epnum:4;
+		unsigned bcnt:11;
+		unsigned dpid:2;
+
+#define DWC_STS_DATA_UPDT		0x2	// OUT Data Packet
+#define DWC_STS_XFER_COMP		0x3	// OUT Data Transfer Complete
+
+#define DWC_DSTS_GOUT_NAK		0x1	// Global OUT NAK
+#define DWC_DSTS_SETUP_COMP		0x4	// Setup Phase Complete
+#define DWC_DSTS_SETUP_UPDT 0x6	// SETUP Packet
+		unsigned pktsts:4;
+		unsigned fn:4;
+		unsigned reserved25_31:7;
+	} b;
+} device_grxsts_data_t;
+
+/**
+ * This union represents the bit fields in the Host Receive Status Read and
+ * Pop Registers (GRXSTSR, GRXSTSP) Read the register into the <i>d32</i>
+ * element then read out the bits using the <i>b</i>it elements.
+ */
+typedef union host_grxsts_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		unsigned chnum:4;
+		unsigned bcnt:11;
+		unsigned dpid:2;
+
+		unsigned pktsts:4;
+#define DWC_GRXSTS_PKTSTS_IN			  0x2
+#define DWC_GRXSTS_PKTSTS_IN_XFER_COMP	  0x3
+#define DWC_GRXSTS_PKTSTS_DATA_TOGGLE_ERR 0x5
+#define DWC_GRXSTS_PKTSTS_CH_HALTED		  0x7
+
+		unsigned reserved21_31:11;
+	} b;
+} host_grxsts_data_t;
+
+/**
+ * This union represents the bit fields in the FIFO Size Registers (HPTXFSIZ,
+ * GNPTXFSIZ, DPTXFSIZn, DIEPTXFn). Read the register into the <i>d32</i> element then
+ * read out the bits using the <i>b</i>it elements.
+ */
+typedef union fifosize_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		unsigned startaddr:16;
+		unsigned depth:16;
+	} b;
+} fifosize_data_t;
+
+/**
+ * This union represents the bit fields in the Non-Periodic Transmit
+ * FIFO/Queue Status Register (GNPTXSTS). Read the register into the
+ * <i>d32</i> element then read out the bits using the <i>b</i>it
+ * elements.
+ */
+typedef union gnptxsts_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		unsigned nptxfspcavail:16;
+		unsigned nptxqspcavail:8;
+		/** Top of the Non-Periodic Transmit Request Queue
+		 *	- bit 24 - Terminate (Last entry for the selected
+		 *	  channel/EP)
+		 *	- bits 26:25 - Token Type
+		 *	  - 2'b00 - IN/OUT
+		 *	  - 2'b01 - Zero Length OUT
+		 *	  - 2'b10 - PING/Complete Split
+		 *	  - 2'b11 - Channel Halt
+		 *	- bits 30:27 - Channel/EP Number
+		 */
+		unsigned nptxqtop_terminate:1;
+		unsigned nptxqtop_token:2;
+		unsigned nptxqtop_chnep:4;
+		unsigned reserved:1;
+	} b;
+} gnptxsts_data_t;
+
+/**
+ * This union represents the bit fields in the Transmit
+ * FIFO Status Register (DTXFSTS). Read the register into the
+ * <i>d32</i> element then read out the bits using the <i>b</i>it
+ * elements.
+ */
+typedef union dtxfsts_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		unsigned txfspcavail:16;
+		unsigned reserved:16;
+	} b;
+} dtxfsts_data_t;
+
+/**
+ * This union represents the bit fields in the I2C Control Register
+ * (I2CCTL). Read the register into the <i>d32</i> element then read out the
+ * bits using the <i>b</i>it elements.
+ */
+typedef union gi2cctl_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		unsigned rwdata:8;
+		unsigned regaddr:8;
+		unsigned addr:7;
+		unsigned i2cen:1;
+		unsigned ack:1;
+		unsigned i2csuspctl:1;
+		unsigned i2cdevaddr:2;
+		unsigned i2cdatse0:1;
+		unsigned reserved:1;
+		unsigned rw:1;
+		unsigned bsydne:1;
+	} b;
+} gi2cctl_data_t;
+
+/**
+ * This union represents the bit fields in the PHY Vendor Control Register
+ * (GPVNDCTL). Read the register into the <i>d32</i> element then read out the
+ * bits using the <i>b</i>it elements.
+ */
+typedef union gpvndctl_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		unsigned regdata:8;
+		unsigned vctrl:8;
+		unsigned regaddr16_21:6;
+		unsigned regwr:1;
+		unsigned reserved23_24:2;
+		unsigned newregreq:1;
+		unsigned vstsbsy:1;
+		unsigned vstsdone:1;
+		unsigned reserved28_30:3;
+		unsigned disulpidrvr:1;
+	} b;
+} gpvndctl_data_t;
+
+/**
+ * This union represents the bit fields in the General Purpose 
+ * Input/Output Register (GGPIO).
+ * Read the register into the <i>d32</i> element then read out the
+ * bits using the <i>b</i>it elements.
+ */
+typedef union ggpio_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		unsigned gpi:16;
+		unsigned gpo:16;
+	} b;
+} ggpio_data_t;
+
+/**
+ * This union represents the bit fields in the User ID Register
+ * (GUID). Read the register into the <i>d32</i> element then read out the
+ * bits using the <i>b</i>it elements.
+ */
+typedef union guid_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		unsigned rwdata:32;
+	} b;
+} guid_data_t;
+
+/**
+ * This union represents the bit fields in the Synopsys ID Register
+ * (GSNPSID). Read the register into the <i>d32</i> element then read out the
+ * bits using the <i>b</i>it elements.
+ */
+typedef union gsnpsid_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		unsigned rwdata:32;
+	} b;
+} gsnpsid_data_t;
+
+/**
+ * This union represents the bit fields in the User HW Config1
+ * Register.  Read the register into the <i>d32</i> element then read
+ * out the bits using the <i>b</i>it elements.
+ */
+typedef union hwcfg1_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		unsigned ep_dir0:2;
+		unsigned ep_dir1:2;
+		unsigned ep_dir2:2;
+		unsigned ep_dir3:2;
+		unsigned ep_dir4:2;
+		unsigned ep_dir5:2;
+		unsigned ep_dir6:2;
+		unsigned ep_dir7:2;
+		unsigned ep_dir8:2;
+		unsigned ep_dir9:2;
+		unsigned ep_dir10:2;
+		unsigned ep_dir11:2;
+		unsigned ep_dir12:2;
+		unsigned ep_dir13:2;
+		unsigned ep_dir14:2;
+		unsigned ep_dir15:2;
+	} b;
+} hwcfg1_data_t;
+
+/**
+ * This union represents the bit fields in the User HW Config2
+ * Register.  Read the register into the <i>d32</i> element then read
+ * out the bits using the <i>b</i>it elements.
+ */
+typedef union hwcfg2_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		/* GHWCFG2 */
+		unsigned op_mode:3;
+#define DWC_HWCFG2_OP_MODE_HNP_SRP_CAPABLE_OTG 0
+#define DWC_HWCFG2_OP_MODE_SRP_ONLY_CAPABLE_OTG 1
+#define DWC_HWCFG2_OP_MODE_NO_HNP_SRP_CAPABLE_OTG 2
+#define DWC_HWCFG2_OP_MODE_SRP_CAPABLE_DEVICE 3
+#define DWC_HWCFG2_OP_MODE_NO_SRP_CAPABLE_DEVICE 4
+#define DWC_HWCFG2_OP_MODE_SRP_CAPABLE_HOST 5
+#define DWC_HWCFG2_OP_MODE_NO_SRP_CAPABLE_HOST 6
+
+		unsigned architecture:2;
+		unsigned point2point:1;
+		unsigned hs_phy_type:2;
+#define DWC_HWCFG2_HS_PHY_TYPE_NOT_SUPPORTED 0
+#define DWC_HWCFG2_HS_PHY_TYPE_UTMI 1
+#define DWC_HWCFG2_HS_PHY_TYPE_ULPI 2
+#define DWC_HWCFG2_HS_PHY_TYPE_UTMI_ULPI 3
+
+		unsigned fs_phy_type:2;
+		unsigned num_dev_ep:4;
+		unsigned num_host_chan:4;
+		unsigned perio_ep_supported:1;
+		unsigned dynamic_fifo:1;
+		unsigned multi_proc_int:1;
+		unsigned reserved21:1;
+		unsigned nonperio_tx_q_depth:2;
+		unsigned host_perio_tx_q_depth:2;
+		unsigned dev_token_q_depth:5;
+		unsigned otg_enable_ic_usb:1;
+	} b;
+} hwcfg2_data_t;
+
+/**
+ * This union represents the bit fields in the User HW Config3
+ * Register.  Read the register into the <i>d32</i> element then read
+ * out the bits using the <i>b</i>it elements.
+ */
+typedef union hwcfg3_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		/* GHWCFG3 */
+		unsigned xfer_size_cntr_width:4;
+		unsigned packet_size_cntr_width:3;
+		unsigned otg_func:1;
+		unsigned i2c:1;
+		unsigned vendor_ctrl_if:1;
+		unsigned optional_features:1;
+		unsigned synch_reset_type:1;
+		unsigned adp_supp:1;
+		unsigned otg_enable_hsic:1;
+		unsigned bc_support:1;
+		unsigned otg_lpm_en:1;
+		unsigned dfifo_depth:16;
+	} b;
+} hwcfg3_data_t;
+
+/**
+ * This union represents the bit fields in the User HW Config4
+ * Register.  Read the register into the <i>d32</i> element then read
+ * out the bits using the <i>b</i>it elements.
+ */
+typedef union hwcfg4_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		unsigned num_dev_perio_in_ep:4;
+		unsigned power_optimiz:1;
+		unsigned min_ahb_freq:1;
+		unsigned part_power_down:1;
+		unsigned reserved:7;
+		unsigned utmi_phy_data_width:2;
+		unsigned num_dev_mode_ctrl_ep:4;
+		unsigned iddig_filt_en:1;
+		unsigned vbus_valid_filt_en:1;
+		unsigned a_valid_filt_en:1;
+		unsigned b_valid_filt_en:1;
+		unsigned session_end_filt_en:1;
+		unsigned ded_fifo_en:1;
+		unsigned num_in_eps:4;
+		unsigned desc_dma:1;
+		unsigned desc_dma_dyn:1;
+	} b;
+} hwcfg4_data_t;
+
+/**
+ * This union represents the bit fields of the Core LPM Configuration
+ * Register (GLPMCFG). Set the bits using bit fields then write
+ * the <i>d32</i> value to the register.
+ */
+typedef union glpmctl_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		/** LPM-Capable (LPMCap) (Device and Host)
+		 * The application uses this bit to control
+		 * the DWC_otg core LPM capabilities.
+		 */
+		unsigned lpm_cap_en:1;
+		/** LPM response programmed by application (AppL1Res) (Device)
+		 * Handshake response to LPM token pre-programmed
+		 * by device application software.
+		 */
+		unsigned appl_resp:1;
+		/** Host Initiated Resume Duration (HIRD) (Device and Host)
+		 * In Host mode this field indicates the value of HIRD
+		 * to be sent in an LPM transaction.
+		 * In Device mode this field is updated with the
+		 * Received LPM Token HIRD bmAttribute
+		 * when an ACK/NYET/STALL response is sent
+		 * to an LPM transaction.
+		 */
+		unsigned hird:4;
+		/** RemoteWakeEnable (bRemoteWake) (Device and Host)
+		 * In Host mode this bit indicates the value of remote
+		 * wake up to be sent in wIndex field of LPM transaction.
+		 * In Device mode this field is updated with the
+		 * Received LPM Token bRemoteWake bmAttribute
+		 * when an ACK/NYET/STALL response is sent
+		 * to an LPM transaction.
+		 */
+		unsigned rem_wkup_en:1;
+		/** Enable utmi_sleep_n (EnblSlpM) (Device and Host)
+		 * The application uses this bit to control
+		 * the utmi_sleep_n assertion to the PHY when in L1 state.
+		 */
+		unsigned en_utmi_sleep:1;
+		/** HIRD Threshold (HIRD_Thres) (Device and Host)
+		 */
+		unsigned hird_thres:5;
+		/** LPM Response (CoreL1Res) (Device and Host)
+		 * In Host mode this bit contains handsake response to
+		 * LPM transaction.
+		 * In Device mode the response of the core to
+		 * LPM transaction received is reflected in these two bits.
+		 	- 0x0 : ERROR (No handshake response)
+			- 0x1 : STALL
+			- 0x2 : NYET
+			- 0x3 : ACK			
+		 */
+		unsigned lpm_resp:2;
+		/** Port Sleep Status (SlpSts) (Device and Host)
+		 * This bit is set as long as a Sleep condition
+		 * is present on the USB bus.
+		 */
+		unsigned prt_sleep_sts:1;
+		/** Sleep State Resume OK (L1ResumeOK) (Device and Host)
+		 * Indicates that the application or host
+		 * can start resume from Sleep state.
+		 */
+		unsigned sleep_state_resumeok:1;
+		/** LPM channel Index (LPM_Chnl_Indx) (Host)
+		 * The channel number on which the LPM transaction
+		 * has to be applied while sending
+		 * an LPM transaction to the local device.
+		 */
+		unsigned lpm_chan_index:4;
+		/** LPM Retry Count (LPM_Retry_Cnt) (Host)
+		 * Number host retries that would be performed
+		 * if the device response was not valid response.
+		 */
+		unsigned retry_count:3;
+		/** Send LPM Transaction (SndLPM) (Host)
+		 * When set by application software,
+		 * an LPM transaction containing two tokens
+		 * is sent.
+		 */
+		unsigned send_lpm:1;
+		/** LPM Retry status (LPM_RetryCnt_Sts) (Host)
+		 * Number of LPM Host Retries still remaining
+		 * to be transmitted for the current LPM sequence
+		 */
+		unsigned retry_count_sts:3;
+		unsigned reserved28_29:2;
+		/** In host mode once this bit is set, the host
+		 * configures to drive the HSIC Idle state on the bus.
+		 * It then waits for the  device to initiate the Connect sequence.
+		 * In device mode once this bit is set, the device waits for
+		 * the HSIC Idle line state on the bus. Upon receving the Idle
+		 * line state, it initiates the HSIC Connect sequence.
+		 */
+		unsigned hsic_connect:1;
+		/** This bit overrides and functionally inverts
+		 * the if_select_hsic input port signal.
+		 */
+		unsigned inv_sel_hsic:1;
+	} b;
+} glpmcfg_data_t;
+
+/**
+ * This union represents the bit fields of the Core ADP Timer, Control and
+ * Status Register (ADPTIMCTLSTS). Set the bits using bit fields then write
+ * the <i>d32</i> value to the register.
+ */
+typedef union adpctl_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		/** Probe Discharge (PRB_DSCHG)
+		 *  These bits set the times for TADP_DSCHG. 
+		 *  These bits are defined as follows:
+		 *  2'b00 - 4 msec
+		 *  2'b01 - 8 msec
+		 *  2'b10 - 16 msec
+		 *  2'b11 - 32 msec
+		 */
+		unsigned prb_dschg:2;
+		/** Probe Delta (PRB_DELTA)
+		 *  These bits set the resolution for RTIM   value.
+		 *  The bits are defined in units of 32 kHz clock cycles as follows:
+		 *  2'b00  -  1 cycles
+		 *  2'b01  -  2 cycles
+		 *  2'b10 -  3 cycles
+		 *  2'b11 - 4 cycles
+		 *  For example if this value is chosen to 2'b01, it means that RTIM
+		 *  increments for every 3(three) 32Khz clock cycles.
+		 */
+		unsigned prb_delta:2;
+		/** Probe Period (PRB_PER)
+		 *  These bits sets the TADP_PRD as shown in Figure 4 as follows:
+		 *  2'b00  -  0.625 to 0.925 sec (typical 0.775 sec)
+		 *  2'b01  -  1.25 to 1.85 sec (typical 1.55 sec)
+		 *  2'b10  -  1.9 to 2.6 sec (typical 2.275 sec)
+		 *  2'b11  -  Reserved
+		 */
+		unsigned prb_per:2;
+		/** These bits capture the latest time it took for VBUS to ramp from VADP_SINK
+		 *  to VADP_PRB.  The bits are defined in units of 32 kHz clock cycles as follows:
+		 *  0x000  -  1 cycles
+		 *  0x001  -  2 cycles
+		 *  0x002  -  3 cycles
+		 *  etc
+		 *  0x7FF  -  2048 cycles
+		 *  A time of 1024 cycles at 32 kHz corresponds to a time of 32 msec.
+		*/
+		unsigned rtim:11;
+		/** Enable Probe (EnaPrb)
+		 *  When programmed to 1'b1, the core performs a probe operation.
+		 *  This bit is valid only if OTG_Ver = 1'b1.
+		 */
+		unsigned enaprb:1;
+		/** Enable Sense (EnaSns)
+		 *  When programmed to 1'b1, the core performs a Sense operation.
+		 *  This bit is valid only if OTG_Ver = 1'b1.
+		 */
+		unsigned enasns:1;
+		/** ADP Reset (ADPRes)
+		 *  When set, ADP controller is reset.
+		 *  This bit is valid only if OTG_Ver = 1'b1.
+ 		 */
+		unsigned adpres:1;
+		/** ADP Enable (ADPEn)
+		 *  When set, the core performs either ADP probing or sensing
+		 *  based on EnaPrb or EnaSns.
+		 *  This bit is valid only if OTG_Ver = 1'b1.
+		 */
+		unsigned adpen:1;
+		/** ADP Probe Interrupt (ADP_PRB_INT)
+		 *  When this bit is set, it means that the VBUS
+		 *  voltage is greater than VADP_PRB or VADP_PRB is reached.
+		 *  This bit is valid only if OTG_Ver = 1'b1.
+		 */
+		unsigned adp_prb_int:1;
+		/**
+		 *  ADP Sense Interrupt (ADP_SNS_INT)
+		 *  When this bit is set, it means that the VBUS voltage is greater than 
+		 *  VADP_SNS value or VADP_SNS is reached.
+		 *  This bit is valid only if OTG_Ver = 1'b1.
+		 */
+		unsigned adp_sns_int:1;
+		/** ADP Tomeout Interrupt (ADP_TMOUT_INT)
+		 *  This bit is relevant only for an ADP probe.
+		 *  When this bit is set, it means that the ramp time has
+		 *  completed ie ADPCTL.RTIM has reached its terminal value
+		 *  of 0x7FF.  This is a debug feature that allows software
+		 *  to read the ramp time after each cycle.
+		 *  This bit is valid only if OTG_Ver = 1'b1.
+		 */
+		unsigned adp_tmout_int:1;
+		/** ADP Probe Interrupt Mask (ADP_PRB_INT_MSK)
+		 *  When this bit is set, it unmasks the interrupt due to ADP_PRB_INT.
+		 *  This bit is valid only if OTG_Ver = 1'b1.
+		 */
+		unsigned adp_prb_int_msk:1;
+		/** ADP Sense Interrupt Mask (ADP_SNS_INT_MSK)
+		 *  When this bit is set, it unmasks the interrupt due to ADP_SNS_INT.
+		 *  This bit is valid only if OTG_Ver = 1'b1.
+		 */
+		unsigned adp_sns_int_msk:1;
+		/** ADP Timoeout Interrupt Mask (ADP_TMOUT_MSK)
+		 *  When this bit is set, it unmasks the interrupt due to ADP_TMOUT_INT.
+		 *  This bit is valid only if OTG_Ver = 1'b1.
+		 */
+		unsigned adp_tmout_int_msk:1;
+		/** Access Request
+		 * 2'b00 - Read/Write Valid (updated by the core) 
+		 * 2'b01 - Read
+		 * 2'b00 - Write
+		 * 2'b00 - Reserved
+		 */
+		unsigned ar:2;
+		 /** Reserved */
+		unsigned reserved29_31:3;
+	} b;
+} adpctl_data_t;
+
+////////////////////////////////////////////
+// Device Registers
+/**
+ * Device Global Registers. <i>Offsets 800h-BFFh</i>
+ *
+ * The following structures define the size and relative field offsets
+ * for the Device Mode Registers.
+ *
+ * <i>These registers are visible only in Device mode and must not be
+ * accessed in Host mode, as the results are unknown.</i>
+ */
+typedef struct dwc_otg_dev_global_regs {
+	/** Device Configuration Register. <i>Offset 800h</i> */
+	volatile uint32_t dcfg;
+	/** Device Control Register. <i>Offset: 804h</i> */
+	volatile uint32_t dctl;
+	/** Device Status Register (Read Only). <i>Offset: 808h</i> */
+	volatile uint32_t dsts;
+	/** Reserved. <i>Offset: 80Ch</i> */
+	uint32_t unused;
+	/** Device IN Endpoint Common Interrupt Mask
+	 * Register. <i>Offset: 810h</i> */
+	volatile uint32_t diepmsk;
+	/** Device OUT Endpoint Common Interrupt Mask
+	 * Register. <i>Offset: 814h</i> */
+	volatile uint32_t doepmsk;
+	/** Device All Endpoints Interrupt Register.  <i>Offset: 818h</i> */
+	volatile uint32_t daint;
+	/** Device All Endpoints Interrupt Mask Register.  <i>Offset:
+	 * 81Ch</i> */
+	volatile uint32_t daintmsk;
+	/** Device IN Token Queue Read Register-1 (Read Only).
+	 * <i>Offset: 820h</i> */
+	volatile uint32_t dtknqr1;
+	/** Device IN Token Queue Read Register-2 (Read Only).
+	 * <i>Offset: 824h</i> */
+	volatile uint32_t dtknqr2;
+	/** Device VBUS	 discharge Register.  <i>Offset: 828h</i> */
+	volatile uint32_t dvbusdis;
+	/** Device VBUS Pulse Register.	 <i>Offset: 82Ch</i> */
+	volatile uint32_t dvbuspulse;
+	/** Device IN Token Queue Read Register-3 (Read Only). /
+	 *	Device Thresholding control register (Read/Write)
+	 * <i>Offset: 830h</i> */
+	volatile uint32_t dtknqr3_dthrctl;
+	/** Device IN Token Queue Read Register-4 (Read Only). /
+	 *	Device IN EPs empty Inr. Mask Register (Read/Write)
+	 * <i>Offset: 834h</i> */
+	volatile uint32_t dtknqr4_fifoemptymsk;
+	/** Device Each Endpoint Interrupt Register (Read Only). /
+	 * <i>Offset: 838h</i> */
+	volatile uint32_t deachint;
+	/** Device Each Endpoint Interrupt mask Register (Read/Write). /
+	 * <i>Offset: 83Ch</i> */
+	volatile uint32_t deachintmsk;
+	/** Device Each In Endpoint Interrupt mask Register (Read/Write). /
+	 * <i>Offset: 840h</i> */
+	volatile uint32_t diepeachintmsk[MAX_EPS_CHANNELS];
+	/** Device Each Out Endpoint Interrupt mask Register (Read/Write). /
+	 * <i>Offset: 880h</i> */
+	volatile uint32_t doepeachintmsk[MAX_EPS_CHANNELS];
+} dwc_otg_device_global_regs_t;
+
+/**
+ * This union represents the bit fields in the Device Configuration
+ * Register.  Read the register into the <i>d32</i> member then
+ * set/clear the bits using the <i>b</i>it elements.  Write the
+ * <i>d32</i> member to the dcfg register.
+ */
+typedef union dcfg_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		/** Device Speed */
+		unsigned devspd:2;
+		/** Non Zero Length Status OUT Handshake */
+		unsigned nzstsouthshk:1;
+#define DWC_DCFG_SEND_STALL 1
+
+		unsigned ena32khzs:1;
+		/** Device Addresses */
+		unsigned devaddr:7;
+		/** Periodic Frame Interval */
+		unsigned perfrint:2;
+#define DWC_DCFG_FRAME_INTERVAL_80 0
+#define DWC_DCFG_FRAME_INTERVAL_85 1
+#define DWC_DCFG_FRAME_INTERVAL_90 2
+#define DWC_DCFG_FRAME_INTERVAL_95 3
+		
+		/** Enable Device OUT NAK for bulk in DDMA mode */
+		unsigned endevoutnak:1;
+
+		unsigned reserved14_17:4;
+		/** In Endpoint Mis-match count */
+		unsigned epmscnt:5;
+		/** Enable Descriptor DMA in Device mode */
+		unsigned descdma:1;
+		unsigned perschintvl:2;
+		unsigned resvalid:6;
+	} b;
+} dcfg_data_t;
+
+/**
+ * This union represents the bit fields in the Device Control
+ * Register.  Read the register into the <i>d32</i> member then
+ * set/clear the bits using the <i>b</i>it elements.
+ */
+typedef union dctl_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		/** Remote Wakeup */
+		unsigned rmtwkupsig:1;
+		/** Soft Disconnect */
+		unsigned sftdiscon:1;
+		/** Global Non-Periodic IN NAK Status */
+		unsigned gnpinnaksts:1;
+		/** Global OUT NAK Status */
+		unsigned goutnaksts:1;
+		/** Test Control */
+		unsigned tstctl:3;
+		/** Set Global Non-Periodic IN NAK */
+		unsigned sgnpinnak:1;
+		/** Clear Global Non-Periodic IN NAK */
+		unsigned cgnpinnak:1;
+		/** Set Global OUT NAK */
+		unsigned sgoutnak:1;
+		/** Clear Global OUT NAK */
+		unsigned cgoutnak:1;
+
+		/** Power-On Programming Done */
+		unsigned pwronprgdone:1;
+		/** Reserved */
+		unsigned reserved:1;
+		/** Global Multi Count */
+		unsigned gmc:2;
+		/** Ignore Frame Number for ISOC EPs */
+		unsigned ifrmnum:1;
+		/** NAK on Babble */
+		unsigned nakonbble:1;
+
+		unsigned reserved17_31:15;
+	} b;
+} dctl_data_t;
+
+/**
+ * This union represents the bit fields in the Device Status
+ * Register.  Read the register into the <i>d32</i> member then
+ * set/clear the bits using the <i>b</i>it elements.
+ */
+typedef union dsts_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		/** Suspend Status */
+		unsigned suspsts:1;
+		/** Enumerated Speed */
+		unsigned enumspd:2;
+#define DWC_DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ 0
+#define DWC_DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ 1
+#define DWC_DSTS_ENUMSPD_LS_PHY_6MHZ		   2
+#define DWC_DSTS_ENUMSPD_FS_PHY_48MHZ		   3
+		/** Erratic Error */
+		unsigned errticerr:1;
+		unsigned reserved4_7:4;
+		/** Frame or Microframe Number of the received SOF */
+		unsigned soffn:14;
+		unsigned reserved22_31:10;
+	} b;
+} dsts_data_t;
+
+/**
+ * This union represents the bit fields in the Device IN EP Interrupt
+ * Register and the Device IN EP Common Mask Register.
+ *
+ * - Read the register into the <i>d32</i> member then set/clear the
+ *	 bits using the <i>b</i>it elements.
+ */
+typedef union diepint_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		/** Transfer complete mask */
+		unsigned xfercompl:1;
+		/** Endpoint disable mask */
+		unsigned epdisabled:1;
+		/** AHB Error mask */
+		unsigned ahberr:1;
+		/** TimeOUT Handshake mask (non-ISOC EPs) */
+		unsigned timeout:1;
+		/** IN Token received with TxF Empty mask */
+		unsigned intktxfemp:1;
+		/** IN Token Received with EP mismatch mask */
+		unsigned intknepmis:1;
+		/** IN Endpoint NAK Effective mask */
+		unsigned inepnakeff:1;
+		/** Reserved */
+		unsigned emptyintr:1;
+
+		unsigned txfifoundrn:1;
+
+		/** BNA Interrupt mask */
+		unsigned bna:1;
+
+		unsigned reserved10_12:3;
+		/** BNA Interrupt mask */
+		unsigned nak:1;
+
+		unsigned reserved14_31:18;
+	} b;
+} diepint_data_t;
+
+/**
+ * This union represents the bit fields in the Device IN EP
+ * Common/Dedicated Interrupt Mask Register.
+ */
+typedef union diepint_data diepmsk_data_t;
+
+/**
+ * This union represents the bit fields in the Device OUT EP Interrupt
+ * Registerand Device OUT EP Common Interrupt Mask Register.
+ *
+ * - Read the register into the <i>d32</i> member then set/clear the
+ *	 bits using the <i>b</i>it elements.
+ */
+typedef union doepint_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		/** Transfer complete */
+		unsigned xfercompl:1;
+		/** Endpoint disable  */
+		unsigned epdisabled:1;
+		/** AHB Error */
+		unsigned ahberr:1;
+		/** Setup Phase Done (contorl EPs) */
+		unsigned setup:1;
+		/** OUT Token Received when Endpoint Disabled */
+		unsigned outtknepdis:1;
+
+		unsigned stsphsercvd:1;
+		/** Back-to-Back SETUP Packets Received */
+		unsigned back2backsetup:1;
+
+		unsigned reserved7:1;
+		/** OUT packet Error */
+		unsigned outpkterr:1;
+		/** BNA Interrupt */
+		unsigned bna:1;
+
+		unsigned reserved10:1;
+		/** Packet Drop Status */
+		unsigned pktdrpsts:1;
+		/** Babble Interrupt */
+		unsigned babble:1;
+		/** NAK Interrupt */
+		unsigned nak:1;
+		/** NYET Interrupt */
+		unsigned nyet:1;
+
+		unsigned reserved15_31:17;
+	} b;
+} doepint_data_t;
+
+/**
+ * This union represents the bit fields in the Device OUT EP
+ * Common/Dedicated Interrupt Mask Register.
+ */
+typedef union doepint_data doepmsk_data_t;
+
+/**
+ * This union represents the bit fields in the Device All EP Interrupt
+ * and Mask Registers.
+ * - Read the register into the <i>d32</i> member then set/clear the
+ *	 bits using the <i>b</i>it elements.
+ */
+typedef union daint_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		/** IN Endpoint bits */
+		unsigned in:16;
+		/** OUT Endpoint bits */
+		unsigned out:16;
+	} ep;
+	struct {
+		/** IN Endpoint bits */
+		unsigned inep0:1;
+		unsigned inep1:1;
+		unsigned inep2:1;
+		unsigned inep3:1;
+		unsigned inep4:1;
+		unsigned inep5:1;
+		unsigned inep6:1;
+		unsigned inep7:1;
+		unsigned inep8:1;
+		unsigned inep9:1;
+		unsigned inep10:1;
+		unsigned inep11:1;
+		unsigned inep12:1;
+		unsigned inep13:1;
+		unsigned inep14:1;
+		unsigned inep15:1;
+		/** OUT Endpoint bits */
+		unsigned outep0:1;
+		unsigned outep1:1;
+		unsigned outep2:1;
+		unsigned outep3:1;
+		unsigned outep4:1;
+		unsigned outep5:1;
+		unsigned outep6:1;
+		unsigned outep7:1;
+		unsigned outep8:1;
+		unsigned outep9:1;
+		unsigned outep10:1;
+		unsigned outep11:1;
+		unsigned outep12:1;
+		unsigned outep13:1;
+		unsigned outep14:1;
+		unsigned outep15:1;
+	} b;
+} daint_data_t;
+
+/**
+ * This union represents the bit fields in the Device IN Token Queue
+ * Read Registers.
+ * - Read the register into the <i>d32</i> member.
+ * - READ-ONLY Register
+ */
+typedef union dtknq1_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		/** In Token Queue Write Pointer */
+		unsigned intknwptr:5;
+		/** Reserved */
+		unsigned reserved05_06:2;
+		/** write pointer has wrapped. */
+		unsigned wrap_bit:1;
+		/** EP Numbers of IN Tokens 0 ... 4 */
+		unsigned epnums0_5:24;
+	} b;
+} dtknq1_data_t;
+
+/**
+ * This union represents Threshold control Register
+ * - Read and write the register into the <i>d32</i> member.
+ * - READ-WRITABLE Register
+ */
+typedef union dthrctl_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		/** non ISO Tx Thr. Enable */
+		unsigned non_iso_thr_en:1;
+		/** ISO Tx Thr. Enable */
+		unsigned iso_thr_en:1;
+		/** Tx Thr. Length */
+		unsigned tx_thr_len:9;
+		/** AHB Threshold ratio */
+		unsigned ahb_thr_ratio:2;
+		/** Reserved */
+		unsigned reserved13_15:3;
+		/** Rx Thr. Enable */
+		unsigned rx_thr_en:1;
+		/** Rx Thr. Length */
+		unsigned rx_thr_len:9;
+		unsigned reserved26:1;
+		/** Arbiter Parking Enable*/
+		unsigned arbprken:1;
+		/** Reserved */
+		unsigned reserved28_31:4;
+	} b;
+} dthrctl_data_t;
+
+/**
+ * Device Logical IN Endpoint-Specific Registers. <i>Offsets
+ * 900h-AFCh</i>
+ *
+ * There will be one set of endpoint registers per logical endpoint
+ * implemented.
+ *
+ * <i>These registers are visible only in Device mode and must not be
+ * accessed in Host mode, as the results are unknown.</i>
+ */
+typedef struct dwc_otg_dev_in_ep_regs {
+	/** Device IN Endpoint Control Register. <i>Offset:900h +
+	 * (ep_num * 20h) + 00h</i> */
+	volatile uint32_t diepctl;
+	/** Reserved. <i>Offset:900h + (ep_num * 20h) + 04h</i> */
+	uint32_t reserved04;
+	/** Device IN Endpoint Interrupt Register. <i>Offset:900h +
+	 * (ep_num * 20h) + 08h</i> */
+	volatile uint32_t diepint;
+	/** Reserved. <i>Offset:900h + (ep_num * 20h) + 0Ch</i> */
+	uint32_t reserved0C;
+	/** Device IN Endpoint Transfer Size
+	 * Register. <i>Offset:900h + (ep_num * 20h) + 10h</i> */
+	volatile uint32_t dieptsiz;
+	/** Device IN Endpoint DMA Address Register. <i>Offset:900h +
+	 * (ep_num * 20h) + 14h</i> */
+	volatile uint32_t diepdma;
+	/** Device IN Endpoint Transmit FIFO Status Register. <i>Offset:900h +
+	 * (ep_num * 20h) + 18h</i> */
+	volatile uint32_t dtxfsts;
+	/** Device IN Endpoint DMA Buffer Register. <i>Offset:900h +
+	 * (ep_num * 20h) + 1Ch</i> */
+	volatile uint32_t diepdmab;
+} dwc_otg_dev_in_ep_regs_t;
+
+/**
+ * Device Logical OUT Endpoint-Specific Registers. <i>Offsets:
+ * B00h-CFCh</i>
+ *
+ * There will be one set of endpoint registers per logical endpoint
+ * implemented.
+ *
+ * <i>These registers are visible only in Device mode and must not be
+ * accessed in Host mode, as the results are unknown.</i>
+ */
+typedef struct dwc_otg_dev_out_ep_regs {
+	/** Device OUT Endpoint Control Register. <i>Offset:B00h +
+	 * (ep_num * 20h) + 00h</i> */
+	volatile uint32_t doepctl;
+	/** Device OUT Endpoint Frame number Register.	<i>Offset:
+	 * B00h + (ep_num * 20h) + 04h</i> */
+	volatile uint32_t doepfn;
+	/** Device OUT Endpoint Interrupt Register. <i>Offset:B00h +
+	 * (ep_num * 20h) + 08h</i> */
+	volatile uint32_t doepint;
+	/** Reserved. <i>Offset:B00h + (ep_num * 20h) + 0Ch</i> */
+	uint32_t reserved0C;
+	/** Device OUT Endpoint Transfer Size Register. <i>Offset:
+	 * B00h + (ep_num * 20h) + 10h</i> */
+	volatile uint32_t doeptsiz;
+	/** Device OUT Endpoint DMA Address Register. <i>Offset:B00h
+	 * + (ep_num * 20h) + 14h</i> */
+	volatile uint32_t doepdma;
+	/** Reserved. <i>Offset:B00h + 	 * (ep_num * 20h) + 18h</i> */
+	uint32_t unused;
+	/** Device OUT Endpoint DMA Buffer Register. <i>Offset:B00h
+	 * + (ep_num * 20h) + 1Ch</i> */
+	uint32_t doepdmab;
+} dwc_otg_dev_out_ep_regs_t;
+
+/**
+ * This union represents the bit fields in the Device EP Control
+ * Register.  Read the register into the <i>d32</i> member then
+ * set/clear the bits using the <i>b</i>it elements.
+ */
+typedef union depctl_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		/** Maximum Packet Size
+		 * IN/OUT EPn
+		 * IN/OUT EP0 - 2 bits
+		 *	 2'b00: 64 Bytes
+		 *	 2'b01: 32
+		 *	 2'b10: 16
+		 *	 2'b11: 8 */
+		unsigned mps:11;
+#define DWC_DEP0CTL_MPS_64	 0
+#define DWC_DEP0CTL_MPS_32	 1
+#define DWC_DEP0CTL_MPS_16	 2
+#define DWC_DEP0CTL_MPS_8	 3
+
+		/** Next Endpoint
+		 * IN EPn/IN EP0
+		 * OUT EPn/OUT EP0 - reserved */
+		unsigned nextep:4;
+
+		/** USB Active Endpoint */
+		unsigned usbactep:1;
+
+		/** Endpoint DPID (INTR/Bulk IN and OUT endpoints)
+		 * This field contains the PID of the packet going to
+		 * be received or transmitted on this endpoint. The
+		 * application should program the PID of the first
+		 * packet going to be received or transmitted on this
+		 * endpoint , after the endpoint is
+		 * activated. Application use the SetD1PID and
+		 * SetD0PID fields of this register to program either
+		 * D0 or D1 PID.
+		 *
+		 * The encoding for this field is
+		 *	 - 0: D0
+		 *	 - 1: D1
+		 */
+		unsigned dpid:1;
+
+		/** NAK Status */
+		unsigned naksts:1;
+
+		/** Endpoint Type
+		 *	2'b00: Control
+		 *	2'b01: Isochronous
+		 *	2'b10: Bulk
+		 *	2'b11: Interrupt */
+		unsigned eptype:2;
+
+		/** Snoop Mode
+		 * OUT EPn/OUT EP0
+		 * IN EPn/IN EP0 - reserved */
+		unsigned snp:1;
+
+		/** Stall Handshake */
+		unsigned stall:1;
+
+		/** Tx Fifo Number
+		 * IN EPn/IN EP0
+		 * OUT EPn/OUT EP0 - reserved */
+		unsigned txfnum:4;
+
+		/** Clear NAK */
+		unsigned cnak:1;
+		/** Set NAK */
+		unsigned snak:1;
+		/** Set DATA0 PID (INTR/Bulk IN and OUT endpoints)
+		 * Writing to this field sets the Endpoint DPID (DPID)
+		 * field in this register to DATA0. Set Even
+		 * (micro)frame (SetEvenFr) (ISO IN and OUT Endpoints)
+		 * Writing to this field sets the Even/Odd
+		 * (micro)frame (EO_FrNum) field to even (micro)
+		 * frame.
+		 */
+		unsigned setd0pid:1;
+		/** Set DATA1 PID (INTR/Bulk IN and OUT endpoints)
+		 * Writing to this field sets the Endpoint DPID (DPID)
+		 * field in this register to DATA1 Set Odd
+		 * (micro)frame (SetOddFr) (ISO IN and OUT Endpoints)
+		 * Writing to this field sets the Even/Odd
+		 * (micro)frame (EO_FrNum) field to odd (micro) frame.
+		 */
+		unsigned setd1pid:1;
+
+		/** Endpoint Disable */
+		unsigned epdis:1;
+		/** Endpoint Enable */
+		unsigned epena:1;
+	} b;
+} depctl_data_t;
+
+/**
+ * This union represents the bit fields in the Device EP Transfer
+ * Size Register.  Read the register into the <i>d32</i> member then
+ * set/clear the bits using the <i>b</i>it elements.
+ */
+typedef union deptsiz_data {
+		/** raw register data */
+	uint32_t d32;
+		/** register bits */
+	struct {
+		/** Transfer size */
+		unsigned xfersize:19;
+		/** Packet Count */
+		unsigned pktcnt:10;
+		/** Multi Count - Periodic IN endpoints */
+		unsigned mc:2;
+		unsigned reserved:1;
+	} b;
+} deptsiz_data_t;
+
+/**
+ * This union represents the bit fields in the Device EP 0 Transfer
+ * Size Register.  Read the register into the <i>d32</i> member then
+ * set/clear the bits using the <i>b</i>it elements.
+ */
+typedef union deptsiz0_data {
+		/** raw register data */
+	uint32_t d32;
+		/** register bits */
+	struct {
+		/** Transfer size */
+		unsigned xfersize:7;
+				/** Reserved */
+		unsigned reserved7_18:12;
+		/** Packet Count */
+		unsigned pktcnt:2;
+				/** Reserved */
+		unsigned reserved21_28:8;
+				/**Setup Packet Count (DOEPTSIZ0 Only) */
+		unsigned supcnt:2;
+		unsigned reserved31;
+	} b;
+} deptsiz0_data_t;
+
+/////////////////////////////////////////////////
+// DMA Descriptor Specific Structures
+//
+
+/** Buffer status definitions */
+
+#define BS_HOST_READY	0x0
+#define BS_DMA_BUSY		0x1
+#define BS_DMA_DONE		0x2
+#define BS_HOST_BUSY	0x3
+
+/** Receive/Transmit status definitions */
+
+#define RTS_SUCCESS		0x0
+#define RTS_BUFFLUSH	0x1
+#define RTS_RESERVED	0x2
+#define RTS_BUFERR		0x3
+
+/**
+ * This union represents the bit fields in the DMA Descriptor
+ * status quadlet. Read the quadlet into the <i>d32</i> member then
+ * set/clear the bits using the <i>b</i>it, <i>b_iso_out</i> and
+ * <i>b_iso_in</i> elements.
+ */
+typedef union dev_dma_desc_sts {
+		/** raw register data */
+	uint32_t d32;
+		/** quadlet bits */
+	struct {
+		/** Received number of bytes */
+		unsigned bytes:16;
+
+		unsigned reserved16_22:7;
+		/** Multiple Transfer - only for OUT EPs */
+		unsigned mtrf:1;
+		/** Setup Packet received - only for OUT EPs */
+		unsigned sr:1;
+		/** Interrupt On Complete */
+		unsigned ioc:1;
+		/** Short Packet */
+		unsigned sp:1;
+		/** Last */
+		unsigned l:1;
+		/** Receive Status */
+		unsigned sts:2;
+		/** Buffer Status */
+		unsigned bs:2;
+	} b;
+
+//#ifdef DWC_EN_ISOC
+		/** iso out quadlet bits */
+	struct {
+		/** Received number of bytes */
+		unsigned rxbytes:11;
+
+		unsigned reserved11:1;
+		/** Frame Number */
+		unsigned framenum:11;
+		/** Received ISO Data PID */
+		unsigned pid:2;
+		/** Interrupt On Complete */
+		unsigned ioc:1;
+		/** Short Packet */
+		unsigned sp:1;
+		/** Last */
+		unsigned l:1;
+		/** Receive Status */
+		unsigned rxsts:2;
+		/** Buffer Status */
+		unsigned bs:2;
+	} b_iso_out;
+
+		/** iso in quadlet bits */
+	struct {
+		/** Transmited number of bytes */
+		unsigned txbytes:12;
+		/** Frame Number */
+		unsigned framenum:11;
+		/** Transmited ISO Data PID */
+		unsigned pid:2;
+		/** Interrupt On Complete */
+		unsigned ioc:1;
+		/** Short Packet */
+		unsigned sp:1;
+		/** Last */
+		unsigned l:1;
+		/** Transmit Status */
+		unsigned txsts:2;
+		/** Buffer Status */
+		unsigned bs:2;
+	} b_iso_in;
+//#endif                                /* DWC_EN_ISOC */
+} dev_dma_desc_sts_t;
+
+/**
+ * DMA Descriptor structure
+ *
+ * DMA Descriptor structure contains two quadlets:
+ * Status quadlet and Data buffer pointer.
+ */
+typedef struct dwc_otg_dev_dma_desc {
+	/** DMA Descriptor status quadlet */
+	dev_dma_desc_sts_t status;
+	/** DMA Descriptor data buffer pointer */
+	uint32_t buf;
+} dwc_otg_dev_dma_desc_t;
+
+/**
+ * The dwc_otg_dev_if structure contains information needed to manage
+ * the DWC_otg controller acting in device mode. It represents the
+ * programming view of the device-specific aspects of the controller.
+ */
+typedef struct dwc_otg_dev_if {
+	/** Pointer to device Global registers.
+	 * Device Global Registers starting at offset 800h
+	 */
+	dwc_otg_device_global_regs_t *dev_global_regs;
+#define DWC_DEV_GLOBAL_REG_OFFSET 0x800
+
+	/**
+	 * Device Logical IN Endpoint-Specific Registers 900h-AFCh
+	 */
+	dwc_otg_dev_in_ep_regs_t *in_ep_regs[MAX_EPS_CHANNELS];
+#define DWC_DEV_IN_EP_REG_OFFSET 0x900
+#define DWC_EP_REG_OFFSET 0x20
+
+	/** Device Logical OUT Endpoint-Specific Registers B00h-CFCh */
+	dwc_otg_dev_out_ep_regs_t *out_ep_regs[MAX_EPS_CHANNELS];
+#define DWC_DEV_OUT_EP_REG_OFFSET 0xB00
+
+	/* Device configuration information */
+	uint8_t speed;				 /**< Device Speed	0: Unknown, 1: LS, 2:FS, 3: HS */
+	uint8_t num_in_eps;		 /**< Number # of Tx EP range: 0-15 exept ep0 */
+	uint8_t num_out_eps;		 /**< Number # of Rx EP range: 0-15 exept ep 0*/
+
+	/** Size of periodic FIFOs (Bytes) */
+	uint16_t perio_tx_fifo_size[MAX_PERIO_FIFOS];
+
+	/** Size of Tx FIFOs (Bytes) */
+	uint16_t tx_fifo_size[MAX_TX_FIFOS];
+
+	/** Thresholding enable flags and length varaiables **/
+	uint16_t rx_thr_en;
+	uint16_t iso_tx_thr_en;
+	uint16_t non_iso_tx_thr_en;
+
+	uint16_t rx_thr_length;
+	uint16_t tx_thr_length;
+
+	/**
+	 * Pointers to the DMA Descriptors for EP0 Control
+	 * transfers (virtual and physical)
+	 */
+
+	/** 2 descriptors for SETUP packets */
+	dwc_dma_t dma_setup_desc_addr[2];
+	dwc_otg_dev_dma_desc_t *setup_desc_addr[2];
+
+	/** Pointer to Descriptor with latest SETUP packet */
+	dwc_otg_dev_dma_desc_t *psetup;
+
+	/** Index of current SETUP handler descriptor */
+	uint32_t setup_desc_index;
+
+	/** Descriptor for Data In or Status In phases */
+	dwc_dma_t dma_in_desc_addr;
+	dwc_otg_dev_dma_desc_t *in_desc_addr;
+
+	/** Descriptor for Data Out or Status Out phases */
+	dwc_dma_t dma_out_desc_addr;
+	dwc_otg_dev_dma_desc_t *out_desc_addr;
+
+	/** Setup Packet Detected - if set clear NAK when queueing */
+	uint32_t spd;
+
+} dwc_otg_dev_if_t;
+
+/////////////////////////////////////////////////
+// Host Mode Register Structures
+//
+/**
+ * The Host Global Registers structure defines the size and relative
+ * field offsets for the Host Mode Global Registers.  Host Global
+ * Registers offsets 400h-7FFh.
+*/
+typedef struct dwc_otg_host_global_regs {
+	/** Host Configuration Register.   <i>Offset: 400h</i> */
+	volatile uint32_t hcfg;
+	/** Host Frame Interval Register.	<i>Offset: 404h</i> */
+	volatile uint32_t hfir;
+	/** Host Frame Number / Frame Remaining Register. <i>Offset: 408h</i> */
+	volatile uint32_t hfnum;
+	/** Reserved.	<i>Offset: 40Ch</i> */
+	uint32_t reserved40C;
+	/** Host Periodic Transmit FIFO/ Queue Status Register. <i>Offset: 410h</i> */
+	volatile uint32_t hptxsts;
+	/** Host All Channels Interrupt Register. <i>Offset: 414h</i> */
+	volatile uint32_t haint;
+	/** Host All Channels Interrupt Mask Register. <i>Offset: 418h</i> */
+	volatile uint32_t haintmsk;
+	/** Host Frame List Base Address Register . <i>Offset: 41Ch</i> */
+	volatile uint32_t hflbaddr;
+} dwc_otg_host_global_regs_t;
+
+/**
+ * This union represents the bit fields in the Host Configuration Register.
+ * Read the register into the <i>d32</i> member then set/clear the bits using
+ * the <i>b</i>it elements. Write the <i>d32</i> member to the hcfg register.
+ */
+typedef union hcfg_data {
+	/** raw register data */
+	uint32_t d32;
+
+	/** register bits */
+	struct {
+		/** FS/LS Phy Clock Select */
+		unsigned fslspclksel:2;
+#define DWC_HCFG_30_60_MHZ 0
+#define DWC_HCFG_48_MHZ	   1
+#define DWC_HCFG_6_MHZ	   2
+
+		/** FS/LS Only Support */
+		unsigned fslssupp:1;
+		unsigned reserved3_6:4;
+		/** Enable 32-KHz Suspend Mode */
+		unsigned ena32khzs:1;
+		/** Resume Validation Periiod */
+		unsigned resvalid:8;
+		unsigned reserved16_22:7;
+		/** Enable Scatter/gather DMA in Host mode */
+		unsigned descdma:1;
+		/** Frame List Entries */
+		unsigned frlisten:2;
+		/** Enable Periodic Scheduling */
+		unsigned perschedena:1;
+		unsigned reserved27_30:4;
+		unsigned modechtimen:1;
+	} b;
+} hcfg_data_t;
+
+/**
+ * This union represents the bit fields in the Host Frame Remaing/Number
+ * Register. 
+ */
+typedef union hfir_data {
+	/** raw register data */
+	uint32_t d32;
+
+	/** register bits */
+	struct {
+		unsigned frint:16;
+		unsigned hfirrldctrl:1;
+		unsigned reserved:15;
+	} b;
+} hfir_data_t;
+
+/**
+ * This union represents the bit fields in the Host Frame Remaing/Number
+ * Register. 
+ */
+typedef union hfnum_data {
+	/** raw register data */
+	uint32_t d32;
+
+	/** register bits */
+	struct {
+		unsigned frnum:16;
+#define DWC_HFNUM_MAX_FRNUM 0x3FFF
+		unsigned frrem:16;
+	} b;
+} hfnum_data_t;
+
+typedef union hptxsts_data {
+	/** raw register data */
+	uint32_t d32;
+
+	/** register bits */
+	struct {
+		unsigned ptxfspcavail:16;
+		unsigned ptxqspcavail:8;
+		/** Top of the Periodic Transmit Request Queue
+		 *	- bit 24 - Terminate (last entry for the selected channel)
+		 *	- bits 26:25 - Token Type
+		 *	  - 2'b00 - Zero length
+		 *	  - 2'b01 - Ping
+		 *	  - 2'b10 - Disable
+		 *	- bits 30:27 - Channel Number
+		 *	- bit 31 - Odd/even microframe
+		 */
+		unsigned ptxqtop_terminate:1;
+		unsigned ptxqtop_token:2;
+		unsigned ptxqtop_chnum:4;
+		unsigned ptxqtop_odd:1;
+	} b;
+} hptxsts_data_t;
+
+/**
+ * This union represents the bit fields in the Host Port Control and Status
+ * Register. Read the register into the <i>d32</i> member then set/clear the
+ * bits using the <i>b</i>it elements. Write the <i>d32</i> member to the
+ * hprt0 register.
+ */
+typedef union hprt0_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		unsigned prtconnsts:1;
+		unsigned prtconndet:1;
+		unsigned prtena:1;
+		unsigned prtenchng:1;
+		unsigned prtovrcurract:1;
+		unsigned prtovrcurrchng:1;
+		unsigned prtres:1;
+		unsigned prtsusp:1;
+		unsigned prtrst:1;
+		unsigned reserved9:1;
+		unsigned prtlnsts:2;
+		unsigned prtpwr:1;
+		unsigned prttstctl:4;
+		unsigned prtspd:2;
+#define DWC_HPRT0_PRTSPD_HIGH_SPEED 0
+#define DWC_HPRT0_PRTSPD_FULL_SPEED 1
+#define DWC_HPRT0_PRTSPD_LOW_SPEED	2
+		unsigned reserved19_31:13;
+	} b;
+} hprt0_data_t;
+
+/**
+ * This union represents the bit fields in the Host All Interrupt
+ * Register. 
+ */
+typedef union haint_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		unsigned ch0:1;
+		unsigned ch1:1;
+		unsigned ch2:1;
+		unsigned ch3:1;
+		unsigned ch4:1;
+		unsigned ch5:1;
+		unsigned ch6:1;
+		unsigned ch7:1;
+		unsigned ch8:1;
+		unsigned ch9:1;
+		unsigned ch10:1;
+		unsigned ch11:1;
+		unsigned ch12:1;
+		unsigned ch13:1;
+		unsigned ch14:1;
+		unsigned ch15:1;
+		unsigned reserved:16;
+	} b;
+
+	struct {
+		unsigned chint:16;
+		unsigned reserved:16;
+	} b2;
+} haint_data_t;
+
+/**
+ * This union represents the bit fields in the Host All Interrupt
+ * Register. 
+ */
+typedef union haintmsk_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		unsigned ch0:1;
+		unsigned ch1:1;
+		unsigned ch2:1;
+		unsigned ch3:1;
+		unsigned ch4:1;
+		unsigned ch5:1;
+		unsigned ch6:1;
+		unsigned ch7:1;
+		unsigned ch8:1;
+		unsigned ch9:1;
+		unsigned ch10:1;
+		unsigned ch11:1;
+		unsigned ch12:1;
+		unsigned ch13:1;
+		unsigned ch14:1;
+		unsigned ch15:1;
+		unsigned reserved:16;
+	} b;
+
+	struct {
+		unsigned chint:16;
+		unsigned reserved:16;
+	} b2;
+} haintmsk_data_t;
+
+/**
+ * Host Channel Specific Registers. <i>500h-5FCh</i>
+ */
+typedef struct dwc_otg_hc_regs {
+	/** Host Channel 0 Characteristic Register. <i>Offset: 500h + (chan_num * 20h) + 00h</i> */
+	volatile uint32_t hcchar;
+	/** Host Channel 0 Split Control Register. <i>Offset: 500h + (chan_num * 20h) + 04h</i> */
+	volatile uint32_t hcsplt;
+	/** Host Channel 0 Interrupt Register. <i>Offset: 500h + (chan_num * 20h) + 08h</i> */
+	volatile uint32_t hcint;
+	/** Host Channel 0 Interrupt Mask Register. <i>Offset: 500h + (chan_num * 20h) + 0Ch</i> */
+	volatile uint32_t hcintmsk;
+	/** Host Channel 0 Transfer Size Register. <i>Offset: 500h + (chan_num * 20h) + 10h</i> */
+	volatile uint32_t hctsiz;
+	/** Host Channel 0 DMA Address Register. <i>Offset: 500h + (chan_num * 20h) + 14h</i> */
+	volatile uint32_t hcdma;
+	volatile uint32_t reserved;
+	/** Host Channel 0 DMA Buffer Address Register. <i>Offset: 500h + (chan_num * 20h) + 1Ch</i> */
+	volatile uint32_t hcdmab;
+} dwc_otg_hc_regs_t;
+
+/**
+ * This union represents the bit fields in the Host Channel Characteristics
+ * Register. Read the register into the <i>d32</i> member then set/clear the
+ * bits using the <i>b</i>it elements. Write the <i>d32</i> member to the
+ * hcchar register.
+ */
+typedef union hcchar_data {
+	/** raw register data */
+	uint32_t d32;
+
+	/** register bits */
+	struct {
+		/** Maximum packet size in bytes */
+		unsigned mps:11;
+
+		/** Endpoint number */
+		unsigned epnum:4;
+
+		/** 0: OUT, 1: IN */
+		unsigned epdir:1;
+
+		unsigned reserved:1;
+
+		/** 0: Full/high speed device, 1: Low speed device */
+		unsigned lspddev:1;
+
+		/** 0: Control, 1: Isoc, 2: Bulk, 3: Intr */
+		unsigned eptype:2;
+
+		/** Packets per frame for periodic transfers. 0 is reserved. */
+		unsigned multicnt:2;
+
+		/** Device address */
+		unsigned devaddr:7;
+
+		/**
+		 * Frame to transmit periodic transaction.
+		 * 0: even, 1: odd
+		 */
+		unsigned oddfrm:1;
+
+		/** Channel disable */
+		unsigned chdis:1;
+
+		/** Channel enable */
+		unsigned chen:1;
+	} b;
+} hcchar_data_t;
+
+typedef union hcsplt_data {
+	/** raw register data */
+	uint32_t d32;
+
+	/** register bits */
+	struct {
+		/** Port Address */
+		unsigned prtaddr:7;
+
+		/** Hub Address */
+		unsigned hubaddr:7;
+
+		/** Transaction Position */
+		unsigned xactpos:2;
+#define DWC_HCSPLIT_XACTPOS_MID 0
+#define DWC_HCSPLIT_XACTPOS_END 1
+#define DWC_HCSPLIT_XACTPOS_BEGIN 2
+#define DWC_HCSPLIT_XACTPOS_ALL 3
+
+		/** Do Complete Split */
+		unsigned compsplt:1;
+
+		/** Reserved */
+		unsigned reserved:14;
+
+		/** Split Enble */
+		unsigned spltena:1;
+	} b;
+} hcsplt_data_t;
+
+/**
+ * This union represents the bit fields in the Host All Interrupt
+ * Register. 
+ */
+typedef union hcint_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		/** Transfer Complete */
+		unsigned xfercomp:1;
+		/** Channel Halted */
+		unsigned chhltd:1;
+		/** AHB Error */
+		unsigned ahberr:1;
+		/** STALL Response Received */
+		unsigned stall:1;
+		/** NAK Response Received */
+		unsigned nak:1;
+		/** ACK Response Received */
+		unsigned ack:1;
+		/** NYET Response Received */
+		unsigned nyet:1;
+		/** Transaction Err */
+		unsigned xacterr:1;
+		/** Babble Error */
+		unsigned bblerr:1;
+		/** Frame Overrun */
+		unsigned frmovrun:1;
+		/** Data Toggle Error */
+		unsigned datatglerr:1;
+		/** Buffer Not Available (only for DDMA mode) */
+		unsigned bna:1;
+		/** Exessive transaction error (only for DDMA mode) */
+		unsigned xcs_xact:1;
+		/** Frame List Rollover interrupt */
+		unsigned frm_list_roll:1;
+		/** Reserved */
+		unsigned reserved14_31:18;
+	} b;
+} hcint_data_t;
+
+/**
+ * This union represents the bit fields in the Host Channel Interrupt Mask
+ * Register. Read the register into the <i>d32</i> member then set/clear the
+ * bits using the <i>b</i>it elements. Write the <i>d32</i> member to the
+ * hcintmsk register.
+ */
+typedef union hcintmsk_data {
+	/** raw register data */
+	uint32_t d32;
+
+	/** register bits */
+	struct {
+		unsigned xfercompl:1;
+		unsigned chhltd:1;
+		unsigned ahberr:1;
+		unsigned stall:1;
+		unsigned nak:1;
+		unsigned ack:1;
+		unsigned nyet:1;
+		unsigned xacterr:1;
+		unsigned bblerr:1;
+		unsigned frmovrun:1;
+		unsigned datatglerr:1;
+		unsigned bna:1;
+		unsigned xcs_xact:1;
+		unsigned frm_list_roll:1;
+		unsigned reserved14_31:18;
+	} b;
+} hcintmsk_data_t;
+
+/**
+ * This union represents the bit fields in the Host Channel Transfer Size
+ * Register. Read the register into the <i>d32</i> member then set/clear the
+ * bits using the <i>b</i>it elements. Write the <i>d32</i> member to the
+ * hcchar register.
+ */
+
+typedef union hctsiz_data {
+	/** raw register data */
+	uint32_t d32;
+
+	/** register bits */
+	struct {
+		/** Total transfer size in bytes */
+		unsigned xfersize:19;
+
+		/** Data packets to transfer */
+		unsigned pktcnt:10;
+
+		/**
+		 * Packet ID for next data packet
+		 * 0: DATA0
+		 * 1: DATA2
+		 * 2: DATA1
+		 * 3: MDATA (non-Control), SETUP (Control)
+		 */
+		unsigned pid:2;
+#define DWC_HCTSIZ_DATA0 0
+#define DWC_HCTSIZ_DATA1 2
+#define DWC_HCTSIZ_DATA2 1
+#define DWC_HCTSIZ_MDATA 3
+#define DWC_HCTSIZ_SETUP 3
+
+		/** Do PING protocol when 1 */
+		unsigned dopng:1;
+	} b;
+
+	/** register bits */
+	struct {
+		/** Scheduling information */
+		unsigned schinfo:8;
+
+		/** Number of transfer descriptors.
+		 * Max value:
+		 * 64 in general,
+		 * 256 only for HS isochronous endpoint.
+		 */
+		unsigned ntd:8;
+
+		/** Data packets to transfer */
+		unsigned reserved16_28:13;
+
+		/**
+		 * Packet ID for next data packet
+		 * 0: DATA0
+		 * 1: DATA2
+		 * 2: DATA1
+		 * 3: MDATA (non-Control)
+		 */
+		unsigned pid:2;
+
+		/** Do PING protocol when 1 */
+		unsigned dopng:1;
+	} b_ddma;
+} hctsiz_data_t;
+
+/**
+ * This union represents the bit fields in the Host DMA Address 
+ * Register used in Descriptor DMA mode.
+ */
+typedef union hcdma_data {
+	/** raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		unsigned reserved0_2:3;
+		/** Current Transfer Descriptor. Not used for ISOC */
+		unsigned ctd:8;
+		/** Start Address of Descriptor List */
+		unsigned dma_addr:21;
+	} b;
+} hcdma_data_t;
+
+/**
+ * This union represents the bit fields in the DMA Descriptor
+ * status quadlet for host mode. Read the quadlet into the <i>d32</i> member then
+ * set/clear the bits using the <i>b</i>it elements.
+ */
+typedef union host_dma_desc_sts {
+	/** raw register data */
+	uint32_t d32;
+	/** quadlet bits */
+
+	/* for non-isochronous  */
+	struct {
+		/** Number of bytes */
+		unsigned n_bytes:17;
+		/** QTD offset to jump when Short Packet received - only for IN EPs */
+		unsigned qtd_offset:6;
+		/**
+		 * Set to request the core to jump to alternate QTD if
+		 * Short Packet received - only for IN EPs
+		 */
+		unsigned a_qtd:1;
+		 /**
+		  * Setup Packet bit. When set indicates that buffer contains
+		  * setup packet.
+		  */
+		unsigned sup:1;
+		/** Interrupt On Complete */
+		unsigned ioc:1;
+		/** End of List */
+		unsigned eol:1;
+		unsigned reserved27:1;
+		/** Rx/Tx Status */
+		unsigned sts:2;
+#define DMA_DESC_STS_PKTERR	1
+		unsigned reserved30:1;
+		/** Active Bit */
+		unsigned a:1;
+	} b;
+	/* for isochronous */
+	struct {
+		/** Number of bytes */
+		unsigned n_bytes:12;
+		unsigned reserved12_24:13;
+		/** Interrupt On Complete */
+		unsigned ioc:1;
+		unsigned reserved26_27:2;
+		/** Rx/Tx Status */
+		unsigned sts:2;
+		unsigned reserved30:1;
+		/** Active Bit */
+		unsigned a:1;
+	} b_isoc;
+} host_dma_desc_sts_t;
+
+#define	MAX_DMA_DESC_SIZE		131071
+#define MAX_DMA_DESC_NUM_GENERIC	64
+#define MAX_DMA_DESC_NUM_HS_ISOC	256
+#define MAX_FRLIST_EN_NUM		64
+/**
+ * Host-mode DMA Descriptor structure
+ *
+ * DMA Descriptor structure contains two quadlets:
+ * Status quadlet and Data buffer pointer.
+ */
+typedef struct dwc_otg_host_dma_desc {
+	/** DMA Descriptor status quadlet */
+	host_dma_desc_sts_t status;
+	/** DMA Descriptor data buffer pointer */
+	uint32_t buf;
+} dwc_otg_host_dma_desc_t;
+
+/** OTG Host Interface Structure.
+ *
+ * The OTG Host Interface Structure structure contains information
+ * needed to manage the DWC_otg controller acting in host mode. It
+ * represents the programming view of the host-specific aspects of the
+ * controller.
+ */
+typedef struct dwc_otg_host_if {
+	/** Host Global Registers starting at offset 400h.*/
+	dwc_otg_host_global_regs_t *host_global_regs;
+#define DWC_OTG_HOST_GLOBAL_REG_OFFSET 0x400
+
+	/** Host Port 0 Control and Status Register */
+	volatile uint32_t *hprt0;
+#define DWC_OTG_HOST_PORT_REGS_OFFSET 0x440
+
+	/** Host Channel Specific Registers at offsets 500h-5FCh. */
+	dwc_otg_hc_regs_t *hc_regs[MAX_EPS_CHANNELS];
+#define DWC_OTG_HOST_CHAN_REGS_OFFSET 0x500
+#define DWC_OTG_CHAN_REGS_OFFSET 0x20
+
+	/* Host configuration information */
+	/** Number of Host Channels (range: 1-16) */
+	uint8_t num_host_channels;
+	/** Periodic EPs supported (0: no, 1: yes) */
+	uint8_t perio_eps_supported;
+	/** Periodic Tx FIFO Size (Only 1 host periodic Tx FIFO) */
+	uint16_t perio_tx_fifo_size;
+
+} dwc_otg_host_if_t;
+
+/**
+ * This union represents the bit fields in the Power and Clock Gating Control
+ * Register. Read the register into the <i>d32</i> member then set/clear the
+ * bits using the <i>b</i>it elements.
+ */
+typedef union pcgcctl_data {
+	/** raw register data */
+	uint32_t d32;
+
+	/** register bits */
+	struct {
+		/** Stop Pclk */
+		unsigned stoppclk:1;
+		/** Gate Hclk */
+		unsigned gatehclk:1;
+		/** Power Clamp */
+		unsigned pwrclmp:1;
+		/** Reset Power Down Modules */
+		unsigned rstpdwnmodule:1;
+		/** Reserved */
+		unsigned reserved:1;
+		/** Enable Sleep Clock Gating (Enbl_L1Gating) */
+		unsigned enbl_sleep_gating:1;
+		/** PHY In Sleep (PhySleep) */
+		unsigned phy_in_sleep:1;
+		/** Deep Sleep*/
+		unsigned deep_sleep:1;
+		unsigned resetaftsusp:1;
+		unsigned restoremode:1;
+		unsigned reserved10_12:3;
+		unsigned ess_reg_restored:1;
+		unsigned prt_clk_sel:2;
+		unsigned port_power:1;
+		unsigned max_xcvrselect:2;
+		unsigned max_termsel:1;
+		unsigned mac_dev_addr:7;
+		unsigned p2hd_dev_enum_spd:2;
+		unsigned p2hd_prt_spd:2;
+		unsigned if_dev_mode:1;
+	} b;
+} pcgcctl_data_t;
+
+/**
+ * This union represents the bit fields in the Global Data FIFO Software Configuration Register.
+ * Read the register into the <i>d32</i> member then set/clear the
+ * bits using the <i>b</i>it elements.
+ */
+typedef union gdfifocfg_data {
+	/* raw register data */
+	uint32_t d32;
+	/** register bits */
+	struct {
+		/** OTG Data FIFO depth */
+		unsigned gdfifocfg:16;
+		/** Start address of EP info controller */
+		unsigned epinfobase:16;
+	} b;
+} gdfifocfg_data_t;
+
+/**
+ * This union represents the bit fields in the Global Power Down Register
+ * Register. Read the register into the <i>d32</i> member then set/clear the
+ * bits using the <i>b</i>it elements.
+ */
+typedef union gpwrdn_data {
+	/* raw register data */
+	uint32_t d32;
+
+	/** register bits */
+	struct {
+		/** PMU Interrupt Select */
+		unsigned pmuintsel:1;
+		/** PMU Active */
+		unsigned pmuactv:1;
+		/** Restore */
+		unsigned restore:1;
+		/** Power Down Clamp */
+		unsigned pwrdnclmp:1;
+		/** Power Down Reset */
+		unsigned pwrdnrstn:1;
+		/** Power Down Switch */
+		unsigned pwrdnswtch:1;
+		/** Disable VBUS */
+		unsigned dis_vbus:1;
+		/** Line State Change */
+		unsigned lnstschng:1;
+		/** Line state change mask */
+		unsigned lnstchng_msk:1;
+		/** Reset Detected */
+		unsigned rst_det:1;
+		/** Reset Detect mask */
+		unsigned rst_det_msk:1;
+		/** Disconnect Detected */
+		unsigned disconn_det:1;
+		/** Disconnect Detect mask */
+		unsigned disconn_det_msk:1;
+		/** Connect Detected*/
+		unsigned connect_det:1;
+		/** Connect Detected Mask*/
+		unsigned connect_det_msk:1;
+		/** SRP Detected */
+		unsigned srp_det:1;
+		/** SRP Detect mask */
+		unsigned srp_det_msk:1;
+		/** Status Change Interrupt */
+		unsigned sts_chngint:1;
+		/** Status Change Interrupt Mask */
+		unsigned sts_chngint_msk:1;
+		/** Line State */
+		unsigned linestate:2;
+		/** Indicates current mode(status of IDDIG signal) */
+		unsigned idsts:1;
+		/** B Session Valid signal status*/
+		unsigned bsessvld:1;
+		/** ADP Event Detected */
+		unsigned adp_int:1;
+		/** Multi Valued ID pin */
+		unsigned mult_val_id_bc:5;
+		/** Reserved 24_31 */
+		unsigned reserved29_31:3;
+	} b;
+} gpwrdn_data_t;
+
+#endif
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/lm.c linux-3.0.82x/drivers/usb/gadget/dwc/driver/lm.c
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/lm.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/lm.c	2017-09-23 03:42:50.242674379 +0800
@@ -0,0 +1,141 @@
+#include <linux/platform_device.h>
+#include <linux/module.h>
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/slab.h>
+
+#define to_lm_device(d)	container_of(d, struct lm_device, dev)
+#define to_lm_driver(d)	container_of(d, struct lm_driver, drv)
+#include "lm.h"
+
+static int dwc_otg_platform_driver_probe( struct platform_device *_dev);
+static int dwc_otg_platform_driver_remove( struct platform_device *_dev);
+
+static const char dwc_driver_name[] = "dwc_otg";
+static struct platform_driver dwc_otg_platform_driver = {
+	.driver = {
+		.name = (char *)dwc_driver_name,
+		},
+	.probe = dwc_otg_platform_driver_probe,
+	.remove = dwc_otg_platform_driver_remove,
+};
+
+
+static int dwc_otg_platform_driver_remove(
+     struct platform_device *_dev
+)
+{
+	return 0;
+}
+
+struct lm_device lm_device;
+static int dwc_otg_platform_driver_probe(
+struct platform_device *_dev
+)
+{
+	int irq;
+	irq = _dev->resource[1].start;
+	lm_device.irq = irq;
+	lm_device.resource = _dev->resource[0];
+	lm_device.id = _dev->id;
+	lm_device.dev.dma_mask = _dev->dev.dma_mask;
+	return lm_device_register(&lm_device);
+}
+
+
+
+//--------------------
+
+
+
+static int lm_match(struct device *dev, struct device_driver *drv)
+{
+	return 1;
+}
+
+static int lm_bus_probe(struct device *dev)
+{
+	struct lm_device *lmdev = to_lm_device(dev);
+	struct lm_driver *lmdrv = to_lm_driver(dev->driver);
+
+	return lmdrv->probe(lmdev);
+}
+
+static int lm_bus_remove(struct device *dev)
+{
+	struct lm_device *lmdev = to_lm_device(dev);
+	struct lm_driver *lmdrv = to_lm_driver(dev->driver);
+
+	if (lmdrv->remove)
+		lmdrv->remove(lmdev);
+	return 0;
+}
+
+static struct bus_type lm_bustype = {
+	.name		= "logicmodule",
+	.match		= lm_match,
+	.probe		= lm_bus_probe,
+	.remove		= lm_bus_remove,
+//	.suspend	= lm_bus_suspend,
+//	.resume		= lm_bus_resume,
+};
+
+static int __init lm_init(void)
+{
+	int retval;
+	retval = bus_register(&lm_bustype);
+	if(retval) {
+		printk("%s:%d bus register error!\n",__func__, __LINE__);
+		goto err;
+	}
+	retval = platform_driver_register(&dwc_otg_platform_driver);
+err:
+	return retval;
+}
+
+postcore_initcall(lm_init);
+
+int lm_driver_register(struct lm_driver *drv)
+{
+	drv->drv.bus = &lm_bustype;
+	return driver_register(&drv->drv);
+}
+
+void lm_driver_unregister(struct lm_driver *drv)
+{
+	driver_unregister(&drv->drv);
+}
+
+static void lm_device_release(struct device *dev)
+{
+	struct lm_device *d = to_lm_device(dev);
+
+	kfree(d);
+}
+
+int lm_device_register(struct lm_device *dev)
+{
+	int ret;
+
+	dev->dev.release = lm_device_release;
+	dev->dev.bus = &lm_bustype;
+
+	ret = dev_set_name(&dev->dev, "lm%d", dev->id);
+	if (ret)
+		return ret;
+	dev->resource.name = dev_name(&dev->dev);
+
+//	ret = request_resource(&iomem_resource, &dev->resource);
+	if (ret == 0) {
+		ret = device_register(&dev->dev);
+		if (ret)
+			release_resource(&dev->resource);
+	}
+	return ret;
+}
+
+EXPORT_SYMBOL(lm_driver_register);
+EXPORT_SYMBOL(lm_driver_unregister);
+MODULE_LICENSE("GPL");
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/lm.h linux-3.0.82x/drivers/usb/gadget/dwc/driver/lm.h
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/lm.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/lm.h	2017-09-23 03:42:50.242674379 +0800
@@ -0,0 +1,24 @@
+struct lm_device {
+	struct device		dev;
+	struct resource		resource;
+	unsigned int		irq;
+	unsigned int		id;
+};
+
+struct lm_driver {
+	struct device_driver	drv;
+	int			(*probe)(struct lm_device *);
+	void			(*remove)(struct lm_device *);
+	int			(*suspend)(struct lm_device *, pm_message_t);
+	int			(*resume)(struct lm_device *);
+};
+
+int lm_driver_register(struct lm_driver *drv);
+void lm_driver_unregister(struct lm_driver *drv);
+
+int lm_device_register(struct lm_device *dev);
+
+#define lm_get_drvdata(lm)	dev_get_drvdata(&(lm)->dev)
+#define lm_set_drvdata(lm,d)	dev_set_drvdata(&(lm)->dev, d)
+#define set_irq_type(...)
+#define SZ_256K 0x1000 //(_dev->resource.end - _dev->resource.start + 1)
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/driver/Makefile linux-3.0.82x/drivers/usb/gadget/dwc/driver/Makefile
--- linux-3.0.82/drivers/usb/gadget/dwc/driver/Makefile	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/driver/Makefile	2017-09-23 03:42:50.242674379 +0800
@@ -0,0 +1,34 @@
+#
+# Makefile for DWC_otg Highspeed USB controller driver
+#
+
+# Use the BUS_INTERFACE variable to compile the software for either 
+# PCI(PCI_INTERFACE) or LM(LM_INTERFACE) bus.
+BUS_INTERFACE	= -DLM_INTERFACE
+
+PORTLIB		:= drivers/usb/gadget/dwc/dwc_common_port
+EXTRA_CFLAGS	+= -DDEBUG  -DVERBOSE
+
+# Use one of the following flags to compile the software in host-only or
+# device-only mode.
+#EXTRA_CFLAGS        += -DDWC_HOST_ONLY
+#EXTRA_CFLAGS        += -DDWC_DEVICE_ONLY
+
+EXREA_CFLAGS	+= -Dlinux -DDWC_HS_ELECT_TST
+#EXTRA_CFLAGS	+= -DDWC_EN_ISOC
+EXTRA_CFLAGS   	+= -I$(PORTLIB)
+EXTRA_CFLAGS   	+= -DDWC_LINUX
+EXTRA_CFLAGS   	+= $(CFI)
+EXTRA_CFLAGS	+= $(BUS_INTERFACE)
+EXTRA_CFLAGS	+= -DDWC_DEV_SRPCAP
+
+obj-y	:= dwc_otg.o lm.o
+
+dwc_otg-objs	:= dwc_otg_driver.o dwc_otg_attr.o 
+dwc_otg-objs	+= dwc_otg_cil.o dwc_otg_cil_intr.o 
+dwc_otg-objs	+= dwc_otg_pcd_linux.o dwc_otg_pcd.o dwc_otg_pcd_intr.o 
+dwc_otg-objs	+= dwc_otg_hcd.o dwc_otg_hcd_linux.o dwc_otg_hcd_intr.o dwc_otg_hcd_queue.o dwc_otg_hcd_ddma.o
+dwc_otg-objs	+= dwc_otg_adp.o
+ifneq ($(CFI),)
+dwc_otg-objs	+= dwc_otg_cfi.o
+endif
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_cc.c linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_cc.c
--- linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_cc.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_cc.c	2017-09-23 03:42:50.242674379 +0800
@@ -0,0 +1,532 @@
+/* =========================================================================
+ * $File: //dwh/usb_iip/dev/software/dwc_common_port_2/dwc_cc.c $
+ * $Revision: #4 $
+ * $Date: 2010/11/04 $
+ * $Change: 1621692 $
+ *
+ * Synopsys Portability Library Software and documentation
+ * (hereinafter, "Software") is an Unsupported proprietary work of
+ * Synopsys, Inc. unless otherwise expressly agreed to in writing
+ * between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product
+ * under any End User Software License Agreement or Agreement for
+ * Licensed Product with Synopsys or any supplement thereto. You are
+ * permitted to use and redistribute this Software in source and binary
+ * forms, with or without modification, provided that redistributions
+ * of source code must retain this notice. You may not view, use,
+ * disclose, copy or distribute this file or any information contained
+ * herein except pursuant to this license grant from Synopsys. If you
+ * do not agree with this notice, including the disclaimer below, then
+ * you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL
+ * SYNOPSYS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================= */
+#ifdef DWC_CCLIB
+
+#include "dwc_cc.h"
+
+typedef struct dwc_cc
+{
+	uint32_t uid;
+	uint8_t chid[16];
+	uint8_t cdid[16];
+	uint8_t ck[16];
+	uint8_t *name;
+	uint8_t length;
+        DWC_CIRCLEQ_ENTRY(dwc_cc) list_entry;
+} dwc_cc_t;
+
+DWC_CIRCLEQ_HEAD(context_list, dwc_cc);
+
+/** The main structure for CC management.  */
+struct dwc_cc_if
+{
+	dwc_mutex_t *mutex;
+	char *filename;
+
+	unsigned is_host:1;
+
+	dwc_notifier_t *notifier;
+
+	struct context_list list;
+};
+
+#ifdef DEBUG
+static inline void dump_bytes(char *name, uint8_t *bytes, int len)
+{
+	int i;
+	DWC_PRINTF("%s: ", name);
+	for (i=0; i<len; i++) {
+		DWC_PRINTF("%02x ", bytes[i]);
+	}
+	DWC_PRINTF("\n");
+}
+#else
+#define dump_bytes(x...)
+#endif
+
+static dwc_cc_t *alloc_cc(void *mem_ctx, uint8_t *name, uint32_t length)
+{
+	dwc_cc_t *cc = dwc_alloc(mem_ctx, sizeof(dwc_cc_t));
+	if (!cc) {
+		return NULL;
+	}
+	DWC_MEMSET(cc, 0, sizeof(dwc_cc_t));
+
+	if (name) {
+		cc->length = length;
+		cc->name = dwc_alloc(mem_ctx, length);
+		if (!cc->name) {
+			dwc_free(mem_ctx, cc);
+			return NULL;
+		}
+
+		DWC_MEMCPY(cc->name, name, length);
+	}
+
+	return cc;
+}
+
+static void free_cc(void *mem_ctx, dwc_cc_t *cc)
+{
+	if (cc->name) {
+		dwc_free(mem_ctx, cc->name);
+	}
+	dwc_free(mem_ctx, cc);
+}
+
+static uint32_t next_uid(dwc_cc_if_t *cc_if)
+{
+	uint32_t uid = 0;
+	dwc_cc_t *cc;
+	DWC_CIRCLEQ_FOREACH(cc, &cc_if->list, list_entry) {
+		if (cc->uid > uid) {
+			uid = cc->uid;
+		}
+	}
+
+	if (uid == 0) {
+		uid = 255;
+	}
+
+	return uid + 1;
+}
+
+static dwc_cc_t *cc_find(dwc_cc_if_t *cc_if, uint32_t uid)
+{
+	dwc_cc_t *cc;
+	DWC_CIRCLEQ_FOREACH(cc, &cc_if->list, list_entry) {
+		if (cc->uid == uid) {
+			return cc;
+		}
+	}
+	return NULL;
+}
+
+static unsigned int cc_data_size(dwc_cc_if_t *cc_if)
+{
+	unsigned int size = 0;
+	dwc_cc_t *cc;
+	DWC_CIRCLEQ_FOREACH(cc, &cc_if->list, list_entry) {
+		size += (48 + 1);
+		if (cc->name) {
+			size += cc->length;
+		}
+	}
+	return size;
+}
+
+static uint32_t cc_match_chid(dwc_cc_if_t *cc_if, uint8_t *chid)
+{
+	uint32_t uid = 0;
+	dwc_cc_t *cc;
+
+	DWC_CIRCLEQ_FOREACH(cc, &cc_if->list, list_entry) {
+		if (DWC_MEMCMP(cc->chid, chid, 16) == 0) {
+			uid = cc->uid;
+			break;
+		}
+	}
+	return uid;
+}
+static uint32_t cc_match_cdid(dwc_cc_if_t *cc_if, uint8_t *cdid)
+{
+	uint32_t uid = 0;
+	dwc_cc_t *cc;
+
+	DWC_CIRCLEQ_FOREACH(cc, &cc_if->list, list_entry) {
+		if (DWC_MEMCMP(cc->cdid, cdid, 16) == 0) {
+			uid = cc->uid;
+			break;
+		}
+	}
+	return uid;
+}
+
+/* Internal cc_add */
+static int32_t cc_add(void *mem_ctx, dwc_cc_if_t *cc_if, uint8_t *chid,
+		      uint8_t *cdid, uint8_t *ck, uint8_t *name, uint8_t length)
+{
+	dwc_cc_t *cc;
+	uint32_t uid;
+
+	if (cc_if->is_host) {
+		uid = cc_match_cdid(cc_if, cdid);
+	}
+	else {
+		uid = cc_match_chid(cc_if, chid);
+	}
+
+	if (uid) {
+		DWC_DEBUG("Replacing previous connection context id=%d name=%p name_len=%d", uid, name, length);
+		cc = cc_find(cc_if, uid);
+	}
+	else {
+		cc = alloc_cc(mem_ctx, name, length);
+		cc->uid = next_uid(cc_if);
+		DWC_CIRCLEQ_INSERT_TAIL(&cc_if->list, cc, list_entry);
+	}
+
+	DWC_MEMCPY(&(cc->chid[0]), chid, 16);
+	DWC_MEMCPY(&(cc->cdid[0]), cdid, 16);
+	DWC_MEMCPY(&(cc->ck[0]), ck, 16);
+
+	DWC_DEBUG("Added connection context id=%d name=%p name_len=%d", cc->uid, name, length);
+	dump_bytes("CHID", cc->chid, 16);
+	dump_bytes("CDID", cc->cdid, 16);
+	dump_bytes("CK", cc->ck, 16);
+	return cc->uid;
+}
+
+/* Internal cc_clear */
+static void cc_clear(void *mem_ctx, dwc_cc_if_t *cc_if)
+{
+	while (!DWC_CIRCLEQ_EMPTY(&cc_if->list)) {
+		dwc_cc_t *cc = DWC_CIRCLEQ_FIRST(&cc_if->list);
+		DWC_CIRCLEQ_REMOVE_INIT(&cc_if->list, cc, list_entry);
+		free_cc(mem_ctx, cc);
+	}
+}
+
+dwc_cc_if_t *dwc_cc_if_alloc(void *mem_ctx, void *mtx_ctx, 
+			     dwc_notifier_t *notifier, unsigned is_host)
+{
+	dwc_cc_if_t *cc_if = NULL;
+
+	/* Allocate a common_cc_if structure */
+	cc_if = dwc_alloc(mem_ctx, sizeof(dwc_cc_if_t));
+
+	if (!cc_if)
+		return NULL;
+
+#if (defined(DWC_LINUX) && defined(CONFIG_DEBUG_MUTEXES))
+	DWC_MUTEX_ALLOC_LINUX_DEBUG(cc_if->mutex);
+#else
+	cc_if->mutex = dwc_mutex_alloc(mtx_ctx);
+#endif
+	if (!cc_if->mutex) {
+		dwc_free(mem_ctx, cc_if);
+		return NULL;
+	}
+
+	DWC_CIRCLEQ_INIT(&cc_if->list);
+	cc_if->is_host = is_host;
+	cc_if->notifier = notifier;
+	return cc_if;
+}
+
+void dwc_cc_if_free(void *mem_ctx, void *mtx_ctx, dwc_cc_if_t *cc_if)
+{
+#if (defined(DWC_LINUX) && defined(CONFIG_DEBUG_MUTEXES))
+	DWC_MUTEX_FREE(cc_if->mutex);
+#else
+	dwc_mutex_free(mtx_ctx, cc_if->mutex);
+#endif
+	cc_clear(mem_ctx, cc_if);
+	dwc_free(mem_ctx, cc_if);
+}
+
+static void cc_changed(dwc_cc_if_t *cc_if)
+{
+	if (cc_if->notifier) {
+		dwc_notify(cc_if->notifier, DWC_CC_LIST_CHANGED_NOTIFICATION, cc_if);
+	}
+}
+
+void dwc_cc_clear(void *mem_ctx, dwc_cc_if_t *cc_if)
+{
+	DWC_MUTEX_LOCK(cc_if->mutex);
+	cc_clear(mem_ctx, cc_if);
+	DWC_MUTEX_UNLOCK(cc_if->mutex);
+	cc_changed(cc_if);
+}
+
+int32_t dwc_cc_add(void *mem_ctx, dwc_cc_if_t *cc_if, uint8_t *chid,
+		   uint8_t *cdid, uint8_t *ck, uint8_t *name, uint8_t length)
+{
+	uint32_t uid;
+
+	DWC_MUTEX_LOCK(cc_if->mutex);
+	uid = cc_add(mem_ctx, cc_if, chid, cdid, ck, name, length);
+	DWC_MUTEX_UNLOCK(cc_if->mutex);
+	cc_changed(cc_if);
+
+	return uid;
+}
+
+void dwc_cc_change(void *mem_ctx, dwc_cc_if_t *cc_if, int32_t id, uint8_t *chid,
+		   uint8_t *cdid, uint8_t *ck, uint8_t *name, uint8_t length)
+{
+	dwc_cc_t* cc;
+
+	DWC_DEBUG("Change connection context %d", id);
+
+	DWC_MUTEX_LOCK(cc_if->mutex);
+	cc = cc_find(cc_if, id);
+	if (!cc) {
+		DWC_ERROR("Uid %d not found in cc list\n", id);
+		DWC_MUTEX_UNLOCK(cc_if->mutex);
+		return;
+	}
+
+	if (chid) {
+		DWC_MEMCPY(&(cc->chid[0]), chid, 16);
+	}
+	if (cdid) {
+		DWC_MEMCPY(&(cc->cdid[0]), cdid, 16);
+	}
+	if (ck) {
+		DWC_MEMCPY(&(cc->ck[0]), ck, 16);
+	}
+
+	if (name) {
+		if (cc->name) {
+			dwc_free(mem_ctx, cc->name);
+		}
+		cc->name = dwc_alloc(mem_ctx, length);
+		if (!cc->name) {
+			DWC_ERROR("Out of memory in dwc_cc_change()\n");
+			DWC_MUTEX_UNLOCK(cc_if->mutex);
+			return;
+		}
+		cc->length = length;
+		DWC_MEMCPY(cc->name, name, length);
+	}
+
+	DWC_MUTEX_UNLOCK(cc_if->mutex);
+
+	cc_changed(cc_if);
+
+	DWC_DEBUG("Changed connection context id=%d\n", id);
+	dump_bytes("New CHID", cc->chid, 16);
+	dump_bytes("New CDID", cc->cdid, 16);
+	dump_bytes("New CK", cc->ck, 16);
+}
+
+void dwc_cc_remove(void *mem_ctx, dwc_cc_if_t *cc_if, int32_t id)
+{
+	dwc_cc_t *cc;
+
+	DWC_DEBUG("Removing connection context %d", id);
+
+	DWC_MUTEX_LOCK(cc_if->mutex);
+	cc = cc_find(cc_if, id);
+	if (!cc) {
+		DWC_ERROR("Uid %d not found in cc list\n", id);
+		DWC_MUTEX_UNLOCK(cc_if->mutex);
+		return;
+	}
+
+	DWC_CIRCLEQ_REMOVE_INIT(&cc_if->list, cc, list_entry);
+	DWC_MUTEX_UNLOCK(cc_if->mutex);
+	free_cc(mem_ctx, cc);
+
+	cc_changed(cc_if);
+}
+
+uint8_t *dwc_cc_data_for_save(void *mem_ctx, dwc_cc_if_t *cc_if, unsigned int *length)
+{
+	uint8_t *buf, *x;
+	uint8_t zero = 0;
+	dwc_cc_t *cc;
+
+	DWC_MUTEX_LOCK(cc_if->mutex);
+	*length = cc_data_size(cc_if);
+	if (!(*length)) {
+		DWC_MUTEX_UNLOCK(cc_if->mutex);
+		return NULL;
+	}
+
+	DWC_DEBUG("Creating data for saving (length=%d)", *length);
+
+	buf = dwc_alloc(mem_ctx, *length);
+	if (!buf) {
+		*length = 0;
+		DWC_MUTEX_UNLOCK(cc_if->mutex);
+		return NULL;
+	}
+
+	x = buf;
+	DWC_CIRCLEQ_FOREACH(cc, &cc_if->list, list_entry) {
+		DWC_MEMCPY(x, cc->chid, 16);
+		x += 16;
+		DWC_MEMCPY(x, cc->cdid, 16);
+		x += 16;
+		DWC_MEMCPY(x, cc->ck, 16);
+		x += 16;
+		if (cc->name) {
+			DWC_MEMCPY(x, &cc->length, 1);
+			x += 1;
+			DWC_MEMCPY(x, cc->name, cc->length);
+			x += cc->length;
+		}
+		else {
+			DWC_MEMCPY(x, &zero, 1);
+			x += 1;
+		}
+	}
+	DWC_MUTEX_UNLOCK(cc_if->mutex);
+
+	return buf;
+}
+
+void dwc_cc_restore_from_data(void *mem_ctx, dwc_cc_if_t *cc_if, uint8_t *data, uint32_t length)
+{
+	uint8_t name_length;
+	uint8_t *name;
+	uint8_t *chid;
+	uint8_t *cdid;
+	uint8_t *ck;
+	uint32_t i = 0;
+
+	DWC_MUTEX_LOCK(cc_if->mutex);
+	cc_clear(mem_ctx, cc_if);
+
+	while (i < length) {
+		chid = &data[i];
+		i += 16;
+		cdid = &data[i];
+		i += 16;
+		ck = &data[i];
+		i += 16;
+
+		name_length = data[i];
+		i ++;
+
+		if (name_length) {
+			name = &data[i];
+			i += name_length;
+		}
+		else {
+			name = NULL;
+		}
+
+		/* check to see if we haven't overflown the buffer */
+		if (i > length) {
+			DWC_ERROR("Data format error while attempting to load CCs "
+				  "(nlen=%d, iter=%d, buflen=%d).\n", name_length, i, length);
+			break;
+		}
+
+		cc_add(mem_ctx, cc_if, chid, cdid, ck, name, name_length);
+	}
+	DWC_MUTEX_UNLOCK(cc_if->mutex);
+
+	cc_changed(cc_if);
+}
+
+uint32_t dwc_cc_match_chid(dwc_cc_if_t *cc_if, uint8_t *chid)
+{
+	uint32_t uid = 0;
+
+	DWC_MUTEX_LOCK(cc_if->mutex);
+	uid = cc_match_chid(cc_if, chid);
+	DWC_MUTEX_UNLOCK(cc_if->mutex);
+	return uid;
+}
+uint32_t dwc_cc_match_cdid(dwc_cc_if_t *cc_if, uint8_t *cdid)
+{
+	uint32_t uid = 0;
+
+	DWC_MUTEX_LOCK(cc_if->mutex);
+	uid = cc_match_cdid(cc_if, cdid);
+	DWC_MUTEX_UNLOCK(cc_if->mutex);
+	return uid;
+}
+
+uint8_t *dwc_cc_ck(dwc_cc_if_t *cc_if, int32_t id)
+{
+	uint8_t *ck = NULL;
+	dwc_cc_t *cc;
+
+	DWC_MUTEX_LOCK(cc_if->mutex);
+	cc = cc_find(cc_if, id);
+	if (cc) {
+		ck = cc->ck;
+	}
+	DWC_MUTEX_UNLOCK(cc_if->mutex);
+
+	return ck;
+
+}
+
+uint8_t *dwc_cc_chid(dwc_cc_if_t *cc_if, int32_t id)
+{
+	uint8_t *retval = NULL;
+	dwc_cc_t *cc;
+
+	DWC_MUTEX_LOCK(cc_if->mutex);
+	cc = cc_find(cc_if, id);
+	if (cc) {
+		retval = cc->chid;
+	}
+	DWC_MUTEX_UNLOCK(cc_if->mutex);
+
+	return retval;
+}
+
+uint8_t *dwc_cc_cdid(dwc_cc_if_t *cc_if, int32_t id)
+{
+	uint8_t *retval = NULL;
+	dwc_cc_t *cc;
+
+	DWC_MUTEX_LOCK(cc_if->mutex);
+	cc = cc_find(cc_if, id);
+	if (cc) {
+		retval = cc->cdid;
+	}
+	DWC_MUTEX_UNLOCK(cc_if->mutex);
+
+	return retval;
+}
+
+uint8_t *dwc_cc_name(dwc_cc_if_t *cc_if, int32_t id, uint8_t *length)
+{
+	uint8_t *retval = NULL;
+	dwc_cc_t *cc;
+
+	DWC_MUTEX_LOCK(cc_if->mutex);
+	*length = 0;
+	cc = cc_find(cc_if, id);
+	if (cc) {
+		*length = cc->length;
+		retval = cc->name;
+	}
+	DWC_MUTEX_UNLOCK(cc_if->mutex);
+
+	return retval;
+}
+
+#endif	/* DWC_CCLIB */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_cc.h linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_cc.h
--- linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_cc.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_cc.h	2017-09-23 03:42:50.242674379 +0800
@@ -0,0 +1,225 @@
+/* =========================================================================
+ * $File: //dwh/usb_iip/dev/software/dwc_common_port_2/dwc_cc.h $
+ * $Revision: #4 $
+ * $Date: 2010/09/28 $
+ * $Change: 1596182 $
+ *
+ * Synopsys Portability Library Software and documentation
+ * (hereinafter, "Software") is an Unsupported proprietary work of
+ * Synopsys, Inc. unless otherwise expressly agreed to in writing
+ * between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product
+ * under any End User Software License Agreement or Agreement for
+ * Licensed Product with Synopsys or any supplement thereto. You are
+ * permitted to use and redistribute this Software in source and binary
+ * forms, with or without modification, provided that redistributions
+ * of source code must retain this notice. You may not view, use,
+ * disclose, copy or distribute this file or any information contained
+ * herein except pursuant to this license grant from Synopsys. If you
+ * do not agree with this notice, including the disclaimer below, then
+ * you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL
+ * SYNOPSYS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================= */
+#ifndef _DWC_CC_H_
+#define _DWC_CC_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @file
+ *
+ * This file defines the Context Context library.
+ *
+ * The main data structure is dwc_cc_if_t which is returned by either the
+ * dwc_cc_if_alloc function or returned by the module to the user via a provided
+ * function. The data structure is opaque and should only be manipulated via the
+ * functions provied in this API.
+ *
+ * It manages a list of connection contexts and operations can be performed to
+ * add, remove, query, search, and change, those contexts.  Additionally,
+ * a dwc_notifier_t object can be requested from the manager so that
+ * the user can be notified whenever the context list has changed.
+ */
+
+#include "dwc_os.h"
+#include "dwc_list.h"
+#include "dwc_notifier.h"
+
+
+/* Notifications */
+#define DWC_CC_LIST_CHANGED_NOTIFICATION "DWC_CC_LIST_CHANGED_NOTIFICATION"
+
+struct dwc_cc_if;
+typedef struct dwc_cc_if dwc_cc_if_t;
+
+
+/** @name Connection Context Operations */
+/** @{ */
+
+/** This function allocates memory for a dwc_cc_if_t structure, initializes
+ * fields to default values, and returns a pointer to the structure or NULL on
+ * error. */
+extern dwc_cc_if_t *dwc_cc_if_alloc(void *mem_ctx, void *mtx_ctx,
+				    dwc_notifier_t *notifier, unsigned is_host);
+
+/** Frees the memory for the specified CC structure allocated from
+ * dwc_cc_if_alloc(). */
+extern void dwc_cc_if_free(void *mem_ctx, void *mtx_ctx, dwc_cc_if_t *cc_if);
+
+/** Removes all contexts from the connection context list */
+extern void dwc_cc_clear(void *mem_ctx, dwc_cc_if_t *cc_if);
+
+/** Adds a connection context (CHID, CK, CDID, Name) to the connection context list.
+ * If a CHID already exists, the CK and name are overwritten.  Statistics are
+ * not overwritten.
+ *
+ * @param cc_if The cc_if structure.
+ * @param chid A pointer to the 16-byte CHID.  This value will be copied.
+ * @param ck A pointer to the 16-byte CK.  This value will be copied.
+ * @param cdid A pointer to the 16-byte CDID.  This value will be copied.
+ * @param name An optional host friendly name as defined in the association model
+ * spec.  Must be a UTF16-LE unicode string.  Can be NULL to indicated no name.
+ * @param length The length othe unicode string.
+ * @return A unique identifier used to refer to this context that is valid for
+ * as long as this context is still in the list. */
+extern int32_t dwc_cc_add(void *mem_ctx, dwc_cc_if_t *cc_if, uint8_t *chid,
+			  uint8_t *cdid, uint8_t *ck, uint8_t *name,
+			  uint8_t length);
+
+/** Changes the CHID, CK, CDID, or Name values of a connection context in the
+ * list, preserving any accumulated statistics.  This would typically be called
+ * if the host decideds to change the context with a SET_CONNECTION request.
+ *
+ * @param cc_if The cc_if structure.
+ * @param id The identifier of the connection context.
+ * @param chid A pointer to the 16-byte CHID.  This value will be copied.  NULL
+ * indicates no change.
+ * @param cdid A pointer to the 16-byte CDID.  This value will be copied.  NULL
+ * indicates no change.
+ * @param ck A pointer to the 16-byte CK.  This value will be copied.  NULL
+ * indicates no change.
+ * @param name Host friendly name UTF16-LE.  NULL indicates no change.
+ * @param length Length of name. */
+extern void dwc_cc_change(void *mem_ctx, dwc_cc_if_t *cc_if, int32_t id,
+			  uint8_t *chid, uint8_t *cdid, uint8_t *ck,
+			  uint8_t *name, uint8_t length);
+
+/** Remove the specified connection context.
+ * @param cc_if The cc_if structure.
+ * @param id The identifier of the connection context to remove. */
+extern void dwc_cc_remove(void *mem_ctx, dwc_cc_if_t *cc_if, int32_t id);
+
+/** Get a binary block of data for the connection context list and attributes.
+ * This data can be used by the OS specific driver to save the connection
+ * context list into non-volatile memory.
+ *
+ * @param cc_if The cc_if structure.
+ * @param length Return the length of the data buffer.
+ * @return A pointer to the data buffer.  The memory for this buffer should be
+ * freed with DWC_FREE() after use. */
+extern uint8_t *dwc_cc_data_for_save(void *mem_ctx, dwc_cc_if_t *cc_if,
+				     unsigned int *length);
+
+/** Restore the connection context list from the binary data that was previously
+ * returned from a call to dwc_cc_data_for_save.  This can be used by the OS specific
+ * driver to load a connection context list from non-volatile memory.
+ *
+ * @param cc_if The cc_if structure.
+ * @param data The data bytes as returned from dwc_cc_data_for_save.
+ * @param length The length of the data. */
+extern void dwc_cc_restore_from_data(void *mem_ctx, dwc_cc_if_t *cc_if,
+				     uint8_t *data, unsigned int length);
+
+/** Find the connection context from the specified CHID.
+ *
+ * @param cc_if The cc_if structure.
+ * @param chid A pointer to the CHID data.
+ * @return A non-zero identifier of the connection context if the CHID matches.
+ * Otherwise returns 0. */
+extern uint32_t dwc_cc_match_chid(dwc_cc_if_t *cc_if, uint8_t *chid);
+
+/** Find the connection context from the specified CDID.
+ *
+ * @param cc_if The cc_if structure.
+ * @param cdid A pointer to the CDID data.
+ * @return A non-zero identifier of the connection context if the CHID matches.
+ * Otherwise returns 0. */
+extern uint32_t dwc_cc_match_cdid(dwc_cc_if_t *cc_if, uint8_t *cdid);
+
+/** Retrieve the CK from the specified connection context.
+ *
+ * @param cc_if The cc_if structure.
+ * @param id The identifier of the connection context.
+ * @return A pointer to the CK data.  The memory does not need to be freed. */
+extern uint8_t *dwc_cc_ck(dwc_cc_if_t *cc_if, int32_t id);
+
+/** Retrieve the CHID from the specified connection context.
+ *
+ * @param cc_if The cc_if structure.
+ * @param id The identifier of the connection context.
+ * @return A pointer to the CHID data.  The memory does not need to be freed. */
+extern uint8_t *dwc_cc_chid(dwc_cc_if_t *cc_if, int32_t id);
+
+/** Retrieve the CDID from the specified connection context.
+ *
+ * @param cc_if The cc_if structure.
+ * @param id The identifier of the connection context.
+ * @return A pointer to the CDID data.  The memory does not need to be freed. */
+extern uint8_t *dwc_cc_cdid(dwc_cc_if_t *cc_if, int32_t id);
+
+extern uint8_t *dwc_cc_name(dwc_cc_if_t *cc_if, int32_t id, uint8_t *length);
+
+/** Checks a buffer for non-zero.
+ * @param id A pointer to a 16 byte buffer. 
+ * @return true if the 16 byte value is non-zero. */
+static inline unsigned dwc_assoc_is_not_zero_id(uint8_t *id) {
+	int i;
+	for (i=0; i<16; i++) {
+		if (id[i]) return 1;
+	}
+	return 0;
+}
+
+/** Checks a buffer for zero.
+ * @param id A pointer to a 16 byte buffer. 
+ * @return true if the 16 byte value is zero. */
+static inline unsigned dwc_assoc_is_zero_id(uint8_t *id) {
+	return !dwc_assoc_is_not_zero_id(id);
+}
+
+/** Prints an ASCII representation for the 16-byte chid, cdid, or ck, into
+ * buffer. */
+static inline int dwc_print_id_string(char *buffer, uint8_t *id) {
+	char *ptr = buffer;
+	int i;
+	for (i=0; i<16; i++) {
+		ptr += DWC_SPRINTF(ptr, "%02x", id[i]);
+		if (i < 15) {
+			ptr += DWC_SPRINTF(ptr, " ");
+		}
+	}
+	return ptr - buffer;
+}
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _DWC_CC_H_ */
+
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_common_fbsd.c linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_common_fbsd.c
--- linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_common_fbsd.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_common_fbsd.c	2017-09-23 03:42:50.242674379 +0800
@@ -0,0 +1,1308 @@
+#include "dwc_os.h"
+#include "dwc_list.h"
+
+#ifdef DWC_CCLIB
+# include "dwc_cc.h"
+#endif
+
+#ifdef DWC_CRYPTOLIB
+# include "dwc_modpow.h"
+# include "dwc_dh.h"
+# include "dwc_crypto.h"
+#endif
+
+#ifdef DWC_NOTIFYLIB
+# include "dwc_notifier.h"
+#endif
+
+/* OS-Level Implementations */
+
+/* This is the FreeBSD 7.0 kernel implementation of the DWC platform library. */
+
+
+/* MISC */
+
+void *DWC_MEMSET(void *dest, uint8_t byte, uint32_t size)
+{
+	return memset(dest, byte, size);
+}
+
+void *DWC_MEMCPY(void *dest, void const *src, uint32_t size)
+{
+	return memcpy(dest, src, size);
+}
+
+void *DWC_MEMMOVE(void *dest, void *src, uint32_t size)
+{
+	bcopy(src, dest, size);
+	return dest;
+}
+
+int DWC_MEMCMP(void *m1, void *m2, uint32_t size)
+{
+	return memcmp(m1, m2, size);
+}
+
+int DWC_STRNCMP(void *s1, void *s2, uint32_t size)
+{
+	return strncmp(s1, s2, size);
+}
+
+int DWC_STRCMP(void *s1, void *s2)
+{
+	return strcmp(s1, s2);
+}
+
+int DWC_STRLEN(char const *str)
+{
+	return strlen(str);
+}
+
+char *DWC_STRCPY(char *to, char const *from)
+{
+	return strcpy(to, from);
+}
+
+char *DWC_STRDUP(char const *str)
+{
+	int len = DWC_STRLEN(str) + 1;
+	char *new = DWC_ALLOC_ATOMIC(len);
+
+	if (!new) {
+		return NULL;
+	}
+
+	DWC_MEMCPY(new, str, len);
+	return new;
+}
+
+int DWC_ATOI(char *str, int32_t *value)
+{
+	char *end = NULL;
+
+	*value = strtol(str, &end, 0);
+	if (*end == '\0') {
+		return 0;
+	}
+
+	return -1;
+}
+
+int DWC_ATOUI(char *str, uint32_t *value)
+{
+	char *end = NULL;
+
+	*value = strtoul(str, &end, 0);
+	if (*end == '\0') {
+		return 0;
+	}
+
+	return -1;
+}
+
+
+#ifdef DWC_UTFLIB
+/* From usbstring.c */
+
+int DWC_UTF8_TO_UTF16LE(uint8_t const *s, uint16_t *cp, unsigned len)
+{
+	int	count = 0;
+	u8	c;
+	u16	uchar;
+
+	/* this insists on correct encodings, though not minimal ones.
+	 * BUT it currently rejects legit 4-byte UTF-8 code points,
+	 * which need surrogate pairs.  (Unicode 3.1 can use them.)
+	 */
+	while (len != 0 && (c = (u8) *s++) != 0) {
+		if (unlikely(c & 0x80)) {
+			// 2-byte sequence:
+			// 00000yyyyyxxxxxx = 110yyyyy 10xxxxxx
+			if ((c & 0xe0) == 0xc0) {
+				uchar = (c & 0x1f) << 6;
+
+				c = (u8) *s++;
+				if ((c & 0xc0) != 0xc0)
+					goto fail;
+				c &= 0x3f;
+				uchar |= c;
+
+			// 3-byte sequence (most CJKV characters):
+			// zzzzyyyyyyxxxxxx = 1110zzzz 10yyyyyy 10xxxxxx
+			} else if ((c & 0xf0) == 0xe0) {
+				uchar = (c & 0x0f) << 12;
+
+				c = (u8) *s++;
+				if ((c & 0xc0) != 0xc0)
+					goto fail;
+				c &= 0x3f;
+				uchar |= c << 6;
+
+				c = (u8) *s++;
+				if ((c & 0xc0) != 0xc0)
+					goto fail;
+				c &= 0x3f;
+				uchar |= c;
+
+				/* no bogus surrogates */
+				if (0xd800 <= uchar && uchar <= 0xdfff)
+					goto fail;
+
+			// 4-byte sequence (surrogate pairs, currently rare):
+			// 11101110wwwwzzzzyy + 110111yyyyxxxxxx
+			//     = 11110uuu 10uuzzzz 10yyyyyy 10xxxxxx
+			// (uuuuu = wwww + 1)
+			// FIXME accept the surrogate code points (only)
+			} else
+				goto fail;
+		} else
+			uchar = c;
+		put_unaligned (cpu_to_le16 (uchar), cp++);
+		count++;
+		len--;
+	}
+	return count;
+fail:
+	return -1;
+}
+
+#endif	/* DWC_UTFLIB */
+
+
+/* dwc_debug.h */
+
+dwc_bool_t DWC_IN_IRQ(void)
+{
+//	return in_irq();
+	return 0;
+}
+
+dwc_bool_t DWC_IN_BH(void)
+{
+//	return in_softirq();
+	return 0;
+}
+
+void DWC_VPRINTF(char *format, va_list args)
+{
+	vprintf(format, args);
+}
+
+int DWC_VSNPRINTF(char *str, int size, char *format, va_list args)
+{
+	return vsnprintf(str, size, format, args);
+}
+
+void DWC_PRINTF(char *format, ...)
+{
+	va_list args;
+
+	va_start(args, format);
+	DWC_VPRINTF(format, args);
+	va_end(args);
+}
+
+int DWC_SPRINTF(char *buffer, char *format, ...)
+{
+	int retval;
+	va_list args;
+
+	va_start(args, format);
+	retval = vsprintf(buffer, format, args);
+	va_end(args);
+	return retval;
+}
+
+int DWC_SNPRINTF(char *buffer, int size, char *format, ...)
+{
+	int retval;
+	va_list args;
+
+	va_start(args, format);
+	retval = vsnprintf(buffer, size, format, args);
+	va_end(args);
+	return retval;
+}
+
+void __DWC_WARN(char *format, ...)
+{
+	va_list args;
+
+	va_start(args, format);
+	DWC_VPRINTF(format, args);
+	va_end(args);
+}
+
+void __DWC_ERROR(char *format, ...)
+{
+	va_list args;
+
+	va_start(args, format);
+	DWC_VPRINTF(format, args);
+	va_end(args);
+}
+
+void DWC_EXCEPTION(char *format, ...)
+{
+	va_list args;
+
+	va_start(args, format);
+	DWC_VPRINTF(format, args);
+	va_end(args);
+//	BUG_ON(1);	???
+}
+
+#ifdef DEBUG
+void __DWC_DEBUG(char *format, ...)
+{
+	va_list args;
+
+	va_start(args, format);
+	DWC_VPRINTF(format, args);
+	va_end(args);
+}
+#endif
+
+
+/* dwc_mem.h */
+
+#if 0
+dwc_pool_t *DWC_DMA_POOL_CREATE(uint32_t size,
+				uint32_t align,
+				uint32_t alloc)
+{
+	struct dma_pool *pool = dma_pool_create("Pool", NULL,
+						size, align, alloc);
+	return (dwc_pool_t *)pool;
+}
+
+void DWC_DMA_POOL_DESTROY(dwc_pool_t *pool)
+{
+	dma_pool_destroy((struct dma_pool *)pool);
+}
+
+void *DWC_DMA_POOL_ALLOC(dwc_pool_t *pool, uint64_t *dma_addr)
+{
+//	return dma_pool_alloc((struct dma_pool *)pool, GFP_KERNEL, dma_addr);
+	return dma_pool_alloc((struct dma_pool *)pool, M_WAITOK, dma_addr);
+}
+
+void *DWC_DMA_POOL_ZALLOC(dwc_pool_t *pool, uint64_t *dma_addr)
+{
+	void *vaddr = DWC_DMA_POOL_ALLOC(pool, dma_addr);
+	memset(..);
+}
+
+void DWC_DMA_POOL_FREE(dwc_pool_t *pool, void *vaddr, void *daddr)
+{
+	dma_pool_free(pool, vaddr, daddr);
+}
+#endif
+
+static void dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
+{
+	if (error)
+		return;
+	*(bus_addr_t *)arg = segs[0].ds_addr;
+}
+
+void *__DWC_DMA_ALLOC(void *dma_ctx, uint32_t size, dwc_dma_t *dma_addr)
+{
+	dwc_dmactx_t *dma = (dwc_dmactx_t *)dma_ctx;
+	int error;
+
+	error = bus_dma_tag_create(
+#if __FreeBSD_version >= 700000
+			bus_get_dma_tag(dma->dev),	/* parent */
+#else
+			NULL,				/* parent */
+#endif
+			4, 0,				/* alignment, bounds */
+			BUS_SPACE_MAXADDR_32BIT,	/* lowaddr */
+			BUS_SPACE_MAXADDR,		/* highaddr */
+			NULL, NULL,			/* filter, filterarg */
+			size,				/* maxsize */
+			1,				/* nsegments */
+			size,				/* maxsegsize */
+			0,				/* flags */
+			NULL,				/* lockfunc */
+			NULL,				/* lockarg */
+			&dma->dma_tag);
+	if (error) {
+		device_printf(dma->dev, "%s: bus_dma_tag_create failed: %d\n",
+			      __func__, error);
+		goto fail_0;
+	}
+
+	error = bus_dmamem_alloc(dma->dma_tag, &dma->dma_vaddr,
+				 BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &dma->dma_map);
+	if (error) {
+		device_printf(dma->dev, "%s: bus_dmamem_alloc(%ju) failed: %d\n",
+			      __func__, (uintmax_t)size, error);
+		goto fail_1;
+	}
+
+	dma->dma_paddr = 0;
+	error = bus_dmamap_load(dma->dma_tag, dma->dma_map, dma->dma_vaddr, size,
+				dmamap_cb, &dma->dma_paddr, BUS_DMA_NOWAIT);
+	if (error || dma->dma_paddr == 0) {
+		device_printf(dma->dev, "%s: bus_dmamap_load failed: %d\n",
+			      __func__, error);
+		goto fail_2;
+	}
+
+	*dma_addr = dma->dma_paddr;
+	return dma->dma_vaddr;
+
+fail_2:
+	bus_dmamap_unload(dma->dma_tag, dma->dma_map);
+fail_1:
+	bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
+	bus_dma_tag_destroy(dma->dma_tag);
+fail_0:
+	dma->dma_map = NULL;
+	dma->dma_tag = NULL;
+
+	return NULL;
+}
+
+void __DWC_DMA_FREE(void *dma_ctx, uint32_t size, void *virt_addr, dwc_dma_t dma_addr)
+{
+	dwc_dmactx_t *dma = (dwc_dmactx_t *)dma_ctx;
+
+	if (dma->dma_tag == NULL)
+		return;
+	if (dma->dma_map != NULL) {
+		bus_dmamap_sync(dma->dma_tag, dma->dma_map,
+				BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
+		bus_dmamap_unload(dma->dma_tag, dma->dma_map);
+		bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
+		dma->dma_map = NULL;
+	}
+
+	bus_dma_tag_destroy(dma->dma_tag);
+	dma->dma_tag = NULL;
+}
+
+void *__DWC_ALLOC(void *mem_ctx, uint32_t size)
+{
+	return malloc(size, M_DEVBUF, M_WAITOK | M_ZERO);
+}
+
+void *__DWC_ALLOC_ATOMIC(void *mem_ctx, uint32_t size)
+{
+	return malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO);
+}
+
+void __DWC_FREE(void *mem_ctx, void *addr)
+{
+	free(addr, M_DEVBUF);
+}
+
+
+#ifdef DWC_CRYPTOLIB
+/* dwc_crypto.h */
+
+void DWC_RANDOM_BYTES(uint8_t *buffer, uint32_t length)
+{
+	get_random_bytes(buffer, length);
+}
+
+int DWC_AES_CBC(uint8_t *message, uint32_t messagelen, uint8_t *key, uint32_t keylen, uint8_t iv[16], uint8_t *out)
+{
+	struct crypto_blkcipher *tfm;
+	struct blkcipher_desc desc;
+	struct scatterlist sgd;
+	struct scatterlist sgs;
+
+	tfm = crypto_alloc_blkcipher("cbc(aes)", 0, CRYPTO_ALG_ASYNC);
+	if (tfm == NULL) {
+		printk("failed to load transform for aes CBC\n");
+		return -1;
+	}
+
+	crypto_blkcipher_setkey(tfm, key, keylen);
+	crypto_blkcipher_set_iv(tfm, iv, 16);
+
+	sg_init_one(&sgd, out, messagelen);
+	sg_init_one(&sgs, message, messagelen);
+
+	desc.tfm = tfm;
+	desc.flags = 0;
+
+	if (crypto_blkcipher_encrypt(&desc, &sgd, &sgs, messagelen)) {
+		crypto_free_blkcipher(tfm);
+		DWC_ERROR("AES CBC encryption failed");
+		return -1;
+	}
+
+	crypto_free_blkcipher(tfm);
+	return 0;
+}
+
+int DWC_SHA256(uint8_t *message, uint32_t len, uint8_t *out)
+{
+	struct crypto_hash *tfm;
+	struct hash_desc desc;
+	struct scatterlist sg;
+
+	tfm = crypto_alloc_hash("sha256", 0, CRYPTO_ALG_ASYNC);
+	if (IS_ERR(tfm)) {
+		DWC_ERROR("Failed to load transform for sha256: %ld", PTR_ERR(tfm));
+		return 0;
+	}
+	desc.tfm = tfm;
+	desc.flags = 0;
+
+	sg_init_one(&sg, message, len);
+	crypto_hash_digest(&desc, &sg, len, out);
+	crypto_free_hash(tfm);
+
+	return 1;
+}
+
+int DWC_HMAC_SHA256(uint8_t *message, uint32_t messagelen,
+		    uint8_t *key, uint32_t keylen, uint8_t *out)
+{
+	struct crypto_hash *tfm;
+	struct hash_desc desc;
+	struct scatterlist sg;
+
+	tfm = crypto_alloc_hash("hmac(sha256)", 0, CRYPTO_ALG_ASYNC);
+	if (IS_ERR(tfm)) {
+		DWC_ERROR("Failed to load transform for hmac(sha256): %ld", PTR_ERR(tfm));
+		return 0;
+	}
+	desc.tfm = tfm;
+	desc.flags = 0;
+
+	sg_init_one(&sg, message, messagelen);
+	crypto_hash_setkey(tfm, key, keylen);
+	crypto_hash_digest(&desc, &sg, messagelen, out);
+	crypto_free_hash(tfm);
+
+	return 1;
+}
+
+#endif	/* DWC_CRYPTOLIB */
+
+
+/* Byte Ordering Conversions */
+
+uint32_t DWC_CPU_TO_LE32(uint32_t *p)
+{
+#ifdef __LITTLE_ENDIAN
+	return *p;
+#else
+	uint8_t *u_p = (uint8_t *)p;
+
+	return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24));
+#endif
+}
+
+uint32_t DWC_CPU_TO_BE32(uint32_t *p)
+{
+#ifdef __BIG_ENDIAN
+	return *p;
+#else
+	uint8_t *u_p = (uint8_t *)p;
+
+	return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24));
+#endif
+}
+
+uint32_t DWC_LE32_TO_CPU(uint32_t *p)
+{
+#ifdef __LITTLE_ENDIAN
+	return *p;
+#else
+	uint8_t *u_p = (uint8_t *)p;
+
+	return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24));
+#endif
+}
+
+uint32_t DWC_BE32_TO_CPU(uint32_t *p)
+{
+#ifdef __BIG_ENDIAN
+	return *p;
+#else
+	uint8_t *u_p = (uint8_t *)p;
+
+	return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24));
+#endif
+}
+
+uint16_t DWC_CPU_TO_LE16(uint16_t *p)
+{
+#ifdef __LITTLE_ENDIAN
+	return *p;
+#else
+	uint8_t *u_p = (uint8_t *)p;
+	return (u_p[1] | (u_p[0] << 8));
+#endif
+}
+
+uint16_t DWC_CPU_TO_BE16(uint16_t *p)
+{
+#ifdef __BIG_ENDIAN
+	return *p;
+#else
+	uint8_t *u_p = (uint8_t *)p;
+	return (u_p[1] | (u_p[0] << 8));
+#endif
+}
+
+uint16_t DWC_LE16_TO_CPU(uint16_t *p)
+{
+#ifdef __LITTLE_ENDIAN
+	return *p;
+#else
+	uint8_t *u_p = (uint8_t *)p;
+	return (u_p[1] | (u_p[0] << 8));
+#endif
+}
+
+uint16_t DWC_BE16_TO_CPU(uint16_t *p)
+{
+#ifdef __BIG_ENDIAN
+	return *p;
+#else
+	uint8_t *u_p = (uint8_t *)p;
+	return (u_p[1] | (u_p[0] << 8));
+#endif
+}
+
+
+/* Registers */
+
+uint32_t DWC_READ_REG32(void *io_ctx, uint32_t volatile *reg)
+{
+	dwc_ioctx_t *io = (dwc_ioctx_t *)io_ctx;
+	bus_size_t ior = (bus_size_t)reg;
+
+	return bus_space_read_4(io->iot, io->ioh, ior);
+}
+
+#if 0
+uint64_t DWC_READ_REG64(void *io_ctx, uint64_t volatile *reg)
+{
+	dwc_ioctx_t *io = (dwc_ioctx_t *)io_ctx;
+	bus_size_t ior = (bus_size_t)reg;
+
+	return bus_space_read_8(io->iot, io->ioh, ior);
+}
+#endif
+
+void DWC_WRITE_REG32(void *io_ctx, uint32_t volatile *reg, uint32_t value)
+{
+	dwc_ioctx_t *io = (dwc_ioctx_t *)io_ctx;
+	bus_size_t ior = (bus_size_t)reg;
+
+	bus_space_write_4(io->iot, io->ioh, ior, value);
+}
+
+#if 0
+void DWC_WRITE_REG64(void *io_ctx, uint64_t volatile *reg, uint64_t value)
+{
+	dwc_ioctx_t *io = (dwc_ioctx_t *)io_ctx;
+	bus_size_t ior = (bus_size_t)reg;
+
+	bus_space_write_8(io->iot, io->ioh, ior, value);
+}
+#endif
+
+void DWC_MODIFY_REG32(void *io_ctx, uint32_t volatile *reg, uint32_t clear_mask,
+		      uint32_t set_mask)
+{
+	dwc_ioctx_t *io = (dwc_ioctx_t *)io_ctx;
+	bus_size_t ior = (bus_size_t)reg;
+
+	bus_space_write_4(io->iot, io->ioh, ior,
+			  (bus_space_read_4(io->iot, io->ioh, ior) &
+			   ~clear_mask) | set_mask);
+}
+
+#if 0
+void DWC_MODIFY_REG64(void *io_ctx, uint64_t volatile *reg, uint64_t clear_mask,
+		      uint64_t set_mask)
+{
+	dwc_ioctx_t *io = (dwc_ioctx_t *)io_ctx;
+	bus_size_t ior = (bus_size_t)reg;
+
+	bus_space_write_8(io->iot, io->ioh, ior,
+			  (bus_space_read_8(io->iot, io->ioh, ior) &
+			   ~clear_mask) | set_mask);
+}
+#endif
+
+
+/* Locking */
+
+dwc_spinlock_t *DWC_SPINLOCK_ALLOC(void)
+{
+	struct mtx *sl = DWC_ALLOC(sizeof(*sl));
+
+	if (!sl) {
+		DWC_ERROR("Cannot allocate memory for spinlock");
+		return NULL;
+	}
+
+	mtx_init(sl, "dw3spn", NULL, MTX_SPIN);
+	return (dwc_spinlock_t *)sl;
+}
+
+void DWC_SPINLOCK_FREE(dwc_spinlock_t *lock)
+{
+	struct mtx *sl = (struct mtx *)lock;
+
+	mtx_destroy(sl);
+	DWC_FREE(sl);
+}
+
+void DWC_SPINLOCK(dwc_spinlock_t *lock)
+{
+	mtx_lock_spin((struct mtx *)lock);	// ???
+}
+
+void DWC_SPINUNLOCK(dwc_spinlock_t *lock)
+{
+	mtx_unlock_spin((struct mtx *)lock);	// ???
+}
+
+void DWC_SPINLOCK_IRQSAVE(dwc_spinlock_t *lock, dwc_irqflags_t *flags)
+{
+	mtx_lock_spin((struct mtx *)lock);
+}
+
+void DWC_SPINUNLOCK_IRQRESTORE(dwc_spinlock_t *lock, dwc_irqflags_t flags)
+{
+	mtx_unlock_spin((struct mtx *)lock);
+}
+
+dwc_mutex_t *DWC_MUTEX_ALLOC(void)
+{
+	struct mtx *m;
+	dwc_mutex_t *mutex = (dwc_mutex_t *)DWC_ALLOC(sizeof(struct mtx));
+
+	if (!mutex) {
+		DWC_ERROR("Cannot allocate memory for mutex");
+		return NULL;
+	}
+
+	m = (struct mtx *)mutex;
+	mtx_init(m, "dw3mtx", NULL, MTX_DEF);
+	return mutex;
+}
+
+#if (defined(DWC_LINUX) && defined(CONFIG_DEBUG_MUTEXES))
+#else
+void DWC_MUTEX_FREE(dwc_mutex_t *mutex)
+{
+	mtx_destroy((struct mtx *)mutex);
+	DWC_FREE(mutex);
+}
+#endif
+
+void DWC_MUTEX_LOCK(dwc_mutex_t *mutex)
+{
+	struct mtx *m = (struct mtx *)mutex;
+
+	mtx_lock(m);
+}
+
+int DWC_MUTEX_TRYLOCK(dwc_mutex_t *mutex)
+{
+	struct mtx *m = (struct mtx *)mutex;
+
+	return mtx_trylock(m);
+}
+
+void DWC_MUTEX_UNLOCK(dwc_mutex_t *mutex)
+{
+	struct mtx *m = (struct mtx *)mutex;
+
+	mtx_unlock(m);
+}
+
+
+/* Timing */
+
+void DWC_UDELAY(uint32_t usecs)
+{
+	DELAY(usecs);
+}
+
+void DWC_MDELAY(uint32_t msecs)
+{
+	do {
+		DELAY(1000);
+	} while (--msecs);
+}
+
+void DWC_MSLEEP(uint32_t msecs)
+{
+	struct timeval tv;
+
+	tv.tv_sec = msecs / 1000;
+	tv.tv_usec = (msecs - tv.tv_sec * 1000) * 1000;
+	pause("dw3slp", tvtohz(&tv));
+}
+
+uint32_t DWC_TIME(void)
+{
+	struct timeval tv;
+
+	microuptime(&tv);	// or getmicrouptime? (less precise, but faster)
+	return tv.tv_sec * 1000 + tv.tv_usec / 1000;
+}
+
+
+/* Timers */
+
+struct dwc_timer {
+	struct callout t;
+	char *name;
+	dwc_spinlock_t *lock;
+	dwc_timer_callback_t cb;
+	void *data;
+};
+
+dwc_timer_t *DWC_TIMER_ALLOC(char *name, dwc_timer_callback_t cb, void *data)
+{
+	dwc_timer_t *t = DWC_ALLOC(sizeof(*t));
+
+	if (!t) {
+		DWC_ERROR("Cannot allocate memory for timer");
+		return NULL;
+	}
+
+	callout_init(&t->t, 1);
+
+	t->name = DWC_STRDUP(name);
+	if (!t->name) {
+		DWC_ERROR("Cannot allocate memory for timer->name");
+		goto no_name;
+	}
+
+	t->lock = DWC_SPINLOCK_ALLOC();
+	if (!t->lock) {
+		DWC_ERROR("Cannot allocate memory for lock");
+		goto no_lock;
+	}
+
+	t->cb = cb;
+	t->data = data;
+
+	return t;
+
+ no_lock:
+	DWC_FREE(t->name);
+ no_name:
+	DWC_FREE(t);
+
+	return NULL;
+}
+
+void DWC_TIMER_FREE(dwc_timer_t *timer)
+{
+	callout_stop(&timer->t);
+	DWC_SPINLOCK_FREE(timer->lock);
+	DWC_FREE(timer->name);
+	DWC_FREE(timer);
+}
+
+void DWC_TIMER_SCHEDULE(dwc_timer_t *timer, uint32_t time)
+{
+	struct timeval tv;
+
+	tv.tv_sec = time / 1000;
+	tv.tv_usec = (time - tv.tv_sec * 1000) * 1000;
+	callout_reset(&timer->t, tvtohz(&tv), timer->cb, timer->data);
+}
+
+void DWC_TIMER_CANCEL(dwc_timer_t *timer)
+{
+	callout_stop(&timer->t);
+}
+
+
+/* Wait Queues */
+
+struct dwc_waitq {
+	struct mtx lock;
+	int abort;
+};
+
+dwc_waitq_t *DWC_WAITQ_ALLOC(void)
+{
+	dwc_waitq_t *wq = DWC_ALLOC(sizeof(*wq));
+
+	if (!wq) {
+		DWC_ERROR("Cannot allocate memory for waitqueue");
+		return NULL;
+	}
+
+	mtx_init(&wq->lock, "dw3wtq", NULL, MTX_DEF);
+	wq->abort = 0;
+
+	return wq;
+}
+
+void DWC_WAITQ_FREE(dwc_waitq_t *wq)
+{
+	mtx_destroy(&wq->lock);
+	DWC_FREE(wq);
+}
+
+int32_t DWC_WAITQ_WAIT(dwc_waitq_t *wq, dwc_waitq_condition_t cond, void *data)
+{
+//	intrmask_t ipl;
+	int result = 0;
+
+	mtx_lock(&wq->lock);
+//	ipl = splbio();
+
+	/* Skip the sleep if already aborted or triggered */
+	if (!wq->abort && !cond(data)) {
+//		splx(ipl);
+		result = msleep(wq, &wq->lock, PCATCH, "dw3wat", 0); // infinite timeout
+//		ipl = splbio();
+	}
+
+	if (result == ERESTART) {	// signaled - restart
+		result = -DWC_E_RESTART;
+
+	} else if (result == EINTR) {	// signaled - interrupt
+		result = -DWC_E_ABORT;
+
+	} else if (wq->abort) {
+		result = -DWC_E_ABORT;
+
+	} else {
+		result = 0;
+	}
+
+	wq->abort = 0;
+//	splx(ipl);
+	mtx_unlock(&wq->lock);
+	return result;
+}
+
+int32_t DWC_WAITQ_WAIT_TIMEOUT(dwc_waitq_t *wq, dwc_waitq_condition_t cond,
+			       void *data, int32_t msecs)
+{
+	struct timeval tv, tv1, tv2;
+//	intrmask_t ipl;
+	int result = 0;
+
+	tv.tv_sec = msecs / 1000;
+	tv.tv_usec = (msecs - tv.tv_sec * 1000) * 1000;
+
+	mtx_lock(&wq->lock);
+//	ipl = splbio();
+
+	/* Skip the sleep if already aborted or triggered */
+	if (!wq->abort && !cond(data)) {
+//		splx(ipl);
+		getmicrouptime(&tv1);
+		result = msleep(wq, &wq->lock, PCATCH, "dw3wto", tvtohz(&tv));
+		getmicrouptime(&tv2);
+//		ipl = splbio();
+	}
+
+	if (result == 0) {			// awoken
+		if (wq->abort) {
+			result = -DWC_E_ABORT;
+		} else {
+			tv2.tv_usec -= tv1.tv_usec;
+			if (tv2.tv_usec < 0) {
+				tv2.tv_usec += 1000000;
+				tv2.tv_sec--;
+			}
+
+			tv2.tv_sec -= tv1.tv_sec;
+			result = tv2.tv_sec * 1000 + tv2.tv_usec / 1000;
+			result = msecs - result;
+			if (result <= 0)
+				result = 1;
+		}
+	} else if (result == ERESTART) {	// signaled - restart
+		result = -DWC_E_RESTART;
+
+	} else if (result == EINTR) {		// signaled - interrupt
+		result = -DWC_E_ABORT;
+
+	} else {				// timed out
+		result = -DWC_E_TIMEOUT;
+	}
+
+	wq->abort = 0;
+//	splx(ipl);
+	mtx_unlock(&wq->lock);
+	return result;
+}
+
+void DWC_WAITQ_TRIGGER(dwc_waitq_t *wq)
+{
+	wakeup(wq);
+}
+
+void DWC_WAITQ_ABORT(dwc_waitq_t *wq)
+{
+//	intrmask_t ipl;
+
+	mtx_lock(&wq->lock);
+//	ipl = splbio();
+	wq->abort = 1;
+	wakeup(wq);
+//	splx(ipl);
+	mtx_unlock(&wq->lock);
+}
+
+
+/* Threading */
+
+struct dwc_thread {
+	struct proc *proc;
+	int abort;
+};
+
+dwc_thread_t *DWC_THREAD_RUN(dwc_thread_function_t func, char *name, void *data)
+{
+	int retval;
+	dwc_thread_t *thread = DWC_ALLOC(sizeof(*thread));
+
+	if (!thread) {
+		return NULL;
+	}
+
+	thread->abort = 0;
+	retval = kthread_create((void (*)(void *))func, data, &thread->proc,
+				RFPROC | RFNOWAIT, 0, "%s", name);
+	if (retval) {
+		DWC_FREE(thread);
+		return NULL;
+	}
+
+	return thread;
+}
+
+int DWC_THREAD_STOP(dwc_thread_t *thread)
+{
+	int retval;
+
+	thread->abort = 1;
+	retval = tsleep(&thread->abort, 0, "dw3stp", 60 * hz);
+
+	if (retval == 0) {
+		/* DWC_THREAD_EXIT() will free the thread struct */
+		return 0;
+	}
+
+	/* NOTE: We leak the thread struct if thread doesn't die */
+
+	if (retval == EWOULDBLOCK) {
+		return -DWC_E_TIMEOUT;
+	}
+
+	return -DWC_E_UNKNOWN;
+}
+
+dwc_bool_t DWC_THREAD_SHOULD_STOP(dwc_thread_t *thread)
+{
+	return thread->abort;
+}
+
+void DWC_THREAD_EXIT(dwc_thread_t *thread)
+{
+	wakeup(&thread->abort);
+	DWC_FREE(thread);
+	kthread_exit(0);
+}
+
+
+/* tasklets
+ - Runs in interrupt context (cannot sleep)
+ - Each tasklet runs on a single CPU [ How can we ensure this on FreeBSD? Does it matter? ]
+ - Different tasklets can be running simultaneously on different CPUs [ shouldn't matter ]
+ */
+struct dwc_tasklet {
+	struct task t;
+	dwc_tasklet_callback_t cb;
+	void *data;
+};
+
+static void tasklet_callback(void *data, int pending)	// what to do with pending ???
+{
+	dwc_tasklet_t *task = (dwc_tasklet_t *)data;
+
+	task->cb(task->data);
+}
+
+dwc_tasklet_t *DWC_TASK_ALLOC(char *name, dwc_tasklet_callback_t cb, void *data)
+{
+	dwc_tasklet_t *task = DWC_ALLOC(sizeof(*task));
+
+	if (task) {
+		task->cb = cb;
+		task->data = data;
+		TASK_INIT(&task->t, 0, tasklet_callback, task);
+	} else {
+		DWC_ERROR("Cannot allocate memory for tasklet");
+	}
+
+	return task;
+}
+
+void DWC_TASK_FREE(dwc_tasklet_t *task)
+{
+	taskqueue_drain(taskqueue_fast, &task->t);	// ???
+	DWC_FREE(task);
+}
+
+void DWC_TASK_SCHEDULE(dwc_tasklet_t *task)
+{
+	/* Uses predefined system queue */
+	taskqueue_enqueue_fast(taskqueue_fast, &task->t);
+}
+
+
+/* workqueues
+ - Runs in process context (can sleep)
+ */
+typedef struct work_container {
+	dwc_work_callback_t cb;
+	void *data;
+	dwc_workq_t *wq;
+	char *name;
+	int hz;
+
+#ifdef DEBUG
+	DWC_CIRCLEQ_ENTRY(work_container) entry;
+#endif
+	struct task task;
+} work_container_t;
+
+#ifdef DEBUG
+DWC_CIRCLEQ_HEAD(work_container_queue, work_container);
+#endif
+
+struct dwc_workq {
+	struct taskqueue *taskq;
+	dwc_spinlock_t *lock;
+	dwc_waitq_t *waitq;
+	int pending;
+
+#ifdef DEBUG
+	struct work_container_queue entries;
+#endif
+};
+
+static void do_work(void *data, int pending)	// what to do with pending ???
+{
+	work_container_t *container = (work_container_t *)data;
+	dwc_workq_t *wq = container->wq;
+	dwc_irqflags_t flags;
+
+	if (container->hz) {
+		pause("dw3wrk", container->hz);
+	}
+
+	container->cb(container->data);
+	DWC_DEBUG("Work done: %s, container=%p", container->name, container);
+
+	DWC_SPINLOCK_IRQSAVE(wq->lock, &flags);
+
+#ifdef DEBUG
+	DWC_CIRCLEQ_REMOVE(&wq->entries, container, entry);
+#endif
+	if (container->name)
+		DWC_FREE(container->name);
+	DWC_FREE(container);
+	wq->pending--;
+	DWC_SPINUNLOCK_IRQRESTORE(wq->lock, flags);
+	DWC_WAITQ_TRIGGER(wq->waitq);
+}
+
+static int work_done(void *data)
+{
+	dwc_workq_t *workq = (dwc_workq_t *)data;
+
+	return workq->pending == 0;
+}
+
+int DWC_WORKQ_WAIT_WORK_DONE(dwc_workq_t *workq, int timeout)
+{
+	return DWC_WAITQ_WAIT_TIMEOUT(workq->waitq, work_done, workq, timeout);
+}
+
+dwc_workq_t *DWC_WORKQ_ALLOC(char *name)
+{
+	dwc_workq_t *wq = DWC_ALLOC(sizeof(*wq));
+
+	if (!wq) {
+		DWC_ERROR("Cannot allocate memory for workqueue");
+		return NULL;
+	}
+
+	wq->taskq = taskqueue_create(name, M_NOWAIT, taskqueue_thread_enqueue, &wq->taskq);
+	if (!wq->taskq) {
+		DWC_ERROR("Cannot allocate memory for taskqueue");
+		goto no_taskq;
+	}
+
+	wq->pending = 0;
+
+	wq->lock = DWC_SPINLOCK_ALLOC();
+	if (!wq->lock) {
+		DWC_ERROR("Cannot allocate memory for spinlock");
+		goto no_lock;
+	}
+
+	wq->waitq = DWC_WAITQ_ALLOC();
+	if (!wq->waitq) {
+		DWC_ERROR("Cannot allocate memory for waitqueue");
+		goto no_waitq;
+	}
+
+	taskqueue_start_threads(&wq->taskq, 1, PWAIT, "%s taskq", "dw3tsk");
+
+#ifdef DEBUG
+	DWC_CIRCLEQ_INIT(&wq->entries);
+#endif
+	return wq;
+
+ no_waitq:
+	DWC_SPINLOCK_FREE(wq->lock);
+ no_lock:
+	taskqueue_free(wq->taskq);
+ no_taskq:
+	DWC_FREE(wq);
+
+	return NULL;
+}
+
+void DWC_WORKQ_FREE(dwc_workq_t *wq)
+{
+#ifdef DEBUG
+	dwc_irqflags_t flags;
+
+	DWC_SPINLOCK_IRQSAVE(wq->lock, &flags);
+
+	if (wq->pending != 0) {
+		struct work_container *container;
+
+		DWC_ERROR("Destroying work queue with pending work");
+
+		DWC_CIRCLEQ_FOREACH(container, &wq->entries, entry) {
+			DWC_ERROR("Work %s still pending", container->name);
+		}
+	}
+
+	DWC_SPINUNLOCK_IRQRESTORE(wq->lock, flags);
+#endif
+	DWC_WAITQ_FREE(wq->waitq);
+	DWC_SPINLOCK_FREE(wq->lock);
+	taskqueue_free(wq->taskq);
+	DWC_FREE(wq);
+}
+
+void DWC_WORKQ_SCHEDULE(dwc_workq_t *wq, dwc_work_callback_t cb, void *data,
+			char *format, ...)
+{
+	dwc_irqflags_t flags;
+	work_container_t *container;
+	static char name[128];
+	va_list args;
+
+	va_start(args, format);
+	DWC_VSNPRINTF(name, 128, format, args);
+	va_end(args);
+
+	DWC_SPINLOCK_IRQSAVE(wq->lock, &flags);
+	wq->pending++;
+	DWC_SPINUNLOCK_IRQRESTORE(wq->lock, flags);
+	DWC_WAITQ_TRIGGER(wq->waitq);
+
+	container = DWC_ALLOC_ATOMIC(sizeof(*container));
+	if (!container) {
+		DWC_ERROR("Cannot allocate memory for container");
+		return;
+	}
+
+	container->name = DWC_STRDUP(name);
+	if (!container->name) {
+		DWC_ERROR("Cannot allocate memory for container->name");
+		DWC_FREE(container);
+		return;
+	}
+
+	container->cb = cb;
+	container->data = data;
+	container->wq = wq;
+	container->hz = 0;
+
+	DWC_DEBUG("Queueing work: %s, container=%p", container->name, container);
+
+	TASK_INIT(&container->task, 0, do_work, container);
+
+#ifdef DEBUG
+	DWC_CIRCLEQ_INSERT_TAIL(&wq->entries, container, entry);
+#endif
+	taskqueue_enqueue_fast(wq->taskq, &container->task);
+}
+
+void DWC_WORKQ_SCHEDULE_DELAYED(dwc_workq_t *wq, dwc_work_callback_t cb,
+				void *data, uint32_t time, char *format, ...)
+{
+	dwc_irqflags_t flags;
+	work_container_t *container;
+	static char name[128];
+	struct timeval tv;
+	va_list args;
+
+	va_start(args, format);
+	DWC_VSNPRINTF(name, 128, format, args);
+	va_end(args);
+
+	DWC_SPINLOCK_IRQSAVE(wq->lock, &flags);
+	wq->pending++;
+	DWC_SPINUNLOCK_IRQRESTORE(wq->lock, flags);
+	DWC_WAITQ_TRIGGER(wq->waitq);
+
+	container = DWC_ALLOC_ATOMIC(sizeof(*container));
+	if (!container) {
+		DWC_ERROR("Cannot allocate memory for container");
+		return;
+	}
+
+	container->name = DWC_STRDUP(name);
+	if (!container->name) {
+		DWC_ERROR("Cannot allocate memory for container->name");
+		DWC_FREE(container);
+		return;
+	}
+
+	container->cb = cb;
+	container->data = data;
+	container->wq = wq;
+
+	tv.tv_sec = time / 1000;
+	tv.tv_usec = (time - tv.tv_sec * 1000) * 1000;
+	container->hz = tvtohz(&tv);
+
+	DWC_DEBUG("Queueing work: %s, container=%p", container->name, container);
+
+	TASK_INIT(&container->task, 0, do_work, container);
+
+#ifdef DEBUG
+	DWC_CIRCLEQ_INSERT_TAIL(&wq->entries, container, entry);
+#endif
+	taskqueue_enqueue_fast(wq->taskq, &container->task);
+}
+
+int DWC_WORKQ_PENDING(dwc_workq_t *wq)
+{
+	return wq->pending;
+}
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_common_linux.c linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_common_linux.c
--- linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_common_linux.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_common_linux.c	2017-09-23 03:42:50.246674367 +0800
@@ -0,0 +1,1421 @@
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kthread.h>
+
+#ifdef DWC_CCLIB
+# include "dwc_cc.h"
+#endif
+
+#ifdef DWC_CRYPTOLIB
+# include "dwc_modpow.h"
+# include "dwc_dh.h"
+# include "dwc_crypto.h"
+#endif
+
+#ifdef DWC_NOTIFYLIB
+# include "dwc_notifier.h"
+#endif
+
+/* OS-Level Implementations */
+
+/* This is the Linux kernel implementation of the DWC platform library. */
+#include <linux/moduleparam.h>
+#include <linux/ctype.h>
+#include <linux/crypto.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/dma-mapping.h>
+#include <linux/cdev.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <linux/jiffies.h>
+#include <linux/list.h>
+#include <linux/pci.h>
+#include <linux/random.h>
+#include <linux/scatterlist.h>
+#include <linux/slab.h>
+#include <linux/stat.h>
+#include <linux/string.h>
+#include <linux/timer.h>
+#include <linux/usb.h>
+
+#include <linux/version.h>
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
+# include <linux/usb/gadget.h>
+#else
+# include <linux/usb_gadget.h>
+#endif
+
+#include <asm/io.h>
+#include <asm/page.h>
+#include <asm/uaccess.h>
+#include <asm/unaligned.h>
+
+#include "dwc_os.h"
+#include "dwc_list.h"
+
+
+/* MISC */
+
+void *DWC_MEMSET(void *dest, uint8_t byte, uint32_t size)
+{
+	return memset(dest, byte, size);
+}
+
+void *DWC_MEMCPY(void *dest, void const *src, uint32_t size)
+{
+	return memcpy(dest, src, size);
+}
+
+void *DWC_MEMMOVE(void *dest, void *src, uint32_t size)
+{
+	return memmove(dest, src, size);
+}
+
+int DWC_MEMCMP(void *m1, void *m2, uint32_t size)
+{
+	return memcmp(m1, m2, size);
+}
+
+int DWC_STRNCMP(void *s1, void *s2, uint32_t size)
+{
+	return strncmp(s1, s2, size);
+}
+
+int DWC_STRCMP(void *s1, void *s2)
+{
+	return strcmp(s1, s2);
+}
+
+int DWC_STRLEN(char const *str)
+{
+	return strlen(str);
+}
+
+char *DWC_STRCPY(char *to, char const *from)
+{
+	return strcpy(to, from);
+}
+
+char *DWC_STRDUP(char const *str)
+{
+	int len = DWC_STRLEN(str) + 1;
+	char *new = DWC_ALLOC_ATOMIC(len);
+
+	if (!new) {
+		return NULL;
+	}
+
+	DWC_MEMCPY(new, str, len);
+	return new;
+}
+
+int DWC_ATOI(const char *str, int32_t *value)
+{
+	char *end = NULL;
+
+	*value = simple_strtol(str, &end, 0);
+	if (*end == '\0') {
+		return 0;
+	}
+
+	return -1;
+}
+
+int DWC_ATOUI(const char *str, uint32_t *value)
+{
+	char *end = NULL;
+
+	*value = simple_strtoul(str, &end, 0);
+	if (*end == '\0') {
+		return 0;
+	}
+
+	return -1;
+}
+
+
+#ifdef DWC_UTFLIB
+/* From usbstring.c */
+
+int DWC_UTF8_TO_UTF16LE(uint8_t const *s, uint16_t *cp, unsigned len)
+{
+	int	count = 0;
+	u8	c;
+	u16	uchar;
+
+	/* this insists on correct encodings, though not minimal ones.
+	 * BUT it currently rejects legit 4-byte UTF-8 code points,
+	 * which need surrogate pairs.  (Unicode 3.1 can use them.)
+	 */
+	while (len != 0 && (c = (u8) *s++) != 0) {
+		if (unlikely(c & 0x80)) {
+			// 2-byte sequence:
+			// 00000yyyyyxxxxxx = 110yyyyy 10xxxxxx
+			if ((c & 0xe0) == 0xc0) {
+				uchar = (c & 0x1f) << 6;
+
+				c = (u8) *s++;
+				if ((c & 0xc0) != 0xc0)
+					goto fail;
+				c &= 0x3f;
+				uchar |= c;
+
+			// 3-byte sequence (most CJKV characters):
+			// zzzzyyyyyyxxxxxx = 1110zzzz 10yyyyyy 10xxxxxx
+			} else if ((c & 0xf0) == 0xe0) {
+				uchar = (c & 0x0f) << 12;
+
+				c = (u8) *s++;
+				if ((c & 0xc0) != 0xc0)
+					goto fail;
+				c &= 0x3f;
+				uchar |= c << 6;
+
+				c = (u8) *s++;
+				if ((c & 0xc0) != 0xc0)
+					goto fail;
+				c &= 0x3f;
+				uchar |= c;
+
+				/* no bogus surrogates */
+				if (0xd800 <= uchar && uchar <= 0xdfff)
+					goto fail;
+
+			// 4-byte sequence (surrogate pairs, currently rare):
+			// 11101110wwwwzzzzyy + 110111yyyyxxxxxx
+			//     = 11110uuu 10uuzzzz 10yyyyyy 10xxxxxx
+			// (uuuuu = wwww + 1)
+			// FIXME accept the surrogate code points (only)
+			} else
+				goto fail;
+		} else
+			uchar = c;
+		put_unaligned (cpu_to_le16 (uchar), cp++);
+		count++;
+		len--;
+	}
+	return count;
+fail:
+	return -1;
+}
+#endif	/* DWC_UTFLIB */
+
+
+/* dwc_debug.h */
+
+dwc_bool_t DWC_IN_IRQ(void)
+{
+	return in_irq();
+}
+
+dwc_bool_t DWC_IN_BH(void)
+{
+	return in_softirq();
+}
+
+void DWC_VPRINTF(char *format, va_list args)
+{
+	vprintk(format, args);
+}
+
+int DWC_VSNPRINTF(char *str, int size, char *format, va_list args)
+{
+	return vsnprintf(str, size, format, args);
+}
+
+void DWC_PRINTF(char *format, ...)
+{
+	va_list args;
+
+	va_start(args, format);
+	DWC_VPRINTF(format, args);
+	va_end(args);
+}
+
+int DWC_SPRINTF(char *buffer, char *format, ...)
+{
+	int retval;
+	va_list args;
+
+	va_start(args, format);
+	retval = vsprintf(buffer, format, args);
+	va_end(args);
+	return retval;
+}
+
+int DWC_SNPRINTF(char *buffer, int size, char *format, ...)
+{
+	int retval;
+	va_list args;
+
+	va_start(args, format);
+	retval = vsnprintf(buffer, size, format, args);
+	va_end(args);
+	return retval;
+}
+
+void __DWC_WARN(char *format, ...)
+{
+	va_list args;
+
+	va_start(args, format);
+	DWC_PRINTF(KERN_WARNING);
+	DWC_VPRINTF(format, args);
+	va_end(args);
+}
+
+void __DWC_ERROR(char *format, ...)
+{
+	va_list args;
+
+	va_start(args, format);
+	DWC_PRINTF(KERN_ERR);
+	DWC_VPRINTF(format, args);
+	va_end(args);
+}
+
+void DWC_EXCEPTION(char *format, ...)
+{
+	va_list args;
+
+	va_start(args, format);
+	DWC_PRINTF(KERN_ERR);
+	DWC_VPRINTF(format, args);
+	va_end(args);
+	BUG_ON(1);
+}
+
+#ifdef DEBUG
+void __DWC_DEBUG(char *format, ...)
+{
+	va_list args;
+
+	va_start(args, format);
+	DWC_PRINTF(KERN_DEBUG);
+	DWC_VPRINTF(format, args);
+	va_end(args);
+}
+#endif
+
+
+/* dwc_mem.h */
+
+#if 0
+dwc_pool_t *DWC_DMA_POOL_CREATE(uint32_t size,
+				uint32_t align,
+				uint32_t alloc)
+{
+	struct dma_pool *pool = dma_pool_create("Pool", NULL,
+						size, align, alloc);
+	return (dwc_pool_t *)pool;
+}
+
+void DWC_DMA_POOL_DESTROY(dwc_pool_t *pool)
+{
+	dma_pool_destroy((struct dma_pool *)pool);
+}
+
+void *DWC_DMA_POOL_ALLOC(dwc_pool_t *pool, uint64_t *dma_addr)
+{
+	return dma_pool_alloc((struct dma_pool *)pool, GFP_KERNEL, dma_addr);
+}
+
+void *DWC_DMA_POOL_ZALLOC(dwc_pool_t *pool, uint64_t *dma_addr)
+{
+	void *vaddr = DWC_DMA_POOL_ALLOC(pool, dma_addr);
+	memset(..);
+}
+
+void DWC_DMA_POOL_FREE(dwc_pool_t *pool, void *vaddr, void *daddr)
+{
+	dma_pool_free(pool, vaddr, daddr);
+}
+#endif
+
+void *__DWC_DMA_ALLOC(void *dma_ctx, uint32_t size, dwc_dma_t *dma_addr)
+{
+#ifdef xxCOSIM /* Only works for 32-bit cosim */
+	void *buf = dma_alloc_coherent(dma_ctx, (size_t)size, dma_addr, GFP_KERNEL);
+#else
+	void *buf = dma_alloc_coherent(dma_ctx, (size_t)size, dma_addr, GFP_KERNEL | GFP_DMA32);
+#endif
+	if (!buf) {
+		return NULL;
+	}
+
+	memset(buf, 0, (size_t)size);
+	return buf;
+}
+
+void *__DWC_DMA_ALLOC_ATOMIC(void *dma_ctx, uint32_t size, dwc_dma_t *dma_addr)
+{
+	void *buf = dma_alloc_coherent(NULL, (size_t)size, dma_addr, GFP_ATOMIC);
+	if (!buf) {
+		return NULL;
+	}
+	memset(buf, 0, (size_t)size);
+	return buf;
+}
+
+void __DWC_DMA_FREE(void *dma_ctx, uint32_t size, void *virt_addr, dwc_dma_t dma_addr)
+{
+	dma_free_coherent(dma_ctx, size, virt_addr, dma_addr);
+}
+
+void *__DWC_ALLOC(void *mem_ctx, uint32_t size)
+{
+	return kzalloc(size, GFP_KERNEL);
+}
+
+void *__DWC_ALLOC_ATOMIC(void *mem_ctx, uint32_t size)
+{
+	return kzalloc(size, GFP_ATOMIC);
+}
+
+void __DWC_FREE(void *mem_ctx, void *addr)
+{
+	kfree(addr);
+}
+
+
+#ifdef DWC_CRYPTOLIB
+/* dwc_crypto.h */
+
+void DWC_RANDOM_BYTES(uint8_t *buffer, uint32_t length)
+{
+	get_random_bytes(buffer, length);
+}
+
+int DWC_AES_CBC(uint8_t *message, uint32_t messagelen, uint8_t *key, uint32_t keylen, uint8_t iv[16], uint8_t *out)
+{
+	struct crypto_blkcipher *tfm;
+	struct blkcipher_desc desc;
+	struct scatterlist sgd;
+	struct scatterlist sgs;
+
+	tfm = crypto_alloc_blkcipher("cbc(aes)", 0, CRYPTO_ALG_ASYNC);
+	if (tfm == NULL) {
+		printk("failed to load transform for aes CBC\n");
+		return -1;
+	}
+
+	crypto_blkcipher_setkey(tfm, key, keylen);
+	crypto_blkcipher_set_iv(tfm, iv, 16);
+
+	sg_init_one(&sgd, out, messagelen);
+	sg_init_one(&sgs, message, messagelen);
+
+	desc.tfm = tfm;
+	desc.flags = 0;
+
+	if (crypto_blkcipher_encrypt(&desc, &sgd, &sgs, messagelen)) {
+		crypto_free_blkcipher(tfm);
+		DWC_ERROR("AES CBC encryption failed");
+		return -1;
+	}
+
+	crypto_free_blkcipher(tfm);
+	return 0;
+}
+
+int DWC_SHA256(uint8_t *message, uint32_t len, uint8_t *out)
+{
+	struct crypto_hash *tfm;
+	struct hash_desc desc;
+	struct scatterlist sg;
+
+	tfm = crypto_alloc_hash("sha256", 0, CRYPTO_ALG_ASYNC);
+	if (IS_ERR(tfm)) {
+		DWC_ERROR("Failed to load transform for sha256: %ld\n", PTR_ERR(tfm));
+		return 0;
+	}
+	desc.tfm = tfm;
+	desc.flags = 0;
+
+	sg_init_one(&sg, message, len);
+	crypto_hash_digest(&desc, &sg, len, out);
+	crypto_free_hash(tfm);
+
+	return 1;
+}
+
+int DWC_HMAC_SHA256(uint8_t *message, uint32_t messagelen,
+		    uint8_t *key, uint32_t keylen, uint8_t *out)
+{
+	struct crypto_hash *tfm;
+	struct hash_desc desc;
+	struct scatterlist sg;
+
+	tfm = crypto_alloc_hash("hmac(sha256)", 0, CRYPTO_ALG_ASYNC);
+	if (IS_ERR(tfm)) {
+		DWC_ERROR("Failed to load transform for hmac(sha256): %ld\n", PTR_ERR(tfm));
+		return 0;
+	}
+	desc.tfm = tfm;
+	desc.flags = 0;
+
+	sg_init_one(&sg, message, messagelen);
+	crypto_hash_setkey(tfm, key, keylen);
+	crypto_hash_digest(&desc, &sg, messagelen, out);
+	crypto_free_hash(tfm);
+
+	return 1;
+}
+#endif	/* DWC_CRYPTOLIB */
+
+
+/* Byte Ordering Conversions */
+
+uint32_t DWC_CPU_TO_LE32(uint32_t *p)
+{
+#ifdef __LITTLE_ENDIAN
+	return *p;
+#else
+	uint8_t *u_p = (uint8_t *)p;
+
+	return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24));
+#endif
+}
+
+uint32_t DWC_CPU_TO_BE32(uint32_t *p)
+{
+#ifdef __BIG_ENDIAN
+	return *p;
+#else
+	uint8_t *u_p = (uint8_t *)p;
+
+	return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24));
+#endif
+}
+
+uint32_t DWC_LE32_TO_CPU(uint32_t *p)
+{
+#ifdef __LITTLE_ENDIAN
+	return *p;
+#else
+	uint8_t *u_p = (uint8_t *)p;
+
+	return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24));
+#endif
+}
+
+uint32_t DWC_BE32_TO_CPU(uint32_t *p)
+{
+#ifdef __BIG_ENDIAN
+	return *p;
+#else
+	uint8_t *u_p = (uint8_t *)p;
+
+	return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24));
+#endif
+}
+
+uint16_t DWC_CPU_TO_LE16(uint16_t *p)
+{
+#ifdef __LITTLE_ENDIAN
+	return *p;
+#else
+	uint8_t *u_p = (uint8_t *)p;
+	return (u_p[1] | (u_p[0] << 8));
+#endif
+}
+
+uint16_t DWC_CPU_TO_BE16(uint16_t *p)
+{
+#ifdef __BIG_ENDIAN
+	return *p;
+#else
+	uint8_t *u_p = (uint8_t *)p;
+	return (u_p[1] | (u_p[0] << 8));
+#endif
+}
+
+uint16_t DWC_LE16_TO_CPU(uint16_t *p)
+{
+#ifdef __LITTLE_ENDIAN
+	return *p;
+#else
+	uint8_t *u_p = (uint8_t *)p;
+	return (u_p[1] | (u_p[0] << 8));
+#endif
+}
+
+uint16_t DWC_BE16_TO_CPU(uint16_t *p)
+{
+#ifdef __BIG_ENDIAN
+	return *p;
+#else
+	uint8_t *u_p = (uint8_t *)p;
+	return (u_p[1] | (u_p[0] << 8));
+#endif
+}
+
+
+/* Registers */
+
+uint32_t DWC_READ_REG32(uint32_t volatile *reg)
+{
+	return readl(reg);
+}
+
+#if 0
+uint64_t DWC_READ_REG64(uint64_t volatile *reg)
+{
+}
+#endif
+
+void DWC_WRITE_REG32(uint32_t volatile *reg, uint32_t value)
+{
+	writel(value, reg);
+}
+
+#if 0
+void DWC_WRITE_REG64(uint64_t volatile *reg, uint64_t value)
+{
+}
+#endif
+
+void DWC_MODIFY_REG32(uint32_t volatile *reg, uint32_t clear_mask, uint32_t set_mask)
+{
+	writel((readl(reg) & ~clear_mask) | set_mask, reg);
+}
+
+#if 0
+void DWC_MODIFY_REG64(uint64_t volatile *reg, uint64_t clear_mask, uint64_t set_mask)
+{
+}
+#endif
+
+
+/* Locking */
+
+dwc_spinlock_t *DWC_SPINLOCK_ALLOC(void)
+{
+	spinlock_t *sl = (spinlock_t *)1;
+
+#if defined(CONFIG_PREEMPT) || defined(CONFIG_SMP)
+	sl = DWC_ALLOC(sizeof(*sl));
+	if (!sl) {
+		DWC_ERROR("Cannot allocate memory for spinlock\n");
+		return NULL;
+	}
+
+	spin_lock_init(sl);
+#endif
+	return (dwc_spinlock_t *)sl;
+}
+
+void DWC_SPINLOCK_FREE(dwc_spinlock_t *lock)
+{
+#if defined(CONFIG_PREEMPT) || defined(CONFIG_SMP)
+	DWC_FREE(lock);
+#endif
+}
+
+void DWC_SPINLOCK(dwc_spinlock_t *lock)
+{
+#if defined(CONFIG_PREEMPT) || defined(CONFIG_SMP)
+	spin_lock((spinlock_t *)lock);
+#endif
+}
+
+void DWC_SPINUNLOCK(dwc_spinlock_t *lock)
+{
+#if defined(CONFIG_PREEMPT) || defined(CONFIG_SMP)
+	spin_unlock((spinlock_t *)lock);
+#endif
+}
+
+void DWC_SPINLOCK_IRQSAVE(dwc_spinlock_t *lock, dwc_irqflags_t *flags)
+{
+	dwc_irqflags_t f;
+
+#if defined(CONFIG_PREEMPT) || defined(CONFIG_SMP)
+	spin_lock_irqsave((spinlock_t *)lock, f);
+#else
+	local_irq_save(f);
+#endif
+	*flags = f;
+}
+
+void DWC_SPINUNLOCK_IRQRESTORE(dwc_spinlock_t *lock, dwc_irqflags_t flags)
+{
+#if defined(CONFIG_PREEMPT) || defined(CONFIG_SMP)
+	spin_unlock_irqrestore((spinlock_t *)lock, flags);
+#else
+	local_irq_restore(flags);
+#endif
+}
+
+dwc_mutex_t *DWC_MUTEX_ALLOC(void)
+{
+	struct mutex *m;
+	dwc_mutex_t *mutex = (dwc_mutex_t *)DWC_ALLOC(sizeof(struct mutex));
+
+	if (!mutex) {
+		DWC_ERROR("Cannot allocate memory for mutex\n");
+		return NULL;
+	}
+
+	m = (struct mutex *)mutex;
+	mutex_init(m);
+	return mutex;
+}
+
+#if (defined(DWC_LINUX) && defined(CONFIG_DEBUG_MUTEXES))
+#else
+void DWC_MUTEX_FREE(dwc_mutex_t *mutex)
+{
+	mutex_destroy((struct mutex *)mutex);
+	DWC_FREE(mutex);
+}
+#endif
+
+void DWC_MUTEX_LOCK(dwc_mutex_t *mutex)
+{
+	struct mutex *m = (struct mutex *)mutex;
+	mutex_lock(m);
+}
+
+int DWC_MUTEX_TRYLOCK(dwc_mutex_t *mutex)
+{
+	struct mutex *m = (struct mutex *)mutex;
+	return mutex_trylock(m);
+}
+
+void DWC_MUTEX_UNLOCK(dwc_mutex_t *mutex)
+{
+	struct mutex *m = (struct mutex *)mutex;
+	mutex_unlock(m);
+}
+
+
+/* Timing */
+
+void DWC_UDELAY(uint32_t usecs)
+{
+	udelay(usecs);
+}
+
+void DWC_MDELAY(uint32_t msecs)
+{
+	mdelay(msecs);
+}
+
+void DWC_MSLEEP(uint32_t msecs)
+{
+	msleep(msecs);
+}
+
+uint32_t DWC_TIME(void)
+{
+	return jiffies_to_msecs(jiffies);
+}
+
+
+/* Timers */
+
+struct dwc_timer {
+	struct timer_list *t;
+	char *name;
+	dwc_timer_callback_t cb;
+	void *data;
+	uint8_t scheduled;
+	dwc_spinlock_t *lock;
+};
+
+static void timer_callback(unsigned long data)
+{
+	dwc_timer_t *timer = (dwc_timer_t *)data;
+	dwc_irqflags_t flags;
+
+	DWC_SPINLOCK_IRQSAVE(timer->lock, &flags);
+	timer->scheduled = 0;
+	DWC_SPINUNLOCK_IRQRESTORE(timer->lock, flags);
+	DWC_DEBUG("Timer %s callback", timer->name);
+	timer->cb(timer->data);
+}
+
+dwc_timer_t *DWC_TIMER_ALLOC(char *name, dwc_timer_callback_t cb, void *data)
+{
+	dwc_timer_t *t = DWC_ALLOC(sizeof(*t));
+
+	if (!t) {
+		DWC_ERROR("Cannot allocate memory for timer");
+		return NULL;
+	}
+
+	t->t = DWC_ALLOC(sizeof(*t->t));
+	if (!t->t) {
+		DWC_ERROR("Cannot allocate memory for timer->t");
+		goto no_timer;
+	}
+
+	t->name = DWC_STRDUP(name);
+	if (!t->name) {
+		DWC_ERROR("Cannot allocate memory for timer->name");
+		goto no_name;
+	}
+
+	t->lock = DWC_SPINLOCK_ALLOC();
+	if (!t->lock) {
+		DWC_ERROR("Cannot allocate memory for lock");
+		goto no_lock;
+	}
+
+	t->scheduled = 0;
+	t->t->base = &boot_tvec_bases;
+	t->t->expires = jiffies;
+	setup_timer(t->t, timer_callback, (unsigned long)t);
+
+	t->cb = cb;
+	t->data = data;
+
+	return t;
+
+ no_lock:
+	DWC_FREE(t->name);
+ no_name:
+	DWC_FREE(t->t);
+ no_timer:
+	DWC_FREE(t);
+	return NULL;
+}
+
+void DWC_TIMER_FREE(dwc_timer_t *timer)
+{
+	dwc_irqflags_t flags;
+
+	DWC_SPINLOCK_IRQSAVE(timer->lock, &flags);
+
+	if (timer->scheduled) {
+		del_timer(timer->t);
+		timer->scheduled = 0;
+	}
+
+	DWC_SPINUNLOCK_IRQRESTORE(timer->lock, flags);
+	DWC_SPINLOCK_FREE(timer->lock);
+	DWC_FREE(timer->t);
+	DWC_FREE(timer->name);
+	DWC_FREE(timer);
+}
+
+void DWC_TIMER_SCHEDULE(dwc_timer_t *timer, uint32_t time)
+{
+	dwc_irqflags_t flags;
+
+	DWC_SPINLOCK_IRQSAVE(timer->lock, &flags);
+
+	if (!timer->scheduled) {
+		timer->scheduled = 1;
+		DWC_DEBUG("Scheduling timer %s to expire in +%d msec", timer->name, time);
+		timer->t->expires = jiffies + msecs_to_jiffies(time);
+		add_timer(timer->t);
+	} else {
+		DWC_DEBUG("Modifying timer %s to expire in +%d msec", timer->name, time);
+		mod_timer(timer->t, jiffies + msecs_to_jiffies(time));
+	}
+
+	DWC_SPINUNLOCK_IRQRESTORE(timer->lock, flags);
+}
+
+void DWC_TIMER_CANCEL(dwc_timer_t *timer)
+{
+	del_timer(timer->t);
+}
+
+
+/* Wait Queues */
+
+struct dwc_waitq {
+	wait_queue_head_t queue;
+	int abort;
+};
+
+dwc_waitq_t *DWC_WAITQ_ALLOC(void)
+{
+	dwc_waitq_t *wq = DWC_ALLOC(sizeof(*wq));
+
+	if (!wq) {
+		DWC_ERROR("Cannot allocate memory for waitqueue\n");
+		return NULL;
+	}
+
+	init_waitqueue_head(&wq->queue);
+	wq->abort = 0;
+	return wq;
+}
+
+void DWC_WAITQ_FREE(dwc_waitq_t *wq)
+{
+	DWC_FREE(wq);
+}
+
+int32_t DWC_WAITQ_WAIT(dwc_waitq_t *wq, dwc_waitq_condition_t cond, void *data)
+{
+	int result = wait_event_interruptible(wq->queue,
+					      cond(data) || wq->abort);
+	if (result == -ERESTARTSYS) {
+		wq->abort = 0;
+		return -DWC_E_RESTART;
+	}
+
+	if (wq->abort == 1) {
+		wq->abort = 0;
+		return -DWC_E_ABORT;
+	}
+
+	wq->abort = 0;
+
+	if (result == 0) {
+		return 0;
+	}
+
+	return -DWC_E_UNKNOWN;
+}
+
+int32_t DWC_WAITQ_WAIT_TIMEOUT(dwc_waitq_t *wq, dwc_waitq_condition_t cond,
+			       void *data, int32_t msecs)
+{
+	int32_t tmsecs;
+	int result = wait_event_interruptible_timeout(wq->queue,
+						      cond(data) || wq->abort,
+						      msecs_to_jiffies(msecs));
+	if (result == -ERESTARTSYS) {
+		wq->abort = 0;
+		return -DWC_E_RESTART;
+	}
+
+	if (wq->abort == 1) {
+		wq->abort = 0;
+		return -DWC_E_ABORT;
+	}
+
+	wq->abort = 0;
+
+	if (result > 0) {
+		tmsecs = jiffies_to_msecs(result);
+		if (!tmsecs) {
+			return 1;
+		}
+
+		return tmsecs;
+	}
+
+	if (result == 0) {
+		return -DWC_E_TIMEOUT;
+	}
+
+	return -DWC_E_UNKNOWN;
+}
+
+void DWC_WAITQ_TRIGGER(dwc_waitq_t *wq)
+{
+	wq->abort = 0;
+	wake_up_interruptible(&wq->queue);
+}
+
+void DWC_WAITQ_ABORT(dwc_waitq_t *wq)
+{
+	wq->abort = 1;
+	wake_up_interruptible(&wq->queue);
+}
+
+
+/* Threading */
+
+dwc_thread_t *DWC_THREAD_RUN(dwc_thread_function_t func, char *name, void *data)
+{
+	struct task_struct *thread = kthread_run(func, data, name);
+
+	if (thread == ERR_PTR(-ENOMEM)) {
+		return NULL;
+	}
+
+	return (dwc_thread_t *)thread;
+}
+
+int DWC_THREAD_STOP(dwc_thread_t *thread)
+{
+	return kthread_stop((struct task_struct *)thread);
+}
+
+dwc_bool_t DWC_THREAD_SHOULD_STOP(void)
+{
+	return kthread_should_stop();
+}
+
+
+/* tasklets
+ - run in interrupt context (cannot sleep)
+ - each tasklet runs on a single CPU
+ - different tasklets can be running simultaneously on different CPUs
+ */
+struct dwc_tasklet {
+	struct tasklet_struct t;
+	dwc_tasklet_callback_t cb;
+	void *data;
+};
+
+static void tasklet_callback(unsigned long data)
+{
+	dwc_tasklet_t *t = (dwc_tasklet_t *)data;
+	t->cb(t->data);
+}
+
+dwc_tasklet_t *DWC_TASK_ALLOC(char *name, dwc_tasklet_callback_t cb, void *data)
+{
+	dwc_tasklet_t *t = DWC_ALLOC(sizeof(*t));
+
+	if (t) {
+		t->cb = cb;
+		t->data = data;
+		tasklet_init(&t->t, tasklet_callback, (unsigned long)t);
+	} else {
+		DWC_ERROR("Cannot allocate memory for tasklet\n");
+	}
+
+	return t;
+}
+
+void DWC_TASK_FREE(dwc_tasklet_t *task)
+{
+	DWC_FREE(task);
+}
+
+void DWC_TASK_SCHEDULE(dwc_tasklet_t *task)
+{
+	tasklet_schedule(&task->t);
+}
+
+
+/* workqueues
+ - run in process context (can sleep)
+ */
+typedef struct work_container {
+	dwc_work_callback_t cb;
+	void *data;
+	dwc_workq_t *wq;
+	char *name;
+
+#ifdef DEBUG
+	DWC_CIRCLEQ_ENTRY(work_container) entry;
+#endif
+	struct delayed_work work;
+} work_container_t;
+
+#ifdef DEBUG
+DWC_CIRCLEQ_HEAD(work_container_queue, work_container);
+#endif
+
+struct dwc_workq {
+	struct workqueue_struct *wq;
+	dwc_spinlock_t *lock;
+	dwc_waitq_t *waitq;
+	int pending;
+
+#ifdef DEBUG
+	struct work_container_queue entries;
+#endif
+};
+
+static void do_work(struct work_struct *work)
+{
+	dwc_irqflags_t flags;
+	struct delayed_work *dw = container_of(work, struct delayed_work, work);
+	work_container_t *container = container_of(dw, struct work_container, work);
+	dwc_workq_t *wq = container->wq;
+
+	container->cb(container->data);
+
+#ifdef DEBUG
+	DWC_CIRCLEQ_REMOVE(&wq->entries, container, entry);
+#endif
+	DWC_DEBUG("Work done: %s, container=%p", container->name, container);
+	if (container->name) {
+		DWC_FREE(container->name);
+	}
+	DWC_FREE(container);
+
+	DWC_SPINLOCK_IRQSAVE(wq->lock, &flags);
+	wq->pending--;
+	DWC_SPINUNLOCK_IRQRESTORE(wq->lock, flags);
+	DWC_WAITQ_TRIGGER(wq->waitq);
+}
+
+static int work_done(void *data)
+{
+	dwc_workq_t *workq = (dwc_workq_t *)data;
+	return workq->pending == 0;
+}
+
+int DWC_WORKQ_WAIT_WORK_DONE(dwc_workq_t *workq, int timeout)
+{
+	return DWC_WAITQ_WAIT_TIMEOUT(workq->waitq, work_done, workq, timeout);
+}
+
+dwc_workq_t *DWC_WORKQ_ALLOC(char *name)
+{
+	dwc_workq_t *wq = DWC_ALLOC(sizeof(*wq));
+
+	if (!wq) {
+		return NULL;
+	}
+
+	wq->wq = create_singlethread_workqueue(name);
+	if (!wq->wq) {
+		goto no_wq;
+	}
+
+	wq->pending = 0;
+
+	wq->lock = DWC_SPINLOCK_ALLOC();
+	if (!wq->lock) {
+		goto no_lock;
+	}
+
+	wq->waitq = DWC_WAITQ_ALLOC();
+	if (!wq->waitq) {
+		goto no_waitq;
+	}
+
+#ifdef DEBUG
+	DWC_CIRCLEQ_INIT(&wq->entries);
+#endif
+	return wq;
+
+ no_waitq:
+	DWC_SPINLOCK_FREE(wq->lock);
+ no_lock:
+	destroy_workqueue(wq->wq);
+ no_wq:
+	DWC_FREE(wq);
+
+	return NULL;
+}
+
+void DWC_WORKQ_FREE(dwc_workq_t *wq)
+{
+#ifdef DEBUG
+	if (wq->pending != 0) {
+		struct work_container *wc;
+		DWC_ERROR("Destroying work queue with pending work");
+		DWC_CIRCLEQ_FOREACH(wc, &wq->entries, entry) {
+			DWC_ERROR("Work %s still pending", wc->name);
+		}
+	}
+#endif
+	destroy_workqueue(wq->wq);
+	DWC_SPINLOCK_FREE(wq->lock);
+	DWC_WAITQ_FREE(wq->waitq);
+	DWC_FREE(wq);
+}
+
+void DWC_WORKQ_SCHEDULE(dwc_workq_t *wq, dwc_work_callback_t cb, void *data,
+			char *format, ...)
+{
+	dwc_irqflags_t flags;
+	work_container_t *container;
+	static char name[128];
+	va_list args;
+
+	va_start(args, format);
+	DWC_VSNPRINTF(name, 128, format, args);
+	va_end(args);
+
+	DWC_SPINLOCK_IRQSAVE(wq->lock, &flags);
+	wq->pending++;
+	DWC_SPINUNLOCK_IRQRESTORE(wq->lock, flags);
+	DWC_WAITQ_TRIGGER(wq->waitq);
+
+	container = DWC_ALLOC_ATOMIC(sizeof(*container));
+	if (!container) {
+		DWC_ERROR("Cannot allocate memory for container\n");
+		return;
+	}
+
+	container->name = DWC_STRDUP(name);
+	if (!container->name) {
+		DWC_ERROR("Cannot allocate memory for container->name\n");
+		DWC_FREE(container);
+		return;
+	}
+
+	container->cb = cb;
+	container->data = data;
+	container->wq = wq;
+	DWC_DEBUG("Queueing work: %s, container=%p", container->name, container);
+	INIT_WORK(&container->work.work, do_work);
+
+#ifdef DEBUG
+	DWC_CIRCLEQ_INSERT_TAIL(&wq->entries, container, entry);
+#endif
+	queue_work(wq->wq, &container->work.work);
+}
+
+void DWC_WORKQ_SCHEDULE_DELAYED(dwc_workq_t *wq, dwc_work_callback_t cb,
+				void *data, uint32_t time, char *format, ...)
+{
+	dwc_irqflags_t flags;
+	work_container_t *container;
+	static char name[128];
+	va_list args;
+
+	va_start(args, format);
+	DWC_VSNPRINTF(name, 128, format, args);
+	va_end(args);
+
+	DWC_SPINLOCK_IRQSAVE(wq->lock, &flags);
+	wq->pending++;
+	DWC_SPINUNLOCK_IRQRESTORE(wq->lock, flags);
+	DWC_WAITQ_TRIGGER(wq->waitq);
+
+	container = DWC_ALLOC_ATOMIC(sizeof(*container));
+	if (!container) {
+		DWC_ERROR("Cannot allocate memory for container\n");
+		return;
+	}
+
+	container->name = DWC_STRDUP(name);
+	if (!container->name) {
+		DWC_ERROR("Cannot allocate memory for container->name\n");
+		DWC_FREE(container);
+		return;
+	}
+
+	container->cb = cb;
+	container->data = data;
+	container->wq = wq;
+	DWC_DEBUG("Queueing work: %s, container=%p", container->name, container);
+	INIT_DELAYED_WORK(&container->work, do_work);
+
+#ifdef DEBUG
+	DWC_CIRCLEQ_INSERT_TAIL(&wq->entries, container, entry);
+#endif
+	queue_delayed_work(wq->wq, &container->work, msecs_to_jiffies(time));
+}
+
+int DWC_WORKQ_PENDING(dwc_workq_t *wq)
+{
+	return wq->pending;
+}
+
+
+#ifdef DWC_LIBMODULE
+
+#ifdef DWC_CCLIB
+/* CC */
+EXPORT_SYMBOL(dwc_cc_if_alloc);
+EXPORT_SYMBOL(dwc_cc_if_free);
+EXPORT_SYMBOL(dwc_cc_clear);
+EXPORT_SYMBOL(dwc_cc_add);
+EXPORT_SYMBOL(dwc_cc_remove);
+EXPORT_SYMBOL(dwc_cc_change);
+EXPORT_SYMBOL(dwc_cc_data_for_save);
+EXPORT_SYMBOL(dwc_cc_restore_from_data);
+EXPORT_SYMBOL(dwc_cc_match_chid);
+EXPORT_SYMBOL(dwc_cc_match_cdid);
+EXPORT_SYMBOL(dwc_cc_ck);
+EXPORT_SYMBOL(dwc_cc_chid);
+EXPORT_SYMBOL(dwc_cc_cdid);
+EXPORT_SYMBOL(dwc_cc_name);
+#endif	/* DWC_CCLIB */
+
+#ifdef DWC_CRYPTOLIB
+# ifndef CONFIG_MACH_IPMATE
+/* Modpow */
+EXPORT_SYMBOL(dwc_modpow);
+
+/* DH */
+EXPORT_SYMBOL(dwc_dh_modpow);
+EXPORT_SYMBOL(dwc_dh_derive_keys);
+EXPORT_SYMBOL(dwc_dh_pk);
+# endif	/* CONFIG_MACH_IPMATE */
+
+/* Crypto */
+EXPORT_SYMBOL(dwc_wusb_aes_encrypt);
+EXPORT_SYMBOL(dwc_wusb_cmf);
+EXPORT_SYMBOL(dwc_wusb_prf);
+EXPORT_SYMBOL(dwc_wusb_fill_ccm_nonce);
+EXPORT_SYMBOL(dwc_wusb_gen_nonce);
+EXPORT_SYMBOL(dwc_wusb_gen_key);
+EXPORT_SYMBOL(dwc_wusb_gen_mic);
+#endif	/* DWC_CRYPTOLIB */
+
+/* Notification */
+#ifdef DWC_NOTIFYLIB
+EXPORT_SYMBOL(dwc_alloc_notification_manager);
+EXPORT_SYMBOL(dwc_free_notification_manager);
+EXPORT_SYMBOL(dwc_register_notifier);
+EXPORT_SYMBOL(dwc_unregister_notifier);
+EXPORT_SYMBOL(dwc_add_observer);
+EXPORT_SYMBOL(dwc_remove_observer);
+EXPORT_SYMBOL(dwc_notify);
+#endif
+
+/* Memory Debugging Routines */
+#ifdef DWC_DEBUG_MEMORY
+EXPORT_SYMBOL(dwc_alloc_debug);
+EXPORT_SYMBOL(dwc_alloc_atomic_debug);
+EXPORT_SYMBOL(dwc_free_debug);
+EXPORT_SYMBOL(dwc_dma_alloc_debug);
+EXPORT_SYMBOL(dwc_dma_free_debug);
+#endif
+
+EXPORT_SYMBOL(DWC_MEMSET);
+EXPORT_SYMBOL(DWC_MEMCPY);
+EXPORT_SYMBOL(DWC_MEMMOVE);
+EXPORT_SYMBOL(DWC_MEMCMP);
+EXPORT_SYMBOL(DWC_STRNCMP);
+EXPORT_SYMBOL(DWC_STRCMP);
+EXPORT_SYMBOL(DWC_STRLEN);
+EXPORT_SYMBOL(DWC_STRCPY);
+EXPORT_SYMBOL(DWC_STRDUP);
+EXPORT_SYMBOL(DWC_ATOI);
+EXPORT_SYMBOL(DWC_ATOUI);
+
+#ifdef DWC_UTFLIB
+EXPORT_SYMBOL(DWC_UTF8_TO_UTF16LE);
+#endif	/* DWC_UTFLIB */
+
+EXPORT_SYMBOL(DWC_IN_IRQ);
+EXPORT_SYMBOL(DWC_IN_BH);
+EXPORT_SYMBOL(DWC_VPRINTF);
+EXPORT_SYMBOL(DWC_VSNPRINTF);
+EXPORT_SYMBOL(DWC_PRINTF);
+EXPORT_SYMBOL(DWC_SPRINTF);
+EXPORT_SYMBOL(DWC_SNPRINTF);
+EXPORT_SYMBOL(__DWC_WARN);
+EXPORT_SYMBOL(__DWC_ERROR);
+EXPORT_SYMBOL(DWC_EXCEPTION);
+
+#ifdef DEBUG
+EXPORT_SYMBOL(__DWC_DEBUG);
+#endif
+
+EXPORT_SYMBOL(__DWC_DMA_ALLOC);
+EXPORT_SYMBOL(__DWC_DMA_ALLOC_ATOMIC);
+EXPORT_SYMBOL(__DWC_DMA_FREE);
+EXPORT_SYMBOL(__DWC_ALLOC);
+EXPORT_SYMBOL(__DWC_ALLOC_ATOMIC);
+EXPORT_SYMBOL(__DWC_FREE);
+
+#ifdef DWC_CRYPTOLIB
+EXPORT_SYMBOL(DWC_RANDOM_BYTES);
+EXPORT_SYMBOL(DWC_AES_CBC);
+EXPORT_SYMBOL(DWC_SHA256);
+EXPORT_SYMBOL(DWC_HMAC_SHA256);
+#endif
+
+EXPORT_SYMBOL(DWC_CPU_TO_LE32);
+EXPORT_SYMBOL(DWC_CPU_TO_BE32);
+EXPORT_SYMBOL(DWC_LE32_TO_CPU);
+EXPORT_SYMBOL(DWC_BE32_TO_CPU);
+EXPORT_SYMBOL(DWC_CPU_TO_LE16);
+EXPORT_SYMBOL(DWC_CPU_TO_BE16);
+EXPORT_SYMBOL(DWC_LE16_TO_CPU);
+EXPORT_SYMBOL(DWC_BE16_TO_CPU);
+EXPORT_SYMBOL(DWC_READ_REG32);
+EXPORT_SYMBOL(DWC_WRITE_REG32);
+EXPORT_SYMBOL(DWC_MODIFY_REG32);
+
+#if 0
+EXPORT_SYMBOL(DWC_READ_REG64);
+EXPORT_SYMBOL(DWC_WRITE_REG64);
+EXPORT_SYMBOL(DWC_MODIFY_REG64);
+#endif
+
+EXPORT_SYMBOL(DWC_SPINLOCK_ALLOC);
+EXPORT_SYMBOL(DWC_SPINLOCK_FREE);
+EXPORT_SYMBOL(DWC_SPINLOCK);
+EXPORT_SYMBOL(DWC_SPINUNLOCK);
+EXPORT_SYMBOL(DWC_SPINLOCK_IRQSAVE);
+EXPORT_SYMBOL(DWC_SPINUNLOCK_IRQRESTORE);
+EXPORT_SYMBOL(DWC_MUTEX_ALLOC);
+
+#if (!defined(DWC_LINUX) || !defined(CONFIG_DEBUG_MUTEXES))
+EXPORT_SYMBOL(DWC_MUTEX_FREE);
+#endif
+
+EXPORT_SYMBOL(DWC_MUTEX_LOCK);
+EXPORT_SYMBOL(DWC_MUTEX_TRYLOCK);
+EXPORT_SYMBOL(DWC_MUTEX_UNLOCK);
+EXPORT_SYMBOL(DWC_UDELAY);
+EXPORT_SYMBOL(DWC_MDELAY);
+EXPORT_SYMBOL(DWC_MSLEEP);
+EXPORT_SYMBOL(DWC_TIME);
+EXPORT_SYMBOL(DWC_TIMER_ALLOC);
+EXPORT_SYMBOL(DWC_TIMER_FREE);
+EXPORT_SYMBOL(DWC_TIMER_SCHEDULE);
+EXPORT_SYMBOL(DWC_TIMER_CANCEL);
+EXPORT_SYMBOL(DWC_WAITQ_ALLOC);
+EXPORT_SYMBOL(DWC_WAITQ_FREE);
+EXPORT_SYMBOL(DWC_WAITQ_WAIT);
+EXPORT_SYMBOL(DWC_WAITQ_WAIT_TIMEOUT);
+EXPORT_SYMBOL(DWC_WAITQ_TRIGGER);
+EXPORT_SYMBOL(DWC_WAITQ_ABORT);
+EXPORT_SYMBOL(DWC_THREAD_RUN);
+EXPORT_SYMBOL(DWC_THREAD_STOP);
+EXPORT_SYMBOL(DWC_THREAD_SHOULD_STOP);
+EXPORT_SYMBOL(DWC_TASK_ALLOC);
+EXPORT_SYMBOL(DWC_TASK_FREE);
+EXPORT_SYMBOL(DWC_TASK_SCHEDULE);
+EXPORT_SYMBOL(DWC_WORKQ_WAIT_WORK_DONE);
+EXPORT_SYMBOL(DWC_WORKQ_ALLOC);
+EXPORT_SYMBOL(DWC_WORKQ_FREE);
+EXPORT_SYMBOL(DWC_WORKQ_SCHEDULE);
+EXPORT_SYMBOL(DWC_WORKQ_SCHEDULE_DELAYED);
+EXPORT_SYMBOL(DWC_WORKQ_PENDING);
+
+static int dwc_common_port_init_module(void)
+{
+	int result = 0;
+
+	printk(KERN_DEBUG "Module dwc_common_port init\n" );
+
+#ifdef DWC_DEBUG_MEMORY
+	result = dwc_memory_debug_start(NULL);
+	if (result) {
+		printk(KERN_ERR
+		       "dwc_memory_debug_start() failed with error %d\n",
+		       result);
+		return result;
+	}
+#endif
+
+#ifdef DWC_NOTIFYLIB
+	result = dwc_alloc_notification_manager(NULL, NULL);
+	if (result) {
+		printk(KERN_ERR
+		       "dwc_alloc_notification_manager() failed with error %d\n",
+		       result);
+		return result;
+	}
+#endif
+	return result;
+}
+
+static void dwc_common_port_exit_module(void)
+{
+	printk(KERN_DEBUG "Module dwc_common_port exit\n" );
+
+#ifdef DWC_NOTIFYLIB
+	dwc_free_notification_manager();
+#endif
+
+#ifdef DWC_DEBUG_MEMORY
+	dwc_memory_debug_stop();
+#endif
+}
+
+module_init(dwc_common_port_init_module);
+module_exit(dwc_common_port_exit_module);
+
+MODULE_DESCRIPTION("DWC Common Library - Portable version");
+MODULE_AUTHOR("Synopsys Inc.");
+MODULE_LICENSE ("GPL");
+
+#endif	/* DWC_LIBMODULE */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_common_nbsd.c linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_common_nbsd.c
--- linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_common_nbsd.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_common_nbsd.c	2017-09-23 03:42:50.246674367 +0800
@@ -0,0 +1,1275 @@
+#include "dwc_os.h"
+#include "dwc_list.h"
+
+#ifdef DWC_CCLIB
+# include "dwc_cc.h"
+#endif
+
+#ifdef DWC_CRYPTOLIB
+# include "dwc_modpow.h"
+# include "dwc_dh.h"
+# include "dwc_crypto.h"
+#endif
+
+#ifdef DWC_NOTIFYLIB
+# include "dwc_notifier.h"
+#endif
+
+/* OS-Level Implementations */
+
+/* This is the NetBSD 4.0.1 kernel implementation of the DWC platform library. */
+
+
+/* MISC */
+
+void *DWC_MEMSET(void *dest, uint8_t byte, uint32_t size)
+{
+	return memset(dest, byte, size);
+}
+
+void *DWC_MEMCPY(void *dest, void const *src, uint32_t size)
+{
+	return memcpy(dest, src, size);
+}
+
+void *DWC_MEMMOVE(void *dest, void *src, uint32_t size)
+{
+	bcopy(src, dest, size);
+	return dest;
+}
+
+int DWC_MEMCMP(void *m1, void *m2, uint32_t size)
+{
+	return memcmp(m1, m2, size);
+}
+
+int DWC_STRNCMP(void *s1, void *s2, uint32_t size)
+{
+	return strncmp(s1, s2, size);
+}
+
+int DWC_STRCMP(void *s1, void *s2)
+{
+	return strcmp(s1, s2);
+}
+
+int DWC_STRLEN(char const *str)
+{
+	return strlen(str);
+}
+
+char *DWC_STRCPY(char *to, char const *from)
+{
+	return strcpy(to, from);
+}
+
+char *DWC_STRDUP(char const *str)
+{
+	int len = DWC_STRLEN(str) + 1;
+	char *new = DWC_ALLOC_ATOMIC(len);
+
+	if (!new) {
+		return NULL;
+	}
+
+	DWC_MEMCPY(new, str, len);
+	return new;
+}
+
+int DWC_ATOI(char *str, int32_t *value)
+{
+	char *end = NULL;
+
+	/* NetBSD doesn't have 'strtol' in the kernel, but 'strtoul'
+	 * should be equivalent on 2's complement machines
+	 */
+	*value = strtoul(str, &end, 0);
+	if (*end == '\0') {
+		return 0;
+	}
+
+	return -1;
+}
+
+int DWC_ATOUI(char *str, uint32_t *value)
+{
+	char *end = NULL;
+
+	*value = strtoul(str, &end, 0);
+	if (*end == '\0') {
+		return 0;
+	}
+
+	return -1;
+}
+
+
+#ifdef DWC_UTFLIB
+/* From usbstring.c */
+
+int DWC_UTF8_TO_UTF16LE(uint8_t const *s, uint16_t *cp, unsigned len)
+{
+	int	count = 0;
+	u8	c;
+	u16	uchar;
+
+	/* this insists on correct encodings, though not minimal ones.
+	 * BUT it currently rejects legit 4-byte UTF-8 code points,
+	 * which need surrogate pairs.  (Unicode 3.1 can use them.)
+	 */
+	while (len != 0 && (c = (u8) *s++) != 0) {
+		if (unlikely(c & 0x80)) {
+			// 2-byte sequence:
+			// 00000yyyyyxxxxxx = 110yyyyy 10xxxxxx
+			if ((c & 0xe0) == 0xc0) {
+				uchar = (c & 0x1f) << 6;
+
+				c = (u8) *s++;
+				if ((c & 0xc0) != 0xc0)
+					goto fail;
+				c &= 0x3f;
+				uchar |= c;
+
+			// 3-byte sequence (most CJKV characters):
+			// zzzzyyyyyyxxxxxx = 1110zzzz 10yyyyyy 10xxxxxx
+			} else if ((c & 0xf0) == 0xe0) {
+				uchar = (c & 0x0f) << 12;
+
+				c = (u8) *s++;
+				if ((c & 0xc0) != 0xc0)
+					goto fail;
+				c &= 0x3f;
+				uchar |= c << 6;
+
+				c = (u8) *s++;
+				if ((c & 0xc0) != 0xc0)
+					goto fail;
+				c &= 0x3f;
+				uchar |= c;
+
+				/* no bogus surrogates */
+				if (0xd800 <= uchar && uchar <= 0xdfff)
+					goto fail;
+
+			// 4-byte sequence (surrogate pairs, currently rare):
+			// 11101110wwwwzzzzyy + 110111yyyyxxxxxx
+			//     = 11110uuu 10uuzzzz 10yyyyyy 10xxxxxx
+			// (uuuuu = wwww + 1)
+			// FIXME accept the surrogate code points (only)
+			} else
+				goto fail;
+		} else
+			uchar = c;
+		put_unaligned (cpu_to_le16 (uchar), cp++);
+		count++;
+		len--;
+	}
+	return count;
+fail:
+	return -1;
+}
+
+#endif	/* DWC_UTFLIB */
+
+
+/* dwc_debug.h */
+
+dwc_bool_t DWC_IN_IRQ(void)
+{
+//	return in_irq();
+	return 0;
+}
+
+dwc_bool_t DWC_IN_BH(void)
+{
+//	return in_softirq();
+	return 0;
+}
+
+void DWC_VPRINTF(char *format, va_list args)
+{
+	vprintf(format, args);
+}
+
+int DWC_VSNPRINTF(char *str, int size, char *format, va_list args)
+{
+	return vsnprintf(str, size, format, args);
+}
+
+void DWC_PRINTF(char *format, ...)
+{
+	va_list args;
+
+	va_start(args, format);
+	DWC_VPRINTF(format, args);
+	va_end(args);
+}
+
+int DWC_SPRINTF(char *buffer, char *format, ...)
+{
+	int retval;
+	va_list args;
+
+	va_start(args, format);
+	retval = vsprintf(buffer, format, args);
+	va_end(args);
+	return retval;
+}
+
+int DWC_SNPRINTF(char *buffer, int size, char *format, ...)
+{
+	int retval;
+	va_list args;
+
+	va_start(args, format);
+	retval = vsnprintf(buffer, size, format, args);
+	va_end(args);
+	return retval;
+}
+
+void __DWC_WARN(char *format, ...)
+{
+	va_list args;
+
+	va_start(args, format);
+	DWC_VPRINTF(format, args);
+	va_end(args);
+}
+
+void __DWC_ERROR(char *format, ...)
+{
+	va_list args;
+
+	va_start(args, format);
+	DWC_VPRINTF(format, args);
+	va_end(args);
+}
+
+void DWC_EXCEPTION(char *format, ...)
+{
+	va_list args;
+
+	va_start(args, format);
+	DWC_VPRINTF(format, args);
+	va_end(args);
+//	BUG_ON(1);	???
+}
+
+#ifdef DEBUG
+void __DWC_DEBUG(char *format, ...)
+{
+	va_list args;
+
+	va_start(args, format);
+	DWC_VPRINTF(format, args);
+	va_end(args);
+}
+#endif
+
+
+/* dwc_mem.h */
+
+#if 0
+dwc_pool_t *DWC_DMA_POOL_CREATE(uint32_t size,
+				uint32_t align,
+				uint32_t alloc)
+{
+	struct dma_pool *pool = dma_pool_create("Pool", NULL,
+						size, align, alloc);
+	return (dwc_pool_t *)pool;
+}
+
+void DWC_DMA_POOL_DESTROY(dwc_pool_t *pool)
+{
+	dma_pool_destroy((struct dma_pool *)pool);
+}
+
+void *DWC_DMA_POOL_ALLOC(dwc_pool_t *pool, uint64_t *dma_addr)
+{
+//	return dma_pool_alloc((struct dma_pool *)pool, GFP_KERNEL, dma_addr);
+	return dma_pool_alloc((struct dma_pool *)pool, M_WAITOK, dma_addr);
+}
+
+void *DWC_DMA_POOL_ZALLOC(dwc_pool_t *pool, uint64_t *dma_addr)
+{
+	void *vaddr = DWC_DMA_POOL_ALLOC(pool, dma_addr);
+	memset(..);
+}
+
+void DWC_DMA_POOL_FREE(dwc_pool_t *pool, void *vaddr, void *daddr)
+{
+	dma_pool_free(pool, vaddr, daddr);
+}
+#endif
+
+void *__DWC_DMA_ALLOC(void *dma_ctx, uint32_t size, dwc_dma_t *dma_addr)
+{
+	dwc_dmactx_t *dma = (dwc_dmactx_t *)dma_ctx;
+	int error;
+
+	error = bus_dmamem_alloc(dma->dma_tag, size, 1, size, dma->segs,
+				 sizeof(dma->segs) / sizeof(dma->segs[0]),
+				 &dma->nsegs, BUS_DMA_NOWAIT);
+	if (error) {
+		printf("%s: bus_dmamem_alloc(%ju) failed: %d\n", __func__,
+		       (uintmax_t)size, error);
+		goto fail_0;
+	}
+
+	error = bus_dmamem_map(dma->dma_tag, dma->segs, dma->nsegs, size,
+			       (caddr_t *)&dma->dma_vaddr,
+			       BUS_DMA_NOWAIT | BUS_DMA_COHERENT);
+	if (error) {
+		printf("%s: bus_dmamem_map failed: %d\n", __func__, error);
+		goto fail_1;
+	}
+
+	error = bus_dmamap_create(dma->dma_tag, size, 1, size, 0,
+				  BUS_DMA_NOWAIT, &dma->dma_map);
+	if (error) {
+		printf("%s: bus_dmamap_create failed: %d\n", __func__, error);
+		goto fail_2;
+	}
+
+	error = bus_dmamap_load(dma->dma_tag, dma->dma_map, dma->dma_vaddr,
+				size, NULL, BUS_DMA_NOWAIT);
+	if (error) {
+		printf("%s: bus_dmamap_load failed: %d\n", __func__, error);
+		goto fail_3;
+	}
+
+	dma->dma_paddr = (bus_addr_t)dma->segs[0].ds_addr;
+	*dma_addr = dma->dma_paddr;
+	return dma->dma_vaddr;
+
+fail_3:
+	bus_dmamap_destroy(dma->dma_tag, dma->dma_map);
+fail_2:
+	bus_dmamem_unmap(dma->dma_tag, dma->dma_vaddr, size);
+fail_1:
+	bus_dmamem_free(dma->dma_tag, dma->segs, dma->nsegs);
+fail_0:
+	dma->dma_map = NULL;
+	dma->dma_vaddr = NULL;
+	dma->nsegs = 0;
+
+	return NULL;
+}
+
+void __DWC_DMA_FREE(void *dma_ctx, uint32_t size, void *virt_addr, dwc_dma_t dma_addr)
+{
+	dwc_dmactx_t *dma = (dwc_dmactx_t *)dma_ctx;
+
+	if (dma->dma_map != NULL) {
+		bus_dmamap_sync(dma->dma_tag, dma->dma_map, 0, size,
+				BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
+		bus_dmamap_unload(dma->dma_tag, dma->dma_map);
+		bus_dmamap_destroy(dma->dma_tag, dma->dma_map);
+		bus_dmamem_unmap(dma->dma_tag, dma->dma_vaddr, size);
+		bus_dmamem_free(dma->dma_tag, dma->segs, dma->nsegs);
+		dma->dma_paddr = 0;
+		dma->dma_map = NULL;
+		dma->dma_vaddr = NULL;
+		dma->nsegs = 0;
+	}
+}
+
+void *__DWC_ALLOC(void *mem_ctx, uint32_t size)
+{
+	return malloc(size, M_DEVBUF, M_WAITOK | M_ZERO);
+}
+
+void *__DWC_ALLOC_ATOMIC(void *mem_ctx, uint32_t size)
+{
+	return malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO);
+}
+
+void __DWC_FREE(void *mem_ctx, void *addr)
+{
+	free(addr, M_DEVBUF);
+}
+
+
+#ifdef DWC_CRYPTOLIB
+/* dwc_crypto.h */
+
+void DWC_RANDOM_BYTES(uint8_t *buffer, uint32_t length)
+{
+	get_random_bytes(buffer, length);
+}
+
+int DWC_AES_CBC(uint8_t *message, uint32_t messagelen, uint8_t *key, uint32_t keylen, uint8_t iv[16], uint8_t *out)
+{
+	struct crypto_blkcipher *tfm;
+	struct blkcipher_desc desc;
+	struct scatterlist sgd;
+	struct scatterlist sgs;
+
+	tfm = crypto_alloc_blkcipher("cbc(aes)", 0, CRYPTO_ALG_ASYNC);
+	if (tfm == NULL) {
+		printk("failed to load transform for aes CBC\n");
+		return -1;
+	}
+
+	crypto_blkcipher_setkey(tfm, key, keylen);
+	crypto_blkcipher_set_iv(tfm, iv, 16);
+
+	sg_init_one(&sgd, out, messagelen);
+	sg_init_one(&sgs, message, messagelen);
+
+	desc.tfm = tfm;
+	desc.flags = 0;
+
+	if (crypto_blkcipher_encrypt(&desc, &sgd, &sgs, messagelen)) {
+		crypto_free_blkcipher(tfm);
+		DWC_ERROR("AES CBC encryption failed");
+		return -1;
+	}
+
+	crypto_free_blkcipher(tfm);
+	return 0;
+}
+
+int DWC_SHA256(uint8_t *message, uint32_t len, uint8_t *out)
+{
+	struct crypto_hash *tfm;
+	struct hash_desc desc;
+	struct scatterlist sg;
+
+	tfm = crypto_alloc_hash("sha256", 0, CRYPTO_ALG_ASYNC);
+	if (IS_ERR(tfm)) {
+		DWC_ERROR("Failed to load transform for sha256: %ld", PTR_ERR(tfm));
+		return 0;
+	}
+	desc.tfm = tfm;
+	desc.flags = 0;
+
+	sg_init_one(&sg, message, len);
+	crypto_hash_digest(&desc, &sg, len, out);
+	crypto_free_hash(tfm);
+
+	return 1;
+}
+
+int DWC_HMAC_SHA256(uint8_t *message, uint32_t messagelen,
+		    uint8_t *key, uint32_t keylen, uint8_t *out)
+{
+	struct crypto_hash *tfm;
+	struct hash_desc desc;
+	struct scatterlist sg;
+
+	tfm = crypto_alloc_hash("hmac(sha256)", 0, CRYPTO_ALG_ASYNC);
+	if (IS_ERR(tfm)) {
+		DWC_ERROR("Failed to load transform for hmac(sha256): %ld", PTR_ERR(tfm));
+		return 0;
+	}
+	desc.tfm = tfm;
+	desc.flags = 0;
+
+	sg_init_one(&sg, message, messagelen);
+	crypto_hash_setkey(tfm, key, keylen);
+	crypto_hash_digest(&desc, &sg, messagelen, out);
+	crypto_free_hash(tfm);
+
+	return 1;
+}
+
+#endif	/* DWC_CRYPTOLIB */
+
+
+/* Byte Ordering Conversions */
+
+uint32_t DWC_CPU_TO_LE32(uint32_t *p)
+{
+#ifdef __LITTLE_ENDIAN
+	return *p;
+#else
+	uint8_t *u_p = (uint8_t *)p;
+
+	return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24));
+#endif
+}
+
+uint32_t DWC_CPU_TO_BE32(uint32_t *p)
+{
+#ifdef __BIG_ENDIAN
+	return *p;
+#else
+	uint8_t *u_p = (uint8_t *)p;
+
+	return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24));
+#endif
+}
+
+uint32_t DWC_LE32_TO_CPU(uint32_t *p)
+{
+#ifdef __LITTLE_ENDIAN
+	return *p;
+#else
+	uint8_t *u_p = (uint8_t *)p;
+
+	return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24));
+#endif
+}
+
+uint32_t DWC_BE32_TO_CPU(uint32_t *p)
+{
+#ifdef __BIG_ENDIAN
+	return *p;
+#else
+	uint8_t *u_p = (uint8_t *)p;
+
+	return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24));
+#endif
+}
+
+uint16_t DWC_CPU_TO_LE16(uint16_t *p)
+{
+#ifdef __LITTLE_ENDIAN
+	return *p;
+#else
+	uint8_t *u_p = (uint8_t *)p;
+	return (u_p[1] | (u_p[0] << 8));
+#endif
+}
+
+uint16_t DWC_CPU_TO_BE16(uint16_t *p)
+{
+#ifdef __BIG_ENDIAN
+	return *p;
+#else
+	uint8_t *u_p = (uint8_t *)p;
+	return (u_p[1] | (u_p[0] << 8));
+#endif
+}
+
+uint16_t DWC_LE16_TO_CPU(uint16_t *p)
+{
+#ifdef __LITTLE_ENDIAN
+	return *p;
+#else
+	uint8_t *u_p = (uint8_t *)p;
+	return (u_p[1] | (u_p[0] << 8));
+#endif
+}
+
+uint16_t DWC_BE16_TO_CPU(uint16_t *p)
+{
+#ifdef __BIG_ENDIAN
+	return *p;
+#else
+	uint8_t *u_p = (uint8_t *)p;
+	return (u_p[1] | (u_p[0] << 8));
+#endif
+}
+
+
+/* Registers */
+
+uint32_t DWC_READ_REG32(void *io_ctx, uint32_t volatile *reg)
+{
+	dwc_ioctx_t *io = (dwc_ioctx_t *)io_ctx;
+	bus_size_t ior = (bus_size_t)reg;
+
+	return bus_space_read_4(io->iot, io->ioh, ior);
+}
+
+#if 0
+uint64_t DWC_READ_REG64(void *io_ctx, uint64_t volatile *reg)
+{
+	dwc_ioctx_t *io = (dwc_ioctx_t *)io_ctx;
+	bus_size_t ior = (bus_size_t)reg;
+
+	return bus_space_read_8(io->iot, io->ioh, ior);
+}
+#endif
+
+void DWC_WRITE_REG32(void *io_ctx, uint32_t volatile *reg, uint32_t value)
+{
+	dwc_ioctx_t *io = (dwc_ioctx_t *)io_ctx;
+	bus_size_t ior = (bus_size_t)reg;
+
+	bus_space_write_4(io->iot, io->ioh, ior, value);
+}
+
+#if 0
+void DWC_WRITE_REG64(void *io_ctx, uint64_t volatile *reg, uint64_t value)
+{
+	dwc_ioctx_t *io = (dwc_ioctx_t *)io_ctx;
+	bus_size_t ior = (bus_size_t)reg;
+
+	bus_space_write_8(io->iot, io->ioh, ior, value);
+}
+#endif
+
+void DWC_MODIFY_REG32(void *io_ctx, uint32_t volatile *reg, uint32_t clear_mask,
+		      uint32_t set_mask)
+{
+	dwc_ioctx_t *io = (dwc_ioctx_t *)io_ctx;
+	bus_size_t ior = (bus_size_t)reg;
+
+	bus_space_write_4(io->iot, io->ioh, ior,
+			  (bus_space_read_4(io->iot, io->ioh, ior) &
+			   ~clear_mask) | set_mask);
+}
+
+#if 0
+void DWC_MODIFY_REG64(void *io_ctx, uint64_t volatile *reg, uint64_t clear_mask,
+		      uint64_t set_mask)
+{
+	dwc_ioctx_t *io = (dwc_ioctx_t *)io_ctx;
+	bus_size_t ior = (bus_size_t)reg;
+
+	bus_space_write_8(io->iot, io->ioh, ior,
+			  (bus_space_read_8(io->iot, io->ioh, ior) &
+			   ~clear_mask) | set_mask);
+}
+#endif
+
+
+/* Locking */
+
+dwc_spinlock_t *DWC_SPINLOCK_ALLOC(void)
+{
+	struct simplelock *sl = DWC_ALLOC(sizeof(*sl));
+
+	if (!sl) {
+		DWC_ERROR("Cannot allocate memory for spinlock");
+		return NULL;
+	}
+
+	simple_lock_init(sl);
+	return (dwc_spinlock_t *)sl;
+}
+
+void DWC_SPINLOCK_FREE(dwc_spinlock_t *lock)
+{
+	struct simplelock *sl = (struct simplelock *)lock;
+
+	DWC_FREE(sl);
+}
+
+void DWC_SPINLOCK(dwc_spinlock_t *lock)
+{
+	simple_lock((struct simplelock *)lock);
+}
+
+void DWC_SPINUNLOCK(dwc_spinlock_t *lock)
+{
+	simple_unlock((struct simplelock *)lock);
+}
+
+void DWC_SPINLOCK_IRQSAVE(dwc_spinlock_t *lock, dwc_irqflags_t *flags)
+{
+	simple_lock((struct simplelock *)lock);
+	*flags = splbio();
+}
+
+void DWC_SPINUNLOCK_IRQRESTORE(dwc_spinlock_t *lock, dwc_irqflags_t flags)
+{
+	splx(flags);
+	simple_unlock((struct simplelock *)lock);
+}
+
+dwc_mutex_t *DWC_MUTEX_ALLOC(void)
+{
+	dwc_mutex_t *mutex = DWC_ALLOC(sizeof(struct lock));
+
+	if (!mutex) {
+		DWC_ERROR("Cannot allocate memory for mutex");
+		return NULL;
+	}
+
+	lockinit((struct lock *)mutex, 0, "dw3mtx", 0, 0);
+	return mutex;
+}
+
+#if (defined(DWC_LINUX) && defined(CONFIG_DEBUG_MUTEXES))
+#else
+void DWC_MUTEX_FREE(dwc_mutex_t *mutex)
+{
+	DWC_FREE(mutex);
+}
+#endif
+
+void DWC_MUTEX_LOCK(dwc_mutex_t *mutex)
+{
+	lockmgr((struct lock *)mutex, LK_EXCLUSIVE, NULL);
+}
+
+int DWC_MUTEX_TRYLOCK(dwc_mutex_t *mutex)
+{
+	int status;
+
+	status = lockmgr((struct lock *)mutex, LK_EXCLUSIVE | LK_NOWAIT, NULL);
+	return status == 0;
+}
+
+void DWC_MUTEX_UNLOCK(dwc_mutex_t *mutex)
+{
+	lockmgr((struct lock *)mutex, LK_RELEASE, NULL);
+}
+
+
+/* Timing */
+
+void DWC_UDELAY(uint32_t usecs)
+{
+	DELAY(usecs);
+}
+
+void DWC_MDELAY(uint32_t msecs)
+{
+	do {
+		DELAY(1000);
+	} while (--msecs);
+}
+
+void DWC_MSLEEP(uint32_t msecs)
+{
+	struct timeval tv;
+
+	tv.tv_sec = msecs / 1000;
+	tv.tv_usec = (msecs - tv.tv_sec * 1000) * 1000;
+	tsleep(&tv, 0, "dw3slp", tvtohz(&tv));
+}
+
+uint32_t DWC_TIME(void)
+{
+	struct timeval tv;
+
+	microuptime(&tv);	// or getmicrouptime? (less precise, but faster)
+	return tv.tv_sec * 1000 + tv.tv_usec / 1000;
+}
+
+
+/* Timers */
+
+struct dwc_timer {
+	struct callout t;
+	char *name;
+	dwc_spinlock_t *lock;
+	dwc_timer_callback_t cb;
+	void *data;
+};
+
+dwc_timer_t *DWC_TIMER_ALLOC(char *name, dwc_timer_callback_t cb, void *data)
+{
+	dwc_timer_t *t = DWC_ALLOC(sizeof(*t));
+
+	if (!t) {
+		DWC_ERROR("Cannot allocate memory for timer");
+		return NULL;
+	}
+
+	callout_init(&t->t);
+
+	t->name = DWC_STRDUP(name);
+	if (!t->name) {
+		DWC_ERROR("Cannot allocate memory for timer->name");
+		goto no_name;
+	}
+
+	t->lock = DWC_SPINLOCK_ALLOC();
+	if (!t->lock) {
+		DWC_ERROR("Cannot allocate memory for timer->lock");
+		goto no_lock;
+	}
+
+	t->cb = cb;
+	t->data = data;
+
+	return t;
+
+ no_lock:
+	DWC_FREE(t->name);
+ no_name:
+	DWC_FREE(t);
+
+	return NULL;
+}
+
+void DWC_TIMER_FREE(dwc_timer_t *timer)
+{
+	callout_stop(&timer->t);
+	DWC_SPINLOCK_FREE(timer->lock);
+	DWC_FREE(timer->name);
+	DWC_FREE(timer);
+}
+
+void DWC_TIMER_SCHEDULE(dwc_timer_t *timer, uint32_t time)
+{
+	struct timeval tv;
+
+	tv.tv_sec = time / 1000;
+	tv.tv_usec = (time - tv.tv_sec * 1000) * 1000;
+	callout_reset(&timer->t, tvtohz(&tv), timer->cb, timer->data);
+}
+
+void DWC_TIMER_CANCEL(dwc_timer_t *timer)
+{
+	callout_stop(&timer->t);
+}
+
+
+/* Wait Queues */
+
+struct dwc_waitq {
+	struct simplelock lock;
+	int abort;
+};
+
+dwc_waitq_t *DWC_WAITQ_ALLOC(void)
+{
+	dwc_waitq_t *wq = DWC_ALLOC(sizeof(*wq));
+
+	if (!wq) {
+		DWC_ERROR("Cannot allocate memory for waitqueue");
+		return NULL;
+	}
+
+	simple_lock_init(&wq->lock);
+	wq->abort = 0;
+
+	return wq;
+}
+
+void DWC_WAITQ_FREE(dwc_waitq_t *wq)
+{
+	DWC_FREE(wq);
+}
+
+int32_t DWC_WAITQ_WAIT(dwc_waitq_t *wq, dwc_waitq_condition_t cond, void *data)
+{
+	int ipl;
+	int result = 0;
+
+	simple_lock(&wq->lock);
+	ipl = splbio();
+
+	/* Skip the sleep if already aborted or triggered */
+	if (!wq->abort && !cond(data)) {
+		splx(ipl);
+		result = ltsleep(wq, PCATCH, "dw3wat", 0, &wq->lock); // infinite timeout
+		ipl = splbio();
+	}
+
+	if (result == 0) {			// awoken
+		if (wq->abort) {
+			wq->abort = 0;
+			result = -DWC_E_ABORT;
+		} else {
+			result = 0;
+		}
+
+		splx(ipl);
+		simple_unlock(&wq->lock);
+	} else {
+		wq->abort = 0;
+		splx(ipl);
+		simple_unlock(&wq->lock);
+
+		if (result == ERESTART) {	// signaled - restart
+			result = -DWC_E_RESTART;
+		} else {			// signaled - must be EINTR
+			result = -DWC_E_ABORT;
+		}
+	}
+
+	return result;
+}
+
+int32_t DWC_WAITQ_WAIT_TIMEOUT(dwc_waitq_t *wq, dwc_waitq_condition_t cond,
+			       void *data, int32_t msecs)
+{
+	struct timeval tv, tv1, tv2;
+	int ipl;
+	int result = 0;
+
+	tv.tv_sec = msecs / 1000;
+	tv.tv_usec = (msecs - tv.tv_sec * 1000) * 1000;
+
+	simple_lock(&wq->lock);
+	ipl = splbio();
+
+	/* Skip the sleep if already aborted or triggered */
+	if (!wq->abort && !cond(data)) {
+		splx(ipl);
+		getmicrouptime(&tv1);
+		result = ltsleep(wq, PCATCH, "dw3wto", tvtohz(&tv), &wq->lock);
+		getmicrouptime(&tv2);
+		ipl = splbio();
+	}
+
+	if (result == 0) {			// awoken
+		if (wq->abort) {
+			wq->abort = 0;
+			splx(ipl);
+			simple_unlock(&wq->lock);
+			result = -DWC_E_ABORT;
+		} else {
+			splx(ipl);
+			simple_unlock(&wq->lock);
+
+			tv2.tv_usec -= tv1.tv_usec;
+			if (tv2.tv_usec < 0) {
+				tv2.tv_usec += 1000000;
+				tv2.tv_sec--;
+			}
+
+			tv2.tv_sec -= tv1.tv_sec;
+			result = tv2.tv_sec * 1000 + tv2.tv_usec / 1000;
+			result = msecs - result;
+			if (result <= 0)
+				result = 1;
+		}
+	} else {
+		wq->abort = 0;
+		splx(ipl);
+		simple_unlock(&wq->lock);
+
+		if (result == ERESTART) {	// signaled - restart
+			result = -DWC_E_RESTART;
+
+		} else if (result == EINTR) {		// signaled - interrupt
+			result = -DWC_E_ABORT;
+
+		} else {				// timed out
+			result = -DWC_E_TIMEOUT;
+		}
+	}
+
+	return result;
+}
+
+void DWC_WAITQ_TRIGGER(dwc_waitq_t *wq)
+{
+	wakeup(wq);
+}
+
+void DWC_WAITQ_ABORT(dwc_waitq_t *wq)
+{
+	int ipl;
+
+	simple_lock(&wq->lock);
+	ipl = splbio();
+	wq->abort = 1;
+	wakeup(wq);
+	splx(ipl);
+	simple_unlock(&wq->lock);
+}
+
+
+/* Threading */
+
+struct dwc_thread {
+	struct proc *proc;
+	int abort;
+};
+
+dwc_thread_t *DWC_THREAD_RUN(dwc_thread_function_t func, char *name, void *data)
+{
+	int retval;
+	dwc_thread_t *thread = DWC_ALLOC(sizeof(*thread));
+
+	if (!thread) {
+		return NULL;
+	}
+
+	thread->abort = 0;
+	retval = kthread_create1((void (*)(void *))func, data, &thread->proc,
+				 "%s", name);
+	if (retval) {
+		DWC_FREE(thread);
+		return NULL;
+	}
+
+	return thread;
+}
+
+int DWC_THREAD_STOP(dwc_thread_t *thread)
+{
+	int retval;
+
+	thread->abort = 1;
+	retval = tsleep(&thread->abort, 0, "dw3stp", 60 * hz);
+
+	if (retval == 0) {
+		/* DWC_THREAD_EXIT() will free the thread struct */
+		return 0;
+	}
+
+	/* NOTE: We leak the thread struct if thread doesn't die */
+
+	if (retval == EWOULDBLOCK) {
+		return -DWC_E_TIMEOUT;
+	}
+
+	return -DWC_E_UNKNOWN;
+}
+
+dwc_bool_t DWC_THREAD_SHOULD_STOP(dwc_thread_t *thread)
+{
+	return thread->abort;
+}
+
+void DWC_THREAD_EXIT(dwc_thread_t *thread)
+{
+	wakeup(&thread->abort);
+	DWC_FREE(thread);
+	kthread_exit(0);
+}
+
+/* tasklets
+ - Runs in interrupt context (cannot sleep)
+ - Each tasklet runs on a single CPU
+ - Different tasklets can be running simultaneously on different CPUs
+ [ On NetBSD there is no corresponding mechanism, drivers don't have bottom-
+   halves. So we just call the callback directly from DWC_TASK_SCHEDULE() ]
+ */
+struct dwc_tasklet {
+	dwc_tasklet_callback_t cb;
+	void *data;
+};
+
+static void tasklet_callback(void *data)
+{
+	dwc_tasklet_t *task = (dwc_tasklet_t *)data;
+
+	task->cb(task->data);
+}
+
+dwc_tasklet_t *DWC_TASK_ALLOC(char *name, dwc_tasklet_callback_t cb, void *data)
+{
+	dwc_tasklet_t *task = DWC_ALLOC(sizeof(*task));
+
+	if (task) {
+		task->cb = cb;
+		task->data = data;
+	} else {
+		DWC_ERROR("Cannot allocate memory for tasklet");
+	}
+
+	return task;
+}
+
+void DWC_TASK_FREE(dwc_tasklet_t *task)
+{
+	DWC_FREE(task);
+}
+
+void DWC_TASK_SCHEDULE(dwc_tasklet_t *task)
+{
+	tasklet_callback(task);
+}
+
+
+/* workqueues
+ - Runs in process context (can sleep)
+ */
+typedef struct work_container {
+	dwc_work_callback_t cb;
+	void *data;
+	dwc_workq_t *wq;
+	char *name;
+	int hz;
+	struct work task;
+} work_container_t;
+
+struct dwc_workq {
+	struct workqueue *taskq;
+	dwc_spinlock_t *lock;
+	dwc_waitq_t *waitq;
+	int pending;
+	struct work_container *container;
+};
+
+static void do_work(struct work *task, void *data)
+{
+	dwc_workq_t *wq = (dwc_workq_t *)data;
+	work_container_t *container = wq->container;
+	dwc_irqflags_t flags;
+
+	if (container->hz) {
+		tsleep(container, 0, "dw3wrk", container->hz);
+	}
+
+	container->cb(container->data);
+	DWC_DEBUG("Work done: %s, container=%p", container->name, container);
+
+	DWC_SPINLOCK_IRQSAVE(wq->lock, &flags);
+	if (container->name)
+		DWC_FREE(container->name);
+	DWC_FREE(container);
+	wq->pending--;
+	DWC_SPINUNLOCK_IRQRESTORE(wq->lock, flags);
+	DWC_WAITQ_TRIGGER(wq->waitq);
+}
+
+static int work_done(void *data)
+{
+	dwc_workq_t *workq = (dwc_workq_t *)data;
+
+	return workq->pending == 0;
+}
+
+int DWC_WORKQ_WAIT_WORK_DONE(dwc_workq_t *workq, int timeout)
+{
+	return DWC_WAITQ_WAIT_TIMEOUT(workq->waitq, work_done, workq, timeout);
+}
+
+dwc_workq_t *DWC_WORKQ_ALLOC(char *name)
+{
+	int result;
+	dwc_workq_t *wq = DWC_ALLOC(sizeof(*wq));
+
+	if (!wq) {
+		DWC_ERROR("Cannot allocate memory for workqueue");
+		return NULL;
+	}
+
+	result = workqueue_create(&wq->taskq, name, do_work, wq, 0 /*PWAIT*/,
+				  IPL_BIO, 0);
+	if (result) {
+		DWC_ERROR("Cannot create workqueue");
+		goto no_taskq;
+	}
+
+	wq->pending = 0;
+
+	wq->lock = DWC_SPINLOCK_ALLOC();
+	if (!wq->lock) {
+		DWC_ERROR("Cannot allocate memory for spinlock");
+		goto no_lock;
+	}
+
+	wq->waitq = DWC_WAITQ_ALLOC();
+	if (!wq->waitq) {
+		DWC_ERROR("Cannot allocate memory for waitqueue");
+		goto no_waitq;
+	}
+
+	return wq;
+
+ no_waitq:
+	DWC_SPINLOCK_FREE(wq->lock);
+ no_lock:
+	workqueue_destroy(wq->taskq);
+ no_taskq:
+	DWC_FREE(wq);
+
+	return NULL;
+}
+
+void DWC_WORKQ_FREE(dwc_workq_t *wq)
+{
+#ifdef DEBUG
+	dwc_irqflags_t flags;
+
+	DWC_SPINLOCK_IRQSAVE(wq->lock, &flags);
+
+	if (wq->pending != 0) {
+		struct work_container *container = wq->container;
+
+		DWC_ERROR("Destroying work queue with pending work");
+
+		if (container && container->name) {
+			DWC_ERROR("Work %s still pending", container->name);
+		}
+	}
+
+	DWC_SPINUNLOCK_IRQRESTORE(wq->lock, flags);
+#endif
+	DWC_WAITQ_FREE(wq->waitq);
+	DWC_SPINLOCK_FREE(wq->lock);
+	workqueue_destroy(wq->taskq);
+	DWC_FREE(wq);
+}
+
+void DWC_WORKQ_SCHEDULE(dwc_workq_t *wq, dwc_work_callback_t cb, void *data,
+			char *format, ...)
+{
+	dwc_irqflags_t flags;
+	work_container_t *container;
+	static char name[128];
+	va_list args;
+
+	va_start(args, format);
+	DWC_VSNPRINTF(name, 128, format, args);
+	va_end(args);
+
+	DWC_SPINLOCK_IRQSAVE(wq->lock, &flags);
+	wq->pending++;
+	DWC_SPINUNLOCK_IRQRESTORE(wq->lock, flags);
+	DWC_WAITQ_TRIGGER(wq->waitq);
+
+	container = DWC_ALLOC_ATOMIC(sizeof(*container));
+	if (!container) {
+		DWC_ERROR("Cannot allocate memory for container");
+		return;
+	}
+
+	container->name = DWC_STRDUP(name);
+	if (!container->name) {
+		DWC_ERROR("Cannot allocate memory for container->name");
+		DWC_FREE(container);
+		return;
+	}
+
+	container->cb = cb;
+	container->data = data;
+	container->wq = wq;
+	container->hz = 0;
+	wq->container = container;
+
+	DWC_DEBUG("Queueing work: %s, container=%p", container->name, container);
+	workqueue_enqueue(wq->taskq, &container->task);
+}
+
+void DWC_WORKQ_SCHEDULE_DELAYED(dwc_workq_t *wq, dwc_work_callback_t cb,
+				void *data, uint32_t time, char *format, ...)
+{
+	dwc_irqflags_t flags;
+	work_container_t *container;
+	static char name[128];
+	struct timeval tv;
+	va_list args;
+
+	va_start(args, format);
+	DWC_VSNPRINTF(name, 128, format, args);
+	va_end(args);
+
+	DWC_SPINLOCK_IRQSAVE(wq->lock, &flags);
+	wq->pending++;
+	DWC_SPINUNLOCK_IRQRESTORE(wq->lock, flags);
+	DWC_WAITQ_TRIGGER(wq->waitq);
+
+	container = DWC_ALLOC_ATOMIC(sizeof(*container));
+	if (!container) {
+		DWC_ERROR("Cannot allocate memory for container");
+		return;
+	}
+
+	container->name = DWC_STRDUP(name);
+	if (!container->name) {
+		DWC_ERROR("Cannot allocate memory for container->name");
+		DWC_FREE(container);
+		return;
+	}
+
+	container->cb = cb;
+	container->data = data;
+	container->wq = wq;
+	tv.tv_sec = time / 1000;
+	tv.tv_usec = (time - tv.tv_sec * 1000) * 1000;
+	container->hz = tvtohz(&tv);
+	wq->container = container;
+
+	DWC_DEBUG("Queueing work: %s, container=%p", container->name, container);
+	workqueue_enqueue(wq->taskq, &container->task);
+}
+
+int DWC_WORKQ_PENDING(dwc_workq_t *wq)
+{
+	return wq->pending;
+}
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_crypto.c linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_crypto.c
--- linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_crypto.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_crypto.c	2017-09-23 03:42:50.246674367 +0800
@@ -0,0 +1,308 @@
+/* =========================================================================
+ * $File: //dwh/usb_iip/dev/software/dwc_common_port_2/dwc_crypto.c $
+ * $Revision: #5 $
+ * $Date: 2010/09/28 $
+ * $Change: 1596182 $
+ *
+ * Synopsys Portability Library Software and documentation
+ * (hereinafter, "Software") is an Unsupported proprietary work of
+ * Synopsys, Inc. unless otherwise expressly agreed to in writing
+ * between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product
+ * under any End User Software License Agreement or Agreement for
+ * Licensed Product with Synopsys or any supplement thereto. You are
+ * permitted to use and redistribute this Software in source and binary
+ * forms, with or without modification, provided that redistributions
+ * of source code must retain this notice. You may not view, use,
+ * disclose, copy or distribute this file or any information contained
+ * herein except pursuant to this license grant from Synopsys. If you
+ * do not agree with this notice, including the disclaimer below, then
+ * you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL
+ * SYNOPSYS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================= */
+
+/** @file
+ * This file contains the WUSB cryptographic routines.
+ */
+
+#ifdef DWC_CRYPTOLIB
+
+#include "dwc_crypto.h"
+#include "usb.h"
+
+#ifdef DEBUG
+static inline void dump_bytes(char *name, uint8_t *bytes, int len)
+{
+	int i;
+	DWC_PRINTF("%s: ", name);
+	for (i=0; i<len; i++) {
+		DWC_PRINTF("%02x ", bytes[i]);
+	}
+	DWC_PRINTF("\n");
+}
+#else
+#define dump_bytes(x...)
+#endif
+
+/* Display a block */
+void show_block(const u8 *blk, const char *prefix, const char *suffix, int a)
+{
+#ifdef DWC_DEBUG_CRYPTO
+	int i, blksize = 16;
+
+	DWC_DEBUG("%s", prefix);
+
+	if (suffix == NULL) {
+		suffix = "\n";
+		blksize = a;
+	}
+
+	for (i = 0; i < blksize; i++)
+		DWC_PRINT("%02x%s", *blk++, ((i & 3) == 3) ? "  " : " ");
+	DWC_PRINT(suffix);
+#endif
+}
+
+/**
+ * Encrypts an array of bytes using the AES encryption engine.
+ * If <code>dst</code> == <code>src</code>, then the bytes will be encrypted
+ * in-place.
+ *
+ * @return  0 on success, negative error code on error.
+ */
+int dwc_wusb_aes_encrypt(u8 *src, u8 *key, u8 *dst)
+{
+	u8 block_t[16];
+	DWC_MEMSET(block_t, 0, 16);
+
+	return DWC_AES_CBC(src, 16, key, 16, block_t, dst);
+}
+
+/**
+ * The CCM-MAC-FUNCTION described in section 6.5 of the WUSB spec.
+ * This function takes a data string and returns the encrypted CBC
+ * Counter-mode MIC.
+ *
+ * @param key     The 128-bit symmetric key.
+ * @param nonce   The CCM nonce.
+ * @param label   The unique 14-byte ASCII text label.
+ * @param bytes   The byte array to be encrypted.
+ * @param len     Length of the byte array.
+ * @param result  Byte array to receive the 8-byte encrypted MIC.
+ */
+void dwc_wusb_cmf(u8 *key, u8 *nonce,
+		  char *label, u8 *bytes, int len, u8 *result)
+{
+	u8 block_m[16];
+	u8 block_x[16];
+	u8 block_t[8];
+	int idx, blkNum;
+	u16 la = (u16)(len + 14);
+
+	/* Set the AES-128 key */
+	//dwc_aes_setkey(tfm, key, 16);
+
+	/* Fill block B0 from flags = 0x59, N, and l(m) = 0 */
+	block_m[0] = 0x59;
+	for (idx = 0; idx < 13; idx++)
+		block_m[idx + 1] = nonce[idx];
+	block_m[14] = 0;
+	block_m[15] = 0;
+
+	/* Produce the CBC IV */
+	dwc_wusb_aes_encrypt(block_m, key, block_x);
+	show_block(block_m, "CBC IV in: ", "\n", 0);
+	show_block(block_x, "CBC IV out:", "\n", 0);
+
+	/* Fill block B1 from l(a) = Blen + 14, and A */
+	block_x[0] ^= (u8)(la >> 8);
+	block_x[1] ^= (u8)la;
+	for (idx = 0; idx < 14; idx++)
+		block_x[idx + 2] ^= label[idx];
+	show_block(block_x, "After xor: ", "b1\n", 16);
+
+	dwc_wusb_aes_encrypt(block_x, key, block_x);
+	show_block(block_x, "After AES: ", "b1\n", 16);
+
+	idx = 0;
+	blkNum = 0;
+
+	/* Fill remaining blocks with B */
+	while (len-- > 0) {
+		block_x[idx] ^= *bytes++;
+		if (++idx >= 16) {
+			idx = 0;
+			show_block(block_x, "After xor: ", "\n", blkNum);
+			dwc_wusb_aes_encrypt(block_x, key, block_x);
+			show_block(block_x, "After AES: ", "\n", blkNum);
+			blkNum++;
+		}
+	}
+
+	/* Handle partial last block */
+	if (idx > 0) {
+		show_block(block_x, "After xor: ", "\n", blkNum);
+		dwc_wusb_aes_encrypt(block_x, key, block_x);
+		show_block(block_x, "After AES: ", "\n", blkNum);
+	}
+
+	/* Save the MIC tag */
+	DWC_MEMCPY(block_t, block_x, 8);
+	show_block(block_t, "MIC tag  : ", NULL, 8);
+
+	/* Fill block A0 from flags = 0x01, N, and counter = 0 */
+	block_m[0] = 0x01;
+	block_m[14] = 0;
+	block_m[15] = 0;
+
+	/* Encrypt the counter */
+	dwc_wusb_aes_encrypt(block_m, key, block_x);
+	show_block(block_x, "CTR[MIC] : ", NULL, 8);
+
+	/* XOR with MIC tag */
+	for (idx = 0; idx < 8; idx++) {
+		block_t[idx] ^= block_x[idx];
+	}
+
+	/* Return result to caller */
+	DWC_MEMCPY(result, block_t, 8);
+	show_block(result, "CCM-MIC  : ", NULL, 8);
+
+}
+
+/**
+ * The PRF function described in section 6.5 of the WUSB spec. This function
+ * concatenates MIC values returned from dwc_cmf() to create a value of
+ * the requested length.
+ *
+ * @param prf_len  Length of the PRF function in bits (64, 128, or 256).
+ * @param key, nonce, label, bytes, len  Same as for dwc_cmf().
+ * @param result   Byte array to receive the result.
+ */
+void dwc_wusb_prf(int prf_len, u8 *key,
+		  u8 *nonce, char *label, u8 *bytes, int len, u8 *result)
+{
+	int i;
+
+	nonce[0] = 0;
+	for (i = 0; i < prf_len >> 6; i++, nonce[0]++) {
+		dwc_wusb_cmf(key, nonce, label, bytes, len, result);
+		result += 8;
+	}
+}
+
+/**
+ * Fills in CCM Nonce per the WUSB spec.
+ *
+ * @param[in] haddr Host address.
+ * @param[in] daddr Device address.
+ * @param[in] tkid Session Key(PTK) identifier.
+ * @param[out] nonce Pointer to where the CCM Nonce output is to be written.
+ */
+void dwc_wusb_fill_ccm_nonce(uint16_t haddr, uint16_t daddr, uint8_t *tkid,
+			     uint8_t *nonce)
+{
+
+	DWC_DEBUG("%s %x %x\n", __func__, daddr, haddr);
+
+	DWC_MEMSET(&nonce[0], 0, 16);
+
+	DWC_MEMCPY(&nonce[6], tkid, 3);
+	nonce[9] = daddr & 0xFF;
+	nonce[10] = (daddr >> 8) & 0xFF;
+	nonce[11] = haddr & 0xFF;
+	nonce[12] = (haddr >> 8) & 0xFF;
+
+	dump_bytes("CCM nonce", nonce, 16);
+}
+
+/**
+ * Generates a 16-byte cryptographic-grade random number for the Host/Device
+ * Nonce.
+ */
+void dwc_wusb_gen_nonce(uint16_t addr, uint8_t *nonce)
+{
+	uint8_t inonce[16];
+	uint32_t temp[4];
+
+	/* Fill in the Nonce */
+	DWC_MEMSET(&inonce[0], 0, sizeof(inonce));
+	inonce[9] = addr & 0xFF;
+	inonce[10] = (addr >> 8) & 0xFF;
+	inonce[11] = inonce[9];
+	inonce[12] = inonce[10];
+
+	/* Collect "randomness samples" */
+	DWC_RANDOM_BYTES((uint8_t *)temp, 16);
+
+	dwc_wusb_prf_128((uint8_t *)temp, nonce,
+			 "Random Numbers", (uint8_t *)temp, sizeof(temp),
+			 nonce);
+}
+
+/**
+ * Generates the Session Key (PTK) and Key Confirmation Key (KCK) per the
+ * WUSB spec.
+ *
+ * @param[in] ccm_nonce Pointer to CCM Nonce.
+ * @param[in] mk Master Key to derive the session from
+ * @param[in] hnonce Pointer to Host Nonce.
+ * @param[in] dnonce Pointer to Device Nonce.
+ * @param[out] kck Pointer to where the KCK output is to be written.
+ * @param[out] ptk Pointer to where the PTK output is to be written.
+ */
+void dwc_wusb_gen_key(uint8_t *ccm_nonce, uint8_t *mk, uint8_t *hnonce,
+		      uint8_t *dnonce, uint8_t *kck, uint8_t *ptk)
+{
+	uint8_t idata[32];
+	uint8_t odata[32];
+
+	dump_bytes("ck", mk, 16);
+	dump_bytes("hnonce", hnonce, 16);
+	dump_bytes("dnonce", dnonce, 16);
+
+	/* The data is the HNonce and DNonce concatenated */
+	DWC_MEMCPY(&idata[0], hnonce, 16);
+	DWC_MEMCPY(&idata[16], dnonce, 16);
+
+	dwc_wusb_prf_256(mk, ccm_nonce, "Pair-wise keys", idata, 32, odata);
+
+	/* Low 16 bytes of the result is the KCK, high 16 is the PTK */
+	DWC_MEMCPY(kck, &odata[0], 16);
+	DWC_MEMCPY(ptk, &odata[16], 16);
+
+	dump_bytes("kck", kck, 16);
+	dump_bytes("ptk", ptk, 16);
+}
+
+/**
+ * Generates the Message Integrity Code over the Handshake data per the
+ * WUSB spec.
+ *
+ * @param ccm_nonce Pointer to CCM Nonce.
+ * @param kck   Pointer to Key Confirmation Key.
+ * @param data  Pointer to Handshake data to be checked.
+ * @param mic   Pointer to where the MIC output is to be written.
+ */
+void dwc_wusb_gen_mic(uint8_t *ccm_nonce, uint8_t *kck,
+		      uint8_t *data, uint8_t *mic)
+{
+
+	dwc_wusb_prf_64(kck, ccm_nonce, "out-of-bandMIC",
+			data, WUSB_HANDSHAKE_LEN_FOR_MIC, mic);
+}
+
+#endif	/* DWC_CRYPTOLIB */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_crypto.h linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_crypto.h
--- linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_crypto.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_crypto.h	2017-09-23 03:42:50.246674367 +0800
@@ -0,0 +1,111 @@
+/* =========================================================================
+ * $File: //dwh/usb_iip/dev/software/dwc_common_port_2/dwc_crypto.h $
+ * $Revision: #3 $
+ * $Date: 2010/09/28 $
+ * $Change: 1596182 $
+ *
+ * Synopsys Portability Library Software and documentation
+ * (hereinafter, "Software") is an Unsupported proprietary work of
+ * Synopsys, Inc. unless otherwise expressly agreed to in writing
+ * between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product
+ * under any End User Software License Agreement or Agreement for
+ * Licensed Product with Synopsys or any supplement thereto. You are
+ * permitted to use and redistribute this Software in source and binary
+ * forms, with or without modification, provided that redistributions
+ * of source code must retain this notice. You may not view, use,
+ * disclose, copy or distribute this file or any information contained
+ * herein except pursuant to this license grant from Synopsys. If you
+ * do not agree with this notice, including the disclaimer below, then
+ * you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL
+ * SYNOPSYS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================= */
+
+#ifndef _DWC_CRYPTO_H_
+#define _DWC_CRYPTO_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @file
+ *
+ * This file contains declarations for the WUSB Cryptographic routines as
+ * defined in the WUSB spec.  They are only to be used internally by the DWC UWB
+ * modules.
+ */
+
+#include "dwc_os.h"
+
+int dwc_wusb_aes_encrypt(u8 *src, u8 *key, u8 *dst);
+
+void dwc_wusb_cmf(u8 *key, u8 *nonce,
+		  char *label, u8 *bytes, int len, u8 *result);
+void dwc_wusb_prf(int prf_len, u8 *key,
+		  u8 *nonce, char *label, u8 *bytes, int len, u8 *result);
+
+/**
+ * The PRF-64 function described in section 6.5 of the WUSB spec.
+ *
+ * @param key, nonce, label, bytes, len, result  Same as for dwc_prf().
+ */
+static inline void dwc_wusb_prf_64(u8 *key, u8 *nonce,
+				   char *label, u8 *bytes, int len, u8 *result)
+{
+	dwc_wusb_prf(64, key, nonce, label, bytes, len, result);
+}
+
+/**
+ * The PRF-128 function described in section 6.5 of the WUSB spec.
+ *
+ * @param key, nonce, label, bytes, len, result  Same as for dwc_prf().
+ */
+static inline void dwc_wusb_prf_128(u8 *key, u8 *nonce,
+				    char *label, u8 *bytes, int len, u8 *result)
+{
+	dwc_wusb_prf(128, key, nonce, label, bytes, len, result);
+}
+
+/**
+ * The PRF-256 function described in section 6.5 of the WUSB spec.
+ *
+ * @param key, nonce, label, bytes, len, result  Same as for dwc_prf().
+ */
+static inline void dwc_wusb_prf_256(u8 *key, u8 *nonce,
+				    char *label, u8 *bytes, int len, u8 *result)
+{
+	dwc_wusb_prf(256, key, nonce, label, bytes, len, result);
+}
+
+
+void dwc_wusb_fill_ccm_nonce(uint16_t haddr, uint16_t daddr, uint8_t *tkid,
+			       uint8_t *nonce);
+void dwc_wusb_gen_nonce(uint16_t addr,
+			  uint8_t *nonce);
+
+void dwc_wusb_gen_key(uint8_t *ccm_nonce, uint8_t *mk,
+			uint8_t *hnonce, uint8_t *dnonce,
+			uint8_t *kck, uint8_t *ptk);
+
+
+void dwc_wusb_gen_mic(uint8_t *ccm_nonce, uint8_t
+			*kck, uint8_t *data, uint8_t *mic);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _DWC_CRYPTO_H_ */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_dh.c linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_dh.c
--- linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_dh.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_dh.c	2017-09-23 03:42:50.246674367 +0800
@@ -0,0 +1,291 @@
+/* =========================================================================
+ * $File: //dwh/usb_iip/dev/software/dwc_common_port_2/dwc_dh.c $
+ * $Revision: #3 $
+ * $Date: 2010/09/28 $
+ * $Change: 1596182 $
+ *
+ * Synopsys Portability Library Software and documentation
+ * (hereinafter, "Software") is an Unsupported proprietary work of
+ * Synopsys, Inc. unless otherwise expressly agreed to in writing
+ * between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product
+ * under any End User Software License Agreement or Agreement for
+ * Licensed Product with Synopsys or any supplement thereto. You are
+ * permitted to use and redistribute this Software in source and binary
+ * forms, with or without modification, provided that redistributions
+ * of source code must retain this notice. You may not view, use,
+ * disclose, copy or distribute this file or any information contained
+ * herein except pursuant to this license grant from Synopsys. If you
+ * do not agree with this notice, including the disclaimer below, then
+ * you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL
+ * SYNOPSYS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================= */
+#ifdef DWC_CRYPTOLIB
+
+#ifndef CONFIG_MACH_IPMATE
+
+#include "dwc_dh.h"
+#include "dwc_modpow.h"
+
+#ifdef DEBUG
+/* This function prints out a buffer in the format described in the Association
+ * Model specification. */
+static void dh_dump(char *str, void *_num, int len)
+{
+	uint8_t *num = _num;
+	int i;
+	DWC_PRINTF("%s\n", str);
+	for (i = 0; i < len; i ++) {
+		DWC_PRINTF("%02x", num[i]);
+		if (((i + 1) % 2) == 0) DWC_PRINTF(" ");
+		if (((i + 1) % 26) == 0) DWC_PRINTF("\n");
+	}
+
+	DWC_PRINTF("\n");
+}
+#else
+#define dh_dump(_x...) do {; } while(0)
+#endif
+
+/* Constant g value */
+static __u32 dh_g[] = {
+	0x02000000,
+};
+
+/* Constant p value */
+static __u32 dh_p[] = {
+	0xFFFFFFFF, 0xFFFFFFFF, 0xA2DA0FC9, 0x34C26821, 0x8B62C6C4, 0xD11CDC80, 0x084E0229, 0x74CC678A,
+	0xA6BE0B02, 0x229B133B, 0x79084A51, 0xDD04348E, 0xB31995EF, 0x1B433ACD, 0x6D0A2B30, 0x37145FF2,
+	0x6D35E14F, 0x45C2516D, 0x76B585E4, 0xC67E5E62, 0xE9424CF4, 0x6BED37A6, 0xB65CFF0B, 0xEDB706F4,
+	0xFB6B38EE, 0xA59F895A, 0x11249FAE, 0xE61F4B7C, 0x51662849, 0x3D5BE4EC, 0xB87C00C2, 0x05BF63A1,
+	0x3648DA98, 0x9AD3551C, 0xA83F1669, 0x5FCF24FD, 0x235D6583, 0x96ADA3DC, 0x56F3621C, 0xBB528520,
+	0x0729D59E, 0x6D969670, 0x4E350C67, 0x0498BC4A, 0x086C74F1, 0x7C2118CA, 0x465E9032, 0x3BCE362E,
+	0x2C779EE3, 0x03860E18, 0xA283279B, 0x8FA207EC, 0xF05DC5B5, 0xC9524C6F, 0xF6CB2BDE, 0x18175895,
+	0x7C499539, 0xE56A95EA, 0x1826D215, 0x1005FA98, 0x5A8E7215, 0x2DC4AA8A, 0x0D1733AD, 0x337A5004,
+	0xAB2155A8, 0x64BA1CDF, 0x0485FBEC, 0x0AEFDB58, 0x5771EA8A, 0x7D0C065D, 0x850F97B3, 0xC7E4E1A6,
+	0x8CAEF5AB, 0xD73309DB, 0xE0948C1E, 0x9D61254A, 0x26D2E3CE, 0x6BEED21A, 0x06FA2FF1, 0x64088AD9,
+	0x730276D8, 0x646AC83E, 0x182B1F52, 0x0C207B17, 0x5717E1BB, 0x6C5D617A, 0xC0880977, 0xE246D9BA,
+	0xA04FE208, 0x31ABE574, 0xFC5BDB43, 0x8E10FDE0, 0x20D1824B, 0xCAD23AA9, 0xFFFFFFFF, 0xFFFFFFFF,
+};
+
+static void dh_swap_bytes(void *_in, void *_out, uint32_t len)
+{
+	uint8_t *in = _in;
+	uint8_t *out = _out;
+	int i;
+	for (i=0; i<len; i++) {
+		out[i] = in[len-1-i];
+	}
+}
+
+/* Computes the modular exponentiation (num^exp % mod).  num, exp, and mod are
+ * big endian numbers of size len, in bytes.  Each len value must be a multiple
+ * of 4. */
+int dwc_dh_modpow(void *mem_ctx, void *num, uint32_t num_len,
+		  void *exp, uint32_t exp_len,
+		  void *mod, uint32_t mod_len,
+		  void *out)
+{
+	/* modpow() takes little endian numbers.  AM uses big-endian.  This
+	 * function swaps bytes of numbers before passing onto modpow. */
+
+	int retval = 0;
+	uint32_t *result;
+
+	uint32_t *bignum_num = dwc_alloc(mem_ctx, num_len + 4);
+	uint32_t *bignum_exp = dwc_alloc(mem_ctx, exp_len + 4);
+	uint32_t *bignum_mod = dwc_alloc(mem_ctx, mod_len + 4);
+
+	dh_swap_bytes(num, &bignum_num[1], num_len);
+	bignum_num[0] = num_len / 4;
+
+	dh_swap_bytes(exp, &bignum_exp[1], exp_len);
+	bignum_exp[0] = exp_len / 4;
+
+	dh_swap_bytes(mod, &bignum_mod[1], mod_len);
+	bignum_mod[0] = mod_len / 4;
+
+	result = dwc_modpow(mem_ctx, bignum_num, bignum_exp, bignum_mod);
+	if (!result) {
+		retval = -1;
+		goto dh_modpow_nomem;
+	}
+
+	dh_swap_bytes(&result[1], out, result[0] * 4);
+	dwc_free(mem_ctx, result);
+
+ dh_modpow_nomem:
+	dwc_free(mem_ctx, bignum_num);
+	dwc_free(mem_ctx, bignum_exp);
+	dwc_free(mem_ctx, bignum_mod);
+	return retval;
+}
+
+
+int dwc_dh_pk(void *mem_ctx, uint8_t nd, uint8_t *exp, uint8_t *pk, uint8_t *hash)
+{
+	int retval;
+	uint8_t m3[385];
+
+#ifndef DH_TEST_VECTORS
+	DWC_RANDOM_BYTES(exp, 32);
+#endif
+
+	/* Compute the pkd */
+	if ((retval = dwc_dh_modpow(mem_ctx, dh_g, 4,
+				    exp, 32,
+				    dh_p, 384, pk))) {
+		return retval;
+	}
+
+	m3[384] = nd;
+	DWC_MEMCPY(&m3[0], pk, 384);
+	DWC_SHA256(m3, 385, hash);
+
+ 	dh_dump("PK", pk, 384);
+ 	dh_dump("SHA-256(M3)", hash, 32);
+	return 0;
+}
+
+int dwc_dh_derive_keys(void *mem_ctx, uint8_t nd, uint8_t *pkh, uint8_t *pkd,
+		       uint8_t *exp, int is_host,
+		       char *dd, uint8_t *ck, uint8_t *kdk)
+{
+	int retval;
+	uint8_t mv[784];
+	uint8_t sha_result[32];
+	uint8_t dhkey[384];
+	uint8_t shared_secret[384];
+	char *message;
+	uint32_t vd;
+
+	uint8_t *pk;
+
+	if (is_host) {
+		pk = pkd;
+	}
+	else {
+		pk = pkh;
+	}
+
+	if ((retval = dwc_dh_modpow(mem_ctx, pk, 384,
+				    exp, 32,
+				    dh_p, 384, shared_secret))) {
+		return retval;
+	}
+	dh_dump("Shared Secret", shared_secret, 384);
+
+	DWC_SHA256(shared_secret, 384, dhkey);
+	dh_dump("DHKEY", dhkey, 384);
+
+	DWC_MEMCPY(&mv[0], pkd, 384);
+	DWC_MEMCPY(&mv[384], pkh, 384);
+	DWC_MEMCPY(&mv[768], "displayed digest", 16);
+	dh_dump("MV", mv, 784);
+
+	DWC_SHA256(mv, 784, sha_result);
+	dh_dump("SHA-256(MV)", sha_result, 32);
+	dh_dump("First 32-bits of SHA-256(MV)", sha_result, 4);
+
+	dh_swap_bytes(sha_result, &vd, 4);
+#ifdef DEBUG
+	DWC_PRINTF("Vd (decimal) = %d\n", vd);
+#endif
+
+	switch (nd) {
+	case 2:
+		vd = vd % 100;
+		DWC_SPRINTF(dd, "%02d", vd);
+		break;
+	case 3:
+		vd = vd % 1000;
+		DWC_SPRINTF(dd, "%03d", vd);
+		break;
+	case 4:
+		vd = vd % 10000;
+		DWC_SPRINTF(dd, "%04d", vd);
+		break;
+	}
+#ifdef DEBUG
+	DWC_PRINTF("Display Digits: %s\n", dd);
+#endif
+
+	message = "connection key";
+	DWC_HMAC_SHA256(message, DWC_STRLEN(message), dhkey, 32, sha_result);
+ 	dh_dump("HMAC(SHA-256, DHKey, connection key)", sha_result, 32);
+	DWC_MEMCPY(ck, sha_result, 16);
+
+	message = "key derivation key";
+	DWC_HMAC_SHA256(message, DWC_STRLEN(message), dhkey, 32, sha_result);
+ 	dh_dump("HMAC(SHA-256, DHKey, key derivation key)", sha_result, 32);
+	DWC_MEMCPY(kdk, sha_result, 32);
+
+	return 0;
+}
+
+
+#ifdef DH_TEST_VECTORS
+
+static __u8 dh_a[] = {
+	0x44, 0x00, 0x51, 0xd6,
+	0xf0, 0xb5, 0x5e, 0xa9,
+	0x67, 0xab, 0x31, 0xc6,
+	0x8a, 0x8b, 0x5e, 0x37,
+	0xd9, 0x10, 0xda, 0xe0,
+	0xe2, 0xd4, 0x59, 0xa4,
+	0x86, 0x45, 0x9c, 0xaa,
+	0xdf, 0x36, 0x75, 0x16,
+};
+
+static __u8 dh_b[] = {
+	0x5d, 0xae, 0xc7, 0x86,
+	0x79, 0x80, 0xa3, 0x24,
+	0x8c, 0xe3, 0x57, 0x8f,
+	0xc7, 0x5f, 0x1b, 0x0f,
+	0x2d, 0xf8, 0x9d, 0x30,
+	0x6f, 0xa4, 0x52, 0xcd,
+	0xe0, 0x7a, 0x04, 0x8a,
+	0xde, 0xd9, 0x26, 0x56,
+};
+
+void dwc_run_dh_test_vectors(void *mem_ctx)
+{
+	uint8_t pkd[384];
+	uint8_t pkh[384];
+	uint8_t hashd[32];
+	uint8_t hashh[32];
+	uint8_t ck[16];
+	uint8_t kdk[32];
+	char dd[5];
+
+	DWC_PRINTF("\n\n\nDH_TEST_VECTORS\n\n");
+
+	/* compute the PKd and SHA-256(PKd || Nd) */
+	DWC_PRINTF("Computing PKd\n");
+	dwc_dh_pk(mem_ctx, 2, dh_a, pkd, hashd);
+
+	/* compute the PKd and SHA-256(PKh || Nd) */
+	DWC_PRINTF("Computing PKh\n");
+	dwc_dh_pk(mem_ctx, 2, dh_b, pkh, hashh);
+
+	/* compute the dhkey */
+	dwc_dh_derive_keys(mem_ctx, 2, pkh, pkd, dh_a, 0, dd, ck, kdk);
+}
+#endif /* DH_TEST_VECTORS */
+
+#endif /* !CONFIG_MACH_IPMATE */
+
+#endif /* DWC_CRYPTOLIB */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_dh.h linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_dh.h
--- linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_dh.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_dh.h	2017-09-23 03:42:50.246674367 +0800
@@ -0,0 +1,106 @@
+/* =========================================================================
+ * $File: //dwh/usb_iip/dev/software/dwc_common_port_2/dwc_dh.h $
+ * $Revision: #4 $
+ * $Date: 2010/09/28 $
+ * $Change: 1596182 $
+ *
+ * Synopsys Portability Library Software and documentation
+ * (hereinafter, "Software") is an Unsupported proprietary work of
+ * Synopsys, Inc. unless otherwise expressly agreed to in writing
+ * between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product
+ * under any End User Software License Agreement or Agreement for
+ * Licensed Product with Synopsys or any supplement thereto. You are
+ * permitted to use and redistribute this Software in source and binary
+ * forms, with or without modification, provided that redistributions
+ * of source code must retain this notice. You may not view, use,
+ * disclose, copy or distribute this file or any information contained
+ * herein except pursuant to this license grant from Synopsys. If you
+ * do not agree with this notice, including the disclaimer below, then
+ * you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL
+ * SYNOPSYS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================= */
+#ifndef _DWC_DH_H_
+#define _DWC_DH_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "dwc_os.h"
+
+/** @file
+ *
+ * This file defines the common functions on device and host for performing
+ * numeric association as defined in the WUSB spec.  They are only to be
+ * used internally by the DWC UWB modules. */
+
+extern int dwc_dh_sha256(uint8_t *message, uint32_t len, uint8_t *out);
+extern int dwc_dh_hmac_sha256(uint8_t *message, uint32_t messagelen,
+			      uint8_t *key, uint32_t keylen,
+			      uint8_t *out);
+extern int dwc_dh_modpow(void *mem_ctx, void *num, uint32_t num_len,
+			 void *exp, uint32_t exp_len,
+			 void *mod, uint32_t mod_len,
+			 void *out);
+
+/** Computes PKD or PKH, and SHA-256(PKd || Nd)
+ *
+ * PK = g^exp mod p.
+ *
+ * Input:
+ * Nd = Number of digits on the device.
+ *
+ * Output:
+ * exp = A 32-byte buffer to be filled with a randomly generated number.
+ *       used as either A or B.
+ * pk = A 384-byte buffer to be filled with the PKH or PKD.
+ * hash = A 32-byte buffer to be filled with SHA-256(PK || ND).
+ */
+extern int dwc_dh_pk(void *mem_ctx, uint8_t nd, uint8_t *exp, uint8_t *pkd, uint8_t *hash);
+
+/** Computes the DHKEY, and VD.
+ *
+ * If called from host, then it will comput DHKEY=PKD^exp % p.
+ * If called from device, then it will comput DHKEY=PKH^exp % p.
+ *
+ * Input:
+ * pkd = The PKD value.
+ * pkh = The PKH value.
+ * exp = The A value (if device) or B value (if host) generated in dwc_wudev_dh_pk.
+ * is_host = Set to non zero if a WUSB host is calling this function.
+ *
+ * Output:
+
+ * dd = A pointer to an buffer to be set to the displayed digits string to be shown
+ *      to the user.  This buffer should be at 5 bytes long to hold 4 digits plus a
+ *      null termination character.  This buffer can be used directly for display.
+ * ck = A 16-byte buffer to be filled with the CK.
+ * kdk = A 32-byte buffer to be filled with the KDK.
+ */
+extern int dwc_dh_derive_keys(void *mem_ctx, uint8_t nd, uint8_t *pkh, uint8_t *pkd,
+			      uint8_t *exp, int is_host,
+			      char *dd, uint8_t *ck, uint8_t *kdk);
+
+#ifdef DH_TEST_VECTORS
+extern void dwc_run_dh_test_vectors(void);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _DWC_DH_H_ */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_list.h linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_list.h
--- linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_list.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_list.h	2017-09-23 03:42:50.246674367 +0800
@@ -0,0 +1,594 @@
+/*	$OpenBSD: queue.h,v 1.26 2004/05/04 16:59:32 grange Exp $	*/
+/*	$NetBSD: queue.h,v 1.11 1996/05/16 05:17:14 mycroft Exp $	*/
+
+/*
+ * Copyright (c) 1991, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	@(#)queue.h	8.5 (Berkeley) 8/20/94
+ */
+
+#ifndef _DWC_LIST_H_
+#define _DWC_LIST_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @file
+ *
+ * This file defines linked list operations.  It is derived from BSD with
+ * only the MACRO names being prefixed with DWC_.  This is because a few of
+ * these names conflict with those on Linux.  For documentation on use, see the
+ * inline comments in the source code.  The original license for this source
+ * code applies and is preserved in the dwc_list.h source file.
+ */
+
+/*
+ * This file defines five types of data structures: singly-linked lists,
+ * lists, simple queues, tail queues, and circular queues.
+ *
+ *
+ * A singly-linked list is headed by a single forward pointer. The elements
+ * are singly linked for minimum space and pointer manipulation overhead at
+ * the expense of O(n) removal for arbitrary elements. New elements can be
+ * added to the list after an existing element or at the head of the list.
+ * Elements being removed from the head of the list should use the explicit
+ * macro for this purpose for optimum efficiency. A singly-linked list may
+ * only be traversed in the forward direction.  Singly-linked lists are ideal
+ * for applications with large datasets and few or no removals or for
+ * implementing a LIFO queue.
+ *
+ * A list is headed by a single forward pointer (or an array of forward
+ * pointers for a hash table header). The elements are doubly linked
+ * so that an arbitrary element can be removed without a need to
+ * traverse the list. New elements can be added to the list before
+ * or after an existing element or at the head of the list. A list
+ * may only be traversed in the forward direction.
+ *
+ * A simple queue is headed by a pair of pointers, one the head of the
+ * list and the other to the tail of the list. The elements are singly
+ * linked to save space, so elements can only be removed from the
+ * head of the list. New elements can be added to the list before or after
+ * an existing element, at the head of the list, or at the end of the
+ * list. A simple queue may only be traversed in the forward direction.
+ *
+ * A tail queue is headed by a pair of pointers, one to the head of the
+ * list and the other to the tail of the list. The elements are doubly
+ * linked so that an arbitrary element can be removed without a need to
+ * traverse the list. New elements can be added to the list before or
+ * after an existing element, at the head of the list, or at the end of
+ * the list. A tail queue may be traversed in either direction.
+ *
+ * A circle queue is headed by a pair of pointers, one to the head of the
+ * list and the other to the tail of the list. The elements are doubly
+ * linked so that an arbitrary element can be removed without a need to
+ * traverse the list. New elements can be added to the list before or after
+ * an existing element, at the head of the list, or at the end of the list.
+ * A circle queue may be traversed in either direction, but has a more
+ * complex end of list detection.
+ *
+ * For details on the use of these macros, see the queue(3) manual page.
+ */
+
+/*
+ * Double-linked List.
+ */
+
+typedef struct dwc_list_link {
+	struct dwc_list_link *next;
+	struct dwc_list_link *prev;
+} dwc_list_link_t;
+
+#define DWC_LIST_INIT(link) do {	\
+	(link)->next = (link);		\
+	(link)->prev = (link);		\
+} while (0)
+
+#define DWC_LIST_FIRST(link)	((link)->next)
+#define DWC_LIST_LAST(link)	((link)->prev)
+#define DWC_LIST_END(link)	(link)
+#define DWC_LIST_NEXT(link)	((link)->next)
+#define DWC_LIST_PREV(link)	((link)->prev)
+#define DWC_LIST_EMPTY(link)	\
+	(DWC_LIST_FIRST(link) == DWC_LIST_END(link))
+#define DWC_LIST_ENTRY(link, type, field)			\
+	(type *)((uint8_t *)(link) - (size_t)(&((type *)0)->field))
+
+#if 0
+#define DWC_LIST_INSERT_HEAD(list, link) do {			\
+	(link)->next = (list)->next;				\
+	(link)->prev = (list);					\
+	(list)->next->prev = (link);				\
+	(list)->next = (link);					\
+} while (0)
+
+#define DWC_LIST_INSERT_TAIL(list, link) do {			\
+	(link)->next = (list);					\
+	(link)->prev = (list)->prev;				\
+	(list)->prev->next = (link);				\
+	(list)->prev = (link);					\
+} while (0)
+#else
+#define DWC_LIST_INSERT_HEAD(list, link) do {			\
+	dwc_list_link_t *__next__ = (list)->next;		\
+	__next__->prev = (link);				\
+	(link)->next = __next__;				\
+	(link)->prev = (list);					\
+	(list)->next = (link);					\
+} while (0)
+
+#define DWC_LIST_INSERT_TAIL(list, link) do {			\
+	dwc_list_link_t *__prev__ = (list)->prev;		\
+	(list)->prev = (link);					\
+	(link)->next = (list);					\
+	(link)->prev = __prev__;				\
+	__prev__->next = (link);				\
+} while (0)
+#endif
+
+#if 0
+static inline void __list_add(struct list_head *new,
+                              struct list_head *prev,
+                              struct list_head *next)
+{
+        next->prev = new;
+        new->next = next;
+        new->prev = prev;
+        prev->next = new;
+}
+
+static inline void list_add(struct list_head *new, struct list_head *head)
+{
+        __list_add(new, head, head->next);
+}
+
+static inline void list_add_tail(struct list_head *new, struct list_head *head)
+{
+        __list_add(new, head->prev, head);
+}
+
+static inline void __list_del(struct list_head * prev, struct list_head * next)
+{
+        next->prev = prev;
+        prev->next = next;
+}
+
+static inline void list_del(struct list_head *entry)
+{
+        __list_del(entry->prev, entry->next);
+        entry->next = LIST_POISON1;
+        entry->prev = LIST_POISON2;
+}
+#endif
+
+#define DWC_LIST_REMOVE(link) do {				\
+	(link)->next->prev = (link)->prev;			\
+	(link)->prev->next = (link)->next;			\
+} while (0)
+
+#define DWC_LIST_REMOVE_INIT(link) do {				\
+	DWC_LIST_REMOVE(link);					\
+	DWC_LIST_INIT(link);					\
+} while (0)
+
+#define DWC_LIST_MOVE_HEAD(list, link) do {			\
+	DWC_LIST_REMOVE(link);					\
+	DWC_LIST_INSERT_HEAD(list, link);			\
+} while (0)
+
+#define DWC_LIST_MOVE_TAIL(list, link) do {			\
+	DWC_LIST_REMOVE(link);					\
+	DWC_LIST_INSERT_TAIL(list, link);			\
+} while (0)
+
+#define DWC_LIST_FOREACH(var, list)				\
+	for((var) = DWC_LIST_FIRST(list);			\
+	    (var) != DWC_LIST_END(list);			\
+	    (var) = DWC_LIST_NEXT(var))
+
+#define DWC_LIST_FOREACH_SAFE(var, var2, list)			\
+	for((var) = DWC_LIST_FIRST(list), (var2) = DWC_LIST_NEXT(var);	\
+	    (var) != DWC_LIST_END(list);			\
+	    (var) = (var2), (var2) = DWC_LIST_NEXT(var2))
+
+#define DWC_LIST_FOREACH_REVERSE(var, list)			\
+	for((var) = DWC_LIST_LAST(list);			\
+	    (var) != DWC_LIST_END(list);			\
+	    (var) = DWC_LIST_PREV(var))
+
+/*
+ * Singly-linked List definitions.
+ */
+#define DWC_SLIST_HEAD(name, type)					\
+struct name {								\
+	struct type *slh_first;	/* first element */			\
+}
+
+#define DWC_SLIST_HEAD_INITIALIZER(head)				\
+	{ NULL }
+
+#define DWC_SLIST_ENTRY(type)						\
+struct {								\
+	struct type *sle_next;	/* next element */			\
+}
+
+/*
+ * Singly-linked List access methods.
+ */
+#define DWC_SLIST_FIRST(head)	((head)->slh_first)
+#define DWC_SLIST_END(head)		NULL
+#define DWC_SLIST_EMPTY(head)	(SLIST_FIRST(head) == SLIST_END(head))
+#define DWC_SLIST_NEXT(elm, field)	((elm)->field.sle_next)
+
+#define DWC_SLIST_FOREACH(var, head, field)				\
+	for((var) = SLIST_FIRST(head);					\
+	    (var) != SLIST_END(head);					\
+	    (var) = SLIST_NEXT(var, field))
+
+#define DWC_SLIST_FOREACH_PREVPTR(var, varp, head, field)		\
+	for((varp) = &SLIST_FIRST((head));				\
+	    ((var) = *(varp)) != SLIST_END(head);			\
+	    (varp) = &SLIST_NEXT((var), field))
+
+/*
+ * Singly-linked List functions.
+ */
+#define DWC_SLIST_INIT(head) {						\
+	SLIST_FIRST(head) = SLIST_END(head);				\
+}
+
+#define DWC_SLIST_INSERT_AFTER(slistelm, elm, field) do {		\
+	(elm)->field.sle_next = (slistelm)->field.sle_next;		\
+	(slistelm)->field.sle_next = (elm);				\
+} while (0)
+
+#define DWC_SLIST_INSERT_HEAD(head, elm, field) do {			\
+	(elm)->field.sle_next = (head)->slh_first;			\
+	(head)->slh_first = (elm);					\
+} while (0)
+
+#define DWC_SLIST_REMOVE_NEXT(head, elm, field) do {			\
+	(elm)->field.sle_next = (elm)->field.sle_next->field.sle_next;	\
+} while (0)
+
+#define DWC_SLIST_REMOVE_HEAD(head, field) do {				\
+	(head)->slh_first = (head)->slh_first->field.sle_next;		\
+} while (0)
+
+#define DWC_SLIST_REMOVE(head, elm, type, field) do {			\
+	if ((head)->slh_first == (elm)) {				\
+		SLIST_REMOVE_HEAD((head), field);			\
+	}								\
+	else {								\
+		struct type *curelm = (head)->slh_first;		\
+		while( curelm->field.sle_next != (elm) )		\
+			curelm = curelm->field.sle_next;		\
+		curelm->field.sle_next =				\
+		    curelm->field.sle_next->field.sle_next;		\
+	}								\
+} while (0)
+
+/*
+ * Simple queue definitions.
+ */
+#define DWC_SIMPLEQ_HEAD(name, type)					\
+struct name {								\
+	struct type *sqh_first;	/* first element */			\
+	struct type **sqh_last;	/* addr of last next element */		\
+}
+
+#define DWC_SIMPLEQ_HEAD_INITIALIZER(head)				\
+	{ NULL, &(head).sqh_first }
+
+#define DWC_SIMPLEQ_ENTRY(type)						\
+struct {								\
+	struct type *sqe_next;	/* next element */			\
+}
+
+/*
+ * Simple queue access methods.
+ */
+#define DWC_SIMPLEQ_FIRST(head)	    ((head)->sqh_first)
+#define DWC_SIMPLEQ_END(head)	    NULL
+#define DWC_SIMPLEQ_EMPTY(head)	    (SIMPLEQ_FIRST(head) == SIMPLEQ_END(head))
+#define DWC_SIMPLEQ_NEXT(elm, field)    ((elm)->field.sqe_next)
+
+#define DWC_SIMPLEQ_FOREACH(var, head, field)				\
+	for((var) = SIMPLEQ_FIRST(head);				\
+	    (var) != SIMPLEQ_END(head);					\
+	    (var) = SIMPLEQ_NEXT(var, field))
+
+/*
+ * Simple queue functions.
+ */
+#define DWC_SIMPLEQ_INIT(head) do {					\
+	(head)->sqh_first = NULL;					\
+	(head)->sqh_last = &(head)->sqh_first;				\
+} while (0)
+
+#define DWC_SIMPLEQ_INSERT_HEAD(head, elm, field) do {			\
+	if (((elm)->field.sqe_next = (head)->sqh_first) == NULL)	\
+		(head)->sqh_last = &(elm)->field.sqe_next;		\
+	(head)->sqh_first = (elm);					\
+} while (0)
+
+#define DWC_SIMPLEQ_INSERT_TAIL(head, elm, field) do {			\
+	(elm)->field.sqe_next = NULL;					\
+	*(head)->sqh_last = (elm);					\
+	(head)->sqh_last = &(elm)->field.sqe_next;			\
+} while (0)
+
+#define DWC_SIMPLEQ_INSERT_AFTER(head, listelm, elm, field) do {	\
+	if (((elm)->field.sqe_next = (listelm)->field.sqe_next) == NULL)\
+		(head)->sqh_last = &(elm)->field.sqe_next;		\
+	(listelm)->field.sqe_next = (elm);				\
+} while (0)
+
+#define DWC_SIMPLEQ_REMOVE_HEAD(head, field) do {			\
+	if (((head)->sqh_first = (head)->sqh_first->field.sqe_next) == NULL) \
+		(head)->sqh_last = &(head)->sqh_first;			\
+} while (0)
+
+/*
+ * Tail queue definitions.
+ */
+#define DWC_TAILQ_HEAD(name, type)					\
+struct name {								\
+	struct type *tqh_first;	/* first element */			\
+	struct type **tqh_last;	/* addr of last next element */		\
+}
+
+#define DWC_TAILQ_HEAD_INITIALIZER(head)				\
+	{ NULL, &(head).tqh_first }
+
+#define DWC_TAILQ_ENTRY(type)						\
+struct {								\
+	struct type *tqe_next;	/* next element */			\
+	struct type **tqe_prev;	/* address of previous next element */	\
+}
+
+/*
+ * tail queue access methods
+ */
+#define DWC_TAILQ_FIRST(head)		((head)->tqh_first)
+#define DWC_TAILQ_END(head)		NULL
+#define DWC_TAILQ_NEXT(elm, field)	((elm)->field.tqe_next)
+#define DWC_TAILQ_LAST(head, headname)					\
+	(*(((struct headname *)((head)->tqh_last))->tqh_last))
+/* XXX */
+#define DWC_TAILQ_PREV(elm, headname, field)				\
+	(*(((struct headname *)((elm)->field.tqe_prev))->tqh_last))
+#define DWC_TAILQ_EMPTY(head)						\
+	(TAILQ_FIRST(head) == TAILQ_END(head))
+
+#define DWC_TAILQ_FOREACH(var, head, field)				\
+	for((var) = TAILQ_FIRST(head);					\
+	    (var) != TAILQ_END(head);					\
+	    (var) = TAILQ_NEXT(var, field))
+
+#define DWC_TAILQ_FOREACH_REVERSE(var, head, headname, field)		\
+	for((var) = TAILQ_LAST(head, headname);				\
+	    (var) != TAILQ_END(head);					\
+	    (var) = TAILQ_PREV(var, headname, field))
+
+/*
+ * Tail queue functions.
+ */
+#define DWC_TAILQ_INIT(head) do {					\
+	(head)->tqh_first = NULL;					\
+	(head)->tqh_last = &(head)->tqh_first;				\
+} while (0)
+
+#define DWC_TAILQ_INSERT_HEAD(head, elm, field) do {			\
+	if (((elm)->field.tqe_next = (head)->tqh_first) != NULL)	\
+		(head)->tqh_first->field.tqe_prev =			\
+		    &(elm)->field.tqe_next;				\
+	else								\
+		(head)->tqh_last = &(elm)->field.tqe_next;		\
+	(head)->tqh_first = (elm);					\
+	(elm)->field.tqe_prev = &(head)->tqh_first;			\
+} while (0)
+
+#define DWC_TAILQ_INSERT_TAIL(head, elm, field) do {			\
+	(elm)->field.tqe_next = NULL;					\
+	(elm)->field.tqe_prev = (head)->tqh_last;			\
+	*(head)->tqh_last = (elm);					\
+	(head)->tqh_last = &(elm)->field.tqe_next;			\
+} while (0)
+
+#define DWC_TAILQ_INSERT_AFTER(head, listelm, elm, field) do {		\
+	if (((elm)->field.tqe_next = (listelm)->field.tqe_next) != NULL)\
+		(elm)->field.tqe_next->field.tqe_prev =			\
+		    &(elm)->field.tqe_next;				\
+	else								\
+		(head)->tqh_last = &(elm)->field.tqe_next;		\
+	(listelm)->field.tqe_next = (elm);				\
+	(elm)->field.tqe_prev = &(listelm)->field.tqe_next;		\
+} while (0)
+
+#define DWC_TAILQ_INSERT_BEFORE(listelm, elm, field) do {		\
+	(elm)->field.tqe_prev = (listelm)->field.tqe_prev;		\
+	(elm)->field.tqe_next = (listelm);				\
+	*(listelm)->field.tqe_prev = (elm);				\
+	(listelm)->field.tqe_prev = &(elm)->field.tqe_next;		\
+} while (0)
+
+#define DWC_TAILQ_REMOVE(head, elm, field) do {				\
+	if (((elm)->field.tqe_next) != NULL)				\
+		(elm)->field.tqe_next->field.tqe_prev =			\
+		    (elm)->field.tqe_prev;				\
+	else								\
+		(head)->tqh_last = (elm)->field.tqe_prev;		\
+	*(elm)->field.tqe_prev = (elm)->field.tqe_next;			\
+} while (0)
+
+#define DWC_TAILQ_REPLACE(head, elm, elm2, field) do {			\
+	if (((elm2)->field.tqe_next = (elm)->field.tqe_next) != NULL)	\
+		(elm2)->field.tqe_next->field.tqe_prev =		\
+		    &(elm2)->field.tqe_next;				\
+	else								\
+		(head)->tqh_last = &(elm2)->field.tqe_next;		\
+	(elm2)->field.tqe_prev = (elm)->field.tqe_prev;			\
+	*(elm2)->field.tqe_prev = (elm2);				\
+} while (0)
+
+/*
+ * Circular queue definitions.
+ */
+#define DWC_CIRCLEQ_HEAD(name, type)					\
+struct name {								\
+	struct type *cqh_first;		/* first element */		\
+	struct type *cqh_last;		/* last element */		\
+}
+
+#define DWC_CIRCLEQ_HEAD_INITIALIZER(head)				\
+	{ DWC_CIRCLEQ_END(&head), DWC_CIRCLEQ_END(&head) }
+
+#define DWC_CIRCLEQ_ENTRY(type)						\
+struct {								\
+	struct type *cqe_next;		/* next element */		\
+	struct type *cqe_prev;		/* previous element */		\
+}
+
+/*
+ * Circular queue access methods
+ */
+#define DWC_CIRCLEQ_FIRST(head)		((head)->cqh_first)
+#define DWC_CIRCLEQ_LAST(head)		((head)->cqh_last)
+#define DWC_CIRCLEQ_END(head)		((void *)(head))
+#define DWC_CIRCLEQ_NEXT(elm, field)	((elm)->field.cqe_next)
+#define DWC_CIRCLEQ_PREV(elm, field)	((elm)->field.cqe_prev)
+#define DWC_CIRCLEQ_EMPTY(head)						\
+	(DWC_CIRCLEQ_FIRST(head) == DWC_CIRCLEQ_END(head))
+
+#define DWC_CIRCLEQ_EMPTY_ENTRY(elm, field) (((elm)->field.cqe_next == NULL) && ((elm)->field.cqe_prev == NULL))
+
+#define DWC_CIRCLEQ_FOREACH(var, head, field)				\
+	for((var) = DWC_CIRCLEQ_FIRST(head);				\
+	    (var) != DWC_CIRCLEQ_END(head);				\
+	    (var) = DWC_CIRCLEQ_NEXT(var, field))
+
+#define DWC_CIRCLEQ_FOREACH_SAFE(var, var2, head, field)			\
+	for((var) = DWC_CIRCLEQ_FIRST(head), var2 = DWC_CIRCLEQ_NEXT(var, field); \
+	    (var) != DWC_CIRCLEQ_END(head);					\
+	    (var) = var2, var2 = DWC_CIRCLEQ_NEXT(var, field))
+
+#define DWC_CIRCLEQ_FOREACH_REVERSE(var, head, field)			\
+	for((var) = DWC_CIRCLEQ_LAST(head);				\
+	    (var) != DWC_CIRCLEQ_END(head);				\
+	    (var) = DWC_CIRCLEQ_PREV(var, field))
+
+/*
+ * Circular queue functions.
+ */
+#define DWC_CIRCLEQ_INIT(head) do {					\
+	(head)->cqh_first = DWC_CIRCLEQ_END(head);			\
+	(head)->cqh_last = DWC_CIRCLEQ_END(head);			\
+} while (0)
+
+#define DWC_CIRCLEQ_INIT_ENTRY(elm, field) do {				\
+	(elm)->field.cqe_next = NULL;					\
+	(elm)->field.cqe_prev = NULL;					\
+} while (0)
+
+#define DWC_CIRCLEQ_INSERT_AFTER(head, listelm, elm, field) do {	\
+	(elm)->field.cqe_next = (listelm)->field.cqe_next;		\
+	(elm)->field.cqe_prev = (listelm);				\
+	if ((listelm)->field.cqe_next == DWC_CIRCLEQ_END(head))		\
+		(head)->cqh_last = (elm);				\
+	else								\
+		(listelm)->field.cqe_next->field.cqe_prev = (elm);	\
+	(listelm)->field.cqe_next = (elm);				\
+} while (0)
+
+#define DWC_CIRCLEQ_INSERT_BEFORE(head, listelm, elm, field) do {	\
+	(elm)->field.cqe_next = (listelm);				\
+	(elm)->field.cqe_prev = (listelm)->field.cqe_prev;		\
+	if ((listelm)->field.cqe_prev == DWC_CIRCLEQ_END(head))		\
+		(head)->cqh_first = (elm);				\
+	else								\
+		(listelm)->field.cqe_prev->field.cqe_next = (elm);	\
+	(listelm)->field.cqe_prev = (elm);				\
+} while (0)
+
+#define DWC_CIRCLEQ_INSERT_HEAD(head, elm, field) do {			\
+	(elm)->field.cqe_next = (head)->cqh_first;			\
+	(elm)->field.cqe_prev = DWC_CIRCLEQ_END(head);			\
+	if ((head)->cqh_last == DWC_CIRCLEQ_END(head))			\
+		(head)->cqh_last = (elm);				\
+	else								\
+		(head)->cqh_first->field.cqe_prev = (elm);		\
+	(head)->cqh_first = (elm);					\
+} while (0)
+
+#define DWC_CIRCLEQ_INSERT_TAIL(head, elm, field) do {			\
+	(elm)->field.cqe_next = DWC_CIRCLEQ_END(head);			\
+	(elm)->field.cqe_prev = (head)->cqh_last;			\
+	if ((head)->cqh_first == DWC_CIRCLEQ_END(head))			\
+		(head)->cqh_first = (elm);				\
+	else								\
+		(head)->cqh_last->field.cqe_next = (elm);		\
+	(head)->cqh_last = (elm);					\
+} while (0)
+
+#define DWC_CIRCLEQ_REMOVE(head, elm, field) do {			\
+	if ((elm)->field.cqe_next == DWC_CIRCLEQ_END(head))		\
+		(head)->cqh_last = (elm)->field.cqe_prev;		\
+	else								\
+		(elm)->field.cqe_next->field.cqe_prev =			\
+		    (elm)->field.cqe_prev;				\
+	if ((elm)->field.cqe_prev == DWC_CIRCLEQ_END(head))		\
+		(head)->cqh_first = (elm)->field.cqe_next;		\
+	else								\
+		(elm)->field.cqe_prev->field.cqe_next =			\
+		    (elm)->field.cqe_next;				\
+} while (0)
+
+#define DWC_CIRCLEQ_REMOVE_INIT(head, elm, field) do {			\
+	DWC_CIRCLEQ_REMOVE(head, elm, field);				\
+	DWC_CIRCLEQ_INIT_ENTRY(elm, field);				\
+} while (0)
+
+#define DWC_CIRCLEQ_REPLACE(head, elm, elm2, field) do {		\
+	if (((elm2)->field.cqe_next = (elm)->field.cqe_next) ==		\
+	    DWC_CIRCLEQ_END(head))					\
+		(head).cqh_last = (elm2);				\
+	else								\
+		(elm2)->field.cqe_next->field.cqe_prev = (elm2);	\
+	if (((elm2)->field.cqe_prev = (elm)->field.cqe_prev) ==		\
+	    DWC_CIRCLEQ_END(head))					\
+		(head).cqh_first = (elm2);				\
+	else								\
+		(elm2)->field.cqe_prev->field.cqe_next = (elm2);	\
+} while (0)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _DWC_LIST_H_ */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_mem.c linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_mem.c
--- linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_mem.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_mem.c	2017-09-23 03:42:50.246674367 +0800
@@ -0,0 +1,245 @@
+/* Memory Debugging */
+#ifdef DWC_DEBUG_MEMORY
+
+#include "dwc_os.h"
+#include "dwc_list.h"
+
+struct allocation {
+	void *addr;
+	void *ctx;
+	char *func;
+	int line;
+	uint32_t size;
+	int dma;
+	DWC_CIRCLEQ_ENTRY(allocation) entry;
+};
+
+DWC_CIRCLEQ_HEAD(allocation_queue, allocation);
+
+struct allocation_manager {
+	void *mem_ctx;
+	struct allocation_queue allocations;
+
+	/* statistics */
+	int num;
+	int num_freed;
+	int num_active;
+	uint32_t total;
+	uint32_t cur;
+	uint32_t max;
+};
+
+static struct allocation_manager *manager = NULL;
+
+static int add_allocation(void *ctx, uint32_t size, char const *func, int line, void *addr,
+			  int dma)
+{
+	struct allocation *a;
+
+	DWC_ASSERT(manager != NULL, "manager not allocated");
+
+	a = __DWC_ALLOC_ATOMIC(manager->mem_ctx, sizeof(*a));
+	if (!a) {
+		return -DWC_E_NO_MEMORY;
+	}
+
+	a->func = __DWC_ALLOC_ATOMIC(manager->mem_ctx, DWC_STRLEN(func) + 1);
+	if (!a->func) {
+		__DWC_FREE(manager->mem_ctx, a);
+		return -DWC_E_NO_MEMORY;
+	}
+
+	DWC_MEMCPY(a->func, func, DWC_STRLEN(func) + 1);
+	a->addr = addr;
+	a->ctx = ctx;
+	a->line = line;
+	a->size = size;
+	a->dma = dma;
+	DWC_CIRCLEQ_INSERT_TAIL(&manager->allocations, a, entry);
+
+	/* Update stats */
+	manager->num++;
+	manager->num_active++;
+	manager->total += size;
+	manager->cur += size;
+
+	if (manager->max < manager->cur) {
+		manager->max = manager->cur;
+	}
+
+	return 0;
+}
+
+static struct allocation *find_allocation(void *ctx, void *addr)
+{
+	struct allocation *a;
+
+	DWC_CIRCLEQ_FOREACH(a, &manager->allocations, entry) {
+		if (a->ctx == ctx && a->addr == addr) {
+			return a;
+		}
+	}
+
+	return NULL;
+}
+
+static void free_allocation(void *ctx, void *addr, char const *func, int line)
+{
+	struct allocation *a = find_allocation(ctx, addr);
+
+	if (!a) {
+		DWC_ASSERT(0,
+			   "Free of address %p that was never allocated or already freed %s:%d",
+			   addr, func, line);
+		return;
+	}
+
+	DWC_CIRCLEQ_REMOVE(&manager->allocations, a, entry);
+
+	manager->num_active--;
+	manager->num_freed++;
+	manager->cur -= a->size;
+	__DWC_FREE(manager->mem_ctx, a->func);
+	__DWC_FREE(manager->mem_ctx, a);
+}
+
+int dwc_memory_debug_start(void *mem_ctx)
+{
+	DWC_ASSERT(manager == NULL, "Memory debugging has already started\n");
+
+	if (manager) {
+		return -DWC_E_BUSY;
+	}
+
+	manager = __DWC_ALLOC(mem_ctx, sizeof(*manager));
+	if (!manager) {
+		return -DWC_E_NO_MEMORY;
+	}
+
+	DWC_CIRCLEQ_INIT(&manager->allocations);
+	manager->mem_ctx = mem_ctx;
+	manager->num = 0;
+	manager->num_freed = 0;
+	manager->num_active = 0;
+	manager->total = 0;
+	manager->cur = 0;
+	manager->max = 0;
+
+	return 0;
+}
+
+void dwc_memory_debug_stop(void)
+{
+	struct allocation *a;
+
+	dwc_memory_debug_report();
+
+	DWC_CIRCLEQ_FOREACH(a, &manager->allocations, entry) {
+		DWC_ERROR("Memory leaked from %s:%d\n", a->func, a->line);
+		free_allocation(a->ctx, a->addr, NULL, -1);
+	}
+
+	__DWC_FREE(manager->mem_ctx, manager);
+}
+
+void dwc_memory_debug_report(void)
+{
+	struct allocation *a;
+
+	DWC_PRINTF("\n\n\n----------------- Memory Debugging Report -----------------\n\n");
+	DWC_PRINTF("Num Allocations = %d\n", manager->num);
+	DWC_PRINTF("Freed = %d\n", manager->num_freed);
+	DWC_PRINTF("Active = %d\n", manager->num_active);
+	DWC_PRINTF("Current Memory Used = %d\n", manager->cur);
+	DWC_PRINTF("Total Memory Used = %d\n", manager->total);
+	DWC_PRINTF("Maximum Memory Used at Once = %d\n", manager->max);
+	DWC_PRINTF("Unfreed allocations:\n");
+
+	DWC_CIRCLEQ_FOREACH(a, &manager->allocations, entry) {
+		DWC_PRINTF("    addr=%p, size=%d from %s:%d, DMA=%d\n",
+			   a->addr, a->size, a->func, a->line, a->dma);
+	}
+}
+
+/* The replacement functions */
+void *dwc_alloc_debug(void *mem_ctx, uint32_t size, char const *func, int line)
+{
+	void *addr = __DWC_ALLOC(mem_ctx, size);
+
+	if (!addr) {
+		return NULL;
+	}
+
+	if (add_allocation(mem_ctx, size, func, line, addr, 0)) {
+		__DWC_FREE(mem_ctx, addr);
+		return NULL;
+	}
+
+	return addr;
+}
+
+void *dwc_alloc_atomic_debug(void *mem_ctx, uint32_t size, char const *func,
+			     int line)
+{
+	void *addr = __DWC_ALLOC_ATOMIC(mem_ctx, size);
+
+	if (!addr) {
+		return NULL;
+	}
+
+	if (add_allocation(mem_ctx, size, func, line, addr, 0)) {
+		__DWC_FREE(mem_ctx, addr);
+		return NULL;
+	}
+
+	return addr;
+}
+
+void dwc_free_debug(void *mem_ctx, void *addr, char const *func, int line)
+{
+	free_allocation(mem_ctx, addr, func, line);
+	__DWC_FREE(mem_ctx, addr);
+}
+
+void *dwc_dma_alloc_debug(void *dma_ctx, uint32_t size, dwc_dma_t *dma_addr,
+			  char const *func, int line)
+{
+	void *addr = __DWC_DMA_ALLOC(dma_ctx, size, dma_addr);
+
+	if (!addr) {
+		return NULL;
+	}
+
+	if (add_allocation(dma_ctx, size, func, line, addr, 1)) {
+		__DWC_DMA_FREE(dma_ctx, size, addr, *dma_addr);
+		return NULL;
+	}
+
+	return addr;
+}
+
+void *dwc_dma_alloc_atomic_debug(void *dma_ctx, uint32_t size,
+				 dwc_dma_t *dma_addr, char const *func, int line)
+{
+	void *addr = __DWC_DMA_ALLOC_ATOMIC(dma_ctx, size, dma_addr);
+
+	if (!addr) {
+		return NULL;
+	}
+
+	if (add_allocation(dma_ctx, size, func, line, addr, 1)) {
+		__DWC_DMA_FREE(dma_ctx, size, addr, *dma_addr);
+		return NULL;
+	}
+
+	return addr;
+}
+
+void dwc_dma_free_debug(void *dma_ctx, uint32_t size, void *virt_addr,
+			dwc_dma_t dma_addr, char const *func, int line)
+{
+	free_allocation(dma_ctx, virt_addr, func, line);
+	__DWC_DMA_FREE(dma_ctx, size, virt_addr, dma_addr);
+}
+
+#endif /* DWC_DEBUG_MEMORY */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_modpow.c linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_modpow.c
--- linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_modpow.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_modpow.c	2017-09-23 03:42:50.250674354 +0800
@@ -0,0 +1,640 @@
+/* Bignum routines adapted from PUTTY sources.  PuTTY copyright notice follows.
+ *
+ * PuTTY is copyright 1997-2007 Simon Tatham.
+ *
+ * Portions copyright Robert de Bath, Joris van Rantwijk, Delian
+ * Delchev, Andreas Schultz, Jeroen Massar, Wez Furlong, Nicolas Barry,
+ * Justin Bradford, Ben Harris, Malcolm Smith, Ahmad Khalifa, Markus
+ * Kuhn, and CORE SDI S.A.
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT.  IN NO EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE
+ * FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
+ * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+#ifdef DWC_CRYPTOLIB
+
+#ifndef CONFIG_MACH_IPMATE
+
+#include "dwc_modpow.h"
+
+#define BIGNUM_INT_MASK  0xFFFFFFFFUL
+#define BIGNUM_TOP_BIT   0x80000000UL
+#define BIGNUM_INT_BITS  32
+
+
+static void *snmalloc(void *mem_ctx, size_t n, size_t size)
+{
+    void *p;
+    size *= n;
+    if (size == 0) size = 1;
+    p = dwc_alloc(mem_ctx, size);
+    return p;
+}
+
+#define snewn(ctx, n, type) ((type *)snmalloc((ctx), (n), sizeof(type)))
+#define sfree dwc_free
+
+/*
+ * Usage notes:
+ *  * Do not call the DIVMOD_WORD macro with expressions such as array
+ *    subscripts, as some implementations object to this (see below).
+ *  * Note that none of the division methods below will cope if the
+ *    quotient won't fit into BIGNUM_INT_BITS. Callers should be careful
+ *    to avoid this case.
+ *    If this condition occurs, in the case of the x86 DIV instruction,
+ *    an overflow exception will occur, which (according to a correspondent)
+ *    will manifest on Windows as something like
+ *      0xC0000095: Integer overflow
+ *    The C variant won't give the right answer, either.
+ */
+
+#define MUL_WORD(w1, w2) ((BignumDblInt)w1 * w2)
+
+#if defined __GNUC__ && defined __i386__
+#define DIVMOD_WORD(q, r, hi, lo, w) \
+    __asm__("div %2" : \
+	    "=d" (r), "=a" (q) : \
+	    "r" (w), "d" (hi), "a" (lo))
+#elif defined(__mips__)
+#include <asm/div64.h>
+#define DIVMOD_WORD(q, r, hi, lo, w) do { \
+    BignumDblInt n = (((BignumDblInt)hi) << BIGNUM_INT_BITS) | lo; \
+    r = do_div(n,w); \
+    q = n; \
+} while (0)
+#else
+#define DIVMOD_WORD(q, r, hi, lo, w) do { \
+    BignumDblInt n = (((BignumDblInt)hi) << BIGNUM_INT_BITS) | lo; \
+    q = n / w; \
+    r = n % w; \
+} while (0)
+#endif
+
+#define BIGNUM_INT_BYTES (BIGNUM_INT_BITS / 8)
+
+#define BIGNUM_INTERNAL
+
+static Bignum newbn(void *mem_ctx, int length)
+{
+    Bignum b = snewn(mem_ctx, length + 1, BignumInt);
+    //if (!b)
+    //abort();		       /* FIXME */
+    DWC_MEMSET(b, 0, (length + 1) * sizeof(*b));
+    b[0] = length;
+    return b;
+}
+
+void freebn(void *mem_ctx, Bignum b)
+{
+    /*
+     * Burn the evidence, just in case.
+     */
+    DWC_MEMSET(b, 0, sizeof(b[0]) * (b[0] + 1));
+    sfree(mem_ctx, b);
+}
+
+/*
+ * Compute c = a * b.
+ * Input is in the first len words of a and b.
+ * Result is returned in the first 2*len words of c.
+ */
+static void internal_mul(BignumInt *a, BignumInt *b,
+			 BignumInt *c, int len)
+{
+    int i, j;
+    BignumDblInt t;
+
+    for (j = 0; j < 2 * len; j++)
+	c[j] = 0;
+
+    for (i = len - 1; i >= 0; i--) {
+	t = 0;
+	for (j = len - 1; j >= 0; j--) {
+	    t += MUL_WORD(a[i], (BignumDblInt) b[j]);
+	    t += (BignumDblInt) c[i + j + 1];
+	    c[i + j + 1] = (BignumInt) t;
+	    t = t >> BIGNUM_INT_BITS;
+	}
+	c[i] = (BignumInt) t;
+    }
+}
+
+static void internal_add_shifted(BignumInt *number,
+				 unsigned n, int shift)
+{
+    int word = 1 + (shift / BIGNUM_INT_BITS);
+    int bshift = shift % BIGNUM_INT_BITS;
+    BignumDblInt addend;
+
+    addend = (BignumDblInt)n << bshift;
+
+    while (addend) {
+	addend += number[word];
+	number[word] = (BignumInt) addend & BIGNUM_INT_MASK;
+	addend >>= BIGNUM_INT_BITS;
+	word++;
+    }
+}
+
+/*
+ * Compute a = a % m.
+ * Input in first alen words of a and first mlen words of m.
+ * Output in first alen words of a
+ * (of which first alen-mlen words will be zero).
+ * The MSW of m MUST have its high bit set.
+ * Quotient is accumulated in the `quotient' array, which is a Bignum
+ * rather than the internal bigendian format. Quotient parts are shifted
+ * left by `qshift' before adding into quot.
+ */
+static void internal_mod(BignumInt *a, int alen,
+			 BignumInt *m, int mlen,
+			 BignumInt *quot, int qshift)
+{
+    BignumInt m0, m1;
+    unsigned int h;
+    int i, k;
+
+    m0 = m[0];
+    if (mlen > 1)
+	m1 = m[1];
+    else
+	m1 = 0;
+
+    for (i = 0; i <= alen - mlen; i++) {
+	BignumDblInt t;
+	unsigned int q, r, c, ai1;
+
+	if (i == 0) {
+	    h = 0;
+	} else {
+	    h = a[i - 1];
+	    a[i - 1] = 0;
+	}
+
+	if (i == alen - 1)
+	    ai1 = 0;
+	else
+	    ai1 = a[i + 1];
+
+	/* Find q = h:a[i] / m0 */
+	if (h >= m0) {
+	    /*
+	     * Special case.
+	     * 
+	     * To illustrate it, suppose a BignumInt is 8 bits, and
+	     * we are dividing (say) A1:23:45:67 by A1:B2:C3. Then
+	     * our initial division will be 0xA123 / 0xA1, which
+	     * will give a quotient of 0x100 and a divide overflow.
+	     * However, the invariants in this division algorithm
+	     * are not violated, since the full number A1:23:... is
+	     * _less_ than the quotient prefix A1:B2:... and so the
+	     * following correction loop would have sorted it out.
+	     * 
+	     * In this situation we set q to be the largest
+	     * quotient we _can_ stomach (0xFF, of course).
+	     */
+	    q = BIGNUM_INT_MASK;
+	} else {
+	    /* Macro doesn't want an array subscript expression passed
+	     * into it (see definition), so use a temporary. */
+	    BignumInt tmplo = a[i];
+	    DIVMOD_WORD(q, r, h, tmplo, m0);
+
+	    /* Refine our estimate of q by looking at
+	     h:a[i]:a[i+1] / m0:m1 */
+	    t = MUL_WORD(m1, q);
+	    if (t > ((BignumDblInt) r << BIGNUM_INT_BITS) + ai1) {
+		q--;
+		t -= m1;
+		r = (r + m0) & BIGNUM_INT_MASK;     /* overflow? */
+		if (r >= (BignumDblInt) m0 &&
+		    t > ((BignumDblInt) r << BIGNUM_INT_BITS) + ai1) q--;
+	    }
+	}
+
+	/* Subtract q * m from a[i...] */
+	c = 0;
+	for (k = mlen - 1; k >= 0; k--) {
+	    t = MUL_WORD(q, m[k]);
+	    t += c;
+	    c = (unsigned)(t >> BIGNUM_INT_BITS);
+	    if ((BignumInt) t > a[i + k])
+		c++;
+	    a[i + k] -= (BignumInt) t;
+	}
+
+	/* Add back m in case of borrow */
+	if (c != h) {
+	    t = 0;
+	    for (k = mlen - 1; k >= 0; k--) {
+		t += m[k];
+		t += a[i + k];
+		a[i + k] = (BignumInt) t;
+		t = t >> BIGNUM_INT_BITS;
+	    }
+	    q--;
+	}
+	if (quot)
+	    internal_add_shifted(quot, q, qshift + BIGNUM_INT_BITS * (alen - mlen - i));
+    }
+}
+
+/*
+ * Compute p % mod.
+ * The most significant word of mod MUST be non-zero.
+ * We assume that the result array is the same size as the mod array.
+ * We optionally write out a quotient if `quotient' is non-NULL.
+ * We can avoid writing out the result if `result' is NULL.
+ */
+void bigdivmod(void *mem_ctx, Bignum p, Bignum mod, Bignum result, Bignum quotient)
+{
+    BignumInt *n, *m;
+    int mshift;
+    int plen, mlen, i, j;
+
+    /* Allocate m of size mlen, copy mod to m */
+    /* We use big endian internally */
+    mlen = mod[0];
+    m = snewn(mem_ctx, mlen, BignumInt);
+    //if (!m)
+    //abort();		       /* FIXME */
+    for (j = 0; j < mlen; j++)
+	m[j] = mod[mod[0] - j];
+
+    /* Shift m left to make msb bit set */
+    for (mshift = 0; mshift < BIGNUM_INT_BITS-1; mshift++)
+	if ((m[0] << mshift) & BIGNUM_TOP_BIT)
+	    break;
+    if (mshift) {
+	for (i = 0; i < mlen - 1; i++)
+	    m[i] = (m[i] << mshift) | (m[i + 1] >> (BIGNUM_INT_BITS - mshift));
+	m[mlen - 1] = m[mlen - 1] << mshift;
+    }
+
+    plen = p[0];
+    /* Ensure plen > mlen */
+    if (plen <= mlen)
+	plen = mlen + 1;
+
+    /* Allocate n of size plen, copy p to n */
+    n = snewn(mem_ctx, plen, BignumInt);
+    //if (!n)
+    //abort();		       /* FIXME */
+    for (j = 0; j < plen; j++)
+	n[j] = 0;
+    for (j = 1; j <= (int)p[0]; j++)
+	n[plen - j] = p[j];
+
+    /* Main computation */
+    internal_mod(n, plen, m, mlen, quotient, mshift);
+
+    /* Fixup result in case the modulus was shifted */
+    if (mshift) {
+	for (i = plen - mlen - 1; i < plen - 1; i++)
+	    n[i] = (n[i] << mshift) | (n[i + 1] >> (BIGNUM_INT_BITS - mshift));
+	n[plen - 1] = n[plen - 1] << mshift;
+	internal_mod(n, plen, m, mlen, quotient, 0);
+	for (i = plen - 1; i >= plen - mlen; i--)
+	    n[i] = (n[i] >> mshift) | (n[i - 1] << (BIGNUM_INT_BITS - mshift));
+    }
+
+    /* Copy result to buffer */
+    if (result) {
+	for (i = 1; i <= (int)result[0]; i++) {
+	    int j = plen - i;
+	    result[i] = j >= 0 ? n[j] : 0;
+	}
+    }
+
+    /* Free temporary arrays */
+    for (i = 0; i < mlen; i++)
+	m[i] = 0;
+    sfree(mem_ctx, m);
+    for (i = 0; i < plen; i++)
+	n[i] = 0;
+    sfree(mem_ctx, n);
+}
+
+/*
+ * Simple remainder.
+ */
+Bignum bigmod(void *mem_ctx, Bignum a, Bignum b)
+{
+    Bignum r = newbn(mem_ctx, b[0]);
+    bigdivmod(mem_ctx, a, b, r, NULL);
+    return r;
+}
+
+/*
+ * Compute (base ^ exp) % mod.
+ */
+Bignum dwc_modpow(void *mem_ctx, Bignum base_in, Bignum exp, Bignum mod)
+{
+    BignumInt *a, *b, *n, *m;
+    int mshift;
+    int mlen, i, j;
+    Bignum base, result;
+
+    /*
+     * The most significant word of mod needs to be non-zero. It
+     * should already be, but let's make sure.
+     */
+    //assert(mod[mod[0]] != 0);
+
+    /*
+     * Make sure the base is smaller than the modulus, by reducing
+     * it modulo the modulus if not.
+     */
+    base = bigmod(mem_ctx, base_in, mod);
+
+    /* Allocate m of size mlen, copy mod to m */
+    /* We use big endian internally */
+    mlen = mod[0];
+    m = snewn(mem_ctx, mlen, BignumInt);
+    //if (!m)
+    //abort();		       /* FIXME */
+    for (j = 0; j < mlen; j++)
+	m[j] = mod[mod[0] - j];
+
+    /* Shift m left to make msb bit set */
+    for (mshift = 0; mshift < BIGNUM_INT_BITS - 1; mshift++)
+	if ((m[0] << mshift) & BIGNUM_TOP_BIT)
+	    break;
+    if (mshift) {
+	for (i = 0; i < mlen - 1; i++)
+	    m[i] =
+		(m[i] << mshift) | (m[i + 1] >>
+				    (BIGNUM_INT_BITS - mshift));
+	m[mlen - 1] = m[mlen - 1] << mshift;
+    }
+
+    /* Allocate n of size mlen, copy base to n */
+    n = snewn(mem_ctx, mlen, BignumInt);
+    //if (!n)
+    //abort();		       /* FIXME */
+    i = mlen - base[0];
+    for (j = 0; j < i; j++)
+	n[j] = 0;
+    for (j = 0; j < base[0]; j++)
+	n[i + j] = base[base[0] - j];
+
+    /* Allocate a and b of size 2*mlen. Set a = 1 */
+    a = snewn(mem_ctx, 2 * mlen, BignumInt);
+    //if (!a)
+    //abort();		       /* FIXME */
+    b = snewn(mem_ctx, 2 * mlen, BignumInt);
+    //if (!b)
+    //abort();		       /* FIXME */
+    for (i = 0; i < 2 * mlen; i++)
+	a[i] = 0;
+    a[2 * mlen - 1] = 1;
+
+    /* Skip leading zero bits of exp. */
+    i = 0;
+    j = BIGNUM_INT_BITS - 1;
+    while (i < exp[0] && (exp[exp[0] - i] & (1 << j)) == 0) {
+	j--;
+	if (j < 0) {
+	    i++;
+	    j = BIGNUM_INT_BITS - 1;
+	}
+    }
+
+    /* Main computation */
+    while (i < exp[0]) {
+	while (j >= 0) {
+	    internal_mul(a + mlen, a + mlen, b, mlen);
+	    internal_mod(b, mlen * 2, m, mlen, NULL, 0);
+	    if ((exp[exp[0] - i] & (1 << j)) != 0) {
+		internal_mul(b + mlen, n, a, mlen);
+		internal_mod(a, mlen * 2, m, mlen, NULL, 0);
+	    } else {
+		BignumInt *t;
+		t = a;
+		a = b;
+		b = t;
+	    }
+	    j--;
+	}
+	i++;
+	j = BIGNUM_INT_BITS - 1;
+    }
+
+    /* Fixup result in case the modulus was shifted */
+    if (mshift) {
+	for (i = mlen - 1; i < 2 * mlen - 1; i++)
+	    a[i] =
+		(a[i] << mshift) | (a[i + 1] >>
+				    (BIGNUM_INT_BITS - mshift));
+	a[2 * mlen - 1] = a[2 * mlen - 1] << mshift;
+	internal_mod(a, mlen * 2, m, mlen, NULL, 0);
+	for (i = 2 * mlen - 1; i >= mlen; i--)
+	    a[i] =
+		(a[i] >> mshift) | (a[i - 1] <<
+				    (BIGNUM_INT_BITS - mshift));
+    }
+
+    /* Copy result to buffer */
+    result = newbn(mem_ctx, mod[0]);
+    for (i = 0; i < mlen; i++)
+	result[result[0] - i] = a[i + mlen];
+    while (result[0] > 1 && result[result[0]] == 0)
+	result[0]--;
+
+    /* Free temporary arrays */
+    for (i = 0; i < 2 * mlen; i++)
+	a[i] = 0;
+    sfree(mem_ctx, a);
+    for (i = 0; i < 2 * mlen; i++)
+	b[i] = 0;
+    sfree(mem_ctx, b);
+    for (i = 0; i < mlen; i++)
+	m[i] = 0;
+    sfree(mem_ctx, m);
+    for (i = 0; i < mlen; i++)
+	n[i] = 0;
+    sfree(mem_ctx, n);
+
+    freebn(mem_ctx, base);
+
+    return result;
+}
+
+
+#ifdef UNITTEST
+
+static __u32 dh_p[] = {
+	96,
+	0xFFFFFFFF,
+	0xFFFFFFFF,
+	0xA93AD2CA,
+	0x4B82D120,
+	0xE0FD108E,
+	0x43DB5BFC,
+	0x74E5AB31,
+	0x08E24FA0,
+	0xBAD946E2,
+	0x770988C0,
+	0x7A615D6C,
+	0xBBE11757,
+	0x177B200C,
+	0x521F2B18,
+	0x3EC86A64,
+	0xD8760273,
+	0xD98A0864,
+	0xF12FFA06,
+	0x1AD2EE6B,
+	0xCEE3D226,
+	0x4A25619D,
+	0x1E8C94E0,
+	0xDB0933D7,
+	0xABF5AE8C,
+	0xA6E1E4C7,
+	0xB3970F85,
+	0x5D060C7D,
+	0x8AEA7157,
+	0x58DBEF0A,
+	0xECFB8504,
+	0xDF1CBA64,
+	0xA85521AB,
+	0x04507A33,
+	0xAD33170D,
+	0x8AAAC42D,
+	0x15728E5A,
+	0x98FA0510,
+	0x15D22618,
+	0xEA956AE5,
+	0x3995497C,
+	0x95581718,
+	0xDE2BCBF6,
+	0x6F4C52C9,
+	0xB5C55DF0,
+	0xEC07A28F,
+	0x9B2783A2,
+	0x180E8603,
+	0xE39E772C,
+	0x2E36CE3B,
+	0x32905E46,
+	0xCA18217C,
+	0xF1746C08,
+	0x4ABC9804,
+	0x670C354E,
+	0x7096966D,
+	0x9ED52907,
+	0x208552BB,
+	0x1C62F356,
+	0xDCA3AD96,
+	0x83655D23,
+	0xFD24CF5F,
+	0x69163FA8,
+	0x1C55D39A,
+	0x98DA4836,
+	0xA163BF05,
+	0xC2007CB8,
+	0xECE45B3D,
+	0x49286651,
+	0x7C4B1FE6,
+	0xAE9F2411,
+	0x5A899FA5,
+	0xEE386BFB,
+	0xF406B7ED,
+	0x0BFF5CB6,
+	0xA637ED6B,
+	0xF44C42E9,
+	0x625E7EC6,
+	0xE485B576,
+	0x6D51C245,
+	0x4FE1356D,
+	0xF25F1437,
+	0x302B0A6D,
+	0xCD3A431B,
+	0xEF9519B3,
+	0x8E3404DD,
+	0x514A0879,
+	0x3B139B22,
+	0x020BBEA6,
+	0x8A67CC74,
+	0x29024E08,
+	0x80DC1CD1,
+	0xC4C6628B,
+	0x2168C234,
+	0xC90FDAA2,
+	0xFFFFFFFF,
+	0xFFFFFFFF,
+};
+
+static __u32 dh_a[] = {
+	8,
+	0xdf367516,
+	0x86459caa,
+	0xe2d459a4,
+	0xd910dae0,
+	0x8a8b5e37,
+	0x67ab31c6,
+	0xf0b55ea9,
+	0x440051d6,
+};
+
+static __u32 dh_b[] = {
+	8,
+	0xded92656,
+	0xe07a048a,
+	0x6fa452cd,
+	0x2df89d30,
+	0xc75f1b0f,
+	0x8ce3578f, 
+	0x7980a324,
+	0x5daec786,
+};
+
+static __u32 dh_g[] = {
+	1,
+	2,
+};
+
+int main(void)
+{
+	int i;
+	__u32 *k;
+	k = dwc_modpow(NULL, dh_g, dh_a, dh_p);
+
+	printf("\n\n");
+	for (i=0; i<k[0]; i++) {
+		__u32 word32 = k[k[0] - i];
+		__u16 l = word32 & 0xffff;
+		__u16 m = (word32 & 0xffff0000) >> 16;
+		printf("%04x %04x ", m, l);
+		if (!((i + 1)%13)) printf("\n");
+	}
+	printf("\n\n");
+
+	if ((k[0] == 0x60) && (k[1] == 0x28e490e5) && (k[0x60] == 0x5a0d3d4e)) {
+		printf("PASS\n\n");
+	}
+	else {
+		printf("FAIL\n\n");
+	}
+
+}
+
+#endif /* UNITTEST */
+
+#endif /* CONFIG_MACH_IPMATE */
+
+#endif /*DWC_CRYPTOLIB */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_modpow.h linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_modpow.h
--- linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_modpow.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_modpow.h	2017-09-23 03:42:50.250674354 +0800
@@ -0,0 +1,34 @@
+/*
+ * dwc_modpow.h
+ * See dwc_modpow.c for license and changes
+ */
+#ifndef _DWC_MODPOW_H
+#define _DWC_MODPOW_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "dwc_os.h"
+
+/** @file
+ *
+ * This file defines the module exponentiation function which is only used
+ * internally by the DWC UWB modules for calculation of PKs during numeric
+ * association.  The routine is taken from the PUTTY, an open source terminal
+ * emulator.  The PUTTY License is preserved in the dwc_modpow.c file.
+ *
+ */
+
+typedef uint32_t BignumInt;
+typedef uint64_t BignumDblInt;
+typedef BignumInt *Bignum;
+
+/* Compute modular exponentiaion */
+extern Bignum dwc_modpow(void *mem_ctx, Bignum base_in, Bignum exp, Bignum mod);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _LINUX_BIGNUM_H */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_notifier.c linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_notifier.c
--- linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_notifier.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_notifier.c	2017-09-23 03:42:50.250674354 +0800
@@ -0,0 +1,319 @@
+#ifdef DWC_NOTIFYLIB
+
+#include "dwc_notifier.h"
+#include "dwc_list.h"
+
+typedef struct dwc_observer {
+	void *observer;
+	dwc_notifier_callback_t callback;
+	void *data;
+	char *notification;
+	DWC_CIRCLEQ_ENTRY(dwc_observer) list_entry;
+} observer_t;
+
+DWC_CIRCLEQ_HEAD(observer_queue, dwc_observer);
+
+typedef struct dwc_notifier {
+	void *mem_ctx;
+	void *object;
+	struct observer_queue observers;
+	DWC_CIRCLEQ_ENTRY(dwc_notifier) list_entry;
+} notifier_t;
+
+DWC_CIRCLEQ_HEAD(notifier_queue, dwc_notifier);
+
+typedef struct manager {
+	void *mem_ctx;
+	void *wkq_ctx;
+	dwc_workq_t *wq;
+//	dwc_mutex_t *mutex;
+	struct notifier_queue notifiers;
+} manager_t;
+
+static manager_t *manager = NULL;
+
+static int create_manager(void *mem_ctx, void *wkq_ctx)
+{
+	manager = dwc_alloc(mem_ctx, sizeof(manager_t));
+	if (!manager) {
+		return -DWC_E_NO_MEMORY;
+	}
+
+	DWC_CIRCLEQ_INIT(&manager->notifiers);
+
+	manager->wq = dwc_workq_alloc(wkq_ctx, "DWC Notification WorkQ");
+	if (!manager->wq) {
+		return -DWC_E_NO_MEMORY;
+	}
+
+	return 0;
+}
+
+static void free_manager(void)
+{
+	dwc_workq_free(manager->wq);
+
+	/* All notifiers must have unregistered themselves before this module
+	 * can be removed.  Hitting this assertion indicates a programmer
+	 * error. */
+	DWC_ASSERT(DWC_CIRCLEQ_EMPTY(&manager->notifiers),
+		   "Notification manager being freed before all notifiers have been removed");
+	dwc_free(manager->mem_ctx, manager);
+}
+
+#ifdef DEBUG
+static void dump_manager(void)
+{
+	notifier_t *n;
+	observer_t *o;
+
+	DWC_ASSERT(manager, "Notification manager not found");
+
+	DWC_DEBUG("List of all notifiers and observers:\n");
+	DWC_CIRCLEQ_FOREACH(n, &manager->notifiers, list_entry) {
+		DWC_DEBUG("Notifier %p has observers:\n", n->object);
+		DWC_CIRCLEQ_FOREACH(o, &n->observers, list_entry) {
+			DWC_DEBUG("    %p watching %s\n", o->observer, o->notification);
+		}
+	}
+}
+#else
+#define dump_manager(...)
+#endif
+
+static observer_t *alloc_observer(void *mem_ctx, void *observer, char *notification,
+				  dwc_notifier_callback_t callback, void *data)
+{
+	observer_t *new_observer = dwc_alloc(mem_ctx, sizeof(observer_t));
+
+	if (!new_observer) {
+		return NULL;
+	}
+
+	DWC_CIRCLEQ_INIT_ENTRY(new_observer, list_entry);
+	new_observer->observer = observer;
+	new_observer->notification = notification;
+	new_observer->callback = callback;
+	new_observer->data = data;
+	return new_observer;
+}
+
+static void free_observer(void *mem_ctx, observer_t *observer)
+{
+	dwc_free(mem_ctx, observer);
+}
+
+static notifier_t *alloc_notifier(void *mem_ctx, void *object)
+{
+	notifier_t *notifier;
+
+	if (!object) {
+		return NULL;
+	}
+
+	notifier = dwc_alloc(mem_ctx, sizeof(notifier_t));
+	if (!notifier) {
+		return NULL;
+	}
+
+	DWC_CIRCLEQ_INIT(&notifier->observers);
+	DWC_CIRCLEQ_INIT_ENTRY(notifier, list_entry);
+
+	notifier->mem_ctx = mem_ctx;
+	notifier->object = object;
+	return notifier;
+}
+
+static void free_notifier(notifier_t *notifier)
+{
+	observer_t *observer;
+
+	DWC_CIRCLEQ_FOREACH(observer, &notifier->observers, list_entry) {
+		free_observer(notifier->mem_ctx, observer);
+	}
+
+	dwc_free(notifier->mem_ctx, notifier);
+}
+
+static notifier_t *find_notifier(void *object)
+{
+	notifier_t *notifier;
+
+	DWC_ASSERT(manager, "Notification manager not found");
+
+	if (!object) {
+		return NULL;
+	}
+
+	DWC_CIRCLEQ_FOREACH(notifier, &manager->notifiers, list_entry) {
+		if (notifier->object == object) {
+			return notifier;
+		}
+	}
+
+	return NULL;
+}
+
+int dwc_alloc_notification_manager(void *mem_ctx, void *wkq_ctx)
+{
+	return create_manager(mem_ctx, wkq_ctx);
+}
+
+void dwc_free_notification_manager(void)
+{
+	free_manager();
+}
+
+dwc_notifier_t *dwc_register_notifier(void *mem_ctx, void *object)
+{
+	notifier_t *notifier;
+
+	DWC_ASSERT(manager, "Notification manager not found");
+
+	notifier = find_notifier(object);
+	if (notifier) {
+		DWC_ERROR("Notifier %p is already registered\n", object);
+		return NULL;
+	}
+
+	notifier = alloc_notifier(mem_ctx, object);
+	if (!notifier) {
+		return NULL;
+	}
+
+	DWC_CIRCLEQ_INSERT_TAIL(&manager->notifiers, notifier, list_entry);
+
+	DWC_INFO("Notifier %p registered", object);
+	dump_manager();
+
+	return notifier;
+}
+
+void dwc_unregister_notifier(dwc_notifier_t *notifier)
+{
+	DWC_ASSERT(manager, "Notification manager not found");
+
+	if (!DWC_CIRCLEQ_EMPTY(&notifier->observers)) {
+		observer_t *o;
+
+		DWC_ERROR("Notifier %p has active observers when removing\n", notifier->object);
+		DWC_CIRCLEQ_FOREACH(o, &notifier->observers, list_entry) {
+			DWC_DEBUG("    %p watching %s\n", o->observer, o->notification);
+		}
+
+		DWC_ASSERT(DWC_CIRCLEQ_EMPTY(&notifier->observers),
+			   "Notifier %p has active observers when removing", notifier);
+	}
+
+	DWC_CIRCLEQ_REMOVE_INIT(&manager->notifiers, notifier, list_entry);
+	free_notifier(notifier);
+
+	DWC_INFO("Notifier unregistered");
+	dump_manager();
+}
+
+/* Add an observer to observe the notifier for a particular state, event, or notification. */
+int dwc_add_observer(void *observer, void *object, char *notification,
+		     dwc_notifier_callback_t callback, void *data)
+{
+	notifier_t *notifier = find_notifier(object);
+	observer_t *new_observer;
+
+	if (!notifier) {
+		DWC_ERROR("Notifier %p is not found when adding observer\n", object);
+		return -DWC_E_INVALID;
+	}
+
+	new_observer = alloc_observer(notifier->mem_ctx, observer, notification, callback, data);
+	if (!new_observer) {
+		return -DWC_E_NO_MEMORY;
+	}
+
+	DWC_CIRCLEQ_INSERT_TAIL(&notifier->observers, new_observer, list_entry);
+
+	DWC_INFO("Added observer %p to notifier %p observing notification %s, callback=%p, data=%p",
+		 observer, object, notification, callback, data);
+
+	dump_manager();
+	return 0;
+}
+
+int dwc_remove_observer(void *observer)
+{
+	notifier_t *n;
+
+	DWC_ASSERT(manager, "Notification manager not found");
+
+	DWC_CIRCLEQ_FOREACH(n, &manager->notifiers, list_entry) {
+		observer_t *o;
+		observer_t *o2;
+
+		DWC_CIRCLEQ_FOREACH_SAFE(o, o2, &n->observers, list_entry) {
+			if (o->observer == observer) {
+				DWC_CIRCLEQ_REMOVE_INIT(&n->observers, o, list_entry);
+				DWC_INFO("Removing observer %p from notifier %p watching notification %s:",
+					 o->observer, n->object, o->notification);
+				free_observer(n->mem_ctx, o);
+			}
+		}
+	}
+
+	dump_manager();
+	return 0;
+}
+
+typedef struct callback_data {
+	void *mem_ctx;
+	dwc_notifier_callback_t cb;
+	void *observer;
+	void *data;
+	void *object;
+	char *notification;
+	void *notification_data;
+} cb_data_t;
+
+static void cb_task(void *data)
+{
+	cb_data_t *cb = (cb_data_t *)data;
+
+	cb->cb(cb->object, cb->notification, cb->observer, cb->notification_data, cb->data);
+	dwc_free(cb->mem_ctx, cb);
+}
+
+void dwc_notify(dwc_notifier_t *notifier, char *notification, void *notification_data)
+{
+	observer_t *o;
+
+	DWC_ASSERT(manager, "Notification manager not found");
+
+	DWC_CIRCLEQ_FOREACH(o, &notifier->observers, list_entry) {
+		int len = DWC_STRLEN(notification);
+
+		if (DWC_STRLEN(o->notification) != len) {
+			continue;
+		}
+
+		if (DWC_STRNCMP(o->notification, notification, len) == 0) {
+			cb_data_t *cb_data = dwc_alloc(notifier->mem_ctx, sizeof(cb_data_t));
+
+			if (!cb_data) {
+				DWC_ERROR("Failed to allocate callback data\n");
+				return;
+			}
+
+			cb_data->mem_ctx = notifier->mem_ctx;
+			cb_data->cb = o->callback;
+			cb_data->observer = o->observer;
+			cb_data->data = o->data;
+			cb_data->object = notifier->object;
+			cb_data->notification = notification;
+			cb_data->notification_data = notification_data;
+			DWC_DEBUG("Observer found %p for notification %s\n", o->observer, notification);
+			DWC_WORKQ_SCHEDULE(manager->wq, cb_task, cb_data,
+					   "Notify callback from %p for Notification %s, to observer %p",
+					   cb_data->object, notification, cb_data->observer);
+		}
+	}
+}
+
+#endif	/* DWC_NOTIFYLIB */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_notifier.h linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_notifier.h
--- linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_notifier.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_notifier.h	2017-09-23 03:42:50.250674354 +0800
@@ -0,0 +1,122 @@
+
+#ifndef __DWC_NOTIFIER_H__
+#define __DWC_NOTIFIER_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "dwc_os.h"
+
+/** @file
+ *
+ * A simple implementation of the Observer pattern.  Any "module" can
+ * register as an observer or notifier.  The notion of "module" is abstract and
+ * can mean anything used to identify either an observer or notifier.  Usually
+ * it will be a pointer to a data structure which contains some state, ie an
+ * object.
+ *
+ * Before any notifiers can be added, the global notification manager must be
+ * brought up with dwc_alloc_notification_manager().
+ * dwc_free_notification_manager() will bring it down and free all resources.
+ * These would typically be called upon module load and unload.  The
+ * notification manager is a single global instance that handles all registered
+ * observable modules and observers so this should be done only once.
+ *
+ * A module can be observable by using Notifications to publicize some general
+ * information about it's state or operation.  It does not care who listens, or
+ * even if anyone listens, or what they do with the information.  The observable
+ * modules do not need to know any information about it's observers or their
+ * interface, or their state or data.
+ *
+ * Any module can register to emit Notifications.  It should publish a list of
+ * notifications that it can emit and their behavior, such as when they will get
+ * triggered, and what information will be provided to the observer.  Then it
+ * should register itself as an observable module. See dwc_register_notifier().
+ *
+ * Any module can observe any observable, registered module, provided it has a
+ * handle to the other module and knows what notifications to observe.  See
+ * dwc_add_observer().
+ *
+ * A function of type dwc_notifier_callback_t is called whenever a notification
+ * is triggered with one or more observers observing it.  This function is
+ * called in it's own process so it may sleep or block if needed.  It is
+ * guaranteed to be called sometime after the notification has occurred and will
+ * be called once per each time the notification is triggered.  It will NOT be
+ * called in the same process context used to trigger the notification.
+ *
+ * @section Limitiations
+ *
+ * Keep in mind that Notifications that can be triggered in rapid sucession may
+ * schedule too many processes too handle.  Be aware of this limitation when
+ * designing to use notifications, and only add notifications for appropriate
+ * observable information.
+ *
+ * Also Notification callbacks are not synchronous.  If you need to synchronize
+ * the behavior between module/observer you must use other means.  And perhaps
+ * that will mean Notifications are not the proper solution.
+ */
+
+struct dwc_notifier;
+typedef struct dwc_notifier dwc_notifier_t;
+
+/** The callback function must be of this type.
+ *
+ * @param object This is the object that is being observed.
+ * @param notification This is the notification that was triggered.
+ * @param observer This is the observer
+ * @param notification_data This is notification-specific data that the notifier
+ * has included in this notification.  The value of this should be published in
+ * the documentation of the observable module with the notifications.
+ * @param user_data This is any custom data that the observer provided when
+ * adding itself as an observer to the notification. */
+typedef void (*dwc_notifier_callback_t)(void *object, char *notification, void *observer,
+					void *notification_data, void *user_data);
+
+/** Brings up the notification manager. */
+extern int dwc_alloc_notification_manager(void *mem_ctx, void *wkq_ctx);
+/** Brings down the notification manager. */
+extern void dwc_free_notification_manager(void);
+
+/** This function registers an observable module.  A dwc_notifier_t object is
+ * returned to the observable module.  This is an opaque object that is used by
+ * the observable module to trigger notifications.  This object should only be
+ * accessible to functions that are authorized to trigger notifications for this
+ * module.  Observers do not need this object. */
+extern dwc_notifier_t *dwc_register_notifier(void *mem_ctx, void *object);
+
+/** This function unregisters an observable module.  All observers have to be
+ * removed prior to unregistration. */
+extern void dwc_unregister_notifier(dwc_notifier_t *notifier);
+
+/** Add a module as an observer to the observable module.  The observable module
+ * needs to have previously registered with the notification manager.
+ *
+ * @param observer The observer module
+ * @param object The module to observe
+ * @param notification The notification to observe
+ * @param callback The callback function to call
+ * @param user_data Any additional user data to pass into the callback function */
+extern int dwc_add_observer(void *observer, void *object, char *notification,
+			    dwc_notifier_callback_t callback, void *user_data);
+
+/** Removes the specified observer from all notifications that it is currently
+ * observing. */
+extern int dwc_remove_observer(void *observer);
+
+/** This function triggers a Notification.  It should be called by the
+ * observable module, or any module or library which the observable module
+ * allows to trigger notification on it's behalf.  Such as the dwc_cc_t.
+ *
+ * dwc_notify is a non-blocking function.  Callbacks are scheduled called in
+ * their own process context for each trigger.  Callbacks can be blocking.
+ * dwc_notify can be called from interrupt context if needed.
+ *
+ */
+void dwc_notify(dwc_notifier_t *notifier, char *notification, void *notification_data);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __DWC_NOTIFIER_H__ */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_os.h linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_os.h
--- linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/dwc_os.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/dwc_os.h	2017-09-23 03:42:50.250674354 +0800
@@ -0,0 +1,1237 @@
+/* =========================================================================
+ * $File: //dwh/usb_iip/dev/software/dwc_common_port_2/dwc_os.h $
+ * $Revision: #14 $
+ * $Date: 2010/11/04 $
+ * $Change: 1621695 $
+ *
+ * Synopsys Portability Library Software and documentation
+ * (hereinafter, "Software") is an Unsupported proprietary work of
+ * Synopsys, Inc. unless otherwise expressly agreed to in writing
+ * between Synopsys and you.
+ *
+ * The Software IS NOT an item of Licensed Software or Licensed Product
+ * under any End User Software License Agreement or Agreement for
+ * Licensed Product with Synopsys or any supplement thereto. You are
+ * permitted to use and redistribute this Software in source and binary
+ * forms, with or without modification, provided that redistributions
+ * of source code must retain this notice. You may not view, use,
+ * disclose, copy or distribute this file or any information contained
+ * herein except pursuant to this license grant from Synopsys. If you
+ * do not agree with this notice, including the disclaimer below, then
+ * you are not authorized to use the Software.
+ *
+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL
+ * SYNOPSYS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * ========================================================================= */
+#ifndef _DWC_OS_H_
+#define _DWC_OS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @file
+ *
+ * DWC portability library, low level os-wrapper functions
+ *
+ */
+
+/* These basic types need to be defined by some OS header file or custom header
+ * file for your specific target architecture.
+ *
+ * uint8_t, int8_t, uint16_t, int16_t, uint32_t, int32_t, uint64_t, int64_t
+ *
+ * Any custom or alternate header file must be added and enabled here.
+ */
+
+#ifdef DWC_LINUX
+# include <linux/types.h>
+# ifdef CONFIG_DEBUG_MUTEXES
+#  include <linux/mutex.h>
+# endif
+# include <linux/errno.h>
+# include <stdarg.h>
+#endif
+
+#if defined(DWC_FREEBSD) || defined(DWC_NETBSD)
+# include <os_dep.h>
+#endif
+
+
+/** @name Primitive Types and Values */
+
+/** We define a boolean type for consistency.  Can be either YES or NO */
+typedef uint8_t dwc_bool_t;
+#define YES  1
+#define NO   0
+
+#ifdef DWC_LINUX
+
+/** @name Error Codes */
+#define DWC_E_INVALID		EINVAL
+#define DWC_E_NO_MEMORY		ENOMEM
+#define DWC_E_NO_DEVICE		ENODEV
+#define DWC_E_NOT_SUPPORTED	EOPNOTSUPP
+#define DWC_E_TIMEOUT		ETIMEDOUT
+#define DWC_E_BUSY		EBUSY
+#define DWC_E_AGAIN		EAGAIN
+#define DWC_E_RESTART		ERESTART
+#define DWC_E_ABORT		ECONNABORTED
+#define DWC_E_SHUTDOWN		ESHUTDOWN
+#define DWC_E_NO_DATA		ENODATA
+#define DWC_E_DISCONNECT	ECONNRESET
+#define DWC_E_UNKNOWN		EINVAL
+#define DWC_E_NO_STREAM_RES	ENOSR
+#define DWC_E_COMMUNICATION	ECOMM
+#define DWC_E_OVERFLOW		EOVERFLOW
+#define DWC_E_PROTOCOL		EPROTO
+#define DWC_E_IN_PROGRESS	EINPROGRESS
+#define DWC_E_PIPE		EPIPE
+#define DWC_E_IO		EIO
+#define DWC_E_NO_SPACE		ENOSPC
+
+#else
+
+/** @name Error Codes */
+#define DWC_E_INVALID		1001
+#define DWC_E_NO_MEMORY		1002
+#define DWC_E_NO_DEVICE		1003
+#define DWC_E_NOT_SUPPORTED	1004
+#define DWC_E_TIMEOUT		1005
+#define DWC_E_BUSY		1006
+#define DWC_E_AGAIN		1007
+#define DWC_E_RESTART		1008
+#define DWC_E_ABORT		1009
+#define DWC_E_SHUTDOWN		1010
+#define DWC_E_NO_DATA		1011
+#define DWC_E_DISCONNECT	2000
+#define DWC_E_UNKNOWN		3000
+#define DWC_E_NO_STREAM_RES	4001
+#define DWC_E_COMMUNICATION	4002
+#define DWC_E_OVERFLOW		4003
+#define DWC_E_PROTOCOL		4004
+#define DWC_E_IN_PROGRESS	4005
+#define DWC_E_PIPE		4006
+#define DWC_E_IO		4007
+#define DWC_E_NO_SPACE		4008
+
+#endif
+
+
+/** @name Tracing/Logging Functions
+ *
+ * These function provide the capability to add tracing, debugging, and error
+ * messages, as well exceptions as assertions.  The WUDEV uses these
+ * extensively.  These could be logged to the main console, the serial port, an
+ * internal buffer, etc.  These functions could also be no-op if they are too
+ * expensive on your system.  By default undefining the DEBUG macro already
+ * no-ops some of these functions. */
+
+/** Returns non-zero if in interrupt context. */
+extern dwc_bool_t DWC_IN_IRQ(void);
+#define dwc_in_irq DWC_IN_IRQ
+
+/** Returns "IRQ" if DWC_IN_IRQ is true. */
+static inline char *dwc_irq(void) {
+	return DWC_IN_IRQ() ? "IRQ" : "";
+}
+
+/** Returns non-zero if in bottom-half context. */
+extern dwc_bool_t DWC_IN_BH(void);
+#define dwc_in_bh DWC_IN_BH
+
+/** Returns "BH" if DWC_IN_BH is true. */
+static inline char *dwc_bh(void) {
+	return DWC_IN_BH() ? "BH" : "";
+}
+
+/**
+ * A vprintf() clone.  Just call vprintf if you've got it.
+ */
+extern void DWC_VPRINTF(char *format, va_list args);
+#define dwc_vprintf DWC_VPRINTF
+
+/**
+ * A vsnprintf() clone.  Just call vprintf if you've got it.
+ */
+extern int DWC_VSNPRINTF(char *str, int size, char *format, va_list args);
+#define dwc_vsnprintf DWC_VSNPRINTF
+
+/**
+ * printf() clone.  Just call printf if you've go it.
+ */
+extern void DWC_PRINTF(char *format, ...)
+/* This provides compiler level static checking of the parameters if you're
+ * using GCC. */
+#ifdef __GNUC__
+	__attribute__ ((format(printf, 1, 2)));
+#else
+	;
+#endif
+#define dwc_printf DWC_PRINTF
+
+/**
+ * sprintf() clone.  Just call sprintf if you've got it.
+ */
+extern int DWC_SPRINTF(char *string, char *format, ...)
+#ifdef __GNUC__
+	__attribute__ ((format(printf, 2, 3)));
+#else
+	;
+#endif
+#define dwc_sprintf DWC_SPRINTF
+
+/**
+ * snprintf() clone.  Just call snprintf if you've got it.
+ */
+extern int DWC_SNPRINTF(char *string, int size, char *format, ...)
+#ifdef __GNUC__
+	__attribute__ ((format(printf, 3, 4)));
+#else
+	;
+#endif
+#define dwc_snprintf DWC_SNPRINTF
+
+/**
+ * Prints a WARNING message.  On systems that don't differentiate between
+ * warnings and regular log messages, just print it.  Indicates that something
+ * may be wrong with the driver.  Works like printf().
+ *
+ * Use the DWC_WARN macro to call this function.
+ */
+extern void __DWC_WARN(char *format, ...)
+#ifdef __GNUC__
+	__attribute__ ((format(printf, 1, 2)));
+#else
+	;
+#endif
+
+/**
+ * Prints an error message.  On systems that don't differentiate between errors
+ * and regular log messages, just print it.  Indicates that something went wrong
+ * with the driver.  Works like printf().
+ *
+ * Use the DWC_ERROR macro to call this function.
+ */
+extern void __DWC_ERROR(char *format, ...)
+#ifdef __GNUC__
+	__attribute__ ((format(printf, 1, 2)));
+#else
+	;
+#endif
+
+/**
+ * Prints an exception error message and takes some user-defined action such as
+ * print out a backtrace or trigger a breakpoint.  Indicates that something went
+ * abnormally wrong with the driver such as programmer error, or other
+ * exceptional condition.  It should not be ignored so even on systems without
+ * printing capability, some action should be taken to notify the developer of
+ * it.  Works like printf().
+ */
+extern void DWC_EXCEPTION(char *format, ...)
+#ifdef __GNUC__
+	__attribute__ ((format(printf, 1, 2)));
+#else
+	;
+#endif
+#define dwc_exception DWC_EXCEPTION
+
+#ifdef DEBUG
+/**
+ * Prints out a debug message.  Used for logging/trace messages.
+ *
+ * Use the DWC_DEBUG macro to call this function
+ */
+extern void __DWC_DEBUG(char *format, ...)
+#ifdef __GNUC__
+	__attribute__ ((format(printf, 1, 2)));
+#else
+	;
+#endif
+#else
+#define __DWC_DEBUG(...)
+#endif
+
+/**
+ * Prints out a Debug message.
+ */
+#define DWC_DEBUG(_format, _args...) __DWC_DEBUG("DEBUG:%s:%s: " _format "\n", \
+						 __func__, dwc_irq(), ## _args)
+#define dwc_debug DWC_DEBUG
+/**
+ * Prints out an informative message.
+ */
+#define DWC_INFO(_format, _args...) DWC_PRINTF("INFO:%s: " _format "\n", \
+					       dwc_irq(), ## _args)
+#define dwc_info DWC_INFO
+/**
+ * Prints out a warning message.
+ */
+#define DWC_WARN(_format, _args...) __DWC_WARN("WARN:%s:%s:%d: " _format "\n", \
+					dwc_irq(), __func__, __LINE__, ## _args)
+#define dwc_warn DWC_WARN
+/**
+ * Prints out an error message.
+ */
+#define DWC_ERROR(_format, _args...) __DWC_ERROR("ERROR:%s:%s:%d: " _format "\n", \
+					dwc_irq(), __func__, __LINE__, ## _args)
+#define dwc_error DWC_ERROR
+
+#define DWC_PROTO_ERROR(_format, _args...) __DWC_WARN("ERROR:%s:%s:%d: " _format "\n", \
+						dwc_irq(), __func__, __LINE__, ## _args)
+#define dwc_proto_error DWC_PROTO_ERROR
+
+#ifdef DEBUG
+/** Prints out a exception error message if the _expr expression fails.  Disabled
+ * if DEBUG is not enabled. */
+#define DWC_ASSERT(_expr, _format, _args...) do { \
+	if (!(_expr)) { DWC_EXCEPTION("%s:%s:%d: " _format "\n", dwc_irq(), \
+				      __FILE__, __LINE__, ## _args); } \
+	} while (0)
+#else
+#define DWC_ASSERT(_x...)
+#endif
+#define dwc_assert DWC_ASSERT
+
+
+/** @name Byte Ordering
+ * The following functions are for conversions between processor's byte ordering
+ * and specific ordering you want.
+ */
+
+/** Converts 32 bit data in CPU byte ordering to little endian. */
+extern uint32_t DWC_CPU_TO_LE32(uint32_t *p);
+#define dwc_cpu_to_le32 DWC_CPU_TO_LE32
+
+/** Converts 32 bit data in CPU byte orderint to big endian. */
+extern uint32_t DWC_CPU_TO_BE32(uint32_t *p);
+#define dwc_cpu_to_be32 DWC_CPU_TO_BE32
+
+/** Converts 32 bit little endian data to CPU byte ordering. */
+extern uint32_t DWC_LE32_TO_CPU(uint32_t *p);
+#define dwc_le32_to_cpu DWC_LE32_TO_CPU
+
+/** Converts 32 bit big endian data to CPU byte ordering. */
+extern uint32_t DWC_BE32_TO_CPU(uint32_t *p);
+#define dwc_be32_to_cpu DWC_BE32_TO_CPU
+
+/** Converts 16 bit data in CPU byte ordering to little endian. */
+extern uint16_t DWC_CPU_TO_LE16(uint16_t *p);
+#define dwc_cpu_to_le16 DWC_CPU_TO_LE16
+
+/** Converts 16 bit data in CPU byte orderint to big endian. */
+extern uint16_t DWC_CPU_TO_BE16(uint16_t *p);
+#define dwc_cpu_to_be16 DWC_CPU_TO_BE16
+
+/** Converts 16 bit little endian data to CPU byte ordering. */
+extern uint16_t DWC_LE16_TO_CPU(uint16_t *p);
+#define dwc_le16_to_cpu DWC_LE16_TO_CPU
+
+/** Converts 16 bit bi endian data to CPU byte ordering. */
+extern uint16_t DWC_BE16_TO_CPU(uint16_t *p);
+#define dwc_be16_to_cpu DWC_BE16_TO_CPU
+
+
+/** @name Register Read/Write
+ *
+ * The following six functions should be implemented to read/write registers of
+ * 32-bit and 64-bit sizes.  All modules use this to read/write register values.
+ * The reg value is a pointer to the register calculated from the void *base
+ * variable passed into the driver when it is started.  */
+
+#ifdef DWC_LINUX
+/* Linux doesn't need any extra parameters for register read/write, so we
+ * just throw away the IO context parameter.
+ */
+/** Reads the content of a 32-bit register. */
+extern uint32_t DWC_READ_REG32(uint32_t volatile *reg);
+#define dwc_read_reg32(_ctx_,_reg_) DWC_READ_REG32(_reg_)
+
+/** Reads the content of a 64-bit register. */
+extern uint64_t DWC_READ_REG64(uint64_t volatile *reg);
+#define dwc_read_reg64(_ctx_,_reg_) DWC_READ_REG64(_reg_)
+
+/** Writes to a 32-bit register. */
+extern void DWC_WRITE_REG32(uint32_t volatile *reg, uint32_t value);
+#define dwc_write_reg32(_ctx_,_reg_,_val_) DWC_WRITE_REG32(_reg_, _val_)
+
+/** Writes to a 64-bit register. */
+extern void DWC_WRITE_REG64(uint64_t volatile *reg, uint64_t value);
+#define dwc_write_reg64(_ctx_,_reg_,_val_) DWC_WRITE_REG64(_reg_, _val_)
+
+/**
+ * Modify bit values in a register.  Using the
+ * algorithm: (reg_contents & ~clear_mask) | set_mask.
+ */
+extern void DWC_MODIFY_REG32(uint32_t volatile *reg, uint32_t clear_mask, uint32_t set_mask);
+#define dwc_modify_reg32(_ctx_,_reg_,_cmsk_,_smsk_) DWC_MODIFY_REG32(_reg_,_cmsk_,_smsk_)
+extern void DWC_MODIFY_REG64(uint64_t volatile *reg, uint64_t clear_mask, uint64_t set_mask);
+#define dwc_modify_reg64(_ctx_,_reg_,_cmsk_,_smsk_) DWC_MODIFY_REG64(_reg_,_cmsk_,_smsk_)
+
+#endif	/* DWC_LINUX */
+
+#if defined(DWC_FREEBSD) || defined(DWC_NETBSD)
+typedef struct dwc_ioctx {
+	struct device *dev;
+	bus_space_tag_t iot;
+	bus_space_handle_t ioh;
+} dwc_ioctx_t;
+
+/** BSD needs two extra parameters for register read/write, so we pass
+ * them in using the IO context parameter.
+ */
+/** Reads the content of a 32-bit register. */
+extern uint32_t DWC_READ_REG32(void *io_ctx, uint32_t volatile *reg);
+#define dwc_read_reg32 DWC_READ_REG32
+
+/** Reads the content of a 64-bit register. */
+extern uint64_t DWC_READ_REG64(void *io_ctx, uint64_t volatile *reg);
+#define dwc_read_reg64 DWC_READ_REG64
+
+/** Writes to a 32-bit register. */
+extern void DWC_WRITE_REG32(void *io_ctx, uint32_t volatile *reg, uint32_t value);
+#define dwc_write_reg32 DWC_WRITE_REG32
+
+/** Writes to a 64-bit register. */
+extern void DWC_WRITE_REG64(void *io_ctx, uint64_t volatile *reg, uint64_t value);
+#define dwc_write_reg64 DWC_WRITE_REG64
+
+/**
+ * Modify bit values in a register.  Using the
+ * algorithm: (reg_contents & ~clear_mask) | set_mask.
+ */
+extern void DWC_MODIFY_REG32(void *io_ctx, uint32_t volatile *reg, uint32_t clear_mask, uint32_t set_mask);
+#define dwc_modify_reg32 DWC_MODIFY_REG32
+extern void DWC_MODIFY_REG64(void *io_ctx, uint64_t volatile *reg, uint64_t clear_mask, uint64_t set_mask);
+#define dwc_modify_reg64 DWC_MODIFY_REG64
+
+#endif	/* DWC_FREEBSD || DWC_NETBSD */
+
+/** @cond */
+
+/** @name Some convenience MACROS used internally.  Define DWC_DEBUG_REGS to log the
+ * register writes. */
+
+#ifdef DWC_LINUX
+
+# ifdef DWC_DEBUG_REGS
+
+#define dwc_define_read_write_reg_n(_reg,_container_type) \
+static inline uint32_t dwc_read_##_reg##_n(_container_type *container, int num) { \
+	return DWC_READ_REG32(&container->regs->_reg[num]); \
+} \
+static inline void dwc_write_##_reg##_n(_container_type *container, int num, uint32_t data) { \
+	DWC_DEBUG("WRITING %8s[%d]: %p: %08x", #_reg, num, \
+		  &(((uint32_t*)container->regs->_reg)[num]), data); \
+	DWC_WRITE_REG32(&(((uint32_t*)container->regs->_reg)[num]), data); \
+}
+
+#define dwc_define_read_write_reg(_reg,_container_type) \
+static inline uint32_t dwc_read_##_reg(_container_type *container) { \
+	return DWC_READ_REG32(&container->regs->_reg); \
+} \
+static inline void dwc_write_##_reg(_container_type *container, uint32_t data) { \
+	DWC_DEBUG("WRITING %11s: %p: %08x", #_reg, &container->regs->_reg, data); \
+	DWC_WRITE_REG32(&container->regs->_reg, data); \
+}
+
+# else	/* DWC_DEBUG_REGS */
+
+#define dwc_define_read_write_reg_n(_reg,_container_type) \
+static inline uint32_t dwc_read_##_reg##_n(_container_type *container, int num) { \
+	return DWC_READ_REG32(&container->regs->_reg[num]); \
+} \
+static inline void dwc_write_##_reg##_n(_container_type *container, int num, uint32_t data) { \
+	DWC_WRITE_REG32(&(((uint32_t*)container->regs->_reg)[num]), data); \
+}
+
+#define dwc_define_read_write_reg(_reg,_container_type) \
+static inline uint32_t dwc_read_##_reg(_container_type *container) { \
+	return DWC_READ_REG32(&container->regs->_reg); \
+} \
+static inline void dwc_write_##_reg(_container_type *container, uint32_t data) { \
+	DWC_WRITE_REG32(&container->regs->_reg, data); \
+}
+
+# endif	/* DWC_DEBUG_REGS */
+
+#endif	/* DWC_LINUX */
+
+#if defined(DWC_FREEBSD) || defined(DWC_NETBSD)
+
+# ifdef DWC_DEBUG_REGS
+
+#define dwc_define_read_write_reg_n(_reg,_container_type) \
+static inline uint32_t dwc_read_##_reg##_n(void *io_ctx, _container_type *container, int num) { \
+	return DWC_READ_REG32(io_ctx, &container->regs->_reg[num]); \
+} \
+static inline void dwc_write_##_reg##_n(void *io_ctx, _container_type *container, int num, uint32_t data) { \
+	DWC_DEBUG("WRITING %8s[%d]: %p: %08x", #_reg, num, \
+		  &(((uint32_t*)container->regs->_reg)[num]), data); \
+	DWC_WRITE_REG32(io_ctx, &(((uint32_t*)container->regs->_reg)[num]), data); \
+}
+
+#define dwc_define_read_write_reg(_reg,_container_type) \
+static inline uint32_t dwc_read_##_reg(void *io_ctx, _container_type *container) { \
+	return DWC_READ_REG32(io_ctx, &container->regs->_reg); \
+} \
+static inline void dwc_write_##_reg(void *io_ctx, _container_type *container, uint32_t data) { \
+	DWC_DEBUG("WRITING %11s: %p: %08x", #_reg, &container->regs->_reg, data); \
+	DWC_WRITE_REG32(io_ctx, &container->regs->_reg, data); \
+}
+
+# else	/* DWC_DEBUG_REGS */
+
+#define dwc_define_read_write_reg_n(_reg,_container_type) \
+static inline uint32_t dwc_read_##_reg##_n(void *io_ctx, _container_type *container, int num) { \
+	return DWC_READ_REG32(io_ctx, &container->regs->_reg[num]); \
+} \
+static inline void dwc_write_##_reg##_n(void *io_ctx, _container_type *container, int num, uint32_t data) { \
+	DWC_WRITE_REG32(io_ctx, &(((uint32_t*)container->regs->_reg)[num]), data); \
+}
+
+#define dwc_define_read_write_reg(_reg,_container_type) \
+static inline uint32_t dwc_read_##_reg(void *io_ctx, _container_type *container) { \
+	return DWC_READ_REG32(io_ctx, &container->regs->_reg); \
+} \
+static inline void dwc_write_##_reg(void *io_ctx, _container_type *container, uint32_t data) { \
+	DWC_WRITE_REG32(io_ctx, &container->regs->_reg, data); \
+}
+
+# endif	/* DWC_DEBUG_REGS */
+
+#endif	/* DWC_FREEBSD || DWC_NETBSD */
+
+/** @endcond */
+
+
+#ifdef DWC_CRYPTOLIB
+/** @name Crypto Functions
+ *
+ * These are the low-level cryptographic functions used by the driver. */
+
+/** Perform AES CBC */
+extern int DWC_AES_CBC(uint8_t *message, uint32_t messagelen, uint8_t *key, uint32_t keylen, uint8_t iv[16], uint8_t *out);
+#define dwc_aes_cbc DWC_AES_CBC
+
+/** Fill the provided buffer with random bytes.  These should be cryptographic grade random numbers. */
+extern void DWC_RANDOM_BYTES(uint8_t *buffer, uint32_t length);
+#define dwc_random_bytes DWC_RANDOM_BYTES
+
+/** Perform the SHA-256 hash function */
+extern int DWC_SHA256(uint8_t *message, uint32_t len, uint8_t *out);
+#define dwc_sha256 DWC_SHA256
+
+/** Calculated the HMAC-SHA256 */
+extern int DWC_HMAC_SHA256(uint8_t *message, uint32_t messagelen, uint8_t *key, uint32_t keylen, uint8_t *out);
+#define dwc_hmac_sha256 DWC_HMAC_SHA256
+
+#endif	/* DWC_CRYPTOLIB */
+
+
+/** @name Memory Allocation
+ *
+ * These function provide access to memory allocation.  There are only 2 DMA
+ * functions and 3 Regular memory functions that need to be implemented.  None
+ * of the memory debugging routines need to be implemented.  The allocation
+ * routines all ZERO the contents of the memory.
+ *
+ * Defining DWC_DEBUG_MEMORY turns on memory debugging and statistic gathering.
+ * This checks for memory leaks, keeping track of alloc/free pairs.  It also
+ * keeps track of how much memory the driver is using at any given time. */
+
+#define DWC_PAGE_SIZE 4096
+#define DWC_PAGE_OFFSET(addr) (((uint32_t)addr) & 0xfff)
+#define DWC_PAGE_ALIGNED(addr) ((((uint32_t)addr) & 0xfff) == 0)
+
+#define DWC_INVALID_DMA_ADDR 0x0
+
+#ifdef DWC_LINUX
+/** Type for a DMA address */
+typedef dma_addr_t dwc_dma_t;
+#endif
+
+#if defined(DWC_FREEBSD) || defined(DWC_NETBSD)
+typedef bus_addr_t dwc_dma_t;
+#endif
+
+#ifdef DWC_FREEBSD
+typedef struct dwc_dmactx {
+	struct device *dev;
+	bus_dma_tag_t dma_tag;
+	bus_dmamap_t dma_map;
+	bus_addr_t dma_paddr;
+	void *dma_vaddr;
+} dwc_dmactx_t;
+#endif
+
+#ifdef DWC_NETBSD
+typedef struct dwc_dmactx {
+	struct device *dev;
+	bus_dma_tag_t dma_tag;
+	bus_dmamap_t dma_map;
+	bus_dma_segment_t segs[1];
+	int nsegs;
+	bus_addr_t dma_paddr;
+	void *dma_vaddr;
+} dwc_dmactx_t;
+#endif
+
+/* @todo these functions will be added in the future */
+#if 0
+/**
+ * Creates a DMA pool from which you can allocate DMA buffers.  Buffers
+ * allocated from this pool will be guaranteed to meet the size, alignment, and
+ * boundary requirements specified.
+ *
+ * @param[in] size Specifies the size of the buffers that will be allocated from
+ * this pool.
+ * @param[in] align Specifies the byte alignment requirements of the buffers
+ * allocated from this pool.  Must be a power of 2.
+ * @param[in] boundary Specifies the N-byte boundary that buffers allocated from
+ * this pool must not cross.
+ *
+ * @returns A pointer to an internal opaque structure which is not to be
+ * accessed outside of these library functions.  Use this handle to specify
+ * which pools to allocate/free DMA buffers from and also to destroy the pool,
+ * when you are done with it.
+ */
+extern dwc_pool_t *DWC_DMA_POOL_CREATE(uint32_t size, uint32_t align, uint32_t boundary);
+
+/**
+ * Destroy a DMA pool.  All buffers allocated from that pool must be freed first.
+ */
+extern void DWC_DMA_POOL_DESTROY(dwc_pool_t *pool);
+
+/**
+ * Allocate a buffer from the specified DMA pool and zeros its contents.
+ */
+extern void *DWC_DMA_POOL_ALLOC(dwc_pool_t *pool, uint64_t *dma_addr);
+
+/**
+ * Free a previously allocated buffer from the DMA pool.
+ */
+extern void DWC_DMA_POOL_FREE(dwc_pool_t *pool, void *vaddr, void *daddr);
+#endif
+
+/** Allocates a DMA capable buffer and zeroes its contents. */
+extern void *__DWC_DMA_ALLOC(void *dma_ctx, uint32_t size, dwc_dma_t *dma_addr);
+
+/** Allocates a DMA capable buffer and zeroes its contents in atomic contest */
+extern void *__DWC_DMA_ALLOC_ATOMIC(void *dma_ctx, uint32_t size, dwc_dma_t *dma_addr);
+
+/** Frees a previously allocated buffer. */
+extern void __DWC_DMA_FREE(void *dma_ctx, uint32_t size, void *virt_addr, dwc_dma_t dma_addr);
+
+/** Allocates a block of memory and zeroes its contents. */
+extern void *__DWC_ALLOC(void *mem_ctx, uint32_t size);
+
+/** Allocates a block of memory and zeroes its contents, in an atomic manner
+ * which can be used inside interrupt context.  The size should be sufficiently
+ * small, a few KB at most, such that failures are not likely to occur.  Can just call
+ * __DWC_ALLOC if it is atomic. */
+extern void *__DWC_ALLOC_ATOMIC(void *mem_ctx, uint32_t size);
+
+/** Frees a previously allocated buffer. */
+extern void __DWC_FREE(void *mem_ctx, void *addr);
+
+#ifndef DWC_DEBUG_MEMORY
+
+#define DWC_ALLOC(_size_) __DWC_ALLOC(NULL, _size_)
+#define DWC_ALLOC_ATOMIC(_size_) __DWC_ALLOC_ATOMIC(NULL, _size_)
+#define DWC_FREE(_addr_) __DWC_FREE(NULL, _addr_)
+
+# ifdef DWC_LINUX
+#define DWC_DMA_ALLOC(_size_,_dma_) __DWC_DMA_ALLOC(NULL, _size_, _dma_)
+#define DWC_DMA_ALLOC_ATOMIC(_size_,_dma_) __DWC_DMA_ALLOC_ATOMIC(NULL, _size_,_dma_)
+#define DWC_DMA_FREE(_size_,_virt_,_dma_) __DWC_DMA_FREE(NULL, _size_, _virt_, _dma_)
+# endif
+
+# if defined(DWC_FREEBSD) || defined(DWC_NETBSD)
+#define DWC_DMA_ALLOC __DWC_DMA_ALLOC
+#define DWC_DMA_FREE __DWC_DMA_FREE
+# endif
+
+#else	/* DWC_DEBUG_MEMORY */
+
+extern void *dwc_alloc_debug(void *mem_ctx, uint32_t size, char const *func, int line);
+extern void *dwc_alloc_atomic_debug(void *mem_ctx, uint32_t size, char const *func, int line);
+extern void dwc_free_debug(void *mem_ctx, void *addr, char const *func, int line);
+extern void *dwc_dma_alloc_debug(void *dma_ctx, uint32_t size, dwc_dma_t *dma_addr,
+				 char const *func, int line);
+extern void *dwc_dma_alloc_atomic_debug(void *dma_ctx, uint32_t size, dwc_dma_t *dma_addr, 
+				char const *func, int line);
+extern void dwc_dma_free_debug(void *dma_ctx, uint32_t size, void *virt_addr,
+			       dwc_dma_t dma_addr, char const *func, int line);
+
+extern int dwc_memory_debug_start(void *mem_ctx);
+extern void dwc_memory_debug_stop(void);
+extern void dwc_memory_debug_report(void);
+
+#define DWC_ALLOC(_size_) dwc_alloc_debug(NULL, _size_, __func__, __LINE__)
+#define DWC_ALLOC_ATOMIC(_size_) dwc_alloc_atomic_debug(NULL, _size_, \
+							__func__, __LINE__)
+#define DWC_FREE(_addr_) dwc_free_debug(NULL, _addr_, __func__, __LINE__)
+
+# ifdef DWC_LINUX
+#define DWC_DMA_ALLOC(_size_,_dma_) dwc_dma_alloc_debug(NULL, _size_, \
+						_dma_, __func__, __LINE__)
+#define DWC_DMA_ALLOC_ATOMIC(_size_,_dma_) dwc_dma_alloc_atomic_debug(NULL, _size_, \
+						_dma_, __func__, __LINE__)
+#define DWC_DMA_FREE(_size_,_virt_,_dma_) dwc_dma_free_debug(NULL, _size_, \
+						_virt_, _dma_, __func__, __LINE__)
+# endif
+
+# if defined(DWC_FREEBSD) || defined(DWC_NETBSD)
+#define DWC_DMA_ALLOC(_ctx_,_size_,_dma_) dwc_dma_alloc_debug(_ctx_, _size_, \
+						_dma_, __func__, __LINE__)
+#define DWC_DMA_FREE(_ctx_,_size_,_virt_,_dma_) dwc_dma_free_debug(_ctx_, _size_, \
+						 _virt_, _dma_, __func__, __LINE__)
+# endif
+
+#endif /* DWC_DEBUG_MEMORY */
+
+#define dwc_alloc(_ctx_,_size_) DWC_ALLOC(_size_)
+#define dwc_alloc_atomic(_ctx_,_size_) DWC_ALLOC_ATOMIC(_size_)
+#define dwc_free(_ctx_,_addr_) DWC_FREE(_addr_)
+
+#ifdef DWC_LINUX
+/* Linux doesn't need any extra parameters for DMA buffer allocation, so we
+ * just throw away the DMA context parameter.
+ */
+#define dwc_dma_alloc(_ctx_,_size_,_dma_) DWC_DMA_ALLOC(_size_, _dma_)
+#define dwc_dma_alloc_atomic(_ctx_,_size_,_dma_) DWC_DMA_ALLOC_ATOMIC(_size_, _dma_)
+#define dwc_dma_free(_ctx_,_size_,_virt_,_dma_) DWC_DMA_FREE(_size_, _virt_, _dma_)
+#endif
+
+#if defined(DWC_FREEBSD) || defined(DWC_NETBSD)
+/** BSD needs several extra parameters for DMA buffer allocation, so we pass
+ * them in using the DMA context parameter.
+ */
+#define dwc_dma_alloc DWC_DMA_ALLOC
+#define dwc_dma_free DWC_DMA_FREE
+#endif
+
+
+/** @name Memory and String Processing */
+
+/** memset() clone */
+extern void *DWC_MEMSET(void *dest, uint8_t byte, uint32_t size);
+#define dwc_memset DWC_MEMSET
+
+/** memcpy() clone */
+extern void *DWC_MEMCPY(void *dest, void const *src, uint32_t size);
+#define dwc_memcpy DWC_MEMCPY
+
+/** memmove() clone */
+extern void *DWC_MEMMOVE(void *dest, void *src, uint32_t size);
+#define dwc_memmove DWC_MEMMOVE
+
+/** memcmp() clone */
+extern int DWC_MEMCMP(void *m1, void *m2, uint32_t size);
+#define dwc_memcmp DWC_MEMCMP
+
+/** strcmp() clone */
+extern int DWC_STRCMP(void *s1, void *s2);
+#define dwc_strcmp DWC_STRCMP
+
+/** strncmp() clone */
+extern int DWC_STRNCMP(void *s1, void *s2, uint32_t size);
+#define dwc_strncmp DWC_STRNCMP
+
+/** strlen() clone, for NULL terminated ASCII strings */
+extern int DWC_STRLEN(char const *str);
+#define dwc_strlen DWC_STRLEN
+
+/** strcpy() clone, for NULL terminated ASCII strings */
+extern char *DWC_STRCPY(char *to, const char *from);
+#define dwc_strcpy DWC_STRCPY
+
+/** strdup() clone.  If you wish to use memory allocation debugging, this
+ * implementation of strdup should use the DWC_* memory routines instead of
+ * calling a predefined strdup.  Otherwise the memory allocated by this routine
+ * will not be seen by the debugging routines. */
+extern char *DWC_STRDUP(char const *str);
+#define dwc_strdup(_ctx_,_str_) DWC_STRDUP(_str_)
+
+/** NOT an atoi() clone.  Read the description carefully.  Returns an integer
+ * converted from the string str in base 10 unless the string begins with a "0x"
+ * in which case it is base 16.  String must be a NULL terminated sequence of
+ * ASCII characters and may optionally begin with whitespace, a + or -, and a
+ * "0x" prefix if base 16.  The remaining characters must be valid digits for
+ * the number and end with a NULL character.  If any invalid characters are
+ * encountered or it returns with a negative error code and the results of the
+ * conversion are undefined.  On sucess it returns 0.  Overflow conditions are
+ * undefined.  An example implementation using atoi() can be referenced from the
+ * Linux implementation. */
+extern int DWC_ATOI(const char *str, int32_t *value);
+#define dwc_atoi DWC_ATOI
+
+/** Same as above but for unsigned. */
+extern int DWC_ATOUI(const char *str, uint32_t *value);
+#define dwc_atoui DWC_ATOUI
+
+#ifdef DWC_UTFLIB
+/** This routine returns a UTF16LE unicode encoded string from a UTF8 string. */
+extern int DWC_UTF8_TO_UTF16LE(uint8_t const *utf8string, uint16_t *utf16string, unsigned len);
+#define dwc_utf8_to_utf16le DWC_UTF8_TO_UTF16LE
+#endif
+
+
+/** @name Wait queues
+ *
+ * Wait queues provide a means of synchronizing between threads or processes.  A
+ * process can block on a waitq if some condition is not true, waiting for it to
+ * become true.  When the waitq is triggered all waiting process will get
+ * unblocked and the condition will be check again.  Waitqs should be triggered
+ * every time a condition can potentially change.*/
+struct dwc_waitq;
+
+/** Type for a waitq */
+typedef struct dwc_waitq dwc_waitq_t;
+
+/** The type of waitq condition callback function.  This is called every time
+ * condition is evaluated. */
+typedef int (*dwc_waitq_condition_t)(void *data);
+
+/** Allocate a waitq */
+extern dwc_waitq_t *DWC_WAITQ_ALLOC(void);
+#define dwc_waitq_alloc(_ctx_) DWC_WAITQ_ALLOC()
+
+/** Free a waitq */
+extern void DWC_WAITQ_FREE(dwc_waitq_t *wq);
+#define dwc_waitq_free DWC_WAITQ_FREE
+
+/** Check the condition and if it is false, block on the waitq.  When unblocked, check the
+ * condition again.  The function returns when the condition becomes true.  The return value
+ * is 0 on condition true, DWC_WAITQ_ABORTED on abort or killed, or DWC_WAITQ_UNKNOWN on error. */
+extern int32_t DWC_WAITQ_WAIT(dwc_waitq_t *wq, dwc_waitq_condition_t cond, void *data);
+#define dwc_waitq_wait DWC_WAITQ_WAIT
+
+/** Check the condition and if it is false, block on the waitq.  When unblocked,
+ * check the condition again.  The function returns when the condition become
+ * true or the timeout has passed.  The return value is 0 on condition true or
+ * DWC_TIMED_OUT on timeout, or DWC_WAITQ_ABORTED, or DWC_WAITQ_UNKNOWN on
+ * error. */
+extern int32_t DWC_WAITQ_WAIT_TIMEOUT(dwc_waitq_t *wq, dwc_waitq_condition_t cond,
+				      void *data, int32_t msecs);
+#define dwc_waitq_wait_timeout DWC_WAITQ_WAIT_TIMEOUT
+
+/** Trigger a waitq, unblocking all processes.  This should be called whenever a condition
+ * has potentially changed. */
+extern void DWC_WAITQ_TRIGGER(dwc_waitq_t *wq);
+#define dwc_waitq_trigger DWC_WAITQ_TRIGGER
+
+/** Unblock all processes waiting on the waitq with an ABORTED result. */
+extern void DWC_WAITQ_ABORT(dwc_waitq_t *wq);
+#define dwc_waitq_abort DWC_WAITQ_ABORT
+
+
+/** @name Threads
+ *
+ * A thread must be explicitly stopped.  It must check DWC_THREAD_SHOULD_STOP
+ * whenever it is woken up, and then return.  The DWC_THREAD_STOP function
+ * returns the value from the thread.
+ */
+
+struct dwc_thread;
+
+/** Type for a thread */
+typedef struct dwc_thread dwc_thread_t;
+
+/** The thread function */
+typedef int (*dwc_thread_function_t)(void *data);
+
+/** Create a thread and start it running the thread_function.  Returns a handle
+ * to the thread */
+extern dwc_thread_t *DWC_THREAD_RUN(dwc_thread_function_t func, char *name, void *data);
+#define dwc_thread_run(_ctx_,_func_,_name_,_data_) DWC_THREAD_RUN(_func_, _name_, _data_)
+
+/** Stops a thread.  Return the value returned by the thread.  Or will return
+ * DWC_ABORT if the thread never started. */
+extern int DWC_THREAD_STOP(dwc_thread_t *thread);
+#define dwc_thread_stop DWC_THREAD_STOP
+
+/** Signifies to the thread that it must stop. */
+#ifdef DWC_LINUX
+/* Linux doesn't need any parameters for kthread_should_stop() */
+extern dwc_bool_t DWC_THREAD_SHOULD_STOP(void);
+#define dwc_thread_should_stop(_thrd_) DWC_THREAD_SHOULD_STOP()
+
+/* No thread_exit function in Linux */
+#define dwc_thread_exit(_thrd_)
+#endif
+
+#if defined(DWC_FREEBSD) || defined(DWC_NETBSD)
+/** BSD needs the thread pointer for kthread_suspend_check() */
+extern dwc_bool_t DWC_THREAD_SHOULD_STOP(dwc_thread_t *thread);
+#define dwc_thread_should_stop DWC_THREAD_SHOULD_STOP
+
+/** The thread must call this to exit. */
+extern void DWC_THREAD_EXIT(dwc_thread_t *thread);
+#define dwc_thread_exit DWC_THREAD_EXIT
+#endif
+
+
+/** @name Work queues
+ *
+ * Workqs are used to queue a callback function to be called at some later time,
+ * in another thread. */
+struct dwc_workq;
+
+/** Type for a workq */
+typedef struct dwc_workq dwc_workq_t;
+
+/** The type of the callback function to be called. */
+typedef void (*dwc_work_callback_t)(void *data);
+
+/** Allocate a workq */
+extern dwc_workq_t *DWC_WORKQ_ALLOC(char *name);
+#define dwc_workq_alloc(_ctx_,_name_) DWC_WORKQ_ALLOC(_name_)
+
+/** Free a workq.  All work must be completed before being freed. */
+extern void DWC_WORKQ_FREE(dwc_workq_t *workq);
+#define dwc_workq_free DWC_WORKQ_FREE
+
+/** Schedule a callback on the workq, passing in data.  The function will be
+ * scheduled at some later time. */
+extern void DWC_WORKQ_SCHEDULE(dwc_workq_t *workq, dwc_work_callback_t cb,
+			       void *data, char *format, ...)
+#ifdef __GNUC__
+	__attribute__ ((format(printf, 4, 5)));
+#else
+	;
+#endif
+#define dwc_workq_schedule DWC_WORKQ_SCHEDULE
+
+/** Schedule a callback on the workq, that will be called until at least
+ * given number miliseconds have passed. */
+extern void DWC_WORKQ_SCHEDULE_DELAYED(dwc_workq_t *workq, dwc_work_callback_t cb,
+				       void *data, uint32_t time, char *format, ...)
+#ifdef __GNUC__
+	__attribute__ ((format(printf, 5, 6)));
+#else
+	;
+#endif
+#define dwc_workq_schedule_delayed DWC_WORKQ_SCHEDULE_DELAYED
+
+/** The number of processes in the workq */
+extern int DWC_WORKQ_PENDING(dwc_workq_t *workq);
+#define dwc_workq_pending DWC_WORKQ_PENDING
+
+/** Blocks until all the work in the workq is complete or timed out.  Returns <
+ * 0 on timeout. */
+extern int DWC_WORKQ_WAIT_WORK_DONE(dwc_workq_t *workq, int timeout);
+#define dwc_workq_wait_work_done DWC_WORKQ_WAIT_WORK_DONE
+
+
+/** @name Tasklets
+ *
+ */
+struct dwc_tasklet;
+
+/** Type for a tasklet */
+typedef struct dwc_tasklet dwc_tasklet_t;
+
+/** The type of the callback function to be called */
+typedef void (*dwc_tasklet_callback_t)(void *data);
+
+/** Allocates a tasklet */
+extern dwc_tasklet_t *DWC_TASK_ALLOC(char *name, dwc_tasklet_callback_t cb, void *data);
+#define dwc_task_alloc(_ctx_,_name_,_cb_,_data_) DWC_TASK_ALLOC(_name_, _cb_, _data_)
+
+/** Frees a tasklet */
+extern void DWC_TASK_FREE(dwc_tasklet_t *task);
+#define dwc_task_free DWC_TASK_FREE
+
+/** Schedules a tasklet to run */
+extern void DWC_TASK_SCHEDULE(dwc_tasklet_t *task);
+#define dwc_task_schedule DWC_TASK_SCHEDULE
+
+
+/** @name Timer
+ *
+ * Callbacks must be small and atomic.
+ */
+struct dwc_timer;
+
+/** Type for a timer */
+typedef struct dwc_timer dwc_timer_t;
+
+/** The type of the callback function to be called */
+typedef void (*dwc_timer_callback_t)(void *data);
+
+/** Allocates a timer */
+extern dwc_timer_t *DWC_TIMER_ALLOC(char *name, dwc_timer_callback_t cb, void *data);
+#define dwc_timer_alloc(_ctx_,_name_,_cb_,_data_) DWC_TIMER_ALLOC(_name_,_cb_,_data_)
+
+/** Frees a timer */
+extern void DWC_TIMER_FREE(dwc_timer_t *timer);
+#define dwc_timer_free DWC_TIMER_FREE
+
+/** Schedules the timer to run at time ms from now.  And will repeat at every
+ * repeat_interval msec therafter
+ *
+ * Modifies a timer that is still awaiting execution to a new expiration time.
+ * The mod_time is added to the old time.  */
+extern void DWC_TIMER_SCHEDULE(dwc_timer_t *timer, uint32_t time);
+#define dwc_timer_schedule DWC_TIMER_SCHEDULE
+
+/** Disables the timer from execution. */
+extern void DWC_TIMER_CANCEL(dwc_timer_t *timer);
+#define dwc_timer_cancel DWC_TIMER_CANCEL
+
+
+/** @name Spinlocks
+ *
+ * These locks are used when the work between the lock/unlock is atomic and
+ * short.  Interrupts are also disabled during the lock/unlock and thus they are
+ * suitable to lock between interrupt/non-interrupt context.  They also lock
+ * between processes if you have multiple CPUs or Preemption.  If you don't have
+ * multiple CPUS or Preemption, then the you can simply implement the
+ * DWC_SPINLOCK and DWC_SPINUNLOCK to disable and enable interrupts.  Because
+ * the work between the lock/unlock is atomic, the process context will never
+ * change, and so you never have to lock between processes.  */
+
+struct dwc_spinlock;
+
+/** Type for a spinlock */
+typedef struct dwc_spinlock dwc_spinlock_t;
+
+/** Type for the 'flags' argument to spinlock funtions */
+typedef unsigned long dwc_irqflags_t;
+
+/** Returns an initialized lock variable.  This function should allocate and
+ * initialize the OS-specific data structure used for locking.  This data
+ * structure is to be used for the DWC_LOCK and DWC_UNLOCK functions and should
+ * be freed by the DWC_FREE_LOCK when it is no longer used. */
+extern dwc_spinlock_t *DWC_SPINLOCK_ALLOC(void);
+#define dwc_spinlock_alloc(_ctx_) DWC_SPINLOCK_ALLOC()
+
+/** Frees an initialized lock variable. */
+extern void DWC_SPINLOCK_FREE(dwc_spinlock_t *lock);
+#define dwc_spinlock_free(_ctx_,_lock_) DWC_SPINLOCK_FREE(_lock_)
+
+/** Disables interrupts and blocks until it acquires the lock.
+ *
+ * @param lock Pointer to the spinlock.
+ * @param flags Unsigned long for irq flags storage.
+ */
+extern void DWC_SPINLOCK_IRQSAVE(dwc_spinlock_t *lock, dwc_irqflags_t *flags);
+#define dwc_spinlock_irqsave DWC_SPINLOCK_IRQSAVE
+
+/** Re-enables the interrupt and releases the lock.
+ *
+ * @param lock Pointer to the spinlock.
+ * @param flags Unsigned long for irq flags storage.  Must be the same as was
+ * passed into DWC_LOCK.
+ */
+extern void DWC_SPINUNLOCK_IRQRESTORE(dwc_spinlock_t *lock, dwc_irqflags_t flags);
+#define dwc_spinunlock_irqrestore DWC_SPINUNLOCK_IRQRESTORE
+
+/** Blocks until it acquires the lock.
+ *
+ * @param lock Pointer to the spinlock.
+ */
+extern void DWC_SPINLOCK(dwc_spinlock_t *lock);
+#define dwc_spinlock DWC_SPINLOCK
+
+/** Releases the lock.
+ *
+ * @param lock Pointer to the spinlock.
+ */
+extern void DWC_SPINUNLOCK(dwc_spinlock_t *lock);
+#define dwc_spinunlock DWC_SPINUNLOCK
+
+
+/** @name Mutexes
+ *
+ * Unlike spinlocks Mutexes lock only between processes and the work between the
+ * lock/unlock CAN block, therefore it CANNOT be called from interrupt context.
+ */
+
+struct dwc_mutex;
+
+/** Type for a mutex */
+typedef struct dwc_mutex dwc_mutex_t;
+
+/* For Linux Mutex Debugging make it inline because the debugging routines use
+ * the symbol to determine recursive locking.  This makes it falsely think
+ * recursive locking occurs. */
+#if defined(DWC_LINUX) && defined(CONFIG_DEBUG_MUTEXES)
+#define DWC_MUTEX_ALLOC_LINUX_DEBUG(__mutexp) ({ \
+	__mutexp = (dwc_mutex_t *)DWC_ALLOC(sizeof(struct mutex)); \
+	mutex_init((struct mutex *)__mutexp); \
+})
+#endif
+
+/** Allocate a mutex */
+extern dwc_mutex_t *DWC_MUTEX_ALLOC(void);
+#define dwc_mutex_alloc(_ctx_) DWC_MUTEX_ALLOC()
+
+/* For memory leak debugging when using Linux Mutex Debugging */
+#if defined(DWC_LINUX) && defined(CONFIG_DEBUG_MUTEXES)
+#define DWC_MUTEX_FREE(__mutexp) do { \
+	mutex_destroy((struct mutex *)__mutexp); \
+	DWC_FREE(__mutexp); \
+} while(0)
+#else
+/** Free a mutex */
+extern void DWC_MUTEX_FREE(dwc_mutex_t *mutex);
+#define dwc_mutex_free(_ctx_,_mutex_) DWC_MUTEX_FREE(_mutex_)
+#endif
+
+/** Lock a mutex */
+extern void DWC_MUTEX_LOCK(dwc_mutex_t *mutex);
+#define dwc_mutex_lock DWC_MUTEX_LOCK
+
+/** Non-blocking lock returns 1 on successful lock. */
+extern int DWC_MUTEX_TRYLOCK(dwc_mutex_t *mutex);
+#define dwc_mutex_trylock DWC_MUTEX_TRYLOCK
+
+/** Unlock a mutex */
+extern void DWC_MUTEX_UNLOCK(dwc_mutex_t *mutex);
+#define dwc_mutex_unlock DWC_MUTEX_UNLOCK
+
+
+/** @name Time */
+
+/** Microsecond delay.
+ *
+ * @param usecs  Microseconds to delay.
+ */
+extern void DWC_UDELAY(uint32_t usecs);
+#define dwc_udelay DWC_UDELAY
+
+/** Millisecond delay.
+ *
+ * @param msecs  Milliseconds to delay.
+ */
+extern void DWC_MDELAY(uint32_t msecs);
+#define dwc_mdelay DWC_MDELAY
+
+/** Non-busy waiting.
+ * Sleeps for specified number of milliseconds.
+ *
+ * @param msecs Milliseconds to sleep.
+ */
+extern void DWC_MSLEEP(uint32_t msecs);
+#define dwc_msleep DWC_MSLEEP
+
+/**
+ * Returns number of milliseconds since boot.
+ */
+extern uint32_t DWC_TIME(void);
+#define dwc_time DWC_TIME
+
+
+
+
+/* @mainpage DWC Portability and Common Library
+ *
+ * This is the documentation for the DWC Portability and Common Library.
+ *
+ * @section intro Introduction
+ *
+ * The DWC Portability library consists of wrapper calls and data structures to
+ * all low-level functions which are typically provided by the OS.  The WUDEV
+ * driver uses only these functions.  In order to port the WUDEV driver, only
+ * the functions in this library need to be re-implemented, with the same
+ * behavior as documented here.
+ *
+ * The Common library consists of higher level functions, which rely only on
+ * calling the functions from the DWC Portability library.  These common
+ * routines are shared across modules.  Some of the common libraries need to be
+ * used directly by the driver programmer when porting WUDEV.  Such as the
+ * parameter and notification libraries.
+ *
+ * @section low Portability Library OS Wrapper Functions
+ *
+ * Any function starting with DWC and in all CAPS is a low-level OS-wrapper that
+ * needs to be implemented when porting, for example DWC_MUTEX_ALLOC().  All of
+ * these functions are included in the dwc_os.h file.
+ *
+ * There are many functions here covering a wide array of OS services.  Please
+ * see dwc_os.h for details, and implementation notes for each function.
+ *
+ * @section common Common Library Functions
+ *
+ * Any function starting with dwc and in all lowercase is a common library
+ * routine.  These functions have a portable implementation and do not need to
+ * be reimplemented when porting.  The common routines can be used by any
+ * driver, and some must be used by the end user to control the drivers.  For
+ * example, you must use the Parameter common library in order to set the
+ * parameters in the WUDEV module.
+ *
+ * The common libraries consist of the following:
+ *
+ * - Connection Contexts - Used internally and can be used by end-user.  See dwc_cc.h
+ * - Parameters - Used internally and can be used by end-user.  See dwc_params.h
+ * - Notifications - Used internally and can be used by end-user.  See dwc_notifier.h
+ * - Lists - Used internally and can be used by end-user.  See dwc_list.h
+ * - Memory Debugging - Used internally and can be used by end-user.  See dwc_os.h
+ * - Modpow - Used internally only.  See dwc_modpow.h
+ * - DH - Used internally only.  See dwc_dh.h
+ * - Crypto - Used internally only.  See dwc_crypto.h
+ *
+ *
+ * @section prereq Prerequistes For dwc_os.h
+ * @subsection types Data Types
+ *
+ * The dwc_os.h file assumes that several low-level data types are pre defined for the
+ * compilation environment.  These data types are:
+ *
+ * - uint8_t - unsigned 8-bit data type
+ * - int8_t - signed 8-bit data type
+ * - uint16_t - unsigned 16-bit data type
+ * - int16_t - signed 16-bit data type
+ * - uint32_t - unsigned 32-bit data type
+ * - int32_t - signed 32-bit data type
+ * - uint64_t - unsigned 64-bit data type
+ * - int64_t - signed 64-bit data type
+ *
+ * Ensure that these are defined before using dwc_os.h.  The easiest way to do
+ * that is to modify the top of the file to include the appropriate header.
+ * This is already done for the Linux environment.  If the DWC_LINUX macro is
+ * defined, the correct header will be added.  A standard header <stdint.h> is
+ * also used for environments where standard C headers are available.
+ *
+ * @subsection stdarg Variable Arguments
+ *
+ * Variable arguments are provided by a standard C header <stdarg.h>.  it is
+ * available in Both the Linux and ANSI C enviornment.  An equivalent must be
+ * provided in your enviornment in order to use dwc_os.h with the debug and
+ * tracing message functionality.
+ *
+ * @subsection thread Threading
+ *
+ * WUDEV Core must be run on an operating system that provides for multiple
+ * threads/processes.  Threading can be implemented in many ways, even in
+ * embedded systems without an operating system.  At the bare minimum, the
+ * system should be able to start any number of processes at any time to handle
+ * special work.  It need not be a pre-emptive system.  Process context can
+ * change upon a call to a blocking function.  The hardware interrupt context
+ * that calls the module's ISR() function must be differentiable from process
+ * context, even if your processes are impemented via a hardware interrupt.
+ * Further locking mechanism between process must exist (or be implemented), and
+ * process context must have a way to disable interrupts for a period of time to
+ * lock them out.  If all of this exists, the functions in dwc_os.h related to
+ * threading should be able to be implemented with the defined behavior.
+ *
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _DWC_OS_H_ */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/Makefile linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/Makefile
--- linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/Makefile	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/Makefile	2017-09-23 03:42:50.250674354 +0800
@@ -0,0 +1,19 @@
+#
+# Makefile for DWC_common library
+#
+EXTRA_CFLAGS	+= -DDWC_LINUX
+EXTRA_CFLAGS	+= -DDEBUG
+EXTRA_CFLAGS	+= -DDWC_DEBUG_REGS
+EXTRA_CFLAGS	+= -DDWC_DEBUG_MEMORY
+
+EXTRA_CFLAGS	+= -DDWC_LIBMODULE
+EXTRA_CFLAGS	+= -DDWC_CCLIB
+EXTRA_CFLAGS	+= -DDWC_CRYPTOLIB
+EXTRA_CFLAGS	+= -DDWC_NOTIFYLIB
+EXTRA_CFLAGS	+= -DDWC_UTFLIB
+
+obj-y			 := dwc_common_port_lib.o
+dwc_common_port_lib-objs := dwc_cc.o dwc_modpow.o dwc_dh.o \
+			    dwc_crypto.o dwc_notifier.o \
+			    dwc_common_linux.o dwc_mem.o
+
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/usb.h linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/usb.h
--- linux-3.0.82/drivers/usb/gadget/dwc/dwc_common_port/usb.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/dwc_common_port/usb.h	2017-09-23 03:42:50.254674343 +0800
@@ -0,0 +1,946 @@
+/*
+ * Copyright (c) 1998 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Lennart Augustsson (lennart@augustsson.net) at
+ * Carlstedt Research & Technology.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *        This product includes software developed by the NetBSD
+ *        Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/* Modified by Synopsys, Inc, 12/12/2007 */
+
+
+#ifndef _USB_H_
+#define _USB_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * The USB records contain some unaligned little-endian word
+ * components.  The U[SG]ETW macros take care of both the alignment
+ * and endian problem and should always be used to access non-byte
+ * values.
+ */
+typedef u_int8_t uByte;
+typedef u_int8_t uWord[2];
+typedef u_int8_t uDWord[4];
+
+#define USETW2(w,h,l) ((w)[0] = (u_int8_t)(l), (w)[1] = (u_int8_t)(h))
+#define UCONSTW(x)	{ (x) & 0xff, ((x) >> 8) & 0xff }
+#define UCONSTDW(x)	{ (x) & 0xff, ((x) >> 8) & 0xff, \
+			  ((x) >> 16) & 0xff, ((x) >> 24) & 0xff }
+
+#if 1
+#define UGETW(w) ((w)[0] | ((w)[1] << 8))
+#define USETW(w,v) ((w)[0] = (u_int8_t)(v), (w)[1] = (u_int8_t)((v) >> 8))
+#define UGETDW(w) ((w)[0] | ((w)[1] << 8) | ((w)[2] << 16) | ((w)[3] << 24))
+#define USETDW(w,v) ((w)[0] = (u_int8_t)(v), \
+		     (w)[1] = (u_int8_t)((v) >> 8), \
+		     (w)[2] = (u_int8_t)((v) >> 16), \
+		     (w)[3] = (u_int8_t)((v) >> 24))
+#else
+/*
+ * On little-endian machines that can handle unanliged accesses
+ * (e.g. i386) these macros can be replaced by the following.
+ */
+#define UGETW(w) (*(u_int16_t *)(w))
+#define USETW(w,v) (*(u_int16_t *)(w) = (v))
+#define UGETDW(w) (*(u_int32_t *)(w))
+#define USETDW(w,v) (*(u_int32_t *)(w) = (v))
+#endif
+
+/*
+ * Macros for accessing UAS IU fields, which are big-endian
+ */
+#define IUSETW2(w,h,l) ((w)[0] = (u_int8_t)(h), (w)[1] = (u_int8_t)(l))
+#define IUCONSTW(x)	{ ((x) >> 8) & 0xff, (x) & 0xff }
+#define IUCONSTDW(x)	{ ((x) >> 24) & 0xff, ((x) >> 16) & 0xff, \
+			((x) >> 8) & 0xff, (x) & 0xff }
+#define IUGETW(w) (((w)[0] << 8) | (w)[1])
+#define IUSETW(w,v) ((w)[0] = (u_int8_t)((v) >> 8), (w)[1] = (u_int8_t)(v))
+#define IUGETDW(w) (((w)[0] << 24) | ((w)[1] << 16) | ((w)[2] << 8) | (w)[3])
+#define IUSETDW(w,v) ((w)[0] = (u_int8_t)((v) >> 24), \
+		      (w)[1] = (u_int8_t)((v) >> 16), \
+		      (w)[2] = (u_int8_t)((v) >> 8), \
+		      (w)[3] = (u_int8_t)(v))
+
+#define UPACKED __attribute__((__packed__))
+
+typedef struct {
+	uByte		bmRequestType;
+	uByte		bRequest;
+	uWord		wValue;
+	uWord		wIndex;
+	uWord		wLength;
+} UPACKED usb_device_request_t;
+
+#define UT_GET_DIR(a) ((a) & 0x80)
+#define UT_WRITE		0x00
+#define UT_READ			0x80
+
+#define UT_GET_TYPE(a) ((a) & 0x60)
+#define UT_STANDARD		0x00
+#define UT_CLASS		0x20
+#define UT_VENDOR		0x40
+
+#define UT_GET_RECIPIENT(a) ((a) & 0x1f)
+#define UT_DEVICE		0x00
+#define UT_INTERFACE		0x01
+#define UT_ENDPOINT		0x02
+#define UT_OTHER		0x03
+
+#define UT_READ_DEVICE		(UT_READ  | UT_STANDARD | UT_DEVICE)
+#define UT_READ_INTERFACE	(UT_READ  | UT_STANDARD | UT_INTERFACE)
+#define UT_READ_ENDPOINT	(UT_READ  | UT_STANDARD | UT_ENDPOINT)
+#define UT_WRITE_DEVICE		(UT_WRITE | UT_STANDARD | UT_DEVICE)
+#define UT_WRITE_INTERFACE	(UT_WRITE | UT_STANDARD | UT_INTERFACE)
+#define UT_WRITE_ENDPOINT	(UT_WRITE | UT_STANDARD | UT_ENDPOINT)
+#define UT_READ_CLASS_DEVICE	(UT_READ  | UT_CLASS | UT_DEVICE)
+#define UT_READ_CLASS_INTERFACE	(UT_READ  | UT_CLASS | UT_INTERFACE)
+#define UT_READ_CLASS_OTHER	(UT_READ  | UT_CLASS | UT_OTHER)
+#define UT_READ_CLASS_ENDPOINT	(UT_READ  | UT_CLASS | UT_ENDPOINT)
+#define UT_WRITE_CLASS_DEVICE	(UT_WRITE | UT_CLASS | UT_DEVICE)
+#define UT_WRITE_CLASS_INTERFACE (UT_WRITE | UT_CLASS | UT_INTERFACE)
+#define UT_WRITE_CLASS_OTHER	(UT_WRITE | UT_CLASS | UT_OTHER)
+#define UT_WRITE_CLASS_ENDPOINT	(UT_WRITE | UT_CLASS | UT_ENDPOINT)
+#define UT_READ_VENDOR_DEVICE	(UT_READ  | UT_VENDOR | UT_DEVICE)
+#define UT_READ_VENDOR_INTERFACE (UT_READ  | UT_VENDOR | UT_INTERFACE)
+#define UT_READ_VENDOR_OTHER	(UT_READ  | UT_VENDOR | UT_OTHER)
+#define UT_READ_VENDOR_ENDPOINT	(UT_READ  | UT_VENDOR | UT_ENDPOINT)
+#define UT_WRITE_VENDOR_DEVICE	(UT_WRITE | UT_VENDOR | UT_DEVICE)
+#define UT_WRITE_VENDOR_INTERFACE (UT_WRITE | UT_VENDOR | UT_INTERFACE)
+#define UT_WRITE_VENDOR_OTHER	(UT_WRITE | UT_VENDOR | UT_OTHER)
+#define UT_WRITE_VENDOR_ENDPOINT (UT_WRITE | UT_VENDOR | UT_ENDPOINT)
+
+/* Requests */
+#define UR_GET_STATUS		0x00
+#define  USTAT_STANDARD_STATUS  0x00
+#define  WUSTAT_WUSB_FEATURE    0x01
+#define  WUSTAT_CHANNEL_INFO    0x02
+#define  WUSTAT_RECEIVED_DATA   0x03
+#define  WUSTAT_MAS_AVAILABILITY 0x04
+#define  WUSTAT_CURRENT_TRANSMIT_POWER 0x05
+#define UR_CLEAR_FEATURE	0x01
+#define UR_SET_FEATURE		0x03
+#define UR_SET_AND_TEST_FEATURE 0x0c
+#define UR_SET_ADDRESS		0x05
+#define UR_GET_DESCRIPTOR	0x06
+#define  UDESC_DEVICE		0x01
+#define  UDESC_CONFIG		0x02
+#define  UDESC_STRING		0x03
+#define  UDESC_INTERFACE	0x04
+#define  UDESC_ENDPOINT		0x05
+#define  UDESC_SS_USB_COMPANION	0x30
+#define  UDESC_DEVICE_QUALIFIER	0x06
+#define  UDESC_OTHER_SPEED_CONFIGURATION 0x07
+#define  UDESC_INTERFACE_POWER	0x08
+#define  UDESC_OTG		0x09
+#define  WUDESC_SECURITY	0x0c
+#define  WUDESC_KEY		0x0d
+#define   WUD_GET_KEY_INDEX(_wValue_) ((_wValue_) & 0xf)
+#define   WUD_GET_KEY_TYPE(_wValue_) (((_wValue_) & 0x30) >> 4)
+#define    WUD_KEY_TYPE_ASSOC    0x01
+#define    WUD_KEY_TYPE_GTK      0x02
+#define   WUD_GET_KEY_ORIGIN(_wValue_) (((_wValue_) & 0x40) >> 6)
+#define    WUD_KEY_ORIGIN_HOST   0x00
+#define    WUD_KEY_ORIGIN_DEVICE 0x01
+#define  WUDESC_ENCRYPTION_TYPE	0x0e
+#define  WUDESC_BOS		0x0f
+#define  WUDESC_DEVICE_CAPABILITY 0x10
+#define  WUDESC_WIRELESS_ENDPOINT_COMPANION 0x11
+#define  UDESC_BOS		0x0f
+#define  UDESC_DEVICE_CAPABILITY 0x10
+#define  UDESC_CS_DEVICE	0x21	/* class specific */
+#define  UDESC_CS_CONFIG	0x22
+#define  UDESC_CS_STRING	0x23
+#define  UDESC_CS_INTERFACE	0x24
+#define  UDESC_CS_ENDPOINT	0x25
+#define  UDESC_HUB		0x29
+#define UR_SET_DESCRIPTOR	0x07
+#define UR_GET_CONFIG		0x08
+#define UR_SET_CONFIG		0x09
+#define UR_GET_INTERFACE	0x0a
+#define UR_SET_INTERFACE	0x0b
+#define UR_SYNCH_FRAME		0x0c
+#define WUR_SET_ENCRYPTION      0x0d
+#define WUR_GET_ENCRYPTION	0x0e
+#define WUR_SET_HANDSHAKE	0x0f
+#define WUR_GET_HANDSHAKE	0x10
+#define WUR_SET_CONNECTION	0x11
+#define WUR_SET_SECURITY_DATA	0x12
+#define WUR_GET_SECURITY_DATA	0x13
+#define WUR_SET_WUSB_DATA	0x14
+#define  WUDATA_DRPIE_INFO	0x01
+#define  WUDATA_TRANSMIT_DATA	0x02
+#define  WUDATA_TRANSMIT_PARAMS	0x03
+#define  WUDATA_RECEIVE_PARAMS	0x04
+#define  WUDATA_TRANSMIT_POWER	0x05
+#define WUR_LOOPBACK_DATA_WRITE	0x15
+#define WUR_LOOPBACK_DATA_READ	0x16
+#define WUR_SET_INTERFACE_DS	0x17
+
+/* Feature numbers */
+#define UF_ENDPOINT_HALT	0
+#define UF_DEVICE_REMOTE_WAKEUP	1
+#define UF_TEST_MODE		2
+#define UF_DEVICE_B_HNP_ENABLE	3
+#define UF_DEVICE_A_HNP_SUPPORT	4
+#define UF_DEVICE_A_ALT_HNP_SUPPORT 5
+#define WUF_WUSB		3
+#define  WUF_TX_DRPIE		0x0
+#define  WUF_DEV_XMIT_PACKET	0x1
+#define  WUF_COUNT_PACKETS	0x2
+#define  WUF_CAPTURE_PACKETS	0x3
+#define UF_FUNCTION_SUSPEND	0
+#define UF_U1_ENABLE		48
+#define UF_U2_ENABLE		49
+#define UF_LTM_ENABLE		50
+
+/* Class requests from the USB 2.0 hub spec, table 11-15 */
+#define UCR_CLEAR_HUB_FEATURE		(0x2000 | UR_CLEAR_FEATURE)
+#define UCR_CLEAR_PORT_FEATURE		(0x2300 | UR_CLEAR_FEATURE)
+#define UCR_GET_HUB_DESCRIPTOR		(0xa000 | UR_GET_DESCRIPTOR)
+#define UCR_GET_HUB_STATUS		(0xa000 | UR_GET_STATUS)
+#define UCR_GET_PORT_STATUS		(0xa300 | UR_GET_STATUS)
+#define UCR_SET_HUB_FEATURE		(0x2000 | UR_SET_FEATURE)
+#define UCR_SET_PORT_FEATURE		(0x2300 | UR_SET_FEATURE)
+#define UCR_SET_AND_TEST_PORT_FEATURE	(0xa300 | UR_SET_AND_TEST_FEATURE)
+
+#ifdef _MSC_VER
+#include <pshpack1.h>
+#endif
+
+typedef struct {
+	uByte		bLength;
+	uByte		bDescriptorType;
+	uByte		bDescriptorSubtype;
+} UPACKED usb_descriptor_t;
+
+typedef struct {
+	uByte		bLength;
+	uByte		bDescriptorType;
+} UPACKED usb_descriptor_header_t;
+
+typedef struct {
+	uByte		bLength;
+	uByte		bDescriptorType;
+	uWord		bcdUSB;
+#define UD_USB_2_0		0x0200
+#define UD_IS_USB2(d) (UGETW((d)->bcdUSB) >= UD_USB_2_0)
+	uByte		bDeviceClass;
+	uByte		bDeviceSubClass;
+	uByte		bDeviceProtocol;
+	uByte		bMaxPacketSize;
+	/* The fields below are not part of the initial descriptor. */
+	uWord		idVendor;
+	uWord		idProduct;
+	uWord		bcdDevice;
+	uByte		iManufacturer;
+	uByte		iProduct;
+	uByte		iSerialNumber;
+	uByte		bNumConfigurations;
+} UPACKED usb_device_descriptor_t;
+#define USB_DEVICE_DESCRIPTOR_SIZE 18
+
+typedef struct {
+	uByte		bLength;
+	uByte		bDescriptorType;
+	uWord		wTotalLength;
+	uByte		bNumInterface;
+	uByte		bConfigurationValue;
+	uByte		iConfiguration;
+#define UC_ATT_ONE		(1 << 7)	/* must be set */
+#define UC_ATT_SELFPOWER	(1 << 6)	/* self powered */
+#define UC_ATT_WAKEUP		(1 << 5)	/* can wakeup */
+#define UC_ATT_BATTERY		(1 << 4)	/* battery powered */
+	uByte		bmAttributes;
+#define UC_BUS_POWERED		0x80
+#define UC_SELF_POWERED		0x40
+#define UC_REMOTE_WAKEUP	0x20
+	uByte		bMaxPower; /* max current in 2 mA units */
+#define UC_POWER_FACTOR 2
+} UPACKED usb_config_descriptor_t;
+#define USB_CONFIG_DESCRIPTOR_SIZE 9
+
+typedef struct {
+	uByte		bLength;
+	uByte		bDescriptorType;
+	uByte		bInterfaceNumber;
+	uByte		bAlternateSetting;
+	uByte		bNumEndpoints;
+	uByte		bInterfaceClass;
+	uByte		bInterfaceSubClass;
+	uByte		bInterfaceProtocol;
+	uByte		iInterface;
+} UPACKED usb_interface_descriptor_t;
+#define USB_INTERFACE_DESCRIPTOR_SIZE 9
+
+typedef struct {
+	uByte		bLength;
+	uByte		bDescriptorType;
+	uByte		bEndpointAddress;
+#define UE_GET_DIR(a)	((a) & 0x80)
+#define UE_SET_DIR(a,d)	((a) | (((d)&1) << 7))
+#define UE_DIR_IN	0x80
+#define UE_DIR_OUT	0x00
+#define UE_ADDR		0x0f
+#define UE_GET_ADDR(a)	((a) & UE_ADDR)
+	uByte		bmAttributes;
+#define UE_XFERTYPE	0x03
+#define  UE_CONTROL	0x00
+#define  UE_ISOCHRONOUS	0x01
+#define  UE_BULK	0x02
+#define  UE_INTERRUPT	0x03
+#define UE_GET_XFERTYPE(a)	((a) & UE_XFERTYPE)
+#define UE_ISO_TYPE	0x0c
+#define  UE_ISO_ASYNC	0x04
+#define  UE_ISO_ADAPT	0x08
+#define  UE_ISO_SYNC	0x0c
+#define UE_GET_ISO_TYPE(a)	((a) & UE_ISO_TYPE)
+	uWord		wMaxPacketSize;
+	uByte		bInterval;
+} UPACKED usb_endpoint_descriptor_t;
+#define USB_ENDPOINT_DESCRIPTOR_SIZE 7
+
+typedef struct ss_endpoint_companion_descriptor {
+	uByte bLength;
+	uByte bDescriptorType;
+	uByte bMaxBurst;
+#define USSE_GET_MAX_STREAMS(a)		((a) & 0x1f)
+#define USSE_SET_MAX_STREAMS(a, b)	((a) | ((b) & 0x1f))
+#define USSE_GET_MAX_PACKET_NUM(a)	((a) & 0x03)
+#define USSE_SET_MAX_PACKET_NUM(a, b)	((a) | ((b) & 0x03))
+	uByte bmAttributes;
+	uWord wBytesPerInterval;
+} UPACKED ss_endpoint_companion_descriptor_t;
+#define USB_SS_ENDPOINT_COMPANION_DESCRIPTOR_SIZE 6
+
+typedef struct {
+	uByte		bLength;
+	uByte		bDescriptorType;
+	uWord		bString[127];
+} UPACKED usb_string_descriptor_t;
+#define USB_MAX_STRING_LEN 128
+#define USB_LANGUAGE_TABLE 0	/* # of the string language id table */
+
+/* Hub specific request */
+#define UR_GET_BUS_STATE	0x02
+#define UR_CLEAR_TT_BUFFER	0x08
+#define UR_RESET_TT		0x09
+#define UR_GET_TT_STATE		0x0a
+#define UR_STOP_TT		0x0b
+
+/* Hub features */
+#define UHF_C_HUB_LOCAL_POWER	0
+#define UHF_C_HUB_OVER_CURRENT	1
+#define UHF_PORT_CONNECTION	0
+#define UHF_PORT_ENABLE		1
+#define UHF_PORT_SUSPEND	2
+#define UHF_PORT_OVER_CURRENT	3
+#define UHF_PORT_RESET		4
+#define UHF_PORT_L1		5
+#define UHF_PORT_POWER		8
+#define UHF_PORT_LOW_SPEED	9
+#define UHF_PORT_HIGH_SPEED	10
+#define UHF_C_PORT_CONNECTION	16
+#define UHF_C_PORT_ENABLE	17
+#define UHF_C_PORT_SUSPEND	18
+#define UHF_C_PORT_OVER_CURRENT	19
+#define UHF_C_PORT_RESET	20
+#define UHF_C_PORT_L1		23
+#define UHF_PORT_TEST		21
+#define UHF_PORT_INDICATOR	22
+
+typedef struct {
+	uByte		bDescLength;
+	uByte		bDescriptorType;
+	uByte		bNbrPorts;
+	uWord		wHubCharacteristics;
+#define UHD_PWR			0x0003
+#define  UHD_PWR_GANGED		0x0000
+#define  UHD_PWR_INDIVIDUAL	0x0001
+#define  UHD_PWR_NO_SWITCH	0x0002
+#define UHD_COMPOUND		0x0004
+#define UHD_OC			0x0018
+#define  UHD_OC_GLOBAL		0x0000
+#define  UHD_OC_INDIVIDUAL	0x0008
+#define  UHD_OC_NONE		0x0010
+#define UHD_TT_THINK		0x0060
+#define  UHD_TT_THINK_8		0x0000
+#define  UHD_TT_THINK_16	0x0020
+#define  UHD_TT_THINK_24	0x0040
+#define  UHD_TT_THINK_32	0x0060
+#define UHD_PORT_IND		0x0080
+	uByte		bPwrOn2PwrGood;	/* delay in 2 ms units */
+#define UHD_PWRON_FACTOR 2
+	uByte		bHubContrCurrent;
+	uByte		DeviceRemovable[32]; /* max 255 ports */
+#define UHD_NOT_REMOV(desc, i) \
+    (((desc)->DeviceRemovable[(i)/8] >> ((i) % 8)) & 1)
+	/* deprecated */ uByte		PortPowerCtrlMask[1];
+} UPACKED usb_hub_descriptor_t;
+#define USB_HUB_DESCRIPTOR_SIZE 9 /* includes deprecated PortPowerCtrlMask */
+
+typedef struct {
+	uByte		bLength;
+	uByte		bDescriptorType;
+	uWord		bcdUSB;
+	uByte		bDeviceClass;
+	uByte		bDeviceSubClass;
+	uByte		bDeviceProtocol;
+	uByte		bMaxPacketSize0;
+	uByte		bNumConfigurations;
+	uByte		bReserved;
+} UPACKED usb_device_qualifier_t;
+#define USB_DEVICE_QUALIFIER_SIZE 10
+
+typedef struct {
+	uByte		bLength;
+	uByte		bDescriptorType;
+	uByte		bmAttributes;
+#define UOTG_SRP	0x01
+#define UOTG_HNP	0x02
+} UPACKED usb_otg_descriptor_t;
+
+/* OTG feature selectors */
+#define UOTG_B_HNP_ENABLE	3
+#define UOTG_A_HNP_SUPPORT	4
+#define UOTG_A_ALT_HNP_SUPPORT	5
+
+typedef struct {
+	uWord		wStatus;
+/* Device status flags */
+#define UDS_SELF_POWERED		0x0001
+#define UDS_REMOTE_WAKEUP		0x0002
+/* Endpoint status flags */
+#define UES_HALT			0x0001
+} UPACKED usb_status_t;
+
+typedef struct {
+	uWord		wHubStatus;
+#define UHS_LOCAL_POWER			0x0001
+#define UHS_OVER_CURRENT		0x0002
+	uWord		wHubChange;
+} UPACKED usb_hub_status_t;
+
+typedef struct {
+	uWord		wPortStatus;
+#define UPS_CURRENT_CONNECT_STATUS	0x0001
+#define UPS_PORT_ENABLED		0x0002
+#define UPS_SUSPEND			0x0004
+#define UPS_OVERCURRENT_INDICATOR	0x0008
+#define UPS_RESET			0x0010
+#define UPS_PORT_POWER			0x0100
+#define UPS_LOW_SPEED			0x0200
+#define UPS_HIGH_SPEED			0x0400
+#define UPS_PORT_TEST			0x0800
+#define UPS_PORT_INDICATOR		0x1000
+	uWord		wPortChange;
+#define UPS_C_CONNECT_STATUS		0x0001
+#define UPS_C_PORT_ENABLED		0x0002
+#define UPS_C_SUSPEND			0x0004
+#define UPS_C_OVERCURRENT_INDICATOR	0x0008
+#define UPS_C_PORT_RESET		0x0010
+} UPACKED usb_port_status_t;
+
+#ifdef _MSC_VER
+#include <poppack.h>
+#endif
+
+/* Device class codes */
+#define UDCLASS_IN_INTERFACE	0x00
+#define UDCLASS_COMM		0x02
+#define UDCLASS_HUB		0x09
+#define  UDSUBCLASS_HUB		0x00
+#define  UDPROTO_FSHUB		0x00
+#define  UDPROTO_HSHUBSTT	0x01
+#define  UDPROTO_HSHUBMTT	0x02
+#define UDCLASS_DIAGNOSTIC	0xdc
+#define UDCLASS_WIRELESS	0xe0
+#define  UDSUBCLASS_RF		0x01
+#define   UDPROTO_BLUETOOTH	0x01
+#define UDCLASS_VENDOR		0xff
+
+/* Interface class codes */
+#define UICLASS_UNSPEC		0x00
+
+#define UICLASS_AUDIO		0x01
+#define  UISUBCLASS_AUDIOCONTROL	1
+#define  UISUBCLASS_AUDIOSTREAM		2
+#define  UISUBCLASS_MIDISTREAM		3
+
+#define UICLASS_CDC		0x02 /* communication */
+#define  UISUBCLASS_DIRECT_LINE_CONTROL_MODEL	1
+#define  UISUBCLASS_ABSTRACT_CONTROL_MODEL	2
+#define  UISUBCLASS_TELEPHONE_CONTROL_MODEL	3
+#define  UISUBCLASS_MULTICHANNEL_CONTROL_MODEL	4
+#define  UISUBCLASS_CAPI_CONTROLMODEL		5
+#define  UISUBCLASS_ETHERNET_NETWORKING_CONTROL_MODEL 6
+#define  UISUBCLASS_ATM_NETWORKING_CONTROL_MODEL 7
+#define   UIPROTO_CDC_AT			1
+
+#define UICLASS_HID		0x03
+#define  UISUBCLASS_BOOT	1
+#define  UIPROTO_BOOT_KEYBOARD	1
+
+#define UICLASS_PHYSICAL	0x05
+
+#define UICLASS_IMAGE		0x06
+
+#define UICLASS_PRINTER		0x07
+#define  UISUBCLASS_PRINTER	1
+#define  UIPROTO_PRINTER_UNI	1
+#define  UIPROTO_PRINTER_BI	2
+#define  UIPROTO_PRINTER_1284	3
+
+#define UICLASS_MASS		0x08
+#define  UISUBCLASS_RBC		1
+#define  UISUBCLASS_SFF8020I	2
+#define  UISUBCLASS_QIC157	3
+#define  UISUBCLASS_UFI		4
+#define  UISUBCLASS_SFF8070I	5
+#define  UISUBCLASS_SCSI	6
+#define  UIPROTO_MASS_CBI_I	0
+#define  UIPROTO_MASS_CBI	1
+#define  UIPROTO_MASS_BBB_OLD	2	/* Not in the spec anymore */
+#define  UIPROTO_MASS_BBB	80	/* 'P' for the Iomega Zip drive */
+
+#define UICLASS_HUB		0x09
+#define  UISUBCLASS_HUB		0
+#define  UIPROTO_FSHUB		0
+#define  UIPROTO_HSHUBSTT	0 /* Yes, same as previous */
+#define  UIPROTO_HSHUBMTT	1
+
+#define UICLASS_CDC_DATA	0x0a
+#define  UISUBCLASS_DATA		0
+#define   UIPROTO_DATA_ISDNBRI		0x30    /* Physical iface */
+#define   UIPROTO_DATA_HDLC		0x31    /* HDLC */
+#define   UIPROTO_DATA_TRANSPARENT	0x32    /* Transparent */
+#define   UIPROTO_DATA_Q921M		0x50    /* Management for Q921 */
+#define   UIPROTO_DATA_Q921		0x51    /* Data for Q921 */
+#define   UIPROTO_DATA_Q921TM		0x52    /* TEI multiplexer for Q921 */
+#define   UIPROTO_DATA_V42BIS		0x90    /* Data compression */
+#define   UIPROTO_DATA_Q931		0x91    /* Euro-ISDN */
+#define   UIPROTO_DATA_V120		0x92    /* V.24 rate adaption */
+#define   UIPROTO_DATA_CAPI		0x93    /* CAPI 2.0 commands */
+#define   UIPROTO_DATA_HOST_BASED	0xfd    /* Host based driver */
+#define   UIPROTO_DATA_PUF		0xfe    /* see Prot. Unit Func. Desc.*/
+#define   UIPROTO_DATA_VENDOR		0xff    /* Vendor specific */
+
+#define UICLASS_SMARTCARD	0x0b
+
+/*#define UICLASS_FIRM_UPD	0x0c*/
+
+#define UICLASS_SECURITY	0x0d
+
+#define UICLASS_DIAGNOSTIC	0xdc
+
+#define UICLASS_WIRELESS	0xe0
+#define  UISUBCLASS_RF			0x01
+#define   UIPROTO_BLUETOOTH		0x01
+
+#define UICLASS_APPL_SPEC	0xfe
+#define  UISUBCLASS_FIRMWARE_DOWNLOAD	1
+#define  UISUBCLASS_IRDA		2
+#define  UIPROTO_IRDA			0
+
+#define UICLASS_VENDOR		0xff
+
+#define USB_HUB_MAX_DEPTH 5
+
+/*
+ * Minimum time a device needs to be powered down to go through
+ * a power cycle.  XXX Are these time in the spec?
+ */
+#define USB_POWER_DOWN_TIME	200 /* ms */
+#define USB_PORT_POWER_DOWN_TIME	100 /* ms */
+
+#if 0
+/* These are the values from the spec. */
+#define USB_PORT_RESET_DELAY	10  /* ms */
+#define USB_PORT_ROOT_RESET_DELAY 50  /* ms */
+#define USB_PORT_RESET_RECOVERY	10  /* ms */
+#define USB_PORT_POWERUP_DELAY	100 /* ms */
+#define USB_SET_ADDRESS_SETTLE	2   /* ms */
+#define USB_RESUME_DELAY	(20*5)  /* ms */
+#define USB_RESUME_WAIT		10  /* ms */
+#define USB_RESUME_RECOVERY	10  /* ms */
+#define USB_EXTRA_POWER_UP_TIME	0   /* ms */
+#else
+/* Allow for marginal (i.e. non-conforming) devices. */
+#define USB_PORT_RESET_DELAY	50  /* ms */
+#define USB_PORT_ROOT_RESET_DELAY 250  /* ms */
+#define USB_PORT_RESET_RECOVERY	250  /* ms */
+#define USB_PORT_POWERUP_DELAY	300 /* ms */
+#define USB_SET_ADDRESS_SETTLE	10  /* ms */
+#define USB_RESUME_DELAY	(50*5)  /* ms */
+#define USB_RESUME_WAIT		50  /* ms */
+#define USB_RESUME_RECOVERY	50  /* ms */
+#define USB_EXTRA_POWER_UP_TIME	20  /* ms */
+#endif
+
+#define USB_MIN_POWER		100 /* mA */
+#define USB_MAX_POWER		500 /* mA */
+
+#define USB_BUS_RESET_DELAY	100 /* ms XXX?*/
+
+#define USB_UNCONFIG_NO 0
+#define USB_UNCONFIG_INDEX (-1)
+
+/*** ioctl() related stuff ***/
+
+struct usb_ctl_request {
+	int	ucr_addr;
+	usb_device_request_t ucr_request;
+	void	*ucr_data;
+	int	ucr_flags;
+#define USBD_SHORT_XFER_OK	0x04	/* allow short reads */
+	int	ucr_actlen;		/* actual length transferred */
+};
+
+struct usb_alt_interface {
+	int	uai_config_index;
+	int	uai_interface_index;
+	int	uai_alt_no;
+};
+
+#define USB_CURRENT_CONFIG_INDEX (-1)
+#define USB_CURRENT_ALT_INDEX (-1)
+
+struct usb_config_desc {
+	int	ucd_config_index;
+	usb_config_descriptor_t ucd_desc;
+};
+
+struct usb_interface_desc {
+	int	uid_config_index;
+	int	uid_interface_index;
+	int	uid_alt_index;
+	usb_interface_descriptor_t uid_desc;
+};
+
+struct usb_endpoint_desc {
+	int	ued_config_index;
+	int	ued_interface_index;
+	int	ued_alt_index;
+	int	ued_endpoint_index;
+	usb_endpoint_descriptor_t ued_desc;
+};
+
+struct usb_full_desc {
+	int	ufd_config_index;
+	u_int	ufd_size;
+	u_char	*ufd_data;
+};
+
+struct usb_string_desc {
+	int	usd_string_index;
+	int	usd_language_id;
+	usb_string_descriptor_t usd_desc;
+};
+
+struct usb_ctl_report_desc {
+	int	ucrd_size;
+	u_char	ucrd_data[1024];	/* filled data size will vary */
+};
+
+typedef struct { u_int32_t cookie; } usb_event_cookie_t;
+
+#define USB_MAX_DEVNAMES 4
+#define USB_MAX_DEVNAMELEN 16
+struct usb_device_info {
+	u_int8_t	udi_bus;
+	u_int8_t	udi_addr;	/* device address */
+	usb_event_cookie_t udi_cookie;
+	char		udi_product[USB_MAX_STRING_LEN];
+	char		udi_vendor[USB_MAX_STRING_LEN];
+	char		udi_release[8];
+	u_int16_t	udi_productNo;
+	u_int16_t	udi_vendorNo;
+	u_int16_t	udi_releaseNo;
+	u_int8_t	udi_class;
+	u_int8_t	udi_subclass;
+	u_int8_t	udi_protocol;
+	u_int8_t	udi_config;
+	u_int8_t	udi_speed;
+#define USB_SPEED_UNKNOWN	0
+#define USB_SPEED_LOW		1
+#define USB_SPEED_FULL		2
+#define USB_SPEED_HIGH		3
+#define USB_SPEED_VARIABLE	4
+#define USB_SPEED_SUPER		5
+	int		udi_power;	/* power consumption in mA, 0 if selfpowered */
+	int		udi_nports;
+	char		udi_devnames[USB_MAX_DEVNAMES][USB_MAX_DEVNAMELEN];
+	u_int8_t	udi_ports[16];/* hub only: addresses of devices on ports */
+#define USB_PORT_ENABLED 0xff
+#define USB_PORT_SUSPENDED 0xfe
+#define USB_PORT_POWERED 0xfd
+#define USB_PORT_DISABLED 0xfc
+};
+
+struct usb_ctl_report {
+	int	ucr_report;
+	u_char	ucr_data[1024];	/* filled data size will vary */
+};
+
+struct usb_device_stats {
+	u_long	uds_requests[4];	/* indexed by transfer type UE_* */
+};
+
+#define WUSB_MIN_IE			0x80
+#define WUSB_WCTA_IE			0x80
+#define WUSB_WCONNECTACK_IE		0x81
+#define WUSB_WHOSTINFO_IE		0x82
+#define  WUHI_GET_CA(_bmAttributes_) ((_bmAttributes_) & 0x3)
+#define   WUHI_CA_RECONN		0x00
+#define   WUHI_CA_LIMITED		0x01
+#define   WUHI_CA_ALL			0x03
+#define  WUHI_GET_MLSI(_bmAttributes_) (((_bmAttributes_) & 0x38) >> 3)
+#define WUSB_WCHCHANGEANNOUNCE_IE	0x83
+#define WUSB_WDEV_DISCONNECT_IE		0x84
+#define WUSB_WHOST_DISCONNECT_IE	0x85
+#define WUSB_WRELEASE_CHANNEL_IE	0x86
+#define WUSB_WWORK_IE			0x87
+#define WUSB_WCHANNEL_STOP_IE		0x88
+#define WUSB_WDEV_KEEPALIVE_IE		0x89
+#define WUSB_WISOCH_DISCARD_IE		0x8A
+#define WUSB_WRESETDEVICE_IE		0x8B
+#define WUSB_WXMIT_PACKET_ADJUST_IE	0x8C
+#define WUSB_MAX_IE			0x8C
+
+/* Device Notification Types */
+
+#define WUSB_DN_MIN			0x01
+#define WUSB_DN_CONNECT			0x01
+# define WUSB_DA_OLDCONN	0x00
+# define WUSB_DA_NEWCONN	0x01
+# define WUSB_DA_SELF_BEACON	0x02
+# define WUSB_DA_DIR_BEACON	0x04
+# define WUSB_DA_NO_BEACON	0x06
+#define WUSB_DN_DISCONNECT		0x02
+#define WUSB_DN_EPRDY			0x03
+#define WUSB_DN_MASAVAILCHANGED		0x04
+#define WUSB_DN_REMOTEWAKEUP		0x05
+#define WUSB_DN_SLEEP			0x06
+#define WUSB_DN_ALIVE			0x07
+#define WUSB_DN_MAX			0x07
+
+#ifdef _MSC_VER
+#include <pshpack1.h>
+#endif
+
+/* WUSB Handshake Data.  Used during the SET/GET HANDSHAKE requests */
+typedef struct wusb_hndshk_data {
+	uByte bMessageNumber;
+	uByte bStatus;
+	uByte tTKID[3];
+	uByte bReserved;
+	uByte CDID[16];
+	uByte Nonce[16];
+	uByte MIC[8];
+} UPACKED wusb_hndshk_data_t;
+#define WUSB_HANDSHAKE_LEN_FOR_MIC	38
+
+/* WUSB Connection Context */
+typedef struct wusb_conn_context {
+	uByte CHID [16];
+	uByte CDID [16];
+	uByte CK [16];
+} UPACKED wusb_conn_context_t;
+
+/* WUSB Security Descriptor */
+typedef struct wusb_security_desc {
+	uByte bLength;
+	uByte bDescriptorType;
+	uWord wTotalLength;
+	uByte bNumEncryptionTypes;
+} UPACKED wusb_security_desc_t;
+
+/* WUSB Encryption Type Descriptor */
+typedef struct wusb_encrypt_type_desc {
+	uByte bLength;
+	uByte bDescriptorType;
+
+	uByte bEncryptionType;
+#define WUETD_UNSECURE		0
+#define WUETD_WIRED		1
+#define WUETD_CCM_1		2
+#define WUETD_RSA_1		3
+
+	uByte bEncryptionValue;
+	uByte bAuthKeyIndex;
+} UPACKED wusb_encrypt_type_desc_t;
+
+/* WUSB Key Descriptor */
+typedef struct wusb_key_desc {
+	uByte bLength;
+	uByte bDescriptorType;
+	uByte tTKID[3];
+	uByte bReserved;
+	uByte KeyData[1];	/* variable length */
+} UPACKED wusb_key_desc_t;
+
+/* WUSB BOS Descriptor (Binary device Object Store) */
+typedef struct wusb_bos_desc {
+	uByte bLength;
+	uByte bDescriptorType;
+	uWord wTotalLength;
+	uByte bNumDeviceCaps;
+} UPACKED wusb_bos_desc_t;
+
+#define USB_DEVICE_CAPABILITY_20_EXTENSION	0x02
+typedef struct usb_dev_cap_20_ext_desc {
+	uByte bLength;
+	uByte bDescriptorType;
+	uByte bDevCapabilityType;
+#define USB_20_EXT_LPM				0x02
+	uDWord bmAttributes;
+} UPACKED usb_dev_cap_20_ext_desc_t;
+
+#define USB_DEVICE_CAPABILITY_SS_USB		0x03
+typedef struct usb_dev_cap_ss_usb {
+	uByte bLength;
+	uByte bDescriptorType;
+	uByte bDevCapabilityType;
+#define USB_DC_SS_USB_LTM_CAPABLE		0x02
+	uByte bmAttributes;
+#define USB_DC_SS_USB_SPEED_SUPPORT_LOW		0x01
+#define USB_DC_SS_USB_SPEED_SUPPORT_FULL	0x02
+#define USB_DC_SS_USB_SPEED_SUPPORT_HIGH	0x04
+#define USB_DC_SS_USB_SPEED_SUPPORT_SS		0x08
+	uWord wSpeedsSupported;
+	uByte bFunctionalitySupport;
+	uByte bU1DevExitLat;
+	uWord wU2DevExitLat;
+} UPACKED usb_dev_cap_ss_usb_t;
+
+#define USB_DEVICE_CAPABILITY_CONTAINER_ID	0x04
+typedef struct usb_dev_cap_container_id {
+	uByte bLength;
+	uByte bDescriptorType;
+	uByte bDevCapabilityType;
+	uByte bReserved;
+	uByte containerID[16];
+} UPACKED usb_dev_cap_container_id_t;
+
+/* Device Capability Type Codes */
+#define WUSB_DEVICE_CAPABILITY_WIRELESS_USB 0x01
+
+/* Device Capability Descriptor */
+typedef struct wusb_dev_cap_desc {
+	uByte bLength;
+	uByte bDescriptorType;
+	uByte bDevCapabilityType;
+	uByte caps[1];	/* Variable length */
+} UPACKED wusb_dev_cap_desc_t;
+
+/* Device Capability Descriptor */
+typedef struct wusb_dev_cap_uwb_desc {
+	uByte bLength;
+	uByte bDescriptorType;
+	uByte bDevCapabilityType;
+	uByte bmAttributes;
+	uWord wPHYRates;	/* Bitmap */
+	uByte bmTFITXPowerInfo;
+	uByte bmFFITXPowerInfo;
+	uWord bmBandGroup;
+	uByte bReserved;
+} UPACKED wusb_dev_cap_uwb_desc_t;
+
+/* Wireless USB Endpoint Companion Descriptor */
+typedef struct wusb_endpoint_companion_desc {
+	uByte bLength;
+	uByte bDescriptorType;
+	uByte bMaxBurst;
+	uByte bMaxSequence;
+	uWord wMaxStreamDelay;
+	uWord wOverTheAirPacketSize;
+	uByte bOverTheAirInterval;
+	uByte bmCompAttributes;
+} UPACKED wusb_endpoint_companion_desc_t;
+
+/* Wireless USB Numeric Association M1 Data Structure */
+typedef struct wusb_m1_data {
+	uByte version;
+	uWord langId;
+	uByte deviceFriendlyNameLength;
+	uByte sha_256_m3[32];
+	uByte deviceFriendlyName[256];
+} UPACKED wusb_m1_data_t;
+
+typedef struct wusb_m2_data {
+	uByte version;
+	uWord langId;
+	uByte hostFriendlyNameLength;
+	uByte pkh[384];
+	uByte hostFriendlyName[256];
+} UPACKED wusb_m2_data_t;
+
+typedef struct wusb_m3_data {
+	uByte pkd[384];
+	uByte nd;
+} UPACKED wusb_m3_data_t;
+
+typedef struct wusb_m4_data {
+	uDWord _attributeTypeIdAndLength_1;
+	uWord  associationTypeId;
+
+	uDWord _attributeTypeIdAndLength_2;
+	uWord  associationSubTypeId;
+
+	uDWord _attributeTypeIdAndLength_3;
+	uDWord length;
+
+	uDWord _attributeTypeIdAndLength_4;
+	uDWord associationStatus;
+
+	uDWord _attributeTypeIdAndLength_5;
+	uByte  chid[16];
+
+	uDWord _attributeTypeIdAndLength_6;
+	uByte  cdid[16];
+
+	uDWord _attributeTypeIdAndLength_7;
+	uByte  bandGroups[2];
+} UPACKED wusb_m4_data_t;
+
+#ifdef _MSC_VER
+#include <poppack.h>
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _USB_H_ */
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc/Makefile linux-3.0.82x/drivers/usb/gadget/dwc/Makefile
--- linux-3.0.82/drivers/usb/gadget/dwc/Makefile	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/dwc/Makefile	2017-09-23 03:42:50.254674343 +0800
@@ -0,0 +1,2 @@
+obj-y += dwc_common_port/
+obj-y += driver/
diff -uNra linux-3.0.82/drivers/usb/gadget/dwc.tar.gz linux-3.0.82x/drivers/usb/gadget/dwc.tar.gz
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/drivers/usb/gadget/file_storage.c linux-3.0.82x/drivers/usb/gadget/file_storage.c
--- linux-3.0.82/drivers/usb/gadget/file_storage.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/file_storage.c	2017-09-23 03:42:50.262674317 +0800
@@ -256,6 +256,9 @@
 
 #include "gadget_chips.h"
 
+#ifdef CONFIG_USB_DWC_OTG_LPM
+#include <linux/dma-mapping.h>
+#endif
 
 
 /*
@@ -574,6 +577,42 @@
 	.bMaxPower =		CONFIG_USB_GADGET_VBUS_DRAW / 2,
 };
 
+#ifdef CONFIG_USB_DWC_OTG_LPM
+/* WUSB BOS Descriptor (Binary Object Store) */
+/* USB_DT_BOS:  group of wireless capabilities */
+struct bos_desc {
+	__u8  bLength;
+	__u8  bDescriptorType;
+
+	__le16 wTotalLength;
+	__u8  bNumDeviceCaps;
+} __attribute__ ((__packed__));
+
+struct usb20_ext_cap_desc {
+            __u8 bLength;
+            __u8 bDescriptorType;
+            __u8 bDevCapabilityType;
+            __le32 bmAttributes;
+} __attribute__ ((__packed__));
+
+/** The BOS Descriptor */
+#define USB_CAP_20_EXT		0x02
+#define USB_20_EXT_LPM		0x02
+
+static struct usb20_ext_cap_desc cap_lpm = {
+            .bLength = sizeof(struct usb20_ext_cap_desc),
+            .bDescriptorType = USB_DT_DEVICE_CAPABILITY,
+            .bDevCapabilityType = USB_CAP_20_EXT,
+            .bmAttributes = cpu_to_le32(USB_20_EXT_LPM),
+};
+
+static struct bos_desc bos = {
+            .bLength = sizeof(struct bos_desc),
+            .bDescriptorType = USB_DT_BOS,
+            .wTotalLength = cpu_to_le16(sizeof(struct bos_desc) + sizeof(cap_lpm)),
+            .bNumDeviceCaps = 1,
+};
+#endif
 
 static struct usb_qualifier_descriptor
 dev_qualifier = {
@@ -929,6 +968,18 @@
 
 		case USB_DT_DEVICE:
 			VDBG(fsg, "get device descriptor\n");
+
+#ifdef CONFIG_USB_DWC_OTG_LPM
+			/* Set the bcdUSB to 0201H to indicate support
+			 * for the BOS Descriptor. */
+			if (usb_gadget_test_lpm_support(fsg->gadget)) {
+				VDBG(fsg, "set bcdUSB to 0201h\n");
+				device_desc.bcdUSB = 0x201;
+			} else {
+				VDBG(fsg, "set bcdUSB to 0200h\n");
+                                device_desc.bcdUSB = 0x200;
+			}
+#endif
 			value = sizeof device_desc;
 			memcpy(req->buf, &device_desc, value);
 			break;
@@ -936,6 +987,17 @@
 			VDBG(fsg, "get device qualifier\n");
 			if (!gadget_is_dualspeed(fsg->gadget))
 				break;
+#ifdef CONFIG_USB_DWC_OTG_LPM
+			/* Set the bcdUSB to 0201H to indicate support
+			 * for the BOS Descriptor. */
+			if (usb_gadget_test_lpm_support(fsg->gadget)) {
+				VDBG(fsg, "set bcdUSB to 0201h\n");
+				dev_qualifier.bcdUSB = 0x201;
+			} else {
+				VDBG(fsg, "set bcdUSB to 0200h\n");
+                                dev_qualifier.bcdUSB = 0x200;
+			}
+#endif
 			value = sizeof dev_qualifier;
 			memcpy(req->buf, &dev_qualifier, value);
 			break;
@@ -961,6 +1023,21 @@
 			value = usb_gadget_get_string(&fsg_stringtab,
 					w_value & 0xff, req->buf);
 			break;
+
+#ifdef CONFIG_USB_DWC_OTG_LPM
+		case USB_DT_BOS:
+			if (usb_gadget_test_lpm_support(fsg->gadget)) {
+			        VDBG(fsg, "LPM support enabled in DWC UDC PCD\n");
+                                cap_lpm.bmAttributes |= USB_20_EXT_LPM;
+                        	__u8 *buf = req->buf;
+				VDBG(fsg, "get bos descriptor\n");
+				memcpy(buf, &bos, sizeof bos);
+				buf += sizeof bos;
+				memcpy(buf, &cap_lpm, sizeof cap_lpm);
+				value = sizeof bos + sizeof cap_lpm;
+				break;
+			}
+#endif
 		}
 		break;
 
@@ -3170,7 +3247,11 @@
 
 	/* Free the request and buffer for endpoint 0 */
 	if (req) {
+#ifdef CONFIG_USB_DWC_OTG_LPM
+		dma_free_coherent(NULL, EP0_BUFSIZE, req->buf, req->dma);
+#else
 		kfree(req->buf);
+#endif
 		usb_ep_free_request(fsg->ep0, req);
 	}
 
@@ -3200,7 +3281,13 @@
 		gcnum = usb_gadget_controller_number(fsg->gadget);
 		if (gcnum >= 0)
 			mod_data.release = 0x0300 + gcnum;
-		else {
+		else if (gadget_is_dwc_otg(fsg->gadget)) {
+			mod_data.release = __constant_cpu_to_le16 (0x0200);
+			mod_data.vendor  = __constant_cpu_to_le16 (0x053f);
+			if (mod_data.product == FSG_PRODUCT_ID) {
+				mod_data.product  = __constant_cpu_to_le16 (0x0000);
+			}
+		} else {
 			WARNING(fsg, "controller '%s' not recognized\n",
 				fsg->gadget->name);
 			mod_data.release = 0x0399;
@@ -3447,11 +3534,24 @@
 
 	rc = -ENOMEM;
 
+#ifdef CONFIG_USB_DWC_OTG_LPM
+	/* When LPM is enabled, Inform the host that the remote wake
+	 * up capability is supported. */
+	if (usb_gadget_test_lpm_support(fsg->gadget)) {
+		config_desc.bmAttributes |= USB_CONFIG_ATT_WAKEUP;
+	}
+#endif
+
 	/* Allocate the request and buffer for endpoint 0 */
 	fsg->ep0req = req = usb_ep_alloc_request(fsg->ep0, GFP_KERNEL);
 	if (!req)
 		goto out;
+
+#ifdef CONFIG_USB_DWC_OTG_LPM
+	req->buf = dma_alloc_coherent(NULL, EP0_BUFSIZE, &req->dma, GFP_KERNEL);
+#else
 	req->buf = kmalloc(EP0_BUFSIZE, GFP_KERNEL);
+#endif
 	if (!req->buf)
 		goto out;
 	req->complete = ep0_complete;
@@ -3463,7 +3563,11 @@
 		/* Allocate for the bulk-in endpoint.  We assume that
 		 * the buffer will also work with the bulk-out (and
 		 * interrupt-in) endpoint. */
+
+#ifdef CONFIG_USB_DWC_OTG_LPM
 		bh->buf = kmalloc(mod_data.buflen, GFP_KERNEL);
+		bh->buf = UNCAC_ADDR((unsigned int)bh->buf);
+#endif
 		if (!bh->buf)
 			goto out;
 		bh->next = bh + 1;
diff -uNra linux-3.0.82/drivers/usb/gadget/gadget_chips.h linux-3.0.82x/drivers/usb/gadget/gadget_chips.h
--- linux-3.0.82/drivers/usb/gadget/gadget_chips.h	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/gadget_chips.h	2017-09-23 03:42:50.262674317 +0800
@@ -15,6 +15,12 @@
 #ifndef __GADGET_CHIPS_H
 #define __GADGET_CHIPS_H
 
+#ifdef CONFIG_USB_GADGET_SNPS_DWC_OTG
+#define	gadget_is_dwc_otg(g)    !strcmp("dwc_otg_pcd", (g)->name)
+#else
+#define	gadget_is_dwc_otg(g)    0
+#endif
+
 #ifdef CONFIG_USB_GADGET_NET2280
 #define	gadget_is_net2280(g)	!strcmp("net2280", (g)->name)
 #else
diff -uNra linux-3.0.82/drivers/usb/gadget/Kconfig linux-3.0.82x/drivers/usb/gadget/Kconfig
--- linux-3.0.82/drivers/usb/gadget/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/Kconfig	2017-09-23 03:42:50.262674317 +0800
@@ -122,6 +122,15 @@
 # Integrated controllers
 #
 
+config USB_GADGET_SNPS_DWC_OTG
+	boolean "Synopsys Driver for DWC_otg Controller"
+	depends on USB && EXPERIMENTAL
+	select USB_OTG
+	select USB_GADGET_DUALSPEED
+	select USB_GADGET_SELECTED
+	help
+	    Selects the Synopsys Driver for the DWC_otg Controller.
+
 config USB_GADGET_AT91
 	boolean "Atmel AT91 USB Device Port"
 	depends on ARCH_AT91 && !ARCH_AT91SAM9RL && !ARCH_AT91CAP9 && !ARCH_AT91SAM9G45
@@ -638,6 +647,12 @@
 	bool
 	depends on USB_GADGET
 
+config USB_DWC_OTG_LPM
+	boolean "Enable LPM support"
+	depends on USB && EXPERIMENTAL
+	help
+	  Enables LPM support.
+
 #
 # USB Gadget Drivers
 #
diff -uNra linux-3.0.82/drivers/usb/gadget/Makefile linux-3.0.82x/drivers/usb/gadget/Makefile
--- linux-3.0.82/drivers/usb/gadget/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/gadget/Makefile	2017-09-23 03:42:50.266674306 +0800
@@ -3,6 +3,7 @@
 #
 ccflags-$(CONFIG_USB_GADGET_DEBUG) := -DDEBUG
 
+obj-$(CONFIG_USB_DWC_OTG_LPM)   += dwc/
 obj-$(CONFIG_USB_DUMMY_HCD)	+= dummy_hcd.o
 obj-$(CONFIG_USB_NET2280)	+= net2280.o
 obj-$(CONFIG_USB_AMD5536UDC)	+= amd5536udc.o
diff -uNra linux-3.0.82/drivers/usb/gadget/.tmp_versions/gadgetfs.mod linux-3.0.82x/drivers/usb/gadget/.tmp_versions/gadgetfs.mod
diff -uNra linux-3.0.82/drivers/usb/gadget/.tmp_versions/g_ether.mod linux-3.0.82x/drivers/usb/gadget/.tmp_versions/g_ether.mod
diff -uNra linux-3.0.82/drivers/usb/gadget/.tmp_versions/g_mass_storage.mod linux-3.0.82x/drivers/usb/gadget/.tmp_versions/g_mass_storage.mod
diff -uNra linux-3.0.82/drivers/usb/host/ehci-hcd.c linux-3.0.82x/drivers/usb/host/ehci-hcd.c
--- linux-3.0.82/drivers/usb/host/ehci-hcd.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/host/ehci-hcd.c	2017-09-23 03:42:50.266674306 +0800
@@ -1202,6 +1202,12 @@
 MODULE_AUTHOR (DRIVER_AUTHOR);
 MODULE_LICENSE ("GPL");
 
+#ifdef CONFIG_USB_EHCI_HCD_LS1X
+#include "ehci-ls1x.c"
+#define	PLATFORM_DRIVER		ehci_hcd_ls1x_driver
+#endif
+
+
 #ifdef CONFIG_PCI
 #include "ehci-pci.c"
 #define	PCI_DRIVER		ehci_pci_driver
@@ -1317,6 +1323,11 @@
 #define PLATFORM_DRIVER		ehci_grlib_driver
 #endif
 
+#ifdef CONFIG_USB_EHCI_HCD_PLATFORM
+#include "ehci-platform.c"
+#define PLATFORM_DRIVER		ehci_platform_driver
+#endif
+
 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
     !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \
     !defined(XILINX_OF_PLATFORM_DRIVER)
diff -uNra linux-3.0.82/drivers/usb/host/ehci-ls1x.c linux-3.0.82x/drivers/usb/host/ehci-ls1x.c
--- linux-3.0.82/drivers/usb/host/ehci-ls1x.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/host/ehci-ls1x.c	2017-09-23 03:42:50.266674306 +0800
@@ -0,0 +1,279 @@
+/*
+ * EHCI HCD (Host Controller Driver) for USB.
+ *
+ * This file is licenced under the GPL.
+ */
+
+#include <linux/platform_device.h>
+
+extern int usb_disabled(void);
+
+static void ls1x_start_ehc(void)
+{
+#ifndef CONFIG_USB_OHCI_HCD_LS1X
+#if defined(CONFIG_LS1A_MACH)
+	*(volatile int *)0xbfd00420 &= ~0x200000;/* enable USB */
+	*(volatile int *)0xbff10204 = 0;
+	mdelay(105);
+	*(volatile int *)0xbff10204 |= 0x40000000;/* ls1a usb reset stop */
+#elif defined(CONFIG_LS1B_MACH)
+	*(volatile int *)0xbfd00424 &= ~0x800;/* enable USB */
+	*(volatile int *)0xbfd00424 &= ~0x80000000;/* ls1g usb reset */
+	mdelay(105);
+	*(volatile int *)0xbfd00424 |= 0x80000000;/* ls1g usb reset stop */
+#endif	//CONFIG_LS1A_MACH
+#endif
+}
+
+static void ls1x_stop_ehc(void)
+{
+#if 0
+	*(volatile int *)0xbfd00420 |= 0x200000;/* disable USB */
+	*(volatile int *)0xbff10204 &= ~0x40000000;/* ls1a usb reset */
+#endif
+}
+
+static int ls1x_ehci_setup(struct usb_hcd *hcd)
+{
+	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
+	int ret = ehci_init(hcd);
+
+	ehci->need_io_watchdog = 0;
+	return ret;
+}
+
+static const struct hc_driver ehci_ls1x_hc_driver = {
+	.description	= hcd_name,
+	.product_desc	= "Loongson1 EHCI Host Controller",
+	.hcd_priv_size	= sizeof(struct ehci_hcd),
+
+	/*
+	 * generic hardware linkage
+	 */
+	.irq			= ehci_irq,
+	.flags			= HCD_MEMORY | HCD_USB2,
+
+	/*
+	 * basic lifecycle operations
+	 *
+	 * FIXME -- ehci_init() doesn't do enough here.
+	 * See ehci-ppc-soc for a complete implementation.
+	 */
+	.reset			= ls1x_ehci_setup,
+	.start			= ehci_run,
+	.stop			= ehci_stop,
+	.shutdown		= ehci_shutdown,
+
+	/*
+	 * managing i/o requests and associated device resources
+	 */
+	.urb_enqueue		= ehci_urb_enqueue,
+	.urb_dequeue		= ehci_urb_dequeue,
+	.endpoint_disable	= ehci_endpoint_disable,
+	.endpoint_reset		= ehci_endpoint_reset,
+
+	/*
+	 * scheduling support
+	 */
+	.get_frame_number	= ehci_get_frame,
+
+	/*
+	 * root hub support
+	 */
+	.hub_status_data	= ehci_hub_status_data,
+	.hub_control		= ehci_hub_control,
+	.bus_suspend		= ehci_bus_suspend,
+	.bus_resume			= ehci_bus_resume,
+//	.start_port_reset	= ehci_start_port_reset,
+	.relinquish_port	= ehci_relinquish_port,
+	.port_handed_over	= ehci_port_handed_over,
+
+	.clear_tt_buffer_complete	= ehci_clear_tt_buffer_complete,
+};
+
+static int ehci_hcd_ls1x_drv_probe(struct platform_device *pdev)
+{
+	struct usb_hcd *hcd;
+	struct ehci_hcd *ehci;
+	struct resource *res;
+	int ret;
+	
+	if (usb_disabled())
+		return -ENODEV;
+
+	if (pdev->resource[1].flags != IORESOURCE_IRQ) {
+		pr_debug("resource[1] is not IORESOURCE_IRQ");
+		return -ENOMEM;
+	}
+	hcd = usb_create_hcd(&ehci_ls1x_hc_driver, &pdev->dev, "ls1x");
+	if (!hcd)
+		return -ENOMEM;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	hcd->rsrc_start = res->start;
+	hcd->rsrc_len = resource_size(res);
+
+	if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
+		pr_debug("request_mem_region failed");
+		ret = -EBUSY;
+		goto err1;
+	}
+
+	hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
+	if (!hcd->regs) {
+		pr_debug("ioremap failed");
+		ret = -ENOMEM;
+		goto err2;
+	}
+
+//	ls1x_start_ehc();
+	
+	ehci = hcd_to_ehci(hcd);
+	ehci->caps = hcd->regs;
+	ehci->regs = hcd->regs +
+		HC_LENGTH(ehci, readl(&ehci->caps->hc_capbase));
+	/* cache this readonly data; minimize chip reads */
+	ehci->hcs_params = readl(&ehci->caps->hcs_params);
+
+	ret = usb_add_hcd(hcd, pdev->resource[1].start,
+			  IRQF_DISABLED | IRQF_SHARED);
+	if (ret == 0) {
+		platform_set_drvdata(pdev, hcd);
+		return ret;
+	}
+
+	ls1x_stop_ehc();
+	iounmap(hcd->regs);
+
+err2:
+	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
+err1:
+	usb_put_hcd(hcd);
+	return ret;
+}
+
+static int ehci_hcd_ls1x_drv_remove(struct platform_device *pdev)
+{
+	struct usb_hcd *hcd = platform_get_drvdata(pdev);
+
+	usb_remove_hcd(hcd);
+	iounmap(hcd->regs);
+	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
+	usb_put_hcd(hcd);
+	ls1x_stop_ehc();
+	platform_set_drvdata(pdev, NULL);
+
+	return 0;
+}
+
+#ifdef CONFIG_PM
+static int ehci_hcd_ls1x_drv_suspend(struct device *dev)
+{
+	struct usb_hcd *hcd = dev_get_drvdata(dev);
+	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
+	unsigned long flags;
+	int rc = 0;
+
+	if (time_before(jiffies, ehci->next_statechange))
+		msleep(10);
+
+	/* Root hub was already suspended. Disable irq emission and
+	 * mark HW unaccessible.  The PM and USB cores make sure that
+	 * the root hub is either suspended or stopped.
+	 */
+	ehci_prepare_ports_for_controller_suspend(ehci, device_may_wakeup(dev));
+	spin_lock_irqsave(&ehci->lock, flags);
+	ehci_writel(ehci, 0, &ehci->regs->intr_enable);
+	(void)ehci_readl(ehci, &ehci->regs->intr_enable);
+
+	clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
+	spin_unlock_irqrestore(&ehci->lock, flags);
+
+	// could save FLADJ in case of Vaux power loss
+	// ... we'd only use it to handle clock skew
+
+	ls1x_stop_ehc();
+
+	return rc;
+}
+
+static int ehci_hcd_ls1x_drv_resume(struct device *dev)
+{
+	struct usb_hcd *hcd = dev_get_drvdata(dev);
+	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
+
+	ls1x_start_ehc();
+
+	// maybe restore FLADJ
+
+	if (time_before(jiffies, ehci->next_statechange))
+		msleep(100);
+
+	/* Mark hardware accessible again as we are out of D3 state by now */
+	set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
+
+	/* If CF is still set, we maintained PCI Vaux power.
+	 * Just undo the effect of ehci_pci_suspend().
+	 */
+	if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF) {
+		int	mask = INTR_MASK;
+
+		ehci_prepare_ports_for_controller_resume(ehci);
+		if (!hcd->self.root_hub->do_remote_wakeup)
+			mask &= ~STS_PCD;
+		ehci_writel(ehci, mask, &ehci->regs->intr_enable);
+		ehci_readl(ehci, &ehci->regs->intr_enable);
+		return 0;
+	}
+
+	ehci_dbg(ehci, "lost power, restarting\n");
+	usb_root_hub_lost_power(hcd->self.root_hub);
+
+	/* Else reset, to cope with power loss or flush-to-storage
+	 * style "resume" having let BIOS kick in during reboot.
+	 */
+	(void) ehci_halt(ehci);
+	(void) ehci_reset(ehci);
+
+	/* emptying the schedule aborts any urbs */
+	spin_lock_irq(&ehci->lock);
+	if (ehci->reclaim)
+		end_unlink_async(ehci);
+	ehci_work(ehci);
+	spin_unlock_irq(&ehci->lock);
+
+	ehci_writel(ehci, ehci->command, &ehci->regs->command);
+	ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
+	ehci_readl(ehci, &ehci->regs->command);	/* unblock posted writes */
+
+	/* here we "know" root ports should always stay powered */
+	ehci_port_power(ehci, 1);
+
+	hcd->state = HC_STATE_SUSPENDED;
+
+	return 0;
+}
+
+static const struct dev_pm_ops ls1x_ehci_pmops = {
+	.suspend	= ehci_hcd_ls1x_drv_suspend,
+	.resume	= ehci_hcd_ls1x_drv_resume,
+};
+
+#define LS1X_EHCI_PMOPS &ls1x_ehci_pmops
+
+#else
+#define LS1X_EHCI_PMOPS NULL
+#endif
+
+static struct platform_driver ehci_hcd_ls1x_driver = {
+	.probe    = ehci_hcd_ls1x_drv_probe,
+	.remove   = ehci_hcd_ls1x_drv_remove,
+	.shutdown = usb_hcd_platform_shutdown,
+	.driver   = {
+		.name  = "ls1x-ehci",
+		.owner = THIS_MODULE,
+		.pm    = LS1X_EHCI_PMOPS,
+	},
+};
+
+MODULE_ALIAS("platform:ls1x-ehci");
diff -uNra linux-3.0.82/drivers/usb/host/ehci-platform.c linux-3.0.82x/drivers/usb/host/ehci-platform.c
--- linux-3.0.82/drivers/usb/host/ehci-platform.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/host/ehci-platform.c	2017-09-23 03:42:50.266674306 +0800
@@ -0,0 +1,195 @@
+/*
+ * Generic platform ehci driver
+ *
+ * Copyright 2007 Steven Brown <sbrown@cortland.com>
+ * Copyright 2010-2012 Hauke Mehrtens <hauke@hauke-m.de>
+ *
+ * Derived from the ohci-ssb driver
+ * Copyright 2007 Michael Buesch <m@bues.ch>
+ *
+ * Derived from the EHCI-PCI driver
+ * Copyright (c) 2000-2004 by David Brownell
+ *
+ * Derived from the ohci-pci driver
+ * Copyright 1999 Roman Weissgaerber
+ * Copyright 2000-2002 David Brownell
+ * Copyright 1999 Linus Torvalds
+ * Copyright 1999 Gregory P. Smith
+ *
+ * Licensed under the GNU/GPL. See COPYING for details.
+ */
+#include <linux/platform_device.h>
+#include <linux/usb/ehci_pdriver.h>
+
+static int ehci_platform_reset(struct usb_hcd *hcd)
+{
+	struct platform_device *pdev = to_platform_device(hcd->self.controller);
+	struct usb_ehci_pdata *pdata = pdev->dev.platform_data;
+	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
+	int retval;
+
+	hcd->has_tt = pdata->has_tt;
+	ehci->has_synopsys_hc_bug = pdata->has_synopsys_hc_bug;
+	ehci->big_endian_desc = pdata->big_endian_desc;
+	ehci->big_endian_mmio = pdata->big_endian_mmio;
+
+	ehci->caps = hcd->regs + pdata->caps_offset;
+	retval = ehci_setup(hcd);
+	if (retval)
+		return retval;
+
+//	if (pdata->port_power_on)
+//		ehci_port_power(ehci, 1);
+//	if (pdata->port_power_off)
+//		ehci_port_power(ehci, 0);
+
+	return 0;
+}
+
+static const struct hc_driver ehci_platform_hc_driver = {
+	.description		= hcd_name,
+	.product_desc		= "Generic Platform EHCI Controller",
+	.hcd_priv_size		= sizeof(struct ehci_hcd),
+
+	.irq			= ehci_irq,
+	.flags			= HCD_MEMORY | HCD_USB2,
+
+	.reset			= ehci_platform_reset,
+	.start			= ehci_run,
+	.stop			= ehci_stop,
+	.shutdown		= ehci_shutdown,
+
+	.urb_enqueue		= ehci_urb_enqueue,
+	.urb_dequeue		= ehci_urb_dequeue,
+	.endpoint_disable	= ehci_endpoint_disable,
+	.endpoint_reset		= ehci_endpoint_reset,
+
+	.get_frame_number	= ehci_get_frame,
+
+	.hub_status_data	= ehci_hub_status_data,
+	.hub_control		= ehci_hub_control,
+#if defined(CONFIG_PM)
+	.bus_suspend		= ehci_bus_suspend,
+	.bus_resume		= ehci_bus_resume,
+#endif
+	.relinquish_port	= ehci_relinquish_port,
+	.port_handed_over	= ehci_port_handed_over,
+
+	.clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
+};
+
+static int __devinit ehci_platform_probe(struct platform_device *dev)
+{
+	struct usb_hcd *hcd;
+	struct resource *res_mem;
+	int irq;
+	int err = -ENOMEM;
+
+	BUG_ON(!dev->dev.platform_data);
+
+	if (usb_disabled())
+		return -ENODEV;
+
+	irq = platform_get_irq(dev, 0);
+	if (irq < 0) {
+		pr_err("no irq provided");
+		return irq;
+	}
+	res_mem = platform_get_resource(dev, IORESOURCE_MEM, 0);
+	if (!res_mem) {
+		pr_err("no memory recourse provided");
+		return -ENXIO;
+	}
+
+	hcd = usb_create_hcd(&ehci_platform_hc_driver, &dev->dev,
+			     dev_name(&dev->dev));
+	if (!hcd)
+		return -ENOMEM;
+
+	hcd->rsrc_start = res_mem->start;
+	hcd->rsrc_len = resource_size(res_mem);
+
+	if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
+		pr_err("controller already in use");
+		err = -EBUSY;
+		goto err_put_hcd;
+	}
+
+	hcd->regs = ioremap_nocache(hcd->rsrc_start, hcd->rsrc_len);
+	if (!hcd->regs)
+		goto err_release_region;
+	err = usb_add_hcd(hcd, irq, IRQF_DISABLED);
+	if (err)
+		goto err_iounmap;
+
+	platform_set_drvdata(dev, hcd);
+
+	return err;
+
+err_iounmap:
+	iounmap(hcd->regs);
+err_release_region:
+	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
+err_put_hcd:
+	usb_put_hcd(hcd);
+	return err;
+}
+
+static int __devexit ehci_platform_remove(struct platform_device *dev)
+{
+	struct usb_hcd *hcd = platform_get_drvdata(dev);
+
+	usb_remove_hcd(hcd);
+	iounmap(hcd->regs);
+	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
+	usb_put_hcd(hcd);
+	platform_set_drvdata(dev, NULL);
+
+	return 0;
+}
+
+#ifdef CONFIG_PM
+
+static int ehci_platform_suspend(struct device *dev)
+{
+	struct usb_hcd *hcd = dev_get_drvdata(dev);
+	bool do_wakeup = device_may_wakeup(dev);
+
+	return ehci_suspend(hcd, do_wakeup);
+}
+
+static int ehci_platform_resume(struct device *dev)
+{
+	struct usb_hcd *hcd = dev_get_drvdata(dev);
+
+	ehci_resume(hcd, false);
+	return 0;
+}
+
+#else /* !CONFIG_PM */
+#define ehci_platform_suspend	NULL
+#define ehci_platform_resume	NULL
+#endif /* CONFIG_PM */
+
+static const struct platform_device_id ehci_platform_table[] = {
+	{ "ehci-platform", 0 },
+	{ }
+};
+MODULE_DEVICE_TABLE(platform, ehci_platform_table);
+
+static const struct dev_pm_ops ehci_platform_pm_ops = {
+	.suspend	= ehci_platform_suspend,
+	.resume		= ehci_platform_resume,
+};
+
+static struct platform_driver ehci_platform_driver = {
+	.id_table	= ehci_platform_table,
+	.probe		= ehci_platform_probe,
+	.remove		= __devexit_p(ehci_platform_remove),
+	.shutdown	= usb_hcd_platform_shutdown,
+	.driver		= {
+		.owner	= THIS_MODULE,
+		.name	= "ehci-platform",
+		.pm	= &ehci_platform_pm_ops,
+	}
+};
diff -uNra linux-3.0.82/drivers/usb/host/Kconfig linux-3.0.82x/drivers/usb/host/Kconfig
--- linux-3.0.82/drivers/usb/host/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/host/Kconfig	2017-09-23 03:42:50.266674306 +0800
@@ -91,6 +91,13 @@
 
 	  If unsure, say Y.
 
+config USB_EHCI_HCD_LS1X
+	bool "EHCI support for loognson1 chips"
+	depends on USB_EHCI_HCD && (LS1A_MACH || LS1B_MACH || LS1C_MACH)
+	default y
+	---help---
+	  Enables support for the EHCI controller on loongson1 chips.
+
 config USB_EHCI_HCD_PMC_MSP
 	tristate "EHCI support for on-chip PMC MSP71xx USB controller"
 	depends on USB_EHCI_HCD && MSP_HAS_USB
@@ -287,6 +294,13 @@
 	  To compile this driver as a module, choose M here: the
 	  module will be called ohci-hcd.
 
+config USB_OHCI_HCD_LS1X
+	bool "OHCI support for loognson1 chips"
+	depends on USB_OHCI_HCD && (LS1A_MACH || LS1B_MACH || LS1C_MACH)
+	default y
+	---help---
+	  Enables support for the OHCI controller on loongson1 chips.
+
 config USB_OHCI_HCD_OMAP1
 	bool "OHCI support for OMAP1/2 chips"
 	depends on USB_OHCI_HCD && (ARCH_OMAP1 || ARCH_OMAP2)
@@ -416,6 +430,26 @@
 	depends on USB_UHCI_HCD
 	default y if SPARC_LEON
 
+config USB_OHCI_HCD_PLATFORM
+	bool "Generic OHCI driver for a platform device"
+	depends on USB_OHCI_HCD && EXPERIMENTAL
+	default n
+	---help---
+	  Adds an OHCI host driver for a generic platform device, which
+	  provieds a memory space and an irq.
+
+	  If unsure, say N.
+
+config USB_EHCI_HCD_PLATFORM
+	bool "Generic EHCI driver for a platform device"
+	depends on USB_EHCI_HCD && EXPERIMENTAL
+	default n
+	---help---
+	  Adds an EHCI host driver for a generic platform device, which
+	  provieds a memory space and an irq.
+
+	  If unsure, say N.
+
 config USB_UHCI_BIG_ENDIAN_MMIO
 	bool
 	depends on USB_UHCI_SUPPORT_NON_PCI_HC && SPARC_LEON
diff -uNra linux-3.0.82/drivers/usb/host/ohci-hcd.c linux-3.0.82x/drivers/usb/host/ohci-hcd.c
--- linux-3.0.82/drivers/usb/host/ohci-hcd.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/host/ohci-hcd.c	2017-09-23 03:42:50.270674293 +0800
@@ -990,6 +990,11 @@
 MODULE_DESCRIPTION(DRIVER_DESC);
 MODULE_LICENSE ("GPL");
 
+#ifdef CONFIG_USB_OHCI_HCD_LS1X
+#include "ohci-ls1x.c"
+#define	PLATFORM_DRIVER		ohci_hcd_ls1x_driver
+#endif
+
 #ifdef CONFIG_PCI
 #include "ohci-pci.c"
 #define PCI_DRIVER		ohci_pci_driver
@@ -1111,6 +1116,11 @@
 #define PLATFORM_DRIVER		ohci_hcd_ath79_driver
 #endif
 
+#ifdef CONFIG_USB_OHCI_HCD_PLATFORM
+#include "ohci-platform.c"
+#define PLATFORM_DRIVER		ohci_platform_driver
+#endif
+
 #if	!defined(PCI_DRIVER) &&		\
 	!defined(PLATFORM_DRIVER) &&	\
 	!defined(OMAP1_PLATFORM_DRIVER) &&	\
diff -uNra linux-3.0.82/drivers/usb/host/ohci-ls1x.c linux-3.0.82x/drivers/usb/host/ohci-ls1x.c
--- linux-3.0.82/drivers/usb/host/ohci-ls1x.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/host/ohci-ls1x.c	2017-09-23 03:42:50.270674293 +0800
@@ -0,0 +1,238 @@
+/*
+ * OHCI HCD (Host Controller Driver) for USB.
+ *
+ *  Copyright (C) 2009 loongson.
+ *
+ * This file is licenced under the GPL.
+ */
+#include <linux/platform_device.h>
+
+extern int usb_disabled(void);
+
+static void ls1x_start_ohc(void)
+{
+#if defined(CONFIG_LS1A_MACH)
+	*(volatile int *)0xbfd00420 &= ~0x200000;/* enable USB */
+	*(volatile int *)0xbff10204 = 0;
+	mdelay(105);
+	*(volatile int *)0xbff10204 |= 0x40000000;/* ls1a usb reset stop */
+#elif defined(CONFIG_LS1B_MACH)
+	*(volatile int *)0xbfd00424 &= ~0x800;/* enable USB */
+	*(volatile int *)0xbfd00424 &= ~0x80000000;/* ls1g usb reset */
+	mdelay(105);
+	*(volatile int *)0xbfd00424 |= 0x80000000;/* ls1g usb reset stop */
+#endif	//CONFIG_LS1A_MACH
+}
+
+static void ls1x_stop_ohc(void)
+{
+#if 0
+#ifndef CONFIG_USB_EHCI_HCD_LS1B
+#ifdef CONFIG_LS1A_MACH
+	*(volatile int *)0xbfd00420 |= 0x200000;/* disable USB */
+	*(volatile int *)0xbff10204 &= ~0x40000000;/* ls1a usb reset */
+#elif CONFIG_LS1B_MACH
+	*(volatile int *)0xbfd00424 |= 0x800;/* disable USB */
+	*(volatile int *)0xbfd00424 &= ~0x80000000;/* ls1g usb reset */
+#endif
+#endif
+#endif
+}
+
+static int __devinit ohci_ls1x_start(struct usb_hcd *hcd)
+{
+	struct ohci_hcd	*ohci = hcd_to_ohci(hcd);
+	int ret;
+
+	ohci_dbg(ohci, "ohci_ls1x_start, ohci:%p", ohci);
+
+	if ((ret = ohci_init(ohci)) < 0)
+		return ret;
+
+	if ((ret = ohci_run(ohci)) < 0) {
+		err ("can't start %s", hcd->self.bus_name);
+		ohci_stop(hcd);
+		return ret;
+	}
+
+	return 0;
+}
+
+static const struct hc_driver ohci_ls1x_hc_driver = {
+	.description =		hcd_name,
+	.product_desc =		"loongson1 OHCI",
+	.hcd_priv_size =	sizeof(struct ohci_hcd),
+
+	/*
+	 * generic hardware linkage
+	 */
+	.irq =			ohci_irq,
+	.flags =		HCD_USB11 | HCD_MEMORY,
+
+	/*
+	 * basic lifecycle operations
+	 */
+	.start =		ohci_ls1x_start,
+	.stop =			ohci_stop,
+	.shutdown =		ohci_shutdown,
+
+	/*
+	 * managing i/o requests and associated device resources
+	 */
+	.urb_enqueue =		ohci_urb_enqueue,
+	.urb_dequeue =		ohci_urb_dequeue,
+	.endpoint_disable =	ohci_endpoint_disable,
+
+	/*
+	 * scheduling support
+	 */
+	.get_frame_number =	ohci_get_frame,
+
+	/*
+	 * root hub support
+	 */
+	.hub_status_data =	ohci_hub_status_data,
+	.hub_control =		ohci_hub_control,
+#ifdef	CONFIG_PM
+	.bus_suspend =		ohci_bus_suspend,
+	.bus_resume =		ohci_bus_resume,
+#endif
+	.start_port_reset =	ohci_start_port_reset,
+};
+
+static int ohci_hcd_ls1x_drv_probe(struct platform_device *pdev)
+{
+	int ret;
+	struct usb_hcd *hcd;
+
+	if (usb_disabled())
+		return -ENODEV;
+
+	if (pdev->resource[1].flags != IORESOURCE_IRQ) {
+		pr_debug("resource[1] is not IORESOURCE_IRQ\n");
+		return -ENOMEM;
+	}
+
+	hcd = usb_create_hcd(&ohci_ls1x_hc_driver, &pdev->dev, "ls1x");
+	if (!hcd)
+		return -ENOMEM;
+
+	hcd->rsrc_start = pdev->resource[0].start;
+	hcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1;
+
+	if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
+		pr_debug("request_mem_region failed\n");
+		ret = -EBUSY;
+		goto err1;
+	}
+
+	hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
+	if (!hcd->regs) {
+		pr_debug("ioremap failed\n");
+		ret = -ENOMEM;
+		goto err2;
+	}
+
+//	ls1x_start_ohc();
+	ohci_hcd_init(hcd_to_ohci(hcd));
+
+	ret = usb_add_hcd(hcd, pdev->resource[1].start,
+			  IRQF_DISABLED | IRQF_SHARED);
+	if (ret == 0) {
+		platform_set_drvdata(pdev, hcd);
+		return ret;
+	}
+
+	ls1x_stop_ohc();
+	iounmap(hcd->regs);
+err2:
+	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
+err1:
+	usb_put_hcd(hcd);
+	return ret;
+}
+
+static int ohci_hcd_ls1x_drv_remove(struct platform_device *pdev)
+{
+	struct usb_hcd *hcd = platform_get_drvdata(pdev);
+
+	usb_remove_hcd(hcd);
+	ls1x_stop_ohc();
+	iounmap(hcd->regs);
+	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
+	usb_put_hcd(hcd);
+	platform_set_drvdata(pdev, NULL);
+
+	return 0;
+}
+
+#ifdef CONFIG_PM
+static int ohci_hcd_ls1x_drv_suspend(struct device *dev)
+{
+	struct usb_hcd *hcd = dev_get_drvdata(dev);
+	struct ohci_hcd	*ohci = hcd_to_ohci(hcd);
+	unsigned long flags;
+	int rc;
+
+	rc = 0;
+
+	/* Root hub was already suspended. Disable irq emission and
+	 * mark HW unaccessible, bail out if RH has been resumed. Use
+	 * the spinlock to properly synchronize with possible pending
+	 * RH suspend or resume activity.
+	 *
+	 * This is still racy as hcd->state is manipulated outside of
+	 * any locks =P But that will be a different fix.
+	 */
+	spin_lock_irqsave(&ohci->lock, flags);
+	if (hcd->state != HC_STATE_SUSPENDED) {
+		rc = -EINVAL;
+		goto bail;
+	}
+	ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
+	(void)ohci_readl(ohci, &ohci->regs->intrdisable);
+
+	clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
+
+	ls1x_stop_ohc();
+bail:
+	spin_unlock_irqrestore(&ohci->lock, flags);
+
+	return rc;
+}
+
+static int ohci_hcd_ls1x_drv_resume(struct device *dev)
+{
+	struct usb_hcd *hcd = dev_get_drvdata(dev);
+
+	ls1x_start_ohc();
+
+	set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
+	ohci_finish_controller_resume(hcd);
+
+	return 0;
+}
+
+static const struct dev_pm_ops ls1x_ohci_pmops = {
+	.suspend	= ohci_hcd_ls1x_drv_suspend,
+	.resume		= ohci_hcd_ls1x_drv_resume,
+};
+
+#define LS1X_OHCI_PMOPS &ls1x_ohci_pmops
+
+#else
+#define LS1X_OHCI_PMOPS NULL
+#endif
+
+static struct platform_driver ohci_hcd_ls1x_driver = {
+	.probe		= ohci_hcd_ls1x_drv_probe,
+	.remove		= ohci_hcd_ls1x_drv_remove,
+	.shutdown	= usb_hcd_platform_shutdown,
+	.driver		= {
+		.name	= "ls1x-ohci",
+		.owner	= THIS_MODULE,
+		.pm	= LS1X_OHCI_PMOPS,
+	},
+};
+
+MODULE_ALIAS("platform:ls1x-ohci");
diff -uNra linux-3.0.82/drivers/usb/host/ohci-platform.c linux-3.0.82x/drivers/usb/host/ohci-platform.c
--- linux-3.0.82/drivers/usb/host/ohci-platform.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/host/ohci-platform.c	2017-09-23 03:42:50.270674293 +0800
@@ -0,0 +1,225 @@
+/*
+ * Generic platform ohci driver
+ *
+ * Copyright 2007 Michael Buesch <m@bues.ch>
+ * Copyright 2011-2012 Hauke Mehrtens <hauke@hauke-m.de>
+ *
+ * Derived from the OCHI-SSB driver
+ * Derived from the OHCI-PCI driver
+ * Copyright 1999 Roman Weissgaerber
+ * Copyright 2000-2002 David Brownell
+ * Copyright 1999 Linus Torvalds
+ * Copyright 1999 Gregory P. Smith
+ *
+ * Licensed under the GNU/GPL. See COPYING for details.
+ */
+#include <linux/platform_device.h>
+#include <linux/usb/ohci_pdriver.h>
+
+static int ohci_platform_reset(struct usb_hcd *hcd)
+{
+	struct platform_device *pdev = to_platform_device(hcd->self.controller);
+	struct usb_ohci_pdata *pdata = pdev->dev.platform_data;
+	struct ohci_hcd *ohci = hcd_to_ohci(hcd);
+	int err;
+
+	if (pdata->big_endian_desc)
+		ohci->flags |= OHCI_QUIRK_BE_DESC;
+	if (pdata->big_endian_mmio)
+		ohci->flags |= OHCI_QUIRK_BE_MMIO;
+	if (pdata->no_big_frame_no)
+		ohci->flags |= OHCI_QUIRK_FRAME_NO;
+
+	ohci_hcd_init(ohci);
+
+	if (pdata->num_ports)
+		ohci->num_ports = pdata->num_ports;
+
+	err = ohci_init(ohci);
+
+	return err;
+}
+
+static int ohci_platform_start(struct usb_hcd *hcd)
+{
+	struct ohci_hcd *ohci = hcd_to_ohci(hcd);
+	int err;
+
+	err = ohci_run(ohci);
+	if (err < 0) {
+		ohci_err(ohci, "can't start\n");
+		ohci_stop(hcd);
+	}
+
+	return err;
+}
+
+static const struct hc_driver ohci_platform_hc_driver = {
+	.description		= hcd_name,
+	.product_desc		= "Generic Platform OHCI Controller",
+	.hcd_priv_size		= sizeof(struct ohci_hcd),
+
+	.irq			= ohci_irq,
+	.flags			= HCD_MEMORY | HCD_USB11,
+
+	.reset			= ohci_platform_reset,
+	.start			= ohci_platform_start,
+	.stop			= ohci_stop,
+	.shutdown		= ohci_shutdown,
+
+	.urb_enqueue		= ohci_urb_enqueue,
+	.urb_dequeue		= ohci_urb_dequeue,
+	.endpoint_disable	= ohci_endpoint_disable,
+
+	.get_frame_number	= ohci_get_frame,
+
+	.hub_status_data	= ohci_hub_status_data,
+	.hub_control		= ohci_hub_control,
+#ifdef	CONFIG_PM
+	.bus_suspend		= ohci_bus_suspend,
+	.bus_resume		= ohci_bus_resume,
+#endif
+
+	.start_port_reset	= ohci_start_port_reset,
+};
+
+static int ohci_platform_probe(struct platform_device *dev)
+{
+	struct usb_hcd *hcd;
+	struct resource *res_mem;
+	struct usb_ohci_pdata *pdata = dev->dev.platform_data;
+	int irq;
+	int err = -ENOMEM;
+
+	if (!pdata) {
+		WARN_ON(1);
+		return -ENODEV;
+	}
+
+	if (usb_disabled())
+		return -ENODEV;
+
+	irq = platform_get_irq(dev, 0);
+	if (irq < 0) {
+		dev_err(&dev->dev, "no irq provided");
+		return irq;
+	}
+
+	res_mem = platform_get_resource(dev, IORESOURCE_MEM, 0);
+	if (!res_mem) {
+		dev_err(&dev->dev, "no memory resource provided");
+		return -ENXIO;
+	}
+
+	if (pdata->power_on) {
+		err = pdata->power_on(dev);
+		if (err < 0)
+			return err;
+	}
+
+	hcd = usb_create_hcd(&ohci_platform_hc_driver, &dev->dev,
+			dev_name(&dev->dev));
+	if (!hcd) {
+		err = -ENOMEM;
+		goto err_power;
+	}
+
+	hcd->rsrc_start = res_mem->start;
+	hcd->rsrc_len = resource_size(res_mem);
+
+	hcd->regs = ioremap_nocache(hcd->rsrc_start, hcd->rsrc_len);
+	if (!hcd->regs) {
+		err = -ENOMEM;
+		goto err_put_hcd;
+	}
+	err = usb_add_hcd(hcd, irq, IRQF_DISABLED);
+	if (err)
+		goto err_put_hcd;
+
+	platform_set_drvdata(dev, hcd);
+
+	return err;
+
+err_put_hcd:
+	usb_put_hcd(hcd);
+err_power:
+	if (pdata->power_off)
+		pdata->power_off(dev);
+
+	return err;
+}
+
+static int ohci_platform_remove(struct platform_device *dev)
+{
+	struct usb_hcd *hcd = platform_get_drvdata(dev);
+	struct usb_ohci_pdata *pdata = dev->dev.platform_data;
+
+	usb_remove_hcd(hcd);
+	usb_put_hcd(hcd);
+	platform_set_drvdata(dev, NULL);
+
+	if (pdata->power_off)
+		pdata->power_off(dev);
+
+	return 0;
+}
+
+#ifdef CONFIG_PM
+
+static int ohci_platform_suspend(struct device *dev)
+{
+	struct usb_ohci_pdata *pdata = dev->platform_data;
+	struct platform_device *pdev =
+		container_of(dev, struct platform_device, dev);
+
+	if (pdata->power_suspend)
+		pdata->power_suspend(pdev);
+
+	return 0;
+}
+
+static int ohci_platform_resume(struct device *dev)
+{
+	struct usb_hcd *hcd = dev_get_drvdata(dev);
+	struct usb_ohci_pdata *pdata = dev->platform_data;
+	struct platform_device *pdev =
+		container_of(dev, struct platform_device, dev);
+
+	if (pdata->power_on) {
+		int err = pdata->power_on(pdev);
+		if (err < 0)
+			return err;
+	}
+
+	ohci_resume(hcd, false);
+	return 0;
+}
+
+#else /* !CONFIG_PM */
+#define ohci_platform_suspend	NULL
+#define ohci_platform_resume	NULL
+#endif /* CONFIG_PM */
+
+static const struct platform_device_id ohci_platform_table[] = {
+	{ "ohci-platform", 0 },
+	{ }
+};
+MODULE_DEVICE_TABLE(platform, ohci_platform_table);
+
+static const struct dev_pm_ops ohci_platform_pm_ops = {
+	.suspend	= ohci_platform_suspend,
+	.resume		= ohci_platform_resume,
+};
+
+static struct platform_driver ohci_platform_driver = {
+	.id_table	= ohci_platform_table,
+	.probe		= ohci_platform_probe,
+	.remove		= ohci_platform_remove,
+	.shutdown	= usb_hcd_platform_shutdown,
+	.driver		= {
+		.owner	= THIS_MODULE,
+		.name	= "ohci-platform",
+		.pm	= &ohci_platform_pm_ops,
+	}
+};
+
diff -uNra linux-3.0.82/drivers/usb/Kconfig linux-3.0.82x/drivers/usb/Kconfig
--- linux-3.0.82/drivers/usb/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/usb/Kconfig	2017-09-23 03:42:50.270674293 +0800
@@ -48,6 +48,9 @@
 	# MIPS:
 	default y if MIPS_ALCHEMY
 	default y if MACH_JZ4740
+	default y if LS1A_MACH
+	default y if LS1B_MACH
+	default y if LS1C_MACH
 	# more:
 	default PCI
 
@@ -69,6 +72,9 @@
 	default y if ARCH_MSM
 	default y if MICROBLAZE
 	default y if SPARC_LEON
+	default y if LS1A_MACH
+	default y if LS1B_MACH
+	default y if LS1C_MACH
 	default PCI
 
 # ARM SA1111 chips have a non-PCI based "OHCI-compatible" USB host interface.
diff -uNra linux-3.0.82/drivers/video/backlight/jbt6k74.c linux-3.0.82x/drivers/video/backlight/jbt6k74.c
--- linux-3.0.82/drivers/video/backlight/jbt6k74.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/video/backlight/jbt6k74.c	2017-09-23 03:42:50.270674293 +0800
@@ -0,0 +1,905 @@
+/* Linux kernel driver for the tpo JBT6K74-AS LCM ASIC
+ *
+ * Copyright (C) 2006-2007 by Openmoko, Inc.
+ * Author: Harald Welte <laforge@openmoko.org>,
+ * 	   Stefan Schmidt <stefan@openmoko.org>
+ * Copyright (C) 2008 by Harald Welte <laforge@openmoko.org>
+ * Copyright (C) 2009 by Lars-Peter Clausen <lars@metafoo.de>
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/workqueue.h>
+#include <linux/jbt6k74.h>
+#include <linux/fb.h>
+#include <linux/lcd.h>
+#include <linux/time.h>
+#include <linux/regulator/consumer.h>
+#include <linux/gpio.h>
+
+enum jbt_register {
+	JBT_REG_SLEEP_IN		= 0x10,
+	JBT_REG_SLEEP_OUT		= 0x11,
+
+	JBT_REG_DISPLAY_OFF		= 0x28,
+	JBT_REG_DISPLAY_ON		= 0x29,
+
+	JBT_REG_RGB_FORMAT		= 0x3a,
+	JBT_REG_QUAD_RATE		= 0x3b,
+
+	JBT_REG_POWER_ON_OFF		= 0xb0,
+	JBT_REG_BOOSTER_OP		= 0xb1,
+	JBT_REG_BOOSTER_MODE		= 0xb2,
+	JBT_REG_BOOSTER_FREQ		= 0xb3,
+	JBT_REG_OPAMP_SYSCLK		= 0xb4,
+	JBT_REG_VSC_VOLTAGE		= 0xb5,
+	JBT_REG_VCOM_VOLTAGE		= 0xb6,
+	JBT_REG_EXT_DISPL		= 0xb7,
+	JBT_REG_OUTPUT_CONTROL		= 0xb8,
+	JBT_REG_DCCLK_DCEV		= 0xb9,
+	JBT_REG_DISPLAY_MODE1		= 0xba,
+	JBT_REG_DISPLAY_MODE2		= 0xbb,
+	JBT_REG_DISPLAY_MODE		= 0xbc,
+	JBT_REG_ASW_SLEW		= 0xbd,
+	JBT_REG_DUMMY_DISPLAY		= 0xbe,
+	JBT_REG_DRIVE_SYSTEM		= 0xbf,
+
+	JBT_REG_SLEEP_OUT_FR_A		= 0xc0,
+	JBT_REG_SLEEP_OUT_FR_B		= 0xc1,
+	JBT_REG_SLEEP_OUT_FR_C		= 0xc2,
+	JBT_REG_SLEEP_IN_LCCNT_D	= 0xc3,
+	JBT_REG_SLEEP_IN_LCCNT_E	= 0xc4,
+	JBT_REG_SLEEP_IN_LCCNT_F	= 0xc5,
+	JBT_REG_SLEEP_IN_LCCNT_G	= 0xc6,
+
+	JBT_REG_GAMMA1_FINE_1		= 0xc7,
+	JBT_REG_GAMMA1_FINE_2		= 0xc8,
+	JBT_REG_GAMMA1_INCLINATION	= 0xc9,
+	JBT_REG_GAMMA1_BLUE_OFFSET	= 0xca,
+
+	/* VGA */
+	JBT_REG_BLANK_CONTROL		= 0xcf,
+	JBT_REG_BLANK_TH_TV		= 0xd0,
+	JBT_REG_CKV_ON_OFF		= 0xd1,
+	JBT_REG_CKV_1_2			= 0xd2,
+	JBT_REG_OEV_TIMING		= 0xd3,
+	JBT_REG_ASW_TIMING_1		= 0xd4,
+	JBT_REG_ASW_TIMING_2		= 0xd5,
+
+	/* QVGA */
+	JBT_REG_BLANK_CONTROL_QVGA	= 0xd6,
+	JBT_REG_BLANK_TH_TV_QVGA	= 0xd7,
+	JBT_REG_CKV_ON_OFF_QVGA		= 0xd8,
+	JBT_REG_CKV_1_2_QVGA		= 0xd9,
+	JBT_REG_OEV_TIMING_QVGA		= 0xde,
+	JBT_REG_ASW_TIMING_1_QVGA	= 0xdf,
+	JBT_REG_ASW_TIMING_2_QVGA	= 0xe0,
+
+
+	JBT_REG_HCLOCK_VGA		= 0xec,
+	JBT_REG_HCLOCK_QVGA		= 0xed,
+};
+
+
+static const char *jbt_power_mode_names[] = {
+	[JBT_POWER_MODE_OFF]		= "off",
+	[JBT_POWER_MODE_STANDBY]	= "standby",
+	[JBT_POWER_MODE_NORMAL]		= "normal",
+};
+
+static const char *jbt_resolution_names[] = {
+	[JBT_RESOLUTION_VGA] = "vga",
+	[JBT_RESOLUTION_QVGA] = "qvga",
+};
+
+
+struct jbt_info {
+	struct mutex lock;		/* protects this structure */
+	enum jbt_resolution resolution;
+	enum jbt_power_mode power_mode;
+	enum jbt_power_mode suspend_mode;
+	int suspended;
+
+	struct spi_device *spi;
+	struct lcd_device *lcd_dev;
+
+	unsigned long next_sleep;
+	struct delayed_work blank_work;
+	int blank_mode;
+	struct regulator_bulk_data supplies[2];
+	uint16_t tx_buf[3];
+	uint16_t reg_cache[0xEE];
+};
+
+struct jbt_info *jbt_global;
+
+#define JBT_COMMAND	0x000
+#define JBT_DATA	0x100
+
+static int jbt_reg_write_nodata(struct jbt_info *jbt, uint8_t reg)
+{
+	int ret;
+
+	jbt->tx_buf[0] = JBT_COMMAND | reg;
+	ret = spi_write(jbt->spi, (uint8_t *)jbt->tx_buf,
+					sizeof(uint16_t));
+	if (ret == 0)
+		jbt->reg_cache[reg] = 0;
+	else
+		dev_err(&jbt->spi->dev, "Write failed: %d\n", ret);
+
+	mdelay(1);
+
+	return ret;
+}
+
+
+static int jbt_reg_write(struct jbt_info *jbt, uint8_t reg, uint8_t data)
+{
+	int ret;
+
+	jbt->tx_buf[0] = JBT_COMMAND | reg;
+	jbt->tx_buf[1] = JBT_DATA | data;
+	ret = spi_write(jbt->spi, (uint8_t *)jbt->tx_buf,
+			2*sizeof(uint16_t));
+	if (ret == 0)
+		jbt->reg_cache[reg] = data;
+	else
+		dev_err(&jbt->spi->dev, "Write failed: %d\n", ret);
+
+	mdelay(1);
+
+	return ret;
+}
+
+static int jbt_reg_write16(struct jbt_info *jbt, uint8_t reg, uint16_t data)
+{
+	int ret;
+
+	jbt->tx_buf[0] = JBT_COMMAND | reg;
+	jbt->tx_buf[1] = JBT_DATA | (data >> 8);
+	jbt->tx_buf[2] = JBT_DATA | (data & 0xff);
+
+	ret = spi_write(jbt->spi, (uint8_t *)jbt->tx_buf,
+			3*sizeof(uint16_t));
+	if (ret == 0)
+		jbt->reg_cache[reg] = data;
+	else
+		dev_err(&jbt->spi->dev, "Write failed: %d\n", ret);
+
+	mdelay(1);
+
+	return ret;
+}
+
+static int jbt_init_regs(struct jbt_info *jbt)
+{
+	int ret;
+
+	dev_dbg(&jbt->spi->dev, "entering %cVGA mode\n",
+			jbt->resolution == JBT_RESOLUTION_QVGA ? 'Q' : ' ');
+
+	ret = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE1, 0x01);
+	ret |= jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE2, 0x00);
+	ret |= jbt_reg_write(jbt, JBT_REG_RGB_FORMAT, 0x60);
+	ret |= jbt_reg_write(jbt, JBT_REG_DRIVE_SYSTEM, 0x10);
+	ret |= jbt_reg_write(jbt, JBT_REG_BOOSTER_OP, 0x56);
+	ret |= jbt_reg_write(jbt, JBT_REG_BOOSTER_MODE, 0x33);
+	ret |= jbt_reg_write(jbt, JBT_REG_BOOSTER_FREQ, 0x11);
+	ret |= jbt_reg_write(jbt, JBT_REG_OPAMP_SYSCLK, 0x02);
+	ret |= jbt_reg_write(jbt, JBT_REG_VSC_VOLTAGE, 0x2b);
+	ret |= jbt_reg_write(jbt, JBT_REG_VCOM_VOLTAGE, 0x40);
+	ret |= jbt_reg_write(jbt, JBT_REG_EXT_DISPL, 0x03);
+	ret |= jbt_reg_write(jbt, JBT_REG_DCCLK_DCEV, 0x04);
+	/*
+	 * default of 0x02 in JBT_REG_ASW_SLEW responsible for 72Hz requirement
+	 * to avoid red / blue flicker
+	 */
+	ret |= jbt_reg_write(jbt, JBT_REG_ASW_SLEW, 0x00 | (1 << 5));
+	ret |= jbt_reg_write(jbt, JBT_REG_DUMMY_DISPLAY, 0xff);
+
+	ret |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_A, 0x11);
+	ret |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_B, 0x11);
+	ret |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_C, 0x11);
+	ret |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_D, 0x2040);
+	ret |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_E, 0x60c0);
+	ret |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_F, 0x1020);
+	ret |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_G, 0x60c0);
+
+	ret |= jbt_reg_write16(jbt, JBT_REG_GAMMA1_FINE_1, 0x5533);
+	ret |= jbt_reg_write(jbt, JBT_REG_GAMMA1_FINE_2, 0x00);
+	ret |= jbt_reg_write(jbt, JBT_REG_GAMMA1_INCLINATION, 0x00);
+	ret |= jbt_reg_write(jbt, JBT_REG_GAMMA1_BLUE_OFFSET, 0x00);
+
+	if (jbt->resolution != JBT_RESOLUTION_QVGA) {
+		ret |= jbt_reg_write16(jbt, JBT_REG_HCLOCK_VGA, 0x1f0);
+		ret |= jbt_reg_write(jbt, JBT_REG_BLANK_CONTROL, 0x02);
+		ret |= jbt_reg_write16(jbt, JBT_REG_BLANK_TH_TV, 0x0804);
+
+		ret |= jbt_reg_write(jbt, JBT_REG_CKV_ON_OFF, 0x01);
+		ret |= jbt_reg_write16(jbt, JBT_REG_CKV_1_2, 0x0000);
+
+		ret |= jbt_reg_write16(jbt, JBT_REG_OEV_TIMING, 0x0d0e);
+		ret |= jbt_reg_write16(jbt, JBT_REG_ASW_TIMING_1, 0x11a4);
+		ret |= jbt_reg_write(jbt, JBT_REG_ASW_TIMING_2, 0x0e);
+	} else {
+		ret |= jbt_reg_write16(jbt, JBT_REG_HCLOCK_QVGA, 0x00ff);
+		ret |= jbt_reg_write(jbt, JBT_REG_BLANK_CONTROL_QVGA, 0x02);
+		ret |= jbt_reg_write16(jbt, JBT_REG_BLANK_TH_TV_QVGA, 0x0804);
+
+		ret |= jbt_reg_write(jbt, JBT_REG_CKV_ON_OFF_QVGA, 0x01);
+		ret |= jbt_reg_write16(jbt, JBT_REG_CKV_1_2_QVGA, 0x0008);
+
+		ret |= jbt_reg_write16(jbt, JBT_REG_OEV_TIMING_QVGA, 0x050a);
+		ret |= jbt_reg_write16(jbt, JBT_REG_ASW_TIMING_1_QVGA, 0x0a19);
+		ret |= jbt_reg_write(jbt, JBT_REG_ASW_TIMING_2_QVGA, 0x0a);
+	}
+
+	return ret ? -EIO : 0;
+}
+
+
+static int jbt_off_to_normal(struct jbt_info *jbt)
+{
+	int ret;
+
+	struct jbt6k74_platform_data *pdata = jbt->spi->dev.platform_data;
+
+	gpio_set_value_cansleep(pdata->gpio_reset, 1);
+	ret = regulator_bulk_enable(ARRAY_SIZE(jbt->supplies), jbt->supplies);
+	mdelay(200);
+
+	/* three times command zero */
+	ret |= jbt_reg_write_nodata(jbt, 0x00);
+	mdelay(1);
+	ret |= jbt_reg_write_nodata(jbt, 0x00);
+	mdelay(1);
+	ret |= jbt_reg_write_nodata(jbt, 0x00);
+	mdelay(1);
+
+	/* deep standby out */
+	ret |= jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x11);
+	mdelay(1);
+	if (ret != 0)
+		printk (KERN_ERR "Ignored ret value:%i",ret);
+
+	ret |= jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE, 0x28);
+
+	/* (re)initialize register set */
+	ret |= jbt_init_regs(jbt);
+	if (ret != 0)
+		printk (KERN_ERR "Ignored ret value2:%i",ret);
+
+
+	/* Make sure we are 120 ms after SLEEP_OUT */
+	if (time_before(jiffies, jbt->next_sleep))
+		mdelay(jiffies_to_msecs(jbt->next_sleep - jiffies));
+
+	if (jbt->resolution == JBT_RESOLUTION_VGA) {
+		/* RGB I/F on, RAM wirte off, QVGA through, SIGCON enable */
+		ret = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE, 0x80);
+
+		/* Quad mode off */
+		ret |= jbt_reg_write(jbt, JBT_REG_QUAD_RATE, 0x00);
+	} else {
+		/* RGB I/F on, RAM wirte off, QVGA through, SIGCON enable */
+		ret = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE, 0x81);
+
+		/* Quad mode on */
+		ret |= jbt_reg_write(jbt, JBT_REG_QUAD_RATE, 0x22);
+	}
+
+	/* AVDD on, XVDD on */
+	ret |= jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x16);
+
+	/* Output control */
+	ret |= jbt_reg_write16(jbt, JBT_REG_OUTPUT_CONTROL, 0xdff9);
+
+	/* Turn on display */
+	ret |= jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_ON);
+
+	/* Sleep mode off */
+	ret |= jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_OUT);
+
+	jbt->next_sleep = jiffies + msecs_to_jiffies(120);
+
+	/* Allow the booster and display controller to restart stably */
+	mdelay(5);
+
+	return ret ? -EIO : 0;
+}
+
+static int jbt_normal_to_off(struct jbt_info *jbt)
+{
+	int ret;
+	struct jbt6k74_platform_data *pdata = jbt->spi->dev.platform_data;
+
+	/* Pull the plug! */
+	ret = regulator_bulk_disable(ARRAY_SIZE(jbt->supplies),
+	                             jbt->supplies);
+
+	if (!ret)
+		gpio_set_value_cansleep(pdata->gpio_reset, 0);
+
+	return ret ? -EIO : 0;
+}
+
+
+static int jbt_normal_to_standby(struct jbt_info *jbt)
+{
+	int ret;
+
+	if ( jbt->power_mode != JBT_POWER_MODE_NORMAL ) return 0;
+
+	/* Make sure we are 120 ms after SLEEP_{IN,OUT} */
+	while (time_before(jiffies, jbt->next_sleep)) cpu_relax();
+
+	/* Sleep mode on */
+	ret = jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_OFF);
+	ret |= jbt_reg_write16(jbt, JBT_REG_OUTPUT_CONTROL, 0x8000 | 1 << 3);
+
+	ret |= jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_IN);
+	jbt->next_sleep = jiffies + msecs_to_jiffies(150);
+
+	jbt->power_mode = JBT_POWER_MODE_STANDBY;
+
+	return ret ? -EIO : 0;
+}
+
+
+static int jbt_standby_to_normal(struct jbt_info *jbt)
+{
+	int ret;
+
+	if ( jbt->power_mode != JBT_POWER_MODE_STANDBY ) return 0;
+
+	/* Make sure we are 120 ms after SLEEP_{IN,OUT} */
+	while (time_before(jiffies, jbt->next_sleep)) cpu_relax();
+
+	ret = jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_OUT);
+	jbt->next_sleep = jiffies + msecs_to_jiffies(150);
+
+	ret |= jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_ON);
+	ret |= jbt_reg_write16(jbt, JBT_REG_OUTPUT_CONTROL, 0xdff9);
+
+	jbt->power_mode = JBT_POWER_MODE_NORMAL;
+
+	return ret ? -EIO : 0;
+}
+
+
+static int jbt6k74_enter_power_mode(struct jbt_info *jbt,
+					enum jbt_power_mode new_mode)
+{
+	int ret = -EINVAL;
+
+	printk(KERN_CRIT "entering (old_state=%s, new_state=%s)\n",
+			jbt_power_mode_names[jbt->power_mode],
+			jbt_power_mode_names[new_mode]);
+
+	mutex_lock(&jbt->lock);
+
+	switch (jbt->power_mode) {
+	case JBT_POWER_MODE_OFF:
+		switch (new_mode) {
+		case JBT_POWER_MODE_OFF:
+			ret = 0;
+			break;
+		case JBT_POWER_MODE_NORMAL:
+			ret = jbt_off_to_normal(jbt);
+			break;
+		case JBT_POWER_MODE_STANDBY:
+			ret = -EINVAL;
+			break;
+		}
+		break;
+	case JBT_POWER_MODE_NORMAL:
+		switch (new_mode) {
+		case JBT_POWER_MODE_NORMAL:
+			ret = 0;
+			break;
+		case JBT_POWER_MODE_OFF:
+			ret = jbt_normal_to_off(jbt);
+			break;
+		case JBT_POWER_MODE_STANDBY:
+			ret = -EINVAL;
+			break;
+		}
+		break;
+	case JBT_POWER_MODE_STANDBY:
+		ret = -EINVAL;
+		break;
+	}
+
+	if (ret == 0) {
+		jbt->power_mode = new_mode;
+	} else {
+		dev_err(&jbt->spi->dev, "Failed to enter state '%s': %d\n",
+				jbt_power_mode_names[new_mode], ret);
+	}
+
+	mutex_unlock(&jbt->lock);
+
+	return ret;
+}
+
+static int jbt6k74_set_resolution(struct jbt_info *jbt,
+					enum jbt_resolution new_resolution)
+{
+	int old_resolution;
+	int ret = 0;
+
+	if ( !jbt ) return -1;
+
+	mutex_lock(&jbt->lock);
+
+	if ( jbt->resolution == new_resolution ) goto out_unlock;
+	if ( jbt->power_mode == JBT_POWER_MODE_OFF ) goto out_unlock;
+
+	old_resolution = jbt->resolution;
+	jbt->resolution = new_resolution;
+
+	if ( jbt->power_mode == JBT_POWER_MODE_NORMAL ) {
+
+		ret = jbt_normal_to_standby(jbt);
+
+		mdelay(25);
+
+		if (jbt->resolution == JBT_RESOLUTION_VGA) {
+			/* Quad mode off */
+			ret |= jbt_reg_write(jbt, JBT_REG_QUAD_RATE, 0x00);
+			ret = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE, 0x80);
+		} else {
+			/* Quad mode on */
+			ret |= jbt_reg_write(jbt, JBT_REG_QUAD_RATE, 0x22);
+			ret = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE, 0x81);
+		}
+
+		mdelay(25);
+
+		ret |= jbt_standby_to_normal(jbt);
+
+		if (ret) {
+			jbt->resolution = old_resolution;
+			dev_err(&jbt->spi->dev,
+			        "Failed to set resolution '%s')\n",
+				jbt_resolution_names[new_resolution]);
+		}
+
+	}
+
+out_unlock:
+	mutex_unlock(&jbt->lock);
+
+	return ret;
+}
+
+static ssize_t resolution_read(struct device *dev,
+				struct device_attribute *attr, char *buf)
+{
+	struct jbt_info *jbt = dev_get_drvdata(dev);
+
+	if (jbt->resolution >= ARRAY_SIZE(jbt_resolution_names))
+		return -EIO;
+
+	return sprintf(buf, "%s\n", jbt_resolution_names[jbt->resolution]);
+}
+
+static ssize_t resolution_write(struct device *dev,
+				struct device_attribute *attr,
+				const char *buf, size_t count)
+{
+	struct jbt_info *jbt = dev_get_drvdata(dev);
+	int i, ret;
+
+	for (i = 0; i < ARRAY_SIZE(jbt_resolution_names); i++) {
+		if (!strncmp(buf, jbt_resolution_names[i],
+			strlen(jbt_resolution_names[i]))) {
+			ret = jbt6k74_set_resolution(jbt, i);
+			if (ret)
+				return ret;
+			return count;
+		}
+	}
+
+	return -EINVAL;
+}
+
+static DEVICE_ATTR(resolution, 0644, resolution_read, resolution_write);
+
+static int reg_by_string(const char *name)
+{
+	if (!strcmp(name, "gamma_fine1"))
+		return JBT_REG_GAMMA1_FINE_1;
+	else if (!strcmp(name, "gamma_fine2"))
+		return JBT_REG_GAMMA1_FINE_2;
+	else if (!strcmp(name, "gamma_inclination"))
+		return JBT_REG_GAMMA1_INCLINATION;
+	else
+		return JBT_REG_GAMMA1_BLUE_OFFSET;
+}
+
+static ssize_t gamma_read(struct device *dev, struct device_attribute *attr,
+			  char *buf)
+{
+	struct jbt_info *jbt = dev_get_drvdata(dev);
+	int reg = reg_by_string(attr->attr.name);
+	uint16_t val;
+
+	mutex_lock(&jbt->lock);
+	val = jbt->reg_cache[reg];
+	mutex_unlock(&jbt->lock);
+
+	return sprintf(buf, "0x%04x\n", val);
+}
+
+static ssize_t gamma_write(struct device *dev, struct device_attribute *attr,
+			   const char *buf, size_t count)
+{
+	int ret;
+	struct jbt_info *jbt = dev_get_drvdata(dev);
+	int reg = reg_by_string(attr->attr.name);
+	unsigned long val;
+
+	ret = strict_strtoul(buf, 10, &val);
+	if (ret)
+		return ret;
+
+	mutex_lock(&jbt->lock);
+	jbt_reg_write(jbt, reg, val & 0xff);
+	mutex_unlock(&jbt->lock);
+
+	return count;
+}
+
+static ssize_t reset_write(struct device *dev, struct device_attribute *attr,
+			   const char *buf, size_t count)
+{
+	int ret;
+	struct jbt_info *jbt = dev_get_drvdata(dev);
+	struct jbt6k74_platform_data *pdata = jbt->spi->dev.platform_data;
+	enum jbt_power_mode old_power_mode = jbt->power_mode;
+
+	mutex_lock(&jbt->lock);
+
+	if (gpio_is_valid(pdata->gpio_reset)) {
+		/* hard reset the jbt6k74 */
+		gpio_set_value_cansleep(pdata->gpio_reset, 0);
+		mdelay(120);
+		gpio_set_value_cansleep(pdata->gpio_reset, 1);
+		mdelay(120);
+	}
+
+	ret = jbt_reg_write_nodata(jbt, 0x01);
+	if (ret < 0)
+		dev_err(&jbt->spi->dev, "cannot soft reset\n");
+	mdelay(120);
+
+	mutex_unlock(&jbt->lock);
+
+	jbt->power_mode = JBT_POWER_MODE_OFF;
+	jbt6k74_enter_power_mode(jbt, old_power_mode);
+
+	return count;
+}
+
+static DEVICE_ATTR(gamma_fine1, 0644, gamma_read, gamma_write);
+static DEVICE_ATTR(gamma_fine2, 0644, gamma_read, gamma_write);
+static DEVICE_ATTR(gamma_inclination, 0644, gamma_read, gamma_write);
+static DEVICE_ATTR(gamma_blue_offset, 0644, gamma_read, gamma_write);
+static DEVICE_ATTR(reset, 0600, NULL, reset_write);
+
+static struct attribute *jbt_sysfs_entries[] = {
+	&dev_attr_resolution.attr,
+	&dev_attr_gamma_fine1.attr,
+	&dev_attr_gamma_fine2.attr,
+	&dev_attr_gamma_inclination.attr,
+	&dev_attr_gamma_blue_offset.attr,
+	&dev_attr_reset.attr,
+	NULL,
+};
+
+static struct attribute_group jbt_attr_group = {
+	.name	= NULL,
+	.attrs	= jbt_sysfs_entries,
+};
+
+
+static int jbt6k74_set_mode(struct lcd_device *ld, struct fb_videomode *m)
+{
+	int ret = -EINVAL;
+	struct jbt_info *jbt = dev_get_drvdata(&ld->dev);
+
+	if (m->xres == 240 && m->yres == 320) {
+		ret = jbt6k74_set_resolution(jbt, JBT_RESOLUTION_QVGA);
+	} else if (m->xres == 480 && m->yres == 640) {
+		ret = jbt6k74_set_resolution(jbt, JBT_RESOLUTION_VGA);
+	} else {
+		dev_err(&jbt->spi->dev, "Unknown resolution.\n");
+		jbt6k74_enter_power_mode(jbt, JBT_POWER_MODE_OFF);
+	}
+
+	return ret;
+}
+
+static int jbt6k74_set_power(struct lcd_device *ld, int power)
+{
+	int ret = -EINVAL;
+	struct jbt_info *jbt = dev_get_drvdata(&ld->dev);
+
+	jbt->blank_mode = power;
+	//cancel_rearming_delayed_work(&jbt->blank_work);
+
+	switch (power) {
+	case FB_BLANK_UNBLANK:
+		dev_dbg(&jbt->spi->dev, "unblank\n");
+		mdelay(20);
+		ret = jbt6k74_enter_power_mode(jbt, JBT_POWER_MODE_NORMAL);
+		break;
+	case FB_BLANK_NORMAL:
+		dev_dbg(&jbt->spi->dev, "blank\n");
+		ret = jbt6k74_enter_power_mode(jbt, JBT_POWER_MODE_OFF);
+		break;
+	case FB_BLANK_POWERDOWN:
+		dev_dbg(&jbt->spi->dev, "powerdown\n");
+		//ret = schedule_delayed_work(&jbt->blank_work, HZ);
+		jbt6k74_enter_power_mode(jbt, JBT_POWER_MODE_OFF);
+		ret = 1;
+		break;
+	default:
+		break;
+	}
+
+	return ret;
+}
+
+static int jbt6k74_get_power(struct lcd_device *ld)
+{
+	struct jbt_info *jbt = dev_get_drvdata(&ld->dev);
+
+	switch (jbt->power_mode) {
+	case JBT_POWER_MODE_NORMAL:
+		return FB_BLANK_UNBLANK;
+	case JBT_POWER_MODE_OFF:
+		return FB_BLANK_NORMAL;
+	default:
+		return JBT_POWER_MODE_OFF;
+	}
+}
+
+struct lcd_ops jbt6k74_lcd_ops = {
+	.set_power = jbt6k74_set_power,
+	.get_power = jbt6k74_get_power,
+	.set_mode  = jbt6k74_set_mode,
+};
+
+/* linux device model infrastructure */
+
+static int __devinit jbt_probe(struct spi_device *spi)
+{
+	int ret;
+	struct jbt_info *jbt;
+	struct jbt6k74_platform_data *pdata = spi->dev.platform_data;
+
+	/* the controller doesn't have a MISO pin; we can't do detection */
+
+	spi->mode = SPI_CPOL | SPI_CPHA;
+	spi->bits_per_word = 9;
+
+	ret = spi_setup(spi);
+	if (ret < 0) {
+		dev_err(&spi->dev,
+			"Failed to setup spi\n");
+		return ret;
+	}
+
+	jbt = kzalloc(sizeof(*jbt), GFP_KERNEL);
+	if (!jbt)
+		return -ENOMEM;
+
+	jbt_global = jbt;
+
+	jbt->spi = spi;
+
+	jbt->lcd_dev = lcd_device_register("jbt6k74-lcd", &spi->dev, jbt,
+						&jbt6k74_lcd_ops);
+
+	if (IS_ERR(jbt->lcd_dev)) {
+		ret = PTR_ERR(jbt->lcd_dev);
+		goto err_free_drvdata;
+	}
+
+	jbt->resolution = JBT_RESOLUTION_VGA;
+	jbt->next_sleep = jiffies + msecs_to_jiffies(120);
+	jbt->power_mode = JBT_POWER_MODE_OFF;
+	mutex_init(&jbt->lock);
+
+	dev_set_drvdata(&spi->dev, jbt);
+
+	jbt->supplies[0].supply = "VDC";
+	jbt->supplies[1].supply = "VDDIO";
+
+	ret = regulator_bulk_get(&spi->dev, ARRAY_SIZE(jbt->supplies),
+					jbt->supplies);
+	if (ret) {
+		dev_err(&spi->dev, "Failed to power get supplies: %d\n", ret);
+		goto err_unregister_lcd;
+	}
+
+	if (gpio_is_valid(pdata->gpio_reset)) {
+		ret = gpio_request(pdata->gpio_reset, "jbt6k74 reset");
+		if (ret) {
+			dev_err(&spi->dev, "Failed to request reset gpio: %d\n",
+				ret);
+			goto err_free_supplies;
+		}
+
+		ret = gpio_direction_output(pdata->gpio_reset, 1);
+		if (ret) {
+			dev_err(&spi->dev, "Failed to set reset gpio direction: %d\n",
+				ret);
+			goto err_gpio_free;
+		}
+	}
+
+	ret = sysfs_create_group(&spi->dev.kobj, &jbt_attr_group);
+	if (ret < 0) {
+		dev_err(&spi->dev, "cannot create sysfs group\n");
+		goto err_gpio_free;
+	}
+
+	mdelay(50);
+	ret = jbt6k74_enter_power_mode(jbt, JBT_POWER_MODE_NORMAL);
+	if (ret < 0) {
+		dev_err(&spi->dev, "cannot enter NORMAL state\n");
+		goto err_sysfs_remove;
+	}
+
+
+	if (pdata->probe_completed)
+		(pdata->probe_completed)(&spi->dev);
+
+	return 0;
+
+err_sysfs_remove:
+	sysfs_remove_group(&spi->dev.kobj, &jbt_attr_group);
+err_gpio_free:
+	gpio_free(pdata->gpio_reset);
+err_free_supplies:
+	regulator_bulk_free(ARRAY_SIZE(jbt->supplies), jbt->supplies);
+err_unregister_lcd:
+	lcd_device_unregister(jbt->lcd_dev);
+err_free_drvdata:
+	dev_set_drvdata(&spi->dev, NULL);
+	kfree(jbt);
+
+	return ret;
+}
+
+static int __devexit jbt_remove(struct spi_device *spi)
+{
+	struct jbt_info *jbt = dev_get_drvdata(&spi->dev);
+	struct jbt6k74_platform_data *pdata = jbt->spi->dev.platform_data;
+
+	/* We don't want to switch off the display in case the user
+	 * accidentially unloads the module (whose use count normally is 0) */
+	jbt6k74_enter_power_mode(jbt, JBT_POWER_MODE_NORMAL);
+
+	sysfs_remove_group(&spi->dev.kobj, &jbt_attr_group);
+
+	if (gpio_is_valid(pdata->gpio_reset))
+		gpio_free(pdata->gpio_reset);
+
+	lcd_device_unregister(jbt->lcd_dev);
+
+	dev_set_drvdata(&spi->dev, NULL);
+
+	regulator_bulk_free(ARRAY_SIZE(jbt->supplies), jbt->supplies);
+	kfree(jbt);
+
+	return 0;
+}
+
+/* Begin horrible layering violations in the interest of making stuff work */
+
+int jbt6k74_finish_resolutionchange(enum jbt_resolution new_resolution)
+{
+	if ( !jbt_global ) return 0;
+	return jbt6k74_set_resolution(jbt_global, new_resolution);
+}
+EXPORT_SYMBOL_GPL(jbt6k74_finish_resolutionchange);
+
+void jbt6k74_setpower(enum jbt_power_mode new_power)
+{
+	printk(KERN_CRIT "About to set power..\n");
+	if ( !jbt_global ) return;
+	printk(KERN_CRIT "Setting JBT power.. %i\n", new_power);
+	jbt6k74_enter_power_mode(jbt_global, new_power);
+}
+EXPORT_SYMBOL_GPL(jbt6k74_setpower);
+
+/* End horrible layering violations */
+
+#ifdef CONFIG_PM
+static int jbt_suspend(struct spi_device *spi, pm_message_t state)
+{
+	struct jbt_info *jbt = dev_get_drvdata(&spi->dev);
+
+	jbt->suspend_mode = jbt->power_mode;
+
+	jbt6k74_enter_power_mode(jbt, JBT_POWER_MODE_OFF);
+
+	dev_info(&spi->dev, "suspended\n");
+
+	return 0;
+}
+
+int jbt6k74_resume(struct spi_device *spi)
+{
+	struct jbt_info *jbt = dev_get_drvdata(&spi->dev);
+	dev_info(&spi->dev, "starting resume: %d\n", jbt->suspend_mode);
+
+	mdelay(20);
+
+	jbt->suspended = 0;
+	jbt6k74_enter_power_mode(jbt, jbt->suspend_mode);
+
+	dev_info(&spi->dev, "resumed: %d\n", jbt->suspend_mode);
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(jbt6k74_resume);
+
+#else
+#define jbt_suspend	NULL
+#define jbt6k74_resume	NULL
+#endif
+
+static struct spi_driver jbt6k74_driver = {
+	.driver = {
+		.name	= "jbt6k74",
+		.owner	= THIS_MODULE,
+	},
+
+	.probe	 = jbt_probe,
+	.remove	 = __devexit_p(jbt_remove),
+	.suspend = jbt_suspend,
+	.resume	 = jbt6k74_resume,
+};
+
+static int __init jbt_init(void)
+{
+	return spi_register_driver(&jbt6k74_driver);
+}
+module_init(jbt_init);
+
+static void __exit jbt_exit(void)
+{
+	spi_unregister_driver(&jbt6k74_driver);
+}
+module_exit(jbt_exit);
+
+MODULE_DESCRIPTION("SPI driver for tpo JBT6K74-AS LCM control interface");
+MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
+MODULE_LICENSE("GPL");
diff -uNra linux-3.0.82/drivers/video/backlight/Kconfig linux-3.0.82x/drivers/video/backlight/Kconfig
--- linux-3.0.82/drivers/video/backlight/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/video/backlight/Kconfig	2017-09-23 03:42:50.274674281 +0800
@@ -117,6 +117,20 @@
 	  If you have an LD9040 Panel, say Y to enable its
 	  control driver.
 
+config LCD_JBT6K74
+	tristate "TPO JBT6K74-AS TFT display ASIC control interface"
+	depends on SPI_MASTER && SYSFS && LCD_CLASS_DEVICE
+	help
+	  SPI driver for the control interface of TFT panels containing
+	  the TPO JBT6K74-AS controller ASIC, such as the TPO TD028TTEC1
+	  TFT diplay module used in the Openmoko Freerunner GSM phone.
+
+	  The control interface is required for display operation, as it
+	  controls power management, display timing and gamma calibration.
+
+	  This driver can also be build as a module, if so it will be called
+	  jbt6k74.
+
 endif # LCD_CLASS_DEVICE
 
 #
diff -uNra linux-3.0.82/drivers/video/backlight/Makefile linux-3.0.82x/drivers/video/backlight/Makefile
--- linux-3.0.82/drivers/video/backlight/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/video/backlight/Makefile	2017-09-23 03:42:50.278674269 +0800
@@ -13,6 +13,7 @@
 obj-$(CONFIG_LCD_TOSA)		   += tosa_lcd.o
 obj-$(CONFIG_LCD_S6E63M0)	+= s6e63m0.o
 obj-$(CONFIG_LCD_LD9040)	+= ld9040.o
+obj-$(CONFIG_LCD_JBT6K74)	+= jbt6k74.o
 
 obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o
 obj-$(CONFIG_BACKLIGHT_ATMEL_PWM)    += atmel-pwm-bl.o
diff -uNra linux-3.0.82/drivers/video/Kconfig linux-3.0.82x/drivers/video/Kconfig
--- linux-3.0.82/drivers/video/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/video/Kconfig	2017-09-23 03:42:50.278674269 +0800
@@ -258,7 +258,8 @@
 
 comment "Frame buffer hardware drivers"
 	depends on FB
-
+	
+	
 config FB_CIRRUS
 	tristate "Cirrus Logic support"
 	depends on FB && (ZORRO || PCI)
@@ -468,6 +469,126 @@
 	  this driver, say Y or M; otherwise say N. You must specify the
 	  GPIO IO address to be used for setting control and data.
 
+config FB_SSD1305
+	tristate "SSD1305/SSD1306 Monochrome OLED display module support"
+	depends on FB
+	select FB_SYS_FILLRECT
+	select FB_SYS_COPYAREA
+	select FB_SYS_IMAGEBLIT
+	select FB_SYS_FOPS
+	help
+	  This enables support for the ssd1305/ssd1306 Monochrome OLED display modules.
+	  This driver was tested with a 128x64 panel. If you anticipate using
+	  this driver, say Y or M; otherwise say N.
+
+config SSD1305_RATE
+       int "Refresh rate (hertz)"
+	depends on FB_SSD1305
+	default "20"
+	---help---
+	  Refresh rate of the LCD.
+
+	  As the LCD is not memory mapped, the driver has to make the work by
+	  software. This means you should be careful setting this value higher.
+	  If your CPUs are really slow or you feel the system is slowed down,
+	  decrease the value.
+
+	  Be careful modifying this value to a very high value:
+	  You can freeze the computer, or the LCD maybe can't draw as fast as you
+	  are requesting.
+
+	  If you don't know what I'm talking about, ignore it.
+
+	  If you compile this as a module, you can still override this
+	  value using the module parameters.
+
+choice
+	prompt  "SSD1305/SSD1306 bus interface mode"
+	depends on (FB_SSD1305)
+	default SSD1305_8080
+
+config SSD1305_8080
+	bool "8080 bus interface mode"
+
+config SSD1305_6800
+	bool "6800 bus interface mode"
+
+config SSD1305_SPI3
+	bool "3-wire SPI bus interface mode"
+
+config SSD1305_SPI4
+	bool "4-wire SPI bus interface mode"
+
+config SSD1305_I2C
+	bool "I2C bus interface mode"
+endchoice
+
+config FB_ST7565
+	tristate "Sitronix ST7565 framebuffer support"
+	depends on FB
+	depends on GENERIC_GPIO
+	select FB_SYS_FOPS
+	select FB_SYS_FILLRECT
+	select FB_SYS_COPYAREA
+	select FB_SYS_IMAGEBLIT
+	select FB_DEFERRED_IO
+	help
+	  This driver implements support for the Sitronix ST7565 controller.
+
+choice
+	prompt  "ST7565 bus interface mode"
+	depends on FB_ST7565
+	default ST7565_8080
+
+config ST7565_8080
+	bool "8080 bus interface mode"
+
+config ST7565_6800
+	bool "6800 bus interface mode"
+
+config ST7565_SPI3
+	bool "3-wire SPI bus interface mode"
+
+config ST7565_SPI4
+	bool "4-wire SPI bus interface mode"
+
+config ST7565_I2C
+	bool "I2C bus interface mode"
+endchoice
+
+config FB_ST7920
+	tristate "ST7920 Monochrome display module support"
+	depends on FB
+	select FB_SYS_FILLRECT
+	select FB_SYS_COPYAREA
+	select FB_SYS_IMAGEBLIT
+	select FB_SYS_FOPS
+	help
+	  This enables support for the st7920 Monochrome display modules.
+	  This driver was tested with a 128x64 panel. If you anticipate using
+	  this driver, say Y or M; otherwise say N.
+
+config ST7920_RATE
+       int "Refresh rate (hertz)"
+	depends on FB_ST7920
+	default "20"
+	---help---
+	  Refresh rate of the LCD.
+
+	  As the LCD is not memory mapped, the driver has to make the work by
+	  software. This means you should be careful setting this value higher.
+	  If your CPUs are really slow or you feel the system is slowed down,
+	  decrease the value.
+
+	  Be careful modifying this value to a very high value:
+	  You can freeze the computer, or the LCD maybe can't draw as fast as you
+	  are requesting.
+
+	  If you don't know what I'm talking about, ignore it.
+
+	  If you compile this as a module, you can still override this
+	  value using the module parameters.
+
 config FB_ATARI
 	bool "Atari native chipset support"
 	depends on (FB = y) && ATARI
@@ -1856,6 +1977,42 @@
 	  Say Y here if you want to support the built-in frame buffer of
 	  the Motorola 68328 CPU family.
 
+config FB_LOONGSON1
+	tristate "Loongson1 framebuffer support"
+	depends on FB
+	depends on LS1A_MACH || LS1B_MACH || LS1C_MACH
+	select FB_CFB_FILLRECT
+	select FB_CFB_COPYAREA
+	select FB_CFB_IMAGEBLIT
+	default n
+	---help---
+	  Frame buffer driver for the built-in LCD controller in the Loongson1 
+	  processor.
+
+config LS1X_FB0
+	tristate "Display Controller 0"
+	depends on FB_LOONGSON1
+	default n
+
+config LS1X_FB1
+	tristate "Display Controller 1 (only for 1A vga)"
+	depends on FB_LOONGSON1
+	depends on LS1A_MACH
+	default n
+
+config FB_LS1X_I2C
+	bool "Enable DDC2 Support"
+	depends on FB_LOONGSON1
+	select FB_DDC
+	---help---
+		This enables I2C support for Loongson1.  This is used
+		only for getting EDID information from the attached display
+		allowing for robust video mode handling and switching.
+
+		Because fbdev-2.6 requires that drivers must be able to
+		independently validate video mode parameters, you should say Y
+		here.
+
 config FB_PXA168
 	tristate "PXA168/910 LCD framebuffer support"
 	depends on FB && (CPU_PXA168 || CPU_PXA910)
diff -uNra linux-3.0.82/drivers/video/ls1xfb.c linux-3.0.82x/drivers/video/ls1xfb.c
--- linux-3.0.82/drivers/video/ls1xfb.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/video/ls1xfb.c	2017-09-23 03:42:50.278674269 +0800
@@ -0,0 +1,973 @@
+/*
+ *  Copyright (c) 2012 Tang, Haifeng <tanghaifeng-gz@loongson.cn>
+ *
+ *  Based partly on pxa168fb.c
+ *  This file is subject to the terms and conditions of the GNU General Public
+ *  License. See the file COPYING in the main directory of this archive for
+ *  more details.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/string.h>
+#include <linux/interrupt.h>
+#include <linux/slab.h>
+#include <linux/fb.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/uaccess.h>
+#include <linux/ctype.h>
+#include <linux/serial_reg.h>
+#include <video/ls1xfb.h>
+
+#include <ls1b_board.h>
+#include <regs-clk.h>
+#include "ls1xfb.h"
+
+#define DRIVER_NAME_0 "ls1afb"
+#define DRIVER_NAME_1 "ls1bfb"
+#define DRIVER_NAME_2 "ls1xfb"
+#define DRIVER_NAME_3 "ls1avga"
+#define DRIVER_NAME_4 "ls1bvga"
+#define DRIVER_NAME_5 "ls1xvga"
+
+#define DEFAULT_REFRESH		75	/* Hz */
+#define DEFAULT_XRES	800
+#define DEFAULT_YRES	480
+#define DEFAULT_BPP	16
+static u32 default_refresh = DEFAULT_REFRESH;
+static u32 default_xres = DEFAULT_XRES;
+static u32 default_yres = DEFAULT_YRES;
+static u32 default_bpp = 0;
+static int vga_mode = 0;
+
+static int determine_best_pix_fmt(struct fb_var_screeninfo *var)
+{
+	switch (var->bits_per_pixel) {
+		case 1:
+		case 2:
+		case 4:
+		case 8:
+		case 12:
+			return PIX_FMT_RGB444;
+			break;
+		case 15:
+			return PIX_FMT_RGB1555;
+			break;
+		case 16:
+			return PIX_FMT_RGB565;
+			break;
+		case 24:
+		case 32:
+			return PIX_FMT_RGBA888;
+			break;
+		default:
+			return PIX_FMT_RGB565;
+			break;
+	}
+	return -EINVAL;
+}
+
+static void set_pix_fmt(struct fb_var_screeninfo *var, int pix_fmt)
+{
+	switch (pix_fmt) {
+	case PIX_FMT_RGB444:
+		var->bits_per_pixel = 16;
+		var->red.offset = 8;    var->red.length = 4;
+		var->green.offset = 4;   var->green.length = 4;
+		var->blue.offset = 0;    var->blue.length = 4;
+		var->transp.offset = 0;  var->transp.length = 0;
+		break;
+	case PIX_FMT_RGB1555:
+		var->bits_per_pixel = 16;
+		var->red.offset = 10;    var->red.length = 5;
+		var->green.offset = 5;   var->green.length = 5;
+		var->blue.offset = 0;    var->blue.length = 5;
+		var->transp.offset = 0; var->transp.length = 0;
+		break;
+	case PIX_FMT_RGB565:
+		var->bits_per_pixel = 16;
+		var->red.offset = 11;    var->red.length = 5;
+		var->green.offset = 5;   var->green.length = 6;
+		var->blue.offset = 0;    var->blue.length = 5;
+		var->transp.offset = 0;  var->transp.length = 0;
+		break;
+	case PIX_FMT_RGB888PACK:
+		var->bits_per_pixel = 24;
+		var->red.offset = 16;    var->red.length = 8;
+		var->green.offset = 8;   var->green.length = 8;
+		var->blue.offset = 0;    var->blue.length = 8;
+		var->transp.offset = 0;  var->transp.length = 0;
+		break;
+	case PIX_FMT_RGB888UNPACK:
+		var->bits_per_pixel = 32;
+		var->red.offset = 16;    var->red.length = 8;
+		var->green.offset = 8;   var->green.length = 8;
+		var->blue.offset = 0;    var->blue.length = 8;
+		var->transp.offset = 24; var->transp.length = 8;
+		break;
+	case PIX_FMT_RGBA888:
+		var->bits_per_pixel = 32;
+		var->red.offset = 16;    var->red.length = 8;
+		var->green.offset = 8;   var->green.length = 8;
+		var->blue.offset = 0;    var->blue.length = 8;
+		var->transp.offset = 24; var->transp.length = 8;
+		break;
+	}
+}
+
+static int ls1xfb_check_var(struct fb_var_screeninfo *var,
+			      struct fb_info *info)
+{
+	struct ls1xfb_info *fbi = info->par;
+	int pix_fmt, mode_valid = 0;
+
+	/*
+	 * Determine which pixel format we're going to use.
+	 */
+	pix_fmt = determine_best_pix_fmt(var);
+	if (pix_fmt < 0)
+		return pix_fmt;
+	set_pix_fmt(var, pix_fmt);
+	fbi->pix_fmt = pix_fmt;
+
+#if 0
+	if (!info->monspecs.hfmax || !info->monspecs.vfmax ||
+	    !info->monspecs.dclkmax || !fb_validate_mode(var, info))
+		mode_valid = 1;
+
+	/* calculate modeline if supported by monitor */
+	if (!mode_valid && info->monspecs.gtf) {
+		if (!fb_get_mode(FB_MAXTIMINGS, 0, var, info))
+			mode_valid = 1;
+	}
+#endif
+	if (!mode_valid) {
+		const struct fb_videomode *mode;
+
+		mode = fb_find_best_mode(var, &info->modelist);
+		if (mode) {
+//			ls1x_update_var(var, mode);
+			fb_videomode_to_var(var, mode);
+			mode_valid = 1;
+		}
+	}
+
+	if (!mode_valid && info->monspecs.modedb_len)
+		return -EINVAL;
+
+	/*
+	 * Basic geometry sanity checks.
+	 */
+	if (var->xoffset + var->xres > var->xres_virtual) {
+		return -EINVAL;
+//		var->xres_virtual = var->xoffset + var->xres;
+	}
+	if (var->yoffset + var->yres > var->yres_virtual) {
+		return -EINVAL;
+//		var->yres_virtual = var->yoffset + var->yres;
+	}
+	if (var->xres + var->right_margin +
+	    var->hsync_len + var->left_margin > 3000)
+		return -EINVAL;
+	if (var->yres + var->lower_margin +
+	    var->vsync_len + var->upper_margin > 2000)
+		return -EINVAL;
+
+	/*
+	 * Check size of framebuffer.
+	 */
+	if (var->xres_virtual * var->yres_virtual *
+	    (var->bits_per_pixel >> 3) > info->fix.smem_len)
+		return -EINVAL;
+	return 0;
+}
+
+#ifdef CONFIG_LS1B_MACH
+/* only for 1B vga */
+static void set_uart_clock_divider(void)
+{
+	u32 pll, ctrl, rate, divisor;
+	u32 x;
+	int i;
+	int ls1b_uart_base[] = {
+		LS1X_UART0_BASE, LS1X_UART1_BASE, LS1X_UART2_BASE,
+		LS1X_UART3_BASE, LS1X_UART4_BASE, LS1X_UART5_BASE,
+		LS1X_UART6_BASE, LS1X_UART7_BASE, LS1X_UART8_BASE,
+		LS1X_UART9_BASE, LS1X_UART10_BASE, LS1X_UART11_BASE
+	};
+	#define UART_PORT(id, offset)	(u8 *)(KSEG1ADDR(ls1b_uart_base[id] + offset))
+
+	pll = readl(LS1X_CLK_PLL_FREQ);
+	ctrl = readl(LS1X_CLK_PLL_DIV) & DIV_DDR;
+	rate = (12 + (pll & 0x3f)) * APB_CLK / 2
+			+ ((pll >> 8) & 0x3ff) * APB_CLK / 1024 / 2;
+	rate = rate / (ctrl >> DIV_DDR_SHIFT);
+	divisor = rate / 2 / (16*115200);
+	
+	for (i=0; i<12; i++) {
+		x = readb(UART_PORT(i, UART_LCR));
+		writeb(x | UART_LCR_DLAB, UART_PORT(i, UART_LCR));
+	
+		writeb(divisor & 0xff, UART_PORT(i, UART_DLL));
+		writeb((divisor>>8) & 0xff, UART_PORT(i, UART_DLM));
+	
+		writeb(x & ~UART_LCR_DLAB, UART_PORT(i, UART_LCR));
+	}
+}
+
+static void set_clock_divider_forls1bvga(struct ls1xfb_info *fbi,
+			      const struct fb_videomode *m)
+{
+	struct ls1b_vga *input_vga;
+	extern struct ls1b_vga ls1b_vga_modes[];
+
+	for (input_vga=ls1b_vga_modes; input_vga->ls1b_pll_freq !=0; ++input_vga) {
+//		if((input_vga->xres == m->xres) && (input_vga->yres == m->yres) && 
+//			(input_vga->refresh == m->refresh)) {
+		if ((input_vga->xres == m->xres) && (input_vga->yres == m->yres)) {
+			break;
+		}
+	}
+	if (input_vga->ls1b_pll_freq) {
+		writel(input_vga->ls1b_pll_freq, LS1X_CLK_PLL_FREQ);
+		writel(input_vga->ls1b_pll_div, LS1X_CLK_PLL_DIV);
+		set_uart_clock_divider();
+	}
+}
+#endif	//#ifdef CONFIG_LS1B_MACH
+
+#ifdef CONFIG_LS1A_MACH
+int caclulatefreq(unsigned int sys_clk, unsigned int pclk)
+{
+/* Nå€¼å’ŒODå€¼é€‰æ‹©ä¸�æ­£ç¡®ä¼šé€ æˆ�ç³»ç»Ÿæ­»æœºï¼ŒèŽ«å��å…¶å¦™ã€‚OD=2^PIX12 */
+	unsigned int N = 4, PIX12 = 2, OD = 4;
+	unsigned int M = 0, FRAC = 0;
+	unsigned long tmp1, tmp2;
+
+	while (1) {
+		tmp2 = pclk * N * OD;
+		M = tmp2 / sys_clk;
+		if (M <= 1) {
+			N++;
+		} else {
+			tmp1 = sys_clk * M;
+			if (tmp2 < tmp1) {
+				unsigned int tmp3;
+				tmp3 = tmp1; tmp1 = tmp2; tmp2 = tmp3;
+			}
+			if ((tmp2 - tmp1) > 16384) {
+				if (N < 15 ) {
+					N++;
+				} else {
+					N = 15; PIX12++; OD *= 2;
+					if (PIX12 > 3) {
+						printk(KERN_WARNING "Warning: \
+								clock source is out of range.\n");
+						break;
+					}
+				}
+			}
+			else {
+				FRAC = ((tmp2 - tmp1) * 262144) / sys_clk;
+				break;
+			}
+		}
+	}
+//	printk("tmp2-tmp1=%d FRAC=%d\n", tmp2 - tmp1, FRAC);
+//	printk("PIX12=%d N=%d M=%d\n", PIX12, N, M);
+	return ((FRAC<<14) + (PIX12<<12) + (N<<8) + M);
+}
+#endif	//#ifdef CONFIG_LS1A_MACH
+
+static void set_clock_divider(struct ls1xfb_info *fbi,
+			      const struct fb_videomode *m)
+{
+	int divider_int;
+	int needed_pixclk;
+	u64 div_result;
+
+	/*
+	 * Notice: The field pixclock is used by linux fb
+	 * is in pixel second. E.g. struct fb_videomode &
+	 * struct fb_var_screeninfo
+	 */
+
+	/*
+	 * Check input values.
+	 */
+	if (!m || !m->pixclock || !m->refresh) {
+		dev_err(fbi->dev, "Input refresh or pixclock is wrong.\n");
+		return;
+	}
+
+	/*
+	 * Calc divider according to refresh rate.
+	 */
+	div_result = 1000000000000ll;
+	do_div(div_result, m->pixclock);
+	needed_pixclk = (u32)div_result;
+
+#if defined(CONFIG_LS1A_MACH)
+	#define PLL_CTRL(x)		(ioremap((x), 4))
+	/* è®¾ç½®gpuæ—¶é’Ÿé¢‘çŽ‡ä¸º200MHz */
+	divider_int = caclulatefreq(APB_CLK/1000, 200000);
+	writel(divider_int, PLL_CTRL(LS1X_GPU_PLL_CTRL));
+	/* åƒ�ç´ æ—¶é’Ÿ */
+	divider_int = caclulatefreq(APB_CLK/1000, needed_pixclk/1000);
+	writel(divider_int, PLL_CTRL(LS1X_PIX1_PLL_CTRL));
+	writel(divider_int, PLL_CTRL(LS1X_PIX2_PLL_CTRL));
+#elif defined(CONFIG_LS1B_MACH)
+	divider_int = clk_get_rate(fbi->clk) / needed_pixclk / 4;
+	/* check whether divisor is too small. */
+	if (divider_int < 1) {
+		dev_warn(fbi->dev, "Warning: clock source is too slow."
+				"Try smaller resolution\n");
+		divider_int = 1;
+	}
+	else if(divider_int > 15) {
+		dev_warn(fbi->dev, "Warning: clock source is too fast."
+				"Try smaller resolution\n");
+		divider_int = 15;
+	}
+
+	/*
+	 * Set setting to reg.
+	 */
+	{
+		u32 regval = 0;
+		regval = readl(LS1X_CLK_PLL_DIV);
+		regval |= 0x00003000;	//dc_bypass ç½®1
+		regval &= ~0x00000030;	//dc_rst ç½®0
+		regval &= ~(0x1f<<26);	//dc_div æ¸…é›¶
+		regval |= divider_int << 26;
+		writel(regval, LS1X_CLK_PLL_DIV);
+		regval &= ~0x00001000;	//dc_bypass ç½®0
+		writel(regval, LS1X_CLK_PLL_DIV);
+	}
+#elif defined(CONFIG_LS1C_MACH)
+	divider_int = clk_get_rate(fbi->clk) / needed_pixclk;
+	/* check whether divisor is too small. */
+	if (divider_int < 2) {
+		dev_warn(fbi->dev, "Warning: clock source is too slow."
+				"Try smaller resolution\n");
+		divider_int = 1;
+	}
+	else if(divider_int > 127) {
+		dev_warn(fbi->dev, "Warning: clock source is too fast."
+				"Try smaller resolution\n");
+		divider_int = 0x7f;
+	}
+
+	/*
+	 * Set setting to reg.
+	 */
+	{
+		u32 regval = 0;
+		regval = readl(LS1X_CLK_PLL_DIV);
+		/* æ³¨æ„�ï¼šé¦–å…ˆéœ€è¦�æŠŠåˆ†é¢‘ä½¿èƒ½ä½�æ¸…é›¶ */
+		writel(regval & ~DIV_DC_EN, LS1X_CLK_PLL_DIV);
+		regval |= DIV_DC_EN | DIV_DC_SEL_EN | DIV_DC_SEL;
+		regval &= ~DIV_DC;
+		regval |= divider_int << DIV_DC_SHIFT;
+		writel(regval, LS1X_CLK_PLL_DIV);
+	}
+#endif
+}
+
+static void set_graphics_start(struct fb_info *info, int xoffset, int yoffset)
+{
+	struct ls1xfb_info *fbi = info->par;
+	struct fb_var_screeninfo *var = &info->var;
+	int pixel_offset;
+	unsigned long addr;
+
+	pixel_offset = (yoffset * var->xres_virtual) + xoffset;
+
+	addr = fbi->fb_start_dma + (pixel_offset * (var->bits_per_pixel >> 3));
+	printk("---------set_graphics_start 0x%x-----------\n", addr);
+	printk("frame buffer addr 0x%x \n", fbi->reg_base + LS1X_FB_ADDR0);
+	writel(addr, fbi->reg_base + LS1X_FB_ADDR0);
+	writel(addr, fbi->reg_base + LS1X_FB_ADDR1);
+}
+
+static void set_dumb_panel_control(struct fb_info *info)
+{
+	struct ls1xfb_info *fbi = info->par;
+	struct ls1xfb_mach_info *mi = fbi->dev->platform_data;
+	u32 x;
+
+	/*
+	 * Preserve enable flag.
+	 */
+	x = readl(fbi->reg_base + LS1X_FB_PANEL_CONF) & 0x00000101;
+
+	if (unlikely(vga_mode)) {
+		/* have to set 0x80001310 */
+		writel(x | 0x80001310, fbi->reg_base + LS1X_FB_PANEL_CONF);
+	} else {
+		x |= mi->invert_pixde ? LS1X_FB_PANEL_CONF_DE_POL : 0;
+		x |= mi->invert_pixclock ? LS1X_FB_PANEL_CONF_CLK_POL : 0;
+		writel(x, fbi->reg_base + LS1X_FB_PANEL_CONF);
+	}
+
+	x = readl(fbi->reg_base + LS1X_FB_HSYNC) & ~LS1X_FB_HSYNC_POL;
+	x |= (info->var.sync & FB_SYNC_HOR_HIGH_ACT) ? LS1X_FB_HSYNC_POL : 0;
+	writel(x, fbi->reg_base + LS1X_FB_HSYNC);
+
+	x = readl(fbi->reg_base + LS1X_FB_VSYNC) & ~LS1X_FB_VSYNC_POL;
+	x |= (info->var.sync & FB_SYNC_VERT_HIGH_ACT) ? LS1X_FB_VSYNC_POL : 0;
+	writel(x, fbi->reg_base + LS1X_FB_VSYNC);
+}
+
+static void set_dumb_screen_dimensions(struct fb_info *info)
+{
+	struct ls1xfb_info *fbi = info->par;
+	struct fb_var_screeninfo *v = &info->var;
+	int x;
+	int y;
+
+	x = v->xres + v->right_margin + v->hsync_len + v->left_margin;
+	y = v->yres + v->lower_margin + v->vsync_len + v->upper_margin;
+
+	writel((readl(fbi->reg_base + LS1X_FB_HDISPLAY) & ~LS1X_FB_HDISPLAY_TOTAL) | (x << 16), 
+		fbi->reg_base + LS1X_FB_HDISPLAY);
+	writel((readl(fbi->reg_base + LS1X_FB_VDISPLAY) & ~LS1X_FB_HDISPLAY_TOTAL) | (y << 16), 
+		fbi->reg_base + LS1X_FB_VDISPLAY);
+}
+
+static int ls1xfb_set_par(struct fb_info *info)
+{
+	struct ls1xfb_info *fbi = info->par;
+	struct fb_var_screeninfo *var = &info->var;
+	struct fb_videomode mode;
+	u32 x;
+	struct ls1xfb_mach_info *mi;
+
+	mi = fbi->dev->platform_data;
+
+	/*
+	 * Set additional mode info.
+	 */
+	info->fix.visual = FB_VISUAL_TRUECOLOR;
+	info->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8;
+//	info->fix.ypanstep = var->yres;
+
+	/*
+	 * Disable panel output while we setup the display.
+	 */
+	x = readl(fbi->reg_base + LS1X_FB_PANEL_CONF);
+	writel(x & ~LS1X_FB_PANEL_CONF_DE, fbi->reg_base + LS1X_FB_PANEL_CONF);
+
+	/*
+	 * convet var to video mode
+	 */
+	fb_var_to_videomode(&mode, &info->var);
+
+	/* Calculate clock divisor. */
+#ifdef CONFIG_LS1B_MACH
+	if (unlikely(vga_mode)) {
+		set_clock_divider_forls1bvga(fbi, &mode);
+	}
+	else 
+#endif
+	{
+		set_clock_divider(fbi, &mode);
+	}
+
+	/*
+	 * Configure dumb panel ctrl regs & timings.
+	 */
+	set_dumb_panel_control(info);
+	set_dumb_screen_dimensions(info);
+
+	writel((readl(fbi->reg_base + LS1X_FB_HDISPLAY) & ~LS1X_FB_HDISPLAY_END) | (var->xres),
+		fbi->reg_base + LS1X_FB_HDISPLAY);	/* æ˜¾ç¤ºå±�ä¸€è¡Œä¸­æ˜¾ç¤ºåŒºçš„åƒ�ç´ æ•° */
+	writel((readl(fbi->reg_base + LS1X_FB_VDISPLAY) & ~LS1X_FB_VDISPLAY_END) | (var->yres),
+		fbi->reg_base + LS1X_FB_VDISPLAY);	/* æ˜¾ç¤ºå±�ä¸­æ˜¾ç¤ºåŒºçš„è¡Œæ•° */
+
+	writel((readl(fbi->reg_base + LS1X_FB_HSYNC) & 0xc0000000) | 0x40000000 | 
+			((var->right_margin + var->xres + var->hsync_len) << 16) | 
+			(var->right_margin + var->xres),
+			fbi->reg_base + LS1X_FB_HSYNC);
+	writel((readl(fbi->reg_base + LS1X_FB_VSYNC) & 0xc0000000) | 0x40000000 | 
+			((var->lower_margin + var->yres + var->vsync_len) << 16) | 
+			(var->lower_margin + var->yres),
+			fbi->reg_base + LS1X_FB_VSYNC);
+
+	/*
+	 * Configure global panel parameters.
+	 */
+	x = readl(fbi->reg_base + LS1X_FB_CONF) & ~LS1X_FB_CONF_FORMAT;
+	if (fbi->pix_fmt > 3) {
+		writel(x | LS1X_FB_CONF_RESET | 4, fbi->reg_base + LS1X_FB_CONF);
+	}
+	else {
+		writel(x | LS1X_FB_CONF_RESET | fbi->pix_fmt, fbi->reg_base + LS1X_FB_CONF);
+	}
+
+#if defined(CONFIG_LS1C_MACH)
+	writel((info->fix.line_length + 0x7f) & ~0x7f, fbi->reg_base + LS1X_FB_STRIDE);
+#else
+	writel((info->fix.line_length + 0xff) & ~0xff, fbi->reg_base + LS1X_FB_STRIDE);
+#endif
+	writel(0, fbi->reg_base + LS1X_FB_ORIGIN);
+
+	/*
+	 * Re-enable panel output.
+	 */
+	x = readl(fbi->reg_base + LS1X_FB_PANEL_CONF);
+	writel(x | LS1X_FB_PANEL_CONF_DE, fbi->reg_base + LS1X_FB_PANEL_CONF);
+
+	return 0;
+}
+
+static unsigned int chan_to_field(unsigned int chan, struct fb_bitfield *bf)
+{
+	return ((chan & 0xffff) >> (16 - bf->length)) << bf->offset;
+}
+
+static int
+ls1xfb_setcolreg(unsigned int regno, unsigned int red, unsigned int green,
+		 unsigned int blue, unsigned int trans, struct fb_info *info)
+{
+	struct ls1xfb_info *fbi = info->par;
+	u32 val;
+
+	if (info->var.grayscale)
+		red = green = blue = (19595 * red + 38470 * green +
+					7471 * blue) >> 16;
+
+	if (info->fix.visual == FB_VISUAL_TRUECOLOR && regno < 16) {
+		val =  chan_to_field(red,   &info->var.red);
+		val |= chan_to_field(green, &info->var.green);
+		val |= chan_to_field(blue , &info->var.blue);
+		fbi->pseudo_palette[regno] = val;
+	}
+
+	return 0;
+}
+
+static int ls1xfb_pan_display(struct fb_var_screeninfo *var,
+				struct fb_info *info)
+{
+	set_graphics_start(info, var->xoffset, var->yoffset);
+
+	return 0;
+}
+
+static struct fb_ops ls1xfb_ops = {
+	.owner		= THIS_MODULE,
+	.fb_check_var	= ls1xfb_check_var,
+	.fb_set_par	= ls1xfb_set_par,
+	.fb_setcolreg	= ls1xfb_setcolreg,
+//	.fb_blank	= ls1xfb_blank,
+	.fb_pan_display	= ls1xfb_pan_display,
+	.fb_fillrect	= cfb_fillrect,
+	.fb_copyarea	= cfb_copyarea,
+	.fb_imageblit	= cfb_imageblit,
+//	.fb_ioctl	= ls1xfb_ioctl,	/* å�¯ç”¨äºŽLCDæŽ§åˆ¶å™¨çš„Switch Panelä½�ï¼Œå®žçŽ°æ˜¾ç¤ºå�•å…ƒ0å’Œ1çš„ç›¸äº’å¤�åˆ¶ */
+};
+
+#if defined(CONFIG_FB_LS1X_I2C)
+static void ls1x_update_var(struct fb_var_screeninfo *var,
+			      const struct fb_videomode *modedb)
+{
+	var->xres = var->xres_virtual = modedb->xres;
+	var->yres = modedb->yres;
+	if (var->yres_virtual < var->yres)
+		var->yres_virtual = var->yres;
+	var->xoffset = var->yoffset = 0;
+	var->pixclock = modedb->pixclock;
+	var->left_margin = modedb->left_margin;
+	var->right_margin = modedb->right_margin;
+	var->upper_margin = modedb->upper_margin;
+	var->lower_margin = modedb->lower_margin;
+	var->hsync_len = modedb->hsync_len;
+	var->vsync_len = modedb->vsync_len;
+	var->sync = modedb->sync;
+	var->vmode = modedb->vmode;
+}
+#endif
+
+static int __devinit ls1xfb_init_mode(struct fb_info *info,
+			      struct ls1xfb_mach_info *mi)
+{
+	struct ls1xfb_info *fbi = info->par;
+	struct fb_var_screeninfo *var = &info->var;
+	int ret = 0;
+	u32 total_w, total_h, refresh;
+	u64 div_result;
+	const struct fb_videomode *m;
+//	struct fb_videomode *m;
+
+	/*
+	 * Set default value
+	 */
+	refresh = default_refresh;
+	var->xres = default_xres;
+	var->yres = default_yres;
+	if (default_bpp)
+		var->bits_per_pixel = default_bpp;
+
+	/* try to find best video mode. */
+	m = fb_find_best_mode(&info->var, &info->modelist);
+	if (m) {
+//		m->refresh = refresh;
+//		m = fb_find_nearest_mode(m, &info->modelist);
+//		if (m)
+			#if defined(CONFIG_FB_LS1X_I2C)
+			ls1x_update_var(&info->var, m);
+			#else
+			fb_videomode_to_var(&info->var, m);
+			#endif
+	}
+	pr_info("%s:%dx%d-%d@%d\n", m->name, 
+		var->xres, var->yres, var->bits_per_pixel, refresh);
+
+	/* Init settings. */
+	/* No need for virtual resolution support */
+	var->xres_virtual = var->xres;
+	var->yres_virtual = info->fix.smem_len /
+		(var->xres_virtual * (var->bits_per_pixel >> 3));
+	dev_dbg(fbi->dev, "ls1xfb: find best mode: res = %dx%d\n",
+				var->xres, var->yres);
+
+	/* correct pixclock. */
+	total_w = var->xres + var->left_margin + var->right_margin +
+		  var->hsync_len;
+	total_h = var->yres + var->upper_margin + var->lower_margin +
+		  var->vsync_len;
+
+	div_result = 1000000000000ll;
+	do_div(div_result, total_w * total_h * refresh);
+	var->pixclock = (u32)div_result;
+
+	return ret;
+}
+
+static int __devinit ls1xfb_probe(struct platform_device *pdev)
+{
+	struct ls1xfb_mach_info *mi;
+	struct fb_info *info = 0;
+	struct ls1xfb_info *fbi = 0;
+	struct resource *res;
+	struct clk *clk;
+	int ret;
+
+	mi = pdev->dev.platform_data;
+	if (mi == NULL) {
+		dev_err(&pdev->dev, "no platform data defined\n");
+		return -EINVAL;
+	}
+
+	clk = clk_get(&pdev->dev, "pll");
+	if (IS_ERR(clk)) {
+		dev_err(&pdev->dev, "unable to get LCDCLK");
+		return PTR_ERR(clk);
+	}
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (res == NULL) {
+		dev_err(&pdev->dev, "no IO memory defined\n");
+		ret = -ENOENT;
+		goto failed_put_clk;
+	}
+
+	info = framebuffer_alloc(sizeof(struct ls1xfb_info), &pdev->dev);
+	if (info == NULL) {
+		ret = -ENOMEM;
+		goto failed_put_clk;
+	}
+
+	/* Initialize private data */
+	fbi = info->par;
+	fbi->info = info;
+	fbi->clk = clk;
+	fbi->dev = info->dev = &pdev->dev;
+	fbi->active = mi->active;
+
+	/*
+	 * Initialise static fb parameters.
+	 */
+	info->flags = FBINFO_FLAG_DEFAULT;
+	info->node = -1;
+	strlcpy(info->fix.id, mi->id, 16);
+	info->fix.type = FB_TYPE_PACKED_PIXELS;
+	info->fix.type_aux = 0;
+	info->fix.xpanstep = 0;
+	info->fix.ypanstep = 0;
+	info->fix.ywrapstep = 0;
+	info->fix.mmio_start = res->start;
+	info->fix.mmio_len = res->end - res->start + 1;
+	info->fix.accel = FB_ACCEL_NONE;
+	info->fbops = &ls1xfb_ops;
+	info->pseudo_palette = fbi->pseudo_palette;
+
+	/*
+	 * Map LCD controller registers.
+	 */
+	fbi->reg_base = ioremap_nocache(res->start, resource_size(res));
+	if (fbi->reg_base == NULL) {
+		ret = -ENOMEM;
+		goto failed_free_info;
+	}
+
+	/*
+	 * Allocate framebuffer memory.
+	 */
+	if (unlikely(vga_mode)) {
+		info->fix.smem_len = PAGE_ALIGN(1920 * 1080 * 4); /* åˆ†é…�è¶³å¤Ÿçš„æ˜¾å­˜ï¼Œç”¨äºŽåˆ‡æ�¢åˆ†è¾¨çŽ‡ */
+	} else {
+		info->fix.smem_len = PAGE_ALIGN(default_xres * default_yres * 4);
+	}
+
+	info->screen_base = dma_alloc_coherent(fbi->dev, info->fix.smem_len,
+						&fbi->fb_start_dma, GFP_KERNEL);
+	if (info->screen_base == NULL) {
+		ret = -ENOMEM;
+		goto failed_free_info;
+	}
+
+	info->fix.smem_start = (unsigned long)fbi->fb_start_dma;
+	set_graphics_start(info, 0, 0);
+
+	/*
+	 * Set video mode according to platform data.
+	 */
+	#if defined(CONFIG_FB_LS1X_I2C)
+	ls1xfb_create_i2c_busses(info);
+	if (ls1xfb_probe_i2c_connector(info, &fbi->edid)) {
+		/* ä½¿ç”¨è‡ªå®šä¹‰modes */
+		fb_videomode_to_modelist(mi->modes, mi->num_modes, &info->modelist);
+	} else {
+		fb_edid_to_monspecs(fbi->edid, &info->monspecs);
+		kfree(fbi->edid);
+		fb_videomode_to_modelist(info->monspecs.modedb,
+					 info->monspecs.modedb_len,
+					 &info->modelist);
+	}
+	#else
+	fb_videomode_to_modelist(mi->modes, mi->num_modes, &info->modelist);
+	#endif
+
+	/*
+	 * init video mode data.
+	 */
+	ls1xfb_init_mode(info, mi);
+
+	/*
+	 * Fill in sane defaults.
+	 */
+	ret = ls1xfb_check_var(&info->var, info);
+	if (ret)
+		goto failed_free_fbmem;
+
+	/*
+	 * enable controller clock
+	 */
+	clk_enable(fbi->clk);
+
+	/* init ls1x lcd controller */
+	{
+		u32 x;
+		int timeout = 204800;
+		x = readl(fbi->reg_base + LS1X_FB_CONF);
+		writel(x & ~LS1X_FB_CONF_RESET, fbi->reg_base + LS1X_FB_CONF);
+//		writel(x & ~LS1X_FB_CONF_OUT_EN, fbi->reg_base + LS1X_FB_CONF);
+		x = readl(fbi->reg_base + LS1X_FB_CONF);	/* ä¸�çŸ¥é�“ä¸ºä»€ä¹ˆè¿™é‡Œéœ€è¦�è¯»ä¸€æ¬¡ */
+		writel(x & ~LS1X_FB_CONF_RESET, fbi->reg_base + LS1X_FB_CONF);
+		x = readl(fbi->reg_base + LS1X_FB_CONF);
+
+		ls1xfb_set_par(info);
+
+		/* ä¸�çŸ¥é�“ä¸ºä»€ä¹ˆè¦�è®¾ç½®å¤šæ¬¡æ‰�æœ‰æ•ˆ,ä¸”å¯¹LS1X_FB_CONFå¯„å­˜å™¨çš„è®¾ç½®ä¸�èƒ½æ”¾åœ¨ls1xfb_set_parå‡½æ•°é‡Œï¼Œ
+		å› ä¸ºåœ¨è®¾ç½®formatå­—æ®µå�Žå†�è®¾ç½®LS1X_FB_CONF_OUT_ENä½�ä¼šä½¿formatå­—æ®µè®¾ç½®å¤±æ•ˆ */
+		x = readl(fbi->reg_base + LS1X_FB_CONF);
+		writel(x | LS1X_FB_CONF_OUT_EN, fbi->reg_base + LS1X_FB_CONF);
+		do {
+			x = readl(fbi->reg_base + LS1X_FB_CONF);
+			writel(x | LS1X_FB_CONF_OUT_EN, fbi->reg_base + LS1X_FB_CONF);
+		} while (((x & LS1X_FB_CONF_OUT_EN) == 0)
+				&& (timeout-- > 0));
+	}
+
+	/*
+	 * Allocate color map.
+	 */
+	if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) {
+		ret = -ENOMEM;
+		goto failed_free_clk;
+	}
+
+	/*
+	 * Register framebuffer.
+	 */
+	ret = register_framebuffer(info);
+	if (ret < 0) {
+		dev_err(&pdev->dev, "Failed to register ls1x-fb: %d\n", ret);
+		ret = -ENXIO;
+		goto failed_free_cmap;
+	}
+
+	platform_set_drvdata(pdev, fbi);
+	return 0;
+
+failed_free_cmap:
+	fb_dealloc_cmap(&info->cmap);
+failed_free_clk:
+	clk_disable(fbi->clk);
+failed_free_fbmem:
+#ifdef CONFIG_FB_LS1X_I2C
+	ls1xfb_delete_i2c_busses(info);
+#endif
+	dma_free_coherent(fbi->dev, info->fix.smem_len,
+			info->screen_base, fbi->fb_start_dma);
+failed_free_info:
+	kfree(info);
+failed_put_clk:
+	clk_put(clk);
+
+	dev_err(&pdev->dev, "frame buffer device init failed with %d\n", ret);
+	return ret;
+}
+
+static int __devexit ls1xfb_remove(struct platform_device *pdev)
+{
+	struct ls1xfb_info *fbi = platform_get_drvdata(pdev);
+	struct fb_info *info;
+
+	if (!fbi)
+		return 0;
+
+	info = fbi->info;
+
+	unregister_framebuffer(info);
+
+	if (info->cmap.len)
+		fb_dealloc_cmap(&info->cmap);
+
+#ifdef CONFIG_FB_LS1X_I2C
+	ls1xfb_delete_i2c_busses(info);
+#endif
+
+	dma_free_coherent(fbi->dev, PAGE_ALIGN(info->fix.smem_len),
+				info->screen_base, info->fix.smem_start);
+
+	iounmap(fbi->reg_base);
+
+	clk_disable(fbi->clk);
+	clk_put(fbi->clk);
+
+	framebuffer_release(info);
+
+	return 0;
+}
+
+#ifdef CONFIG_PM
+
+/* suspend and resume support for the lcd controller */
+static int ls1xfb_suspend(struct platform_device *dev, pm_message_t state)
+{
+	return 0;
+}
+
+static int ls1xfb_resume(struct platform_device *dev)
+{
+	return 0;
+}
+
+#else
+#define ls1xfb_suspend NULL
+#define ls1xfb_resume  NULL
+#endif
+
+static struct platform_driver ls1xfb_driver = {
+	.driver		= {
+		.name	= "ls1x-fb",
+		.owner	= THIS_MODULE,
+	},
+	.probe	= ls1xfb_probe,
+	.remove	= __devexit_p(ls1xfb_remove),
+	.suspend	= ls1xfb_suspend,
+	.resume	= ls1xfb_resume,
+};
+
+static int __init ls1xfb_init(void)
+{
+	char* options = NULL;
+	char *p = NULL, *end = NULL;
+	int i;
+
+	fb_get_options(DRIVER_NAME_0, &options);
+	if (options == NULL ) {
+		fb_get_options(DRIVER_NAME_1, &options);
+		if (options == NULL ) {
+			fb_get_options(DRIVER_NAME_2, &options);
+			if (options == NULL ) {
+				fb_get_options(DRIVER_NAME_3, &options);
+				vga_mode = 1;
+				if (options == NULL ) {
+					fb_get_options(DRIVER_NAME_4, &options);
+					if (options == NULL ) {
+						fb_get_options(DRIVER_NAME_5, &options);
+						if (options == NULL ) {
+							vga_mode = 0;
+						}
+					}
+				}
+			}
+		}
+	}
+
+	if (options) {
+		/* ls1xfb:1920x1080-16@60 */
+		for (i=0; i<4; i++)
+			if (isdigit(*(options+i)))
+				break;	/* æŸ¥æ‰¾optionså­—ä¸²ä¸­ç¬¬ä¸€ä¸ªæ•°å­—æ—¶içš„å€¼ */
+	}
+	if (options && (i < 4)) {
+		default_xres = simple_strtoul(options+i, &end, 10);
+		default_yres = simple_strtoul(end+1, NULL, 10);
+		/* depth, bpp default is mi->pix_fmt */
+		p = strchr(options, '-');
+		if (p) {
+			default_bpp = simple_strtoul(p+1, NULL, 0);
+		}
+		/* refresh */
+		p = strchr(options, '@');
+		if (p) {
+			default_refresh = simple_strtoul(p+1, NULL, 0);
+		}
+		if ((default_xres<=0 || default_xres>1920) || 
+			(default_yres<=0 || default_yres>1080)) {
+			pr_info("Warning: Resolution is out of range."
+				"MAX resolution is 1920x1080@60Hz\n");
+			default_xres = DEFAULT_XRES;
+			default_yres = DEFAULT_YRES;
+		}
+	} else {
+		pr_info("Use default resolution %dx%d-%d@%d\n", \
+			DEFAULT_XRES, DEFAULT_YRES, DEFAULT_BPP, DEFAULT_REFRESH);
+	}
+
+	return platform_driver_register(&ls1xfb_driver);
+}
+module_init(ls1xfb_init);
+
+static void __exit ls1xfb_exit(void)
+{
+	platform_driver_unregister(&ls1xfb_driver);
+}
+module_exit(ls1xfb_exit);
+
+MODULE_AUTHOR("loongson-gz tang <tanghaifeng-gz@loongson.cn>");
+MODULE_DESCRIPTION("Framebuffer driver for the loongson1");
+MODULE_LICENSE("GPL");
+
diff -uNra linux-3.0.82/drivers/video/ls1xfb.h linux-3.0.82x/drivers/video/ls1xfb.h
--- linux-3.0.82/drivers/video/ls1xfb.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/video/ls1xfb.h	2017-09-23 03:42:50.278674269 +0800
@@ -0,0 +1,99 @@
+/*
+ *  Copyright (c) 2012 Tang, Haifeng <tanghaifeng-gz@loongson.cn>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ */
+
+#ifndef __LS1XFB_H__
+#define __LS1XFB_H__
+
+#define LS1X_DC0_BASE			0x1c301240
+#define LS1X_DC1_BASE			0x1c301250
+
+#define LS1X_DC_REGS(x) \
+		((void __iomem *)KSEG1ADDR(LS1X_DC_BASE + (x)))
+
+/* Frame Buffer configuration */
+#define LS1X_FB_CONF			0x0
+#define LS1X_FB_CONF_RESET			(0x1 << 20)
+#define LS1X_FB_CONF_GAMMA_EN			(0x1 << 12)
+#define LS1X_FB_CONF_SP			(0x1 << 9)
+#define LS1X_FB_CONF_OUT_EN			(0x1 << 8)
+#define LS1X_FB_CONF_FORMAT			(0x7 << 0)
+
+/* Frame buffer address0/address1 */
+#define LS1X_FB_ADDR0			0x20
+#define LS1X_FB_ADDR1			0x340
+
+/* Frame buffer stride */
+#define LS1X_FB_STRIDE			0x40
+/* Frame buffer origin */
+#define LS1X_FB_ORIGIN			0x60
+
+/* Display Dither Configuration */
+#define LS1X_FB_DITHER_CONF			0x120
+#define LS1X_FB_DITHER_CONF_EN			(0x1 << 31)
+#define LS1X_FB_DITHER_CONF_REDSIZE			(0xf << 16)
+#define LS1X_FB_DITHER_CONF_GREENSIZE			(0xf << 8)
+#define LS1X_FB_DITHER_CONF_BLUESIZE			(0xf << 0)
+
+/* Display Dither Table */
+#define LS1X_FB_DITHER_TAB_LOW			0x140
+#define LS1X_FB_DITHER_TAB_LOWY_1_X3			(0xf << 28)
+#define LS1X_FB_DITHER_TAB_LOWY_1_X2			(0xf << 24)
+#define LS1X_FB_DITHER_TAB_LOWY_1_X1			(0xf << 20)
+#define LS1X_FB_DITHER_TAB_LOWY_1_X0			(0xf << 16)
+#define LS1X_FB_DITHER_TAB_LOWY_0_X3			(0xf << 12)
+#define LS1X_FB_DITHER_TAB_LOWY_0_X2			(0xf << 8)
+#define LS1X_FB_DITHER_TAB_LOWY_0_X1			(0xf << 4)
+#define LS1X_FB_DITHER_TAB_LOWY_0_X0			(0xf << 0)
+
+#define LS1X_FB_DITHER_TAB_HIGH			0x160
+#define LS1X_FB_DITHER_TAB_LOWY_3_X3			(0xf << 28)
+#define LS1X_FB_DITHER_TAB_LOWY_3_X2			(0xf << 24)
+#define LS1X_FB_DITHER_TAB_LOWY_3_X1			(0xf << 20)
+#define LS1X_FB_DITHER_TAB_LOWY_3_X0			(0xf << 16)
+#define LS1X_FB_DITHER_TAB_LOWY_2_X3			(0xf << 12)
+#define LS1X_FB_DITHER_TAB_LOWY_2_X2			(0xf << 8)
+#define LS1X_FB_DITHER_TAB_LOWY_2_X1			(0xf << 4)
+#define LS1X_FB_DITHER_TAB_LOWY_2_X0			(0xf << 0)
+
+/* Panel configuration */
+#define LS1X_FB_PANEL_CONF			0x180
+#define LS1X_FB_PANEL_CONF_CLK_POL			(0x1 << 9)
+#define LS1X_FB_PANEL_CONF_CLK			(0x1 << 8)	/* æ— æ•ˆï¼Ÿ */
+//#define LS1X_FB_PANEL_CONF_DE_POL			(0x1 << 5)	/* ?? */
+#define LS1X_FB_PANEL_CONF_DE_POL			(0x1 << 1)
+#define LS1X_FB_PANEL_CONF_DE			(0x1 << 0)	/* æ— æ•ˆï¼Ÿ */
+
+/*  */
+#define LS1X_FB_PANEL_TIMING			0x1a0
+
+/* HDisplay */
+#define LS1X_FB_HDISPLAY			0x1c0
+#define LS1X_FB_HDISPLAY_TOTAL			(0xfff << 16)
+#define LS1X_FB_HDISPLAY_END			(0xfff << 0)
+
+/* HSync */
+#define LS1X_FB_HSYNC			0x1e0
+#define LS1X_FB_HSYNC_POL			(0x1 << 31)
+#define LS1X_FB_HSYNC_PULSE			(0x1 << 30)
+#define LS1X_FB_HSYNC_END			(0xfff << 16)
+#define LS1X_FB_HSYNC_START			(0xfff << 0)
+
+/* VDisplay */
+#define LS1X_FB_VDISPLAY			0x240
+#define LS1X_FB_VDISPLAY_TOTAL			(0x7ff << 16)
+#define LS1X_FB_VDISPLAY_END			(0x7ff << 0)
+
+/* VSync */
+#define LS1X_FB_VSYNC			0x260
+#define LS1X_FB_VSYNC_POL			(0x1 << 31)
+#define LS1X_FB_VSYNC_PULSE			(0x1 << 30)
+#define LS1X_FB_VSYNC_END			(0xfff << 16)
+#define LS1X_FB_VSYNC_START			(0xfff << 0)
+
+#endif /* __LS1XFB_H__ */
diff -uNra linux-3.0.82/drivers/video/ls1xfb-i2c.c linux-3.0.82x/drivers/video/ls1xfb-i2c.c
--- linux-3.0.82/drivers/video/ls1xfb-i2c.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/video/ls1xfb-i2c.c	2017-09-23 03:42:50.278674269 +0800
@@ -0,0 +1,165 @@
+/*
+ * Based partly on savagefb-i2c.c rivafb-i2c.c
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/gfp.h>
+#include <linux/fb.h>
+#include <video/ls1xfb.h>
+
+#include <asm/gpio.h>
+
+#include "edid.h"
+
+#define LS1X_DDC 	0x50
+
+#define VGA_CR_IX	0x3d4
+#define VGA_CR_DATA	0x3d5
+
+//#if defined(CONFIG_LS1A_CLOUD_TERMIAL)
+#if defined(CONFIG_LS1A_MACH)
+#define SCL_GPIO	64
+#define SDA_GPIO	65
+//#elif defined(CONFIG_LS1B_CORE_BOARD)
+#elif defined(CONFIG_LS1B_MACH)
+#define SCL_GPIO	32
+#define SDA_GPIO	33
+#endif
+
+static void ls1x_gpio_setscl(void *data, int val)
+{
+	struct ls1xfb_i2c_chan *chan = data;
+
+	if (val)
+		gpio_direction_input(chan->scl_pin);
+	else
+		gpio_direction_output(chan->scl_pin, 0);
+}
+
+static void ls1x_gpio_setsda(void *data, int val)
+{
+	struct ls1xfb_i2c_chan *chan = data;
+
+	if (val)
+		gpio_direction_input(chan->sda_pin);
+	else
+		gpio_direction_output(chan->sda_pin, 0);
+}
+
+static int ls1x_gpio_getscl(void *data)
+{
+	struct ls1xfb_i2c_chan *chan = data;
+
+	return gpio_get_value(chan->scl_pin);
+}
+
+static int ls1x_gpio_getsda(void *data)
+{
+	struct ls1xfb_i2c_chan *chan = data;
+
+	return gpio_get_value(chan->sda_pin);
+}
+
+static int ls1x_setup_i2c_bus(struct ls1xfb_i2c_chan *chan,
+				const char *name)
+{
+	int rc = 0;
+
+	if (chan->par) {
+		strcpy(chan->adapter.name, name);
+		chan->adapter.owner		= THIS_MODULE;
+		chan->adapter.algo_data		= &chan->algo;
+		chan->adapter.dev.parent	= chan->par->dev;
+		chan->algo.udelay		= 10;
+		chan->algo.timeout		= 20;
+		chan->algo.data 		= chan;
+
+		i2c_set_adapdata(&chan->adapter, chan);
+
+		/* Raise SCL and SDA */
+		chan->algo.setsda(chan, 1);
+		chan->algo.setscl(chan, 1);
+		udelay(20);
+
+		rc = i2c_bit_add_bus(&chan->adapter);
+
+		if (rc == 0)
+			dev_dbg(chan->par->dev,
+				"I2C bus %s registered.\n", name);
+		else
+			dev_warn(chan->par->dev,
+				 "Failed to register I2C bus %s.\n", name);
+	}
+
+	return rc;
+}
+
+void ls1xfb_create_i2c_busses(struct fb_info *info)
+{
+	struct ls1xfb_info *par = info->par;
+	par->chan.par	= par;
+
+//	switch (par->chip) {
+//	case S3_SAVAGE2000:
+		par->chan.sda_pin = SDA_GPIO;
+		par->chan.scl_pin = SCL_GPIO;
+		gpio_request(par->chan.sda_pin, "sda");
+		gpio_request(par->chan.scl_pin, "scl");
+		gpio_direction_input(par->chan.sda_pin);
+		gpio_direction_input(par->chan.scl_pin);
+//		par->chan.reg         = MM_SERIAL1;
+//		par->chan.ioaddr      = par->mmio.vbase;
+		par->chan.algo.setsda = ls1x_gpio_setsda;
+		par->chan.algo.setscl = ls1x_gpio_setscl;
+		par->chan.algo.getsda = ls1x_gpio_getsda;
+		par->chan.algo.getscl = ls1x_gpio_getscl;
+//		break;
+//	default:
+//		par->chan.par = NULL;
+//	}
+
+	ls1x_setup_i2c_bus(&par->chan, "LS1X DDC2");
+}
+
+void ls1xfb_delete_i2c_busses(struct fb_info *info)
+{
+	struct ls1xfb_info *par = info->par;
+
+	gpio_free(par->chan.sda_pin);
+	gpio_free(par->chan.scl_pin);
+	if (par->chan.par)
+		i2c_del_adapter(&par->chan.adapter);
+
+	par->chan.par = NULL;
+}
+
+int ls1xfb_probe_i2c_connector(struct fb_info *info, u8 **out_edid)
+{
+	struct ls1xfb_info *par = info->par;
+	u8 *edid;
+
+	if (par->chan.par)
+		edid = fb_ddc_read(&par->chan.adapter);
+	else
+		edid = NULL;
+
+	if (!edid) {
+		/* try to get from firmware */
+		const u8 *e = fb_firmware_edid(info->device);
+
+		if (e)
+			edid = kmemdup(e, EDID_LENGTH, GFP_KERNEL);
+	}
+
+	*out_edid = edid;
+
+	return (edid) ? 0 : 1;
+}
+
+MODULE_LICENSE("GPL");
diff -uNra linux-3.0.82/drivers/video/Makefile linux-3.0.82x/drivers/video/Makefile
--- linux-3.0.82/drivers/video/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/video/Makefile	2017-09-23 03:42:50.282674257 +0800
@@ -29,8 +29,13 @@
 obj-$(CONFIG_FB_WMT_GE_ROPS)   += wmt_ge_rops.o
 
 # Hardware specific drivers go first
+obj-$(CONFIG_FB_LOONGSON1)		  += ls1xfb.o
+obj-$(CONFIG_FB_LS1X_I2C)		  += ls1xfb-i2c.o
 obj-$(CONFIG_FB_AMIGA)            += amifb.o c2p_planar.o
 obj-$(CONFIG_FB_ARC)              += arcfb.o
+obj-$(CONFIG_FB_SSD1305)          += ssd1305fb.o
+obj-$(CONFIG_FB_ST7565)          += st7565fb.o
+obj-$(CONFIG_FB_ST7920)           += st7920fb.o
 obj-$(CONFIG_FB_CLPS711X)         += clps711xfb.o
 obj-$(CONFIG_FB_CYBER2000)        += cyber2000fb.o
 obj-$(CONFIG_FB_PM2)              += pm2fb.o
diff -uNra linux-3.0.82/drivers/video/ssd1305fb.c linux-3.0.82x/drivers/video/ssd1305fb.c
--- linux-3.0.82/drivers/video/ssd1305fb.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/video/ssd1305fb.c	2017-09-23 03:42:50.282674257 +0800
@@ -0,0 +1,808 @@
+/*
+ * Copyright (c) 2012 Tang, Haifeng <tanghaifeng-gz@loongson.cn>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/errno.h>
+#include <linux/fb.h>
+#include <linux/mm.h>
+#include <linux/platform_device.h>
+#include <linux/string.h>
+#include <linux/uaccess.h>
+#include <linux/gpio.h>
+#include <linux/ssd1305.h>
+
+
+#define SSD1305FB_NAME "ssd1305fb"
+#define SSD1305_NAME "ssd1305"
+
+/* ssd1305 chipset specific defines and code */
+#define brightness	0x2F
+
+#define X_OFFSET	(2)
+#define SSD1305_WIDTH	(128)
+#define SSD1305_HEIGHT	(64)
+#define SSD1305_CONTROLLERS	(1)
+#define SSD1305_PAGES	(8)
+#define SSD1305_ADDRESSES	(128)
+#define SSD1305_SIZE		((SSD1305_CONTROLLERS) * \
+				(SSD1305_PAGES) * \
+				(SSD1305_ADDRESSES))
+#define bit(n) (((unsigned char)1)<<(n))
+
+static struct ssd1305_platform_data *pdata;
+void __iomem *reg_addr;
+
+static struct fb_fix_screeninfo ssd1305fb_fix __devinitdata = {
+	.id = SSD1305FB_NAME,
+	.type = FB_TYPE_PACKED_PIXELS,
+	.visual = FB_VISUAL_MONO10,
+	.xpanstep = 0,
+	.ypanstep = 0,
+	.ywrapstep = 0,
+	.line_length = SSD1305_WIDTH / 8,
+	.accel = FB_ACCEL_NONE,
+};
+
+static struct fb_var_screeninfo ssd1305fb_var __devinitdata = {
+	.xres = SSD1305_WIDTH,
+	.yres = SSD1305_HEIGHT,
+	.xres_virtual = SSD1305_WIDTH,
+	.yres_virtual = SSD1305_HEIGHT,
+	.bits_per_pixel = 1,
+	.red = { 0, 1, 0 },
+	.green = { 0, 1, 0 },
+	.blue = { 0, 1, 0 },
+	.left_margin = 0,
+	.right_margin = 0,
+	.upper_margin = 0,
+	.lower_margin = 0,
+	.vmode = FB_VMODE_NONINTERLACED,
+};
+
+static void ssd1305_writeb_ctl(unsigned char value)
+{
+#ifdef CONFIG_SSD1305_8080
+	u32 ret;
+	
+	gpio_set_value(pdata->gpios_cs, 0);
+	gpio_set_value(pdata->gpios_dc, 0);
+	gpio_set_value(pdata->gpios_rd, 1);
+	gpio_set_value(pdata->gpios_wr, 0);
+
+	ret = readl(reg_addr);
+	ret &= ~(0xFF << pdata->datas_offset);
+	writel(ret|(value<<pdata->datas_offset), reg_addr);
+
+	gpio_set_value(pdata->gpios_cs, 1);
+	gpio_set_value(pdata->gpios_dc, 1);
+	gpio_set_value(pdata->gpios_wr, 1);
+#elif CONFIG_SSD1305_6800
+	u32 ret;
+	
+	gpio_set_value(pdata->gpios_cs, 0);
+	gpio_set_value(pdata->gpios_dc, 0);
+	gpio_set_value(pdata->gpios_wr, 0);	//RW
+	gpio_set_value(pdata->gpios_rd, 1);	//E
+
+	ret = readl(reg_addr);
+	ret &= ~(0xFF << pdata->datas_offset);
+	writel(ret|(value<<pdata->datas_offset), reg_addr);
+
+	gpio_set_value(pdata->gpios_rd, 0);	//E
+	gpio_set_value(pdata->gpios_cs, 1);
+	gpio_set_value(pdata->gpios_dc, 1);
+	gpio_set_value(pdata->gpios_wr, 1);	//RW
+#elif CONFIG_SSD1305_SPI3
+	unsigned char i;
+	unsigned char data = value;
+
+	gpio_set_value(pdata->gpios_cs, 0);
+	gpio_set_value(pdata->gpios_d0, 0);//SCLK=0
+	gpio_set_value(pdata->gpios_d1, 0);
+	gpio_set_value(pdata->gpios_d0, 1);//SCLK=1
+	for (i=0; i<8; i++) {
+		gpio_set_value(pdata->gpios_d0, 0);//SCLK=0
+		gpio_set_value(pdata->gpios_d1, (data&0x80)>>7);
+		data = data << 1;
+		gpio_set_value(pdata->gpios_d0, 1);//SCLK=1
+	}
+	gpio_set_value(pdata->gpios_cs, 1);
+#elif CONFIG_SSD1305_SPI4
+	unsigned char i;
+	unsigned char data = value;
+
+	gpio_set_value(pdata->gpios_cs, 0);
+	gpio_set_value(pdata->gpios_dc, 0);
+	for (i=0; i<8; i++) {
+		gpio_set_value(pdata->gpios_d0, 0);//SCLK=0
+		gpio_set_value(pdata->gpios_d1, (data&0x80)>>7);
+		data = data << 1;
+		gpio_set_value(pdata->gpios_d0, 1);//SCLK=1
+	}
+	gpio_set_value(pdata->gpios_dc, 1);
+	gpio_set_value(pdata->gpios_cs, 1);
+#elif CONFIG_SSD1305_I2C
+
+#endif
+}
+
+static void ssd1305_writebyte(unsigned char byte)
+{
+#ifdef CONFIG_SSD1305_8080
+	u32 ret;
+	
+	gpio_set_value(pdata->gpios_cs, 0);
+	gpio_set_value(pdata->gpios_dc, 1);
+	gpio_set_value(pdata->gpios_rd, 1);
+	gpio_set_value(pdata->gpios_wr, 0);
+
+	ret = readl(reg_addr);
+	ret &= ~(0xFF << pdata->datas_offset);
+	writel(ret|(byte<<pdata->datas_offset), reg_addr);
+
+	gpio_set_value(pdata->gpios_cs, 1);
+	gpio_set_value(pdata->gpios_wr, 1);
+#elif CONFIG_SSD1305_6800
+	u32 ret;
+	
+	gpio_set_value(pdata->gpios_cs, 0);
+	gpio_set_value(pdata->gpios_dc, 1);
+	gpio_set_value(pdata->gpios_wr, 0);	//RW
+	gpio_set_value(pdata->gpios_rd, 1);	//E
+
+	ret = readl(reg_addr);
+	ret &= ~(0xFF << pdata->datas_offset);
+	writel(ret|(byte<<pdata->datas_offset), reg_addr);
+
+	gpio_set_value(pdata->gpios_rd, 0);	//E
+	gpio_set_value(pdata->gpios_cs, 1);
+	gpio_set_value(pdata->gpios_wr, 1);	//RW
+#elif CONFIG_SSD1305_SPI3
+	unsigned char i;
+	unsigned char data = byte;
+
+	gpio_set_value(pdata->gpios_cs, 0);
+
+	gpio_set_value(pdata->gpios_d0, 0);//SCLK=0
+	gpio_set_value(pdata->gpios_d1, 1);
+	gpio_set_value(pdata->gpios_d0, 1);//SCLK=1
+
+	for (i=0; i<8; i++) {
+		gpio_set_value(pdata->gpios_d0, 0);//SCLK=0
+		gpio_set_value(pdata->gpios_d1, (data&0x80)>>7);
+		data = data << 1;
+		gpio_set_value(pdata->gpios_d0, 1);//SCLK=1
+	}
+	gpio_set_value(pdata->gpios_cs, 1);
+#elif CONFIG_SSD1305_SPI4
+	unsigned char i;
+	unsigned char data = byte;
+
+	gpio_set_value(pdata->gpios_cs, 0);
+	gpio_set_value(pdata->gpios_dc, 1);
+	for (i=0; i<8; i++) {
+		gpio_set_value(pdata->gpios_d0, 0);//SCLK=0
+		gpio_set_value(pdata->gpios_d1, (data&0x80)>>7);
+		data = data << 1;
+		gpio_set_value(pdata->gpios_d0, 1);//SCLK=1
+	}
+	gpio_set_value(pdata->gpios_dc, 1);
+	gpio_set_value(pdata->gpios_cs, 1);
+#elif CONFIG_SSD1305_I2C
+
+#endif
+}
+
+
+/*
+ * ssd1305 Internal Commands
+ */
+static void inline ssd1305set_start_column(unsigned char d)
+{
+	ssd1305_writeb_ctl(0x10+d/16);	// Set Higher Column Start Address for Page Addressing Mode
+									// Default => 0x10
+	ssd1305_writeb_ctl(0x00+d%16);	// Set Lower Column Start Address for Page Addressing Mode
+									// Default => 0x00
+}
+
+static void inline ssd1305set_addressing_mode(unsigned char d)
+{
+	ssd1305_writeb_ctl(0x20);	// Set Memory Addressing Mode
+	ssd1305_writeb_ctl(d);		// Default => 0x02
+								// 0x00 => Horizontal Addressing Mode
+								// 0x01 => Vertical Addressing Mode
+								// 0x02 => Page Addressing Mode
+}
+
+static void inline ssd1305set_column_address(unsigned char a, unsigned char b)
+{
+	ssd1305_writeb_ctl(0x21);	// Set Column Address
+	ssd1305_writeb_ctl(a);		// Default => 0x00 (Column Start Address)
+	ssd1305_writeb_ctl(b);		// Default => 0x83 (Column End Address)
+}
+
+static void inline ssd1305set_page_address(unsigned char a, unsigned char b)
+{
+	ssd1305_writeb_ctl(0x22);	// Set Page Address
+	ssd1305_writeb_ctl(a);		// Default => 0x00 (Page Start Address)
+	ssd1305_writeb_ctl(b);		// Default => 0x07 (Page End Address)
+}
+
+static void inline ssd1305set_start_line(unsigned char d)
+{
+	ssd1305_writeb_ctl(0x40|d);	// Set Display Start Line
+								// Default => 0x40 (0x00)
+}
+
+
+static void inline ssd1305set_contrast_control(unsigned char d)
+{
+	ssd1305_writeb_ctl(0x81);	// Set Contrast Control for Bank 0
+	ssd1305_writeb_ctl(d);		// Default => 0x80
+}
+
+static void inline ssd1305set_area_brightness(unsigned char d)
+{
+	ssd1305_writeb_ctl(0x82);	// Set Brightness for Area Color Banks
+	ssd1305_writeb_ctl(d);		// Default => 0x80
+}
+
+static void inline ssd1305set_segment_remap(unsigned char d)
+{
+	ssd1305_writeb_ctl(0xA0|d);	// Set Segment Re-Map
+								// Default => 0xA0
+								// 0xA0 (0x00) => Column Address 0 Mapped to SEG0
+								// 0xA1 (0x01) => Column Address 0 Mapped to SEG131
+}
+
+static void inline ssd1305set_entire_display(unsigned char d)
+{
+	ssd1305_writeb_ctl(0xA4|d);	// Set Entire Display On / Off
+								// Default => 0xA4
+								// 0xA4 (0x00) => Normal Display
+								// 0xA5 (0x01) => Entire Display On
+}
+
+static void inline ssd1305set_inverse_display(unsigned char d)
+{
+	ssd1305_writeb_ctl(0xA6|d);	// Set Inverse Display On/Off
+								// Default => 0xA6
+								// 0xA6 (0x00) => Normal Display
+								// 0xA7 (0x01) => Inverse Display On
+}
+
+static void inline ssd1305set_multiplex_ratio(unsigned char d)
+{
+	ssd1305_writeb_ctl(0xA8);	// Set Multiplex Ratio
+	ssd1305_writeb_ctl(d);		// Default => 0x3F (1/64 Duty)
+}
+
+static void inline ssd1305set_dim_mode(unsigned char a, unsigned char b)
+{
+	ssd1305_writeb_ctl(0xAB);	// Set Dim Mode Configuration
+	ssd1305_writeb_ctl(0X00);	// => (Dummy Write for First Parameter)
+	ssd1305_writeb_ctl(a);		// Default => 0x80 (Contrast Control for Bank 0)
+	ssd1305_writeb_ctl(b);		// Default => 0x80 (Brightness for Area Color Banks)
+	ssd1305_writeb_ctl(0xAC);	// Set Display On in Dim Mode
+}
+
+static void inline ssd1305set_master_config(unsigned char d)
+{
+	ssd1305_writeb_ctl(0xAD);	// Set Master Configuration
+	ssd1305_writeb_ctl(0x8E|d);	// Default => 0x8E
+								// 0x8E (0x00) => Select External VCC Supply
+								// 0x8F (0x01) => Select Internal DC/DC Voltage Converter
+}
+
+static void inline ssd1305set_display_on_off(unsigned char d)	
+{
+	ssd1305_writeb_ctl(0xAE|d);	// Set Display On/Off
+								// Default => 0xAE
+								// 0xAE (0x00) => Display Off
+								// 0xAF (0x01) => Display On
+}
+
+static void inline ssd1305set_start_page(unsigned char d)
+{
+	ssd1305_writeb_ctl(0xB0|d);	// Set Page Start Address for Page Addressing Mode
+								// Default => 0xB0 (0x00)
+}
+
+static void inline ssd1305set_common_remap(unsigned char d)
+{
+	ssd1305_writeb_ctl(0xC0|d);	// Set COM Output Scan Direction
+								// Default => 0xC0
+								// 0xC0 (0x00) => Scan from COM0 to 63
+								// 0xC8 (0x08) => Scan from COM63 to 0
+}
+
+static void inline ssd1305set_display_offset(unsigned char d)
+{
+	ssd1305_writeb_ctl(0xD3);		// Set Display Offset
+	ssd1305_writeb_ctl(d);			// Default => 0x00
+}
+
+static void inline ssd1305set_display_clock(unsigned char d)
+{
+	ssd1305_writeb_ctl(0xD5);	// Set Display Clock Divide Ratio / Oscillator Frequency
+	ssd1305_writeb_ctl(d);		// Default => 0x70
+								// D[3:0] => Display Clock Divider
+								// D[7:4] => Oscillator Frequency
+}
+
+static void inline ssd1305set_area_color(unsigned char d)
+{
+	ssd1305_writeb_ctl(0xD8);	// Set Area Color Mode On/Off & Low Power Display Mode
+	ssd1305_writeb_ctl(d);		// Default => 0x00 (Monochrome Mode & Normal Power Display Mode)
+}
+
+static void inline ssd1305set_precharge_period(unsigned char d)
+{
+	ssd1305_writeb_ctl(0xD9);	// Set Pre-Charge Period
+	ssd1305_writeb_ctl(d);		// Default => 0x22 (2 Display Clocks [Phase 2] / 2 Display Clocks [Phase 1])
+								// D[3:0] => Phase 1 Period in 1~15 Display Clocks
+								// D[7:4] => Phase 2 Period in 1~15 Display Clocks
+}
+
+static void inline ssd1305set_common_config(unsigned char d)
+{
+	ssd1305_writeb_ctl(0xDA);	// Set COM Pins Hardware Configuration
+	ssd1305_writeb_ctl(0x02|d);	// Default => 0x12 (0x10)
+								// Alternative COM Pin Configuration
+								// Disable COM Left/Right Re-Map
+}
+
+static void inline ssd1305set_vcomh(unsigned char d)
+{
+	ssd1305_writeb_ctl(0xDB);	// Set VCOMH Deselect Level
+	ssd1305_writeb_ctl(d);		// Default => 0x34 (0.77*VCC)
+}
+
+static void inline ssd1305set_read_modify_write(unsigned char d)
+{
+	ssd1305_writeb_ctl(0xE0|d);	// Set Read Modify Write Mode
+								// Default => 0xE0
+								// 0xE0 (0x00) => Enter Read Modify Write
+								// 0xEE (0x0E) => Exit Read Modify Write
+}
+
+static void inline ssd1305set_nop(void)
+{
+	ssd1305_writeb_ctl(0xE3);	// Command for No Operation
+}
+
+static void inline ssd1305set_lut(unsigned char a, unsigned char b, unsigned char c, unsigned char d)
+{
+	ssd1305_writeb_ctl(0x91);	//   Define Look Up Table of Area Color
+	ssd1305_writeb_ctl(a);		//   Define Bank 0 Pulse Width
+	ssd1305_writeb_ctl(b);		//   Define Color A Pulse Width
+	ssd1305_writeb_ctl(c);		//   Define Color B Pulse Width
+	ssd1305_writeb_ctl(d);		//   Define Color C Pulse Width
+}
+
+static void inline ssd1305set_bank_color(void)
+{
+	ssd1305_writeb_ctl(0x92);	// Define Area Color for Bank 1~16 (Page 0)
+	ssd1305_writeb_ctl(0x00);	//   Define Bank 1~4 as Color A
+	ssd1305_writeb_ctl(0xEA);	//   Define Bank 5~7 as Color C
+	ssd1305_writeb_ctl(0xAF);	//   Define Bank 8~10 as Color D
+	ssd1305_writeb_ctl(0x56);	//   Define Bank 11~13 as Color C
+								//   Define Bank 12~16 as Color B
+
+	ssd1305_writeb_ctl(0x93);	// Define Area Color for Bank 17~32 (Page 1)
+	ssd1305_writeb_ctl(0x00);	//   Define Bank 17~20 as Color A
+	ssd1305_writeb_ctl(0xEA);	//   Define Bank 21~23 as Color C
+	ssd1305_writeb_ctl(0xAF);	//   Define Bank 24~26 as Color D
+	ssd1305_writeb_ctl(0x56);	//   Define Bank 27~29 as Color C
+								//   Define Bank 30~32 as Color B
+}
+
+static void ssd1305_clear(void)
+{
+	unsigned char i, j;
+
+	for (i = 0; i < SSD1305_PAGES; i++) {
+		ssd1305set_start_page(i);
+		ssd1305set_start_column(X_OFFSET);
+		for (j = 0; j < SSD1305_ADDRESSES; j++)
+			ssd1305_writebyte(0);
+	}
+}
+
+static int ssd1305_gpio_init(void)
+{
+	int err = 0;
+
+	err = gpio_request(pdata->gpios_res, "ssd1305_gpio");
+#if defined(CONFIG_SSD1305_8080) || defined(CONFIG_SSD1305_6800)
+	err += gpio_request(pdata->gpios_cs, "ssd1305_gpio");
+	err += gpio_request(pdata->gpios_dc, "ssd1305_gpio");
+	err += gpio_request(pdata->gpios_rd, "ssd1305_gpio");
+	err += gpio_request(pdata->gpios_wr, "ssd1305_gpio");
+	
+	err += gpio_request(pdata->gpios_d0, "ssd1305_gpio");
+	err += gpio_request(pdata->gpios_d1, "ssd1305_gpio");
+	err += gpio_request(pdata->gpios_d2, "ssd1305_gpio");
+	err += gpio_request(pdata->gpios_d3, "ssd1305_gpio");
+	err += gpio_request(pdata->gpios_d4, "ssd1305_gpio");
+	err += gpio_request(pdata->gpios_d5, "ssd1305_gpio");
+	err += gpio_request(pdata->gpios_d6, "ssd1305_gpio");
+	err += gpio_request(pdata->gpios_d7, "ssd1305_gpio");
+#elif CONFIG_SSD1305_SPI3
+	err += gpio_request(pdata->gpios_cs, "ssd1305_gpio");
+	
+	err += gpio_request(pdata->gpios_d0, "ssd1305_gpio");
+	err += gpio_request(pdata->gpios_d1, "ssd1305_gpio");
+#elif CONFIG_SSD1305_SPI4
+	err += gpio_request(pdata->gpios_cs, "ssd1305_gpio");
+	err += gpio_request(pdata->gpios_dc, "ssd1305_gpio");
+	
+	err += gpio_request(pdata->gpios_d0, "ssd1305_gpio");
+	err += gpio_request(pdata->gpios_d1, "ssd1305_gpio");
+#elif CONFIG_SSD1305_I2C
+	err += gpio_request(pdata->gpios_dc, "ssd1305_gpio");
+	
+	err += gpio_request(pdata->gpios_d0, "ssd1305_gpio");
+	err += gpio_request(pdata->gpios_d1, "ssd1305_gpio");
+	err += gpio_request(pdata->gpios_d2, "ssd1305_gpio");
+#endif
+	if (err) {
+		printk(KERN_ERR SSD1305_NAME "failed to request GPIO for ssd1305\n");
+		return -EINVAL;
+	}
+
+	gpio_direction_output(pdata->gpios_res, 1);
+#if defined(CONFIG_SSD1305_8080) || defined(CONFIG_SSD1305_6800)
+	gpio_direction_output(pdata->gpios_cs, 1);
+	gpio_direction_output(pdata->gpios_dc, 1);
+	gpio_direction_output(pdata->gpios_rd, 1);
+	gpio_direction_output(pdata->gpios_wr, 1);
+	gpio_direction_output(pdata->gpios_d0, 1);
+	gpio_direction_output(pdata->gpios_d1, 1);
+	gpio_direction_output(pdata->gpios_d2, 1);
+	gpio_direction_output(pdata->gpios_d3, 1);
+	gpio_direction_output(pdata->gpios_d4, 1);
+	gpio_direction_output(pdata->gpios_d5, 1);
+	gpio_direction_output(pdata->gpios_d6, 1);
+	gpio_direction_output(pdata->gpios_d7, 1);
+#elif CONFIG_SSD1305_SPI3
+	gpio_direction_output(pdata->gpios_cs, 1);
+	gpio_direction_output(pdata->gpios_d0, 1);
+	gpio_direction_output(pdata->gpios_d1, 1);
+#elif CONFIG_SSD1305_SPI4
+	gpio_direction_output(pdata->gpios_cs, 1);
+	gpio_direction_output(pdata->gpios_dc, 1);
+	gpio_direction_output(pdata->gpios_d0, 1);
+	gpio_direction_output(pdata->gpios_d1, 1);
+#elif CONFIG_SSD1305_I2C
+	gpio_direction_output(pdata->gpios_dc, 1);
+	gpio_direction_output(pdata->gpios_d0, 1);
+	gpio_direction_output(pdata->gpios_d1, 1);
+	gpio_direction_output(pdata->gpios_d2, 1);
+#endif	
+	return 0;
+}
+
+static void ssd1305_rest(void)
+{
+	gpio_set_value(pdata->gpios_res, 0);
+	mdelay(2);
+	gpio_set_value(pdata->gpios_res, 1);
+}
+
+static void ssd1305_hw_init(void)
+{
+	ssd1305_gpio_init();
+	ssd1305_rest();
+	
+	ssd1305set_display_on_off(0x00);			// Display Off (0x00/0x01)
+	ssd1305set_display_clock(0xA0);			// Set Clock as 80 Frames/Sec
+	ssd1305set_multiplex_ratio(0x3F);			// 1/64 Duty (0x0F~0x3F)
+	ssd1305set_display_offset(0x00);			// Shift Mapping RAM Counter (0x00~0x3F)
+	ssd1305set_start_line(0x00);				// Set Mapping RAM Display Start Line (0x00~0x3F)
+	ssd1305set_master_config(0x00);			// Disable Embedded DC/DC Converter (0x00/0x01)
+	ssd1305set_area_color(0x05);				// Set Monochrome & Low Power Save Mode
+	ssd1305set_addressing_mode(0x02);			// Set Page Addressing Mode (0x00/0x01/0x02)
+	ssd1305set_segment_remap(0x01);			// Set SEG/Column Mapping (0x00/0x01)
+	ssd1305set_common_remap(0x08);				// Set COM/Row Scan Direction (0x00/0x08)
+	ssd1305set_common_config(0x10);			// Set Alternative Configuration (0x00/0x10)
+	ssd1305set_lut(0x3F,0x3F,0x3F,0x3F);		// Define All Banks Pulse Width as 64 Clocks
+	ssd1305set_contrast_control(brightness);	// Set SEG Output Current
+	ssd1305set_area_brightness(brightness);	// Set Brightness for Area Color Banks
+	ssd1305set_precharge_period(0xD2);			// Set Pre-Charge as 13 Clocks & Discharge as 2 Clock
+	ssd1305set_vcomh(0x34);					// Set VCOMH Deselect Level
+	ssd1305set_entire_display(0x00);			// Disable Entire Display On (0x00/0x01)
+	ssd1305set_inverse_display(0x00);			// Disable Inverse Display On (0x00/0x01)
+
+	ssd1305set_display_on_off(0x01);			// Display On (0x00/0x01)
+}
+
+/*
+ * Module Parameters
+ */
+static unsigned int ssd1305_rate = CONFIG_SSD1305_RATE;
+module_param(ssd1305_rate, uint, S_IRUGO);
+MODULE_PARM_DESC(ssd1305_rate,
+	"Refresh rate (hertz)");
+
+static unsigned int ssd1305_getrate(void)
+{
+	return ssd1305_rate;
+}
+
+/*
+ * Update work
+ */
+unsigned char *ssd1305_buffer;
+static unsigned char *ssd1305_cache;
+static DEFINE_MUTEX(ssd1305_mutex);
+static unsigned char ssd1305_updating;
+static void ssd1305_update(struct work_struct *delayed_work);
+static struct workqueue_struct *ssd1305_workqueue;
+static DECLARE_DELAYED_WORK(ssd1305_work, ssd1305_update);
+
+static void ssd1305_queue(void)
+{
+	queue_delayed_work(ssd1305_workqueue, &ssd1305_work,
+		HZ / ssd1305_rate);
+}
+
+static unsigned char ssd1305_enable(void)
+{
+	unsigned char ret;
+
+	mutex_lock(&ssd1305_mutex);
+
+	if (!ssd1305_updating) {
+		ssd1305_updating = 1;
+		ssd1305_queue();
+		ret = 0;
+	} else
+		ret = 1;
+
+	mutex_unlock(&ssd1305_mutex);
+
+	return ret;
+}
+
+static void ssd1305_disable(void)
+{
+	mutex_lock(&ssd1305_mutex);
+
+	if (ssd1305_updating) {
+		ssd1305_updating = 0;
+		cancel_delayed_work(&ssd1305_work);
+		flush_workqueue(ssd1305_workqueue);
+	}
+
+	mutex_unlock(&ssd1305_mutex);
+}
+
+static unsigned char ssd1305_isenabled(void)
+{
+	return ssd1305_updating;
+}
+
+static void ssd1305_update(struct work_struct *work)
+{
+	unsigned char c;
+	unsigned short i, j, k, b;
+
+	if (memcmp(ssd1305_cache, ssd1305_buffer, SSD1305_SIZE)) {
+		for (i = 0; i < SSD1305_CONTROLLERS; i++) {
+			for (j = 0; j < SSD1305_PAGES; j++) {
+				ssd1305set_start_page(j);
+				ssd1305set_start_column(X_OFFSET);
+				for (k = 0; k < SSD1305_ADDRESSES; k++) {
+					for (c = 0, b = 0; b < 8; b++)
+						if (ssd1305_buffer
+							[i * SSD1305_ADDRESSES / 8
+							+ k / 8 + (j * 8 + b) *
+							SSD1305_WIDTH / 8]
+							& bit(k % 8))
+							c |= bit(b);
+					ssd1305_writebyte(c);
+				}
+			}
+		}
+
+		memcpy(ssd1305_cache, ssd1305_buffer, SSD1305_SIZE);
+	}
+
+	if (ssd1305_updating)
+		ssd1305_queue();
+}
+
+/*
+ * ssd1305 Exported Symbols
+ */
+EXPORT_SYMBOL_GPL(ssd1305_buffer);
+EXPORT_SYMBOL_GPL(ssd1305_getrate);
+EXPORT_SYMBOL_GPL(ssd1305_enable);
+EXPORT_SYMBOL_GPL(ssd1305_disable);
+EXPORT_SYMBOL_GPL(ssd1305_isenabled);
+
+/*
+ * Module Init & Exit
+ */
+static int ssd1305_init(void)
+{
+	int ret = -EINVAL;
+
+	ssd1305_buffer = (unsigned char *) get_zeroed_page(GFP_KERNEL);
+	if (ssd1305_buffer == NULL) {
+		printk(KERN_ERR SSD1305_NAME ": ERROR: "
+			"can't get a free page\n");
+		ret = -ENOMEM;
+		goto none;
+	}
+
+	ssd1305_cache = kmalloc(sizeof(unsigned char) *
+		SSD1305_SIZE, GFP_KERNEL);
+	if (ssd1305_cache == NULL) {
+		printk(KERN_ERR SSD1305_NAME ": ERROR: "
+			"can't alloc cache buffer (%i bytes)\n",
+			SSD1305_SIZE);
+		ret = -ENOMEM;
+		goto bufferalloced;
+	}
+
+	ssd1305_workqueue = create_singlethread_workqueue(SSD1305_NAME);
+	if (ssd1305_workqueue == NULL)
+		goto cachealloced;
+
+	return 0;
+
+cachealloced:
+	kfree(ssd1305_cache);
+
+bufferalloced:
+	free_page((unsigned long) ssd1305_buffer);
+
+none:
+	return ret;
+}
+
+static void ssd1305_exit(void)
+{
+	ssd1305_disable();
+	ssd1305set_display_on_off(0x00);
+	destroy_workqueue(ssd1305_workqueue);
+	kfree(ssd1305_cache);
+	free_page((unsigned long) ssd1305_buffer);
+}
+
+
+static int ssd1305fb_mmap(struct fb_info *info, struct vm_area_struct *vma)
+{
+	return vm_insert_page(vma, vma->vm_start,
+		virt_to_page(ssd1305_buffer));
+}
+
+static struct fb_ops ssd1305fb_ops = {
+	.owner = THIS_MODULE,
+	.fb_read = fb_sys_read,
+	.fb_write = fb_sys_write,
+	.fb_fillrect = sys_fillrect,
+	.fb_copyarea = sys_copyarea,
+	.fb_imageblit = sys_imageblit,
+	.fb_mmap = ssd1305fb_mmap,
+};
+
+static int __devinit ssd1305fb_probe(struct platform_device *device)
+{
+	int ret = -EINVAL;
+ 	struct fb_info *info = framebuffer_alloc(0, &device->dev);
+
+	if (!info)
+		goto none;
+
+	pdata = device->dev.platform_data;
+	if (!pdata) {
+		dev_err(&device->dev, "no platform data defined\n");
+		goto fballoced;
+	}
+	reg_addr = ioremap(pdata->gpio_outpu, 0x4);
+
+	info->screen_base = (char __iomem *) ssd1305_buffer;
+	info->screen_size = SSD1305_SIZE;
+	info->fbops = &ssd1305fb_ops;
+	info->fix = ssd1305fb_fix;
+	info->var = ssd1305fb_var;
+	info->pseudo_palette = NULL;
+	info->par = NULL;
+	info->flags = FBINFO_FLAG_DEFAULT;
+
+	if (register_framebuffer(info) < 0)
+		goto fballoced;
+
+	platform_set_drvdata(device, info);
+
+	printk(KERN_INFO "fb%d: %s frame buffer device\n", info->node,
+		info->fix.id);
+
+	ssd1305_hw_init();
+	ssd1305_clear();
+
+	return 0;
+
+fballoced:
+	framebuffer_release(info);
+
+none:
+	return ret;
+}
+
+static int __devexit ssd1305fb_remove(struct platform_device *device)
+{
+	struct fb_info *info = platform_get_drvdata(device);
+
+	if (info) {
+		unregister_framebuffer(info);
+		framebuffer_release(info);
+	}
+
+	return 0;
+}
+
+static struct platform_driver ssd1305fb_driver = {
+	.probe	= ssd1305fb_probe,
+	.remove = __devexit_p(ssd1305fb_remove),
+	.driver = {
+		.name	= SSD1305FB_NAME,
+	},
+};
+
+static int __init ssd1305fb_init(void)
+{
+	int ret = -EINVAL;
+
+	/* ssd1305_init() must be called first */
+	if (ssd1305_init()) {
+		printk(KERN_ERR SSD1305FB_NAME ": ERROR: "
+			"ssd1305 is not initialized\n");
+		goto none;
+	}
+
+	if (ssd1305_enable()) {
+		printk(KERN_ERR SSD1305FB_NAME ": ERROR: "
+			"can't enable ssd1305 refreshing (being used)\n");
+		return -ENODEV;
+	}
+
+	ret = platform_driver_register(&ssd1305fb_driver);
+
+none:
+	return ret;
+}
+
+static void __exit ssd1305fb_exit(void)
+{
+	platform_driver_unregister(&ssd1305fb_driver);
+	ssd1305_exit();
+}
+
+module_init(ssd1305fb_init);
+module_exit(ssd1305fb_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Tanghaifeng <rou.ru.cai.hong@gmail.com>");
+MODULE_DESCRIPTION("ssd1305 LCD framebuffer driver");
diff -uNra linux-3.0.82/drivers/video/st7565fb.c linux-3.0.82x/drivers/video/st7565fb.c
--- linux-3.0.82/drivers/video/st7565fb.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/video/st7565fb.c	2017-09-23 03:42:50.282674257 +0800
@@ -0,0 +1,524 @@
+/*
+ * Driver for the Sitronix ST7565 Dot Matrix LCD controler
+ *
+ * Copyright (c) 2013 Tang, Haifeng <tanghaifeng-gz@loongson.cn>
+ *
+ * Licensed under the GPLv2 or later.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/vmalloc.h>
+#include <linux/fb.h>
+#include <linux/uaccess.h>
+#include <linux/of_device.h>
+#include <linux/gpio.h>
+#include <linux/delay.h>
+#include <linux/st7565.h>
+
+#define X_OFFSET		0
+#define ST7565FB_WIDTH			128
+#define ST7565FB_HEIGHT		64
+
+#define ST7565FB_DATA			1
+#define ST7565FB_COMMAND		0
+
+#define ST7565FB_CONTRAST		0x81
+#define SSD1307FB_ADC_NOR		0xa0
+#define SSD1307FB_ADC_REV		0xa1
+#define SSD1307FB_RESET			0xe2
+#define ST7565FB_LCD_19BIAS		0xa2
+#define ST7565FB_LCD_17BIAS		0xa3
+#define ST7565FB_DISPLAY_ALL_NOR		0xa4
+#define ST7565FB_DISPLAY_ALL_REV		0xa5
+#define ST7565FB_DISPLAY_NOR		0xa6
+#define ST7565FB_DISPLAY_REV		0xa7
+#define ST7565FB_DISPLAY_OFF		0xae
+#define ST7565FB_DISPLAY_ON		0xaf
+#define ST7565FB_SCAN_NOR		0xc0
+#define ST7565FB_SCAN_REV		0xc8
+#define ST7565FB_START_PAGE_ADDRESS	0xb0
+
+struct st7565fb_par {
+	struct st7565_platform_data *pdata;
+	struct fb_info *info;
+	void __iomem *reg_addr;
+};
+
+static struct fb_fix_screeninfo st7565fb_fix = {
+	.id		= "Sitronix ST7565",
+	.type		= FB_TYPE_PACKED_PIXELS,
+	.visual		= FB_VISUAL_MONO10,
+	.xpanstep	= 0,
+	.ypanstep	= 0,
+	.ywrapstep	= 0,
+	.line_length	= ST7565FB_WIDTH / 8,
+	.accel		= FB_ACCEL_NONE,
+};
+
+static struct fb_var_screeninfo st7565fb_var = {
+	.xres		= ST7565FB_WIDTH,
+	.yres		= ST7565FB_HEIGHT,
+	.xres_virtual	= ST7565FB_WIDTH,
+	.yres_virtual	= ST7565FB_HEIGHT,
+	.bits_per_pixel	= 1,
+};
+
+static int st7565fb_write_array(struct st7565fb_par *par, u8 type, u8 *cmd, u32 len)
+{
+	struct st7565_platform_data *pdata = par->pdata;
+#ifdef CONFIG_ST7565_8080
+	u32 ret;
+	
+	gpio_set_value(pdata->gpios_cs, 0);
+	gpio_set_value(pdata->gpios_dc, type);
+	gpio_set_value(pdata->gpios_rd, 1);
+	gpio_set_value(pdata->gpios_wr, 0);
+
+	ret = readl(par->reg_addr);
+	ret &= ~(0xFF << pdata->datas_offset);
+	writel(ret | ((*cmd) << pdata->datas_offset), par->reg_addr);
+
+	gpio_set_value(pdata->gpios_cs, 1);
+	gpio_set_value(pdata->gpios_dc, 1);
+	gpio_set_value(pdata->gpios_wr, 1);
+#elif CONFIG_ST7565_6800
+	u32 ret;
+	
+	gpio_set_value(pdata->gpios_cs, 0);
+	gpio_set_value(pdata->gpios_dc, 0);
+	gpio_set_value(pdata->gpios_wr, 0);	//RW
+	gpio_set_value(pdata->gpios_rd, 1);	//E
+
+	ret = readl(par->reg_addr);
+	ret &= ~(0xFF << pdata->datas_offset);
+	writel(ret | ((*cmd) << pdata->datas_offset), par->reg_addr);
+
+	gpio_set_value(pdata->gpios_rd, 0);	//E
+	gpio_set_value(pdata->gpios_cs, 1);
+	gpio_set_value(pdata->gpios_dc, 1);
+	gpio_set_value(pdata->gpios_wr, 1);	//RW
+#elif CONFIG_ST7565_SPI3
+	unsigned char i;
+	unsigned char data = *cmd;
+
+	gpio_set_value(pdata->gpios_cs, 0);
+	gpio_set_value(pdata->gpios_d0, 0);//SCLK=0
+	gpio_set_value(pdata->gpios_d1, 0);
+	gpio_set_value(pdata->gpios_d0, 1);//SCLK=1
+	for (i=0; i<8; i++) {
+		gpio_set_value(pdata->gpios_d0, 0);//SCLK=0
+		gpio_set_value(pdata->gpios_d1, (data&0x80)>>7);
+		data = data << 1;
+		gpio_set_value(pdata->gpios_d0, 1);//SCLK=1
+	}
+	gpio_set_value(pdata->gpios_cs, 1);
+#elif CONFIG_ST7565_SPI4
+	unsigned char i;
+	unsigned char data = *cmd;
+
+	gpio_set_value(pdata->gpios_cs, 0);
+	gpio_set_value(pdata->gpios_dc, 0);
+	for (i=0; i<8; i++) {
+		gpio_set_value(pdata->gpios_d0, 0);//SCLK=0
+		gpio_set_value(pdata->gpios_d1, (data&0x80)>>7);
+		data = data << 1;
+		gpio_set_value(pdata->gpios_d0, 1);//SCLK=1
+	}
+	gpio_set_value(pdata->gpios_dc, 1);
+	gpio_set_value(pdata->gpios_cs, 1);
+#elif CONFIG_ST7565_I2C
+
+#endif
+	return 0;
+}
+
+static inline int st7565fb_write_cmd_array(struct st7565fb_par *par, u8 *cmd, u32 len)
+{
+	return st7565fb_write_array(par, ST7565FB_COMMAND, cmd, len);
+}
+
+static inline int st7565fb_write_cmd(struct st7565fb_par *par, u8 cmd)
+{
+	return st7565fb_write_cmd_array(par, &cmd, 1);
+}
+
+static inline int st7565fb_write_data_array(struct st7565fb_par *par, u8 *cmd, u32 len)
+{
+	return st7565fb_write_array(par, ST7565FB_DATA, cmd, len);
+}
+
+static inline int st7565fb_write_data(struct st7565fb_par *par, u8 data)
+{
+	return st7565fb_write_data_array(par, &data, 1);
+}
+
+static void st7565fb_update_display(struct st7565fb_par *par)
+{
+	u8 *vmem = par->info->screen_base;
+	int i, j, k;
+
+	/*
+	 * The screen is divided in pages, each having a height of 8
+	 * pixels, and the width of the screen. When sending a byte of
+	 * data to the controller, it gives the 8 bits for the current
+	 * column. I.e, the first byte are the 8 bits of the first
+	 * column, then the 8 bits for the second column, etc.
+	 *
+	 *
+	 * Representation of the screen, assuming it is 5 bits
+	 * wide. Each letter-number combination is a bit that controls
+	 * one pixel.
+	 *
+	 * A0 A1 A2 A3 A4
+	 * B0 B1 B2 B3 B4
+	 * C0 C1 C2 C3 C4
+	 * D0 D1 D2 D3 D4
+	 * E0 E1 E2 E3 E4
+	 * F0 F1 F2 F3 F4
+	 * G0 G1 G2 G3 G4
+	 * H0 H1 H2 H3 H4
+	 *
+	 * If you want to update this screen, you need to send 5 bytes:
+	 *  (1) A0 B0 C0 D0 E0 F0 G0 H0
+	 *  (2) A1 B1 C1 D1 E1 F1 G1 H1
+	 *  (3) A2 B2 C2 D2 E2 F2 G2 H2
+	 *  (4) A3 B3 C3 D3 E3 F3 G3 H3
+	 *  (5) A4 B4 C4 D4 E4 F4 G4 H4
+	 */
+
+	for (i = 0; i < (ST7565FB_HEIGHT / 8); i++) {
+		st7565fb_write_cmd(par, ST7565FB_START_PAGE_ADDRESS + i);
+		st7565fb_write_cmd(par, 0x00+X_OFFSET%16);
+		st7565fb_write_cmd(par, 0x10+X_OFFSET/16);
+
+		for (j = 0; j < ST7565FB_WIDTH; j++) {
+			u8 buf = 0;
+			for (k = 0; k < 8; k++) {
+				u32 page_length = ST7565FB_WIDTH * i;
+				u32 index = page_length + (ST7565FB_WIDTH * k + j) / 8;
+				u8 byte = *(vmem + index);
+				u8 bit = byte & (1 << (j % 8));
+				bit = bit >> (j % 8);
+				buf |= bit << k;
+			}
+			st7565fb_write_data(par, buf);
+		}
+	}
+}
+
+
+static ssize_t st7565fb_write(struct fb_info *info, const char __user *buf,
+		size_t count, loff_t *ppos)
+{
+	struct st7565fb_par *par = info->par;
+	unsigned long total_size;
+	unsigned long p = *ppos;
+	u8 __iomem *dst;
+
+	total_size = info->fix.smem_len;
+
+	if (p > total_size)
+		return -EINVAL;
+
+	if (count + p > total_size)
+		count = total_size - p;
+
+	if (!count)
+		return -EINVAL;
+
+	dst = (void __force *) (info->screen_base + p);
+
+	if (copy_from_user(dst, buf, count))
+		return -EFAULT;
+
+	st7565fb_update_display(par);
+
+	*ppos += count;
+
+	return count;
+}
+
+static void st7565fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
+{
+	struct st7565fb_par *par = info->par;
+	sys_fillrect(info, rect);
+	st7565fb_update_display(par);
+}
+
+static void st7565fb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
+{
+	struct st7565fb_par *par = info->par;
+	sys_copyarea(info, area);
+	st7565fb_update_display(par);
+}
+
+static void st7565fb_imageblit(struct fb_info *info, const struct fb_image *image)
+{
+	struct st7565fb_par *par = info->par;
+	sys_imageblit(info, image);
+	st7565fb_update_display(par);
+}
+
+static struct fb_ops st7565fb_ops = {
+	.owner		= THIS_MODULE,
+	.fb_read	= fb_sys_read,
+	.fb_write	= st7565fb_write,
+	.fb_fillrect	= st7565fb_fillrect,
+	.fb_copyarea	= st7565fb_copyarea,
+	.fb_imageblit	= st7565fb_imageblit,
+};
+
+static void st7565fb_deferred_io(struct fb_info *info,
+				struct list_head *pagelist)
+{
+	st7565fb_update_display(info->par);
+}
+
+static struct fb_deferred_io st7565fb_defio = {
+	.delay		= HZ,
+	.deferred_io	= st7565fb_deferred_io,
+};
+
+
+static int st7565fb_gpio_init(struct st7565_platform_data *pdata)
+{
+	int err = 0;
+
+	err = gpio_request(pdata->gpios_res, "st7565fb_gpio");
+#if defined(CONFIG_ST7565_8080) || defined(CONFIG_ST7565_6800)
+	err += gpio_request(pdata->gpios_cs, "st7565fb_gpio");
+	err += gpio_request(pdata->gpios_dc, "st7565fb_gpio");
+	err += gpio_request(pdata->gpios_rd, "st7565fb_gpio");
+	err += gpio_request(pdata->gpios_wr, "st7565fb_gpio");
+	
+	err += gpio_request(pdata->gpios_d0, "st7565fb_gpio");
+	err += gpio_request(pdata->gpios_d1, "st7565fb_gpio");
+	err += gpio_request(pdata->gpios_d2, "st7565fb_gpio");
+	err += gpio_request(pdata->gpios_d3, "st7565fb_gpio");
+	err += gpio_request(pdata->gpios_d4, "st7565fb_gpio");
+	err += gpio_request(pdata->gpios_d5, "st7565fb_gpio");
+	err += gpio_request(pdata->gpios_d6, "st7565fb_gpio");
+	err += gpio_request(pdata->gpios_d7, "st7565fb_gpio");
+#elif CONFIG_ST7565_SPI3
+	err += gpio_request(pdata->gpios_cs, "st7565fb_gpio");
+	
+	err += gpio_request(pdata->gpios_d0, "st7565fb_gpio");
+	err += gpio_request(pdata->gpios_d1, "st7565fb_gpio");
+#elif CONFIG_ST7565_SPI4
+	err += gpio_request(pdata->gpios_cs, "st7565fb_gpio");
+	err += gpio_request(pdata->gpios_dc, "st7565fb_gpio");
+	
+	err += gpio_request(pdata->gpios_d0, "st7565fb_gpio");
+	err += gpio_request(pdata->gpios_d1, "st7565fb_gpio");
+#elif CONFIG_ST7565_I2C
+	err += gpio_request(pdata->gpios_dc, "st7565fb_gpio");
+	
+	err += gpio_request(pdata->gpios_d0, "st7565fb_gpio");
+	err += gpio_request(pdata->gpios_d1, "st7565fb_gpio");
+	err += gpio_request(pdata->gpios_d2, "st7565fb_gpio");
+#endif
+	if (err) {
+		printk(KERN_ERR "failed to request GPIO for st7565\n");
+		return -EINVAL;
+	}
+
+	gpio_direction_output(pdata->gpios_res, 1);
+#if defined(CONFIG_ST7565_8080) || defined(CONFIG_ST7565_6800)
+	gpio_direction_output(pdata->gpios_cs, 1);
+	gpio_direction_output(pdata->gpios_dc, 1);
+	gpio_direction_output(pdata->gpios_rd, 1);
+	gpio_direction_output(pdata->gpios_wr, 1);
+	gpio_direction_output(pdata->gpios_d0, 1);
+	gpio_direction_output(pdata->gpios_d1, 1);
+	gpio_direction_output(pdata->gpios_d2, 1);
+	gpio_direction_output(pdata->gpios_d3, 1);
+	gpio_direction_output(pdata->gpios_d4, 1);
+	gpio_direction_output(pdata->gpios_d5, 1);
+	gpio_direction_output(pdata->gpios_d6, 1);
+	gpio_direction_output(pdata->gpios_d7, 1);
+#elif CONFIG_ST7565_SPI3
+	gpio_direction_output(pdata->gpios_cs, 1);
+	gpio_direction_output(pdata->gpios_d0, 1);
+	gpio_direction_output(pdata->gpios_d1, 1);
+#elif CONFIG_ST7565_SPI4
+	gpio_direction_output(pdata->gpios_cs, 1);
+	gpio_direction_output(pdata->gpios_dc, 1);
+	gpio_direction_output(pdata->gpios_d0, 1);
+	gpio_direction_output(pdata->gpios_d1, 1);
+#elif CONFIG_ST7565_I2C
+	gpio_direction_output(pdata->gpios_dc, 1);
+	gpio_direction_output(pdata->gpios_d0, 1);
+	gpio_direction_output(pdata->gpios_d1, 1);
+	gpio_direction_output(pdata->gpios_d2, 1);
+#endif	
+	return 0;
+}
+
+static void st7565fb_hw_init(struct st7565fb_par *par)
+{
+	struct st7565_platform_data *pdata = par->pdata;
+
+	st7565fb_gpio_init(pdata);
+	/* Reset the screen */
+	gpio_set_value(pdata->gpios_res, 0);
+	mdelay(2);
+	gpio_set_value(pdata->gpios_res, 1);
+
+	st7565fb_write_cmd(par, SSD1307FB_RESET);	//å¯„å­˜å™¨å¤�ä½�
+	udelay(1000);
+
+	/* è®¾ç½®ADCå’ŒSCANçš„æ¨¡å¼�å�¯ä»¥å¯¹æ˜¾ç¤ºè¿›è¡Œæ—‹è½¬ */
+	/* Sets the display RAM address SEG output correspondence */
+	st7565fb_write_cmd(par, SSD1307FB_ADC_NOR);
+	/* Common output mode select */
+	st7565fb_write_cmd(par, ST7565FB_SCAN_REV);
+
+	/* Sets the LCD drive voltage bias ratio */
+	st7565fb_write_cmd(par, ST7565FB_LCD_19BIAS);
+	/* Select internal resistor ratio(Rb/Ra) mode */
+	st7565fb_write_cmd(par, 0x24);
+	/* Select internal power supply operating mode */
+	st7565fb_write_cmd(par, 0x2f);
+	/* Set the V0 output voltage electronic volume register */
+	st7565fb_write_cmd(par, 0x81);
+	st7565fb_write_cmd(par, 0x3f);
+	/* Display start line set st7565r */
+	st7565fb_write_cmd(par, 0x60);
+	/* Booster ratio set */
+	st7565fb_write_cmd(par, 0xf8);
+	st7565fb_write_cmd(par, 0x03);
+	/* Sets the LCD display normal/ reverse */
+	st7565fb_write_cmd(par, ST7565FB_DISPLAY_NOR);
+	st7565fb_write_cmd(par, ST7565FB_DISPLAY_ALL_NOR);
+	st7565fb_write_cmd(par, ST7565FB_DISPLAY_ON);
+}
+
+static void st7565fb_hw_exit(struct st7565fb_par *par)
+{
+	st7565fb_write_cmd(par, ST7565FB_DISPLAY_OFF);
+	gpio_free(par->pdata->gpios_res);
+	gpio_free(par->pdata->gpios_cs);
+	gpio_free(par->pdata->gpios_dc);
+	gpio_free(par->pdata->gpios_rd);
+	gpio_free(par->pdata->gpios_wr);
+	gpio_free(par->pdata->gpios_d0);
+	gpio_free(par->pdata->gpios_d1);
+	gpio_free(par->pdata->gpios_d2);
+	gpio_free(par->pdata->gpios_d3);
+	gpio_free(par->pdata->gpios_d4);
+	gpio_free(par->pdata->gpios_d5);
+	gpio_free(par->pdata->gpios_d6);
+	gpio_free(par->pdata->gpios_d7);
+}
+
+static int st7565fb_probe(struct platform_device *device)
+{
+	struct fb_info *info;
+	u32 vmem_size = roundup((ST7565FB_WIDTH * ST7565FB_HEIGHT / 8), PAGE_SIZE);
+	struct st7565fb_par *par;
+	u8 *vmem;
+	int ret = 0;
+
+	info = framebuffer_alloc(sizeof(struct st7565fb_par), &device->dev);
+	if (!info) {
+		dev_err(&device->dev, "Couldn't allocate framebuffer.\n");
+		return -ENOMEM;
+	}
+
+	vmem = vzalloc(vmem_size);
+	if (!vmem) {
+		dev_err(&device->dev, "Couldn't allocate graphical memory.\n");
+		ret = -ENOMEM;
+		goto fb_alloc_error;
+	}
+
+	info->fbops = &st7565fb_ops;
+	info->fix = st7565fb_fix;
+	info->fbdefio = &st7565fb_defio;
+
+	info->var = st7565fb_var;
+	info->var.red.length = 1;
+	info->var.red.offset = 0;
+	info->var.green.length = 1;
+	info->var.green.offset = 0;
+	info->var.blue.length = 1;
+	info->var.blue.offset = 0;
+
+	info->screen_base = (u8 __force __iomem *)vmem;
+	info->fix.smem_start = (unsigned long)vmem;
+	info->fix.smem_len = vmem_size;
+
+	fb_deferred_io_init(info);
+
+	par = info->par;
+	par->info = info;
+
+	par->pdata = device->dev.platform_data;
+	if (!par->pdata) {
+		dev_err(&device->dev, "no platform data defined\n");
+		goto reset_oled_error;
+	}
+	par->reg_addr = ioremap(par->pdata->gpio_outpu, 0x4);
+
+	st7565fb_hw_init(par);
+
+	ret = register_framebuffer(info);
+	if (ret) {
+		dev_err(&device->dev, "Couldn't register the framebuffer\n");
+		goto reset_oled_error;
+	}
+
+	platform_set_drvdata(device, info);
+
+	dev_info(&device->dev, "fb%d: %s framebuffer device registered, using %d bytes of video memory\n", info->node, info->fix.id, vmem_size);
+
+	return 0;
+
+reset_oled_error:
+	iounmap(par->reg_addr);
+	fb_deferred_io_cleanup(info);
+fb_alloc_error:
+	framebuffer_release(info);
+	return ret;
+}
+
+static int st7565fb_remove(struct platform_device *device)
+{
+	struct fb_info *info = platform_get_drvdata(device);
+	struct st7565fb_par *par = info->par;
+
+	st7565fb_hw_exit(par);
+	unregister_framebuffer(info);
+	iounmap(par->reg_addr);
+	fb_deferred_io_cleanup(info);
+	framebuffer_release(info);
+
+	return 0;
+}
+
+static struct platform_driver st7565fb_driver = {
+	.probe = st7565fb_probe,
+	.remove = st7565fb_remove,
+	.driver = {
+		.name = "st7565fb",
+		.owner = THIS_MODULE,
+	},
+};
+
+static int __init st7565fb_init(void)
+{
+	return platform_driver_register(&st7565fb_driver);
+}
+
+static void __exit st7565fb_exit(void)
+{
+	platform_driver_unregister(&st7565fb_driver);
+}
+
+module_init(st7565fb_init);
+module_exit(st7565fb_exit);
+
+MODULE_DESCRIPTION("FB driver for the Sitronix ST7565 Dot Matrix LCD controler");
+MODULE_AUTHOR("Haifeng,Tang <tanghaifeng-gz@loongson.cn>");
+MODULE_LICENSE("GPL");
diff -uNra linux-3.0.82/drivers/video/st7920fb.c linux-3.0.82x/drivers/video/st7920fb.c
--- linux-3.0.82/drivers/video/st7920fb.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/video/st7920fb.c	2017-09-23 03:42:50.282674257 +0800
@@ -0,0 +1,534 @@
+/*
+ * Copyright (c) 2012 Tang, Haifeng <tanghaifeng-gz@loongson.cn>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/errno.h>
+#include <linux/fb.h>
+#include <linux/mm.h>
+#include <linux/platform_device.h>
+#include <linux/string.h>
+#include <linux/uaccess.h>
+#include <linux/gpio.h>
+#include <linux/st7920.h>
+
+
+#define ST7920FB_NAME "st7920fb"
+#define ST7920_NAME "st7920"
+
+/* st7920 chipset specific defines and code */
+#define brightness	0x2F
+
+#define X_OFFSET	(2)
+#define ST7920_WIDTH	(128)
+#define ST7920_HEIGHT	(64)
+#define ST7920_CONTROLLERS	(1)
+#define ST7920_PAGES	(8)
+#define ST7920_ADDRESSES	(128)
+#define ST7920_SIZE		((ST7920_CONTROLLERS) * \
+				(ST7920_PAGES) * \
+				(ST7920_ADDRESSES))
+#define bit(n) (((unsigned char)1)<<(n))
+
+static struct st7920_platform_data *pdata;
+void __iomem *reg_addr;
+
+static struct fb_fix_screeninfo st7920fb_fix __devinitdata = {
+	.id = ST7920FB_NAME,
+	.type = FB_TYPE_PACKED_PIXELS,
+	.visual = FB_VISUAL_MONO10,
+	.xpanstep = 0,
+	.ypanstep = 0,
+	.ywrapstep = 0,
+	.line_length = ST7920_WIDTH / 8,
+	.accel = FB_ACCEL_NONE,
+};
+
+static struct fb_var_screeninfo st7920fb_var __devinitdata = {
+	.xres = ST7920_WIDTH,
+	.yres = ST7920_HEIGHT,
+	.xres_virtual = ST7920_WIDTH,
+	.yres_virtual = ST7920_HEIGHT,
+	.bits_per_pixel = 1,
+	.red = { 0, 1, 0 },
+	.green = { 0, 1, 0 },
+	.blue = { 0, 1, 0 },
+	.left_margin = 0,
+	.right_margin = 0,
+	.upper_margin = 0,
+	.lower_margin = 0,
+	.vmode = FB_VMODE_NONINTERLACED,
+};
+
+unsigned char reverse8(unsigned char c)
+{
+    c = (c&0x55)<<1 | (c&0xAA)>>1;
+    c = (c&0x33)<<2 | (c&0xCC)>>2;
+    c = (c&0x0F)<<4 | (c&0xF0)>>4;
+    return c;
+}
+
+static void st7920_sent(unsigned char value)
+{
+	unsigned char i;
+	unsigned char data = value;
+
+//	gpio_set_value(pdata->gpios_cs, 1);
+
+	for (i=0; i<8; i++) {
+		gpio_set_value(pdata->gpios_sck, 0);//SCLK=0
+		gpio_set_value(pdata->gpios_sid, (data&0x80)>>7);
+		data = data << 1;
+		gpio_set_value(pdata->gpios_sck, 1);//SCLK=1
+	}
+//	gpio_set_value(pdata->gpios_cs, 0);
+}
+
+static void st7920_write_ctrl(unsigned char ctrl)
+{
+	st7920_sent(0xF8);				//å�‘é€�èµ·å§‹ä¿¡å�·
+	udelay(600);					//å»¶æ—¶æ˜¯å¿…é¡»çš„
+	st7920_sent(ctrl & 0xF0);		//å�‘é€�é«˜å››ä½�
+	st7920_sent((ctrl<<4) & 0xF0);	//å�‘é€�ä½Žå››ä½�
+}
+
+static void st7920_write_data(unsigned char data)
+{
+	st7920_sent(0xFA);				//å�‘é€�èµ·å§‹ä¿¡å�·
+	udelay(600);					//å»¶æ—¶æ˜¯å¿…é¡»çš„
+	st7920_sent(data & 0xF0);		//å�‘é€�é«˜å››ä½�
+	st7920_sent((data<<4) & 0xF0);	//å�‘é€�ä½Žå››ä½�
+}
+
+/*
+ * st7920 Internal Commands
+ */
+
+static void inline display_clear(void)
+{
+	st7920_write_ctrl(0x01);
+}
+
+static void inline return_home(void)
+{
+	st7920_write_ctrl(0x02);
+//	st7920_write_ctrl(0x03);
+}
+
+static void inline entry_mode_set(unsigned char d)
+{
+	st7920_write_ctrl(0x04 | d);
+}
+
+static void inline display_ctrl(unsigned char d)
+{
+	st7920_write_ctrl(0x08 | d);
+}
+
+static void inline cursor_display_ctrl(unsigned char d)
+{
+	st7920_write_ctrl(0x10 | d);
+}
+
+static void inline function_set(unsigned char d)
+{
+	st7920_write_ctrl(0x20 | d);
+}
+
+static void inline set_cgram_addr(unsigned char d)
+{
+	st7920_write_ctrl(0x40 | d);
+}
+
+static void inline set_ddram_addr(unsigned char d)
+{
+	st7920_write_ctrl(0x80 | d);
+}
+
+/* æ‰©å……å‘½ä»¤ */
+static void inline standby(void)
+{
+	st7920_write_ctrl(0x01);
+}
+
+static void inline scroll_or_ram_addr_select(unsigned char d)
+{
+	st7920_write_ctrl(0x02 | d);
+}
+
+static void inline reverse(unsigned char d)
+{
+	st7920_write_ctrl(0x04 | d);
+}
+
+static void inline extended_function_set(unsigned char d)
+{
+	st7920_write_ctrl(0x20 | d);
+}
+
+static void inline set_scroll_addr(unsigned char d)
+{
+	st7920_write_ctrl(0x40 | d);
+}
+
+static void inline set_graphic_display_ram_addr(unsigned char d)
+{
+	st7920_write_ctrl(0x80 | d);
+}
+
+static void st7920_clear(void)
+{
+	unsigned char i, j;
+
+	function_set(0x34);		 //å…ˆå…³é—­å›¾å½¢æ˜¾ç¤ºåŠŸèƒ½
+	for (i = 0; i < 32; i++) {
+		set_graphic_display_ram_addr(i);
+		set_graphic_display_ram_addr(0x80);
+		for (j = 0; j < 8; j++) {
+			st7920_write_data(0xFF);
+			st7920_write_data(0xFF);
+		}
+	}
+	for (i = 0; i < 32; i++) {
+		set_graphic_display_ram_addr(i);
+		set_graphic_display_ram_addr(0x88);
+		for (j = 0; j < 8; j++) {
+			st7920_write_data(0xFF);
+			st7920_write_data(0xFF);
+		}
+	}
+	function_set(0x36);		//æœ€å�Žæ‰“å¼€å›¾å½¢æ˜¾ç¤ºåŠŸèƒ½
+}
+
+static int st7920_gpio_init(void)
+{
+	int err = 0;
+
+	err = gpio_request(pdata->gpios_res, "st7920_gpio");
+	err += gpio_request(pdata->gpios_cs, "st7920_gpio");
+	err += gpio_request(pdata->gpios_sid, "st7920_gpio");
+	err += gpio_request(pdata->gpios_sck, "st7920_gpio");
+	if (err) {
+		printk(KERN_ERR ST7920_NAME "failed to request GPIO for st7920\n");
+		return -EINVAL;
+	}
+
+	gpio_direction_output(pdata->gpios_res, 0);
+	gpio_direction_output(pdata->gpios_cs, 0);
+	gpio_direction_output(pdata->gpios_sid, 0);
+	gpio_direction_output(pdata->gpios_sck, 0);
+	return 0;
+}
+
+static void st7920_rest(void)
+{
+	gpio_set_value(pdata->gpios_res, 0);
+	mdelay(42);
+	gpio_set_value(pdata->gpios_res, 1);
+}
+
+static void st7920_hw_init(void)
+{
+	st7920_gpio_init();
+	st7920_rest();
+
+	function_set(0x30);
+	display_ctrl(0x0C);
+	display_clear();
+	return_home();
+	set_ddram_addr(0x80);
+	st7920_clear();
+//	function_set(0x36);	//æ‰“å¼€å›¾å½¢æ˜¾ç¤ºåŠŸèƒ½
+}
+
+/*
+ * Module Parameters
+ */
+static unsigned int st7920_rate = CONFIG_ST7920_RATE;
+module_param(st7920_rate, uint, S_IRUGO);
+MODULE_PARM_DESC(st7920_rate,
+	"Refresh rate (hertz)");
+
+static unsigned int st7920_getrate(void)
+{
+	return st7920_rate;
+}
+
+/*
+ * Update work
+ */
+unsigned char *st7920_buffer;
+static unsigned char *st7920_cache;
+static DEFINE_MUTEX(st7920_mutex);
+static unsigned char st7920_updating;
+static void st7920_update(struct work_struct *delayed_work);
+static struct workqueue_struct *st7920_workqueue;
+static DECLARE_DELAYED_WORK(st7920_work, st7920_update);
+
+static void st7920_queue(void)
+{
+	queue_delayed_work(st7920_workqueue, &st7920_work,
+		HZ / st7920_rate);
+}
+
+static unsigned char st7920_enable(void)
+{
+	unsigned char ret;
+
+	mutex_lock(&st7920_mutex);
+
+	if (!st7920_updating) {
+		st7920_updating = 1;
+		st7920_queue();
+		ret = 0;
+	} else
+		ret = 1;
+
+	mutex_unlock(&st7920_mutex);
+
+	return ret;
+}
+
+static void st7920_disable(void)
+{
+	mutex_lock(&st7920_mutex);
+
+	if (st7920_updating) {
+		st7920_updating = 0;
+		cancel_delayed_work(&st7920_work);
+		flush_workqueue(st7920_workqueue);
+	}
+
+	mutex_unlock(&st7920_mutex);
+}
+
+static unsigned char st7920_isenabled(void)
+{
+	return st7920_updating;
+}
+
+static void st7920_update(struct work_struct *work)
+{
+	unsigned short i, j;
+	unsigned char *buffer = st7920_buffer;
+
+	if (memcmp(st7920_cache, st7920_buffer, ST7920_SIZE)) {
+//		function_set(0x34);		 //å…ˆå…³é—­å›¾å½¢æ˜¾ç¤ºåŠŸèƒ½
+		for (i = 0; i < 32; i++) {
+			set_graphic_display_ram_addr(i);
+			set_graphic_display_ram_addr(0x80);
+			for (j = 0; j < 8; j++) {
+				st7920_write_data(reverse8(*(buffer++)));
+				st7920_write_data(reverse8(*(buffer++)));
+			}
+		}
+		for (i = 0; i < 32; i++) {
+			set_graphic_display_ram_addr(i);
+			set_graphic_display_ram_addr(0x88);
+			for (j = 0; j < 8; j++) {
+				st7920_write_data(reverse8(*(buffer++)));
+				st7920_write_data(reverse8(*(buffer++)));
+			}
+		}
+//		function_set(0x36);		//æœ€å�Žæ‰“å¼€å›¾å½¢æ˜¾ç¤ºåŠŸèƒ½
+
+		memcpy(st7920_cache, st7920_buffer, ST7920_SIZE);
+	}
+
+	if (st7920_updating)
+		st7920_queue();
+}
+
+/*
+ * st7920 Exported Symbols
+ */
+EXPORT_SYMBOL_GPL(st7920_buffer);
+EXPORT_SYMBOL_GPL(st7920_getrate);
+EXPORT_SYMBOL_GPL(st7920_enable);
+EXPORT_SYMBOL_GPL(st7920_disable);
+EXPORT_SYMBOL_GPL(st7920_isenabled);
+
+/*
+ * Module Init & Exit
+ */
+static int st7920_init(void)
+{
+	int ret = -EINVAL;
+
+	st7920_buffer = (unsigned char *) get_zeroed_page(GFP_KERNEL);
+	if (st7920_buffer == NULL) {
+		printk(KERN_ERR ST7920_NAME ": ERROR: "
+			"can't get a free page\n");
+		ret = -ENOMEM;
+		goto none;
+	}
+
+	st7920_cache = kmalloc(sizeof(unsigned char) *
+		ST7920_SIZE, GFP_KERNEL);
+	if (st7920_cache == NULL) {
+		printk(KERN_ERR ST7920_NAME ": ERROR: "
+			"can't alloc cache buffer (%i bytes)\n",
+			ST7920_SIZE);
+		ret = -ENOMEM;
+		goto bufferalloced;
+	}
+
+	st7920_workqueue = create_singlethread_workqueue(ST7920_NAME);
+	if (st7920_workqueue == NULL)
+		goto cachealloced;
+
+	return 0;
+
+cachealloced:
+	kfree(st7920_cache);
+
+bufferalloced:
+	free_page((unsigned long) st7920_buffer);
+
+none:
+	return ret;
+}
+
+static void st7920_exit(void)
+{
+	st7920_disable();
+	function_set(0x30);
+	display_ctrl(0x08);
+	destroy_workqueue(st7920_workqueue);
+	kfree(st7920_cache);
+	free_page((unsigned long) st7920_buffer);
+}
+
+
+static int st7920fb_mmap(struct fb_info *info, struct vm_area_struct *vma)
+{
+	return vm_insert_page(vma, vma->vm_start,
+		virt_to_page(st7920_buffer));
+}
+
+static struct fb_ops st7920fb_ops = {
+	.owner = THIS_MODULE,
+	.fb_read = fb_sys_read,
+	.fb_write = fb_sys_write,
+	.fb_fillrect = sys_fillrect,
+	.fb_copyarea = sys_copyarea,
+	.fb_imageblit = sys_imageblit,
+	.fb_mmap = st7920fb_mmap,
+};
+
+static int __devinit st7920fb_probe(struct platform_device *device)
+{
+	int ret = -EINVAL;
+ 	struct fb_info *info = framebuffer_alloc(0, &device->dev);
+
+	if (!info)
+		goto none;
+
+	pdata = device->dev.platform_data;
+	if (!pdata) {
+		dev_err(&device->dev, "no platform data defined\n");
+		goto fballoced;
+	}
+	reg_addr = ioremap(pdata->gpio_outpu, 0x4);
+
+	info->screen_base = (char __iomem *) st7920_buffer;
+	info->screen_size = ST7920_SIZE;
+	info->fbops = &st7920fb_ops;
+	info->fix = st7920fb_fix;
+	info->var = st7920fb_var;
+	info->pseudo_palette = NULL;
+	info->par = NULL;
+	info->flags = FBINFO_FLAG_DEFAULT;
+
+	if (register_framebuffer(info) < 0)
+		goto fballoced;
+
+	platform_set_drvdata(device, info);
+
+	printk(KERN_INFO "fb%d: %s frame buffer device\n", info->node,
+		info->fix.id);
+
+	st7920_hw_init();
+
+	return 0;
+
+fballoced:
+	framebuffer_release(info);
+
+none:
+	return ret;
+}
+
+static int __devexit st7920fb_remove(struct platform_device *device)
+{
+	struct fb_info *info = platform_get_drvdata(device);
+
+	if (info) {
+		unregister_framebuffer(info);
+		framebuffer_release(info);
+	}
+
+	return 0;
+}
+
+static struct platform_driver st7920fb_driver = {
+	.probe	= st7920fb_probe,
+	.remove = __devexit_p(st7920fb_remove),
+	.driver = {
+		.name	= ST7920FB_NAME,
+	},
+};
+
+static int __init st7920fb_init(void)
+{
+	int ret = -EINVAL;
+
+	/* st7920_init() must be called first */
+	if (st7920_init()) {
+		printk(KERN_ERR ST7920FB_NAME ": ERROR: "
+			"st7920 is not initialized\n");
+		goto none;
+	}
+
+	if (st7920_enable()) {
+		printk(KERN_ERR ST7920FB_NAME ": ERROR: "
+			"can't enable st7920 refreshing (being used)\n");
+		return -ENODEV;
+	}
+
+	ret = platform_driver_register(&st7920fb_driver);
+
+none:
+	return ret;
+}
+
+static void __exit st7920fb_exit(void)
+{
+	platform_driver_unregister(&st7920fb_driver);
+	st7920_exit();
+}
+
+module_init(st7920fb_init);
+module_exit(st7920fb_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Tanghaifeng <rou.ru.cai.hong@gmail.com>");
+MODULE_DESCRIPTION("st7920 LCD framebuffer driver");
+
diff -uNra linux-3.0.82/drivers/watchdog/Kconfig linux-3.0.82x/drivers/watchdog/Kconfig
--- linux-3.0.82/drivers/watchdog/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/watchdog/Kconfig	2017-09-23 03:42:50.282674257 +0800
@@ -881,6 +881,13 @@
 
 # MIPS Architecture
 
+config LS1X_WDT
+	tristate "Loongson1 watchdog timer"
+	depends on MACH_LOONGSON1
+	help
+		Hardware driver for the built-in watchdog timer on the Loongson1
+		SoCs.
+
 config ATH79_WDT
 	tristate "Atheros AR71XX/AR724X/AR913X hardware watchdog"
 	depends on ATH79
diff -uNra linux-3.0.82/drivers/watchdog/ls1x_wdt.c linux-3.0.82x/drivers/watchdog/ls1x_wdt.c
--- linux-3.0.82/drivers/watchdog/ls1x_wdt.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/drivers/watchdog/ls1x_wdt.c	2017-09-23 03:42:50.286674244 +0800
@@ -0,0 +1,342 @@
+/*
+ *  Watchdog driver for Loongson1
+ *
+ *  Copyright (C) 2013 HaiFeng Tang <tanghaifeng-gz@loongson.cn>
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/types.h>
+#include <linux/timer.h>
+#include <linux/miscdevice.h>
+#include <linux/watchdog.h>
+#include <linux/fs.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/clk.h>
+#include <linux/uaccess.h>
+#include <linux/io.h>
+#include <linux/cpufreq.h>
+#include <linux/slab.h>
+
+#include <ls1b_board.h>
+
+#define TIMEOUT_MIN		0
+#define TIMEOUT_MAX		45
+#define TIMEOUT_DEFAULT	TIMEOUT_MAX /* second */
+
+#define WDT_EN		0x00
+#define WDT_TIMER		0x04
+#define WDT_SET		0x08
+
+static unsigned int timeout =  TIMEOUT_DEFAULT;
+struct wdt_ls1x {
+	void __iomem		*regs;
+	unsigned int		timeout;
+	struct	miscdevice	miscdev;
+	
+	spinlock_t		io_lock;
+};	
+
+static struct wdt_ls1x	*wdt;
+static struct clk		*wdt_clock;
+static char	expect_close;
+static int nowayout = WATCHDOG_NOWAYOUT;
+
+static inline void ls1x_wdt_stop(void)
+{
+	spin_lock(&wdt->io_lock);
+	writel(0x0, wdt->regs + WDT_EN);
+	spin_unlock(&wdt->io_lock);
+}
+
+static inline void ls1x_disable(void)
+{
+	spin_lock(&wdt->io_lock);
+	writel(0x0, wdt->regs + WDT_EN);
+	spin_unlock(&wdt->io_lock);
+}
+
+static inline void ls1x_ping(void)
+{
+	unsigned long psel = wdt->timeout;
+	spin_lock(&wdt->io_lock);
+	writel(0x1, wdt->regs + WDT_EN);
+	writel(psel, wdt->regs + WDT_TIMER);
+	writel(0x1, wdt->regs + WDT_SET);
+	spin_unlock(&wdt->io_lock);
+}
+
+static int ls1x_wdt_release(struct inode *inode, struct file *file)
+{
+	/*
+	 *	Shut off the timer.
+	 *	Lock it in if it's a module and we set nowayout
+	 */
+	if (expect_close == 42) {
+		ls1x_disable();
+	} else {
+		printk(KERN_EMERG "Unexpected close, not stopping watchdog\n");
+		ls1x_ping();
+	}
+
+	expect_close = 0;
+
+	return 0;
+}
+
+static int ls1x_wdt_open(struct inode *inode, struct file *file)
+{
+	if (nowayout)
+		__module_get(THIS_MODULE);
+
+	expect_close = 0;
+	
+	ls1x_ping();
+
+	return nonseekable_open(inode, file);
+}
+
+static ssize_t ls1x_wdt_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos)
+{
+	/*
+	 *	Refresh the timer.
+	 */
+	if (count) {
+		if (!nowayout) {
+			size_t i;
+			
+			/* In case it was set long ago */
+			expect_close = 0;
+			for (i = 0; i != count; i++) {
+				char c;
+				if (get_user(c, buf + i))
+					return -EFAULT;
+				if (c == 'V')
+					expect_close = 42;
+			}
+		}
+		ls1x_ping();
+	}
+	return count;
+}
+
+static int ls1x_wdt_settimeout(int time) 
+{
+	unsigned long freq = clk_get_rate(wdt_clock);
+	if ((time < TIMEOUT_MIN) || (time > TIMEOUT_MAX))
+		return -EINVAL;
+	
+	wdt->timeout = time * freq;
+
+	return 0;
+}
+
+static struct watchdog_info ls1x_wdt_info = {
+	.identity	= "ls1x watchdog",
+	.options	= WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
+	.firmware_version = 0,
+};
+
+static long ls1x_wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+	int ret = -ENOTTY;
+	int time;
+	void __user *argp = (void __user *)arg;
+	int __user *p = argp;
+
+	switch (cmd) {
+		case WDIOC_GETSUPPORT:
+			ret = copy_to_user(argp, &ls1x_wdt_info,
+				sizeof(ls1x_wdt_info)) ? -EFAULT : 0;
+			break;
+		case WDIOC_GETSTATUS:
+		case WDIOC_GETBOOTSTATUS:
+			ret = put_user(0, p);
+			break;
+		case WDIOC_SETOPTIONS:
+			ret = get_user(time, p);
+			if (ret)
+				break;
+			if (time & WDIOS_DISABLECARD)
+				ls1x_wdt_stop();
+			if (time & WDIOS_ENABLECARD)
+				ls1x_ping();
+			ret = 0;
+			break;
+		case WDIOC_KEEPALIVE:
+			ls1x_ping();
+			ret = 0;
+			break;
+		case WDIOC_SETTIMEOUT:
+			ret = get_user(time, p);
+			if(ret)
+				break;
+			ret = ls1x_wdt_settimeout(time);
+			if(ret)
+				break;
+			ls1x_ping();
+			break;
+		case WDIOC_GETTIMEOUT:
+			ret = put_user(wdt->timeout, p);
+			break;
+		default:
+			return -ENOTTY;
+	}
+	
+	return ret;
+}
+
+static const struct file_operations ls1x_wdt_fops = {
+	.owner			= THIS_MODULE,
+	.llseek			= no_llseek,
+	.unlocked_ioctl	= ls1x_wdt_ioctl,
+	.open			= ls1x_wdt_open,
+	.release		= ls1x_wdt_release,
+	.write			= ls1x_wdt_write,
+};
+
+static int ls1x_wdt_probe(struct platform_device *pdev)
+{
+	struct resource *regs;
+	int ret;
+
+	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!regs) {
+		dev_dbg(&pdev->dev, "missing mmio resource\n");
+		return -ENXIO;
+	}
+	
+	wdt = kzalloc(sizeof(struct wdt_ls1x), GFP_KERNEL);
+	if (!wdt) {
+		dev_dbg(&pdev->dev, "no memory for wdt structure");
+		return -ENOMEM;
+	}
+
+	if (request_mem_region(regs->start, regs->end - regs->start + 1, pdev->name) == NULL) {
+		dev_err(&pdev->dev, "failed to reserve memory region\n");
+		ret = -ENOENT;
+		goto err_free;
+	}
+
+	wdt->regs = ioremap(regs->start, regs->end - regs->start + 1);
+	if (!wdt->regs) {
+		ret = -ENOMEM;
+		dev_dbg(&pdev->dev, "could not map i/o memory");
+		goto err_free;
+	}
+
+	wdt_clock = clk_get(&pdev->dev, "apb");
+	if (IS_ERR(wdt_clock)) {
+		dev_err(&pdev->dev, "failed to find watchdog clock source\n");
+		ret = PTR_ERR(wdt_clock);
+		goto err_iounmap;
+	}
+
+	spin_lock_init(&wdt->io_lock);
+	wdt->miscdev.minor = WATCHDOG_MINOR;
+	wdt->miscdev.name = "watchdog";
+	wdt->miscdev.fops = &ls1x_wdt_fops;
+	wdt->miscdev.parent = &pdev->dev;
+
+	if (ls1x_wdt_settimeout(timeout)) {
+		ls1x_wdt_settimeout(TIMEOUT_DEFAULT);
+		dev_dbg(&pdev->dev, 
+			"default timeout invalid set to %d sec.\n",
+		TIMEOUT_DEFAULT);
+	}
+
+	ret = misc_register(&wdt->miscdev);
+	if (ret) {
+		dev_dbg(&pdev->dev, "failed to register wdt miscdev\n");
+		goto err_iounmap;
+	}
+	
+	platform_set_drvdata(pdev, wdt);
+	
+	dev_info(&pdev->dev,
+		"ls1x WDT at 0x%p, timeout %d sec (no wayout= %d)\n", wdt->regs, wdt->timeout, nowayout);
+
+	return 0;
+
+err_iounmap:
+	iounmap(wdt->regs);
+err_free:
+	kfree(wdt);
+	wdt = NULL;
+	return ret;
+}
+
+static int __devexit ls1x_wdt_remove(struct platform_device *pdev)
+{
+	if (wdt && platform_get_drvdata(pdev) == wdt) {
+		if(!nowayout)
+			ls1x_wdt_stop();
+
+		misc_deregister(&wdt->miscdev);
+		iounmap(wdt->regs);
+		kfree(wdt);
+		wdt = NULL;
+		platform_set_drvdata(pdev, NULL);
+	}
+	
+	return 0;
+}
+
+static void ls1x_wdt_shutdown(struct platform_device *pdev)
+{
+	ls1x_wdt_stop();
+}
+
+#ifdef CONFIG_PM
+
+static int ls1x_wdt_suspend(struct platform_device *dev, pm_message_t state)
+{
+	return 0;
+}
+
+static int ls1x_wdt_resume(struct platform_device *dev)
+{
+	return 0;
+}
+
+#else
+#define ls1x_wdt_suspend NULL
+#define ls1x_wdt_resume  NULL
+#endif /* CONFIG_PM */
+
+static struct platform_driver ls1x_wdt_driver = {
+	.probe		= ls1x_wdt_probe,
+	.remove		= __devexit_p(ls1x_wdt_remove),
+	.shutdown	= ls1x_wdt_shutdown,
+	.suspend	= ls1x_wdt_suspend,
+	.resume		= ls1x_wdt_resume,
+	.driver		= {
+		.name	= "ls1x-wdt",
+		.owner	= THIS_MODULE,
+	},
+};
+
+static int __init ls1x_wdt_init(void)
+{
+	return platform_driver_register(&ls1x_wdt_driver);
+}
+
+static void __exit ls1x_wdt_exit(void)
+{
+	platform_driver_unregister(&ls1x_wdt_driver);
+}
+
+module_init(ls1x_wdt_init);
+module_exit(ls1x_wdt_exit);
+
+MODULE_AUTHOR("tanghaifeng <tanghaifeng-gz@loongson.cn>");
+MODULE_DESCRIPTION("watchdog driver for loongson1");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
diff -uNra linux-3.0.82/drivers/watchdog/Makefile linux-3.0.82x/drivers/watchdog/Makefile
--- linux-3.0.82/drivers/watchdog/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/drivers/watchdog/Makefile	2017-09-23 03:42:50.286674244 +0800
@@ -110,6 +110,7 @@
 obj-$(CONFIG_M54xx_WATCHDOG) += m54xx_wdt.o
 
 # MIPS Architecture
+obj-$(CONFIG_LS1X_WDT) 		+= ls1x_wdt.o
 obj-$(CONFIG_ATH79_WDT) += ath79_wdt.o
 obj-$(CONFIG_BCM47XX_WDT) += bcm47xx_wdt.o
 obj-$(CONFIG_BCM63XX_WDT) += bcm63xx_wdt.o
diff -uNra linux-3.0.82/firmware/sd8782_uapsta.bin linux-3.0.82x/firmware/sd8782_uapsta.bin
--- linux-3.0.82/firmware/sd8782_uapsta.bin	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/firmware/sd8782_uapsta.bin	2017-09-23 03:42:50.290674232 +0800
@@ -0,0 +1,1509 @@
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+C‚` ½]H!	µÁ`]JSj\L#@<c`Sb‚h
+C‚` ½ðµ$MOSN7àÅhhÿ÷òþih ˆ@°`dà9X)òÑNI ÿ÷åþÿ÷‰þ À°` ð½øµIMìhàÐ¨è`@ Õ€ ÀCè`€ „Cð
þ Õ&ö0ðþðCè`´C`@Ð !@ÉCé`„C 	Ð'?&>@0ð¤ýðCè`¼Cà@	Ð'¿&>@0ð=ýðCè`¼CàÕ ÀCè` „Cðßþ(Ððõý(Ð ð�ü`Õ!Hè`ÀC„C ÕHè`ÀC„C,Ú Àð1ýHè`Iˆh"’Cˆ`ø½K"’µÚ`ÿ÷�ÿ ½€)€ÿ 1€ßÀÿ€ÿ$äé4€0€ˆÀ€è€€"€ÿÿÿ¿ÿÿÿßÿÿÿµ*Ð ð“ýà$ ½|µIy#y		C�ˆBi$3`)Ù`9 2�€Q}ÉÊ’*©*ð`é q
+àq˜ q
+`q |½ |½(µÐi)ÑA‰Àˆ"ð)þ½*ðé½þµ �� ‰%¸x.€(Ð& ˆ(gÐðÜú(dÐ8*ð0é(WÑ.Ð" iFð¶ü(Ð˜—g‚ø	5�(Ð (HÐ!O ðoù�à ©ð¡û(Ð (9Ðð•ú(EÐÿO=aðƒø
ðqÿ(Ñð„ú(ÑúI`úI€ ½pðBø™ÿ ð§úöM(ˆ(ÐõI V@	Ð% ð›ýmÐ8z(÷ÑàðUú (€8r ð#ø ø`àkFy(Ñ €   sþ½.üÐ" iFðVüà.ôÐ
ðAÿ(ðÐ ˆ(íÐðåù(éÑðËù(åÑ ‰ÁxÊÑ€à0ÕJ}+ÐŠ	*ÑxÀÐˆÕðsøþ½ 
ðåÿþ½ðñù(úÐðCøþ½÷µ"˜AxxC 6020ÃH	*ðˆè)Ð00 €  ga% �!(*ð~è¸y(pøyhp (q hq˜¨q
+èq0
+®pèp2  �™ 2*ðlè ÿ÷ÿ ˆ(Ñ ÿ÷ÿþ þ½   �
ðåþ(Ð 
ð–ÿÿ÷ý¦K¤H!h"h# G(ÿ÷ý þ½ÿµ �@ƒ°Ÿ$ÿ7a78 B/Ñÿ"‘2F#©¨ðYø(&Ð8! C8wœ4 *ð$è˜(Ñ à
 `r%r bz™
+0*ðè1"1 *ðè`z™
+0ˆr
+Èr™˜ðüÿ°ð½|æ‚ˆ`*Ù`:‚€Hy
+yC$0q
+Hqæ ˆq Èq pG pGµª’ª«ðÛü˜˜	 ðoþ ™À0Á�™‚™A‚ ð­þ½ñµ$&%†°ðBú¨)ðÌï(»ÐkFX}ÁÔ€µÕkF}(¯Ñ�8©)ð¾ï/¨Ð™ V/ÑkF™}
-QO9hˆBÚyhˆBÝ¸h&(”Ð$)ð¨ïø`à)ð¤ïùh)ð¦ïHIˆBØ¸h(„Ð$¸h B!Ð.Ñ¼`)ðšï(Ð@IÉi`1É{)	ÐkFÙzA@ÙrYzA@Yr|A@tkF}™’+"¨ðžý]çóµ‘°
+ � ���˜(~Ð(‰niA "¨)ðVï¨�˜0)ðhï«™xÄ
+ ’*Ñ			Õ Ÿ C 7(Ðÿ÷úû�8~JA˜I0)ðNïÉï¯þôýZøË,�	Ð˜
+(Ò˜I@ÁhIÁ`˜ÿ÷æû˜ÿ÷Lÿ !(‰l 8)� qàŒóôÃ Ã�Ã˜Â@óxŒÀ@ÁP@KL¤�
+kF`q�	 r
+`r°y pðy`p¨ˆ(Ñ({ (?Ñ«Øx€Õ �«˜x‰)3Ñ	à«à ÕÿHx(Ððú(Ð8~ÀÕúHh(ÐùHh(
ÐðÄþ(	ÐðIý(ÐôHh(Ñ �
ð@ý(	Ð˜)ð¨î(Ñ ð£û
+ðÏý™0ÿ÷¸þ1À1 ‘^ð®û s™ ^ð›û«`s˜x	Õ8~@@àÿ  r¨ˆ(Ð˜)ð~î(8Ð'§pçp¨ˆ(Ñ({ (+Ñ zð"þ(	Ð˜(Ð!0ðÇýàÎHp«˜x™	0ðÿ˜(ÑÉHˆ(ÐÈH"hF!)ðî(ÐÅI pà 
ð�ý(ÿ÷ëüà8~À	Ðš!(ÿ÷@þ(~Ðà›š!(ÿ÷5þ(
Ñ pàpÿ÷öú(ÿ÷Ïü ÿ÷ôú °ð½¨ˆ p
+"2àp˜Ñ)ðDîpy(~Ñ0ðú!I�@{ «�˜|ÀÐ �øuÐ¸sÔà¨€ðZÿ(�kÐpy(hÑ˜@zÀdÕ™ðyÉyˆB~Ñ˜
+(\ÓxÔøXÐàø~Ðx|Ô�H"ˆ�H#ðòý(�FÐ˜©ˆ�€ð(ü™�™"
+s™G!8)ðÌí 8q xqày¡yC¸q
+àTàøq˜€j(Ñ˜(ÐpzÕ z8s`y!yC8ªˆ0)ð¬í™ðhHaðyxp°y8p¨ˆ¸p
+ààøp˜!ðÓû˜((Ð
ðü(Ð 
ðÏüÿ÷NúdKbH)h"h#¨G8ÿ÷Gú zð'ý(Ð˜(Ñ!àà0ðÊü
à8ÙÕ˜
+(ÖÓ  pàpç˜(ÑIIp«˜x™	0ðþý˜(ÑDHˆ(ÐCH"hF!)ð
+í(Ð@H!pà 
ð‡ü çÿµ�°7h!‘™|i)Ð@0�)ðPí ™AÀxÍ2¥fð®€+§ 1@Ô¸ˆ!°ð½(ˆh(Ø øçª‘’™˜ª«)ðDí()ðFí(nÐ+H!ª«Ã«)J’}8+©)ð8íIÑ ÿ0a0	#Õ,Ð!Éa‰j)Ð«’`2‹X[‹PIIw˜)ðí«™*RR2’}* ÿ÷˜ü 0`±çÎÂàÂÜÂ(ÃÍÂLõˆÀÉÂªÃdŒÀ@Á`!ÈÀÀ5`(‰™@)ðêìˆ¨€ ÿ0a0«&2š@‘Cwà«}‘•*ˆ™˜d:	«)ðÔìÐ «ÿ0a0#“@™Cw(ˆ8(€¸ˆ8¸€,Ð À €j(ÐÁmIÁe0Pç,Ð À �j)Ð«’`2‹X[‹P�j
+iR
+a€jÁhIÁ`˜)ð€ì«šš2’«} ÿ÷üÓç(Ð!ÉAˆj(ÐiRaˆjÁlIÁdpG÷µ�°˜h �|i@0�)ðRì�$0
+� ðSú(Ð
+˜)	ª«)ðdì(Ð,Ð À €j(øÐmIe‚à˜ˆh(~Ù*L2h8’‘’:�988’ 6‘�0~Fv
+™˜3)ð:ì˜)ð"ì(9Ðª©’ ‘�
+š™;0)ð,ì(NÐÿJ’ÿJÿK™8)ð&ì(Ñ™`Aà™`‰™)ðì�˜(?Ðª’
+™˜+:)ðì5Ñà˜€yÁÉ ðBÿ"à."Ð0€Ð,Ð À!ˆj(ÐÂlRÂdˆjiIa
à°Õ,ÞÐ À €j(ØÐhI`Ôç hå˜™ˆ8€¸ˆ8¸€kF™Œš()ðÖë.
+Ñ,Ð À €j(ÐÁmIÁe Kå÷µ‚°h��˜%@0)ðˆë˜ñx@iIÔ 0€}@.Ô%,à,Ñ °ð½¡zÉÐày(Ñ™"hFÿ÷ÿà™"#hFÿ÷þ˜8`°yÀÑ-
Ð y€
+Õ ðÝüà!É@€j�hI�`¾ìsìE(Óçðµ&—°–*á!‘™	ÉÉ‘‰©ð’ú˜(Ð˜0ðoü™ðƒÿ(Ñ,Ñ˜!�€ÿ÷«ù	á™La`y(Ñ ð¬ý0�`zšÀ™À)ðNëà yš(Ñ#˜3)ðHë ðŸøà#˜3 )ðDë˜‰	ÊxÒÑ�à7"Ò¥ªj*Ðk[c:xÒÐªj*ÐSk[Sc‚ˆ*OÐš*&Ñ:xÒÑ#
+"ÿ3{3’™š)ðë˜€ˆ(Ñ ©ÿ÷Åú˜ÿ÷Nù¨j(ŸÐjIb¦à·"’¢)ðë˜€ˆ(ÔÐ`y('Ñ ©
+ð$ø™˜Éx}ÉÉˆBÐ 	ðý ð	ø ðòø(Ñ™ 	ðZù˜@0{(Ð™ ˆ€[à˜€ˆ(WÐ˜)ðØê(Ð˜CJ�ˆDK@9�€’‰@J	)ðªê(_Ð�‰�?à˜€yÀÐ(jàhj(Ð6.BÐðy(Ð(Ñÿ4a4b‹™ *Ð )ð¬ê˜;2©ð·þà(Ð('Ñ ðÛü(úÑ2©¨ÿ÷³þ(Ñ˜($Ð!�€˜(Ððy(Ð(Ð˜ÿ÷Çø˜©ÿ÷°úð�ø(Ð ðÏøàþç¨j�hI�`˜¿!Àx@™Èp„ç! ªð/û(�ÐËæI€ ÀCaðYÿ(Ð ð®øI È`a°ð½¼ÀÀÄÀÀ`!¥€ŒóIH`IH`pGJ ‘BÐ pG«;x;ˆŽ!µs
H"h#)ðré½@iÀhpGµ@ið±ü½° pG µ)ðné½µ@ið.ÿ½ŒÀsdioóµ$%(�°Ðpy(Ðà ð<þ(m(Ò"ÿH)ð„éñÐ
+à,Ñ"üH#ð�ùÑþ½faÿ÷Åÿ �'!('s)ðléðXû(s (q hq8
+¯qèq°y(pðyhp˜5` þ½µ‰1‘p	
+Ñp!ÿ÷‹ÿ½
+ãIµð™ø½ pG|µš’
+“ÝH#)ð¬é|½ÿµƒ°‰Bi�ß¢rèBŸÝx©ÿ÷‘ÿÑ °ð½ÑJ˜9“–)ð˜é˜�|)
Ð"’ËJq0’‘#ÿ÷Ðÿ™`1Ès
+t™˜#")ð„é(ÿ÷®ÿ Øç¿Hµ)ð|é½µŽ°hF)ðzé iFðù°½·Ipµò1P8(")ðné ÿ÷áÿ+" ÿ÷áÿp½µ@iÿ÷èÿ«I 1Èg€0h(Ð�zý"@�r ½µDi ÿ÷Âÿ¡KÊ3" ÿ÷Áÿ�H!0Ag‚o*Ñ�g)ð>é ½ðµ)‰@iI…°‘©ÿ÷
+ÿÑ °ð½"’�J™˜“)ðé1˜"@1#)ðé�po(
+Ð`{!C/`sÐƒHàƒH aà/Ð(ð•úà(ÿ÷�ÿ™ ÿ÷ÿ Ðç|µ
‰Bi©ÿ÷ÏþÑ |½"’pJ˜1“)ðÖè)˜"@1#)ðÒèa{"CaskI¡a ÿ÷÷þ |½÷µˆ°%cL˜4!)ðÒèÐ_Ox)ðÐè"@1 2(’‘(Ðx)ðÈè(Ð @8Ax€
ð�ÿàRH)ðÀèÑ °ð½x)ð¼è! Ô1P0«Ã#™š’‘	š
+™()ð°è%š™˜#ÿ÷Îþ(Ð%à-Ñ1	1 )ð¢è  g(Óçpµ9M5))ðšèÑ p½ y"(Ð")0ÿ÷1ÿ(Ð p½!	1()ð€èêçpµ*M5))ð€è
+Ð)0ÿ÷Xÿ(Ñ!	1()ðlè p½øµ‰@�y$	Õ@yÀ	Ð(ÿ÷¼ÿø½ ð]üd$$:1(ÿ÷[ÿ(ñÑ,ðÓø½(ÿ÷Æÿø½óµ�°L4àù0h(.Ðü ]ðŒø˜2!ðªùN
à0d£À†á{“¹ö/Ð/Ñ°xðJ@°p!8#)ðè˜haìJíI #)ðèþ½èJ!8#)ðèpx@ppþ½pµ
äLÿ"2QãH"(ðTïáH")€(ðNïßJàI #(ðüïp½øµØH8xÀÐÕH(ðòï KQìä¶ð¨Ì9ÓO*@?¸(ð4ï}pš1 ÿ÷Îÿø½ÐH@hpGËH!
8µ(ðïÇH!8(ðïÄH"8AxCAp½ÁHµ 8ÁxkFpyXp˜½¼H8xÀÀpG¹H8xIIpÖçµH"8xCppGpµ†°
+™š)Ñ ©�‘¬I«H“’#*
+98–(ðœï°p½pµ¤H@8Ax€Ž°
ð2þ(Ð#2hF(ðŠï(iFðàþ™H(ð|ï˜I ˆg°p½pµ”L< xÀÐ`xÀ
Õàx"Á(ÿ÷Ðÿàx"Á(ÿ÷Éÿp½µkF‰Hx
8ÁpYxqyAqz�q½ƒKµ
;ÜxpyDpXyp˜yp½|Kµ ;ÜxpyDpXyp˜yp½µÿ÷VÿvHÿ"!
+8(ð,ëvH"!`A` 8wà8(ð2ï½µpL h(Ð(ð.ï  `½ôçgI€1(`Ðž9	xÉÐbIÉo)Ð�zý"@�rpGÿµƒ°Ÿ
ž"Jp "
+pjx©T)5(ð
+ï(xkFrhxXr‰ª��˜	(ðï(xkFqhx­Xq•˜ˆ±€E˜(ðîkF˜ˆ°BÓ0‚™˜(ðî¥BÒ(­/Ðx9p@xxp¥BÒ(­¥BÒˆE¥BÒ˜)(Ð˜"(ðüí Èä9I7H`9I8H`:I8H`pGµÿ÷ý ÿ÷ý ½þµo@Ñàn@Ñ (ðžîþ½þ÷•úà!þ÷ú*H(ð¢î(÷Ñ(þ÷�ú0©ÿ÷#üéÐJ˜’9“”(ð”îN>p(ðNî0yÃpx€Á˜(ðˆîánI)áfÑ o@ g!˜"@1#(ðî(ÿ÷<üþ½Ùâð@œãð¤á©À€–˜-ãð¤âÁ<>µ@>»>€pµ%‰Di^x.Ð.Ñcy+Ñð¹ûàÿ÷Ÿý%
+à`y(Ð(Ñy(Ñ(ð<î(p½µ
ðØüÿ÷Ôþ ½÷çµ0 ð€ýðGúàÕð°þ½ðRþ½ îç(ÒWI€‚Òo«àå*{ \pGÿ pG
+ µÿ÷óÿ�BÑÿ÷íÿ½ÿ(ÐNJ!‹Ó\ƒBÑpGI)õÓÿ pGÿ(ÐFJ!‹›[xƒBÑˆ\pGI)ôÓÿ pG(Ò>I€@@xpGÿ pGÿ(Ð9J!‹Ó\ƒBÑˆ€@xpGI)ôÓÿ pGÿ(Ð1J!‹Ó\ƒBÑˆ€€xpGI)ôÓÿ pG)J!‹Ó\ƒBÑˆ€Àx@À@pGI)ñÓ pGpµðzù ð´ø(ÿ÷¦ÿ(Ð(Ð(Ð(Ñ ð[øp½µÀÕ" ÿ÷Þÿ Õ"Ò ÿ÷Öÿ`Õ"’
+ ÿ÷Îÿ½ ÀµðHù Àð�øIÈh€"�CÈ`½0Ä(€øµÿ÷Wÿ0ÿ÷}ÿ0ÿ÷‹ÿ/Ñ0ÿ÷–ÿ(Ð#(ðXí! à&I¨@Àx!À(ðLíÿ"1ÿ÷'ÿø½µÀÕ! ÿ÷Ìÿ Õ! ÿ÷Æÿ`Õ! ÿ÷Àÿ Õ! ÿ÷ºÿ „BÐ@„BÐ@„BÑÿ ‚¡Ð‰ÐÂ‰Ñ à à
+ ÿ÷ÿ(Ð(Ð(Ð(Ñ!ÿ÷•ÿ½0ÄI
+hC
+`ŠhCŠ` pGI
+h‚C
+`Šh‚CŠ` pG€"€
+I
+H@9BhRüÔJh*ùÑpGIH`pGµ(ðäì½µ(ðäì½@è€I"@:»Hh�h"C�`�hÿ" 2C"R‘C�`AhCA`AhÒCA`pG¯HhAh"R‘CA`pG«HhAh"RCA`pG§Hh�k)Ú�k		ûÑpG€kpG	C Hh�apGžI	hŠiCŠapGšI	hÊhCÊ`pG–I	hJiCJapG	C‘HhÁcpG�I	hJh
+CJ`pG‹Hh€kÀÀpGˆHhAh"Ò‘CA`pG„Hh�kÉüÐAh"Ò‘CA`pGI	h
+kcHh"ÒCH`pGzHh@jpGxI	h€1Jj	CJbpGrHhÀjpGpI	hÊi‚CÊapGmI	hÊiCÊapGjI	h
+jC
+bpGgI	h
+j‚C
+bpGÈ#lÜ#Í»þdHh€0AhIIA`pG`Hh€0Ah"CA`pGpµ\M(h€0h"C`hYLIÕh¡C`
+ (ðZê(h€0h!C`p½PHh€1
+hRR
+`�kÉüÔpGJHh€0hÀÀpGGHh€0hFJ‘C`pGCHh€0Ah"‘CA`pG?Jh€2Sj			CSbj@ÉÉ@Cbh!	ˆC!	@`hIC`pG0Hh€0ÀhpGpµ-M)hi!	C&a!€1iaHiKaˆið ˆaÈiÊa h!C ` h "�C `(hAkCk‹BüÐÿ÷Øÿ(öÑ(h�hC�`Ah"RCA`p½Hh€0ipGHh�h "C�`pGHh�h "‘C�`pGI	h€1
+h#ÛÀšC	C
+`h"C`pGHh€0hÿ"RC`pG°À@´I"(ÈhÐCà�CÈ`pG°I µ`ðVù½ðµ%-ªH¬LÀ0Â
“‡)§Nj
+ÐCbj™Cb h(C `0h8C	à‘CbjCb h¨C `0h¸C0`ð½8µ$hF(ð:ê(Ð-ÑkFXxÁÐ@Õ˜xà$à-	ÑkFXx�ÕÀ	Ð˜x	(ñÐ 8½sµkF\y`Õ†Hh)Ñ!`(ÿ÷Íÿ	(ÿ÷¤ÿ`ÔkFy	Ð ÿ÷Šÿ|½3µkF(yÑà(Ñ	vJsIÔC€1(
ÐtKuM(
Ð	(Ð(ÑÈÈ`aÈab<½Ê`
+aÌaàË`
+aÍab<½Ë`jHaÍajHîçðµ(zExyGy&Ð)Ñ™)	Ñ*Ñe@ÙÐf@™Õg@,x*	
+C!
+CTI"CÀ1Jb‚yÃxC2CŠbÂy€x;CCÊbð½8µ$hF(ðŠê(Ñ(ðø8½kFxÐ(Ñ™(ðAø 8½ðµ&‡°kF}740u-–
+Ñ!Yu™}!™u!rYr™"˜r
+à!kFYu™}!™u!rYr"˜rkFÚr�t™(ÿ÷@ÿkF™}(‘ÿ÷Xÿ˜#’:1¨ÿ÷|ÿ °ð½óµ…°%
+âï¢Ø'ža-q.,©(ðDé(òÐ™8ÿ÷ÿkF™~8‘ÿ÷6ÿkFX~ÁÔ€Õ%(ð:é(ÐIÉi`1É{)	ÐkFÙzA@ÙrYzA@Yr|A@tkF~#’2)¨ÿ÷>ÿ Àç§€´À(€ÝUÝß_ßï/¯/ñýõýþòúò¤!	 `!A`pGÿHk€"CcpGýIµÉh'ðÆí‰€
+CÐ(ðè½øHj"Cb ìçôHj			b åçòIpµh"�C`ðJPh@@P`i!CaìI“iÛÔ@úÒ�i€ÔIúÒý÷oýæI
+h$d¢C
+`ãJ€2hãM+@`híC+C`
+h"C
+`ý÷_ý ÿ÷±ÿÿ÷»ÿÿ÷.þp½pµ€ (ð`èÑI
+x*ÑŠiRŠaÔþç(ðTèp½Ji*ÐþçHa pÎM ˆa¬ˆ€@¨ˆk& Cö°BëÐ ðóû(æÐ4C¬€p½½Iµˆi@ˆaÑHi"Jaÿ"
+p(ð*è½(üÚ€ (ð$èþçpµ²Npi(Ðý÷ýþçý÷ýµMpa¬ˆ €@¨ˆ C‚(Ð(ˆð€ ðÁû(Ð¨ˆ0�‚ C¬€p½¢Iµ¨J‰Hi“€Ëˆ€"Jaÿ"
+pý÷èü½µšL`i(Ðý÷Ûüþçý÷Øü�I`aˆˆ"’@Šˆ‚C*Ð
+ˆâ€"
+€Šˆ"�"Cˆ€½ŒIµ’J‰Hi“€Ëˆ€"Jaÿ"
+pý÷»ü½pµ(ðêè‰L 4%�(ðäè¦€(ðâèp½pµ(ðÜè‚L 4%�(ðÖè¦€(ðÔèp½pµ(ðÎè{L 4%�(ðÊè yp½pµ
ÿ÷ðÿ(C ÿ÷Ýÿp½pµ
ÿ÷åÿ¨C ÿ÷Òÿp½pGµÿ÷Áþÿ÷Æþÿ÷äþ½aHAx)	ÑgI	h"ÉBp	2Q\�p€xpGbKYh8"‘C@CX`pG^KYh"’‘C@CX`pGµÿ÷óÿ ÿ÷èÿ½ÿ#pµÁ3 %ÿ÷Ñÿ,(Ðÿ÷Ìÿ(Ñ#)ÿ÷æÿMH�hO"Ò‘C�`�h"R‘C"’C�`Bh!ÉŠCB`ÂhC#ÛšCÂ`BhŠCB`@I
+h@#C
+`
+h"C
+`
+h#C
+`h "C`9I `5Hh@@(:FT2Ô+jXÅÑ/H€8hÀ	Õ3L À`` ÿ÷Nþ @``p½"HÁx)Ñ!ÁpypGIµHi"Jaÿ"
+pý÷äû½pµL`i(Ðý÷×ûþçý÷ÔûM`a¬ˆ €@¨ˆµ& C6°BÐ ð�ú(Ð4C¬€p½µÿ÷Þÿ& ÿ÷ ÿÀ	aÀIC& ÿ÷
+ÿÿ÷Çÿ½@� À€¡€£€@¦€ˆ!€ÿïÿï� €)€#€$€(€µÿ÷�ÿûI
(ˆhÐCˆ` à˜Cˆ`ÿ÷¿ÿÎçµðÍú(ÈÑòHÁh			!CÁ`�h			!C�`‚h
+C‚`i	"Cai
+Ca‚i
+C‚aæI XåIÈ`¨çµáL hãI	C `àh"	Cà` i	C a iÉC a	 ÿ÷Àÿ hØI@ ` h!IC `ÕHh@@(ÑÍH€8hÉÕ ha
àhÀÔ`h!IC``à(Ñ h!	C ` hÇI@ ``h€	€``P ÿ÷{ÿ[ç»H€8ˆpG¸H€8h¾Iˆr¼H 8…¼IIicpG¹H 8Ai)Ð!AapçpG´I 9Jiˆi�BÐHagçpG¯I 9HhˆaJi‚BÐHa]çpGªI 9ˆhˆaJi‚BÐHaSçpG¥I 9ÈhˆaJi‚BÐHaIçpG I 9iˆaJi‚BÐHa?çpG”H�JhC`pG‘IšJh�C`pGpGpG pGµŽL`y@(Ñ `q'ðâîÕ�‰@aqÕHB`q  Vèæøµ$%N°h@!ˆC°`°h€!C°`~O!øh'ð¬ê‰€
+CÐ'ðí°hÿ!IC°`øh!'ðžê‰€
+CÐ'ðòì}!É°hdÔŒBùÓà°hÿ!IˆC°`°h@!C°`°h€!ˆC°`ÿ÷¬ÿ(ø½µÿ÷ºÿ ÿ÷©üÿ÷µÿœæpGpGpµdL j!ˆC!C b jM¨C b j(C bUH!ÀhIA‰€
+CÐ'ð°ì j¨C bp½µÿ÷Kþ!S ÿ÷—ý!/ ÿ÷zý !0 ÿ÷výÿ÷3þjæµÿ÷9þ!S ÿ÷�ý@!/ ÿ÷hý(!0 ÿ÷dýÿ÷!þXæµÿ÷'þ€!9 Ÿ”Ù™Ð/9Ô‹©ÿ÷~ý!< ÿ÷Vý€!9 ÿ÷ký ÿ÷]ýÀúÕS!: ÿ÷Iýÿ÷þ=æµÿ÷þú!  ÿ÷?ý!= ÿ÷;ýÿ÷qý(Ðÿ÷mý(Ñ!R ÿ÷/ý¬!1 ÿ÷+ýõ!3 ÿ÷'ýÿ÷äýÿ÷Âÿðsþæµÿ÷åýT ÿ÷'ý,Ñ!Càï!@T ÿ÷ýÿ÷ËýæpGHipGIH`pGøµ �hx)x
+OC,7(LÑhy)yC(Ð ø½€(€!€´½ À€ÿ÷ßG €ÿß¿ÿÄ¨€ ˆ#€‹(h:¬ áx"x	
+C¡xcx	C
+CÁ{XhÉIhŽC@1C`@$(èÛL j&6°C b j0C b ÿ÷®û j°C b¨"ÓùX	hÛ[hR@
+pCp	ƒpÁp*îÛ˜(q
+hq˜ ç!
+(ÒI@	ZH€ pG#€` À�pµ$?Mà€Gd (X(ùÑp½µ'ðZí ÿ÷Oÿÿ÷¼ý ÿ÷™üÿ÷˜üÿ÷Çüÿ÷¿þÿ÷ÿÿ÷Uÿÿ÷ºþÿ÷¹þ ½µðCøðúðwú'ð>í(Ð ½'ð<í ½µðØû%H$I`%IA`%I�`%HAk"‘CAc#Hh#J@` ½"J"H!µð$ø!H"!ðøa"IHÒðøW"IHÒðøð·ùÿ÷øÿ÷ÿ ½0µ”"à“ÍXRÅP¢BùÓ0½“"µà”RQšBúÓ½Œ À €)€€€€€€
+€€@¨€(€ÿÏÿÏ„¼1\xò@:{òH=þµ"¨&´I–ð‚þ(AÑ²I p˜ð„þ°Lÿ%õ5¥") 'ðdè"!’‘˜"
+!+ðuÿ(Ð þ½˜(Ñþç45"!80ðLÿÐþç	 (, 4†`!Ä`à*Ðþç L0I	`d	)óÓ@<¦c.` þ½þµ
Ÿ
+š	™(Ñþçh,Ñþç’‘2) —ðBþþ½µ'ðnì½µ'ðlì½(µÐ'ðhì½8µjF'ðfì˜ p 8½µ'ðOn:/Ì3†®bì ` ½µ'ð`ì½ÿµ…°"¨oIðùý�45(h(Ñ 	°ð½!ÉC(ðéþ	 .ôh',Ð`lð`gd§d°h(Ñ´`gdà„d°h`d´`(h@(`(ðÖþš™‘©’É ðÕþ(�
+Ñ˜`c˜ c˜àc˜ d˜`à!ÉC(ð²þ l(ÐalAdà`l°``l(Ð¡l�d§dgd(h@(`gdðh`d(ô`ð¡þ˜¦çøµ"=IhFð“ý�45,Ñþçak ð®þ!ÑA(ð�þ l	!	(ÐblBdà`lj�``l(Ð¢l‚d  d`d*hR*``dhÁhadÄ`(ðkþ0ø½|µš(Ñþçh(Ñþç!’‘*!ð©ý|½µðÊý½µðÑý½(µÑþçh(ÑþçðÏý½µðÕý½8µš’"ðòý8½(µÑþçh(Ñþçðþ½µð!þ(Ñ ½µð"þ½D	¸Àäâ;HÁi)üÐ�j"C�bpG9I7H`9I8H`9I `8I ÀC`8I7H`9I7H`pGpµ !/H'ðþé-!+H	'ðúé+J(L !AC•h	@Ma(‘`öÓp½øµ àOhih('ð:ë,Ð90 G )h)ÐŠh*íÐø½pµM(i(ÐIh@`p½'ð&ë'ð(ë'ð(ëéh¡BÙdhh!'ð$ë(ÿ÷Íÿhh(
+Ð'ðëjh'ðëhh€h'ðëè`p½4€(´:ø :¸:¤:'¨:±5¬:°:H!ÉCA`HA`i°"Ca�j"C�bH�h "C�`pGpµ€ 'ð|éI�iI&Jhh•BØàd'ðpémhB1€aAp½HhI`!ÉCA`pGH€iIJh�BØH`pGÀÀ4€0€"f!µÿHh'ð6é(Ð ½µð˜ú(Ððîú(Ð ½ ½µðñû½µ‰hÊÕ"‘C¡`!x"IIð€þ n‹
+Cƒ½µÿ÷äÿ ð�ü½é=ƒÈ7ÕË}vãHµ@hÿ÷åý½àHµ€h"ÿ÷¿þ ½øµÛL j@ bÿ÷�ÿ
!"10'ðfê&(Ð k@ cÒH€i`bÿ÷nÿÇ`k©A
B kak#HC!ÀiA'ðPê c`k@`càj!À©AÓçjçbài!jˆBÙàià j b¢káj ðÈûø½øµºMÿ÷Bÿ¹I8'ð0êÿ÷:ÿèk±A!™AÓìkìcø½²Hˆ(Ð±I 	x)Ð pG  �çøµü÷Žý§K�˜i'$=(Ð% 9�@šiBÑ
+Cša@,Ñ(ñÝ-Ð'ðüéžHÿ÷wÿ9 ÿ÷µÿ˜ü÷mý ø½pµü÷bý‘I"hˆi�Cˆa!(!`Ño ÿ÷Ÿÿ'ðàé ÿ÷Oÿ(ü÷Rýp½µAiHy(Ñ ð£ü(Ñ ÿ÷ÿ(Ñ 'ð>è½8µ"{L! hÿ÷öý~H"h!ÿ÷ðýà˜'ð,èàh"#iFÿ÷×ý(ôÑvH%pvH!'ð&èuH%p` 8½pµ‰(o(
ÐÀy(Ñ(nˆ9€à(Ñ ð‡üp½fi.Ðpy(Ñ1 ðTü(òÐ*!0ÿ÷Ýþ(ëÑ %ð8ü! ü÷Yüp½p#YJXCà:µ„ ˆâˆ‚BÑ ½‚¢’h
+`!@'ð`é¡€ n@ f ½pµAy)
+ÑðØü(Ñ08!ðAø(Ðp!CHaCà8åˆ!h'ð@é ˆˆBÑ p½¨ †`á€ n@ f p½ÿµ�°$)�šUÐ(Ð(ûÑ+`3“s�@6p -KpCà;�Àÿ#[³@
+�!H“@i@	“#³@žF@œF›?C“›˜C�
+˜l0)�~Ñ	˜K(–OÑ`F(vFmÑH™à8@\(7Ñ(x"A
˜Ið½ükF™ˆ		C‘y	q™˜ð[þ˜{˜àWàˆÀÈÀ@¢€ÿÿLõ�Ãÿ\Ä`XPÄ'ð¾èÿHAiCFa/à˜üICNa™
˜ÿ÷Sÿ(	Ñ
+™˜HpRàaF)pFÐ™Và8!ü÷�ûJà™p&q¸�[Ä;!¤ÂCXa˜ïOFCà˜©x�p¹]8I¹Uÿ÷çþ˜©ÿ÷ÿ(ðÐ,\Ð˜p#XCãJ\ààITRà)PÑ	˜ÝI(#Ñ`F(uF@ÐÛH™@\(Ñ™˜'ðnèÕIHi¨CHa2à˜ÒI¨CHa
˜1ÿ÷ÿþ(µÑ
+˜™Ap˜ü÷ü$(àcF+pFÑ1
˜ÿ÷íþ(óÑ¢çšp'‚CwCJa	à˜©x�pÁI8Ê]RÊUÿ÷�þ0©ÿ÷¼þ(ïÐ,Ðp pC¸I
+\R
+T °ð½µHp!µ&ðšî±I Ha½ðµ%Å°,••ÿ÷ïÿ¬Hè0D�"ÒC©O’ªI¸h"<«ÿ÷=ü<˜(òÐ@Õ ð„ÿ¤HAhBCA`<˜À
+Õðšÿ H"h!ÿ÷!ü( 
+ðØý<˜Õðêý<˜ÀÕðÛý<˜�Õ–J!p€Õà˜ðàú(Ð˜ðOú8i"#©ÿ÷îû(ïÑ<˜@Õý÷>û<˜€'Õà
™"
+�Li°0ŠÁxû#@ÁpA~~	C		v	
+Av~			vf `2s
˜ÿ÷Âýøh"#
©ÿ÷¾û(ØÑ<˜	!BtÐ �ð?ù(‰Ð¸i(Ðyçÿ÷Xý(úÑ ð«øÐpy(Ð0©!ðçþ(Ñ0ðú! 0Ár!ðoÿ™0!ð¶ÿZçxi€€uÐ&ÿ TJ@°@QiBiÐp'wCQKÛ]+cÑ�C °@BQa>ÐQIQHð‹þJI PJyC‘!ACS\+%ÐC›‰‰x[x™BÑ#XC€B�ð9ÿB˜"AxðûkF‹		C‘~	vC˜™@xð£üàNã@(ÑÓpC˜	@x&ðïà4I2HðLþp)H	8@x&ðïà/I+Hð?þ?˜8ÿ÷Yý"IÈ]@ÈU0?©ÿ÷�ý(íÐv.ŠÛ-tÐ �(‰"FH1à0&ð”ípy1yOC€à7�8x(
Ñyxð~øy(fÑ˜ðÒþ(aÐ_à(7Ñ™	xÉLÐyxðjøðXù� ðøàÈÀxÿ@¥€üÈ�Ã»»»»h""""3333,8Ð˜(:Ð˜	!‰Ž*ì¡À?r~Û®@@i(3Ñ$,à@0~(ùÑ,à(#Ñyxð4ø Ð !ðåþ( Ð˜xÀÐ ðù� ðÐÿÖçªâ˜ðxþðù� ðÄÿ,ÕÑà,Ñ!(ü÷Iù–âÿI lapðóüxˆ}!‰ˆBÓþç¨t!�&ðÐìx{ÀÐð¯ûðþ(ÐóHx(
ÑðÞþ"!’‘y{	Ë! ð�üðîý(ÊÐ	ð|ýÇç y(Ð`y(Ñ™ ðõùà$ð¬ÿ�˜&–0.�™/‘š4¨’�¹ˆ‹ÚI ð¦ûøˆæ(Ñ à ÕI0«Jˆš€Šˆ00� Øq{(ÓÎH!s`y(Ð(	Ñ$ð|ÿ(ÐÈN0{%ðOø0sà y(Ñ$ðoÿ(Ñ`y(	Ñ™ ð¬ù(Ð½H{0«Øq& 60}'þ(
+Ð" «ˆÒ@‘C€
C'€à ÿ0™0&ðÎí «ˆ"@Ò€
‘CC€˜€yÀ+Ð˜!	C�˜€yÀ"Ð˜	C !ˆC�`y(Ñ˜ 0@x(Ð&ð¬íà ð¤øà/Ñ ð‹ø@ «ˆ€
"Ò‘CC€ «ˆ�I)Ø’I	‰Õ!ÉˆC(0€�I  1	~É
+Ôay)Ñ™	"’‰		Ô 	� y(Ñ°}Ô «ˆ€@&ðpí &ðlí‡BØ°}€Â!à°}	™€Â.˜&ðbí™tOuK8{‰
+ª&ð^í(Ð «ˆ€@ð§ø(ÐnIÈCðrü&àkHlIÀCðkü&/˜!€h	C/™ˆ`àdHfIÀCð]ü˜&(Ð0«Ùy" ðìø0«™‰		C™� (�(>�˜š©=�‘–’øˆ™’‘)ª/¨«ðóø«?�A�X�X�˜(Ð„æA˜(ûÐ˜(Ð	˜(Ð «ˆ�I)
+Ù!ÉˆC0€˜€!ˆC !ˆC�D˜&ðšëB	 «ˆ!€@@�CRD™C&ð¤ë˜(Ð-�A˜)� («‘t@˜«˜q)˜0«‹™‰			C)™ƒ)˜€x	(ÑD˜&ðlëùˆ"æ)Ð"cel$¼Cp‡¸’0«Ûy=™.˜&ð¶ì`y(Ð(	Ñ¹{:{K=™ $ðòþ(˜Ðà!y)Ð(Ñ˜(Ð.Ð=™«Jzl1&ðšìà8{&ðšì&ðœì(«t˜(Ñ y(Ð`y(Ñà`ÌÂX  hDDDDUUUUffffð}ü(	ÐÝH«.�Ð˜!&ðxì�.™=˜ðÏý.ÑÖI×Hðzû«ÖIz&ðlì˜qC�
+ «v	àÎIÎHÉCðhû.š=™ ðEüx{Õð�ù˜!ÉC�™˜«C�˜Œ˜‚ØŒØ‚.š=™ ðwý˜«	�˜ˆ‡>˜=™t"'�&ð0ë·O¹I8ð9û™8ð5û(«|8ð0û=™>š‘(«’|«z1 ÿ÷µú(Ð(ÿ÷=ú%ðòÿ(Ðÿ÷ù(
+Ñ ÿ÷Cùð¥û(Ð ÿ÷<ùà<˜!BÐðÞÿà�H&ðHë(ÑœH&ðBë(Ð!sÐÈä˜I p(ä>µ •Ip–L”Hà`80 aðwû( Ñ�H 8 ` 0þ÷ÈÿðQþŽMŽHÁ")%ðüî‰HŒI´8``"‹ kFÃ*‡I #þ÷¿þ(Ð >½ >½@µ$,Òp `C‚I@p!&ðòéyJ Qi @C!¡@Cÿ @ @�CQa½øµD,$Òû÷ÑþoMÿ @ii @B
+Ðà˜8ÿ÷±ù iFÿ÷Ýù(õÐÿ!1hi¡@ˆChap `ChI@p!&ð¾é0û÷³þø½øµD,%Òû÷§þZMÿ @ii @BÐà˜!8û÷þ iFÿ÷²ù(ôÐÿ!1hi¡@ˆChap `CRI@p!&ð”é0û÷ˆþø½øµ$%LNÿ'p `CDI5T8Ii @BÐ ÿ÷oød,ðÛø½øµ
&(Ð,4Ñ9J`!Wi�@9B-Ðp!AC:JS\+Ð[STÿ#[ƒ@;BÐP\(Ñ ÿ÷Iø-Ð(i(Ð0I#J ƒ_#CC›Ûx£BÑ(hn‹	@&8€à@(ìÛ0ø½øµû÷)þ#IHðóùÿ÷‘ø�(ð{ü$ )ðaÿd,÷ÛhFÿ÷¬ø0û÷þA#‘¸G#]ÐÔø½Hˆ(ÐHx)Ñ!ppGÿwwww»»»»h™™™™”€`ÐîÈÀl°HÅ<MAC TxxÁÿÿLõ�Ãÿµƒ°‘˜"‘iFÁ"ùy»y	Cé)Ð"y{ÉÉ&ðŒêøy¹yCê(Ñy{"Cys·!‰b#y!ÿO˜1+Ñ™0&ðvê&à 'àcy+Ñ›
+™›0&ðhê @C°yÀÑ! ðPÿ(Ñ@Càæ(Ñà›0&ðRêÿ @C8hy(ÔÑC˜"€00iF&ð¶è°ð½àI H`pGÞI ˆ`pGøµÛM¨h(EÑÿ!ÙH"-1&ð˜è=Ð !¨`!sfaa{CÓHas a°  �ÿ …0‚[ÌH’h2y· €1˜2 &ðê % �t!(&ðFè0/fð¿ü¨pÄH¨`ÄH~€Ô¨x(ÐÁH¨` `5(s ð¹û(Ñ &ð$è ø½ ø½ÿµ…°˜(Ð±H@h(~Ñÿ$-4à þ÷óü!8ðûöÐ(‰F$ðû(Ð à �· :€˜29’‘š!0&ðÂéðx!Cï!@™,ÉÉCðpÿ À0q
+pq 0ppp (� 4(st! %ðÞï `0™�As&f˜(
+Ð ÀŠI ` H`i{C�His¨a  €˜(Ñ˜$ð§ûA xIÀÀCA pI8$ð¦ü n‹
+Cƒ n~			v xŸ!@ pš!8#$ðŒûtNàPà˜(Ñ™ s8ðüà!8ð‹ü( pÙ0~ÀÕiH`0€z@Õxy(Ñ €8€j	!‰@	Õ!8ð«û p h!	C `0~€Ô x(Ð h!‰C `8!ðKù(Ð8ðkû™ 0As(ðÝú(Ñ($ð’û(%ðDï	°ð½ÿµ…°ÿ$-4à þ÷ü!(ð.úöÐ(ÿ0)y0)�Ðhy(Ñ™(ðüà$ð6úkF~ó"@1(vÐÀ0à¬:»´K×2¥`@0kFv0‰*„· €˜2)’‘~›8	9�‰ &ðÎèÿ À q"J
+`qPˆkF@P€`~"~CC v
+`v§pX~àphy(
Ñ!(ð™ýáxŠÒCÀß"€@Cáp 0�70ôg™|0As™s˜(ÑkF˜‹8€!(ðÅû¸p0ðNú(Ð0àìÈ´ À ûHÀ @óH%ð¦î`çµ"’–H"#‘¡þ÷6ü(	Ñ"’˜H"#‘¡þ÷,ü(Ð ½ŒHµh!#þ÷3ü(Ñ þ÷{ý ½ ½ŒI	hq‹IHapG‰HhypGµ	ðý(Ñ ½ ½„Hpµ$k@Õðœý�M!.
+àÊSh’h“BÐ$I,Ñ�BòÙàyH�jÀj�BÐ$ p½µÿ÷Ûÿ(ÐsH 0Š€Š�BÑ&ðè½ ½nHpµx(KÑmH"h!%ð"î(CÑÿ÷áÿ(?ÐhH%ðüïfH!%ðüïcH!%ðöï(„B/ÑaH%ðìï_H!%ðìï\H!%ðæï(„BÑZH%ðÜïXH!%ðÜïUH!%ðÖï(„BÑSH%ðÌïQH!%ðÌïNH!%ðÆï(„BÐ p½ p½pµ ðôø(^ÑGL@MANà x@ p þ÷Íü þ÷´ú(x(óÑ0h"!%ð¼í(ìÑà þ÷¦úÿ÷xÿ(øÐ3H%ð”ï1H!%ð’ï/H!%ðŽï(„BèÑ,H%ð„ï*H!%ð‚ï(H!%ð~ï(„BØÑ%H%ðtï#H!%ðrï!H!%ðnï(„BÈÑH%ðdïH!%ðbïH!%ð^ï(„B¸Ñp½TxMgmt80211MsgQÔÀUapGrpRekeyTimeOutMsgQØÀìÈ@¦€@£€4©€ €`ˆÀd ”0´ Àÿ0™0"µ%ð&ï½þI `ýI
+ `þIüH`þIýH`ÿIýH`ÿIþH`pGµ#XCüI@!
+À %ð
+ï %ð
+ï %ðï½÷µ„°óJ ÐO–°O„èv’�˜)ª«%ðïkF{(Ð(LÑ.60%ðºî%ð¼îay)Ð)ÑkFz)0ð!ÿû÷ðùþ÷\üÞIkF�ßJ{89%ðÞîkF{z%ðÞîkF{ÿ÷ûkF{2)#ð+ùkFz(%ðÒîkF{)ðPû¨þ÷bü8û÷ÊùkFzš ðˆûkFzÿ÷Žÿ °ð½ ûçðµ…°ÂJ ’�!8ª«%ðœî¿M¾I(
+ðqýkF{(Ð(:Ñ»I(
+ðgý %ðNî%ðPîû÷�ùþ÷üû®IkF�¯J{89%ð~îkF{z%ð~îkF{ÿ÷Ïú0ðÖÿkFz%ðzîkF{!ð¹ú¨þ÷ü û÷oùkFz:0ð-û °ð½ ûçøµ
$û÷Yù•J)	(20%ð®ì
+(
Ò�J!(2T€Á`)0ðçøð¹þ$8û÷Cù ø½ðµx…°@Ñ%ð<î(Ð�H%ð:î@Ð8)	� ‘%ð0î(Ñ ·ç· €90ðû"™20ðÃúpy(Ð(Ñ %ð`ìš™ð0þ˜%ðî(%ðîeJ ©8:PPÈ:’›š!0%ðî`J! HC\+
Ð€Àx¨B	Ñˆ[I"	Cšp"
+RàI)éÓ˜ÿ÷áù %ð*ì%ð†í%ðˆíû÷Çøþ÷3û� %ðì™3(ðø %ðì3ÿ3˜3)ðaú¨þ÷Dû8û÷¬ø Açþµ$ `C9I
+\*3ÐE(ð-ý-Ðix"0ðúøkF™ˆ		C‘y	q¨x™ð˜ú+H¡‡kF�˜ˆjx	)0ðsù(Ð 8p˜€à 8p˜€d$$,ÀÓþ½pµ%ðLí"jCK™XA™P h!`p½pµ%ð8í"jCIR‘hA‘` h!`p½ð:ô:Å>ø:Ëœü:IO;}F;hhÁffÿÿ»»»»wwÿÿpµ%ðí"jCIRQhAQ` h!`îö<ý¬S;-S¿Íçhµ
+hþK*Ñh@`½Šj‚BÐXh@X`½øH$j*ÐŠBÐšhRš`"
+qÂj*ÐQcà�bÁbLc½"b
+qj"„bìH@!hþ÷¦ø½µ
+h*ÐæJSkƒBÑj(	ÐˆBÑ PcáH"h€!þ÷�ø½ðµ…°ðàû ð
ü~Ð(k c×H�AjIAb!`ðÙû%ðÖì‘� h'.9 6(Ñš Pb `##q0z`q yqz€‰€‰Có! q@±z‰	CÏ! q@ñz‰‰C qii(iY@C
Ð*i˜ki™‹A
+Óš(i›ii€™Aà¨i(Ðš›!¸YAá` `èi a(j`ahj a(hàahh b¨h`b  0A{2{I’IÒCý"As@2{RÒRCAs!�s1{	Õ!�s2{!ÒÑ!s‚{#à
+à’™H(3:!%ð^ì(Ñ `àðVû °ð½ hûçøµ%ðtûŒHj¡BÑ j(Ð%ð(ë  b.faÐ"#’…H(32!%ð6ì%(Ñ%(ø½øµ&ðQû{L!j�BÑ`k(Ð%ðë `c/ÐtK"’uH43:)%ðì&(Ñ&0ø½pµ%ð0ûjL!j�BÑ`k(Ð%ðæê `c%(p½8µ þ÷ÒøaL, #jÁ\ZjhÛi˜G
+ð¿úðâúú÷Åþ!j `ðâúðæú b(ú÷¾þð]ÿ!j)Ð. B\’TJQH(3%ðÐë 8½øµ%ðïú<Ð j&(Ð%ð¦ê¦bEM(j B/Ñð°ú y(Ð(%Ñ&qð°ú(j 0/sÐ(j/kÑ"!ð€ý& 	ðüøà(j"k!ðvý% ôç%ðœë(j"k!ðlý$ êçð‹úà&`%(ø½pµ%ú÷^þ&Hj BÐ!y h%)Ñ!!qãibj!˜G
à j%ðTê(Ñãibj h!˜G!¡b!`!q0ú÷Aþ(p½pµ$ðPú(ð}ú(Ðÿ÷ËÿðNú p½øµð?ú	O$8 `CÀ�i)Ð-ÐE!	\‰$�n¨Wh÷€ÓÔ.ÐE!	\à`ï òüÈµST †ÉÐ0ÿ÷�ÿd,ÚÓðúø½! Íçµ%ð"ë(Ñ ½ ½8µ%ðëúL" j!kðäü j"k!ðÞü jAy)Ð�y‘Ay˜"ÿ÷Üÿ!j q j€i(Ð%ðìê%jªhëh€™A©i`!jËiJjh!˜G!jHi(	ÐŠj*Ñ’ßH(3%ðÔê 8½pµ%ðÞêÙM, +jÁ\ZjhÛi˜G(Ñ(j.kÐ"!ð–ü" à"!ð�ü# 	ðøà$ p½øµ 
 `ú÷€ýÅI
+j*Ðy+Ñj*	Ð"`
+jh*`
+jRj2`	j	k9`ú÷oýø½ðµ…°%ª©¨ÿ÷Õÿœ,Ðš’2!˜— G(æðµ‡°%ª©¨«ÿ÷¼ÿœ,
+Ðš’3"—˜ G(Ð%(°ð½pµ†°%ª©¨«ÿ÷¡ÿœ,	Ðš!’
+‘1˜# G(°p½’H 0~Iv�I	j)ÐB~RBvËiJjh	!GpGµˆL j(Ð 0{(Ñ
+ðóø j! 0sƒH"h@!ý÷¸ý½pµ }L#j+JÐ,!É\h%)Ñ
+ðíù(6Ð 
à j 0s9à
+ðÐø-à)	Ñ
+ðÞù('Ð ÿ÷#ÿ(ñÑìç)	Ñ ð‹ý j! 0sÿ÷Ôþà)Ñ à)Ñ! ÿ÷Žþ ÿ÷Ýýà)Ñ øçZjÛi˜Gà ý÷‘ü[H"h@!ý÷gý p½UI 	j)Ð
+y*ÑËiJjh!GpG!PHÉµ$ðšïNHJI 8cIH"!00ý÷Sý! %ð¸é! %ð¸é! %ð¸é! %ð¸é½(Ò(Ñ pG>JÀ€ÉÀ pGóµ‡°%˜BxxC(6ÑŸ‰¿0àøx¹x<C°B*Ü`x!xCÿ8d8Ñ $ðžï@� 0$ð˜ï}#ÛXC� 0$ð�ï}#ÛXC�˜©ÿ÷»ÿàx¡xC1?Ç)ÌÒÿ d0kF˜� Ø�Ÿ¿$H�Ò
Ÿ¤[œ˜õgá`}!�0hÉ%ð¢è}!�phÉ%ðœè�"8©$ðFï75d,äÛ(	°ð½Hj(Ð pG òµSüÈ`ïÁ$Hj(ïÐ íç!H!µkÉCý÷ºü½Hµký÷»ü½0µ M
!‰iàèh@è`RkŠb*ÑËby*Ñ*iR*aƒb`q ,ÑŠj*çÑ0½0µ	M 8"JCR“i£BÑ0I(Ñ)òÓ0½ ò`ïPHµh"e!$ð�î(Ð ½@!�pGøµ$%(”%Ñ0iFðªý
ÐkF%aˆd*Óáˆ ðÎûà ððû`�kFˆ(Ð@  �ˆ €à,Ð1 ¥€ú÷<ÿ$ ø½pµ
&+Ð0L+Ð+Ñ/H)àðý(Ð ð‚ûð®ý)H)8%ðŽè h"!ý÷üà#H)0%ð„èhi!	ðÿ0p½µ$ )Ðe)ÑH8%ðxè(ÑH%ðrè(Ð$ ½HB`úçpµ$MH!8l`$ð"îH!$ðîH!0$ðî	H)h(0aDa„aÄa�`IbIAb%ðNèp½ŒÀÐÀ”<Á]o]pµ%ð>è¨C %ð>èp½pµ$%(ÿ0Ÿ0!%ð6èèþ0@!%ð.è " !ÿ÷Üÿÿ5¿5(€!%ð&èd,ßÛp½pµ%ðè(C %ðèp½óµ�°ü÷]ý$%(ÿ0¿0€!%ðè(ÿ0Ÿ0$ðòïú!@/Ð!C™)Ð!C!C0$ðæïÿ5­(@!$ðèï " !ÿ÷Àÿd,ÎÛü÷Uýþ½(ÑûH@\ûI@àHúIZpGpµøJ(Ñ`�pÔp÷JÑß%+@à(Ñ %+Cw"ðxûñH",Ð,Ñ�kCà�k‘C�c p½èHÀhpGæH€xpGåHÀxpGæH}!µhI$ðbê‰€
+CâIà@
+h*Û(ùÜ(ÑÙIHh@H`½µü÷Õü $ðzïÔL p $ðtï`pÖH$ð€ïVÀ� _ÏB&ÿ÷6ÿü÷ñü½µðuùÿ÷çÿ ðû ½ÈH@xpGÆHxpGpGÿ0pµ¼0
$ü÷ªü) $ðRïü÷Ðüp½ÿ0¼0µ$ü÷›ü $ð@ïü÷Áü ½µ$d ü÷:üµH}!hI$ðê‰€
+C±Ià@
+h*Û(ùÜ©I(Ñˆh"$€àˆh@ˆ` ½øµŸI¨N\žI@ZŸH¤I¦M 0ŒBÙ£I0–9ŒBÙ0´BÙŸI0¯1ŒB	Ù�I0È9ŒBÙ ¬BØ‘H¬0$ðï�H–O@x‘? (Óÿ ¡0¼BØ!à´BØ!à�IÈ9ŒBØ!à¬BØ!$ðÚîü÷ý(Ðü÷ý(
+Ñ¼BØÂ!à¬BØ	à4 $ðÈîø½ü÷üü(úÑ¼BØÄ!óç¬BôØÆ!ïçøµ$ðÆî(Ð,Ò!aCÿ&
$´6ÿ'Å7`0$ð¦î)]8$ð¢îd$$,ñÓø½÷µÐ"à"$'&)Ð<)Ð)Ð4)Ð$)Ð$WI�1XaÑ$àSJÈ2‰¢ŒX$ð€î $ð~îKH™@\JI@	Z-Ñ àPJ8–:‘B	ÙMJ0‘BÙLJ È:‘BÙ ÿ÷œÿü÷Œü(Ðü÷ˆü(Ñ0!3 $ðJîÂ!àü÷~ü(Ñ0!3 $ð@îÄ!4 $ð<î3L`x(Òÿ  !§0$ð<î`x (Óÿ @!µ0$ð,îÿ !¡0$ð&îÿ "!£0$ð"î! $ð&îÿ !@$ðî! $ðî-Ñ˜ÿ÷õþþ½pGpGpµ
ü÷?ü"I@Z) ÿ÷-þ"$ðîp½I `pGøµ$ðî(KÐM$5!aC
+)]Nó›[[×\É"Ð9	CÖTà>ÑÌò°òDÁ  ¡€ À+€ÄÅˆÈô½$;9	C6[6	àVTI		)ùÓQyd		$$,Qq¶Óø½ÿHµh"’C`ýIh"C`ûH$ð®íûH!Ap!p ½ µ$ð¦íõIÉHp½ µ$ðžíñIÉˆp½ pG@B)Ñ!ìJ‰vÝ5
œcçÓ£¶%2‰ëJh*ÑŠVà"ŠV"ŠV‚BÛ"ŠV‚BÝpGáIßJ	h@B’)ÑQVà!QV!QV�BÛ!QV�BÝpGÔIx‰
+pyJp‚x#1
+p‚yJpBx
+qByJqÂx
+rÀyHrpGÊI ÀC‰pHp#1pHpqHqrHrpG(Ý àd!ÉCˆBÚ@BpG(Ý àe!ÉCˆBÚ@BpGf(Ýf à(Ú pG pG|µkF$®NpöXp˜©$ðí(Ð¥kFYyp[$ðí¨kFy@ˆ$ð
+íd,êÛ|½|µkF$ Np6Xp˜©$ðí(Ð¥kFYyp[$ðôì¨kFy@ˆ$ðîìd,êÛ|½|µkF$‘Np6Xp˜©$ðæì(Ð¥kFYyp[$ðÖì¨kFy@ˆ$ðÐìd,êÛ|½µkFpXp˜©$ðÐì(Ð¨ÿ÷Tÿ½ÿ÷eÿ½(µÑ*Ñ	)ØH½ ½*Ñ)ÓÈ½ ½H½*Ð*@Ñp)8ÐÜˆ€8Ñ‹	;$ð@ë''))55++55555555//15ˆ)
ÐÜ|)"ÐÜt)Ðx)Ñv ½€)Ð„)Ñ† ½•)
Ð™)Ð�)Ð¡)ÑŸ ½& ½. ½> ½— ½f ½n ½~ ½6 ½½þµ
NO¸jNI@¸bxjMICxbðlý�€! $ð\ì ü÷%ù€! $ðXì ü÷ù) ð•ü<H$ð.ì*1 ’ð�ù,Ñ.Ð.Ð-Ñ9Hà$ð@ì(Ñ7Hà7H$ðìðúù˜ð@ý) ð‰ø(Ð1H€!$ð"ì2!(ÿ÷#ÿ2!(ÿ÷ÿ2!(ÿ÷ßþ2!(ÿ÷1ÿxj IÉC@xbü÷'ù*1 ÿ÷2ýðuÿ™2 ÿ÷/ÿ ÿ÷´ý û÷kÿ ðÄù û÷dÿ ÿ÷¥ý! $ð´ëðãù û÷Wÿ(Ð! à€!€-€ŽÎ/ÂX¨€üýÿÿÀ€âÒ>ÒBÒ/$ðŽëà! $ðŽë1 ÿ÷uý1 ÿ÷?üðÃù û÷%ÿõeÞ×˜g´	pÚ�N(Ð�Hh(Û $ðjë€	(Ñði@ða
+à(Ñ0j@0bà(Ñpj@pb°i@°a! $ð^ëü÷ÔøO 9i@,Ñ�C9a8i!IC8ayHà�C9a8i!IC8avH8a0x BÐ 4pû÷€ÿ ðŠý ð‹ý(Ñ) ðµý8i!C8a þ½dIÿ ppGøµ€aK"[˜V(ÜBB&(Ò )Ð@)Ð€)Ð$à$à $à0$)	Í $ð ë)
+Î $ðëÒ $ðëA	I1C/Ñ@ Cà¿ @Ò $ðë!€ CÌ $ðëø½óµÒ �°$ðøê@!BÐDH	&�àBH	0&�˜1$ð°è%,••(àÌ $ðàê	@@ C	Ì $ðÞêÑ $ðÔê§©ÈQÐ $ðÌê©ÉYC©ÈQÏ $ðÄê©ÉYC©ÈQ™@d�´BÔÛ˜(Ð$¯à 8X™$ðÈé™UA
™-	WAC˜d�´BèÛ	àšÿ!p
T™V�˜šxÿ @	pš!QVAC˜™)Ð™€0°ð½I `I`pG,Â+€À¢€¨h:¾t;p;pµÿMiiÿHAeÿI	h�eþH$„aû÷íü û÷Ðü û÷Íü,`p½µõLak k$ðlê}"Ò$ðhêãj¢j$ðLé½øµ}"ìLÒak k$ðZêáj j:$ðTê3*$ð8éø½µãLak k$ðHê}"Ò$ðDêãj¢j$ð(é½µðDÿ!#ðÄìÛJ#$ðé½pµÔM hr×Hh‚C`ü÷øÔI@Zd#XC¨a`Cû÷Rüp½ÐHµû÷Ùþû÷2üû÷5ü ½pµû÷Müû÷YüÂL%&cec¡iåbACÂH¡bh‚‘C` y(Ñ ÿ÷ªÿû÷9üerp½pµ¶L iÿ÷|ÿa‰$ðäèàa¸H¡i$ðÞè¨BØàiàáa}!É$ðÔè bp½
+ µÿ÷£ÿÿ÷·ÿÐÿ÷¾ÿÿ÷Ùÿ£Hj
+)Ùÿ÷”ÿÿ÷¨ÿÿ÷±ÿÿ÷Ìÿ ½pµšM ^¶ë
”k@fnhr�Hh‚C`û÷ªÿšI@Zd!AC,©aÐ`CàèiHC}!É$ðšèû÷Ôûp½‹I
+j‚BØJz*ÑIy)ÑÔçpGóµƒ°'„I
kk*k9$ðŒé�éj¨jš$ð‚é"$ð|é;"$ð`è‘ª±C�¨;"$ðVèš#‹AÓhFÈ€¡AÓ"1($ð`éš€aAjLJÀCck"kÉ$ð<èáb b˜gc c°ð½pµbL`y(Ñû÷oûû÷‚ûû÷Žû`Jh“˜C` iHC)ÿ÷£ÿ y(Ñ ÿ÷áþû÷pû `rp½pµÿ$PMZ4+hÃÿ;Ã;+ÜTIˆj@ˆbà�BØ‚BÒ p½ÿ÷®þ ÿ÷Ïþ(hÿ÷¦þ‚#!0û÷Ûû p½=Hµy)Ñhÿ÷–þû÷ëú½8µhFü÷Nû=H™h�BÐü÷,û:H™h�BÐü÷%û8H8M€ÿ(Ñð×ü(Ð,Ð2J(h2
!ü÷&û™(h�BÐü÷û.H™h�BÐü÷û8½&H8µhü÷û%Hhü÷û%M(hü÷ÿú$Hhü÷ûú L¡ÿ)Ð(hjFü÷ÿúÿ  w8½Hµ 8ÀÐû÷³ýÿ÷Àøû÷Ûý½øµ%Nu`ÿ÷ÑÿH€0k"CcH 8Àà¥€àò€"€@¦€@B!€ô½PÃ-1dÂÌÀXÄ@!øÈÀÃþOÿLÐù÷Ìú� i!ˆC a iñhC a¥aû÷Ëúû÷jû÷HÇ`õHÀ0h"C`ôHhC`˜ù÷´úà¥aû÷¶úû÷UûìHÇ`#ð2ïìHíI@mHa i!ˆC a!
ðjù(Ñ àðxûðTû$ð0èø½ÞHµi"‘CaißJ’hCa!�aû÷-ýÿ÷:øû÷UýÔJÀ2h!C`ÓJhC`½ÿµƒ°&ÓMðúû(Ð 
ðšú(Ð@zÀÀÿ÷ÿù÷[ú"�ÊH’h"!«ü÷û˜ü'(ÑÅH"hJ!#ð@í#(Ð˜(
+ÐºIÀJnIn#@9@Y@X@CÐµHºKnAn@9@fAf àÿ÷Ãþ,(Ð#ðHï˜"hch`¾ß)�o¼Ö!‹A3:‹A	Ò hahÀ±Aš™ÿ÷�þ(Ñ¤H�iI�aÿ÷
+ÿßàžHbh!h€0Â`�`ðWù™Jh!ˆC`”JÀ2hˆC`’O8i–I"@È`8i�C8a8i"C8aBà�IHj@Hbh8Ñj
@bðvû(¸iÐ¸i8i!ˆC8a‚Ih"C`9i‚HÀhC9a#ðhïœà€€(Ñ(i@(aÿ÷/ÿðóývJh!ˆC`rJÀ2hˆC`8i!ˆC8a8i!C8aqM û÷ÿû¸i€€(·Ñ,
Ððòø™ˆBØ˜†BÒfIÈi@ÈabàcHAiaJQe!AafHû÷¬ø#ðîZH€0k"‘Cc8i!C8aYO8x(Ñ%à@%,ÐðÆø.Ð ð-ú Cà ð'úû÷tþèÀÐû÷`ùB @Ðh
+Õ û÷@ù û÷Iù û÷úû÷ú¨Õ%-(û÷1ù(û÷@ù û÷óùû÷ú x`,ÐðŽø™ˆBØ™ˆBÒøi!	@øaÿ÷+þÿ÷þ˜ù÷+ù °ð½0 ð”û˜ù÷"ù"ÒC+H’h"!«ü÷Üù ëçµð©ú(Ð"H@h(Ðÿ÷þ½øµJHh&±C`JÀ2h±C`L!iM'9@©`!i¹C!a!i"C!a@4Ñÿ÷Zþðý i8@¨` i¸C a	Ih°C`IÀ1h°C` i€€àïÿÿÿ@¦€€"€£€àò¥€dÂˆHÍˆÀ(Ñhi@haH¡i‰‰)¿Ñø½ pG
+H@zpGµû÷Gùû÷ù ÕIÈj@Èb ½ÿ÷Àû½ˆàòdÂ$#XCÿI@Ái	É
�a@iÉ@@hpG$#ðµXCøI'@ÁiBi	É
ËÒ#?þhi<@m�B
+ÑÁh	1C`Âi!	‘CÁa!	àÅi5ííÅa…h-5CI`,ÑBiÌ�ai[œBÚÒÀið½$!ACÞJµŒ#ðîíâiÒÉ ÒÉŠBÑ ½µà ü÷"ø ÿ÷æÿ(÷Ñà ü÷ø ÿ÷Ýÿ(÷Ñà ü÷ø ÿ÷ŽÙ¢‹Œs¬yó±Ôÿ(÷ÑÉLà
+ð7ÿ(Ð h"b!#ðë û÷ýÿ ÿ÷Áÿ(îÑ½ÀH€!µ#ðë½	0µÌ
$!QC¸JÀ
�¸J!	àT+i[ƒBÑ à@ BóÑ0½÷µ‚°$#˜¬IXCFø÷åÿ�¬Hiš(Ä
™8ÿ÷Óÿ'¦Kÿàpiá@Bh!`U1iI¡B	Ññh	9C`(%-…C$	à±h5	9Cídí$$`](ÝÑ(™#ðZí˜ø÷²ÿ°ð½$#XC‹I0µ@ÁiiÜ
#m¥BÐ
+ä	ÉÉÁaÑÁià1ÉÉÁa
+)$
$¢BÙ‹CÃaÀi0½$#XCxIðµ@ÁiDi	É
Êi£"uh'?;@�BÑÁi?�C!ÇaàÇi7ÿÿIÇa+ÑËãR–B�aåÒÀið½dJgI l2@1µ	kÒi	
$
£BÑ#@@ŠBÑ ½ðµ$#ŽF!XCŒFVI@Ái	Ê
‚aAiÓË!	$àh¥Õä.Ñid”BÑÂh$ä"C`Ãi
+šCÂa"à„h%$í,C`Ãi3ÛÛRÃaCiÔ‚aÄij&/6
?
¾BÒÑ@
@¬BÎÐaF)ÑÀiqF€Xhð½ ð½pµ*Ð% 5(}!}ÀË	‚Ià~I*	Ð*
+Ð*Ð*	Ñ#ðŒìà#ðŽìà#ðŽìàÿ àv(}À�  Vþ÷¬þàr  Vþ÷Äþàqp½pµ
@"(#ðê(ÿ÷Æÿ(@0#ðê!@1 "#ðôé2ˆ(! 0`:d1#ðìép½ðµ$ ÿ÷þAˆK™BÑ@1(`1`	ˆ@9		Ð#›	àìˆÀœ	€£€ï¾™BØd0 9`$9€ ð½8µø÷zþÄH€iÄIHa iFÿ÷,ÿ(
+ÐAˆÀJ‘BÑÀIA€!ÿ÷�ÿ$à$(ø÷dþ 8½8µµHiµI@9c iFÿ÷
ÿ(Ð!ÿ÷„ÿ 8½8µ¬Hj¬Iˆc iFÿ÷ûþ(Ð!ÿ÷rÿ 8½¥I£HT9
+ðµl2@8k0Ä`žHj'�H‹Hº/ˆwÿ£ Ý?
ƒcÎi 1	
¹BÑ%'?>@<@¦BÐ!Òi)C-
6
µBÑ$C:@;@šBÐ  Cð½ŠHµT8Ái	É
�aBiÉRÁij
$
£BÑ#@@�BÑPhIhˆBÐ~Ih@` ðöù ½ ½øµ
sH&@8€krI@9È`ÿ÷Éÿ(Ð iFÿ÷‚þÐ@"!8#ðé8ÿ÷ÅþkFˆá€ 9@0&a@1#ð"é0ˆ(€ ø½ ø½øµ"'\H?@8a^JBa!‡a�b]MÇa"EbbÒcÂbXJYNË\b`ÒI)îP÷ÓTKÉÌb`^PLI"ŠaRJÊa"ÿ#[ŠbMN"b 6
+cÎbKbŠcJKKOJc"Ô¥k`ÿ3[R*7QöÓBLÒ 4k`§P"Bc"H2‚c"J`"#›%Ê`=Ãc�``Jaš
+a"9NH2!Ë\b`$¤I)îPõÓ.KÉ3Ìb`^P&I"À9Êf.J
+gS"Êg%ÿ"RE`JgŠg*IÅ`(N,‚``!0#ð^èàÁN`ÿ6IvdR,9PñÓ!0#ðPèàÁKN`I@;9P`I
H1Áa$„a
+JÁ€:QbNFaab 6Fbb‘b_cS ca#ð¬êHÀ0…`ø½¤€¬ï¾º«À ÀëÀ˜âÀ0€ñÀ€@€óÀàÀ€‰H!µ"ðÜï½pµÑ p½0‰„`z!zC(
Ñ`{!{C(Ñ-Ð(ð¼ø(Ðà-Ðèy s¨yàs`z!zC(	Ñ1 ð‰ù(Ñ0"ð¢ïÑç p½pµ
kH""ðÊï( `Ð!s!h  � h! 0(`r!Ar(h1
+sAs)h ˆrÈr p½µd"iF¨ÿ÷Öÿ(Ð˜!t,AtÐ™#J{CJsŒa!�r!Ár˜½µÿ÷Þÿ(Ð ÿ÷‚ÿ½"ðç|µd"iF¨ÿ÷ªÿ(Ð˜!
+tAt!�r!Ár™(ÿ÷hÿ|½|µÿ"‘2iF¨ÿ÷‘ÿ(ªÆõÓ„{ÌUiÐ˜!tAt")0"ð`ï™ ˆr Èr™ ÿ÷Iÿ|½|µÿ"‘2iF¨ÿ÷qÿ(
Ð˜"10"ðDï˜!
+„rÁr™(ÿ÷-ÿ|½|µd"iF¨ÿ÷Vÿ(Ð˜!
+tAt"10"ð&ï™ ˆr Èr™(ÿ÷ÿ|½pµ‰„""t bt"0"ðïàz¡zC0 r
+àr)0ÿ÷ôþp½xóäpµ‰Dð~ý(Ð`{!{C(Ð ð)þ")ÿHhÿKh# Gp½ýH`ýH!Ap!ppGùI 	`øIHpppGöHAx)Ð!ppGµóH"ðšï(Ðÿ÷Æÿ÷ç½pµø÷|ûìL`x(	ÐèI VAÐ�Ð!"ð–ïæHx(Ñ ðÑý  r û÷`ýáH"h!"ðTîÿ÷Ðÿ(ø÷[ûp½µÿ÷Óÿ×I pHpÙI`½ÓHz)Ð!rpGÏI 		h)ÐÍI	x)Ð pGÿ(Ð@pGÍIµ	h"ðTë}"Ò#ðÄè‰€
+CÐ"ð¤í½¿I 		h)Ð½IIx)Ð pGøµ%*)Ð ‰ÿ÷Éÿ(}Ð³Iz(pÐ(nÐx Õ,ÐP{{
C
+-ÐÜ-Ð-Ð	-Ñà-Ð-Ð-
+ÑàªHªIˆ	xCÐÿ'à ‡CžN60h"ð6î8ÿ÷¡ÿ(SÐ(¡M'(Ð(ˆ(Ð1 V@Ñ0h@yÿ÷’ÿÿ÷oÿ/€:àø÷Àú�ŽH!#ðè˜ø÷½ú1h VˆI"
+rAÐ�Ð!"ðÔî0h@yÿ("Ðÿ÷qÿ(ˆ(Ðÿ÷\ÿ(Ðÿ÷Gÿ/€ààà(ˆàxÕ,
ÐxH!"ðØïàxÕ,Ðÿ÷þþ ÿ÷Éþ ø½oHT!µ"ðŠí½øµ"jOº‚2àhx)xCÿ88!Ñéxªx	CÌ(â‘BÑ	±BÜ!,Ò!Ê[H0"ð˜íààÀ!0
+Àd,öÛéxªxC1	6-E.ÊÜø½óµ$2%‰.‰ŽFáx/Éƒ°Ñ¡à!1£xÅ0ó6€X†”F’*Ñ	)yÐàcF›Ñ@%àˆEM«BÑKˆ«BÑ‹ˆ«BÑ%.à	xÉÐ%&à%.*Ñ™"
+p@iwF¿�ù÷4þ(Ð˜(Ð˜z@Õ2H�"8©"ð¸ù(Ñ˜!p_à!Hh"ð<í(BXÐ x€(VÑH�Š)RÐÁ!É%‘&à°BÐIˆBÑàŠIˆBÐ!1"8"ðŽù(Ñ i@9Ð"8©"ð„ù(Ñ8!01""ð{ù()Ðm-#Úéà#àŒÀ@Á˜ÂŒóxóôÈˆÀôÃ ÀLõŒÃ�ÃÿÿˆŽH Š(´Ñ °ð½ ûçŒóˆI ˆ€	`pGøµø÷wù� "ðÌì�I"ðâì`y!y~OC(¸€Ù˜ø÷jù ø½¤zN%àh hC!x1Tax€Ap€¡ð­øàx¡xC$m¸ˆ¨BêÜ˜ø÷Lù ø½µiH"ðšì @Ð ½÷µ‚°eO$€àø÷4ùh!aCx\š‚CÐ(ø÷/ùrà]JÉÐ2pHxPp‰�ðxø(ø÷!ù0ð{ø(`ÐTM$Ð5hx'	(Ñpi�ðÙÿ(�>Ð˜ðáÿ™·"’Š0"ðºî(Ñ˜ðHø-à˜"1$#ðÐÿ%à(#Ñ1‰piŒð¶ÿ(�Ñ<à˜ð¼ÿ9K0ª"ðœî(Ñ˜ð%øîç!kF›ˆ˜"1ð¬ÿ$,ÑhxÀÐ˜,`Ñà™ `hx€Ô °€ °ð½d"H€ˆ BÝyç õç"Id €!I €pGµJxxC’"ðàë½µ‰$0	Š°9"¨"ðÔëH"ðêë ª"ðPî(Ð"ðPîL©Ð4 "ðNî(Ð ©"ðLîœà$˜"©"ð´ë 
+°½¤ÂàóLˆ;Š;µsÐc! "ðœë  p `pÿ @ p
+àp! !q`qÿ € r
+`r ¡ràrÿ À s
+às !t`tÿ 0 u
+`u
+¡uàu<  vÿ 0 v
+àv
+!w`wÿ" Z¯â°|ƒ?åE2 0p
+Bp
+
+�pÂpÿ"'2‚q
+Âq
+
+rBrÿ"(2s
+Bs
+
+�sÂsÿ")20‚p
+Âp
+
+qBqÿ"*2r
+Br
+
+�rÂrÿ"%2‚s
+Âs0"p"Bpÿ J0P4 p
+àp
+!q2!`q™u½pµ þIÿMpH€ˆ€È€�È`Hpc `C@ÿ÷wÿd,÷Ûp½!I@Š(Ð pGÿµ�°Èx‰xC˜!ÉAÌj,ÑêHÈbÿ÷Wÿ`x!xC-Ñøx¹xà-Ñùxºx	CCà-Ñùxºx	CˆC p
+`p˜?—˜?@0�Îà/sÓ™ÈxŠxCJxxCÿ#%3Ê™BsÐ%ÜÌKÊ™B^ÐÜÿ9IDÐ)LÐ)gÑ-Ð-;Ñq9Õ"`2!1ˆà*[Ð*ïÑ-Ð-ïÑ±ïÕ"[2!$1yà*bÐÜ*TÐ*ÝÑ-Ð-Ñ1}Õ"^2!01gà*[Ð%*sÑ-Ð-pÑ1nÕ!˜"V1"ðíšV!	]‘ucà-Ð-_Ññ]Ð"X2¡Hà-Ð-UÑ±SÕ"Z2!1=àZà-Ð-IÑ1GÕ!˜"1"ðèìš!~Qu=à/à:à-Ð-7Ññ5Õ"Y2!1à-Ð-,Ñq*Õ"\2!*1à-Ð-!ÑñÕ"]2!61	à-Ð-Ñ±Õ"_2!<1˜"ð´ìà-Ð-ÑqÕ!˜B1"ð¬ìà8‡BÓ9?à'™�/Ð-ç°ð½
+!É@µÁj�)ÐX""ðøéV ½ ½pµžœ )ÐQx)Ñ!pp½x)ûÐI		pöÑPx(Ðpà°A ÀÀj(ÐAxx	C¡Cp	
+Ap p½ñµ„°˜ðTÿ˜?ðIÿ&�™°@!É@Äj,{Ð`x!x%C€Õ!{ ¹BÝ !‘#"˜Z32–ÿ÷¦ÿ(Ð%`x!xC€Õ$!	] ¹BÚ  !‘#"˜[3$2–ÿ÷Œÿ(Ð  C`x!xCÀÐ¡yš IB‘B¿Àx‡]å6)Ý !‘#˜X3¢–ÿ÷qÿ(Ð C`x!xCÀÕ¡š IB‘BÚ !‘#"˜Y32–ÿ÷Uÿ(Ð C-
Ð.Ñ™ @Š)C‚!˜ÉðÃùv66.Òtç|Î!çñµa ÀC„°'��˜¹	 À	Ìj,~Ðax"x!C‰@öÐBÐ˜b0Ñ˜ðÆþ�ÿ A0BÐ˜b0Ñ˜ð€þ�%0Õ0!
+]™ ŠBÝ €!‘#"˜^302—ÿ÷ïþ(Ð€%°Õ<!	]š ‘BÚ !I‘#"˜_3<2—ÿ÷×þ(Ð @CpÕ*!	]š IB‘BÝ @!‘#"˜\3*2—ÿ÷½þ(Ð@ CðÕ6!	]š IB‘BÚ ÿ&v#]3"62—–àà˜ÿ÷¡þ(Ð5C-
Ð/Ñ˜!I@Š)C‚!˜Éðù??/ÒZçtæóµ$&�° !@É@Àj(KÐAxx	CIEÕ™	i)Ñ`13
+Np‹pÀ|
+!(Ðp4à`1ŠxKxCR
+Jp‹px+%Ð‡|ºB"Ó[
+pÑ2
+NpŠpÂ|*Ð
+pàAxx	C"‘Cp	
+Ap,
+Ñ @(Š"C‚Q(ð°ød$$,¦Óþ½§IÈh@È`pG¤H"Áh)ÑAxIApàBpÂ`pGøµ À0Äj,5Ð`x!xC@/Õ0ð‹ý@4áx¢x	”OC%ˆB$Üxˆ@	y€`y"yCˆBØyxˆBÙ8‰(Ñ}€÷÷›ü}p÷÷�ü @0=�Š"’C‚Q0ð[øø½}€=�ø½"Ò€µÄj,Ð`x"xC@ÕH}"ðTê@4áy¢yCsI"˜BØˆˆ@ˆ€cz$z#CƒBØ �Š€½
+�ûçðµ´ ÀC„°��˜!É@Äj,BÐ`x!xC@'(:Ú"ðféš+‹A�Òš˜1€©Aàš˜™€š©AõyFŽt‹©ŠC�€qA 
J0!ð‚ï+2»AÓLNðˆ@- N0õ€!ðtï¨B
Ø÷€˜!I@Š"’C‚˜QðÛÿ	°ð½>HÇ€úçµ÷÷ü!IaŠ"
+‚÷÷ÿû ½!ÉQÉj )ÐJxxC	Õ pG!É@Àj(Ð!`0Ap�ppG µð“ù!É@Àj(ÐAxx	C"Ò‘Cp	
+ApHxIIp½!ÉAµÉj)ÐJxxC	ÕI	xÉ
+Ð!IA
+Š#ÛC
+‚ðwÿ½!IAµ
+Š
+‚!Éðlÿ½!ÉBÑj)ÑIÑb
+~@0@1Bu‰}�upG|Î8µ!hF"ðbékFx€Ñ ðæú,Ñ	$à$"ðXé "ðZé$à ð×úñç  ð4û "ð¤èd$$,óÓ8½pµ· 
€! ˜0"ð@é"ðBé€4!}("ðBé("ðBép½ µ"ðBé! ð×ú"ð@é! ð£ú"ð>é"ð@é½µ"ð@é½øµ"ð<éÿHÀiÀi(Ð:1(ðÁý BÚ:1(ðºý
à:1(ðƒý BÚ:1(ð|ýà ðJhˆBÛQhˆBÛø½µý÷±ø½µý÷®ø½µý÷¬øÏ"ó!(Ð(Ð( xÐ@à x@@ pý÷—ø( xÐ€€à x@@0ñç@0!Cíç€€@ p½µÿ÷Éÿ"ð ü½ÌJhƒBÐ)`ÐîçpGÈJShƒBÐ)P`ÐåçpGÃH@hpGµhŠBÑÿ)	Ñ`ðü¼IIhˆBÐ!ÿ÷áÿ½øµ!‘izÿ$ÉÐiFðŠû(ÑkF±Hx@@0yhz€Õ €(| BÚ$à$µ €2!(ÿ÷Æÿø½µx››p"ð~è½ŸH€hpG�Iˆ`pGþµ!‘ª©ÿ÷æÿkFyz0ðCøðø"ðfè‘M/Ð’HiFðœù(Ñèh@è`˜€Ô 	ðSþ˜ÀÔ	ðnþ"ðNè M›fp�úP�ñiFð†ùkF¬`yz1ü÷ºÿÿ÷[ÿð†ù"ð@è,ÑkFyz0ð@øþ½pµwH„hü÷Èÿ#")ÿ÷«ÿp½µ"ð*è½µü÷¹ÿ½pµ6mH"1!ð2íÑjH"1!ð,í
+Ð  s ea � t!!ð$í°  � p½óµÿ!-1�°ÿ÷Úÿ(Ð° '% �7 !(!ðí¨xó!€€@˜	C· €©p1("0!ðþì1ÿ1"1¨!ðøì`i™ðú¸p þ½ÿµƒ°‰ŸEi	‘!D�t! !ð®ì@H™h;y’‘™˜2!ðºï1ˆ:H':�BÑqˆ�BÑ±ˆ�BÑ"™(ðú p(y(Ñ˜&(Ð(Ð
(Ñàhy(	Ð˜ðKü(Ð§pàhy(Ñ¦p °ð½µû÷Øý(Ñ !ðbì ÀC½ ½ÿµÿ!�°]1Ÿÿ÷MÿÑ@°ð½ ‰š
+#/’Ñ#· €1š ÿ÷Œÿ (p hp˜ 5(p
+hp!‰!�
+™‰ U à¤¬Â"û N 0ìÈÿÿÿ÷´ÿËç|µ™"’‘*!ÿ÷¶ÿ|½|µ™"’‘*!ÿ÷ªÿ|½ðµ
+…°%!hF!ðï(Ñ%,ÐÜ,Ð,Ð ,Ð",Ðà(,Ð),	Ð.,Ð/,Ð%íCà0xkFs8iFðZÿ(†çµŠx£+Ñ(*ÑÈxÁ'Ñ€%Ô"à¤Ñ	!ðæì  
+  ½(Ð(Ñ 1x(
Ñ
+à+
+Ñ	;!ðÌì ½ ½pµ
+Œx2% ®“.ÑÌxåÑ Ôp½p½¢üÔˆp½­õÐ.úÑ"	
+*öÐ*ðÐ*îÐp½µ	ð]þay)Ñ@0~(Òà)Ð)Ð y(Ñ ½ ½(µ	Ð	ðˆÿ(Ð!	@y(Ð ½øµ
&'	ðwÿ¨yÀÑ,Ð`zÀÕ ø½(ÿ÷¢ÿ("ÐðúÑ 
+ðñýÐ¾*Ñl“E•µB y(Ñ ÿ÷Ìÿ(Ð y(Ñ`y(Ðà ÿ÷©ÿ(Ð'à'({ÀÐ&à y)ÿ÷Bÿ¸BÙ&"(Ð"`y)1(Ñ ð5úà #!ð.î0ø½pµö÷ûÿáy y	ð/þà ð%ü! ð@ùây¡y 	ðäþðÑ(ö÷èÿp½µ	ðÿ�l)ÐµIAh3L2 !ðî½pµ¯H
 !ðî @! p�p«H©!ðRì	!@‰aHbp½pµ	ðàþ 	ð™ýz�!‰iƒ›
+ 2y
Ð+Ñ%1!ðÚí ðû(zÁ yð‰úp½µ	ð½þ�!‰@"-!
+T%0!ðÈí ÿ÷Íÿ½pµ	ð¬þ	!‰A~ß"ï#,Ñ$@wà$d@zÀÑˆ~(Ð$à$@ãÛC,wÑ| "Cà|@t(ð»ú(ð:û !ð’íp½µ	ðvþ	"’!€�v ÿ÷¾ÿ½øµ	ðiþ(	ð"ý)€1ÉŠeH4!ðÄë!hˆB
Ó½ €(ð�ú(Ñÿ …0A["(ðþøL ](Ù!} À)Ñ0@hà0h `ø½(üÑx}@@÷çµ	ð1þ	!‰@~û#)Ñ!à)Ñ!àBt )Ð ÿ÷lû ðÖú½Á~)Ð!)ÑB|#CêçB|@ççµ	ðþ	"’!€Áv ÿ÷Ëÿ½6I5H`7I5H`7I6H`pG6Jƒ�BÐÜ5J€
+Ð(Ñà3HÐ}"Ò€Ñà pG pG pG)ùØöç(
+Ð(
+Ð)Ð)Ñ$HpG#HÀpGHpG} @pGµÿ÷èÿ p
+`p+âpÑ
+ à+Ñ( à  p½µð*ø(Ý à ,Ð,Ð,Ñ!ðxì½ðìø½ð÷ø½Y@KLˆc”ä;Ù“¤;”ì;n	`	Îùÿÿpµ	ð:ü(	ðyýÿ1ÿ1‰‰‹4 )Ñ!o)Ñ p½øµ	ðfý0	ðüÒ|Í~h—Of.40ÿ÷Üÿ(Ð`4 ‰(Ð @(ˆ8BÐ ø½ ø½÷µ‚°˜	ðGý�!‰Fö÷þ˜(
+Ð,Ñ˜!ÿ÷Ìÿ(Ð$à$2À2’ 5«x™˜"!ðDì8ö÷þ°ð½ðµ‡°ö÷ôý,�cÐ ÿ÷‹ý(^Ð– [ùH!ðxê& 	ðÉûÀh1(HÐ@`+Ñ@1{(ÙÎ�!ÿ1"1 ðýÿ8à(ÑÊ‰!ÿ11 ðËýçO
+!8hªù÷­ý ðtÿkF}8hªù÷¤ý`z@Ô 
+ðßùà¨BÑ}(
ÑkF�Y{1CYs��™ 5#û÷_ùàÿ …0[" ÿ÷qÿây¡y 	ð‹ü§Ñ˜ö÷�ý°ð½pµœ°‰Fi
0	ðªü�!‰D$ ](Ñix*x	C(,09ªð û– �[ "-0kFÃ¬ ‚]#%30©!ðªë°p½µ‘iFÿ÷Yü½µðü½pµ™ÿ÷|ý! !ð†è=  p `phx pàx!Cû!àp@±x‰É‰Càp)x€€‰‰Càpp½þµ	ðû� 	ðQü! ð=ú!	p@k!ð&é0 0�Àx"Ò'¥)Û€Õ(j(ÐðXû/b˜ÀxÀ	Ðhj(Ð© € ð-ÿàob zû!@ r  0A}÷"@Au
+ðfú!ðë! 
+ð€ü!ð4ë	ðVú– [›’213L2h10ÿ÷…ÿ 	ð¦ú(Ðö÷Òüþç y(Ñ 	ðmú(Ðö÷Çüþçµ €"ÿ! ÿ÷ú	ð&ú(Ð!ð
+ë! 
+ðLü	à ðø! 
+ðü\I b!ðÆêþ½þµ �ö÷ ü� 	ðÆûÿ &~0!	UhqPHˆ(ÐðLúðãø ðcø/Ð ð<þà8ð8þ8
+ð¬øây¡y 	ðsûòÑ"BI˜2 #–ÿ÷Uû˜ö÷oü @,à ù÷Lüàx(ùÑ˜þ½pµ$ÿ÷öû(Ñ4"!(ÿ÷«ÿ(Ñ!(ÿ÷ÿà(Ñ$ p½þçµ!ð˜ê½þµ	ðgû(	ð úê!?d›â š 0!�!ðŒê˜!!ðŠê8z¬'ƒH]"� €› /PÐ'+Ð+Ñ)IÑ#
à+y+Ñky+Ñ)?Ð	à)<Ð.Ð#$!Tà$!T¡l)3Ñ! 1
—ÉxÕ‰Õ
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+ð±ù(Ñ$à$ 
+ðsù
+à(ÿ÷Rû(Ñ$à)y(
+ð|ù,Ñ-ïÑ ð¨ø,Ñ(Ðÿ0a0@(Ð$ p½óµ…°
˜	ðzù�˜	ð¹úL0�˜h1˜4‘ÿ÷Àÿ(Ñ˜z)p@zhpñå(©!ðZé(x† x¶€€†B"Ð˜	ðTùhz·ƒ›¿;C˜€r! 0App8! ðfî.Ð.Ñ8!ð²éà8!ð²éž˜ 60shp™˜Hr x€€ÃÐ(x€€	Ñ ©ð6ü1{š(!ðœé xÏ!@)x‰‰	C p(x€€¨Ñ˜ý!€x@™ˆp”åðµ&�°–	ðBú(	ðûø(y(Ð(qÑhy(nÐ� €&(©ÿ÷kÿ! 
+ðÑù(Ð(ÿ÷ºþ(
+Ñ()y˜0)�Ñ(	ðiø(Ð 
°ð½!ÿ1˜"÷1 ð&îøHˆ(Ðð�øð4ÿ!ðôè! 
+ðmú!ð"éñHAj"CAbkFYz"(ÿ÷/ø(ð˜þ(ð‰û(Ð# ]Ô€Õ(ðEú!(ð³þ# ]1Àô1!ðé
+ð!øÝIh "C`(ð‘ÿ(Ðyz¸h"àõàkFYz˜" ðÂï ðÈï 0!�!ðþè*W2’	"˜
+‘!ðøè
+š™(!ðöè(€0	�ÂŠ’";L2!3h1 ’ÿ÷ý @ �z(ÑN ]€Õ `0Áz"CÁr:z‰‰’’Cà `0Ázû"@‰‰Árð·ÿ'¤ GU(ðþÿ(Ðþç	˜°!@k�!(ðž^
+`Ÿ±úÀöü	˜°!Àk�!(ðýû(ÿ÷˜ú(ÿ÷Üú(ÿ÷Gû™ 
+ð0ù	˜}(t0!ðè ð„ý`h�(Ðÿ õ0[}!À ð¢îšd#ZC€@ ðšîÿ!Q1ˆQàÿ Q0‡Q h�(Ðÿ õ0[}!À ðˆîšd#ZC€@ ð€îÿ6A6ð`àÿ6A6÷` j(Ð
+ðRø(Ñ
+ðþ!ðZè! 
+ðBù!ð(è! 
+ðjù ðîïÿ"‘2.#©¨ý÷1ý(!Ð˜0� l(Ñš˜
+2©!ð>è˜š{
+2©!ð:è j(Ñš 
+2,0©!ð4èš™(ý÷Ìý&0µæµ‰	 4"x@i*Ð*Ð*Ñ(Ðy*Ñ"ð„ú½
+!ð@ú½bx*Ð	*ùÑ(÷Ðy*ôÑ	"ëç
+!ðyù½þµ	ð›ø8ðTÿ� €, @(z(Ð(@0�€{€Õö÷\ù.�Ñ k(	Ñ 4 {(Ñ z€Õ y(Ð˜ö÷Nùþ½.Ñ8	ðmø�!‰Dÿ0ÿ0€�‰@ŠAC&HHC–!É[‰ ðÄí@ c˜ö÷3ù`5èz@À°BÞÐ˜€{€ÚÕùy¸yðYÿðÿèzû"@òRC.èrÑ	z€€‰‰Cà€€èr8ðÎüà`zÀÕ ð€ø ðºûây¡y ðóÿ,îÑþ½Lõ¨€§€@Bµx(Ð@p
+ÑÐxß!@Ðp ÿ÷øø! ÿ÷`ÿ½ÿµ™°"�˜ð÷ÿ�!‰D>810	jFðóþêx™“˜Û)Ñ$!	])Ñà‰xÉÑ(ÐyÀÕ  C�À˜BêpÐ˜ÿ÷Âø˜øK�$˜XC ð.í#™@ 4p y(Ð˜!ÿ÷ÿ°ð½>µ‰Ei(ð³ÿ� €‰l)Ð".1%0kFÃ– C[`x!x
+C! 1(ÿ÷œÿ>½pµð–ÿ�!‰Dö÷gø!k)ÐI!cÑ!0ÿ÷æþ(ö÷^øp½µðÿ�!‰@ 0Á{IIÁs½øµ&0–	ð×ü! ](Ð”!¨•c<\£™kEKJ]�B?Ñ) t1"0ðþÿ(7Ñ&/
+ÐxzÀÔ¨y¹yˆBÑèyùyˆBÑ �	à(ðHÿ!I@@z€Õ&) ˜10"
ðØÿ(Ð®H"9ðÑÿ(Ð&à"¡(ðÈÿ(Ñ �ðÁù(	Ð˜(Ñ.Ñ 
+ð$øðPú0ø½pµ �04@!  ðîê€5(k(Ði a(k@i`a(kÀx`€p½óµƒ° �0ðôþ7€7�ük"fa`{@@`søk™°5¶0 ðúêéx— @épùk0ÿ÷Çÿ˜!IEèx!Cèp þ÷Aþ(Ñ�°ð½èx@@èp˜÷çøµ%‰D0y(
Ð(	Ñpy(Ð(Ñ!0ðÑù%(ø½0ð¬þ�!‰A 1È{(òÑ!0ÿ÷*ÿ(ìÑ!10ÿ÷�ÿåÑÿ7 xÿ7¿	 yj�@BÛÐå"!0ö÷úÕçpµ	ðýà`y(Ñ*! þ÷Nþ1 	ðýñÑp½øµðmþL68ðû8ð ýEJ¬#QyArÙUzyÏ#@‰’‰’Cr©l)
Ñ±x‰
+Õáx‰‰IápBz18 ð¦í ø½0µ“°ð<þH!hF ðêkFxó @p «w+H’€y’Ã@ÿ0a0E|kF]p|ÿ1€€Cp q1���ˆyIyC€�J iF ðtí°0½øµ
Hi�‰D˜ðþà|d#XCÿ! ðbë$!	]
+#YCN@1h�BÙ0``|pq |0q( ðÄé°y€7@°q9zˆB˜Òÿ÷œÿà@BÈò¼Â¦ÿ÷`ÿ˜%"!þ÷¢ý ø½µðÆý�!‰#¬"AU"À1
+tˆ!	\)Ñ%"! þ÷Šý½íJ)Ñÿ0a0A|Qqy|‰€‰€C qÿ÷0ÿæç ÀC`Sq “qÿ÷Wÿ½µð“ý�!‰@!À0t" þ÷_ý½øµðAü0ð€ýpz4À'Õõ÷Oþ o(Ð `0€‰(Ð@ˆ�Ñ ƒ?‘X§Ê±–'@(ˆÀ
Ð ðšùÿ%…5©[(Ñ"à"0ÿ÷	ø8õ÷.þø½øµ%@zÀ)Õ0ðü70ðDý`7¸‰(Ñ%õ÷þ³I�	[ )Ó-¸�Ñ @ ˆÀÐÿ …0�["0þ÷Øÿ˜õ÷ýýø½µðÛû4õ÷ðý!!g`4¡�õ÷ïý½‰x
+’*Ñ	+Ð+Ð*Ñ		
+)Ð°çpG‰x
+“+Ñ	+Ð+Ð’Ñ		)ÐŸçpGpµðªû ðêüÿ0ÿ0€À‹(Ðõ÷¸ý þ÷]ÿ(Ð ÿ÷Qÿ(õ÷±ýây¡y ð£üêÑp½pµðÊü� €. ð£ý# @]Ô€Õø @Y(ÐÀ6ðj ð”é @(z(Ð (@k ðˆé ðcû*!	\)Ð)Ð)Ð)Ñ@k ðxéây¡y ðfüèÑ @({(Ð	 €(€j ðféðÃúðÍú„BÑUHˆ(Ððû ðfë ð˜ëðKÿ ð®ø! 	ð«üMI b! 	ðÒü ðVëp½|µð^üðšúð¤ú†B!Ñ ðDë! 	ð½ü ðrëðÿ ð‡ø ðšë! 	ð‚ü ðhë! 	ðªü ð.ë3Hˆ(Ð(ðÓú(ð,ý(©ÿ÷jùkFYy˜" ð*ê ð0ê# ]Ô€Õ(ð¸ý(Ð(ðFü @ z(	ÐÍ "€#’JH) ðê(ðÁúª @[(	ÑM À"#’JH) ððé 6°z(Ð(Ñÿ a0Yà(Ð(Ñÿ e0Y)Ð(ðúêy©y(ð¬ûÐÑ|½¼ÂLõÀ €‡“áe ¡ø�h)Ñi!	\ÉC	Ñ@m(Ð pG pGpµ%Hx
+xúLC(ÑÈx(Ù `pÈpà`pˆx p`x(Ø à¡x)Ð@ ðëàpà`xÈp xˆp(p½"!€�`Á`aAapGæHµ ðôêãH8 ðòê½AiIhà�BÑi(ÐÊhÂ`àJiÈhP`Èh(Ð	iaŸ²TOT«>Þã“àiIiˆ`àÉh)çÑ pGµ
Ð`ihI` h!õ÷¡û ÿ÷Õÿ ÿ÷Çÿ½µðLû�!‰DÀ4àÿ÷äÿài(úÑ½µðûù0!Ae�eÁe!d0ðï½µðíù0!u�`Á`a ÿ÷æÿ½µHpµ8 ð˜ê²H ð–ê²N$% `C�5P­HM`8 ð†êd,óÓ p½µðÇùàÿ÷¥ÿ`n(úÑ½óµ�°
˜ð¹ù˜ðøú4õ÷Êû-�!Ð`}%(Ð—Neu°x@	±pÐpx(Øõpà@ ðHêðp }(	Ñ 8%u�hI�`àÿ÷nÿàh(úÑ˜ÿ÷¼ÿ˜"ÿ0�0�ˆ˜þ÷tý˜õ÷™ûþ½>µðvù0Bm�hkF‰ÿ"•2€"Z€`0€z˜rÙr!ÿ1"1¨ð¼îU! #jFü÷_ÿ>½pµðVù(ð•ú4am h@iIÉxI�BÓ`4 z(Ñ  r(ÿ÷Äÿp½÷µ„°
Nh˜ð6ù0$.”�fÐ°h�‰(h<n@(` yÀ	Ñ˜!þ÷ùü(Ð �(hà˜(Ñ˜(Ð˜`0€z(Ðàx !Cààxß!@àpl À](Ñ x€˜Ñð øàðÃø(h( Ñ"à˜ÿ÷–ÿ x€Ñ˜ðËøà™˜:ø÷ìü˜ÿ÷[þ(Ñ˜ÿ0�0�ˆ"˜þ÷Ëü,Ñ˜!õ÷]ú0ÿ÷‘þ0ÿ÷ƒþ °ð½pµà"!(ÿ÷€ÿ h(÷Ñp½óµ$…°˜'”ðü�˜ðïùÃ!‰E.�<Ð˜ð÷ûð‚ü(Ð 	ðêú™ˆB
Ñ ˆ(
+Ñ˜À0~(Ñù÷tÿ(Ð à (Ð`hÀÐ˜	!‰@@i(
+Ð'à€ÀXáÌß �˜ 0@{ðÍÿ �.à ð<ïùçhh€h‰@`0™.sÐ)h)Ð,Ñ™)Ð!As(h"(Ø/Ð,Ù"à(h"(Ø"˜)ÿ÷ÿ(Ñ.Ðd(h(Ð.ÏÐ,ÍÑ/	Ð,Ð˜€0Àk˜ìŽ{ÐP¯m0ÿ	ð
+þ]çøµ
ð!ø8ð`ù4õ÷2ú#-�Ñ 0�h)ÐI�`#u€h(Ñ!8ÿ÷Lÿ8ð[û!T18ÿ÷7ÿ!18ÿ÷2ÿà-Ñ`}'(ÑýH�xI		�pguBx*ØÃpàP ð�èõIÈp 0'u�hI�`%u˜õ÷óùø½øµ$‰E(n€x€=ÑêOëH9ˆ"#ð*ýÑ9ˆæH"#ð"ýÑáHAhIA`(n�yÉ
Ñ€x	(	Ñ0ðªÿ€6q}0`!@0s ø½  s'faæt")0'�ðpí°  � 0f)n
+ˆ 2ðèì'� ø½)ÑAiJh*ÑH`Aiˆ`pG‰hÊh*ÐaàJi�`aÊhÂ`È`pG *Ð*Ð*Ð*ÑŠBÓàŠBÐ)Ñ pGpµ@i%Dh,Ð h‰@à%äh h‰@,	Ðx@@ðî1ÿ÷Óÿ(îÐ(p½µ È@kFx@Ð ½pµ$õ÷Nù¡Hððï(ÐžH0ðàï(õ÷Dù p½ðµ
…°ÿ÷åÿÑ °ð½õ÷0ù� �à`¥` a(‰F0n€yÀ
+Ð8ðKøÃ!‰@`a #�.à8ðýþÿ …0À[�0x5@@ðÄí„F €8€i(Ñ.`6pzaF�ÿ÷¢ÿ(
ÐT5 aFeaÿ÷|ÿ�pz#ÀCÐ#à#5ea™ ÿ÷Cÿ`ihI+`Ñ™"8þ÷¸ú˜õ÷Ýø ¡çµðºþ0�h@m_IÉxˆBÓ ½ ½pµð§þ(ðæÿ4(ÿ÷âÿ(ÑSHx(Ñ0ð1ü(
+Ð`4 z(Ñ  r(ÿ÷ý p½ p½óµƒ°7‰%� �˜‘ðzþ˜ð¹ÿa!4É@™¤Fn¡x
+“Ñ		)Ñ �và¡yÉÐh(öÐàxÀ	óÑ�	Ñ˜1ÿ÷‚þÐ x€Ð!0ðìû(Ñ˜1ÿ÷"ÿ(UÐ%Uà`F}(ÕÑ˜"ÿ0¡0ðø(ÌÑ x‰Ñ	(Ñ˜ÿ÷âôáÞL³ÒÁLlü˜1ÿ÷{ÿ(àÐ x€	Ñ˜1ÿ÷IþÖÐ x€Ð!0ð³û(ÐI0iˆBÈÑ0ð¥û(ÃÑ˜1ÿ÷àþ(Ð%ðáù(Ð 	ðIøðuú
+à€ÀªÃdLá¾BÐ/
Ð x€Ð˜!`0{ù÷�ù!8ô÷jÿ-Ð.Ð¾BÐ!0ô÷`ÿ˜´æ(µÐðËý(Ð0}(Ð ½pµð¿ýô÷Õÿ`i(Ð!"10ÿ÷uüà"0	ð%ý(ô÷Çÿ p½óµ…° $�˜”ðžý5`6ô÷±ÿ�(`0�Ày@�Ð1h€@ˆBÓ™‰y@-]Ðph€h‰@`0{à0hóçph(Ð€hd‰$@2!`0As{$¸BÐ!‘˜"1ÿ÷'üm---ãØph€h‰@™)"Ñ`1
+{ºBÑnd’x$$’Ñ!‘x@@�	à1"Jsx1#Cpˆ„˜"1ÿ÷øû˜Dq˜Ày@€Ð˜™€yˆq˜(Ñ1hš˜	ðšü˜ô÷<ÿTäóµ�°
˜ðý8 @]4Fv0ðàë™)*Ð™"’‰‰i)#Ð"`2y)Ð nÿ÷¸ý(Ð }(Ñ(@0ðdêÁxÉ
Õ€x‰)Ñ	Õ 8q˜1ÿ÷9ÿþ½øµ
ðÚü. Ð,Ðô÷ìþm @]41(Ð2(Ñ`4 y(
Ñ`y(Ð@`qÑ(xAI0ÿ÷ÿ8ô÷Ôþø½ `4 q`q qõçûHpGy(Ð(ÑùHpGøH8pG pG|µ ðmü"h4À4*-Ð	Ü’3Ð*1Ñ110ðLí+à *)Ð!*'Ñà~(Ð("Ñ A(!wÒ-ÐhzÀÕ	ð¸û"!’‘á~)Ð!(#ù÷fùà `wàØH"h@!÷÷;ÿ |½pµh!"1€2"+HÐÜ›Ð+Ð+4Ð+Ñ ðü(Ð!Ið(úà#+,Ð$+Ð%+Ð&+ÑÂH"ðøì p½ø÷5pÚ†H·�Æ ³ø ð‹û ð‹û¼H%`(ù÷ÂúÀ4`(Ð ð²øew ðÛúãç oðUý!1à‘c!d1 ðÌìÖç‘c!X1÷çµoÿ÷Sÿð8ë¨I`! À1aˆv ð‹ø½øµ�Mÿ÷Bÿô÷þ,À4 i(Ððê  aðë™J+Ñ`�`"’—H²iÐ3)ðë  v8ô÷ìýø½ðµÀ0‡°�o€6�ÿ÷ÿðøê�2lsl‹AÒ2l˜sl9€™Aà0lqlšÀCÉC€yA�(iš'3»AÒ(iš9€"±A’#wHÔ3!ðÐê™ v°ð½˜Gav(ˆ(÷Ñ˜ÿ÷’ÿóçþµeNÿ÷Óþ7€78k(&Ð ˆ5À5(Ñ(i(Ðð’é!)aô÷„ý�ð¢êyd8dhi(Ñ"3’[H"iÔ31ð˜ê (v˜ô÷sý ðêÿþ½pµt0ð~è è0ðzèÀ4 iðfé%%a`iðbéeap½óµ‡°o�ÿ÷Šþ� ðû˜!h @0(1&%�40À6€5	+‘jÐ	Ü›ð\é+<ÿÿZ—£‚…Îÿ!1"+nÐ!Ü
++lÐ+kÐ+jÐ+iÑpið*é'wa7v0ið$é7aèj(Ñ!h˜�BÑ™ ð¸ë (c 	°ð½#+qÐ$+Ð%+Ð&+ÜÑH"ðªëîç ðCú ð=úH'`p(Ð ðkÿ pwIÿ ñ0/bHc˜ÿ÷Fÿ¦à ðˆëÐçû÷(ùû÷Èû ÿ÷lÿ˜ðýû!1îçRà 
+lüÈˆäÂÈ À�·¸¦€;àOà_à*àà hbzà pv¥ç /pv
Ð· ›€9"ðpü(ÑúIh@`˜ˆ(aÑ0~(^Ñ˜ÿ÷‹þZàà (b ðLýSà ðEú(ŒÐ!IðUøwç©c!d1žç©c!X1šç!ébð’ï¨j(–Ñ!h˜�B’Ñ0j(�Ñ!41‰ç!)céj)Ñ™	h)Ñðzï (b ðùà/ÐxzÀÕ˜ÿ÷¶þ	ð{ù"!’8‘ilD»ut³”ø÷-ÿ è0ð\ï"d!(ðZï(ð\ï™Vç˜*çóµ…°˜ÿ÷lý�˜ðWûÿ!�˜-1ý÷%úSÐ(‰t!F ,(� ð*ï˜ð£û pàh¡x@	@C!Cà` &f' ` `7xs˜·!‰A‘‘ªK"!0ðÒèðx!Cðp˜0q
+pq˜ˆ(	Ñ 8s˜!ðú(ð—ùà˜€j(Ððùù(Ð ð˜è8s(ðmú(Ñ!(ô÷Fû'æðµ ‹°� ¼0� ð}ù(pÐAzÿ4Éd)jÚ€0	�ÀŠ)€�¢iãiÆ¸™AÓ¢iãi)¿™A
à iáiÀ©AÇCÍC jajÀiA‘�š3)8ðè	™I}‘ð"è jD,Ü˜š™˜3ðèšá3 ðé@¹A}%�š˜-1ðéš'9¨¡AÒšp>#»AÒš#Pš³Ah³A	Ò™WJ
`UI	h‰�BØ �˜°ð½ðµ´‚°#o�€0ÀŠ™„˜"ðÀïKIMk¦<ú5€4®BÙàk@†BÒpàcàkš›€š!YAÂ k(8ÐàkAŽB6Ó<À4a~)1Ñ8I8J	h‰ˆB+Ó˜ð(ü(&Ñ ~(#Ñ i( Ñ	ððø(Ñ	ðìø(Ñ.H"hF!ðöí(Ñû÷žû(Ñ›š8ÿ÷"ÿ(Ñø÷»ÿ(Ð Aå ?åóµ�°o�ðú�˜ÿ÷ü� ð“ø˜1h41‘1‘41
+‘t154À5€4(	‘wÐ"Ü€uÐ(-Ð(rÐ(qÑ'obè(jÑ
+˜ðÐí`j(Ñ'b™«àäÂN¾àò/¦€ˆÀ(~Ð(}Ð(ÝÑ
+˜ð´í`j(äÑ  báçð´ï� ‘�� b dàd(bhb¨w ø÷ÿ˜ÀhàcðHü(ÊÐ˜y(ÆÑª’›š0ÿ÷%ÿ(½Ð/"ÐxzÀÕÿHh(Ðð�ÿ"!’‘!8#ø÷Aý	˜ðrí	˜"d!ðpí	˜ðríàaàKàRà–à®o¸@¿&®`ø (b`j(Ñ `b!àb0oIðþ
+˜ðTí}!
+˜"	ðRí
+˜ðTí k(Ñ˜ˆ(Ð˜@hÀÐÞIàkˆBØàVàà™	"’‰Ii)Ð0o	ÿ÷Þýà  bàj(VÑ j(SÑ(j(PÑ
+˜ðíà0ðªèHà  bàj(CÑ(jà	˜ðí (bÄH!`3à(6Ñ™çç¨(1Òhj(.Ñè(+Ñø÷®þ('Ð/%ÐxzÀ"Õðÿ"!’‘!8#ø÷´ü¨@¨wà' ïwðÿ(Ðyð�ý/b	˜ðÖìàj(Ñ jÆç °ð½˜ûçðµ
£Io	h‡°ÿ1Z1		‘ÿ÷ßúðÄî!‘‘�(h€XÐ4€4(VÑál l#Y@X@C%Ð¢l˜ãl9€™AÓ¢l˜ãl€9™A
�àš lál€ÀC¹AÍC�àkš!+‹AÒàkš€©Aà àcú÷´ýðèð,û(Ð k(Ñª’š;0ÿ÷
+þ(
+Ð"’}"ãk™Ò¨ú÷Üþ(Ñðêî 1 c@10ðêï må(kåóµƒ°o�ÿ÷qú ðìþ˜,hÀ4(^Ð
+Ü€XÐ(Ð(ZÑ(è0ð:ìOà(*Ð("Ð(OÑ à ø÷œý(ðÎù÷÷|û`%(Ð ð‡ûeweb¥w8ˆ(Ñ ~(Ñ˜ÿ÷ñú ÷÷øú(à)(1(ðœï"à (Ò`j(Ñà(Ñø÷´ý(Ð.ÐpzÀÕ˜ÿ÷Aûðþ"!’0‘ø÷¸û @ w °ð½ `bùç˜øçµ
+ho’Ð*Ð€4*Ð*Ñ0à à0 cðÛÿà ðûý ½½óµ…° �ð\þ˜:h´2><!€6À4$(’rÐÜ€Ð(Ð"(XÐ#(hÑà%(WÐ&(UÐ((÷Ñà~(4Ñ B("w!Ùáv‹à8ÿ÷û àv w÷÷âú-pc|ÐhzÀ}ÕàäÂðàòø÷ñü(qÑ ø÷æü àvà-oÐhzÀlÕðý"!’‘!àÐznõ<Ã$W¸î(aÑ B("wÈØ-ZÐhzÀWÕðjý"!’‘(#ø÷ûKàà~(´ÐGà ðÚü%(åvø÷±ü˜÷÷Àúew+àà/à±k80�BÑà~(Ñ ø÷Ÿü�I `�I` w -àvÐhzÀÕð3ý"!’‘!(ø÷äú˜÷÷•ú ð¤ü±k8ðžî	àà˜�à~H"h@!÷÷®ø˜äøµ �h.,'€6À4$( ÐÜ€Ð("Ñ(ÿ÷iú ø÷Xü'wnH"h@!÷÷Žø˜ø½%(Ð&(Ñ çvø÷Güú÷
+üú÷ªþgw±k(ð`îëççv÷ç‘ççóµÀ4 i&(�°Ðð°ë&a`i(Ððªëfaÿ!11(ð¨ê(ðgø)1(ðFî!(€0bAbLI`‡cLIævÁc˜(gþ½!€A`HIÁ`�`GIa}!	�aAapGEHµÿ÷ïÿCH0ÿ÷ëÿ½µÿ÷ôÿ@H!ÿ÷µÿ} "�<H’’;Jt0#;¡ðnêd "�5H’’:JH8#:¡ðbê½’x 	*Ñ"
+ppGµ ú÷9û €0j)Ñ!b!Ab o	ðû½pµ.J!ðâí ,J!0ðÜí 0)J!ðÖí L0'J!ðÎí %J)(0ðÈí #J)40ðÂí !J)@0ð¼í J1X0ð¶í J1d0ð°íp½àÂäÂüÈhB@
P 
+AìSleepConfirmTmr!éAP_NullPktDoneTmre¶ï¶+¹IÂ¾sÀ]Á…Â	Ä8µÿH
@kðÂêýI"41’"(ðÔë8½µ÷L`kð²ê `c½ôI µaòHI!hð–é½pµïMhˆ(Ð ðYÿhˆ!|1(€&à ÿ0A0†kú÷Ôúú÷týãI Èa fð!Sðžëâù2Qee ð!ûð]ù ð.í!"	0ðÿhˆ!X1(€ ðíp½ µðÝø½µø÷'û(Ð ð<ü(Ñð8ü(Ñ)¿·8Çw�k‚ù÷Qú(
ÑÇH"hF!ð>é(ÑðÑú(Ñ ½ ½ÀHµ 8@Š(Ð¾H»I@kIiˆB#Ñ»H€0€i(Ñ·L" h!ðé(Ñ h"F!ðé(Ñù÷ú(Ñðüû(Ñðøû(Ñð�ú(Ð (Ñø÷Óú(Ñ ½ ½øµ%,ŸN¢O°‰¢I@7ˆBÒym8ma@CÐðë:m{m€™A}'ÿ#:ðfê¶‰#:ðbê€¡AÓ%(ø½0µ‡°©¨ð6ú"!hFð�ì	Ð¬BÒ ðsú˜™‘�à ðkú,kF˜‰ ð~ì(Ð ð`ú °0½"’kF™‰}"Ò#¨ú÷7ûòç|µsM
+hªfÿ2A2h–ktI 4!+=ÐÜ++ÐÜ›WÐ+Ð+SÑià +#Ð+LÑ pJà";ð¨é
+H%H41ð"ì=àh@`üçHh@H`üçˆh@ˆ`üç@aüçHi@Haüçàp ð
úèj@èb"à¨j@¨b x(Ð(Ñ`xA(apÒðyú"!’‘!x)Ð!0#ø÷'øàGH"h@!ö÷ÿý |½pµÿ4A4
+h%£k& 5*ÐÜ’Ð*Ñ à*Ð'*Ñ.qà40àX0.qàaðBüà ðbú p½p½pµÿ0A0…kú÷Vùú÷öûø÷“ù(Ñ!(ð³ý ÿ0%0ðè"d! ðè ðèp½ðµ4ÿ4 A4…°� k�h7%47 5$(=ÐÜ€Ð(`Ñ hpH"h@!ö÷—ý˜°ð½%(Ð&(QÑ0ÿ0%0ðàïài¸BÐ"!˜	àÈÂˆÀ`óHÿÿõüÈðTýça'8/pø÷/ùú÷òøú÷’û¯p"àài¸BÑ0ÿ÷‹ÿàø÷&ù(Ñhp (pø÷ùðºù"!’‘˜!#÷÷kÿÙ €](Ð	 ðýþái0ð$ë¦ç‘¤çðµ5ÿ5A5 …°�¨k�h/,"(7 4$(~ÐÜ€Ð(Ð"(RÐ#(vÑ	à%(XÐ&(VÐ((÷ÑøHAjIAbôj.4Ëƒâ6 x(-Ñ`xA(apÙ"p‡à  p`pö÷±þ¨b˜@zÀ}Õ˜@y(Ð(wÑø÷Ãø(sÑ ø÷¸øæIÈi‰iCkÐ  pðRù"!’‘!à(dÑ`xA(apÙ"pLàð@ù"!’‘˜#÷÷òþQà x(¾Ð(LÑ:àéi0ðªêFà0ÿ0%0ðï ð¤øðàþ040èa  pø÷wøú÷:øú÷Úú8ö÷‚þ àà"à pÜç¿I ˆaÈa x(Ñ ø÷`øø÷£ø(Ñðxý(Ý `p  p³ç
+à8ö÷aþ ðpøð¬þ»ç‘à®H"h@!ö÷~ü˜åæµ©L4ðHý(Ð¨Hˆ(Ð xÑ¢Hy(Ñ ½ ½µžL4ðµù(Ð xÑ™Hy(Ð™Hˆ(Ð ½ ½þµ&ÿ6A6%±kà5*‘hD2)’~Ð3Üâù2`7)’DÐ&Ü‰?Ð)>Ñö÷Ùý ð±ø!)‚˜eAe÷÷éÿ À4pc ~(Ð  vø÷Oþ¸x(Ð ðÐý ¸p ð
+êà)ZÐ
)Ñià"42")mÐ	Ü)VÐ)
Ñ!˜Iðÿà#)\Ð')ÑiHAˆ€ þ½˜ðUúÿ÷ˆÿ(Ñÿ÷nÿ(Ð ðü ðÚé!|1'à[N ða ðÀÿ ðÎé (‚ð.èšQee0x(Ñ˜!ð·û˜ðî"˜d!ààðî˜ðî0x!X18t ð˜é½ç˜ðú¹ç (‚˜@zÀÕ(Š(Ñ˜!ð‘û«ç˜ðòíéç!(1òaáç!1òaÝçøµÿ0A0%€kÿ5a5�h&/46<?(?ÐÜ€hÐ(jÑ ðø ðýÿ¨x(Ð ð.ý ¨p ðVÿRà(Ð'(TÑ (qKàù÷íþú÷�ù ÷÷#ÿ8ð²í ø0ð®íI cÿ÷áû˜ð¶ù!˜"	ð-û!˜IðQþ%àù÷Ëþú÷kù÷÷ÿ(Ð
+HÀi(Ñ˜!ð$û8ð†í"d!8ð†í8ð†í	ààÈÂüÈ`ó˜ð„ù1 ðé ø½ ýÓ$õ0ÏÐ8ÍZðœÿùçø½þµ%ÿ5A5©k‘h&þOX6)gÐ$Ü)EÐÜ‰aÐ)`Ñ% ýaÿ0}aa0½a|(Ñ ÷÷²þù÷uþÚ Søx(Ð ðÌþ%à)DÐ)CÑAà)?ÐÜ)<Ð);Ñ9à")9Ð#)6Ñ!(1îa9àÿ÷.ü(-ÑàH"n)@i@C%Ñ ð§þðãü1&àÙH�€ÿ(Ð×Hªhö÷Ûù™ÿ ˆw˜!ðäý(Ð hcè ](ãÐ(áÑøn@øf þ½8o!@8g1îa ðvèóçµÁL4ð]û(Ð xÑ½Hy(Ñ¼H€0ˆ(Ñ¼H|(Ñ÷÷Eþ(Ñ ½ ½µ÷÷@ü(ÑðÈî¯J€2Qaa½µ«Hy(
+ÑðÄþ"!’ ‘÷÷vü½µ£L4ð£ÿ(Ð xÑžHy(Ð�H€0ˆ(ÑžH|(Ñ÷÷þ(Ñ ½ ½µðIú(Ðð¼ø½ðµ"ÿ2A2‘k…°#‘hd3“|3“D3%‡O 6À5)“pÐGÜ)nÐ(Ü‰lÐ)kÐ)jÐ
)iÑƒL z(7Ñèj(sÐú÷÷ý(Ðàh(÷Ð0|(jÑ÷÷¿ý(eÑÿ÷žÿ(~Ðhj¹iˆBÑ˜ÿ÷ƒÿ*á
)uÐ)tÐ)Ð)@Ñ÷÷æý(Ð˜!ðÇù˜ð*ì˜"d!ð(ì˜ð*ìÜá)~Ð*Ü)Ð]J)RixÐ)wÐ)Ñ*ïÐú÷¾ú(ëÑhj¹iˆBçÑh‹(äÑð›ûðöû(ÞÑ÷÷sý(}Ñøx({ÑáÛà'á¶ààÄàxà)sÐ#X3")pÐ#)oÐ')nÑ 0q ÿ÷/úžáëàÑàö÷2ûðx(Ð ðký ðp°x(Ð ð6û °p0y(
Ð 0q ÿ÷úà®àá
á1H€0ˆ(›Ñ ù÷œü$¬ƒ,blb ¼qøp)H€0„`Ä`aDa+H„p+H`+H€+H`˜'z(ÐàÇàáá&H"h!ðvë(Ð˜!r˜"	ðùÿ÷ÿ(Ð	'˜û÷“ø(Ð!˜Éà"áöàšà0á+á5áð-üHh)Ñ`H"hÝ=þ,Óoýèé!ö÷ù0|(Ñ÷÷Õü8ö÷Iúh‹(àÈÂàò@!øÈèŒóôÃ ÃüÃˆÀøÃüÈÐðû(~(Ð,vø÷ûúàðÓú÷÷¯ü(øÑyi¸iCôÐð:íøJQeeêà˜z(êÑ˜$!r˜"	ð¯ø ö÷úïH`×àðäú ö÷üùÑà˜!ÿ÷Kþ øpà¸i(Ñ�˜iFðìû(Ñ˜!ð›ø˜ðþê˜"d!ðüê˜ðþêà¨‹!C¨ƒ ö÷Óùxi(b¸ihbèj(Ðð¯úŸàðÑúœà™ r!˜	ðeø’à˜ðÔêÉH!@0Ábà÷÷Aü(ÑøpÆHz(…Ñ ö÷¨ùxi(b¸ihbð°ú(vÑÿ÷Bù(rÐ™mà˜ð²êð¸ìâù2zç÷÷ü(dÐµHÀh(Ð ö÷‡ù¨‹!C¨ƒ˜ðšêUà¸i(RÐ*PÐ¸y(MÑÿ÷ù(IÐú÷:ù(ÒÑDà ¸qAàÿ÷žý(&Ð£O&yi8iq@p@CÐ80È€™AÒðzì�›J8i
yi€šqA+‹A
+Òš8iyi€”J©A€qAð=úàÿ÷âø(ÑnçŒHz)úÑi(—Ðfç!(1Óaà!1Óa ðÔí °ð½ðµ/!ÿ7�°A7‘¹k*‘hX2’:’´2
+’`2	’€:’yJ’*ø2rN’,2,@6À4)’uÐ&Ü
+)sÐÜ‰qÐmJ€:Ri)2Ð)kÐ)jÑ˜ð
+ê ‹!C( ƒÑò÷éþ˜ÿ÷ªø(oÑÊà)Ð)üÐ)RÑçà)~ÐÜ)|Ð)òÐ)ðÐ)FÑrá")tÐ#)sÐ')?Ñ	™ qOà ¸a™‚OIbc€9 ƒ	i"R‘BÑKI€9a÷÷Aû� ÷÷7ûFI€9ˆiÉiCÐ˜(Ñ˜!ðVÿ˜ð¸é˜"d!ð¸é˜ð¸éàÿ÷”ø(	Ðxk(Ñ¸aæçðà
ázà<á,á ‹!C ƒú÷>û(Ð �¡‹ C¡ƒ:à˜z(Ñ™"áíà+H"hJ!ðfé(Ñ$H!€8i	ˆB Ñ ‹ÀÑ˜@Š(Ñðjà´àRàáž&Äð(×<';…üà(Ñ!˜"Iðõþ˜ðdéI˜"ðdé˜ðdéà ‹!C ƒ ‹(*Ñò÷9þ˜(Ð÷÷û(Ñà˜þ÷òÿ(Ð ò÷-þÆàˆüÃŒóHÃ˜:@óˆÀ¸™(ð¼ì ò÷þ²à ðb˜ð$éÿH@nðê¨à˜þ÷Çÿ(Ð˜ðé›à˜Š(Ñ˜!ð¨þ–à˜ð
+éðë
+šQee ‹Á×Ñ!C( ƒÑò÷áý˜þ÷¢ÿ(ÃÐ ò÷ÝýæI Èasàðj(ÐãHAkáH@i�BÑ !ðb˜Iðjþ˜ðÚèÜI˜"ðØè˜1à"’ØJ	à˜@Š(TÐ™"’	‰HCÏKÓH!d3ðÊêGàðj(ÕÑ˜þ÷cÿ(ÐÐ:à÷÷fú(Ð™ ‚˜ðDþ˜ð¦è˜"d!ð¦è˜ð¦è'à ò÷†ýºH!Áaà½H@x(Ðú÷çù!ÿ ú÷[ú	˜|(Ñ˜!ðþ˜ð‚è˜"d!ð€è˜ð‚è ð	úææ 
°ð½˜)(1øaà˜)1øa(ðöëïç™	z)ìÑžN$ôa°iCÐðbê
+šQeeta´a˜ðRèÁæµÿ÷ÄûÑðäþ(Ðþ÷,ÿ(Ð$ ½µ�L4ÿ÷�ù(Ñ xÀCÐ ½ ½pµ…L4ÿ÷ëÿ(Ñ(ðÖë!�@ xBÐ p½ p½µkF{HxryAr½xIµJk‚BÑ Hc ðqÿ½rIµJk‚BÑ cHc ð©ý ðbÿ½øµ”%+"ðZé;°«AiAø½|µ
hFðxøš›«AÒ™˜|½ |½µ÷÷{ù(Ð^Hi@i�BÑ\H"h!ðªï(ÑðÖú(
Ñð�ú(	ÑðŒú(ÑSHx(Ñ ½ ½GIµJk‚BÑ Hcðø½pµÿ÷Íÿ(?ÑIHðféGH!ðféDH!ð`é(„B/ÑBHðVé@H!ðVé=H!ðPé(„BÑ;HðFé9H!ðFé6H!ð@é(„BÑ4Hð6é'DÝÙ$ÛÈHN12H!ð6é/H!ð0é(„BÐ L n(Ñày(Ñ ðÁþp½ õ÷=þày%I@àqÿ õ0þ÷wýp½µÿ÷fú(	Ð÷÷Àø(ÑðLéJ€2Ñ`�`½ µð þ½÷µ
÷÷­ø(hÑÿ÷Kú(dÐðÊø(`ÐH'ˆH€0àÈÂH¸ˆÇŒó €ˆÀ`d ”0¡Ú`óýL)Ð!n)6ÑúH€0Aiiy@C/Ð÷H€00È‹A(Òù÷Ÿý($Ð-Ð˜!ÿ÷"ú
àïH"hF!ðÂî(Ð  pà ð?þÿ÷ø(Ñ -Ð .àpÐ.Ð'bð”þþ½ j@ bþ½ðµ.ÿ6 A6…°�°k�h*4'42 4$(Ð
+Ü€À5(8Ð(Ð(=Ñ hv8à%(Ð&(6Ñòa 'p÷÷øø÷Ïÿù÷oú§pàgp!àði�BÑ(þ÷fþà÷÷ø(Ñ gp pö÷ôÿð•ø"!’‘˜!#ö÷Fþñi(ðêàov¶H"h@!õ÷ü˜(ä‘ûçþµ% ÿ5A5�¨k�h&À6!(nÐÜ€cÐ(Ð(BÐ"(eÐfà"ÿ2i2'47$(’:Ð%(Ð&(
+Ð((XÑœHAjIAbQàõ÷’ý¨bGàø÷lÿù÷ú ÿ0%0ð2î ðÁÿ ÿ0a0!pö÷”ÿ˜õ÷£ýèi¸BÐ!˜"	ð§û °p9 ïað¢éà pv!à 0v˜õ÷Šýèi¸BÑ ö÷rÿ þ÷×ýàp~(Ð	 ð_ýéi ð†éà pvuH"h@!õ÷˜û˜þ½‘ûçðµ)ÿ1A1Œk
++h|3iO‰°)“ÐÜ)uÐÜ‰7Ð)+Ð)oÑ(þ÷¢ý!"	 ðSû)41^à)æÐ)äÐ)]Ñá#)ûÐ	Ü,&€4)~Ð)Ð)OÑôà")xÐ#)JÑ˜) 1Ða@àþ÷ãûþ÷Ùûøm@øe
+ øqÜàù÷nùÞàGH"h!ðrí(Ðø÷Áþ'à k(Ñ?Iàj€1(
ÑÃi‚i lál€™AÓ8H€0†aÆa&cæbøk(�1ðÔ ß›’�]Ñø÷¥þþcðvïùg¸g¢kãk€™AÒ8n(Ð™(ððè¦àŒà¥àºo kûoák€™A¸eò÷;ú� k(&Ð%I¸mˆB"Ó$I‘	ˆ‰�BÓþ÷Šþ(Ñ¹ixlˆBÑÿ÷üü(Ðxy(
Ñøy(
+ÐàmàvàH"hF!ðí(Ð˜ò÷ú 8c ðËú¸mIþ÷Cû¾a~d_àHˆ(ÐH!ðØî(Ð˜ò÷÷ù¥çÈÂˆÀüÈ|`óõÙLõäþH¢k€kãk³A�“¾a ~dð€þð„è˜"’ˆ}"ƒôHÒh0	¨ø÷Sÿ(˜Ñò÷Ãùð^ïoçò÷¾ùàëL ÿ(ÁÐéHªhõ÷�ùÿ  w_çãb8k(Ñ>cþ÷öúÿ÷ýàÀ5+v 	°ð½ðµ)ÿ1A1
+‰k‡°‘h.,ˆ6€4)~Ð~ÜÖJ)’i{Ð{Ü‰zÐ)yÑõ÷ìû(ÿ0ÌNa0y'€6)Ðq(þ÷×ú0ˆ(hÐÈH'Ga‡aÇaGd‡q€1Çp�`Ï`aOa‡pGpfð~î¿J€2Â2ˆÿ÷tü c�ác·H‘€o}#¸IÛXC€1É9€šYA›€™AÓ0ˆ¢k€ãkÁ€YAác cªH}'€oÿGC«Hák€0È‘ k�€™AÀ#¥O™A¥I¸eˆB�
Ò0ˆš€›Á€YAác c0ˆ�˜¸e›HœI€mþ÷NúàÇàoàÎà`àŒàÉàŽà�H}#ÀoÛXC"mcm�O!€YA€7:h{h€™AÒyh8hae e ø÷èü‡H�kI�c!Ác2ˆák kÿ÷üùa¸a&ãk¢kq@p@cdC"dÐ  càj(
+Ñºi lûiál€™AÓ¾aþa&cæb"˜ðiùà5(z(Ñ.r˜ú÷âø(Ð!˜Éðƒüþ÷úü(Ð˜!þ÷þþ õ÷§úià)/Ð)fÑþ÷óùaHnIf�iAd?à)BÐÜ)WÐ)VÑZL y(QÑõ÷ïú(MÑ qþ÷Ñü(HÐàx=à")AÐ#)CÑ(|0) 1Ða àNHBdþ÷Èù7àKL*4Ð`i(1Ð y(.Ñÿ÷©û(*Ñù÷.ú(&Ð y(#Ñþ÷±ù`m@Z}x÷ã³à`e i`d1(ðïàþ÷œü(Ðù÷ú(Ñ7HAi)Ð!Áp€y(éÑà àbà À5(v °ð½(þ÷'û!˜"	ðØø)41Ôçµ"	hÿ2A2‰Ð)ÑØ ](Ð ˆ0!”1ÐaàI ˆrH"h!ð
+ë(Ð!|1à!p1 ð°î ½µHðùIH41ð°îH"�H’’Jø0#¡ðë"d ’’�JH#¡ðúê½àò@!øÈÈÂˆßÙˆÀˆ¸AìSleepConfirmTmr!éNullPktDoneTmr¬pµ�HA‹IAƒðeù(Ð1(ðDþ	!@"@,Ð(Ð!(#ð°úp½€Hµhõ÷zø|IŒ948ðFî{H!Aa�aÁa!��½xHµÁx‚x	CÐ)ÙuJ‘BÓtJ`Axx	CnJÐ‘�Áy„yoI#C‚A{{	CmK€mI	x)	ÑÁzƒzC(Ñ à p½pµ^M)iŒBÑ*Ð!ðû,ap½|µö÷Îû$ðnü"’1(#”ö÷ ú|½pµÿ0A0…k ðÝûKI dfˆcˆdÈdeˆqö÷´û(Ñ!(ÿ÷Ôÿð@ì€4 dadae e ðÔí!"	(ÿ÷·ÿp½µ:I dfˆcˆdÈdeˆq ÿ0A0€k!ÿ÷±ÿðì€4 dadae e½pµ3J!ð¨í 1J!40ð¢í @0/J!ðší 0,J!ð”í *J10ðŽí (J1(0ðˆí &J)L0ð‚í $J)X0ð|í "J)d0ðví  J1”0ðpí J1 0ðjí J)p0ðdí J)|0ð^í J)ˆ0ðXíp½H€ÃÈÂNõýÿtÃ`ó’ÃôÈ‹ÈÁÌ7ÎgÉéÊ÷É;ÏÑ‰Õ7Ý�Ü9ÞŸà{ã µð¨þ½ µð£þ½ µðžþ½ÿHø´œsçàÙËŒhpGþHµˆ(Ðþ÷µú(Ñþ÷›ú(Ð ½ ½õHh(Ñ pG pGµÿ÷Üÿ(Ðÿ÷ñÿ(Ð ½ ½µÿ÷Åÿ(Ðÿ÷äÿ(Ð ½ ½µåH$!qäH�h
‘C�`ãHô÷wøâIÈiÊCÈaø÷Öù ½pµÿ!ÞMØHõ1)€&
+!€„‚  p fp p æp qfqðÌì q
+àq  r `r  r àr(ˆ s
+`sÍHpp½øµø÷úøËH%€ËHÃLpÊH€ÊH`ÿ Z0 cô÷kùÈI@Z `!er!bec}#¥bÛåbãa!c!q2&á€ÀHæ` aÀH`�aq%f¿H"ef€2`a±O 8U`Ç�F�…�E‚�‚€ãg¡gÿ÷þý÷6þÿ÷–ÿÿ÷~ÿ ø½¢I±Hµˆa H"!0ô÷mþÿ÷–ýý÷+þÿ÷ªÿ½µÿ÷"ÿ(Ð ðÂýü÷Ãþ"!à£H"!ð0ì½ñµñ÷~ý�Nun4nš! ðFì)C Cqf0f8ñ÷sý#) Y@X@C
+Ñÿ÷öþ(Ð ð–ý!‰ð,ùø½ ×ç{IÊi�BÑ Èa ÏçpGµvLàiðTé àa½øµ}$äñ÷Býÿ÷ïÿI 
+hX1ŠBÐ (ÐlI`1.Ð‹‰+ÑK‰‰(Ð"’bKbCsH!3ðFê(ñ÷"ýø½_H!`0uÍçZHµÀi(
+ÑYH"VK`0’Â‰fH!3ð,ê½QIµÉi)Ñ"NK’_H3ðê½LH`0}ªçHHÀi(Ð pGÿµ…°%ÿ÷wþÿ÷yþQI(Ð
+hX0‚BÑ à � ,�ÑIH	h40�B)Ðþ÷+ù(Ðþ÷ù(#Ñ,!Ññ÷Âü.ÑðÞé>J€2Ñd�d ÿ÷5ÿþ÷�ÿ(
+Ñ;M/Ñ à˜!õ÷?ÿ (p ñ÷©ü	°ð½˜3I C‘wÐ ,Ñ-Ià1	z)Ð *IšÀ1*‘Ð™Ïb™u91CÑ%_à%(\Ð.Ð	 à /Ð!à!C‘ù÷0ù(GÐHhðÈï!C˜ù÷1ù(<Ñ˜ù÷û(7Ñ+àÉÌ2²ë¶¾8hÃLõàò€(€ˆ!€’ÃÈÂ ÃŒÃ�Ã”Ã¾ Nƒ
+0õˆ%éÍÂ@ó”Â,�Ñ%,Ñ˜Ábà,Ñ¼I È`˜(Ð,Ñ™˜‚-Ñuç(ÿ÷–þqçpµ³Hhy(Ð±H²Ih	hC±I	hC/Ñþ÷cø(+Ñþ÷Iø('Ñþ÷Åþÿ÷�ýªL(!Ðÿ÷©ý(Ðù÷­ø(Ñÿ÷�ý(Ð£Hh(Ð¢Hˆ(
Ð¡Hˆ(	Ðô÷åø`‹!@`ƒ(ð¦ÿp½`‹"@`ƒ(#ÿ÷ßþp½
+ Gæpµö÷Ûÿ(FÑ“H“IÀhˆB?Ðÿ÷qý(5Ð%ÿ÷Iý$(Ð ðèûü÷éüh!@0‚BÐ!p½ÿ÷<ý(ÐI~JÀ9	h h:‘BÐ (
+ÑyJ€2Òj*ÐwJ \:‘BÐ tJD:‘BÐ$C%(p½jHz(Ð(Ñ p½ p½µù÷3ø(Ñ,ÑðŠú(Ð ½ÿ÷¢ÿ½fI	h)	ÑbIeJ	ˆxCÐ
+(Ð(Ñ pG ÜçYH 0zpGWI 1
+z*ÑXJRh*ÐrpGpµÿ÷Üü$(Ðý÷ ÿMMÀ=(Ñý÷„ÿ(ÐII *hD9àGI*h h9ŠBÐ p½ÿ÷»ü(Ð ð[ûü÷\üh!@0‚BÐ!p½ p½pGµ ðJû(
+Ð@zÀÕÿ÷£ü(Ðý÷/ý°½"!¨ðÄéÐ ÿ÷©ÿ"’1J!¨à ÿ÷ ÿ"’ø÷}øâç'HiÁ`pGøµ$ðú MðÕ(ˆ!ˆC(€ÿ÷jü(Ñ$°€&(
Ð8ü÷	ü)ˆ"‘C)€€ÿ÷�ü(Ð$(ˆ1!	BÑH€H` ø½
I`pGIH`pG
+Iˆ`pGŒóìÈäÂàÂÜÂHôÃLõ ÃhÃÿÿŒÃˆ”ÃþHˆ(ÐýI ˆ` pGûH€hpGµ ð…ÿ(Ñ ð7øay)Ð"y*ÑbzÒ.Õ(Ðÿ0a0@('Ð y($Ð)Ñÿ÷÷û(Ðÿ ÒsM™ïGlmT~0](Ñ`zÀ	Õ`y(Ð y(ÑàHˆÀÕñ÷PúßI
+x*Ñ"
+pñ÷Mú ÿ÷Äü½ñ÷Gú½µÖL i(ÐðDî  a½8µÿ÷Äû(ÐÍHˆ€€Ðÿ÷éÿ"ÊH’Àˆ}"ÒÈKBCÉH!3ðBï8½µðû(Ð ½8µ
¿LáhˆBÑ à`ÿ÷ïÿ( xÐ(Ñð ù(Ñö÷þ(Ð"’`ˆ}"Ò²KBC´H)3ðï8½ ! pI(ðºý8½(üÐ(
+Ñÿ÷tû(Ð ðú!	ðªý  p8½µ¡Làh(ÐðÚí à`½pµñ÷Êù›L x(Ð(Ðÿ÷êÿ  p(ñ÷Áùp½øµñ÷·ù‘L!x)Ð)Ð)Ð)Ð)Ð)
Ðÿ÷Ïÿ"’`ˆ}"ÒBC#ˆH13ðÀî(ñ÷œùø½pµñ÷’ùL x(Ñÿ÷oÿ(Ð  p(ÿ÷Éÿ0ñ÷†ùp½µñ÷}ùÿ÷£ÿsIx(Ð(Ñ à p ñ÷rù½µÿ÷ÿú(ÐmH	àÿ÷ôú(Ð ð”ùü÷•út0ðrì
+ ÿ÷Õû½øµEi_N °`ý÷§ú[O8ˆ(Ðÿ÷çú(Ð0x(Ð(?Ñ[H"hF!ð4ì('Ñø÷Ûù(#Ñ8ˆ'(Ðhy(Ð)y)ÑizÉÔ(	Ñÿ÷ìú(Ð	 ÿ÷�ûKHp2à0x(ÑHH!p ‰0p(%à8ˆ(Ð ÿ÷žÿ0x(Ñ 0pà(Ñ ùç(Ð(Ðÿ÷Þþ(
+Ð0x(Ñÿ÷×þ(Ðÿ÷�ú(Ð!`i	ð¸ü ø½µÿ÷¬ú(Ñ%H&Iˆ(Ð+Hˆ(Ð Hp
+àx(Ð(Ñÿ÷Šú(Ñÿ÷´û ½pµ‰Di
(ð–ï(Ðÿ÷]ú(
+ÐHx(Ð(Ñ!‰ ð€üÿ÷Dú(Ñÿ÷;ú(Ðÿ÷Zú(Ð ÿ÷û(ðxï(Ð	H"h!ð�ëp½LõŒÃôÈÉî­ï€ˆÀ)Î`óHµh(ÑH"hF!ðrë(ÑI
+x*Ðp àI
+x*Ðp ÿ÷æú½µé^Qóø©HçL ˆ(Ðø÷ý(Ðø÷ý  €½Hˆ(ÐHAx)Ñ!AppGHAx)Ñ!AppG(ÃˆÀÉÂÊÂŒÃLõ#YC	ð1	| )Ò pGøµ#YCð4 |(Ò@ t`h `¦hf`¢`%h¨€!ð®î©É)	ØñÉ)ØyÉ)Øà`ø½®BÚæ`àå`áh hˆBôÛø½ "µAŒ@!	‹BÓ@
+(óÙ
+ ½0µ%Dh•@h¬BÚYdÀ0½AQ`0½
+µAh)	Ð#“@h™BÚðhî½A½a ÀC½øµš’ ðvü'Ðù~ )Ó ˜)hh"„F ÿ0-0ÿ÷Àÿ/Ð "ÿ050aFà ÿ0"=0aFÿ÷±ÿÿ u0[ ÿ0e0aFÿ÷¨ÿ0ø½µª’ª«ðBü!"À1Jb#ì"(UÐ˜H�˜�˜ˆ� ðáùø÷5ü(	ÐúHhðÌê ø÷7ü(Ð ù÷äø ù÷žú½pµ
("Ð&"®WªV! ÿ÷*ÿ! ð,ü ÿ0"E0ÿ÷_ÿè~(Ò "1ÿ0M0à ÿ0"1U0ÿ÷Oÿp½!ÿ0-0Zçÿ!u1	Zÿ0e0Tçÿ!w1	Zÿ0m0Nçpµÿ÷öÿ(ÿ÷èÿ p½pµÿ0!50ÿ÷>ÿ ÿ÷Ûÿ(p½pµÿ0!=0ÿ÷1ÿ ÿ÷Îÿ(p½ÿ1A1	h )Ú pGpµÿ÷Ãÿ(ÿ÷»ÿ p½µÿ0@!ðüé ÿ0!E0
+ÀÀÄ½À1"J‚a"ÒCÊ�ÿ0
+‚e0!
+ÀpGµ!À0��a!ÉC�A�¨H"¥¡ð
+ê ÿ0!m0
+À ð%ù½pµð÷ºþ ð0!ðÂé ð"ù(ð÷³þp½pµð÷©þ(ÿ÷çÿ(ÿ÷Ìÿ(ÿ÷»ÿ ð÷¡þp½µÿ0!a0Á‚�‚ ÿ00!ðœé ÿ0!]0
+À ÿ÷�ÿ ÿ0!e0
+ÀÀ ðìø½ÿ1I‰k )Ú pGpµÿ0@‚lAlcÁbmÂlšÌ…é÷«s›‹Bc�cƒmBmd)ÂcÑ !ÿ0U0à ÿ0!M0ÿ÷vþ%À5h�(!¬0
+À ð¯ø(!„0ÿ÷fþ(�i‰¨� ÿ÷Gÿp½)	Ðy)Ð"À1Jb!à0spG"À1Jb!à0spG
+À2µj™BÑ!bðóÿ½PHhI`½þµ �ð–ù4À4�`j7à7(Ð `bLà j5€5(Ñ  bðØì?à0ðØì(4ÐðÐìªmëm€™A™ð~ê(�.Ù¨ð°úkFz!
+ ðïû5@5¨}(ÐkFzˆBØ.I"xCp0ù÷
+úkFh}zˆBØ 8s"0ù÷Áüà˜ªmëm!€YAée¨e  b"’Hš;1ðÔêþ½µy(Ð À0jð¬é !Ø0ð¬è ÿ÷†ÿ½ÿ!w1µ
+ZÊ#^ÿ0m0ÿ÷¡ý½ÿ1"-1Áÿ0Áe0ÁÀpG”ÂV!¤Ã|Î‰÷|µ#ðšëkF"1hFÜ€ð¦è"(iFù÷`ü|½pµ$ð>ì(Ð 4àHx(Ð"1(ð4ì1(ð,ì 3J1(ð,ì p½¥!H‰µðtèH@!ðpèI p½¥!
H‰µðfèI p½
+I
+ `
+IH`	IH`
+IH`
+I	H`pGò÷^õØ:Ü:à:ì:!.ä:Å>è:‘BÙbK€P:P pGøµ
$ð÷ðü�0ðÞëXKYN? ;¨BÑ�qXà‚±XšX‘BØ	@$(ìÓLJ©RXqX8Q�BØ˜$ð÷Èü ø½EJi‘BÑBIÀ{1\9€
+XR
+P pGÿµ�°$;H†BÐš90ðÞï°ð½ð÷ ü�)0ÿ÷¥ÿ(Ðš90ðÎïÐ-Ià{1
T¨9
+XR
+P`{!C`s(H a˜ð÷…ü Ùç#IÀ{1\pGþµ �I iˆBÐ þ½Há{0F\¾B2—Ú~û_î?Ñ þ½ð÷dü�HJ½AYRY‘BÒI¶9€Y‰YˆBØ i9ÿ÷[ÿ(ÐI �ˆY(Ñþç@ˆQHâ{0‡THY@HQ˜ð÷Aü˜þ½Ø°2dUúpGøµ"ÿHðbïÐ ‰!(ð^ï)0ðŽï)8ðŠï÷H"j!#ó÷Ãü(Ð ðï ø½ðHµ@jó÷èü½µ@iÿ÷Eú ½pµÑéLçM(x()ÐðPûþ÷ºý(Ðèh !� 0AxxáIC@Ð(Ð(Ð(Ñ ðüû÷=þéh"H{ÙKCHsŒah"ðh# G (pp½Bxx
+CÎI*ÑÂxƒxCH�H‰pGÍHµhó÷”ûËHhó÷�ûÊHhó÷Œû½µð¦øðžê½µ$ÿ÷cùÄHx)Ñ!p þ÷þ$ ð±ù(Ð½Hh(Ñ à 
ðOü ½þµ �þ÷ý(Ð ðµû ð~øÑ ð0ùþ÷	ý­O(Ð8ˆÀÔ`zÀÕpy1yC(Ù§IˆBÒþ÷úü(Ð`zÀÕþ÷éü(FÐ8ˆ€€BÐð÷Pû�py1yCÐ›I`ðy±yCÐ˜I€ðx±xCÐ–I€�N0x(#Ñþ÷Êü(Ð`zÀ	Õ8ˆÀÕ-Ðÿ5a5h(Ñþ÷´ü(Ð8ˆ€€
+Ðÿ4a4`(Ñ 0pþ÷ý �˜ð÷û˜þ½!(Ðæ(Ðk(Ð+(
+Ð,(ÐP(Ðç(Ð$(Ð±(Ð!pGfHµ@j!ó÷Íû(Ñ ½ ½ðµq!É_H�°�kHÒ1‘"9‘�9‘hIÎ0‘�ð©þfHð"è‰	Hx
+xCBR’Êx‹xC94±(‘ÐÜo(ÐÜ+(Ð,(Ð@(Ñà©(Ðª(Ð¯(Ñ
àÏ(ÐÜ²(Ðµ(ÐÎ(ÑàÐ(ÐÙ(Ñ à (Ðÿ÷£ÿ(kÐ 6IHp �	� �CHð¢î�‰
•@i�˜ð~é(Ð ð¼ú(Ñþ÷ü(Ð ð¬ú,Ñ˜÷(Ñ#x!š‘’‘´Ü ÿÆ=Shy	àhy		ð™øèçoy>	.Ñ#à.Ñ#à#š!’:‘‘1#ðPû˜OFaà ó÷)úIH"ðtí(ø`ôÐH !ÀhJ�A‘bFa‘èx©x(àúãX¨ÃÏû2ÿÿ@ÁÌÀøÈXÄôÈÄLõýÿtÃˆÃÔÂ€ `ó¨lÐ
+C™˜ò÷HùüH'p@i(Ñ˜ª(Ðö÷dÿ÷H÷IGaÈh"CÈ` �˜À Ñ˜ÿ÷Õþ(Ð˜!ÉC(p
+hp ¨q èqèx©x
+C™˜ò÷ù˜ðÐì!0ÿ÷Èýð¡ýþ÷ëÿ›ƒ+Ñð$û~Ü@+}Ð}Ü+|ÐJÜ+ÑðHý3Ü
++uÐ$Ü+sÐ+ÐðqýÔH`0y(	Ñpy(Ð @0z)Ðr˜!"0ðŽè(sÐ �ðèøð9ý+ÑðBù+ØÑ¿I 	ð€èÈç;
++ÏÒ[{D›ˆ[ŸD/=
=
=
p=
=
m��(+pÐÜ;	+ºÒ[{D›ˆ[ŸD6(
(
(
¤(
¤.+ÑðùÜ++~Ð,+£Ñ 
ðú™ ð¸ì¤H€k¤I `)0ðDèSâåàðãàïããƒâ6+Ñðÿø7+†Ñ À0j2! ð2èrçm+~Ð~Ü]+Ñð±ù'ÜN+ÑðúÐâ
+ÜE+ÑðAùM+ŽÑ!0ð3ùîàP+gÐ[+…Ñ`x!xCÑðŽù(Ðð”üš¡0	ðûúð‹üââh+qÐRÜ^+ÑðDùf+žÑ`x!xC(uÑàx¡xCÐtHÁh¹BÐÇ`sH9ðlípIa9oHd1ðdílIàøãHa`y!yCÐhIˆc z(ÐeI@Hq`z(ÐbJ@y�BÐqày¡yCÐ]I`àz¡zCÐYIÈ€þ÷ú¨q
+àñãà]âð�ùk+Ñðfùl+†Ñ ¨p èp!x ð ïéxªx	C@ðÉûu+ÑðpùÜn;+ÓØæþã[{D›ˆ[ŸD	4	9		EE«x+Ñð…ùîã+jÐ�+ÑÇ„ëü�;zð,ù‚+äÑ`x!xC(Ððú˜(Ððú 	ðø�ðúÎ+Ñð‡û~Üª+ÑðuúzÜ”+ÑðDú*Ü�+Ñð%ùÜˆ+Ñð'úŠ+·Ñ!J r2“’:‘ðDï}æ�+pÐ“+©Ñ`x!x"C(Ððú’!Hhðë(éÐçš+Ñððø#Ü–+Ñð!ú—+ŒÑ xd(Úaðï`ð ï
+0uç÷ã¨Ã§€(Ä¨€Äàò@BˆÀ¤+qÐ©+„Ñ(y�hy"		‘!ÿHhðÜê˜ðäêüMèhðàêðýðÓü(Ð— à;à	àöI}'€õI?€õI`ðCú²+uÐÜ­;+Óæêã[{D›ˆ[ŸD‘	·ñ¿ÒÅ+Ñð_úÜ³+sÐµ+êÑ)0ð¹ÿâàÇ+kÐÍ+áÑ`x!xC(ÐðËú!0	ðÕþàåê+hÐ[ÜÝ+ÑðIú7ÜÑ+sÐÜÏ+ÑðÇúÐ+ÃÑ™ 	ðþBàðãÖ+Ñð;úÙ+·Ñ`x!xC(Ðð[ú ðÌúðþ0ÿ0™0ðì0ðqúðiûÁI0ðzîÀHx q
+`qðVúä+xÐÜß+Ñð”úyàã+ŠÑ™ õ÷ãú0¶æå+iÐé+”Ñš!0	ðþ(Ð7æyàáLà÷+ÑðšúÜí+oÐÜë+Ðì+†Ñ)0ðßýþãò+Ñð­øô+™Ñè|	(…Ñ)0ðÄýbåðãû+Ñð’úÿ;›Ñð|ú+QÐþ+�Ñ ¨p èp ðýmæ! ðî ðî±çhz)zC(Ñ)0ðúÇç)0ðõüÂç �Zå)0ðùÿ(Ð(~Ð(ÑðXúôãôã(›Ñð1þà)0ð=ÿ(Ð(�Ñíç �êç)0ð'ÿ(�ÖÐ
+åîá)0ð&ø’ç!0ú÷'ú $æðQý "0ðìé˜ðêÀx�‰’‘BÑ€Ô8
+'tàð¼í(Ñ à  t
+`t@  q àq˜ðäé 0AxxC s
+àsð¦í!1ðîé 
�ð¢í(Ð 
�˜ðÌéÀx€¸òBŒø]Jè€��ðgø
š’š; ð�í˜�yà�âByC p
+àp  p `p<H 4xàr
+ s
+ `s  s”ä7I `CåpzÀÔ#"!0ð¡ø2H!†c˜0ðdí(Ð äùã,å ¨p èp!0ð\í‘å0ð'ýõ÷Óû˜	:ÃÛ ðNí_ä0!x 0Auax�u0ðmüð€ûðûðúìOä`x"x™C(sÑàx¡xC	(#Ð
+(1Ð(7ÑI y	hÈa y(0Ð0ð˜ÿ,àˆÀ¨ÃLõ Ã”Ãh,Î(ÄÈìÈpz¡y@É@ÉCprø÷Áû"0ø÷*ûà yqzý"À@€Cqr0áx¢x	C)Ð)Ð)Ð)ÑûIÉˆ)ÐáˆùJ‘BÒ¢y 1
+pâyJp
à¢y€1ŠwâyÊwà¢y¢!
+Tà¢y£!
+TÂy�yð‰ü(ÐÑäÿç(ûÑ‰¤'‘vàxx9xC("Ð
+Ü(Ð(Ð("Ð(7Ñ£ €]à	(%Ð
+('Ð(Ð"(,Ñò÷û"©�Hà• €]à0€0�!qÀà0 0x!q@x`q;à¢ €] q7àÍHhÀiùç§à+ápzÀÀóç!yrzII’ÒC!q$à9)Ù!ÉC:
*ØQ‘IÐ0ðÍû(Ð!0
ð»ø À™0€j‰Aøx»xC ðXèøx¹xC™?		Ç<‘˜(…ÜÓä`x!xC(Ñaˆ"Ò`h‰`Æä`ˆ!É@h``¿ä`x!xC(Ñ!y`ˆðfê´ä`ˆðZêþãñ÷�ÿ`x!xC(Ñ!y`ˆð2êà#à`ˆð(ê qñ÷ªÿ›äò÷ïø`x!xC(Ñ!y`ˆò÷øà`ˆò÷&ø qò÷Ôø‡ä˜!0ðòë�æÊà ðrý™ ðè|H€k|I `)0ðäë·å0ðäë(“Ðþ÷YúvH$€uH`ÿ÷ëøtHyIIq0ðÔë™ ðøïkH`0à1à	à 0�}ß"@�u0zû!@0r�ågO}"øh p
+àpþ»ùºô
+©%�¢¸k q
+`qxyÒ@ r8y@`r8h q
+àqøˆ�ùj¸jðöé{k:kðÚèš#ðÖè r
+àrä`x!xC(!Ñàx¡xCÿ(ÐOJ!pàMHp
+ ™H€˜9@ˆ(Ð!šˆ*Ð'¹BÐ' ý÷–þ“ä™òãAHx(Ðÿ à˜ˆ p
+àp…ä`x!xC()Ñàx¡xC˜Ð™8CwàáA˜Iw˜ÀÐö÷rùhäðú(ÐðFë(Ñô÷ùö÷îú[ä˜™8Cw±ä$HÀŽ@@Æçï÷åû
+�`x!x`yC!yàx
+C§x9C ð&ë
+˜wààx¡xC(Ñ ¤ä('Ñ`x!xC(õÑ`y"yC ðë 
+ðvþ‘ä¨ÃîìÈ¨€Ä Ã”Ã@¦€àòÌÂ� (Ñ`x!xC(ËÑ`y!yC¡ðìê(¢Ðï÷Žû1à©à(1Ñ`x!xCÑ ©ðÞê�˜ q
+`qhx)xC!ÉC(p
+kFhpŽ¨q
+èq˜%àï÷iû`x!x`yC!y
+CÿI ð®ê8ï÷^û?ä(üÑ`x!xC(Ñ ò÷£ùïã(…Ñ ò÷�ù(³Ð0Žä`x!xC(Ñàx¡xC!ø÷søpzÀÕ¨ð’ê˜{ÁzC p
+àpàùãàkF}�X}‰÷÷èÿkF`q}"�X}‰÷÷ãÿà  pàp ðé`q! ðé q Oä`x!xC(Ñ!0ð´ü(Ñ— ðý0=ä0ª©ð~ý
+ ¨p kFèp~ p}ïã‡áµâ ˆ(-Ñ0ÿ0a0�‡ŠÀŠ¤�`x!xCÐþ÷Ïú™ˆ‚àx¡xCÐþ÷Æú™È‚& ¨p èp˜€Š¸BÐ0þ÷Öû˜™ÀŠˆB~Ð0þ÷Üûfä2ÿ2a2“Š9™@¡p	
+ápÑŠ& �@9
+'qaq¨p ¤èp žI"0ðÚí7À7ø‰ p
+àp8Š p
+`p0þ÷Rû
+ qb0aqÑ¸Š q
+`q8‰ r
+àrx‰ r
+`r0þ÷Bû s
+G%sðúÿNÎ`s0þ÷2û
+ qáq
+ sb0ás²ÑøŠ q
+áq s
+àsä ¨p èp0À0!�A^õ÷’ú p
+àp˜!A^õ÷–ú p
+`p0þ÷ûõ÷�ú q
+àq0þ÷
ûõ÷†ú qàTâðã
+`qpy(Ð(ÎÑpzÀËÔ;æeH"xÃi`xn3C ªð„é(½Ñ`x!xC(Ð(OÐ(³Ñàx¡xCVIˆB{Ñ˜ðbíÀx‰‰ØÕ€ÖÕðhéPHÀi`0tGtmäàx¡xCIIˆBÑ˜ðHíÀx€€¿ÕðVéEHÀi`0�{à@AH$Ài`0�@|(®Ñ˜ð0íÀx�‰Ô€ B£Ñ˜„s™ t! ðŠÿ8äàx¡xC/IˆBÑ˜ðíÀx€ŒÕ,Lài`0|(†Ððéài`0°ç@˜$ðíÀx�Ô€€ BÄÑ O!øi`0Äs ð\ÿðéøi!`0Atäÿç@˜$ðâìÀx�Ô�‰¡B§Ñ�‰Ô€ B ÑO!øi`0Äs ð8ÿøi!`0AtðÞèøi!`0„s ð+ÿøi!`0tXäÿÿV!¤”`x!xCpÐ(HÐþ(mÐÿ(‰Ñ˜ùLÂx�xC!ˆJ@@’‚’ÐŠ’Ð"@@ˆB—Ñèx©xC8™	0ð>ú(~Ð˜!ˆÂxƒxCC!€˜€€
+Ð0ú÷Vú˜ÂxƒxC
+
+€˜ÀÐðú(Ð àØH�˜ˆ(¡Ñö÷rýÕH@x(›Ð"!ñâ ÒIp˜1!	B�Ðhx)xC!ÉC¤(p
+kFhpŽàÊâ“àJà¨q
+èqèx©x
+C™˜ñ÷"ø ð×ý(Ñ ð‰þ1y)Ð)	Ñ(Ðÿ0a0@(Ñ0ð?ø`x!xCkFX�àx¡xC˜�`y!yCØ�ày¡yCà`á‚`z!zCX‚ 	�˜ð¤ëý÷\þ™ª¨þ÷ýEà˜Áx€xC›Hˆ@àÐý÷ÿ—HˆII€1 B�Ðhx)xC!ÉC(p
+kFhpŽ¨qÜÿ
AìE:k}
+èqèx©x
+C™˜ð÷¶ÿ!0ý÷ý 	�˜ðfë0ðMý(Ð0ðwÿ	!É@‡c,ÏÐþ÷©ü�äãyH™ˆˆp
+Èp™0	ðÆù3áL ¨p èp!0ðÒûÏã! ð¨ëÊã]à À0Bj!2þ÷ÿ`x!xC(!Ð(ÓÑ˜ˆ(ÏÑö÷Žüax"xC(ÇÑ �ðnë@2Ð_H™"ðNë]Hˆ(Ð™ 09	àû÷aü(áÑWH€Þç™ ‰		ö÷zýö÷SüPL  VAžÐ�œÐ!ðìMJÐj!y�@8CÐb y!ðVïtã EIÀCðLëö÷@üCI €iãö÷Büfã`x!xC(Ñàx¡xCÑÿ÷÷û(Ð(vÑ9Ip
+ðIú
+ð[ú7H"h	!ð®ê.I rEã1Hxÿ÷Œû À7`x!xC(%Ñèx©xC™B¡0ðòþðýxj1Ð€|ÀÐð‰üð‚îHˆ(§Ðý÷ù(£Ð0zÀ Ð0ý÷Gýã(´Ñ¡0ð/ÿþ÷oÿ¡0ðùþ÷Üþ ð“û.à!0ðû)àš!0ðšü(Ñÿ÷tøñâíâLõ-ñŒóŒÃ˜Â�Ã#€dÂˆÀÜâ™ ðûØâ ð.ûà ð5û(Ðþ÷ñÿËâ x(·Ñ›ax›¢0ð¦î@½âÿç�½â!0ö÷©ý(£Ñ8
+¯qèq³â ð¦úÿ !0Tâax xCÑ!0÷÷Mø0Iâ˜!0ö÷6ÿšâ`x!xC(Ñèx©xC8	 ðÝÿ‰âÅà(»Ñ ð	øÝç ���!ª¨«ð`î˜(§ÑúHhúI@�Ññ÷üàx¡xCkF�y0!ACóH	˜ÀBh*Ð©¨�Gà—˜(Ññ÷ü˜(ØÑ! kF‘V(Ðêx«xC¨p
+èp‘˜(‡Ñ`x!xCèx©xÑC8ØáC^ç`x!xC(0y
+Ñ(‰Ñàx¡x
+Cñy°yð
+îâ(£Ñ0ðî" ð¾é ¨p èp @Ï²¾™èà¸0À}Åæª’`x"x›C
+3¢0ðÚý(„Ñ`x!xCØÑ™"˜ÒCp	
+Apéxªx	C�p	
+Áp!�qÁq˜ðRéôà ðþ¨q
+à áâ(Ñ ð0þ¨q
+èq`y!yCÑ à0¨p
+èp  p`pÀá8
+¯qèqáç`x!xC(Ñ!y x
+ðÖø±á x
+ðÓø q¬á`x!x"C(Ñ!þ÷êý!à’!‘Hhðþè™á`x!xC(Ñ ðöý(Ñ1æŒá© ðZý‡á`x!xC(Ñàx¡xCÑñ÷5ûyá€Hh(Ð
+ðšøñ÷+ûpáñ÷*û)æý÷Vü ð�û(ÐAy)Ð!I@z)	Ð!r ð€ì ðJíðLí ðDíðJíhx)xC!ÉC(p
+kFhpŽ¨q
+èqèx©x
+C™˜ð÷íü˜ð¤è!0þ÷�ù �	�[Hðrê(úÑþ÷Õùõ÷ŠüWI HaWHÁh"‘CÁ`á ñ÷lýPH"9ð¸è(è`ôÐèh !�Fa 0¨b™"ÒCp	
+Ap™kF1�p	
+ÁpŽ�q	
+Áq™qAy"		Cš			CAq!0þ÷Tù"á˜ª�`x!xC!ð÷ý
+áš!0ðÖìæ`x!xC(Ñ–˜@zÀÕ˜!ð~ûà'˜Ây�yð$ü/�Ð—˜(èÑ"Hh ð¶ì4à{¡{C(0Qà(ÑHI@ˆˆBÓH	àIˆBÓHà}!ÉˆBÓH p
+àpàx¡xC�
+H"hL!ðîï?˜9ð€éxC=å!€ÄÀˆÀ,ÈÐ¨Ã§€”X¸ˆD ð'ü`à™ ð~ú(Ñdå ¨p
+èpTà™ ðûOà`x!xC(Ñàx¡xCúI`ðHû0ÿ0™0ðDé0ð²ÿóHh p
+àpòHˆ q
+`q-à"!x0ð÷þà`x!xCÑ þ÷¿ø p
+àp ¨p èp Uå`x!x"C(3Ñó�‰äâ�Í¥˜�PxxC0«ð
+ý(Ñ—˜(Ðhx)xC!ÉC(p
+kFhpŽ¨q
+èqèx©x
+C™˜ð÷›û	˜(Ð˜ðPï˜(Ð™ïæ(×Ñ0«ðÚü(Ñ—kF‹'å2!¨ðÐëkFŽC2æ»Hx(ÑºHðté(Ðþ÷Lù °ð½¶Iµ
+x*Ð"
+p³J
+!õ÷ºÿ ðÐê±H±Ih`½ðµ‡°'—ô÷Çÿ	ðŠù �õ÷üú¤KªJ_aÐh!ˆCÐ`jâ˜�‰
(ðLï(ðHï(Ñ˜Yâ!	BˆB~Ð0Ü(|ÐÜ(zÐ(yÑ˜þ÷ïø(	Ñ i@ a ñ÷»û!0ý÷žÿ;â€(hÐÁÿ9ú9èÑpy(Ð(wÑŒL!x)tÐ)Ð	)qÑˆKbˆ0õ÷»ÿ¤à…KÕšBgÐ%ÜQqÐƒJ‰ÊÑ}H|Jh`€I`ö÷øH@x(Ð~H"h!ð�îðòúðËÿ ðNêý÷vø(½Ñ0ÿ÷iÿIà!IiJÐ?"’‰¡Ñ0ö÷¥û(¬Ðü÷°ÿ(¨Ð0ö÷nÿ0ðë Õö÷Žÿ,šÚWJB!ààzá±áÌágá0#õ÷HÿÊá"^H’h"!«ñ÷üRHWIhˆBÑ0ÿ÷+ÿà<à1à5àWáJJ
+!0õ÷æþ ñ÷=ý0ý÷€ù¨áRáî÷7ûMINn
nfOfî÷5û$à9èÀy@CÐ ü÷�ýðdm$Cv$),¾Ò1(y@CèÑ„ábˆ0õ÷Æþà"!øç'pà ðÌû!0õ÷·þ0ý÷lùoáàh‰
˜‰Fi(y q`y±y	C`qñy			C`q`x"xC&Jˆ‘BXÐXÜ$Jˆ‘BÐJÜ#Jˆ‘BzÐÜ!H}Ð(|Ñ®à(zÐ(ùÑðÆÿð¾éàx¡x
+C!(ð÷ú!(ðbê½àŒ€¨Ã¨ŒÃòxÃtÃ§€žËÀðÿ ÀÿÿÿŒóˆÀHÍàòn€,€$€úÿÿ(1Ð4(/Ð5(-Ð6(µÑ*àU((ÐÜA(ÐC(#ÐD(!ÐG(©ÑÿH(pÎ]µà±UÉ
+hpày¡yC¨q
+èqrà`(Ðb(bÐ{(
Ð�(lÑ
+àðcû(Ð!ÿ ö÷�ÿ0ðÇûàx¡x
+C!(UààWà0à0ý÷RþRà"!(ð÷•ù ¨p èp(0� 	0ð˜í˜ðäééxªx	C@¨p
+èp0y(
+Ñpy(Ð @0z)Ð!rÔH`#à"!(ð÷hù ¨p èp(0ðÂéèxªxC¨p
+ÉIèp¶ç("!ð÷Pù(!0"1ð÷Iù!¨ç˜ðþìÀL"ài#©ñ÷¨ú(Ðíæèæ!0õ÷œýWàðnÿTà¸M(x(Ð(Ðî÷Þù(x(Ñ (p²J!0õ÷xýà(Ñ/p î÷Ñù9à¬Hˆ(5Ð x(ÑªHðï(Ñü÷]û(Ð ý÷Lø%à¡J!0õ÷Wýà¡Hh)Ñ�I	ˆ)ÐžI	ˆ)Ð`œH€ü÷ˆþ(Ñ ü÷Gþü÷ƒü ü÷üà0ðBé˜ð”ì‹L" jS©ñ÷=ú(öÐŠå>µð­ÿ(2ÑƒLŠHàa" ’"0#‡¡ñ÷ú„H"80 b ’" 0
+#…¡ñ÷ú†M‡H±")ðVé{H…I°8 a"„ kFÃ €I*0#ñ÷ù(Ñü÷¨û >½ >½µhL iñ÷(ùmH"8`b !$0ñ÷
ú½pµ@y
(Ñ ðgúp½-Ð
!à! õ÷Ûüï÷]ý(òÐ!-Ð! ï÷»üp½pµeLeI hˆBÑQHOJˆxCÐ(Ð(Ð p^J
+!(õ÷©ü]Hh `à!(õ÷®ü1(ý÷Èüp½Axx	CÊú:Ñ0AxxC(Ð pG7H@‰pG6Iˆj	x)ÐAxxC@@pG pGµ.Hƒjÿ÷ìÿä(	ÑXxxC(Ð! ý÷Æü½>I=H`?I=H`?I>H`@I>H`@I?H`AI?H`pG@HIIiÀÀ@BBÑ pG pGHµAx)Ð!Apý÷�ü½pµ4IJiS4JÓZƒp
+ÃpCyy+CrÑ#ƒq#ÃqKh[ÓZr
+Cr‹h[Sà€pÌÜ"™Ä›tµ€(Äç'À¨ÃŒÃ±îLõ¨ôÃ ÃäøCBProcSMEMsgQCBProcMsgQ¤D
+½CB ProctÃÿÿòxÃ‹*À(<Ã*À,<»*À0<;{4<EWÀ8<%5<<  ¤j ÀÓZƒr
+ÃrËh[ÓZs
+Cs	iIQZ�s	
+Ás!!€Ayy	C)
+Ñ !�q!ÁqDI0 "ðJë0  €p½pµ!?L@KBzzJ¢Z5C•BÑY`Åz†z-5C•BÑ™`E{{-5C•BÑÙ`Å{†{-5C•BÑaI)ÞÓðUý p½þµ �Hx	xC·!‰%g(Ð(Ñ y(/Ð(-Ð%!ÿ5˜1a5(‘	Ð(Ð%3à"9°ðöê-àh(ôÑ˜"±ðîê �à ð•ü(Ñ`y(Ñh(áÑ˜"±ðÚêà`zÀØÔ"±8ðÒê @ ‚x›9 
+ðù(þ½j À¤pµ$ÿMà@@hí÷eÿdà)X)öÑp½úH!!I�`�h"’C�`pGpµ$óMà@@hí÷Yÿdà)X)öÑp½ðµ%“°ð÷\üíN4iìO@78h(Ú ð÷¤ùéHÀk(ÐäI09ˆh@ˆ`@ ñ÷=ùxh@@x`àáH8`áI @áI	xÚOC0?yjCxbü÷Þø(Ðxj(ÑÚH"h!ðêyjCxbxj(ÑÔH"h!ðêyjCxbðÄîàÕÏH0a ÕÎHhI`ü÷9û(Ð ñ÷üøû÷Æú ÕÇH0a,Ú¿H%m0a Õ CÂH0aÂHa�}Õ ��ª©¨«õ÷5ø(�Ð C„CÀC0a˜0ðeû(�Ñ�™˜ð‚îü÷bø(Ð°I Èa¯I  @1`˜(~Ð˜ðší(zÐ˜y(!Ñ™)DÐ˜1ðÜü(>Ð™ ðê–HÀ8€k¸j(4ÑžHh@0Ð!˜‰ý÷fú ¸b 
+ðTÿ%à ðù�ü÷ø(Ð˜ø÷¾ÿ�ð¤ëšÿ2RµÏYùØ&ÊH’Ña�a™šKhhSbkFb‹1: ð,îš€x�bö÷•ùàÇàû÷/ù�˜Á~‘Áz
+‘Áy	‘ô÷cÿ™˜ð/ý˜™Áv
+™Ár	™Áqû÷ãÿ(uÐû÷ýÿ(qÐ˜(nÐ˜(kÑû÷Ðÿ(gÑà˜à‡àõ÷ôú(Ñû÷×ÿ(\Ðøi(ÐgHˆ(RÐfHˆ(NÐkF‹™:1 ðÜí˜ð´ü�_Hh(Ððné!C™B4ÑOH"h!ðé(,Ñ˜õ÷,þ('ÑTHðXé™B!ÑOHˆ(ÐPI˜BÑkF‹™˜ð°í(Ð …Cð‹ø ô÷_ý!ðŠë˜!ý÷¬ùàà 8b xbàøi(Ð9Hˆ(Ð8Hˆ(Ð 8b˜ðªþ(Ð˜(Ðû÷rÿ(
+Ðú÷ú(Ñú÷ÿù(Ñ 8bà ð÷­ÿ8j(Ñ øa%I€ …C ü÷!ø&H0a ~Õ0h€Õ! ð8û�à0hÀsÐ8xðsÿ�ö÷)ý(kÐ˜(hÐ˜€0k@h 0�˜ðlÿ)àÄ0€¥€À¨€ÿÿÿ€ˆ`ˆÀÿÿÿþÜÂÿÿýÿÿ÷ÿÿR!¦€ÔÃLõ Ã”Â¤Â€ÿÿÿû˜€zÀ.Ð˜@y(*Ñ˜ö÷åü(%Ñ˜ðmü�!‰
+�@	� 0y(Ð	š	™%2˜-1’ðøì
+˜€l(
Ð	™š˜.1÷÷=ü
+˜@0€{€Õ˜÷÷°üàjà.à˜€z€*ÕÿH€k
�˜ðÜì˜ðVì(ÐûHh�@Ð˜ð`è
™@™ðrè™ˆBÓ¸j(Ð™ ðhè!˜Iý÷Âø ¸bð¼ìû÷µþ(4Ð ðý
+�ø÷þ	�
+˜ð
+ü�
+˜ø÷þ� û÷WÿáHij˜ˆ(Ñ)Ð*Ñ	˜À0~(Ñ˜@hÀÐ˜	!‰@@i(Ñàò÷Uù(Ð û÷4ÿÐH0a ÕÏH0a-ÐÎH"h)ð÷lýàQÕ0hÀLÐÊH€j8pðþ(Ð( 0�yI		�qBy‘B~Ñ!�qy)ùÑ¾IIkB{#“@ÿ"RCºJÝ^Ô*>q=¬CQc´I@{@1ˆ`²Ii	j(Ð)Ñ!(ø÷žù(y(Ñ(ðˆû	!É@�€k(Ð!(ðnù™ ˆcû÷#þ(Ð û÷Ôþ¤H0aàÕ£H0aàÐ ÀC0a 
Õxh@x` ð÷Aþ ÀC0a À„CÀC0a Õ˜H"h!ð÷÷ü`Õøh@ø` ÀC0a Õ8i@8a ÀC0aàÕxi@xa ÀC0a Õ¸i@¸a  ÀC0aøià
+à(Ñð÷ù‚H�hB
C�`°ð½{KXk9x"Š@�CÙ
CXc‰çpµ
 ðŽÿ(ÑvI €È`) ÿ÷‘ü p½pµðþéð´ë ï÷9þ,Ñô÷�ûí÷Ùû	ð@øô÷Æûð¨ë,Ñðìéð¦ë(í÷Îûp½bHµÂjRÂbAh ðÐùí÷½ûðéø í÷¼û½XI È` pGpµ ü÷Xøô÷ªøû÷>ý$&(Ðû÷Vý(Ðõ÷Zø(Ñû÷=ý(Ðû÷_ý(Ñõ÷NøGI(ÐÌaFH€Nbð*þDH"h!ð|îõ÷=ø(Ð@M.rõ÷&ø?Hˆ)Ð€,ràõ÷'ø<H<IhˆBÑû÷üü(Ð ðœû!	ü÷2ÿàû÷ðü(Ð à û÷×ýð±øp½øµ ð‡û(Ð ðÅýô÷Jø ð}û(Ð ð»ýû÷Öü%NL%(VÐû÷íü(RÐô÷ñÿ(Ñû÷Ôü(JÐû÷öü(FÑ`jO(4Ñð[ûõ÷Kû(.ÑH"h!ðî(%à¨€ÔÃ¦€ÿÿÿ÷ÿÿÿýüÈÀ¢€ÿÿÿïÿÿïÿ\Ä0€ØÃ ÃˆÀŒó�ÃtÃÿÿLõÐåa=€à0ˆ%(Ð=€ô÷¤ÿ(Ðåaàû÷«ü(Ð`j(Ðeb0ˆ(Ð à û÷Sýð-øø½øµðyúL ÀÑô÷9øhFõ÷Îÿó÷¼øö÷Xøõ÷½ÿ3"iFö÷Vøð¶þð’êð;ùò÷úñ÷,ü(ðrú ÀÑô÷¡ùø½µó÷•ÿH"h!ð÷aû½  HÍûH€hpGúIˆh@ˆ`pG÷Iˆh@ˆ`pGõHÀhpG€0pµ@kñ0MÐ.m«îÀ%(Ñàk(ÑïH"d!ð²í`cíH"d!ð¬í(àcÐ!�àk01¡c!�s`k(Ðàk(Ñ%(p½pµ€4ák )Ðbk*Ð%�sàkðTíåc¥c`kðPí ecp½ÓIµx +Ñ¬#›\py)Ð)Ð)Ð)Ñðü½µy(Ð(Ð(Ð(	Ñ ðê !€0cÿ  4`s ½!(
+Ðy*Ñ]!Éà*Ñ/!	ApGµÑ ½ÿ÷èÿXz@Õ`h(ÐðÎÿ `` ` ½pµ@z%@#Õ y(Ð(Ñ ÿ÷‡ÿ!If²x ÿ*Ð! 	ðlû(ÑšK´x!Zh¡@ŠCÿ!Z`±p(Ñ%(p½pµí÷Âù”ILh
+à¡y©BÑáy±BÑí÷¼ù p½$h,òÑí÷µù p½pµ@z@Õ(ÿ÷�ÿ@h(Ñðnÿ(``Ñ p½0 `(ð|éàéy¨yÿ÷Êÿ(ÿ÷tÿ ÿ÷pÿAhY`h` p½pµ@z$@Õ(ðdé(y(Ð(Ñ(ÿ÷êþ(Ñ$
+à,Ñ(y(Ð(Ñ(ÿ÷µÿ p½pµ<!80ðhì%” U  !t0ð`ì !˜0ðZì`zï!@`r zý!@@@ rÿ ~0Uþ!4 U 
+ðÚúp½µŸ € ð é 
+ð|û ÿ0!0ðfì½9"µ\ÒÐµ"’„)
+Ðy(Ñð
+é" õ÷hþ½"ÿ!øçµ!ÿ÷ãÿ ÿ÷Ïÿ ÿ÷¥ÿ½pµ
í÷þø2IIhà¡BÑhà	h)øÑà¡y©BÑáy±BÑí÷ðø p½$h,òÑí÷éø p½(Ðy)Ð pG!‰@ÀjpG )Ð#
+y›É*ÑˆjpG*üÑkpGpµÿ÷©þ ÿ÷éÿ`z@Õ	 €(Ä`HàbH c  @] 4(ÐðNíàþ €5 u(h("Ñðáþ((`Ñþçl€ ÀÀcÞÞ4T! ðšë!¡q!áq!H U zdž5¬Ì2ÒnËsAI¡rp½pµû÷úûM(Ð(iÿ0a0@(Ñ p½ y(Ñèh(+Ñì`)à&(Ð(Ñ`y(Ñ ø÷˜ù!ù÷«ø,aà(Ðì`àì` y(Ð(Ñ à!(Ñ`y(Ð(Ð.pà(Ñ)pà (p p½pµ `q ÿ÷þ ÿ÷\ÿ`z@
Õ	 €(Ä``z@Õû÷»ù(Ñ ÿ÷ŸÿÎHàbÎH c  @] 4(Ðð¶ìàþ €5 u(h(ÑðJþ((`Ñþç4T! ðë!¡q!áq!H U zAI¡rp½µÿ÷ÿì÷ðÿ¸J¸KÑhIÑ`" 4"qa{œj¡BÑ\kŠ@”CÙ
C\cì÷áÿ½µÿ÷ÿì÷ÕÿªJ! 4!qÑhIÑ`ì÷Ñÿ½!(
+Ðy*Ñ]!Éà*Ñ7!	ApGpµÐ y(Ñ ÿ÷çÿÐ ¤bð¢ï ÿ÷(ÿ–Hàb–H c–H(`–Hh`–Hè` õ÷üp½pµÿ÷ÌÿÐ hq(­bÿ÷ÿ‰Hèb‰H(c‰H `‰H``‰Hà`(õ÷çûp½µ `q`z@Õ ÿ÷öþ] Àx! ð~ê @! Áu!u õ÷Ìû½µð\ï(Ñ ½ ½øµ%jN°h(Ðì÷Uÿ´hà ÿ÷éÿ(
Ð°h„BÑh°`à h(` $h8ðFêà%$h,èÑ8ì÷=ÿø½[J!8µpQpQ`aƒ@›(Ya÷ÓZL\I"h’YJ[H[Kðï(Ðþç"h’XJYIYHZKðï(Ðþç"h’WJWIXHXKðï(Ðþçð¾üðàü=ITH1H`ðüî 8½ÿµ ƒ°�0ÿ÷'ý(�Ñ �">Hðê
+Ñ"EH#ü÷*úÑ °ð½(‰q!DÉ ðÞé™!q¦qçq™'á`
™ 79sazû @˜"À@Cara! ÉCÀ0�‚’Á‚ÿ!¦qa˜(~Ð˜([Ðpj(Ñ ð˜ü(pbÑþçpj!0Éaˆb$H"h· € ðVê!ÿ Iaxsˆp ÿ÷	ý(>Ñ(ðŒéi‹©¡È6�´«ç ÀÀcÞÞÀ¢€ÅÜ•à wÀÑÀÀ8wÀ@ÄÐ
PD ´xl€YÀ¼Œ€ÀaÀ5dèÈ™· "€	²ç˜(Ð ÿ0™"0ð‚é %@ ‚ iÿ0a0ƒEƒþ!Ew4 Uà8à`zï!@`r À b…aÅaEb <!80ð.é ˜0!�ð(é  !t0ð"é €0uEuÅ‚˜(Ð™˜"ðJé z¿!@@@ r û÷dÿ ðgú! ðiüüH!h€1ÂˆÊƒB‰:€zºp@zøpd È‚ Huÿ!}1U˜(Ð(Ð(Ð(ÑïHðb ÿ÷þ ÿ÷
ýìHàbìH cà ¤bðÀí ÿ÷,þà ÿ÷‡ýà ÿ÷>þpj(Ð`z@Õ À €jp!ðÀè ðµûì÷­ýÛIHh(Ðàh)ûÑ`àL`ì÷¢ý Áæpµy%(Ð!qà
+Ð ÿ0"0ðÊè !@ ‚ ÿ0Ja0ƒAƒAwþ!4 U`zï!@`r <!80ð~è.Ð "1˜0ðªè û÷Êþ ðÍù! ðÏû y(Ð(Ð("Ñ-Ñ ÿ÷Ðü
 €­I c­IAc­IÁc§Hàb§H c õ÷¦ùà ÿ÷¢ýà ÿ÷¸ýà-Ñ ÿ÷mü`z@Õ À €j(Ðp!ð4è p½>µ#Êh!‘’‘ây¡y yÿ÷ þ! "t1t0ðÒè!€1(
+}€0uJ}BuÉŠÁ‚ayiq!I`zhrˆIébˆI()c>½>µ#Êh!‘’‘ây¡y yÿ÷ôý! "t1t0ð¦èay€4(iq!}€0ua}AuáŠÁ‚(>½óµƒ°
 Êh!‘’‘êy©y#ÿ÷Òý~Ðhy`q(y q 0ðÆì i¤b$0 a) <"8180ðvè) "˜1˜0ðpè)  "t1t0ðhè.€6'0}€78up}xuðŠø‚ð‹øƒ) 1 
+ˆ 0€Šx‚pÉxÁp™"Þ0ðÎï· €)p¬Ä:uÛm«" ðFè ÿ0ð!�0ðŒïèjàb  0‚}ï!
+@) 1‹}ÛÛC‚uB}÷#@K}ÛÛCï#Bu@K}ÛÛCBurkzcòkúc	}u z¿!@)zIÉ‰CA r(zIÀ	ÀCà3à!r`zjz@Ò@ÒCý"`r@jz’ÒRC`r €*| tû @(z@À€C @!r)É} Áu(z@Ô!Éh‚iaŠaÂiÊaj
+b@jHb °ð½µ	y )%Ð)Ð)4Ñay)1Ñ!ÿ÷ÚþàèÈøÅÜ•à ÀÀ wÀÑÀÀ8wÀcÞÞ!ÿ÷ìþà!ÿ÷ÿ(Ð"’¡Ij‚)QbÐ"1Ò‚‘b½øµ@z@Õ ðþ(XÐà y(
+Ð(Ð(	Ñ`y(Ñ ÿ÷¯ùà ÿ÷¤úì÷²û,Ñþç`z!‰@e(Úhj(ÐðŸù& ÀnbùM †bhh BÑhh`à(Ñþç)Ñþçh¡BøÑh	h`ì÷†ûhhà¬"\*Ðì÷�ûàh(ôÑì÷zûåHp¨h `8¬`ì÷rûø½pµì÷hûÝHDhà ÿ0"10ð'û(Ñ(ì÷]û p½$h,îÑ(ì÷Uû p½øµì÷IûÎHDhà y¨BÑ "9˜0ðû(Ñ0ì÷<û ø½$h,ìÑ0ì÷4û ø½pµ@x(Ñ p½ì÷$û»HDhà y(Ñ” jx]‚BÑ ©t0ðÝú(Ñ0ì÷û p½$h,èÑ0ì÷ûÜçµì÷û«IIhà5"R\Õì÷þú ½	h)ôÑì÷÷ú ½µì÷íú IIhà
+zRÕì÷êú ½	h)õÑì÷ãú ½µì÷Ùú–IIhà
+zÒÕì÷Öú ½	h)õÑì÷Ïú ½µì÷ÅúŒIIhàÿ"~2R\*ÐJzÒÐì÷½ú ½	h)ðÑì÷¶ú ½µì÷¬ú€I#IhÛà
+y*Ñ
+zRÔÊj*Ð2Ôy,Ñ*Ð’zÒÐì÷—ú ½	h)åÑì÷�ú‚�òSÀ>&¾Ç ½µÿ÷�ÿ(Ñÿ÷’ÿ(Ñÿ÷¢ÿ(Ñÿ÷Ëÿ(Ð$à$fIgHðzê,Ð(Ðî÷¤ÿ½î÷�ÿ½(Ðî÷’ÿ½î÷{ÿ½pµì÷ZúWILh
+à!y©BÑáy±BÑì÷Tú p½$h,òÑì÷Mú p½pµì÷BúKILhà!y©BÑì÷?ú p½$h,õÑì÷8ú p½pµ%ì÷+ú?IIhà¡BÑhà	h)øÑàazIÕ!y±BÑ%$h,Ð-óÐì÷ú(p½µì÷
ú0IIhàJzÒÕì÷
+ú ½	h)õÑì÷ú ½µì÷ùù&IIh	àÿ"~2R\*Ðì÷ôù ½	h)óÑì÷íù ½µì÷âùIIh)Ñà	h)Ñì÷Ýù ½
+y¢BõÑì÷Öù ½"˜0µð”ù(Ñ ½ ½ 0@}ÀÀpGpµì÷¼ùHDhà$h,Ð ðÀé(÷Ñ(ì÷²ù p½ ÀÀ�h(ì÷¥ù ñç 0€}@!ÂøH*hÐ
+CàŠC`pGµð§ÿ('Ñ ÿ÷Cÿà ÿ÷¯øÿ!~1	])Ð€j(Ñ! ÿ÷HÿîÑ ÿ÷.ÿÿ÷›ø,Ðay)	Ñÿ4a4a)Ð€j(Ð ½ ½ÜHhpGøµ$ì÷Xù-Ñ ø½(y(Ð(Ð&6(Ð(Ñhy(Ñ(ÿ÷lø€y(	Ñ$àhzÀúÔà(ðzè8ì÷6ù ø½óµ$�°ì÷)ù�˜ÿ÷ßþ'?$à˜(Ð(Ð(Ð(Ñhy°BÑ.Ñ(ÿ÷:øÀy(Ñ$à(ðLè÷çhzÀöÔ™(ÿ÷Îþ,Ñ-ØÑ˜ì÷üø þ½øµ$
ì÷ïø;ðí'&&&& ðäý(Ñÿ÷—þ(ÐAzÉÕÿ55à! ÿ÷¡ÿ(Ñ$! ÿ÷šÿ(Ñ$àþç,Ñ(ðÐè0ì÷Áø ø½pµ$ì÷µø-Ð-Ñ! ÿ÷}ÿ(Ñ$! ÿ÷vÿ(Ñ$àþç,Ñð²è0ì÷žø êæøµ$ì÷‘ø+ð²ì¬*H¼B$øfÑ
+
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+
+
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+
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+
+! ÿ÷Pÿ(Ñ$! ÿ÷Iÿ(Ñ$àþç,Ñ0ðˆè8ì÷pø ø½øµ$ì÷cø;ð„ì!!!!! ÿ÷'ÿ(Ñ$! ÿ÷ ÿ(Ñ$à ðKý(Ñÿ÷þý(Ð@zÀñÔà,Ñ0ðVè(ì÷;ø ø½ðµ …°�ì÷,ø'-�%Ð-RÐ-Ð-NÑ ÿ÷Ùý(IÐ@zÀFÕðöîa` `ð6í=à ðý(Ñÿ÷Æý(6Ð@zÀ3Õðâîa` `.à.H€h(Ð �*àæh¥i h�ðè‘�˜1y@C
Ðš9¨š›qA€™AÓhFÈ€±AÒ˜*;1ð\ì@yA*ðníá` ` ðöï˜ë÷Òÿ˜°ð½I(ÑipGÈhpGI	xˆBÑ pG pGµÿ0�0
ð�ÿ 	ðpú½Bz÷#É@	
+CBrpG£€èÈ ÀÀ	xÉÐ ñç@zÀíçµYy)	Ñ*Ðð‰ÿ½ðxÿ½@Á €	ˆ*öÑB
+€½µ@z@Ô ÿ÷£û½)Ð þ÷]þ½! þ÷@þ þ÷,þ½pµë÷`ÿôH@hàyh)Ñ1ÿ÷Úÿ (õÑ(ë÷Tÿ¡åþµ!
+hFÀéHDhð’ê',à y((Ñ ÿ00"iF�ðÿ(Ð €%)k0ð~êÜIˆBÓàA}I		)AuÓ!Auš!! ó÷çú! ÿ÷œÿà.c$h,ÐÑþ½µðZê!‰ac! IaHu½µë÷ÿÅIIh)Ñà	h)Ñë÷ûþ ½ÿ"~2R\*óÐë÷òþ ½øµ$Åy†yë÷åþ·HCh
àØy¨B	Ñ˜y°BÑþ÷¿ü(Ð@ih+ïÑ8ë÷Óþ ø½pµ)Ð "˜0ðê-Ð ÿ0")0ðúéåpµ$ÿ÷Uüÿ00ð„ø(Ñ$àd$$êy©y(þ÷ŸýõÑ òäµþ÷Åýay)Ñ(Ðÿ0a0z(Ð ½–¨ö¸Fw"µ½ ½µÿ$ë÷‰þ‰I#Ih›àÊRi¢BÚ	h)÷Ñë÷þ ½ "µðø(Ñ~I#JhCJ`½" #µð÷ÿ(ÑwJ#Qh™CQ`½pµë÷WþpIIh)Ñë÷Vþ ¢ä"&
y-Ò3«@BÑdC	h)òÑë÷Bþ Žäøµ%ë÷6þ_HDhà`z@Õ "9˜0ðóý(Ñ%$h,Ð-îÐ0ë÷#þ(ø½UI€@@ilæþµ&ë÷þ% 5�h{ÿ(.ÑMO yx#‚@
+B,Ñƒ@Chsyp�ÉLa0!ACEH0!0ðé 1€0c y(Ð¸h(ÑðÑÿr} @’ �xh{"ðôÿ&˜ë÷Þý0þ½@(ÉÓôçµÀ0jðÔé !Ø0ðÔèŸ € ð®í½µÀ0jðÄé !Ø0ðÂèŸ € ðží½pµÁy€y$þ÷áûêy©yþ÷ ü(Ñ$(y(Ð(Ð(Ð(Ñhy(Ñ(ÿ÷Áÿà(ÿ÷Îÿà(þ÷zü,Ð(þ÷’û$
+à(þ÷wûà(ùÐ,Ð(þ÷…û Ýä ÀÀ€„8‹ÀûI ppGøµ !aC�öH60x@€ðê1x	Õ±‰)Ð1|)Ðà!‘™w|)Ð=1 ðpíà$ €@hÿ-Ðÿ/Ð@0Á}©B
Ðš*ÐB}à‚}‘BÑÝJi‰Åu	]v!yCØJÀ}‰	ðJíàÿ!@0Áuvd$$,ÔÓÐJ `!AC‰ 1ËzIz‹BÑÍIÈvø½@òÕø½øµð0í(>ÐÅM$ Áˆz@€ð´é#XC1@
+1ð íd$$,êÓ$ `CByÔ!àÿ! 	à#CC[yÔ@ BóÙQu�h@0�uÐh@0�u ÿ÷_ÿd$$,ÙÓ ø½óµ8!' �°ðöï ðtéKà hCžIFÿ 0 p
+`p
+  p àp6(%qðØì�˜@zÀ-Õð´ú($Ð0xÀ r°‰(Ð ¯8Ü·´JƒMÀ	`r°‰ q
+àq0xÕ°‰(Ñ `q‰H› 8‚{!˜@BÐ¡r„JxBÐárà ð.é¨BÐ `q47m---±Ù8þ½pµ
ÿ÷ŸÿwII(ð”ìp½µÿ"‘2#iF¨ò÷¶ÿ(Ð™ 1ÿ÷äÿ™ˆr
+Èr™ ò÷sÿ½pµ
ðRú(Ð`I,Ð zJx�BÐI ÿ÷#ÿ(Ð[H"!@ðdï0ÿ÷Çÿp½-üÐ(zIxˆBöÐ0ðPìp½!µ‘OIjFÉi41ðJì˜½JJLI2µðFì½ µðºèHK"àÁZPÉ@
+q(øÝ½pµ
ð6ì^  u `u/  v -`vÑàz`0àr |	@ t }	@ up½µˆ°¨ÿ÷Ûÿ©"‰ ðï°½ðµ…°!hFÿ÷ìÿ*N$' ðvèðì9©@°iBüÐ¡hF	¨ðÜë(©ðÐë(ðôëd$$,âÓ°ð½pµHÀiKbz)†°*Ñ÷!
+@br!p
+"!40«Ãª
+K’[	:	9	8ðÒëÿ÷éù(Ðÿ÷²ÿàDDnŸÀäG¤0HH@¢€ C brp-Ð ÿ÷ÿð�ÿÿ÷Yÿ°p½ÿµ�°$
i“O(Ñ˜ðÊÿ(	Ñš˜!ÿ÷¨ÿ! ø÷<þ ç(i(Ñ8ð’ëˆHð€ë‡H(a ðîïà ðÎød$$,÷Ù.Ðð€ÿ|H	"90ð^îyH	"9	0ðXîvH	"90ðRîsHÀ�{‘j˜ø÷þqI(iÿ÷þý(ÐlH)i"$0ð>îš˜!ÿ÷\ÿXçfH8@(Ð pG8µkFx 0pXx@0	
+0Xp X€ iFðëd,÷Ù8½UH#0À~pGpµ`"TMBCmR 2Ñr”tð~ïð€ïÿ÷Xý !@‰A ð÷eúp½IHó!‰@µð¾íFH€!ðºí½(Ð)zÑ€"CàIIrpGþµkF&–Xz#CkFXr #C^=°NÐ—e)Ñß!@kF\r–yQÀÀIC!Cqð8ïð:ï’š™(1#ï÷6þþ½pG'Iÿ õ0`'I&H`pG(Ñ pG(Ñ pG(ûÒpG"IBCðµIT&$&tftK¦�2Aæ�Ï&`½\`!KiC[Ë‘T3	K`@3XuKhR@3ØuKh@3^ƒKh@3žƒKh@3vKh@3˜uIh@1*ŽwÜÓð½ÁGwÀED0H@<óN<=nŸÀûI€XpGpµ„øM(Y(Ñí÷Pÿ (Qp½pGpG"ÒC#ÀÁpGµh$"S)ÐJAhŠBÑ"à$"JC#2S)ÐKC`½0µ$
+h#*Ð*Ð#*ÐS[Mh«BÑ 0½#*ÐSš`Qˆ` 0½h#)ÐJAhŠBÑ"àŠ’h)ÐKC`pGµà!ë÷*ù ÿ÷ãÿ(÷Ñ½µàhð	û ÿ÷¤ÿ(÷Ñ½ñµ‚°&ë÷žù�½H!8h(ÑºHš8iCi“BÑAa·HDh”%à ‡¸h›Ai™BÑv!ë÷ôø ¸`à©‰ˆ` -•Ðh ,Ð`§J h)ÐH BÛÑ.Ð¢HAh©BÑD`à™`�H8@h(ÑœH™hBiŠBÑ!Aa—H\0Dh”%'(à$ `C›†ðhAi™BÑð�ú00$!ðFìà$!iC‹Ø`0ia110"ðìì S-•Ðh S,Ð`J \2hS)ÐH BÍÑ/ÐzH\0Ah©BÑD`à™`˜ë÷
ùþ½øµ$ë÷ùpI9
+h*Ñ	iIi©BÑ$lO&;hyhàŠÒ’hRiªBÑ$2)ÐJ,Ñ2+ÐZŠBëÑë÷âø ø½ÿµ�°'\HhDh!àZH¡€h‰
(x™@@ˆBÑ™(nÿ1€"1ðŠø(Ñ™l AU˜)î÷�ú8,Ð`8.Ðp B×Ñ°ð½ÿµ�°BH8h)Ñi‰ x@@¸BÑ n)ÿ1�èz¬RoR6Ö€"1ðZø(Ñl U!(î÷aú4J h)ÐHQhˆBÒÐ˜+:1ÿ÷žÿËçpµë÷tø(H$h(Ñ0ë÷pø$H8a$H\0ðµù(Ñ!Ih(ÐDHh„BÐ€@€h(Ðþç(ðùp½I(ÿ÷aþ(Ñþç0ë÷Køp½ÿµ�°
ë÷?øH$h((Ñ8ë÷;øH\0ðƒù(ÑIh(ÐDHh„BÐ€@€h(Ðþçü”ÓÔ22)¨ðù(Ñ˜ðqùcçåK˜2)ðù(Ñþç8ë÷	øVçðµ#!ÞNÞJ0h77(…°_Ñh˜C`1`9`0i‰Ei±h-Jˆ’Ñ!ê÷[ÿÑàkFZyRÔiy)Ñ)õ÷;ÿ(òÑkFy€(Ñ1i"(î÷¾ù(åÑ0iàç0iî÷{ú²à
+ˆ 0#oÀ†Øy¶(Ñhy(ÑˆyÀ	Ð(ý÷Üþ
!‰@À‹à"0ˆ!80€’#o"h0ð-ø’à(~Ñ"h!0ð½þŠàph(­ÑhhœC`q`9`§Ih1‘ñieiIñaÕ1jI1b-Ð HÕ±iI±aðÐê€x€(Ñ À)ˆj(ÐBhRB`ˆjiIa ðÂøMà�ð¸ê€yÀÑðh�y‰Õiy)Ðì÷2üðhÀy(Ñ˜ð¤êˆ9à(Ñ˜ðœêˆ"9€ ˆ@8 €˜ð”ê€x€(Ñ|J’ ‰|J|K ð²ê(Ð À(€j(ÐÁmIÁe ààë÷ù™ ë÷ðúà 	ð-ùfIgJ2\8ðvø8h(Ñí÷PüYæhI2 `hIgH`iIgH`pGøµh&1S-ÐR-Ð1S-ÐiIch™BÑ ø½S-Ðn$!qC&`	È` h$#XC9a h"XC0ðê h$#XC8 0~w@~Hw h$#XC} 0ÁxÒç#’@ÒCÁp8@0ðê!h$#YC	Èb ø½h!S*ÐQBh‘BÑ pG$!QC0pGµi)Ñë÷wø½	ð¼øñ/¶l¨V<ˆåº½÷µ‚°(H05à˜ÿ÷Œü6Ðgh/*Ð˜%�h56‘")0ð¾é1(z 1vhzHv}ç"@ê{Ò’ÒCu(0ðÄé1@1ðØé™:1 ðUÿ(Ñ hÿ÷»ÿH0h(ÄÐ¨åH0h(ùÑ˜ÿ÷~ü(ôÐ™`ðÿ™åðÓè �Ô23¼ÀÀÄÀÀ`! <ÃO€<ÅO|<µðû ½pGpG(Ð 0@}ÀpG(Ð 0B}÷#É@	
+CBupG(Ð 0‚}û#É@I
+C‚upG(ÐzÉRRÉ
+CrpG(Ðzý#É@‰
+CrpG(Ðzï#É@É
+CrpGøµ!(Ð#ÛÅkj+Ð1+j+Ð4’3"ð.îø½pµh(Ð€m%(Ððü h…e hðü%`p½ÿµ‰°ú¦¨ŽÎ�ŽÀ!
+¨NÀ˜ CÑ 
°ð½èx©x®CÀÐœ,Ð zÀ
Ð m(ÑðÕû( eÐ mT"0!ðPéèx©xC€Õ
+˜(ÐãJ	˜h!�GkF}@u™'" ð¸èÝJ	˜h!�GÛJ	˜h!�G!- Uèx©xCÀÐ'! ðlè!- Uhx)xCàq  qhy)yC1 �"1"
¨çrðý(Ñ ".0©ð€è ">0©ðzèà ").0ð”í ")>0ðŽí0x s "±0ðfè1 "1
0ð^è z!C r kçþµ'+]Ðhx*xC(Ñ•‘py!(Ð!2ÿ2#20ÿ÷=ÿhx)xC
Ð(Ð(Ð(=Ñ+à
++!0ðNíëç0ÿ0a0«y"š@‘Cw+àpy(Ð(&Ñèx©xC€Õ,
Ð zÀ
+Ð  †@àbð0í(Ñ`c  ‡py(Ð(Ñì÷ñø(Ñèx©xCÀÐðvèþ÷&ú,Ð zÀÐ0ú÷ùø8þ½óµ�°uN.Ð À,`j(Ñð•F5¤ZÈç�Öú`b(ý÷¾ûiy)Ñ#!	\Ê	Ñ
+Ô‰Õ€0@h(ÑðÀú(x`
Ðxhà j(Ñð¶ú baj)Ð"j*Ñ0þ½›12(ÿ÷Rÿþ½pµ +Ð%í[*ÐXj(Ð0Ñàj)Ð1Ñ p½"ð¸ìp½KIIHµ`KIIH`KIJH`LIJH`LIKH`@IKH`=IKH`;IJH`ì÷wù½pµý÷ú ý÷Qû! 1K}÷"@Ku%zû"@#"%r\–Õ€0"Òh¢bhPb CKuàÔ�Õ C%r ú÷Uø p½óµ‹°ý÷ãù� ý÷"û#!	\
+Ô‰cÕ!z"C!r!šÉe*
+Ñg!ÉG(j(Ñðú(b-jàmj(")41¨ð–ï¯-Ñ $æ˜)1(/Ñ 2ì2p4à6\6\6\6\6\6\6\6\ä<Ü<Ø<ÿÿÿÿ‹WÈ<�Wà<�WÐ<�WÌ<³WÔ<ÉWÝWñWÿ 0]p z"C rš(2˜;ðþë ù÷Üÿ Üåµ€4bh*ÐÑ{ 3)
+Ð)Ð)ÑÙxÉ	Ñ„0ÿ÷£ý½ØxûÔ€ùÔð¸ù ``½ pG pGÿ1a1
+€#C(
+wÐ!É@�j)
+Ð
+iR
+a�jÊhRÊ`€j�mI�epGpGIH`IH`IH`IH`IH`IH`IH`HI@h`IH`I `IH`IH`pGH!µð*îH!p!�`Á`½wûD<­{H<ùsL<1P<³\T<]X<G]\<¼ÀÀ`<xd<p<	]€?
]ˆ?`!pµý÷Çø0ý÷ú,Ñ!	@jàhkðÜîp½pµ
ý÷öù(ý÷¯ø$4áy0I
+âq¡yì0)Ð)Ñ`0@|‚BÙ"à)Ð)
Ñ`0€|‚B	Ù")ÿ11(	ðÔü  qp½(ðOùp½8µ
ZN#! ^›=Cbý÷€ø"’}"ÒjC43!ÿHð´ï8½óµ�°ý÷oø(ý÷®ù(iFë÷ü'Ðèh`a ‰!s˜r!ð°í· €)*ÿ1˜1ðàê$60y#Ôà78{Ô#°x"€Á˜ðvî˜™` þ½ðµ…°©ÿ÷ÁÿÑ °ð½0ý÷-ø0ý÷lù$4 ðü!àhIr� h’� x1€ÀÂì1˜€2«ð¢êg!Ér˜;¡ðžê!˜"$1ðœê˜"}K![1ðÈí(ë÷òû Àçðµ ‡°�0©ÿ÷uÿÑ °ð½0ü÷áÿ0ý÷ ù� À0@j$40� ðÇûàh� hš�’ x!€ÀÀÉB˜!«ðRê€6pk‰@¡x
+Õ"’ K"Ý!ðPê�	à‰Õ"’"0!#ðFêš˜+¡ðBê(Ð x€Õ˜g!šÉA˜ì2ð8ê!˜"$1ð&ê(Ñ8ð¦ìžç˜"}K![1ðLí8ë÷vû �çµü÷sÿ0©ÿ÷úþÑ °p½ À0Fj$46 ðUûàh� h� !0ðê"˜Ò!«–ðâéš`0|Ã{C_0 �s	 Ðs
+Ct
+Pt(ë÷6û Ëçøµü÷2ÿ(ý÷qø* ì6,ÄUÑ(ÿ÷®ÿà,Ñ(ÿ÷,ÿqoà,Ð,	Ñ(ÿ÷Úþ±o(ÿ÷‹þ ø½ ø½pµê÷!ùà ü÷ÿaz$0ÉÕ€y(Ñ! ÿ÷Áÿây¡y ý÷ø,éÑ(ê÷ùp½µý÷+ø�!‰@·!‰bÿ1ÿ0-1@ðŠé! ÿ÷ïü½µÿ÷æÿ ÿ÷Ãÿ½þµ'ÿC)‘8Ð˜ý÷ø�!‰E,À4 k(!Ñ#Hšh!#í÷€ù!O(Ñ @í÷ÆúÀ6°k9ðèè!c‘°k9ðâè!ÉCÑ˜@ cà@ c"+’H™ì3:ðÎíþ½ñµ‚°˜ü÷Ìÿ�!‰DÀ0K‹hkœb³¬Æß€k(%ÐIð¼è%À5)cI	à5^fòØÀ@B	b¸kðªè!ÉC(Ñv.c"’#úH™ì3ðšíþ½øµü÷™ÿ· ü7€!g#>*IÛA6aàðôè!	dài(	Ñ” A](3:t0ð>ï àa(ÿ÷¥ÿø½ðµ¥°Ei(ü÷+þ(ü÷jÿ	� À(Gj0‰$4†	˜#�0c0Ax7‰
+ªð_þ#˜"à0„F€{�#˜€3o�˜™’�`F‘AŠ¢’‘Øn�›š!(ðêÿ(Ñ!(ðÙùà	›"’9" 12‘$’ 1’ÿ3$01*>3˜2�‘æ1;ðŠè$™0ðŠè(Ñ %°ð½ iðîë!(ÿ÷�þõçþµ
¨ÈoFÇ2) ðtèþ½ðµ…°ÿ"‘2Q#©¨ñ÷+û((Ð8ü÷éþœì0‰ÁˆkFÃ4°x%€
+4Á52 #ÿ÷Îÿ x(p
+hp`x¨p
+ép™ˆr
+Èr9ÿ1š18ñ÷¿ûLåøµGi8ü÷yý À8Fj(‰$4!6@1ð"è(Ñ ø½!D �S 0d8ÿ÷wû(Ð!8ð@ùíç iðxë x€Õ!8ÿ÷˜ÿ  q ø½!8ÿ÷þø½pµ‰Ei(ü÷>ý$4810ðîï(Ñ!(ðù p½ iðNë y(Ñ!(ÿ÷oÿ  q p½µü÷`þ(Ðayì0)
Ñ!zI
+ÕP!	\)Ð@‰ÁÑ€Ô ½ ½>µÿ"!¨ðï"’ #ª©ò÷þé÷ÿáy yü÷Cýà 	ðqûây¡y ü÷ýýõÑ(é÷ÿ>½øµé÷÷þ.�%Ð0ü÷þ Ð @%(z'(Ð(Ñì ]@Õ0ÿ÷¥ÿ(Ð0ÿ÷3þ  /rc90ð“ø˜é÷Óþø½/rùçñµ‚°˜ü÷ðý!	Eèj(:Ðé÷½þ� @&0z'(7Ð(+Ñ /c0rhkð¶êÍ "€#’JH™ðÈë˜é÷¥þ˜ëŸI˜fàv³ÿ÷}ÿà4 {@Õ˜ÿ÷\ÿ(Ð˜!ÿ÷«û˜ÿ÷ˆý(k˜	ðIø˜é÷‰þþ½	b‡“áeÍ "€#’FJFH™ð˜ë7réçpµFi0ü÷RüpzÀÕ(‰AHy@Õ0ÿ÷”ÿp½ 	1$0ð=ø(÷Ð 4 z(Ñ(ÿ÷þà(Ñ(ÿ÷²þà(Ð(åÑ(ÿ÷äþ(àÑàrp½µü÷dý)K hL!#ª G½pµ
!ÿ÷Gû!ÿ1*1 	ðTøp½�hI�`ÑÁhIÁ`pG|µ
"¨ðVé")hFðRé˜ÿ!	
+@�
+@
+ëãh˜BÑ˜@	[@	
+Y¡hˆBÑ |½ |½‡“áeH<µë÷WýÂI €ˆ`Àë÷ýë÷Výð,èë÷Bý½øµ$%&'é÷Íý�¸Hh�ÕÁÐ$ÕAÕ%�ÕÁÕ&Õ@Õ'.
Ð,Ð-	Ð/Ð¨L¥hàà`ÿ÷Ãÿ¥`àðúï˜é÷¦ýø½Êçµé÷œýðxùðzù é÷™ý½›H!r!ArpGpµé÷ˆý•H$h)C`èÔ¨ÕÈÕˆÕë÷‹ý�Hÿ!IÁ`BhÒÕ�`à$d‰Iha"C C`‡Iˆh‡J@ˆ`0é÷cýp½µì÷ëøƒI@Z‚KIXCÉhðté		@½€½À½	½µÿ÷âÿwIˆBÑwH½wIˆBÑvH½vJwI�BÐvJ�BÑvH½vJ�BÑsHÒ8½tJ�BÑsH½sJ�BÑsH½sJ�BÑrH½½øµ$[H`ë÷düì÷žømI
\ÿ÷¬ÿ)ð,íkN#2ð‚é@aA-ì÷ŒøfI@Zì÷Eû9ðí#2ðpé@aA)ë÷qüì÷wø]I
\ÿ÷…ÿ)ðí#2ð\é@aA-ì÷føUI\ÿ÷tÿ9ðôì#2ðLé@aA)ë÷jü ë÷Wüÿ÷aÿ1ðLé@ë÷Uüÿ÷Wÿ!ðÖìDJ#ð.é"€aAë÷Sü`ë÷”ü ÿ÷ƒ­Ü”j`ÿ ÿ÷ÿë÷áüë÷¤ü9Lÿ÷Tÿ!ë÷áüÀ ÿ÷ÿÿ÷ûþðŠøø½pµé÷‡üHh¡C`àÔ ÕÈÕˆÔIh*JC`È
Iˆ`ë÷›üIˆhJÒCCˆ`(é÷lüp½Jh ‘CÑ pG0€,Ä!€(€ÿßÿô½ †·T@]Æ°ø$T
6nª
+€ºŒðIªuë|’ª¾@B¾0¾&¾ÀÆ-„&µðø½ µë÷ú ë÷ú ë÷ú ë÷Cú ë÷@ú ë÷=ú! #ð>ø½pGIµˆh@"Cˆ`H€8hJ@`�hJ@�`AhJ@A`�h"‘C�`IHhJ@H`ì÷ø
HÀi(Û@! ë÷Lÿ! ë÷Hÿë÷ìÿ½€(€ÏÿÏï{û«µªþ¿"€@üÿÿ!€
+*µÐ*Ð*
Ñ+Ñ! ð.ëHBi!ŠCBa‚iŠC‚a½�øµÀhÿI
+\ÿIÿN'*7Ð(4Ñ"	ˆüHø÷éþáh‰(pP)Ð°!�àhóM!€5(X@0Aráhˆ0X‰€‰iXD1ðôîáh ‰qXsáh‰iX:
+�qÊqáhªIWRâh)9�TâhI�TUàßK"TÝJãh R%ÐTÛH"ˆÜHø÷¨þáh®Š×IR(�Q9Ð°"�àhÑO€78XÑJ@0Eráhˆ€€Y‰€‰yXD1ð®îáhÊJ‰‰‰Y sàh>A#>rZ¨@CrRáh‰yX·ˆq
+Èqâh9P
+9Š\>Z“@C>Ràh
+\R
+Tm-³Û ø½³HøµL0ˆµJ‘BÐˆ$Aˆ”@²O)Ñýh¥C,C&àþh¦C4C%­I€ˆ	hðë‰€
+Cý`Ððníþ`ø½ J\*	ÑÊÐ�KB3šZ*Ñ‘CÐ(Ñ˜K"b—J€2X 0t¿çpGøµ&Àh‘M€5(X†qÆqàh€(X!qFqàh€(X 0vàh€(X‡I 0vàh	\)Ñ€/Xl78ðî!‰C9ðîàh€(X"�Í‰?�nGÃ³kk0xCpyH'Gc‡cÇcdvIàh	\);ÑtI"	TàhIT}!wH	ðÂíáhŠoI(ˆP)Ð°"�àh€(XjJ@0FráhˆX‰€‰iXD1ðâíáhcJ‰QX sàh^I@1Ràh€(X9
+‡qÁqàhYI@1
+Z:C
+R ÿ÷¨þàh!€(X 0uàh€(XTI 0wàh(ÑMJL2€Q€‘€JJD2€Q€‚HH!0‚XÑpáh‰AXŽpáh‰@Xqàh�iXÊy‹yCÐ=I@1
+ZRàh@Ràh
!à!ÿ÷+ÿ ø½5Jpµ2(Ñ2Lcx+
+Ðh%q	
+Aq!(ÿ÷ÿepàƒÒXq	
+Qq!ÿ÷
ÿ p½óµ�°%˜(~Ñ$N'@6,Ðƒ,Ñ!H(8à,
+ÑH€kH-<8ðòí©pPà,Ð‚,ÑH8ðèí0`¨0XO‰@Axx	C7;hj2›p	
+,Yp
+ÑCyyCÙ;hÉ`3™q	
+ÙqIN	x¶)/Ñ9hà(ÎªÃtdÿÿ� À¼@1
rCxxC9h‰
+pJp"1ˆª@C1€q	x)	Ù-Ð³škR‘BšcÑ!™c9h%@1ðêìþHx(Ñ8hààAyyCÑƒ,	Ð‚,Ð ÷÷êý(Ñ0ˆÀÐ˜!ÿ÷Fÿ0ˆ@@0€þ½1ˆ(ÿ÷=ÿ5€þ½"pµÒ“xèL€(4"XŠB-Ð)!P
Ð "…eY�BÐFµ@BÑ@(óÓÝH‚xŠBÐÜN�p4i"uiÒ”CÙK•CD0)Ð@ˆ˜B	ÐCàˆ˜BÐCë÷uû4auap½øµ
qÐàh(nÑÍN+qÐ '"è©+Ð+óÑ/�Ãx‡x;C(Ñ(é÷Úú ø½*�ÂxƒxCp
+Hp ˆp Èpé÷ìøàh#¹IXCh9@)ð,îàh�qX)Ð8é÷ßøÛç!7à*�ÂxƒxCCyy8Cp
+Hp ˆpÈpé÷Ãøàh#¥IXC|9@)ðîžIàh‰k€€‰@X(Ñ ÷÷2ý(Ðàh—J�,2QX)¥}[×Œrø–ØÐ8MàNàà!ÿ÷¥þ÷ç(‰G0(�ùzºz	C@"‚p"Âp1p"	
+"Apé÷…ø�x{9{C…IT9
+(àhÑ#XC@)ðéà#XC@)ð¸íàh€0X(Ñx{9{C÷÷ùü(Ð÷÷Õý(Ñàh!ÿ÷ÿàh!ÿ÷]þ˜é÷Wø ø½pµé÷LøhJï%¡2SX 3,vÐRX# 2uaK"$3ZPé÷>øp½pµ#_IXC|9@ð|í\KYN!¢
Óv	à*(ÑˆX(Ñ"I(Ñ2]ŠBðØp½ðµ$LJ!€2X…° 3uX# 63vX® 0vGH@87
+à �8X(Ððþê™ xPd<H@] BïØ=O <IhCh?::T;Ã‚À¯
Ç$¨G
+à �8X(Ðé÷´ù™ xPd+H@@] BïØ,Là˜ðÞë Qé÷£ù˜ðí(ôÑà˜ðÒë Qé÷—ù˜ðí(ôÑà˜ðÆë Qé÷‹ù˜ðøì(ôÑI Q HcˆcdÈc°ð½ñµ‚°˜(mÑH"0hÁyƒyCK
+3™€
+€IˆB]ÐIˆBZÐH™Àk‰H$@8
˜FJà(Î#€ÿÿ´ÿJ  @‘[�C‘SýH"ˆüHø÷³ú(èQ4Ð°!�™õJ ‰
+2QX@1HrèY‰@YD1ðÂêîI›‰ˆ["CˆS3Y˜ˆq
+ÈqéY s9Èk@Ècœ]ƒBÑÊcÈk$§èY(¹Ðþ½øµ„ÛN
+61Y³Êy‰y
+CA[Z@ÕKZRÑ#Ñ�ÖH'
(h(Ñ}!ÓH"	ðHê((`Ð°!�0Y@0Gr(h‰@1YD1ðpê1Y ˆq Èq)h sø½øµ&¿H:0D=0?)~ÐÜ»H9B0ˆðëñðïïî�ãíìëêF)jÐÜA)hÐÜ)fÐ)xÐ )Ñàh«I€&1
+PâB)oÐE)úÑáh ‰yX 1tnpøáL)~Ð
+ÜH)|ÐI){ÐJ)éÑàh(æÑ(jø½b)Ðf)àÑàht~–áˆv«ÜE´(ÝÑÿ÷kþø½àh(×Ñè÷�þ—O�<?àé÷tøàh#XCÀð¦ê(õÑ/à©kI©cÐ©kàŠII	\I©c';‹@BÐˆJ€@2€‰@X(Ðé÷Qøàh‚I€@1@©k‰àyà[á1á�àFPàhyJ@«kZŸ@¹CRàhtKAZZQÈÑ˜~ávàáè÷QþnI�àh
+9	\)7Ñ�yXÊy‰yhJCAQZ@
+9	\)Ùàiá7ábáùÐx	Ð˜è÷4þ,áùÑÿ÷þþxÐÑàhÿ÷…þàhXJA’PZCëÐkx+ÃÑ(ÁÐXRàh@Ràh
àRN�qX)µÑÿ÷kþàh�‰ÔÐixC¬Ñ!ÿ÷û¨çàh€8X!€x@ø½¤àYàJààdàgàXà¥àQxx	C€Ñx’x	CA€$áˆp	
+Qp@ˆ�p
+Ðpáàh!ÿ÷ˆüá2L6IB4(ÙˆB¡ÑÐx“xC €Syy+Cc€Óy•y*CˆB¢€ØÐðIþaˆ ˆðâé(KÙj ˆ"‚@CÙb!ð"íéàI�p
+B1ÐpHˆq
+Pqˆˆ�q
+ÐqÛààh(²Ñààh(®ÑI	x)ªÑÿ÷@ýÍààhÿ÷uýÉààh(Ñèx(ÐH9h
+`1rJráhJ‰2QXp
+Hpîpàh�à2ÎªÃdt¼ÿÿ#€dÂÜþyXÊy‹yCCÿJÒZBªÐ!ÿ÷gú‘ààh(£ÑûH!ð.êPçàh(›ÑøH!ð&ê(@ÑõH!9àáhñJ IPRhcècàíIàh9	\)
+Ð!BéH�Ricéc ÿ÷{ùàhÎçèO%
à€À®€Y(Ðð èáh ‰ÉˆQmÜIàh
+9	\©BëÜLààh(Ñÿ÷Ñü(ºÑÖH!ðäé(´Ð ç*Ð à áhÎN‰6pPè÷óüàh�qX)ÑËI‚@1Qªk’‰X)Ñ!ACÆH<8ð*ê(Ðàh!ÿ÷ßú8è÷Ùüààh(Ñ.bààh(	Ñ»Hz@zÀÀ
CÃÑ @Ææ Äæ µ�µH!hjFð°ï½¬Iµ9	x)Ð÷÷ìÿ®H½ µIu9„z_³0�«H!hjFðœï½µ÷÷Ýÿ¨H½óµ$‰° žI�‰
+X# 2~’ÒCCX 3vX 0z,�~Ñ �˜€zÕhAyyCðÀ!Ñ�H'8ˆÀÀÑ�M@5(h(ÐŠHh‰@Áx‚xC(Ñ÷÷ùû)h  �(h÷÷‘û(hè÷3þ/`%0à{H"8l�@3B$ÑvOc?ûZBÑvJ¡@2€��8X(Ð÷÷Ñû �˜8Xè÷þ™ xPiI9lJ@d]‚BÑ dmcH	8]¨BÉÜ˜(Ð ë÷þ]Oe?x[(3Ð.1Ñ ÷÷‘ø(&Ñx[ÀÐà~áuà! ÿ÷êùx[@@xSjà%RHeC(8(ðBé(Ðƒ!\àMH8(ð8é(XÐ÷÷]ù(TÑ‚!Oày[ ÿ÷Éù ßç0CÀ$ÑBH¡@0@X(Ð<I9ˆl@ˆd%<HeC(8(ðé(Ð!à7H8(ðé(Ð÷÷1ù(Ñ! ÿ÷½ù/H¡@0	*H8€k€X(Ñ ÷÷,ø(Ð	˜$IÀh1€X(Ñ #I`C<9@ðäè(Ð! ÿ÷˜ù÷÷û˜À˜pÐ@oÔI˜‰XOÁy€y
fC–¸[@•÷÷û¸[¨B~Ð"èÀUÑ
H¡	h .NÐ0‰#C0Ãx‡x;C+"ÐN™¶qXà6Îädt €ˆÀYz�z@1Jr™qXD1ð¶î™ qXˆq Èq!à"2sr{#CrsuJ²a´" 2�pa`8ú÷5ú(Ð80÷÷\ÿ0 `CmImJ@™WX"1#¸G aàˆà‰àgH"08@k�@+B[ÑaN£€>€Ÿ�8X(RÐ)C
-ü÷îø(,Ð™ yXs˜àdà>X!p{CpsUH°a0‰!0�qaš€¹P@{ÕLI 09Hp÷÷Žú0 `CGIHJ@™WX"1#¸Gà˜8X(ÐðÎí™ xP?I09Hk
+@Hc]‚BÑ Hc˜@�7H™,8]ˆB˜Ø4H,8](ÐÆÎ!å€~iãl˜@Ñ ÿ÷û.I˜$9ZBÐ
+:Rx*Ñš˜R˜"
+R! þ÷£ÿà@Õ"H08ÁiIÁa÷÷.úd,Úèå °ð½øµ$&H§%ÆQHeC¼8(!ð~íH!¨8(ðxíH!”8(ðríH0" 8ÁYbCHÄ`�`Fa†aIÆaa
+Ib
+IAb
+I�bð ïd,ÏÛPämzôXÎ•z3n§qëuŸzµðø½ðµ$…°'%¨ðtí(+Ðí÷áÿkFY|(ÑÉà‰)Ú$©ðfí(Ñðní.Ð(	ÐkFÙyA@ÙqYyA@Yq{A@skF|+’:!¨ê÷vû°ð½™J˜I``˜Hx(Ð pG–Iµð,í½(Ð
+(Ð(Ñ pG pG pGðµ‡°„F
�œ"›–’�’‘�*!`Fðvê(Ðÿ÷Ûÿ°ð½
+)µÑðnêàðpê(Ðÿ÷Ìÿ½pµš
+,Ñ*ðdêàðdê(Ðÿ÷¹ÿp½ÿµƒ°ZC˜(«Ñ"iM’(h2
+!ÿ÷ÜÿÐš(h
+!ÿ÷Çÿ Áç›™"8–ðBê(¸Ðþçµ"©ð>ê(Ðÿ÷Šÿ°½µð8ê(Ðÿ÷€ÿ½TIµIhð2ê(Ðÿ÷vÿ½*µÐ*Ð*Ð*Ñ"à"ð"ê(Ðÿ÷cÿ½µ‡°ª©’‘©«ðê(Ðÿ÷Rÿ°½|µ#š(“Ð(Ð(Ð(Ñ à à à ’0«ðøé˜,(`Ð,Ñ)0ÿ÷Çÿ ,Ð! |½,Ñ |½ ÿ÷ÿ|½
+#¡µðÞé(Ðÿ÷ÿ½µðÚé(Ðÿ÷ÿ½µðÖé(Ðÿ÷ÿ½8µ�
+)ÑI"ðÊéà’I#*ðÈé(Ðÿ÷ìþ8½
+)µÑðÂéàðÂé(Ðÿ÷ßþ½Øä¼À¸ÀD	DÄOSA_Semaµÿ÷9þ½*JpµP4#”`0S`Ð`¾ýÊ|‚Z@€, ‰
=�`H` 5@(Í`ôÓ PdH00�d00Ðd£`â` 9Ã`�`I0`H"!ë÷]ù p½øµM!(hÉCë÷]ùIP1Ìh0„BÐàhÈ`�`  `à`(hë÷Tù`h:1è÷zø ø½(hë÷Jù ø½µè÷Žø½TùLÄðµ…°"hFð–ë™ C�€ ð`ëÿ$M!4ÿ&06 ª©ð8é›™š˜+@Y@P@CÑ" ð.éà¤$$´BæÓ8ð>ë °ð½ÿÿðÿµ“° ª�@� ž!™œ–‘™˜’ªÂ;˜KM�-h¨È¨G(WÑ%,��$Ð˜x€ Õ`x(Ò °ð½`z!zC(3Ñà{¡{C(-Ñ" ©«—Ã	ª’ ª©«ðàèà.Ð˜xÕp{1{C(Ñð|±|C(Ñ˜"	©’‘�0ª©«ðÄèà•«xÔ@Ô•«Ô@Ô•3à«z(/Ñ!˜(Ñ™˜ð¬è(ðÑ™˜ð¦è(êÑ™	¨ð¤è(äÐ«ÚyL’$hkFŒ˜ª© Gà˜�kFŒ«Ùy‘’›š™˜ðŒè�«z|ç�Óà;µð†è½ÿµß° \�hh'Z� Y—6—X�ÿ È>—4’3�‰@	�Hi
+�ú÷„þ�,hi˜4æ(ÑX— �
��`h€yÁôH
+™Ðj(Ðà@j(Ðk™0``h€yÀÑ
+˜zÀÐk˜h(Ñ
+˜z@Ô
+˜ 0@}Õa˜!`Lâ(0Xª3©kF^�Ãªa›Z™i˜ð,èb™`k˜!h(Ð‚zÒÐ!bh’y”FÒÑ
+šz’+Õhš*(Ð
+š 2R}Ò’!Ñ
+šzWÕÇy/Ñ"à"
’"/Ð"’àÒÕ)Ð&
+à
+šy*Ñ)ÐÂy*Ñ"ìç
+Ÿ" 7}?Ô)Ð(Ð€z€Ô"h˜(Ð+
+Ñ
+˜z€Ô`FÀÑa™ `àá*Ð ��
�k˜`"SlÞx†	šS@.Ðb˜h(Ðk˜&`a™ `5ª6©’‘š
™˜3ð²ï™
˜C™0CCÐ`h@"ÁxCÁpk˜h(ÌÐ€zÀÉÐi˜æ(Ðj˜(Ð 
à
+˜Xš 0ˆY�’.‰0«}l™3Y¨ðŽï¨ràiÀÕ ¨r-à¨z('Ù`h"ÁxCÁpH~À
+Ô
+˜@y(Ñ˜	!‰@Õ �€@(ÙuI`1‰zI	Ôí÷žþ@!�€
"Ò‘CC!…¨z(XÑ«{Z˜0«AX˜Y}@ 8�	˜‰t0�B[‘Ó[˜à[�\�¨P«è`™Œ«{Zª®Æ5©^šX˜®Æ[ª’¨zHª©8«ð2ï©zèhIð0ïXž.Ðèh0ð^é€23©ð@éghH˜``i˜æ(Ðj˜(Ð8˜º
+˜	ðØú(Ðàiðïàaài!‰ˆC&àaá	˜t0€€´ç
™)Ð@°BÑ°8©
+X2
+P°8©]�X:€¨z@°BFÑøxû!@øpài�Ð!à!	Q		a„lš*Ð‰a„AÕ �€A
+˜ð‚ø¸€ài�Õlš]™’8ªQX»ˆ
+ �€	@ðøàÕlš]™’8ªQX»ˆ
+ �€	@ð²îà à�SààiAÕlš]™’8ª‰Ih �€A
+˜ðLø¸€.=Ñài�àªª€À Õ �€A
+˜ð/ølš8˜’ài �	€@ð1øàÕ �€A
+˜ðølš8˜’ài �	€@ð\îà  �(ŠH©	0C8ƒ]˜ "X9ðbè0«~(	Ñk˜8©h]˜H«	XXðDî5à(3Ñ]˜H©	X7‘8©X0«}@7™€©zI±BÑ7™8€
+˜@y(Ñ7˜€yÀÐ˜
!‰@À‹à#k˜ézh7˜ÿ÷ný¨z@°BÑ7˜7™ˆ0€v¨z°BÙùæ\˜c°ð½pµˆx%	(.ÐÜ(Ð(DÑ ú÷ªú6 ý÷„ý(:Ð`zÀ7Õ°~Ô€2Õ! ý÷Ô;%ntŠýõ&ô`û-à(Ð()Ñ‰ ðSÿ`6p{3(Ð4(Ñ &3(Ð"&à y(Ñ ñ÷>ü%à 1Hy	yCÐ ðbÿà ê÷pü1 ðÒü(öÐ(p½ðµ&›°––"ÒC’"!ÿH«Àhê÷9ý˜(òÐÀðÐ �2â˜Di,Ñ	˜`0@{!(Ðç÷]üþç	Ÿ,	Ð y(Ñ8n€yÀÑ û÷>ýç÷Mü/Ð˜ð¸ú(Ð à �(ç÷Cü «�X
™C™=nH�˜(;Ð,Ð¨yÀÑ`y(Ñ¨x€(	Ñ	™ ò÷(ý
˜(Ñ ð÷×ü ð÷Àý(Ð) ñ÷9þõ÷Øý(Ð	˜`0@{(Ð(Ð5(Ð
˜(Ñ¨x‰Ñ	(Ð û÷-üò÷Yþ¸h€˜.Õ(+Ð	˜	©`0{ë÷}ý(Ñ�õ÷˜ý(ÐèxÀÀ@ C
+Ñ y(Ðô÷Hú(Ñô÷ú(Ð®HhI`õ÷¯þ˜!ç÷<û 	©ðÔÿ†á(}Ð	¨ì÷‰þ,Ð y¸h(Úô÷�ÿ¨xŠ*nÑ 	©ï÷sþ	˜	©`0{ë÷:ý(Ñ� 	©	ð€ú–IÈr
+s 	©ð¨ÿ 	©ï÷ÿ`y(Ð(Ñ 	©ðøúõ÷<ý(ÐèxÀ
+Õ y(Ðô÷ïù(Ñô÷®ù(Ð‚Ih@`õ÷Vþõ÷9ý(Ð	˜`0@{(Ñ ò÷¡ü
™ˆ)Ñ(Ñ&
à ò÷”üðzè€6ñd°d&à(Ð&¨x	(Ð(Ñ`7x{((ÐÜ(Ñàá:à(Ð5(	Ñ
˜(Ðÿ …0[" ð÷ý	˜`0@{0(Ñ˜
+ðzúíà
˜(ÑèxÀÕ&îç
&ìç&êç
˜(Ñ &åç!&ãç©x		)Ð)ÐZ(Ñ˜ðîÎà™˜ç÷{úÉà‰TÑay)Ñ	š) ÿ÷(þ�¨x	
(AÑ
˜'9(Ð!˜ðÀú¨x	
(4Ñ y(1Ñ9)à!*à	ðï+++++++++++++	˜`0@{!(Ñ˜ðÔí «�˜~
™ðùà
˜%)(Ð!˜ð‘ú y(Ñ)
˜(ÒÑ˜ðæý �
+ˆ8pŽ®/õ˜�˜( Ñrà*pÑ	(!Ð
+(kÑç÷¥ú˜ð¦í
˜(Ð˜
+(
Òë÷+ÿ(	Ñ˜!@� ô÷áøà �(ç÷�úKà•ç÷„ú%�	I¨@�� hC‘I
+\*/Ð	àPÄàÂ0!ÁhG˜yx 0@x	�BÑ™8"‰ð'ú(Ñ™p˜ˆ �BÐzx ðMû(Ð™ €™ pm-ÀÓ˜ç÷Eú0ç(HhI`.Ð0õ÷µü&	¨ðþø(�ÐÅå˜(Ð ðhûIHaHi@i�BÑ¤åH"AhIA`Àh!ê÷Ûúšå>µLHà` 0ê÷ÇúK%-HÑ")ðüéHI”8 `" kFÃ I*0#ê÷¾ù(Ð >½Hµ€hê÷Ñù½PÄÿÿÿ¥€ €túPÙŠMAC Tx Notify„HxpGÿ!ƒH1µðÜì€I p½Á{iJ�BÑ à}J�BÑ 
à|J�BÑ àzJ�BÑ àyJ�BÑ ÿ)Ñ! !@pG8µÿ÷ÚÿlIÀD hiM(Ð¨ˆ@¨€8½hF#`ç÷ëù˜``(x@(p8½µÿ÷Áÿ_IÀ@h\IšBÐÈˆ@È€ ½"Àx@p ½þµ �ç÷rù%�RHéDX',1Ð ‰0n€x€(Ñ ð¯ø0`0�@{0(Ñ 
+ð¦ø˜@{!(Ñ �0n€x‰	Ñ	(Ñ`iy)Ññ÷êø'`i1ò÷Eú/Ð ð>ìm#-ÄÓÿ÷_ÿ˜(ÐðÌþ˜ç÷0ùþ½þµç÷'ù�é÷[ù+L(Ñ0Hi@i�BÐ˜ç÷ù h"@ `+H!hê÷Õùþ½¨ç÷bù›àh!x) Ð
+(Ó"Oã`àÅ~Y.Ðímhÿ&]IK6µBÙeˆmRe€@#(Ò)êÜ*Ð ê÷äú˜ç÷çøþ½µ	L Ê¢X*ÐRišBÑ I#)Ò(òÐ½`Ä 3d ”0€ €\Äµ×L ‚"BC¼Ã¥l’êÐ+
+@‘s(ÓsöÓ½ðµ&4ÏO‹°‚7ðÆí	‘�"9hFðàëš˜›	™€™AÓ"9¨ðÔëš˜›	™€™Aà"9¨ðÈë˜™š	›ÀCÉC€YA}"#Òðúì
�‚!aC´H
+�Á{‚{C!Ð
+™"¨ðªë¨È+‹AÒ
+™"¨ðžë¨È€©A‘�
+˜"©ð”ëà
+˜"¢¡ðŽë&d,ÐÓ"8©ð„ë0°ð½µ(™LÑ! s‚1às#àÁx‚x	C
+ÿ::ÑAyy
+C ’0ðfëà{¡{}#CÛXC�Á‘" iFðXë…I„H‚1ð‚ë ½ ½€I(µÑ ½Ê{‹{C
+Ñ!ÿ"p2Ap‚p
+ÂpqAqàJ{{C’1ð0ë ½øµ
 ú÷¡ý,~Ð-|Ð.zÐÿ!lH"-1ðë((`}ÐFa)h s)h �(hZ!|0As)h° �-h °5(p°y(pðy/7hpù ð,ë (q hqàz¡zC
+¨p(épÒàz¡zC!	Àðâê ¨p èpð¸ý(Ð z(sh{ñ!@@@hsàz¡z
+C!18ðÎê {(Ñ`{(Ñ {(Ñà{(Ñ |(Ñ`|(Ñ1"˜18ð¶ê |(Ñà|(Ñ }(Ñ`}(Ñ }(à
+à	Ñà}(Ñ· €1"¸ðšêø½þµ'%N<—‚ `C…è{©{C!Ð")hFðˆê™˜y@CÑ‚ `C©€0ÿ÷Mÿè{©{}#CÛXC�Á‘"(iFðlê˜þ½d,ÒÓ þ½Hµ‚0ðxê(Ð ½µH‚0ðnê(Ð`zÀÕ ½ ½”ú 0µ"šLãx+
+Ðà¥-y…BÑ 
+p0½R“BõØ 0½@zÀÐ�HÀx(Ð pG pGŒH!µðêŠH!Áp@!ðê†H"@!D0ðÈî ½óµ‡° €O�øxM(pÐ p Œ(p"9 ðþé(xäÀ(p”pyqRGòh–B0G(Ñ0ù÷™üz
+à0y(Ð(Ñ!¨ðˆìkFy€€à � ��-à‡8@0yš‘BÐ™KY9y!py! pap�˜‘@�à`x@`p9y‘™˜ð�ø™@yy�BÐ �v66PHÁx±BÍØ˜*xA	P(pš‰ÀÐ p(x@(p(x€	°ð½µ"
+p"Jp‰ÿ÷zÿ(Ð�¡p	
+€áp½pµx%(Ñÿ÷Tÿd&x.Ñ p½d3H"!ðnéäö2/N#à xÉ(Ò(Ð à@-Óÿ÷7ÿåç!xqqm@1-@£x-qax�BêØñx`xðpÒä*ÙØ p½pµ*Ñú÷0û(Ñÿ÷ÿ%à`x!xC(Ñáx x
+Cÿ*Ù p½-!åp ¡pÿ÷œÿ(Ñ(
+¥pàpïçï÷Íû"0ï÷6û(
+¥pàp p½"ûÿµƒ°ŸÈ"P#©¨î÷$ù(Ð˜!tEt†tÇt�r!Ár™˜î÷áø°ð½8µCx$ðÈéðÒîàðÔî
+à�x%)Ñ‚y’Cyy"(ÿ÷Äÿ 8½©IµŠh‚BÑ ˆ`€ é÷€ÿ½¤IµÊh‚BÑ È`ÿ @é÷tÿ½žHµ€i(Ð›H0ê÷ø½þµ˜M¨h(lÑè‹&(hÐ„ð€ê�*iki˜¢sA€™A.Ò�J(isii€šYA;‹A#Óèh( Ñ¨i(Ñé÷°ÿ¨að`ê�*iki 1šYA„¹A"3‹AÛ4{K"’{H3"!ðJêh()Ð(Ù (w	ð£øi*iHCki1€YAia(að2ê*iki‹AkJ#„ÛCYA"3‹AÚ&dK"’fH32!ðêþ½øµ^M¨h(Ðay#yê‹	CŠB
Ñiâx‘B	Ñây£y)ŒC‘BÑ))AÐ¡x)>Ð&
+);ØðÞè.w`y!yCèƒàxhwày¡yC(„GH0	ðMø	ðHø¡x*iIHCki‚(ŒsAêÜ¡µdš¶_vó1€YAia(aðÔé*iki‹A<Js„YA"3‹AÚ&5K"’7H32!ðÀéø½pµ�ÿ $+Ð0ð¡þ-Ð¬x„BÚp½ p½8µš’›*ÿ÷âÿµ €" ï÷Èù8½8µ)
ÐJ 2z+Ñ#r
+y’Ëx‰x"ÿ÷˜þ,Ð ÿ÷eÿ8½L hð`èàhð^èÿ÷Þþ  !0ðZï8½µ	L hðPèàhðNèÿ÷Îþ  !0ðJï!  0r½¨ûxìÿÿ×˜Á˜pµ$ù÷Tû(ù÷[ü)y)Ð)
Ð)Ð)Ñiy)Ñ4h4à)ÐhàÃ €, p½æ÷üþçpµ$ù÷;ü)y)Ð)Ð)Ñiy)Ð)ÑDhàÉ €, p½æ÷ñûþçpµ$ù÷ ü)y)Ð)Ð)
+Ñiy)Ð)ÑÄhàùH, p½æ÷×ûþçy)ÑôI1@pGW0pGpµñHxÀÄ(ÿ÷•ÿ(ù÷êúiy)Ñ@0€{ÀÄ,Ð(1W0ððì(Ð p½ p½pµ
ù÷Ñúay)Ñ@0€{àÜHx�@ÃÊ )W0ðØìp½µAy)Ñÿ÷`ÿÀx@àÒHx€À@½@0À~€€pGz@ÀpG	z JÕÉ	Ð pG÷µ„°$ÿ÷>ÿ0ÿ÷^ÿ�0ÿ÷uÿ0ÿ÷‹ÿ0z@À
+Ð˜!nFÆ™8+ð˜ì °ð½µhƒj)
+Ñ"`°J’¯J°K1ðˆì½øµ
ÿ!-1ï÷3ù((`Ð‰"F˜2·!‰’:a
#ï÷wù  60p)h° �ø½÷µÿ!ÿ66-1‚°ï÷ùÐ ‰*˜2·!'‰’ 2i
#ï÷Wù  78p°  �š™ ð‡ü ï÷”ù°ð½ ÀCúçÿµ…° �‡H@h(Ð…HðÔêƒO˜7()Ñ yáxC$Ñ0y(Ðpy(Ñ`y"€0ú÷8ûà`y€ðÀú`ykFs yXs˜oInJ‘�’z‰›):1m`žå…¥Ÿ0ðì0ðì`yÃ!@9z#‰	‰C`qš’š™(ðøë(ðúë	°ð½|µæ÷šúYIIˆhkF@ˆ`ày˜p zØp zazC˜€àhc"iFðâë(æ÷†ú|½µæ÷|úJJR!¨ðÖë(Ð"’ ib!«ÿ÷wÿ(æ÷mú½øµ
$Ay)Ñ!‰A‰i)Ñù÷@ø(ðïu!‰]‘˜ñ÷óø(Ð$ ø½þµ@ù÷Øþ3OTÐ(z@ÀPÐ z€(ÿ÷Ðÿ(HÐ z€�iy)Ð)
+Ñðù!zÃ @0€C!ràI2 ð€ëASÐb(©ÿ÷×þ˜($Ð(y(Ðhy(Ñ"1(ú÷núà0ðøù˜"ðfë zÃ!@™	‰C rHáy@p˜ï÷‰ø@Ñ8"à-ÍÀÀ;�h�¬yÀÿÿÿÿ"!ÿHðíþHa8ð>ëûHd"’ûJùK!8ð:ë AÑa{"{	Cá�áz¢z	C!s	
+as!z¡razár!"!rbr!píI
+pþ½|µ@ù÷<þêNÐ(z@ÀÐb(©ÿ÷_þ˜(Ð!ðë˜ï÷.øpÑ  pà`z!zCÑÛJ’ÛJ!+ ð*û0|½þµ@ù÷
þÒNÐ(z@ÀÑ0þ½hy(Ð(	Ñ z	ðYø!z		C!ràykFr zXr˜� zazCb(iFÿ÷þ˜(Ñ0à™:ðÂê˜î÷àÿAÑ!!pþ½(üÑ²H"!,0ðzì¯H,0Å`8ð ê¬Hd"0’¯J!3ðšê þ½µÿ÷þ(Ñ ½÷µ‚°OkŒkÿ÷èü)zIÉÐ)y)	Ñ¢J+’¡Hš˜31ð„êæiy)Ð)ùÑ,÷Ð/õÐyJÓ"yRÒ“BÐû#@’CqyÊÓ"yÒÒ“BÐï#@CqÁx
+ÓâxÒ“BÐ÷#@ÒCÁpy"y‹’›’“BÐ‰‰Cq(ÿ÷úü!(ðúÇåµtHŠx4öZQ\¢Í "BpÊx‚p
+yÂpIyq ÿ÷ý! ð ÿ ÿ÷Þü! ðùù½gIJx‚pŠxÂpÊxq	yAqpGøµ$cK1 jFðê(Ñ!0ê÷,ÿ"!0ðê_J1 ð
+ê(	Ñ"1(ê÷Äþ"!0ðúéd$$,ØÓø½8µz¿!@@@" rFH48’ðìé y(Ñ"JH ’ðâéHJ’>JFI R9W0#ðÖé!ÿ11 ÿ÷¨ÿ" ð‘ù>Iˆk"�Cˆc8½1H!�pÁpqA  p pGôçøµ‰Ei	n' 78ð´é(Ð#J£2’*90ð¬éÐ#29(ðjéø½8ð¢é(ùÐ(y(öÐ29(ðœéø½ÿµƒ°˜ø÷"ÿ� �`x!xC(~Ù@˜$@�˜Áyyù÷…ýø÷Éý	&†Wz75€€àÄyÀ×žÌÀÀÿÿÿÿ;��›ž@KLØ h=8wÀ¡€!(Ñò*Ýð-ñ)Úð
à(9Ñ ò*Ýð-ñ)Úð6*à˜"I!ðù*ÐJx�„F R–FàÚxªBÛ²BÜ{x“BÐ �à@†EîØ˜"`F$`F�,Ð˜àà(ÍÐ˜@0€{€Õ˜y@€Ñ˜(Ñ˜!ï÷æý˜	!yBÐH kFp Xp ˜p˜"iFÿ÷,ü °ð½þµHx'6(Ð(#Ð(5ÑhzÀ3Õ"1(ðÔè-à)z0IÉÑ(iFÿ÷ëû˜( Ð!ðÈè˜î÷ºýà*!ðÄèàå÷ÿ�XH¡xx‘BÑ!p#2(‘ÿ÷ü˜å÷ÿà'8þ½pµ&!î÷ý(6Ð"�IKCb°1#ˆ"ÁgT"#
+pKp 1xý&[[3@CpJxxC>K@
+p
+JpJx+CJpŠx	ŠpÊx‹xC#CŠp
+ÊpðYý0p½þµZ§ÃX¦žÎóNå÷¼þ$�-H¡°'gC�*HÀ](1Ð0ˆ!	ˆB,Ð˜x((Ñ$H-Ð9(ÿ0	"0ðeþà8ù÷*ûÐhy(Ñ(ð÷¥þ(ÑH1ˆ8Bx(ÿ÷ƒÿ(Ð 0€˜!pd,¿Ó˜å÷|þþ½
I p
IH`IH`I
H`I
H`pGÌÀÀðÿÿÁh;HwÀ;¥O;Q;_Q ;pµðþÿL ÿI�iàÿ!11ACcZ“BØ	Iˆ‘BÒ@¨BðÓp½|(Ð(Ñ pG pG 9*Ñ@à@ÿ(Ýÿ pG(Ú pGpG(
+ÑèH@\èI@Z¯!IˆBÓ pG pGþµ@lF6 ƒÍX/-?
-}oåPÕÜO=CåP@(ïÛ#^CÕH�$0ƒY0]C´F›FhsC&ë�6­[›]mphµC
C`›…hÇhkC�}C[›]mqUhµC
CU`›ikC›]mr•hµC
C#•`�LY&6$6$4nFgtQÕµO<CtQ[+íÛ¯LcF$4ãX™DhYC›cChÉ››É‰#MmœC-,C`‘p™„hÅhaCœlC	‰ThMmœC-,CT`‘q™iACˆ‘h™CC[C‘`�r þ½þµ"!’H’LT8 `0à`0 a 0è÷+þ"! è÷&þ "!0è÷ þ!†HIðXè&ƒO %5¦a"BCÿ!11AC¬Z|RRÉRˆ@°BJ€ñÓzH!l8`"Æ`B`�`‚ÿ!%1A‚yIlF,É,Ä™Aað›ûvH!ð,ètI  pþ½µlLd!àhè÷ðý!(aaÑ ½ ½µ}!	$ˆBÚhH"!ð:è(ÑfH"!ð2è½óµ‰°&	˜ààv66àWIô1Š] �@šBóÐ�]SIèœ1�@�@h�ÿ÷Ðÿ~Ðë÷Œúë÷Œú9ÿ÷Áþ(_Ð
+˜@�€|(1ÑDHIJ)l8ð&üð·üïÿgÝTªj¡†ú) ðý"9ÿ÷—þ!ðFé)BÙx@?ð¢ü"8ÿ÷†þ'�š)8ðýü??/õÓ™˜ˆt'à) ðéü'�š)8ðéü??/õÓ˜™€|
+š!iC�(7:9ÿ÷wþH:)l8ðÕû˜!�t  s `a!°1 ‘' �t!8ðpï™9f!8`0sàKà!!As¿e™¹a
+J›L8œ2¹�Ò\IÒIÒC"¹‡‘CšRxÒRCàDüpÄ>ÑÌòøÿÿT¾¤þ0”"Ò…‘CšRˆR’
C…A�*			CA…ÿI
+h™ð;ü ð�ú!˜©@ˆC(�Ðç™	˜H@°ð½õHµÀhè÷çü½÷µ‚°ë÷·ù�ë÷±ùë÷«ù™8ðìû0@BÐ ðtú ÿ÷¾ý"!à+BÐcžt^wIR�BôÛå€&�f�¦�ë÷ˆùà�gt˜ t  €˜(ÐÖI×HHa×Hð>ú ðìàˆ!ÿ÷Æþ-ðSúÏH©CŠ(@CðTú ‰(C � ðþë°ð½ÆHµiè÷ˆü½þµ
ÿ!11ÃJACl2Œ¿N£ˆri!ð¼ïŸ³Ô¬(x(Ñ ð.ú à(üÑ¡€œà(x(sÑhˆ?/òÒ!�@
-8ð#ú(Ñ¯IÈ]@ÈUàˆ@ ‰)B0Ñ(C � áˆtà xC9¤H(2ð úà�€|(Ð ð¤ë!(ÿ÷Zþ5àðDû�9 ðŸû™"ÿ÷$ý™HwðÛù“H@Š(@CðÝùáˆ`‰)@C`�áˆˆBÐ%‰M@EÐ ðzë!(ÿ÷1þ-ð¾ù…I¨C	Š)@CðÀù ‰(C � ðjë,à  € ðšùGàÿç(Ñ &à(ÑàˆiˆCà€ ‰iˆˆC �`‰iˆˆC`�à(Ñ*4Ñáˆ	à)x)4Ð)Ñ1xˆBÑjxiˆ ÿ÷çþ ˆþ½  €øç(x(âÑhˆ*ðÒ
+‚@ãˆ`‰@C`�"‰‚BäÑ ¡€ðSùÿ÷ÿpi(ÛÐ€GÙç"DlŸZP®9{U–Èç(x(ÔÑ ð^ùËçøµ&MM4*xÿ*Ð)Ñji*Ð ø½"kFpYpX€¨hQè÷€û(xiFÿ÷üþhi(Ð$¨hè÷|û,Ðÿ÷{ý0ø½8µ kFp 7LXpAX€ hè÷aû(iF pÿ÷Ûþ hè÷_û8½pµ$-Mà ÿ÷âÿd¨i„BøÓ-H!ÿ÷±ÿp½+H!µh"‰è÷(û½µ!L! hÉCè÷7û xÿ#13IXCl1@€ˆ(ÐH!h"	è÷û hè÷*û½Hµi
+!è÷û(Ñ ½ ½pµ
M(xÿ(%Ðÿ#13IXCl1D!¨hÉCè÷û ðÉø !0ð`í¨hàèÈpÄÅ«ØûzÀÿÿüÈè÷òúp½øµ$ûM(xÿ(+Ðf¨h1è÷ßú kFp XpX€(xiFÿ÷Uþ(Ñ$¨hè÷Öú,Ðÿ÷©ÿ(Ð÷÷#þ¨h1è÷Ãú)xÿ#13YCçJ ‰ˆ€¨hè÷¿úø½øµ$áN3xÿ+Ðÿ÷Šû°haè÷ªú!kF5pp!Yp‰Y€(iFÿ÷þpi(Ð$°hè÷žú,Ðÿ÷�üø½8µÏL!xÿ)Ñ 8½!kFp!YpX€ hIè÷�ú xiFÿ÷ýý hè÷€ú(8½8µÂM(xÿ(Ð kFp Xp@X€¨hè÷gú$à iFÿ÷àýd¨i„BöÓ¨hè÷`ú8½þµ"!³Hð°ìÑ²H"!ð¨ìNÐ (s ha° /(�¬H!h’’"8ð2î .(�t!0ðbì0!`07fs!!As ¶e!0c41u4·a �&C!ˆCC!ˆC …0ðæê!�"@Ò€
‘CC À�C À …0ðeùa�			C(a…ð—ÿþ½÷µ ˆ°€�Jxÿ(Ð›‹BÑy(Ð q˜þäÿ#13XCyI@�ÿ÷×ú$�˜”%�\à˜@F.TÐ) ðGù™"ÿ÷Ìú°B�˜Ù€à0�!0ðrí�˜!ðlíš‚B˜(Ð`J“x˜BØyÒx�BÒ"›¨@C�à#Ñ¡¢=ÈL²†¾p%˜C°BÙ˜@@à @™�à!8ˆ©@C8€ àLIIxˆBÓ!8ˆ©@C8€ à Cm--˜…BŸÓ,Ó8ˆ™C8€à,Ñ>I q�ç<Iy@q˜|ä8µö÷Ôÿ(Ð6L! hÉCè÷Xùÿ÷þþ kFp Xp]€ xiFÿ÷Ìü hè÷Pù8½8µ*L xÿ(Ð kFp XpAX€ hè÷9ù xiFÿ÷µü hè÷9ù8½pµL xÿ(Ñ p½! hÉCè÷%ù xÿ!11ACH�ˆ
!�€ h-è÷ù(p½pµL xÿ(Ð! hÉCè÷
+ù xÿ#13XCI@…€ hè÷ùp½µ	 ë÷Üø ê÷œý½pÄDü 0èÈ µê÷þïç÷µ‚°˜(Ð˜(Ñÿ%%5 à$% �˜(Ñ …C$%à!,Ð™š˜ÿ÷Åÿ!#KCJŸš{¾BÑ–hO¦BÑûXƒB	ØRh‚BÓ#YC8i@àI)ãÓd˜„BÖÙ(ätÅtI\pGsIÀ1@@µðë½µmIÀ1AI ðë ½hJÉ2‰@ypGKYÿ1Ñ1pµ@$ç÷Fú) ðîìç÷lúp½KYÿ1Ò1pµ@$ç÷3ú) ðÚìç÷Yúp½KYÿ1Ó1pµ@$ç÷ ú) ðÈìç÷Fúp½ñµ„°˜(fÒ˜EIÀ1Eê÷ýkFsê÷ýkFXshð°êkFr˜$8(Øê÷ý(Ðê÷ý(GÑê÷ÿükF˜ràkFœr(x'(Ñ kFXrà(kFÑ\rà_r$™˜ªðÞè(ÐkF™y(Aqy�qYyÁqàê÷Öü(ÑL!àê÷Ðü(ÑQ!(Aq‡qÇq.ry™ ÿ÷hÿ²y™ ÿ÷vÿòy™ ÿ÷„ÿd,ÍÛ°ð½µ$ ÿ÷�ÿd$$,÷Ó½Iµÿ$I°4(Ñpç÷Uù! ðBì½(üÑpç÷Dù! ð<ì½µÇpµ
Dl&>,	Ð0ý÷>ý(Ð`40%sðƒÏ›ƒH¶Õd£I?ýp½µDl<Ð ý÷/ý(Ð! ä÷-þ½óµƒ°%ä÷±þ�˜‚I‡ÈYh�HÀYh�˜�à˜!	C{I	hChwI$ÉYää
`Al9-Ð.ÐIi±BÑÿ÷Ãÿà™ÿ÷­ÿ%˜„BÞÑ˜ä÷‚þ°ð½óµ�°%˜fI†ˆYheH€YhfJ�˜àaI 	h8CCh\I$‰Yää
`-Ð[J™h�GàXJ™h�G%˜„BãÑþ½ÿµ�°&˜‡NHÀYhNHÀYh�)à˜!	CJI	hChFH$ÀYää
`  @]™@@ˆBÑhh™€"ðíý(Ñ.Ð™(ÿ÷Dÿà™(ÿ÷?ÿ&˜„BÒÑ“ç7HpG|µMÿ55(ªiFðúî xkF˜p`xØp"¡¨ð<éš™(ððî|½µð¨ï)Hk"’Cc½3µƒ°™‘#IkF€9ŠQb‰	R-C•z	r‰JbEÿ55(jF©ðÀî˜!		Cš(‘ð¸î°0½IH`I `I  `IH`IH`IH`pGD €P;(È@Àª€8‰ÀD;H;L;)¶M¶T;µ·X;#µLƒ@`i)ÑCà˜C`aH@8Ai*ÑCà™CAa�iC�a½Hµx(
ÑHÁj"CÁb! ðÚì" ÿ÷Õÿ½Hx(
+ÑH@8j"‘CbH�hÂC�`pG@�dÂ#€0€pG pGpG pGþKµ 84�ZXhaX
+`@(÷ÓùK ÁÊh	
+`@(÷Ó ½À0µhðÜî½8µš’À0h"ðÖî8½8µš’"ðÒî8½pµæHˆ¡BÐ€ø÷tû(ÑâI,Ð-Ñ&à&
$1 ð.ê) ð.êd,ôÝp½ ?"ð®îp½ðµ ‡°ø÷ýú(Ñ ø÷øú(Ð!à! ‘ø÷ïú� ø÷ëúÎI‘L™ÈJÉKÉNÊOk”X†Dº!Öý%)“’Ð™C!Ð 
+ð¿ù(Ð˜™@˜@@à 
+ð³ù(Ð5@<@à 
+ð«ù(Ð™˜
@@˜(Ð5@<@µHÅbc°ð½pµð^î²L%.Ð±I bÿ÷£ÿ`j!C`bàh(Cààh¨Cà`p½µŸJ!¸2HðDî(	ÐšJÿ #¨2!A0ð:î(Ñ ½ ½“J!(2 µð2î(Ð�J!2@ ð*î(Ñ ½ ½µÿ÷èÿ‡H!Àhÿ÷Èÿ½ŒJ€@2€h	Cÿ#šC
+C`pGpµ$…M )hˆG ÿ÷èÿd$$,óÙp½µ
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ðªþ½8µ" kFp2 Xpÿ ˜pjH
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ð°þKHh"		R‰`HIhŠ�C`æ÷Nü3It9h"ÒC`=I@1i
+
Ca7HÀ8
ð}þ 8½3I µ` æ÷éý8Hh@kë÷àý½øµä÷ƒû/Ðxy(	Ðé÷	ø0ðdí-I
+h€`J¨82IX*J	XX(Ñ)0ðVíàJ02’
+)ðPí(Ñ ä÷[û ø½ ä÷Vû ø½µ 0Ãx‚x 0ð>í½4©€ØÀÀÿëïëÿèîêÿúþúÿøìêÿÿÿþÿ@¤€¨€À €ô;¤€¢€¦€®€!€@ÍäÂ0pµx
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ðþî"`f¢^’(ðâë ˆ(Ðhˆ!ÉCh€8½pµ
5L!(ðÐìld n(5Ð!h`)�!ˆ)„(�!ÉˆC¡xI‰
C(… h		éaáˆi„) ÿ÷Äÿhh€x‰)Ñ	
+(Ñ !0ðšë*!0ÿ÷Dþ*!0ÿ÷‰ÿ!Š©�aŠé� ,dp½pµ‰ ü÷Øÿ5`56à ü÷êÿ ç÷_ù ü÷Ëÿ*{`i1ÿ÷åý(ïÐ p½øµ‰niD.Ñä÷aùþç n'7(%Ðä÷Yù�(ü÷­ÿ!0ÿ÷†ÿ`4à(ü÷½ÿ˜ä÷Nù ç÷/ùä÷Dù�(ü÷˜ÿ"{90ÿ÷²ý(éÐ˜ä÷;ù ø½þµ! !a `ä÷+ù�4HhiGiÐúÀ
Ò
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!	Ch-;Ðhl `n‰x>	‰qi‘éia`jˆÒÑ"a€h€(Ô(x shx`sÈÕ(��JAÀÉÀðë u`uh� u àèj `hˆÀÑ a hn€x€(Ñki*i˜ì÷~ü?IøÀ
Ha˜ä÷Øø0þ½µÇ2‹Ÿn<Âp(Ý‡Q’KŠ‘!À0ðÚê½0©€ €ØÀÀÀ À0µÃy‚yhðÎêmå
+À0µhðÊêeåpGúJµi#@øKZaøJðÂêYåôHi‰‰aiòJRiCapG(Ñ pG pG		@€
+CìJ	CÐkëK@CÐcpGµÿ÷¸ø ÿ÷éÿ0åÀ0µ‚yÀy‚BÒ
+yHy‚BÒðŽê(Ñ å åÀ0µy@y‚BÓåˆyÉyˆBúÒðzê(Ñ 
+å	 åµðtêå8µiFðtêÍL
+%(Ñ kFp Xp˜pàkFx(Ñ
ð–þkF™xXxé÷|ý k(C cæ÷þà(
+Ñæ÷Ôúé÷Aýæ÷üú k¨C cæ÷ñýkFx8½µkFpYp˜©ðDê(Ð¨
ðŒþ 
ðkþ½µÿ÷Kÿÿ÷…ÿ­H~€Õ à ð0ê´ä	 ;µðì		 " àà"àÿ"á2 
+à"Rà?"Rà"Ràÿ"R
+@Q	Ð @IüÑ½øµ$‘N!(ÿ÷ÿ0U ðúéd$$,ñÙ‰N$6À57�?)h ÿ÷·ÿ!€€É@8ÿ9IdÀj$$Hb,bìÙ$)h ÿ÷£ÿ!€€É@8ÿ9�9dÀj$$Èa,ˆaìÙmH!Àhÿ÷ûø½µÿ÷ÿlH~€Õ à ð°é3ä pGhI(ÐhJhC`gJh�Càh#"RC`cJh�C`h
+"	C`h"ÒC`h"ÒC`hC`h’C` pGþµ}$äð^íOI@9Hi0"CHaPHAj%)@‘Aj)CAb@HAhIIA`EHÀ8Ai‘AiHJCAaEOGNÀ7à1h ˆG¸iÀÔ¸i@Ô¸iÀÕdñÒ?K ÉŠkÊc
+kJc@(öÓ;Hh€G(Ð þ½8Ih„Fh@@`0L¢j ‚C¢bcj€"Ccb `cj@&3Ccb£j[[£b£j';C£b£j»C£bcj³CcbcjCcb£jƒC£b£jC£b£jƒC£b`j�C`b`F``j�C*`J'8Æ#òë`bI˜À9Haðæì˜(`jÐ(Cà¨C`bIHh8CH`J@:Qi0 �CQa­ç@¦€ØÀÀ‹(¡€üð#€À ÂÀ£€^±�·™¨€ÿh:@ª€(;®€¢I¡H`£I¡H`£I¢H`¤I¢H`pG£Ih"�C`pG I@9Hi"CHapG�Iˆj"RCˆbpG›H€ipGÿµƒ°
*Ó °ð½ �ã÷]þ��Hh�ðpì .Ñ!à)\ŒKÙU‡IÒÊ@1ËaÊbÊKbhŠbš‹
CCÊb@(ãÓ~K  @€3.Ñh�C`à,Ñ|Lªˆ)h¡bâb™)ÑhC`rI @1cpI˜`˜ã÷þ ³çlH0!@8µAbAi"RCAa ðHègH@8Aj"CAbcIhŠC`Iå`K @;µXbXi!IˆCXa[I @1cÿ÷jÿXkÿ!CXc½ðµ%,Œ@SNSI…@Ÿ€6@9*Ð2h"C2`Jk*CJcNI@1ˆ`MHbaD `ð½0h C0`Hk¨CHcð½DI€€@9bpGAH@8j€€pGpµðÚê
ÿ÷Dÿ‚Ó) ð0ê+¢‹Aÿ÷7ÿ„ ä!€YAðàï0I@1k"Cc-I@9HkŠ
CHcp½)I @1c'I@9HcpG%I(hÐ@@"à€€"C`pGI(hÐ"�C
+"àÀÀ"C`pGI"µŠ`	#Ê`K`
+a"‹aJa`Ht2
+b2ÈaJbI`IQ`
ð”øHœäIˆ`pGU¹(;åÄ,;éÄ¨>EÅ¸>£€@¨€¦€zÀ¥€¤ä8á7 €øµ(Ð"à"!,Ð,Ð!,Ð!,ÐÉDK�XKÑ'à#ZC?K‰3ÒWXðvê8ðrê,Ñ, ðrê€!Cà, ðlêAI, ðnê"1(é÷®ý-
+Ñ0I@Z,+Ñ.I@('Ø{!"à-#Ñ+I\+I@Z,
Ñ*IA¥)Ø¾!�ßð4Ê×�{_à(I@ÿ!21ˆBØÇ!à,Ð,
+Ñ"I
+1@ÿ!1ˆBØŒ!û ð6êæ÷Hø(Ðæ÷Dø(ÑH!ð*êH!@ð&êø½µð™ÿ(ÑH€!ð0ê½(µÑH)ÑHà(ÑH)ÑHðþé½0È°ògöÿÿ>ÑÌòÍìÿÿpêÿÿþ±âÏæÏêÏîÏÿIiÿ"’�C]"ÒCaûIÀ1j"	CbpGöIiÿ"’�CaóIÀ1j
+bpG!µðÊé€!Z ðÖé� €!€ðÖéêL! ðÐéd å÷–þ! ðÆéÀ!- ð²é!. ð®é½ñµÿ À†°ð~éÿ'V7�8ðxé~�0ðté´� ðnéÿ%²5�(ðhé�ÿ !ÀðféÏH[!ð†é¡!O ð‚éÿ!8ðZé8!0ðVé! ðRé!(ðNéÿ !|0ðnéÿ à!z0ðhéÿ÷—ÿA!J ð>é»H!8ð^é¹H!8ðXéw$ä! ðRé³H€!F8ðbéÿ €!0ðXé å÷"þe€!(ð@éeà
+ å÷þ(ð0éÀÔ ð,éòÕ£H8ð&éJ ðé!(ð&é å÷ÿý!(ðé ðéÝÕ—L< ðé™pJ ðêè! ð
+é! ðé!`ðéÿ €!0ðé‰H€!F8ðéÿ ™ÀðÐè™8ðÌè™0ðÈèÿ ™Y0ðÂèÿ ™²0ð¾è°ð½µzL9 !xðØèvHax:8ðÔè½øµuIh"C`9%-!(ðÆèn!0ðÂè¥ !€ð¼èÿ !A0ð¸èeO78ðªèdL p(ð¬è!¸ð¨èÿ !A0ð¤è8ð˜è`p0ðœèÿ !A0ð–è!¸ð’èø½VJÛüÑTJ 2�‘€pGQJÛüÑOJ 2�‘€pGMI
+ÒüÑKI 1�ypG µÿ÷òÿ€™€	C ÿ÷áÿ½µÿ÷äÿ Cÿ÷Öÿ½µÿ÷Ùÿ˜C ÿ÷Ëÿ½pµÜ=ïB0Î„G¨3(ÿ÷Íÿ BÑ
+ å÷$ýöç p½pµ² ÿ÷ìÿÑ)² ÿ÷°ÿ² ÿ÷¶ÿ p½ðµ!ŒFAxxC$I…hA"C`"	 €!�€L ˆ“@k#ÛÀ €"€O 79‚!° ÿ÷§ÿ!@ ÿ÷ƒÿ!A ÿ÷ÿ ÿ÷Žÿ!³ ÿ÷xÿ ÀüÑIˆˆ"’Cˆ€ 8‚1	Pÿ÷_ÿ$à§€†ËPÈ-€�!€(@x(]C À ÿ÷Cÿ¤´BðÛ(@x(]C Àÿ÷7ÿ]HÉüÑ�ˆ"’‘C�€ 8‚² ÿ÷;ÿ€úÕ ÿ÷6ÿ€Õþç!@ ÿ÷&ÿø!A ÿ÷"ÿ`Fð½Çæpµ
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+ÿ!G ÿ÷ÿ@! ÿ÷ÿ ÿ÷ÿ p½"! µÿ÷®üå÷ƒü"! é÷Žø! ÿ÷ìþÿ÷Yý! é÷ù ÿ÷Êþ€! ÿ÷Ôþ! ÿ÷Ðþ@ ÿ÷ñþ!ÿ÷ÉþHh"‘C`hJC`I" ÿ÷{ÿ€! 
ð.ï å÷øû€! 
ð,ï å÷ñû ÿ÷›þÿ÷3ýå÷jü½�(€0 RÈùIh	h*Ð*Ð*Ñx››’Cpà
+x’’€2
+pÀh(|Ð"Càý"@tpGéHh�h@hCpGåI
+	hJ`ˆ` pGàIµ	h#€1(Ò	|ƒ@@½(Ò{$¢C“@@½ ½ðµÔMDi+hÿ0A0,zÐ &4Càß&4@rz	$	$	Crz€$!Crc!IýÒ{É	üÐ€3˜kp(h 0#h˜CC`)h 1				 CC`(hÀ0h�p)h
À0Ahqz	Qh™C1CQ`z¡C6	61CQ`Áh‘qir}	‘h™C1C‘`}¡C6	61C‘`�i‘rÁis)à1x67Ú‰�,Ò;‚�€ÖhžC>CÖ`x¦C?	?>CÖ`Fj–s†jt{67ižC>Ca{¦C?	?>Cak–tFku~67VižC>CVa	~¦C			CVaÀk)ÿ1A1�uz@@r ð½ðµhƒK-hãù3`yh-	-665Cqyh-6-665Cqh--�`Uh--Ý`|Vh-	-665Ct|Vh-6-665CtUh--]a•h--�a–h-	-665Cw–h-6-665Cw•h--bÕh--]b 5.z×h6	6??>C.r.z×h6?6??>C.rÖh66Þbi66c.}i6	6??>C.u.}i6?6??>C.ui--�cUi--Ýcÿ4A4#xUi	--+C#p#xUi---+C#pRib`@i( zÐ "Càß"@ r z			C r z@!C rc @ýÒ {À	üÐ z¿!@ r ð½pµDh"@#âp£p!€¢€"1 
ðë "10
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+`p p½pGpGðµ"%N$#SC!Ÿ‹û\x„BÑ]pI			)ôÓR*ëÓð½ µö÷pý(
+Ð!ö÷!þ(
+Ðð1øð
ø½Hh(Ñ öç ôç`ÈÄøµ$/O†$ `CÀ€Ax)Ò‚xÃx*H`*Hhðnéd$$,ëÓ-Ð-Ð-Ñ$H`ø½"HhpGpµ"‚p"	$Âp!à,%Óhx)xCÿ8	8Ð(
Ñ!J	(ðøþàJK!(ðÿà „BÓ!$à$-,ÛÑHhÿ÷©ÿp½!µ�p!ÁpIð9ÿ½`ÈÐÈ�ZàÚ(ÖhX^ìÌÈÔÈß2ñÿ1Á1	h	#A›É
+~ÿ1�1
+rJrÿ"­2\‚Ò~ÀŠq~Èq pGµÿ0�0!à0s ð—ú ÿ÷Ùÿ½pµÿ4�4%À5hh¯I
+0ˆBh`Ò h0ðÓû(
+Ó0ð|ú
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+`À1ˆh(Ð`Š`pGyÿ2�2+Ð+Ñ@y(Ðà+Ñ )ÑP`pG�`pGyÿ2�2+Ð+Ñ@y(Ðà+
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+ÀpGñµ„°&˜Ÿ0H754�–â÷þ�˜@h(ÐaI ç÷™ý_I	 ç÷Óý\I1 ç÷œý �˜€h(ÐUI 1ç÷�ýSIE1 ç÷»ýPI1 ç÷„ý†à˜(Ðxi€xa¸i@,¸aÙ$üa˜@hA˜.A`Ð˜!€0�c˜â÷Àý°ð½"!Ò€upG"!Ò€upG!µÉ@}(
+Ð ÿ0�0ÿ÷Žÿ ÿ÷ÿ ÿ÷Éþ½µ
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ðÌï8½#ÛÀµ}ÿ2�2(Ð0ðGû½þµ
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+Ar2 & �"©0ð>î!1sqsð÷Áü(Ð ð÷rýâ÷ñúðKîH!h"h# G(â÷êúp½pµ€xNi
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øíÑoaþ½óµƒ°'‰…¨x‰8Ñ	(yÐ(WÐ(tÑ)1 ‘õ÷ÕþÐ ë÷»ù(Ñ™ õ÷ÊþÐ ðÿ(Ñ$ ë÷ªù(gÐ(0�õ÷šþ(Ð"à™ ðÿþ(Ñ"™ ðþùRà õ÷ùáy yö÷6û 5©x�BÙš1 ÿ÷kÿ?Ðš) 
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+à™"0ÿ÷Xÿ™"0ÿ÷Sÿà™0ÿ÷þ8gæµšx‰)Ñ	)Ñÿ÷[þ½ð”ì½µšx‰)Ñ	)Ñÿ÷Hþ½ð‚ì½µÑH°p½ ���(”õ÷–øhy(Ñ� €!hjFà)y)Ñ(Ñ(!h0jF
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+hp¨x€^Ñá÷îÿ)1�ˆ
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+Ð”àà(Ðš) #ÿ÷�þ˜(Ñsç˜(Ð ˆ(Ñ ðŠê˜€]Õ}!=H"	ð´êÑ5H"h!hå÷7ø&Là(/\07
+�$0	�€ (�
+™	˜ðÔê8é÷áø(6Ð è÷Ôþ!ðþì ð¬ê)Ð`x!xC$Ð 0õ÷Ûû�ha`x!xC`8
+ p(apÏÐ:!(#ÿ÷2þ �"9(ÿ÷Öü"9(ÿ÷Ñü¼ç(ð(ê˜€Õ	M$à˜„`Ai)ÐiˆGèh"h#©ä÷Åÿ(àôÈÿÿxüÃâÑ˜@Õü÷`ý˜ÀÕü÷Šþ˜Õà˜(
Ðy)Ñõ÷œÿàAy)Ñì÷ù˜ë÷èøˆH"<Bdæ´¦®å©ð¢ï
+(çÑ.Ñæ&ä÷Óþþå>µ"#€H€L¬8~M`a’t5èh"}¡ä÷cÿHà`" ’"0#|¡ä÷XÿyH"80 a’hh"#{¡ä÷Mÿ("è8’"!83ðbïjH"’"!83ðXïjH 8 `(hä÷OÿqMrH¡")ð„îdHpI´8``"o kFÃ*kI #ä÷Hþ(Ð >½WHµ@hä÷[þ½µ!gH"Ið¨é(Ð°!Da�½MHµ"€h!ä÷'ÿILt4à˜ðbé`h"h#©ä÷ÿ(óÑàh"h#iFä÷ÿ(öÑ!ÿ ê÷ƒû!ÿ ê÷ˆûê÷tû ½µ6Lt4`h!h#ä÷æþ(Ñ h"h!ä÷ñþ ½ ½µ�+H"t8iFðâî(	Ñ'H"t0h!hä÷Ûþ ½ ½µ� H"iFðÌî(
+ÑH!t0h"hÉä÷Åþ ½ ½µL!t4�`áhh!#ä÷¡þ(Ñ h"h !ä÷¬þ½Hµt0h!h"‰ä÷¡þ½Hµt0h!h"Éä÷–þ½¨ôÈTimerCbMsgQŒMacMgmt80211MsgQMacMgmtSMEMsgQ¤ÌT%âMAC MgmtŒøµŒF†F và`FExxh-5C~¶`5€Exx-5C.ÿ>3>Ð	.(Ð.
Ð_.QÑÆx‡x6>CLÑh~¶`5€EàÅx†x-5C	ž÷çÆx‡x6>CíÐ�&-h¦@µCž5`y¦@5Cžd5`,àÆx‡x6>CÐy.Óh~¶`5€Exxh-5C~¶`5€Exx-5CÂç�'.hM¯@•�¾C.`�y¯@�7CI/`Æx…x6.CuF­-®FeF-u¬FuF-…Òø½÷µ‚°&)Ð&�.Ðõ÷©ù0Ðÿ ˜0kF˜€ Ø€`zÀÕ ô÷îú7"(©ðBè8okF�x-(pXx!hp­ÿ1"1(ð2è­ây¡y ô÷æûÐ.ØÐ˜(°ŸÆúÚê@ÉÛQð½ðµ¡° 
�üI"¨ð–è �8ô÷·ú�8ô÷öû�èxªx ÿ0Ó0C �
+�˜Ç"’€	�
+58 0•�· 
+9€8�±âž 	‘�ðx±xC™5ˆB„FwØ˜!	@y�(Ð †F«àqx2x	CBšZ‘B	Ð@™ˆBóÛpF(Ñ �{âpx2xCÿ"72ˆ‘BxÐÜÍH�BVÐÜÌJˆ‘BsÐÜ-)mÐ=)lÑàá*(jÐ-(ùÑ9àðŠèeòeÝ´ýÅe3(tÐ(Ü(rÐÜ(pÐ(çÑ!ì1‘hx)xC™È€ðìî™�ðx±xC(Ù™ªxŠrèxÈr)â'(#Ð((ÊÑ) ðiû�á`(}ÐÜ:({Ð](¾Ñ  á-âa(uÐb(·Ñ!I(xarâ(x!ê÷Yù)x8ð¤ýâ
+˜)x 0�s)xÁs8*x 1Šp*xÊpÂy�yô÷û(óÑïáƒáà†áÛáOá!`FðŒè €0�rðx±x 
+Cÿ0)q0ð,ï -à™à‡à°á˜ó"Ã�ÿ0a0|@t�|"C�t˜z} ðbèn(Ùn ™ÿ1q1‘Èp
+q˜z} ðRè™Hq
+ˆq˜@�˜™zˆBÎÜ á‚àáÙà
+˜*0�8*x€1ŠwjxÊwÂy�yô÷Ÿú(óÑŒá(x !(UÐð:èàþ ™u8à™
+}4!
+TÂy�yô÷‡ú(õÑtá(x(UHÑ �zBz	Cÿ"Á2‘CjxRÒ
CAr	
+�r`á
+àéà AzÇ"@jxR’CArTáFHû" Az@*xÒRóç
+˜,0�8*x 1
+pjxJpÂy�yô÷Mú(óÑ:áñx°x	
+C)8ðXú(`Ñ8y(ŠÑèx©xC1IˆB—Ñ!8ðý!8ðüüáàÿ0ú0�€‹�á÷&û�(ˆ(Ð(Ð(
+Ñà‡ €") ðXî ™ˆƒ˜(+Ñ˜€‹('ÑH ˆÀ"Ð—˜ô÷êø0o)Ñ™IzÉÕ"l!
+Rë÷Yþ(Ñ˜"ÿ0�0�ˆ˜ê÷Éü˜Ây�yô÷ãù(�ÝÑ˜Ÿž†éî=0àUà`¾/ ÿÿ¨ô÷hÿ(�ŸÐ˜ô÷µø(šÐ0�á÷Èú�)x˜)gÑ˜`0��˜ë÷þ(Ñ˜"ÿ0�0�ˆ˜ê÷�ü˜á÷´úšà˜")ðêí
+˜")$0ðäí8y#(Ñ# @8‚x™ ý÷+ü(äÐà‰ €") ðÎíwà �tà @ Azý"@*xÒ’ç!I(xaÈr˜"0� )N0ð²í `0Ázû"@"@2’“{šÒ’CšÁr
Ô™Ï"	x@špÂz‰‰’’
+CÂràŠ
Ñšx’	Ñ"CÁr˜"Axh2#ð¬è˜@|(Ñ˜@}€Õ à  d!à`F(Ñ#à`F(¡Ñ#€ Y*10ðÊìà©‘	™˜ªkF—•Ã!› š30ð¼ì˜(Ðñx³x
+C)ðJíðx±xC™š	€�)ÓJå ö÷qþ«Š!°ð½óµ Í°d"K�øI2¨ð®í .�!)¨ðôì!
+'¨À �¨À¨ÀM˜ó÷Àÿ�M˜ô÷ÿø!‘�!‰@%�2 1� 0�ä /� «�x !C�É÷"É@CpN˜NžÁx€xC
+;
+6+Ð 1��ª©/¨­Å0ª’12ª1«ÿ÷þûK�N™
+ ˆp Èp’áy2¨)�  «ªw*’")­Xwƒ)­êP'«T@(÷Ó �2¨EZÿ!V1h�ByÐ.Ü¾Ih�BuÐÜ=-sÐ(ÿ808AÐ(nÐ(mÑ0™ �ÈÀ&�µHwÐ @z€Ÿà(rÐ(qÐ
(ìÑ«˜ˆò!�	[�ö!	[Y�©+‘ «˜wá>(qÐÜ	(7Ð( Ð(ÕÑ  «�˜w‰ €àA(<ÐB(AÐC(ÈÑ  «�˜wE À ^à �ð¥ú�¨«+�ˆÔç˜2(Ñ �pÐpM˜1ðKÿ6�  «*�)�Xwwàà" 
+©
+ð§ÿ «(˜wÐ
+©+‘�Óà˜àUà1àJà¡à  «�˜w‡ €Åç"©¨ð»ø(Ñ2!à$àIàZà2©M˜ÿ÷›$7Êò¬Ö-ŽÃû“Ð! «*‘)‘wYwÔçÿç  «�˜wM˜ê÷nø�¨+�žà  «�˜w j0öç ‚zCzCÀ@�&¨+�  «ª˜w,’ØwH0�„à  «�˜wYH @z€à  «�˜wUH @z@Àà  «�˜w%˜À0|(NHÑ Àzà {�¨¾ç€!
Y(«5Š‰’w‰IKx0+Ñ
#à#“ 5p+“BÑ"à"Bpš‰€ð®ë˜€�ç" ]kF˜‡ ðgþkFØ‡¨+� ðçª©!¨
«Ãª©¨
+«Ã&ªK˜«Áx€x	C/¨Ã0ª%˜«À0|%˜€ÀÃ"˜ÿ20Ó2©’‘�#('ª)©–ðÜê%¨)ªL�X)Ð'¨B]0ðdëL™ )ªPP'©H](Ð† HUm-æÓN˜«Áx€x	CˆN™ˆp
+Èp1˜‡BÒhæ.˜O°ð½|¾4 µRRäÑ,!è÷öû½øµ0
&�ô÷yü(Ð�y¢y‘BÑÁyây‘BÐ ø½ÿ÷`ù Ð8‰#!Ä !p™"	0ðëèx©xC(Ñ àè{©{Càs
+ t8ÿ÷{ù(Ñ8ðºê&0ø½pµ
&ÿ÷5ùÐ ‰p ÿ÷fù(Ñ ð¤ê0p½µ$!!ÿ÷æÿ(Ñ$ ½pµ$ó÷·þ!	@y(Ñ p½!(ÿ÷Ðÿ(Ñ$ p½ÿµ�°%o *Ð"*?Ñ“Nà’Nöô÷Ýý(Ñõ÷züï÷ùø(Ð ðfüÑô÷ý	Ð ó÷Ùþ‡Hˆ(Ð ï÷ý˜ï÷ºý˜(Ð˜ðœèÐ ‰1
+pAp!�qÁq!�p!Áp ð’è(Ñ ð:ê=(°/ç÷µ
'ó÷Tþ-Ð){)Ñÿ!"~1
+U"!€&qï÷LýfHˆ(	Ð ó÷‘þ ï÷Øüà'ÿC&˜(Ñ ðVèÐ ‰ZI‰p	
+Ap1
+†qÁq!�p!Áp){r ðJè(Ñ ððé8þ½þµ
+·uvöÿþâ'ó÷þ�!‰DKI@�(ó÷Áü� �ÿ ~0@](Ð þ½(y(Ñhy(Ð þ½"(ðPé 6ðxÀ Ðï!@à!C whz€`Õ!Cà@@`w˜™€xÈp˜z€	(Ñ(ê÷Þú(Ñ$ '�™(ÿ÷èþ(Ñ'8þ½þµ -�=Ð �0rprðx±xC€°p7
+74
+4ðp(ó÷aü0�hzÀÕxx9xC@8p
+*ÿ2xp2! ðé˜} r(ï÷'ÿàrðx±xC0°p
+4ðpêy©y(ó÷MýÑÑ˜þ½¯€Lõ)ñµ˜ó÷*üÿIÿHð÷
ú˜ð¦ú˜ó÷bý!I�G9{ 5&)	Ði‰)Ñ	!‰@€jð0ê>s h�˜ðû(Ðám˜)Ðð¡ùæeàó÷2ý 0Az)ÓIAr t!0ðé@4&v˜!ÿ00ð>é˜ý÷žÿø½pµ
ó÷"ý ó÷Üû!@0v!ÿ1"1 ÿ÷òý-Ñ ÿ÷Ÿÿ`z@Ô ô÷úp½µó÷ý	"’!€�b ÿ÷Õÿ½÷µ‚°˜&ó÷±û˜™ÿ05"0
+ð‹ý(
Ñ(@0{&)Ñ °ð½Ä‰,Ð,Ð8ðdè"’š™˜;˜2é÷Œü˜xÀÑ/Ð ÀCà.Ñ!L AU˜é÷Nþ@5ì�8Ôçøµó÷oû!@0Aƒ!ÿ11: ‘ÿ÷¬ÿ ðÊîÐ(‰DšH p
+.`pÑ à  q
+àq  p àp ™"0ð è8
+§sàs(ð²îà&öC0ø½pµó÷6ûˆI…Hð÷ù0xÀÑZ [1(ÿ÷Hý(ÿ0"10
+ðý(Ñ@4 ~(Ñ(ÿ÷êþhz@Ô(ô÷[ù p½µó÷û@0~(Ñ ÿ÷×þ`z@Ô ô÷Hù½pµ‰ei 0AxxCðÀïci)ÿ11ÿ÷
+ý(ÿ÷¹þhz@Ô(ô÷*ù p½ÿµ�°ÿ!]1
+�(é÷íúÑ@2ç ‰*N´çªúc‹V· ˜2€)’æ2 #é÷/ûš’š™38ð�ï é÷nûçøµ 5êx¯x$:CŠBÐ$à*ÑÀx@Ô$àðxï(Ðhx)xCÐhx)xÿ.ÑCÐ(ÐàC°BÐ
$ ø½‰Ai
+€2“k 1
+‰I‰Æçøµ‰Gi
8ó÷xú8ó÷¸û  7	!‰x�`€jðŽè"R! .s
+Ñ› )€€"(1 
+ð?ü(Ð&0ø½øµ
ó÷Rú0ó÷’û!IA
+{*Ð ÀCø½#ª"“SM"Ò„€(` s hðZè"’	J
+H#1ðné(hðï ø½ÌÌÌÌµ€"""" ¡øóµ…°$˜””‰Fi
0ó÷ú�0ð’øèx@Õ À78j(WÐ1TÐ€|ÀQÐ˜@0
+ðnïˆ#`1€:j™2¨á÷ú(Ñ$ 5hx)xèxC©x
C,Ñ˜ÿ÷Vÿª €[(	Ñ˜!ÿ÷Wÿ'%(Ñà,Ñ/Ñ˜!@0và0©ÿ÷mÿ�˜@
+Ðm)›	"8–ÿ÷Øþ@Ñ!à,Ð!0ÿ÷Éý°ð½pµó÷éú	!‰F"!	\riŠBÓ p½/" !€ðtî%ÿ5!�5ÿ(©€Ð@¨€`z!C`rpi@(paÑD! ç÷Iÿ¨ˆp½þµ@zÀ~Õ ó÷tù zÿO€QÕ &ÿ00�üK™0jFðþì(Ñ˜1å÷ú˜"1ðøìõJ™0ðöì(	Ñ™2 å÷°ù˜"1ðæìv66.ØÓ @0A~‰Ô)hÉÊRÊwA~ÉÔ)hÉŠRŠw€~@
Õ)h @xI		pÑ! ê÷Ãù z€Ô(hÀAIAw é÷Lû zß!@ r !W0
+ðbî ê÷+ý! ê÷Fÿ`zï!@`r ÿ0�0‚ˆ*	ÐRà‹à(h/!	@ !ðÒí °€(hÀAiIAa(!@0v@~(
+Ñ(hÀA~I		AvÑ é÷6û  0~€æ²þX¹X:
+Ô(hÀ�~I		�vÑ é÷Yûp~@
+Ô(hÀÁ~I		ÁvÑ é÷Æû(h! 0ÀxÉf*Û€Õpj(Ððù pb(h 0ÀxÀ	
Ðpj(
+Ð© € õ÷âü zï!@ r 0b zý!@@@ rŸ € ðŽê ý÷ëü ö÷aû(Ð! õ÷°ÿ($04!
+ðží(hÀ@i(ÑC! ç÷9þ ä÷Wüþ½pµEi‰(ÿ÷æþ)ÿ1"1(ÿ÷{ú2!(#ðAù é÷ùp½ÿµ�°
+žó÷Jø8ó÷‰ù8ö÷"û(Ð!8õ÷qÿ$44! 
+ð^íš™+ –ðí°ð½ÿµ‰°- %žíC0€	˜ó÷$ø�	˜ó÷cù	˜€0€kððì(Ñ/IÑà/Ñ™˜CÑ 
°ð½LI`|À#Õ# ]Ô�Õ'à7¸{#�€3o"ž�’™˜‘�yŠ"#2’‘Øn$6�›š	˜1ø÷Öùà%à�Õ˜(øÐ˜(õÐàÀ		Ð™2 
+ðiù(Ð 0€èç(»çóµµ°'=
+—ò÷Âÿ� ó÷ù� €0�˜ÿ!0�‘1 è÷Èÿ!ÿ11(4‘,�Ñ4™" ÿ÷Åùx7°ð½,˜"‰,™˜2’@-�· €!4š,˜#è÷üÿ-˜! 03��pÁp,™° �6™-˜*ª+«ðnì+™*˜ªðÈÿ”!+�
+]’#-˜t3©ðbìà@�h(0Ñ6š(˜©kFÃ ›š'™ÿ÷0ÿ@ÑkF˜�$à˜À0Àk(~Ñª
+©’‘2-˜2©«ð<ì(Ñ›°l3(Ð2L2’6™-˜ªð2ì(Ð,˜ÿ÷Ìþ�ç3™ˆp
+Èpöç«x+Ð-˜2!
ªð"ì°l(	Ñ˜(Ð2-˜j2=!#ðì0 02�ÀxÀ	Ð(˜(šCx-˜’D!ðì°l(Ñ˜(Ð˜ 0y(ÐN €]€ÕA À2-˜J!#ððëC À2-˜!#ðèë°j(	Ñ˜(Ð2-˜.2Ý!#ðÚë)˜(3Ð ðâý(.Ð à^àó÷)Ë/Tüò”Á
+ø)!
+\	!É*Ò"à"AJuI"‚!Ñp!qÀ0x
+€À‘-™[ ðþ-˜	BxxC@-™p
+Hp'ÿ7�7¸ˆ(Ñ ÿ÷öü¸ˆ%(%Ð3˜Áx‚xC!Ñ ð›ý(Ð ò÷Åÿ)™)
+Ð 0@z(Ò6™ ð�û™eà 0AzI		)ArÙIAr >ç-š! #ðZÿ zAIý @!r2˜ÀxÂ	Ñ‚Õ€ €Y2Ð€|ÀÐ C!ràÔ€Õ ö÷.ù(Ð À 1�@j(Ñð›þ1™Hbà0T!
+ðdë°j(+Ñ˜(Ñ°l(%Ñ˜("Ð! ô÷•ø˜(Ð˜™`0	zÁq™	zr™	zArÿ m0�Y € )Ñ™	z	Ð!à!�aà! ô÷rø¸ˆ!‰C3™'q
+Hq˜!@00�s˜u é÷Íø3˜9
+‡pÁp!°lW1'@7(/‘~Ñ˜(Ñ-Ð-AÑ z€Õ˜ 0AzIAr˜(
+Ð- Ñ z€Ô˜ 0AzIArà-Ñx~ÀÔ z€Õ˜(Ð¨ð¾ê(Ð˜ 0�zI�r˜(Ð¨ð²ê(Ñ-Ð-
+Ñx~ÀÔ z€Ô˜ 0�zI�rx~€Ô z€Õ-Ñ˜(Ð¨ð–ê(Ð˜ 0ÁzIÁr˜(7Ð¨ðŠê(Ñ-Ð-
+Ñ z€Õx~€Õ˜ 0ÁzIÁr˜( Ð˜Àx@Õ-	ÐàPà-9Ñ z€6Õ¸~@3Ô˜ 0{Is˜!hI@x(Ñ! é÷õý-Ñ z€Õ¸~@Õ˜(,Ð˜Àx@Ô˜ 0{Is˜!hI@x(Ñ! é÷Õý˜(Ð1L1¨ð0ê¨ð*ê!zÀIIC` C!r™/˜"
+ðtê z"€Õ/š’«z"¨
+ðœí«	�z¸s"8©
+ðÞê	™ ðïþ ý÷Ôù ý÷„ù ý÷WùŸ  79y 0).�Ñ0˜Astà¨ðôé(Ð-Ñ0˜@{(Ñxy@xqÑ è÷7ÿ0˜!§ï°óø¡ËG­Asà-Ð-
Ñ0˜@{(	Ðxy@(xqÑ è÷!ÿ0™ Hs6˜ðÊé(Ð-Ñ.˜~€Ô¸y@¸qÑà-Ð-
Ñ.˜~€	Õ¸y@(¸qÑ è÷.ÿ6˜ðªé(Ð-Ñ.˜@~@Ôøy@øqÑà-Ð-
Ñ.˜@~@	Õøy@(øqÑ è÷…ÿ ù÷Àú! ðÛÿ è÷£þ6™.˜ 1
+xvIxAv™3˜
+pIApÿ"‘2-#©¨ç÷Øù( Ð�05)	ð»ýF6˜Axx
+C6™0ð\é†-™"0ðVé™€@ˆr
+Èrš4™ ç÷tú,˜è÷æüŒäµDi ÿ÷°ú!ÿ1"1 ÿ÷mø½IH`pGÿà;ðµ�° �8ò÷Vý�8ò÷ü˜�!‰E(À0�	�8ðû(Ð à8û÷Ÿý�8€0.
�Ñ
˜k�
˜@kà.}Ñ
˜€k�
˜Àk(vÐ™)sÐ°1‘”9.‘Ñ°!�!IaIz:t2‰É’$2‘3ðæè
™ÊŠ™ 1
+r
+Jr*ŠrjÊr¬!Ë] 5•*y!*Ñ!
+!1‘ðÐè.Ñ˜"!Å`
˜	]B} )Ù	›(ðÂè8ø÷Åþ(Ð)8ø÷ÞþExz€Õ €8|(ð²èE.Ñ™(ð®èE˜	!‰@~(ÑâI˜@ÀxÁËÊ@Á(àÉàðœèE l(Ñ!L1(ð–èE  0
+�Àx€Õ8õ÷9þ(Ð#à3šŠYŠ ì0’‘�[|!(õ÷ƒýE˜")ðzèE l(Ñ!h1(ðtèE
+˜ÀxÀ	Ð) 	ð’üE l(ÑN ]€Õ˜y(Ð·H"S8!(
+ðxè5³H"C8!(
+ðpè­
+˜ÀxÕ8õ÷íý(Ð#à3šŠYŠ ì0’‘�‚Û{!(õ÷7ýE j(Ñ!,1(ð2èE.ÑžH`p�àœH`˜ð*è˜™Áa™˜ˆp˜!Ài	ˆC™Èa˜
+ðÔ/Xøô	U¤2öî™#Èb˜™( 8p
+Hpš!8ð´û8y(Ñxy(Ð.Ñ™8ðùà.Ñ™8ðáøxy(Ñ.Ñ™8ðûú˜šÃh˜1
+ðìï°ð½µò÷âûtI@ÀxÁËÊ@Á 
+ðÞï½pµò÷Ñû,€4!k(ÿ÷åÿ¡k(ÿ÷áÿp½µò÷Âû ÿ÷êÿ½pµEhß÷�ühx*xC8),1= 
+ð@ì(%Ð!yÊC’
+Ð‰‰)Ðâx!
+CâpÂx
+Càâx÷!
+@âpÂx
+@ÂpÁxû"@âxRÒ’CÁpâx‰‰’’CÁp0ß÷\üp½pµ
ò÷|ûh4!(
+ð‚ï!(ÿ÷´ÿp½pµò÷mû,€4!k(ÿ÷çÿ¡k(ÿ÷ãÿp½µò÷^û ÿ÷êÿ½µkFIhˆH…QhH…½µò÷Nûÿ0€4ÿ0€¢k!kmÿ÷ëÿ½µò÷@û ÿ÷ëÿ½pµIh# 
+ðBïih#* 
+ð<ïp½µò÷(û�!‰AÀ1JxÈh’	ð6ï½µò÷û ÿ÷ìÿ½µò÷û€4¢k!k,0ÿ÷Ðÿ½µò÷û ÿ÷îÿ½IH`	IH`	IH`pGY¼;À;8=g¨;ïè;þµÿ!Q1úH	ðÄî5!ùH		ðÀîE!÷HÉ	ðºîöH(!	ð¶îôN$H>7$7%eC¨
+ð@êè
+ð>êd,ôÛéN$%T `C�M`5PèHMtH8
+ð*êd,òÛäH$'áN<8�Ô `C�M`5POt˜
+ðêd,óÛÛH$'ÙN08�ÿ 0`C�M`5POt˜
+ðêd,òÛÓH€ þ½pµ
$@)	ØÍHH8
+ðüéÐÊH!$8
+àÀ-ØÇH<8
+ððéÐÄH!8
+ðàé
àÿ @…B	Ø¿H08
+ðàéÐ¼H!8îçºI°P p½#µ¶LCC$<àX"›hàÄ‰ŒBÙhR“BøØ ½pµ%(FÐ`|(CÒá‰@)
+Ò(Ñ@! ÿ÷ÜÿÑ@! àÀ)Ò(ÑÀ! ÿ÷Ïÿ!|žN ‰-pPÐ¨h `¨‰qÈÌÙð
~áu �è‰à�(| t) ê‰10	ð¨î |€4P,`|#�IXC$9@!
+ðtéa|#ŒJYCH:Š
+ðnép½ðµ ‡M…O(€$? PCÁŽh.
+Ð9X à‹‰,ˆ#C+€	h@†B÷ØR*ëÛð½pµHy	yC@(Ø!àÀ(Ø!à!(hB|ŠBÐÿ÷�ÿ`y"y`xC"xCÿ÷1ÿ(`p½øµ)~ÑUà`x"xC
+)OÒby#yÿ"CR�BGØˆ\IX�(Ñay"yC!Ðùy8yð!ú˜(Ðby!y
+CÑ�h©C�`Â‰%!0ð×û(Ð™ ˆ`à˜€h(pÑ˜ÿ÷1ÿlà(Ð€h¨BÑ!hFÿ÷�ÿ˜àay y	bxC xCÿ÷Õþ�(Ñ ø½…`âx£xC��bx#xCtby#yCÁ�by!y
+C¡0	ðZí˜%!Â‰0ð�û(Ð ò÷Çÿ(M à3àò÷Áÿ(Ððòþ(Ð#M˜…`™"Jˆ‰�BÑ|(ÑÊ‰18ðžþà(Ñ8ò÷	ù˜Á‰"’‚0ðÄÿay"yC1‰6¤.ÓIçÿ÷ÿ ø½÷µ„°&)Ñ °ð½pzÀÀ{ÀÀ€�ÀBÂÀÿÿÿÿ*ÐÓx”x"CÑ%
+'àBxxC@-?˜‘ÁyyðPù�9à(
+%p©I`p¨X(AÐ�hšB*Ð‚‰¢p
+âp�‰¢J‘BÑ-Ñ �˜!ªðµþkF™ˆ!q	
+aq	àÂ‰"q
+bqÂ‰1 	ð¬ìay"yC¶�6¤m--½BÃÓ˜ÿ!j1p	
+Ap˜1
+†p6Áp0…ç!¡pápÐçpµ%�@À…@€N$ 0X(Ð�h©C�`Ñÿ÷þd$$
+,ðÓÿ÷cþp½µÿ÷qý½ÿµ�°Ñ °^çÁyyðØø¨x'	8ˆ@nI	ˆB(Ð˜$�gH¡BX*Ð�h0BÐ�‰dIˆBÐ©x;		‹@BÐ˜Ó‰(Ð™2(
+ð6ìà™2uÔÚì¹»ÄÆ(
+ð4ìd
+,ÛÓ Äç÷µ‚°€0@k%‰/€�Èk°0� y(Ð(+Ñÿ!~1	])&Ð%(Ñ ñ÷ùÿß÷Ìø!I~ñx"Cñpß÷Èøà â÷¨øðxÀùÑ-Ðš! #ÿ÷‡ÿš! #ÿ÷�ÿš™ ÿ÷þ-Ðš! #ÿ÷sÿš! #ÿ÷mÿ y(Ñ @8Áxý"@Áp0eçÿµ�°'
+�˜.ˆ
+>(5Ñ
+ .(€1Ñ™˜"ÿ÷­þ)ˆ@(€ Mç`x!xCÿ8j8Ñ˜(
+Ñáx x	
+C˜!ÿ÷vÿC
+à™˜"ÿ÷Žþ™	‘)ˆ(€áx¢xC66$.ÕÜ8!ç"Š@Áˆ@pG€�ÀÿÿBÂÀ*Ò)	Ñ@(Ò#XCÿKà)Ð)ÑýI\&(Ò#XCùKš3À�T pG pGþµ"’>àðx±x5C¸B8Üix*x	Cÿ9Š9(Ñ(&Ýèy�iy*y™Cè÷2ù�éxªxC@$„FàaHz
+)ÒI
+Cz™˜ÿ÷©ÿ(Ð �ddEëÛèx©xC96†)¾Ò˜þ½óµ�°!˜€˜(Ð˜(Ñ þ½œ'%&nCÈH!‚]ÿ Š0 p
+`p è÷ùÂH!
+6PsrI	[x	R
+)CróÓPÀ
+ pâp$m-ÕÛ%&³HnCš0‚]ÿ Š0 p
+·*`pÓ!à! #è÷éøªJ! š2¶BsrI	[x	@
+)SróÓ@À
+ pâp$m&-ÏÛ˜™ € þ½0´ ,Ñ	ˆ0¼<ç,Ñ0¼ç0¼pGpµ$‘M `C@	ð¤ê ù÷�ÿ ù÷Øÿd$$,îÓp½÷µ ˆ°�…Hš"8x“BÑ)Ñ™p à 
+™`¨ç÷1üª©¨ç÷±üzH'yI„0à/ÑkFy€Ñz{™ä÷Ôÿ@�kFy:�˜‰ç÷ÕûkFy�˜‰ç÷Éû…BÚ% eIxCÕ8T:èêaª„1�@�	ðJê BÚ&à®BÝ.]H™�	ð<ê°BÐ™0	ðNê
+˜!`˜	ð0ê BÚ&à®BÝ.˜	ð$ê°BÐ™0		ð4ê
+™ `˜	ðê˜	ðê$˜0	ðê„BÚ ™1	ðê??/‰Ó˜°ð½8µjFÿ÷aÿ˜(Ðÿ÷Fÿ 8½µ4I p/I„"„9ˆ	ðÌé"! ÿ÷âÿ½pµ$%(ù÷¿þ„BÛ m---óÓ p½óµ�°ä÷$ü!N?$„6 `C…˜)	ðÖé)	ðÒé)1 	ðÎéd$$,ëÓ˜"9ÿ÷®ÿþ½µä÷ü	" ÿ÷£ÿ½óµƒ°ä÷öû�˜(Ð˜Áz‚zCÀ(�Ù àºÊ>Ñ.ÉÎ°ð½˜	ð|éuJ!(p3Ñ'-à˜ù4ex#à y( xÐ)
+ðTéà)
+ðTéù÷Fþ!AChH  V1	ðré  V1	ðlé1  V1	ðfém-- x¨BØÒ˜‡BÎÓàZI„"„1ˆ	ð&é™˜"ÿ÷;ÿ«çñµ ™		ðJéPHœx4'(Ð%à%LJiI¥:P\Š pQxap’x-¢pÛ"¢q
+ðéà"¢q
+ðéù÷óý!AC?H„80	ðé`q0	ðé q00	ðþè?àp4?m-ÎÛ˜ÿ!U1r	
+Ar™ø
+ˆrÊrø½*µÓ",K›\[*K$3š\R)Ð)
+Ñ%I\&(Ó 0y!AC"H	à@(Ó !ACHš8	]*Ð‰\ˆBÛ½pµ)Ñ-Ø-Ñ,Ð,Ñ p½ p½ p½,Ð,ùÑöç*1 ÿ÷±ÿ(Ú*1 ÿ÷ªÿp½ p½Î²ÉöÌ>ÑTËðµ(Ò#2à"(Ø"þIŽx=m°BüNËˆ‰O‰‰ˆu[Ù÷N’ 6¶XµBØôK(3šX•BÙ#à;™BÝàïN’86¶XµBÒ;àëN06²X•BÒ_ôiäb#™BÚæIˆpð½øµãO8i(Ð(ø÷fù(ÐhzÀÕhy(Ð(Ñxx°BÐ0ÿ÷ªÿ¹ˆˆBÐ(ç÷*ù~p¼€ø½þµÿ0�0†j8ÿ0™0ÿ5À0$™5.�?ÐpÀÐð¿üð˜üÉI@†CÈHBÐ@ †C˜!�p ÄK"‚@V2BÐ*À2xšVŠBÚd$$à,Ðd$$ïç)À1p(Òðjü(àÙ˜x(Ñp+Õ,)Òd$$ à˜! à)¿"R\À1@
+p(÷Ü˜!pà(Ñ°Õ,Òd$$ à)¿"R\À1@
+p(÷Ü˜!p,u8y(Ð–Hx(
+Ð™LÀ5(x pú÷ŸûÀ7!x8h	ð’ï þ½pµÿ÷rÿ,ÿ4™4!!b }àa`b bÿ Æ0AU´ U 	ðÌè"(ð%ý 	ðvï! 	ðvï‚I(	ð:ë1(ÿ÷(ÿ p½Òçpµÿ4™4 }!É``¡`´! `U! 	ðZï%€5èk(ÑsH
+!	ðVïèc0ÿ÷µÿp½øµoH	ðäêÁ%@íEClNmO$ 0X/#[XC}!É	ðtèÀ¨BÙ(a:hd,PRìÓø½pµÿ4™4
 ¡b	ð,ï`À0x"0ðÄüUI0	ðàê(p½pµÿ4™4ái`jˆBÒ!	ðïà!À1A\)Ð)
+Ñ  0@{(Ð(÷÷øÿ(Ñÿ p½ ps`j(ÿ÷Áÿp½µÿ0™0	ðøî ÿ÷¶ÿ½ÿ1�1Ék¯çpµÿ4™4% 5.}!)uÿ÷¼ÿÿ(Ñ.u h
+(Ñd à} À ` `` `p½ÿ1™1" 1
+uÎçµÿ0™0)Ø)Ñ}"Òà)Ñ
+"àd"‚`	ð¾î ÿ÷Äÿ½ðµÿ4™4¡j À0\…°�  0�@{%(Ð™8÷÷Žÿ(Ñ%8ÿ0�0i)Ñ@i(Ð˜ð)û(Ð#à|4òï@à¾@ÂÀh(„Àdtò\# <0ª©ðöø(Ñ-TÐ 	ðTî ©	ðlî>kFyÿ6—Ý¬ðàMÔ±r™6(C 6(Ð5}-Ñ%à0}"!	ð^î \0ð-øÿ(
Ð™ˆB
+Ð" 	ðRî") 	ðJî-Ð-Ð-Ð-Ñ)à˜{(Ó!8ÿ÷^ÿ °ð½0}(Ñ 	ð6î(Ð8ÿ÷/ÿ0}(êÑà(çÐ êçþµ¶Hÿ4€z™4@	Õ(ÿ÷`þ `` `} À `nà h'
+0. 7ÿ6 `8}™6À6(LÑ j€]& 6�p{(Ð™(÷÷Øþ(Ñps(ÿ0�0i)Ñ@i(Ð˜ðsú(Ð#à# <0ª©ðVø(1Ð 	ð¶í.Ñ ©	ðÌí!j`jˆBÙ(ÿ÷éþ à 	ðÌí(Ð(ÿ÷Æþà 	ðÄí(Ð ©	ð²íñç(ÿ÷ðþ(Ñ! 	ð�í`j�](ÿ÷Dý8}(Ñ¡h} À�BÑ þ½ þ½µtHÀi`0@|(ÑpH€z@	Ô <0	ð–íah@`` €4 c½ pGpµðdí4ð³ûðøû-Ð-Ñÿ%S5#ààx¡xC†%à¨1ðyûmvàx¡xC€¨BðÜp½áx¢x	C ‰ðgû!(	ð\í,ðÑp½pµÐ ð*íðÁú(Ð ð í(Ð(
Ð(Ð(Ñ ÿ÷¬ÿ(ð/ûp½ðbûøç	ð8íõçøµÈx‰xCÐ ø½6N µi	ð,í°a8ðÒù(Ðµaø½!18ÿ÷¿ÿ8ðù8û÷Nü ø½µ(HCi“BÑ)ÐBa ðù û÷=ü½"!1µð¸ì½HJ!‚apÁpÂapGµÿ÷õÿI ˆ�ðû½H!A�IK	ˆJ™BÓQ�àK™BÓ�Â€àI�Á€!ÉC�€!�pAppGIH`H
I@0`pG !¤|ïßÿªÃXˆ¸D¸ò\\µí÷Žù ÿ÷ÿ½pµ	ð¦ì }ù÷Vù hn€yÀÑ!(û÷Žû0p½ÿ0�0µ‚jÛK $!�@BÑ\(25FÜ!eE4ÏøÑ½µAzÉÕÿ÷ëÿà	ðë(Ñ à	ðë(Ñ à 	ðvì}#ÛXC½ÿ20µ�2“j +Ðÿ$ä¢CT"B	Ñ"
+p ",”@BÐ
+p0½RõÑ0½µ	ðäê(Ð à  p ½ðµÿ4�4¤jx ,Ñð½®OV%!7.Ñ*š@"BÐ pð½§JÓ\š¾X¦J²C.ž@2C@+òÐ,êÑð½*üÑŸN>*š@"BåÑó\šºX@+ðÒ,óÑð½þµ %�`yÿ5–N”O™5(	Ñ ÷÷Ûü(Ð7èh@/a<à ÷÷Ñü(Ñ>ŒHðºë(Ð'ŠIèh	h>@@@ˆHƒJx!2�QX"@…I`.a� iFÿ÷‘ÿ(ÑhFÿ÷€ÿ �HˆH)ÑkFxà!p!41 ÿ÷Pÿ(Ñþ  4 u˜þ½ÿ2�2Qb¥ç�aÁapGiI9\pGgI€!1XpGÿ0µ�0�jbK $;"‚@
+BÑ\(øÓ(Ñ"’
+BÑ ½!�@aHBÐ pG pG pGpµÿ0Á0	"h’)Ñ(€~p½@ÿ!­1I]�BÚ(Ú (€~(ÿ÷Áÿ(ÿ÷Ìþ„BÙà´BÒ4 p½pµAyÿ4>M=N�4)Ñ÷÷-ü(Ð.`j5à÷÷%ü(Ñ56Hðë(Ð&4I`j	h5@@@2H-Ix€!1XBÑ p½ p½)Ð
+)Ñ!¡ç pGÿ pGµ@y(Ð'Hˆ(ÐH�0@\þ(
Ñðªëù÷ÿ½!ÿ÷}ÿ½ ½*µÐù÷öþ½ÿ÷Ôÿ½#(µÓ(Ø$8p	à$(Ñ  pà(Ø8ppà#½¿ïßÿÿÿ?€ò ”|˜ˆ?ðµ  "�I�Lð7`œKQ Ë
�~X^P™N@vX(nPôÓR
+*êÓ’M“N "BCAK·P’@	S`
+(‘`ñÓð½(ÒŠIp pG pG÷µ‚°ÃgéjØ%6Ÿç£Ý÷ýþ�¼ Y™‡hEh0ÿ0™0	ðDéyHšh(	ð€ê#i"8	ð~êÀ4 xuI€ 1X!h	ðxê©xPsIHi"CHa˜Ý÷Õþ°ð½pµlNpx‚BÑ)ÐfH!L8tp	ð`êdH2x!x0	ð^ê(ÿ0™0ðPë"(ÿ÷«ÿp½pµ[N°x‚BÑ)ÐSI"	D0´p	ðFêSH2x!x0	ðDê(ÿ0™0ð.ë"(ÿ÷ˆÿp½µ÷÷¹ú! ÿ÷ÔÿHH!~€Â ÿ÷«ÿ½AJ?Kx2 3µ	ð"ê½By*Ð*Ñ)Ð7HpG5HpG*Ðy*	Ñ	"’€@i)Ð@hpG€hpG pG.JpµL: !l4›…›@(cQ÷Ù"a#J !ˆ2›…›@(cQ÷ÙbcJ !H2›…›@(cQ÷ÙJ !›…›@(cQ÷ÙH(0% e® Y!h	ð²ém¡Y---`òÙp½HIx0µðé½HI 0`
IH`pGDÂÀè‚À¨�ÀTÃÀ(„ÀÞ€¡€À \ð;Q´ô;øµðëþMé`¨`èù0kI@4c |�(Ð(h&.`ðØé&t |ôN(#Ðà÷Yÿ2nsn‡™A²m¨hóméh…™A#è™AÚhB’A‘à(: ðÀû8åJ'3(»AÓf�f§t˜ø½ßHµh)ÐÝL!`àj!@àb`k@`cð$ê)Ñ k@ c ñ÷Áýakì÷rù½µ$(Ð(
+Ð(Ð(Ñð²úàÿ÷“ÿàì÷ú(ÑÇH!@0tà÷ýþÄJÑd�dàðcú ½ÀIÂx 1Šq€xÈqpG¼H!AcpGºI 1ˆ€�¸HbpGÿµ…°&
"¨–ðˆèhz)zCÿ÷èÿ53­Nñn°nY@CÐ˜ì÷‰ÿµfõf¨H 0�@‰¸BÐ˜G� 7™ø�™)ÑÀ0à!ð°é0™�,Ð˜áx�q˜¡xÁq˜L™"j˜#ðŽé |A’H‚ |@€( tÙ.CDÝÔ)Âð’  t |@cÑ‹K3!"U^[à@R8ˆBÛG}][µBõÜ@R€*RìÛHÐI)æÜà)Ð!áçzKŠ`‚  ‚à‚AÍ*ŠaŠŠBÓ
+b‚)Š¢Š‘BØ@€(¡‚ìÓnH€0Š!ƒâ‰bƒ ˆ ƒcŠ›
+›c‚ã‹+
Ñ›‰Àÿ0õ0ÿ#õ3˜BàƒÓãƒ
 ð³ú¡‹š ð®úâ‹aŠ ð©ú¢kák	 ð¤úð²é jš›@!€YA@±AÒPH@0A|IAt 	°ð½ÿ÷ÿ ùçJHjpGøµ&GMFH*jÁh‘€h3ðêè™¸™Aa` `(j"hch1€YAa` `ð|é"hch‹AðÓø½þµ7N6O 6ðné�3H
Áhš€h‹AÓ.J8jÓh’h€š!YA€©AÒðVé'JÑ`�` ðq%H:jÁh‘€h%+�ð¨è˜™‚™AxŠ)€YAa` `õy-Ñµy8j"hhCch!€YAa` `µyð,é"hch‹AîÓþ½óµ…° �ð é
HLŠ2(Ò!jHCà€€!YA�H‘hIˆB
Ñ˜h@ à00`ótÃýÿ(Ü*h˜kh™‹AÓ(ÿ÷Yÿ`Š*hkh!€YAi`(`™ j`&4�´BÝ�HxIp°ð½kh*h˜™„™A,’ÚdB˜„BïÙ˜šh!€yAi`(`˜&(ÝÐâçóµ�°O> >¸y1jHC� ÿ÷=ÿ{H%h�)	Ø™@HC"hch)€YAa` `tHŠ(Ð iFÿ÷tÿpk(Ð(Ø¸y(ØkHh(Ý ÿ÷ôþðk@ðcpk"hch€«Ac` `cH™€8hÿ0Z0€à˜"hch)€YAa` `ðnè"hch‹A0©AíÛþ½TH 0€|(ÑQH# 8Án€nY@X@CÐ pGpµMJJIŠŒy -
+Ð2-Ò(à‰ˆ(ð´ïCI	hŠ*ØLC$$à@J‘BÐR‘BÑ-Ð BÒ0x BÓà 0pp½KÃcÐ-‘*A{8µë÷¨ÿ(3Ñà÷�ü0L <ád dðèadáù9 dh(Ð"
+`ðôî+H*Iˆ‰ˆBÐ$L! <`k@ðpï)Ñ jàà‹(Ñ"HbŠÉ€"’H K!ððï8½pµÝ÷Æúÿ!Hq1ðÎíH% 0…tðÜïL <áe eà÷Eüaf fHd!Š�€!
+b…qHâm¡mÂ`�`0Ý÷¨ú¢mám ð¯øp½ÍPtÃ`óýÿˆÃ'�(0µà÷3øILà`pà÷.øax"x‹ƒB÷Ü‰�BôÓ`p½øµÿ÷ëÿ@N?M$6 2X*Ð©h8�Gd$$,óÓð„ïia(a ¨`ø½ãç8µð|ï2Laa a1HðÂë`h
+!ðâî’-J,H!#ð”ì8½(H!Ap!�`pGpµ(%Ð#K!$3¢šX‚BÐ*Ñ)Ñ!d,óÛ,
Ñ)ÐM‰XP¨x(Ñÿ÷Ãÿ¨x@¨p,Úÿ÷Óÿÿ÷žÿp½pµ(ÐL£x+Ð!"2�UY…BÑ ‰[PP pÑHðêép½I		)êÓp½Í /pG pG8µV¡	h‘$"iFð¬ù(Ñ$ 8½8µP¡	h‘$"iFðžù(Ñ$ 8½pµd!ðÔì6à`x€°B4Ü x((ÐÜ (
Ð%(
Ñ¬d#à)(ÐD(Ñìeàìdà,eàleà) ð^í(Ñ xÝ(Ñ ÿ÷Ãÿ(Ð¬e xÝ(Ñ ÿ÷¬ÿ(Ð,f`x¤6¶.ÆÑ0p½pµ
D!ð�ìà`x€¨BÜ x (Ð3(
Ð6(Ð1 ð,í`x¤-­-éÑp½ô`õç4aóç|µ 
)��Ñ|½(ÿ÷öûÿ6�6±ˆ(ªkFðí(Ð˜(Ð	H™)ÐLäà$C |½IH`pGPoš	Pò	€90<pGµ!BH"	ðdì(Ð!Da�½‰”0pGÿµ�°˜‰Fi
,t4(,f`0#€0!�As!0ðJì xó!@™0œƒ¹ÊÌ1.ïdÈ	C p €09x‘BÑyxB‘BÑ¹x‚‘BÑùxÀ�B
+Ñ @09yx‘BÑyy@x�BÐàx!C1àp"˜1 ðì"9à"9 ðì"1˜1 0ðì· €1 "0ðì™ s!©p¨`èh!	ˆC!	Cè`˜ø÷Hÿ°ð½(µÐð°ë½0÷µ„° ��`x!xCÁù9<Ñpy(0Ñáx x	C ù È%‘�˜‡BÒyx8x	Cÿ8!8ÑùxºxC(Ñ?5"8iFð=ø(Ð8ð÷ýà5(Ð!ò÷Áûà!0ùç˜@�àáIˆBÑ �áx¢xC$˜„BÒ˜(ªÐ˜°ð½øµÿ&v0
+pHp"	8ò÷Óû
+ páp$0
+&p`p"!8ò÷Åû
+ p-ápE$ðæë@ø½BxxC *Ð pGÂxƒxCÑ p pGBy
+pÁx‚xCpGµÁxƒx	C)Ñy	)
ÒDyc+	Ò$#cC‰šQ‚y$9ŠpÂyÊpÁx‚xC½ÿµ�°�ÂxƒxCÑ °ð½	?$àxE)Ò)Ð$ HC™D$<`x(Ð)x)ÐˆBÐ™ˆG )x@ap$	(÷Ó¿h?¶?66/Ó.ÖÒ˜Áx‚xCÆçŒFøµÿ!	1p	
+Ap!�p!Áp"$%MCI		cFpë[x@¤$p@$)îÓ&ÿ!
+1$#sCeF_v"66
+pEp%…p%Åp“qûFq�x…qÛx4R$Ãq0$	*çÓ.ÝÓðëø½µðë(ÑÞ÷Žûì÷!ú½þµŒF$%._/†Fàˆ`DXxxCÿ9A9Ð)Ñ^àÙx›x	C`$,åÜpF(Ñ-Ð.Ð/Ð8x�0x�(xkFphxXphFÈÞ÷²ûþ½ˆaFD	@%!¥pápÿ!A1!p	
+apG}KÈ5}5·¤¤¥p%åpÿ%C5%p-
+epˆƒ4€ÁrF*ÑÞ÷œûþ½Þ÷¤ûþ½÷µ ‚°�˜
è÷ø_àhx)xCÿ8k8$Ð(5Ð(
Ð(EÑÿ J)s0#ð˜ê˜ê÷Aÿ@àJÿ 2)r0#ðŠêI‰	Š
+ 
+)ÓI€-àIJ	h¨h‰ˆBÓ:)ÿ k0#ðrêà �à:2)ÿ l0ñçÿÿÿÿÿÿÿÿNõŽÃàò/éxªxC$,Ð06-.�Ñ˜¡æpµç÷µÿÿ r0 p
+`p  pI àp| qH|`qÿ ¤s0 p
+`p  p àp"‰ ðžéÿ 4k0 p
+&`p ¦pàp2) ðŽéÿ 4l0 p
+`p0
+¦p)àp"1 ð€é8 p½IH`IH`pGLõ]<ù<µ"iFÁ"iFðìý(Ñ ½ ½µ¡É’‘"iFðÝý(Ñ ½ ½ÿÿÿÿÿÿµõ÷Üüù÷�þ½øH€hpGöIˆ`pGôI µðê	
ðH½h½ïH½ïH½ïH½Hh½pGpµß!ìHðéëH! 0ÁuéH.1ðFéæM!°5 ir¨r "èr*s"js"ªsés,
+!4*tap¢pàp "q`q ¢qàq "r`r  r àr  s  8"Cw 0~ "Cv ðäëÏHˆhq
+¨qÿ  wp½µÿ÷´ÿß÷�ú ù÷&øÀIa ½"µðØìß÷—ú¹L iBkAj¿Hhø÷aùàh(Ñ à`ù÷™ûâ÷)ýâ÷\ûù÷ûý÷÷ûÿø÷
ø·IµHHaµH@0Bh€#CB`BhCCB`
+i"
+a‚`h`Ü÷Wýî÷íýî÷Óýî÷ßý Ü÷Rýð@ì ðéðé ½µ$†°ä÷løõ÷Xþ"! ðfêðlêðžìñ÷zú›H�›H�›H�›H�¨ú÷üä÷£úõ÷hüä÷4ýù÷†ÿÿ÷êûä÷šû“I”Hñ÷û‘I“Hˆ`ý÷áûð¸ùç÷ùðâè"|H®½†Ä9‰ZÂ’€i"!«ß÷Ëý °½µvL‡H a 0ß÷±ýÿ÷±ÿâ÷aøðÊèðÌèðÎè€H!ô÷_üI(`Ð"@hô÷{üyH"8`aeH!0ß÷¨ýÜ÷6üÞ÷Âúö÷£ütHð´èþ÷‘ýö÷aÿ\IqH1H`ðÄìð¬ÿ ½µà÷šý(Ñõ÷£ú(Ñú÷áý(Ñî÷,û(Ð ½µú÷,þî÷]ûß÷žþõ÷°ú ½þµ"$ˆ‘BÑ[I
+$à"R‘BÑXI$à"Ò‘BÑVI$€ˆUO°08€à ß÷jüRHð\éPH!ðZéNH!ðVé0…BìÑKHðLéIH!ðJéGH!ðFé0…BÜÑDHð<éBH!ð:é@H!ð6é0…BÌÑ=Hð,é;H!ð*é9H!ð&é0…B¼Ñ6M"(hA!ð4ïõ÷eú3I.Hðè2H9ˆ�€,„qÑ"à ,Ù`! ë÷"ÿ*H)Ih’)J!H)Kðì �(hB!ªðïþ½0ÍÀãÀëÀóÀ€ ‰À€ €¤¿¨ž¥€üÈÉÄÃÉðÓ”ÓÔ2ÔïˆñÄÀÁÅ7ˆDªÃd ”0ˆÀ©4p@Ä
UÀøµ%„Hù÷ù„L…I"h’ƒJ„H…Kð¶ë"h’ƒJ„I„H|Kð®ë"h’‚JƒIƒH„Kð¦ë"h’‚JƒIƒH„Kðžë"h’‚JƒIƒH„Kð–ë"h’‚JƒIƒH„KðŽë"h’‚JƒIƒH„Kð†ë"h’‚JƒIƒH„Kð~ë"h’‚JƒIƒH„Kðvë"h’‚JƒIƒH„Kðnë"h’‚JƒIƒH„Kðfë"h’‚JƒIƒH„Kð^ë(Ðþçï÷%ü(Ðþçâ÷:øðBïðDï|N$ 0X€G(Ð%d,öÓ(ø½wI_Hµ`ðÕùð¦ýðAüñ÷óÿá÷øøð,ïë÷þÿ÷öüðåúñ÷äþð&ïð�þä÷zú÷÷iýñ÷³øö÷¬üî÷]úþ÷ýðùðïø÷‡üþ÷Îùü÷×üü÷9ÿð<øå÷9üÝ÷müÿ÷ý®wðÀ=Ú€|Èùâ÷fúâ÷þ ½øµ%VO>hVH@÷÷§ú�8h!	ˆC8`8hQIC8`Ü÷<úð é$II 1X€G(Ð%d,ôÓÜ÷úð€èGHhß÷½úFHhß÷¹úEHhß÷µú8h>IÉC@0C8`˜÷÷�ú÷÷\ø(ø½=H	pG<Hµhð¾î½à À@Ä
pdUÀX
„xÄ
<0 ?À°$7Àh
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¬ `À´
(è¨È¼lÀ¬ÜÐ\À”
ðä`&ÀÄ ”jÀø
dXðVÀTÍ¤<(€000 ÌÀøÈXÄÒÀèÈ9!qHIµðLínI9"9’kK"8ð’ø ½hIµ98ð¡ø½dI98µð¬ø½ÿ!`Hu1µð(í]I|"9’[K"8ðoø ½WIµ98ð}ø(Ð„`½QI98µð…ø½pµÜ÷öùKI9‰h		ÐI		
+"Q$-ÐBM!*:’hà9#KC[ 3IœrŠBöØÜ÷Ûù p½s!:H	µðÜì8I\"9’5K"8ð"ø ½2Iµ98ð1øÐ T!0ðÂì ½µÐ T!0ð¸ì&I"98ð-ø½ÿµ�°
+Ÿ˜ð:è ð8è$à˜)ð.èíd´B÷Û°ð½pµ
Ü÷…ù ð&èÐ!(ðè0Ü÷}ù p½øµÜ÷pù-Ð)8ðè0ðè Ü÷gùø½P4ˆ;=ÿµŸ°21
‘ˆ”"9		‘�¨"€®­ðˆì¢©’‘š ™˜+ðBí !" 2x@(òT÷Ó
š8y0«Ã+š
™’‘™2 ð,í#°ð½÷µ °� '¬®* 2;y@(âT÷Óˆ‚8:5ì‹¼AØyÉj�ˆx67"›+Ñ	(Ñ"¨’"‰€ð:ì 5ªx©’‘š ™˜3ðôì"™"˜::I0«Ã3š’™" —ðæì ¸çµRH` ð÷¾þPI `àx@!Càp x"‰)Ñ	(Ñ%0{¡ˆw00Êw 1ðÄìkFz3AI"(ÿ÷Sÿ½÷µ„°@i�@0ðüëœ�Áx4IHÕ™	ˆ‚)DÙ…"!I]"x`l‘BÐ(Ð}ŠBÐ.Iˆh@ˆ`3à,IHh4@H`à(Ðÿ÷Ëþ `d˜@y(Ñ à �80ðÈëÕ*˜$2!ðcú(ÑHhI`à*˜$2!ðlì(ÑIh@` °ð½°ˆD""8°€8 À]9E
Hm`0ð„ë ð÷+þ
+I `	I˜`™"(ÿ÷ÿàçðè„ÓÔ2ìôpµî÷Aÿ! ï÷‡ÿ§!ÿHÉð&ëL!
+°ð"ë  !t0ðë%” U`y(Ñ ð$è @ eqr 6òHurµr`ñH` p½pµ
"˜0ð2ë· €) "ð*ë @ ‚x) #ø÷uùp½pµ ï÷•ýî÷÷þ ï÷�ý%(Ð@zÀÔ ï÷†ýä÷gÿ(Ñ 4 %tp½ p½ðµ…°î÷çþ0î÷ ý� € �0©å÷ükFYy"0ä÷ýkFYy˜"ðÒì 0!�ðî2W2’-"˜)ðî™*0ðî0ä÷óÿ0å÷7ø0å÷¢ø5€5êŠ’;"!3L2h1 å÷#ú @ z(ÑN ]€Õ`4àz!Càr9z€€‰‰Cà`4àzû!@€€àrék ˆsék° �!0ü÷ù˜! 0Ás°ð½øµ%$•ðhêðVë>'ðXë9ðÐí©BÒA11Uà˜(ˆBÙHa0à¹BÒ000Ud$$,äÓø½pµ 0!ð*êŒ  t `t  t$ àt0  uH `u` —~.¸E‹£ ul àuzH"h)@ðFê
 àw ÿ0uIá0�ƒIÁƒá À `  4 p `pp½ñµ‚°˜î÷Õü˜î÷þ˜î÷þ=ÿ5Ó5("Í1$0ðê˜9ÿ÷³ÿ	!‰ yv	!É`@k(Ñ !(ðêZH€hðÞíWH�h(ðê!  AUÚ ]pr( 0�x˜)t0ððé˜x˜€0uÿ!ô1É]Au%!Iapzwpz`7¸rþ½ðµ!™°
+¨À(î÷zü(î÷ºý�!‰@�(î÷¦ý :I"i€ ‘C/Ñh),ÐAh))Ð�h)&ÐÁh)#Ði) ÐAi)ÐÁi)Ðj)ÐAj)Ð�j)ÐÁj)Ðk)ÐAk)Ð�k)ÐÁk)Ðl(Ñ °ð½ðpéð^êð`êÀÀàw `ƒ " 2 ƒ!	#’ÛQrã‘r“˜bÿ'ØbŸvÐsv™uc!	a
+b"ÈaJbˆbÿ÷Dþ(Ð™ t
àø Í¤ÍìÈ+	¨Íü«!Í1"¨‘ðJé¨ð"ê¨ä÷û À0€~"#©ä÷—û !Ihq ir¹~¬ AU˜ï÷ƒÿ™(ÿ÷ðý(t0 !�ððè(€0'�u˜"÷¡ðšé˜!u(ÿ÷ßþðêë(ÿ÷þ�À5èj(ÐðÐéïbîM(hîIC(`(híI@(`íHh "C`ëJPj!ˆCPb! ðÐé! ðÌé ÷÷ù! ï÷ýð¾ëðÄéðžë÷÷³ø(h©C(`â÷û !hFðžè˜@k(
+Ñ"Ð¡hFðJé¨Àÿ÷:þ	%
+à! @ EŠÐH­!*hFð¸è--2ü2)hF«ð\ì)ªhFðRì)hFðJìàd 0Ça çðµ…°î÷@û�(î÷ü(î÷oühy(HÐ! Iihqr À0x"Cû"@p 8�À{(/Ðàl&6(
Ñ«H" £¡ðpè¨HÀ ÿ÷àý	 !àð>ì£Hál ð`èál8ÿ0 1 ">0ðXèàlð.ì!ôð�´IÌo²ºÑa!!€IaH‚˜!ÿ7Ó7ÁsÑ µå	 À @k(Ñ	&à! @ @Š€6ŠH"R0! Í0‘�ð³ü(Ñ˜ï÷lþ™(ÿ÷èü !8ðèH2!8ðè2> 6(9t02pðè1x” AUâ ]%!I(Ðbw`™Jr 5(sÿ÷Úü(Ð™ t˜"Az€hðÜéö÷Äÿ ]åþµ!
+¨À î÷Ëû î÷»û`y(Ñ þ½[IHj"CHbhFä÷™ù% @/8"#iFä÷$ú9¬ U!I ar `qOH"R0)0ÿ0÷0ð´ï"9¨ð.è¨ðˆè(Í0"9ð-ü(Ñ(ï÷æý9 ÿ÷bü?H` î÷Ôûö÷kÿ þ½)µÑ ½JxxCp
+BpÊx‹xC‚p
+ÂpÊx‹xC
+C$"	ðrï ½þµî÷Gû!‰@�qx2x	0C 0
Ý (ph� I"¨ðVï­$  @¸BØ8B	Ð™ 	X)Ð(ÿ÷´ÿE-d$$,êÓ˜™(@pqx2x	C€0p
+ppþ½
+J¼çDIRECT-£€F^N^ÿÿ§€¨€:ÈÍ'òƒùJ¤çùJ¢ç!ApÝ!pP!�po!Ápš!q	!AqpGµQxx	 0Cÿ÷èÿPxxCYx@€p
+Pp½pµ p"éàðäî¨y q `p  pp½pµp
"ÉàðÔî¨y q `p  pp½ÿµ�°$î÷¤úP10‘ÿ÷Òÿ!àš Rà7z?z»BÑz*@2d$$và@
+›˜BìÓI		˜�BâÓ@5ìu˜�xBx™CHp
+ˆpäþµ#ºx|x"CÐ(Ñ þ½(xÝ(
Ñhxø(Ó­Eöç)Ñhxü!$à(ÿ÷`ÿ›ø$ix¨	‘:x
+pºx~x2CJp
+Šp¹x~x
+Û2C	8”B‘ÓÁ¬'y°M,¼Þ˜ÀðPî¸xyxC™Aix$Àhp¸xyxC™É@!ð6î þ½ÀŸ�hxÿÀhp à™"8ð,î0hx6?.hp	Ð8ÿ÷
ÿ˜=€¿�˜�˜û$�¦BÜØ.Ð™28ðî˜€�hx€hp¸!ðöí˜þ½ÿµƒ°'<—î÷Íù˜ÿ÷çþ�!˜¹@�BÙ˜�BkØš˜CBaÐ˜@Ðš
+BÐ ÀC°ð½#[Ê™BrÐÜ)jÐÜ)SÐ)XÐ)ZÐ):Ñ(]Ð4Ê45à )bÐ@)gÐ€)lÐÿ9I,Ñ(nÐJHšà!ISŠB{ÐÜÿ:ÿ:’8Ð!‰QiÐ"Ò‰ÐR‰Ñ(gÐ=HŠ8€à!‰YjÐ"Ò‰uÐR‰yÐPÑ¬l xaxCÐ˜!ÿ÷ëþ™@�??/‹Ó˜žç(Ð*H+0Yà¬håç `p píç(Ð4¼4Üç,hÚç¬kØç(Ð4ã4ÓçàlhÐç(ÐH0=à,lÉç(Ð4Ó4ÄçìhÂç(ÐH
8/à¬j»çlk¹ç(ÐH"0&àll²ç	àÿç(Ð4ç4«çli©ç,j§ç(Ð4ÿ44¡çìiŸç(
+ÐH68ààµ»ùgàlj�ç(ÐþH4‹çìk‰ç(Ð4Û4„ç,i‚ç8µî÷ãø"#!(’ÿ÷ÿax"x	C	!p	
+ap8½þµ'î÷Ëøpy(ÑGèI;C(Ñ(€0l� À5(p�!0ÿ÷ßþkFy)pà"!0’ÿ÷Óþax"x	C	!p	
+apþ½ÿµ�°$%Bxx‚xC	ð˜í	
++++ 0
à)Ñ%,0à)Ñ%$0à)Ñ
+%*0 xÝ(Ñš9 ðù(Ñ Kä`x€$(-µBëÓ Aäpµ�xBx1ˆCÉÀ1€à1ˆ¡BÒb
¯I$"¨ðøø(Ð p½1ˆ	1€p½hx0€¨,äÑp½à‚xCxCÓ‹BØxõÖd¬Q“Ó™m+Ñ pGÀ‰É		)ëÑ pGÝ!µp!@p
+–I@ð>ì½øµ3hˆ™˜p
+ˆ+ˆÒ’
+€‹I:ð²ø( hÑÿ÷ýàÿ÷Ùÿ h@0`˜)ˆˆ@™€/€ h¿À `ø½µ xÝ(Ñ{I" ð‘ø(Ðd xÝ(ñÑ ½ÿµ�°$(Ð(ÿ÷ãÿ@1h)Ð7`™IÐ™ˆBÛš)8ðäëLå(
Ñ(x8p­¨xixhx8p¨xCxp¿à(
+Ñ")8ðÌë©xhxC­à")8ðÀë©xhxCÿ˜@Ð˜À°BÚ6íà(]8U(AxÝ)ÑIIÀ"ð.ø(Ñ­d$$´BìÓåÿµ ‰°Ý!�	˜p@�@
+™	�ðŒë	˜á'¿”	�
+™"¨ð
+ø(lÑ.°�2I"¨ðø(~Ñhx˜	ÿ÷ÿ(uÐhxµ�‰à¨xjxC«‰kFŒ‚ÛÒºBÓ™kFŒpŒ
°ð½*x*mÐÂŠB;ÒÀÿ(
+ÓJ©¨nFÆ#ª©	¨ÿ÷ÿ©xhx
+C	˜Ò)ð6ë©xhx	C	˜kFÀ	�©xjxŒCÉ@�©xjxŠCíEÀ�<àn vŸÀ'òhàÀÿ(
+ÓÿJ©¨nFÆ#ª©	¨ÿ÷Çþ©xjxCÀû(Ø"ÒC(	™#ààÿ÷óþ¨xixCkFŒÉ@�¨xixC	™É@	�(©ÿ÷XþkFŠ)ÐpçPç«‰kFŒBhxÒºB$Ú@ÿ(Û
+š©¨’‘�#ª©	¨ÿ÷�þhx±	˜ð¸êhxkFŒ@�hx	™@	�hx­E!ç™kFŒp˜‹Œ@€Gçÿµƒ°!žš‘`(!`HÐÀI"¨ðÿ(hxÑ�­‘�Ÿà€9?-/pÝ¡à•+x!hðZë/Ybl3P]pT7<FAKfuz-5` h"àu` h"C `˜‚xCxCÀkF‰k¿Ú†¨UÀ	J�BmÙ˜h hH@C˜©`˜ÿ÷ÄýQÑ oäµ` h"Þçõ` h@"Úç"ua hÒÕç"µa hÐç"õa h’Ëç"5b hRÆç"ub hÒÁçµb h€"½ç"õb h’¸ç5c h"´çÿ"uc hR¯çµc h"«ç"õc h¦ç3à5d h "¡ç"ud hRœç"5a hR—ç"µd h’’ç˜kF(8‰?(Ð/Ðoç �	àkF‰-�kF‰(òÑ˜8?/Ý-ÐDç0\äþµ )��Ð,(4à\J!(#ÿ÷ý,Ñ þ½hx)xCa@ 0˜L!ðzéš’+ ª©ÿ÷	ÿ.Ð™1`/âÐ™9`þ½ðµ©°!.Ÿ&‘í÷pý  p 1`p"1 ðŠé`x!xC€ p
+`p(
+¥pàp8
+'q`q`x!xC p
+`p 0'�px1xC (~Ù-&Ø5(586àhx­1‰6E&I"¨ðßý(Ð.ïÑ`x!x
+C’I'˜+"ÿ÷«ýax"x	C@·àJ!0#ÿ÷{üJ!0#ÿ÷tü(�`x!x
+C’I'˜+"ÿ÷‹ýax"x	C@
+ pÀ?-ap{Ð°x	(wÑ ª’�0àvŸÀ'ò«ÿ÷4ÿ˜€Õ+(j 3	"©ÿ÷üü˜@Õ(h+"©ÿ÷óü-RÐ(h(OÐyÀàcàJÐ «p(j(ÐÁ"ØðÞè0 0B{1
+¨.1@ðÔèh{«€
+Xp™pax"x	Cá"’‘B'ØÀ&�'˜Àÿ÷¬ù`x!xC€ p
+¿`p'˜??Å&š(©ð¬è`x"x&˜C p
+`p =é~&˜èvax&˜
+#x8'™C’úI(›"ÿ÷òüax"x	C p
+`p)°ð½µí÷^üðbèðPéðRéa‹$‹	IðÈëd#XC½éJ!#µÿ÷ªû(Ð ½ 0Ax )Ð pGµí÷9üÁÉ@¼—�¤Y4f?µÉIÁw½§!ÝHÉµðè ½óµ ±°0���1˜í÷!üª’�2˜!ª«ÿ÷hþÐ h(Ð j(Ñ 3°ð½™ËM‰Õ# 3*©ÿ÷&ü˜@Õ h#*©ÿ÷ü�žÿ55 6à!j"Éhðšü(Ñ(Úç(xmE??°z¸BìØÚ÷Áü�Y!(ðúï h"Àxhs0Ÿ!jÉhðòï2™¿"1èðìï!j¿ˆxKxC(’	10ðàï j¿�xBxCÁ)p˜"ÿ0@‚t˜Iÿ00yÃxCQÁp	
+q°z@°rpz@pr˜Ú÷�ü1˜!ú÷Cþ¨çóµ…°%)HÐ˜í÷Œûÿ11‘
+yÉx
+C9xIŠB9Ó		ÿ44 6‘à"y`ðü(Ð xdm--°z¨BïØÚ÷Gü�°z@¨B&Ý!x`à8x@¼B�Ðš9 ðtï`î÷Ãø(Ðí÷úÁm)Ñ åÄe˜$?m--°z@¨BÜÜ˜yÂx™C@™Èp
+q°z@°rpz@pr˜Ú÷ü˜!ú÷Îý úäóµ…°
Ð (`˜(@Ð˜í÷ûùÐ& 60{Á7Ð˜@y(xÑ¡ ]Á	tÐ@Çðé�˜‘€0ÀŠ¢h†˜ãh€™AÓáh h#Y@X@CÐ¢h˜ãh™€™A#2ðFè8È8‚BÓ-Ð°(` ´ä-GÐ¸(`Dà€BÕ˜'@y(Ñ'¢7xðï�xðï�8	0ðúîðÀè¢hãh€™AÌ€YA¸B#Ó$À£A™ðè˜J�BÓ˜@–(ÙhI-`Ð(` °sàPh@-P`Ð˜@(`´s°{jä häpµ$M& ð¶ë1¡@¨iBüÐd$$,òÙp½'òvŸÀøÿÿÿÿ¨Í@¢€µ$ ðžëd$$,÷Ù½pµí÷_ú@k¨BÞÑ è÷¹ý 4àz(×Ñ àrÿ÷áÿ Ý÷.ýÏçµí÷Iú@kð0ï!ac½øµ
í÷=ú0ÿ÷íÿÝ*b ]g¼ìÙ"#’)H43*1ð8èø½y(ÑIy )Ð pGy(ÑIy )Ð pGµ î÷²ø(ÐAy¡BÐ ½øµy(%Ñ(€0kJDh#`x!x'C 7! ÿ÷]ùAxÂ‰Rcx²&x3C[#p
+*cpÐAðî!(ÿ÷üøø½K]vŸÀµí÷Ûù	"Ò!€�u!I ar ðné½þµŸÈ"+Ñá"’©¨á÷þ(Ðš#21(—ÿ÷9ü˜Š�r	
+Ár™(á÷¿ý þ½ þ½8µ“I"ÿ÷Óÿ8½0µ‰°
¨â÷…ÿ(í÷–ù"R ©r hq "AI¡wÚ ]#©ã÷øûI  kF€"a¨ðî"(#iFÿ÷Îÿ(ÿ÷’ÿ	"!Ò �u	°0½µí÷eù,	Ñ	!ÉD k(Ðã÷Øø  c½µí÷Uù	!É@k(Ðã÷Êø(Ð ½îçµí÷Bù	"Ò!€�u ÿ÷[ÿ½µí÷5ù	"!Ò€v½pµ!²°‘‘í÷'ù.GÐª’!0ª«ÿ÷lû=Ðpx2xC09,0ªý÷#ø˜(0Ð j(-Ð™‰Õ# 3	"©ÿ÷$ù! @.pŠ
(Ñ˜"€·¡ð¡ù(Ñ³I jØ9À"ið—ù(Ñ˜™Bx­H‰Ò8(ðí˜@x€p‚2°p½µí÷×ø	!É@€}½(ÐBy*Ñ"R€rpG(Ð@h(ÐÂxPÒÒˆBÓˆBØ(Ñ)Ñ pG*Ð pG pG pG÷µ„°
˜í÷³ø˜í÷£ø‹O˜Ò?(>Ñ˜!Aq À0x%)Cp 8Á"CÁwál)Ñ"à€¡ðªìø þ÷ú!!I aH‚ 0Åaà	"àð˜ìál0ÿ0 1 ">0ð�ì! @! A‚! 	qÈa  4às°ð½˜(úÑ˜!AqfH)jØ8É" ðtì"àb¡ðnì! @
! ]NA‚¨j²>(Ð	")(1à kF•¢Ã´œaO-idq Xq ˜q!ØðRì	"© ðPìËçóµ ƒ°�˜í÷%ø!‰Fõj'MJ?-ÐàÁi)Ð)ykFqiyYq@jC‘z(qXzhq™˜þ÷¸üðj(ÐàÀi(ÐkFy(qXyhq°ð½óµ�°
&˜ì÷ïÿhi	'!ÿ(ÑàAuþ½(i(ÐàAuki„FÚy
à)i00\ÉyˆBÑ!`FAuàv66²BïØà@}(áÑ&à6²{’ii˜Êyóþ÷ý @0†FÀ}(„FÑ áHuþ½!
+à+i+Ð'@7?~ÛyŸBÑ"#@3~·x»BÑ!@„EéØ%#[*Ñ(iÀyà)Ñ°xáwþ½DIRECT-pF~áw°pïçÿµ·°$&'7˜”””ì÷rÿ8˜(Ð#ª’8˜!ª«ÿ÷¶ù:˜(Ñ hÀx(Ð ÀC;°ð½˜ÀÕ`h#"©þ÷tÿ˜€Õ# i3"©þ÷jÿ˜Õ#`i3+"©þ÷`ÿ˜ÀÐ# h3"©þ÷Vÿ	 À(!6�AuI!	 iÈp qí÷Àý� í÷¼ý�˜(Ð˜@zÀÕ(ç0©þ÷Hü©hFðÒí˜«p «Øw˜~Y~C@Xv
+˜v �˜â÷{ÿ(Ð˜(Ð7˜ì÷½ý)Û1 !ªþ÷3üpz «Ør&!¨v a:˜(Ñ(P0�xCx
+C’!ð°ï7˜ÿ÷šú(à0�yêIÒIÒC�q˜(Ð¨`a ÀCþà (€j(Ñ à6˜@}(Ñ˜(Ðci©Úy«’Úàî B]’`i+Âyç37˜þ÷öûW @](Ñ 6™Hu:˜#(Ñ,1Ð l(+Ð`i((Ð h(%Ðàh("Ð`l(Ð j(Ð ià`h(Ñà:˜(Ñ,Ð l(Ð`i(Ð h(Ð h(Ð`l(Ð j(äÑ6˜Cuà6˜@}(Ñæ @]A ÿ÷�ý(Ñ6˜	!Auà(êÐ6™I})Ñ7˜!ÿ÷˜ýah)Ð:˜(	Ñ(à0âs	˜e÷º‚yÉxR#R‹CC‚q8˜ 0Áy9˜ 0Áq˜(Ð(@0Á})Ð%!I~iwâ!HU(P0`a ÀCà7˜@y(Ñ7˜!ÿ÷þ6˜@}(Ð7™ Hq7˜"R!€r ð í7˜@y(Ñ)Û1 !ªþ÷=ûV @] «˜r% @(Ør!¨ aA ÀC:™ À)
+Ñ7™A&Iyö)Ð !Cà:˜(Ñ7˜þO@y(Ð°ÔüO0Ô ÀàúOà:˜(ÑùO0ÔøO°Ô @C–9™7˜;"þ÷ßû9˜	BxxC@9™p
+Hp:˜(Ð9™7˜ÿ÷uý Bæÿµ…°ç È'�0‘ì÷”ýÿ!�‘10â÷nüÑ ÀC	°ð½py(Ñ˜í÷øúÐ ì÷‰ý ì÷Cü@0~na(‰DÑÕIh@`âçpy2˜2(Ðª·!‰q(’Ñ/Ð™Í1š(
#â÷�ü° (�˜	'	(Ñ & 60pÃI°wpðné˜°q`x!xC0à˜(Ñ& 60pºI"pðZé7q˜pq`x!xCÀ p
+`p˜` �çþµ¨â÷û0ì÷ ý!I u(r ð¶ì	!É`€~ÿ(Ð"#©â÷Œû (r¢H"’"0	#©ÿ÷bÿ%íC(Ñ˜‰!:0ÿ÷wý  @~ 7øq˜â÷hü(Ð(Yåàk(ÐðÎé àc"#’ŒJ�H<31ðÞê Gåðµ £°��(ì÷Ëü @("�z(}Ñxx9x> 6
+C!0ðÿ
+�xx9x
+C2!0ðÿ	�
+˜(Ð
+˜Ax€ðâë(	Ñ	˜(\Ð	˜Ax€ðØë(UÐª’!8ª«þ÷ãþ9�hy1(!‘nÑ˜(CÐ˜Õ˜›€k83	"©þ÷¡ü˜€k(Ð!À"Í1ð ý(Ñ8XI"0ðý(wÑUI"¸ðý(Ð!"Í1¸ð	ý(hÑ í÷ôú� í÷ðú™)Ð™IzÉÔâ÷Êü(
+Ð"EI°àQàðîü(ÐpxV÷Ç”iè˜Ï¼àpx(HÐ>I"°ðâü(AÑ ÀÐ5H"!!˜ð×ü(Ñ(ÿ÷þþ @@ w"˜z(+Ðà(Ñ(ì÷$ü�px(Ð+I"°ð»ü(Ð˜™ÿ0á0‚|ÿ1Ó1°ð¯ü(Ñ¯!‰(â÷ÜúIÐ0‰€�Ñh@`#°ð½*· ˜2€ua)’!š0#â÷û° 0�(€0Àk°0�Axx
+C˜à5"5"5¢t#t+ÿÿÿÿÿÿ¼ÍvŸÀ€–˜Õ^´Íc˜ 1 0 �ðØï˜BxxC™p
+Hp"˜z(Ð(
+Ñhy(Ñ ˜ý!€z@@@ ™ˆr˜(Ð™(þ÷Âú1(ã÷‡üš!(#ú÷>û0â÷û(‘Ñ	 À €j(‹Ðhy(ˆÑ"’I"9(#ÿ÷¦ùçóµ ƒ°� í÷úì÷hû í÷ú í÷üù,Ð`zÀÕ©¨ðê8â÷Òû(Ñ8ì÷ú@z� @0z(Ð,À4 ~™ˆB	Ñ˜!ÿ÷jú˜!Þ÷qý°ð½˜!ÿ÷`ú% @(@(Ð# @(�‰@‰à0þ÷Áþ}%íEC¨â÷ù ~"#©â÷–ù¡~˜"Þ÷üý˜)Þ÷ÁüÓçµì÷	û 0|½þµ
þ÷ø kFp Xp ˜p")Øðï0iFþ÷øax"x	C@ p
+`pþåpµì÷ãú	 À(A~' U ý÷÷ÿûIiþ÷døax"x	C@ p
+`pp½óµ ÿ°Ò°Ë�Ê�Ñ˜ì÷ÁúÑ˜@y(~Ñ8 0Ð�x(rÑ·ª’!8ËªÊ«þ÷þü€k(ÐÊ™	Õ+83	"©þ÷ÄúÊ˜@Õ+"èi3ÒC©þ÷¹úÚH9	0"10ð²îÐ˜7Áy	 À0Ï�Av!ÿ77AuxÎ�4à©k8É@"ð$û(%Ñ8A{‰ÕÏ™"ÊuÏ™$Lu"À’Ñ˜#Ì©ÿ÷Äü(6ÑÌ˜‰	 1Ìqâ÷×ù(<ÐÏ˜!Au)àÏ™ Hu4à8]dÎ˜$yÂxC¡ˆBÃØ°H"øþÓò�m»BÐ	0’2ààÑ˜	#Í©ÿ÷˜ü(
+ÑÍ˜‰	Ñ˜ÿ÷HÿÍ˜â÷©ù(Ð ÀC°T°ð½(Ñ¡Hˆ(Ðè÷¾øè÷Uÿ ðçµ”°ì÷úª’"! þ÷\ü!ÉC(Ð€h(ÐÀx(Ð°½øµì÷ùù!‰@i,Ð ykFp`yXp(x qhx`q"90ý÷™þkFx qXx`qø½ðµ
•°ì÷Øù}K.Ð"Ò
+–¨’à"’)8ý÷òÿix*x	C(p
+hp  jªC‘)8ÿ÷°ÿ°ð½þµ
ì÷¨ù"’*0	#©ÿ÷ü%íC(Ñ˜‰[H€0!8ÿ÷Œþ  @~ 7øq˜â÷ù(Ð(œä"’#}"RHD31ð‚ï �ä÷µ‚°
˜ì÷rù"’˜*	#©ÿ÷Êû%íC(Ñ˜2‰˜9ÿ÷~ÿ  @~ 7øq˜â÷Ñø(Ð˜þ÷pÿ(æ k(Ðð4î  c"#’4J5H™83ðDï æóµ‹°ì÷6ùpy(Ð 
°ð½˜™0
+�"0#þ÷€ÿ"’
+š0	#	©ÿ÷û(%Ñ	˜‰!I u(r ð°è™:0#ÿ÷Žù(Ð (r ð¤èà	 À'x}(Ñ (r	˜â÷uø(Ð ÀCÁç(z(Ð  kF˜€
+™"¨ðí{}	"0©þ÷<ÿ×ç’Lõ ¡_@
…_àk(Ðð¼í àc"#’ÿJ<31ÿHðÌî‘çóµ$—°””ì÷¼øÀk(Ðð¢íìcª’˜!ª«þ÷ýú!Iw(Ð h(Ð™ÉÐ#3"©þ÷¾ø hÀx(Ð 8r ð2è ÀC°ð½ i(Ð%!IiÀyà5w¨p!9rpy#(Ð(Ð#™"0þ÷Ïþ âçµì÷oø!Ia
+z`1Êvby
+wby*Ð*Ñ%"R€àÀ0€~Hw½óµ™°%˜••ì÷PøÀk(Ðð6íåcª’˜!ª«z¾¿@Œq‡9cþ÷‘ú`Ð¨h(]Ðš!ÀxI	'Vÿ(Ñ˜!Aq 0r¨á÷þÚ ]"#©á÷¤þÿ áˆv"’#«J©H™<3ð î¨hÀx(Ð".à˜"0’˜	#©ÿ÷iú('Ñ˜#‰
+™˜ÿ÷�ø(çÑ˜á÷vÿ(Ð áHuàä`}(Ñ 0r™˜"#þ÷Aþ`}(Ð"™˜#þ÷8þ ÀC°ð½óµ ›°��˜ë÷Ñÿ�8"0’˜	#©ÿ÷'ú(
+Ð˜@y(Ð˜þ÷Þý ÀC°ð½˜<‰(4�' Á]˜ 0Áqxx9xC>L!¨ð”ë`xoI€-" ðHø(Ñ¨	 ªðZþvd.Ý,çÑ˜(3Ð˜«yp@yXp˜!‰@i(Ðy«w@yXw«Œ™‹BÐ�
+C˜"		€)b
Ð)Ð€)Ðÿ9IÑ!à!Abà!ûç!ùç �™˜ªÿ÷Pý˜á÷Éþ(…Ñ˜@y(Ð˜þ÷dý«‹"
+C˜9þ÷‘ý yçóµ •°�˜ë÷.ÿ˜œAxxC(4>L!¨ðë`x-I€-" ðÄÿ(Ñ¨	 ªðÖývd.Ý,çÑ˜(Ð˜«yt@yXt¸k(Ððæë ¸c	!É yˆu˜þ÷ý«Š"
+C™˜þ÷?ý °ð½ðµ
‰°ë÷Ýþ(ý÷÷û	!É`I&Fua8ý÷]ü-	à€–˜Õ^''ò’, ]€
+Ô kFq Xq ˜qÞqz r8©ý÷=ü@	°ð½ÿµ…°&�˜–ë÷ þ*’#š˜©ÿ÷öø(;Ñ˜‰-Ð-%Ð-Ñ˜!ÿ÷¤ÿ™& U`x!xC€ p
+`p˜©þ÷Wû(Ñ"’üHš™«ðtì	!É˜ycà ý÷�û9~1ý÷îû6Öç˜á÷Öý(Ð ÀC¨ç ¦çþµë÷Mþ  0ƒy@y'7(ú¢gˆuW]êÑ( ](Ù( 0{ÂÐ@@s"	!’‘"90ÿ÷…ÿ	! Éiˆc  ä÷µ„°
(Ñ ì÷ºü.Ðà y(*Ñ ë÷þ`y('Ñ('0ì÷‚û(�	Ð˜ë÷þ˜ë÷Ìü@0~/	Ð0"©Í0ð¥þ(	Ñ/Ñ¾H"©0ð›þ(Ð ÀC°ð½¨á÷Òû¡i"i	 H1ÀŠB5Ñ7! ¹uðäê @ !�r`zÀÕ à ðjíá÷£ü"}!¸v¨HÒC	#è÷ðù(°d	Ñ¸uÿ ¸v˜!r ðTíwà‰}"@Ò)ðÐéðîmà7¸}(Ð°l(	Ð‰E °d  @](Ð(IÐ˜	(?Ñ& C]ð˜ê	 VVM-27V¸~ÿ(Ð"#©á÷ü) ÿ÷Dü	à @ z(<Ñ) ÿ÷ý ¸u5à @ z(/Ñ) ÿ÷£ü!¹uxç) ÿ÷Gû÷ç) ÿ÷�ýnç) ÿ÷!þiç˜(Ñ  @](Ñ% @](Ð(Ð(Ð(Ñ) ÿ÷túSç) ÿ÷éþ Mç "µR\*Ð	*Ð*Ñà	"ÿ÷ÿ ½øµë÷%ý,Ð,	Ð,Ð,Ñ pq0þ÷8ûø½èk(Ððüé èc"+’LJLH<31ðëø½pµë÷ý,Ð,Ð,
+Ð,Ñ	"Ò!€Au!(ÿ÷#úp½pµˆ°ë÷èü& €](Ñàk(ÐðÊé àc  kF€"±¨ðøèhy#(Ð#(Ð#"(iFþ÷!û°p½øµ‰  0x)Ñ@x	(Ñ" #I"0à)Ñ  I"!0ðXý(Ñ ì÷CûÐhy(Ñ ø½(ë÷�ü x	
(Ñ· €"¡(ð=ý(ÐH"¡ð6ý(	Ð.	Ð0"¡Í0ð,ý(Ñ 8`(ø½?_Œd€–˜Õ^vŸÀÈò÷µ†°öHÈ� �8‘ë÷^üóK”™"Àðzè¤ÿ!”‘18”á÷.ûÐoa(‰DÑ ¯GO„y£2Ÿ»šåÿ!‘1 ð`èxy(Ñ8€0Ái€i‘�à(Ñ™"à(
Ñ˜@x
+(öÐ(Ñ "1Í1�¨ðFè· €ª9’š(
#á÷Kû˜@x
+(Ð(#Ñš ™’ 0ð.è`x!xC™‰@ p
+`p˜(Ð(á÷xû(
+Ñ Kå	 À0c°!C°wôç @åpµ
‰Fi	n.Ð0y(Ñ0ë÷Þû-1Ð% 5(x(Ñhy(Ñ	"Ò ‰Hu!0ÿ÷þøp½(üÑpy(ùÐhx(Ñhy)yCÑ0þ÷Úù ¡I""0ð_ü(æÑhy	(ãÑ!0ÿ÷¼þp½ 4 x(Ñ¡y0ÿ÷wþ x(óÑay0ÿ÷•þp½ðµ	 Àÿ°¶°´�~(	Ð)j‹HÉhÿ÷Ùù°û!@°w-2Ðèi(/Ð)j),Ð$yÕ+3biFý÷”ûïi|Hÿ€0³�$à8³™@"ðü(Ñ)jvHÉhÿ÷¯ù°û!@°wpH)j 0É"0ðtï´˜!v°6°ð½8]d$èi�xBxC BÓÒïç÷µ¢°cHhë÷6û.fÐª’"#˜«ý÷{ý˜€Õ+(j 3	"©ý÷CûTH!(j(MÐÀ"ðÂû(GÑá÷ìù	!Éaˆv ˆu0(Õ#ž",6-Ð(hyÀÐ(j(Ð kFppx"€Xp
+˜p)jØÉðï¨rx±@ðïjF:H9hÿ÷kù ÷!àð	Ð"˜ðèï"˜þ÷±ý @@àðÕ"˜þ÷xù ï!@ w%°ð½pûÕ™"(ÿ÷*ÿõçøµ
(Ðy)"Ñ#L( `Ð hà ì÷Nù `ë÷¯ú(ý÷^þ(Ð h)þ÷vù"’ hI")#þ÷Ðø² h)ÿ÷[ÿæµÑ ì÷-ùÐ y(Ñ ë÷‰ú @ z(Ð(Ð`y(Ñ ½ ½xjvŸÀÀÍøµ
ë÷lú�à¨xixCÀ+x? ›ðfï	6UKZPr,jrF_er:) Ê0à:ÿH)PàðnîVàt¹z€}ðèL×:) ¼0÷ç :)Ó0ðbî :)Û0ð\î i!IC a?à :)ç0ðPî!ì U5à :)ã0ðFî à0‚yéxÒÒI
+C‚q%àäH:)T0àáH:)}0àßH:)¬0
àÜH:)§0àÚH:)Š0à×H:)‘0 ¬ç:) Û0§ç(Ð*x !i�@C!aíð6.Ðzçø½÷µˆ°
$ë÷Þù­' 1i¸@BTÐ»ðÚî	:�b���-��Sw†�1	"Ê1(ðèí	5	4{à1"¼1(ðÞímdrà"1Ó1ià €0�Â‹¯HÒ1(ðÌí˜À‹
+à0à0�‰ÁÒ(ðÀí˜‰íà0à0�€y1@�˜ã1‚ˆ(Òð®í˜í(p˜€ˆäE$<à! @0�BŠ•HÒT01(ð˜í˜@ŠÕçE 0�{Àz
+CŒHÒ}01(ð†í˜{ÂzCÀç	 À0�B‰ƒHÒ¬01(ðtí˜@‰±ç"1Û1(ðjí54$$??/Òaç
+˜€°ð½ðµ&>àkx,x#C
+CpO$$ã¼B?ÐÜnOã¼BHÐ
+ÜlKã@Ð+8Ð+>Ð+Ñcà+<Ð+<Ð+Ñ�c	à
++"ÐÜ+#Ð+'Ð+Ñdëx¬x#C
+C#ô$&6Àà
+Ð+Ð+èÑÐaæç`äçP`âç�`àçÐ`ÞçaÜçPaÚçbØçPbÖç�bÔçÐbÒçPcÐçÐcÎçŽBœÓð½µ
+}4*	Ð*Ñáz‘’c{¢y!ÿ÷ú ½øµ
ë÷»ø5#){Àj{Bv5H6Oð¶í:::: :-:¡"C¡w`")àðÂìàk(Ðð†í àc"#’(J)H<31ð–îà`#H"€) ðªì !C wà¡"C¡w`0ÿ÷ø")àð˜ì ø½µŠ{*Ñÿ÷¬ÿà*Ñÿ÷•ÿ ½óµƒ°'˜ë÷_ø˜�Áx€x
+Chx+x:	CàÝ: ~u«|�¦Á/—þïÿÿÀÍ€–˜Õ^5ê(Ðë(tÐì(sÑ˜)ÿ÷Èû2âhx*x‰C6(~Ñ­Ýà•hx)xCÿ;};ð&í$3<DPÊÊÊ\~ÊÊÊÊÊÊ‹›ÂÊhy)yC ƒèy©yC`ƒ`i!àhy)yC !U`i!C`a¥à ")Ä0ðì !À0Ap!A€`i!íç ")!0ðì`i!äçhy)yC ƒ`i!Üç !à0Áp�y*yÉÉRC�qyà ! 0w)yÁwiyÀ UoàSáÅá À0!�Átèx©x
+C )Ú0ðØë˜ê÷½ÿ˜ê÷wþ˜€~àcàHr™ 1s˜!ø÷NúKà!Û Uèx©x
+C )â0ð¸ë>à# @! Áqiy*y	CA�éyªy	C��.àèy©yCÂIˆBÑjz(zCŠBÑ " Âabàiy(y	C  Áaêy©y
+Cbjz+zCAbàhy)yC!	aˆb˜-Áx‚xCE06.ÐçEá(üÑ•­.tÐix(xCÿ;};ð>ì#0=GP–––[c––––––n{‹–!©p!ép ~-(p`~hp ~¨pà~èp-zà!©p!ép- 4 xFà!©p!ép-!"Ä1(ð,ë­eà!©p!ép-!"!1(ð ë5Xà!©p!ép -(p`hpMà!©p!ép-à4 y@à!©p!ép¿ ]-À4(p xéç!©p!ép-À4 ~à!©p!ép-à4 x(pm(à/à!©p!# @ép A‰-)€€‰­à!©p! ép Ái-)€j­)€@j­à!©p! ép- €j(€­˜™(0ˆp
+Èp™àÿ!~1)p	
+ip!©p!ép  ]-(pÿ m}0(p
+hp ¨pép ~-(p`~hp ~¨pà~èp-ÿ �0(p
+hp ¨p èpxçhx)xC(bÑèx©xC(	Ñ˜ü÷£øà'[à ðÄîWà(Ñ˜û÷
ÿ
+à(Ñ˜ü÷ºpáx…õüûÐùà(Ñ˜ü÷~ú(èÑåç™"R‰(Ñ˜@y(ÛÐ r ð î ðÐí0à(	Ñ˜@y(ÌÐ r ðÄíÈç%!I(Ñ à(Ð(Ð	(Ñ aHwà
+(Ñ	! ÉaHcà(
+Ñ	I H`à(Ñ˜@y¨p
+èp8°ð½ ûçÿÿÀÍ0µ øL`"JC€2Óz+Ñ“zUz*CI		)îÓ0½pµ íL!AC@	Šh02“yRyCÊh02•yVy*2Cš(
+‚éÓp½pµ àM
&¶‹[›[i+Ð 3Û}+Ð@+ÑRI		)èÓ,Ð"pp½µ“ÏKT2’	:1ð¤êÊH8�{‘j˜å÷jù½�ÄHµ	
 €`i7!ð é`i!90ðšéai  1vai@1uai 1Èu`a½øµ&47!aC³H
(Š(Ð(}&(Ð /uì÷Õød$$,o‚êÓ.	ÐªK"’©JªH13!ðRëø½¥H)0‡`ø½óµ‰°ÿ÷Lÿ�	˜xÀ	˜@x€@� ÿ÷oÿ%.�|Ò˜H8�{‘j/�Ð/\Ñ	˜©ð6ê˜ðºêð¼ê#XCŒI$@�¡@€hT!kF	\~BÐx…IÀ¨@
!‰@@i!ÿ÷_ÿ(ÿ÷sÿ%d$$,Ò˜ÞçzH±	
 €`i(Ð!ÿ÷Hÿ0ÿ÷\ÿ%˜`!ACpH7"T0`a	™ðþè`ikF~@0u`i9ÿ÷0ÿ/Ñ!à!`i 0ÁuàcI°A
 €@i(Ð9ÿ÷ÿ0ÿ÷/ÿÿ÷Ãþ™ˆBÐ&à5à&XI"	9¨ðWýUI?"	1¨ðOý.�Ðÿ÷½þ$ ì÷ød$$,÷ÓIH)0€h(Ñ!ÿ÷ÿ ÿ÷Âþ™ˆBÑ˜5C=CCÐ °ð½ ûçøµÿ!>M-1(là÷Rû( `Ð‰·#F)l›
+˜2É’æ2
#à÷•û  60p!h° �ø½ÿµ�°hFÿ÷Úÿ˜(Ñ@°F�=t‰t‰Oð½‰)J
y'I		)qÑqyš!ðTé.Ð˜™ 02ðVèhx)xC€(p
+hpHx€Ô`{€@ðÎëI9‡@‰{`{9BÐ!Càû!@`s˜à÷�ûÀçµ$ ðäú(Ð ½d$$,óÙ ½DDÛG@B5‡0	Îñµ%$`!aCÿHT67 7ø}(ÑüHx€Ô ðÃú(Ð2;~927!0ÿ÷|ÿ øu˜m…BÚdÜÕ(ø½ µÿ÷Óÿ(Ñ Áç ¿çóµ�°}%-çH")ðÔï Ú÷ü,ôÐãOi!8l`a° % �(ðÈïš1(ð¾èÜH"€h!h#Ú÷/ý(Ñ8l€!ç÷Gøà ðxï þ½ÿµƒ°¨
ÿ"‘2#©Þ÷Ìÿ(9Ð™˜1ë÷�ÿœ r
+àrH4-Ð") ð”ï.Ð "1
+0ðŒï/Ðÿ �0 p
+`pÿ P0 p
+àpÿ" D290ðxï˜Áz‚z	Cÿ1T1�r	
+Ár™˜Þ÷\ÿ°ð½øµ%)0ÿ÷øý©N  p0l@zÀÕð0ú(Ð§xåhFÿ÷´þ˜(Ñ@à:)ðDè˜à÷ŸúÑ p"0lÿ÷Šÿ(ø½øµ Ix“N07)Ð)Ñ!àáx)Ñ1q!ÿ÷»ý(Ð0l#ª9ÿ÷jÿ ø½µx�JIÉ‰
"’‰Ii)
+Ð7"R\#*Ð#
+T2ðèÝæ"øçðµ 
%sL­&�	IIi)	Ð
+ 2×}/Ñ01Öu
+KqŠq@(ìÓð½
#gJ ›0µ$�‰ÉIi)Ð 1Í}-ÑÌu@(ñÓ0½øµ&\O4 Á
 €@i(
+Ð 5é})Ñ&1ÿ÷õü èud,éÓÿ÷±ü0ø½ µ�OHl@zÀÕðù(ÐhFÿ÷ºükFx(Ð ½ ½pµ‰DM$ðvï:':2:(y@(q Û÷Ïÿ(y(Ñ (qhy(	Ð8H7!@0yB¨ÿ÷úýlqà ÿ÷Ž&–‡p�R®Z#[þ(Ñ!0Ü÷ƒü,`à(h°BÐ p½*òÐ!�Gîçÿ÷�ÿ"(lÿ÷¦þ p½øµ ž*/Ð‰Œ¡x		
))Ñ% 5)x)$Ñix)!Ñèx(Ñ(0ÿ÷Òü(ÐH¢l+‘ÿ÷€þ.Ð`x"xC(°G(ÐL! hÜ÷9ü  ` /Ð9h	n‰x
+’Ñ		
)Ñ	àDDÎ00	 ø½÷µ�°%È{ÀbHíCh(Ð à.Ó  p(°ð½xzÁ 0)�CÚðÁø(?ÐWHx€Ô |€@ðžø(4Ð8!hFð¤íPH�PH�PH�`ðèí}#ÛXC«�{!CFNs—7d™7"°ð¾í˜F8EHqÐ!F1@ð²í'hFwqÜ÷¢ú(0`Ñ/8à˜!ÿ÷:ü(
Ð9J°€
"’€@i! 0Áu  p à  p(A™Ñ!!p–ç0µ ‘°�`zÀ*ÕðYø(&Ðÿ÷Iý(Ñ!Hx€Õ¨ÿ÷ŒûkFy-Ð8!¨ð8íH`!ð4íH�H�H�H”hC
+�¨Ü÷PúId`°0½ÿ÷…þ(ùÐ" ÿ÷šýòçµðÄî#XCI@yÀåµð¶îÿ÷ðÿå0	Î%�­��Šp	DD{Š�ÐùHxpGùI@
+ZR
+R@AˆIA€pGÿµƒ°ÈñI� 9G8y(ÐíHx(Ð4à$×÷Åù8y@8qhn(Ñ ÿ÷×ÿ×÷½ù°ð½×÷¸ù©hFðôí(`0€z(ÐinàÚI˜ 9	XØOš˜ ?¸Pš 7*!ÐˆBÒÔJàBin�BÙà@‰}#ÛYCÎIËiq41YZ‹ƒBØ“BØcØð¾ùà ÿ÷‘ÿaÈ‚ˆ™Q�€Âˆ™QÁ€±çóµ‰°
&h !n�hFðlì(iFø÷Ýÿ$oFà²Hx˜ˆ(h€h	 ð–í†(h!€h	˜ò÷ü†8]@8U8](äÑd$$,÷Ó0°ð½8Á”±l‘ík�øµ`#hnx�I@@XC@ 0€|‚Q"’‰Ü÷Ìø!hÿ6‰h™6°jÀ6	€]*ˆ	#ð\í8HCø½`#XCŒI@ 0{pGøµ!`#SC¡€…I&Y 1Oz+yÉz+Ñ!à€Kx+Ðÿ*Ñ&J{Òi43ÒZ~KšB
Ð‚B	Ø8ÿ÷üþ¡x"(ô÷$ý ø½"¢€."Ð%`5)s!n‰x		Ð)Ð)Ñ.Ð(�×÷ÅøiIú 9Q"ŠV*Ü"
+q"à"ªr
+yR
+q×÷·ø0ø½µAiIy)Ð‰`#xYJIIYC‰n 1’xIz	Ð*Ð*Ñ"’ÿ÷¹þ½óµ …°
�h�nðªí(h`#xHI@@XC&@ 0Bz’"‹7	‚ x	/Ð(Ð(<Ñ˜#XCD y$Õ˜€h€Õ˜)ÿ÷-ÿà˜)ÿ÷óþ!ŠÀ)Ð"}*ÑbŠˆB`‚Ù@6  u�à–(i"(Ð"(h™;ÿ÷`þ˜(Ð˜ë÷Ëúzæµ$(ÒHx)Ð!iCy	àê÷‘þ(Ð!hFë÷Jü(ë÷°ý€iF\$ °p½`#XC
I@ 0À‰pG`#XC
+I@ 0ŠpG`"JCpµIT 4å‰ð÷xü(
Ðà‰@à�5àDD0Hˆ¤ÿÿ3ðì).HÁ‰IÁ�ÿ0!0à+H`0Á‰IÁ�`0à(HÁ‰IÁ�%H! 8Éà$HÀ0Á‰IÁ� H
! 8‰@Á‰IÁ�(p½ˆ[€ÃhšÂ`‚hR‚`J‘BØŠI‚pGJ‘BØAŠIA‚pGJ‘BØ�ŠI�‚pGJ‘BØÁŠIÁ‚pGJ‘BØ‹IƒpGJ‘BØA‹IAƒpG�‹I�ƒpGäDdFˆ' N0u@œPÃµ‚°3lH
+ž` ë÷SýjI `àx@!Càp¨� „ ! 0�p± 1Áp¨j`bÖ÷TÿkF|#BR’!ˆ(3* ð”ë ˆ0 €0Ö÷Fÿ¨�@¨…Ñ¨j@¨b°n/^h•¾±¬üp½øµ‰%o@iéy&n)ÑAy)Ñ±yÉÐé÷Oþ
!‰@À‹à"’"h+!0ÿ÷£ÿà)Ñ"h+!0ú÷2þ ø½µÓy +Ñ hðø½+üÑ hú÷Oþ½µë÷òÿ3I `2I `2I `1I`½÷µ†°Fi@0ð<ê�$0�Àx€Õ ˆ8-¥€`=-Ü 	°ð½0ë÷0ø(Ð™˜ª«ð@ê(
+Ð.Ð À0€j(ÐAmIAeHD"`90ðôé ë÷›üI `I˜` 78~›BR’*™˜3ðîêkF™‰š˜ð$ê Àçðèh<l<t<x<Ô2ìôàx‹BÐCx€CxÒ’*ôÚ pGpµ‰!! U "1"0ð¨éñ -ÙJx 
’%0ðžéhxÀ p
+`pp½ðµ �°�)¨ð ê˜
+©;ª‘ðÂï(+Ñ,Ð©¨ð’ê(!Ñà˜˜	î÷ÓýkF|:¨ðˆê,Ððˆêh{){CÐš!’‘™š0ðzê
°ð½,ÐkF{¨ðvê˜"˜	ðŠïÝç 1Ix)ÑxÀÐ pG pG"(Ó pG(Ó)ùÑ pGÿµ�°„FÑ °ð½px%À�(,à`‡zyÈ*Ø{x
àbEÑ¸xà[8x™ÿ÷Óÿ€+ïÑ íd(ØÑ™�BÞÛÔçµ ë÷ û(úÑë÷œû(öÑAHhÙ÷ŠþÙ÷ïú ½µÙ÷ðúHhÙ÷†þ½ µØ÷øÿ½ µØ÷óÿ½
+IH`
+I	H`I	H`I
+H`I `pGDÍ]˜0;ƒ˜4;“˜8;�˜<;@;'I"(HiÑ�CàCHapG#Iˆk"C"�CˆcpGpµMèkDHd„Cò÷PûÀ Cèc ò÷Óüp½µÿ÷åÿÿ÷ëÿ½pµ$% ð²é ð²é ð´é ðtïò÷>MA3d™JÞÙH0û	" ð¬é) ð¬éd$$,àÙIHj
+�CHbp½À¢€¡€œÀ¨€pµIð˜éI(ð’ép½”òÌÍ!HhpGpµ
L(ÐN @paðøIˆ`5aHAi@"CAa  `p½µkFx!Cý!@û!@pˆ"Ò�C€Xx@ç!@0Ÿ!@€!CXp ñ÷ýkF˜x		C¯!@@@˜p˜½ÎÀ­€€ €À¤€J 1µ`JK`P2`ÿ"p"B€q#J"R`"
+aZÊ`ÿ"õ2‚†Â†‡B‡	JÊ€	"
+r"JrJRJ�ðTü ½èÈìÈðÈ+	IH`I} `pGxÌ;Ð;µ	hIÑ�h1ð ë ½pµIh¦iÍh,YÐ(WÐ.UÐh"+AÐÜ+#ÐÜ[Ð+LÐ+IÑÖ÷ZüJà+%Ð!+BÑ0ß÷ôÿ(<Ð""à$;ðpè0488778888778 ðþê+à0à÷ù(Ñ"!à"!0ß÷Ôþà")0õ÷üü(Ñ¡h01 ðÎêà0ß÷Üÿ"")0#õ÷Ÿüà0à÷wýà0à÷¦ý p½¡h<1åçþçpµIh¦iÍh,cÐ(aÐh&+^ÐÜ +LÐÜ["Ð+VÐ +UÑ3"!0ß÷Jÿ(MÐ "0ß÷ŒþGà!+Ð"+DÑ0ß÷�ÿ""4à';ðè	<<====<= ð’ê1à0ß÷rÿ(,Ð""Ýç ðrê&à0à÷!þà"!0ß÷ÿ(Ñ!0ß÷Šþ ")0#õ÷7ü¡hH1ãç!0ß÷}þ ")0#õ÷*ü(Ñ¡h1Ôç p½pµ,$Ð("Ðh¥i(*ÐÜ’Ð*Ð*Ð*Ñà)*Ð.*Ð/*Ñ(à÷bø(Ñ"(õ÷Jü¡h01 ðê p½(à÷8þôç¡h1óçµ
+h’Ð*	Ð*Ð*Ñà™hH1ðê ½JH!µðêIJ0ðêIJ00ðêIJH0ðúéIJ<0ð®Øa`�
+$ôé½�!J‰µ
+P�"’1€ðâé½ñçÙš�	íš½›™œÿœ!€0Ar�rpGpµ"pJCYp) ðPîp½pµx*pZx
+pYx"JC¡ðBîp½óµ�°&é÷$ú€0@z(Ð$à `C™@‹0"ð´ú(Ñ&àd¸z BïØxz(Ñ.Ñà(Ñ.Ñ þ½ þ½IH`IH`pG£�@=»�D=€x(Ó pG(Ó pG pGIxx)Òÿ pGi}"Ò‘BÒ
+1apGJiÉi€hŠBÙQpGµx[[+
+ÓÄiCi£BÙ`€iƒBÙ`½þµ
x@@� ��Ö÷ƒú0jF©ÿ÷Ûÿ°h™@�ðh™@�8Ö÷wú™)XÐ˜d#XCðüî(`2 ,Ñ˜"ÿ!ðæî™ˆBØ ,Ñ˜"ÿ!ðàî)hˆB:Øà  ,Ñ˜"ÿ!ðØî™ˆBØK ,Ñ˜"ÿ!ðÐî)hˆB%Ø þ½!,Ñ˜"ÿ!ðÈîšd ‘BØ,ëÑ˜"ÿ!ðÀîåç1i}"Ò‘B	Ó,ÇÑ˜"ÿ!ð²îÁç þ½ þ½pµ 0ÿ÷Hÿ((pÐd ` p½ ÿ÷sÿp½pGøµFMéxªxC(€xR@*Û “BÝà$“BÚ®y)ypCðxèfCiy0ðrèéyÀÕ à?(Ý? ø½8µ.L<)Ðÿ!!p¡h)Ñÿ÷Äÿ!xÿ)	Ñ%p$) Û÷¶ÿd,øÛ8½(jFñ÷–ø!x�BöÐ%p$) Û÷¤ÿd,øÛkFˆ(éÐñ÷ù8½µL<ah(Ð)ÑHø÷Tÿ ``½)üÐHø÷vÿ `` ! Û÷€ÿd,øÛ½(µÐH"ðºì½I9ˆ`pG Î5 µô÷pû½IH`pGù <øµˆ¢h ’1Ð"R�j{*+Ð))ÓðŽìD!!p!ap¨{ p'¦"0iF'qð„ìè{ö0pv7pò1!Ù\¡1•�™¶"0iFðxì(|ö0pv"0iFðpìi|°ñp‰apø½kJ!€µð\ì½ðµ
+xD*DÑ$NxŠ'%!+ð6í ,3!+àxAp)Ù$’öç’àÒx)Ð)Ð$à�pRéçx)ïÙ$íçÒx)Ð)Ð$àÁpR!àÑx)Ð)Ñqà/Ñs6,Ñ.Ü ð½m--ºç ð½pµ>H(ÿ÷©ÿ(Ñ(ÿ÷œÿà! IiHs p½#"Ò\ Ò	Ðÿ"KçpGµ
#!	\É	#Ðÿ!h1!p	
+ap!¡p!€0áp@h(Ñ!(ðÔë
+à61"hFððè"(iFðÌëàx¡xC°p½ ûç|µ(%)ÐhFÿ÷[ÿ(Ñ%€à @0kFYx‚{‘BÙ1 àkFÁ{šx‘BÐ+ àkFÙx|‘BÐ0 àkFy@|�BÐ/  € |½  € |½r-pG(µÐP0ðâì½µÐ! 1`ðÜì ÿ÷îÿ ½´*ÓC›
+ÑÈÉ£BÑ*øÒ£BÐ	*Ñ ¼pGÓÐRàxx@I£BÑxx@I£BÑ’ñÑéçÿ0â$ƒá(‚áSêCp´›ÑLåàÂÉžC.BùÐ	pR)
Ð
+÷çxIS,pÐxIZ,póÑp¼pG  á’�àÿ/á á$ë-é„ë½èLú-éƒë½èÀŸåÀŒàã
à�à ÿ/áÀ�âÿ/áðø•^ýÿ@-é ákú@½èêàãêÿ/áŸå ãV4ïÿ/áìÿÿÿ&µÀFÀFÀFÀF ÿ÷Üï¼¼G@ áfëà á@-é{ë@ á@½è@-é ã ã„å„å@½è á„åð á@-é-émë@ á½è ”å
0 áà‚à^á �åŠ0“àŽâc0 á�â0ÃãÁãQá �„åÈ6ªGX¥bO\õ@½èAàÿ/á  á ã á@½èÿ/áðµ…°ÀFÀFð
+ì •”ÀFÀF�¨Õ÷Ðí¨
“ÈÀFÀFÀFÀFð¼ë!ÀFÀFðŽè�!`ÀFÀFA˜A`!ÀFÀF˜�`!ÀFÀF˜Á`!ÀFÀF˜aÀFÀFÀFÀFÀFÀFÀFÀFÀFÀFÀFÀFÀFÀFÀFÀFÀFÀF›° œ)2¦Fð¼°pGµÀFÀF ÀFÀFÀFÀFÀFÀF¼¼Gàãàãÿ/á@-é á@½èÿ/áP á(ëà áP áÀã
 á
+0 áÐ á`Ð�â @-éú @½è` ãp ã€ ã° ãÁãÀ áÀ	¬èÀ	¬èÀ	¬èÀ	¬èÐ áÿ/áŸåÿ/áÿ/áô	Ÿåÿ/áÿ/á
+´¼pGµ!
+hFÀH�ù÷¡û�hFÈ°½ )Ÿåÿ/áä	Ÿåÿ/áÿ/áè	‘0‚à á áÿ/á GŸåÜ!ŸåÛ ãð!á�àÁãAâÐ á  ã° ã¼!ŸåÒ ãð!á�àÁãAâÐ áÓ ãð!á�1ŸåƒåˆŸå‘å€â�Ÿå�1Ÿå€!Ÿå�å ƒå€à€Ÿå  ã �åh!Ÿå‚åŒ!ŸåŒŸå,‚å ã0‚å	 ã‚å ã‚å0 ã$0‚å(0‚åd!Ÿå0 ã0‚åÿ/áð°áð°áþÿÿêþÿÿêþÿÿê@êÕ÷aþPHGóFÕ÷mý4Ÿå4Ÿåàã€å�å(Ÿå�å$1ŸåÁá0 ã�áaŸå5 ã1†åŸåîñŸå�îÿ/áŸåàã€åøŸåøŸå€åôŸå�å�ã€å�åâüÿÿ
+�îÿ/áîÿ/áîÿ/áPâýÿÿÿ/á¸Ÿå¸Ÿå÷  ã�ä Bâ ã�ä RâüÿÿœŸåœŸå€å˜Ÿå˜Ÿå€å”Ÿå”Ÿå€åÿ/á\^à]4]8]<]À^åSá{Á%|T©– )A0Þ70Þ'ƒÀŽàÿ/át!4€?0€\ð €!€D €<Æ|D0€0€@Ä €ðððð$\Ø\E§Ü\yà\-¨ðåÿÂððåÃððåÇÂððåyÂððå˜ððå=;ððå<ùñðåý^ððå-Qððå�Oððå
Qððå
NððååQððå™]ððå%ÃððåÝñððåóððå¥™ððå�ùñðå0÷ñðåÕÀðå3ÀðåŸñðåÿSñðå÷Àðåˆúñðåõäððå›ñððå‡òððåûòððåWÌñðå¨úñðå×ñðå'ðððåñðåqïððå{Êñðåßïððåðððå{ðððå�ðððåÕðððå?ñððåñððåÿðððåÕòððåS×ððå}ÞððåMÜððå	ÚððåÛððåØøñðåGÀðå£áððåÁÖððåëÖððå/ÐððåµßððåÑàððå¿ÚððåÕáððå[âððåµãððå�ãððåUãððåäððåÍÔððåqÙððåÍâððå_ËððåQÓððå·Óððå9Ãððå!ßððå{áððåŸ(Àðå<üñðåë¸ððå‘ŸððåežððåýÀðå½ððå+Àðå)1Àðåù2Àðå13ÀðåÑVððåQUððåYWððåTððå¹Pððå�Uððå³Éððå]Éððå5ÉððåAÉððåÉÉððåuÉððåCóððåìòñðå'óððåëñðåÛñðå$òðå�#ñðå¯#ñðåG…ñðå#ñðå™ñðåMîððåèððåñíððå3éððåé�ñ;)/P­Åúú-ðåžñðå;îððå—äððåKïððåíîððå�îððåïððåuíððå9šððåË˜ððå›„ñðå¯ñðå»ñðå£ñðåUéððå©èððå·!ñðå1 ñðå#!ñðåñðåéððåyñðåO#ñðå1#ñðåµæððå™ñðå¡ÊððåCXÀðå?VÀðå9WÀðåWÀðåñðåñðå9ñðå!ñðå{ÃððåëÃððåýÁððåiñðå»ñðåóñðåÝñðå½ñðå+Àðå9ñðå�*ñðåA*ñðåIÀðå{*ñðå!ÀðåqÀðåÅÀðå¹*ñðåÓ*ñðåiÀðå4üñðåþñðåÌððå¥ñðåËñðåY+ñðå+ñðåí*ñðå-ñðå©/ñðåm0ñðå›1ñðåC-ñðåg.ñðåù,ñðåƒ�ñðåµŽñðåñðåEWÀðå?	ñðå7	ñðåHñðå™	ñðåHñðå•HñðåyIñðå©	ñðå¹	ñðå­ñðåKÀðå'Àðå›Iñðåõñðåéñðå¡ñðåÃIñðåIJñðåÑOÀðå�Lñðå)Mñðå½JñðåëJñðåñðå«yñðå-yñðåeÀðåoÀðåEˆÀðåÛKñðåLñðå_�Àðå-™ñðå•Vñðå
zñðåOÇððå™SñðåÏWÀðå]	ñðå_zñðå¡zñðåÕzñðåVÀðå7ÀðåÈúñðå'Èððå»ÇððåkÇððåyÇððåsÆððå5ÆððåÅËððåSÆððåd_ƒ$L±z?ßž[Æððåq|ÀðåcÌððååÌððåKœñðå(ÀðåÄòñðå%’ñðåY’ñðå«Jñðå;`ÀðåÓÏððå�Ðððå
Ñððå_šððåñðåÅ‘ñðåC{Àðå““ñðå£eÀðå£•ñðåë‚ÀðåU—ñðå“3ÀðåAúñðå{èððåáÀðå=5ÀðåuÀðå›˜ñðåÅ&Àðå­NÀðåg”ñðåÇJÀðååcÀðåsrÀðåwhÀðåMƒÀðåƒÀðå÷Èððå�9Àðå©ÀðåŸWÀðå·—ñðå7…ÀðåÑÀðå…Àðå]¸ððå«‚ÀðåkÝñðåAÀðåÉkÀðåUƒÀðåaƒÀðåAƒÀðåÃ8ÀðåÓ…ñðåÛ•ñðå
˜ñðåÙiñðå[xÀðå%(Àðå�’ñðåå	ñðå/sÀðåK‹ñðåÁ[Àðå	yñðå�rÀðåYZÀðåqñðåUñðåeñðåãñðåÀðå9‹Àðå•Àðå•ˆñðå)hÀðåW^Àðå™Àðå™ððå=3Àðå7UÀðåEäððå
`ÀðåÃGñðå%ñðåMñðå�ñðåCñðå·ñðå™žñðå™ŸñðåïŸñðå}žñðåÙ¡ñðå»LÀðåC ñðå‡ ñðåÿžñðåÇñðå×ñðå
¢ñðå×žñðåæñðåý›ñðåuæñðå?ÀðåIéñðåqëñðåÕÛððå[ìñðå½ïñðåîñðåQMñðå=ïñðåIíñðå�Ñððå?ðñðåãîñðåõÛððåQðñðå·Ãððå™NððåÉ&ððå#ððå™#ð†2Æ³Hµ)åòðå ððåÅAððåÅHððåÕFððåÑ-ððåÉ/ððå•/ððåÕ.ððåaKððåeLððå-Mððåõ$ððå9!ððåu%ððåÁ!ððå“ñðå_ñðåÔððå!Òððå	wñðå9wñðåswñðåEÆñðåýêððå¥êððå�ëððåëëððåÝìððåÇìððåñðå1êððå-Àðå1Àðå	ôððå%ôððåSôððåAõððåSøððåáLÀðåõ÷ððåÓMÀðåPÀðå}üððå‹ùððå;ùððåÙ‡ñðåCˆñðå¿ùððåOöððåáúððåeçððå¿õððåÁçððå[ûððåüððå¡ûððå+üððå9PÀðåq÷ððå¯öððåéöððåyñðå-ÀðåÝñðå‡
ñðåµ
ñðåå
ñðå	ñðå]ñðå_ñðå#ñðåŸñðå‰ñðåÁñðå©ñðåë"ñðåyñðåAñðå}ñðåíñðå…ñðåÉñðågñðåµ€ñðåñðå
ñðåãñðåGñðå³ñðåS
ñðå‰ñðå�WÀðå�Àðå™Àðå÷ÀðåÑñðåÅ
+ñðåÝñðå§ñðå3ñðå+‡ÀðåmˆñðåO…ñðåk5ñðå‹5ñðå©5ñðåÉ5ñðåë5ñðå
6ñðå/6ñðå“6ñðå7ñðå8ñðåù8ñðå1HÀðå·DÀðåý�Àðåe‹ÀðåIsÀðå[`ÀðåEÀðå÷Àðå­Èððå‰lñðåmñðåƒrñðå—vñðå´y-D¹ÝŠyFçlñðåoEÀðå‘Kñðå?dñðå½vñðåñvñðåÃwñðåûeñðåñdñðåeñðåµdñðå/QñðåEfñðåUfñðå�eñðåËeñðå}eñðå�eñðå?Lñðå]bñðå¥bñðåËbñðå5ÀðåCÀðå§NñðåmfñðåíNñðåyfñðå…fñðåÛ[ñðå
cñðåEcñðåcñðå5[ñðå›QñðåmRñðåó|ñðå}ñðåññðå©ƒñðåI„ñðå…€ñðå‹„ñðå„ñðå»„ñðåë„ñðåñƒñðå…ñðå-„ñðåÕ„ñðåƒƒñðå¯…ñðåÍ|ñðåo…ñðå‚ñðå«3ñðå�|ñðå|ñðå�{ñðå‹}ñðå3}ñðå¯}ñðåí}ñðåE~ñðåÉ‰ñðå­Šñðås‹ñðå�ñðå‘ñðåõ‹ñðå»ñðåÇñðå}Àðåë{Àðå¯'Àðå?ƒÀðå×èððå•™ððå�ÀðåÓ,ÀðåŸ�ÀðåÓaÀðå'hÀðåzñðåišñðåÑ™ñðå�›ñðå¿›ñðåaöñðå�öñðåmñðå9ñðå1ñðåÇ{Àðåmœñðå)œñðåÿœñðå7�ñðåy�ñðåžñðå�ñðå¥ñðå!ÐñðåÏñðåÿùððå#"ñðå?æððå#ñðåëôððå§"ñðåy+ñðå�
+ñðåß	ñðåY
+ñðåÛ
+ñðå�&ñðåá3ñðå¹3ñðåï3ñðåÅ3ñðåý3ñðåÓ3ñðå™+ñðå»+ñðå”ùñðå‹öñðå$]ððåq…Àö´Ô¥@½ŽPª*ÿµ�°'ÏW%ÿ÷ôï(
+Ð˜:!ã÷û˜!ðø%'`
+™ 0V`!hA˜`(°ð½#YCð0|)ÐÀhpGa ÀCpG@-é_úÿë ã€å@½èÿ/á4gÍšš  43@@VUgfÇq€€x‚ÀÈð€�¸  ¬
¬
¬
¸¸¸¸
(


(((¤§¬±¶»ÀÅÇ¤¦©¬¯³¸½ÂÆÉÿÿÿÿÿÿ/]3b524F–—dÝip+,-/0122463F59{;;;;8@^U]*bA‘‘’G<uvwx–—d-Ýi“p˜=
+

		
+		
+ïßÿîßÿìßÿÈŸ¿?èßÿÀŸ¿€Ÿ¿??><~<~xÈß¿Ÿ¿?><~8|0x xÈßÿ¿<8~0|xp`@þþþþþþþþþþþþþwlansdioOSADIRECT-€À”Ó,ä”Ó€À„”Ó@ä”Óä„|ŸÀ”Ó¤ä”Ó|ŸÀ%„¬È”ÓàM@äŒXÀÀ ®À�ÄÀ8Çð	2.3.1.0e<€ðà“ ¡0uÀÔÊ¿£@Ð$ÔÅÄÆ ¢=F�p�4Æ5ÿÿÿ€#8ƒp8È!8…P8ÊRR	²@¤¬¨¼À¸”Ç˜¬°&ÿññÿˆÀÁ¾¿ÄÞå<ÁŒ©r<Å8#b’%1|�Ðÿÿ
+Q¸�–Ò)4
+Ž&D¸
+1<ìC�„$ã+wk,˜±OÝ3,Ôñ@�„
+l	öüø9oê!cìRõÛ(ä(!,-€Ò ´Ý8Rú Ì0:ÖMÿÿ$É0Ð_l!4È::4Ü‰ ôR
+2Y=¨ABè²Ð€A2ˆ	
+
v	{	!í”Ò£l(!¥~ž(ÿ´	*½Q	0n23nmX;æPO"€mø-zØ› œ��¯¡,‰Aœ€KTMNÔO SV<X([\`]:` b–üžŸpMä2¦H§‚¨ü©qªR¬1¯(²´
+µdÂEÃ¨xÇh<]>”º@„PÑð’`ðMAð’Cð!pðƒðÒPðð,ðRðRbð`ðð#ðVðRÿðiðrðÒ%ð/gðÿ.ÿeÿ
+(		tSÆQ--èŒ’ÎòÏÊÏü*Ñ(°0�L³9X€J1á$$Aá=ð%Jp	�_fÿ}	


ö"PRPP€
‚!‚	B‚
+!"n!pp‚
cC$™5ƒ
+(‚,‚0‚4‚8‚<‚@‚d‚h‚l‚p‚t‚x‚|‚€‚„‚ˆ‚Œ‚•‚™‚�‚¡‚¥‚·‚¸‚¹‚»‚¼‚½‚À†ÄU†`†k†v†�†Œ‚"Bæ€
+	ÿ-ú-Öô±
+8‹À˜
Ô
+£8»Ù9:aOçƒÀ§g£­YgíØqÞ¹8Å|“‰ÉÍ�W¤ç§Ü�Øtÿó=Ä	.xY
+`+
+@$úÿÿ'ðÑ	iÿ@ÿ\CB!ò¡ü­h
Ã
+qˆ.ÏüH€`�
^
+Î#¥EŽ	G´JjÄ&iækÙlØàƒøfúäûy–,Y
+e$vw’2xyî|LÖ-Æ	Ì
+Ð
 $å0ÑZ‰n
+�f®)¯ ±™Â…ÄÎ€Ï`Õàþ¦Ò
+ ¦&ÃCf9’“.û€þ„ÿÀ !>#$?%r&' (¸)*9+,/X01ÿ2GOJXLKNvQÈR*Y.êdó sþ®M.	V `!`1PÖÂ`
+```Î`VN`Ö` `(`"`Å`-
+`E
+`E`(æƒ\-Y, !ÿÿ"#bâÿ%¿
+&ÿÿ'ÿÿ(ÿv,ÿ)ÿ~ ÿ*ÿÿ,ÿ+ÿ	
ÿ,ÿªÿ-ÿ
²,ÿ.ÿºÿ/ÿÖbsÿ0ÿûÿ1ÿ
ò•ÿÿÿ6
;ÿ/¯ê	F
±J
²N
³ý´÷µí¶á·°
+¸Õ¹ðºn
»
¼„½7¾Œ¿hÀ|Á‰jŽÃþÄ«Å8(@ÇÌžfŸ ¡¢£¤¥¦§¨©ªO«®¯ü û ý       ì è Ý î ö    < W k r    ä !ð ÿ Òý €Ç1ÉðèúDH#Ä]RP�R= w™_Ï-ƒâÿÿÿÎ‘ÀðôðìÐ<(0àÔ0ìÒD#ÜÚ@ š¤Ltò<¤
+Ì#ó
ñÒÒ"D €LT\dlt|4 <$,4@8H8P8X8`8h8p8x808888 8(8ÿÿDD�C(#C”€p¸ñã	ÕÆª�'~,p1�2ÇD	T;OýXábK¨ìÀ¢ïË%þµ �ðtè-�Ð­ @]ÿ(Ñþç)y´O)*Ð•!J]!I’i‰x"ð`è¸h BÐà À…iEa­ 0"DUbC¨H€5)k0"0ðPèd$$.c¸h BèØ¸h(ÑðHè!xx¡@ˆC¡xp ÉHa˜ð@è˜þ½µð>è(Ñ ð>è(Ð ½þµ ŽN0a¨€@i(Ð€0ÀŠ4ià!ð,è ,øÑ0am---éÓ0i�±hðè%I¨@Fi."Ð4€4àŠ™ðè0 0Aq!�qB{#kzC’a"k€#Qa!kÊxCÊpb}!’Iq‰x@{"ðÚïm---ÑÓ8ðîïfH€h@ðîïþ½µðîï ½µÿ÷Ÿÿðêï ½øµ%ð¸ï]HDh-à`z@(Õ y(Ð(Ñ ðÑúàVH"h· € ð¨ï @ ‚x9 #ðÆï € @j(Ð À €jp!ð¾ïà%$h,ÏÑ0ð’ï(ø½óµ�°ðzï>H%Dhà ÿ0"90ð¦ï(	Ñ ™"˜0ðžï(Ñ%à$h,éÑ0ðlï(þ½÷µ‚° �+HDhðPï™#
+[à!y)Ñ¡y±BÑáy¹BÑá%Êu$h,ðÑðHï-Ñ˜°ð½ �úç"øµRŠ’’x ÿ*Ñ
+y*Ñ%·"$'’Ž
J9Rh¡@BÑ"+1 ð@ï(Ñ™JŒpQh§@9CQ`ø½d,åÓø½8‹À ÀÀèÈpµ#  p `pH
{ÂzC p ð$øézàpp½ pG pG "p"Bp�p pGµ#"p"Bpðïðï! páp`x€½0!pµ$ð‹ùI(Ð(	ÐI(Ñà\¨BÐd$$`BRx*ôÑà\¨BÑ`@@xp½d$$`BRx*ðÑ p½dÄÀ~ÄÀÿHx(ÐþH€|	pG pGúHx(ÐùH€|pG pGõHµx2½šyüÀ_¦©ý!(ÐóJx
(Ñ}Õÿ÷æÿ(Ñÿ÷Øÿ(ÑÑz½µ‡°ð¤î©ð¦î(ÐkFØz°½ ûçµ‡°ð’î©ð”î(ïÐkF˜zìçÙHx@|€€pG×HxpG×Hpµð„îÕJÀxÔi€!`4(Ú#ctÿ÷¢ÿ(ÑÐi`0Ásp½(ÑÐi`0Ãsp½(óÐ(ñÐp½(atðdîÀxÀÀàsp½ÁHpµðZîÀx¿JÔi€€!`4(Ú##tÿ÷kÿ(ÑÐi`0�sp½(ÑÐi`0ƒsp½(óÐ(ñÐp½(!tð6îÀx@À sp½µÿ÷¥ÿÿ÷Îÿ½1(Ð	Ü(
Ð(Ð!(Ð"(Ñ pG2(
Ð3(Ðw(øÐ pG pG pG
+ pG pG	 pG8µiFðî(ÐkFx p 8½8µ ��Hx(Ððþí(ÑŠIx
(ÑH|ÀÑ iFÿ÷Ýÿ(ÐkFx(ÑP �kFxðêí8½(Ð|I	x)Ð{I
+x
*ÑJ{p
+}BpI}�p pG pGpµÐrHx(ÐqL x
(
Ñ!(ðÊí`{Ð(Ñ(ÿ÷Ôÿp½ p½µÐdI	x)ÐcI	x
)Ñ*Ñ`I	"1à*Ñ]I	"1ð¨í ½ ½ µð¤í! jFð¤í ½øµ
ðˆù;2) ðŸü(Ñÿ÷äÿ ø½µð[û½ðµ$NŸà]•BÑ]p8p˜pà´BÚ•BÒmx•BÙ]p@x8p˜pd˜p ð½d$$ŒBÝÓ ð½pµ#yàÄ¦|ŽBØ¤{ŒBÓ pp½[�BðØ p½÷µ”°«|\}-Ñ,~Ð«Y|(‘ðí©�ðí(òÐ«}«Ù|ˆBØ™|ˆBÒ«u,
+”Ñ 
+�«}
+™˜	«ð"í(ØÐ«˜},�Ñ˜(Ð˜(Ñš™(ðí«-XtÑ@Xtª©¨mFÅ«]|	à²ŸÀPËÀ³ŸÀN!¤«Y|*
¨ÿ÷bÿ(_Ð9ª¨ÿ÷§–¯‰øÀEw„ÿ(XÐª’kF~|
+™˜;ðæì(LÐkF~}¸B&Ðª’|
+™˜;ðÖì(=Ð!kF•YVà7à V«x;ðÊìkFs•	!
 YVV«x+ð¾ìkFXs«YykFX{«	Yq™y˜qØykF{«AIÀ	IÀC,Ùq!Ñ˜ð¦ì˜ªð¤ì(Ñ °ð½«YykFz«	Yq™y˜qØykFYz«AIIÀ	ÀCÙq«Xy0p˜yppØy@@°p Ýçµ‚°kFYzzð<ìiFðxì(Ð" iFðNì °½µ‚°kFYzzð&ì©ðhì(ðÐkFy pXy`p éçµ‚°kFYzzðì©ðXì(ÜÐkFy pXy`p Õçµ‚°kFYzzðþë©ðHì(ÈÐkFy pXy`p Áç8µiFð>ì(
ÐkFxÀÀ px€À`px@À p 8½µ‚°kFYzzðÔë©ð&ì(žÐkF !VYVˆBÑYyqkF pXy`pØy pØyàp˜y qy`q˜yàq˜y q ƒç>µ!
+hFÀ"ÿIhFðÄëýI%Û9H}"(Ð(Ð(Ñ€ kF˜qà,ÐkFšqàkF�qkF
+u˜yˆuðHiF@ÀjðRý>½0µ‘°@!¨ðrëêI"¨ð˜ëçH%0Bx¨9€ð�ëãHkF%0Áx™ryØràHßLˆ˜� û<ú!
]ª
+à!à1	{K 1[@‹r…BòØÔH!Û8uà5éj{Jzï#À@ÀC(Jr8©ðšë«€èjAzÉÔ)€9‰k)Ð"#©ðeûà©ð0û(Ñèj"AzCAr°0½»H!;8�`pG¹H;8€hpG8µðtëµM;=¨h,@4(*Ñ ¨`àj!ð^þàj@!ðhëàjðhë(h(Ðáù9Hl(	Ð}"ÒBC’àj"	#ð�þ¤Hˆ(ÐðTë(ÐàjðTë8½àj@!ðBë8½øµ"˜H!@Åj(˜0ðòê(t0 !ðÀê& 6²y¡8ðæê±y” AU! Ç†÷âôÀø%ð2ë ð4ë±y ð4ë"!(ð2ëø½ðµ“°‚Mû=(kð.ë.  6/ 70u<uèxð(ëð*ë‘�8}ìù4(Ð(~ÑuH©8ðìê˜rJ‰	€	«:ðë8}(ìÑÿ÷`ÿkIàj÷9ðëðëhHgO{8{?€k=@5(Ð 	àºm˜ûm™€™AbJ#ðë(bàj"AzCAràj!ÿ0a0Awðê�¨ðôê:m˜{m€™�YA ‘'	�8©ðèê˜ðê ðæêàjðæêHH%0�yÀÐ˜"AzàjðÞêðàêàjðâê@Iàj%1Êx 0v	yAvàjû"€0Gu>Hpàj8Oz@»?àLà:{ÒRCï"r@z{àjÒÒCrhh($ÑàjBzÒÕÊÔI	Ô 1
+~ÒÕI}	Õ!i`9{z{Cð;ÿ8{(
+Ðàj·!‰B™K’Jx™ðœêO!û?8kðšêåj")˜18ðšé)8t1 "
+0ðìé€5(}°r7à0{(Ð(ÿ÷äþà(!(ð°éàj!ÿ0a0Awàjï"Az@2{ÒÒCArIR"H51à{ŒÎLõ@BôÈØ ðºéàjð•ÿàj!ðêü(k!ðPêðRêàjzJÔ"Cr°ð½þµ"ýN’2k‚BÐ*Ð ÿ÷Çþ þ½÷HAxJÄ 5ù4*}àj?ð0ê
+{{&meww{ {±xI±p@zÀÕð&ê(Ðð&ê(fÑð&ê(bÑàjÿ÷ßø(]Ð �Zà*XÐ*9Øwp:à!ð–üðêðp ðÂéÙOàj:Azû2É€7)’
+Ú™ðê!(øcÐ!ÐHÀ0`ÎHÎIà0‚~àjì1#ðÈû˜ÿ÷;þàj@zÀÀ(spx@ppøk(Ñh}(Ñÿ÷…ýà ÿ÷Týà)Ð)ÒwpðÜéóç*Ð*Ù à
+ ÿ÷Aþà 0cðü˜þ½ÿµ�°%°L˜ 4(AÐ˜"‰1 1Û0ðÐè(4Ñ°x!à1	
+(‘Ð
Ü(Ð()Ñ¡HkðJé }(LÐ(>;IRð Àö¦¢LHÐà(	Ð(ÑšM(kð<éhx(UÑà–Hkð4é }(Ð(	ÑðŠé˜
+™Àjðˆé˜ðû%/aÐ8hn8Fiˆx‰YÑ	EÐ(CÐ(SÑ }(ÐƒM(kðé(l(Ð}!ÉAC(kðhé8i( }&Ñ(<Ñ 0àðVé˜
+™ÀjðVéuHä0ðXépx1x
+C1 1(ðTé˜ðÍø½ç(»Ò@hpð:é ÿ÷¦ü³ç(ÑpzÀÔ à8i( }Ñ(
+Ñ  uà(ÑpzÀÔ ÿ÷Œý%(°ð½óµ ¯°!���
+$¨À	!TH.�ðèSH!ðBèOH!ì0-�ðè/˜
0&�/˜AzzCÐJI€FO$@78@0<se€5Deèj!‰@t(à8|s!,�AuÄ0+�ððè/™"hðè( 0*�/™ŠyÂpÉyq/™*˜Šz‚qÉzÁq/™*˜	{r*˜„r-L0˜áú1
8ÿ4!4)‘á&ž'�ðx±x'˜
+C‚B~Ø’px1xCÝ(xÐÜ!(ÐÜ(CÐ(KÐ(VÐ (Ñèj-!	A&˜ð®èØà-(}Ð0(ÐH(Ð(öÑËàÿ#K3Á˜BsÐÜÿ8€pÐ	(Ð(9Ð(æÑ,™0yHu¼à)yÐ)xÐ)ÜÑ xsðx±x
+C+˜1ðxè«à€¸GtyÀŒÎ   *Øbp)˜1	à *ÒùH‚v-˜1ðˆï‹à0y`rˆà11"hF(‘ð~ï™˜#Y@X@CzÐ"1¨ðrïà~à?à™˜#Y@X@CkÐ"1¨ðbï(™"hFð^ïhFÈ€ÞJ™A`:QeeXà—àà�àà 8sð(è(JÐ™" «Ãª’°ª©«ðè@à�à�à&˜"$©ðè «X|`r*˜|�r2à0ðè(Ñpx2xÅHCuñx²x	CAuðx±xÀH
+C10ðï0ðþï(Ñ 8sðèï(
+Ð"
+©’‘°ª©«ððïà+˜1ððï™'˜š@&™‰	&‘(Óöæ yÁÔÀÐ! kFs Xs z�’ÙY�ì$ÀÜ(Õ`z‰ÿ÷+økF˜s z�`z‰ÿ÷økFØs+˜"©ð¢ïð¬ï(`Ð8{(]ÐðÀï(!Ð 1°ð½ °p ðp- 0p pp‘I- wðx²xCHwðx±x‹H
+C10 çH à 0p
+pp¤ç/™0˜d6,!0ð˜î«€Õ™"‘’˜ª©«à«x	Õ"™’‘˜ª©
+«ð~ï"’èj·!‰B/™0#ðvï(Ð 8srx+˜’1ð<ïhH.™	"0ðfî8!¨ð6îèjeI‘eI`N‘!`>"�±c@zbOÀÔ0bx)™v8ð&î(Ñð¶î2Óm’m€™A}"#Òð¼î¹l�BÓ °cèjð<ïèjð"ü`z «p z�‰€Yp˜p ØpéjIzÉ	Õ¹k}#ÛYC «‘y"Càùk}#ÛYC «‘yII «q9I?J 9`ðc™‰‘y"Cq�ðBù¨ðï(8cÑ4ç 2ç÷µ‚°1M)x)Ð “å)L' 4àb (p @8G` 8opu*Iÿ0¯pR"0‘ðÜí™0ÿ÷~ý(Ñ!˜&R"01ðÎíàjð©û 8ðÔî /pð¹øààj!ÿ0a0&Aw0^åJµ@:Ñ‚#€:(uÑÿ÷ú½(Ñ
)	ÑQ})Ñ‘})Ñ ÿ÷Ñù½ÿ÷Íú½`¤GXyÀmÀŸ À€'Ø |J#µu€2Ñ‚ÿ÷³úäçxHÿ!11 8µðPítHÈ! 8�c}!ÉÁc2!d}!	AdoI�dðØílJ`2Ñe�eÈçpµiH€0}(Ñ`iðnîeM 5hh(Ðÿ÷ú h``i!ð‡ø`iðbî p½^HˆpGZIøµ€1}D6(Ð(
+Ñ0iFðví™ ð4íàRH q
+bq}%ÛÂðÐí

+
+ ÀCà ÀC €ÈŠà "€à "€ p
+àp0ðî(ø½ ÀCìçpGµ/$ðî(Ð)$! ðî! ðî Zç3Hpµ 8%Äù4pàjðú(
+Ð‰0J	
+p
+Jp*
+_'ï8è(ÀüË£_�qÊqðqú'H€0}(Ñ%H$I`0Âkàj01#ðôíàj 0@~@Àðòí ÿ÷Àÿp½(µÐH
+hH!ðèí ç8µðèí(%Ð($hFðæíðèíIJz�BÑkFx‰z‚‰’‰ŠB	ÑI
+*Ð‰‰Õ€€Ð.$! ð´í! ð°í 8½ 0uŒÎÿÿ€ˆÀ XyÀ1µkFxXx™x$*Ð*
+ÑCJpCHpðªíðúðªí 8½?Jp?Hpð¦íð9úð¤íñçøµ&:O4= @hÿ÷Óÿ(Ð 9h@hˆ` ø½d,îÛ.Ñ8h!"�rrAr ø½+H"hz)Ð)Ñ#KAzp&IÁ`&Ia&IAa&IÂaB`�a!BpppGKAzpK�zp IÁ` Ia IAa Iéç pGI} µ`Id `HIL` hx(Ñÿ÷¤ÿÿ÷Âÿ hÀh€G½
+HhiGµI	hIiˆG ` ½D:E:H:X:|ŸÀ*O*=ºðÑ¹ð³)õ)7»ð‡»ðL:P:'T:úHÀxpGúHx)Ñ pG€pGøµ$&óO¥(ð>ú(
+Ð(ð*úðJ1q@P@CÑ<pdìÕø½pµèNà¥(ð&ú(Ð(ðú²x5iÓ[Ã`Rpp²pd$$0x„BçÓp½ðµÚKXi�xÀx!x„F\àÔHÔi#]ˆ.Ð[à]±>.Øz÷C0	??8C²(Ñ[z
C(@Ð(Ñíèà(Ð(ÑRI		'à»N#ui
+àŸï[‡BÑI		à[‹BòÓ›èRui](ªpÑ à0i @ˆÀÀtiàppiÀx€I		¥KbEŸÓð½ðµ'¢Ji\S�ÓÞÔ	-
+Ñ",Ð"››
Ð+Ð	à:-Ð",Ñ\bC[ŸÒRS.Ñ‰€ÿ÷Ôÿð½øµ$	!‹HŠNp4a‹H'Ø–<ûä,À{�­
"Étað,ì(p`wÐ‰!‰0a@pa¥(ðIù(ðUù(ðEù(ð\ùd€,ïÓÿ÷ÿ ÿ÷ÿ0i=Aiiy@C0iÑ~pip!Ep�p1iI~ÉÉÁpVà@ioJ)i@P@C@Ñ0i$0°`h)€€
i@`@CÐ°hh„¤
°h+h@h¿
+€C¸€
"«AÒ°hh@h‰
+€CŒ¤
°h+h@h?
C¸€
"«AÒ°hh@h
C„¤
! ÿ÷LÿÀÀà6à 1iÂ‹\qipMpˆp0i@xÀÀÈppix)Ñ�x3iÊÒIRx		òp�p2iÉR\p2i‰IxÉÉÁpx)Ð!pÅpà€x1iÀA/H "ð2êÿ÷¢þø½+K Zi*Ðà)Ñ€€€xiÀAÉpG@ (Ú�Q\)îÑ ÀCpGpµ
ÿ÷àÿðXë0` ðRë(` p½|µ ,6ÐKZi*2Ð-à
)(Ñ€€€xiÀ@BˆÑà	K’3Ò	@:ÕkjF«¨GkFy™ ðÚé |½”ŸÀ°ÅÀ	L0¬@ (Ú�Q\)ÍÑ ëçµxL`hðë  a`a½#µƒpà„\ãRŠBøÓ!É�p½ÿµÅ°kNpi(Ñ I°ð½¨ÿ÷�ÿ(-ÐkFÜˆF˜„B(Ø%¯àxYðàêE™HQ-¥B÷ÓG˜ ðÖêE™H`E˜!ÿ÷Èÿ']à	XÕD›VI‚x
iÒQIˆF›
+6
¡™BB’Ùÿ÷©ÿÆç*Ñ€xÀ@C�àIK€x’31ÀÒ	@@:ÕkAªB«¨GA˜@«C�zh€!ˆCðœêE™%Q	àC™¨€Xð’êEša-PPµBóÓ6JD™Ri ‰	yÀC)Ð/ÐG™ @ð|êE˜A`1ÿ÷lÿ¤ /Ò(J¹D‘PiA\)šÑH˜€ÿ÷Tÿ qçÿµÿ!$I H�°ð
+éJ(h!` )à+\ã@¤›$›$,Ñ@$+Ñ+\,Ñ@STà@ã@'ST.\È!ÿà0À½òK?¾@Càÿ&+ÐVTI		›˜BÒÓ˜p˜`˜xP€°ð½”ŸÀ°ÄÀfI
+ÒüÑdI 1‚pGøµ ÀCbL ```aH%E`aI€âh€ˆBûÓ 
!‰h€ˆBûÓ €hðþé ÿ÷ÙÿÇ ðüé&0CÇ ðúéÇ ðôé'8CÇ ðòéÈ ðêéÀúÐÇ ðæé¸CÇ ðäéÇ ðÞé'8CÇ ðÜéÈ ðÔé€úÕÇ ðÐé¸CAIÇ ðÎé ÿ÷ ÿ ðÄé€'8C	 ðÄé ðºé ÿ÷�ÿ ð´é¸C	 ð¶é ðªéð´é+Ih0C`*Hs*I	x{*I})J8C :Pc}@üÕ}¸CPcð¢é!S ð¢é@! ð¢é€! ðžé!S ð–éd ðšé!S ð’é‚! ðŽé€!' ðŠé!J ð†éðŒéàiàaàiICàaài!ICàa iIC a ø½�!€#€ À-€à*� � $�â6pµðhé!M,hà`h(Ð€G$h,øÑð`éóçµI ‡°` «ÃHÿ!Í1kFÃ”8J#¡ðLéÐ °½
Hµ”8ðFé½µðXïKh
+à	h)Ð¡BúÑà"``ðZï½¬ŸÀdÆÀÙ2ÀIdlepµ	ðÞø p(ðÙø`pp½øµ&(uÐwÜ-tÐ-Ñ ðég¡ðé ðéðé9ÿ÷Öÿ ðþèa¡ðþè ðöè_¡ðöè ððèðøè9ÿ÷¿ÿ ðæè(!pFp ðàèðìè9ÿ÷¯ÿ ðÖè.!pFp ðÐèðàè9ÿ÷Ÿÿ ðÆèH¡ðÆè ðÀèðÔè9ÿ÷�ÿ ð¶è(!pFp ð°èðÈè9ÿ÷ÿ ð¦è)!pFpàààà
+-QÐc-Ñ4HxX(Ñ3I ð–è0Hpø½0I (9ðŽè ðˆè 8†wðç *¡ð„è ð|è)H@xÿ÷vR_ÿÜ4ÀÈò	óMÿ ðtè.'pFp ðnè!Hxÿ÷>ÿ ðfè¡ðfè ð^èH@xÿ÷/ÿ ðVèpFp ðPèHxÿ÷!ÿ·çI²çHpG
+(Ò00àW0pGChipRev:, BB:), RF:°ŸÀMŸÀO.R.:/Â  Cal O.R.:¶ŸÀ”À>ÍµðM¨ið4èlað6èðîîlj"hch€™Aá` `0ãh¢h€!ððî!àt
+¨ÀiF¨ðèljkF uˆ ‚ 0"©ð`îhj÷"�|@�thh!ðöî½ÕIµ
+hj*Ðz�G½ð˜ï½pµÍLbh‚B
+Ð*Ð ÿ÷®ÿ`h!ðØî p½%ðÚî<	.<9<9<0<%a2à  a/ààh(Ñ ÿ÷’ÿ`h!ð¼î$àð†îbjÂðÎïðÐïµI aCðºïð¼ïàh"	@!ðÆï
à ßç ÿ÷qÿ j(ÐðJï%be`ÿ÷¡ÿ p½pµ$*Ð‰„( CÐð¬ïžI"Hjƒ|CƒtHj"�|C�t-Ð¨x€ p½ðµ“Oxh�°(nÑ8!hFðœí0!8ð˜í ¾bx`à ð†ï‹I‹H"ðï(õÐ!sFa8b‰8!xbð€í=` iø`< ]8wxjaxAt|"x‰’‰’Có"t@"x«’’CtwH�wH�`xr!xvN‰‰Yr"x’šr#i“#i›“ch“«{#C«s#l$+ÐübðÁÿ(«{Ð@@à C«s¸j�hFðhî(x`Ñ!¨G°ð½þµ["T#‰DiF¨ðï(QÐ˜5) ðï"!(ð@í) h1ðïÿ!Z1)t	
+it!©t!étá|ÿ )u[0hu
+¨u }.€èu
+(v Šhv
+¨v6!¢}1°ðíðx±xC6†ÿ \00p
+pp °p ðp |0qv8ðVî™pˆr
+Èr*H™€jðÐî þ½ðµ%H@h“°(Ð °Œb‹êØ8Àè¡yð½H!hFð¾ìkFxó!@¡x%‰	Cp«wàxkFXp`x"xáxCð¬îkFx€‰€‰C p��� ð°ì}#ÛXC/�Ð4`x!xCÿ9\9Ñ yÕ•
+J0iFÿ÷×þ ºç Êb€† )6ÀÍ6À'8Àµ)EÐ)H'JxpCxSp
+xpIxAp$I x	xˆB5Ñ#M#N y#3@@Ð(Ð(,Ð(*Ð&à ‰°B&Ñ("€À’’J�’JK!ðBîà ‰°BÑ("€À’’J�’JK!ð4î(Ð °p½àˆ°BÐáxÂÑ õç`Â/ÂEÁ  ÿÿÄÆÄÅÔÅòÏŽÎ’Î8µ!øJ‘xý%û$)kFÑR|xRÒ)@RCñJ‘{(Ñ!@ÐÀà!@ÐÀ€C�àx(@ @�8½èIçH`éIçH`éIèH`pGpµ
œ°X!¨ðÌë* X#©ðÖíkFX‹X!X(Ò¨ðÒí(	Ð!ðÐíiFðÈë(Ñ °p½!¨mFàŠ@2zkžs{RI		štkFyŠBïØy¨@
+\R
+T iFð¬í Ýçpµ
˜°H!¨ð†ë* H#©ð�íkFX‹H!H(Ò¨ðŒí(
+Ð«Yx ðˆíiFð€ë(Ñ °p½!¨mFàŠ 2~kžsRI		štkFyŠBïØy©IB\RBT iFðfí Ýçpµÿ$
4Ä°!¨ð>ë2(#©ðHíkFØˆ BÒ!¨ðBí(Ð&4­à A10ðBídkF˜{ BôÜ D°p½„H}€Á…H€BxCAp pGHpµ 0À}€I‚	‰€Jpp€HðëwJ 0|p	
+Ap�|ý÷äü ðëÅpý÷×üwLài`0�{ ðíài`0Á{ ðí p½þµ
iN$¶˜à*8#iFðäì˜@wÐkFXˆ™@�BqÓ/Ð!IˆBkØkFÜ/Ô<ÀoG¯+x*+BÐÜ+0ÐÜ+Ð+Ð+$Ð+pÑ)8ðÚìTà+%Ð +(Ð%+eÑ)8ðÒìIà/;ðvë)4^JOT^^Y^)8ðÈìqxCqpMà)8ðÂì1à)8ðÂì,à)8ðÀì'à)8ðÀì"à)8ð¾ìà)8ð¾ì.Ð)8ÿ÷›þà.H}€%Õ)8ð²ìqxC(qpÐ)8ÿ÷Îþ Càà)8ð¤ì÷ç)8ð¤ìòç)8ð¢ìíç)8ÿ÷þþèç�,ÐhÐcç ,Ð þ½H@!µð4ê½pµ
+I$@#ð<ì
H@!ð<ì(&Ð
+Mèz(Ð¨|3 ¨t(x(Ð
(Ñÿ÷ýþÿ÷ÿih C1`p½PËÀ0ÈÀ”;¸ŸÀ˜;U:Àœ;N!¤ êçpµ½H
AyyCºH8€x(Ð¸I"0ðê¶I"°ðê¤à³I"0ð
+ê ,`ÉçBÑ¯K
+šBÐ
+CÑ¬Hÿ!ÿ1«J�bÑb«Jh`‘€pG!µÿ÷æÿ ½pµ†°H ©þ÷ìý˜©�L þ÷äý˜&v°BÙ °—ç–M$	à˜©þ÷Ôý˜ðë(Q$˜„BòÓ˜© à©þ÷Æý˜™�°BØ$à˜©þ÷¸ý˜ðúê™	$hP˜„BðÓ™˜@�˜©þ÷¥ý˜AØÑxI˜q
+Hq 9p˜È€ ·çµ†°þ÷vý ©þ÷ŽýL ©þ÷ŠýrI˜ˆBÑ˜AÑ ðªëÿ÷…ÿ%à©þ÷zý˜(Ð
(ïÑ ©þ÷oý ©þ÷ký™˜ÿ÷Yÿÿ÷sÿ(Ð™ ªÿ÷÷þ™ ÿ÷Dþ Cþ÷Pý °½>µ©hFþ÷1ÿ™˜ÿ÷:ÿKK!KH€"Iþ÷�ÿ(ÑFH!8p€!Á€ ªÿ÷Îþ™ ÿ÷þ C>½øµ<Nx'>(Ð(Ñhx(Ñ6H")·pðé¤­à °p1H!ðé"R”BÒ",H
+qAq+H)ðüè 7pð€(jFÿ÷•þ™1*ŠÐ@Àõzû«(ÿ÷âý Cø½µM=(Ð+Ñ ©ÿ÷¸þ° æð!øš1 ÿ÷±ÿàèx(Ñ ðçðøÿ÷ƒÿ(Ðÿ÷:ÿ(ÐJ!pQp‘pÑpqQqÝç!épÚç!HIµðŠèðèêÿ÷LþðèêI 9Hp½ºŸÀ0ÈÀÿÿPC¥€èÈX038µkFšˆ‡ÿ"…2Rÿ0"0ðŽè ðÈê½ÿµ�°#Ei° 40�`x"xCš ðºêÞJ’"˜!ð¶êÛIH`ð¶ê(ÐÙHƒA2 ð°êÓH8)ÐC2 ð¦ê
+˜(	Ð˜(Ð9
+›š	 ðœê;"!(ðšê-Ð(y(Ñ(ð–êhy#[(Ð# C"!(’ðŒêax"x	C@ p
+`p0ð†ê@Ñ! ðWù ÀC°ð½ ûçþµÿ!õ1ðvêÑ! ðDùhþ½(‰"F· €9(#”ðhê¢Iàˆ€�"‰™0#ðbê¡�"’‘"!£k*2
+1(ÿ÷_ÿþ½ÿµƒ°ÿ!˜õ1ðDêÑ! ðùh°ð½(‰·!F˜‰A"(#”ð2ê‡Iàˆ€�"‰™;0ð,ê¡�š’‘"!£k*2
+1(ÿ÷*ÿÚçðµ!›°‘‰Di
. 6,Ñ! ¡à ðê� ðê� ðê�ðx'²xW7CÐ Œàð
+êix*x	C‰	°	
+ªðêcH8("Ð`I"ˆðzïš’›š9
+¨ðöé(Ð z@!CY! r	]‰ÕUI	‰~‰Õ™ÉxIÕ€!C r;ª©
+¨ðÞé ðÌùKIIh@	� ðÖé! ðÖéðØé ðØé(Ð˜ðQùðnùðÔé	™"0ð;û ðÎé ðÐé'kF|@7¸s|8©ðÊîº{	›9 ð¨ù ðÀé.Hh‘py3yC+3 ÿ÷pþð²ý ð´éð¶é!ð9ø°ð½|µ‰Eiÿ! ~1I] 0) DyÕÌDÀßôR2ÑAxx	C ð$ø`x!xC(Ò ÀC|½px1xCkF!Ø€1"hFðØî	"(iFð†é |½
+H!µ€ÿ ð‚é½(µÐ(Ñ þ÷4ù½ úçtyÀÀŸÀ¤G(µ	Ð(Ð(Ñ þ÷ðø½	 úç øç öçøµ
™& 0&p)fp
+Ð*Ñæx@'>Cæp&&p&fpp-
+Epex&x-5C­%p-
+ep‚p
+Âpbx%x*C’"p
+bp
+qBqbx#xC’"p
+)bpÐ"‚q€"Âqbx#xC’"p
+bp€"0ð\î`x!xC€0 p
+`pø½þµzÉy&CÐÿ!]18ð¨èÑ y"!#ÿ÷…ÿhþ½(‰"@�· €9(#”ð–è y 78�px�"’¡y˜2#ÿ÷}ÿ(ð~è@Ñ y"!#ÿ÷_ÿ þ½8µ’Š{L{#C
+ðÆè@Ñ-Ð ðù 8½øµ‰Ei  0AyyCÐ"2! àÿ!]1(ðNèÑ"!2#ÿ÷+ÿ4à0‰"‡· €2)0#’ð<è!ª AS"(2’"!8#ÿ÷%ÿ¸yÁdHÐ(jà(Bj*Ð2Ñ0ðïàxx;xC8ðpè0ðè@Ñ ÀCø½ ø½øµ$Bi‰äC@ 6ux3x-C*Ñ+2!#@à-Ð-Ð€-/Ñ 2‰”F�BÑ÷x²x;CbFR‰“BÐ$-à-Ñ+Ð+'Ñqy2yC	Ð2! àÿ÷hÿà!2 ÿ÷¨þ$àð9øñçqy2yC	Ð--2!(ÿ÷–þ ø½+2!
#óçµ‰Di	Hx
+xC(Ò ÀC½ 0BxxCkFØ€"1hFð(í" iFðØï ½ 1µÊxŒxHx#Cx C2+Ð!#ÿ÷Vþ ÀC½Ky	yCÑ!à!ÿ÷Hþ ½€µ‰L �`iæ‹	ÅÈHÀÿú¸!ð°í( iÐ!à!ðŒí`‰ðòþ½8µL"i‚BÐ*Ð ÿ÷ãÿ 8½%ð€í-----(-(-%- ÿ÷Óÿ!à`iAzÉÕáh)	ÑoIð~í(Ð i!ð\íà"’iJãˆ`iðpïàeI àdI ð¿ø%a 8½ )µÐ
+hn›x¤Ñ	+Ð
++
+Ñ`2R{*Ñi(Ð ÿ÷•ÿ ½ÿµ‘°PN0i(Ð,>Ð9 :à8!¨ðPìiF¨ð¿þIH�IH�(˜0•ua/�Ð8ð.ï(Ð@H™"ð
+ìà8ð&ï(	Ð"!(ðï,Ð™ 
à5H"9ðNì3Hðï(Ð,Ð/I  G°ð½š«	tkFy«…­]t�€«€�tØt› $+Ñp�à#s�‘B«Ñ}@@uà}«CuH	�˜«�}!Cu˜ð€¨ô`ðí(0aÅÑI ðøÀçµkF˜q"hFðþëHiF@iðžù½"µ’Êy‹yCKÿ÷`ÿ½JÒh*ÐGpGh çHÀeIÀ N­JÀpµ
uH!ðÒë"-Ò*qI à#\[[T@�BöÓp½ÿµ‡° �ðˆî(Ñðìì®�w!É(ðî~Ð ‰š*Ñ^J· €) #’ð
+î 8pxpWJ	™38ðØí(y(QÑ(ðêí @(z(Ð(Ðhy(BÑ ��9(ðPî0À0�@ˆ(Ð™0Á0ˆc �hy#[(Ð#ÿ!E1C(Ñ€60l�˜!pš’
+9(ð¸í™kFz
+pàš’š9(ðªíyx:x	C8p
+xp˜(Ð
+˜(Ð›
+š!8ðˆí˜"(Ð`{Cà+à`s˜ a ‰ �™‰ U˜&6 (Ñ˜(Ð"!(ðîí	à(y(Ððàí(Ñ à °p:!(#ð\í ðfí@Ñ ÀC°ð½ ûçµ" !’’õ­Q9ÄLÀxAôê‘t2˜1#ÿ÷,ÿ½�ËÀÈòpµK&öà ðªìÚH"1ð&ìõÐ° ea � i!ðÐê p½pµ À(@j$(Ð4. 6)Ñ0~ÀÔ"(ð”í0~À	Ô(z!C,(rÐ zý!@ rðPë(ðBëp½8µÿ0!a0Aw`zï!@`r ÿ0!0ð”ê y(Ñ"’ðTúðhí ðjí5 ]Ôð$ê«Hðdí«Hðdí(ð*ê" ðLíð^í8½µ¤H"€h!h#ðXí(Ñ`i€!ðVí ½ ð¬ë ½pµÿ÷kÿ$Ð ‰"•Hp
+Xp ˜qØq ˜p Øp10ð@ê(˜0ðí(Ñ1(ðòê(Ð(ÿ÷‰ÿ ÿ÷½ÿp½pµ„L
Ðb€" ð"êà!a€! ðê0%pÿ÷oÿ ðíp½µW À ð�üuH!"˜1 ðê½þµ!0ðúénH4)4"°ðöéhzÀ}Õ)"˜10ðìé( 0~1s@~psðàìkF�x°sXxðs'(€0'pgp} p
+àp
+})t1 ðÎéàx¡xC$ÿ +0 p
+`p  p àp©¨ðükFy q˜`qàx¡xC$  p `p  p )àp"@1 ð¢éàx¡xC$>H�y)Ð!pd'pÀyd pd9I'pd"1 ðŠéä5H~)Ð!pd'p@~d pd0I'pd"1 ðvé4 þ½ðµ‡°¨ðÞû"9¨ðdékF 
+\v˜v¨"€©ðZé2(©ÿ÷Bû°ð½ÿµ�°ÿ÷bþ	Ðš+1 —ðDì ÿ÷Ïþ°ð½øµÿ÷NþÐ+:1 ð4ì ÿ÷¼þø½Œ”ÓðÓ$€žËÀ²ÄGxyÀµ	hIÑ�h1ðì ½µ	hIÑ‘h1ðì ½øµKh…i0hŸhÙh"f…hÀPÀ¾Ð«¬
(dÐÜ
+(}ÐÜ€oÐ(-Ð(Ñ-ÐYh(ðôë‚à(cÐ(~Ñ(ðUûjà(mÐÜ(uÐ(sÑ  qfà(nÐ*(lÑ-jÐ(y(gÑhy(dÑhYh(ðÔë ø½("uð®þ! ðÎë(y(Ñ(ðë(ðÈë(Ð l(Ð	 À$ ~ÿ(ÐhFðÒé ~"#iFð¸ë"(ð¸ë ðrýÎç9(ðþ	(ð™ûÄç¡h$1 ðŒë¾ç
+àà9(ð1ý	(ð€û²ç(ð
+û(èÐ¬çàÿç"q¡h<1ãç!ð|ë hà`Ÿç0ø½øµMhhéh¦i	+qÐ	Ü›ðþè "£££o££ui}£+qÐÜ+oÐ+mÑ ‹à+iÐ*+gÑ.eÐ1y)bÑqy)_Ñ*hih0ðDëà €ðTë0ðTë0ðVë ðVë0y($Ñ0ðxê0ð4ë(Ð¨l(Ð	 À-¨~ÿ(ÐhFð>é¨~"#iFð$ë!I qr"0ðë ðÙü!})DÐ3âŠ˜3(àÿ÷Åý¡h1 ðöê8à"!0òçà*hih0ðvü,à*hih0ðýû&àà%à1
0ð�è(Ðèy©y
+C+!0Ôç1
0ð€è(Ðèy©y
+C	!0+Åç  q¡h<1Äç hà` ø½øµhMh¦i'+ÐÜ›ðLè
+^]]]E]]K4]+SÐ+FÐ+KÐ+NÑLà ðpü ðÀêðÂêðÄêAà0ðÄê0ðÄêyH`yH`yH`yH` ð¾ê¡h 1ð|ê0ðAú'à!ð´ê! ð|ê"!0ÿ÷5ý¡h1à*hih0ðïûà*hih0ðvû
+à  qà ðVêà'q¡h<1÷ç ø½ hà`úçpµHh
+Åh	h i	)$ÐÜ‰+Ð)Ð	)Ð
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+HJ!<0ðìéHJ!H0ðæé½˜ÍœÍ Í¤Í¨ËÀ�PÀ•PÀ¯PÀñQÀSSÀ/TÀ§TÀøµ
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+xpÉhAppGpµðè(Ñ¡Hà(ðé(ÑŸH@ p½øµ0ÿ÷Žù90ðþè	 ðþè ðþè ðéðé) ðéø½µð¨è,Ð ð¢í‰Hh€Gà ðœí ð�è ðìèðîè½øµ!{Mhxðêï y(Ñ ðDè(Ñ(h�éhªx		ÿ÷çþ y'(Ñ`zÀÕ'!˜18ÿ÷Áÿ"W2&’@6"±{0ðNï/Ñ ÿ÷ÿ²{1 ÿ÷‹ÿŽyÀ¸XÀU-\Üð´î ¨`ø½þµ'
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+C1(ðï ��H"1~0ðë(y(yÑ ��(ð\í"1L™ƒ¶´\ÀÒ{RŽðþêðhëá` `
ª’!8ª«ðÚî˜ÀÕ3"°i3ÒC©ðÒî.>Ð±i);ÐyFvÀ	�ˆxà„àKx C’Ò�0ðÐê˜(Ð.ÐpHqA�!à˜(Ù&¢6pðªê(Ðpð¦ê(Ð!, U+ ]( Ð^H"AhIA`aH!hð®îà !�0ðœê!, U 4àz(	ÐSH"AhIA`UH!hð˜î(y(Ñ!š’>š9("«ð ùDà(ðí(Ð/˜(Ð0™(ÿ÷~ý š#™(ð~î&š%™(ðbî'œ&,Ððœë¡xˆBÐ&.Ð7L h@( `Ó"!(ð
+í  `?°ð½/I ˆ`/H!™8 )~Ó÷"@ÉÉ‰à"CÉÉv9 @]ÁÔÀãÐ7š’,›6š4™(ð@îÚçpµ0ÿ÷jû¡i(1ð8î áåµL<!~‰Ê!ðÞí ~€Õ à ð*î½þµ ðtê €ð,í 80ð î y%&€5( Ñ @ z(Ñ! ˜0àÈŸÀØ @KL,@óÐÀð¸é  !t0ð´é.unuî‚ ðúí ðúí ÿ0!0ðÌéÿ!…170Sðì! ðê ðêí ðèí!ðí! ðÌì ðí ðÞí¬Nði`0@|(ÑðÙúàðçú ðDìði!@ðúì�ðÌí"’ði™@ðØëñišI ÿ÷ü ð2ì" ð¸í ð¦ê zï!@d!oué‚û!@ rÿ }0Ua! ÉCÀ0�‚Á‚ŒHR!ðhéŠH "8~Cv ÿ÷@ÿðìµ €"ÿ! ð’íþ½�I ˆ`pGµAy)Ñ@zÀ
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+ài€iH0�BÑðzêxIÉhˆBÐ ½ ½i€i02‘BÐ:‘BÐ<0�BÑ pG pGlI µˆ`ð9ù½ µð¦é½ðµÏ%×xx¾,@¶.Ð&ÿC¿Ð&64C¦¶pbÐ§0&/Ñ)Ð)Ð)Ð&°ú}°`ÀÜÎÿç)Ñ,@4p
+)Ð)Ð)Ð
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+ÑbxºBÑÝ-Ñ± ðhè(Ð`x¤˜„BëÓ˜„BÒ˜¿Å*á ð|è9(ðtèà'˜` °ð½I €µ€
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+ùIøHðhì(Ðhx)xC-(ÑòH"h W0ðè z@!C!Ia rÉ‰Õ€!C rp½éH2)ðJìp½øµäHðé"’ÿ÷Áÿ þ÷ýÐ3y") ð4ì þ÷|ýø½ØHµDi @Ñð,ìð¢è,Ñ ð*ì½ðµ‹°ªdÊCÐ*Ñª%%ppp(UpÐ.Ð€"’’ª ’�(#©ðšè°ð½)ûÐ.Ðˆà"©’‘#©ð˜èìçðµ‰°
œ™(C%Ð .pÐ18ðˆè-Ð)8ð‚èðhè(Ð"©¨oFÇ#š)0ÿ÷£ÿ"’’š˜!«ðrè	°ð½!"‘‘’š#)0ÿ÷�ÿñçóµ‹° 	�����ð¬ë(Ñÿ÷lÿÿ ~0@](Ñ˜ !0ðªê(Ñ 	�ˆH"+É €’*Ã €)ƒH0(ÿ÷ÿ	˜(~Ñ}Hð
+è €(tzHÿ!`(ð~ë(
+�mÐ
+˜«‰– B[uH’h0™R	0ðpë
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+ˆr˜Iðlè
+˜ðöê(Ñ
+˜ðäïà	˜(Ð-J™(ÿ÷‚þ
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+�@(Ð 	�H"+É €’*Ã €)H0(ÿ÷'þ	˜(~ÑHð0ï(ð¬ê(�uÐ˜ª‰0™	0ð¬ê €I(tÿ 	`!1p˜e0PàüËÀàŸÀÀ¢€-ìÈ+€˜	‘ÂxƒxC�B<Øax"x	C)ÐÜ )Ð!)%Ð0)Ñ”!àÝ)
Ðÿ9P9Ñ  p `pà-!	iðàîà ððî(Ñ”
+àH!ððîà2b2!(ÿ÷ÀýkF˜‹À�˜ÀkF�˜‹(¶ÒuHkF*@)¨Ã(pKà(àš™ÿ÷4þ(zû!@kF{ÉIC(rhH©ð
+î1`1Hs
+ˆs˜	1ð”ï˜ðê(Ñ˜ðïà
+˜!Aw	˜(Ð\J™(ÿ÷§ý#çµð$î z@Õð‚î(Ñ!à! þ÷Ìú ðê`z!C`rÿ !~0ULHˆ(Ð ðÜí½pµDHð’î {(Ñ(ÿ÷Ðÿ&à&öC(þ÷Žú	Ð<I#z"{I(ð´é(þ÷ûú0p½pµ&3HöCðnî {(Ñ(ÿ÷­ÿ&à(þ÷¯ú(þ÷júÐ#z"{)I(ð�é(þ÷Øú0p½pG"HhpGpµ"ðÌíH,Ð!‰iIiàÿ!`p½µþ÷„ú þ÷?úÐ! ðŒé þ÷¯ú½pµ%íCðné
Ð ‰!p ðlé(Ñ ð\îà%mÑ0Púý¨hÀÖ£þôÿ÷Õú0ÿ÷Ñÿp½àŸÀù,€Lõµ‘
+"iFð¦ï½µ‘"iFð ï½0µ
! ™°ð¾èðPï`x"xC 9,0jFðFíÿJ+ÿIhFð<é°0½ µð:é(ÐùH8~@Ô÷H"0ð¬ì(Ý$à$óH!hÿ÷ËÿòH!hÿ÷Æÿ½ÿµ�° ��¨þ÷ìþ8ðé�˜š‰›æHhy· €‘9’š0ðé			‘1�ðé1"$1�
+�ð€ì˜kF�0 0A}v€}XvˆÕ à ð”í8ðìè(Ñ™8ðêè™@�kFX~ÀÐ €8|˜ú÷ý™@™�ú÷ý™@�kF}€0Ñ»H8~@+Ô˜� ���µH"0ð(ì(Ð ��6 À]€Ô¯H
+0ðì(Ð �«H*0ðì(Ð �›š™˜ð¦è™@�š-!8ð¢è™@��8z1L1
‘	@(‘Ú
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˜ð´ë˜nFBxxC	˜#ÆÝ š™ðHè™@�(ðRè˜èa˜ðRèl`èb˜" 860
+&p`p!8#ðòí`x!xC™€@
+™�	9)s9isax"x	C1é�™)Ñ\I`à[I`(ð&èÿ"! ð$è°ð½¿!‰@pGpµ¿ €,! ðdë6 @]!€(à{¢{ÚCCàCˆC s
+)às"˜1 ðPë0
+¦ràrp½óµ �°!ðöï(
+Ñ! ððï(Ñ˜ðîï(Ð °ð½©¨þ÷yý¨ð0ü-H.Ih	hC~Ñ!	 ðlî!	 ð4î=@5¨~> 6(Ðh~�¬~à˜�4 ð˜ë!	˜"‘þ÷Íü	¢¥¤lÀQõð¦þ÷;ý˜9ð­û9¨ð¶ï«˜}Y}œC€4«à‚˜zÀÐ™˜"ÿ÷«ý˜ð¦ï(ÐþçHak`° J�`H"k`’:‘#©à wÀØ ¤Í ÍìÈ¼;À;˜Í0Í˜ÿ÷þÿHák`° þJ�`ýH¢k`’‘˜:#©ÿ÷ÿý«˜}Y}ààCðfï!	 ðêíòHh "C`!	 ð¬í(yéx0z
+Cóy˜Cÿ÷ÿ Sç Qçóµ! ‰°ð2ï(
+Ñ! ð,ï(Ñ(ð,ï(Ð °ð½©¨þ÷¶ü
+Ÿ
+œ@7¸y 4(ÐxykFu¸yàkFzu {kFXu¨ð[ûÏHËIh	hC~Ñ x(ûÑ xaxC(uÓ ðÐê xax.C€6ð‚¸y(ÐxykFu¸yàkFzu {kFXuZ}(©þ÷áûkFY}˜"þ÷ìûþ÷Zü+”3*t2
+˜’‘ðàî
+˜!70�ðrí(@0‡s™:ðêªH9*’"˜ðHì�›™:(þ÷Šü(ð¢ì (q
+™(ð¼îðÎê(Ð(z@	Õ· €*’2}›™(ð€ê }ÀÐkFY}"(ÿ÷˜ü˜ð¤îÀAàVàŽH¿#~@
+Cv(ð†î(Ðþç‰Hqk°'`„JÈ�`†H2k`’‘š
+™(#ÿ÷ýxHñk`xJÈ�`wH²k`’‘š
+™(#ÿ÷óü xaxCð\î(a} 0v¡}Av! ðÚìjIh "C`! ðžìày¡y x
+CcxC(ÿ÷þ ç çÿµ…°]H!h¿ €, ðjé1(1˜0"‘�ðdéðé�™
+ ð²é8™"0ðXéKH™h"0ðPé™" ðLé 60z rpzàràz¡zCðî'.'s 6gs°}€Ô˜(Ð˜€x€Õ":H’h"*!#ð(í(Ð±} "C±u�x"C�p˜(Ð˜y@Õ0I2HJ1ðâê1Ih"�C`0H`G`Rg�| pÀ—d¯àãz¦z3CÛƒ`Ç`ãz¦z3Cƒa(K)H@3`hC`˜ð¤è!I iu`{!{CÐ!(ð¶í	°ð½ðµÿ0�0Aj @&80…°)�~Ñ`z!C`rH"’ @0"�{ð
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+™@ àœÍ Í4Í§€¤Í=À ˜Í0Í@KL£€¦€ÿðzí ðÌë ðÌë(i(Ð!à! ðpí z!C r+ À]ÀÐ!‰ÿ aHa¨j(Ðhm(Ð©¨þ÷Èújm©jkF’‘{‚˜‹’	 ðLí"ÿ22 ! ðJíð}(0Ð™ ðé(*Ñ €0Ái€i‘�ªk9 ’àà+jjjÿ÷Öþà™"˜0ðJè ©ð*í(ôÑ!É ð4ëàð}(Ð™ ðôè(Ð ðí
+˜(Ø§H"~CÉÉv¤H21ðôé°ð½i€i$2‘BÐ<0�BÑ pG pGpµy(Ñ @%(}(Ð–I ðù”I 	ðù (up½! µð@ëŽHh "C`! ðë½pG‹I‰H`pGpµ‰z‰Õ0ðÌìÐ @ À}(Ðhx)x
+C:1 ðÆëÐðþè©xˆBÑ p½ p½µÿ÷×ÿÐð(è"Ò¢Ñf�f½ðµ 1‰°ÿ÷ÅÿTÐ] À%"1¨ð¤ïgJ˜™€#*hYAkh€™A?Ó°zÀÁ8 ]ÂÒ‘B6ÑÀ6Õxx9xC81?1:0 ðxë�:1Ý ðrëðbè(Ð&"’’’˜1ª«þ÷�ÿ)"1¨ð<ï(Ñ)"1¨ð4ï(Ð pæ næøµ@1N28ð:ìðÜé:H"’"±{0ð„é²{1 þ÷Åù(ðìÀA)H¿#~@
+Cv ðÒé9 @1Jz 0v‰z#Av”3"t2
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+Õ· €"” ’Ù-9ŸœtÀâšTX]+1 ð¢ïI p  qð|éø½xJ�‰¼2)Ð)Ñ à€Ñ? bpG¿!‰QµÐÊz‹zCðÖë½À @KL €§€»rÀ¸;ˆ=ôÈ8µûM(iy)$ÑAy)!ÑðÜé(Ðhhÿ0Á0k#àð²ë(Ðhhðÿ(Ðhhÿ0á0{ðÿ(Ñhhÿ0Á0k(ið ë8½ihÿ0á0{@{‚BÓÿ1Á1k!ð6ï8½ (rhrèr¨r(shs¨sÐ€À x� xaxÂ˜Òð€ë(»Ð yayC}!ÉAChhÿ0Á0kðtë(¬Ñ xÀÐ ¨r8½ð7ø¨røÑhz(�Ð8½pµðûÂMiz)"Ð(zˆBÒ@(r¨z(Ñàðø¨rÑhz BÐlz(z (ñÛðöú(Ðhhÿ0á0{Isÿ÷fÿðäúp½®HpGµ#«L“bhe{ÿ0á0†ˆ�yµBÑ)Ð {(Ñ  sà {@ scsi …\žH£{@hÿ0õ0«BÓ)"Ð!{)"Ñà)Ð!{)Ñ©ð<î–J!kFÃ" i›#à`{@`s`z@`r!àK[j3Ó\+ÐI¡s¡{©BôÓ °p½¡{KYk1U©ðîƒJ!kFÃ* i›!ý÷ú(ÖÐ ççøµ �Vi*Ð ‰ˆx	(Ð(Ð(ÑrHChÿ í0Â\’*0ðÄü ø½ � iFð²ê(Ðš) ðFü ø½pµcMðBîQ)Q;QQQQ;Q(iy)Ñðšê!( ð¦î!( ð¢î(iy(7ÑXIhŠC`1àð#úÿ -0l`ð˜èð‚êàðú èrð#ú(Ðÿ4á4 {@ sÿ÷”þðúàÿ !ñ0Q @Y(þ0ð@í(ˆG ðú ÿ0õ0ðVî p½pµ7Hiý÷WúÐ(‰D7H p
+!`p	10ðï  qàq(ý÷½úp½øµ%)hÐ0ðí(cÐ0ðí(^Ð1{)[Ð p
+`p0{ p0ðþì0ðúìs´*¨˜xÀÂyüÒ*àð
+í0ðòìÁÿ g08p
+xp x	À
+¸p@úp%�
+à(@�èÀ1"ðììm x¨BñÜ˜'ÿ +08p
+xp x@
+¸pùp™	E!à,ÌÀùuÀSvÀ£€€
+RH’ÀÓ~qIBq xˆBòÜà  p`p p(ø½ðµA!É‡°ð‚ì!
+¨À ÿ0õ0�ðxíÿ !å0S"1 ðœìí--ösàðx²xC„Fpx2xÿ#CÛ1?Â˜BGÐÜ(QÐÜ(Ð(6Ð-(SÑIàÝ(GÐÿ8€MÑ�á0ªðRí ©ý÷²þBà!*ÐÜ*8Ð*;Ñ"i!’	]KY
+#j2i31ðjé-àH*ÐM*)Ñ p
+Hpà"	`ðFìà"ÿ2Ö21 #ðVéà!ÿ1å10ðRéà ˆp Èp- ßç˜ð íà˜	bFðöìè-ö-‰Ñ"`©ðôë(Ñÿ"!`ðÀè °ð½÷µŽ° ÿ1á1Hsà@(HsÒH{Âz*òÑH{(<Ði ]"j2 %àCÓ\+Ñ@°B÷Û.Ñ�q ÿ0!Ö0ý÷øXH8!ahFð®ëVH�VH�˜—�UH”«�{!C!ÿ1ý1(C	‘shFðÌìÿ4Á4( cÑð‚ø k°ð½øµ
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+zHz‚BÒr ˆrÈrpGH!µð4ëHI8`"!0ðxè½H!µhÉCðtè½Hµhðrè½I Šz*ÐJzzšBÑÉz)Ð pG!) µðRì!) ðNì ½,ÌÀuwÀwÀ †HÎÀ'xÀøµ"RþOþNÿMÿ!1IYŒ*xð¼ë	7BEILæG¾”|ÀE/ò€UX)Ðy(Ñ z(Ñ*GÑAàð.ì(BÑðNï(>Ñ(x(;Ð 7à)Ðy(ÑHy(Ð z(.Ñðì(Ñð6ï(Ððì("Ñ(xà*Ñ)Ðy(ÑHy(Ñà 7`àÙH0` à 7`	à*7`Ð*Ð*Ñ à ðzùø½øµ%ÌLËOe`8hx)tÐ!z‚x‰		"	’€!rÀ}�BÒàhà%ràh!ÉCà`¿IÀÀ 1à`	x)4Ð!Cà`!0ðºï€0!ð¸ï9h	"’‰	"ð´ï(Ðàh!Cà`!0ð¢ï€0!ðžï9h	"’‰I"ðšï(Ðàh!Cà`8h�h)Ðàh�CÑ a i(Ð�H€iy)ÑAy)Ð•I
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p!IðŠê#xðêêð"øø½8hx(Ððöêðøðjïø½‹Hx(Ððfïðhï(Ð ðhïðjïø½ ÿ÷ûþðXïø½þµ|O|I=hHh*x*Ð
+x*Ð(Ð ÀCþ½wLA!4 ÿ0Á0�ÆkÉ ðÒéix!pÿ"!`ð¤î¨x'(ÒiHx(Ð	 €(Á}eHz¸BÜ??eH"h ÿ0IÖ0ðÚé_M¨iy)Ñðï(ÐWH!hàUH	!hUJ‰AÉ}z‰�pQHúÒzNOÃ9hAÿ1x1àð´é9hÿ" l21j0ð¬é	 €8�~i UDIGH1ðpë@H!0I�Q¸h€Õ˜!�b˜A‹ÿ å0S¨iy)7Ñ@y(4Ñð~î(,Ñ¨iðØë¨i!ðˆî%!Ix@(Ð# @8�‰@‰à¨ið¼î}"ÒBC.ÚpB�BÒ¨i!ÿ÷MýI(H`	Ñ˜ÿ÷œþHçHh@hæçxhäç þ½I 
+ 2ˆapHaÈaPpaÈ`pGpµM(x,pÑhhðŽîp½(Ð,Ð(øÑ(i(Ñÿ÷ßÿhh&(Ð.pðzî,p	HÆcà×ÀèŸÀÜÛÀ|ÙÀÜÜÀŒÃìÈ?}ÀØ€�€ÀòÂHe¸ÞÀÿ÷ôþp½ðµ(‡°ÑÄMàÄM!I(ðÔè	!‰ l`ƒ w0x(~Ð(ppxhp°x¨p°ðÚèh`00ðÖè¨`00�ð�´H�˜Íà™ÿ#Hx
+xC[Â˜B~Ð
Ü( Ðÿ8€+Ð(wÑªH)˜ðäí¯à*oÐ*Ð*ñÑÿ ™0#ªðÒíkF‰(Ð  wšà"’!~KYJK!Ék™2ð¸íÚçÈx‰xCà(Ù ÀC°ð½)ÿ1˜"x1ðvéqÐ0Ð!ðFèàu˜€iy)nÑðÚê%!IAI)fÐ'#!Iàhà@�‰@‰� `ƒá}˜ð&è("Ùà˜ðèøÀ@ÿ0q0��r	
+Árà)à6ààá}˜ðè˜s	
+Asà}¸BÞÜ-à'8iF—ý÷†úÿ çu™y0AU#à iFÁ	˜ðˆíkFy`wà iFÁ	˜ð|íkFy wààÈx‰xC6.Ð˜€�™ˆBÒ-ç oç!I(ðÚïgçpµCIÿ(ŽaÑ*! ÿ÷êþ*! ÿ÷äþ0Cà*!ÿ÷ÞþÑÿ÷Íý p½pµ6L
 i1ð®é!10ÿ÷«ú - aÐÿ÷ƒþp½µ,I(H$d`!ðšï#H!ð–ïÿ!%H1ð’ï ½êç!Hµ@hð
+í½HhxpGI	h)ÐppGµL!`hðDèHI€i"1ÿ÷Œû``½J 2ŠBÐ pGµJ
Ih	$“x	z¤Ò}É(Ð‘BÐ‘BØ ½ ½|ÙÀ×ÀÜÜÀZÜÛÀèŸÀµýLài`0�{ ðbéài`0�{ ð\é÷I Hp½µ$ù÷røòI(ÑÈi`0À{(Ð(Ñà(ÑÈi`0À{(Ñà(ÑÈi`0À{(
+Ñà(ÑÈi`0À{(Ð(Ñ$Èi`0Äs„s½$øçÞJˆ9€H€zrPhH`²çµÿ÷Âÿÿ÷®ÿ½pµÕL!zd)Ñah).Ñ!ðpì»•(ÊŒ„ÀØLáüÐM=(
+Ó (^(Ð!a^)ÐÀ�BÜý÷où(
+Ð (^(Ð!a^)ÐÀ�B
+Ü`hd(
+Óhhd(Ó z)z@ˆBÒÿ÷¹ÿp½ÿ÷Áÿp½¸I¹JÈh�BØ
+0È`Hh}"Ò�BØ
+0H`´Jˆh�BØ
+0ˆ`pG­K±H­IØ` €d"H€
+rH`9€H€
+rH`ppGµÿ÷ìÿ¨Hð¦îÀx‰‰Õ€Õ�HÀi`0A|)Ð|(Ðù÷5øù÷øÿ÷1ÿ½–IHx(Ð@Hp pG pG)µÑ�I}"IhÒ‘BÒŽLahd)Ó!z)
+Ò!ðæë(Ð ˆ(Ñ`ˆ(Ð ½ ½ÿµ�°H€LÀi`0@|([Ð˜ðÐë|M'(Ð˜ðÎë(€à/€˜ðÌë(Ð˜ðÊëh€ào€.r˜h`#xðúî?AVXcmIàhˆBYÓ ç`Eà Cà™˜ÿ÷§ÿ(NÑeNg`fI h>ˆBÒ (^"ÒC(Ý!q^@�B
+Û (^(Ý!q^@�BÛ'pà§`ÿ÷½þ  p(z0r(ˆ0€hˆp€hhp`#à à™˜ÿ÷tÿ(Ñg`˜ÿ÷çþø÷ÿ(Ñÿ÷ þ  pà'pà ùç™˜ÿ÷]ÿ(Ñg`˜ÿ÷Ðþðç x°ð½pµð\ë,À4 ‚(ðZëà‚Ø4ÿ÷kþ ðVë(Ù(ðVëà(ðVë(ðVë"(ÿ÷Oÿ)Ipp½þµÿ7™7ÿ÷Ùþ< 4 }#N(ÑhzÀ;Õ"(ÿ÷6ÿ(0p/Ñ �8iFð2ë  uà($Ñ8<0#ªiFð*ë(Ð8ð(ë™	kFy	(ÿ÷ÿ(0pÐ(Ñ(ÿ÷˜ÿà(Ñ!(ðë }(Ñ þ½¤ðÃÀ‰Àp NˆN! íçµ!ð^í  p `p x!C p½J!p!Ap!"�pÂp
+"q"Bqÿ"-2‚q
+ÂqÈ"r"Br
+
+�rÂr"s"Bs�s	
+ÁspGðµ‹°ðÐê8ðÐê,~Ð.|Ð%ÿ5 á5¨t( "8÷¡ðÄêd ¨‚ ètùH¨ƒ@èƒ(¢³�ˆˆÀø¯Iv 0!
+�pAp!
+1"

+8	‘ð
+í· €)8"ðí8y#(Ñ# @8‚x) ðÄì @ �AzJR!
+C!sÁrÇ!
+@Br�zBz	Cÿ"Á2‘CAr	
+�r €0!�rb!ð0ð¦ì%ó Ï!.àè@�ÿ0ia0At|Ã"‰‰@t�|"C�t˜z} ðrìn(Ùn ™ÿ1q1‘Èpàëà
+q˜z} ð`ì™Hq
+mˆq˜z¨BÌØºH	™h"ð–ì 0ð:ê % 5 w•(php ð4ê (q èpá À `ÿ ‘0`` ð*ê%  ð*ê	 € |ß"@šRzÒÒRÒ’Ctùy8yðê˜h-Ð5T!(ð.ì ¨q èq!H AU¨z@@¨r ðê˜ÀxÀ	Ð˜@h(Ð „0ðê  d™r L0�ðúé @0�{ï"@�s…H ÿ÷ÔþƒH0 ÿ÷Áþ  b ,0!�ðèé% ÿ5A5èb˜ðâé €!ì0ðæë "à0!B‚�‚ÁŠII‘CÁ‚ hw¨wd (bhbnIø Qÿ %i0U ð:é¸BÑ8ðÂé9ðÂé pr0zÃ!€€@€€0r0h!ÿ0ÿ0€…ƒ0h"ÿ0ÿ0€Áƒ0hR!€€
+˜3Eb– Â[!’š3h1 ðžéxzý!@@@xr°ð½pµðVéIH"h 
+0ð²ë(ÿ÷wþ ðˆé ðŠép½þµ €.,Ð ÿ0"0ðšë(À0!hÀ1
+`y
+q‚yŠqByJqÀyÈqÿ ~0A]U  0B}÷!
+@5!I]	ÉÉ
+C!ÉBuh„Fjcb zû!@)zIÉ‰Cï! r@)zÉÉ	C r(€0!Gk€1OcÇkÏckc€kˆc`ziz@@ÉÉCý!`r@iz‰ÉIC`r €1| tÕ`F@jXb ðÚè�(ðÖè™‰�àMarvell Micro AP+	èÈ€Qÿç,(ð¼è� 0t®L÷„ŒÀùG$ ð²è z¿!@Ÿ@@ r) 7"1@0ð®ê&¨ 60� p�  0�A}"CAuÿ0!A0ƒAƒÿ …0S˜)@z0sÿ1 "÷1˜0ðæê)ÿ1  "Ó1t0ð‚è(ÿ0á0!‚|€1
+u‚ŠÊ‚Â|Ju‚‹ÊƒÀ‹0€èÿ0ú0x±p@xðp`zï!@!É`rhh8`!L ÁU9g`7  ¹�@](Ðð–è™uþ½˜þ!uþ½Œ!p!Ap˜!�p$!Áp°!qH!Aq`!�ql!ÁqpG
H!µhÉCð¸ï ½	Hµhð´ï½IH`IH`	IH`I€ `pGDÍ��ÀÀ<“�ÀÄ<0¸<¼<ðµ I	x)Ð ð½IN	x#3tJ $ 2q$)Ñqà)Ñ!qøç3t¡!q#!'à)Ñ#3trjÌ=Lì@$$¢BÐ àI)ëÝ+ÎÑ!1tqjð½E:D:�X038pµ$M(x(Ð(Ð p½ ðèIˆBÑ$(x(Ñ,ÑHI�`«!Ab!AbAb!Ab@j-ðòïÿ-Ñ$à	Hpðîï ðîïððï p½X:X038Â�Y:CJÿ!ˆ@1#›C€ˆSCC€ˆC€pG;H!ÉCA`!`9Hh"’C`4I6H$1€	€Ùç1JSh˜B
+ÐP`.K’
;€+J€€2€(I@	€&I9ˆüÕpGpµ$%ÿ÷áÿ"Hh(ÑH$8ˆâˆÝˆˆ-5CCC
CC )p½!Ýç!µÿ÷ÀÿH8ˆ@Õ ½ ½!µÿ÷³ÿ
+H8ˆ€Õ ½ ½!µÿ÷¦ÿH8ˆÀÐ ½,�ðŸÀ!€ÿÿøµ
&‰Gi*Ñ x	
(
Ñ· €"¡8ð"é(Ð ðì(Ñ ø½! 1x	(ÐÜ(Ð(&Ð(ÑHx&(&Ð	(Ñ	"!8ðJì	à(Ð(Ñ"!8ð@ì&0ø½+"Ãšçï€�À¹hb8ðïà+"8ðïðç+"8ðï÷çJy’yÊx‰x8ð
+ïáç)	Ð)
+Ð)Ñ€Ñ*Ð pGÀûÐà€øÕ pGÿµ …°�˜Ã@@zÁ 0)�3Ñ x‰/Ñ&	 6(Ñ"’6K"Ý! ðÊì( Ðÿ ç0@](^Ð!r{ à# 3›{+Ð!à@‚BõÜ)NÐ
+à(Ñ°zÀÐ!˜"1ð¨è˜ð°î¢“j)xÿ÷�ÿ(6Ð˜ið¨î(0Ð) ªð¤î˜!ð¤î˜($Ð`x!xCÐ-Ð @@Yðjè(Ð !8VyV@ð�î 8V6ðŽî’›*9 –ðˆî	°ð½ Àðå×ðåÈðåØøñðåÛÇðåáðå’ðåÉQðå$òðå#	ñðåIÈðåµÈðåaÈðåÇðå<ùñðåk£ðåQ´ðåW´ðå	:ñðåe6ñðåˆúñðå�5ñðå÷+ðåµ,ðå�ùñðå0÷ñðå«ðå]ðå™7ñðå[eðå‹8ñðåo9ñðåC:ñðåÓ6ñðå%6ñðå¡5ñðå¿5ñðåá5ñðåc5ñðå6ñðågiñðå�ðå�!ðåC�ðåçðåiïðåíAðåÇ–ðåHñðå?FðåVðåçLðå™ñðå90ðå¡¢ðå=ððåìòñðåñðåoCðåÉ(ðå}øðå£Žðå?Žðå{üðåËðå…VðåÅ>ðå<üñðå?çðå•ÌðåiÌðåóLðå9@ðåG,ðåõðåÁUðåsiñðå¹hñðå�iñðå—3ðåCðåÔð’S"|”Àv«ðå;ŒñðåQ‰ñðå«‰ñðå!ÒððåûhñðåðåkðåÅðåëõðåCTðåyiñðå'KðåaððåÃ.ðå¥ðå)MðåÉŒðåÃððå©.ðåë�ðåÇ�ðå*ðåO*ðå³)ðåõ)ðå¥™ððåÛÈððå˜ððå3)ðå¥*ðåm*ðå‰*ðå‹)ðå,ðåÑ*ðå»*ðå‹(ðå,ðå™hðå—hðå™NððåQUððåAúñðåÑ£ðåÁ-ðåmcðå}cðå�cðåÅ_ðå¿_ðå{ñðåÁñðåÉhðå¡ñðå�ñðåMhðåE_ðå©3ðå¥zðå¨úñðå=zðåA–ðå}$ñðåu%ñðåA9ñðå!9ñðåù9ñðå=6ñðåeÙðåaðåÝ>ñðå[:ñðåC<ñðåÉ=ñðå/?ñðå‡?ñðåã?ñðåC@ñðåAñðåoCñðå{EñðåñEñðågFñðåÛ7ðåïÙðå�%ðå»GñðåGhñðå™SñðåéMðå/Qñðå›Qñðå}ðå2ðåiNðå
‘ðåÓ�ðåy�ðåSgñðåy›ðåÁ›ðå÷›ðå¿�ðåÁ0ðå•gñðåßgñðå=œðå}&ðå!ðåÕœðåŸñðå}öðåõöðåSÙðåŒðå?›ðå×‘ðåcŽðå§‘ðå1êððå�7ðåŸ7ðåã�ðå-Lðåõ$ðåXðåãWðå‡âx˜À+•º!]ÕðåaPðåyPðå•ðå;5ðåwûðåÕèðå/ðåëøððå?üððåsÆððå¡wðåihðåCðå_`ðå�ðåÅuðåûñðå¹ØðåeØðå³JñðåÛÆðåéÆðåw/ðå/ðåEðå©BðåqØðåyIñðå[ÆððåÃGñðåOÇððåÐùñðåIñðåÑ•ðå•Vñðå�ðå
�ðåa®ðåõŽðå»¯ðåc¯ðå£�ðåuŽðåÑEðåÝœðåáRñðå5Âðå=ÄðåÃðåÙÂðåƒ#ðåÓñðåå	ñðå­œðå» ðå­{ðå;&ðåÅÃðåËÄðå±Wñðå-Yñðå
Xñðå?ðåOZñðå—Zñðå³VðåYRðåázðåYKðåK‹ñðå™¡ðåQMñðå3)ðåa5ðåaäðåñšðåSÆððåñðåËRñðå}Gðåù¢ðåcBðå×ðåí ðåŸLðåŽðåykñðå)lñðåjñðåUñðåañðå·?ðåéæðåÁjñðå[çðå'kñðåÝðå[kñðå…Wñðå@ðåëÂðåTñðå‰Tñðå÷•ðå5–ðå§Nñðåïœðå�PñðåíNñðåWñðåýHðåÛ[ñðåµ€ñðå5ÉðåÀ£ðåyAðåÉ.ðåeUñðåI/ðå%)ðåCUñðå�ðå)[ñðå¥íðåaDðåuDðåËšþpô_tœÀ¬Ã´sðåo{ðå;=ðåµEðå}=ðåUñðåYVñðåDðå/kðåéWðå{Uðå‰xðåo`ðåG�ðå¯añðåõ‹ñðå©Œñðåy5ðå�5ðå�5ðåMbñðå—^ñðå©^ñðå§íðåÿíðåùæðåCDðå«ððåûkðåQYðåcWðåƒ�ñðåé#ðåeóðåãöðå‘õðåÅõðå«õðåeõðå]õðåG…ñðåUðå½ðå[öðåÕƒñðå¯Ÿðå�žðå	ðå+2ðå¥/ðåÇððå-™ñðåã?ðå™�ðå_™ñðå'™ðå�¡ðå7Xðåi™ñðåõKðåNðåI¶ðåuÄðå/™ðå�ðå«ðå#ñðå7»ððå¥ºððå¹ºððåçºððå%»ððå˜ðåå‹ðåG¥ðåE˜ðåå|ðåoañðå·]ñðå�|ðåsdðå?dðå/_ñ$Id: w8782-B0, RF878X, FP62, 14.62.12.p205 $RC: , yhou, 2012/02/01, 21:46:07Poš	 �ÄÀ€5‡0À’ÿH×H0Pò(R@ u‚€8	(#€/,ÿ!�ÿR"RÎ2Ja (@PjmŽ #2…4K=i‚Ÿ1Õ0»I<÷10	Š6ìR2ôa
$u�4 å‚`| 	6äxöØýÂ@S;€þu4ÂzÂ	Â�€ p À¢v
+u,ÿu-ÿu0Éu1ÿu.Yu/ÿu*u+u2€ÂÂÂÂÂu&�ð²àûD ðuŽu†uˆu‰�ðtð"@ðå°T0`€�ð±äð€ñåñû$Ü@ùë$	ƒÀàë$'P"û‚Ÿ h½å.‹Ì—Åâÿ7ƒ¾
+Å»P©»8Vÿ			
+
+
 7
+uÞuäuÛuãuæuÜuÚuÝuÙ�ðàûS » €uÙ02�ð{0»¬Tß´±þ¼ ÒuòÿuôÒ¯�ðOÀ»@€
�ðUàûuñd 
+UëðuñuÙoP
+�üàÀEÐuñ‰ »uÙŒa- €»€CÙ �ðª"üt\K`uÚ·)P	Ú³uÝ�ÿØL�ƒuñŸuñ#à�ÿ!€!2!õTŸÂ¹"@ˆ»3�ü3wÐÒ u#u$u%u·uUT
Q’·ÐÂ ÂŽÂ�úPñ�ð[¶ÀÒÂUÝ`3�ú$U�¡u#u$U‚SU¢¡U‚U`ÒÂuÜuÞuäÒÃuã±»\bÊ\�¢u#u$?±‚V\¢¢\&ADóß u'uéuê…ëí…ìîà uñÒ-$	t÷%'@SÒ£O4ZÐ’Â£0;Â�ðK¡T»(�þ³mƒÂ‚t¢–r‚Ptr'[%‚9£EAÁÉö4ýe_ÂÃ52TÜÂÂÂ˜¥fÄ¤u# Â‚TT¢¤TT	�ðA%c… 	WÒ¥Ò°�ðråõð�ÿù0ª‚0àû»P.
+,t+ð+0«‚ÐÃê›P‹Ò
+€ràüD
+ðÂ
+€Â
+Ò	 00
+N¼B28
+1BÂ,B#‹–5üaDuñ
+Â°å>¥5�1Dƒ`8mIa­K1*~A…¡Ì³u#€d†qM¦³MVMGh’UTB¦Q\�ð?0u#u¸_~mÃ/€‹ñƒÂ¦v�ððöW>
W‚"Ë=/�ËPÆu#Ë 	Auñ�ñœË2áË¢ÆË
ÂƒÂ�%Pñxàû0àuÜuæß.@F<Pû# ä 	uÞÒÀu$[,'u& ™AudÈ®5“ýl¤Àˆø°ƒ›NcÀbbÊäuÀArÉAò ArË]>6R«-î«_®š�P€\Kp@»õÉ"à)ðCÜ~,`Cæíæ
+`\uè[$'u&¸QèbŽÌcèfr’Âåq>r�"bq>r“ZuèAr�Aò Ar”@>r‘"ò€>‚•}¥ÀÆ:o.«6æ~'Ü0ÈãZ^G–õuñuÜnp&upupÞP€uÛ8ž818%èZÁ„r¾IcÜn„â!„4;!‡^GÌ†Eçsä
+%"ÃÜ~TQ)®AµÂðm |CÜC Yõ%£õÿ£õ	õEq|Ò¡Â¡�ÿLÏ	
+0ü
¶Šäb	–Cj�ñ
+0âuÜ5_Ü1*
+]Î\	juè�ÿöLLÒ²Â²�ñµ
 àü»
+¼Ò·€€ëpìp
ìð%a1ýt]û#22"“2‚ÿ<CàýS@½Â
·!¦ý0ãd·äÄ<S½
uÀ0¦ ýtuÉ§uÉuƒÀ §"2ËÙ2"Ë2�}5-ä'"B“”
½HÒ£…0‚…1ƒ6)tU�ü¼åí`í€#åî`îuí€¼tá%í@í€
+î@PÂ£S½5Ò¢%~ð·MMðVMd
+¼?‡»,
+ðVìðÂ¢Sä" –J
+Â�ñˆ S|�ñàüS€¼€{p»7t[ü¼-uÛÏ.A =”üýt€]Líã4t444"4NqQ4p4!rÒ]J
æ#"‘p¼Ð!¼à-¼0€9¼
+
E¼P€Q¼î
 ]¼p€i:!qnd
+`€puÛ§
`€_uÛÎ0€NuÛR|=uÛ€uÜ ¨
+,€,uÛ@þ=Ÿ!!

1Ý<guæ6,uå;oýD
!¹”t|\ûS)µÜ{p�˜
…

+“
?uå�MvE‘ý~E]MÁ--Ò,äÒ¨uñ u‡Â¨±m®ÿ/ðL…X]h¨À¨	M|
+�þœ<=<ƒ-b,"ÀÐuÐÂ¯Û@ÒÒ¯ÐÐ2ÀàÀ‚ÀƒrŽMOÛ0‡uñS€HÒþ¢€rƒPcuñ¶>Sô,Tt„
!ñÈt?2É2Ê2Ë2Ž2�2�$2‘*2’62“62”<•0 S€Ài,	‚r�@a~
<úS
+ äº $ÿ’¢r�PÂaúDð‹0È	… SÈÉ SÈ† S€¿ƒ„@’0!ó4Ï€68-…
+=wL
ût€[B
+ä¢3ûJŸ
+$ºõÂ¨ô<ÐƒÐ‚Ðà2øÿû� 'Ò±0•ý…ó‚Â±"ª‚«ƒC‰ŠŠ‹ŒÒŒ0�ýÂŒÂ�"….‚…/ƒ)3 Â²0‘ª2{åéÃšõéåê›õê€0�	ê%éõéë5êLt$ÿ"]å2Ãõ2äª1@ÄÊÄTjÊTÊjÊû\,ÀÀNd0
�êµ*ëµ+Ò—J¬&}ì*úí;û€êµ+¢, -êÃœúë�û u3å3%3üä¢�3ý,õ3S3ŠéëÄTðÅéÄÅéeéÅéPeéõê�	3´t€  ’
¢
rä3õ‚¬|u,ÿ%ý	€ö®¯0Á/ÝëpŽ‚�ƒàøå#Rèµ#ED0íµ$@
+å&-ý€íµ%€9íÃ•&ýì,øä¢3(Tü´ä3øŠ‚‹ƒíðä¸õøä¼
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diff -uNra linux-3.0.82/fs/cramfs/inode.c linux-3.0.82x/fs/cramfs/inode.c
--- linux-3.0.82/fs/cramfs/inode.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/fs/cramfs/inode.c	2017-09-23 03:42:50.290674232 +0800
@@ -145,6 +145,69 @@
  * Returns a pointer to a buffer containing at least LEN bytes of
  * filesystem starting at byte offset OFFSET into the filesystem.
  */
+#ifdef CONFIG_MTD_NAND_LS1X		//lxy
+static unsigned int cramfs_nand_transfer_offset(struct super_block *sb, unsigned int offset)
+{
+    struct cramfs_sb_info *sbi = sb->s_fs_info;
+    struct cramfs_nand_info *nandinfo;
+
+    nandinfo = &(sbi->cram_nand_inf);
+    
+    if (!nandinfo->erasesize_shift || !nandinfo->block_map)
+        return offset;
+
+    if (offset > nandinfo->size)
+        return offset;
+    
+    return  (offset + nandinfo->block_map[offset >> nandinfo->erasesize_shift]);
+}
+
+static void cramfs_fill_nand(struct super_block *sb)
+{
+    struct cramfs_sb_info *sbi = sb->s_fs_info;
+    struct cramfs_nand_info *nandinfo;
+    uint32_t *block_map = NULL;
+    uint32_t offset = 0;
+	int shift;
+    
+    nandinfo = &(sbi->cram_nand_inf);
+    
+    if(MAJOR(sb->s_dev) == MTD_BLOCK_MAJOR)
+	{
+        struct mtd_info *mtd;
+        int blocks, i;
+
+        mtd = get_mtd_device(NULL, MINOR(sb->s_dev));
+        if(!mtd)
+            return;
+
+        if(mtd->type != MTD_NANDFLASH)
+            return;
+
+		shift = ffs(mtd->erasesize) - 1;
+        blocks = mtd->size >> shift;
+//        printk("cramfs_fill_nand blocks is %d-----------------------\n\n\n\n", blocks);
+        block_map = kmalloc(blocks*sizeof(uint32_t), GFP_KERNEL);
+        if (!block_map)
+            return ;
+        
+        for(i = 0; i < blocks; i++){
+            if (mtd->block_isbad(mtd, (loff_t)i*mtd->erasesize))
+            {
+                 offset += mtd->erasesize;
+				 printk ("cramfs skip the badblock at 0x%x !\n", i*mtd->erasesize);
+            }
+            block_map[i] = offset;
+        }
+        
+        nandinfo->erasesize_shift = shift;
+        nandinfo->block_map = block_map;
+        nandinfo->size = (uint32_t) mtd->size;
+    }
+
+}
+#endif	//#ifdef CONFIG_MTD_NAND_LS1X
+
 static void *cramfs_read(struct super_block *sb, unsigned int offset, unsigned int len)
 {
 	struct address_space *mapping = sb->s_bdev->bd_inode->i_mapping;
@@ -155,6 +218,11 @@
 
 	if (!len)
 		return NULL;
+
+#ifdef CONFIG_MTD_NAND_LS1X
+	offset = cramfs_nand_transfer_offset(sb, offset);	//lxy
+#endif
+	
 	blocknr = offset >> PAGE_CACHE_SHIFT;
 	offset &= PAGE_CACHE_SIZE - 1;
 
@@ -247,6 +315,10 @@
 		return -ENOMEM;
 	sb->s_fs_info = sbi;
 
+#ifdef CONFIG_MTD_NAND_LS1X
+	cramfs_fill_nand(sb);		//lxy
+#endif
+
 	/* Invalidate the read buffers on mount: think disk change.. */
 	mutex_lock(&read_mutex);
 	for (i = 0; i < READ_BUFFERS; i++)
@@ -254,6 +326,7 @@
 
 	/* Read the first block and get the superblock from it */
 	memcpy(&super, cramfs_read(sb, 0, sizeof(super)), sizeof(super));
+	
 	mutex_unlock(&read_mutex);
 
 	/* Do sanity checks on the superblock */
diff -uNra linux-3.0.82/fs/Kconfig linux-3.0.82x/fs/Kconfig
--- linux-3.0.82/fs/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/fs/Kconfig	2017-09-23 03:42:50.290674232 +0800
@@ -192,6 +192,10 @@
 source "fs/befs/Kconfig"
 source "fs/bfs/Kconfig"
 source "fs/efs/Kconfig"
+
+# Patched by YAFFS
+source "fs/yaffs2/Kconfig"
+
 source "fs/jffs2/Kconfig"
 # UBIFS File system configuration
 source "fs/ubifs/Kconfig"
diff -uNra linux-3.0.82/fs/Kconfig.pre.yaffs linux-3.0.82x/fs/Kconfig.pre.yaffs
--- linux-3.0.82/fs/Kconfig.pre.yaffs	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/Kconfig.pre.yaffs	2017-09-23 03:42:50.290674232 +0800
@@ -0,0 +1,273 @@
+#
+# File system configuration
+#
+
+menu "File systems"
+
+if BLOCK
+
+source "fs/ext2/Kconfig"
+source "fs/ext3/Kconfig"
+source "fs/ext4/Kconfig"
+
+config FS_XIP
+# execute in place
+	bool
+	depends on EXT2_FS_XIP
+	default y
+
+source "fs/jbd/Kconfig"
+source "fs/jbd2/Kconfig"
+
+config FS_MBCACHE
+# Meta block cache for Extended Attributes (ext2/ext3/ext4)
+	tristate
+	default y if EXT2_FS=y && EXT2_FS_XATTR
+	default y if EXT3_FS=y && EXT3_FS_XATTR
+	default y if EXT4_FS=y && EXT4_FS_XATTR
+	default m if EXT2_FS_XATTR || EXT3_FS_XATTR || EXT4_FS_XATTR
+
+source "fs/reiserfs/Kconfig"
+source "fs/jfs/Kconfig"
+
+source "fs/xfs/Kconfig"
+source "fs/gfs2/Kconfig"
+source "fs/ocfs2/Kconfig"
+source "fs/btrfs/Kconfig"
+source "fs/nilfs2/Kconfig"
+
+endif # BLOCK
+
+# Posix ACL utility routines
+#
+# Note: Posix ACLs can be implemented without these helpers.  Never use
+# this symbol for ifdefs in core code.
+#
+config FS_POSIX_ACL
+	def_bool n
+
+config EXPORTFS
+	tristate
+
+config FILE_LOCKING
+	bool "Enable POSIX file locking API" if EXPERT
+	default y
+	help
+	  This option enables standard file locking support, required
+          for filesystems like NFS and for the flock() system
+          call. Disabling this option saves about 11k.
+
+source "fs/notify/Kconfig"
+
+source "fs/quota/Kconfig"
+
+source "fs/autofs4/Kconfig"
+source "fs/fuse/Kconfig"
+
+config CUSE
+	tristate "Character device in Userspace support"
+	depends on FUSE_FS
+	help
+	  This FUSE extension allows character devices to be
+	  implemented in userspace.
+
+	  If you want to develop or use userspace character device
+	  based on CUSE, answer Y or M.
+
+config GENERIC_ACL
+	bool
+	select FS_POSIX_ACL
+
+menu "Caches"
+
+source "fs/fscache/Kconfig"
+source "fs/cachefiles/Kconfig"
+
+endmenu
+
+if BLOCK
+menu "CD-ROM/DVD Filesystems"
+
+source "fs/isofs/Kconfig"
+source "fs/udf/Kconfig"
+
+endmenu
+endif # BLOCK
+
+if BLOCK
+menu "DOS/FAT/NT Filesystems"
+
+source "fs/fat/Kconfig"
+source "fs/ntfs/Kconfig"
+
+endmenu
+endif # BLOCK
+
+menu "Pseudo filesystems"
+
+source "fs/proc/Kconfig"
+source "fs/sysfs/Kconfig"
+
+config TMPFS
+	bool "Virtual memory file system support (former shm fs)"
+	depends on SHMEM
+	help
+	  Tmpfs is a file system which keeps all files in virtual memory.
+
+	  Everything in tmpfs is temporary in the sense that no files will be
+	  created on your hard drive. The files live in memory and swap
+	  space. If you unmount a tmpfs instance, everything stored therein is
+	  lost.
+
+	  See <file:Documentation/filesystems/tmpfs.txt> for details.
+
+config TMPFS_POSIX_ACL
+	bool "Tmpfs POSIX Access Control Lists"
+	depends on TMPFS
+	select TMPFS_XATTR
+	select GENERIC_ACL
+	help
+	  POSIX Access Control Lists (ACLs) support permissions for users and
+	  groups beyond the owner/group/world scheme.
+
+	  To learn more about Access Control Lists, visit the POSIX ACLs for
+	  Linux website <http://acl.bestbits.at/>.
+
+	  If you don't know what Access Control Lists are, say N.
+
+config TMPFS_XATTR
+	bool "Tmpfs extended attributes"
+	depends on TMPFS
+	default n
+	help
+	  Extended attributes are name:value pairs associated with inodes by
+	  the kernel or by users (see the attr(5) manual page, or visit
+	  <http://acl.bestbits.at/> for details).
+
+	  Currently this enables support for the trusted.* and
+	  security.* namespaces.
+
+	  You need this for POSIX ACL support on tmpfs.
+
+	  If unsure, say N.
+
+config HUGETLBFS
+	bool "HugeTLB file system support"
+	depends on X86 || IA64 || SPARC64 || (S390 && 64BIT) || \
+		   SYS_SUPPORTS_HUGETLBFS || BROKEN
+	help
+	  hugetlbfs is a filesystem backing for HugeTLB pages, based on
+	  ramfs. For architectures that support it, say Y here and read
+	  <file:Documentation/vm/hugetlbpage.txt> for details.
+
+	  If unsure, say N.
+
+config HUGETLB_PAGE
+	def_bool HUGETLBFS
+
+source "fs/configfs/Kconfig"
+
+endmenu
+
+menuconfig MISC_FILESYSTEMS
+	bool "Miscellaneous filesystems"
+	default y
+	---help---
+	  Say Y here to get to see options for various miscellaneous
+	  filesystems, such as filesystems that came from other
+	  operating systems.
+
+	  This option alone does not add any kernel code.
+
+	  If you say N, all options in this submenu will be skipped and
+	  disabled; if unsure, say Y here.
+
+if MISC_FILESYSTEMS
+
+source "fs/adfs/Kconfig"
+source "fs/affs/Kconfig"
+source "fs/ecryptfs/Kconfig"
+source "fs/hfs/Kconfig"
+source "fs/hfsplus/Kconfig"
+source "fs/befs/Kconfig"
+source "fs/bfs/Kconfig"
+source "fs/efs/Kconfig"
+source "fs/jffs2/Kconfig"
+# UBIFS File system configuration
+source "fs/ubifs/Kconfig"
+source "fs/logfs/Kconfig"
+source "fs/cramfs/Kconfig"
+source "fs/squashfs/Kconfig"
+source "fs/freevxfs/Kconfig"
+source "fs/minix/Kconfig"
+source "fs/omfs/Kconfig"
+source "fs/hpfs/Kconfig"
+source "fs/qnx4/Kconfig"
+source "fs/romfs/Kconfig"
+source "fs/pstore/Kconfig"
+source "fs/sysv/Kconfig"
+source "fs/ufs/Kconfig"
+source "fs/exofs/Kconfig"
+
+endif # MISC_FILESYSTEMS
+
+menuconfig NETWORK_FILESYSTEMS
+	bool "Network File Systems"
+	default y
+	depends on NET
+	---help---
+	  Say Y here to get to see options for network filesystems and
+	  filesystem-related networking code, such as NFS daemon and
+	  RPCSEC security modules.
+
+	  This option alone does not add any kernel code.
+
+	  If you say N, all options in this submenu will be skipped and
+	  disabled; if unsure, say Y here.
+
+if NETWORK_FILESYSTEMS
+
+source "fs/nfs/Kconfig"
+source "fs/nfsd/Kconfig"
+
+config LOCKD
+	tristate
+	depends on FILE_LOCKING
+
+config LOCKD_V4
+	bool
+	depends on NFSD_V3 || NFS_V3
+	depends on FILE_LOCKING
+	default y
+
+config NFS_ACL_SUPPORT
+	tristate
+	select FS_POSIX_ACL
+
+config NFS_COMMON
+	bool
+	depends on NFSD || NFS_FS
+	default y
+
+source "net/sunrpc/Kconfig"
+source "fs/ceph/Kconfig"
+source "fs/cifs/Kconfig"
+source "fs/ncpfs/Kconfig"
+source "fs/coda/Kconfig"
+source "fs/afs/Kconfig"
+source "fs/9p/Kconfig"
+
+endif # NETWORK_FILESYSTEMS
+
+if BLOCK
+menu "Partition Types"
+
+source "fs/partitions/Kconfig"
+
+endmenu
+endif
+
+source "fs/nls/Kconfig"
+source "fs/dlm/Kconfig"
+
+endmenu
diff -uNra linux-3.0.82/fs/Makefile linux-3.0.82x/fs/Makefile
--- linux-3.0.82/fs/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/fs/Makefile	2017-09-23 03:42:50.294674220 +0800
@@ -124,3 +124,6 @@
 obj-$(CONFIG_EXOFS_FS)          += exofs/
 obj-$(CONFIG_CEPH_FS)		+= ceph/
 obj-$(CONFIG_PSTORE)		+= pstore/
+
+# Patched by YAFFS
+obj-$(CONFIG_YAFFS_FS)		+= yaffs2/
diff -uNra linux-3.0.82/fs/Makefile.pre.yaffs linux-3.0.82x/fs/Makefile.pre.yaffs
--- linux-3.0.82/fs/Makefile.pre.yaffs	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/Makefile.pre.yaffs	2017-09-23 03:42:50.294674220 +0800
@@ -0,0 +1,126 @@
+#
+# Makefile for the Linux filesystems.
+#
+# 14 Sep 2000, Christoph Hellwig <hch@infradead.org>
+# Rewritten to use lists instead of if-statements.
+# 
+
+obj-y :=	open.o read_write.o file_table.o super.o \
+		char_dev.o stat.o exec.o pipe.o namei.o fcntl.o \
+		ioctl.o readdir.o select.o fifo.o dcache.o inode.o \
+		attr.o bad_inode.o file.o filesystems.o namespace.o \
+		seq_file.o xattr.o libfs.o fs-writeback.o \
+		pnode.o drop_caches.o splice.o sync.o utimes.o \
+		stack.o fs_struct.o statfs.o
+
+ifeq ($(CONFIG_BLOCK),y)
+obj-y +=	buffer.o bio.o block_dev.o direct-io.o mpage.o ioprio.o
+else
+obj-y +=	no-block.o
+endif
+
+obj-$(CONFIG_BLK_DEV_INTEGRITY) += bio-integrity.o
+obj-y				+= notify/
+obj-$(CONFIG_EPOLL)		+= eventpoll.o
+obj-$(CONFIG_ANON_INODES)	+= anon_inodes.o
+obj-$(CONFIG_SIGNALFD)		+= signalfd.o
+obj-$(CONFIG_TIMERFD)		+= timerfd.o
+obj-$(CONFIG_EVENTFD)		+= eventfd.o
+obj-$(CONFIG_AIO)               += aio.o
+obj-$(CONFIG_FILE_LOCKING)      += locks.o
+obj-$(CONFIG_COMPAT)		+= compat.o compat_ioctl.o
+obj-$(CONFIG_NFSD_DEPRECATED)	+= nfsctl.o
+obj-$(CONFIG_BINFMT_AOUT)	+= binfmt_aout.o
+obj-$(CONFIG_BINFMT_EM86)	+= binfmt_em86.o
+obj-$(CONFIG_BINFMT_MISC)	+= binfmt_misc.o
+
+# binfmt_script is always there
+obj-y				+= binfmt_script.o
+
+obj-$(CONFIG_BINFMT_ELF)	+= binfmt_elf.o
+obj-$(CONFIG_COMPAT_BINFMT_ELF)	+= compat_binfmt_elf.o
+obj-$(CONFIG_BINFMT_ELF_FDPIC)	+= binfmt_elf_fdpic.o
+obj-$(CONFIG_BINFMT_SOM)	+= binfmt_som.o
+obj-$(CONFIG_BINFMT_FLAT)	+= binfmt_flat.o
+
+obj-$(CONFIG_FS_MBCACHE)	+= mbcache.o
+obj-$(CONFIG_FS_POSIX_ACL)	+= posix_acl.o xattr_acl.o
+obj-$(CONFIG_NFS_COMMON)	+= nfs_common/
+obj-$(CONFIG_GENERIC_ACL)	+= generic_acl.o
+
+obj-$(CONFIG_FHANDLE)		+= fhandle.o
+
+obj-y				+= quota/
+
+obj-$(CONFIG_PROC_FS)		+= proc/
+obj-y				+= partitions/
+obj-$(CONFIG_SYSFS)		+= sysfs/
+obj-$(CONFIG_CONFIGFS_FS)	+= configfs/
+obj-y				+= devpts/
+
+obj-$(CONFIG_PROFILING)		+= dcookies.o
+obj-$(CONFIG_DLM)		+= dlm/
+ 
+# Do not add any filesystems before this line
+obj-$(CONFIG_FSCACHE)		+= fscache/
+obj-$(CONFIG_REISERFS_FS)	+= reiserfs/
+obj-$(CONFIG_EXT3_FS)		+= ext3/ # Before ext2 so root fs can be ext3
+obj-$(CONFIG_EXT2_FS)		+= ext2/
+# We place ext4 after ext2 so plain ext2 root fs's are mounted using ext2
+# unless explicitly requested by rootfstype
+obj-$(CONFIG_EXT4_FS)		+= ext4/
+obj-$(CONFIG_JBD)		+= jbd/
+obj-$(CONFIG_JBD2)		+= jbd2/
+obj-$(CONFIG_CRAMFS)		+= cramfs/
+obj-$(CONFIG_SQUASHFS)		+= squashfs/
+obj-y				+= ramfs/
+obj-$(CONFIG_HUGETLBFS)		+= hugetlbfs/
+obj-$(CONFIG_CODA_FS)		+= coda/
+obj-$(CONFIG_MINIX_FS)		+= minix/
+obj-$(CONFIG_FAT_FS)		+= fat/
+obj-$(CONFIG_BFS_FS)		+= bfs/
+obj-$(CONFIG_ISO9660_FS)	+= isofs/
+obj-$(CONFIG_HFSPLUS_FS)	+= hfsplus/ # Before hfs to find wrapped HFS+
+obj-$(CONFIG_HFS_FS)		+= hfs/
+obj-$(CONFIG_ECRYPT_FS)		+= ecryptfs/
+obj-$(CONFIG_VXFS_FS)		+= freevxfs/
+obj-$(CONFIG_NFS_FS)		+= nfs/
+obj-$(CONFIG_EXPORTFS)		+= exportfs/
+obj-$(CONFIG_NFSD)		+= nfsd/
+obj-$(CONFIG_LOCKD)		+= lockd/
+obj-$(CONFIG_NLS)		+= nls/
+obj-$(CONFIG_SYSV_FS)		+= sysv/
+obj-$(CONFIG_CIFS)		+= cifs/
+obj-$(CONFIG_NCP_FS)		+= ncpfs/
+obj-$(CONFIG_HPFS_FS)		+= hpfs/
+obj-$(CONFIG_NTFS_FS)		+= ntfs/
+obj-$(CONFIG_UFS_FS)		+= ufs/
+obj-$(CONFIG_EFS_FS)		+= efs/
+obj-$(CONFIG_JFFS2_FS)		+= jffs2/
+obj-$(CONFIG_LOGFS)		+= logfs/
+obj-$(CONFIG_UBIFS_FS)		+= ubifs/
+obj-$(CONFIG_AFFS_FS)		+= affs/
+obj-$(CONFIG_ROMFS_FS)		+= romfs/
+obj-$(CONFIG_QNX4FS_FS)		+= qnx4/
+obj-$(CONFIG_AUTOFS4_FS)	+= autofs4/
+obj-$(CONFIG_ADFS_FS)		+= adfs/
+obj-$(CONFIG_FUSE_FS)		+= fuse/
+obj-$(CONFIG_UDF_FS)		+= udf/
+obj-$(CONFIG_SUN_OPENPROMFS)	+= openpromfs/
+obj-$(CONFIG_OMFS_FS)		+= omfs/
+obj-$(CONFIG_JFS_FS)		+= jfs/
+obj-$(CONFIG_XFS_FS)		+= xfs/
+obj-$(CONFIG_9P_FS)		+= 9p/
+obj-$(CONFIG_AFS_FS)		+= afs/
+obj-$(CONFIG_NILFS2_FS)		+= nilfs2/
+obj-$(CONFIG_BEFS_FS)		+= befs/
+obj-$(CONFIG_HOSTFS)		+= hostfs/
+obj-$(CONFIG_HPPFS)		+= hppfs/
+obj-$(CONFIG_CACHEFILES)	+= cachefiles/
+obj-$(CONFIG_DEBUG_FS)		+= debugfs/
+obj-$(CONFIG_OCFS2_FS)		+= ocfs2/
+obj-$(CONFIG_BTRFS_FS)		+= btrfs/
+obj-$(CONFIG_GFS2_FS)           += gfs2/
+obj-$(CONFIG_EXOFS_FS)          += exofs/
+obj-$(CONFIG_CEPH_FS)		+= ceph/
+obj-$(CONFIG_PSTORE)		+= pstore/
diff -uNra linux-3.0.82/fs/yaffs2/Kconfig linux-3.0.82x/fs/yaffs2/Kconfig
--- linux-3.0.82/fs/yaffs2/Kconfig	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/Kconfig	2017-09-23 03:42:50.294674220 +0800
@@ -0,0 +1,161 @@
+#
+# yaffs file system configurations
+#
+
+config YAFFS_FS
+	tristate "yaffs2 file system support"
+	default n
+	depends on MTD_BLOCK
+	select YAFFS_YAFFS1
+	select YAFFS_YAFFS2
+	help
+	  yaffs2, or Yet Another Flash File System, is a file system
+	  optimised for NAND Flash chips.
+
+	  To compile the yaffs2 file system support as a module, choose M
+	  here: the module will be called yaffs2.
+
+	  If unsure, say N.
+
+	  Further information on yaffs2 is available at
+	  <http://www.aleph1.co.uk/yaffs/>.
+
+config YAFFS_YAFFS1
+	bool "512 byte / page devices"
+	depends on YAFFS_FS
+	default y
+	help
+	  Enable yaffs1 support -- yaffs for 512 byte / page devices
+
+	  Not needed for 2K-page devices.
+
+	  If unsure, say Y.
+
+config YAFFS_9BYTE_TAGS
+	bool "Use older-style on-NAND data format with pageStatus byte"
+	depends on YAFFS_YAFFS1
+	default n
+	help
+
+	  Older-style on-NAND data format has a "pageStatus" byte to record
+	  chunk/page state.  This byte is zero when the page is discarded.
+	  Choose this option if you have existing on-NAND data using this
+	  format that you need to continue to support.  New data written
+	  also uses the older-style format.  Note: Use of this option
+	  generally requires that MTD's oob layout be adjusted to use the
+	  older-style format.  See notes on tags formats and MTD versions
+	  in yaffs_mtdif1.c.
+
+	  If unsure, say N.
+
+config YAFFS_DOES_ECC
+	bool "Lets yaffs do its own ECC"
+	depends on YAFFS_FS && YAFFS_YAFFS1 && !YAFFS_9BYTE_TAGS
+	default n
+	help
+	  This enables yaffs to use its own ECC functions instead of using
+	  the ones from the generic MTD-NAND driver.
+
+	  If unsure, say N.
+
+config YAFFS_ECC_WRONG_ORDER
+	bool "Use the same ecc byte order as Steven Hill's nand_ecc.c"
+	depends on YAFFS_FS && YAFFS_DOES_ECC && !YAFFS_9BYTE_TAGS
+	default n
+	help
+	  This makes yaffs_ecc.c use the same ecc byte order as Steven
+	  Hill's nand_ecc.c. If not set, then you get the same ecc byte
+	  order as SmartMedia.
+
+	  If unsure, say N.
+
+config YAFFS_YAFFS2
+	bool "2048 byte (or larger) / page devices"
+	depends on YAFFS_FS
+	default y
+	help
+	  Enable yaffs2 support -- yaffs for >= 2K bytes per page devices
+
+	  If unsure, say Y.
+
+config YAFFS_AUTO_YAFFS2
+	bool "Autoselect yaffs2 format"
+	depends on YAFFS_YAFFS2
+	default y
+	help
+	  Without this, you need to explicitely use yaffs2 as the file
+	  system type. With this, you can say "yaffs" and yaffs or yaffs2
+	  will be used depending on the device page size (yaffs on
+	  512-byte page devices, yaffs2 on 2K page devices).
+
+	  If unsure, say Y.
+
+config YAFFS_DISABLE_TAGS_ECC
+	bool "Disable yaffs from doing ECC on tags by default"
+	depends on YAFFS_FS && YAFFS_YAFFS2
+	default n
+	help
+	  This defaults yaffs to using its own ECC calculations on tags instead of
+	  just relying on the MTD.
+	  This behavior can also be overridden with tags_ecc_on and
+	  tags_ecc_off mount options.
+
+	  If unsure, say N.
+
+config YAFFS_ALWAYS_CHECK_CHUNK_ERASED
+	bool "Force chunk erase check"
+	depends on YAFFS_FS
+	default n
+	help
+          Normally yaffs only checks chunks before writing until an erased
+	  chunk is found. This helps to detect any partially written
+	  chunks that might have happened due to power loss.
+
+	  Enabling this forces on the test that chunks are erased in flash
+	  before writing to them. This takes more time but is potentially
+	  a bit more secure.
+
+	  Suggest setting Y during development and ironing out driver
+	  issues etc. Suggest setting to N if you want faster writing.
+
+	  If unsure, say Y.
+
+config YAFFS_EMPTY_LOST_AND_FOUND
+	bool "Empty lost and found on boot"
+	depends on YAFFS_FS
+	default n
+	help
+	  If this is enabled then the contents of lost and found is
+	  automatically dumped at mount.
+
+	  If unsure, say N.
+
+config YAFFS_DISABLE_BLOCK_REFRESHING
+	bool "Disable yaffs2 block refreshing"
+	depends on YAFFS_FS
+	default n
+	help
+	 If this is set, then block refreshing is disabled.
+	 Block refreshing infrequently refreshes the oldest block in
+	 a yaffs2 file system. This mechanism helps to refresh flash to
+	 mitigate against data loss. This is particularly useful for MLC.
+
+	  If unsure, say N.
+
+config YAFFS_DISABLE_BACKGROUND
+	bool "Disable yaffs2 background processing"
+	depends on YAFFS_FS
+	default n
+	help
+	 If this is set, then background processing is disabled.
+	 Background processing makes many foreground activities faster.
+
+	 If unsure, say N.
+
+config YAFFS_XATTR
+	bool "Enable yaffs2 xattr support"
+	depends on YAFFS_FS
+	default y
+	help
+	 If this is set then yaffs2 will provide xattr support.
+	 If unsure, say Y.
diff -uNra linux-3.0.82/fs/yaffs2/Makefile linux-3.0.82x/fs/yaffs2/Makefile
--- linux-3.0.82/fs/yaffs2/Makefile	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/Makefile	2017-09-23 03:42:50.294674220 +0800
@@ -0,0 +1,18 @@
+#
+# Makefile for the linux YAFFS filesystem routines.
+#
+
+obj-$(CONFIG_YAFFS_FS) += yaffs.o
+
+yaffs-y := yaffs_ecc.o yaffs_vfs.o yaffs_guts.o yaffs_checkptrw.o
+yaffs-y += yaffs_packedtags1.o yaffs_packedtags2.o yaffs_nand.o
+yaffs-y += yaffs_tagscompat.o
+yaffs-y += yaffs_mtdif.o yaffs_mtdif1.o yaffs_mtdif2.o
+yaffs-y += yaffs_nameval.o yaffs_attribs.o
+yaffs-y += yaffs_allocator.o
+yaffs-y += yaffs_yaffs1.o
+yaffs-y += yaffs_yaffs2.o
+yaffs-y += yaffs_bitmap.o
+yaffs-y += yaffs_summary.o
+yaffs-y += yaffs_verify.o
+
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_allocator.c linux-3.0.82x/fs/yaffs2/yaffs_allocator.c
--- linux-3.0.82/fs/yaffs2/yaffs_allocator.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_allocator.c	2017-09-23 03:42:50.294674220 +0800
@@ -0,0 +1,357 @@
+/*
+ * YAFFS: Yet Another Flash File System. A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "yaffs_allocator.h"
+#include "yaffs_guts.h"
+#include "yaffs_trace.h"
+#include "yportenv.h"
+
+/*
+ * Each entry in yaffs_tnode_list and yaffs_obj_list hold blocks
+ * of approx 100 objects that are themn allocated singly.
+ * This is basically a simplified slab allocator.
+ *
+ * We don't use the Linux slab allocator because slab does not allow
+ * us to dump all the objects in one hit when we do a umount and tear
+ * down  all the tnodes and objects. slab requires that we first free
+ * the individual objects.
+ *
+ * Once yaffs has been mainlined I shall try to motivate for a change
+ * to slab to provide the extra features we need here.
+ */
+
+struct yaffs_tnode_list {
+	struct yaffs_tnode_list *next;
+	struct yaffs_tnode *tnodes;
+};
+
+struct yaffs_obj_list {
+	struct yaffs_obj_list *next;
+	struct yaffs_obj *objects;
+};
+
+struct yaffs_allocator {
+	int n_tnodes_created;
+	struct yaffs_tnode *free_tnodes;
+	int n_free_tnodes;
+	struct yaffs_tnode_list *alloc_tnode_list;
+
+	int n_obj_created;
+	struct list_head free_objs;
+	int n_free_objects;
+
+	struct yaffs_obj_list *allocated_obj_list;
+};
+
+static void yaffs_deinit_raw_tnodes(struct yaffs_dev *dev)
+{
+	struct yaffs_allocator *allocator =
+	    (struct yaffs_allocator *)dev->allocator;
+	struct yaffs_tnode_list *tmp;
+
+	if (!allocator) {
+		BUG();
+		return;
+	}
+
+	while (allocator->alloc_tnode_list) {
+		tmp = allocator->alloc_tnode_list->next;
+
+		kfree(allocator->alloc_tnode_list->tnodes);
+		kfree(allocator->alloc_tnode_list);
+		allocator->alloc_tnode_list = tmp;
+	}
+
+	allocator->free_tnodes = NULL;
+	allocator->n_free_tnodes = 0;
+	allocator->n_tnodes_created = 0;
+}
+
+static void yaffs_init_raw_tnodes(struct yaffs_dev *dev)
+{
+	struct yaffs_allocator *allocator = dev->allocator;
+
+	if (!allocator) {
+		BUG();
+		return;
+	}
+
+	allocator->alloc_tnode_list = NULL;
+	allocator->free_tnodes = NULL;
+	allocator->n_free_tnodes = 0;
+	allocator->n_tnodes_created = 0;
+}
+
+static int yaffs_create_tnodes(struct yaffs_dev *dev, int n_tnodes)
+{
+	struct yaffs_allocator *allocator =
+	    (struct yaffs_allocator *)dev->allocator;
+	int i;
+	struct yaffs_tnode *new_tnodes;
+	u8 *mem;
+	struct yaffs_tnode *curr;
+	struct yaffs_tnode *next;
+	struct yaffs_tnode_list *tnl;
+
+	if (!allocator) {
+		BUG();
+		return YAFFS_FAIL;
+	}
+
+	if (n_tnodes < 1)
+		return YAFFS_OK;
+
+	/* make these things */
+	new_tnodes = kmalloc(n_tnodes * dev->tnode_size, GFP_NOFS);
+	mem = (u8 *) new_tnodes;
+
+	if (!new_tnodes) {
+		yaffs_trace(YAFFS_TRACE_ERROR,
+			"yaffs: Could not allocate Tnodes");
+		return YAFFS_FAIL;
+	}
+
+	/* New hookup for wide tnodes */
+	for (i = 0; i < n_tnodes - 1; i++) {
+		curr = (struct yaffs_tnode *)&mem[i * dev->tnode_size];
+		next = (struct yaffs_tnode *)&mem[(i + 1) * dev->tnode_size];
+		curr->internal[0] = next;
+	}
+
+	curr = (struct yaffs_tnode *)&mem[(n_tnodes - 1) * dev->tnode_size];
+	curr->internal[0] = allocator->free_tnodes;
+	allocator->free_tnodes = (struct yaffs_tnode *)mem;
+
+	allocator->n_free_tnodes += n_tnodes;
+	allocator->n_tnodes_created += n_tnodes;
+
+	/* Now add this bunch of tnodes to a list for freeing up.
+	 * NB If we can't add this to the management list it isn't fatal
+	 * but it just means we can't free this bunch of tnodes later.
+	 */
+	tnl = kmalloc(sizeof(struct yaffs_tnode_list), GFP_NOFS);
+	if (!tnl) {
+		yaffs_trace(YAFFS_TRACE_ERROR,
+			"Could not add tnodes to management list");
+		return YAFFS_FAIL;
+	} else {
+		tnl->tnodes = new_tnodes;
+		tnl->next = allocator->alloc_tnode_list;
+		allocator->alloc_tnode_list = tnl;
+	}
+
+	yaffs_trace(YAFFS_TRACE_ALLOCATE, "Tnodes added");
+
+	return YAFFS_OK;
+}
+
+struct yaffs_tnode *yaffs_alloc_raw_tnode(struct yaffs_dev *dev)
+{
+	struct yaffs_allocator *allocator =
+	    (struct yaffs_allocator *)dev->allocator;
+	struct yaffs_tnode *tn = NULL;
+
+	if (!allocator) {
+		BUG();
+		return NULL;
+	}
+
+	/* If there are none left make more */
+	if (!allocator->free_tnodes)
+		yaffs_create_tnodes(dev, YAFFS_ALLOCATION_NTNODES);
+
+	if (allocator->free_tnodes) {
+		tn = allocator->free_tnodes;
+		allocator->free_tnodes = allocator->free_tnodes->internal[0];
+		allocator->n_free_tnodes--;
+	}
+
+	return tn;
+}
+
+/* FreeTnode frees up a tnode and puts it back on the free list */
+void yaffs_free_raw_tnode(struct yaffs_dev *dev, struct yaffs_tnode *tn)
+{
+	struct yaffs_allocator *allocator = dev->allocator;
+
+	if (!allocator) {
+		BUG();
+		return;
+	}
+
+	if (tn) {
+		tn->internal[0] = allocator->free_tnodes;
+		allocator->free_tnodes = tn;
+		allocator->n_free_tnodes++;
+	}
+	dev->checkpoint_blocks_required = 0;	/* force recalculation */
+}
+
+/*--------------- yaffs_obj alloaction ------------------------
+ *
+ * Free yaffs_objs are stored in a list using obj->siblings.
+ * The blocks of allocated objects are stored in a linked list.
+ */
+
+static void yaffs_init_raw_objs(struct yaffs_dev *dev)
+{
+	struct yaffs_allocator *allocator = dev->allocator;
+
+	if (!allocator) {
+		BUG();
+		return;
+	}
+
+	allocator->allocated_obj_list = NULL;
+	INIT_LIST_HEAD(&allocator->free_objs);
+	allocator->n_free_objects = 0;
+}
+
+static void yaffs_deinit_raw_objs(struct yaffs_dev *dev)
+{
+	struct yaffs_allocator *allocator = dev->allocator;
+	struct yaffs_obj_list *tmp;
+
+	if (!allocator) {
+		BUG();
+		return;
+	}
+
+	while (allocator->allocated_obj_list) {
+		tmp = allocator->allocated_obj_list->next;
+		kfree(allocator->allocated_obj_list->objects);
+		kfree(allocator->allocated_obj_list);
+		allocator->allocated_obj_list = tmp;
+	}
+
+	INIT_LIST_HEAD(&allocator->free_objs);
+	allocator->n_free_objects = 0;
+	allocator->n_obj_created = 0;
+}
+
+static int yaffs_create_free_objs(struct yaffs_dev *dev, int n_obj)
+{
+	struct yaffs_allocator *allocator = dev->allocator;
+	int i;
+	struct yaffs_obj *new_objs;
+	struct yaffs_obj_list *list;
+
+	if (!allocator) {
+		BUG();
+		return YAFFS_FAIL;
+	}
+
+	if (n_obj < 1)
+		return YAFFS_OK;
+
+	/* make these things */
+	new_objs = kmalloc(n_obj * sizeof(struct yaffs_obj), GFP_NOFS);
+	list = kmalloc(sizeof(struct yaffs_obj_list), GFP_NOFS);
+
+	if (!new_objs || !list) {
+		kfree(new_objs);
+		new_objs = NULL;
+		kfree(list);
+		list = NULL;
+		yaffs_trace(YAFFS_TRACE_ALLOCATE,
+			"Could not allocate more objects");
+		return YAFFS_FAIL;
+	}
+
+	/* Hook them into the free list */
+	for (i = 0; i < n_obj; i++)
+		list_add(&new_objs[i].siblings, &allocator->free_objs);
+
+	allocator->n_free_objects += n_obj;
+	allocator->n_obj_created += n_obj;
+
+	/* Now add this bunch of Objects to a list for freeing up. */
+
+	list->objects = new_objs;
+	list->next = allocator->allocated_obj_list;
+	allocator->allocated_obj_list = list;
+
+	return YAFFS_OK;
+}
+
+struct yaffs_obj *yaffs_alloc_raw_obj(struct yaffs_dev *dev)
+{
+	struct yaffs_obj *obj = NULL;
+	struct list_head *lh;
+	struct yaffs_allocator *allocator = dev->allocator;
+
+	if (!allocator) {
+		BUG();
+		return obj;
+	}
+
+	/* If there are none left make more */
+	if (list_empty(&allocator->free_objs))
+		yaffs_create_free_objs(dev, YAFFS_ALLOCATION_NOBJECTS);
+
+	if (!list_empty(&allocator->free_objs)) {
+		lh = allocator->free_objs.next;
+		obj = list_entry(lh, struct yaffs_obj, siblings);
+		list_del_init(lh);
+		allocator->n_free_objects--;
+	}
+
+	return obj;
+}
+
+void yaffs_free_raw_obj(struct yaffs_dev *dev, struct yaffs_obj *obj)
+{
+
+	struct yaffs_allocator *allocator = dev->allocator;
+
+	if (!allocator) {
+		BUG();
+		return;
+	}
+
+	/* Link into the free list. */
+	list_add(&obj->siblings, &allocator->free_objs);
+	allocator->n_free_objects++;
+}
+
+void yaffs_deinit_raw_tnodes_and_objs(struct yaffs_dev *dev)
+{
+
+	if (!dev->allocator) {
+		BUG();
+		return;
+	}
+
+	yaffs_deinit_raw_tnodes(dev);
+	yaffs_deinit_raw_objs(dev);
+	kfree(dev->allocator);
+	dev->allocator = NULL;
+}
+
+void yaffs_init_raw_tnodes_and_objs(struct yaffs_dev *dev)
+{
+	struct yaffs_allocator *allocator;
+
+	if (dev->allocator) {
+		BUG();
+		return;
+	}
+
+	allocator = kmalloc(sizeof(struct yaffs_allocator), GFP_NOFS);
+	if (allocator) {
+		dev->allocator = allocator;
+		yaffs_init_raw_tnodes(dev);
+		yaffs_init_raw_objs(dev);
+	}
+}
+
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_allocator.h linux-3.0.82x/fs/yaffs2/yaffs_allocator.h
--- linux-3.0.82/fs/yaffs2/yaffs_allocator.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_allocator.h	2017-09-23 03:42:50.294674220 +0800
@@ -0,0 +1,30 @@
+/*
+ * YAFFS: Yet another Flash File System . A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1 as
+ * published by the Free Software Foundation.
+ *
+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
+ */
+
+#ifndef __YAFFS_ALLOCATOR_H__
+#define __YAFFS_ALLOCATOR_H__
+
+#include "yaffs_guts.h"
+
+void yaffs_init_raw_tnodes_and_objs(struct yaffs_dev *dev);
+void yaffs_deinit_raw_tnodes_and_objs(struct yaffs_dev *dev);
+
+struct yaffs_tnode *yaffs_alloc_raw_tnode(struct yaffs_dev *dev);
+void yaffs_free_raw_tnode(struct yaffs_dev *dev, struct yaffs_tnode *tn);
+
+struct yaffs_obj *yaffs_alloc_raw_obj(struct yaffs_dev *dev);
+void yaffs_free_raw_obj(struct yaffs_dev *dev, struct yaffs_obj *obj);
+
+#endif
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_attribs.c linux-3.0.82x/fs/yaffs2/yaffs_attribs.c
--- linux-3.0.82/fs/yaffs2/yaffs_attribs.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_attribs.c	2017-09-23 03:42:50.294674220 +0800
@@ -0,0 +1,124 @@
+/*
+ * YAFFS: Yet Another Flash File System. A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "yaffs_guts.h"
+#include "yaffs_attribs.h"
+
+void yaffs_load_attribs(struct yaffs_obj *obj, struct yaffs_obj_hdr *oh)
+{
+	obj->yst_uid = oh->yst_uid;
+	obj->yst_gid = oh->yst_gid;
+	obj->yst_atime = oh->yst_atime;
+	obj->yst_mtime = oh->yst_mtime;
+	obj->yst_ctime = oh->yst_ctime;
+	obj->yst_rdev = oh->yst_rdev;
+}
+
+void yaffs_load_attribs_oh(struct yaffs_obj_hdr *oh, struct yaffs_obj *obj)
+{
+	oh->yst_uid = obj->yst_uid;
+	oh->yst_gid = obj->yst_gid;
+	oh->yst_atime = obj->yst_atime;
+	oh->yst_mtime = obj->yst_mtime;
+	oh->yst_ctime = obj->yst_ctime;
+	oh->yst_rdev = obj->yst_rdev;
+
+}
+
+void yaffs_load_current_time(struct yaffs_obj *obj, int do_a, int do_c)
+{
+	obj->yst_mtime = Y_CURRENT_TIME;
+	if (do_a)
+		obj->yst_atime = obj->yst_mtime;
+	if (do_c)
+		obj->yst_ctime = obj->yst_mtime;
+}
+
+void yaffs_attribs_init(struct yaffs_obj *obj, u32 gid, u32 uid, u32 rdev)
+{
+	yaffs_load_current_time(obj, 1, 1);
+	obj->yst_rdev = rdev;
+	obj->yst_uid = uid;
+	obj->yst_gid = gid;
+}
+
+loff_t yaffs_get_file_size(struct yaffs_obj *obj)
+{
+	YCHAR *alias = NULL;
+	obj = yaffs_get_equivalent_obj(obj);
+
+	switch (obj->variant_type) {
+	case YAFFS_OBJECT_TYPE_FILE:
+		return obj->variant.file_variant.file_size;
+	case YAFFS_OBJECT_TYPE_SYMLINK:
+		alias = obj->variant.symlink_variant.alias;
+		if (!alias)
+			return 0;
+		return strnlen(alias, YAFFS_MAX_ALIAS_LENGTH);
+	default:
+		return 0;
+	}
+}
+
+int yaffs_set_attribs(struct yaffs_obj *obj, struct iattr *attr)
+{
+	unsigned int valid = attr->ia_valid;
+
+	if (valid & ATTR_MODE)
+		obj->yst_mode = attr->ia_mode;
+	if (valid & ATTR_UID)
+		obj->yst_uid = attr->ia_uid;
+	if (valid & ATTR_GID)
+		obj->yst_gid = attr->ia_gid;
+
+	if (valid & ATTR_ATIME)
+		obj->yst_atime = Y_TIME_CONVERT(attr->ia_atime);
+	if (valid & ATTR_CTIME)
+		obj->yst_ctime = Y_TIME_CONVERT(attr->ia_ctime);
+	if (valid & ATTR_MTIME)
+		obj->yst_mtime = Y_TIME_CONVERT(attr->ia_mtime);
+
+	if (valid & ATTR_SIZE)
+		yaffs_resize_file(obj, attr->ia_size);
+
+	yaffs_update_oh(obj, NULL, 1, 0, 0, NULL);
+
+	return YAFFS_OK;
+
+}
+
+int yaffs_get_attribs(struct yaffs_obj *obj, struct iattr *attr)
+{
+	unsigned int valid = 0;
+
+	attr->ia_mode = obj->yst_mode;
+	valid |= ATTR_MODE;
+	attr->ia_uid = obj->yst_uid;
+	valid |= ATTR_UID;
+	attr->ia_gid = obj->yst_gid;
+	valid |= ATTR_GID;
+
+	Y_TIME_CONVERT(attr->ia_atime) = obj->yst_atime;
+	valid |= ATTR_ATIME;
+	Y_TIME_CONVERT(attr->ia_ctime) = obj->yst_ctime;
+	valid |= ATTR_CTIME;
+	Y_TIME_CONVERT(attr->ia_mtime) = obj->yst_mtime;
+	valid |= ATTR_MTIME;
+
+	attr->ia_size = yaffs_get_file_size(obj);
+	valid |= ATTR_SIZE;
+
+	attr->ia_valid = valid;
+
+	return YAFFS_OK;
+}
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_attribs.h linux-3.0.82x/fs/yaffs2/yaffs_attribs.h
--- linux-3.0.82/fs/yaffs2/yaffs_attribs.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_attribs.h	2017-09-23 03:42:50.294674220 +0800
@@ -0,0 +1,28 @@
+/*
+ * YAFFS: Yet another Flash File System . A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1 as
+ * published by the Free Software Foundation.
+ *
+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
+ */
+
+#ifndef __YAFFS_ATTRIBS_H__
+#define __YAFFS_ATTRIBS_H__
+
+#include "yaffs_guts.h"
+
+void yaffs_load_attribs(struct yaffs_obj *obj, struct yaffs_obj_hdr *oh);
+void yaffs_load_attribs_oh(struct yaffs_obj_hdr *oh, struct yaffs_obj *obj);
+void yaffs_attribs_init(struct yaffs_obj *obj, u32 gid, u32 uid, u32 rdev);
+void yaffs_load_current_time(struct yaffs_obj *obj, int do_a, int do_c);
+int yaffs_set_attribs(struct yaffs_obj *obj, struct iattr *attr);
+int yaffs_get_attribs(struct yaffs_obj *obj, struct iattr *attr);
+
+#endif
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_bitmap.c linux-3.0.82x/fs/yaffs2/yaffs_bitmap.c
--- linux-3.0.82/fs/yaffs2/yaffs_bitmap.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_bitmap.c	2017-09-23 03:42:50.294674220 +0800
@@ -0,0 +1,97 @@
+/*
+ * YAFFS: Yet Another Flash File System. A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "yaffs_bitmap.h"
+#include "yaffs_trace.h"
+/*
+ * Chunk bitmap manipulations
+ */
+
+static inline u8 *yaffs_block_bits(struct yaffs_dev *dev, int blk)
+{
+	if (blk < dev->internal_start_block || blk > dev->internal_end_block) {
+		yaffs_trace(YAFFS_TRACE_ERROR,
+			"BlockBits block %d is not valid",
+			blk);
+		BUG();
+	}
+	return dev->chunk_bits +
+	    (dev->chunk_bit_stride * (blk - dev->internal_start_block));
+}
+
+void yaffs_verify_chunk_bit_id(struct yaffs_dev *dev, int blk, int chunk)
+{
+	if (blk < dev->internal_start_block || blk > dev->internal_end_block ||
+	    chunk < 0 || chunk >= dev->param.chunks_per_block) {
+		yaffs_trace(YAFFS_TRACE_ERROR,
+			"Chunk Id (%d:%d) invalid",
+			blk, chunk);
+		BUG();
+	}
+}
+
+void yaffs_clear_chunk_bits(struct yaffs_dev *dev, int blk)
+{
+	u8 *blk_bits = yaffs_block_bits(dev, blk);
+
+	memset(blk_bits, 0, dev->chunk_bit_stride);
+}
+
+void yaffs_clear_chunk_bit(struct yaffs_dev *dev, int blk, int chunk)
+{
+	u8 *blk_bits = yaffs_block_bits(dev, blk);
+
+	yaffs_verify_chunk_bit_id(dev, blk, chunk);
+	blk_bits[chunk / 8] &= ~(1 << (chunk & 7));
+}
+
+void yaffs_set_chunk_bit(struct yaffs_dev *dev, int blk, int chunk)
+{
+	u8 *blk_bits = yaffs_block_bits(dev, blk);
+
+	yaffs_verify_chunk_bit_id(dev, blk, chunk);
+	blk_bits[chunk / 8] |= (1 << (chunk & 7));
+}
+
+int yaffs_check_chunk_bit(struct yaffs_dev *dev, int blk, int chunk)
+{
+	u8 *blk_bits = yaffs_block_bits(dev, blk);
+
+	yaffs_verify_chunk_bit_id(dev, blk, chunk);
+	return (blk_bits[chunk / 8] & (1 << (chunk & 7))) ? 1 : 0;
+}
+
+int yaffs_still_some_chunks(struct yaffs_dev *dev, int blk)
+{
+	u8 *blk_bits = yaffs_block_bits(dev, blk);
+	int i;
+
+	for (i = 0; i < dev->chunk_bit_stride; i++) {
+		if (*blk_bits)
+			return 1;
+		blk_bits++;
+	}
+	return 0;
+}
+
+int yaffs_count_chunk_bits(struct yaffs_dev *dev, int blk)
+{
+	u8 *blk_bits = yaffs_block_bits(dev, blk);
+	int i;
+	int n = 0;
+
+	for (i = 0; i < dev->chunk_bit_stride; i++, blk_bits++)
+		n += hweight8(*blk_bits);
+
+	return n;
+}
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_bitmap.h linux-3.0.82x/fs/yaffs2/yaffs_bitmap.h
--- linux-3.0.82/fs/yaffs2/yaffs_bitmap.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_bitmap.h	2017-09-23 03:42:50.294674220 +0800
@@ -0,0 +1,33 @@
+/*
+ * YAFFS: Yet another Flash File System . A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1 as
+ * published by the Free Software Foundation.
+ *
+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
+ */
+
+/*
+ * Chunk bitmap manipulations
+ */
+
+#ifndef __YAFFS_BITMAP_H__
+#define __YAFFS_BITMAP_H__
+
+#include "yaffs_guts.h"
+
+void yaffs_verify_chunk_bit_id(struct yaffs_dev *dev, int blk, int chunk);
+void yaffs_clear_chunk_bits(struct yaffs_dev *dev, int blk);
+void yaffs_clear_chunk_bit(struct yaffs_dev *dev, int blk, int chunk);
+void yaffs_set_chunk_bit(struct yaffs_dev *dev, int blk, int chunk);
+int yaffs_check_chunk_bit(struct yaffs_dev *dev, int blk, int chunk);
+int yaffs_still_some_chunks(struct yaffs_dev *dev, int blk);
+int yaffs_count_chunk_bits(struct yaffs_dev *dev, int blk);
+
+#endif
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_checkptrw.c linux-3.0.82x/fs/yaffs2/yaffs_checkptrw.c
--- linux-3.0.82/fs/yaffs2/yaffs_checkptrw.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_checkptrw.c	2017-09-23 03:42:50.294674220 +0800
@@ -0,0 +1,408 @@
+/*
+ * YAFFS: Yet Another Flash File System. A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "yaffs_checkptrw.h"
+#include "yaffs_getblockinfo.h"
+
+static int yaffs2_checkpt_space_ok(struct yaffs_dev *dev)
+{
+	int blocks_avail = dev->n_erased_blocks - dev->param.n_reserved_blocks;
+
+	yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+		"checkpt blocks_avail = %d", blocks_avail);
+
+	return (blocks_avail <= 0) ? 0 : 1;
+}
+
+static int yaffs_checkpt_erase(struct yaffs_dev *dev)
+{
+	int i;
+
+	if (!dev->param.erase_fn)
+		return 0;
+	yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+		"checking blocks %d to %d",
+		dev->internal_start_block, dev->internal_end_block);
+
+	for (i = dev->internal_start_block; i <= dev->internal_end_block; i++) {
+		struct yaffs_block_info *bi = yaffs_get_block_info(dev, i);
+		if (bi->block_state == YAFFS_BLOCK_STATE_CHECKPOINT) {
+			yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+			"erasing checkpt block %d", i);
+
+			dev->n_erasures++;
+
+			if (dev->param.
+			    erase_fn(dev,
+				     i - dev->block_offset /* realign */)) {
+				bi->block_state = YAFFS_BLOCK_STATE_EMPTY;
+				dev->n_erased_blocks++;
+				dev->n_free_chunks +=
+				    dev->param.chunks_per_block;
+			} else {
+				dev->param.bad_block_fn(dev, i);
+				bi->block_state = YAFFS_BLOCK_STATE_DEAD;
+			}
+		}
+	}
+
+	dev->blocks_in_checkpt = 0;
+
+	return 1;
+}
+
+static void yaffs2_checkpt_find_erased_block(struct yaffs_dev *dev)
+{
+	int i;
+	int blocks_avail = dev->n_erased_blocks - dev->param.n_reserved_blocks;
+
+	yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+		"allocating checkpt block: erased %d reserved %d avail %d next %d ",
+		dev->n_erased_blocks, dev->param.n_reserved_blocks,
+		blocks_avail, dev->checkpt_next_block);
+
+	if (dev->checkpt_next_block >= 0 &&
+	    dev->checkpt_next_block <= dev->internal_end_block &&
+	    blocks_avail > 0) {
+
+		for (i = dev->checkpt_next_block; i <= dev->internal_end_block;
+		     i++) {
+			struct yaffs_block_info *bi =
+			    yaffs_get_block_info(dev, i);
+			if (bi->block_state == YAFFS_BLOCK_STATE_EMPTY) {
+				dev->checkpt_next_block = i + 1;
+				dev->checkpt_cur_block = i;
+				yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+					"allocating checkpt block %d", i);
+				return;
+			}
+		}
+	}
+	yaffs_trace(YAFFS_TRACE_CHECKPOINT, "out of checkpt blocks");
+
+	dev->checkpt_next_block = -1;
+	dev->checkpt_cur_block = -1;
+}
+
+static void yaffs2_checkpt_find_block(struct yaffs_dev *dev)
+{
+	int i;
+	struct yaffs_ext_tags tags;
+
+	yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+		"find next checkpt block: start:  blocks %d next %d",
+		dev->blocks_in_checkpt, dev->checkpt_next_block);
+
+	if (dev->blocks_in_checkpt < dev->checkpt_max_blocks)
+		for (i = dev->checkpt_next_block; i <= dev->internal_end_block;
+		     i++) {
+			int chunk = i * dev->param.chunks_per_block;
+			int realigned_chunk = chunk - dev->chunk_offset;
+
+			dev->param.read_chunk_tags_fn(dev, realigned_chunk,
+						      NULL, &tags);
+			yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+				"find next checkpt block: search: block %d oid %d seq %d eccr %d",
+				i, tags.obj_id, tags.seq_number,
+				tags.ecc_result);
+
+			if (tags.seq_number == YAFFS_SEQUENCE_CHECKPOINT_DATA) {
+				/* Right kind of block */
+				dev->checkpt_next_block = tags.obj_id;
+				dev->checkpt_cur_block = i;
+				dev->checkpt_block_list[dev->
+							blocks_in_checkpt] = i;
+				dev->blocks_in_checkpt++;
+				yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+					"found checkpt block %d", i);
+				return;
+			}
+		}
+
+	yaffs_trace(YAFFS_TRACE_CHECKPOINT, "found no more checkpt blocks");
+
+	dev->checkpt_next_block = -1;
+	dev->checkpt_cur_block = -1;
+}
+
+int yaffs2_checkpt_open(struct yaffs_dev *dev, int writing)
+{
+	int i;
+
+	dev->checkpt_open_write = writing;
+
+	/* Got the functions we need? */
+	if (!dev->param.write_chunk_tags_fn ||
+	    !dev->param.read_chunk_tags_fn ||
+	    !dev->param.erase_fn || !dev->param.bad_block_fn)
+		return 0;
+
+	if (writing && !yaffs2_checkpt_space_ok(dev))
+		return 0;
+
+	if (!dev->checkpt_buffer)
+		dev->checkpt_buffer =
+		    kmalloc(dev->param.total_bytes_per_chunk, GFP_NOFS);
+	if (!dev->checkpt_buffer)
+		return 0;
+
+	dev->checkpt_page_seq = 0;
+	dev->checkpt_byte_count = 0;
+	dev->checkpt_sum = 0;
+	dev->checkpt_xor = 0;
+	dev->checkpt_cur_block = -1;
+	dev->checkpt_cur_chunk = -1;
+	dev->checkpt_next_block = dev->internal_start_block;
+
+	/* Erase all the blocks in the checkpoint area */
+	if (writing) {
+		memset(dev->checkpt_buffer, 0, dev->data_bytes_per_chunk);
+		dev->checkpt_byte_offs = 0;
+		return yaffs_checkpt_erase(dev);
+	}
+
+	/* Set to a value that will kick off a read */
+	dev->checkpt_byte_offs = dev->data_bytes_per_chunk;
+	/* A checkpoint block list of 1 checkpoint block per 16 block is
+	 * (hopefully) going to be way more than we need */
+	dev->blocks_in_checkpt = 0;
+	dev->checkpt_max_blocks =
+	    (dev->internal_end_block - dev->internal_start_block) / 16 + 2;
+	dev->checkpt_block_list =
+	    kmalloc(sizeof(int) * dev->checkpt_max_blocks, GFP_NOFS);
+
+	if (!dev->checkpt_block_list)
+		return 0;
+
+	for (i = 0; i < dev->checkpt_max_blocks; i++)
+		dev->checkpt_block_list[i] = -1;
+
+	return 1;
+}
+
+int yaffs2_get_checkpt_sum(struct yaffs_dev *dev, u32 * sum)
+{
+	u32 composite_sum;
+
+	composite_sum = (dev->checkpt_sum << 8) | (dev->checkpt_xor & 0xff);
+	*sum = composite_sum;
+	return 1;
+}
+
+static int yaffs2_checkpt_flush_buffer(struct yaffs_dev *dev)
+{
+	int chunk;
+	int realigned_chunk;
+	struct yaffs_ext_tags tags;
+
+	if (dev->checkpt_cur_block < 0) {
+		yaffs2_checkpt_find_erased_block(dev);
+		dev->checkpt_cur_chunk = 0;
+	}
+
+	if (dev->checkpt_cur_block < 0)
+		return 0;
+
+	tags.is_deleted = 0;
+	tags.obj_id = dev->checkpt_next_block;	/* Hint to next place to look */
+	tags.chunk_id = dev->checkpt_page_seq + 1;
+	tags.seq_number = YAFFS_SEQUENCE_CHECKPOINT_DATA;
+	tags.n_bytes = dev->data_bytes_per_chunk;
+	if (dev->checkpt_cur_chunk == 0) {
+		/* First chunk we write for the block? Set block state to
+		   checkpoint */
+		struct yaffs_block_info *bi =
+		    yaffs_get_block_info(dev, dev->checkpt_cur_block);
+		bi->block_state = YAFFS_BLOCK_STATE_CHECKPOINT;
+		dev->blocks_in_checkpt++;
+	}
+
+	chunk =
+	    dev->checkpt_cur_block * dev->param.chunks_per_block +
+	    dev->checkpt_cur_chunk;
+
+	yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+		"checkpoint wite buffer nand %d(%d:%d) objid %d chId %d",
+		chunk, dev->checkpt_cur_block, dev->checkpt_cur_chunk,
+		tags.obj_id, tags.chunk_id);
+
+	realigned_chunk = chunk - dev->chunk_offset;
+
+	dev->n_page_writes++;
+
+	dev->param.write_chunk_tags_fn(dev, realigned_chunk,
+				       dev->checkpt_buffer, &tags);
+	dev->checkpt_byte_offs = 0;
+	dev->checkpt_page_seq++;
+	dev->checkpt_cur_chunk++;
+	if (dev->checkpt_cur_chunk >= dev->param.chunks_per_block) {
+		dev->checkpt_cur_chunk = 0;
+		dev->checkpt_cur_block = -1;
+	}
+	memset(dev->checkpt_buffer, 0, dev->data_bytes_per_chunk);
+
+	return 1;
+}
+
+int yaffs2_checkpt_wr(struct yaffs_dev *dev, const void *data, int n_bytes)
+{
+	int i = 0;
+	int ok = 1;
+	u8 *data_bytes = (u8 *) data;
+
+	if (!dev->checkpt_buffer)
+		return 0;
+
+	if (!dev->checkpt_open_write)
+		return -1;
+
+	while (i < n_bytes && ok) {
+		dev->checkpt_buffer[dev->checkpt_byte_offs] = *data_bytes;
+		dev->checkpt_sum += *data_bytes;
+		dev->checkpt_xor ^= *data_bytes;
+
+		dev->checkpt_byte_offs++;
+		i++;
+		data_bytes++;
+		dev->checkpt_byte_count++;
+
+		if (dev->checkpt_byte_offs < 0 ||
+		    dev->checkpt_byte_offs >= dev->data_bytes_per_chunk)
+			ok = yaffs2_checkpt_flush_buffer(dev);
+	}
+
+	return i;
+}
+
+int yaffs2_checkpt_rd(struct yaffs_dev *dev, void *data, int n_bytes)
+{
+	int i = 0;
+	int ok = 1;
+	struct yaffs_ext_tags tags;
+	int chunk;
+	int realigned_chunk;
+	u8 *data_bytes = (u8 *) data;
+
+	if (!dev->checkpt_buffer)
+		return 0;
+
+	if (dev->checkpt_open_write)
+		return -1;
+
+	while (i < n_bytes && ok) {
+
+		if (dev->checkpt_byte_offs < 0 ||
+		    dev->checkpt_byte_offs >= dev->data_bytes_per_chunk) {
+
+			if (dev->checkpt_cur_block < 0) {
+				yaffs2_checkpt_find_block(dev);
+				dev->checkpt_cur_chunk = 0;
+			}
+
+			if (dev->checkpt_cur_block < 0) {
+				ok = 0;
+				break;
+			}
+
+			chunk = dev->checkpt_cur_block *
+			    dev->param.chunks_per_block +
+			    dev->checkpt_cur_chunk;
+
+			realigned_chunk = chunk - dev->chunk_offset;
+			dev->n_page_reads++;
+
+			/* read in the next chunk */
+			dev->param.read_chunk_tags_fn(dev,
+						realigned_chunk,
+						dev->checkpt_buffer,
+						&tags);
+
+			if (tags.chunk_id != (dev->checkpt_page_seq + 1) ||
+			    tags.ecc_result > YAFFS_ECC_RESULT_FIXED ||
+			    tags.seq_number != YAFFS_SEQUENCE_CHECKPOINT_DATA) {
+				ok = 0;
+				break;
+			}
+
+			dev->checkpt_byte_offs = 0;
+			dev->checkpt_page_seq++;
+			dev->checkpt_cur_chunk++;
+
+			if (dev->checkpt_cur_chunk >=
+					dev->param.chunks_per_block)
+				dev->checkpt_cur_block = -1;
+		}
+
+		*data_bytes = dev->checkpt_buffer[dev->checkpt_byte_offs];
+		dev->checkpt_sum += *data_bytes;
+		dev->checkpt_xor ^= *data_bytes;
+		dev->checkpt_byte_offs++;
+		i++;
+		data_bytes++;
+		dev->checkpt_byte_count++;
+	}
+
+	return i;
+}
+
+int yaffs_checkpt_close(struct yaffs_dev *dev)
+{
+	int i;
+
+	if (dev->checkpt_open_write) {
+		if (dev->checkpt_byte_offs != 0)
+			yaffs2_checkpt_flush_buffer(dev);
+	} else if (dev->checkpt_block_list) {
+		for (i = 0;
+		     i < dev->blocks_in_checkpt &&
+		     dev->checkpt_block_list[i] >= 0; i++) {
+			int blk = dev->checkpt_block_list[i];
+			struct yaffs_block_info *bi = NULL;
+
+			if (dev->internal_start_block <= blk &&
+			    blk <= dev->internal_end_block)
+				bi = yaffs_get_block_info(dev, blk);
+			if (bi && bi->block_state == YAFFS_BLOCK_STATE_EMPTY)
+				bi->block_state = YAFFS_BLOCK_STATE_CHECKPOINT;
+		}
+		kfree(dev->checkpt_block_list);
+		dev->checkpt_block_list = NULL;
+	}
+
+	dev->n_free_chunks -=
+		dev->blocks_in_checkpt * dev->param.chunks_per_block;
+	dev->n_erased_blocks -= dev->blocks_in_checkpt;
+
+	yaffs_trace(YAFFS_TRACE_CHECKPOINT, "checkpoint byte count %d",
+		dev->checkpt_byte_count);
+
+	if (dev->checkpt_buffer) {
+		/* free the buffer */
+		kfree(dev->checkpt_buffer);
+		dev->checkpt_buffer = NULL;
+		return 1;
+	} else {
+		return 0;
+	}
+}
+
+int yaffs2_checkpt_invalidate_stream(struct yaffs_dev *dev)
+{
+	/* Erase the checkpoint data */
+
+	yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+		"checkpoint invalidate of %d blocks",
+		dev->blocks_in_checkpt);
+
+	return yaffs_checkpt_erase(dev);
+}
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_checkptrw.h linux-3.0.82x/fs/yaffs2/yaffs_checkptrw.h
--- linux-3.0.82/fs/yaffs2/yaffs_checkptrw.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_checkptrw.h	2017-09-23 03:42:50.298674208 +0800
@@ -0,0 +1,33 @@
+/*
+ * YAFFS: Yet another Flash File System . A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1 as
+ * published by the Free Software Foundation.
+ *
+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
+ */
+
+#ifndef __YAFFS_CHECKPTRW_H__
+#define __YAFFS_CHECKPTRW_H__
+
+#include "yaffs_guts.h"
+
+int yaffs2_checkpt_open(struct yaffs_dev *dev, int writing);
+
+int yaffs2_checkpt_wr(struct yaffs_dev *dev, const void *data, int n_bytes);
+
+int yaffs2_checkpt_rd(struct yaffs_dev *dev, void *data, int n_bytes);
+
+int yaffs2_get_checkpt_sum(struct yaffs_dev *dev, u32 * sum);
+
+int yaffs_checkpt_close(struct yaffs_dev *dev);
+
+int yaffs2_checkpt_invalidate_stream(struct yaffs_dev *dev);
+
+#endif
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_ecc.c linux-3.0.82x/fs/yaffs2/yaffs_ecc.c
--- linux-3.0.82/fs/yaffs2/yaffs_ecc.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_ecc.c	2017-09-23 03:42:50.298674208 +0800
@@ -0,0 +1,281 @@
+/*
+ * YAFFS: Yet Another Flash File System. A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * This code implements the ECC algorithm used in SmartMedia.
+ *
+ * The ECC comprises 22 bits of parity information and is stuffed into 3 bytes.
+ * The two unused bit are set to 1.
+ * The ECC can correct single bit errors in a 256-byte page of data. Thus, two
+ * such ECC blocks are used on a 512-byte NAND page.
+ *
+ */
+
+#include "yportenv.h"
+
+#include "yaffs_ecc.h"
+
+/* Table generated by gen-ecc.c
+ * Using a table means we do not have to calculate p1..p4 and p1'..p4'
+ * for each byte of data. These are instead provided in a table in bits7..2.
+ * Bit 0 of each entry indicates whether the entry has an odd or even parity,
+ * and therefore this bytes influence on the line parity.
+ */
+
+static const unsigned char column_parity_table[] = {
+	0x00, 0x55, 0x59, 0x0c, 0x65, 0x30, 0x3c, 0x69,
+	0x69, 0x3c, 0x30, 0x65, 0x0c, 0x59, 0x55, 0x00,
+	0x95, 0xc0, 0xcc, 0x99, 0xf0, 0xa5, 0xa9, 0xfc,
+	0xfc, 0xa9, 0xa5, 0xf0, 0x99, 0xcc, 0xc0, 0x95,
+	0x99, 0xcc, 0xc0, 0x95, 0xfc, 0xa9, 0xa5, 0xf0,
+	0xf0, 0xa5, 0xa9, 0xfc, 0x95, 0xc0, 0xcc, 0x99,
+	0x0c, 0x59, 0x55, 0x00, 0x69, 0x3c, 0x30, 0x65,
+	0x65, 0x30, 0x3c, 0x69, 0x00, 0x55, 0x59, 0x0c,
+	0xa5, 0xf0, 0xfc, 0xa9, 0xc0, 0x95, 0x99, 0xcc,
+	0xcc, 0x99, 0x95, 0xc0, 0xa9, 0xfc, 0xf0, 0xa5,
+	0x30, 0x65, 0x69, 0x3c, 0x55, 0x00, 0x0c, 0x59,
+	0x59, 0x0c, 0x00, 0x55, 0x3c, 0x69, 0x65, 0x30,
+	0x3c, 0x69, 0x65, 0x30, 0x59, 0x0c, 0x00, 0x55,
+	0x55, 0x00, 0x0c, 0x59, 0x30, 0x65, 0x69, 0x3c,
+	0xa9, 0xfc, 0xf0, 0xa5, 0xcc, 0x99, 0x95, 0xc0,
+	0xc0, 0x95, 0x99, 0xcc, 0xa5, 0xf0, 0xfc, 0xa9,
+	0xa9, 0xfc, 0xf0, 0xa5, 0xcc, 0x99, 0x95, 0xc0,
+	0xc0, 0x95, 0x99, 0xcc, 0xa5, 0xf0, 0xfc, 0xa9,
+	0x3c, 0x69, 0x65, 0x30, 0x59, 0x0c, 0x00, 0x55,
+	0x55, 0x00, 0x0c, 0x59, 0x30, 0x65, 0x69, 0x3c,
+	0x30, 0x65, 0x69, 0x3c, 0x55, 0x00, 0x0c, 0x59,
+	0x59, 0x0c, 0x00, 0x55, 0x3c, 0x69, 0x65, 0x30,
+	0xa5, 0xf0, 0xfc, 0xa9, 0xc0, 0x95, 0x99, 0xcc,
+	0xcc, 0x99, 0x95, 0xc0, 0xa9, 0xfc, 0xf0, 0xa5,
+	0x0c, 0x59, 0x55, 0x00, 0x69, 0x3c, 0x30, 0x65,
+	0x65, 0x30, 0x3c, 0x69, 0x00, 0x55, 0x59, 0x0c,
+	0x99, 0xcc, 0xc0, 0x95, 0xfc, 0xa9, 0xa5, 0xf0,
+	0xf0, 0xa5, 0xa9, 0xfc, 0x95, 0xc0, 0xcc, 0x99,
+	0x95, 0xc0, 0xcc, 0x99, 0xf0, 0xa5, 0xa9, 0xfc,
+	0xfc, 0xa9, 0xa5, 0xf0, 0x99, 0xcc, 0xc0, 0x95,
+	0x00, 0x55, 0x59, 0x0c, 0x65, 0x30, 0x3c, 0x69,
+	0x69, 0x3c, 0x30, 0x65, 0x0c, 0x59, 0x55, 0x00,
+};
+
+
+/* Calculate the ECC for a 256-byte block of data */
+void yaffs_ecc_calc(const unsigned char *data, unsigned char *ecc)
+{
+	unsigned int i;
+	unsigned char col_parity = 0;
+	unsigned char line_parity = 0;
+	unsigned char line_parity_prime = 0;
+	unsigned char t;
+	unsigned char b;
+
+	for (i = 0; i < 256; i++) {
+		b = column_parity_table[*data++];
+		col_parity ^= b;
+
+		if (b & 0x01) {	/* odd number of bits in the byte */
+			line_parity ^= i;
+			line_parity_prime ^= ~i;
+		}
+	}
+
+	ecc[2] = (~col_parity) | 0x03;
+
+	t = 0;
+	if (line_parity & 0x80)
+		t |= 0x80;
+	if (line_parity_prime & 0x80)
+		t |= 0x40;
+	if (line_parity & 0x40)
+		t |= 0x20;
+	if (line_parity_prime & 0x40)
+		t |= 0x10;
+	if (line_parity & 0x20)
+		t |= 0x08;
+	if (line_parity_prime & 0x20)
+		t |= 0x04;
+	if (line_parity & 0x10)
+		t |= 0x02;
+	if (line_parity_prime & 0x10)
+		t |= 0x01;
+	ecc[1] = ~t;
+
+	t = 0;
+	if (line_parity & 0x08)
+		t |= 0x80;
+	if (line_parity_prime & 0x08)
+		t |= 0x40;
+	if (line_parity & 0x04)
+		t |= 0x20;
+	if (line_parity_prime & 0x04)
+		t |= 0x10;
+	if (line_parity & 0x02)
+		t |= 0x08;
+	if (line_parity_prime & 0x02)
+		t |= 0x04;
+	if (line_parity & 0x01)
+		t |= 0x02;
+	if (line_parity_prime & 0x01)
+		t |= 0x01;
+	ecc[0] = ~t;
+
+}
+
+/* Correct the ECC on a 256 byte block of data */
+
+int yaffs_ecc_correct(unsigned char *data, unsigned char *read_ecc,
+		      const unsigned char *test_ecc)
+{
+	unsigned char d0, d1, d2;	/* deltas */
+
+	d0 = read_ecc[0] ^ test_ecc[0];
+	d1 = read_ecc[1] ^ test_ecc[1];
+	d2 = read_ecc[2] ^ test_ecc[2];
+
+	if ((d0 | d1 | d2) == 0)
+		return 0;	/* no error */
+
+	if (((d0 ^ (d0 >> 1)) & 0x55) == 0x55 &&
+	    ((d1 ^ (d1 >> 1)) & 0x55) == 0x55 &&
+	    ((d2 ^ (d2 >> 1)) & 0x54) == 0x54) {
+		/* Single bit (recoverable) error in data */
+
+		unsigned byte;
+		unsigned bit;
+
+		bit = byte = 0;
+
+		if (d1 & 0x80)
+			byte |= 0x80;
+		if (d1 & 0x20)
+			byte |= 0x40;
+		if (d1 & 0x08)
+			byte |= 0x20;
+		if (d1 & 0x02)
+			byte |= 0x10;
+		if (d0 & 0x80)
+			byte |= 0x08;
+		if (d0 & 0x20)
+			byte |= 0x04;
+		if (d0 & 0x08)
+			byte |= 0x02;
+		if (d0 & 0x02)
+			byte |= 0x01;
+
+		if (d2 & 0x80)
+			bit |= 0x04;
+		if (d2 & 0x20)
+			bit |= 0x02;
+		if (d2 & 0x08)
+			bit |= 0x01;
+
+		data[byte] ^= (1 << bit);
+
+		return 1;	/* Corrected the error */
+	}
+
+	if ((hweight8(d0) + hweight8(d1) + hweight8(d2)) == 1) {
+		/* Reccoverable error in ecc */
+
+		read_ecc[0] = test_ecc[0];
+		read_ecc[1] = test_ecc[1];
+		read_ecc[2] = test_ecc[2];
+
+		return 1;	/* Corrected the error */
+	}
+
+	/* Unrecoverable error */
+
+	return -1;
+
+}
+
+/*
+ * ECCxxxOther does ECC calcs on arbitrary n bytes of data
+ */
+void yaffs_ecc_calc_other(const unsigned char *data, unsigned n_bytes,
+			  struct yaffs_ecc_other *ecc_other)
+{
+	unsigned int i;
+	unsigned char col_parity = 0;
+	unsigned line_parity = 0;
+	unsigned line_parity_prime = 0;
+	unsigned char b;
+
+	for (i = 0; i < n_bytes; i++) {
+		b = column_parity_table[*data++];
+		col_parity ^= b;
+
+		if (b & 0x01) {
+			/* odd number of bits in the byte */
+			line_parity ^= i;
+			line_parity_prime ^= ~i;
+		}
+
+	}
+
+	ecc_other->col_parity = (col_parity >> 2) & 0x3f;
+	ecc_other->line_parity = line_parity;
+	ecc_other->line_parity_prime = line_parity_prime;
+}
+
+int yaffs_ecc_correct_other(unsigned char *data, unsigned n_bytes,
+			    struct yaffs_ecc_other *read_ecc,
+			    const struct yaffs_ecc_other *test_ecc)
+{
+	unsigned char delta_col;	/* column parity delta */
+	unsigned delta_line;	/* line parity delta */
+	unsigned delta_line_prime;	/* line parity delta */
+	unsigned bit;
+
+	delta_col = read_ecc->col_parity ^ test_ecc->col_parity;
+	delta_line = read_ecc->line_parity ^ test_ecc->line_parity;
+	delta_line_prime =
+	    read_ecc->line_parity_prime ^ test_ecc->line_parity_prime;
+
+	if ((delta_col | delta_line | delta_line_prime) == 0)
+		return 0;	/* no error */
+
+	if (delta_line == ~delta_line_prime &&
+	    (((delta_col ^ (delta_col >> 1)) & 0x15) == 0x15)) {
+		/* Single bit (recoverable) error in data */
+
+		bit = 0;
+
+		if (delta_col & 0x20)
+			bit |= 0x04;
+		if (delta_col & 0x08)
+			bit |= 0x02;
+		if (delta_col & 0x02)
+			bit |= 0x01;
+
+		if (delta_line >= n_bytes)
+			return -1;
+
+		data[delta_line] ^= (1 << bit);
+
+		return 1;	/* corrected */
+	}
+
+	if ((hweight32(delta_line) +
+	     hweight32(delta_line_prime) +
+	     hweight8(delta_col)) == 1) {
+		/* Reccoverable error in ecc */
+
+		*read_ecc = *test_ecc;
+		return 1;	/* corrected */
+	}
+
+	/* Unrecoverable error */
+
+	return -1;
+}
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_ecc.h linux-3.0.82x/fs/yaffs2/yaffs_ecc.h
--- linux-3.0.82/fs/yaffs2/yaffs_ecc.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_ecc.h	2017-09-23 03:42:50.298674208 +0800
@@ -0,0 +1,44 @@
+/*
+ * YAFFS: Yet another Flash File System . A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1 as
+ * published by the Free Software Foundation.
+ *
+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
+ */
+
+/*
+ * This code implements the ECC algorithm used in SmartMedia.
+ *
+ * The ECC comprises 22 bits of parity information and is stuffed into 3 bytes.
+ * The two unused bit are set to 1.
+ * The ECC can correct single bit errors in a 256-byte page of data.
+ * Thus, two such ECC blocks are used on a 512-byte NAND page.
+ *
+ */
+
+#ifndef __YAFFS_ECC_H__
+#define __YAFFS_ECC_H__
+
+struct yaffs_ecc_other {
+	unsigned char col_parity;
+	unsigned line_parity;
+	unsigned line_parity_prime;
+};
+
+void yaffs_ecc_calc(const unsigned char *data, unsigned char *ecc);
+int yaffs_ecc_correct(unsigned char *data, unsigned char *read_ecc,
+		      const unsigned char *test_ecc);
+
+void yaffs_ecc_calc_other(const unsigned char *data, unsigned n_bytes,
+			  struct yaffs_ecc_other *ecc);
+int yaffs_ecc_correct_other(unsigned char *data, unsigned n_bytes,
+			    struct yaffs_ecc_other *read_ecc,
+			    const struct yaffs_ecc_other *test_ecc);
+#endif
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_getblockinfo.h linux-3.0.82x/fs/yaffs2/yaffs_getblockinfo.h
--- linux-3.0.82/fs/yaffs2/yaffs_getblockinfo.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_getblockinfo.h	2017-09-23 03:42:50.298674208 +0800
@@ -0,0 +1,35 @@
+/*
+ * YAFFS: Yet another Flash File System . A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1 as
+ * published by the Free Software Foundation.
+ *
+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
+ */
+
+#ifndef __YAFFS_GETBLOCKINFO_H__
+#define __YAFFS_GETBLOCKINFO_H__
+
+#include "yaffs_guts.h"
+#include "yaffs_trace.h"
+
+/* Function to manipulate block info */
+static inline struct yaffs_block_info *yaffs_get_block_info(struct yaffs_dev
+							      *dev, int blk)
+{
+	if (blk < dev->internal_start_block || blk > dev->internal_end_block) {
+		yaffs_trace(YAFFS_TRACE_ERROR,
+			"**>> yaffs: get_block_info block %d is not valid",
+			blk);
+		BUG();
+	}
+	return &dev->block_info[blk - dev->internal_start_block];
+}
+
+#endif
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_guts.c linux-3.0.82x/fs/yaffs2/yaffs_guts.c
--- linux-3.0.82/fs/yaffs2/yaffs_guts.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_guts.c	2017-09-23 03:42:50.302674195 +0800
@@ -0,0 +1,4986 @@
+/*
+ * YAFFS: Yet Another Flash File System. A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "yportenv.h"
+#include "yaffs_trace.h"
+
+#include "yaffs_guts.h"
+#include "yaffs_getblockinfo.h"
+#include "yaffs_tagscompat.h"
+#include "yaffs_nand.h"
+#include "yaffs_yaffs1.h"
+#include "yaffs_yaffs2.h"
+#include "yaffs_bitmap.h"
+#include "yaffs_verify.h"
+#include "yaffs_nand.h"
+#include "yaffs_packedtags2.h"
+#include "yaffs_nameval.h"
+#include "yaffs_allocator.h"
+#include "yaffs_attribs.h"
+#include "yaffs_summary.h"
+
+/* Note YAFFS_GC_GOOD_ENOUGH must be <= YAFFS_GC_PASSIVE_THRESHOLD */
+#define YAFFS_GC_GOOD_ENOUGH 2
+#define YAFFS_GC_PASSIVE_THRESHOLD 4
+
+#include "yaffs_ecc.h"
+
+/* Forward declarations */
+
+static int yaffs_wr_data_obj(struct yaffs_obj *in, int inode_chunk,
+			     const u8 *buffer, int n_bytes, int use_reserve);
+
+
+
+/* Function to calculate chunk and offset */
+
+static inline void yaffs_addr_to_chunk(struct yaffs_dev *dev, loff_t addr,
+					int *chunk_out, u32 *offset_out)
+{
+	int chunk;
+	u32 offset;
+
+	chunk = (u32) (addr >> dev->chunk_shift);
+
+	if (dev->chunk_div == 1) {
+		/* easy power of 2 case */
+		offset = (u32) (addr & dev->chunk_mask);
+	} else {
+		/* Non power-of-2 case */
+
+		loff_t chunk_base;
+
+		chunk /= dev->chunk_div;
+
+		chunk_base = ((loff_t) chunk) * dev->data_bytes_per_chunk;
+		offset = (u32) (addr - chunk_base);
+	}
+
+	*chunk_out = chunk;
+	*offset_out = offset;
+}
+
+/* Function to return the number of shifts for a power of 2 greater than or
+ * equal to the given number
+ * Note we don't try to cater for all possible numbers and this does not have to
+ * be hellishly efficient.
+ */
+
+static inline u32 calc_shifts_ceiling(u32 x)
+{
+	int extra_bits;
+	int shifts;
+
+	shifts = extra_bits = 0;
+
+	while (x > 1) {
+		if (x & 1)
+			extra_bits++;
+		x >>= 1;
+		shifts++;
+	}
+
+	if (extra_bits)
+		shifts++;
+
+	return shifts;
+}
+
+/* Function to return the number of shifts to get a 1 in bit 0
+ */
+
+static inline u32 calc_shifts(u32 x)
+{
+	u32 shifts;
+
+	shifts = 0;
+
+	if (!x)
+		return 0;
+
+	while (!(x & 1)) {
+		x >>= 1;
+		shifts++;
+	}
+
+	return shifts;
+}
+
+/*
+ * Temporary buffer manipulations.
+ */
+
+static int yaffs_init_tmp_buffers(struct yaffs_dev *dev)
+{
+	int i;
+	u8 *buf = (u8 *) 1;
+
+	memset(dev->temp_buffer, 0, sizeof(dev->temp_buffer));
+
+	for (i = 0; buf && i < YAFFS_N_TEMP_BUFFERS; i++) {
+		dev->temp_buffer[i].in_use = 0;
+		buf = kmalloc(dev->param.total_bytes_per_chunk, GFP_NOFS);
+		dev->temp_buffer[i].buffer = buf;
+	}
+
+	return buf ? YAFFS_OK : YAFFS_FAIL;
+}
+
+u8 *yaffs_get_temp_buffer(struct yaffs_dev * dev)
+{
+	int i;
+
+	dev->temp_in_use++;
+	if (dev->temp_in_use > dev->max_temp)
+		dev->max_temp = dev->temp_in_use;
+
+	for (i = 0; i < YAFFS_N_TEMP_BUFFERS; i++) {
+		if (dev->temp_buffer[i].in_use == 0) {
+			dev->temp_buffer[i].in_use = 1;
+			return dev->temp_buffer[i].buffer;
+		}
+	}
+
+	yaffs_trace(YAFFS_TRACE_BUFFERS, "Out of temp buffers");
+	/*
+	 * If we got here then we have to allocate an unmanaged one
+	 * This is not good.
+	 */
+
+	dev->unmanaged_buffer_allocs++;
+	return kmalloc(dev->data_bytes_per_chunk, GFP_NOFS);
+
+}
+
+void yaffs_release_temp_buffer(struct yaffs_dev *dev, u8 *buffer)
+{
+	int i;
+
+	dev->temp_in_use--;
+
+	for (i = 0; i < YAFFS_N_TEMP_BUFFERS; i++) {
+		if (dev->temp_buffer[i].buffer == buffer) {
+			dev->temp_buffer[i].in_use = 0;
+			return;
+		}
+	}
+
+	if (buffer) {
+		/* assume it is an unmanaged one. */
+		yaffs_trace(YAFFS_TRACE_BUFFERS, "Releasing unmanaged temp buffer");
+		kfree(buffer);
+		dev->unmanaged_buffer_deallocs++;
+	}
+
+}
+
+/*
+ * Determine if we have a managed buffer.
+ */
+int yaffs_is_managed_tmp_buffer(struct yaffs_dev *dev, const u8 *buffer)
+{
+	int i;
+
+	for (i = 0; i < YAFFS_N_TEMP_BUFFERS; i++) {
+		if (dev->temp_buffer[i].buffer == buffer)
+			return 1;
+	}
+
+	for (i = 0; i < dev->param.n_caches; i++) {
+		if (dev->cache[i].data == buffer)
+			return 1;
+	}
+
+	if (buffer == dev->checkpt_buffer)
+		return 1;
+
+	yaffs_trace(YAFFS_TRACE_ALWAYS,
+	  "yaffs: unmaged buffer detected.");
+	return 0;
+}
+
+/*
+ * Functions for robustisizing TODO
+ *
+ */
+
+static void yaffs_handle_chunk_wr_ok(struct yaffs_dev *dev, int nand_chunk,
+				     const u8 *data,
+				     const struct yaffs_ext_tags *tags)
+{
+	dev = dev;
+	nand_chunk = nand_chunk;
+	data = data;
+	tags = tags;
+}
+
+static void yaffs_handle_chunk_update(struct yaffs_dev *dev, int nand_chunk,
+				      const struct yaffs_ext_tags *tags)
+{
+	dev = dev;
+	nand_chunk = nand_chunk;
+	tags = tags;
+}
+
+void yaffs_handle_chunk_error(struct yaffs_dev *dev,
+			      struct yaffs_block_info *bi)
+{
+	if (!bi->gc_prioritise) {
+		bi->gc_prioritise = 1;
+		dev->has_pending_prioritised_gc = 1;
+		bi->chunk_error_strikes++;
+
+		if (bi->chunk_error_strikes > 3) {
+			bi->needs_retiring = 1;	/* Too many stikes, so retire */
+			yaffs_trace(YAFFS_TRACE_ALWAYS,
+				"yaffs: Block struck out");
+
+		}
+	}
+}
+
+static void yaffs_handle_chunk_wr_error(struct yaffs_dev *dev, int nand_chunk,
+					int erased_ok)
+{
+	int flash_block = nand_chunk / dev->param.chunks_per_block;
+	struct yaffs_block_info *bi = yaffs_get_block_info(dev, flash_block);
+
+	yaffs_handle_chunk_error(dev, bi);
+
+	if (erased_ok) {
+		/* Was an actual write failure,
+		 * so mark the block for retirement.*/
+		bi->needs_retiring = 1;
+		yaffs_trace(YAFFS_TRACE_ERROR | YAFFS_TRACE_BAD_BLOCKS,
+		  "**>> Block %d needs retiring", flash_block);
+	}
+
+	/* Delete the chunk */
+	yaffs_chunk_del(dev, nand_chunk, 1, __LINE__);
+	yaffs_skip_rest_of_block(dev);
+}
+
+/*
+ * Verification code
+ */
+
+/*
+ *  Simple hash function. Needs to have a reasonable spread
+ */
+
+static inline int yaffs_hash_fn(int n)
+{
+	n = abs(n);
+	return n % YAFFS_NOBJECT_BUCKETS;
+}
+
+/*
+ * Access functions to useful fake objects.
+ * Note that root might have a presence in NAND if permissions are set.
+ */
+
+struct yaffs_obj *yaffs_root(struct yaffs_dev *dev)
+{
+	return dev->root_dir;
+}
+
+struct yaffs_obj *yaffs_lost_n_found(struct yaffs_dev *dev)
+{
+	return dev->lost_n_found;
+}
+
+/*
+ *  Erased NAND checking functions
+ */
+
+int yaffs_check_ff(u8 *buffer, int n_bytes)
+{
+	/* Horrible, slow implementation */
+	while (n_bytes--) {
+		if (*buffer != 0xff)
+			return 0;
+		buffer++;
+	}
+	return 1;
+}
+
+static int yaffs_check_chunk_erased(struct yaffs_dev *dev, int nand_chunk)
+{
+	int retval = YAFFS_OK;
+	u8 *data = yaffs_get_temp_buffer(dev);
+	struct yaffs_ext_tags tags;
+	int result;
+
+	result = yaffs_rd_chunk_tags_nand(dev, nand_chunk, data, &tags);
+
+	if (tags.ecc_result > YAFFS_ECC_RESULT_NO_ERROR)
+		retval = YAFFS_FAIL;
+
+	if (!yaffs_check_ff(data, dev->data_bytes_per_chunk) ||
+		tags.chunk_used) {
+		yaffs_trace(YAFFS_TRACE_NANDACCESS,
+			"Chunk %d not erased", nand_chunk);
+		retval = YAFFS_FAIL;
+	}
+
+	yaffs_release_temp_buffer(dev, data);
+
+	return retval;
+
+}
+
+static int yaffs_verify_chunk_written(struct yaffs_dev *dev,
+				      int nand_chunk,
+				      const u8 *data,
+				      struct yaffs_ext_tags *tags)
+{
+	int retval = YAFFS_OK;
+	struct yaffs_ext_tags temp_tags;
+	u8 *buffer = yaffs_get_temp_buffer(dev);
+	int result;
+
+	result = yaffs_rd_chunk_tags_nand(dev, nand_chunk, buffer, &temp_tags);
+	if (memcmp(buffer, data, dev->data_bytes_per_chunk) ||
+	    temp_tags.obj_id != tags->obj_id ||
+	    temp_tags.chunk_id != tags->chunk_id ||
+	    temp_tags.n_bytes != tags->n_bytes)
+		retval = YAFFS_FAIL;
+
+	yaffs_release_temp_buffer(dev, buffer);
+
+	return retval;
+}
+
+
+int yaffs_check_alloc_available(struct yaffs_dev *dev, int n_chunks)
+{
+	int reserved_chunks;
+	int reserved_blocks = dev->param.n_reserved_blocks;
+	int checkpt_blocks;
+
+	checkpt_blocks = yaffs_calc_checkpt_blocks_required(dev);
+
+	reserved_chunks =
+	    (reserved_blocks + checkpt_blocks) * dev->param.chunks_per_block;
+
+	return (dev->n_free_chunks > (reserved_chunks + n_chunks));
+}
+
+static int yaffs_find_alloc_block(struct yaffs_dev *dev)
+{
+	int i;
+	struct yaffs_block_info *bi;
+
+	if (dev->n_erased_blocks < 1) {
+		/* Hoosterman we've got a problem.
+		 * Can't get space to gc
+		 */
+		yaffs_trace(YAFFS_TRACE_ERROR,
+		  "yaffs tragedy: no more erased blocks");
+
+		return -1;
+	}
+
+	/* Find an empty block. */
+
+	for (i = dev->internal_start_block; i <= dev->internal_end_block; i++) {
+		dev->alloc_block_finder++;
+		if (dev->alloc_block_finder < dev->internal_start_block
+		    || dev->alloc_block_finder > dev->internal_end_block) {
+			dev->alloc_block_finder = dev->internal_start_block;
+		}
+
+		bi = yaffs_get_block_info(dev, dev->alloc_block_finder);
+
+		if (bi->block_state == YAFFS_BLOCK_STATE_EMPTY) {
+			bi->block_state = YAFFS_BLOCK_STATE_ALLOCATING;
+			dev->seq_number++;
+			bi->seq_number = dev->seq_number;
+			dev->n_erased_blocks--;
+			yaffs_trace(YAFFS_TRACE_ALLOCATE,
+			  "Allocated block %d, seq  %d, %d left" ,
+			   dev->alloc_block_finder, dev->seq_number,
+			   dev->n_erased_blocks);
+			return dev->alloc_block_finder;
+		}
+	}
+
+	yaffs_trace(YAFFS_TRACE_ALWAYS,
+		"yaffs tragedy: no more erased blocks, but there should have been %d",
+		dev->n_erased_blocks);
+
+	return -1;
+}
+
+static int yaffs_alloc_chunk(struct yaffs_dev *dev, int use_reserver,
+			     struct yaffs_block_info **block_ptr)
+{
+	int ret_val;
+	struct yaffs_block_info *bi;
+
+	if (dev->alloc_block < 0) {
+		/* Get next block to allocate off */
+		dev->alloc_block = yaffs_find_alloc_block(dev);
+		dev->alloc_page = 0;
+	}
+
+	if (!use_reserver && !yaffs_check_alloc_available(dev, 1)) {
+		/* No space unless we're allowed to use the reserve. */
+		return -1;
+	}
+
+	if (dev->n_erased_blocks < dev->param.n_reserved_blocks
+	    && dev->alloc_page == 0)
+		yaffs_trace(YAFFS_TRACE_ALLOCATE, "Allocating reserve");
+
+	/* Next page please.... */
+	if (dev->alloc_block >= 0) {
+		bi = yaffs_get_block_info(dev, dev->alloc_block);
+
+		ret_val = (dev->alloc_block * dev->param.chunks_per_block) +
+		    dev->alloc_page;
+		bi->pages_in_use++;
+		yaffs_set_chunk_bit(dev, dev->alloc_block, dev->alloc_page);
+
+		dev->alloc_page++;
+
+		dev->n_free_chunks--;
+
+		/* If the block is full set the state to full */
+		if (dev->alloc_page >= dev->param.chunks_per_block) {
+			bi->block_state = YAFFS_BLOCK_STATE_FULL;
+			dev->alloc_block = -1;
+		}
+
+		if (block_ptr)
+			*block_ptr = bi;
+
+		return ret_val;
+	}
+
+	yaffs_trace(YAFFS_TRACE_ERROR,
+		"!!!!!!!!! Allocator out !!!!!!!!!!!!!!!!!");
+
+	return -1;
+}
+
+static int yaffs_get_erased_chunks(struct yaffs_dev *dev)
+{
+	int n;
+
+	n = dev->n_erased_blocks * dev->param.chunks_per_block;
+
+	if (dev->alloc_block > 0)
+		n += (dev->param.chunks_per_block - dev->alloc_page);
+
+	return n;
+
+}
+
+/*
+ * yaffs_skip_rest_of_block() skips over the rest of the allocation block
+ * if we don't want to write to it.
+ */
+void yaffs_skip_rest_of_block(struct yaffs_dev *dev)
+{
+	struct yaffs_block_info *bi;
+
+	if (dev->alloc_block > 0) {
+		bi = yaffs_get_block_info(dev, dev->alloc_block);
+		if (bi->block_state == YAFFS_BLOCK_STATE_ALLOCATING) {
+			bi->block_state = YAFFS_BLOCK_STATE_FULL;
+			dev->alloc_block = -1;
+		}
+	}
+}
+
+static int yaffs_write_new_chunk(struct yaffs_dev *dev,
+				 const u8 *data,
+				 struct yaffs_ext_tags *tags, int use_reserver)
+{
+	int attempts = 0;
+	int write_ok = 0;
+	int chunk;
+
+	yaffs2_checkpt_invalidate(dev);
+
+	do {
+		struct yaffs_block_info *bi = 0;
+		int erased_ok = 0;
+
+		chunk = yaffs_alloc_chunk(dev, use_reserver, &bi);
+		if (chunk < 0) {
+			/* no space */
+			break;
+		}
+
+		/* First check this chunk is erased, if it needs
+		 * checking.  The checking policy (unless forced
+		 * always on) is as follows:
+		 *
+		 * Check the first page we try to write in a block.
+		 * If the check passes then we don't need to check any
+		 * more.        If the check fails, we check again...
+		 * If the block has been erased, we don't need to check.
+		 *
+		 * However, if the block has been prioritised for gc,
+		 * then we think there might be something odd about
+		 * this block and stop using it.
+		 *
+		 * Rationale: We should only ever see chunks that have
+		 * not been erased if there was a partially written
+		 * chunk due to power loss.  This checking policy should
+		 * catch that case with very few checks and thus save a
+		 * lot of checks that are most likely not needed.
+		 *
+		 * Mods to the above
+		 * If an erase check fails or the write fails we skip the
+		 * rest of the block.
+		 */
+
+		/* let's give it a try */
+		attempts++;
+
+		if (dev->param.always_check_erased)
+			bi->skip_erased_check = 0;
+
+		if (!bi->skip_erased_check) {
+			erased_ok = yaffs_check_chunk_erased(dev, chunk);
+			if (erased_ok != YAFFS_OK) {
+				yaffs_trace(YAFFS_TRACE_ERROR,
+				  "**>> yaffs chunk %d was not erased",
+				  chunk);
+
+				/* If not erased, delete this one,
+				 * skip rest of block and
+				 * try another chunk */
+				yaffs_chunk_del(dev, chunk, 1, __LINE__);
+				yaffs_skip_rest_of_block(dev);
+				continue;
+			}
+		}
+
+		write_ok = yaffs_wr_chunk_tags_nand(dev, chunk, data, tags);
+
+		if (!bi->skip_erased_check)
+			write_ok =
+			    yaffs_verify_chunk_written(dev, chunk, data, tags);
+
+		if (write_ok != YAFFS_OK) {
+			/* Clean up aborted write, skip to next block and
+			 * try another chunk */
+			yaffs_handle_chunk_wr_error(dev, chunk, erased_ok);
+			continue;
+		}
+
+		bi->skip_erased_check = 1;
+
+		/* Copy the data into the robustification buffer */
+		yaffs_handle_chunk_wr_ok(dev, chunk, data, tags);
+
+	} while (write_ok != YAFFS_OK &&
+		 (yaffs_wr_attempts <= 0 || attempts <= yaffs_wr_attempts));
+
+	if (!write_ok)
+		chunk = -1;
+
+	if (attempts > 1) {
+		yaffs_trace(YAFFS_TRACE_ERROR,
+			"**>> yaffs write required %d attempts",
+			attempts);
+		dev->n_retried_writes += (attempts - 1);
+	}
+
+	return chunk;
+}
+
+/*
+ * Block retiring for handling a broken block.
+ */
+
+static void yaffs_retire_block(struct yaffs_dev *dev, int flash_block)
+{
+	struct yaffs_block_info *bi = yaffs_get_block_info(dev, flash_block);
+
+	yaffs2_checkpt_invalidate(dev);
+
+	yaffs2_clear_oldest_dirty_seq(dev, bi);
+
+	if (yaffs_mark_bad(dev, flash_block) != YAFFS_OK) {
+		if (yaffs_erase_block(dev, flash_block) != YAFFS_OK) {
+			yaffs_trace(YAFFS_TRACE_ALWAYS,
+				"yaffs: Failed to mark bad and erase block %d",
+				flash_block);
+		} else {
+			struct yaffs_ext_tags tags;
+			int chunk_id =
+			    flash_block * dev->param.chunks_per_block;
+
+			u8 *buffer = yaffs_get_temp_buffer(dev);
+
+			memset(buffer, 0xff, dev->data_bytes_per_chunk);
+			memset(&tags, 0, sizeof(tags));
+			tags.seq_number = YAFFS_SEQUENCE_BAD_BLOCK;
+			if (dev->param.write_chunk_tags_fn(dev, chunk_id -
+							   dev->chunk_offset,
+							   buffer,
+							   &tags) != YAFFS_OK)
+				yaffs_trace(YAFFS_TRACE_ALWAYS,
+					"yaffs: Failed to write bad block marker to block %d",
+					flash_block);
+
+			yaffs_release_temp_buffer(dev, buffer);
+		}
+	}
+
+	bi->block_state = YAFFS_BLOCK_STATE_DEAD;
+	bi->gc_prioritise = 0;
+	bi->needs_retiring = 0;
+
+	dev->n_retired_blocks++;
+}
+
+/*---------------- Name handling functions ------------*/
+
+static u16 yaffs_calc_name_sum(const YCHAR *name)
+{
+	u16 sum = 0;
+	u16 i = 1;
+
+	if (!name)
+		return 0;
+
+	while ((*name) && i < (YAFFS_MAX_NAME_LENGTH / 2)) {
+
+		/* 0x1f mask is case insensitive */
+		sum += ((*name) & 0x1f) * i;
+		i++;
+		name++;
+	}
+	return sum;
+}
+
+void yaffs_set_obj_name(struct yaffs_obj *obj, const YCHAR * name)
+{
+	memset(obj->short_name, 0, sizeof(obj->short_name));
+	if (name &&
+		strnlen(name, YAFFS_SHORT_NAME_LENGTH + 1) <=
+		YAFFS_SHORT_NAME_LENGTH)
+		strcpy(obj->short_name, name);
+	else
+		obj->short_name[0] = _Y('\0');
+	obj->sum = yaffs_calc_name_sum(name);
+}
+
+void yaffs_set_obj_name_from_oh(struct yaffs_obj *obj,
+				const struct yaffs_obj_hdr *oh)
+{
+#ifdef CONFIG_YAFFS_AUTO_UNICODE
+	YCHAR tmp_name[YAFFS_MAX_NAME_LENGTH + 1];
+	memset(tmp_name, 0, sizeof(tmp_name));
+	yaffs_load_name_from_oh(obj->my_dev, tmp_name, oh->name,
+				YAFFS_MAX_NAME_LENGTH + 1);
+	yaffs_set_obj_name(obj, tmp_name);
+#else
+	yaffs_set_obj_name(obj, oh->name);
+#endif
+}
+
+/*-------------------- TNODES -------------------
+
+ * List of spare tnodes
+ * The list is hooked together using the first pointer
+ * in the tnode.
+ */
+
+struct yaffs_tnode *yaffs_get_tnode(struct yaffs_dev *dev)
+{
+	struct yaffs_tnode *tn = yaffs_alloc_raw_tnode(dev);
+
+	if (tn) {
+		memset(tn, 0, dev->tnode_size);
+		dev->n_tnodes++;
+	}
+
+	dev->checkpoint_blocks_required = 0;	/* force recalculation */
+
+	return tn;
+}
+
+/* FreeTnode frees up a tnode and puts it back on the free list */
+static void yaffs_free_tnode(struct yaffs_dev *dev, struct yaffs_tnode *tn)
+{
+	yaffs_free_raw_tnode(dev, tn);
+	dev->n_tnodes--;
+	dev->checkpoint_blocks_required = 0;	/* force recalculation */
+}
+
+static void yaffs_deinit_tnodes_and_objs(struct yaffs_dev *dev)
+{
+	yaffs_deinit_raw_tnodes_and_objs(dev);
+	dev->n_obj = 0;
+	dev->n_tnodes = 0;
+}
+
+void yaffs_load_tnode_0(struct yaffs_dev *dev, struct yaffs_tnode *tn,
+			unsigned pos, unsigned val)
+{
+	u32 *map = (u32 *) tn;
+	u32 bit_in_map;
+	u32 bit_in_word;
+	u32 word_in_map;
+	u32 mask;
+
+	pos &= YAFFS_TNODES_LEVEL0_MASK;
+	val >>= dev->chunk_grp_bits;
+
+	bit_in_map = pos * dev->tnode_width;
+	word_in_map = bit_in_map / 32;
+	bit_in_word = bit_in_map & (32 - 1);
+
+	mask = dev->tnode_mask << bit_in_word;
+
+	map[word_in_map] &= ~mask;
+	map[word_in_map] |= (mask & (val << bit_in_word));
+
+	if (dev->tnode_width > (32 - bit_in_word)) {
+		bit_in_word = (32 - bit_in_word);
+		word_in_map++;
+		mask =
+		    dev->tnode_mask >> bit_in_word;
+		map[word_in_map] &= ~mask;
+		map[word_in_map] |= (mask & (val >> bit_in_word));
+	}
+}
+
+u32 yaffs_get_group_base(struct yaffs_dev *dev, struct yaffs_tnode *tn,
+			 unsigned pos)
+{
+	u32 *map = (u32 *) tn;
+	u32 bit_in_map;
+	u32 bit_in_word;
+	u32 word_in_map;
+	u32 val;
+
+	pos &= YAFFS_TNODES_LEVEL0_MASK;
+
+	bit_in_map = pos * dev->tnode_width;
+	word_in_map = bit_in_map / 32;
+	bit_in_word = bit_in_map & (32 - 1);
+
+	val = map[word_in_map] >> bit_in_word;
+
+	if (dev->tnode_width > (32 - bit_in_word)) {
+		bit_in_word = (32 - bit_in_word);
+		word_in_map++;
+		val |= (map[word_in_map] << bit_in_word);
+	}
+
+	val &= dev->tnode_mask;
+	val <<= dev->chunk_grp_bits;
+
+	return val;
+}
+
+/* ------------------- End of individual tnode manipulation -----------------*/
+
+/* ---------Functions to manipulate the look-up tree (made up of tnodes) ------
+ * The look up tree is represented by the top tnode and the number of top_level
+ * in the tree. 0 means only the level 0 tnode is in the tree.
+ */
+
+/* FindLevel0Tnode finds the level 0 tnode, if one exists. */
+struct yaffs_tnode *yaffs_find_tnode_0(struct yaffs_dev *dev,
+				       struct yaffs_file_var *file_struct,
+				       u32 chunk_id)
+{
+	struct yaffs_tnode *tn = file_struct->top;
+	u32 i;
+	int required_depth;
+	int level = file_struct->top_level;
+
+	dev = dev;
+
+	/* Check sane level and chunk Id */
+	if (level < 0 || level > YAFFS_TNODES_MAX_LEVEL)
+		return NULL;
+
+	if (chunk_id > YAFFS_MAX_CHUNK_ID)
+		return NULL;
+
+	/* First check we're tall enough (ie enough top_level) */
+
+	i = chunk_id >> YAFFS_TNODES_LEVEL0_BITS;
+	required_depth = 0;
+	while (i) {
+		i >>= YAFFS_TNODES_INTERNAL_BITS;
+		required_depth++;
+	}
+
+	if (required_depth > file_struct->top_level)
+		return NULL;	/* Not tall enough, so we can't find it */
+
+	/* Traverse down to level 0 */
+	while (level > 0 && tn) {
+		tn = tn->internal[(chunk_id >>
+				   (YAFFS_TNODES_LEVEL0_BITS +
+				    (level - 1) *
+				    YAFFS_TNODES_INTERNAL_BITS)) &
+				  YAFFS_TNODES_INTERNAL_MASK];
+		level--;
+	}
+
+	return tn;
+}
+
+/* add_find_tnode_0 finds the level 0 tnode if it exists,
+ * otherwise first expands the tree.
+ * This happens in two steps:
+ *  1. If the tree isn't tall enough, then make it taller.
+ *  2. Scan down the tree towards the level 0 tnode adding tnodes if required.
+ *
+ * Used when modifying the tree.
+ *
+ *  If the tn argument is NULL, then a fresh tnode will be added otherwise the
+ *  specified tn will be plugged into the ttree.
+ */
+
+struct yaffs_tnode *yaffs_add_find_tnode_0(struct yaffs_dev *dev,
+					   struct yaffs_file_var *file_struct,
+					   u32 chunk_id,
+					   struct yaffs_tnode *passed_tn)
+{
+	int required_depth;
+	int i;
+	int l;
+	struct yaffs_tnode *tn;
+	u32 x;
+
+	/* Check sane level and page Id */
+	if (file_struct->top_level < 0 ||
+	    file_struct->top_level > YAFFS_TNODES_MAX_LEVEL)
+		return NULL;
+
+	if (chunk_id > YAFFS_MAX_CHUNK_ID)
+		return NULL;
+
+	/* First check we're tall enough (ie enough top_level) */
+
+	x = chunk_id >> YAFFS_TNODES_LEVEL0_BITS;
+	required_depth = 0;
+	while (x) {
+		x >>= YAFFS_TNODES_INTERNAL_BITS;
+		required_depth++;
+	}
+
+	if (required_depth > file_struct->top_level) {
+		/* Not tall enough, gotta make the tree taller */
+		for (i = file_struct->top_level; i < required_depth; i++) {
+
+			tn = yaffs_get_tnode(dev);
+
+			if (tn) {
+				tn->internal[0] = file_struct->top;
+				file_struct->top = tn;
+				file_struct->top_level++;
+			} else {
+				yaffs_trace(YAFFS_TRACE_ERROR,
+					"yaffs: no more tnodes");
+				return NULL;
+			}
+		}
+	}
+
+	/* Traverse down to level 0, adding anything we need */
+
+	l = file_struct->top_level;
+	tn = file_struct->top;
+
+	if (l > 0) {
+		while (l > 0 && tn) {
+			x = (chunk_id >>
+			     (YAFFS_TNODES_LEVEL0_BITS +
+			      (l - 1) * YAFFS_TNODES_INTERNAL_BITS)) &
+			    YAFFS_TNODES_INTERNAL_MASK;
+
+			if ((l > 1) && !tn->internal[x]) {
+				/* Add missing non-level-zero tnode */
+				tn->internal[x] = yaffs_get_tnode(dev);
+				if (!tn->internal[x])
+					return NULL;
+			} else if (l == 1) {
+				/* Looking from level 1 at level 0 */
+				if (passed_tn) {
+					/* If we already have one, release it */
+					if (tn->internal[x])
+						yaffs_free_tnode(dev,
+							tn->internal[x]);
+					tn->internal[x] = passed_tn;
+
+				} else if (!tn->internal[x]) {
+					/* Don't have one, none passed in */
+					tn->internal[x] = yaffs_get_tnode(dev);
+					if (!tn->internal[x])
+						return NULL;
+				}
+			}
+
+			tn = tn->internal[x];
+			l--;
+		}
+	} else {
+		/* top is level 0 */
+		if (passed_tn) {
+			memcpy(tn, passed_tn,
+			       (dev->tnode_width * YAFFS_NTNODES_LEVEL0) / 8);
+			yaffs_free_tnode(dev, passed_tn);
+		}
+	}
+
+	return tn;
+}
+
+static int yaffs_tags_match(const struct yaffs_ext_tags *tags, int obj_id,
+			    int chunk_obj)
+{
+	return (tags->chunk_id == chunk_obj &&
+		tags->obj_id == obj_id &&
+		!tags->is_deleted) ? 1 : 0;
+
+}
+
+static int yaffs_find_chunk_in_group(struct yaffs_dev *dev, int the_chunk,
+					struct yaffs_ext_tags *tags, int obj_id,
+					int inode_chunk)
+{
+	int j;
+
+	for (j = 0; the_chunk && j < dev->chunk_grp_size; j++) {
+		if (yaffs_check_chunk_bit
+		    (dev, the_chunk / dev->param.chunks_per_block,
+		     the_chunk % dev->param.chunks_per_block)) {
+
+			if (dev->chunk_grp_size == 1)
+				return the_chunk;
+			else {
+				yaffs_rd_chunk_tags_nand(dev, the_chunk, NULL,
+							 tags);
+				if (yaffs_tags_match(tags,
+							obj_id, inode_chunk)) {
+					/* found it; */
+					return the_chunk;
+				}
+			}
+		}
+		the_chunk++;
+	}
+	return -1;
+}
+
+static int yaffs_find_chunk_in_file(struct yaffs_obj *in, int inode_chunk,
+				    struct yaffs_ext_tags *tags)
+{
+	/*Get the Tnode, then get the level 0 offset chunk offset */
+	struct yaffs_tnode *tn;
+	int the_chunk = -1;
+	struct yaffs_ext_tags local_tags;
+	int ret_val = -1;
+	struct yaffs_dev *dev = in->my_dev;
+
+	if (!tags) {
+		/* Passed a NULL, so use our own tags space */
+		tags = &local_tags;
+	}
+
+	tn = yaffs_find_tnode_0(dev, &in->variant.file_variant, inode_chunk);
+
+	if (!tn)
+		return ret_val;
+
+	the_chunk = yaffs_get_group_base(dev, tn, inode_chunk);
+
+	ret_val = yaffs_find_chunk_in_group(dev, the_chunk, tags, in->obj_id,
+					      inode_chunk);
+	return ret_val;
+}
+
+static int yaffs_find_del_file_chunk(struct yaffs_obj *in, int inode_chunk,
+				     struct yaffs_ext_tags *tags)
+{
+	/* Get the Tnode, then get the level 0 offset chunk offset */
+	struct yaffs_tnode *tn;
+	int the_chunk = -1;
+	struct yaffs_ext_tags local_tags;
+	struct yaffs_dev *dev = in->my_dev;
+	int ret_val = -1;
+
+	if (!tags) {
+		/* Passed a NULL, so use our own tags space */
+		tags = &local_tags;
+	}
+
+	tn = yaffs_find_tnode_0(dev, &in->variant.file_variant, inode_chunk);
+
+	if (!tn)
+		return ret_val;
+
+	the_chunk = yaffs_get_group_base(dev, tn, inode_chunk);
+
+	ret_val = yaffs_find_chunk_in_group(dev, the_chunk, tags, in->obj_id,
+					      inode_chunk);
+
+	/* Delete the entry in the filestructure (if found) */
+	if (ret_val != -1)
+		yaffs_load_tnode_0(dev, tn, inode_chunk, 0);
+
+	return ret_val;
+}
+
+int yaffs_put_chunk_in_file(struct yaffs_obj *in, int inode_chunk,
+			    int nand_chunk, int in_scan)
+{
+	/* NB in_scan is zero unless scanning.
+	 * For forward scanning, in_scan is > 0;
+	 * for backward scanning in_scan is < 0
+	 *
+	 * nand_chunk = 0 is a dummy insert to make sure the tnodes are there.
+	 */
+
+	struct yaffs_tnode *tn;
+	struct yaffs_dev *dev = in->my_dev;
+	int existing_cunk;
+	struct yaffs_ext_tags existing_tags;
+	struct yaffs_ext_tags new_tags;
+	unsigned existing_serial, new_serial;
+
+	if (in->variant_type != YAFFS_OBJECT_TYPE_FILE) {
+		/* Just ignore an attempt at putting a chunk into a non-file
+		 * during scanning.
+		 * If it is not during Scanning then something went wrong!
+		 */
+		if (!in_scan) {
+			yaffs_trace(YAFFS_TRACE_ERROR,
+				"yaffs tragedy:attempt to put data chunk into a non-file"
+				);
+			BUG();
+		}
+
+		yaffs_chunk_del(dev, nand_chunk, 1, __LINE__);
+		return YAFFS_OK;
+	}
+
+	tn = yaffs_add_find_tnode_0(dev,
+				    &in->variant.file_variant,
+				    inode_chunk, NULL);
+	if (!tn)
+		return YAFFS_FAIL;
+
+	if (!nand_chunk)
+		/* Dummy insert, bail now */
+		return YAFFS_OK;
+
+	existing_cunk = yaffs_get_group_base(dev, tn, inode_chunk);
+
+	if (in_scan != 0) {
+		/* If we're scanning then we need to test for duplicates
+		 * NB This does not need to be efficient since it should only
+		 * happen when the power fails during a write, then only one
+		 * chunk should ever be affected.
+		 *
+		 * Correction for YAFFS2: This could happen quite a lot and we
+		 * need to think about efficiency! TODO
+		 * Update: For backward scanning we don't need to re-read tags
+		 * so this is quite cheap.
+		 */
+
+		if (existing_cunk > 0) {
+			/* NB Right now existing chunk will not be real
+			 * chunk_id if the chunk group size > 1
+			 * thus we have to do a FindChunkInFile to get the
+			 * real chunk id.
+			 *
+			 * We have a duplicate now we need to decide which
+			 * one to use:
+			 *
+			 * Backwards scanning YAFFS2: The old one is what
+			 * we use, dump the new one.
+			 * YAFFS1: Get both sets of tags and compare serial
+			 * numbers.
+			 */
+
+			if (in_scan > 0) {
+				/* Only do this for forward scanning */
+				yaffs_rd_chunk_tags_nand(dev,
+							 nand_chunk,
+							 NULL, &new_tags);
+
+				/* Do a proper find */
+				existing_cunk =
+				    yaffs_find_chunk_in_file(in, inode_chunk,
+							     &existing_tags);
+			}
+
+			if (existing_cunk <= 0) {
+				/*Hoosterman - how did this happen? */
+
+				yaffs_trace(YAFFS_TRACE_ERROR,
+					"yaffs tragedy: existing chunk < 0 in scan"
+					);
+
+			}
+
+			/* NB The deleted flags should be false, otherwise
+			 * the chunks will not be loaded during a scan
+			 */
+
+			if (in_scan > 0) {
+				new_serial = new_tags.serial_number;
+				existing_serial = existing_tags.serial_number;
+			}
+
+			if ((in_scan > 0) &&
+			    (existing_cunk <= 0 ||
+			     ((existing_serial + 1) & 3) == new_serial)) {
+				/* Forward scanning.
+				 * Use new
+				 * Delete the old one and drop through to
+				 * update the tnode
+				 */
+				yaffs_chunk_del(dev, existing_cunk, 1,
+						__LINE__);
+			} else {
+				/* Backward scanning or we want to use the
+				 * existing one
+				 * Delete the new one and return early so that
+				 * the tnode isn't changed
+				 */
+				yaffs_chunk_del(dev, nand_chunk, 1, __LINE__);
+				return YAFFS_OK;
+			}
+		}
+
+	}
+
+	if (existing_cunk == 0)
+		in->n_data_chunks++;
+
+	yaffs_load_tnode_0(dev, tn, inode_chunk, nand_chunk);
+
+	return YAFFS_OK;
+}
+
+static void yaffs_soft_del_chunk(struct yaffs_dev *dev, int chunk)
+{
+	struct yaffs_block_info *the_block;
+	unsigned block_no;
+
+	yaffs_trace(YAFFS_TRACE_DELETION, "soft delete chunk %d", chunk);
+
+	block_no = chunk / dev->param.chunks_per_block;
+	the_block = yaffs_get_block_info(dev, block_no);
+	if (the_block) {
+		the_block->soft_del_pages++;
+		dev->n_free_chunks++;
+		yaffs2_update_oldest_dirty_seq(dev, block_no, the_block);
+	}
+}
+
+/* SoftDeleteWorker scans backwards through the tnode tree and soft deletes all
+ * the chunks in the file.
+ * All soft deleting does is increment the block's softdelete count and pulls
+ * the chunk out of the tnode.
+ * Thus, essentially this is the same as DeleteWorker except that the chunks
+ * are soft deleted.
+ */
+
+static int yaffs_soft_del_worker(struct yaffs_obj *in, struct yaffs_tnode *tn,
+				 u32 level, int chunk_offset)
+{
+	int i;
+	int the_chunk;
+	int all_done = 1;
+	struct yaffs_dev *dev = in->my_dev;
+
+	if (!tn)
+		return 1;
+
+	if (level > 0) {
+		for (i = YAFFS_NTNODES_INTERNAL - 1;
+			all_done && i >= 0;
+			i--) {
+			if (tn->internal[i]) {
+				all_done =
+				    yaffs_soft_del_worker(in,
+					tn->internal[i],
+					level - 1,
+					(chunk_offset <<
+					YAFFS_TNODES_INTERNAL_BITS)
+					+ i);
+				if (all_done) {
+					yaffs_free_tnode(dev,
+						tn->internal[i]);
+					tn->internal[i] = NULL;
+				} else {
+					/* Can this happen? */
+				}
+			}
+		}
+		return (all_done) ? 1 : 0;
+	}
+
+	/* level 0 */
+	 for (i = YAFFS_NTNODES_LEVEL0 - 1; i >= 0; i--) {
+		the_chunk = yaffs_get_group_base(dev, tn, i);
+		if (the_chunk) {
+			yaffs_soft_del_chunk(dev, the_chunk);
+			yaffs_load_tnode_0(dev, tn, i, 0);
+		}
+	}
+	return 1;
+}
+
+static void yaffs_remove_obj_from_dir(struct yaffs_obj *obj)
+{
+	struct yaffs_dev *dev = obj->my_dev;
+	struct yaffs_obj *parent;
+
+	yaffs_verify_obj_in_dir(obj);
+	parent = obj->parent;
+
+	yaffs_verify_dir(parent);
+
+	if (dev && dev->param.remove_obj_fn)
+		dev->param.remove_obj_fn(obj);
+
+	list_del_init(&obj->siblings);
+	obj->parent = NULL;
+
+	yaffs_verify_dir(parent);
+}
+
+void yaffs_add_obj_to_dir(struct yaffs_obj *directory, struct yaffs_obj *obj)
+{
+	if (!directory) {
+		yaffs_trace(YAFFS_TRACE_ALWAYS,
+			"tragedy: Trying to add an object to a null pointer directory"
+			);
+		BUG();
+		return;
+	}
+	if (directory->variant_type != YAFFS_OBJECT_TYPE_DIRECTORY) {
+		yaffs_trace(YAFFS_TRACE_ALWAYS,
+			"tragedy: Trying to add an object to a non-directory"
+			);
+		BUG();
+	}
+
+	if (obj->siblings.prev == NULL) {
+		/* Not initialised */
+		BUG();
+	}
+
+	yaffs_verify_dir(directory);
+
+	yaffs_remove_obj_from_dir(obj);
+
+	/* Now add it */
+	list_add(&obj->siblings, &directory->variant.dir_variant.children);
+	obj->parent = directory;
+
+	if (directory == obj->my_dev->unlinked_dir
+	    || directory == obj->my_dev->del_dir) {
+		obj->unlinked = 1;
+		obj->my_dev->n_unlinked_files++;
+		obj->rename_allowed = 0;
+	}
+
+	yaffs_verify_dir(directory);
+	yaffs_verify_obj_in_dir(obj);
+}
+
+static int yaffs_change_obj_name(struct yaffs_obj *obj,
+				 struct yaffs_obj *new_dir,
+				 const YCHAR *new_name, int force, int shadows)
+{
+	int unlink_op;
+	int del_op;
+	struct yaffs_obj *existing_target;
+
+	if (new_dir == NULL)
+		new_dir = obj->parent;	/* use the old directory */
+
+	if (new_dir->variant_type != YAFFS_OBJECT_TYPE_DIRECTORY) {
+		yaffs_trace(YAFFS_TRACE_ALWAYS,
+			"tragedy: yaffs_change_obj_name: new_dir is not a directory"
+			);
+		BUG();
+	}
+
+	unlink_op = (new_dir == obj->my_dev->unlinked_dir);
+	del_op = (new_dir == obj->my_dev->del_dir);
+
+	existing_target = yaffs_find_by_name(new_dir, new_name);
+
+	/* If the object is a file going into the unlinked directory,
+	 *   then it is OK to just stuff it in since duplicate names are OK.
+	 *   else only proceed if the new name does not exist and we're putting
+	 *   it into a directory.
+	 */
+	if (!(unlink_op || del_op || force ||
+	      shadows > 0 || !existing_target) ||
+	      new_dir->variant_type != YAFFS_OBJECT_TYPE_DIRECTORY)
+		return YAFFS_FAIL;
+
+	yaffs_set_obj_name(obj, new_name);
+	obj->dirty = 1;
+	yaffs_add_obj_to_dir(new_dir, obj);
+
+	if (unlink_op)
+		obj->unlinked = 1;
+
+	/* If it is a deletion then we mark it as a shrink for gc  */
+	if (yaffs_update_oh(obj, new_name, 0, del_op, shadows, NULL) >= 0)
+		return YAFFS_OK;
+
+	return YAFFS_FAIL;
+}
+
+/*------------------------ Short Operations Cache ------------------------------
+ *   In many situations where there is no high level buffering  a lot of
+ *   reads might be short sequential reads, and a lot of writes may be short
+ *   sequential writes. eg. scanning/writing a jpeg file.
+ *   In these cases, a short read/write cache can provide a huge perfomance
+ *   benefit with dumb-as-a-rock code.
+ *   In Linux, the page cache provides read buffering and the short op cache
+ *   provides write buffering.
+ *
+ *   There are a small number (~10) of cache chunks per device so that we don't
+ *   need a very intelligent search.
+ */
+
+static int yaffs_obj_cache_dirty(struct yaffs_obj *obj)
+{
+	struct yaffs_dev *dev = obj->my_dev;
+	int i;
+	struct yaffs_cache *cache;
+	int n_caches = obj->my_dev->param.n_caches;
+
+	for (i = 0; i < n_caches; i++) {
+		cache = &dev->cache[i];
+		if (cache->object == obj && cache->dirty)
+			return 1;
+	}
+
+	return 0;
+}
+
+static void yaffs_flush_file_cache(struct yaffs_obj *obj)
+{
+	struct yaffs_dev *dev = obj->my_dev;
+	int lowest = -99;	/* Stop compiler whining. */
+	int i;
+	struct yaffs_cache *cache;
+	int chunk_written = 0;
+	int n_caches = obj->my_dev->param.n_caches;
+
+	if (n_caches < 1)
+		return;
+	do {
+		cache = NULL;
+
+		/* Find the lowest dirty chunk for this object */
+		for (i = 0; i < n_caches; i++) {
+			if (dev->cache[i].object == obj &&
+			    dev->cache[i].dirty) {
+				if (!cache ||
+				    dev->cache[i].chunk_id < lowest) {
+					cache = &dev->cache[i];
+					lowest = cache->chunk_id;
+				}
+			}
+		}
+
+		if (cache && !cache->locked) {
+			/* Write it out and free it up */
+			chunk_written =
+			    yaffs_wr_data_obj(cache->object,
+					      cache->chunk_id,
+					      cache->data,
+					      cache->n_bytes, 1);
+			cache->dirty = 0;
+			cache->object = NULL;
+		}
+	} while (cache && chunk_written > 0);
+
+	if (cache)
+		/* Hoosterman, disk full while writing cache out. */
+		yaffs_trace(YAFFS_TRACE_ERROR,
+			"yaffs tragedy: no space during cache write");
+}
+
+/*yaffs_flush_whole_cache(dev)
+ *
+ *
+ */
+
+void yaffs_flush_whole_cache(struct yaffs_dev *dev)
+{
+	struct yaffs_obj *obj;
+	int n_caches = dev->param.n_caches;
+	int i;
+
+	/* Find a dirty object in the cache and flush it...
+	 * until there are no further dirty objects.
+	 */
+	do {
+		obj = NULL;
+		for (i = 0; i < n_caches && !obj; i++) {
+			if (dev->cache[i].object && dev->cache[i].dirty)
+				obj = dev->cache[i].object;
+		}
+		if (obj)
+			yaffs_flush_file_cache(obj);
+	} while (obj);
+
+}
+
+/* Grab us a cache chunk for use.
+ * First look for an empty one.
+ * Then look for the least recently used non-dirty one.
+ * Then look for the least recently used dirty one...., flush and look again.
+ */
+static struct yaffs_cache *yaffs_grab_chunk_worker(struct yaffs_dev *dev)
+{
+	int i;
+
+	if (dev->param.n_caches > 0) {
+		for (i = 0; i < dev->param.n_caches; i++) {
+			if (!dev->cache[i].object)
+				return &dev->cache[i];
+		}
+	}
+	return NULL;
+}
+
+static struct yaffs_cache *yaffs_grab_chunk_cache(struct yaffs_dev *dev)
+{
+	struct yaffs_cache *cache;
+	struct yaffs_obj *the_obj;
+	int usage;
+	int i;
+	int pushout;
+
+	if (dev->param.n_caches < 1)
+		return NULL;
+
+	/* Try find a non-dirty one... */
+
+	cache = yaffs_grab_chunk_worker(dev);
+
+	if (!cache) {
+		/* They were all dirty, find the LRU object and flush
+		 * its cache, then  find again.
+		 * NB what's here is not very accurate,
+		 * we actually flush the object with the LRU chunk.
+		 */
+
+		/* With locking we can't assume we can use entry zero,
+		 * Set the_obj to a valid pointer for Coverity. */
+		the_obj = dev->cache[0].object;
+		usage = -1;
+		cache = NULL;
+		pushout = -1;
+
+		for (i = 0; i < dev->param.n_caches; i++) {
+			if (dev->cache[i].object &&
+			    !dev->cache[i].locked &&
+			    (dev->cache[i].last_use < usage ||
+			    !cache)) {
+				usage = dev->cache[i].last_use;
+				the_obj = dev->cache[i].object;
+				cache = &dev->cache[i];
+				pushout = i;
+			}
+		}
+
+		if (!cache || cache->dirty) {
+			/* Flush and try again */
+			yaffs_flush_file_cache(the_obj);
+			cache = yaffs_grab_chunk_worker(dev);
+		}
+	}
+	return cache;
+}
+
+/* Find a cached chunk */
+static struct yaffs_cache *yaffs_find_chunk_cache(const struct yaffs_obj *obj,
+						  int chunk_id)
+{
+	struct yaffs_dev *dev = obj->my_dev;
+	int i;
+
+	if (dev->param.n_caches < 1)
+		return NULL;
+
+	for (i = 0; i < dev->param.n_caches; i++) {
+		if (dev->cache[i].object == obj &&
+		    dev->cache[i].chunk_id == chunk_id) {
+			dev->cache_hits++;
+
+			return &dev->cache[i];
+		}
+	}
+	return NULL;
+}
+
+/* Mark the chunk for the least recently used algorithym */
+static void yaffs_use_cache(struct yaffs_dev *dev, struct yaffs_cache *cache,
+			    int is_write)
+{
+	int i;
+
+	if (dev->param.n_caches < 1)
+		return;
+
+	if (dev->cache_last_use < 0 ||
+		dev->cache_last_use > 100000000) {
+		/* Reset the cache usages */
+		for (i = 1; i < dev->param.n_caches; i++)
+			dev->cache[i].last_use = 0;
+
+		dev->cache_last_use = 0;
+	}
+	dev->cache_last_use++;
+	cache->last_use = dev->cache_last_use;
+
+	if (is_write)
+		cache->dirty = 1;
+}
+
+/* Invalidate a single cache page.
+ * Do this when a whole page gets written,
+ * ie the short cache for this page is no longer valid.
+ */
+static void yaffs_invalidate_chunk_cache(struct yaffs_obj *object, int chunk_id)
+{
+	struct yaffs_cache *cache;
+
+	if (object->my_dev->param.n_caches > 0) {
+		cache = yaffs_find_chunk_cache(object, chunk_id);
+
+		if (cache)
+			cache->object = NULL;
+	}
+}
+
+/* Invalidate all the cache pages associated with this object
+ * Do this whenever ther file is deleted or resized.
+ */
+static void yaffs_invalidate_whole_cache(struct yaffs_obj *in)
+{
+	int i;
+	struct yaffs_dev *dev = in->my_dev;
+
+	if (dev->param.n_caches > 0) {
+		/* Invalidate it. */
+		for (i = 0; i < dev->param.n_caches; i++) {
+			if (dev->cache[i].object == in)
+				dev->cache[i].object = NULL;
+		}
+	}
+}
+
+static void yaffs_unhash_obj(struct yaffs_obj *obj)
+{
+	int bucket;
+	struct yaffs_dev *dev = obj->my_dev;
+
+	/* If it is still linked into the bucket list, free from the list */
+	if (!list_empty(&obj->hash_link)) {
+		list_del_init(&obj->hash_link);
+		bucket = yaffs_hash_fn(obj->obj_id);
+		dev->obj_bucket[bucket].count--;
+	}
+}
+
+/*  FreeObject frees up a Object and puts it back on the free list */
+static void yaffs_free_obj(struct yaffs_obj *obj)
+{
+	struct yaffs_dev *dev;
+
+	if (!obj) {
+		BUG();
+		return;
+	}
+	dev = obj->my_dev;
+	yaffs_trace(YAFFS_TRACE_OS, "FreeObject %p inode %p",
+		obj, obj->my_inode);
+	if (obj->parent)
+		BUG();
+	if (!list_empty(&obj->siblings))
+		BUG();
+
+	if (obj->my_inode) {
+		/* We're still hooked up to a cached inode.
+		 * Don't delete now, but mark for later deletion
+		 */
+		obj->defered_free = 1;
+		return;
+	}
+
+	yaffs_unhash_obj(obj);
+
+	yaffs_free_raw_obj(dev, obj);
+	dev->n_obj--;
+	dev->checkpoint_blocks_required = 0;	/* force recalculation */
+}
+
+void yaffs_handle_defered_free(struct yaffs_obj *obj)
+{
+	if (obj->defered_free)
+		yaffs_free_obj(obj);
+}
+
+static int yaffs_generic_obj_del(struct yaffs_obj *in)
+{
+	/* Iinvalidate the file's data in the cache, without flushing. */
+	yaffs_invalidate_whole_cache(in);
+
+	if (in->my_dev->param.is_yaffs2 && in->parent != in->my_dev->del_dir) {
+		/* Move to unlinked directory so we have a deletion record */
+		yaffs_change_obj_name(in, in->my_dev->del_dir, _Y("deleted"), 0,
+				      0);
+	}
+
+	yaffs_remove_obj_from_dir(in);
+	yaffs_chunk_del(in->my_dev, in->hdr_chunk, 1, __LINE__);
+	in->hdr_chunk = 0;
+
+	yaffs_free_obj(in);
+	return YAFFS_OK;
+
+}
+
+static void yaffs_soft_del_file(struct yaffs_obj *obj)
+{
+	if (!obj->deleted ||
+	    obj->variant_type != YAFFS_OBJECT_TYPE_FILE ||
+	    obj->soft_del)
+		return;
+
+	if (obj->n_data_chunks <= 0) {
+		/* Empty file with no duplicate object headers,
+		 * just delete it immediately */
+		yaffs_free_tnode(obj->my_dev, obj->variant.file_variant.top);
+		obj->variant.file_variant.top = NULL;
+		yaffs_trace(YAFFS_TRACE_TRACING,
+			"yaffs: Deleting empty file %d",
+			obj->obj_id);
+		yaffs_generic_obj_del(obj);
+	} else {
+		yaffs_soft_del_worker(obj,
+				      obj->variant.file_variant.top,
+				      obj->variant.
+				      file_variant.top_level, 0);
+		obj->soft_del = 1;
+	}
+}
+
+/* Pruning removes any part of the file structure tree that is beyond the
+ * bounds of the file (ie that does not point to chunks).
+ *
+ * A file should only get pruned when its size is reduced.
+ *
+ * Before pruning, the chunks must be pulled from the tree and the
+ * level 0 tnode entries must be zeroed out.
+ * Could also use this for file deletion, but that's probably better handled
+ * by a special case.
+ *
+ * This function is recursive. For levels > 0 the function is called again on
+ * any sub-tree. For level == 0 we just check if the sub-tree has data.
+ * If there is no data in a subtree then it is pruned.
+ */
+
+static struct yaffs_tnode *yaffs_prune_worker(struct yaffs_dev *dev,
+					      struct yaffs_tnode *tn, u32 level,
+					      int del0)
+{
+	int i;
+	int has_data;
+
+	if (!tn)
+		return tn;
+
+	has_data = 0;
+
+	if (level > 0) {
+		for (i = 0; i < YAFFS_NTNODES_INTERNAL; i++) {
+			if (tn->internal[i]) {
+				tn->internal[i] =
+				    yaffs_prune_worker(dev,
+						tn->internal[i],
+						level - 1,
+						(i == 0) ? del0 : 1);
+			}
+
+			if (tn->internal[i])
+				has_data++;
+		}
+	} else {
+		int tnode_size_u32 = dev->tnode_size / sizeof(u32);
+		u32 *map = (u32 *) tn;
+
+		for (i = 0; !has_data && i < tnode_size_u32; i++) {
+			if (map[i])
+				has_data++;
+		}
+	}
+
+	if (has_data == 0 && del0) {
+		/* Free and return NULL */
+		yaffs_free_tnode(dev, tn);
+		tn = NULL;
+	}
+	return tn;
+}
+
+static int yaffs_prune_tree(struct yaffs_dev *dev,
+			    struct yaffs_file_var *file_struct)
+{
+	int i;
+	int has_data;
+	int done = 0;
+	struct yaffs_tnode *tn;
+
+	if (file_struct->top_level < 1)
+		return YAFFS_OK;
+
+	file_struct->top =
+	   yaffs_prune_worker(dev, file_struct->top, file_struct->top_level, 0);
+
+	/* Now we have a tree with all the non-zero branches NULL but
+	 * the height is the same as it was.
+	 * Let's see if we can trim internal tnodes to shorten the tree.
+	 * We can do this if only the 0th element in the tnode is in use
+	 * (ie all the non-zero are NULL)
+	 */
+
+	while (file_struct->top_level && !done) {
+		tn = file_struct->top;
+
+		has_data = 0;
+		for (i = 1; i < YAFFS_NTNODES_INTERNAL; i++) {
+			if (tn->internal[i])
+				has_data++;
+		}
+
+		if (!has_data) {
+			file_struct->top = tn->internal[0];
+			file_struct->top_level--;
+			yaffs_free_tnode(dev, tn);
+		} else {
+			done = 1;
+		}
+	}
+
+	return YAFFS_OK;
+}
+
+/*-------------------- End of File Structure functions.-------------------*/
+
+/* alloc_empty_obj gets us a clean Object.*/
+static struct yaffs_obj *yaffs_alloc_empty_obj(struct yaffs_dev *dev)
+{
+	struct yaffs_obj *obj = yaffs_alloc_raw_obj(dev);
+
+	if (!obj)
+		return obj;
+
+	dev->n_obj++;
+
+	/* Now sweeten it up... */
+
+	memset(obj, 0, sizeof(struct yaffs_obj));
+	obj->being_created = 1;
+
+	obj->my_dev = dev;
+	obj->hdr_chunk = 0;
+	obj->variant_type = YAFFS_OBJECT_TYPE_UNKNOWN;
+	INIT_LIST_HEAD(&(obj->hard_links));
+	INIT_LIST_HEAD(&(obj->hash_link));
+	INIT_LIST_HEAD(&obj->siblings);
+
+	/* Now make the directory sane */
+	if (dev->root_dir) {
+		obj->parent = dev->root_dir;
+		list_add(&(obj->siblings),
+			 &dev->root_dir->variant.dir_variant.children);
+	}
+
+	/* Add it to the lost and found directory.
+	 * NB Can't put root or lost-n-found in lost-n-found so
+	 * check if lost-n-found exists first
+	 */
+	if (dev->lost_n_found)
+		yaffs_add_obj_to_dir(dev->lost_n_found, obj);
+
+	obj->being_created = 0;
+
+	dev->checkpoint_blocks_required = 0;	/* force recalculation */
+
+	return obj;
+}
+
+static int yaffs_find_nice_bucket(struct yaffs_dev *dev)
+{
+	int i;
+	int l = 999;
+	int lowest = 999999;
+
+	/* Search for the shortest list or one that
+	 * isn't too long.
+	 */
+
+	for (i = 0; i < 10 && lowest > 4; i++) {
+		dev->bucket_finder++;
+		dev->bucket_finder %= YAFFS_NOBJECT_BUCKETS;
+		if (dev->obj_bucket[dev->bucket_finder].count < lowest) {
+			lowest = dev->obj_bucket[dev->bucket_finder].count;
+			l = dev->bucket_finder;
+		}
+	}
+
+	return l;
+}
+
+static int yaffs_new_obj_id(struct yaffs_dev *dev)
+{
+	int bucket = yaffs_find_nice_bucket(dev);
+	int found = 0;
+	struct list_head *i;
+	u32 n = (u32) bucket;
+
+	/* Now find an object value that has not already been taken
+	 * by scanning the list.
+	 */
+
+	while (!found) {
+		found = 1;
+		n += YAFFS_NOBJECT_BUCKETS;
+		if (1 || dev->obj_bucket[bucket].count > 0) {
+			list_for_each(i, &dev->obj_bucket[bucket].list) {
+				/* If there is already one in the list */
+				if (i && list_entry(i, struct yaffs_obj,
+						    hash_link)->obj_id == n) {
+					found = 0;
+				}
+			}
+		}
+	}
+	return n;
+}
+
+static void yaffs_hash_obj(struct yaffs_obj *in)
+{
+	int bucket = yaffs_hash_fn(in->obj_id);
+	struct yaffs_dev *dev = in->my_dev;
+
+	list_add(&in->hash_link, &dev->obj_bucket[bucket].list);
+	dev->obj_bucket[bucket].count++;
+}
+
+struct yaffs_obj *yaffs_find_by_number(struct yaffs_dev *dev, u32 number)
+{
+	int bucket = yaffs_hash_fn(number);
+	struct list_head *i;
+	struct yaffs_obj *in;
+
+	list_for_each(i, &dev->obj_bucket[bucket].list) {
+		/* Look if it is in the list */
+		in = list_entry(i, struct yaffs_obj, hash_link);
+		if (in->obj_id == number) {
+			/* Don't show if it is defered free */
+			if (in->defered_free)
+				return NULL;
+			return in;
+		}
+	}
+
+	return NULL;
+}
+
+struct yaffs_obj *yaffs_new_obj(struct yaffs_dev *dev, int number,
+				enum yaffs_obj_type type)
+{
+	struct yaffs_obj *the_obj = NULL;
+	struct yaffs_tnode *tn = NULL;
+
+	if (number < 0)
+		number = yaffs_new_obj_id(dev);
+
+	if (type == YAFFS_OBJECT_TYPE_FILE) {
+		tn = yaffs_get_tnode(dev);
+		if (!tn)
+			return NULL;
+	}
+
+	the_obj = yaffs_alloc_empty_obj(dev);
+	if (!the_obj) {
+		if (tn)
+			yaffs_free_tnode(dev, tn);
+		return NULL;
+	}
+
+	the_obj->fake = 0;
+	the_obj->rename_allowed = 1;
+	the_obj->unlink_allowed = 1;
+	the_obj->obj_id = number;
+	yaffs_hash_obj(the_obj);
+	the_obj->variant_type = type;
+	yaffs_load_current_time(the_obj, 1, 1);
+
+	switch (type) {
+	case YAFFS_OBJECT_TYPE_FILE:
+		the_obj->variant.file_variant.file_size = 0;
+		the_obj->variant.file_variant.scanned_size = 0;
+		the_obj->variant.file_variant.shrink_size = ~0; /* max */
+		the_obj->variant.file_variant.top_level = 0;
+		the_obj->variant.file_variant.top = tn;
+		break;
+	case YAFFS_OBJECT_TYPE_DIRECTORY:
+		INIT_LIST_HEAD(&the_obj->variant.dir_variant.children);
+		INIT_LIST_HEAD(&the_obj->variant.dir_variant.dirty);
+		break;
+	case YAFFS_OBJECT_TYPE_SYMLINK:
+	case YAFFS_OBJECT_TYPE_HARDLINK:
+	case YAFFS_OBJECT_TYPE_SPECIAL:
+		/* No action required */
+		break;
+	case YAFFS_OBJECT_TYPE_UNKNOWN:
+		/* todo this should not happen */
+		break;
+	}
+	return the_obj;
+}
+
+static struct yaffs_obj *yaffs_create_fake_dir(struct yaffs_dev *dev,
+					       int number, u32 mode)
+{
+
+	struct yaffs_obj *obj =
+	    yaffs_new_obj(dev, number, YAFFS_OBJECT_TYPE_DIRECTORY);
+
+	if (!obj)
+		return NULL;
+
+	obj->fake = 1;	/* it is fake so it might not use NAND */
+	obj->rename_allowed = 0;
+	obj->unlink_allowed = 0;
+	obj->deleted = 0;
+	obj->unlinked = 0;
+	obj->yst_mode = mode;
+	obj->my_dev = dev;
+	obj->hdr_chunk = 0;	/* Not a valid chunk. */
+	return obj;
+
+}
+
+
+static void yaffs_init_tnodes_and_objs(struct yaffs_dev *dev)
+{
+	int i;
+
+	dev->n_obj = 0;
+	dev->n_tnodes = 0;
+	yaffs_init_raw_tnodes_and_objs(dev);
+
+	for (i = 0; i < YAFFS_NOBJECT_BUCKETS; i++) {
+		INIT_LIST_HEAD(&dev->obj_bucket[i].list);
+		dev->obj_bucket[i].count = 0;
+	}
+}
+
+struct yaffs_obj *yaffs_find_or_create_by_number(struct yaffs_dev *dev,
+						 int number,
+						 enum yaffs_obj_type type)
+{
+	struct yaffs_obj *the_obj = NULL;
+
+	if (number > 0)
+		the_obj = yaffs_find_by_number(dev, number);
+
+	if (!the_obj)
+		the_obj = yaffs_new_obj(dev, number, type);
+
+	return the_obj;
+
+}
+
+YCHAR *yaffs_clone_str(const YCHAR *str)
+{
+	YCHAR *new_str = NULL;
+	int len;
+
+	if (!str)
+		str = _Y("");
+
+	len = strnlen(str, YAFFS_MAX_ALIAS_LENGTH);
+	new_str = kmalloc((len + 1) * sizeof(YCHAR), GFP_NOFS);
+	if (new_str) {
+		strncpy(new_str, str, len);
+		new_str[len] = 0;
+	}
+	return new_str;
+
+}
+/*
+ *yaffs_update_parent() handles fixing a directories mtime and ctime when a new
+ * link (ie. name) is created or deleted in the directory.
+ *
+ * ie.
+ *   create dir/a : update dir's mtime/ctime
+ *   rm dir/a:   update dir's mtime/ctime
+ *   modify dir/a: don't update dir's mtimme/ctime
+ *
+ * This can be handled immediately or defered. Defering helps reduce the number
+ * of updates when many files in a directory are changed within a brief period.
+ *
+ * If the directory updating is defered then yaffs_update_dirty_dirs must be
+ * called periodically.
+ */
+
+static void yaffs_update_parent(struct yaffs_obj *obj)
+{
+	struct yaffs_dev *dev;
+
+	if (!obj)
+		return;
+	dev = obj->my_dev;
+	obj->dirty = 1;
+	yaffs_load_current_time(obj, 0, 1);
+	if (dev->param.defered_dir_update) {
+		struct list_head *link = &obj->variant.dir_variant.dirty;
+
+		if (list_empty(link)) {
+			list_add(link, &dev->dirty_dirs);
+			yaffs_trace(YAFFS_TRACE_BACKGROUND,
+			  "Added object %d to dirty directories",
+			   obj->obj_id);
+		}
+
+	} else {
+		yaffs_update_oh(obj, NULL, 0, 0, 0, NULL);
+	}
+}
+
+void yaffs_update_dirty_dirs(struct yaffs_dev *dev)
+{
+	struct list_head *link;
+	struct yaffs_obj *obj;
+	struct yaffs_dir_var *d_s;
+	union yaffs_obj_var *o_v;
+
+	yaffs_trace(YAFFS_TRACE_BACKGROUND, "Update dirty directories");
+
+	while (!list_empty(&dev->dirty_dirs)) {
+		link = dev->dirty_dirs.next;
+		list_del_init(link);
+
+		d_s = list_entry(link, struct yaffs_dir_var, dirty);
+		o_v = list_entry(d_s, union yaffs_obj_var, dir_variant);
+		obj = list_entry(o_v, struct yaffs_obj, variant);
+
+		yaffs_trace(YAFFS_TRACE_BACKGROUND, "Update directory %d",
+			obj->obj_id);
+
+		if (obj->dirty)
+			yaffs_update_oh(obj, NULL, 0, 0, 0, NULL);
+	}
+}
+
+/*
+ * Mknod (create) a new object.
+ * equiv_obj only has meaning for a hard link;
+ * alias_str only has meaning for a symlink.
+ * rdev only has meaning for devices (a subset of special objects)
+ */
+
+static struct yaffs_obj *yaffs_create_obj(enum yaffs_obj_type type,
+					  struct yaffs_obj *parent,
+					  const YCHAR *name,
+					  u32 mode,
+					  u32 uid,
+					  u32 gid,
+					  struct yaffs_obj *equiv_obj,
+					  const YCHAR *alias_str, u32 rdev)
+{
+	struct yaffs_obj *in;
+	YCHAR *str = NULL;
+	struct yaffs_dev *dev = parent->my_dev;
+
+	/* Check if the entry exists.
+	 * If it does then fail the call since we don't want a dup. */
+	if (yaffs_find_by_name(parent, name))
+		return NULL;
+
+	if (type == YAFFS_OBJECT_TYPE_SYMLINK) {
+		str = yaffs_clone_str(alias_str);
+		if (!str)
+			return NULL;
+	}
+
+	in = yaffs_new_obj(dev, -1, type);
+
+	if (!in) {
+		kfree(str);
+		return NULL;
+	}
+
+	in->hdr_chunk = 0;
+	in->valid = 1;
+	in->variant_type = type;
+
+	in->yst_mode = mode;
+
+	yaffs_attribs_init(in, gid, uid, rdev);
+
+	in->n_data_chunks = 0;
+
+	yaffs_set_obj_name(in, name);
+	in->dirty = 1;
+
+	yaffs_add_obj_to_dir(parent, in);
+
+	in->my_dev = parent->my_dev;
+
+	switch (type) {
+	case YAFFS_OBJECT_TYPE_SYMLINK:
+		in->variant.symlink_variant.alias = str;
+		break;
+	case YAFFS_OBJECT_TYPE_HARDLINK:
+		in->variant.hardlink_variant.equiv_obj = equiv_obj;
+		in->variant.hardlink_variant.equiv_id = equiv_obj->obj_id;
+		list_add(&in->hard_links, &equiv_obj->hard_links);
+		break;
+	case YAFFS_OBJECT_TYPE_FILE:
+	case YAFFS_OBJECT_TYPE_DIRECTORY:
+	case YAFFS_OBJECT_TYPE_SPECIAL:
+	case YAFFS_OBJECT_TYPE_UNKNOWN:
+		/* do nothing */
+		break;
+	}
+
+	if (yaffs_update_oh(in, name, 0, 0, 0, NULL) < 0) {
+		/* Could not create the object header, fail */
+		yaffs_del_obj(in);
+		in = NULL;
+	}
+
+	if (in)
+		yaffs_update_parent(parent);
+
+	return in;
+}
+
+struct yaffs_obj *yaffs_create_file(struct yaffs_obj *parent,
+				    const YCHAR *name, u32 mode, u32 uid,
+				    u32 gid)
+{
+	return yaffs_create_obj(YAFFS_OBJECT_TYPE_FILE, parent, name, mode,
+				uid, gid, NULL, NULL, 0);
+}
+
+struct yaffs_obj *yaffs_create_dir(struct yaffs_obj *parent, const YCHAR *name,
+				   u32 mode, u32 uid, u32 gid)
+{
+	return yaffs_create_obj(YAFFS_OBJECT_TYPE_DIRECTORY, parent, name,
+				mode, uid, gid, NULL, NULL, 0);
+}
+
+struct yaffs_obj *yaffs_create_special(struct yaffs_obj *parent,
+				       const YCHAR *name, u32 mode, u32 uid,
+				       u32 gid, u32 rdev)
+{
+	return yaffs_create_obj(YAFFS_OBJECT_TYPE_SPECIAL, parent, name, mode,
+				uid, gid, NULL, NULL, rdev);
+}
+
+struct yaffs_obj *yaffs_create_symlink(struct yaffs_obj *parent,
+				       const YCHAR *name, u32 mode, u32 uid,
+				       u32 gid, const YCHAR *alias)
+{
+	return yaffs_create_obj(YAFFS_OBJECT_TYPE_SYMLINK, parent, name, mode,
+				uid, gid, NULL, alias, 0);
+}
+
+/* yaffs_link_obj returns the object id of the equivalent object.*/
+struct yaffs_obj *yaffs_link_obj(struct yaffs_obj *parent, const YCHAR * name,
+				 struct yaffs_obj *equiv_obj)
+{
+	/* Get the real object in case we were fed a hard link obj */
+	equiv_obj = yaffs_get_equivalent_obj(equiv_obj);
+
+	if (yaffs_create_obj(YAFFS_OBJECT_TYPE_HARDLINK,
+			parent, name, 0, 0, 0,
+			equiv_obj, NULL, 0))
+		return equiv_obj;
+
+	return NULL;
+
+}
+
+
+
+/*---------------------- Block Management and Page Allocation -------------*/
+
+static void yaffs_deinit_blocks(struct yaffs_dev *dev)
+{
+	if (dev->block_info_alt && dev->block_info)
+		vfree(dev->block_info);
+	else
+		kfree(dev->block_info);
+
+	dev->block_info_alt = 0;
+
+	dev->block_info = NULL;
+
+	if (dev->chunk_bits_alt && dev->chunk_bits)
+		vfree(dev->chunk_bits);
+	else
+		kfree(dev->chunk_bits);
+	dev->chunk_bits_alt = 0;
+	dev->chunk_bits = NULL;
+}
+
+static int yaffs_init_blocks(struct yaffs_dev *dev)
+{
+	int n_blocks = dev->internal_end_block - dev->internal_start_block + 1;
+
+	dev->block_info = NULL;
+	dev->chunk_bits = NULL;
+	dev->alloc_block = -1;	/* force it to get a new one */
+
+	/* If the first allocation strategy fails, thry the alternate one */
+	dev->block_info =
+		kmalloc(n_blocks * sizeof(struct yaffs_block_info), GFP_NOFS);
+	if (!dev->block_info) {
+		dev->block_info =
+		    vmalloc(n_blocks * sizeof(struct yaffs_block_info));
+		dev->block_info_alt = 1;
+	} else {
+		dev->block_info_alt = 0;
+	}
+
+	if (!dev->block_info)
+		goto alloc_error;
+
+	/* Set up dynamic blockinfo stuff. Round up bytes. */
+	dev->chunk_bit_stride = (dev->param.chunks_per_block + 7) / 8;
+	dev->chunk_bits =
+		kmalloc(dev->chunk_bit_stride * n_blocks, GFP_NOFS);
+	if (!dev->chunk_bits) {
+		dev->chunk_bits =
+		    vmalloc(dev->chunk_bit_stride * n_blocks);
+		dev->chunk_bits_alt = 1;
+	} else {
+		dev->chunk_bits_alt = 0;
+	}
+	if (!dev->chunk_bits)
+		goto alloc_error;
+
+
+	memset(dev->block_info, 0, n_blocks * sizeof(struct yaffs_block_info));
+	memset(dev->chunk_bits, 0, dev->chunk_bit_stride * n_blocks);
+	return YAFFS_OK;
+
+alloc_error:
+	yaffs_deinit_blocks(dev);
+	return YAFFS_FAIL;
+}
+
+
+void yaffs_block_became_dirty(struct yaffs_dev *dev, int block_no)
+{
+	struct yaffs_block_info *bi = yaffs_get_block_info(dev, block_no);
+	int erased_ok = 0;
+	int i;
+
+	/* If the block is still healthy erase it and mark as clean.
+	 * If the block has had a data failure, then retire it.
+	 */
+
+	yaffs_trace(YAFFS_TRACE_GC | YAFFS_TRACE_ERASE,
+		"yaffs_block_became_dirty block %d state %d %s",
+		block_no, bi->block_state,
+		(bi->needs_retiring) ? "needs retiring" : "");
+
+	yaffs2_clear_oldest_dirty_seq(dev, bi);
+
+	bi->block_state = YAFFS_BLOCK_STATE_DIRTY;
+
+	/* If this is the block being garbage collected then stop gc'ing */
+	if (block_no == dev->gc_block)
+		dev->gc_block = 0;
+
+	/* If this block is currently the best candidate for gc
+	 * then drop as a candidate */
+	if (block_no == dev->gc_dirtiest) {
+		dev->gc_dirtiest = 0;
+		dev->gc_pages_in_use = 0;
+	}
+
+	if (!bi->needs_retiring) {
+		yaffs2_checkpt_invalidate(dev);
+		erased_ok = yaffs_erase_block(dev, block_no);
+		if (!erased_ok) {
+			dev->n_erase_failures++;
+			yaffs_trace(YAFFS_TRACE_ERROR | YAFFS_TRACE_BAD_BLOCKS,
+			  "**>> Erasure failed %d", block_no);
+		}
+	}
+
+	/* Verify erasure if needed */
+	if (erased_ok &&
+	    ((yaffs_trace_mask & YAFFS_TRACE_ERASE) ||
+	     !yaffs_skip_verification(dev))) {
+		for (i = 0; i < dev->param.chunks_per_block; i++) {
+			if (!yaffs_check_chunk_erased(dev,
+				block_no * dev->param.chunks_per_block + i)) {
+				yaffs_trace(YAFFS_TRACE_ERROR,
+					">>Block %d erasure supposedly OK, but chunk %d not erased",
+					block_no, i);
+			}
+		}
+	}
+
+	if (!erased_ok) {
+		/* We lost a block of free space */
+		dev->n_free_chunks -= dev->param.chunks_per_block;
+		yaffs_retire_block(dev, block_no);
+		yaffs_trace(YAFFS_TRACE_ERROR | YAFFS_TRACE_BAD_BLOCKS,
+			"**>> Block %d retired", block_no);
+		return;
+	}
+
+	/* Clean it up... */
+	bi->block_state = YAFFS_BLOCK_STATE_EMPTY;
+	bi->seq_number = 0;
+	dev->n_erased_blocks++;
+	bi->pages_in_use = 0;
+	bi->soft_del_pages = 0;
+	bi->has_shrink_hdr = 0;
+	bi->skip_erased_check = 1;	/* Clean, so no need to check */
+	bi->gc_prioritise = 0;
+	bi->has_summary=0;
+
+	yaffs_clear_chunk_bits(dev, block_no);
+
+	yaffs_trace(YAFFS_TRACE_ERASE, "Erased block %d", block_no);
+}
+
+static inline int yaffs_gc_process_chunk(struct yaffs_dev *dev,
+					struct yaffs_block_info *bi,
+					int old_chunk, u8 *buffer)
+{
+	int new_chunk;
+	int mark_flash = 1;
+	struct yaffs_ext_tags tags;
+	struct yaffs_obj *object;
+	int matching_chunk;
+	int ret_val = YAFFS_OK;
+
+	memset(&tags, 0, sizeof(tags));
+	yaffs_rd_chunk_tags_nand(dev, old_chunk,
+				 buffer, &tags);
+	object = yaffs_find_by_number(dev, tags.obj_id);
+
+	yaffs_trace(YAFFS_TRACE_GC_DETAIL,
+		"Collecting chunk in block %d, %d %d %d ",
+		dev->gc_chunk, tags.obj_id,
+		tags.chunk_id, tags.n_bytes);
+
+	if (object && !yaffs_skip_verification(dev)) {
+		if (tags.chunk_id == 0)
+			matching_chunk =
+			    object->hdr_chunk;
+		else if (object->soft_del)
+			/* Defeat the test */
+			matching_chunk = old_chunk;
+		else
+			matching_chunk =
+			    yaffs_find_chunk_in_file
+			    (object, tags.chunk_id,
+			     NULL);
+
+		if (old_chunk != matching_chunk)
+			yaffs_trace(YAFFS_TRACE_ERROR,
+				"gc: page in gc mismatch: %d %d %d %d",
+				old_chunk,
+				matching_chunk,
+				tags.obj_id,
+				tags.chunk_id);
+	}
+
+	if (!object) {
+		yaffs_trace(YAFFS_TRACE_ERROR,
+			"page %d in gc has no object: %d %d %d ",
+			old_chunk,
+			tags.obj_id, tags.chunk_id,
+			tags.n_bytes);
+	}
+
+	if (object &&
+	    object->deleted &&
+	    object->soft_del && tags.chunk_id != 0) {
+		/* Data chunk in a soft deleted file,
+		 * throw it away.
+		 * It's a soft deleted data chunk,
+		 * No need to copy this, just forget
+		 * about it and fix up the object.
+		 */
+
+		/* Free chunks already includes
+		 * softdeleted chunks, how ever this
+		 * chunk is going to soon be really
+		 * deleted which will increment free
+		 * chunks. We have to decrement free
+		 * chunks so this works out properly.
+		 */
+		dev->n_free_chunks--;
+		bi->soft_del_pages--;
+
+		object->n_data_chunks--;
+		if (object->n_data_chunks <= 0) {
+			/* remeber to clean up obj */
+			dev->gc_cleanup_list[dev->n_clean_ups] = tags.obj_id;
+			dev->n_clean_ups++;
+		}
+		mark_flash = 0;
+	} else if (object) {
+		/* It's either a data chunk in a live
+		 * file or an ObjectHeader, so we're
+		 * interested in it.
+		 * NB Need to keep the ObjectHeaders of
+		 * deleted files until the whole file
+		 * has been deleted off
+		 */
+		tags.serial_number++;
+		dev->n_gc_copies++;
+
+		if (tags.chunk_id == 0) {
+			/* It is an object Id,
+			 * We need to nuke the
+			 * shrinkheader flags since its
+			 * work is done.
+			 * Also need to clean up
+			 * shadowing.
+			 */
+			struct yaffs_obj_hdr *oh;
+			oh = (struct yaffs_obj_hdr *) buffer;
+
+			oh->is_shrink = 0;
+			tags.extra_is_shrink = 0;
+			oh->shadows_obj = 0;
+			oh->inband_shadowed_obj_id = 0;
+			tags.extra_shadows = 0;
+
+			/* Update file size */
+			if (object->variant_type == YAFFS_OBJECT_TYPE_FILE) {
+				oh->file_size =
+				    object->variant.file_variant.file_size;
+				tags.extra_length = oh->file_size;
+			}
+
+			yaffs_verify_oh(object, oh, &tags, 1);
+			new_chunk =
+			    yaffs_write_new_chunk(dev, (u8 *) oh, &tags, 1);
+		} else {
+			new_chunk =
+			    yaffs_write_new_chunk(dev, buffer, &tags, 1);
+		}
+
+		if (new_chunk < 0) {
+			ret_val = YAFFS_FAIL;
+		} else {
+
+			/* Now fix up the Tnodes etc. */
+
+			if (tags.chunk_id == 0) {
+				/* It's a header */
+				object->hdr_chunk = new_chunk;
+				object->serial = tags.serial_number;
+			} else {
+				/* It's a data chunk */
+				yaffs_put_chunk_in_file(object, tags.chunk_id,
+							new_chunk, 0);
+			}
+		}
+	}
+	if (ret_val == YAFFS_OK)
+		yaffs_chunk_del(dev, old_chunk, mark_flash, __LINE__);
+	return ret_val;
+}
+
+static int yaffs_gc_block(struct yaffs_dev *dev, int block, int whole_block)
+{
+	int old_chunk;
+	int ret_val = YAFFS_OK;
+	int i;
+	int is_checkpt_block;
+	int max_copies;
+	int chunks_before = yaffs_get_erased_chunks(dev);
+	int chunks_after;
+	struct yaffs_block_info *bi = yaffs_get_block_info(dev, block);
+
+	is_checkpt_block = (bi->block_state == YAFFS_BLOCK_STATE_CHECKPOINT);
+
+	yaffs_trace(YAFFS_TRACE_TRACING,
+		"Collecting block %d, in use %d, shrink %d, whole_block %d",
+		block, bi->pages_in_use, bi->has_shrink_hdr,
+		whole_block);
+
+	/*yaffs_verify_free_chunks(dev); */
+
+	if (bi->block_state == YAFFS_BLOCK_STATE_FULL)
+		bi->block_state = YAFFS_BLOCK_STATE_COLLECTING;
+
+	bi->has_shrink_hdr = 0;	/* clear the flag so that the block can erase */
+
+	dev->gc_disable = 1;
+
+	yaffs_summary_gc(dev, block);
+
+	if (is_checkpt_block || !yaffs_still_some_chunks(dev, block)) {
+		yaffs_trace(YAFFS_TRACE_TRACING,
+			"Collecting block %d that has no chunks in use",
+			block);
+		yaffs_block_became_dirty(dev, block);
+	} else {
+
+		u8 *buffer = yaffs_get_temp_buffer(dev);
+
+		yaffs_verify_blk(dev, bi, block);
+
+		max_copies = (whole_block) ? dev->param.chunks_per_block : 5;
+		old_chunk = block * dev->param.chunks_per_block + dev->gc_chunk;
+
+		for (/* init already done */ ;
+		     ret_val == YAFFS_OK &&
+		     dev->gc_chunk < dev->param.chunks_per_block &&
+		     (bi->block_state == YAFFS_BLOCK_STATE_COLLECTING) &&
+		     max_copies > 0;
+		     dev->gc_chunk++, old_chunk++) {
+			if (yaffs_check_chunk_bit(dev, block, dev->gc_chunk)) {
+				/* Page is in use and might need to be copied */
+				max_copies--;
+				ret_val = yaffs_gc_process_chunk(dev, bi,
+							old_chunk, buffer);
+			}
+		}
+		yaffs_release_temp_buffer(dev, buffer);
+	}
+
+	yaffs_verify_collected_blk(dev, bi, block);
+
+	if (bi->block_state == YAFFS_BLOCK_STATE_COLLECTING) {
+		/*
+		 * The gc did not complete. Set block state back to FULL
+		 * because checkpointing does not restore gc.
+		 */
+		bi->block_state = YAFFS_BLOCK_STATE_FULL;
+	} else {
+		/* The gc completed. */
+		/* Do any required cleanups */
+		for (i = 0; i < dev->n_clean_ups; i++) {
+			/* Time to delete the file too */
+			struct yaffs_obj *object =
+			    yaffs_find_by_number(dev, dev->gc_cleanup_list[i]);
+			if (object) {
+				yaffs_free_tnode(dev,
+					  object->variant.file_variant.top);
+				object->variant.file_variant.top = NULL;
+				yaffs_trace(YAFFS_TRACE_GC,
+					"yaffs: About to finally delete object %d",
+					object->obj_id);
+				yaffs_generic_obj_del(object);
+				object->my_dev->n_deleted_files--;
+			}
+
+		}
+		chunks_after = yaffs_get_erased_chunks(dev);
+		if (chunks_before >= chunks_after)
+			yaffs_trace(YAFFS_TRACE_GC,
+				"gc did not increase free chunks before %d after %d",
+				chunks_before, chunks_after);
+		dev->gc_block = 0;
+		dev->gc_chunk = 0;
+		dev->n_clean_ups = 0;
+	}
+
+	dev->gc_disable = 0;
+
+	return ret_val;
+}
+
+/*
+ * find_gc_block() selects the dirtiest block (or close enough)
+ * for garbage collection.
+ */
+
+static unsigned yaffs_find_gc_block(struct yaffs_dev *dev,
+				    int aggressive, int background)
+{
+	int i;
+	int iterations;
+	unsigned selected = 0;
+	int prioritised = 0;
+	int prioritised_exist = 0;
+	struct yaffs_block_info *bi;
+	int threshold;
+
+	/* First let's see if we need to grab a prioritised block */
+	if (dev->has_pending_prioritised_gc && !aggressive) {
+		dev->gc_dirtiest = 0;
+		bi = dev->block_info;
+		for (i = dev->internal_start_block;
+		     i <= dev->internal_end_block && !selected; i++) {
+
+			if (bi->gc_prioritise) {
+				prioritised_exist = 1;
+				if (bi->block_state == YAFFS_BLOCK_STATE_FULL &&
+				    yaffs_block_ok_for_gc(dev, bi)) {
+					selected = i;
+					prioritised = 1;
+				}
+			}
+			bi++;
+		}
+
+		/*
+		 * If there is a prioritised block and none was selected then
+		 * this happened because there is at least one old dirty block
+		 * gumming up the works. Let's gc the oldest dirty block.
+		 */
+
+		if (prioritised_exist &&
+		    !selected && dev->oldest_dirty_block > 0)
+			selected = dev->oldest_dirty_block;
+
+		if (!prioritised_exist)	/* None found, so we can clear this */
+			dev->has_pending_prioritised_gc = 0;
+	}
+
+	/* If we're doing aggressive GC then we are happy to take a less-dirty
+	 * block, and search harder.
+	 * else (leasurely gc), then we only bother to do this if the
+	 * block has only a few pages in use.
+	 */
+
+	if (!selected) {
+		int pages_used;
+		int n_blocks =
+		    dev->internal_end_block - dev->internal_start_block + 1;
+		if (aggressive) {
+			threshold = dev->param.chunks_per_block;
+			iterations = n_blocks;
+		} else {
+			int max_threshold;
+
+			if (background)
+				max_threshold = dev->param.chunks_per_block / 2;
+			else
+				max_threshold = dev->param.chunks_per_block / 8;
+
+			if (max_threshold < YAFFS_GC_PASSIVE_THRESHOLD)
+				max_threshold = YAFFS_GC_PASSIVE_THRESHOLD;
+
+			threshold = background ? (dev->gc_not_done + 2) * 2 : 0;
+			if (threshold < YAFFS_GC_PASSIVE_THRESHOLD)
+				threshold = YAFFS_GC_PASSIVE_THRESHOLD;
+			if (threshold > max_threshold)
+				threshold = max_threshold;
+
+			iterations = n_blocks / 16 + 1;
+			if (iterations > 100)
+				iterations = 100;
+		}
+
+		for (i = 0;
+		     i < iterations &&
+		     (dev->gc_dirtiest < 1 ||
+		      dev->gc_pages_in_use > YAFFS_GC_GOOD_ENOUGH);
+		     i++) {
+			dev->gc_block_finder++;
+			if (dev->gc_block_finder < dev->internal_start_block ||
+			    dev->gc_block_finder > dev->internal_end_block)
+				dev->gc_block_finder =
+				    dev->internal_start_block;
+
+			bi = yaffs_get_block_info(dev, dev->gc_block_finder);
+
+			pages_used = bi->pages_in_use - bi->soft_del_pages;
+
+			if (bi->block_state == YAFFS_BLOCK_STATE_FULL &&
+			    pages_used < dev->param.chunks_per_block &&
+			    (dev->gc_dirtiest < 1 ||
+			     pages_used < dev->gc_pages_in_use) &&
+			    yaffs_block_ok_for_gc(dev, bi)) {
+				dev->gc_dirtiest = dev->gc_block_finder;
+				dev->gc_pages_in_use = pages_used;
+			}
+		}
+
+		if (dev->gc_dirtiest > 0 && dev->gc_pages_in_use <= threshold)
+			selected = dev->gc_dirtiest;
+	}
+
+	/*
+	 * If nothing has been selected for a while, try the oldest dirty
+	 * because that's gumming up the works.
+	 */
+
+	if (!selected && dev->param.is_yaffs2 &&
+	    dev->gc_not_done >= (background ? 10 : 20)) {
+		yaffs2_find_oldest_dirty_seq(dev);
+		if (dev->oldest_dirty_block > 0) {
+			selected = dev->oldest_dirty_block;
+			dev->gc_dirtiest = selected;
+			dev->oldest_dirty_gc_count++;
+			bi = yaffs_get_block_info(dev, selected);
+			dev->gc_pages_in_use =
+			    bi->pages_in_use - bi->soft_del_pages;
+		} else {
+			dev->gc_not_done = 0;
+		}
+	}
+
+	if (selected) {
+		yaffs_trace(YAFFS_TRACE_GC,
+			"GC Selected block %d with %d free, prioritised:%d",
+			selected,
+			dev->param.chunks_per_block - dev->gc_pages_in_use,
+			prioritised);
+
+		dev->n_gc_blocks++;
+		if (background)
+			dev->bg_gcs++;
+
+		dev->gc_dirtiest = 0;
+		dev->gc_pages_in_use = 0;
+		dev->gc_not_done = 0;
+		if (dev->refresh_skip > 0)
+			dev->refresh_skip--;
+	} else {
+		dev->gc_not_done++;
+		yaffs_trace(YAFFS_TRACE_GC,
+			"GC none: finder %d skip %d threshold %d dirtiest %d using %d oldest %d%s",
+			dev->gc_block_finder, dev->gc_not_done, threshold,
+			dev->gc_dirtiest, dev->gc_pages_in_use,
+			dev->oldest_dirty_block, background ? " bg" : "");
+	}
+
+	return selected;
+}
+
+/* New garbage collector
+ * If we're very low on erased blocks then we do aggressive garbage collection
+ * otherwise we do "leasurely" garbage collection.
+ * Aggressive gc looks further (whole array) and will accept less dirty blocks.
+ * Passive gc only inspects smaller areas and only accepts more dirty blocks.
+ *
+ * The idea is to help clear out space in a more spread-out manner.
+ * Dunno if it really does anything useful.
+ */
+static int yaffs_check_gc(struct yaffs_dev *dev, int background)
+{
+	int aggressive = 0;
+	int gc_ok = YAFFS_OK;
+	int max_tries = 0;
+	int min_erased;
+	int erased_chunks;
+	int checkpt_block_adjust;
+
+	if (dev->param.gc_control && (dev->param.gc_control(dev) & 1) == 0)
+		return YAFFS_OK;
+
+	if (dev->gc_disable)
+		/* Bail out so we don't get recursive gc */
+		return YAFFS_OK;
+
+	/* This loop should pass the first time.
+	 * Only loops here if the collection does not increase space.
+	 */
+
+	do {
+		max_tries++;
+
+		checkpt_block_adjust = yaffs_calc_checkpt_blocks_required(dev);
+
+		min_erased =
+		    dev->param.n_reserved_blocks + checkpt_block_adjust + 1;
+		erased_chunks =
+		    dev->n_erased_blocks * dev->param.chunks_per_block;
+
+		/* If we need a block soon then do aggressive gc. */
+		if (dev->n_erased_blocks < min_erased)
+			aggressive = 1;
+		else {
+			if (!background
+			    && erased_chunks > (dev->n_free_chunks / 4))
+				break;
+
+			if (dev->gc_skip > 20)
+				dev->gc_skip = 20;
+			if (erased_chunks < dev->n_free_chunks / 2 ||
+			    dev->gc_skip < 1 || background)
+				aggressive = 0;
+			else {
+				dev->gc_skip--;
+				break;
+			}
+		}
+
+		dev->gc_skip = 5;
+
+		/* If we don't already have a block being gc'd then see if we
+		 * should start another */
+
+		if (dev->gc_block < 1 && !aggressive) {
+			dev->gc_block = yaffs2_find_refresh_block(dev);
+			dev->gc_chunk = 0;
+			dev->n_clean_ups = 0;
+		}
+		if (dev->gc_block < 1) {
+			dev->gc_block =
+			    yaffs_find_gc_block(dev, aggressive, background);
+			dev->gc_chunk = 0;
+			dev->n_clean_ups = 0;
+		}
+
+		if (dev->gc_block > 0) {
+			dev->all_gcs++;
+			if (!aggressive)
+				dev->passive_gc_count++;
+
+			yaffs_trace(YAFFS_TRACE_GC,
+				"yaffs: GC n_erased_blocks %d aggressive %d",
+				dev->n_erased_blocks, aggressive);
+
+			gc_ok = yaffs_gc_block(dev, dev->gc_block, aggressive);
+		}
+
+		if (dev->n_erased_blocks < (dev->param.n_reserved_blocks) &&
+		    dev->gc_block > 0) {
+			yaffs_trace(YAFFS_TRACE_GC,
+				"yaffs: GC !!!no reclaim!!! n_erased_blocks %d after try %d block %d",
+				dev->n_erased_blocks, max_tries,
+				dev->gc_block);
+		}
+	} while ((dev->n_erased_blocks < dev->param.n_reserved_blocks) &&
+		 (dev->gc_block > 0) && (max_tries < 2));
+
+	return aggressive ? gc_ok : YAFFS_OK;
+}
+
+/*
+ * yaffs_bg_gc()
+ * Garbage collects. Intended to be called from a background thread.
+ * Returns non-zero if at least half the free chunks are erased.
+ */
+int yaffs_bg_gc(struct yaffs_dev *dev, unsigned urgency)
+{
+	int erased_chunks = dev->n_erased_blocks * dev->param.chunks_per_block;
+
+	yaffs_trace(YAFFS_TRACE_BACKGROUND, "Background gc %u", urgency);
+
+	yaffs_check_gc(dev, 1);
+	return erased_chunks > dev->n_free_chunks / 2;
+}
+
+/*-------------------- Data file manipulation -----------------*/
+
+static int yaffs_rd_data_obj(struct yaffs_obj *in, int inode_chunk, u8 * buffer)
+{
+	int nand_chunk = yaffs_find_chunk_in_file(in, inode_chunk, NULL);
+
+	if (nand_chunk >= 0)
+		return yaffs_rd_chunk_tags_nand(in->my_dev, nand_chunk,
+						buffer, NULL);
+	else {
+		yaffs_trace(YAFFS_TRACE_NANDACCESS,
+			"Chunk %d not found zero instead",
+			nand_chunk);
+		/* get sane (zero) data if you read a hole */
+		memset(buffer, 0, in->my_dev->data_bytes_per_chunk);
+		return 0;
+	}
+
+}
+
+void yaffs_chunk_del(struct yaffs_dev *dev, int chunk_id, int mark_flash,
+		     int lyn)
+{
+	int block;
+	int page;
+	struct yaffs_ext_tags tags;
+	struct yaffs_block_info *bi;
+
+	if (chunk_id <= 0)
+		return;
+
+	dev->n_deletions++;
+	block = chunk_id / dev->param.chunks_per_block;
+	page = chunk_id % dev->param.chunks_per_block;
+
+	if (!yaffs_check_chunk_bit(dev, block, page))
+		yaffs_trace(YAFFS_TRACE_VERIFY,
+			"Deleting invalid chunk %d", chunk_id);
+
+	bi = yaffs_get_block_info(dev, block);
+
+	yaffs2_update_oldest_dirty_seq(dev, block, bi);
+
+	yaffs_trace(YAFFS_TRACE_DELETION,
+		"line %d delete of chunk %d",
+		lyn, chunk_id);
+
+	if (!dev->param.is_yaffs2 && mark_flash &&
+	    bi->block_state != YAFFS_BLOCK_STATE_COLLECTING) {
+
+		memset(&tags, 0, sizeof(tags));
+		tags.is_deleted = 1;
+		yaffs_wr_chunk_tags_nand(dev, chunk_id, NULL, &tags);
+		yaffs_handle_chunk_update(dev, chunk_id, &tags);
+	} else {
+		dev->n_unmarked_deletions++;
+	}
+
+	/* Pull out of the management area.
+	 * If the whole block became dirty, this will kick off an erasure.
+	 */
+	if (bi->block_state == YAFFS_BLOCK_STATE_ALLOCATING ||
+	    bi->block_state == YAFFS_BLOCK_STATE_FULL ||
+	    bi->block_state == YAFFS_BLOCK_STATE_NEEDS_SCAN ||
+	    bi->block_state == YAFFS_BLOCK_STATE_COLLECTING) {
+		dev->n_free_chunks++;
+		yaffs_clear_chunk_bit(dev, block, page);
+		bi->pages_in_use--;
+
+		if (bi->pages_in_use == 0 &&
+		    !bi->has_shrink_hdr &&
+		    bi->block_state != YAFFS_BLOCK_STATE_ALLOCATING &&
+		    bi->block_state != YAFFS_BLOCK_STATE_NEEDS_SCAN) {
+			yaffs_block_became_dirty(dev, block);
+		}
+	}
+}
+
+static int yaffs_wr_data_obj(struct yaffs_obj *in, int inode_chunk,
+			     const u8 *buffer, int n_bytes, int use_reserve)
+{
+	/* Find old chunk Need to do this to get serial number
+	 * Write new one and patch into tree.
+	 * Invalidate old tags.
+	 */
+
+	int prev_chunk_id;
+	struct yaffs_ext_tags prev_tags;
+	int new_chunk_id;
+	struct yaffs_ext_tags new_tags;
+	struct yaffs_dev *dev = in->my_dev;
+
+	yaffs_check_gc(dev, 0);
+
+	/* Get the previous chunk at this location in the file if it exists.
+	 * If it does not exist then put a zero into the tree. This creates
+	 * the tnode now, rather than later when it is harder to clean up.
+	 */
+	prev_chunk_id = yaffs_find_chunk_in_file(in, inode_chunk, &prev_tags);
+	if (prev_chunk_id < 1 &&
+	    !yaffs_put_chunk_in_file(in, inode_chunk, 0, 0))
+		return 0;
+
+	/* Set up new tags */
+	memset(&new_tags, 0, sizeof(new_tags));
+
+	new_tags.chunk_id = inode_chunk;
+	new_tags.obj_id = in->obj_id;
+	new_tags.serial_number =
+	    (prev_chunk_id > 0) ? prev_tags.serial_number + 1 : 1;
+	new_tags.n_bytes = n_bytes;
+
+	if (n_bytes < 1 || n_bytes > dev->param.total_bytes_per_chunk) {
+		yaffs_trace(YAFFS_TRACE_ERROR,
+		  "Writing %d bytes to chunk!!!!!!!!!",
+		   n_bytes);
+		BUG();
+	}
+
+	new_chunk_id =
+	    yaffs_write_new_chunk(dev, buffer, &new_tags, use_reserve);
+
+	if (new_chunk_id > 0) {
+		yaffs_put_chunk_in_file(in, inode_chunk, new_chunk_id, 0);
+
+		if (prev_chunk_id > 0)
+			yaffs_chunk_del(dev, prev_chunk_id, 1, __LINE__);
+
+		yaffs_verify_file_sane(in);
+	}
+	return new_chunk_id;
+
+}
+
+
+
+static int yaffs_do_xattrib_mod(struct yaffs_obj *obj, int set,
+				const YCHAR *name, const void *value, int size,
+				int flags)
+{
+	struct yaffs_xattr_mod xmod;
+	int result;
+
+	xmod.set = set;
+	xmod.name = name;
+	xmod.data = value;
+	xmod.size = size;
+	xmod.flags = flags;
+	xmod.result = -ENOSPC;
+
+	result = yaffs_update_oh(obj, NULL, 0, 0, 0, &xmod);
+
+	if (result > 0)
+		return xmod.result;
+	else
+		return -ENOSPC;
+}
+
+static int yaffs_apply_xattrib_mod(struct yaffs_obj *obj, char *buffer,
+				   struct yaffs_xattr_mod *xmod)
+{
+	int retval = 0;
+	int x_offs = sizeof(struct yaffs_obj_hdr);
+	struct yaffs_dev *dev = obj->my_dev;
+	int x_size = dev->data_bytes_per_chunk - sizeof(struct yaffs_obj_hdr);
+	char *x_buffer = buffer + x_offs;
+
+	if (xmod->set)
+		retval =
+		    nval_set(x_buffer, x_size, xmod->name, xmod->data,
+			     xmod->size, xmod->flags);
+	else
+		retval = nval_del(x_buffer, x_size, xmod->name);
+
+	obj->has_xattr = nval_hasvalues(x_buffer, x_size);
+	obj->xattr_known = 1;
+	xmod->result = retval;
+
+	return retval;
+}
+
+static int yaffs_do_xattrib_fetch(struct yaffs_obj *obj, const YCHAR *name,
+				  void *value, int size)
+{
+	char *buffer = NULL;
+	int result;
+	struct yaffs_ext_tags tags;
+	struct yaffs_dev *dev = obj->my_dev;
+	int x_offs = sizeof(struct yaffs_obj_hdr);
+	int x_size = dev->data_bytes_per_chunk - sizeof(struct yaffs_obj_hdr);
+	char *x_buffer;
+	int retval = 0;
+
+	if (obj->hdr_chunk < 1)
+		return -ENODATA;
+
+	/* If we know that the object has no xattribs then don't do all the
+	 * reading and parsing.
+	 */
+	if (obj->xattr_known && !obj->has_xattr) {
+		if (name)
+			return -ENODATA;
+		else
+			return 0;
+	}
+
+	buffer = (char *)yaffs_get_temp_buffer(dev);
+	if (!buffer)
+		return -ENOMEM;
+
+	result =
+	    yaffs_rd_chunk_tags_nand(dev, obj->hdr_chunk, (u8 *) buffer, &tags);
+
+	if (result != YAFFS_OK)
+		retval = -ENOENT;
+	else {
+		x_buffer = buffer + x_offs;
+
+		if (!obj->xattr_known) {
+			obj->has_xattr = nval_hasvalues(x_buffer, x_size);
+			obj->xattr_known = 1;
+		}
+
+		if (name)
+			retval = nval_get(x_buffer, x_size, name, value, size);
+		else
+			retval = nval_list(x_buffer, x_size, value, size);
+	}
+	yaffs_release_temp_buffer(dev, (u8 *) buffer);
+	return retval;
+}
+
+int yaffs_set_xattrib(struct yaffs_obj *obj, const YCHAR * name,
+		      const void *value, int size, int flags)
+{
+	return yaffs_do_xattrib_mod(obj, 1, name, value, size, flags);
+}
+
+int yaffs_remove_xattrib(struct yaffs_obj *obj, const YCHAR * name)
+{
+	return yaffs_do_xattrib_mod(obj, 0, name, NULL, 0, 0);
+}
+
+int yaffs_get_xattrib(struct yaffs_obj *obj, const YCHAR * name, void *value,
+		      int size)
+{
+	return yaffs_do_xattrib_fetch(obj, name, value, size);
+}
+
+int yaffs_list_xattrib(struct yaffs_obj *obj, char *buffer, int size)
+{
+	return yaffs_do_xattrib_fetch(obj, NULL, buffer, size);
+}
+
+static void yaffs_check_obj_details_loaded(struct yaffs_obj *in)
+{
+	u8 *buf;
+	struct yaffs_obj_hdr *oh;
+	struct yaffs_dev *dev;
+	struct yaffs_ext_tags tags;
+	int result;
+	int alloc_failed = 0;
+
+	if (!in || !in->lazy_loaded || in->hdr_chunk < 1)
+		return;
+
+	dev = in->my_dev;
+	in->lazy_loaded = 0;
+	buf = yaffs_get_temp_buffer(dev);
+
+	result = yaffs_rd_chunk_tags_nand(dev, in->hdr_chunk, buf, &tags);
+	oh = (struct yaffs_obj_hdr *)buf;
+
+	in->yst_mode = oh->yst_mode;
+	yaffs_load_attribs(in, oh);
+	yaffs_set_obj_name_from_oh(in, oh);
+
+	if (in->variant_type == YAFFS_OBJECT_TYPE_SYMLINK) {
+		in->variant.symlink_variant.alias =
+		    yaffs_clone_str(oh->alias);
+		if (!in->variant.symlink_variant.alias)
+			alloc_failed = 1;	/* Not returned */
+	}
+	yaffs_release_temp_buffer(dev, buf);
+}
+
+static void yaffs_load_name_from_oh(struct yaffs_dev *dev, YCHAR *name,
+				    const YCHAR *oh_name, int buff_size)
+{
+#ifdef CONFIG_YAFFS_AUTO_UNICODE
+	if (dev->param.auto_unicode) {
+		if (*oh_name) {
+			/* It is an ASCII name, do an ASCII to
+			 * unicode conversion */
+			const char *ascii_oh_name = (const char *)oh_name;
+			int n = buff_size - 1;
+			while (n > 0 && *ascii_oh_name) {
+				*name = *ascii_oh_name;
+				name++;
+				ascii_oh_name++;
+				n--;
+			}
+		} else {
+			strncpy(name, oh_name + 1, buff_size - 1);
+		}
+	} else {
+#else
+	{
+#endif
+		strncpy(name, oh_name, buff_size - 1);
+	}
+}
+
+static void yaffs_load_oh_from_name(struct yaffs_dev *dev, YCHAR *oh_name,
+				    const YCHAR *name)
+{
+#ifdef CONFIG_YAFFS_AUTO_UNICODE
+
+	int is_ascii;
+	YCHAR *w;
+
+	if (dev->param.auto_unicode) {
+
+		is_ascii = 1;
+		w = name;
+
+		/* Figure out if the name will fit in ascii character set */
+		while (is_ascii && *w) {
+			if ((*w) & 0xff00)
+				is_ascii = 0;
+			w++;
+		}
+
+		if (is_ascii) {
+			/* It is an ASCII name, so convert unicode to ascii */
+			char *ascii_oh_name = (char *)oh_name;
+			int n = YAFFS_MAX_NAME_LENGTH - 1;
+			while (n > 0 && *name) {
+				*ascii_oh_name = *name;
+				name++;
+				ascii_oh_name++;
+				n--;
+			}
+		} else {
+			/* Unicode name, so save starting at the second YCHAR */
+			*oh_name = 0;
+			strncpy(oh_name + 1, name, YAFFS_MAX_NAME_LENGTH - 2);
+		}
+	} else {
+#else
+	{
+#endif
+		strncpy(oh_name, name, YAFFS_MAX_NAME_LENGTH - 1);
+	}
+}
+
+/* UpdateObjectHeader updates the header on NAND for an object.
+ * If name is not NULL, then that new name is used.
+ */
+int yaffs_update_oh(struct yaffs_obj *in, const YCHAR *name, int force,
+		    int is_shrink, int shadows, struct yaffs_xattr_mod *xmod)
+{
+
+	struct yaffs_block_info *bi;
+	struct yaffs_dev *dev = in->my_dev;
+	int prev_chunk_id;
+	int ret_val = 0;
+	int result = 0;
+	int new_chunk_id;
+	struct yaffs_ext_tags new_tags;
+	struct yaffs_ext_tags old_tags;
+	const YCHAR *alias = NULL;
+	u8 *buffer = NULL;
+	YCHAR old_name[YAFFS_MAX_NAME_LENGTH + 1];
+	struct yaffs_obj_hdr *oh = NULL;
+
+	strcpy(old_name, _Y("silly old name"));
+
+	if (in->fake && in != dev->root_dir && !force && !xmod)
+		return ret_val;
+
+	yaffs_check_gc(dev, 0);
+	yaffs_check_obj_details_loaded(in);
+
+	buffer = yaffs_get_temp_buffer(in->my_dev);
+	oh = (struct yaffs_obj_hdr *)buffer;
+
+	prev_chunk_id = in->hdr_chunk;
+
+	if (prev_chunk_id > 0) {
+		result = yaffs_rd_chunk_tags_nand(dev, prev_chunk_id,
+						  buffer, &old_tags);
+
+		yaffs_verify_oh(in, oh, &old_tags, 0);
+		memcpy(old_name, oh->name, sizeof(oh->name));
+		memset(buffer, 0xff, sizeof(struct yaffs_obj_hdr));
+	} else {
+		memset(buffer, 0xff, dev->data_bytes_per_chunk);
+	}
+
+	oh->type = in->variant_type;
+	oh->yst_mode = in->yst_mode;
+	oh->shadows_obj = oh->inband_shadowed_obj_id = shadows;
+
+	yaffs_load_attribs_oh(oh, in);
+
+	if (in->parent)
+		oh->parent_obj_id = in->parent->obj_id;
+	else
+		oh->parent_obj_id = 0;
+
+	if (name && *name) {
+		memset(oh->name, 0, sizeof(oh->name));
+		yaffs_load_oh_from_name(dev, oh->name, name);
+	} else if (prev_chunk_id > 0) {
+		memcpy(oh->name, old_name, sizeof(oh->name));
+	} else {
+		memset(oh->name, 0, sizeof(oh->name));
+	}
+
+	oh->is_shrink = is_shrink;
+
+	switch (in->variant_type) {
+	case YAFFS_OBJECT_TYPE_UNKNOWN:
+		/* Should not happen */
+		break;
+	case YAFFS_OBJECT_TYPE_FILE:
+		oh->file_size =
+		    (oh->parent_obj_id == YAFFS_OBJECTID_DELETED ||
+		     oh->parent_obj_id == YAFFS_OBJECTID_UNLINKED) ?
+		     0 : in->variant.file_variant.file_size;
+		break;
+	case YAFFS_OBJECT_TYPE_HARDLINK:
+		oh->equiv_id = in->variant.hardlink_variant.equiv_id;
+		break;
+	case YAFFS_OBJECT_TYPE_SPECIAL:
+		/* Do nothing */
+		break;
+	case YAFFS_OBJECT_TYPE_DIRECTORY:
+		/* Do nothing */
+		break;
+	case YAFFS_OBJECT_TYPE_SYMLINK:
+		alias = in->variant.symlink_variant.alias;
+		if (!alias)
+			alias = _Y("no alias");
+		strncpy(oh->alias, alias, YAFFS_MAX_ALIAS_LENGTH);
+		oh->alias[YAFFS_MAX_ALIAS_LENGTH] = 0;
+		break;
+	}
+
+	/* process any xattrib modifications */
+	if (xmod)
+		yaffs_apply_xattrib_mod(in, (char *)buffer, xmod);
+
+	/* Tags */
+	memset(&new_tags, 0, sizeof(new_tags));
+	in->serial++;
+	new_tags.chunk_id = 0;
+	new_tags.obj_id = in->obj_id;
+	new_tags.serial_number = in->serial;
+
+	/* Add extra info for file header */
+	new_tags.extra_available = 1;
+	new_tags.extra_parent_id = oh->parent_obj_id;
+	new_tags.extra_length = oh->file_size;
+	new_tags.extra_is_shrink = oh->is_shrink;
+	new_tags.extra_equiv_id = oh->equiv_id;
+	new_tags.extra_shadows = (oh->shadows_obj > 0) ? 1 : 0;
+	new_tags.extra_obj_type = in->variant_type;
+	yaffs_verify_oh(in, oh, &new_tags, 1);
+
+	/* Create new chunk in NAND */
+	new_chunk_id =
+	    yaffs_write_new_chunk(dev, buffer, &new_tags,
+				  (prev_chunk_id > 0) ? 1 : 0);
+
+	if (buffer)
+		yaffs_release_temp_buffer(dev, buffer);
+
+	if (new_chunk_id < 0)
+		return new_chunk_id;
+
+	in->hdr_chunk = new_chunk_id;
+
+	if (prev_chunk_id > 0)
+		yaffs_chunk_del(dev, prev_chunk_id, 1, __LINE__);
+
+	if (!yaffs_obj_cache_dirty(in))
+		in->dirty = 0;
+
+	/* If this was a shrink, then mark the block
+	 * that the chunk lives on */
+	if (is_shrink) {
+		bi = yaffs_get_block_info(in->my_dev,
+					  new_chunk_id /
+					  in->my_dev->param.chunks_per_block);
+		bi->has_shrink_hdr = 1;
+	}
+
+
+	return new_chunk_id;
+}
+
+/*--------------------- File read/write ------------------------
+ * Read and write have very similar structures.
+ * In general the read/write has three parts to it
+ * An incomplete chunk to start with (if the read/write is not chunk-aligned)
+ * Some complete chunks
+ * An incomplete chunk to end off with
+ *
+ * Curve-balls: the first chunk might also be the last chunk.
+ */
+
+int yaffs_file_rd(struct yaffs_obj *in, u8 * buffer, loff_t offset, int n_bytes)
+{
+	int chunk;
+	u32 start;
+	int n_copy;
+	int n = n_bytes;
+	int n_done = 0;
+	struct yaffs_cache *cache;
+	struct yaffs_dev *dev;
+
+	dev = in->my_dev;
+
+	while (n > 0) {
+		yaffs_addr_to_chunk(dev, offset, &chunk, &start);
+		chunk++;
+
+		/* OK now check for the curveball where the start and end are in
+		 * the same chunk.
+		 */
+		if ((start + n) < dev->data_bytes_per_chunk)
+			n_copy = n;
+		else
+			n_copy = dev->data_bytes_per_chunk - start;
+
+		cache = yaffs_find_chunk_cache(in, chunk);
+
+		/* If the chunk is already in the cache or it is less than
+		 * a whole chunk or we're using inband tags then use the cache
+		 * (if there is caching) else bypass the cache.
+		 */
+		if (cache || n_copy != dev->data_bytes_per_chunk ||
+		    dev->param.inband_tags) {
+			if (dev->param.n_caches > 0) {
+
+				/* If we can't find the data in the cache,
+				 * then load it up. */
+
+				if (!cache) {
+					cache =
+					    yaffs_grab_chunk_cache(in->my_dev);
+					cache->object = in;
+					cache->chunk_id = chunk;
+					cache->dirty = 0;
+					cache->locked = 0;
+					yaffs_rd_data_obj(in, chunk,
+							  cache->data);
+					cache->n_bytes = 0;
+				}
+
+				yaffs_use_cache(dev, cache, 0);
+
+				cache->locked = 1;
+
+				memcpy(buffer, &cache->data[start], n_copy);
+
+				cache->locked = 0;
+			} else {
+				/* Read into the local buffer then copy.. */
+
+				u8 *local_buffer =
+				    yaffs_get_temp_buffer(dev);
+				yaffs_rd_data_obj(in, chunk, local_buffer);
+
+				memcpy(buffer, &local_buffer[start], n_copy);
+
+				yaffs_release_temp_buffer(dev, local_buffer);
+			}
+		} else {
+			/* A full chunk. Read directly into the buffer. */
+			yaffs_rd_data_obj(in, chunk, buffer);
+		}
+		n -= n_copy;
+		offset += n_copy;
+		buffer += n_copy;
+		n_done += n_copy;
+	}
+	return n_done;
+}
+
+int yaffs_do_file_wr(struct yaffs_obj *in, const u8 *buffer, loff_t offset,
+		     int n_bytes, int write_trhrough)
+{
+
+	int chunk;
+	u32 start;
+	int n_copy;
+	int n = n_bytes;
+	int n_done = 0;
+	int n_writeback;
+	int start_write = offset;
+	int chunk_written = 0;
+	u32 n_bytes_read;
+	u32 chunk_start;
+	struct yaffs_dev *dev;
+
+	dev = in->my_dev;
+
+	while (n > 0 && chunk_written >= 0) {
+		yaffs_addr_to_chunk(dev, offset, &chunk, &start);
+
+		if (chunk * dev->data_bytes_per_chunk + start != offset ||
+		    start >= dev->data_bytes_per_chunk) {
+			yaffs_trace(YAFFS_TRACE_ERROR,
+				"AddrToChunk of offset %d gives chunk %d start %d",
+				(int)offset, chunk, start);
+		}
+		chunk++;	/* File pos to chunk in file offset */
+
+		/* OK now check for the curveball where the start and end are in
+		 * the same chunk.
+		 */
+
+		if ((start + n) < dev->data_bytes_per_chunk) {
+			n_copy = n;
+
+			/* Now calculate how many bytes to write back....
+			 * If we're overwriting and not writing to then end of
+			 * file then we need to write back as much as was there
+			 * before.
+			 */
+
+			chunk_start = ((chunk - 1) * dev->data_bytes_per_chunk);
+
+			if (chunk_start > in->variant.file_variant.file_size)
+				n_bytes_read = 0;	/* Past end of file */
+			else
+				n_bytes_read =
+				    in->variant.file_variant.file_size -
+				    chunk_start;
+
+			if (n_bytes_read > dev->data_bytes_per_chunk)
+				n_bytes_read = dev->data_bytes_per_chunk;
+
+			n_writeback =
+			    (n_bytes_read >
+			     (start + n)) ? n_bytes_read : (start + n);
+
+			if (n_writeback < 0 ||
+			    n_writeback > dev->data_bytes_per_chunk)
+				BUG();
+
+		} else {
+			n_copy = dev->data_bytes_per_chunk - start;
+			n_writeback = dev->data_bytes_per_chunk;
+		}
+
+		if (n_copy != dev->data_bytes_per_chunk ||
+		    dev->param.inband_tags) {
+			/* An incomplete start or end chunk (or maybe both
+			 * start and end chunk), or we're using inband tags,
+			 * so we want to use the cache buffers.
+			 */
+			if (dev->param.n_caches > 0) {
+				struct yaffs_cache *cache;
+
+				/* If we can't find the data in the cache, then
+				 * load the cache */
+				cache = yaffs_find_chunk_cache(in, chunk);
+
+				if (!cache &&
+				    yaffs_check_alloc_available(dev, 1)) {
+					cache = yaffs_grab_chunk_cache(dev);
+					cache->object = in;
+					cache->chunk_id = chunk;
+					cache->dirty = 0;
+					cache->locked = 0;
+					yaffs_rd_data_obj(in, chunk,
+							  cache->data);
+				} else if (cache &&
+					   !cache->dirty &&
+					   !yaffs_check_alloc_available(dev,
+									1)) {
+					/* Drop the cache if it was a read cache
+					 * item and no space check has been made
+					 * for it.
+					 */
+					cache = NULL;
+				}
+
+				if (cache) {
+					yaffs_use_cache(dev, cache, 1);
+					cache->locked = 1;
+
+					memcpy(&cache->data[start], buffer,
+					       n_copy);
+
+					cache->locked = 0;
+					cache->n_bytes = n_writeback;
+
+					if (write_trhrough) {
+						chunk_written =
+						    yaffs_wr_data_obj
+						    (cache->object,
+						     cache->chunk_id,
+						     cache->data,
+						     cache->n_bytes, 1);
+						cache->dirty = 0;
+					}
+				} else {
+					chunk_written = -1;	/* fail write */
+				}
+			} else {
+				/* An incomplete start or end chunk (or maybe
+				 * both start and end chunk). Read into the
+				 * local buffer then copy over and write back.
+				 */
+
+				u8 *local_buffer = yaffs_get_temp_buffer(dev);
+
+				yaffs_rd_data_obj(in, chunk, local_buffer);
+				memcpy(&local_buffer[start], buffer, n_copy);
+
+				chunk_written =
+				    yaffs_wr_data_obj(in, chunk,
+						      local_buffer,
+						      n_writeback, 0);
+
+				yaffs_release_temp_buffer(dev, local_buffer);
+			}
+		} else {
+			/* A full chunk. Write directly from the buffer. */
+
+			chunk_written =
+			    yaffs_wr_data_obj(in, chunk, buffer,
+					      dev->data_bytes_per_chunk, 0);
+
+			/* Since we've overwritten the cached data,
+			 * we better invalidate it. */
+			yaffs_invalidate_chunk_cache(in, chunk);
+		}
+
+		if (chunk_written >= 0) {
+			n -= n_copy;
+			offset += n_copy;
+			buffer += n_copy;
+			n_done += n_copy;
+		}
+	}
+
+	/* Update file object */
+
+	if ((start_write + n_done) > in->variant.file_variant.file_size)
+		in->variant.file_variant.file_size = (start_write + n_done);
+
+	in->dirty = 1;
+	return n_done;
+}
+
+int yaffs_wr_file(struct yaffs_obj *in, const u8 *buffer, loff_t offset,
+		  int n_bytes, int write_trhrough)
+{
+	yaffs2_handle_hole(in, offset);
+	return yaffs_do_file_wr(in, buffer, offset, n_bytes, write_trhrough);
+}
+
+/* ---------------------- File resizing stuff ------------------ */
+
+static void yaffs_prune_chunks(struct yaffs_obj *in, int new_size)
+{
+
+	struct yaffs_dev *dev = in->my_dev;
+	int old_size = in->variant.file_variant.file_size;
+	int i;
+	int chunk_id;
+	int last_del = 1 + (old_size - 1) / dev->data_bytes_per_chunk;
+	int start_del = 1 + (new_size + dev->data_bytes_per_chunk - 1) /
+	    dev->data_bytes_per_chunk;
+
+
+	/* Delete backwards so that we don't end up with holes if
+	 * power is lost part-way through the operation.
+	 */
+	for (i = last_del; i >= start_del; i--) {
+		/* NB this could be optimised somewhat,
+		 * eg. could retrieve the tags and write them without
+		 * using yaffs_chunk_del
+		 */
+
+		chunk_id = yaffs_find_del_file_chunk(in, i, NULL);
+
+		if (chunk_id < 1)
+			continue;
+
+		if (chunk_id <
+		    (dev->internal_start_block * dev->param.chunks_per_block) ||
+		    chunk_id >=
+		    ((dev->internal_end_block + 1) *
+		      dev->param.chunks_per_block)) {
+			yaffs_trace(YAFFS_TRACE_ALWAYS,
+				"Found daft chunk_id %d for %d",
+				chunk_id, i);
+		} else {
+			in->n_data_chunks--;
+			yaffs_chunk_del(dev, chunk_id, 1, __LINE__);
+		}
+	}
+}
+
+void yaffs_resize_file_down(struct yaffs_obj *obj, loff_t new_size)
+{
+	int new_full;
+	u32 new_partial;
+	struct yaffs_dev *dev = obj->my_dev;
+
+	yaffs_addr_to_chunk(dev, new_size, &new_full, &new_partial);
+
+	yaffs_prune_chunks(obj, new_size);
+
+	if (new_partial != 0) {
+		int last_chunk = 1 + new_full;
+		u8 *local_buffer = yaffs_get_temp_buffer(dev);
+
+		/* Rewrite the last chunk with its new size and zero pad */
+		yaffs_rd_data_obj(obj, last_chunk, local_buffer);
+		memset(local_buffer + new_partial, 0,
+		       dev->data_bytes_per_chunk - new_partial);
+
+		yaffs_wr_data_obj(obj, last_chunk, local_buffer,
+				  new_partial, 1);
+
+		yaffs_release_temp_buffer(dev, local_buffer);
+	}
+
+	obj->variant.file_variant.file_size = new_size;
+
+	yaffs_prune_tree(dev, &obj->variant.file_variant);
+}
+
+int yaffs_resize_file(struct yaffs_obj *in, loff_t new_size)
+{
+	struct yaffs_dev *dev = in->my_dev;
+	int old_size = in->variant.file_variant.file_size;
+
+	yaffs_flush_file_cache(in);
+	yaffs_invalidate_whole_cache(in);
+
+	yaffs_check_gc(dev, 0);
+
+	if (in->variant_type != YAFFS_OBJECT_TYPE_FILE)
+		return YAFFS_FAIL;
+
+	if (new_size == old_size)
+		return YAFFS_OK;
+
+	if (new_size > old_size) {
+		yaffs2_handle_hole(in, new_size);
+		in->variant.file_variant.file_size = new_size;
+	} else {
+		/* new_size < old_size */
+		yaffs_resize_file_down(in, new_size);
+	}
+
+	/* Write a new object header to reflect the resize.
+	 * show we've shrunk the file, if need be
+	 * Do this only if the file is not in the deleted directories
+	 * and is not shadowed.
+	 */
+	if (in->parent &&
+	    !in->is_shadowed &&
+	    in->parent->obj_id != YAFFS_OBJECTID_UNLINKED &&
+	    in->parent->obj_id != YAFFS_OBJECTID_DELETED)
+		yaffs_update_oh(in, NULL, 0, 0, 0, NULL);
+
+	return YAFFS_OK;
+}
+
+int yaffs_flush_file(struct yaffs_obj *in, int update_time, int data_sync)
+{
+	if (!in->dirty)
+		return YAFFS_OK;
+
+	yaffs_flush_file_cache(in);
+
+	if (data_sync)
+		return YAFFS_OK;
+
+	if (update_time)
+		yaffs_load_current_time(in, 0, 0);
+
+	return (yaffs_update_oh(in, NULL, 0, 0, 0, NULL) >= 0) ?
+				YAFFS_OK : YAFFS_FAIL;
+}
+
+
+/* yaffs_del_file deletes the whole file data
+ * and the inode associated with the file.
+ * It does not delete the links associated with the file.
+ */
+static int yaffs_unlink_file_if_needed(struct yaffs_obj *in)
+{
+	int ret_val;
+	int del_now = 0;
+	struct yaffs_dev *dev = in->my_dev;
+
+	if (!in->my_inode)
+		del_now = 1;
+
+	if (del_now) {
+		ret_val =
+		    yaffs_change_obj_name(in, in->my_dev->del_dir,
+					  _Y("deleted"), 0, 0);
+		yaffs_trace(YAFFS_TRACE_TRACING,
+			"yaffs: immediate deletion of file %d",
+			in->obj_id);
+		in->deleted = 1;
+		in->my_dev->n_deleted_files++;
+		if (dev->param.disable_soft_del || dev->param.is_yaffs2)
+			yaffs_resize_file(in, 0);
+		yaffs_soft_del_file(in);
+	} else {
+		ret_val =
+		    yaffs_change_obj_name(in, in->my_dev->unlinked_dir,
+					  _Y("unlinked"), 0, 0);
+	}
+	return ret_val;
+}
+
+int yaffs_del_file(struct yaffs_obj *in)
+{
+	int ret_val = YAFFS_OK;
+	int deleted;	/* Need to cache value on stack if in is freed */
+	struct yaffs_dev *dev = in->my_dev;
+
+	if (dev->param.disable_soft_del || dev->param.is_yaffs2)
+		yaffs_resize_file(in, 0);
+
+	if (in->n_data_chunks > 0) {
+		/* Use soft deletion if there is data in the file.
+		 * That won't be the case if it has been resized to zero.
+		 */
+		if (!in->unlinked)
+			ret_val = yaffs_unlink_file_if_needed(in);
+
+		deleted = in->deleted;
+
+		if (ret_val == YAFFS_OK && in->unlinked && !in->deleted) {
+			in->deleted = 1;
+			deleted = 1;
+			in->my_dev->n_deleted_files++;
+			yaffs_soft_del_file(in);
+		}
+		return deleted ? YAFFS_OK : YAFFS_FAIL;
+	} else {
+		/* The file has no data chunks so we toss it immediately */
+		yaffs_free_tnode(in->my_dev, in->variant.file_variant.top);
+		in->variant.file_variant.top = NULL;
+		yaffs_generic_obj_del(in);
+
+		return YAFFS_OK;
+	}
+}
+
+int yaffs_is_non_empty_dir(struct yaffs_obj *obj)
+{
+	return (obj &&
+		obj->variant_type == YAFFS_OBJECT_TYPE_DIRECTORY) &&
+		!(list_empty(&obj->variant.dir_variant.children));
+}
+
+static int yaffs_del_dir(struct yaffs_obj *obj)
+{
+	/* First check that the directory is empty. */
+	if (yaffs_is_non_empty_dir(obj))
+		return YAFFS_FAIL;
+
+	return yaffs_generic_obj_del(obj);
+}
+
+static int yaffs_del_symlink(struct yaffs_obj *in)
+{
+	kfree(in->variant.symlink_variant.alias);
+	in->variant.symlink_variant.alias = NULL;
+
+	return yaffs_generic_obj_del(in);
+}
+
+static int yaffs_del_link(struct yaffs_obj *in)
+{
+	/* remove this hardlink from the list associated with the equivalent
+	 * object
+	 */
+	list_del_init(&in->hard_links);
+	return yaffs_generic_obj_del(in);
+}
+
+int yaffs_del_obj(struct yaffs_obj *obj)
+{
+	int ret_val = -1;
+
+	switch (obj->variant_type) {
+	case YAFFS_OBJECT_TYPE_FILE:
+		ret_val = yaffs_del_file(obj);
+		break;
+	case YAFFS_OBJECT_TYPE_DIRECTORY:
+		if (!list_empty(&obj->variant.dir_variant.dirty)) {
+			yaffs_trace(YAFFS_TRACE_BACKGROUND,
+				"Remove object %d from dirty directories",
+				obj->obj_id);
+			list_del_init(&obj->variant.dir_variant.dirty);
+		}
+		return yaffs_del_dir(obj);
+		break;
+	case YAFFS_OBJECT_TYPE_SYMLINK:
+		ret_val = yaffs_del_symlink(obj);
+		break;
+	case YAFFS_OBJECT_TYPE_HARDLINK:
+		ret_val = yaffs_del_link(obj);
+		break;
+	case YAFFS_OBJECT_TYPE_SPECIAL:
+		ret_val = yaffs_generic_obj_del(obj);
+		break;
+	case YAFFS_OBJECT_TYPE_UNKNOWN:
+		ret_val = 0;
+		break;		/* should not happen. */
+	}
+	return ret_val;
+}
+
+static int yaffs_unlink_worker(struct yaffs_obj *obj)
+{
+	int del_now = 0;
+
+	if (!obj)
+		return YAFFS_FAIL;
+
+	if (!obj->my_inode)
+		del_now = 1;
+
+	yaffs_update_parent(obj->parent);
+
+	if (obj->variant_type == YAFFS_OBJECT_TYPE_HARDLINK) {
+		return yaffs_del_link(obj);
+	} else if (!list_empty(&obj->hard_links)) {
+		/* Curve ball: We're unlinking an object that has a hardlink.
+		 *
+		 * This problem arises because we are not strictly following
+		 * The Linux link/inode model.
+		 *
+		 * We can't really delete the object.
+		 * Instead, we do the following:
+		 * - Select a hardlink.
+		 * - Unhook it from the hard links
+		 * - Move it from its parent directory so that the rename works.
+		 * - Rename the object to the hardlink's name.
+		 * - Delete the hardlink
+		 */
+
+		struct yaffs_obj *hl;
+		struct yaffs_obj *parent;
+		int ret_val;
+		YCHAR name[YAFFS_MAX_NAME_LENGTH + 1];
+
+		hl = list_entry(obj->hard_links.next, struct yaffs_obj,
+				hard_links);
+
+		yaffs_get_obj_name(hl, name, YAFFS_MAX_NAME_LENGTH + 1);
+		parent = hl->parent;
+
+		list_del_init(&hl->hard_links);
+
+		yaffs_add_obj_to_dir(obj->my_dev->unlinked_dir, hl);
+
+		ret_val = yaffs_change_obj_name(obj, parent, name, 0, 0);
+
+		if (ret_val == YAFFS_OK)
+			ret_val = yaffs_generic_obj_del(hl);
+
+		return ret_val;
+
+	} else if (del_now) {
+		switch (obj->variant_type) {
+		case YAFFS_OBJECT_TYPE_FILE:
+			return yaffs_del_file(obj);
+			break;
+		case YAFFS_OBJECT_TYPE_DIRECTORY:
+			list_del_init(&obj->variant.dir_variant.dirty);
+			return yaffs_del_dir(obj);
+			break;
+		case YAFFS_OBJECT_TYPE_SYMLINK:
+			return yaffs_del_symlink(obj);
+			break;
+		case YAFFS_OBJECT_TYPE_SPECIAL:
+			return yaffs_generic_obj_del(obj);
+			break;
+		case YAFFS_OBJECT_TYPE_HARDLINK:
+		case YAFFS_OBJECT_TYPE_UNKNOWN:
+		default:
+			return YAFFS_FAIL;
+		}
+	} else if (yaffs_is_non_empty_dir(obj)) {
+		return YAFFS_FAIL;
+	} else {
+		return yaffs_change_obj_name(obj, obj->my_dev->unlinked_dir,
+						_Y("unlinked"), 0, 0);
+	}
+}
+
+static int yaffs_unlink_obj(struct yaffs_obj *obj)
+{
+	if (obj && obj->unlink_allowed)
+		return yaffs_unlink_worker(obj);
+
+	return YAFFS_FAIL;
+}
+
+int yaffs_unlinker(struct yaffs_obj *dir, const YCHAR *name)
+{
+	struct yaffs_obj *obj;
+
+	obj = yaffs_find_by_name(dir, name);
+	return yaffs_unlink_obj(obj);
+}
+
+/* Note:
+ * If old_name is NULL then we take old_dir as the object to be renamed.
+ */
+int yaffs_rename_obj(struct yaffs_obj *old_dir, const YCHAR *old_name,
+		     struct yaffs_obj *new_dir, const YCHAR *new_name)
+{
+	struct yaffs_obj *obj = NULL;
+	struct yaffs_obj *existing_target = NULL;
+	int force = 0;
+	int result;
+	struct yaffs_dev *dev;
+
+	if (!old_dir || old_dir->variant_type != YAFFS_OBJECT_TYPE_DIRECTORY) {
+		BUG();
+		return YAFFS_FAIL;
+	}
+	if (!new_dir || new_dir->variant_type != YAFFS_OBJECT_TYPE_DIRECTORY) {
+		BUG();
+		return YAFFS_FAIL;
+	}
+
+	dev = old_dir->my_dev;
+
+#ifdef CONFIG_YAFFS_CASE_INSENSITIVE
+	/* Special case for case insemsitive systems.
+	 * While look-up is case insensitive, the name isn't.
+	 * Therefore we might want to change x.txt to X.txt
+	 */
+	if (old_dir == new_dir &&
+		old_name && new_name &&
+		strcmp(old_name, new_name) == 0)
+		force = 1;
+#endif
+
+	if (strnlen(new_name, YAFFS_MAX_NAME_LENGTH + 1) >
+	    YAFFS_MAX_NAME_LENGTH)
+		/* ENAMETOOLONG */
+		return YAFFS_FAIL;
+
+	if (old_name)
+		obj = yaffs_find_by_name(old_dir, old_name);
+	else{
+		obj = old_dir;
+		old_dir = obj->parent;
+	}
+
+	if (obj && obj->rename_allowed) {
+		/* Now handle an existing target, if there is one */
+		existing_target = yaffs_find_by_name(new_dir, new_name);
+		if (yaffs_is_non_empty_dir(existing_target)) {
+			return YAFFS_FAIL;	/* ENOTEMPTY */
+		} else if (existing_target && existing_target != obj) {
+			/* Nuke the target first, using shadowing,
+			 * but only if it isn't the same object.
+			 *
+			 * Note we must disable gc here otherwise it can mess
+			 * up the shadowing.
+			 *
+			 */
+			dev->gc_disable = 1;
+			yaffs_change_obj_name(obj, new_dir, new_name, force,
+					      existing_target->obj_id);
+			existing_target->is_shadowed = 1;
+			yaffs_unlink_obj(existing_target);
+			dev->gc_disable = 0;
+		}
+
+		result = yaffs_change_obj_name(obj, new_dir, new_name, 1, 0);
+
+		yaffs_update_parent(old_dir);
+		if (new_dir != old_dir)
+			yaffs_update_parent(new_dir);
+
+		return result;
+	}
+	return YAFFS_FAIL;
+}
+
+/*----------------------- Initialisation Scanning ---------------------- */
+
+void yaffs_handle_shadowed_obj(struct yaffs_dev *dev, int obj_id,
+			       int backward_scanning)
+{
+	struct yaffs_obj *obj;
+
+	if (backward_scanning) {
+		/* Handle YAFFS2 case (backward scanning)
+		 * If the shadowed object exists then ignore.
+		 */
+		obj = yaffs_find_by_number(dev, obj_id);
+		if (obj)
+			return;
+	}
+
+	/* Let's create it (if it does not exist) assuming it is a file so that
+	 * it can do shrinking etc.
+	 * We put it in unlinked dir to be cleaned up after the scanning
+	 */
+	obj =
+	    yaffs_find_or_create_by_number(dev, obj_id, YAFFS_OBJECT_TYPE_FILE);
+	if (!obj)
+		return;
+	obj->is_shadowed = 1;
+	yaffs_add_obj_to_dir(dev->unlinked_dir, obj);
+	obj->variant.file_variant.shrink_size = 0;
+	obj->valid = 1;		/* So that we don't read any other info. */
+}
+
+void yaffs_link_fixup(struct yaffs_dev *dev, struct list_head *hard_list)
+{
+	struct list_head *lh;
+	struct list_head *save;
+	struct yaffs_obj *hl;
+	struct yaffs_obj *in;
+
+	list_for_each_safe(lh, save, hard_list) {
+		hl = list_entry(lh, struct yaffs_obj, hard_links);
+		in = yaffs_find_by_number(dev,
+					hl->variant.hardlink_variant.equiv_id);
+
+		if (in) {
+			/* Add the hardlink pointers */
+			hl->variant.hardlink_variant.equiv_obj = in;
+			list_add(&hl->hard_links, &in->hard_links);
+		} else {
+			/* Todo Need to report/handle this better.
+			 * Got a problem... hardlink to a non-existant object
+			 */
+			hl->variant.hardlink_variant.equiv_obj = NULL;
+			INIT_LIST_HEAD(&hl->hard_links);
+		}
+	}
+}
+
+static void yaffs_strip_deleted_objs(struct yaffs_dev *dev)
+{
+	/*
+	 *  Sort out state of unlinked and deleted objects after scanning.
+	 */
+	struct list_head *i;
+	struct list_head *n;
+	struct yaffs_obj *l;
+
+	if (dev->read_only)
+		return;
+
+	/* Soft delete all the unlinked files */
+	list_for_each_safe(i, n,
+			   &dev->unlinked_dir->variant.dir_variant.children) {
+		l = list_entry(i, struct yaffs_obj, siblings);
+		yaffs_del_obj(l);
+	}
+
+	list_for_each_safe(i, n, &dev->del_dir->variant.dir_variant.children) {
+		l = list_entry(i, struct yaffs_obj, siblings);
+		yaffs_del_obj(l);
+	}
+}
+
+/*
+ * This code iterates through all the objects making sure that they are rooted.
+ * Any unrooted objects are re-rooted in lost+found.
+ * An object needs to be in one of:
+ * - Directly under deleted, unlinked
+ * - Directly or indirectly under root.
+ *
+ * Note:
+ *  This code assumes that we don't ever change the current relationships
+ *  between directories:
+ *   root_dir->parent == unlinked_dir->parent == del_dir->parent == NULL
+ *   lost-n-found->parent == root_dir
+ *
+ * This fixes the problem where directories might have inadvertently been
+ * deleted leaving the object "hanging" without being rooted in the
+ * directory tree.
+ */
+
+static int yaffs_has_null_parent(struct yaffs_dev *dev, struct yaffs_obj *obj)
+{
+	return (obj == dev->del_dir ||
+		obj == dev->unlinked_dir || obj == dev->root_dir);
+}
+
+static void yaffs_fix_hanging_objs(struct yaffs_dev *dev)
+{
+	struct yaffs_obj *obj;
+	struct yaffs_obj *parent;
+	int i;
+	struct list_head *lh;
+	struct list_head *n;
+	int depth_limit;
+	int hanging;
+
+	if (dev->read_only)
+		return;
+
+	/* Iterate through the objects in each hash entry,
+	 * looking at each object.
+	 * Make sure it is rooted.
+	 */
+
+	for (i = 0; i < YAFFS_NOBJECT_BUCKETS; i++) {
+		list_for_each_safe(lh, n, &dev->obj_bucket[i].list) {
+			obj = list_entry(lh, struct yaffs_obj, hash_link);
+			parent = obj->parent;
+
+			if (yaffs_has_null_parent(dev, obj)) {
+				/* These directories are not hanging */
+				hanging = 0;
+			} else if (!parent ||
+				   parent->variant_type !=
+				   YAFFS_OBJECT_TYPE_DIRECTORY) {
+				hanging = 1;
+			} else if (yaffs_has_null_parent(dev, parent)) {
+				hanging = 0;
+			} else {
+				/*
+				 * Need to follow the parent chain to
+				 * see if it is hanging.
+				 */
+				hanging = 0;
+				depth_limit = 100;
+
+				while (parent != dev->root_dir &&
+				       parent->parent &&
+				       parent->parent->variant_type ==
+				       YAFFS_OBJECT_TYPE_DIRECTORY &&
+				       depth_limit > 0) {
+					parent = parent->parent;
+					depth_limit--;
+				}
+				if (parent != dev->root_dir)
+					hanging = 1;
+			}
+			if (hanging) {
+				yaffs_trace(YAFFS_TRACE_SCAN,
+					"Hanging object %d moved to lost and found",
+					obj->obj_id);
+				yaffs_add_obj_to_dir(dev->lost_n_found, obj);
+			}
+		}
+	}
+}
+
+/*
+ * Delete directory contents for cleaning up lost and found.
+ */
+static void yaffs_del_dir_contents(struct yaffs_obj *dir)
+{
+	struct yaffs_obj *obj;
+	struct list_head *lh;
+	struct list_head *n;
+
+	if (dir->variant_type != YAFFS_OBJECT_TYPE_DIRECTORY)
+		BUG();
+
+	list_for_each_safe(lh, n, &dir->variant.dir_variant.children) {
+		obj = list_entry(lh, struct yaffs_obj, siblings);
+		if (obj->variant_type == YAFFS_OBJECT_TYPE_DIRECTORY)
+			yaffs_del_dir_contents(obj);
+		yaffs_trace(YAFFS_TRACE_SCAN,
+			"Deleting lost_found object %d",
+			obj->obj_id);
+		yaffs_unlink_obj(obj);
+	}
+}
+
+static void yaffs_empty_l_n_f(struct yaffs_dev *dev)
+{
+	yaffs_del_dir_contents(dev->lost_n_found);
+}
+
+
+struct yaffs_obj *yaffs_find_by_name(struct yaffs_obj *directory,
+				     const YCHAR *name)
+{
+	int sum;
+	struct list_head *i;
+	YCHAR buffer[YAFFS_MAX_NAME_LENGTH + 1];
+	struct yaffs_obj *l;
+
+	if (!name)
+		return NULL;
+
+	if (!directory) {
+		yaffs_trace(YAFFS_TRACE_ALWAYS,
+			"tragedy: yaffs_find_by_name: null pointer directory"
+			);
+		BUG();
+		return NULL;
+	}
+	if (directory->variant_type != YAFFS_OBJECT_TYPE_DIRECTORY) {
+		yaffs_trace(YAFFS_TRACE_ALWAYS,
+			"tragedy: yaffs_find_by_name: non-directory"
+			);
+		BUG();
+	}
+
+	sum = yaffs_calc_name_sum(name);
+
+	list_for_each(i, &directory->variant.dir_variant.children) {
+		l = list_entry(i, struct yaffs_obj, siblings);
+
+		if (l->parent != directory)
+			BUG();
+
+		yaffs_check_obj_details_loaded(l);
+
+		/* Special case for lost-n-found */
+		if (l->obj_id == YAFFS_OBJECTID_LOSTNFOUND) {
+			if (!strcmp(name, YAFFS_LOSTNFOUND_NAME))
+				return l;
+		} else if (l->sum == sum || l->hdr_chunk <= 0) {
+			/* LostnFound chunk called Objxxx
+			 * Do a real check
+			 */
+			yaffs_get_obj_name(l, buffer,
+				YAFFS_MAX_NAME_LENGTH + 1);
+			if (strncmp(name, buffer, YAFFS_MAX_NAME_LENGTH) == 0)
+				return l;
+		}
+	}
+	return NULL;
+}
+
+/* GetEquivalentObject dereferences any hard links to get to the
+ * actual object.
+ */
+
+struct yaffs_obj *yaffs_get_equivalent_obj(struct yaffs_obj *obj)
+{
+	if (obj && obj->variant_type == YAFFS_OBJECT_TYPE_HARDLINK) {
+		obj = obj->variant.hardlink_variant.equiv_obj;
+		yaffs_check_obj_details_loaded(obj);
+	}
+	return obj;
+}
+
+/*
+ *  A note or two on object names.
+ *  * If the object name is missing, we then make one up in the form objnnn
+ *
+ *  * ASCII names are stored in the object header's name field from byte zero
+ *  * Unicode names are historically stored starting from byte zero.
+ *
+ * Then there are automatic Unicode names...
+ * The purpose of these is to save names in a way that can be read as
+ * ASCII or Unicode names as appropriate, thus allowing a Unicode and ASCII
+ * system to share files.
+ *
+ * These automatic unicode are stored slightly differently...
+ *  - If the name can fit in the ASCII character space then they are saved as
+ *    ascii names as per above.
+ *  - If the name needs Unicode then the name is saved in Unicode
+ *    starting at oh->name[1].
+
+ */
+static void yaffs_fix_null_name(struct yaffs_obj *obj, YCHAR *name,
+				int buffer_size)
+{
+	/* Create an object name if we could not find one. */
+	if (strnlen(name, YAFFS_MAX_NAME_LENGTH) == 0) {
+		YCHAR local_name[20];
+		YCHAR num_string[20];
+		YCHAR *x = &num_string[19];
+		unsigned v = obj->obj_id;
+		num_string[19] = 0;
+		while (v > 0) {
+			x--;
+			*x = '0' + (v % 10);
+			v /= 10;
+		}
+		/* make up a name */
+		strcpy(local_name, YAFFS_LOSTNFOUND_PREFIX);
+		strcat(local_name, x);
+		strncpy(name, local_name, buffer_size - 1);
+	}
+}
+
+int yaffs_get_obj_name(struct yaffs_obj *obj, YCHAR *name, int buffer_size)
+{
+	memset(name, 0, buffer_size * sizeof(YCHAR));
+	yaffs_check_obj_details_loaded(obj);
+	if (obj->obj_id == YAFFS_OBJECTID_LOSTNFOUND) {
+		strncpy(name, YAFFS_LOSTNFOUND_NAME, buffer_size - 1);
+	} else if (obj->short_name[0]) {
+		strcpy(name, obj->short_name);
+	} else if (obj->hdr_chunk > 0) {
+		int result;
+		u8 *buffer = yaffs_get_temp_buffer(obj->my_dev);
+
+		struct yaffs_obj_hdr *oh = (struct yaffs_obj_hdr *)buffer;
+
+		memset(buffer, 0, obj->my_dev->data_bytes_per_chunk);
+
+		if (obj->hdr_chunk > 0) {
+			result = yaffs_rd_chunk_tags_nand(obj->my_dev,
+							  obj->hdr_chunk,
+							  buffer, NULL);
+		}
+		yaffs_load_name_from_oh(obj->my_dev, name, oh->name,
+					buffer_size);
+
+		yaffs_release_temp_buffer(obj->my_dev, buffer);
+	}
+
+	yaffs_fix_null_name(obj, name, buffer_size);
+
+	return strnlen(name, YAFFS_MAX_NAME_LENGTH);
+}
+
+int yaffs_get_obj_length(struct yaffs_obj *obj)
+{
+	/* Dereference any hard linking */
+	obj = yaffs_get_equivalent_obj(obj);
+
+	if (obj->variant_type == YAFFS_OBJECT_TYPE_FILE)
+		return obj->variant.file_variant.file_size;
+	if (obj->variant_type == YAFFS_OBJECT_TYPE_SYMLINK) {
+		if (!obj->variant.symlink_variant.alias)
+			return 0;
+		return strnlen(obj->variant.symlink_variant.alias,
+				     YAFFS_MAX_ALIAS_LENGTH);
+	} else {
+		/* Only a directory should drop through to here */
+		return obj->my_dev->data_bytes_per_chunk;
+	}
+}
+
+int yaffs_get_obj_link_count(struct yaffs_obj *obj)
+{
+	int count = 0;
+	struct list_head *i;
+
+	if (!obj->unlinked)
+		count++;	/* the object itself */
+
+	list_for_each(i, &obj->hard_links)
+	    count++;		/* add the hard links; */
+
+	return count;
+}
+
+int yaffs_get_obj_inode(struct yaffs_obj *obj)
+{
+	obj = yaffs_get_equivalent_obj(obj);
+
+	return obj->obj_id;
+}
+
+unsigned yaffs_get_obj_type(struct yaffs_obj *obj)
+{
+	obj = yaffs_get_equivalent_obj(obj);
+
+	switch (obj->variant_type) {
+	case YAFFS_OBJECT_TYPE_FILE:
+		return DT_REG;
+		break;
+	case YAFFS_OBJECT_TYPE_DIRECTORY:
+		return DT_DIR;
+		break;
+	case YAFFS_OBJECT_TYPE_SYMLINK:
+		return DT_LNK;
+		break;
+	case YAFFS_OBJECT_TYPE_HARDLINK:
+		return DT_REG;
+		break;
+	case YAFFS_OBJECT_TYPE_SPECIAL:
+		if (S_ISFIFO(obj->yst_mode))
+			return DT_FIFO;
+		if (S_ISCHR(obj->yst_mode))
+			return DT_CHR;
+		if (S_ISBLK(obj->yst_mode))
+			return DT_BLK;
+		if (S_ISSOCK(obj->yst_mode))
+			return DT_SOCK;
+		return DT_REG;
+		break;
+	default:
+		return DT_REG;
+		break;
+	}
+}
+
+YCHAR *yaffs_get_symlink_alias(struct yaffs_obj *obj)
+{
+	obj = yaffs_get_equivalent_obj(obj);
+	if (obj->variant_type == YAFFS_OBJECT_TYPE_SYMLINK)
+		return yaffs_clone_str(obj->variant.symlink_variant.alias);
+	else
+		return yaffs_clone_str(_Y(""));
+}
+
+/*--------------------------- Initialisation code -------------------------- */
+
+static int yaffs_check_dev_fns(const struct yaffs_dev *dev)
+{
+	/* Common functions, gotta have */
+	if (!dev->param.erase_fn || !dev->param.initialise_flash_fn)
+		return 0;
+
+	/* Can use the "with tags" style interface for yaffs1 or yaffs2 */
+	if (dev->param.write_chunk_tags_fn &&
+	    dev->param.read_chunk_tags_fn &&
+	    !dev->param.write_chunk_fn &&
+	    !dev->param.read_chunk_fn &&
+	    dev->param.bad_block_fn && dev->param.query_block_fn)
+		return 1;
+
+	/* Can use the "spare" style interface for yaffs1 */
+	if (!dev->param.is_yaffs2 &&
+	    !dev->param.write_chunk_tags_fn &&
+	    !dev->param.read_chunk_tags_fn &&
+	    dev->param.write_chunk_fn &&
+	    dev->param.read_chunk_fn &&
+	    !dev->param.bad_block_fn && !dev->param.query_block_fn)
+		return 1;
+
+	return 0;		/* bad */
+}
+
+static int yaffs_create_initial_dir(struct yaffs_dev *dev)
+{
+	/* Initialise the unlinked, deleted, root and lost+found directories */
+	dev->lost_n_found = dev->root_dir = NULL;
+	dev->unlinked_dir = dev->del_dir = NULL;
+	dev->unlinked_dir =
+	    yaffs_create_fake_dir(dev, YAFFS_OBJECTID_UNLINKED, S_IFDIR);
+	dev->del_dir =
+	    yaffs_create_fake_dir(dev, YAFFS_OBJECTID_DELETED, S_IFDIR);
+	dev->root_dir =
+	    yaffs_create_fake_dir(dev, YAFFS_OBJECTID_ROOT,
+				  YAFFS_ROOT_MODE | S_IFDIR);
+	dev->lost_n_found =
+	    yaffs_create_fake_dir(dev, YAFFS_OBJECTID_LOSTNFOUND,
+				  YAFFS_LOSTNFOUND_MODE | S_IFDIR);
+
+	if (dev->lost_n_found && dev->root_dir && dev->unlinked_dir
+	    && dev->del_dir) {
+		yaffs_add_obj_to_dir(dev->root_dir, dev->lost_n_found);
+		return YAFFS_OK;
+	}
+	return YAFFS_FAIL;
+}
+
+int yaffs_guts_initialise(struct yaffs_dev *dev)
+{
+	int init_failed = 0;
+	unsigned x;
+	int bits;
+
+	yaffs_trace(YAFFS_TRACE_TRACING, "yaffs: yaffs_guts_initialise()");
+
+	/* Check stuff that must be set */
+
+	if (!dev) {
+		yaffs_trace(YAFFS_TRACE_ALWAYS,
+			"yaffs: Need a device"
+			);
+		return YAFFS_FAIL;
+	}
+
+	if (dev->is_mounted) {
+		yaffs_trace(YAFFS_TRACE_ALWAYS, "device already mounted");
+		return YAFFS_FAIL;
+	}
+
+	dev->internal_start_block = dev->param.start_block;
+	dev->internal_end_block = dev->param.end_block;
+	dev->block_offset = 0;
+	dev->chunk_offset = 0;
+	dev->n_free_chunks = 0;
+
+	dev->gc_block = 0;
+
+	if (dev->param.start_block == 0) {
+		dev->internal_start_block = dev->param.start_block + 1;
+		dev->internal_end_block = dev->param.end_block + 1;
+		dev->block_offset = 1;
+		dev->chunk_offset = dev->param.chunks_per_block;
+	}
+
+	/* Check geometry parameters. */
+
+	if ((!dev->param.inband_tags && dev->param.is_yaffs2 &&
+		dev->param.total_bytes_per_chunk < 1024) ||
+		(!dev->param.is_yaffs2 &&
+			dev->param.total_bytes_per_chunk < 512) ||
+		(dev->param.inband_tags && !dev->param.is_yaffs2) ||
+		 dev->param.chunks_per_block < 2 ||
+		 dev->param.n_reserved_blocks < 2 ||
+		dev->internal_start_block <= 0 ||
+		dev->internal_end_block <= 0 ||
+		dev->internal_end_block <=
+		(dev->internal_start_block + dev->param.n_reserved_blocks + 2)
+		) {
+		/* otherwise it is too small */
+		yaffs_trace(YAFFS_TRACE_ALWAYS,
+			"NAND geometry problems: chunk size %d, type is yaffs%s, inband_tags %d ",
+			dev->param.total_bytes_per_chunk,
+			dev->param.is_yaffs2 ? "2" : "",
+			dev->param.inband_tags);
+		return YAFFS_FAIL;
+	}
+
+	if (yaffs_init_nand(dev) != YAFFS_OK) {
+		yaffs_trace(YAFFS_TRACE_ALWAYS, "InitialiseNAND failed");
+		return YAFFS_FAIL;
+	}
+
+	/* Sort out space for inband tags, if required */
+	if (dev->param.inband_tags)
+		dev->data_bytes_per_chunk =
+		    dev->param.total_bytes_per_chunk -
+		    sizeof(struct yaffs_packed_tags2_tags_only);
+	else
+		dev->data_bytes_per_chunk = dev->param.total_bytes_per_chunk;
+
+	/* Got the right mix of functions? */
+	if (!yaffs_check_dev_fns(dev)) {
+		/* Function missing */
+		yaffs_trace(YAFFS_TRACE_ALWAYS,
+			"device function(s) missing or wrong");
+
+		return YAFFS_FAIL;
+	}
+
+	/* Finished with most checks. Further checks happen later on too. */
+
+	dev->is_mounted = 1;
+
+	/* OK now calculate a few things for the device */
+
+	/*
+	 *  Calculate all the chunk size manipulation numbers:
+	 */
+	x = dev->data_bytes_per_chunk;
+	/* We always use dev->chunk_shift and dev->chunk_div */
+	dev->chunk_shift = calc_shifts(x);
+	x >>= dev->chunk_shift;
+	dev->chunk_div = x;
+	/* We only use chunk mask if chunk_div is 1 */
+	dev->chunk_mask = (1 << dev->chunk_shift) - 1;
+
+	/*
+	 * Calculate chunk_grp_bits.
+	 * We need to find the next power of 2 > than internal_end_block
+	 */
+
+	x = dev->param.chunks_per_block * (dev->internal_end_block + 1);
+
+	bits = calc_shifts_ceiling(x);
+
+	/* Set up tnode width if wide tnodes are enabled. */
+	if (!dev->param.wide_tnodes_disabled) {
+		/* bits must be even so that we end up with 32-bit words */
+		if (bits & 1)
+			bits++;
+		if (bits < 16)
+			dev->tnode_width = 16;
+		else
+			dev->tnode_width = bits;
+	} else {
+		dev->tnode_width = 16;
+	}
+
+	dev->tnode_mask = (1 << dev->tnode_width) - 1;
+
+	/* Level0 Tnodes are 16 bits or wider (if wide tnodes are enabled),
+	 * so if the bitwidth of the
+	 * chunk range we're using is greater than 16 we need
+	 * to figure out chunk shift and chunk_grp_size
+	 */
+
+	if (bits <= dev->tnode_width)
+		dev->chunk_grp_bits = 0;
+	else
+		dev->chunk_grp_bits = bits - dev->tnode_width;
+
+	dev->tnode_size = (dev->tnode_width * YAFFS_NTNODES_LEVEL0) / 8;
+	if (dev->tnode_size < sizeof(struct yaffs_tnode))
+		dev->tnode_size = sizeof(struct yaffs_tnode);
+
+	dev->chunk_grp_size = 1 << dev->chunk_grp_bits;
+
+	if (dev->param.chunks_per_block < dev->chunk_grp_size) {
+		/* We have a problem because the soft delete won't work if
+		 * the chunk group size > chunks per block.
+		 * This can be remedied by using larger "virtual blocks".
+		 */
+		yaffs_trace(YAFFS_TRACE_ALWAYS, "chunk group too large");
+
+		return YAFFS_FAIL;
+	}
+
+	/* Finished verifying the device, continue with initialisation */
+
+	/* More device initialisation */
+	dev->all_gcs = 0;
+	dev->passive_gc_count = 0;
+	dev->oldest_dirty_gc_count = 0;
+	dev->bg_gcs = 0;
+	dev->gc_block_finder = 0;
+	dev->buffered_block = -1;
+	dev->doing_buffered_block_rewrite = 0;
+	dev->n_deleted_files = 0;
+	dev->n_bg_deletions = 0;
+	dev->n_unlinked_files = 0;
+	dev->n_ecc_fixed = 0;
+	dev->n_ecc_unfixed = 0;
+	dev->n_tags_ecc_fixed = 0;
+	dev->n_tags_ecc_unfixed = 0;
+	dev->n_erase_failures = 0;
+	dev->n_erased_blocks = 0;
+	dev->gc_disable = 0;
+	dev->has_pending_prioritised_gc = 1;
+		/* Assume the worst for now, will get fixed on first GC */
+	INIT_LIST_HEAD(&dev->dirty_dirs);
+	dev->oldest_dirty_seq = 0;
+	dev->oldest_dirty_block = 0;
+
+	/* Initialise temporary buffers and caches. */
+	if (!yaffs_init_tmp_buffers(dev))
+		init_failed = 1;
+
+	dev->cache = NULL;
+	dev->gc_cleanup_list = NULL;
+
+	if (!init_failed && dev->param.n_caches > 0) {
+		int i;
+		void *buf;
+		int cache_bytes =
+		    dev->param.n_caches * sizeof(struct yaffs_cache);
+
+		if (dev->param.n_caches > YAFFS_MAX_SHORT_OP_CACHES)
+			dev->param.n_caches = YAFFS_MAX_SHORT_OP_CACHES;
+
+		dev->cache = kmalloc(cache_bytes, GFP_NOFS);
+
+		buf = (u8 *) dev->cache;
+
+		if (dev->cache)
+			memset(dev->cache, 0, cache_bytes);
+
+		for (i = 0; i < dev->param.n_caches && buf; i++) {
+			dev->cache[i].object = NULL;
+			dev->cache[i].last_use = 0;
+			dev->cache[i].dirty = 0;
+			dev->cache[i].data = buf =
+			    kmalloc(dev->param.total_bytes_per_chunk, GFP_NOFS);
+		}
+		if (!buf)
+			init_failed = 1;
+
+		dev->cache_last_use = 0;
+	}
+
+	dev->cache_hits = 0;
+
+	if (!init_failed) {
+		dev->gc_cleanup_list =
+		    kmalloc(dev->param.chunks_per_block * sizeof(u32),
+					GFP_NOFS);
+		if (!dev->gc_cleanup_list)
+			init_failed = 1;
+	}
+
+	if (dev->param.is_yaffs2)
+		dev->param.use_header_file_size = 1;
+
+	if (!init_failed && !yaffs_init_blocks(dev))
+		init_failed = 1;
+
+	yaffs_init_tnodes_and_objs(dev);
+
+	if (!init_failed && !yaffs_create_initial_dir(dev))
+		init_failed = 1;
+
+	if(!init_failed && dev->param.is_yaffs2 &&
+		!dev->param.disable_summary &&
+		!yaffs_summary_init(dev))
+		init_failed = 1;
+
+	if (!init_failed) {
+		/* Now scan the flash. */
+		if (dev->param.is_yaffs2) {
+			if (yaffs2_checkpt_restore(dev)) {
+				yaffs_check_obj_details_loaded(dev->root_dir);
+				yaffs_trace(YAFFS_TRACE_CHECKPOINT |
+					YAFFS_TRACE_MOUNT,
+					"yaffs: restored from checkpoint"
+					);
+			} else {
+
+				/* Clean up the mess caused by an aborted
+				 * checkpoint load then scan backwards.
+				 */
+				yaffs_deinit_blocks(dev);
+
+				yaffs_deinit_tnodes_and_objs(dev);
+
+				dev->n_erased_blocks = 0;
+				dev->n_free_chunks = 0;
+				dev->alloc_block = -1;
+				dev->alloc_page = -1;
+				dev->n_deleted_files = 0;
+				dev->n_unlinked_files = 0;
+				dev->n_bg_deletions = 0;
+
+				if (!init_failed && !yaffs_init_blocks(dev))
+					init_failed = 1;
+
+				yaffs_init_tnodes_and_objs(dev);
+
+				if (!init_failed
+				    && !yaffs_create_initial_dir(dev))
+					init_failed = 1;
+
+				if (!init_failed && !yaffs2_scan_backwards(dev))
+					init_failed = 1;
+			}
+		} else if (!yaffs1_scan(dev)) {
+			init_failed = 1;
+		}
+
+		yaffs_strip_deleted_objs(dev);
+		yaffs_fix_hanging_objs(dev);
+		if (dev->param.empty_lost_n_found)
+			yaffs_empty_l_n_f(dev);
+	}
+
+	if (init_failed) {
+		/* Clean up the mess */
+		yaffs_trace(YAFFS_TRACE_TRACING,
+		  "yaffs: yaffs_guts_initialise() aborted.");
+
+		yaffs_deinitialise(dev);
+		return YAFFS_FAIL;
+	}
+
+	/* Zero out stats */
+	dev->n_page_reads = 0;
+	dev->n_page_writes = 0;
+	dev->n_erasures = 0;
+	dev->n_gc_copies = 0;
+	dev->n_retried_writes = 0;
+
+	dev->n_retired_blocks = 0;
+
+	yaffs_verify_free_chunks(dev);
+	yaffs_verify_blocks(dev);
+
+	/* Clean up any aborted checkpoint data */
+	if (!dev->is_checkpointed && dev->blocks_in_checkpt > 0)
+		yaffs2_checkpt_invalidate(dev);
+
+	yaffs_trace(YAFFS_TRACE_TRACING,
+	  "yaffs: yaffs_guts_initialise() done.");
+	return YAFFS_OK;
+}
+
+void yaffs_deinitialise(struct yaffs_dev *dev)
+{
+	if (dev->is_mounted) {
+		int i;
+
+		yaffs_deinit_blocks(dev);
+		yaffs_deinit_tnodes_and_objs(dev);
+		yaffs_summary_deinit(dev);
+
+		if (dev->param.n_caches > 0 && dev->cache) {
+
+			for (i = 0; i < dev->param.n_caches; i++) {
+				kfree(dev->cache[i].data);
+				dev->cache[i].data = NULL;
+			}
+
+			kfree(dev->cache);
+			dev->cache = NULL;
+		}
+
+		kfree(dev->gc_cleanup_list);
+
+		for (i = 0; i < YAFFS_N_TEMP_BUFFERS; i++)
+			kfree(dev->temp_buffer[i].buffer);
+
+		dev->is_mounted = 0;
+
+		if (dev->param.deinitialise_flash_fn)
+			dev->param.deinitialise_flash_fn(dev);
+	}
+}
+
+int yaffs_count_free_chunks(struct yaffs_dev *dev)
+{
+	int n_free = 0;
+	int b;
+	struct yaffs_block_info *blk;
+
+	blk = dev->block_info;
+	for (b = dev->internal_start_block; b <= dev->internal_end_block; b++) {
+		switch (blk->block_state) {
+		case YAFFS_BLOCK_STATE_EMPTY:
+		case YAFFS_BLOCK_STATE_ALLOCATING:
+		case YAFFS_BLOCK_STATE_COLLECTING:
+		case YAFFS_BLOCK_STATE_FULL:
+			n_free +=
+			    (dev->param.chunks_per_block - blk->pages_in_use +
+			     blk->soft_del_pages);
+			break;
+		default:
+			break;
+		}
+		blk++;
+	}
+	return n_free;
+}
+
+int yaffs_get_n_free_chunks(struct yaffs_dev *dev)
+{
+	/* This is what we report to the outside world */
+	int n_free;
+	int n_dirty_caches;
+	int blocks_for_checkpt;
+	int i;
+
+	n_free = dev->n_free_chunks;
+	n_free += dev->n_deleted_files;
+
+	/* Now count and subtract the number of dirty chunks in the cache. */
+
+	for (n_dirty_caches = 0, i = 0; i < dev->param.n_caches; i++) {
+		if (dev->cache[i].dirty)
+			n_dirty_caches++;
+	}
+
+	n_free -= n_dirty_caches;
+
+	n_free -=
+	    ((dev->param.n_reserved_blocks + 1) * dev->param.chunks_per_block);
+
+	/* Now figure checkpoint space and report that... */
+	blocks_for_checkpt = yaffs_calc_checkpt_blocks_required(dev);
+
+	n_free -= (blocks_for_checkpt * dev->param.chunks_per_block);
+
+	if (n_free < 0)
+		n_free = 0;
+
+	return n_free;
+}
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_guts.h linux-3.0.82x/fs/yaffs2/yaffs_guts.h
--- linux-3.0.82/fs/yaffs2/yaffs_guts.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_guts.h	2017-09-23 03:42:50.302674195 +0800
@@ -0,0 +1,938 @@
+/*
+ * YAFFS: Yet another Flash File System . A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1 as
+ * published by the Free Software Foundation.
+ *
+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
+ */
+
+#ifndef __YAFFS_GUTS_H__
+#define __YAFFS_GUTS_H__
+
+#include "yportenv.h"
+
+#define YAFFS_OK	1
+#define YAFFS_FAIL  0
+
+/* Give us a  Y=0x59,
+ * Give us an A=0x41,
+ * Give us an FF=0xff
+ * Give us an S=0x53
+ * And what have we got...
+ */
+#define YAFFS_MAGIC			0x5941ff53
+
+#define YAFFS_NTNODES_LEVEL0		16
+#define YAFFS_TNODES_LEVEL0_BITS	4
+#define YAFFS_TNODES_LEVEL0_MASK	0xf
+
+#define YAFFS_NTNODES_INTERNAL		(YAFFS_NTNODES_LEVEL0 / 2)
+#define YAFFS_TNODES_INTERNAL_BITS	(YAFFS_TNODES_LEVEL0_BITS - 1)
+#define YAFFS_TNODES_INTERNAL_MASK	0x7
+#define YAFFS_TNODES_MAX_LEVEL		6
+
+
+/* Constants for YAFFS1 mode */
+#define YAFFS_BYTES_PER_SPARE		16
+#define YAFFS_BYTES_PER_CHUNK		512
+#define YAFFS_CHUNK_SIZE_SHIFT		9
+#define YAFFS_CHUNKS_PER_BLOCK		32
+#define YAFFS_BYTES_PER_BLOCK	(YAFFS_CHUNKS_PER_BLOCK*YAFFS_BYTES_PER_CHUNK)
+
+#define YAFFS_MIN_YAFFS2_CHUNK_SIZE	1024
+#define YAFFS_MIN_YAFFS2_SPARE_SIZE	32
+
+#define YAFFS_MAX_CHUNK_ID		0x000fffff
+
+#define YAFFS_ALLOCATION_NOBJECTS	100
+#define YAFFS_ALLOCATION_NTNODES	100
+#define YAFFS_ALLOCATION_NLINKS		100
+
+#define YAFFS_NOBJECT_BUCKETS		256
+
+#define YAFFS_OBJECT_SPACE		0x40000
+#define YAFFS_MAX_OBJECT_ID		(YAFFS_OBJECT_SPACE - 1)
+
+#define YAFFS_CHECKPOINT_VERSION	4
+
+#ifdef CONFIG_YAFFS_UNICODE
+#define YAFFS_MAX_NAME_LENGTH		127
+#define YAFFS_MAX_ALIAS_LENGTH		79
+#else
+#define YAFFS_MAX_NAME_LENGTH		255
+#define YAFFS_MAX_ALIAS_LENGTH		159
+#endif
+
+#define YAFFS_SHORT_NAME_LENGTH		15
+
+/* Some special object ids for pseudo objects */
+#define YAFFS_OBJECTID_ROOT		1
+#define YAFFS_OBJECTID_LOSTNFOUND	2
+#define YAFFS_OBJECTID_UNLINKED		3
+#define YAFFS_OBJECTID_DELETED		4
+
+/* Fake object Id for summary data */
+#define YAFFS_OBJECTID_SUMMARY		0x10
+
+/* Pseudo object ids for checkpointing */
+#define YAFFS_OBJECTID_CHECKPOINT_DATA	0x20
+#define YAFFS_SEQUENCE_CHECKPOINT_DATA	0x21
+
+#define YAFFS_MAX_SHORT_OP_CACHES	20
+
+#define YAFFS_N_TEMP_BUFFERS		6
+
+/* We limit the number attempts at sucessfully saving a chunk of data.
+ * Small-page devices have 32 pages per block; large-page devices have 64.
+ * Default to something in the order of 5 to 10 blocks worth of chunks.
+ */
+#define YAFFS_WR_ATTEMPTS		(5*64)
+
+/* Sequence numbers are used in YAFFS2 to determine block allocation order.
+ * The range is limited slightly to help distinguish bad numbers from good.
+ * This also allows us to perhaps in the future use special numbers for
+ * special purposes.
+ * EFFFFF00 allows the allocation of 8 blocks/second (~1Mbytes) for 15 years,
+ * and is a larger number than the lifetime of a 2GB device.
+ */
+#define YAFFS_LOWEST_SEQUENCE_NUMBER	0x00001000
+#define YAFFS_HIGHEST_SEQUENCE_NUMBER	0xefffff00
+
+/* Special sequence number for bad block that failed to be marked bad */
+#define YAFFS_SEQUENCE_BAD_BLOCK	0xffff0000
+
+/* ChunkCache is used for short read/write operations.*/
+struct yaffs_cache {
+	struct yaffs_obj *object;
+	int chunk_id;
+	int last_use;
+	int dirty;
+	int n_bytes;		/* Only valid if the cache is dirty */
+	int locked;		/* Can't push out or flush while locked. */
+	u8 *data;
+};
+
+/* yaffs1 tags structures in RAM
+ * NB This uses bitfield. Bitfields should not straddle a u32 boundary
+ * otherwise the structure size will get blown out.
+ */
+
+struct yaffs_tags {
+	unsigned chunk_id:20;
+	unsigned serial_number:2;
+	unsigned n_bytes_lsb:10;
+	unsigned obj_id:18;
+	unsigned ecc:12;
+	unsigned n_bytes_msb:2;
+};
+
+union yaffs_tags_union {
+	struct yaffs_tags as_tags;
+	u8 as_bytes[8];
+};
+
+
+/* Stuff used for extended tags in YAFFS2 */
+
+enum yaffs_ecc_result {
+	YAFFS_ECC_RESULT_UNKNOWN,
+	YAFFS_ECC_RESULT_NO_ERROR,
+	YAFFS_ECC_RESULT_FIXED,
+	YAFFS_ECC_RESULT_UNFIXED
+};
+
+enum yaffs_obj_type {
+	YAFFS_OBJECT_TYPE_UNKNOWN,
+	YAFFS_OBJECT_TYPE_FILE,
+	YAFFS_OBJECT_TYPE_SYMLINK,
+	YAFFS_OBJECT_TYPE_DIRECTORY,
+	YAFFS_OBJECT_TYPE_HARDLINK,
+	YAFFS_OBJECT_TYPE_SPECIAL
+};
+
+#define YAFFS_OBJECT_TYPE_MAX YAFFS_OBJECT_TYPE_SPECIAL
+
+struct yaffs_ext_tags {
+	unsigned chunk_used;	/*  Status of the chunk: used or unused */
+	unsigned obj_id;	/* If 0 this is not used */
+	unsigned chunk_id;	/* If 0 this is a header, else a data chunk */
+	unsigned n_bytes;	/* Only valid for data chunks */
+
+	/* The following stuff only has meaning when we read */
+	enum yaffs_ecc_result ecc_result;
+	unsigned block_bad;
+
+	/* YAFFS 1 stuff */
+	unsigned is_deleted;	/* The chunk is marked deleted */
+	unsigned serial_number;	/* Yaffs1 2-bit serial number */
+
+	/* YAFFS2 stuff */
+	unsigned seq_number;	/* The sequence number of this block */
+
+	/* Extra info if this is an object header (YAFFS2 only) */
+
+	unsigned extra_available;	/* Extra info available if not zero */
+	unsigned extra_parent_id;	/* The parent object */
+	unsigned extra_is_shrink;	/* Is it a shrink header? */
+	unsigned extra_shadows;	/* Does this shadow another object? */
+
+	enum yaffs_obj_type extra_obj_type;	/* What object type? */
+
+	unsigned extra_length;	/* Length if it is a file */
+	unsigned extra_equiv_id;	/* Equivalent object for a hard link */
+};
+
+/* Spare structure for YAFFS1 */
+struct yaffs_spare {
+	u8 tb0;
+	u8 tb1;
+	u8 tb2;
+	u8 tb3;
+	u8 page_status;		/* set to 0 to delete the chunk */
+	u8 block_status;
+	u8 tb4;
+	u8 tb5;
+	u8 ecc1[3];
+	u8 tb6;
+	u8 tb7;
+	u8 ecc2[3];
+};
+
+/*Special structure for passing through to mtd */
+struct yaffs_nand_spare {
+	struct yaffs_spare spare;
+	int eccres1;
+	int eccres2;
+};
+
+/* Block data in RAM */
+
+enum yaffs_block_state {
+	YAFFS_BLOCK_STATE_UNKNOWN = 0,
+
+	YAFFS_BLOCK_STATE_SCANNING,
+	/* Being scanned */
+
+	YAFFS_BLOCK_STATE_NEEDS_SCAN,
+	/* The block might have something on it (ie it is allocating or full,
+	 * perhaps empty) but it needs to be scanned to determine its true
+	 * state.
+	 * This state is only valid during scanning.
+	 * NB We tolerate empty because the pre-scanner might be incapable of
+	 * deciding
+	 * However, if this state is returned on a YAFFS2 device,
+	 * then we expect a sequence number
+	 */
+
+	YAFFS_BLOCK_STATE_EMPTY,
+	/* This block is empty */
+
+	YAFFS_BLOCK_STATE_ALLOCATING,
+	/* This block is partially allocated.
+	 * At least one page holds valid data.
+	 * This is the one currently being used for page
+	 * allocation. Should never be more than one of these.
+	 * If a block is only partially allocated at mount it is treated as
+	 * full.
+	 */
+
+	YAFFS_BLOCK_STATE_FULL,
+	/* All the pages in this block have been allocated.
+	 * If a block was only partially allocated when mounted we treat
+	 * it as fully allocated.
+	 */
+
+	YAFFS_BLOCK_STATE_DIRTY,
+	/* The block was full and now all chunks have been deleted.
+	 * Erase me, reuse me.
+	 */
+
+	YAFFS_BLOCK_STATE_CHECKPOINT,
+	/* This block is assigned to holding checkpoint data. */
+
+	YAFFS_BLOCK_STATE_COLLECTING,
+	/* This block is being garbage collected */
+
+	YAFFS_BLOCK_STATE_DEAD
+	    /* This block has failed and is not in use */
+};
+
+#define	YAFFS_NUMBER_OF_BLOCK_STATES (YAFFS_BLOCK_STATE_DEAD + 1)
+
+struct yaffs_block_info {
+
+	int soft_del_pages:10;	/* number of soft deleted pages */
+	int pages_in_use:10;	/* number of pages in use */
+	unsigned block_state:4;	/* One of the above block states. */
+				/* NB use unsigned because enum is sometimes
+				 * an int */
+	u32 needs_retiring:1;	/* Data has failed on this block, */
+				/*need to get valid data off and retire*/
+	u32 skip_erased_check:1;/* Skip the erased check on this block */
+	u32 gc_prioritise:1;	/* An ECC check or blank check has failed.
+				   Block should be prioritised for GC */
+	u32 chunk_error_strikes:3;	/* How many times we've had ecc etc
+				failures on this block and tried to reuse it */
+	u32 has_summary:1;	/* The block has a summary */
+
+	u32 has_shrink_hdr:1;	/* This block has at least one shrink header */
+	u32 seq_number;		/* block sequence number for yaffs2 */
+
+};
+
+/* -------------------------- Object structure -------------------------------*/
+/* This is the object structure as stored on NAND */
+
+struct yaffs_obj_hdr {
+	enum yaffs_obj_type type;
+
+	/* Apply to everything  */
+	int parent_obj_id;
+	u16 sum_no_longer_used;	/* checksum of name. No longer used */
+	YCHAR name[YAFFS_MAX_NAME_LENGTH + 1];
+
+	/* The following apply to all object types except for hard links */
+	u32 yst_mode;		/* protection */
+
+	u32 yst_uid;
+	u32 yst_gid;
+	u32 yst_atime;
+	u32 yst_mtime;
+	u32 yst_ctime;
+
+	/* File size  applies to files only */
+	int file_size;
+
+	/* Equivalent object id applies to hard links only. */
+	int equiv_id;
+
+	/* Alias is for symlinks only. */
+	YCHAR alias[YAFFS_MAX_ALIAS_LENGTH + 1];
+
+	u32 yst_rdev;	/* stuff for block and char devices (major/min) */
+
+	u32 win_ctime[2];
+	u32 win_atime[2];
+	u32 win_mtime[2];
+
+	u32 inband_shadowed_obj_id;
+	u32 inband_is_shrink;
+
+	u32 reserved[2];
+	int shadows_obj;	/* This object header shadows the
+				specified object if > 0 */
+
+	/* is_shrink applies to object headers written when wemake a hole. */
+	u32 is_shrink;
+
+};
+
+/*--------------------------- Tnode -------------------------- */
+
+struct yaffs_tnode {
+	struct yaffs_tnode *internal[YAFFS_NTNODES_INTERNAL];
+};
+
+/*------------------------  Object -----------------------------*/
+/* An object can be one of:
+ * - a directory (no data, has children links
+ * - a regular file (data.... not prunes :->).
+ * - a symlink [symbolic link] (the alias).
+ * - a hard link
+ */
+
+struct yaffs_file_var {
+	u32 file_size;
+	u32 scanned_size;
+	u32 shrink_size;
+	int top_level;
+	struct yaffs_tnode *top;
+};
+
+struct yaffs_dir_var {
+	struct list_head children;	/* list of child links */
+	struct list_head dirty;	/* Entry for list of dirty directories */
+};
+
+struct yaffs_symlink_var {
+	YCHAR *alias;
+};
+
+struct yaffs_hardlink_var {
+	struct yaffs_obj *equiv_obj;
+	u32 equiv_id;
+};
+
+union yaffs_obj_var {
+	struct yaffs_file_var file_variant;
+	struct yaffs_dir_var dir_variant;
+	struct yaffs_symlink_var symlink_variant;
+	struct yaffs_hardlink_var hardlink_variant;
+};
+
+struct yaffs_obj {
+	u8 deleted:1;		/* This should only apply to unlinked files. */
+	u8 soft_del:1;		/* it has also been soft deleted */
+	u8 unlinked:1;		/* An unlinked file.*/
+	u8 fake:1;		/* A fake object has no presence on NAND. */
+	u8 rename_allowed:1;	/* Some objects cannot be renamed. */
+	u8 unlink_allowed:1;
+	u8 dirty:1;		/* the object needs to be written to flash */
+	u8 valid:1;		/* When the file system is being loaded up, this
+				 * object might be created before the data
+				 * is available
+				 * ie. file data chunks encountered before
+				* the header.
+				 */
+	u8 lazy_loaded:1;	/* This object has been lazy loaded and
+				 * is missing some detail */
+
+	u8 defered_free:1;	/* Object is removed from NAND, but is
+				 * still in the inode cache.
+				 * Free of object is defered.
+				 * until the inode is released.
+				 */
+	u8 being_created:1;	/* This object is still being created
+				 * so skip some verification checks. */
+	u8 is_shadowed:1;	/* This object is shadowed on the way
+				 * to being renamed. */
+
+	u8 xattr_known:1;	/* We know if this has object has xattribs
+				 * or not. */
+	u8 has_xattr:1;		/* This object has xattribs.
+				 * Only valid if xattr_known. */
+
+	u8 serial;		/* serial number of chunk in NAND.*/
+	u16 sum;		/* sum of the name to speed searching */
+
+	struct yaffs_dev *my_dev;	/* The device I'm on */
+
+	struct list_head hash_link;	/* list of objects in hash bucket */
+
+	struct list_head hard_links;	/* hard linked object chain*/
+
+	/* directory structure stuff */
+	/* also used for linking up the free list */
+	struct yaffs_obj *parent;
+	struct list_head siblings;
+
+	/* Where's my object header in NAND? */
+	int hdr_chunk;
+
+	int n_data_chunks;	/* Number of data chunks for this file. */
+
+	u32 obj_id;		/* the object id value */
+
+	u32 yst_mode;
+
+	YCHAR short_name[YAFFS_SHORT_NAME_LENGTH + 1];
+
+#ifdef CONFIG_YAFFS_WINCE
+	u32 win_ctime[2];
+	u32 win_mtime[2];
+	u32 win_atime[2];
+#else
+	u32 yst_uid;
+	u32 yst_gid;
+	u32 yst_atime;
+	u32 yst_mtime;
+	u32 yst_ctime;
+#endif
+
+	u32 yst_rdev;
+
+	void *my_inode;
+
+	enum yaffs_obj_type variant_type;
+
+	union yaffs_obj_var variant;
+
+};
+
+struct yaffs_obj_bucket {
+	struct list_head list;
+	int count;
+};
+
+/* yaffs_checkpt_obj holds the definition of an object as dumped
+ * by checkpointing.
+ */
+
+struct yaffs_checkpt_obj {
+	int struct_type;
+	u32 obj_id;
+	u32 parent_id;
+	int hdr_chunk;
+	enum yaffs_obj_type variant_type:3;
+	u8 deleted:1;
+	u8 soft_del:1;
+	u8 unlinked:1;
+	u8 fake:1;
+	u8 rename_allowed:1;
+	u8 unlink_allowed:1;
+	u8 serial;
+	int n_data_chunks;
+	u32 size_or_equiv_obj;
+};
+
+/*--------------------- Temporary buffers ----------------
+ *
+ * These are chunk-sized working buffers. Each device has a few.
+ */
+
+struct yaffs_buffer {
+	u8 *buffer;
+	int in_use;
+};
+
+/*----------------- Device ---------------------------------*/
+
+struct yaffs_param {
+	const YCHAR *name;
+
+	/*
+	 * Entry parameters set up way early. Yaffs sets up the rest.
+	 * The structure should be zeroed out before use so that unused
+	 * and defualt values are zero.
+	 */
+
+	int inband_tags;	/* Use unband tags */
+	u32 total_bytes_per_chunk;	/* Should be >= 512, does not need to
+					 be a power of 2 */
+	int chunks_per_block;	/* does not need to be a power of 2 */
+	int spare_bytes_per_chunk;	/* spare area size */
+	int start_block;	/* Start block we're allowed to use */
+	int end_block;		/* End block we're allowed to use */
+	int n_reserved_blocks;	/* Tuneable so that we can reduce
+				 * reserved blocks on NOR and RAM. */
+
+	int n_caches;		/* If <= 0, then short op caching is disabled,
+				 * else the number of short op caches.
+				 */
+	int use_nand_ecc;	/* Flag to decide whether or not to use
+				 * NAND driver ECC on data (yaffs1) */
+        int tags_9bytes;	/* Use 9 byte tags */
+	int no_tags_ecc;	/* Flag to decide whether or not to do ECC
+				 * on packed tags (yaffs2) */
+
+	int is_yaffs2;		/* Use yaffs2 mode on this device */
+
+	int empty_lost_n_found;	/* Auto-empty lost+found directory on mount */
+
+	int refresh_period;	/* How often to check for a block refresh */
+
+	/* Checkpoint control. Can be set before or after initialisation */
+	u8 skip_checkpt_rd;
+	u8 skip_checkpt_wr;
+
+	int enable_xattr;	/* Enable xattribs */
+
+	/* NAND access functions (Must be set before calling YAFFS) */
+
+	int (*write_chunk_fn) (struct yaffs_dev *dev,
+			       int nand_chunk, const u8 *data,
+			       const struct yaffs_spare *spare);
+	int (*read_chunk_fn) (struct yaffs_dev *dev,
+			      int nand_chunk, u8 *data,
+			      struct yaffs_spare *spare);
+	int (*erase_fn) (struct yaffs_dev *dev, int flash_block);
+	int (*initialise_flash_fn) (struct yaffs_dev *dev);
+	int (*deinitialise_flash_fn) (struct yaffs_dev *dev);
+
+	/* yaffs2 mode functions */
+	int (*write_chunk_tags_fn) (struct yaffs_dev *dev,
+				    int nand_chunk, const u8 *data,
+				    const struct yaffs_ext_tags *tags);
+	int (*read_chunk_tags_fn) (struct yaffs_dev *dev,
+				   int nand_chunk, u8 *data,
+				   struct yaffs_ext_tags *tags);
+	int (*bad_block_fn) (struct yaffs_dev *dev, int block_no);
+	int (*query_block_fn) (struct yaffs_dev *dev, int block_no,
+			       enum yaffs_block_state *state,
+			       u32 *seq_number);
+
+	/* The remove_obj_fn function must be supplied by OS flavours that
+	 * need it.
+	 * yaffs direct uses it to implement the faster readdir.
+	 * Linux uses it to protect the directory during unlocking.
+	 */
+	void (*remove_obj_fn) (struct yaffs_obj *obj);
+
+	/* Callback to mark the superblock dirty */
+	void (*sb_dirty_fn) (struct yaffs_dev *dev);
+
+	/*  Callback to control garbage collection. */
+	unsigned (*gc_control) (struct yaffs_dev *dev);
+
+	/* Debug control flags. Don't use unless you know what you're doing */
+	int use_header_file_size;	/* Flag to determine if we should use
+					 * file sizes from the header */
+	int disable_lazy_load;	/* Disable lazy loading on this device */
+	int wide_tnodes_disabled;	/* Set to disable wide tnodes */
+	int disable_soft_del;	/* yaffs 1 only: Set to disable the use of
+				 * softdeletion. */
+
+	int defered_dir_update;	/* Set to defer directory updates */
+
+#ifdef CONFIG_YAFFS_AUTO_UNICODE
+	int auto_unicode;
+#endif
+	int always_check_erased;	/* Force chunk erased check always on */
+
+	int disable_summary;
+};
+
+struct yaffs_dev {
+	struct yaffs_param param;
+
+	/* Context storage. Holds extra OS specific data for this device */
+
+	void *os_context;
+	void *driver_context;
+
+	struct list_head dev_list;
+
+	/* Runtime parameters. Set up by YAFFS. */
+	int data_bytes_per_chunk;
+
+	/* Non-wide tnode stuff */
+	u16 chunk_grp_bits;	/* Number of bits that need to be resolved if
+				 * the tnodes are not wide enough.
+				 */
+	u16 chunk_grp_size;	/* == 2^^chunk_grp_bits */
+
+	/* Stuff to support wide tnodes */
+	u32 tnode_width;
+	u32 tnode_mask;
+	u32 tnode_size;
+
+	/* Stuff for figuring out file offset to chunk conversions */
+	u32 chunk_shift;	/* Shift value */
+	u32 chunk_div;		/* Divisor after shifting: 1 for 2^n sizes */
+	u32 chunk_mask;		/* Mask to use for power-of-2 case */
+
+	int is_mounted;
+	int read_only;
+	int is_checkpointed;
+
+	/* Stuff to support block offsetting to support start block zero */
+	int internal_start_block;
+	int internal_end_block;
+	int block_offset;
+	int chunk_offset;
+
+	/* Runtime checkpointing stuff */
+	int checkpt_page_seq;	/* running sequence number of checkpt pages */
+	int checkpt_byte_count;
+	int checkpt_byte_offs;
+	u8 *checkpt_buffer;
+	int checkpt_open_write;
+	int blocks_in_checkpt;
+	int checkpt_cur_chunk;
+	int checkpt_cur_block;
+	int checkpt_next_block;
+	int *checkpt_block_list;
+	int checkpt_max_blocks;
+	u32 checkpt_sum;
+	u32 checkpt_xor;
+
+	int checkpoint_blocks_required;	/* Number of blocks needed to store
+					 * current checkpoint set */
+
+	/* Block Info */
+	struct yaffs_block_info *block_info;
+	u8 *chunk_bits;		/* bitmap of chunks in use */
+	unsigned block_info_alt:1;	/* allocated using alternative alloc */
+	unsigned chunk_bits_alt:1;	/* allocated using alternative alloc */
+	int chunk_bit_stride;	/* Number of bytes of chunk_bits per block.
+				 * Must be consistent with chunks_per_block.
+				 */
+
+	int n_erased_blocks;
+	int alloc_block;	/* Current block being allocated off */
+	u32 alloc_page;
+	int alloc_block_finder;	/* Used to search for next allocation block */
+
+	/* Object and Tnode memory management */
+	void *allocator;
+	int n_obj;
+	int n_tnodes;
+
+	int n_hardlinks;
+
+	struct yaffs_obj_bucket obj_bucket[YAFFS_NOBJECT_BUCKETS];
+	u32 bucket_finder;
+
+	int n_free_chunks;
+
+	/* Garbage collection control */
+	u32 *gc_cleanup_list;	/* objects to delete at the end of a GC. */
+	u32 n_clean_ups;
+
+	unsigned has_pending_prioritised_gc;	/* We think this device might
+						have pending prioritised gcs */
+	unsigned gc_disable;
+	unsigned gc_block_finder;
+	unsigned gc_dirtiest;
+	unsigned gc_pages_in_use;
+	unsigned gc_not_done;
+	unsigned gc_block;
+	unsigned gc_chunk;
+	unsigned gc_skip;
+	struct yaffs_summary_tags *gc_sum_tags;
+
+	/* Special directories */
+	struct yaffs_obj *root_dir;
+	struct yaffs_obj *lost_n_found;
+
+	int buffered_block;	/* Which block is buffered here? */
+	int doing_buffered_block_rewrite;
+
+	struct yaffs_cache *cache;
+	int cache_last_use;
+
+	/* Stuff for background deletion and unlinked files. */
+	struct yaffs_obj *unlinked_dir;	/* Directory where unlinked and deleted
+					 files live. */
+	struct yaffs_obj *del_dir;	/* Directory where deleted objects are
+					sent to disappear. */
+	struct yaffs_obj *unlinked_deletion;	/* Current file being
+							background deleted. */
+	int n_deleted_files;	/* Count of files awaiting deletion; */
+	int n_unlinked_files;	/* Count of unlinked files. */
+	int n_bg_deletions;	/* Count of background deletions. */
+
+	/* Temporary buffer management */
+	struct yaffs_buffer temp_buffer[YAFFS_N_TEMP_BUFFERS];
+	int max_temp;
+	int temp_in_use;
+	int unmanaged_buffer_allocs;
+	int unmanaged_buffer_deallocs;
+
+	/* yaffs2 runtime stuff */
+	unsigned seq_number;	/* Sequence number of currently
+					allocating block */
+	unsigned oldest_dirty_seq;
+	unsigned oldest_dirty_block;
+
+	/* Block refreshing */
+	int refresh_skip;	/* A skip down counter.
+				 * Refresh happens when this gets to zero. */
+
+	/* Dirty directory handling */
+	struct list_head dirty_dirs;	/* List of dirty directories */
+
+	/* Summary */
+	int chunks_per_summary;
+	struct yaffs_summary_tags *sum_tags;
+
+	/* Statistics */
+	u32 n_page_writes;
+	u32 n_page_reads;
+	u32 n_erasures;
+	u32 n_erase_failures;
+	u32 n_gc_copies;
+	u32 all_gcs;
+	u32 passive_gc_count;
+	u32 oldest_dirty_gc_count;
+	u32 n_gc_blocks;
+	u32 bg_gcs;
+	u32 n_retried_writes;
+	u32 n_retired_blocks;
+	u32 n_ecc_fixed;
+	u32 n_ecc_unfixed;
+	u32 n_tags_ecc_fixed;
+	u32 n_tags_ecc_unfixed;
+	u32 n_deletions;
+	u32 n_unmarked_deletions;
+	u32 refresh_count;
+	u32 cache_hits;
+	u32 tags_used;
+	u32 summary_used;
+
+};
+
+/* The CheckpointDevice structure holds the device information that changes
+ *at runtime and must be preserved over unmount/mount cycles.
+ */
+struct yaffs_checkpt_dev {
+	int struct_type;
+	int n_erased_blocks;
+	int alloc_block;	/* Current block being allocated off */
+	u32 alloc_page;
+	int n_free_chunks;
+
+	int n_deleted_files;	/* Count of files awaiting deletion; */
+	int n_unlinked_files;	/* Count of unlinked files. */
+	int n_bg_deletions;	/* Count of background deletions. */
+
+	/* yaffs2 runtime stuff */
+	unsigned seq_number;	/* Sequence number of currently
+				 * allocating block */
+
+};
+
+struct yaffs_checkpt_validity {
+	int struct_type;
+	u32 magic;
+	u32 version;
+	u32 head;
+};
+
+struct yaffs_shadow_fixer {
+	int obj_id;
+	int shadowed_id;
+	struct yaffs_shadow_fixer *next;
+};
+
+/* Structure for doing xattr modifications */
+struct yaffs_xattr_mod {
+	int set;		/* If 0 then this is a deletion */
+	const YCHAR *name;
+	const void *data;
+	int size;
+	int flags;
+	int result;
+};
+
+/*----------------------- YAFFS Functions -----------------------*/
+
+int yaffs_guts_initialise(struct yaffs_dev *dev);
+void yaffs_deinitialise(struct yaffs_dev *dev);
+
+int yaffs_get_n_free_chunks(struct yaffs_dev *dev);
+
+int yaffs_rename_obj(struct yaffs_obj *old_dir, const YCHAR * old_name,
+		     struct yaffs_obj *new_dir, const YCHAR * new_name);
+
+int yaffs_unlinker(struct yaffs_obj *dir, const YCHAR * name);
+int yaffs_del_obj(struct yaffs_obj *obj);
+
+int yaffs_get_obj_name(struct yaffs_obj *obj, YCHAR * name, int buffer_size);
+int yaffs_get_obj_length(struct yaffs_obj *obj);
+int yaffs_get_obj_inode(struct yaffs_obj *obj);
+unsigned yaffs_get_obj_type(struct yaffs_obj *obj);
+int yaffs_get_obj_link_count(struct yaffs_obj *obj);
+
+/* File operations */
+int yaffs_file_rd(struct yaffs_obj *obj, u8 * buffer, loff_t offset,
+		  int n_bytes);
+int yaffs_wr_file(struct yaffs_obj *obj, const u8 * buffer, loff_t offset,
+		  int n_bytes, int write_trhrough);
+int yaffs_resize_file(struct yaffs_obj *obj, loff_t new_size);
+
+struct yaffs_obj *yaffs_create_file(struct yaffs_obj *parent,
+				    const YCHAR *name, u32 mode, u32 uid,
+				    u32 gid);
+
+int yaffs_flush_file(struct yaffs_obj *obj, int update_time, int data_sync);
+
+/* Flushing and checkpointing */
+void yaffs_flush_whole_cache(struct yaffs_dev *dev);
+
+int yaffs_checkpoint_save(struct yaffs_dev *dev);
+int yaffs_checkpoint_restore(struct yaffs_dev *dev);
+
+/* Directory operations */
+struct yaffs_obj *yaffs_create_dir(struct yaffs_obj *parent, const YCHAR *name,
+				   u32 mode, u32 uid, u32 gid);
+struct yaffs_obj *yaffs_find_by_name(struct yaffs_obj *the_dir,
+				     const YCHAR *name);
+struct yaffs_obj *yaffs_find_by_number(struct yaffs_dev *dev, u32 number);
+
+/* Link operations */
+struct yaffs_obj *yaffs_link_obj(struct yaffs_obj *parent, const YCHAR *name,
+				 struct yaffs_obj *equiv_obj);
+
+struct yaffs_obj *yaffs_get_equivalent_obj(struct yaffs_obj *obj);
+
+/* Symlink operations */
+struct yaffs_obj *yaffs_create_symlink(struct yaffs_obj *parent,
+				       const YCHAR *name, u32 mode, u32 uid,
+				       u32 gid, const YCHAR *alias);
+YCHAR *yaffs_get_symlink_alias(struct yaffs_obj *obj);
+
+/* Special inodes (fifos, sockets and devices) */
+struct yaffs_obj *yaffs_create_special(struct yaffs_obj *parent,
+				       const YCHAR *name, u32 mode, u32 uid,
+				       u32 gid, u32 rdev);
+
+int yaffs_set_xattrib(struct yaffs_obj *obj, const YCHAR *name,
+		      const void *value, int size, int flags);
+int yaffs_get_xattrib(struct yaffs_obj *obj, const YCHAR *name, void *value,
+		      int size);
+int yaffs_list_xattrib(struct yaffs_obj *obj, char *buffer, int size);
+int yaffs_remove_xattrib(struct yaffs_obj *obj, const YCHAR *name);
+
+/* Special directories */
+struct yaffs_obj *yaffs_root(struct yaffs_dev *dev);
+struct yaffs_obj *yaffs_lost_n_found(struct yaffs_dev *dev);
+
+void yaffs_handle_defered_free(struct yaffs_obj *obj);
+
+void yaffs_update_dirty_dirs(struct yaffs_dev *dev);
+
+int yaffs_bg_gc(struct yaffs_dev *dev, unsigned urgency);
+
+/* Debug dump  */
+int yaffs_dump_obj(struct yaffs_obj *obj);
+
+void yaffs_guts_test(struct yaffs_dev *dev);
+
+/* A few useful functions to be used within the core files*/
+void yaffs_chunk_del(struct yaffs_dev *dev, int chunk_id, int mark_flash,
+		     int lyn);
+int yaffs_check_ff(u8 *buffer, int n_bytes);
+void yaffs_handle_chunk_error(struct yaffs_dev *dev,
+			      struct yaffs_block_info *bi);
+
+u8 *yaffs_get_temp_buffer(struct yaffs_dev *dev);
+void yaffs_release_temp_buffer(struct yaffs_dev *dev, u8 *buffer);
+
+struct yaffs_obj *yaffs_find_or_create_by_number(struct yaffs_dev *dev,
+						 int number,
+						 enum yaffs_obj_type type);
+int yaffs_put_chunk_in_file(struct yaffs_obj *in, int inode_chunk,
+			    int nand_chunk, int in_scan);
+void yaffs_set_obj_name(struct yaffs_obj *obj, const YCHAR *name);
+void yaffs_set_obj_name_from_oh(struct yaffs_obj *obj,
+				const struct yaffs_obj_hdr *oh);
+void yaffs_add_obj_to_dir(struct yaffs_obj *directory, struct yaffs_obj *obj);
+YCHAR *yaffs_clone_str(const YCHAR *str);
+void yaffs_link_fixup(struct yaffs_dev *dev, struct list_head *hard_list);
+void yaffs_block_became_dirty(struct yaffs_dev *dev, int block_no);
+int yaffs_update_oh(struct yaffs_obj *in, const YCHAR *name,
+		    int force, int is_shrink, int shadows,
+		    struct yaffs_xattr_mod *xop);
+void yaffs_handle_shadowed_obj(struct yaffs_dev *dev, int obj_id,
+			       int backward_scanning);
+int yaffs_check_alloc_available(struct yaffs_dev *dev, int n_chunks);
+struct yaffs_tnode *yaffs_get_tnode(struct yaffs_dev *dev);
+struct yaffs_tnode *yaffs_add_find_tnode_0(struct yaffs_dev *dev,
+					   struct yaffs_file_var *file_struct,
+					   u32 chunk_id,
+					   struct yaffs_tnode *passed_tn);
+
+int yaffs_do_file_wr(struct yaffs_obj *in, const u8 *buffer, loff_t offset,
+		     int n_bytes, int write_trhrough);
+void yaffs_resize_file_down(struct yaffs_obj *obj, loff_t new_size);
+void yaffs_skip_rest_of_block(struct yaffs_dev *dev);
+
+int yaffs_count_free_chunks(struct yaffs_dev *dev);
+
+struct yaffs_tnode *yaffs_find_tnode_0(struct yaffs_dev *dev,
+				       struct yaffs_file_var *file_struct,
+				       u32 chunk_id);
+
+u32 yaffs_get_group_base(struct yaffs_dev *dev, struct yaffs_tnode *tn,
+			 unsigned pos);
+
+int yaffs_is_non_empty_dir(struct yaffs_obj *obj);
+#endif
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_linux.h linux-3.0.82x/fs/yaffs2/yaffs_linux.h
--- linux-3.0.82/fs/yaffs2/yaffs_linux.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_linux.h	2017-09-23 03:42:50.302674195 +0800
@@ -0,0 +1,41 @@
+/*
+ * YAFFS: Yet another Flash File System . A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1 as
+ * published by the Free Software Foundation.
+ *
+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
+ */
+
+#ifndef __YAFFS_LINUX_H__
+#define __YAFFS_LINUX_H__
+
+#include "yportenv.h"
+
+struct yaffs_linux_context {
+	struct list_head context_list;	/* List of these we have mounted */
+	struct yaffs_dev *dev;
+	struct super_block *super;
+	struct task_struct *bg_thread;	/* Background thread for this device */
+	int bg_running;
+	struct mutex gross_lock;	/* Gross locking mutex*/
+	u8 *spare_buffer;	/* For mtdif2 use. Don't know the buffer size
+				 * at compile time so we have to allocate it.
+				 */
+	struct list_head search_contexts;
+	void (*put_super_fn) (struct super_block *sb);
+
+	struct task_struct *readdir_process;
+	unsigned mount_id;
+};
+
+#define yaffs_dev_to_lc(dev) ((struct yaffs_linux_context *)((dev)->os_context))
+#define yaffs_dev_to_mtd(dev) ((struct mtd_info *)((dev)->driver_context))
+
+#endif
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_mtdif1.c linux-3.0.82x/fs/yaffs2/yaffs_mtdif1.c
--- linux-3.0.82/fs/yaffs2/yaffs_mtdif1.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_mtdif1.c	2017-09-23 03:42:50.302674195 +0800
@@ -0,0 +1,359 @@
+/*
+ * YAFFS: Yet another FFS. A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * This module provides the interface between yaffs_nand.c and the
+ * MTD API.  This version is used when the MTD interface supports the
+ * 'mtd_oob_ops' style calls to read_oob and write_oob, circa 2.6.17,
+ * and we have small-page NAND device.
+ *
+ * These functions are invoked via function pointers in yaffs_nand.c.
+ * This replaces functionality provided by functions in yaffs_mtdif.c
+ * and the yaffs_tags compatability functions in yaffs_tagscompat.c that are
+ * called in yaffs_mtdif.c when the function pointers are NULL.
+ * We assume the MTD layer is performing ECC (use_nand_ecc is true).
+ */
+
+#include "yportenv.h"
+#include "yaffs_trace.h"
+#include "yaffs_guts.h"
+#include "yaffs_packedtags1.h"
+#include "yaffs_tagscompat.h"	/* for yaffs_calc_tags_ecc */
+#include "yaffs_linux.h"
+
+#include "linux/kernel.h"
+#include "linux/version.h"
+#include "linux/types.h"
+#include "linux/mtd/mtd.h"
+
+/* Don't compile this module if we don't have MTD's mtd_oob_ops interface */
+#if (MTD_VERSION_CODE > MTD_VERSION(2, 6, 17))
+
+
+#if 0
+/* Use the following nand_ecclayout with MTD when using
+ * 9 byte tags and the older on-NAND tags layout.
+ * If you have existing Yaffs images and the byte order differs from this,
+ * adjust 'oobfree' to match your existing Yaffs data.
+ *
+ * This nand_ecclayout scatters/gathers to/from the old-yaffs layout with the
+ * page_status byte (at NAND spare offset 4) scattered/gathered from/to
+ * the 9th byte.
+ *
+ * Old-style on-NAND format: T0,T1,T2,T3,P,B,T4,T5,E0,E1,E2,T6,T7,E3,E4,E5
+ * We have/need packed_tags1 plus page_status: T0,T1,T2,T3,T4,T5,T6,T7,P
+ * where Tn are the tag bytes, En are MTD's ECC bytes, P is the page_status
+ * byte and B is the small-page bad-block indicator byte.
+ */
+static struct nand_ecclayout nand_oob_16 = {
+	.eccbytes = 6,
+	.eccpos = {8, 9, 10, 13, 14, 15},
+	.oobavail = 9,
+	.oobfree = {{0, 4}, {6, 2}, {11, 2}, {4, 1} }
+};
+#endif
+
+/* Write a chunk (page) of data to NAND.
+ *
+ * Caller always provides ExtendedTags data which are converted to a more
+ * compact (packed) form for storage in NAND.  A mini-ECC runs over the
+ * contents of the tags meta-data; used to valid the tags when read.
+ *
+ *  - Pack ExtendedTags to packed_tags1 form
+ *  - Compute mini-ECC for packed_tags1
+ *  - Write data and packed tags to NAND.
+ *
+ * Note: Due to the use of the packed_tags1 meta-data which does not include
+ * a full sequence number (as found in the larger packed_tags2 form) it is
+ * necessary for Yaffs to re-write a chunk/page (just once) to mark it as
+ * discarded and dirty.  This is not ideal: newer NAND parts are supposed
+ * to be written just once.  When Yaffs performs this operation, this
+ * function is called with a NULL data pointer -- calling MTD write_oob
+ * without data is valid usage (2.6.17).
+ *
+ * Any underlying MTD error results in YAFFS_FAIL.
+ * Returns YAFFS_OK or YAFFS_FAIL.
+ */
+int nandmtd1_write_chunk_tags(struct yaffs_dev *dev,
+			      int nand_chunk, const u8 *data,
+			      const struct yaffs_ext_tags *etags)
+{
+	struct mtd_info *mtd = yaffs_dev_to_mtd(dev);
+	int chunk_bytes = dev->data_bytes_per_chunk;
+	loff_t addr = ((loff_t) nand_chunk) * chunk_bytes;
+	struct mtd_oob_ops ops;
+	struct yaffs_packed_tags1 pt1;
+	int retval;
+
+	/* we assume that packed_tags1 and struct yaffs_tags are compatible */
+	compile_time_assertion(sizeof(struct yaffs_packed_tags1) == 12);
+	compile_time_assertion(sizeof(struct yaffs_tags) == 8);
+
+	yaffs_pack_tags1(&pt1, etags);
+	yaffs_calc_tags_ecc((struct yaffs_tags *)&pt1);
+
+	/* When deleting a chunk, the upper layer provides only skeletal
+	 * etags, one with is_deleted set.  However, we need to update the
+	 * tags, not erase them completely.  So we use the NAND write property
+	 * that only zeroed-bits stick and set tag bytes to all-ones and
+	 * zero just the (not) deleted bit.
+	 */
+	if(dev->param.tags_9bytes) {
+        	((u8 *) &pt1)[8] = 0xff;
+        	if (etags->is_deleted) {
+		        memset(&pt1, 0xff, 8);
+        		/* zero page_status byte to indicate deleted */
+	        	((u8 *) &pt1)[8] = 0;
+                }
+        } else {
+        	if (etags->is_deleted) {
+	        	memset(&pt1, 0xff, 8);
+	        	/* clear delete status bit to indicate deleted */
+        		pt1.deleted = 0;
+                }
+	}
+
+	memset(&ops, 0, sizeof(ops));
+	ops.mode = MTD_OOB_AUTO;
+	ops.len = (data) ? chunk_bytes : 0;
+	ops.ooblen = dev->param.tags_9bytes ? 9 : 8;
+	ops.datbuf = (u8 *) data;
+	ops.oobbuf = (u8 *) &pt1;
+
+	retval = mtd->write_oob(mtd, addr, &ops);
+	if (retval) {
+		yaffs_trace(YAFFS_TRACE_MTD,
+			"write_oob failed, chunk %d, mtd error %d",
+			nand_chunk, retval);
+	}
+	return retval ? YAFFS_FAIL : YAFFS_OK;
+}
+
+/* Return with empty ExtendedTags but add ecc_result.
+ */
+static int rettags(struct yaffs_ext_tags *etags, int ecc_result, int retval)
+{
+	if (etags) {
+		memset(etags, 0, sizeof(*etags));
+		etags->ecc_result = ecc_result;
+	}
+	return retval;
+}
+
+/* Read a chunk (page) from NAND.
+ *
+ * Caller expects ExtendedTags data to be usable even on error; that is,
+ * all members except ecc_result and block_bad are zeroed.
+ *
+ *  - Check ECC results for data (if applicable)
+ *  - Check for blank/erased block (return empty ExtendedTags if blank)
+ *  - Check the packed_tags1 mini-ECC (correct if necessary/possible)
+ *  - Convert packed_tags1 to ExtendedTags
+ *  - Update ecc_result and block_bad members to refect state.
+ *
+ * Returns YAFFS_OK or YAFFS_FAIL.
+ */
+int nandmtd1_read_chunk_tags(struct yaffs_dev *dev,
+			     int nand_chunk, u8 *data,
+			     struct yaffs_ext_tags *etags)
+{
+	struct mtd_info *mtd = yaffs_dev_to_mtd(dev);
+	int chunk_bytes = dev->data_bytes_per_chunk;
+	loff_t addr = ((loff_t) nand_chunk) * chunk_bytes;
+	int eccres = YAFFS_ECC_RESULT_NO_ERROR;
+	struct mtd_oob_ops ops;
+	struct yaffs_packed_tags1 pt1;
+	int retval;
+	int deleted;
+
+	memset(&ops, 0, sizeof(ops));
+	ops.mode = MTD_OOB_AUTO;
+	ops.len = (data) ? chunk_bytes : 0;
+	ops.ooblen = dev->param.tags_9bytes ? 9 : 8;
+	ops.datbuf = data;
+	ops.oobbuf = (u8 *) &pt1;
+
+#if (MTD_VERSION_CODE < MTD_VERSION(2, 6, 20))
+	/* In MTD 2.6.18 to 2.6.19 nand_base.c:nand_do_read_oob() has a bug;
+	 * help it out with ops.len = ops.ooblen when ops.datbuf == NULL.
+	 */
+	ops.len = (ops.datbuf) ? ops.len : ops.ooblen;
+#endif
+	/* Read page and oob using MTD.
+	 * Check status and determine ECC result.
+	 */
+	retval = mtd->read_oob(mtd, addr, &ops);
+	if (retval)
+		yaffs_trace(YAFFS_TRACE_MTD,
+			"read_oob failed, chunk %d, mtd error %d",
+			nand_chunk, retval);
+
+	switch (retval) {
+	case 0:
+		/* no error */
+		break;
+
+	case -EUCLEAN:
+		/* MTD's ECC fixed the data */
+		eccres = YAFFS_ECC_RESULT_FIXED;
+		dev->n_ecc_fixed++;
+		break;
+
+	case -EBADMSG:
+		/* MTD's ECC could not fix the data */
+		dev->n_ecc_unfixed++;
+		/* fall into... */
+	default:
+		rettags(etags, YAFFS_ECC_RESULT_UNFIXED, 0);
+		etags->block_bad = (mtd->block_isbad) (mtd, addr);
+		return YAFFS_FAIL;
+	}
+
+	/* Check for a blank/erased chunk.
+	 */
+	if (yaffs_check_ff((u8 *) &pt1, 8)) {
+		/* when blank, upper layers want ecc_result to be <= NO_ERROR */
+		return rettags(etags, YAFFS_ECC_RESULT_NO_ERROR, YAFFS_OK);
+	}
+
+	if(dev->param.tags_9bytes) {
+        	deleted = (hweight8(((u8 *) &pt1)[8]) < 7);
+        } else {
+        	/* Read deleted status (bit) then return it to it's non-deleted
+	         * state before performing tags mini-ECC check. pt1.deleted is
+        	 * inverted.
+	         */
+        	deleted = !pt1.deleted;
+        	pt1.deleted = 1;
+        }
+
+	/* Check the packed tags mini-ECC and correct if necessary/possible.
+	 */
+	retval = yaffs_check_tags_ecc((struct yaffs_tags *)&pt1);
+	switch (retval) {
+	case 0:
+		/* no tags error, use MTD result */
+		break;
+	case 1:
+		/* recovered tags-ECC error */
+		dev->n_tags_ecc_fixed++;
+		if (eccres == YAFFS_ECC_RESULT_NO_ERROR)
+			eccres = YAFFS_ECC_RESULT_FIXED;
+		break;
+	default:
+		/* unrecovered tags-ECC error */
+		dev->n_tags_ecc_unfixed++;
+		return rettags(etags, YAFFS_ECC_RESULT_UNFIXED, YAFFS_FAIL);
+	}
+
+	/* Unpack the tags to extended form and set ECC result.
+	 * [set should_be_ff just to keep yaffs_unpack_tags1 happy]
+	 */
+	pt1.should_be_ff = 0xffffffff;
+	yaffs_unpack_tags1(etags, &pt1);
+	etags->ecc_result = eccres;
+
+	/* Set deleted state */
+	etags->is_deleted = deleted;
+	return YAFFS_OK;
+}
+
+/* Mark a block bad.
+ *
+ * This is a persistant state.
+ * Use of this function should be rare.
+ *
+ * Returns YAFFS_OK or YAFFS_FAIL.
+ */
+int nandmtd1_mark_block_bad(struct yaffs_dev *dev, int block_no)
+{
+	struct mtd_info *mtd = yaffs_dev_to_mtd(dev);
+	int blocksize = dev->param.chunks_per_block * dev->data_bytes_per_chunk;
+	int retval;
+
+	yaffs_trace(YAFFS_TRACE_BAD_BLOCKS, "marking block %d bad", block_no);
+
+	retval = mtd->block_markbad(mtd, (loff_t) blocksize * block_no);
+	return (retval) ? YAFFS_FAIL : YAFFS_OK;
+}
+
+/* Check any MTD prerequists.
+ *
+ * Returns YAFFS_OK or YAFFS_FAIL.
+ */
+static int nandmtd1_test_prerequists(struct yaffs_dev *dev, struct mtd_info *mtd)
+{
+	/* 2.6.18 has mtd->ecclayout->oobavail */
+	/* 2.6.21 has mtd->ecclayout->oobavail and mtd->oobavail */
+	int oobavail = mtd->ecclayout->oobavail;
+
+	if (oobavail < (dev->param.tags_9bytes ? 9 : 8)) {
+		yaffs_trace(YAFFS_TRACE_ERROR,
+			"mtd device has only %d bytes for tags, need %d",
+			oobavail, dev->param.tags_9bytes ? 9 : 8);
+		return YAFFS_FAIL;
+	}
+	return YAFFS_OK;
+}
+
+/* Query for the current state of a specific block.
+ *
+ * Examine the tags of the first chunk of the block and return the state:
+ *  - YAFFS_BLOCK_STATE_DEAD, the block is marked bad
+ *  - YAFFS_BLOCK_STATE_NEEDS_SCAN, the block is in use
+ *  - YAFFS_BLOCK_STATE_EMPTY, the block is clean
+ *
+ * Always returns YAFFS_OK.
+ */
+int nandmtd1_query_block(struct yaffs_dev *dev, int block_no,
+			 enum yaffs_block_state *state_ptr, u32 * seq_ptr)
+{
+	struct mtd_info *mtd = yaffs_dev_to_mtd(dev);
+	int chunk_num = block_no * dev->param.chunks_per_block;
+	loff_t addr = (loff_t) chunk_num * dev->data_bytes_per_chunk;
+	struct yaffs_ext_tags etags;
+	int state = YAFFS_BLOCK_STATE_DEAD;
+	int seqnum = 0;
+	int retval;
+
+	/* We don't yet have a good place to test for MTD config prerequists.
+	 * Do it here as we are called during the initial scan.
+	 */
+	if (nandmtd1_test_prerequists(dev, mtd) != YAFFS_OK)
+		return YAFFS_FAIL;
+
+	retval = nandmtd1_read_chunk_tags(dev, chunk_num, NULL, &etags);
+	etags.block_bad = (mtd->block_isbad) (mtd, addr);
+	if (etags.block_bad) {
+		yaffs_trace(YAFFS_TRACE_BAD_BLOCKS,
+			"block %d is marked bad",
+			block_no);
+		state = YAFFS_BLOCK_STATE_DEAD;
+	} else if (etags.ecc_result != YAFFS_ECC_RESULT_NO_ERROR) {
+		/* bad tags, need to look more closely */
+		state = YAFFS_BLOCK_STATE_NEEDS_SCAN;
+	} else if (etags.chunk_used) {
+		state = YAFFS_BLOCK_STATE_NEEDS_SCAN;
+		seqnum = etags.seq_number;
+	} else {
+		state = YAFFS_BLOCK_STATE_EMPTY;
+	}
+
+	*state_ptr = state;
+	*seq_ptr = seqnum;
+
+	/* query always succeeds */
+	return YAFFS_OK;
+}
+
+#endif /*MTD_VERSION */
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_mtdif1.h linux-3.0.82x/fs/yaffs2/yaffs_mtdif1.h
--- linux-3.0.82/fs/yaffs2/yaffs_mtdif1.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_mtdif1.h	2017-09-23 03:42:50.302674195 +0800
@@ -0,0 +1,29 @@
+/*
+ * YAFFS: Yet another Flash File System. A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1 as
+ * published by the Free Software Foundation.
+ *
+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
+ */
+
+#ifndef __YAFFS_MTDIF1_H__
+#define __YAFFS_MTDIF1_H__
+
+int nandmtd1_write_chunk_tags(struct yaffs_dev *dev, int nand_chunk,
+			      const u8 *data,
+			      const struct yaffs_ext_tags *tags);
+
+int nandmtd1_read_chunk_tags(struct yaffs_dev *dev, int nand_chunk,
+			     u8 *data, struct yaffs_ext_tags *tags);
+
+int nandmtd1_mark_block_bad(struct yaffs_dev *dev, int block_no);
+
+int nandmtd1_query_block(struct yaffs_dev *dev, int block_no,
+			 enum yaffs_block_state *state, u32 *seq_number);
+
+#endif
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_mtdif2.c linux-3.0.82x/fs/yaffs2/yaffs_mtdif2.c
--- linux-3.0.82/fs/yaffs2/yaffs_mtdif2.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_mtdif2.c	2017-09-23 03:42:50.302674195 +0800
@@ -0,0 +1,262 @@
+/*
+ * YAFFS: Yet Another Flash File System. A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/* mtd interface for YAFFS2 */
+
+#include "yportenv.h"
+#include "yaffs_trace.h"
+
+#include "yaffs_mtdif2.h"
+
+#include "linux/mtd/mtd.h"
+#include "linux/types.h"
+#include "linux/time.h"
+
+#include "yaffs_packedtags2.h"
+
+#include "yaffs_linux.h"
+
+/* NB For use with inband tags....
+ * We assume that the data buffer is of size total_bytes_per_chunk so
+ * that we can also use it to load the tags.
+ */
+int nandmtd2_write_chunk_tags(struct yaffs_dev *dev, int nand_chunk,
+			      const u8 *data,
+			      const struct yaffs_ext_tags *tags)
+{
+	struct mtd_info *mtd = yaffs_dev_to_mtd(dev);
+#if (MTD_VERSION_CODE > MTD_VERSION(2, 6, 17))
+	struct mtd_oob_ops ops;
+#else
+	size_t dummy;
+#endif
+	int retval = 0;
+
+	loff_t addr;
+
+	struct yaffs_packed_tags2 pt;
+
+	int packed_tags_size =
+	    dev->param.no_tags_ecc ? sizeof(pt.t) : sizeof(pt);
+	void *packed_tags_ptr =
+	    dev->param.no_tags_ecc ? (void *)&pt.t : (void *)&pt;
+
+	yaffs_trace(YAFFS_TRACE_MTD,
+		"nandmtd2_write_chunk_tags chunk %d data %p tags %p",
+		nand_chunk, data, tags);
+
+	addr = ((loff_t) nand_chunk) * dev->param.total_bytes_per_chunk;
+
+	/* For yaffs2 writing there must be both data and tags.
+	 * If we're using inband tags, then the tags are stuffed into
+	 * the end of the data buffer.
+	 */
+	if (!data || !tags)
+		BUG();
+	else if (dev->param.inband_tags) {
+		struct yaffs_packed_tags2_tags_only *pt2tp;
+		pt2tp =
+		    (struct yaffs_packed_tags2_tags_only *)(data +
+							dev->
+							data_bytes_per_chunk);
+		yaffs_pack_tags2_tags_only(pt2tp, tags);
+	} else {
+		yaffs_pack_tags2(&pt, tags, !dev->param.no_tags_ecc);
+	}
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 17))
+	ops.mode = MTD_OOB_AUTO;
+	ops.ooblen = (dev->param.inband_tags) ? 0 : packed_tags_size;
+	ops.len = dev->param.total_bytes_per_chunk;
+	ops.ooboffs = 0;
+	ops.datbuf = (u8 *) data;
+	ops.oobbuf = (dev->param.inband_tags) ? NULL : packed_tags_ptr;
+	retval = mtd->write_oob(mtd, addr, &ops);
+
+#else
+	if (!dev->param.inband_tags) {
+		retval =
+		    mtd->write_ecc(mtd, addr, dev->data_bytes_per_chunk,
+				   &dummy, data, (u8 *) packed_tags_ptr, NULL);
+	} else {
+		retval =
+		    mtd->write(mtd, addr, dev->param.total_bytes_per_chunk,
+			       &dummy, data);
+	}
+#endif
+
+	if (retval == 0)
+		return YAFFS_OK;
+	else
+		return YAFFS_FAIL;
+}
+
+int nandmtd2_read_chunk_tags(struct yaffs_dev *dev, int nand_chunk,
+			     u8 *data, struct yaffs_ext_tags *tags)
+{
+	struct mtd_info *mtd = yaffs_dev_to_mtd(dev);
+#if (MTD_VERSION_CODE > MTD_VERSION(2, 6, 17))
+	struct mtd_oob_ops ops;
+#endif
+	size_t dummy;
+	int retval = 0;
+	int local_data = 0;
+
+	loff_t addr = ((loff_t) nand_chunk) * dev->param.total_bytes_per_chunk;
+
+	struct yaffs_packed_tags2 pt;
+
+	int packed_tags_size =
+	    dev->param.no_tags_ecc ? sizeof(pt.t) : sizeof(pt);
+	void *packed_tags_ptr =
+	    dev->param.no_tags_ecc ? (void *)&pt.t : (void *)&pt;
+
+	yaffs_trace(YAFFS_TRACE_MTD,
+		"nandmtd2_read_chunk_tags chunk %d data %p tags %p",
+		nand_chunk, data, tags);
+
+	if (dev->param.inband_tags) {
+
+		if (!data) {
+			local_data = 1;
+			data = yaffs_get_temp_buffer(dev);
+		}
+
+	}
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 17))
+	if (dev->param.inband_tags || (data && !tags))
+		retval = mtd->read(mtd, addr, dev->param.total_bytes_per_chunk,
+				   &dummy, data);
+	else if (tags) {
+		ops.mode = MTD_OOB_AUTO;
+		ops.ooblen = packed_tags_size;
+		ops.len = data ? dev->data_bytes_per_chunk : packed_tags_size;
+		ops.ooboffs = 0;
+		ops.datbuf = data;
+		ops.oobbuf = yaffs_dev_to_lc(dev)->spare_buffer;
+		retval = mtd->read_oob(mtd, addr, &ops);
+	}
+#else
+	if (!dev->param.inband_tags && data && tags) {
+
+		retval = mtd->read_ecc(mtd, addr, dev->data_bytes_per_chunk,
+				       &dummy, data, dev->spare_buffer, NULL);
+	} else {
+		if (data)
+			retval =
+			    mtd->read(mtd, addr, dev->data_bytes_per_chunk,
+				      &dummy, data);
+		if (!dev->param.inband_tags && tags)
+			retval =
+			    mtd->read_oob(mtd, addr, mtd->oobsize, &dummy,
+					  dev->spare_buffer);
+	}
+#endif
+
+	if (dev->param.inband_tags) {
+		if (tags) {
+			struct yaffs_packed_tags2_tags_only *pt2tp;
+			pt2tp =
+				(struct yaffs_packed_tags2_tags_only *)
+				&data[dev->data_bytes_per_chunk];
+			yaffs_unpack_tags2_tags_only(tags, pt2tp);
+		}
+	} else {
+		if (tags) {
+			memcpy(packed_tags_ptr,
+			       yaffs_dev_to_lc(dev)->spare_buffer,
+			       packed_tags_size);
+			yaffs_unpack_tags2(tags, &pt, !dev->param.no_tags_ecc);
+		}
+	}
+
+	if (local_data)
+		yaffs_release_temp_buffer(dev, data);
+
+	if (tags && retval == -EBADMSG
+	    && tags->ecc_result == YAFFS_ECC_RESULT_NO_ERROR) {
+		tags->ecc_result = YAFFS_ECC_RESULT_UNFIXED;
+		dev->n_ecc_unfixed++;
+	}
+	if (tags && retval == -EUCLEAN
+	    && tags->ecc_result == YAFFS_ECC_RESULT_NO_ERROR) {
+		tags->ecc_result = YAFFS_ECC_RESULT_FIXED;
+		dev->n_ecc_fixed++;
+	}
+	if (retval == 0)
+		return YAFFS_OK;
+	else
+		return YAFFS_FAIL;
+}
+
+int nandmtd2_mark_block_bad(struct yaffs_dev *dev, int block_no)
+{
+	struct mtd_info *mtd = yaffs_dev_to_mtd(dev);
+	int retval;
+	yaffs_trace(YAFFS_TRACE_MTD,
+		"nandmtd2_mark_block_bad %d",
+		block_no);
+
+	retval =
+	    mtd->block_markbad(mtd,
+			       block_no * dev->param.chunks_per_block *
+			       dev->param.total_bytes_per_chunk);
+
+	if (retval == 0)
+		return YAFFS_OK;
+	else
+		return YAFFS_FAIL;
+
+}
+
+int nandmtd2_query_block(struct yaffs_dev *dev, int block_no,
+			 enum yaffs_block_state *state, u32 *seq_number)
+{
+	struct mtd_info *mtd = yaffs_dev_to_mtd(dev);
+	int retval;
+
+	yaffs_trace(YAFFS_TRACE_MTD, "nandmtd2_query_block %d", block_no);
+	retval =
+	    mtd->block_isbad(mtd,
+			     block_no * dev->param.chunks_per_block *
+			     dev->param.total_bytes_per_chunk);
+
+	if (retval) {
+		yaffs_trace(YAFFS_TRACE_MTD, "block is bad");
+
+		*state = YAFFS_BLOCK_STATE_DEAD;
+		*seq_number = 0;
+	} else {
+		struct yaffs_ext_tags t;
+		nandmtd2_read_chunk_tags(dev, block_no *
+					 dev->param.chunks_per_block, NULL, &t);
+
+		if (t.chunk_used) {
+			*seq_number = t.seq_number;
+			*state = YAFFS_BLOCK_STATE_NEEDS_SCAN;
+		} else {
+			*seq_number = 0;
+			*state = YAFFS_BLOCK_STATE_EMPTY;
+		}
+	}
+	yaffs_trace(YAFFS_TRACE_MTD,
+		"block is bad seq %d state %d",
+		*seq_number, *state);
+
+	if (retval == 0)
+		return YAFFS_OK;
+	else
+		return YAFFS_FAIL;
+}
+
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_mtdif2.h linux-3.0.82x/fs/yaffs2/yaffs_mtdif2.h
--- linux-3.0.82/fs/yaffs2/yaffs_mtdif2.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_mtdif2.h	2017-09-23 03:42:50.302674195 +0800
@@ -0,0 +1,29 @@
+/*
+ * YAFFS: Yet another Flash File System . A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1 as
+ * published by the Free Software Foundation.
+ *
+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
+ */
+
+#ifndef __YAFFS_MTDIF2_H__
+#define __YAFFS_MTDIF2_H__
+
+#include "yaffs_guts.h"
+int nandmtd2_write_chunk_tags(struct yaffs_dev *dev, int nand_chunk,
+			      const u8 *data,
+			      const struct yaffs_ext_tags *tags);
+int nandmtd2_read_chunk_tags(struct yaffs_dev *dev, int nand_chunk,
+			     u8 *data, struct yaffs_ext_tags *tags);
+int nandmtd2_mark_block_bad(struct yaffs_dev *dev, int block_no);
+int nandmtd2_query_block(struct yaffs_dev *dev, int block_no,
+			 enum yaffs_block_state *state, u32 *seq_number);
+
+#endif
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_mtdif.c linux-3.0.82x/fs/yaffs2/yaffs_mtdif.c
--- linux-3.0.82/fs/yaffs2/yaffs_mtdif.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_mtdif.c	2017-09-23 03:42:50.302674195 +0800
@@ -0,0 +1,53 @@
+/*
+ * YAFFS: Yet Another Flash File System. A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "yportenv.h"
+
+#include "yaffs_mtdif.h"
+
+#include "linux/mtd/mtd.h"
+#include "linux/types.h"
+#include "linux/time.h"
+#include "linux/mtd/nand.h"
+
+#include "yaffs_linux.h"
+
+int nandmtd_erase_block(struct yaffs_dev *dev, int block_no)
+{
+	struct mtd_info *mtd = yaffs_dev_to_mtd(dev);
+	u32 addr =
+	    ((loff_t) block_no) * dev->param.total_bytes_per_chunk *
+	    dev->param.chunks_per_block;
+	struct erase_info ei;
+	int retval = 0;
+
+	ei.mtd = mtd;
+	ei.addr = addr;
+	ei.len = dev->param.total_bytes_per_chunk * dev->param.chunks_per_block;
+	ei.time = 1000;
+	ei.retries = 2;
+	ei.callback = NULL;
+	ei.priv = (u_long) dev;
+
+	retval = mtd->erase(mtd, &ei);
+
+	if (retval == 0)
+		return YAFFS_OK;
+
+	return YAFFS_FAIL;
+}
+
+int nandmtd_initialise(struct yaffs_dev *dev)
+{
+	return YAFFS_OK;
+}
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_mtdif.h linux-3.0.82x/fs/yaffs2/yaffs_mtdif.h
--- linux-3.0.82/fs/yaffs2/yaffs_mtdif.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_mtdif.h	2017-09-23 03:42:50.302674195 +0800
@@ -0,0 +1,23 @@
+/*
+ * YAFFS: Yet another Flash File System . A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1 as
+ * published by the Free Software Foundation.
+ *
+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
+ */
+
+#ifndef __YAFFS_MTDIF_H__
+#define __YAFFS_MTDIF_H__
+
+#include "yaffs_guts.h"
+
+int nandmtd_erase_block(struct yaffs_dev *dev, int block_no);
+int nandmtd_initialise(struct yaffs_dev *dev);
+#endif
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_nameval.c linux-3.0.82x/fs/yaffs2/yaffs_nameval.c
--- linux-3.0.82/fs/yaffs2/yaffs_nameval.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_nameval.c	2017-09-23 03:42:50.302674195 +0800
@@ -0,0 +1,207 @@
+/*
+ * YAFFS: Yet Another Flash File System. A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * This simple implementation of a name-value store assumes a small number of
+* values and fits into a small finite buffer.
+ *
+ * Each attribute is stored as a record:
+ *  sizeof(int) bytes   record size.
+ *  strnlen+1 bytes name null terminated.
+ *  nbytes    value.
+ *  ----------
+ *  total size  stored in record size
+ *
+ * This code has not been tested with unicode yet.
+ */
+
+#include "yaffs_nameval.h"
+
+#include "yportenv.h"
+
+static int nval_find(const char *xb, int xb_size, const YCHAR *name,
+		     int *exist_size)
+{
+	int pos = 0;
+	int size;
+
+	memcpy(&size, xb, sizeof(int));
+	while (size > 0 && (size < xb_size) && (pos + size < xb_size)) {
+		if (!strncmp((YCHAR *) (xb + pos + sizeof(int)), name, size)) {
+			if (exist_size)
+				*exist_size = size;
+			return pos;
+		}
+		pos += size;
+		if (pos < xb_size - sizeof(int))
+			memcpy(&size, xb + pos, sizeof(int));
+		else
+			size = 0;
+	}
+	if (exist_size)
+		*exist_size = 0;
+	return -ENODATA;
+}
+
+static int nval_used(const char *xb, int xb_size)
+{
+	int pos = 0;
+	int size;
+
+	memcpy(&size, xb + pos, sizeof(int));
+	while (size > 0 && (size < xb_size) && (pos + size < xb_size)) {
+		pos += size;
+		if (pos < xb_size - sizeof(int))
+			memcpy(&size, xb + pos, sizeof(int));
+		else
+			size = 0;
+	}
+	return pos;
+}
+
+int nval_del(char *xb, int xb_size, const YCHAR *name)
+{
+	int pos = nval_find(xb, xb_size, name, NULL);
+	int size;
+
+	if (pos < 0 || pos >= xb_size)
+		return -ENODATA;
+
+	/* Find size, shift rest over this record,
+	 * then zero out the rest of buffer */
+	memcpy(&size, xb + pos, sizeof(int));
+	memcpy(xb + pos, xb + pos + size, xb_size - (pos + size));
+	memset(xb + (xb_size - size), 0, size);
+	return 0;
+}
+
+int nval_set(char *xb, int xb_size, const YCHAR *name, const char *buf,
+		int bsize, int flags)
+{
+	int pos;
+	int namelen = strnlen(name, xb_size);
+	int reclen;
+	int size_exist = 0;
+	int space;
+	int start;
+
+	pos = nval_find(xb, xb_size, name, &size_exist);
+
+	if (flags & XATTR_CREATE && pos >= 0)
+		return -EEXIST;
+	if (flags & XATTR_REPLACE && pos < 0)
+		return -ENODATA;
+
+	start = nval_used(xb, xb_size);
+	space = xb_size - start + size_exist;
+
+	reclen = (sizeof(int) + namelen + 1 + bsize);
+
+	if (reclen > space)
+		return -ENOSPC;
+
+	if (pos >= 0) {
+		nval_del(xb, xb_size, name);
+		start = nval_used(xb, xb_size);
+	}
+
+	pos = start;
+
+	memcpy(xb + pos, &reclen, sizeof(int));
+	pos += sizeof(int);
+	strncpy((YCHAR *) (xb + pos), name, reclen);
+	pos += (namelen + 1);
+	memcpy(xb + pos, buf, bsize);
+	return 0;
+}
+
+int nval_get(const char *xb, int xb_size, const YCHAR * name, char *buf,
+	     int bsize)
+{
+	int pos = nval_find(xb, xb_size, name, NULL);
+	int size;
+
+	if (pos >= 0 && pos < xb_size) {
+
+		memcpy(&size, xb + pos, sizeof(int));
+		pos += sizeof(int);	/* advance past record length */
+		size -= sizeof(int);
+
+		/* Advance over name string */
+		while (xb[pos] && size > 0 && pos < xb_size) {
+			pos++;
+			size--;
+		}
+		/*Advance over NUL */
+		pos++;
+		size--;
+
+		/* If bsize is zero then this is a size query.
+		 * Return the size, but don't copy.
+		 */
+		if (!bsize)
+			return size;
+
+		if (size <= bsize) {
+			memcpy(buf, xb + pos, size);
+			return size;
+		}
+	}
+	if (pos >= 0)
+		return -ERANGE;
+
+	return -ENODATA;
+}
+
+int nval_list(const char *xb, int xb_size, char *buf, int bsize)
+{
+	int pos = 0;
+	int size;
+	int name_len;
+	int ncopied = 0;
+	int filled = 0;
+
+	memcpy(&size, xb + pos, sizeof(int));
+	while (size > sizeof(int) &&
+		size <= xb_size &&
+		(pos + size) < xb_size &&
+		!filled) {
+		pos += sizeof(int);
+		size -= sizeof(int);
+		name_len = strnlen((YCHAR *) (xb + pos), size);
+		if (ncopied + name_len + 1 < bsize) {
+			memcpy(buf, xb + pos, name_len * sizeof(YCHAR));
+			buf += name_len;
+			*buf = '\0';
+			buf++;
+			if (sizeof(YCHAR) > 1) {
+				*buf = '\0';
+				buf++;
+			}
+			ncopied += (name_len + 1);
+		} else {
+			filled = 1;
+		}
+		pos += size;
+		if (pos < xb_size - sizeof(int))
+			memcpy(&size, xb + pos, sizeof(int));
+		else
+			size = 0;
+	}
+	return ncopied;
+}
+
+int nval_hasvalues(const char *xb, int xb_size)
+{
+	return nval_used(xb, xb_size) > 0;
+}
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_nameval.h linux-3.0.82x/fs/yaffs2/yaffs_nameval.h
--- linux-3.0.82/fs/yaffs2/yaffs_nameval.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_nameval.h	2017-09-23 03:42:50.306674183 +0800
@@ -0,0 +1,28 @@
+/*
+ * YAFFS: Yet another Flash File System . A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1 as
+ * published by the Free Software Foundation.
+ *
+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
+ */
+
+#ifndef __NAMEVAL_H__
+#define __NAMEVAL_H__
+
+#include "yportenv.h"
+
+int nval_del(char *xb, int xb_size, const YCHAR * name);
+int nval_set(char *xb, int xb_size, const YCHAR * name, const char *buf,
+	     int bsize, int flags);
+int nval_get(const char *xb, int xb_size, const YCHAR * name, char *buf,
+	     int bsize);
+int nval_list(const char *xb, int xb_size, char *buf, int bsize);
+int nval_hasvalues(const char *xb, int xb_size);
+#endif
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_nand.c linux-3.0.82x/fs/yaffs2/yaffs_nand.c
--- linux-3.0.82/fs/yaffs2/yaffs_nand.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_nand.c	2017-09-23 03:42:50.306674183 +0800
@@ -0,0 +1,120 @@
+/*
+ * YAFFS: Yet Another Flash File System. A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "yaffs_nand.h"
+#include "yaffs_tagscompat.h"
+
+#include "yaffs_getblockinfo.h"
+#include "yaffs_summary.h"
+
+int yaffs_rd_chunk_tags_nand(struct yaffs_dev *dev, int nand_chunk,
+			     u8 *buffer, struct yaffs_ext_tags *tags)
+{
+	int result;
+	struct yaffs_ext_tags local_tags;
+	int flash_chunk = nand_chunk - dev->chunk_offset;
+
+	dev->n_page_reads++;
+
+	/* If there are no tags provided use local tags. */
+	if (!tags)
+		tags = &local_tags;
+
+	if (dev->param.read_chunk_tags_fn)
+		result =
+		    dev->param.read_chunk_tags_fn(dev, flash_chunk, buffer,
+						  tags);
+	else
+		result = yaffs_tags_compat_rd(dev,
+					      flash_chunk, buffer, tags);
+	if (tags && tags->ecc_result > YAFFS_ECC_RESULT_NO_ERROR) {
+
+		struct yaffs_block_info *bi;
+		bi = yaffs_get_block_info(dev,
+					  nand_chunk /
+					  dev->param.chunks_per_block);
+		yaffs_handle_chunk_error(dev, bi);
+	}
+	return result;
+}
+
+int yaffs_wr_chunk_tags_nand(struct yaffs_dev *dev,
+				int nand_chunk,
+				const u8 *buffer, struct yaffs_ext_tags *tags)
+{
+	int result;
+	int flash_chunk = nand_chunk - dev->chunk_offset;
+
+	dev->n_page_writes++;
+
+	if (tags) {
+		tags->seq_number = dev->seq_number;
+		tags->chunk_used = 1;
+		yaffs_trace(YAFFS_TRACE_WRITE,
+			"Writing chunk %d tags %d %d",
+			nand_chunk, tags->obj_id, tags->chunk_id);
+	} else {
+		yaffs_trace(YAFFS_TRACE_ERROR, "Writing with no tags");
+		BUG();
+		return YAFFS_FAIL;
+	}
+
+	if (dev->param.write_chunk_tags_fn)
+		result = dev->param.write_chunk_tags_fn(dev, flash_chunk,
+							buffer, tags);
+	else
+		result = yaffs_tags_compat_wr(dev, flash_chunk, buffer, tags);
+
+	yaffs_summary_add(dev, tags, nand_chunk);
+
+	return result;
+}
+
+int yaffs_mark_bad(struct yaffs_dev *dev, int block_no)
+{
+	block_no -= dev->block_offset;
+	if (dev->param.bad_block_fn)
+		return dev->param.bad_block_fn(dev, block_no);
+
+	return yaffs_tags_compat_mark_bad(dev, block_no);
+}
+
+int yaffs_query_init_block_state(struct yaffs_dev *dev,
+				 int block_no,
+				 enum yaffs_block_state *state,
+				 u32 *seq_number)
+{
+	block_no -= dev->block_offset;
+	if (dev->param.query_block_fn)
+		return dev->param.query_block_fn(dev, block_no, state,
+						 seq_number);
+
+	return yaffs_tags_compat_query_block(dev, block_no, state, seq_number);
+}
+
+int yaffs_erase_block(struct yaffs_dev *dev, int flash_block)
+{
+	int result;
+
+	flash_block -= dev->block_offset;
+	dev->n_erasures++;
+	result = dev->param.erase_fn(dev, flash_block);
+	return result;
+}
+
+int yaffs_init_nand(struct yaffs_dev *dev)
+{
+	if (dev->param.initialise_flash_fn)
+		return dev->param.initialise_flash_fn(dev);
+	return YAFFS_OK;
+}
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_nand.h linux-3.0.82x/fs/yaffs2/yaffs_nand.h
--- linux-3.0.82/fs/yaffs2/yaffs_nand.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_nand.h	2017-09-23 03:42:50.306674183 +0800
@@ -0,0 +1,38 @@
+/*
+ * YAFFS: Yet another Flash File System . A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1 as
+ * published by the Free Software Foundation.
+ *
+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
+ */
+
+#ifndef __YAFFS_NAND_H__
+#define __YAFFS_NAND_H__
+#include "yaffs_guts.h"
+
+int yaffs_rd_chunk_tags_nand(struct yaffs_dev *dev, int nand_chunk,
+			     u8 *buffer, struct yaffs_ext_tags *tags);
+
+int yaffs_wr_chunk_tags_nand(struct yaffs_dev *dev,
+			     int nand_chunk,
+			     const u8 *buffer, struct yaffs_ext_tags *tags);
+
+int yaffs_mark_bad(struct yaffs_dev *dev, int block_no);
+
+int yaffs_query_init_block_state(struct yaffs_dev *dev,
+				 int block_no,
+				 enum yaffs_block_state *state,
+				 unsigned *seq_number);
+
+int yaffs_erase_block(struct yaffs_dev *dev, int flash_block);
+
+int yaffs_init_nand(struct yaffs_dev *dev);
+
+#endif
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_packedtags1.c linux-3.0.82x/fs/yaffs2/yaffs_packedtags1.c
--- linux-3.0.82/fs/yaffs2/yaffs_packedtags1.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_packedtags1.c	2017-09-23 03:42:50.306674183 +0800
@@ -0,0 +1,56 @@
+/*
+ * YAFFS: Yet Another Flash File System. A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "yaffs_packedtags1.h"
+#include "yportenv.h"
+
+static const u8 all_ff[20] = {
+	0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff
+};
+
+void yaffs_pack_tags1(struct yaffs_packed_tags1 *pt,
+		      const struct yaffs_ext_tags *t)
+{
+	pt->chunk_id = t->chunk_id;
+	pt->serial_number = t->serial_number;
+	pt->n_bytes = t->n_bytes;
+	pt->obj_id = t->obj_id;
+	pt->ecc = 0;
+	pt->deleted = (t->is_deleted) ? 0 : 1;
+	pt->unused_stuff = 0;
+	pt->should_be_ff = 0xffffffff;
+}
+
+void yaffs_unpack_tags1(struct yaffs_ext_tags *t,
+			const struct yaffs_packed_tags1 *pt)
+{
+
+	if (memcmp(all_ff, pt, sizeof(struct yaffs_packed_tags1))) {
+		t->block_bad = 0;
+		if (pt->should_be_ff != 0xffffffff)
+			t->block_bad = 1;
+		t->chunk_used = 1;
+		t->obj_id = pt->obj_id;
+		t->chunk_id = pt->chunk_id;
+		t->n_bytes = pt->n_bytes;
+		t->ecc_result = YAFFS_ECC_RESULT_NO_ERROR;
+		t->is_deleted = (pt->deleted) ? 0 : 1;
+		t->serial_number = pt->serial_number;
+	} else {
+		memset(t, 0, sizeof(struct yaffs_ext_tags));
+	}
+}
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_packedtags1.h linux-3.0.82x/fs/yaffs2/yaffs_packedtags1.h
--- linux-3.0.82/fs/yaffs2/yaffs_packedtags1.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_packedtags1.h	2017-09-23 03:42:50.306674183 +0800
@@ -0,0 +1,39 @@
+/*
+ * YAFFS: Yet another Flash File System . A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1 as
+ * published by the Free Software Foundation.
+ *
+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
+ */
+
+/* This is used to pack YAFFS1 tags, not YAFFS2 tags. */
+
+#ifndef __YAFFS_PACKEDTAGS1_H__
+#define __YAFFS_PACKEDTAGS1_H__
+
+#include "yaffs_guts.h"
+
+struct yaffs_packed_tags1 {
+	unsigned chunk_id:20;
+	unsigned serial_number:2;
+	unsigned n_bytes:10;
+	unsigned obj_id:18;
+	unsigned ecc:12;
+	unsigned deleted:1;
+	unsigned unused_stuff:1;
+	unsigned should_be_ff;
+
+};
+
+void yaffs_pack_tags1(struct yaffs_packed_tags1 *pt,
+		      const struct yaffs_ext_tags *t);
+void yaffs_unpack_tags1(struct yaffs_ext_tags *t,
+			const struct yaffs_packed_tags1 *pt);
+#endif
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_packedtags2.c linux-3.0.82x/fs/yaffs2/yaffs_packedtags2.c
--- linux-3.0.82/fs/yaffs2/yaffs_packedtags2.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_packedtags2.c	2017-09-23 03:42:50.306674183 +0800
@@ -0,0 +1,181 @@
+/*
+ * YAFFS: Yet Another Flash File System. A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "yaffs_packedtags2.h"
+#include "yportenv.h"
+#include "yaffs_trace.h"
+
+/* This code packs a set of extended tags into a binary structure for
+ * NAND storage
+ */
+
+/* Some of the information is "extra" struff which can be packed in to
+ * speed scanning
+ * This is defined by having the EXTRA_HEADER_INFO_FLAG set.
+ */
+
+/* Extra flags applied to chunk_id */
+
+#define EXTRA_HEADER_INFO_FLAG	0x80000000
+#define EXTRA_SHRINK_FLAG	0x40000000
+#define EXTRA_SHADOWS_FLAG	0x20000000
+#define EXTRA_SPARE_FLAGS	0x10000000
+
+#define ALL_EXTRA_FLAGS		0xf0000000
+
+/* Also, the top 4 bits of the object Id are set to the object type. */
+#define EXTRA_OBJECT_TYPE_SHIFT (28)
+#define EXTRA_OBJECT_TYPE_MASK  ((0x0f) << EXTRA_OBJECT_TYPE_SHIFT)
+
+static void yaffs_dump_packed_tags2_tags_only(
+				const struct yaffs_packed_tags2_tags_only *ptt)
+{
+	yaffs_trace(YAFFS_TRACE_MTD,
+		"packed tags obj %d chunk %d byte %d seq %d",
+		ptt->obj_id, ptt->chunk_id, ptt->n_bytes, ptt->seq_number);
+}
+
+static void yaffs_dump_packed_tags2(const struct yaffs_packed_tags2 *pt)
+{
+	yaffs_dump_packed_tags2_tags_only(&pt->t);
+}
+
+static void yaffs_dump_tags2(const struct yaffs_ext_tags *t)
+{
+	yaffs_trace(YAFFS_TRACE_MTD,
+		"ext.tags eccres %d blkbad %d chused %d obj %d chunk%d byte %d del %d ser %d seq %d",
+		t->ecc_result, t->block_bad, t->chunk_used, t->obj_id,
+		t->chunk_id, t->n_bytes, t->is_deleted, t->serial_number,
+		t->seq_number);
+
+}
+
+void yaffs_pack_tags2_tags_only(struct yaffs_packed_tags2_tags_only *ptt,
+				const struct yaffs_ext_tags *t)
+{
+	ptt->chunk_id = t->chunk_id;
+	ptt->seq_number = t->seq_number;
+	ptt->n_bytes = t->n_bytes;
+	ptt->obj_id = t->obj_id;
+
+	if (t->chunk_id == 0 && t->extra_available) {
+		/* Store the extra header info instead */
+		/* We save the parent object in the chunk_id */
+		ptt->chunk_id = EXTRA_HEADER_INFO_FLAG | t->extra_parent_id;
+		if (t->extra_is_shrink)
+			ptt->chunk_id |= EXTRA_SHRINK_FLAG;
+		if (t->extra_shadows)
+			ptt->chunk_id |= EXTRA_SHADOWS_FLAG;
+
+		ptt->obj_id &= ~EXTRA_OBJECT_TYPE_MASK;
+		ptt->obj_id |= (t->extra_obj_type << EXTRA_OBJECT_TYPE_SHIFT);
+
+		if (t->extra_obj_type == YAFFS_OBJECT_TYPE_HARDLINK)
+			ptt->n_bytes = t->extra_equiv_id;
+		else if (t->extra_obj_type == YAFFS_OBJECT_TYPE_FILE)
+			ptt->n_bytes = t->extra_length;
+		else
+			ptt->n_bytes = 0;
+	}
+
+	yaffs_dump_packed_tags2_tags_only(ptt);
+	yaffs_dump_tags2(t);
+}
+
+void yaffs_pack_tags2(struct yaffs_packed_tags2 *pt,
+		      const struct yaffs_ext_tags *t, int tags_ecc)
+{
+	yaffs_pack_tags2_tags_only(&pt->t, t);
+
+	if (tags_ecc)
+		yaffs_ecc_calc_other((unsigned char *)&pt->t,
+				    sizeof(struct yaffs_packed_tags2_tags_only),
+				    &pt->ecc);
+}
+
+void yaffs_unpack_tags2_tags_only(struct yaffs_ext_tags *t,
+				  struct yaffs_packed_tags2_tags_only *ptt)
+{
+	memset(t, 0, sizeof(struct yaffs_ext_tags));
+
+	if (ptt->seq_number == 0xffffffff)
+		return;
+
+	t->block_bad = 0;
+	t->chunk_used = 1;
+	t->obj_id = ptt->obj_id;
+	t->chunk_id = ptt->chunk_id;
+	t->n_bytes = ptt->n_bytes;
+	t->is_deleted = 0;
+	t->serial_number = 0;
+	t->seq_number = ptt->seq_number;
+
+	/* Do extra header info stuff */
+	if (ptt->chunk_id & EXTRA_HEADER_INFO_FLAG) {
+		t->chunk_id = 0;
+		t->n_bytes = 0;
+
+		t->extra_available = 1;
+		t->extra_parent_id = ptt->chunk_id & (~(ALL_EXTRA_FLAGS));
+		t->extra_is_shrink = ptt->chunk_id & EXTRA_SHRINK_FLAG ? 1 : 0;
+		t->extra_shadows = ptt->chunk_id & EXTRA_SHADOWS_FLAG ? 1 : 0;
+		t->extra_obj_type = ptt->obj_id >> EXTRA_OBJECT_TYPE_SHIFT;
+		t->obj_id &= ~EXTRA_OBJECT_TYPE_MASK;
+
+		if (t->extra_obj_type == YAFFS_OBJECT_TYPE_HARDLINK)
+			t->extra_equiv_id = ptt->n_bytes;
+		else
+			t->extra_length = ptt->n_bytes;
+	}
+	yaffs_dump_packed_tags2_tags_only(ptt);
+	yaffs_dump_tags2(t);
+}
+
+void yaffs_unpack_tags2(struct yaffs_ext_tags *t, struct yaffs_packed_tags2 *pt,
+			int tags_ecc)
+{
+	enum yaffs_ecc_result ecc_result = YAFFS_ECC_RESULT_NO_ERROR;
+
+	if (pt->t.seq_number != 0xffffffff && tags_ecc) {
+		/* Chunk is in use and we need to do ECC */
+
+		struct yaffs_ecc_other ecc;
+		int result;
+		yaffs_ecc_calc_other((unsigned char *)&pt->t,
+				sizeof(struct yaffs_packed_tags2_tags_only),
+				&ecc);
+		result =
+		    yaffs_ecc_correct_other((unsigned char *)&pt->t,
+				sizeof(struct yaffs_packed_tags2_tags_only),
+				&pt->ecc, &ecc);
+		switch (result) {
+		case 0:
+			ecc_result = YAFFS_ECC_RESULT_NO_ERROR;
+			break;
+		case 1:
+			ecc_result = YAFFS_ECC_RESULT_FIXED;
+			break;
+		case -1:
+			ecc_result = YAFFS_ECC_RESULT_UNFIXED;
+			break;
+		default:
+			ecc_result = YAFFS_ECC_RESULT_UNKNOWN;
+		}
+	}
+	yaffs_unpack_tags2_tags_only(t, &pt->t);
+
+	t->ecc_result = ecc_result;
+
+	yaffs_dump_packed_tags2(pt);
+	yaffs_dump_tags2(t);
+}
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_packedtags2.h linux-3.0.82x/fs/yaffs2/yaffs_packedtags2.h
--- linux-3.0.82/fs/yaffs2/yaffs_packedtags2.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_packedtags2.h	2017-09-23 03:42:50.306674183 +0800
@@ -0,0 +1,47 @@
+/*
+ * YAFFS: Yet another Flash File System . A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1 as
+ * published by the Free Software Foundation.
+ *
+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
+ */
+
+/* This is used to pack YAFFS2 tags, not YAFFS1tags. */
+
+#ifndef __YAFFS_PACKEDTAGS2_H__
+#define __YAFFS_PACKEDTAGS2_H__
+
+#include "yaffs_guts.h"
+#include "yaffs_ecc.h"
+
+struct yaffs_packed_tags2_tags_only {
+	unsigned seq_number;
+	unsigned obj_id;
+	unsigned chunk_id;
+	unsigned n_bytes;
+};
+
+struct yaffs_packed_tags2 {
+	struct yaffs_packed_tags2_tags_only t;
+	struct yaffs_ecc_other ecc;
+};
+
+/* Full packed tags with ECC, used for oob tags */
+void yaffs_pack_tags2(struct yaffs_packed_tags2 *pt,
+		      const struct yaffs_ext_tags *t, int tags_ecc);
+void yaffs_unpack_tags2(struct yaffs_ext_tags *t, struct yaffs_packed_tags2 *pt,
+			int tags_ecc);
+
+/* Only the tags part (no ECC for use with inband tags */
+void yaffs_pack_tags2_tags_only(struct yaffs_packed_tags2_tags_only *pt,
+				const struct yaffs_ext_tags *t);
+void yaffs_unpack_tags2_tags_only(struct yaffs_ext_tags *t,
+				  struct yaffs_packed_tags2_tags_only *pt);
+#endif
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_summary.c linux-3.0.82x/fs/yaffs2/yaffs_summary.c
--- linux-3.0.82/fs/yaffs2/yaffs_summary.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_summary.c	2017-09-23 03:42:50.306674183 +0800
@@ -0,0 +1,252 @@
+/*
+ * YAFFS: Yet Another Flash File System. A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/* Summaries write the useful part of the tags for the chunks in a block into an
+ * an array which is written to the last n chunks of the block.
+ * Reading the summaries gives all the tags for the block in one read. Much
+ * faster.
+ *
+ * Chunks holding summaries are marked with tags making it look like
+ * they are part of a fake file.
+ *
+ * The summary could also be used during gc.
+ *
+ */
+
+#include "yaffs_summary.h"
+#include "yaffs_packedtags2.h"
+#include "yaffs_nand.h"
+#include "yaffs_getblockinfo.h"
+#include "yaffs_bitmap.h"
+
+/* Summary tags don't need the sequence number because that is redundant. */
+struct yaffs_summary_tags {
+	unsigned obj_id;
+	unsigned chunk_id;
+	unsigned n_bytes;
+};
+
+static void yaffs_summary_clear(struct yaffs_dev *dev)
+{
+	if(!dev->sum_tags)
+		return;
+	memset(dev->sum_tags, 0, dev->chunks_per_summary *
+		sizeof(struct yaffs_summary_tags));
+}
+
+int yaffs_summary_init(struct yaffs_dev *dev)
+{
+	int sum_bytes;
+	int chunks_used; /* Number of chunks used by summary */
+
+	sum_bytes = dev->param.chunks_per_block *
+			sizeof(struct yaffs_summary_tags);
+
+	chunks_used = (sum_bytes + dev->data_bytes_per_chunk - 1)/
+			dev->data_bytes_per_chunk;
+	dev->chunks_per_summary = dev->param.chunks_per_block - chunks_used;
+	dev->sum_tags = kmalloc(sizeof(struct yaffs_summary_tags) *
+				dev->chunks_per_summary, GFP_NOFS);
+	dev->gc_sum_tags = kmalloc(sizeof(struct yaffs_summary_tags) *
+				dev->chunks_per_summary, GFP_NOFS);
+	if(!dev->sum_tags || !dev->gc_sum_tags) {
+		kfree(dev->sum_tags);
+		kfree(dev->gc_sum_tags);
+		return YAFFS_FAIL;
+	}
+
+	yaffs_summary_clear(dev);
+
+	return YAFFS_OK;
+}
+
+void yaffs_summary_deinit(struct yaffs_dev *dev)
+{
+	kfree(dev->sum_tags);
+	dev->sum_tags = NULL;
+	kfree(dev->gc_sum_tags);
+	dev->gc_sum_tags = NULL;
+	dev->chunks_per_summary = 0;
+}
+
+static int yaffs_summary_write(struct yaffs_dev *dev, int blk)
+{
+	struct yaffs_ext_tags tags;
+	u8 *buffer;
+	u8 *sum_buffer = (u8 *)dev->sum_tags;
+	int n_bytes;
+	int chunk_in_nand;
+	int chunk_in_block;
+	int result;
+	int this_tx;
+	struct yaffs_block_info *bi = yaffs_get_block_info(dev, blk);
+
+	buffer = yaffs_get_temp_buffer(dev);
+	n_bytes = sizeof(struct yaffs_summary_tags) * dev->chunks_per_summary;
+	memset(&tags, 0, sizeof(struct yaffs_ext_tags));
+	tags.obj_id = YAFFS_OBJECTID_SUMMARY;
+	tags.chunk_id = 1;
+	chunk_in_block = dev->chunks_per_summary;
+	chunk_in_nand = dev->alloc_block * dev->param.chunks_per_block +
+						dev-> chunks_per_summary;
+	do {
+		this_tx = n_bytes;
+		if (this_tx > dev->data_bytes_per_chunk)
+			this_tx = dev->data_bytes_per_chunk;
+		memcpy(buffer, sum_buffer, this_tx);
+		tags.n_bytes = this_tx;
+		result = yaffs_wr_chunk_tags_nand(dev, chunk_in_nand,
+						buffer, &tags);
+
+		if (result != YAFFS_OK)
+			break;
+		yaffs_set_chunk_bit(dev, blk, chunk_in_block);
+		bi->pages_in_use++;
+		dev->n_free_chunks--;
+
+		n_bytes -= this_tx;
+		sum_buffer += this_tx;
+		chunk_in_nand++;
+		chunk_in_block++;
+		tags.chunk_id++;
+	} while (result == YAFFS_OK && n_bytes > 0);
+	yaffs_release_temp_buffer(dev, buffer);
+
+
+	if (result == YAFFS_OK)
+		bi->has_summary = 1;
+
+
+	return result;
+}
+
+int yaffs_summary_read(struct yaffs_dev *dev,
+			struct yaffs_summary_tags *st,
+			int blk)
+{
+	struct yaffs_ext_tags tags;
+	u8 *buffer;
+	u8 *sum_buffer = (u8 *)st;
+	int n_bytes;
+	int chunk_id;
+	int chunk_in_nand;
+	int chunk_in_block;
+	int result;
+	int this_tx;
+	struct yaffs_block_info *bi = yaffs_get_block_info(dev, blk);
+
+	buffer = yaffs_get_temp_buffer(dev);
+	n_bytes = sizeof(struct yaffs_summary_tags) * dev->chunks_per_summary;
+	chunk_in_block = dev->chunks_per_summary;
+	chunk_in_nand = blk * dev->param.chunks_per_block +
+							dev->chunks_per_summary;
+	chunk_id = 1;
+	do {
+		this_tx = n_bytes;
+		if(this_tx > dev->data_bytes_per_chunk)
+			this_tx = dev->data_bytes_per_chunk;
+		result = yaffs_rd_chunk_tags_nand(dev, chunk_in_nand,
+						buffer, &tags);
+
+		if (tags.chunk_id != chunk_id ||
+			tags.obj_id != YAFFS_OBJECTID_SUMMARY ||
+			tags.chunk_used == 0 ||
+			tags.ecc_result > YAFFS_ECC_RESULT_FIXED ||
+			this_tx != tags.n_bytes)
+				result = YAFFS_FAIL;
+		if (result != YAFFS_OK)
+			break;
+
+		if (st == dev->sum_tags) {
+			/* If we're scanning then update the block info */
+			yaffs_set_chunk_bit(dev, blk, chunk_in_block);
+			bi->pages_in_use++;
+		}
+
+		memcpy(sum_buffer, buffer, this_tx);
+		n_bytes -= this_tx;
+		sum_buffer += this_tx;
+		chunk_in_nand++;
+		chunk_in_block++;
+		chunk_id++;
+	} while (result == YAFFS_OK && n_bytes > 0);
+	yaffs_release_temp_buffer(dev, buffer);
+
+	if (st == dev->sum_tags && result == YAFFS_OK)
+		bi->has_summary = 1;
+
+	return result;
+}
+int yaffs_summary_add(struct yaffs_dev *dev,
+			struct yaffs_ext_tags *tags,
+			int chunk_in_nand)
+{
+	struct yaffs_packed_tags2_tags_only tags_only;
+	struct yaffs_summary_tags *sum_tags;
+	int block_in_nand = chunk_in_nand / dev->param.chunks_per_block;
+	int chunk_in_block = chunk_in_nand % dev->param.chunks_per_block;
+
+	if(!dev->sum_tags)
+		return YAFFS_OK;
+
+	if(chunk_in_block >= 0 && chunk_in_block < dev->chunks_per_summary) {
+		yaffs_pack_tags2_tags_only(&tags_only, tags);
+		sum_tags = &dev->sum_tags[chunk_in_block];
+		sum_tags->chunk_id = tags_only.chunk_id;
+		sum_tags->n_bytes = tags_only.n_bytes;
+		sum_tags->obj_id = tags_only.obj_id;
+
+		if(chunk_in_block == dev->chunks_per_summary - 1) {
+			/* Time to write out the summary */
+			yaffs_summary_write(dev, block_in_nand);
+			yaffs_summary_clear(dev);
+			yaffs_skip_rest_of_block(dev);
+		}
+	}
+	return YAFFS_OK;
+}
+
+int yaffs_summary_fetch(struct yaffs_dev *dev,
+			struct yaffs_ext_tags *tags,
+			int chunk_in_block)
+{
+	struct yaffs_packed_tags2_tags_only tags_only;
+	struct yaffs_summary_tags *sum_tags;
+	if(chunk_in_block >= 0 && chunk_in_block < dev->chunks_per_summary) {
+		sum_tags = &dev->sum_tags[chunk_in_block];
+		tags_only.chunk_id = sum_tags->chunk_id;
+		tags_only.n_bytes = sum_tags->n_bytes;
+		tags_only.obj_id = sum_tags->obj_id;
+		yaffs_unpack_tags2_tags_only(tags, &tags_only);
+		return YAFFS_OK;
+	}
+	return YAFFS_FAIL;
+}
+
+void yaffs_summary_gc(struct yaffs_dev *dev, int blk)
+{
+	struct yaffs_block_info *bi = yaffs_get_block_info(dev, blk);
+	int i;
+
+	if (!bi->has_summary)
+		return;
+
+	for (i = dev->chunks_per_summary; i < dev->param.chunks_per_block; i++) {
+		if( yaffs_check_chunk_bit(dev, blk, i)) {
+			yaffs_clear_chunk_bit(dev, blk, i);
+			bi->pages_in_use--;
+			dev->n_free_chunks++;
+		}
+	}
+
+}
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_summary.h linux-3.0.82x/fs/yaffs2/yaffs_summary.h
--- linux-3.0.82/fs/yaffs2/yaffs_summary.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_summary.h	2017-09-23 03:42:50.306674183 +0800
@@ -0,0 +1,37 @@
+/*
+ * YAFFS: Yet another Flash File System . A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1 as
+ * published by the Free Software Foundation.
+ *
+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
+ */
+
+#ifndef __YAFFS_SUMMARY_H__
+#define __YAFFS_SUMMARY_H__
+
+#include "yaffs_packedtags2.h"
+
+
+int yaffs_summary_init(struct yaffs_dev *dev);
+void yaffs_summary_deinit(struct yaffs_dev *dev);
+
+int yaffs_summary_add(struct yaffs_dev *dev,
+			struct yaffs_ext_tags *tags,
+			int chunk_in_block);
+int yaffs_summary_fetch(struct yaffs_dev *dev,
+			struct yaffs_ext_tags *tags,
+			int chunk_in_block);
+int yaffs_summary_read(struct yaffs_dev *dev,
+			struct yaffs_summary_tags *st,
+			int blk);
+void yaffs_summary_gc(struct yaffs_dev *dev, int blk);
+
+
+#endif
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_tagscompat.c linux-3.0.82x/fs/yaffs2/yaffs_tagscompat.c
--- linux-3.0.82/fs/yaffs2/yaffs_tagscompat.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_tagscompat.c	2017-09-23 03:42:50.306674183 +0800
@@ -0,0 +1,407 @@
+/*
+ * YAFFS: Yet Another Flash File System. A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "yaffs_guts.h"
+#include "yaffs_tagscompat.h"
+#include "yaffs_ecc.h"
+#include "yaffs_getblockinfo.h"
+#include "yaffs_trace.h"
+
+static void yaffs_handle_rd_data_error(struct yaffs_dev *dev, int nand_chunk);
+
+
+/********** Tags ECC calculations  *********/
+
+void yaffs_calc_ecc(const u8 *data, struct yaffs_spare *spare)
+{
+	yaffs_ecc_calc(data, spare->ecc1);
+	yaffs_ecc_calc(&data[256], spare->ecc2);
+}
+
+void yaffs_calc_tags_ecc(struct yaffs_tags *tags)
+{
+	/* Calculate an ecc */
+	unsigned char *b = ((union yaffs_tags_union *)tags)->as_bytes;
+	unsigned i, j;
+	unsigned ecc = 0;
+	unsigned bit = 0;
+
+	tags->ecc = 0;
+
+	for (i = 0; i < 8; i++) {
+		for (j = 1; j & 0xff; j <<= 1) {
+			bit++;
+			if (b[i] & j)
+				ecc ^= bit;
+		}
+	}
+	tags->ecc = ecc;
+}
+
+int yaffs_check_tags_ecc(struct yaffs_tags *tags)
+{
+	unsigned ecc = tags->ecc;
+
+	yaffs_calc_tags_ecc(tags);
+
+	ecc ^= tags->ecc;
+
+	if (ecc && ecc <= 64) {
+		/* TODO: Handle the failure better. Retire? */
+		unsigned char *b = ((union yaffs_tags_union *)tags)->as_bytes;
+
+		ecc--;
+
+		b[ecc / 8] ^= (1 << (ecc & 7));
+
+		/* Now recvalc the ecc */
+		yaffs_calc_tags_ecc(tags);
+
+		return 1;	/* recovered error */
+	} else if (ecc) {
+		/* Wierd ecc failure value */
+		/* TODO Need to do somethiong here */
+		return -1;	/* unrecovered error */
+	}
+	return 0;
+}
+
+/********** Tags **********/
+
+static void yaffs_load_tags_to_spare(struct yaffs_spare *spare_ptr,
+				     struct yaffs_tags *tags_ptr)
+{
+	union yaffs_tags_union *tu = (union yaffs_tags_union *)tags_ptr;
+
+	yaffs_calc_tags_ecc(tags_ptr);
+
+	spare_ptr->tb0 = tu->as_bytes[0];
+	spare_ptr->tb1 = tu->as_bytes[1];
+	spare_ptr->tb2 = tu->as_bytes[2];
+	spare_ptr->tb3 = tu->as_bytes[3];
+	spare_ptr->tb4 = tu->as_bytes[4];
+	spare_ptr->tb5 = tu->as_bytes[5];
+	spare_ptr->tb6 = tu->as_bytes[6];
+	spare_ptr->tb7 = tu->as_bytes[7];
+}
+
+static void yaffs_get_tags_from_spare(struct yaffs_dev *dev,
+				      struct yaffs_spare *spare_ptr,
+				      struct yaffs_tags *tags_ptr)
+{
+	union yaffs_tags_union *tu = (union yaffs_tags_union *)tags_ptr;
+	int result;
+
+	tu->as_bytes[0] = spare_ptr->tb0;
+	tu->as_bytes[1] = spare_ptr->tb1;
+	tu->as_bytes[2] = spare_ptr->tb2;
+	tu->as_bytes[3] = spare_ptr->tb3;
+	tu->as_bytes[4] = spare_ptr->tb4;
+	tu->as_bytes[5] = spare_ptr->tb5;
+	tu->as_bytes[6] = spare_ptr->tb6;
+	tu->as_bytes[7] = spare_ptr->tb7;
+
+	result = yaffs_check_tags_ecc(tags_ptr);
+	if (result > 0)
+		dev->n_tags_ecc_fixed++;
+	else if (result < 0)
+		dev->n_tags_ecc_unfixed++;
+}
+
+static void yaffs_spare_init(struct yaffs_spare *spare)
+{
+	memset(spare, 0xff, sizeof(struct yaffs_spare));
+}
+
+static int yaffs_wr_nand(struct yaffs_dev *dev,
+			 int nand_chunk, const u8 *data,
+			 struct yaffs_spare *spare)
+{
+	if (nand_chunk < dev->param.start_block * dev->param.chunks_per_block) {
+		yaffs_trace(YAFFS_TRACE_ERROR,
+			"**>> yaffs chunk %d is not valid",
+			nand_chunk);
+		return YAFFS_FAIL;
+	}
+
+	return dev->param.write_chunk_fn(dev, nand_chunk, data, spare);
+}
+
+static int yaffs_rd_chunk_nand(struct yaffs_dev *dev,
+			       int nand_chunk,
+			       u8 *data,
+			       struct yaffs_spare *spare,
+			       enum yaffs_ecc_result *ecc_result,
+			       int correct_errors)
+{
+	int ret_val;
+	struct yaffs_spare local_spare;
+
+	if (!spare) {
+		/* If we don't have a real spare, then we use a local one. */
+		/* Need this for the calculation of the ecc */
+		spare = &local_spare;
+	}
+
+	if (!dev->param.use_nand_ecc) {
+		ret_val =
+		    dev->param.read_chunk_fn(dev, nand_chunk, data, spare);
+		if (data && correct_errors) {
+			/* Do ECC correction */
+			/* Todo handle any errors */
+			int ecc_result1, ecc_result2;
+			u8 calc_ecc[3];
+
+			yaffs_ecc_calc(data, calc_ecc);
+			ecc_result1 =
+			    yaffs_ecc_correct(data, spare->ecc1, calc_ecc);
+			yaffs_ecc_calc(&data[256], calc_ecc);
+			ecc_result2 =
+			    yaffs_ecc_correct(&data[256], spare->ecc2,
+					      calc_ecc);
+
+			if (ecc_result1 > 0) {
+				yaffs_trace(YAFFS_TRACE_ERROR,
+					"**>>yaffs ecc error fix performed on chunk %d:0",
+					nand_chunk);
+				dev->n_ecc_fixed++;
+			} else if (ecc_result1 < 0) {
+				yaffs_trace(YAFFS_TRACE_ERROR,
+					"**>>yaffs ecc error unfixed on chunk %d:0",
+					nand_chunk);
+				dev->n_ecc_unfixed++;
+			}
+
+			if (ecc_result2 > 0) {
+				yaffs_trace(YAFFS_TRACE_ERROR,
+					"**>>yaffs ecc error fix performed on chunk %d:1",
+					nand_chunk);
+				dev->n_ecc_fixed++;
+			} else if (ecc_result2 < 0) {
+				yaffs_trace(YAFFS_TRACE_ERROR,
+					"**>>yaffs ecc error unfixed on chunk %d:1",
+					nand_chunk);
+				dev->n_ecc_unfixed++;
+			}
+
+			if (ecc_result1 || ecc_result2) {
+				/* We had a data problem on this page */
+				yaffs_handle_rd_data_error(dev, nand_chunk);
+			}
+
+			if (ecc_result1 < 0 || ecc_result2 < 0)
+				*ecc_result = YAFFS_ECC_RESULT_UNFIXED;
+			else if (ecc_result1 > 0 || ecc_result2 > 0)
+				*ecc_result = YAFFS_ECC_RESULT_FIXED;
+			else
+				*ecc_result = YAFFS_ECC_RESULT_NO_ERROR;
+		}
+	} else {
+		/* Must allocate enough memory for spare+2*sizeof(int) */
+		/* for ecc results from device. */
+		struct yaffs_nand_spare nspare;
+
+		memset(&nspare, 0, sizeof(nspare));
+
+		ret_val = dev->param.read_chunk_fn(dev, nand_chunk, data,
+						   (struct yaffs_spare *)
+						   &nspare);
+		memcpy(spare, &nspare, sizeof(struct yaffs_spare));
+		if (data && correct_errors) {
+			if (nspare.eccres1 > 0) {
+				yaffs_trace(YAFFS_TRACE_ERROR,
+					"**>>mtd ecc error fix performed on chunk %d:0",
+					nand_chunk);
+			} else if (nspare.eccres1 < 0) {
+				yaffs_trace(YAFFS_TRACE_ERROR,
+					"**>>mtd ecc error unfixed on chunk %d:0",
+					nand_chunk);
+			}
+
+			if (nspare.eccres2 > 0) {
+				yaffs_trace(YAFFS_TRACE_ERROR,
+					"**>>mtd ecc error fix performed on chunk %d:1",
+					nand_chunk);
+			} else if (nspare.eccres2 < 0) {
+				yaffs_trace(YAFFS_TRACE_ERROR,
+					"**>>mtd ecc error unfixed on chunk %d:1",
+					nand_chunk);
+			}
+
+			if (nspare.eccres1 || nspare.eccres2) {
+				/* We had a data problem on this page */
+				yaffs_handle_rd_data_error(dev, nand_chunk);
+			}
+
+			if (nspare.eccres1 < 0 || nspare.eccres2 < 0)
+				*ecc_result = YAFFS_ECC_RESULT_UNFIXED;
+			else if (nspare.eccres1 > 0 || nspare.eccres2 > 0)
+				*ecc_result = YAFFS_ECC_RESULT_FIXED;
+			else
+				*ecc_result = YAFFS_ECC_RESULT_NO_ERROR;
+
+		}
+	}
+	return ret_val;
+}
+
+/*
+ * Functions for robustisizing
+ */
+
+static void yaffs_handle_rd_data_error(struct yaffs_dev *dev, int nand_chunk)
+{
+	int flash_block = nand_chunk / dev->param.chunks_per_block;
+
+	/* Mark the block for retirement */
+	yaffs_get_block_info(dev, flash_block + dev->block_offset)->
+		needs_retiring = 1;
+	yaffs_trace(YAFFS_TRACE_ERROR | YAFFS_TRACE_BAD_BLOCKS,
+		"**>>Block %d marked for retirement",
+		flash_block);
+
+	/* TODO:
+	 * Just do a garbage collection on the affected block
+	 * then retire the block
+	 * NB recursion
+	 */
+}
+
+int yaffs_tags_compat_wr(struct yaffs_dev *dev,
+			 int nand_chunk,
+			 const u8 *data, const struct yaffs_ext_tags *ext_tags)
+{
+	struct yaffs_spare spare;
+	struct yaffs_tags tags;
+
+	yaffs_spare_init(&spare);
+
+	if (ext_tags->is_deleted)
+		spare.page_status = 0;
+	else {
+		tags.obj_id = ext_tags->obj_id;
+		tags.chunk_id = ext_tags->chunk_id;
+
+		tags.n_bytes_lsb = ext_tags->n_bytes & (1024 - 1);
+
+		if (dev->data_bytes_per_chunk >= 1024)
+			tags.n_bytes_msb = (ext_tags->n_bytes >> 10) & 3;
+		else
+			tags.n_bytes_msb = 3;
+
+		tags.serial_number = ext_tags->serial_number;
+
+		if (!dev->param.use_nand_ecc && data)
+			yaffs_calc_ecc(data, &spare);
+
+		yaffs_load_tags_to_spare(&spare, &tags);
+	}
+	return yaffs_wr_nand(dev, nand_chunk, data, &spare);
+}
+
+int yaffs_tags_compat_rd(struct yaffs_dev *dev,
+			 int nand_chunk,
+			 u8 *data, struct yaffs_ext_tags *ext_tags)
+{
+	struct yaffs_spare spare;
+	struct yaffs_tags tags;
+	enum yaffs_ecc_result ecc_result = YAFFS_ECC_RESULT_UNKNOWN;
+	static struct yaffs_spare spare_ff;
+	static int init;
+	int deleted;
+
+	if (!init) {
+		memset(&spare_ff, 0xff, sizeof(spare_ff));
+		init = 1;
+	}
+
+	if (!yaffs_rd_chunk_nand(dev, nand_chunk,
+					data, &spare, &ecc_result, 1))
+		return YAFFS_FAIL;
+
+	/* ext_tags may be NULL */
+	if (!ext_tags)
+		return YAFFS_OK;
+
+	deleted = (hweight8(spare.page_status) < 7) ? 1 : 0;
+
+	ext_tags->is_deleted = deleted;
+	ext_tags->ecc_result = ecc_result;
+	ext_tags->block_bad = 0;	/* We're reading it */
+	/* therefore it is not a bad block */
+	ext_tags->chunk_used =
+		memcmp(&spare_ff, &spare, sizeof(spare_ff)) ? 1 : 0;
+
+	if (ext_tags->chunk_used) {
+		yaffs_get_tags_from_spare(dev, &spare, &tags);
+		ext_tags->obj_id = tags.obj_id;
+		ext_tags->chunk_id = tags.chunk_id;
+		ext_tags->n_bytes = tags.n_bytes_lsb;
+
+		if (dev->data_bytes_per_chunk >= 1024)
+			ext_tags->n_bytes |=
+				(((unsigned)tags.n_bytes_msb) << 10);
+
+		ext_tags->serial_number = tags.serial_number;
+	}
+
+	return YAFFS_OK;
+}
+
+int yaffs_tags_compat_mark_bad(struct yaffs_dev *dev, int flash_block)
+{
+	struct yaffs_spare spare;
+
+	memset(&spare, 0xff, sizeof(struct yaffs_spare));
+
+	spare.block_status = 'Y';
+
+	yaffs_wr_nand(dev, flash_block * dev->param.chunks_per_block, NULL,
+		      &spare);
+	yaffs_wr_nand(dev, flash_block * dev->param.chunks_per_block + 1,
+		      NULL, &spare);
+
+	return YAFFS_OK;
+}
+
+int yaffs_tags_compat_query_block(struct yaffs_dev *dev,
+				  int block_no,
+				  enum yaffs_block_state *state,
+				  u32 *seq_number)
+{
+	struct yaffs_spare spare0, spare1;
+	static struct yaffs_spare spare_ff;
+	static int init;
+	enum yaffs_ecc_result dummy;
+
+	if (!init) {
+		memset(&spare_ff, 0xff, sizeof(spare_ff));
+		init = 1;
+	}
+
+	*seq_number = 0;
+
+	yaffs_rd_chunk_nand(dev, block_no * dev->param.chunks_per_block, NULL,
+			    &spare0, &dummy, 1);
+	yaffs_rd_chunk_nand(dev, block_no * dev->param.chunks_per_block + 1,
+			    NULL, &spare1, &dummy, 1);
+
+	if (hweight8(spare0.block_status & spare1.block_status) < 7)
+		*state = YAFFS_BLOCK_STATE_DEAD;
+	else if (memcmp(&spare_ff, &spare0, sizeof(spare_ff)) == 0)
+		*state = YAFFS_BLOCK_STATE_EMPTY;
+	else
+		*state = YAFFS_BLOCK_STATE_NEEDS_SCAN;
+
+	return YAFFS_OK;
+}
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_tagscompat.h linux-3.0.82x/fs/yaffs2/yaffs_tagscompat.h
--- linux-3.0.82/fs/yaffs2/yaffs_tagscompat.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_tagscompat.h	2017-09-23 03:42:50.306674183 +0800
@@ -0,0 +1,36 @@
+/*
+ * YAFFS: Yet another Flash File System . A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1 as
+ * published by the Free Software Foundation.
+ *
+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
+ */
+
+#ifndef __YAFFS_TAGSCOMPAT_H__
+#define __YAFFS_TAGSCOMPAT_H__
+
+#include "yaffs_guts.h"
+int yaffs_tags_compat_wr(struct yaffs_dev *dev,
+			 int nand_chunk,
+			 const u8 *data, const struct yaffs_ext_tags *tags);
+int yaffs_tags_compat_rd(struct yaffs_dev *dev,
+			 int nand_chunk,
+			 u8 *data, struct yaffs_ext_tags *tags);
+int yaffs_tags_compat_mark_bad(struct yaffs_dev *dev, int block_no);
+int yaffs_tags_compat_query_block(struct yaffs_dev *dev,
+				  int block_no,
+				  enum yaffs_block_state *state,
+				  u32 *seq_number);
+
+void yaffs_calc_tags_ecc(struct yaffs_tags *tags);
+int yaffs_check_tags_ecc(struct yaffs_tags *tags);
+int yaffs_count_bits(u8 byte);
+
+#endif
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_trace.h linux-3.0.82x/fs/yaffs2/yaffs_trace.h
--- linux-3.0.82/fs/yaffs2/yaffs_trace.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_trace.h	2017-09-23 03:42:50.306674183 +0800
@@ -0,0 +1,57 @@
+/*
+ * YAFFS: Yet another Flash File System . A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1 as
+ * published by the Free Software Foundation.
+ *
+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
+ */
+
+#ifndef __YTRACE_H__
+#define __YTRACE_H__
+
+extern unsigned int yaffs_trace_mask;
+extern unsigned int yaffs_wr_attempts;
+
+/*
+ * Tracing flags.
+ * The flags masked in YAFFS_TRACE_ALWAYS are always traced.
+ */
+
+#define YAFFS_TRACE_OS			0x00000002
+#define YAFFS_TRACE_ALLOCATE		0x00000004
+#define YAFFS_TRACE_SCAN		0x00000008
+#define YAFFS_TRACE_BAD_BLOCKS		0x00000010
+#define YAFFS_TRACE_ERASE		0x00000020
+#define YAFFS_TRACE_GC			0x00000040
+#define YAFFS_TRACE_WRITE		0x00000080
+#define YAFFS_TRACE_TRACING		0x00000100
+#define YAFFS_TRACE_DELETION		0x00000200
+#define YAFFS_TRACE_BUFFERS		0x00000400
+#define YAFFS_TRACE_NANDACCESS		0x00000800
+#define YAFFS_TRACE_GC_DETAIL		0x00001000
+#define YAFFS_TRACE_SCAN_DEBUG		0x00002000
+#define YAFFS_TRACE_MTD			0x00004000
+#define YAFFS_TRACE_CHECKPOINT		0x00008000
+
+#define YAFFS_TRACE_VERIFY		0x00010000
+#define YAFFS_TRACE_VERIFY_NAND		0x00020000
+#define YAFFS_TRACE_VERIFY_FULL		0x00040000
+#define YAFFS_TRACE_VERIFY_ALL		0x000f0000
+
+#define YAFFS_TRACE_SYNC		0x00100000
+#define YAFFS_TRACE_BACKGROUND		0x00200000
+#define YAFFS_TRACE_LOCK		0x00400000
+#define YAFFS_TRACE_MOUNT		0x00800000
+
+#define YAFFS_TRACE_ERROR		0x40000000
+#define YAFFS_TRACE_BUG			0x80000000
+#define YAFFS_TRACE_ALWAYS		0xf0000000
+
+#endif
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_verify.c linux-3.0.82x/fs/yaffs2/yaffs_verify.c
--- linux-3.0.82/fs/yaffs2/yaffs_verify.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_verify.c	2017-09-23 03:42:50.310674171 +0800
@@ -0,0 +1,525 @@
+/*
+ * YAFFS: Yet Another Flash File System. A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "yaffs_verify.h"
+#include "yaffs_trace.h"
+#include "yaffs_bitmap.h"
+#include "yaffs_getblockinfo.h"
+#include "yaffs_nand.h"
+
+int yaffs_skip_verification(struct yaffs_dev *dev)
+{
+	dev = dev;
+	return !(yaffs_trace_mask &
+		 (YAFFS_TRACE_VERIFY | YAFFS_TRACE_VERIFY_FULL));
+}
+
+static int yaffs_skip_full_verification(struct yaffs_dev *dev)
+{
+	dev = dev;
+	return !(yaffs_trace_mask & (YAFFS_TRACE_VERIFY_FULL));
+}
+
+static int yaffs_skip_nand_verification(struct yaffs_dev *dev)
+{
+	dev = dev;
+	return !(yaffs_trace_mask & (YAFFS_TRACE_VERIFY_NAND));
+}
+
+static const char * const block_state_name[] = {
+	"Unknown",
+	"Needs scan",
+	"Scanning",
+	"Empty",
+	"Allocating",
+	"Full",
+	"Dirty",
+	"Checkpoint",
+	"Collecting",
+	"Dead"
+};
+
+void yaffs_verify_blk(struct yaffs_dev *dev, struct yaffs_block_info *bi, int n)
+{
+	int actually_used;
+	int in_use;
+
+	if (yaffs_skip_verification(dev))
+		return;
+
+	/* Report illegal runtime states */
+	if (bi->block_state >= YAFFS_NUMBER_OF_BLOCK_STATES)
+		yaffs_trace(YAFFS_TRACE_VERIFY,
+			"Block %d has undefined state %d",
+			n, bi->block_state);
+
+	switch (bi->block_state) {
+	case YAFFS_BLOCK_STATE_UNKNOWN:
+	case YAFFS_BLOCK_STATE_SCANNING:
+	case YAFFS_BLOCK_STATE_NEEDS_SCAN:
+		yaffs_trace(YAFFS_TRACE_VERIFY,
+			"Block %d has bad run-state %s",
+			n, block_state_name[bi->block_state]);
+	}
+
+	/* Check pages in use and soft deletions are legal */
+
+	actually_used = bi->pages_in_use - bi->soft_del_pages;
+
+	if (bi->pages_in_use < 0 ||
+	    bi->pages_in_use > dev->param.chunks_per_block ||
+	    bi->soft_del_pages < 0 ||
+	    bi->soft_del_pages > dev->param.chunks_per_block ||
+	    actually_used < 0 || actually_used > dev->param.chunks_per_block)
+		yaffs_trace(YAFFS_TRACE_VERIFY,
+			"Block %d has illegal values pages_in_used %d soft_del_pages %d",
+			n, bi->pages_in_use, bi->soft_del_pages);
+
+	/* Check chunk bitmap legal */
+	in_use = yaffs_count_chunk_bits(dev, n);
+	if (in_use != bi->pages_in_use)
+		yaffs_trace(YAFFS_TRACE_VERIFY,
+			"Block %d has inconsistent values pages_in_use %d counted chunk bits %d",
+			n, bi->pages_in_use, in_use);
+}
+
+void yaffs_verify_collected_blk(struct yaffs_dev *dev,
+				struct yaffs_block_info *bi, int n)
+{
+	yaffs_verify_blk(dev, bi, n);
+
+	/* After collection the block should be in the erased state */
+
+	if (bi->block_state != YAFFS_BLOCK_STATE_COLLECTING &&
+	    bi->block_state != YAFFS_BLOCK_STATE_EMPTY) {
+		yaffs_trace(YAFFS_TRACE_ERROR,
+			"Block %d is in state %d after gc, should be erased",
+			n, bi->block_state);
+	}
+}
+
+void yaffs_verify_blocks(struct yaffs_dev *dev)
+{
+	int i;
+	int state_count[YAFFS_NUMBER_OF_BLOCK_STATES];
+	int illegal_states = 0;
+
+	if (yaffs_skip_verification(dev))
+		return;
+
+	memset(state_count, 0, sizeof(state_count));
+
+	for (i = dev->internal_start_block; i <= dev->internal_end_block; i++) {
+		struct yaffs_block_info *bi = yaffs_get_block_info(dev, i);
+		yaffs_verify_blk(dev, bi, i);
+
+		if (bi->block_state < YAFFS_NUMBER_OF_BLOCK_STATES)
+			state_count[bi->block_state]++;
+		else
+			illegal_states++;
+	}
+
+	yaffs_trace(YAFFS_TRACE_VERIFY,	"Block summary");
+
+	yaffs_trace(YAFFS_TRACE_VERIFY,
+		"%d blocks have illegal states",
+		illegal_states);
+	if (state_count[YAFFS_BLOCK_STATE_ALLOCATING] > 1)
+		yaffs_trace(YAFFS_TRACE_VERIFY,
+			"Too many allocating blocks");
+
+	for (i = 0; i < YAFFS_NUMBER_OF_BLOCK_STATES; i++)
+		yaffs_trace(YAFFS_TRACE_VERIFY,
+			"%s %d blocks",
+			block_state_name[i], state_count[i]);
+
+	if (dev->blocks_in_checkpt != state_count[YAFFS_BLOCK_STATE_CHECKPOINT])
+		yaffs_trace(YAFFS_TRACE_VERIFY,
+			"Checkpoint block count wrong dev %d count %d",
+			dev->blocks_in_checkpt,
+			state_count[YAFFS_BLOCK_STATE_CHECKPOINT]);
+
+	if (dev->n_erased_blocks != state_count[YAFFS_BLOCK_STATE_EMPTY])
+		yaffs_trace(YAFFS_TRACE_VERIFY,
+			"Erased block count wrong dev %d count %d",
+			dev->n_erased_blocks,
+			state_count[YAFFS_BLOCK_STATE_EMPTY]);
+
+	if (state_count[YAFFS_BLOCK_STATE_COLLECTING] > 1)
+		yaffs_trace(YAFFS_TRACE_VERIFY,
+			"Too many collecting blocks %d (max is 1)",
+			state_count[YAFFS_BLOCK_STATE_COLLECTING]);
+}
+
+/*
+ * Verify the object header. oh must be valid, but obj and tags may be NULL in
+ * which case those tests will not be performed.
+ */
+void yaffs_verify_oh(struct yaffs_obj *obj, struct yaffs_obj_hdr *oh,
+		     struct yaffs_ext_tags *tags, int parent_check)
+{
+	if (obj && yaffs_skip_verification(obj->my_dev))
+		return;
+
+	if (!(tags && obj && oh)) {
+		yaffs_trace(YAFFS_TRACE_VERIFY,
+			"Verifying object header tags %p obj %p oh %p",
+			tags, obj, oh);
+		return;
+	}
+
+	if (oh->type <= YAFFS_OBJECT_TYPE_UNKNOWN ||
+	    oh->type > YAFFS_OBJECT_TYPE_MAX)
+		yaffs_trace(YAFFS_TRACE_VERIFY,
+			"Obj %d header type is illegal value 0x%x",
+			tags->obj_id, oh->type);
+
+	if (tags->obj_id != obj->obj_id)
+		yaffs_trace(YAFFS_TRACE_VERIFY,
+			"Obj %d header mismatch obj_id %d",
+			tags->obj_id, obj->obj_id);
+
+	/*
+	 * Check that the object's parent ids match if parent_check requested.
+	 *
+	 * Tests do not apply to the root object.
+	 */
+
+	if (parent_check && tags->obj_id > 1 && !obj->parent)
+		yaffs_trace(YAFFS_TRACE_VERIFY,
+			"Obj %d header mismatch parent_id %d obj->parent is NULL",
+			tags->obj_id, oh->parent_obj_id);
+
+	if (parent_check && obj->parent &&
+	    oh->parent_obj_id != obj->parent->obj_id &&
+	    (oh->parent_obj_id != YAFFS_OBJECTID_UNLINKED ||
+	     obj->parent->obj_id != YAFFS_OBJECTID_DELETED))
+		yaffs_trace(YAFFS_TRACE_VERIFY,
+			"Obj %d header mismatch parent_id %d parent_obj_id %d",
+			tags->obj_id, oh->parent_obj_id,
+			obj->parent->obj_id);
+
+	if (tags->obj_id > 1 && oh->name[0] == 0)	/* Null name */
+		yaffs_trace(YAFFS_TRACE_VERIFY,
+			"Obj %d header name is NULL",
+			obj->obj_id);
+
+	if (tags->obj_id > 1 && ((u8) (oh->name[0])) == 0xff)	/* Junk name */
+		yaffs_trace(YAFFS_TRACE_VERIFY,
+			"Obj %d header name is 0xff",
+			obj->obj_id);
+}
+
+void yaffs_verify_file(struct yaffs_obj *obj)
+{
+	int required_depth;
+	int actual_depth;
+	u32 last_chunk;
+	u32 the_chunk;
+	u32 x;
+	u32 i;
+	struct yaffs_dev *dev;
+	struct yaffs_ext_tags tags;
+	struct yaffs_tnode *tn;
+	u32 obj_id;
+
+	if (!obj)
+		return;
+
+	if (yaffs_skip_verification(obj->my_dev))
+		return;
+
+	dev = obj->my_dev;
+	obj_id = obj->obj_id;
+
+	/* Check file size is consistent with tnode depth */
+	last_chunk =
+	    obj->variant.file_variant.file_size / dev->data_bytes_per_chunk + 1;
+	x = last_chunk >> YAFFS_TNODES_LEVEL0_BITS;
+	required_depth = 0;
+	while (x > 0) {
+		x >>= YAFFS_TNODES_INTERNAL_BITS;
+		required_depth++;
+	}
+
+	actual_depth = obj->variant.file_variant.top_level;
+
+	/* Check that the chunks in the tnode tree are all correct.
+	 * We do this by scanning through the tnode tree and
+	 * checking the tags for every chunk match.
+	 */
+
+	if (yaffs_skip_nand_verification(dev))
+		return;
+
+	for (i = 1; i <= last_chunk; i++) {
+		tn = yaffs_find_tnode_0(dev, &obj->variant.file_variant, i);
+
+		if (!tn)
+			continue;
+
+		the_chunk = yaffs_get_group_base(dev, tn, i);
+		if (the_chunk > 0) {
+			yaffs_rd_chunk_tags_nand(dev, the_chunk, NULL,
+						 &tags);
+			if (tags.obj_id != obj_id || tags.chunk_id != i)
+				yaffs_trace(YAFFS_TRACE_VERIFY,
+					"Object %d chunk_id %d NAND mismatch chunk %d tags (%d:%d)",
+					obj_id, i, the_chunk,
+					tags.obj_id, tags.chunk_id);
+		}
+	}
+}
+
+void yaffs_verify_link(struct yaffs_obj *obj)
+{
+	if (obj && yaffs_skip_verification(obj->my_dev))
+		return;
+
+	/* Verify sane equivalent object */
+}
+
+void yaffs_verify_symlink(struct yaffs_obj *obj)
+{
+	if (obj && yaffs_skip_verification(obj->my_dev))
+		return;
+
+	/* Verify symlink string */
+}
+
+void yaffs_verify_special(struct yaffs_obj *obj)
+{
+	if (obj && yaffs_skip_verification(obj->my_dev))
+		return;
+}
+
+void yaffs_verify_obj(struct yaffs_obj *obj)
+{
+	struct yaffs_dev *dev;
+	u32 chunk_min;
+	u32 chunk_max;
+	u32 chunk_id_ok;
+	u32 chunk_in_range;
+	u32 chunk_wrongly_deleted;
+	u32 chunk_valid;
+
+	if (!obj)
+		return;
+
+	if (obj->being_created)
+		return;
+
+	dev = obj->my_dev;
+
+	if (yaffs_skip_verification(dev))
+		return;
+
+	/* Check sane object header chunk */
+
+	chunk_min = dev->internal_start_block * dev->param.chunks_per_block;
+	chunk_max =
+	    (dev->internal_end_block + 1) * dev->param.chunks_per_block - 1;
+
+	chunk_in_range = (((unsigned)(obj->hdr_chunk)) >= chunk_min &&
+			  ((unsigned)(obj->hdr_chunk)) <= chunk_max);
+	chunk_id_ok = chunk_in_range || (obj->hdr_chunk == 0);
+	chunk_valid = chunk_in_range &&
+	    yaffs_check_chunk_bit(dev,
+				  obj->hdr_chunk / dev->param.chunks_per_block,
+				  obj->hdr_chunk % dev->param.chunks_per_block);
+	chunk_wrongly_deleted = chunk_in_range && !chunk_valid;
+
+	if (!obj->fake && (!chunk_id_ok || chunk_wrongly_deleted))
+		yaffs_trace(YAFFS_TRACE_VERIFY,
+			"Obj %d has chunk_id %d %s %s",
+			obj->obj_id, obj->hdr_chunk,
+			chunk_id_ok ? "" : ",out of range",
+			chunk_wrongly_deleted ? ",marked as deleted" : "");
+
+	if (chunk_valid && !yaffs_skip_nand_verification(dev)) {
+		struct yaffs_ext_tags tags;
+		struct yaffs_obj_hdr *oh;
+		u8 *buffer = yaffs_get_temp_buffer(dev);
+
+		oh = (struct yaffs_obj_hdr *)buffer;
+
+		yaffs_rd_chunk_tags_nand(dev, obj->hdr_chunk, buffer, &tags);
+
+		yaffs_verify_oh(obj, oh, &tags, 1);
+
+		yaffs_release_temp_buffer(dev, buffer);
+	}
+
+	/* Verify it has a parent */
+	if (obj && !obj->fake && (!obj->parent || obj->parent->my_dev != dev)) {
+		yaffs_trace(YAFFS_TRACE_VERIFY,
+			"Obj %d has parent pointer %p which does not look like an object",
+			obj->obj_id, obj->parent);
+	}
+
+	/* Verify parent is a directory */
+	if (obj->parent &&
+	    obj->parent->variant_type != YAFFS_OBJECT_TYPE_DIRECTORY) {
+		yaffs_trace(YAFFS_TRACE_VERIFY,
+			"Obj %d's parent is not a directory (type %d)",
+			obj->obj_id, obj->parent->variant_type);
+	}
+
+	switch (obj->variant_type) {
+	case YAFFS_OBJECT_TYPE_FILE:
+		yaffs_verify_file(obj);
+		break;
+	case YAFFS_OBJECT_TYPE_SYMLINK:
+		yaffs_verify_symlink(obj);
+		break;
+	case YAFFS_OBJECT_TYPE_DIRECTORY:
+		yaffs_verify_dir(obj);
+		break;
+	case YAFFS_OBJECT_TYPE_HARDLINK:
+		yaffs_verify_link(obj);
+		break;
+	case YAFFS_OBJECT_TYPE_SPECIAL:
+		yaffs_verify_special(obj);
+		break;
+	case YAFFS_OBJECT_TYPE_UNKNOWN:
+	default:
+		yaffs_trace(YAFFS_TRACE_VERIFY,
+			"Obj %d has illegaltype %d",
+		   obj->obj_id, obj->variant_type);
+		break;
+	}
+}
+
+void yaffs_verify_objects(struct yaffs_dev *dev)
+{
+	struct yaffs_obj *obj;
+	int i;
+	struct list_head *lh;
+
+	if (yaffs_skip_verification(dev))
+		return;
+
+	/* Iterate through the objects in each hash entry */
+
+	for (i = 0; i < YAFFS_NOBJECT_BUCKETS; i++) {
+		list_for_each(lh, &dev->obj_bucket[i].list) {
+			obj = list_entry(lh, struct yaffs_obj, hash_link);
+			yaffs_verify_obj(obj);
+		}
+	}
+}
+
+void yaffs_verify_obj_in_dir(struct yaffs_obj *obj)
+{
+	struct list_head *lh;
+	struct yaffs_obj *list_obj;
+	int count = 0;
+
+	if (!obj) {
+		yaffs_trace(YAFFS_TRACE_ALWAYS, "No object to verify");
+		BUG();
+		return;
+	}
+
+	if (yaffs_skip_verification(obj->my_dev))
+		return;
+
+	if (!obj->parent) {
+		yaffs_trace(YAFFS_TRACE_ALWAYS, "Object does not have parent");
+		BUG();
+		return;
+	}
+
+	if (obj->parent->variant_type != YAFFS_OBJECT_TYPE_DIRECTORY) {
+		yaffs_trace(YAFFS_TRACE_ALWAYS, "Parent is not directory");
+		BUG();
+	}
+
+	/* Iterate through the objects in each hash entry */
+
+	list_for_each(lh, &obj->parent->variant.dir_variant.children) {
+		list_obj = list_entry(lh, struct yaffs_obj, siblings);
+		yaffs_verify_obj(list_obj);
+		if (obj == list_obj)
+			count++;
+	}
+
+	if (count != 1) {
+		yaffs_trace(YAFFS_TRACE_ALWAYS,
+			"Object in directory %d times",
+			count);
+		BUG();
+	}
+}
+
+void yaffs_verify_dir(struct yaffs_obj *directory)
+{
+	struct list_head *lh;
+	struct yaffs_obj *list_obj;
+
+	if (!directory) {
+		BUG();
+		return;
+	}
+
+	if (yaffs_skip_full_verification(directory->my_dev))
+		return;
+
+	if (directory->variant_type != YAFFS_OBJECT_TYPE_DIRECTORY) {
+		yaffs_trace(YAFFS_TRACE_ALWAYS,
+			"Directory has wrong type: %d",
+			directory->variant_type);
+		BUG();
+	}
+
+	/* Iterate through the objects in each hash entry */
+
+	list_for_each(lh, &directory->variant.dir_variant.children) {
+		list_obj = list_entry(lh, struct yaffs_obj, siblings);
+		if (list_obj->parent != directory) {
+			yaffs_trace(YAFFS_TRACE_ALWAYS,
+				"Object in directory list has wrong parent %p",
+				list_obj->parent);
+			BUG();
+		}
+		yaffs_verify_obj_in_dir(list_obj);
+	}
+}
+
+static int yaffs_free_verification_failures;
+
+void yaffs_verify_free_chunks(struct yaffs_dev *dev)
+{
+	int counted;
+	int difference;
+
+	if (yaffs_skip_verification(dev))
+		return;
+
+	counted = yaffs_count_free_chunks(dev);
+
+	difference = dev->n_free_chunks - counted;
+
+	if (difference) {
+		yaffs_trace(YAFFS_TRACE_ALWAYS,
+			"Freechunks verification failure %d %d %d",
+			dev->n_free_chunks, counted, difference);
+		yaffs_free_verification_failures++;
+	}
+}
+
+int yaffs_verify_file_sane(struct yaffs_obj *in)
+{
+	in = in;
+	return YAFFS_OK;
+}
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_verify.h linux-3.0.82x/fs/yaffs2/yaffs_verify.h
--- linux-3.0.82/fs/yaffs2/yaffs_verify.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_verify.h	2017-09-23 03:42:50.310674171 +0800
@@ -0,0 +1,43 @@
+/*
+ * YAFFS: Yet another Flash File System . A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1 as
+ * published by the Free Software Foundation.
+ *
+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
+ */
+
+#ifndef __YAFFS_VERIFY_H__
+#define __YAFFS_VERIFY_H__
+
+#include "yaffs_guts.h"
+
+void yaffs_verify_blk(struct yaffs_dev *dev, struct yaffs_block_info *bi,
+		      int n);
+void yaffs_verify_collected_blk(struct yaffs_dev *dev,
+				struct yaffs_block_info *bi, int n);
+void yaffs_verify_blocks(struct yaffs_dev *dev);
+
+void yaffs_verify_oh(struct yaffs_obj *obj, struct yaffs_obj_hdr *oh,
+		     struct yaffs_ext_tags *tags, int parent_check);
+void yaffs_verify_file(struct yaffs_obj *obj);
+void yaffs_verify_link(struct yaffs_obj *obj);
+void yaffs_verify_symlink(struct yaffs_obj *obj);
+void yaffs_verify_special(struct yaffs_obj *obj);
+void yaffs_verify_obj(struct yaffs_obj *obj);
+void yaffs_verify_objects(struct yaffs_dev *dev);
+void yaffs_verify_obj_in_dir(struct yaffs_obj *obj);
+void yaffs_verify_dir(struct yaffs_obj *directory);
+void yaffs_verify_free_chunks(struct yaffs_dev *dev);
+
+int yaffs_verify_file_sane(struct yaffs_obj *obj);
+
+int yaffs_skip_verification(struct yaffs_dev *dev);
+
+#endif
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_vfs.c linux-3.0.82x/fs/yaffs2/yaffs_vfs.c
--- linux-3.0.82/fs/yaffs2/yaffs_vfs.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_vfs.c	2017-09-23 03:42:50.310674171 +0800
@@ -0,0 +1,3452 @@
+/*
+ * YAFFS: Yet Another Flash File System. A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ * Acknowledgements:
+ * Luc van OostenRyck for numerous patches.
+ * Nick Bane for numerous patches.
+ * Nick Bane for 2.5/2.6 integration.
+ * Andras Toth for mknod rdev issue.
+ * Michael Fischer for finding the problem with inode inconsistency.
+ * Some code bodily lifted from JFFS
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ *
+ * This is the file system front-end to YAFFS that hooks it up to
+ * the VFS.
+ *
+ * Special notes:
+ * >> 2.4: sb->u.generic_sbp points to the struct yaffs_dev associated with
+ *         this superblock
+ * >> 2.6: sb->s_fs_info  points to the struct yaffs_dev associated with this
+ *         superblock
+ * >> inode->u.generic_ip points to the associated struct yaffs_obj.
+ */
+
+/*
+ * There are two variants of the VFS glue code. This variant should compile
+ * for any version of Linux.
+ */
+#include <linux/version.h>
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 10))
+#define YAFFS_COMPILE_BACKGROUND
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 23))
+#define YAFFS_COMPILE_FREEZER
+#endif
+#endif
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 28))
+#define YAFFS_COMPILE_EXPORTFS
+#endif
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35))
+#define YAFFS_USE_SETATTR_COPY
+#define YAFFS_USE_TRUNCATE_SETSIZE
+#endif
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35))
+#define YAFFS_HAS_EVICT_INODE
+#endif
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 13))
+#define YAFFS_NEW_FOLLOW_LINK 1
+#else
+#define YAFFS_NEW_FOLLOW_LINK 0
+#endif
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19))
+#include <linux/config.h>
+#endif
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/init.h>
+#include <linux/fs.h>
+#include <linux/proc_fs.h>
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 39))
+#include <linux/smp_lock.h>
+#endif
+#include <linux/pagemap.h>
+#include <linux/mtd/mtd.h>
+#include <linux/interrupt.h>
+#include <linux/string.h>
+#include <linux/ctype.h>
+
+#if (YAFFS_NEW_FOLLOW_LINK == 1)
+#include <linux/namei.h>
+#endif
+
+#ifdef YAFFS_COMPILE_EXPORTFS
+#include <linux/exportfs.h>
+#endif
+
+#ifdef YAFFS_COMPILE_BACKGROUND
+#include <linux/kthread.h>
+#include <linux/delay.h>
+#endif
+#ifdef YAFFS_COMPILE_FREEZER
+#include <linux/freezer.h>
+#endif
+
+#include <asm/div64.h>
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0))
+
+#include <linux/statfs.h>
+
+#define UnlockPage(p) unlock_page(p)
+#define Page_Uptodate(page)	test_bit(PG_uptodate, &(page)->flags)
+
+/* FIXME: use sb->s_id instead ? */
+#define yaffs_devname(sb, buf)	bdevname(sb->s_bdev, buf)
+
+#else
+
+#include <linux/locks.h>
+#define	BDEVNAME_SIZE		0
+#define	yaffs_devname(sb, buf)	kdevname(sb->s_dev)
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 5, 0))
+/* added NCB 26/5/2006 for 2.4.25-vrs2-tcl1 kernel */
+#define __user
+#endif
+
+#endif
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26))
+#define YPROC_ROOT  (&proc_root)
+#else
+#define YPROC_ROOT  NULL
+#endif
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26))
+#define Y_INIT_TIMER(a)	init_timer(a)
+#else
+#define Y_INIT_TIMER(a)	init_timer_on_stack(a)
+#endif
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 17))
+#define WRITE_SIZE_STR "writesize"
+#define WRITE_SIZE(mtd) ((mtd)->writesize)
+#else
+#define WRITE_SIZE_STR "oobblock"
+#define WRITE_SIZE(mtd) ((mtd)->oobblock)
+#endif
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 27))
+#define YAFFS_USE_WRITE_BEGIN_END 1
+#else
+#define YAFFS_USE_WRITE_BEGIN_END 0
+#endif
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 28))
+static uint32_t YCALCBLOCKS(uint64_t partition_size, uint32_t block_size)
+{
+	uint64_t result = partition_size;
+	do_div(result, block_size);
+	return (uint32_t) result;
+}
+#else
+#define YCALCBLOCKS(s, b) ((s)/(b))
+#endif
+
+#include <linux/uaccess.h>
+#include <linux/mtd/mtd.h>
+
+#include "yportenv.h"
+#include "yaffs_trace.h"
+#include "yaffs_guts.h"
+#include "yaffs_attribs.h"
+
+#include "yaffs_linux.h"
+
+#include "yaffs_mtdif.h"
+#include "yaffs_mtdif1.h"
+#include "yaffs_mtdif2.h"
+
+unsigned int yaffs_trace_mask = YAFFS_TRACE_BAD_BLOCKS | YAFFS_TRACE_ALWAYS;
+unsigned int yaffs_wr_attempts = YAFFS_WR_ATTEMPTS;
+unsigned int yaffs_auto_checkpoint = 1;
+unsigned int yaffs_gc_control = 1;
+unsigned int yaffs_bg_enable = 1;
+unsigned int yaffs_auto_select = 1;
+/* Module Parameters */
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0))
+module_param(yaffs_trace_mask, uint, 0644);
+module_param(yaffs_wr_attempts, uint, 0644);
+module_param(yaffs_auto_checkpoint, uint, 0644);
+module_param(yaffs_gc_control, uint, 0644);
+module_param(yaffs_bg_enable, uint, 0644);
+#else
+MODULE_PARM(yaffs_trace_mask, "i");
+MODULE_PARM(yaffs_wr_attempts, "i");
+MODULE_PARM(yaffs_auto_checkpoint, "i");
+MODULE_PARM(yaffs_gc_control, "i");
+#endif
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 25))
+/* use iget and read_inode */
+#define Y_IGET(sb, inum) iget((sb), (inum))
+static void yaffs_read_inode(struct inode *inode);
+
+#else
+/* Call local equivalent */
+#define YAFFS_USE_OWN_IGET
+#define Y_IGET(sb, inum) yaffs_iget((sb), (inum))
+
+static struct inode *yaffs_iget(struct super_block *sb, unsigned long ino);
+#endif
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 18))
+#define yaffs_inode_to_obj_lv(iptr) ((iptr)->i_private)
+#else
+#define yaffs_inode_to_obj_lv(iptr) ((iptr)->u.generic_ip)
+#endif
+
+#define yaffs_inode_to_obj(iptr) \
+	((struct yaffs_obj *)(yaffs_inode_to_obj_lv(iptr)))
+#define yaffs_dentry_to_obj(dptr) yaffs_inode_to_obj((dptr)->d_inode)
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0))
+#define yaffs_super_to_dev(sb)	((struct yaffs_dev *)sb->s_fs_info)
+#else
+#define yaffs_super_to_dev(sb)	((struct yaffs_dev *)sb->u.generic_sbp)
+#endif
+
+#define update_dir_time(dir) do {\
+			(dir)->i_ctime = (dir)->i_mtime = CURRENT_TIME; \
+		} while (0)
+
+static void yaffs_put_super(struct super_block *sb);
+
+static ssize_t yaffs_file_write(struct file *f, const char *buf, size_t n,
+				loff_t *pos);
+static ssize_t yaffs_hold_space(struct file *f);
+static void yaffs_release_space(struct file *f);
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 17))
+static int yaffs_file_flush(struct file *file, fl_owner_t id);
+#else
+static int yaffs_file_flush(struct file *file);
+#endif
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39))
+static int yaffs_sync_object(struct file *file, loff_t start, loff_t end, int datasync);
+#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 34))
+static int yaffs_sync_object(struct file *file, int datasync);
+#else
+static int yaffs_sync_object(struct file *file, struct dentry *dentry,
+			     int datasync);
+#endif
+
+static int yaffs_readdir(struct file *f, void *dirent, filldir_t filldir);
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0))
+static int yaffs_create(struct inode *dir, struct dentry *dentry, int mode,
+			struct nameidata *n);
+static struct dentry *yaffs_lookup(struct inode *dir, struct dentry *dentry,
+				   struct nameidata *n);
+#else
+static int yaffs_create(struct inode *dir, struct dentry *dentry, int mode);
+static struct dentry *yaffs_lookup(struct inode *dir, struct dentry *dentry);
+#endif
+static int yaffs_link(struct dentry *old_dentry, struct inode *dir,
+		      struct dentry *dentry);
+static int yaffs_unlink(struct inode *dir, struct dentry *dentry);
+static int yaffs_symlink(struct inode *dir, struct dentry *dentry,
+			 const char *symname);
+static int yaffs_mkdir(struct inode *dir, struct dentry *dentry, int mode);
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0))
+static int yaffs_mknod(struct inode *dir, struct dentry *dentry, int mode,
+		       dev_t dev);
+#else
+static int yaffs_mknod(struct inode *dir, struct dentry *dentry, int mode,
+		       int dev);
+#endif
+static int yaffs_rename(struct inode *old_dir, struct dentry *old_dentry,
+			struct inode *new_dir, struct dentry *new_dentry);
+static int yaffs_setattr(struct dentry *dentry, struct iattr *attr);
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 17))
+static int yaffs_sync_fs(struct super_block *sb, int wait);
+static void yaffs_write_super(struct super_block *sb);
+#else
+static int yaffs_sync_fs(struct super_block *sb);
+static int yaffs_write_super(struct super_block *sb);
+#endif
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 17))
+static int yaffs_statfs(struct dentry *dentry, struct kstatfs *buf);
+#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0))
+static int yaffs_statfs(struct super_block *sb, struct kstatfs *buf);
+#else
+static int yaffs_statfs(struct super_block *sb, struct statfs *buf);
+#endif
+
+#ifdef YAFFS_HAS_PUT_INODE
+static void yaffs_put_inode(struct inode *inode);
+#endif
+
+#ifdef YAFFS_HAS_EVICT_INODE
+static void yaffs_evict_inode(struct inode *);
+#else
+static void yaffs_delete_inode(struct inode *);
+static void yaffs_clear_inode(struct inode *);
+#endif
+
+static int yaffs_readpage(struct file *file, struct page *page);
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0))
+static int yaffs_writepage(struct page *page, struct writeback_control *wbc);
+#else
+static int yaffs_writepage(struct page *page);
+#endif
+
+static int yaffs_setxattr(struct dentry *dentry, const char *name,
+		   const void *value, size_t size, int flags);
+static ssize_t yaffs_getxattr(struct dentry *dentry, const char *name,
+				void *buff, size_t size);
+static int yaffs_removexattr(struct dentry *dentry, const char *name);
+static ssize_t yaffs_listxattr(struct dentry *dentry, char *buff, size_t size);
+
+#if (YAFFS_USE_WRITE_BEGIN_END != 0)
+static int yaffs_write_begin(struct file *filp, struct address_space *mapping,
+			     loff_t pos, unsigned len, unsigned flags,
+			     struct page **pagep, void **fsdata);
+static int yaffs_write_end(struct file *filp, struct address_space *mapping,
+			   loff_t pos, unsigned len, unsigned copied,
+			   struct page *pg, void *fsdadata);
+#else
+static int yaffs_prepare_write(struct file *f, struct page *pg,
+			       unsigned offset, unsigned to);
+static int yaffs_commit_write(struct file *f, struct page *pg, unsigned offset,
+			      unsigned to);
+
+#endif
+
+static int yaffs_readlink(struct dentry *dentry, char __user * buffer,
+			  int buflen);
+#if (YAFFS_NEW_FOLLOW_LINK == 1)
+void yaffs_put_link(struct dentry *dentry, struct nameidata *nd, void *alias);
+static void *yaffs_follow_link(struct dentry *dentry, struct nameidata *nd);
+#else
+static int yaffs_follow_link(struct dentry *dentry, struct nameidata *nd);
+#endif
+
+static void yaffs_touch_super(struct yaffs_dev *dev);
+
+static int yaffs_vfs_setattr(struct inode *, struct iattr *);
+
+static struct address_space_operations yaffs_file_address_operations = {
+	.readpage = yaffs_readpage,
+	.writepage = yaffs_writepage,
+#if (YAFFS_USE_WRITE_BEGIN_END > 0)
+	.write_begin = yaffs_write_begin,
+	.write_end = yaffs_write_end,
+#else
+	.prepare_write = yaffs_prepare_write,
+	.commit_write = yaffs_commit_write,
+#endif
+};
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 22))
+static const struct file_operations yaffs_file_operations = {
+	.read = do_sync_read,
+	.write = do_sync_write,
+	.aio_read = generic_file_aio_read,
+	.aio_write = generic_file_aio_write,
+	.mmap = generic_file_mmap,
+	.flush = yaffs_file_flush,
+	.fsync = yaffs_sync_object,
+	.splice_read = generic_file_splice_read,
+	.splice_write = generic_file_splice_write,
+	.llseek = generic_file_llseek,
+};
+
+#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 18))
+
+static const struct file_operations yaffs_file_operations = {
+	.read = do_sync_read,
+	.write = do_sync_write,
+	.aio_read = generic_file_aio_read,
+	.aio_write = generic_file_aio_write,
+	.mmap = generic_file_mmap,
+	.flush = yaffs_file_flush,
+	.fsync = yaffs_sync_object,
+	.sendfile = generic_file_sendfile,
+};
+
+#else
+
+static const struct file_operations yaffs_file_operations = {
+	.read = generic_file_read,
+	.write = generic_file_write,
+	.mmap = generic_file_mmap,
+	.flush = yaffs_file_flush,
+	.fsync = yaffs_sync_object,
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0))
+	.sendfile = generic_file_sendfile,
+#endif
+};
+#endif
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 25))
+static void zero_user_segment(struct page *page, unsigned start, unsigned end)
+{
+	void *kaddr = kmap_atomic(page, KM_USER0);
+	memset(kaddr + start, 0, end - start);
+	kunmap_atomic(kaddr, KM_USER0);
+	flush_dcache_page(page);
+}
+#endif
+
+static const struct inode_operations yaffs_file_inode_operations = {
+	.setattr = yaffs_setattr,
+	.setxattr = yaffs_setxattr,
+	.getxattr = yaffs_getxattr,
+	.listxattr = yaffs_listxattr,
+	.removexattr = yaffs_removexattr,
+};
+
+static const struct inode_operations yaffs_symlink_inode_operations = {
+	.readlink = yaffs_readlink,
+	.follow_link = yaffs_follow_link,
+#if (YAFFS_NEW_FOLLOW_LINK == 1)
+	.put_link = yaffs_put_link,
+#endif
+	.setattr = yaffs_setattr,
+	.setxattr = yaffs_setxattr,
+	.getxattr = yaffs_getxattr,
+	.listxattr = yaffs_listxattr,
+	.removexattr = yaffs_removexattr,
+};
+
+static const struct inode_operations yaffs_dir_inode_operations = {
+	.create = yaffs_create,
+	.lookup = yaffs_lookup,
+	.link = yaffs_link,
+	.unlink = yaffs_unlink,
+	.symlink = yaffs_symlink,
+	.mkdir = yaffs_mkdir,
+	.rmdir = yaffs_unlink,
+	.mknod = yaffs_mknod,
+	.rename = yaffs_rename,
+	.setattr = yaffs_setattr,
+	.setxattr = yaffs_setxattr,
+	.getxattr = yaffs_getxattr,
+	.listxattr = yaffs_listxattr,
+	.removexattr = yaffs_removexattr,
+};
+
+static const struct file_operations yaffs_dir_operations = {
+	.read = generic_read_dir,
+	.readdir = yaffs_readdir,
+	.fsync = yaffs_sync_object,
+	.llseek = generic_file_llseek,
+};
+
+static const struct super_operations yaffs_super_ops = {
+	.statfs = yaffs_statfs,
+
+#ifndef YAFFS_USE_OWN_IGET
+	.read_inode = yaffs_read_inode,
+#endif
+#ifdef YAFFS_HAS_PUT_INODE
+	.put_inode = yaffs_put_inode,
+#endif
+	.put_super = yaffs_put_super,
+#ifdef YAFFS_HAS_EVICT_INODE
+	.evict_inode = yaffs_evict_inode,
+#else
+	.delete_inode = yaffs_delete_inode,
+	.clear_inode = yaffs_clear_inode,
+#endif
+	.sync_fs = yaffs_sync_fs,
+	.write_super = yaffs_write_super,
+};
+
+static int yaffs_vfs_setattr(struct inode *inode, struct iattr *attr)
+{
+#ifdef YAFFS_USE_SETATTR_COPY
+	setattr_copy(inode, attr);
+	return 0;
+#else
+	return inode_setattr(inode, attr);
+#endif
+
+}
+
+static int yaffs_vfs_setsize(struct inode *inode, loff_t newsize)
+{
+#ifdef YAFFS_USE_TRUNCATE_SETSIZE
+	truncate_setsize(inode, newsize);
+	return 0;
+#else
+	truncate_inode_pages(&inode->i_data, newsize);
+	return 0;
+#endif
+
+}
+
+static unsigned yaffs_gc_control_callback(struct yaffs_dev *dev)
+{
+	return yaffs_gc_control;
+}
+
+static void yaffs_gross_lock(struct yaffs_dev *dev)
+{
+	yaffs_trace(YAFFS_TRACE_LOCK, "yaffs locking %p", current);
+	mutex_lock(&(yaffs_dev_to_lc(dev)->gross_lock));
+	yaffs_trace(YAFFS_TRACE_LOCK, "yaffs locked %p", current);
+}
+
+static void yaffs_gross_unlock(struct yaffs_dev *dev)
+{
+	yaffs_trace(YAFFS_TRACE_LOCK, "yaffs unlocking %p", current);
+	mutex_unlock(&(yaffs_dev_to_lc(dev)->gross_lock));
+}
+
+#ifdef YAFFS_COMPILE_EXPORTFS
+
+static struct inode *yaffs2_nfs_get_inode(struct super_block *sb, uint64_t ino,
+					  uint32_t generation)
+{
+	return Y_IGET(sb, ino);
+}
+
+static struct dentry *yaffs2_fh_to_dentry(struct super_block *sb,
+					  struct fid *fid, int fh_len,
+					  int fh_type)
+{
+	return generic_fh_to_dentry(sb, fid, fh_len, fh_type,
+				    yaffs2_nfs_get_inode);
+}
+
+static struct dentry *yaffs2_fh_to_parent(struct super_block *sb,
+					  struct fid *fid, int fh_len,
+					  int fh_type)
+{
+	return generic_fh_to_parent(sb, fid, fh_len, fh_type,
+				    yaffs2_nfs_get_inode);
+}
+
+struct dentry *yaffs2_get_parent(struct dentry *dentry)
+{
+
+	struct super_block *sb = dentry->d_inode->i_sb;
+	struct dentry *parent = ERR_PTR(-ENOENT);
+	struct inode *inode;
+	unsigned long parent_ino;
+	struct yaffs_obj *d_obj;
+	struct yaffs_obj *parent_obj;
+
+	d_obj = yaffs_inode_to_obj(dentry->d_inode);
+
+	if (d_obj) {
+		parent_obj = d_obj->parent;
+		if (parent_obj) {
+			parent_ino = yaffs_get_obj_inode(parent_obj);
+			inode = Y_IGET(sb, parent_ino);
+
+			if (IS_ERR(inode)) {
+				parent = ERR_CAST(inode);
+			} else {
+				parent = d_obtain_alias(inode);
+				if (!IS_ERR(parent)) {
+					parent = ERR_PTR(-ENOMEM);
+					iput(inode);
+				}
+			}
+		}
+	}
+
+	return parent;
+}
+
+/* Just declare a zero structure as a NULL value implies
+ * using the default functions of exportfs.
+ */
+
+static struct export_operations yaffs_export_ops = {
+	.fh_to_dentry = yaffs2_fh_to_dentry,
+	.fh_to_parent = yaffs2_fh_to_parent,
+	.get_parent = yaffs2_get_parent,
+};
+
+#endif
+
+/*-----------------------------------------------------------------*/
+/* Directory search context allows us to unlock access to yaffs during
+ * filldir without causing problems with the directory being modified.
+ * This is similar to the tried and tested mechanism used in yaffs direct.
+ *
+ * A search context iterates along a doubly linked list of siblings in the
+ * directory. If the iterating object is deleted then this would corrupt
+ * the list iteration, likely causing a crash. The search context avoids
+ * this by using the remove_obj_fn to move the search context to the
+ * next object before the object is deleted.
+ *
+ * Many readdirs (and thus seach conexts) may be alive simulateously so
+ * each struct yaffs_dev has a list of these.
+ *
+ * A seach context lives for the duration of a readdir.
+ *
+ * All these functions must be called while yaffs is locked.
+ */
+
+struct yaffs_search_context {
+	struct yaffs_dev *dev;
+	struct yaffs_obj *dir_obj;
+	struct yaffs_obj *next_return;
+	struct list_head others;
+};
+
+/*
+ * yaffs_new_search() creates a new search context, initialises it and
+ * adds it to the device's search context list.
+ *
+ * Called at start of readdir.
+ */
+static struct yaffs_search_context *yaffs_new_search(struct yaffs_obj *dir)
+{
+	struct yaffs_dev *dev = dir->my_dev;
+	struct yaffs_search_context *sc =
+	    kmalloc(sizeof(struct yaffs_search_context), GFP_NOFS);
+	if (sc) {
+		sc->dir_obj = dir;
+		sc->dev = dev;
+		if (list_empty(&sc->dir_obj->variant.dir_variant.children))
+			sc->next_return = NULL;
+		else
+			sc->next_return =
+			    list_entry(dir->variant.dir_variant.children.next,
+				       struct yaffs_obj, siblings);
+		INIT_LIST_HEAD(&sc->others);
+		list_add(&sc->others, &(yaffs_dev_to_lc(dev)->search_contexts));
+	}
+	return sc;
+}
+
+/*
+ * yaffs_search_end() disposes of a search context and cleans up.
+ */
+static void yaffs_search_end(struct yaffs_search_context *sc)
+{
+	if (sc) {
+		list_del(&sc->others);
+		kfree(sc);
+	}
+}
+
+/*
+ * yaffs_search_advance() moves a search context to the next object.
+ * Called when the search iterates or when an object removal causes
+ * the search context to be moved to the next object.
+ */
+static void yaffs_search_advance(struct yaffs_search_context *sc)
+{
+	if (!sc)
+		return;
+
+	if (sc->next_return == NULL ||
+	    list_empty(&sc->dir_obj->variant.dir_variant.children))
+		sc->next_return = NULL;
+	else {
+		struct list_head *next = sc->next_return->siblings.next;
+
+		if (next == &sc->dir_obj->variant.dir_variant.children)
+			sc->next_return = NULL;	/* end of list */
+		else
+			sc->next_return =
+			    list_entry(next, struct yaffs_obj, siblings);
+	}
+}
+
+/*
+ * yaffs_remove_obj_callback() is called when an object is unlinked.
+ * We check open search contexts and advance any which are currently
+ * on the object being iterated.
+ */
+static void yaffs_remove_obj_callback(struct yaffs_obj *obj)
+{
+
+	struct list_head *i;
+	struct yaffs_search_context *sc;
+	struct list_head *search_contexts =
+	    &(yaffs_dev_to_lc(obj->my_dev)->search_contexts);
+
+	/* Iterate through the directory search contexts.
+	 * If any are currently on the object being removed, then advance
+	 * the search context to the next object to prevent a hanging pointer.
+	 */
+	list_for_each(i, search_contexts) {
+		sc = list_entry(i, struct yaffs_search_context, others);
+		if (sc->next_return == obj)
+			yaffs_search_advance(sc);
+	}
+
+}
+
+/*-----------------------------------------------------------------*/
+
+static int yaffs_readlink(struct dentry *dentry, char __user * buffer,
+			  int buflen)
+{
+	unsigned char *alias;
+	int ret;
+
+	struct yaffs_dev *dev = yaffs_dentry_to_obj(dentry)->my_dev;
+
+	yaffs_gross_lock(dev);
+
+	alias = yaffs_get_symlink_alias(yaffs_dentry_to_obj(dentry));
+
+	yaffs_gross_unlock(dev);
+
+	if (!alias)
+		return -ENOMEM;
+
+	ret = vfs_readlink(dentry, buffer, buflen, alias);
+	kfree(alias);
+	return ret;
+}
+
+#if (YAFFS_NEW_FOLLOW_LINK == 1)
+static void *yaffs_follow_link(struct dentry *dentry, struct nameidata *nd)
+{
+	void *ret;
+#else
+static int yaffs_follow_link(struct dentry *dentry, struct nameidata *nd)
+{
+	int ret
+#endif
+	unsigned char *alias;
+	int ret_int = 0;
+	struct yaffs_dev *dev = yaffs_dentry_to_obj(dentry)->my_dev;
+
+	yaffs_gross_lock(dev);
+
+	alias = yaffs_get_symlink_alias(yaffs_dentry_to_obj(dentry));
+	yaffs_gross_unlock(dev);
+
+	if (!alias) {
+		ret_int = -ENOMEM;
+		goto out;
+	}
+#if (YAFFS_NEW_FOLLOW_LINK == 1)
+	nd_set_link(nd, alias);
+	ret = alias;
+out:
+	if (ret_int)
+		ret = ERR_PTR(ret_int);
+	return ret;
+#else
+	ret = vfs_follow_link(nd, alias);
+	kfree(alias);
+out:
+	if (ret_int)
+		ret = ret_int;
+	return ret;
+#endif
+}
+
+#if (YAFFS_NEW_FOLLOW_LINK == 1)
+void yaffs_put_link(struct dentry *dentry, struct nameidata *nd, void *alias)
+{
+	kfree(alias);
+}
+#endif
+
+struct inode *yaffs_get_inode(struct super_block *sb, int mode, int dev,
+			      struct yaffs_obj *obj);
+
+/*
+ * Lookup is used to find objects in the fs
+ */
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0))
+
+static struct dentry *yaffs_lookup(struct inode *dir, struct dentry *dentry,
+				   struct nameidata *n)
+#else
+static struct dentry *yaffs_lookup(struct inode *dir, struct dentry *dentry)
+#endif
+{
+	struct yaffs_obj *obj;
+	struct inode *inode = NULL;	/* NCB 2.5/2.6 needs NULL here */
+
+	struct yaffs_dev *dev = yaffs_inode_to_obj(dir)->my_dev;
+
+	if (current != yaffs_dev_to_lc(dev)->readdir_process)
+		yaffs_gross_lock(dev);
+
+	yaffs_trace(YAFFS_TRACE_OS, "yaffs_lookup for %d:%s",
+		yaffs_inode_to_obj(dir)->obj_id, dentry->d_name.name);
+
+	obj = yaffs_find_by_name(yaffs_inode_to_obj(dir), dentry->d_name.name);
+
+	obj = yaffs_get_equivalent_obj(obj);	/* in case it was a hardlink */
+
+	/* Can't hold gross lock when calling yaffs_get_inode() */
+	if (current != yaffs_dev_to_lc(dev)->readdir_process)
+		yaffs_gross_unlock(dev);
+
+	if (obj) {
+		yaffs_trace(YAFFS_TRACE_OS,
+			"yaffs_lookup found %d", obj->obj_id);
+
+		inode = yaffs_get_inode(dir->i_sb, obj->yst_mode, 0, obj);
+	} else {
+		yaffs_trace(YAFFS_TRACE_OS, "yaffs_lookup not found");
+
+	}
+
+/* added NCB for 2.5/6 compatability - forces add even if inode is
+ * NULL which creates dentry hash */
+	d_add(dentry, inode);
+
+	return NULL;
+}
+
+#ifdef YAFFS_HAS_PUT_INODE
+
+/* For now put inode is just for debugging
+ * Put inode is called when the inode **structure** is put.
+ */
+static void yaffs_put_inode(struct inode *inode)
+{
+	yaffs_trace(YAFFS_TRACE_OS,
+		"yaffs_put_inode: ino %d, count %d"),
+		(int)inode->i_ino, atomic_read(&inode->i_count);
+
+}
+#endif
+
+static void yaffs_unstitch_obj(struct inode *inode, struct yaffs_obj *obj)
+{
+	/* Clear the association between the inode and
+	 * the struct yaffs_obj.
+	 */
+	obj->my_inode = NULL;
+	yaffs_inode_to_obj_lv(inode) = NULL;
+
+	/* If the object freeing was deferred, then the real
+	 * free happens now.
+	 * This should fix the inode inconsistency problem.
+	 */
+	yaffs_handle_defered_free(obj);
+}
+
+#ifdef YAFFS_HAS_EVICT_INODE
+/* yaffs_evict_inode combines into one operation what was previously done in
+ * yaffs_clear_inode() and yaffs_delete_inode()
+ *
+ */
+static void yaffs_evict_inode(struct inode *inode)
+{
+	struct yaffs_obj *obj;
+	struct yaffs_dev *dev;
+	int deleteme = 0;
+
+	obj = yaffs_inode_to_obj(inode);
+
+	yaffs_trace(YAFFS_TRACE_OS,
+		"yaffs_evict_inode: ino %d, count %d %s",
+		(int)inode->i_ino, atomic_read(&inode->i_count),
+		obj ? "object exists" : "null object");
+
+	if (!inode->i_nlink && !is_bad_inode(inode))
+		deleteme = 1;
+	truncate_inode_pages(&inode->i_data, 0);
+	end_writeback(inode);
+
+	if (deleteme && obj) {
+		dev = obj->my_dev;
+		yaffs_gross_lock(dev);
+		yaffs_del_obj(obj);
+		yaffs_gross_unlock(dev);
+	}
+	if (obj) {
+		dev = obj->my_dev;
+		yaffs_gross_lock(dev);
+		yaffs_unstitch_obj(inode, obj);
+		yaffs_gross_unlock(dev);
+	}
+}
+#else
+
+/* clear is called to tell the fs to release any per-inode data it holds.
+ * The object might still exist on disk and is just being thrown out of the cache
+ * or else the object has actually been deleted and we're being called via
+ * the chain
+ *   yaffs_delete_inode() -> clear_inode()->yaffs_clear_inode()
+ */
+
+static void yaffs_clear_inode(struct inode *inode)
+{
+	struct yaffs_obj *obj;
+	struct yaffs_dev *dev;
+
+	obj = yaffs_inode_to_obj(inode);
+
+	yaffs_trace(YAFFS_TRACE_OS,
+		"yaffs_clear_inode: ino %d, count %d %s",
+		(int)inode->i_ino, atomic_read(&inode->i_count),
+		obj ? "object exists" : "null object");
+
+	if (obj) {
+		dev = obj->my_dev;
+		yaffs_gross_lock(dev);
+		yaffs_unstitch_obj(inode, obj);
+		yaffs_gross_unlock(dev);
+	}
+
+}
+
+/* delete is called when the link count is zero and the inode
+ * is put (ie. nobody wants to know about it anymore, time to
+ * delete the file).
+ * NB Must call clear_inode()
+ */
+static void yaffs_delete_inode(struct inode *inode)
+{
+	struct yaffs_obj *obj = yaffs_inode_to_obj(inode);
+	struct yaffs_dev *dev;
+
+	yaffs_trace(YAFFS_TRACE_OS,
+		"yaffs_delete_inode: ino %d, count %d %s",
+		(int)inode->i_ino, atomic_read(&inode->i_count),
+		obj ? "object exists" : "null object");
+
+	if (obj) {
+		dev = obj->my_dev;
+		yaffs_gross_lock(dev);
+		yaffs_del_obj(obj);
+		yaffs_gross_unlock(dev);
+	}
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 13))
+	truncate_inode_pages(&inode->i_data, 0);
+#endif
+	clear_inode(inode);
+}
+#endif
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 17))
+static int yaffs_file_flush(struct file *file, fl_owner_t id)
+#else
+static int yaffs_file_flush(struct file *file)
+#endif
+{
+	struct yaffs_obj *obj = yaffs_dentry_to_obj(file->f_dentry);
+
+	struct yaffs_dev *dev = obj->my_dev;
+
+	yaffs_trace(YAFFS_TRACE_OS,
+		"yaffs_file_flush object %d (%s)",
+		obj->obj_id,
+		obj->dirty ? "dirty" : "clean");
+
+	yaffs_gross_lock(dev);
+
+	yaffs_flush_file(obj, 1, 0);
+
+	yaffs_gross_unlock(dev);
+
+	return 0;
+}
+
+static int yaffs_readpage_nolock(struct file *f, struct page *pg)
+{
+	/* Lifted from jffs2 */
+
+	struct yaffs_obj *obj;
+	unsigned char *pg_buf;
+	int ret;
+
+	struct yaffs_dev *dev;
+
+	yaffs_trace(YAFFS_TRACE_OS,
+		"yaffs_readpage_nolock at %08x, size %08x",
+	   	(unsigned)(pg->index << PAGE_CACHE_SHIFT),
+	   	(unsigned)PAGE_CACHE_SIZE);
+
+	obj = yaffs_dentry_to_obj(f->f_dentry);
+
+	dev = obj->my_dev;
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0))
+	BUG_ON(!PageLocked(pg));
+#else
+	if (!PageLocked(pg))
+		PAGE_BUG(pg);
+#endif
+
+	pg_buf = kmap(pg);
+	/* FIXME: Can kmap fail? */
+
+	yaffs_gross_lock(dev);
+
+	ret = yaffs_file_rd(obj, pg_buf,
+			    pg->index << PAGE_CACHE_SHIFT, PAGE_CACHE_SIZE);
+
+	yaffs_gross_unlock(dev);
+
+	if (ret >= 0)
+		ret = 0;
+
+	if (ret) {
+		ClearPageUptodate(pg);
+		SetPageError(pg);
+	} else {
+		SetPageUptodate(pg);
+		ClearPageError(pg);
+	}
+
+	flush_dcache_page(pg);
+	kunmap(pg);
+
+	yaffs_trace(YAFFS_TRACE_OS, "yaffs_readpage_nolock done");
+	return ret;
+}
+
+static int yaffs_readpage_unlock(struct file *f, struct page *pg)
+{
+	int ret = yaffs_readpage_nolock(f, pg);
+	UnlockPage(pg);
+	return ret;
+}
+
+static int yaffs_readpage(struct file *f, struct page *pg)
+{
+	int ret;
+
+	yaffs_trace(YAFFS_TRACE_OS, "yaffs_readpage");
+	ret = yaffs_readpage_unlock(f, pg);
+	yaffs_trace(YAFFS_TRACE_OS, "yaffs_readpage done");
+	return ret;
+}
+
+/* writepage inspired by/stolen from smbfs */
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0))
+static int yaffs_writepage(struct page *page, struct writeback_control *wbc)
+#else
+static int yaffs_writepage(struct page *page)
+#endif
+{
+	struct yaffs_dev *dev;
+	struct address_space *mapping = page->mapping;
+	struct inode *inode;
+	unsigned long end_index;
+	char *buffer;
+	struct yaffs_obj *obj;
+	int n_written = 0;
+	unsigned n_bytes;
+	loff_t i_size;
+
+	if (!mapping)
+		BUG();
+	inode = mapping->host;
+	if (!inode)
+		BUG();
+	i_size = i_size_read(inode);
+
+	end_index = i_size >> PAGE_CACHE_SHIFT;
+
+	if (page->index < end_index)
+		n_bytes = PAGE_CACHE_SIZE;
+	else {
+		n_bytes = i_size & (PAGE_CACHE_SIZE - 1);
+
+		if (page->index > end_index || !n_bytes) {
+			yaffs_trace(YAFFS_TRACE_OS,
+				"yaffs_writepage at %08x, inode size = %08x!!",
+				(unsigned)(page->index << PAGE_CACHE_SHIFT),
+				(unsigned)inode->i_size);
+			yaffs_trace(YAFFS_TRACE_OS,
+				"                -> don't care!!");
+
+			zero_user_segment(page, 0, PAGE_CACHE_SIZE);
+			set_page_writeback(page);
+			unlock_page(page);
+			end_page_writeback(page);
+			return 0;
+		}
+	}
+
+	if (n_bytes != PAGE_CACHE_SIZE)
+		zero_user_segment(page, n_bytes, PAGE_CACHE_SIZE);
+
+	get_page(page);
+
+	buffer = kmap(page);
+
+	obj = yaffs_inode_to_obj(inode);
+	dev = obj->my_dev;
+	yaffs_gross_lock(dev);
+
+	yaffs_trace(YAFFS_TRACE_OS,
+		"yaffs_writepage at %08x, size %08x",
+		(unsigned)(page->index << PAGE_CACHE_SHIFT), n_bytes);
+	yaffs_trace(YAFFS_TRACE_OS,
+		"writepag0: obj = %05x, ino = %05x",
+		(int)obj->variant.file_variant.file_size, (int)inode->i_size);
+
+	n_written = yaffs_wr_file(obj, buffer,
+				  page->index << PAGE_CACHE_SHIFT, n_bytes, 0);
+
+	yaffs_touch_super(dev);
+
+	yaffs_trace(YAFFS_TRACE_OS,
+		"writepag1: obj = %05x, ino = %05x",
+		(int)obj->variant.file_variant.file_size, (int)inode->i_size);
+
+	yaffs_gross_unlock(dev);
+
+	kunmap(page);
+	set_page_writeback(page);
+	unlock_page(page);
+	end_page_writeback(page);
+	put_page(page);
+
+	return (n_written == n_bytes) ? 0 : -ENOSPC;
+}
+
+#if (YAFFS_USE_WRITE_BEGIN_END > 0)
+static int yaffs_write_begin(struct file *filp, struct address_space *mapping,
+			     loff_t pos, unsigned len, unsigned flags,
+			     struct page **pagep, void **fsdata)
+{
+	struct page *pg = NULL;
+	pgoff_t index = pos >> PAGE_CACHE_SHIFT;
+
+	int ret = 0;
+	int space_held = 0;
+
+	/* Get a page */
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 28)
+	pg = grab_cache_page_write_begin(mapping, index, flags);
+#else
+	pg = __grab_cache_page(mapping, index);
+#endif
+
+	*pagep = pg;
+	if (!pg) {
+		ret = -ENOMEM;
+		goto out;
+	}
+	yaffs_trace(YAFFS_TRACE_OS,
+		"start yaffs_write_begin index %d(%x) uptodate %d",
+		(int)index, (int)index, Page_Uptodate(pg) ? 1 : 0);
+
+	/* Get fs space */
+	space_held = yaffs_hold_space(filp);
+
+	if (!space_held) {
+		ret = -ENOSPC;
+		goto out;
+	}
+
+	/* Update page if required */
+
+	if (!Page_Uptodate(pg))
+		ret = yaffs_readpage_nolock(filp, pg);
+
+	if (ret)
+		goto out;
+
+	/* Happy path return */
+	yaffs_trace(YAFFS_TRACE_OS, "end yaffs_write_begin - ok");
+
+	return 0;
+
+out:
+	yaffs_trace(YAFFS_TRACE_OS,
+		"end yaffs_write_begin fail returning %d", ret);
+	if (space_held)
+		yaffs_release_space(filp);
+	if (pg) {
+		unlock_page(pg);
+		page_cache_release(pg);
+	}
+	return ret;
+}
+
+#else
+
+static int yaffs_prepare_write(struct file *f, struct page *pg,
+			       unsigned offset, unsigned to)
+{
+	yaffs_trace(YAFFS_TRACE_OS, "yaffs_prepair_write");
+
+	if (!Page_Uptodate(pg))
+		return yaffs_readpage_nolock(f, pg);
+	return 0;
+}
+#endif
+
+#if (YAFFS_USE_WRITE_BEGIN_END > 0)
+static int yaffs_write_end(struct file *filp, struct address_space *mapping,
+			   loff_t pos, unsigned len, unsigned copied,
+			   struct page *pg, void *fsdadata)
+{
+	int ret = 0;
+	void *addr, *kva;
+	uint32_t offset_into_page = pos & (PAGE_CACHE_SIZE - 1);
+
+	kva = kmap(pg);
+	addr = kva + offset_into_page;
+
+	yaffs_trace(YAFFS_TRACE_OS,
+		"yaffs_write_end addr %p pos %x n_bytes %d",
+		addr, (unsigned)pos, copied);
+
+	ret = yaffs_file_write(filp, addr, copied, &pos);
+
+	if (ret != copied) {
+		yaffs_trace(YAFFS_TRACE_OS,
+			"yaffs_write_end not same size ret %d  copied %d",
+			ret, copied);
+		SetPageError(pg);
+	}
+
+	kunmap(pg);
+
+	yaffs_release_space(filp);
+	unlock_page(pg);
+	page_cache_release(pg);
+	return ret;
+}
+#else
+
+static int yaffs_commit_write(struct file *f, struct page *pg, unsigned offset,
+			      unsigned to)
+{
+	void *addr, *kva;
+
+	loff_t pos = (((loff_t) pg->index) << PAGE_CACHE_SHIFT) + offset;
+	int n_bytes = to - offset;
+	int n_written;
+
+	unsigned spos = pos;
+	unsigned saddr;
+
+	kva = kmap(pg);
+	addr = kva + offset;
+
+	saddr = (unsigned)addr;
+
+	yaffs_trace(YAFFS_TRACE_OS,
+		"yaffs_commit_write addr %x pos %x n_bytes %d",
+		saddr, spos, n_bytes);
+
+	n_written = yaffs_file_write(f, addr, n_bytes, &pos);
+
+	if (n_written != n_bytes) {
+		yaffs_trace(YAFFS_TRACE_OS,
+			"yaffs_commit_write not same size n_written %d  n_bytes %d",
+			n_written, n_bytes);
+		SetPageError(pg);
+	}
+	kunmap(pg);
+
+	yaffs_trace(YAFFS_TRACE_OS,
+		"yaffs_commit_write returning %d",
+		n_written == n_bytes ? 0 : n_written);
+
+	return n_written == n_bytes ? 0 : n_written;
+}
+#endif
+
+static void yaffs_fill_inode_from_obj(struct inode *inode,
+				      struct yaffs_obj *obj)
+{
+	if (inode && obj) {
+
+		/* Check mode against the variant type and attempt to repair if broken. */
+		u32 mode = obj->yst_mode;
+		switch (obj->variant_type) {
+		case YAFFS_OBJECT_TYPE_FILE:
+			if (!S_ISREG(mode)) {
+				obj->yst_mode &= ~S_IFMT;
+				obj->yst_mode |= S_IFREG;
+			}
+
+			break;
+		case YAFFS_OBJECT_TYPE_SYMLINK:
+			if (!S_ISLNK(mode)) {
+				obj->yst_mode &= ~S_IFMT;
+				obj->yst_mode |= S_IFLNK;
+			}
+
+			break;
+		case YAFFS_OBJECT_TYPE_DIRECTORY:
+			if (!S_ISDIR(mode)) {
+				obj->yst_mode &= ~S_IFMT;
+				obj->yst_mode |= S_IFDIR;
+			}
+
+			break;
+		case YAFFS_OBJECT_TYPE_UNKNOWN:
+		case YAFFS_OBJECT_TYPE_HARDLINK:
+		case YAFFS_OBJECT_TYPE_SPECIAL:
+		default:
+			/* TODO? */
+			break;
+		}
+
+		inode->i_flags |= S_NOATIME;
+
+		inode->i_ino = obj->obj_id;
+		inode->i_mode = obj->yst_mode;
+		inode->i_uid = obj->yst_uid;
+		inode->i_gid = obj->yst_gid;
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19))
+		inode->i_blksize = inode->i_sb->s_blocksize;
+#endif
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0))
+
+		inode->i_rdev = old_decode_dev(obj->yst_rdev);
+		inode->i_atime.tv_sec = (time_t) (obj->yst_atime);
+		inode->i_atime.tv_nsec = 0;
+		inode->i_mtime.tv_sec = (time_t) obj->yst_mtime;
+		inode->i_mtime.tv_nsec = 0;
+		inode->i_ctime.tv_sec = (time_t) obj->yst_ctime;
+		inode->i_ctime.tv_nsec = 0;
+#else
+		inode->i_rdev = obj->yst_rdev;
+		inode->i_atime = obj->yst_atime;
+		inode->i_mtime = obj->yst_mtime;
+		inode->i_ctime = obj->yst_ctime;
+#endif
+		inode->i_size = yaffs_get_obj_length(obj);
+		inode->i_blocks = (inode->i_size + 511) >> 9;
+
+		inode->i_nlink = yaffs_get_obj_link_count(obj);
+
+		yaffs_trace(YAFFS_TRACE_OS,
+			"yaffs_fill_inode mode %x uid %d gid %d size %d count %d",
+			inode->i_mode, inode->i_uid, inode->i_gid,
+			(int)inode->i_size, atomic_read(&inode->i_count));
+
+		switch (obj->yst_mode & S_IFMT) {
+		default:	/* fifo, device or socket */
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0))
+			init_special_inode(inode, obj->yst_mode,
+					   old_decode_dev(obj->yst_rdev));
+#else
+			init_special_inode(inode, obj->yst_mode,
+					   (dev_t) (obj->yst_rdev));
+#endif
+			break;
+		case S_IFREG:	/* file */
+			inode->i_op = &yaffs_file_inode_operations;
+			inode->i_fop = &yaffs_file_operations;
+			inode->i_mapping->a_ops =
+			    &yaffs_file_address_operations;
+			break;
+		case S_IFDIR:	/* directory */
+			inode->i_op = &yaffs_dir_inode_operations;
+			inode->i_fop = &yaffs_dir_operations;
+			break;
+		case S_IFLNK:	/* symlink */
+			inode->i_op = &yaffs_symlink_inode_operations;
+			break;
+		}
+
+		yaffs_inode_to_obj_lv(inode) = obj;
+
+		obj->my_inode = inode;
+
+	} else {
+		yaffs_trace(YAFFS_TRACE_OS,
+			"yaffs_fill_inode invalid parameters");
+	}
+
+}
+
+struct inode *yaffs_get_inode(struct super_block *sb, int mode, int dev,
+			      struct yaffs_obj *obj)
+{
+	struct inode *inode;
+
+	if (!sb) {
+		yaffs_trace(YAFFS_TRACE_OS,
+			"yaffs_get_inode for NULL super_block!!");
+		return NULL;
+
+	}
+
+	if (!obj) {
+		yaffs_trace(YAFFS_TRACE_OS,
+			"yaffs_get_inode for NULL object!!");
+		return NULL;
+
+	}
+
+	yaffs_trace(YAFFS_TRACE_OS,
+		"yaffs_get_inode for object %d", obj->obj_id);
+
+	inode = Y_IGET(sb, obj->obj_id);
+	if (IS_ERR(inode))
+		return NULL;
+
+	/* NB Side effect: iget calls back to yaffs_read_inode(). */
+	/* iget also increments the inode's i_count */
+	/* NB You can't be holding gross_lock or deadlock will happen! */
+
+	return inode;
+}
+
+static ssize_t yaffs_file_write(struct file *f, const char *buf, size_t n,
+				loff_t * pos)
+{
+	struct yaffs_obj *obj;
+	int n_written, ipos;
+	struct inode *inode;
+	struct yaffs_dev *dev;
+
+	obj = yaffs_dentry_to_obj(f->f_dentry);
+
+	if (!obj) {
+		yaffs_trace(YAFFS_TRACE_OS,
+			"yaffs_file_write: hey obj is null!");
+                return -EINVAL;
+        }
+
+	dev = obj->my_dev;
+
+	yaffs_gross_lock(dev);
+
+	inode = f->f_dentry->d_inode;
+
+	if (!S_ISBLK(inode->i_mode) && f->f_flags & O_APPEND)
+		ipos = inode->i_size;
+	else
+		ipos = *pos;
+
+	yaffs_trace(YAFFS_TRACE_OS,
+		"yaffs_file_write about to write writing %u(%x) bytes to object %d at %d(%x)",
+		(unsigned)n, (unsigned)n, obj->obj_id, ipos, ipos);
+
+	n_written = yaffs_wr_file(obj, buf, ipos, n, 0);
+
+	yaffs_touch_super(dev);
+
+	yaffs_trace(YAFFS_TRACE_OS,
+		"yaffs_file_write: %d(%x) bytes written",
+		(unsigned)n, (unsigned)n);
+
+	if (n_written > 0) {
+		ipos += n_written;
+		*pos = ipos;
+		if (ipos > inode->i_size) {
+			inode->i_size = ipos;
+			inode->i_blocks = (ipos + 511) >> 9;
+
+			yaffs_trace(YAFFS_TRACE_OS,
+				"yaffs_file_write size updated to %d bytes, %d blocks",
+				ipos, (int)(inode->i_blocks));
+		}
+
+	}
+	yaffs_gross_unlock(dev);
+	return (n_written == 0) && (n > 0) ? -ENOSPC : n_written;
+}
+
+/* Space holding and freeing is done to ensure we have space available for write_begin/end */
+/* For now we just assume few parallel writes and check against a small number. */
+/* Todo: need to do this with a counter to handle parallel reads better */
+
+static ssize_t yaffs_hold_space(struct file *f)
+{
+	struct yaffs_obj *obj;
+	struct yaffs_dev *dev;
+
+	int n_free_chunks;
+
+	obj = yaffs_dentry_to_obj(f->f_dentry);
+
+	dev = obj->my_dev;
+
+	yaffs_gross_lock(dev);
+
+	n_free_chunks = yaffs_get_n_free_chunks(dev);
+
+	yaffs_gross_unlock(dev);
+
+	return (n_free_chunks > 20) ? 1 : 0;
+}
+
+static void yaffs_release_space(struct file *f)
+{
+	struct yaffs_obj *obj;
+	struct yaffs_dev *dev;
+
+	obj = yaffs_dentry_to_obj(f->f_dentry);
+
+	dev = obj->my_dev;
+
+	yaffs_gross_lock(dev);
+
+	yaffs_gross_unlock(dev);
+}
+
+static int yaffs_readdir(struct file *f, void *dirent, filldir_t filldir)
+{
+	struct yaffs_obj *obj;
+	struct yaffs_dev *dev;
+	struct yaffs_search_context *sc;
+	struct inode *inode = f->f_dentry->d_inode;
+	unsigned long offset, curoffs;
+	struct yaffs_obj *l;
+	int ret_val = 0;
+
+	char name[YAFFS_MAX_NAME_LENGTH + 1];
+
+	obj = yaffs_dentry_to_obj(f->f_dentry);
+	dev = obj->my_dev;
+
+	yaffs_gross_lock(dev);
+
+	yaffs_dev_to_lc(dev)->readdir_process = current;
+
+	offset = f->f_pos;
+
+	sc = yaffs_new_search(obj);
+	if (!sc) {
+		ret_val = -ENOMEM;
+		goto out;
+	}
+
+	yaffs_trace(YAFFS_TRACE_OS,
+		"yaffs_readdir: starting at %d", (int)offset);
+
+	if (offset == 0) {
+		yaffs_trace(YAFFS_TRACE_OS,
+			"yaffs_readdir: entry . ino %d",
+			(int)inode->i_ino);
+		yaffs_gross_unlock(dev);
+		if (filldir(dirent, ".", 1, offset, inode->i_ino, DT_DIR) < 0) {
+			yaffs_gross_lock(dev);
+			goto out;
+		}
+		yaffs_gross_lock(dev);
+		offset++;
+		f->f_pos++;
+	}
+	if (offset == 1) {
+		yaffs_trace(YAFFS_TRACE_OS,
+			"yaffs_readdir: entry .. ino %d",
+			(int)f->f_dentry->d_parent->d_inode->i_ino);
+		yaffs_gross_unlock(dev);
+		if (filldir(dirent, "..", 2, offset,
+			    f->f_dentry->d_parent->d_inode->i_ino,
+			    DT_DIR) < 0) {
+			yaffs_gross_lock(dev);
+			goto out;
+		}
+		yaffs_gross_lock(dev);
+		offset++;
+		f->f_pos++;
+	}
+
+	curoffs = 1;
+
+	/* If the directory has changed since the open or last call to
+	   readdir, rewind to after the 2 canned entries. */
+	if (f->f_version != inode->i_version) {
+		offset = 2;
+		f->f_pos = offset;
+		f->f_version = inode->i_version;
+	}
+
+	while (sc->next_return) {
+		curoffs++;
+		l = sc->next_return;
+		if (curoffs >= offset) {
+			int this_inode = yaffs_get_obj_inode(l);
+			int this_type = yaffs_get_obj_type(l);
+
+			yaffs_get_obj_name(l, name, YAFFS_MAX_NAME_LENGTH + 1);
+			yaffs_trace(YAFFS_TRACE_OS,
+				"yaffs_readdir: %s inode %d",
+				name, yaffs_get_obj_inode(l));
+
+			yaffs_gross_unlock(dev);
+
+			if (filldir(dirent,
+				    name,
+				    strlen(name),
+				    offset, this_inode, this_type) < 0) {
+				yaffs_gross_lock(dev);
+				goto out;
+			}
+
+			yaffs_gross_lock(dev);
+
+			offset++;
+			f->f_pos++;
+		}
+		yaffs_search_advance(sc);
+	}
+
+out:
+	yaffs_search_end(sc);
+	yaffs_dev_to_lc(dev)->readdir_process = NULL;
+	yaffs_gross_unlock(dev);
+
+	return ret_val;
+}
+
+/*
+ * File creation. Allocate an inode, and we're done..
+ */
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 29)
+#define YCRED(x) x
+#else
+#define YCRED(x) (x->cred)
+#endif
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0))
+static int yaffs_mknod(struct inode *dir, struct dentry *dentry, int mode,
+		       dev_t rdev)
+#else
+static int yaffs_mknod(struct inode *dir, struct dentry *dentry, int mode,
+		       int rdev)
+#endif
+{
+	struct inode *inode;
+
+	struct yaffs_obj *obj = NULL;
+	struct yaffs_dev *dev;
+
+	struct yaffs_obj *parent = yaffs_inode_to_obj(dir);
+
+	int error = -ENOSPC;
+	uid_t uid = YCRED(current)->fsuid;
+	gid_t gid =
+	    (dir->i_mode & S_ISGID) ? dir->i_gid : YCRED(current)->fsgid;
+
+	if ((dir->i_mode & S_ISGID) && S_ISDIR(mode))
+		mode |= S_ISGID;
+
+	if (parent) {
+		yaffs_trace(YAFFS_TRACE_OS,
+			"yaffs_mknod: parent object %d type %d",
+			parent->obj_id, parent->variant_type);
+	} else {
+		yaffs_trace(YAFFS_TRACE_OS,
+			"yaffs_mknod: could not get parent object");
+		return -EPERM;
+	}
+
+	yaffs_trace(YAFFS_TRACE_OS,
+		"yaffs_mknod: making oject for %s, mode %x dev %x",
+		dentry->d_name.name, mode, rdev);
+
+	dev = parent->my_dev;
+
+	yaffs_gross_lock(dev);
+
+	switch (mode & S_IFMT) {
+	default:
+		/* Special (socket, fifo, device...) */
+		yaffs_trace(YAFFS_TRACE_OS, "yaffs_mknod: making special");
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0))
+		obj =
+		    yaffs_create_special(parent, dentry->d_name.name, mode, uid,
+					 gid, old_encode_dev(rdev));
+#else
+		obj =
+		    yaffs_create_special(parent, dentry->d_name.name, mode, uid,
+					 gid, rdev);
+#endif
+		break;
+	case S_IFREG:		/* file          */
+		yaffs_trace(YAFFS_TRACE_OS, "yaffs_mknod: making file");
+		obj = yaffs_create_file(parent, dentry->d_name.name, mode, uid,
+					gid);
+		break;
+	case S_IFDIR:		/* directory */
+		yaffs_trace(YAFFS_TRACE_OS, "yaffs_mknod: making directory");
+		obj = yaffs_create_dir(parent, dentry->d_name.name, mode,
+				       uid, gid);
+		break;
+	case S_IFLNK:		/* symlink */
+		yaffs_trace(YAFFS_TRACE_OS, "yaffs_mknod: making symlink");
+		obj = NULL;	/* Do we ever get here? */
+		break;
+	}
+
+	/* Can not call yaffs_get_inode() with gross lock held */
+	yaffs_gross_unlock(dev);
+
+	if (obj) {
+		inode = yaffs_get_inode(dir->i_sb, mode, rdev, obj);
+		d_instantiate(dentry, inode);
+		update_dir_time(dir);
+		yaffs_trace(YAFFS_TRACE_OS,
+			"yaffs_mknod created object %d count = %d",
+			obj->obj_id, atomic_read(&inode->i_count));
+		error = 0;
+		yaffs_fill_inode_from_obj(dir, parent);
+	} else {
+		yaffs_trace(YAFFS_TRACE_OS, "yaffs_mknod failed making object");
+		error = -ENOMEM;
+	}
+
+	return error;
+}
+
+static int yaffs_mkdir(struct inode *dir, struct dentry *dentry, int mode)
+{
+	int ret_val;
+	yaffs_trace(YAFFS_TRACE_OS, "yaffs_mkdir");
+	ret_val = yaffs_mknod(dir, dentry, mode | S_IFDIR, 0);
+	return ret_val;
+}
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0))
+static int yaffs_create(struct inode *dir, struct dentry *dentry, int mode,
+			struct nameidata *n)
+#else
+static int yaffs_create(struct inode *dir, struct dentry *dentry, int mode)
+#endif
+{
+	yaffs_trace(YAFFS_TRACE_OS, "yaffs_create");
+	return yaffs_mknod(dir, dentry, mode | S_IFREG, 0);
+}
+
+static int yaffs_unlink(struct inode *dir, struct dentry *dentry)
+{
+	int ret_val;
+
+	struct yaffs_dev *dev;
+	struct yaffs_obj *obj;
+
+	yaffs_trace(YAFFS_TRACE_OS, "yaffs_unlink %d:%s",
+		(int)(dir->i_ino), dentry->d_name.name);
+	obj = yaffs_inode_to_obj(dir);
+	dev = obj->my_dev;
+
+	yaffs_gross_lock(dev);
+
+	ret_val = yaffs_unlinker(obj, dentry->d_name.name);
+
+	if (ret_val == YAFFS_OK) {
+		dentry->d_inode->i_nlink--;
+		dir->i_version++;
+		yaffs_gross_unlock(dev);
+		mark_inode_dirty(dentry->d_inode);
+		update_dir_time(dir);
+		return 0;
+	}
+	yaffs_gross_unlock(dev);
+	return -ENOTEMPTY;
+}
+
+/*
+ * Create a link...
+ */
+static int yaffs_link(struct dentry *old_dentry, struct inode *dir,
+		      struct dentry *dentry)
+{
+	struct inode *inode = old_dentry->d_inode;
+	struct yaffs_obj *obj = NULL;
+	struct yaffs_obj *link = NULL;
+	struct yaffs_dev *dev;
+
+	yaffs_trace(YAFFS_TRACE_OS, "yaffs_link");
+
+	obj = yaffs_inode_to_obj(inode);
+	dev = obj->my_dev;
+
+	yaffs_gross_lock(dev);
+
+	if (!S_ISDIR(inode->i_mode))	/* Don't link directories */
+		link =
+		    yaffs_link_obj(yaffs_inode_to_obj(dir), dentry->d_name.name,
+				   obj);
+
+	if (link) {
+		old_dentry->d_inode->i_nlink = yaffs_get_obj_link_count(obj);
+		d_instantiate(dentry, old_dentry->d_inode);
+		atomic_inc(&old_dentry->d_inode->i_count);
+		yaffs_trace(YAFFS_TRACE_OS,
+			"yaffs_link link count %d i_count %d",
+			old_dentry->d_inode->i_nlink,
+			atomic_read(&old_dentry->d_inode->i_count));
+	}
+
+	yaffs_gross_unlock(dev);
+
+	if (link) {
+		update_dir_time(dir);
+		return 0;
+	}
+
+	return -EPERM;
+}
+
+static int yaffs_symlink(struct inode *dir, struct dentry *dentry,
+			 const char *symname)
+{
+	struct yaffs_obj *obj;
+	struct yaffs_dev *dev;
+	uid_t uid = YCRED(current)->fsuid;
+	gid_t gid =
+	    (dir->i_mode & S_ISGID) ? dir->i_gid : YCRED(current)->fsgid;
+
+	yaffs_trace(YAFFS_TRACE_OS, "yaffs_symlink");
+
+	dev = yaffs_inode_to_obj(dir)->my_dev;
+	yaffs_gross_lock(dev);
+	obj = yaffs_create_symlink(yaffs_inode_to_obj(dir), dentry->d_name.name,
+				   S_IFLNK | S_IRWXUGO, uid, gid, symname);
+	yaffs_gross_unlock(dev);
+
+	if (obj) {
+		struct inode *inode;
+
+		inode = yaffs_get_inode(dir->i_sb, obj->yst_mode, 0, obj);
+		d_instantiate(dentry, inode);
+		update_dir_time(dir);
+		yaffs_trace(YAFFS_TRACE_OS, "symlink created OK");
+		return 0;
+	} else {
+		yaffs_trace(YAFFS_TRACE_OS, "symlink not created");
+	}
+
+	return -ENOMEM;
+}
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39))
+static int yaffs_sync_object(struct file *file, loff_t start, loff_t end, int datasync)
+#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 34))
+static int yaffs_sync_object(struct file *file, int datasync)
+#else
+static int yaffs_sync_object(struct file *file, struct dentry *dentry,
+			     int datasync)
+#endif
+{
+
+	struct yaffs_obj *obj;
+	struct yaffs_dev *dev;
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 34))
+	struct dentry *dentry = file->f_path.dentry;
+#endif
+
+	obj = yaffs_dentry_to_obj(dentry);
+
+	dev = obj->my_dev;
+
+	yaffs_trace(YAFFS_TRACE_OS | YAFFS_TRACE_SYNC,
+		"yaffs_sync_object");
+	yaffs_gross_lock(dev);
+	yaffs_flush_file(obj, 1, datasync);
+	yaffs_gross_unlock(dev);
+	return 0;
+}
+
+/*
+ * The VFS layer already does all the dentry stuff for rename.
+ *
+ * NB: POSIX says you can rename an object over an old object of the same name
+ */
+static int yaffs_rename(struct inode *old_dir, struct dentry *old_dentry,
+			struct inode *new_dir, struct dentry *new_dentry)
+{
+	struct yaffs_dev *dev;
+	int ret_val = YAFFS_FAIL;
+	struct yaffs_obj *target;
+
+	yaffs_trace(YAFFS_TRACE_OS, "yaffs_rename");
+	dev = yaffs_inode_to_obj(old_dir)->my_dev;
+
+	yaffs_gross_lock(dev);
+
+	/* Check if the target is an existing directory that is not empty. */
+	target = yaffs_find_by_name(yaffs_inode_to_obj(new_dir),
+				    new_dentry->d_name.name);
+
+	if (target && target->variant_type == YAFFS_OBJECT_TYPE_DIRECTORY &&
+	    !list_empty(&target->variant.dir_variant.children)) {
+
+		yaffs_trace(YAFFS_TRACE_OS, "target is non-empty dir");
+
+		ret_val = YAFFS_FAIL;
+	} else {
+		/* Now does unlinking internally using shadowing mechanism */
+		yaffs_trace(YAFFS_TRACE_OS, "calling yaffs_rename_obj");
+
+		ret_val = yaffs_rename_obj(yaffs_inode_to_obj(old_dir),
+					   old_dentry->d_name.name,
+					   yaffs_inode_to_obj(new_dir),
+					   new_dentry->d_name.name);
+	}
+	yaffs_gross_unlock(dev);
+
+	if (ret_val == YAFFS_OK) {
+		if (target) {
+			new_dentry->d_inode->i_nlink--;
+			mark_inode_dirty(new_dentry->d_inode);
+		}
+
+		update_dir_time(old_dir);
+		if (old_dir != new_dir)
+			update_dir_time(new_dir);
+		return 0;
+	} else {
+		return -ENOTEMPTY;
+	}
+}
+
+static int yaffs_setattr(struct dentry *dentry, struct iattr *attr)
+{
+	struct inode *inode = dentry->d_inode;
+	int error = 0;
+	struct yaffs_dev *dev;
+
+	yaffs_trace(YAFFS_TRACE_OS,
+		"yaffs_setattr of object %d",
+		yaffs_inode_to_obj(inode)->obj_id);
+
+	/* Fail if a requested resize >= 2GB */
+	if (attr->ia_valid & ATTR_SIZE && (attr->ia_size >> 31))
+		error = -EINVAL;
+
+	if (error == 0)
+		error = inode_change_ok(inode, attr);
+	if (error == 0) {
+		int result;
+		if (!error) {
+			error = yaffs_vfs_setattr(inode, attr);
+			yaffs_trace(YAFFS_TRACE_OS, "inode_setattr called");
+			if (attr->ia_valid & ATTR_SIZE) {
+				yaffs_vfs_setsize(inode, attr->ia_size);
+				inode->i_blocks = (inode->i_size + 511) >> 9;
+			}
+		}
+		dev = yaffs_inode_to_obj(inode)->my_dev;
+		if (attr->ia_valid & ATTR_SIZE) {
+			yaffs_trace(YAFFS_TRACE_OS,
+				"resize to %d(%x)",
+				(int)(attr->ia_size),
+				(int)(attr->ia_size));
+		}
+		yaffs_gross_lock(dev);
+		result = yaffs_set_attribs(yaffs_inode_to_obj(inode), attr);
+		if (result == YAFFS_OK) {
+			error = 0;
+		} else {
+			error = -EPERM;
+		}
+		yaffs_gross_unlock(dev);
+
+	}
+
+	yaffs_trace(YAFFS_TRACE_OS, "yaffs_setattr done returning %d", error);
+
+	return error;
+}
+
+static int yaffs_setxattr(struct dentry *dentry, const char *name,
+		   const void *value, size_t size, int flags)
+{
+	struct inode *inode = dentry->d_inode;
+	int error = 0;
+	struct yaffs_dev *dev;
+	struct yaffs_obj *obj = yaffs_inode_to_obj(inode);
+
+	yaffs_trace(YAFFS_TRACE_OS, "yaffs_setxattr of object %d", obj->obj_id);
+
+	if (error == 0) {
+		int result;
+		dev = obj->my_dev;
+		yaffs_gross_lock(dev);
+		result = yaffs_set_xattrib(obj, name, value, size, flags);
+		if (result == YAFFS_OK)
+			error = 0;
+		else if (result < 0)
+			error = result;
+		yaffs_gross_unlock(dev);
+
+	}
+	yaffs_trace(YAFFS_TRACE_OS, "yaffs_setxattr done returning %d", error);
+
+	return error;
+}
+
+static ssize_t yaffs_getxattr(struct dentry * dentry, const char *name,
+			void *buff, size_t size)
+{
+	struct inode *inode = dentry->d_inode;
+	int error = 0;
+	struct yaffs_dev *dev;
+	struct yaffs_obj *obj = yaffs_inode_to_obj(inode);
+
+	yaffs_trace(YAFFS_TRACE_OS,
+		"yaffs_getxattr \"%s\" from object %d",
+		name, obj->obj_id);
+
+	if (error == 0) {
+		dev = obj->my_dev;
+		yaffs_gross_lock(dev);
+		error = yaffs_get_xattrib(obj, name, buff, size);
+		yaffs_gross_unlock(dev);
+
+	}
+	yaffs_trace(YAFFS_TRACE_OS, "yaffs_getxattr done returning %d", error);
+
+	return error;
+}
+
+static int yaffs_removexattr(struct dentry *dentry, const char *name)
+{
+	struct inode *inode = dentry->d_inode;
+	int error = 0;
+	struct yaffs_dev *dev;
+	struct yaffs_obj *obj = yaffs_inode_to_obj(inode);
+
+	yaffs_trace(YAFFS_TRACE_OS,
+		"yaffs_removexattr of object %d", obj->obj_id);
+
+	if (error == 0) {
+		int result;
+		dev = obj->my_dev;
+		yaffs_gross_lock(dev);
+		result = yaffs_remove_xattrib(obj, name);
+		if (result == YAFFS_OK)
+			error = 0;
+		else if (result < 0)
+			error = result;
+		yaffs_gross_unlock(dev);
+
+	}
+	yaffs_trace(YAFFS_TRACE_OS,
+		"yaffs_removexattr done returning %d", error);
+
+	return error;
+}
+
+static ssize_t yaffs_listxattr(struct dentry * dentry, char *buff, size_t size)
+{
+	struct inode *inode = dentry->d_inode;
+	int error = 0;
+	struct yaffs_dev *dev;
+	struct yaffs_obj *obj = yaffs_inode_to_obj(inode);
+
+	yaffs_trace(YAFFS_TRACE_OS,
+		"yaffs_listxattr of object %d", obj->obj_id);
+
+	if (error == 0) {
+		dev = obj->my_dev;
+		yaffs_gross_lock(dev);
+		error = yaffs_list_xattrib(obj, buff, size);
+		yaffs_gross_unlock(dev);
+
+	}
+	yaffs_trace(YAFFS_TRACE_OS,
+		"yaffs_listxattr done returning %d", error);
+
+	return error;
+}
+
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 17))
+static int yaffs_statfs(struct dentry *dentry, struct kstatfs *buf)
+{
+	struct yaffs_dev *dev = yaffs_dentry_to_obj(dentry)->my_dev;
+	struct super_block *sb = dentry->d_sb;
+#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0))
+static int yaffs_statfs(struct super_block *sb, struct kstatfs *buf)
+{
+	struct yaffs_dev *dev = yaffs_super_to_dev(sb);
+#else
+static int yaffs_statfs(struct super_block *sb, struct statfs *buf)
+{
+	struct yaffs_dev *dev = yaffs_super_to_dev(sb);
+#endif
+
+	yaffs_trace(YAFFS_TRACE_OS, "yaffs_statfs");
+
+	yaffs_gross_lock(dev);
+
+	buf->f_type = YAFFS_MAGIC;
+	buf->f_bsize = sb->s_blocksize;
+	buf->f_namelen = 255;
+
+	if (dev->data_bytes_per_chunk & (dev->data_bytes_per_chunk - 1)) {
+		/* Do this if chunk size is not a power of 2 */
+
+		uint64_t bytes_in_dev;
+		uint64_t bytes_free;
+
+		bytes_in_dev =
+		    ((uint64_t)
+		     ((dev->param.end_block - dev->param.start_block +
+		       1))) * ((uint64_t) (dev->param.chunks_per_block *
+					   dev->data_bytes_per_chunk));
+
+		do_div(bytes_in_dev, sb->s_blocksize);	/* bytes_in_dev becomes the number of blocks */
+		buf->f_blocks = bytes_in_dev;
+
+		bytes_free = ((uint64_t) (yaffs_get_n_free_chunks(dev))) *
+		    ((uint64_t) (dev->data_bytes_per_chunk));
+
+		do_div(bytes_free, sb->s_blocksize);
+
+		buf->f_bfree = bytes_free;
+
+	} else if (sb->s_blocksize > dev->data_bytes_per_chunk) {
+
+		buf->f_blocks =
+		    (dev->param.end_block - dev->param.start_block + 1) *
+		    dev->param.chunks_per_block /
+		    (sb->s_blocksize / dev->data_bytes_per_chunk);
+		buf->f_bfree =
+		    yaffs_get_n_free_chunks(dev) /
+		    (sb->s_blocksize / dev->data_bytes_per_chunk);
+	} else {
+		buf->f_blocks =
+		    (dev->param.end_block - dev->param.start_block + 1) *
+		    dev->param.chunks_per_block *
+		    (dev->data_bytes_per_chunk / sb->s_blocksize);
+
+		buf->f_bfree =
+		    yaffs_get_n_free_chunks(dev) *
+		    (dev->data_bytes_per_chunk / sb->s_blocksize);
+	}
+
+	buf->f_files = 0;
+	buf->f_ffree = 0;
+	buf->f_bavail = buf->f_bfree;
+
+	yaffs_gross_unlock(dev);
+	return 0;
+}
+
+static void yaffs_flush_inodes(struct super_block *sb)
+{
+	struct inode *iptr;
+	struct yaffs_obj *obj;
+
+	list_for_each_entry(iptr, &sb->s_inodes, i_sb_list) {
+		obj = yaffs_inode_to_obj(iptr);
+		if (obj) {
+			yaffs_trace(YAFFS_TRACE_OS,
+				"flushing obj %d",
+				obj->obj_id);
+			yaffs_flush_file(obj, 1, 0);
+		}
+	}
+}
+
+static void yaffs_flush_super(struct super_block *sb, int do_checkpoint)
+{
+	struct yaffs_dev *dev = yaffs_super_to_dev(sb);
+	if (!dev)
+		return;
+
+	yaffs_flush_inodes(sb);
+	yaffs_update_dirty_dirs(dev);
+	yaffs_flush_whole_cache(dev);
+	if (do_checkpoint)
+		yaffs_checkpoint_save(dev);
+}
+
+static unsigned yaffs_bg_gc_urgency(struct yaffs_dev *dev)
+{
+	unsigned erased_chunks =
+	    dev->n_erased_blocks * dev->param.chunks_per_block;
+	struct yaffs_linux_context *context = yaffs_dev_to_lc(dev);
+	unsigned scattered = 0;	/* Free chunks not in an erased block */
+
+	if (erased_chunks < dev->n_free_chunks)
+		scattered = (dev->n_free_chunks - erased_chunks);
+
+	if (!context->bg_running)
+		return 0;
+	else if (scattered < (dev->param.chunks_per_block * 2))
+		return 0;
+	else if (erased_chunks > dev->n_free_chunks / 2)
+		return 0;
+	else if (erased_chunks > dev->n_free_chunks / 4)
+		return 1;
+	else
+		return 2;
+}
+
+static int yaffs_do_sync_fs(struct super_block *sb, int request_checkpoint)
+{
+
+	struct yaffs_dev *dev = yaffs_super_to_dev(sb);
+	unsigned int oneshot_checkpoint = (yaffs_auto_checkpoint & 4);
+	unsigned gc_urgent = yaffs_bg_gc_urgency(dev);
+	int do_checkpoint;
+
+	yaffs_trace(YAFFS_TRACE_OS | YAFFS_TRACE_SYNC | YAFFS_TRACE_BACKGROUND,
+		"yaffs_do_sync_fs: gc-urgency %d %s %s%s",
+		gc_urgent,
+		sb->s_dirt ? "dirty" : "clean",
+		request_checkpoint ? "checkpoint requested" : "no checkpoint",
+		oneshot_checkpoint ? " one-shot" : "");
+
+	yaffs_gross_lock(dev);
+	do_checkpoint = ((request_checkpoint && !gc_urgent) ||
+			 oneshot_checkpoint) && !dev->is_checkpointed;
+
+	if (sb->s_dirt || do_checkpoint) {
+		yaffs_flush_super(sb, !dev->is_checkpointed && do_checkpoint);
+		sb->s_dirt = 0;
+		if (oneshot_checkpoint)
+			yaffs_auto_checkpoint &= ~4;
+	}
+	yaffs_gross_unlock(dev);
+
+	return 0;
+}
+
+/*
+ * yaffs background thread functions .
+ * yaffs_bg_thread_fn() the thread function
+ * yaffs_bg_start() launches the background thread.
+ * yaffs_bg_stop() cleans up the background thread.
+ *
+ * NB:
+ * The thread should only run after the yaffs is initialised
+ * The thread should be stopped before yaffs is unmounted.
+ * The thread should not do any writing while the fs is in read only.
+ */
+
+#ifdef YAFFS_COMPILE_BACKGROUND
+
+void yaffs_background_waker(unsigned long data)
+{
+	wake_up_process((struct task_struct *)data);
+}
+
+static int yaffs_bg_thread_fn(void *data)
+{
+	struct yaffs_dev *dev = (struct yaffs_dev *)data;
+	struct yaffs_linux_context *context = yaffs_dev_to_lc(dev);
+	unsigned long now = jiffies;
+	unsigned long next_dir_update = now;
+	unsigned long next_gc = now;
+	unsigned long expires;
+	unsigned int urgency;
+
+	int gc_result;
+	struct timer_list timer;
+
+	yaffs_trace(YAFFS_TRACE_BACKGROUND,
+		"yaffs_background starting for dev %p", (void *)dev);
+
+#ifdef YAFFS_COMPILE_FREEZER
+	set_freezable();
+#endif
+	while (context->bg_running) {
+		yaffs_trace(YAFFS_TRACE_BACKGROUND, "yaffs_background");
+
+		if (kthread_should_stop())
+			break;
+
+#ifdef YAFFS_COMPILE_FREEZER
+		if (try_to_freeze())
+			continue;
+#endif
+		yaffs_gross_lock(dev);
+
+		now = jiffies;
+
+		if (time_after(now, next_dir_update) && yaffs_bg_enable) {
+			yaffs_update_dirty_dirs(dev);
+			next_dir_update = now + HZ;
+		}
+
+		if (time_after(now, next_gc) && yaffs_bg_enable) {
+			if (!dev->is_checkpointed) {
+				urgency = yaffs_bg_gc_urgency(dev);
+				gc_result = yaffs_bg_gc(dev, urgency);
+				if (urgency > 1)
+					next_gc = now + HZ / 20 + 1;
+				else if (urgency > 0)
+					next_gc = now + HZ / 10 + 1;
+				else
+					next_gc = now + HZ * 2;
+			} else	{
+			        /*
+				 * gc not running so set to next_dir_update
+				 * to cut down on wake ups
+				 */
+				next_gc = next_dir_update;
+                        }
+		}
+		yaffs_gross_unlock(dev);
+#if 1
+		expires = next_dir_update;
+		if (time_before(next_gc, expires))
+			expires = next_gc;
+		if (time_before(expires, now))
+			expires = now + HZ;
+
+		Y_INIT_TIMER(&timer);
+		timer.expires = expires + 1;
+		timer.data = (unsigned long)current;
+		timer.function = yaffs_background_waker;
+
+		set_current_state(TASK_INTERRUPTIBLE);
+		add_timer(&timer);
+		schedule();
+		del_timer_sync(&timer);
+#else
+		msleep(10);
+#endif
+	}
+
+	return 0;
+}
+
+static int yaffs_bg_start(struct yaffs_dev *dev)
+{
+	int retval = 0;
+	struct yaffs_linux_context *context = yaffs_dev_to_lc(dev);
+
+	if (dev->read_only)
+		return -1;
+
+	context->bg_running = 1;
+
+	context->bg_thread = kthread_run(yaffs_bg_thread_fn,
+					 (void *)dev, "yaffs-bg-%d",
+					 context->mount_id);
+
+	if (IS_ERR(context->bg_thread)) {
+		retval = PTR_ERR(context->bg_thread);
+		context->bg_thread = NULL;
+		context->bg_running = 0;
+	}
+	return retval;
+}
+
+static void yaffs_bg_stop(struct yaffs_dev *dev)
+{
+	struct yaffs_linux_context *ctxt = yaffs_dev_to_lc(dev);
+
+	ctxt->bg_running = 0;
+
+	if (ctxt->bg_thread) {
+		kthread_stop(ctxt->bg_thread);
+		ctxt->bg_thread = NULL;
+	}
+}
+#else
+static int yaffs_bg_thread_fn(void *data)
+{
+	return 0;
+}
+
+static int yaffs_bg_start(struct yaffs_dev *dev)
+{
+	return 0;
+}
+
+static void yaffs_bg_stop(struct yaffs_dev *dev)
+{
+}
+#endif
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 17))
+static void yaffs_write_super(struct super_block *sb)
+#else
+static int yaffs_write_super(struct super_block *sb)
+#endif
+{
+	unsigned request_checkpoint = (yaffs_auto_checkpoint >= 2);
+
+	yaffs_trace(YAFFS_TRACE_OS | YAFFS_TRACE_SYNC | YAFFS_TRACE_BACKGROUND,
+		"yaffs_write_super %s",
+		request_checkpoint ? " checkpt" : "");
+
+	yaffs_do_sync_fs(sb, request_checkpoint);
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18))
+	return 0;
+#endif
+}
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 17))
+static int yaffs_sync_fs(struct super_block *sb, int wait)
+#else
+static int yaffs_sync_fs(struct super_block *sb)
+#endif
+{
+	unsigned request_checkpoint = (yaffs_auto_checkpoint >= 1);
+
+	yaffs_trace(YAFFS_TRACE_OS | YAFFS_TRACE_SYNC,
+		"yaffs_sync_fs%s", request_checkpoint ? " checkpt" : "");
+
+	yaffs_do_sync_fs(sb, request_checkpoint);
+
+	return 0;
+}
+
+#ifdef YAFFS_USE_OWN_IGET
+
+static struct inode *yaffs_iget(struct super_block *sb, unsigned long ino)
+{
+	struct inode *inode;
+	struct yaffs_obj *obj;
+	struct yaffs_dev *dev = yaffs_super_to_dev(sb);
+
+	yaffs_trace(YAFFS_TRACE_OS, "yaffs_iget for %lu", ino);
+
+	inode = iget_locked(sb, ino);
+	if (!inode)
+		return ERR_PTR(-ENOMEM);
+	if (!(inode->i_state & I_NEW))
+		return inode;
+
+	/* NB This is called as a side effect of other functions, but
+	 * we had to release the lock to prevent deadlocks, so
+	 * need to lock again.
+	 */
+
+	yaffs_gross_lock(dev);
+
+	obj = yaffs_find_by_number(dev, inode->i_ino);
+
+	yaffs_fill_inode_from_obj(inode, obj);
+
+	yaffs_gross_unlock(dev);
+
+	unlock_new_inode(inode);
+	return inode;
+}
+
+#else
+
+static void yaffs_read_inode(struct inode *inode)
+{
+	/* NB This is called as a side effect of other functions, but
+	 * we had to release the lock to prevent deadlocks, so
+	 * need to lock again.
+	 */
+
+	struct yaffs_obj *obj;
+	struct yaffs_dev *dev = yaffs_super_to_dev(inode->i_sb);
+
+	yaffs_trace(YAFFS_TRACE_OS,
+		"yaffs_read_inode for %d", (int)inode->i_ino);
+
+	if (current != yaffs_dev_to_lc(dev)->readdir_process)
+		yaffs_gross_lock(dev);
+
+	obj = yaffs_find_by_number(dev, inode->i_ino);
+
+	yaffs_fill_inode_from_obj(inode, obj);
+
+	if (current != yaffs_dev_to_lc(dev)->readdir_process)
+		yaffs_gross_unlock(dev);
+}
+
+#endif
+
+static LIST_HEAD(yaffs_context_list);
+struct mutex yaffs_context_lock;
+
+static void yaffs_put_super(struct super_block *sb)
+{
+	struct yaffs_dev *dev = yaffs_super_to_dev(sb);
+
+	yaffs_trace(YAFFS_TRACE_OS, "yaffs_put_super");
+
+	yaffs_trace(YAFFS_TRACE_OS | YAFFS_TRACE_BACKGROUND,
+		"Shutting down yaffs background thread");
+	yaffs_bg_stop(dev);
+	yaffs_trace(YAFFS_TRACE_OS | YAFFS_TRACE_BACKGROUND,
+		"yaffs background thread shut down");
+
+	yaffs_gross_lock(dev);
+
+	yaffs_flush_super(sb, 1);
+
+	if (yaffs_dev_to_lc(dev)->put_super_fn)
+		yaffs_dev_to_lc(dev)->put_super_fn(sb);
+
+	yaffs_deinitialise(dev);
+
+	yaffs_gross_unlock(dev);
+
+	mutex_lock(&yaffs_context_lock);
+	list_del_init(&(yaffs_dev_to_lc(dev)->context_list));
+	mutex_unlock(&yaffs_context_lock);
+
+	if (yaffs_dev_to_lc(dev)->spare_buffer) {
+		kfree(yaffs_dev_to_lc(dev)->spare_buffer);
+		yaffs_dev_to_lc(dev)->spare_buffer = NULL;
+	}
+
+	kfree(dev);
+}
+
+static void yaffs_mtd_put_super(struct super_block *sb)
+{
+	struct mtd_info *mtd = yaffs_dev_to_mtd(yaffs_super_to_dev(sb));
+
+	if (mtd->sync)
+		mtd->sync(mtd);
+
+	put_mtd_device(mtd);
+}
+
+static void yaffs_touch_super(struct yaffs_dev *dev)
+{
+	struct super_block *sb = yaffs_dev_to_lc(dev)->super;
+
+	yaffs_trace(YAFFS_TRACE_OS, "yaffs_touch_super() sb = %p", sb);
+	if (sb)
+		sb->s_dirt = 1;
+}
+
+struct yaffs_options {
+	int inband_tags;
+	int skip_checkpoint_read;
+	int skip_checkpoint_write;
+	int no_cache;
+	int tags_ecc_on;
+	int tags_ecc_overridden;
+	int lazy_loading_enabled;
+	int lazy_loading_overridden;
+	int empty_lost_and_found;
+	int empty_lost_and_found_overridden;
+	int disable_summary;
+};
+
+#define MAX_OPT_LEN 30
+static int yaffs_parse_options(struct yaffs_options *options,
+			       const char *options_str)
+{
+	char cur_opt[MAX_OPT_LEN + 1];
+	int p;
+	int error = 0;
+
+	/* Parse through the options which is a comma seperated list */
+
+	while (options_str && *options_str && !error) {
+		memset(cur_opt, 0, MAX_OPT_LEN + 1);
+		p = 0;
+
+		while (*options_str == ',')
+			options_str++;
+
+		while (*options_str && *options_str != ',') {
+			if (p < MAX_OPT_LEN) {
+				cur_opt[p] = *options_str;
+				p++;
+			}
+			options_str++;
+		}
+
+		if (!strcmp(cur_opt, "inband-tags")) {
+			options->inband_tags = 1;
+		} else if (!strcmp(cur_opt, "tags-ecc-off")) {
+			options->tags_ecc_on = 0;
+			options->tags_ecc_overridden = 1;
+		} else if (!strcmp(cur_opt, "tags-ecc-on")) {
+			options->tags_ecc_on = 1;
+			options->tags_ecc_overridden = 1;
+		} else if (!strcmp(cur_opt, "lazy-loading-off")) {
+			options->lazy_loading_enabled = 0;
+			options->lazy_loading_overridden = 1;
+		} else if (!strcmp(cur_opt, "lazy-loading-on")) {
+			options->lazy_loading_enabled = 1;
+			options->lazy_loading_overridden = 1;
+		} else if (!strcmp(cur_opt, "disable-summary")) {
+			options->disable_summary = 1;
+		} else if (!strcmp(cur_opt, "empty-lost-and-found-off")) {
+			options->empty_lost_and_found = 0;
+			options->empty_lost_and_found_overridden = 1;
+		} else if (!strcmp(cur_opt, "empty-lost-and-found-on")) {
+			options->empty_lost_and_found = 1;
+			options->empty_lost_and_found_overridden = 1;
+		} else if (!strcmp(cur_opt, "no-cache")) {
+			options->no_cache = 1;
+		} else if (!strcmp(cur_opt, "no-checkpoint-read")) {
+			options->skip_checkpoint_read = 1;
+		} else if (!strcmp(cur_opt, "no-checkpoint-write")) {
+			options->skip_checkpoint_write = 1;
+		} else if (!strcmp(cur_opt, "no-checkpoint")) {
+			options->skip_checkpoint_read = 1;
+			options->skip_checkpoint_write = 1;
+		} else {
+			printk(KERN_INFO "yaffs: Bad mount option \"%s\"\n",
+			       cur_opt);
+			error = 1;
+		}
+	}
+
+	return error;
+}
+
+static struct super_block *yaffs_internal_read_super(int yaffs_version,
+						     struct super_block *sb,
+						     void *data, int silent)
+{
+	int n_blocks;
+	struct inode *inode = NULL;
+	struct dentry *root;
+	struct yaffs_dev *dev = 0;
+	char devname_buf[BDEVNAME_SIZE + 1];
+	struct mtd_info *mtd;
+	int err;
+	char *data_str = (char *)data;
+	struct yaffs_linux_context *context = NULL;
+	struct yaffs_param *param;
+
+	int read_only = 0;
+
+	struct yaffs_options options;
+
+	unsigned mount_id;
+	int found;
+	struct yaffs_linux_context *context_iterator;
+	struct list_head *l;
+
+	if (!sb) {
+		printk(KERN_INFO "yaffs: sb is NULL\n");
+		return NULL;
+        }
+
+	sb->s_magic = YAFFS_MAGIC;
+	sb->s_op = &yaffs_super_ops;
+	sb->s_flags |= MS_NOATIME;
+
+	read_only = ((sb->s_flags & MS_RDONLY) != 0);
+
+#ifdef YAFFS_COMPILE_EXPORTFS
+	sb->s_export_op = &yaffs_export_ops;
+#endif
+
+	if (!sb->s_dev)
+		printk(KERN_INFO "yaffs: sb->s_dev is NULL\n");
+	else if (!yaffs_devname(sb, devname_buf))
+		printk(KERN_INFO "yaffs: devname is NULL\n");
+	else
+		printk(KERN_INFO "yaffs: dev is %d name is \"%s\" %s\n",
+		       sb->s_dev,
+		       yaffs_devname(sb, devname_buf), read_only ? "ro" : "rw");
+
+	if (!data_str)
+		data_str = "";
+
+	printk(KERN_INFO "yaffs: passed flags \"%s\"\n", data_str);
+
+	memset(&options, 0, sizeof(options));
+
+	if (yaffs_parse_options(&options, data_str)) {
+		/* Option parsing failed */
+		return NULL;
+	}
+
+	sb->s_blocksize = PAGE_CACHE_SIZE;
+	sb->s_blocksize_bits = PAGE_CACHE_SHIFT;
+
+	yaffs_trace(YAFFS_TRACE_OS,
+		"yaffs_read_super: Using yaffs%d", yaffs_version);
+	yaffs_trace(YAFFS_TRACE_OS,
+		"yaffs_read_super: block size %d", (int)(sb->s_blocksize));
+
+	yaffs_trace(YAFFS_TRACE_ALWAYS,
+		"yaffs: Attempting MTD mount of %u.%u,\"%s\"",
+		MAJOR(sb->s_dev), MINOR(sb->s_dev),
+		yaffs_devname(sb, devname_buf));
+
+	/* Check it's an mtd device..... */
+	if (MAJOR(sb->s_dev) != MTD_BLOCK_MAJOR)
+		return NULL;	/* This isn't an mtd device */
+
+	/* Get the device */
+	mtd = get_mtd_device(NULL, MINOR(sb->s_dev));
+	if (!mtd) {
+		yaffs_trace(YAFFS_TRACE_ALWAYS,
+			"yaffs: MTD device #%u doesn't appear to exist",
+			MINOR(sb->s_dev));
+		return NULL;
+	}
+	/* Check it's NAND */
+	if (mtd->type != MTD_NANDFLASH) {
+		yaffs_trace(YAFFS_TRACE_ALWAYS,
+			"yaffs: MTD device is not NAND it's type %d",
+			mtd->type);
+		return NULL;
+	}
+
+	yaffs_trace(YAFFS_TRACE_OS, " erase %p", mtd->erase);
+	yaffs_trace(YAFFS_TRACE_OS, " read %p", mtd->read);
+	yaffs_trace(YAFFS_TRACE_OS, " write %p", mtd->write);
+	yaffs_trace(YAFFS_TRACE_OS, " readoob %p", mtd->read_oob);
+	yaffs_trace(YAFFS_TRACE_OS, " writeoob %p", mtd->write_oob);
+	yaffs_trace(YAFFS_TRACE_OS, " block_isbad %p", mtd->block_isbad);
+	yaffs_trace(YAFFS_TRACE_OS, " block_markbad %p", mtd->block_markbad);
+	yaffs_trace(YAFFS_TRACE_OS, " %s %d", WRITE_SIZE_STR, WRITE_SIZE(mtd));
+	yaffs_trace(YAFFS_TRACE_OS, " oobsize %d", mtd->oobsize);
+	yaffs_trace(YAFFS_TRACE_OS, " erasesize %d", mtd->erasesize);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 29)
+	yaffs_trace(YAFFS_TRACE_OS, " size %u", mtd->size);
+#else
+	yaffs_trace(YAFFS_TRACE_OS, " size %lld", mtd->size);
+#endif
+
+	if (yaffs_auto_select && yaffs_version == 1 && WRITE_SIZE(mtd) >= 2048) {
+		yaffs_trace(YAFFS_TRACE_ALWAYS, "auto selecting yaffs2");
+		yaffs_version = 2;
+	}
+
+	/* Added NCB 26/5/2006 for completeness */
+	if (yaffs_version == 2 && !options.inband_tags
+	    && WRITE_SIZE(mtd) == 512) {
+		yaffs_trace(YAFFS_TRACE_ALWAYS, "auto selecting yaffs1");
+		yaffs_version = 1;
+	}
+
+	if (yaffs_version == 2) {
+		/* Check for version 2 style functions */
+		if (!mtd->erase ||
+		    !mtd->block_isbad ||
+		    !mtd->block_markbad || !mtd->read || !mtd->write ||
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 17))
+		    !mtd->read_oob || !mtd->write_oob) {
+#else
+		    !mtd->write_ecc ||
+		    !mtd->read_ecc || !mtd->read_oob || !mtd->write_oob) {
+#endif
+			yaffs_trace(YAFFS_TRACE_ALWAYS,
+				"MTD device does not support required functions"
+			);
+			return NULL;
+		}
+
+		if ((WRITE_SIZE(mtd) < YAFFS_MIN_YAFFS2_CHUNK_SIZE ||
+		     mtd->oobsize < YAFFS_MIN_YAFFS2_SPARE_SIZE) &&
+		    !options.inband_tags) {
+			yaffs_trace(YAFFS_TRACE_ALWAYS,
+				"MTD device does not have the right page sizes"
+			);
+			return NULL;
+		}
+	} else {
+		/* Check for V1 style functions */
+		if (!mtd->erase || !mtd->read || !mtd->write ||
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 17))
+		    !mtd->read_oob || !mtd->write_oob) {
+#else
+		    !mtd->write_ecc ||
+		    !mtd->read_ecc || !mtd->read_oob || !mtd->write_oob) {
+#endif
+			yaffs_trace(YAFFS_TRACE_ALWAYS,
+				"MTD device does not support required functions"
+			);
+			return NULL;
+		}
+
+		if (WRITE_SIZE(mtd) < YAFFS_BYTES_PER_CHUNK ||
+		    mtd->oobsize != YAFFS_BYTES_PER_SPARE) {
+			yaffs_trace(YAFFS_TRACE_ALWAYS,
+				"MTD device does not support have the right page sizes"
+			);
+			return NULL;
+		}
+	}
+
+	/* OK, so if we got here, we have an MTD that's NAND and looks
+	 * like it has the right capabilities
+	 * Set the struct yaffs_dev up for mtd
+	 */
+
+	if (!read_only && !(mtd->flags & MTD_WRITEABLE)) {
+		read_only = 1;
+		printk(KERN_INFO
+		       "yaffs: mtd is read only, setting superblock read only\n"
+		);
+		sb->s_flags |= MS_RDONLY;
+	}
+
+	dev = kmalloc(sizeof(struct yaffs_dev), GFP_KERNEL);
+	context = kmalloc(sizeof(struct yaffs_linux_context), GFP_KERNEL);
+
+	if (!dev || !context) {
+		if (dev)
+			kfree(dev);
+		if (context)
+			kfree(context);
+		dev = NULL;
+		context = NULL;
+	}
+
+	if (!dev) {
+		/* Deep shit could not allocate device structure */
+		yaffs_trace(YAFFS_TRACE_ALWAYS,
+			"yaffs_read_super: Failed trying to allocate struct yaffs_dev."
+		);
+		return NULL;
+	}
+	memset(dev, 0, sizeof(struct yaffs_dev));
+	param = &(dev->param);
+
+	memset(context, 0, sizeof(struct yaffs_linux_context));
+	dev->os_context = context;
+	INIT_LIST_HEAD(&(context->context_list));
+	context->dev = dev;
+	context->super = sb;
+
+	dev->read_only = read_only;
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0))
+	sb->s_fs_info = dev;
+#else
+	sb->u.generic_sbp = dev;
+#endif
+
+	dev->driver_context = mtd;
+	param->name = mtd->name;
+
+	/* Set up the memory size parameters.... */
+
+	n_blocks =
+	    YCALCBLOCKS(mtd->size,
+			(YAFFS_CHUNKS_PER_BLOCK * YAFFS_BYTES_PER_CHUNK));
+
+	param->start_block = 0;
+	param->end_block = n_blocks - 1;
+	param->chunks_per_block = YAFFS_CHUNKS_PER_BLOCK;
+	param->total_bytes_per_chunk = YAFFS_BYTES_PER_CHUNK;
+	param->n_reserved_blocks = 5;
+	param->n_caches = (options.no_cache) ? 0 : 10;
+	param->inband_tags = options.inband_tags;
+
+	param->enable_xattr = 1;
+	if (options.lazy_loading_overridden)
+		param->disable_lazy_load = !options.lazy_loading_enabled;
+
+	param->defered_dir_update = 1;
+
+	if (options.tags_ecc_overridden)
+		param->no_tags_ecc = !options.tags_ecc_on;
+
+	param->empty_lost_n_found = 1;
+	param->refresh_period = 500;
+	param->disable_summary = options.disable_summary;
+
+	if (options.empty_lost_and_found_overridden)
+		param->empty_lost_n_found = options.empty_lost_and_found;
+
+	/* ... and the functions. */
+	if (yaffs_version == 2) {
+		param->write_chunk_tags_fn = nandmtd2_write_chunk_tags;
+		param->read_chunk_tags_fn = nandmtd2_read_chunk_tags;
+		param->bad_block_fn = nandmtd2_mark_block_bad;
+		param->query_block_fn = nandmtd2_query_block;
+		yaffs_dev_to_lc(dev)->spare_buffer =
+				kmalloc(mtd->oobsize, GFP_NOFS);
+		param->is_yaffs2 = 1;
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 17))
+		param->total_bytes_per_chunk = mtd->writesize;
+		param->chunks_per_block = mtd->erasesize / mtd->writesize;
+#else
+		param->total_bytes_per_chunk = mtd->oobblock;
+		param->chunks_per_block = mtd->erasesize / mtd->oobblock;
+#endif
+		n_blocks = YCALCBLOCKS(mtd->size, mtd->erasesize);
+
+		param->start_block = 0;
+		param->end_block = n_blocks - 1;
+	} else {
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 17))
+		/* use the MTD interface in yaffs_mtdif1.c */
+		param->write_chunk_tags_fn = nandmtd1_write_chunk_tags;
+		param->read_chunk_tags_fn = nandmtd1_read_chunk_tags;
+		param->bad_block_fn = nandmtd1_mark_block_bad;
+		param->query_block_fn = nandmtd1_query_block;
+#else
+		param->write_chunk_fn = nandmtd_write_chunk;
+		param->read_chunk_fn = nandmtd_read_chunk;
+#endif
+		param->is_yaffs2 = 0;
+	}
+	/* ... and common functions */
+	param->erase_fn = nandmtd_erase_block;
+	param->initialise_flash_fn = nandmtd_initialise;
+
+	yaffs_dev_to_lc(dev)->put_super_fn = yaffs_mtd_put_super;
+
+	param->sb_dirty_fn = yaffs_touch_super;
+	param->gc_control = yaffs_gc_control_callback;
+
+	yaffs_dev_to_lc(dev)->super = sb;
+
+	param->use_nand_ecc = 1;
+
+	param->skip_checkpt_rd = options.skip_checkpoint_read;
+	param->skip_checkpt_wr = options.skip_checkpoint_write;
+
+	mutex_lock(&yaffs_context_lock);
+	/* Get a mount id */
+	found = 0;
+	for (mount_id = 0; !found; mount_id++) {
+		found = 1;
+		list_for_each(l, &yaffs_context_list) {
+			context_iterator =
+			    list_entry(l, struct yaffs_linux_context,
+				       context_list);
+			if (context_iterator->mount_id == mount_id)
+				found = 0;
+		}
+	}
+	context->mount_id = mount_id;
+
+	list_add_tail(&(yaffs_dev_to_lc(dev)->context_list),
+		      &yaffs_context_list);
+	mutex_unlock(&yaffs_context_lock);
+
+	/* Directory search handling... */
+	INIT_LIST_HEAD(&(yaffs_dev_to_lc(dev)->search_contexts));
+	param->remove_obj_fn = yaffs_remove_obj_callback;
+
+	mutex_init(&(yaffs_dev_to_lc(dev)->gross_lock));
+
+	yaffs_gross_lock(dev);
+
+	err = yaffs_guts_initialise(dev);
+
+	yaffs_trace(YAFFS_TRACE_OS,
+		"yaffs_read_super: guts initialised %s",
+		(err == YAFFS_OK) ? "OK" : "FAILED");
+
+	if (err == YAFFS_OK)
+		yaffs_bg_start(dev);
+
+	if (!context->bg_thread)
+		param->defered_dir_update = 0;
+
+	/* Release lock before yaffs_get_inode() */
+	yaffs_gross_unlock(dev);
+
+	/* Create root inode */
+	if (err == YAFFS_OK)
+		inode = yaffs_get_inode(sb, S_IFDIR | 0755, 0, yaffs_root(dev));
+
+	if (!inode)
+		return NULL;
+
+	inode->i_op = &yaffs_dir_inode_operations;
+	inode->i_fop = &yaffs_dir_operations;
+
+	yaffs_trace(YAFFS_TRACE_OS, "yaffs_read_super: got root inode");
+
+	root = d_alloc_root(inode);
+
+	yaffs_trace(YAFFS_TRACE_OS, "yaffs_read_super: d_alloc_root done");
+
+	if (!root) {
+		iput(inode);
+		return NULL;
+	}
+	sb->s_root = root;
+	sb->s_dirt = !dev->is_checkpointed;
+	yaffs_trace(YAFFS_TRACE_ALWAYS,
+		"yaffs_read_super: is_checkpointed %d",
+		dev->is_checkpointed);
+
+	yaffs_trace(YAFFS_TRACE_OS, "yaffs_read_super: done");
+	return sb;
+}
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0))
+static int yaffs_internal_read_super_mtd(struct super_block *sb, void *data,
+					 int silent)
+{
+	return yaffs_internal_read_super(1, sb, data, silent) ? 0 : -EINVAL;
+}
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39))
+static struct dentry *yaffs_mount(struct file_system_type *fs_type, int flags,
+        const char *dev_name, void *data)
+{
+    return mount_bdev(fs_type, flags, dev_name, data, yaffs_internal_read_super_mtd);
+}
+#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 17))
+static int yaffs_read_super(struct file_system_type *fs,
+			    int flags, const char *dev_name,
+			    void *data, struct vfsmount *mnt)
+{
+
+	return get_sb_bdev(fs, flags, dev_name, data,
+			   yaffs_internal_read_super_mtd, mnt);
+}
+#else
+static struct super_block *yaffs_read_super(struct file_system_type *fs,
+					    int flags, const char *dev_name,
+					    void *data)
+{
+
+	return get_sb_bdev(fs, flags, dev_name, data,
+			   yaffs_internal_read_super_mtd);
+}
+#endif
+
+static struct file_system_type yaffs_fs_type = {
+	.owner = THIS_MODULE,
+	.name = "yaffs",
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39))
+        .mount = yaffs_mount,
+#else
+        .get_sb = yaffs_read_super,
+#endif
+     	.kill_sb = kill_block_super,
+	.fs_flags = FS_REQUIRES_DEV,
+};
+#else
+static struct super_block *yaffs_read_super(struct super_block *sb, void *data,
+					    int silent)
+{
+	return yaffs_internal_read_super(1, sb, data, silent);
+}
+
+static DECLARE_FSTYPE(yaffs_fs_type, "yaffs", yaffs_read_super,
+		      FS_REQUIRES_DEV);
+#endif
+
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0))
+static int yaffs2_internal_read_super_mtd(struct super_block *sb, void *data,
+					  int silent)
+{
+	return yaffs_internal_read_super(2, sb, data, silent) ? 0 : -EINVAL;
+}
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39))
+static struct dentry *yaffs2_mount(struct file_system_type *fs_type, int flags,
+        const char *dev_name, void *data)
+{
+        return mount_bdev(fs_type, flags, dev_name, data, yaffs2_internal_read_super_mtd);
+}
+#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 17))
+static int yaffs2_read_super(struct file_system_type *fs,
+			     int flags, const char *dev_name, void *data,
+			     struct vfsmount *mnt)
+{
+	return get_sb_bdev(fs, flags, dev_name, data,
+			   yaffs2_internal_read_super_mtd, mnt);
+}
+#else
+static struct super_block *yaffs2_read_super(struct file_system_type *fs,
+					     int flags, const char *dev_name,
+					     void *data)
+{
+
+	return get_sb_bdev(fs, flags, dev_name, data,
+			   yaffs2_internal_read_super_mtd);
+}
+#endif
+
+static struct file_system_type yaffs2_fs_type = {
+	.owner = THIS_MODULE,
+	.name = "yaffs2",
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39))
+        .mount = yaffs2_mount,
+#else
+        .get_sb = yaffs2_read_super,
+#endif
+     	.kill_sb = kill_block_super,
+	.fs_flags = FS_REQUIRES_DEV,
+};
+#else
+static struct super_block *yaffs2_read_super(struct super_block *sb,
+					     void *data, int silent)
+{
+	return yaffs_internal_read_super(2, sb, data, silent);
+}
+
+static DECLARE_FSTYPE(yaffs2_fs_type, "yaffs2", yaffs2_read_super,
+		      FS_REQUIRES_DEV);
+#endif
+
+
+static struct proc_dir_entry *my_proc_entry;
+
+static char *yaffs_dump_dev_part0(char *buf, struct yaffs_dev *dev)
+{
+	struct yaffs_param *param = &dev->param;
+
+	buf += sprintf(buf, "start_block.......... %d\n", param->start_block);
+	buf += sprintf(buf, "end_block............ %d\n", param->end_block);
+	buf += sprintf(buf, "total_bytes_per_chunk %d\n",
+				param->total_bytes_per_chunk);
+	buf += sprintf(buf, "use_nand_ecc......... %d\n", param->use_nand_ecc);
+	buf += sprintf(buf, "no_tags_ecc.......... %d\n", param->no_tags_ecc);
+	buf += sprintf(buf, "is_yaffs2............ %d\n", param->is_yaffs2);
+	buf += sprintf(buf, "inband_tags.......... %d\n", param->inband_tags);
+	buf += sprintf(buf, "empty_lost_n_found... %d\n",
+				param->empty_lost_n_found);
+	buf += sprintf(buf, "disable_lazy_load.... %d\n",
+				param->disable_lazy_load);
+	buf += sprintf(buf, "refresh_period....... %d\n",
+				param->refresh_period);
+	buf += sprintf(buf, "n_caches............. %d\n", param->n_caches);
+	buf += sprintf(buf, "n_reserved_blocks.... %d\n",
+				param->n_reserved_blocks);
+	buf += sprintf(buf, "always_check_erased.. %d\n",
+				param->always_check_erased);
+	buf += sprintf(buf, "\n");
+
+	return buf;
+}
+
+static char *yaffs_dump_dev_part1(char *buf, struct yaffs_dev *dev)
+{
+	buf += sprintf(buf, "data_bytes_per_chunk. %d\n",
+				dev->data_bytes_per_chunk);
+	buf += sprintf(buf, "chunk_grp_bits....... %d\n", dev->chunk_grp_bits);
+	buf += sprintf(buf, "chunk_grp_size....... %d\n", dev->chunk_grp_size);
+	buf += sprintf(buf, "n_erased_blocks...... %d\n", dev->n_erased_blocks);
+	buf += sprintf(buf, "blocks_in_checkpt.... %d\n",
+				dev->blocks_in_checkpt);
+	buf += sprintf(buf, "\n");
+	buf += sprintf(buf, "n_tnodes............. %d\n", dev->n_tnodes);
+	buf += sprintf(buf, "n_obj................ %d\n", dev->n_obj);
+	buf += sprintf(buf, "n_free_chunks........ %d\n", dev->n_free_chunks);
+	buf += sprintf(buf, "\n");
+	buf += sprintf(buf, "n_page_writes........ %u\n", dev->n_page_writes);
+	buf += sprintf(buf, "n_page_reads......... %u\n", dev->n_page_reads);
+	buf += sprintf(buf, "n_erasures........... %u\n", dev->n_erasures);
+	buf += sprintf(buf, "n_gc_copies.......... %u\n", dev->n_gc_copies);
+	buf += sprintf(buf, "all_gcs.............. %u\n", dev->all_gcs);
+	buf += sprintf(buf, "passive_gc_count..... %u\n",
+				dev->passive_gc_count);
+	buf += sprintf(buf, "oldest_dirty_gc_count %u\n",
+				dev->oldest_dirty_gc_count);
+	buf += sprintf(buf, "n_gc_blocks.......... %u\n", dev->n_gc_blocks);
+	buf += sprintf(buf, "bg_gcs............... %u\n", dev->bg_gcs);
+	buf += sprintf(buf, "n_retried_writes..... %u\n",
+				dev->n_retried_writes);
+	buf += sprintf(buf, "n_retired_blocks..... %u\n",
+				dev->n_retired_blocks);
+	buf += sprintf(buf, "n_ecc_fixed.......... %u\n", dev->n_ecc_fixed);
+	buf += sprintf(buf, "n_ecc_unfixed........ %u\n", dev->n_ecc_unfixed);
+	buf += sprintf(buf, "n_tags_ecc_fixed..... %u\n",
+				dev->n_tags_ecc_fixed);
+	buf += sprintf(buf, "n_tags_ecc_unfixed... %u\n",
+				dev->n_tags_ecc_unfixed);
+	buf += sprintf(buf, "cache_hits........... %u\n", dev->cache_hits);
+	buf += sprintf(buf, "n_deleted_files...... %u\n", dev->n_deleted_files);
+	buf += sprintf(buf, "n_unlinked_files..... %u\n",
+				dev->n_unlinked_files);
+	buf += sprintf(buf, "refresh_count........ %u\n", dev->refresh_count);
+	buf += sprintf(buf, "n_bg_deletions....... %u\n", dev->n_bg_deletions);
+	buf += sprintf(buf, "tags_used............ %u\n", dev->tags_used);
+	buf += sprintf(buf, "summary_used......... %u\n", dev->summary_used);
+
+	return buf;
+}
+
+static int yaffs_proc_read(char *page,
+			   char **start,
+			   off_t offset, int count, int *eof, void *data)
+{
+	struct list_head *item;
+	char *buf = page;
+	int step = offset;
+	int n = 0;
+
+	/* Get proc_file_read() to step 'offset' by one on each sucessive call.
+	 * We use 'offset' (*ppos) to indicate where we are in dev_list.
+	 * This also assumes the user has posted a read buffer large
+	 * enough to hold the complete output; but that's life in /proc.
+	 */
+
+	*(int *)start = 1;
+
+	/* Print header first */
+	if (step == 0)
+		buf +=
+		    sprintf(buf,
+			    "Multi-version YAFFS built:" __DATE__ " " __TIME__
+			    "\n");
+	else if (step == 1)
+		buf += sprintf(buf, "\n");
+	else {
+		step -= 2;
+
+		mutex_lock(&yaffs_context_lock);
+
+		/* Locate and print the Nth entry.  Order N-squared but N is small. */
+		list_for_each(item, &yaffs_context_list) {
+			struct yaffs_linux_context *dc =
+			    list_entry(item, struct yaffs_linux_context,
+				       context_list);
+			struct yaffs_dev *dev = dc->dev;
+
+			if (n < (step & ~1)) {
+				n += 2;
+				continue;
+			}
+			if ((step & 1) == 0) {
+				buf +=
+				    sprintf(buf, "\nDevice %d \"%s\"\n", n,
+					    dev->param.name);
+				buf = yaffs_dump_dev_part0(buf, dev);
+			} else {
+				buf = yaffs_dump_dev_part1(buf, dev);
+                        }
+
+			break;
+		}
+		mutex_unlock(&yaffs_context_lock);
+	}
+
+	return buf - page < count ? buf - page : count;
+}
+
+/**
+ * Set the verbosity of the warnings and error messages.
+ *
+ * Note that the names can only be a..z or _ with the current code.
+ */
+
+static struct {
+	char *mask_name;
+	unsigned mask_bitfield;
+} mask_flags[] = {
+	{"allocate", YAFFS_TRACE_ALLOCATE},
+	{"always", YAFFS_TRACE_ALWAYS},
+	{"background", YAFFS_TRACE_BACKGROUND},
+	{"bad_blocks", YAFFS_TRACE_BAD_BLOCKS},
+	{"buffers", YAFFS_TRACE_BUFFERS},
+	{"bug", YAFFS_TRACE_BUG},
+	{"checkpt", YAFFS_TRACE_CHECKPOINT},
+	{"deletion", YAFFS_TRACE_DELETION},
+	{"erase", YAFFS_TRACE_ERASE},
+	{"error", YAFFS_TRACE_ERROR},
+	{"gc_detail", YAFFS_TRACE_GC_DETAIL},
+	{"gc", YAFFS_TRACE_GC},
+	{"lock", YAFFS_TRACE_LOCK},
+	{"mtd", YAFFS_TRACE_MTD},
+	{"nandaccess", YAFFS_TRACE_NANDACCESS},
+	{"os", YAFFS_TRACE_OS},
+	{"scan_debug", YAFFS_TRACE_SCAN_DEBUG},
+	{"scan", YAFFS_TRACE_SCAN},
+	{"mount", YAFFS_TRACE_MOUNT},
+	{"tracing", YAFFS_TRACE_TRACING},
+	{"sync", YAFFS_TRACE_SYNC},
+	{"write", YAFFS_TRACE_WRITE},
+	{"verify", YAFFS_TRACE_VERIFY},
+	{"verify_nand", YAFFS_TRACE_VERIFY_NAND},
+	{"verify_full", YAFFS_TRACE_VERIFY_FULL},
+	{"verify_all", YAFFS_TRACE_VERIFY_ALL},
+	{"all", 0xffffffff},
+	{"none", 0},
+	{NULL, 0},
+};
+
+#define MAX_MASK_NAME_LENGTH 40
+static int yaffs_proc_write_trace_options(struct file *file, const char *buf,
+					  unsigned long count, void *data)
+{
+	unsigned rg = 0, mask_bitfield;
+	char *end;
+	char *mask_name;
+	const char *x;
+	char substring[MAX_MASK_NAME_LENGTH + 1];
+	int i;
+	int done = 0;
+	int add, len = 0;
+	int pos = 0;
+
+	rg = yaffs_trace_mask;
+
+	while (!done && (pos < count)) {
+		done = 1;
+		while ((pos < count) && isspace(buf[pos]))
+			pos++;
+
+		switch (buf[pos]) {
+		case '+':
+		case '-':
+		case '=':
+			add = buf[pos];
+			pos++;
+			break;
+
+		default:
+			add = ' ';
+			break;
+		}
+		mask_name = NULL;
+
+		mask_bitfield = simple_strtoul(buf + pos, &end, 0);
+
+		if (end > buf + pos) {
+			mask_name = "numeral";
+			len = end - (buf + pos);
+			pos += len;
+			done = 0;
+		} else {
+			for (x = buf + pos, i = 0;
+			     (*x == '_' || (*x >= 'a' && *x <= 'z')) &&
+			     i < MAX_MASK_NAME_LENGTH; x++, i++, pos++)
+				substring[i] = *x;
+			substring[i] = '\0';
+
+			for (i = 0; mask_flags[i].mask_name != NULL; i++) {
+				if (strcmp(substring, mask_flags[i].mask_name)
+				    == 0) {
+					mask_name = mask_flags[i].mask_name;
+					mask_bitfield =
+					    mask_flags[i].mask_bitfield;
+					done = 0;
+					break;
+				}
+			}
+		}
+
+		if (mask_name != NULL) {
+			done = 0;
+			switch (add) {
+			case '-':
+				rg &= ~mask_bitfield;
+				break;
+			case '+':
+				rg |= mask_bitfield;
+				break;
+			case '=':
+				rg = mask_bitfield;
+				break;
+			default:
+				rg |= mask_bitfield;
+				break;
+			}
+		}
+	}
+
+	yaffs_trace_mask = rg | YAFFS_TRACE_ALWAYS;
+
+	printk(KERN_DEBUG "new trace = 0x%08X\n", yaffs_trace_mask);
+
+	if (rg & YAFFS_TRACE_ALWAYS) {
+		for (i = 0; mask_flags[i].mask_name != NULL; i++) {
+			char flag;
+			flag = ((rg & mask_flags[i].mask_bitfield) ==
+				mask_flags[i].mask_bitfield) ? '+' : '-';
+			printk(KERN_DEBUG "%c%s\n", flag,
+			       mask_flags[i].mask_name);
+		}
+	}
+
+	return count;
+}
+
+static int yaffs_proc_write(struct file *file, const char *buf,
+			    unsigned long count, void *data)
+{
+	return yaffs_proc_write_trace_options(file, buf, count, data);
+}
+
+/* Stuff to handle installation of file systems */
+struct file_system_to_install {
+	struct file_system_type *fst;
+	int installed;
+};
+
+static struct file_system_to_install fs_to_install[] = {
+	{&yaffs_fs_type, 0},
+	{&yaffs2_fs_type, 0},
+	{NULL, 0}
+};
+
+static int __init init_yaffs_fs(void)
+{
+	int error = 0;
+	struct file_system_to_install *fsinst;
+
+	yaffs_trace(YAFFS_TRACE_ALWAYS,
+		"yaffs built " __DATE__ " " __TIME__ " Installing.");
+
+	mutex_init(&yaffs_context_lock);
+
+	/* Install the proc_fs entries */
+	my_proc_entry = create_proc_entry("yaffs",
+					  S_IRUGO | S_IFREG, YPROC_ROOT);
+
+	if (my_proc_entry) {
+		my_proc_entry->write_proc = yaffs_proc_write;
+		my_proc_entry->read_proc = yaffs_proc_read;
+		my_proc_entry->data = NULL;
+	} else {
+		return -ENOMEM;
+        }
+
+	/* Now add the file system entries */
+
+	fsinst = fs_to_install;
+
+	while (fsinst->fst && !error) {
+		error = register_filesystem(fsinst->fst);
+		if (!error)
+			fsinst->installed = 1;
+		fsinst++;
+	}
+
+	/* Any errors? uninstall  */
+	if (error) {
+		fsinst = fs_to_install;
+
+		while (fsinst->fst) {
+			if (fsinst->installed) {
+				unregister_filesystem(fsinst->fst);
+				fsinst->installed = 0;
+			}
+			fsinst++;
+		}
+	}
+
+	return error;
+}
+
+static void __exit exit_yaffs_fs(void)
+{
+
+	struct file_system_to_install *fsinst;
+
+	yaffs_trace(YAFFS_TRACE_ALWAYS,
+		"yaffs built " __DATE__ " " __TIME__ " removing.");
+
+	remove_proc_entry("yaffs", YPROC_ROOT);
+
+	fsinst = fs_to_install;
+
+	while (fsinst->fst) {
+		if (fsinst->installed) {
+			unregister_filesystem(fsinst->fst);
+			fsinst->installed = 0;
+		}
+		fsinst++;
+	}
+}
+
+module_init(init_yaffs_fs)
+    module_exit(exit_yaffs_fs)
+
+    MODULE_DESCRIPTION("YAFFS2 - a NAND specific flash file system");
+MODULE_AUTHOR("Charles Manning, Aleph One Ltd., 2002-2011");
+MODULE_LICENSE("GPL");
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_yaffs1.c linux-3.0.82x/fs/yaffs2/yaffs_yaffs1.c
--- linux-3.0.82/fs/yaffs2/yaffs_yaffs1.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_yaffs1.c	2017-09-23 03:42:50.310674171 +0800
@@ -0,0 +1,424 @@
+/*
+ * YAFFS: Yet Another Flash File System. A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "yaffs_yaffs1.h"
+#include "yportenv.h"
+#include "yaffs_trace.h"
+#include "yaffs_bitmap.h"
+#include "yaffs_getblockinfo.h"
+#include "yaffs_nand.h"
+#include "yaffs_attribs.h"
+
+int yaffs1_scan(struct yaffs_dev *dev)
+{
+	struct yaffs_ext_tags tags;
+	int blk;
+	int result;
+	int chunk;
+	int c;
+	int deleted;
+	enum yaffs_block_state state;
+	LIST_HEAD(hard_list);
+	struct yaffs_block_info *bi;
+	u32 seq_number;
+	struct yaffs_obj_hdr *oh;
+	struct yaffs_obj *in;
+	struct yaffs_obj *parent;
+	int alloc_failed = 0;
+	struct yaffs_shadow_fixer *shadow_fixers = NULL;
+	u8 *chunk_data;
+
+	yaffs_trace(YAFFS_TRACE_SCAN,
+		"yaffs1_scan starts  intstartblk %d intendblk %d...",
+		dev->internal_start_block, dev->internal_end_block);
+
+	chunk_data = yaffs_get_temp_buffer(dev);
+
+	dev->seq_number = YAFFS_LOWEST_SEQUENCE_NUMBER;
+
+	/* Scan all the blocks to determine their state */
+	bi = dev->block_info;
+	for (blk = dev->internal_start_block; blk <= dev->internal_end_block;
+	     blk++) {
+		yaffs_clear_chunk_bits(dev, blk);
+		bi->pages_in_use = 0;
+		bi->soft_del_pages = 0;
+
+		yaffs_query_init_block_state(dev, blk, &state, &seq_number);
+
+		bi->block_state = state;
+		bi->seq_number = seq_number;
+
+		if (bi->seq_number == YAFFS_SEQUENCE_BAD_BLOCK)
+			bi->block_state = state = YAFFS_BLOCK_STATE_DEAD;
+
+		yaffs_trace(YAFFS_TRACE_SCAN_DEBUG,
+			"Block scanning block %d state %d seq %d",
+			blk, state, seq_number);
+
+		if (state == YAFFS_BLOCK_STATE_DEAD) {
+			yaffs_trace(YAFFS_TRACE_BAD_BLOCKS,
+				"block %d is bad", blk);
+		} else if (state == YAFFS_BLOCK_STATE_EMPTY) {
+			yaffs_trace(YAFFS_TRACE_SCAN_DEBUG, "Block empty ");
+			dev->n_erased_blocks++;
+			dev->n_free_chunks += dev->param.chunks_per_block;
+		}
+		bi++;
+	}
+
+	/* For each block.... */
+	for (blk = dev->internal_start_block;
+	     !alloc_failed && blk <= dev->internal_end_block; blk++) {
+
+		cond_resched();
+
+		bi = yaffs_get_block_info(dev, blk);
+		state = bi->block_state;
+
+		deleted = 0;
+
+		/* For each chunk in each block that needs scanning.... */
+		for (c = 0;
+			!alloc_failed && c < dev->param.chunks_per_block &&
+			state == YAFFS_BLOCK_STATE_NEEDS_SCAN; c++) {
+			/* Read the tags and decide what to do */
+			chunk = blk * dev->param.chunks_per_block + c;
+
+			result = yaffs_rd_chunk_tags_nand(dev, chunk, NULL,
+							  &tags);
+
+			/* Let's have a good look at this chunk... */
+
+			if (tags.ecc_result == YAFFS_ECC_RESULT_UNFIXED ||
+			    tags.is_deleted) {
+				/* YAFFS1 only...
+				 * A deleted chunk
+				 */
+				deleted++;
+				dev->n_free_chunks++;
+			} else if (!tags.chunk_used) {
+				/* An unassigned chunk in the block
+				 * This means that either the block is empty or
+				 * this is the one being allocated from
+				 */
+
+				if (c == 0) {
+					/* We're looking at the first chunk in
+					 *the block so the block is unused */
+					state = YAFFS_BLOCK_STATE_EMPTY;
+					dev->n_erased_blocks++;
+				} else {
+					/* this is the block being allocated */
+					yaffs_trace(YAFFS_TRACE_SCAN,
+						" Allocating from %d %d",
+						blk, c);
+					state = YAFFS_BLOCK_STATE_ALLOCATING;
+					dev->alloc_block = blk;
+					dev->alloc_page = c;
+					dev->alloc_block_finder = blk;
+
+				}
+
+				dev->n_free_chunks +=
+				    (dev->param.chunks_per_block - c);
+			} else if (tags.chunk_id > 0) {
+				/* chunk_id > 0 so it is a data chunk... */
+				unsigned int endpos;
+
+				yaffs_set_chunk_bit(dev, blk, c);
+				bi->pages_in_use++;
+
+				in = yaffs_find_or_create_by_number(dev,
+							tags.obj_id,
+							YAFFS_OBJECT_TYPE_FILE);
+				/* PutChunkIntoFile checks for a clash
+				 * (two data chunks with the same chunk_id).
+				 */
+
+				if (!in)
+					alloc_failed = 1;
+
+				if (in) {
+					if (!yaffs_put_chunk_in_file
+					    (in, tags.chunk_id, chunk, 1))
+						alloc_failed = 1;
+				}
+
+				endpos =
+				    (tags.chunk_id - 1) *
+				    dev->data_bytes_per_chunk +
+				    tags.n_bytes;
+				if (in &&
+				    in->variant_type ==
+				     YAFFS_OBJECT_TYPE_FILE &&
+				    in->variant.file_variant.scanned_size <
+				      endpos) {
+					in->variant.file_variant.scanned_size =
+					    endpos;
+					if (!dev->param.use_header_file_size) {
+						in->variant.
+						    file_variant.file_size =
+						    in->variant.
+						    file_variant.scanned_size;
+					}
+
+				}
+			} else {
+				/* chunk_id == 0, so it is an ObjectHeader.
+				 * Make the object
+				 */
+				yaffs_set_chunk_bit(dev, blk, c);
+				bi->pages_in_use++;
+
+				result = yaffs_rd_chunk_tags_nand(dev, chunk,
+								  chunk_data,
+								  NULL);
+
+				oh = (struct yaffs_obj_hdr *)chunk_data;
+
+				in = yaffs_find_by_number(dev, tags.obj_id);
+				if (in && in->variant_type != oh->type) {
+					/* This should not happen, but somehow
+					 * Wev'e ended up with an obj_id that
+					 * has been reused but not yet deleted,
+					 * and worse still it has changed type.
+					 * Delete the old object.
+					 */
+
+					yaffs_del_obj(in);
+					in = NULL;
+				}
+
+				in = yaffs_find_or_create_by_number(dev,
+								tags.obj_id,
+								oh->type);
+
+				if (!in)
+					alloc_failed = 1;
+
+				if (in && oh->shadows_obj > 0) {
+
+					struct yaffs_shadow_fixer *fixer;
+					fixer =
+						kmalloc(sizeof
+						(struct yaffs_shadow_fixer),
+						GFP_NOFS);
+					if (fixer) {
+						fixer->next = shadow_fixers;
+						shadow_fixers = fixer;
+						fixer->obj_id = tags.obj_id;
+						fixer->shadowed_id =
+						    oh->shadows_obj;
+						yaffs_trace(YAFFS_TRACE_SCAN,
+							" Shadow fixer: %d shadows %d",
+							fixer->obj_id,
+							fixer->shadowed_id);
+
+					}
+
+				}
+
+				if (in && in->valid) {
+					/* We have already filled this one.
+					 * We have a duplicate and need to
+					 * resolve it. */
+
+					unsigned existing_serial = in->serial;
+					unsigned new_serial =
+					    tags.serial_number;
+
+					if (((existing_serial + 1) & 3) ==
+					    new_serial) {
+						/* Use new one - destroy the
+						 * exisiting one */
+						yaffs_chunk_del(dev,
+								in->hdr_chunk,
+								1, __LINE__);
+						in->valid = 0;
+					} else {
+						/* Use existing - destroy
+						 * this one. */
+						yaffs_chunk_del(dev, chunk, 1,
+								__LINE__);
+					}
+				}
+
+				if (in && !in->valid &&
+				    (tags.obj_id == YAFFS_OBJECTID_ROOT ||
+				     tags.obj_id ==
+				     YAFFS_OBJECTID_LOSTNFOUND)) {
+					/* We only load some info, don't fiddle
+					 * with directory structure */
+					in->valid = 1;
+					in->variant_type = oh->type;
+
+					in->yst_mode = oh->yst_mode;
+					yaffs_load_attribs(in, oh);
+					in->hdr_chunk = chunk;
+					in->serial = tags.serial_number;
+
+				} else if (in && !in->valid) {
+					/* we need to load this info */
+
+					in->valid = 1;
+					in->variant_type = oh->type;
+
+					in->yst_mode = oh->yst_mode;
+					yaffs_load_attribs(in, oh);
+					in->hdr_chunk = chunk;
+					in->serial = tags.serial_number;
+
+					yaffs_set_obj_name_from_oh(in, oh);
+					in->dirty = 0;
+
+					/* directory stuff...
+					 * hook up to parent
+					 */
+
+					parent =
+					    yaffs_find_or_create_by_number
+					    (dev, oh->parent_obj_id,
+					     YAFFS_OBJECT_TYPE_DIRECTORY);
+					if (!parent)
+						alloc_failed = 1;
+					if (parent && parent->variant_type ==
+					    YAFFS_OBJECT_TYPE_UNKNOWN) {
+						/* Set up as a directory */
+						parent->variant_type =
+						    YAFFS_OBJECT_TYPE_DIRECTORY;
+						INIT_LIST_HEAD(&parent->
+							variant.dir_variant.
+							children);
+					} else if (!parent ||
+						parent->variant_type !=
+						YAFFS_OBJECT_TYPE_DIRECTORY) {
+						/* Hoosterman, a problem....
+						 * We're trying to use a
+						 * non-directory as a directory
+						 */
+
+						yaffs_trace(YAFFS_TRACE_ERROR,
+							"yaffs tragedy: attempting to use non-directory as a directory in scan. Put in lost+found."
+							);
+						parent = dev->lost_n_found;
+					}
+
+					yaffs_add_obj_to_dir(parent, in);
+
+					switch (in->variant_type) {
+					case YAFFS_OBJECT_TYPE_UNKNOWN:
+						/* Todo got a problem */
+						break;
+					case YAFFS_OBJECT_TYPE_FILE:
+						if (dev->param.
+						    use_header_file_size)
+
+							in->variant.
+							 file_variant.file_size
+							    = oh->file_size;
+
+						break;
+					case YAFFS_OBJECT_TYPE_HARDLINK:
+						in->variant.
+						    hardlink_variant.equiv_id =
+						    oh->equiv_id;
+						list_add(&in->hard_links,
+								&hard_list);
+						break;
+					case YAFFS_OBJECT_TYPE_DIRECTORY:
+						/* Do nothing */
+						break;
+					case YAFFS_OBJECT_TYPE_SPECIAL:
+						/* Do nothing */
+						break;
+					case YAFFS_OBJECT_TYPE_SYMLINK:
+						in->variant.symlink_variant.
+						    alias =
+						    yaffs_clone_str(oh->alias);
+						if (!in->variant.
+						    symlink_variant.alias)
+							alloc_failed = 1;
+						break;
+					}
+				}
+			}
+		}
+
+		if (state == YAFFS_BLOCK_STATE_NEEDS_SCAN) {
+			/* If we got this far while scanning,
+			 * then the block is fully allocated. */
+			state = YAFFS_BLOCK_STATE_FULL;
+		}
+
+		if (state == YAFFS_BLOCK_STATE_ALLOCATING) {
+			/* If the block was partially allocated then
+			 * treat it as fully allocated. */
+			state = YAFFS_BLOCK_STATE_FULL;
+			dev->alloc_block = -1;
+		}
+
+		bi->block_state = state;
+
+		/* Now let's see if it was dirty */
+		if (bi->pages_in_use == 0 &&
+		    !bi->has_shrink_hdr &&
+		    bi->block_state == YAFFS_BLOCK_STATE_FULL)
+			yaffs_block_became_dirty(dev, blk);
+	}
+
+	/* Ok, we've done all the scanning.
+	 * Fix up the hard link chains.
+	 * We should now have scanned all the objects, now it's time to add
+	 * these hardlinks.
+	 */
+
+	yaffs_link_fixup(dev, &hard_list);
+
+	/*
+	 * Fix up any shadowed objects.
+	 * There should not be more than one of these.
+	 */
+	{
+		struct yaffs_shadow_fixer *fixer;
+		struct yaffs_obj *obj;
+
+		while (shadow_fixers) {
+			fixer = shadow_fixers;
+			shadow_fixers = fixer->next;
+			/* Complete the rename transaction by deleting the
+			 * shadowed object then setting the object header
+			 to unshadowed.
+			 */
+			obj = yaffs_find_by_number(dev, fixer->shadowed_id);
+			if (obj)
+				yaffs_del_obj(obj);
+
+			obj = yaffs_find_by_number(dev, fixer->obj_id);
+
+			if (obj)
+				yaffs_update_oh(obj, NULL, 1, 0, 0, NULL);
+
+			kfree(fixer);
+		}
+	}
+
+	yaffs_release_temp_buffer(dev, chunk_data);
+
+	if (alloc_failed)
+		return YAFFS_FAIL;
+
+	yaffs_trace(YAFFS_TRACE_SCAN, "yaffs1_scan ends");
+
+	return YAFFS_OK;
+}
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_yaffs1.h linux-3.0.82x/fs/yaffs2/yaffs_yaffs1.h
--- linux-3.0.82/fs/yaffs2/yaffs_yaffs1.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_yaffs1.h	2017-09-23 03:42:50.310674171 +0800
@@ -0,0 +1,22 @@
+/*
+ * YAFFS: Yet another Flash File System . A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1 as
+ * published by the Free Software Foundation.
+ *
+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
+ */
+
+#ifndef __YAFFS_YAFFS1_H__
+#define __YAFFS_YAFFS1_H__
+
+#include "yaffs_guts.h"
+int yaffs1_scan(struct yaffs_dev *dev);
+
+#endif
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_yaffs2.c linux-3.0.82x/fs/yaffs2/yaffs_yaffs2.c
--- linux-3.0.82/fs/yaffs2/yaffs_yaffs2.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_yaffs2.c	2017-09-23 03:42:50.314674158 +0800
@@ -0,0 +1,1532 @@
+/*
+ * YAFFS: Yet Another Flash File System. A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "yaffs_guts.h"
+#include "yaffs_trace.h"
+#include "yaffs_yaffs2.h"
+#include "yaffs_checkptrw.h"
+#include "yaffs_bitmap.h"
+#include "yaffs_nand.h"
+#include "yaffs_getblockinfo.h"
+#include "yaffs_verify.h"
+#include "yaffs_attribs.h"
+#include "yaffs_summary.h"
+
+/*
+ * Checkpoints are really no benefit on very small partitions.
+ *
+ * To save space on small partitions don't bother with checkpoints unless
+ * the partition is at least this big.
+ */
+#define YAFFS_CHECKPOINT_MIN_BLOCKS 60
+#define YAFFS_SMALL_HOLE_THRESHOLD 4
+
+/*
+ * Oldest Dirty Sequence Number handling.
+ */
+
+/* yaffs_calc_oldest_dirty_seq()
+ * yaffs2_find_oldest_dirty_seq()
+ * Calculate the oldest dirty sequence number if we don't know it.
+ */
+void yaffs_calc_oldest_dirty_seq(struct yaffs_dev *dev)
+{
+	int i;
+	unsigned seq;
+	unsigned block_no = 0;
+	struct yaffs_block_info *b;
+
+	if (!dev->param.is_yaffs2)
+		return;
+
+	/* Find the oldest dirty sequence number. */
+	seq = dev->seq_number + 1;
+	b = dev->block_info;
+	for (i = dev->internal_start_block; i <= dev->internal_end_block; i++) {
+		if (b->block_state == YAFFS_BLOCK_STATE_FULL &&
+		    (b->pages_in_use - b->soft_del_pages) <
+		    dev->param.chunks_per_block &&
+		    b->seq_number < seq) {
+			seq = b->seq_number;
+			block_no = i;
+		}
+		b++;
+	}
+
+	if (block_no) {
+		dev->oldest_dirty_seq = seq;
+		dev->oldest_dirty_block = block_no;
+	}
+}
+
+void yaffs2_find_oldest_dirty_seq(struct yaffs_dev *dev)
+{
+	if (!dev->param.is_yaffs2)
+		return;
+
+	if (!dev->oldest_dirty_seq)
+		yaffs_calc_oldest_dirty_seq(dev);
+}
+
+/*
+ * yaffs_clear_oldest_dirty_seq()
+ * Called when a block is erased or marked bad. (ie. when its seq_number
+ * becomes invalid). If the value matches the oldest then we clear
+ * dev->oldest_dirty_seq to force its recomputation.
+ */
+void yaffs2_clear_oldest_dirty_seq(struct yaffs_dev *dev,
+				   struct yaffs_block_info *bi)
+{
+
+	if (!dev->param.is_yaffs2)
+		return;
+
+	if (!bi || bi->seq_number == dev->oldest_dirty_seq) {
+		dev->oldest_dirty_seq = 0;
+		dev->oldest_dirty_block = 0;
+	}
+}
+
+/*
+ * yaffs2_update_oldest_dirty_seq()
+ * Update the oldest dirty sequence number whenever we dirty a block.
+ * Only do this if the oldest_dirty_seq is actually being tracked.
+ */
+void yaffs2_update_oldest_dirty_seq(struct yaffs_dev *dev, unsigned block_no,
+				    struct yaffs_block_info *bi)
+{
+	if (!dev->param.is_yaffs2)
+		return;
+
+	if (dev->oldest_dirty_seq) {
+		if (dev->oldest_dirty_seq > bi->seq_number) {
+			dev->oldest_dirty_seq = bi->seq_number;
+			dev->oldest_dirty_block = block_no;
+		}
+	}
+}
+
+int yaffs_block_ok_for_gc(struct yaffs_dev *dev, struct yaffs_block_info *bi)
+{
+
+	if (!dev->param.is_yaffs2)
+		return 1;	/* disqualification only applies to yaffs2. */
+
+	if (!bi->has_shrink_hdr)
+		return 1;	/* can gc */
+
+	yaffs2_find_oldest_dirty_seq(dev);
+
+	/* Can't do gc of this block if there are any blocks older than this
+	 * one that have discarded pages.
+	 */
+	return (bi->seq_number <= dev->oldest_dirty_seq);
+}
+
+/*
+ * yaffs2_find_refresh_block()
+ * periodically finds the oldest full block by sequence number for refreshing.
+ * Only for yaffs2.
+ */
+u32 yaffs2_find_refresh_block(struct yaffs_dev *dev)
+{
+	u32 b;
+	u32 oldest = 0;
+	u32 oldest_seq = 0;
+	struct yaffs_block_info *bi;
+
+	if (!dev->param.is_yaffs2)
+		return oldest;
+
+	/*
+	 * If refresh period < 10 then refreshing is disabled.
+	 */
+	if (dev->param.refresh_period < 10)
+		return oldest;
+
+	/*
+	 * Fix broken values.
+	 */
+	if (dev->refresh_skip > dev->param.refresh_period)
+		dev->refresh_skip = dev->param.refresh_period;
+
+	if (dev->refresh_skip > 0)
+		return oldest;
+
+	/*
+	 * Refresh skip is now zero.
+	 * We'll do a refresh this time around....
+	 * Update the refresh skip and find the oldest block.
+	 */
+	dev->refresh_skip = dev->param.refresh_period;
+	dev->refresh_count++;
+	bi = dev->block_info;
+	for (b = dev->internal_start_block; b <= dev->internal_end_block; b++) {
+
+		if (bi->block_state == YAFFS_BLOCK_STATE_FULL) {
+
+			if (oldest < 1 || bi->seq_number < oldest_seq) {
+				oldest = b;
+				oldest_seq = bi->seq_number;
+			}
+		}
+		bi++;
+	}
+
+	if (oldest > 0) {
+		yaffs_trace(YAFFS_TRACE_GC,
+			"GC refresh count %d selected block %d with seq_number %d",
+			dev->refresh_count, oldest, oldest_seq);
+	}
+
+	return oldest;
+}
+
+int yaffs2_checkpt_required(struct yaffs_dev *dev)
+{
+	int nblocks;
+
+	if (!dev->param.is_yaffs2)
+		return 0;
+
+	nblocks = dev->internal_end_block - dev->internal_start_block + 1;
+
+	return !dev->param.skip_checkpt_wr &&
+	    !dev->read_only && (nblocks >= YAFFS_CHECKPOINT_MIN_BLOCKS);
+}
+
+int yaffs_calc_checkpt_blocks_required(struct yaffs_dev *dev)
+{
+	int retval;
+	int n_bytes = 0;
+	int n_blocks;
+	int dev_blocks;
+
+	if (!dev->param.is_yaffs2)
+		return 0;
+
+	if (!dev->checkpoint_blocks_required && yaffs2_checkpt_required(dev)) {
+		/* Not a valid value so recalculate */
+		dev_blocks = dev->param.end_block - dev->param.start_block + 1;
+		n_bytes += sizeof(struct yaffs_checkpt_validity);
+		n_bytes += sizeof(struct yaffs_checkpt_dev);
+		n_bytes += dev_blocks * sizeof(struct yaffs_block_info);
+		n_bytes += dev_blocks * dev->chunk_bit_stride;
+		n_bytes +=
+		    (sizeof(struct yaffs_checkpt_obj) + sizeof(u32)) *
+		    dev->n_obj;
+		n_bytes += (dev->tnode_size + sizeof(u32)) * dev->n_tnodes;
+		n_bytes += sizeof(struct yaffs_checkpt_validity);
+		n_bytes += sizeof(u32);	/* checksum */
+
+		/* Round up and add 2 blocks to allow for some bad blocks,
+		 * so add 3 */
+
+		n_blocks =
+		    (n_bytes /
+		     (dev->data_bytes_per_chunk *
+		      dev->param.chunks_per_block)) + 3;
+
+		dev->checkpoint_blocks_required = n_blocks;
+	}
+
+	retval = dev->checkpoint_blocks_required - dev->blocks_in_checkpt;
+	if (retval < 0)
+		retval = 0;
+	return retval;
+}
+
+/*--------------------- Checkpointing --------------------*/
+
+static int yaffs2_wr_checkpt_validity_marker(struct yaffs_dev *dev, int head)
+{
+	struct yaffs_checkpt_validity cp;
+
+	memset(&cp, 0, sizeof(cp));
+
+	cp.struct_type = sizeof(cp);
+	cp.magic = YAFFS_MAGIC;
+	cp.version = YAFFS_CHECKPOINT_VERSION;
+	cp.head = (head) ? 1 : 0;
+
+	return (yaffs2_checkpt_wr(dev, &cp, sizeof(cp)) == sizeof(cp)) ? 1 : 0;
+}
+
+static int yaffs2_rd_checkpt_validity_marker(struct yaffs_dev *dev, int head)
+{
+	struct yaffs_checkpt_validity cp;
+	int ok;
+
+	ok = (yaffs2_checkpt_rd(dev, &cp, sizeof(cp)) == sizeof(cp));
+
+	if (ok)
+		ok = (cp.struct_type == sizeof(cp)) &&
+		    (cp.magic == YAFFS_MAGIC) &&
+		    (cp.version == YAFFS_CHECKPOINT_VERSION) &&
+		    (cp.head == ((head) ? 1 : 0));
+	return ok ? 1 : 0;
+}
+
+static void yaffs2_dev_to_checkpt_dev(struct yaffs_checkpt_dev *cp,
+				      struct yaffs_dev *dev)
+{
+	cp->n_erased_blocks = dev->n_erased_blocks;
+	cp->alloc_block = dev->alloc_block;
+	cp->alloc_page = dev->alloc_page;
+	cp->n_free_chunks = dev->n_free_chunks;
+
+	cp->n_deleted_files = dev->n_deleted_files;
+	cp->n_unlinked_files = dev->n_unlinked_files;
+	cp->n_bg_deletions = dev->n_bg_deletions;
+	cp->seq_number = dev->seq_number;
+
+}
+
+static void yaffs_checkpt_dev_to_dev(struct yaffs_dev *dev,
+				     struct yaffs_checkpt_dev *cp)
+{
+	dev->n_erased_blocks = cp->n_erased_blocks;
+	dev->alloc_block = cp->alloc_block;
+	dev->alloc_page = cp->alloc_page;
+	dev->n_free_chunks = cp->n_free_chunks;
+
+	dev->n_deleted_files = cp->n_deleted_files;
+	dev->n_unlinked_files = cp->n_unlinked_files;
+	dev->n_bg_deletions = cp->n_bg_deletions;
+	dev->seq_number = cp->seq_number;
+}
+
+static int yaffs2_wr_checkpt_dev(struct yaffs_dev *dev)
+{
+	struct yaffs_checkpt_dev cp;
+	u32 n_bytes;
+	u32 n_blocks = dev->internal_end_block - dev->internal_start_block + 1;
+	int ok;
+
+	/* Write device runtime values */
+	yaffs2_dev_to_checkpt_dev(&cp, dev);
+	cp.struct_type = sizeof(cp);
+
+	ok = (yaffs2_checkpt_wr(dev, &cp, sizeof(cp)) == sizeof(cp));
+	if (!ok)
+		return 0;
+
+	/* Write block info */
+	n_bytes = n_blocks * sizeof(struct yaffs_block_info);
+	ok = (yaffs2_checkpt_wr(dev, dev->block_info, n_bytes) == n_bytes);
+	if (!ok)
+		return 0;
+
+	/* Write chunk bits */
+	n_bytes = n_blocks * dev->chunk_bit_stride;
+	ok = (yaffs2_checkpt_wr(dev, dev->chunk_bits, n_bytes) == n_bytes);
+
+	return ok ? 1 : 0;
+}
+
+static int yaffs2_rd_checkpt_dev(struct yaffs_dev *dev)
+{
+	struct yaffs_checkpt_dev cp;
+	u32 n_bytes;
+	u32 n_blocks =
+	    (dev->internal_end_block - dev->internal_start_block + 1);
+	int ok;
+
+	ok = (yaffs2_checkpt_rd(dev, &cp, sizeof(cp)) == sizeof(cp));
+	if (!ok)
+		return 0;
+
+	if (cp.struct_type != sizeof(cp))
+		return 0;
+
+	yaffs_checkpt_dev_to_dev(dev, &cp);
+
+	n_bytes = n_blocks * sizeof(struct yaffs_block_info);
+
+	ok = (yaffs2_checkpt_rd(dev, dev->block_info, n_bytes) == n_bytes);
+
+	if (!ok)
+		return 0;
+
+	n_bytes = n_blocks * dev->chunk_bit_stride;
+
+	ok = (yaffs2_checkpt_rd(dev, dev->chunk_bits, n_bytes) == n_bytes);
+
+	return ok ? 1 : 0;
+}
+
+static void yaffs2_obj_checkpt_obj(struct yaffs_checkpt_obj *cp,
+				   struct yaffs_obj *obj)
+{
+	cp->obj_id = obj->obj_id;
+	cp->parent_id = (obj->parent) ? obj->parent->obj_id : 0;
+	cp->hdr_chunk = obj->hdr_chunk;
+	cp->variant_type = obj->variant_type;
+	cp->deleted = obj->deleted;
+	cp->soft_del = obj->soft_del;
+	cp->unlinked = obj->unlinked;
+	cp->fake = obj->fake;
+	cp->rename_allowed = obj->rename_allowed;
+	cp->unlink_allowed = obj->unlink_allowed;
+	cp->serial = obj->serial;
+	cp->n_data_chunks = obj->n_data_chunks;
+
+	if (obj->variant_type == YAFFS_OBJECT_TYPE_FILE)
+		cp->size_or_equiv_obj = obj->variant.file_variant.file_size;
+	else if (obj->variant_type == YAFFS_OBJECT_TYPE_HARDLINK)
+		cp->size_or_equiv_obj = obj->variant.hardlink_variant.equiv_id;
+}
+
+static int yaffs2_checkpt_obj_to_obj(struct yaffs_obj *obj,
+				     struct yaffs_checkpt_obj *cp)
+{
+	struct yaffs_obj *parent;
+
+	if (obj->variant_type != cp->variant_type) {
+		yaffs_trace(YAFFS_TRACE_ERROR,
+			"Checkpoint read object %d type %d chunk %d does not match existing object type %d",
+			cp->obj_id, cp->variant_type, cp->hdr_chunk,
+			obj->variant_type);
+		return 0;
+	}
+
+	obj->obj_id = cp->obj_id;
+
+	if (cp->parent_id)
+		parent = yaffs_find_or_create_by_number(obj->my_dev,
+						cp->parent_id,
+						YAFFS_OBJECT_TYPE_DIRECTORY);
+	else
+		parent = NULL;
+
+	if (parent) {
+		if (parent->variant_type != YAFFS_OBJECT_TYPE_DIRECTORY) {
+			yaffs_trace(YAFFS_TRACE_ALWAYS,
+				"Checkpoint read object %d parent %d type %d chunk %d Parent type, %d, not directory",
+				cp->obj_id, cp->parent_id,
+				cp->variant_type, cp->hdr_chunk,
+				parent->variant_type);
+			return 0;
+		}
+		yaffs_add_obj_to_dir(parent, obj);
+	}
+
+	obj->hdr_chunk = cp->hdr_chunk;
+	obj->variant_type = cp->variant_type;
+	obj->deleted = cp->deleted;
+	obj->soft_del = cp->soft_del;
+	obj->unlinked = cp->unlinked;
+	obj->fake = cp->fake;
+	obj->rename_allowed = cp->rename_allowed;
+	obj->unlink_allowed = cp->unlink_allowed;
+	obj->serial = cp->serial;
+	obj->n_data_chunks = cp->n_data_chunks;
+
+	if (obj->variant_type == YAFFS_OBJECT_TYPE_FILE)
+		obj->variant.file_variant.file_size = cp->size_or_equiv_obj;
+	else if (obj->variant_type == YAFFS_OBJECT_TYPE_HARDLINK)
+		obj->variant.hardlink_variant.equiv_id = cp->size_or_equiv_obj;
+
+	if (obj->hdr_chunk > 0)
+		obj->lazy_loaded = 1;
+	return 1;
+}
+
+static int yaffs2_checkpt_tnode_worker(struct yaffs_obj *in,
+				       struct yaffs_tnode *tn, u32 level,
+				       int chunk_offset)
+{
+	int i;
+	struct yaffs_dev *dev = in->my_dev;
+	int ok = 1;
+	u32 base_offset;
+
+	if (!tn)
+		return 1;
+
+	if (level > 0) {
+		for (i = 0; i < YAFFS_NTNODES_INTERNAL && ok; i++) {
+			if (!tn->internal[i])
+				continue;
+			ok = yaffs2_checkpt_tnode_worker(in,
+				 tn->internal[i],
+				 level - 1,
+				 (chunk_offset <<
+				  YAFFS_TNODES_INTERNAL_BITS) + i);
+		}
+		return ok;
+	}
+
+	/* Level 0 tnode */
+	base_offset = chunk_offset << YAFFS_TNODES_LEVEL0_BITS;
+	ok = (yaffs2_checkpt_wr(dev, &base_offset, sizeof(base_offset)) ==
+			sizeof(base_offset));
+	if (ok)
+		ok = (yaffs2_checkpt_wr(dev, tn, dev->tnode_size) ==
+			dev->tnode_size);
+
+	return ok;
+}
+
+static int yaffs2_wr_checkpt_tnodes(struct yaffs_obj *obj)
+{
+	u32 end_marker = ~0;
+	int ok = 1;
+
+	if (obj->variant_type != YAFFS_OBJECT_TYPE_FILE)
+		return ok;
+
+	ok = yaffs2_checkpt_tnode_worker(obj,
+					 obj->variant.file_variant.top,
+					 obj->variant.file_variant.
+					 top_level, 0);
+	if (ok)
+		ok = (yaffs2_checkpt_wr(obj->my_dev, &end_marker,
+				sizeof(end_marker)) == sizeof(end_marker));
+
+	return ok ? 1 : 0;
+}
+
+static int yaffs2_rd_checkpt_tnodes(struct yaffs_obj *obj)
+{
+	u32 base_chunk;
+	int ok = 1;
+	struct yaffs_dev *dev = obj->my_dev;
+	struct yaffs_file_var *file_stuct_ptr = &obj->variant.file_variant;
+	struct yaffs_tnode *tn;
+	int nread = 0;
+
+	ok = (yaffs2_checkpt_rd(dev, &base_chunk, sizeof(base_chunk)) ==
+	      sizeof(base_chunk));
+
+	while (ok && (~base_chunk)) {
+		nread++;
+		/* Read level 0 tnode */
+
+		tn = yaffs_get_tnode(dev);
+		if (tn)
+			ok = (yaffs2_checkpt_rd(dev, tn, dev->tnode_size) ==
+				dev->tnode_size);
+		else
+			ok = 0;
+
+		if (tn && ok)
+			ok = yaffs_add_find_tnode_0(dev,
+						    file_stuct_ptr,
+						    base_chunk, tn) ? 1 : 0;
+
+		if (ok)
+			ok = (yaffs2_checkpt_rd
+			      (dev, &base_chunk,
+			       sizeof(base_chunk)) == sizeof(base_chunk));
+	}
+
+	yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+		"Checkpoint read tnodes %d records, last %d. ok %d",
+		nread, base_chunk, ok);
+
+	return ok ? 1 : 0;
+}
+
+static int yaffs2_wr_checkpt_objs(struct yaffs_dev *dev)
+{
+	struct yaffs_obj *obj;
+	struct yaffs_checkpt_obj cp;
+	int i;
+	int ok = 1;
+	struct list_head *lh;
+
+	/* Iterate through the objects in each hash entry,
+	 * dumping them to the checkpointing stream.
+	 */
+
+	for (i = 0; ok && i < YAFFS_NOBJECT_BUCKETS; i++) {
+		list_for_each(lh, &dev->obj_bucket[i].list) {
+			obj = list_entry(lh, struct yaffs_obj, hash_link);
+			if (!obj->defered_free) {
+				yaffs2_obj_checkpt_obj(&cp, obj);
+				cp.struct_type = sizeof(cp);
+
+				yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+					"Checkpoint write object %d parent %d type %d chunk %d obj addr %p",
+					cp.obj_id, cp.parent_id,
+					cp.variant_type, cp.hdr_chunk, obj);
+
+				ok = (yaffs2_checkpt_wr(dev, &cp,
+						sizeof(cp)) == sizeof(cp));
+
+				if (ok &&
+					obj->variant_type ==
+					YAFFS_OBJECT_TYPE_FILE)
+					ok = yaffs2_wr_checkpt_tnodes(obj);
+			}
+		}
+	}
+
+	/* Dump end of list */
+	memset(&cp, 0xff, sizeof(struct yaffs_checkpt_obj));
+	cp.struct_type = sizeof(cp);
+
+	if (ok)
+		ok = (yaffs2_checkpt_wr(dev, &cp, sizeof(cp)) == sizeof(cp));
+
+	return ok ? 1 : 0;
+}
+
+static int yaffs2_rd_checkpt_objs(struct yaffs_dev *dev)
+{
+	struct yaffs_obj *obj;
+	struct yaffs_checkpt_obj cp;
+	int ok = 1;
+	int done = 0;
+	LIST_HEAD(hard_list);
+
+
+	while (ok && !done) {
+		ok = (yaffs2_checkpt_rd(dev, &cp, sizeof(cp)) == sizeof(cp));
+		if (cp.struct_type != sizeof(cp)) {
+			yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+				"struct size %d instead of %d ok %d",
+				cp.struct_type, (int)sizeof(cp), ok);
+			ok = 0;
+		}
+
+		yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+			"Checkpoint read object %d parent %d type %d chunk %d ",
+			cp.obj_id, cp.parent_id, cp.variant_type,
+			cp.hdr_chunk);
+
+		if (ok && cp.obj_id == ~0) {
+			done = 1;
+		} else if (ok) {
+			obj =
+			    yaffs_find_or_create_by_number(dev, cp.obj_id,
+							   cp.variant_type);
+			if (obj) {
+				ok = yaffs2_checkpt_obj_to_obj(obj, &cp);
+				if (!ok)
+					break;
+				if (obj->variant_type ==
+					YAFFS_OBJECT_TYPE_FILE) {
+					ok = yaffs2_rd_checkpt_tnodes(obj);
+				} else if (obj->variant_type ==
+					YAFFS_OBJECT_TYPE_HARDLINK) {
+					list_add(&obj->hard_links, &hard_list);
+				}
+			} else {
+				ok = 0;
+			}
+		}
+	}
+
+	if (ok)
+		yaffs_link_fixup(dev, &hard_list);
+
+	return ok ? 1 : 0;
+}
+
+static int yaffs2_wr_checkpt_sum(struct yaffs_dev *dev)
+{
+	u32 checkpt_sum;
+	int ok;
+
+	yaffs2_get_checkpt_sum(dev, &checkpt_sum);
+
+	ok = (yaffs2_checkpt_wr(dev, &checkpt_sum, sizeof(checkpt_sum)) ==
+		sizeof(checkpt_sum));
+
+	if (!ok)
+		return 0;
+
+	return 1;
+}
+
+static int yaffs2_rd_checkpt_sum(struct yaffs_dev *dev)
+{
+	u32 checkpt_sum0;
+	u32 checkpt_sum1;
+	int ok;
+
+	yaffs2_get_checkpt_sum(dev, &checkpt_sum0);
+
+	ok = (yaffs2_checkpt_rd(dev, &checkpt_sum1, sizeof(checkpt_sum1)) ==
+		sizeof(checkpt_sum1));
+
+	if (!ok)
+		return 0;
+
+	if (checkpt_sum0 != checkpt_sum1)
+		return 0;
+
+	return 1;
+}
+
+static int yaffs2_wr_checkpt_data(struct yaffs_dev *dev)
+{
+	int ok = 1;
+
+	if (!yaffs2_checkpt_required(dev)) {
+		yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+			"skipping checkpoint write");
+		ok = 0;
+	}
+
+	if (ok)
+		ok = yaffs2_checkpt_open(dev, 1);
+
+	if (ok) {
+		yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+			"write checkpoint validity");
+		ok = yaffs2_wr_checkpt_validity_marker(dev, 1);
+	}
+	if (ok) {
+		yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+			"write checkpoint device");
+		ok = yaffs2_wr_checkpt_dev(dev);
+	}
+	if (ok) {
+		yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+			"write checkpoint objects");
+		ok = yaffs2_wr_checkpt_objs(dev);
+	}
+	if (ok) {
+		yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+			"write checkpoint validity");
+		ok = yaffs2_wr_checkpt_validity_marker(dev, 0);
+	}
+
+	if (ok)
+		ok = yaffs2_wr_checkpt_sum(dev);
+
+	if (!yaffs_checkpt_close(dev))
+		ok = 0;
+
+	if (ok)
+		dev->is_checkpointed = 1;
+	else
+		dev->is_checkpointed = 0;
+
+	return dev->is_checkpointed;
+}
+
+static int yaffs2_rd_checkpt_data(struct yaffs_dev *dev)
+{
+	int ok = 1;
+
+	if (!dev->param.is_yaffs2)
+		ok = 0;
+
+	if (ok && dev->param.skip_checkpt_rd) {
+		yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+			"skipping checkpoint read");
+		ok = 0;
+	}
+
+	if (ok)
+		ok = yaffs2_checkpt_open(dev, 0); /* open for read */
+
+	if (ok) {
+		yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+			"read checkpoint validity");
+		ok = yaffs2_rd_checkpt_validity_marker(dev, 1);
+	}
+	if (ok) {
+		yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+			"read checkpoint device");
+		ok = yaffs2_rd_checkpt_dev(dev);
+	}
+	if (ok) {
+		yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+			"read checkpoint objects");
+		ok = yaffs2_rd_checkpt_objs(dev);
+	}
+	if (ok) {
+		yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+			"read checkpoint validity");
+		ok = yaffs2_rd_checkpt_validity_marker(dev, 0);
+	}
+
+	if (ok) {
+		ok = yaffs2_rd_checkpt_sum(dev);
+		yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+			"read checkpoint checksum %d", ok);
+	}
+
+	if (!yaffs_checkpt_close(dev))
+		ok = 0;
+
+	if (ok)
+		dev->is_checkpointed = 1;
+	else
+		dev->is_checkpointed = 0;
+
+	return ok ? 1 : 0;
+}
+
+void yaffs2_checkpt_invalidate(struct yaffs_dev *dev)
+{
+	if (dev->is_checkpointed || dev->blocks_in_checkpt > 0) {
+		dev->is_checkpointed = 0;
+		yaffs2_checkpt_invalidate_stream(dev);
+	}
+	if (dev->param.sb_dirty_fn)
+		dev->param.sb_dirty_fn(dev);
+}
+
+int yaffs_checkpoint_save(struct yaffs_dev *dev)
+{
+	yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+		"save entry: is_checkpointed %d",
+		dev->is_checkpointed);
+
+	yaffs_verify_objects(dev);
+	yaffs_verify_blocks(dev);
+	yaffs_verify_free_chunks(dev);
+
+	if (!dev->is_checkpointed) {
+		yaffs2_checkpt_invalidate(dev);
+		yaffs2_wr_checkpt_data(dev);
+	}
+
+	yaffs_trace(YAFFS_TRACE_CHECKPOINT | YAFFS_TRACE_MOUNT,
+		"save exit: is_checkpointed %d",
+		dev->is_checkpointed);
+
+	return dev->is_checkpointed;
+}
+
+int yaffs2_checkpt_restore(struct yaffs_dev *dev)
+{
+	int retval;
+
+	yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+		"restore entry: is_checkpointed %d",
+		dev->is_checkpointed);
+
+	retval = yaffs2_rd_checkpt_data(dev);
+
+	if (dev->is_checkpointed) {
+		yaffs_verify_objects(dev);
+		yaffs_verify_blocks(dev);
+		yaffs_verify_free_chunks(dev);
+	}
+
+	yaffs_trace(YAFFS_TRACE_CHECKPOINT,
+		"restore exit: is_checkpointed %d",
+		dev->is_checkpointed);
+
+	return retval;
+}
+
+int yaffs2_handle_hole(struct yaffs_obj *obj, loff_t new_size)
+{
+	/* if new_size > old_file_size.
+	 * We're going to be writing a hole.
+	 * If the hole is small then write zeros otherwise write a start
+	 * of hole marker.
+	 */
+	loff_t old_file_size;
+	int increase;
+	int small_hole;
+	int result = YAFFS_OK;
+	struct yaffs_dev *dev = NULL;
+	u8 *local_buffer = NULL;
+	int small_increase_ok = 0;
+
+	if (!obj)
+		return YAFFS_FAIL;
+
+	if (obj->variant_type != YAFFS_OBJECT_TYPE_FILE)
+		return YAFFS_FAIL;
+
+	dev = obj->my_dev;
+
+	/* Bail out if not yaffs2 mode */
+	if (!dev->param.is_yaffs2)
+		return YAFFS_OK;
+
+	old_file_size = obj->variant.file_variant.file_size;
+
+	if (new_size <= old_file_size)
+		return YAFFS_OK;
+
+	increase = new_size - old_file_size;
+
+	if (increase < YAFFS_SMALL_HOLE_THRESHOLD * dev->data_bytes_per_chunk &&
+	    yaffs_check_alloc_available(dev, YAFFS_SMALL_HOLE_THRESHOLD + 1))
+		small_hole = 1;
+	else
+		small_hole = 0;
+
+	if (small_hole)
+		local_buffer = yaffs_get_temp_buffer(dev);
+
+	if (local_buffer) {
+		/* fill hole with zero bytes */
+		int pos = old_file_size;
+		int this_write;
+		int written;
+		memset(local_buffer, 0, dev->data_bytes_per_chunk);
+		small_increase_ok = 1;
+
+		while (increase > 0 && small_increase_ok) {
+			this_write = increase;
+			if (this_write > dev->data_bytes_per_chunk)
+				this_write = dev->data_bytes_per_chunk;
+			written =
+			    yaffs_do_file_wr(obj, local_buffer, pos, this_write,
+					     0);
+			if (written == this_write) {
+				pos += this_write;
+				increase -= this_write;
+			} else {
+				small_increase_ok = 0;
+			}
+		}
+
+		yaffs_release_temp_buffer(dev, local_buffer);
+
+		/* If out of space then reverse any chunks we've added */
+		if (!small_increase_ok)
+			yaffs_resize_file_down(obj, old_file_size);
+	}
+
+	if (!small_increase_ok &&
+	    obj->parent &&
+	    obj->parent->obj_id != YAFFS_OBJECTID_UNLINKED &&
+	    obj->parent->obj_id != YAFFS_OBJECTID_DELETED) {
+		/* Write a hole start header with the old file size */
+		yaffs_update_oh(obj, NULL, 0, 1, 0, NULL);
+	}
+
+	return result;
+}
+
+struct yaffs_block_index {
+	int seq;
+	int block;
+};
+
+static int yaffs2_ybicmp(const void *a, const void *b)
+{
+	int aseq = ((struct yaffs_block_index *)a)->seq;
+	int bseq = ((struct yaffs_block_index *)b)->seq;
+	int ablock = ((struct yaffs_block_index *)a)->block;
+	int bblock = ((struct yaffs_block_index *)b)->block;
+
+	if (aseq == bseq)
+		return ablock - bblock;
+
+	return aseq - bseq;
+}
+
+static inline int yaffs2_scan_chunk(struct yaffs_dev *dev,
+		struct yaffs_block_info *bi,
+		int blk, int chunk_in_block,
+		int *found_chunks,
+		u8 *chunk_data,
+		struct list_head *hard_list,
+		int summary_available)
+{
+	struct yaffs_obj_hdr *oh;
+	struct yaffs_obj *in;
+	struct yaffs_obj *parent;
+	int equiv_id;
+	int file_size;
+	int is_shrink;
+	int is_unlinked;
+	struct yaffs_ext_tags tags;
+	int result;
+	int alloc_failed = 0;
+	int chunk = blk * dev->param.chunks_per_block + chunk_in_block;
+	struct yaffs_file_var *file_var;
+	struct yaffs_hardlink_var *hl_var;
+	struct yaffs_symlink_var *sl_var;
+
+	if (summary_available) {
+		result = yaffs_summary_fetch(dev, &tags, chunk_in_block);
+		tags.seq_number = bi->seq_number;
+	}
+
+	if (!summary_available || tags.obj_id == 0) {
+		result = yaffs_rd_chunk_tags_nand(dev, chunk, NULL, &tags);
+		dev->tags_used++;
+	} else {
+		dev->summary_used++;
+	}
+
+	/* Let's have a good look at this chunk... */
+
+	if (!tags.chunk_used) {
+		/* An unassigned chunk in the block.
+		 * If there are used chunks after this one, then
+		 * it is a chunk that was skipped due to failing
+		 * the erased check. Just skip it so that it can
+		 * be deleted.
+		 * But, more typically, We get here when this is
+		 * an unallocated chunk and his means that
+		 * either the block is empty or this is the one
+		 * being allocated from
+		 */
+
+		if (*found_chunks) {
+			/* This is a chunk that was skipped due
+			 * to failing the erased check */
+		} else if (chunk_in_block == 0) {
+			/* We're looking at the first chunk in
+			 * the block so the block is unused */
+			bi->block_state = YAFFS_BLOCK_STATE_EMPTY;
+			dev->n_erased_blocks++;
+		} else {
+			if (bi->block_state == YAFFS_BLOCK_STATE_NEEDS_SCAN ||
+			    bi->block_state == YAFFS_BLOCK_STATE_ALLOCATING) {
+				if (dev->seq_number == bi->seq_number) {
+					/* Allocating from this block*/
+					yaffs_trace(YAFFS_TRACE_SCAN,
+					    " Allocating from %d %d",
+					    blk, chunk_in_block);
+
+					bi->block_state =
+						YAFFS_BLOCK_STATE_ALLOCATING;
+					dev->alloc_block = blk;
+					dev->alloc_page = chunk_in_block;
+					dev->alloc_block_finder = blk;
+				} else {
+					/* This is a partially written block
+					 * that is not the current
+					 * allocation block.
+					 */
+					yaffs_trace(YAFFS_TRACE_SCAN,
+						"Partially written block %d detected. gc will fix this.",
+						blk);
+				}
+			}
+		}
+
+		dev->n_free_chunks++;
+
+	} else if (tags.ecc_result ==
+		YAFFS_ECC_RESULT_UNFIXED) {
+		yaffs_trace(YAFFS_TRACE_SCAN,
+			" Unfixed ECC in chunk(%d:%d), chunk ignored",
+			blk, chunk_in_block);
+			dev->n_free_chunks++;
+	} else if (tags.obj_id > YAFFS_MAX_OBJECT_ID ||
+		   tags.chunk_id > YAFFS_MAX_CHUNK_ID ||
+		   tags.obj_id == YAFFS_OBJECTID_SUMMARY ||
+		   (tags.chunk_id > 0 &&
+		     tags.n_bytes > dev->data_bytes_per_chunk) ||
+		   tags.seq_number != bi->seq_number) {
+		yaffs_trace(YAFFS_TRACE_SCAN,
+			"Chunk (%d:%d) with bad tags:obj = %d, chunk_id = %d, n_bytes = %d, ignored",
+			blk, chunk_in_block, tags.obj_id,
+			tags.chunk_id, tags.n_bytes);
+		dev->n_free_chunks++;
+	} else if (tags.chunk_id > 0) {
+		/* chunk_id > 0 so it is a data chunk... */
+		unsigned int endpos;
+		u32 chunk_base = (tags.chunk_id - 1) *
+					dev->data_bytes_per_chunk;
+
+		*found_chunks = 1;
+
+		yaffs_set_chunk_bit(dev, blk, chunk_in_block);
+		bi->pages_in_use++;
+
+		in = yaffs_find_or_create_by_number(dev,
+					tags.obj_id,
+					YAFFS_OBJECT_TYPE_FILE);
+		if (!in)
+			/* Out of memory */
+			alloc_failed = 1;
+
+		if (in &&
+		    in->variant_type == YAFFS_OBJECT_TYPE_FILE &&
+		    chunk_base < in->variant.file_variant.shrink_size) {
+			/* This has not been invalidated by
+			 * a resize */
+			if (!yaffs_put_chunk_in_file(in, tags.chunk_id,
+								chunk, -1))
+				alloc_failed = 1;
+
+			/* File size is calculated by looking at
+			 * the data chunks if we have not
+			 * seen an object header yet.
+			 * Stop this practice once we find an
+			 * object header.
+			 */
+			endpos = chunk_base + tags.n_bytes;
+
+			if (!in->valid &&
+			    in->variant.file_variant.scanned_size < endpos) {
+				in->variant.file_variant.
+				    scanned_size = endpos;
+				in->variant.file_variant.
+				    file_size = endpos;
+			}
+		} else if (in) {
+			/* This chunk has been invalidated by a
+			 * resize, or a past file deletion
+			 * so delete the chunk*/
+			yaffs_chunk_del(dev, chunk, 1, __LINE__);
+		}
+	} else {
+		/* chunk_id == 0, so it is an ObjectHeader.
+		 * Thus, we read in the object header and make
+		 * the object
+		 */
+		*found_chunks = 1;
+
+		yaffs_set_chunk_bit(dev, blk, chunk_in_block);
+		bi->pages_in_use++;
+
+		oh = NULL;
+		in = NULL;
+
+		if (tags.extra_available) {
+			in = yaffs_find_or_create_by_number(dev,
+					tags.obj_id,
+					tags.extra_obj_type);
+			if (!in)
+				alloc_failed = 1;
+		}
+
+		if (!in ||
+		    (!in->valid && dev->param.disable_lazy_load) ||
+		    tags.extra_shadows ||
+		    (!in->valid && (tags.obj_id == YAFFS_OBJECTID_ROOT ||
+				 tags.obj_id == YAFFS_OBJECTID_LOSTNFOUND))) {
+
+			/* If we don't have  valid info then we
+			 * need to read the chunk
+			 * TODO In future we can probably defer
+			 * reading the chunk and living with
+			 * invalid data until needed.
+			 */
+
+			result = yaffs_rd_chunk_tags_nand(dev,
+						  chunk,
+						  chunk_data,
+						  NULL);
+
+			oh = (struct yaffs_obj_hdr *)chunk_data;
+
+			if (dev->param.inband_tags) {
+				/* Fix up the header if they got
+				 * corrupted by inband tags */
+				oh->shadows_obj =
+				    oh->inband_shadowed_obj_id;
+				oh->is_shrink =
+				    oh->inband_is_shrink;
+			}
+
+			if (!in) {
+				in = yaffs_find_or_create_by_number(dev,
+							tags.obj_id, oh->type);
+				if (!in)
+					alloc_failed = 1;
+			}
+		}
+
+		if (!in) {
+			/* TODO Hoosterman we have a problem! */
+			yaffs_trace(YAFFS_TRACE_ERROR,
+				"yaffs tragedy: Could not make object for object  %d at chunk %d during scan",
+				tags.obj_id, chunk);
+			return YAFFS_FAIL;
+		}
+
+		if (in->valid) {
+			/* We have already filled this one.
+			 * We have a duplicate that will be
+			 * discarded, but we first have to suck
+			 * out resize info if it is a file.
+			 */
+			if ((in->variant_type == YAFFS_OBJECT_TYPE_FILE) &&
+				((oh && oh->type == YAFFS_OBJECT_TYPE_FILE) ||
+				 (tags.extra_available &&
+				  tags.extra_obj_type == YAFFS_OBJECT_TYPE_FILE)
+				)) {
+				u32 this_size = (oh) ?
+					oh->file_size :
+					tags.extra_length;
+				u32 parent_obj_id = (oh) ?
+					oh->parent_obj_id :
+					tags.extra_parent_id;
+
+				is_shrink = (oh) ?
+					oh->is_shrink :
+					tags.extra_is_shrink;
+
+				/* If it is deleted (unlinked
+				 * at start also means deleted)
+				 * we treat the file size as
+				 * being zeroed at this point.
+				 */
+				if (parent_obj_id == YAFFS_OBJECTID_DELETED ||
+				    parent_obj_id == YAFFS_OBJECTID_UNLINKED) {
+					this_size = 0;
+					is_shrink = 1;
+				}
+
+				if (is_shrink &&
+				    in->variant.file_variant.shrink_size >
+				    this_size)
+					in->variant.file_variant.shrink_size =
+					this_size;
+
+				if (is_shrink)
+					bi->has_shrink_hdr = 1;
+			}
+			/* Use existing - destroy this one. */
+			yaffs_chunk_del(dev, chunk, 1, __LINE__);
+		}
+
+		if (!in->valid && in->variant_type !=
+		    (oh ? oh->type : tags.extra_obj_type))
+			yaffs_trace(YAFFS_TRACE_ERROR,
+				"yaffs tragedy: Bad object type, %d != %d, for object %d at chunk %d during scan",
+				oh ? oh->type : tags.extra_obj_type,
+				in->variant_type, tags.obj_id,
+				chunk);
+
+		if (!in->valid &&
+		    (tags.obj_id == YAFFS_OBJECTID_ROOT ||
+		     tags.obj_id == YAFFS_OBJECTID_LOSTNFOUND)) {
+			/* We only load some info, don't fiddle
+			 * with directory structure */
+			in->valid = 1;
+
+			if (oh) {
+				in->yst_mode = oh->yst_mode;
+				yaffs_load_attribs(in, oh);
+				in->lazy_loaded = 0;
+			} else {
+				in->lazy_loaded = 1;
+			}
+			in->hdr_chunk = chunk;
+
+		} else if (!in->valid) {
+			/* we need to load this info */
+			in->valid = 1;
+			in->hdr_chunk = chunk;
+			if (oh) {
+				in->variant_type = oh->type;
+				in->yst_mode = oh->yst_mode;
+				yaffs_load_attribs(in, oh);
+
+				if (oh->shadows_obj > 0)
+					yaffs_handle_shadowed_obj(dev,
+					     oh->shadows_obj, 1);
+
+				yaffs_set_obj_name_from_oh(in, oh);
+				parent = yaffs_find_or_create_by_number(dev,
+						oh->parent_obj_id,
+						YAFFS_OBJECT_TYPE_DIRECTORY);
+				file_size = oh->file_size;
+				is_shrink = oh->is_shrink;
+				equiv_id = oh->equiv_id;
+			} else {
+				in->variant_type = tags.extra_obj_type;
+				parent = yaffs_find_or_create_by_number(dev,
+						tags.extra_parent_id,
+						YAFFS_OBJECT_TYPE_DIRECTORY);
+				file_size = tags.extra_length;
+				is_shrink = tags.extra_is_shrink;
+				equiv_id = tags.extra_equiv_id;
+				in->lazy_loaded = 1;
+			}
+			in->dirty = 0;
+
+			if (!parent)
+				alloc_failed = 1;
+
+			/* directory stuff...
+			 * hook up to parent
+			 */
+
+			if (parent &&
+			    parent->variant_type == YAFFS_OBJECT_TYPE_UNKNOWN) {
+				/* Set up as a directory */
+				parent->variant_type =
+					YAFFS_OBJECT_TYPE_DIRECTORY;
+				INIT_LIST_HEAD(&parent->
+						variant.dir_variant.children);
+			} else if (!parent ||
+				   parent->variant_type !=
+					YAFFS_OBJECT_TYPE_DIRECTORY) {
+				/* Hoosterman, another problem....
+				 * Trying to use a non-directory as a directory
+				 */
+
+				yaffs_trace(YAFFS_TRACE_ERROR,
+					"yaffs tragedy: attempting to use non-directory as a directory in scan. Put in lost+found."
+					);
+				parent = dev->lost_n_found;
+			}
+			yaffs_add_obj_to_dir(parent, in);
+
+			is_unlinked = (parent == dev->del_dir) ||
+					(parent == dev->unlinked_dir);
+
+			if (is_shrink)
+				/* Mark the block */
+				bi->has_shrink_hdr = 1;
+
+			/* Note re hardlinks.
+			 * Since we might scan a hardlink before its equivalent
+			 * object is scanned we put them all in a list.
+			 * After scanning is complete, we should have all the
+			 * objects, so we run through this list and fix up all
+			 * the chains.
+			 */
+
+			switch (in->variant_type) {
+			case YAFFS_OBJECT_TYPE_UNKNOWN:
+				/* Todo got a problem */
+				break;
+			case YAFFS_OBJECT_TYPE_FILE:
+				file_var = &in->variant.file_variant;
+				if (file_var->scanned_size < file_size) {
+					/* This covers the case where the file
+					 * size is greater than the data held.
+					 * This will happen if the file is
+					 * resized to be larger than its
+					 * current data extents.
+					 */
+					file_var->file_size = file_size;
+					file_var->scanned_size = file_size;
+				}
+
+				if (file_var->shrink_size > file_size)
+					file_var->shrink_size = file_size;
+
+				break;
+			case YAFFS_OBJECT_TYPE_HARDLINK:
+				hl_var = &in->variant.hardlink_variant;
+				if (!is_unlinked) {
+					hl_var->equiv_id = equiv_id;
+					list_add(&in->hard_links, hard_list);
+				}
+				break;
+			case YAFFS_OBJECT_TYPE_DIRECTORY:
+				/* Do nothing */
+				break;
+			case YAFFS_OBJECT_TYPE_SPECIAL:
+				/* Do nothing */
+				break;
+			case YAFFS_OBJECT_TYPE_SYMLINK:
+				sl_var = &in->variant.symlink_variant;
+				if (oh) {
+					sl_var->alias =
+					    yaffs_clone_str(oh->alias);
+					if (!sl_var->alias)
+						alloc_failed = 1;
+				}
+				break;
+			}
+		}
+	}
+	return alloc_failed ? YAFFS_FAIL : YAFFS_OK;
+}
+
+int yaffs2_scan_backwards(struct yaffs_dev *dev)
+{
+	int blk;
+	int block_iter;
+	int start_iter;
+	int end_iter;
+	int n_to_scan = 0;
+	enum yaffs_block_state state;
+	int c;
+	int deleted;
+	LIST_HEAD(hard_list);
+	struct yaffs_block_info *bi;
+	u32 seq_number;
+	int n_blocks = dev->internal_end_block - dev->internal_start_block + 1;
+	u8 *chunk_data;
+	int found_chunks;
+	int alloc_failed = 0;
+	struct yaffs_block_index *block_index = NULL;
+	int alt_block_index = 0;
+	int summary_available;
+
+	yaffs_trace(YAFFS_TRACE_SCAN,
+		"yaffs2_scan_backwards starts  intstartblk %d intendblk %d...",
+		dev->internal_start_block, dev->internal_end_block);
+
+	dev->seq_number = YAFFS_LOWEST_SEQUENCE_NUMBER;
+
+	block_index =
+		kmalloc(n_blocks * sizeof(struct yaffs_block_index), GFP_NOFS);
+
+	if (!block_index) {
+		block_index =
+		    vmalloc(n_blocks * sizeof(struct yaffs_block_index));
+		alt_block_index = 1;
+	}
+
+	if (!block_index) {
+		yaffs_trace(YAFFS_TRACE_SCAN,
+			"yaffs2_scan_backwards() could not allocate block index!"
+			);
+		return YAFFS_FAIL;
+	}
+
+	dev->blocks_in_checkpt = 0;
+
+	chunk_data = yaffs_get_temp_buffer(dev);
+
+	/* Scan all the blocks to determine their state */
+	bi = dev->block_info;
+	for (blk = dev->internal_start_block; blk <= dev->internal_end_block;
+	     blk++) {
+		yaffs_clear_chunk_bits(dev, blk);
+		bi->pages_in_use = 0;
+		bi->soft_del_pages = 0;
+
+		yaffs_query_init_block_state(dev, blk, &state, &seq_number);
+
+		bi->block_state = state;
+		bi->seq_number = seq_number;
+
+		if (bi->seq_number == YAFFS_SEQUENCE_CHECKPOINT_DATA)
+			bi->block_state = YAFFS_BLOCK_STATE_CHECKPOINT;
+		if (bi->seq_number == YAFFS_SEQUENCE_BAD_BLOCK)
+			bi->block_state = YAFFS_BLOCK_STATE_DEAD;
+
+		yaffs_trace(YAFFS_TRACE_SCAN_DEBUG,
+			"Block scanning block %d state %d seq %d",
+			blk, bi->block_state, seq_number);
+
+		if (bi->block_state == YAFFS_BLOCK_STATE_CHECKPOINT) {
+			dev->blocks_in_checkpt++;
+
+		} else if (bi->block_state == YAFFS_BLOCK_STATE_DEAD) {
+			yaffs_trace(YAFFS_TRACE_BAD_BLOCKS,
+				"block %d is bad", blk);
+		} else if (bi->block_state == YAFFS_BLOCK_STATE_EMPTY) {
+			yaffs_trace(YAFFS_TRACE_SCAN_DEBUG, "Block empty ");
+			dev->n_erased_blocks++;
+			dev->n_free_chunks += dev->param.chunks_per_block;
+		} else if (bi->block_state ==
+				YAFFS_BLOCK_STATE_NEEDS_SCAN) {
+			/* Determine the highest sequence number */
+			if (seq_number >= YAFFS_LOWEST_SEQUENCE_NUMBER &&
+			    seq_number < YAFFS_HIGHEST_SEQUENCE_NUMBER) {
+				block_index[n_to_scan].seq = seq_number;
+				block_index[n_to_scan].block = blk;
+				n_to_scan++;
+				if (seq_number >= dev->seq_number)
+					dev->seq_number = seq_number;
+			} else {
+				/* TODO: Nasty sequence number! */
+				yaffs_trace(YAFFS_TRACE_SCAN,
+					"Block scanning block %d has bad sequence number %d",
+					blk, seq_number);
+			}
+		}
+		bi++;
+	}
+
+	yaffs_trace(YAFFS_TRACE_SCAN, "%d blocks to be sorted...", n_to_scan);
+
+	cond_resched();
+
+	/* Sort the blocks by sequence number */
+	sort(block_index, n_to_scan, sizeof(struct yaffs_block_index),
+		   yaffs2_ybicmp, NULL);
+
+	cond_resched();
+
+	yaffs_trace(YAFFS_TRACE_SCAN, "...done");
+
+	/* Now scan the blocks looking at the data. */
+	start_iter = 0;
+	end_iter = n_to_scan - 1;
+	yaffs_trace(YAFFS_TRACE_SCAN_DEBUG, "%d blocks to scan", n_to_scan);
+
+	/* For each block.... backwards */
+	for (block_iter = end_iter;
+	     !alloc_failed && block_iter >= start_iter;
+	     block_iter--) {
+		/* Cooperative multitasking! This loop can run for so
+		   long that watchdog timers expire. */
+		cond_resched();
+
+		/* get the block to scan in the correct order */
+		blk = block_index[block_iter].block;
+		bi = yaffs_get_block_info(dev, blk);
+		deleted = 0;
+
+		summary_available = yaffs_summary_read(dev, dev->sum_tags, blk);
+
+		/* For each chunk in each block that needs scanning.... */
+		found_chunks = 0;
+		if(summary_available)
+			c = dev->chunks_per_summary - 1;
+		else
+			c = dev->param.chunks_per_block - 1;
+
+		for (/* c is already initialised */;
+		     !alloc_failed && c >= 0 &&
+		     (bi->block_state == YAFFS_BLOCK_STATE_NEEDS_SCAN ||
+		      bi->block_state == YAFFS_BLOCK_STATE_ALLOCATING);
+		      c--) {
+			/* Scan backwards...
+			 * Read the tags and decide what to do
+			 */
+			if (yaffs2_scan_chunk(dev, bi, blk, c,
+					&found_chunks, chunk_data,
+					&hard_list, summary_available) ==
+					YAFFS_FAIL)
+				alloc_failed = 1;
+		}
+
+		if (bi->block_state == YAFFS_BLOCK_STATE_NEEDS_SCAN) {
+			/* If we got this far while scanning, then the block
+			 * is fully allocated. */
+			bi->block_state = YAFFS_BLOCK_STATE_FULL;
+		}
+
+		/* Now let's see if it was dirty */
+		if (bi->pages_in_use == 0 &&
+		    !bi->has_shrink_hdr &&
+		    bi->block_state == YAFFS_BLOCK_STATE_FULL) {
+			yaffs_block_became_dirty(dev, blk);
+		}
+	}
+
+	yaffs_skip_rest_of_block(dev);
+
+	if (alt_block_index)
+		vfree(block_index);
+	else
+		kfree(block_index);
+
+	/* Ok, we've done all the scanning.
+	 * Fix up the hard link chains.
+	 * We have scanned all the objects, now it's time to add these
+	 * hardlinks.
+	 */
+	yaffs_link_fixup(dev, &hard_list);
+
+	yaffs_release_temp_buffer(dev, chunk_data);
+
+	if (alloc_failed)
+		return YAFFS_FAIL;
+
+	yaffs_trace(YAFFS_TRACE_SCAN, "yaffs2_scan_backwards ends");
+
+	return YAFFS_OK;
+}
diff -uNra linux-3.0.82/fs/yaffs2/yaffs_yaffs2.h linux-3.0.82x/fs/yaffs2/yaffs_yaffs2.h
--- linux-3.0.82/fs/yaffs2/yaffs_yaffs2.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yaffs_yaffs2.h	2017-09-23 03:42:50.314674158 +0800
@@ -0,0 +1,39 @@
+/*
+ * YAFFS: Yet another Flash File System . A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1 as
+ * published by the Free Software Foundation.
+ *
+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
+ */
+
+#ifndef __YAFFS_YAFFS2_H__
+#define __YAFFS_YAFFS2_H__
+
+#include "yaffs_guts.h"
+
+void yaffs_calc_oldest_dirty_seq(struct yaffs_dev *dev);
+void yaffs2_find_oldest_dirty_seq(struct yaffs_dev *dev);
+void yaffs2_clear_oldest_dirty_seq(struct yaffs_dev *dev,
+				   struct yaffs_block_info *bi);
+void yaffs2_update_oldest_dirty_seq(struct yaffs_dev *dev, unsigned block_no,
+				    struct yaffs_block_info *bi);
+int yaffs_block_ok_for_gc(struct yaffs_dev *dev, struct yaffs_block_info *bi);
+u32 yaffs2_find_refresh_block(struct yaffs_dev *dev);
+int yaffs2_checkpt_required(struct yaffs_dev *dev);
+int yaffs_calc_checkpt_blocks_required(struct yaffs_dev *dev);
+
+void yaffs2_checkpt_invalidate(struct yaffs_dev *dev);
+int yaffs2_checkpt_save(struct yaffs_dev *dev);
+int yaffs2_checkpt_restore(struct yaffs_dev *dev);
+
+int yaffs2_handle_hole(struct yaffs_obj *obj, loff_t new_size);
+int yaffs2_scan_backwards(struct yaffs_dev *dev);
+
+#endif
diff -uNra linux-3.0.82/fs/yaffs2/yportenv.h linux-3.0.82x/fs/yaffs2/yportenv.h
--- linux-3.0.82/fs/yaffs2/yportenv.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/fs/yaffs2/yportenv.h	2017-09-23 03:42:50.314674158 +0800
@@ -0,0 +1,82 @@
+/*
+ * YAFFS: Yet another Flash File System . A NAND-flash specific file system.
+ *
+ * Copyright (C) 2002-2011 Aleph One Ltd.
+ *   for Toby Churchill Ltd and Brightstar Engineering
+ *
+ * Created by Charles Manning <charles@aleph1.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1 as
+ * published by the Free Software Foundation.
+ *
+ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
+ */
+
+#ifndef __YPORTENV_H__
+#define __YPORTENV_H__
+
+/*
+ * Define the MTD version in terms of Linux Kernel versions
+ * This allows yaffs to be used independantly of the kernel
+ * as well as with it.
+ */
+
+#define MTD_VERSION(a, b, c) (((a) << 16) + ((b) << 8) + (c))
+
+#ifdef YAFFS_OUT_OF_TREE
+#include "moduleconfig.h"
+#endif
+
+#include <linux/version.h>
+#define MTD_VERSION_CODE LINUX_VERSION_CODE
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19))
+#include <linux/config.h>
+#endif
+#include <linux/version.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/string.h>
+#include <linux/slab.h>
+#include <linux/vmalloc.h>
+#include <linux/xattr.h>
+#include <linux/list.h>
+#include <linux/types.h>
+#include <linux/fs.h>
+#include <linux/stat.h>
+#include <linux/sort.h>
+#include <linux/bitops.h>
+
+/*  These type wrappings are used to support Unicode names in WinCE. */
+#define YCHAR char
+#define YUCHAR unsigned char
+#define _Y(x)     x
+
+#define YAFFS_LOSTNFOUND_NAME		"lost+found"
+#define YAFFS_LOSTNFOUND_PREFIX		"obj"
+
+
+#define YAFFS_ROOT_MODE			0755
+#define YAFFS_LOSTNFOUND_MODE		0700
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0))
+#define Y_CURRENT_TIME CURRENT_TIME.tv_sec
+#define Y_TIME_CONVERT(x) (x).tv_sec
+#else
+#define Y_CURRENT_TIME CURRENT_TIME
+#define Y_TIME_CONVERT(x) (x)
+#endif
+
+#define compile_time_assertion(assertion) \
+	({ int x = __builtin_choose_expr(assertion, 0, (void)0); (void) x; })
+
+
+#define yaffs_trace(msk, fmt, ...) do { \
+	if (yaffs_trace_mask & (msk)) \
+		printk(KERN_DEBUG "yaffs: " fmt "\n", ##__VA_ARGS__); \
+} while (0)
+
+
+#endif
diff -uNra linux-3.0.82/.gitignore linux-3.0.82x/.gitignore
--- linux-3.0.82/.gitignore	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/.gitignore	2017-09-23 03:42:50.314674158 +0800
@@ -10,6 +10,7 @@
 # Normal rules
 #
 .*
+!.config
 *.o
 *.o.*
 *.a
diff -uNra linux-3.0.82/include/config/auto.conf linux-3.0.82x/include/config/auto.conf
--- linux-3.0.82/include/config/auto.conf	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/include/config/auto.conf	2017-09-23 03:42:50.314674158 +0800
@@ -0,0 +1,482 @@
+#
+# Automatically generated make config: don't edit
+# Linux/mips 3.0.82 Kernel Configuration
+#
+CONFIG_SCSI_DMA=y
+CONFIG_TCP_MD5SIG=y
+CONFIG_KERNEL_GZIP=y
+CONFIG_CRC32=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_IR_JVC_DECODER=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_FLATMEM_MANUAL=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+CONFIG_EXT3_DEFAULTS_TO_ORDERED=y
+CONFIG_INOTIFY_USER=y
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NET_ETHERNET=y
+CONFIG_EXPERIMENTAL=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
+CONFIG_RC_CORE=y
+CONFIG_TCP_CONG_HTCP=y
+CONFIG_BINFMT_MISC=y
+CONFIG_SSB_POSSIBLE=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+CONFIG_FSNOTIFY=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_NETDEV_1000=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+CONFIG_UEVENT_HELPER_PATH="/sbin/mdev"
+CONFIG_DEVTMPFS=y
+CONFIG_PNFS_FILE_LAYOUT=y
+CONFIG_NFSD_DEPRECATED=y
+CONFIG_IR_NEC_DECODER=y
+CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
+CONFIG_BLK_DEV_BSG=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_MSDOS_FS=y
+CONFIG_USB_GADGET_SNPS_DWC_OTG=y
+CONFIG_CAN=y
+CONFIG_SERIAL_8250=y
+CONFIG_VIDEO_IR_I2C=y
+CONFIG_NFSD=y
+CONFIG_USB=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+CONFIG_MIPS_MT_DISABLED=y
+CONFIG_CRC_ITU_T=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_LS1B_SPI=y
+CONFIG_BCMA_POSSIBLE=y
+CONFIG_FORCE_MAX_ZONEORDER=12
+CONFIG_SND_SOC=y
+CONFIG_MEDIA_TUNER_XC5000=m
+CONFIG_PRINTK=y
+CONFIG_USB_OTG_WHITELIST=y
+CONFIG_TIMERFD=y
+CONFIG_MTD_CFI_I2=y
+CONFIG_CEVT_R4K_LIB=y
+CONFIG_SHMEM=y
+CONFIG_MTD=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_DNOTIFY=y
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_MTD_NAND_IDS=y
+CONFIG_EXPORTFS=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SUNRPC_GSS=y
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_SND_OSSEMUL=y
+CONFIG_USB_OTG=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_CRC_T10DIF=y
+CONFIG_MEDIA_TUNER_QT1010=m
+CONFIG_LOGO_LINUX_CLUT224=y
+CONFIG_IP_PNP=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_PAGE_SIZE_4KB=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_USB_DEVICE_CLASS=y
+CONFIG_LOCKD=y
+CONFIG_SOUND_OSS_CORE=y
+CONFIG_STE10XP=y
+CONFIG_CPU_HAS_SYNC=y
+CONFIG_MEDIA_TUNER_MAX2165=m
+CONFIG_LOGO=y
+CONFIG_USB_STORAGE=y
+CONFIG_STANDALONE=y
+CONFIG_MIPS=y
+CONFIG_IR_LIRC_CODEC=y
+CONFIG_BLOCK=y
+CONFIG_HAVE_IDE=y
+CONFIG_MEDIA_TUNER_TDA827X=m
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_GENERIC_GPIO=y
+CONFIG_ROOT_NFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_BUG=y
+CONFIG_SPI=y
+CONFIG_NTFS_RW=y
+CONFIG_VT=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_V4L_USB_DRIVERS=y
+CONFIG_NLS=y
+CONFIG_SPI_SPIDEV=y
+CONFIG_SYS_HAS_CPU_LOONGSON1C=y
+CONFIG_SYN_COOKIES=y
+CONFIG_SPI_BITBANG=y
+CONFIG_MEDIA_TUNER_TDA18271=m
+CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
+CONFIG_LS1B_SPI0=y
+CONFIG_PREEMPT_VOLUNTARY=y
+CONFIG_CRYPTO_WORKQUEUE=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_CAN_CALC_BITTIMING=y
+CONFIG_SND_PCM_OSS=y
+CONFIG_NETDEVICES=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_INITRAMFS_ROOT_GID=0
+CONFIG_EVENTFD=y
+CONFIG_FS_POSIX_ACL=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_LOONGSON_GMAC=y
+CONFIG_MACH_LOONGSON=y
+CONFIG_LS1X_FB0=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_JUMP_LABEL=y
+CONFIG_IR_RC5_SZ_DECODER=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
+CONFIG_SCSI_WAIT_SCAN=m
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_CEVT_R4K=y
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_DEFAULT_CFQ=y
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_EXT3_FS=y
+CONFIG_FAT_FS=y
+CONFIG_CPU_SUPPORTS_CPUFREQ=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_I2C_LS1X=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_GSPCA=m
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_TCP_CONG_ADVANCED=y
+CONFIG_SND_USB=y
+CONFIG_RD_GZIP=y
+CONFIG_CRYPTO_MD5=y
+CONFIG_SOC_CAMERA_OV9650=y
+CONFIG_MEDIA_TUNER_TEA5767=m
+CONFIG_HAVE_GENERIC_HARDIRQS=y
+CONFIG_BINFMT_ELF=y
+CONFIG_SCSI_PROC_FS=y
+CONFIG_HOTPLUG=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_SLABINFO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_SPI_MASTER=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_TMPFS=y
+CONFIG_ANON_INODES=y
+CONFIG_NLS_CODEPAGE_936=y
+CONFIG_FUTEX=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_CPU_LS232=y
+CONFIG_SLUB_DEBUG=y
+CONFIG_CRYPTO_ZLIB=y
+CONFIG_SYSVIPC=y
+CONFIG_CRYPTO_PCOMP2=y
+CONFIG_MODULES=y
+CONFIG_USB_GADGET=y
+CONFIG_MEDIA_TUNER_MXL5005S=m
+CONFIG_GPIO_LS1C=y
+CONFIG_SOUND=y
+CONFIG_MEDIA_TUNER_TDA9887=m
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_UNIX=y
+CONFIG_YAFFS_YAFFS1=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_USB_OHCI_HCD_LS1X=y
+CONFIG_CPU_HAS_WB=y
+CONFIG_DEFAULT_HOSTNAME="loongson"
+CONFIG_NFS_FS=y
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_MEDIA_TUNER=y
+CONFIG_MEDIA_TUNER_SIMPLE=m
+CONFIG_MTD_CFI_I1=y
+CONFIG_BLK_DEV_INTEGRITY=y
+CONFIG_NFS_COMMON=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_LOG_BUF_SHIFT=17
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
+CONFIG_SND_MIPS=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_VFAT_FS=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_MEDIA_TUNER_CUSTOMISE=y
+CONFIG_TRAD_SIGNALS=y
+CONFIG_MEDIA_TUNER_XC2028=m
+CONFIG_SOC_CAMERA=y
+CONFIG_MTD_NAND_ECC=y
+CONFIG_MEDIA_CONTROLLER=y
+CONFIG_SERIAL_8250_RUNTIME_UARTS=6
+CONFIG_FS_MBCACHE=y
+CONFIG_RTC_CLASS=y
+CONFIG_CRC7=y
+CONFIG_TMPFS_XATTR=y
+CONFIG_INITRAMFS_ROOT_UID=0
+CONFIG_YAFFS_AUTO_YAFFS2=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_CRYPTO_MANAGER2=y
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_SLUB=y
+CONFIG_CONFIGFS_FS=y
+CONFIG_I2C=y
+CONFIG_CRYPTO_ECB=y
+CONFIG_MTD_NAND_LS1X=y
+CONFIG_BASE_FULL=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_SUNRPC=y
+CONFIG_YAFFS_FS=y
+CONFIG_LS1X_GMAC0_RMII=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_KALLSYMS=y
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+CONFIG_MII=y
+CONFIG_SIGNALFD=y
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CSRC_R4K=y
+CONFIG_CSRC_R4K_LIB=y
+CONFIG_LOCKD_V4=y
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_HAS_IOMEM=y
+CONFIG_SOC_CAMERA_LS1C=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_SYS_SUPPORTS_ZBOOT=y
+CONFIG_PROC_KCORE=y
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_EPOLL=y
+CONFIG_SND_PCM=y
+CONFIG_YAFFS_XATTR=y
+CONFIG_IR_SONY_DECODER=y
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_NET=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_SND_JACK=y
+CONFIG_PACKET=y
+CONFIG_NFS_V3=y
+CONFIG_INET=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_RTC_LIB=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_CRYPTO_AES=y
+CONFIG_GPIOLIB=y
+CONFIG_LIRC=y
+CONFIG_IP_MROUTE=y
+CONFIG_32BIT=y
+CONFIG_SND_DRIVERS=y
+CONFIG_MEDIA_TUNER_MT2266=m
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_VIDEO_CAPTURE_DRIVERS=y
+CONFIG_SND_PCM_OSS_PLUGINS=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_FONT_8x8=y
+CONFIG_LOONGSON_UART_BASE=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_NEED_PER_CPU_KM=y
+CONFIG_TCP_CONG_WESTWOOD=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_CRYPTO_SHA256=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HW_CONSOLE=y
+CONFIG_SND_SPI=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_GENERIC_ACL=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_LOCALVERSION=""
+CONFIG_RADIO_ADAPTERS=y
+CONFIG_CAN_RAW=y
+CONFIG_CRYPTO=y
+CONFIG_SCHED_DEBUG=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
+CONFIG_MEDIA_TUNER_TDA18218=m
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_DEFAULT_CUBIC=y
+CONFIG_IP_PIMSM_V2=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_SCSI_MOD=y
+CONFIG_SERIAL_CORE=y
+CONFIG_EMBEDDED=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_VIDEO_DEV=y
+CONFIG_NFS_V4=y
+CONFIG_INLINE_READ_UNLOCK=y
+CONFIG_SOUND_PRIME=y
+CONFIG_HAS_DMA=y
+CONFIG_SCSI=y
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FONT_8x16=y
+CONFIG_MEDIA_TUNER_TDA8290=m
+CONFIG_MEDIA_TUNER_TDA18212=m
+CONFIG_PHYLIB=y
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_MEDIA_TUNER_MT20XX=m
+CONFIG_MISC_FILESYSTEMS=y
+CONFIG_INLINE_READ_UNLOCK_IRQ=y
+CONFIG_REALTEK_PHY=y
+CONFIG_MEDIA_TUNER_MC44S803=m
+CONFIG_SND_VERBOSE_PROCFS=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_YAFFS_YAFFS2=y
+CONFIG_CRYPTO_ARC4=y
+CONFIG_BOOT_ELF32=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_MTD_NAND=y
+CONFIG_RT_MUTEXES=y
+CONFIG_MEDIA_TUNER_MXL5007T=m
+CONFIG_EXPERT=y
+CONFIG_HZ_250=y
+CONFIG_PERF_USE_VMALLOC=y
+CONFIG_FAT_DEFAULT_IOCHARSET="cp936"
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_FRAME_WARN=1024
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_INITRAMFS_SOURCE="./ramdisk.cpio"
+CONFIG_SYS_SUPPORTS_HIGHMEM=y
+CONFIG_NFS_USE_LEGACY_DNS=y
+CONFIG_INLINE_SPIN_UNLOCK=y
+CONFIG_HAS_IOPORT=y
+CONFIG_VIDEOBUF_DMA_CONTIG=y
+CONFIG_DCB=y
+CONFIG_HZ=250
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
+CONFIG_SERIAL_8250_NR_UARTS=6
+CONFIG_SOUND_LS1X_UDA1342=y
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_NLATTR=y
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SYSFS=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
+CONFIG_FB=y
+CONFIG_I2C_COMPAT=y
+CONFIG_LS1C_MACH=y
+CONFIG_MSDOS_PARTITION=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_FB_LOONGSON1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_VIDEO_MEDIA=y
+CONFIG_IP_MULTICAST=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_TICK_ONESHOT=y
+CONFIG_CPU_LOONGSON1C=y
+CONFIG_MEDIA_TUNER_MT2060=m
+CONFIG_TINY_RCU=y
+CONFIG_MODVERSIONS=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_VIDEOBUF2_CORE=y
+CONFIG_NTFS_FS=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+CONFIG_BASE_SMALL=0
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_PROC_FS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_RC_MAP=y
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_SND=y
+CONFIG_FLATMEM=y
+CONFIG_IR_RC6_DECODER=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_IKCONFIG=y
+CONFIG_INITRAMFS_COMPRESSION_NONE=y
+CONFIG_SYSCTL=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_MEDIA_TUNER_MT2131=m
+CONFIG_TCP_CONG_BIC=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_CRAMFS=y
+CONFIG_SND_TIMER=y
+CONFIG_USB_EHCI_TT_NEWSCHED=y
+CONFIG_FAT_DEFAULT_CODEPAGE=936
+CONFIG_BLK_DEV=y
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_TRACING_SUPPORT=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_JBD=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_USB_SUPPORT=y
+CONFIG_INPUT_POLLDEV=y
+CONFIG_MTD_CHAR=y
+CONFIG_INET_LRO=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_VT_CONSOLE=y
+CONFIG_IR_RC5_DECODER=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+CONFIG_IRQ_CPU=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VIDEOBUF_GEN=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_VIDEO_V4L2=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_YAFFS_DISABLE_TAGS_ECC=y
+CONFIG_CROSS_COMPILE=""
+CONFIG_MEDIA_TUNER_TEA5761=m
+CONFIG_USB_GADGET_SELECTED=y
+CONFIG_NETWORK_SECMARK=y
+CONFIG_NFS_V4_1=y
+CONFIG_CAN_DEV=y
+CONFIG_LS1X_GMAC0=y
+CONFIG_CRC_CCITT=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_AVERAGE=y
+CONFIG_BITREVERSE=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_VIDEO_V4L2_COMMON=y
+CONFIG_USB_DWC_OTG_LPM=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_FILE_LOCKING=y
+CONFIG_SND_SOC_I2C_AND_SPI=y
+CONFIG_USB_EHCI_HCD_LS1X=y
+CONFIG_AIO=y
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_RTC_INTF_DEV=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_NLS_DEFAULT="cp936"
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_DEBUG_INFO=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_INPUT=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_MMU=y
+CONFIG_HAVE_IRQ_WORK=y
+CONFIG_INLINE_WRITE_UNLOCK=y
diff -uNra linux-3.0.82/include/config/auto.conf.cmd linux-3.0.82x/include/config/auto.conf.cmd
--- linux-3.0.82/include/config/auto.conf.cmd	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/include/config/auto.conf.cmd	2017-09-23 03:42:50.314674158 +0800
@@ -0,0 +1,631 @@
+deps_config := \
+	lib/xz/Kconfig \
+	lib/Kconfig \
+	drivers/virtio/Kconfig \
+	drivers/crypto/caam/Kconfig \
+	drivers/crypto/Kconfig \
+	crypto/async_tx/Kconfig \
+	crypto/Kconfig \
+	security/integrity/ima/Kconfig \
+	security/apparmor/Kconfig \
+	security/tomoyo/Kconfig \
+	security/smack/Kconfig \
+	security/selinux/Kconfig \
+	security/Kconfig \
+	lib/Kconfig.kmemcheck \
+	lib/Kconfig.kgdb \
+	samples/Kconfig \
+	kernel/trace/Kconfig \
+	mm/Kconfig.debug \
+	lib/Kconfig.debug \
+	arch/mips/Kconfig.debug \
+	fs/dlm/Kconfig \
+	fs/nls/Kconfig \
+	fs/partitions/Kconfig \
+	fs/9p/Kconfig \
+	fs/afs/Kconfig \
+	fs/coda/Kconfig \
+	fs/ncpfs/Kconfig \
+	fs/cifs/Kconfig \
+	fs/ceph/Kconfig \
+	net/sunrpc/Kconfig \
+	fs/nfsd/Kconfig \
+	fs/nfs/Kconfig \
+	fs/exofs/Kconfig \
+	fs/ufs/Kconfig \
+	fs/sysv/Kconfig \
+	fs/pstore/Kconfig \
+	fs/romfs/Kconfig \
+	fs/qnx4/Kconfig \
+	fs/hpfs/Kconfig \
+	fs/omfs/Kconfig \
+	fs/minix/Kconfig \
+	fs/freevxfs/Kconfig \
+	fs/squashfs/Kconfig \
+	fs/cramfs/Kconfig \
+	fs/logfs/Kconfig \
+	fs/ubifs/Kconfig \
+	fs/jffs2/Kconfig \
+	fs/yaffs2/Kconfig \
+	fs/efs/Kconfig \
+	fs/bfs/Kconfig \
+	fs/befs/Kconfig \
+	fs/hfsplus/Kconfig \
+	fs/hfs/Kconfig \
+	fs/ecryptfs/Kconfig \
+	fs/affs/Kconfig \
+	fs/adfs/Kconfig \
+	fs/configfs/Kconfig \
+	fs/sysfs/Kconfig \
+	fs/proc/Kconfig \
+	fs/ntfs/Kconfig \
+	fs/fat/Kconfig \
+	fs/udf/Kconfig \
+	fs/isofs/Kconfig \
+	fs/cachefiles/Kconfig \
+	fs/fscache/Kconfig \
+	fs/fuse/Kconfig \
+	fs/autofs4/Kconfig \
+	fs/quota/Kconfig \
+	fs/notify/fanotify/Kconfig \
+	fs/notify/inotify/Kconfig \
+	fs/notify/dnotify/Kconfig \
+	fs/notify/Kconfig \
+	fs/nilfs2/Kconfig \
+	fs/btrfs/Kconfig \
+	fs/ocfs2/Kconfig \
+	fs/gfs2/Kconfig \
+	fs/xfs/Kconfig \
+	fs/jfs/Kconfig \
+	fs/reiserfs/Kconfig \
+	fs/jbd2/Kconfig \
+	fs/jbd/Kconfig \
+	fs/ext4/Kconfig \
+	fs/ext3/Kconfig \
+	fs/ext2/Kconfig \
+	fs/Kconfig \
+	drivers/clocksource/Kconfig \
+	drivers/hwspinlock/Kconfig \
+	drivers/clk/Kconfig \
+	drivers/platform/x86/Kconfig \
+	drivers/platform/Kconfig \
+	drivers/staging/nvec/Kconfig \
+	drivers/staging/mei/Kconfig \
+	drivers/staging/altera-stapl/Kconfig \
+	drivers/staging/gma500/Kconfig \
+	drivers/staging/ste_rmi4/Kconfig \
+	drivers/staging/cptm1217/Kconfig \
+	drivers/staging/speakup/Kconfig \
+	drivers/staging/intel_sst/Kconfig \
+	drivers/staging/ft1000/Kconfig \
+	drivers/staging/bcm/Kconfig \
+	drivers/staging/keucr/Kconfig \
+	drivers/staging/ath6kl/Kconfig \
+	drivers/staging/sbe-2t3e3/Kconfig \
+	drivers/staging/westbridge/astoria/gadget/Kconfig \
+	drivers/staging/westbridge/astoria/block/Kconfig \
+	drivers/staging/westbridge/astoria/device/Kconfig \
+	drivers/staging/westbridge/astoria/Kconfig \
+	drivers/staging/westbridge/Kconfig \
+	drivers/staging/quickstart/Kconfig \
+	drivers/staging/tidspbridge/Kconfig \
+	drivers/staging/solo6x10/Kconfig \
+	drivers/staging/easycap/Kconfig \
+	drivers/staging/lirc/Kconfig \
+	drivers/staging/msm/Kconfig \
+	drivers/staging/xgifb/Kconfig \
+	drivers/staging/cxt1e1/Kconfig \
+	drivers/staging/crystalhd/Kconfig \
+	drivers/staging/dt3155v4l/Kconfig \
+	drivers/staging/sm7xx/Kconfig \
+	drivers/staging/wlags49_h25/Kconfig \
+	drivers/staging/wlags49_h2/Kconfig \
+	drivers/staging/zcache/Kconfig \
+	drivers/staging/zram/Kconfig \
+	drivers/staging/cs5535_gpio/Kconfig \
+	drivers/staging/iio/trigger/Kconfig \
+	drivers/staging/iio/resolver/Kconfig \
+	drivers/staging/iio/meter/Kconfig \
+	drivers/staging/iio/magnetometer/Kconfig \
+	drivers/staging/iio/light/Kconfig \
+	drivers/staging/iio/imu/Kconfig \
+	drivers/staging/iio/gyro/Kconfig \
+	drivers/staging/iio/dds/Kconfig \
+	drivers/staging/iio/dac/Kconfig \
+	drivers/staging/iio/addac/Kconfig \
+	drivers/staging/iio/adc/Kconfig \
+	drivers/staging/iio/accel/Kconfig \
+	drivers/staging/iio/Kconfig \
+	drivers/staging/sep/Kconfig \
+	drivers/staging/vme/boards/Kconfig \
+	drivers/staging/vme/devices/Kconfig \
+	drivers/staging/vme/bridges/Kconfig \
+	drivers/staging/vme/Kconfig \
+	drivers/staging/hv/Kconfig \
+	drivers/staging/vt6656/Kconfig \
+	drivers/staging/vt6655/Kconfig \
+	drivers/staging/quatech_usb2/Kconfig \
+	drivers/staging/spectra/Kconfig \
+	drivers/staging/serqt_usb2/Kconfig \
+	drivers/staging/octeon/Kconfig \
+	drivers/gpu/drm/nouveau/Kconfig \
+	drivers/gpu/drm/vmwgfx/Kconfig \
+	drivers/staging/line6/Kconfig \
+	drivers/staging/phison/Kconfig \
+	drivers/staging/pohmelfs/Kconfig \
+	drivers/staging/frontier/Kconfig \
+	drivers/staging/rts_pstor/Kconfig \
+	drivers/staging/rtl8712/Kconfig \
+	drivers/staging/rtl8192e/Kconfig \
+	drivers/staging/rtl8192u/Kconfig \
+	drivers/staging/rtl8187se/Kconfig \
+	drivers/staging/panel/Kconfig \
+	drivers/staging/asus_oled/Kconfig \
+	drivers/staging/olpc_dcon/Kconfig \
+	drivers/staging/comedi/Kconfig \
+	drivers/staging/brcm80211/Kconfig \
+	drivers/staging/echo/Kconfig \
+	drivers/staging/wlan-ng/Kconfig \
+	drivers/staging/winbond/Kconfig \
+	drivers/staging/usbip/Kconfig \
+	drivers/staging/cxd2099/Kconfig \
+	drivers/staging/tm6000/Kconfig \
+	drivers/staging/cx25821/Kconfig \
+	drivers/staging/go7007/Kconfig \
+	drivers/staging/slicoss/Kconfig \
+	drivers/staging/et131x/Kconfig \
+	drivers/staging/generic_serial/Kconfig \
+	drivers/staging/tty/Kconfig \
+	drivers/staging/Kconfig \
+	drivers/xen/Kconfig \
+	drivers/vlynq/Kconfig \
+	drivers/uio/Kconfig \
+	drivers/auxdisplay/Kconfig \
+	drivers/dca/Kconfig \
+	drivers/dma/Kconfig \
+	drivers/rtc/Kconfig \
+	drivers/edac/Kconfig \
+	drivers/infiniband/ulp/iser/Kconfig \
+	drivers/infiniband/ulp/srp/Kconfig \
+	drivers/infiniband/ulp/ipoib/Kconfig \
+	drivers/infiniband/hw/nes/Kconfig \
+	drivers/infiniband/hw/mlx4/Kconfig \
+	drivers/infiniband/hw/cxgb4/Kconfig \
+	drivers/infiniband/hw/cxgb3/Kconfig \
+	drivers/infiniband/hw/amso1100/Kconfig \
+	drivers/infiniband/hw/ehca/Kconfig \
+	drivers/infiniband/hw/qib/Kconfig \
+	drivers/infiniband/hw/ipath/Kconfig \
+	drivers/infiniband/hw/mthca/Kconfig \
+	drivers/infiniband/Kconfig \
+	drivers/accessibility/Kconfig \
+	drivers/nfc/Kconfig \
+	drivers/leds/Kconfig \
+	drivers/memstick/host/Kconfig \
+	drivers/memstick/core/Kconfig \
+	drivers/memstick/Kconfig \
+	drivers/mmc/host/Kconfig \
+	drivers/mmc/card/Kconfig \
+	drivers/mmc/core/Kconfig \
+	drivers/mmc/Kconfig \
+	drivers/uwb/Kconfig \
+	drivers/usb/otg/Kconfig \
+	drivers/usb/gadget/Kconfig \
+	drivers/usb/atm/Kconfig \
+	drivers/usb/misc/sisusbvga/Kconfig \
+	drivers/usb/misc/Kconfig \
+	drivers/usb/serial/Kconfig \
+	drivers/usb/image/Kconfig \
+	drivers/usb/storage/Kconfig \
+	drivers/usb/class/Kconfig \
+	drivers/usb/renesas_usbhs/Kconfig \
+	drivers/usb/musb/Kconfig \
+	drivers/usb/host/Kconfig \
+	drivers/usb/wusbcore/Kconfig \
+	drivers/usb/mon/Kconfig \
+	drivers/usb/core/Kconfig \
+	drivers/usb/Kconfig \
+	drivers/hid/usbhid/Kconfig \
+	drivers/hid/Kconfig \
+	sound/oss/Kconfig \
+	sound/soc/codecs/Kconfig \
+	sound/soc/loongson/Kconfig \
+	sound/soc/txx9/Kconfig \
+	sound/soc/tegra/Kconfig \
+	sound/soc/sh/Kconfig \
+	sound/soc/s6000/Kconfig \
+	sound/soc/samsung/Kconfig \
+	sound/soc/pxa/Kconfig \
+	sound/soc/mid-x86/Kconfig \
+	sound/soc/kirkwood/Kconfig \
+	sound/soc/omap/Kconfig \
+	sound/soc/nuc900/Kconfig \
+	sound/soc/jz4740/Kconfig \
+	sound/soc/imx/Kconfig \
+	sound/soc/fsl/Kconfig \
+	sound/soc/ep93xx/Kconfig \
+	sound/soc/davinci/Kconfig \
+	sound/soc/blackfin/Kconfig \
+	sound/soc/au1x/Kconfig \
+	sound/soc/atmel/Kconfig \
+	sound/soc/Kconfig \
+	sound/parisc/Kconfig \
+	sound/sparc/Kconfig \
+	sound/pcmcia/Kconfig \
+	sound/firewire/Kconfig \
+	sound/usb/Kconfig \
+	sound/sh/Kconfig \
+	sound/mips/Kconfig \
+	sound/spi/Kconfig \
+	sound/atmel/Kconfig \
+	sound/arm/Kconfig \
+	sound/aoa/soundbus/Kconfig \
+	sound/aoa/codecs/Kconfig \
+	sound/aoa/fabrics/Kconfig \
+	sound/aoa/Kconfig \
+	sound/ppc/Kconfig \
+	sound/pci/hda/Kconfig \
+	sound/pci/Kconfig \
+	sound/isa/Kconfig \
+	sound/drivers/Kconfig \
+	sound/core/seq/Kconfig \
+	sound/core/Kconfig \
+	sound/oss/dmasound/Kconfig \
+	sound/Kconfig \
+	drivers/video/logo/Kconfig \
+	drivers/video/console/Kconfig \
+	drivers/video/display/Kconfig \
+	drivers/video/backlight/Kconfig \
+	drivers/video/omap2/displays/Kconfig \
+	drivers/video/omap2/omapfb/Kconfig \
+	drivers/video/omap2/dss/Kconfig \
+	drivers/video/omap2/Kconfig \
+	drivers/video/omap/Kconfig \
+	drivers/video/geode/Kconfig \
+	drivers/gpu/stub/Kconfig \
+	drivers/gpu/drm/radeon/Kconfig \
+	drivers/gpu/drm/Kconfig \
+	drivers/gpu/vga/Kconfig \
+	drivers/char/agp/Kconfig \
+	drivers/video/Kconfig \
+	drivers/media/dvb/frontends/Kconfig \
+	drivers/media/dvb/ngene/Kconfig \
+	drivers/media/dvb/mantis/Kconfig \
+	drivers/media/dvb/pt1/Kconfig \
+	drivers/media/dvb/firewire/Kconfig \
+	drivers/media/dvb/dm1105/Kconfig \
+	drivers/media/dvb/pluto2/Kconfig \
+	drivers/media/dvb/bt8xx/Kconfig \
+	drivers/media/dvb/b2c2/Kconfig \
+	drivers/media/dvb/siano/Kconfig \
+	drivers/media/dvb/ttusb-dec/Kconfig \
+	drivers/media/dvb/ttusb-budget/Kconfig \
+	drivers/media/dvb/dvb-usb/Kconfig \
+	drivers/media/dvb/ttpci/Kconfig \
+	drivers/media/dvb/Kconfig \
+	drivers/media/radio/wl128x/Kconfig \
+	drivers/media/radio/si470x/Kconfig \
+	drivers/media/radio/Kconfig \
+	drivers/media/video/pwc/Kconfig \
+	drivers/media/video/sn9c102/Kconfig \
+	drivers/media/video/et61x251/Kconfig \
+	drivers/media/video/usbvision/Kconfig \
+	drivers/media/video/cx231xx/Kconfig \
+	drivers/media/video/tlg2300/Kconfig \
+	drivers/media/video/em28xx/Kconfig \
+	drivers/media/video/hdpvr/Kconfig \
+	drivers/media/video/pvrusb2/Kconfig \
+	drivers/media/video/gspca/gl860/Kconfig \
+	drivers/media/video/gspca/stv06xx/Kconfig \
+	drivers/media/video/gspca/m5602/Kconfig \
+	drivers/media/video/gspca/Kconfig \
+	drivers/media/video/uvc/gc0303/Kconfig \
+	drivers/media/video/uvc/Kconfig \
+	drivers/media/video/m5mols/Kconfig \
+	drivers/media/video/saa7164/Kconfig \
+	drivers/media/video/cx18/Kconfig \
+	drivers/media/video/ivtv/Kconfig \
+	drivers/media/video/au0828/Kconfig \
+	drivers/media/video/cx23885/Kconfig \
+	drivers/media/video/cx88/Kconfig \
+	drivers/media/video/saa7134/Kconfig \
+	drivers/media/video/zoran/Kconfig \
+	drivers/media/video/cpia2/Kconfig \
+	drivers/media/video/bt8xx/Kconfig \
+	drivers/media/video/omap/Kconfig \
+	drivers/media/video/davinci/Kconfig \
+	drivers/media/video/cx25840/Kconfig \
+	drivers/media/video/Kconfig \
+	drivers/media/common/tuners/Kconfig \
+	drivers/media/rc/keymaps/Kconfig \
+	drivers/media/rc/Kconfig \
+	drivers/media/common/Kconfig \
+	drivers/media/Kconfig \
+	drivers/regulator/Kconfig \
+	drivers/mfd/Kconfig \
+	drivers/bcma/Kconfig \
+	drivers/ssb/Kconfig \
+	drivers/watchdog/Kconfig \
+	drivers/thermal/Kconfig \
+	drivers/hwmon/Kconfig \
+	drivers/power/Kconfig \
+	drivers/w1/slaves/Kconfig \
+	drivers/w1/masters/Kconfig \
+	drivers/w1/Kconfig \
+	drivers/gpio/Kconfig \
+	drivers/ptp/Kconfig \
+	drivers/pps/generators/Kconfig \
+	drivers/pps/clients/Kconfig \
+	drivers/pps/Kconfig \
+	drivers/spi/Kconfig \
+	drivers/i2c/busses/Kconfig \
+	drivers/i2c/algos/Kconfig \
+	drivers/i2c/muxes/Kconfig \
+	drivers/i2c/Kconfig \
+	drivers/s390/char/Kconfig \
+	drivers/char/tpm/Kconfig \
+	drivers/char/pcmcia/Kconfig \
+	drivers/char/hw_random/Kconfig \
+	drivers/char/ipmi/Kconfig \
+	drivers/tty/hvc/Kconfig \
+	drivers/tty/serial/Kconfig \
+	drivers/tty/Kconfig \
+	drivers/char/Kconfig \
+	drivers/input/gameport/Kconfig \
+	drivers/input/serio/Kconfig \
+	drivers/input/misc/Kconfig \
+	drivers/input/touchscreen/Kconfig \
+	drivers/input/tablet/Kconfig \
+	drivers/input/joystick/iforce/Kconfig \
+	drivers/input/joystick/Kconfig \
+	drivers/input/mouse/Kconfig \
+	drivers/input/keyboard/Kconfig \
+	drivers/input/Kconfig \
+	drivers/telephony/Kconfig \
+	drivers/isdn/hardware/mISDN/Kconfig \
+	drivers/isdn/mISDN/Kconfig \
+	drivers/isdn/hysdn/Kconfig \
+	drivers/isdn/gigaset/Kconfig \
+	drivers/isdn/hardware/eicon/Kconfig \
+	drivers/isdn/hardware/avm/Kconfig \
+	drivers/isdn/hardware/Kconfig \
+	drivers/isdn/capi/Kconfig \
+	drivers/isdn/act2000/Kconfig \
+	drivers/isdn/sc/Kconfig \
+	drivers/isdn/pcbit/Kconfig \
+	drivers/isdn/icn/Kconfig \
+	drivers/isdn/hisax/Kconfig \
+	drivers/isdn/i4l/Kconfig \
+	drivers/isdn/Kconfig \
+	drivers/net/caif/Kconfig \
+	drivers/s390/net/Kconfig \
+	drivers/ieee802154/Kconfig \
+	drivers/atm/Kconfig \
+	drivers/net/wan/Kconfig \
+	drivers/net/pcmcia/Kconfig \
+	drivers/net/usb/Kconfig \
+	drivers/net/wimax/i2400m/Kconfig \
+	drivers/net/wimax/Kconfig \
+	drivers/net/wireless/wm8782/Kconfig \
+	drivers/net/wireless/mwifiex/Kconfig \
+	drivers/net/wireless/zd1211rw/Kconfig \
+	drivers/net/wireless/wl12xx/Kconfig \
+	drivers/net/wireless/wl1251/Kconfig \
+	drivers/net/wireless/rt3070_ls1b/Kconfig \
+	drivers/net/wireless/rt2x00/Kconfig \
+	drivers/net/wireless/p54/Kconfig \
+	drivers/net/wireless/orinoco/Kconfig \
+	drivers/net/wireless/libertas/Kconfig \
+	drivers/net/wireless/iwmc3200wifi/Kconfig \
+	drivers/net/wireless/iwlegacy/Kconfig \
+	drivers/net/wireless/iwlwifi/Kconfig \
+	drivers/net/wireless/ipw2x00/Kconfig \
+	drivers/net/wireless/hostap/Kconfig \
+	drivers/net/wireless/b43legacy/Kconfig \
+	drivers/net/wireless/b43/Kconfig \
+	drivers/net/wireless/ath/carl9170/Kconfig \
+	drivers/net/wireless/ath/ath9k/Kconfig \
+	drivers/net/wireless/ath/ath5k/Kconfig \
+	drivers/net/wireless/ath/Kconfig \
+	drivers/net/wireless/rtl8188/Kconfig \
+	drivers/net/wireless/Kconfig \
+	drivers/net/tokenring/Kconfig \
+	drivers/net/benet/Kconfig \
+	drivers/net/sfc/Kconfig \
+	drivers/net/stmmac/Kconfig \
+	drivers/net/ixp2000/Kconfig \
+	drivers/net/octeon/Kconfig \
+	drivers/net/fs_enet/Kconfig \
+	drivers/net/ibm_newemac/Kconfig \
+	drivers/net/tulip/Kconfig \
+	drivers/net/loongson/Kconfig \
+	drivers/net/arm/Kconfig \
+	drivers/net/phy/Kconfig \
+	drivers/net/arcnet/Kconfig \
+	drivers/net/Kconfig \
+	drivers/macintosh/Kconfig \
+	drivers/message/i2o/Kconfig \
+	drivers/firewire/Kconfig \
+	drivers/message/fusion/Kconfig \
+	drivers/target/tcm_fc/Kconfig \
+	drivers/target/loopback/Kconfig \
+	drivers/target/Kconfig \
+	drivers/md/Kconfig \
+	drivers/ata/Kconfig \
+	drivers/scsi/osd/Kconfig \
+	drivers/scsi/device_handler/Kconfig \
+	drivers/scsi/pcmcia/Kconfig \
+	drivers/scsi/arm/Kconfig \
+	drivers/scsi/qla4xxx/Kconfig \
+	drivers/scsi/qla2xxx/Kconfig \
+	drivers/scsi/mpt2sas/Kconfig \
+	drivers/scsi/megaraid/Kconfig.megaraid \
+	drivers/scsi/mvsas/Kconfig \
+	drivers/scsi/aic94xx/Kconfig \
+	drivers/scsi/aic7xxx/Kconfig.aic79xx \
+	drivers/scsi/aic7xxx/Kconfig.aic7xxx \
+	drivers/scsi/be2iscsi/Kconfig \
+	drivers/scsi/bnx2fc/Kconfig \
+	drivers/scsi/bnx2i/Kconfig \
+	drivers/scsi/cxgbi/cxgb4i/Kconfig \
+	drivers/scsi/cxgbi/cxgb3i/Kconfig \
+	drivers/scsi/cxgbi/Kconfig \
+	drivers/scsi/libsas/Kconfig \
+	drivers/scsi/Kconfig \
+	drivers/ide/Kconfig \
+	drivers/misc/carma/Kconfig \
+	drivers/misc/lis3lv02d/Kconfig \
+	drivers/misc/ti-st/Kconfig \
+	drivers/misc/iwmc3200top/Kconfig \
+	drivers/misc/cb710/Kconfig \
+	drivers/misc/eeprom/Kconfig \
+	drivers/misc/c2port/Kconfig \
+	drivers/misc/Kconfig \
+	drivers/s390/block/Kconfig \
+	drivers/block/drbd/Kconfig \
+	drivers/block/paride/Kconfig \
+	drivers/block/Kconfig \
+	drivers/pnp/pnpacpi/Kconfig \
+	drivers/pnp/pnpbios/Kconfig \
+	drivers/pnp/isapnp/Kconfig \
+	drivers/pnp/Kconfig \
+	drivers/parport/Kconfig \
+	drivers/of/Kconfig \
+	drivers/mtd/ubi/Kconfig \
+	drivers/mtd/lpddr/Kconfig \
+	drivers/mtd/onenand/Kconfig \
+	drivers/mtd/nand/Kconfig \
+	drivers/mtd/devices/Kconfig \
+	drivers/mtd/maps/Kconfig \
+	drivers/mtd/chips/Kconfig \
+	drivers/mtd/Kconfig \
+	drivers/connector/Kconfig \
+	drivers/base/Kconfig \
+	drivers/Kconfig \
+	net/ceph/Kconfig \
+	net/caif/Kconfig \
+	net/9p/Kconfig \
+	net/rfkill/Kconfig \
+	net/wimax/Kconfig \
+	net/mac80211/Kconfig \
+	net/wireless/Kconfig \
+	net/rxrpc/Kconfig \
+	drivers/bluetooth/Kconfig \
+	net/bluetooth/hidp/Kconfig \
+	net/bluetooth/cmtp/Kconfig \
+	net/bluetooth/bnep/Kconfig \
+	net/bluetooth/rfcomm/Kconfig \
+	net/bluetooth/Kconfig \
+	drivers/net/irda/Kconfig \
+	net/irda/ircomm/Kconfig \
+	net/irda/irnet/Kconfig \
+	net/irda/irlan/Kconfig \
+	net/irda/Kconfig \
+	drivers/net/can/softing/Kconfig \
+	drivers/net/can/usb/Kconfig \
+	drivers/net/can/c_can/Kconfig \
+	drivers/net/can/sja1000/Kconfig \
+	drivers/net/can/mscan/Kconfig \
+	drivers/net/can/Kconfig \
+	net/can/Kconfig \
+	drivers/net/hamradio/Kconfig \
+	net/ax25/Kconfig \
+	net/batman-adv/Kconfig \
+	net/dns_resolver/Kconfig \
+	net/dcb/Kconfig \
+	net/sched/Kconfig \
+	net/ieee802154/Kconfig \
+	net/phonet/Kconfig \
+	net/wanrouter/Kconfig \
+	net/econet/Kconfig \
+	net/lapb/Kconfig \
+	net/x25/Kconfig \
+	drivers/net/appletalk/Kconfig \
+	net/ipx/Kconfig \
+	net/llc/Kconfig \
+	net/decnet/Kconfig \
+	net/8021q/Kconfig \
+	net/dsa/Kconfig \
+	net/bridge/Kconfig \
+	net/802/Kconfig \
+	net/l2tp/Kconfig \
+	net/atm/Kconfig \
+	net/tipc/Kconfig \
+	net/rds/Kconfig \
+	net/sctp/Kconfig \
+	net/dccp/ccids/Kconfig \
+	net/dccp/Kconfig \
+	net/bridge/netfilter/Kconfig \
+	net/decnet/netfilter/Kconfig \
+	net/ipv6/netfilter/Kconfig \
+	net/ipv4/netfilter/Kconfig \
+	net/netfilter/ipvs/Kconfig \
+	net/netfilter/ipset/Kconfig \
+	net/netfilter/Kconfig \
+	net/netlabel/Kconfig \
+	net/ipv6/Kconfig \
+	net/ipv4/Kconfig \
+	net/iucv/Kconfig \
+	net/xfrm/Kconfig \
+	net/unix/Kconfig \
+	net/packet/Kconfig \
+	net/Kconfig \
+	drivers/cpufreq/Kconfig.x86 \
+	drivers/cpufreq/Kconfig \
+	arch/mips/kernel/cpufreq/Kconfig \
+	kernel/power/Kconfig \
+	fs/Kconfig.binfmt \
+	drivers/rapidio/switches/Kconfig \
+	drivers/rapidio/Kconfig \
+	drivers/pci/hotplug/Kconfig \
+	drivers/pcmcia/Kconfig \
+	drivers/eisa/Kconfig \
+	drivers/pci/Kconfig \
+	kernel/Kconfig.freezer \
+	kernel/Kconfig.locks \
+	block/Kconfig.iosched \
+	block/Kconfig \
+	kernel/gcov/Kconfig \
+	arch/Kconfig \
+	usr/Kconfig \
+	kernel/irq/Kconfig \
+	init/Kconfig \
+	kernel/Kconfig.preempt \
+	kernel/time/Kconfig \
+	mm/Kconfig \
+	arch/mips/netlogic/Kconfig \
+	arch/mips/loongson/Kconfig \
+	arch/mips/cavium-octeon/Kconfig \
+	arch/mips/vr41xx/Kconfig \
+	arch/mips/txx9/Kconfig \
+	arch/mips/sibyte/Kconfig \
+	arch/mips/sgi-ip27/Kconfig \
+	arch/mips/powertv/asic/Kconfig \
+	arch/mips/powertv/Kconfig \
+	arch/mips/pmc-sierra/Kconfig \
+	arch/mips/lasat/Kconfig \
+	arch/mips/lantiq/xway/Kconfig \
+	arch/mips/lantiq/Kconfig \
+	arch/mips/jz4740/Kconfig \
+	arch/mips/jazz/Kconfig \
+	arch/mips/bcm63xx/boards/Kconfig \
+	arch/mips/bcm63xx/Kconfig \
+	arch/mips/ath79/Kconfig \
+	arch/mips/alchemy/Kconfig \
+	arch/mips/Kconfig \
+	Kconfig
+
+include/config/auto.conf: \
+	$(deps_config)
+
+ifneq "$(KERNELVERSION)" "3.0.82"
+include/config/auto.conf: FORCE
+endif
+ifneq "$(ARCH)" "mips"
+include/config/auto.conf: FORCE
+endif
+ifneq "$(SRCARCH)" "mips"
+include/config/auto.conf: FORCE
+endif
+
+$(deps_config): ;
diff -uNra linux-3.0.82/include/config/kernel.release linux-3.0.82x/include/config/kernel.release
--- linux-3.0.82/include/config/kernel.release	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/include/config/kernel.release	2017-09-23 03:42:50.314674158 +0800
@@ -0,0 +1 @@
+3.0.82
diff -uNra linux-3.0.82/include/config/tristate.conf linux-3.0.82x/include/config/tristate.conf
--- linux-3.0.82/include/config/tristate.conf	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/include/config/tristate.conf	2017-09-23 03:42:50.314674158 +0800
@@ -0,0 +1,167 @@
+#
+# Automatically generated - do not edit
+
+CONFIG_CRC32=Y
+CONFIG_IR_JVC_DECODER=Y
+CONFIG_RC_CORE=Y
+CONFIG_TCP_CONG_HTCP=Y
+CONFIG_BINFMT_MISC=Y
+CONFIG_PNFS_FILE_LAYOUT=Y
+CONFIG_IR_NEC_DECODER=Y
+CONFIG_CRYPTO_RNG2=Y
+CONFIG_MSDOS_FS=Y
+CONFIG_CAN=Y
+CONFIG_SERIAL_8250=Y
+CONFIG_VIDEO_IR_I2C=Y
+CONFIG_NFSD=Y
+CONFIG_USB=Y
+CONFIG_CRC_ITU_T=Y
+CONFIG_FRAMEBUFFER_CONSOLE=Y
+CONFIG_LS1B_SPI=Y
+CONFIG_SND_SOC=Y
+CONFIG_MEDIA_TUNER_XC5000=M
+CONFIG_MTD=Y
+CONFIG_INPUT_MOUSEDEV=Y
+CONFIG_MTD_NAND_IDS=Y
+CONFIG_EXPORTFS=Y
+CONFIG_SND_MIXER_OSS=Y
+CONFIG_SUNRPC_GSS=Y
+CONFIG_ZLIB_INFLATE=Y
+CONFIG_CRC_T10DIF=Y
+CONFIG_MEDIA_TUNER_QT1010=M
+CONFIG_LOCKD=Y
+CONFIG_STE10XP=Y
+CONFIG_MEDIA_TUNER_MAX2165=M
+CONFIG_USB_STORAGE=Y
+CONFIG_IR_LIRC_CODEC=Y
+CONFIG_MEDIA_TUNER_TDA827X=M
+CONFIG_NLS=Y
+CONFIG_SPI_SPIDEV=Y
+CONFIG_SPI_BITBANG=Y
+CONFIG_MEDIA_TUNER_TDA18271=M
+CONFIG_CRYPTO_WORKQUEUE=Y
+CONFIG_USB_EHCI_HCD=Y
+CONFIG_SND_PCM_OSS=Y
+CONFIG_IOSCHED_DEADLINE=Y
+CONFIG_LOONGSON_GMAC=Y
+CONFIG_LS1X_FB0=Y
+CONFIG_IR_RC5_SZ_DECODER=Y
+CONFIG_SCSI_WAIT_SCAN=M
+CONFIG_CRYPTO_DEFLATE=Y
+CONFIG_USB_MASS_STORAGE=M
+CONFIG_MEDIA_SUPPORT=Y
+CONFIG_EXT3_FS=Y
+CONFIG_FAT_FS=Y
+CONFIG_IOSCHED_CFQ=Y
+CONFIG_I2C_LS1X=Y
+CONFIG_USB_OHCI_HCD=Y
+CONFIG_USB_GSPCA=M
+CONFIG_CRYPTO_MD5=Y
+CONFIG_SOC_CAMERA_OV9650=Y
+CONFIG_MEDIA_TUNER_TEA5767=M
+CONFIG_NLS_CODEPAGE_936=Y
+CONFIG_CRYPTO_ZLIB=Y
+CONFIG_CRYPTO_PCOMP2=Y
+CONFIG_USB_GADGET=Y
+CONFIG_MEDIA_TUNER_MXL5005S=M
+CONFIG_GPIO_LS1C=Y
+CONFIG_SOUND=Y
+CONFIG_MEDIA_TUNER_TDA9887=M
+CONFIG_UNIX=Y
+CONFIG_CRYPTO_HASH2=Y
+CONFIG_NFS_FS=Y
+CONFIG_CRYPTO_ALGAPI=Y
+CONFIG_MEDIA_TUNER=Y
+CONFIG_MEDIA_TUNER_SIMPLE=M
+CONFIG_CRYPTO_HASH=Y
+CONFIG_VFAT_FS=Y
+CONFIG_BLK_DEV_LOOP=Y
+CONFIG_MEDIA_TUNER_XC2028=M
+CONFIG_SOC_CAMERA=Y
+CONFIG_MTD_NAND_ECC=Y
+CONFIG_FS_MBCACHE=Y
+CONFIG_CRC7=Y
+CONFIG_CRYPTO_MANAGER2=Y
+CONFIG_CONFIGFS_FS=Y
+CONFIG_I2C=Y
+CONFIG_CRYPTO_ECB=Y
+CONFIG_MTD_NAND_LS1X=Y
+CONFIG_FB_CFB_IMAGEBLIT=Y
+CONFIG_ZLIB_DEFLATE=Y
+CONFIG_SUNRPC=Y
+CONFIG_YAFFS_FS=Y
+CONFIG_MII=Y
+CONFIG_CRYPTO_SHA1=Y
+CONFIG_SOC_CAMERA_LS1C=Y
+CONFIG_SND_PCM=Y
+CONFIG_IR_SONY_DECODER=Y
+CONFIG_INPUT_EVDEV=Y
+CONFIG_PACKET=Y
+CONFIG_CRYPTO_AES=Y
+CONFIG_LIRC=Y
+CONFIG_MEDIA_TUNER_MT2266=M
+CONFIG_MTD_BLKDEVS=Y
+CONFIG_AUTOFS4_FS=Y
+CONFIG_TCP_CONG_WESTWOOD=Y
+CONFIG_CRYPTO_SHA256=Y
+CONFIG_CAN_RAW=Y
+CONFIG_CRYPTO=Y
+CONFIG_MEDIA_TUNER_TDA18218=M
+CONFIG_SCSI_MOD=Y
+CONFIG_SERIAL_CORE=Y
+CONFIG_VIDEO_DEV=Y
+CONFIG_SOUND_PRIME=Y
+CONFIG_SCSI=Y
+CONFIG_FB_CFB_FILLRECT=Y
+CONFIG_MEDIA_TUNER_TDA8290=M
+CONFIG_MEDIA_TUNER_TDA18212=M
+CONFIG_PHYLIB=Y
+CONFIG_MEDIA_TUNER_MT20XX=M
+CONFIG_REALTEK_PHY=Y
+CONFIG_MEDIA_TUNER_MC44S803=M
+CONFIG_CHR_DEV_SG=Y
+CONFIG_CRYPTO_ARC4=Y
+CONFIG_CRYPTO_MANAGER=Y
+CONFIG_MTD_NAND=Y
+CONFIG_MEDIA_TUNER_MXL5007T=M
+CONFIG_VIDEOBUF_DMA_CONTIG=Y
+CONFIG_SOUND_LS1X_UDA1342=Y
+CONFIG_TCP_CONG_CUBIC=Y
+CONFIG_FB=Y
+CONFIG_FB_LOONGSON1=Y
+CONFIG_VIDEO_MEDIA=Y
+CONFIG_MEDIA_TUNER_MT2060=M
+CONFIG_VIDEOBUF2_CORE=Y
+CONFIG_NTFS_FS=Y
+CONFIG_CRYPTO_BLKCIPHER2=Y
+CONFIG_MTD_BLOCK=Y
+CONFIG_RC_MAP=Y
+CONFIG_SND=Y
+CONFIG_IR_RC6_DECODER=Y
+CONFIG_IKCONFIG=Y
+CONFIG_MEDIA_TUNER_MT2131=M
+CONFIG_TCP_CONG_BIC=Y
+CONFIG_CRAMFS=Y
+CONFIG_SND_TIMER=Y
+CONFIG_NFS_ACL_SUPPORT=Y
+CONFIG_JBD=Y
+CONFIG_INPUT_POLLDEV=Y
+CONFIG_MTD_CHAR=Y
+CONFIG_INET_LRO=Y
+CONFIG_IR_RC5_DECODER=Y
+CONFIG_FB_CFB_COPYAREA=Y
+CONFIG_VIDEOBUF_GEN=Y
+CONFIG_VIDEO_V4L2=Y
+CONFIG_DECOMPRESS_GZIP=Y
+CONFIG_MEDIA_TUNER_TEA5761=M
+CONFIG_CAN_DEV=Y
+CONFIG_CRC_CCITT=Y
+CONFIG_BLK_DEV_SD=Y
+CONFIG_BITREVERSE=Y
+CONFIG_CRYPTO_PCOMP=Y
+CONFIG_VIDEO_V4L2_COMMON=Y
+CONFIG_CRYPTO_BLKCIPHER=Y
+CONFIG_SND_SOC_I2C_AND_SPI=Y
+CONFIG_CRYPTO_AEAD2=Y
+CONFIG_CRYPTO_ALGAPI2=Y
+CONFIG_INPUT=Y
diff -uNra linux-3.0.82/include/generated/asm-offsets.h linux-3.0.82x/include/generated/asm-offsets.h
--- linux-3.0.82/include/generated/asm-offsets.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/include/generated/asm-offsets.h	2017-09-23 03:42:50.318674147 +0800
@@ -0,0 +1,206 @@
+#ifndef __ASM_OFFSETS_H__
+#define __ASM_OFFSETS_H__
+/*
+ * DO NOT MODIFY.
+ *
+ * This file was generated by Kbuild
+ *
+ */
+
+/* MIPS pt_regs offsets. */
+#define PT_R0 24 /* offsetof(struct pt_regs, regs[0])	 # */
+#define PT_R1 28 /* offsetof(struct pt_regs, regs[1])	 # */
+#define PT_R2 32 /* offsetof(struct pt_regs, regs[2])	 # */
+#define PT_R3 36 /* offsetof(struct pt_regs, regs[3])	 # */
+#define PT_R4 40 /* offsetof(struct pt_regs, regs[4])	 # */
+#define PT_R5 44 /* offsetof(struct pt_regs, regs[5])	 # */
+#define PT_R6 48 /* offsetof(struct pt_regs, regs[6])	 # */
+#define PT_R7 52 /* offsetof(struct pt_regs, regs[7])	 # */
+#define PT_R8 56 /* offsetof(struct pt_regs, regs[8])	 # */
+#define PT_R9 60 /* offsetof(struct pt_regs, regs[9])	 # */
+#define PT_R10 64 /* offsetof(struct pt_regs, regs[10])	 # */
+#define PT_R11 68 /* offsetof(struct pt_regs, regs[11])	 # */
+#define PT_R12 72 /* offsetof(struct pt_regs, regs[12])	 # */
+#define PT_R13 76 /* offsetof(struct pt_regs, regs[13])	 # */
+#define PT_R14 80 /* offsetof(struct pt_regs, regs[14])	 # */
+#define PT_R15 84 /* offsetof(struct pt_regs, regs[15])	 # */
+#define PT_R16 88 /* offsetof(struct pt_regs, regs[16])	 # */
+#define PT_R17 92 /* offsetof(struct pt_regs, regs[17])	 # */
+#define PT_R18 96 /* offsetof(struct pt_regs, regs[18])	 # */
+#define PT_R19 100 /* offsetof(struct pt_regs, regs[19])	 # */
+#define PT_R20 104 /* offsetof(struct pt_regs, regs[20])	 # */
+#define PT_R21 108 /* offsetof(struct pt_regs, regs[21])	 # */
+#define PT_R22 112 /* offsetof(struct pt_regs, regs[22])	 # */
+#define PT_R23 116 /* offsetof(struct pt_regs, regs[23])	 # */
+#define PT_R24 120 /* offsetof(struct pt_regs, regs[24])	 # */
+#define PT_R25 124 /* offsetof(struct pt_regs, regs[25])	 # */
+#define PT_R26 128 /* offsetof(struct pt_regs, regs[26])	 # */
+#define PT_R27 132 /* offsetof(struct pt_regs, regs[27])	 # */
+#define PT_R28 136 /* offsetof(struct pt_regs, regs[28])	 # */
+#define PT_R29 140 /* offsetof(struct pt_regs, regs[29])	 # */
+#define PT_R30 144 /* offsetof(struct pt_regs, regs[30])	 # */
+#define PT_R31 148 /* offsetof(struct pt_regs, regs[31])	 # */
+#define PT_LO 160 /* offsetof(struct pt_regs, lo)	 # */
+#define PT_HI 156 /* offsetof(struct pt_regs, hi)	 # */
+#define PT_EPC 172 /* offsetof(struct pt_regs, cp0_epc)	 # */
+#define PT_BVADDR 164 /* offsetof(struct pt_regs, cp0_badvaddr)	 # */
+#define PT_STATUS 152 /* offsetof(struct pt_regs, cp0_status)	 # */
+#define PT_CAUSE 168 /* offsetof(struct pt_regs, cp0_cause)	 # */
+#define PT_SIZE 176 /* sizeof(struct pt_regs)	 # */
+
+/* MIPS task_struct offsets. */
+#define TASK_STATE 0 /* offsetof(struct task_struct, state)	 # */
+#define TASK_THREAD_INFO 4 /* offsetof(struct task_struct, stack)	 # */
+#define TASK_FLAGS 12 /* offsetof(struct task_struct, flags)	 # */
+#define TASK_MM 164 /* offsetof(struct task_struct, mm)	 # */
+#define TASK_PID 200 /* offsetof(struct task_struct, pid)	 # */
+#define TASK_STRUCT_SIZE 1072 /* sizeof(struct task_struct)	 # */
+
+/* MIPS thread_info offsets. */
+#define TI_TASK 0 /* offsetof(struct thread_info, task)	 # */
+#define TI_EXEC_DOMAIN 4 /* offsetof(struct thread_info, exec_domain)	 # */
+#define TI_FLAGS 8 /* offsetof(struct thread_info, flags)	 # */
+#define TI_TP_VALUE 12 /* offsetof(struct thread_info, tp_value)	 # */
+#define TI_CPU 16 /* offsetof(struct thread_info, cpu)	 # */
+#define TI_PRE_COUNT 20 /* offsetof(struct thread_info, preempt_count)	 # */
+#define TI_ADDR_LIMIT 24 /* offsetof(struct thread_info, addr_limit)	 # */
+#define TI_RESTART_BLOCK 32 /* offsetof(struct thread_info, restart_block)	 # */
+#define TI_REGS 72 /* offsetof(struct thread_info, regs)	 # */
+#define _THREAD_SIZE 8192 /* THREAD_SIZE	 # */
+#define _THREAD_MASK 8191 /* THREAD_MASK	 # */
+
+/* MIPS specific thread_struct offsets. */
+#define THREAD_REG16 448 /* offsetof(struct task_struct, thread.reg16)	 # */
+#define THREAD_REG17 452 /* offsetof(struct task_struct, thread.reg17)	 # */
+#define THREAD_REG18 456 /* offsetof(struct task_struct, thread.reg18)	 # */
+#define THREAD_REG19 460 /* offsetof(struct task_struct, thread.reg19)	 # */
+#define THREAD_REG20 464 /* offsetof(struct task_struct, thread.reg20)	 # */
+#define THREAD_REG21 468 /* offsetof(struct task_struct, thread.reg21)	 # */
+#define THREAD_REG22 472 /* offsetof(struct task_struct, thread.reg22)	 # */
+#define THREAD_REG23 476 /* offsetof(struct task_struct, thread.reg23)	 # */
+#define THREAD_REG29 480 /* offsetof(struct task_struct, thread.reg29)	 # */
+#define THREAD_REG30 484 /* offsetof(struct task_struct, thread.reg30)	 # */
+#define THREAD_REG31 488 /* offsetof(struct task_struct, thread.reg31)	 # */
+#define THREAD_STATUS 492 /* offsetof(struct task_struct, thread.cp0_status)	 # */
+#define THREAD_FPU 496 /* offsetof(struct task_struct, thread.fpu)	 # */
+#define THREAD_BVADDR 812 /* offsetof(struct task_struct, thread.cp0_badvaddr)	 # */
+#define THREAD_BUADDR 816 /* offsetof(struct task_struct, thread.cp0_baduaddr)	 # */
+#define THREAD_ECODE 820 /* offsetof(struct task_struct, thread.error_code)	 # */
+#define THREAD_TRAMP 824 /* offsetof(struct task_struct, thread.irix_trampoline)	 # */
+#define THREAD_OLDCTX 828 /* offsetof(struct task_struct, thread.irix_oldctx)	 # */
+
+#define THREAD_FPR0 496 /* offsetof(struct task_struct, thread.fpu.fpr[0])	 # */
+#define THREAD_FPR1 504 /* offsetof(struct task_struct, thread.fpu.fpr[1])	 # */
+#define THREAD_FPR2 512 /* offsetof(struct task_struct, thread.fpu.fpr[2])	 # */
+#define THREAD_FPR3 520 /* offsetof(struct task_struct, thread.fpu.fpr[3])	 # */
+#define THREAD_FPR4 528 /* offsetof(struct task_struct, thread.fpu.fpr[4])	 # */
+#define THREAD_FPR5 536 /* offsetof(struct task_struct, thread.fpu.fpr[5])	 # */
+#define THREAD_FPR6 544 /* offsetof(struct task_struct, thread.fpu.fpr[6])	 # */
+#define THREAD_FPR7 552 /* offsetof(struct task_struct, thread.fpu.fpr[7])	 # */
+#define THREAD_FPR8 560 /* offsetof(struct task_struct, thread.fpu.fpr[8])	 # */
+#define THREAD_FPR9 568 /* offsetof(struct task_struct, thread.fpu.fpr[9])	 # */
+#define THREAD_FPR10 576 /* offsetof(struct task_struct, thread.fpu.fpr[10])	 # */
+#define THREAD_FPR11 584 /* offsetof(struct task_struct, thread.fpu.fpr[11])	 # */
+#define THREAD_FPR12 592 /* offsetof(struct task_struct, thread.fpu.fpr[12])	 # */
+#define THREAD_FPR13 600 /* offsetof(struct task_struct, thread.fpu.fpr[13])	 # */
+#define THREAD_FPR14 608 /* offsetof(struct task_struct, thread.fpu.fpr[14])	 # */
+#define THREAD_FPR15 616 /* offsetof(struct task_struct, thread.fpu.fpr[15])	 # */
+#define THREAD_FPR16 624 /* offsetof(struct task_struct, thread.fpu.fpr[16])	 # */
+#define THREAD_FPR17 632 /* offsetof(struct task_struct, thread.fpu.fpr[17])	 # */
+#define THREAD_FPR18 640 /* offsetof(struct task_struct, thread.fpu.fpr[18])	 # */
+#define THREAD_FPR19 648 /* offsetof(struct task_struct, thread.fpu.fpr[19])	 # */
+#define THREAD_FPR20 656 /* offsetof(struct task_struct, thread.fpu.fpr[20])	 # */
+#define THREAD_FPR21 664 /* offsetof(struct task_struct, thread.fpu.fpr[21])	 # */
+#define THREAD_FPR22 672 /* offsetof(struct task_struct, thread.fpu.fpr[22])	 # */
+#define THREAD_FPR23 680 /* offsetof(struct task_struct, thread.fpu.fpr[23])	 # */
+#define THREAD_FPR24 688 /* offsetof(struct task_struct, thread.fpu.fpr[24])	 # */
+#define THREAD_FPR25 696 /* offsetof(struct task_struct, thread.fpu.fpr[25])	 # */
+#define THREAD_FPR26 704 /* offsetof(struct task_struct, thread.fpu.fpr[26])	 # */
+#define THREAD_FPR27 712 /* offsetof(struct task_struct, thread.fpu.fpr[27])	 # */
+#define THREAD_FPR28 720 /* offsetof(struct task_struct, thread.fpu.fpr[28])	 # */
+#define THREAD_FPR29 728 /* offsetof(struct task_struct, thread.fpu.fpr[29])	 # */
+#define THREAD_FPR30 736 /* offsetof(struct task_struct, thread.fpu.fpr[30])	 # */
+#define THREAD_FPR31 744 /* offsetof(struct task_struct, thread.fpu.fpr[31])	 # */
+#define THREAD_FCR31 752 /* offsetof(struct task_struct, thread.fpu.fcr31)	 # */
+
+/* Size of struct page */
+#define STRUCT_PAGE_SIZE 32 /* sizeof(struct page)	 # */
+
+/* Linux mm_struct offsets. */
+#define MM_USERS 40 /* offsetof(struct mm_struct, mm_users)	 # */
+#define MM_PGD 36 /* offsetof(struct mm_struct, pgd)	 # */
+#define MM_CONTEXT 336 /* offsetof(struct mm_struct, context)	 # */
+
+#define _PGD_T_SIZE 4 /* sizeof(pgd_t)	 # */
+#define _PMD_T_SIZE 4 /* sizeof(pmd_t)	 # */
+#define _PTE_T_SIZE 4 /* sizeof(pte_t)	 # */
+
+#define _PGD_T_LOG2 2 /* PGD_T_LOG2	 # */
+#define _PTE_T_LOG2 2 /* PTE_T_LOG2	 # */
+
+#define _PGD_ORDER 0 /* PGD_ORDER	 # */
+#define _PTE_ORDER 0 /* PTE_ORDER	 # */
+
+#define _PMD_SHIFT 22 /* PMD_SHIFT	 # */
+#define _PGDIR_SHIFT 22 /* PGDIR_SHIFT	 # */
+
+#define _PTRS_PER_PGD 1024 /* PTRS_PER_PGD	 # */
+#define _PTRS_PER_PMD 1 /* PTRS_PER_PMD	 # */
+#define _PTRS_PER_PTE 1024 /* PTRS_PER_PTE	 # */
+
+/* Linux sigcontext offsets. */
+#define SC_REGS 16 /* offsetof(struct sigcontext, sc_regs)	 # */
+#define SC_FPREGS 272 /* offsetof(struct sigcontext, sc_fpregs)	 # */
+#define SC_ACX 528 /* offsetof(struct sigcontext, sc_acx)	 # */
+#define SC_MDHI 552 /* offsetof(struct sigcontext, sc_mdhi)	 # */
+#define SC_MDLO 560 /* offsetof(struct sigcontext, sc_mdlo)	 # */
+#define SC_PC 8 /* offsetof(struct sigcontext, sc_pc)	 # */
+#define SC_FPC_CSR 532 /* offsetof(struct sigcontext, sc_fpc_csr)	 # */
+#define SC_FPC_EIR 536 /* offsetof(struct sigcontext, sc_fpc_eir)	 # */
+#define SC_HI1 568 /* offsetof(struct sigcontext, sc_hi1)	 # */
+#define SC_LO1 572 /* offsetof(struct sigcontext, sc_lo1)	 # */
+#define SC_HI2 576 /* offsetof(struct sigcontext, sc_hi2)	 # */
+#define SC_LO2 580 /* offsetof(struct sigcontext, sc_lo2)	 # */
+#define SC_HI3 584 /* offsetof(struct sigcontext, sc_hi3)	 # */
+#define SC_LO3 588 /* offsetof(struct sigcontext, sc_lo3)	 # */
+
+/* Linux signal numbers. */
+#define _SIGHUP 1 /* SIGHUP	 # */
+#define _SIGINT 2 /* SIGINT	 # */
+#define _SIGQUIT 3 /* SIGQUIT	 # */
+#define _SIGILL 4 /* SIGILL	 # */
+#define _SIGTRAP 5 /* SIGTRAP	 # */
+#define _SIGIOT 6 /* SIGIOT	 # */
+#define _SIGABRT 6 /* SIGABRT	 # */
+#define _SIGEMT 7 /* SIGEMT	 # */
+#define _SIGFPE 8 /* SIGFPE	 # */
+#define _SIGKILL 9 /* SIGKILL	 # */
+#define _SIGBUS 10 /* SIGBUS	 # */
+#define _SIGSEGV 11 /* SIGSEGV	 # */
+#define _SIGSYS 12 /* SIGSYS	 # */
+#define _SIGPIPE 13 /* SIGPIPE	 # */
+#define _SIGALRM 14 /* SIGALRM	 # */
+#define _SIGTERM 15 /* SIGTERM	 # */
+#define _SIGUSR1 16 /* SIGUSR1	 # */
+#define _SIGUSR2 17 /* SIGUSR2	 # */
+#define _SIGCHLD 18 /* SIGCHLD	 # */
+#define _SIGPWR 19 /* SIGPWR	 # */
+#define _SIGWINCH 20 /* SIGWINCH	 # */
+#define _SIGURG 21 /* SIGURG	 # */
+#define _SIGIO 22 /* SIGIO	 # */
+#define _SIGSTOP 23 /* SIGSTOP	 # */
+#define _SIGTSTP 24 /* SIGTSTP	 # */
+#define _SIGCONT 25 /* SIGCONT	 # */
+#define _SIGTTIN 26 /* SIGTTIN	 # */
+#define _SIGTTOU 27 /* SIGTTOU	 # */
+#define _SIGVTALRM 28 /* SIGVTALRM	 # */
+#define _SIGPROF 29 /* SIGPROF	 # */
+#define _SIGXCPU 30 /* SIGXCPU	 # */
+#define _SIGXFSZ 31 /* SIGXFSZ	 # */
+
+/* Linux irq_cpustat_t offsets. */
+#define IC_SOFTIRQ_PENDING 0 /* offsetof(irq_cpustat_t, __softirq_pending)	 # */
+#define IC_IRQ_CPUSTAT_T 32 /* sizeof(irq_cpustat_t)	 # */
+
+
+#endif
diff -uNra linux-3.0.82/include/generated/autoconf.h linux-3.0.82x/include/generated/autoconf.h
--- linux-3.0.82/include/generated/autoconf.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/include/generated/autoconf.h	2017-09-23 03:42:50.318674147 +0800
@@ -0,0 +1,482 @@
+/*
+ * Automatically generated C config: don't edit
+ * Linux/mips 3.0.82 Kernel Configuration
+ */
+#define CONFIG_SCSI_DMA 1
+#define CONFIG_TCP_MD5SIG 1
+#define CONFIG_KERNEL_GZIP 1
+#define CONFIG_CRC32 1
+#define CONFIG_I2C_BOARDINFO 1
+#define CONFIG_IR_JVC_DECODER 1
+#define CONFIG_EXT3_FS_XATTR 1
+#define CONFIG_HIGH_RES_TIMERS 1
+#define CONFIG_FLATMEM_MANUAL 1
+#define CONFIG_SYS_HAS_EARLY_PRINTK 1
+#define CONFIG_EXT3_DEFAULTS_TO_ORDERED 1
+#define CONFIG_INOTIFY_USER 1
+#define CONFIG_NETWORK_FILESYSTEMS 1
+#define CONFIG_NET_ETHERNET 1
+#define CONFIG_EXPERIMENTAL 1
+#define CONFIG_ARCH_SUSPEND_POSSIBLE 1
+#define CONFIG_INLINE_WRITE_UNLOCK_IRQ 1
+#define CONFIG_RC_CORE 1
+#define CONFIG_TCP_CONG_HTCP 1
+#define CONFIG_BINFMT_MISC 1
+#define CONFIG_SSB_POSSIBLE 1
+#define CONFIG_MTD_CMDLINE_PARTS 1
+#define CONFIG_USB_OHCI_LITTLE_ENDIAN 1
+#define CONFIG_FSNOTIFY 1
+#define CONFIG_ARCH_FLATMEM_ENABLE 1
+#define CONFIG_HAVE_KERNEL_LZMA 1
+#define CONFIG_DEFAULT_SECURITY_DAC 1
+#define CONFIG_NETDEV_1000 1
+#define CONFIG_INPUT_MOUSEDEV_PSAUX 1
+#define CONFIG_HAVE_KERNEL_BZIP2 1
+#define CONFIG_DEFAULT_TCP_CONG "cubic"
+#define CONFIG_UEVENT_HELPER_PATH "/sbin/mdev"
+#define CONFIG_DEVTMPFS 1
+#define CONFIG_PNFS_FILE_LAYOUT 1
+#define CONFIG_NFSD_DEPRECATED 1
+#define CONFIG_IR_NEC_DECODER 1
+#define CONFIG_DEFAULT_MESSAGE_LOGLEVEL 4
+#define CONFIG_BLK_DEV_BSG 1
+#define CONFIG_CRYPTO_RNG2 1
+#define CONFIG_MSDOS_FS 1
+#define CONFIG_USB_GADGET_SNPS_DWC_OTG 1
+#define CONFIG_CAN 1
+#define CONFIG_SERIAL_8250 1
+#define CONFIG_VIDEO_IR_I2C 1
+#define CONFIG_NFSD 1
+#define CONFIG_USB 1
+#define CONFIG_SCHED_OMIT_FRAME_POINTER 1
+#define CONFIG_MIPS_MT_DISABLED 1
+#define CONFIG_CRC_ITU_T 1
+#define CONFIG_FRAMEBUFFER_CONSOLE 1
+#define CONFIG_LS1B_SPI 1
+#define CONFIG_BCMA_POSSIBLE 1
+#define CONFIG_FORCE_MAX_ZONEORDER 12
+#define CONFIG_SND_SOC 1
+#define CONFIG_MEDIA_TUNER_XC5000_MODULE 1
+#define CONFIG_PRINTK 1
+#define CONFIG_USB_OTG_WHITELIST 1
+#define CONFIG_TIMERFD 1
+#define CONFIG_MTD_CFI_I2 1
+#define CONFIG_CEVT_R4K_LIB 1
+#define CONFIG_SHMEM 1
+#define CONFIG_MTD 1
+#define CONFIG_HAVE_ARCH_JUMP_LABEL 1
+#define CONFIG_DEVTMPFS_MOUNT 1
+#define CONFIG_DNOTIFY 1
+#define CONFIG_INPUT_MOUSEDEV 1
+#define CONFIG_MTD_NAND_IDS 1
+#define CONFIG_EXPORTFS 1
+#define CONFIG_SND_MIXER_OSS 1
+#define CONFIG_SUNRPC_GSS 1
+#define CONFIG_RTC_INTF_SYSFS 1
+#define CONFIG_BLK_DEV_INITRD 1
+#define CONFIG_SND_OSSEMUL 1
+#define CONFIG_USB_OTG 1
+#define CONFIG_ZLIB_INFLATE 1
+#define CONFIG_CRC_T10DIF 1
+#define CONFIG_MEDIA_TUNER_QT1010_MODULE 1
+#define CONFIG_LOGO_LINUX_CLUT224 1
+#define CONFIG_IP_PNP 1
+#define CONFIG_RTC_INTF_PROC 1
+#define CONFIG_PAGE_SIZE_4KB 1
+#define CONFIG_STACKTRACE_SUPPORT 1
+#define CONFIG_USB_DEVICE_CLASS 1
+#define CONFIG_LOCKD 1
+#define CONFIG_SOUND_OSS_CORE 1
+#define CONFIG_STE10XP 1
+#define CONFIG_CPU_HAS_SYNC 1
+#define CONFIG_MEDIA_TUNER_MAX2165_MODULE 1
+#define CONFIG_LOGO 1
+#define CONFIG_USB_STORAGE 1
+#define CONFIG_STANDALONE 1
+#define CONFIG_MIPS 1
+#define CONFIG_IR_LIRC_CODEC 1
+#define CONFIG_BLOCK 1
+#define CONFIG_HAVE_IDE 1
+#define CONFIG_MEDIA_TUNER_TDA827X_MODULE 1
+#define CONFIG_INIT_ENV_ARG_LIMIT 32
+#define CONFIG_GENERIC_GPIO 1
+#define CONFIG_ROOT_NFS 1
+#define CONFIG_TMPFS_POSIX_ACL 1
+#define CONFIG_BUG 1
+#define CONFIG_SPI 1
+#define CONFIG_NTFS_RW 1
+#define CONFIG_VT 1
+#define CONFIG_SPLIT_PTLOCK_CPUS 4
+#define CONFIG_V4L_USB_DRIVERS 1
+#define CONFIG_NLS 1
+#define CONFIG_SPI_SPIDEV 1
+#define CONFIG_SYS_HAS_CPU_LOONGSON1C 1
+#define CONFIG_SYN_COOKIES 1
+#define CONFIG_SPI_BITBANG 1
+#define CONFIG_MEDIA_TUNER_TDA18271_MODULE 1
+#define CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN 1
+#define CONFIG_LS1B_SPI0 1
+#define CONFIG_PREEMPT_VOLUNTARY 1
+#define CONFIG_CRYPTO_WORKQUEUE 1
+#define CONFIG_USB_EHCI_HCD 1
+#define CONFIG_CAN_CALC_BITTIMING 1
+#define CONFIG_SND_PCM_OSS 1
+#define CONFIG_NETDEVICES 1
+#define CONFIG_IOSCHED_DEADLINE 1
+#define CONFIG_INITRAMFS_ROOT_GID 0
+#define CONFIG_EVENTFD 1
+#define CONFIG_FS_POSIX_ACL 1
+#define CONFIG_DEFCONFIG_LIST "/lib/modules/$UNAME_RELEASE/.config"
+#define CONFIG_LOONGSON_GMAC 1
+#define CONFIG_MACH_LOONGSON 1
+#define CONFIG_LS1X_FB0 1
+#define CONFIG_SERIAL_8250_CONSOLE 1
+#define CONFIG_JUMP_LABEL 1
+#define CONFIG_IR_RC5_SZ_DECODER 1
+#define CONFIG_PROC_PAGE_MONITOR 1
+#define CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV 1
+#define CONFIG_SCSI_WAIT_SCAN_MODULE 1
+#define CONFIG_SELECT_MEMORY_MODEL 1
+#define CONFIG_CRYPTO_DEFLATE 1
+#define CONFIG_HAVE_DYNAMIC_FTRACE 1
+#define CONFIG_CEVT_R4K 1
+#define CONFIG_USB_MASS_STORAGE_MODULE 1
+#define CONFIG_DEFAULT_CFQ 1
+#define CONFIG_MEDIA_SUPPORT 1
+#define CONFIG_EXT3_FS 1
+#define CONFIG_FAT_FS 1
+#define CONFIG_CPU_SUPPORTS_CPUFREQ 1
+#define CONFIG_GENERIC_CLOCKEVENTS 1
+#define CONFIG_IOSCHED_CFQ 1
+#define CONFIG_CONSOLE_TRANSLATIONS 1
+#define CONFIG_I2C_LS1X 1
+#define CONFIG_USB_OHCI_HCD 1
+#define CONFIG_USB_GSPCA_MODULE 1
+#define CONFIG_DUMMY_CONSOLE 1
+#define CONFIG_MODULE_FORCE_LOAD 1
+#define CONFIG_TRACE_IRQFLAGS_SUPPORT 1
+#define CONFIG_NFS_V3_ACL 1
+#define CONFIG_TCP_CONG_ADVANCED 1
+#define CONFIG_SND_USB 1
+#define CONFIG_RD_GZIP 1
+#define CONFIG_CRYPTO_MD5 1
+#define CONFIG_SOC_CAMERA_OV9650 1
+#define CONFIG_MEDIA_TUNER_TEA5767_MODULE 1
+#define CONFIG_HAVE_GENERIC_HARDIRQS 1
+#define CONFIG_BINFMT_ELF 1
+#define CONFIG_SCSI_PROC_FS 1
+#define CONFIG_HOTPLUG 1
+#define CONFIG_IP_PIMSM_V1 1
+#define CONFIG_SLABINFO 1
+#define CONFIG_LOGO_LINUX_MONO 1
+#define CONFIG_SPI_MASTER 1
+#define CONFIG_VT_HW_CONSOLE_BINDING 1
+#define CONFIG_GENERIC_CALIBRATE_DELAY 1
+#define CONFIG_BROKEN_ON_SMP 1
+#define CONFIG_ARCH_REQUIRE_GPIOLIB 1
+#define CONFIG_TMPFS 1
+#define CONFIG_ANON_INODES 1
+#define CONFIG_NLS_CODEPAGE_936 1
+#define CONFIG_FUTEX 1
+#define CONFIG_IP_PNP_DHCP 1
+#define CONFIG_CPU_SUPPORTS_32BIT_KERNEL 1
+#define CONFIG_RTC_HCTOSYS 1
+#define CONFIG_SERIAL_CORE_CONSOLE 1
+#define CONFIG_CPU_LS232 1
+#define CONFIG_SLUB_DEBUG 1
+#define CONFIG_CRYPTO_ZLIB 1
+#define CONFIG_SYSVIPC 1
+#define CONFIG_CRYPTO_PCOMP2 1
+#define CONFIG_MODULES 1
+#define CONFIG_USB_GADGET 1
+#define CONFIG_MEDIA_TUNER_MXL5005S_MODULE 1
+#define CONFIG_GPIO_LS1C 1
+#define CONFIG_SOUND 1
+#define CONFIG_MEDIA_TUNER_TDA9887_MODULE 1
+#define CONFIG_ARCH_HIBERNATION_POSSIBLE 1
+#define CONFIG_UNIX 1
+#define CONFIG_YAFFS_YAFFS1 1
+#define CONFIG_CRYPTO_HASH2 1
+#define CONFIG_USB_OHCI_HCD_LS1X 1
+#define CONFIG_CPU_HAS_WB 1
+#define CONFIG_DEFAULT_HOSTNAME "loongson"
+#define CONFIG_NFS_FS 1
+#define CONFIG_CRYPTO_ALGAPI 1
+#define CONFIG_MEDIA_TUNER 1
+#define CONFIG_MEDIA_TUNER_SIMPLE_MODULE 1
+#define CONFIG_MTD_CFI_I1 1
+#define CONFIG_BLK_DEV_INTEGRITY 1
+#define CONFIG_NFS_COMMON 1
+#define CONFIG_CRYPTO_HASH 1
+#define CONFIG_LOG_BUF_SHIFT 17
+#define CONFIG_SOUND_OSS_CORE_PRECLAIM 1
+#define CONFIG_SND_MIPS 1
+#define CONFIG_VIRT_TO_BUS 1
+#define CONFIG_VFAT_FS 1
+#define CONFIG_BLK_DEV_LOOP 1
+#define CONFIG_MEDIA_TUNER_CUSTOMISE 1
+#define CONFIG_TRAD_SIGNALS 1
+#define CONFIG_MEDIA_TUNER_XC2028_MODULE 1
+#define CONFIG_SOC_CAMERA 1
+#define CONFIG_MTD_NAND_ECC 1
+#define CONFIG_MEDIA_CONTROLLER 1
+#define CONFIG_SERIAL_8250_RUNTIME_UARTS 6
+#define CONFIG_FS_MBCACHE 1
+#define CONFIG_RTC_CLASS 1
+#define CONFIG_CRC7 1
+#define CONFIG_TMPFS_XATTR 1
+#define CONFIG_INITRAMFS_ROOT_UID 0
+#define CONFIG_YAFFS_AUTO_YAFFS2 1
+#define CONFIG_HAVE_FUNCTION_TRACER 1
+#define CONFIG_CRYPTO_MANAGER2 1
+#define CONFIG_USB_GADGET_VBUS_DRAW 2
+#define CONFIG_SLUB 1
+#define CONFIG_CONFIGFS_FS 1
+#define CONFIG_I2C 1
+#define CONFIG_CRYPTO_ECB 1
+#define CONFIG_MTD_NAND_LS1X 1
+#define CONFIG_BASE_FULL 1
+#define CONFIG_FB_CFB_IMAGEBLIT 1
+#define CONFIG_ZLIB_DEFLATE 1
+#define CONFIG_SUNRPC 1
+#define CONFIG_YAFFS_FS 1
+#define CONFIG_LS1X_GMAC0_RMII 1
+#define CONFIG_GPIO_SYSFS 1
+#define CONFIG_KALLSYMS 1
+#define CONFIG_GENERIC_ATOMIC64 1
+#define CONFIG_RTC_HCTOSYS_DEVICE "rtc0"
+#define CONFIG_MII 1
+#define CONFIG_SIGNALFD 1
+#define CONFIG_CRYPTO_SHA1 1
+#define CONFIG_CSRC_R4K 1
+#define CONFIG_CSRC_R4K_LIB 1
+#define CONFIG_LOCKD_V4 1
+#define CONFIG_USB_GADGET_DUALSPEED 1
+#define CONFIG_HAS_IOMEM 1
+#define CONFIG_SOC_CAMERA_LS1C 1
+#define CONFIG_GENERIC_IRQ_PROBE 1
+#define CONFIG_SYS_SUPPORTS_ZBOOT 1
+#define CONFIG_PROC_KCORE 1
+#define CONFIG_MTD_MAP_BANK_WIDTH_1 1
+#define CONFIG_EPOLL 1
+#define CONFIG_SND_PCM 1
+#define CONFIG_YAFFS_XATTR 1
+#define CONFIG_IR_SONY_DECODER 1
+#define CONFIG_CPU_SUPPORTS_HIGHMEM 1
+#define CONFIG_NET 1
+#define CONFIG_INPUT_EVDEV 1
+#define CONFIG_SND_JACK 1
+#define CONFIG_PACKET 1
+#define CONFIG_NFS_V3 1
+#define CONFIG_INET 1
+#define CONFIG_IP_PNP_BOOTP 1
+#define CONFIG_PREVENT_FIRMWARE_BUILD 1
+#define CONFIG_RTC_LIB 1
+#define CONFIG_HAVE_KPROBES 1
+#define CONFIG_CRYPTO_AES 1
+#define CONFIG_GPIOLIB 1
+#define CONFIG_LIRC 1
+#define CONFIG_IP_MROUTE 1
+#define CONFIG_32BIT 1
+#define CONFIG_SND_DRIVERS 1
+#define CONFIG_MEDIA_TUNER_MT2266_MODULE 1
+#define CONFIG_LOCKDEP_SUPPORT 1
+#define CONFIG_POSIX_MQUEUE 1
+#define CONFIG_USB_ARCH_HAS_EHCI 1
+#define CONFIG_MTD_BLKDEVS 1
+#define CONFIG_VIDEO_CAPTURE_DRIVERS 1
+#define CONFIG_SND_PCM_OSS_PLUGINS 1
+#define CONFIG_AUTOFS4_FS 1
+#define CONFIG_SYSCTL_SYSCALL 1
+#define CONFIG_INPUT_MOUSEDEV_SCREEN_X 1024
+#define CONFIG_NEED_DMA_MAP_STATE 1
+#define CONFIG_FONT_8x8 1
+#define CONFIG_LOONGSON_UART_BASE 1
+#define CONFIG_HAVE_KERNEL_GZIP 1
+#define CONFIG_NEED_PER_CPU_KM 1
+#define CONFIG_TCP_CONG_WESTWOOD 1
+#define CONFIG_KALLSYMS_ALL 1
+#define CONFIG_CRYPTO_SHA256 1
+#define CONFIG_HAVE_FTRACE_MCOUNT_RECORD 1
+#define CONFIG_HW_CONSOLE 1
+#define CONFIG_SND_SPI 1
+#define CONFIG_IOSCHED_NOOP 1
+#define CONFIG_GENERIC_ACL 1
+#define CONFIG_DEBUG_KERNEL 1
+#define CONFIG_LOCALVERSION ""
+#define CONFIG_RADIO_ADAPTERS 1
+#define CONFIG_CAN_RAW 1
+#define CONFIG_CRYPTO 1
+#define CONFIG_SCHED_DEBUG 1
+#define CONFIG_DEFAULT_MMAP_MIN_ADDR 65536
+#define CONFIG_MEDIA_TUNER_TDA18218_MODULE 1
+#define CONFIG_HAVE_DMA_API_DEBUG 1
+#define CONFIG_DEFAULT_CUBIC 1
+#define CONFIG_IP_PIMSM_V2 1
+#define CONFIG_USB_ARCH_HAS_HCD 1
+#define CONFIG_GENERIC_IRQ_SHOW 1
+#define CONFIG_SCSI_MOD 1
+#define CONFIG_SERIAL_CORE 1
+#define CONFIG_EMBEDDED 1
+#define CONFIG_HAVE_KRETPROBES 1
+#define CONFIG_VIDEO_DEV 1
+#define CONFIG_NFS_V4 1
+#define CONFIG_INLINE_READ_UNLOCK 1
+#define CONFIG_SOUND_PRIME 1
+#define CONFIG_HAS_DMA 1
+#define CONFIG_SCSI 1
+#define CONFIG_FB_CFB_FILLRECT 1
+#define CONFIG_FONT_8x16 1
+#define CONFIG_MEDIA_TUNER_TDA8290_MODULE 1
+#define CONFIG_MEDIA_TUNER_TDA18212_MODULE 1
+#define CONFIG_PHYLIB 1
+#define CONFIG_LOCALVERSION_AUTO 1
+#define CONFIG_MEDIA_TUNER_MT20XX_MODULE 1
+#define CONFIG_MISC_FILESYSTEMS 1
+#define CONFIG_INLINE_READ_UNLOCK_IRQ 1
+#define CONFIG_REALTEK_PHY 1
+#define CONFIG_MEDIA_TUNER_MC44S803_MODULE 1
+#define CONFIG_SND_VERBOSE_PROCFS 1
+#define CONFIG_CHR_DEV_SG 1
+#define CONFIG_YAFFS_YAFFS2 1
+#define CONFIG_CRYPTO_ARC4 1
+#define CONFIG_BOOT_ELF32 1
+#define CONFIG_CRYPTO_MANAGER 1
+#define CONFIG_MTD_NAND 1
+#define CONFIG_RT_MUTEXES 1
+#define CONFIG_MEDIA_TUNER_MXL5007T_MODULE 1
+#define CONFIG_EXPERT 1
+#define CONFIG_HZ_250 1
+#define CONFIG_PERF_USE_VMALLOC 1
+#define CONFIG_FAT_DEFAULT_IOCHARSET "cp936"
+#define CONFIG_ARCH_POPULATES_NODE_MAP 1
+#define CONFIG_FRAME_WARN 1024
+#define CONFIG_GENERIC_HWEIGHT 1
+#define CONFIG_INITRAMFS_SOURCE "./ramdisk.cpio"
+#define CONFIG_SYS_SUPPORTS_HIGHMEM 1
+#define CONFIG_NFS_USE_LEGACY_DNS 1
+#define CONFIG_INLINE_SPIN_UNLOCK 1
+#define CONFIG_HAS_IOPORT 1
+#define CONFIG_VIDEOBUF_DMA_CONTIG 1
+#define CONFIG_DCB 1
+#define CONFIG_HZ 250
+#define CONFIG_I2C_HELPER_AUTO 1
+#define CONFIG_INLINE_SPIN_UNLOCK_IRQ 1
+#define CONFIG_SERIAL_8250_NR_UARTS 6
+#define CONFIG_SOUND_LS1X_UDA1342 1
+#define CONFIG_DEFAULT_IOSCHED "cfq"
+#define CONFIG_NLATTR 1
+#define CONFIG_TCP_CONG_CUBIC 1
+#define CONFIG_SND_SUPPORT_OLD_API 1
+#define CONFIG_SYSFS 1
+#define CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST 1
+#define CONFIG_FB 1
+#define CONFIG_I2C_COMPAT 1
+#define CONFIG_LS1C_MACH 1
+#define CONFIG_MSDOS_PARTITION 1
+#define CONFIG_HAVE_OPROFILE 1
+#define CONFIG_HAVE_GENERIC_DMA_COHERENT 1
+#define CONFIG_IP_PNP_RARP 1
+#define CONFIG_LOGO_LINUX_VGA16 1
+#define CONFIG_HAVE_ARCH_KGDB 1
+#define CONFIG_USB_ARCH_HAS_OHCI 1
+#define CONFIG_ZONE_DMA_FLAG 0
+#define CONFIG_FB_LOONGSON1 1
+#define CONFIG_MTD_MAP_BANK_WIDTH_2 1
+#define CONFIG_VIDEO_MEDIA 1
+#define CONFIG_IP_MULTICAST 1
+#define CONFIG_GENERIC_CMOS_UPDATE 1
+#define CONFIG_DEFAULT_SECURITY ""
+#define CONFIG_TICK_ONESHOT 1
+#define CONFIG_CPU_LOONGSON1C 1
+#define CONFIG_MEDIA_TUNER_MT2060_MODULE 1
+#define CONFIG_TINY_RCU 1
+#define CONFIG_MODVERSIONS 1
+#define CONFIG_RWSEM_GENERIC_SPINLOCK 1
+#define CONFIG_HAVE_DMA_ATTRS 1
+#define CONFIG_EARLY_PRINTK 1
+#define CONFIG_HAVE_FUNCTION_GRAPH_TRACER 1
+#define CONFIG_VIDEOBUF2_CORE 1
+#define CONFIG_NTFS_FS 1
+#define CONFIG_MIPS_L1_CACHE_SHIFT 5
+#define CONFIG_BASE_SMALL 0
+#define CONFIG_CRYPTO_BLKCIPHER2 1
+#define CONFIG_PROC_FS 1
+#define CONFIG_MTD_BLOCK 1
+#define CONFIG_RC_MAP 1
+#define CONFIG_SYS_SUPPORTS_ARBIT_HZ 1
+#define CONFIG_SND 1
+#define CONFIG_FLATMEM 1
+#define CONFIG_IR_RC6_DECODER 1
+#define CONFIG_PAGEFLAGS_EXTENDED 1
+#define CONFIG_IKCONFIG 1
+#define CONFIG_INITRAMFS_COMPRESSION_NONE 1
+#define CONFIG_SYSCTL 1
+#define CONFIG_HAVE_C_RECORDMCOUNT 1
+#define CONFIG_MEDIA_TUNER_MT2131_MODULE 1
+#define CONFIG_TCP_CONG_BIC 1
+#define CONFIG_HAVE_PERF_EVENTS 1
+#define CONFIG_CRAMFS 1
+#define CONFIG_SND_TIMER 1
+#define CONFIG_USB_EHCI_TT_NEWSCHED 1
+#define CONFIG_FAT_DEFAULT_CODEPAGE 936
+#define CONFIG_BLK_DEV 1
+#define CONFIG_NFS_ACL_SUPPORT 1
+#define CONFIG_TRACING_SUPPORT 1
+#define CONFIG_UNIX98_PTYS 1
+#define CONFIG_JBD 1
+#define CONFIG_INPUT_MOUSEDEV_SCREEN_Y 768
+#define CONFIG_HAVE_KERNEL_LZO 1
+#define CONFIG_IKCONFIG_PROC 1
+#define CONFIG_DMA_NONCOHERENT 1
+#define CONFIG_USB_SUPPORT 1
+#define CONFIG_INPUT_POLLDEV 1
+#define CONFIG_MTD_CHAR 1
+#define CONFIG_INET_LRO 1
+#define CONFIG_FLAT_NODE_MEM_MAP 1
+#define CONFIG_VT_CONSOLE 1
+#define CONFIG_IR_RC5_DECODER 1
+#define CONFIG_POSIX_MQUEUE_SYSCTL 1
+#define CONFIG_IRQ_CPU 1
+#define CONFIG_FB_CFB_COPYAREA 1
+#define CONFIG_GENERIC_CLOCKEVENTS_BUILD 1
+#define CONFIG_VIDEOBUF_GEN 1
+#define CONFIG_SYS_SUPPORTS_32BIT_KERNEL 1
+#define CONFIG_VIDEO_V4L2 1
+#define CONFIG_SYSVIPC_SYSCTL 1
+#define CONFIG_DECOMPRESS_GZIP 1
+#define CONFIG_YAFFS_DISABLE_TAGS_ECC 1
+#define CONFIG_CROSS_COMPILE ""
+#define CONFIG_MEDIA_TUNER_TEA5761_MODULE 1
+#define CONFIG_USB_GADGET_SELECTED 1
+#define CONFIG_NETWORK_SECMARK 1
+#define CONFIG_NFS_V4_1 1
+#define CONFIG_CAN_DEV 1
+#define CONFIG_LS1X_GMAC0 1
+#define CONFIG_CRC_CCITT 1
+#define CONFIG_BLK_DEV_SD 1
+#define CONFIG_MODULE_UNLOAD 1
+#define CONFIG_AVERAGE 1
+#define CONFIG_BITREVERSE 1
+#define CONFIG_CRYPTO_PCOMP 1
+#define CONFIG_VIDEO_V4L2_COMMON 1
+#define CONFIG_USB_DWC_OTG_LPM 1
+#define CONFIG_CRYPTO_BLKCIPHER 1
+#define CONFIG_FILE_LOCKING 1
+#define CONFIG_SND_SOC_I2C_AND_SPI 1
+#define CONFIG_USB_EHCI_HCD_LS1X 1
+#define CONFIG_AIO 1
+#define CONFIG_ARCH_SUPPORTS_OPROFILE 1
+#define CONFIG_GENERIC_HARDIRQS 1
+#define CONFIG_RTC_INTF_DEV 1
+#define CONFIG_MTD_MAP_BANK_WIDTH_4 1
+#define CONFIG_CPU_LITTLE_ENDIAN 1
+#define CONFIG_NLS_DEFAULT "cp936"
+#define CONFIG_CRYPTO_AEAD2 1
+#define CONFIG_DEBUG_INFO 1
+#define CONFIG_CRYPTO_ALGAPI2 1
+#define CONFIG_INPUT 1
+#define CONFIG_PROC_SYSCTL 1
+#define CONFIG_MMU 1
+#define CONFIG_HAVE_IRQ_WORK 1
+#define CONFIG_INLINE_WRITE_UNLOCK 1
diff -uNra linux-3.0.82/include/generated/bounds.h linux-3.0.82x/include/generated/bounds.h
--- linux-3.0.82/include/generated/bounds.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/include/generated/bounds.h	2017-09-23 03:42:50.318674147 +0800
@@ -0,0 +1,14 @@
+#ifndef __LINUX_BOUNDS_H__
+#define __LINUX_BOUNDS_H__
+/*
+ * DO NOT MODIFY.
+ *
+ * This file was generated by Kbuild
+ *
+ */
+
+#define NR_PAGEFLAGS 22 /* __NR_PAGEFLAGS	 # */
+#define MAX_NR_ZONES 2 /* __MAX_NR_ZONES	 # */
+#define NR_PCG_FLAGS 7 /* __NR_PCG_FLAGS	 # */
+
+#endif
diff -uNra linux-3.0.82/include/generated/compile.h linux-3.0.82x/include/generated/compile.h
--- linux-3.0.82/include/generated/compile.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/include/generated/compile.h	2017-09-23 03:42:50.318674147 +0800
@@ -0,0 +1,6 @@
+/* This file is auto generated, version 579 */
+#define UTS_MACHINE "mips"
+#define UTS_VERSION "#579 Tue Aug 22 10:45:48 CST 2017"
+#define LINUX_COMPILE_BY "fsy"
+#define LINUX_COMPILE_HOST "fsy-Lenovo-V2000"
+#define LINUX_COMPILER "gcc version 4.3.6 20101004 (prerelease) (GCC) "
diff -uNra linux-3.0.82/include/generated/utsrelease.h linux-3.0.82x/include/generated/utsrelease.h
--- linux-3.0.82/include/generated/utsrelease.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/include/generated/utsrelease.h	2017-09-23 03:42:50.318674147 +0800
@@ -0,0 +1 @@
+#define UTS_RELEASE "3.0.82"
diff -uNra linux-3.0.82/include/linux/cramfs_fs_sb.h linux-3.0.82x/include/linux/cramfs_fs_sb.h
--- linux-3.0.82/include/linux/cramfs_fs_sb.h	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/include/linux/cramfs_fs_sb.h	2017-09-23 03:42:50.318674147 +0800
@@ -4,12 +4,28 @@
 /*
  * cramfs super-block data in memory
  */
+
+#include <linux/mtd/mtd.h>
+#include <mtd/mtd-abi.h> 
+
+
+struct cramfs_nand_info {		//lxy
+    unsigned int erasesize_shift;
+    uint32_t *block_map;
+    uint32_t size;
+};
+
+
 struct cramfs_sb_info {
 			unsigned long magic;
 			unsigned long size;
 			unsigned long blocks;
 			unsigned long files;
 			unsigned long flags;
+
+			
+			struct cramfs_nand_info cram_nand_inf;		//lxy
+			
 };
 
 static inline struct cramfs_sb_info *CRAMFS_SB(struct super_block *sb)
diff -uNra linux-3.0.82/include/linux/earlysuspend.h linux-3.0.82x/include/linux/earlysuspend.h
--- linux-3.0.82/include/linux/earlysuspend.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/include/linux/earlysuspend.h	2017-09-23 03:42:50.318674147 +0800
@@ -0,0 +1,56 @@
+/* include/linux/earlysuspend.h
+ *
+ * Copyright (C) 2007-2008 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _LINUX_EARLYSUSPEND_H
+#define _LINUX_EARLYSUSPEND_H
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+#include <linux/list.h>
+#endif
+
+/* The early_suspend structure defines suspend and resume hooks to be called
+ * when the user visible sleep state of the system changes, and a level to
+ * control the order. They can be used to turn off the screen and input
+ * devices that are not used for wakeup.
+ * Suspend handlers are called in low to high level order, resume handlers are
+ * called in the opposite order. If, when calling register_early_suspend,
+ * the suspend handlers have already been called without a matching call to the
+ * resume handlers, the suspend handler will be called directly from
+ * register_early_suspend. This direct call can violate the normal level order.
+ */
+enum {
+	EARLY_SUSPEND_LEVEL_BLANK_SCREEN = 50,
+	EARLY_SUSPEND_LEVEL_STOP_DRAWING = 100,
+	EARLY_SUSPEND_LEVEL_DISABLE_FB = 150,
+};
+struct early_suspend {
+#ifdef CONFIG_HAS_EARLYSUSPEND
+	struct list_head link;
+	int level;
+	void (*suspend)(struct early_suspend *h);
+	void (*resume)(struct early_suspend *h);
+#endif
+};
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+void register_early_suspend(struct early_suspend *handler);
+void unregister_early_suspend(struct early_suspend *handler);
+#else
+#define register_early_suspend(handler) do { } while (0)
+#define unregister_early_suspend(handler) do { } while (0)
+#endif
+
+#endif
+
diff -uNra linux-3.0.82/include/linux/i2c/ft5x06_ts.h linux-3.0.82x/include/linux/i2c/ft5x06_ts.h
--- linux-3.0.82/include/linux/i2c/ft5x06_ts.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/include/linux/i2c/ft5x06_ts.h	2017-09-23 03:42:50.318674147 +0800
@@ -0,0 +1,82 @@
+#ifndef __LINUX_FT5X0X_TS_H__
+#define __LINUX_FT5X0X_TS_H__
+
+#define SCREEN_MAX_X    800
+#define SCREEN_MAX_Y    480
+#define PRESS_MAX       255
+
+#define FT5X0X_NAME	"ft5x06_ts"
+
+struct ft5x0x_ts_platform_data{
+	u16	intr;		/* irq number	*/
+	int	(*init_platform_hw)(void);
+	int (*wake_platform_hw)(void);
+};
+
+enum ft5x0x_ts_regs {
+	FT5X0X_REG_THGROUP					= 0x80,
+	FT5X0X_REG_THPEAK						= 0x81,
+	FT5X0X_REG_THCAL						= 0x82,
+	FT5X0X_REG_THWATER					= 0x83,
+	FT5X0X_REG_THTEMP					= 0x84,
+	FT5X0X_REG_THDIFF						= 0x85,				
+	FT5X0X_REG_CTRL						= 0x86,
+	FT5X0X_REG_TIMEENTERMONITOR			= 0x87,
+	FT5X0X_REG_PERIODACTIVE				= 0x88,
+	FT5X0X_REG_PERIODMONITOR			= 0x89,
+	FT5X0X_REG_HEIGHT_B					= 0x8a,
+	FT5X0X_REG_MAX_FRAME					= 0x8b,
+	FT5X0X_REG_DIST_MOVE					= 0x8c,
+	FT5X0X_REG_DIST_POINT				= 0x8d,
+	FT5X0X_REG_FEG_FRAME					= 0x8e,
+	FT5X0X_REG_SINGLE_CLICK_OFFSET		= 0x8f,
+	FT5X0X_REG_DOUBLE_CLICK_TIME_MIN	= 0x90,
+	FT5X0X_REG_SINGLE_CLICK_TIME			= 0x91,
+	FT5X0X_REG_LEFT_RIGHT_OFFSET		= 0x92,
+	FT5X0X_REG_UP_DOWN_OFFSET			= 0x93,
+	FT5X0X_REG_DISTANCE_LEFT_RIGHT		= 0x94,
+	FT5X0X_REG_DISTANCE_UP_DOWN		= 0x95,
+	FT5X0X_REG_ZOOM_DIS_SQR				= 0x96,
+	FT5X0X_REG_RADIAN_VALUE				=0x97,
+	FT5X0X_REG_MAX_X_HIGH                       	= 0x98,
+	FT5X0X_REG_MAX_X_LOW             			= 0x99,
+	FT5X0X_REG_MAX_Y_HIGH            			= 0x9a,
+	FT5X0X_REG_MAX_Y_LOW             			= 0x9b,
+	FT5X0X_REG_K_X_HIGH            			= 0x9c,
+	FT5X0X_REG_K_X_LOW             			= 0x9d,
+	FT5X0X_REG_K_Y_HIGH            			= 0x9e,
+	FT5X0X_REG_K_Y_LOW             			= 0x9f,
+	FT5X0X_REG_AUTO_CLB_MODE			= 0xa0,
+	FT5X0X_REG_LIB_VERSION_H 				= 0xa1,
+	FT5X0X_REG_LIB_VERSION_L 				= 0xa2,		
+	FT5X0X_REG_CIPHER						= 0xa3,
+	FT5X0X_REG_MODE						= 0xa4,
+	FT5X0X_REG_PMODE						= 0xa5,	/* Power Consume Mode		*/	
+	FT5X0X_REG_FIRMID						= 0xa6,
+	FT5X0X_REG_STATE						= 0xa7,
+	FT5X0X_REG_FT5201ID					= 0xa8,
+	FT5X0X_REG_ERR						= 0xa9,
+	FT5X0X_REG_CLB						= 0xaa,
+};
+
+//FT5X0X_REG_PMODE
+#define PMODE_ACTIVE        0x00
+#define PMODE_MONITOR       0x01
+#define PMODE_STANDBY       0x02
+#define PMODE_HIBERNATE     0x03
+
+
+	#ifndef ABS_MT_TOUCH_MAJOR
+	#define ABS_MT_TOUCH_MAJOR	0x30	/* touching ellipse */
+	#define ABS_MT_TOUCH_MINOR	0x31	/* (omit if circular) */
+	#define ABS_MT_WIDTH_MAJOR	0x32	/* approaching ellipse */
+	#define ABS_MT_WIDTH_MINOR	0x33	/* (omit if circular) */
+	#define ABS_MT_ORIENTATION	0x34	/* Ellipse orientation */
+	#define ABS_MT_POSITION_X	0x35	/* Center X ellipse position */
+	#define ABS_MT_POSITION_Y	0x36	/* Center Y ellipse position */
+	#define ABS_MT_TOOL_TYPE	0x37	/* Type of touching device */
+	#define ABS_MT_BLOB_ID		0x38	/* Group set of pkts as blob */
+	#endif /* ABS_MT_TOUCH_MAJOR */
+
+
+#endif
diff -uNra linux-3.0.82/include/linux/input/74x165_gpio_keys_polled.h linux-3.0.82x/include/linux/input/74x165_gpio_keys_polled.h
--- linux-3.0.82/include/linux/input/74x165_gpio_keys_polled.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/include/linux/input/74x165_gpio_keys_polled.h	2017-09-23 03:42:50.318674147 +0800
@@ -0,0 +1,20 @@
+#ifndef _74x165_GPIO_KEYS_H
+#define _74x165_GPIO_KEYS_H
+
+struct gen_74x165_platform_data {
+	int q7;
+	int cp;
+	int pl;
+	int debounce_interval;
+	
+	struct gpio_keys_button *buttons;
+	int nbuttons;
+	unsigned int poll_interval;	/* polling interval in msecs -
+					   for polling driver only */
+	unsigned int rep:1;		/* enable input subsystem auto repeat */
+	int (*enable)(struct device *dev);
+	void (*disable)(struct device *dev);
+	const char *name;		/* input device name */
+};
+
+#endif
diff -uNra linux-3.0.82/include/linux/jbt6k74.h linux-3.0.82x/include/linux/jbt6k74.h
--- linux-3.0.82/include/linux/jbt6k74.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/include/linux/jbt6k74.h	2017-09-23 03:42:50.318674147 +0800
@@ -0,0 +1,36 @@
+#ifndef __JBT6K74_H__
+#define __JBT6K74_H__
+
+#include <linux/spi/spi.h>
+
+enum jbt_resolution {
+	JBT_RESOLUTION_VGA,
+	JBT_RESOLUTION_QVGA,
+};
+
+enum jbt_power_mode {
+	JBT_POWER_MODE_OFF,
+	JBT_POWER_MODE_STANDBY,
+	JBT_POWER_MODE_NORMAL,
+};
+
+extern void jbt6k74_setpower(enum jbt_power_mode new_power);
+extern int jbt6k74_prepare_resolutionchange(enum jbt_resolution new_resolution);
+extern int jbt6k74_finish_resolutionchange(enum jbt_resolution new_resolution);
+
+
+/*
+ *  struct jbt6k74_platform_data - Platform data for jbt6k74 driver
+ *  @probe_completed: Callback to be called when the driver has been
+ *  successfully probed.
+ *  @enable_pixel_clock: Callback to enable or disable the pixelclock of the
+ *  gpu.
+ *  @gpio_reset: Reset gpio pin number.
+ */
+struct jbt6k74_platform_data {
+	void (*probe_completed)(struct device *dev);
+
+	int gpio_reset;
+};
+
+#endif
diff -uNra linux-3.0.82/include/linux/rotary_encoder.h linux-3.0.82x/include/linux/rotary_encoder.h
--- linux-3.0.82/include/linux/rotary_encoder.h	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/include/linux/rotary_encoder.h	2017-09-23 03:42:50.318674147 +0800
@@ -6,8 +6,13 @@
 	unsigned int axis;
 	unsigned int gpio_a;
 	unsigned int gpio_b;
+	unsigned int gpio_c;
 	unsigned int inverted_a;
 	unsigned int inverted_b;
+	unsigned int key;
+	/* key debounce interval in milli-second */
+	unsigned int debounce_ms;
+	bool active_low;
 	bool relative_axis;
 	bool rollover;
 	bool half_period;
diff -uNra linux-3.0.82/include/linux/soundcard.h linux-3.0.82x/include/linux/soundcard.h
--- linux-3.0.82/include/linux/soundcard.h	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/include/linux/soundcard.h	2017-09-23 03:42:50.318674147 +0800
@@ -554,6 +554,7 @@
 #define SNDCTL_DSP_CHANNELS		_SIOWR('P', 6, int)
 #define SOUND_PCM_WRITE_CHANNELS	SNDCTL_DSP_CHANNELS
 #define SOUND_PCM_WRITE_FILTER		_SIOWR('P', 7, int)
+#define SNDCTL_PCM_PAUSE		_SIOR ('P', 70, int) //add by xushichao
 #define SNDCTL_DSP_POST			_SIO  ('P', 8)
 #define SNDCTL_DSP_SUBDIVIDE		_SIOWR('P', 9, int)
 #define SNDCTL_DSP_SETFRAGMENT		_SIOWR('P',10, int)
diff -uNra linux-3.0.82/include/linux/spi/74x165.h linux-3.0.82x/include/linux/spi/74x165.h
--- linux-3.0.82/include/linux/spi/74x165.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/include/linux/spi/74x165.h	2017-09-23 03:42:50.322674134 +0800
@@ -0,0 +1,13 @@
+#ifndef LINUX_SPI_74X165_H
+#define LINUX_SPI_74X165_H
+
+struct nxp_74x165_chip_platform_data {
+	/* number assigned to the first GPIO */
+	unsigned	base;
+	/* GPIO used for latching chip(s) */
+	unsigned 	latch;
+	/* number of chips daisy chained */
+	unsigned	daisy_chained;
+};
+
+#endif
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/include/linux/ssd1305.h linux-3.0.82x/include/linux/ssd1305.h
--- linux-3.0.82/include/linux/ssd1305.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/include/linux/ssd1305.h	2017-09-23 03:42:50.322674134 +0800
@@ -0,0 +1,42 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#ifndef _SSD1305_H_
+#define _SSD1305_H_
+
+struct ssd1305_platform_data {
+	unsigned int gpio_outpu;
+	
+	unsigned int gpios_res;
+	unsigned int gpios_cs;
+	unsigned int gpios_dc;
+	unsigned int gpios_rd;
+	unsigned int gpios_wr;
+	
+	unsigned int gpios_d0;
+	unsigned int gpios_d1;
+	unsigned int gpios_d2;
+	unsigned int gpios_d3;
+	unsigned int gpios_d4;
+	unsigned int gpios_d5;
+	unsigned int gpios_d6;
+	unsigned int gpios_d7;
+	
+	int datas_offset;
+};
+
+#endif /* _SSD1305_H_ */
+
diff -uNra linux-3.0.82/include/linux/st7565.h linux-3.0.82x/include/linux/st7565.h
--- linux-3.0.82/include/linux/st7565.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/include/linux/st7565.h	2017-09-23 03:42:50.322674134 +0800
@@ -0,0 +1,42 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#ifndef _ST7565_H_
+#define _ST7565_H_
+
+struct st7565_platform_data {
+	unsigned int gpio_outpu;
+	
+	unsigned int gpios_res;
+	unsigned int gpios_cs;
+	unsigned int gpios_dc;
+	unsigned int gpios_rd;
+	unsigned int gpios_wr;
+	
+	unsigned int gpios_d0;
+	unsigned int gpios_d1;
+	unsigned int gpios_d2;
+	unsigned int gpios_d3;
+	unsigned int gpios_d4;
+	unsigned int gpios_d5;
+	unsigned int gpios_d6;
+	unsigned int gpios_d7;
+	
+	int datas_offset;
+};
+
+#endif /* _ST7565_H_ */
+
diff -uNra linux-3.0.82/include/linux/st7920.h linux-3.0.82x/include/linux/st7920.h
--- linux-3.0.82/include/linux/st7920.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/include/linux/st7920.h	2017-09-23 03:42:50.322674134 +0800
@@ -0,0 +1,42 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#ifndef _ST7920_H_
+#define _ST7920_H_
+
+struct st7920_platform_data {
+	unsigned int gpio_outpu;
+	
+	unsigned int gpios_res;
+	unsigned int gpios_cs;
+	unsigned int gpios_sid;
+	unsigned int gpios_sck;
+	unsigned int gpios_psb;
+	
+	unsigned int gpios_d0;
+	unsigned int gpios_d1;
+	unsigned int gpios_d2;
+	unsigned int gpios_d3;
+	unsigned int gpios_d4;
+	unsigned int gpios_d5;
+	unsigned int gpios_d6;
+	unsigned int gpios_d7;
+	
+	int datas_offset;
+};
+
+#endif /* _ST7920_H_ */
+
diff -uNra linux-3.0.82/include/linux/usb/ehci_pdriver.h linux-3.0.82x/include/linux/usb/ehci_pdriver.h
--- linux-3.0.82/include/linux/usb/ehci_pdriver.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/include/linux/usb/ehci_pdriver.h	2017-09-23 03:42:50.322674134 +0800
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2012 Hauke Mehrtens <hauke@hauke-m.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software Foundation,
+ * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __USB_CORE_EHCI_PDRIVER_H
+#define __USB_CORE_EHCI_PDRIVER_H
+
+/**
+ * struct usb_ehci_pdata - platform_data for generic ehci driver
+ *
+ * @caps_offset:	offset of the EHCI Capability Registers to the start of
+ *			the io memory region provided to the driver.
+ * @has_tt:		set to 1 if TT is integrated in root hub.
+ * @port_power_on:	set to 1 if the controller needs a power up after
+ *			initialization.
+ * @port_power_off:	set to 1 if the controller needs to be powered down
+ *			after initialization.
+ * @no_io_watchdog:	set to 1 if the controller does not need the I/O
+ *			watchdog to run.
+ *
+ * These are general configuration options for the EHCI controller. All of
+ * these options are activating more or less workarounds for some hardware.
+ */
+struct usb_ehci_pdata {
+	int		caps_offset;
+	unsigned	has_tt:1;
+	unsigned	has_synopsys_hc_bug:1;
+	unsigned	big_endian_desc:1;
+	unsigned	big_endian_mmio:1;
+	unsigned	no_io_watchdog:1;
+
+	/* Turn on all power and clocks */
+	int (*power_on)(struct platform_device *pdev);
+	/* Turn off all power and clocks */
+	void (*power_off)(struct platform_device *pdev);
+	/* Turn on only VBUS suspend power and hotplug detection,
+	 * turn off everything else */
+	void (*power_suspend)(struct platform_device *pdev);
+};
+
+#endif /* __USB_CORE_EHCI_PDRIVER_H */
diff -uNra linux-3.0.82/include/linux/usb/gadget.h linux-3.0.82x/include/linux/usb/gadget.h
--- linux-3.0.82/include/linux/usb/gadget.h	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/include/linux/usb/gadget.h	2017-09-23 03:42:50.322674134 +0800
@@ -430,6 +430,9 @@
 	int	(*pullup) (struct usb_gadget *, int is_on);
 	int	(*ioctl)(struct usb_gadget *,
 				unsigned code, unsigned long param);
+#ifdef	CONFIG_USB_DWC_OTG_LPM
+	int	(*lpm_support) (struct usb_gadget *);
+#endif
 };
 
 /**
@@ -658,6 +661,15 @@
 	return gadget->ops->vbus_session(gadget, 0);
 }
 
+#ifdef CONFIG_USB_DWC_OTG_LPM
+static inline int usb_gadget_test_lpm_support (struct usb_gadget *gadget)
+{
+	if (!gadget->ops->lpm_support)
+		return -EOPNOTSUPP;
+	return gadget->ops->lpm_support (gadget);
+}
+#endif
+
 /**
  * usb_gadget_connect - software-controlled connect to USB host
  * @gadget:the peripheral being connected
diff -uNra linux-3.0.82/include/linux/usb/ohci_pdriver.h linux-3.0.82x/include/linux/usb/ohci_pdriver.h
--- linux-3.0.82/include/linux/usb/ohci_pdriver.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/include/linux/usb/ohci_pdriver.h	2017-09-23 03:42:50.322674134 +0800
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2012 Hauke Mehrtens <hauke@hauke-m.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software Foundation,
+ * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __USB_CORE_OHCI_PDRIVER_H
+#define __USB_CORE_OHCI_PDRIVER_H
+
+/**
+ * struct usb_ohci_pdata - platform_data for generic ohci driver
+ *
+ * @big_endian_desc:	BE descriptors
+ * @big_endian_mmio:	BE registers
+ * @no_big_frame_no:	no big endian frame_no shift
+ * @num_ports:		number of ports
+ *
+ * These are general configuration options for the OHCI controller. All of
+ * these options are activating more or less workarounds for some hardware.
+ */
+struct usb_ohci_pdata {
+	unsigned	big_endian_desc:1;
+	unsigned	big_endian_mmio:1;
+	unsigned	no_big_frame_no:1;
+	unsigned int	num_ports;
+
+	/* Turn on all power and clocks */
+	int (*power_on)(struct platform_device *pdev);
+	/* Turn off all power and clocks */
+	void (*power_off)(struct platform_device *pdev);
+	/* Turn on only VBUS suspend power and hotplug detection,
+	 * turn off everything else */
+	void (*power_suspend)(struct platform_device *pdev);
+};
+
+#endif /* __USB_CORE_OHCI_PDRIVER_H */
diff -uNra linux-3.0.82/include/linux/version.h linux-3.0.82x/include/linux/version.h
--- linux-3.0.82/include/linux/version.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/include/linux/version.h	2017-09-23 03:42:50.322674134 +0800
@@ -0,0 +1,2 @@
+#define LINUX_VERSION_CODE 196690
+#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c))
diff -uNra linux-3.0.82/include/linux/videodev2.h linux-3.0.82x/include/linux/videodev2.h
--- linux-3.0.82/include/linux/videodev2.h	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/include/linux/videodev2.h	2017-09-23 03:42:50.326674122 +0800
@@ -343,6 +343,8 @@
 #define V4L2_PIX_FMT_NV21    v4l2_fourcc('N', 'V', '2', '1') /* 12  Y/CrCb 4:2:0  */
 #define V4L2_PIX_FMT_NV16    v4l2_fourcc('N', 'V', '1', '6') /* 16  Y/CbCr 4:2:2  */
 #define V4L2_PIX_FMT_NV61    v4l2_fourcc('N', 'V', '6', '1') /* 16  Y/CrCb 4:2:2  */
+#define V4L2_PIX_FMT_NV24    v4l2_fourcc('N', 'V', '2', '4') /* 24  Y/CbCr 4:4:4  */
+#define V4L2_PIX_FMT_NV42    v4l2_fourcc('N', 'V', '4', '2') /* 24  Y/CrCb 4:4:4  */
 
 /* two non contiguous planes - one Y, one Cr + Cb interleaved  */
 #define V4L2_PIX_FMT_NV12M   v4l2_fourcc('N', 'M', '1', '2') /* 12  Y/CbCr 4:2:0  */
@@ -376,7 +378,16 @@
 #define V4L2_PIX_FMT_MJPEG    v4l2_fourcc('M', 'J', 'P', 'G') /* Motion-JPEG   */
 #define V4L2_PIX_FMT_JPEG     v4l2_fourcc('J', 'P', 'E', 'G') /* JFIF JPEG     */
 #define V4L2_PIX_FMT_DV       v4l2_fourcc('d', 'v', 's', 'd') /* 1394          */
-#define V4L2_PIX_FMT_MPEG     v4l2_fourcc('M', 'P', 'E', 'G') /* MPEG-1/2/4    */
+#define V4L2_PIX_FMT_MPEG     v4l2_fourcc('M', 'P', 'E', 'G') /* MPEG-1/2/4 Multiplexed */
+#define V4L2_PIX_FMT_H264     v4l2_fourcc('H', '2', '6', '4') /* H264 with start codes */
+#define V4L2_PIX_FMT_H264_NO_SC v4l2_fourcc('A', 'V', 'C', '1') /* H264 without start codes */
+#define V4L2_PIX_FMT_H263     v4l2_fourcc('H', '2', '6', '3') /* H263          */
+#define V4L2_PIX_FMT_MPEG1    v4l2_fourcc('M', 'P', 'G', '1') /* MPEG-1 ES     */
+#define V4L2_PIX_FMT_MPEG2    v4l2_fourcc('M', 'P', 'G', '2') /* MPEG-2 ES     */
+#define V4L2_PIX_FMT_MPEG4    v4l2_fourcc('M', 'P', 'G', '4') /* MPEG-4 ES     */
+#define V4L2_PIX_FMT_XVID     v4l2_fourcc('X', 'V', 'I', 'D') /* Xvid           */
+#define V4L2_PIX_FMT_VC1_ANNEX_G v4l2_fourcc('V', 'C', '1', 'G') /* SMPTE 421M Annex G compliant stream */
+#define V4L2_PIX_FMT_VC1_ANNEX_L v4l2_fourcc('V', 'C', '1', 'L') /* SMPTE 421M Annex L compliant stream */
 
 /*  Vendor-specific formats   */
 #define V4L2_PIX_FMT_CPIA1    v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */
@@ -392,6 +403,7 @@
 #define V4L2_PIX_FMT_SPCA561  v4l2_fourcc('S', '5', '6', '1') /* compressed GBRG bayer */
 #define V4L2_PIX_FMT_PAC207   v4l2_fourcc('P', '2', '0', '7') /* compressed BGGR bayer */
 #define V4L2_PIX_FMT_MR97310A v4l2_fourcc('M', '3', '1', '0') /* compressed BGGR bayer */
+#define V4L2_PIX_FMT_JL2005BCD v4l2_fourcc('J', 'L', '2', '0') /* compressed RGGB bayer */
 #define V4L2_PIX_FMT_SN9C2028 v4l2_fourcc('S', 'O', 'N', 'X') /* compressed GBRG bayer */
 #define V4L2_PIX_FMT_SQ905C   v4l2_fourcc('9', '0', '5', 'C') /* compressed RGGB bayer */
 #define V4L2_PIX_FMT_PJPG     v4l2_fourcc('P', 'J', 'P', 'G') /* Pixart 73xx JPEG */
@@ -402,6 +414,7 @@
 #define V4L2_PIX_FMT_CIT_YYVYUY v4l2_fourcc('C', 'I', 'T', 'V') /* one line of Y then 1 line of VYUY */
 #define V4L2_PIX_FMT_KONICA420  v4l2_fourcc('K', 'O', 'N', 'I') /* YUV420 planar in blocks of 256 pixels */
 #define V4L2_PIX_FMT_JPGL	v4l2_fourcc('J', 'P', 'G', 'L') /* JPEG-Lite */
+#define V4L2_PIX_FMT_SE401      v4l2_fourcc('S', '4', '0', '1') /* se401 janggu compressed rgb */
 
 /*
  *	F O R M A T   E N U M E R A T I O N
@@ -643,6 +656,10 @@
 #define V4L2_BUF_FLAG_ERROR	0x0040
 #define V4L2_BUF_FLAG_TIMECODE	0x0100	/* timecode field is valid */
 #define V4L2_BUF_FLAG_INPUT     0x0200  /* input field is valid */
+#define V4L2_BUF_FLAG_PREPARED	0x0400	/* Buffer is prepared for queuing */
+/* Cache handling flags */
+#define V4L2_BUF_FLAG_NO_CACHE_INVALIDATE	0x0800
+#define V4L2_BUF_FLAG_NO_CACHE_CLEAN		0x1000
 
 /*
  *	O V E R L A Y   P R E V I E W
@@ -728,6 +745,48 @@
 	struct v4l2_rect        c;
 };
 
+/* Hints for adjustments of selection rectangle */
+#define V4L2_SEL_FLAG_GE	0x00000001
+#define V4L2_SEL_FLAG_LE	0x00000002
+
+/* Selection targets */
+
+/* current cropping area */
+#define V4L2_SEL_TGT_CROP_ACTIVE	0
+/* default cropping area */
+#define V4L2_SEL_TGT_CROP_DEFAULT	1
+/* cropping bounds */
+#define V4L2_SEL_TGT_CROP_BOUNDS	2
+/* current composing area */
+#define V4L2_SEL_TGT_COMPOSE_ACTIVE	256
+/* default composing area */
+#define V4L2_SEL_TGT_COMPOSE_DEFAULT	257
+/* composing bounds */
+#define V4L2_SEL_TGT_COMPOSE_BOUNDS	258
+/* current composing area plus all padding pixels */
+#define V4L2_SEL_TGT_COMPOSE_PADDED	259
+
+/**
+ * struct v4l2_selection - selection info
+ * @type:	buffer type (do not use *_MPLANE types)
+ * @target:	selection target, used to choose one of possible rectangles
+ * @flags:	constraints flags
+ * @r:		coordinates of selection window
+ * @reserved:	for future use, rounds structure size to 64 bytes, set to zero
+ *
+ * Hardware may use multiple helper window to process a video stream.
+ * The structure is used to exchange this selection areas between
+ * an application and a driver.
+ */
+struct v4l2_selection {
+	__u32			type;
+	__u32			target;
+	__u32                   flags;
+	struct v4l2_rect        r;
+	__u32                   reserved[9];
+};
+
+
 /*
  *      A N A L O G   V I D E O   S T A N D A R D
  */
@@ -749,10 +808,10 @@
 #define V4L2_STD_PAL_Nc         ((v4l2_std_id)0x00000400)
 #define V4L2_STD_PAL_60         ((v4l2_std_id)0x00000800)
 
-#define V4L2_STD_NTSC_M         ((v4l2_std_id)0x00001000)
-#define V4L2_STD_NTSC_M_JP      ((v4l2_std_id)0x00002000)
+#define V4L2_STD_NTSC_M         ((v4l2_std_id)0x00001000)	/* BTSC */
+#define V4L2_STD_NTSC_M_JP      ((v4l2_std_id)0x00002000)	/* EIA-J */
 #define V4L2_STD_NTSC_443       ((v4l2_std_id)0x00004000)
-#define V4L2_STD_NTSC_M_KR      ((v4l2_std_id)0x00008000)
+#define V4L2_STD_NTSC_M_KR      ((v4l2_std_id)0x00008000)	/* FM A2 */
 
 #define V4L2_STD_SECAM_B        ((v4l2_std_id)0x00010000)
 #define V4L2_STD_SECAM_D        ((v4l2_std_id)0x00020000)
@@ -776,47 +835,86 @@
    v4l2-common.c should be fixed.
  */
 
-/* some merged standards */
-#define V4L2_STD_MN	(V4L2_STD_PAL_M|V4L2_STD_PAL_N|V4L2_STD_PAL_Nc|V4L2_STD_NTSC)
-#define V4L2_STD_B	(V4L2_STD_PAL_B|V4L2_STD_PAL_B1|V4L2_STD_SECAM_B)
-#define V4L2_STD_GH	(V4L2_STD_PAL_G|V4L2_STD_PAL_H|V4L2_STD_SECAM_G|V4L2_STD_SECAM_H)
-#define V4L2_STD_DK	(V4L2_STD_PAL_DK|V4L2_STD_SECAM_DK)
+/*
+ * Some macros to merge video standards in order to make live easier for the
+ * drivers and V4L2 applications
+ */
 
-/* some common needed stuff */
-#define V4L2_STD_PAL_BG		(V4L2_STD_PAL_B		|\
-				 V4L2_STD_PAL_B1	|\
-				 V4L2_STD_PAL_G)
-#define V4L2_STD_PAL_DK		(V4L2_STD_PAL_D		|\
-				 V4L2_STD_PAL_D1	|\
-				 V4L2_STD_PAL_K)
-#define V4L2_STD_PAL		(V4L2_STD_PAL_BG	|\
-				 V4L2_STD_PAL_DK	|\
-				 V4L2_STD_PAL_H		|\
-				 V4L2_STD_PAL_I)
+/*
+ * "Common" NTSC/M - It should be noticed that V4L2_STD_NTSC_443 is
+ * Missing here.
+ */
 #define V4L2_STD_NTSC           (V4L2_STD_NTSC_M	|\
 				 V4L2_STD_NTSC_M_JP     |\
 				 V4L2_STD_NTSC_M_KR)
+/* Secam macros */
 #define V4L2_STD_SECAM_DK      	(V4L2_STD_SECAM_D	|\
 				 V4L2_STD_SECAM_K	|\
 				 V4L2_STD_SECAM_K1)
+/* All Secam Standards */
 #define V4L2_STD_SECAM		(V4L2_STD_SECAM_B	|\
 				 V4L2_STD_SECAM_G	|\
 				 V4L2_STD_SECAM_H	|\
 				 V4L2_STD_SECAM_DK	|\
 				 V4L2_STD_SECAM_L       |\
 				 V4L2_STD_SECAM_LC)
+/* PAL macros */
+#define V4L2_STD_PAL_BG		(V4L2_STD_PAL_B		|\
+				 V4L2_STD_PAL_B1	|\
+				 V4L2_STD_PAL_G)
+#define V4L2_STD_PAL_DK		(V4L2_STD_PAL_D		|\
+				 V4L2_STD_PAL_D1	|\
+				 V4L2_STD_PAL_K)
+/*
+ * "Common" PAL - This macro is there to be compatible with the old
+ * V4L1 concept of "PAL": /BGDKHI.
+ * Several PAL standards are mising here: /M, /N and /Nc
+ */
+#define V4L2_STD_PAL		(V4L2_STD_PAL_BG	|\
+				 V4L2_STD_PAL_DK	|\
+				 V4L2_STD_PAL_H		|\
+				 V4L2_STD_PAL_I)
+/* Chroma "agnostic" standards */
+#define V4L2_STD_B		(V4L2_STD_PAL_B		|\
+				 V4L2_STD_PAL_B1	|\
+				 V4L2_STD_SECAM_B)
+#define V4L2_STD_G		(V4L2_STD_PAL_G		|\
+				 V4L2_STD_SECAM_G)
+#define V4L2_STD_H		(V4L2_STD_PAL_H		|\
+				 V4L2_STD_SECAM_H)
+#define V4L2_STD_L		(V4L2_STD_SECAM_L	|\
+				 V4L2_STD_SECAM_LC)
+#define V4L2_STD_GH		(V4L2_STD_G		|\
+				 V4L2_STD_H)
+#define V4L2_STD_DK		(V4L2_STD_PAL_DK	|\
+				 V4L2_STD_SECAM_DK)
+#define V4L2_STD_BG		(V4L2_STD_B		|\
+				 V4L2_STD_G)
+#define V4L2_STD_MN		(V4L2_STD_PAL_M		|\
+				 V4L2_STD_PAL_N		|\
+				 V4L2_STD_PAL_Nc	|\
+				 V4L2_STD_NTSC)
 
+/* Standards where MTS/BTSC stereo could be found */
+#define V4L2_STD_MTS		(V4L2_STD_NTSC_M	|\
+				 V4L2_STD_PAL_M		|\
+				 V4L2_STD_PAL_N		|\
+				 V4L2_STD_PAL_Nc)
+
+/* Standards for Countries with 60Hz Line frequency */
 #define V4L2_STD_525_60		(V4L2_STD_PAL_M		|\
 				 V4L2_STD_PAL_60	|\
 				 V4L2_STD_NTSC		|\
 				 V4L2_STD_NTSC_443)
+/* Standards for Countries with 50Hz Line frequency */
 #define V4L2_STD_625_50		(V4L2_STD_PAL		|\
 				 V4L2_STD_PAL_N		|\
 				 V4L2_STD_PAL_Nc	|\
 				 V4L2_STD_SECAM)
+
 #define V4L2_STD_ATSC           (V4L2_STD_ATSC_8_VSB    |\
 				 V4L2_STD_ATSC_16_VSB)
-
+/* Macros with none and all analog standards */
 #define V4L2_STD_UNKNOWN        0
 #define V4L2_STD_ALL            (V4L2_STD_525_60	|\
 				 V4L2_STD_625_50)
@@ -1026,6 +1124,7 @@
 #define V4L2_CTRL_CLASS_MPEG 0x00990000	/* MPEG-compression controls */
 #define V4L2_CTRL_CLASS_CAMERA 0x009a0000	/* Camera class controls */
 #define V4L2_CTRL_CLASS_FM_TX 0x009b0000	/* FM Modulator control class */
+#define V4L2_CTRL_CLASS_FLASH 0x009c0000	/* Camera flash controls */
 
 #define V4L2_CTRL_ID_MASK      	  (0x0fffffff)
 #define V4L2_CTRL_ID2CLASS(id)    ((id) & 0x0fff0000UL)
@@ -1039,6 +1138,7 @@
 	V4L2_CTRL_TYPE_INTEGER64     = 5,
 	V4L2_CTRL_TYPE_CTRL_CLASS    = 6,
 	V4L2_CTRL_TYPE_STRING        = 7,
+	V4L2_CTRL_TYPE_BITMASK       = 8,
 };
 
 /*  Used in the VIDIOC_QUERYCTRL ioctl for querying controls */
@@ -1070,6 +1170,7 @@
 #define V4L2_CTRL_FLAG_INACTIVE 	0x0010
 #define V4L2_CTRL_FLAG_SLIDER 		0x0020
 #define V4L2_CTRL_FLAG_WRITE_ONLY 	0x0040
+#define V4L2_CTRL_FLAG_VOLATILE		0x0080
 
 /*  Query flag, to be ORed with the control ID */
 #define V4L2_CTRL_FLAG_NEXT_CTRL	0x80000000
@@ -1114,6 +1215,7 @@
 	V4L2_CID_POWER_LINE_FREQUENCY_DISABLED	= 0,
 	V4L2_CID_POWER_LINE_FREQUENCY_50HZ	= 1,
 	V4L2_CID_POWER_LINE_FREQUENCY_60HZ	= 2,
+	V4L2_CID_POWER_LINE_FREQUENCY_AUTO	= 3,
 };
 #define V4L2_CID_HUE_AUTO			(V4L2_CID_BASE+25)
 #define V4L2_CID_WHITE_BALANCE_TEMPERATURE	(V4L2_CID_BASE+26)
@@ -1145,14 +1247,19 @@
 #define V4L2_CID_ILLUMINATORS_1			(V4L2_CID_BASE+37)
 #define V4L2_CID_ILLUMINATORS_2			(V4L2_CID_BASE+38)
 
+#define V4L2_CID_MIN_BUFFERS_FOR_CAPTURE	(V4L2_CID_BASE+39)
+#define V4L2_CID_MIN_BUFFERS_FOR_OUTPUT		(V4L2_CID_BASE+40)
+
+#define V4L2_CID_ALPHA_COMPONENT		(V4L2_CID_BASE+41)
+
 /* last CID + 1 */
-#define V4L2_CID_LASTP1                         (V4L2_CID_BASE+39)
+#define V4L2_CID_LASTP1                         (V4L2_CID_BASE+42)
 
 /*  MPEG-class control IDs defined by V4L2 */
 #define V4L2_CID_MPEG_BASE 			(V4L2_CTRL_CLASS_MPEG | 0x900)
 #define V4L2_CID_MPEG_CLASS 			(V4L2_CTRL_CLASS_MPEG | 1)
 
-/*  MPEG streams */
+/*  MPEG streams, specific to multiplexed streams */
 #define V4L2_CID_MPEG_STREAM_TYPE 		(V4L2_CID_MPEG_BASE+0)
 enum v4l2_mpeg_stream_type {
 	V4L2_MPEG_STREAM_TYPE_MPEG2_PS   = 0, /* MPEG-2 program stream */
@@ -1174,7 +1281,7 @@
 	V4L2_MPEG_STREAM_VBI_FMT_IVTV = 1,  /* VBI in private packets, IVTV format */
 };
 
-/*  MPEG audio */
+/*  MPEG audio controls specific to multiplexed streams  */
 #define V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ 	(V4L2_CID_MPEG_BASE+100)
 enum v4l2_mpeg_audio_sampling_freq {
 	V4L2_MPEG_AUDIO_SAMPLING_FREQ_44100 = 0,
@@ -1290,7 +1397,7 @@
 	V4L2_MPEG_AUDIO_AC3_BITRATE_640K = 18,
 };
 
-/*  MPEG video */
+/*  MPEG video controls specific to multiplexed streams */
 #define V4L2_CID_MPEG_VIDEO_ENCODING 		(V4L2_CID_MPEG_BASE+200)
 enum v4l2_mpeg_video_encoding {
 	V4L2_MPEG_VIDEO_ENCODING_MPEG_1     = 0,
@@ -1318,6 +1425,141 @@
 #define V4L2_CID_MPEG_VIDEO_TEMPORAL_DECIMATION (V4L2_CID_MPEG_BASE+209)
 #define V4L2_CID_MPEG_VIDEO_MUTE 		(V4L2_CID_MPEG_BASE+210)
 #define V4L2_CID_MPEG_VIDEO_MUTE_YUV 		(V4L2_CID_MPEG_BASE+211)
+#define V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE		(V4L2_CID_MPEG_BASE+212)
+#define V4L2_CID_MPEG_VIDEO_DECODER_MPEG4_DEBLOCK_FILTER	(V4L2_CID_MPEG_BASE+213)
+#define V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB		(V4L2_CID_MPEG_BASE+214)
+#define V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE			(V4L2_CID_MPEG_BASE+215)
+#define V4L2_CID_MPEG_VIDEO_HEADER_MODE				(V4L2_CID_MPEG_BASE+216)
+enum v4l2_mpeg_video_header_mode {
+	V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE			= 0,
+	V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME	= 1,
+
+};
+#define V4L2_CID_MPEG_VIDEO_MAX_REF_PIC			(V4L2_CID_MPEG_BASE+217)
+#define V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE		(V4L2_CID_MPEG_BASE+218)
+#define V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES	(V4L2_CID_MPEG_BASE+219)
+#define V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB		(V4L2_CID_MPEG_BASE+220)
+#define V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE		(V4L2_CID_MPEG_BASE+221)
+enum v4l2_mpeg_video_multi_slice_mode {
+	V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE		= 0,
+	V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB		= 1,
+	V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES	= 2,
+};
+#define V4L2_CID_MPEG_VIDEO_VBV_SIZE			(V4L2_CID_MPEG_BASE+222)
+#define V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP		(V4L2_CID_MPEG_BASE+300)
+#define V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP		(V4L2_CID_MPEG_BASE+301)
+#define V4L2_CID_MPEG_VIDEO_H263_B_FRAME_QP		(V4L2_CID_MPEG_BASE+302)
+#define V4L2_CID_MPEG_VIDEO_H263_MIN_QP			(V4L2_CID_MPEG_BASE+303)
+#define V4L2_CID_MPEG_VIDEO_H263_MAX_QP			(V4L2_CID_MPEG_BASE+304)
+#define V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP		(V4L2_CID_MPEG_BASE+350)
+#define V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP		(V4L2_CID_MPEG_BASE+351)
+#define V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP		(V4L2_CID_MPEG_BASE+352)
+#define V4L2_CID_MPEG_VIDEO_H264_MIN_QP			(V4L2_CID_MPEG_BASE+353)
+#define V4L2_CID_MPEG_VIDEO_H264_MAX_QP			(V4L2_CID_MPEG_BASE+354)
+#define V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM		(V4L2_CID_MPEG_BASE+355)
+#define V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE		(V4L2_CID_MPEG_BASE+356)
+#define V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE		(V4L2_CID_MPEG_BASE+357)
+enum v4l2_mpeg_video_h264_entropy_mode {
+	V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC	= 0,
+	V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC	= 1,
+};
+#define V4L2_CID_MPEG_VIDEO_H264_I_PERIOD		(V4L2_CID_MPEG_BASE+358)
+#define V4L2_CID_MPEG_VIDEO_H264_LEVEL			(V4L2_CID_MPEG_BASE+359)
+enum v4l2_mpeg_video_h264_level {
+	V4L2_MPEG_VIDEO_H264_LEVEL_1_0	= 0,
+	V4L2_MPEG_VIDEO_H264_LEVEL_1B	= 1,
+	V4L2_MPEG_VIDEO_H264_LEVEL_1_1	= 2,
+	V4L2_MPEG_VIDEO_H264_LEVEL_1_2	= 3,
+	V4L2_MPEG_VIDEO_H264_LEVEL_1_3	= 4,
+	V4L2_MPEG_VIDEO_H264_LEVEL_2_0	= 5,
+	V4L2_MPEG_VIDEO_H264_LEVEL_2_1	= 6,
+	V4L2_MPEG_VIDEO_H264_LEVEL_2_2	= 7,
+	V4L2_MPEG_VIDEO_H264_LEVEL_3_0	= 8,
+	V4L2_MPEG_VIDEO_H264_LEVEL_3_1	= 9,
+	V4L2_MPEG_VIDEO_H264_LEVEL_3_2	= 10,
+	V4L2_MPEG_VIDEO_H264_LEVEL_4_0	= 11,
+	V4L2_MPEG_VIDEO_H264_LEVEL_4_1	= 12,
+	V4L2_MPEG_VIDEO_H264_LEVEL_4_2	= 13,
+	V4L2_MPEG_VIDEO_H264_LEVEL_5_0	= 14,
+	V4L2_MPEG_VIDEO_H264_LEVEL_5_1	= 15,
+};
+#define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA	(V4L2_CID_MPEG_BASE+360)
+#define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA	(V4L2_CID_MPEG_BASE+361)
+#define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE	(V4L2_CID_MPEG_BASE+362)
+enum v4l2_mpeg_video_h264_loop_filter_mode {
+	V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED				= 0,
+	V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED				= 1,
+	V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY	= 2,
+};
+#define V4L2_CID_MPEG_VIDEO_H264_PROFILE		(V4L2_CID_MPEG_BASE+363)
+enum v4l2_mpeg_video_h264_profile {
+	V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE			= 0,
+	V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE	= 1,
+	V4L2_MPEG_VIDEO_H264_PROFILE_MAIN			= 2,
+	V4L2_MPEG_VIDEO_H264_PROFILE_EXTENDED			= 3,
+	V4L2_MPEG_VIDEO_H264_PROFILE_HIGH			= 4,
+	V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10			= 5,
+	V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_422			= 6,
+	V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_444_PREDICTIVE	= 7,
+	V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10_INTRA		= 8,
+	V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_422_INTRA		= 9,
+	V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_444_INTRA		= 10,
+	V4L2_MPEG_VIDEO_H264_PROFILE_CAVLC_444_INTRA		= 11,
+	V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_BASELINE		= 12,
+	V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_HIGH		= 13,
+	V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_HIGH_INTRA	= 14,
+	V4L2_MPEG_VIDEO_H264_PROFILE_STEREO_HIGH		= 15,
+	V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH		= 16,
+};
+#define V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_HEIGHT	(V4L2_CID_MPEG_BASE+364)
+#define V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_WIDTH	(V4L2_CID_MPEG_BASE+365)
+#define V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_ENABLE		(V4L2_CID_MPEG_BASE+366)
+#define V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC		(V4L2_CID_MPEG_BASE+367)
+enum v4l2_mpeg_video_h264_vui_sar_idc {
+	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_UNSPECIFIED	= 0,
+	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_1x1		= 1,
+	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_12x11		= 2,
+	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_10x11		= 3,
+	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_16x11		= 4,
+	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_40x33		= 5,
+	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_24x11		= 6,
+	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_20x11		= 7,
+	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_32x11		= 8,
+	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_80x33		= 9,
+	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_18x11		= 10,
+	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_15x11		= 11,
+	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_64x33		= 12,
+	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_160x99		= 13,
+	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_4x3		= 14,
+	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_3x2		= 15,
+	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_2x1		= 16,
+	V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED	= 17,
+};
+#define V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP	(V4L2_CID_MPEG_BASE+400)
+#define V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP	(V4L2_CID_MPEG_BASE+401)
+#define V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP	(V4L2_CID_MPEG_BASE+402)
+#define V4L2_CID_MPEG_VIDEO_MPEG4_MIN_QP	(V4L2_CID_MPEG_BASE+403)
+#define V4L2_CID_MPEG_VIDEO_MPEG4_MAX_QP	(V4L2_CID_MPEG_BASE+404)
+#define V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL		(V4L2_CID_MPEG_BASE+405)
+enum v4l2_mpeg_video_mpeg4_level {
+	V4L2_MPEG_VIDEO_MPEG4_LEVEL_0	= 0,
+	V4L2_MPEG_VIDEO_MPEG4_LEVEL_0B	= 1,
+	V4L2_MPEG_VIDEO_MPEG4_LEVEL_1	= 2,
+	V4L2_MPEG_VIDEO_MPEG4_LEVEL_2	= 3,
+	V4L2_MPEG_VIDEO_MPEG4_LEVEL_3	= 4,
+	V4L2_MPEG_VIDEO_MPEG4_LEVEL_3B	= 5,
+	V4L2_MPEG_VIDEO_MPEG4_LEVEL_4	= 6,
+	V4L2_MPEG_VIDEO_MPEG4_LEVEL_5	= 7,
+};
+#define V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE	(V4L2_CID_MPEG_BASE+406)
+enum v4l2_mpeg_video_mpeg4_profile {
+	V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE				= 0,
+	V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_SIMPLE			= 1,
+	V4L2_MPEG_VIDEO_MPEG4_PROFILE_CORE				= 2,
+	V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE_SCALABLE			= 3,
+	V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_CODING_EFFICIENCY	= 4,
+};
+#define V4L2_CID_MPEG_VIDEO_MPEG4_QPEL		(V4L2_CID_MPEG_BASE+407)
 
 /*  MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */
 #define V4L2_CID_MPEG_CX2341X_BASE 				(V4L2_CTRL_CLASS_MPEG | 0x1000)
@@ -1360,6 +1602,33 @@
 #define V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_TOP 	(V4L2_CID_MPEG_CX2341X_BASE+10)
 #define V4L2_CID_MPEG_CX2341X_STREAM_INSERT_NAV_PACKETS 	(V4L2_CID_MPEG_CX2341X_BASE+11)
 
+/*  MPEG-class control IDs specific to the Samsung MFC 5.1 driver as defined by V4L2 */
+#define V4L2_CID_MPEG_MFC51_BASE				(V4L2_CTRL_CLASS_MPEG | 0x1100)
+
+#define V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY		(V4L2_CID_MPEG_MFC51_BASE+0)
+#define V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE	(V4L2_CID_MPEG_MFC51_BASE+1)
+#define V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE			(V4L2_CID_MPEG_MFC51_BASE+2)
+enum v4l2_mpeg_mfc51_video_frame_skip_mode {
+	V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_DISABLED		= 0,
+	V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT	= 1,
+	V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT		= 2,
+};
+#define V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE			(V4L2_CID_MPEG_MFC51_BASE+3)
+enum v4l2_mpeg_mfc51_video_force_frame_type {
+	V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_DISABLED		= 0,
+	V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_I_FRAME		= 1,
+	V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_NOT_CODED	= 2,
+};
+#define V4L2_CID_MPEG_MFC51_VIDEO_PADDING				(V4L2_CID_MPEG_MFC51_BASE+4)
+#define V4L2_CID_MPEG_MFC51_VIDEO_PADDING_YUV				(V4L2_CID_MPEG_MFC51_BASE+5)
+#define V4L2_CID_MPEG_MFC51_VIDEO_RC_FIXED_TARGET_BIT			(V4L2_CID_MPEG_MFC51_BASE+6)
+#define V4L2_CID_MPEG_MFC51_VIDEO_RC_REACTION_COEFF			(V4L2_CID_MPEG_MFC51_BASE+7)
+#define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_ACTIVITY		(V4L2_CID_MPEG_MFC51_BASE+50)
+#define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_DARK			(V4L2_CID_MPEG_MFC51_BASE+51)
+#define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_SMOOTH		(V4L2_CID_MPEG_MFC51_BASE+52)
+#define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_STATIC		(V4L2_CID_MPEG_MFC51_BASE+53)
+#define V4L2_CID_MPEG_MFC51_VIDEO_H264_NUM_REF_PIC_FOR_P		(V4L2_CID_MPEG_MFC51_BASE+54)
+
 /*  Camera class control IDs */
 #define V4L2_CID_CAMERA_CLASS_BASE 	(V4L2_CTRL_CLASS_CAMERA | 0x900)
 #define V4L2_CID_CAMERA_CLASS 		(V4L2_CTRL_CLASS_CAMERA | 1)
@@ -1428,6 +1697,43 @@
 #define V4L2_CID_TUNE_POWER_LEVEL		(V4L2_CID_FM_TX_CLASS_BASE + 113)
 #define V4L2_CID_TUNE_ANTENNA_CAPACITOR		(V4L2_CID_FM_TX_CLASS_BASE + 114)
 
+/* Flash and privacy (indicator) light controls */
+#define V4L2_CID_FLASH_CLASS_BASE		(V4L2_CTRL_CLASS_FLASH | 0x900)
+#define V4L2_CID_FLASH_CLASS			(V4L2_CTRL_CLASS_FLASH | 1)
+
+#define V4L2_CID_FLASH_LED_MODE			(V4L2_CID_FLASH_CLASS_BASE + 1)
+enum v4l2_flash_led_mode {
+	V4L2_FLASH_LED_MODE_NONE,
+	V4L2_FLASH_LED_MODE_FLASH,
+	V4L2_FLASH_LED_MODE_TORCH,
+};
+
+#define V4L2_CID_FLASH_STROBE_SOURCE		(V4L2_CID_FLASH_CLASS_BASE + 2)
+enum v4l2_flash_strobe_source {
+	V4L2_FLASH_STROBE_SOURCE_SOFTWARE,
+	V4L2_FLASH_STROBE_SOURCE_EXTERNAL,
+};
+
+#define V4L2_CID_FLASH_STROBE			(V4L2_CID_FLASH_CLASS_BASE + 3)
+#define V4L2_CID_FLASH_STROBE_STOP		(V4L2_CID_FLASH_CLASS_BASE + 4)
+#define V4L2_CID_FLASH_STROBE_STATUS		(V4L2_CID_FLASH_CLASS_BASE + 5)
+
+#define V4L2_CID_FLASH_TIMEOUT			(V4L2_CID_FLASH_CLASS_BASE + 6)
+#define V4L2_CID_FLASH_INTENSITY		(V4L2_CID_FLASH_CLASS_BASE + 7)
+#define V4L2_CID_FLASH_TORCH_INTENSITY		(V4L2_CID_FLASH_CLASS_BASE + 8)
+#define V4L2_CID_FLASH_INDICATOR_INTENSITY	(V4L2_CID_FLASH_CLASS_BASE + 9)
+
+#define V4L2_CID_FLASH_FAULT			(V4L2_CID_FLASH_CLASS_BASE + 10)
+#define V4L2_FLASH_FAULT_OVER_VOLTAGE		(1 << 0)
+#define V4L2_FLASH_FAULT_TIMEOUT		(1 << 1)
+#define V4L2_FLASH_FAULT_OVER_TEMPERATURE	(1 << 2)
+#define V4L2_FLASH_FAULT_SHORT_CIRCUIT		(1 << 3)
+#define V4L2_FLASH_FAULT_OVER_CURRENT		(1 << 4)
+#define V4L2_FLASH_FAULT_INDICATOR		(1 << 5)
+
+#define V4L2_CID_FLASH_CHARGE			(V4L2_CID_FLASH_CLASS_BASE + 11)
+#define V4L2_CID_FLASH_READY			(V4L2_CID_FLASH_CLASS_BASE + 12)
+
 /*
  *	T U N I N G
  */
@@ -1792,6 +2098,8 @@
 #define V4L2_EVENT_ALL				0
 #define V4L2_EVENT_VSYNC			1
 #define V4L2_EVENT_EOS				2
+#define V4L2_EVENT_CTRL				3
+#define V4L2_EVENT_FRAME_SYNC			4
 #define V4L2_EVENT_PRIVATE_START		0x08000000
 
 /* Payload for V4L2_EVENT_VSYNC */
@@ -1800,21 +2108,51 @@
 	__u8 field;
 } __attribute__ ((packed));
 
+/* Payload for V4L2_EVENT_CTRL */
+#define V4L2_EVENT_CTRL_CH_VALUE		(1 << 0)
+#define V4L2_EVENT_CTRL_CH_FLAGS		(1 << 1)
+
+struct v4l2_event_ctrl {
+	__u32 changes;
+	__u32 type;
+	union {
+		__s32 value;
+		__s64 value64;
+	};
+	__u32 flags;
+	__s32 minimum;
+	__s32 maximum;
+	__s32 step;
+	__s32 default_value;
+};
+
+struct v4l2_event_frame_sync {
+	__u32 frame_sequence;
+};
+
 struct v4l2_event {
 	__u32				type;
 	union {
-		struct v4l2_event_vsync vsync;
-		__u8			data[64];
+		struct v4l2_event_vsync		vsync;
+		struct v4l2_event_ctrl		ctrl;
+		struct v4l2_event_frame_sync	frame_sync;
+		__u8				data[64];
 	} u;
 	__u32				pending;
 	__u32				sequence;
 	struct timespec			timestamp;
-	__u32				reserved[9];
+	__u32				id;
+	__u32				reserved[8];
 };
 
+#define V4L2_EVENT_SUB_FL_SEND_INITIAL		(1 << 0)
+#define V4L2_EVENT_SUB_FL_ALLOW_FEEDBACK	(1 << 1)
+
 struct v4l2_event_subscription {
 	__u32				type;
-	__u32				reserved[7];
+	__u32				id;
+	__u32				flags;
+	__u32				reserved[5];
 };
 
 /*
@@ -1853,6 +2191,23 @@
 	__u32 revision;    /* chip revision, chip specific */
 } __attribute__ ((packed));
 
+/**
+ * struct v4l2_create_buffers - VIDIOC_CREATE_BUFS argument
+ * @index:	on return, index of the first created buffer
+ * @count:	entry: number of requested buffers,
+ *		return: number of created buffers
+ * @memory:	buffer memory type
+ * @format:	frame format, for which buffers are requested
+ * @reserved:	future extensions
+ */
+struct v4l2_create_buffers {
+	__u32			index;
+	__u32			count;
+	enum v4l2_memory        memory;
+	struct v4l2_format	format;
+	__u32			reserved[8];
+};
+
 /*
  *	I O C T L   C O D E S   F O R   V I D E O   D E V I C E S
  *
@@ -1943,6 +2298,15 @@
 #define	VIDIOC_SUBSCRIBE_EVENT	 _IOW('V', 90, struct v4l2_event_subscription)
 #define	VIDIOC_UNSUBSCRIBE_EVENT _IOW('V', 91, struct v4l2_event_subscription)
 
+/* Experimental, the below two ioctls may change over the next couple of kernel
+   versions */
+#define VIDIOC_CREATE_BUFS	_IOWR('V', 92, struct v4l2_create_buffers)
+#define VIDIOC_PREPARE_BUF	_IOWR('V', 93, struct v4l2_buffer)
+
+/* Experimental selection API */
+#define VIDIOC_G_SELECTION	_IOWR('V', 94, struct v4l2_selection)
+#define VIDIOC_S_SELECTION	_IOWR('V', 95, struct v4l2_selection)
+
 /* Reminder: when adding new ioctls please add support for them to
    drivers/media/video/v4l2-compat-ioctl32.c as well! */
 
diff -uNra linux-3.0.82/include/media/gc0308_platform.h linux-3.0.82x/include/media/gc0308_platform.h
--- linux-3.0.82/include/media/gc0308_platform.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/include/media/gc0308_platform.h	2017-09-23 03:42:50.326674122 +0800
@@ -0,0 +1,98 @@
+/*
+ * Driver for GC0308 from GC
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+struct gc0308_platform_data {
+	unsigned int default_width;
+	unsigned int default_height;
+	unsigned int pixelformat;
+	int freq;	/* MCLK in KHz */
+
+	/* This SoC supports Parallel & CSI-2 */
+	int is_mipi;
+};
+
+
+enum fimc_cam_type {
+	CAM_TYPE_ITU = 0,
+	CAM_TYPE_MIPI = 1,
+};
+
+enum fimc_cam_format {
+	ITU_601_YCBCR422_8BIT = (1 << 31),
+	ITU_656_YCBCR422_8BIT = (0 << 31),
+	ITU_601_YCBCR422_16BIT = (1 << 29),
+	MIPI_CSI_YCBCR422_8BIT = 0x1e,
+	MIPI_CSI_RAW8 = 0x2a,
+	MIPI_CSI_RAW10 = 0x2b,
+	MIPI_CSI_RAW12 = 0x2c,
+	MIPI_USER_DEF_PACKET_1 = 0x30, /* User defined Byte-based packet 1 */
+};
+
+enum fimc_cam_order422 {
+	CAM_ORDER422_8BIT_YCBYCR = (0 << 14),
+	CAM_ORDER422_8BIT_YCRYCB = (1 << 14),
+	CAM_ORDER422_8BIT_CBYCRY = (2 << 14),
+	CAM_ORDER422_8BIT_CRYCBY = (3 << 14),
+	CAM_ORDER422_16BIT_Y4CBCRCBCR = (0 << 14),
+	CAM_ORDER422_16BIT_Y4CRCBCRCB = (1 << 14),
+};
+
+enum fimc_cam_index {
+	CAMERA_PAR_A = 0,
+	CAMERA_PAR_B = 1,
+	CAMERA_CSI_C = 2,
+	CAMERA_PATTERN = 3, /* Not actual camera but test pattern */
+	CAMERA_WB = 4, /* Not actual camera but write back */
+};
+
+
+#if 0
+struct s3c_platform_camera {
+	/*
+	* ITU cam A,B: 0,1
+	* CSI-2 cam C: 2
+	*/
+	enum fimc_cam_index id;
+
+	enum fimc_cam_type type; /* ITU or MIPI */
+	enum fimc_cam_format fmt; /* input format */
+	enum fimc_cam_order422 order422; /* YCBCR422 order for ITU */
+
+	u32 pixelformat; /* default fourcc */
+
+	int i2c_busnum;
+	struct i2c_board_info *info;
+	struct v4l2_subdev *sd;
+
+	const char srclk_name[16]; /* source of mclk name */
+	const char clk_name[16]; /* mclk name */
+	u32 clk_rate; /* mclk ratio */
+	struct clk *clk; /* mclk */
+	int line_length; /* max length */
+	int width; /* default resol */
+	int height; /* default resol */
+	struct v4l2_rect window; /* real cut region from source */
+
+	int mipi_lanes; /* MIPI data lanes */
+	int mipi_settle; /* MIPI settle */
+	int mipi_align; /* MIPI data align: 24/32 */
+
+	/* Polarity: 1 if inverted polarity used */
+	int inv_pclk;
+	int inv_vsync;
+	int inv_href;
+	int inv_hsync;
+
+	int initialized;
+
+	/* Board specific power pin control */
+	int (*cam_power)(int onoff);
+};
+#endif
diff -uNra linux-3.0.82/include/sound/ls1a-lib.h linux-3.0.82x/include/sound/ls1a-lib.h
--- linux-3.0.82/include/sound/ls1a-lib.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/include/sound/ls1a-lib.h	2017-09-23 03:42:50.326674122 +0800
@@ -0,0 +1,50 @@
+#ifndef LS1A_LIB_H
+#define LS1A_LIB_H
+
+#include <linux/platform_device.h>
+#include <sound/ac97_codec.h>
+#include <linux/irqreturn.h>
+
+/* PCM */
+
+struct ls1a_pcm_dma_params {
+	char *name;			/* stream identifier */
+	u32 dcmd;			/* DMA descriptor dcmd field */
+	volatile u32 *drcmr;		/* the DMA request channel to use */
+	u32 dev_addr;			/* device physical address for DMA */
+
+//	u32 dtadr;			/*Zhuo QiXiang è®¾å¤‡åœ°å�€éœ€è¦�ä»Žä¸Šå±‚å®šä¹‰ä¼ å…¥*/
+};
+
+extern int __ls1a_pcm_hw_params(struct snd_pcm_substream *substream,
+				struct snd_pcm_hw_params *params);
+extern int __ls1a_pcm_hw_free(struct snd_pcm_substream *substream);
+extern int ls1a_pcm_trigger(struct snd_pcm_substream *substream, int cmd);
+extern snd_pcm_uframes_t ls1a_pcm_pointer(struct snd_pcm_substream *substream);
+extern int __ls1a_pcm_prepare(struct snd_pcm_substream *substream);
+extern irqreturn_t ls1a_pcm_dma_irq(int irq, void *dev_id);
+extern int __ls1a_pcm_open(struct snd_pcm_substream *substream);
+extern int __ls1a_pcm_close(struct snd_pcm_substream *substream);
+extern int ls1a_pcm_mmap(struct snd_pcm_substream *substream,
+	struct vm_area_struct *vma);
+extern int ls1a_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream);
+extern void ls1a_pcm_free_dma_buffers(struct snd_pcm *pcm);
+
+/* AC97 */
+
+extern unsigned short ls1a_ac97_read(struct snd_ac97 *ac97, unsigned short reg);
+extern int ls1a_ac97_write(struct snd_ac97 *ac97, unsigned char reg, unsigned short val);
+
+extern unsigned short ls1a_i2c_read(unsigned short reg);
+
+extern bool ls1a_ac97_try_warm_reset(struct snd_ac97 *ac97);
+extern bool ls1a_ac97_try_cold_reset(struct snd_ac97 *ac97);
+extern void ls1a_ac97_finish_reset(struct snd_ac97 *ac97);
+
+extern int ls1a_ac97_hw_suspend(void);
+extern int ls1a_ac97_hw_resume(void);
+
+extern int ls1a_ac97_hw_probe(struct platform_device *dev);
+extern void ls1a_ac97_hw_remove(struct platform_device *dev);
+
+#endif
diff -uNra linux-3.0.82/include/video/ls1xfb.h linux-3.0.82x/include/video/ls1xfb.h
--- linux-3.0.82/include/video/ls1xfb.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/include/video/ls1xfb.h	2017-09-23 03:42:50.326674122 +0800
@@ -0,0 +1,99 @@
+/*
+ *  Copyright (c) 2012 Tang, Haifeng <tanghaifeng-gz@loongson.cn>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ */
+
+#ifndef __ASM_MACH_LS1XFB_H
+#define __ASM_MACH_LS1XFB_H
+
+#include <ls1b_board.h>
+#include <linux/fb.h>
+#include <linux/i2c.h>
+#include <linux/i2c-algo-bit.h>
+
+/*
+ * Buffer pixel format
+ */
+#define PIX_FMT_RGB444		1
+#define PIX_FMT_RGB1555		2
+#define PIX_FMT_RGB565		3
+#define PIX_FMT_RGB888PACK	4
+#define PIX_FMT_RGB888UNPACK	5
+#define PIX_FMT_RGBA888		6
+#define PIX_FMT_PSEUDOCOLOR	20
+
+#define DEFAULT_FB_SIZE	(800 * 600 * 4)
+
+/*
+ * LS1X LCD controller private state.
+ */
+struct ls1xfb_info;
+
+struct ls1xfb_i2c_chan {
+	struct ls1xfb_info *par;
+	struct i2c_adapter adapter;
+	struct i2c_algo_bit_data algo;
+	unsigned int sda_pin;
+	unsigned int scl_pin;
+};
+
+struct ls1xfb_info {
+	struct device		*dev;
+	struct clk		*clk;
+	struct fb_info		*info;
+
+	struct ls1xfb_i2c_chan chan;
+	unsigned char *edid;
+
+	void __iomem		*reg_base;
+	dma_addr_t		fb_start_dma;
+	u32			pseudo_palette[16];
+
+	int			pix_fmt;
+	unsigned		active:1;
+};
+
+/*
+ * LS1X fb machine information
+ */
+struct ls1xfb_mach_info {
+	char	id[16];
+
+	int		num_modes;
+	struct fb_videomode *modes;
+
+	/*
+	 * Pix_fmt
+	 */
+	unsigned	pix_fmt;
+
+	/*
+	 * Dumb panel -- configurable output signal polarity.
+	 */
+	unsigned	invert_pixclock:1;
+	unsigned	invert_pixde:1;
+	unsigned	active:1;
+	unsigned	enable_lcd:1;
+};
+
+#ifdef CONFIG_LS1B_MACH
+struct ls1b_vga {
+	unsigned int xres;
+	unsigned int yres;
+	unsigned int refresh;
+	unsigned int ls1b_pll_freq;
+	unsigned int ls1b_pll_div;
+};
+#endif
+
+#if defined(CONFIG_FB_LS1X_I2C)
+extern int ls1xfb_probe_i2c_connector(struct fb_info *info, u8 **out_edid);
+extern void ls1xfb_create_i2c_busses(struct fb_info *info);
+extern void ls1xfb_delete_i2c_busses(struct fb_info *info);
+#endif
+
+#endif /* __ASM_MACH_LS1XFB_H */
diff -uNra linux-3.0.82/init/main.c linux-3.0.82x/init/main.c
--- linux-3.0.82/init/main.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/init/main.c	2017-09-23 03:42:50.326674122 +0800
@@ -754,6 +754,7 @@
 				ramdisk_execute_command);
 	}
 
+	printk(" no ramdisk_execute command...\r\n");//dbg-yg
 	/*
 	 * We try each of these until one succeeds.
 	 *
@@ -765,6 +766,7 @@
 		printk(KERN_WARNING "Failed to execute %s.  Attempting "
 					"defaults...\n", execute_command);
 	}
+	printk(" run /sbin/init...\r\n");//dbg-yg
 	run_init_process("/sbin/init");
 	run_init_process("/etc/init");
 	run_init_process("/bin/init");
diff -uNra linux-3.0.82/kernel/irq/chip.c linux-3.0.82x/kernel/irq/chip.c
--- linux-3.0.82/kernel/irq/chip.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/kernel/irq/chip.c	2017-09-23 03:42:50.326674122 +0800
@@ -345,6 +345,8 @@
 void
 handle_level_irq(unsigned int irq, struct irq_desc *desc)
 {
+//	if(irq==35)
+//	{printk("handle_level_irq===%d\n",irq);dump_stack();}
 	raw_spin_lock(&desc->lock);
 	mask_ack_irq(desc);
 
diff -uNra linux-3.0.82/kernel/irq/manage.c linux-3.0.82x/kernel/irq/manage.c
--- linux-3.0.82/kernel/irq/manage.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/kernel/irq/manage.c	2017-09-23 03:42:50.326674122 +0800
@@ -378,6 +378,8 @@
  */
 void disable_irq_nosync(unsigned int irq)
 {
+	if(irq == 35)
+	printk("disable_irq_nosync==%d",irq);
 	__disable_irq_nosync(irq);
 }
 EXPORT_SYMBOL(disable_irq_nosync);
diff -uNra linux-3.0.82/lib/decompress_inflate.c linux-3.0.82x/lib/decompress_inflate.c
--- linux-3.0.82/lib/decompress_inflate.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/lib/decompress_inflate.c	2017-09-23 03:42:50.326674122 +0800
@@ -26,6 +26,7 @@
 
 #define GZIP_IOBUF_SIZE (16*1024)
 
+#ifndef CONFIG_KERNEL_LZO
 static int INIT nofill(void *buffer, unsigned int len)
 {
 	return -1;
@@ -181,3 +182,5 @@
 }
 
 #define decompress gunzip
+#endif
+
diff -uNra linux-3.0.82/ls1c.03.config linux-3.0.82x/ls1c.03.config
--- linux-3.0.82/ls1c.03.config	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/ls1c.03.config	2017-09-23 03:42:50.330674109 +0800
@@ -0,0 +1,1878 @@
+#
+# Automatically generated make config: don't edit
+# Linux/mips 3.0.82 Kernel Configuration
+#
+CONFIG_MIPS=y
+
+#
+# Machine selection
+#
+# CONFIG_MIPS_ALCHEMY is not set
+# CONFIG_AR7 is not set
+# CONFIG_ATH79 is not set
+# CONFIG_BCM47XX is not set
+# CONFIG_BCM63XX is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_MACH_JZ4740 is not set
+# CONFIG_LANTIQ is not set
+# CONFIG_LASAT is not set
+CONFIG_MACH_LOONGSON=y
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SIM is not set
+# CONFIG_NEC_MARKEINS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_NXP_STB220 is not set
+# CONFIG_NXP_STB225 is not set
+# CONFIG_PNX8550_JBS is not set
+# CONFIG_PNX8550_STB810 is not set
+# CONFIG_PMC_MSP is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_POWERTV is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP28 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_CRHINE is not set
+# CONFIG_SIBYTE_CARMEL is not set
+# CONFIG_SIBYTE_CRHONE is not set
+# CONFIG_SIBYTE_RHONE is not set
+# CONFIG_SIBYTE_SWARM is not set
+# CONFIG_SIBYTE_LITTLESUR is not set
+# CONFIG_SIBYTE_SENTOSA is not set
+# CONFIG_SIBYTE_BIGSUR is not set
+# CONFIG_SNI_RM is not set
+# CONFIG_MACH_TX39XX is not set
+# CONFIG_MACH_TX49XX is not set
+# CONFIG_MIKROTIK_RB532 is not set
+# CONFIG_WR_PPMC is not set
+# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
+# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
+# CONFIG_NLM_XLR_BOARD is not set
+# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
+# CONFIG_HAVE_PWM is not set
+# CONFIG_LS1A_MACH is not set
+# CONFIG_LS1B_MACH is not set
+CONFIG_LS1C_MACH=y
+# CONFIG_LEMOTE_FULOONG2E is not set
+# CONFIG_LEMOTE_MACH2F is not set
+CONFIG_LOONGSON_UART_BASE=y
+# CONFIG_LOONGSON_MC146818 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+CONFIG_CEVT_R4K_LIB=y
+CONFIG_CEVT_R4K=y
+CONFIG_CSRC_R4K_LIB=y
+CONFIG_CSRC_R4K=y
+# CONFIG_ARCH_DMA_ADDR_T_64BIT is not set
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+# CONFIG_MIPS_MACHINE is not set
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_GPIO=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_BOOT_ELF32=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+
+#
+# CPU selection
+#
+CONFIG_CPU_LOONGSON1C=y
+CONFIG_SYS_SUPPORTS_ZBOOT=y
+CONFIG_CPU_LS232=y
+CONFIG_SYS_HAS_CPU_LOONGSON1C=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_CPUFREQ=y
+
+#
+# Kernel type
+#
+CONFIG_32BIT=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_FORCE_MAX_ZONEORDER=12
+CONFIG_MIPS_MT_DISABLED=y
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_CPU_HAS_WB=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_HIGHMEM is not set
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_SYS_SUPPORTS_HIGHMEM=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_COMPACTION is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
+CONFIG_NEED_PER_CPU_KM=y
+# CONFIG_CLEANCACHE is not set
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_256 is not set
+# CONFIG_HZ_1000 is not set
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=250
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+# CONFIG_PREEMPT is not set
+# CONFIG_KEXEC is not set
+# CONFIG_SECCOMP is not set
+# CONFIG_USE_OF is not set
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_HAVE_IRQ_WORK=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_CROSS_COMPILE=""
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_DEFAULT_HOSTNAME="loongson"
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_FHANDLE is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+CONFIG_HAVE_GENERIC_HARDIRQS=y
+
+#
+# IRQ subsystem
+#
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_IRQ_SHOW=y
+
+#
+# RCU Subsystem
+#
+CONFIG_TINY_RCU=y
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_CGROUPS is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_SCHED_AUTOGROUP is not set
+# CONFIG_SYSFS_DEPRECATED is not set
+# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE="/mnt/ramfs"
+CONFIG_INITRAMFS_ROOT_UID=0
+CONFIG_INITRAMFS_ROOT_GID=0
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+# CONFIG_RD_XZ is not set
+# CONFIG_RD_LZO is not set
+CONFIG_INITRAMFS_COMPRESSION_NONE=y
+# CONFIG_INITRAMFS_COMPRESSION_GZIP is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EXPERT=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+# CONFIG_ELF_CORE is not set
+# CONFIG_PCSPKR_PLATFORM is not set
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_EMBEDDED=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
+
+#
+# Kernel Performance Events And Counters
+#
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
+# CONFIG_VM_EVENT_COUNTERS is not set
+# CONFIG_COMPAT_BRK is not set
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_JUMP_LABEL=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+
+#
+# GCOV-based kernel profiling
+#
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+CONFIG_BLK_DEV_BSG=y
+CONFIG_BLK_DEV_INTEGRITY=y
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+CONFIG_INLINE_SPIN_UNLOCK=y
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+CONFIG_INLINE_READ_UNLOCK=y
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+CONFIG_INLINE_READ_UNLOCK_IRQ=y
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+CONFIG_INLINE_WRITE_UNLOCK=y
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_FREEZER is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_MMU=y
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_HAVE_AOUT is not set
+CONFIG_BINFMT_MISC=y
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Power management options
+#
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_SUSPEND is not set
+# CONFIG_PM_RUNTIME is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE_DEMUX is not set
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_LRO=y
+# CONFIG_INET_DIAG is not set
+CONFIG_TCP_CONG_ADVANCED=y
+CONFIG_TCP_CONG_BIC=y
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_TCP_CONG_WESTWOOD=y
+CONFIG_TCP_CONG_HTCP=y
+# CONFIG_TCP_CONG_HSTCP is not set
+# CONFIG_TCP_CONG_HYBLA is not set
+# CONFIG_TCP_CONG_VEGAS is not set
+# CONFIG_TCP_CONG_SCALABLE is not set
+# CONFIG_TCP_CONG_LP is not set
+# CONFIG_TCP_CONG_VENO is not set
+# CONFIG_TCP_CONG_YEAH is not set
+# CONFIG_TCP_CONG_ILLINOIS is not set
+# CONFIG_DEFAULT_BIC is not set
+CONFIG_DEFAULT_CUBIC=y
+# CONFIG_DEFAULT_HTCP is not set
+# CONFIG_DEFAULT_WESTWOOD is not set
+# CONFIG_DEFAULT_RENO is not set
+CONFIG_DEFAULT_TCP_CONG="cubic"
+CONFIG_TCP_MD5SIG=y
+# CONFIG_IPV6 is not set
+CONFIG_NETWORK_SECMARK=y
+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_L2TP is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+CONFIG_DCB=y
+# CONFIG_BATMAN_ADV is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+CONFIG_CAN=y
+CONFIG_CAN_RAW=y
+# CONFIG_CAN_BCM is not set
+
+#
+# CAN Device Drivers
+#
+# CONFIG_CAN_VCAN is not set
+# CONFIG_CAN_SLCAN is not set
+CONFIG_CAN_DEV=y
+CONFIG_CAN_CALC_BITTIMING=y
+# CONFIG_CAN_MCP251X is not set
+# CONFIG_CAN_SJA1000 is not set
+# CONFIG_CAN_C_CAN is not set
+
+#
+# CAN USB interfaces
+#
+# CONFIG_CAN_EMS_USB is not set
+# CONFIG_CAN_ESD_USB2 is not set
+# CONFIG_CAN_SOFTING is not set
+# CONFIG_CAN_DEBUG_DEVICES is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+# CONFIG_CAIF is not set
+# CONFIG_CEPH_LIB is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/mdev"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_SM_FTL is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SST25L is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND_ECC=y
+# CONFIG_MTD_NAND_ECC_SMC is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_BCH is not set
+# CONFIG_MTD_SM_COMMON is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+CONFIG_MTD_NAND_LS1X=y
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_BLK_DEV_RBD is not set
+# CONFIG_SENSORS_LIS3LV02D is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI_MOD=y
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_TARGET_CORE is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_MII=y
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+CONFIG_REALTEK_PHY=y
+# CONFIG_NATIONAL_PHY is not set
+CONFIG_STE10XP=y
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_MICREL_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_LOONGSON_GMAC=y
+# CONFIG_AX88796 is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
+CONFIG_NETDEV_1000=y
+CONFIG_LS1X_GMAC0=y
+# CONFIG_LS1X_GMAC0_100M is not set
+# CONFIG_LS1X_GMAC0_1000M is not set
+CONFIG_LS1X_GMAC0_RMII=y
+# CONFIG_STMMAC_ETH is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_WLAN is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_USB_IPHETH is not set
+# CONFIG_WAN is not set
+
+#
+# CAIF transport drivers
+#
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+CONFIG_INPUT_POLLDEV=y
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_FT5X0X is not set
+# CONFIG_TOUCHSCREEN_FT5X06 is not set
+# CONFIG_FT5X0X_MULTITOUCH is not set
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
+# CONFIG_TOUCHSCREEN_AD7877 is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set
+# CONFIG_TOUCHSCREEN_BU21013 is not set
+# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
+# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
+# CONFIG_TOUCHSCREEN_EETI is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MAX11801 is not set
+# CONFIG_TOUCHSCREEN_MCS5000 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2005 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+CONFIG_TOUCHSCREEN_TSZT2083=y
+# CONFIG_TOUCHSCREEN_ST1232 is not set
+# CONFIG_TOUCHSCREEN_TPS6507X is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_N_GSM is not set
+# CONFIG_TRACE_SINK is not set
+# CONFIG_DEVKMEM is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=6
+CONFIG_SERIAL_8250_RUNTIME_UARTS=6
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+# CONFIG_SERIAL_MAX3107 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+# CONFIG_SERIAL_IFX6X60 is not set
+# CONFIG_SERIAL_XILINX_PS_UART is not set
+# CONFIG_TTY_PRINTK is not set
+# CONFIG_LS1B_BUZZER is not set
+# CONFIG_LS1B_PWM_DRIVER is not set
+# CONFIG_LS1B_BBDIO is not set
+# CONFIG_LS1B_IR is not set
+# CONFIG_LS1B_STEPMOTOR is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_RAMOOPS is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+# CONFIG_I2C_CHARDEV is not set
+# CONFIG_I2C_MUX is not set
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_LS1X=y
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_PXA_PCI is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_DIOLAN_U2C is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_LS1B_SPI=y
+CONFIG_LS1B_SPI0=y
+# CONFIG_LS1B_SPI1 is not set
+# CONFIG_SPI_ALTERA is not set
+CONFIG_SPI_BITBANG=y
+# CONFIG_SPI_GPIO is not set
+# CONFIG_SPI_OC_TINY is not set
+# CONFIG_SPI_PXA2XX_PCI is not set
+# CONFIG_SPI_XILINX is not set
+# CONFIG_SPI_DESIGNWARE is not set
+
+#
+# SPI Protocol Masters
+#
+CONFIG_SPI_SPIDEV=y
+# CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+
+#
+# PPS generators support
+#
+
+#
+# PTP clock support
+#
+
+#
+# Enable Device Drivers -> PPS to see the PTP clock options.
+#
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO drivers:
+#
+# CONFIG_GPIO_BASIC_MMIO is not set
+# CONFIG_GPIO_IT8761E is not set
+CONFIG_GPIO_LS1C=y
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX7300 is not set
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_SX150X is not set
+# CONFIG_GPIO_ADP5588 is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+# CONFIG_GPIO_74X164 is not set
+# CONFIG_GPIO_74X165 is not set
+
+#
+# AC97 GPIO expanders:
+#
+
+#
+# MODULbus GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+CONFIG_BCMA_POSSIBLE=y
+
+#
+# Broadcom specific AMBA
+#
+# CONFIG_BCMA is not set
+# CONFIG_MFD_SUPPORT is not set
+# CONFIG_REGULATOR is not set
+CONFIG_MEDIA_SUPPORT=y
+
+#
+# Multimedia core support
+#
+CONFIG_MEDIA_CONTROLLER=y
+CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_COMMON=y
+# CONFIG_VIDEO_V4L2_SUBDEV_API is not set
+# CONFIG_DVB_CORE is not set
+CONFIG_VIDEO_MEDIA=y
+
+#
+# Multimedia drivers
+#
+CONFIG_RC_CORE=y
+CONFIG_LIRC=y
+CONFIG_RC_MAP=y
+CONFIG_IR_NEC_DECODER=y
+CONFIG_IR_RC5_DECODER=y
+CONFIG_IR_RC6_DECODER=y
+CONFIG_IR_JVC_DECODER=y
+CONFIG_IR_SONY_DECODER=y
+CONFIG_IR_RC5_SZ_DECODER=y
+CONFIG_IR_LIRC_CODEC=y
+# CONFIG_IR_IMON is not set
+# CONFIG_IR_MCEUSB is not set
+# CONFIG_IR_REDRAT3 is not set
+# CONFIG_IR_STREAMZAP is not set
+# CONFIG_RC_LOOPBACK is not set
+# CONFIG_MEDIA_ATTACH is not set
+CONFIG_MEDIA_TUNER=y
+CONFIG_MEDIA_TUNER_CUSTOMISE=y
+
+#
+# Customize TV tuners
+#
+CONFIG_MEDIA_TUNER_SIMPLE=m
+CONFIG_MEDIA_TUNER_TDA8290=m
+CONFIG_MEDIA_TUNER_TDA827X=m
+CONFIG_MEDIA_TUNER_TDA18271=m
+CONFIG_MEDIA_TUNER_TDA9887=m
+CONFIG_MEDIA_TUNER_TEA5761=m
+CONFIG_MEDIA_TUNER_TEA5767=m
+CONFIG_MEDIA_TUNER_MT20XX=m
+CONFIG_MEDIA_TUNER_MT2060=m
+CONFIG_MEDIA_TUNER_MT2266=m
+CONFIG_MEDIA_TUNER_MT2131=m
+CONFIG_MEDIA_TUNER_QT1010=m
+CONFIG_MEDIA_TUNER_XC2028=m
+CONFIG_MEDIA_TUNER_XC5000=m
+CONFIG_MEDIA_TUNER_MXL5005S=m
+CONFIG_MEDIA_TUNER_MXL5007T=m
+CONFIG_MEDIA_TUNER_MC44S803=m
+CONFIG_MEDIA_TUNER_MAX2165=m
+CONFIG_MEDIA_TUNER_TDA18218=m
+CONFIG_MEDIA_TUNER_TDA18212=m
+CONFIG_VIDEO_V4L2=y
+CONFIG_VIDEOBUF_GEN=y
+CONFIG_VIDEOBUF_DMA_CONTIG=y
+CONFIG_VIDEOBUF2_CORE=y
+CONFIG_VIDEO_CAPTURE_DRIVERS=y
+# CONFIG_VIDEO_ADV_DEBUG is not set
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set
+CONFIG_VIDEO_IR_I2C=y
+
+#
+# Encoders, decoders, sensors and other helper chips
+#
+
+#
+# Audio decoders, processors and mixers
+#
+# CONFIG_VIDEO_TVAUDIO is not set
+# CONFIG_VIDEO_TDA7432 is not set
+# CONFIG_VIDEO_TDA9840 is not set
+# CONFIG_VIDEO_TEA6415C is not set
+# CONFIG_VIDEO_TEA6420 is not set
+# CONFIG_VIDEO_MSP3400 is not set
+# CONFIG_VIDEO_CS5345 is not set
+# CONFIG_VIDEO_CS53L32A is not set
+# CONFIG_VIDEO_TLV320AIC23B is not set
+# CONFIG_VIDEO_WM8775 is not set
+# CONFIG_VIDEO_WM8739 is not set
+# CONFIG_VIDEO_VP27SMPX is not set
+
+#
+# RDS decoders
+#
+# CONFIG_VIDEO_SAA6588 is not set
+
+#
+# Video decoders
+#
+# CONFIG_VIDEO_ADV7180 is not set
+# CONFIG_VIDEO_BT819 is not set
+# CONFIG_VIDEO_BT856 is not set
+# CONFIG_VIDEO_BT866 is not set
+# CONFIG_VIDEO_KS0127 is not set
+# CONFIG_VIDEO_SAA7110 is not set
+# CONFIG_VIDEO_SAA711X is not set
+# CONFIG_VIDEO_SAA7191 is not set
+# CONFIG_VIDEO_TVP514X is not set
+# CONFIG_VIDEO_TVP5150 is not set
+# CONFIG_VIDEO_TVP7002 is not set
+# CONFIG_VIDEO_VPX3220 is not set
+
+#
+# Video and audio decoders
+#
+# CONFIG_VIDEO_SAA717X is not set
+# CONFIG_VIDEO_CX25840 is not set
+
+#
+# MPEG video encoders
+#
+# CONFIG_VIDEO_CX2341X is not set
+
+#
+# Video encoders
+#
+# CONFIG_VIDEO_SAA7127 is not set
+# CONFIG_VIDEO_SAA7185 is not set
+# CONFIG_VIDEO_ADV7170 is not set
+# CONFIG_VIDEO_ADV7175 is not set
+# CONFIG_VIDEO_ADV7343 is not set
+# CONFIG_VIDEO_AK881X is not set
+
+#
+# Camera sensor devices
+#
+# CONFIG_VIDEO_OV7670 is not set
+# CONFIG_VIDEO_MT9V011 is not set
+# CONFIG_VIDEO_TCM825X is not set
+
+#
+# Video improvement chips
+#
+# CONFIG_VIDEO_UPD64031A is not set
+# CONFIG_VIDEO_UPD64083 is not set
+
+#
+# Miscelaneous helper chips
+#
+# CONFIG_VIDEO_THS7303 is not set
+# CONFIG_VIDEO_M52790 is not set
+# CONFIG_VIDEO_VIVI is not set
+# CONFIG_VIDEO_CPIA2 is not set
+# CONFIG_VIDEO_SR030PC30 is not set
+# CONFIG_VIDEO_NOON010PC30 is not set
+CONFIG_SOC_CAMERA=y
+CONFIG_SOC_CAMERA_LS1C=y
+# CONFIG_SOC_CAMERA_GC0308 is not set
+# CONFIG_SOC_CAMERA_S5K5CA is not set
+CONFIG_SOC_CAMERA_OV9650=y
+# CONFIG_SOC_CAMERA_IMX074 is not set
+# CONFIG_SOC_CAMERA_MT9M001 is not set
+# CONFIG_SOC_CAMERA_MT9M111 is not set
+# CONFIG_SOC_CAMERA_MT9T031 is not set
+# CONFIG_SOC_CAMERA_MT9T112 is not set
+# CONFIG_SOC_CAMERA_MT9V022 is not set
+# CONFIG_SOC_CAMERA_RJ54N1 is not set
+# CONFIG_SOC_CAMERA_TW9910 is not set
+# CONFIG_SOC_CAMERA_PLATFORM is not set
+# CONFIG_SOC_CAMERA_OV2640 is not set
+# CONFIG_SOC_CAMERA_OV6650 is not set
+# CONFIG_SOC_CAMERA_OV772X is not set
+# CONFIG_SOC_CAMERA_OV9640 is not set
+# CONFIG_SOC_CAMERA_OV9740 is not set
+CONFIG_V4L_USB_DRIVERS=y
+# CONFIG_USB_VIDEO_CLASS is not set
+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
+CONFIG_USB_GSPCA=m
+# CONFIG_USB_M5602 is not set
+# CONFIG_USB_STV06XX is not set
+# CONFIG_USB_GL860 is not set
+# CONFIG_USB_GSPCA_BENQ is not set
+# CONFIG_USB_GSPCA_CONEX is not set
+# CONFIG_USB_GSPCA_CPIA1 is not set
+# CONFIG_USB_GSPCA_ETOMS is not set
+# CONFIG_USB_GSPCA_FINEPIX is not set
+# CONFIG_USB_GSPCA_JEILINJ is not set
+# CONFIG_USB_GSPCA_KINECT is not set
+# CONFIG_USB_GSPCA_KONICA is not set
+# CONFIG_USB_GSPCA_MARS is not set
+# CONFIG_USB_GSPCA_MR97310A is not set
+# CONFIG_USB_GSPCA_NW80X is not set
+# CONFIG_USB_GSPCA_OV519 is not set
+# CONFIG_USB_GSPCA_OV534 is not set
+# CONFIG_USB_GSPCA_OV534_9 is not set
+# CONFIG_USB_GSPCA_PAC207 is not set
+# CONFIG_USB_GSPCA_PAC7302 is not set
+# CONFIG_USB_GSPCA_PAC7311 is not set
+# CONFIG_USB_GSPCA_SN9C2028 is not set
+# CONFIG_USB_GSPCA_SN9C20X is not set
+# CONFIG_USB_GSPCA_SONIXB is not set
+# CONFIG_USB_GSPCA_SONIXJ is not set
+# CONFIG_USB_GSPCA_SPCA500 is not set
+# CONFIG_USB_GSPCA_SPCA501 is not set
+# CONFIG_USB_GSPCA_SPCA505 is not set
+# CONFIG_USB_GSPCA_SPCA506 is not set
+# CONFIG_USB_GSPCA_SPCA508 is not set
+# CONFIG_USB_GSPCA_SPCA561 is not set
+# CONFIG_USB_GSPCA_SPCA1528 is not set
+# CONFIG_USB_GSPCA_SQ905 is not set
+# CONFIG_USB_GSPCA_SQ905C is not set
+# CONFIG_USB_GSPCA_SQ930X is not set
+# CONFIG_USB_GSPCA_STK014 is not set
+# CONFIG_USB_GSPCA_STV0680 is not set
+# CONFIG_USB_GSPCA_SUNPLUS is not set
+# CONFIG_USB_GSPCA_T613 is not set
+# CONFIG_USB_GSPCA_TV8532 is not set
+# CONFIG_USB_GSPCA_VC032X is not set
+# CONFIG_USB_GSPCA_VICAM is not set
+# CONFIG_USB_GSPCA_XIRLINK_CIT is not set
+# CONFIG_USB_GSPCA_ZC3XX is not set
+# CONFIG_VIDEO_PVRUSB2 is not set
+# CONFIG_VIDEO_HDPVR is not set
+# CONFIG_VIDEO_EM28XX is not set
+# CONFIG_VIDEO_CX231XX is not set
+# CONFIG_VIDEO_USBVISION is not set
+# CONFIG_USB_ET61X251 is not set
+# CONFIG_USB_SN9C102 is not set
+# CONFIG_USB_PWC is not set
+# CONFIG_USB_ZR364XX is not set
+# CONFIG_USB_STKWEBCAM is not set
+# CONFIG_USB_S2255 is not set
+# CONFIG_VIDEO_GC0308 is not set
+# CONFIG_V4L_MEM2MEM_DRIVERS is not set
+CONFIG_RADIO_ADAPTERS=y
+# CONFIG_I2C_SI4713 is not set
+# CONFIG_RADIO_SI4713 is not set
+# CONFIG_USB_DSBR is not set
+# CONFIG_RADIO_SI470X is not set
+# CONFIG_USB_MR800 is not set
+# CONFIG_RADIO_TEA5764 is not set
+# CONFIG_RADIO_SAA7706H is not set
+# CONFIG_RADIO_TEF6862 is not set
+# CONFIG_RADIO_WL1273 is not set
+
+#
+# Texas Instruments WL128x FM driver (ST based)
+#
+
+#
+# Graphics support
+#
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_WMT_GE_ROPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_SSD1305 is not set
+# CONFIG_FB_ST7565 is not set
+# CONFIG_FB_ST7920 is not set
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_LOONGSON1=y
+CONFIG_LS1X_FB0=y
+# CONFIG_FB_LS1X_I2C is not set
+# CONFIG_FB_UDL is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_BROADSHEET is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+CONFIG_SOUND=y
+CONFIG_SOUND_OSS_CORE=y
+# CONFIG_SOUND_OSS_CORE_PRECLAIM is not set
+# CONFIG_SND is not set
+CONFIG_SOUND_PRIME=y
+# CONFIG_SOUND_LS1X_AC97 is not set
+CONFIG_SOUND_LS1X_UDA1342=y
+# CONFIG_HID_SUPPORT is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+CONFIG_USB_OTG=y
+CONFIG_USB_OTG_WHITELIST=y
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
+CONFIG_USB_EHCI_TT_NEWSCHED=y
+CONFIG_USB_EHCI_HCD_LS1X=y
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_LS1X=y
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_OHCI_HCD_PLATFORM is not set
+# CONFIG_USB_EHCI_HCD_PLATFORM is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_REALTEK is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_STORAGE_ENE_UB6250 is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_YUREX is not set
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+CONFIG_USB_GADGET_SNPS_DWC_OTG=y
+# CONFIG_USB_GADGET_FUSB300 is not set
+# CONFIG_USB_GADGET_R8A66597 is not set
+# CONFIG_USB_GADGET_PXA_U2O is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_USB_DWC_OTG_LPM=y
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_ETH is not set
+# CONFIG_USB_G_NCM is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FUNCTIONFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+CONFIG_USB_MASS_STORAGE=m
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_USB_G_MULTI is not set
+# CONFIG_USB_G_HID is not set
+# CONFIG_USB_G_DBGP is not set
+# CONFIG_USB_G_WEBCAM is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_NFC_DEVICES is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_DS3232 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_ISL12022 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+# CONFIG_RTC_DRV_EM3027 is not set
+# CONFIG_RTC_DRV_RV3029C2 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T93 is not set
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_LOONGSON1 is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_DEFAULTS_TO_ORDERED=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_EXPORTFS=y
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_FANOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_QUOTACTL is not set
+CONFIG_AUTOFS4_FS=y
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=936
+CONFIG_FAT_DEFAULT_IOCHARSET="cp936"
+CONFIG_NTFS_FS=y
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_TMPFS_XATTR=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_CONFIGFS_FS=y
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_YAFFS_FS=y
+CONFIG_YAFFS_YAFFS1=y
+# CONFIG_YAFFS_9BYTE_TAGS is not set
+# CONFIG_YAFFS_DOES_ECC is not set
+CONFIG_YAFFS_YAFFS2=y
+CONFIG_YAFFS_AUTO_YAFFS2=y
+CONFIG_YAFFS_DISABLE_TAGS_ECC=y
+# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
+# CONFIG_YAFFS_EMPTY_LOST_AND_FOUND is not set
+# CONFIG_YAFFS_DISABLE_BLOCK_REFRESHING is not set
+# CONFIG_YAFFS_DISABLE_BACKGROUND is not set
+CONFIG_YAFFS_XATTR=y
+# CONFIG_JFFS2_FS is not set
+# CONFIG_LOGFS is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_MINIX_FS_NATIVE_ENDIAN is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_PSTORE is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_V4_1=y
+CONFIG_PNFS_FILE_LAYOUT=y
+CONFIG_ROOT_NFS=y
+CONFIG_NFS_USE_LEGACY_DNS=y
+CONFIG_NFSD=y
+CONFIG_NFSD_DEPRECATED=y
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_V4 is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+# CONFIG_CEPH_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="cp936"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+CONFIG_NLS_CODEPAGE_936=y
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_SECTION_MISMATCH is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+# CONFIG_LOCKUP_DETECTOR is not set
+# CONFIG_HARDLOCKUP_DETECTOR is not set
+# CONFIG_DETECT_HUNG_TASK is not set
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_SPARSE_RCU_POINTER is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_INFO_REDUCED is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_TEST_LIST_SORT is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
+# CONFIG_ATOMIC64_SELFTEST is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_TEST_KSTRTOX is not set
+CONFIG_EARLY_PRINTK=y
+# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_RUNTIME_DEBUG is not set
+# CONFIG_DEBUG_ZBOOT is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY_DMESG_RESTRICT is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_PCOMP2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=y
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_SHA256=y
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_ZLIB=y
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_USER_API_HASH is not set
+# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_VIRTUALIZATION is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC_ITU_T=y
+CONFIG_CRC32=y
+CONFIG_CRC7=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+# CONFIG_XZ_DEC is not set
+# CONFIG_XZ_DEC_BCJ is not set
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_AVERAGE=y
diff -uNra linux-3.0.82/Makefile linux-3.0.82x/Makefile
--- linux-3.0.82/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/Makefile	2017-09-23 03:42:50.330674109 +0800
@@ -192,8 +192,9 @@
 # Default value for CROSS_COMPILE is not to prefix executables
 # Note: Some architectures assign CROSS_COMPILE in their arch/*/Makefile
 export KBUILD_BUILDHOST := $(SUBARCH)
-ARCH		?= $(SUBARCH)
-CROSS_COMPILE	?= $(CONFIG_CROSS_COMPILE:"%"=%)
+ARCH		?= mips#$(SUBARCH)
+CROSS_COMPILE	?= mipsel-linux-#$(CONFIG_CROSS_COMPILE:"%"=%)
+#CROSS_COMPILE	?= mipsel-loongson-linux-gnu-#mipsel-linux-#$(CONFIG_CROSS_COMPILE:"%"=%)
 
 # Architecture as present in compile.h
 UTS_MACHINE 	:= $(ARCH)
@@ -369,6 +370,10 @@
 		   -Werror-implicit-function-declaration \
 		   -Wno-format-security \
 		   -fno-delete-null-pointer-checks
+#		   -Werror-implicit-function-declaration \
+#thf
+#KBUILD_CFLAGS += $(call cc-option,-fno-tree-scev-cprop,)
+
 KBUILD_AFLAGS_KERNEL :=
 KBUILD_CFLAGS_KERNEL :=
 KBUILD_AFLAGS   := -D__ASSEMBLY__
diff -uNra linux-3.0.82/mymake linux-3.0.82x/mymake
--- linux-3.0.82/mymake	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/mymake	2017-09-23 03:42:50.330674109 +0800
@@ -0,0 +1,7 @@
+#!/bin/sh
+export PATH=/opt/gcc-4.3-ls232/bin/:$PATH
+#export PATH=/opt/gcc-4.4-64-gnu/bin/:$PATH
+
+#export MAKEFLAGS='CC=mipsel-linux-gcc\ -g'
+make ARCH=mips CROSS_COMPILE=mipsel-linux- -j4 "$@"
+#make ARCH=mips CROSS_COMPILE=mips64el-linux- -j4 "$@"
diff -uNra linux-3.0.82/scripts/basic/fixdep linux-3.0.82x/scripts/basic/fixdep
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/scripts/bin2c linux-3.0.82x/scripts/bin2c
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/scripts/conmakehash linux-3.0.82x/scripts/conmakehash
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/scripts/genksyms/genksyms linux-3.0.82x/scripts/genksyms/genksyms
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/scripts/genksyms/keywords.c linux-3.0.82x/scripts/genksyms/keywords.c
--- linux-3.0.82/scripts/genksyms/keywords.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/scripts/genksyms/keywords.c	2017-09-23 03:42:50.334674098 +0800
@@ -0,0 +1,220 @@
+/* ANSI-C code produced by gperf version 3.0.4 */
+/* Command-line: gperf -L ANSI-C -a -C -E -g -H is_reserved_hash -k '1,3,$' -N is_reserved_word -p -t scripts/genksyms/keywords.gperf  */
+
+#if !((' ' == 32) && ('!' == 33) && ('"' == 34) && ('#' == 35) \
+      && ('%' == 37) && ('&' == 38) && ('\'' == 39) && ('(' == 40) \
+      && (')' == 41) && ('*' == 42) && ('+' == 43) && (',' == 44) \
+      && ('-' == 45) && ('.' == 46) && ('/' == 47) && ('0' == 48) \
+      && ('1' == 49) && ('2' == 50) && ('3' == 51) && ('4' == 52) \
+      && ('5' == 53) && ('6' == 54) && ('7' == 55) && ('8' == 56) \
+      && ('9' == 57) && (':' == 58) && (';' == 59) && ('<' == 60) \
+      && ('=' == 61) && ('>' == 62) && ('?' == 63) && ('A' == 65) \
+      && ('B' == 66) && ('C' == 67) && ('D' == 68) && ('E' == 69) \
+      && ('F' == 70) && ('G' == 71) && ('H' == 72) && ('I' == 73) \
+      && ('J' == 74) && ('K' == 75) && ('L' == 76) && ('M' == 77) \
+      && ('N' == 78) && ('O' == 79) && ('P' == 80) && ('Q' == 81) \
+      && ('R' == 82) && ('S' == 83) && ('T' == 84) && ('U' == 85) \
+      && ('V' == 86) && ('W' == 87) && ('X' == 88) && ('Y' == 89) \
+      && ('Z' == 90) && ('[' == 91) && ('\\' == 92) && (']' == 93) \
+      && ('^' == 94) && ('_' == 95) && ('a' == 97) && ('b' == 98) \
+      && ('c' == 99) && ('d' == 100) && ('e' == 101) && ('f' == 102) \
+      && ('g' == 103) && ('h' == 104) && ('i' == 105) && ('j' == 106) \
+      && ('k' == 107) && ('l' == 108) && ('m' == 109) && ('n' == 110) \
+      && ('o' == 111) && ('p' == 112) && ('q' == 113) && ('r' == 114) \
+      && ('s' == 115) && ('t' == 116) && ('u' == 117) && ('v' == 118) \
+      && ('w' == 119) && ('x' == 120) && ('y' == 121) && ('z' == 122) \
+      && ('{' == 123) && ('|' == 124) && ('}' == 125) && ('~' == 126))
+/* The character set is not based on ISO-646.  */
+#error "gperf generated tables don't work with this execution character set. Please report a bug to <bug-gnu-gperf@gnu.org>."
+#endif
+
+#line 1 "scripts/genksyms/keywords.gperf"
+
+struct resword;
+static const struct resword *is_reserved_word(register const char *str, register unsigned int len);
+#line 5 "scripts/genksyms/keywords.gperf"
+struct resword { const char *name; int token; };
+/* maximum key range = 64, duplicates = 0 */
+
+#ifdef __GNUC__
+__inline
+#else
+#ifdef __cplusplus
+inline
+#endif
+#endif
+static unsigned int
+is_reserved_hash (register const char *str, register unsigned int len)
+{
+  static const unsigned char asso_values[] =
+    {
+      67, 67, 67, 67, 67, 67, 67, 67, 67, 67,
+      67, 67, 67, 67, 67, 67, 67, 67, 67, 67,
+      67, 67, 67, 67, 67, 67, 67, 67, 67, 67,
+      67, 67, 67, 67, 67, 67, 67, 67, 67, 67,
+      67, 67, 67, 67, 67, 67, 67, 67, 67, 67,
+      67, 67, 67, 67, 67, 67, 67, 67, 67, 67,
+      67, 67, 67, 67, 67, 67, 67, 67, 67,  0,
+      67, 67, 67, 67, 67, 67, 15, 67, 67, 67,
+       0, 67, 67, 67, 67, 67, 67, 67, 67, 67,
+      67, 67, 67, 67, 67,  0, 67,  0, 67,  5,
+      25, 20, 15, 30, 67, 15, 67, 67, 10,  0,
+      10, 40, 20, 67, 10,  5,  0, 10, 15, 67,
+      67, 67, 67, 67, 67, 67, 67, 67, 67, 67,
+      67, 67, 67, 67, 67, 67, 67, 67, 67, 67,
+      67, 67, 67, 67, 67, 67, 67, 67, 67, 67,
+      67, 67, 67, 67, 67, 67, 67, 67, 67, 67,
+      67, 67, 67, 67, 67, 67, 67, 67, 67, 67,
+      67, 67, 67, 67, 67, 67, 67, 67, 67, 67,
+      67, 67, 67, 67, 67, 67, 67, 67, 67, 67,
+      67, 67, 67, 67, 67, 67, 67, 67, 67, 67,
+      67, 67, 67, 67, 67, 67, 67, 67, 67, 67,
+      67, 67, 67, 67, 67, 67, 67, 67, 67, 67,
+      67, 67, 67, 67, 67, 67, 67, 67, 67, 67,
+      67, 67, 67, 67, 67, 67, 67, 67, 67, 67,
+      67, 67, 67, 67, 67, 67, 67, 67, 67, 67,
+      67, 67, 67, 67, 67, 67
+    };
+  return len + asso_values[(unsigned char)str[2]] + asso_values[(unsigned char)str[0]] + asso_values[(unsigned char)str[len - 1]];
+}
+
+#ifdef __GNUC__
+__inline
+#if defined __GNUC_STDC_INLINE__ || defined __GNUC_GNU_INLINE__
+__attribute__ ((__gnu_inline__))
+#endif
+#endif
+const struct resword *
+is_reserved_word (register const char *str, register unsigned int len)
+{
+  enum
+    {
+      TOTAL_KEYWORDS = 45,
+      MIN_WORD_LENGTH = 3,
+      MAX_WORD_LENGTH = 24,
+      MIN_HASH_VALUE = 3,
+      MAX_HASH_VALUE = 66
+    };
+
+  static const struct resword wordlist[] =
+    {
+      {""}, {""}, {""},
+#line 30 "scripts/genksyms/keywords.gperf"
+      {"asm", ASM_KEYW},
+      {""},
+#line 12 "scripts/genksyms/keywords.gperf"
+      {"__asm", ASM_KEYW},
+      {""},
+#line 13 "scripts/genksyms/keywords.gperf"
+      {"__asm__", ASM_KEYW},
+      {""}, {""},
+#line 56 "scripts/genksyms/keywords.gperf"
+      {"__typeof__", TYPEOF_KEYW},
+      {""},
+#line 16 "scripts/genksyms/keywords.gperf"
+      {"__const", CONST_KEYW},
+#line 15 "scripts/genksyms/keywords.gperf"
+      {"__attribute__", ATTRIBUTE_KEYW},
+#line 17 "scripts/genksyms/keywords.gperf"
+      {"__const__", CONST_KEYW},
+#line 22 "scripts/genksyms/keywords.gperf"
+      {"__signed__", SIGNED_KEYW},
+#line 48 "scripts/genksyms/keywords.gperf"
+      {"static", STATIC_KEYW},
+      {""},
+#line 43 "scripts/genksyms/keywords.gperf"
+      {"int", INT_KEYW},
+#line 36 "scripts/genksyms/keywords.gperf"
+      {"char", CHAR_KEYW},
+#line 37 "scripts/genksyms/keywords.gperf"
+      {"const", CONST_KEYW},
+#line 49 "scripts/genksyms/keywords.gperf"
+      {"struct", STRUCT_KEYW},
+#line 28 "scripts/genksyms/keywords.gperf"
+      {"__restrict__", RESTRICT_KEYW},
+#line 29 "scripts/genksyms/keywords.gperf"
+      {"restrict", RESTRICT_KEYW},
+#line 9 "scripts/genksyms/keywords.gperf"
+      {"EXPORT_SYMBOL_GPL_FUTURE", EXPORT_SYMBOL_KEYW},
+#line 20 "scripts/genksyms/keywords.gperf"
+      {"__inline__", INLINE_KEYW},
+      {""},
+#line 24 "scripts/genksyms/keywords.gperf"
+      {"__volatile__", VOLATILE_KEYW},
+#line 7 "scripts/genksyms/keywords.gperf"
+      {"EXPORT_SYMBOL", EXPORT_SYMBOL_KEYW},
+#line 27 "scripts/genksyms/keywords.gperf"
+      {"_restrict", RESTRICT_KEYW},
+      {""},
+#line 14 "scripts/genksyms/keywords.gperf"
+      {"__attribute", ATTRIBUTE_KEYW},
+#line 8 "scripts/genksyms/keywords.gperf"
+      {"EXPORT_SYMBOL_GPL", EXPORT_SYMBOL_KEYW},
+#line 18 "scripts/genksyms/keywords.gperf"
+      {"__extension__", EXTENSION_KEYW},
+#line 39 "scripts/genksyms/keywords.gperf"
+      {"enum", ENUM_KEYW},
+#line 10 "scripts/genksyms/keywords.gperf"
+      {"EXPORT_UNUSED_SYMBOL", EXPORT_SYMBOL_KEYW},
+#line 40 "scripts/genksyms/keywords.gperf"
+      {"extern", EXTERN_KEYW},
+      {""},
+#line 21 "scripts/genksyms/keywords.gperf"
+      {"__signed", SIGNED_KEYW},
+#line 11 "scripts/genksyms/keywords.gperf"
+      {"EXPORT_UNUSED_SYMBOL_GPL", EXPORT_SYMBOL_KEYW},
+#line 51 "scripts/genksyms/keywords.gperf"
+      {"union", UNION_KEYW},
+#line 55 "scripts/genksyms/keywords.gperf"
+      {"typeof", TYPEOF_KEYW},
+#line 50 "scripts/genksyms/keywords.gperf"
+      {"typedef", TYPEDEF_KEYW},
+#line 19 "scripts/genksyms/keywords.gperf"
+      {"__inline", INLINE_KEYW},
+#line 35 "scripts/genksyms/keywords.gperf"
+      {"auto", AUTO_KEYW},
+#line 23 "scripts/genksyms/keywords.gperf"
+      {"__volatile", VOLATILE_KEYW},
+      {""}, {""},
+#line 52 "scripts/genksyms/keywords.gperf"
+      {"unsigned", UNSIGNED_KEYW},
+      {""},
+#line 46 "scripts/genksyms/keywords.gperf"
+      {"short", SHORT_KEYW},
+#line 42 "scripts/genksyms/keywords.gperf"
+      {"inline", INLINE_KEYW},
+      {""},
+#line 54 "scripts/genksyms/keywords.gperf"
+      {"volatile", VOLATILE_KEYW},
+#line 44 "scripts/genksyms/keywords.gperf"
+      {"long", LONG_KEYW},
+#line 26 "scripts/genksyms/keywords.gperf"
+      {"_Bool", BOOL_KEYW},
+      {""}, {""},
+#line 45 "scripts/genksyms/keywords.gperf"
+      {"register", REGISTER_KEYW},
+#line 53 "scripts/genksyms/keywords.gperf"
+      {"void", VOID_KEYW},
+#line 41 "scripts/genksyms/keywords.gperf"
+      {"float", FLOAT_KEYW},
+#line 38 "scripts/genksyms/keywords.gperf"
+      {"double", DOUBLE_KEYW},
+      {""}, {""}, {""}, {""},
+#line 47 "scripts/genksyms/keywords.gperf"
+      {"signed", SIGNED_KEYW}
+    };
+
+  if (len <= MAX_WORD_LENGTH && len >= MIN_WORD_LENGTH)
+    {
+      register int key = is_reserved_hash (str, len);
+
+      if (key <= MAX_HASH_VALUE && key >= 0)
+        {
+          register const char *s = wordlist[key].name;
+
+          if (*str == *s && !strcmp (str + 1, s + 1))
+            return &wordlist[key];
+        }
+    }
+  return 0;
+}
diff -uNra linux-3.0.82/scripts/genksyms/lex.c linux-3.0.82x/scripts/genksyms/lex.c
--- linux-3.0.82/scripts/genksyms/lex.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/scripts/genksyms/lex.c	2017-09-23 03:42:50.338674085 +0800
@@ -0,0 +1,2582 @@
+#line 2 "scripts/genksyms/lex.c"
+
+#line 4 "scripts/genksyms/lex.c"
+
+#define  YY_INT_ALIGNED short int
+
+/* A lexical scanner generated by flex */
+
+/* %not-for-header */
+
+/* %if-c-only */
+/* %if-not-reentrant */
+
+/* %endif */
+/* %endif */
+/* %ok-for-header */
+
+#define FLEX_SCANNER
+#define YY_FLEX_MAJOR_VERSION 2
+#define YY_FLEX_MINOR_VERSION 5
+#define YY_FLEX_SUBMINOR_VERSION 35
+#if YY_FLEX_SUBMINOR_VERSION > 0
+#define FLEX_BETA
+#endif
+
+/* %if-c++-only */
+/* %endif */
+
+/* %if-c-only */
+    
+/* %endif */
+
+/* %if-c-only */
+
+/* %endif */
+
+/* First, we deal with  platform-specific or compiler-specific issues. */
+
+/* begin standard C headers. */
+/* %if-c-only */
+#include <stdio.h>
+#include <string.h>
+#include <errno.h>
+#include <stdlib.h>
+/* %endif */
+
+/* %if-tables-serialization */
+/* %endif */
+/* end standard C headers. */
+
+/* %if-c-or-c++ */
+/* flex integer type definitions */
+
+#ifndef FLEXINT_H
+#define FLEXINT_H
+
+/* C99 systems have <inttypes.h>. Non-C99 systems may or may not. */
+
+#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
+
+/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h,
+ * if you want the limit (max/min) macros for int types. 
+ */
+#ifndef __STDC_LIMIT_MACROS
+#define __STDC_LIMIT_MACROS 1
+#endif
+
+#include <inttypes.h>
+typedef int8_t flex_int8_t;
+typedef uint8_t flex_uint8_t;
+typedef int16_t flex_int16_t;
+typedef uint16_t flex_uint16_t;
+typedef int32_t flex_int32_t;
+typedef uint32_t flex_uint32_t;
+#else
+typedef signed char flex_int8_t;
+typedef short int flex_int16_t;
+typedef int flex_int32_t;
+typedef unsigned char flex_uint8_t; 
+typedef unsigned short int flex_uint16_t;
+typedef unsigned int flex_uint32_t;
+#endif /* ! C99 */
+
+/* Limits of integral types. */
+#ifndef INT8_MIN
+#define INT8_MIN               (-128)
+#endif
+#ifndef INT16_MIN
+#define INT16_MIN              (-32767-1)
+#endif
+#ifndef INT32_MIN
+#define INT32_MIN              (-2147483647-1)
+#endif
+#ifndef INT8_MAX
+#define INT8_MAX               (127)
+#endif
+#ifndef INT16_MAX
+#define INT16_MAX              (32767)
+#endif
+#ifndef INT32_MAX
+#define INT32_MAX              (2147483647)
+#endif
+#ifndef UINT8_MAX
+#define UINT8_MAX              (255U)
+#endif
+#ifndef UINT16_MAX
+#define UINT16_MAX             (65535U)
+#endif
+#ifndef UINT32_MAX
+#define UINT32_MAX             (4294967295U)
+#endif
+
+#endif /* ! FLEXINT_H */
+
+/* %endif */
+
+/* %if-c++-only */
+/* %endif */
+
+#ifdef __cplusplus
+
+/* The "const" storage-class-modifier is valid. */
+#define YY_USE_CONST
+
+#else	/* ! __cplusplus */
+
+/* C99 requires __STDC__ to be defined as 1. */
+#if defined (__STDC__)
+
+#define YY_USE_CONST
+
+#endif	/* defined (__STDC__) */
+#endif	/* ! __cplusplus */
+
+#ifdef YY_USE_CONST
+#define yyconst const
+#else
+#define yyconst
+#endif
+
+/* %not-for-header */
+
+/* Returned upon end-of-file. */
+#define YY_NULL 0
+/* %ok-for-header */
+
+/* %not-for-header */
+
+/* Promotes a possibly negative, possibly signed char to an unsigned
+ * integer for use as an array index.  If the signed char is negative,
+ * we want to instead treat it as an 8-bit unsigned char, hence the
+ * double cast.
+ */
+#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c)
+/* %ok-for-header */
+
+/* %if-reentrant */
+/* %endif */
+
+/* %if-not-reentrant */
+
+/* %endif */
+
+/* Enter a start condition.  This macro really ought to take a parameter,
+ * but we do it the disgusting crufty way forced on us by the ()-less
+ * definition of BEGIN.
+ */
+#define BEGIN (yy_start) = 1 + 2 *
+
+/* Translate the current start state into a value that can be later handed
+ * to BEGIN to return to the state.  The YYSTATE alias is for lex
+ * compatibility.
+ */
+#define YY_START (((yy_start) - 1) / 2)
+#define YYSTATE YY_START
+
+/* Action number for EOF rule of a given start state. */
+#define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1)
+
+/* Special action meaning "start processing a new file". */
+#define YY_NEW_FILE yyrestart(yyin  )
+
+#define YY_END_OF_BUFFER_CHAR 0
+
+/* Size of default input buffer. */
+#ifndef YY_BUF_SIZE
+#define YY_BUF_SIZE 16384
+#endif
+
+/* The state buf must be large enough to hold one state per character in the main buffer.
+ */
+#define YY_STATE_BUF_SIZE   ((YY_BUF_SIZE + 2) * sizeof(yy_state_type))
+
+#ifndef YY_TYPEDEF_YY_BUFFER_STATE
+#define YY_TYPEDEF_YY_BUFFER_STATE
+typedef struct yy_buffer_state *YY_BUFFER_STATE;
+#endif
+
+/* %if-not-reentrant */
+extern int yyleng;
+/* %endif */
+
+/* %if-c-only */
+/* %if-not-reentrant */
+extern FILE *yyin, *yyout;
+/* %endif */
+/* %endif */
+
+#define EOB_ACT_CONTINUE_SCAN 0
+#define EOB_ACT_END_OF_FILE 1
+#define EOB_ACT_LAST_MATCH 2
+
+    #define YY_LESS_LINENO(n)
+    
+/* Return all but the first "n" matched characters back to the input stream. */
+#define yyless(n) \
+	do \
+		{ \
+		/* Undo effects of setting up yytext. */ \
+        int yyless_macro_arg = (n); \
+        YY_LESS_LINENO(yyless_macro_arg);\
+		*yy_cp = (yy_hold_char); \
+		YY_RESTORE_YY_MORE_OFFSET \
+		(yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \
+		YY_DO_BEFORE_ACTION; /* set up yytext again */ \
+		} \
+	while ( 0 )
+
+#define unput(c) yyunput( c, (yytext_ptr)  )
+
+#ifndef YY_TYPEDEF_YY_SIZE_T
+#define YY_TYPEDEF_YY_SIZE_T
+typedef size_t yy_size_t;
+#endif
+
+#ifndef YY_STRUCT_YY_BUFFER_STATE
+#define YY_STRUCT_YY_BUFFER_STATE
+struct yy_buffer_state
+	{
+/* %if-c-only */
+	FILE *yy_input_file;
+/* %endif */
+
+/* %if-c++-only */
+/* %endif */
+
+	char *yy_ch_buf;		/* input buffer */
+	char *yy_buf_pos;		/* current position in input buffer */
+
+	/* Size of input buffer in bytes, not including room for EOB
+	 * characters.
+	 */
+	yy_size_t yy_buf_size;
+
+	/* Number of characters read into yy_ch_buf, not including EOB
+	 * characters.
+	 */
+	int yy_n_chars;
+
+	/* Whether we "own" the buffer - i.e., we know we created it,
+	 * and can realloc() it to grow it, and should free() it to
+	 * delete it.
+	 */
+	int yy_is_our_buffer;
+
+	/* Whether this is an "interactive" input source; if so, and
+	 * if we're using stdio for input, then we want to use getc()
+	 * instead of fread(), to make sure we stop fetching input after
+	 * each newline.
+	 */
+	int yy_is_interactive;
+
+	/* Whether we're considered to be at the beginning of a line.
+	 * If so, '^' rules will be active on the next match, otherwise
+	 * not.
+	 */
+	int yy_at_bol;
+
+    int yy_bs_lineno; /**< The line count. */
+    int yy_bs_column; /**< The column count. */
+    
+	/* Whether to try to fill the input buffer when we reach the
+	 * end of it.
+	 */
+	int yy_fill_buffer;
+
+	int yy_buffer_status;
+
+#define YY_BUFFER_NEW 0
+#define YY_BUFFER_NORMAL 1
+	/* When an EOF's been seen but there's still some text to process
+	 * then we mark the buffer as YY_EOF_PENDING, to indicate that we
+	 * shouldn't try reading from the input source any more.  We might
+	 * still have a bunch of tokens to match, though, because of
+	 * possible backing-up.
+	 *
+	 * When we actually see the EOF, we change the status to "new"
+	 * (via yyrestart()), so that the user can continue scanning by
+	 * just pointing yyin at a new input file.
+	 */
+#define YY_BUFFER_EOF_PENDING 2
+
+	};
+#endif /* !YY_STRUCT_YY_BUFFER_STATE */
+
+/* %if-c-only Standard (non-C++) definition */
+/* %not-for-header */
+
+/* %if-not-reentrant */
+
+/* Stack of input buffers. */
+static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */
+static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */
+static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */
+/* %endif */
+/* %ok-for-header */
+
+/* %endif */
+
+/* We provide macros for accessing buffer states in case in the
+ * future we want to put the buffer states in a more general
+ * "scanner state".
+ *
+ * Returns the top of the stack, or NULL.
+ */
+#define YY_CURRENT_BUFFER ( (yy_buffer_stack) \
+                          ? (yy_buffer_stack)[(yy_buffer_stack_top)] \
+                          : NULL)
+
+/* Same as previous macro, but useful when we know that the buffer stack is not
+ * NULL or when we need an lvalue. For internal use only.
+ */
+#define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)]
+
+/* %if-c-only Standard (non-C++) definition */
+
+/* %if-not-reentrant */
+/* %not-for-header */
+
+/* yy_hold_char holds the character lost when yytext is formed. */
+static char yy_hold_char;
+static int yy_n_chars;		/* number of characters read into yy_ch_buf */
+int yyleng;
+
+/* Points to current character in buffer. */
+static char *yy_c_buf_p = (char *) 0;
+static int yy_init = 0;		/* whether we need to initialize */
+static int yy_start = 0;	/* start state number */
+
+/* Flag which is used to allow yywrap()'s to do buffer switches
+ * instead of setting up a fresh yyin.  A bit of a hack ...
+ */
+static int yy_did_buffer_switch_on_eof;
+/* %ok-for-header */
+
+/* %endif */
+
+void yyrestart (FILE *input_file  );
+void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer  );
+YY_BUFFER_STATE yy_create_buffer (FILE *file,int size  );
+void yy_delete_buffer (YY_BUFFER_STATE b  );
+void yy_flush_buffer (YY_BUFFER_STATE b  );
+void yypush_buffer_state (YY_BUFFER_STATE new_buffer  );
+void yypop_buffer_state (void );
+
+static void yyensure_buffer_stack (void );
+static void yy_load_buffer_state (void );
+static void yy_init_buffer (YY_BUFFER_STATE b,FILE *file  );
+
+#define YY_FLUSH_BUFFER yy_flush_buffer(YY_CURRENT_BUFFER )
+
+YY_BUFFER_STATE yy_scan_buffer (char *base,yy_size_t size  );
+YY_BUFFER_STATE yy_scan_string (yyconst char *yy_str  );
+YY_BUFFER_STATE yy_scan_bytes (yyconst char *bytes,int len  );
+
+/* %endif */
+
+void *yyalloc (yy_size_t  );
+void *yyrealloc (void *,yy_size_t  );
+void yyfree (void *  );
+
+#define yy_new_buffer yy_create_buffer
+
+#define yy_set_interactive(is_interactive) \
+	{ \
+	if ( ! YY_CURRENT_BUFFER ){ \
+        yyensure_buffer_stack (); \
+		YY_CURRENT_BUFFER_LVALUE =    \
+            yy_create_buffer(yyin,YY_BUF_SIZE ); \
+	} \
+	YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \
+	}
+
+#define yy_set_bol(at_bol) \
+	{ \
+	if ( ! YY_CURRENT_BUFFER ){\
+        yyensure_buffer_stack (); \
+		YY_CURRENT_BUFFER_LVALUE =    \
+            yy_create_buffer(yyin,YY_BUF_SIZE ); \
+	} \
+	YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \
+	}
+
+#define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol)
+
+/* %% [1.0] yytext/yyin/yyout/yy_state_type/yylineno etc. def's & init go here */
+/* Begin user sect3 */
+
+#define yywrap(n) 1
+#define YY_SKIP_YYWRAP
+
+#define FLEX_DEBUG
+
+typedef unsigned char YY_CHAR;
+
+FILE *yyin = (FILE *) 0, *yyout = (FILE *) 0;
+
+typedef int yy_state_type;
+
+extern int yylineno;
+
+int yylineno = 1;
+
+extern char *yytext;
+#define yytext_ptr yytext
+
+/* %if-c-only Standard (non-C++) definition */
+
+static yy_state_type yy_get_previous_state (void );
+static yy_state_type yy_try_NUL_trans (yy_state_type current_state  );
+static int yy_get_next_buffer (void );
+static void yy_fatal_error (yyconst char msg[]  );
+
+/* %endif */
+
+/* Done after the current pattern has been matched and before the
+ * corresponding action - sets up yytext.
+ */
+#define YY_DO_BEFORE_ACTION \
+	(yytext_ptr) = yy_bp; \
+/* %% [2.0] code to fiddle yytext and yyleng for yymore() goes here \ */\
+	yyleng = (size_t) (yy_cp - yy_bp); \
+	(yy_hold_char) = *yy_cp; \
+	*yy_cp = '\0'; \
+/* %% [3.0] code to copy yytext_ptr to yytext[] goes here, if %array \ */\
+	(yy_c_buf_p) = yy_cp;
+
+/* %% [4.0] data tables for the DFA and the user's section 1 definitions go here */
+#define YY_NUM_RULES 13
+#define YY_END_OF_BUFFER 14
+/* This struct is not used in this scanner,
+   but its presence is necessary. */
+struct yy_trans_info
+	{
+	flex_int32_t yy_verify;
+	flex_int32_t yy_nxt;
+	};
+static yyconst flex_int16_t yy_accept[73] =
+    {   0,
+        0,    0,   14,   12,    4,    3,   12,    7,   12,   12,
+       12,   12,   12,    9,    9,   12,   12,    7,   12,   12,
+        4,    0,    5,    0,    7,    8,    0,    6,    0,    0,
+       10,   10,    9,    0,    0,    9,    9,    0,    9,    0,
+        0,    0,    0,    2,    0,    0,   11,    0,   10,    0,
+       10,    9,    9,    0,    0,    0,   10,   10,    0,    0,
+        0,    0,    0,    0,    0,    0,    0,    0,    0,    0,
+        1,    0
+    } ;
+
+static yyconst flex_int32_t yy_ec[256] =
+    {   0,
+        1,    1,    1,    1,    1,    1,    1,    1,    2,    3,
+        4,    4,    4,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    2,    1,    5,    6,    7,    8,    9,   10,    1,
+        1,    8,   11,    1,   12,   13,    8,   14,   15,   15,
+       15,   15,   15,   15,   15,   16,   16,    1,    1,   17,
+       18,   19,    1,    1,   20,   20,   20,   20,   21,   22,
+        7,    7,    7,    7,    7,   23,    7,    7,    7,    7,
+        7,    7,    7,    7,   24,    7,    7,   25,    7,    7,
+        1,   26,    1,    8,    7,    1,   20,   20,   20,   20,
+
+       21,   22,    7,    7,    7,    7,    7,   27,    7,    7,
+        7,    7,    7,    7,    7,    7,   24,    7,    7,   25,
+        7,    7,    1,   28,    1,    8,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1
+    } ;
+
+static yyconst flex_int32_t yy_meta[29] =
+    {   0,
+        1,    1,    2,    1,    1,    1,    3,    1,    1,    1,
+        4,    4,    5,    6,    6,    6,    1,    1,    1,    7,
+        8,    7,    3,    3,    3,    1,    3,    1
+    } ;
+
+static yyconst flex_int16_t yy_base[85] =
+    {   0,
+        0,  145,  150,  266,   27,  266,   25,    0,  131,   23,
+       23,   16,   23,   39,   31,   25,   39,   60,   22,   65,
+       57,   43,  266,    0,    0,  266,   61,  266,    0,  128,
+       74,    0,  113,   59,   62,  113,   52,    0,    0,   72,
+       66,  110,  100,  266,   73,   74,  266,   70,  266,   90,
+      103,  266,   84,  129,  108,  113,  143,  266,  107,   66,
+      118,  137,  168,  120,   80,   91,  145,  143,   83,   41,
+      266,  266,  190,  196,  204,  212,  220,  228,  232,  237,
+      238,  243,  249,  257
+    } ;
+
+static yyconst flex_int16_t yy_def[85] =
+    {   0,
+       72,    1,   72,   72,   72,   72,   73,   74,   72,   72,
+       75,   72,   72,   72,   14,   72,   72,   74,   72,   76,
+       72,   73,   72,   77,   74,   72,   75,   72,   78,   72,
+       72,   31,   14,   79,   80,   72,   72,   81,   15,   73,
+       75,   76,   76,   72,   73,   75,   72,   82,   72,   72,
+       72,   72,   81,   76,   54,   72,   72,   72,   76,   54,
+       76,   76,   76,   54,   83,   76,   63,   83,   84,   84,
+       72,    0,   72,   72,   72,   72,   72,   72,   72,   72,
+       72,   72,   72,   72
+    } ;
+
+static yyconst flex_int16_t yy_nxt[295] =
+    {   0,
+        4,    5,    6,    5,    7,    4,    8,    9,   10,   11,
+        9,   12,   13,   14,   15,   15,   16,    9,   17,    8,
+        8,    8,   18,    8,    8,    4,    8,   19,   21,   23,
+       21,   26,   28,   26,   26,   30,   31,   31,   31,   26,
+       26,   26,   26,   71,   39,   39,   39,   23,   29,   26,
+       24,   32,   33,   33,   34,   72,   26,   26,   21,   35,
+       21,   36,   37,   38,   40,   36,   43,   44,   24,   41,
+       28,   32,   50,   50,   52,   28,   23,   23,   52,   35,
+       56,   56,   44,   28,   42,   71,   29,   31,   31,   31,
+       42,   29,   59,   44,   48,   49,   49,   24,   24,   29,
+
+       49,   43,   44,   51,   51,   51,   36,   37,   59,   44,
+       36,   65,   44,   54,   55,   55,   51,   51,   51,   59,
+       44,   64,   64,   64,   58,   58,   57,   57,   57,   58,
+       59,   44,   42,   64,   64,   64,   52,   72,   59,   44,
+       47,   66,   60,   60,   42,   44,   59,   69,   26,   72,
+       20,   61,   62,   63,   72,   61,   57,   57,   57,   66,
+       72,   72,   72,   66,   49,   49,   72,   61,   62,   49,
+       44,   61,   72,   72,   72,   72,   72,   72,   72,   72,
+       72,   67,   67,   67,   72,   72,   72,   67,   67,   67,
+       22,   22,   22,   22,   22,   22,   22,   22,   25,   72,
+
+       72,   25,   25,   25,   27,   27,   27,   27,   27,   27,
+       27,   27,   42,   42,   42,   42,   42,   42,   42,   42,
+       45,   72,   45,   45,   45,   45,   45,   45,   46,   72,
+       46,   46,   46,   46,   46,   46,   34,   34,   72,   34,
+       51,   72,   51,   53,   53,   53,   57,   72,   57,   68,
+       68,   68,   68,   68,   68,   68,   68,   70,   70,   70,
+       70,   70,   70,   70,   70,    3,   72,   72,   72,   72,
+       72,   72,   72,   72,   72,   72,   72,   72,   72,   72,
+       72,   72,   72,   72,   72,   72,   72,   72,   72,   72,
+       72,   72,   72,   72
+
+    } ;
+
+static yyconst flex_int16_t yy_chk[295] =
+    {   0,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    5,    7,
+        5,   10,   11,   12,   12,   13,   13,   13,   13,   19,
+       10,   16,   16,   70,   15,   15,   15,   22,   11,   19,
+        7,   14,   14,   14,   14,   15,   17,   17,   21,   14,
+       21,   14,   14,   14,   18,   14,   20,   20,   22,   18,
+       27,   34,   35,   35,   37,   41,   40,   45,   37,   34,
+       48,   48,   65,   46,   65,   69,   27,   31,   31,   31,
+       60,   41,   66,   66,   31,   31,   31,   40,   45,   46,
+
+       31,   43,   43,   50,   50,   50,   53,   53,   59,   59,
+       53,   59,   42,   43,   43,   43,   51,   51,   51,   61,
+       61,   55,   55,   55,   51,   51,   56,   56,   56,   51,
+       54,   54,   55,   64,   64,   64,   36,   33,   62,   62,
+       30,   61,   54,   54,   64,   68,   67,   68,    9,    3,
+        2,   54,   54,   54,    0,   54,   57,   57,   57,   62,
+        0,    0,    0,   62,   57,   57,    0,   67,   67,   57,
+       63,   67,    0,    0,    0,    0,    0,    0,    0,    0,
+        0,   63,   63,   63,    0,    0,    0,   63,   63,   63,
+       73,   73,   73,   73,   73,   73,   73,   73,   74,    0,
+
+        0,   74,   74,   74,   75,   75,   75,   75,   75,   75,
+       75,   75,   76,   76,   76,   76,   76,   76,   76,   76,
+       77,    0,   77,   77,   77,   77,   77,   77,   78,    0,
+       78,   78,   78,   78,   78,   78,   79,   79,    0,   79,
+       80,    0,   80,   81,   81,   81,   82,    0,   82,   83,
+       83,   83,   83,   83,   83,   83,   83,   84,   84,   84,
+       84,   84,   84,   84,   84,   72,   72,   72,   72,   72,
+       72,   72,   72,   72,   72,   72,   72,   72,   72,   72,
+       72,   72,   72,   72,   72,   72,   72,   72,   72,   72,
+       72,   72,   72,   72
+
+    } ;
+
+static yy_state_type yy_last_accepting_state;
+static char *yy_last_accepting_cpos;
+
+extern int yy_flex_debug;
+int yy_flex_debug = 1;
+
+static yyconst flex_int16_t yy_rule_linenum[13] =
+    {   0,
+       67,   68,   69,   72,   75,   76,   77,   83,   84,   85,
+       87,   90
+    } ;
+
+/* The intent behind this definition is that it'll catch
+ * any uses of REJECT which flex missed.
+ */
+#define REJECT reject_used_but_not_detected
+#define yymore() yymore_used_but_not_detected
+#define YY_MORE_ADJ 0
+#define YY_RESTORE_YY_MORE_OFFSET
+char *yytext;
+#line 1 "scripts/genksyms/lex.l"
+/* Lexical analysis for genksyms.
+   Copyright 1996, 1997 Linux International.
+
+   New implementation contributed by Richard Henderson <rth@tamu.edu>
+   Based on original work by Bjorn Ekwall <bj0rn@blox.se>
+
+   Taken from Linux modutils 2.4.22.
+
+   This program is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 2 of the License, or (at your
+   option) any later version.
+
+   This program is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software Foundation,
+   Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+#line 25 "scripts/genksyms/lex.l"
+
+#include <limits.h>
+#include <stdlib.h>
+#include <string.h>
+#include <ctype.h>
+
+#include "genksyms.h"
+#include "parse.h"
+
+/* We've got a two-level lexer here.  We let flex do basic tokenization
+   and then we categorize those basic tokens in the second stage.  */
+#define YY_DECL		static int yylex1(void)
+
+/* We don't do multiple input files.  */
+#define YY_NO_INPUT 1
+#line 668 "scripts/genksyms/lex.c"
+
+#define INITIAL 0
+
+#ifndef YY_NO_UNISTD_H
+/* Special case for "unistd.h", since it is non-ANSI. We include it way
+ * down here because we want the user's section 1 to have been scanned first.
+ * The user has a chance to override it with an option.
+ */
+/* %if-c-only */
+#include <unistd.h>
+/* %endif */
+/* %if-c++-only */
+/* %endif */
+#endif
+
+#ifndef YY_EXTRA_TYPE
+#define YY_EXTRA_TYPE void *
+#endif
+
+/* %if-c-only Reentrant structure and macros (non-C++). */
+/* %if-reentrant */
+/* %if-c-only */
+
+static int yy_init_globals (void );
+
+/* %endif */
+/* %if-reentrant */
+/* %endif */
+/* %endif End reentrant structures and macros. */
+
+/* Accessor methods to globals.
+   These are made visible to non-reentrant scanners for convenience. */
+
+int yylex_destroy (void );
+
+int yyget_debug (void );
+
+void yyset_debug (int debug_flag  );
+
+YY_EXTRA_TYPE yyget_extra (void );
+
+void yyset_extra (YY_EXTRA_TYPE user_defined  );
+
+FILE *yyget_in (void );
+
+void yyset_in  (FILE * in_str  );
+
+FILE *yyget_out (void );
+
+void yyset_out  (FILE * out_str  );
+
+int yyget_leng (void );
+
+char *yyget_text (void );
+
+int yyget_lineno (void );
+
+void yyset_lineno (int line_number  );
+
+/* %if-bison-bridge */
+/* %endif */
+
+/* Macros after this point can all be overridden by user definitions in
+ * section 1.
+ */
+
+#ifndef YY_SKIP_YYWRAP
+#ifdef __cplusplus
+extern "C" int yywrap (void );
+#else
+extern int yywrap (void );
+#endif
+#endif
+
+/* %not-for-header */
+
+    static void yyunput (int c,char *buf_ptr  );
+    
+/* %ok-for-header */
+
+/* %endif */
+
+#ifndef yytext_ptr
+static void yy_flex_strncpy (char *,yyconst char *,int );
+#endif
+
+#ifdef YY_NEED_STRLEN
+static int yy_flex_strlen (yyconst char * );
+#endif
+
+#ifndef YY_NO_INPUT
+/* %if-c-only Standard (non-C++) definition */
+/* %not-for-header */
+
+#ifdef __cplusplus
+static int yyinput (void );
+#else
+static int input (void );
+#endif
+/* %ok-for-header */
+
+/* %endif */
+#endif
+
+/* %if-c-only */
+
+/* %endif */
+
+/* Amount of stuff to slurp up with each read. */
+#ifndef YY_READ_BUF_SIZE
+#define YY_READ_BUF_SIZE 8192
+#endif
+
+/* Copy whatever the last rule matched to the standard output. */
+#ifndef ECHO
+/* %if-c-only Standard (non-C++) definition */
+/* This used to be an fputs(), but since the string might contain NUL's,
+ * we now use fwrite().
+ */
+#define ECHO fwrite( yytext, yyleng, 1, yyout )
+/* %endif */
+/* %if-c++-only C++ definition */
+/* %endif */
+#endif
+
+/* Gets input and stuffs it into "buf".  number of characters read, or YY_NULL,
+ * is returned in "result".
+ */
+#ifndef YY_INPUT
+#define YY_INPUT(buf,result,max_size) \
+/* %% [5.0] fread()/read() definition of YY_INPUT goes here unless we're doing C++ \ */\
+	if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \
+		{ \
+		int c = '*'; \
+		int n; \
+		for ( n = 0; n < max_size && \
+			     (c = getc( yyin )) != EOF && c != '\n'; ++n ) \
+			buf[n] = (char) c; \
+		if ( c == '\n' ) \
+			buf[n++] = (char) c; \
+		if ( c == EOF && ferror( yyin ) ) \
+			YY_FATAL_ERROR( "input in flex scanner failed" ); \
+		result = n; \
+		} \
+	else \
+		{ \
+		errno=0; \
+		while ( (result = fread(buf, 1, max_size, yyin))==0 && ferror(yyin)) \
+			{ \
+			if( errno != EINTR) \
+				{ \
+				YY_FATAL_ERROR( "input in flex scanner failed" ); \
+				break; \
+				} \
+			errno=0; \
+			clearerr(yyin); \
+			} \
+		}\
+\
+/* %if-c++-only C++ definition \ */\
+/* %endif */
+
+#endif
+
+/* No semi-colon after return; correct usage is to write "yyterminate();" -
+ * we don't want an extra ';' after the "return" because that will cause
+ * some compilers to complain about unreachable statements.
+ */
+#ifndef yyterminate
+#define yyterminate() return YY_NULL
+#endif
+
+/* Number of entries by which start-condition stack grows. */
+#ifndef YY_START_STACK_INCR
+#define YY_START_STACK_INCR 25
+#endif
+
+/* Report a fatal error. */
+#ifndef YY_FATAL_ERROR
+/* %if-c-only */
+#define YY_FATAL_ERROR(msg) yy_fatal_error( msg )
+/* %endif */
+/* %if-c++-only */
+/* %endif */
+#endif
+
+/* %if-tables-serialization structures and prototypes */
+/* %not-for-header */
+
+/* %ok-for-header */
+
+/* %not-for-header */
+
+/* %tables-yydmap generated elements */
+/* %endif */
+/* end tables serialization structures and prototypes */
+
+/* %ok-for-header */
+
+/* Default declaration of generated scanner - a define so the user can
+ * easily add parameters.
+ */
+#ifndef YY_DECL
+#define YY_DECL_IS_OURS 1
+/* %if-c-only Standard (non-C++) definition */
+
+extern int yylex (void);
+
+#define YY_DECL int yylex (void)
+/* %endif */
+/* %if-c++-only C++ definition */
+/* %endif */
+#endif /* !YY_DECL */
+
+/* Code executed at the beginning of each rule, after yytext and yyleng
+ * have been set up.
+ */
+#ifndef YY_USER_ACTION
+#define YY_USER_ACTION
+#endif
+
+/* Code executed at the end of each rule. */
+#ifndef YY_BREAK
+#define YY_BREAK break;
+#endif
+
+/* %% [6.0] YY_RULE_SETUP definition goes here */
+#define YY_RULE_SETUP \
+	if ( yyleng > 0 ) \
+		YY_CURRENT_BUFFER_LVALUE->yy_at_bol = \
+				(yytext[yyleng - 1] == '\n'); \
+	YY_USER_ACTION
+
+/* %not-for-header */
+
+/** The main scanner function which does all the work.
+ */
+YY_DECL
+{
+	register yy_state_type yy_current_state;
+	register char *yy_cp, *yy_bp;
+	register int yy_act;
+    
+/* %% [7.0] user's declarations go here */
+#line 63 "scripts/genksyms/lex.l"
+
+
+
+ /* Keep track of our location in the original source files.  */
+#line 918 "scripts/genksyms/lex.c"
+
+	if ( !(yy_init) )
+		{
+		(yy_init) = 1;
+
+#ifdef YY_USER_INIT
+		YY_USER_INIT;
+#endif
+
+		if ( ! (yy_start) )
+			(yy_start) = 1;	/* first start state */
+
+		if ( ! yyin )
+/* %if-c-only */
+			yyin = stdin;
+/* %endif */
+/* %if-c++-only */
+/* %endif */
+
+		if ( ! yyout )
+/* %if-c-only */
+			yyout = stdout;
+/* %endif */
+/* %if-c++-only */
+/* %endif */
+
+		if ( ! YY_CURRENT_BUFFER ) {
+			yyensure_buffer_stack ();
+			YY_CURRENT_BUFFER_LVALUE =
+				yy_create_buffer(yyin,YY_BUF_SIZE );
+		}
+
+		yy_load_buffer_state( );
+		}
+
+	while ( 1 )		/* loops until end-of-file is reached */
+		{
+/* %% [8.0] yymore()-related code goes here */
+		yy_cp = (yy_c_buf_p);
+
+		/* Support of yytext. */
+		*yy_cp = (yy_hold_char);
+
+		/* yy_bp points to the position in yy_ch_buf of the start of
+		 * the current run.
+		 */
+		yy_bp = yy_cp;
+
+/* %% [9.0] code to set up and find next match goes here */
+		yy_current_state = (yy_start);
+		yy_current_state += YY_AT_BOL();
+yy_match:
+		do
+			{
+			register YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)];
+			if ( yy_accept[yy_current_state] )
+				{
+				(yy_last_accepting_state) = yy_current_state;
+				(yy_last_accepting_cpos) = yy_cp;
+				}
+			while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
+				{
+				yy_current_state = (int) yy_def[yy_current_state];
+				if ( yy_current_state >= 73 )
+					yy_c = yy_meta[(unsigned int) yy_c];
+				}
+			yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
+			++yy_cp;
+			}
+		while ( yy_base[yy_current_state] != 266 );
+
+yy_find_action:
+/* %% [10.0] code to find the action number goes here */
+		yy_act = yy_accept[yy_current_state];
+		if ( yy_act == 0 )
+			{ /* have to back up */
+			yy_cp = (yy_last_accepting_cpos);
+			yy_current_state = (yy_last_accepting_state);
+			yy_act = yy_accept[yy_current_state];
+			}
+
+		YY_DO_BEFORE_ACTION;
+
+/* %% [11.0] code for yylineno update goes here */
+
+do_action:	/* This label is used only to access EOF actions. */
+
+/* %% [12.0] debug code goes here */
+		if ( yy_flex_debug )
+			{
+			if ( yy_act == 0 )
+				fprintf( stderr, "--scanner backing up\n" );
+			else if ( yy_act < 13 )
+				fprintf( stderr, "--accepting rule at line %ld (\"%s\")\n",
+				         (long)yy_rule_linenum[yy_act], yytext );
+			else if ( yy_act == 13 )
+				fprintf( stderr, "--accepting default rule (\"%s\")\n",
+				         yytext );
+			else if ( yy_act == 14 )
+				fprintf( stderr, "--(end of buffer or a NUL)\n" );
+			else
+				fprintf( stderr, "--EOF (start condition %d)\n", YY_START );
+			}
+
+		switch ( yy_act )
+	{ /* beginning of action switch */
+/* %% [13.0] actions go here */
+			case 0: /* must back up */
+			/* undo the effects of YY_DO_BEFORE_ACTION */
+			*yy_cp = (yy_hold_char);
+			yy_cp = (yy_last_accepting_cpos);
+			yy_current_state = (yy_last_accepting_state);
+			goto yy_find_action;
+
+case 1:
+/* rule 1 can match eol */
+YY_RULE_SETUP
+#line 67 "scripts/genksyms/lex.l"
+return FILENAME;
+	YY_BREAK
+case 2:
+/* rule 2 can match eol */
+YY_RULE_SETUP
+#line 68 "scripts/genksyms/lex.l"
+cur_line++;
+	YY_BREAK
+case 3:
+/* rule 3 can match eol */
+YY_RULE_SETUP
+#line 69 "scripts/genksyms/lex.l"
+cur_line++;
+	YY_BREAK
+/* Ignore all other whitespace.  */
+case 4:
+YY_RULE_SETUP
+#line 72 "scripts/genksyms/lex.l"
+;
+	YY_BREAK
+case 5:
+/* rule 5 can match eol */
+YY_RULE_SETUP
+#line 75 "scripts/genksyms/lex.l"
+return STRING;
+	YY_BREAK
+case 6:
+/* rule 6 can match eol */
+YY_RULE_SETUP
+#line 76 "scripts/genksyms/lex.l"
+return CHAR;
+	YY_BREAK
+case 7:
+YY_RULE_SETUP
+#line 77 "scripts/genksyms/lex.l"
+return IDENT;
+	YY_BREAK
+/* The Pedant requires that the other C multi-character tokens be
+    recognized as tokens.  We don't actually use them since we don't
+    parse expressions, but we do want whitespace to be arranged
+    around them properly.  */
+case 8:
+YY_RULE_SETUP
+#line 83 "scripts/genksyms/lex.l"
+return OTHER;
+	YY_BREAK
+case 9:
+YY_RULE_SETUP
+#line 84 "scripts/genksyms/lex.l"
+return INT;
+	YY_BREAK
+case 10:
+YY_RULE_SETUP
+#line 85 "scripts/genksyms/lex.l"
+return REAL;
+	YY_BREAK
+case 11:
+YY_RULE_SETUP
+#line 87 "scripts/genksyms/lex.l"
+return DOTS;
+	YY_BREAK
+/* All other tokens are single characters.  */
+case 12:
+YY_RULE_SETUP
+#line 90 "scripts/genksyms/lex.l"
+return yytext[0];
+	YY_BREAK
+case 13:
+YY_RULE_SETUP
+#line 93 "scripts/genksyms/lex.l"
+ECHO;
+	YY_BREAK
+#line 1109 "scripts/genksyms/lex.c"
+case YY_STATE_EOF(INITIAL):
+	yyterminate();
+
+	case YY_END_OF_BUFFER:
+		{
+		/* Amount of text matched not including the EOB char. */
+		int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1;
+
+		/* Undo the effects of YY_DO_BEFORE_ACTION. */
+		*yy_cp = (yy_hold_char);
+		YY_RESTORE_YY_MORE_OFFSET
+
+		if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW )
+			{
+			/* We're scanning a new file or input source.  It's
+			 * possible that this happened because the user
+			 * just pointed yyin at a new source and called
+			 * yylex().  If so, then we have to assure
+			 * consistency between YY_CURRENT_BUFFER and our
+			 * globals.  Here is the right place to do so, because
+			 * this is the first action (other than possibly a
+			 * back-up) that will match for the new input source.
+			 */
+			(yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars;
+			YY_CURRENT_BUFFER_LVALUE->yy_input_file = yyin;
+			YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL;
+			}
+
+		/* Note that here we test for yy_c_buf_p "<=" to the position
+		 * of the first EOB in the buffer, since yy_c_buf_p will
+		 * already have been incremented past the NUL character
+		 * (since all states make transitions on EOB to the
+		 * end-of-buffer state).  Contrast this with the test
+		 * in input().
+		 */
+		if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] )
+			{ /* This was really a NUL. */
+			yy_state_type yy_next_state;
+
+			(yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text;
+
+			yy_current_state = yy_get_previous_state(  );
+
+			/* Okay, we're now positioned to make the NUL
+			 * transition.  We couldn't have
+			 * yy_get_previous_state() go ahead and do it
+			 * for us because it doesn't know how to deal
+			 * with the possibility of jamming (and we don't
+			 * want to build jamming into it because then it
+			 * will run more slowly).
+			 */
+
+			yy_next_state = yy_try_NUL_trans( yy_current_state );
+
+			yy_bp = (yytext_ptr) + YY_MORE_ADJ;
+
+			if ( yy_next_state )
+				{
+				/* Consume the NUL. */
+				yy_cp = ++(yy_c_buf_p);
+				yy_current_state = yy_next_state;
+				goto yy_match;
+				}
+
+			else
+				{
+/* %% [14.0] code to do back-up for compressed tables and set up yy_cp goes here */
+				yy_cp = (yy_c_buf_p);
+				goto yy_find_action;
+				}
+			}
+
+		else switch ( yy_get_next_buffer(  ) )
+			{
+			case EOB_ACT_END_OF_FILE:
+				{
+				(yy_did_buffer_switch_on_eof) = 0;
+
+				if ( yywrap( ) )
+					{
+					/* Note: because we've taken care in
+					 * yy_get_next_buffer() to have set up
+					 * yytext, we can now set up
+					 * yy_c_buf_p so that if some total
+					 * hoser (like flex itself) wants to
+					 * call the scanner after we return the
+					 * YY_NULL, it'll still work - another
+					 * YY_NULL will get returned.
+					 */
+					(yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ;
+
+					yy_act = YY_STATE_EOF(YY_START);
+					goto do_action;
+					}
+
+				else
+					{
+					if ( ! (yy_did_buffer_switch_on_eof) )
+						YY_NEW_FILE;
+					}
+				break;
+				}
+
+			case EOB_ACT_CONTINUE_SCAN:
+				(yy_c_buf_p) =
+					(yytext_ptr) + yy_amount_of_matched_text;
+
+				yy_current_state = yy_get_previous_state(  );
+
+				yy_cp = (yy_c_buf_p);
+				yy_bp = (yytext_ptr) + YY_MORE_ADJ;
+				goto yy_match;
+
+			case EOB_ACT_LAST_MATCH:
+				(yy_c_buf_p) =
+				&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)];
+
+				yy_current_state = yy_get_previous_state(  );
+
+				yy_cp = (yy_c_buf_p);
+				yy_bp = (yytext_ptr) + YY_MORE_ADJ;
+				goto yy_find_action;
+			}
+		break;
+		}
+
+	default:
+		YY_FATAL_ERROR(
+			"fatal flex scanner internal error--no action found" );
+	} /* end of action switch */
+		} /* end of scanning one token */
+} /* end of yylex */
+/* %ok-for-header */
+
+/* %if-c++-only */
+/* %not-for-header */
+
+/* %ok-for-header */
+
+/* %endif */
+
+/* yy_get_next_buffer - try to read in a new buffer
+ *
+ * Returns a code representing an action:
+ *	EOB_ACT_LAST_MATCH -
+ *	EOB_ACT_CONTINUE_SCAN - continue scanning from current position
+ *	EOB_ACT_END_OF_FILE - end of file
+ */
+/* %if-c-only */
+static int yy_get_next_buffer (void)
+/* %endif */
+/* %if-c++-only */
+/* %endif */
+{
+    	register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf;
+	register char *source = (yytext_ptr);
+	register int number_to_move, i;
+	int ret_val;
+
+	if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] )
+		YY_FATAL_ERROR(
+		"fatal flex scanner internal error--end of buffer missed" );
+
+	if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 )
+		{ /* Don't try to fill the buffer, so this is an EOF. */
+		if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 )
+			{
+			/* We matched a single character, the EOB, so
+			 * treat this as a final EOF.
+			 */
+			return EOB_ACT_END_OF_FILE;
+			}
+
+		else
+			{
+			/* We matched some text prior to the EOB, first
+			 * process it.
+			 */
+			return EOB_ACT_LAST_MATCH;
+			}
+		}
+
+	/* Try to read more data. */
+
+	/* First move last chars to start of buffer. */
+	number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1;
+
+	for ( i = 0; i < number_to_move; ++i )
+		*(dest++) = *(source++);
+
+	if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING )
+		/* don't do the read, it's not guaranteed to return an EOF,
+		 * just force an EOF
+		 */
+		YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0;
+
+	else
+		{
+			int num_to_read =
+			YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1;
+
+		while ( num_to_read <= 0 )
+			{ /* Not enough room in the buffer - grow it. */
+
+			/* just a shorter name for the current buffer */
+			YY_BUFFER_STATE b = YY_CURRENT_BUFFER;
+
+			int yy_c_buf_p_offset =
+				(int) ((yy_c_buf_p) - b->yy_ch_buf);
+
+			if ( b->yy_is_our_buffer )
+				{
+				int new_size = b->yy_buf_size * 2;
+
+				if ( new_size <= 0 )
+					b->yy_buf_size += b->yy_buf_size / 8;
+				else
+					b->yy_buf_size *= 2;
+
+				b->yy_ch_buf = (char *)
+					/* Include room in for 2 EOB chars. */
+					yyrealloc((void *) b->yy_ch_buf,b->yy_buf_size + 2  );
+				}
+			else
+				/* Can't grow it, we don't own it. */
+				b->yy_ch_buf = 0;
+
+			if ( ! b->yy_ch_buf )
+				YY_FATAL_ERROR(
+				"fatal error - scanner input buffer overflow" );
+
+			(yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset];
+
+			num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size -
+						number_to_move - 1;
+
+			}
+
+		if ( num_to_read > YY_READ_BUF_SIZE )
+			num_to_read = YY_READ_BUF_SIZE;
+
+		/* Read in more data. */
+		YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]),
+			(yy_n_chars), (size_t) num_to_read );
+
+		YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
+		}
+
+	if ( (yy_n_chars) == 0 )
+		{
+		if ( number_to_move == YY_MORE_ADJ )
+			{
+			ret_val = EOB_ACT_END_OF_FILE;
+			yyrestart(yyin  );
+			}
+
+		else
+			{
+			ret_val = EOB_ACT_LAST_MATCH;
+			YY_CURRENT_BUFFER_LVALUE->yy_buffer_status =
+				YY_BUFFER_EOF_PENDING;
+			}
+		}
+
+	else
+		ret_val = EOB_ACT_CONTINUE_SCAN;
+
+	if ((yy_size_t) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) {
+		/* Extend the array by 50%, plus the number we really need. */
+		yy_size_t new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1);
+		YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) yyrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size  );
+		if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf )
+			YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" );
+	}
+
+	(yy_n_chars) += number_to_move;
+	YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR;
+	YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR;
+
+	(yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0];
+
+	return ret_val;
+}
+
+/* yy_get_previous_state - get the state just before the EOB char was reached */
+
+/* %if-c-only */
+/* %not-for-header */
+
+    static yy_state_type yy_get_previous_state (void)
+/* %endif */
+/* %if-c++-only */
+/* %endif */
+{
+	register yy_state_type yy_current_state;
+	register char *yy_cp;
+    
+/* %% [15.0] code to get the start state into yy_current_state goes here */
+	yy_current_state = (yy_start);
+	yy_current_state += YY_AT_BOL();
+
+	for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )
+		{
+/* %% [16.0] code to find the next state goes here */
+		register YY_CHAR yy_c = (*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1);
+		if ( yy_accept[yy_current_state] )
+			{
+			(yy_last_accepting_state) = yy_current_state;
+			(yy_last_accepting_cpos) = yy_cp;
+			}
+		while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
+			{
+			yy_current_state = (int) yy_def[yy_current_state];
+			if ( yy_current_state >= 73 )
+				yy_c = yy_meta[(unsigned int) yy_c];
+			}
+		yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
+		}
+
+	return yy_current_state;
+}
+
+/* yy_try_NUL_trans - try to make a transition on the NUL character
+ *
+ * synopsis
+ *	next_state = yy_try_NUL_trans( current_state );
+ */
+/* %if-c-only */
+    static yy_state_type yy_try_NUL_trans  (yy_state_type yy_current_state )
+/* %endif */
+/* %if-c++-only */
+/* %endif */
+{
+	register int yy_is_jam;
+    /* %% [17.0] code to find the next state, and perhaps do backing up, goes here */
+	register char *yy_cp = (yy_c_buf_p);
+
+	register YY_CHAR yy_c = 1;
+	if ( yy_accept[yy_current_state] )
+		{
+		(yy_last_accepting_state) = yy_current_state;
+		(yy_last_accepting_cpos) = yy_cp;
+		}
+	while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
+		{
+		yy_current_state = (int) yy_def[yy_current_state];
+		if ( yy_current_state >= 73 )
+			yy_c = yy_meta[(unsigned int) yy_c];
+		}
+	yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
+	yy_is_jam = (yy_current_state == 72);
+
+	return yy_is_jam ? 0 : yy_current_state;
+}
+
+/* %if-c-only */
+
+    static void yyunput (int c, register char * yy_bp )
+/* %endif */
+/* %if-c++-only */
+/* %endif */
+{
+	register char *yy_cp;
+    
+    yy_cp = (yy_c_buf_p);
+
+	/* undo effects of setting up yytext */
+	*yy_cp = (yy_hold_char);
+
+	if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 )
+		{ /* need to shift things up to make room */
+		/* +2 for EOB chars. */
+		register int number_to_move = (yy_n_chars) + 2;
+		register char *dest = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[
+					YY_CURRENT_BUFFER_LVALUE->yy_buf_size + 2];
+		register char *source =
+				&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move];
+
+		while ( source > YY_CURRENT_BUFFER_LVALUE->yy_ch_buf )
+			*--dest = *--source;
+
+		yy_cp += (int) (dest - source);
+		yy_bp += (int) (dest - source);
+		YY_CURRENT_BUFFER_LVALUE->yy_n_chars =
+			(yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_buf_size;
+
+		if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 )
+			YY_FATAL_ERROR( "flex scanner push-back overflow" );
+		}
+
+	*--yy_cp = (char) c;
+
+/* %% [18.0] update yylineno here */
+
+	(yytext_ptr) = yy_bp;
+	(yy_hold_char) = *yy_cp;
+	(yy_c_buf_p) = yy_cp;
+}
+/* %if-c-only */
+
+/* %endif */
+
+/* %if-c-only */
+#ifndef YY_NO_INPUT
+#ifdef __cplusplus
+    static int yyinput (void)
+#else
+    static int input  (void)
+#endif
+
+/* %endif */
+/* %if-c++-only */
+/* %endif */
+{
+	int c;
+    
+	*(yy_c_buf_p) = (yy_hold_char);
+
+	if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR )
+		{
+		/* yy_c_buf_p now points to the character we want to return.
+		 * If this occurs *before* the EOB characters, then it's a
+		 * valid NUL; if not, then we've hit the end of the buffer.
+		 */
+		if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] )
+			/* This was really a NUL. */
+			*(yy_c_buf_p) = '\0';
+
+		else
+			{ /* need more input */
+			int offset = (yy_c_buf_p) - (yytext_ptr);
+			++(yy_c_buf_p);
+
+			switch ( yy_get_next_buffer(  ) )
+				{
+				case EOB_ACT_LAST_MATCH:
+					/* This happens because yy_g_n_b()
+					 * sees that we've accumulated a
+					 * token and flags that we need to
+					 * try matching the token before
+					 * proceeding.  But for input(),
+					 * there's no matching to consider.
+					 * So convert the EOB_ACT_LAST_MATCH
+					 * to EOB_ACT_END_OF_FILE.
+					 */
+
+					/* Reset buffer status. */
+					yyrestart(yyin );
+
+					/*FALLTHROUGH*/
+
+				case EOB_ACT_END_OF_FILE:
+					{
+					if ( yywrap( ) )
+						return EOF;
+
+					if ( ! (yy_did_buffer_switch_on_eof) )
+						YY_NEW_FILE;
+#ifdef __cplusplus
+					return yyinput();
+#else
+					return input();
+#endif
+					}
+
+				case EOB_ACT_CONTINUE_SCAN:
+					(yy_c_buf_p) = (yytext_ptr) + offset;
+					break;
+				}
+			}
+		}
+
+	c = *(unsigned char *) (yy_c_buf_p);	/* cast for 8-bit char's */
+	*(yy_c_buf_p) = '\0';	/* preserve yytext */
+	(yy_hold_char) = *++(yy_c_buf_p);
+
+/* %% [19.0] update BOL and yylineno */
+	YY_CURRENT_BUFFER_LVALUE->yy_at_bol = (c == '\n');
+
+	return c;
+}
+/* %if-c-only */
+#endif	/* ifndef YY_NO_INPUT */
+/* %endif */
+
+/** Immediately switch to a different input stream.
+ * @param input_file A readable stream.
+ * 
+ * @note This function does not reset the start condition to @c INITIAL .
+ */
+/* %if-c-only */
+    void yyrestart  (FILE * input_file )
+/* %endif */
+/* %if-c++-only */
+/* %endif */
+{
+    
+	if ( ! YY_CURRENT_BUFFER ){
+        yyensure_buffer_stack ();
+		YY_CURRENT_BUFFER_LVALUE =
+            yy_create_buffer(yyin,YY_BUF_SIZE );
+	}
+
+	yy_init_buffer(YY_CURRENT_BUFFER,input_file );
+	yy_load_buffer_state( );
+}
+
+/** Switch to a different input buffer.
+ * @param new_buffer The new input buffer.
+ * 
+ */
+/* %if-c-only */
+    void yy_switch_to_buffer  (YY_BUFFER_STATE  new_buffer )
+/* %endif */
+/* %if-c++-only */
+/* %endif */
+{
+    
+	/* TODO. We should be able to replace this entire function body
+	 * with
+	 *		yypop_buffer_state();
+	 *		yypush_buffer_state(new_buffer);
+     */
+	yyensure_buffer_stack ();
+	if ( YY_CURRENT_BUFFER == new_buffer )
+		return;
+
+	if ( YY_CURRENT_BUFFER )
+		{
+		/* Flush out information for old buffer. */
+		*(yy_c_buf_p) = (yy_hold_char);
+		YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p);
+		YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
+		}
+
+	YY_CURRENT_BUFFER_LVALUE = new_buffer;
+	yy_load_buffer_state( );
+
+	/* We don't actually know whether we did this switch during
+	 * EOF (yywrap()) processing, but the only time this flag
+	 * is looked at is after yywrap() is called, so it's safe
+	 * to go ahead and always set it.
+	 */
+	(yy_did_buffer_switch_on_eof) = 1;
+}
+
+/* %if-c-only */
+static void yy_load_buffer_state  (void)
+/* %endif */
+/* %if-c++-only */
+/* %endif */
+{
+    	(yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars;
+	(yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos;
+	yyin = YY_CURRENT_BUFFER_LVALUE->yy_input_file;
+	(yy_hold_char) = *(yy_c_buf_p);
+}
+
+/** Allocate and initialize an input buffer state.
+ * @param file A readable stream.
+ * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE.
+ * 
+ * @return the allocated buffer state.
+ */
+/* %if-c-only */
+    YY_BUFFER_STATE yy_create_buffer  (FILE * file, int  size )
+/* %endif */
+/* %if-c++-only */
+/* %endif */
+{
+	YY_BUFFER_STATE b;
+    
+	b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state )  );
+	if ( ! b )
+		YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" );
+
+	b->yy_buf_size = size;
+
+	/* yy_ch_buf has to be 2 characters longer than the size given because
+	 * we need to put in 2 end-of-buffer characters.
+	 */
+	b->yy_ch_buf = (char *) yyalloc(b->yy_buf_size + 2  );
+	if ( ! b->yy_ch_buf )
+		YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" );
+
+	b->yy_is_our_buffer = 1;
+
+	yy_init_buffer(b,file );
+
+	return b;
+}
+
+/** Destroy the buffer.
+ * @param b a buffer created with yy_create_buffer()
+ * 
+ */
+/* %if-c-only */
+    void yy_delete_buffer (YY_BUFFER_STATE  b )
+/* %endif */
+/* %if-c++-only */
+/* %endif */
+{
+    
+	if ( ! b )
+		return;
+
+	if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */
+		YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0;
+
+	if ( b->yy_is_our_buffer )
+		yyfree((void *) b->yy_ch_buf  );
+
+	yyfree((void *) b  );
+}
+
+/* %if-c-only */
+
+#ifndef __cplusplus
+extern int isatty (int );
+#endif /* __cplusplus */
+    
+/* %endif */
+
+/* %if-c++-only */
+/* %endif */
+
+/* Initializes or reinitializes a buffer.
+ * This function is sometimes called more than once on the same buffer,
+ * such as during a yyrestart() or at EOF.
+ */
+/* %if-c-only */
+    static void yy_init_buffer  (YY_BUFFER_STATE  b, FILE * file )
+/* %endif */
+/* %if-c++-only */
+/* %endif */
+
+{
+	int oerrno = errno;
+    
+	yy_flush_buffer(b );
+
+	b->yy_input_file = file;
+	b->yy_fill_buffer = 1;
+
+    /* If b is the current buffer, then yy_init_buffer was _probably_
+     * called from yyrestart() or through yy_get_next_buffer.
+     * In that case, we don't want to reset the lineno or column.
+     */
+    if (b != YY_CURRENT_BUFFER){
+        b->yy_bs_lineno = 1;
+        b->yy_bs_column = 0;
+    }
+
+/* %if-c-only */
+
+        b->yy_is_interactive = file ? (isatty( fileno(file) ) > 0) : 0;
+    
+/* %endif */
+/* %if-c++-only */
+/* %endif */
+	errno = oerrno;
+}
+
+/** Discard all buffered characters. On the next scan, YY_INPUT will be called.
+ * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER.
+ * 
+ */
+/* %if-c-only */
+    void yy_flush_buffer (YY_BUFFER_STATE  b )
+/* %endif */
+/* %if-c++-only */
+/* %endif */
+{
+    	if ( ! b )
+		return;
+
+	b->yy_n_chars = 0;
+
+	/* We always need two end-of-buffer characters.  The first causes
+	 * a transition to the end-of-buffer state.  The second causes
+	 * a jam in that state.
+	 */
+	b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR;
+	b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR;
+
+	b->yy_buf_pos = &b->yy_ch_buf[0];
+
+	b->yy_at_bol = 1;
+	b->yy_buffer_status = YY_BUFFER_NEW;
+
+	if ( b == YY_CURRENT_BUFFER )
+		yy_load_buffer_state( );
+}
+
+/* %if-c-or-c++ */
+/** Pushes the new state onto the stack. The new state becomes
+ *  the current state. This function will allocate the stack
+ *  if necessary.
+ *  @param new_buffer The new state.
+ *  
+ */
+/* %if-c-only */
+void yypush_buffer_state (YY_BUFFER_STATE new_buffer )
+/* %endif */
+/* %if-c++-only */
+/* %endif */
+{
+    	if (new_buffer == NULL)
+		return;
+
+	yyensure_buffer_stack();
+
+	/* This block is copied from yy_switch_to_buffer. */
+	if ( YY_CURRENT_BUFFER )
+		{
+		/* Flush out information for old buffer. */
+		*(yy_c_buf_p) = (yy_hold_char);
+		YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p);
+		YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
+		}
+
+	/* Only push if top exists. Otherwise, replace top. */
+	if (YY_CURRENT_BUFFER)
+		(yy_buffer_stack_top)++;
+	YY_CURRENT_BUFFER_LVALUE = new_buffer;
+
+	/* copied from yy_switch_to_buffer. */
+	yy_load_buffer_state( );
+	(yy_did_buffer_switch_on_eof) = 1;
+}
+/* %endif */
+
+/* %if-c-or-c++ */
+/** Removes and deletes the top of the stack, if present.
+ *  The next element becomes the new top.
+ *  
+ */
+/* %if-c-only */
+void yypop_buffer_state (void)
+/* %endif */
+/* %if-c++-only */
+/* %endif */
+{
+    	if (!YY_CURRENT_BUFFER)
+		return;
+
+	yy_delete_buffer(YY_CURRENT_BUFFER );
+	YY_CURRENT_BUFFER_LVALUE = NULL;
+	if ((yy_buffer_stack_top) > 0)
+		--(yy_buffer_stack_top);
+
+	if (YY_CURRENT_BUFFER) {
+		yy_load_buffer_state( );
+		(yy_did_buffer_switch_on_eof) = 1;
+	}
+}
+/* %endif */
+
+/* %if-c-or-c++ */
+/* Allocates the stack if it does not exist.
+ *  Guarantees space for at least one push.
+ */
+/* %if-c-only */
+static void yyensure_buffer_stack (void)
+/* %endif */
+/* %if-c++-only */
+/* %endif */
+{
+	int num_to_alloc;
+    
+	if (!(yy_buffer_stack)) {
+
+		/* First allocation is just for 2 elements, since we don't know if this
+		 * scanner will even need a stack. We use 2 instead of 1 to avoid an
+		 * immediate realloc on the next call.
+         */
+		num_to_alloc = 1;
+		(yy_buffer_stack) = (struct yy_buffer_state**)yyalloc
+								(num_to_alloc * sizeof(struct yy_buffer_state*)
+								);
+		if ( ! (yy_buffer_stack) )
+			YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" );
+								  
+		memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));
+				
+		(yy_buffer_stack_max) = num_to_alloc;
+		(yy_buffer_stack_top) = 0;
+		return;
+	}
+
+	if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){
+
+		/* Increase the buffer to prepare for a possible push. */
+		int grow_size = 8 /* arbitrary grow size */;
+
+		num_to_alloc = (yy_buffer_stack_max) + grow_size;
+		(yy_buffer_stack) = (struct yy_buffer_state**)yyrealloc
+								((yy_buffer_stack),
+								num_to_alloc * sizeof(struct yy_buffer_state*)
+								);
+		if ( ! (yy_buffer_stack) )
+			YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" );
+
+		/* zero only the new slots.*/
+		memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*));
+		(yy_buffer_stack_max) = num_to_alloc;
+	}
+}
+/* %endif */
+
+/* %if-c-only */
+/** Setup the input buffer state to scan directly from a user-specified character buffer.
+ * @param base the character buffer
+ * @param size the size in bytes of the character buffer
+ * 
+ * @return the newly allocated buffer state object. 
+ */
+YY_BUFFER_STATE yy_scan_buffer  (char * base, yy_size_t  size )
+{
+	YY_BUFFER_STATE b;
+    
+	if ( size < 2 ||
+	     base[size-2] != YY_END_OF_BUFFER_CHAR ||
+	     base[size-1] != YY_END_OF_BUFFER_CHAR )
+		/* They forgot to leave room for the EOB's. */
+		return 0;
+
+	b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state )  );
+	if ( ! b )
+		YY_FATAL_ERROR( "out of dynamic memory in yy_scan_buffer()" );
+
+	b->yy_buf_size = size - 2;	/* "- 2" to take care of EOB's */
+	b->yy_buf_pos = b->yy_ch_buf = base;
+	b->yy_is_our_buffer = 0;
+	b->yy_input_file = 0;
+	b->yy_n_chars = b->yy_buf_size;
+	b->yy_is_interactive = 0;
+	b->yy_at_bol = 1;
+	b->yy_fill_buffer = 0;
+	b->yy_buffer_status = YY_BUFFER_NEW;
+
+	yy_switch_to_buffer(b  );
+
+	return b;
+}
+/* %endif */
+
+/* %if-c-only */
+/** Setup the input buffer state to scan a string. The next call to yylex() will
+ * scan from a @e copy of @a str.
+ * @param yystr a NUL-terminated string to scan
+ * 
+ * @return the newly allocated buffer state object.
+ * @note If you want to scan bytes that may contain NUL values, then use
+ *       yy_scan_bytes() instead.
+ */
+YY_BUFFER_STATE yy_scan_string (yyconst char * yystr )
+{
+    
+	return yy_scan_bytes(yystr,strlen(yystr) );
+}
+/* %endif */
+
+/* %if-c-only */
+/** Setup the input buffer state to scan the given bytes. The next call to yylex() will
+ * scan from a @e copy of @a bytes.
+ * @param bytes the byte buffer to scan
+ * @param len the number of bytes in the buffer pointed to by @a bytes.
+ * 
+ * @return the newly allocated buffer state object.
+ */
+YY_BUFFER_STATE yy_scan_bytes  (yyconst char * yybytes, int  _yybytes_len )
+{
+	YY_BUFFER_STATE b;
+	char *buf;
+	yy_size_t n;
+	int i;
+    
+	/* Get memory for full buffer, including space for trailing EOB's. */
+	n = _yybytes_len + 2;
+	buf = (char *) yyalloc(n  );
+	if ( ! buf )
+		YY_FATAL_ERROR( "out of dynamic memory in yy_scan_bytes()" );
+
+	for ( i = 0; i < _yybytes_len; ++i )
+		buf[i] = yybytes[i];
+
+	buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR;
+
+	b = yy_scan_buffer(buf,n );
+	if ( ! b )
+		YY_FATAL_ERROR( "bad buffer in yy_scan_bytes()" );
+
+	/* It's okay to grow etc. this buffer, and we should throw it
+	 * away when we're done.
+	 */
+	b->yy_is_our_buffer = 1;
+
+	return b;
+}
+/* %endif */
+
+#ifndef YY_EXIT_FAILURE
+#define YY_EXIT_FAILURE 2
+#endif
+
+/* %if-c-only */
+static void yy_fatal_error (yyconst char* msg )
+{
+    	(void) fprintf( stderr, "%s\n", msg );
+	exit( YY_EXIT_FAILURE );
+}
+/* %endif */
+/* %if-c++-only */
+/* %endif */
+
+/* Redefine yyless() so it works in section 3 code. */
+
+#undef yyless
+#define yyless(n) \
+	do \
+		{ \
+		/* Undo effects of setting up yytext. */ \
+        int yyless_macro_arg = (n); \
+        YY_LESS_LINENO(yyless_macro_arg);\
+		yytext[yyleng] = (yy_hold_char); \
+		(yy_c_buf_p) = yytext + yyless_macro_arg; \
+		(yy_hold_char) = *(yy_c_buf_p); \
+		*(yy_c_buf_p) = '\0'; \
+		yyleng = yyless_macro_arg; \
+		} \
+	while ( 0 )
+
+/* Accessor  methods (get/set functions) to struct members. */
+
+/* %if-c-only */
+/* %if-reentrant */
+/* %endif */
+
+/** Get the current line number.
+ * 
+ */
+int yyget_lineno  (void)
+{
+        
+    return yylineno;
+}
+
+/** Get the input stream.
+ * 
+ */
+FILE *yyget_in  (void)
+{
+        return yyin;
+}
+
+/** Get the output stream.
+ * 
+ */
+FILE *yyget_out  (void)
+{
+        return yyout;
+}
+
+/** Get the length of the current token.
+ * 
+ */
+int yyget_leng  (void)
+{
+        return yyleng;
+}
+
+/** Get the current token.
+ * 
+ */
+
+char *yyget_text  (void)
+{
+        return yytext;
+}
+
+/* %if-reentrant */
+/* %endif */
+
+/** Set the current line number.
+ * @param line_number
+ * 
+ */
+void yyset_lineno (int  line_number )
+{
+    
+    yylineno = line_number;
+}
+
+/** Set the input stream. This does not discard the current
+ * input buffer.
+ * @param in_str A readable stream.
+ * 
+ * @see yy_switch_to_buffer
+ */
+void yyset_in (FILE *  in_str )
+{
+        yyin = in_str ;
+}
+
+void yyset_out (FILE *  out_str )
+{
+        yyout = out_str ;
+}
+
+int yyget_debug  (void)
+{
+        return yy_flex_debug;
+}
+
+void yyset_debug (int  bdebug )
+{
+        yy_flex_debug = bdebug ;
+}
+
+/* %endif */
+
+/* %if-reentrant */
+/* %if-bison-bridge */
+/* %endif */
+/* %endif if-c-only */
+
+/* %if-c-only */
+static int yy_init_globals (void)
+{
+        /* Initialization is the same as for the non-reentrant scanner.
+     * This function is called from yylex_destroy(), so don't allocate here.
+     */
+
+    (yy_buffer_stack) = 0;
+    (yy_buffer_stack_top) = 0;
+    (yy_buffer_stack_max) = 0;
+    (yy_c_buf_p) = (char *) 0;
+    (yy_init) = 0;
+    (yy_start) = 0;
+
+/* Defined in main.c */
+#ifdef YY_STDINIT
+    yyin = stdin;
+    yyout = stdout;
+#else
+    yyin = (FILE *) 0;
+    yyout = (FILE *) 0;
+#endif
+
+    /* For future reference: Set errno on error, since we are called by
+     * yylex_init()
+     */
+    return 0;
+}
+/* %endif */
+
+/* %if-c-only SNIP! this currently causes conflicts with the c++ scanner */
+/* yylex_destroy is for both reentrant and non-reentrant scanners. */
+int yylex_destroy  (void)
+{
+    
+    /* Pop the buffer stack, destroying each element. */
+	while(YY_CURRENT_BUFFER){
+		yy_delete_buffer(YY_CURRENT_BUFFER  );
+		YY_CURRENT_BUFFER_LVALUE = NULL;
+		yypop_buffer_state();
+	}
+
+	/* Destroy the stack itself. */
+	yyfree((yy_buffer_stack) );
+	(yy_buffer_stack) = NULL;
+
+    /* Reset the globals. This is important in a non-reentrant scanner so the next time
+     * yylex() is called, initialization will occur. */
+    yy_init_globals( );
+
+/* %if-reentrant */
+/* %endif */
+    return 0;
+}
+/* %endif */
+
+/*
+ * Internal utility routines.
+ */
+
+#ifndef yytext_ptr
+static void yy_flex_strncpy (char* s1, yyconst char * s2, int n )
+{
+	register int i;
+	for ( i = 0; i < n; ++i )
+		s1[i] = s2[i];
+}
+#endif
+
+#ifdef YY_NEED_STRLEN
+static int yy_flex_strlen (yyconst char * s )
+{
+	register int n;
+	for ( n = 0; s[n]; ++n )
+		;
+
+	return n;
+}
+#endif
+
+void *yyalloc (yy_size_t  size )
+{
+	return (void *) malloc( size );
+}
+
+void *yyrealloc  (void * ptr, yy_size_t  size )
+{
+	/* The cast to (char *) in the following accommodates both
+	 * implementations that use char* generic pointers, and those
+	 * that use void* generic pointers.  It works with the latter
+	 * because both ANSI C and C++ allow castless assignment from
+	 * any pointer type to void*, and deal with argument conversions
+	 * as though doing an assignment.
+	 */
+	return (void *) realloc( (char *) ptr, size );
+}
+
+void yyfree (void * ptr )
+{
+	free( (char *) ptr );	/* see yyrealloc() for (char *) cast */
+}
+
+/* %if-tables-serialization definitions */
+/* %define-yytables   The name for this specific scanner's tables. */
+#define YYTABLES_NAME "yytables"
+/* %endif */
+
+/* %ok-for-header */
+
+#line 93 "scripts/genksyms/lex.l"
+
+
+
+/* Bring in the keyword recognizer.  */
+
+#include "keywords.c"
+
+
+/* Macros to append to our phrase collection list.  */
+
+/*
+ * We mark any token, that that equals to a known enumerator, as
+ * SYM_ENUM_CONST. The parser will change this for struct and union tags later,
+ * the only problem is struct and union members:
+ *    enum e { a, b }; struct s { int a, b; }
+ * but in this case, the only effect will be, that the ABI checksums become
+ * more volatile, which is acceptable. Also, such collisions are quite rare,
+ * so far it was only observed in include/linux/telephony.h.
+ */
+#define _APP(T,L)	do {						   \
+			  cur_node = next_node;				   \
+			  next_node = xmalloc(sizeof(*next_node));	   \
+			  next_node->next = cur_node;			   \
+			  cur_node->string = memcpy(xmalloc(L+1), T, L+1); \
+			  cur_node->tag =				   \
+			    find_symbol(cur_node->string, SYM_ENUM_CONST, 1)?\
+			    SYM_ENUM_CONST : SYM_NORMAL ;		   \
+			} while (0)
+
+#define APP		_APP(yytext, yyleng)
+
+
+/* The second stage lexer.  Here we incorporate knowledge of the state
+   of the parser to tailor the tokens that are returned.  */
+
+int
+yylex(void)
+{
+  static enum {
+    ST_NOTSTARTED, ST_NORMAL, ST_ATTRIBUTE, ST_ASM, ST_BRACKET, ST_BRACE,
+    ST_EXPRESSION, ST_TABLE_1, ST_TABLE_2, ST_TABLE_3, ST_TABLE_4,
+    ST_TABLE_5, ST_TABLE_6
+  } lexstate = ST_NOTSTARTED;
+
+  static int suppress_type_lookup, dont_want_brace_phrase;
+  static struct string_list *next_node;
+
+  int token, count = 0;
+  struct string_list *cur_node;
+
+  if (lexstate == ST_NOTSTARTED)
+    {
+      next_node = xmalloc(sizeof(*next_node));
+      next_node->next = NULL;
+      lexstate = ST_NORMAL;
+    }
+
+repeat:
+  token = yylex1();
+
+  if (token == 0)
+    return 0;
+  else if (token == FILENAME)
+    {
+      char *file, *e;
+
+      /* Save the filename and line number for later error messages.  */
+
+      if (cur_filename)
+	free(cur_filename);
+
+      file = strchr(yytext, '\"')+1;
+      e = strchr(file, '\"');
+      *e = '\0';
+      cur_filename = memcpy(xmalloc(e-file+1), file, e-file+1);
+      cur_line = atoi(yytext+2);
+
+      goto repeat;
+    }
+
+  switch (lexstate)
+    {
+    case ST_NORMAL:
+      switch (token)
+	{
+	case IDENT:
+	  APP;
+	  {
+	    const struct resword *r = is_reserved_word(yytext, yyleng);
+	    if (r)
+	      {
+		switch (token = r->token)
+		  {
+		  case ATTRIBUTE_KEYW:
+		    lexstate = ST_ATTRIBUTE;
+		    count = 0;
+		    goto repeat;
+		  case ASM_KEYW:
+		    lexstate = ST_ASM;
+		    count = 0;
+		    goto repeat;
+
+		  case STRUCT_KEYW:
+		  case UNION_KEYW:
+		  case ENUM_KEYW:
+		    dont_want_brace_phrase = 3;
+		    suppress_type_lookup = 2;
+		    goto fini;
+
+		  case EXPORT_SYMBOL_KEYW:
+		      goto fini;
+		  }
+	      }
+	    if (!suppress_type_lookup)
+	      {
+		if (find_symbol(yytext, SYM_TYPEDEF, 1))
+		  token = TYPE;
+	      }
+	  }
+	  break;
+
+	case '[':
+	  APP;
+	  lexstate = ST_BRACKET;
+	  count = 1;
+	  goto repeat;
+
+	case '{':
+	  APP;
+	  if (dont_want_brace_phrase)
+	    break;
+	  lexstate = ST_BRACE;
+	  count = 1;
+	  goto repeat;
+
+	case '=': case ':':
+	  APP;
+	  lexstate = ST_EXPRESSION;
+	  break;
+
+	case DOTS:
+	default:
+	  APP;
+	  break;
+	}
+      break;
+
+    case ST_ATTRIBUTE:
+      APP;
+      switch (token)
+	{
+	case '(':
+	  ++count;
+	  goto repeat;
+	case ')':
+	  if (--count == 0)
+	    {
+	      lexstate = ST_NORMAL;
+	      token = ATTRIBUTE_PHRASE;
+	      break;
+	    }
+	  goto repeat;
+	default:
+	  goto repeat;
+	}
+      break;
+
+    case ST_ASM:
+      APP;
+      switch (token)
+	{
+	case '(':
+	  ++count;
+	  goto repeat;
+	case ')':
+	  if (--count == 0)
+	    {
+	      lexstate = ST_NORMAL;
+	      token = ASM_PHRASE;
+	      break;
+	    }
+	  goto repeat;
+	default:
+	  goto repeat;
+	}
+      break;
+
+    case ST_BRACKET:
+      APP;
+      switch (token)
+	{
+	case '[':
+	  ++count;
+	  goto repeat;
+	case ']':
+	  if (--count == 0)
+	    {
+	      lexstate = ST_NORMAL;
+	      token = BRACKET_PHRASE;
+	      break;
+	    }
+	  goto repeat;
+	default:
+	  goto repeat;
+	}
+      break;
+
+    case ST_BRACE:
+      APP;
+      switch (token)
+	{
+	case '{':
+	  ++count;
+	  goto repeat;
+	case '}':
+	  if (--count == 0)
+	    {
+	      lexstate = ST_NORMAL;
+	      token = BRACE_PHRASE;
+	      break;
+	    }
+	  goto repeat;
+	default:
+	  goto repeat;
+	}
+      break;
+
+    case ST_EXPRESSION:
+      switch (token)
+	{
+	case '(': case '[': case '{':
+	  ++count;
+	  APP;
+	  goto repeat;
+	case '}':
+	  /* is this the last line of an enum declaration? */
+	  if (count == 0)
+	    {
+	      /* Put back the token we just read so's we can find it again
+		 after registering the expression.  */
+	      unput(token);
+
+	      lexstate = ST_NORMAL;
+	      token = EXPRESSION_PHRASE;
+	      break;
+	    }
+	  /* FALLTHRU */
+	case ')': case ']':
+	  --count;
+	  APP;
+	  goto repeat;
+	case ',': case ';':
+	  if (count == 0)
+	    {
+	      /* Put back the token we just read so's we can find it again
+		 after registering the expression.  */
+	      unput(token);
+
+	      lexstate = ST_NORMAL;
+	      token = EXPRESSION_PHRASE;
+	      break;
+	    }
+	  APP;
+	  goto repeat;
+	default:
+	  APP;
+	  goto repeat;
+	}
+      break;
+
+    case ST_TABLE_1:
+      goto repeat;
+
+    case ST_TABLE_2:
+      if (token == IDENT && yyleng == 1 && yytext[0] == 'X')
+	{
+	  token = EXPORT_SYMBOL_KEYW;
+	  lexstate = ST_TABLE_5;
+	  APP;
+	  break;
+	}
+      lexstate = ST_TABLE_6;
+      /* FALLTHRU */
+
+    case ST_TABLE_6:
+      switch (token)
+	{
+	case '{': case '[': case '(':
+	  ++count;
+	  break;
+	case '}': case ']': case ')':
+	  --count;
+	  break;
+	case ',':
+	  if (count == 0)
+	    lexstate = ST_TABLE_2;
+	  break;
+	};
+      goto repeat;
+
+    case ST_TABLE_3:
+      goto repeat;
+
+    case ST_TABLE_4:
+      if (token == ';')
+	lexstate = ST_NORMAL;
+      goto repeat;
+
+    case ST_TABLE_5:
+      switch (token)
+	{
+	case ',':
+	  token = ';';
+	  lexstate = ST_TABLE_2;
+	  APP;
+	  break;
+	default:
+	  APP;
+	  break;
+	}
+      break;
+
+    default:
+      exit(1);
+    }
+fini:
+
+  if (suppress_type_lookup > 0)
+    --suppress_type_lookup;
+  if (dont_want_brace_phrase > 0)
+    --dont_want_brace_phrase;
+
+  yylval = &next_node->next;
+
+  return token;
+}
+
diff -uNra linux-3.0.82/scripts/genksyms/parse.c linux-3.0.82x/scripts/genksyms/parse.c
--- linux-3.0.82/scripts/genksyms/parse.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/scripts/genksyms/parse.c	2017-09-23 03:42:50.338674085 +0800
@@ -0,0 +1,2520 @@
+
+/* A Bison parser, made by GNU Bison 2.4.1.  */
+
+/* Skeleton implementation for Bison's Yacc-like parsers in C
+   
+      Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
+   Free Software Foundation, Inc.
+   
+   This program is free software: you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation, either version 3 of the License, or
+   (at your option) any later version.
+   
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+   
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+/* As a special exception, you may create a larger work that contains
+   part or all of the Bison parser skeleton and distribute that work
+   under terms of your choice, so long as that work isn't itself a
+   parser generator using the skeleton or a modified version thereof
+   as a parser skeleton.  Alternatively, if you modify or redistribute
+   the parser skeleton itself, you may (at your option) remove this
+   special exception, which will cause the skeleton and the resulting
+   Bison output files to be licensed under the GNU General Public
+   License without this special exception.
+   
+   This special exception was added by the Free Software Foundation in
+   version 2.2 of Bison.  */
+
+/* C LALR(1) parser skeleton written by Richard Stallman, by
+   simplifying the original so-called "semantic" parser.  */
+
+/* All symbols defined below should begin with yy or YY, to avoid
+   infringing on user name space.  This should be done even for local
+   variables, as they might otherwise be expanded by user macros.
+   There are some unavoidable exceptions within include files to
+   define necessary library symbols; they are noted "INFRINGES ON
+   USER NAME SPACE" below.  */
+
+/* Identify Bison output.  */
+#define YYBISON 1
+
+/* Bison version.  */
+#define YYBISON_VERSION "2.4.1"
+
+/* Skeleton name.  */
+#define YYSKELETON_NAME "yacc.c"
+
+/* Pure parsers.  */
+#define YYPURE 0
+
+/* Push parsers.  */
+#define YYPUSH 0
+
+/* Pull parsers.  */
+#define YYPULL 1
+
+/* Using locations.  */
+#define YYLSP_NEEDED 0
+
+
+
+/* Copy the first part of user declarations.  */
+
+/* Line 189 of yacc.c  */
+#line 24 "scripts/genksyms/parse.y"
+
+
+#include <assert.h>
+#include <stdlib.h>
+#include <string.h>
+#include "genksyms.h"
+
+static int is_typedef;
+static int is_extern;
+static char *current_name;
+static struct string_list *decl_spec;
+
+static void yyerror(const char *);
+
+static inline void
+remove_node(struct string_list **p)
+{
+  struct string_list *node = *p;
+  *p = node->next;
+  free_node(node);
+}
+
+static inline void
+remove_list(struct string_list **pb, struct string_list **pe)
+{
+  struct string_list *b = *pb, *e = *pe;
+  *pb = e;
+  free_list(b, e);
+}
+
+
+
+/* Line 189 of yacc.c  */
+#line 106 "scripts/genksyms/parse.c"
+
+/* Enabling traces.  */
+#ifndef YYDEBUG
+# define YYDEBUG 1
+#endif
+
+/* Enabling verbose error messages.  */
+#ifdef YYERROR_VERBOSE
+# undef YYERROR_VERBOSE
+# define YYERROR_VERBOSE 1
+#else
+# define YYERROR_VERBOSE 0
+#endif
+
+/* Enabling the token table.  */
+#ifndef YYTOKEN_TABLE
+# define YYTOKEN_TABLE 0
+#endif
+
+
+/* Tokens.  */
+#ifndef YYTOKENTYPE
+# define YYTOKENTYPE
+   /* Put the tokens into the symbol table, so that GDB and other debuggers
+      know about them.  */
+   enum yytokentype {
+     ASM_KEYW = 258,
+     ATTRIBUTE_KEYW = 259,
+     AUTO_KEYW = 260,
+     BOOL_KEYW = 261,
+     CHAR_KEYW = 262,
+     CONST_KEYW = 263,
+     DOUBLE_KEYW = 264,
+     ENUM_KEYW = 265,
+     EXTERN_KEYW = 266,
+     EXTENSION_KEYW = 267,
+     FLOAT_KEYW = 268,
+     INLINE_KEYW = 269,
+     INT_KEYW = 270,
+     LONG_KEYW = 271,
+     REGISTER_KEYW = 272,
+     RESTRICT_KEYW = 273,
+     SHORT_KEYW = 274,
+     SIGNED_KEYW = 275,
+     STATIC_KEYW = 276,
+     STRUCT_KEYW = 277,
+     TYPEDEF_KEYW = 278,
+     UNION_KEYW = 279,
+     UNSIGNED_KEYW = 280,
+     VOID_KEYW = 281,
+     VOLATILE_KEYW = 282,
+     TYPEOF_KEYW = 283,
+     EXPORT_SYMBOL_KEYW = 284,
+     ASM_PHRASE = 285,
+     ATTRIBUTE_PHRASE = 286,
+     BRACE_PHRASE = 287,
+     BRACKET_PHRASE = 288,
+     EXPRESSION_PHRASE = 289,
+     CHAR = 290,
+     DOTS = 291,
+     IDENT = 292,
+     INT = 293,
+     REAL = 294,
+     STRING = 295,
+     TYPE = 296,
+     OTHER = 297,
+     FILENAME = 298
+   };
+#endif
+
+
+
+#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
+typedef int YYSTYPE;
+# define YYSTYPE_IS_TRIVIAL 1
+# define yystype YYSTYPE /* obsolescent; will be withdrawn */
+# define YYSTYPE_IS_DECLARED 1
+#endif
+
+
+/* Copy the second part of user declarations.  */
+
+
+/* Line 264 of yacc.c  */
+#line 191 "scripts/genksyms/parse.c"
+
+#ifdef short
+# undef short
+#endif
+
+#ifdef YYTYPE_UINT8
+typedef YYTYPE_UINT8 yytype_uint8;
+#else
+typedef unsigned char yytype_uint8;
+#endif
+
+#ifdef YYTYPE_INT8
+typedef YYTYPE_INT8 yytype_int8;
+#elif (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+typedef signed char yytype_int8;
+#else
+typedef short int yytype_int8;
+#endif
+
+#ifdef YYTYPE_UINT16
+typedef YYTYPE_UINT16 yytype_uint16;
+#else
+typedef unsigned short int yytype_uint16;
+#endif
+
+#ifdef YYTYPE_INT16
+typedef YYTYPE_INT16 yytype_int16;
+#else
+typedef short int yytype_int16;
+#endif
+
+#ifndef YYSIZE_T
+# ifdef __SIZE_TYPE__
+#  define YYSIZE_T __SIZE_TYPE__
+# elif defined size_t
+#  define YYSIZE_T size_t
+# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+#  include <stddef.h> /* INFRINGES ON USER NAME SPACE */
+#  define YYSIZE_T size_t
+# else
+#  define YYSIZE_T unsigned int
+# endif
+#endif
+
+#define YYSIZE_MAXIMUM ((YYSIZE_T) -1)
+
+#ifndef YY_
+# if YYENABLE_NLS
+#  if ENABLE_NLS
+#   include <libintl.h> /* INFRINGES ON USER NAME SPACE */
+#   define YY_(msgid) dgettext ("bison-runtime", msgid)
+#  endif
+# endif
+# ifndef YY_
+#  define YY_(msgid) msgid
+# endif
+#endif
+
+/* Suppress unused-variable warnings by "using" E.  */
+#if ! defined lint || defined __GNUC__
+# define YYUSE(e) ((void) (e))
+#else
+# define YYUSE(e) /* empty */
+#endif
+
+/* Identity function, used to suppress warnings about constant conditions.  */
+#ifndef lint
+# define YYID(n) (n)
+#else
+#if (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+static int
+YYID (int yyi)
+#else
+static int
+YYID (yyi)
+    int yyi;
+#endif
+{
+  return yyi;
+}
+#endif
+
+#if ! defined yyoverflow || YYERROR_VERBOSE
+
+/* The parser invokes alloca or malloc; define the necessary symbols.  */
+
+# ifdef YYSTACK_USE_ALLOCA
+#  if YYSTACK_USE_ALLOCA
+#   ifdef __GNUC__
+#    define YYSTACK_ALLOC __builtin_alloca
+#   elif defined __BUILTIN_VA_ARG_INCR
+#    include <alloca.h> /* INFRINGES ON USER NAME SPACE */
+#   elif defined _AIX
+#    define YYSTACK_ALLOC __alloca
+#   elif defined _MSC_VER
+#    include <malloc.h> /* INFRINGES ON USER NAME SPACE */
+#    define alloca _alloca
+#   else
+#    define YYSTACK_ALLOC alloca
+#    if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+#     include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
+#     ifndef _STDLIB_H
+#      define _STDLIB_H 1
+#     endif
+#    endif
+#   endif
+#  endif
+# endif
+
+# ifdef YYSTACK_ALLOC
+   /* Pacify GCC's `empty if-body' warning.  */
+#  define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0))
+#  ifndef YYSTACK_ALLOC_MAXIMUM
+    /* The OS might guarantee only one guard page at the bottom of the stack,
+       and a page size can be as small as 4096 bytes.  So we cannot safely
+       invoke alloca (N) if N exceeds 4096.  Use a slightly smaller number
+       to allow for a few compiler-allocated temporary stack slots.  */
+#   define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */
+#  endif
+# else
+#  define YYSTACK_ALLOC YYMALLOC
+#  define YYSTACK_FREE YYFREE
+#  ifndef YYSTACK_ALLOC_MAXIMUM
+#   define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM
+#  endif
+#  if (defined __cplusplus && ! defined _STDLIB_H \
+       && ! ((defined YYMALLOC || defined malloc) \
+	     && (defined YYFREE || defined free)))
+#   include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
+#   ifndef _STDLIB_H
+#    define _STDLIB_H 1
+#   endif
+#  endif
+#  ifndef YYMALLOC
+#   define YYMALLOC malloc
+#   if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */
+#   endif
+#  endif
+#  ifndef YYFREE
+#   define YYFREE free
+#   if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+void free (void *); /* INFRINGES ON USER NAME SPACE */
+#   endif
+#  endif
+# endif
+#endif /* ! defined yyoverflow || YYERROR_VERBOSE */
+
+
+#if (! defined yyoverflow \
+     && (! defined __cplusplus \
+	 || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL)))
+
+/* A type that is properly aligned for any stack member.  */
+union yyalloc
+{
+  yytype_int16 yyss_alloc;
+  YYSTYPE yyvs_alloc;
+};
+
+/* The size of the maximum gap between one aligned stack and the next.  */
+# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1)
+
+/* The size of an array large to enough to hold all stacks, each with
+   N elements.  */
+# define YYSTACK_BYTES(N) \
+     ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \
+      + YYSTACK_GAP_MAXIMUM)
+
+/* Copy COUNT objects from FROM to TO.  The source and destination do
+   not overlap.  */
+# ifndef YYCOPY
+#  if defined __GNUC__ && 1 < __GNUC__
+#   define YYCOPY(To, From, Count) \
+      __builtin_memcpy (To, From, (Count) * sizeof (*(From)))
+#  else
+#   define YYCOPY(To, From, Count)		\
+      do					\
+	{					\
+	  YYSIZE_T yyi;				\
+	  for (yyi = 0; yyi < (Count); yyi++)	\
+	    (To)[yyi] = (From)[yyi];		\
+	}					\
+      while (YYID (0))
+#  endif
+# endif
+
+/* Relocate STACK from its old location to the new one.  The
+   local variables YYSIZE and YYSTACKSIZE give the old and new number of
+   elements in the stack, and YYPTR gives the new location of the
+   stack.  Advance YYPTR to a properly aligned location for the next
+   stack.  */
+# define YYSTACK_RELOCATE(Stack_alloc, Stack)				\
+    do									\
+      {									\
+	YYSIZE_T yynewbytes;						\
+	YYCOPY (&yyptr->Stack_alloc, Stack, yysize);			\
+	Stack = &yyptr->Stack_alloc;					\
+	yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \
+	yyptr += yynewbytes / sizeof (*yyptr);				\
+      }									\
+    while (YYID (0))
+
+#endif
+
+/* YYFINAL -- State number of the termination state.  */
+#define YYFINAL  4
+/* YYLAST -- Last index in YYTABLE.  */
+#define YYLAST   532
+
+/* YYNTOKENS -- Number of terminals.  */
+#define YYNTOKENS  53
+/* YYNNTS -- Number of nonterminals.  */
+#define YYNNTS  49
+/* YYNRULES -- Number of rules.  */
+#define YYNRULES  132
+/* YYNRULES -- Number of states.  */
+#define YYNSTATES  188
+
+/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX.  */
+#define YYUNDEFTOK  2
+#define YYMAXUTOK   298
+
+#define YYTRANSLATE(YYX)						\
+  ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK)
+
+/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX.  */
+static const yytype_uint8 yytranslate[] =
+{
+       0,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+      47,    49,    48,     2,    46,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,    52,    44,
+       2,    50,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,    51,     2,    45,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     1,     2,     3,     4,
+       5,     6,     7,     8,     9,    10,    11,    12,    13,    14,
+      15,    16,    17,    18,    19,    20,    21,    22,    23,    24,
+      25,    26,    27,    28,    29,    30,    31,    32,    33,    34,
+      35,    36,    37,    38,    39,    40,    41,    42,    43
+};
+
+#if YYDEBUG
+/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in
+   YYRHS.  */
+static const yytype_uint16 yyprhs[] =
+{
+       0,     0,     3,     5,     8,     9,    12,    13,    18,    19,
+      23,    25,    27,    29,    31,    34,    37,    41,    42,    44,
+      46,    50,    55,    56,    58,    60,    63,    65,    67,    69,
+      71,    73,    75,    77,    79,    81,    87,    92,    95,    98,
+     101,   105,   109,   113,   116,   119,   122,   124,   126,   128,
+     130,   132,   134,   136,   138,   140,   142,   144,   147,   148,
+     150,   152,   155,   157,   159,   161,   163,   166,   168,   170,
+     175,   180,   183,   187,   191,   194,   196,   198,   200,   205,
+     210,   213,   217,   221,   224,   226,   230,   231,   233,   235,
+     239,   242,   245,   247,   248,   250,   252,   257,   262,   265,
+     269,   273,   277,   278,   280,   283,   287,   291,   292,   294,
+     296,   299,   303,   306,   307,   309,   311,   315,   318,   321,
+     323,   326,   327,   330,   334,   339,   341,   345,   347,   351,
+     354,   355,   357
+};
+
+/* YYRHS -- A `-1'-separated list of the rules' RHS.  */
+static const yytype_int8 yyrhs[] =
+{
+      54,     0,    -1,    55,    -1,    54,    55,    -1,    -1,    56,
+      57,    -1,    -1,    12,    23,    58,    60,    -1,    -1,    23,
+      59,    60,    -1,    60,    -1,    84,    -1,    99,    -1,   101,
+      -1,     1,    44,    -1,     1,    45,    -1,    64,    61,    44,
+      -1,    -1,    62,    -1,    63,    -1,    62,    46,    63,    -1,
+      74,   100,    95,    85,    -1,    -1,    65,    -1,    66,    -1,
+      65,    66,    -1,    67,    -1,    68,    -1,     5,    -1,    17,
+      -1,    21,    -1,    11,    -1,    14,    -1,    69,    -1,    73,
+      -1,    28,    47,    65,    48,    49,    -1,    28,    47,    65,
+      49,    -1,    22,    37,    -1,    24,    37,    -1,    10,    37,
+      -1,    22,    37,    87,    -1,    24,    37,    87,    -1,    10,
+      37,    96,    -1,    10,    96,    -1,    22,    87,    -1,    24,
+      87,    -1,     7,    -1,    19,    -1,    15,    -1,    16,    -1,
+      20,    -1,    25,    -1,    13,    -1,     9,    -1,    26,    -1,
+       6,    -1,    41,    -1,    48,    71,    -1,    -1,    72,    -1,
+      73,    -1,    72,    73,    -1,     8,    -1,    27,    -1,    31,
+      -1,    18,    -1,    70,    74,    -1,    75,    -1,    37,    -1,
+      75,    47,    78,    49,    -1,    75,    47,     1,    49,    -1,
+      75,    33,    -1,    47,    74,    49,    -1,    47,     1,    49,
+      -1,    70,    76,    -1,    77,    -1,    37,    -1,    41,    -1,
+      77,    47,    78,    49,    -1,    77,    47,     1,    49,    -1,
+      77,    33,    -1,    47,    76,    49,    -1,    47,     1,    49,
+      -1,    79,    36,    -1,    79,    -1,    80,    46,    36,    -1,
+      -1,    80,    -1,    81,    -1,    80,    46,    81,    -1,    65,
+      82,    -1,    70,    82,    -1,    83,    -1,    -1,    37,    -1,
+      41,    -1,    83,    47,    78,    49,    -1,    83,    47,     1,
+      49,    -1,    83,    33,    -1,    47,    82,    49,    -1,    47,
+       1,    49,    -1,    64,    74,    32,    -1,    -1,    86,    -1,
+      50,    34,    -1,    51,    88,    45,    -1,    51,     1,    45,
+      -1,    -1,    89,    -1,    90,    -1,    89,    90,    -1,    64,
+      91,    44,    -1,     1,    44,    -1,    -1,    92,    -1,    93,
+      -1,    92,    46,    93,    -1,    76,    95,    -1,    37,    94,
+      -1,    94,    -1,    52,    34,    -1,    -1,    95,    31,    -1,
+      51,    97,    45,    -1,    51,    97,    46,    45,    -1,    98,
+      -1,    97,    46,    98,    -1,    37,    -1,    37,    50,    34,
+      -1,    30,    44,    -1,    -1,    30,    -1,    29,    47,    37,
+      49,    44,    -1
+};
+
+/* YYRLINE[YYN] -- source line where rule number YYN was defined.  */
+static const yytype_uint16 yyrline[] =
+{
+       0,   104,   104,   105,   109,   109,   115,   115,   117,   117,
+     119,   120,   121,   122,   123,   124,   128,   142,   143,   147,
+     155,   168,   174,   175,   179,   180,   184,   190,   194,   195,
+     196,   197,   198,   202,   203,   204,   205,   209,   211,   213,
+     217,   224,   231,   241,   244,   245,   249,   250,   251,   252,
+     253,   254,   255,   256,   257,   258,   259,   263,   268,   269,
+     273,   274,   278,   278,   278,   279,   287,   288,   292,   301,
+     303,   305,   307,   309,   316,   317,   321,   322,   323,   325,
+     327,   329,   331,   336,   337,   338,   342,   343,   347,   348,
+     353,   358,   360,   364,   365,   373,   377,   379,   381,   383,
+     385,   390,   399,   400,   405,   410,   411,   415,   416,   420,
+     421,   425,   427,   432,   433,   437,   438,   442,   443,   444,
+     448,   452,   453,   457,   458,   462,   463,   466,   471,   479,
+     483,   484,   488
+};
+#endif
+
+#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE
+/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM.
+   First, the terminals, then, starting at YYNTOKENS, nonterminals.  */
+static const char *const yytname[] =
+{
+  "$end", "error", "$undefined", "ASM_KEYW", "ATTRIBUTE_KEYW",
+  "AUTO_KEYW", "BOOL_KEYW", "CHAR_KEYW", "CONST_KEYW", "DOUBLE_KEYW",
+  "ENUM_KEYW", "EXTERN_KEYW", "EXTENSION_KEYW", "FLOAT_KEYW",
+  "INLINE_KEYW", "INT_KEYW", "LONG_KEYW", "REGISTER_KEYW", "RESTRICT_KEYW",
+  "SHORT_KEYW", "SIGNED_KEYW", "STATIC_KEYW", "STRUCT_KEYW",
+  "TYPEDEF_KEYW", "UNION_KEYW", "UNSIGNED_KEYW", "VOID_KEYW",
+  "VOLATILE_KEYW", "TYPEOF_KEYW", "EXPORT_SYMBOL_KEYW", "ASM_PHRASE",
+  "ATTRIBUTE_PHRASE", "BRACE_PHRASE", "BRACKET_PHRASE",
+  "EXPRESSION_PHRASE", "CHAR", "DOTS", "IDENT", "INT", "REAL", "STRING",
+  "TYPE", "OTHER", "FILENAME", "';'", "'}'", "','", "'('", "'*'", "')'",
+  "'='", "'{'", "':'", "$accept", "declaration_seq", "declaration", "$@1",
+  "declaration1", "$@2", "$@3", "simple_declaration",
+  "init_declarator_list_opt", "init_declarator_list", "init_declarator",
+  "decl_specifier_seq_opt", "decl_specifier_seq", "decl_specifier",
+  "storage_class_specifier", "type_specifier", "simple_type_specifier",
+  "ptr_operator", "cvar_qualifier_seq_opt", "cvar_qualifier_seq",
+  "cvar_qualifier", "declarator", "direct_declarator", "nested_declarator",
+  "direct_nested_declarator", "parameter_declaration_clause",
+  "parameter_declaration_list_opt", "parameter_declaration_list",
+  "parameter_declaration", "m_abstract_declarator",
+  "direct_m_abstract_declarator", "function_definition", "initializer_opt",
+  "initializer", "class_body", "member_specification_opt",
+  "member_specification", "member_declaration",
+  "member_declarator_list_opt", "member_declarator_list",
+  "member_declarator", "member_bitfield_declarator", "attribute_opt",
+  "enum_body", "enumerator_list", "enumerator", "asm_definition",
+  "asm_phrase_opt", "export_definition", 0
+};
+#endif
+
+# ifdef YYPRINT
+/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to
+   token YYLEX-NUM.  */
+static const yytype_uint16 yytoknum[] =
+{
+       0,   256,   257,   258,   259,   260,   261,   262,   263,   264,
+     265,   266,   267,   268,   269,   270,   271,   272,   273,   274,
+     275,   276,   277,   278,   279,   280,   281,   282,   283,   284,
+     285,   286,   287,   288,   289,   290,   291,   292,   293,   294,
+     295,   296,   297,   298,    59,   125,    44,    40,    42,    41,
+      61,   123,    58
+};
+# endif
+
+/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives.  */
+static const yytype_uint8 yyr1[] =
+{
+       0,    53,    54,    54,    56,    55,    58,    57,    59,    57,
+      57,    57,    57,    57,    57,    57,    60,    61,    61,    62,
+      62,    63,    64,    64,    65,    65,    66,    66,    67,    67,
+      67,    67,    67,    68,    68,    68,    68,    68,    68,    68,
+      68,    68,    68,    68,    68,    68,    69,    69,    69,    69,
+      69,    69,    69,    69,    69,    69,    69,    70,    71,    71,
+      72,    72,    73,    73,    73,    73,    74,    74,    75,    75,
+      75,    75,    75,    75,    76,    76,    77,    77,    77,    77,
+      77,    77,    77,    78,    78,    78,    79,    79,    80,    80,
+      81,    82,    82,    83,    83,    83,    83,    83,    83,    83,
+      83,    84,    85,    85,    86,    87,    87,    88,    88,    89,
+      89,    90,    90,    91,    91,    92,    92,    93,    93,    93,
+      94,    95,    95,    96,    96,    97,    97,    98,    98,    99,
+     100,   100,   101
+};
+
+/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN.  */
+static const yytype_uint8 yyr2[] =
+{
+       0,     2,     1,     2,     0,     2,     0,     4,     0,     3,
+       1,     1,     1,     1,     2,     2,     3,     0,     1,     1,
+       3,     4,     0,     1,     1,     2,     1,     1,     1,     1,
+       1,     1,     1,     1,     1,     5,     4,     2,     2,     2,
+       3,     3,     3,     2,     2,     2,     1,     1,     1,     1,
+       1,     1,     1,     1,     1,     1,     1,     2,     0,     1,
+       1,     2,     1,     1,     1,     1,     2,     1,     1,     4,
+       4,     2,     3,     3,     2,     1,     1,     1,     4,     4,
+       2,     3,     3,     2,     1,     3,     0,     1,     1,     3,
+       2,     2,     1,     0,     1,     1,     4,     4,     2,     3,
+       3,     3,     0,     1,     2,     3,     3,     0,     1,     1,
+       2,     3,     2,     0,     1,     1,     3,     2,     2,     1,
+       2,     0,     2,     3,     4,     1,     3,     1,     3,     2,
+       0,     1,     5
+};
+
+/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state
+   STATE-NUM when YYTABLE doesn't specify something else to do.  Zero
+   means the default is an error.  */
+static const yytype_uint8 yydefact[] =
+{
+       4,     4,     2,     0,     1,     3,     0,    28,    55,    46,
+      62,    53,     0,    31,     0,    52,    32,    48,    49,    29,
+      65,    47,    50,    30,     0,     8,     0,    51,    54,    63,
+       0,     0,     0,    64,    56,     5,    10,    17,    23,    24,
+      26,    27,    33,    34,    11,    12,    13,    14,    15,    39,
+       0,    43,     6,    37,     0,    44,    22,    38,    45,     0,
+       0,   129,    68,     0,    58,     0,    18,    19,     0,   130,
+      67,    25,    42,   127,     0,   125,    22,    40,     0,   113,
+       0,     0,   109,     9,    17,    41,     0,     0,     0,     0,
+      57,    59,    60,    16,     0,    66,   131,   101,   121,    71,
+       0,     0,   123,     0,     7,   112,   106,    76,    77,     0,
+       0,     0,   121,    75,     0,   114,   115,   119,   105,     0,
+     110,   130,     0,    36,     0,    73,    72,    61,    20,   102,
+       0,    93,     0,    84,    87,    88,   128,   124,   126,   118,
+       0,    76,     0,   120,    74,   117,    80,     0,   111,     0,
+      35,   132,   122,     0,    21,   103,    70,    94,    56,     0,
+      93,    90,    92,    69,    83,     0,    82,    81,     0,     0,
+     116,   104,     0,    95,     0,    91,    98,     0,    85,    89,
+      79,    78,   100,    99,     0,     0,    97,    96
+};
+
+/* YYDEFGOTO[NTERM-NUM].  */
+static const yytype_int16 yydefgoto[] =
+{
+      -1,     1,     2,     3,    35,    76,    56,    36,    65,    66,
+      67,    79,    38,    39,    40,    41,    42,    68,    90,    91,
+      43,   121,    70,   112,   113,   132,   133,   134,   135,   161,
+     162,    44,   154,   155,    55,    80,    81,    82,   114,   115,
+     116,   117,   129,    51,    74,    75,    45,    98,    46
+};
+
+/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing
+   STATE-NUM.  */
+#define YYPACT_NINF -135
+static const yytype_int16 yypact[] =
+{
+    -135,    20,  -135,   321,  -135,  -135,    30,  -135,  -135,  -135,
+    -135,  -135,   -28,  -135,     2,  -135,  -135,  -135,  -135,  -135,
+    -135,  -135,  -135,  -135,    -6,  -135,     9,  -135,  -135,  -135,
+      -5,    15,   -17,  -135,  -135,  -135,  -135,    18,   491,  -135,
+    -135,  -135,  -135,  -135,  -135,  -135,  -135,  -135,  -135,   -22,
+      31,  -135,  -135,    19,   106,  -135,   491,    19,  -135,   491,
+      50,  -135,  -135,    11,    -3,    51,    57,  -135,    18,   -14,
+      14,  -135,  -135,    48,    46,  -135,   491,  -135,    33,    32,
+      59,   154,  -135,  -135,    18,  -135,   365,    56,    60,    61,
+    -135,    -3,  -135,  -135,    18,  -135,  -135,  -135,  -135,  -135,
+     202,    74,  -135,   -23,  -135,  -135,  -135,    77,  -135,    16,
+     101,    49,  -135,    34,    92,    93,  -135,  -135,  -135,    94,
+    -135,   110,    95,  -135,    97,  -135,  -135,  -135,  -135,   -20,
+      96,   410,    99,   113,   100,  -135,  -135,  -135,  -135,  -135,
+     103,  -135,   107,  -135,  -135,   111,  -135,   239,  -135,    32,
+    -135,  -135,  -135,   123,  -135,  -135,  -135,  -135,  -135,     3,
+      52,  -135,    38,  -135,  -135,   454,  -135,  -135,   117,   128,
+    -135,  -135,   134,  -135,   135,  -135,  -135,   276,  -135,  -135,
+    -135,  -135,  -135,  -135,   137,   138,  -135,  -135
+};
+
+/* YYPGOTO[NTERM-NUM].  */
+static const yytype_int16 yypgoto[] =
+{
+    -135,  -135,   187,  -135,  -135,  -135,  -135,   -50,  -135,  -135,
+      98,     0,   -59,   -37,  -135,  -135,  -135,   -77,  -135,  -135,
+     -54,   -30,  -135,   -90,  -135,  -134,  -135,  -135,    24,   -58,
+    -135,  -135,  -135,  -135,   -18,  -135,  -135,   109,  -135,  -135,
+      44,    87,    84,   148,  -135,   102,  -135,  -135,  -135
+};
+
+/* YYTABLE[YYPACT[STATE-NUM]].  What to do in state STATE-NUM.  If
+   positive, shift that token.  If negative, reduce the rule which
+   number is the opposite.  If zero, do what YYDEFACT says.
+   If YYTABLE_NINF, syntax error.  */
+#define YYTABLE_NINF -109
+static const yytype_int16 yytable[] =
+{
+      86,    71,   111,    37,   172,    10,    83,    69,    58,    49,
+      92,   152,    88,   169,    73,    20,    96,   140,    97,   142,
+       4,   144,   137,    50,    29,    52,   104,    61,    33,    50,
+     153,    53,   111,    89,   111,    77,   -93,   127,    95,    85,
+     157,   131,    59,   185,   173,    54,    57,    99,    62,    71,
+     159,    64,   -93,   141,   160,    62,    84,   108,    63,    64,
+      54,   100,    60,   109,    64,    63,    64,   146,    73,   107,
+      54,   176,   111,   108,    47,    48,    84,   105,   106,   109,
+      64,   147,   160,   160,   110,   177,   141,    87,   131,   157,
+     108,   102,   103,   173,    71,    93,   109,    64,   101,   159,
+      64,   174,   175,    94,   118,   124,   131,    78,   136,   125,
+     126,     7,     8,     9,    10,    11,    12,    13,   131,    15,
+      16,    17,    18,    19,    20,    21,    22,    23,    24,   110,
+      26,    27,    28,    29,    30,   143,   148,    33,   105,   149,
+      96,   151,   152,   -22,   150,   156,   165,    34,   163,   164,
+     -22,  -107,   166,   -22,   -22,   119,   167,   171,   -22,     7,
+       8,     9,    10,    11,    12,    13,   180,    15,    16,    17,
+      18,    19,    20,    21,    22,    23,    24,   181,    26,    27,
+      28,    29,    30,   182,   183,    33,   186,   187,     5,   179,
+     120,   -22,   128,   170,   139,    34,   145,    72,   -22,  -108,
+       0,   -22,   -22,   130,     0,   138,   -22,     7,     8,     9,
+      10,    11,    12,    13,     0,    15,    16,    17,    18,    19,
+      20,    21,    22,    23,    24,     0,    26,    27,    28,    29,
+      30,     0,     0,    33,     0,     0,     0,     0,   -86,     0,
+     168,     0,     0,    34,     7,     8,     9,    10,    11,    12,
+      13,   -86,    15,    16,    17,    18,    19,    20,    21,    22,
+      23,    24,     0,    26,    27,    28,    29,    30,     0,     0,
+      33,     0,     0,     0,     0,   -86,     0,   184,     0,     0,
+      34,     7,     8,     9,    10,    11,    12,    13,   -86,    15,
+      16,    17,    18,    19,    20,    21,    22,    23,    24,     0,
+      26,    27,    28,    29,    30,     0,     0,    33,     0,     0,
+       0,     0,   -86,     0,     0,     0,     0,    34,     0,     0,
+       0,     0,     6,     0,     0,   -86,     7,     8,     9,    10,
+      11,    12,    13,    14,    15,    16,    17,    18,    19,    20,
+      21,    22,    23,    24,    25,    26,    27,    28,    29,    30,
+      31,    32,    33,     0,     0,     0,     0,     0,   -22,     0,
+       0,     0,    34,     0,     0,   -22,     0,     0,   -22,   -22,
+       7,     8,     9,    10,    11,    12,    13,     0,    15,    16,
+      17,    18,    19,    20,    21,    22,    23,    24,     0,    26,
+      27,    28,    29,    30,     0,     0,    33,     0,     0,     0,
+       0,     0,     0,     0,     0,     0,    34,     0,     0,     0,
+       0,     0,     0,   122,   123,     7,     8,     9,    10,    11,
+      12,    13,     0,    15,    16,    17,    18,    19,    20,    21,
+      22,    23,    24,     0,    26,    27,    28,    29,    30,     0,
+       0,    33,     0,     0,     0,     0,     0,   157,     0,     0,
+       0,   158,     0,     0,     0,     0,     0,   159,    64,     7,
+       8,     9,    10,    11,    12,    13,     0,    15,    16,    17,
+      18,    19,    20,    21,    22,    23,    24,     0,    26,    27,
+      28,    29,    30,     0,     0,    33,     0,     0,     0,     0,
+     178,     0,     0,     0,     0,    34,     7,     8,     9,    10,
+      11,    12,    13,     0,    15,    16,    17,    18,    19,    20,
+      21,    22,    23,    24,     0,    26,    27,    28,    29,    30,
+       0,     0,    33,     0,     0,     0,     0,     0,     0,     0,
+       0,     0,    34
+};
+
+static const yytype_int16 yycheck[] =
+{
+      59,    38,    79,     3,     1,     8,    56,    37,    26,    37,
+      64,    31,     1,   147,    37,    18,    30,     1,    32,   109,
+       0,   111,    45,    51,    27,    23,    76,    44,    31,    51,
+      50,    37,   109,    63,   111,    53,    33,    91,    68,    57,
+      37,   100,    47,   177,    41,    51,    37,    33,    37,    86,
+      47,    48,    49,    37,   131,    37,    56,    41,    47,    48,
+      51,    47,    47,    47,    48,    47,    48,    33,    37,    37,
+      51,    33,   149,    41,    44,    45,    76,    44,    45,    47,
+      48,    47,   159,   160,    52,    47,    37,    37,   147,    37,
+      41,    45,    46,    41,   131,    44,    47,    48,    50,    47,
+      48,   159,   160,    46,    45,    49,   165,     1,    34,    49,
+      49,     5,     6,     7,     8,     9,    10,    11,   177,    13,
+      14,    15,    16,    17,    18,    19,    20,    21,    22,    52,
+      24,    25,    26,    27,    28,    34,    44,    31,    44,    46,
+      30,    44,    31,    37,    49,    49,    46,    41,    49,    36,
+      44,    45,    49,    47,    48,     1,    49,    34,    52,     5,
+       6,     7,     8,     9,    10,    11,    49,    13,    14,    15,
+      16,    17,    18,    19,    20,    21,    22,    49,    24,    25,
+      26,    27,    28,    49,    49,    31,    49,    49,     1,   165,
+      81,    37,    94,   149,   107,    41,   112,    49,    44,    45,
+      -1,    47,    48,     1,    -1,   103,    52,     5,     6,     7,
+       8,     9,    10,    11,    -1,    13,    14,    15,    16,    17,
+      18,    19,    20,    21,    22,    -1,    24,    25,    26,    27,
+      28,    -1,    -1,    31,    -1,    -1,    -1,    -1,    36,    -1,
+       1,    -1,    -1,    41,     5,     6,     7,     8,     9,    10,
+      11,    49,    13,    14,    15,    16,    17,    18,    19,    20,
+      21,    22,    -1,    24,    25,    26,    27,    28,    -1,    -1,
+      31,    -1,    -1,    -1,    -1,    36,    -1,     1,    -1,    -1,
+      41,     5,     6,     7,     8,     9,    10,    11,    49,    13,
+      14,    15,    16,    17,    18,    19,    20,    21,    22,    -1,
+      24,    25,    26,    27,    28,    -1,    -1,    31,    -1,    -1,
+      -1,    -1,    36,    -1,    -1,    -1,    -1,    41,    -1,    -1,
+      -1,    -1,     1,    -1,    -1,    49,     5,     6,     7,     8,
+       9,    10,    11,    12,    13,    14,    15,    16,    17,    18,
+      19,    20,    21,    22,    23,    24,    25,    26,    27,    28,
+      29,    30,    31,    -1,    -1,    -1,    -1,    -1,    37,    -1,
+      -1,    -1,    41,    -1,    -1,    44,    -1,    -1,    47,    48,
+       5,     6,     7,     8,     9,    10,    11,    -1,    13,    14,
+      15,    16,    17,    18,    19,    20,    21,    22,    -1,    24,
+      25,    26,    27,    28,    -1,    -1,    31,    -1,    -1,    -1,
+      -1,    -1,    -1,    -1,    -1,    -1,    41,    -1,    -1,    -1,
+      -1,    -1,    -1,    48,    49,     5,     6,     7,     8,     9,
+      10,    11,    -1,    13,    14,    15,    16,    17,    18,    19,
+      20,    21,    22,    -1,    24,    25,    26,    27,    28,    -1,
+      -1,    31,    -1,    -1,    -1,    -1,    -1,    37,    -1,    -1,
+      -1,    41,    -1,    -1,    -1,    -1,    -1,    47,    48,     5,
+       6,     7,     8,     9,    10,    11,    -1,    13,    14,    15,
+      16,    17,    18,    19,    20,    21,    22,    -1,    24,    25,
+      26,    27,    28,    -1,    -1,    31,    -1,    -1,    -1,    -1,
+      36,    -1,    -1,    -1,    -1,    41,     5,     6,     7,     8,
+       9,    10,    11,    -1,    13,    14,    15,    16,    17,    18,
+      19,    20,    21,    22,    -1,    24,    25,    26,    27,    28,
+      -1,    -1,    31,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
+      -1,    -1,    41
+};
+
+/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing
+   symbol of state STATE-NUM.  */
+static const yytype_uint8 yystos[] =
+{
+       0,    54,    55,    56,     0,    55,     1,     5,     6,     7,
+       8,     9,    10,    11,    12,    13,    14,    15,    16,    17,
+      18,    19,    20,    21,    22,    23,    24,    25,    26,    27,
+      28,    29,    30,    31,    41,    57,    60,    64,    65,    66,
+      67,    68,    69,    73,    84,    99,   101,    44,    45,    37,
+      51,    96,    23,    37,    51,    87,    59,    37,    87,    47,
+      47,    44,    37,    47,    48,    61,    62,    63,    70,    74,
+      75,    66,    96,    37,    97,    98,    58,    87,     1,    64,
+      88,    89,    90,    60,    64,    87,    65,    37,     1,    74,
+      71,    72,    73,    44,    46,    74,    30,    32,   100,    33,
+      47,    50,    45,    46,    60,    44,    45,    37,    41,    47,
+      52,    70,    76,    77,    91,    92,    93,    94,    45,     1,
+      90,    74,    48,    49,    49,    49,    49,    73,    63,    95,
+       1,    65,    78,    79,    80,    81,    34,    45,    98,    94,
+       1,    37,    76,    34,    76,    95,    33,    47,    44,    46,
+      49,    44,    31,    50,    85,    86,    49,    37,    41,    47,
+      70,    82,    83,    49,    36,    46,    49,    49,     1,    78,
+      93,    34,     1,    41,    82,    82,    33,    47,    36,    81,
+      49,    49,    49,    49,     1,    78,    49,    49
+};
+
+#define yyerrok		(yyerrstatus = 0)
+#define yyclearin	(yychar = YYEMPTY)
+#define YYEMPTY		(-2)
+#define YYEOF		0
+
+#define YYACCEPT	goto yyacceptlab
+#define YYABORT		goto yyabortlab
+#define YYERROR		goto yyerrorlab
+
+
+/* Like YYERROR except do call yyerror.  This remains here temporarily
+   to ease the transition to the new meaning of YYERROR, for GCC.
+   Once GCC version 2 has supplanted version 1, this can go.  */
+
+#define YYFAIL		goto yyerrlab
+
+#define YYRECOVERING()  (!!yyerrstatus)
+
+#define YYBACKUP(Token, Value)					\
+do								\
+  if (yychar == YYEMPTY && yylen == 1)				\
+    {								\
+      yychar = (Token);						\
+      yylval = (Value);						\
+      yytoken = YYTRANSLATE (yychar);				\
+      YYPOPSTACK (1);						\
+      goto yybackup;						\
+    }								\
+  else								\
+    {								\
+      yyerror (YY_("syntax error: cannot back up")); \
+      YYERROR;							\
+    }								\
+while (YYID (0))
+
+
+#define YYTERROR	1
+#define YYERRCODE	256
+
+
+/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N].
+   If N is 0, then set CURRENT to the empty location which ends
+   the previous symbol: RHS[0] (always defined).  */
+
+#define YYRHSLOC(Rhs, K) ((Rhs)[K])
+#ifndef YYLLOC_DEFAULT
+# define YYLLOC_DEFAULT(Current, Rhs, N)				\
+    do									\
+      if (YYID (N))                                                    \
+	{								\
+	  (Current).first_line   = YYRHSLOC (Rhs, 1).first_line;	\
+	  (Current).first_column = YYRHSLOC (Rhs, 1).first_column;	\
+	  (Current).last_line    = YYRHSLOC (Rhs, N).last_line;		\
+	  (Current).last_column  = YYRHSLOC (Rhs, N).last_column;	\
+	}								\
+      else								\
+	{								\
+	  (Current).first_line   = (Current).last_line   =		\
+	    YYRHSLOC (Rhs, 0).last_line;				\
+	  (Current).first_column = (Current).last_column =		\
+	    YYRHSLOC (Rhs, 0).last_column;				\
+	}								\
+    while (YYID (0))
+#endif
+
+
+/* YY_LOCATION_PRINT -- Print the location on the stream.
+   This macro was not mandated originally: define only if we know
+   we won't break user code: when these are the locations we know.  */
+
+#ifndef YY_LOCATION_PRINT
+# if YYLTYPE_IS_TRIVIAL
+#  define YY_LOCATION_PRINT(File, Loc)			\
+     fprintf (File, "%d.%d-%d.%d",			\
+	      (Loc).first_line, (Loc).first_column,	\
+	      (Loc).last_line,  (Loc).last_column)
+# else
+#  define YY_LOCATION_PRINT(File, Loc) ((void) 0)
+# endif
+#endif
+
+
+/* YYLEX -- calling `yylex' with the right arguments.  */
+
+#ifdef YYLEX_PARAM
+# define YYLEX yylex (YYLEX_PARAM)
+#else
+# define YYLEX yylex ()
+#endif
+
+/* Enable debugging if requested.  */
+#if YYDEBUG
+
+# ifndef YYFPRINTF
+#  include <stdio.h> /* INFRINGES ON USER NAME SPACE */
+#  define YYFPRINTF fprintf
+# endif
+
+# define YYDPRINTF(Args)			\
+do {						\
+  if (yydebug)					\
+    YYFPRINTF Args;				\
+} while (YYID (0))
+
+# define YY_SYMBOL_PRINT(Title, Type, Value, Location)			  \
+do {									  \
+  if (yydebug)								  \
+    {									  \
+      YYFPRINTF (stderr, "%s ", Title);					  \
+      yy_symbol_print (stderr,						  \
+		  Type, Value); \
+      YYFPRINTF (stderr, "\n");						  \
+    }									  \
+} while (YYID (0))
+
+
+/*--------------------------------.
+| Print this symbol on YYOUTPUT.  |
+`--------------------------------*/
+
+/*ARGSUSED*/
+#if (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+static void
+yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
+#else
+static void
+yy_symbol_value_print (yyoutput, yytype, yyvaluep)
+    FILE *yyoutput;
+    int yytype;
+    YYSTYPE const * const yyvaluep;
+#endif
+{
+  if (!yyvaluep)
+    return;
+# ifdef YYPRINT
+  if (yytype < YYNTOKENS)
+    YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep);
+# else
+  YYUSE (yyoutput);
+# endif
+  switch (yytype)
+    {
+      default:
+	break;
+    }
+}
+
+
+/*--------------------------------.
+| Print this symbol on YYOUTPUT.  |
+`--------------------------------*/
+
+#if (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+static void
+yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
+#else
+static void
+yy_symbol_print (yyoutput, yytype, yyvaluep)
+    FILE *yyoutput;
+    int yytype;
+    YYSTYPE const * const yyvaluep;
+#endif
+{
+  if (yytype < YYNTOKENS)
+    YYFPRINTF (yyoutput, "token %s (", yytname[yytype]);
+  else
+    YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]);
+
+  yy_symbol_value_print (yyoutput, yytype, yyvaluep);
+  YYFPRINTF (yyoutput, ")");
+}
+
+/*------------------------------------------------------------------.
+| yy_stack_print -- Print the state stack from its BOTTOM up to its |
+| TOP (included).                                                   |
+`------------------------------------------------------------------*/
+
+#if (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+static void
+yy_stack_print (yytype_int16 *yybottom, yytype_int16 *yytop)
+#else
+static void
+yy_stack_print (yybottom, yytop)
+    yytype_int16 *yybottom;
+    yytype_int16 *yytop;
+#endif
+{
+  YYFPRINTF (stderr, "Stack now");
+  for (; yybottom <= yytop; yybottom++)
+    {
+      int yybot = *yybottom;
+      YYFPRINTF (stderr, " %d", yybot);
+    }
+  YYFPRINTF (stderr, "\n");
+}
+
+# define YY_STACK_PRINT(Bottom, Top)				\
+do {								\
+  if (yydebug)							\
+    yy_stack_print ((Bottom), (Top));				\
+} while (YYID (0))
+
+
+/*------------------------------------------------.
+| Report that the YYRULE is going to be reduced.  |
+`------------------------------------------------*/
+
+#if (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+static void
+yy_reduce_print (YYSTYPE *yyvsp, int yyrule)
+#else
+static void
+yy_reduce_print (yyvsp, yyrule)
+    YYSTYPE *yyvsp;
+    int yyrule;
+#endif
+{
+  int yynrhs = yyr2[yyrule];
+  int yyi;
+  unsigned long int yylno = yyrline[yyrule];
+  YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n",
+	     yyrule - 1, yylno);
+  /* The symbols being reduced.  */
+  for (yyi = 0; yyi < yynrhs; yyi++)
+    {
+      YYFPRINTF (stderr, "   $%d = ", yyi + 1);
+      yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi],
+		       &(yyvsp[(yyi + 1) - (yynrhs)])
+		       		       );
+      YYFPRINTF (stderr, "\n");
+    }
+}
+
+# define YY_REDUCE_PRINT(Rule)		\
+do {					\
+  if (yydebug)				\
+    yy_reduce_print (yyvsp, Rule); \
+} while (YYID (0))
+
+/* Nonzero means print parse trace.  It is left uninitialized so that
+   multiple parsers can coexist.  */
+int yydebug;
+#else /* !YYDEBUG */
+# define YYDPRINTF(Args)
+# define YY_SYMBOL_PRINT(Title, Type, Value, Location)
+# define YY_STACK_PRINT(Bottom, Top)
+# define YY_REDUCE_PRINT(Rule)
+#endif /* !YYDEBUG */
+
+
+/* YYINITDEPTH -- initial size of the parser's stacks.  */
+#ifndef	YYINITDEPTH
+# define YYINITDEPTH 200
+#endif
+
+/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only
+   if the built-in stack extension method is used).
+
+   Do not make this value too large; the results are undefined if
+   YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH)
+   evaluated with infinite-precision integer arithmetic.  */
+
+#ifndef YYMAXDEPTH
+# define YYMAXDEPTH 10000
+#endif
+
+
+
+#if YYERROR_VERBOSE
+
+# ifndef yystrlen
+#  if defined __GLIBC__ && defined _STRING_H
+#   define yystrlen strlen
+#  else
+/* Return the length of YYSTR.  */
+#if (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+static YYSIZE_T
+yystrlen (const char *yystr)
+#else
+static YYSIZE_T
+yystrlen (yystr)
+    const char *yystr;
+#endif
+{
+  YYSIZE_T yylen;
+  for (yylen = 0; yystr[yylen]; yylen++)
+    continue;
+  return yylen;
+}
+#  endif
+# endif
+
+# ifndef yystpcpy
+#  if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE
+#   define yystpcpy stpcpy
+#  else
+/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in
+   YYDEST.  */
+#if (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+static char *
+yystpcpy (char *yydest, const char *yysrc)
+#else
+static char *
+yystpcpy (yydest, yysrc)
+    char *yydest;
+    const char *yysrc;
+#endif
+{
+  char *yyd = yydest;
+  const char *yys = yysrc;
+
+  while ((*yyd++ = *yys++) != '\0')
+    continue;
+
+  return yyd - 1;
+}
+#  endif
+# endif
+
+# ifndef yytnamerr
+/* Copy to YYRES the contents of YYSTR after stripping away unnecessary
+   quotes and backslashes, so that it's suitable for yyerror.  The
+   heuristic is that double-quoting is unnecessary unless the string
+   contains an apostrophe, a comma, or backslash (other than
+   backslash-backslash).  YYSTR is taken from yytname.  If YYRES is
+   null, do not copy; instead, return the length of what the result
+   would have been.  */
+static YYSIZE_T
+yytnamerr (char *yyres, const char *yystr)
+{
+  if (*yystr == '"')
+    {
+      YYSIZE_T yyn = 0;
+      char const *yyp = yystr;
+
+      for (;;)
+	switch (*++yyp)
+	  {
+	  case '\'':
+	  case ',':
+	    goto do_not_strip_quotes;
+
+	  case '\\':
+	    if (*++yyp != '\\')
+	      goto do_not_strip_quotes;
+	    /* Fall through.  */
+	  default:
+	    if (yyres)
+	      yyres[yyn] = *yyp;
+	    yyn++;
+	    break;
+
+	  case '"':
+	    if (yyres)
+	      yyres[yyn] = '\0';
+	    return yyn;
+	  }
+    do_not_strip_quotes: ;
+    }
+
+  if (! yyres)
+    return yystrlen (yystr);
+
+  return yystpcpy (yyres, yystr) - yyres;
+}
+# endif
+
+/* Copy into YYRESULT an error message about the unexpected token
+   YYCHAR while in state YYSTATE.  Return the number of bytes copied,
+   including the terminating null byte.  If YYRESULT is null, do not
+   copy anything; just return the number of bytes that would be
+   copied.  As a special case, return 0 if an ordinary "syntax error"
+   message will do.  Return YYSIZE_MAXIMUM if overflow occurs during
+   size calculation.  */
+static YYSIZE_T
+yysyntax_error (char *yyresult, int yystate, int yychar)
+{
+  int yyn = yypact[yystate];
+
+  if (! (YYPACT_NINF < yyn && yyn <= YYLAST))
+    return 0;
+  else
+    {
+      int yytype = YYTRANSLATE (yychar);
+      YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]);
+      YYSIZE_T yysize = yysize0;
+      YYSIZE_T yysize1;
+      int yysize_overflow = 0;
+      enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 };
+      char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM];
+      int yyx;
+
+# if 0
+      /* This is so xgettext sees the translatable formats that are
+	 constructed on the fly.  */
+      YY_("syntax error, unexpected %s");
+      YY_("syntax error, unexpected %s, expecting %s");
+      YY_("syntax error, unexpected %s, expecting %s or %s");
+      YY_("syntax error, unexpected %s, expecting %s or %s or %s");
+      YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s");
+# endif
+      char *yyfmt;
+      char const *yyf;
+      static char const yyunexpected[] = "syntax error, unexpected %s";
+      static char const yyexpecting[] = ", expecting %s";
+      static char const yyor[] = " or %s";
+      char yyformat[sizeof yyunexpected
+		    + sizeof yyexpecting - 1
+		    + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2)
+		       * (sizeof yyor - 1))];
+      char const *yyprefix = yyexpecting;
+
+      /* Start YYX at -YYN if negative to avoid negative indexes in
+	 YYCHECK.  */
+      int yyxbegin = yyn < 0 ? -yyn : 0;
+
+      /* Stay within bounds of both yycheck and yytname.  */
+      int yychecklim = YYLAST - yyn + 1;
+      int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS;
+      int yycount = 1;
+
+      yyarg[0] = yytname[yytype];
+      yyfmt = yystpcpy (yyformat, yyunexpected);
+
+      for (yyx = yyxbegin; yyx < yyxend; ++yyx)
+	if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR)
+	  {
+	    if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM)
+	      {
+		yycount = 1;
+		yysize = yysize0;
+		yyformat[sizeof yyunexpected - 1] = '\0';
+		break;
+	      }
+	    yyarg[yycount++] = yytname[yyx];
+	    yysize1 = yysize + yytnamerr (0, yytname[yyx]);
+	    yysize_overflow |= (yysize1 < yysize);
+	    yysize = yysize1;
+	    yyfmt = yystpcpy (yyfmt, yyprefix);
+	    yyprefix = yyor;
+	  }
+
+      yyf = YY_(yyformat);
+      yysize1 = yysize + yystrlen (yyf);
+      yysize_overflow |= (yysize1 < yysize);
+      yysize = yysize1;
+
+      if (yysize_overflow)
+	return YYSIZE_MAXIMUM;
+
+      if (yyresult)
+	{
+	  /* Avoid sprintf, as that infringes on the user's name space.
+	     Don't have undefined behavior even if the translation
+	     produced a string with the wrong number of "%s"s.  */
+	  char *yyp = yyresult;
+	  int yyi = 0;
+	  while ((*yyp = *yyf) != '\0')
+	    {
+	      if (*yyp == '%' && yyf[1] == 's' && yyi < yycount)
+		{
+		  yyp += yytnamerr (yyp, yyarg[yyi++]);
+		  yyf += 2;
+		}
+	      else
+		{
+		  yyp++;
+		  yyf++;
+		}
+	    }
+	}
+      return yysize;
+    }
+}
+#endif /* YYERROR_VERBOSE */
+
+
+/*-----------------------------------------------.
+| Release the memory associated to this symbol.  |
+`-----------------------------------------------*/
+
+/*ARGSUSED*/
+#if (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+static void
+yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep)
+#else
+static void
+yydestruct (yymsg, yytype, yyvaluep)
+    const char *yymsg;
+    int yytype;
+    YYSTYPE *yyvaluep;
+#endif
+{
+  YYUSE (yyvaluep);
+
+  if (!yymsg)
+    yymsg = "Deleting";
+  YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp);
+
+  switch (yytype)
+    {
+
+      default:
+	break;
+    }
+}
+
+/* Prevent warnings from -Wmissing-prototypes.  */
+#ifdef YYPARSE_PARAM
+#if defined __STDC__ || defined __cplusplus
+int yyparse (void *YYPARSE_PARAM);
+#else
+int yyparse ();
+#endif
+#else /* ! YYPARSE_PARAM */
+#if defined __STDC__ || defined __cplusplus
+int yyparse (void);
+#else
+int yyparse ();
+#endif
+#endif /* ! YYPARSE_PARAM */
+
+
+/* The lookahead symbol.  */
+int yychar;
+
+/* The semantic value of the lookahead symbol.  */
+YYSTYPE yylval;
+
+/* Number of syntax errors so far.  */
+int yynerrs;
+
+
+
+/*-------------------------.
+| yyparse or yypush_parse.  |
+`-------------------------*/
+
+#ifdef YYPARSE_PARAM
+#if (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+int
+yyparse (void *YYPARSE_PARAM)
+#else
+int
+yyparse (YYPARSE_PARAM)
+    void *YYPARSE_PARAM;
+#endif
+#else /* ! YYPARSE_PARAM */
+#if (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+int
+yyparse (void)
+#else
+int
+yyparse ()
+
+#endif
+#endif
+{
+
+
+    int yystate;
+    /* Number of tokens to shift before error messages enabled.  */
+    int yyerrstatus;
+
+    /* The stacks and their tools:
+       `yyss': related to states.
+       `yyvs': related to semantic values.
+
+       Refer to the stacks thru separate pointers, to allow yyoverflow
+       to reallocate them elsewhere.  */
+
+    /* The state stack.  */
+    yytype_int16 yyssa[YYINITDEPTH];
+    yytype_int16 *yyss;
+    yytype_int16 *yyssp;
+
+    /* The semantic value stack.  */
+    YYSTYPE yyvsa[YYINITDEPTH];
+    YYSTYPE *yyvs;
+    YYSTYPE *yyvsp;
+
+    YYSIZE_T yystacksize;
+
+  int yyn;
+  int yyresult;
+  /* Lookahead token as an internal (translated) token number.  */
+  int yytoken;
+  /* The variables used to return semantic value and location from the
+     action routines.  */
+  YYSTYPE yyval;
+
+#if YYERROR_VERBOSE
+  /* Buffer for error messages, and its allocated size.  */
+  char yymsgbuf[128];
+  char *yymsg = yymsgbuf;
+  YYSIZE_T yymsg_alloc = sizeof yymsgbuf;
+#endif
+
+#define YYPOPSTACK(N)   (yyvsp -= (N), yyssp -= (N))
+
+  /* The number of symbols on the RHS of the reduced rule.
+     Keep to zero when no symbol should be popped.  */
+  int yylen = 0;
+
+  yytoken = 0;
+  yyss = yyssa;
+  yyvs = yyvsa;
+  yystacksize = YYINITDEPTH;
+
+  YYDPRINTF ((stderr, "Starting parse\n"));
+
+  yystate = 0;
+  yyerrstatus = 0;
+  yynerrs = 0;
+  yychar = YYEMPTY; /* Cause a token to be read.  */
+
+  /* Initialize stack pointers.
+     Waste one element of value and location stack
+     so that they stay on the same level as the state stack.
+     The wasted elements are never initialized.  */
+  yyssp = yyss;
+  yyvsp = yyvs;
+
+  goto yysetstate;
+
+/*------------------------------------------------------------.
+| yynewstate -- Push a new state, which is found in yystate.  |
+`------------------------------------------------------------*/
+ yynewstate:
+  /* In all cases, when you get here, the value and location stacks
+     have just been pushed.  So pushing a state here evens the stacks.  */
+  yyssp++;
+
+ yysetstate:
+  *yyssp = yystate;
+
+  if (yyss + yystacksize - 1 <= yyssp)
+    {
+      /* Get the current used size of the three stacks, in elements.  */
+      YYSIZE_T yysize = yyssp - yyss + 1;
+
+#ifdef yyoverflow
+      {
+	/* Give user a chance to reallocate the stack.  Use copies of
+	   these so that the &'s don't force the real ones into
+	   memory.  */
+	YYSTYPE *yyvs1 = yyvs;
+	yytype_int16 *yyss1 = yyss;
+
+	/* Each stack pointer address is followed by the size of the
+	   data in use in that stack, in bytes.  This used to be a
+	   conditional around just the two extra args, but that might
+	   be undefined if yyoverflow is a macro.  */
+	yyoverflow (YY_("memory exhausted"),
+		    &yyss1, yysize * sizeof (*yyssp),
+		    &yyvs1, yysize * sizeof (*yyvsp),
+		    &yystacksize);
+
+	yyss = yyss1;
+	yyvs = yyvs1;
+      }
+#else /* no yyoverflow */
+# ifndef YYSTACK_RELOCATE
+      goto yyexhaustedlab;
+# else
+      /* Extend the stack our own way.  */
+      if (YYMAXDEPTH <= yystacksize)
+	goto yyexhaustedlab;
+      yystacksize *= 2;
+      if (YYMAXDEPTH < yystacksize)
+	yystacksize = YYMAXDEPTH;
+
+      {
+	yytype_int16 *yyss1 = yyss;
+	union yyalloc *yyptr =
+	  (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize));
+	if (! yyptr)
+	  goto yyexhaustedlab;
+	YYSTACK_RELOCATE (yyss_alloc, yyss);
+	YYSTACK_RELOCATE (yyvs_alloc, yyvs);
+#  undef YYSTACK_RELOCATE
+	if (yyss1 != yyssa)
+	  YYSTACK_FREE (yyss1);
+      }
+# endif
+#endif /* no yyoverflow */
+
+      yyssp = yyss + yysize - 1;
+      yyvsp = yyvs + yysize - 1;
+
+      YYDPRINTF ((stderr, "Stack size increased to %lu\n",
+		  (unsigned long int) yystacksize));
+
+      if (yyss + yystacksize - 1 <= yyssp)
+	YYABORT;
+    }
+
+  YYDPRINTF ((stderr, "Entering state %d\n", yystate));
+
+  if (yystate == YYFINAL)
+    YYACCEPT;
+
+  goto yybackup;
+
+/*-----------.
+| yybackup.  |
+`-----------*/
+yybackup:
+
+  /* Do appropriate processing given the current state.  Read a
+     lookahead token if we need one and don't already have one.  */
+
+  /* First try to decide what to do without reference to lookahead token.  */
+  yyn = yypact[yystate];
+  if (yyn == YYPACT_NINF)
+    goto yydefault;
+
+  /* Not known => get a lookahead token if don't already have one.  */
+
+  /* YYCHAR is either YYEMPTY or YYEOF or a valid lookahead symbol.  */
+  if (yychar == YYEMPTY)
+    {
+      YYDPRINTF ((stderr, "Reading a token: "));
+      yychar = YYLEX;
+    }
+
+  if (yychar <= YYEOF)
+    {
+      yychar = yytoken = YYEOF;
+      YYDPRINTF ((stderr, "Now at end of input.\n"));
+    }
+  else
+    {
+      yytoken = YYTRANSLATE (yychar);
+      YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc);
+    }
+
+  /* If the proper action on seeing token YYTOKEN is to reduce or to
+     detect an error, take that action.  */
+  yyn += yytoken;
+  if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken)
+    goto yydefault;
+  yyn = yytable[yyn];
+  if (yyn <= 0)
+    {
+      if (yyn == 0 || yyn == YYTABLE_NINF)
+	goto yyerrlab;
+      yyn = -yyn;
+      goto yyreduce;
+    }
+
+  /* Count tokens shifted since error; after three, turn off error
+     status.  */
+  if (yyerrstatus)
+    yyerrstatus--;
+
+  /* Shift the lookahead token.  */
+  YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc);
+
+  /* Discard the shifted token.  */
+  yychar = YYEMPTY;
+
+  yystate = yyn;
+  *++yyvsp = yylval;
+
+  goto yynewstate;
+
+
+/*-----------------------------------------------------------.
+| yydefault -- do the default action for the current state.  |
+`-----------------------------------------------------------*/
+yydefault:
+  yyn = yydefact[yystate];
+  if (yyn == 0)
+    goto yyerrlab;
+  goto yyreduce;
+
+
+/*-----------------------------.
+| yyreduce -- Do a reduction.  |
+`-----------------------------*/
+yyreduce:
+  /* yyn is the number of a rule to reduce with.  */
+  yylen = yyr2[yyn];
+
+  /* If YYLEN is nonzero, implement the default value of the action:
+     `$$ = $1'.
+
+     Otherwise, the following line sets YYVAL to garbage.
+     This behavior is undocumented and Bison
+     users should not rely upon it.  Assigning to YYVAL
+     unconditionally makes the parser a bit smaller, and it avoids a
+     GCC warning that YYVAL may be used uninitialized.  */
+  yyval = yyvsp[1-yylen];
+
+
+  YY_REDUCE_PRINT (yyn);
+  switch (yyn)
+    {
+        case 4:
+
+/* Line 1455 of yacc.c  */
+#line 109 "scripts/genksyms/parse.y"
+    { is_typedef = 0; is_extern = 0; current_name = NULL; decl_spec = NULL; ;}
+    break;
+
+  case 5:
+
+/* Line 1455 of yacc.c  */
+#line 111 "scripts/genksyms/parse.y"
+    { free_list(*(yyvsp[(2) - (2)]), NULL); *(yyvsp[(2) - (2)]) = NULL; ;}
+    break;
+
+  case 6:
+
+/* Line 1455 of yacc.c  */
+#line 115 "scripts/genksyms/parse.y"
+    { is_typedef = 1; ;}
+    break;
+
+  case 7:
+
+/* Line 1455 of yacc.c  */
+#line 116 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(4) - (4)]); ;}
+    break;
+
+  case 8:
+
+/* Line 1455 of yacc.c  */
+#line 117 "scripts/genksyms/parse.y"
+    { is_typedef = 1; ;}
+    break;
+
+  case 9:
+
+/* Line 1455 of yacc.c  */
+#line 118 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(3) - (3)]); ;}
+    break;
+
+  case 14:
+
+/* Line 1455 of yacc.c  */
+#line 123 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(2) - (2)]); ;}
+    break;
+
+  case 15:
+
+/* Line 1455 of yacc.c  */
+#line 124 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(2) - (2)]); ;}
+    break;
+
+  case 16:
+
+/* Line 1455 of yacc.c  */
+#line 129 "scripts/genksyms/parse.y"
+    { if (current_name) {
+		    struct string_list *decl = (*(yyvsp[(3) - (3)]))->next;
+		    (*(yyvsp[(3) - (3)]))->next = NULL;
+		    add_symbol(current_name,
+			       is_typedef ? SYM_TYPEDEF : SYM_NORMAL,
+			       decl, is_extern);
+		    current_name = NULL;
+		  }
+		  (yyval) = (yyvsp[(3) - (3)]);
+		;}
+    break;
+
+  case 17:
+
+/* Line 1455 of yacc.c  */
+#line 142 "scripts/genksyms/parse.y"
+    { (yyval) = NULL; ;}
+    break;
+
+  case 19:
+
+/* Line 1455 of yacc.c  */
+#line 148 "scripts/genksyms/parse.y"
+    { struct string_list *decl = *(yyvsp[(1) - (1)]);
+		  *(yyvsp[(1) - (1)]) = NULL;
+		  add_symbol(current_name,
+			     is_typedef ? SYM_TYPEDEF : SYM_NORMAL, decl, is_extern);
+		  current_name = NULL;
+		  (yyval) = (yyvsp[(1) - (1)]);
+		;}
+    break;
+
+  case 20:
+
+/* Line 1455 of yacc.c  */
+#line 156 "scripts/genksyms/parse.y"
+    { struct string_list *decl = *(yyvsp[(3) - (3)]);
+		  *(yyvsp[(3) - (3)]) = NULL;
+		  free_list(*(yyvsp[(2) - (3)]), NULL);
+		  *(yyvsp[(2) - (3)]) = decl_spec;
+		  add_symbol(current_name,
+			     is_typedef ? SYM_TYPEDEF : SYM_NORMAL, decl, is_extern);
+		  current_name = NULL;
+		  (yyval) = (yyvsp[(3) - (3)]);
+		;}
+    break;
+
+  case 21:
+
+/* Line 1455 of yacc.c  */
+#line 169 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(4) - (4)]) ? (yyvsp[(4) - (4)]) : (yyvsp[(3) - (4)]) ? (yyvsp[(3) - (4)]) : (yyvsp[(2) - (4)]) ? (yyvsp[(2) - (4)]) : (yyvsp[(1) - (4)]); ;}
+    break;
+
+  case 22:
+
+/* Line 1455 of yacc.c  */
+#line 174 "scripts/genksyms/parse.y"
+    { decl_spec = NULL; ;}
+    break;
+
+  case 24:
+
+/* Line 1455 of yacc.c  */
+#line 179 "scripts/genksyms/parse.y"
+    { decl_spec = *(yyvsp[(1) - (1)]); ;}
+    break;
+
+  case 25:
+
+/* Line 1455 of yacc.c  */
+#line 180 "scripts/genksyms/parse.y"
+    { decl_spec = *(yyvsp[(2) - (2)]); ;}
+    break;
+
+  case 26:
+
+/* Line 1455 of yacc.c  */
+#line 185 "scripts/genksyms/parse.y"
+    { /* Version 2 checksumming ignores storage class, as that
+		     is really irrelevant to the linkage.  */
+		  remove_node((yyvsp[(1) - (1)]));
+		  (yyval) = (yyvsp[(1) - (1)]);
+		;}
+    break;
+
+  case 31:
+
+/* Line 1455 of yacc.c  */
+#line 197 "scripts/genksyms/parse.y"
+    { is_extern = 1; (yyval) = (yyvsp[(1) - (1)]); ;}
+    break;
+
+  case 32:
+
+/* Line 1455 of yacc.c  */
+#line 198 "scripts/genksyms/parse.y"
+    { is_extern = 0; (yyval) = (yyvsp[(1) - (1)]); ;}
+    break;
+
+  case 37:
+
+/* Line 1455 of yacc.c  */
+#line 210 "scripts/genksyms/parse.y"
+    { remove_node((yyvsp[(1) - (2)])); (*(yyvsp[(2) - (2)]))->tag = SYM_STRUCT; (yyval) = (yyvsp[(2) - (2)]); ;}
+    break;
+
+  case 38:
+
+/* Line 1455 of yacc.c  */
+#line 212 "scripts/genksyms/parse.y"
+    { remove_node((yyvsp[(1) - (2)])); (*(yyvsp[(2) - (2)]))->tag = SYM_UNION; (yyval) = (yyvsp[(2) - (2)]); ;}
+    break;
+
+  case 39:
+
+/* Line 1455 of yacc.c  */
+#line 214 "scripts/genksyms/parse.y"
+    { remove_node((yyvsp[(1) - (2)])); (*(yyvsp[(2) - (2)]))->tag = SYM_ENUM; (yyval) = (yyvsp[(2) - (2)]); ;}
+    break;
+
+  case 40:
+
+/* Line 1455 of yacc.c  */
+#line 218 "scripts/genksyms/parse.y"
+    { struct string_list *s = *(yyvsp[(3) - (3)]), *i = *(yyvsp[(2) - (3)]), *r;
+		  r = copy_node(i); r->tag = SYM_STRUCT;
+		  r->next = (*(yyvsp[(1) - (3)]))->next; *(yyvsp[(3) - (3)]) = r; (*(yyvsp[(1) - (3)]))->next = NULL;
+		  add_symbol(i->string, SYM_STRUCT, s, is_extern);
+		  (yyval) = (yyvsp[(3) - (3)]);
+		;}
+    break;
+
+  case 41:
+
+/* Line 1455 of yacc.c  */
+#line 225 "scripts/genksyms/parse.y"
+    { struct string_list *s = *(yyvsp[(3) - (3)]), *i = *(yyvsp[(2) - (3)]), *r;
+		  r = copy_node(i); r->tag = SYM_UNION;
+		  r->next = (*(yyvsp[(1) - (3)]))->next; *(yyvsp[(3) - (3)]) = r; (*(yyvsp[(1) - (3)]))->next = NULL;
+		  add_symbol(i->string, SYM_UNION, s, is_extern);
+		  (yyval) = (yyvsp[(3) - (3)]);
+		;}
+    break;
+
+  case 42:
+
+/* Line 1455 of yacc.c  */
+#line 232 "scripts/genksyms/parse.y"
+    { struct string_list *s = *(yyvsp[(3) - (3)]), *i = *(yyvsp[(2) - (3)]), *r;
+		  r = copy_node(i); r->tag = SYM_ENUM;
+		  r->next = (*(yyvsp[(1) - (3)]))->next; *(yyvsp[(3) - (3)]) = r; (*(yyvsp[(1) - (3)]))->next = NULL;
+		  add_symbol(i->string, SYM_ENUM, s, is_extern);
+		  (yyval) = (yyvsp[(3) - (3)]);
+		;}
+    break;
+
+  case 43:
+
+/* Line 1455 of yacc.c  */
+#line 242 "scripts/genksyms/parse.y"
+    { add_symbol(NULL, SYM_ENUM, NULL, 0); (yyval) = (yyvsp[(2) - (2)]); ;}
+    break;
+
+  case 44:
+
+/* Line 1455 of yacc.c  */
+#line 244 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(2) - (2)]); ;}
+    break;
+
+  case 45:
+
+/* Line 1455 of yacc.c  */
+#line 245 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(2) - (2)]); ;}
+    break;
+
+  case 56:
+
+/* Line 1455 of yacc.c  */
+#line 259 "scripts/genksyms/parse.y"
+    { (*(yyvsp[(1) - (1)]))->tag = SYM_TYPEDEF; (yyval) = (yyvsp[(1) - (1)]); ;}
+    break;
+
+  case 57:
+
+/* Line 1455 of yacc.c  */
+#line 264 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(2) - (2)]) ? (yyvsp[(2) - (2)]) : (yyvsp[(1) - (2)]); ;}
+    break;
+
+  case 58:
+
+/* Line 1455 of yacc.c  */
+#line 268 "scripts/genksyms/parse.y"
+    { (yyval) = NULL; ;}
+    break;
+
+  case 61:
+
+/* Line 1455 of yacc.c  */
+#line 274 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(2) - (2)]); ;}
+    break;
+
+  case 65:
+
+/* Line 1455 of yacc.c  */
+#line 280 "scripts/genksyms/parse.y"
+    { /* restrict has no effect in prototypes so ignore it */
+		  remove_node((yyvsp[(1) - (1)]));
+		  (yyval) = (yyvsp[(1) - (1)]);
+		;}
+    break;
+
+  case 66:
+
+/* Line 1455 of yacc.c  */
+#line 287 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(2) - (2)]); ;}
+    break;
+
+  case 68:
+
+/* Line 1455 of yacc.c  */
+#line 293 "scripts/genksyms/parse.y"
+    { if (current_name != NULL) {
+		    error_with_pos("unexpected second declaration name");
+		    YYERROR;
+		  } else {
+		    current_name = (*(yyvsp[(1) - (1)]))->string;
+		    (yyval) = (yyvsp[(1) - (1)]);
+		  }
+		;}
+    break;
+
+  case 69:
+
+/* Line 1455 of yacc.c  */
+#line 302 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(4) - (4)]); ;}
+    break;
+
+  case 70:
+
+/* Line 1455 of yacc.c  */
+#line 304 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(4) - (4)]); ;}
+    break;
+
+  case 71:
+
+/* Line 1455 of yacc.c  */
+#line 306 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(2) - (2)]); ;}
+    break;
+
+  case 72:
+
+/* Line 1455 of yacc.c  */
+#line 308 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(3) - (3)]); ;}
+    break;
+
+  case 73:
+
+/* Line 1455 of yacc.c  */
+#line 310 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(3) - (3)]); ;}
+    break;
+
+  case 74:
+
+/* Line 1455 of yacc.c  */
+#line 316 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(2) - (2)]); ;}
+    break;
+
+  case 78:
+
+/* Line 1455 of yacc.c  */
+#line 324 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(4) - (4)]); ;}
+    break;
+
+  case 79:
+
+/* Line 1455 of yacc.c  */
+#line 326 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(4) - (4)]); ;}
+    break;
+
+  case 80:
+
+/* Line 1455 of yacc.c  */
+#line 328 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(2) - (2)]); ;}
+    break;
+
+  case 81:
+
+/* Line 1455 of yacc.c  */
+#line 330 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(3) - (3)]); ;}
+    break;
+
+  case 82:
+
+/* Line 1455 of yacc.c  */
+#line 332 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(3) - (3)]); ;}
+    break;
+
+  case 83:
+
+/* Line 1455 of yacc.c  */
+#line 336 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(2) - (2)]); ;}
+    break;
+
+  case 85:
+
+/* Line 1455 of yacc.c  */
+#line 338 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(3) - (3)]); ;}
+    break;
+
+  case 86:
+
+/* Line 1455 of yacc.c  */
+#line 342 "scripts/genksyms/parse.y"
+    { (yyval) = NULL; ;}
+    break;
+
+  case 89:
+
+/* Line 1455 of yacc.c  */
+#line 349 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(3) - (3)]); ;}
+    break;
+
+  case 90:
+
+/* Line 1455 of yacc.c  */
+#line 354 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(2) - (2)]) ? (yyvsp[(2) - (2)]) : (yyvsp[(1) - (2)]); ;}
+    break;
+
+  case 91:
+
+/* Line 1455 of yacc.c  */
+#line 359 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(2) - (2)]) ? (yyvsp[(2) - (2)]) : (yyvsp[(1) - (2)]); ;}
+    break;
+
+  case 93:
+
+/* Line 1455 of yacc.c  */
+#line 364 "scripts/genksyms/parse.y"
+    { (yyval) = NULL; ;}
+    break;
+
+  case 94:
+
+/* Line 1455 of yacc.c  */
+#line 366 "scripts/genksyms/parse.y"
+    { /* For version 2 checksums, we don't want to remember
+		     private parameter names.  */
+		  remove_node((yyvsp[(1) - (1)]));
+		  (yyval) = (yyvsp[(1) - (1)]);
+		;}
+    break;
+
+  case 95:
+
+/* Line 1455 of yacc.c  */
+#line 374 "scripts/genksyms/parse.y"
+    { remove_node((yyvsp[(1) - (1)]));
+		  (yyval) = (yyvsp[(1) - (1)]);
+		;}
+    break;
+
+  case 96:
+
+/* Line 1455 of yacc.c  */
+#line 378 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(4) - (4)]); ;}
+    break;
+
+  case 97:
+
+/* Line 1455 of yacc.c  */
+#line 380 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(4) - (4)]); ;}
+    break;
+
+  case 98:
+
+/* Line 1455 of yacc.c  */
+#line 382 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(2) - (2)]); ;}
+    break;
+
+  case 99:
+
+/* Line 1455 of yacc.c  */
+#line 384 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(3) - (3)]); ;}
+    break;
+
+  case 100:
+
+/* Line 1455 of yacc.c  */
+#line 386 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(3) - (3)]); ;}
+    break;
+
+  case 101:
+
+/* Line 1455 of yacc.c  */
+#line 391 "scripts/genksyms/parse.y"
+    { struct string_list *decl = *(yyvsp[(2) - (3)]);
+		  *(yyvsp[(2) - (3)]) = NULL;
+		  add_symbol(current_name, SYM_NORMAL, decl, is_extern);
+		  (yyval) = (yyvsp[(3) - (3)]);
+		;}
+    break;
+
+  case 102:
+
+/* Line 1455 of yacc.c  */
+#line 399 "scripts/genksyms/parse.y"
+    { (yyval) = NULL; ;}
+    break;
+
+  case 104:
+
+/* Line 1455 of yacc.c  */
+#line 406 "scripts/genksyms/parse.y"
+    { remove_list((yyvsp[(2) - (2)]), &(*(yyvsp[(1) - (2)]))->next); (yyval) = (yyvsp[(2) - (2)]); ;}
+    break;
+
+  case 105:
+
+/* Line 1455 of yacc.c  */
+#line 410 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(3) - (3)]); ;}
+    break;
+
+  case 106:
+
+/* Line 1455 of yacc.c  */
+#line 411 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(3) - (3)]); ;}
+    break;
+
+  case 107:
+
+/* Line 1455 of yacc.c  */
+#line 415 "scripts/genksyms/parse.y"
+    { (yyval) = NULL; ;}
+    break;
+
+  case 110:
+
+/* Line 1455 of yacc.c  */
+#line 421 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(2) - (2)]); ;}
+    break;
+
+  case 111:
+
+/* Line 1455 of yacc.c  */
+#line 426 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(3) - (3)]); ;}
+    break;
+
+  case 112:
+
+/* Line 1455 of yacc.c  */
+#line 428 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(2) - (2)]); ;}
+    break;
+
+  case 113:
+
+/* Line 1455 of yacc.c  */
+#line 432 "scripts/genksyms/parse.y"
+    { (yyval) = NULL; ;}
+    break;
+
+  case 116:
+
+/* Line 1455 of yacc.c  */
+#line 438 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(3) - (3)]); ;}
+    break;
+
+  case 117:
+
+/* Line 1455 of yacc.c  */
+#line 442 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(2) - (2)]) ? (yyvsp[(2) - (2)]) : (yyvsp[(1) - (2)]); ;}
+    break;
+
+  case 118:
+
+/* Line 1455 of yacc.c  */
+#line 443 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(2) - (2)]); ;}
+    break;
+
+  case 120:
+
+/* Line 1455 of yacc.c  */
+#line 448 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(2) - (2)]); ;}
+    break;
+
+  case 121:
+
+/* Line 1455 of yacc.c  */
+#line 452 "scripts/genksyms/parse.y"
+    { (yyval) = NULL; ;}
+    break;
+
+  case 123:
+
+/* Line 1455 of yacc.c  */
+#line 457 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(3) - (3)]); ;}
+    break;
+
+  case 124:
+
+/* Line 1455 of yacc.c  */
+#line 458 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(4) - (4)]); ;}
+    break;
+
+  case 127:
+
+/* Line 1455 of yacc.c  */
+#line 467 "scripts/genksyms/parse.y"
+    {
+			const char *name = strdup((*(yyvsp[(1) - (1)]))->string);
+			add_symbol(name, SYM_ENUM_CONST, NULL, 0);
+		;}
+    break;
+
+  case 128:
+
+/* Line 1455 of yacc.c  */
+#line 472 "scripts/genksyms/parse.y"
+    {
+			const char *name = strdup((*(yyvsp[(1) - (3)]))->string);
+			struct string_list *expr = copy_list_range(*(yyvsp[(3) - (3)]), *(yyvsp[(2) - (3)]));
+			add_symbol(name, SYM_ENUM_CONST, expr, 0);
+		;}
+    break;
+
+  case 129:
+
+/* Line 1455 of yacc.c  */
+#line 479 "scripts/genksyms/parse.y"
+    { (yyval) = (yyvsp[(2) - (2)]); ;}
+    break;
+
+  case 130:
+
+/* Line 1455 of yacc.c  */
+#line 483 "scripts/genksyms/parse.y"
+    { (yyval) = NULL; ;}
+    break;
+
+  case 132:
+
+/* Line 1455 of yacc.c  */
+#line 489 "scripts/genksyms/parse.y"
+    { export_symbol((*(yyvsp[(3) - (5)]))->string); (yyval) = (yyvsp[(5) - (5)]); ;}
+    break;
+
+
+
+/* Line 1455 of yacc.c  */
+#line 2301 "scripts/genksyms/parse.c"
+      default: break;
+    }
+  YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc);
+
+  YYPOPSTACK (yylen);
+  yylen = 0;
+  YY_STACK_PRINT (yyss, yyssp);
+
+  *++yyvsp = yyval;
+
+  /* Now `shift' the result of the reduction.  Determine what state
+     that goes to, based on the state we popped back to and the rule
+     number reduced by.  */
+
+  yyn = yyr1[yyn];
+
+  yystate = yypgoto[yyn - YYNTOKENS] + *yyssp;
+  if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp)
+    yystate = yytable[yystate];
+  else
+    yystate = yydefgoto[yyn - YYNTOKENS];
+
+  goto yynewstate;
+
+
+/*------------------------------------.
+| yyerrlab -- here on detecting error |
+`------------------------------------*/
+yyerrlab:
+  /* If not already recovering from an error, report this error.  */
+  if (!yyerrstatus)
+    {
+      ++yynerrs;
+#if ! YYERROR_VERBOSE
+      yyerror (YY_("syntax error"));
+#else
+      {
+	YYSIZE_T yysize = yysyntax_error (0, yystate, yychar);
+	if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM)
+	  {
+	    YYSIZE_T yyalloc = 2 * yysize;
+	    if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM))
+	      yyalloc = YYSTACK_ALLOC_MAXIMUM;
+	    if (yymsg != yymsgbuf)
+	      YYSTACK_FREE (yymsg);
+	    yymsg = (char *) YYSTACK_ALLOC (yyalloc);
+	    if (yymsg)
+	      yymsg_alloc = yyalloc;
+	    else
+	      {
+		yymsg = yymsgbuf;
+		yymsg_alloc = sizeof yymsgbuf;
+	      }
+	  }
+
+	if (0 < yysize && yysize <= yymsg_alloc)
+	  {
+	    (void) yysyntax_error (yymsg, yystate, yychar);
+	    yyerror (yymsg);
+	  }
+	else
+	  {
+	    yyerror (YY_("syntax error"));
+	    if (yysize != 0)
+	      goto yyexhaustedlab;
+	  }
+      }
+#endif
+    }
+
+
+
+  if (yyerrstatus == 3)
+    {
+      /* If just tried and failed to reuse lookahead token after an
+	 error, discard it.  */
+
+      if (yychar <= YYEOF)
+	{
+	  /* Return failure if at end of input.  */
+	  if (yychar == YYEOF)
+	    YYABORT;
+	}
+      else
+	{
+	  yydestruct ("Error: discarding",
+		      yytoken, &yylval);
+	  yychar = YYEMPTY;
+	}
+    }
+
+  /* Else will try to reuse lookahead token after shifting the error
+     token.  */
+  goto yyerrlab1;
+
+
+/*---------------------------------------------------.
+| yyerrorlab -- error raised explicitly by YYERROR.  |
+`---------------------------------------------------*/
+yyerrorlab:
+
+  /* Pacify compilers like GCC when the user code never invokes
+     YYERROR and the label yyerrorlab therefore never appears in user
+     code.  */
+  if (/*CONSTCOND*/ 0)
+     goto yyerrorlab;
+
+  /* Do not reclaim the symbols of the rule which action triggered
+     this YYERROR.  */
+  YYPOPSTACK (yylen);
+  yylen = 0;
+  YY_STACK_PRINT (yyss, yyssp);
+  yystate = *yyssp;
+  goto yyerrlab1;
+
+
+/*-------------------------------------------------------------.
+| yyerrlab1 -- common code for both syntax error and YYERROR.  |
+`-------------------------------------------------------------*/
+yyerrlab1:
+  yyerrstatus = 3;	/* Each real token shifted decrements this.  */
+
+  for (;;)
+    {
+      yyn = yypact[yystate];
+      if (yyn != YYPACT_NINF)
+	{
+	  yyn += YYTERROR;
+	  if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR)
+	    {
+	      yyn = yytable[yyn];
+	      if (0 < yyn)
+		break;
+	    }
+	}
+
+      /* Pop the current state because it cannot handle the error token.  */
+      if (yyssp == yyss)
+	YYABORT;
+
+
+      yydestruct ("Error: popping",
+		  yystos[yystate], yyvsp);
+      YYPOPSTACK (1);
+      yystate = *yyssp;
+      YY_STACK_PRINT (yyss, yyssp);
+    }
+
+  *++yyvsp = yylval;
+
+
+  /* Shift the error token.  */
+  YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp);
+
+  yystate = yyn;
+  goto yynewstate;
+
+
+/*-------------------------------------.
+| yyacceptlab -- YYACCEPT comes here.  |
+`-------------------------------------*/
+yyacceptlab:
+  yyresult = 0;
+  goto yyreturn;
+
+/*-----------------------------------.
+| yyabortlab -- YYABORT comes here.  |
+`-----------------------------------*/
+yyabortlab:
+  yyresult = 1;
+  goto yyreturn;
+
+#if !defined(yyoverflow) || YYERROR_VERBOSE
+/*-------------------------------------------------.
+| yyexhaustedlab -- memory exhaustion comes here.  |
+`-------------------------------------------------*/
+yyexhaustedlab:
+  yyerror (YY_("memory exhausted"));
+  yyresult = 2;
+  /* Fall through.  */
+#endif
+
+yyreturn:
+  if (yychar != YYEMPTY)
+     yydestruct ("Cleanup: discarding lookahead",
+		 yytoken, &yylval);
+  /* Do not reclaim the symbols of the rule which action triggered
+     this YYABORT or YYACCEPT.  */
+  YYPOPSTACK (yylen);
+  YY_STACK_PRINT (yyss, yyssp);
+  while (yyssp != yyss)
+    {
+      yydestruct ("Cleanup: popping",
+		  yystos[*yyssp], yyvsp);
+      YYPOPSTACK (1);
+    }
+#ifndef yyoverflow
+  if (yyss != yyssa)
+    YYSTACK_FREE (yyss);
+#endif
+#if YYERROR_VERBOSE
+  if (yymsg != yymsgbuf)
+    YYSTACK_FREE (yymsg);
+#endif
+  /* Make sure YYID is used.  */
+  return YYID (yyresult);
+}
+
+
+
+/* Line 1675 of yacc.c  */
+#line 493 "scripts/genksyms/parse.y"
+
+
+static void
+yyerror(const char *e)
+{
+  error_with_pos("%s", e);
+}
+
diff -uNra linux-3.0.82/scripts/genksyms/parse.h linux-3.0.82x/scripts/genksyms/parse.h
--- linux-3.0.82/scripts/genksyms/parse.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/scripts/genksyms/parse.h	2017-09-23 03:42:50.342674073 +0800
@@ -0,0 +1,97 @@
+
+/* A Bison parser, made by GNU Bison 2.4.1.  */
+
+/* Skeleton interface for Bison's Yacc-like parsers in C
+   
+      Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
+   Free Software Foundation, Inc.
+   
+   This program is free software: you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation, either version 3 of the License, or
+   (at your option) any later version.
+   
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+   
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+/* As a special exception, you may create a larger work that contains
+   part or all of the Bison parser skeleton and distribute that work
+   under terms of your choice, so long as that work isn't itself a
+   parser generator using the skeleton or a modified version thereof
+   as a parser skeleton.  Alternatively, if you modify or redistribute
+   the parser skeleton itself, you may (at your option) remove this
+   special exception, which will cause the skeleton and the resulting
+   Bison output files to be licensed under the GNU General Public
+   License without this special exception.
+   
+   This special exception was added by the Free Software Foundation in
+   version 2.2 of Bison.  */
+
+
+/* Tokens.  */
+#ifndef YYTOKENTYPE
+# define YYTOKENTYPE
+   /* Put the tokens into the symbol table, so that GDB and other debuggers
+      know about them.  */
+   enum yytokentype {
+     ASM_KEYW = 258,
+     ATTRIBUTE_KEYW = 259,
+     AUTO_KEYW = 260,
+     BOOL_KEYW = 261,
+     CHAR_KEYW = 262,
+     CONST_KEYW = 263,
+     DOUBLE_KEYW = 264,
+     ENUM_KEYW = 265,
+     EXTERN_KEYW = 266,
+     EXTENSION_KEYW = 267,
+     FLOAT_KEYW = 268,
+     INLINE_KEYW = 269,
+     INT_KEYW = 270,
+     LONG_KEYW = 271,
+     REGISTER_KEYW = 272,
+     RESTRICT_KEYW = 273,
+     SHORT_KEYW = 274,
+     SIGNED_KEYW = 275,
+     STATIC_KEYW = 276,
+     STRUCT_KEYW = 277,
+     TYPEDEF_KEYW = 278,
+     UNION_KEYW = 279,
+     UNSIGNED_KEYW = 280,
+     VOID_KEYW = 281,
+     VOLATILE_KEYW = 282,
+     TYPEOF_KEYW = 283,
+     EXPORT_SYMBOL_KEYW = 284,
+     ASM_PHRASE = 285,
+     ATTRIBUTE_PHRASE = 286,
+     BRACE_PHRASE = 287,
+     BRACKET_PHRASE = 288,
+     EXPRESSION_PHRASE = 289,
+     CHAR = 290,
+     DOTS = 291,
+     IDENT = 292,
+     INT = 293,
+     REAL = 294,
+     STRING = 295,
+     TYPE = 296,
+     OTHER = 297,
+     FILENAME = 298
+   };
+#endif
+
+
+
+#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
+typedef int YYSTYPE;
+# define YYSTYPE_IS_TRIVIAL 1
+# define yystype YYSTYPE /* obsolescent; will be withdrawn */
+# define YYSTYPE_IS_DECLARED 1
+#endif
+
+extern YYSTYPE yylval;
+
+
diff -uNra linux-3.0.82/scripts/kallsyms linux-3.0.82x/scripts/kallsyms
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/scripts/kconfig/conf linux-3.0.82x/scripts/kconfig/conf
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/scripts/kconfig/lex.zconf.c linux-3.0.82x/scripts/kconfig/lex.zconf.c
--- linux-3.0.82/scripts/kconfig/lex.zconf.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/scripts/kconfig/lex.zconf.c	2017-09-23 03:42:50.358674024 +0800
@@ -0,0 +1,2435 @@
+
+#line 3 "scripts/kconfig/lex.zconf.c"
+
+#define  YY_INT_ALIGNED short int
+
+/* A lexical scanner generated by flex */
+
+#define yy_create_buffer zconf_create_buffer
+#define yy_delete_buffer zconf_delete_buffer
+#define yy_flex_debug zconf_flex_debug
+#define yy_init_buffer zconf_init_buffer
+#define yy_flush_buffer zconf_flush_buffer
+#define yy_load_buffer_state zconf_load_buffer_state
+#define yy_switch_to_buffer zconf_switch_to_buffer
+#define yyin zconfin
+#define yyleng zconfleng
+#define yylex zconflex
+#define yylineno zconflineno
+#define yyout zconfout
+#define yyrestart zconfrestart
+#define yytext zconftext
+#define yywrap zconfwrap
+#define yyalloc zconfalloc
+#define yyrealloc zconfrealloc
+#define yyfree zconffree
+
+#define FLEX_SCANNER
+#define YY_FLEX_MAJOR_VERSION 2
+#define YY_FLEX_MINOR_VERSION 5
+#define YY_FLEX_SUBMINOR_VERSION 35
+#if YY_FLEX_SUBMINOR_VERSION > 0
+#define FLEX_BETA
+#endif
+
+/* First, we deal with  platform-specific or compiler-specific issues. */
+
+/* begin standard C headers. */
+#include <stdio.h>
+#include <string.h>
+#include <errno.h>
+#include <stdlib.h>
+
+/* end standard C headers. */
+
+/* flex integer type definitions */
+
+#ifndef FLEXINT_H
+#define FLEXINT_H
+
+/* C99 systems have <inttypes.h>. Non-C99 systems may or may not. */
+
+#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
+
+/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h,
+ * if you want the limit (max/min) macros for int types. 
+ */
+#ifndef __STDC_LIMIT_MACROS
+#define __STDC_LIMIT_MACROS 1
+#endif
+
+#include <inttypes.h>
+typedef int8_t flex_int8_t;
+typedef uint8_t flex_uint8_t;
+typedef int16_t flex_int16_t;
+typedef uint16_t flex_uint16_t;
+typedef int32_t flex_int32_t;
+typedef uint32_t flex_uint32_t;
+#else
+typedef signed char flex_int8_t;
+typedef short int flex_int16_t;
+typedef int flex_int32_t;
+typedef unsigned char flex_uint8_t; 
+typedef unsigned short int flex_uint16_t;
+typedef unsigned int flex_uint32_t;
+
+/* Limits of integral types. */
+#ifndef INT8_MIN
+#define INT8_MIN               (-128)
+#endif
+#ifndef INT16_MIN
+#define INT16_MIN              (-32767-1)
+#endif
+#ifndef INT32_MIN
+#define INT32_MIN              (-2147483647-1)
+#endif
+#ifndef INT8_MAX
+#define INT8_MAX               (127)
+#endif
+#ifndef INT16_MAX
+#define INT16_MAX              (32767)
+#endif
+#ifndef INT32_MAX
+#define INT32_MAX              (2147483647)
+#endif
+#ifndef UINT8_MAX
+#define UINT8_MAX              (255U)
+#endif
+#ifndef UINT16_MAX
+#define UINT16_MAX             (65535U)
+#endif
+#ifndef UINT32_MAX
+#define UINT32_MAX             (4294967295U)
+#endif
+
+#endif /* ! C99 */
+
+#endif /* ! FLEXINT_H */
+
+#ifdef __cplusplus
+
+/* The "const" storage-class-modifier is valid. */
+#define YY_USE_CONST
+
+#else	/* ! __cplusplus */
+
+/* C99 requires __STDC__ to be defined as 1. */
+#if defined (__STDC__)
+
+#define YY_USE_CONST
+
+#endif	/* defined (__STDC__) */
+#endif	/* ! __cplusplus */
+
+#ifdef YY_USE_CONST
+#define yyconst const
+#else
+#define yyconst
+#endif
+
+/* Returned upon end-of-file. */
+#define YY_NULL 0
+
+/* Promotes a possibly negative, possibly signed char to an unsigned
+ * integer for use as an array index.  If the signed char is negative,
+ * we want to instead treat it as an 8-bit unsigned char, hence the
+ * double cast.
+ */
+#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c)
+
+/* Enter a start condition.  This macro really ought to take a parameter,
+ * but we do it the disgusting crufty way forced on us by the ()-less
+ * definition of BEGIN.
+ */
+#define BEGIN (yy_start) = 1 + 2 *
+
+/* Translate the current start state into a value that can be later handed
+ * to BEGIN to return to the state.  The YYSTATE alias is for lex
+ * compatibility.
+ */
+#define YY_START (((yy_start) - 1) / 2)
+#define YYSTATE YY_START
+
+/* Action number for EOF rule of a given start state. */
+#define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1)
+
+/* Special action meaning "start processing a new file". */
+#define YY_NEW_FILE zconfrestart(zconfin  )
+
+#define YY_END_OF_BUFFER_CHAR 0
+
+/* Size of default input buffer. */
+#ifndef YY_BUF_SIZE
+#ifdef __ia64__
+/* On IA-64, the buffer size is 16k, not 8k.
+ * Moreover, YY_BUF_SIZE is 2*YY_READ_BUF_SIZE in the general case.
+ * Ditto for the __ia64__ case accordingly.
+ */
+#define YY_BUF_SIZE 32768
+#else
+#define YY_BUF_SIZE 16384
+#endif /* __ia64__ */
+#endif
+
+/* The state buf must be large enough to hold one state per character in the main buffer.
+ */
+#define YY_STATE_BUF_SIZE   ((YY_BUF_SIZE + 2) * sizeof(yy_state_type))
+
+#ifndef YY_TYPEDEF_YY_BUFFER_STATE
+#define YY_TYPEDEF_YY_BUFFER_STATE
+typedef struct yy_buffer_state *YY_BUFFER_STATE;
+#endif
+
+extern int zconfleng;
+
+extern FILE *zconfin, *zconfout;
+
+#define EOB_ACT_CONTINUE_SCAN 0
+#define EOB_ACT_END_OF_FILE 1
+#define EOB_ACT_LAST_MATCH 2
+
+    #define YY_LESS_LINENO(n)
+    
+/* Return all but the first "n" matched characters back to the input stream. */
+#define yyless(n) \
+	do \
+		{ \
+		/* Undo effects of setting up zconftext. */ \
+        int yyless_macro_arg = (n); \
+        YY_LESS_LINENO(yyless_macro_arg);\
+		*yy_cp = (yy_hold_char); \
+		YY_RESTORE_YY_MORE_OFFSET \
+		(yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \
+		YY_DO_BEFORE_ACTION; /* set up zconftext again */ \
+		} \
+	while ( 0 )
+
+#define unput(c) yyunput( c, (yytext_ptr)  )
+
+#ifndef YY_TYPEDEF_YY_SIZE_T
+#define YY_TYPEDEF_YY_SIZE_T
+typedef size_t yy_size_t;
+#endif
+
+#ifndef YY_STRUCT_YY_BUFFER_STATE
+#define YY_STRUCT_YY_BUFFER_STATE
+struct yy_buffer_state
+	{
+	FILE *yy_input_file;
+
+	char *yy_ch_buf;		/* input buffer */
+	char *yy_buf_pos;		/* current position in input buffer */
+
+	/* Size of input buffer in bytes, not including room for EOB
+	 * characters.
+	 */
+	yy_size_t yy_buf_size;
+
+	/* Number of characters read into yy_ch_buf, not including EOB
+	 * characters.
+	 */
+	int yy_n_chars;
+
+	/* Whether we "own" the buffer - i.e., we know we created it,
+	 * and can realloc() it to grow it, and should free() it to
+	 * delete it.
+	 */
+	int yy_is_our_buffer;
+
+	/* Whether this is an "interactive" input source; if so, and
+	 * if we're using stdio for input, then we want to use getc()
+	 * instead of fread(), to make sure we stop fetching input after
+	 * each newline.
+	 */
+	int yy_is_interactive;
+
+	/* Whether we're considered to be at the beginning of a line.
+	 * If so, '^' rules will be active on the next match, otherwise
+	 * not.
+	 */
+	int yy_at_bol;
+
+    int yy_bs_lineno; /**< The line count. */
+    int yy_bs_column; /**< The column count. */
+    
+	/* Whether to try to fill the input buffer when we reach the
+	 * end of it.
+	 */
+	int yy_fill_buffer;
+
+	int yy_buffer_status;
+
+#define YY_BUFFER_NEW 0
+#define YY_BUFFER_NORMAL 1
+	/* When an EOF's been seen but there's still some text to process
+	 * then we mark the buffer as YY_EOF_PENDING, to indicate that we
+	 * shouldn't try reading from the input source any more.  We might
+	 * still have a bunch of tokens to match, though, because of
+	 * possible backing-up.
+	 *
+	 * When we actually see the EOF, we change the status to "new"
+	 * (via zconfrestart()), so that the user can continue scanning by
+	 * just pointing zconfin at a new input file.
+	 */
+#define YY_BUFFER_EOF_PENDING 2
+
+	};
+#endif /* !YY_STRUCT_YY_BUFFER_STATE */
+
+/* Stack of input buffers. */
+static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */
+static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */
+static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */
+
+/* We provide macros for accessing buffer states in case in the
+ * future we want to put the buffer states in a more general
+ * "scanner state".
+ *
+ * Returns the top of the stack, or NULL.
+ */
+#define YY_CURRENT_BUFFER ( (yy_buffer_stack) \
+                          ? (yy_buffer_stack)[(yy_buffer_stack_top)] \
+                          : NULL)
+
+/* Same as previous macro, but useful when we know that the buffer stack is not
+ * NULL or when we need an lvalue. For internal use only.
+ */
+#define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)]
+
+/* yy_hold_char holds the character lost when zconftext is formed. */
+static char yy_hold_char;
+static int yy_n_chars;		/* number of characters read into yy_ch_buf */
+int zconfleng;
+
+/* Points to current character in buffer. */
+static char *yy_c_buf_p = (char *) 0;
+static int yy_init = 0;		/* whether we need to initialize */
+static int yy_start = 0;	/* start state number */
+
+/* Flag which is used to allow zconfwrap()'s to do buffer switches
+ * instead of setting up a fresh zconfin.  A bit of a hack ...
+ */
+static int yy_did_buffer_switch_on_eof;
+
+void zconfrestart (FILE *input_file  );
+void zconf_switch_to_buffer (YY_BUFFER_STATE new_buffer  );
+YY_BUFFER_STATE zconf_create_buffer (FILE *file,int size  );
+void zconf_delete_buffer (YY_BUFFER_STATE b  );
+void zconf_flush_buffer (YY_BUFFER_STATE b  );
+void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer  );
+void zconfpop_buffer_state (void );
+
+static void zconfensure_buffer_stack (void );
+static void zconf_load_buffer_state (void );
+static void zconf_init_buffer (YY_BUFFER_STATE b,FILE *file  );
+
+#define YY_FLUSH_BUFFER zconf_flush_buffer(YY_CURRENT_BUFFER )
+
+YY_BUFFER_STATE zconf_scan_buffer (char *base,yy_size_t size  );
+YY_BUFFER_STATE zconf_scan_string (yyconst char *yy_str  );
+YY_BUFFER_STATE zconf_scan_bytes (yyconst char *bytes,int len  );
+
+void *zconfalloc (yy_size_t  );
+void *zconfrealloc (void *,yy_size_t  );
+void zconffree (void *  );
+
+#define yy_new_buffer zconf_create_buffer
+
+#define yy_set_interactive(is_interactive) \
+	{ \
+	if ( ! YY_CURRENT_BUFFER ){ \
+        zconfensure_buffer_stack (); \
+		YY_CURRENT_BUFFER_LVALUE =    \
+            zconf_create_buffer(zconfin,YY_BUF_SIZE ); \
+	} \
+	YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \
+	}
+
+#define yy_set_bol(at_bol) \
+	{ \
+	if ( ! YY_CURRENT_BUFFER ){\
+        zconfensure_buffer_stack (); \
+		YY_CURRENT_BUFFER_LVALUE =    \
+            zconf_create_buffer(zconfin,YY_BUF_SIZE ); \
+	} \
+	YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \
+	}
+
+#define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol)
+
+/* Begin user sect3 */
+
+#define zconfwrap(n) 1
+#define YY_SKIP_YYWRAP
+
+typedef unsigned char YY_CHAR;
+
+FILE *zconfin = (FILE *) 0, *zconfout = (FILE *) 0;
+
+typedef int yy_state_type;
+
+extern int zconflineno;
+
+int zconflineno = 1;
+
+extern char *zconftext;
+#define yytext_ptr zconftext
+static yyconst flex_int16_t yy_nxt[][17] =
+    {
+    {
+        0,    0,    0,    0,    0,    0,    0,    0,    0,    0,
+        0,    0,    0,    0,    0,    0,    0
+    },
+
+    {
+       11,   12,   13,   14,   12,   12,   15,   12,   12,   12,
+       12,   12,   12,   12,   12,   12,   12
+    },
+
+    {
+       11,   12,   13,   14,   12,   12,   15,   12,   12,   12,
+       12,   12,   12,   12,   12,   12,   12
+    },
+
+    {
+       11,   16,   16,   17,   16,   16,   16,   16,   16,   16,
+       16,   16,   16,   18,   16,   16,   16
+    },
+
+    {
+       11,   16,   16,   17,   16,   16,   16,   16,   16,   16,
+       16,   16,   16,   18,   16,   16,   16
+
+    },
+
+    {
+       11,   19,   20,   21,   19,   19,   19,   19,   19,   19,
+       19,   19,   19,   19,   19,   19,   19
+    },
+
+    {
+       11,   19,   20,   21,   19,   19,   19,   19,   19,   19,
+       19,   19,   19,   19,   19,   19,   19
+    },
+
+    {
+       11,   22,   22,   23,   22,   24,   22,   22,   24,   22,
+       22,   22,   22,   22,   22,   25,   22
+    },
+
+    {
+       11,   22,   22,   23,   22,   24,   22,   22,   24,   22,
+       22,   22,   22,   22,   22,   25,   22
+    },
+
+    {
+       11,   26,   26,   27,   28,   29,   30,   31,   29,   32,
+       33,   34,   35,   35,   36,   37,   38
+
+    },
+
+    {
+       11,   26,   26,   27,   28,   29,   30,   31,   29,   32,
+       33,   34,   35,   35,   36,   37,   38
+    },
+
+    {
+      -11,  -11,  -11,  -11,  -11,  -11,  -11,  -11,  -11,  -11,
+      -11,  -11,  -11,  -11,  -11,  -11,  -11
+    },
+
+    {
+       11,  -12,  -12,  -12,  -12,  -12,  -12,  -12,  -12,  -12,
+      -12,  -12,  -12,  -12,  -12,  -12,  -12
+    },
+
+    {
+       11,  -13,   39,   40,  -13,  -13,   41,  -13,  -13,  -13,
+      -13,  -13,  -13,  -13,  -13,  -13,  -13
+    },
+
+    {
+       11,  -14,  -14,  -14,  -14,  -14,  -14,  -14,  -14,  -14,
+      -14,  -14,  -14,  -14,  -14,  -14,  -14
+
+    },
+
+    {
+       11,   42,   42,   43,   42,   42,   42,   42,   42,   42,
+       42,   42,   42,   42,   42,   42,   42
+    },
+
+    {
+       11,  -16,  -16,  -16,  -16,  -16,  -16,  -16,  -16,  -16,
+      -16,  -16,  -16,  -16,  -16,  -16,  -16
+    },
+
+    {
+       11,  -17,  -17,  -17,  -17,  -17,  -17,  -17,  -17,  -17,
+      -17,  -17,  -17,  -17,  -17,  -17,  -17
+    },
+
+    {
+       11,  -18,  -18,  -18,  -18,  -18,  -18,  -18,  -18,  -18,
+      -18,  -18,  -18,   44,  -18,  -18,  -18
+    },
+
+    {
+       11,   45,   45,  -19,   45,   45,   45,   45,   45,   45,
+       45,   45,   45,   45,   45,   45,   45
+
+    },
+
+    {
+       11,  -20,   46,   47,  -20,  -20,  -20,  -20,  -20,  -20,
+      -20,  -20,  -20,  -20,  -20,  -20,  -20
+    },
+
+    {
+       11,   48,  -21,  -21,   48,   48,   48,   48,   48,   48,
+       48,   48,   48,   48,   48,   48,   48
+    },
+
+    {
+       11,   49,   49,   50,   49,  -22,   49,   49,  -22,   49,
+       49,   49,   49,   49,   49,  -22,   49
+    },
+
+    {
+       11,  -23,  -23,  -23,  -23,  -23,  -23,  -23,  -23,  -23,
+      -23,  -23,  -23,  -23,  -23,  -23,  -23
+    },
+
+    {
+       11,  -24,  -24,  -24,  -24,  -24,  -24,  -24,  -24,  -24,
+      -24,  -24,  -24,  -24,  -24,  -24,  -24
+
+    },
+
+    {
+       11,   51,   51,   52,   51,   51,   51,   51,   51,   51,
+       51,   51,   51,   51,   51,   51,   51
+    },
+
+    {
+       11,  -26,  -26,  -26,  -26,  -26,  -26,  -26,  -26,  -26,
+      -26,  -26,  -26,  -26,  -26,  -26,  -26
+    },
+
+    {
+       11,  -27,  -27,  -27,  -27,  -27,  -27,  -27,  -27,  -27,
+      -27,  -27,  -27,  -27,  -27,  -27,  -27
+    },
+
+    {
+       11,  -28,  -28,  -28,  -28,  -28,  -28,  -28,  -28,  -28,
+      -28,  -28,  -28,  -28,   53,  -28,  -28
+    },
+
+    {
+       11,  -29,  -29,  -29,  -29,  -29,  -29,  -29,  -29,  -29,
+      -29,  -29,  -29,  -29,  -29,  -29,  -29
+
+    },
+
+    {
+       11,   54,   54,  -30,   54,   54,   54,   54,   54,   54,
+       54,   54,   54,   54,   54,   54,   54
+    },
+
+    {
+       11,  -31,  -31,  -31,  -31,  -31,  -31,   55,  -31,  -31,
+      -31,  -31,  -31,  -31,  -31,  -31,  -31
+    },
+
+    {
+       11,  -32,  -32,  -32,  -32,  -32,  -32,  -32,  -32,  -32,
+      -32,  -32,  -32,  -32,  -32,  -32,  -32
+    },
+
+    {
+       11,  -33,  -33,  -33,  -33,  -33,  -33,  -33,  -33,  -33,
+      -33,  -33,  -33,  -33,  -33,  -33,  -33
+    },
+
+    {
+       11,  -34,  -34,  -34,  -34,  -34,  -34,  -34,  -34,  -34,
+      -34,   56,   57,   57,  -34,  -34,  -34
+
+    },
+
+    {
+       11,  -35,  -35,  -35,  -35,  -35,  -35,  -35,  -35,  -35,
+      -35,   57,   57,   57,  -35,  -35,  -35
+    },
+
+    {
+       11,  -36,  -36,  -36,  -36,  -36,  -36,  -36,  -36,  -36,
+      -36,  -36,  -36,  -36,  -36,  -36,  -36
+    },
+
+    {
+       11,  -37,  -37,   58,  -37,  -37,  -37,  -37,  -37,  -37,
+      -37,  -37,  -37,  -37,  -37,  -37,  -37
+    },
+
+    {
+       11,  -38,  -38,  -38,  -38,  -38,  -38,  -38,  -38,  -38,
+      -38,  -38,  -38,  -38,  -38,  -38,   59
+    },
+
+    {
+       11,  -39,   39,   40,  -39,  -39,   41,  -39,  -39,  -39,
+      -39,  -39,  -39,  -39,  -39,  -39,  -39
+
+    },
+
+    {
+       11,  -40,  -40,  -40,  -40,  -40,  -40,  -40,  -40,  -40,
+      -40,  -40,  -40,  -40,  -40,  -40,  -40
+    },
+
+    {
+       11,   42,   42,   43,   42,   42,   42,   42,   42,   42,
+       42,   42,   42,   42,   42,   42,   42
+    },
+
+    {
+       11,   42,   42,   43,   42,   42,   42,   42,   42,   42,
+       42,   42,   42,   42,   42,   42,   42
+    },
+
+    {
+       11,  -43,  -43,  -43,  -43,  -43,  -43,  -43,  -43,  -43,
+      -43,  -43,  -43,  -43,  -43,  -43,  -43
+    },
+
+    {
+       11,  -44,  -44,  -44,  -44,  -44,  -44,  -44,  -44,  -44,
+      -44,  -44,  -44,   44,  -44,  -44,  -44
+
+    },
+
+    {
+       11,   45,   45,  -45,   45,   45,   45,   45,   45,   45,
+       45,   45,   45,   45,   45,   45,   45
+    },
+
+    {
+       11,  -46,   46,   47,  -46,  -46,  -46,  -46,  -46,  -46,
+      -46,  -46,  -46,  -46,  -46,  -46,  -46
+    },
+
+    {
+       11,   48,  -47,  -47,   48,   48,   48,   48,   48,   48,
+       48,   48,   48,   48,   48,   48,   48
+    },
+
+    {
+       11,  -48,  -48,  -48,  -48,  -48,  -48,  -48,  -48,  -48,
+      -48,  -48,  -48,  -48,  -48,  -48,  -48
+    },
+
+    {
+       11,   49,   49,   50,   49,  -49,   49,   49,  -49,   49,
+       49,   49,   49,   49,   49,  -49,   49
+
+    },
+
+    {
+       11,  -50,  -50,  -50,  -50,  -50,  -50,  -50,  -50,  -50,
+      -50,  -50,  -50,  -50,  -50,  -50,  -50
+    },
+
+    {
+       11,  -51,  -51,   52,  -51,  -51,  -51,  -51,  -51,  -51,
+      -51,  -51,  -51,  -51,  -51,  -51,  -51
+    },
+
+    {
+       11,  -52,  -52,  -52,  -52,  -52,  -52,  -52,  -52,  -52,
+      -52,  -52,  -52,  -52,  -52,  -52,  -52
+    },
+
+    {
+       11,  -53,  -53,  -53,  -53,  -53,  -53,  -53,  -53,  -53,
+      -53,  -53,  -53,  -53,  -53,  -53,  -53
+    },
+
+    {
+       11,   54,   54,  -54,   54,   54,   54,   54,   54,   54,
+       54,   54,   54,   54,   54,   54,   54
+
+    },
+
+    {
+       11,  -55,  -55,  -55,  -55,  -55,  -55,  -55,  -55,  -55,
+      -55,  -55,  -55,  -55,  -55,  -55,  -55
+    },
+
+    {
+       11,  -56,  -56,  -56,  -56,  -56,  -56,  -56,  -56,  -56,
+      -56,   60,   57,   57,  -56,  -56,  -56
+    },
+
+    {
+       11,  -57,  -57,  -57,  -57,  -57,  -57,  -57,  -57,  -57,
+      -57,   57,   57,   57,  -57,  -57,  -57
+    },
+
+    {
+       11,  -58,  -58,  -58,  -58,  -58,  -58,  -58,  -58,  -58,
+      -58,  -58,  -58,  -58,  -58,  -58,  -58
+    },
+
+    {
+       11,  -59,  -59,  -59,  -59,  -59,  -59,  -59,  -59,  -59,
+      -59,  -59,  -59,  -59,  -59,  -59,  -59
+
+    },
+
+    {
+       11,  -60,  -60,  -60,  -60,  -60,  -60,  -60,  -60,  -60,
+      -60,   57,   57,   57,  -60,  -60,  -60
+    },
+
+    } ;
+
+static yy_state_type yy_get_previous_state (void );
+static yy_state_type yy_try_NUL_trans (yy_state_type current_state  );
+static int yy_get_next_buffer (void );
+static void yy_fatal_error (yyconst char msg[]  );
+
+/* Done after the current pattern has been matched and before the
+ * corresponding action - sets up zconftext.
+ */
+#define YY_DO_BEFORE_ACTION \
+	(yytext_ptr) = yy_bp; \
+	zconfleng = (size_t) (yy_cp - yy_bp); \
+	(yy_hold_char) = *yy_cp; \
+	*yy_cp = '\0'; \
+	(yy_c_buf_p) = yy_cp;
+
+#define YY_NUM_RULES 33
+#define YY_END_OF_BUFFER 34
+/* This struct is not used in this scanner,
+   but its presence is necessary. */
+struct yy_trans_info
+	{
+	flex_int32_t yy_verify;
+	flex_int32_t yy_nxt;
+	};
+static yyconst flex_int16_t yy_accept[61] =
+    {   0,
+        0,    0,    0,    0,    0,    0,    0,    0,    0,    0,
+       34,    5,    4,    2,    3,    7,    8,    6,   32,   29,
+       31,   24,   28,   27,   26,   22,   17,   13,   16,   20,
+       22,   11,   12,   19,   19,   14,   22,   22,    4,    2,
+        3,    3,    1,    6,   32,   29,   31,   30,   24,   23,
+       26,   25,   15,   20,    9,   19,   19,   21,   10,   18
+    } ;
+
+static yyconst flex_int32_t yy_ec[256] =
+    {   0,
+        1,    1,    1,    1,    1,    1,    1,    1,    2,    3,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    2,    4,    5,    6,    1,    1,    7,    8,    9,
+       10,    1,    1,    1,   11,   12,   12,   13,   13,   13,
+       13,   13,   13,   13,   13,   13,   13,    1,    1,    1,
+       14,    1,    1,    1,   13,   13,   13,   13,   13,   13,
+       13,   13,   13,   13,   13,   13,   13,   13,   13,   13,
+       13,   13,   13,   13,   13,   13,   13,   13,   13,   13,
+        1,   15,    1,    1,   13,    1,   13,   13,   13,   13,
+
+       13,   13,   13,   13,   13,   13,   13,   13,   13,   13,
+       13,   13,   13,   13,   13,   13,   13,   13,   13,   13,
+       13,   13,    1,   16,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1
+    } ;
+
+extern int zconf_flex_debug;
+int zconf_flex_debug = 0;
+
+/* The intent behind this definition is that it'll catch
+ * any uses of REJECT which flex missed.
+ */
+#define REJECT reject_used_but_not_detected
+#define yymore() yymore_used_but_not_detected
+#define YY_MORE_ADJ 0
+#define YY_RESTORE_YY_MORE_OFFSET
+char *zconftext;
+#define YY_NO_INPUT 1
+
+/*
+ * Copyright (C) 2002 Roman Zippel <zippel@linux-m68k.org>
+ * Released under the terms of the GNU GPL v2.0.
+ */
+
+#include <limits.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+
+#define LKC_DIRECT_LINK
+#include "lkc.h"
+
+#define START_STRSIZE	16
+
+static struct {
+	struct file *file;
+	int lineno;
+} current_pos;
+
+static char *text;
+static int text_size, text_asize;
+
+struct buffer {
+        struct buffer *parent;
+        YY_BUFFER_STATE state;
+};
+
+struct buffer *current_buf;
+
+static int last_ts, first_ts;
+
+static void zconf_endhelp(void);
+static void zconf_endfile(void);
+
+static void new_string(void)
+{
+	text = malloc(START_STRSIZE);
+	text_asize = START_STRSIZE;
+	text_size = 0;
+	*text = 0;
+}
+
+static void append_string(const char *str, int size)
+{
+	int new_size = text_size + size + 1;
+	if (new_size > text_asize) {
+		new_size += START_STRSIZE - 1;
+		new_size &= -START_STRSIZE;
+		text = realloc(text, new_size);
+		text_asize = new_size;
+	}
+	memcpy(text + text_size, str, size);
+	text_size += size;
+	text[text_size] = 0;
+}
+
+static void alloc_string(const char *str, int size)
+{
+	text = malloc(size + 1);
+	memcpy(text, str, size);
+	text[size] = 0;
+}
+
+#define INITIAL 0
+#define COMMAND 1
+#define HELP 2
+#define STRING 3
+#define PARAM 4
+
+#ifndef YY_NO_UNISTD_H
+/* Special case for "unistd.h", since it is non-ANSI. We include it way
+ * down here because we want the user's section 1 to have been scanned first.
+ * The user has a chance to override it with an option.
+ */
+#include <unistd.h>
+#endif
+
+#ifndef YY_EXTRA_TYPE
+#define YY_EXTRA_TYPE void *
+#endif
+
+static int yy_init_globals (void );
+
+/* Accessor methods to globals.
+   These are made visible to non-reentrant scanners for convenience. */
+
+int zconflex_destroy (void );
+
+int zconfget_debug (void );
+
+void zconfset_debug (int debug_flag  );
+
+YY_EXTRA_TYPE zconfget_extra (void );
+
+void zconfset_extra (YY_EXTRA_TYPE user_defined  );
+
+FILE *zconfget_in (void );
+
+void zconfset_in  (FILE * in_str  );
+
+FILE *zconfget_out (void );
+
+void zconfset_out  (FILE * out_str  );
+
+int zconfget_leng (void );
+
+char *zconfget_text (void );
+
+int zconfget_lineno (void );
+
+void zconfset_lineno (int line_number  );
+
+/* Macros after this point can all be overridden by user definitions in
+ * section 1.
+ */
+
+#ifndef YY_SKIP_YYWRAP
+#ifdef __cplusplus
+extern "C" int zconfwrap (void );
+#else
+extern int zconfwrap (void );
+#endif
+#endif
+
+    static void yyunput (int c,char *buf_ptr  );
+    
+#ifndef yytext_ptr
+static void yy_flex_strncpy (char *,yyconst char *,int );
+#endif
+
+#ifdef YY_NEED_STRLEN
+static int yy_flex_strlen (yyconst char * );
+#endif
+
+#ifndef YY_NO_INPUT
+
+#ifdef __cplusplus
+static int yyinput (void );
+#else
+static int input (void );
+#endif
+
+#endif
+
+/* Amount of stuff to slurp up with each read. */
+#ifndef YY_READ_BUF_SIZE
+#ifdef __ia64__
+/* On IA-64, the buffer size is 16k, not 8k */
+#define YY_READ_BUF_SIZE 16384
+#else
+#define YY_READ_BUF_SIZE 8192
+#endif /* __ia64__ */
+#endif
+
+/* Copy whatever the last rule matched to the standard output. */
+#ifndef ECHO
+/* This used to be an fputs(), but since the string might contain NUL's,
+ * we now use fwrite().
+ */
+#define ECHO do { if (fwrite( zconftext, zconfleng, 1, zconfout )) {} } while (0)
+#endif
+
+/* Gets input and stuffs it into "buf".  number of characters read, or YY_NULL,
+ * is returned in "result".
+ */
+#ifndef YY_INPUT
+#define YY_INPUT(buf,result,max_size) \
+	errno=0; \
+	while ( (result = read( fileno(zconfin), (char *) buf, max_size )) < 0 ) \
+	{ \
+		if( errno != EINTR) \
+		{ \
+			YY_FATAL_ERROR( "input in flex scanner failed" ); \
+			break; \
+		} \
+		errno=0; \
+		clearerr(zconfin); \
+	}\
+\
+
+#endif
+
+/* No semi-colon after return; correct usage is to write "yyterminate();" -
+ * we don't want an extra ';' after the "return" because that will cause
+ * some compilers to complain about unreachable statements.
+ */
+#ifndef yyterminate
+#define yyterminate() return YY_NULL
+#endif
+
+/* Number of entries by which start-condition stack grows. */
+#ifndef YY_START_STACK_INCR
+#define YY_START_STACK_INCR 25
+#endif
+
+/* Report a fatal error. */
+#ifndef YY_FATAL_ERROR
+#define YY_FATAL_ERROR(msg) yy_fatal_error( msg )
+#endif
+
+/* end tables serialization structures and prototypes */
+
+/* Default declaration of generated scanner - a define so the user can
+ * easily add parameters.
+ */
+#ifndef YY_DECL
+#define YY_DECL_IS_OURS 1
+
+extern int zconflex (void);
+
+#define YY_DECL int zconflex (void)
+#endif /* !YY_DECL */
+
+/* Code executed at the beginning of each rule, after zconftext and zconfleng
+ * have been set up.
+ */
+#ifndef YY_USER_ACTION
+#define YY_USER_ACTION
+#endif
+
+/* Code executed at the end of each rule. */
+#ifndef YY_BREAK
+#define YY_BREAK break;
+#endif
+
+#define YY_RULE_SETUP \
+	YY_USER_ACTION
+
+/** The main scanner function which does all the work.
+ */
+YY_DECL
+{
+	register yy_state_type yy_current_state;
+	register char *yy_cp, *yy_bp;
+	register int yy_act;
+    
+	int str = 0;
+	int ts, i;
+
+	if ( !(yy_init) )
+		{
+		(yy_init) = 1;
+
+#ifdef YY_USER_INIT
+		YY_USER_INIT;
+#endif
+
+		if ( ! (yy_start) )
+			(yy_start) = 1;	/* first start state */
+
+		if ( ! zconfin )
+			zconfin = stdin;
+
+		if ( ! zconfout )
+			zconfout = stdout;
+
+		if ( ! YY_CURRENT_BUFFER ) {
+			zconfensure_buffer_stack ();
+			YY_CURRENT_BUFFER_LVALUE =
+				zconf_create_buffer(zconfin,YY_BUF_SIZE );
+		}
+
+		zconf_load_buffer_state( );
+		}
+
+	while ( 1 )		/* loops until end-of-file is reached */
+		{
+		yy_cp = (yy_c_buf_p);
+
+		/* Support of zconftext. */
+		*yy_cp = (yy_hold_char);
+
+		/* yy_bp points to the position in yy_ch_buf of the start of
+		 * the current run.
+		 */
+		yy_bp = yy_cp;
+
+		yy_current_state = (yy_start);
+yy_match:
+		while ( (yy_current_state = yy_nxt[yy_current_state][ yy_ec[YY_SC_TO_UI(*yy_cp)]  ]) > 0 )
+			++yy_cp;
+
+		yy_current_state = -yy_current_state;
+
+yy_find_action:
+		yy_act = yy_accept[yy_current_state];
+
+		YY_DO_BEFORE_ACTION;
+
+do_action:	/* This label is used only to access EOF actions. */
+
+		switch ( yy_act )
+	{ /* beginning of action switch */
+case 1:
+/* rule 1 can match eol */
+case 2:
+/* rule 2 can match eol */
+YY_RULE_SETUP
+{
+	current_file->lineno++;
+	return T_EOL;
+}
+	YY_BREAK
+case 3:
+YY_RULE_SETUP
+
+	YY_BREAK
+case 4:
+YY_RULE_SETUP
+{
+	BEGIN(COMMAND);
+}
+	YY_BREAK
+case 5:
+YY_RULE_SETUP
+{
+	unput(zconftext[0]);
+	BEGIN(COMMAND);
+}
+	YY_BREAK
+
+case 6:
+YY_RULE_SETUP
+{
+		struct kconf_id *id = kconf_id_lookup(zconftext, zconfleng);
+		BEGIN(PARAM);
+		current_pos.file = current_file;
+		current_pos.lineno = current_file->lineno;
+		if (id && id->flags & TF_COMMAND) {
+			zconflval.id = id;
+			return id->token;
+		}
+		alloc_string(zconftext, zconfleng);
+		zconflval.string = text;
+		return T_WORD;
+	}
+	YY_BREAK
+case 7:
+YY_RULE_SETUP
+
+	YY_BREAK
+case 8:
+/* rule 8 can match eol */
+YY_RULE_SETUP
+{
+		BEGIN(INITIAL);
+		current_file->lineno++;
+		return T_EOL;
+	}
+	YY_BREAK
+
+case 9:
+YY_RULE_SETUP
+return T_AND;
+	YY_BREAK
+case 10:
+YY_RULE_SETUP
+return T_OR;
+	YY_BREAK
+case 11:
+YY_RULE_SETUP
+return T_OPEN_PAREN;
+	YY_BREAK
+case 12:
+YY_RULE_SETUP
+return T_CLOSE_PAREN;
+	YY_BREAK
+case 13:
+YY_RULE_SETUP
+return T_NOT;
+	YY_BREAK
+case 14:
+YY_RULE_SETUP
+return T_EQUAL;
+	YY_BREAK
+case 15:
+YY_RULE_SETUP
+return T_UNEQUAL;
+	YY_BREAK
+case 16:
+YY_RULE_SETUP
+{
+		str = zconftext[0];
+		new_string();
+		BEGIN(STRING);
+	}
+	YY_BREAK
+case 17:
+/* rule 17 can match eol */
+YY_RULE_SETUP
+BEGIN(INITIAL); current_file->lineno++; return T_EOL;
+	YY_BREAK
+case 18:
+YY_RULE_SETUP
+/* ignore */
+	YY_BREAK
+case 19:
+YY_RULE_SETUP
+{
+		struct kconf_id *id = kconf_id_lookup(zconftext, zconfleng);
+		if (id && id->flags & TF_PARAM) {
+			zconflval.id = id;
+			return id->token;
+		}
+		alloc_string(zconftext, zconfleng);
+		zconflval.string = text;
+		return T_WORD;
+	}
+	YY_BREAK
+case 20:
+YY_RULE_SETUP
+/* comment */
+	YY_BREAK
+case 21:
+/* rule 21 can match eol */
+YY_RULE_SETUP
+current_file->lineno++;
+	YY_BREAK
+case 22:
+YY_RULE_SETUP
+
+	YY_BREAK
+case YY_STATE_EOF(PARAM):
+{
+		BEGIN(INITIAL);
+	}
+	YY_BREAK
+
+case 23:
+/* rule 23 can match eol */
+*yy_cp = (yy_hold_char); /* undo effects of setting up zconftext */
+(yy_c_buf_p) = yy_cp -= 1;
+YY_DO_BEFORE_ACTION; /* set up zconftext again */
+YY_RULE_SETUP
+{
+		append_string(zconftext, zconfleng);
+		zconflval.string = text;
+		return T_WORD_QUOTE;
+	}
+	YY_BREAK
+case 24:
+YY_RULE_SETUP
+{
+		append_string(zconftext, zconfleng);
+	}
+	YY_BREAK
+case 25:
+/* rule 25 can match eol */
+*yy_cp = (yy_hold_char); /* undo effects of setting up zconftext */
+(yy_c_buf_p) = yy_cp -= 1;
+YY_DO_BEFORE_ACTION; /* set up zconftext again */
+YY_RULE_SETUP
+{
+		append_string(zconftext + 1, zconfleng - 1);
+		zconflval.string = text;
+		return T_WORD_QUOTE;
+	}
+	YY_BREAK
+case 26:
+YY_RULE_SETUP
+{
+		append_string(zconftext + 1, zconfleng - 1);
+	}
+	YY_BREAK
+case 27:
+YY_RULE_SETUP
+{
+		if (str == zconftext[0]) {
+			BEGIN(PARAM);
+			zconflval.string = text;
+			return T_WORD_QUOTE;
+		} else
+			append_string(zconftext, 1);
+	}
+	YY_BREAK
+case 28:
+/* rule 28 can match eol */
+YY_RULE_SETUP
+{
+		printf("%s:%d:warning: multi-line strings not supported\n", zconf_curname(), zconf_lineno());
+		current_file->lineno++;
+		BEGIN(INITIAL);
+		return T_EOL;
+	}
+	YY_BREAK
+case YY_STATE_EOF(STRING):
+{
+		BEGIN(INITIAL);
+	}
+	YY_BREAK
+
+case 29:
+YY_RULE_SETUP
+{
+		ts = 0;
+		for (i = 0; i < zconfleng; i++) {
+			if (zconftext[i] == '\t')
+				ts = (ts & ~7) + 8;
+			else
+				ts++;
+		}
+		last_ts = ts;
+		if (first_ts) {
+			if (ts < first_ts) {
+				zconf_endhelp();
+				return T_HELPTEXT;
+			}
+			ts -= first_ts;
+			while (ts > 8) {
+				append_string("        ", 8);
+				ts -= 8;
+			}
+			append_string("        ", ts);
+		}
+	}
+	YY_BREAK
+case 30:
+/* rule 30 can match eol */
+*yy_cp = (yy_hold_char); /* undo effects of setting up zconftext */
+(yy_c_buf_p) = yy_cp -= 1;
+YY_DO_BEFORE_ACTION; /* set up zconftext again */
+YY_RULE_SETUP
+{
+		current_file->lineno++;
+		zconf_endhelp();
+		return T_HELPTEXT;
+	}
+	YY_BREAK
+case 31:
+/* rule 31 can match eol */
+YY_RULE_SETUP
+{
+		current_file->lineno++;
+		append_string("\n", 1);
+	}
+	YY_BREAK
+case 32:
+YY_RULE_SETUP
+{
+		while (zconfleng) {
+			if ((zconftext[zconfleng-1] != ' ') && (zconftext[zconfleng-1] != '\t'))
+				break;
+			zconfleng--;
+		}
+		append_string(zconftext, zconfleng);
+		if (!first_ts)
+			first_ts = last_ts;
+	}
+	YY_BREAK
+case YY_STATE_EOF(HELP):
+{
+		zconf_endhelp();
+		return T_HELPTEXT;
+	}
+	YY_BREAK
+
+case YY_STATE_EOF(INITIAL):
+case YY_STATE_EOF(COMMAND):
+{
+	if (current_file) {
+		zconf_endfile();
+		return T_EOL;
+	}
+	fclose(zconfin);
+	yyterminate();
+}
+	YY_BREAK
+case 33:
+YY_RULE_SETUP
+YY_FATAL_ERROR( "flex scanner jammed" );
+	YY_BREAK
+
+	case YY_END_OF_BUFFER:
+		{
+		/* Amount of text matched not including the EOB char. */
+		int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1;
+
+		/* Undo the effects of YY_DO_BEFORE_ACTION. */
+		*yy_cp = (yy_hold_char);
+		YY_RESTORE_YY_MORE_OFFSET
+
+		if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW )
+			{
+			/* We're scanning a new file or input source.  It's
+			 * possible that this happened because the user
+			 * just pointed zconfin at a new source and called
+			 * zconflex().  If so, then we have to assure
+			 * consistency between YY_CURRENT_BUFFER and our
+			 * globals.  Here is the right place to do so, because
+			 * this is the first action (other than possibly a
+			 * back-up) that will match for the new input source.
+			 */
+			(yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars;
+			YY_CURRENT_BUFFER_LVALUE->yy_input_file = zconfin;
+			YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL;
+			}
+
+		/* Note that here we test for yy_c_buf_p "<=" to the position
+		 * of the first EOB in the buffer, since yy_c_buf_p will
+		 * already have been incremented past the NUL character
+		 * (since all states make transitions on EOB to the
+		 * end-of-buffer state).  Contrast this with the test
+		 * in input().
+		 */
+		if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] )
+			{ /* This was really a NUL. */
+			yy_state_type yy_next_state;
+
+			(yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text;
+
+			yy_current_state = yy_get_previous_state(  );
+
+			/* Okay, we're now positioned to make the NUL
+			 * transition.  We couldn't have
+			 * yy_get_previous_state() go ahead and do it
+			 * for us because it doesn't know how to deal
+			 * with the possibility of jamming (and we don't
+			 * want to build jamming into it because then it
+			 * will run more slowly).
+			 */
+
+			yy_next_state = yy_try_NUL_trans( yy_current_state );
+
+			yy_bp = (yytext_ptr) + YY_MORE_ADJ;
+
+			if ( yy_next_state )
+				{
+				/* Consume the NUL. */
+				yy_cp = ++(yy_c_buf_p);
+				yy_current_state = yy_next_state;
+				goto yy_match;
+				}
+
+			else
+				{
+				yy_cp = (yy_c_buf_p);
+				goto yy_find_action;
+				}
+			}
+
+		else switch ( yy_get_next_buffer(  ) )
+			{
+			case EOB_ACT_END_OF_FILE:
+				{
+				(yy_did_buffer_switch_on_eof) = 0;
+
+				if ( zconfwrap( ) )
+					{
+					/* Note: because we've taken care in
+					 * yy_get_next_buffer() to have set up
+					 * zconftext, we can now set up
+					 * yy_c_buf_p so that if some total
+					 * hoser (like flex itself) wants to
+					 * call the scanner after we return the
+					 * YY_NULL, it'll still work - another
+					 * YY_NULL will get returned.
+					 */
+					(yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ;
+
+					yy_act = YY_STATE_EOF(YY_START);
+					goto do_action;
+					}
+
+				else
+					{
+					if ( ! (yy_did_buffer_switch_on_eof) )
+						YY_NEW_FILE;
+					}
+				break;
+				}
+
+			case EOB_ACT_CONTINUE_SCAN:
+				(yy_c_buf_p) =
+					(yytext_ptr) + yy_amount_of_matched_text;
+
+				yy_current_state = yy_get_previous_state(  );
+
+				yy_cp = (yy_c_buf_p);
+				yy_bp = (yytext_ptr) + YY_MORE_ADJ;
+				goto yy_match;
+
+			case EOB_ACT_LAST_MATCH:
+				(yy_c_buf_p) =
+				&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)];
+
+				yy_current_state = yy_get_previous_state(  );
+
+				yy_cp = (yy_c_buf_p);
+				yy_bp = (yytext_ptr) + YY_MORE_ADJ;
+				goto yy_find_action;
+			}
+		break;
+		}
+
+	default:
+		YY_FATAL_ERROR(
+			"fatal flex scanner internal error--no action found" );
+	} /* end of action switch */
+		} /* end of scanning one token */
+} /* end of zconflex */
+
+/* yy_get_next_buffer - try to read in a new buffer
+ *
+ * Returns a code representing an action:
+ *	EOB_ACT_LAST_MATCH -
+ *	EOB_ACT_CONTINUE_SCAN - continue scanning from current position
+ *	EOB_ACT_END_OF_FILE - end of file
+ */
+static int yy_get_next_buffer (void)
+{
+    	register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf;
+	register char *source = (yytext_ptr);
+	register int number_to_move, i;
+	int ret_val;
+
+	if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] )
+		YY_FATAL_ERROR(
+		"fatal flex scanner internal error--end of buffer missed" );
+
+	if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 )
+		{ /* Don't try to fill the buffer, so this is an EOF. */
+		if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 )
+			{
+			/* We matched a single character, the EOB, so
+			 * treat this as a final EOF.
+			 */
+			return EOB_ACT_END_OF_FILE;
+			}
+
+		else
+			{
+			/* We matched some text prior to the EOB, first
+			 * process it.
+			 */
+			return EOB_ACT_LAST_MATCH;
+			}
+		}
+
+	/* Try to read more data. */
+
+	/* First move last chars to start of buffer. */
+	number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1;
+
+	for ( i = 0; i < number_to_move; ++i )
+		*(dest++) = *(source++);
+
+	if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING )
+		/* don't do the read, it's not guaranteed to return an EOF,
+		 * just force an EOF
+		 */
+		YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0;
+
+	else
+		{
+			int num_to_read =
+			YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1;
+
+		while ( num_to_read <= 0 )
+			{ /* Not enough room in the buffer - grow it. */
+
+			/* just a shorter name for the current buffer */
+			YY_BUFFER_STATE b = YY_CURRENT_BUFFER;
+
+			int yy_c_buf_p_offset =
+				(int) ((yy_c_buf_p) - b->yy_ch_buf);
+
+			if ( b->yy_is_our_buffer )
+				{
+				int new_size = b->yy_buf_size * 2;
+
+				if ( new_size <= 0 )
+					b->yy_buf_size += b->yy_buf_size / 8;
+				else
+					b->yy_buf_size *= 2;
+
+				b->yy_ch_buf = (char *)
+					/* Include room in for 2 EOB chars. */
+					zconfrealloc((void *) b->yy_ch_buf,b->yy_buf_size + 2  );
+				}
+			else
+				/* Can't grow it, we don't own it. */
+				b->yy_ch_buf = 0;
+
+			if ( ! b->yy_ch_buf )
+				YY_FATAL_ERROR(
+				"fatal error - scanner input buffer overflow" );
+
+			(yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset];
+
+			num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size -
+						number_to_move - 1;
+
+			}
+
+		if ( num_to_read > YY_READ_BUF_SIZE )
+			num_to_read = YY_READ_BUF_SIZE;
+
+		/* Read in more data. */
+		YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]),
+			(yy_n_chars), (size_t) num_to_read );
+
+		YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
+		}
+
+	if ( (yy_n_chars) == 0 )
+		{
+		if ( number_to_move == YY_MORE_ADJ )
+			{
+			ret_val = EOB_ACT_END_OF_FILE;
+			zconfrestart(zconfin  );
+			}
+
+		else
+			{
+			ret_val = EOB_ACT_LAST_MATCH;
+			YY_CURRENT_BUFFER_LVALUE->yy_buffer_status =
+				YY_BUFFER_EOF_PENDING;
+			}
+		}
+
+	else
+		ret_val = EOB_ACT_CONTINUE_SCAN;
+
+	if ((yy_size_t) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) {
+		/* Extend the array by 50%, plus the number we really need. */
+		yy_size_t new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1);
+		YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) zconfrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size  );
+		if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf )
+			YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" );
+	}
+
+	(yy_n_chars) += number_to_move;
+	YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR;
+	YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR;
+
+	(yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0];
+
+	return ret_val;
+}
+
+/* yy_get_previous_state - get the state just before the EOB char was reached */
+
+    static yy_state_type yy_get_previous_state (void)
+{
+	register yy_state_type yy_current_state;
+	register char *yy_cp;
+    
+	yy_current_state = (yy_start);
+
+	for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )
+		{
+		yy_current_state = yy_nxt[yy_current_state][(*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1)];
+		}
+
+	return yy_current_state;
+}
+
+/* yy_try_NUL_trans - try to make a transition on the NUL character
+ *
+ * synopsis
+ *	next_state = yy_try_NUL_trans( current_state );
+ */
+    static yy_state_type yy_try_NUL_trans  (yy_state_type yy_current_state )
+{
+	register int yy_is_jam;
+    
+	yy_current_state = yy_nxt[yy_current_state][1];
+	yy_is_jam = (yy_current_state <= 0);
+
+	return yy_is_jam ? 0 : yy_current_state;
+}
+
+    static void yyunput (int c, register char * yy_bp )
+{
+	register char *yy_cp;
+    
+    yy_cp = (yy_c_buf_p);
+
+	/* undo effects of setting up zconftext */
+	*yy_cp = (yy_hold_char);
+
+	if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 )
+		{ /* need to shift things up to make room */
+		/* +2 for EOB chars. */
+		register int number_to_move = (yy_n_chars) + 2;
+		register char *dest = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[
+					YY_CURRENT_BUFFER_LVALUE->yy_buf_size + 2];
+		register char *source =
+				&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move];
+
+		while ( source > YY_CURRENT_BUFFER_LVALUE->yy_ch_buf )
+			*--dest = *--source;
+
+		yy_cp += (int) (dest - source);
+		yy_bp += (int) (dest - source);
+		YY_CURRENT_BUFFER_LVALUE->yy_n_chars =
+			(yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_buf_size;
+
+		if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 )
+			YY_FATAL_ERROR( "flex scanner push-back overflow" );
+		}
+
+	*--yy_cp = (char) c;
+
+	(yytext_ptr) = yy_bp;
+	(yy_hold_char) = *yy_cp;
+	(yy_c_buf_p) = yy_cp;
+}
+
+#ifndef YY_NO_INPUT
+#ifdef __cplusplus
+    static int yyinput (void)
+#else
+    static int input  (void)
+#endif
+
+{
+	int c;
+    
+	*(yy_c_buf_p) = (yy_hold_char);
+
+	if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR )
+		{
+		/* yy_c_buf_p now points to the character we want to return.
+		 * If this occurs *before* the EOB characters, then it's a
+		 * valid NUL; if not, then we've hit the end of the buffer.
+		 */
+		if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] )
+			/* This was really a NUL. */
+			*(yy_c_buf_p) = '\0';
+
+		else
+			{ /* need more input */
+			int offset = (yy_c_buf_p) - (yytext_ptr);
+			++(yy_c_buf_p);
+
+			switch ( yy_get_next_buffer(  ) )
+				{
+				case EOB_ACT_LAST_MATCH:
+					/* This happens because yy_g_n_b()
+					 * sees that we've accumulated a
+					 * token and flags that we need to
+					 * try matching the token before
+					 * proceeding.  But for input(),
+					 * there's no matching to consider.
+					 * So convert the EOB_ACT_LAST_MATCH
+					 * to EOB_ACT_END_OF_FILE.
+					 */
+
+					/* Reset buffer status. */
+					zconfrestart(zconfin );
+
+					/*FALLTHROUGH*/
+
+				case EOB_ACT_END_OF_FILE:
+					{
+					if ( zconfwrap( ) )
+						return EOF;
+
+					if ( ! (yy_did_buffer_switch_on_eof) )
+						YY_NEW_FILE;
+#ifdef __cplusplus
+					return yyinput();
+#else
+					return input();
+#endif
+					}
+
+				case EOB_ACT_CONTINUE_SCAN:
+					(yy_c_buf_p) = (yytext_ptr) + offset;
+					break;
+				}
+			}
+		}
+
+	c = *(unsigned char *) (yy_c_buf_p);	/* cast for 8-bit char's */
+	*(yy_c_buf_p) = '\0';	/* preserve zconftext */
+	(yy_hold_char) = *++(yy_c_buf_p);
+
+	return c;
+}
+#endif	/* ifndef YY_NO_INPUT */
+
+/** Immediately switch to a different input stream.
+ * @param input_file A readable stream.
+ * 
+ * @note This function does not reset the start condition to @c INITIAL .
+ */
+    void zconfrestart  (FILE * input_file )
+{
+    
+	if ( ! YY_CURRENT_BUFFER ){
+        zconfensure_buffer_stack ();
+		YY_CURRENT_BUFFER_LVALUE =
+            zconf_create_buffer(zconfin,YY_BUF_SIZE );
+	}
+
+	zconf_init_buffer(YY_CURRENT_BUFFER,input_file );
+	zconf_load_buffer_state( );
+}
+
+/** Switch to a different input buffer.
+ * @param new_buffer The new input buffer.
+ * 
+ */
+    void zconf_switch_to_buffer  (YY_BUFFER_STATE  new_buffer )
+{
+    
+	/* TODO. We should be able to replace this entire function body
+	 * with
+	 *		zconfpop_buffer_state();
+	 *		zconfpush_buffer_state(new_buffer);
+     */
+	zconfensure_buffer_stack ();
+	if ( YY_CURRENT_BUFFER == new_buffer )
+		return;
+
+	if ( YY_CURRENT_BUFFER )
+		{
+		/* Flush out information for old buffer. */
+		*(yy_c_buf_p) = (yy_hold_char);
+		YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p);
+		YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
+		}
+
+	YY_CURRENT_BUFFER_LVALUE = new_buffer;
+	zconf_load_buffer_state( );
+
+	/* We don't actually know whether we did this switch during
+	 * EOF (zconfwrap()) processing, but the only time this flag
+	 * is looked at is after zconfwrap() is called, so it's safe
+	 * to go ahead and always set it.
+	 */
+	(yy_did_buffer_switch_on_eof) = 1;
+}
+
+static void zconf_load_buffer_state  (void)
+{
+    	(yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars;
+	(yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos;
+	zconfin = YY_CURRENT_BUFFER_LVALUE->yy_input_file;
+	(yy_hold_char) = *(yy_c_buf_p);
+}
+
+/** Allocate and initialize an input buffer state.
+ * @param file A readable stream.
+ * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE.
+ * 
+ * @return the allocated buffer state.
+ */
+    YY_BUFFER_STATE zconf_create_buffer  (FILE * file, int  size )
+{
+	YY_BUFFER_STATE b;
+    
+	b = (YY_BUFFER_STATE) zconfalloc(sizeof( struct yy_buffer_state )  );
+	if ( ! b )
+		YY_FATAL_ERROR( "out of dynamic memory in zconf_create_buffer()" );
+
+	b->yy_buf_size = size;
+
+	/* yy_ch_buf has to be 2 characters longer than the size given because
+	 * we need to put in 2 end-of-buffer characters.
+	 */
+	b->yy_ch_buf = (char *) zconfalloc(b->yy_buf_size + 2  );
+	if ( ! b->yy_ch_buf )
+		YY_FATAL_ERROR( "out of dynamic memory in zconf_create_buffer()" );
+
+	b->yy_is_our_buffer = 1;
+
+	zconf_init_buffer(b,file );
+
+	return b;
+}
+
+/** Destroy the buffer.
+ * @param b a buffer created with zconf_create_buffer()
+ * 
+ */
+    void zconf_delete_buffer (YY_BUFFER_STATE  b )
+{
+    
+	if ( ! b )
+		return;
+
+	if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */
+		YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0;
+
+	if ( b->yy_is_our_buffer )
+		zconffree((void *) b->yy_ch_buf  );
+
+	zconffree((void *) b  );
+}
+
+/* Initializes or reinitializes a buffer.
+ * This function is sometimes called more than once on the same buffer,
+ * such as during a zconfrestart() or at EOF.
+ */
+    static void zconf_init_buffer  (YY_BUFFER_STATE  b, FILE * file )
+
+{
+	int oerrno = errno;
+    
+	zconf_flush_buffer(b );
+
+	b->yy_input_file = file;
+	b->yy_fill_buffer = 1;
+
+    /* If b is the current buffer, then zconf_init_buffer was _probably_
+     * called from zconfrestart() or through yy_get_next_buffer.
+     * In that case, we don't want to reset the lineno or column.
+     */
+    if (b != YY_CURRENT_BUFFER){
+        b->yy_bs_lineno = 1;
+        b->yy_bs_column = 0;
+    }
+
+        b->yy_is_interactive = 0;
+    
+	errno = oerrno;
+}
+
+/** Discard all buffered characters. On the next scan, YY_INPUT will be called.
+ * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER.
+ * 
+ */
+    void zconf_flush_buffer (YY_BUFFER_STATE  b )
+{
+    	if ( ! b )
+		return;
+
+	b->yy_n_chars = 0;
+
+	/* We always need two end-of-buffer characters.  The first causes
+	 * a transition to the end-of-buffer state.  The second causes
+	 * a jam in that state.
+	 */
+	b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR;
+	b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR;
+
+	b->yy_buf_pos = &b->yy_ch_buf[0];
+
+	b->yy_at_bol = 1;
+	b->yy_buffer_status = YY_BUFFER_NEW;
+
+	if ( b == YY_CURRENT_BUFFER )
+		zconf_load_buffer_state( );
+}
+
+/** Pushes the new state onto the stack. The new state becomes
+ *  the current state. This function will allocate the stack
+ *  if necessary.
+ *  @param new_buffer The new state.
+ *  
+ */
+void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer )
+{
+    	if (new_buffer == NULL)
+		return;
+
+	zconfensure_buffer_stack();
+
+	/* This block is copied from zconf_switch_to_buffer. */
+	if ( YY_CURRENT_BUFFER )
+		{
+		/* Flush out information for old buffer. */
+		*(yy_c_buf_p) = (yy_hold_char);
+		YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p);
+		YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
+		}
+
+	/* Only push if top exists. Otherwise, replace top. */
+	if (YY_CURRENT_BUFFER)
+		(yy_buffer_stack_top)++;
+	YY_CURRENT_BUFFER_LVALUE = new_buffer;
+
+	/* copied from zconf_switch_to_buffer. */
+	zconf_load_buffer_state( );
+	(yy_did_buffer_switch_on_eof) = 1;
+}
+
+/** Removes and deletes the top of the stack, if present.
+ *  The next element becomes the new top.
+ *  
+ */
+void zconfpop_buffer_state (void)
+{
+    	if (!YY_CURRENT_BUFFER)
+		return;
+
+	zconf_delete_buffer(YY_CURRENT_BUFFER );
+	YY_CURRENT_BUFFER_LVALUE = NULL;
+	if ((yy_buffer_stack_top) > 0)
+		--(yy_buffer_stack_top);
+
+	if (YY_CURRENT_BUFFER) {
+		zconf_load_buffer_state( );
+		(yy_did_buffer_switch_on_eof) = 1;
+	}
+}
+
+/* Allocates the stack if it does not exist.
+ *  Guarantees space for at least one push.
+ */
+static void zconfensure_buffer_stack (void)
+{
+	int num_to_alloc;
+    
+	if (!(yy_buffer_stack)) {
+
+		/* First allocation is just for 2 elements, since we don't know if this
+		 * scanner will even need a stack. We use 2 instead of 1 to avoid an
+		 * immediate realloc on the next call.
+         */
+		num_to_alloc = 1;
+		(yy_buffer_stack) = (struct yy_buffer_state**)zconfalloc
+								(num_to_alloc * sizeof(struct yy_buffer_state*)
+								);
+		if ( ! (yy_buffer_stack) )
+			YY_FATAL_ERROR( "out of dynamic memory in zconfensure_buffer_stack()" );
+								  
+		memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));
+				
+		(yy_buffer_stack_max) = num_to_alloc;
+		(yy_buffer_stack_top) = 0;
+		return;
+	}
+
+	if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){
+
+		/* Increase the buffer to prepare for a possible push. */
+		int grow_size = 8 /* arbitrary grow size */;
+
+		num_to_alloc = (yy_buffer_stack_max) + grow_size;
+		(yy_buffer_stack) = (struct yy_buffer_state**)zconfrealloc
+								((yy_buffer_stack),
+								num_to_alloc * sizeof(struct yy_buffer_state*)
+								);
+		if ( ! (yy_buffer_stack) )
+			YY_FATAL_ERROR( "out of dynamic memory in zconfensure_buffer_stack()" );
+
+		/* zero only the new slots.*/
+		memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*));
+		(yy_buffer_stack_max) = num_to_alloc;
+	}
+}
+
+/** Setup the input buffer state to scan directly from a user-specified character buffer.
+ * @param base the character buffer
+ * @param size the size in bytes of the character buffer
+ * 
+ * @return the newly allocated buffer state object. 
+ */
+YY_BUFFER_STATE zconf_scan_buffer  (char * base, yy_size_t  size )
+{
+	YY_BUFFER_STATE b;
+    
+	if ( size < 2 ||
+	     base[size-2] != YY_END_OF_BUFFER_CHAR ||
+	     base[size-1] != YY_END_OF_BUFFER_CHAR )
+		/* They forgot to leave room for the EOB's. */
+		return 0;
+
+	b = (YY_BUFFER_STATE) zconfalloc(sizeof( struct yy_buffer_state )  );
+	if ( ! b )
+		YY_FATAL_ERROR( "out of dynamic memory in zconf_scan_buffer()" );
+
+	b->yy_buf_size = size - 2;	/* "- 2" to take care of EOB's */
+	b->yy_buf_pos = b->yy_ch_buf = base;
+	b->yy_is_our_buffer = 0;
+	b->yy_input_file = 0;
+	b->yy_n_chars = b->yy_buf_size;
+	b->yy_is_interactive = 0;
+	b->yy_at_bol = 1;
+	b->yy_fill_buffer = 0;
+	b->yy_buffer_status = YY_BUFFER_NEW;
+
+	zconf_switch_to_buffer(b  );
+
+	return b;
+}
+
+/** Setup the input buffer state to scan a string. The next call to zconflex() will
+ * scan from a @e copy of @a str.
+ * @param yystr a NUL-terminated string to scan
+ * 
+ * @return the newly allocated buffer state object.
+ * @note If you want to scan bytes that may contain NUL values, then use
+ *       zconf_scan_bytes() instead.
+ */
+YY_BUFFER_STATE zconf_scan_string (yyconst char * yystr )
+{
+    
+	return zconf_scan_bytes(yystr,strlen(yystr) );
+}
+
+/** Setup the input buffer state to scan the given bytes. The next call to zconflex() will
+ * scan from a @e copy of @a bytes.
+ * @param yybytes the byte buffer to scan
+ * @param _yybytes_len the number of bytes in the buffer pointed to by @a bytes.
+ * 
+ * @return the newly allocated buffer state object.
+ */
+YY_BUFFER_STATE zconf_scan_bytes  (yyconst char * yybytes, int  _yybytes_len )
+{
+	YY_BUFFER_STATE b;
+	char *buf;
+	yy_size_t n;
+	int i;
+    
+	/* Get memory for full buffer, including space for trailing EOB's. */
+	n = _yybytes_len + 2;
+	buf = (char *) zconfalloc(n  );
+	if ( ! buf )
+		YY_FATAL_ERROR( "out of dynamic memory in zconf_scan_bytes()" );
+
+	for ( i = 0; i < _yybytes_len; ++i )
+		buf[i] = yybytes[i];
+
+	buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR;
+
+	b = zconf_scan_buffer(buf,n );
+	if ( ! b )
+		YY_FATAL_ERROR( "bad buffer in zconf_scan_bytes()" );
+
+	/* It's okay to grow etc. this buffer, and we should throw it
+	 * away when we're done.
+	 */
+	b->yy_is_our_buffer = 1;
+
+	return b;
+}
+
+#ifndef YY_EXIT_FAILURE
+#define YY_EXIT_FAILURE 2
+#endif
+
+static void yy_fatal_error (yyconst char* msg )
+{
+    	(void) fprintf( stderr, "%s\n", msg );
+	exit( YY_EXIT_FAILURE );
+}
+
+/* Redefine yyless() so it works in section 3 code. */
+
+#undef yyless
+#define yyless(n) \
+	do \
+		{ \
+		/* Undo effects of setting up zconftext. */ \
+        int yyless_macro_arg = (n); \
+        YY_LESS_LINENO(yyless_macro_arg);\
+		zconftext[zconfleng] = (yy_hold_char); \
+		(yy_c_buf_p) = zconftext + yyless_macro_arg; \
+		(yy_hold_char) = *(yy_c_buf_p); \
+		*(yy_c_buf_p) = '\0'; \
+		zconfleng = yyless_macro_arg; \
+		} \
+	while ( 0 )
+
+/* Accessor  methods (get/set functions) to struct members. */
+
+/** Get the current line number.
+ * 
+ */
+int zconfget_lineno  (void)
+{
+        
+    return zconflineno;
+}
+
+/** Get the input stream.
+ * 
+ */
+FILE *zconfget_in  (void)
+{
+        return zconfin;
+}
+
+/** Get the output stream.
+ * 
+ */
+FILE *zconfget_out  (void)
+{
+        return zconfout;
+}
+
+/** Get the length of the current token.
+ * 
+ */
+int zconfget_leng  (void)
+{
+        return zconfleng;
+}
+
+/** Get the current token.
+ * 
+ */
+
+char *zconfget_text  (void)
+{
+        return zconftext;
+}
+
+/** Set the current line number.
+ * @param line_number
+ * 
+ */
+void zconfset_lineno (int  line_number )
+{
+    
+    zconflineno = line_number;
+}
+
+/** Set the input stream. This does not discard the current
+ * input buffer.
+ * @param in_str A readable stream.
+ * 
+ * @see zconf_switch_to_buffer
+ */
+void zconfset_in (FILE *  in_str )
+{
+        zconfin = in_str ;
+}
+
+void zconfset_out (FILE *  out_str )
+{
+        zconfout = out_str ;
+}
+
+int zconfget_debug  (void)
+{
+        return zconf_flex_debug;
+}
+
+void zconfset_debug (int  bdebug )
+{
+        zconf_flex_debug = bdebug ;
+}
+
+static int yy_init_globals (void)
+{
+        /* Initialization is the same as for the non-reentrant scanner.
+     * This function is called from zconflex_destroy(), so don't allocate here.
+     */
+
+    (yy_buffer_stack) = 0;
+    (yy_buffer_stack_top) = 0;
+    (yy_buffer_stack_max) = 0;
+    (yy_c_buf_p) = (char *) 0;
+    (yy_init) = 0;
+    (yy_start) = 0;
+
+/* Defined in main.c */
+#ifdef YY_STDINIT
+    zconfin = stdin;
+    zconfout = stdout;
+#else
+    zconfin = (FILE *) 0;
+    zconfout = (FILE *) 0;
+#endif
+
+    /* For future reference: Set errno on error, since we are called by
+     * zconflex_init()
+     */
+    return 0;
+}
+
+/* zconflex_destroy is for both reentrant and non-reentrant scanners. */
+int zconflex_destroy  (void)
+{
+    
+    /* Pop the buffer stack, destroying each element. */
+	while(YY_CURRENT_BUFFER){
+		zconf_delete_buffer(YY_CURRENT_BUFFER  );
+		YY_CURRENT_BUFFER_LVALUE = NULL;
+		zconfpop_buffer_state();
+	}
+
+	/* Destroy the stack itself. */
+	zconffree((yy_buffer_stack) );
+	(yy_buffer_stack) = NULL;
+
+    /* Reset the globals. This is important in a non-reentrant scanner so the next time
+     * zconflex() is called, initialization will occur. */
+    yy_init_globals( );
+
+    return 0;
+}
+
+/*
+ * Internal utility routines.
+ */
+
+#ifndef yytext_ptr
+static void yy_flex_strncpy (char* s1, yyconst char * s2, int n )
+{
+	register int i;
+	for ( i = 0; i < n; ++i )
+		s1[i] = s2[i];
+}
+#endif
+
+#ifdef YY_NEED_STRLEN
+static int yy_flex_strlen (yyconst char * s )
+{
+	register int n;
+	for ( n = 0; s[n]; ++n )
+		;
+
+	return n;
+}
+#endif
+
+void *zconfalloc (yy_size_t  size )
+{
+	return (void *) malloc( size );
+}
+
+void *zconfrealloc  (void * ptr, yy_size_t  size )
+{
+	/* The cast to (char *) in the following accommodates both
+	 * implementations that use char* generic pointers, and those
+	 * that use void* generic pointers.  It works with the latter
+	 * because both ANSI C and C++ allow castless assignment from
+	 * any pointer type to void*, and deal with argument conversions
+	 * as though doing an assignment.
+	 */
+	return (void *) realloc( (char *) ptr, size );
+}
+
+void zconffree (void * ptr )
+{
+	free( (char *) ptr );	/* see zconfrealloc() for (char *) cast */
+}
+
+#define YYTABLES_NAME "yytables"
+
+void zconf_starthelp(void)
+{
+	new_string();
+	last_ts = first_ts = 0;
+	BEGIN(HELP);
+}
+
+static void zconf_endhelp(void)
+{
+	zconflval.string = text;
+	BEGIN(INITIAL);
+}
+
+/*
+ * Try to open specified file with following names:
+ * ./name
+ * $(srctree)/name
+ * The latter is used when srctree is separate from objtree
+ * when compiling the kernel.
+ * Return NULL if file is not found.
+ */
+FILE *zconf_fopen(const char *name)
+{
+	char *env, fullname[PATH_MAX+1];
+	FILE *f;
+
+	f = fopen(name, "r");
+	if (!f && name != NULL && name[0] != '/') {
+		env = getenv(SRCTREE);
+		if (env) {
+			sprintf(fullname, "%s/%s", env, name);
+			f = fopen(fullname, "r");
+		}
+	}
+	return f;
+}
+
+void zconf_initscan(const char *name)
+{
+	zconfin = zconf_fopen(name);
+	if (!zconfin) {
+		printf("can't find file %s\n", name);
+		exit(1);
+	}
+
+	current_buf = malloc(sizeof(*current_buf));
+	memset(current_buf, 0, sizeof(*current_buf));
+
+	current_file = file_lookup(name);
+	current_file->lineno = 1;
+}
+
+void zconf_nextfile(const char *name)
+{
+	struct file *iter;
+	struct file *file = file_lookup(name);
+	struct buffer *buf = malloc(sizeof(*buf));
+	memset(buf, 0, sizeof(*buf));
+
+	current_buf->state = YY_CURRENT_BUFFER;
+	zconfin = zconf_fopen(file->name);
+	if (!zconfin) {
+		printf("%s:%d: can't open file \"%s\"\n",
+		    zconf_curname(), zconf_lineno(), file->name);
+		exit(1);
+	}
+	zconf_switch_to_buffer(zconf_create_buffer(zconfin,YY_BUF_SIZE));
+	buf->parent = current_buf;
+	current_buf = buf;
+
+	for (iter = current_file->parent; iter; iter = iter->parent ) {
+		if (!strcmp(current_file->name,iter->name) ) {
+			printf("%s:%d: recursive inclusion detected. "
+			       "Inclusion path:\n  current file : '%s'\n",
+			       zconf_curname(), zconf_lineno(),
+			       zconf_curname());
+			iter = current_file->parent;
+			while (iter && \
+			       strcmp(iter->name,current_file->name)) {
+				printf("  included from: '%s:%d'\n",
+				       iter->name, iter->lineno-1);
+				iter = iter->parent;
+			}
+			if (iter)
+				printf("  included from: '%s:%d'\n",
+				       iter->name, iter->lineno+1);
+			exit(1);
+		}
+	}
+	file->lineno = 1;
+	file->parent = current_file;
+	current_file = file;
+}
+
+static void zconf_endfile(void)
+{
+	struct buffer *parent;
+
+	current_file = current_file->parent;
+
+	parent = current_buf->parent;
+	if (parent) {
+		fclose(zconfin);
+		zconf_delete_buffer(YY_CURRENT_BUFFER);
+		zconf_switch_to_buffer(parent->state);
+	}
+	free(current_buf);
+	current_buf = parent;
+}
+
+int zconf_lineno(void)
+{
+	return current_pos.lineno;
+}
+
+const char *zconf_curname(void)
+{
+	return current_pos.file ? current_pos.file->name : "<none>";
+}
+
diff -uNra linux-3.0.82/scripts/kconfig/mconf linux-3.0.82x/scripts/kconfig/mconf
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/scripts/kconfig/zconf.hash.c linux-3.0.82x/scripts/kconfig/zconf.hash.c
--- linux-3.0.82/scripts/kconfig/zconf.hash.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/scripts/kconfig/zconf.hash.c	2017-09-23 03:42:50.362674012 +0800
@@ -0,0 +1,245 @@
+/* ANSI-C code produced by gperf version 3.0.3 */
+/* Command-line: gperf  */
+/* Computed positions: -k'1,3' */
+
+#if !((' ' == 32) && ('!' == 33) && ('"' == 34) && ('#' == 35) \
+      && ('%' == 37) && ('&' == 38) && ('\'' == 39) && ('(' == 40) \
+      && (')' == 41) && ('*' == 42) && ('+' == 43) && (',' == 44) \
+      && ('-' == 45) && ('.' == 46) && ('/' == 47) && ('0' == 48) \
+      && ('1' == 49) && ('2' == 50) && ('3' == 51) && ('4' == 52) \
+      && ('5' == 53) && ('6' == 54) && ('7' == 55) && ('8' == 56) \
+      && ('9' == 57) && (':' == 58) && (';' == 59) && ('<' == 60) \
+      && ('=' == 61) && ('>' == 62) && ('?' == 63) && ('A' == 65) \
+      && ('B' == 66) && ('C' == 67) && ('D' == 68) && ('E' == 69) \
+      && ('F' == 70) && ('G' == 71) && ('H' == 72) && ('I' == 73) \
+      && ('J' == 74) && ('K' == 75) && ('L' == 76) && ('M' == 77) \
+      && ('N' == 78) && ('O' == 79) && ('P' == 80) && ('Q' == 81) \
+      && ('R' == 82) && ('S' == 83) && ('T' == 84) && ('U' == 85) \
+      && ('V' == 86) && ('W' == 87) && ('X' == 88) && ('Y' == 89) \
+      && ('Z' == 90) && ('[' == 91) && ('\\' == 92) && (']' == 93) \
+      && ('^' == 94) && ('_' == 95) && ('a' == 97) && ('b' == 98) \
+      && ('c' == 99) && ('d' == 100) && ('e' == 101) && ('f' == 102) \
+      && ('g' == 103) && ('h' == 104) && ('i' == 105) && ('j' == 106) \
+      && ('k' == 107) && ('l' == 108) && ('m' == 109) && ('n' == 110) \
+      && ('o' == 111) && ('p' == 112) && ('q' == 113) && ('r' == 114) \
+      && ('s' == 115) && ('t' == 116) && ('u' == 117) && ('v' == 118) \
+      && ('w' == 119) && ('x' == 120) && ('y' == 121) && ('z' == 122) \
+      && ('{' == 123) && ('|' == 124) && ('}' == 125) && ('~' == 126))
+/* The character set is not based on ISO-646.  */
+#error "gperf generated tables don't work with this execution character set. Please report a bug to <bug-gnu-gperf@gnu.org>."
+#endif
+
+struct kconf_id;
+
+static struct kconf_id *kconf_id_lookup(register const char *str, register unsigned int len);
+/* maximum key range = 50, duplicates = 0 */
+
+#ifdef __GNUC__
+__inline
+#else
+#ifdef __cplusplus
+inline
+#endif
+#endif
+static unsigned int
+kconf_id_hash (register const char *str, register unsigned int len)
+{
+  static unsigned char asso_values[] =
+    {
+      52, 52, 52, 52, 52, 52, 52, 52, 52, 52,
+      52, 52, 52, 52, 52, 52, 52, 52, 52, 52,
+      52, 52, 52, 52, 52, 52, 52, 52, 52, 52,
+      52, 52, 52, 52, 52, 52, 52, 52, 52, 52,
+      52, 52, 52, 52, 52, 52, 52, 52, 52, 52,
+      52, 52, 52, 52, 52, 52, 52, 52, 52, 52,
+      52, 52, 52, 52, 52, 52, 52, 52, 52, 52,
+      52, 52, 52, 52, 52, 52, 52, 52, 52, 52,
+      52, 52, 52, 52, 52, 52, 52, 52, 52, 52,
+      52, 52, 52, 52, 52, 52, 52, 52, 40,  5,
+       0,  0,  5, 52,  0, 20, 52, 52, 10, 20,
+       5,  0, 35, 52,  0, 30,  0, 15,  0, 52,
+      15, 52, 52, 52, 52, 52, 52, 52, 52, 52,
+      52, 52, 52, 52, 52, 52, 52, 52, 52, 52,
+      52, 52, 52, 52, 52, 52, 52, 52, 52, 52,
+      52, 52, 52, 52, 52, 52, 52, 52, 52, 52,
+      52, 52, 52, 52, 52, 52, 52, 52, 52, 52,
+      52, 52, 52, 52, 52, 52, 52, 52, 52, 52,
+      52, 52, 52, 52, 52, 52, 52, 52, 52, 52,
+      52, 52, 52, 52, 52, 52, 52, 52, 52, 52,
+      52, 52, 52, 52, 52, 52, 52, 52, 52, 52,
+      52, 52, 52, 52, 52, 52, 52, 52, 52, 52,
+      52, 52, 52, 52, 52, 52, 52, 52, 52, 52,
+      52, 52, 52, 52, 52, 52, 52, 52, 52, 52,
+      52, 52, 52, 52, 52, 52, 52, 52, 52, 52,
+      52, 52, 52, 52, 52, 52
+    };
+  register int hval = len;
+
+  switch (hval)
+    {
+      default:
+        hval += asso_values[(unsigned char)str[2]];
+      /*FALLTHROUGH*/
+      case 2:
+      case 1:
+        hval += asso_values[(unsigned char)str[0]];
+        break;
+    }
+  return hval;
+}
+
+struct kconf_id_strings_t
+  {
+    char kconf_id_strings_str2[sizeof("on")];
+    char kconf_id_strings_str3[sizeof("env")];
+    char kconf_id_strings_str5[sizeof("endif")];
+    char kconf_id_strings_str6[sizeof("option")];
+    char kconf_id_strings_str7[sizeof("endmenu")];
+    char kconf_id_strings_str8[sizeof("optional")];
+    char kconf_id_strings_str9[sizeof("endchoice")];
+    char kconf_id_strings_str10[sizeof("range")];
+    char kconf_id_strings_str11[sizeof("choice")];
+    char kconf_id_strings_str12[sizeof("default")];
+    char kconf_id_strings_str13[sizeof("def_bool")];
+    char kconf_id_strings_str14[sizeof("help")];
+    char kconf_id_strings_str16[sizeof("config")];
+    char kconf_id_strings_str17[sizeof("def_tristate")];
+    char kconf_id_strings_str18[sizeof("hex")];
+    char kconf_id_strings_str19[sizeof("defconfig_list")];
+    char kconf_id_strings_str22[sizeof("if")];
+    char kconf_id_strings_str23[sizeof("int")];
+    char kconf_id_strings_str27[sizeof("modules")];
+    char kconf_id_strings_str28[sizeof("tristate")];
+    char kconf_id_strings_str29[sizeof("menu")];
+    char kconf_id_strings_str32[sizeof("comment")];
+    char kconf_id_strings_str35[sizeof("menuconfig")];
+    char kconf_id_strings_str36[sizeof("string")];
+    char kconf_id_strings_str37[sizeof("visible")];
+    char kconf_id_strings_str41[sizeof("prompt")];
+    char kconf_id_strings_str42[sizeof("depends")];
+    char kconf_id_strings_str44[sizeof("bool")];
+    char kconf_id_strings_str46[sizeof("select")];
+    char kconf_id_strings_str47[sizeof("boolean")];
+    char kconf_id_strings_str48[sizeof("mainmenu")];
+    char kconf_id_strings_str51[sizeof("source")];
+  };
+static struct kconf_id_strings_t kconf_id_strings_contents =
+  {
+    "on",
+    "env",
+    "endif",
+    "option",
+    "endmenu",
+    "optional",
+    "endchoice",
+    "range",
+    "choice",
+    "default",
+    "def_bool",
+    "help",
+    "config",
+    "def_tristate",
+    "hex",
+    "defconfig_list",
+    "if",
+    "int",
+    "modules",
+    "tristate",
+    "menu",
+    "comment",
+    "menuconfig",
+    "string",
+    "visible",
+    "prompt",
+    "depends",
+    "bool",
+    "select",
+    "boolean",
+    "mainmenu",
+    "source"
+  };
+#define kconf_id_strings ((const char *) &kconf_id_strings_contents)
+#ifdef __GNUC__
+__inline
+#ifdef __GNUC_STDC_INLINE__
+__attribute__ ((__gnu_inline__))
+#endif
+#endif
+struct kconf_id *
+kconf_id_lookup (register const char *str, register unsigned int len)
+{
+  enum
+    {
+      TOTAL_KEYWORDS = 32,
+      MIN_WORD_LENGTH = 2,
+      MAX_WORD_LENGTH = 14,
+      MIN_HASH_VALUE = 2,
+      MAX_HASH_VALUE = 51
+    };
+
+  static struct kconf_id wordlist[] =
+    {
+      {-1}, {-1},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str2,		T_ON,		TF_PARAM},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str3,		T_OPT_ENV,	TF_OPTION},
+      {-1},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str5,		T_ENDIF,	TF_COMMAND},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str6,		T_OPTION,	TF_COMMAND},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str7,	T_ENDMENU,	TF_COMMAND},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str8,	T_OPTIONAL,	TF_COMMAND},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str9,	T_ENDCHOICE,	TF_COMMAND},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str10,		T_RANGE,	TF_COMMAND},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str11,		T_CHOICE,	TF_COMMAND},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str12,	T_DEFAULT,	TF_COMMAND, S_UNKNOWN},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str13,	T_DEFAULT,	TF_COMMAND, S_BOOLEAN},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str14,		T_HELP,		TF_COMMAND},
+      {-1},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str16,		T_CONFIG,	TF_COMMAND},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str17,	T_DEFAULT,	TF_COMMAND, S_TRISTATE},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str18,		T_TYPE,		TF_COMMAND, S_HEX},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str19,	T_OPT_DEFCONFIG_LIST,TF_OPTION},
+      {-1}, {-1},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str22,		T_IF,		TF_COMMAND|TF_PARAM},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str23,		T_TYPE,		TF_COMMAND, S_INT},
+      {-1}, {-1}, {-1},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str27,	T_OPT_MODULES,	TF_OPTION},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str28,	T_TYPE,		TF_COMMAND, S_TRISTATE},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str29,		T_MENU,		TF_COMMAND},
+      {-1}, {-1},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str32,	T_COMMENT,	TF_COMMAND},
+      {-1}, {-1},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str35,	T_MENUCONFIG,	TF_COMMAND},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str36,		T_TYPE,		TF_COMMAND, S_STRING},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str37,	T_VISIBLE,	TF_COMMAND},
+      {-1}, {-1}, {-1},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str41,		T_PROMPT,	TF_COMMAND},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str42,	T_DEPENDS,	TF_COMMAND},
+      {-1},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str44,		T_TYPE,		TF_COMMAND, S_BOOLEAN},
+      {-1},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str46,		T_SELECT,	TF_COMMAND},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str47,	T_TYPE,		TF_COMMAND, S_BOOLEAN},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str48,	T_MAINMENU,	TF_COMMAND},
+      {-1}, {-1},
+      {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str51,		T_SOURCE,	TF_COMMAND}
+    };
+
+  if (len <= MAX_WORD_LENGTH && len >= MIN_WORD_LENGTH)
+    {
+      register int key = kconf_id_hash (str, len);
+
+      if (key <= MAX_HASH_VALUE && key >= 0)
+        {
+          register int o = wordlist[key].name;
+          if (o >= 0)
+            {
+              register const char *s = o + kconf_id_strings;
+
+              if (*str == *s && !strncmp (str + 1, s + 1, len - 1) && s[len] == '\0')
+                return &wordlist[key];
+            }
+        }
+    }
+  return 0;
+}
+
diff -uNra linux-3.0.82/scripts/kconfig/zconf.tab.c linux-3.0.82x/scripts/kconfig/zconf.tab.c
--- linux-3.0.82/scripts/kconfig/zconf.tab.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/scripts/kconfig/zconf.tab.c	2017-09-23 03:42:50.362674012 +0800
@@ -0,0 +1,2505 @@
+
+/* A Bison parser, made by GNU Bison 2.4.1.  */
+
+/* Skeleton implementation for Bison's Yacc-like parsers in C
+   
+      Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
+   Free Software Foundation, Inc.
+   
+   This program is free software: you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation, either version 3 of the License, or
+   (at your option) any later version.
+   
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+   
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+/* As a special exception, you may create a larger work that contains
+   part or all of the Bison parser skeleton and distribute that work
+   under terms of your choice, so long as that work isn't itself a
+   parser generator using the skeleton or a modified version thereof
+   as a parser skeleton.  Alternatively, if you modify or redistribute
+   the parser skeleton itself, you may (at your option) remove this
+   special exception, which will cause the skeleton and the resulting
+   Bison output files to be licensed under the GNU General Public
+   License without this special exception.
+   
+   This special exception was added by the Free Software Foundation in
+   version 2.2 of Bison.  */
+
+/* C LALR(1) parser skeleton written by Richard Stallman, by
+   simplifying the original so-called "semantic" parser.  */
+
+/* All symbols defined below should begin with yy or YY, to avoid
+   infringing on user name space.  This should be done even for local
+   variables, as they might otherwise be expanded by user macros.
+   There are some unavoidable exceptions within include files to
+   define necessary library symbols; they are noted "INFRINGES ON
+   USER NAME SPACE" below.  */
+
+/* Identify Bison output.  */
+#define YYBISON 1
+
+/* Bison version.  */
+#define YYBISON_VERSION "2.4.1"
+
+/* Skeleton name.  */
+#define YYSKELETON_NAME "yacc.c"
+
+/* Pure parsers.  */
+#define YYPURE 0
+
+/* Push parsers.  */
+#define YYPUSH 0
+
+/* Pull parsers.  */
+#define YYPULL 1
+
+/* Using locations.  */
+#define YYLSP_NEEDED 0
+
+/* Substitute the variable and function names.  */
+#define yyparse         zconfparse
+#define yylex           zconflex
+#define yyerror         zconferror
+#define yylval          zconflval
+#define yychar          zconfchar
+#define yydebug         zconfdebug
+#define yynerrs         zconfnerrs
+
+
+/* Copy the first part of user declarations.  */
+
+
+/*
+ * Copyright (C) 2002 Roman Zippel <zippel@linux-m68k.org>
+ * Released under the terms of the GNU GPL v2.0.
+ */
+
+#include <ctype.h>
+#include <stdarg.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdbool.h>
+
+#define LKC_DIRECT_LINK
+#include "lkc.h"
+
+#define printd(mask, fmt...) if (cdebug & (mask)) printf(fmt)
+
+#define PRINTD		0x0001
+#define DEBUG_PARSE	0x0002
+
+int cdebug = PRINTD;
+
+extern int zconflex(void);
+static void zconfprint(const char *err, ...);
+static void zconf_error(const char *err, ...);
+static void zconferror(const char *err);
+static bool zconf_endtoken(struct kconf_id *id, int starttoken, int endtoken);
+
+struct symbol *symbol_hash[SYMBOL_HASHSIZE];
+
+static struct menu *current_menu, *current_entry;
+
+#define YYDEBUG 0
+#if YYDEBUG
+#define YYERROR_VERBOSE
+#endif
+
+
+
+/* Enabling traces.  */
+#ifndef YYDEBUG
+# define YYDEBUG 0
+#endif
+
+/* Enabling verbose error messages.  */
+#ifdef YYERROR_VERBOSE
+# undef YYERROR_VERBOSE
+# define YYERROR_VERBOSE 1
+#else
+# define YYERROR_VERBOSE 0
+#endif
+
+/* Enabling the token table.  */
+#ifndef YYTOKEN_TABLE
+# define YYTOKEN_TABLE 0
+#endif
+
+
+/* Tokens.  */
+#ifndef YYTOKENTYPE
+# define YYTOKENTYPE
+   /* Put the tokens into the symbol table, so that GDB and other debuggers
+      know about them.  */
+   enum yytokentype {
+     T_MAINMENU = 258,
+     T_MENU = 259,
+     T_ENDMENU = 260,
+     T_SOURCE = 261,
+     T_CHOICE = 262,
+     T_ENDCHOICE = 263,
+     T_COMMENT = 264,
+     T_CONFIG = 265,
+     T_MENUCONFIG = 266,
+     T_HELP = 267,
+     T_HELPTEXT = 268,
+     T_IF = 269,
+     T_ENDIF = 270,
+     T_DEPENDS = 271,
+     T_OPTIONAL = 272,
+     T_PROMPT = 273,
+     T_TYPE = 274,
+     T_DEFAULT = 275,
+     T_SELECT = 276,
+     T_RANGE = 277,
+     T_VISIBLE = 278,
+     T_OPTION = 279,
+     T_ON = 280,
+     T_WORD = 281,
+     T_WORD_QUOTE = 282,
+     T_UNEQUAL = 283,
+     T_CLOSE_PAREN = 284,
+     T_OPEN_PAREN = 285,
+     T_EOL = 286,
+     T_OR = 287,
+     T_AND = 288,
+     T_EQUAL = 289,
+     T_NOT = 290
+   };
+#endif
+
+
+
+#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
+typedef union YYSTYPE
+{
+
+
+	char *string;
+	struct file *file;
+	struct symbol *symbol;
+	struct expr *expr;
+	struct menu *menu;
+	struct kconf_id *id;
+
+
+
+} YYSTYPE;
+# define YYSTYPE_IS_TRIVIAL 1
+# define yystype YYSTYPE /* obsolescent; will be withdrawn */
+# define YYSTYPE_IS_DECLARED 1
+#endif
+
+
+/* Copy the second part of user declarations.  */
+
+
+/* Include zconf.hash.c here so it can see the token constants. */
+#include "zconf.hash.c"
+
+
+
+#ifdef short
+# undef short
+#endif
+
+#ifdef YYTYPE_UINT8
+typedef YYTYPE_UINT8 yytype_uint8;
+#else
+typedef unsigned char yytype_uint8;
+#endif
+
+#ifdef YYTYPE_INT8
+typedef YYTYPE_INT8 yytype_int8;
+#elif (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+typedef signed char yytype_int8;
+#else
+typedef short int yytype_int8;
+#endif
+
+#ifdef YYTYPE_UINT16
+typedef YYTYPE_UINT16 yytype_uint16;
+#else
+typedef unsigned short int yytype_uint16;
+#endif
+
+#ifdef YYTYPE_INT16
+typedef YYTYPE_INT16 yytype_int16;
+#else
+typedef short int yytype_int16;
+#endif
+
+#ifndef YYSIZE_T
+# ifdef __SIZE_TYPE__
+#  define YYSIZE_T __SIZE_TYPE__
+# elif defined size_t
+#  define YYSIZE_T size_t
+# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+#  include <stddef.h> /* INFRINGES ON USER NAME SPACE */
+#  define YYSIZE_T size_t
+# else
+#  define YYSIZE_T unsigned int
+# endif
+#endif
+
+#define YYSIZE_MAXIMUM ((YYSIZE_T) -1)
+
+#ifndef YY_
+# if YYENABLE_NLS
+#  if ENABLE_NLS
+#   include <libintl.h> /* INFRINGES ON USER NAME SPACE */
+#   define YY_(msgid) dgettext ("bison-runtime", msgid)
+#  endif
+# endif
+# ifndef YY_
+#  define YY_(msgid) msgid
+# endif
+#endif
+
+/* Suppress unused-variable warnings by "using" E.  */
+#if ! defined lint || defined __GNUC__
+# define YYUSE(e) ((void) (e))
+#else
+# define YYUSE(e) /* empty */
+#endif
+
+/* Identity function, used to suppress warnings about constant conditions.  */
+#ifndef lint
+# define YYID(n) (n)
+#else
+#if (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+static int
+YYID (int yyi)
+#else
+static int
+YYID (yyi)
+    int yyi;
+#endif
+{
+  return yyi;
+}
+#endif
+
+#if ! defined yyoverflow || YYERROR_VERBOSE
+
+/* The parser invokes alloca or malloc; define the necessary symbols.  */
+
+# ifdef YYSTACK_USE_ALLOCA
+#  if YYSTACK_USE_ALLOCA
+#   ifdef __GNUC__
+#    define YYSTACK_ALLOC __builtin_alloca
+#   elif defined __BUILTIN_VA_ARG_INCR
+#    include <alloca.h> /* INFRINGES ON USER NAME SPACE */
+#   elif defined _AIX
+#    define YYSTACK_ALLOC __alloca
+#   elif defined _MSC_VER
+#    include <malloc.h> /* INFRINGES ON USER NAME SPACE */
+#    define alloca _alloca
+#   else
+#    define YYSTACK_ALLOC alloca
+#    if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+#     include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
+#     ifndef _STDLIB_H
+#      define _STDLIB_H 1
+#     endif
+#    endif
+#   endif
+#  endif
+# endif
+
+# ifdef YYSTACK_ALLOC
+   /* Pacify GCC's `empty if-body' warning.  */
+#  define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0))
+#  ifndef YYSTACK_ALLOC_MAXIMUM
+    /* The OS might guarantee only one guard page at the bottom of the stack,
+       and a page size can be as small as 4096 bytes.  So we cannot safely
+       invoke alloca (N) if N exceeds 4096.  Use a slightly smaller number
+       to allow for a few compiler-allocated temporary stack slots.  */
+#   define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */
+#  endif
+# else
+#  define YYSTACK_ALLOC YYMALLOC
+#  define YYSTACK_FREE YYFREE
+#  ifndef YYSTACK_ALLOC_MAXIMUM
+#   define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM
+#  endif
+#  if (defined __cplusplus && ! defined _STDLIB_H \
+       && ! ((defined YYMALLOC || defined malloc) \
+	     && (defined YYFREE || defined free)))
+#   include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
+#   ifndef _STDLIB_H
+#    define _STDLIB_H 1
+#   endif
+#  endif
+#  ifndef YYMALLOC
+#   define YYMALLOC malloc
+#   if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */
+#   endif
+#  endif
+#  ifndef YYFREE
+#   define YYFREE free
+#   if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+void free (void *); /* INFRINGES ON USER NAME SPACE */
+#   endif
+#  endif
+# endif
+#endif /* ! defined yyoverflow || YYERROR_VERBOSE */
+
+
+#if (! defined yyoverflow \
+     && (! defined __cplusplus \
+	 || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL)))
+
+/* A type that is properly aligned for any stack member.  */
+union yyalloc
+{
+  yytype_int16 yyss_alloc;
+  YYSTYPE yyvs_alloc;
+};
+
+/* The size of the maximum gap between one aligned stack and the next.  */
+# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1)
+
+/* The size of an array large to enough to hold all stacks, each with
+   N elements.  */
+# define YYSTACK_BYTES(N) \
+     ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \
+      + YYSTACK_GAP_MAXIMUM)
+
+/* Copy COUNT objects from FROM to TO.  The source and destination do
+   not overlap.  */
+# ifndef YYCOPY
+#  if defined __GNUC__ && 1 < __GNUC__
+#   define YYCOPY(To, From, Count) \
+      __builtin_memcpy (To, From, (Count) * sizeof (*(From)))
+#  else
+#   define YYCOPY(To, From, Count)		\
+      do					\
+	{					\
+	  YYSIZE_T yyi;				\
+	  for (yyi = 0; yyi < (Count); yyi++)	\
+	    (To)[yyi] = (From)[yyi];		\
+	}					\
+      while (YYID (0))
+#  endif
+# endif
+
+/* Relocate STACK from its old location to the new one.  The
+   local variables YYSIZE and YYSTACKSIZE give the old and new number of
+   elements in the stack, and YYPTR gives the new location of the
+   stack.  Advance YYPTR to a properly aligned location for the next
+   stack.  */
+# define YYSTACK_RELOCATE(Stack_alloc, Stack)				\
+    do									\
+      {									\
+	YYSIZE_T yynewbytes;						\
+	YYCOPY (&yyptr->Stack_alloc, Stack, yysize);			\
+	Stack = &yyptr->Stack_alloc;					\
+	yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \
+	yyptr += yynewbytes / sizeof (*yyptr);				\
+      }									\
+    while (YYID (0))
+
+#endif
+
+/* YYFINAL -- State number of the termination state.  */
+#define YYFINAL  11
+/* YYLAST -- Last index in YYTABLE.  */
+#define YYLAST   290
+
+/* YYNTOKENS -- Number of terminals.  */
+#define YYNTOKENS  36
+/* YYNNTS -- Number of nonterminals.  */
+#define YYNNTS  50
+/* YYNRULES -- Number of rules.  */
+#define YYNRULES  118
+/* YYNRULES -- Number of states.  */
+#define YYNSTATES  191
+
+/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX.  */
+#define YYUNDEFTOK  2
+#define YYMAXUTOK   290
+
+#define YYTRANSLATE(YYX)						\
+  ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK)
+
+/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX.  */
+static const yytype_uint8 yytranslate[] =
+{
+       0,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     1,     2,     3,     4,
+       5,     6,     7,     8,     9,    10,    11,    12,    13,    14,
+      15,    16,    17,    18,    19,    20,    21,    22,    23,    24,
+      25,    26,    27,    28,    29,    30,    31,    32,    33,    34,
+      35
+};
+
+#if YYDEBUG
+/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in
+   YYRHS.  */
+static const yytype_uint16 yyprhs[] =
+{
+       0,     0,     3,     6,     8,    11,    13,    14,    17,    20,
+      23,    26,    31,    36,    40,    42,    44,    46,    48,    50,
+      52,    54,    56,    58,    60,    62,    64,    66,    68,    72,
+      75,    79,    82,    86,    89,    90,    93,    96,    99,   102,
+     105,   108,   112,   117,   122,   127,   133,   137,   138,   142,
+     143,   146,   150,   153,   155,   159,   160,   163,   166,   169,
+     172,   175,   180,   184,   187,   192,   193,   196,   200,   202,
+     206,   207,   210,   213,   216,   220,   224,   228,   230,   234,
+     235,   238,   241,   244,   248,   252,   255,   258,   261,   262,
+     265,   268,   271,   276,   277,   280,   283,   286,   287,   290,
+     292,   294,   297,   300,   303,   305,   308,   309,   312,   314,
+     318,   322,   326,   329,   333,   337,   339,   341,   342
+};
+
+/* YYRHS -- A `-1'-separated list of the rules' RHS.  */
+static const yytype_int8 yyrhs[] =
+{
+      37,     0,    -1,    81,    38,    -1,    38,    -1,    63,    39,
+      -1,    39,    -1,    -1,    39,    41,    -1,    39,    55,    -1,
+      39,    67,    -1,    39,    80,    -1,    39,    26,     1,    31,
+      -1,    39,    40,     1,    31,    -1,    39,     1,    31,    -1,
+      16,    -1,    18,    -1,    19,    -1,    21,    -1,    17,    -1,
+      22,    -1,    20,    -1,    23,    -1,    31,    -1,    61,    -1,
+      71,    -1,    44,    -1,    46,    -1,    69,    -1,    26,     1,
+      31,    -1,     1,    31,    -1,    10,    26,    31,    -1,    43,
+      47,    -1,    11,    26,    31,    -1,    45,    47,    -1,    -1,
+      47,    48,    -1,    47,    49,    -1,    47,    75,    -1,    47,
+      73,    -1,    47,    42,    -1,    47,    31,    -1,    19,    78,
+      31,    -1,    18,    79,    82,    31,    -1,    20,    83,    82,
+      31,    -1,    21,    26,    82,    31,    -1,    22,    84,    84,
+      82,    31,    -1,    24,    50,    31,    -1,    -1,    50,    26,
+      51,    -1,    -1,    34,    79,    -1,     7,    85,    31,    -1,
+      52,    56,    -1,    80,    -1,    53,    58,    54,    -1,    -1,
+      56,    57,    -1,    56,    75,    -1,    56,    73,    -1,    56,
+      31,    -1,    56,    42,    -1,    18,    79,    82,    31,    -1,
+      19,    78,    31,    -1,    17,    31,    -1,    20,    26,    82,
+      31,    -1,    -1,    58,    41,    -1,    14,    83,    81,    -1,
+      80,    -1,    59,    62,    60,    -1,    -1,    62,    41,    -1,
+      62,    67,    -1,    62,    55,    -1,     3,    79,    81,    -1,
+       4,    79,    31,    -1,    64,    76,    74,    -1,    80,    -1,
+      65,    68,    66,    -1,    -1,    68,    41,    -1,    68,    67,
+      -1,    68,    55,    -1,     6,    79,    31,    -1,     9,    79,
+      31,    -1,    70,    74,    -1,    12,    31,    -1,    72,    13,
+      -1,    -1,    74,    75,    -1,    74,    31,    -1,    74,    42,
+      -1,    16,    25,    83,    31,    -1,    -1,    76,    77,    -1,
+      76,    31,    -1,    23,    82,    -1,    -1,    79,    82,    -1,
+      26,    -1,    27,    -1,     5,    31,    -1,     8,    31,    -1,
+      15,    31,    -1,    31,    -1,    81,    31,    -1,    -1,    14,
+      83,    -1,    84,    -1,    84,    34,    84,    -1,    84,    28,
+      84,    -1,    30,    83,    29,    -1,    35,    83,    -1,    83,
+      32,    83,    -1,    83,    33,    83,    -1,    26,    -1,    27,
+      -1,    -1,    26,    -1
+};
+
+/* YYRLINE[YYN] -- source line where rule number YYN was defined.  */
+static const yytype_uint16 yyrline[] =
+{
+       0,   108,   108,   108,   110,   110,   112,   114,   115,   116,
+     117,   118,   119,   123,   127,   127,   127,   127,   127,   127,
+     127,   127,   131,   132,   133,   134,   135,   136,   140,   141,
+     147,   155,   161,   169,   179,   181,   182,   183,   184,   185,
+     186,   189,   197,   203,   213,   219,   225,   228,   230,   241,
+     242,   247,   256,   261,   269,   272,   274,   275,   276,   277,
+     278,   281,   287,   298,   304,   314,   316,   321,   329,   337,
+     340,   342,   343,   344,   349,   356,   363,   368,   376,   379,
+     381,   382,   383,   386,   394,   401,   408,   414,   421,   423,
+     424,   425,   428,   436,   438,   439,   442,   449,   451,   456,
+     457,   460,   461,   462,   466,   467,   470,   471,   474,   475,
+     476,   477,   478,   479,   480,   483,   484,   487,   488
+};
+#endif
+
+#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE
+/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM.
+   First, the terminals, then, starting at YYNTOKENS, nonterminals.  */
+static const char *const yytname[] =
+{
+  "$end", "error", "$undefined", "T_MAINMENU", "T_MENU", "T_ENDMENU",
+  "T_SOURCE", "T_CHOICE", "T_ENDCHOICE", "T_COMMENT", "T_CONFIG",
+  "T_MENUCONFIG", "T_HELP", "T_HELPTEXT", "T_IF", "T_ENDIF", "T_DEPENDS",
+  "T_OPTIONAL", "T_PROMPT", "T_TYPE", "T_DEFAULT", "T_SELECT", "T_RANGE",
+  "T_VISIBLE", "T_OPTION", "T_ON", "T_WORD", "T_WORD_QUOTE", "T_UNEQUAL",
+  "T_CLOSE_PAREN", "T_OPEN_PAREN", "T_EOL", "T_OR", "T_AND", "T_EQUAL",
+  "T_NOT", "$accept", "input", "start", "stmt_list", "option_name",
+  "common_stmt", "option_error", "config_entry_start", "config_stmt",
+  "menuconfig_entry_start", "menuconfig_stmt", "config_option_list",
+  "config_option", "symbol_option", "symbol_option_list",
+  "symbol_option_arg", "choice", "choice_entry", "choice_end",
+  "choice_stmt", "choice_option_list", "choice_option", "choice_block",
+  "if_entry", "if_end", "if_stmt", "if_block", "mainmenu_stmt", "menu",
+  "menu_entry", "menu_end", "menu_stmt", "menu_block", "source_stmt",
+  "comment", "comment_stmt", "help_start", "help", "depends_list",
+  "depends", "visibility_list", "visible", "prompt_stmt_opt", "prompt",
+  "end", "nl", "if_expr", "expr", "symbol", "word_opt", 0
+};
+#endif
+
+# ifdef YYPRINT
+/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to
+   token YYLEX-NUM.  */
+static const yytype_uint16 yytoknum[] =
+{
+       0,   256,   257,   258,   259,   260,   261,   262,   263,   264,
+     265,   266,   267,   268,   269,   270,   271,   272,   273,   274,
+     275,   276,   277,   278,   279,   280,   281,   282,   283,   284,
+     285,   286,   287,   288,   289,   290
+};
+# endif
+
+/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives.  */
+static const yytype_uint8 yyr1[] =
+{
+       0,    36,    37,    37,    38,    38,    39,    39,    39,    39,
+      39,    39,    39,    39,    40,    40,    40,    40,    40,    40,
+      40,    40,    41,    41,    41,    41,    41,    41,    42,    42,
+      43,    44,    45,    46,    47,    47,    47,    47,    47,    47,
+      47,    48,    48,    48,    48,    48,    49,    50,    50,    51,
+      51,    52,    53,    54,    55,    56,    56,    56,    56,    56,
+      56,    57,    57,    57,    57,    58,    58,    59,    60,    61,
+      62,    62,    62,    62,    63,    64,    65,    66,    67,    68,
+      68,    68,    68,    69,    70,    71,    72,    73,    74,    74,
+      74,    74,    75,    76,    76,    76,    77,    78,    78,    79,
+      79,    80,    80,    80,    81,    81,    82,    82,    83,    83,
+      83,    83,    83,    83,    83,    84,    84,    85,    85
+};
+
+/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN.  */
+static const yytype_uint8 yyr2[] =
+{
+       0,     2,     2,     1,     2,     1,     0,     2,     2,     2,
+       2,     4,     4,     3,     1,     1,     1,     1,     1,     1,
+       1,     1,     1,     1,     1,     1,     1,     1,     3,     2,
+       3,     2,     3,     2,     0,     2,     2,     2,     2,     2,
+       2,     3,     4,     4,     4,     5,     3,     0,     3,     0,
+       2,     3,     2,     1,     3,     0,     2,     2,     2,     2,
+       2,     4,     3,     2,     4,     0,     2,     3,     1,     3,
+       0,     2,     2,     2,     3,     3,     3,     1,     3,     0,
+       2,     2,     2,     3,     3,     2,     2,     2,     0,     2,
+       2,     2,     4,     0,     2,     2,     2,     0,     2,     1,
+       1,     2,     2,     2,     1,     2,     0,     2,     1,     3,
+       3,     3,     2,     3,     3,     1,     1,     0,     1
+};
+
+/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state
+   STATE-NUM when YYTABLE doesn't specify something else to do.  Zero
+   means the default is an error.  */
+static const yytype_uint8 yydefact[] =
+{
+       6,     0,   104,     0,     3,     0,     6,     6,    99,   100,
+       0,     1,     0,     0,     0,     0,   117,     0,     0,     0,
+       0,     0,     0,    14,    18,    15,    16,    20,    17,    19,
+      21,     0,    22,     0,     7,    34,    25,    34,    26,    55,
+      65,     8,    70,    23,    93,    79,     9,    27,    88,    24,
+      10,     0,   105,     2,    74,    13,     0,   101,     0,   118,
+       0,   102,     0,     0,     0,   115,   116,     0,     0,     0,
+     108,   103,     0,     0,     0,     0,     0,     0,     0,    88,
+       0,     0,    75,    83,    51,    84,    30,    32,     0,   112,
+       0,     0,    67,     0,     0,    11,    12,     0,     0,     0,
+       0,    97,     0,     0,     0,    47,     0,    40,    39,    35,
+      36,     0,    38,    37,     0,     0,    97,     0,    59,    60,
+      56,    58,    57,    66,    54,    53,    71,    73,    69,    72,
+      68,   106,    95,     0,    94,    80,    82,    78,    81,    77,
+      90,    91,    89,   111,   113,   114,   110,   109,    29,    86,
+       0,   106,     0,   106,   106,   106,     0,     0,     0,    87,
+      63,   106,     0,   106,     0,    96,     0,     0,    41,    98,
+       0,     0,   106,    49,    46,    28,     0,    62,     0,   107,
+      92,    42,    43,    44,     0,     0,    48,    61,    64,    45,
+      50
+};
+
+/* YYDEFGOTO[NTERM-NUM].  */
+static const yytype_int16 yydefgoto[] =
+{
+      -1,     3,     4,     5,    33,    34,   108,    35,    36,    37,
+      38,    74,   109,   110,   157,   186,    39,    40,   124,    41,
+      76,   120,    77,    42,   128,    43,    78,     6,    44,    45,
+     137,    46,    80,    47,    48,    49,   111,   112,    81,   113,
+      79,   134,   152,   153,    50,     7,   165,    69,    70,    60
+};
+
+/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing
+   STATE-NUM.  */
+#define YYPACT_NINF -90
+static const yytype_int16 yypact[] =
+{
+       4,    42,   -90,    96,   -90,   111,   -90,    15,   -90,   -90,
+      75,   -90,    82,    42,   104,    42,   110,   107,    42,   115,
+     125,    -4,   121,   -90,   -90,   -90,   -90,   -90,   -90,   -90,
+     -90,   162,   -90,   163,   -90,   -90,   -90,   -90,   -90,   -90,
+     -90,   -90,   -90,   -90,   -90,   -90,   -90,   -90,   -90,   -90,
+     -90,   139,   -90,   -90,   138,   -90,   142,   -90,   143,   -90,
+     152,   -90,   164,   167,   168,   -90,   -90,    -4,    -4,    77,
+     -18,   -90,   177,   185,    33,    71,   195,   247,   236,    -2,
+     236,   171,   -90,   -90,   -90,   -90,   -90,   -90,    41,   -90,
+      -4,    -4,   138,    97,    97,   -90,   -90,   186,   187,   194,
+      42,    42,    -4,   196,    97,   -90,   219,   -90,   -90,   -90,
+     -90,   210,   -90,   -90,   204,    42,    42,   199,   -90,   -90,
+     -90,   -90,   -90,   -90,   -90,   -90,   -90,   -90,   -90,   -90,
+     -90,   222,   -90,   223,   -90,   -90,   -90,   -90,   -90,   -90,
+     -90,   -90,   -90,   -90,   215,   -90,   -90,   -90,   -90,   -90,
+      -4,   222,   228,   222,    -5,   222,    97,    35,   229,   -90,
+     -90,   222,   232,   222,    -4,   -90,   135,   233,   -90,   -90,
+     234,   235,   222,   240,   -90,   -90,   237,   -90,   239,   -13,
+     -90,   -90,   -90,   -90,   244,    42,   -90,   -90,   -90,   -90,
+     -90
+};
+
+/* YYPGOTO[NTERM-NUM].  */
+static const yytype_int16 yypgoto[] =
+{
+     -90,   -90,   269,   271,   -90,    23,   -70,   -90,   -90,   -90,
+     -90,   243,   -90,   -90,   -90,   -90,   -90,   -90,   -90,   -48,
+     -90,   -90,   -90,   -90,   -90,   -90,   -90,   -90,   -90,   -90,
+     -90,   -20,   -90,   -90,   -90,   -90,   -90,   206,   205,   -68,
+     -90,   -90,   169,    -1,    27,    -7,   118,   -66,   -89,   -90
+};
+
+/* YYTABLE[YYPACT[STATE-NUM]].  What to do in state STATE-NUM.  If
+   positive, shift that token.  If negative, reduce the rule which
+   number is the opposite.  If zero, do what YYDEFACT says.
+   If YYTABLE_NINF, syntax error.  */
+#define YYTABLE_NINF -86
+static const yytype_int16 yytable[] =
+{
+      10,    88,    89,    54,   146,   147,   119,     1,   122,   164,
+      93,   141,    56,   142,    58,   156,    94,    62,     1,    90,
+      91,   131,    65,    66,   144,   145,    67,    90,    91,   132,
+     127,    68,   136,   -31,    97,     2,   154,   -31,   -31,   -31,
+     -31,   -31,   -31,   -31,   -31,    98,    52,   -31,   -31,    99,
+     -31,   100,   101,   102,   103,   104,   -31,   105,   129,   106,
+     138,   173,    92,   141,   107,   142,   174,   172,     8,     9,
+     143,   -33,    97,    90,    91,   -33,   -33,   -33,   -33,   -33,
+     -33,   -33,   -33,    98,   166,   -33,   -33,    99,   -33,   100,
+     101,   102,   103,   104,   -33,   105,    11,   106,   179,   151,
+     123,   126,   107,   135,   125,   130,     2,   139,     2,    90,
+      91,    -5,    12,    55,   161,    13,    14,    15,    16,    17,
+      18,    19,    20,    65,    66,    21,    22,    23,    24,    25,
+      26,    27,    28,    29,    30,    57,    59,    31,    61,    -4,
+      12,    63,    32,    13,    14,    15,    16,    17,    18,    19,
+      20,    64,    71,    21,    22,    23,    24,    25,    26,    27,
+      28,    29,    30,    72,    73,    31,   180,    90,    91,    52,
+      32,   -85,    97,    82,    83,   -85,   -85,   -85,   -85,   -85,
+     -85,   -85,   -85,    84,   190,   -85,   -85,    99,   -85,   -85,
+     -85,   -85,   -85,   -85,   -85,    85,    97,   106,    86,    87,
+     -52,   -52,   140,   -52,   -52,   -52,   -52,    98,    95,   -52,
+     -52,    99,   114,   115,   116,   117,    96,   148,   149,   150,
+     158,   106,   155,   159,    97,   163,   118,   -76,   -76,   -76,
+     -76,   -76,   -76,   -76,   -76,   160,   164,   -76,   -76,    99,
+      13,    14,    15,    16,    17,    18,    19,    20,    91,   106,
+      21,    22,    14,    15,   140,    17,    18,    19,    20,   168,
+     175,    21,    22,   177,   181,   182,   183,    32,   187,   167,
+     188,   169,   170,   171,   185,   189,    53,    51,    32,   176,
+      75,   178,   121,     0,   133,   162,     0,     0,     0,     0,
+     184
+};
+
+static const yytype_int16 yycheck[] =
+{
+       1,    67,    68,    10,    93,    94,    76,     3,    76,    14,
+      28,    81,    13,    81,    15,   104,    34,    18,     3,    32,
+      33,    23,    26,    27,    90,    91,    30,    32,    33,    31,
+      78,    35,    80,     0,     1,    31,   102,     4,     5,     6,
+       7,     8,     9,    10,    11,    12,    31,    14,    15,    16,
+      17,    18,    19,    20,    21,    22,    23,    24,    78,    26,
+      80,    26,    69,   133,    31,   133,    31,   156,    26,    27,
+      29,     0,     1,    32,    33,     4,     5,     6,     7,     8,
+       9,    10,    11,    12,   150,    14,    15,    16,    17,    18,
+      19,    20,    21,    22,    23,    24,     0,    26,   164,   100,
+      77,    78,    31,    80,    77,    78,    31,    80,    31,    32,
+      33,     0,     1,    31,   115,     4,     5,     6,     7,     8,
+       9,    10,    11,    26,    27,    14,    15,    16,    17,    18,
+      19,    20,    21,    22,    23,    31,    26,    26,    31,     0,
+       1,    26,    31,     4,     5,     6,     7,     8,     9,    10,
+      11,    26,    31,    14,    15,    16,    17,    18,    19,    20,
+      21,    22,    23,     1,     1,    26,    31,    32,    33,    31,
+      31,     0,     1,    31,    31,     4,     5,     6,     7,     8,
+       9,    10,    11,    31,   185,    14,    15,    16,    17,    18,
+      19,    20,    21,    22,    23,    31,     1,    26,    31,    31,
+       5,     6,    31,     8,     9,    10,    11,    12,    31,    14,
+      15,    16,    17,    18,    19,    20,    31,    31,    31,    25,
+       1,    26,    26,    13,     1,    26,    31,     4,     5,     6,
+       7,     8,     9,    10,    11,    31,    14,    14,    15,    16,
+       4,     5,     6,     7,     8,     9,    10,    11,    33,    26,
+      14,    15,     5,     6,    31,     8,     9,    10,    11,    31,
+      31,    14,    15,    31,    31,    31,    31,    31,    31,   151,
+      31,   153,   154,   155,    34,    31,     7,     6,    31,   161,
+      37,   163,    76,    -1,    79,   116,    -1,    -1,    -1,    -1,
+     172
+};
+
+/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing
+   symbol of state STATE-NUM.  */
+static const yytype_uint8 yystos[] =
+{
+       0,     3,    31,    37,    38,    39,    63,    81,    26,    27,
+      79,     0,     1,     4,     5,     6,     7,     8,     9,    10,
+      11,    14,    15,    16,    17,    18,    19,    20,    21,    22,
+      23,    26,    31,    40,    41,    43,    44,    45,    46,    52,
+      53,    55,    59,    61,    64,    65,    67,    69,    70,    71,
+      80,    39,    31,    38,    81,    31,    79,    31,    79,    26,
+      85,    31,    79,    26,    26,    26,    27,    30,    35,    83,
+      84,    31,     1,     1,    47,    47,    56,    58,    62,    76,
+      68,    74,    31,    31,    31,    31,    31,    31,    83,    83,
+      32,    33,    81,    28,    34,    31,    31,     1,    12,    16,
+      18,    19,    20,    21,    22,    24,    26,    31,    42,    48,
+      49,    72,    73,    75,    17,    18,    19,    20,    31,    42,
+      57,    73,    75,    41,    54,    80,    41,    55,    60,    67,
+      80,    23,    31,    74,    77,    41,    55,    66,    67,    80,
+      31,    42,    75,    29,    83,    83,    84,    84,    31,    31,
+      25,    79,    78,    79,    83,    26,    84,    50,     1,    13,
+      31,    79,    78,    26,    14,    82,    83,    82,    31,    82,
+      82,    82,    84,    26,    31,    31,    82,    31,    82,    83,
+      31,    31,    31,    31,    82,    34,    51,    31,    31,    31,
+      79
+};
+
+#define yyerrok		(yyerrstatus = 0)
+#define yyclearin	(yychar = YYEMPTY)
+#define YYEMPTY		(-2)
+#define YYEOF		0
+
+#define YYACCEPT	goto yyacceptlab
+#define YYABORT		goto yyabortlab
+#define YYERROR		goto yyerrorlab
+
+
+/* Like YYERROR except do call yyerror.  This remains here temporarily
+   to ease the transition to the new meaning of YYERROR, for GCC.
+   Once GCC version 2 has supplanted version 1, this can go.  */
+
+#define YYFAIL		goto yyerrlab
+
+#define YYRECOVERING()  (!!yyerrstatus)
+
+#define YYBACKUP(Token, Value)					\
+do								\
+  if (yychar == YYEMPTY && yylen == 1)				\
+    {								\
+      yychar = (Token);						\
+      yylval = (Value);						\
+      yytoken = YYTRANSLATE (yychar);				\
+      YYPOPSTACK (1);						\
+      goto yybackup;						\
+    }								\
+  else								\
+    {								\
+      yyerror (YY_("syntax error: cannot back up")); \
+      YYERROR;							\
+    }								\
+while (YYID (0))
+
+
+#define YYTERROR	1
+#define YYERRCODE	256
+
+
+/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N].
+   If N is 0, then set CURRENT to the empty location which ends
+   the previous symbol: RHS[0] (always defined).  */
+
+#define YYRHSLOC(Rhs, K) ((Rhs)[K])
+#ifndef YYLLOC_DEFAULT
+# define YYLLOC_DEFAULT(Current, Rhs, N)				\
+    do									\
+      if (YYID (N))                                                    \
+	{								\
+	  (Current).first_line   = YYRHSLOC (Rhs, 1).first_line;	\
+	  (Current).first_column = YYRHSLOC (Rhs, 1).first_column;	\
+	  (Current).last_line    = YYRHSLOC (Rhs, N).last_line;		\
+	  (Current).last_column  = YYRHSLOC (Rhs, N).last_column;	\
+	}								\
+      else								\
+	{								\
+	  (Current).first_line   = (Current).last_line   =		\
+	    YYRHSLOC (Rhs, 0).last_line;				\
+	  (Current).first_column = (Current).last_column =		\
+	    YYRHSLOC (Rhs, 0).last_column;				\
+	}								\
+    while (YYID (0))
+#endif
+
+
+/* YY_LOCATION_PRINT -- Print the location on the stream.
+   This macro was not mandated originally: define only if we know
+   we won't break user code: when these are the locations we know.  */
+
+#ifndef YY_LOCATION_PRINT
+# if YYLTYPE_IS_TRIVIAL
+#  define YY_LOCATION_PRINT(File, Loc)			\
+     fprintf (File, "%d.%d-%d.%d",			\
+	      (Loc).first_line, (Loc).first_column,	\
+	      (Loc).last_line,  (Loc).last_column)
+# else
+#  define YY_LOCATION_PRINT(File, Loc) ((void) 0)
+# endif
+#endif
+
+
+/* YYLEX -- calling `yylex' with the right arguments.  */
+
+#ifdef YYLEX_PARAM
+# define YYLEX yylex (YYLEX_PARAM)
+#else
+# define YYLEX yylex ()
+#endif
+
+/* Enable debugging if requested.  */
+#if YYDEBUG
+
+# ifndef YYFPRINTF
+#  include <stdio.h> /* INFRINGES ON USER NAME SPACE */
+#  define YYFPRINTF fprintf
+# endif
+
+# define YYDPRINTF(Args)			\
+do {						\
+  if (yydebug)					\
+    YYFPRINTF Args;				\
+} while (YYID (0))
+
+# define YY_SYMBOL_PRINT(Title, Type, Value, Location)			  \
+do {									  \
+  if (yydebug)								  \
+    {									  \
+      YYFPRINTF (stderr, "%s ", Title);					  \
+      yy_symbol_print (stderr,						  \
+		  Type, Value); \
+      YYFPRINTF (stderr, "\n");						  \
+    }									  \
+} while (YYID (0))
+
+
+/*--------------------------------.
+| Print this symbol on YYOUTPUT.  |
+`--------------------------------*/
+
+/*ARGSUSED*/
+#if (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+static void
+yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
+#else
+static void
+yy_symbol_value_print (yyoutput, yytype, yyvaluep)
+    FILE *yyoutput;
+    int yytype;
+    YYSTYPE const * const yyvaluep;
+#endif
+{
+  if (!yyvaluep)
+    return;
+# ifdef YYPRINT
+  if (yytype < YYNTOKENS)
+    YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep);
+# else
+  YYUSE (yyoutput);
+# endif
+  switch (yytype)
+    {
+      default:
+	break;
+    }
+}
+
+
+/*--------------------------------.
+| Print this symbol on YYOUTPUT.  |
+`--------------------------------*/
+
+#if (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+static void
+yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
+#else
+static void
+yy_symbol_print (yyoutput, yytype, yyvaluep)
+    FILE *yyoutput;
+    int yytype;
+    YYSTYPE const * const yyvaluep;
+#endif
+{
+  if (yytype < YYNTOKENS)
+    YYFPRINTF (yyoutput, "token %s (", yytname[yytype]);
+  else
+    YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]);
+
+  yy_symbol_value_print (yyoutput, yytype, yyvaluep);
+  YYFPRINTF (yyoutput, ")");
+}
+
+/*------------------------------------------------------------------.
+| yy_stack_print -- Print the state stack from its BOTTOM up to its |
+| TOP (included).                                                   |
+`------------------------------------------------------------------*/
+
+#if (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+static void
+yy_stack_print (yytype_int16 *yybottom, yytype_int16 *yytop)
+#else
+static void
+yy_stack_print (yybottom, yytop)
+    yytype_int16 *yybottom;
+    yytype_int16 *yytop;
+#endif
+{
+  YYFPRINTF (stderr, "Stack now");
+  for (; yybottom <= yytop; yybottom++)
+    {
+      int yybot = *yybottom;
+      YYFPRINTF (stderr, " %d", yybot);
+    }
+  YYFPRINTF (stderr, "\n");
+}
+
+# define YY_STACK_PRINT(Bottom, Top)				\
+do {								\
+  if (yydebug)							\
+    yy_stack_print ((Bottom), (Top));				\
+} while (YYID (0))
+
+
+/*------------------------------------------------.
+| Report that the YYRULE is going to be reduced.  |
+`------------------------------------------------*/
+
+#if (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+static void
+yy_reduce_print (YYSTYPE *yyvsp, int yyrule)
+#else
+static void
+yy_reduce_print (yyvsp, yyrule)
+    YYSTYPE *yyvsp;
+    int yyrule;
+#endif
+{
+  int yynrhs = yyr2[yyrule];
+  int yyi;
+  unsigned long int yylno = yyrline[yyrule];
+  YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n",
+	     yyrule - 1, yylno);
+  /* The symbols being reduced.  */
+  for (yyi = 0; yyi < yynrhs; yyi++)
+    {
+      YYFPRINTF (stderr, "   $%d = ", yyi + 1);
+      yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi],
+		       &(yyvsp[(yyi + 1) - (yynrhs)])
+		       		       );
+      YYFPRINTF (stderr, "\n");
+    }
+}
+
+# define YY_REDUCE_PRINT(Rule)		\
+do {					\
+  if (yydebug)				\
+    yy_reduce_print (yyvsp, Rule); \
+} while (YYID (0))
+
+/* Nonzero means print parse trace.  It is left uninitialized so that
+   multiple parsers can coexist.  */
+int yydebug;
+#else /* !YYDEBUG */
+# define YYDPRINTF(Args)
+# define YY_SYMBOL_PRINT(Title, Type, Value, Location)
+# define YY_STACK_PRINT(Bottom, Top)
+# define YY_REDUCE_PRINT(Rule)
+#endif /* !YYDEBUG */
+
+
+/* YYINITDEPTH -- initial size of the parser's stacks.  */
+#ifndef	YYINITDEPTH
+# define YYINITDEPTH 200
+#endif
+
+/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only
+   if the built-in stack extension method is used).
+
+   Do not make this value too large; the results are undefined if
+   YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH)
+   evaluated with infinite-precision integer arithmetic.  */
+
+#ifndef YYMAXDEPTH
+# define YYMAXDEPTH 10000
+#endif
+
+
+
+#if YYERROR_VERBOSE
+
+# ifndef yystrlen
+#  if defined __GLIBC__ && defined _STRING_H
+#   define yystrlen strlen
+#  else
+/* Return the length of YYSTR.  */
+#if (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+static YYSIZE_T
+yystrlen (const char *yystr)
+#else
+static YYSIZE_T
+yystrlen (yystr)
+    const char *yystr;
+#endif
+{
+  YYSIZE_T yylen;
+  for (yylen = 0; yystr[yylen]; yylen++)
+    continue;
+  return yylen;
+}
+#  endif
+# endif
+
+# ifndef yystpcpy
+#  if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE
+#   define yystpcpy stpcpy
+#  else
+/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in
+   YYDEST.  */
+#if (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+static char *
+yystpcpy (char *yydest, const char *yysrc)
+#else
+static char *
+yystpcpy (yydest, yysrc)
+    char *yydest;
+    const char *yysrc;
+#endif
+{
+  char *yyd = yydest;
+  const char *yys = yysrc;
+
+  while ((*yyd++ = *yys++) != '\0')
+    continue;
+
+  return yyd - 1;
+}
+#  endif
+# endif
+
+# ifndef yytnamerr
+/* Copy to YYRES the contents of YYSTR after stripping away unnecessary
+   quotes and backslashes, so that it's suitable for yyerror.  The
+   heuristic is that double-quoting is unnecessary unless the string
+   contains an apostrophe, a comma, or backslash (other than
+   backslash-backslash).  YYSTR is taken from yytname.  If YYRES is
+   null, do not copy; instead, return the length of what the result
+   would have been.  */
+static YYSIZE_T
+yytnamerr (char *yyres, const char *yystr)
+{
+  if (*yystr == '"')
+    {
+      YYSIZE_T yyn = 0;
+      char const *yyp = yystr;
+
+      for (;;)
+	switch (*++yyp)
+	  {
+	  case '\'':
+	  case ',':
+	    goto do_not_strip_quotes;
+
+	  case '\\':
+	    if (*++yyp != '\\')
+	      goto do_not_strip_quotes;
+	    /* Fall through.  */
+	  default:
+	    if (yyres)
+	      yyres[yyn] = *yyp;
+	    yyn++;
+	    break;
+
+	  case '"':
+	    if (yyres)
+	      yyres[yyn] = '\0';
+	    return yyn;
+	  }
+    do_not_strip_quotes: ;
+    }
+
+  if (! yyres)
+    return yystrlen (yystr);
+
+  return yystpcpy (yyres, yystr) - yyres;
+}
+# endif
+
+/* Copy into YYRESULT an error message about the unexpected token
+   YYCHAR while in state YYSTATE.  Return the number of bytes copied,
+   including the terminating null byte.  If YYRESULT is null, do not
+   copy anything; just return the number of bytes that would be
+   copied.  As a special case, return 0 if an ordinary "syntax error"
+   message will do.  Return YYSIZE_MAXIMUM if overflow occurs during
+   size calculation.  */
+static YYSIZE_T
+yysyntax_error (char *yyresult, int yystate, int yychar)
+{
+  int yyn = yypact[yystate];
+
+  if (! (YYPACT_NINF < yyn && yyn <= YYLAST))
+    return 0;
+  else
+    {
+      int yytype = YYTRANSLATE (yychar);
+      YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]);
+      YYSIZE_T yysize = yysize0;
+      YYSIZE_T yysize1;
+      int yysize_overflow = 0;
+      enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 };
+      char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM];
+      int yyx;
+
+# if 0
+      /* This is so xgettext sees the translatable formats that are
+	 constructed on the fly.  */
+      YY_("syntax error, unexpected %s");
+      YY_("syntax error, unexpected %s, expecting %s");
+      YY_("syntax error, unexpected %s, expecting %s or %s");
+      YY_("syntax error, unexpected %s, expecting %s or %s or %s");
+      YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s");
+# endif
+      char *yyfmt;
+      char const *yyf;
+      static char const yyunexpected[] = "syntax error, unexpected %s";
+      static char const yyexpecting[] = ", expecting %s";
+      static char const yyor[] = " or %s";
+      char yyformat[sizeof yyunexpected
+		    + sizeof yyexpecting - 1
+		    + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2)
+		       * (sizeof yyor - 1))];
+      char const *yyprefix = yyexpecting;
+
+      /* Start YYX at -YYN if negative to avoid negative indexes in
+	 YYCHECK.  */
+      int yyxbegin = yyn < 0 ? -yyn : 0;
+
+      /* Stay within bounds of both yycheck and yytname.  */
+      int yychecklim = YYLAST - yyn + 1;
+      int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS;
+      int yycount = 1;
+
+      yyarg[0] = yytname[yytype];
+      yyfmt = yystpcpy (yyformat, yyunexpected);
+
+      for (yyx = yyxbegin; yyx < yyxend; ++yyx)
+	if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR)
+	  {
+	    if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM)
+	      {
+		yycount = 1;
+		yysize = yysize0;
+		yyformat[sizeof yyunexpected - 1] = '\0';
+		break;
+	      }
+	    yyarg[yycount++] = yytname[yyx];
+	    yysize1 = yysize + yytnamerr (0, yytname[yyx]);
+	    yysize_overflow |= (yysize1 < yysize);
+	    yysize = yysize1;
+	    yyfmt = yystpcpy (yyfmt, yyprefix);
+	    yyprefix = yyor;
+	  }
+
+      yyf = YY_(yyformat);
+      yysize1 = yysize + yystrlen (yyf);
+      yysize_overflow |= (yysize1 < yysize);
+      yysize = yysize1;
+
+      if (yysize_overflow)
+	return YYSIZE_MAXIMUM;
+
+      if (yyresult)
+	{
+	  /* Avoid sprintf, as that infringes on the user's name space.
+	     Don't have undefined behavior even if the translation
+	     produced a string with the wrong number of "%s"s.  */
+	  char *yyp = yyresult;
+	  int yyi = 0;
+	  while ((*yyp = *yyf) != '\0')
+	    {
+	      if (*yyp == '%' && yyf[1] == 's' && yyi < yycount)
+		{
+		  yyp += yytnamerr (yyp, yyarg[yyi++]);
+		  yyf += 2;
+		}
+	      else
+		{
+		  yyp++;
+		  yyf++;
+		}
+	    }
+	}
+      return yysize;
+    }
+}
+#endif /* YYERROR_VERBOSE */
+
+
+/*-----------------------------------------------.
+| Release the memory associated to this symbol.  |
+`-----------------------------------------------*/
+
+/*ARGSUSED*/
+#if (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+static void
+yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep)
+#else
+static void
+yydestruct (yymsg, yytype, yyvaluep)
+    const char *yymsg;
+    int yytype;
+    YYSTYPE *yyvaluep;
+#endif
+{
+  YYUSE (yyvaluep);
+
+  if (!yymsg)
+    yymsg = "Deleting";
+  YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp);
+
+  switch (yytype)
+    {
+      case 53: /* "choice_entry" */
+
+	{
+	fprintf(stderr, "%s:%d: missing end statement for this entry\n",
+		(yyvaluep->menu)->file->name, (yyvaluep->menu)->lineno);
+	if (current_menu == (yyvaluep->menu))
+		menu_end_menu();
+};
+
+	break;
+      case 59: /* "if_entry" */
+
+	{
+	fprintf(stderr, "%s:%d: missing end statement for this entry\n",
+		(yyvaluep->menu)->file->name, (yyvaluep->menu)->lineno);
+	if (current_menu == (yyvaluep->menu))
+		menu_end_menu();
+};
+
+	break;
+      case 65: /* "menu_entry" */
+
+	{
+	fprintf(stderr, "%s:%d: missing end statement for this entry\n",
+		(yyvaluep->menu)->file->name, (yyvaluep->menu)->lineno);
+	if (current_menu == (yyvaluep->menu))
+		menu_end_menu();
+};
+
+	break;
+
+      default:
+	break;
+    }
+}
+
+/* Prevent warnings from -Wmissing-prototypes.  */
+#ifdef YYPARSE_PARAM
+#if defined __STDC__ || defined __cplusplus
+int yyparse (void *YYPARSE_PARAM);
+#else
+int yyparse ();
+#endif
+#else /* ! YYPARSE_PARAM */
+#if defined __STDC__ || defined __cplusplus
+int yyparse (void);
+#else
+int yyparse ();
+#endif
+#endif /* ! YYPARSE_PARAM */
+
+
+/* The lookahead symbol.  */
+int yychar;
+
+/* The semantic value of the lookahead symbol.  */
+YYSTYPE yylval;
+
+/* Number of syntax errors so far.  */
+int yynerrs;
+
+
+
+/*-------------------------.
+| yyparse or yypush_parse.  |
+`-------------------------*/
+
+#ifdef YYPARSE_PARAM
+#if (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+int
+yyparse (void *YYPARSE_PARAM)
+#else
+int
+yyparse (YYPARSE_PARAM)
+    void *YYPARSE_PARAM;
+#endif
+#else /* ! YYPARSE_PARAM */
+#if (defined __STDC__ || defined __C99__FUNC__ \
+     || defined __cplusplus || defined _MSC_VER)
+int
+yyparse (void)
+#else
+int
+yyparse ()
+
+#endif
+#endif
+{
+
+
+    int yystate;
+    /* Number of tokens to shift before error messages enabled.  */
+    int yyerrstatus;
+
+    /* The stacks and their tools:
+       `yyss': related to states.
+       `yyvs': related to semantic values.
+
+       Refer to the stacks thru separate pointers, to allow yyoverflow
+       to reallocate them elsewhere.  */
+
+    /* The state stack.  */
+    yytype_int16 yyssa[YYINITDEPTH];
+    yytype_int16 *yyss;
+    yytype_int16 *yyssp;
+
+    /* The semantic value stack.  */
+    YYSTYPE yyvsa[YYINITDEPTH];
+    YYSTYPE *yyvs;
+    YYSTYPE *yyvsp;
+
+    YYSIZE_T yystacksize;
+
+  int yyn;
+  int yyresult;
+  /* Lookahead token as an internal (translated) token number.  */
+  int yytoken;
+  /* The variables used to return semantic value and location from the
+     action routines.  */
+  YYSTYPE yyval;
+
+#if YYERROR_VERBOSE
+  /* Buffer for error messages, and its allocated size.  */
+  char yymsgbuf[128];
+  char *yymsg = yymsgbuf;
+  YYSIZE_T yymsg_alloc = sizeof yymsgbuf;
+#endif
+
+#define YYPOPSTACK(N)   (yyvsp -= (N), yyssp -= (N))
+
+  /* The number of symbols on the RHS of the reduced rule.
+     Keep to zero when no symbol should be popped.  */
+  int yylen = 0;
+
+  yytoken = 0;
+  yyss = yyssa;
+  yyvs = yyvsa;
+  yystacksize = YYINITDEPTH;
+
+  YYDPRINTF ((stderr, "Starting parse\n"));
+
+  yystate = 0;
+  yyerrstatus = 0;
+  yynerrs = 0;
+  yychar = YYEMPTY; /* Cause a token to be read.  */
+
+  /* Initialize stack pointers.
+     Waste one element of value and location stack
+     so that they stay on the same level as the state stack.
+     The wasted elements are never initialized.  */
+  yyssp = yyss;
+  yyvsp = yyvs;
+
+  goto yysetstate;
+
+/*------------------------------------------------------------.
+| yynewstate -- Push a new state, which is found in yystate.  |
+`------------------------------------------------------------*/
+ yynewstate:
+  /* In all cases, when you get here, the value and location stacks
+     have just been pushed.  So pushing a state here evens the stacks.  */
+  yyssp++;
+
+ yysetstate:
+  *yyssp = yystate;
+
+  if (yyss + yystacksize - 1 <= yyssp)
+    {
+      /* Get the current used size of the three stacks, in elements.  */
+      YYSIZE_T yysize = yyssp - yyss + 1;
+
+#ifdef yyoverflow
+      {
+	/* Give user a chance to reallocate the stack.  Use copies of
+	   these so that the &'s don't force the real ones into
+	   memory.  */
+	YYSTYPE *yyvs1 = yyvs;
+	yytype_int16 *yyss1 = yyss;
+
+	/* Each stack pointer address is followed by the size of the
+	   data in use in that stack, in bytes.  This used to be a
+	   conditional around just the two extra args, but that might
+	   be undefined if yyoverflow is a macro.  */
+	yyoverflow (YY_("memory exhausted"),
+		    &yyss1, yysize * sizeof (*yyssp),
+		    &yyvs1, yysize * sizeof (*yyvsp),
+		    &yystacksize);
+
+	yyss = yyss1;
+	yyvs = yyvs1;
+      }
+#else /* no yyoverflow */
+# ifndef YYSTACK_RELOCATE
+      goto yyexhaustedlab;
+# else
+      /* Extend the stack our own way.  */
+      if (YYMAXDEPTH <= yystacksize)
+	goto yyexhaustedlab;
+      yystacksize *= 2;
+      if (YYMAXDEPTH < yystacksize)
+	yystacksize = YYMAXDEPTH;
+
+      {
+	yytype_int16 *yyss1 = yyss;
+	union yyalloc *yyptr =
+	  (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize));
+	if (! yyptr)
+	  goto yyexhaustedlab;
+	YYSTACK_RELOCATE (yyss_alloc, yyss);
+	YYSTACK_RELOCATE (yyvs_alloc, yyvs);
+#  undef YYSTACK_RELOCATE
+	if (yyss1 != yyssa)
+	  YYSTACK_FREE (yyss1);
+      }
+# endif
+#endif /* no yyoverflow */
+
+      yyssp = yyss + yysize - 1;
+      yyvsp = yyvs + yysize - 1;
+
+      YYDPRINTF ((stderr, "Stack size increased to %lu\n",
+		  (unsigned long int) yystacksize));
+
+      if (yyss + yystacksize - 1 <= yyssp)
+	YYABORT;
+    }
+
+  YYDPRINTF ((stderr, "Entering state %d\n", yystate));
+
+  if (yystate == YYFINAL)
+    YYACCEPT;
+
+  goto yybackup;
+
+/*-----------.
+| yybackup.  |
+`-----------*/
+yybackup:
+
+  /* Do appropriate processing given the current state.  Read a
+     lookahead token if we need one and don't already have one.  */
+
+  /* First try to decide what to do without reference to lookahead token.  */
+  yyn = yypact[yystate];
+  if (yyn == YYPACT_NINF)
+    goto yydefault;
+
+  /* Not known => get a lookahead token if don't already have one.  */
+
+  /* YYCHAR is either YYEMPTY or YYEOF or a valid lookahead symbol.  */
+  if (yychar == YYEMPTY)
+    {
+      YYDPRINTF ((stderr, "Reading a token: "));
+      yychar = YYLEX;
+    }
+
+  if (yychar <= YYEOF)
+    {
+      yychar = yytoken = YYEOF;
+      YYDPRINTF ((stderr, "Now at end of input.\n"));
+    }
+  else
+    {
+      yytoken = YYTRANSLATE (yychar);
+      YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc);
+    }
+
+  /* If the proper action on seeing token YYTOKEN is to reduce or to
+     detect an error, take that action.  */
+  yyn += yytoken;
+  if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken)
+    goto yydefault;
+  yyn = yytable[yyn];
+  if (yyn <= 0)
+    {
+      if (yyn == 0 || yyn == YYTABLE_NINF)
+	goto yyerrlab;
+      yyn = -yyn;
+      goto yyreduce;
+    }
+
+  /* Count tokens shifted since error; after three, turn off error
+     status.  */
+  if (yyerrstatus)
+    yyerrstatus--;
+
+  /* Shift the lookahead token.  */
+  YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc);
+
+  /* Discard the shifted token.  */
+  yychar = YYEMPTY;
+
+  yystate = yyn;
+  *++yyvsp = yylval;
+
+  goto yynewstate;
+
+
+/*-----------------------------------------------------------.
+| yydefault -- do the default action for the current state.  |
+`-----------------------------------------------------------*/
+yydefault:
+  yyn = yydefact[yystate];
+  if (yyn == 0)
+    goto yyerrlab;
+  goto yyreduce;
+
+
+/*-----------------------------.
+| yyreduce -- Do a reduction.  |
+`-----------------------------*/
+yyreduce:
+  /* yyn is the number of a rule to reduce with.  */
+  yylen = yyr2[yyn];
+
+  /* If YYLEN is nonzero, implement the default value of the action:
+     `$$ = $1'.
+
+     Otherwise, the following line sets YYVAL to garbage.
+     This behavior is undocumented and Bison
+     users should not rely upon it.  Assigning to YYVAL
+     unconditionally makes the parser a bit smaller, and it avoids a
+     GCC warning that YYVAL may be used uninitialized.  */
+  yyval = yyvsp[1-yylen];
+
+
+  YY_REDUCE_PRINT (yyn);
+  switch (yyn)
+    {
+        case 10:
+
+    { zconf_error("unexpected end statement"); ;}
+    break;
+
+  case 11:
+
+    { zconf_error("unknown statement \"%s\"", (yyvsp[(2) - (4)].string)); ;}
+    break;
+
+  case 12:
+
+    {
+	zconf_error("unexpected option \"%s\"", kconf_id_strings + (yyvsp[(2) - (4)].id)->name);
+;}
+    break;
+
+  case 13:
+
+    { zconf_error("invalid statement"); ;}
+    break;
+
+  case 28:
+
+    { zconf_error("unknown option \"%s\"", (yyvsp[(1) - (3)].string)); ;}
+    break;
+
+  case 29:
+
+    { zconf_error("invalid option"); ;}
+    break;
+
+  case 30:
+
+    {
+	struct symbol *sym = sym_lookup((yyvsp[(2) - (3)].string), 0);
+	sym->flags |= SYMBOL_OPTIONAL;
+	menu_add_entry(sym);
+	printd(DEBUG_PARSE, "%s:%d:config %s\n", zconf_curname(), zconf_lineno(), (yyvsp[(2) - (3)].string));
+;}
+    break;
+
+  case 31:
+
+    {
+	menu_end_entry();
+	printd(DEBUG_PARSE, "%s:%d:endconfig\n", zconf_curname(), zconf_lineno());
+;}
+    break;
+
+  case 32:
+
+    {
+	struct symbol *sym = sym_lookup((yyvsp[(2) - (3)].string), 0);
+	sym->flags |= SYMBOL_OPTIONAL;
+	menu_add_entry(sym);
+	printd(DEBUG_PARSE, "%s:%d:menuconfig %s\n", zconf_curname(), zconf_lineno(), (yyvsp[(2) - (3)].string));
+;}
+    break;
+
+  case 33:
+
+    {
+	if (current_entry->prompt)
+		current_entry->prompt->type = P_MENU;
+	else
+		zconfprint("warning: menuconfig statement without prompt");
+	menu_end_entry();
+	printd(DEBUG_PARSE, "%s:%d:endconfig\n", zconf_curname(), zconf_lineno());
+;}
+    break;
+
+  case 41:
+
+    {
+	menu_set_type((yyvsp[(1) - (3)].id)->stype);
+	printd(DEBUG_PARSE, "%s:%d:type(%u)\n",
+		zconf_curname(), zconf_lineno(),
+		(yyvsp[(1) - (3)].id)->stype);
+;}
+    break;
+
+  case 42:
+
+    {
+	menu_add_prompt(P_PROMPT, (yyvsp[(2) - (4)].string), (yyvsp[(3) - (4)].expr));
+	printd(DEBUG_PARSE, "%s:%d:prompt\n", zconf_curname(), zconf_lineno());
+;}
+    break;
+
+  case 43:
+
+    {
+	menu_add_expr(P_DEFAULT, (yyvsp[(2) - (4)].expr), (yyvsp[(3) - (4)].expr));
+	if ((yyvsp[(1) - (4)].id)->stype != S_UNKNOWN)
+		menu_set_type((yyvsp[(1) - (4)].id)->stype);
+	printd(DEBUG_PARSE, "%s:%d:default(%u)\n",
+		zconf_curname(), zconf_lineno(),
+		(yyvsp[(1) - (4)].id)->stype);
+;}
+    break;
+
+  case 44:
+
+    {
+	menu_add_symbol(P_SELECT, sym_lookup((yyvsp[(2) - (4)].string), 0), (yyvsp[(3) - (4)].expr));
+	printd(DEBUG_PARSE, "%s:%d:select\n", zconf_curname(), zconf_lineno());
+;}
+    break;
+
+  case 45:
+
+    {
+	menu_add_expr(P_RANGE, expr_alloc_comp(E_RANGE,(yyvsp[(2) - (5)].symbol), (yyvsp[(3) - (5)].symbol)), (yyvsp[(4) - (5)].expr));
+	printd(DEBUG_PARSE, "%s:%d:range\n", zconf_curname(), zconf_lineno());
+;}
+    break;
+
+  case 48:
+
+    {
+	struct kconf_id *id = kconf_id_lookup((yyvsp[(2) - (3)].string), strlen((yyvsp[(2) - (3)].string)));
+	if (id && id->flags & TF_OPTION)
+		menu_add_option(id->token, (yyvsp[(3) - (3)].string));
+	else
+		zconfprint("warning: ignoring unknown option %s", (yyvsp[(2) - (3)].string));
+	free((yyvsp[(2) - (3)].string));
+;}
+    break;
+
+  case 49:
+
+    { (yyval.string) = NULL; ;}
+    break;
+
+  case 50:
+
+    { (yyval.string) = (yyvsp[(2) - (2)].string); ;}
+    break;
+
+  case 51:
+
+    {
+	struct symbol *sym = sym_lookup((yyvsp[(2) - (3)].string), SYMBOL_CHOICE);
+	sym->flags |= SYMBOL_AUTO;
+	menu_add_entry(sym);
+	menu_add_expr(P_CHOICE, NULL, NULL);
+	printd(DEBUG_PARSE, "%s:%d:choice\n", zconf_curname(), zconf_lineno());
+;}
+    break;
+
+  case 52:
+
+    {
+	(yyval.menu) = menu_add_menu();
+;}
+    break;
+
+  case 53:
+
+    {
+	if (zconf_endtoken((yyvsp[(1) - (1)].id), T_CHOICE, T_ENDCHOICE)) {
+		menu_end_menu();
+		printd(DEBUG_PARSE, "%s:%d:endchoice\n", zconf_curname(), zconf_lineno());
+	}
+;}
+    break;
+
+  case 61:
+
+    {
+	menu_add_prompt(P_PROMPT, (yyvsp[(2) - (4)].string), (yyvsp[(3) - (4)].expr));
+	printd(DEBUG_PARSE, "%s:%d:prompt\n", zconf_curname(), zconf_lineno());
+;}
+    break;
+
+  case 62:
+
+    {
+	if ((yyvsp[(1) - (3)].id)->stype == S_BOOLEAN || (yyvsp[(1) - (3)].id)->stype == S_TRISTATE) {
+		menu_set_type((yyvsp[(1) - (3)].id)->stype);
+		printd(DEBUG_PARSE, "%s:%d:type(%u)\n",
+			zconf_curname(), zconf_lineno(),
+			(yyvsp[(1) - (3)].id)->stype);
+	} else
+		YYERROR;
+;}
+    break;
+
+  case 63:
+
+    {
+	current_entry->sym->flags |= SYMBOL_OPTIONAL;
+	printd(DEBUG_PARSE, "%s:%d:optional\n", zconf_curname(), zconf_lineno());
+;}
+    break;
+
+  case 64:
+
+    {
+	if ((yyvsp[(1) - (4)].id)->stype == S_UNKNOWN) {
+		menu_add_symbol(P_DEFAULT, sym_lookup((yyvsp[(2) - (4)].string), 0), (yyvsp[(3) - (4)].expr));
+		printd(DEBUG_PARSE, "%s:%d:default\n",
+			zconf_curname(), zconf_lineno());
+	} else
+		YYERROR;
+;}
+    break;
+
+  case 67:
+
+    {
+	printd(DEBUG_PARSE, "%s:%d:if\n", zconf_curname(), zconf_lineno());
+	menu_add_entry(NULL);
+	menu_add_dep((yyvsp[(2) - (3)].expr));
+	(yyval.menu) = menu_add_menu();
+;}
+    break;
+
+  case 68:
+
+    {
+	if (zconf_endtoken((yyvsp[(1) - (1)].id), T_IF, T_ENDIF)) {
+		menu_end_menu();
+		printd(DEBUG_PARSE, "%s:%d:endif\n", zconf_curname(), zconf_lineno());
+	}
+;}
+    break;
+
+  case 74:
+
+    {
+	menu_add_prompt(P_MENU, (yyvsp[(2) - (3)].string), NULL);
+;}
+    break;
+
+  case 75:
+
+    {
+	menu_add_entry(NULL);
+	menu_add_prompt(P_MENU, (yyvsp[(2) - (3)].string), NULL);
+	printd(DEBUG_PARSE, "%s:%d:menu\n", zconf_curname(), zconf_lineno());
+;}
+    break;
+
+  case 76:
+
+    {
+	(yyval.menu) = menu_add_menu();
+;}
+    break;
+
+  case 77:
+
+    {
+	if (zconf_endtoken((yyvsp[(1) - (1)].id), T_MENU, T_ENDMENU)) {
+		menu_end_menu();
+		printd(DEBUG_PARSE, "%s:%d:endmenu\n", zconf_curname(), zconf_lineno());
+	}
+;}
+    break;
+
+  case 83:
+
+    {
+	printd(DEBUG_PARSE, "%s:%d:source %s\n", zconf_curname(), zconf_lineno(), (yyvsp[(2) - (3)].string));
+	zconf_nextfile((yyvsp[(2) - (3)].string));
+;}
+    break;
+
+  case 84:
+
+    {
+	menu_add_entry(NULL);
+	menu_add_prompt(P_COMMENT, (yyvsp[(2) - (3)].string), NULL);
+	printd(DEBUG_PARSE, "%s:%d:comment\n", zconf_curname(), zconf_lineno());
+;}
+    break;
+
+  case 85:
+
+    {
+	menu_end_entry();
+;}
+    break;
+
+  case 86:
+
+    {
+	printd(DEBUG_PARSE, "%s:%d:help\n", zconf_curname(), zconf_lineno());
+	zconf_starthelp();
+;}
+    break;
+
+  case 87:
+
+    {
+	current_entry->help = (yyvsp[(2) - (2)].string);
+;}
+    break;
+
+  case 92:
+
+    {
+	menu_add_dep((yyvsp[(3) - (4)].expr));
+	printd(DEBUG_PARSE, "%s:%d:depends on\n", zconf_curname(), zconf_lineno());
+;}
+    break;
+
+  case 96:
+
+    {
+	menu_add_visibility((yyvsp[(2) - (2)].expr));
+;}
+    break;
+
+  case 98:
+
+    {
+	menu_add_prompt(P_PROMPT, (yyvsp[(1) - (2)].string), (yyvsp[(2) - (2)].expr));
+;}
+    break;
+
+  case 101:
+
+    { (yyval.id) = (yyvsp[(1) - (2)].id); ;}
+    break;
+
+  case 102:
+
+    { (yyval.id) = (yyvsp[(1) - (2)].id); ;}
+    break;
+
+  case 103:
+
+    { (yyval.id) = (yyvsp[(1) - (2)].id); ;}
+    break;
+
+  case 106:
+
+    { (yyval.expr) = NULL; ;}
+    break;
+
+  case 107:
+
+    { (yyval.expr) = (yyvsp[(2) - (2)].expr); ;}
+    break;
+
+  case 108:
+
+    { (yyval.expr) = expr_alloc_symbol((yyvsp[(1) - (1)].symbol)); ;}
+    break;
+
+  case 109:
+
+    { (yyval.expr) = expr_alloc_comp(E_EQUAL, (yyvsp[(1) - (3)].symbol), (yyvsp[(3) - (3)].symbol)); ;}
+    break;
+
+  case 110:
+
+    { (yyval.expr) = expr_alloc_comp(E_UNEQUAL, (yyvsp[(1) - (3)].symbol), (yyvsp[(3) - (3)].symbol)); ;}
+    break;
+
+  case 111:
+
+    { (yyval.expr) = (yyvsp[(2) - (3)].expr); ;}
+    break;
+
+  case 112:
+
+    { (yyval.expr) = expr_alloc_one(E_NOT, (yyvsp[(2) - (2)].expr)); ;}
+    break;
+
+  case 113:
+
+    { (yyval.expr) = expr_alloc_two(E_OR, (yyvsp[(1) - (3)].expr), (yyvsp[(3) - (3)].expr)); ;}
+    break;
+
+  case 114:
+
+    { (yyval.expr) = expr_alloc_two(E_AND, (yyvsp[(1) - (3)].expr), (yyvsp[(3) - (3)].expr)); ;}
+    break;
+
+  case 115:
+
+    { (yyval.symbol) = sym_lookup((yyvsp[(1) - (1)].string), 0); free((yyvsp[(1) - (1)].string)); ;}
+    break;
+
+  case 116:
+
+    { (yyval.symbol) = sym_lookup((yyvsp[(1) - (1)].string), SYMBOL_CONST); free((yyvsp[(1) - (1)].string)); ;}
+    break;
+
+  case 117:
+
+    { (yyval.string) = NULL; ;}
+    break;
+
+
+
+      default: break;
+    }
+  YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc);
+
+  YYPOPSTACK (yylen);
+  yylen = 0;
+  YY_STACK_PRINT (yyss, yyssp);
+
+  *++yyvsp = yyval;
+
+  /* Now `shift' the result of the reduction.  Determine what state
+     that goes to, based on the state we popped back to and the rule
+     number reduced by.  */
+
+  yyn = yyr1[yyn];
+
+  yystate = yypgoto[yyn - YYNTOKENS] + *yyssp;
+  if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp)
+    yystate = yytable[yystate];
+  else
+    yystate = yydefgoto[yyn - YYNTOKENS];
+
+  goto yynewstate;
+
+
+/*------------------------------------.
+| yyerrlab -- here on detecting error |
+`------------------------------------*/
+yyerrlab:
+  /* If not already recovering from an error, report this error.  */
+  if (!yyerrstatus)
+    {
+      ++yynerrs;
+#if ! YYERROR_VERBOSE
+      yyerror (YY_("syntax error"));
+#else
+      {
+	YYSIZE_T yysize = yysyntax_error (0, yystate, yychar);
+	if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM)
+	  {
+	    YYSIZE_T yyalloc = 2 * yysize;
+	    if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM))
+	      yyalloc = YYSTACK_ALLOC_MAXIMUM;
+	    if (yymsg != yymsgbuf)
+	      YYSTACK_FREE (yymsg);
+	    yymsg = (char *) YYSTACK_ALLOC (yyalloc);
+	    if (yymsg)
+	      yymsg_alloc = yyalloc;
+	    else
+	      {
+		yymsg = yymsgbuf;
+		yymsg_alloc = sizeof yymsgbuf;
+	      }
+	  }
+
+	if (0 < yysize && yysize <= yymsg_alloc)
+	  {
+	    (void) yysyntax_error (yymsg, yystate, yychar);
+	    yyerror (yymsg);
+	  }
+	else
+	  {
+	    yyerror (YY_("syntax error"));
+	    if (yysize != 0)
+	      goto yyexhaustedlab;
+	  }
+      }
+#endif
+    }
+
+
+
+  if (yyerrstatus == 3)
+    {
+      /* If just tried and failed to reuse lookahead token after an
+	 error, discard it.  */
+
+      if (yychar <= YYEOF)
+	{
+	  /* Return failure if at end of input.  */
+	  if (yychar == YYEOF)
+	    YYABORT;
+	}
+      else
+	{
+	  yydestruct ("Error: discarding",
+		      yytoken, &yylval);
+	  yychar = YYEMPTY;
+	}
+    }
+
+  /* Else will try to reuse lookahead token after shifting the error
+     token.  */
+  goto yyerrlab1;
+
+
+/*---------------------------------------------------.
+| yyerrorlab -- error raised explicitly by YYERROR.  |
+`---------------------------------------------------*/
+yyerrorlab:
+
+  /* Pacify compilers like GCC when the user code never invokes
+     YYERROR and the label yyerrorlab therefore never appears in user
+     code.  */
+  if (/*CONSTCOND*/ 0)
+     goto yyerrorlab;
+
+  /* Do not reclaim the symbols of the rule which action triggered
+     this YYERROR.  */
+  YYPOPSTACK (yylen);
+  yylen = 0;
+  YY_STACK_PRINT (yyss, yyssp);
+  yystate = *yyssp;
+  goto yyerrlab1;
+
+
+/*-------------------------------------------------------------.
+| yyerrlab1 -- common code for both syntax error and YYERROR.  |
+`-------------------------------------------------------------*/
+yyerrlab1:
+  yyerrstatus = 3;	/* Each real token shifted decrements this.  */
+
+  for (;;)
+    {
+      yyn = yypact[yystate];
+      if (yyn != YYPACT_NINF)
+	{
+	  yyn += YYTERROR;
+	  if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR)
+	    {
+	      yyn = yytable[yyn];
+	      if (0 < yyn)
+		break;
+	    }
+	}
+
+      /* Pop the current state because it cannot handle the error token.  */
+      if (yyssp == yyss)
+	YYABORT;
+
+
+      yydestruct ("Error: popping",
+		  yystos[yystate], yyvsp);
+      YYPOPSTACK (1);
+      yystate = *yyssp;
+      YY_STACK_PRINT (yyss, yyssp);
+    }
+
+  *++yyvsp = yylval;
+
+
+  /* Shift the error token.  */
+  YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp);
+
+  yystate = yyn;
+  goto yynewstate;
+
+
+/*-------------------------------------.
+| yyacceptlab -- YYACCEPT comes here.  |
+`-------------------------------------*/
+yyacceptlab:
+  yyresult = 0;
+  goto yyreturn;
+
+/*-----------------------------------.
+| yyabortlab -- YYABORT comes here.  |
+`-----------------------------------*/
+yyabortlab:
+  yyresult = 1;
+  goto yyreturn;
+
+#if !defined(yyoverflow) || YYERROR_VERBOSE
+/*-------------------------------------------------.
+| yyexhaustedlab -- memory exhaustion comes here.  |
+`-------------------------------------------------*/
+yyexhaustedlab:
+  yyerror (YY_("memory exhausted"));
+  yyresult = 2;
+  /* Fall through.  */
+#endif
+
+yyreturn:
+  if (yychar != YYEMPTY)
+     yydestruct ("Cleanup: discarding lookahead",
+		 yytoken, &yylval);
+  /* Do not reclaim the symbols of the rule which action triggered
+     this YYABORT or YYACCEPT.  */
+  YYPOPSTACK (yylen);
+  YY_STACK_PRINT (yyss, yyssp);
+  while (yyssp != yyss)
+    {
+      yydestruct ("Cleanup: popping",
+		  yystos[*yyssp], yyvsp);
+      YYPOPSTACK (1);
+    }
+#ifndef yyoverflow
+  if (yyss != yyssa)
+    YYSTACK_FREE (yyss);
+#endif
+#if YYERROR_VERBOSE
+  if (yymsg != yymsgbuf)
+    YYSTACK_FREE (yymsg);
+#endif
+  /* Make sure YYID is used.  */
+  return YYID (yyresult);
+}
+
+
+
+
+
+void conf_parse(const char *name)
+{
+	struct symbol *sym;
+	int i;
+
+	zconf_initscan(name);
+
+	sym_init();
+	_menu_init();
+	modules_sym = sym_lookup(NULL, 0);
+	modules_sym->type = S_BOOLEAN;
+	modules_sym->flags |= SYMBOL_AUTO;
+	rootmenu.prompt = menu_add_prompt(P_MENU, "Linux Kernel Configuration", NULL);
+
+#if YYDEBUG
+	if (getenv("ZCONF_DEBUG"))
+		zconfdebug = 1;
+#endif
+	zconfparse();
+	if (zconfnerrs)
+		exit(1);
+	if (!modules_sym->prop) {
+		struct property *prop;
+
+		prop = prop_alloc(P_DEFAULT, modules_sym);
+		prop->expr = expr_alloc_symbol(sym_lookup("MODULES", 0));
+	}
+
+	rootmenu.prompt->text = _(rootmenu.prompt->text);
+	rootmenu.prompt->text = sym_expand_string_value(rootmenu.prompt->text);
+
+	menu_finalize(&rootmenu);
+	for_all_symbols(i, sym) {
+		if (sym_check_deps(sym))
+			zconfnerrs++;
+        }
+	if (zconfnerrs)
+		exit(1);
+	sym_set_change_count(1);
+}
+
+static const char *zconf_tokenname(int token)
+{
+	switch (token) {
+	case T_MENU:		return "menu";
+	case T_ENDMENU:		return "endmenu";
+	case T_CHOICE:		return "choice";
+	case T_ENDCHOICE:	return "endchoice";
+	case T_IF:		return "if";
+	case T_ENDIF:		return "endif";
+	case T_DEPENDS:		return "depends";
+	case T_VISIBLE:		return "visible";
+	}
+	return "<token>";
+}
+
+static bool zconf_endtoken(struct kconf_id *id, int starttoken, int endtoken)
+{
+	if (id->token != endtoken) {
+		zconf_error("unexpected '%s' within %s block",
+			kconf_id_strings + id->name, zconf_tokenname(starttoken));
+		zconfnerrs++;
+		return false;
+	}
+	if (current_menu->file != current_file) {
+		zconf_error("'%s' in different file than '%s'",
+			kconf_id_strings + id->name, zconf_tokenname(starttoken));
+		fprintf(stderr, "%s:%d: location of the '%s'\n",
+			current_menu->file->name, current_menu->lineno,
+			zconf_tokenname(starttoken));
+		zconfnerrs++;
+		return false;
+	}
+	return true;
+}
+
+static void zconfprint(const char *err, ...)
+{
+	va_list ap;
+
+	fprintf(stderr, "%s:%d: ", zconf_curname(), zconf_lineno());
+	va_start(ap, err);
+	vfprintf(stderr, err, ap);
+	va_end(ap);
+	fprintf(stderr, "\n");
+}
+
+static void zconf_error(const char *err, ...)
+{
+	va_list ap;
+
+	zconfnerrs++;
+	fprintf(stderr, "%s:%d: ", zconf_curname(), zconf_lineno());
+	va_start(ap, err);
+	vfprintf(stderr, err, ap);
+	va_end(ap);
+	fprintf(stderr, "\n");
+}
+
+static void zconferror(const char *err)
+{
+#if YYDEBUG
+	fprintf(stderr, "%s:%d: %s\n", zconf_curname(), zconf_lineno() + 1, err);
+#endif
+}
+
+static void print_quoted_string(FILE *out, const char *str)
+{
+	const char *p;
+	int len;
+
+	putc('"', out);
+	while ((p = strchr(str, '"'))) {
+		len = p - str;
+		if (len)
+			fprintf(out, "%.*s", len, str);
+		fputs("\\\"", out);
+		str = p + 1;
+	}
+	fputs(str, out);
+	putc('"', out);
+}
+
+static void print_symbol(FILE *out, struct menu *menu)
+{
+	struct symbol *sym = menu->sym;
+	struct property *prop;
+
+	if (sym_is_choice(sym))
+		fprintf(out, "\nchoice\n");
+	else
+		fprintf(out, "\nconfig %s\n", sym->name);
+	switch (sym->type) {
+	case S_BOOLEAN:
+		fputs("  boolean\n", out);
+		break;
+	case S_TRISTATE:
+		fputs("  tristate\n", out);
+		break;
+	case S_STRING:
+		fputs("  string\n", out);
+		break;
+	case S_INT:
+		fputs("  integer\n", out);
+		break;
+	case S_HEX:
+		fputs("  hex\n", out);
+		break;
+	default:
+		fputs("  ???\n", out);
+		break;
+	}
+	for (prop = sym->prop; prop; prop = prop->next) {
+		if (prop->menu != menu)
+			continue;
+		switch (prop->type) {
+		case P_PROMPT:
+			fputs("  prompt ", out);
+			print_quoted_string(out, prop->text);
+			if (!expr_is_yes(prop->visible.expr)) {
+				fputs(" if ", out);
+				expr_fprint(prop->visible.expr, out);
+			}
+			fputc('\n', out);
+			break;
+		case P_DEFAULT:
+			fputs( "  default ", out);
+			expr_fprint(prop->expr, out);
+			if (!expr_is_yes(prop->visible.expr)) {
+				fputs(" if ", out);
+				expr_fprint(prop->visible.expr, out);
+			}
+			fputc('\n', out);
+			break;
+		case P_CHOICE:
+			fputs("  #choice value\n", out);
+			break;
+		case P_SELECT:
+			fputs( "  select ", out);
+			expr_fprint(prop->expr, out);
+			fputc('\n', out);
+			break;
+		case P_RANGE:
+			fputs( "  range ", out);
+			expr_fprint(prop->expr, out);
+			fputc('\n', out);
+			break;
+		case P_MENU:
+			fputs( "  menu ", out);
+			print_quoted_string(out, prop->text);
+			fputc('\n', out);
+			break;
+		default:
+			fprintf(out, "  unknown prop %d!\n", prop->type);
+			break;
+		}
+	}
+	if (menu->help) {
+		int len = strlen(menu->help);
+		while (menu->help[--len] == '\n')
+			menu->help[len] = 0;
+		fprintf(out, "  help\n%s\n", menu->help);
+	}
+}
+
+void zconfdump(FILE *out)
+{
+	struct property *prop;
+	struct symbol *sym;
+	struct menu *menu;
+
+	menu = rootmenu.list;
+	while (menu) {
+		if ((sym = menu->sym))
+			print_symbol(out, menu);
+		else if ((prop = menu->prompt)) {
+			switch (prop->type) {
+			case P_COMMENT:
+				fputs("\ncomment ", out);
+				print_quoted_string(out, prop->text);
+				fputs("\n", out);
+				break;
+			case P_MENU:
+				fputs("\nmenu ", out);
+				print_quoted_string(out, prop->text);
+				fputs("\n", out);
+				break;
+			default:
+				;
+			}
+			if (!expr_is_yes(prop->visible.expr)) {
+				fputs("  depends ", out);
+				expr_fprint(prop->visible.expr, out);
+				fputc('\n', out);
+			}
+		}
+
+		if (menu->list)
+			menu = menu->list;
+		else if (menu->next)
+			menu = menu->next;
+		else while ((menu = menu->parent)) {
+			if (menu->prompt && menu->prompt->type == P_MENU)
+				fputs("\nendmenu\n", out);
+			if (menu->next) {
+				menu = menu->next;
+				break;
+			}
+		}
+	}
+}
+
+#include "lex.zconf.c"
+#include "util.c"
+#include "confdata.c"
+#include "expr.c"
+#include "symbol.c"
+#include "menu.c"
+
diff -uNra linux-3.0.82/scripts/mod/elfconfig.h linux-3.0.82x/scripts/mod/elfconfig.h
--- linux-3.0.82/scripts/mod/elfconfig.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/scripts/mod/elfconfig.h	2017-09-23 03:42:50.362674012 +0800
@@ -0,0 +1,4 @@
+#define KERNEL_ELFCLASS ELFCLASS32
+#define KERNEL_ELFDATA ELFDATA2LSB
+#define HOST_ELFCLASS ELFCLASS64
+#define HOST_ELFDATA ELFDATA2LSB
diff -uNra linux-3.0.82/scripts/mod/mk_elfconfig linux-3.0.82x/scripts/mod/mk_elfconfig
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/scripts/mod/modpost linux-3.0.82x/scripts/mod/modpost
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/scripts/pnmtologo linux-3.0.82x/scripts/pnmtologo
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/sound/core/oss/pcm_oss.c linux-3.0.82x/sound/core/oss/pcm_oss.c
--- linux-3.0.82/sound/core/oss/pcm_oss.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/sound/core/oss/pcm_oss.c	2017-09-23 03:42:50.370673987 +0800
@@ -2645,6 +2645,19 @@
 		return put_user(res, p);
 	case SNDCTL_DSP_PROFILE:
 		return 0;	/* silently ignore */
+	case SNDCTL_PCM_PAUSE:                  ///å®žçŽ°æš‚å�œï¼Œæ’­æ”¾åŠŸèƒ½
+		{
+			struct snd_pcm_substream *substream;
+			struct snd_pcm_file *pcm_file;
+			int     ret;
+
+			if (get_user(res, p))
+				return -EFAULT;
+			pcm_file = file->private_data;
+			substream = pcm_file ->substream;
+			ret = snd_pcm_kernel_ioctl(substream, SNDRV_PCM_IOCTL_PAUSE, res);
+			return ret;
+		}
 	default:
 		snd_printd("pcm_oss: unknown command = 0x%x\n", cmd);
 	}
diff -uNra linux-3.0.82/sound/mips/Kconfig linux-3.0.82x/sound/mips/Kconfig
--- linux-3.0.82/sound/mips/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/sound/mips/Kconfig	2017-09-23 03:42:50.374673975 +0800
@@ -30,5 +30,23 @@
 	help
 	  ALSA Sound driver for the Au1x00's AC97 port.
 
+config SND_LS1A_LIB
+        tristate
+        select SND_AC97_CODEC if SND_LS1A_LIB_AC97
+
+config SND_LS1A_LIB_AC97
+        bool
+
+config SND_LS1A_AC97
+        tristate "AC97 driver for the SB2F chip"
+        depends on MACH_LOONGSON_SB2F
+        select SND_LS1A_PCM
+        select SND_AC97_CODEC
+        select SND_LS1A_LIB
+        select SND_LS1A_LIB_AC97
+        help
+          Say Y or M if you want to support any AC97 codec attached to
+          the LS1A AC97 interface.
+
 endif	# SND_MIPS
 
diff -uNra linux-3.0.82/sound/mips/ls1a-ac97-lib.c linux-3.0.82x/sound/mips/ls1a-ac97-lib.c
--- linux-3.0.82/sound/mips/ls1a-ac97-lib.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/sound/mips/ls1a-ac97-lib.c	2017-09-23 03:42:50.374673975 +0800
@@ -0,0 +1,81 @@
+/*
+ * Based on sound/arm/ls1a-ac97.c and sound/soc/pxa/ls1a-ac97.c
+ * which contain:
+ *
+ * Author:	Nicolas Pitre
+ * Created:	Dec 02, 2004
+ * Copyright:	MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/clk.h>
+#include <linux/delay.h>
+
+#include <sound/ac97_codec.h>
+#include <sound/ls1a-lib.h>
+
+//#include <mach/audio.h>
+
+bool ls1a_ac97_try_warm_reset(struct snd_ac97 *ac97)
+{
+	return true;
+}
+EXPORT_SYMBOL_GPL(ls1a_ac97_try_warm_reset);
+
+bool ls1a_ac97_try_cold_reset(struct snd_ac97 *ac97)
+{
+	return true;
+}
+EXPORT_SYMBOL_GPL(ls1a_ac97_try_cold_reset);
+
+
+void ls1a_ac97_finish_reset(struct snd_ac97 *ac97)
+{
+	
+}
+EXPORT_SYMBOL_GPL(ls1a_ac97_finish_reset);
+
+/*
+static irqreturn_t ls1a_ac97_irq(int irq, void *dev_id)
+{
+	
+	return IRQ_HANDLED;
+}
+*/
+#ifdef CONFIG_PM
+int ls1a_ac97_hw_suspend(void)
+{
+	return 0;
+}
+EXPORT_SYMBOL_GPL(ls1a_ac97_hw_suspend);
+
+int ls1a_ac97_hw_resume(void)
+{
+	return 0;
+}
+EXPORT_SYMBOL_GPL(ls1a_ac97_hw_resume);
+#endif
+
+int __devinit ls1a_ac97_hw_probe(struct platform_device *dev)
+{
+	int ret = 0;
+
+	return ret;
+}
+EXPORT_SYMBOL_GPL(ls1a_ac97_hw_probe);
+
+void ls1a_ac97_hw_remove(struct platform_device *dev)
+{
+
+}
+EXPORT_SYMBOL_GPL(ls1a_ac97_hw_remove);
+
+MODULE_AUTHOR("Nicolas Pitre");
+MODULE_DESCRIPTION("Intel/Marvell PXA sound library");
+MODULE_LICENSE("GPL");
diff -uNra linux-3.0.82/sound/mips/ls1a-pcm.h linux-3.0.82x/sound/mips/ls1a-pcm.h
--- linux-3.0.82/sound/mips/ls1a-pcm.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/sound/mips/ls1a-pcm.h	2017-09-23 03:42:50.374673975 +0800
@@ -0,0 +1,38 @@
+/*
+ * linux/sound/mips/ls1a-pcm.h -- ALSA PCM interface for the Intel PXA2xx chip
+ *
+ * Author:	Nicolas Pitre
+ * Created:	Nov 30, 2004
+ * Copyright:	MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <asm/delay.h>
+#include "ls1a-pcm-private.h"
+
+struct ls1a_runtime_data {
+	int dma_ch;
+	struct ls1a_pcm_dma_params *params;
+	ls1a_dma_desc *dma_desc_array;
+	dma_addr_t dma_desc_array_phys;
+
+	//å°†è¦�æ‰§è¡Œçš„dmaæ��è¿°ç¬¦ç‰©ç�†åœ°å�€
+	ls1a_dma_desc *dma_desc_ready;
+	dma_addr_t dma_desc_ready_phys;
+
+	ls1a_dma_desc *dma_position_desc;
+	dma_addr_t dma_position_desc_phys;
+};
+
+struct ls1a_pcm_client {
+	struct ls1a_pcm_dma_params *playback_params;
+	struct ls1a_pcm_dma_params *capture_params;
+	int (*startup)(struct snd_pcm_substream *);
+	void (*shutdown)(struct snd_pcm_substream *);
+	int (*prepare)(struct snd_pcm_substream *);
+};
+
+extern int ls1a_pcm_new(struct snd_card *, struct ls1a_pcm_client *, struct snd_pcm **);
+
diff -uNra linux-3.0.82/sound/mips/ls1a-pcm-lib.c linux-3.0.82x/sound/mips/ls1a-pcm-lib.c
--- linux-3.0.82/sound/mips/ls1a-pcm-lib.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/sound/mips/ls1a-pcm-lib.c	2017-09-23 03:42:50.374673975 +0800
@@ -0,0 +1,335 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/dma-mapping.h>
+
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/ls1a-lib.h>
+
+
+#include <linux/interrupt.h>
+
+#include "ls1a-pcm.h"//For DMA Reasons and AC97 Registers
+#include "../soc/loongson/ls1a-pcm.h"//For sth shared with ls1a-ac97.c
+
+extern void dma_free_writecombine(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle);
+
+static const struct snd_pcm_hardware ls1a_pcm_hardware = {
+	.info			= SNDRV_PCM_INFO_MMAP |
+				  SNDRV_PCM_INFO_INTERLEAVED |
+				 //SNDRV_PCM_INFO_BLOCK_TRANSFER |
+				  SNDRV_PCM_INFO_MMAP_VALID |
+				  /* No full-resume yet implemented */
+				  SNDRV_PCM_INFO_RESUME |
+				  SNDRV_PCM_INFO_PAUSE,
+
+	.formats		= SNDRV_PCM_FMTBIT_S16_LE,
+	.rates			= SNDRV_PCM_RATE_8000_48000,
+	.channels_min		= 1,
+	.channels_max		= 2,
+	.period_bytes_min	= 128,
+	.period_bytes_max	= 128*1024,
+	.periods_min		= 1,
+	.periods_max		= PAGE_SIZE/sizeof(ls1a_dma_desc),
+	.buffer_bytes_max	= 1024 * 1024,
+//	.fifo_size		= 0,
+};
+
+int __ls1a_pcm_hw_params(struct snd_pcm_substream *substream,
+				struct snd_pcm_hw_params *params)
+{
+	struct snd_pcm_runtime *runtime = substream->runtime;
+	struct ls1a_runtime_data *rtd = runtime->private_data;
+	size_t totsize = params_buffer_bytes(params);
+	size_t period = params_period_bytes(params);
+	ls1a_dma_desc *dma_desc;
+	dma_addr_t dma_buff_phys, next_desc_phys;
+	
+	snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
+	runtime->dma_bytes = totsize;
+	dma_desc = rtd->dma_desc_array;
+	next_desc_phys = rtd->dma_desc_array_phys;
+	dma_buff_phys = runtime->dma_addr;
+	do {
+		next_desc_phys += sizeof(ls1a_dma_desc);
+		dma_desc->ordered = ((u32)(next_desc_phys) | 0x1);
+
+		dma_desc->saddr = dma_buff_phys;			/// 
+		dma_desc->daddr = rtd->params->dev_addr;		/// right!
+		dma_desc->dcmd = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
+				0x00001001 : 0x00000001;//FIXME, IRQ? NOT?
+
+		if (period > totsize)
+			period = totsize;
+		//length,step_length,step_times--loongson
+		dma_desc->length = 8;
+		dma_desc->step_length = 0;
+	       	dma_desc->step_times = period >> 5;
+
+		dma_desc++;
+		dma_buff_phys += period;
+	} while (totsize -= period);
+	dma_desc[-1].ordered = ((u32)(rtd->dma_desc_array_phys) | 0x1);
+
+	return 0;
+}
+EXPORT_SYMBOL(__ls1a_pcm_hw_params);
+
+int __ls1a_pcm_hw_free(struct snd_pcm_substream *substream)
+{
+	struct ls1a_runtime_data *rtd = substream->runtime->private_data;
+
+	snd_pcm_set_runtime_buffer(substream, NULL);
+	return 0;
+}
+EXPORT_SYMBOL(__ls1a_pcm_hw_free);
+
+
+int ls1a_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
+{
+	struct ls1a_runtime_data *prtd = substream->runtime->private_data;
+	int ret = 0;
+	u32 val;
+	
+	switch (cmd) {
+	case SNDRV_PCM_TRIGGER_START:
+		val = prtd->dma_desc_array_phys;
+		val |= (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
+			0x9 : 0xa;
+		write_reg((volatile u32*)(CONFREG_BASE + 0x1160),val); 
+		while(read_reg(CONFREG_BASE + 0x1160)&8);
+
+		break;
+
+	case SNDRV_PCM_TRIGGER_STOP:
+		//å�œæ­¢DMA
+		val = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
+			0x00000011 : 0x00000012;
+		write_reg((volatile u32*)(CONFREG_BASE + 0x1160),val); 
+		udelay(1000);
+		break;
+
+	case SNDRV_PCM_TRIGGER_SUSPEND:
+	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+		//å†™å›žæŽ§åˆ¶å™¨å¯„å­˜å™¨çš„å€¼,æš‚å�œæ’­æ”¾
+		val = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
+			0x5 : 0x6;
+		write_reg((volatile u32*)(CONFREG_BASE + 0x1160),prtd->dma_desc_ready_phys|val);
+		while(read_reg((volatile u32*)(CONFREG_BASE + 0x1160))&4);
+		
+		val = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
+			0x11 : 0x12;
+		write_reg((volatile u32*)(CONFREG_BASE + 0x1160),val);
+		udelay(1000);
+		break;
+
+	case SNDRV_PCM_TRIGGER_RESUME:
+		break;
+	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+		val = prtd->dma_desc_ready_phys;//æ�¢å¤�æŽ§åˆ¶å™¨å¯„å­˜å™¨å€¼
+		val |=  (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
+			0x9 : 0xa;
+		write_reg((volatile u32*)(CONFREG_BASE + 0x1160),val); 
+		while(read_reg((volatile u32*)(CONFREG_BASE + 0x1160))&8);
+		break;
+
+	default:
+		ret = -EINVAL;
+	}
+
+	return ret;
+}
+EXPORT_SYMBOL(ls1a_pcm_trigger);
+
+snd_pcm_uframes_t
+ls1a_pcm_pointer(struct snd_pcm_substream *substream)
+{
+	struct snd_pcm_runtime *runtime = substream->runtime;
+	struct ls1a_runtime_data *prtd = runtime->private_data;
+
+	snd_pcm_uframes_t x;
+
+	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+		write_reg((volatile u32*)(CONFREG_BASE + 0x1160), prtd->dma_position_desc_phys|0x5);
+		while(read_reg(CONFREG_BASE + 0x1160)&4);
+	} else {
+		write_reg((volatile u32*)(CONFREG_BASE + 0x1160), prtd->dma_position_desc_phys|0x6); 
+		while(read_reg((volatile u32*)(CONFREG_BASE + 0x1160)) &4);
+	}
+	x = bytes_to_frames(runtime, prtd->dma_position_desc->saddr - runtime->dma_addr);
+	if (x == runtime->buffer_size)
+		x = 0;
+	return x;
+}
+EXPORT_SYMBOL(ls1a_pcm_pointer);
+
+int __ls1a_pcm_prepare(struct snd_pcm_substream *substream)
+{
+	struct ls1a_runtime_data *prtd = substream->runtime->private_data;
+	u32 val;
+
+	if (!prtd || !prtd->params)
+		return 0;
+
+	return 0;
+}
+EXPORT_SYMBOL(__ls1a_pcm_prepare);
+
+irqreturn_t ls1a_pcm_dma_irq(int irq, void *dev_id)
+{
+	struct snd_pcm_substream *substream = dev_id;
+	struct ls1a_runtime_data *rtd = substream->runtime->private_data;
+
+	snd_pcm_period_elapsed(substream);
+	return IRQ_HANDLED;
+}
+EXPORT_SYMBOL(ls1a_pcm_dma_irq);
+
+int __ls1a_pcm_open(struct snd_pcm_substream *substream)
+{
+	struct snd_pcm_runtime *runtime = substream->runtime;
+	struct ls1a_runtime_data *rtd;
+	int ret;
+
+	runtime->hw = ls1a_pcm_hardware;
+#if 1
+	/*from dummy.c*/
+	if (substream->pcm->device & 1) {
+		runtime->hw.info &= ~SNDRV_PCM_INFO_INTERLEAVED;
+		runtime->hw.info |= SNDRV_PCM_INFO_NONINTERLEAVED;
+	}
+	if (substream->pcm->device & 2)
+		runtime->hw.info &= ~(SNDRV_PCM_INFO_MMAP |
+				      SNDRV_PCM_INFO_MMAP_VALID);
+	/*
+	 * For mysterious reasons (and despite what the manual says)
+	 * playback samples are lost if the DMA count is not a multiple
+	 * of the DMA burst size.  Let's add a rule to enforce that.
+	 */
+	ret = snd_pcm_hw_constraint_step(runtime, 0,
+		SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 128);
+	if (ret)
+		goto out;
+
+	ret = snd_pcm_hw_constraint_step(runtime, 0,
+		SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 128);
+	if (ret)
+		goto out;
+
+	ret = snd_pcm_hw_constraint_integer(runtime,
+					    SNDRV_PCM_HW_PARAM_PERIODS);
+	if (ret < 0)
+		goto out;
+#endif
+	ret = -ENOMEM;
+	rtd = kzalloc(sizeof(*rtd), GFP_KERNEL);
+	if (!rtd)
+		goto out;
+	//DMA descå†…å­˜åœ¨æ­¤å¤„åˆ†é…�
+	rtd->dma_desc_array =
+		dma_alloc_coherent(substream->pcm->card->dev, PAGE_SIZE,
+				       &rtd->dma_desc_array_phys, GFP_KERNEL);
+	if (!rtd->dma_desc_array)
+		goto err1;
+	//åˆ†é…�è®°å½•å½“å‰�DMAæ‰§è¡Œä½�ç½®
+	rtd->dma_desc_ready =
+		dma_alloc_coherent(substream->pcm->card->dev, 32,
+					&rtd->dma_desc_ready_phys, GFP_KERNEL);
+	if (!rtd->dma_desc_ready)
+		goto err1;
+	//è®°å½•å½“å‰�ç¡¬ä»¶ç¼“å†²åŒºçš„ä½¿ç”¨ç¨‹åº¦
+	rtd->dma_position_desc =
+		dma_alloc_coherent(substream->pcm->card->dev, 32,
+					&rtd->dma_position_desc_phys, GFP_KERNEL);
+	if (!rtd->dma_position_desc)
+		goto err1;
+
+	runtime->private_data = rtd;
+	return 0;
+
+ err1:
+	kfree(rtd);
+ out:
+	return ret;
+}
+EXPORT_SYMBOL(__ls1a_pcm_open);
+
+int __ls1a_pcm_close(struct snd_pcm_substream *substream)
+{
+	struct snd_pcm_runtime *runtime = substream->runtime;
+	struct ls1a_runtime_data *rtd = runtime->private_data;
+
+	dma_free_coherent(substream->pcm->card->dev, PAGE_SIZE,	
+			      rtd->dma_desc_array, rtd->dma_desc_array_phys);
+	kfree(rtd);
+	return 0;
+}
+EXPORT_SYMBOL(__ls1a_pcm_close);
+
+/*
+int ls1a_pcm_mmap(struct snd_pcm_substream *substream,
+	struct vm_area_struct *vma)
+{
+	struct snd_pcm_runtime *runtime = substream->runtime;
+	return dma_mmap_coherent(substream->pcm->card->dev, vma,
+				     runtime->dma_area,
+				     runtime->dma_addr,
+				     runtime->dma_bytes);
+				     
+	return 0;
+}
+EXPORT_SYMBOL(ls1a_pcm_mmap);
+*/
+
+int ls1a_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
+{
+	struct snd_pcm_substream *substream = pcm->streams[stream].substream;
+	struct snd_dma_buffer *buf = &substream->dma_buffer;
+	size_t size = ls1a_pcm_hardware.buffer_bytes_max;
+	buf->dev.type = SNDRV_DMA_TYPE_DEV;
+	buf->dev.dev = pcm->card->dev;
+	buf->private_data = NULL;
+	
+	buf->area = dma_alloc_coherent(pcm->card->dev, size,
+					   &buf->addr, GFP_KERNEL);
+	if (!buf->area){			printk("func %s,line%i\n",__func__,__LINE__);
+	
+		return -ENOMEM;
+	}
+	printk("func %s,line%i\n",__func__,__LINE__);
+	buf->bytes = size;
+	return 0;
+}
+EXPORT_SYMBOL(ls1a_pcm_preallocate_dma_buffer);
+
+void ls1a_pcm_free_dma_buffers(struct snd_pcm *pcm)
+{
+	struct snd_pcm_substream *substream;
+	struct snd_dma_buffer *buf;
+	int stream;
+
+	for (stream = 0; stream < 2; stream++) {
+		substream = pcm->streams[stream].substream;
+		if (!substream)
+			continue;
+		buf = &substream->dma_buffer;
+		if (!buf->area)
+			continue;
+		dma_free_coherent(pcm->card->dev, buf->bytes,
+				      buf->area, buf->addr);
+		buf->area = NULL;
+	}
+}
+EXPORT_SYMBOL(ls1a_pcm_free_dma_buffers);
+
+
+MODULE_AUTHOR("Nicolas Pitre");
+MODULE_DESCRIPTION("Intel PXA2xx sound library");
+MODULE_LICENSE("GPL");
diff -uNra linux-3.0.82/sound/mips/ls1a-pcm-private.h linux-3.0.82x/sound/mips/ls1a-pcm-private.h
--- linux-3.0.82/sound/mips/ls1a-pcm-private.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/sound/mips/ls1a-pcm-private.h	2017-09-23 03:42:50.374673975 +0800
@@ -0,0 +1,148 @@
+
+/*
+ * FileName:lson_ac97.h 
+ *
+ * data:
+ * descriptor:
+ * update:
+ *
+ */
+
+#ifndef FCR_AC97_H__
+#define FCR_AC97_H__
+
+#define _REG(x) 	((volatile u32 *)(x))
+#define _REG2(b,o) 	((volatile u32 *)((b)+(o)))
+
+#define LSON_AC_FMT  		AFM_S16_LE
+#define LSON_AC_MAXCHNL 	2
+
+
+#define DMA_FROMAC_DESCs 4
+#define DMA_TOAC_DESCs 4
+
+
+//AC97_controler
+#define AC97_REG(off)       _REG2(KSEG1ADDR(SB2F_AC97_REGS_BASE),(off))
+#define CSR			AC97_REG(0x00)
+#define OCCR0		AC97_REG(0x04)
+#define OCCR1		AC97_REG(0x08)
+#define OCCR2		AC97_REG(0x0C)
+#define ICCR		AC97_REG(0x10)
+#define CDC_ID      AC97_REG(0x14)
+#define CRAC		AC97_REG(0x18)
+                                       /*Reserved 0x1C Reserved*/
+#define OC0_DATA    AC97_REG(0x20)     /*20 bits WO Output Channel0 Tx buffer*/
+#define OC1_DATA    AC97_REG(0x24)     /*20 bits WO Output Channel1 Tx buffer*/
+#define OC2_DATA    AC97_REG(0x28)     /*20 bits WO Output Channel2 Tx buffer*/
+#define OC3_DATA    AC97_REG(0x2C)     /*20 bits WO Output Channel3 Tx buffer*/
+#define OC4_DATA    AC97_REG(0x30)     /*20 bits WO Output Channel4 Tx buffer*/
+#define OC5_DATA    AC97_REG(0x34)     /*20 bits WO Output Channel5 Tx buffer*/
+#define OC6_DATA    AC97_REG(0x38)     /*20 bits WO Output Channel6 Tx buffer*/
+#define OC7_DATA    AC97_REG(0x3C)     /*20 bits WO Output Channel7 Tx buffer*/
+#define OC8_DATA    AC97_REG(0x40)     /*20 bits WO Output Channel8 Tx buffer*/
+#define IC0_DATA    AC97_REG(0x44)     /*20 bits RO Input Channel0 Rx buffer*/
+#define IC1_DATA    AC97_REG(0x48)     /*20 bits RO Input Channel1 Rx buffer*/
+#define IC2_DATA    AC97_REG(0x4C)     /*20 bits RO Input Channel2 Rx buffer*/
+                                       /*Reserved AC97_REG(0x50 Reserved*/
+#define INTRAW      AC97_REG(0x54)     /*32 bits RO Interrupt RAW status*/
+#define INTM        AC97_REG(0x58)     /*32 bits R/W Interrupt Mask*/
+#define INTS        AC97_REG(0x5C)     /*32 bits RO Interrupt Masked Status*/
+#define CLR_INT     AC97_REG(0x60)     /*1 bit RO Clear Combined and Individual Interrupt*/
+#define CLR_OC_INT  AC97_REG(0x64)     /*1 bit RO Clear Output Channel Reference Interrupt*/
+#define CLR_IC_INT  AC97_REG(0x68)      /*1 bit RO Clear Input Channel Reference Interrupt*/
+#define CLR_CDC_WR  AC97_REG(0x68)      /*1 bit RO Clear Codec Write Done Interrupt*/
+#define CLR_CDC_RD  AC97_REG(0x6c)      /*1 bit RO Clear Codec Read Done Interrupt*/
+
+#define OC_DATA     OC0_DATA            /*DEFAULT */
+#define IN_DATA     IC1_DATA            /*SETTING */
+
+
+#define 	INPUT_CHANNELS	8
+#define 	OUTPUT_CHANNELS	9
+
+/*reg bits define*/ 
+#define CRAR_READ  0x80000000
+#define CRAR_WRITE 0x00000000
+#define CRAR_CODEC_REG(x)  (((x)&(0x7F))<<16)
+
+//default setting 
+#define OCCR	    OCCR0
+#define OUT_CHANNEL OC[0]
+#define IN_CHANNEL  IC[0]
+#define INTS_CRAC_MASK	0x3
+#define READ_CRAC_MASK 0x1
+#define WRITE_CRAC_MASK 0x2
+
+/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
+//
+// DMA regs
+//
+/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
+
+//#define FCR_ACDMA_REG_BASE	0x1f004280
+#define CONFREG_BASE		0xbfd00000
+#define FCR_ACDMA_REG_BASE	0x1fe74080
+//#define AC97_REG(off)       _REG2(KSEG1ADDR(FCR_AC97_REGS_BASE),(off))
+#define DMA_REG(off)  		_REG2(KSEG1ADDR(FCR_ACDMA_REG_BASE),(off))
+
+/* dma regs */
+#define DMA_ORDERED		0x0
+#define DMA_SADDR		0x1
+#define DMA_DADDR		0x2
+#define DMA_LENGTH		0x3
+#define DMA_STEP_LENGTH		0x4
+#define DMA_STEP_TIMES		0x5
+#define	DMA_CMD			0x6
+
+/* bit offset in order_addr_reg */
+#define DMA_STOP_OFF		0x4
+#define DMA_START_OFF		0x3
+#define DMA_ASKVALID_OFF	0x2
+#define DMA_DEVNUM_OFF		0x0
+
+/* define dma status */
+#define DMA_START		0x0
+#define DMA_STOP		0x1
+
+#define DMA_BUF_UPPER		0x3
+#define DMA_BUF_LOW		0x1
+
+#define AUD_WRITE_ADDR		0xdfe72420	
+#define AUD_READ_ADDR		0x9fe74c4c
+
+#define BLANK_SIZE		0x20
+
+#define ZERO_BUF_SIZE 128
+#define DESC_VALID 1
+
+/*
+ * audio private data; 
+ *
+ */
+
+
+/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ Object:
++ 1.stream/in f_ops->write /out f_ops_read
++ 2.buffers/in/out
++ 3.dma_desc /FIFO /buffers fragram
++ 4.dma_channel/to/ from devices
+*++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
+
+
+#define Z_LEN	0x8
+/*dumy*/
+typedef struct ls1a_dma_desc {
+	u32 ordered;
+	u32 saddr;
+	u32 daddr;
+	u32 length;
+	u32 step_length;
+	u32 step_times;
+	u32 dcmd;
+	u32 stats;
+} ls1a_dma_desc;
+
+
+#endif
diff -uNra linux-3.0.82/sound/mips/Makefile linux-3.0.82x/sound/mips/Makefile
--- linux-3.0.82/sound/mips/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/sound/mips/Makefile	2017-09-23 03:42:50.374673975 +0800
@@ -10,3 +10,15 @@
 obj-$(CONFIG_SND_AU1X00) += snd-au1x00.o
 obj-$(CONFIG_SND_SGI_O2) += snd-sgi-o2.o
 obj-$(CONFIG_SND_SGI_HAL2) += snd-sgi-hal2.o
+
+
+obj-$(CONFIG_SND_LS1A_PCM)      += snd-ls1a-pcm.o
+snd-ls1a-pcm-objs               := ls1a-pcm.o
+
+obj-$(CONFIG_SND_LS1A_LIB)      += snd-ls1a-lib.o
+snd-ls1a-lib-y                  := ls1a-pcm-lib.o
+snd-ls1a-lib-$(CONFIG_SND_LS1A_LIB_AC97)        += ls1a-ac97-lib.o
+
+obj-$(CONFIG_SND_LS1A_AC97)     += snd-ls1a-ac97.o
+snd-ls1a-ac97-objs              := ls1a-ac97.o
+
diff -uNra linux-3.0.82/sound/oss/ac97_codec.c linux-3.0.82x/sound/oss/ac97_codec.c
--- linux-3.0.82/sound/oss/ac97_codec.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/sound/oss/ac97_codec.c	2017-09-23 03:42:50.374673975 +0800
@@ -0,0 +1,1206 @@
+/*
+ * ac97_codec.c: Generic AC97 mixer/modem module
+ *
+ * Derived from ac97 mixer in maestro and trident driver.
+ *
+ * Copyright 2000 Silicon Integrated System Corporation
+ *
+ *	This program is free software; you can redistribute it and/or modify
+ *	it under the terms of the GNU General Public License as published by
+ *	the Free Software Foundation; either version 2 of the License, or
+ *	(at your option) any later version.
+ *
+ *	This program is distributed in the hope that it will be useful,
+ *	but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *	GNU General Public License for more details.
+ *
+ *	You should have received a copy of the GNU General Public License
+ *	along with this program; if not, write to the Free Software
+ *	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ **************************************************************************
+ *
+ * The Intel Audio Codec '97 specification is available at the Intel
+ * audio homepage: http://developer.intel.com/ial/scalableplatforms/audio/
+ *
+ * The specification itself is currently available at:
+ * ftp://download.intel.com/ial/scalableplatforms/ac97r22.pdf
+ *
+ **************************************************************************
+ *
+ * History
+ * May 02, 2003 Liam Girdwood <lrg@slimlogic.co.uk>
+ *	Removed non existant WM9700
+ *	Added support for WM9705, WM9708, WM9709, WM9710, WM9711
+ *	WM9712 and WM9717
+ * Mar 28, 2002 Randolph Bentson <bentson@holmsjoen.com>
+ *	corrections to support WM9707 in ViewPad 1000
+ * v0.4 Mar 15 2000 Ollie Lho
+ *	dual codecs support verified with 4 channels output
+ * v0.3 Feb 22 2000 Ollie Lho
+ *	bug fix for record mask setting
+ * v0.2 Feb 10 2000 Ollie Lho
+ *	add ac97_read_proc for /proc/driver/{vendor}/ac97
+ * v0.1 Jan 14 2000 Ollie Lho <ollie@sis.com.tw> 
+ *	Isolated from trident.c to support multiple ac97 codec
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/string.h>
+#include <linux/errno.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
+#include <linux/pci.h>
+#include <linux/ac97_codec.h>
+#include <asm/uaccess.h>
+#include <linux/mutex.h>
+
+#define CODEC_ID_BUFSZ 14
+
+static int ac97_read_mixer(struct ac97_codec *codec, int oss_channel);
+static void ac97_write_mixer(struct ac97_codec *codec, int oss_channel, 
+			     unsigned int left, unsigned int right);
+static void ac97_set_mixer(struct ac97_codec *codec, unsigned int oss_mixer, unsigned int val );
+static int ac97_recmask_io(struct ac97_codec *codec, int rw, int mask);
+static int ac97_mixer_ioctl(struct ac97_codec *codec, unsigned int cmd, unsigned long arg);
+
+static int ac97_init_mixer(struct ac97_codec *codec);
+
+static int wolfson_init03(struct ac97_codec * codec);
+static int wolfson_init04(struct ac97_codec * codec);
+static int wolfson_init05(struct ac97_codec * codec);
+static int wolfson_init11(struct ac97_codec * codec);
+static int wolfson_init13(struct ac97_codec * codec);
+static int tritech_init(struct ac97_codec * codec);
+static int tritech_maestro_init(struct ac97_codec * codec);
+static int sigmatel_9708_init(struct ac97_codec *codec);
+static int sigmatel_9721_init(struct ac97_codec *codec);
+static int sigmatel_9744_init(struct ac97_codec *codec);
+static int ad1886_init(struct ac97_codec *codec);
+static int eapd_control(struct ac97_codec *codec, int);
+static int crystal_digital_control(struct ac97_codec *codec, int slots, int rate, int mode);
+static int cmedia_init(struct ac97_codec * codec);
+static int cmedia_digital_control(struct ac97_codec *codec, int slots, int rate, int mode);
+static int generic_digital_control(struct ac97_codec *codec, int slots, int rate, int mode);
+
+
+/*
+ *	AC97 operations.
+ *
+ *	If you are adding a codec then you should be able to use
+ *		eapd_ops - any codec that supports EAPD amp control (most)
+ *		null_ops - any ancient codec that supports nothing
+ *
+ *	The three functions are
+ *		init - used for non AC97 standard initialisation
+ *		amplifier - used to do amplifier control (1=on 0=off)
+ *		digital - switch to digital modes (0 = analog)
+ *
+ *	Not all codecs support all features, not all drivers use all the
+ *	operations yet
+ */
+ 
+static struct ac97_ops null_ops = { NULL, NULL, NULL };
+static struct ac97_ops default_ops = { NULL, eapd_control, NULL };
+static struct ac97_ops default_digital_ops = { NULL, eapd_control, generic_digital_control};
+static struct ac97_ops wolfson_ops03 = { wolfson_init03, NULL, NULL };
+static struct ac97_ops wolfson_ops04 = { wolfson_init04, NULL, NULL };
+static struct ac97_ops wolfson_ops05 = { wolfson_init05, NULL, NULL };
+static struct ac97_ops wolfson_ops11 = { wolfson_init11, NULL, NULL };
+static struct ac97_ops wolfson_ops13 = { wolfson_init13, NULL, NULL };
+static struct ac97_ops tritech_ops = { tritech_init, NULL, NULL };
+static struct ac97_ops tritech_m_ops = { tritech_maestro_init, NULL, NULL };
+static struct ac97_ops sigmatel_9708_ops = { sigmatel_9708_init, NULL, NULL };
+static struct ac97_ops sigmatel_9721_ops = { sigmatel_9721_init, NULL, NULL };
+static struct ac97_ops sigmatel_9744_ops = { sigmatel_9744_init, NULL, NULL };
+static struct ac97_ops crystal_digital_ops = { NULL, eapd_control, crystal_digital_control };
+static struct ac97_ops ad1886_ops = { ad1886_init, eapd_control, NULL };
+static struct ac97_ops cmedia_ops = { NULL, eapd_control, NULL};
+static struct ac97_ops cmedia_digital_ops = { cmedia_init, eapd_control, cmedia_digital_control};
+
+/* sorted by vendor/device id */
+static const struct {
+	u32 id;
+	char *name;
+	struct ac97_ops *ops;
+	int flags;
+} ac97_codec_ids[] = {
+	{0x41445303, "Analog Devices AD1819",	&null_ops},
+	{0x41445340, "Analog Devices AD1881",	&null_ops},
+	{0x41445348, "Analog Devices AD1881A",	&null_ops},
+	{0x41445360, "Analog Devices AD1885",	&default_ops},
+	{0x41445361, "Analog Devices AD1886",	&ad1886_ops},
+	{0x41445370, "Analog Devices AD1981",	&null_ops},
+	{0x41445372, "Analog Devices AD1981A",	&null_ops},
+	{0x41445374, "Analog Devices AD1981B",	&null_ops},
+	{0x41445460, "Analog Devices AD1885",	&default_ops},
+	{0x41445461, "Analog Devices AD1886",	&ad1886_ops},
+	{0x414B4D00, "Asahi Kasei AK4540",	&null_ops},
+	{0x414B4D01, "Asahi Kasei AK4542",	&null_ops},
+	{0x414B4D02, "Asahi Kasei AK4543",	&null_ops},
+	{0x414C4326, "ALC100P",			&null_ops},
+	{0x414C4710, "ALC200/200P",		&null_ops},
+	{0x414C4720, "ALC650",			&default_digital_ops},
+	{0x434D4941, "CMedia",			&cmedia_ops,		AC97_NO_PCM_VOLUME },
+	{0x434D4942, "CMedia",			&cmedia_ops,		AC97_NO_PCM_VOLUME },
+	{0x434D4961, "CMedia",			&cmedia_digital_ops,	AC97_NO_PCM_VOLUME },
+	{0x43525900, "Cirrus Logic CS4297",	&default_ops},
+	{0x43525903, "Cirrus Logic CS4297",	&default_ops},
+	{0x43525913, "Cirrus Logic CS4297A rev A", &default_ops},
+	{0x43525914, "Cirrus Logic CS4297A rev B", &default_ops},
+	{0x43525923, "Cirrus Logic CS4298",	&null_ops},
+	{0x4352592B, "Cirrus Logic CS4294",	&null_ops},
+	{0x4352592D, "Cirrus Logic CS4294",	&null_ops},
+	{0x43525931, "Cirrus Logic CS4299 rev A", &crystal_digital_ops},
+	{0x43525933, "Cirrus Logic CS4299 rev C", &crystal_digital_ops},
+	{0x43525934, "Cirrus Logic CS4299 rev D", &crystal_digital_ops},
+	{0x43585430, "CXT48",			&default_ops,		AC97_DELUDED_MODEM },
+	{0x43585442, "CXT66",			&default_ops,		AC97_DELUDED_MODEM },
+	{0x44543031, "Diamond Technology DT0893", &default_ops},
+	{0x45838308, "ESS Allegro ES1988",	&null_ops},
+	{0x49434511, "ICE1232",			&null_ops}, /* I hope --jk */
+	{0x4e534331, "National Semiconductor LM4549", &null_ops},
+	{0x53494c22, "Silicon Laboratory Si3036", &null_ops},
+	{0x53494c23, "Silicon Laboratory Si3038", &null_ops},
+	{0x545200FF, "TriTech TR?????",		&tritech_m_ops},
+	{0x54524102, "TriTech TR28022",		&null_ops},
+	{0x54524103, "TriTech TR28023",		&null_ops},
+	{0x54524106, "TriTech TR28026",		&null_ops},
+	{0x54524108, "TriTech TR28028",		&tritech_ops},
+	{0x54524123, "TriTech TR A5",		&null_ops},
+	{0x574D4C03, "Wolfson WM9703/07/08/17",	&wolfson_ops03},
+	{0x574D4C04, "Wolfson WM9704M/WM9704Q",	&wolfson_ops04},
+	{0x574D4C05, "Wolfson WM9705/WM9710",   &wolfson_ops05},
+	{0x574D4C09, "Wolfson WM9709",		&null_ops},
+	{0x574D4C12, "Wolfson WM9711/9712",	&wolfson_ops11},
+	{0x574D4C13, "Wolfson WM9713",	&wolfson_ops13, AC97_DEFAULT_POWER_OFF},
+	{0x83847600, "SigmaTel STAC????",	&null_ops},
+	{0x83847604, "SigmaTel STAC9701/3/4/5", &null_ops},
+	{0x83847605, "SigmaTel STAC9704",	&null_ops},
+	{0x83847608, "SigmaTel STAC9708",	&sigmatel_9708_ops},
+	{0x83847609, "SigmaTel STAC9721/23",	&sigmatel_9721_ops},
+	{0x83847644, "SigmaTel STAC9744/45",	&sigmatel_9744_ops},
+	{0x83847652, "SigmaTel STAC9752/53",	&default_ops},
+	{0x83847656, "SigmaTel STAC9756/57",	&sigmatel_9744_ops},
+	{0x83847666, "SigmaTel STAC9750T",	&sigmatel_9744_ops},
+	{0x83847684, "SigmaTel STAC9783/84?",	&null_ops},
+	{0x57454301, "Winbond 83971D",		&null_ops},
+};
+
+/* this table has default mixer values for all OSS mixers. */
+static struct mixer_defaults {
+	int mixer;
+	unsigned int value;
+} mixer_defaults[SOUND_MIXER_NRDEVICES] = {
+	/* all values 0 -> 100 in bytes */
+	{SOUND_MIXER_VOLUME,	0x4343},
+	{SOUND_MIXER_BASS,	0x4343},
+	{SOUND_MIXER_TREBLE,	0x4343},
+	{SOUND_MIXER_PCM,	0x4343},
+	{SOUND_MIXER_SPEAKER,	0x4343},
+	{SOUND_MIXER_LINE,	0x4343},
+	{SOUND_MIXER_MIC,	0x0000},
+	{SOUND_MIXER_CD,	0x4343},
+	{SOUND_MIXER_ALTPCM,	0x4343},
+	{SOUND_MIXER_IGAIN,	0x4343},
+	{SOUND_MIXER_LINE1,	0x4343},
+	{SOUND_MIXER_PHONEIN,	0x4343},
+	{SOUND_MIXER_PHONEOUT,	0x4343},
+	{SOUND_MIXER_VIDEO,	0x4343},
+	{-1,0}
+};
+
+/* table to scale scale from OSS mixer value to AC97 mixer register value */	
+static struct ac97_mixer_hw {
+	unsigned char offset;
+	int scale;
+} ac97_hw[SOUND_MIXER_NRDEVICES]= {
+	[SOUND_MIXER_VOLUME]	=	{AC97_MASTER_VOL_STEREO,64},
+	[SOUND_MIXER_BASS]	=	{AC97_MASTER_TONE,	16},
+	[SOUND_MIXER_TREBLE]	=	{AC97_MASTER_TONE,	16},
+	[SOUND_MIXER_PCM]	=	{AC97_PCMOUT_VOL,	32},
+	[SOUND_MIXER_SPEAKER]	=	{AC97_PCBEEP_VOL,	16},
+	[SOUND_MIXER_LINE]	=	{AC97_LINEIN_VOL,	32},
+	[SOUND_MIXER_MIC]	=	{AC97_MIC_VOL,		32},
+	[SOUND_MIXER_CD]	=	{AC97_CD_VOL,		32},
+	[SOUND_MIXER_ALTPCM]	=	{AC97_HEADPHONE_VOL,	64},
+	[SOUND_MIXER_IGAIN]	=	{AC97_RECORD_GAIN,	16},
+	[SOUND_MIXER_LINE1]	=	{AC97_AUX_VOL,		32},
+	[SOUND_MIXER_PHONEIN]	= 	{AC97_PHONE_VOL,	32},
+	[SOUND_MIXER_PHONEOUT]	= 	{AC97_MASTER_VOL_MONO,	64},
+	[SOUND_MIXER_VIDEO]	=	{AC97_VIDEO_VOL,	32},
+};
+
+/* the following tables allow us to go from OSS <-> ac97 quickly. */
+enum ac97_recsettings {
+	AC97_REC_MIC=0,
+	AC97_REC_CD,
+	AC97_REC_VIDEO,
+	AC97_REC_AUX,
+	AC97_REC_LINE,
+	AC97_REC_STEREO, /* combination of all enabled outputs..  */
+	AC97_REC_MONO,	      /*.. or the mono equivalent */
+	AC97_REC_PHONE
+};
+
+static const unsigned int ac97_rm2oss[] = {
+	[AC97_REC_MIC] 	 = SOUND_MIXER_MIC,
+	[AC97_REC_CD] 	 = SOUND_MIXER_CD,
+	[AC97_REC_VIDEO] = SOUND_MIXER_VIDEO,
+	[AC97_REC_AUX] 	 = SOUND_MIXER_LINE1,
+	[AC97_REC_LINE]  = SOUND_MIXER_LINE,
+	[AC97_REC_STEREO]= SOUND_MIXER_IGAIN,
+	[AC97_REC_PHONE] = SOUND_MIXER_PHONEIN
+};
+
+/* indexed by bit position */
+static const unsigned int ac97_oss_rm[] = {
+	[SOUND_MIXER_MIC] 	= AC97_REC_MIC,
+	[SOUND_MIXER_CD] 	= AC97_REC_CD,
+	[SOUND_MIXER_VIDEO] 	= AC97_REC_VIDEO,
+	[SOUND_MIXER_LINE1] 	= AC97_REC_AUX,
+	[SOUND_MIXER_LINE] 	= AC97_REC_LINE,
+	[SOUND_MIXER_IGAIN]	= AC97_REC_STEREO,
+	[SOUND_MIXER_PHONEIN] 	= AC97_REC_PHONE
+};
+
+static LIST_HEAD(codecs);
+static LIST_HEAD(codec_drivers);
+static DEFINE_MUTEX(codec_mutex);
+
+/* reads the given OSS mixer from the ac97 the caller must have insured that the ac97 knows
+   about that given mixer, and should be holding a spinlock for the card */
+static int ac97_read_mixer(struct ac97_codec *codec, int oss_channel) 
+{
+	u16 val;
+	int ret = 0;
+	int scale;
+	struct ac97_mixer_hw *mh = &ac97_hw[oss_channel];
+
+	val = codec->codec_read(codec , mh->offset);
+
+	if (val & AC97_MUTE) {
+		ret = 0;
+	} else if (AC97_STEREO_MASK & (1 << oss_channel)) {
+		/* nice stereo mixers .. */
+		int left,right;
+
+		left = (val >> 8)  & 0x7f;
+		right = val  & 0x7f;
+
+		if (oss_channel == SOUND_MIXER_IGAIN) {
+			right = (right * 100) / mh->scale;
+			left = (left * 100) / mh->scale;
+		} else {
+			/* these may have 5 or 6 bit resolution */
+			if(oss_channel == SOUND_MIXER_VOLUME || oss_channel == SOUND_MIXER_ALTPCM)
+				scale = (1 << codec->bit_resolution);
+			else
+				scale = mh->scale;
+
+			right = 100 - ((right * 100) / scale);
+			left = 100 - ((left * 100) / scale);
+		}
+		ret = left | (right << 8);
+	} else if (oss_channel == SOUND_MIXER_SPEAKER) {
+		ret = 100 - ((((val & 0x1e)>>1) * 100) / mh->scale);
+	} else if (oss_channel == SOUND_MIXER_PHONEIN) {
+		ret = 100 - (((val & 0x1f) * 100) / mh->scale);
+	} else if (oss_channel == SOUND_MIXER_PHONEOUT) {
+		scale = (1 << codec->bit_resolution);
+		ret = 100 - (((val & 0x1f) * 100) / scale);
+	} else if (oss_channel == SOUND_MIXER_MIC) {
+		ret = 100 - (((val & 0x1f) * 100) / mh->scale);
+		/*  the low bit is optional in the tone sliders and masking
+		    it lets us avoid the 0xf 'bypass'.. */
+	} else if (oss_channel == SOUND_MIXER_BASS) {
+		ret = 100 - ((((val >> 8) & 0xe) * 100) / mh->scale);
+	} else if (oss_channel == SOUND_MIXER_TREBLE) {
+		ret = 100 - (((val & 0xe) * 100) / mh->scale);
+	}
+
+#ifdef DEBUG
+	printk("ac97_codec: read OSS mixer %2d (%s ac97 register 0x%02x), "
+	       "0x%04x -> 0x%04x\n",
+	       oss_channel, codec->id ? "Secondary" : "Primary",
+	       mh->offset, val, ret);
+#endif
+
+	return ret;
+}
+
+/* write the OSS encoded volume to the given OSS encoded mixer, again caller's job to
+   make sure all is well in arg land, call with spinlock held */
+static void ac97_write_mixer(struct ac97_codec *codec, int oss_channel,
+		      unsigned int left, unsigned int right)
+{
+	u16 val = 0;
+	int scale;
+	struct ac97_mixer_hw *mh = &ac97_hw[oss_channel];
+
+#ifdef DEBUG
+	printk("ac97_codec: wrote OSS mixer %2d (%s ac97 register 0x%02x), "
+	       "left vol:%2d, right vol:%2d:",
+	       oss_channel, codec->id ? "Secondary" : "Primary",
+	       mh->offset, left, right);
+#endif
+
+	if (AC97_STEREO_MASK & (1 << oss_channel)) {
+		/* stereo mixers */
+		if (left == 0 && right == 0) {
+			val = AC97_MUTE;
+		} else {
+			if (oss_channel == SOUND_MIXER_IGAIN) {
+				right = (right * mh->scale) / 100;
+				left = (left * mh->scale) / 100;
+				if (right >= mh->scale)
+					right = mh->scale-1;
+				if (left >= mh->scale)
+					left = mh->scale-1;
+			} else {
+				/* these may have 5 or 6 bit resolution */
+				if (oss_channel == SOUND_MIXER_VOLUME ||
+				    oss_channel == SOUND_MIXER_ALTPCM)
+					scale = (1 << codec->bit_resolution);
+				else
+					scale = mh->scale;
+
+				right = ((100 - right) * scale) / 100;
+				left = ((100 - left) * scale) / 100;
+				if (right >= scale)
+					right = scale-1;
+				if (left >= scale)
+					left = scale-1;
+			}
+			val = (left << 8) | right;
+		}
+	} else if (oss_channel == SOUND_MIXER_BASS) {
+		val = codec->codec_read(codec , mh->offset) & ~0x0f00;
+		left = ((100 - left) * mh->scale) / 100;
+		if (left >= mh->scale)
+			left = mh->scale-1;
+		val |= (left << 8) & 0x0e00;
+	} else if (oss_channel == SOUND_MIXER_TREBLE) {
+		val = codec->codec_read(codec , mh->offset) & ~0x000f;
+		left = ((100 - left) * mh->scale) / 100;
+		if (left >= mh->scale)
+			left = mh->scale-1;
+		val |= left & 0x000e;
+	} else if(left == 0) {
+		val = AC97_MUTE;
+	} else if (oss_channel == SOUND_MIXER_SPEAKER) {
+		left = ((100 - left) * mh->scale) / 100;
+		if (left >= mh->scale)
+			left = mh->scale-1;
+		val = left << 1;
+	} else if (oss_channel == SOUND_MIXER_PHONEIN) {
+		left = ((100 - left) * mh->scale) / 100;
+		if (left >= mh->scale)
+			left = mh->scale-1;
+		val = left;
+	} else if (oss_channel == SOUND_MIXER_PHONEOUT) {
+		scale = (1 << codec->bit_resolution);
+		left = ((100 - left) * scale) / 100;
+		if (left >= mh->scale)
+			left = mh->scale-1;
+		val = left;
+	} else if (oss_channel == SOUND_MIXER_MIC) {
+		val = codec->codec_read(codec , mh->offset) & ~0x801f;
+		left = ((100 - left) * mh->scale) / 100;
+		if (left >= mh->scale)
+			left = mh->scale-1;
+		val |= left;
+		/*  the low bit is optional in the tone sliders and masking
+		    it lets us avoid the 0xf 'bypass'.. */
+	}
+#ifdef DEBUG
+	printk(" 0x%04x", val);
+#endif
+
+	codec->codec_write(codec, mh->offset, val);
+
+#ifdef DEBUG
+	val = codec->codec_read(codec, mh->offset);
+	printk(" -> 0x%04x\n", val);
+#endif
+}
+
+/* a thin wrapper for write_mixer */
+static void ac97_set_mixer(struct ac97_codec *codec, unsigned int oss_mixer, unsigned int val ) 
+{
+	unsigned int left,right;
+
+	/* cleanse input a little */
+	right = ((val >> 8)  & 0xff) ;
+	left = (val  & 0xff) ;
+
+	if (right > 100) right = 100;
+	if (left > 100) left = 100;
+
+	codec->mixer_state[oss_mixer] = (right << 8) | left;
+	codec->write_mixer(codec, oss_mixer, left, right);
+}
+
+/* read or write the recmask, the ac97 can really have left and right recording
+   inputs independantly set, but OSS doesn't seem to want us to express that to
+   the user. the caller guarantees that we have a supported bit set, and they
+   must be holding the card's spinlock */
+static int ac97_recmask_io(struct ac97_codec *codec, int rw, int mask) 
+{
+	unsigned int val;
+
+	if (rw) {
+		/* read it from the card */
+		val = codec->codec_read(codec, AC97_RECORD_SELECT);
+#ifdef DEBUG
+		printk("ac97_codec: ac97 recmask to set to 0x%04x\n", val);
+#endif
+		return (1 << ac97_rm2oss[val & 0x07]);
+	}
+
+	/* else, write the first set in the mask as the
+	   output */	
+	/* clear out current set value first (AC97 supports only 1 input!) */
+	val = (1 << ac97_rm2oss[codec->codec_read(codec, AC97_RECORD_SELECT) & 0x07]);
+	if (mask != val)
+	    mask &= ~val;
+       
+	val = ffs(mask); 
+	val = ac97_oss_rm[val-1];
+	val |= val << 8;  /* set both channels */
+
+#ifdef DEBUG
+	printk("ac97_codec: setting ac97 recmask to 0x%04x\n", val);
+#endif
+
+	codec->codec_write(codec, AC97_RECORD_SELECT, val);
+
+	return 0;
+};
+
+static int ac97_mixer_ioctl(struct ac97_codec *codec, unsigned int cmd, unsigned long arg)
+{
+	int i, val = 0;
+
+	if (cmd == SOUND_MIXER_INFO) {
+		mixer_info info;
+		memset(&info, 0, sizeof(info));
+		strlcpy(info.id, codec->name, sizeof(info.id));
+		strlcpy(info.name, codec->name, sizeof(info.name));
+		info.modify_counter = codec->modcnt;
+		if (copy_to_user((void __user *)arg, &info, sizeof(info)))
+			return -EFAULT;
+		return 0;
+	}
+	if (cmd == SOUND_OLD_MIXER_INFO) {
+		_old_mixer_info info;
+		memset(&info, 0, sizeof(info));
+		strlcpy(info.id, codec->name, sizeof(info.id));
+		strlcpy(info.name, codec->name, sizeof(info.name));
+		if (copy_to_user((void __user *)arg, &info, sizeof(info)))
+			return -EFAULT;
+		return 0;
+	}
+
+	if (_IOC_TYPE(cmd) != 'M' || _SIOC_SIZE(cmd) != sizeof(int))
+		return -EINVAL;
+
+	if (cmd == OSS_GETVERSION)
+		return put_user(SOUND_VERSION, (int __user *)arg);
+
+	if (_SIOC_DIR(cmd) == _SIOC_READ) {
+		switch (_IOC_NR(cmd)) {
+		case SOUND_MIXER_RECSRC: /* give them the current record source */
+			if (!codec->recmask_io) {
+				val = 0;
+			} else {
+				val = codec->recmask_io(codec, 1, 0);
+			}
+			break;
+
+		case SOUND_MIXER_DEVMASK: /* give them the supported mixers */
+			val = codec->supported_mixers;
+			break;
+
+		case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
+			val = codec->record_sources;
+			break;
+
+		case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
+			val = codec->stereo_mixers;
+			break;
+
+		case SOUND_MIXER_CAPS:
+			val = SOUND_CAP_EXCL_INPUT;
+			break;
+
+		default: /* read a specific mixer */
+			i = _IOC_NR(cmd);
+
+			if (!supported_mixer(codec, i)) 
+				return -EINVAL;
+
+			/* do we ever want to touch the hardware? */
+		        /* val = codec->read_mixer(codec, i); */
+			val = codec->mixer_state[i];
+ 			break;
+		}
+		return put_user(val, (int __user *)arg);
+	}
+
+	if (_SIOC_DIR(cmd) == (_SIOC_WRITE|_SIOC_READ)) {
+		codec->modcnt++;
+		if (get_user(val, (int __user *)arg))
+			return -EFAULT;
+
+		switch (_IOC_NR(cmd)) {
+		case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
+			if (!codec->recmask_io) return -EINVAL;
+			if (!val) return 0;
+			if (!(val &= codec->record_sources)) return -EINVAL;
+
+			codec->recmask_io(codec, 0, val);
+
+			return 0;
+		default: /* write a specific mixer */
+			i = _IOC_NR(cmd);
+
+			if (!supported_mixer(codec, i)) 
+				return -EINVAL;
+
+			ac97_set_mixer(codec, i, val);
+
+			return 0;
+		}
+	}
+	return -EINVAL;
+}
+
+/**
+ *	codec_id	-  Turn id1/id2 into a PnP string
+ *	@id1: Vendor ID1
+ *	@id2: Vendor ID2
+ *	@buf: CODEC_ID_BUFSZ byte buffer
+ *
+ *	Fills buf with a zero terminated PnP ident string for the id1/id2
+ *	pair. For convenience the return is the passed in buffer pointer.
+ */
+ 
+static char *codec_id(u16 id1, u16 id2, char *buf)
+{
+	if(id1&0x8080) {
+		snprintf(buf, CODEC_ID_BUFSZ, "0x%04x:0x%04x", id1, id2);
+	} else {
+		buf[0] = (id1 >> 8);
+		buf[1] = (id1 & 0xFF);
+		buf[2] = (id2 >> 8);
+		snprintf(buf+3, CODEC_ID_BUFSZ - 3, "%d", id2&0xFF);
+	}
+	return buf;
+}
+ 
+/**
+ *	ac97_check_modem - Check if the Codec is a modem
+ *	@codec: codec to check
+ *
+ *	Return true if the device is an AC97 1.0 or AC97 2.0 modem
+ */
+ 
+static int ac97_check_modem(struct ac97_codec *codec)
+{
+	/* Check for an AC97 1.0 soft modem (ID1) */
+	if(codec->codec_read(codec, AC97_RESET) & 2)
+		return 1;
+	/* Check for an AC97 2.x soft modem */
+	codec->codec_write(codec, AC97_EXTENDED_MODEM_ID, 0L);
+	if(codec->codec_read(codec, AC97_EXTENDED_MODEM_ID) & 1)
+		return 1;
+	return 0;
+}
+
+
+/**
+ *	ac97_alloc_codec - Allocate an AC97 codec
+ *
+ *	Returns a new AC97 codec structure. AC97 codecs may become
+ *	refcounted soon so this interface is needed. Returns with
+ *	one reference taken.
+ */
+ 
+struct ac97_codec *ac97_alloc_codec(void)
+{
+	struct ac97_codec *codec = kzalloc(sizeof(struct ac97_codec), GFP_KERNEL);
+	if(!codec)
+		return NULL;
+
+	spin_lock_init(&codec->lock);
+	INIT_LIST_HEAD(&codec->list);
+	return codec;
+}
+
+EXPORT_SYMBOL(ac97_alloc_codec);
+
+/**
+ *	ac97_release_codec -	Release an AC97 codec
+ *	@codec: codec to release
+ *
+ *	Release an allocated AC97 codec. This will be refcounted in
+ *	time but for the moment is trivial. Calls the unregister
+ *	handler if the codec is now defunct.
+ */
+ 
+void ac97_release_codec(struct ac97_codec *codec)
+{
+	/* Remove from the list first, we don't want to be
+	   "rediscovered" */
+	mutex_lock(&codec_mutex);
+	list_del(&codec->list);
+	mutex_unlock(&codec_mutex);
+	/*
+	 *	The driver needs to deal with internal
+	 *	locking to avoid accidents here. 
+	 */
+	if(codec->driver)
+		codec->driver->remove(codec, codec->driver);
+	kfree(codec);
+}
+
+EXPORT_SYMBOL(ac97_release_codec);
+
+/**
+ *	ac97_probe_codec - Initialize and setup AC97-compatible codec
+ *	@codec: (in/out) Kernel info for a single AC97 codec
+ *
+ *	Reset the AC97 codec, then initialize the mixer and
+ *	the rest of the @codec structure.
+ *
+ *	The codec_read and codec_write fields of @codec are
+ *	required to be setup and working when this function
+ *	is called.  All other fields are set by this function.
+ *
+ *	codec_wait field of @codec can optionally be provided
+ *	when calling this function.  If codec_wait is not %NULL,
+ *	this function will call codec_wait any time it is
+ *	necessary to wait for the audio chip to reach the
+ *	codec-ready state.  If codec_wait is %NULL, then
+ *	the default behavior is to call schedule_timeout.
+ *	Currently codec_wait is used to wait for AC97 codec
+ *	reset to complete. 
+ *
+ *     Some codecs will power down when a register reset is
+ *     performed. We now check for such codecs.
+ *
+ *	Returns 1 (true) on success, or 0 (false) on failure.
+ */
+ 
+int ac97_probe_codec(struct ac97_codec *codec)
+{
+	u16 id1, id2;
+	u16 audio;
+	int i;
+	char cidbuf[CODEC_ID_BUFSZ];
+	u16 f;
+	struct list_head *l;
+	struct ac97_driver *d;
+	
+	/* wait for codec-ready state */
+	if (codec->codec_wait)
+		codec->codec_wait(codec);
+	else
+		udelay(10);
+
+	/* will the codec power down if register reset ? */
+	id1 = codec->codec_read(codec, AC97_VENDOR_ID1);
+	id2 = codec->codec_read(codec, AC97_VENDOR_ID2);
+	codec->name = NULL;
+	codec->codec_ops = &null_ops;
+	for (i = 0; i < ARRAY_SIZE(ac97_codec_ids); i++) {
+		if (ac97_codec_ids[i].id == ((id1 << 16) | id2)) {
+			codec->type = ac97_codec_ids[i].id;
+			codec->name = ac97_codec_ids[i].name;
+			codec->codec_ops = ac97_codec_ids[i].ops;
+			codec->flags = ac97_codec_ids[i].flags;
+			break;
+		}
+	}
+
+	codec->model = (id1 << 16) | id2;
+	if ((codec->flags & AC97_DEFAULT_POWER_OFF) == 0) {
+		/* reset codec and wait for the ready bit before we continue */
+		codec->codec_write(codec, AC97_RESET, 0L);
+		if (codec->codec_wait)
+			codec->codec_wait(codec);
+		else
+			udelay(10);
+	}
+
+	/* probing AC97 codec, AC97 2.0 says that bit 15 of register 0x00 (reset) should
+	 * be read zero.
+	 *
+	 * FIXME: is the following comment outdated?  -jgarzik
+	 * Probing of AC97 in this way is not reliable, it is not even SAFE !!
+	 */
+	if ((audio = codec->codec_read(codec, AC97_RESET)) & 0x8000) {
+		printk(KERN_ERR "ac97_codec: %s ac97 codec not present\n",
+		       (codec->id & 0x2) ? (codec->id&1 ? "4th" : "Tertiary")
+		       : (codec->id&1 ? "Secondary":  "Primary"));
+		return 0;
+	}
+	
+	/* probe for Modem Codec */
+	codec->modem = ac97_check_modem(codec);
+
+	/* enable SPDIF */
+	f = codec->codec_read(codec, AC97_EXTENDED_STATUS);
+	if((codec->codec_ops == &null_ops) && (f & 4))
+		codec->codec_ops = &default_digital_ops;
+	
+	/* A device which thinks its a modem but isnt */
+	if(codec->flags & AC97_DELUDED_MODEM)
+		codec->modem = 0;
+		
+	if (codec->name == NULL)
+		codec->name = "Unknown";
+	printk(KERN_INFO "ac97_codec: AC97 %s codec, id: %s (%s)\n", 
+		codec->modem ? "Modem" : (audio ? "Audio" : ""),
+	       codec_id(id1, id2, cidbuf), codec->name);
+
+	if(!ac97_init_mixer(codec))
+		return 0;
+		
+	/* 
+	 *	Attach last so the caller can override the mixer
+	 *	callbacks.
+	 */
+	 
+	mutex_lock(&codec_mutex);
+	list_add(&codec->list, &codecs);
+
+	list_for_each(l, &codec_drivers) {
+		d = list_entry(l, struct ac97_driver, list);
+		if ((codec->model ^ d->codec_id) & d->codec_mask)
+			continue;
+		if(d->probe(codec, d) == 0)
+		{
+			codec->driver = d;
+			break;
+		}
+	}
+
+	mutex_unlock(&codec_mutex);
+	return 1;
+}
+
+static int ac97_init_mixer(struct ac97_codec *codec)
+{
+	u16 cap;
+	int i;
+
+	cap = codec->codec_read(codec, AC97_RESET);
+
+	/* mixer masks */
+	codec->supported_mixers = AC97_SUPPORTED_MASK;
+	codec->stereo_mixers = AC97_STEREO_MASK;
+	codec->record_sources = AC97_RECORD_MASK;
+	if (!(cap & 0x04))
+		codec->supported_mixers &= ~(SOUND_MASK_BASS|SOUND_MASK_TREBLE);
+	if (!(cap & 0x10))
+		codec->supported_mixers &= ~SOUND_MASK_ALTPCM;
+
+
+	/* detect bit resolution */
+	codec->codec_write(codec, AC97_MASTER_VOL_STEREO, 0x2020);
+	if(codec->codec_read(codec, AC97_MASTER_VOL_STEREO) == 0x2020)
+		codec->bit_resolution = 6;
+	else
+		codec->bit_resolution = 5;
+
+	/* generic OSS to AC97 wrapper */
+	codec->read_mixer = ac97_read_mixer;
+	codec->write_mixer = ac97_write_mixer;
+	codec->recmask_io = ac97_recmask_io;
+	codec->mixer_ioctl = ac97_mixer_ioctl;
+
+	/* initialize mixer channel volumes */
+	for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
+		struct mixer_defaults *md = &mixer_defaults[i];
+		if (md->mixer == -1) 
+			break;
+		if (!supported_mixer(codec, md->mixer)) 
+			continue;
+		ac97_set_mixer(codec, md->mixer, md->value);
+	}
+
+	/* codec specific initialization for 4-6 channel output or secondary codec stuff */
+	if (codec->codec_ops->init != NULL) {
+		codec->codec_ops->init(codec);
+	}
+
+	/*
+	 *	Volume is MUTE only on this device. We have to initialise
+	 *	it but its useless beyond that.
+	 */
+	if(codec->flags & AC97_NO_PCM_VOLUME)
+	{
+		codec->supported_mixers &= ~SOUND_MASK_PCM;
+		printk(KERN_WARNING "AC97 codec does not have proper volume support.\n");
+	}
+	return 1;
+}
+
+#define AC97_SIGMATEL_ANALOG    0x6c	/* Analog Special */
+#define AC97_SIGMATEL_DAC2INVERT 0x6e
+#define AC97_SIGMATEL_BIAS1     0x70
+#define AC97_SIGMATEL_BIAS2     0x72
+#define AC97_SIGMATEL_MULTICHN  0x74	/* Multi-Channel programming */
+#define AC97_SIGMATEL_CIC1      0x76
+#define AC97_SIGMATEL_CIC2      0x78
+
+
+static int sigmatel_9708_init(struct ac97_codec * codec)
+{
+	u16 codec72, codec6c;
+
+	codec72 = codec->codec_read(codec, AC97_SIGMATEL_BIAS2) & 0x8000;
+	codec6c = codec->codec_read(codec, AC97_SIGMATEL_ANALOG);
+
+	if ((codec72==0) && (codec6c==0)) {
+		codec->codec_write(codec, AC97_SIGMATEL_CIC1, 0xabba);
+		codec->codec_write(codec, AC97_SIGMATEL_CIC2, 0x1000);
+		codec->codec_write(codec, AC97_SIGMATEL_BIAS1, 0xabba);
+		codec->codec_write(codec, AC97_SIGMATEL_BIAS2, 0x0007);
+	} else if ((codec72==0x8000) && (codec6c==0)) {
+		codec->codec_write(codec, AC97_SIGMATEL_CIC1, 0xabba);
+		codec->codec_write(codec, AC97_SIGMATEL_CIC2, 0x1001);
+		codec->codec_write(codec, AC97_SIGMATEL_DAC2INVERT, 0x0008);
+	} else if ((codec72==0x8000) && (codec6c==0x0080)) {
+		/* nothing */
+	}
+	codec->codec_write(codec, AC97_SIGMATEL_MULTICHN, 0x0000);
+	return 0;
+}
+
+
+static int sigmatel_9721_init(struct ac97_codec * codec)
+{
+	/* Only set up secondary codec */
+	if (codec->id == 0)
+		return 0;
+
+	codec->codec_write(codec, AC97_SURROUND_MASTER, 0L);
+
+	/* initialize SigmaTel STAC9721/23 as secondary codec, decoding AC link
+	   sloc 3,4 = 0x01, slot 7,8 = 0x00, */
+	codec->codec_write(codec, AC97_SIGMATEL_MULTICHN, 0x00);
+
+	/* we don't have the crystal when we are on an AMR card, so use
+	   BIT_CLK as our clock source. Write the magic word ABBA and read
+	   back to enable register 0x78 */
+	codec->codec_write(codec, AC97_SIGMATEL_CIC1, 0xabba);
+	codec->codec_read(codec, AC97_SIGMATEL_CIC1);
+
+	/* sync all the clocks*/
+	codec->codec_write(codec, AC97_SIGMATEL_CIC2, 0x3802);
+
+	return 0;
+}
+
+
+static int sigmatel_9744_init(struct ac97_codec * codec)
+{
+	// patch for SigmaTel
+	codec->codec_write(codec, AC97_SIGMATEL_CIC1, 0xabba);
+	codec->codec_write(codec, AC97_SIGMATEL_CIC2, 0x0000); // is this correct? --jk
+	codec->codec_write(codec, AC97_SIGMATEL_BIAS1, 0xabba);
+	codec->codec_write(codec, AC97_SIGMATEL_BIAS2, 0x0002);
+	codec->codec_write(codec, AC97_SIGMATEL_MULTICHN, 0x0000);
+	return 0;
+}
+
+static int cmedia_init(struct ac97_codec *codec)
+{
+	/* Initialise the CMedia 9739 */
+	/*
+		We could set various options here
+		Register 0x20 bit 0x100 sets mic as center bass
+		Also do multi_channel_ctrl &=~0x3000 |=0x1000
+		
+		For now we set up the GPIO and PC beep 
+	*/
+	
+	u16 v;
+	
+	/* MIC */
+	codec->codec_write(codec, 0x64, 0x3000);
+	v = codec->codec_read(codec, 0x64);
+	v &= ~0x8000;
+	codec->codec_write(codec, 0x64, v);
+	codec->codec_write(codec, 0x70, 0x0100);
+	codec->codec_write(codec, 0x72, 0x0020);
+	return 0;
+}
+	
+#define AC97_WM97XX_FMIXER_VOL 0x72
+#define AC97_WM97XX_RMIXER_VOL 0x74
+#define AC97_WM97XX_TEST 0x5a
+#define AC97_WM9704_RPCM_VOL 0x70
+#define AC97_WM9711_OUT3VOL 0x16
+
+static int wolfson_init03(struct ac97_codec * codec)
+{
+	/* this is known to work for the ViewSonic ViewPad 1000 */
+	codec->codec_write(codec, AC97_WM97XX_FMIXER_VOL, 0x0808);
+	codec->codec_write(codec, AC97_GENERAL_PURPOSE, 0x8000);
+	return 0;
+}
+
+static int wolfson_init04(struct ac97_codec * codec)
+{
+	codec->codec_write(codec, AC97_WM97XX_FMIXER_VOL, 0x0808);
+	codec->codec_write(codec, AC97_WM97XX_RMIXER_VOL, 0x0808);
+
+	// patch for DVD noise
+	codec->codec_write(codec, AC97_WM97XX_TEST, 0x0200);
+
+	// init vol as PCM vol
+	codec->codec_write(codec, AC97_WM9704_RPCM_VOL,
+		codec->codec_read(codec, AC97_PCMOUT_VOL));
+
+	/* set rear surround volume */
+	codec->codec_write(codec, AC97_SURROUND_MASTER, 0x0000);
+	return 0;
+}
+
+/* WM9705, WM9710 */
+static int wolfson_init05(struct ac97_codec * codec)
+{
+	/* set front mixer volume */
+	codec->codec_write(codec, AC97_WM97XX_FMIXER_VOL, 0x0808);
+	return 0;
+}
+
+/* WM9711, WM9712 */
+static int wolfson_init11(struct ac97_codec * codec)
+{
+	/* stop pop's during suspend/resume */
+	codec->codec_write(codec, AC97_WM97XX_TEST,
+		codec->codec_read(codec, AC97_WM97XX_TEST) & 0xffbf);
+
+	/* set out3 volume */
+	codec->codec_write(codec, AC97_WM9711_OUT3VOL, 0x0808);
+	return 0;
+}
+
+/* WM9713 */
+static int wolfson_init13(struct ac97_codec * codec)
+{
+	codec->codec_write(codec, AC97_RECORD_GAIN, 0x00a0);
+	codec->codec_write(codec, AC97_POWER_CONTROL, 0x0000);
+	codec->codec_write(codec, AC97_EXTENDED_MODEM_ID, 0xDA00);
+	codec->codec_write(codec, AC97_EXTEND_MODEM_STAT, 0x3810);
+	codec->codec_write(codec, AC97_PHONE_VOL, 0x0808);
+	codec->codec_write(codec, AC97_PCBEEP_VOL, 0x0808);
+
+	return 0;
+}
+
+static int tritech_init(struct ac97_codec * codec)
+{
+	codec->codec_write(codec, 0x26, 0x0300);
+	codec->codec_write(codec, 0x26, 0x0000);
+	codec->codec_write(codec, AC97_SURROUND_MASTER, 0x0000);
+	codec->codec_write(codec, AC97_RESERVED_3A, 0x0000);
+	return 0;
+}
+
+
+/* copied from drivers/sound/maestro.c */
+static int tritech_maestro_init(struct ac97_codec * codec)
+{
+	/* no idea what this does */
+	codec->codec_write(codec, 0x2A, 0x0001);
+	codec->codec_write(codec, 0x2C, 0x0000);
+	codec->codec_write(codec, 0x2C, 0XFFFF);
+	return 0;
+}
+
+
+
+/* 
+ *	Presario700 workaround 
+ * 	for Jack Sense/SPDIF Register mis-setting causing
+ *	no audible output
+ *	by Santiago Nullo 04/05/2002
+ */
+
+#define AC97_AD1886_JACK_SENSE 0x72
+
+static int ad1886_init(struct ac97_codec * codec)
+{
+	/* from AD1886 Specs */
+	codec->codec_write(codec, AC97_AD1886_JACK_SENSE, 0x0010);
+	return 0;
+}
+
+
+
+
+/*
+ *	This is basically standard AC97. It should work as a default for
+ *	almost all modern codecs. Note that some cards wire EAPD *backwards*
+ *	That side of it is up to the card driver not us to cope with.
+ *
+ */
+
+static int eapd_control(struct ac97_codec * codec, int on)
+{
+	if(on)
+		codec->codec_write(codec, AC97_POWER_CONTROL,
+			codec->codec_read(codec, AC97_POWER_CONTROL)|0x8000);
+	else
+		codec->codec_write(codec, AC97_POWER_CONTROL,
+			codec->codec_read(codec, AC97_POWER_CONTROL)&~0x8000);
+	return 0;
+}
+
+static int generic_digital_control(struct ac97_codec *codec, int slots, int rate, int mode)
+{
+	u16 reg;
+	
+	reg = codec->codec_read(codec, AC97_SPDIF_CONTROL);
+	
+	switch(rate)
+	{
+		/* Off by default */
+		default:
+		case 0:
+			reg = codec->codec_read(codec, AC97_EXTENDED_STATUS);
+			codec->codec_write(codec, AC97_EXTENDED_STATUS, (reg & ~AC97_EA_SPDIF));
+			if(rate == 0)
+				return 0;
+			return -EINVAL;
+		case 1:
+			reg = (reg & AC97_SC_SPSR_MASK) | AC97_SC_SPSR_48K;
+			break;
+		case 2:
+			reg = (reg & AC97_SC_SPSR_MASK) | AC97_SC_SPSR_44K;
+			break;
+		case 3:
+			reg = (reg & AC97_SC_SPSR_MASK) | AC97_SC_SPSR_32K;
+			break;
+	}
+	
+	reg &= ~AC97_SC_CC_MASK;
+	reg |= (mode & AUDIO_CCMASK) << 6;
+	
+	if(mode & AUDIO_DIGITAL)
+		reg |= 2;
+	if(mode & AUDIO_PRO)
+		reg |= 1;
+	if(mode & AUDIO_DRS)
+		reg |= 0x4000;
+
+	codec->codec_write(codec, AC97_SPDIF_CONTROL, reg);
+
+	reg = codec->codec_read(codec, AC97_EXTENDED_STATUS);
+	reg &= (AC97_EA_SLOT_MASK);
+	reg |= AC97_EA_VRA | AC97_EA_SPDIF | slots;
+	codec->codec_write(codec, AC97_EXTENDED_STATUS, reg);
+	
+	reg = codec->codec_read(codec, AC97_EXTENDED_STATUS);
+	if(!(reg & 0x0400))
+	{
+		codec->codec_write(codec, AC97_EXTENDED_STATUS, reg & ~ AC97_EA_SPDIF);
+		return -EINVAL;
+	}
+	return 0;
+}
+
+/*
+ *	Crystal digital audio control (CS4299)
+ */
+ 
+static int crystal_digital_control(struct ac97_codec *codec, int slots, int rate, int mode)
+{
+	u16 cv;
+
+	if(mode & AUDIO_DIGITAL)
+		return -EINVAL;
+		
+	switch(rate)
+	{
+		case 0: cv = 0x0; break;	/* SPEN off */
+		case 48000: cv = 0x8004; break;	/* 48KHz digital */
+		case 44100: cv = 0x8104; break;	/* 44.1KHz digital */
+		case 32768: 			/* 32Khz */
+		default:
+			return -EINVAL;
+	}
+	codec->codec_write(codec, 0x68, cv);
+	return 0;
+}
+
+/*
+ *	CMedia digital audio control
+ *	Needs more work.
+ */
+ 
+static int cmedia_digital_control(struct ac97_codec *codec, int slots, int rate, int mode)
+{
+	u16 cv;
+
+	if(mode & AUDIO_DIGITAL)
+		return -EINVAL;
+		
+	switch(rate)
+	{
+		case 0:		cv = 0x0001; break;	/* SPEN off */
+		case 48000:	cv = 0x0009; break;	/* 48KHz digital */
+		default:
+			return -EINVAL;
+	}
+	codec->codec_write(codec, 0x2A, 0x05c4);
+	codec->codec_write(codec, 0x6C, cv);
+	
+	/* Switch on mix to surround */
+	cv = codec->codec_read(codec, 0x64);
+	cv &= ~0x0200;
+	if(mode)
+		cv |= 0x0200;
+	codec->codec_write(codec, 0x64, cv);
+	return 0;
+}
+
+
+/* copied from drivers/sound/maestro.c */
+#if 0  /* there has been 1 person on the planet with a pt101 that we
+        know of.  If they care, they can put this back in :) */
+static int pt101_init(struct ac97_codec * codec)
+{
+	printk(KERN_INFO "ac97_codec: PT101 Codec detected, initializing but _not_ installing mixer device.\n");
+	/* who knows.. */
+	codec->codec_write(codec, 0x2A, 0x0001);
+	codec->codec_write(codec, 0x2C, 0x0000);
+	codec->codec_write(codec, 0x2C, 0xFFFF);
+	codec->codec_write(codec, 0x10, 0x9F1F);
+	codec->codec_write(codec, 0x12, 0x0808);
+	codec->codec_write(codec, 0x14, 0x9F1F);
+	codec->codec_write(codec, 0x16, 0x9F1F);
+	codec->codec_write(codec, 0x18, 0x0404);
+	codec->codec_write(codec, 0x1A, 0x0000);
+	codec->codec_write(codec, 0x1C, 0x0000);
+	codec->codec_write(codec, 0x02, 0x0404);
+	codec->codec_write(codec, 0x04, 0x0808);
+	codec->codec_write(codec, 0x0C, 0x801F);
+	codec->codec_write(codec, 0x0E, 0x801F);
+	return 0;
+}
+#endif
+	
+
+EXPORT_SYMBOL(ac97_probe_codec);
+
+MODULE_LICENSE("GPL");
+
diff -uNra linux-3.0.82/sound/oss/Kconfig linux-3.0.82x/sound/oss/Kconfig
--- linux-3.0.82/sound/oss/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/sound/oss/Kconfig	2017-09-23 03:42:50.374673975 +0800
@@ -22,6 +22,16 @@
 	  <file:Documentation/sound/oss/vwsnd> for more info on this driver's
 	  capabilities.
 
+config SOUND_LS1X_AC97
+	tristate "Loongson1 AC97 Sound"
+	depends on CPU_LOONGSON1A || CPU_LOONGSON1B || CPU_LOONGSON1C
+
+config SOUND_LS1X_UDA1342
+	tristate "Loongson1 IIS UDA1342 Sound"
+	depends on CPU_LOONGSON1A || CPU_LOONGSON1B || CPU_LOONGSON1C
+	help
+	  Say Y or M if your board have a uda1342 Sound IC 
+
 config SOUND_MSNDCLAS
 	tristate "Support for Turtle Beach MultiSound Classic, Tahiti, Monterey"
 	depends on (m || !STANDALONE) && ISA
diff -uNra linux-3.0.82/sound/oss/ls1b-ac97.c linux-3.0.82x/sound/oss/ls1b-ac97.c
--- linux-3.0.82/sound/oss/ls1b-ac97.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/sound/oss/ls1b-ac97.c	2017-09-23 03:42:50.378673963 +0800
@@ -0,0 +1,1219 @@
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/pci.h>
+#include <linux/poll.h>
+#include <linux/sound.h>
+#include <linux/soundcard.h>
+#include <linux/types.h>
+#include <linux/sched.h>
+#include <linux/semaphore.h>
+#include <linux/ac97_codec.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include "ls1b-ac97.h"
+#include <irq.h>
+#include <ls1b_board.h>
+
+#define TIME_OUT 10		//HZ
+
+#define MYDBG printk("<0>%s:%d\n",__FUNCTION__,__LINE__);
+
+/*  Debug macros*/
+#if 0
+#define DPRINTK(fmt, args...) printk(KERN_ALERT "<%s>: " fmt, __FUNCTION__ , ## args)
+#else
+#define DPRINTK(fmt, args...)
+#endif
+
+
+static audio_stream_t stream_in = {
+	output: 0,
+	fragsize:0x10000,
+};
+
+static audio_stream_t output_stream = {
+	output: 1,
+	fragsize:0x10000,
+};
+
+static audio_state_t sb2f_audio_state = {
+	input_stream:&stream_in,
+	output_stream:&output_stream,
+//	sem:__MUTEX_INITIALIZER(sb2f_audio_state.sem),
+	sem: __SEMAPHORE_INITIALIZER(sb2f_audio_state.sem, 1),
+};
+
+/*
+ * capmode: iccr bit0,bit1, control dma capture mircophone from ac link slots.
+ * 0: slot 5
+ * 1: slot 3
+ * 2: slot 4
+ * 3: slot 5
+ *
+ *
+ */
+
+static int capmode;
+
+static inline u32 read_reg(volatile u32 * reg)
+{
+	return (*reg);
+}
+
+static inline void write_reg(volatile u32 * reg, u32 val)
+{
+	*(reg) = (val);
+}
+
+/* busy wait */
+int codec_wait_complete(void)
+{
+	int timeout = 40000;
+
+	/* ä¸­æ–­çŠ¶æ€�/ä¸­æ–­æŽ©è†œå¯„å­˜å™¨ è¯»å†™å®Œæˆ�ï¼Ÿ */
+	while ((!(read_reg(INTRAW) & INTS_CRAC_MASK)) && (timeout-- > 0))
+		udelay(100);
+	if (timeout > 0) {
+		read_reg(CLR_CDC_RD);	/* CODEC READ ä¸­æ–­æ¸…é™¤ */
+		read_reg(CLR_CDC_WR);	/* CODEC WRITE ä¸­æ–­æ¸…é™¤ */
+	}
+	return timeout > 0 ? 0 : 1;
+}
+
+static u16 sb2f_codec_read(struct ac97_codec *codec, volatile u8 reg)
+{
+	volatile u16 val;
+
+	/*write crac */
+	write_reg(CRAC, (CRAR_READ|CRAR_CODEC_REG(reg)));	/* Codecå¯„å­˜å™¨è®¿é—®å‘½ä»¤ */
+	/* ç­‰å¾…å®Œæˆ� */
+	if (codec_wait_complete() != 0) {
+		DPRINTK("ERROR\n");
+		return -1;
+	}
+	/* è¿”å›žcodeå¯„å­˜å™¨ä¸­è¯»å�–åˆ°çš„æ•°æ�® */
+	val = read_reg(CRAC) & 0xffff;
+	return val;
+}
+
+static void sb2f_codec_write(struct ac97_codec *codec, u8 reg, u16 val)
+{
+	write_reg(CRAC, (CRAR_WRITE | CRAR_CODEC_REG(reg) | val));
+	codec_wait_complete();
+}
+
+/* dma ops */
+static void dma_enable_trans(audio_stream_t * s, audio_dmadesc_t *desc)
+{
+	u32 val;
+//	int timeout = 20000;
+	unsigned long flags;
+
+	val = desc->snd_dma_handle;
+	val |= s->output ? 0x9 : 0xa;
+	local_irq_save(flags);
+	write_reg((volatile u32*)(CONFREG_BASE + 0x1160), val);
+	while(read_reg((volatile u32*)(CONFREG_BASE + 0x1160)) & 0x8);
+//	while ((read_reg((volatile u32*)(CONFREG_BASE + 0x1160)) & 0x8) && (timeout-- > 0)) {
+//		udelay(5);
+//	}
+	local_irq_restore(flags);
+	write_reg(INTM, 0x0); //INTM ;disable all interrupt
+#ifdef CONFIG_SND_SB2F_TIMER
+	mod_timer(&s->timer, jiffies + HZ/20);
+#endif
+}
+
+/* if buffer not EMpty entry dma is running */
+void audio_clear_buf(audio_stream_t *s)
+{
+	audio_dmadesc_t *desc;
+
+	while (!list_empty(&s->all_list)) {
+		desc = list_entry(s->all_list.next, audio_dmadesc_t, all);
+		list_del(&desc->all);
+		list_del(&desc->link);
+
+		if (desc->snd_buffer)
+			free_pages((unsigned long)desc->snd_buffer, get_order(s->fragsize));
+		dma_free_coherent(NULL, sizeof(audio_dmadesc_t), desc, 0);
+	}
+
+	if (s->ask_dma)
+		dma_free_coherent(NULL, sizeof(audio_dmadesc_t), s->ask_dma, 0);
+
+	if (s->null_buffer)
+		dma_free_coherent(NULL, ZERO_BUF_SIZE, s->null_buffer, 0);
+
+	s->ask_dma = NULL;
+	s->null_buffer = NULL;
+}
+
+static void inline link_dma_desc(audio_stream_t *s, audio_dmadesc_t *desc)
+{
+	spin_lock_irq(&s->lock);
+
+	if(!list_empty(&s->run_list)) {
+		audio_dmadesc_t *desc0;
+		desc0 = list_entry(s->run_list.prev, audio_dmadesc_t, link);//desc0æŒ‡å�‘ç»“æž„ä½“audio_dmadesc_tçš„èµ·å§‹åœ°å�€ï¼Œ
+		desc0->snd.ordered = desc->snd_dma_handle | DESC_VALID;
+		desc0->null.ordered = desc->snd_dma_handle | DESC_VALID;
+		list_add_tail(&desc->link, &s->run_list);
+		if(s->state == STOP) {
+			s->state = RUN;
+			dma_enable_trans(s, desc0);
+		}
+	}
+	else {
+		list_add_tail(&desc->link,&s->run_list);
+		dma_enable_trans(s, desc);
+	}
+
+	spin_unlock_irq(&s->lock);
+}
+
+
+static void dma_stop(audio_stream_t *s)
+{
+	u32 val;
+
+	val = s->output ? 0x11 : 0x12;
+	write_reg((volatile u32*)(CONFREG_BASE + 0x1160), val);
+//	udelay(1000);
+}
+
+static void sb2f_init_dmadesc(audio_stream_t *s, audio_dmadesc_t *desc, u32 count)
+{
+	_audio_dma_desc *_desc;
+	u32 control;
+
+	control = s->output ? 0x0fe72420 : 0x0fe74c4c;//æ‰€è¦�è¯»å†™çš„apbè®¾å¤‡çš„åœ°å�€
+
+	control |= (1<<31);
+	/*
+	* [30]-1 two channels
+	* [30]-0 one channel
+	*/
+
+	if(!s->single)
+		control |= (1 << 30);
+
+	/*
+	* [29:28]-00 --> byte
+	* [29:28]-01 --> half word(two bytes)
+	* [29:28]-10 --> word (four bytes)
+	*/
+
+	if(s->fmt == AFMT_S16_LE) {
+		control |= (1 << 28);
+	}
+
+	desc->snd.daddr = desc->null.daddr = control;
+
+	_desc = &desc->snd;
+	_desc->ordered = (desc->snd_dma_handle + sizeof(_audio_dma_desc)) |DESC_VALID;
+	_desc->saddr = desc->snd_dma;//æŒ‡å®šäº†DMAæ�¬è¿�æ•°æ�®æ—¶çš„å†…å­˜åœ°å�€
+	_desc->length = 8;
+	_desc->step_length = 0;
+	_desc->step_times = count >> 5;
+	_desc->cmd = s->output ? 0x00001001 : 0x00000001; //enable the interrupt
+
+	_desc = &desc->null;
+	_desc->ordered =  (desc->snd_dma_handle + sizeof(_audio_dma_desc))|DESC_VALID;
+	_desc->saddr = s->null_dma;
+	_desc->length = 8;
+	_desc->step_length = 0;
+	_desc->step_times = 1;
+	_desc->cmd = s->output ? 0x00001000 : 0x00000000; //enable the interrupt
+
+}
+
+/*
+ * Fill data to dma buffer.
+ * when buf_depth exceed the lowest threshold, start DMA.
+ * Befor opening the DMA, we should reset DMA(stop).
+ */
+static u32 fill_play_buffer(audio_stream_t *s, const char *buf, u32 count)
+{
+	u32 copy_bytes;
+	audio_dmadesc_t *desc;
+
+	desc = list_entry(s->free_list.next, audio_dmadesc_t, link);
+	copy_bytes = min((s->fragsize - desc->pos), count);
+	copy_from_user((void *)(desc->snd_buffer + desc->pos), buf, copy_bytes);
+	desc->pos += copy_bytes;
+
+	if(desc->pos == s->fragsize) {
+		dma_map_single(NULL, desc->snd_buffer, s->fragsize, DMA_TO_DEVICE);
+		spin_lock_irq(&s->lock);
+		list_del(&desc->link);
+		spin_unlock_irq(&s->lock);
+		sb2f_init_dmadesc(s, desc, s->fragsize);
+		link_dma_desc(s, desc);
+	}
+
+	return copy_bytes;
+}
+
+
+/* setup buffers,dma descs,buffer. */
+int sb2f_setup_buf(audio_stream_t * s)
+{	
+	int i;
+	int nb_desc;
+	void *dma_buf;
+	dma_addr_t dma_phyaddr;
+	audio_dmadesc_t **dma_desc = 0;
+
+	if (s->ask_dma)
+		return -EBUSY;
+
+	nb_desc = s->nbfrags;
+
+	for (i = 0; i < nb_desc; i++) {
+		audio_dmadesc_t *desc;//æ¯�ä¸ªaudio_dmadesc_tç”¨æ�¥æ��è¿°ä¸€ç‰‡dma bufferï¼Œå…¶ç»“æž„ä¸­çš„snd_dma_handle --> audio_dmadesc_tæ€»çº¿åœ°å�€
+
+		desc = dma_alloc_coherent(NULL, sizeof(audio_dmadesc_t),
+					(dma_addr_t *)&dma_phyaddr, GFP_KERNEL);
+		//å»ºç«‹ä¸€è‡´æ€§DMAæ˜ å°„ï¼Œarg 2 ä¸ºæ‰€éœ€ç¼“å†²åŒºçš„å¤§å°�ï¼Œå‡½æ•°çš„è¿”å›žå€¼æ˜¯ç¼“å†²åŒºçš„å†…æ ¸è™šæ‹Ÿåœ°å�€ï¼Œå�¯ä»¥è¢«é©±åŠ¨ç¨‹åº�ä½¿ç”¨ï¼Œ
+		//è€Œä¸Žå…¶ç›¸å…³çš„æ€»çº¿åœ°å�€ï¼Œä¿�å­˜åœ¨arg 3ä¸­
+		if (!desc) {
+			DPRINTK("2.alloc dma desc err.");
+			goto err;
+		}
+
+		memset(desc, 0, sizeof(audio_dmadesc_t));
+		desc->snd_dma_handle = dma_phyaddr;
+		desc->null.ordered = desc->snd.ordered = (dma_phyaddr + sizeof(_audio_dma_desc))|DESC_VALID;
+		list_add_tail(&desc->link,&s->free_list);
+		list_add_tail(&desc->all,&s->all_list);
+
+		//__get_free_pages åˆ†é…�è‹¥å¹²ç‰©ç�†è¿žç»­çš„é¡µé�¢ï¼Œå¹¶è¿”å›žæŒ‡å�‘è¯¥å†…å­˜åŒºåŸŸç¬¬ä¸€ä¸ªå­—èŠ‚çš„æŒ‡é’ˆ
+		dma_buf = (void *)__get_free_pages(GFP_ATOMIC|GFP_DMA, get_order(s->fragsize));
+		desc->snd_buffer = dma_buf;//åˆ†é…�çš„ç”¨äºŽéŸ³é¢‘æ•°æ�®ä¼ è¾“çš„æ¯�ç‰‡buffer 8192bytes
+		//å½“æœ‰ä¸€ä¸ªç¼“å†²åŒºè¦�è¢«ä¼ è¾“çš„æ—¶å€™ï¼Œä½¿ç”¨dma_map_singleå‡½æ•°æ˜ å°„å®ƒï¼Œè¿”å›žå€¼æ˜¯æ€»çº¿åœ°å�€ï¼Œå�¯ä»¥æŠŠå®ƒä¼ é€’ç»™è®¾å¤‡
+		desc->snd_dma = dma_map_single(NULL, desc->snd_buffer, s->fragsize, DMA_FROM_DEVICE);
+		if (!dma_buf) {
+			DPRINTK("4.alloc dma buffer err\n");
+			goto err;
+		}
+	}
+
+	/* dma desc for ask_valid one per audio_stream_t */
+	s->ask_dma = dma_alloc_coherent(NULL, sizeof(_audio_dma_desc),
+			&dma_phyaddr, GFP_KERNEL);
+
+
+	if(s->ask_dma != NULL) {
+		memset(s->ask_dma, 0, sizeof(_audio_dma_desc));
+		s->ask_dma_handle = dma_phyaddr;
+	}
+	else {
+		DPRINTK("3. alloc dma desc err.");
+		goto err;
+	}
+
+	s->null_buffer = dma_alloc_coherent(NULL, ZERO_BUF_SIZE,
+			&dma_phyaddr, GFP_KERNEL);
+
+	memset(s->null_buffer,ZERO_BUF_SIZE,0);
+	s->null_dma = dma_phyaddr;
+
+	sema_init(&s->sem, 1);
+
+	return 0;
+
+err:
+	printk("soc-audio: unable to allocate audio memory\n ");
+	audio_clear_buf(s);
+	if(dma_desc)
+		kfree(dma_desc);
+	return -ENOMEM;
+}
+
+#ifdef CONFIG_SND_SB2F_TIMER
+static void sb2f_audio_timeout(unsigned long data)
+{
+	audio_stream_t *s = (audio_stream_t *)data;
+	if (s->output)
+		ac97_dma_write_intr(0, s);
+	else
+		ac97_dma_read_intr(0, s);
+	mod_timer(&s->timer, jiffies + HZ/20);
+}
+#endif
+
+
+/* ac97  dma intr. */
+static irqreturn_t ac97_dma_read_intr(int irq, void *private)
+{
+	audio_stream_t *s = (audio_stream_t *) private;
+	audio_dmadesc_t *desc;
+	unsigned long flags;
+
+	if(list_empty(&s->run_list)) {
+		return IRQ_HANDLED;
+	}
+
+	local_irq_save(flags);
+	write_reg((volatile u32*)(CONFREG_BASE + 0x1160), s->ask_dma_handle|0x6);
+	while (read_reg((volatile u32*)(CONFREG_BASE + 0x1160)) & 4);
+	local_irq_restore(flags);
+
+	do {
+		desc = list_entry(s->run_list.next, audio_dmadesc_t, link);
+		if(s->ask_dma->ordered == desc->snd.ordered)
+			break;
+
+		spin_lock(&s->lock);
+		list_del(&desc->link);
+		list_add_tail(&desc->link, &s->done_list);
+		spin_unlock(&s->lock);
+		dma_map_single(NULL, desc->snd_buffer, s->fragsize, DMA_FROM_DEVICE);
+	}
+	while(!list_empty(&s->run_list));// ä¸€ç›´è¿�è¡Œç›´åˆ°s->run_listä¸ºç©ºä¸ºæ­¢
+
+	if(!list_empty(&s->done_list))
+		wake_up(&s->frag_wq);
+	return IRQ_HANDLED;
+}
+
+
+/* handle the ac97 write interrupt
+ * s->tail point to the dma desc currently used
+ * s->head point to the dma which will be filled
+ */
+static irqreturn_t ac97_dma_write_intr(int irq, void *private)
+{
+	audio_stream_t *s = (audio_stream_t *) private;
+	audio_dmadesc_t *desc;
+	unsigned long flags;
+
+	if(list_empty(&s->run_list)) {
+		return IRQ_HANDLED;
+	}
+
+	local_irq_save(flags);
+	write_reg((volatile u32*)(CONFREG_BASE + 0x1160), s->ask_dma_handle|0x5);
+	while(read_reg((volatile u32*)(CONFREG_BASE + 0x1160)) & 4);
+	local_irq_restore(flags);
+
+	do {
+		desc = list_entry(s->run_list.next, audio_dmadesc_t, link);
+
+		/*first desc's ordered may be null*/
+		if(s->ask_dma->ordered == desc->snd.ordered || s->ask_dma->ordered == 
+			((desc->snd_dma_handle + sizeof(_audio_dma_desc)) |DESC_VALID))
+			break;
+
+		desc = list_entry(s->run_list.next, audio_dmadesc_t, link);
+		spin_lock(&s->lock);
+		list_del(&desc->link);
+		desc->pos = 0;
+		list_add_tail(&desc->link, &s->free_list);
+		spin_unlock(&s->lock);
+	}
+	while(!list_empty(&s->run_list));
+
+	if(!list_empty(&s->free_list))
+		wake_up(&s->frag_wq);
+
+	return IRQ_HANDLED;
+}
+
+/* å¤–éƒ¨codeå¯„å­˜å™¨è¯»å†™å‡½æ•° */
+struct ac97_codec sb2f_ac97_codec = {
+	codec_read:sb2f_codec_read,
+	codec_write:sb2f_codec_write,
+};
+
+static long mixer_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+	int ret;
+	int val = 0;
+
+	ret = sb2f_ac97_codec.mixer_ioctl(&sb2f_ac97_codec, cmd, arg);
+
+	/* We must snoop for some commands to provide our own extra processing */
+	switch (cmd) {
+		case SOUND_MIXER_WRITE_VOLUME:
+			if (get_user(val, (int*)arg)) {
+				return -EFAULT;
+			}
+			sb2f_codec_write(NULL, 0x2, val);		
+			break;
+		case SOUND_MIXER_READ_VOLUME:
+			val = sb2f_codec_read(NULL, 0x2);
+			return put_user(val, (long*)arg);		
+			break;
+		case SOUND_MIXER_WRITE_MUTE:
+			if (get_user(val, (int*)arg)) {
+				return -EFAULT;
+			}
+			sb2f_codec_write(NULL, 0x18, (sb2f_codec_read(NULL,0x18) & 0<<15)| val);		
+			break;
+		case SOUND_MIXER_WRITE_IGAIN:
+			if (get_user(val, (int*)arg)) {
+				return -EFAULT;
+			}
+			sb2f_codec_write(NULL, 0x1c, val);		
+			break;
+		case SOUND_MIXER_WRITE_PCM:
+			if (get_user(val, (int*)arg)) {
+				return -EFAULT;
+			}
+			sb2f_codec_write(NULL, 0x18, val);		
+			break;
+		case SOUND_MIXER_WRITE_RECSRC:
+			printk("record source\n");
+			if (get_user(val, (int*)arg)) {
+				return -EFAULT;
+			}
+			sb2f_codec_write(NULL, 0x1a, val);		
+			break;
+		default:
+			break;
+	}
+	return 0;
+}
+
+static struct file_operations sb2f_mixer_fops = {
+	unlocked_ioctl:mixer_ioctl,
+	llseek:no_llseek,
+	owner:THIS_MODULE
+};
+
+static int inline sanity_check_codec_status(audio_stream_t *s)
+{
+	u16 val;
+
+	val = sb2f_codec_read(NULL, 0x26);
+	if(val == 0xf)
+		return 0;
+	else 
+		return -ENODEV;
+}
+
+static void sb2f_open_set(int mode)
+{
+	audio_state_t *state = &sb2f_audio_state;
+	audio_stream_t *is = state->input_stream;
+	audio_stream_t *os = state->output_stream;
+	unsigned short sample_rate=0xac44;
+
+	write_reg(INTM, 0x0); //INTM ;disable all interrupt
+
+	if (mode & FMODE_READ) {
+		write_reg(ICCR, ((is->fmt == AFMT_S16_LE)?0x690000:0x610000)|capmode);//ICCR
+//		sb2f_codec_write(NULL, 0x32, sample_rate);//|(0x32<<16)|(0<<31));     //pcm input rate .
+		sb2f_codec_write(NULL, 0x34, sample_rate);//|(0x34<<16)|(0<<31));     //MIC rate.
+	}
+
+	if (mode & FMODE_WRITE) {
+//		write_reg(OCCR, (os->fmt == AFMT_S16_LE)?0x6b6b:0x6363);
+		write_reg(OCCR, (os->fmt == AFMT_S16_LE)?0x6969:0x6161);
+		sb2f_codec_write(NULL, 0x2c, sample_rate);
+		if (sb2f_ac97_codec.model == 0x414c4760)
+			sb2f_codec_write(NULL, 0x6a, sb2f_codec_read(NULL,0x6a)|0x201);
+	}
+	sb2f_codec_write(NULL,0x02,0x8000); 
+}
+
+static void sb2f_def_set(void)
+{
+	static unsigned short sample_rate = 0xac44;
+
+	/*ac97 config*/
+//	write_reg(OCCR,0x6b6b); //OCCR0   L&& R enable ; 3/4 empty; dma enabled;8 bits;var rate(0x202);
+	write_reg(OCCR, 0x6969);
+	write_reg(ICCR, 0x690000 | capmode);//ICCR
+//	write_reg(INTM,0xFFFFFFFF); //INTM ;disable all interrupt
+	write_reg(INTM, 0x0);
+
+	sb2f_codec_write(NULL, 0, 0);//codec reset
+	sb2f_codec_write(NULL, 0x2, 0x0808);//|(0x2<<16)|(0<<31));      //Master Vol.
+	sb2f_codec_write(NULL, 0x4, 0x0808);//|(0x2<<16)|(0<<31));      //headphone Vol.
+	sb2f_codec_write(NULL, 0x6, 0x0008);//|(0x2<<16)|(0<<31));      //mono Vol.
+	sb2f_codec_write(NULL, 0xc, 0x0008);//|(0x2<<16)|(0<<31));      //phone Vol.
+	sb2f_codec_write(NULL, 0x18, 0x0808);//|(0x18<<16)|(0<<31));     //PCM Out Vol.
+//	sb2f_codec_write(NULL, 0x18, sample_rate|(0x2c<<16)|(0<<31));
+//	sb2f_codec_write(NULL, 0x18, sample_rate|(0x34<<16)|(0<<31));
+//	sb2f_codec_write(NULL, 0x2a, 1);//0x1|(0x2A<<16)|(0<<31));        //Extended Audio Status  and control
+	sb2f_codec_write(NULL, 0x2a, 0x3df2);//0x1|(0x2A<<16)|(0<<31));        //Extended Audio Status  and control
+	sb2f_codec_write(NULL, 0x1a, 0x0);//        //select record
+	sb2f_codec_write(NULL, 0x1c, 0x0f0f);//cys
+	sb2f_codec_write(NULL, 0x2c, sample_rate);//|(0x2c<<16)|(0<<31));     //PCM Out rate
+	sb2f_codec_write(NULL, 0x32, sample_rate);//|(0x32<<16)|(0<<31));     //pcm input rate .
+	sb2f_codec_write(NULL, 0x34, sample_rate);//|(0x34<<16)|(0<<31));     //MIC rate.
+	sb2f_codec_write(NULL, 0x0E, 0x0);//|(0x0E<<16)|(0<<31));     //Mic vol .
+	sb2f_codec_write(NULL, 0x1c, 0x0f0f);//     //adc record gain
+	sb2f_codec_write(NULL, 0x10, 0x0101);//     //line in gain
+	sb2f_codec_write(NULL, 0x1E, 0x0808);//|(0x1E<<16)|(0<<31));     //MIC Gain ADC.
+	sb2f_codec_write(NULL, 0x6a, 0x201);
+//	sb2f_codec_write(NULL, 0x38, 0x8008);
+//	sb2f_codec_write(NULL, 0x64, 0x800e);
+//	sb2f_codec_write(NULL, 0x66, 0x800e);
+}
+
+static int sb2f_audio_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
+{
+	const char *buffer0 = buffer;
+	audio_state_t *state = (audio_state_t *) file->private_data;
+	audio_stream_t *s = state->output_stream;
+	unsigned int ret = 0;
+
+	sb2f_codec_write(NULL, 0x2, 0x0);
+	if (*ppos != file->f_pos) {
+		return -ESPIPE;
+	}
+
+	if (!s->ask_dma && sb2f_setup_buf(s)) {
+		return -ENOMEM;
+	}
+
+	if (file->f_flags & O_NONBLOCK) {
+		if (down_trylock(&s->sem))
+			return -EAGAIN;
+	} else {
+		if (down_interruptible(&s->sem))
+			return -ERESTARTSYS;
+	}
+
+	while (count > 0) {
+		if(list_empty(&s->free_list)) {
+			if(file->f_flags & O_NONBLOCK)
+				return -EAGAIN;
+
+			if(wait_event_interruptible(s->frag_wq, !list_empty(&s->free_list))) {
+				up(&s->sem);
+				return -ERESTARTSYS;
+			}
+		}
+
+		/* Fill data , if the ring is not full */
+		ret = fill_play_buffer(s, buffer, count);
+		count -= ret;
+		buffer += ret;
+	}
+
+	up(&s->sem);
+	return (buffer - buffer0);
+}
+
+static int sb2f_copy_to_user(audio_stream_t *s, char *buffer, u32 count)
+{
+	audio_dmadesc_t *desc;
+	int ret = 0;
+
+	while(!list_empty(&s->done_list) && count) {
+		u32 left;
+		desc = list_entry(s->done_list.next, audio_dmadesc_t, link);
+		left = min(s->fragsize - desc->pos,count);
+		copy_to_user(buffer, (void *)(desc->snd_buffer + desc->pos), left);
+		desc->pos += left;
+		count -= left;
+		buffer += left;
+		ret += left;
+		if (desc->pos == s->fragsize) {
+			list_del(&desc->link);
+			desc->pos = 0;
+			list_add_tail(&desc->link, &s->free_list);
+		}
+	}
+
+	return ret;
+}
+
+
+static int sb2f_audio_read(struct file *file, char *buffer, size_t count, loff_t * ppos)
+{
+	char *buffer0 = buffer;
+	audio_state_t *state = file->private_data;
+	audio_stream_t *s = state->input_stream;
+	audio_dmadesc_t *desc;
+
+	if (*ppos != file->f_pos)
+		return -ESPIPE;
+
+	if (!s->ask_dma && sb2f_setup_buf(s))
+		return -ENOMEM;
+
+	/*3. sem:get resource .if 0 ,wait */
+	if (file->f_flags & O_NONBLOCK) {
+		if (down_trylock(&s->sem))
+			return -EAGAIN;
+	} else {
+		if (down_interruptible(&s->sem))
+			return -ERESTARTSYS;
+	}
+
+	while(count > 0) {
+		int ret;
+
+		while(!list_empty(&s->free_list)) {
+			desc = list_entry(s->free_list.next, audio_dmadesc_t, link);
+			spin_lock_irq(&s->lock);
+			list_del(&desc->link);
+			spin_unlock_irq(&s->lock);
+			sb2f_init_dmadesc(s, desc, s->fragsize);
+			link_dma_desc(s, desc);
+		}
+
+		/* record's buffer is empty */
+		while(list_empty(&s->done_list)) {
+			if (file->f_flags & O_NONBLOCK) {
+				up(&s->sem);
+				return -EAGAIN;
+			}
+			if(wait_event_interruptible(s->frag_wq, !list_empty(&s->done_list))) {
+				up(&s->sem);
+				return -ERESTARTSYS;
+			}
+		}
+
+		/* data is ready now , so copy it */
+		ret = sb2f_copy_to_user(s, buffer, count);
+		count -= ret;
+		buffer += ret;
+	}
+
+	while(!list_empty(&s->free_list)) {
+		desc = list_entry(s->free_list.next, audio_dmadesc_t, link);
+		list_del(&desc->link);
+		sb2f_init_dmadesc(s, desc, s->fragsize);
+		link_dma_desc(s, desc);
+	}
+
+	up(&s->sem);
+	return (buffer - buffer0);
+}
+
+static int sb2f_audio_sync(struct file *file)
+{
+	audio_state_t *state = file->private_data;
+	audio_stream_t *is = state->input_stream;    
+        audio_stream_t *os = state->output_stream; 
+
+	if (file->f_mode & FMODE_READ) {
+		if(is->state == STOP && !list_empty(&is->run_list)) {
+			audio_dmadesc_t *desc;
+			desc = list_entry(is->run_list.next, audio_dmadesc_t, link);
+			dma_enable_trans(is, desc);
+			is->state = RUN;
+		}
+
+		if(!list_empty(&is->run_list))
+	 	schedule_timeout(CONFIG_HZ*2);
+
+		dma_stop(is);
+	}
+	if (file->f_mode & FMODE_WRITE) {
+		if(os->state == STOP && !list_empty(&os->run_list)) {
+			audio_dmadesc_t *desc;
+			desc = list_entry(os->run_list.next, audio_dmadesc_t, link);
+			dma_enable_trans(os, desc);
+			os->state = RUN;
+		}
+
+		if(!list_empty(&os->run_list))
+		 schedule_timeout(CONFIG_HZ*2);
+
+		dma_stop(os);
+	}
+
+	return 0;
+}
+
+static unsigned int sb2f_audio_poll(struct file *file, struct poll_table_struct *wait)
+{
+	audio_state_t *state = file->private_data;
+	audio_stream_t *is = state->input_stream;
+	audio_stream_t *os = state->output_stream;
+	unsigned int mask = 0;
+
+	poll_wait(file, &is->frag_wq, wait);
+	poll_wait(file, &os->frag_wq, wait);
+
+	if (file->f_mode & FMODE_READ) {
+		if (!is->ask_dma && sb2f_setup_buf(is))
+			return -ENOMEM;
+		poll_wait(file, &is->frag_wq, wait);
+		if(!list_empty(&is->done_list)) {
+			mask |= POLLIN | POLLRDNORM;
+		}
+	}
+
+	if (file->f_mode & FMODE_WRITE) {
+		if (!os->ask_dma && sb2f_setup_buf(os))
+			return -ENOMEM;
+		poll_wait(file, &os->frag_wq, wait);
+		if(!list_empty(&os->free_list)) {
+			mask |= POLLOUT | POLLWRNORM;
+		}
+	}
+	return mask;
+}
+
+static long sb2f_audio_ioctl(struct file *file, uint cmd, ulong arg)
+{
+	audio_state_t *state = file->private_data;
+	audio_stream_t *os = state->output_stream;
+	audio_stream_t *is = state->input_stream;
+	int rd=0, wr=0, val=0;
+	if (file->f_mode & FMODE_WRITE)
+		wr = 1;
+	if (file->f_mode & FMODE_READ)
+		rd = 1;
+
+	switch (cmd) {
+		case SNDCTL_DSP_SETFRAGMENT:
+			if (get_user(val, (int *)arg)) {
+				return -EFAULT;
+			}
+			DPRINTK ("DSP_SETFRAGMENT, val==%d\n", val);
+
+			if (rd) {
+				DPRINTK ("old fragsize=%d,nbfrags=%d\n",is->fragsize,is->nbfrags);
+				is->fragsize = 1 << (val & 0xFFFF);
+				if(is->fragsize < 1024) is->fragsize = 1024;
+				is->nbfrags = (val >> 16) & 0xFFFF;
+				if(is->nbfrags < 4) is->nbfrags = 4;
+				DPRINTK ("new fragsize=%d,nbfrags=%d\n",is->fragsize,is->nbfrags);
+			}
+
+			if (wr) {
+				DPRINTK ("old fragsize=%d,nbfrags=%d\n",os->fragsize,os->nbfrags);
+				os->fragsize = 1 << (val & 0xFFFF);
+				if(os->fragsize < 1024) os->fragsize = 1024;
+				os->nbfrags = (val >> 16) & 0xFFFF;
+				if(os->nbfrags < 4) os->nbfrags = 4;
+				if(os->single) {
+					//os->fragsize >>= 1;
+					os->nbfrags >>=2;
+					if(os->nbfrags <2) os->nbfrags=2;
+				}
+				DPRINTK ("new fragsize=%d,nbfrags=%d\n",os->fragsize,os->nbfrags);
+			}
+
+			return 0;
+		case OSS_GETVERSION:
+			return put_user(SOUND_VERSION, (int *) arg);
+
+		case SNDCTL_DSP_GETBLKSIZE:
+			if (file->f_mode & FMODE_WRITE)
+				return put_user(os->fragsize, (int *) arg);
+			else
+				return put_user(is->fragsize, (int *) arg);
+		case SNDCTL_DSP_SPEED:
+			if (get_user(val, (int *) arg))
+				return -EFAULT;
+			if (rd) {
+				if (val >= 0) {
+					if (val > 48000)
+						val = 48000;
+					if (val <8000)
+						val = 8000;
+					sb2f_codec_write(NULL,0x32,val); //ADC rate .
+					sb2f_codec_write(NULL,0x34, val); //MIC rate.
+				}
+			}
+			if (wr) {
+				if (val >= 0) {
+					if (val > 48000)
+						val = 48000;
+					if (val < 8000)
+						val = 8000;
+					sb2f_codec_write(NULL,0x2c,val);//DAC rate .
+				}
+			}
+			//FIXME: no recode the speed;
+			if (val<=0) {
+				if (file->f_mode & FMODE_WRITE)
+					val = 8000;
+				else if (file->f_mode & FMODE_READ)
+					val = 8000;
+			}
+			if(wr) os->rate = val;
+			if(rd) is->rate = val;
+			return put_user(val, (int *) arg);
+
+
+		case  SNDCTL_DSP_CHANNELS:
+			if (get_user(val, (int *) arg))
+				return -EFAULT;
+			DPRINTK("channel=%d.\n",val);
+			if (val!=0) {
+				if (wr) {
+					int single=os->single;
+					os->single=(val==1)?1:0;
+					if(!single && os->single) {
+						//os->fragsize >>= 1;
+						//os->nbfrags >>=2;
+						//if(os->nbfrags <2) os->nbfrags=2;
+					}
+				}
+				else if (rd) {
+					if(val!=1)
+						return -EFAULT;
+				}
+			}
+			else {
+				if (wr)
+					val=os->single?1:2;	
+				else if (rd) 
+					val=1;
+			}
+			return put_user(val,(int * )arg);	
+
+		case SNDCTL_DSP_STEREO: 
+			if (get_user(val, (int *)arg)) {
+				return -EFAULT;
+				break;
+			}
+			DPRINTK ("DSP_STEREO, val==%d\n", val);
+
+			if (wr) {
+				int single=os->single;
+				os->single=(val==1)?0:1;
+				if(!single && os->single) {
+					//os->fragsize >>= 1;
+					//os->nbfrags >>=2;
+					//if(os->nbfrags <2) os->nbfrags=2;
+				}
+			}
+			else val=0;
+
+			DPRINTK ("STEREO EXIT, returning %d\n", val);
+			put_user(val, (int *) arg);
+			return 0;
+			break;
+
+		case SNDCTL_DSP_GETFMTS:
+			DPRINTK("DSP_GETFMTS, EXIT, returning S16_LE\n");
+			return put_user(AFMT_S16_LE|AFMT_U8, (int *) arg);
+		case SNDCTL_DSP_SETFMT:
+			if (get_user(val, (int *)arg)) {
+				return -EFAULT;
+			}
+			DPRINTK ("DSP_SETFMT, val==%d\n", val);
+			if (val != AFMT_QUERY) {
+				if(val!=AFMT_U8)val=AFMT_S16_LE;
+
+				if (rd) {
+					if(val==AFMT_S16_LE) write_reg(ICCR,0x690000|capmode);//ICCR
+					else write_reg(ICCR,0x610000|capmode);//ICCR
+					is->fmt = val;
+				}
+
+				if (wr) {
+					if(val==AFMT_S16_LE) {
+						//write_reg(OCCR,0x6b6b); //OCCR0   L&& R enable ; 3/4 empty; dma enabled;16 bits;var rate(0x202);
+						//write_reg(DMA_SET_TODEV,0x10001); // 16bits X 6 entry 
+						write_reg(OCCR,0x6969);
+					}
+					else {
+						write_reg(OCCR,0x6363); //OCCR0   L&& R enable ; 3/4 empty; dma enabled;8 bits;var rate(0x202);
+						//write_reg(DMA_SET_TODEV,0x00001); // 16bits X 6 entry 
+					}
+					os->fmt = val;
+				}
+				
+			} else {
+				if ((rd && (read_reg(ICCR)&0x040000)) ||
+						(wr && (read_reg(OCCR)&0x0404)))
+					val = AFMT_S16_LE;
+				else
+					val = AFMT_U8;
+			}
+			if(wr)os->fmt=val;
+			if(rd)is->fmt=val;
+			DPRINTK ("SETFMT EXIT, returning %d\n", val);
+			return   put_user (val, (int *)arg);
+			break;
+		case SNDCTL_DSP_GETCAPS:
+			val = DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP;
+			if (is && os)
+				val |= DSP_CAP_DUPLEX;
+			return put_user(val, (int *) arg);
+
+
+		case SNDCTL_DSP_SYNC:
+			return sb2f_audio_sync(file);
+
+		case SNDCTL_DSP_SETDUPLEX:
+			return 0;
+
+		case SNDCTL_DSP_POST:
+			return 0;
+
+
+		case SNDCTL_DSP_NONBLOCK:
+			file->f_flags |= O_NONBLOCK;
+			return 0;
+
+		case SNDCTL_DSP_RESET:
+			if (file->f_mode & FMODE_WRITE) {
+				sb2f_audio_sync(file);
+				audio_clear_buf(os);
+			}
+			if (file->f_mode & FMODE_READ) {
+				sb2f_audio_sync(file);
+				audio_clear_buf(is);
+			}
+			return 0;
+
+		default:
+			DPRINTK("NO surpport.\n");
+			return -EINVAL;
+	}
+
+	return -EINVAL;
+}
+
+
+static int sb2f_audio_release(struct inode *inode, struct file *file)
+{
+	audio_state_t *state = file->private_data;
+
+	down(&state->sem);
+
+	if (file->f_mode & FMODE_READ) {
+
+		sb2f_audio_sync(file);
+		audio_clear_buf(state->input_stream);
+		state->rd_ref = 0;
+		free_irq(LS1B_BOARD_DMA2_IRQ, state->input_stream);
+#ifdef CONFIG_SND_SB2F_TIMER
+		del_timer(&state->input_stream->timer);
+#endif
+	}
+
+	if (file->f_mode & FMODE_WRITE) {
+		sb2f_audio_sync(file);
+		audio_clear_buf(state->output_stream);
+		state->wr_ref = 0;
+		free_irq(LS1B_BOARD_DMA1_IRQ, state->output_stream);
+#ifdef CONFIG_SND_SB2F_TIMER
+		del_timer(&state->output_stream->timer);
+#endif
+	}
+
+	if ((file->f_mode & FMODE_WRITE)) {
+		//write_reg(DMA_INT_MASK,read_reg(DMA_INT_MASK)|0x1);	//mask all dma interrupt  
+		sb2f_codec_write(NULL,0,0);//codec reset
+	}
+
+	if ((file->f_mode & FMODE_READ)) {
+		sb2f_codec_write(NULL,0,0);//codec reset
+		//write_reg(DMA_INT_MASK,read_reg(DMA_INT_MASK)|0x8);	//mask all dma interrupt  
+	}
+
+	up(&state->sem);
+	return 0;
+}
+
+static int sb2f_audio_open(struct inode *inode, struct file *file)
+{
+	audio_state_t *state = &sb2f_audio_state;
+	audio_stream_t *is = state->input_stream;
+	audio_stream_t *os = state->output_stream;
+	int err;
+
+	down(&state->sem);
+
+	/* access control */
+	err = -ENODEV;
+	if ((file->f_mode & FMODE_WRITE) && !os)
+		goto out;
+	if ((file->f_mode & FMODE_READ) && !is)
+		goto out;
+	err = -EBUSY;
+
+	if ((file->f_mode & FMODE_WRITE) && state->wr_ref)
+		goto out;
+	if ((file->f_mode & FMODE_READ) && state->rd_ref)
+		goto out;
+
+	file->private_data = state;
+
+	if ((file->f_mode & FMODE_WRITE)) {
+		state->wr_ref = 1;
+		os->fragsize = AUDIO_FRAGSIZE_DEFAULT;
+		os->nbfrags = PLAY_NBFRAGS;
+		os->output = 1;
+		os->single = 0;
+		os->fmt=AFMT_S16_LE;
+		init_waitqueue_head(&os->frag_wq);
+		os->ask_dma = NULL;
+		INIT_LIST_HEAD(&os->free_list);
+		INIT_LIST_HEAD(&os->run_list);
+		INIT_LIST_HEAD(&os->done_list);
+		INIT_LIST_HEAD(&os->all_list);
+		spin_lock_init(&os->lock);
+		request_irq(LS1B_BOARD_DMA1_IRQ, ac97_dma_write_intr, IRQF_SHARED,
+				"ac97dma-write", os);
+#ifdef CONFIG_SND_SB2F_TIMER
+		init_timer(&os->timer);
+		os->timer.data = (unsigned long)os;
+		os->timer.function = sb2f_audio_timeout;
+#endif
+	}
+
+	if (file->f_mode & FMODE_READ) {
+		state->rd_ref = 1;
+		is->fragsize = AUDIO_FRAGSIZE_DEFAULT;
+		is->nbfrags = REC_NBFRAGS;
+		is->output = 0;
+		is->single = 1;
+		is->fmt=AFMT_S16_LE;
+		init_waitqueue_head(&is->frag_wq);
+		is->ask_dma = NULL;
+		INIT_LIST_HEAD(&is->free_list);
+		INIT_LIST_HEAD(&is->run_list);
+		INIT_LIST_HEAD(&is->done_list);
+		INIT_LIST_HEAD(&is->all_list);
+		spin_lock_init(&is->lock);
+		request_irq(LS1B_BOARD_DMA2_IRQ, ac97_dma_read_intr, IRQF_SHARED,
+				"ac97dma-read", is);
+#ifdef CONFIG_SND_SB2F_TIMER
+		init_timer(&is->timer);
+		is->timer.data = (unsigned long)is;
+		is->timer.function = sb2f_audio_timeout;
+#endif
+	}
+
+	sb2f_def_set();
+	sb2f_open_set(file->f_mode);
+	err = 0;
+	
+	if(file->f_mode & FMODE_READ) {
+		err = sanity_check_codec_status(os);
+	}
+	else {
+		err = sanity_check_codec_status(is);
+	}
+
+out:
+	up(&state->sem);
+	return err;
+}
+
+static struct file_operations sb2f_dsp_fops = {
+	read:sb2f_audio_read,
+	write:sb2f_audio_write,
+	unlocked_ioctl:sb2f_audio_ioctl,
+//	fsync:sb2f_audio_sync,
+	poll:sb2f_audio_poll,
+	open:sb2f_audio_open,
+	release:sb2f_audio_release,
+};
+
+static DEFINE_SEMAPHORE(sb2f_ac97_mutex);
+static int sb2f_ac97_refcount = 0;
+
+static int sb2f_audio_probe(struct platform_device *pdev)
+{
+	down(&sb2f_ac97_mutex);
+
+	if (!sb2f_ac97_refcount) {
+		int i;
+		for (i=0; i<100000; i++)
+			*CSR |= 1;	/* å†·å�¯ */
+		sb2f_def_set();
+		//init codec
+		if (0 == ac97_probe_codec(&sb2f_ac97_codec)) {
+			DPRINTK("probe codec err.\n");
+			return -ENODEV;
+		}
+		else {
+			if (sb2f_ac97_codec.model == 0x414c4760) {
+				capmode = 0x00001;
+			}
+			else {
+				capmode =0x20000;
+			}
+			DPRINTK("probe codec OK.\n");
+		}
+
+		//2.register dsp  && mixer
+		sb2f_audio_state.dev_dsp =
+			register_sound_dsp(&sb2f_dsp_fops, -1);
+		sb2f_ac97_codec.dev_mixer =
+			register_sound_mixer(&sb2f_mixer_fops, -1);
+	}
+
+	sb2f_ac97_refcount = 1;
+	up(&sb2f_ac97_mutex);
+	return 0;
+}
+
+static int sb2f_audio_remove(struct platform_device *pdev)
+{
+	unregister_sound_dsp(sb2f_audio_state.dev_dsp);
+	unregister_sound_mixer(sb2f_ac97_codec.dev_mixer);
+
+	down(&sb2f_ac97_mutex);
+	sb2f_ac97_refcount = 0;
+	if (!sb2f_ac97_refcount) {
+	}
+	up(&sb2f_ac97_mutex);
+
+	return 0;
+}
+
+#ifdef CONFIG_PM
+static int ls1x_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	return 0;
+}
+
+static int ls1x_resume(struct platform_device *pdev)
+{
+	u32 flags, i;
+//	mdelay(100);
+	for (i=0; i<100000; i++)
+		*CSR |= 1;
+//	sb2f_def_set();
+	return 0;
+}
+#else
+#define ls1x_suspend	NULL
+#define ls1x_resume	NULL
+#endif
+
+static struct platform_driver sb2f_audio_driver = {
+	.driver = {
+		.name	= "ls1b-audio",
+		.owner	= THIS_MODULE,
+	},
+	.probe		= sb2f_audio_probe,
+	.remove		= sb2f_audio_remove,
+	.suspend		= ls1x_suspend,
+	.resume		= ls1x_resume,
+};
+
+static int __devinit sb2f_audio_init(void)
+{
+	int ret = 0;
+
+	ret = platform_driver_register(&sb2f_audio_driver);
+	if (ret)
+		printk(KERN_ERR "failed to register sb2f-audio drover");
+	return ret;
+}
+
+static void __devexit sb2f_audio_exit(void)
+{
+    platform_driver_unregister(&sb2f_audio_driver);
+}
+
+module_init(sb2f_audio_init);
+module_exit(sb2f_audio_exit);
+
+MODULE_LICENSE("GPL");
+
diff -uNra linux-3.0.82/sound/oss/ls1b-ac97.h linux-3.0.82x/sound/oss/ls1b-ac97.h
--- linux-3.0.82/sound/oss/ls1b-ac97.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/sound/oss/ls1b-ac97.h	2017-09-23 03:42:50.378673963 +0800
@@ -0,0 +1,192 @@
+
+/*
+ * FileName:lson_ac97.h 
+ *
+ * data:
+ * descriptor:
+ * update:
+ *
+ */
+
+#ifndef FCR_AC97_H__
+#define FCR_AC97_H__
+
+#define _REG(x) 	((volatile u32 *)(x))
+#define _REG2(b,o) 	((volatile u32 *)((b)+(o)))
+
+#define LSON_AC_FMT  		AFM_S16_LE
+#define LSON_AC_MAXCHNL 	2
+
+
+#define DMA_FROMAC_DESCs 4
+#define DMA_TOAC_DESCs 4
+
+
+//AC97_controler
+#define AC97_REG(off)       _REG2(KSEG1ADDR(LS1B_AC97_REGS_BASE),(off))
+#define CSR			AC97_REG(0x00)
+#define OCCR0		AC97_REG(0x04)
+#define OCCR1		AC97_REG(0x08)
+#define OCCR2		AC97_REG(0x0C)
+#define ICCR		AC97_REG(0x10)
+#define CDC_ID      AC97_REG(0x14)
+#define CRAC		AC97_REG(0x18)
+                                       /*Reserved 0x1C Reserved*/
+#define OC0_DATA    AC97_REG(0x20)     /*20 bits WO Output Channel0 Tx buffer*/
+#define OC1_DATA    AC97_REG(0x24)     /*20 bits WO Output Channel1 Tx buffer*/
+#define OC2_DATA    AC97_REG(0x28)     /*20 bits WO Output Channel2 Tx buffer*/
+#define OC3_DATA    AC97_REG(0x2C)     /*20 bits WO Output Channel3 Tx buffer*/
+#define OC4_DATA    AC97_REG(0x30)     /*20 bits WO Output Channel4 Tx buffer*/
+#define OC5_DATA    AC97_REG(0x34)     /*20 bits WO Output Channel5 Tx buffer*/
+#define OC6_DATA    AC97_REG(0x38)     /*20 bits WO Output Channel6 Tx buffer*/
+#define OC7_DATA    AC97_REG(0x3C)     /*20 bits WO Output Channel7 Tx buffer*/
+#define OC8_DATA    AC97_REG(0x40)     /*20 bits WO Output Channel8 Tx buffer*/
+#define IC0_DATA    AC97_REG(0x44)     /*20 bits RO Input Channel0 Rx buffer*/
+#define IC1_DATA    AC97_REG(0x48)     /*20 bits RO Input Channel1 Rx buffer*/
+#define IC2_DATA    AC97_REG(0x4C)     /*20 bits RO Input Channel2 Rx buffer*/
+                                       /*Reserved AC97_REG(0x50 Reserved*/
+#define INTRAW      AC97_REG(0x54)     /*32 bits RO Interrupt RAW status*/
+#define INTM        AC97_REG(0x58)     /*32 bits R/W Interrupt Mask*/
+#define INTS        AC97_REG(0x5C)     /*32 bits RO Interrupt Masked Status*/
+#define CLR_INT     AC97_REG(0x60)     /*1 bit RO Clear Combined and Individual Interrupt*/
+#define CLR_OC_INT  AC97_REG(0x64)     /*1 bit RO Clear Output Channel Reference Interrupt*/
+#define CLR_IC_INT  AC97_REG(0x68)      /*1 bit RO Clear Input Channel Reference Interrupt*/
+#define CLR_CDC_WR  AC97_REG(0x68)      /*1 bit RO Clear Codec Write Done Interrupt*/
+#define CLR_CDC_RD  AC97_REG(0x6c)      /*1 bit RO Clear Codec Read Done Interrupt*/
+
+#define OC_DATA     OC0_DATA            /*DEFAULT */
+#define IN_DATA     IC1_DATA            /*SETTING */
+
+
+#define 	INPUT_CHANNELS	8
+#define 	OUTPUT_CHANNELS	9
+
+/*reg bits define*/ 
+#define CRAR_READ  0x80000000
+#define CRAR_WRITE 0x00000000
+#define CRAR_CODEC_REG(x)  (((x)&(0x7F))<<16)
+
+//default setting 
+#define OCCR	    OCCR0
+#define OUT_CHANNEL OC[0]
+#define IN_CHANNEL  IC[0]
+#define INTS_CRAC_MASK	0x3
+
+/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
+//
+// DMA regs
+//
+/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
+
+//#define FCR_ACDMA_REG_BASE	0x1f004280
+#define CONFREG_BASE		0xbfd00000
+#define FCR_ACDMA_REG_BASE	0x1fe74080
+//#define AC97_REG(off)       _REG2(KSEG1ADDR(FCR_AC97_REGS_BASE),(off))
+#define DMA_REG(off)  		_REG2(KSEG1ADDR(FCR_ACDMA_REG_BASE),(off))
+
+/* dma regs */
+#define DMA_ORDERED		0x0
+#define DMA_SADDR		0x1
+#define DMA_DADDR		0x2
+#define DMA_LENGTH		0x3
+#define DMA_STEP_LENGTH		0x4
+#define DMA_STEP_TIMES		0x5
+#define	DMA_CMD			0x6
+
+/* bit offset in order_addr_reg */
+#define DMA_STOP_OFF		0x4
+#define DMA_START_OFF		0x3
+#define DMA_ASKVALID_OFF	0x2
+#define DMA_DEVNUM_OFF		0x0
+
+/* define dma status */
+#define DMA_START		0x0
+#define DMA_STOP		0x1
+
+#define DMA_BUF_UPPER		0x3
+#define DMA_BUF_LOW		0x1
+
+#define AUD_WRITE_ADDR		0xdfe72420	
+#define AUD_READ_ADDR		0x9fe74c4c
+
+#define BLANK_SIZE		0x20
+
+#define ZERO_BUF_SIZE 128
+#define DESC_VALID 1
+
+typedef struct _audio_dma_desc {
+	u32 ordered;
+	u32 saddr;
+	u32 daddr;
+	u32 length;
+	u32 step_length;
+	u32 step_times;
+	u32 cmd;
+	u32 stats;
+} _audio_dma_desc;//ç”¨æ�¥æ��è¿°DMAæŽ§åˆ¶å™¨
+
+typedef struct audio_dma_desc {
+	_audio_dma_desc snd;
+	_audio_dma_desc null;
+	struct audio_dma_desc *next;
+	struct list_head link;
+	struct list_head all;
+	dma_addr_t snd_dma_handle;
+	dma_addr_t snd_dma;
+	u32 pos;
+	char *snd_buffer;
+} audio_dmadesc_t;//æ��è¿°æ¯�ä¸ªDMAç¼“å†²åŒº
+
+
+typedef struct audio_stream {
+	char *name;		//in or out
+	u32 buffer_size;
+	_audio_dma_desc *ask_dma;
+	struct list_head free_list;
+	struct list_head run_list;
+	struct list_head done_list;
+	struct list_head all_list;
+	spinlock_t lock;
+#ifdef CONFIG_SND_SB2F_TIMER
+	struct timer_list	timer;		/* "no irq" timer */
+#endif
+	u32 nbfrags;
+	u32 fragsize;
+	u32 descs_per_frag;
+	struct semaphore sem;
+	wait_queue_head_t frag_wq;
+	char *null_buffer;
+	dma_addr_t null_dma;
+	dma_addr_t ask_dma_handle;
+
+	u32 output:1;
+	u32 single:1;
+	u32 fmt;
+	u32 rate;
+	u32 state;
+} audio_stream_t;
+
+enum {
+	STOP = 0,
+	RUN = 1
+};
+
+typedef struct audio_state {
+	audio_stream_t *input_stream;
+	audio_stream_t *output_stream;
+	u32 dev_dsp;
+	u32 rd_ref:1;
+	u32 wr_ref:1;
+	struct semaphore sem;
+} audio_state_t;
+
+#define DEBUG 1
+#define REC_DEBUG 1
+#undef REC_DEBUG
+#define DMA_DESC		0x5
+#define REC_NBFRAGS		DMA_DESC
+#define PLAY_NBFRAGS		DMA_DESC
+#define AUDIO_FRAGSIZE_DEFAULT  0x2000
+
+#endif
+
diff -uNra linux-3.0.82/sound/oss/ls1x_ac97.c linux-3.0.82x/sound/oss/ls1x_ac97.c
--- linux-3.0.82/sound/oss/ls1x_ac97.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/sound/oss/ls1x_ac97.c	2017-09-23 03:42:50.378673963 +0800
@@ -0,0 +1,1347 @@
+/*
+ * Copyright (c) 2013 Tang, Haifeng <tanghaifeng-gz@loongson.cn>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under  the terms of the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the License, or (at your
+ *  option) any later version.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/pci.h>
+#include <linux/poll.h>
+#include <linux/sound.h>
+#include <linux/soundcard.h>
+#include <linux/types.h>
+#include <linux/sched.h>
+#include <linux/semaphore.h>
+#include <linux/ac97_codec.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include "ls1x_ac97.h"
+#include <irq.h>
+#include <ls1b_board.h>
+
+
+void __iomem *order_addr_in;
+static int codec_reset = 1;
+
+struct dma_desc {
+	u32 ordered;
+	u32 saddr;
+	u32 daddr;
+	u32 length;
+	u32 step_length;
+	u32 step_times;
+	u32 cmd;
+	u32 stats;
+};
+
+struct audio_dma_desc {
+	struct dma_desc snd;
+	struct dma_desc null;
+	struct list_head link;
+	struct list_head all;
+	dma_addr_t snd_dma_handle;
+	dma_addr_t snd_dma;
+	u32 pos;
+	char *snd_buffer;
+};
+
+struct audio_stream {
+	struct dma_desc *ask_dma;
+	struct list_head free_list;
+	struct list_head run_list;
+	struct list_head done_list;
+	struct list_head all_list;
+	spinlock_t lock;
+#ifdef CONFIG_SND_SB2F_TIMER
+	struct timer_list	timer;		/* "no irq" timer */
+#endif
+	u32 nbfrags;
+	u32 fragsize;
+	struct semaphore sem;
+	wait_queue_head_t frag_wq;
+	dma_addr_t ask_dma_handle;
+
+	int num_channels;
+	u32 output;
+	u32 sample_rate;
+	u32 sample_size;
+	u32 rate;
+	u32 state;
+};
+
+static struct audio_stream input_stream = {
+	output: 0,
+	fragsize:0x10000,
+};
+
+static struct audio_stream output_stream = {
+	output: 1,
+	fragsize:0x10000,
+};
+
+enum {
+	STOP = 0,
+	RUN = 1
+};
+
+/* Boot options
+ * 0 = no VRA, 1 = use VRA if codec supports it
+ */
+static int      vra = 1;
+module_param(vra, bool, 0);
+MODULE_PARM_DESC(vra, "if 1 use VRA if codec supports it");
+
+static struct ls1x_audio_state {
+	void __iomem *base;
+	/* soundcore stuff */
+	int dev_audio;
+
+	struct ac97_codec *codec;
+	unsigned codec_base_caps; /* AC'97 reg 00h, "Reset Register" */
+	unsigned codec_ext_caps;  /* AC'97 reg 28h, "Extended Audio ID" */
+	int no_vra;		/* do not use VRA */
+
+	spinlock_t lock;
+	struct mutex open_mutex;
+	struct mutex mutex;
+	fmode_t open_mode;
+	wait_queue_head_t open_wait;
+
+	struct audio_stream	 *input_stream;
+	struct audio_stream	 *output_stream;
+
+	u32 rd_ref:1;
+	u32 wr_ref:1;
+	struct semaphore sem;
+} ls1x_audio_state;
+
+static u16 ls1x_codec_read(struct ac97_codec *codec, volatile u8 reg)
+{
+	struct ls1x_audio_state *state = (struct ls1x_audio_state *)codec->private_data;
+	int i = 1000;
+	u32 data = 0;
+	
+	data |= CODEC_WR;
+	data |= ((u32)reg << CODEC_ADR_OFFSET);
+	writel(data, state->base + CRAC);
+
+	/* now wait for the data */
+	while (i-- > 0) {
+		if ((readl(state->base + INTRAW) & CR_DONE) != 0)
+			break;
+		udelay(500);
+	}
+	if (i > 0) {
+		readl(state->base + INT_CRCLR);
+		return readl(state->base + CRAC) & 0xffff;
+	}
+	printk("AC97 command read timeout\n");
+	return 0;
+}
+
+static void ls1x_codec_write(struct ac97_codec *codec, u8 reg, u16 val)
+{
+	struct ls1x_audio_state *state = (struct ls1x_audio_state *)codec->private_data;
+	int i = 1000;
+	u32 data = 0;
+	
+	data &= ~(CODEC_WR);
+	data |= ((u32)reg << CODEC_ADR_OFFSET) | ((u32)val << CODEC_DAT_OFFSET);
+	writel(data, state->base + CRAC);
+
+	while (i-- > 0) {
+		if ((readl(state->base + INTRAW) & CW_DONE) != 0)
+			break;
+		udelay(500);
+	}
+	if (i > 0) {
+		readl(state->base + INT_CWCLR);
+	}
+}
+
+static void set_adc_rate(struct ls1x_audio_state *state, unsigned rate)
+{
+	struct audio_stream *adc = state->input_stream;
+	struct audio_stream *dac = state->output_stream;
+	unsigned adc_rate, dac_rate;
+	u16 ac97_extstat;
+
+	if (state->no_vra) {
+		adc->sample_rate = 48000;
+		return;
+	}
+
+	ac97_extstat = ls1x_codec_read(state->codec, AC97_EXTENDED_STATUS);
+
+	rate = rate > 48000 ? 48000 : rate;
+
+	/* enable VRA
+	*/
+	ls1x_codec_write(state->codec, AC97_EXTENDED_STATUS,
+		ac97_extstat | AC97_EXTSTAT_VRA);
+
+	/* now write the sample rate
+	*/
+	ls1x_codec_write(state->codec, AC97_PCM_LR_ADC_RATE, (u16) rate);
+
+	/* read it back for actual supported rate
+	*/
+	adc_rate = ls1x_codec_read(state->codec, AC97_PCM_LR_ADC_RATE);
+
+	pr_debug("set_adc_rate: set to %d Hz\n", adc_rate);
+
+	/* some codec's don't allow unequal DAC and ADC rates, in which case
+	 * writing one rate reg actually changes both.
+	 */
+	dac_rate = ls1x_codec_read(state->codec, AC97_PCM_FRONT_DAC_RATE);
+	if (dac->num_channels > 2)
+		ls1x_codec_write(state->codec, AC97_PCM_SURR_DAC_RATE, dac_rate);
+	if (dac->num_channels > 4)
+		ls1x_codec_write(state->codec, AC97_PCM_LFE_DAC_RATE, dac_rate);
+
+	adc->sample_rate = adc_rate;
+	dac->sample_rate = dac_rate;
+}
+
+static void set_dac_rate(struct ls1x_audio_state *state, unsigned rate)
+{
+	struct audio_stream *adc = state->input_stream;
+	struct audio_stream *dac = state->output_stream;
+	unsigned adc_rate, dac_rate;
+	u16 ac97_extstat;
+
+	if (state->no_vra) {
+		dac->sample_rate = 48000;
+		return;
+	}
+
+	ac97_extstat = ls1x_codec_read(state->codec, AC97_EXTENDED_STATUS);
+
+	rate = rate > 48000 ? 48000 : rate;
+
+	/* enable VRA
+	*/
+	ls1x_codec_write(state->codec, AC97_EXTENDED_STATUS,
+		ac97_extstat | AC97_EXTSTAT_VRA);
+
+	/* now write the sample rate
+	*/
+	ls1x_codec_write(state->codec, AC97_PCM_FRONT_DAC_RATE, (u16) rate);
+
+	/* I don't support different sample rates for multichannel,
+	 * so make these channels the same.
+	 */
+	if (dac->num_channels > 2)
+		ls1x_codec_write(state->codec, AC97_PCM_SURR_DAC_RATE, (u16) rate);
+	if (dac->num_channels > 4)
+		ls1x_codec_write(state->codec, AC97_PCM_LFE_DAC_RATE, (u16) rate);
+	/* read it back for actual supported rate
+	*/
+	dac_rate = ls1x_codec_read(state->codec, AC97_PCM_FRONT_DAC_RATE);
+
+	pr_debug("set_dac_rate: set to %d Hz\n", dac_rate);
+
+	/* some codec's don't allow unequal DAC and ADC rates, in which case
+	 * writing one rate reg actually changes both.
+	 */
+	adc_rate = ls1x_codec_read(state->codec, AC97_PCM_LR_ADC_RATE);
+
+	dac->sample_rate = dac_rate;
+	adc->sample_rate = adc_rate;
+}
+
+static loff_t ls1x_llseek(struct file *file, loff_t offset, int origin)
+{
+	return -ESPIPE;
+}
+
+static int ls1x_open_mixdev(struct inode *inode, struct file *file)
+{
+	file->private_data = &ls1x_audio_state;
+	return 0;
+}
+
+static int ls1x_release_mixdev(struct inode *inode, struct file *file)
+{
+	return 0;
+}
+
+static long ls1x_ioctl_mixdev(struct file *file, unsigned int cmd, unsigned long arg)
+{
+	struct ls1x_audio_state *state = (struct ls1x_audio_state *)file->private_data;
+	struct ac97_codec *codec = state->codec;
+
+	return codec->mixer_ioctl(codec, cmd, arg);
+}
+
+static struct file_operations ls1x_mixer_fops = {
+	.owner		= THIS_MODULE,
+	.llseek		= ls1x_llseek,
+//	.llseek		= no_llseek,
+	.unlocked_ioctl	= ls1x_ioctl_mixdev,
+	.open		= ls1x_open_mixdev,
+	.release	= ls1x_release_mixdev,
+};
+
+static void dma_enable_trans(struct audio_stream * s, struct audio_dma_desc *desc)
+{
+//	struct ls1x_audio_state *state = &ls1x_audio_state;
+	u32 val;
+	int timeout = 20000;
+//	unsigned long flags;
+
+	val = desc->snd_dma_handle;
+	val |= s->output ? 0x9 : 0xa;
+//	local_irq_save(flags);
+	writel(val, order_addr_in);
+//	while(readl(order_addr_in) & 0x8);
+	while ((readl(order_addr_in) & 0x8) && (timeout-- > 0)) {
+//		udelay(5);
+	}
+//	local_irq_restore(flags);
+//	writel(0xffffffff, state->base + INTM);
+#ifdef CONFIG_SND_SB2F_TIMER
+	mod_timer(&s->timer, jiffies + HZ/20);
+#endif
+}
+
+void audio_clear_buf(struct audio_stream *s)
+{
+	struct audio_dma_desc *desc;
+
+	while (!list_empty(&s->all_list)) {
+		desc = list_entry(s->all_list.next, struct audio_dma_desc, all);
+		list_del(&desc->all);
+		list_del(&desc->link);
+
+		if (desc->snd_buffer)
+			free_pages((unsigned long)desc->snd_buffer, get_order(s->fragsize));
+		dma_free_coherent(NULL, sizeof(struct audio_dma_desc), desc, 0);
+	}
+
+	if (s->ask_dma)
+		dma_free_coherent(NULL, sizeof(struct audio_dma_desc), s->ask_dma, 0);
+
+	s->ask_dma = NULL;
+}
+
+static void inline link_dma_desc(struct audio_stream *s, struct audio_dma_desc *desc)
+{
+//	spin_lock_irq(&s->lock);
+
+	if (!list_empty(&s->run_list)) {
+		struct audio_dma_desc *desc0;
+		desc0 = list_entry(s->run_list.prev, struct audio_dma_desc, link);
+		desc0->snd.ordered = desc->snd_dma_handle | DMA_ORDERED_EN;
+		desc0->null.ordered = desc->snd_dma_handle | DMA_ORDERED_EN;
+		list_add_tail(&desc->link, &s->run_list);
+		if (s->state == STOP) {
+			s->state = RUN;
+			dma_enable_trans(s, desc0);
+		}
+	}
+	else {
+		list_add_tail(&desc->link,&s->run_list);
+		dma_enable_trans(s, desc);
+	}
+
+//	spin_unlock_irq(&s->lock);
+}
+
+static void ls1x_init_dmadesc(struct audio_stream *s, struct audio_dma_desc *desc, u32 count)
+{
+	struct dma_desc *_desc;
+	u32 control;
+
+	control = s->output ? 0x0fe72420 : 0x0fe74c4c;
+
+	control |= (1<<31);
+	/*
+	* [30]-1 two channels
+	* [30]-0 one channel
+	*/
+	if (s->num_channels == 1)
+		control &= ~(1 << 30);
+	else
+		control |= (1 << 30);
+
+	/*
+	* [29:28]-00 --> byte
+	* [29:28]-01 --> half word(two bytes)
+	* [29:28]-10 --> word (four bytes)
+	*/
+	if (s->sample_size == AFMT_S16_LE) {
+		control |= (1 << 28);
+	}
+
+	desc->snd.daddr = desc->null.daddr = control;
+
+	_desc = &desc->snd;
+	_desc->ordered = (desc->snd_dma_handle + sizeof(struct dma_desc)) | DMA_ORDERED_EN;
+	_desc->saddr = desc->snd_dma;
+	_desc->length = 8;
+	_desc->step_length = 0;
+	_desc->step_times = count >> 5;
+	_desc->cmd = s->output ? 0x00001001 : 0x00000001; //enable the interrupt
+
+	_desc = &desc->null;
+	_desc->ordered =  (desc->snd_dma_handle + sizeof(struct dma_desc)) | DMA_ORDERED_EN;
+	_desc->saddr = desc->snd_dma;
+	_desc->length = 8;
+	_desc->step_length = 0;
+	_desc->step_times = 1;
+	_desc->cmd = s->output ? 0x00001000 : 0x00000000; //disable the interrupt
+}
+
+/* setup buffers,dma descs,buffer. */
+int ls1x_setup_buf(struct audio_stream * s)
+{	
+	int i;
+	dma_addr_t dma_phyaddr;
+
+	if (s->ask_dma)
+		return -EBUSY;
+
+	for (i=0; i <s->nbfrags; i++) {
+		struct audio_dma_desc *desc;
+
+		desc = dma_alloc_coherent(NULL, sizeof(struct audio_dma_desc),
+					(dma_addr_t *)&dma_phyaddr, GFP_KERNEL);
+		if (!desc) {
+			printk(KERN_ERR "2.alloc dma desc err.\n");
+			goto err;
+		}
+		memset(desc, 0, sizeof(struct audio_dma_desc));
+
+		desc->snd_dma_handle = dma_phyaddr;
+		desc->null.ordered = (dma_phyaddr + sizeof(struct dma_desc)) | DMA_ORDERED_EN;
+		desc->snd.ordered = (dma_phyaddr + sizeof(struct dma_desc)) | DMA_ORDERED_EN;
+		list_add_tail(&desc->link,&s->free_list);
+		list_add_tail(&desc->all,&s->all_list);
+
+		desc->snd_buffer = (void *)__get_free_pages(GFP_ATOMIC|GFP_DMA, get_order(s->fragsize));
+		if (!desc->snd_buffer) {
+			printk(KERN_ERR "4.alloc dma buffer err\n");
+			goto err;
+		}
+		desc->snd_dma = dma_map_single(NULL, desc->snd_buffer, s->fragsize, DMA_FROM_DEVICE);
+	}
+
+	/* dma desc for ask_valid one per struct audio_stream */
+	s->ask_dma = dma_alloc_coherent(NULL, sizeof(struct dma_desc),
+			&dma_phyaddr, GFP_KERNEL);
+	if (!s->ask_dma) {
+		printk(KERN_ERR "3. alloc dma desc err.\n");
+		goto err;
+	}
+	memset(s->ask_dma, 0, sizeof(struct dma_desc));
+	s->ask_dma_handle = dma_phyaddr;
+
+	sema_init(&s->sem, 1);
+
+	return 0;
+
+err:
+	audio_clear_buf(s);
+	printk(KERN_ERR "unable to allocate audio memory\n");
+	return -ENOMEM;
+}
+
+#ifdef CONFIG_SND_SB2F_TIMER
+static void ls1x_audio_timeout(unsigned long data)
+{
+	struct audio_stream *s = (struct audio_stream *)data;
+	if (s->output)
+		ac97_dma_write_intr(0, s);
+	else
+		ac97_dma_read_intr(0, s);
+	mod_timer(&s->timer, jiffies + HZ/20);
+}
+#endif
+
+static irqreturn_t ac97_dma_read_intr(int irq, void *private)
+{
+	struct audio_stream *s = (struct audio_stream *)private;
+	struct audio_dma_desc *desc;
+//	unsigned long flags;
+
+	if (list_empty(&s->run_list))
+		return IRQ_HANDLED;
+
+//	local_irq_save(flags);
+	writel(s->ask_dma_handle | 0x6, order_addr_in);
+	while (readl(order_addr_in) & 4) {
+	}
+//	local_irq_restore(flags);
+
+	do {
+		desc = list_entry(s->run_list.next, struct audio_dma_desc, link);
+		if (s->ask_dma->ordered == desc->snd.ordered)
+			break;
+
+//		spin_lock(&s->lock);
+		list_del(&desc->link);
+		list_add_tail(&desc->link, &s->done_list);
+//		spin_unlock(&s->lock);
+	} while (!list_empty(&s->run_list));
+
+	if (!list_empty(&s->done_list))
+		wake_up(&s->frag_wq);
+	return IRQ_HANDLED;
+}
+
+static irqreturn_t ac97_dma_write_intr(int irq, void *private)
+{
+	struct audio_stream *s = (struct audio_stream *)private;
+	struct audio_dma_desc *desc;
+//	unsigned long flags;
+
+	if (list_empty(&s->run_list))
+		return IRQ_HANDLED;
+
+//	local_irq_save(flags);
+	writel(s->ask_dma_handle | 0x5, order_addr_in);
+	while (readl(order_addr_in) & 4) {
+	}
+//	local_irq_restore(flags);
+
+	do {
+		desc = list_entry(s->run_list.next, struct audio_dma_desc, link);
+		/*first desc's ordered may be null*/
+		if (s->ask_dma->ordered == desc->snd.ordered || s->ask_dma->ordered == 
+			((desc->snd_dma_handle + sizeof(struct dma_desc)) | DMA_ORDERED_EN))
+			break;
+
+//		spin_lock(&s->lock);
+		list_del(&desc->link);
+		desc->pos = 0;
+		list_add_tail(&desc->link, &s->free_list);
+//		spin_unlock(&s->lock);
+	} while (!list_empty(&s->run_list));
+
+	if (!list_empty(&s->free_list))
+		wake_up(&s->frag_wq);
+
+	return IRQ_HANDLED;
+}
+
+static u32 fill_play_buffer(struct audio_stream *s, const char *buf, u32 count)
+{
+	struct audio_dma_desc *desc;
+	u32 copy_bytes;
+
+	desc = list_entry(s->free_list.next, struct audio_dma_desc, link);
+	copy_bytes = min((s->fragsize - desc->pos), count);
+	copy_from_user((void *)(desc->snd_buffer + desc->pos), buf, copy_bytes);
+	desc->pos += copy_bytes;
+
+	if (desc->pos == s->fragsize) {
+//		spin_lock_irq(&s->lock);
+		list_del(&desc->link);
+//		spin_unlock_irq(&s->lock);
+		ls1x_init_dmadesc(s, desc, s->fragsize);
+		link_dma_desc(s, desc);
+	}
+
+	return copy_bytes;
+}
+
+static int ls1x_audio_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
+{
+	struct ls1x_audio_state *state = (struct ls1x_audio_state *)file->private_data;
+	struct audio_stream *s = state->output_stream;
+	const char *buffer0 = buffer;
+	unsigned int ret = 0;
+
+	if (*ppos != file->f_pos) {
+		return -ESPIPE;
+	}
+
+	if (!s->ask_dma && ls1x_setup_buf(s)) {
+		return -ENOMEM;
+	}
+
+	if (file->f_flags & O_NONBLOCK) {
+		if (down_trylock(&s->sem))
+			return -EAGAIN;
+	} else {
+		if (down_interruptible(&s->sem))
+			return -ERESTARTSYS;
+	}
+
+	while (count > 0) {
+		if (list_empty(&s->free_list)) {
+			if (file->f_flags & O_NONBLOCK)
+				return -EAGAIN;
+
+			if (wait_event_interruptible(s->frag_wq, !list_empty(&s->free_list))) {
+				up(&s->sem);
+				return -ERESTARTSYS;
+			}
+		}
+
+		/* Fill data , if the ring is not full */
+		ret = fill_play_buffer(s, buffer, count);
+		count -= ret;
+		buffer += ret;
+	}
+
+	up(&s->sem);
+	return (buffer - buffer0);
+}
+
+static int ls1x_copy_to_user(struct audio_stream *s, char *buffer, u32 count)
+{
+	struct audio_dma_desc *desc;
+	int ret = 0;
+
+	while (!list_empty(&s->done_list) && count) {
+		u32 left;
+		desc = list_entry(s->done_list.next, struct audio_dma_desc, link);
+		left = min(s->fragsize - desc->pos,count);
+		copy_to_user(buffer, (void *)(desc->snd_buffer + desc->pos), left);
+		desc->pos += left;
+		count -= left;
+		buffer += left;
+		ret += left;
+		if (desc->pos == s->fragsize) {
+			list_del(&desc->link);
+			desc->pos = 0;
+			list_add_tail(&desc->link, &s->free_list);
+		}
+	}
+
+	return ret;
+}
+
+static int ls1x_audio_read(struct file *file, char *buffer, size_t count, loff_t * ppos)
+{
+	struct ls1x_audio_state *state = file->private_data;
+	struct audio_stream *s = state->input_stream;
+	struct audio_dma_desc *desc;
+	char *buffer0 = buffer;
+
+	if (*ppos != file->f_pos)
+		return -ESPIPE;
+
+	if (!s->ask_dma && ls1x_setup_buf(s))
+		return -ENOMEM;
+
+	/*3. sem:get resource .if 0 ,wait */
+	if (file->f_flags & O_NONBLOCK) {
+		if (down_trylock(&s->sem))
+			return -EAGAIN;
+	} else {
+		if (down_interruptible(&s->sem))
+			return -ERESTARTSYS;
+	}
+
+	while (count > 0) {
+		int ret;
+
+		while (!list_empty(&s->free_list)) {
+			desc = list_entry(s->free_list.next, struct audio_dma_desc, link);
+//			spin_lock_irq(&s->lock);
+			list_del(&desc->link);
+//			spin_unlock_irq(&s->lock);
+			ls1x_init_dmadesc(s, desc, s->fragsize);
+			link_dma_desc(s, desc);
+		}
+
+		/* record's buffer is empty */
+		while (list_empty(&s->done_list)) {
+			if (file->f_flags & O_NONBLOCK) {
+				up(&s->sem);
+				return -EAGAIN;
+			}
+			if (wait_event_interruptible(s->frag_wq, !list_empty(&s->done_list))) {
+				up(&s->sem);
+				return -ERESTARTSYS;
+			}
+		}
+
+		/* data is ready now , so copy it */
+		ret = ls1x_copy_to_user(s, buffer, count);
+		count -= ret;
+		buffer += ret;
+	}
+
+	while (!list_empty(&s->free_list)) {
+		desc = list_entry(s->free_list.next, struct audio_dma_desc, link);
+		list_del(&desc->link);
+		ls1x_init_dmadesc(s, desc, s->fragsize);
+		link_dma_desc(s, desc);
+	}
+
+	up(&s->sem);
+	return (buffer - buffer0);
+}
+
+static int ls1x_audio_sync(struct file *file)
+{
+	struct ls1x_audio_state *state = file->private_data;
+	struct audio_stream *is = state->input_stream;
+	struct audio_stream *os = state->output_stream; 
+
+	if (file->f_mode & FMODE_READ) {
+		if (is->state == STOP && !list_empty(&is->run_list)) {
+			struct audio_dma_desc *desc;
+			desc = list_entry(is->run_list.next, struct audio_dma_desc, link);
+			dma_enable_trans(is, desc);
+			is->state = RUN;
+		}
+
+		if (!list_empty(&is->run_list))
+			schedule_timeout(CONFIG_HZ*2);
+
+		/* stop write ac97 dma */
+		writel(0x12, order_addr_in);
+	}
+	if (file->f_mode & FMODE_WRITE) {
+		if (os->state == STOP && !list_empty(&os->run_list)) {
+			struct audio_dma_desc *desc;
+			desc = list_entry(os->run_list.next, struct audio_dma_desc, link);
+			dma_enable_trans(os, desc);
+			os->state = RUN;
+		}
+
+		if (!list_empty(&os->run_list))
+			schedule_timeout(CONFIG_HZ*2);
+
+		/* stop read ac97 dma */
+		writel(0x11, order_addr_in);
+	}
+
+	return 0;
+}
+
+static unsigned int ls1x_audio_poll(struct file *file, struct poll_table_struct *wait)
+{
+	struct ls1x_audio_state *state = file->private_data;
+	struct audio_stream *is = state->input_stream;
+	struct audio_stream *os = state->output_stream;
+	unsigned int mask = 0;
+
+	if (file->f_mode & FMODE_READ) {
+		if (!is->ask_dma && ls1x_setup_buf(is))
+			return -ENOMEM;
+		poll_wait(file, &is->frag_wq, wait);
+		if(!list_empty(&is->done_list)) {
+			mask |= POLLIN | POLLRDNORM;
+		}
+	}
+
+	if (file->f_mode & FMODE_WRITE) {
+		if (!os->ask_dma && ls1x_setup_buf(os))
+			return -ENOMEM;
+		poll_wait(file, &os->frag_wq, wait);
+		if(!list_empty(&os->free_list)) {
+			mask |= POLLOUT | POLLWRNORM;
+		}
+	}
+	return mask;
+}
+
+static long ls1x_audio_ioctl(struct file *file, uint cmd, ulong arg)
+{
+	struct ls1x_audio_state *state = file->private_data;
+	struct audio_stream *os = state->output_stream;
+	struct audio_stream *is = state->input_stream;
+	int rd=0, wr=0, val=0;
+
+	if (file->f_mode & FMODE_WRITE)
+		wr = 1;
+	if (file->f_mode & FMODE_READ)
+		rd = 1;
+
+	switch (cmd) {
+	case OSS_GETVERSION:
+		return put_user(SOUND_VERSION, (int *) arg);
+
+	case SNDCTL_DSP_SYNC:
+		return ls1x_audio_sync(file);
+
+	case SNDCTL_DSP_SETDUPLEX:
+		return 0;
+
+	case SNDCTL_DSP_GETCAPS:
+		val = DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP;
+		if (is && os)
+			val |= DSP_CAP_DUPLEX;
+		return put_user(val, (int *) arg);
+
+	case SNDCTL_DSP_RESET:
+		if (file->f_mode & FMODE_WRITE) {
+			ls1x_audio_sync(file);
+			audio_clear_buf(os);
+		}
+		if (file->f_mode & FMODE_READ) {
+			ls1x_audio_sync(file);
+			audio_clear_buf(is);
+		}
+		return 0;
+
+	case SNDCTL_DSP_SPEED:
+		if (get_user(val, (int *) arg))
+			return -EFAULT;
+		if (val >= 0) {
+			if (file->f_mode & FMODE_READ) {
+				set_adc_rate(state, val);
+			}
+			if (file->f_mode & FMODE_WRITE) {
+				set_dac_rate(state, val);
+			}
+		}
+		return put_user((file->f_mode & FMODE_READ) ?
+				state->input_stream->sample_rate :
+				state->output_stream->sample_rate,
+				(int *)arg);
+
+	case SNDCTL_DSP_STEREO:
+		if (get_user(val, (int *) arg))
+			return -EFAULT;
+		if (file->f_mode & FMODE_READ) {
+			is->num_channels = val ? 2 : 1;
+		}
+		if (file->f_mode & FMODE_WRITE) {
+			os->num_channels = val ? 2 : 1;
+			if (state->codec_ext_caps & AC97_EXT_DACS) {
+				/* disable surround and center/lfe in AC'97
+				*/
+				u16 ext_stat = ls1x_codec_read(state->codec,
+						       AC97_EXTENDED_STATUS);
+				ls1x_codec_write(state->codec, AC97_EXTENDED_STATUS,
+					ext_stat | (AC97_EXTSTAT_PRI |
+						    AC97_EXTSTAT_PRJ |
+						    AC97_EXTSTAT_PRK));
+			}
+		}
+		return 0;
+
+	case SNDCTL_DSP_CHANNELS:
+		if (get_user(val, (int *) arg))
+			return -EFAULT;
+		if (val != 0) {
+			if (file->f_mode & FMODE_READ) {
+				if (val < 0 || val > 2)
+					return -EINVAL;
+				is->num_channels = val;
+			}
+			if (file->f_mode & FMODE_WRITE) {
+				switch (val) {
+				case 1:
+				case 2:
+					break;
+				case 3:
+				case 5:
+					return -EINVAL;
+				case 4:
+					if (!(state->codec_ext_caps &
+					      AC97_EXTID_SDAC))
+						return -EINVAL;
+					break;
+				case 6:
+					if ((state->codec_ext_caps &
+					     AC97_EXT_DACS) != AC97_EXT_DACS)
+						return -EINVAL;
+					break;
+				default:
+					return -EINVAL;
+				}
+
+				if (val <= 2 &&
+				    (state->codec_ext_caps & AC97_EXT_DACS)) {
+					/* disable surround and center/lfe
+					 * channels in AC'97
+					 */
+					u16 ext_stat = ls1x_codec_read(state->codec, AC97_EXTENDED_STATUS);
+					ls1x_codec_write(state->codec, AC97_EXTENDED_STATUS,
+						ext_stat | (AC97_EXTSTAT_PRI | AC97_EXTSTAT_PRJ | AC97_EXTSTAT_PRK));
+				} else if (val >= 4) {
+					/* enable surround, center/lfe
+					 * channels in AC'97
+					 */
+					u16 ext_stat = ls1x_codec_read(state->codec, AC97_EXTENDED_STATUS);
+					ext_stat &= ~AC97_EXTSTAT_PRJ;
+					if (val == 6)
+						ext_stat &= ~(AC97_EXTSTAT_PRI | AC97_EXTSTAT_PRK);
+					ls1x_codec_write(state->codec, AC97_EXTENDED_STATUS, ext_stat);
+				}
+
+				os->num_channels = val;
+			}
+		}
+		return put_user(val, (int *) arg);
+
+	case SNDCTL_DSP_GETFMTS:	/* Returns a mask */
+		return put_user(AFMT_S16_LE | AFMT_U8, (int *) arg);
+
+	case SNDCTL_DSP_SETFMT:	/* Selects ONE fmt */
+		if (get_user(val, (int *) arg))
+			return -EFAULT;
+		if (val != AFMT_QUERY) {
+			if (file->f_mode & FMODE_READ) {
+				if (val == AFMT_S16_LE)
+					state->input_stream->sample_size = 16;
+				else {
+					val = AFMT_U8;
+					state->input_stream->sample_size = 8;
+				}
+			}
+			if (file->f_mode & FMODE_WRITE) {
+				if (val == AFMT_S16_LE)
+					state->output_stream->sample_size = 16;
+				else {
+					val = AFMT_U8;
+					state->output_stream->sample_size = 8;
+				}
+			}
+		} else {
+			if (file->f_mode & FMODE_READ)
+				val = (state->input_stream->sample_size == 16) ?
+					AFMT_S16_LE : AFMT_U8;
+			else
+				val = (state->output_stream->sample_size == 16) ?
+					AFMT_S16_LE : AFMT_U8;
+		}
+		return put_user(val, (int *) arg);
+
+	case SNDCTL_DSP_POST:
+		return 0;
+
+	case SNDCTL_DSP_SETFRAGMENT:
+		if (get_user(val, (int *)arg)) {
+			return -EFAULT;
+		}
+
+		if (rd) {
+			is->fragsize = 1 << (val & 0xFFFF);
+			if (is->fragsize < 1024) is->fragsize = 1024;
+			is->nbfrags = (val >> 16) & 0xFFFF;
+			if (is->nbfrags < 4) is->nbfrags = 4;
+		}
+
+		if (wr) {
+			os->fragsize = 1 << (val & 0xFFFF);
+			if (os->fragsize < 1024) os->fragsize = 1024;
+			os->nbfrags = (val >> 16) & 0xFFFF;
+			if (os->nbfrags < 4) os->nbfrags = 4;
+			if (os->num_channels) {
+				//os->fragsize >>= 1;
+				os->nbfrags >>= 2;
+				if (os->nbfrags < 2) os->nbfrags = 2;
+			}
+		}
+
+		return 0;
+
+	case SNDCTL_DSP_GETBLKSIZE:
+		if (file->f_mode & FMODE_WRITE)
+			return put_user(os->fragsize, (int *) arg);
+		else
+			return put_user(is->fragsize, (int *) arg);
+
+	case SNDCTL_DSP_NONBLOCK:
+		spin_lock(&file->f_lock);
+		file->f_flags |= O_NONBLOCK;
+		spin_unlock(&file->f_lock);
+		return 0;
+
+	case SOUND_PCM_READ_RATE:
+		return put_user((file->f_mode & FMODE_READ) ?
+				state->input_stream->sample_rate :
+				state->output_stream->sample_rate,
+				(int *)arg);
+
+	case SOUND_PCM_READ_CHANNELS:
+		if (file->f_mode & FMODE_READ)
+			return put_user(state->input_stream->num_channels, (int *)arg);
+		else
+			return put_user(state->output_stream->num_channels, (int *)arg);
+
+	case SOUND_PCM_READ_BITS:
+		if (file->f_mode & FMODE_READ)
+			return put_user(state->input_stream->sample_size, (int *)arg);
+		else
+			return put_user(state->output_stream->sample_size, (int *)arg);
+
+	case SOUND_PCM_WRITE_FILTER:
+	case SNDCTL_DSP_SETSYNCRO:
+	case SOUND_PCM_READ_FILTER:
+		return -EINVAL;
+	}
+
+	return ls1x_ioctl_mixdev(file, cmd, arg);
+}
+
+
+static int ls1x_audio_release(struct inode *inode, struct file *file)
+{
+	struct ls1x_audio_state *state = file->private_data;
+
+	down(&state->sem);
+
+	if (file->f_mode & FMODE_READ) {
+		ls1x_audio_sync(file);
+		audio_clear_buf(state->input_stream);
+		state->rd_ref = 0;
+		free_irq(LS1B_BOARD_DMA2_IRQ, state->input_stream);
+#ifdef CONFIG_SND_SB2F_TIMER
+		del_timer(&state->input_stream->timer);
+#endif
+	}
+
+	if (file->f_mode & FMODE_WRITE) {
+		ls1x_audio_sync(file);
+		audio_clear_buf(state->output_stream);
+		state->wr_ref = 0;
+		free_irq(LS1B_BOARD_DMA1_IRQ, state->output_stream);
+#ifdef CONFIG_SND_SB2F_TIMER
+		del_timer(&state->output_stream->timer);
+#endif
+	}
+
+	up(&state->sem);
+	return 0;
+}
+
+static int ls1x_audio_open(struct inode *inode, struct file *file)
+{
+	struct ls1x_audio_state *state = &ls1x_audio_state;
+	struct audio_stream *is = state->input_stream;
+	struct audio_stream *os = state->output_stream;
+	int minor = MINOR(inode->i_rdev);
+	int err;
+	u32 x, conf;
+
+	down(&state->sem);
+
+	/* access control */
+	err = -ENODEV;
+	if ((file->f_mode & FMODE_WRITE) && !os)
+		goto out;
+	if ((file->f_mode & FMODE_READ) && !is)
+		goto out;
+	err = -EBUSY;
+
+	if ((file->f_mode & FMODE_WRITE) && state->wr_ref)
+		goto out;
+	if ((file->f_mode & FMODE_READ) && state->rd_ref)
+		goto out;
+
+	file->private_data = state;
+
+	if ((file->f_mode & FMODE_WRITE)) {
+		state->wr_ref = 1;
+		os->fragsize = AUDIO_FRAGSIZE_DEFAULT;
+		os->nbfrags = PLAY_NBFRAGS;
+		os->output = 1;
+		os->num_channels = 2;
+		os->sample_size = 16;
+		set_dac_rate(state, 8000);
+		if ((minor & 0xf) == SND_DEV_DSP16)
+			os->sample_size = 16;
+		init_waitqueue_head(&os->frag_wq);
+		os->ask_dma = NULL;
+		INIT_LIST_HEAD(&os->free_list);
+		INIT_LIST_HEAD(&os->run_list);
+		INIT_LIST_HEAD(&os->done_list);
+		INIT_LIST_HEAD(&os->all_list);
+		spin_lock_init(&os->lock);
+		request_irq(LS1B_BOARD_DMA1_IRQ, ac97_dma_write_intr, IRQF_SHARED,
+				"ac97dma-write", os);
+#ifdef CONFIG_SND_SB2F_TIMER
+		init_timer(&os->timer);
+		os->timer.data = (unsigned long)os;
+		os->timer.function = ls1x_audio_timeout;
+#endif
+	}
+
+	if (file->f_mode & FMODE_READ) {
+		state->rd_ref = 1;
+		is->fragsize = AUDIO_FRAGSIZE_DEFAULT;
+		is->nbfrags = REC_NBFRAGS;
+		is->output = 0;
+		is->num_channels = 2;
+		is->sample_size = 16;
+		set_adc_rate(state, 8000);
+		if ((minor & 0xf) == SND_DEV_DSP16)
+			is->sample_size = 16;
+		init_waitqueue_head(&is->frag_wq);
+		is->ask_dma = NULL;
+		INIT_LIST_HEAD(&is->free_list);
+		INIT_LIST_HEAD(&is->run_list);
+		INIT_LIST_HEAD(&is->done_list);
+		INIT_LIST_HEAD(&is->all_list);
+		spin_lock_init(&is->lock);
+		request_irq(LS1B_BOARD_DMA2_IRQ, ac97_dma_read_intr, IRQF_SHARED,
+				"ac97dma-read", is);
+#ifdef CONFIG_SND_SB2F_TIMER
+		init_timer(&is->timer);
+		is->timer.data = (unsigned long)is;
+		is->timer.function = ls1x_audio_timeout;
+#endif
+	}
+
+	if (file->f_mode & FMODE_WRITE) {
+		x = readl(state->base + OCC0);
+		conf = x & ~(FIFO_THRES_MASK << FIFO_THRES_OFFSET) & ~(SS_MASK << SS_OFFSET);
+		if (state->no_vra)
+			conf = (conf | (2 << FIFO_THRES_OFFSET) | DMA_EN | CH_EN) & (~SR);
+		else
+			conf = conf | (2 << FIFO_THRES_OFFSET) | DMA_EN | CH_EN | SR;
+		if (os->sample_size == 16)
+			conf = conf | (2 << SS_OFFSET);
+		conf |= (conf << OCH1_CFG_R_OFFSET) | (conf << OCH0_CFG_L_OFFSET);
+		writel(conf, state->base + OCC0);
+	}
+	if (file->f_mode & FMODE_READ) {
+		x = readl(state->base + ICC);
+		conf = x & ~(FIFO_THRES_MASK << FIFO_THRES_OFFSET) & ~(SS_MASK << SS_OFFSET);
+		if (state->no_vra)
+			conf = (conf | (2 << FIFO_THRES_OFFSET) | DMA_EN | CH_EN) & (~SR);
+		else
+			conf = conf | (2 << FIFO_THRES_OFFSET) | DMA_EN | CH_EN | SR;
+		if (is->sample_size == 16)
+			conf = conf | (2 << SS_OFFSET);
+		conf |= (conf << ICH2_CFG_MIC_OFFSET) | (conf << ICH1_CFG_R_OFFSET) | (conf << ICH0_CFG_L_OFFSET);
+		writel(conf, state->base + ICC);
+	}
+
+	err = 0;
+
+out:
+	up(&state->sem);
+	return err;
+}
+
+static struct file_operations ls1x_dsp_fops = {
+	owner:			THIS_MODULE,
+	llseek:			ls1x_llseek,
+	read:			ls1x_audio_read,
+	write:			ls1x_audio_write,
+	unlocked_ioctl:	ls1x_audio_ioctl,
+//	fsync:			ls1x_audio_sync,
+	poll:			ls1x_audio_poll,
+	open:			ls1x_audio_open,
+	release:		ls1x_audio_release,
+};
+
+static DEFINE_SEMAPHORE(ls1x_ac97_mutex);
+
+static int ls1x_audio_probe(struct platform_device *pdev)
+{
+	struct ls1x_audio_state *state = &ls1x_audio_state;
+	struct resource *res;
+	int rc;
+
+	order_addr_in = ioremap(ORDER_ADDR_IN, 0x4);
+	memset(state, 0, sizeof(struct ls1x_audio_state));
+
+	state->codec = ac97_alloc_codec();
+	if (state->codec == NULL) {
+		printk(KERN_ERR "Out of memory\n");
+		return -1;
+	}
+	state->codec->private_data = state;
+	state->codec->id = 0;
+	state->codec->codec_read = ls1x_codec_read;
+	state->codec->codec_write = ls1x_codec_write;
+//	state->codec->codec_wait = waitcodec;
+
+	state->input_stream = &input_stream;
+	state->output_stream = &output_stream;
+	sema_init(&state->sem, 1);
+
+	res =  platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!res) {
+		dev_err(&pdev->dev, "cannot find IO resource\n");
+		return -ENOENT;
+	}
+
+	if (!request_mem_region(res->start, resource_size(res), "ls1x-audio"))
+		return -EBUSY;
+
+	state->base = ioremap(res->start, resource_size(res));
+	if (!state->base) {
+		dev_err(&pdev->dev, "ls1x-audio - failed to map controller\n");
+		rc = -ENOMEM;
+		goto err_dev0;
+	}
+
+	/* reset ls1x ac97 controller */
+	writel(0x01, state->base + CSR);
+	writel(0x02, state->base + CSR);
+	udelay(100);
+	writel(0x01, state->base + CSR);
+	mdelay(300);
+	/* config channels */
+	writel(0x69696969, state->base + OCC0);
+	writel(0x69696969, state->base + OCC1);
+	writel(0x69696969, state->base + OCC2);
+	writel(0x69696969, state->base + ICC);
+	/* enable irqreturn */
+	writel(0xffffffff, state->base + INTM);
+
+	/* codec reset */
+	if (codec_reset) {
+		ls1x_codec_write(state->codec, AC97_RESET, 0x0000);
+		mdelay(500);
+		codec_reset = 0;
+	}
+
+	ls1x_codec_write(state->codec, AC97_POWER_CONTROL, 0x0000);
+
+
+	if ((state->dev_audio = register_sound_dsp(&ls1x_dsp_fops, -1)) < 0)
+		goto err_dev1;
+	if ((state->codec->dev_mixer = 
+		  register_sound_mixer(&ls1x_mixer_fops, -1)) < 0)
+		goto err_dev2;
+
+	/* codec init */
+	if (!ac97_probe_codec(state->codec)) {
+		printk(KERN_ERR "probe codec err.\n");
+		goto err_dev3;
+	}
+
+	state->codec_base_caps = ls1x_codec_read(state->codec, AC97_RESET);
+	state->codec_ext_caps = ls1x_codec_read(state->codec, AC97_EXTENDED_ID);
+	pr_info("AC'97 Base/Extended ID = %04x/%04x",
+	     state->codec_base_caps, state->codec_ext_caps);
+
+	if (!(state->codec_ext_caps & AC97_EXTID_VRA)) {
+		/* codec does not support VRA
+		*/
+		state->no_vra = 1;
+	} else if (!vra) {
+		/* Boot option says disable VRA
+		*/
+		u16 ac97_extstat = ls1x_codec_read(state->codec, AC97_EXTENDED_STATUS);
+		ls1x_codec_write(state->codec, AC97_EXTENDED_STATUS,
+			ac97_extstat & ~AC97_EXTSTAT_VRA);
+		state->no_vra = 1;
+	}
+	if (state->no_vra)
+		pr_info("no VRA, interpolating and decimating");
+
+	/* é�™éŸ³è¾“å…¥é€šé�“ */
+	ls1x_codec_write(state->codec, AC97_MIC_VOL, 0x8008);
+	ls1x_codec_write(state->codec, AC97_LINEIN_VOL, 0x8080);
+	ls1x_codec_write(state->codec, AC97_AUX_VOL, 0x8080);
+
+	return 0;
+
+err_dev3:
+	unregister_sound_mixer(state->codec->dev_mixer);
+err_dev2:
+	unregister_sound_dsp(state->dev_audio);
+err_dev1:
+	iounmap(state->base);
+	release_mem_region(res->start, resource_size(res));
+err_dev0:
+	ac97_release_codec(state->codec);
+
+	return rc;
+}
+
+static int __devexit ls1x_audio_remove(struct platform_device *pdev)
+{
+	struct ls1x_audio_state *state = &ls1x_audio_state;
+	struct resource *res;
+
+	unregister_sound_dsp(state->dev_audio);
+	unregister_sound_mixer(state->codec->dev_mixer);
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	iounmap(state->base);
+	release_mem_region(res->start, resource_size(res));
+
+	ac97_release_codec(state->codec);
+
+	return 0;
+}
+
+#ifdef CONFIG_PM
+static int ls1x_audio_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	return 0;
+}
+
+static int ls1x_audio_resume(struct platform_device *pdev)
+{
+	return 0;
+}
+#else
+#define ls1x_audio_suspend NULL
+#define ls1x_audio_resume NULL
+#endif
+
+static struct platform_driver ls1x_audio_driver = {
+	.driver = {
+		.name	= "ls1x-audio",
+		.owner	= THIS_MODULE,
+	},
+	.probe		= ls1x_audio_probe,
+	.remove		= ls1x_audio_remove,
+	.suspend	= ls1x_audio_suspend,
+	.resume		= ls1x_audio_resume,
+};
+
+static int __init ls1x_audio_init(void)
+{
+	int ret = 0;
+
+	ret = platform_driver_register(&ls1x_audio_driver);
+	if (ret)
+		printk(KERN_ERR "failed to register ls1x-audio\n");
+	return ret;
+}
+
+static void __exit ls1x_audio_exit(void)
+{
+    platform_driver_unregister(&ls1x_audio_driver);
+}
+
+module_init(ls1x_audio_init);
+module_exit(ls1x_audio_exit);
+
+#ifndef MODULE
+
+static int __init ls1x_setup(char *options)
+{
+	char           *this_opt;
+
+	if (!options || !*options)
+		return 0;
+
+	while ((this_opt = strsep(&options, ","))) {
+		if (!*this_opt)
+			continue;
+		if (!strncmp(this_opt, "vra", 3)) {
+			vra = 1;
+		}
+	}
+
+	return 1;
+}
+
+__setup("ls1x_audio=", ls1x_setup);
+
+#endif /* MODULE */
+
+MODULE_LICENSE("GPL");
+
diff -uNra linux-3.0.82/sound/oss/ls1x_ac97.h linux-3.0.82x/sound/oss/ls1x_ac97.h
--- linux-3.0.82/sound/oss/ls1x_ac97.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/sound/oss/ls1x_ac97.h	2017-09-23 03:42:50.378673963 +0800
@@ -0,0 +1,131 @@
+/*
+ *  Copyright (c) 2013 Tang, Haifeng <tanghaifeng-gz@loongson.cn>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ */
+
+#ifndef __LS1X_AC97_H__
+#define __LS1X_AC97_H__
+
+/* Control Status Register (CSR) */
+#define CSR		0x00
+#define AC97_CSR_RESUME		(1 << 1)
+#define AC97_CSR_RST_FORCE	(1 << 0)
+/* Output Channel Configuration Registers (OCCn) */
+#define OCC0	0x04
+#define OCC1	0x08
+#define OCC2	0x0c
+#define OCH1_CFG_R_OFFSET	(8)
+#define OCH0_CFG_L_OFFSET	(0)
+#define OCH1_CFG_R_MASK		(0xFF)
+#define OCH0_CFG_L_MASK		(0xFF)
+
+/* Input Channel Configuration (ICC) */
+#define ICC		0x10
+#define ICH2_CFG_MIC_OFFSET	(16)
+#define ICH1_CFG_R_OFFSET	(8)
+#define ICH0_CFG_L_OFFSET	(0)
+#define ICH2_CFG_MIC_MASK	(0xFF)
+#define ICH1_CFG_R_MASK		(0xFF)
+#define ICH0_CFG_L_MASK		(0xFF)
+
+/* Channel Configurations (Sub-field) */
+#define DMA_EN	(1 << 6)
+#define FIFO_THRES_OFFSET	(4)
+#define FIFO_THRES_MASK		(0x3)
+#define SS_OFFSET		(2)	/* Sample Size 00:8bit 10:16bit */
+#define SS_MASK		(0x3)
+#define SR		(1 << 1)	/* Sample Rate 1:Variable 0:Fixed */
+#define CH_EN	(1 << 0)
+
+
+#define CODECID	0x14
+
+/* Codec Register Access Command (CRAC) */
+#define CRAC	0x18
+#define CODEC_WR			(1 << 31)
+#define CODEC_ADR_OFFSET	(16)
+#define CODEC_DAT_OFFSET	(0)
+#define CODEC_ADR_MASK		(0xFF)
+#define CODEC_DAT_MASK		(0xFF)
+
+/* OCHn and ICHn Registers
+   OCHn are the output fifos (data that will be send to the codec), ICHn are the 
+   input fifos (data received from the codec).
+ */
+#define OCH0	0x20
+#define OCH1	0x24
+#define OCH2	0x28
+#define OCH3	0x2c
+#define OCH4	0x30
+#define OCH5	0x34
+#define OCH6	0x38
+#define OCH7	0x3c
+#define OCH8	0x40
+#define ICH0	0x44
+#define ICH1	0x48
+#define ICH2	0x4c
+
+/* Interrupt Status Register (INTS) */
+#define INTRAW	0x54
+#define ICH_FULL		(1 << 31)
+#define ICH_TH_INT		(1 << 30)
+#define OCH1_FULL		(1 << 7)
+#define OCH1_EMPTY		(1 << 6)
+#define OCH1_TH_INT		(1 << 5)
+#define OCH0_FULL		(1 << 4)
+#define OCH0_EMPTY		(1 << 3)
+#define OCH0_TH_INT		(1 << 2)
+#define CW_DONE		(1 << 1)
+#define CR_DONE		(1 << 0)
+
+#define INTM	0x58
+
+/* ä¸­æ–­çŠ¶æ€�/æ¸…é™¤å¯„å­˜å™¨ 
+   å±�è”½å�Žçš„ä¸­æ–­çŠ¶æ€�å¯„å­˜å™¨ï¼Œå¯¹æœ¬å¯„å­˜å™¨çš„è¯»æ“�ä½œå°†æ¸…é™¤å¯„å­˜å™¨0x54ä¸­çš„æ‰€æœ‰ä¸­æ–­çŠ¶æ€� */
+#define INT_CLR	0x5c
+/* OCHä¸­æ–­æ¸…é™¤å¯„å­˜å™¨
+   å¯¹æœ¬å¯„å­˜å™¨çš„è¯»æ“�ä½œå°†æ¸…é™¤å¯„å­˜å™¨0x54ä¸­çš„æ‰€æœ‰output channelçš„ä¸­æ–­çŠ¶æ€�å¯¹åº”çš„ bit[7:2] */
+#define INT_OCCLR	0x60
+/* ICHä¸­æ–­æ¸…é™¤å¯„å­˜å™¨ 
+   å¯¹æœ¬å¯„å­˜å™¨çš„è¯»æ“�ä½œå°†æ¸…é™¤å¯„å­˜å™¨0x54ä¸­çš„æ‰€æœ‰input channelçš„ä¸­æ–­çŠ¶æ€�å¯¹åº”çš„ bit[31:30] */
+#define INT_ICCLR	0x64
+/* CODEC WRITE ä¸­æ–­æ¸…é™¤å¯„å­˜å™¨ 
+   å¯¹æœ¬å¯„å­˜å™¨çš„è¯»æ“�ä½œå°†æ¸…é™¤å¯„å­˜å™¨0x54ä¸­çš„ä¸­bit[1] */
+#define INT_CWCLR	0x68
+/* CODEC READ ä¸­æ–­æ¸…é™¤å¯„å­˜å™¨
+   å¯¹æœ¬å¯„å­˜å™¨çš„è¯»æ“�ä½œå°†æ¸…é™¤å¯„å­˜å™¨0x54ä¸­çš„ä¸­bit[0] */
+#define INT_CRCLR	0x6c
+
+#define ORDER_ADDR_IN	0x1fd01160
+
+/* dma regs */
+#define DMA_ORDERED		0x0
+#define DMA_SADDR		0x1
+#define DMA_DADDR		0x2
+#define DMA_LENGTH		0x3
+#define DMA_STEP_LENGTH		0x4
+#define DMA_STEP_TIMES		0x5
+#define	DMA_CMD			0x6
+
+#define DMA_ORDERED_EN	(1 << 0)
+
+#define DMA_AC97_WRITE_EN	(0x1 << 31)
+#define DMA_AC97_STERO	(0x1 << 30)
+#define DMA_AC97_WRITE_MODE	(0x3 << 28)
+#define DMA_AC97_WRITE_MODE_SHIFT 28
+#define DMA_AC97_WRITE_1B	0
+#define DMA_AC97_WRITE_2B	1
+#define DMA_AC97_WRITE_4B	2
+
+#define AC97_EXT_DACS (AC97_EXTID_SDAC | AC97_EXTID_CDAC | AC97_EXTID_LDAC)
+
+#define DMA_DESC		0x5
+#define REC_NBFRAGS		DMA_DESC
+#define PLAY_NBFRAGS	DMA_DESC
+#define AUDIO_FRAGSIZE_DEFAULT	0x2000
+
+#endif /* __LS1X_AC97_H__ */
diff -uNra linux-3.0.82/sound/oss/ls1x_i2s.c linux-3.0.82x/sound/oss/ls1x_i2s.c
--- linux-3.0.82/sound/oss/ls1x_i2s.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/sound/oss/ls1x_i2s.c	2017-09-23 03:42:50.382673950 +0800
@@ -0,0 +1,1507 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under  the terms of the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the License, or (at your
+ *  option) any later version.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/pci.h>
+#include <linux/poll.h>
+#include <linux/sound.h>
+#include <linux/soundcard.h>
+#include <linux/types.h>
+#include <linux/sched.h>
+#include <linux/semaphore.h>
+#include <linux/ac97_codec.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include "ls1x_ac97.h"
+#include <irq.h>
+#include <ls1b_board.h>
+///#define	CONFIG_SND_SB2F_TIMER	1
+#if 0
+#define DPRINTK(fmt, args...) printk(KERN_ALERT "<%s>: " fmt, __FUNCTION__ , ## args)
+#else
+#define DPRINTK(fmt, args...)
+#endif
+
+void __iomem *order_addr_in;
+static int codec_reset = 1;
+
+static irqreturn_t ac97_dma_write_intr(int irq, void *private);
+static irqreturn_t ac97_dma_read_intr(int irq, void *private);
+
+struct dma_desc {
+	u32 ordered;
+	u32 saddr;
+	u32 daddr;
+	u32 length;
+	u32 step_length;
+	u32 step_times;
+	u32 cmd;
+	u32 stats;
+};
+
+struct audio_dma_desc {
+	struct dma_desc snd;
+	struct dma_desc null;
+	struct list_head link;
+	struct list_head all;
+	dma_addr_t snd_dma_handle;
+	dma_addr_t snd_dma;
+	u32 pos;
+	char *snd_buffer;
+};
+
+struct audio_stream {
+	struct dma_desc *ask_dma;
+	struct list_head free_list;
+	struct list_head run_list;
+	struct list_head done_list;
+	struct list_head all_list;
+	spinlock_t lock;
+#ifdef CONFIG_SND_SB2F_TIMER
+	struct timer_list	timer;		/* "no irq" timer */
+#endif
+	u32 nbfrags;
+	u32 fragsize;
+	struct semaphore sem;
+	wait_queue_head_t frag_wq;
+	dma_addr_t ask_dma_handle;
+
+	int num_channels;
+	u32 output;
+	u32 sample_rate;
+	u32 sample_size;
+	u32 rate;
+	u32 state;
+};
+
+static struct audio_stream input_stream = {
+	output: 0,
+	fragsize:0x10000,
+};
+
+static struct audio_stream output_stream = {
+	output: 1,
+	fragsize:0x10000,
+};
+
+unsigned short reg1[7] = {
+        //    0x1c02,
+        //    0x1a02,
+        0x1402,
+        //    0x1402,
+        //    0x1002,
+        //    0x1202,
+        0x0014,
+        //    0x0010,
+        //    0xc003,
+        //    0xff63,
+        //    0xff00,
+        0xff03,
+        //    0xfc00,
+        //    0xcf83,
+        0x0000,
+        0x0000,
+        0x0030,
+        0x0030,
+        //    0x0230,
+        //    0x0230,
+        //    0x0830,
+        //    0x0830,
+};
+
+#define uda_address     /*0x1fe70000	*/	0x34
+
+#define uda_dev_addr    0x34
+
+#define uda1342_base    0xbfe60000
+#define DMA_BUF 0x00800000
+
+#define IISVERSION  (volatile unsigned int *)(uda1342_base + 0x0)
+#define IISCONFIG   (volatile unsigned int *)(uda1342_base + 0x4)
+#define IISSTATE  (volatile unsigned int *)(uda1342_base + 0x8)
+
+#define I2C_SINGLE 0 
+#define I2C_BLOCK 1
+#define I2C_SMB_BLOCK 2
+#define I2C_HW_SINGLE 3 //lxy 
+
+#define GS_SOC_I2C_BASE    0xbfe58000           //0x1fe58000
+//#define GS_SOC_I2C_BASE    0xbfe70000 //IIC2's base.
+#define GS_SOC_I2C_PRER_LO (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x0)
+#define GS_SOC_I2C_PRER_HI (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x1)
+#define GS_SOC_I2C_CTR     (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x2)
+#define GS_SOC_I2C_TXR     (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x3)
+#define GS_SOC_I2C_RXR     (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x3)
+#define GS_SOC_I2C_CR      (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x4)
+#define GS_SOC_I2C_SR      (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x4)
+
+#define CR_START 0x80
+#define CR_WRITE 0x10
+#define SR_NOACK 0x80
+#define CR_STOP  0x40
+#define SR_BUSY  0x40 
+#define CR_START 0x80
+#define SR_TIP   0x2
+
+#define CR_READ  0x20
+#define I2C_WACK 0x8
+
+enum {
+	STOP = 0,
+	RUN = 1
+};
+
+/* Boot options
+ * 0 = no VRA, 1 = use VRA if codec supports it
+ */
+static int      vra = 1;
+module_param(vra, bool, 0);
+MODULE_PARM_DESC(vra, "if 1 use VRA if codec supports it");
+
+static struct ls1x_audio_state {
+	void __iomem *base;
+	/* soundcore stuff */
+	int dev_audio;
+
+	struct ac97_codec *codec;
+	unsigned codec_base_caps; /* AC'97 reg 00h, "Reset Register" */
+	unsigned codec_ext_caps;  /* AC'97 reg 28h, "Extended Audio ID" */
+	int no_vra;		/* do not use VRA */
+
+	spinlock_t lock;
+	struct mutex open_mutex;
+	struct mutex mutex;
+	fmode_t open_mode;
+	wait_queue_head_t open_wait;
+
+	struct audio_stream	 *input_stream;
+	struct audio_stream	 *output_stream;
+
+	u32 rd_ref:1;
+	u32 wr_ref:1;
+	struct semaphore sem;
+} ls1x_audio_state;
+
+static void dma_enable_trans(struct audio_stream * s, struct audio_dma_desc *desc)
+{
+//	struct ls1x_audio_state *state = &ls1x_audio_state;
+	u32 val;
+	int timeout = 20000;
+	unsigned long flags;
+
+	val = desc->snd_dma_handle;
+	val |= s->output ? 0x9 : 0xa;
+	local_irq_save(flags);
+	writel(val, order_addr_in);
+//	while(readl(order_addr_in) & 0x8);
+	while ((readl(order_addr_in) & 0x8) && (timeout-- > 0)) {
+		udelay(5);
+	}
+	local_irq_restore(flags);
+//	writel(0xffffffff, state->base + INTM);
+#ifdef CONFIG_SND_SB2F_TIMER
+	mod_timer(&s->timer, jiffies + HZ/20);
+#endif
+}
+
+void audio_clear_buf(struct audio_stream *s)
+{
+	struct audio_dma_desc *desc;
+
+	while (!list_empty(&s->all_list)) {
+		desc = list_entry(s->all_list.next, struct audio_dma_desc, all);
+		list_del(&desc->all);
+		list_del(&desc->link);
+
+		if (desc->snd_buffer)
+			free_pages((unsigned long)desc->snd_buffer, get_order(s->fragsize));
+		dma_free_coherent(NULL, sizeof(struct audio_dma_desc), desc, 0);
+	}
+
+	if (s->ask_dma)
+		dma_free_coherent(NULL, sizeof(struct audio_dma_desc), s->ask_dma, 0);
+
+	s->ask_dma = NULL;
+}
+
+static void inline link_dma_desc(struct audio_stream *s, struct audio_dma_desc *desc)
+{
+	spin_lock_irq(&s->lock);
+
+	if(!list_empty(&s->run_list)) {
+		struct audio_dma_desc *desc0;
+		desc0 = list_entry(s->run_list.prev, struct audio_dma_desc, link);
+		desc0->snd.ordered = desc->snd_dma_handle | DMA_ORDERED_EN;
+		desc0->null.ordered = desc->snd_dma_handle | DMA_ORDERED_EN;
+		list_add_tail(&desc->link, &s->run_list);
+		if(s->state == STOP) {
+			s->state = RUN;
+			dma_enable_trans(s, desc0);
+		}
+	}
+	else {
+		list_add_tail(&desc->link,&s->run_list);
+		dma_enable_trans(s, desc);
+	}
+
+	spin_unlock_irq(&s->lock);
+}
+
+static void ls1x_init_dmadesc(struct audio_stream *s, struct audio_dma_desc *desc, u32 count)
+{
+	struct dma_desc *_desc;
+	u32 control;
+
+	control = s->output ? 0x1fe60010 : 0x1fe6000c ;
+
+	desc->snd.daddr = desc->null.daddr = control;
+
+	_desc = &desc->snd;
+	_desc->ordered = (desc->snd_dma_handle + sizeof(struct dma_desc)) | DMA_ORDERED_EN;
+	_desc->saddr = desc->snd_dma;
+	_desc->length = 8;
+	_desc->step_length = 0;
+	_desc->step_times = count >> 5;
+	_desc->cmd = s->output ? 0x00001001 : 0x00000001; //enable the interrupt
+
+	_desc = &desc->null;
+	_desc->ordered =  (desc->snd_dma_handle + sizeof(struct dma_desc)) | DMA_ORDERED_EN;
+	_desc->saddr = desc->snd_dma;
+	_desc->length = 8;
+	_desc->step_length = 0;
+	_desc->step_times = 1;
+	_desc->cmd = s->output ? 0x00001000 : 0x00000000; //disable the interrupt
+}
+
+/* setup buffers,dma descs,buffer. */
+int ls1x_setup_buf(struct audio_stream * s)
+{	
+	int i;
+	dma_addr_t dma_phyaddr;
+
+	if (s->ask_dma)
+		return -EBUSY;
+
+	for (i=0; i <s->nbfrags; i++) {
+		struct audio_dma_desc *desc;
+
+		desc = dma_alloc_coherent(NULL, sizeof(struct audio_dma_desc),
+					(dma_addr_t *)&dma_phyaddr, GFP_KERNEL);
+		if (!desc) {
+			printk(KERN_ERR "2.alloc dma desc err.\n");
+			goto err;
+		}
+		memset(desc, 0, sizeof(struct audio_dma_desc));
+
+		desc->snd_dma_handle = dma_phyaddr;
+		desc->null.ordered = (dma_phyaddr + sizeof(struct dma_desc)) | DMA_ORDERED_EN;
+		desc->snd.ordered = (dma_phyaddr + sizeof(struct dma_desc)) | DMA_ORDERED_EN;
+		list_add_tail(&desc->link,&s->free_list);
+		list_add_tail(&desc->all,&s->all_list);
+
+		desc->snd_buffer = (void *)__get_free_pages(GFP_ATOMIC|GFP_DMA, get_order(s->fragsize));
+		if (!desc->snd_buffer) {
+			printk(KERN_ERR "4.alloc dma buffer err\n");
+			goto err;
+		}
+		desc->snd_dma = dma_map_single(NULL, desc->snd_buffer, s->fragsize, DMA_FROM_DEVICE);
+	}
+
+	/* dma desc for ask_valid one per struct audio_stream */
+	s->ask_dma = dma_alloc_coherent(NULL, sizeof(struct dma_desc),
+			&dma_phyaddr, GFP_KERNEL);
+	if(!s->ask_dma) {
+		printk(KERN_ERR "3. alloc dma desc err.\n");
+		goto err;
+	}
+	memset(s->ask_dma, 0, sizeof(struct dma_desc));
+	s->ask_dma_handle = dma_phyaddr;
+
+	sema_init(&s->sem, 1);
+
+	return 0;
+
+err:
+	audio_clear_buf(s);
+	printk(KERN_ERR "unable to allocate audio memory\n");
+	return -ENOMEM;
+}
+
+#ifdef CONFIG_SND_SB2F_TIMER
+static void ls1x_audio_timeout(unsigned long data)
+{
+	struct audio_stream *s = (struct audio_stream *)data;
+
+	if (s->output)
+		ac97_dma_write_intr(0, s);
+	else
+		ac97_dma_read_intr(0, s);
+	mod_timer(&s->timer, jiffies + HZ/20);
+}
+#endif
+
+static irqreturn_t ac97_dma_read_intr(int irq, void *private)
+{
+	struct audio_stream *s = (struct audio_stream *)private;
+	struct audio_dma_desc *desc;
+	unsigned long flags;
+
+	if (list_empty(&s->run_list))
+		return IRQ_HANDLED;
+
+	local_irq_save(flags);
+	writel(s->ask_dma_handle | 0x6, order_addr_in);
+	while (readl(order_addr_in) & 4) {
+	}
+	local_irq_restore(flags);
+
+	do {
+		desc = list_entry(s->run_list.next, struct audio_dma_desc, link);
+		if (s->ask_dma->ordered == desc->snd.ordered)
+			break;
+
+//		spin_lock(&s->lock);
+		list_del(&desc->link);
+		list_add_tail(&desc->link, &s->done_list);
+//		spin_unlock(&s->lock);
+	} while(!list_empty(&s->run_list));
+
+	if (!list_empty(&s->done_list))
+		wake_up(&s->frag_wq);
+	return IRQ_HANDLED;
+}
+
+static irqreturn_t ac97_dma_write_intr(int irq, void *private)
+{
+	//printk("writeintring %s..\n", __func__);
+	struct audio_stream *s = (struct audio_stream *)private;
+	struct audio_dma_desc *desc;
+	unsigned long flags;
+	
+	if (list_empty(&s->run_list))
+		return IRQ_HANDLED;
+
+	local_irq_save(flags);
+	writel(s->ask_dma_handle | 0x5, order_addr_in);
+	while (readl(order_addr_in) & 4) {
+	}
+	local_irq_restore(flags);
+
+	do {
+		desc = list_entry(s->run_list.next, struct audio_dma_desc, link);
+		/*first desc's ordered may be null*/
+		if(s->ask_dma->ordered == desc->snd.ordered || s->ask_dma->ordered == 
+			((desc->snd_dma_handle + sizeof(struct dma_desc)) | DMA_ORDERED_EN))
+			break;
+//		spin_lock(&s->lock);
+		list_del(&desc->link);
+		desc->pos = 0;
+		list_add_tail(&desc->link, &s->free_list);
+//		spin_unlock(&s->lock);
+	} while(!list_empty(&s->run_list));
+
+	if (!list_empty(&s->free_list))
+		wake_up(&s->frag_wq);
+
+	return IRQ_HANDLED;
+}
+
+static u32 fill_play_buffer(struct audio_stream *s, const char *buf, u32 count)
+{
+	struct audio_dma_desc *desc;
+	u32 copy_bytes;
+
+	desc = list_entry(s->free_list.next, struct audio_dma_desc, link);
+	copy_bytes = min((s->fragsize - desc->pos), count);
+	copy_from_user((void *)(desc->snd_buffer + desc->pos), buf, copy_bytes);
+	desc->pos += copy_bytes;
+
+	if (desc->pos == s->fragsize) {
+//		spin_lock_irq(&s->lock);
+		list_del(&desc->link);
+//		spin_unlock_irq(&s->lock);
+		ls1x_init_dmadesc(s, desc, s->fragsize);
+		link_dma_desc(s, desc);
+	}
+
+	return copy_bytes;
+}
+
+static int ls1x_audio_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
+{
+	* IISSTATE = (0xc220 | 0x1080);
+	//printk("playing %s..\n", __func__);
+	struct ls1x_audio_state *state = (struct ls1x_audio_state *)file->private_data;
+	struct audio_stream *s = state->output_stream;
+	const char *buffer0 = buffer;
+	unsigned int ret = 0;
+
+	if (*ppos != file->f_pos) {
+		return -ESPIPE;
+	}
+
+	if (!s->ask_dma && ls1x_setup_buf(s)) {
+		return -ENOMEM;
+	}
+
+	if (file->f_flags & O_NONBLOCK) {
+		if (down_trylock(&s->sem))
+			return -EAGAIN;
+	} else {
+		if (down_interruptible(&s->sem))
+			return -ERESTARTSYS;
+	}
+
+	while (count > 0) {
+		if(list_empty(&s->free_list)) {
+			if(file->f_flags & O_NONBLOCK)
+				return -EAGAIN;
+
+			if(wait_event_interruptible(s->frag_wq, !list_empty(&s->free_list))) {
+				up(&s->sem);
+				return -ERESTARTSYS;
+			}
+		}
+		/* Fill data , if the ring is not full */
+		ret = fill_play_buffer(s, buffer, count);
+		count -= ret;
+		buffer += ret;
+	}
+
+	up(&s->sem);
+	return (buffer - buffer0);
+}
+
+static int ls1x_copy_to_user(struct audio_stream *s, char *buffer, u32 count)
+{
+	struct audio_dma_desc *desc;
+	int ret = 0;
+
+	while (!list_empty(&s->done_list) && count) {
+		u32 left;
+		desc = list_entry(s->done_list.next, struct audio_dma_desc, link);
+		left = min(s->fragsize - desc->pos,count);
+		copy_to_user(buffer, (void *)(desc->snd_buffer + desc->pos), left);
+		desc->pos += left;
+		count -= left;
+		buffer += left;
+		ret += left;
+		if (desc->pos == s->fragsize) {
+			list_del(&desc->link);
+			desc->pos = 0;
+			list_add_tail(&desc->link, &s->free_list);
+		}
+	}
+
+	return ret;
+}
+
+static int ls1x_audio_read(struct file *file, char *buffer, size_t count, loff_t * ppos)
+{
+	//printk("recording %s..\n", __func__);
+	struct ls1x_audio_state *state = file->private_data;
+	struct audio_stream *s = state->input_stream;
+	struct audio_dma_desc *desc;
+	char *buffer0 = buffer;
+
+	if (*ppos != file->f_pos)
+		return -ESPIPE;
+
+	if (!s->ask_dma && ls1x_setup_buf(s))
+		return -ENOMEM;
+
+	/*3. sem:get resource .if 0 ,wait */
+	if (file->f_flags & O_NONBLOCK) {
+		if (down_trylock(&s->sem))
+			return -EAGAIN;
+	} else {
+		if (down_interruptible(&s->sem))
+			return -ERESTARTSYS;
+	}
+
+	while (count > 0) {
+		int ret;
+
+		while (!list_empty(&s->free_list)) {
+			desc = list_entry(s->free_list.next, struct audio_dma_desc, link);
+//			spin_lock_irq(&s->lock);
+			list_del(&desc->link);
+//			spin_unlock_irq(&s->lock);
+			ls1x_init_dmadesc(s, desc, s->fragsize);
+			link_dma_desc(s, desc);
+		}
+
+		/* record's buffer is empty */
+		while (list_empty(&s->done_list)) {
+			if (file->f_flags & O_NONBLOCK) {
+				up(&s->sem);
+				return -EAGAIN;
+			}
+			if(wait_event_interruptible(s->frag_wq, !list_empty(&s->done_list))) {
+				up(&s->sem);
+				return -ERESTARTSYS;
+			}
+		}
+
+		/* data is ready now , so copy it */
+		ret = ls1x_copy_to_user(s, buffer, count);
+		count -= ret;
+		buffer += ret;
+	}
+
+	while (!list_empty(&s->free_list)) {
+		desc = list_entry(s->free_list.next, struct audio_dma_desc, link);
+		list_del(&desc->link);
+		ls1x_init_dmadesc(s, desc, s->fragsize);
+		link_dma_desc(s, desc);
+	}
+
+	up(&s->sem);
+	return (buffer - buffer0);
+}
+
+static long ls1x_audio_ioctl(struct file *file, uint cmd, ulong arg)
+{
+	//printk("ioctl %s.. %d\n", __func__, cmd);
+	struct ls1x_audio_state *state = file->private_data;
+	struct audio_stream *os = state->output_stream;
+	struct audio_stream *is = state->input_stream;
+	int rd=0, wr=0, val=0;
+
+	if (file->f_mode & FMODE_WRITE)
+		wr = 1;
+	if (file->f_mode & FMODE_READ)
+		rd = 1;
+
+	switch (cmd) {
+	case OSS_GETVERSION:
+		return put_user(SOUND_VERSION, (int *) arg);
+
+	case SNDCTL_DSP_SETDUPLEX:
+		return 0;
+
+	case SNDCTL_DSP_GETCAPS:
+		val = DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP;
+		if (is && os)
+			val |= DSP_CAP_DUPLEX;
+		return put_user(val, (int *) arg);
+
+	case SNDCTL_DSP_SPEED:
+		return 0;
+
+	case SNDCTL_DSP_STEREO:
+		return 0;
+
+	case SNDCTL_DSP_CHANNELS:
+		if (get_user(val, (int *) arg))
+			return -EFAULT;
+		if (val != 0) {
+			if (file->f_mode & FMODE_READ) {
+				if (val < 0 || val > 2)
+					return -EINVAL;
+				is->num_channels = val;
+			}
+			if (file->f_mode & FMODE_WRITE) {
+				switch (val) {
+				case 1:
+				case 2:
+					break;
+				case 3:
+				case 5:
+					return -EINVAL;
+				case 4:
+					if (!(state->codec_ext_caps &
+					      AC97_EXTID_SDAC))
+						return -EINVAL;
+					break;
+				case 6:
+					if ((state->codec_ext_caps &
+					     AC97_EXT_DACS) != AC97_EXT_DACS)
+						return -EINVAL;
+					break;
+				default:
+					return -EINVAL;
+				}
+
+				if (val <= 2 &&
+				    (state->codec_ext_caps & AC97_EXT_DACS)) {
+					/* disable surround and center/lfe
+					 * channels in AC'97
+					 */
+					//u16 ext_stat = ls1x_codec_read(state->codec, AC97_EXTENDED_STATUS);
+					//ls1x_codec_write(state->codec, AC97_EXTENDED_STATUS,
+					//	ext_stat | (AC97_EXTSTAT_PRI | AC97_EXTSTAT_PRJ | AC97_EXTSTAT_PRK));
+				} else if (val >= 4) {
+					/* enable surround, center/lfe
+					 * channels in AC'97
+					 */
+					//u16 ext_stat = ls1x_codec_read(state->codec, AC97_EXTENDED_STATUS);
+			//		ext_stat &= ~AC97_EXTSTAT_PRJ;
+	///				if (val == 6)
+				///	ext_stat &= ~(AC97_EXTSTAT_PRI | AC97_EXTSTAT_PRK);
+			///		ls1x_codec_write(state->codec, AC97_EXTENDED_STATUS, ext_stat);
+				}
+
+				os->num_channels = val;
+			}
+		}
+		return put_user(val, (int *) arg);
+
+	case SNDCTL_DSP_GETFMTS:	/* Returns a mask */
+		return put_user(AFMT_S16_LE | AFMT_U8, (int *) arg);
+
+	case SNDCTL_DSP_SETFMT:	/* Selects ONE fmt */
+		if (get_user(val, (int *) arg))
+			return -EFAULT;
+		if (val != AFMT_QUERY) {
+			if (file->f_mode & FMODE_READ) {
+				if (val == AFMT_S16_LE)
+					state->input_stream->sample_size = 16;
+				else {
+					val = AFMT_U8;
+					state->input_stream->sample_size = 8;
+				}
+			}
+			if (file->f_mode & FMODE_WRITE) {
+				if (val == AFMT_S16_LE)
+					state->output_stream->sample_size = 16;
+				else {
+					val = AFMT_U8;
+					state->output_stream->sample_size = 8;
+				}
+			}
+		} else {
+			if (file->f_mode & FMODE_READ)
+				val = (state->input_stream->sample_size == 16) ?
+					AFMT_S16_LE : AFMT_U8;
+			else
+				val = (state->output_stream->sample_size == 16) ?
+					AFMT_S16_LE : AFMT_U8;
+		}
+		return put_user(val, (int *) arg);
+
+	case SNDCTL_DSP_POST:
+		return 0;
+
+	case SNDCTL_DSP_SETFRAGMENT:
+		if (get_user(val, (int *)arg)) {
+			return -EFAULT;
+		}
+
+		if (rd) {
+			is->fragsize = 1 << (val & 0xFFFF);
+			if (is->fragsize < 1024) is->fragsize = 1024;
+			is->nbfrags = (val >> 16) & 0xFFFF;
+			if (is->nbfrags < 4) is->nbfrags = 4;
+		}
+
+		if (wr) {
+			os->fragsize = 1 << (val & 0xFFFF);
+			if (os->fragsize < 1024) os->fragsize = 1024;
+			os->nbfrags = (val >> 16) & 0xFFFF;
+			if (os->nbfrags < 4) os->nbfrags = 4;
+			if (os->num_channels) {
+				//os->fragsize >>= 1;
+				os->nbfrags >>= 2;
+				if (os->nbfrags < 2) os->nbfrags = 2;
+			}
+		}
+
+		return 0;
+
+	case SNDCTL_DSP_GETBLKSIZE:
+		if (file->f_mode & FMODE_WRITE)
+			return put_user(os->fragsize, (int *) arg);
+		else
+			return put_user(is->fragsize, (int *) arg);
+
+	case SNDCTL_DSP_NONBLOCK:
+		spin_lock(&file->f_lock);
+		file->f_flags |= O_NONBLOCK;
+		spin_unlock(&file->f_lock);
+		return 0;
+
+	case SOUND_PCM_READ_RATE:
+		return put_user((file->f_mode & FMODE_READ) ?
+				state->input_stream->sample_rate :
+				state->output_stream->sample_rate,
+				(int *)arg);
+
+	case SOUND_PCM_READ_CHANNELS:
+		if (file->f_mode & FMODE_READ)
+			return put_user(state->input_stream->num_channels, (int *)arg);
+		else
+			return put_user(state->output_stream->num_channels, (int *)arg);
+
+	case SOUND_PCM_READ_BITS:
+		if (file->f_mode & FMODE_READ)
+			return put_user(state->input_stream->sample_size, (int *)arg);
+		else
+			return put_user(state->output_stream->sample_size, (int *)arg);
+
+	case SOUND_PCM_WRITE_FILTER:
+	case SNDCTL_DSP_SETSYNCRO:
+	case SOUND_PCM_READ_FILTER:
+		return -EINVAL;
+	default:
+			DPRINTK("NO surpport.\n");
+			return -EINVAL;
+	}
+
+	return 0;	//ls1x_ioctl_mixdev(file, cmd, arg);
+}
+
+
+int i2c_rec_haf_word(unsigned char *addr,int addrlen,unsigned char reg,unsigned short* buf ,int count)
+{
+        int i;
+        int j;
+        unsigned char value;
+        printk ("in %s !\n", __func__);
+        for(i=0;i<count;i++)
+        {
+                for(j=0;j<addrlen;j++)
+                {
+                        /*write slave_addr*/
+                        * GS_SOC_I2C_TXR = addr[j];
+                        * GS_SOC_I2C_CR  = (j == 0)? (CR_START|CR_WRITE):CR_WRITE; /* start on first addr */
+                        while(*GS_SOC_I2C_SR & SR_TIP);
+                        //                    printk ("device's address = 0x%x ,sr = 0x%x !\n", addr[j] ,*GS_SOC_I2C_SR);
+
+                        if((* GS_SOC_I2C_SR) & SR_NOACK) return -1;
+                }
+
+        //      printk ("------1---->\n");
+                * GS_SOC_I2C_TXR = reg++;   //lxy reg++ after read once
+                * GS_SOC_I2C_CR  = CR_WRITE;
+                while(*GS_SOC_I2C_SR & SR_TIP);
+                if((* GS_SOC_I2C_SR) & SR_NOACK) return -1;
+
+        //      printk ("------2---->\n");
+
+                /*write slave_addr*/
+                * GS_SOC_I2C_TXR = addr[0]|1;
+                * GS_SOC_I2C_CR  = CR_START|CR_WRITE; /* start on first addr */
+                while(*GS_SOC_I2C_SR & SR_TIP);
+
+                if((* GS_SOC_I2C_SR) & SR_NOACK) return -1;
+
+        //              printk ("------3---->\n");
+
+                * GS_SOC_I2C_CR  = CR_READ; /*read send ack*/
+                while(*GS_SOC_I2C_SR & SR_TIP);
+                value = * GS_SOC_I2C_TXR;
+                buf[i] =  value << 8;
+
+        //              printk ("------4---->\n");
+
+                * GS_SOC_I2C_CR  = CR_READ|I2C_WACK; /*last read not send ack*/
+                while(*GS_SOC_I2C_SR & SR_TIP);
+                value = * GS_SOC_I2C_TXR;
+                buf[i] |= value;
+
+                * GS_SOC_I2C_CR  = CR_STOP;
+                while(*GS_SOC_I2C_SR & SR_TIP);
+                //        * GS_SOC_I2C_SR;
+
+
+        }
+        while(*GS_SOC_I2C_SR & SR_BUSY);
+
+        return count;
+}
+
+
+
+unsigned char i2c_rec_b(unsigned char *addr,int addrlen,unsigned char reg,unsigned char* buf ,int count)
+{
+        int i;
+        int j;
+
+
+        unsigned char value;
+
+        for(j=0;j<addrlen;j++)
+        {
+                /*write slave_addr*/
+                * GS_SOC_I2C_TXR = addr[j];
+                * GS_SOC_I2C_CR  = j == 0? (CR_START|CR_WRITE):CR_WRITE; /* start on first addr */
+                while(*GS_SOC_I2C_SR & SR_TIP);
+
+                if((* GS_SOC_I2C_SR) & SR_NOACK) return i;
+        }
+
+
+        * GS_SOC_I2C_TXR = reg;
+        * GS_SOC_I2C_CR  = CR_WRITE;
+        while(*GS_SOC_I2C_SR & SR_TIP);
+        if((* GS_SOC_I2C_SR) & SR_NOACK) return i;
+
+        * GS_SOC_I2C_TXR = addr[0]|1;
+        * GS_SOC_I2C_CR  = CR_START|CR_WRITE;
+        if((* GS_SOC_I2C_SR) & SR_NOACK) return i;
+
+        for(i=0;i<count;i++)
+        {
+                * GS_SOC_I2C_CR  = CR_READ;
+                while(*GS_SOC_I2C_SR & SR_TIP);
+
+                buf[i] = * GS_SOC_I2C_TXR;
+        }
+        * GS_SOC_I2C_CR  = CR_STOP;
+
+        return count;
+}
+
+unsigned char i2c_rec_s(unsigned char *addr,int addrlen,unsigned char reg,unsigned char* buf ,int count)
+{
+        int i;
+        int j;
+        unsigned char value;
+        for(i=0;i<count;i++)
+        {
+                for(j=0;j<addrlen;j++)
+                {
+                        /*write slave_addr*/
+                        * GS_SOC_I2C_TXR = addr[j];
+                        * GS_SOC_I2C_CR  = (j == 0)? (CR_START|CR_WRITE):CR_WRITE; /* start on first addr */
+                        while(*GS_SOC_I2C_SR & SR_TIP);
+
+                        if((* GS_SOC_I2C_SR) & SR_NOACK) return i;
+                }
+
+                * GS_SOC_I2C_TXR = reg;
+                * GS_SOC_I2C_CR  = CR_WRITE;
+                while(*GS_SOC_I2C_SR & SR_TIP);
+                if((* GS_SOC_I2C_SR) & SR_NOACK) return i;
+
+                /*write slave_addr*/
+                * GS_SOC_I2C_TXR = addr[0]|1;
+                * GS_SOC_I2C_CR  = CR_START|CR_WRITE; /* start on first addr */
+                while(*GS_SOC_I2C_SR & SR_TIP);
+
+                if((* GS_SOC_I2C_SR) & SR_NOACK) return i;
+
+                * GS_SOC_I2C_CR  = CR_READ|I2C_WACK; /*last read not send ack*/
+                while(*GS_SOC_I2C_SR & SR_TIP);
+
+                buf[i] = * GS_SOC_I2C_TXR;
+                * GS_SOC_I2C_CR  = CR_STOP;
+                * GS_SOC_I2C_SR;
+
+        }
+        return count;
+}
+
+
+int tgt_i2cinit()
+{
+        *(volatile unsigned int *)(0xbfd010c0) = 0x0;
+        *(volatile unsigned int *)(0xbfd010c4) = 0x0;
+        *(volatile unsigned int *)(0xbfd010c8) = 0x0;
+
+        static int inited=0;
+        if(inited)
+                return 0;
+        inited=1;
+        * GS_SOC_I2C_PRER_LO = 0x64;
+        * GS_SOC_I2C_PRER_HI = 0;
+        * GS_SOC_I2C_CTR = 0x80;
+}
+
+/*
+ * 0 single: ÃƒÂ¿Â´ÃŽÂ¶Ã�Ã’Â»Â¸Ã¶
+ * 1 smb block
+ */
+int tgt_i2cread(int type,unsigned char *addr,int addrlen,unsigned char reg,unsigned char *buf,int count)
+{
+        int i;
+        tgt_i2cinit();
+        memset(buf,-1,count);
+        //printk ("in %s !\n", __func__);
+        switch(type)
+        {
+                case I2C_SINGLE:
+                        return i2c_rec_s(addr,addrlen,reg,buf,count);
+                        break;
+                case I2C_BLOCK:
+                        return i2c_rec_b(addr,addrlen,reg,buf,count);
+                        break;
+                case I2C_HW_SINGLE:
+                        return i2c_rec_haf_word(addr,addrlen,reg,(unsigned short *)buf,count);
+                        break;
+
+                default: return 0;break;
+        }
+        return 0;
+}
+
+unsigned char i2c_send_s(unsigned char *addr,int addrlen,unsigned char reg,unsigned char * buf ,int count)
+{
+        int i;
+        int j;
+        for(i=0;i<count;i++)
+        {
+                for(j=0;j<addrlen;j++)
+                {
+                        /*write slave_addr*/
+                        * GS_SOC_I2C_TXR = addr[j];
+                        * GS_SOC_I2C_CR  = j == 0? (CR_START|CR_WRITE):CR_WRITE; /* start on first addr */
+                        while(*GS_SOC_I2C_SR & SR_TIP);
+
+                        if((* GS_SOC_I2C_SR) & SR_NOACK) return i;
+                }
+
+                * GS_SOC_I2C_TXR = reg;
+                * GS_SOC_I2C_CR  = CR_WRITE;
+                while(*GS_SOC_I2C_SR & SR_TIP);
+                if((* GS_SOC_I2C_SR) & SR_NOACK) return i;
+
+                * GS_SOC_I2C_TXR = buf[i];
+                * GS_SOC_I2C_CR = CR_WRITE|CR_STOP;
+                while(*GS_SOC_I2C_SR & SR_TIP);
+
+                if((* GS_SOC_I2C_SR) & SR_NOACK) return i;
+        }
+        while(*GS_SOC_I2C_SR & SR_BUSY);
+        return count;
+}
+
+unsigned char i2c_send_b(unsigned char *addr,int addrlen,unsigned char reg,unsigned char * buf ,int count)
+{
+        int i;
+        int j;
+        for(j=0;j<addrlen;j++)
+        {
+                /*write slave_addr*/
+                * GS_SOC_I2C_TXR = addr[j];
+                * GS_SOC_I2C_CR  = j == 0? (CR_START|CR_WRITE):CR_WRITE; /* start on first addr */
+                while(*GS_SOC_I2C_SR & SR_TIP);
+
+                if((* GS_SOC_I2C_SR) & SR_NOACK) return i;
+        }
+
+
+        * GS_SOC_I2C_TXR = reg;
+        * GS_SOC_I2C_CR  = CR_WRITE;
+        while(*GS_SOC_I2C_SR & SR_TIP);
+        if((* GS_SOC_I2C_SR) & SR_NOACK) return i;
+
+        for(i=0;i<count;i++)
+        {
+                * GS_SOC_I2C_TXR = buf[i];
+                * GS_SOC_I2C_CR = CR_WRITE;
+                while(*GS_SOC_I2C_SR & SR_TIP);
+
+                if((* GS_SOC_I2C_SR) & SR_NOACK) return i;
+
+        }
+        * GS_SOC_I2C_CR  = CR_STOP;
+        while(*GS_SOC_I2C_SR & SR_BUSY);
+        return count;
+}
+
+int i2c_send_haf_word(unsigned char *addr,int addrlen,unsigned char reg,unsigned short * buf ,int count)
+{
+        int i;
+        int j;
+        unsigned char value;
+        for(i=0;i<count;i++)
+        {
+                for(j=0;j<addrlen;j++)
+                {
+                        /*write slave_addr*/
+                        * GS_SOC_I2C_TXR = addr[j];
+                        * GS_SOC_I2C_CR  = j == 0? (CR_START|CR_WRITE):CR_WRITE; /* start on first addr */
+                        while(*GS_SOC_I2C_SR & SR_TIP);
+
+                        if((* GS_SOC_I2C_SR) & SR_NOACK) return -1;
+                }
+
+                * GS_SOC_I2C_TXR = reg++;   //lxy: reg++ after write once
+                * GS_SOC_I2C_CR  = CR_WRITE;
+                while(*GS_SOC_I2C_SR & SR_TIP);
+                if((* GS_SOC_I2C_SR) & SR_NOACK) return -1;
+
+                value = (buf[i] >> 8);
+                * GS_SOC_I2C_TXR = value;
+                * GS_SOC_I2C_CR  = CR_WRITE;
+//                printk ("hi data = 0x%x ,", value);
+                while(*GS_SOC_I2C_SR & SR_TIP);
+                if((* GS_SOC_I2C_SR) & SR_NOACK) return -1;
+
+                value = buf[i];
+                * GS_SOC_I2C_TXR = value;
+                * GS_SOC_I2C_CR  = CR_WRITE;
+//                printk ("low data = 0x%x ,", value);
+                while(*GS_SOC_I2C_SR & SR_TIP);
+                if((* GS_SOC_I2C_SR) & SR_NOACK) return -1;
+
+                * GS_SOC_I2C_CR = CR_WRITE|CR_STOP;
+                while(*GS_SOC_I2C_SR & SR_TIP);
+        }
+        while(*GS_SOC_I2C_SR & SR_BUSY);
+        return count;
+}
+
+
+
+int tgt_i2cwrite(int type,unsigned char *addr,int addrlen,unsigned char reg,unsigned char *buf,int count)
+{
+        tgt_i2cinit();
+        switch(type&0xff)
+        {
+                case I2C_SINGLE:
+                    i2c_send_s(addr,addrlen,reg,buf,count);
+                    break;
+                case I2C_BLOCK:
+                    return i2c_send_b(addr,addrlen,reg,buf,count);
+                    break;
+                case I2C_SMB_BLOCK:
+                    break;
+                case I2C_HW_SINGLE:
+                        return i2c_send_haf_word(addr,addrlen,reg,(unsigned short *)buf,count);
+                        break;
+                default:
+                    return -1;break;
+        }
+        return -1;
+}
+
+void    uda1342_test()
+{
+        unsigned char *dev_add;
+        unsigned short data;
+        unsigned char reg;
+        int ret = 0;
+
+        dev_add = 0x8000bb90;
+        *dev_add = uda_address;
+        reg = 0x10;
+        unsigned short data1[7];
+        unsigned char i;
+
+        tgt_i2cinit();
+
+        tgt_i2cread(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&data), 1);
+        //printk ("data = 0x%x !\n", data);
+
+        data = 0xfc00;
+        ret = tgt_i2cwrite(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&data), 1);
+        //if (ret == -1)
+        //        printk ("write error......\n");
+
+        data = 0x0;
+        ret = tgt_i2cread(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&data), 1);
+        //if (ret == -1)
+        //        printk ("read error......\n");
+        //printk ("data = 0x%x !\n", data);
+
+        reg = 0x0;
+        ret = tgt_i2cwrite(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&reg1[0]), 1);
+        reg = 0x1;
+        ret = tgt_i2cwrite(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&reg1[1]), 1);
+        reg = 0x10;
+        ret = tgt_i2cwrite(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&reg1[2]), 1);
+        reg = 0x11;
+        ret = tgt_i2cwrite(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&reg1[3]), 1);
+        reg = 0x12;
+        ret = tgt_i2cwrite(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&reg1[4]), 1);
+        reg = 0x20;
+        ret = tgt_i2cwrite(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&reg1[5]), 1);
+        reg = 0x21;
+        ret = tgt_i2cwrite(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&reg1[6]), 1);
+
+        reg = 0x0;
+        ret = tgt_i2cread(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&data1[0]), 1);
+        reg = 0x1;
+        ret = tgt_i2cread(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&data1[1]), 1);
+        reg = 0x10;
+        ret = tgt_i2cread(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&data1[2]), 1);
+        reg = 0x11;
+        ret = tgt_i2cread(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&data1[3]), 1);
+        reg = 0x12;
+        ret = tgt_i2cread(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&data1[4]), 1);
+        reg = 0x20;
+        ret = tgt_i2cread(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&data1[5]), 1);
+        reg = 0x21;
+        ret = tgt_i2cread(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&data1[6]), 1);
+
+        for (i=0; i<7; i++)
+        {
+                printk ("data1[%d] = 0x%x ---> 0x%x!\n", i, data1[i], reg1[i]);
+        }
+}
+
+
+
+void    config_uda1342()
+{
+        unsigned char rat_cddiv;
+        unsigned char rat_bitdiv;
+        unsigned char dev_addr;
+        unsigned short value;
+#if 1
+        dev_addr = uda_dev_addr;
+        rat_bitdiv = 0x27;
+        rat_cddiv = 0x4;
+
+        * IISCONFIG = (16<<24) | (16<<16) | (rat_bitdiv<<8) | (rat_cddiv<<0) ;
+        //    * IISSTATE = 0xc220;
+        //* IISSTATE = 0xc200;
+	//printk("* IISSTATE is %x\n",* IISSTATE);
+        * IISSTATE = 0xd2a0;	///0x0200;cys
+ //       * IISSTATE = 0x0d280;	///0x0200;bj
+        value =0x8000;
+#endif
+        uda1342_test();
+}
+
+static int ls1x_audio_sync(struct file *file)
+{
+        struct ls1x_audio_state *state = file->private_data;
+        struct audio_stream *is = state->input_stream;
+        struct audio_stream *os = state->output_stream;
+
+        if (file->f_mode & FMODE_READ) {
+                if (is->state == STOP && !list_empty(&is->run_list)) {
+                        struct audio_dma_desc *desc;
+                        desc = list_entry(is->run_list.next, struct audio_dma_desc, link);
+                        dma_enable_trans(is, desc);
+                        is->state = RUN;
+                }
+
+                if (!list_empty(&is->run_list))
+                        schedule_timeout(CONFIG_HZ*2);
+
+                /* stop write ac97 dma */
+                writel(0x12, order_addr_in);
+        }
+        if (file->f_mode & FMODE_WRITE) {
+                if (os->state == STOP && !list_empty(&os->run_list)) {
+                        struct audio_dma_desc *desc;
+                        desc = list_entry(os->run_list.next, struct audio_dma_desc, link);
+                        dma_enable_trans(os, desc);
+                        os->state = RUN;
+                }
+
+                if (!list_empty(&os->run_list))
+                        schedule_timeout(CONFIG_HZ*2);
+
+                /* stop read ac97 dma */
+                writel(0x11, order_addr_in);
+        }
+
+        return 0;
+}
+
+static int ls1x_audio_release(struct inode *inode, struct file *file)
+{
+        struct ls1x_audio_state *state = file->private_data;
+
+        down(&state->sem);
+
+        if (file->f_mode & FMODE_READ) {
+                ls1x_audio_sync(file);
+                audio_clear_buf(state->input_stream);
+                state->rd_ref = 0;
+                free_irq(LS1B_BOARD_DMA2_IRQ, state->input_stream);
+#ifdef CONFIG_SND_SB2F_TIMER
+                del_timer(&state->input_stream->timer);
+#endif 
+        }
+
+        if (file->f_mode & FMODE_WRITE) {
+                ls1x_audio_sync(file);
+                audio_clear_buf(state->output_stream);
+                state->wr_ref = 0;
+                free_irq(LS1B_BOARD_DMA1_IRQ, state->output_stream);
+#ifdef CONFIG_SND_SB2F_TIMER
+                del_timer(&state->output_stream->timer);
+#endif 
+        }
+
+        up(&state->sem);
+        return 0;
+}
+
+static int ls1x_audio_open(struct inode *inode, struct file *file)
+{
+	printk("opening %s..\n", __func__);
+	struct ls1x_audio_state *state = &ls1x_audio_state;
+	struct audio_stream *is = state->input_stream;
+	struct audio_stream *os = state->output_stream;
+	int minor = MINOR(inode->i_rdev);
+	int err;
+	u32 x, conf;
+
+	down(&state->sem);
+
+	/* access control */
+	err = -ENODEV;
+	if ((file->f_mode & FMODE_WRITE) && !os)
+		goto out;
+	if ((file->f_mode & FMODE_READ) && !is)
+		goto out;
+	err = -EBUSY;
+
+	if ((file->f_mode & FMODE_WRITE) && state->wr_ref)
+		goto out;
+	if ((file->f_mode & FMODE_READ) && state->rd_ref)
+		goto out;
+
+	file->private_data = state;
+
+	config_uda1342();
+
+	if ((file->f_mode & FMODE_WRITE)) {
+		state->wr_ref = 1;
+		os->fragsize = AUDIO_FRAGSIZE_DEFAULT;
+		os->nbfrags = PLAY_NBFRAGS;
+		os->output = 1;
+		os->num_channels = 2;
+		os->sample_size = 16;
+		if ((minor & 0xf) == SND_DEV_DSP16)
+			os->sample_size = 16;
+		init_waitqueue_head(&os->frag_wq);
+		os->ask_dma = NULL;
+		INIT_LIST_HEAD(&os->free_list);
+		INIT_LIST_HEAD(&os->run_list);
+		INIT_LIST_HEAD(&os->done_list);
+		INIT_LIST_HEAD(&os->all_list);
+		spin_lock_init(&os->lock);
+		request_irq(LS1B_BOARD_DMA1_IRQ, ac97_dma_write_intr, IRQF_SHARED,
+				"ac97dma-write", os);
+#ifdef CONFIG_SND_SB2F_TIMER
+		init_timer(&os->timer);
+		os->timer.data = (unsigned long)os;
+		os->timer.function = ls1x_audio_timeout;
+#endif
+	}
+
+	if (file->f_mode & FMODE_READ) {
+		state->rd_ref = 1;
+		is->fragsize = AUDIO_FRAGSIZE_DEFAULT;
+		is->nbfrags = REC_NBFRAGS;
+		is->output = 0;
+		is->num_channels = 2;
+		is->sample_size = 16;
+		if ((minor & 0xf) == SND_DEV_DSP16)
+			is->sample_size = 16;
+		init_waitqueue_head(&is->frag_wq);
+		is->ask_dma = NULL;
+		INIT_LIST_HEAD(&is->free_list);
+		INIT_LIST_HEAD(&is->run_list);
+		INIT_LIST_HEAD(&is->done_list);
+		INIT_LIST_HEAD(&is->all_list);
+		spin_lock_init(&is->lock);
+		request_irq(LS1B_BOARD_DMA2_IRQ, ac97_dma_read_intr, IRQF_SHARED,
+				"ac97dma-read", is);
+#ifdef CONFIG_SND_SB2F_TIMER
+		init_timer(&is->timer);
+		is->timer.data = (unsigned long)is;
+		is->timer.function = ls1x_audio_timeout;
+#endif
+	}
+
+	if (file->f_mode & FMODE_WRITE) {
+		x = readl(state->base + OCC0);
+		conf = x & ~(FIFO_THRES_MASK << FIFO_THRES_OFFSET) & ~(SS_MASK << SS_OFFSET);
+		if (state->no_vra)
+			conf = (conf | (2 << FIFO_THRES_OFFSET) | DMA_EN | CH_EN) & (~SR);
+		else
+			conf = conf | (2 << FIFO_THRES_OFFSET) | DMA_EN | CH_EN | SR;
+		if (os->sample_size == 16)
+			conf = conf | (2 << SS_OFFSET);
+		conf |= (conf << OCH1_CFG_R_OFFSET) | (conf << OCH0_CFG_L_OFFSET);
+		//writel(conf, state->base + OCC0);cys
+		//writel(0x6969, state->base + OCC0);
+	}
+	if (file->f_mode & FMODE_READ) {
+		x = readl(state->base + ICC);
+		conf = x & ~(FIFO_THRES_MASK << FIFO_THRES_OFFSET) & ~(SS_MASK << SS_OFFSET);
+		if (state->no_vra)
+			conf = (conf | (2 << FIFO_THRES_OFFSET) | DMA_EN | CH_EN) & (~SR);
+		else
+			conf = conf | (2 << FIFO_THRES_OFFSET) | DMA_EN | CH_EN | SR;
+		if (is->sample_size == 16)
+			conf = conf | (2 << SS_OFFSET);
+		conf |= (conf << ICH2_CFG_MIC_OFFSET) | (conf << ICH1_CFG_R_OFFSET) | (conf << ICH0_CFG_L_OFFSET);
+		writel(conf, state->base + ICC);
+	}
+
+	err = 0;
+
+out:
+	up(&state->sem);
+	printk("err is %d\n",err);
+	return err;
+}
+
+static struct file_operations ls1x_dsp_fops = {
+	owner:			THIS_MODULE,
+	read:			ls1x_audio_read,
+	write:			ls1x_audio_write,
+	unlocked_ioctl:	ls1x_audio_ioctl,
+	open:			ls1x_audio_open,
+	release:		ls1x_audio_release,
+};
+
+static DEFINE_SEMAPHORE(ls1x_ac97_mutex);
+
+static int ls1x_audio_probe(struct platform_device *pdev)
+{
+	struct ls1x_audio_state *state = &ls1x_audio_state;
+	struct resource *res;
+	int rc;
+
+	order_addr_in = ioremap(ORDER_ADDR_IN, 0x4);
+	memset(state, 0, sizeof(struct ls1x_audio_state));
+
+	state->input_stream = &input_stream;
+	state->output_stream = &output_stream;
+	sema_init(&state->sem, 1);
+
+	res =  platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!res) {
+		dev_err(&pdev->dev, "cannot find IO resource\n");
+		return -ENOENT;
+	}
+
+	if (!request_mem_region(res->start, resource_size(res), "ls1x-audio")){
+		printk("request mem error\n");
+		return -EBUSY;
+	}
+
+	state->base = ioremap(res->start, resource_size(res));
+	if (!state->base) {
+		dev_err(&pdev->dev, "ls1x-audio - failed to map controller\n");
+		printk("error iomap\n");
+		rc = -ENOMEM;
+		goto err_dev0;
+	}
+
+	if ((state->dev_audio = register_sound_dsp(&ls1x_dsp_fops, -1)) < 0){
+		printk("error!\n");
+		goto err_dev1;
+	}
+
+	printk("register dsp success\n");
+	return 0;
+
+err_dev3:
+	unregister_sound_mixer(state->codec->dev_mixer);
+err_dev2:
+	unregister_sound_dsp(state->dev_audio);
+err_dev1:
+	iounmap(state->base);
+	release_mem_region(res->start, resource_size(res));
+err_dev0:
+	///ac97_release_codec(state->codec);
+
+	return rc;
+}
+
+static int __devexit ls1x_audio_remove(struct platform_device *pdev)
+{
+	struct ls1x_audio_state *state = &ls1x_audio_state;
+	struct resource *res;
+
+	unregister_sound_dsp(state->dev_audio);
+	unregister_sound_mixer(state->codec->dev_mixer);
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	iounmap(state->base);
+	release_mem_region(res->start, resource_size(res));
+
+	///ac97_release_codec(state->codec);
+
+	return 0;
+}
+
+#ifdef CONFIG_PM
+static int ls1x_audio_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	return 0;
+}
+
+static int ls1x_audio_resume(struct platform_device *pdev)
+{
+	return 0;
+}
+#else
+#define ls1x_audio_suspend NULL
+#define ls1x_audio_resume NULL
+#endif
+
+static struct platform_driver ls1x_audio_driver = {
+	.driver = {
+		.name	= "ls1x-audio",
+		.owner	= THIS_MODULE,
+	},
+	.probe		= ls1x_audio_probe,
+	.remove		= ls1x_audio_remove,
+	.suspend	= ls1x_audio_suspend,
+	.resume		= ls1x_audio_resume,
+};
+
+static int __init ls1x_audio_init(void)
+{
+	int ret = 0;
+
+	ret = platform_driver_register(&ls1x_audio_driver);
+	if (ret)
+		printk(KERN_ERR "failed to register ls1x-audio\n");
+	return ret;
+}
+
+static void __exit ls1x_audio_exit(void)
+{
+    platform_driver_unregister(&ls1x_audio_driver);
+}
+
+module_init(ls1x_audio_init);
+module_exit(ls1x_audio_exit);
+
+#ifndef MODULE
+
+static int __init
+ls1x_setup(char *options)
+{
+	char           *this_opt;
+
+	if (!options || !*options)
+		return 0;
+
+	while ((this_opt = strsep(&options, ","))) {
+		if (!*this_opt)
+			continue;
+		if (!strncmp(this_opt, "vra", 3)) {
+			vra = 1;
+		}
+	}
+
+	return 1;
+}
+
+__setup("ls1x_audio=", ls1x_setup);
+
+#endif /* MODULE */
+
+MODULE_LICENSE("GPL");
+
+
diff -uNra linux-3.0.82/sound/oss/ls1x_uda1342.c linux-3.0.82x/sound/oss/ls1x_uda1342.c
--- linux-3.0.82/sound/oss/ls1x_uda1342.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/sound/oss/ls1x_uda1342.c	2017-09-23 03:42:50.382673950 +0800
@@ -0,0 +1,1572 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under  the terms of the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the License, or (at your
+ *  option) any later version.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/pci.h>
+#include <linux/poll.h>
+#include <linux/sound.h>
+#include <linux/soundcard.h>
+#include <linux/types.h>
+#include <linux/sched.h>
+#include <linux/semaphore.h>
+#include <linux/ac97_codec.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include "ls1x_ac97.h"
+#include <irq.h>
+#include <ls1b_board.h>
+///#define	CONFIG_SND_SB2F_TIMER	1
+
+void __iomem *order_addr_in;
+static int codec_reset = 1;
+
+static int uda1342_volume; 
+
+static irqreturn_t ac97_dma_write_intr(int irq, void *private);
+static irqreturn_t ac97_dma_read_intr(int irq, void *private);
+
+struct dma_desc {
+	u32 ordered;
+	u32 saddr;
+	u32 daddr;
+	u32 length;
+	u32 step_length;
+	u32 step_times;
+	u32 cmd;
+	u32 stats;
+};
+
+struct audio_dma_desc {
+	struct dma_desc snd;
+	struct dma_desc null;
+	struct list_head link;
+	struct list_head all;
+	dma_addr_t snd_dma_handle;
+	dma_addr_t snd_dma;
+	u32 pos;
+	char *snd_buffer;
+};
+
+struct audio_stream {
+	struct dma_desc *ask_dma;
+	struct list_head free_list;
+	struct list_head run_list;
+	struct list_head done_list;
+	struct list_head all_list;
+	spinlock_t lock;
+#ifdef CONFIG_SND_SB2F_TIMER
+	struct timer_list	timer;		/* "no irq" timer */
+#endif
+	u32 nbfrags;
+	u32 fragsize;
+	struct semaphore sem;
+	wait_queue_head_t frag_wq;
+	dma_addr_t ask_dma_handle;
+
+	int num_channels;
+	u32 output;
+	u32 sample_rate;
+	u32 sample_size;
+	u32 rate;
+	u32 state;
+};
+
+static struct audio_stream input_stream = {
+	output: 0,
+	fragsize:0x10000,
+};
+
+static struct audio_stream output_stream = {
+	output: 1,
+	fragsize:0x10000,
+};
+
+unsigned short reg1[7] = {
+        //    0x1c02,
+        //    0x1a02,
+        0x1402,
+        //    0x1402,
+        //    0x1002,
+        //    0x1202,
+        0x0014,
+        //    0x0010,
+        //    0xc003,
+        //    0xff63,
+        //    0xff00,
+        0xff03,
+        //    0xfc00,
+        //    0xcf83,
+        0x0000,
+        0x0000,
+        0x0030,
+        0x0030,
+        //    0x0230,
+        //    0x0230,
+        //    0x0830,
+        //    0x0830,
+};
+
+#define uda_address     /*0x1fe70000	*/	0x34
+
+#define uda_dev_addr    0x34
+
+#define uda1342_base    0xbfe60000
+#define DMA_BUF 0x00800000
+
+#define IISVERSION  (volatile unsigned int *)(uda1342_base + 0x0)
+#define IISCONFIG   (volatile unsigned int *)(uda1342_base + 0x4)
+#define IISSTATE  (volatile unsigned int *)(uda1342_base + 0x8)
+
+#define I2C_SINGLE 0 
+#define I2C_BLOCK 1
+#define I2C_SMB_BLOCK 2
+#define I2C_HW_SINGLE 3 //lxy 
+
+#define GS_SOC_I2C_BASE    0xbfe58000           //0x1fe58000
+//#define GS_SOC_I2C_BASE    0xbfe70000 //IIC2's base.
+#define GS_SOC_I2C_PRER_LO (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x0)
+#define GS_SOC_I2C_PRER_HI (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x1)
+#define GS_SOC_I2C_CTR     (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x2)
+#define GS_SOC_I2C_TXR     (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x3)
+#define GS_SOC_I2C_RXR     (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x3)
+#define GS_SOC_I2C_CR      (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x4)
+#define GS_SOC_I2C_SR      (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x4)
+
+#define CR_START 0x80
+#define CR_WRITE 0x10
+#define SR_NOACK 0x80
+#define CR_STOP  0x40
+#define SR_BUSY  0x40 
+#define CR_START 0x80
+#define SR_TIP   0x2
+
+#define CR_READ  0x20
+#define I2C_WACK 0x8
+
+enum {
+	STOP = 0,
+	RUN = 1
+};
+
+/* Boot options
+ * 0 = no VRA, 1 = use VRA if codec supports it
+ */
+static int      vra = 1;
+module_param(vra, bool, 0);
+MODULE_PARM_DESC(vra, "if 1 use VRA if codec supports it");
+
+static struct ls1x_audio_state {
+	void __iomem *base;
+	/* soundcore stuff */
+	int dev_audio;
+	int dev_mixer;
+
+	struct ac97_codec *codec;
+	unsigned codec_base_caps; /* AC'97 reg 00h, "Reset Register" */
+	unsigned codec_ext_caps;  /* AC'97 reg 28h, "Extended Audio ID" */
+	int no_vra;		/* do not use VRA */
+
+	spinlock_t lock;
+	struct mutex open_mutex;
+	struct mutex mutex;
+	fmode_t open_mode;
+	wait_queue_head_t open_wait;
+
+	struct audio_stream	 *input_stream;
+	struct audio_stream	 *output_stream;
+
+	u32 rd_ref:1;
+	u32 wr_ref:1;
+	struct semaphore sem;
+} ls1x_audio_state;
+
+static void dma_enable_trans(struct audio_stream * s, struct audio_dma_desc *desc)
+{
+//	struct ls1x_audio_state *state = &ls1x_audio_state;
+	u32 val;
+	int timeout = 20000;
+	unsigned long flags;
+
+	val = desc->snd_dma_handle;
+	val |= s->output ? 0x9 : 0xa;
+	local_irq_save(flags);
+	writel(val, order_addr_in);
+//	while(readl(order_addr_in) & 0x8);
+	while ((readl(order_addr_in) & 0x8) && (timeout-- > 0)) {
+		udelay(5);
+	}
+	local_irq_restore(flags);
+//	writel(0xffffffff, state->base + INTM);
+#ifdef CONFIG_SND_SB2F_TIMER
+	mod_timer(&s->timer, jiffies + HZ/20);
+#endif
+}
+
+void audio_clear_buf(struct audio_stream *s)
+{
+	struct audio_dma_desc *desc;
+
+	while (!list_empty(&s->all_list)) {
+		desc = list_entry(s->all_list.next, struct audio_dma_desc, all);
+		list_del(&desc->all);
+		list_del(&desc->link);
+
+		if (desc->snd_buffer)
+			free_pages((unsigned long)desc->snd_buffer, get_order(s->fragsize));
+		dma_free_coherent(NULL, sizeof(struct audio_dma_desc), desc, 0);
+	}
+
+	if (s->ask_dma)
+		dma_free_coherent(NULL, sizeof(struct audio_dma_desc), s->ask_dma, 0);
+
+	s->ask_dma = NULL;
+}
+
+static void inline link_dma_desc(struct audio_stream *s, struct audio_dma_desc *desc)
+{
+	spin_lock_irq(&s->lock);
+
+	if(!list_empty(&s->run_list)) {
+		struct audio_dma_desc *desc0;
+		desc0 = list_entry(s->run_list.prev, struct audio_dma_desc, link);
+		desc0->snd.ordered = desc->snd_dma_handle | DMA_ORDERED_EN;
+		desc0->null.ordered = desc->snd_dma_handle | DMA_ORDERED_EN;
+		list_add_tail(&desc->link, &s->run_list);
+		if(s->state == STOP) {
+			s->state = RUN;
+			dma_enable_trans(s, desc0);
+		}
+	}
+	else {
+		list_add_tail(&desc->link,&s->run_list);
+		dma_enable_trans(s, desc);
+	}
+
+	spin_unlock_irq(&s->lock);
+}
+
+static void ls1x_init_dmadesc(struct audio_stream *s, struct audio_dma_desc *desc, u32 count)
+{
+	struct dma_desc *_desc;
+	u32 control;
+
+	control = s->output ? 0x1fe60010 : 0x1fe6000c ;
+
+	desc->snd.daddr = desc->null.daddr = control;
+
+	_desc = &desc->snd;
+	_desc->ordered = (desc->snd_dma_handle + sizeof(struct dma_desc)) | DMA_ORDERED_EN;
+	_desc->saddr = desc->snd_dma;
+	_desc->length = 8;
+	_desc->step_length = 0;
+	_desc->step_times = count >> 5;
+	_desc->cmd = s->output ? 0x00001001 : 0x00000001; //enable the interrupt
+
+	_desc = &desc->null;
+	_desc->ordered =  (desc->snd_dma_handle + sizeof(struct dma_desc)) | DMA_ORDERED_EN;
+	_desc->saddr = desc->snd_dma;
+	_desc->length = 8;
+	_desc->step_length = 0;
+	_desc->step_times = 1;
+	_desc->cmd = s->output ? 0x00001000 : 0x00000000; //disable the interrupt
+}
+
+/* setup buffers,dma descs,buffer. */
+int ls1x_setup_buf(struct audio_stream * s)
+{	
+	int i,j;
+	dma_addr_t dma_phyaddr;
+//	dump_stack();
+	if (s->ask_dma)
+		return -EBUSY;
+
+		printk("fsy alloc size ==%d\n",s->nbfrags);
+		printk("fsy alloc size ==%d\n",s->fragsize);
+	for (i=0; i <s->nbfrags; i++) {
+		struct audio_dma_desc *desc;
+		
+		j = sizeof(struct audio_dma_desc);
+//		printk("fsy alloc size ==%d\n",j);
+//		desc = dma_alloc_coherent(NULL, s->nbfrags * sizeof(struct audio_dma_desc),
+//					(dma_addr_t *)&dma_phyaddr, GFP_KERNEL);
+		desc = dma_alloc_coherent(NULL, sizeof(struct audio_dma_desc),
+					(dma_addr_t *)&dma_phyaddr, GFP_KERNEL);
+		if (!desc) {
+			printk(KERN_ERR "2.alloc dma desc err.\n");
+			goto err;
+		}
+//	for (i=0;i<s->nbfrags;i++){
+//		printk("3. alloc dma desc err %x    %p.\n",dma_phyaddr,desc);
+//		memset(desc, 0, s->nbfrags * sizeof(struct audio_dma_desc));
+		memset(desc, 0,sizeof(struct audio_dma_desc));
+
+		desc->snd_dma_handle = dma_phyaddr;
+		desc->null.ordered = (dma_phyaddr + sizeof(struct dma_desc)) | DMA_ORDERED_EN;
+		desc->snd.ordered = (dma_phyaddr + sizeof(struct dma_desc)) | DMA_ORDERED_EN;
+		list_add_tail(&desc->link,&s->free_list);
+		list_add_tail(&desc->all,&s->all_list);
+		j = get_order(s->fragsize);
+//		printk("fsy alloc num ==%d\n",j);
+		desc->snd_buffer = (void *)__get_free_pages(GFP_ATOMIC|GFP_DMA, get_order(s->fragsize));
+		if (!desc->snd_buffer) {
+			printk(KERN_ERR "4.alloc dma buffer err\n");
+			goto err;
+		}
+		desc->snd_dma = dma_map_single(NULL, desc->snd_buffer, s->fragsize, DMA_FROM_DEVICE);
+//		desc = desc + sizeof(struct audio_dma_desc);
+//		dma_phyaddr = dma_phyaddr + sizeof(struct audio_dma_desc);
+	}
+
+	/* dma desc for ask_valid one per struct audio_stream */
+	s->ask_dma = dma_alloc_coherent(NULL, sizeof(struct dma_desc),
+			&dma_phyaddr, GFP_KERNEL);
+	if(!s->ask_dma) {
+		printk(KERN_ERR "3. alloc dma desc err.\n");
+		goto err;
+	}
+	memset(s->ask_dma, 0, sizeof(struct dma_desc));
+	s->ask_dma_handle = dma_phyaddr;
+
+	sema_init(&s->sem, 1);
+
+	return 0;
+
+err:
+	audio_clear_buf(s);
+	printk(KERN_ERR "unable to allocate audio memory\n");
+	return -ENOMEM;
+}
+
+#ifdef CONFIG_SND_SB2F_TIMER
+static void ls1x_audio_timeout(unsigned long data)
+{
+	struct audio_stream *s = (struct audio_stream *)data;
+
+	if (s->output)
+		ac97_dma_write_intr(0, s);
+	else
+		ac97_dma_read_intr(0, s);
+	mod_timer(&s->timer, jiffies + HZ/20);
+}
+#endif
+
+static irqreturn_t ac97_dma_read_intr(int irq, void *private)
+{
+	struct audio_stream *s = (struct audio_stream *)private;
+	struct audio_dma_desc *desc;
+	unsigned long flags;
+
+	if (list_empty(&s->run_list))
+		return IRQ_HANDLED;
+
+	local_irq_save(flags);
+	writel(s->ask_dma_handle | 0x6, order_addr_in);
+	while (readl(order_addr_in) & 4) {
+	}
+	local_irq_restore(flags);
+
+	do {
+		desc = list_entry(s->run_list.next, struct audio_dma_desc, link);
+		if (s->ask_dma->ordered == desc->snd.ordered)
+			break;
+
+//		spin_lock(&s->lock);
+		list_del(&desc->link);
+		list_add_tail(&desc->link, &s->done_list);
+//		spin_unlock(&s->lock);
+	} while(!list_empty(&s->run_list));
+
+	if (!list_empty(&s->done_list))
+		wake_up(&s->frag_wq);
+	return IRQ_HANDLED;
+}
+
+static irqreturn_t ac97_dma_write_intr(int irq, void *private)
+{
+	struct audio_stream *s = (struct audio_stream *)private;
+	struct audio_dma_desc *desc;
+	unsigned long flags;
+	
+	if (list_empty(&s->run_list))
+		return IRQ_HANDLED;
+
+	local_irq_save(flags);
+	writel(s->ask_dma_handle | 0x5, order_addr_in);
+	while (readl(order_addr_in) & 4) {
+	}
+	local_irq_restore(flags);
+
+	do {
+		desc = list_entry(s->run_list.next, struct audio_dma_desc, link);
+		/*first desc's ordered may be null*/
+		if(s->ask_dma->ordered == desc->snd.ordered || s->ask_dma->ordered == 
+			((desc->snd_dma_handle + sizeof(struct dma_desc)) | DMA_ORDERED_EN))
+			break;
+//		spin_lock(&s->lock);
+		list_del(&desc->link);
+		desc->pos = 0;
+		list_add_tail(&desc->link, &s->free_list);
+//		spin_unlock(&s->lock);
+	} while(!list_empty(&s->run_list));
+
+	if (!list_empty(&s->free_list))
+		wake_up(&s->frag_wq);
+
+	return IRQ_HANDLED;
+}
+
+static u32 fill_play_buffer(struct audio_stream *s, const char *buf, u32 count)
+{
+	struct audio_dma_desc *desc;
+	u32 copy_bytes;
+
+	desc = list_entry(s->free_list.next, struct audio_dma_desc, link);
+	copy_bytes = min((s->fragsize - desc->pos), count);
+	copy_from_user((void *)(desc->snd_buffer + desc->pos), buf, copy_bytes);
+	desc->pos += copy_bytes;
+
+	if (desc->pos == s->fragsize) {
+//		spin_lock_irq(&s->lock);
+		list_del(&desc->link);
+//		spin_unlock_irq(&s->lock);
+		ls1x_init_dmadesc(s, desc, s->fragsize);
+		link_dma_desc(s, desc);
+	}
+
+	return copy_bytes;
+}
+
+static int ls1x_audio_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
+{
+	struct ls1x_audio_state *state = (struct ls1x_audio_state *)file->private_data;
+	struct audio_stream *s = state->output_stream;
+	const char *buffer0 = buffer;
+	unsigned int ret = 0;
+
+	if (*ppos != file->f_pos) {
+		return -ESPIPE;
+	}
+
+	if (!s->ask_dma && ls1x_setup_buf(s)) {
+		return -ENOMEM;
+	}
+
+	if (file->f_flags & O_NONBLOCK) {
+		if (down_trylock(&s->sem))
+			return -EAGAIN;
+	} else {
+		if (down_interruptible(&s->sem))
+			return -ERESTARTSYS;
+	}
+
+	printk("fsy count ==%d\n",count);
+	while (count > 0) {
+		if(list_empty(&s->free_list)) {
+	printk("fsy f_flags ==%d\n",file->f_flags);
+			if(file->f_flags & O_NONBLOCK)
+				return -EAGAIN;
+
+			if(wait_event_interruptible(s->frag_wq, !list_empty(&s->free_list))) {
+				up(&s->sem);
+				return -ERESTARTSYS;
+			}
+		}
+		/* Fill data , if the ring is not full */
+		ret = fill_play_buffer(s, buffer, count);
+		count -= ret;
+		buffer += ret;
+	}
+
+	up(&s->sem);
+	return (buffer - buffer0);
+}
+
+static int ls1x_copy_to_user(struct audio_stream *s, char *buffer, u32 count)
+{
+	struct audio_dma_desc *desc;
+	int ret = 0;
+
+	while (!list_empty(&s->done_list) && count) {
+		u32 left;
+		desc = list_entry(s->done_list.next, struct audio_dma_desc, link);
+		left = min(s->fragsize - desc->pos,count);
+		copy_to_user(buffer, (void *)(desc->snd_buffer + desc->pos), left);
+		desc->pos += left;
+		count -= left;
+		buffer += left;
+		ret += left;
+		if (desc->pos == s->fragsize) {
+			list_del(&desc->link);
+			desc->pos = 0;
+			list_add_tail(&desc->link, &s->free_list);
+		}
+	}
+
+	return ret;
+}
+
+static int ls1x_audio_read(struct file *file, char *buffer, size_t count, loff_t * ppos)
+{
+	struct ls1x_audio_state *state = file->private_data;
+	struct audio_stream *s = state->input_stream;
+	struct audio_dma_desc *desc;
+	char *buffer0 = buffer;
+
+	if (*ppos != file->f_pos)
+		return -ESPIPE;
+
+	if (!s->ask_dma && ls1x_setup_buf(s))
+		return -ENOMEM;
+
+	/*3. sem:get resource .if 0 ,wait */
+	if (file->f_flags & O_NONBLOCK) {
+		if (down_trylock(&s->sem))
+			return -EAGAIN;
+	} else {
+		if (down_interruptible(&s->sem))
+			return -ERESTARTSYS;
+	}
+
+	while (count > 0) {
+		int ret;
+
+		while (!list_empty(&s->free_list)) {
+			desc = list_entry(s->free_list.next, struct audio_dma_desc, link);
+//			spin_lock_irq(&s->lock);
+			list_del(&desc->link);
+//			spin_unlock_irq(&s->lock);
+			ls1x_init_dmadesc(s, desc, s->fragsize);
+			link_dma_desc(s, desc);
+		}
+
+		/* record's buffer is empty */
+		while (list_empty(&s->done_list)) {
+			if (file->f_flags & O_NONBLOCK) {
+				up(&s->sem);
+				return -EAGAIN;
+			}
+			if(wait_event_interruptible(s->frag_wq, !list_empty(&s->done_list))) {
+				up(&s->sem);
+				return -ERESTARTSYS;
+			}
+		}
+
+		/* data is ready now , so copy it */
+		ret = ls1x_copy_to_user(s, buffer, count);
+		count -= ret;
+		buffer += ret;
+	}
+
+	while (!list_empty(&s->free_list)) {
+		desc = list_entry(s->free_list.next, struct audio_dma_desc, link);
+		list_del(&desc->link);
+		ls1x_init_dmadesc(s, desc, s->fragsize);
+		link_dma_desc(s, desc);
+	}
+
+	up(&s->sem);
+	return (buffer - buffer0);
+}
+
+int tgt_i2cwrite(int type,unsigned char *addr,int addrlen,unsigned char reg,unsigned char *buf,int count);
+
+static long ls1x_audio_ioctl(struct file *file, uint cmd, ulong arg)
+{
+	struct ls1x_audio_state *state = file->private_data;
+	struct audio_stream *os = state->output_stream;
+	struct audio_stream *is = state->input_stream;
+	int rd=0, wr=0, val=0;
+
+        long    var;
+        int     ret,reg;
+        unsigned char *dev_add;
+
+        dev_add = 0x8000bb90;
+        *dev_add = uda_address;
+
+	if (file->f_mode & FMODE_WRITE)
+		wr = 1;
+	if (file->f_mode & FMODE_READ)
+		rd = 1;
+
+	switch (cmd) {
+	case SOUND_MIXER_WRITE_VOLUME:	/*  */
+  		ret 	= get_user(var, (long *) arg); 
+		if(ret)
+			return ret;
+		printk("\n\nvar is %x\n",var);
+		reg = 0x11;
+		ret = tgt_i2cwrite(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)&var , 1); ///DAC master volume
+#if 1
+		reg = 0x12;
+		ret = tgt_i2cwrite(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)&var , 1); ///DAC mixer volume
+#endif
+		return 0;
+	case OSS_GETVERSION:
+		return put_user(SOUND_VERSION, (int *) arg);
+
+	case SNDCTL_DSP_SETDUPLEX:
+		return 0;
+
+	case SNDCTL_DSP_GETCAPS:
+		val = DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP;
+		if (is && os)
+			val |= DSP_CAP_DUPLEX;
+		return put_user(val, (int *) arg);
+
+	case SNDCTL_DSP_SPEED:
+		return 0;
+
+	case SNDCTL_DSP_STEREO:
+		return 0;
+
+	case SNDCTL_DSP_CHANNELS:
+		if (get_user(val, (int *) arg))
+			return -EFAULT;
+		if (val != 0) {
+			if (file->f_mode & FMODE_READ) {
+				if (val < 0 || val > 2)
+					return -EINVAL;
+				is->num_channels = val;
+			}
+			if (file->f_mode & FMODE_WRITE) {
+				switch (val) {
+				case 1:
+				case 2:
+					break;
+				case 3:
+				case 5:
+					return -EINVAL;
+				case 4:
+					if (!(state->codec_ext_caps &
+					      AC97_EXTID_SDAC))
+						return -EINVAL;
+					break;
+				case 6:
+					if ((state->codec_ext_caps &
+					     AC97_EXT_DACS) != AC97_EXT_DACS)
+						return -EINVAL;
+					break;
+				default:
+					return -EINVAL;
+				}
+
+				if (val <= 2 &&
+				    (state->codec_ext_caps & AC97_EXT_DACS)) {
+					/* disable surround and center/lfe
+					 * channels in AC'97
+					 */
+					//u16 ext_stat = ls1x_codec_read(state->codec, AC97_EXTENDED_STATUS);
+					//ls1x_codec_write(state->codec, AC97_EXTENDED_STATUS,
+					//	ext_stat | (AC97_EXTSTAT_PRI | AC97_EXTSTAT_PRJ | AC97_EXTSTAT_PRK));
+				} else if (val >= 4) {
+					/* enable surround, center/lfe
+					 * channels in AC'97
+					 */
+					//u16 ext_stat = ls1x_codec_read(state->codec, AC97_EXTENDED_STATUS);
+			//		ext_stat &= ~AC97_EXTSTAT_PRJ;
+	///				if (val == 6)
+				///	ext_stat &= ~(AC97_EXTSTAT_PRI | AC97_EXTSTAT_PRK);
+			///		ls1x_codec_write(state->codec, AC97_EXTENDED_STATUS, ext_stat);
+				}
+
+				os->num_channels = val;
+			}
+		}
+		return put_user(val, (int *) arg);
+
+	case SNDCTL_DSP_GETFMTS:	/* Returns a mask */
+		return put_user(AFMT_S16_LE | AFMT_U8, (int *) arg);
+
+	case SNDCTL_DSP_SETFMT:	/* Selects ONE fmt */
+		if (get_user(val, (int *) arg))
+			return -EFAULT;
+		if (val != AFMT_QUERY) {
+			if (file->f_mode & FMODE_READ) {
+				if (val == AFMT_S16_LE)
+					state->input_stream->sample_size = 16;
+				else {
+					val = AFMT_U8;
+					state->input_stream->sample_size = 8;
+				}
+			}
+			if (file->f_mode & FMODE_WRITE) {
+				if (val == AFMT_S16_LE)
+					state->output_stream->sample_size = 16;
+				else {
+					val = AFMT_U8;
+					state->output_stream->sample_size = 8;
+				}
+			}
+		} else {
+			if (file->f_mode & FMODE_READ)
+				val = (state->input_stream->sample_size == 16) ?
+					AFMT_S16_LE : AFMT_U8;
+			else
+				val = (state->output_stream->sample_size == 16) ?
+					AFMT_S16_LE : AFMT_U8;
+		}
+		return put_user(val, (int *) arg);
+
+	case SNDCTL_DSP_POST:
+		return 0;
+
+	case SNDCTL_DSP_SETFRAGMENT:
+		if (get_user(val, (int *)arg)) {
+			return -EFAULT;
+		}
+
+		printk("fsy alloc size1 ==%d\n",os->fragsize);
+		printk("fsy alloc size 2==%d\n",os->nbfrags);
+		printk("fsy alloc size1 ==%d\n",is->fragsize);
+		printk("fsy alloc size 2==%d\n",is->nbfrags);
+		if (rd) {
+			is->fragsize = 1 << (val & 0xFFFF);
+			if (is->fragsize < 1024) is->fragsize = 1024;
+			if (is->fragsize > 1024) is->fragsize = 1024;//fsy
+			is->nbfrags = (val >> 16) & 0xFFFF;
+			if (is->nbfrags < 12) is->nbfrags = 12;
+		}
+
+		if (wr) {
+			os->fragsize = 1 << (val & 0xFFFF);
+			if (os->fragsize < 1024) os->fragsize = 1024;
+			if (os->fragsize > 1024) os->fragsize = 1024;//fsy
+			os->nbfrags = (val >> 16) & 0xFFFF;
+			if (os->nbfrags < 12) os->nbfrags = 12;
+			if (os->nbfrags > 12) os->nbfrags = 12;
+//			if (os->num_channels) {
+//				//os->fragsize >>= 1;
+//				os->nbfrags >>= 2;
+//				if (os->nbfrags < 2) os->nbfrags = 2;
+//			}
+		}
+		printk("fsy alloc size1 ==%d\n",is->fragsize);
+		printk("fsy alloc size 2==%d\n",is->nbfrags);
+		printk("fsy alloc size 2==%d\n",os->nbfrags);
+		printk("fsy alloc size1 ==%d\n",os->fragsize);
+
+		return 0;
+
+	case SNDCTL_DSP_GETBLKSIZE:
+		if (file->f_mode & FMODE_WRITE)
+			return put_user(os->fragsize, (int *) arg);
+		else
+			return put_user(is->fragsize, (int *) arg);
+
+	case SNDCTL_DSP_NONBLOCK:
+		spin_lock(&file->f_lock);
+		file->f_flags |= O_NONBLOCK;
+		spin_unlock(&file->f_lock);
+		return 0;
+
+	case SOUND_PCM_READ_RATE:
+		return put_user((file->f_mode & FMODE_READ) ?
+				state->input_stream->sample_rate :
+				state->output_stream->sample_rate,
+				(int *)arg);
+
+	case SOUND_PCM_READ_CHANNELS:
+		if (file->f_mode & FMODE_READ)
+			return put_user(state->input_stream->num_channels, (int *)arg);
+		else
+			return put_user(state->output_stream->num_channels, (int *)arg);
+
+	case SOUND_PCM_READ_BITS:
+		if (file->f_mode & FMODE_READ)
+			return put_user(state->input_stream->sample_size, (int *)arg);
+		else
+			return put_user(state->output_stream->sample_size, (int *)arg);
+
+	case SOUND_PCM_WRITE_FILTER:
+	case SNDCTL_DSP_SETSYNCRO:
+	case SOUND_PCM_READ_FILTER:
+		return -EINVAL;
+	}
+
+	return 0;	//ls1x_ioctl_mixdev(file, cmd, arg);
+}
+
+
+int i2c_rec_haf_word(unsigned char *addr,int addrlen,unsigned char reg,unsigned short* buf ,int count)
+{
+        int i;
+        int j;
+        unsigned char value;
+        printk ("in %s !\n", __func__);
+        for(i=0;i<count;i++)
+        {
+                for(j=0;j<addrlen;j++)
+                {
+                        /*write slave_addr*/
+                        * GS_SOC_I2C_TXR = addr[j];
+                        * GS_SOC_I2C_CR  = (j == 0)? (CR_START|CR_WRITE):CR_WRITE; /* start on first addr */
+                        while(*GS_SOC_I2C_SR & SR_TIP);
+                        //                    printk ("device's address = 0x%x ,sr = 0x%x !\n", addr[j] ,*GS_SOC_I2C_SR);
+
+                        if((* GS_SOC_I2C_SR) & SR_NOACK) return -1;
+                }
+
+        //      printk ("------1---->\n");
+                * GS_SOC_I2C_TXR = reg++;   //lxy reg++ after read once
+                * GS_SOC_I2C_CR  = CR_WRITE;
+                while(*GS_SOC_I2C_SR & SR_TIP);
+                if((* GS_SOC_I2C_SR) & SR_NOACK) return -1;
+
+        //      printk ("------2---->\n");
+
+                /*write slave_addr*/
+                * GS_SOC_I2C_TXR = addr[0]|1;
+                * GS_SOC_I2C_CR  = CR_START|CR_WRITE; /* start on first addr */
+                while(*GS_SOC_I2C_SR & SR_TIP);
+
+                if((* GS_SOC_I2C_SR) & SR_NOACK) return -1;
+
+        //              printk ("------3---->\n");
+
+                * GS_SOC_I2C_CR  = CR_READ; /*read send ack*/
+                while(*GS_SOC_I2C_SR & SR_TIP);
+                value = * GS_SOC_I2C_TXR;
+                buf[i] =  value << 8;
+
+        //              printk ("------4---->\n");
+
+                * GS_SOC_I2C_CR  = CR_READ|I2C_WACK; /*last read not send ack*/
+                while(*GS_SOC_I2C_SR & SR_TIP);
+                value = * GS_SOC_I2C_TXR;
+                buf[i] |= value;
+
+                * GS_SOC_I2C_CR  = CR_STOP;
+                while(*GS_SOC_I2C_SR & SR_TIP);
+                //        * GS_SOC_I2C_SR;
+
+
+        }
+        while(*GS_SOC_I2C_SR & SR_BUSY);
+
+        return count;
+}
+
+
+
+unsigned char i2c_rec_b(unsigned char *addr,int addrlen,unsigned char reg,unsigned char* buf ,int count)
+{
+        int i;
+        int j;
+
+
+        unsigned char value;
+
+        for(j=0;j<addrlen;j++)
+        {
+                /*write slave_addr*/
+                * GS_SOC_I2C_TXR = addr[j];
+                * GS_SOC_I2C_CR  = j == 0? (CR_START|CR_WRITE):CR_WRITE; /* start on first addr */
+                while(*GS_SOC_I2C_SR & SR_TIP);
+
+                if((* GS_SOC_I2C_SR) & SR_NOACK) return i;
+        }
+
+
+        * GS_SOC_I2C_TXR = reg;
+        * GS_SOC_I2C_CR  = CR_WRITE;
+        while(*GS_SOC_I2C_SR & SR_TIP);
+        if((* GS_SOC_I2C_SR) & SR_NOACK) return i;
+
+        * GS_SOC_I2C_TXR = addr[0]|1;
+        * GS_SOC_I2C_CR  = CR_START|CR_WRITE;
+        if((* GS_SOC_I2C_SR) & SR_NOACK) return i;
+
+        for(i=0;i<count;i++)
+        {
+                * GS_SOC_I2C_CR  = CR_READ;
+                while(*GS_SOC_I2C_SR & SR_TIP);
+
+                buf[i] = * GS_SOC_I2C_TXR;
+        }
+        * GS_SOC_I2C_CR  = CR_STOP;
+
+        return count;
+}
+
+unsigned char i2c_rec_s(unsigned char *addr,int addrlen,unsigned char reg,unsigned char* buf ,int count)
+{
+        int i;
+        int j;
+        unsigned char value;
+        for(i=0;i<count;i++)
+        {
+                for(j=0;j<addrlen;j++)
+                {
+                        /*write slave_addr*/
+                        * GS_SOC_I2C_TXR = addr[j];
+                        * GS_SOC_I2C_CR  = (j == 0)? (CR_START|CR_WRITE):CR_WRITE; /* start on first addr */
+                        while(*GS_SOC_I2C_SR & SR_TIP);
+
+                        if((* GS_SOC_I2C_SR) & SR_NOACK) return i;
+                }
+
+                * GS_SOC_I2C_TXR = reg;
+                * GS_SOC_I2C_CR  = CR_WRITE;
+                while(*GS_SOC_I2C_SR & SR_TIP);
+                if((* GS_SOC_I2C_SR) & SR_NOACK) return i;
+
+                /*write slave_addr*/
+                * GS_SOC_I2C_TXR = addr[0]|1;
+                * GS_SOC_I2C_CR  = CR_START|CR_WRITE; /* start on first addr */
+                while(*GS_SOC_I2C_SR & SR_TIP);
+
+                if((* GS_SOC_I2C_SR) & SR_NOACK) return i;
+
+                * GS_SOC_I2C_CR  = CR_READ|I2C_WACK; /*last read not send ack*/
+                while(*GS_SOC_I2C_SR & SR_TIP);
+
+                buf[i] = * GS_SOC_I2C_TXR;
+                * GS_SOC_I2C_CR  = CR_STOP;
+                * GS_SOC_I2C_SR;
+
+        }
+        return count;
+}
+
+int tgt_i2cinit()
+{
+	*(volatile unsigned int *)(0xbfd010c0) = 0x0;
+	*(volatile unsigned int *)(0xbfd010c4) = 0x0;
+	*(volatile unsigned int *)(0xbfd010c8) = 0x0;
+
+	static int inited=0;
+	if(inited)
+		return 0;
+	inited=1;
+	* GS_SOC_I2C_PRER_LO = 0x64;
+	* GS_SOC_I2C_PRER_HI = 0;
+	* GS_SOC_I2C_CTR = 0x80;
+}
+
+/*
+ * 0 single: ÃƒÂ¿Â´ÃŽÂ¶Ã�Ã’Â»Â¸Ã¶
+ * 1 smb block
+ */
+int tgt_i2cread(int type,unsigned char *addr,int addrlen,unsigned char reg,unsigned char *buf,int count)
+{
+        int i;
+        tgt_i2cinit();
+        memset(buf,-1,count);
+        //printk ("in %s !\n", __func__);
+        switch(type)
+        {
+                case I2C_SINGLE:
+                        return i2c_rec_s(addr,addrlen,reg,buf,count);
+                        break;
+                case I2C_BLOCK:
+                        return i2c_rec_b(addr,addrlen,reg,buf,count);
+                        break;
+                case I2C_HW_SINGLE:
+                        return i2c_rec_haf_word(addr,addrlen,reg,(unsigned short *)buf,count);
+                        break;
+
+                default: return 0;break;
+        }
+        return 0;
+}
+
+unsigned char i2c_send_s(unsigned char *addr,int addrlen,unsigned char reg,unsigned char * buf ,int count)
+{
+        int i;
+        int j;
+        for(i=0;i<count;i++)
+        {
+                for(j=0;j<addrlen;j++)
+                {
+                        /*write slave_addr*/
+                        * GS_SOC_I2C_TXR = addr[j];
+                        * GS_SOC_I2C_CR  = j == 0? (CR_START|CR_WRITE):CR_WRITE; /* start on first addr */
+                        while(*GS_SOC_I2C_SR & SR_TIP);
+
+                        if((* GS_SOC_I2C_SR) & SR_NOACK) return i;
+                }
+
+                * GS_SOC_I2C_TXR = reg;
+                * GS_SOC_I2C_CR  = CR_WRITE;
+                while(*GS_SOC_I2C_SR & SR_TIP);
+                if((* GS_SOC_I2C_SR) & SR_NOACK) return i;
+
+                * GS_SOC_I2C_TXR = buf[i];
+                * GS_SOC_I2C_CR = CR_WRITE|CR_STOP;
+                while(*GS_SOC_I2C_SR & SR_TIP);
+
+                if((* GS_SOC_I2C_SR) & SR_NOACK) return i;
+        }
+        while(*GS_SOC_I2C_SR & SR_BUSY);
+        return count;
+}
+
+unsigned char i2c_send_b(unsigned char *addr,int addrlen,unsigned char reg,unsigned char * buf ,int count)
+{
+        int i;
+        int j;
+        for(j=0;j<addrlen;j++)
+        {
+                /*write slave_addr*/
+                * GS_SOC_I2C_TXR = addr[j];
+                * GS_SOC_I2C_CR  = j == 0? (CR_START|CR_WRITE):CR_WRITE; /* start on first addr */
+                while(*GS_SOC_I2C_SR & SR_TIP);
+
+                if((* GS_SOC_I2C_SR) & SR_NOACK) return i;
+        }
+
+
+        * GS_SOC_I2C_TXR = reg;
+        * GS_SOC_I2C_CR  = CR_WRITE;
+        while(*GS_SOC_I2C_SR & SR_TIP);
+        if((* GS_SOC_I2C_SR) & SR_NOACK) return i;
+
+        for(i=0;i<count;i++)
+        {
+                * GS_SOC_I2C_TXR = buf[i];
+                * GS_SOC_I2C_CR = CR_WRITE;
+                while(*GS_SOC_I2C_SR & SR_TIP);
+
+                if((* GS_SOC_I2C_SR) & SR_NOACK) return i;
+
+        }
+        * GS_SOC_I2C_CR  = CR_STOP;
+        while(*GS_SOC_I2C_SR & SR_BUSY);
+        return count;
+}
+
+int i2c_send_haf_word(unsigned char *addr,int addrlen,unsigned char reg,unsigned short * buf ,int count)
+{
+        int i;
+        int j;
+        unsigned char value;
+        for(i=0;i<count;i++)
+        {
+                for(j=0;j<addrlen;j++)
+                {
+                        /*write slave_addr*/
+                        * GS_SOC_I2C_TXR = addr[j];
+                        * GS_SOC_I2C_CR  = j == 0? (CR_START|CR_WRITE):CR_WRITE; /* start on first addr */
+                        while(*GS_SOC_I2C_SR & SR_TIP);
+
+                        if((* GS_SOC_I2C_SR) & SR_NOACK) return -1;
+                }
+
+                * GS_SOC_I2C_TXR = reg++;   //lxy: reg++ after write once
+                * GS_SOC_I2C_CR  = CR_WRITE;
+                while(*GS_SOC_I2C_SR & SR_TIP);
+                if((* GS_SOC_I2C_SR) & SR_NOACK) return -1;
+
+                value = (buf[i] >> 8);
+                * GS_SOC_I2C_TXR = value;
+                * GS_SOC_I2C_CR  = CR_WRITE;
+//                printk ("hi data = 0x%x ,", value);
+                while(*GS_SOC_I2C_SR & SR_TIP);
+                if((* GS_SOC_I2C_SR) & SR_NOACK) return -1;
+
+                value = buf[i];
+                * GS_SOC_I2C_TXR = value;
+                * GS_SOC_I2C_CR  = CR_WRITE;
+//                printk ("low data = 0x%x ,", value);
+                while(*GS_SOC_I2C_SR & SR_TIP);
+                if((* GS_SOC_I2C_SR) & SR_NOACK) return -1;
+
+                * GS_SOC_I2C_CR = CR_WRITE|CR_STOP;
+                while(*GS_SOC_I2C_SR & SR_TIP);
+        }
+        while(*GS_SOC_I2C_SR & SR_BUSY);
+        return count;
+}
+
+int tgt_i2cwrite(int type,unsigned char *addr,int addrlen,unsigned char reg,unsigned char *buf,int count)
+{
+        tgt_i2cinit();
+        switch(type&0xff)
+        {
+                case I2C_SINGLE:
+                    i2c_send_s(addr,addrlen,reg,buf,count);
+                    break;
+                case I2C_BLOCK:
+                    return i2c_send_b(addr,addrlen,reg,buf,count);
+                    break;
+                case I2C_SMB_BLOCK:
+                    break;
+                case I2C_HW_SINGLE:
+                        return i2c_send_haf_word(addr,addrlen,reg,(unsigned short *)buf,count);
+                        break;
+                default:
+                    return -1;break;
+        }
+        return -1;
+}
+
+void    uda1342_test()
+{
+        unsigned char *dev_add;
+        unsigned short data;
+        unsigned char reg;
+        int ret = 0;
+
+        dev_add = 0x8000bb90;
+        *dev_add = uda_address;
+        reg = 0x10;
+        unsigned short data1[7];
+        unsigned char i;
+
+        tgt_i2cinit();
+
+        tgt_i2cread(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&data), 1);
+        //printk ("data = 0x%x !\n", data);
+
+        data = 0xfc00;
+        ret = tgt_i2cwrite(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&data), 1);
+        //if (ret == -1)
+        //        printk ("write error......\n");
+
+        data = 0x0;
+        ret = tgt_i2cread(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&data), 1);
+        //if (ret == -1)
+        //        printk ("read error......\n");
+        //printk ("data = 0x%x !\n", data);
+
+        reg = 0x0;
+        ret = tgt_i2cwrite(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&reg1[0]), 1);
+        reg = 0x1;
+        ret = tgt_i2cwrite(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&reg1[1]), 1);
+        reg = 0x10;
+        ret = tgt_i2cwrite(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&reg1[2]), 1);
+        reg = 0x11;
+        ret = tgt_i2cwrite(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&reg1[3]), 1);
+        reg = 0x12;
+        ret = tgt_i2cwrite(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&reg1[4]), 1);
+        reg = 0x20;
+        ret = tgt_i2cwrite(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&reg1[5]), 1);
+        reg = 0x21;
+        ret = tgt_i2cwrite(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&reg1[6]), 1);
+
+        reg = 0x0;
+        ret = tgt_i2cread(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&data1[0]), 1);
+        reg = 0x1;
+        ret = tgt_i2cread(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&data1[1]), 1);
+        reg = 0x10;
+        ret = tgt_i2cread(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&data1[2]), 1);
+        reg = 0x11;
+        ret = tgt_i2cread(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&data1[3]), 1);
+        reg = 0x12;
+        ret = tgt_i2cread(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&data1[4]), 1);
+        reg = 0x20;
+        ret = tgt_i2cread(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&data1[5]), 1);
+        reg = 0x21;
+        ret = tgt_i2cread(I2C_HW_SINGLE, dev_add, 1, reg, (unsigned char *)(&data1[6]), 1);
+
+        for (i=0; i<7; i++)
+        {
+                printk ("data1[%d] = 0x%x ---> 0x%x!\n", i, data1[i], reg1[i]);
+        }
+}
+
+
+
+void    config_uda1342(struct file *file)
+{
+        unsigned char rat_cddiv;
+        unsigned char rat_bitdiv;
+        unsigned char dev_addr;
+        unsigned short value;
+#if 1
+        dev_addr = uda_dev_addr;
+        rat_bitdiv = 0x27;
+        rat_cddiv = 0x4;
+
+        * IISCONFIG = (16<<24) | (16<<16) | (rat_bitdiv<<8) | (rat_cddiv<<0) ;
+        //    * IISSTATE = 0xc220;
+        //* IISSTATE = 0xc200;
+	//printk("* IISSTATE is %x\n",* IISSTATE);
+	if ((file->f_mode & FMODE_WRITE)) {
+        	* IISSTATE = 0x0d280;	///0x0200;
+	}else{
+		* IISSTATE = 0x0e800;	///0x0200;
+	}
+        value =0x8000;
+#endif
+        uda1342_test();
+}
+
+static int ls1x_audio_sync(struct file *file)
+{
+        struct ls1x_audio_state *state = file->private_data;
+        struct audio_stream *is = state->input_stream;
+        struct audio_stream *os = state->output_stream;
+
+        if (file->f_mode & FMODE_READ) {
+                if (is->state == STOP && !list_empty(&is->run_list)) {
+                        struct audio_dma_desc *desc;
+                        desc = list_entry(is->run_list.next, struct audio_dma_desc, link);
+                        dma_enable_trans(is, desc);
+                        is->state = RUN;
+                }
+
+                if (!list_empty(&is->run_list))
+                        schedule_timeout(CONFIG_HZ*2);
+
+                /* stop write ac97 dma */
+                writel(0x12, order_addr_in);
+        }
+        if (file->f_mode & FMODE_WRITE) {
+                if (os->state == STOP && !list_empty(&os->run_list)) {
+                        struct audio_dma_desc *desc;
+                        desc = list_entry(os->run_list.next, struct audio_dma_desc, link);
+                        dma_enable_trans(os, desc);
+                        os->state = RUN;
+                }
+
+                if (!list_empty(&os->run_list))
+                        schedule_timeout(CONFIG_HZ*2);
+
+                /* stop read ac97 dma */
+                writel(0x11, order_addr_in);
+        }
+
+        return 0;
+}
+
+static int ls1x_audio_release(struct inode *inode, struct file *file)
+{
+        struct ls1x_audio_state *state = file->private_data;
+
+        down(&state->sem);
+
+        if (file->f_mode & FMODE_READ) {
+                ls1x_audio_sync(file);
+                audio_clear_buf(state->input_stream);
+                state->rd_ref = 0;
+                free_irq(LS1B_BOARD_DMA2_IRQ, state->input_stream);
+#ifdef CONFIG_SND_SB2F_TIMER
+                del_timer(&state->input_stream->timer);
+#endif 
+        }
+
+        if (file->f_mode & FMODE_WRITE) {
+                ls1x_audio_sync(file);
+                audio_clear_buf(state->output_stream);
+                state->wr_ref = 0;
+                free_irq(LS1B_BOARD_DMA1_IRQ, state->output_stream);
+#ifdef CONFIG_SND_SB2F_TIMER
+                del_timer(&state->output_stream->timer);
+#endif 
+        }
+
+        up(&state->sem);
+        return 0;
+}
+
+static int ls1x_audio_open(struct inode *inode, struct file *file)
+{
+	struct ls1x_audio_state *state = &ls1x_audio_state;
+	struct audio_stream *is = state->input_stream;
+	struct audio_stream *os = state->output_stream;
+	int minor = MINOR(inode->i_rdev);
+	int err;
+	u32 x, conf;
+
+	down(&state->sem);
+
+	/* access control */
+	err = -ENODEV;
+	if ((file->f_mode & FMODE_WRITE) && !os)
+		goto out;
+	if ((file->f_mode & FMODE_READ) && !is)
+		goto out;
+	err = -EBUSY;
+
+	if ((file->f_mode & FMODE_WRITE) && state->wr_ref)
+		goto out;
+	if ((file->f_mode & FMODE_READ) && state->rd_ref)
+		goto out;
+
+	file->private_data = state;
+
+	config_uda1342(file);
+
+	if ((file->f_mode & FMODE_WRITE)) {
+		state->wr_ref = 1;
+		os->fragsize = AUDIO_FRAGSIZE_DEFAULT;
+		os->nbfrags = PLAY_NBFRAGS;
+		os->output = 1;
+		os->num_channels = 2;
+		os->sample_size = 16;
+		if ((minor & 0xf) == SND_DEV_DSP16)
+			os->sample_size = 16;
+		init_waitqueue_head(&os->frag_wq);
+		os->ask_dma = NULL;
+		INIT_LIST_HEAD(&os->free_list);
+		INIT_LIST_HEAD(&os->run_list);
+		INIT_LIST_HEAD(&os->done_list);
+		INIT_LIST_HEAD(&os->all_list);
+		spin_lock_init(&os->lock);
+		request_irq(LS1B_BOARD_DMA1_IRQ, ac97_dma_write_intr, IRQF_SHARED,
+				"ac97dma-write", os);
+#ifdef CONFIG_SND_SB2F_TIMER
+		init_timer(&os->timer);
+		os->timer.data = (unsigned long)os;
+		os->timer.function = ls1x_audio_timeout;
+#endif
+	}
+
+	if (file->f_mode & FMODE_READ) {
+		state->rd_ref = 1;
+		is->fragsize = AUDIO_FRAGSIZE_DEFAULT;
+		is->nbfrags = REC_NBFRAGS;
+		is->output = 0;
+		is->num_channels = 2;
+		is->sample_size = 16;
+		if ((minor & 0xf) == SND_DEV_DSP16)
+			is->sample_size = 16;
+		init_waitqueue_head(&is->frag_wq);
+		is->ask_dma = NULL;
+		INIT_LIST_HEAD(&is->free_list);
+		INIT_LIST_HEAD(&is->run_list);
+		INIT_LIST_HEAD(&is->done_list);
+		INIT_LIST_HEAD(&is->all_list);
+		spin_lock_init(&is->lock);
+		request_irq(LS1B_BOARD_DMA2_IRQ, ac97_dma_read_intr, IRQF_SHARED,
+				"ac97dma-read", is);
+#ifdef CONFIG_SND_SB2F_TIMER
+		init_timer(&is->timer);
+		is->timer.data = (unsigned long)is;
+		is->timer.function = ls1x_audio_timeout;
+#endif
+	}
+
+	if (file->f_mode & FMODE_WRITE) {
+		x = readl(state->base + OCC0);
+		conf = x & ~(FIFO_THRES_MASK << FIFO_THRES_OFFSET) & ~(SS_MASK << SS_OFFSET);
+		if (state->no_vra)
+			conf = (conf | (2 << FIFO_THRES_OFFSET) | DMA_EN | CH_EN) & (~SR);
+		else
+			conf = conf | (2 << FIFO_THRES_OFFSET) | DMA_EN | CH_EN | SR;
+		if (os->sample_size == 16)
+			conf = conf | (2 << SS_OFFSET);
+		conf |= (conf << OCH1_CFG_R_OFFSET) | (conf << OCH0_CFG_L_OFFSET);
+		writel(conf, state->base + OCC0);
+	}
+	if (file->f_mode & FMODE_READ) {
+		x = readl(state->base + ICC);
+		conf = x & ~(FIFO_THRES_MASK << FIFO_THRES_OFFSET) & ~(SS_MASK << SS_OFFSET);
+		if (state->no_vra)
+			conf = (conf | (2 << FIFO_THRES_OFFSET) | DMA_EN | CH_EN) & (~SR);
+		else
+			conf = conf | (2 << FIFO_THRES_OFFSET) | DMA_EN | CH_EN | SR;
+		if (is->sample_size == 16)
+			conf = conf | (2 << SS_OFFSET);
+		conf |= (conf << ICH2_CFG_MIC_OFFSET) | (conf << ICH1_CFG_R_OFFSET) | (conf << ICH0_CFG_L_OFFSET);
+		writel(conf, state->base + ICC);
+	}
+
+	err = 0;
+
+out:
+	up(&state->sem);
+	printk("err is %d\n",err);
+	return err;
+}
+
+static long ls1x_ioctl_mixdev(struct file *file, unsigned int cmd, unsigned long arg)
+{
+        struct ls1x_audio_state *state = (struct ls1x_audio_state *)file->private_data;
+        struct ac97_codec *codec = state->codec;
+
+        return /* */0;
+}
+
+static int ls1x_open_mixdev(struct inode *inode, struct file *file)
+{
+        file->private_data = &ls1x_audio_state;
+        return 0;
+}
+
+static int ls1x_release_mixdev(struct inode *inode, struct file *file)
+{
+        return 0;
+}
+
+static struct file_operations ls1x_dsp_fops = {
+	owner:			THIS_MODULE,
+	read:			ls1x_audio_read,
+	write:			ls1x_audio_write,
+	unlocked_ioctl:	ls1x_audio_ioctl,
+	open:			ls1x_audio_open,
+	release:		ls1x_audio_release,
+};
+
+static struct file_operations ls1x_mixer_fops = {
+        .owner          = THIS_MODULE,
+        .unlocked_ioctl = ls1x_ioctl_mixdev,
+        .open           = ls1x_open_mixdev,
+        .release        = ls1x_release_mixdev,
+};
+
+static DEFINE_SEMAPHORE(ls1x_ac97_mutex);
+
+static int ls1x_audio_probe(struct platform_device *pdev)
+{
+	struct ls1x_audio_state *state = &ls1x_audio_state;
+	struct resource *res;
+	int rc;
+
+	order_addr_in = ioremap(ORDER_ADDR_IN, 0x4);
+	memset(state, 0, sizeof(struct ls1x_audio_state));
+
+	state->input_stream = &input_stream;
+	state->output_stream = &output_stream;
+	sema_init(&state->sem, 1);
+
+	res =  platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!res) {
+		dev_err(&pdev->dev, "cannot find IO resource\n");
+		return -ENOENT;
+	}
+
+	if (!request_mem_region(res->start, resource_size(res), "ls1x-audio")){
+		printk("request mem error\n");
+		return -EBUSY;
+	}
+
+	state->base = ioremap(res->start, resource_size(res));
+	if (!state->base) {
+		dev_err(&pdev->dev, "ls1x-audio - failed to map controller\n");
+		printk("error iomap\n");
+		rc = -ENOMEM;
+		goto err_dev0;
+	}
+
+	if ((state->dev_audio = register_sound_dsp(&ls1x_dsp_fops, -1)) < 0){
+		printk("error!\n");
+		goto err_dev1;
+	}
+	if ((state->dev_mixer = register_sound_mixer(&ls1x_mixer_fops, -1)) < 0){
+		printk("error !\n");
+		goto err_dev1;		
+	}
+
+	printk("register mixer success\n");
+	printk("register dsp success\n");
+	printk("SOUND_MIXER_WRITE_VOLUME is %x\n",SOUND_MIXER_WRITE_VOLUME);
+	return 0;
+
+err_dev3:
+	unregister_sound_mixer(state->codec->dev_mixer);
+err_dev2:
+	unregister_sound_dsp(state->dev_audio);
+err_dev1:
+	iounmap(state->base);
+	release_mem_region(res->start, resource_size(res));
+err_dev0:
+	///ac97_release_codec(state->codec);
+
+	return rc;
+}
+
+static int __devexit ls1x_audio_remove(struct platform_device *pdev)
+{
+	struct ls1x_audio_state *state = &ls1x_audio_state;
+	struct resource *res;
+
+	unregister_sound_dsp(state->dev_audio);
+	unregister_sound_mixer(state->codec->dev_mixer);
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	iounmap(state->base);
+	release_mem_region(res->start, resource_size(res));
+
+	///ac97_release_codec(state->codec);
+
+	return 0;
+}
+
+#ifdef CONFIG_PM
+static int ls1x_audio_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	return 0;
+}
+
+static int ls1x_audio_resume(struct platform_device *pdev)
+{
+	return 0;
+}
+#else
+#define ls1x_audio_suspend NULL
+#define ls1x_audio_resume NULL
+#endif
+
+static struct platform_driver ls1x_audio_driver = {
+	.driver = {
+		.name	= "ls1x-audio",
+		.owner	= THIS_MODULE,
+	},
+	.probe		= ls1x_audio_probe,
+	.remove		= ls1x_audio_remove,
+	.suspend	= ls1x_audio_suspend,
+	.resume		= ls1x_audio_resume,
+};
+
+static int __init ls1x_audio_init(void)
+{
+	int ret = 0;
+
+	ret = platform_driver_register(&ls1x_audio_driver);
+	if (ret)
+		printk(KERN_ERR "failed to register ls1x-audio\n");
+	return ret;
+}
+
+static void __exit ls1x_audio_exit(void)
+{
+    platform_driver_unregister(&ls1x_audio_driver);
+}
+
+module_init(ls1x_audio_init);
+module_exit(ls1x_audio_exit);
+
+#ifndef MODULE
+
+static int __init
+ls1x_setup(char *options)
+{
+	char           *this_opt;
+
+	if (!options || !*options)
+		return 0;
+
+	while ((this_opt = strsep(&options, ","))) {
+		if (!*this_opt)
+			continue;
+		if (!strncmp(this_opt, "vra", 3)) {
+			vra = 1;
+		}
+	}
+
+	return 1;
+}
+
+__setup("ls1x_audio=", ls1x_setup);
+
+#endif /* MODULE */
+
+MODULE_LICENSE("GPL");
+
diff -uNra linux-3.0.82/sound/oss/.ls1x_uda1342.c.swp linux-3.0.82x/sound/oss/.ls1x_uda1342.c.swp
\ æ–‡ä»¶å°¾æ²¡æœ‰æ�¢è¡Œç¬¦
diff -uNra linux-3.0.82/sound/oss/Makefile linux-3.0.82x/sound/oss/Makefile
--- linux-3.0.82/sound/oss/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/sound/oss/Makefile	2017-09-23 03:42:50.382673950 +0800
@@ -26,6 +26,8 @@
 obj-$(CONFIG_SOUND_MSNDPIN)	+= msnd.o msnd_pinnacle.o
 obj-$(CONFIG_SOUND_VWSND)	+= vwsnd.o
 obj-$(CONFIG_SOUND_BCM_CS4297A)	+= swarm_cs4297a.o
+obj-$(CONFIG_SOUND_LS1X_UDA1342)	+= ls1x_uda1342.o ac97_codec.o #iis 1342 used
+obj-$(CONFIG_SOUND_LS1X_AC97)	+= ls1x_i2s.o ac97_codec.o  #/* read ac97 codec used */
 
 obj-$(CONFIG_DMASOUND)		+= dmasound/
 
diff -uNra linux-3.0.82/sound/oss/mixer.c linux-3.0.82x/sound/oss/mixer.c
--- linux-3.0.82/sound/oss/mixer.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/sound/oss/mixer.c	2017-09-23 03:42:50.382673950 +0800
@@ -0,0 +1,91 @@
+#include <unistd.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <sys/ioctl.h>
+#include <fcntl.h>
+#include <linux/soundcard.h>
+
+static void print_help()
+{
+  printf("usageï¼šplz input the control num:\n");
+  printf("0 adjust volume\n");
+  printf("1 record source selcet\n");
+  printf("2 mute or not\n");
+  printf("3 adjust pcm out\n");
+  printf("input mixer options:");
+}
+
+int main(int argc, char *argv[])
+{
+  int fd;
+  int left, right, level, mute;
+  int device;
+  char *dev;
+  int status;
+  int i;
+  fd = open("/dev/mixer", O_RDWR);
+  if (fd == -1)
+  {
+    perror("unable to open /dev/mixer");
+    exit(1);
+  }
+  
+  print_help();  
+  scanf("%d\n", &i);
+
+  switch(i) {
+    case 0:
+      printf("front master left volume:");//éŸ³é‡�è°ƒèŠ‚å€¼èŒƒå›´ä¸º0~31
+      scanf("%d", &left);
+      printf("front master right volume:");
+      scanf("%d", &right);
+      level = (left << 8) + right;
+    
+      status = ioctl(fd, MIXER_WRITE(SOUND_MIXER_VOLUME), &level);
+      if (status == -1)
+      {
+        perror("MIXER_WRITE ioctl failed\n");
+      }
+      break;
+    case 1:
+//		level = SOUND_MASK_MIC;
+		level = SOUND_MASK_LINE;
+//		level = SOUND_MASK_LINE1;
+
+      status = ioctl(fd, SOUND_MIXER_WRITE_RECSRC, (unsigned long) &level);
+      if (status == -1)
+      {
+	perror("MIXER_WRITE ioctl failed\n");
+      }
+      break;
+    case 2:
+      printf("mute or not:");//1 - é�™éŸ³ 0 - å�–æ¶ˆé�™éŸ³
+      scanf("%d", &mute); 
+      mute = mute << 15;
+
+      status = ioctl(fd, MIXER_WRITE(SOUND_MIXER_MUTE), &mute);
+      if (status == -1)
+      {
+	perror("MIXER_WRITE ioctl failed\n");
+      }
+      break;
+    case 3:
+      printf("pcm out left volume:");//pcm out çš„éŸ³é‡�è°ƒèŠ‚å€¼èŒƒå›´ä¸º0~31
+      scanf("%d", &left);
+      printf("pcm out right volume:");
+      scanf("%d", &right);
+      level = (left << 8) + right;
+    
+      status = ioctl(fd, MIXER_WRITE(SOUND_MIXER_PCM), &level);
+      if (status == -1)
+      {
+        perror("MIXER_WRITE ioctl failed\n");
+      }
+      break;
+    default:
+      break;
+  }
+
+  close(fd);
+  return 0;
+}
diff -uNra linux-3.0.82/sound/soc/codecs/ac97.c linux-3.0.82x/sound/soc/codecs/ac97.c
--- linux-3.0.82/sound/soc/codecs/ac97.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/sound/soc/codecs/ac97.c	2017-09-23 03:42:50.382673950 +0800
@@ -22,6 +22,9 @@
 #include <sound/initval.h>
 #include <sound/soc.h>
 
+struct snd_ac97_bus_ops soc_ac97_ops = {
+};
+
 static int ac97_prepare(struct snd_pcm_substream *substream,
 			struct snd_soc_dai *dai)
 {
diff -uNra linux-3.0.82/sound/soc/codecs/uda134x.c linux-3.0.82x/sound/soc/codecs/uda134x.c
--- linux-3.0.82/sound/soc/codecs/uda134x.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/sound/soc/codecs/uda134x.c	2017-09-23 03:42:50.386673939 +0800
@@ -27,17 +27,23 @@
 #include "uda134x.h"
 
 
-#define UDA134X_RATES SNDRV_PCM_RATE_8000_48000
-#define UDA134X_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \
-		SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S20_3LE)
-
-struct uda134x_priv {
-	int sysclk;
-	int dai_fmt;
+#define UDA134X_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
+                SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 |\
+                SNDRV_PCM_RATE_48000)
+
+#define UDA134X_FORMATS (SNDRV_PCM_FMTBIT_S8 |\
+                               SNDRV_PCM_FMTBIT_S16_LE |\
+                               SNDRV_PCM_FMTBIT_S16_BE |\
+                               SNDRV_PCM_FMTBIT_S20_3LE |\
+                               SNDRV_PCM_FMTBIT_S20_3BE |\
+                               SNDRV_PCM_FMTBIT_S24_3LE |\
+                               SNDRV_PCM_FMTBIT_S24_3BE |\
+                               SNDRV_PCM_FMTBIT_S32_LE |\
+			       SNDRV_PCM_FMTBIT_U16_LE	|\
+                               SNDRV_PCM_FMTBIT_S32_BE)
 
-	struct snd_pcm_substream *master_substream;
-	struct snd_pcm_substream *slave_substream;
-};
+extern int ls1a_i2c_write ( unsigned char reg, unsigned short val);
+extern unsigned short ls1a_i2c_read (unsigned short reg);
 
 /* In-data addresses are hard-coded into the reg-cache values */
 static const char uda134x_reg[UDA134X_REGS_NUM] = {
@@ -53,420 +59,41 @@
 static inline unsigned int uda134x_read_reg_cache(struct snd_soc_codec *codec,
 	unsigned int reg)
 {
-	u8 *cache = codec->reg_cache;
-
+	u8 *cache = (u8 *)uda134x_reg;
 	if (reg >= UDA134X_REGS_NUM)
 		return -1;
 	return cache[reg];
 }
 
-/*
- * Write the register cache
- */
-static inline void uda134x_write_reg_cache(struct snd_soc_codec *codec,
-	u8 reg, unsigned int value)
-{
-	u8 *cache = codec->reg_cache;
-
-	if (reg >= UDA134X_REGS_NUM)
-		return;
-	cache[reg] = value;
-}
 
 /*
- * Write to the uda134x registers
- *
+ * The codec has no support for reading its registers except for peak level...
  */
-static int uda134x_write(struct snd_soc_codec *codec, unsigned int reg,
-	unsigned int value)
-{
-	int ret;
-	u8 addr;
-	u8 data = value;
-	struct uda134x_platform_data *pd = codec->control_data;
-
-	pr_debug("%s reg: %02X, value:%02X\n", __func__, reg, value);
-
-	if (reg >= UDA134X_REGS_NUM) {
-		printk(KERN_ERR "%s unknown register: reg: %u",
-		       __func__, reg);
-		return -EINVAL;
-	}
-
-	uda134x_write_reg_cache(codec, reg, value);
-
-	switch (reg) {
-	case UDA134X_STATUS0:
-	case UDA134X_STATUS1:
-		addr = UDA134X_STATUS_ADDR;
-		break;
-	case UDA134X_DATA000:
-	case UDA134X_DATA001:
-	case UDA134X_DATA010:
-	case UDA134X_DATA011:
-		addr = UDA134X_DATA0_ADDR;
-		break;
-	case UDA134X_DATA1:
-		addr = UDA134X_DATA1_ADDR;
-		break;
-	default:
-		/* It's an extended address register */
-		addr =  (reg | UDA134X_EXTADDR_PREFIX);
-
-		ret = l3_write(&pd->l3,
-			       UDA134X_DATA0_ADDR, &addr, 1);
-		if (ret != 1)
-			return -EIO;
-
-		addr = UDA134X_DATA0_ADDR;
-		data = (value | UDA134X_EXTDATA_PREFIX);
-		break;
-	}
-
-	ret = l3_write(&pd->l3,
-		       addr, &data, 1);
-	if (ret != 1)
-		return -EIO;
-
-	return 0;
-}
-
-static inline void uda134x_reset(struct snd_soc_codec *codec)
-{
-	u8 reset_reg = uda134x_read_reg_cache(codec, UDA134X_STATUS0);
-	uda134x_write(codec, UDA134X_STATUS0, reset_reg | (1<<6));
-	msleep(1);
-	uda134x_write(codec, UDA134X_STATUS0, reset_reg & ~(1<<6));
-}
-
-static int uda134x_mute(struct snd_soc_dai *dai, int mute)
-{
-	struct snd_soc_codec *codec = dai->codec;
-	u8 mute_reg = uda134x_read_reg_cache(codec, UDA134X_DATA010);
-
-	pr_debug("%s mute: %d\n", __func__, mute);
-
-	if (mute)
-		mute_reg |= (1<<2);
-	else
-		mute_reg &= ~(1<<2);
-
-	uda134x_write(codec, UDA134X_DATA010, mute_reg);
-
-	return 0;
-}
-
-static int uda134x_startup(struct snd_pcm_substream *substream,
-	struct snd_soc_dai *dai)
-{
-	struct snd_soc_pcm_runtime *rtd = substream->private_data;
-	struct snd_soc_codec *codec =rtd->codec;
-	struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
-	struct snd_pcm_runtime *master_runtime;
-
-	if (uda134x->master_substream) {
-		master_runtime = uda134x->master_substream->runtime;
-
-		pr_debug("%s constraining to %d bits at %d\n", __func__,
-			 master_runtime->sample_bits,
-			 master_runtime->rate);
-
-		snd_pcm_hw_constraint_minmax(substream->runtime,
-					     SNDRV_PCM_HW_PARAM_RATE,
-					     master_runtime->rate,
-					     master_runtime->rate);
-
-		snd_pcm_hw_constraint_minmax(substream->runtime,
-					     SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
-					     master_runtime->sample_bits,
-					     master_runtime->sample_bits);
-
-		uda134x->slave_substream = substream;
-	} else
-		uda134x->master_substream = substream;
-
-	return 0;
-}
-
-static void uda134x_shutdown(struct snd_pcm_substream *substream,
-	struct snd_soc_dai *dai)
-{
-	struct snd_soc_pcm_runtime *rtd = substream->private_data;
-	struct snd_soc_codec *codec = rtd->codec;
-	struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
-
-	if (uda134x->master_substream == substream)
-		uda134x->master_substream = uda134x->slave_substream;
-
-	uda134x->slave_substream = NULL;
-}
-
-static int uda134x_hw_params(struct snd_pcm_substream *substream,
-	struct snd_pcm_hw_params *params,
-	struct snd_soc_dai *dai)
-{
-	struct snd_soc_pcm_runtime *rtd = substream->private_data;
-	struct snd_soc_codec *codec = rtd->codec;
-	struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
-	u8 hw_params;
-
-	if (substream == uda134x->slave_substream) {
-		pr_debug("%s ignoring hw_params for slave substream\n",
-			 __func__);
-		return 0;
-	}
-
-	hw_params = uda134x_read_reg_cache(codec, UDA134X_STATUS0);
-	hw_params &= STATUS0_SYSCLK_MASK;
-	hw_params &= STATUS0_DAIFMT_MASK;
-
-	pr_debug("%s sysclk: %d, rate:%d\n", __func__,
-		 uda134x->sysclk, params_rate(params));
-
-	/* set SYSCLK / fs ratio */
-	switch (uda134x->sysclk / params_rate(params)) {
-	case 512:
-		break;
-	case 384:
-		hw_params |= (1<<4);
-		break;
-	case 256:
-		hw_params |= (1<<5);
-		break;
-	default:
-		printk(KERN_ERR "%s unsupported fs\n", __func__);
-		return -EINVAL;
-	}
-
-	pr_debug("%s dai_fmt: %d, params_format:%d\n", __func__,
-		 uda134x->dai_fmt, params_format(params));
-
-	/* set DAI format and word length */
-	switch (uda134x->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
-	case SND_SOC_DAIFMT_I2S:
-		break;
-	case SND_SOC_DAIFMT_RIGHT_J:
-		switch (params_format(params)) {
-		case SNDRV_PCM_FORMAT_S16_LE:
-			hw_params |= (1<<1);
-			break;
-		case SNDRV_PCM_FORMAT_S18_3LE:
-			hw_params |= (1<<2);
-			break;
-		case SNDRV_PCM_FORMAT_S20_3LE:
-			hw_params |= ((1<<2) | (1<<1));
-			break;
-		default:
-			printk(KERN_ERR "%s unsupported format (right)\n",
-			       __func__);
-			return -EINVAL;
-		}
-		break;
-	case SND_SOC_DAIFMT_LEFT_J:
-		hw_params |= (1<<3);
-		break;
-	default:
-		printk(KERN_ERR "%s unsupported format\n", __func__);
-		return -EINVAL;
-	}
-
-	uda134x_write(codec, UDA134X_STATUS0, hw_params);
-
-	return 0;
-}
-
-static int uda134x_set_dai_sysclk(struct snd_soc_dai *codec_dai,
-				  int clk_id, unsigned int freq, int dir)
+/*
+	FIXME
+	i2c read unsigned short;but uda134x_read int.   
+*/
+static inline unsigned int uda134x_read(struct snd_soc_codec *codec,
+	unsigned int reg)
 {
-	struct snd_soc_codec *codec = codec_dai->codec;
-	struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
-
-	pr_debug("%s clk_id: %d, freq: %u, dir: %d\n", __func__,
-		 clk_id, freq, dir);
-
-	/* Anything between 256fs*8Khz and 512fs*48Khz should be acceptable
-	   because the codec is slave. Of course limitations of the clock
-	   master (the IIS controller) apply.
-	   We'll error out on set_hw_params if it's not OK */
-	if ((freq >= (256 * 8000)) && (freq <= (512 * 48000))) {
-		uda134x->sysclk = freq;
-		return 0;
-	}
-
-	printk(KERN_ERR "%s unsupported sysclk\n", __func__);
-	return -EINVAL;
+	return 	ls1a_i2c_read(reg );
 }
 
-static int uda134x_set_dai_fmt(struct snd_soc_dai *codec_dai,
-			       unsigned int fmt)
-{
-	struct snd_soc_codec *codec = codec_dai->codec;
-	struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
-
-	pr_debug("%s fmt: %08X\n", __func__, fmt);
-
-	/* codec supports only full slave mode */
-	if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS) {
-		printk(KERN_ERR "%s unsupported slave mode\n", __func__);
-		return -EINVAL;
-	}
-
-	/* no support for clock inversion */
-	if ((fmt & SND_SOC_DAIFMT_INV_MASK) != SND_SOC_DAIFMT_NB_NF) {
-		printk(KERN_ERR "%s unsupported clock inversion\n", __func__);
-		return -EINVAL;
-	}
-
-	/* We can't setup DAI format here as it depends on the word bit num */
-	/* so let's just store the value for later */
-	uda134x->dai_fmt = fmt;
-
-	return 0;
-}
 
-static int uda134x_set_bias_level(struct snd_soc_codec *codec,
-				  enum snd_soc_bias_level level)
+/* * Write to the uda134x registers */
+static int uda134x_write(struct snd_soc_codec *codec, unsigned int reg, unsigned int value)
 {
-	u8 reg;
-	struct uda134x_platform_data *pd = codec->control_data;
-	int i;
-	u8 *cache = codec->reg_cache;
-
-	pr_debug("%s bias level %d\n", __func__, level);
-
-	switch (level) {
-	case SND_SOC_BIAS_ON:
-		/* ADC, DAC on */
-		switch (pd->model) {
-		case UDA134X_UDA1340:
-		case UDA134X_UDA1344:
-		case UDA134X_UDA1345:
-			reg = uda134x_read_reg_cache(codec, UDA134X_DATA011);
-			uda134x_write(codec, UDA134X_DATA011, reg | 0x03);
-			break;
-		case UDA134X_UDA1341:
-			reg = uda134x_read_reg_cache(codec, UDA134X_STATUS1);
-			uda134x_write(codec, UDA134X_STATUS1, reg | 0x03);
-			break;
-		default:
-			printk(KERN_ERR "UDA134X SoC codec: "
-			       "unsupported model %d\n", pd->model);
-			return -EINVAL;
-		}
-		break;
-	case SND_SOC_BIAS_PREPARE:
-		/* power on */
-		if (pd->power) {
-			pd->power(1);
-			/* Sync reg_cache with the hardware */
-			for (i = 0; i < ARRAY_SIZE(uda134x_reg); i++)
-				codec->driver->write(codec, i, *cache++);
-		}
-		break;
-	case SND_SOC_BIAS_STANDBY:
-		/* ADC, DAC power off */
-		switch (pd->model) {
-		case UDA134X_UDA1340:
-		case UDA134X_UDA1344:
-		case UDA134X_UDA1345:
-			reg = uda134x_read_reg_cache(codec, UDA134X_DATA011);
-			uda134x_write(codec, UDA134X_DATA011, reg & ~(0x03));
-			break;
-		case UDA134X_UDA1341:
-			reg = uda134x_read_reg_cache(codec, UDA134X_STATUS1);
-			uda134x_write(codec, UDA134X_STATUS1, reg & ~(0x03));
-			break;
-		default:
-			printk(KERN_ERR "UDA134X SoC codec: "
-			       "unsupported model %d\n", pd->model);
-			return -EINVAL;
-		}
-		break;
-	case SND_SOC_BIAS_OFF:
-		/* power off */
-		if (pd->power)
-			pd->power(0);
-		break;
-	}
-	codec->dapm.bias_level = level;
+	ls1a_i2c_write(reg, value);
 	return 0;
 }
 
-static const char *uda134x_dsp_setting[] = {"Flat", "Minimum1",
-					    "Minimum2", "Maximum"};
-static const char *uda134x_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
-static const char *uda134x_mixmode[] = {"Differential", "Analog1",
-					"Analog2", "Both"};
-
-static const struct soc_enum uda134x_mixer_enum[] = {
-SOC_ENUM_SINGLE(UDA134X_DATA010, 0, 0x04, uda134x_dsp_setting),
-SOC_ENUM_SINGLE(UDA134X_DATA010, 3, 0x04, uda134x_deemph),
-SOC_ENUM_SINGLE(UDA134X_EA010, 0, 0x04, uda134x_mixmode),
-};
-
-static const struct snd_kcontrol_new uda1341_snd_controls[] = {
-SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
-SOC_SINGLE("Capture Volume", UDA134X_EA010, 2, 0x07, 0),
-SOC_SINGLE("Analog1 Volume", UDA134X_EA000, 0, 0x1F, 1),
-SOC_SINGLE("Analog2 Volume", UDA134X_EA001, 0, 0x1F, 1),
-
-SOC_SINGLE("Mic Sensitivity", UDA134X_EA010, 2, 7, 0),
-SOC_SINGLE("Mic Volume", UDA134X_EA101, 0, 0x1F, 0),
-
-SOC_SINGLE("Tone Control - Bass", UDA134X_DATA001, 2, 0xF, 0),
-SOC_SINGLE("Tone Control - Treble", UDA134X_DATA001, 0, 3, 0),
-
-SOC_ENUM("Sound Processing Filter", uda134x_mixer_enum[0]),
-SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
-SOC_ENUM("Input Mux", uda134x_mixer_enum[2]),
-
-SOC_SINGLE("AGC Switch", UDA134X_EA100, 4, 1, 0),
-SOC_SINGLE("AGC Target Volume", UDA134X_EA110, 0, 0x03, 1),
-SOC_SINGLE("AGC Timing", UDA134X_EA110, 2, 0x07, 0),
-
-SOC_SINGLE("DAC +6dB Switch", UDA134X_STATUS1, 6, 1, 0),
-SOC_SINGLE("ADC +6dB Switch", UDA134X_STATUS1, 5, 1, 0),
-SOC_SINGLE("ADC Polarity Switch", UDA134X_STATUS1, 4, 1, 0),
-SOC_SINGLE("DAC Polarity Switch", UDA134X_STATUS1, 3, 1, 0),
-SOC_SINGLE("Double Speed Playback Switch", UDA134X_STATUS1, 2, 1, 0),
-SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
-};
-
-static const struct snd_kcontrol_new uda1340_snd_controls[] = {
-SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
-
-SOC_SINGLE("Tone Control - Bass", UDA134X_DATA001, 2, 0xF, 0),
-SOC_SINGLE("Tone Control - Treble", UDA134X_DATA001, 0, 3, 0),
-
-SOC_ENUM("Sound Processing Filter", uda134x_mixer_enum[0]),
-SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
-
-SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
-};
-
-static const struct snd_kcontrol_new uda1345_snd_controls[] = {
-SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
-
-SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
-
-SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
-};
-
-static struct snd_soc_dai_ops uda134x_dai_ops = {
-	.startup	= uda134x_startup,
-	.shutdown	= uda134x_shutdown,
-	.hw_params	= uda134x_hw_params,
-	.digital_mute	= uda134x_mute,
-	.set_sysclk	= uda134x_set_dai_sysclk,
-	.set_fmt	= uda134x_set_dai_fmt,
-};
-
 static struct snd_soc_dai_driver uda134x_dai = {
 	.name = "uda134x-hifi",
+	//.ac97_control = 1,		//è¿™ä¸ªä»£è¡¨ç�€ ac97 è®¾å¤‡æœ‰platform data 
 	/* playback capabilities */
 	.playback = {
 		.stream_name = "Playback",
-		.channels_min = 1,
+		.channels_min = 2,
 		.channels_max = 2,
 		.rates = UDA134X_RATES,
 		.formats = UDA134X_FORMATS,
@@ -474,155 +101,61 @@
 	/* capture capabilities */
 	.capture = {
 		.stream_name = "Capture",
-		.channels_min = 1,
+		.channels_min = 2,
 		.channels_max = 2,
 		.rates = UDA134X_RATES,
 		.formats = UDA134X_FORMATS,
 	},
-	/* pcm operations */
-	.ops = &uda134x_dai_ops,
 };
 
-static int uda134x_soc_probe(struct snd_soc_codec *codec)
-{
-	struct uda134x_priv *uda134x;
-	struct uda134x_platform_data *pd = codec->card->dev->platform_data;
-
-	int ret;
-
-	printk(KERN_INFO "UDA134X SoC Audio Codec\n");
-
-	if (!pd) {
-		printk(KERN_ERR "UDA134X SoC codec: "
-		       "missing L3 bitbang function\n");
-		return -ENODEV;
-	}
-
-	switch (pd->model) {
-	case UDA134X_UDA1340:
-	case UDA134X_UDA1341:
-	case UDA134X_UDA1344:
-	case UDA134X_UDA1345:
-		break;
-	default:
-		printk(KERN_ERR "UDA134X SoC codec: "
-		       "unsupported model %d\n",
-			pd->model);
-		return -EINVAL;
-	}
-
-	uda134x = kzalloc(sizeof(struct uda134x_priv), GFP_KERNEL);
-	if (uda134x == NULL)
-		return -ENOMEM;
-	snd_soc_codec_set_drvdata(codec, uda134x);
-
-	codec->control_data = pd;
-
-	if (pd->power)
-		pd->power(1);
-
-	uda134x_reset(codec);
-
-	if (pd->is_powered_on_standby)
-		uda134x_set_bias_level(codec, SND_SOC_BIAS_ON);
-	else
-		uda134x_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
-
-	switch (pd->model) {
-	case UDA134X_UDA1340:
-	case UDA134X_UDA1344:
-		ret = snd_soc_add_controls(codec, uda1340_snd_controls,
-					ARRAY_SIZE(uda1340_snd_controls));
-	break;
-	case UDA134X_UDA1341:
-		ret = snd_soc_add_controls(codec, uda1341_snd_controls,
-					ARRAY_SIZE(uda1341_snd_controls));
-	break;
-	case UDA134X_UDA1345:
-		ret = snd_soc_add_controls(codec, uda1345_snd_controls,
-					ARRAY_SIZE(uda1345_snd_controls));
-	break;
-	default:
-		printk(KERN_ERR "%s unknown codec type: %d",
-			__func__, pd->model);
-		kfree(uda134x);
-		return -EINVAL;
-	}
-
-	if (ret < 0) {
-		printk(KERN_ERR "UDA134X: failed to register controls\n");
-		kfree(uda134x);
-		return ret;
-	}
-
-	return 0;
-}
-
-/* power down chip */
-static int uda134x_soc_remove(struct snd_soc_codec *codec)
+static inline void uda134x_reset(struct snd_soc_codec *codec)
 {
-	struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
-
-	uda134x_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
-	uda134x_set_bias_level(codec, SND_SOC_BIAS_OFF);
-
-	kfree(uda134x);
-	return 0;
+	u8 reset_reg = uda134x_read_reg_cache(codec, UDA134X_STATUS0);
+	uda134x_write(codec, UDA134X_STATUS0, reset_reg | (1<<6));
+	msleep(1);
+	uda134x_write(codec, UDA134X_STATUS0, reset_reg & ~(1<<6));
 }
 
-#if defined(CONFIG_PM)
-static int uda134x_soc_suspend(struct snd_soc_codec *codec,
-						pm_message_t state)
+static int uda134x_soc_probe(struct snd_soc_codec *codec)
 {
-	uda134x_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
-	uda134x_set_bias_level(codec, SND_SOC_BIAS_OFF);
-	return 0;
-}
+	u8 reg;
+	struct snd_ac97_bus *ac97_bus;
+	struct snd_ac97_template ac97_template;
+	int ret;
+	
+	uda134x_reset(codec);
+	reg = uda134x_read_reg_cache(codec, UDA134X_STATUS1);
+	uda134x_write(codec, UDA134X_STATUS1, reg | 0x03);
 
-static int uda134x_soc_resume(struct snd_soc_codec *codec)
-{
-	uda134x_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
-	uda134x_set_bias_level(codec, SND_SOC_BIAS_ON);
 	return 0;
 }
-#else
-#define uda134x_soc_suspend NULL
-#define uda134x_soc_resume NULL
-#endif /* CONFIG_PM */
 
 static struct snd_soc_codec_driver soc_codec_dev_uda134x = {
-	.probe =        uda134x_soc_probe,
-	.remove =       uda134x_soc_remove,
-	.suspend =      uda134x_soc_suspend,
-	.resume =       uda134x_soc_resume,
-	.reg_cache_size = sizeof(uda134x_reg),
-	.reg_word_size = sizeof(u8),
-	.reg_cache_default = uda134x_reg,
-	.reg_cache_step = 1,
-	.read = uda134x_read_reg_cache,
+	.probe = uda134x_soc_probe,
+	.read = uda134x_read,
 	.write = uda134x_write,
-	.set_bias_level = uda134x_set_bias_level,
 };
 
-static int __devinit uda134x_codec_probe(struct platform_device *pdev)
-{
-	return snd_soc_register_codec(&pdev->dev,
-			&soc_codec_dev_uda134x, &uda134x_dai, 1);
-}
-
 static int __devexit uda134x_codec_remove(struct platform_device *pdev)
 {
 	snd_soc_unregister_codec(&pdev->dev);
 	return 0;
 }
 
+
+static int __devinit uda134x_codec_probe(struct platform_device *pdev)
+{
+        return snd_soc_register_codec(&pdev->dev,
+                        &soc_codec_dev_uda134x, &uda134x_dai, 1);
+}
+
 static struct platform_driver uda134x_codec_driver = {
-	.driver = {
-		.name = "uda134x-codec",
-		.owner = THIS_MODULE,
-	},
-	.probe = uda134x_codec_probe,
-	.remove = __devexit_p(uda134x_codec_remove),
+        .driver = {
+                .name = "uda134x-codec",
+                .owner = THIS_MODULE,
+        },
+        .probe = uda134x_codec_probe,
+        .remove = __devexit_p(uda134x_codec_remove),
 };
 
 static int __init uda134x_codec_init(void)
diff -uNra linux-3.0.82/sound/soc/Kconfig linux-3.0.82x/sound/soc/Kconfig
--- linux-3.0.82/sound/soc/Kconfig	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/sound/soc/Kconfig	2017-09-23 03:42:50.386673939 +0800
@@ -57,6 +57,7 @@
 source "sound/soc/sh/Kconfig"
 source "sound/soc/tegra/Kconfig"
 source "sound/soc/txx9/Kconfig"
+source "sound/soc/loongson/Kconfig"
 
 # Supported codecs
 source "sound/soc/codecs/Kconfig"
diff -uNra linux-3.0.82/sound/soc/loongson/Kconfig linux-3.0.82x/sound/soc/loongson/Kconfig
--- linux-3.0.82/sound/soc/loongson/Kconfig	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/sound/soc/loongson/Kconfig	2017-09-23 03:42:50.386673939 +0800
@@ -0,0 +1,31 @@
+config SND_LS1A_SOC
+	tristate "SoC Audio for the SB2F chip"
+	depends on LS1C_MACH
+	select SND_LS1A_LIB
+	help
+	  Say Y or M if you want to add support for codecs attached to
+	  the PXA2xx AC97, I2S or SSP interface. You will also need
+	  to select the audio interfaces to support below.
+
+
+config SND_LS1A_AC97
+	tristate
+	select SND_AC97_CODEC
+
+
+config SND_LS1A_SOC_AC97
+	tristate 
+	select AC97_BUS
+	select SND_MIPS
+	select SND_LS1A_LIB_AC97
+	select SND_SOC_AC97_BUS
+
+
+config SND_LS1A
+	tristate "SoC AC97 Audio support for Loongson1A chip"
+	depends on LS1C_MACH
+	select SND_SOC_AC97_CODEC
+	select SND_LS1A_SOC_AC97
+	help
+	  Say Y if you want to add support for SoC audio on the
+	  Loongson 1A chip
diff -uNra linux-3.0.82/sound/soc/loongson/ls1a-ac97.c linux-3.0.82x/sound/soc/loongson/ls1a-ac97.c
--- linux-3.0.82/sound/soc/loongson/ls1a-ac97.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/sound/soc/loongson/ls1a-ac97.c	2017-09-23 03:42:50.386673939 +0800
@@ -0,0 +1,309 @@
+/*
+ * linux/sound/ls1a-ac97.c -- AC97 support for the Loongson 1A chip.
+ *
+ * Author:	Nicolas Pitre
+ * Created:	Dec 02, 2004
+ * Copyright:	MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+
+#include <sound/core.h>
+#include <sound/ac97_codec.h>
+#include <sound/soc.h>
+
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/ls1a-lib.h>
+
+#include <linux/interrupt.h>
+#include "ls1a-pcm.h"
+#include "ls1a-ac97.h"
+
+#if 0	///DEBUG
+#define ZPRINTK(fmt, args...) printk(KERN_ALERT "<%s>: " fmt, __FUNCTION__ , ## args)
+#else
+#define ZPRINTK(fmt, args...)
+#endif
+
+
+#define GS_SOC_I2C_BASE    0xbfe58000  		///I2C 0 æ¨¡å�—å¯„å­˜å™¨åœ°å�€
+
+#define GS_SOC_I2C_PRER_LO (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x0)
+#define GS_SOC_I2C_PRER_HI (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x1)
+#define GS_SOC_I2C_CTR     (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x2)
+#define GS_SOC_I2C_TXR     (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x3)
+#define GS_SOC_I2C_RXR     (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x3)
+#define GS_SOC_I2C_CR      (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x4)
+#define GS_SOC_I2C_SR      (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x4)
+
+
+#define CR_START 0x80
+#define CR_WRITE 0x10
+#define SR_NOACK 0x80
+#define CR_STOP  0x40
+#define SR_BUSY  0x40 
+#define CR_START 0x80
+#define SR_TIP   0x2
+
+#define CR_READ  0x20
+#define I2C_WACK 0x8
+
+#define uda1342_base    0xbfe60000
+
+#define IISSTATE  (volatile unsigned int *)(uda1342_base + 0x8)
+
+int ls1a_i2c_write ( unsigned char reg, unsigned short val)
+{
+	unsigned char value;
+
+	/*write slave_addr*/
+	* GS_SOC_I2C_TXR = UDA_DEV_ADDR;
+	* GS_SOC_I2C_CR  = CR_START|CR_WRITE; 	/* start on first addr */
+	while(*GS_SOC_I2C_SR & SR_TIP);
+
+	if((* GS_SOC_I2C_SR) & SR_NOACK) return -1;
+
+	* GS_SOC_I2C_TXR = reg++;   //lxy: reg++ after write once
+	* GS_SOC_I2C_CR  = CR_WRITE;
+	while(*GS_SOC_I2C_SR & SR_TIP);
+	if((* GS_SOC_I2C_SR) & SR_NOACK) return -1;
+
+	value = (val >> 8); * GS_SOC_I2C_TXR = value;
+	* GS_SOC_I2C_CR  = CR_WRITE;
+	//                printk ("hi data = 0x%x ,", value);
+	while(*GS_SOC_I2C_SR & SR_TIP);
+	if((* GS_SOC_I2C_SR) & SR_NOACK) return -1;
+
+	value = val;
+	* GS_SOC_I2C_TXR = value;
+	* GS_SOC_I2C_CR  = CR_WRITE;
+
+	while(*GS_SOC_I2C_SR & SR_TIP);
+	if((* GS_SOC_I2C_SR) & SR_NOACK) return -1;
+
+	* GS_SOC_I2C_CR = CR_WRITE|CR_STOP;
+	while(*GS_SOC_I2C_SR & SR_TIP);
+
+	while(*GS_SOC_I2C_SR & SR_BUSY);
+	return 1;
+}
+EXPORT_SYMBOL_GPL(ls1a_i2c_write);
+
+unsigned short ls1a_i2c_read (unsigned short reg)
+{
+	unsigned short retval;		//!!
+	unsigned char value;
+
+	/*write slave_addr*/
+	* GS_SOC_I2C_TXR = UDA_DEV_ADDR;
+	* GS_SOC_I2C_CR  = CR_START|CR_WRITE; 		/* start on first addr */
+	while(*GS_SOC_I2C_SR & SR_TIP);
+
+	if((* GS_SOC_I2C_SR) & SR_NOACK) return -1;
+
+	* GS_SOC_I2C_TXR = reg++;   			//lxy reg++ after read once
+	* GS_SOC_I2C_CR  = CR_WRITE;
+	while(*GS_SOC_I2C_SR & SR_TIP);
+	if((* GS_SOC_I2C_SR) & SR_NOACK) return -1;
+
+	/*write slave_addr*/
+	* GS_SOC_I2C_TXR = UDA_DEV_ADDR|1;
+	* GS_SOC_I2C_CR  = CR_START|CR_WRITE; /* start on first addr */
+	while(*GS_SOC_I2C_SR & SR_TIP);
+
+	if((* GS_SOC_I2C_SR) & SR_NOACK) return -1;
+
+	* GS_SOC_I2C_CR  = CR_READ; /*read send ack*/
+	while(*GS_SOC_I2C_SR & SR_TIP);
+	value = * GS_SOC_I2C_TXR;
+	retval =  value << 8;
+
+	* GS_SOC_I2C_CR  = CR_READ|I2C_WACK; /*last read not send ack*/
+	while(*GS_SOC_I2C_SR & SR_TIP);
+	value = * GS_SOC_I2C_TXR;
+	retval |= value;
+
+	* GS_SOC_I2C_CR  = CR_STOP;
+	while(*GS_SOC_I2C_SR & SR_TIP);
+	while(*GS_SOC_I2C_SR & SR_BUSY);
+
+	return retval;		/// count = 1
+}
+EXPORT_SYMBOL_GPL(ls1a_i2c_read);
+
+
+static void ls1a_ac97_cold_reset(struct snd_ac97 *ac97)
+{
+	udelay(5000);
+
+	ls1a_i2c_write( 0, 0);
+	udelay(5000);		//FIXME,This is very very necessary,Zhuo Qixiang!
+	printk(KERN_ALERT "+++++++++ Here Enter into %s.+++++++++\n", __func__);
+}
+
+
+static struct ls1a_pcm_dma_params ls1a_ac97_pcm_stereo_out = {
+	.name			= "AC97 PCM Stereo out",
+	.dev_addr		= 0x1fe60010 | (1<< 31),		///0x0fe72420 | (1<<31) | (0<<30)//æ’­æ”¾,
+};
+
+static struct ls1a_pcm_dma_params ls1a_ac97_pcm_stereo_in = {
+	.name			= "AC97 PCM Stereo in",
+	.dev_addr		= 0x1fe6000c,				///0x0fe74c4c | (1<<31) | (0<<30)//å½•éŸ³,
+									///IISRxData åœ°å�€æ˜¯ 0xbfe6_000c å�Žé�¢åœ¨è®¾ç½®é€šç”¨DMAçš„æ—¶å€™
+									///è®¾ç½®ä¸º dma_daddr
+};
+
+
+static int ls1a_ac97_probe(struct snd_soc_dai *dai)
+{
+	ls1a_ac97_cold_reset(NULL);
+
+	printk(KERN_ERR "%s--------------\n",__func__);
+	return 0;
+}
+
+static int ls1a_ac97_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params)
+{
+	struct snd_soc_pcm_runtime *rtd = substream->private_data;
+	struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+	struct ls1a_pcm_dma_params *dma_data;
+
+	//é‡‡æ ·ä½�æ•°;è®¾ç½®å£°é�“å¯¹äºŽI2S å¦‚ä½•è®¾ç½®???
+	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+		switch (params_format(params)) {
+		case SNDRV_PCM_FORMAT_S8:
+			break;
+		case SNDRV_PCM_FORMAT_S16_LE:
+			ls1a_ac97_pcm_stereo_out.dev_addr |= (1<<28);
+			break;
+		default:
+			printk("NOTICE!___May Not Surpport!\n");
+			break;
+		}
+		dma_data = &ls1a_ac97_pcm_stereo_out;
+		ls1a_i2c_write( 0x20, 0x84);
+		ls1a_i2c_write( 0x21, 0x84);
+                * IISSTATE = 0x0d280;   	///0x0200;
+	}
+	else{
+		switch (params_format(params)) {
+		case SNDRV_PCM_FORMAT_S8:
+			break;
+		case SNDRV_PCM_FORMAT_S16_LE:
+			ls1a_ac97_pcm_stereo_in.dev_addr |= (1<<28);
+			break;
+		default:
+			printk("capture NOTICE!___May Not Surpport!\n");
+			break;
+		}
+		dma_data = &ls1a_ac97_pcm_stereo_in;
+		ls1a_i2c_write( 0x20, 0x30);
+		ls1a_i2c_write( 0x21, 0x30);
+                * IISSTATE = 0x0e800;   	///0x0200;
+	}
+	snd_soc_dai_set_dma_data(cpu_dai, substream, dma_data);
+
+	return 0;
+}
+
+#define LS1A_AC97_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
+		SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
+		SNDRV_PCM_RATE_48000)
+
+struct snd_soc_ops ls1a_ac97_hifi_dai_ops = {
+	.hw_params	= &ls1a_ac97_hw_params,
+};
+
+#define AC97_FORMATS (SNDRV_PCM_FMTBIT_S8 |\
+                               SNDRV_PCM_FMTBIT_S16_LE |\
+                               SNDRV_PCM_FMTBIT_S16_BE |\
+                               SNDRV_PCM_FMTBIT_S20_3LE |\
+                               SNDRV_PCM_FMTBIT_S20_3BE |\
+                               SNDRV_PCM_FMTBIT_S24_3LE |\
+                               SNDRV_PCM_FMTBIT_S24_3BE |\
+                               SNDRV_PCM_FMTBIT_S32_LE |\
+			       SNDRV_PCM_FMTBIT_U16_LE	|\
+                               SNDRV_PCM_FMTBIT_S32_BE)
+
+
+/*
+ * There is only 1 physical AC97 interface for ls1a, but it
+ * has extra fifo's that can be used for aux DACs and ADCs.
+ */
+struct snd_soc_dai_driver ls1a_ac97_dai[] = {
+	{
+		.name = "ls1a-ac97",
+		.id = 0,
+		//.ac97_control = 1,
+		.probe = &ls1a_ac97_probe,
+		.playback = {
+			.stream_name = "AC97 Playback",
+			.channels_min = 1,
+			.channels_max = 2,
+			.rates = LS1A_AC97_RATES,
+			.formats = AC97_FORMATS,},
+		.capture = {
+			.stream_name = "AC97 Capture",
+			.channels_min = 1,
+			.channels_max = 2,
+			.rates = LS1A_AC97_RATES,
+			.formats = AC97_FORMATS  /*SNDRV_PCM_FMTBIT_S16_LE*/ ,},
+	},
+};
+
+EXPORT_SYMBOL_GPL(ls1a_ac97_dai);
+
+static int __devinit ls1a_ac97_dev_probe(struct platform_device *pdev)
+{
+	
+	/* Punt most of the init to the SoC probe; we may need the machine
+	 * driver to do interesting things with the clocking to get us up
+	 * and running.
+	 */
+	return snd_soc_register_dais(&pdev->dev,ls1a_ac97_dai, ARRAY_SIZE(ls1a_ac97_dai));
+}
+
+static int __devexit ls1a_ac97_dev_remove(struct platform_device *pdev)
+{
+	snd_soc_unregister_dais(ls1a_ac97_dai, ARRAY_SIZE(ls1a_ac97_dai));
+
+	return 0;
+}
+
+static struct platform_driver ls1a_ac97_driver = {
+        .probe          = ls1a_ac97_dev_probe,
+        .remove         = __devexit_p(ls1a_ac97_dev_remove),
+        .driver         = {
+                .name   = "ls1a-ac97",
+                .owner  = THIS_MODULE,
+        },
+};
+
+static int __init ls1a_ac97_init(void)
+{
+	pr_debug("Entered %s\n", __func__);
+	return platform_driver_register(&ls1a_ac97_driver);
+	pr_debug("Exit %s\n", __func__);
+}
+module_init(ls1a_ac97_init);
+
+static void __exit ls1a_ac97_exit(void)
+{
+	pr_debug("Entered %s\n", __func__);
+	platform_driver_unregister(&ls1a_ac97_driver);
+	pr_debug("Exit %s\n", __func__);
+}
+module_exit(ls1a_ac97_exit);
+
+
+MODULE_AUTHOR("Nicolas Pitre");
+MODULE_DESCRIPTION("AC97 driver for the Intel PXA2xx chip");
+MODULE_LICENSE("GPL");
diff -uNra linux-3.0.82/sound/soc/loongson/ls1a-ac97.h linux-3.0.82x/sound/soc/loongson/ls1a-ac97.h
--- linux-3.0.82/sound/soc/loongson/ls1a-ac97.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/sound/soc/loongson/ls1a-ac97.h	2017-09-23 03:42:50.386673939 +0800
@@ -0,0 +1,84 @@
+/*
+ * ls1a-ac97.c  --  ALSA Soc Audio Layer
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ */
+
+#ifndef SB2FAC97_H_
+#define SB2FAC97_H_
+
+#define _REG(x) 	((volatile u32 *)(x))
+#define _REG2(b,o) 	((volatile u32 *)((b)+(o)))
+
+#define LSON_AC_FMT  		AFM_S16_LE
+#define LSON_AC_MAXCHNL 	2
+
+
+//AC97
+#define SB2F_AC97_REGS_BASE 0x1fe74000			///0x1fe60000
+
+//AC97_controler
+#define AC97_REG(off)       _REG2(KSEG1ADDR(SB2F_AC97_REGS_BASE),(off))
+#define CSR			AC97_REG(0x00)
+#define OCCR0		AC97_REG(0x04)
+#define OCCR1		AC97_REG(0x08)
+#define OCCR2		AC97_REG(0x0C)
+#define ICCR		AC97_REG(0x10)
+#define CDC_ID      AC97_REG(0x14)
+#define CRAC		AC97_REG(0x18)
+                                       /*Reserved 0x1C Reserved*/
+#define OC0_DATA    AC97_REG(0x20)     /*20 bits WO Output Channel0 Tx buffer*/
+#define OC1_DATA    AC97_REG(0x24)     /*20 bits WO Output Channel1 Tx buffer*/
+#define OC2_DATA    AC97_REG(0x28)     /*20 bits WO Output Channel2 Tx buffer*/
+#define OC3_DATA    AC97_REG(0x2C)     /*20 bits WO Output Channel3 Tx buffer*/
+#define OC4_DATA    AC97_REG(0x30)     /*20 bits WO Output Channel4 Tx buffer*/
+#define OC5_DATA    AC97_REG(0x34)     /*20 bits WO Output Channel5 Tx buffer*/
+#define OC6_DATA    AC97_REG(0x38)     /*20 bits WO Output Channel6 Tx buffer*/
+#define OC7_DATA    AC97_REG(0x3C)     /*20 bits WO Output Channel7 Tx buffer*/
+#define OC8_DATA    AC97_REG(0x40)     /*20 bits WO Output Channel8 Tx buffer*/
+#define IC0_DATA    AC97_REG(0x44)     /*20 bits RO Input Channel0 Rx buffer*/
+#define IC1_DATA    AC97_REG(0x48)     /*20 bits RO Input Channel1 Rx buffer*/
+#define IC2_DATA    AC97_REG(0x4C)     /*20 bits RO Input Channel2 Rx buffer*/
+                                       /*Reserved AC97_REG(0x50 Reserved*/
+#define INTRAW      AC97_REG(0x54)     /*32 bits RO Interrupt RAW status*/
+#define INTM        AC97_REG(0x58)     /*32 bits R/W Interrupt Mask*/
+#define INTS        AC97_REG(0x5C)     /*32 bits RO Interrupt Masked Status*/
+#define CLR_INT     AC97_REG(0x60)     /*1 bit RO Clear Combined and Individual Interrupt*/
+#define CLR_OC_INT  AC97_REG(0x64)     /*1 bit RO Clear Output Channel Reference Interrupt*/
+#define CLR_IC_INT  AC97_REG(0x68)      /*1 bit RO Clear Input Channel Reference Interrupt*/
+#define CLR_CDC_WR  AC97_REG(0x68)      /*1 bit RO Clear Codec Write Done Interrupt*/
+#define CLR_CDC_RD  AC97_REG(0x6c)      /*1 bit RO Clear Codec Read Done Interrupt*/
+
+#define OC_DATA     OC0_DATA            /*DEFAULT */
+#define IN_DATA     IC1_DATA            /*SETTING */
+
+
+#define 	INPUT_CHANNELS	8
+#define 	OUTPUT_CHANNELS	9
+
+/*reg bits define*/ 
+#define CRAR_READ  0x80000000
+#define CRAR_WRITE 0x00000000
+#define CRAR_CODEC_REG(x)  (((x)&(0x7F))<<16)
+
+//default setting 
+#define OCCR	    OCCR0
+#define OUT_CHANNEL OC[0]
+#define IN_CHANNEL  IC[0]
+#define INTS_CRAC_MASK	0x3
+
+
+#define UDA_DEV_ADDR    0x34
+
+extern struct snd_soc_dai_driver ls1a_ac97_dai[];
+#define READ_CRAC_MASK 0x1
+#define WRITE_CRAC_MASK 0x2
+#endif /*SB2FAC97_H_*/
+
+
+
+void sb2f_def_set(void);
diff -uNra linux-3.0.82/sound/soc/loongson/ls1a.c linux-3.0.82x/sound/soc/loongson/ls1a.c
--- linux-3.0.82/sound/soc/loongson/ls1a.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/sound/soc/loongson/ls1a.c	2017-09-23 03:42:50.386673939 +0800
@@ -0,0 +1,85 @@
+/*
+ * ls1a.c  --  SoC audio for ls1a
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/device.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+
+#include "ls1a-pcm.h"
+#include "ls1a-ac97.h"
+
+static struct 	snd_soc_card ls1a;
+extern struct 	snd_soc_ops ls1a_ac97_hifi_dai_ops;
+extern int	uda134x_init(struct snd_soc_pcm_runtime *rtd);
+
+static struct snd_soc_dai_link ls1a_dai[] = {
+	{
+		.name = "AC97",
+		.stream_name = "LS1A<-->ALC203",
+
+		.platform_name	= "ls1a-pcm-audio",
+		.cpu_dai_name ="ls1a-ac97",
+		.codec_name	= "uda134x-codec",	
+		.codec_dai_name ="uda134x-hifi",
+		.ops	= &ls1a_ac97_hifi_dai_ops,
+		.init	= uda134x_init,
+	},
+};
+
+static struct snd_soc_card ls1a = {
+	.name = "LS1A",
+	.owner= THIS_MODULE,
+	.dai_link = ls1a_dai,
+	.num_links = ARRAY_SIZE(ls1a_dai),
+};
+
+
+/*zqx----platform_deviceä»£è¡¨æ•´ä¸ªéŸ³é¢‘å­�ç³»ç»Ÿ*/
+static struct platform_device *ls1a_snd_ac97_device;
+
+static int __init ls1a_init(void)
+{
+	int ret;
+
+	pr_debug("Entered %s\n", __func__);
+	ls1a_snd_ac97_device = platform_device_alloc("soc-audio", -1);
+	if (!ls1a_snd_ac97_device){
+		printk("err platform devoce alloc failed!\n");
+		return -ENOMEM;
+	}
+
+	platform_set_drvdata(ls1a_snd_ac97_device, &ls1a);
+
+	ret = platform_device_add(ls1a_snd_ac97_device);
+
+	if (ret)
+		platform_device_put(ls1a_snd_ac97_device);
+
+	return ret;
+}
+
+static void __exit ls1a_exit(void)
+{
+	pr_debug("Entered %s\n", __func__);
+	platform_device_unregister(ls1a_snd_ac97_device);
+	pr_debug("Exited %s\n", __func__);
+}
+
+module_init(ls1a_init);
+module_exit(ls1a_exit);
+
+/* Module information */
+MODULE_AUTHOR("Zhuo Qixiang");
+MODULE_DESCRIPTION("ALSA SoC LS1A(SB2F)");
+MODULE_LICENSE("GPL");
+
diff -uNra linux-3.0.82/sound/soc/loongson/ls1a-pcm.c linux-3.0.82x/sound/soc/loongson/ls1a-pcm.c
--- linux-3.0.82/sound/soc/loongson/ls1a-pcm.c	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/sound/soc/loongson/ls1a-pcm.c	2017-09-23 03:42:50.386673939 +0800
@@ -0,0 +1,242 @@
+/*
+ * linux/sound/mips/ls1a-pcm.c -- ALSA PCM interface for the Loongson 1A chip
+ *
+ * Author:	Nicolas Pitre
+ * Created:	Nov 30, 2004
+ * Copyright:	(C) 2004 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/dma-mapping.h>
+
+#include <sound/core.h>
+#include <sound/soc.h>
+#include <sound/ls1a-lib.h>
+
+#include <linux/interrupt.h>
+
+#include "ls1a-pcm.h"
+#include "../../mips/ls1a-pcm.h"
+
+#define SA_SHIRQ 0x00000080
+
+#define GS_SOC_I2C_BASE    0xbfe58000           
+#define GS_SOC_I2C_PRER_LO (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x0)
+#define GS_SOC_I2C_PRER_HI (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x1)
+#define GS_SOC_I2C_CTR     (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x2)
+#define GS_SOC_I2C_TXR     (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x3)
+#define GS_SOC_I2C_RXR     (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x3)
+#define GS_SOC_I2C_CR      (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x4)
+#define GS_SOC_I2C_SR      (volatile unsigned char *)(GS_SOC_I2C_BASE + 0x4)
+
+#define I2C_SINGLE 0 
+#define I2C_BLOCK 1
+#define I2C_SMB_BLOCK 2
+#define I2C_HW_SINGLE 3 
+
+#define uda1342_base    0xbfe60000
+
+#define IISVERSION  (volatile unsigned int *)(uda1342_base + 0x0)
+#define IISCONFIG   (volatile unsigned int *)(uda1342_base + 0x4)
+
+unsigned short reg1[7] = {
+        //    0x1c02,
+        //    0x1a02,
+        0x1402,
+        //    0x1402,
+        //    0x1002,
+        //    0x1202,
+        0x0014,
+        //    0x0010,
+        //    0xc003,
+        //    0xff63,
+        //    0xff00,
+        0xff03,
+        //    0xfc00,
+        //    0xcf83,
+        0x0000,
+        0x0000,
+        0x0130,
+        0x042F,
+};
+
+static int ls1a_pcm_hw_params(struct snd_pcm_substream *substream,
+	struct snd_pcm_hw_params *params)
+{
+	struct snd_pcm_runtime *runtime = substream->runtime;
+	struct ls1a_runtime_data *prtd = runtime->private_data;
+	struct snd_soc_pcm_runtime *rtd = substream->private_data;
+	struct ls1a_pcm_dma_params *dma = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
+	int ret;
+
+	/* return if this is a bufferless transfer e.g.
+	 * codec <--> BT codec or GSM modem -- lg FIXME */
+	if (!dma)	//äºŽls1a-ac97.cé‡Œèµ‹å€¼
+		return 0;
+	
+	/*è¯·æ±‚dma_ch,é‡Šæ”¾dma_ch*/
+	if (prtd->params != dma || prtd->params == NULL) {
+		prtd->params = dma;
+		
+		ret = request_irq(LS1B_BOARD_DMA1_IRQ , ls1a_pcm_dma_irq, SA_SHIRQ,		///xsc
+			"ac97dma-read", substream);
+		if(ret < 0){
+			printk("-+-+-+-+%s request_irq failed.\n", __func__);
+			return ret;
+		}
+		
+		ret = request_irq(LS1B_BOARD_DMA2_IRQ , ls1a_pcm_dma_irq, SA_SHIRQ,		///xsc
+			"ac97dma-write", substream);
+		if(ret < 0){
+			printk("-+-+-+-+%s request_irq failed.\n", __func__);
+			return ret;
+		}
+	}
+	printk(KERN_ERR "-+-+-+-+Here in func:%s May show A LOT TIMES!\n", __func__);
+	
+	return __ls1a_pcm_hw_params(substream, params);
+}
+
+int	uda134x_init(struct snd_soc_pcm_runtime *rtd)
+{
+	int ret = 0;
+	unsigned short data1[7];
+	unsigned char i;
+
+	*(volatile unsigned int *)(0xbfd010c0) = 0x0;
+	*(volatile unsigned int *)(0xbfd010c4) = 0x0;
+	*(volatile unsigned int *)(0xbfd010c8) = 0x0;
+
+	* GS_SOC_I2C_PRER_LO = 0x64;
+	* GS_SOC_I2C_PRER_HI = 0;
+	* GS_SOC_I2C_CTR = 0x80;
+
+	ret = ls1a_i2c_write( 0x0 , reg1[0] );
+	ret = ls1a_i2c_write( 0x1 , reg1[1] );
+	ret = ls1a_i2c_write( 0x10, reg1[2] );
+	ret = ls1a_i2c_write( 0x11, reg1[3] );
+	ret = ls1a_i2c_write( 0x12, reg1[4] );
+	ret = ls1a_i2c_write( 0x20, 0x84 );
+	ret = ls1a_i2c_write( 0x21, 0x84 );
+
+	data1[0] 	= ls1a_i2c_read(0x0  );
+	data1[1] 	= ls1a_i2c_read(0x1  );
+	data1[2] 	= ls1a_i2c_read(0x10 );
+	data1[3] 	= ls1a_i2c_read(0x11 );
+	data1[4] 	= ls1a_i2c_read(0x12 );
+	data1[5] 	= ls1a_i2c_read(0x20 );
+	data1[6] 	= ls1a_i2c_read(0x21 );
+
+	* IISCONFIG = (16<<24) | (16<<16) | (0x27 /*rat_bitdiv*/ <<8) | (0x4 /*rat_cddiv*/ <<0) ;
+
+	/// æ£€æŸ¥I2Cæ˜¯å�¦è¯»å†™æ­£ç¡®
+	for (i=0; i<7; i++)
+	{
+		printk ("data1[%d] = 0x%x ---> 0x%x!\n", i, data1[i], reg1[i]);
+	}
+}
+
+
+static int ls1a_pcm_hw_free(struct snd_pcm_substream *substream)
+{
+	struct ls1a_runtime_data *prtd = substream->runtime->private_data;
+
+	free_irq(LS1B_BOARD_DMA1_IRQ,substream);
+	free_irq(LS1B_BOARD_DMA2_IRQ,substream);
+
+	__ls1a_pcm_hw_free(substream);
+
+	return 0;
+}
+
+static struct snd_pcm_ops ls1a_pcm_ops = {
+	.open		= __ls1a_pcm_open,
+	.close		= __ls1a_pcm_close,
+	.ioctl		= snd_pcm_lib_ioctl,
+	.hw_params	= ls1a_pcm_hw_params,
+	.hw_free	= ls1a_pcm_hw_free,
+	.prepare	= __ls1a_pcm_prepare,
+	.trigger	= ls1a_pcm_trigger,
+	.pointer	= ls1a_pcm_pointer,
+};
+
+static u64 ls1a_pcm_dmamask = DMA_BIT_MASK(32);
+
+static int ls1a_soc_pcm_new(struct snd_card *card, struct snd_soc_dai *dai,
+	struct snd_pcm *pcm)
+{
+	int ret = 0;
+	printk("func %s,line%i\n",__func__,__LINE__);
+	if (!card->dev->dma_mask)
+		card->dev->dma_mask = &ls1a_pcm_dmamask;
+	if (!card->dev->coherent_dma_mask)
+		card->dev->coherent_dma_mask = DMA_BIT_MASK(32);
+
+	if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
+		ret = ls1a_pcm_preallocate_dma_buffer(pcm,
+			SNDRV_PCM_STREAM_PLAYBACK);
+		if (ret){	
+			printk("func %s,line%i\n",__func__,__LINE__);
+			goto out;
+		}
+	}
+
+	if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream ) {
+		ret = ls1a_pcm_preallocate_dma_buffer(pcm,
+			SNDRV_PCM_STREAM_CAPTURE);
+		if (ret){			
+			printk("func %s,line%i\n",__func__,__LINE__);
+			goto out;
+		}
+	}
+ out:
+	return ret;
+}
+
+struct snd_soc_platform_driver ls1a_soc_platform = {
+	.ops 		= &ls1a_pcm_ops,
+	.pcm_new	= ls1a_soc_pcm_new,
+	.pcm_free	= ls1a_pcm_free_dma_buffers,
+};
+EXPORT_SYMBOL_GPL(ls1a_soc_platform);;
+
+static int __devinit ls1a_soc_platform_probe(struct platform_device *pdev)
+{
+	int ret;
+        ret	= snd_soc_register_platform(&pdev->dev, &ls1a_soc_platform);
+	return ret;
+}
+
+static int __devexit ls1a_soc_platform_remove(struct platform_device *pdev)
+{
+        snd_soc_unregister_platform(&pdev->dev);
+        return 0;
+}
+
+static struct platform_driver ls1a_pcm_driver = {
+        .driver = {
+                        .name = "ls1a-pcm-audio",
+                        .owner = THIS_MODULE,
+        },
+        .probe = ls1a_soc_platform_probe,
+        .remove = __devexit_p(ls1a_soc_platform_remove),
+};
+
+static int __init ls1a_soc_platform_init(void)
+{
+	return platform_driver_register(&ls1a_pcm_driver);
+}
+module_init(ls1a_soc_platform_init);
+
+static void __exit ls1a_soc_platform_exit(void)
+{
+	platform_driver_unregister(&ls1a_pcm_driver);
+}
+module_exit(ls1a_soc_platform_exit);
+
+MODULE_AUTHOR("Nicolas Pitre");
+MODULE_DESCRIPTION("Intel PXA2xx PCM DMA module");
+MODULE_LICENSE("GPL");
diff -uNra linux-3.0.82/sound/soc/loongson/ls1a-pcm.h linux-3.0.82x/sound/soc/loongson/ls1a-pcm.h
--- linux-3.0.82/sound/soc/loongson/ls1a-pcm.h	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/sound/soc/loongson/ls1a-pcm.h	2017-09-23 03:42:50.386673939 +0800
@@ -0,0 +1,37 @@
+/*
+ * linux/sound/arm/ls1a-pcm.h -- ALSA PCM interface for the Intel PXA2xx chip
+ *
+ * Author:	Nicolas Pitre
+ * Created:	Nov 30, 2004
+ * Copyright:	MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _LS1A_PCM_H
+#define _LS1A_PCM_H
+
+#include <asm/delay.h>
+
+/* platform data */
+extern struct snd_soc_platform_driver ls1a_soc_platform;
+
+/*Zhuo Qixiang REGS OPRERATION*/
+
+
+static inline u32 read_reg(volatile u32 * reg)
+{
+	return (*reg);
+}
+static inline void write_reg(volatile u32 * reg, u32 val)
+{
+	*(reg) = (val);
+}
+
+int ls1a_i2c_write ( unsigned char reg, unsigned short val);
+unsigned short ls1a_i2c_read (unsigned short reg);
+
+
+#endif
diff -uNra linux-3.0.82/sound/soc/loongson/Makefile linux-3.0.82x/sound/soc/loongson/Makefile
--- linux-3.0.82/sound/soc/loongson/Makefile	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/sound/soc/loongson/Makefile	2017-09-23 03:42:50.386673939 +0800
@@ -0,0 +1,12 @@
+# LOONGSON Platform Support
+snd-soc-ls1a-objs := ls1a-pcm.o
+snd-soc-ls1a-ac97-objs := ls1a-ac97.o
+
+obj-$(CONFIG_SND_LS1A_SOC) += snd-soc-ls1a.o
+obj-$(CONFIG_SND_LS1A_SOC_AC97) += snd-soc-ls1a-ac97.o
+
+# LS1A Machine Support
+snd-ls1a-objs := ls1a.o
+
+obj-$(CONFIG_SND_LS1A) += snd-ls1a.o
+
diff -uNra linux-3.0.82/sound/soc/Makefile linux-3.0.82x/sound/soc/Makefile
--- linux-3.0.82/sound/soc/Makefile	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/sound/soc/Makefile	2017-09-23 03:42:50.386673939 +0800
@@ -20,3 +20,5 @@
 obj-$(CONFIG_SND_SOC)	+= sh/
 obj-$(CONFIG_SND_SOC)	+= tegra/
 obj-$(CONFIG_SND_SOC)	+= txx9/
+obj-$(CONFIG_SND_SOC)   += loongson/
+
diff -uNra linux-3.0.82/sound/soc/soc-core.c linux-3.0.82x/sound/soc/soc-core.c
--- linux-3.0.82/sound/soc/soc-core.c	2013-06-14 00:27:00.000000000 +0800
+++ linux-3.0.82x/sound/soc/soc-core.c	2017-09-23 03:42:50.386673939 +0800
@@ -2159,6 +2159,7 @@
 	if (platform->driver->pcm_new) {
 		ret = platform->driver->pcm_new(rtd->card->snd_card,
 						codec_dai, pcm);
+		printk(" ========dbg-yg==============>  %p \r\n", platform->driver->pcm_new);
 		if (ret < 0) {
 			pr_err("asoc: platform pcm constructor failed\n");
 			return ret;
diff -uNra linux-3.0.82/.version linux-3.0.82x/.version
--- linux-3.0.82/.version	1970-01-01 08:00:00.000000000 +0800
+++ linux-3.0.82x/.version	2017-09-23 03:42:50.390673926 +0800
@@ -0,0 +1 @@
+579
